Signed-off-by: 吴文峰 <kevin@lmve.net>
This commit is contained in:
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Display:
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Panel: X11
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Width: 480
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Height: 480
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Lora:
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Module: sx1262 # BananaPi-BPI-R4 SPI via 26p GPIO Header
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## CS: 28
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IRQ: 50
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Busy: 62
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Reset: 51
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spidev: spidev1.0
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DIO2_AS_RF_SWITCH: true
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DIO3_TCXO_VOLTAGE: true
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-9
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## https://www.mikroe.com/lr-iot-click
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Lora:
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Module: lr1110 # OpenWRT ONE mikroBUS with LR-IOT-CLICK
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# CS: 25
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IRQ: 10
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Busy: 12
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# Reset: 2
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spidev: spidev2.0
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DIO3_TCXO_VOLTAGE: 1.6
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@@ -1,8 +0,0 @@
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Lora:
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Module: sx1262
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IRQ: 10
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Busy: 12
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# Reset: 2
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spidev: spidev2.0
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DIO2_AS_RF_SWITCH: true
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DIO3_TCXO_VOLTAGE: true
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@@ -1,26 +0,0 @@
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### Waveshare 1.44inch LCD HAT
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Display:
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Panel: ST7735S
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spidev: spidev0.0 # Specify either the spidev here, or the CS below
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# CS: 8 #Chip Select # Optional, as this is the default pin for spidev0.0
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DC: 25 # Data/Command pin
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Backlight: 24
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Width: 128
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Height: 128
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Reset: 27
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OffsetX: 2
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OffsetY: 1
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# OffsetY: 31 # These two options are used to properly flip the screen 180 degrees
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# OffsetRotate: 3
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Input:
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TrackballUp: 6
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TrackballDown: 19
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TrackballLeft: 5
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TrackballRight: 26
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TrackballPress: 13
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TrackballDirection: FALLING
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# User: 21
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@@ -1,18 +0,0 @@
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Display:
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### Waveshare 2.8inch RPi LCD
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Panel: ST7789
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CS: 8
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DC: 22 # Data/Command pin
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Backlight: 18
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Width: 240
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Height: 320
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Reset: 27
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Rotate: true
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Invert: true
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Touchscreen:
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### Note, at least for now, the touchscreen must have a CS pin defined, even if you let Linux manage the CS switching.
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Module: XPT2046 # Waveshare 2.8inch
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CS: 7
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IRQ: 17
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@@ -1,20 +0,0 @@
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---
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Lora:
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## Ebyte E80-900M22S
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## This is a bit experimental
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##
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##
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Module: lr1121
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gpiochip: 1 # subtract 32 from the gpio numbers
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DIO3_TCXO_VOLTAGE: 1.8
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CS: 16 #pin6 / GPIO48 1C0
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IRQ: 23 #pin17 / GPIO55 1C7
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Busy: 22 #pin16 / GPIO54 1C6
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Reset: 25 #pin13 / GPIO57 1D1
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spidev: spidev0.0 #pins are (CS=16, CLK=17, MOSI=18, MISO=19)
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spiSpeed: 2000000
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General:
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MACAddressSource: eth0
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---
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Lora:
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## Ebyte E22-900M30S, E22-900M22S with or without external RF switching setup
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## HT-RA62 (Has internal switching, but whatever)
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## Seeed WIO SX1262 (already has TXEN-DIO2 link, but needs RXEN)
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## Will work with any module with or without RF switching, and with TCXO
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Module: sx1262
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gpiochip: 1 # subtract 32 from the gpio numbers
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DIO2_AS_RF_SWITCH: true
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DIO3_TCXO_VOLTAGE: true
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CS: 16 #pin6 / GPIO48 1C0
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IRQ: 23 #pin17 / GPIO55 1C7
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Busy: 22 #pin16 / GPIO54 1C6
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Reset: 25 #pin13 / GPIO57 1D1
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RXen: 24 #pin12 / GPIO56 1D0 # Not strictly needed for auto-switching, but why complicate things?
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# TXen: bridge to DIO2 on E22 module
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spidev: spidev0.0 #pins are (CS=16, CLK=17, MOSI=18, MISO=19)
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spiSpeed: 2000000
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General:
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MACAddressSource: eth0
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@@ -1,21 +0,0 @@
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---
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Lora:
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## Ebyte E22-900MM22S with no external RF switching setup
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## Waveshare SX126X XXXM, AI Thinker RA-01SH
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## Will work with any module with or without RF switching and no TCXO
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Module: sx1262
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gpiochip: 1 # subtract 32 from the gpio numbers
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DIO2_AS_RF_SWITCH: true
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DIO3_TCXO_VOLTAGE: false
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CS: 16 #pin6 / GPIO48 1C0
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IRQ: 23 #pin17 / GPIO55 1C7
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Busy: 22 #pin16 / GPIO54 1C6
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Reset: 25 #pin13 / GPIO57 1D1
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RXen: 24 #pin12 / GPIO56 1D0 # Not strictly needed for auto-switching, but why complicate things?
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# TXen: bridge to DIO2 on E22 module
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spidev: spidev0.0 #pins are (CS=16, CLK=17, MOSI=18, MISO=19)
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spiSpeed: 2000000
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General:
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MACAddressSource: eth0
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@@ -1,6 +0,0 @@
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Lora:
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Module: RF95 # Adafruit RFM9x
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Reset: 25
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CS: 7
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IRQ: 22
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# Busy: 23
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@@ -1,14 +0,0 @@
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# MeshAdv-Pi E22-900M30S
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# https://github.com/chrismyers2000/MeshAdv-Pi-Hat
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Lora:
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Module: sx1262
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CS: 21
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IRQ: 16
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Busy: 20
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Reset: 18
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TXen: 13
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RXen: 12
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DIO3_TCXO_VOLTAGE: true
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# Only for E22-900M33S:
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# Limit the output power to 8 dBm
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# SX126X_MAX_POWER: 8
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# MeshAdv Mini E22-900M22S
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# https://github.com/chrismyers2000/MeshAdv-Mini
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Lora:
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Module: sx1262 # Ebyte E22-900M22S
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CS: 8
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IRQ: 16
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Busy: 20
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Reset: 24
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RXen: 12
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DIO2_AS_RF_SWITCH: true
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DIO3_TCXO_VOLTAGE: true
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@@ -1,12 +0,0 @@
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Lora:
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### RAK13300in Slot 1
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Module: sx1262
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IRQ: 22 #IO6
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Reset: 16 # IO4
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Busy: 24 # IO5
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# Ant_sw: 13 # IO3
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DIO3_TCXO_VOLTAGE: true
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DIO2_AS_RF_SWITCH: true
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spidev: spidev0.0
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# CS: 8
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@@ -1,8 +0,0 @@
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Lora:
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### RAK13300in Slot 2 pins
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IRQ: 18 #IO6
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Reset: 24 # IO4
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Busy: 19 # IO5
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# Ant_sw: 23 # IO3
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spidev: spidev0.1
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# CS: 7
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@@ -1,18 +0,0 @@
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Lora:
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Module: sx1262
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DIO2_AS_RF_SWITCH: true
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DIO3_TCXO_VOLTAGE: true
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gpiochip: 0
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MOSI: 12
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MISO: 13
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IRQ: 1
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Busy: 23
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Reset: 22
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RXen: 0
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gpiochip: 1
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CS: 9
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SCK: 11
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# TXen: bridge to DIO2 on E22 module
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SX126X_MAX_POWER: 22
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spidev: spidev1.0
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spiSpeed: 2000000
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@@ -1,11 +0,0 @@
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Lora:
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Module: sx1262
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CS: 0
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IRQ: 6
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Reset: 2
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Busy: 4
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spidev: ch341
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DIO3_TCXO_VOLTAGE: true
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# USB_Serialnum: 12345678
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USB_PID: 0x5512
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USB_VID: 0x1A86
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@@ -1,11 +0,0 @@
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Lora:
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Module: lr1121
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CS: 0
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IRQ: 6
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Reset: 2
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Busy: 4
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spidev: ch341
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DIO3_TCXO_VOLTAGE: 1.8
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# USB_Serialnum: 12345678
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USB_PID: 0x5512
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USB_VID: 0x1A86
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@@ -1,5 +0,0 @@
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Lora:
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Module: sx1262
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CS: 0
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IRQ: 10
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spidev: ch341
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@@ -1,49 +0,0 @@
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Lora:
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### Raxda Rock 2F running Armbian Linux 6.1.99-vendor-rk35xx
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### https://github.com/markbirss/rock-2f
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### https://github.com/markbirss/lora-starter-edition-sx1262-i2c
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### https://github.com/radxa-pkg/radxa-overlays/blob/main/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi0-cs1-spidev.dts
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### Require install of https://github.com/radxa-pkg/radxa-overlays and rk3528-spi0-cs1-spidev.dtbo copied to /boot/dtb/rockchip/overlay and enabled
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### in /boot/armbianEnv.txt - overlays=rk3528-spi0-cs1-spidev
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### The Radxa Rock 2F employs multiple gpio chips.
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### Each gpio pin must be unique, but can be assigned to a specific gpio chip and line.
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### In case solely a no. is given, the default gpio chip and pin == line will be employed.
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###
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Module: sx1262 # Radxa Rock 2F + Starter Edition SX1262 HAT by Mark Birss
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DIO2_AS_RF_SWITCH: true
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DIO3_TCXO_VOLTAGE: 1.8
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spidev: spidev0.1
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CS: # NSS PIN_24 -> chip 4, line 14
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pin: 24
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gpiochip: 4
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line: 14
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SCK: # SCK PIN_23 -> chip 4, line 12
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pin: 23
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gpiochip: 4
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line: 12
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Busy: # BUSY PIN_7 -> chip 4, line 6
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pin: 7
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gpiochip: 4
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line: 6
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MOSI: # MOSI PIN_19 -> chip 4, line 10
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pin: 19
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gpiochip: 4
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line: 10
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MISO: # MISO PIN_21 -> chip 4, line 11
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pin: 21
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gpiochip: 4
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line: 11
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Reset: # NRST PIN_12 -> chip 1, line 13
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pin: 12
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gpiochip: 1
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line: 13
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IRQ: # DIO1 PIN_15 -> chip 4, line 22
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pin: 15
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gpiochip: 4
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line: 22
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# RXen: # RXEN PIN_22 -> chip 3!, line 17
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# pin: 22
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# gpiochip: 3
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# line: 17
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# TXen: RADIOLIB_NC # TXEN no PIN, no line, fallback to default gpio chip
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@@ -1,10 +0,0 @@
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# https://www.waveshare.com/core1262-868m.htm
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# https://github.com/markbirss/lora-starter-edition-sx1262-i2c
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Lora:
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Module: sx1262 # Starter Edition SX1262 I2C Raspberry Pi HAT
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DIO2_AS_RF_SWITCH: true
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DIO3_TCXO_VOLTAGE: true
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CS: 8
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IRQ: 22
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Busy: 4
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Reset: 18
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@@ -1,17 +0,0 @@
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Lora:
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Module: sx1262
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CS: 0
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IRQ: 6
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Reset: 2
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Busy: 4
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RXen: 1
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DIO2_AS_RF_SWITCH: true
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DIO3_TCXO_VOLTAGE: true
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spidev: ch341
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USB_PID: 0x5512
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USB_VID: 0x1A86
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# Optional: Reduce power to 10 dBm to
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# avoid over-drawing the USB port
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# SX126X_MAX_POWER: 10
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# Optional: Set the serial number for multi-radio support
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# USB_Serialnum: 13374201
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@@ -1,8 +0,0 @@
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Lora:
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Module: sx1262 # Waveshare SX126X XXXM
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DIO2_AS_RF_SWITCH: true
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CS: 21
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IRQ: 16
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Busy: 20
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Reset: 18
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SX126X_ANT_SW: 6
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-10
@@ -1,10 +0,0 @@
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# https://www.waveshare.com/pico-lora-sx1262-868m.htm
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# https://github.com/markbirss/lora-ws-raspberry-pi-pico-to-rpi-adapter
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Lora:
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Module: sx1262 # Waveshare Raspberry Pi Pico to Raspberry Pi HAT Adapter
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DIO2_AS_RF_SWITCH: true
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DIO3_TCXO_VOLTAGE: true
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CS: 21
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IRQ: 16
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Busy: 20
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Reset: 18
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@@ -1,52 +0,0 @@
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# https://www.waveshare.com/pico-lora-sx1262-868m.htm
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# http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-Zero-3.html
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#
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# See Orange Pi Zero3 manual, chapter 3.16, page 124 for 26-pin header pinout
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#
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# Pin Connection
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# Waveshare Orange Pi Zero3
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# 36 3.3V 17
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# 15 MOSI 19
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# 16 MISO 21
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# 14 CLK 23
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# 38 GND 25
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# 4 BUSY 18
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# 20 RESET 22
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# 5 CS 24
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# 26 DIO1/IRQ 26
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Lora:
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Module: sx1262 # Waveshare Raspberry Pico Lora module
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DIO2_AS_RF_SWITCH: true
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DIO3_TCXO_VOLTAGE: true
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# Specify either the spidev1_1 or the CS below, not both!
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# On DietPi Linux, when using the user overlay dietpi-spi1_1.dtbo, CS will be configured with spidev1.1
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spidev: spidev1.1 # See Orange Pi Zero3 manual, chapter 3.18.3, page 130
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# CS: # CS PIN_24 -> chip 1, line 233
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# pin: 24
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# gpiochip: 1
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# line: 233
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SCK: # SCK PIN_23 -> chip 1, line 230
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pin: 23
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gpiochip: 1
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line: 230
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Busy: # BUSY PIN_18 -> chip 1, line 78
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pin: 18
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gpiochip: 1
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line: 78
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MOSI: # MOSI PIN_19 -> chip 1, line 231
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pin: 19
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gpiochip: 1
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line: 231
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MISO: # MISO PIN_21 -> chip 1, line 232
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pin: 21
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gpiochip: 1
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line: 232
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Reset: # NRST PIN_22 -> chip 1, line 71
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pin: 22
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gpiochip: 1
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line: 71
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IRQ: # DIO1 PIN_26 -> chip 1, line 74
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pin: 26
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gpiochip: 1
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line: 74
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Reference in New Issue
Block a user