diff --git a/.cproject b/.cproject
index 5ceca99..5f7e8ad 100644
--- a/.cproject
+++ b/.cproject
@@ -44,10 +44,10 @@
-
-
+
+
@@ -119,10 +119,10 @@
diff --git a/.mxproject b/.mxproject
index d15992f..812ced6 100644
--- a/.mxproject
+++ b/.mxproject
@@ -1,25 +1,25 @@
[PreviousLibFiles]
-LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_armv8mbl.h;
+LibFiles=Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_fsmc.h;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_def.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_sram.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_spi.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_fsmc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_sram.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_fsmc.h;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_def.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_sram.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_spi.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim_ex.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\stm32f103xe.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\system_stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
[PreviousUsedCubeIDEFiles]
-SourceFiles=Core/Src/main.c;Core/Src/stm32f1xx_it.c;Core/Src/stm32f1xx_hal_msp.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Core/Src/system_stm32f1xx.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Core/Src/system_stm32f1xx.c;;;
-HeaderPath=Drivers/STM32F1xx_HAL_Driver/Inc;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32F1xx/Include;Drivers/CMSIS/Include;Core/Inc;
+SourceFiles=Core\Src\main.c;Core\Src\stm32f1xx_it.c;Core\Src\stm32f1xx_hal_msp.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_fsmc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_sram.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_fsmc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_sram.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;;;
+HeaderPath=Drivers\STM32F1xx_HAL_Driver\Inc;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32F1xx\Include;Drivers\CMSIS\Include;Core\Inc;
CDefines=USE_HAL_DRIVER;STM32F103xE;USE_HAL_DRIVER;USE_HAL_DRIVER;
[PreviousGenFiles]
AdvancedFolderStructure=true
HeaderFileListSize=3
-HeaderFiles#0=/Users/wuwenfeng/STM32CubeIDE/workspace_1.7.0/m3s/Core/Inc/stm32f1xx_it.h
-HeaderFiles#1=/Users/wuwenfeng/STM32CubeIDE/workspace_1.7.0/m3s/Core/Inc/stm32f1xx_hal_conf.h
-HeaderFiles#2=/Users/wuwenfeng/STM32CubeIDE/workspace_1.7.0/m3s/Core/Inc/main.h
+HeaderFiles#0=C:/Users/wuwen/Desktop/M3s_stm32/Core/Inc/stm32f1xx_it.h
+HeaderFiles#1=C:/Users/wuwen/Desktop/M3s_stm32/Core/Inc/stm32f1xx_hal_conf.h
+HeaderFiles#2=C:/Users/wuwen/Desktop/M3s_stm32/Core/Inc/main.h
HeaderFolderListSize=1
-HeaderPath#0=/Users/wuwenfeng/STM32CubeIDE/workspace_1.7.0/m3s/Core/Inc
+HeaderPath#0=C:/Users/wuwen/Desktop/M3s_stm32/Core/Inc
HeaderFiles=;
SourceFileListSize=3
-SourceFiles#0=/Users/wuwenfeng/STM32CubeIDE/workspace_1.7.0/m3s/Core/Src/stm32f1xx_it.c
-SourceFiles#1=/Users/wuwenfeng/STM32CubeIDE/workspace_1.7.0/m3s/Core/Src/stm32f1xx_hal_msp.c
-SourceFiles#2=/Users/wuwenfeng/STM32CubeIDE/workspace_1.7.0/m3s/Core/Src/main.c
+SourceFiles#0=C:/Users/wuwen/Desktop/M3s_stm32/Core/Src/stm32f1xx_it.c
+SourceFiles#1=C:/Users/wuwen/Desktop/M3s_stm32/Core/Src/stm32f1xx_hal_msp.c
+SourceFiles#2=C:/Users/wuwen/Desktop/M3s_stm32/Core/Src/main.c
SourceFolderListSize=1
-SourcePath#0=/Users/wuwenfeng/STM32CubeIDE/workspace_1.7.0/m3s/Core/Src
+SourcePath#0=C:/Users/wuwen/Desktop/M3s_stm32/Core/Src
SourceFiles=;
diff --git a/.settings/stm32cubeide.project.prefs b/.settings/stm32cubeide.project.prefs
index 1d79db8..6f394f1 100644
--- a/.settings/stm32cubeide.project.prefs
+++ b/.settings/stm32cubeide.project.prefs
@@ -1,4 +1,4 @@
66BE74F758C12D739921AEA421D593D3=3
8DF89ED150041C4CBC7CB9A9CAA90856=F46B32B5BAB702A632C55EDACF07DC3A
-DC22A860405A8BF2F2C095E5B6529F12=F10B3BB9AE74C7F02862DDE67690A377
+DC22A860405A8BF2F2C095E5B6529F12=F46B32B5BAB702A632C55EDACF07DC3A
eclipse.preferences.version=1
diff --git a/Core/Inc/main.h b/Core/Inc/main.h
index 4463375..30d45d6 100644
--- a/Core/Inc/main.h
+++ b/Core/Inc/main.h
@@ -50,6 +50,8 @@ extern "C" {
/* USER CODE END EM */
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
diff --git a/Core/Inc/stm32f1xx_it.h b/Core/Inc/stm32f1xx_it.h
index 8a2b013..8ad985c 100644
--- a/Core/Inc/stm32f1xx_it.h
+++ b/Core/Inc/stm32f1xx_it.h
@@ -56,6 +56,7 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
+void TIM4_IRQHandler(void);
void TIM6_IRQHandler(void);
/* USER CODE BEGIN EFP */
diff --git a/Core/Src/main.c b/Core/Src/main.c
index 3f9dcca..63457c6 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -44,6 +44,7 @@ I2C_HandleTypeDef hi2c2;
SPI_HandleTypeDef hspi1;
+TIM_HandleTypeDef htim4;
TIM_HandleTypeDef htim6;
SRAM_HandleTypeDef hsram1;
@@ -59,6 +60,7 @@ static void MX_FSMC_Init(void);
static void MX_I2C2_Init(void);
static void MX_TIM6_Init(void);
static void MX_SPI1_Init(void);
+static void MX_TIM4_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@@ -106,6 +108,7 @@ int main(void)
MX_I2C2_Init();
MX_TIM6_Init();
MX_SPI1_Init();
+ MX_TIM4_Init();
/* USER CODE BEGIN 2 */
main_app();
/* USER CODE END 2 */
@@ -231,6 +234,65 @@ static void MX_SPI1_Init(void)
}
+/**
+ * @brief TIM4 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_TIM4_Init(void)
+{
+
+ /* USER CODE BEGIN TIM4_Init 0 */
+
+ /* USER CODE END TIM4_Init 0 */
+
+ TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ TIM_MasterConfigTypeDef sMasterConfig = {0};
+ TIM_OC_InitTypeDef sConfigOC = {0};
+
+ /* USER CODE BEGIN TIM4_Init 1 */
+
+ /* USER CODE END TIM4_Init 1 */
+ htim4.Instance = TIM4;
+ htim4.Init.Prescaler = 0;
+ htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
+ htim4.Init.Period = 65535;
+ htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+ sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ sConfigOC.OCMode = TIM_OCMODE_PWM1;
+ sConfigOC.Pulse = 0;
+ sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN TIM4_Init 2 */
+
+ /* USER CODE END TIM4_Init 2 */
+ HAL_TIM_MspPostInit(&htim4);
+
+}
+
/**
* @brief TIM6 Initialization Function
* @param None
diff --git a/Core/Src/stm32f1xx_hal_msp.c b/Core/Src/stm32f1xx_hal_msp.c
index f0560bc..2453318 100644
--- a/Core/Src/stm32f1xx_hal_msp.c
+++ b/Core/Src/stm32f1xx_hal_msp.c
@@ -58,7 +58,9 @@
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
-/**
+
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
+ /**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
@@ -224,7 +226,21 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
- if(htim_base->Instance==TIM6)
+ if(htim_base->Instance==TIM4)
+ {
+ /* USER CODE BEGIN TIM4_MspInit 0 */
+
+ /* USER CODE END TIM4_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_TIM4_CLK_ENABLE();
+ /* TIM4 interrupt Init */
+ HAL_NVIC_SetPriority(TIM4_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(TIM4_IRQn);
+ /* USER CODE BEGIN TIM4_MspInit 1 */
+
+ /* USER CODE END TIM4_MspInit 1 */
+ }
+ else if(htim_base->Instance==TIM6)
{
/* USER CODE BEGIN TIM6_MspInit 0 */
@@ -241,6 +257,30 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
}
+void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ if(htim->Instance==TIM4)
+ {
+ /* USER CODE BEGIN TIM4_MspPostInit 0 */
+
+ /* USER CODE END TIM4_MspPostInit 0 */
+
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ /**TIM4 GPIO Configuration
+ PB8 ------> TIM4_CH3
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_8;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN TIM4_MspPostInit 1 */
+
+ /* USER CODE END TIM4_MspPostInit 1 */
+ }
+
+}
/**
* @brief TIM_Base MSP De-Initialization
* This function freeze the hardware resources used in this example
@@ -249,7 +289,21 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
*/
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
{
- if(htim_base->Instance==TIM6)
+ if(htim_base->Instance==TIM4)
+ {
+ /* USER CODE BEGIN TIM4_MspDeInit 0 */
+
+ /* USER CODE END TIM4_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_TIM4_CLK_DISABLE();
+
+ /* TIM4 interrupt DeInit */
+ HAL_NVIC_DisableIRQ(TIM4_IRQn);
+ /* USER CODE BEGIN TIM4_MspDeInit 1 */
+
+ /* USER CODE END TIM4_MspDeInit 1 */
+ }
+ else if(htim_base->Instance==TIM6)
{
/* USER CODE BEGIN TIM6_MspDeInit 0 */
diff --git a/Core/Src/stm32f1xx_it.c b/Core/Src/stm32f1xx_it.c
index 20ee0c9..79aed6d 100644
--- a/Core/Src/stm32f1xx_it.c
+++ b/Core/Src/stm32f1xx_it.c
@@ -56,6 +56,7 @@
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
+extern TIM_HandleTypeDef htim4;
extern TIM_HandleTypeDef htim6;
/* USER CODE BEGIN EV */
@@ -199,6 +200,20 @@ void SysTick_Handler(void)
/* please refer to the startup file (startup_stm32f1xx.s). */
/******************************************************************************/
+/**
+ * @brief This function handles TIM4 global interrupt.
+ */
+void TIM4_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM4_IRQn 0 */
+
+ /* USER CODE END TIM4_IRQn 0 */
+ HAL_TIM_IRQHandler(&htim4);
+ /* USER CODE BEGIN TIM4_IRQn 1 */
+
+ /* USER CODE END TIM4_IRQn 1 */
+}
+
/**
* @brief This function handles TIM6 global interrupt.
*/
diff --git a/Debug/Core/Src/main.su b/Debug/Core/Src/main.su
index 99190a4..aa72ce4 100644
--- a/Debug/Core/Src/main.su
+++ b/Debug/Core/Src/main.su
@@ -1,10 +1,11 @@
core_cm3.h:1876:26:ITM_SendChar 16 static,ignoring_inline_asm
-main.c:68:5:_write 32 static
-main.c:81:5:main 8 static
-main.c:128:6:SystemClock_Config 72 static
-main.c:167:13:MX_I2C2_Init 8 static
-main.c:201:13:MX_SPI1_Init 8 static
-main.c:239:13:MX_TIM6_Init 16 static
-main.c:277:13:MX_GPIO_Init 48 static
-main.c:369:13:MX_FSMC_Init 40 static
-main.c:433:6:Error_Handler 4 static,ignoring_inline_asm
+main.c:70:5:_write 32 static
+main.c:83:5:main 8 static
+main.c:131:6:SystemClock_Config 72 static
+main.c:170:13:MX_I2C2_Init 8 static
+main.c:204:13:MX_SPI1_Init 8 static
+main.c:242:13:MX_TIM4_Init 64 static
+main.c:301:13:MX_TIM6_Init 16 static
+main.c:339:13:MX_GPIO_Init 48 static
+main.c:431:13:MX_FSMC_Init 40 static
+main.c:495:6:Error_Handler 4 static,ignoring_inline_asm
diff --git a/Debug/Core/Src/stm32f1xx_hal_msp.su b/Debug/Core/Src/stm32f1xx_hal_msp.su
index 0eb5ac6..c7ee74f 100644
--- a/Debug/Core/Src/stm32f1xx_hal_msp.su
+++ b/Debug/Core/Src/stm32f1xx_hal_msp.su
@@ -1,11 +1,12 @@
-stm32f1xx_hal_msp.c:64:6:HAL_MspInit 24 static
-stm32f1xx_hal_msp.c:90:6:HAL_I2C_MspInit 40 static
-stm32f1xx_hal_msp.c:124:6:HAL_I2C_MspDeInit 16 static
-stm32f1xx_hal_msp.c:155:6:HAL_SPI_MspInit 40 static
-stm32f1xx_hal_msp.c:195:6:HAL_SPI_MspDeInit 16 static
-stm32f1xx_hal_msp.c:225:6:HAL_TIM_Base_MspInit 24 static
-stm32f1xx_hal_msp.c:250:6:HAL_TIM_Base_MspDeInit 16 static
-stm32f1xx_hal_msp.c:271:13:HAL_FSMC_MspInit 32 static
-stm32f1xx_hal_msp.c:330:6:HAL_SRAM_MspInit 16 static
-stm32f1xx_hal_msp.c:342:13:HAL_FSMC_MspDeInit 8 static
-stm32f1xx_hal_msp.c:390:6:HAL_SRAM_MspDeInit 16 static
+stm32f1xx_hal_msp.c:66:6:HAL_MspInit 24 static
+stm32f1xx_hal_msp.c:92:6:HAL_I2C_MspInit 40 static
+stm32f1xx_hal_msp.c:126:6:HAL_I2C_MspDeInit 16 static
+stm32f1xx_hal_msp.c:157:6:HAL_SPI_MspInit 40 static
+stm32f1xx_hal_msp.c:197:6:HAL_SPI_MspDeInit 16 static
+stm32f1xx_hal_msp.c:227:6:HAL_TIM_Base_MspInit 24 static
+stm32f1xx_hal_msp.c:260:6:HAL_TIM_MspPostInit 40 static
+stm32f1xx_hal_msp.c:290:6:HAL_TIM_Base_MspDeInit 16 static
+stm32f1xx_hal_msp.c:325:13:HAL_FSMC_MspInit 32 static
+stm32f1xx_hal_msp.c:384:6:HAL_SRAM_MspInit 16 static
+stm32f1xx_hal_msp.c:396:13:HAL_FSMC_MspDeInit 8 static
+stm32f1xx_hal_msp.c:444:6:HAL_SRAM_MspDeInit 16 static
diff --git a/Debug/Core/Src/stm32f1xx_it.su b/Debug/Core/Src/stm32f1xx_it.su
index af59de8..afe1c19 100644
--- a/Debug/Core/Src/stm32f1xx_it.su
+++ b/Debug/Core/Src/stm32f1xx_it.su
@@ -1,10 +1,11 @@
-stm32f1xx_it.c:70:6:NMI_Handler 4 static
-stm32f1xx_it.c:85:6:HardFault_Handler 4 static
-stm32f1xx_it.c:100:6:MemManage_Handler 4 static
-stm32f1xx_it.c:115:6:BusFault_Handler 4 static
-stm32f1xx_it.c:130:6:UsageFault_Handler 4 static
-stm32f1xx_it.c:145:6:SVC_Handler 4 static
-stm32f1xx_it.c:158:6:DebugMon_Handler 4 static
-stm32f1xx_it.c:171:6:PendSV_Handler 4 static
-stm32f1xx_it.c:184:6:SysTick_Handler 8 static
-stm32f1xx_it.c:205:6:TIM6_IRQHandler 8 static
+stm32f1xx_it.c:71:6:NMI_Handler 4 static
+stm32f1xx_it.c:86:6:HardFault_Handler 4 static
+stm32f1xx_it.c:101:6:MemManage_Handler 4 static
+stm32f1xx_it.c:116:6:BusFault_Handler 4 static
+stm32f1xx_it.c:131:6:UsageFault_Handler 4 static
+stm32f1xx_it.c:146:6:SVC_Handler 4 static
+stm32f1xx_it.c:159:6:DebugMon_Handler 4 static
+stm32f1xx_it.c:172:6:PendSV_Handler 4 static
+stm32f1xx_it.c:185:6:SysTick_Handler 8 static
+stm32f1xx_it.c:206:6:TIM4_IRQHandler 8 static
+stm32f1xx_it.c:220:6:TIM6_IRQHandler 8 static
diff --git a/Debug/Core/Src/subdir.mk b/Debug/Core/Src/subdir.mk
index d12825b..6022ed5 100644
--- a/Debug/Core/Src/subdir.mk
+++ b/Debug/Core/Src/subdir.mk
@@ -31,7 +31,7 @@ C_DEPS += \
# Each subdirectory must supply rules for building sources it contributes
Core/Src/%.o: ../Core/Src/%.c Core/Src/subdir.mk
- arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/Desktop/M3s_stm32/SW_APPs" -I"C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices" -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/Desktop/M3s_stm32/SW_APPs" -I"C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices" -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
clean: clean-Core-2f-Src
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk
index af7b13a..939b77b 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk
@@ -64,7 +64,7 @@ C_DEPS += \
# Each subdirectory must supply rules for building sources it contributes
Drivers/STM32F1xx_HAL_Driver/Src/%.o: ../Drivers/STM32F1xx_HAL_Driver/Src/%.c Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk
- arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/Desktop/M3s_stm32/SW_APPs" -I"C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices" -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/Desktop/M3s_stm32/SW_APPs" -I"C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices" -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
clean: clean-Drivers-2f-STM32F1xx_HAL_Driver-2f-Src
diff --git a/Debug/HW_Devices/buzzer.d b/Debug/HW_Devices/buzzer.d
new file mode 100644
index 0000000..01e9e99
--- /dev/null
+++ b/Debug/HW_Devices/buzzer.d
@@ -0,0 +1,89 @@
+HW_Devices/buzzer.o: ../HW_Devices/buzzer.c ../HW_Devices/buzzer.h \
+ ../Core/Inc/main.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
+ ../Core/Inc/stm32f1xx_hal_conf.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
+ ../Drivers/CMSIS/Include/core_cm3.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
+ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
+
+../HW_Devices/buzzer.h:
+
+../Core/Inc/main.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
+
+../Core/Inc/stm32f1xx_hal_conf.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
+
+../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
+
+../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
+
+../Drivers/CMSIS/Include/core_cm3.h:
+
+../Drivers/CMSIS/Include/cmsis_version.h:
+
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+
+../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
+
+../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/HW_Devices/buzzer.su b/Debug/HW_Devices/buzzer.su
new file mode 100644
index 0000000..bf7ee87
--- /dev/null
+++ b/Debug/HW_Devices/buzzer.su
@@ -0,0 +1,4 @@
+buzzer.c:13:6:play_ones 24 static
+buzzer.c:21:6:add_a_note 24 static
+buzzer.c:49:6:delhead 16 static
+buzzer.c:74:6:buzzer_play_server 8 static
diff --git a/Debug/HW_Devices/subdir.mk b/Debug/HW_Devices/subdir.mk
index e377082..3c1ad56 100644
--- a/Debug/HW_Devices/subdir.mk
+++ b/Debug/HW_Devices/subdir.mk
@@ -6,6 +6,7 @@
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../HW_Devices/LCD.c \
+../HW_Devices/buzzer.c \
../HW_Devices/eeprom.c \
../HW_Devices/iic.c \
../HW_Devices/key.c \
@@ -14,6 +15,7 @@ C_SRCS += \
OBJS += \
./HW_Devices/LCD.o \
+./HW_Devices/buzzer.o \
./HW_Devices/eeprom.o \
./HW_Devices/iic.o \
./HW_Devices/key.o \
@@ -22,6 +24,7 @@ OBJS += \
C_DEPS += \
./HW_Devices/LCD.d \
+./HW_Devices/buzzer.d \
./HW_Devices/eeprom.d \
./HW_Devices/iic.d \
./HW_Devices/key.d \
@@ -31,12 +34,12 @@ C_DEPS += \
# Each subdirectory must supply rules for building sources it contributes
HW_Devices/%.o: ../HW_Devices/%.c HW_Devices/subdir.mk
- arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/Desktop/M3s_stm32/SW_APPs" -I"C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices" -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/Desktop/M3s_stm32/SW_APPs" -I"C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices" -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
clean: clean-HW_Devices
clean-HW_Devices:
- -$(RM) ./HW_Devices/LCD.d ./HW_Devices/LCD.o ./HW_Devices/eeprom.d ./HW_Devices/eeprom.o ./HW_Devices/iic.d ./HW_Devices/iic.o ./HW_Devices/key.d ./HW_Devices/key.o ./HW_Devices/rs522.d ./HW_Devices/rs522.o ./HW_Devices/touch.d ./HW_Devices/touch.o
+ -$(RM) ./HW_Devices/LCD.d ./HW_Devices/LCD.o ./HW_Devices/buzzer.d ./HW_Devices/buzzer.o ./HW_Devices/eeprom.d ./HW_Devices/eeprom.o ./HW_Devices/iic.d ./HW_Devices/iic.o ./HW_Devices/key.d ./HW_Devices/key.o ./HW_Devices/rs522.d ./HW_Devices/rs522.o ./HW_Devices/touch.d ./HW_Devices/touch.o
.PHONY: clean-HW_Devices
diff --git a/Debug/SW_APPs/APP_morsecode.su b/Debug/SW_APPs/APP_morsecode.su
index 3cc6505..e6bda3d 100644
--- a/Debug/SW_APPs/APP_morsecode.su
+++ b/Debug/SW_APPs/APP_morsecode.su
@@ -1,3 +1,3 @@
APP_morsecode.c:140:6:APP_morsecode_init 24 static
-APP_morsecode.c:151:6:getmorsecode 24 static
-APP_morsecode.c:164:6:APP_morsecode_loop 40 static
+APP_morsecode.c:153:6:getmorsecode 24 static
+APP_morsecode.c:168:6:APP_morsecode_loop 56 static
diff --git a/Debug/SW_APPs/Main_APP.d b/Debug/SW_APPs/Main_APP.d
index e882a16..bde06bd 100644
--- a/Debug/SW_APPs/Main_APP.d
+++ b/Debug/SW_APPs/Main_APP.d
@@ -31,7 +31,8 @@ SW_APPs/Main_APP.o: ../SW_APPs/Main_APP.c ../SW_APPs/Main_APP.h \
../SW_APPs/windows.h C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/lcd.h \
C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/touch.h \
C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/eeprom.h \
- C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/key.h
+ C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/key.h \
+ C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/buzzer.h
../SW_APPs/Main_APP.h:
@@ -104,3 +105,5 @@ C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/touch.h:
C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/eeprom.h:
C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/key.h:
+
+C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/buzzer.h:
diff --git a/Debug/SW_APPs/Main_APP.su b/Debug/SW_APPs/Main_APP.su
index b07367f..f7680af 100644
--- a/Debug/SW_APPs/Main_APP.su
+++ b/Debug/SW_APPs/Main_APP.su
@@ -1 +1 @@
-Main_APP.c:21:6:main_app 96 static
+Main_APP.c:23:6:main_app 96 static
diff --git a/Debug/SW_APPs/subdir.mk b/Debug/SW_APPs/subdir.mk
index d313fd1..aaf3b7c 100644
--- a/Debug/SW_APPs/subdir.mk
+++ b/Debug/SW_APPs/subdir.mk
@@ -28,7 +28,7 @@ C_DEPS += \
# Each subdirectory must supply rules for building sources it contributes
SW_APPs/%.o: ../SW_APPs/%.c SW_APPs/subdir.mk
- arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/Desktop/M3s_stm32/SW_APPs" -I"C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices" -I../Drivers/STM32F1xx_HAL_Driver/Inc -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/Desktop/M3s_stm32/SW_APPs" -I"C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices" -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
clean: clean-SW_APPs
diff --git a/Debug/m3s.bin b/Debug/m3s.bin
index 5c78341..4dcb6f0 100755
Binary files a/Debug/m3s.bin and b/Debug/m3s.bin differ
diff --git a/Debug/m3s.list b/Debug/m3s.list
index edbdb57..57e3aaa 100644
--- a/Debug/m3s.list
+++ b/Debug/m3s.list
@@ -5,45 +5,45 @@ Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000001e4 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 1 .text 000096b0 080001e8 080001e8 000101e8 2**3
+ 1 .text 0000a598 080001e8 080001e8 000101e8 2**3
CONTENTS, ALLOC, LOAD, READONLY, CODE
- 2 .rodata 00000f9c 08009898 08009898 00019898 2**3
+ 2 .rodata 00000fbc 0800a780 0800a780 0001a780 2**3
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 3 .ARM.extab 00000000 0800a834 0800a834 000201dc 2**0
+ 3 .ARM.extab 00000000 0800b73c 0800b73c 000201dc 2**0
CONTENTS
- 4 .ARM 00000000 0800a834 0800a834 000201dc 2**0
+ 4 .ARM 00000000 0800b73c 0800b73c 000201dc 2**0
CONTENTS
- 5 .preinit_array 00000000 0800a834 0800a834 000201dc 2**0
+ 5 .preinit_array 00000000 0800b73c 0800b73c 000201dc 2**0
CONTENTS, ALLOC, LOAD, DATA
- 6 .init_array 00000004 0800a834 0800a834 0001a834 2**2
+ 6 .init_array 00000004 0800b73c 0800b73c 0001b73c 2**2
CONTENTS, ALLOC, LOAD, DATA
- 7 .fini_array 00000004 0800a838 0800a838 0001a838 2**2
+ 7 .fini_array 00000004 0800b740 0800b740 0001b740 2**2
CONTENTS, ALLOC, LOAD, DATA
- 8 .data 000001dc 20000000 0800a83c 00020000 2**2
+ 8 .data 000001dc 20000000 0800b744 00020000 2**2
CONTENTS, ALLOC, LOAD, DATA
- 9 .bss 000023b4 200001dc 0800aa18 000201dc 2**2
+ 9 .bss 00002408 200001dc 0800b920 000201dc 2**2
ALLOC
- 10 ._user_heap_stack 00000c00 20002590 0800aa18 00022590 2**0
+ 10 ._user_heap_stack 00000c04 200025e4 0800b920 000225e4 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 000201dc 2**0
CONTENTS, READONLY
- 12 .debug_info 0001b34c 00000000 00000000 00020205 2**0
+ 12 .debug_info 0001c88d 00000000 00000000 00020205 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 13 .debug_abbrev 00003d0f 00000000 00000000 0003b551 2**0
+ 13 .debug_abbrev 00003fcd 00000000 00000000 0003ca92 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_aranges 00001320 00000000 00000000 0003f260 2**3
+ 14 .debug_aranges 00001370 00000000 00000000 00040a60 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_ranges 000011f8 00000000 00000000 00040580 2**3
+ 15 .debug_ranges 00001238 00000000 00000000 00041dd0 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .debug_macro 0001e07b 00000000 00000000 00041778 2**0
+ 16 .debug_macro 0001e3c4 00000000 00000000 00043008 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 17 .debug_line 00018c59 00000000 00000000 0005f7f3 2**0
+ 17 .debug_line 000197a7 00000000 00000000 000613cc 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_str 000a0a1e 00000000 00000000 0007844c 2**0
+ 18 .debug_str 000a0ae2 00000000 00000000 0007ab73 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .comment 00000053 00000000 00000000 00118e6a 2**0
+ 19 .comment 00000053 00000000 00000000 0011b655 2**0
CONTENTS, READONLY
- 20 .debug_frame 000061c0 00000000 00000000 00118ec0 2**2
+ 20 .debug_frame 000062e4 00000000 00000000 0011b6a8 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
@@ -62,7 +62,7 @@ Disassembly of section .text:
80001fe: bd10 pop {r4, pc}
8000200: 200001dc .word 0x200001dc
8000204: 00000000 .word 0x00000000
- 8000208: 08009880 .word 0x08009880
+ 8000208: 0800a768 .word 0x0800a768
0800020c :
800020c: b508 push {r3, lr}
@@ -74,7 +74,7 @@ Disassembly of section .text:
800021a: bd08 pop {r3, pc}
800021c: 00000000 .word 0x00000000
8000220: 200001e0 .word 0x200001e0
- 8000224: 08009880 .word 0x08009880
+ 8000224: 0800a768 .word 0x0800a768
08000228 :
8000228: 4603 mov r3, r0
@@ -1365,19969 +1365,22569 @@ Disassembly of section .text:
8001102: f04f 0000 mov.w r0, #0
8001106: 4770 bx lr
-08001108 :
+08001108 <__aeabi_f2uiz>:
+ 8001108: 0042 lsls r2, r0, #1
+ 800110a: d20e bcs.n 800112a <__aeabi_f2uiz+0x22>
+ 800110c: f1b2 4ffe cmp.w r2, #2130706432 ; 0x7f000000
+ 8001110: d30b bcc.n 800112a <__aeabi_f2uiz+0x22>
+ 8001112: f04f 039e mov.w r3, #158 ; 0x9e
+ 8001116: ebb3 6212 subs.w r2, r3, r2, lsr #24
+ 800111a: d409 bmi.n 8001130 <__aeabi_f2uiz+0x28>
+ 800111c: ea4f 2300 mov.w r3, r0, lsl #8
+ 8001120: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
+ 8001124: fa23 f002 lsr.w r0, r3, r2
+ 8001128: 4770 bx lr
+ 800112a: f04f 0000 mov.w r0, #0
+ 800112e: 4770 bx lr
+ 8001130: f112 0f61 cmn.w r2, #97 ; 0x61
+ 8001134: d101 bne.n 800113a <__aeabi_f2uiz+0x32>
+ 8001136: 0242 lsls r2, r0, #9
+ 8001138: d102 bne.n 8001140 <__aeabi_f2uiz+0x38>
+ 800113a: f04f 30ff mov.w r0, #4294967295
+ 800113e: 4770 bx lr
+ 8001140: f04f 0000 mov.w r0, #0
+ 8001144: 4770 bx lr
+ 8001146: bf00 nop
+
+08001148 :
\li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
\param [in] ch Character to transmit.
\returns Character to transmit.
*/
__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
{
- 8001108: b480 push {r7}
- 800110a: b083 sub sp, #12
- 800110c: af00 add r7, sp, #0
- 800110e: 6078 str r0, [r7, #4]
+ 8001148: b480 push {r7}
+ 800114a: b083 sub sp, #12
+ 800114c: af00 add r7, sp, #0
+ 800114e: 6078 str r0, [r7, #4]
if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
- 8001110: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000
- 8001114: f8d3 3e80 ldr.w r3, [r3, #3712] ; 0xe80
- 8001118: f003 0301 and.w r3, r3, #1
- 800111c: 2b00 cmp r3, #0
- 800111e: d013 beq.n 8001148
+ 8001150: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000
+ 8001154: f8d3 3e80 ldr.w r3, [r3, #3712] ; 0xe80
+ 8001158: f003 0301 and.w r3, r3, #1
+ 800115c: 2b00 cmp r3, #0
+ 800115e: d013 beq.n 8001188
((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
- 8001120: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000
- 8001124: f8d3 3e00 ldr.w r3, [r3, #3584] ; 0xe00
- 8001128: f003 0301 and.w r3, r3, #1
+ 8001160: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000
+ 8001164: f8d3 3e00 ldr.w r3, [r3, #3584] ; 0xe00
+ 8001168: f003 0301 and.w r3, r3, #1
if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
- 800112c: 2b00 cmp r3, #0
- 800112e: d00b beq.n 8001148
+ 800116c: 2b00 cmp r3, #0
+ 800116e: d00b beq.n 8001188
{
while (ITM->PORT[0U].u32 == 0UL)
- 8001130: e000 b.n 8001134
+ 8001170: e000 b.n 8001174
{
__NOP();
- 8001132: bf00 nop
+ 8001172: bf00 nop
while (ITM->PORT[0U].u32 == 0UL)
- 8001134: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000
- 8001138: 681b ldr r3, [r3, #0]
- 800113a: 2b00 cmp r3, #0
- 800113c: d0f9 beq.n 8001132
+ 8001174: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000
+ 8001178: 681b ldr r3, [r3, #0]
+ 800117a: 2b00 cmp r3, #0
+ 800117c: d0f9 beq.n 8001172
}
ITM->PORT[0U].u8 = (uint8_t)ch;
- 800113e: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000
- 8001142: 687a ldr r2, [r7, #4]
- 8001144: b2d2 uxtb r2, r2
- 8001146: 701a strb r2, [r3, #0]
+ 800117e: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000
+ 8001182: 687a ldr r2, [r7, #4]
+ 8001184: b2d2 uxtb r2, r2
+ 8001186: 701a strb r2, [r3, #0]
}
return (ch);
- 8001148: 687b ldr r3, [r7, #4]
+ 8001188: 687b ldr r3, [r7, #4]
}
- 800114a: 4618 mov r0, r3
- 800114c: 370c adds r7, #12
- 800114e: 46bd mov sp, r7
- 8001150: bc80 pop {r7}
- 8001152: 4770 bx lr
+ 800118a: 4618 mov r0, r3
+ 800118c: 370c adds r7, #12
+ 800118e: 46bd mov sp, r7
+ 8001190: bc80 pop {r7}
+ 8001192: 4770 bx lr
-08001154 <_write>:
+08001194 <_write>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
int _write(int file , char *ptr,int len)
{
- 8001154: b580 push {r7, lr}
- 8001156: b086 sub sp, #24
- 8001158: af00 add r7, sp, #0
- 800115a: 60f8 str r0, [r7, #12]
- 800115c: 60b9 str r1, [r7, #8]
- 800115e: 607a str r2, [r7, #4]
+ 8001194: b580 push {r7, lr}
+ 8001196: b086 sub sp, #24
+ 8001198: af00 add r7, sp, #0
+ 800119a: 60f8 str r0, [r7, #12]
+ 800119c: 60b9 str r1, [r7, #8]
+ 800119e: 607a str r2, [r7, #4]
int i = 0;
- 8001160: 2300 movs r3, #0
- 8001162: 617b str r3, [r7, #20]
+ 80011a0: 2300 movs r3, #0
+ 80011a2: 617b str r3, [r7, #20]
for(i = 0;i
+ 80011a4: 2300 movs r3, #0
+ 80011a6: 617b str r3, [r7, #20]
+ 80011a8: e009 b.n 80011be <_write+0x2a>
ITM_SendChar((*ptr++));
- 800116a: 68bb ldr r3, [r7, #8]
- 800116c: 1c5a adds r2, r3, #1
- 800116e: 60ba str r2, [r7, #8]
- 8001170: 781b ldrb r3, [r3, #0]
- 8001172: 4618 mov r0, r3
- 8001174: f7ff ffc8 bl 8001108
+ 80011aa: 68bb ldr r3, [r7, #8]
+ 80011ac: 1c5a adds r2, r3, #1
+ 80011ae: 60ba str r2, [r7, #8]
+ 80011b0: 781b ldrb r3, [r3, #0]
+ 80011b2: 4618 mov r0, r3
+ 80011b4: f7ff ffc8 bl 8001148
for(i = 0;i
+ 80011b8: 697b ldr r3, [r7, #20]
+ 80011ba: 3301 adds r3, #1
+ 80011bc: 617b str r3, [r7, #20]
+ 80011be: 697a ldr r2, [r7, #20]
+ 80011c0: 687b ldr r3, [r7, #4]
+ 80011c2: 429a cmp r2, r3
+ 80011c4: dbf1 blt.n 80011aa <_write+0x16>
return len;
- 8001186: 687b ldr r3, [r7, #4]
+ 80011c6: 687b ldr r3, [r7, #4]
}
- 8001188: 4618 mov r0, r3
- 800118a: 3718 adds r7, #24
- 800118c: 46bd mov sp, r7
- 800118e: bd80 pop {r7, pc}
+ 80011c8: 4618 mov r0, r3
+ 80011ca: 3718 adds r7, #24
+ 80011cc: 46bd mov sp, r7
+ 80011ce: bd80 pop {r7, pc}
-08001190 :
+080011d0 :
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
- 8001190: b580 push {r7, lr}
- 8001192: af00 add r7, sp, #0
+ 80011d0: b580 push {r7, lr}
+ 80011d2: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
- 8001194: f000 fc98 bl 8001ac8
+ 80011d4: f000 fd6a bl 8001cac
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
- 8001198: f000 f80d bl 80011b6
+ 80011d8: f000 f80f bl 80011fa
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
- 800119c: f000 f8ea bl 8001374
+ 80011dc: f000 f962 bl 80014a4
MX_FSMC_Init();
- 80011a0: f000 f9e6 bl 8001570
+ 80011e0: f000 fa5e bl 80016a0
MX_I2C2_Init();
- 80011a4: f000 f84c bl 8001240
+ 80011e4: f000 f84e bl 8001284
MX_TIM6_Init();
- 80011a8: f000 f8ae bl 8001308
+ 80011e8: f000 f926 bl 8001438
MX_SPI1_Init();
- 80011ac: f000 f876 bl 800129c
+ 80011ec: f000 f878 bl 80012e0
+ MX_TIM4_Init();
+ 80011f0: f000 f8ac bl 800134c
/* USER CODE BEGIN 2 */
main_app();
- 80011b0: f005 f92c bl 800640c
+ 80011f4: f006 f878 bl 80072e8
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
- 80011b4: e7fe b.n 80011b4
+ 80011f8: e7fe b.n 80011f8
-080011b6 :
+080011fa :
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
- 80011b6: b580 push {r7, lr}
- 80011b8: b090 sub sp, #64 ; 0x40
- 80011ba: af00 add r7, sp, #0
+ 80011fa: b580 push {r7, lr}
+ 80011fc: b090 sub sp, #64 ; 0x40
+ 80011fe: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 80011bc: f107 0318 add.w r3, r7, #24
- 80011c0: 2228 movs r2, #40 ; 0x28
- 80011c2: 2100 movs r1, #0
- 80011c4: 4618 mov r0, r3
- 80011c6: f005 fcc1 bl 8006b4c
+ 8001200: f107 0318 add.w r3, r7, #24
+ 8001204: 2228 movs r2, #40 ; 0x28
+ 8001206: 2100 movs r1, #0
+ 8001208: 4618 mov r0, r3
+ 800120a: f006 fc15 bl 8007a38
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 80011ca: 1d3b adds r3, r7, #4
- 80011cc: 2200 movs r2, #0
- 80011ce: 601a str r2, [r3, #0]
- 80011d0: 605a str r2, [r3, #4]
- 80011d2: 609a str r2, [r3, #8]
- 80011d4: 60da str r2, [r3, #12]
- 80011d6: 611a str r2, [r3, #16]
+ 800120e: 1d3b adds r3, r7, #4
+ 8001210: 2200 movs r2, #0
+ 8001212: 601a str r2, [r3, #0]
+ 8001214: 605a str r2, [r3, #4]
+ 8001216: 609a str r2, [r3, #8]
+ 8001218: 60da str r2, [r3, #12]
+ 800121a: 611a str r2, [r3, #16]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
- 80011d8: 2301 movs r3, #1
- 80011da: 61bb str r3, [r7, #24]
+ 800121c: 2301 movs r3, #1
+ 800121e: 61bb str r3, [r7, #24]
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- 80011dc: f44f 3380 mov.w r3, #65536 ; 0x10000
- 80011e0: 61fb str r3, [r7, #28]
+ 8001220: f44f 3380 mov.w r3, #65536 ; 0x10000
+ 8001224: 61fb str r3, [r7, #28]
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
- 80011e2: 2300 movs r3, #0
- 80011e4: 623b str r3, [r7, #32]
+ 8001226: 2300 movs r3, #0
+ 8001228: 623b str r3, [r7, #32]
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
- 80011e6: 2301 movs r3, #1
- 80011e8: 62bb str r3, [r7, #40] ; 0x28
+ 800122a: 2301 movs r3, #1
+ 800122c: 62bb str r3, [r7, #40] ; 0x28
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- 80011ea: 2302 movs r3, #2
- 80011ec: 637b str r3, [r7, #52] ; 0x34
+ 800122e: 2302 movs r3, #2
+ 8001230: 637b str r3, [r7, #52] ; 0x34
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- 80011ee: f44f 3380 mov.w r3, #65536 ; 0x10000
- 80011f2: 63bb str r3, [r7, #56] ; 0x38
+ 8001232: f44f 3380 mov.w r3, #65536 ; 0x10000
+ 8001236: 63bb str r3, [r7, #56] ; 0x38
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
- 80011f4: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
- 80011f8: 63fb str r3, [r7, #60] ; 0x3c
+ 8001238: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
+ 800123c: 63fb str r3, [r7, #60] ; 0x3c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 80011fa: f107 0318 add.w r3, r7, #24
- 80011fe: 4618 mov r0, r3
- 8001200: f001 ffba bl 8003178
- 8001204: 4603 mov r3, r0
- 8001206: 2b00 cmp r3, #0
- 8001208: d001 beq.n 800120e
+ 800123e: f107 0318 add.w r3, r7, #24
+ 8001242: 4618 mov r0, r3
+ 8001244: f002 f88a bl 800335c
+ 8001248: 4603 mov r3, r0
+ 800124a: 2b00 cmp r3, #0
+ 800124c: d001 beq.n 8001252
{
Error_Handler();
- 800120a: f000 fa15 bl 8001638
+ 800124e: f000 fa8b bl 8001768
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- 800120e: 230f movs r3, #15
- 8001210: 607b str r3, [r7, #4]
+ 8001252: 230f movs r3, #15
+ 8001254: 607b str r3, [r7, #4]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- 8001212: 2302 movs r3, #2
- 8001214: 60bb str r3, [r7, #8]
+ 8001256: 2302 movs r3, #2
+ 8001258: 60bb str r3, [r7, #8]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 8001216: 2300 movs r3, #0
- 8001218: 60fb str r3, [r7, #12]
+ 800125a: 2300 movs r3, #0
+ 800125c: 60fb str r3, [r7, #12]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
- 800121a: f44f 6380 mov.w r3, #1024 ; 0x400
- 800121e: 613b str r3, [r7, #16]
+ 800125e: f44f 6380 mov.w r3, #1024 ; 0x400
+ 8001262: 613b str r3, [r7, #16]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
- 8001220: 2300 movs r3, #0
- 8001222: 617b str r3, [r7, #20]
+ 8001264: 2300 movs r3, #0
+ 8001266: 617b str r3, [r7, #20]
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
- 8001224: 1d3b adds r3, r7, #4
- 8001226: 2102 movs r1, #2
- 8001228: 4618 mov r0, r3
- 800122a: f002 fa25 bl 8003678
- 800122e: 4603 mov r3, r0
- 8001230: 2b00 cmp r3, #0
- 8001232: d001 beq.n 8001238
+ 8001268: 1d3b adds r3, r7, #4
+ 800126a: 2102 movs r1, #2
+ 800126c: 4618 mov r0, r3
+ 800126e: f002 faf5 bl 800385c
+ 8001272: 4603 mov r3, r0
+ 8001274: 2b00 cmp r3, #0
+ 8001276: d001 beq.n 800127c
{
Error_Handler();
- 8001234: f000 fa00 bl 8001638
+ 8001278: f000 fa76 bl 8001768
}
}
- 8001238: bf00 nop
- 800123a: 3740 adds r7, #64 ; 0x40
- 800123c: 46bd mov sp, r7
- 800123e: bd80 pop {r7, pc}
+ 800127c: bf00 nop
+ 800127e: 3740 adds r7, #64 ; 0x40
+ 8001280: 46bd mov sp, r7
+ 8001282: bd80 pop {r7, pc}
-08001240 :
+08001284 :
* @brief I2C2 Initialization Function
* @param None
* @retval None
*/
static void MX_I2C2_Init(void)
{
- 8001240: b580 push {r7, lr}
- 8001242: af00 add r7, sp, #0
+ 8001284: b580 push {r7, lr}
+ 8001286: af00 add r7, sp, #0
/* USER CODE END I2C2_Init 0 */
/* USER CODE BEGIN I2C2_Init 1 */
/* USER CODE END I2C2_Init 1 */
hi2c2.Instance = I2C2;
- 8001244: 4b12 ldr r3, [pc, #72] ; (8001290 )
- 8001246: 4a13 ldr r2, [pc, #76] ; (8001294 )
- 8001248: 601a str r2, [r3, #0]
+ 8001288: 4b12 ldr r3, [pc, #72] ; (80012d4 )
+ 800128a: 4a13 ldr r2, [pc, #76] ; (80012d8 )
+ 800128c: 601a str r2, [r3, #0]
hi2c2.Init.ClockSpeed = 100000;
- 800124a: 4b11 ldr r3, [pc, #68] ; (8001290 )
- 800124c: 4a12 ldr r2, [pc, #72] ; (8001298 )
- 800124e: 605a str r2, [r3, #4]
+ 800128e: 4b11 ldr r3, [pc, #68] ; (80012d4 )
+ 8001290: 4a12 ldr r2, [pc, #72] ; (80012dc )
+ 8001292: 605a str r2, [r3, #4]
hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
- 8001250: 4b0f ldr r3, [pc, #60] ; (8001290 )
- 8001252: 2200 movs r2, #0
- 8001254: 609a str r2, [r3, #8]
+ 8001294: 4b0f ldr r3, [pc, #60] ; (80012d4 )
+ 8001296: 2200 movs r2, #0
+ 8001298: 609a str r2, [r3, #8]
hi2c2.Init.OwnAddress1 = 0;
- 8001256: 4b0e ldr r3, [pc, #56] ; (8001290 )
- 8001258: 2200 movs r2, #0
- 800125a: 60da str r2, [r3, #12]
+ 800129a: 4b0e ldr r3, [pc, #56] ; (80012d4 )
+ 800129c: 2200 movs r2, #0
+ 800129e: 60da str r2, [r3, #12]
hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
- 800125c: 4b0c ldr r3, [pc, #48] ; (8001290 )
- 800125e: f44f 4280 mov.w r2, #16384 ; 0x4000
- 8001262: 611a str r2, [r3, #16]
+ 80012a0: 4b0c ldr r3, [pc, #48] ; (80012d4 )
+ 80012a2: f44f 4280 mov.w r2, #16384 ; 0x4000
+ 80012a6: 611a str r2, [r3, #16]
hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
- 8001264: 4b0a ldr r3, [pc, #40] ; (8001290 )
- 8001266: 2200 movs r2, #0
- 8001268: 615a str r2, [r3, #20]
+ 80012a8: 4b0a ldr r3, [pc, #40] ; (80012d4 )
+ 80012aa: 2200 movs r2, #0
+ 80012ac: 615a str r2, [r3, #20]
hi2c2.Init.OwnAddress2 = 0;
- 800126a: 4b09 ldr r3, [pc, #36] ; (8001290 )
- 800126c: 2200 movs r2, #0
- 800126e: 619a str r2, [r3, #24]
+ 80012ae: 4b09 ldr r3, [pc, #36] ; (80012d4 )
+ 80012b0: 2200 movs r2, #0
+ 80012b2: 619a str r2, [r3, #24]
hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
- 8001270: 4b07 ldr r3, [pc, #28] ; (8001290 )
- 8001272: 2200 movs r2, #0
- 8001274: 61da str r2, [r3, #28]
+ 80012b4: 4b07 ldr r3, [pc, #28] ; (80012d4 )
+ 80012b6: 2200 movs r2, #0
+ 80012b8: 61da str r2, [r3, #28]
hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
- 8001276: 4b06 ldr r3, [pc, #24] ; (8001290 )
- 8001278: 2200 movs r2, #0
- 800127a: 621a str r2, [r3, #32]
+ 80012ba: 4b06 ldr r3, [pc, #24] ; (80012d4 )
+ 80012bc: 2200 movs r2, #0
+ 80012be: 621a str r2, [r3, #32]
if (HAL_I2C_Init(&hi2c2) != HAL_OK)
- 800127c: 4804 ldr r0, [pc, #16] ; (8001290 )
- 800127e: f000 ff7b bl 8002178
- 8001282: 4603 mov r3, r0
- 8001284: 2b00 cmp r3, #0
- 8001286: d001 beq.n 800128c
+ 80012c0: 4804 ldr r0, [pc, #16] ; (80012d4 )
+ 80012c2: f001 f84b bl 800235c
+ 80012c6: 4603 mov r3, r0
+ 80012c8: 2b00 cmp r3, #0
+ 80012ca: d001 beq.n 80012d0
{
Error_Handler();
- 8001288: f000 f9d6 bl 8001638
+ 80012cc: f000 fa4c bl 8001768
}
/* USER CODE BEGIN I2C2_Init 2 */
/* USER CODE END I2C2_Init 2 */
}
- 800128c: bf00 nop
- 800128e: bd80 pop {r7, pc}
- 8001290: 20000268 .word 0x20000268
- 8001294: 40005800 .word 0x40005800
- 8001298: 000186a0 .word 0x000186a0
+ 80012d0: bf00 nop
+ 80012d2: bd80 pop {r7, pc}
+ 80012d4: 20000274 .word 0x20000274
+ 80012d8: 40005800 .word 0x40005800
+ 80012dc: 000186a0 .word 0x000186a0
-0800129c :
+080012e0 :
* @brief SPI1 Initialization Function
* @param None
* @retval None
*/
static void MX_SPI1_Init(void)
{
- 800129c: b580 push {r7, lr}
- 800129e: af00 add r7, sp, #0
+ 80012e0: b580 push {r7, lr}
+ 80012e2: af00 add r7, sp, #0
/* USER CODE BEGIN SPI1_Init 1 */
/* USER CODE END SPI1_Init 1 */
/* SPI1 parameter configuration*/
hspi1.Instance = SPI1;
- 80012a0: 4b17 ldr r3, [pc, #92] ; (8001300 )
- 80012a2: 4a18 ldr r2, [pc, #96] ; (8001304 )
- 80012a4: 601a str r2, [r3, #0]
+ 80012e4: 4b17 ldr r3, [pc, #92] ; (8001344 )
+ 80012e6: 4a18 ldr r2, [pc, #96] ; (8001348 )
+ 80012e8: 601a str r2, [r3, #0]
hspi1.Init.Mode = SPI_MODE_MASTER;
- 80012a6: 4b16 ldr r3, [pc, #88] ; (8001300 )
- 80012a8: f44f 7282 mov.w r2, #260 ; 0x104
- 80012ac: 605a str r2, [r3, #4]
+ 80012ea: 4b16 ldr r3, [pc, #88] ; (8001344 )
+ 80012ec: f44f 7282 mov.w r2, #260 ; 0x104
+ 80012f0: 605a str r2, [r3, #4]
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
- 80012ae: 4b14 ldr r3, [pc, #80] ; (8001300 )
- 80012b0: 2200 movs r2, #0
- 80012b2: 609a str r2, [r3, #8]
+ 80012f2: 4b14 ldr r3, [pc, #80] ; (8001344 )
+ 80012f4: 2200 movs r2, #0
+ 80012f6: 609a str r2, [r3, #8]
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
- 80012b4: 4b12 ldr r3, [pc, #72] ; (8001300 )
- 80012b6: 2200 movs r2, #0
- 80012b8: 60da str r2, [r3, #12]
+ 80012f8: 4b12 ldr r3, [pc, #72] ; (8001344 )
+ 80012fa: 2200 movs r2, #0
+ 80012fc: 60da str r2, [r3, #12]
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
- 80012ba: 4b11 ldr r3, [pc, #68] ; (8001300 )
- 80012bc: 2200 movs r2, #0
- 80012be: 611a str r2, [r3, #16]
+ 80012fe: 4b11 ldr r3, [pc, #68] ; (8001344 )
+ 8001300: 2200 movs r2, #0
+ 8001302: 611a str r2, [r3, #16]
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
- 80012c0: 4b0f ldr r3, [pc, #60] ; (8001300 )
- 80012c2: 2200 movs r2, #0
- 80012c4: 615a str r2, [r3, #20]
+ 8001304: 4b0f ldr r3, [pc, #60] ; (8001344 )
+ 8001306: 2200 movs r2, #0
+ 8001308: 615a str r2, [r3, #20]
hspi1.Init.NSS = SPI_NSS_SOFT;
- 80012c6: 4b0e ldr r3, [pc, #56] ; (8001300 )
- 80012c8: f44f 7200 mov.w r2, #512 ; 0x200
- 80012cc: 619a str r2, [r3, #24]
+ 800130a: 4b0e ldr r3, [pc, #56] ; (8001344 )
+ 800130c: f44f 7200 mov.w r2, #512 ; 0x200
+ 8001310: 619a str r2, [r3, #24]
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
- 80012ce: 4b0c ldr r3, [pc, #48] ; (8001300 )
- 80012d0: 2208 movs r2, #8
- 80012d2: 61da str r2, [r3, #28]
+ 8001312: 4b0c ldr r3, [pc, #48] ; (8001344 )
+ 8001314: 2208 movs r2, #8
+ 8001316: 61da str r2, [r3, #28]
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
- 80012d4: 4b0a ldr r3, [pc, #40] ; (8001300 )
- 80012d6: 2200 movs r2, #0
- 80012d8: 621a str r2, [r3, #32]
+ 8001318: 4b0a ldr r3, [pc, #40] ; (8001344 )
+ 800131a: 2200 movs r2, #0
+ 800131c: 621a str r2, [r3, #32]
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
- 80012da: 4b09 ldr r3, [pc, #36] ; (8001300 )
- 80012dc: 2200 movs r2, #0
- 80012de: 625a str r2, [r3, #36] ; 0x24
+ 800131e: 4b09 ldr r3, [pc, #36] ; (8001344 )
+ 8001320: 2200 movs r2, #0
+ 8001322: 625a str r2, [r3, #36] ; 0x24
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
- 80012e0: 4b07 ldr r3, [pc, #28] ; (8001300 )
- 80012e2: 2200 movs r2, #0
- 80012e4: 629a str r2, [r3, #40] ; 0x28
+ 8001324: 4b07 ldr r3, [pc, #28] ; (8001344 )
+ 8001326: 2200 movs r2, #0
+ 8001328: 629a str r2, [r3, #40] ; 0x28
hspi1.Init.CRCPolynomial = 10;
- 80012e6: 4b06 ldr r3, [pc, #24] ; (8001300 )
- 80012e8: 220a movs r2, #10
- 80012ea: 62da str r2, [r3, #44] ; 0x2c
+ 800132a: 4b06 ldr r3, [pc, #24] ; (8001344 )
+ 800132c: 220a movs r2, #10
+ 800132e: 62da str r2, [r3, #44] ; 0x2c
if (HAL_SPI_Init(&hspi1) != HAL_OK)
- 80012ec: 4804 ldr r0, [pc, #16] ; (8001300 )
- 80012ee: f002 fb49 bl 8003984
- 80012f2: 4603 mov r3, r0
- 80012f4: 2b00 cmp r3, #0
- 80012f6: d001 beq.n 80012fc
+ 8001330: 4804 ldr r0, [pc, #16] ; (8001344 )
+ 8001332: f002 fc19 bl 8003b68
+ 8001336: 4603 mov r3, r0
+ 8001338: 2b00 cmp r3, #0
+ 800133a: d001 beq.n 8001340
{
Error_Handler();
- 80012f8: f000 f99e bl 8001638
+ 800133c: f000 fa14 bl 8001768
}
/* USER CODE BEGIN SPI1_Init 2 */
/* USER CODE END SPI1_Init 2 */
}
- 80012fc: bf00 nop
- 80012fe: bd80 pop {r7, pc}
- 8001300: 2000034c .word 0x2000034c
- 8001304: 40013000 .word 0x40013000
+ 8001340: bf00 nop
+ 8001342: bd80 pop {r7, pc}
+ 8001344: 20000358 .word 0x20000358
+ 8001348: 40013000 .word 0x40013000
-08001308 :
+0800134c :
+ * @brief TIM4 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_TIM4_Init(void)
+{
+ 800134c: b580 push {r7, lr}
+ 800134e: b08e sub sp, #56 ; 0x38
+ 8001350: af00 add r7, sp, #0
+
+ /* USER CODE BEGIN TIM4_Init 0 */
+
+ /* USER CODE END TIM4_Init 0 */
+
+ TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ 8001352: f107 0328 add.w r3, r7, #40 ; 0x28
+ 8001356: 2200 movs r2, #0
+ 8001358: 601a str r2, [r3, #0]
+ 800135a: 605a str r2, [r3, #4]
+ 800135c: 609a str r2, [r3, #8]
+ 800135e: 60da str r2, [r3, #12]
+ TIM_MasterConfigTypeDef sMasterConfig = {0};
+ 8001360: f107 0320 add.w r3, r7, #32
+ 8001364: 2200 movs r2, #0
+ 8001366: 601a str r2, [r3, #0]
+ 8001368: 605a str r2, [r3, #4]
+ TIM_OC_InitTypeDef sConfigOC = {0};
+ 800136a: 1d3b adds r3, r7, #4
+ 800136c: 2200 movs r2, #0
+ 800136e: 601a str r2, [r3, #0]
+ 8001370: 605a str r2, [r3, #4]
+ 8001372: 609a str r2, [r3, #8]
+ 8001374: 60da str r2, [r3, #12]
+ 8001376: 611a str r2, [r3, #16]
+ 8001378: 615a str r2, [r3, #20]
+ 800137a: 619a str r2, [r3, #24]
+
+ /* USER CODE BEGIN TIM4_Init 1 */
+
+ /* USER CODE END TIM4_Init 1 */
+ htim4.Instance = TIM4;
+ 800137c: 4b2c ldr r3, [pc, #176] ; (8001430 )
+ 800137e: 4a2d ldr r2, [pc, #180] ; (8001434 )
+ 8001380: 601a str r2, [r3, #0]
+ htim4.Init.Prescaler = 0;
+ 8001382: 4b2b ldr r3, [pc, #172] ; (8001430 )
+ 8001384: 2200 movs r2, #0
+ 8001386: 605a str r2, [r3, #4]
+ htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 8001388: 4b29 ldr r3, [pc, #164] ; (8001430 )
+ 800138a: 2200 movs r2, #0
+ 800138c: 609a str r2, [r3, #8]
+ htim4.Init.Period = 65535;
+ 800138e: 4b28 ldr r3, [pc, #160] ; (8001430 )
+ 8001390: f64f 72ff movw r2, #65535 ; 0xffff
+ 8001394: 60da str r2, [r3, #12]
+ htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 8001396: 4b26 ldr r3, [pc, #152] ; (8001430 )
+ 8001398: 2200 movs r2, #0
+ 800139a: 611a str r2, [r3, #16]
+ htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 800139c: 4b24 ldr r3, [pc, #144] ; (8001430 )
+ 800139e: 2200 movs r2, #0
+ 80013a0: 619a str r2, [r3, #24]
+ if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
+ 80013a2: 4823 ldr r0, [pc, #140] ; (8001430 )
+ 80013a4: f002 fcb1 bl 8003d0a
+ 80013a8: 4603 mov r3, r0
+ 80013aa: 2b00 cmp r3, #0
+ 80013ac: d001 beq.n 80013b2
+ {
+ Error_Handler();
+ 80013ae: f000 f9db bl 8001768
+ }
+ sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ 80013b2: f44f 5380 mov.w r3, #4096 ; 0x1000
+ 80013b6: 62bb str r3, [r7, #40] ; 0x28
+ if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
+ 80013b8: f107 0328 add.w r3, r7, #40 ; 0x28
+ 80013bc: 4619 mov r1, r3
+ 80013be: 481c ldr r0, [pc, #112] ; (8001430 )
+ 80013c0: f002 fff8 bl 80043b4
+ 80013c4: 4603 mov r3, r0
+ 80013c6: 2b00 cmp r3, #0
+ 80013c8: d001 beq.n 80013ce
+ {
+ Error_Handler();
+ 80013ca: f000 f9cd bl 8001768
+ }
+ if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
+ 80013ce: 4818 ldr r0, [pc, #96] ; (8001430 )
+ 80013d0: f002 fd18 bl 8003e04
+ 80013d4: 4603 mov r3, r0
+ 80013d6: 2b00 cmp r3, #0
+ 80013d8: d001 beq.n 80013de
+ {
+ Error_Handler();
+ 80013da: f000 f9c5 bl 8001768
+ }
+ sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+ 80013de: 2300 movs r3, #0
+ 80013e0: 623b str r3, [r7, #32]
+ sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ 80013e2: 2300 movs r3, #0
+ 80013e4: 627b str r3, [r7, #36] ; 0x24
+ if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
+ 80013e6: f107 0320 add.w r3, r7, #32
+ 80013ea: 4619 mov r1, r3
+ 80013ec: 4810 ldr r0, [pc, #64] ; (8001430 )
+ 80013ee: f003 fba9 bl 8004b44
+ 80013f2: 4603 mov r3, r0
+ 80013f4: 2b00 cmp r3, #0
+ 80013f6: d001 beq.n 80013fc
+ {
+ Error_Handler();
+ 80013f8: f000 f9b6 bl 8001768
+ }
+ sConfigOC.OCMode = TIM_OCMODE_PWM1;
+ 80013fc: 2360 movs r3, #96 ; 0x60
+ 80013fe: 607b str r3, [r7, #4]
+ sConfigOC.Pulse = 0;
+ 8001400: 2300 movs r3, #0
+ 8001402: 60bb str r3, [r7, #8]
+ sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ 8001404: 2300 movs r3, #0
+ 8001406: 60fb str r3, [r7, #12]
+ sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ 8001408: 2300 movs r3, #0
+ 800140a: 617b str r3, [r7, #20]
+ if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
+ 800140c: 1d3b adds r3, r7, #4
+ 800140e: 2208 movs r2, #8
+ 8001410: 4619 mov r1, r3
+ 8001412: 4807 ldr r0, [pc, #28] ; (8001430 )
+ 8001414: f002 ff10 bl 8004238
+ 8001418: 4603 mov r3, r0
+ 800141a: 2b00 cmp r3, #0
+ 800141c: d001 beq.n 8001422
+ {
+ Error_Handler();
+ 800141e: f000 f9a3 bl 8001768
+ }
+ /* USER CODE BEGIN TIM4_Init 2 */
+
+ /* USER CODE END TIM4_Init 2 */
+ HAL_TIM_MspPostInit(&htim4);
+ 8001422: 4803 ldr r0, [pc, #12] ; (8001430 )
+ 8001424: f000 faa4 bl 8001970
+
+}
+ 8001428: bf00 nop
+ 800142a: 3738 adds r7, #56 ; 0x38
+ 800142c: 46bd mov sp, r7
+ 800142e: bd80 pop {r7, pc}
+ 8001430: 2000022c .word 0x2000022c
+ 8001434: 40000800 .word 0x40000800
+
+08001438 :
* @brief TIM6 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM6_Init(void)
{
- 8001308: b580 push {r7, lr}
- 800130a: b082 sub sp, #8
- 800130c: af00 add r7, sp, #0
+ 8001438: b580 push {r7, lr}
+ 800143a: b082 sub sp, #8
+ 800143c: af00 add r7, sp, #0
/* USER CODE BEGIN TIM6_Init 0 */
/* USER CODE END TIM6_Init 0 */
TIM_MasterConfigTypeDef sMasterConfig = {0};
- 800130e: 463b mov r3, r7
- 8001310: 2200 movs r2, #0
- 8001312: 601a str r2, [r3, #0]
- 8001314: 605a str r2, [r3, #4]
+ 800143e: 463b mov r3, r7
+ 8001440: 2200 movs r2, #0
+ 8001442: 601a str r2, [r3, #0]
+ 8001444: 605a str r2, [r3, #4]
/* USER CODE BEGIN TIM6_Init 1 */
/* USER CODE END TIM6_Init 1 */
htim6.Instance = TIM6;
- 8001316: 4b15 ldr r3, [pc, #84] ; (800136c )
- 8001318: 4a15 ldr r2, [pc, #84] ; (8001370 )
- 800131a: 601a str r2, [r3, #0]
+ 8001446: 4b15 ldr r3, [pc, #84] ; (800149c )
+ 8001448: 4a15 ldr r2, [pc, #84] ; (80014a0 )
+ 800144a: 601a str r2, [r3, #0]
htim6.Init.Prescaler = 72-1;
- 800131c: 4b13 ldr r3, [pc, #76] ; (800136c )
- 800131e: 2247 movs r2, #71 ; 0x47
- 8001320: 605a str r2, [r3, #4]
+ 800144c: 4b13 ldr r3, [pc, #76] ; (800149c )
+ 800144e: 2247 movs r2, #71 ; 0x47
+ 8001450: 605a str r2, [r3, #4]
htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
- 8001322: 4b12 ldr r3, [pc, #72] ; (800136c )
- 8001324: 2200 movs r2, #0
- 8001326: 609a str r2, [r3, #8]
+ 8001452: 4b12 ldr r3, [pc, #72] ; (800149c )
+ 8001454: 2200 movs r2, #0
+ 8001456: 609a str r2, [r3, #8]
htim6.Init.Period = 10000-1;
- 8001328: 4b10 ldr r3, [pc, #64] ; (800136c )
- 800132a: f242 720f movw r2, #9999 ; 0x270f
- 800132e: 60da str r2, [r3, #12]
+ 8001458: 4b10 ldr r3, [pc, #64] ; (800149c )
+ 800145a: f242 720f movw r2, #9999 ; 0x270f
+ 800145e: 60da str r2, [r3, #12]
htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 8001330: 4b0e ldr r3, [pc, #56] ; (800136c )
- 8001332: 2200 movs r2, #0
- 8001334: 619a str r2, [r3, #24]
+ 8001460: 4b0e ldr r3, [pc, #56] ; (800149c )
+ 8001462: 2200 movs r2, #0
+ 8001464: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
- 8001336: 480d ldr r0, [pc, #52] ; (800136c )
- 8001338: f002 fbf5 bl 8003b26
- 800133c: 4603 mov r3, r0
- 800133e: 2b00 cmp r3, #0
- 8001340: d001 beq.n 8001346
+ 8001466: 480d ldr r0, [pc, #52] ; (800149c )
+ 8001468: f002 fc4f bl 8003d0a
+ 800146c: 4603 mov r3, r0
+ 800146e: 2b00 cmp r3, #0
+ 8001470: d001 beq.n 8001476
{
Error_Handler();
- 8001342: f000 f979 bl 8001638
+ 8001472: f000 f979 bl 8001768
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 8001346: 2300 movs r3, #0
- 8001348: 603b str r3, [r7, #0]
+ 8001476: 2300 movs r3, #0
+ 8001478: 603b str r3, [r7, #0]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 800134a: 2300 movs r3, #0
- 800134c: 607b str r3, [r7, #4]
+ 800147a: 2300 movs r3, #0
+ 800147c: 607b str r3, [r7, #4]
if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
- 800134e: 463b mov r3, r7
- 8001350: 4619 mov r1, r3
- 8001352: 4806 ldr r0, [pc, #24] ; (800136c )
- 8001354: f002 fe0a bl 8003f6c
- 8001358: 4603 mov r3, r0
- 800135a: 2b00 cmp r3, #0
- 800135c: d001 beq.n 8001362
+ 800147e: 463b mov r3, r7
+ 8001480: 4619 mov r1, r3
+ 8001482: 4806 ldr r0, [pc, #24] ; (800149c )
+ 8001484: f003 fb5e bl 8004b44
+ 8001488: 4603 mov r3, r0
+ 800148a: 2b00 cmp r3, #0
+ 800148c: d001 beq.n 8001492
{
Error_Handler();
- 800135e: f000 f96b bl 8001638
+ 800148e: f000 f96b bl 8001768
}
/* USER CODE BEGIN TIM6_Init 2 */
/* USER CODE END TIM6_Init 2 */
}
- 8001362: bf00 nop
- 8001364: 3708 adds r7, #8
- 8001366: 46bd mov sp, r7
- 8001368: bd80 pop {r7, pc}
- 800136a: bf00 nop
- 800136c: 20000304 .word 0x20000304
- 8001370: 40001000 .word 0x40001000
+ 8001492: bf00 nop
+ 8001494: 3708 adds r7, #8
+ 8001496: 46bd mov sp, r7
+ 8001498: bd80 pop {r7, pc}
+ 800149a: bf00 nop
+ 800149c: 20000310 .word 0x20000310
+ 80014a0: 40001000 .word 0x40001000
-08001374 :
+080014a4 :
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
- 8001374: b580 push {r7, lr}
- 8001376: b08a sub sp, #40 ; 0x28
- 8001378: af00 add r7, sp, #0
+ 80014a4: b580 push {r7, lr}
+ 80014a6: b08a sub sp, #40 ; 0x28
+ 80014a8: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
- 800137a: f107 0318 add.w r3, r7, #24
- 800137e: 2200 movs r2, #0
- 8001380: 601a str r2, [r3, #0]
- 8001382: 605a str r2, [r3, #4]
- 8001384: 609a str r2, [r3, #8]
- 8001386: 60da str r2, [r3, #12]
+ 80014aa: f107 0318 add.w r3, r7, #24
+ 80014ae: 2200 movs r2, #0
+ 80014b0: 601a str r2, [r3, #0]
+ 80014b2: 605a str r2, [r3, #4]
+ 80014b4: 609a str r2, [r3, #8]
+ 80014b6: 60da str r2, [r3, #12]
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOE_CLK_ENABLE();
- 8001388: 4b74 ldr r3, [pc, #464] ; (800155c )
- 800138a: 699b ldr r3, [r3, #24]
- 800138c: 4a73 ldr r2, [pc, #460] ; (800155c )
- 800138e: f043 0340 orr.w r3, r3, #64 ; 0x40
- 8001392: 6193 str r3, [r2, #24]
- 8001394: 4b71 ldr r3, [pc, #452] ; (800155c )
- 8001396: 699b ldr r3, [r3, #24]
- 8001398: f003 0340 and.w r3, r3, #64 ; 0x40
- 800139c: 617b str r3, [r7, #20]
- 800139e: 697b ldr r3, [r7, #20]
+ 80014b8: 4b74 ldr r3, [pc, #464] ; (800168c )
+ 80014ba: 699b ldr r3, [r3, #24]
+ 80014bc: 4a73 ldr r2, [pc, #460] ; (800168c )
+ 80014be: f043 0340 orr.w r3, r3, #64 ; 0x40
+ 80014c2: 6193 str r3, [r2, #24]
+ 80014c4: 4b71 ldr r3, [pc, #452] ; (800168c )
+ 80014c6: 699b ldr r3, [r3, #24]
+ 80014c8: f003 0340 and.w r3, r3, #64 ; 0x40
+ 80014cc: 617b str r3, [r7, #20]
+ 80014ce: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOF_CLK_ENABLE();
- 80013a0: 4b6e ldr r3, [pc, #440] ; (800155c )
- 80013a2: 699b ldr r3, [r3, #24]
- 80013a4: 4a6d ldr r2, [pc, #436] ; (800155c )
- 80013a6: f043 0380 orr.w r3, r3, #128 ; 0x80
- 80013aa: 6193 str r3, [r2, #24]
- 80013ac: 4b6b ldr r3, [pc, #428] ; (800155c )
- 80013ae: 699b ldr r3, [r3, #24]
- 80013b0: f003 0380 and.w r3, r3, #128 ; 0x80
- 80013b4: 613b str r3, [r7, #16]
- 80013b6: 693b ldr r3, [r7, #16]
+ 80014d0: 4b6e ldr r3, [pc, #440] ; (800168c )
+ 80014d2: 699b ldr r3, [r3, #24]
+ 80014d4: 4a6d ldr r2, [pc, #436] ; (800168c )
+ 80014d6: f043 0380 orr.w r3, r3, #128 ; 0x80
+ 80014da: 6193 str r3, [r2, #24]
+ 80014dc: 4b6b ldr r3, [pc, #428] ; (800168c )
+ 80014de: 699b ldr r3, [r3, #24]
+ 80014e0: f003 0380 and.w r3, r3, #128 ; 0x80
+ 80014e4: 613b str r3, [r7, #16]
+ 80014e6: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOA_CLK_ENABLE();
- 80013b8: 4b68 ldr r3, [pc, #416] ; (800155c )
- 80013ba: 699b ldr r3, [r3, #24]
- 80013bc: 4a67 ldr r2, [pc, #412] ; (800155c )
- 80013be: f043 0304 orr.w r3, r3, #4
- 80013c2: 6193 str r3, [r2, #24]
- 80013c4: 4b65 ldr r3, [pc, #404] ; (800155c )
- 80013c6: 699b ldr r3, [r3, #24]
- 80013c8: f003 0304 and.w r3, r3, #4
- 80013cc: 60fb str r3, [r7, #12]
- 80013ce: 68fb ldr r3, [r7, #12]
+ 80014e8: 4b68 ldr r3, [pc, #416] ; (800168c )
+ 80014ea: 699b ldr r3, [r3, #24]
+ 80014ec: 4a67 ldr r2, [pc, #412] ; (800168c )
+ 80014ee: f043 0304 orr.w r3, r3, #4
+ 80014f2: 6193 str r3, [r2, #24]
+ 80014f4: 4b65 ldr r3, [pc, #404] ; (800168c )
+ 80014f6: 699b ldr r3, [r3, #24]
+ 80014f8: f003 0304 and.w r3, r3, #4
+ 80014fc: 60fb str r3, [r7, #12]
+ 80014fe: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOB_CLK_ENABLE();
- 80013d0: 4b62 ldr r3, [pc, #392] ; (800155c )
- 80013d2: 699b ldr r3, [r3, #24]
- 80013d4: 4a61 ldr r2, [pc, #388] ; (800155c )
- 80013d6: f043 0308 orr.w r3, r3, #8
- 80013da: 6193 str r3, [r2, #24]
- 80013dc: 4b5f ldr r3, [pc, #380] ; (800155c )
- 80013de: 699b ldr r3, [r3, #24]
- 80013e0: f003 0308 and.w r3, r3, #8
- 80013e4: 60bb str r3, [r7, #8]
- 80013e6: 68bb ldr r3, [r7, #8]
+ 8001500: 4b62 ldr r3, [pc, #392] ; (800168c )
+ 8001502: 699b ldr r3, [r3, #24]
+ 8001504: 4a61 ldr r2, [pc, #388] ; (800168c )
+ 8001506: f043 0308 orr.w r3, r3, #8
+ 800150a: 6193 str r3, [r2, #24]
+ 800150c: 4b5f ldr r3, [pc, #380] ; (800168c )
+ 800150e: 699b ldr r3, [r3, #24]
+ 8001510: f003 0308 and.w r3, r3, #8
+ 8001514: 60bb str r3, [r7, #8]
+ 8001516: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOG_CLK_ENABLE();
- 80013e8: 4b5c ldr r3, [pc, #368] ; (800155c )
- 80013ea: 699b ldr r3, [r3, #24]
- 80013ec: 4a5b ldr r2, [pc, #364] ; (800155c )
- 80013ee: f443 7380 orr.w r3, r3, #256 ; 0x100
- 80013f2: 6193 str r3, [r2, #24]
- 80013f4: 4b59 ldr r3, [pc, #356] ; (800155c )
- 80013f6: 699b ldr r3, [r3, #24]
- 80013f8: f403 7380 and.w r3, r3, #256 ; 0x100
- 80013fc: 607b str r3, [r7, #4]
- 80013fe: 687b ldr r3, [r7, #4]
+ 8001518: 4b5c ldr r3, [pc, #368] ; (800168c )
+ 800151a: 699b ldr r3, [r3, #24]
+ 800151c: 4a5b ldr r2, [pc, #364] ; (800168c )
+ 800151e: f443 7380 orr.w r3, r3, #256 ; 0x100
+ 8001522: 6193 str r3, [r2, #24]
+ 8001524: 4b59 ldr r3, [pc, #356] ; (800168c )
+ 8001526: 699b ldr r3, [r3, #24]
+ 8001528: f403 7380 and.w r3, r3, #256 ; 0x100
+ 800152c: 607b str r3, [r7, #4]
+ 800152e: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOD_CLK_ENABLE();
- 8001400: 4b56 ldr r3, [pc, #344] ; (800155c )
- 8001402: 699b ldr r3, [r3, #24]
- 8001404: 4a55 ldr r2, [pc, #340] ; (800155c )
- 8001406: f043 0320 orr.w r3, r3, #32
- 800140a: 6193 str r3, [r2, #24]
- 800140c: 4b53 ldr r3, [pc, #332] ; (800155c )
- 800140e: 699b ldr r3, [r3, #24]
- 8001410: f003 0320 and.w r3, r3, #32
- 8001414: 603b str r3, [r7, #0]
- 8001416: 683b ldr r3, [r7, #0]
+ 8001530: 4b56 ldr r3, [pc, #344] ; (800168c )
+ 8001532: 699b ldr r3, [r3, #24]
+ 8001534: 4a55 ldr r2, [pc, #340] ; (800168c )
+ 8001536: f043 0320 orr.w r3, r3, #32
+ 800153a: 6193 str r3, [r2, #24]
+ 800153c: 4b53 ldr r3, [pc, #332] ; (800168c )
+ 800153e: 699b ldr r3, [r3, #24]
+ 8001540: f003 0320 and.w r3, r3, #32
+ 8001544: 603b str r3, [r7, #0]
+ 8001546: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(TDIN_GPIO_Port, TDIN_Pin, GPIO_PIN_SET);
- 8001418: 2201 movs r2, #1
- 800141a: f44f 7100 mov.w r1, #512 ; 0x200
- 800141e: 4850 ldr r0, [pc, #320] ; (8001560 )
- 8001420: f000 fe91 bl 8002146
+ 8001548: 2201 movs r2, #1
+ 800154a: f44f 7100 mov.w r1, #512 ; 0x200
+ 800154e: 4850 ldr r0, [pc, #320] ; (8001690 )
+ 8001550: f000 feeb bl 800232a
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(RC522_CS_GPIO_Port, RC522_CS_Pin, GPIO_PIN_RESET);
- 8001424: 2200 movs r2, #0
- 8001426: 2110 movs r1, #16
- 8001428: 484e ldr r0, [pc, #312] ; (8001564 )
- 800142a: f000 fe8c bl 8002146
+ 8001554: 2200 movs r2, #0
+ 8001556: 2110 movs r1, #16
+ 8001558: 484e ldr r0, [pc, #312] ; (8001694 )
+ 800155a: f000 fee6 bl 800232a
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LCD_BL_GPIO_Port, LCD_BL_Pin, GPIO_PIN_RESET);
- 800142e: 2200 movs r2, #0
- 8001430: 2101 movs r1, #1
- 8001432: 484d ldr r0, [pc, #308] ; (8001568 )
- 8001434: f000 fe87 bl 8002146
+ 800155e: 2200 movs r2, #0
+ 8001560: 2101 movs r1, #1
+ 8001562: 484d ldr r0, [pc, #308] ; (8001698 )
+ 8001564: f000 fee1 bl 800232a
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, TCLK_Pin|TCS_Pin|MAX_IRD_Pin|MAX_RD_Pin, GPIO_PIN_SET);
- 8001438: 2201 movs r2, #1
- 800143a: f245 0106 movw r1, #20486 ; 0x5006
- 800143e: 484a ldr r0, [pc, #296] ; (8001568 )
- 8001440: f000 fe81 bl 8002146
+ 8001568: 2201 movs r2, #1
+ 800156a: f245 0106 movw r1, #20486 ; 0x5006
+ 800156e: 484a ldr r0, [pc, #296] ; (8001698 )
+ 8001570: f000 fedb bl 800232a
/*Configure GPIO pins : KEY3_Pin KEY2_Pin KEY1_Pin */
GPIO_InitStruct.Pin = KEY3_Pin|KEY2_Pin|KEY1_Pin;
- 8001444: 231c movs r3, #28
- 8001446: 61bb str r3, [r7, #24]
+ 8001574: 231c movs r3, #28
+ 8001576: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 8001448: 2300 movs r3, #0
- 800144a: 61fb str r3, [r7, #28]
+ 8001578: 2300 movs r3, #0
+ 800157a: 61fb str r3, [r7, #28]
GPIO_InitStruct.Pull = GPIO_PULLUP;
- 800144c: 2301 movs r3, #1
- 800144e: 623b str r3, [r7, #32]
+ 800157c: 2301 movs r3, #1
+ 800157e: 623b str r3, [r7, #32]
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 8001450: f107 0318 add.w r3, r7, #24
- 8001454: 4619 mov r1, r3
- 8001456: 4845 ldr r0, [pc, #276] ; (800156c )
- 8001458: f000 fcca bl 8001df0
+ 8001580: f107 0318 add.w r3, r7, #24
+ 8001584: 4619 mov r1, r3
+ 8001586: 4845 ldr r0, [pc, #276] ; (800169c )
+ 8001588: f000 fd24 bl 8001fd4
/*Configure GPIO pin : TDOUT_Pin */
GPIO_InitStruct.Pin = TDOUT_Pin;
- 800145c: f44f 7380 mov.w r3, #256 ; 0x100
- 8001460: 61bb str r3, [r7, #24]
+ 800158c: f44f 7380 mov.w r3, #256 ; 0x100
+ 8001590: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 8001462: 2300 movs r3, #0
- 8001464: 61fb str r3, [r7, #28]
+ 8001592: 2300 movs r3, #0
+ 8001594: 61fb str r3, [r7, #28]
GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001466: 2300 movs r3, #0
- 8001468: 623b str r3, [r7, #32]
+ 8001596: 2300 movs r3, #0
+ 8001598: 623b str r3, [r7, #32]
HAL_GPIO_Init(TDOUT_GPIO_Port, &GPIO_InitStruct);
- 800146a: f107 0318 add.w r3, r7, #24
- 800146e: 4619 mov r1, r3
- 8001470: 483b ldr r0, [pc, #236] ; (8001560 )
- 8001472: f000 fcbd bl 8001df0
+ 800159a: f107 0318 add.w r3, r7, #24
+ 800159e: 4619 mov r1, r3
+ 80015a0: 483b ldr r0, [pc, #236] ; (8001690 )
+ 80015a2: f000 fd17 bl 8001fd4
/*Configure GPIO pin : TDIN_Pin */
GPIO_InitStruct.Pin = TDIN_Pin;
- 8001476: f44f 7300 mov.w r3, #512 ; 0x200
- 800147a: 61bb str r3, [r7, #24]
+ 80015a6: f44f 7300 mov.w r3, #512 ; 0x200
+ 80015aa: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 800147c: 2301 movs r3, #1
- 800147e: 61fb str r3, [r7, #28]
+ 80015ac: 2301 movs r3, #1
+ 80015ae: 61fb str r3, [r7, #28]
GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001480: 2300 movs r3, #0
- 8001482: 623b str r3, [r7, #32]
+ 80015b0: 2300 movs r3, #0
+ 80015b2: 623b str r3, [r7, #32]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
- 8001484: 2303 movs r3, #3
- 8001486: 627b str r3, [r7, #36] ; 0x24
+ 80015b4: 2303 movs r3, #3
+ 80015b6: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(TDIN_GPIO_Port, &GPIO_InitStruct);
- 8001488: f107 0318 add.w r3, r7, #24
- 800148c: 4619 mov r1, r3
- 800148e: 4834 ldr r0, [pc, #208] ; (8001560 )
- 8001490: f000 fcae bl 8001df0
+ 80015b8: f107 0318 add.w r3, r7, #24
+ 80015bc: 4619 mov r1, r3
+ 80015be: 4834 ldr r0, [pc, #208] ; (8001690 )
+ 80015c0: f000 fd08 bl 8001fd4
/*Configure GPIO pin : TPEN_Pin */
GPIO_InitStruct.Pin = TPEN_Pin;
- 8001494: f44f 6380 mov.w r3, #1024 ; 0x400
- 8001498: 61bb str r3, [r7, #24]
+ 80015c4: f44f 6380 mov.w r3, #1024 ; 0x400
+ 80015c8: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 800149a: 2300 movs r3, #0
- 800149c: 61fb str r3, [r7, #28]
+ 80015ca: 2300 movs r3, #0
+ 80015cc: 61fb str r3, [r7, #28]
GPIO_InitStruct.Pull = GPIO_PULLUP;
- 800149e: 2301 movs r3, #1
- 80014a0: 623b str r3, [r7, #32]
+ 80015ce: 2301 movs r3, #1
+ 80015d0: 623b str r3, [r7, #32]
HAL_GPIO_Init(TPEN_GPIO_Port, &GPIO_InitStruct);
- 80014a2: f107 0318 add.w r3, r7, #24
- 80014a6: 4619 mov r1, r3
- 80014a8: 482d ldr r0, [pc, #180] ; (8001560 )
- 80014aa: f000 fca1 bl 8001df0
+ 80015d2: f107 0318 add.w r3, r7, #24
+ 80015d6: 4619 mov r1, r3
+ 80015d8: 482d ldr r0, [pc, #180] ; (8001690 )
+ 80015da: f000 fcfb bl 8001fd4
/*Configure GPIO pin : KEY0_Pin */
GPIO_InitStruct.Pin = KEY0_Pin;
- 80014ae: 2301 movs r3, #1
- 80014b0: 61bb str r3, [r7, #24]
+ 80015de: 2301 movs r3, #1
+ 80015e0: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 80014b2: 2300 movs r3, #0
- 80014b4: 61fb str r3, [r7, #28]
+ 80015e2: 2300 movs r3, #0
+ 80015e4: 61fb str r3, [r7, #28]
GPIO_InitStruct.Pull = GPIO_NOPULL;
- 80014b6: 2300 movs r3, #0
- 80014b8: 623b str r3, [r7, #32]
+ 80015e6: 2300 movs r3, #0
+ 80015e8: 623b str r3, [r7, #32]
HAL_GPIO_Init(KEY0_GPIO_Port, &GPIO_InitStruct);
- 80014ba: f107 0318 add.w r3, r7, #24
- 80014be: 4619 mov r1, r3
- 80014c0: 4828 ldr r0, [pc, #160] ; (8001564 )
- 80014c2: f000 fc95 bl 8001df0
+ 80015ea: f107 0318 add.w r3, r7, #24
+ 80015ee: 4619 mov r1, r3
+ 80015f0: 4828 ldr r0, [pc, #160] ; (8001694 )
+ 80015f2: f000 fcef bl 8001fd4