From be3a8d1a9c6188f945445d153c00c77c81c103c4 Mon Sep 17 00:00:00 2001
From: fong <wuwenfengmi@outlook.com>
Date: Mon, 25 Dec 2023 22:34:11 +0800
Subject: [PATCH] =?UTF-8?q?=E5=86=99=E5=A4=AA=E7=83=82=E4=BA=86=EF=BC=8C?=
 =?UTF-8?q?=E9=87=8D=E5=86=99=E5=90=A7=20Signed-off-by:=20fong=20<wuwenfen?=
 =?UTF-8?q?gmi@outlook.com>?=
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Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

---
 .cproject                                     |     6 +-
 .mxproject                                    |    18 +-
 .settings/language.settings.xml               |     9 +-
 .settings/stm32cubeide.project.prefs          |     4 +-
 Core/Inc/main.h                               |     3 +-
 Core/Inc/stm32f1xx_hal_conf.h                 |    14 +-
 Core/Inc/stm32f1xx_it.h                       |     2 -
 Core/Src/main.c                               |     7 +-
 Core/Src/stm32f1xx_hal_msp.c                  |     3 +-
 Core/Src/stm32f1xx_it.c                       |     1 -
 Debug/Core/Src/main.cyclo                     |    11 +
 Debug/Core/Src/main.d                         |    34 +-
 Debug/Core/Src/main.su                        |    22 +-
 Debug/Core/Src/stm32f1xx_hal_msp.cyclo        |    12 +
 Debug/Core/Src/stm32f1xx_hal_msp.d            |    29 -
 Debug/Core/Src/stm32f1xx_hal_msp.su           |    24 +-
 Debug/Core/Src/stm32f1xx_it.cyclo             |    11 +
 Debug/Core/Src/stm32f1xx_it.d                 |    30 -
 Debug/Core/Src/stm32f1xx_it.su                |    22 +-
 Debug/Core/Src/subdir.mk                      |     8 +-
 Debug/Core/Src/syscalls.cyclo                 |    18 +
 Debug/Core/Src/syscalls.su                    |    36 +-
 Debug/Core/Src/sysmem.cyclo                   |     1 +
 Debug/Core/Src/sysmem.su                      |     2 +-
 Debug/Core/Src/system_stm32f1xx.cyclo         |     2 +
 Debug/Core/Src/system_stm32f1xx.d             |    28 -
 Debug/Core/Src/system_stm32f1xx.su            |     4 +-
 Debug/Core/Startup/subdir.mk                  |     2 +-
 .../Src/stm32f1xx_hal.cyclo                   |    25 +
 .../STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d  |    28 -
 .../STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.su |    50 +-
 .../Src/stm32f1xx_hal_cortex.cyclo            |    29 +
 .../Src/stm32f1xx_hal_cortex.d                |    28 -
 .../Src/stm32f1xx_hal_cortex.su               |    58 +-
 .../Src/stm32f1xx_hal_dma.cyclo               |    13 +
 .../Src/stm32f1xx_hal_dma.d                   |    28 -
 .../Src/stm32f1xx_hal_dma.su                  |    26 +-
 .../Src/stm32f1xx_hal_exti.cyclo              |     9 +
 .../Src/stm32f1xx_hal_exti.d                  |    28 -
 .../Src/stm32f1xx_hal_exti.su                 |    18 +-
 .../Src/stm32f1xx_hal_flash.cyclo             |    14 +
 .../Src/stm32f1xx_hal_flash.d                 |    28 -
 .../Src/stm32f1xx_hal_flash.su                |    28 +-
 .../Src/stm32f1xx_hal_flash_ex.cyclo          |    16 +
 .../Src/stm32f1xx_hal_flash_ex.d              |    28 -
 .../Src/stm32f1xx_hal_flash_ex.su             |    32 +-
 .../Src/stm32f1xx_hal_gpio.cyclo              |     8 +
 .../Src/stm32f1xx_hal_gpio.d                  |    28 -
 .../Src/stm32f1xx_hal_gpio.su                 |    16 +-
 .../Src/stm32f1xx_hal_gpio_ex.cyclo           |     3 +
 .../Src/stm32f1xx_hal_gpio_ex.d               |    28 -
 .../Src/stm32f1xx_hal_gpio_ex.su              |     6 +-
 .../Src/stm32f1xx_hal_i2c.cyclo               |    81 +
 .../Src/stm32f1xx_hal_i2c.d                   |    28 -
 .../Src/stm32f1xx_hal_i2c.su                  |   162 +-
 .../Src/stm32f1xx_hal_pwr.cyclo               |    18 +
 .../Src/stm32f1xx_hal_pwr.d                   |    28 -
 .../Src/stm32f1xx_hal_pwr.su                  |    36 +-
 .../Src/stm32f1xx_hal_rcc.cyclo               |    15 +
 .../Src/stm32f1xx_hal_rcc.d                   |    28 -
 .../Src/stm32f1xx_hal_rcc.su                  |    30 +-
 .../Src/stm32f1xx_hal_rcc_ex.cyclo            |     3 +
 .../Src/stm32f1xx_hal_rcc_ex.d                |    28 -
 .../Src/stm32f1xx_hal_rcc_ex.su               |     6 +-
 .../Src/stm32f1xx_hal_spi.cyclo               |    55 +
 .../Src/stm32f1xx_hal_spi.d                   |    28 -
 .../Src/stm32f1xx_hal_spi.su                  |   110 +-
 .../Src/stm32f1xx_hal_sram.cyclo              |    20 +
 .../Src/stm32f1xx_hal_sram.d                  |    28 -
 .../Src/stm32f1xx_hal_sram.su                 |    40 +-
 .../Src/stm32f1xx_hal_tim.cyclo               |   119 +
 .../Src/stm32f1xx_hal_tim.d                   |    28 -
 .../Src/stm32f1xx_hal_tim.su                  |   238 +-
 .../Src/stm32f1xx_hal_tim_ex.cyclo            |    42 +
 .../Src/stm32f1xx_hal_tim_ex.d                |    28 -
 .../Src/stm32f1xx_hal_tim_ex.su               |    84 +-
 .../Src/stm32f1xx_ll_fsmc.cyclo               |    18 +
 .../Src/stm32f1xx_ll_fsmc.d                   |    28 -
 .../Src/stm32f1xx_ll_fsmc.su                  |    36 +-
 .../STM32F1xx_HAL_Driver/Src/subdir.mk        |     8 +-
 Debug/HW_Devices/LCD.cyclo                    |    22 +
 Debug/HW_Devices/LCD.d                        |    30 -
 Debug/HW_Devices/LCD.su                       |    44 +-
 Debug/HW_Devices/buzzer.cyclo                 |     4 +
 Debug/HW_Devices/buzzer.d                     |    30 -
 Debug/HW_Devices/buzzer.su                    |     8 +-
 Debug/HW_Devices/eeprom.cyclo                 |     4 +
 Debug/HW_Devices/eeprom.d                     |    31 -
 Debug/HW_Devices/eeprom.su                    |     8 +-
 Debug/HW_Devices/iic.cyclo                    |     2 +
 Debug/HW_Devices/iic.d                        |    30 -
 Debug/HW_Devices/iic.su                       |     4 +-
 Debug/HW_Devices/key.cyclo                    |     1 +
 Debug/HW_Devices/key.d                        |    30 -
 Debug/HW_Devices/key.su                       |     2 +-
 Debug/HW_Devices/rs522.cyclo                  |    19 +
 Debug/HW_Devices/rs522.d                      |    30 -
 Debug/HW_Devices/rs522.su                     |    38 +-
 Debug/HW_Devices/subdir.mk                    |     8 +-
 Debug/HW_Devices/touch.cyclo                  |     9 +
 Debug/HW_Devices/touch.d                      |    32 -
 Debug/HW_Devices/touch.su                     |    18 +-
 Debug/SW_APPs/APP_IDcard.cyclo                |     2 +
 Debug/SW_APPs/APP_IDcard.d                    |    41 +-
 Debug/SW_APPs/APP_IDcard.su                   |     4 +-
 Debug/SW_APPs/APP_blood.cyclo                 |    15 +
 Debug/SW_APPs/APP_blood.d                     |    47 +-
 Debug/SW_APPs/APP_blood.su                    |    30 +-
 Debug/SW_APPs/APP_morsecode.cyclo             |     3 +
 Debug/SW_APPs/APP_morsecode.d                 |    41 +-
 Debug/SW_APPs/APP_morsecode.su                |     6 +-
 Debug/SW_APPs/Main_APP.cyclo                  |     1 +
 Debug/SW_APPs/Main_APP.d                      |    61 +-
 Debug/SW_APPs/Main_APP.su                     |     2 +-
 Debug/SW_APPs/subdir.mk                       |     8 +-
 Debug/SW_APPs/windows.cyclo                   |    11 +
 Debug/SW_APPs/windows.d                       |    40 +-
 Debug/SW_APPs/windows.su                      |    22 +-
 Debug/m3s.bin                                 |   Bin 47128 -> 0 bytes
 Debug/m3s.list                                | 15946 ++++++++--------
 Debug/m3s.map                                 |  3623 ++--
 Debug/makefile                                |    21 +-
 Debug/objects.mk                              |     2 +-
 Debug/sources.mk                              |     6 +-
 .../Inc/stm32f1xx_ll_bus.h                    |  1015 +
 .../Inc/stm32f1xx_ll_cortex.h                 |   640 +
 .../Inc/stm32f1xx_ll_dma.h                    |  1960 ++
 .../Inc/stm32f1xx_ll_exti.h                   |   888 +
 .../Inc/stm32f1xx_ll_gpio.h                   |  2347 +++
 .../Inc/stm32f1xx_ll_i2c.h                    |  1784 ++
 .../Inc/stm32f1xx_ll_pwr.h                    |   440 +
 .../Inc/stm32f1xx_ll_rcc.h                    |  2312 +++
 .../Inc/stm32f1xx_ll_spi.h                    |  1938 ++
 .../Inc/stm32f1xx_ll_system.h                 |   574 +
 .../Inc/stm32f1xx_ll_tim.h                    |  3904 ++++
 .../Inc/stm32f1xx_ll_utils.h                  |   272 +
 STM32F103ZETX_FLASH.ld                        |     4 +-
 SW_APPs/windows.c                             |     6 +-
 m3s Debug.launch                              |     2 +-
 m3s.ioc                                       |    36 +-
 140 files changed, 29173 insertions(+), 11596 deletions(-)
 create mode 100644 Debug/Core/Src/main.cyclo
 create mode 100644 Debug/Core/Src/stm32f1xx_hal_msp.cyclo
 create mode 100644 Debug/Core/Src/stm32f1xx_it.cyclo
 create mode 100644 Debug/Core/Src/syscalls.cyclo
 create mode 100644 Debug/Core/Src/sysmem.cyclo
 create mode 100644 Debug/Core/Src/system_stm32f1xx.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.cyclo
 create mode 100644 Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.cyclo
 create mode 100644 Debug/HW_Devices/LCD.cyclo
 create mode 100644 Debug/HW_Devices/buzzer.cyclo
 create mode 100644 Debug/HW_Devices/eeprom.cyclo
 create mode 100644 Debug/HW_Devices/iic.cyclo
 create mode 100644 Debug/HW_Devices/key.cyclo
 create mode 100644 Debug/HW_Devices/rs522.cyclo
 create mode 100644 Debug/HW_Devices/touch.cyclo
 create mode 100644 Debug/SW_APPs/APP_IDcard.cyclo
 create mode 100644 Debug/SW_APPs/APP_blood.cyclo
 create mode 100644 Debug/SW_APPs/APP_morsecode.cyclo
 create mode 100644 Debug/SW_APPs/Main_APP.cyclo
 create mode 100644 Debug/SW_APPs/windows.cyclo
 delete mode 100755 Debug/m3s.bin
 create mode 100644 Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h
 create mode 100644 Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_cortex.h
 create mode 100644 Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h
 create mode 100644 Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_exti.h
 create mode 100644 Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h
 create mode 100644 Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_i2c.h
 create mode 100644 Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_pwr.h
 create mode 100644 Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h
 create mode 100644 Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_spi.h
 create mode 100644 Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_system.h
 create mode 100644 Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h
 create mode 100644 Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_utils.h

diff --git a/.cproject b/.cproject
index 5f7e8ad..9a25167 100644
--- a/.cproject
+++ b/.cproject
@@ -21,8 +21,9 @@
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.435696495" name="CPU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.1718086864" name="Core" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.39556236" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="genericBoard" valueType="string"/>
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1007463616" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.5 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32F103ZETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Drivers/CMSIS/Device/ST/STM32F1xx/Include | ../Drivers/CMSIS/Include | ../Core/Inc | ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy | ../Drivers/STM32F1xx_HAL_Driver/Inc ||  ||  || STM32F103xE | USE_HAL_DRIVER ||  || Drivers | Core/Startup | Core ||  ||  || ${workspace_loc:/${ProjName}/STM32F103ZETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o ||  || None || " valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1007463616" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.6 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32F103ZETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Drivers/CMSIS/Device/ST/STM32F1xx/Include | ../Drivers/CMSIS/Include | ../Core/Inc | ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy | ../Drivers/STM32F1xx_HAL_Driver/Inc ||  ||  || STM32F103xE | USE_HAL_DRIVER ||  || Drivers | Core/Startup | Core ||  ||  || ${workspace_loc:/${ProjName}/STM32F103ZETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o ||  || None ||  ||  || " valueType="string"/>
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.nanoprintffloat.529851497" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.nanoprintffloat" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+							<option id="com.st.stm32cube.ide.mcu.debug.option.cpuclock.740544645" superClass="com.st.stm32cube.ide.mcu.debug.option.cpuclock" value="72" valueType="string"/>
 							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1951035694" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
 							<builder buildPath="${workspace_loc:/m3s}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1810256872" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1090450320" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
@@ -103,7 +104,8 @@
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid.1850235440" name="CPU" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_cpuid" useByScannerDiscovery="false" value="0" valueType="string"/>
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid.599250931" name="Core" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_coreid" useByScannerDiscovery="false" value="0" valueType="string"/>
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.471981060" name="Board" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="genericBoard" valueType="string"/>
-							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1227934549" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.5 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32F103ZETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Drivers/CMSIS/Device/ST/STM32F1xx/Include | ../Drivers/CMSIS/Include | ../Core/Inc | ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy | ../Drivers/STM32F1xx_HAL_Driver/Inc ||  ||  || STM32F103xE | USE_HAL_DRIVER ||  || Drivers | Core/Startup | Core ||  ||  || ${workspace_loc:/${ProjName}/STM32F103ZETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o ||  || None || " valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.1227934549" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.6 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32F103ZETx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Drivers/CMSIS/Device/ST/STM32F1xx/Include | ../Drivers/CMSIS/Include | ../Core/Inc | ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy | ../Drivers/STM32F1xx_HAL_Driver/Inc ||  ||  || STM32F103xE | USE_HAL_DRIVER ||  || Drivers | Core/Startup | Core ||  ||  || ${workspace_loc:/${ProjName}/STM32F103ZETX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o ||  || None ||  ||  || " valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.debug.option.cpuclock.431339203" superClass="com.st.stm32cube.ide.mcu.debug.option.cpuclock" value="72" valueType="string"/>
 							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1457821206" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
 							<builder buildPath="${workspace_loc:/m3s}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1370103102" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1473716439" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
diff --git a/.mxproject b/.mxproject
index 812ced6..866157f 100644
--- a/.mxproject
+++ b/.mxproject
@@ -1,5 +1,5 @@
 [PreviousLibFiles]
-LibFiles=Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_fsmc.h;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_def.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_sram.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_spi.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_fsmc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_sram.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_fsmc.h;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_def.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_sram.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_spi.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim_ex.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\stm32f103xe.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\system_stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
+LibFiles=Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_fsmc.h;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_def.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_bus.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_system.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_utils.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_sram.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_spi.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_spi.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_tim.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_fsmc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_sram.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_fsmc.h;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_def.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_bus.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_system.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_utils.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_sram.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_spi.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_spi.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_tim.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\stm32f103xe.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\system_stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
 
 [PreviousUsedCubeIDEFiles]
 SourceFiles=Core\Src\main.c;Core\Src\stm32f1xx_it.c;Core\Src\stm32f1xx_hal_msp.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_fsmc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_sram.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_fsmc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_sram.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_spi.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;;;
@@ -9,17 +9,17 @@ CDefines=USE_HAL_DRIVER;STM32F103xE;USE_HAL_DRIVER;USE_HAL_DRIVER;
 [PreviousGenFiles]
 AdvancedFolderStructure=true
 HeaderFileListSize=3
-HeaderFiles#0=C:/Users/wuwen/Desktop/M3s_stm32/Core/Inc/stm32f1xx_it.h
-HeaderFiles#1=C:/Users/wuwen/Desktop/M3s_stm32/Core/Inc/stm32f1xx_hal_conf.h
-HeaderFiles#2=C:/Users/wuwen/Desktop/M3s_stm32/Core/Inc/main.h
+HeaderFiles#0=..\Core\Inc\stm32f1xx_it.h
+HeaderFiles#1=..\Core\Inc\stm32f1xx_hal_conf.h
+HeaderFiles#2=..\Core\Inc\main.h
 HeaderFolderListSize=1
-HeaderPath#0=C:/Users/wuwen/Desktop/M3s_stm32/Core/Inc
+HeaderPath#0=..\Core\Inc
 HeaderFiles=;
 SourceFileListSize=3
-SourceFiles#0=C:/Users/wuwen/Desktop/M3s_stm32/Core/Src/stm32f1xx_it.c
-SourceFiles#1=C:/Users/wuwen/Desktop/M3s_stm32/Core/Src/stm32f1xx_hal_msp.c
-SourceFiles#2=C:/Users/wuwen/Desktop/M3s_stm32/Core/Src/main.c
+SourceFiles#0=..\Core\Src\stm32f1xx_it.c
+SourceFiles#1=..\Core\Src\stm32f1xx_hal_msp.c
+SourceFiles#2=..\Core\Src\main.c
 SourceFolderListSize=1
-SourcePath#0=C:/Users/wuwen/Desktop/M3s_stm32/Core/Src
+SourcePath#0=..\Core\Src
 SourceFiles=;
 
diff --git a/.settings/language.settings.xml b/.settings/language.settings.xml
index 58975a2..f381d33 100644
--- a/.settings/language.settings.xml
+++ b/.settings/language.settings.xml
@@ -2,11 +2,10 @@
 <project>
 	<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.419389353" name="Debug">
 		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
-			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.ui.UserLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
-			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1463492114488212853" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="111365396600756510" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
@@ -14,11 +13,11 @@
 	</configuration>
 	<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.945704360" name="Release">
 		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
-			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.ui.UserLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
 			<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
-			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1463492114488212853" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="111365396600756510" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
diff --git a/.settings/stm32cubeide.project.prefs b/.settings/stm32cubeide.project.prefs
index 6f394f1..8d2cd36 100644
--- a/.settings/stm32cubeide.project.prefs
+++ b/.settings/stm32cubeide.project.prefs
@@ -1,4 +1,4 @@
 66BE74F758C12D739921AEA421D593D3=3
-8DF89ED150041C4CBC7CB9A9CAA90856=F46B32B5BAB702A632C55EDACF07DC3A
-DC22A860405A8BF2F2C095E5B6529F12=F46B32B5BAB702A632C55EDACF07DC3A
+8DF89ED150041C4CBC7CB9A9CAA90856=3ACB451AE9FFFFE8C0DB50F06E88F217
+DC22A860405A8BF2F2C095E5B6529F12=0CA3AAA48D6F54E59AF57B07C2EB9333
 eclipse.preferences.version=1
diff --git a/Core/Inc/main.h b/Core/Inc/main.h
index 30d45d6..28adefb 100644
--- a/Core/Inc/main.h
+++ b/Core/Inc/main.h
@@ -88,6 +88,7 @@ void Error_Handler(void);
 #define MAX_INT_GPIO_Port GPIOB
 #define MAX_RD_Pin GPIO_PIN_14
 #define MAX_RD_GPIO_Port GPIOB
+
 /* USER CODE BEGIN Private defines */
 
 /* USER CODE END Private defines */
@@ -97,5 +98,3 @@ void Error_Handler(void);
 #endif
 
 #endif /* __MAIN_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Core/Inc/stm32f1xx_hal_conf.h b/Core/Inc/stm32f1xx_hal_conf.h
index dcd3868..7f45f74 100644
--- a/Core/Inc/stm32f1xx_hal_conf.h
+++ b/Core/Inc/stm32f1xx_hal_conf.h
@@ -1,3 +1,4 @@
+/* USER CODE BEGIN Header */
 /**
   ******************************************************************************
   * @file    stm32f1xx_hal_conf.h
@@ -5,16 +6,16 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
+/* USER CODE END Header */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F1xx_HAL_CONF_H
@@ -388,4 +389,3 @@ void assert_failed(uint8_t* file, uint32_t line);
 
 #endif /* __STM32F1xx_HAL_CONF_H */
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Core/Inc/stm32f1xx_it.h b/Core/Inc/stm32f1xx_it.h
index 8ad985c..1081707 100644
--- a/Core/Inc/stm32f1xx_it.h
+++ b/Core/Inc/stm32f1xx_it.h
@@ -67,5 +67,3 @@ void TIM6_IRQHandler(void);
 #endif
 
 #endif /* __STM32F1xx_IT_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Core/Src/main.c b/Core/Src/main.c
index 63457c6..087dae1 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -147,6 +147,7 @@ void SystemClock_Config(void)
   {
     Error_Handler();
   }
+
   /** Initializes the CPU, AHB and APB buses clocks
   */
   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
@@ -339,6 +340,8 @@ static void MX_TIM6_Init(void)
 static void MX_GPIO_Init(void)
 {
   GPIO_InitTypeDef GPIO_InitStruct = {0};
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
 
   /* GPIO Ports Clock Enable */
   __HAL_RCC_GPIOE_CLK_ENABLE();
@@ -425,6 +428,8 @@ static void MX_GPIO_Init(void)
   GPIO_InitStruct.Pull = GPIO_PULLUP;
   HAL_GPIO_Init(MAX_INT_GPIO_Port, &GPIO_InitStruct);
 
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
 }
 
 /* FSMC initialization function */
@@ -519,5 +524,3 @@ void assert_failed(uint8_t *file, uint32_t line)
   /* USER CODE END 6 */
 }
 #endif /* USE_FULL_ASSERT */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Core/Src/stm32f1xx_hal_msp.c b/Core/Src/stm32f1xx_hal_msp.c
index 2453318..0fdbb0c 100644
--- a/Core/Src/stm32f1xx_hal_msp.c
+++ b/Core/Src/stm32f1xx_hal_msp.c
@@ -21,6 +21,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 #include "main.h"
+
 /* USER CODE BEGIN Includes */
 
 /* USER CODE END Includes */
@@ -454,5 +455,3 @@ void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef* hsram){
 /* USER CODE BEGIN 1 */
 
 /* USER CODE END 1 */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Core/Src/stm32f1xx_it.c b/Core/Src/stm32f1xx_it.c
index 79aed6d..6beedde 100644
--- a/Core/Src/stm32f1xx_it.c
+++ b/Core/Src/stm32f1xx_it.c
@@ -231,4 +231,3 @@ void TIM6_IRQHandler(void)
 /* USER CODE BEGIN 1 */
 
 /* USER CODE END 1 */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Debug/Core/Src/main.cyclo b/Debug/Core/Src/main.cyclo
new file mode 100644
index 0000000..a4a7e45
--- /dev/null
+++ b/Debug/Core/Src/main.cyclo
@@ -0,0 +1,11 @@
+../Drivers/CMSIS/Include/core_cm3.h:1876:26:ITM_SendChar	4
+../Core/Src/main.c:70:5:_write	2
+../Core/Src/main.c:83:5:main	1
+../Core/Src/main.c:131:6:SystemClock_Config	3
+../Core/Src/main.c:171:13:MX_I2C2_Init	2
+../Core/Src/main.c:205:13:MX_SPI1_Init	2
+../Core/Src/main.c:243:13:MX_TIM4_Init	6
+../Core/Src/main.c:302:13:MX_TIM6_Init	3
+../Core/Src/main.c:340:13:MX_GPIO_Init	1
+../Core/Src/main.c:436:13:MX_FSMC_Init	2
+../Core/Src/main.c:500:6:Error_Handler	1
diff --git a/Debug/Core/Src/main.d b/Debug/Core/Src/main.d
index c8dc6b3..ef3de1f 100644
--- a/Debug/Core/Src/main.d
+++ b/Debug/Core/Src/main.d
@@ -27,64 +27,34 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
- C:/Users/wuwen/Desktop/M3s_stm32/SW_APPs/Main_APP.h
-
+ C:/Users/wuwen/m3s_stm32/SW_APPs/Main_APP.h
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/SW_APPs/Main_APP.h:
+C:/Users/wuwen/m3s_stm32/SW_APPs/Main_APP.h:
diff --git a/Debug/Core/Src/main.su b/Debug/Core/Src/main.su
index aa72ce4..2f4ffc7 100644
--- a/Debug/Core/Src/main.su
+++ b/Debug/Core/Src/main.su
@@ -1,11 +1,11 @@
-core_cm3.h:1876:26:ITM_SendChar	16	static,ignoring_inline_asm
-main.c:70:5:_write	32	static
-main.c:83:5:main	8	static
-main.c:131:6:SystemClock_Config	72	static
-main.c:170:13:MX_I2C2_Init	8	static
-main.c:204:13:MX_SPI1_Init	8	static
-main.c:242:13:MX_TIM4_Init	64	static
-main.c:301:13:MX_TIM6_Init	16	static
-main.c:339:13:MX_GPIO_Init	48	static
-main.c:431:13:MX_FSMC_Init	40	static
-main.c:495:6:Error_Handler	4	static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm3.h:1876:26:ITM_SendChar	16	static,ignoring_inline_asm
+../Core/Src/main.c:70:5:_write	32	static
+../Core/Src/main.c:83:5:main	8	static
+../Core/Src/main.c:131:6:SystemClock_Config	72	static
+../Core/Src/main.c:171:13:MX_I2C2_Init	8	static
+../Core/Src/main.c:205:13:MX_SPI1_Init	8	static
+../Core/Src/main.c:243:13:MX_TIM4_Init	64	static
+../Core/Src/main.c:302:13:MX_TIM6_Init	16	static
+../Core/Src/main.c:340:13:MX_GPIO_Init	48	static
+../Core/Src/main.c:436:13:MX_FSMC_Init	40	static
+../Core/Src/main.c:500:6:Error_Handler	4	static,ignoring_inline_asm
diff --git a/Debug/Core/Src/stm32f1xx_hal_msp.cyclo b/Debug/Core/Src/stm32f1xx_hal_msp.cyclo
new file mode 100644
index 0000000..3e18ff5
--- /dev/null
+++ b/Debug/Core/Src/stm32f1xx_hal_msp.cyclo
@@ -0,0 +1,12 @@
+../Core/Src/stm32f1xx_hal_msp.c:67:6:HAL_MspInit	1
+../Core/Src/stm32f1xx_hal_msp.c:93:6:HAL_I2C_MspInit	2
+../Core/Src/stm32f1xx_hal_msp.c:127:6:HAL_I2C_MspDeInit	2
+../Core/Src/stm32f1xx_hal_msp.c:158:6:HAL_SPI_MspInit	2
+../Core/Src/stm32f1xx_hal_msp.c:198:6:HAL_SPI_MspDeInit	2
+../Core/Src/stm32f1xx_hal_msp.c:228:6:HAL_TIM_Base_MspInit	3
+../Core/Src/stm32f1xx_hal_msp.c:261:6:HAL_TIM_MspPostInit	2
+../Core/Src/stm32f1xx_hal_msp.c:291:6:HAL_TIM_Base_MspDeInit	3
+../Core/Src/stm32f1xx_hal_msp.c:326:13:HAL_FSMC_MspInit	2
+../Core/Src/stm32f1xx_hal_msp.c:385:6:HAL_SRAM_MspInit	1
+../Core/Src/stm32f1xx_hal_msp.c:397:13:HAL_FSMC_MspDeInit	2
+../Core/Src/stm32f1xx_hal_msp.c:445:6:HAL_SRAM_MspDeInit	1
diff --git a/Debug/Core/Src/stm32f1xx_hal_msp.d b/Debug/Core/Src/stm32f1xx_hal_msp.d
index a5845d7..064f5c8 100644
--- a/Debug/Core/Src/stm32f1xx_hal_msp.d
+++ b/Debug/Core/Src/stm32f1xx_hal_msp.d
@@ -27,61 +27,32 @@ Core/Src/stm32f1xx_hal_msp.o: ../Core/Src/stm32f1xx_hal_msp.c \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Core/Src/stm32f1xx_hal_msp.su b/Debug/Core/Src/stm32f1xx_hal_msp.su
index c7ee74f..8e8d0b9 100644
--- a/Debug/Core/Src/stm32f1xx_hal_msp.su
+++ b/Debug/Core/Src/stm32f1xx_hal_msp.su
@@ -1,12 +1,12 @@
-stm32f1xx_hal_msp.c:66:6:HAL_MspInit	24	static
-stm32f1xx_hal_msp.c:92:6:HAL_I2C_MspInit	40	static
-stm32f1xx_hal_msp.c:126:6:HAL_I2C_MspDeInit	16	static
-stm32f1xx_hal_msp.c:157:6:HAL_SPI_MspInit	40	static
-stm32f1xx_hal_msp.c:197:6:HAL_SPI_MspDeInit	16	static
-stm32f1xx_hal_msp.c:227:6:HAL_TIM_Base_MspInit	24	static
-stm32f1xx_hal_msp.c:260:6:HAL_TIM_MspPostInit	40	static
-stm32f1xx_hal_msp.c:290:6:HAL_TIM_Base_MspDeInit	16	static
-stm32f1xx_hal_msp.c:325:13:HAL_FSMC_MspInit	32	static
-stm32f1xx_hal_msp.c:384:6:HAL_SRAM_MspInit	16	static
-stm32f1xx_hal_msp.c:396:13:HAL_FSMC_MspDeInit	8	static
-stm32f1xx_hal_msp.c:444:6:HAL_SRAM_MspDeInit	16	static
+../Core/Src/stm32f1xx_hal_msp.c:67:6:HAL_MspInit	24	static
+../Core/Src/stm32f1xx_hal_msp.c:93:6:HAL_I2C_MspInit	40	static
+../Core/Src/stm32f1xx_hal_msp.c:127:6:HAL_I2C_MspDeInit	16	static
+../Core/Src/stm32f1xx_hal_msp.c:158:6:HAL_SPI_MspInit	40	static
+../Core/Src/stm32f1xx_hal_msp.c:198:6:HAL_SPI_MspDeInit	16	static
+../Core/Src/stm32f1xx_hal_msp.c:228:6:HAL_TIM_Base_MspInit	24	static
+../Core/Src/stm32f1xx_hal_msp.c:261:6:HAL_TIM_MspPostInit	40	static
+../Core/Src/stm32f1xx_hal_msp.c:291:6:HAL_TIM_Base_MspDeInit	16	static
+../Core/Src/stm32f1xx_hal_msp.c:326:13:HAL_FSMC_MspInit	32	static
+../Core/Src/stm32f1xx_hal_msp.c:385:6:HAL_SRAM_MspInit	16	static
+../Core/Src/stm32f1xx_hal_msp.c:397:13:HAL_FSMC_MspDeInit	8	static
+../Core/Src/stm32f1xx_hal_msp.c:445:6:HAL_SRAM_MspDeInit	16	static
diff --git a/Debug/Core/Src/stm32f1xx_it.cyclo b/Debug/Core/Src/stm32f1xx_it.cyclo
new file mode 100644
index 0000000..3eb21c2
--- /dev/null
+++ b/Debug/Core/Src/stm32f1xx_it.cyclo
@@ -0,0 +1,11 @@
+../Core/Src/stm32f1xx_it.c:71:6:NMI_Handler	1
+../Core/Src/stm32f1xx_it.c:86:6:HardFault_Handler	1
+../Core/Src/stm32f1xx_it.c:101:6:MemManage_Handler	1
+../Core/Src/stm32f1xx_it.c:116:6:BusFault_Handler	1
+../Core/Src/stm32f1xx_it.c:131:6:UsageFault_Handler	1
+../Core/Src/stm32f1xx_it.c:146:6:SVC_Handler	1
+../Core/Src/stm32f1xx_it.c:159:6:DebugMon_Handler	1
+../Core/Src/stm32f1xx_it.c:172:6:PendSV_Handler	1
+../Core/Src/stm32f1xx_it.c:185:6:SysTick_Handler	1
+../Core/Src/stm32f1xx_it.c:206:6:TIM4_IRQHandler	1
+../Core/Src/stm32f1xx_it.c:220:6:TIM6_IRQHandler	1
diff --git a/Debug/Core/Src/stm32f1xx_it.d b/Debug/Core/Src/stm32f1xx_it.d
index 4b98859..154be60 100644
--- a/Debug/Core/Src/stm32f1xx_it.d
+++ b/Debug/Core/Src/stm32f1xx_it.d
@@ -28,63 +28,33 @@ Core/Src/stm32f1xx_it.o: ../Core/Src/stm32f1xx_it.c ../Core/Inc/main.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
  ../Core/Inc/stm32f1xx_it.h
-
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
-
 ../Core/Inc/stm32f1xx_it.h:
diff --git a/Debug/Core/Src/stm32f1xx_it.su b/Debug/Core/Src/stm32f1xx_it.su
index afe1c19..8dde08c 100644
--- a/Debug/Core/Src/stm32f1xx_it.su
+++ b/Debug/Core/Src/stm32f1xx_it.su
@@ -1,11 +1,11 @@
-stm32f1xx_it.c:71:6:NMI_Handler	4	static
-stm32f1xx_it.c:86:6:HardFault_Handler	4	static
-stm32f1xx_it.c:101:6:MemManage_Handler	4	static
-stm32f1xx_it.c:116:6:BusFault_Handler	4	static
-stm32f1xx_it.c:131:6:UsageFault_Handler	4	static
-stm32f1xx_it.c:146:6:SVC_Handler	4	static
-stm32f1xx_it.c:159:6:DebugMon_Handler	4	static
-stm32f1xx_it.c:172:6:PendSV_Handler	4	static
-stm32f1xx_it.c:185:6:SysTick_Handler	8	static
-stm32f1xx_it.c:206:6:TIM4_IRQHandler	8	static
-stm32f1xx_it.c:220:6:TIM6_IRQHandler	8	static
+../Core/Src/stm32f1xx_it.c:71:6:NMI_Handler	4	static
+../Core/Src/stm32f1xx_it.c:86:6:HardFault_Handler	4	static
+../Core/Src/stm32f1xx_it.c:101:6:MemManage_Handler	4	static
+../Core/Src/stm32f1xx_it.c:116:6:BusFault_Handler	4	static
+../Core/Src/stm32f1xx_it.c:131:6:UsageFault_Handler	4	static
+../Core/Src/stm32f1xx_it.c:146:6:SVC_Handler	4	static
+../Core/Src/stm32f1xx_it.c:159:6:DebugMon_Handler	4	static
+../Core/Src/stm32f1xx_it.c:172:6:PendSV_Handler	4	static
+../Core/Src/stm32f1xx_it.c:185:6:SysTick_Handler	8	static
+../Core/Src/stm32f1xx_it.c:206:6:TIM4_IRQHandler	8	static
+../Core/Src/stm32f1xx_it.c:220:6:TIM6_IRQHandler	8	static
diff --git a/Debug/Core/Src/subdir.mk b/Debug/Core/Src/subdir.mk
index 6022ed5..2284b67 100644
--- a/Debug/Core/Src/subdir.mk
+++ b/Debug/Core/Src/subdir.mk
@@ -1,6 +1,6 @@
 ################################################################################
 # Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (9-2020-q2-update)
+# Toolchain: GNU Tools for STM32 (11.3.rel1)
 ################################################################################
 
 # Add inputs and outputs from these tool invocations to the build variables 
@@ -30,13 +30,13 @@ C_DEPS += \
 
 
 # Each subdirectory must supply rules for building sources it contributes
-Core/Src/%.o: ../Core/Src/%.c Core/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/Desktop/M3s_stm32/SW_APPs" -I"C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices" -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/m3s_stm32/SW_APPs" -I"C:/Users/wuwen/m3s_stm32/HW_Devices" -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 
 clean: clean-Core-2f-Src
 
 clean-Core-2f-Src:
-	-$(RM) ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/stm32f1xx_hal_msp.d ./Core/Src/stm32f1xx_hal_msp.o ./Core/Src/stm32f1xx_it.d ./Core/Src/stm32f1xx_it.o ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/system_stm32f1xx.d ./Core/Src/system_stm32f1xx.o
+	-$(RM) ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/stm32f1xx_hal_msp.cyclo ./Core/Src/stm32f1xx_hal_msp.d ./Core/Src/stm32f1xx_hal_msp.o ./Core/Src/stm32f1xx_hal_msp.su ./Core/Src/stm32f1xx_it.cyclo ./Core/Src/stm32f1xx_it.d ./Core/Src/stm32f1xx_it.o ./Core/Src/stm32f1xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32f1xx.cyclo ./Core/Src/system_stm32f1xx.d ./Core/Src/system_stm32f1xx.o ./Core/Src/system_stm32f1xx.su
 
 .PHONY: clean-Core-2f-Src
 
diff --git a/Debug/Core/Src/syscalls.cyclo b/Debug/Core/Src/syscalls.cyclo
new file mode 100644
index 0000000..09a837c
--- /dev/null
+++ b/Debug/Core/Src/syscalls.cyclo
@@ -0,0 +1,18 @@
+../Core/Src/syscalls.c:45:6:initialise_monitor_handles	1
+../Core/Src/syscalls.c:49:5:_getpid	1
+../Core/Src/syscalls.c:54:5:_kill	1
+../Core/Src/syscalls.c:60:6:_exit	1
+../Core/Src/syscalls.c:66:27:_read	2
+../Core/Src/syscalls.c:78:27:_write	2
+../Core/Src/syscalls.c:89:5:_close	1
+../Core/Src/syscalls.c:95:5:_fstat	1
+../Core/Src/syscalls.c:101:5:_isatty	1
+../Core/Src/syscalls.c:106:5:_lseek	1
+../Core/Src/syscalls.c:111:5:_open	1
+../Core/Src/syscalls.c:117:5:_wait	1
+../Core/Src/syscalls.c:123:5:_unlink	1
+../Core/Src/syscalls.c:129:5:_times	1
+../Core/Src/syscalls.c:134:5:_stat	1
+../Core/Src/syscalls.c:140:5:_link	1
+../Core/Src/syscalls.c:146:5:_fork	1
+../Core/Src/syscalls.c:152:5:_execve	1
diff --git a/Debug/Core/Src/syscalls.su b/Debug/Core/Src/syscalls.su
index 8afbb58..d5dec99 100644
--- a/Debug/Core/Src/syscalls.su
+++ b/Debug/Core/Src/syscalls.su
@@ -1,18 +1,18 @@
-syscalls.c:45:6:initialise_monitor_handles	4	static
-syscalls.c:49:5:_getpid	4	static
-syscalls.c:54:5:_kill	16	static
-syscalls.c:60:6:_exit	16	static
-syscalls.c:66:27:_read	32	static
-syscalls.c:78:27:_write	32	static
-syscalls.c:89:5:_close	16	static
-syscalls.c:95:5:_fstat	16	static
-syscalls.c:101:5:_isatty	16	static
-syscalls.c:106:5:_lseek	24	static
-syscalls.c:111:5:_open	12	static
-syscalls.c:117:5:_wait	16	static
-syscalls.c:123:5:_unlink	16	static
-syscalls.c:129:5:_times	16	static
-syscalls.c:134:5:_stat	16	static
-syscalls.c:140:5:_link	16	static
-syscalls.c:146:5:_fork	8	static
-syscalls.c:152:5:_execve	24	static
+../Core/Src/syscalls.c:45:6:initialise_monitor_handles	4	static
+../Core/Src/syscalls.c:49:5:_getpid	4	static
+../Core/Src/syscalls.c:54:5:_kill	16	static
+../Core/Src/syscalls.c:60:6:_exit	16	static
+../Core/Src/syscalls.c:66:27:_read	32	static
+../Core/Src/syscalls.c:78:27:_write	32	static
+../Core/Src/syscalls.c:89:5:_close	16	static
+../Core/Src/syscalls.c:95:5:_fstat	16	static
+../Core/Src/syscalls.c:101:5:_isatty	16	static
+../Core/Src/syscalls.c:106:5:_lseek	24	static
+../Core/Src/syscalls.c:111:5:_open	12	static
+../Core/Src/syscalls.c:117:5:_wait	16	static
+../Core/Src/syscalls.c:123:5:_unlink	16	static
+../Core/Src/syscalls.c:129:5:_times	16	static
+../Core/Src/syscalls.c:134:5:_stat	16	static
+../Core/Src/syscalls.c:140:5:_link	16	static
+../Core/Src/syscalls.c:146:5:_fork	8	static
+../Core/Src/syscalls.c:152:5:_execve	24	static
diff --git a/Debug/Core/Src/sysmem.cyclo b/Debug/Core/Src/sysmem.cyclo
new file mode 100644
index 0000000..425219b
--- /dev/null
+++ b/Debug/Core/Src/sysmem.cyclo
@@ -0,0 +1 @@
+../Core/Src/sysmem.c:54:7:_sbrk	3
diff --git a/Debug/Core/Src/sysmem.su b/Debug/Core/Src/sysmem.su
index 4474c68..07e3d10 100644
--- a/Debug/Core/Src/sysmem.su
+++ b/Debug/Core/Src/sysmem.su
@@ -1 +1 @@
-sysmem.c:54:7:_sbrk	32	static
+../Core/Src/sysmem.c:54:7:_sbrk	32	static
diff --git a/Debug/Core/Src/system_stm32f1xx.cyclo b/Debug/Core/Src/system_stm32f1xx.cyclo
new file mode 100644
index 0000000..5896fc0
--- /dev/null
+++ b/Debug/Core/Src/system_stm32f1xx.cyclo
@@ -0,0 +1,2 @@
+../Core/Src/system_stm32f1xx.c:176:6:SystemInit	1
+../Core/Src/system_stm32f1xx.c:225:6:SystemCoreClockUpdate	7
diff --git a/Debug/Core/Src/system_stm32f1xx.d b/Debug/Core/Src/system_stm32f1xx.d
index 9872ccf..04f1770 100644
--- a/Debug/Core/Src/system_stm32f1xx.d
+++ b/Debug/Core/Src/system_stm32f1xx.d
@@ -27,59 +27,31 @@ Core/Src/system_stm32f1xx.o: ../Core/Src/system_stm32f1xx.c \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Core/Src/system_stm32f1xx.su b/Debug/Core/Src/system_stm32f1xx.su
index 967fb21..6a600c8 100644
--- a/Debug/Core/Src/system_stm32f1xx.su
+++ b/Debug/Core/Src/system_stm32f1xx.su
@@ -1,2 +1,2 @@
-system_stm32f1xx.c:176:6:SystemInit	4	static
-system_stm32f1xx.c:225:6:SystemCoreClockUpdate	24	static
+../Core/Src/system_stm32f1xx.c:176:6:SystemInit	4	static
+../Core/Src/system_stm32f1xx.c:225:6:SystemCoreClockUpdate	24	static
diff --git a/Debug/Core/Startup/subdir.mk b/Debug/Core/Startup/subdir.mk
index dead2cb..1c62f73 100644
--- a/Debug/Core/Startup/subdir.mk
+++ b/Debug/Core/Startup/subdir.mk
@@ -1,6 +1,6 @@
 ################################################################################
 # Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (9-2020-q2-update)
+# Toolchain: GNU Tools for STM32 (11.3.rel1)
 ################################################################################
 
 # Add inputs and outputs from these tool invocations to the build variables 
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cyclo
new file mode 100644
index 0000000..9570d3e
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cyclo
@@ -0,0 +1,25 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:142:19:HAL_Init	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:175:19:HAL_DeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:200:13:HAL_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:211:13:HAL_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:234:26:HAL_InitTick	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:293:13:HAL_IncTick	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:304:17:HAL_GetTick	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:313:10:HAL_GetTickPrio	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:322:19:HAL_SetTickFreq	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:354:21:HAL_GetTickFreq	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:370:13:HAL_Delay	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:396:13:HAL_SuspendTick	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:412:13:HAL_ResumeTick	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:422:10:HAL_GetHalVersion	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:438:10:HAL_GetREVID	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:454:10:HAL_GetDEVID	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:463:10:HAL_GetUIDw0	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:472:10:HAL_GetUIDw1	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:481:10:HAL_GetUIDw2	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:490:6:HAL_DBGMCU_EnableDBGSleepMode	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:506:6:HAL_DBGMCU_DisableDBGSleepMode	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:536:6:HAL_DBGMCU_EnableDBGStopMode	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:552:6:HAL_DBGMCU_DisableDBGStopMode	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:568:6:HAL_DBGMCU_EnableDBGStandbyMode	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:584:6:HAL_DBGMCU_DisableDBGStandbyMode	1
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d
index 50471bb..79443a7 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.su
index b50d33d..e86124f 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.su
@@ -1,25 +1,25 @@
-stm32f1xx_hal.c:142:19:HAL_Init	8	static
-stm32f1xx_hal.c:175:19:HAL_DeInit	8	static
-stm32f1xx_hal.c:200:13:HAL_MspInit	4	static
-stm32f1xx_hal.c:211:13:HAL_MspDeInit	4	static
-stm32f1xx_hal.c:234:26:HAL_InitTick	16	static
-stm32f1xx_hal.c:293:13:HAL_IncTick	4	static
-stm32f1xx_hal.c:304:17:HAL_GetTick	4	static
-stm32f1xx_hal.c:313:10:HAL_GetTickPrio	4	static
-stm32f1xx_hal.c:322:19:HAL_SetTickFreq	24	static
-stm32f1xx_hal.c:354:21:HAL_GetTickFreq	4	static
-stm32f1xx_hal.c:370:13:HAL_Delay	24	static
-stm32f1xx_hal.c:396:13:HAL_SuspendTick	4	static
-stm32f1xx_hal.c:412:13:HAL_ResumeTick	4	static
-stm32f1xx_hal.c:422:10:HAL_GetHalVersion	4	static
-stm32f1xx_hal.c:438:10:HAL_GetREVID	4	static
-stm32f1xx_hal.c:454:10:HAL_GetDEVID	4	static
-stm32f1xx_hal.c:463:10:HAL_GetUIDw0	4	static
-stm32f1xx_hal.c:472:10:HAL_GetUIDw1	4	static
-stm32f1xx_hal.c:481:10:HAL_GetUIDw2	4	static
-stm32f1xx_hal.c:490:6:HAL_DBGMCU_EnableDBGSleepMode	4	static
-stm32f1xx_hal.c:506:6:HAL_DBGMCU_DisableDBGSleepMode	4	static
-stm32f1xx_hal.c:536:6:HAL_DBGMCU_EnableDBGStopMode	4	static
-stm32f1xx_hal.c:552:6:HAL_DBGMCU_DisableDBGStopMode	4	static
-stm32f1xx_hal.c:568:6:HAL_DBGMCU_EnableDBGStandbyMode	4	static
-stm32f1xx_hal.c:584:6:HAL_DBGMCU_DisableDBGStandbyMode	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:142:19:HAL_Init	8	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:175:19:HAL_DeInit	8	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:200:13:HAL_MspInit	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:211:13:HAL_MspDeInit	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:234:26:HAL_InitTick	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:293:13:HAL_IncTick	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:304:17:HAL_GetTick	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:313:10:HAL_GetTickPrio	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:322:19:HAL_SetTickFreq	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:354:21:HAL_GetTickFreq	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:370:13:HAL_Delay	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:396:13:HAL_SuspendTick	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:412:13:HAL_ResumeTick	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:422:10:HAL_GetHalVersion	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:438:10:HAL_GetREVID	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:454:10:HAL_GetDEVID	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:463:10:HAL_GetUIDw0	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:472:10:HAL_GetUIDw1	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:481:10:HAL_GetUIDw2	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:490:6:HAL_DBGMCU_EnableDBGSleepMode	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:506:6:HAL_DBGMCU_DisableDBGSleepMode	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:536:6:HAL_DBGMCU_EnableDBGStopMode	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:552:6:HAL_DBGMCU_DisableDBGStopMode	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:568:6:HAL_DBGMCU_EnableDBGStandbyMode	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c:584:6:HAL_DBGMCU_DisableDBGStandbyMode	4	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.cyclo
new file mode 100644
index 0000000..1957771
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.cyclo
@@ -0,0 +1,29 @@
+../Drivers/CMSIS/Include/core_cm3.h:1480:22:__NVIC_SetPriorityGrouping	1
+../Drivers/CMSIS/Include/core_cm3.h:1499:26:__NVIC_GetPriorityGrouping	1
+../Drivers/CMSIS/Include/core_cm3.h:1511:22:__NVIC_EnableIRQ	2
+../Drivers/CMSIS/Include/core_cm3.h:1547:22:__NVIC_DisableIRQ	2
+../Drivers/CMSIS/Include/core_cm3.h:1566:26:__NVIC_GetPendingIRQ	2
+../Drivers/CMSIS/Include/core_cm3.h:1585:22:__NVIC_SetPendingIRQ	2
+../Drivers/CMSIS/Include/core_cm3.h:1600:22:__NVIC_ClearPendingIRQ	2
+../Drivers/CMSIS/Include/core_cm3.h:1617:26:__NVIC_GetActive	2
+../Drivers/CMSIS/Include/core_cm3.h:1639:22:__NVIC_SetPriority	2
+../Drivers/CMSIS/Include/core_cm3.h:1661:26:__NVIC_GetPriority	2
+../Drivers/CMSIS/Include/core_cm3.h:1686:26:NVIC_EncodePriority	2
+../Drivers/CMSIS/Include/core_cm3.h:1713:22:NVIC_DecodePriority	2
+../Drivers/CMSIS/Include/core_cm3.h:1762:34:__NVIC_SystemReset	1
+../Drivers/CMSIS/Include/core_cm3.h:1834:26:SysTick_Config	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:143:6:HAL_NVIC_SetPriorityGrouping	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:165:6:HAL_NVIC_SetPriority	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:187:6:HAL_NVIC_EnableIRQ	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:203:6:HAL_NVIC_DisableIRQ	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:216:6:HAL_NVIC_SystemReset	0
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:229:10:HAL_SYSTICK_Config	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:344:10:HAL_NVIC_GetPriorityGrouping	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:371:6:HAL_NVIC_GetPriority	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:386:6:HAL_NVIC_SetPendingIRQ	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:404:10:HAL_NVIC_GetPendingIRQ	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:420:6:HAL_NVIC_ClearPendingIRQ	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:437:10:HAL_NVIC_GetActive	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:454:6:HAL_SYSTICK_CLKSourceConfig	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:472:6:HAL_SYSTICK_IRQHandler	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:481:13:HAL_SYSTICK_Callback	1
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d
index 90a1e16..44875b2 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.su
index 634528a..cb0488b 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.su
@@ -1,29 +1,29 @@
-core_cm3.h:1480:22:__NVIC_SetPriorityGrouping	24	static
-core_cm3.h:1499:26:__NVIC_GetPriorityGrouping	4	static
-core_cm3.h:1511:22:__NVIC_EnableIRQ	16	static
-core_cm3.h:1547:22:__NVIC_DisableIRQ	16	static,ignoring_inline_asm
-core_cm3.h:1566:26:__NVIC_GetPendingIRQ	16	static
-core_cm3.h:1585:22:__NVIC_SetPendingIRQ	16	static
-core_cm3.h:1600:22:__NVIC_ClearPendingIRQ	16	static
-core_cm3.h:1617:26:__NVIC_GetActive	16	static
-core_cm3.h:1639:22:__NVIC_SetPriority	16	static
-core_cm3.h:1661:26:__NVIC_GetPriority	16	static
-core_cm3.h:1686:26:NVIC_EncodePriority	40	static
-core_cm3.h:1713:22:NVIC_DecodePriority	40	static
-core_cm3.h:1762:34:__NVIC_SystemReset	4	static,ignoring_inline_asm
-core_cm3.h:1834:26:SysTick_Config	16	static
-stm32f1xx_hal_cortex.c:143:6:HAL_NVIC_SetPriorityGrouping	16	static
-stm32f1xx_hal_cortex.c:165:6:HAL_NVIC_SetPriority	32	static
-stm32f1xx_hal_cortex.c:187:6:HAL_NVIC_EnableIRQ	16	static
-stm32f1xx_hal_cortex.c:203:6:HAL_NVIC_DisableIRQ	16	static
-stm32f1xx_hal_cortex.c:216:6:HAL_NVIC_SystemReset	8	static
-stm32f1xx_hal_cortex.c:229:10:HAL_SYSTICK_Config	16	static
-stm32f1xx_hal_cortex.c:344:10:HAL_NVIC_GetPriorityGrouping	8	static
-stm32f1xx_hal_cortex.c:371:6:HAL_NVIC_GetPriority	24	static
-stm32f1xx_hal_cortex.c:386:6:HAL_NVIC_SetPendingIRQ	16	static
-stm32f1xx_hal_cortex.c:404:10:HAL_NVIC_GetPendingIRQ	16	static
-stm32f1xx_hal_cortex.c:420:6:HAL_NVIC_ClearPendingIRQ	16	static
-stm32f1xx_hal_cortex.c:437:10:HAL_NVIC_GetActive	16	static
-stm32f1xx_hal_cortex.c:454:6:HAL_SYSTICK_CLKSourceConfig	16	static
-stm32f1xx_hal_cortex.c:472:6:HAL_SYSTICK_IRQHandler	8	static
-stm32f1xx_hal_cortex.c:481:13:HAL_SYSTICK_Callback	4	static
+../Drivers/CMSIS/Include/core_cm3.h:1480:22:__NVIC_SetPriorityGrouping	24	static
+../Drivers/CMSIS/Include/core_cm3.h:1499:26:__NVIC_GetPriorityGrouping	4	static
+../Drivers/CMSIS/Include/core_cm3.h:1511:22:__NVIC_EnableIRQ	16	static
+../Drivers/CMSIS/Include/core_cm3.h:1547:22:__NVIC_DisableIRQ	16	static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm3.h:1566:26:__NVIC_GetPendingIRQ	16	static
+../Drivers/CMSIS/Include/core_cm3.h:1585:22:__NVIC_SetPendingIRQ	16	static
+../Drivers/CMSIS/Include/core_cm3.h:1600:22:__NVIC_ClearPendingIRQ	16	static
+../Drivers/CMSIS/Include/core_cm3.h:1617:26:__NVIC_GetActive	16	static
+../Drivers/CMSIS/Include/core_cm3.h:1639:22:__NVIC_SetPriority	16	static
+../Drivers/CMSIS/Include/core_cm3.h:1661:26:__NVIC_GetPriority	16	static
+../Drivers/CMSIS/Include/core_cm3.h:1686:26:NVIC_EncodePriority	40	static
+../Drivers/CMSIS/Include/core_cm3.h:1713:22:NVIC_DecodePriority	40	static
+../Drivers/CMSIS/Include/core_cm3.h:1762:34:__NVIC_SystemReset	4	static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm3.h:1834:26:SysTick_Config	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:143:6:HAL_NVIC_SetPriorityGrouping	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:165:6:HAL_NVIC_SetPriority	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:187:6:HAL_NVIC_EnableIRQ	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:203:6:HAL_NVIC_DisableIRQ	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:216:6:HAL_NVIC_SystemReset	8	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:229:10:HAL_SYSTICK_Config	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:344:10:HAL_NVIC_GetPriorityGrouping	8	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:371:6:HAL_NVIC_GetPriority	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:386:6:HAL_NVIC_SetPendingIRQ	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:404:10:HAL_NVIC_GetPendingIRQ	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:420:6:HAL_NVIC_ClearPendingIRQ	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:437:10:HAL_NVIC_GetActive	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:454:6:HAL_SYSTICK_CLKSourceConfig	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:472:6:HAL_SYSTICK_IRQHandler	8	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c:481:13:HAL_SYSTICK_Callback	4	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.cyclo
new file mode 100644
index 0000000..a9560f9
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.cyclo
@@ -0,0 +1,13 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:143:19:HAL_DMA_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:220:19:HAL_DMA_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:319:19:HAL_DMA_Start	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:362:19:HAL_DMA_Start_IT	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:416:19:HAL_DMA_Abort	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:457:19:HAL_DMA_Abort_IT	26
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:502:19:HAL_DMA_PollForTransfer	102
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:603:6:HAL_DMA_IRQHandler	58
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:693:19:HAL_DMA_RegisterCallback	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:744:19:HAL_DMA_UnRegisterCallback	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:820:22:HAL_DMA_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:832:10:HAL_DMA_GetError	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:858:13:DMA_SetConfig	2
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d
index 95d1e55..16ce2a0 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.su
index 5c24809..63b0da8 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.su
@@ -1,13 +1,13 @@
-stm32f1xx_hal_dma.c:143:19:HAL_DMA_Init	24	static
-stm32f1xx_hal_dma.c:220:19:HAL_DMA_DeInit	16	static
-stm32f1xx_hal_dma.c:319:19:HAL_DMA_Start	32	static
-stm32f1xx_hal_dma.c:362:19:HAL_DMA_Start_IT	32	static
-stm32f1xx_hal_dma.c:416:19:HAL_DMA_Abort	24	static
-stm32f1xx_hal_dma.c:457:19:HAL_DMA_Abort_IT	24	static
-stm32f1xx_hal_dma.c:502:19:HAL_DMA_PollForTransfer	32	static
-stm32f1xx_hal_dma.c:603:6:HAL_DMA_IRQHandler	24	static
-stm32f1xx_hal_dma.c:693:19:HAL_DMA_RegisterCallback	32	static
-stm32f1xx_hal_dma.c:744:19:HAL_DMA_UnRegisterCallback	24	static
-stm32f1xx_hal_dma.c:820:22:HAL_DMA_GetState	16	static
-stm32f1xx_hal_dma.c:832:10:HAL_DMA_GetError	16	static
-stm32f1xx_hal_dma.c:858:13:DMA_SetConfig	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:143:19:HAL_DMA_Init	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:220:19:HAL_DMA_DeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:319:19:HAL_DMA_Start	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:362:19:HAL_DMA_Start_IT	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:416:19:HAL_DMA_Abort	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:457:19:HAL_DMA_Abort_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:502:19:HAL_DMA_PollForTransfer	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:603:6:HAL_DMA_IRQHandler	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:693:19:HAL_DMA_RegisterCallback	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:744:19:HAL_DMA_UnRegisterCallback	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:820:22:HAL_DMA_GetState	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:832:10:HAL_DMA_GetError	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c:858:13:DMA_SetConfig	24	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.cyclo
new file mode 100644
index 0000000..cf51798
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.cyclo
@@ -0,0 +1,9 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:143:19:HAL_EXTI_SetConfigLine	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:238:19:HAL_EXTI_GetConfigLine	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:317:19:HAL_EXTI_ClearConfigLine	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:370:19:HAL_EXTI_RegisterCallback	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:395:19:HAL_EXTI_GetHandle	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:435:6:HAL_EXTI_IRQHandler	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:467:10:HAL_EXTI_GetPending	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:499:6:HAL_EXTI_ClearPending	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:523:6:HAL_EXTI_GenerateSWI	1
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d
index fdcf066..6ebf0ec 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.su
index f6f8c99..337023f 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.su
@@ -1,9 +1,9 @@
-stm32f1xx_hal_exti.c:143:19:HAL_EXTI_SetConfigLine	32	static
-stm32f1xx_hal_exti.c:238:19:HAL_EXTI_GetConfigLine	32	static
-stm32f1xx_hal_exti.c:317:19:HAL_EXTI_ClearConfigLine	32	static
-stm32f1xx_hal_exti.c:370:19:HAL_EXTI_RegisterCallback	32	static
-stm32f1xx_hal_exti.c:395:19:HAL_EXTI_GetHandle	16	static
-stm32f1xx_hal_exti.c:435:6:HAL_EXTI_IRQHandler	24	static
-stm32f1xx_hal_exti.c:467:10:HAL_EXTI_GetPending	32	static
-stm32f1xx_hal_exti.c:499:6:HAL_EXTI_ClearPending	24	static
-stm32f1xx_hal_exti.c:523:6:HAL_EXTI_GenerateSWI	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:143:19:HAL_EXTI_SetConfigLine	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:238:19:HAL_EXTI_GetConfigLine	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:317:19:HAL_EXTI_ClearConfigLine	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:370:19:HAL_EXTI_RegisterCallback	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:395:19:HAL_EXTI_GetHandle	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:435:6:HAL_EXTI_IRQHandler	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:467:10:HAL_EXTI_GetPending	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:499:6:HAL_EXTI_ClearPending	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c:523:6:HAL_EXTI_GenerateSWI	24	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.cyclo
new file mode 100644
index 0000000..b79e62a
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.cyclo
@@ -0,0 +1,14 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:168:19:HAL_FLASH_Program	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:267:19:HAL_FLASH_Program_IT	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:332:6:HAL_FLASH_IRQHandler	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:606:13:HAL_FLASH_EndOfOperationCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:624:13:HAL_FLASH_OperationErrorCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:657:19:HAL_FLASH_Unlock	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:695:19:HAL_FLASH_Lock	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:712:19:HAL_FLASH_OB_Unlock	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:732:19:HAL_FLASH_OB_Lock	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:745:6:HAL_FLASH_OB_Launch	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:774:10:HAL_FLASH_GetError	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:797:13:FLASH_Program_HalfWord	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:826:19:FLASH_WaitForLastOperation	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:914:13:FLASH_SetErrorCode	5
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d
index 78e3461..b4eda38 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.su
index 9238093..f62a64d 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.su
@@ -1,14 +1,14 @@
-stm32f1xx_hal_flash.c:168:19:HAL_FLASH_Program	48	static
-stm32f1xx_hal_flash.c:267:19:HAL_FLASH_Program_IT	32	static
-stm32f1xx_hal_flash.c:332:6:HAL_FLASH_IRQHandler	16	static
-stm32f1xx_hal_flash.c:606:13:HAL_FLASH_EndOfOperationCallback	16	static
-stm32f1xx_hal_flash.c:624:13:HAL_FLASH_OperationErrorCallback	16	static
-stm32f1xx_hal_flash.c:657:19:HAL_FLASH_Unlock	16	static
-stm32f1xx_hal_flash.c:695:19:HAL_FLASH_Lock	4	static
-stm32f1xx_hal_flash.c:712:19:HAL_FLASH_OB_Unlock	4	static
-stm32f1xx_hal_flash.c:732:19:HAL_FLASH_OB_Lock	4	static
-stm32f1xx_hal_flash.c:745:6:HAL_FLASH_OB_Launch	8	static
-stm32f1xx_hal_flash.c:774:10:HAL_FLASH_GetError	4	static
-stm32f1xx_hal_flash.c:797:13:FLASH_Program_HalfWord	16	static
-stm32f1xx_hal_flash.c:826:19:FLASH_WaitForLastOperation	24	static
-stm32f1xx_hal_flash.c:914:13:FLASH_SetErrorCode	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:168:19:HAL_FLASH_Program	48	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:267:19:HAL_FLASH_Program_IT	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:332:6:HAL_FLASH_IRQHandler	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:606:13:HAL_FLASH_EndOfOperationCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:624:13:HAL_FLASH_OperationErrorCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:657:19:HAL_FLASH_Unlock	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:695:19:HAL_FLASH_Lock	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:712:19:HAL_FLASH_OB_Unlock	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:732:19:HAL_FLASH_OB_Lock	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:745:6:HAL_FLASH_OB_Launch	8	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:774:10:HAL_FLASH_GetError	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:797:13:FLASH_Program_HalfWord	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:826:19:FLASH_WaitForLastOperation	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c:914:13:FLASH_SetErrorCode	16	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.cyclo
new file mode 100644
index 0000000..07d971c
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.cyclo
@@ -0,0 +1,16 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:159:19:HAL_FLASHEx_Erase	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:319:19:HAL_FLASHEx_Erase_IT	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:397:19:HAL_FLASHEx_OBErase	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:446:19:HAL_FLASHEx_OBProgram	11
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:527:6:HAL_FLASHEx_OBGetConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:549:10:HAL_FLASHEx_OBGetUserData	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:595:13:FLASH_MassErase	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:644:26:FLASH_OB_EnableWRP	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:767:26:FLASH_OB_DisableWRP	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:886:26:FLASH_OB_RDP_LevelConfig	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:937:26:FLASH_OB_UserConfig	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:988:26:FLASH_OB_ProgramData	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1021:17:FLASH_OB_GetWRP	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1034:17:FLASH_OB_GetRDP	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1060:16:FLASH_OB_GetUser	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1089:6:FLASH_PageErase	1
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d
index 19dca61..26c9bfb 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.su
index 354b9bf..9963995 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.su
@@ -1,16 +1,16 @@
-stm32f1xx_hal_flash_ex.c:159:19:HAL_FLASHEx_Erase	24	static
-stm32f1xx_hal_flash_ex.c:319:19:HAL_FLASHEx_Erase_IT	24	static
-stm32f1xx_hal_flash_ex.c:397:19:HAL_FLASHEx_OBErase	16	static
-stm32f1xx_hal_flash_ex.c:446:19:HAL_FLASHEx_OBProgram	24	static
-stm32f1xx_hal_flash_ex.c:527:6:HAL_FLASHEx_OBGetConfig	16	static
-stm32f1xx_hal_flash_ex.c:549:10:HAL_FLASHEx_OBGetUserData	24	static
-stm32f1xx_hal_flash_ex.c:595:13:FLASH_MassErase	16	static
-stm32f1xx_hal_flash_ex.c:644:26:FLASH_OB_EnableWRP	32	static
-stm32f1xx_hal_flash_ex.c:767:26:FLASH_OB_DisableWRP	32	static
-stm32f1xx_hal_flash_ex.c:886:26:FLASH_OB_RDP_LevelConfig	24	static
-stm32f1xx_hal_flash_ex.c:937:26:FLASH_OB_UserConfig	24	static
-stm32f1xx_hal_flash_ex.c:988:26:FLASH_OB_ProgramData	24	static
-stm32f1xx_hal_flash_ex.c:1021:17:FLASH_OB_GetWRP	4	static
-stm32f1xx_hal_flash_ex.c:1034:17:FLASH_OB_GetRDP	16	static
-stm32f1xx_hal_flash_ex.c:1060:16:FLASH_OB_GetUser	4	static
-stm32f1xx_hal_flash_ex.c:1089:6:FLASH_PageErase	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:159:19:HAL_FLASHEx_Erase	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:319:19:HAL_FLASHEx_Erase_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:397:19:HAL_FLASHEx_OBErase	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:446:19:HAL_FLASHEx_OBProgram	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:527:6:HAL_FLASHEx_OBGetConfig	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:549:10:HAL_FLASHEx_OBGetUserData	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:595:13:FLASH_MassErase	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:644:26:FLASH_OB_EnableWRP	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:767:26:FLASH_OB_DisableWRP	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:886:26:FLASH_OB_RDP_LevelConfig	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:937:26:FLASH_OB_UserConfig	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:988:26:FLASH_OB_ProgramData	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1021:17:FLASH_OB_GetWRP	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1034:17:FLASH_OB_GetRDP	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1060:16:FLASH_OB_GetUser	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c:1089:6:FLASH_PageErase	16	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.cyclo
new file mode 100644
index 0000000..f5572d0
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.cyclo
@@ -0,0 +1,8 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:178:6:HAL_GPIO_Init	36
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:351:6:HAL_GPIO_DeInit	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:431:15:HAL_GPIO_ReadPin	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:465:6:HAL_GPIO_WritePin	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:487:6:HAL_GPIO_TogglePin	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:511:19:HAL_GPIO_LockPin	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:546:6:HAL_GPIO_EXTI_IRQHandler	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:561:13:HAL_GPIO_EXTI_Callback	1
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d
index 98acb76..f8b1f2e 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.su
index 27b52b4..9e46e34 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.su
@@ -1,8 +1,8 @@
-stm32f1xx_hal_gpio.c:178:6:HAL_GPIO_Init	48	static
-stm32f1xx_hal_gpio.c:351:6:HAL_GPIO_DeInit	40	static
-stm32f1xx_hal_gpio.c:431:15:HAL_GPIO_ReadPin	24	static
-stm32f1xx_hal_gpio.c:465:6:HAL_GPIO_WritePin	16	static
-stm32f1xx_hal_gpio.c:487:6:HAL_GPIO_TogglePin	24	static
-stm32f1xx_hal_gpio.c:511:19:HAL_GPIO_LockPin	24	static
-stm32f1xx_hal_gpio.c:546:6:HAL_GPIO_EXTI_IRQHandler	16	static
-stm32f1xx_hal_gpio.c:561:13:HAL_GPIO_EXTI_Callback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:178:6:HAL_GPIO_Init	48	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:351:6:HAL_GPIO_DeInit	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:431:15:HAL_GPIO_ReadPin	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:465:6:HAL_GPIO_WritePin	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:487:6:HAL_GPIO_TogglePin	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:511:19:HAL_GPIO_LockPin	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:546:6:HAL_GPIO_EXTI_IRQHandler	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c:561:13:HAL_GPIO_EXTI_Callback	16	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.cyclo
new file mode 100644
index 0000000..8b9bf69
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.cyclo
@@ -0,0 +1,3 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c:81:6:HAL_GPIOEx_ConfigEventout	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c:95:6:HAL_GPIOEx_EnableEventout	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c:104:6:HAL_GPIOEx_DisableEventout	1
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d
index 73fc397..0aa74ed 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.su
index 87a538a..d484009 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.su
@@ -1,3 +1,3 @@
-stm32f1xx_hal_gpio_ex.c:81:6:HAL_GPIOEx_ConfigEventout	16	static
-stm32f1xx_hal_gpio_ex.c:95:6:HAL_GPIOEx_EnableEventout	4	static
-stm32f1xx_hal_gpio_ex.c:104:6:HAL_GPIOEx_DisableEventout	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c:81:6:HAL_GPIOEx_ConfigEventout	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c:95:6:HAL_GPIOEx_EnableEventout	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c:104:6:HAL_GPIOEx_DisableEventout	4	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.cyclo
new file mode 100644
index 0000000..a5bd873
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.cyclo
@@ -0,0 +1,81 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:453:19:HAL_I2C_Init	11
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:568:19:HAL_I2C_DeInit	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:614:13:HAL_I2C_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:630:13:HAL_I2C_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1050:19:HAL_I2C_Master_Transmit	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1171:19:HAL_I2C_Master_Receive	20
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1462:19:HAL_I2C_Slave_Transmit	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1592:19:HAL_I2C_Slave_Receive	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1713:19:HAL_I2C_Master_Transmit_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1793:19:HAL_I2C_Master_Receive_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1876:19:HAL_I2C_Slave_Transmit_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1938:19:HAL_I2C_Slave_Receive_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:2002:19:HAL_I2C_Master_Transmit_DMA	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:2158:19:HAL_I2C_Master_Receive_DMA	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:2312:19:HAL_I2C_Slave_Transmit_DMA	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:2424:19:HAL_I2C_Slave_Receive_DMA	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:2541:19:HAL_I2C_Mem_Write	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:2664:19:HAL_I2C_Mem_Read	20
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:2960:19:HAL_I2C_Mem_Write_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:3048:19:HAL_I2C_Mem_Read_IT	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:3142:19:HAL_I2C_Mem_Write_DMA	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:3321:19:HAL_I2C_Mem_Read_DMA	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:3514:19:HAL_I2C_IsDeviceReady	16
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:3650:19:HAL_I2C_Master_Seq_Transmit_IT	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:3748:19:HAL_I2C_Master_Seq_Transmit_DMA	23
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:3931:19:HAL_I2C_Master_Seq_Receive_IT	17
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4055:19:HAL_I2C_Master_Seq_Receive_DMA	30
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4273:19:HAL_I2C_Slave_Seq_Transmit_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4339:19:HAL_I2C_Slave_Seq_Transmit_DMA	16
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4513:19:HAL_I2C_Slave_Seq_Receive_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4579:19:HAL_I2C_Slave_Seq_Receive_DMA	16
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4749:19:HAL_I2C_EnableListen_IT	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4782:19:HAL_I2C_DisableListen_IT	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4817:19:HAL_I2C_Master_Abort_IT	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4876:6:HAL_I2C_EV_IRQHandler	46
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5045:6:HAL_I2C_ER_IRQHandler	18
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5128:13:HAL_I2C_MasterTxCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5144:13:HAL_I2C_MasterRxCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5159:13:HAL_I2C_SlaveTxCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5175:13:HAL_I2C_SlaveRxCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5193:13:HAL_I2C_AddrCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5211:13:HAL_I2C_ListenCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5227:13:HAL_I2C_MemTxCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5243:13:HAL_I2C_MemRxCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5259:13:HAL_I2C_ErrorCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5275:13:HAL_I2C_AbortCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5310:22:HAL_I2C_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5322:21:HAL_I2C_GetMode	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5333:10:HAL_I2C_GetError	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5356:13:I2C_MasterTransmit_TXE	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5450:13:I2C_MasterTransmit_BTF	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5529:13:I2C_MemoryTransmit_TXE_BTF	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5615:13:I2C_MasterReceive_RXNE	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5723:13:I2C_MasterReceive_BTF	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5849:13:I2C_Master_SB	11
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5910:13:I2C_Master_ADD10	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5929:13:I2C_Master_ADDR	33
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6077:13:I2C_SlaveTransmit_TXE	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6118:13:I2C_SlaveTransmit_BTF	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6139:13:I2C_SlaveReceive_RXNE	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6180:13:I2C_SlaveReceive_BTF	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6202:13:I2C_Slave_ADDR	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6253:13:I2C_Slave_STOPF	19
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6422:13:I2C_Slave_AF	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6488:13:I2C_ITError	21
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6654:26:I2C_MasterRequestWrite	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6724:26:I2C_MasterRequestRead	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6824:26:I2C_RequestMemoryWrite	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6904:26:I2C_RequestMemoryRead	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7013:13:I2C_DMAXferCplt	16
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7151:13:I2C_DMAError	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7186:13:I2C_DMAAbort	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7289:26:I2C_WaitOnFlagUntilTimeout	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7323:26:I2C_WaitOnMasterAddressFlagUntilTimeout	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7374:26:I2C_WaitOnTXEFlagUntilTimeout	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7412:26:I2C_WaitOnBTFFlagUntilTimeout	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7450:26:I2C_WaitOnSTOPFlagUntilTimeout	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7483:26:I2C_WaitOnSTOPRequestThroughIT	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7512:26:I2C_WaitOnRXNEFlagUntilTimeout	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7557:26:I2C_IsAcknowledgeFailed	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7582:13:I2C_ConvertOtherXferOptions	3
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d
index a5eaf37..82e0f49 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.su
index 77037a9..b78cdef 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.su
@@ -1,81 +1,81 @@
-stm32f1xx_hal_i2c.c:453:19:HAL_I2C_Init	24	static
-stm32f1xx_hal_i2c.c:568:19:HAL_I2C_DeInit	16	static
-stm32f1xx_hal_i2c.c:614:13:HAL_I2C_MspInit	16	static
-stm32f1xx_hal_i2c.c:630:13:HAL_I2C_MspDeInit	16	static
-stm32f1xx_hal_i2c.c:1050:19:HAL_I2C_Master_Transmit	40	static
-stm32f1xx_hal_i2c.c:1171:19:HAL_I2C_Master_Receive	56	static,ignoring_inline_asm
-stm32f1xx_hal_i2c.c:1462:19:HAL_I2C_Slave_Transmit	48	static
-stm32f1xx_hal_i2c.c:1592:19:HAL_I2C_Slave_Receive	48	static
-stm32f1xx_hal_i2c.c:1713:19:HAL_I2C_Master_Transmit_IT	32	static
-stm32f1xx_hal_i2c.c:1793:19:HAL_I2C_Master_Receive_IT	32	static
-stm32f1xx_hal_i2c.c:1876:19:HAL_I2C_Slave_Transmit_IT	24	static
-stm32f1xx_hal_i2c.c:1938:19:HAL_I2C_Slave_Receive_IT	24	static
-stm32f1xx_hal_i2c.c:2002:19:HAL_I2C_Master_Transmit_DMA	32	static
-stm32f1xx_hal_i2c.c:2158:19:HAL_I2C_Master_Receive_DMA	32	static
-stm32f1xx_hal_i2c.c:2312:19:HAL_I2C_Slave_Transmit_DMA	32	static
-stm32f1xx_hal_i2c.c:2424:19:HAL_I2C_Slave_Receive_DMA	32	static
-stm32f1xx_hal_i2c.c:2541:19:HAL_I2C_Mem_Write	40	static
-stm32f1xx_hal_i2c.c:2664:19:HAL_I2C_Mem_Read	56	static,ignoring_inline_asm
-stm32f1xx_hal_i2c.c:2960:19:HAL_I2C_Mem_Write_IT	32	static
-stm32f1xx_hal_i2c.c:3048:19:HAL_I2C_Mem_Read_IT	32	static
-stm32f1xx_hal_i2c.c:3142:19:HAL_I2C_Mem_Write_DMA	48	static
-stm32f1xx_hal_i2c.c:3321:19:HAL_I2C_Mem_Read_DMA	56	static
-stm32f1xx_hal_i2c.c:3514:19:HAL_I2C_IsDeviceReady	48	static
-stm32f1xx_hal_i2c.c:3650:19:HAL_I2C_Master_Seq_Transmit_IT	32	static
-stm32f1xx_hal_i2c.c:3748:19:HAL_I2C_Master_Seq_Transmit_DMA	40	static
-stm32f1xx_hal_i2c.c:3931:19:HAL_I2C_Master_Seq_Receive_IT	40	static
-stm32f1xx_hal_i2c.c:4055:19:HAL_I2C_Master_Seq_Receive_DMA	40	static
-stm32f1xx_hal_i2c.c:4273:19:HAL_I2C_Slave_Seq_Transmit_IT	32	static
-stm32f1xx_hal_i2c.c:4339:19:HAL_I2C_Slave_Seq_Transmit_DMA	32	static
-stm32f1xx_hal_i2c.c:4513:19:HAL_I2C_Slave_Seq_Receive_IT	32	static
-stm32f1xx_hal_i2c.c:4579:19:HAL_I2C_Slave_Seq_Receive_DMA	32	static
-stm32f1xx_hal_i2c.c:4749:19:HAL_I2C_EnableListen_IT	16	static
-stm32f1xx_hal_i2c.c:4782:19:HAL_I2C_DisableListen_IT	24	static
-stm32f1xx_hal_i2c.c:4817:19:HAL_I2C_Master_Abort_IT	24	static
-stm32f1xx_hal_i2c.c:4876:6:HAL_I2C_EV_IRQHandler	40	static
-stm32f1xx_hal_i2c.c:5045:6:HAL_I2C_ER_IRQHandler	48	static
-stm32f1xx_hal_i2c.c:5128:13:HAL_I2C_MasterTxCpltCallback	16	static
-stm32f1xx_hal_i2c.c:5144:13:HAL_I2C_MasterRxCpltCallback	16	static
-stm32f1xx_hal_i2c.c:5159:13:HAL_I2C_SlaveTxCpltCallback	16	static
-stm32f1xx_hal_i2c.c:5175:13:HAL_I2C_SlaveRxCpltCallback	16	static
-stm32f1xx_hal_i2c.c:5193:13:HAL_I2C_AddrCallback	16	static
-stm32f1xx_hal_i2c.c:5211:13:HAL_I2C_ListenCpltCallback	16	static
-stm32f1xx_hal_i2c.c:5227:13:HAL_I2C_MemTxCpltCallback	16	static
-stm32f1xx_hal_i2c.c:5243:13:HAL_I2C_MemRxCpltCallback	16	static
-stm32f1xx_hal_i2c.c:5259:13:HAL_I2C_ErrorCallback	16	static
-stm32f1xx_hal_i2c.c:5275:13:HAL_I2C_AbortCpltCallback	16	static
-stm32f1xx_hal_i2c.c:5310:22:HAL_I2C_GetState	16	static
-stm32f1xx_hal_i2c.c:5322:21:HAL_I2C_GetMode	16	static
-stm32f1xx_hal_i2c.c:5333:10:HAL_I2C_GetError	16	static
-stm32f1xx_hal_i2c.c:5356:13:I2C_MasterTransmit_TXE	24	static
-stm32f1xx_hal_i2c.c:5450:13:I2C_MasterTransmit_BTF	24	static
-stm32f1xx_hal_i2c.c:5529:13:I2C_MemoryTransmit_TXE_BTF	24	static
-stm32f1xx_hal_i2c.c:5615:13:I2C_MasterReceive_RXNE	24	static
-stm32f1xx_hal_i2c.c:5723:13:I2C_MasterReceive_BTF	24	static
-stm32f1xx_hal_i2c.c:5849:13:I2C_Master_SB	16	static
-stm32f1xx_hal_i2c.c:5910:13:I2C_Master_ADD10	16	static
-stm32f1xx_hal_i2c.c:5929:13:I2C_Master_ADDR	72	static
-stm32f1xx_hal_i2c.c:6077:13:I2C_SlaveTransmit_TXE	24	static
-stm32f1xx_hal_i2c.c:6118:13:I2C_SlaveTransmit_BTF	16	static
-stm32f1xx_hal_i2c.c:6139:13:I2C_SlaveReceive_RXNE	24	static
-stm32f1xx_hal_i2c.c:6180:13:I2C_SlaveReceive_BTF	16	static
-stm32f1xx_hal_i2c.c:6202:13:I2C_Slave_ADDR	24	static
-stm32f1xx_hal_i2c.c:6253:13:I2C_Slave_STOPF	24	static
-stm32f1xx_hal_i2c.c:6422:13:I2C_Slave_AF	24	static
-stm32f1xx_hal_i2c.c:6488:13:I2C_ITError	24	static
-stm32f1xx_hal_i2c.c:6654:26:I2C_MasterRequestWrite	40	static
-stm32f1xx_hal_i2c.c:6724:26:I2C_MasterRequestRead	40	static
-stm32f1xx_hal_i2c.c:6824:26:I2C_RequestMemoryWrite	40	static
-stm32f1xx_hal_i2c.c:6904:26:I2C_RequestMemoryRead	40	static
-stm32f1xx_hal_i2c.c:7013:13:I2C_DMAXferCplt	32	static
-stm32f1xx_hal_i2c.c:7151:13:I2C_DMAError	24	static
-stm32f1xx_hal_i2c.c:7186:13:I2C_DMAAbort	32	static
-stm32f1xx_hal_i2c.c:7289:26:I2C_WaitOnFlagUntilTimeout	24	static
-stm32f1xx_hal_i2c.c:7323:26:I2C_WaitOnMasterAddressFlagUntilTimeout	24	static
-stm32f1xx_hal_i2c.c:7374:26:I2C_WaitOnTXEFlagUntilTimeout	24	static
-stm32f1xx_hal_i2c.c:7412:26:I2C_WaitOnBTFFlagUntilTimeout	24	static
-stm32f1xx_hal_i2c.c:7450:26:I2C_WaitOnSTOPFlagUntilTimeout	24	static
-stm32f1xx_hal_i2c.c:7483:26:I2C_WaitOnSTOPRequestThroughIT	24	static
-stm32f1xx_hal_i2c.c:7512:26:I2C_WaitOnRXNEFlagUntilTimeout	24	static
-stm32f1xx_hal_i2c.c:7557:26:I2C_IsAcknowledgeFailed	16	static
-stm32f1xx_hal_i2c.c:7582:13:I2C_ConvertOtherXferOptions	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:453:19:HAL_I2C_Init	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:568:19:HAL_I2C_DeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:614:13:HAL_I2C_MspInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:630:13:HAL_I2C_MspDeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1050:19:HAL_I2C_Master_Transmit	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1171:19:HAL_I2C_Master_Receive	56	static,ignoring_inline_asm
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1462:19:HAL_I2C_Slave_Transmit	48	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1592:19:HAL_I2C_Slave_Receive	48	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1713:19:HAL_I2C_Master_Transmit_IT	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1793:19:HAL_I2C_Master_Receive_IT	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1876:19:HAL_I2C_Slave_Transmit_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:1938:19:HAL_I2C_Slave_Receive_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:2002:19:HAL_I2C_Master_Transmit_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:2158:19:HAL_I2C_Master_Receive_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:2312:19:HAL_I2C_Slave_Transmit_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:2424:19:HAL_I2C_Slave_Receive_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:2541:19:HAL_I2C_Mem_Write	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:2664:19:HAL_I2C_Mem_Read	56	static,ignoring_inline_asm
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:2960:19:HAL_I2C_Mem_Write_IT	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:3048:19:HAL_I2C_Mem_Read_IT	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:3142:19:HAL_I2C_Mem_Write_DMA	48	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:3321:19:HAL_I2C_Mem_Read_DMA	56	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:3514:19:HAL_I2C_IsDeviceReady	48	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:3650:19:HAL_I2C_Master_Seq_Transmit_IT	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:3748:19:HAL_I2C_Master_Seq_Transmit_DMA	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:3931:19:HAL_I2C_Master_Seq_Receive_IT	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4055:19:HAL_I2C_Master_Seq_Receive_DMA	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4273:19:HAL_I2C_Slave_Seq_Transmit_IT	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4339:19:HAL_I2C_Slave_Seq_Transmit_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4513:19:HAL_I2C_Slave_Seq_Receive_IT	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4579:19:HAL_I2C_Slave_Seq_Receive_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4749:19:HAL_I2C_EnableListen_IT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4782:19:HAL_I2C_DisableListen_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4817:19:HAL_I2C_Master_Abort_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:4876:6:HAL_I2C_EV_IRQHandler	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5045:6:HAL_I2C_ER_IRQHandler	48	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5128:13:HAL_I2C_MasterTxCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5144:13:HAL_I2C_MasterRxCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5159:13:HAL_I2C_SlaveTxCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5175:13:HAL_I2C_SlaveRxCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5193:13:HAL_I2C_AddrCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5211:13:HAL_I2C_ListenCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5227:13:HAL_I2C_MemTxCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5243:13:HAL_I2C_MemRxCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5259:13:HAL_I2C_ErrorCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5275:13:HAL_I2C_AbortCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5310:22:HAL_I2C_GetState	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5322:21:HAL_I2C_GetMode	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5333:10:HAL_I2C_GetError	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5356:13:I2C_MasterTransmit_TXE	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5450:13:I2C_MasterTransmit_BTF	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5529:13:I2C_MemoryTransmit_TXE_BTF	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5615:13:I2C_MasterReceive_RXNE	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5723:13:I2C_MasterReceive_BTF	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5849:13:I2C_Master_SB	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5910:13:I2C_Master_ADD10	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:5929:13:I2C_Master_ADDR	72	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6077:13:I2C_SlaveTransmit_TXE	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6118:13:I2C_SlaveTransmit_BTF	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6139:13:I2C_SlaveReceive_RXNE	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6180:13:I2C_SlaveReceive_BTF	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6202:13:I2C_Slave_ADDR	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6253:13:I2C_Slave_STOPF	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6422:13:I2C_Slave_AF	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6488:13:I2C_ITError	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6654:26:I2C_MasterRequestWrite	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6724:26:I2C_MasterRequestRead	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6824:26:I2C_RequestMemoryWrite	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:6904:26:I2C_RequestMemoryRead	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7013:13:I2C_DMAXferCplt	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7151:13:I2C_DMAError	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7186:13:I2C_DMAAbort	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7289:26:I2C_WaitOnFlagUntilTimeout	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7323:26:I2C_WaitOnMasterAddressFlagUntilTimeout	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7374:26:I2C_WaitOnTXEFlagUntilTimeout	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7412:26:I2C_WaitOnBTFFlagUntilTimeout	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7450:26:I2C_WaitOnSTOPFlagUntilTimeout	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7483:26:I2C_WaitOnSTOPRequestThroughIT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7512:26:I2C_WaitOnRXNEFlagUntilTimeout	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7557:26:I2C_IsAcknowledgeFailed	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c:7582:13:I2C_ConvertOtherXferOptions	16	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.cyclo
new file mode 100644
index 0000000..eac00c4
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.cyclo
@@ -0,0 +1,18 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:117:13:PWR_OverloadWfe	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:156:6:HAL_PWR_DeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:169:6:HAL_PWR_EnableBkUpAccess	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:182:6:HAL_PWR_DisableBkUpAccess	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:316:6:HAL_PWR_ConfigPVD	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:359:6:HAL_PWR_EnablePVD	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:369:6:HAL_PWR_DisablePVD	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:382:6:HAL_PWR_EnableWakeUpPin	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:397:6:HAL_PWR_DisableWakeUpPin	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:417:6:HAL_PWR_EnterSLEEPMode	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:463:6:HAL_PWR_EnterSTOPMode	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:503:6:HAL_PWR_EnterSTANDBYMode	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:528:6:HAL_PWR_EnableSleepOnExit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:541:6:HAL_PWR_DisableSleepOnExit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:554:6:HAL_PWR_EnableSEVOnPend	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:567:6:HAL_PWR_DisableSEVOnPend	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:580:6:HAL_PWR_PVD_IRQHandler	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:597:13:HAL_PWR_PVDCallback	1
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d
index 0b17c12..9634f02 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.su
index 3a73422..2ef22d2 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.su
@@ -1,18 +1,18 @@
-stm32f1xx_hal_pwr.c:117:13:PWR_OverloadWfe	4	static,ignoring_inline_asm
-stm32f1xx_hal_pwr.c:156:6:HAL_PWR_DeInit	4	static
-stm32f1xx_hal_pwr.c:169:6:HAL_PWR_EnableBkUpAccess	4	static
-stm32f1xx_hal_pwr.c:182:6:HAL_PWR_DisableBkUpAccess	4	static
-stm32f1xx_hal_pwr.c:316:6:HAL_PWR_ConfigPVD	16	static
-stm32f1xx_hal_pwr.c:359:6:HAL_PWR_EnablePVD	4	static
-stm32f1xx_hal_pwr.c:369:6:HAL_PWR_DisablePVD	4	static
-stm32f1xx_hal_pwr.c:382:6:HAL_PWR_EnableWakeUpPin	24	static,ignoring_inline_asm
-stm32f1xx_hal_pwr.c:397:6:HAL_PWR_DisableWakeUpPin	24	static,ignoring_inline_asm
-stm32f1xx_hal_pwr.c:417:6:HAL_PWR_EnterSLEEPMode	16	static,ignoring_inline_asm
-stm32f1xx_hal_pwr.c:463:6:HAL_PWR_EnterSTOPMode	16	static,ignoring_inline_asm
-stm32f1xx_hal_pwr.c:503:6:HAL_PWR_EnterSTANDBYMode	4	static,ignoring_inline_asm
-stm32f1xx_hal_pwr.c:528:6:HAL_PWR_EnableSleepOnExit	4	static
-stm32f1xx_hal_pwr.c:541:6:HAL_PWR_DisableSleepOnExit	4	static
-stm32f1xx_hal_pwr.c:554:6:HAL_PWR_EnableSEVOnPend	4	static
-stm32f1xx_hal_pwr.c:567:6:HAL_PWR_DisableSEVOnPend	4	static
-stm32f1xx_hal_pwr.c:580:6:HAL_PWR_PVD_IRQHandler	8	static
-stm32f1xx_hal_pwr.c:597:13:HAL_PWR_PVDCallback	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:117:13:PWR_OverloadWfe	4	static,ignoring_inline_asm
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:156:6:HAL_PWR_DeInit	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:169:6:HAL_PWR_EnableBkUpAccess	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:182:6:HAL_PWR_DisableBkUpAccess	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:316:6:HAL_PWR_ConfigPVD	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:359:6:HAL_PWR_EnablePVD	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:369:6:HAL_PWR_DisablePVD	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:382:6:HAL_PWR_EnableWakeUpPin	24	static,ignoring_inline_asm
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:397:6:HAL_PWR_DisableWakeUpPin	24	static,ignoring_inline_asm
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:417:6:HAL_PWR_EnterSLEEPMode	16	static,ignoring_inline_asm
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:463:6:HAL_PWR_EnterSTOPMode	16	static,ignoring_inline_asm
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:503:6:HAL_PWR_EnterSTANDBYMode	4	static,ignoring_inline_asm
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:528:6:HAL_PWR_EnableSleepOnExit	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:541:6:HAL_PWR_DisableSleepOnExit	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:554:6:HAL_PWR_EnableSEVOnPend	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:567:6:HAL_PWR_DisableSEVOnPend	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:580:6:HAL_PWR_PVD_IRQHandler	8	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c:597:13:HAL_PWR_PVDCallback	4	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.cyclo
new file mode 100644
index 0000000..100f2bb
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.cyclo
@@ -0,0 +1,15 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:202:19:HAL_RCC_DeInit	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:347:19:HAL_RCC_OscConfig	60
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:813:19:HAL_RCC_ClockConfig	19
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1002:6:HAL_RCC_MCOConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1039:6:HAL_RCC_EnableCSS	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1048:6:HAL_RCC_DisableCSS	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1082:10:HAL_RCC_GetSysClockFreq	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1176:10:HAL_RCC_GetHCLKFreq	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1187:10:HAL_RCC_GetPCLK1Freq	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1199:10:HAL_RCC_GetPCLK2Freq	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1212:6:HAL_RCC_GetOscConfig	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1312:6:HAL_RCC_GetClockConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1347:6:HAL_RCC_NMI_IRQHandler	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1365:13:RCC_Delay	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1379:13:HAL_RCC_CSSCallback	1
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d
index e61d05e..f2d8bf8 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.su
index aa05c10..c276a75 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.su
@@ -1,15 +1,15 @@
-stm32f1xx_hal_rcc.c:202:19:HAL_RCC_DeInit	16	static
-stm32f1xx_hal_rcc.c:347:19:HAL_RCC_OscConfig	32	static
-stm32f1xx_hal_rcc.c:813:19:HAL_RCC_ClockConfig	24	static
-stm32f1xx_hal_rcc.c:1002:6:HAL_RCC_MCOConfig	48	static
-stm32f1xx_hal_rcc.c:1039:6:HAL_RCC_EnableCSS	4	static
-stm32f1xx_hal_rcc.c:1048:6:HAL_RCC_DisableCSS	4	static
-stm32f1xx_hal_rcc.c:1082:10:HAL_RCC_GetSysClockFreq	48	static
-stm32f1xx_hal_rcc.c:1176:10:HAL_RCC_GetHCLKFreq	4	static
-stm32f1xx_hal_rcc.c:1187:10:HAL_RCC_GetPCLK1Freq	8	static
-stm32f1xx_hal_rcc.c:1199:10:HAL_RCC_GetPCLK2Freq	8	static
-stm32f1xx_hal_rcc.c:1212:6:HAL_RCC_GetOscConfig	16	static
-stm32f1xx_hal_rcc.c:1312:6:HAL_RCC_GetClockConfig	16	static
-stm32f1xx_hal_rcc.c:1347:6:HAL_RCC_NMI_IRQHandler	8	static
-stm32f1xx_hal_rcc.c:1365:13:RCC_Delay	24	static,ignoring_inline_asm
-stm32f1xx_hal_rcc.c:1379:13:HAL_RCC_CSSCallback	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:202:19:HAL_RCC_DeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:347:19:HAL_RCC_OscConfig	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:813:19:HAL_RCC_ClockConfig	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1002:6:HAL_RCC_MCOConfig	48	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1039:6:HAL_RCC_EnableCSS	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1048:6:HAL_RCC_DisableCSS	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1082:10:HAL_RCC_GetSysClockFreq	48	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1176:10:HAL_RCC_GetHCLKFreq	4	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1187:10:HAL_RCC_GetPCLK1Freq	8	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1199:10:HAL_RCC_GetPCLK2Freq	8	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1212:6:HAL_RCC_GetOscConfig	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1312:6:HAL_RCC_GetClockConfig	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1347:6:HAL_RCC_NMI_IRQHandler	8	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1365:13:RCC_Delay	24	static,ignoring_inline_asm
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c:1379:13:HAL_RCC_CSSCallback	4	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.cyclo
new file mode 100644
index 0000000..7b9bb77
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.cyclo
@@ -0,0 +1,3 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:100:19:HAL_RCCEx_PeriphCLKConfig	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:294:6:HAL_RCCEx_GetPeriphCLKConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:387:10:HAL_RCCEx_GetPeriphCLKFreq	16
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d
index 839c1b2..440d145 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.su
index dbe5d7b..8be4cb9 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.su
@@ -1,3 +1,3 @@
-stm32f1xx_hal_rcc_ex.c:100:19:HAL_RCCEx_PeriphCLKConfig	32	static
-stm32f1xx_hal_rcc_ex.c:294:6:HAL_RCCEx_GetPeriphCLKConfig	24	static
-stm32f1xx_hal_rcc_ex.c:387:10:HAL_RCCEx_GetPeriphCLKFreq	64	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:100:19:HAL_RCCEx_PeriphCLKConfig	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:294:6:HAL_RCCEx_GetPeriphCLKConfig	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c:387:10:HAL_RCCEx_GetPeriphCLKFreq	64	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.cyclo
new file mode 100644
index 0000000..60c7b53
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.cyclo
@@ -0,0 +1,55 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:335:19:HAL_SPI_Init	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:463:19:HAL_SPI_DeInit	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:507:13:HAL_SPI_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:523:13:HAL_SPI_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:795:19:HAL_SPI_Transmit	25
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:960:19:HAL_SPI_Receive	22
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:1174:19:HAL_SPI_TransmitReceive	37
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:1407:19:HAL_SPI_Transmit_IT	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:1492:19:HAL_SPI_Receive_IT	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:1586:19:HAL_SPI_TransmitReceive_IT	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:1674:19:HAL_SPI_Transmit_DMA	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:1782:19:HAL_SPI_Receive_DMA	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:1897:19:HAL_SPI_TransmitReceive_DMA	14
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2043:19:HAL_SPI_Abort	16
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2187:19:HAL_SPI_Abort_IT	19
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2347:19:HAL_SPI_DMAPause	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2367:19:HAL_SPI_DMAResume	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2387:19:HAL_SPI_DMAStop	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2427:6:HAL_SPI_IRQHandler	19
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2529:13:HAL_SPI_TxCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2545:13:HAL_SPI_RxCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2561:13:HAL_SPI_TxRxCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2577:13:HAL_SPI_TxHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2593:13:HAL_SPI_RxHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2609:13:HAL_SPI_TxRxHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2625:13:HAL_SPI_ErrorCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2643:13:HAL_SPI_AbortCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2678:22:HAL_SPI_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2690:10:HAL_SPI_GetError	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2715:13:SPI_DMATransmitCplt	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2772:13:SPI_DMAReceiveCplt	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2871:13:SPI_DMATransmitReceiveCplt	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2961:13:SPI_DMAHalfTransmitCplt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2979:13:SPI_DMAHalfReceiveCplt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2997:13:SPI_DMAHalfTransmitReceiveCplt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3015:13:SPI_DMAError	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3038:13:SPI_DMAAbortOnError	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3060:13:SPI_DMATxAbortCallback	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3124:13:SPI_DMARxAbortCallback	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3182:13:SPI_2linesRxISR_8BIT	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3245:13:SPI_2linesTxISR_8BIT	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3281:13:SPI_2linesRxISR_16BIT	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3337:13:SPI_2linesTxISR_16BIT	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3397:13:SPI_RxISR_8BIT	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3460:13:SPI_RxISR_16BIT	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3500:13:SPI_TxISR_8BIT	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3525:13:SPI_TxISR_16BIT	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3555:26:SPI_WaitFlagStateUntilTimeout	10
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3622:26:SPI_EndRxTransaction	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3659:26:SPI_EndRxTxTransaction	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3676:13:SPI_CloseRxTx_ISR	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3782:13:SPI_CloseRx_ISR	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3856:13:SPI_CloseTx_ISR	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3917:13:SPI_AbortRx_ISR	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3953:13:SPI_AbortTx_ISR	1
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.d
index 4ccec70..2ba0eb8 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.su
index b42e16b..971f2cf 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.su
@@ -1,55 +1,55 @@
-stm32f1xx_hal_spi.c:335:19:HAL_SPI_Init	16	static
-stm32f1xx_hal_spi.c:463:19:HAL_SPI_DeInit	16	static
-stm32f1xx_hal_spi.c:507:13:HAL_SPI_MspInit	16	static
-stm32f1xx_hal_spi.c:523:13:HAL_SPI_MspDeInit	16	static
-stm32f1xx_hal_spi.c:795:19:HAL_SPI_Transmit	40	static
-stm32f1xx_hal_spi.c:960:19:HAL_SPI_Receive	40	static
-stm32f1xx_hal_spi.c:1174:19:HAL_SPI_TransmitReceive	56	static
-stm32f1xx_hal_spi.c:1407:19:HAL_SPI_Transmit_IT	32	static
-stm32f1xx_hal_spi.c:1492:19:HAL_SPI_Receive_IT	32	static
-stm32f1xx_hal_spi.c:1586:19:HAL_SPI_TransmitReceive_IT	32	static
-stm32f1xx_hal_spi.c:1674:19:HAL_SPI_Transmit_DMA	32	static
-stm32f1xx_hal_spi.c:1782:19:HAL_SPI_Receive_DMA	32	static
-stm32f1xx_hal_spi.c:1897:19:HAL_SPI_TransmitReceive_DMA	32	static
-stm32f1xx_hal_spi.c:2043:19:HAL_SPI_Abort	32	static
-stm32f1xx_hal_spi.c:2187:19:HAL_SPI_Abort_IT	40	static
-stm32f1xx_hal_spi.c:2347:19:HAL_SPI_DMAPause	16	static
-stm32f1xx_hal_spi.c:2367:19:HAL_SPI_DMAResume	16	static
-stm32f1xx_hal_spi.c:2387:19:HAL_SPI_DMAStop	24	static
-stm32f1xx_hal_spi.c:2427:6:HAL_SPI_IRQHandler	40	static
-stm32f1xx_hal_spi.c:2529:13:HAL_SPI_TxCpltCallback	16	static
-stm32f1xx_hal_spi.c:2545:13:HAL_SPI_RxCpltCallback	16	static
-stm32f1xx_hal_spi.c:2561:13:HAL_SPI_TxRxCpltCallback	16	static
-stm32f1xx_hal_spi.c:2577:13:HAL_SPI_TxHalfCpltCallback	16	static
-stm32f1xx_hal_spi.c:2593:13:HAL_SPI_RxHalfCpltCallback	16	static
-stm32f1xx_hal_spi.c:2609:13:HAL_SPI_TxRxHalfCpltCallback	16	static
-stm32f1xx_hal_spi.c:2625:13:HAL_SPI_ErrorCallback	16	static
-stm32f1xx_hal_spi.c:2643:13:HAL_SPI_AbortCpltCallback	16	static
-stm32f1xx_hal_spi.c:2678:22:HAL_SPI_GetState	16	static
-stm32f1xx_hal_spi.c:2690:10:HAL_SPI_GetError	16	static
-stm32f1xx_hal_spi.c:2715:13:SPI_DMATransmitCplt	32	static
-stm32f1xx_hal_spi.c:2772:13:SPI_DMAReceiveCplt	24	static
-stm32f1xx_hal_spi.c:2871:13:SPI_DMATransmitReceiveCplt	24	static
-stm32f1xx_hal_spi.c:2961:13:SPI_DMAHalfTransmitCplt	24	static
-stm32f1xx_hal_spi.c:2979:13:SPI_DMAHalfReceiveCplt	24	static
-stm32f1xx_hal_spi.c:2997:13:SPI_DMAHalfTransmitReceiveCplt	24	static
-stm32f1xx_hal_spi.c:3015:13:SPI_DMAError	24	static
-stm32f1xx_hal_spi.c:3038:13:SPI_DMAAbortOnError	24	static
-stm32f1xx_hal_spi.c:3060:13:SPI_DMATxAbortCallback	32	static
-stm32f1xx_hal_spi.c:3124:13:SPI_DMARxAbortCallback	24	static
-stm32f1xx_hal_spi.c:3182:13:SPI_2linesRxISR_8BIT	16	static
-stm32f1xx_hal_spi.c:3245:13:SPI_2linesTxISR_8BIT	16	static
-stm32f1xx_hal_spi.c:3281:13:SPI_2linesRxISR_16BIT	16	static
-stm32f1xx_hal_spi.c:3337:13:SPI_2linesTxISR_16BIT	16	static
-stm32f1xx_hal_spi.c:3397:13:SPI_RxISR_8BIT	16	static
-stm32f1xx_hal_spi.c:3460:13:SPI_RxISR_16BIT	16	static
-stm32f1xx_hal_spi.c:3500:13:SPI_TxISR_8BIT	16	static
-stm32f1xx_hal_spi.c:3525:13:SPI_TxISR_16BIT	16	static
-stm32f1xx_hal_spi.c:3555:26:SPI_WaitFlagStateUntilTimeout	40	static
-stm32f1xx_hal_spi.c:3622:26:SPI_EndRxTransaction	32	static
-stm32f1xx_hal_spi.c:3659:26:SPI_EndRxTxTransaction	32	static
-stm32f1xx_hal_spi.c:3676:13:SPI_CloseRxTx_ISR	32	static
-stm32f1xx_hal_spi.c:3782:13:SPI_CloseRx_ISR	24	static
-stm32f1xx_hal_spi.c:3856:13:SPI_CloseTx_ISR	32	static
-stm32f1xx_hal_spi.c:3917:13:SPI_AbortRx_ISR	24	static
-stm32f1xx_hal_spi.c:3953:13:SPI_AbortTx_ISR	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:335:19:HAL_SPI_Init	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:463:19:HAL_SPI_DeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:507:13:HAL_SPI_MspInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:523:13:HAL_SPI_MspDeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:795:19:HAL_SPI_Transmit	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:960:19:HAL_SPI_Receive	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:1174:19:HAL_SPI_TransmitReceive	56	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:1407:19:HAL_SPI_Transmit_IT	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:1492:19:HAL_SPI_Receive_IT	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:1586:19:HAL_SPI_TransmitReceive_IT	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:1674:19:HAL_SPI_Transmit_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:1782:19:HAL_SPI_Receive_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:1897:19:HAL_SPI_TransmitReceive_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2043:19:HAL_SPI_Abort	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2187:19:HAL_SPI_Abort_IT	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2347:19:HAL_SPI_DMAPause	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2367:19:HAL_SPI_DMAResume	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2387:19:HAL_SPI_DMAStop	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2427:6:HAL_SPI_IRQHandler	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2529:13:HAL_SPI_TxCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2545:13:HAL_SPI_RxCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2561:13:HAL_SPI_TxRxCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2577:13:HAL_SPI_TxHalfCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2593:13:HAL_SPI_RxHalfCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2609:13:HAL_SPI_TxRxHalfCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2625:13:HAL_SPI_ErrorCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2643:13:HAL_SPI_AbortCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2678:22:HAL_SPI_GetState	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2690:10:HAL_SPI_GetError	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2715:13:SPI_DMATransmitCplt	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2772:13:SPI_DMAReceiveCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2871:13:SPI_DMATransmitReceiveCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2961:13:SPI_DMAHalfTransmitCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2979:13:SPI_DMAHalfReceiveCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:2997:13:SPI_DMAHalfTransmitReceiveCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3015:13:SPI_DMAError	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3038:13:SPI_DMAAbortOnError	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3060:13:SPI_DMATxAbortCallback	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3124:13:SPI_DMARxAbortCallback	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3182:13:SPI_2linesRxISR_8BIT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3245:13:SPI_2linesTxISR_8BIT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3281:13:SPI_2linesRxISR_16BIT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3337:13:SPI_2linesTxISR_16BIT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3397:13:SPI_RxISR_8BIT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3460:13:SPI_RxISR_16BIT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3500:13:SPI_TxISR_8BIT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3525:13:SPI_TxISR_16BIT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3555:26:SPI_WaitFlagStateUntilTimeout	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3622:26:SPI_EndRxTransaction	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3659:26:SPI_EndRxTxTransaction	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3676:13:SPI_CloseRxTx_ISR	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3782:13:SPI_CloseRx_ISR	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3856:13:SPI_CloseTx_ISR	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3917:13:SPI_AbortRx_ISR	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c:3953:13:SPI_AbortTx_ISR	16	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.cyclo
new file mode 100644
index 0000000..cf7e61a
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.cyclo
@@ -0,0 +1,20 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:168:19:HAL_SRAM_Init	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:223:19:HAL_SRAM_DeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:256:13:HAL_SRAM_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:272:13:HAL_SRAM_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:288:13:HAL_SRAM_DMA_XferCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:304:13:HAL_SRAM_DMA_XferErrorCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:341:19:HAL_SRAM_Read_8b	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:389:19:HAL_SRAM_Write_8b	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:436:19:HAL_SRAM_Read_16b	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:496:19:HAL_SRAM_Write_16b	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:555:19:HAL_SRAM_Read_32b	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:603:19:HAL_SRAM_Write_32b	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:650:19:HAL_SRAM_Read_DMA	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:699:19:HAL_SRAM_Write_DMA	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:934:19:HAL_SRAM_WriteOperation_Enable	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:968:19:HAL_SRAM_WriteOperation_Disable	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:1021:23:HAL_SRAM_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:1039:13:SRAM_DMACplt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:1061:13:SRAM_DMACpltProt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:1083:13:SRAM_DMAError	1
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.d
index b714b6b..990bb09 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.su
index ea501b9..3e676c3 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.su
@@ -1,20 +1,20 @@
-stm32f1xx_hal_sram.c:168:19:HAL_SRAM_Init	24	static
-stm32f1xx_hal_sram.c:223:19:HAL_SRAM_DeInit	16	static
-stm32f1xx_hal_sram.c:256:13:HAL_SRAM_MspInit	16	static
-stm32f1xx_hal_sram.c:272:13:HAL_SRAM_MspDeInit	16	static
-stm32f1xx_hal_sram.c:288:13:HAL_SRAM_DMA_XferCpltCallback	16	static
-stm32f1xx_hal_sram.c:304:13:HAL_SRAM_DMA_XferErrorCallback	16	static
-stm32f1xx_hal_sram.c:341:19:HAL_SRAM_Read_8b	40	static
-stm32f1xx_hal_sram.c:389:19:HAL_SRAM_Write_8b	40	static
-stm32f1xx_hal_sram.c:436:19:HAL_SRAM_Read_16b	40	static
-stm32f1xx_hal_sram.c:496:19:HAL_SRAM_Write_16b	40	static
-stm32f1xx_hal_sram.c:555:19:HAL_SRAM_Read_32b	40	static
-stm32f1xx_hal_sram.c:603:19:HAL_SRAM_Write_32b	40	static
-stm32f1xx_hal_sram.c:650:19:HAL_SRAM_Read_DMA	32	static
-stm32f1xx_hal_sram.c:699:19:HAL_SRAM_Write_DMA	32	static
-stm32f1xx_hal_sram.c:934:19:HAL_SRAM_WriteOperation_Enable	16	static
-stm32f1xx_hal_sram.c:968:19:HAL_SRAM_WriteOperation_Disable	16	static
-stm32f1xx_hal_sram.c:1021:23:HAL_SRAM_GetState	16	static
-stm32f1xx_hal_sram.c:1039:13:SRAM_DMACplt	24	static
-stm32f1xx_hal_sram.c:1061:13:SRAM_DMACpltProt	24	static
-stm32f1xx_hal_sram.c:1083:13:SRAM_DMAError	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:168:19:HAL_SRAM_Init	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:223:19:HAL_SRAM_DeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:256:13:HAL_SRAM_MspInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:272:13:HAL_SRAM_MspDeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:288:13:HAL_SRAM_DMA_XferCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:304:13:HAL_SRAM_DMA_XferErrorCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:341:19:HAL_SRAM_Read_8b	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:389:19:HAL_SRAM_Write_8b	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:436:19:HAL_SRAM_Read_16b	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:496:19:HAL_SRAM_Write_16b	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:555:19:HAL_SRAM_Read_32b	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:603:19:HAL_SRAM_Write_32b	40	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:650:19:HAL_SRAM_Read_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:699:19:HAL_SRAM_Write_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:934:19:HAL_SRAM_WriteOperation_Enable	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:968:19:HAL_SRAM_WriteOperation_Disable	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:1021:23:HAL_SRAM_GetState	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:1039:13:SRAM_DMACplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:1061:13:SRAM_DMACpltProt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c:1083:13:SRAM_DMAError	24	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.cyclo
new file mode 100644
index 0000000..f08c6f1
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.cyclo
@@ -0,0 +1,119 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:266:19:HAL_TIM_Base_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:325:19:HAL_TIM_Base_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:368:13:HAL_TIM_Base_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:383:13:HAL_TIM_Base_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:399:19:HAL_TIM_Base_Start	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:438:19:HAL_TIM_Base_Stop	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:458:19:HAL_TIM_Base_Start_IT	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:500:19:HAL_TIM_Base_Stop_IT	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:525:19:HAL_TIM_Base_Start_DMA	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:594:19:HAL_TIM_Base_Stop_DMA	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:649:19:HAL_TIM_OC_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:708:19:HAL_TIM_OC_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:751:13:HAL_TIM_OC_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:766:13:HAL_TIM_OC_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:787:19:HAL_TIM_OC_Start	18
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:841:19:HAL_TIM_OC_Stop	11
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:876:19:HAL_TIM_OC_Start_IT	22
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:964:19:HAL_TIM_OC_Stop_IT	15
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1035:19:HAL_TIM_OC_Start_DMA	32
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1193:19:HAL_TIM_OC_Stop_DMA	15
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1290:19:HAL_TIM_PWM_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1349:19:HAL_TIM_PWM_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1392:13:HAL_TIM_PWM_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1407:13:HAL_TIM_PWM_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1428:19:HAL_TIM_PWM_Start	18
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1482:19:HAL_TIM_PWM_Stop	11
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1517:19:HAL_TIM_PWM_Start_IT	22
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1604:19:HAL_TIM_PWM_Stop_IT	15
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1675:19:HAL_TIM_PWM_Start_DMA	32
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1832:19:HAL_TIM_PWM_Stop_DMA	15
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1929:19:HAL_TIM_IC_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1988:19:HAL_TIM_IC_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2031:13:HAL_TIM_IC_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2046:13:HAL_TIM_IC_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2067:19:HAL_TIM_IC_Start	22
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2119:19:HAL_TIM_IC_Stop	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2149:19:HAL_TIM_IC_Start_IT	26
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2234:19:HAL_TIM_IC_Stop_IT	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2300:19:HAL_TIM_IC_Start_DMA	34
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2456:19:HAL_TIM_IC_Stop_DMA	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2555:19:HAL_TIM_OnePulse_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2623:19:HAL_TIM_OnePulse_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2668:13:HAL_TIM_OnePulse_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2683:13:HAL_TIM_OnePulse_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2703:19:HAL_TIM_OnePulse_Start	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2760:19:HAL_TIM_OnePulse_Stop	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2803:19:HAL_TIM_OnePulse_Start_IT	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2866:19:HAL_TIM_OnePulse_Stop_IT	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2945:19:HAL_TIM_Encoder_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3058:19:HAL_TIM_Encoder_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3103:13:HAL_TIM_Encoder_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3118:13:HAL_TIM_Encoder_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3138:19:HAL_TIM_Encoder_Start	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3232:19:HAL_TIM_Encoder_Stop	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3292:19:HAL_TIM_Encoder_Start_IT	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3392:19:HAL_TIM_Encoder_Stop_IT	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3457:19:HAL_TIM_Encoder_Start_DMA	34
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3669:19:HAL_TIM_Encoder_Stop_DMA	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3746:6:HAL_TIM_IRQHandler	21
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3961:19:HAL_TIM_OC_ConfigChannel	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4037:19:HAL_TIM_IC_ConfigChannel	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4130:19:HAL_TIM_PWM_ConfigChannel	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4241:19:HAL_TIM_OnePulse_ConfigChannel	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4380:19:HAL_TIM_DMABurst_WriteStart	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4426:19:HAL_TIM_DMABurst_MultiWriteStart	24
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4603:19:HAL_TIM_DMABurst_WriteStop	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4698:19:HAL_TIM_DMABurst_ReadStart	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4744:19:HAL_TIM_DMABurst_MultiReadStart	24
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4922:19:HAL_TIM_DMABurst_ReadStop	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4999:19:HAL_TIM_GenerateEvent	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5036:19:HAL_TIM_ConfigOCrefClear	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5160:19:HAL_TIM_ConfigClockSource	20
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5312:19:HAL_TIM_ConfigTI1Input	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5344:19:HAL_TIM_SlaveConfigSynchro	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5384:19:HAL_TIM_SlaveConfigSynchro_IT	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5427:10:HAL_TIM_ReadCapturedValue	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5511:13:HAL_TIM_PeriodElapsedCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5526:13:HAL_TIM_PeriodElapsedHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5541:13:HAL_TIM_OC_DelayElapsedCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5556:13:HAL_TIM_IC_CaptureCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5571:13:HAL_TIM_IC_CaptureHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5586:13:HAL_TIM_PWM_PulseFinishedCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5601:13:HAL_TIM_PWM_PulseFinishedHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5616:13:HAL_TIM_TriggerCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5631:13:HAL_TIM_TriggerHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5646:13:HAL_TIM_ErrorCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6204:22:HAL_TIM_Base_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6214:22:HAL_TIM_OC_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6224:22:HAL_TIM_PWM_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6234:22:HAL_TIM_IC_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6244:22:HAL_TIM_OnePulse_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6254:22:HAL_TIM_Encoder_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6264:23:HAL_TIM_GetActiveChannel	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6282:29:HAL_TIM_GetChannelState	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6299:30:HAL_TIM_DMABurstState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6324:6:TIM_DMAError	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6367:13:TIM_DMADelayPulseCplt	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6426:6:TIM_DMADelayPulseHalfCplt	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6465:6:TIM_DMACaptureCplt	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6528:6:TIM_DMACaptureHalfCplt	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6567:13:TIM_DMAPeriodElapsedCplt	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6588:13:TIM_DMAPeriodElapsedHalfCplt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6604:13:TIM_DMATriggerCplt	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6625:13:TIM_DMATriggerHalfCplt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6642:6:TIM_Base_SetConfig	15
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6690:13:TIM_OC1_SetConfig	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6765:6:TIM_OC2_SetConfig	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6841:13:TIM_OC3_SetConfig	5
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6915:13:TIM_OC4_SetConfig	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6975:26:TIM_SlaveTimer_SetConfig	16
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7106:6:TIM_TI1_SetConfig	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7153:13:TIM_TI1_ConfigInputStage	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7196:13:TIM_TI2_SetConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7236:13:TIM_TI2_ConfigInputStage	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7278:13:TIM_TI3_SetConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7325:13:TIM_TI4_SetConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7368:13:TIM_ITRx_SetConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7398:6:TIM_ETR_SetConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7428:6:TIM_CCxChannelCmd	1
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.d
index eb43b75..ee307fe 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.su
index f8a178b..4334fce 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.su
@@ -1,119 +1,119 @@
-stm32f1xx_hal_tim.c:266:19:HAL_TIM_Base_Init	16	static
-stm32f1xx_hal_tim.c:325:19:HAL_TIM_Base_DeInit	16	static
-stm32f1xx_hal_tim.c:368:13:HAL_TIM_Base_MspInit	16	static
-stm32f1xx_hal_tim.c:383:13:HAL_TIM_Base_MspDeInit	16	static
-stm32f1xx_hal_tim.c:399:19:HAL_TIM_Base_Start	24	static
-stm32f1xx_hal_tim.c:438:19:HAL_TIM_Base_Stop	16	static
-stm32f1xx_hal_tim.c:458:19:HAL_TIM_Base_Start_IT	24	static
-stm32f1xx_hal_tim.c:500:19:HAL_TIM_Base_Stop_IT	16	static
-stm32f1xx_hal_tim.c:525:19:HAL_TIM_Base_Start_DMA	32	static
-stm32f1xx_hal_tim.c:594:19:HAL_TIM_Base_Stop_DMA	16	static
-stm32f1xx_hal_tim.c:649:19:HAL_TIM_OC_Init	16	static
-stm32f1xx_hal_tim.c:708:19:HAL_TIM_OC_DeInit	16	static
-stm32f1xx_hal_tim.c:751:13:HAL_TIM_OC_MspInit	16	static
-stm32f1xx_hal_tim.c:766:13:HAL_TIM_OC_MspDeInit	16	static
-stm32f1xx_hal_tim.c:787:19:HAL_TIM_OC_Start	24	static
-stm32f1xx_hal_tim.c:841:19:HAL_TIM_OC_Stop	16	static
-stm32f1xx_hal_tim.c:876:19:HAL_TIM_OC_Start_IT	24	static
-stm32f1xx_hal_tim.c:964:19:HAL_TIM_OC_Stop_IT	16	static
-stm32f1xx_hal_tim.c:1035:19:HAL_TIM_OC_Start_DMA	32	static
-stm32f1xx_hal_tim.c:1193:19:HAL_TIM_OC_Stop_DMA	16	static
-stm32f1xx_hal_tim.c:1290:19:HAL_TIM_PWM_Init	16	static
-stm32f1xx_hal_tim.c:1349:19:HAL_TIM_PWM_DeInit	16	static
-stm32f1xx_hal_tim.c:1392:13:HAL_TIM_PWM_MspInit	16	static
-stm32f1xx_hal_tim.c:1407:13:HAL_TIM_PWM_MspDeInit	16	static
-stm32f1xx_hal_tim.c:1428:19:HAL_TIM_PWM_Start	24	static
-stm32f1xx_hal_tim.c:1482:19:HAL_TIM_PWM_Stop	16	static
-stm32f1xx_hal_tim.c:1517:19:HAL_TIM_PWM_Start_IT	24	static
-stm32f1xx_hal_tim.c:1604:19:HAL_TIM_PWM_Stop_IT	16	static
-stm32f1xx_hal_tim.c:1675:19:HAL_TIM_PWM_Start_DMA	32	static
-stm32f1xx_hal_tim.c:1832:19:HAL_TIM_PWM_Stop_DMA	16	static
-stm32f1xx_hal_tim.c:1929:19:HAL_TIM_IC_Init	16	static
-stm32f1xx_hal_tim.c:1988:19:HAL_TIM_IC_DeInit	16	static
-stm32f1xx_hal_tim.c:2031:13:HAL_TIM_IC_MspInit	16	static
-stm32f1xx_hal_tim.c:2046:13:HAL_TIM_IC_MspDeInit	16	static
-stm32f1xx_hal_tim.c:2067:19:HAL_TIM_IC_Start	24	static
-stm32f1xx_hal_tim.c:2119:19:HAL_TIM_IC_Stop	16	static
-stm32f1xx_hal_tim.c:2149:19:HAL_TIM_IC_Start_IT	24	static
-stm32f1xx_hal_tim.c:2234:19:HAL_TIM_IC_Stop_IT	16	static
-stm32f1xx_hal_tim.c:2300:19:HAL_TIM_IC_Start_DMA	32	static
-stm32f1xx_hal_tim.c:2456:19:HAL_TIM_IC_Stop_DMA	16	static
-stm32f1xx_hal_tim.c:2555:19:HAL_TIM_OnePulse_Init	16	static
-stm32f1xx_hal_tim.c:2623:19:HAL_TIM_OnePulse_DeInit	16	static
-stm32f1xx_hal_tim.c:2668:13:HAL_TIM_OnePulse_MspInit	16	static
-stm32f1xx_hal_tim.c:2683:13:HAL_TIM_OnePulse_MspDeInit	16	static
-stm32f1xx_hal_tim.c:2703:19:HAL_TIM_OnePulse_Start	24	static
-stm32f1xx_hal_tim.c:2760:19:HAL_TIM_OnePulse_Stop	16	static
-stm32f1xx_hal_tim.c:2803:19:HAL_TIM_OnePulse_Start_IT	24	static
-stm32f1xx_hal_tim.c:2866:19:HAL_TIM_OnePulse_Stop_IT	16	static
-stm32f1xx_hal_tim.c:2945:19:HAL_TIM_Encoder_Init	32	static
-stm32f1xx_hal_tim.c:3058:19:HAL_TIM_Encoder_DeInit	16	static
-stm32f1xx_hal_tim.c:3103:13:HAL_TIM_Encoder_MspInit	16	static
-stm32f1xx_hal_tim.c:3118:13:HAL_TIM_Encoder_MspDeInit	16	static
-stm32f1xx_hal_tim.c:3138:19:HAL_TIM_Encoder_Start	24	static
-stm32f1xx_hal_tim.c:3232:19:HAL_TIM_Encoder_Stop	16	static
-stm32f1xx_hal_tim.c:3292:19:HAL_TIM_Encoder_Start_IT	24	static
-stm32f1xx_hal_tim.c:3392:19:HAL_TIM_Encoder_Stop_IT	16	static
-stm32f1xx_hal_tim.c:3457:19:HAL_TIM_Encoder_Start_DMA	32	static
-stm32f1xx_hal_tim.c:3669:19:HAL_TIM_Encoder_Stop_DMA	16	static
-stm32f1xx_hal_tim.c:3746:6:HAL_TIM_IRQHandler	16	static
-stm32f1xx_hal_tim.c:3961:19:HAL_TIM_OC_ConfigChannel	24	static
-stm32f1xx_hal_tim.c:4037:19:HAL_TIM_IC_ConfigChannel	24	static
-stm32f1xx_hal_tim.c:4130:19:HAL_TIM_PWM_ConfigChannel	24	static
-stm32f1xx_hal_tim.c:4241:19:HAL_TIM_OnePulse_ConfigChannel	56	static
-stm32f1xx_hal_tim.c:4380:19:HAL_TIM_DMABurst_WriteStart	32	static
-stm32f1xx_hal_tim.c:4426:19:HAL_TIM_DMABurst_MultiWriteStart	24	static
-stm32f1xx_hal_tim.c:4603:19:HAL_TIM_DMABurst_WriteStop	16	static
-stm32f1xx_hal_tim.c:4698:19:HAL_TIM_DMABurst_ReadStart	32	static
-stm32f1xx_hal_tim.c:4744:19:HAL_TIM_DMABurst_MultiReadStart	24	static
-stm32f1xx_hal_tim.c:4922:19:HAL_TIM_DMABurst_ReadStop	16	static
-stm32f1xx_hal_tim.c:4999:19:HAL_TIM_GenerateEvent	16	static
-stm32f1xx_hal_tim.c:5036:19:HAL_TIM_ConfigOCrefClear	24	static
-stm32f1xx_hal_tim.c:5160:19:HAL_TIM_ConfigClockSource	24	static
-stm32f1xx_hal_tim.c:5312:19:HAL_TIM_ConfigTI1Input	24	static
-stm32f1xx_hal_tim.c:5344:19:HAL_TIM_SlaveConfigSynchro	16	static
-stm32f1xx_hal_tim.c:5384:19:HAL_TIM_SlaveConfigSynchro_IT	16	static
-stm32f1xx_hal_tim.c:5427:10:HAL_TIM_ReadCapturedValue	24	static
-stm32f1xx_hal_tim.c:5511:13:HAL_TIM_PeriodElapsedCallback	16	static
-stm32f1xx_hal_tim.c:5526:13:HAL_TIM_PeriodElapsedHalfCpltCallback	16	static
-stm32f1xx_hal_tim.c:5541:13:HAL_TIM_OC_DelayElapsedCallback	16	static
-stm32f1xx_hal_tim.c:5556:13:HAL_TIM_IC_CaptureCallback	16	static
-stm32f1xx_hal_tim.c:5571:13:HAL_TIM_IC_CaptureHalfCpltCallback	16	static
-stm32f1xx_hal_tim.c:5586:13:HAL_TIM_PWM_PulseFinishedCallback	16	static
-stm32f1xx_hal_tim.c:5601:13:HAL_TIM_PWM_PulseFinishedHalfCpltCallback	16	static
-stm32f1xx_hal_tim.c:5616:13:HAL_TIM_TriggerCallback	16	static
-stm32f1xx_hal_tim.c:5631:13:HAL_TIM_TriggerHalfCpltCallback	16	static
-stm32f1xx_hal_tim.c:5646:13:HAL_TIM_ErrorCallback	16	static
-stm32f1xx_hal_tim.c:6204:22:HAL_TIM_Base_GetState	16	static
-stm32f1xx_hal_tim.c:6214:22:HAL_TIM_OC_GetState	16	static
-stm32f1xx_hal_tim.c:6224:22:HAL_TIM_PWM_GetState	16	static
-stm32f1xx_hal_tim.c:6234:22:HAL_TIM_IC_GetState	16	static
-stm32f1xx_hal_tim.c:6244:22:HAL_TIM_OnePulse_GetState	16	static
-stm32f1xx_hal_tim.c:6254:22:HAL_TIM_Encoder_GetState	16	static
-stm32f1xx_hal_tim.c:6264:23:HAL_TIM_GetActiveChannel	16	static
-stm32f1xx_hal_tim.c:6282:29:HAL_TIM_GetChannelState	24	static
-stm32f1xx_hal_tim.c:6299:30:HAL_TIM_DMABurstState	16	static
-stm32f1xx_hal_tim.c:6324:6:TIM_DMAError	24	static
-stm32f1xx_hal_tim.c:6367:13:TIM_DMADelayPulseCplt	24	static
-stm32f1xx_hal_tim.c:6426:6:TIM_DMADelayPulseHalfCplt	24	static
-stm32f1xx_hal_tim.c:6465:6:TIM_DMACaptureCplt	24	static
-stm32f1xx_hal_tim.c:6528:6:TIM_DMACaptureHalfCplt	24	static
-stm32f1xx_hal_tim.c:6567:13:TIM_DMAPeriodElapsedCplt	24	static
-stm32f1xx_hal_tim.c:6588:13:TIM_DMAPeriodElapsedHalfCplt	24	static
-stm32f1xx_hal_tim.c:6604:13:TIM_DMATriggerCplt	24	static
-stm32f1xx_hal_tim.c:6625:13:TIM_DMATriggerHalfCplt	24	static
-stm32f1xx_hal_tim.c:6642:6:TIM_Base_SetConfig	24	static
-stm32f1xx_hal_tim.c:6690:13:TIM_OC1_SetConfig	32	static
-stm32f1xx_hal_tim.c:6765:6:TIM_OC2_SetConfig	32	static
-stm32f1xx_hal_tim.c:6841:13:TIM_OC3_SetConfig	32	static
-stm32f1xx_hal_tim.c:6915:13:TIM_OC4_SetConfig	32	static
-stm32f1xx_hal_tim.c:6975:26:TIM_SlaveTimer_SetConfig	32	static
-stm32f1xx_hal_tim.c:7106:6:TIM_TI1_SetConfig	32	static
-stm32f1xx_hal_tim.c:7153:13:TIM_TI1_ConfigInputStage	32	static
-stm32f1xx_hal_tim.c:7196:13:TIM_TI2_SetConfig	32	static
-stm32f1xx_hal_tim.c:7236:13:TIM_TI2_ConfigInputStage	32	static
-stm32f1xx_hal_tim.c:7278:13:TIM_TI3_SetConfig	32	static
-stm32f1xx_hal_tim.c:7325:13:TIM_TI4_SetConfig	32	static
-stm32f1xx_hal_tim.c:7368:13:TIM_ITRx_SetConfig	24	static
-stm32f1xx_hal_tim.c:7398:6:TIM_ETR_SetConfig	32	static
-stm32f1xx_hal_tim.c:7428:6:TIM_CCxChannelCmd	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:266:19:HAL_TIM_Base_Init	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:325:19:HAL_TIM_Base_DeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:368:13:HAL_TIM_Base_MspInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:383:13:HAL_TIM_Base_MspDeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:399:19:HAL_TIM_Base_Start	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:438:19:HAL_TIM_Base_Stop	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:458:19:HAL_TIM_Base_Start_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:500:19:HAL_TIM_Base_Stop_IT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:525:19:HAL_TIM_Base_Start_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:594:19:HAL_TIM_Base_Stop_DMA	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:649:19:HAL_TIM_OC_Init	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:708:19:HAL_TIM_OC_DeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:751:13:HAL_TIM_OC_MspInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:766:13:HAL_TIM_OC_MspDeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:787:19:HAL_TIM_OC_Start	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:841:19:HAL_TIM_OC_Stop	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:876:19:HAL_TIM_OC_Start_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:964:19:HAL_TIM_OC_Stop_IT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1035:19:HAL_TIM_OC_Start_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1193:19:HAL_TIM_OC_Stop_DMA	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1290:19:HAL_TIM_PWM_Init	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1349:19:HAL_TIM_PWM_DeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1392:13:HAL_TIM_PWM_MspInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1407:13:HAL_TIM_PWM_MspDeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1428:19:HAL_TIM_PWM_Start	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1482:19:HAL_TIM_PWM_Stop	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1517:19:HAL_TIM_PWM_Start_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1604:19:HAL_TIM_PWM_Stop_IT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1675:19:HAL_TIM_PWM_Start_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1832:19:HAL_TIM_PWM_Stop_DMA	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1929:19:HAL_TIM_IC_Init	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:1988:19:HAL_TIM_IC_DeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2031:13:HAL_TIM_IC_MspInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2046:13:HAL_TIM_IC_MspDeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2067:19:HAL_TIM_IC_Start	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2119:19:HAL_TIM_IC_Stop	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2149:19:HAL_TIM_IC_Start_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2234:19:HAL_TIM_IC_Stop_IT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2300:19:HAL_TIM_IC_Start_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2456:19:HAL_TIM_IC_Stop_DMA	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2555:19:HAL_TIM_OnePulse_Init	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2623:19:HAL_TIM_OnePulse_DeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2668:13:HAL_TIM_OnePulse_MspInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2683:13:HAL_TIM_OnePulse_MspDeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2703:19:HAL_TIM_OnePulse_Start	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2760:19:HAL_TIM_OnePulse_Stop	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2803:19:HAL_TIM_OnePulse_Start_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2866:19:HAL_TIM_OnePulse_Stop_IT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:2945:19:HAL_TIM_Encoder_Init	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3058:19:HAL_TIM_Encoder_DeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3103:13:HAL_TIM_Encoder_MspInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3118:13:HAL_TIM_Encoder_MspDeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3138:19:HAL_TIM_Encoder_Start	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3232:19:HAL_TIM_Encoder_Stop	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3292:19:HAL_TIM_Encoder_Start_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3392:19:HAL_TIM_Encoder_Stop_IT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3457:19:HAL_TIM_Encoder_Start_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3669:19:HAL_TIM_Encoder_Stop_DMA	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3746:6:HAL_TIM_IRQHandler	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:3961:19:HAL_TIM_OC_ConfigChannel	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4037:19:HAL_TIM_IC_ConfigChannel	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4130:19:HAL_TIM_PWM_ConfigChannel	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4241:19:HAL_TIM_OnePulse_ConfigChannel	56	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4380:19:HAL_TIM_DMABurst_WriteStart	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4426:19:HAL_TIM_DMABurst_MultiWriteStart	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4603:19:HAL_TIM_DMABurst_WriteStop	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4698:19:HAL_TIM_DMABurst_ReadStart	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4744:19:HAL_TIM_DMABurst_MultiReadStart	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4922:19:HAL_TIM_DMABurst_ReadStop	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:4999:19:HAL_TIM_GenerateEvent	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5036:19:HAL_TIM_ConfigOCrefClear	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5160:19:HAL_TIM_ConfigClockSource	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5312:19:HAL_TIM_ConfigTI1Input	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5344:19:HAL_TIM_SlaveConfigSynchro	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5384:19:HAL_TIM_SlaveConfigSynchro_IT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5427:10:HAL_TIM_ReadCapturedValue	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5511:13:HAL_TIM_PeriodElapsedCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5526:13:HAL_TIM_PeriodElapsedHalfCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5541:13:HAL_TIM_OC_DelayElapsedCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5556:13:HAL_TIM_IC_CaptureCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5571:13:HAL_TIM_IC_CaptureHalfCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5586:13:HAL_TIM_PWM_PulseFinishedCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5601:13:HAL_TIM_PWM_PulseFinishedHalfCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5616:13:HAL_TIM_TriggerCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5631:13:HAL_TIM_TriggerHalfCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:5646:13:HAL_TIM_ErrorCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6204:22:HAL_TIM_Base_GetState	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6214:22:HAL_TIM_OC_GetState	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6224:22:HAL_TIM_PWM_GetState	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6234:22:HAL_TIM_IC_GetState	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6244:22:HAL_TIM_OnePulse_GetState	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6254:22:HAL_TIM_Encoder_GetState	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6264:23:HAL_TIM_GetActiveChannel	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6282:29:HAL_TIM_GetChannelState	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6299:30:HAL_TIM_DMABurstState	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6324:6:TIM_DMAError	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6367:13:TIM_DMADelayPulseCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6426:6:TIM_DMADelayPulseHalfCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6465:6:TIM_DMACaptureCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6528:6:TIM_DMACaptureHalfCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6567:13:TIM_DMAPeriodElapsedCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6588:13:TIM_DMAPeriodElapsedHalfCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6604:13:TIM_DMATriggerCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6625:13:TIM_DMATriggerHalfCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6642:6:TIM_Base_SetConfig	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6690:13:TIM_OC1_SetConfig	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6765:6:TIM_OC2_SetConfig	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6841:13:TIM_OC3_SetConfig	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6915:13:TIM_OC4_SetConfig	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:6975:26:TIM_SlaveTimer_SetConfig	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7106:6:TIM_TI1_SetConfig	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7153:13:TIM_TI1_ConfigInputStage	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7196:13:TIM_TI2_SetConfig	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7236:13:TIM_TI2_ConfigInputStage	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7278:13:TIM_TI3_SetConfig	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7325:13:TIM_TI4_SetConfig	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7368:13:TIM_ITRx_SetConfig	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7398:6:TIM_ETR_SetConfig	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c:7428:6:TIM_CCxChannelCmd	32	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.cyclo
new file mode 100644
index 0000000..02eaf13
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.cyclo
@@ -0,0 +1,42 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:138:19:HAL_TIMEx_HallSensor_Init	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:239:19:HAL_TIMEx_HallSensor_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:284:13:HAL_TIMEx_HallSensor_MspInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:299:13:HAL_TIMEx_HallSensor_MspDeInit	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:314:19:HAL_TIMEx_HallSensor_Start	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:368:19:HAL_TIMEx_HallSensor_Stop	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:396:19:HAL_TIMEx_HallSensor_Start_IT	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:453:19:HAL_TIMEx_HallSensor_Stop_IT	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:486:19:HAL_TIMEx_HallSensor_Start_DMA	15
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:562:19:HAL_TIMEx_HallSensor_Stop_DMA	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:624:19:HAL_TIMEx_OCN_Start	15
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:675:19:HAL_TIMEx_OCN_Stop	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:707:19:HAL_TIMEx_OCN_Start_IT	19
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:789:19:HAL_TIMEx_OCN_Stop_IT	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:858:19:HAL_TIMEx_OCN_Start_DMA	28
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:990:19:HAL_TIMEx_OCN_Stop_DMA	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1085:19:HAL_TIMEx_PWMN_Start	15
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1135:19:HAL_TIMEx_PWMN_Stop	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1167:19:HAL_TIMEx_PWMN_Start_IT	19
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1248:19:HAL_TIMEx_PWMN_Stop_IT	13
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1318:19:HAL_TIMEx_PWMN_Start_DMA	28
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1450:19:HAL_TIMEx_PWMN_Stop_DMA	12
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1535:19:HAL_TIMEx_OnePulseN_Start	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1584:19:HAL_TIMEx_OnePulseN_Stop	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1623:19:HAL_TIMEx_OnePulseN_Start_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1678:19:HAL_TIMEx_OnePulseN_Stop_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1757:19:HAL_TIMEx_ConfigCommutEvent	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1813:19:HAL_TIMEx_ConfigCommutEvent_IT	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1870:19:HAL_TIMEx_ConfigCommutEvent_DMA	6
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1919:19:HAL_TIMEx_MasterConfigSynchronization	8
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1980:19:HAL_TIMEx_ConfigBreakDeadTime	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2027:19:HAL_TIMEx_RemapConfig	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2061:13:HAL_TIMEx_CommutCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2075:13:HAL_TIMEx_CommutHalfCpltCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2090:13:HAL_TIMEx_BreakCallback	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2123:22:HAL_TIMEx_HallSensor_GetState	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2138:29:HAL_TIMEx_GetChannelNState	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2167:6:TIMEx_DMACommutationCplt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2186:6:TIMEx_DMACommutationHalfCplt	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2206:13:TIM_DMADelayPulseNCplt	9
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2265:13:TIM_DMAErrorCCxN	4
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2310:13:TIM_CCxNChannelCmd	1
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.d
index ec22d3b..b1e77b5 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.su
index 00f2dcb..6bf82f3 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.su
@@ -1,42 +1,42 @@
-stm32f1xx_hal_tim_ex.c:138:19:HAL_TIMEx_HallSensor_Init	48	static
-stm32f1xx_hal_tim_ex.c:239:19:HAL_TIMEx_HallSensor_DeInit	16	static
-stm32f1xx_hal_tim_ex.c:284:13:HAL_TIMEx_HallSensor_MspInit	16	static
-stm32f1xx_hal_tim_ex.c:299:13:HAL_TIMEx_HallSensor_MspDeInit	16	static
-stm32f1xx_hal_tim_ex.c:314:19:HAL_TIMEx_HallSensor_Start	24	static
-stm32f1xx_hal_tim_ex.c:368:19:HAL_TIMEx_HallSensor_Stop	16	static
-stm32f1xx_hal_tim_ex.c:396:19:HAL_TIMEx_HallSensor_Start_IT	24	static
-stm32f1xx_hal_tim_ex.c:453:19:HAL_TIMEx_HallSensor_Stop_IT	16	static
-stm32f1xx_hal_tim_ex.c:486:19:HAL_TIMEx_HallSensor_Start_DMA	32	static
-stm32f1xx_hal_tim_ex.c:562:19:HAL_TIMEx_HallSensor_Stop_DMA	16	static
-stm32f1xx_hal_tim_ex.c:624:19:HAL_TIMEx_OCN_Start	24	static
-stm32f1xx_hal_tim_ex.c:675:19:HAL_TIMEx_OCN_Stop	16	static
-stm32f1xx_hal_tim_ex.c:707:19:HAL_TIMEx_OCN_Start_IT	24	static
-stm32f1xx_hal_tim_ex.c:789:19:HAL_TIMEx_OCN_Stop_IT	24	static
-stm32f1xx_hal_tim_ex.c:858:19:HAL_TIMEx_OCN_Start_DMA	32	static
-stm32f1xx_hal_tim_ex.c:990:19:HAL_TIMEx_OCN_Stop_DMA	16	static
-stm32f1xx_hal_tim_ex.c:1085:19:HAL_TIMEx_PWMN_Start	24	static
-stm32f1xx_hal_tim_ex.c:1135:19:HAL_TIMEx_PWMN_Stop	16	static
-stm32f1xx_hal_tim_ex.c:1167:19:HAL_TIMEx_PWMN_Start_IT	24	static
-stm32f1xx_hal_tim_ex.c:1248:19:HAL_TIMEx_PWMN_Stop_IT	24	static
-stm32f1xx_hal_tim_ex.c:1318:19:HAL_TIMEx_PWMN_Start_DMA	32	static
-stm32f1xx_hal_tim_ex.c:1450:19:HAL_TIMEx_PWMN_Stop_DMA	16	static
-stm32f1xx_hal_tim_ex.c:1535:19:HAL_TIMEx_OnePulseN_Start	24	static
-stm32f1xx_hal_tim_ex.c:1584:19:HAL_TIMEx_OnePulseN_Stop	24	static
-stm32f1xx_hal_tim_ex.c:1623:19:HAL_TIMEx_OnePulseN_Start_IT	24	static
-stm32f1xx_hal_tim_ex.c:1678:19:HAL_TIMEx_OnePulseN_Stop_IT	24	static
-stm32f1xx_hal_tim_ex.c:1757:19:HAL_TIMEx_ConfigCommutEvent	24	static
-stm32f1xx_hal_tim_ex.c:1813:19:HAL_TIMEx_ConfigCommutEvent_IT	24	static
-stm32f1xx_hal_tim_ex.c:1870:19:HAL_TIMEx_ConfigCommutEvent_DMA	24	static
-stm32f1xx_hal_tim_ex.c:1919:19:HAL_TIMEx_MasterConfigSynchronization	24	static
-stm32f1xx_hal_tim_ex.c:1980:19:HAL_TIMEx_ConfigBreakDeadTime	24	static
-stm32f1xx_hal_tim_ex.c:2027:19:HAL_TIMEx_RemapConfig	16	static
-stm32f1xx_hal_tim_ex.c:2061:13:HAL_TIMEx_CommutCallback	16	static
-stm32f1xx_hal_tim_ex.c:2075:13:HAL_TIMEx_CommutHalfCpltCallback	16	static
-stm32f1xx_hal_tim_ex.c:2090:13:HAL_TIMEx_BreakCallback	16	static
-stm32f1xx_hal_tim_ex.c:2123:22:HAL_TIMEx_HallSensor_GetState	16	static
-stm32f1xx_hal_tim_ex.c:2138:29:HAL_TIMEx_GetChannelNState	24	static
-stm32f1xx_hal_tim_ex.c:2167:6:TIMEx_DMACommutationCplt	24	static
-stm32f1xx_hal_tim_ex.c:2186:6:TIMEx_DMACommutationHalfCplt	24	static
-stm32f1xx_hal_tim_ex.c:2206:13:TIM_DMADelayPulseNCplt	24	static
-stm32f1xx_hal_tim_ex.c:2265:13:TIM_DMAErrorCCxN	24	static
-stm32f1xx_hal_tim_ex.c:2310:13:TIM_CCxNChannelCmd	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:138:19:HAL_TIMEx_HallSensor_Init	48	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:239:19:HAL_TIMEx_HallSensor_DeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:284:13:HAL_TIMEx_HallSensor_MspInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:299:13:HAL_TIMEx_HallSensor_MspDeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:314:19:HAL_TIMEx_HallSensor_Start	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:368:19:HAL_TIMEx_HallSensor_Stop	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:396:19:HAL_TIMEx_HallSensor_Start_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:453:19:HAL_TIMEx_HallSensor_Stop_IT	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:486:19:HAL_TIMEx_HallSensor_Start_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:562:19:HAL_TIMEx_HallSensor_Stop_DMA	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:624:19:HAL_TIMEx_OCN_Start	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:675:19:HAL_TIMEx_OCN_Stop	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:707:19:HAL_TIMEx_OCN_Start_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:789:19:HAL_TIMEx_OCN_Stop_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:858:19:HAL_TIMEx_OCN_Start_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:990:19:HAL_TIMEx_OCN_Stop_DMA	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1085:19:HAL_TIMEx_PWMN_Start	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1135:19:HAL_TIMEx_PWMN_Stop	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1167:19:HAL_TIMEx_PWMN_Start_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1248:19:HAL_TIMEx_PWMN_Stop_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1318:19:HAL_TIMEx_PWMN_Start_DMA	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1450:19:HAL_TIMEx_PWMN_Stop_DMA	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1535:19:HAL_TIMEx_OnePulseN_Start	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1584:19:HAL_TIMEx_OnePulseN_Stop	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1623:19:HAL_TIMEx_OnePulseN_Start_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1678:19:HAL_TIMEx_OnePulseN_Stop_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1757:19:HAL_TIMEx_ConfigCommutEvent	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1813:19:HAL_TIMEx_ConfigCommutEvent_IT	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1870:19:HAL_TIMEx_ConfigCommutEvent_DMA	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1919:19:HAL_TIMEx_MasterConfigSynchronization	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:1980:19:HAL_TIMEx_ConfigBreakDeadTime	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2027:19:HAL_TIMEx_RemapConfig	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2061:13:HAL_TIMEx_CommutCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2075:13:HAL_TIMEx_CommutHalfCpltCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2090:13:HAL_TIMEx_BreakCallback	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2123:22:HAL_TIMEx_HallSensor_GetState	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2138:29:HAL_TIMEx_GetChannelNState	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2167:6:TIMEx_DMACommutationCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2186:6:TIMEx_DMACommutationHalfCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2206:13:TIM_DMADelayPulseNCplt	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2265:13:TIM_DMAErrorCCxN	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c:2310:13:TIM_CCxNChannelCmd	32	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.cyclo b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.cyclo
new file mode 100644
index 0000000..a452b05
--- /dev/null
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.cyclo
@@ -0,0 +1,18 @@
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:207:20:FSMC_NORSRAM_Init	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:290:19:FSMC_NORSRAM_DeInit	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:327:19:FSMC_NORSRAM_Timing_Init	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:366:19:FSMC_NORSRAM_Extended_Timing_Init	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:438:19:FSMC_NORSRAM_WriteOperation_Enable	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:456:19:FSMC_NORSRAM_WriteOperation_Disable	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:528:19:FSMC_NAND_Init	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:575:19:FSMC_NAND_CommonSpace_Timing_Init	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:615:19:FSMC_NAND_AttributeSpace_Timing_Init	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:653:19:FSMC_NAND_DeInit	3
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:710:19:FSMC_NAND_ECC_Enable	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:736:19:FSMC_NAND_ECC_Disable	2
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:763:19:FSMC_NAND_GetECC	7
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:856:19:FSMC_PCCARD_Init	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:889:19:FSMC_PCCARD_CommonSpace_Timing_Init	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:918:19:FSMC_PCCARD_AttributeSpace_Timing_Init	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:947:19:FSMC_PCCARD_IOSpace_Timing_Init	1
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:974:19:FSMC_PCCARD_DeInit	1
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.d b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.d
index c212fcf..b8d835b 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.d
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.d
@@ -28,59 +28,31 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.o: \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.su b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.su
index 61234e3..fd0dd0c 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.su
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.su
@@ -1,18 +1,18 @@
-stm32f1xx_ll_fsmc.c:207:20:FSMC_NORSRAM_Init	32	static
-stm32f1xx_ll_fsmc.c:290:19:FSMC_NORSRAM_DeInit	24	static
-stm32f1xx_ll_fsmc.c:327:19:FSMC_NORSRAM_Timing_Init	24	static
-stm32f1xx_ll_fsmc.c:366:19:FSMC_NORSRAM_Extended_Timing_Init	24	static
-stm32f1xx_ll_fsmc.c:438:19:FSMC_NORSRAM_WriteOperation_Enable	16	static
-stm32f1xx_ll_fsmc.c:456:19:FSMC_NORSRAM_WriteOperation_Disable	16	static
-stm32f1xx_ll_fsmc.c:528:19:FSMC_NAND_Init	16	static
-stm32f1xx_ll_fsmc.c:575:19:FSMC_NAND_CommonSpace_Timing_Init	24	static
-stm32f1xx_ll_fsmc.c:615:19:FSMC_NAND_AttributeSpace_Timing_Init	24	static
-stm32f1xx_ll_fsmc.c:653:19:FSMC_NAND_DeInit	16	static
-stm32f1xx_ll_fsmc.c:710:19:FSMC_NAND_ECC_Enable	16	static
-stm32f1xx_ll_fsmc.c:736:19:FSMC_NAND_ECC_Disable	16	static
-stm32f1xx_ll_fsmc.c:763:19:FSMC_NAND_GetECC	32	static
-stm32f1xx_ll_fsmc.c:856:19:FSMC_PCCARD_Init	16	static
-stm32f1xx_ll_fsmc.c:889:19:FSMC_PCCARD_CommonSpace_Timing_Init	16	static
-stm32f1xx_ll_fsmc.c:918:19:FSMC_PCCARD_AttributeSpace_Timing_Init	16	static
-stm32f1xx_ll_fsmc.c:947:19:FSMC_PCCARD_IOSpace_Timing_Init	16	static
-stm32f1xx_ll_fsmc.c:974:19:FSMC_PCCARD_DeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:207:20:FSMC_NORSRAM_Init	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:290:19:FSMC_NORSRAM_DeInit	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:327:19:FSMC_NORSRAM_Timing_Init	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:366:19:FSMC_NORSRAM_Extended_Timing_Init	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:438:19:FSMC_NORSRAM_WriteOperation_Enable	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:456:19:FSMC_NORSRAM_WriteOperation_Disable	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:528:19:FSMC_NAND_Init	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:575:19:FSMC_NAND_CommonSpace_Timing_Init	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:615:19:FSMC_NAND_AttributeSpace_Timing_Init	24	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:653:19:FSMC_NAND_DeInit	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:710:19:FSMC_NAND_ECC_Enable	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:736:19:FSMC_NAND_ECC_Disable	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:763:19:FSMC_NAND_GetECC	32	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:856:19:FSMC_PCCARD_Init	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:889:19:FSMC_PCCARD_CommonSpace_Timing_Init	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:918:19:FSMC_PCCARD_AttributeSpace_Timing_Init	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:947:19:FSMC_PCCARD_IOSpace_Timing_Init	16	static
+../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c:974:19:FSMC_PCCARD_DeInit	16	static
diff --git a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk
index 939b77b..e8c9dbc 100644
--- a/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk
+++ b/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk
@@ -1,6 +1,6 @@
 ################################################################################
 # Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (9-2020-q2-update)
+# Toolchain: GNU Tools for STM32 (11.3.rel1)
 ################################################################################
 
 # Add inputs and outputs from these tool invocations to the build variables 
@@ -63,13 +63,13 @@ C_DEPS += \
 
 
 # Each subdirectory must supply rules for building sources it contributes
-Drivers/STM32F1xx_HAL_Driver/Src/%.o: ../Drivers/STM32F1xx_HAL_Driver/Src/%.c Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/Desktop/M3s_stm32/SW_APPs" -I"C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices" -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+Drivers/STM32F1xx_HAL_Driver/Src/%.o Drivers/STM32F1xx_HAL_Driver/Src/%.su Drivers/STM32F1xx_HAL_Driver/Src/%.cyclo: ../Drivers/STM32F1xx_HAL_Driver/Src/%.c Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/m3s_stm32/SW_APPs" -I"C:/Users/wuwen/m3s_stm32/HW_Devices" -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 
 clean: clean-Drivers-2f-STM32F1xx_HAL_Driver-2f-Src
 
 clean-Drivers-2f-STM32F1xx_HAL_Driver-2f-Src:
-	-$(RM) ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.o
+	-$(RM) ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.su
 
 .PHONY: clean-Drivers-2f-STM32F1xx_HAL_Driver-2f-Src
 
diff --git a/Debug/HW_Devices/LCD.cyclo b/Debug/HW_Devices/LCD.cyclo
new file mode 100644
index 0000000..b1ae9d5
--- /dev/null
+++ b/Debug/HW_Devices/LCD.cyclo
@@ -0,0 +1,22 @@
+../HW_Devices/LCD.c:13:6:LCD_WR_REG	1
+../HW_Devices/LCD.c:19:6:LCD_WR_DATA	1
+../HW_Devices/LCD.c:25:10:LCD_RD_DATA	1
+../HW_Devices/LCD.c:32:6:LCD_WriteReg	1
+../HW_Devices/LCD.c:40:10:LCD_ReadReg	1
+../HW_Devices/LCD.c:250:6:LCD_DisplayOn	4
+../HW_Devices/LCD.c:256:6:LCD_DisplayOff	4
+../HW_Devices/LCD.c:266:6:LCD_Scan_Dir	35
+../HW_Devices/LCD.c:384:6:LCD_Display_Dir	14
+../HW_Devices/LCD.c:449:6:LCDx_Init	1
+../HW_Devices/LCD.c:532:6:LCD_SetCursor	6
+../HW_Devices/LCD.c:562:6:LCD_Fast_DrawPoint	6
+../HW_Devices/LCD.c:593:6:LCD_set_dot	1
+../HW_Devices/LCD.c:602:6:LCD_Clear	4
+../HW_Devices/LCD.c:626:6:LCD_Fill	5
+../HW_Devices/LCD.c:659:6:LCD_Color_Fill	3
+../HW_Devices/LCD.c:680:10:LCD_BGR2RGB	1
+../HW_Devices/LCD.c:692:10:LCD_ReadPoint	17
+../HW_Devices/LCD.c:720:6:LCD_DrawLine	9
+../HW_Devices/LCD.c:758:6:Draw_Circle	3
+../HW_Devices/LCD.c:791:6:LCD_ShowChar	9
+../HW_Devices/LCD.c:829:6:LCD_ShowString	4
diff --git a/Debug/HW_Devices/LCD.d b/Debug/HW_Devices/LCD.d
index 05fd31e..7430f38 100644
--- a/Debug/HW_Devices/LCD.d
+++ b/Debug/HW_Devices/LCD.d
@@ -27,63 +27,33 @@ HW_Devices/LCD.o: ../HW_Devices/LCD.c ../HW_Devices/LCD.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../HW_Devices/LCD.h:
-
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/HW_Devices/LCD.su b/Debug/HW_Devices/LCD.su
index 15174f3..d0373c6 100644
--- a/Debug/HW_Devices/LCD.su
+++ b/Debug/HW_Devices/LCD.su
@@ -1,22 +1,22 @@
-LCD.c:13:6:LCD_WR_REG	16	static
-LCD.c:19:6:LCD_WR_DATA	16	static
-LCD.c:25:10:LCD_RD_DATA	4	static
-LCD.c:32:6:LCD_WriteReg	16	static
-LCD.c:40:10:LCD_ReadReg	16	static
-LCD.c:250:6:LCD_DisplayOn	8	static
-LCD.c:256:6:LCD_DisplayOff	8	static
-LCD.c:266:6:LCD_Scan_Dir	24	static
-LCD.c:384:6:LCD_Display_Dir	16	static
-LCD.c:449:6:LCDx_Init	8	static
-LCD.c:532:6:LCD_SetCursor	16	static
-LCD.c:562:6:LCD_Fast_DrawPoint	16	static
-LCD.c:593:6:LCD_set_dot	16	static
-LCD.c:602:6:LCD_Clear	24	static
-LCD.c:626:6:LCD_Fill	40	static
-LCD.c:659:6:LCD_Color_Fill	32	static
-LCD.c:680:10:LCD_BGR2RGB	24	static
-LCD.c:692:10:LCD_ReadPoint	24	static
-LCD.c:720:6:LCD_DrawLine	64	static
-LCD.c:758:6:Draw_Circle	40	static
-LCD.c:791:6:LCD_ShowChar	32	static
-LCD.c:829:6:LCD_ShowString	40	static
+../HW_Devices/LCD.c:13:6:LCD_WR_REG	16	static
+../HW_Devices/LCD.c:19:6:LCD_WR_DATA	16	static
+../HW_Devices/LCD.c:25:10:LCD_RD_DATA	4	static
+../HW_Devices/LCD.c:32:6:LCD_WriteReg	16	static
+../HW_Devices/LCD.c:40:10:LCD_ReadReg	16	static
+../HW_Devices/LCD.c:250:6:LCD_DisplayOn	8	static
+../HW_Devices/LCD.c:256:6:LCD_DisplayOff	8	static
+../HW_Devices/LCD.c:266:6:LCD_Scan_Dir	24	static
+../HW_Devices/LCD.c:384:6:LCD_Display_Dir	16	static
+../HW_Devices/LCD.c:449:6:LCDx_Init	8	static
+../HW_Devices/LCD.c:532:6:LCD_SetCursor	16	static
+../HW_Devices/LCD.c:562:6:LCD_Fast_DrawPoint	16	static
+../HW_Devices/LCD.c:593:6:LCD_set_dot	16	static
+../HW_Devices/LCD.c:602:6:LCD_Clear	24	static
+../HW_Devices/LCD.c:626:6:LCD_Fill	40	static
+../HW_Devices/LCD.c:659:6:LCD_Color_Fill	32	static
+../HW_Devices/LCD.c:680:10:LCD_BGR2RGB	24	static
+../HW_Devices/LCD.c:692:10:LCD_ReadPoint	24	static
+../HW_Devices/LCD.c:720:6:LCD_DrawLine	64	static
+../HW_Devices/LCD.c:758:6:Draw_Circle	40	static
+../HW_Devices/LCD.c:791:6:LCD_ShowChar	32	static
+../HW_Devices/LCD.c:829:6:LCD_ShowString	40	static
diff --git a/Debug/HW_Devices/buzzer.cyclo b/Debug/HW_Devices/buzzer.cyclo
new file mode 100644
index 0000000..42997cd
--- /dev/null
+++ b/Debug/HW_Devices/buzzer.cyclo
@@ -0,0 +1,4 @@
+../HW_Devices/buzzer.c:13:6:play_ones	1
+../HW_Devices/buzzer.c:21:6:add_a_note	4
+../HW_Devices/buzzer.c:49:6:delhead	3
+../HW_Devices/buzzer.c:74:6:buzzer_play_server	5
diff --git a/Debug/HW_Devices/buzzer.d b/Debug/HW_Devices/buzzer.d
index 01e9e99..f070501 100644
--- a/Debug/HW_Devices/buzzer.d
+++ b/Debug/HW_Devices/buzzer.d
@@ -27,63 +27,33 @@ HW_Devices/buzzer.o: ../HW_Devices/buzzer.c ../HW_Devices/buzzer.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../HW_Devices/buzzer.h:
-
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/HW_Devices/buzzer.su b/Debug/HW_Devices/buzzer.su
index bf7ee87..dc90cb6 100644
--- a/Debug/HW_Devices/buzzer.su
+++ b/Debug/HW_Devices/buzzer.su
@@ -1,4 +1,4 @@
-buzzer.c:13:6:play_ones	24	static
-buzzer.c:21:6:add_a_note	24	static
-buzzer.c:49:6:delhead	16	static
-buzzer.c:74:6:buzzer_play_server	8	static
+../HW_Devices/buzzer.c:13:6:play_ones	24	static
+../HW_Devices/buzzer.c:21:6:add_a_note	24	static
+../HW_Devices/buzzer.c:49:6:delhead	16	static
+../HW_Devices/buzzer.c:74:6:buzzer_play_server	8	static
diff --git a/Debug/HW_Devices/eeprom.cyclo b/Debug/HW_Devices/eeprom.cyclo
new file mode 100644
index 0000000..934248a
--- /dev/null
+++ b/Debug/HW_Devices/eeprom.cyclo
@@ -0,0 +1,4 @@
+../HW_Devices/eeprom.c:17:6:EPPROM_SLOWWRITE_INIT	1
+../HW_Devices/eeprom.c:27:6:EEPROM_SLOWWRITE_SERVER	4
+../HW_Devices/eeprom.c:54:6:EEPROM_READ_BATY	1
+../HW_Devices/eeprom.c:59:6:EEPROM_WRITE_BATY	4
diff --git a/Debug/HW_Devices/eeprom.d b/Debug/HW_Devices/eeprom.d
index 9e9ddee..dd81622 100644
--- a/Debug/HW_Devices/eeprom.d
+++ b/Debug/HW_Devices/eeprom.d
@@ -28,65 +28,34 @@ HW_Devices/eeprom.o: ../HW_Devices/eeprom.c ../HW_Devices/eeprom.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
  ../HW_Devices/iic.h
-
 ../HW_Devices/eeprom.h:
-
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
-
 ../HW_Devices/iic.h:
diff --git a/Debug/HW_Devices/eeprom.su b/Debug/HW_Devices/eeprom.su
index 88d4746..4ff417c 100644
--- a/Debug/HW_Devices/eeprom.su
+++ b/Debug/HW_Devices/eeprom.su
@@ -1,4 +1,4 @@
-eeprom.c:17:6:EPPROM_SLOWWRITE_INIT	4	static
-eeprom.c:27:6:EEPROM_SLOWWRITE_SERVER	16	static
-eeprom.c:54:6:EEPROM_READ_BATY	16	static
-eeprom.c:59:6:EEPROM_WRITE_BATY	32	static
+../HW_Devices/eeprom.c:17:6:EPPROM_SLOWWRITE_INIT	4	static
+../HW_Devices/eeprom.c:27:6:EEPROM_SLOWWRITE_SERVER	16	static
+../HW_Devices/eeprom.c:54:6:EEPROM_READ_BATY	16	static
+../HW_Devices/eeprom.c:59:6:EEPROM_WRITE_BATY	32	static
diff --git a/Debug/HW_Devices/iic.cyclo b/Debug/HW_Devices/iic.cyclo
new file mode 100644
index 0000000..f656bf9
--- /dev/null
+++ b/Debug/HW_Devices/iic.cyclo
@@ -0,0 +1,2 @@
+../HW_Devices/iic.c:13:6:IIC_SAND_DATE	1
+../HW_Devices/iic.c:18:6:IIC_READ_DATE	1
diff --git a/Debug/HW_Devices/iic.d b/Debug/HW_Devices/iic.d
index 5874eac..e579f1e 100644
--- a/Debug/HW_Devices/iic.d
+++ b/Debug/HW_Devices/iic.d
@@ -27,63 +27,33 @@ HW_Devices/iic.o: ../HW_Devices/iic.c ../HW_Devices/iic.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../HW_Devices/iic.h:
-
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/HW_Devices/iic.su b/Debug/HW_Devices/iic.su
index 5c5077c..dbfae78 100644
--- a/Debug/HW_Devices/iic.su
+++ b/Debug/HW_Devices/iic.su
@@ -1,2 +1,2 @@
-iic.c:13:6:IIC_SAND_DATE	40	static
-iic.c:18:6:IIC_READ_DATE	40	static
+../HW_Devices/iic.c:13:6:IIC_SAND_DATE	40	static
+../HW_Devices/iic.c:18:6:IIC_READ_DATE	40	static
diff --git a/Debug/HW_Devices/key.cyclo b/Debug/HW_Devices/key.cyclo
new file mode 100644
index 0000000..f9b6517
--- /dev/null
+++ b/Debug/HW_Devices/key.cyclo
@@ -0,0 +1 @@
+../HW_Devices/key.c:13:6:GEI_BUTTON_CODE	9
diff --git a/Debug/HW_Devices/key.d b/Debug/HW_Devices/key.d
index d05fd82..516b2eb 100644
--- a/Debug/HW_Devices/key.d
+++ b/Debug/HW_Devices/key.d
@@ -27,63 +27,33 @@ HW_Devices/key.o: ../HW_Devices/key.c ../HW_Devices/key.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../HW_Devices/key.h:
-
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/HW_Devices/key.su b/Debug/HW_Devices/key.su
index 5790ffc..66d975d 100644
--- a/Debug/HW_Devices/key.su
+++ b/Debug/HW_Devices/key.su
@@ -1 +1 @@
-key.c:13:6:GEI_BUTTON_CODE	16	static
+../HW_Devices/key.c:13:6:GEI_BUTTON_CODE	16	static
diff --git a/Debug/HW_Devices/rs522.cyclo b/Debug/HW_Devices/rs522.cyclo
new file mode 100644
index 0000000..d0e76ac
--- /dev/null
+++ b/Debug/HW_Devices/rs522.cyclo
@@ -0,0 +1,19 @@
+../HW_Devices/rs522.c:18:9:ReadRawRC	1
+../HW_Devices/rs522.c:38:6:WriteRawRC	1
+../HW_Devices/rs522.c:56:6:SetBitMask	1
+../HW_Devices/rs522.c:71:6:ClearBitMask	1
+../HW_Devices/rs522.c:86:6:PcdAntennaOn	2
+../HW_Devices/rs522.c:104:6:PcdAntennaOff	1
+../HW_Devices/rs522.c:118:6:PcdReset	2
+../HW_Devices/rs522.c:140:6:M500PcdConfigISOType	2
+../HW_Devices/rs522.c:171:6:PcdComMF522	16
+../HW_Devices/rs522.c:282:6:PcdRequest	3
+../HW_Devices/rs522.c:314:6:PcdAnticoll	4
+../HW_Devices/rs522.c:353:6:CalulateCRC	4
+../HW_Devices/rs522.c:383:6:PcdSelect	4
+../HW_Devices/rs522.c:426:6:PcdAuthState	5
+../HW_Devices/rs522.c:465:6:PcdWrite	9
+../HW_Devices/rs522.c:506:6:PcdRead	4
+../HW_Devices/rs522.c:539:6:PcdHalt	1
+../HW_Devices/rs522.c:552:6:IC_CMT	2
+../HW_Devices/rs522.c:571:6:RC522_Init	1
diff --git a/Debug/HW_Devices/rs522.d b/Debug/HW_Devices/rs522.d
index 6199dd2..2602e2f 100644
--- a/Debug/HW_Devices/rs522.d
+++ b/Debug/HW_Devices/rs522.d
@@ -27,63 +27,33 @@ HW_Devices/rs522.o: ../HW_Devices/rs522.c ../HW_Devices/rs522.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h
-
 ../HW_Devices/rs522.h:
-
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
diff --git a/Debug/HW_Devices/rs522.su b/Debug/HW_Devices/rs522.su
index 0dd3edc..a97c0c8 100644
--- a/Debug/HW_Devices/rs522.su
+++ b/Debug/HW_Devices/rs522.su
@@ -1,19 +1,19 @@
-rs522.c:18:9:ReadRawRC	24	static
-rs522.c:38:6:WriteRawRC	24	static
-rs522.c:56:6:SetBitMask	24	static
-rs522.c:71:6:ClearBitMask	24	static
-rs522.c:86:6:PcdAntennaOn	16	static
-rs522.c:104:6:PcdAntennaOff	8	static
-rs522.c:118:6:PcdReset	8	static
-rs522.c:140:6:M500PcdConfigISOType	16	static
-rs522.c:171:6:PcdComMF522	48	static
-rs522.c:282:6:PcdRequest	48	static
-rs522.c:314:6:PcdAnticoll	56	static
-rs522.c:353:6:CalulateCRC	40	static
-rs522.c:383:6:PcdSelect	48	static
-rs522.c:426:6:PcdAuthState	56	static
-rs522.c:465:6:PcdWrite	48	static
-rs522.c:506:6:PcdRead	48	static
-rs522.c:539:6:PcdHalt	40	static
-rs522.c:552:6:IC_CMT	32	static
-rs522.c:571:6:RC522_Init	8	static
+../HW_Devices/rs522.c:18:9:ReadRawRC	24	static
+../HW_Devices/rs522.c:38:6:WriteRawRC	24	static
+../HW_Devices/rs522.c:56:6:SetBitMask	24	static
+../HW_Devices/rs522.c:71:6:ClearBitMask	24	static
+../HW_Devices/rs522.c:86:6:PcdAntennaOn	16	static
+../HW_Devices/rs522.c:104:6:PcdAntennaOff	8	static
+../HW_Devices/rs522.c:118:6:PcdReset	8	static
+../HW_Devices/rs522.c:140:6:M500PcdConfigISOType	16	static
+../HW_Devices/rs522.c:171:6:PcdComMF522	48	static
+../HW_Devices/rs522.c:282:6:PcdRequest	48	static
+../HW_Devices/rs522.c:314:6:PcdAnticoll	56	static
+../HW_Devices/rs522.c:353:6:CalulateCRC	40	static
+../HW_Devices/rs522.c:383:6:PcdSelect	48	static
+../HW_Devices/rs522.c:426:6:PcdAuthState	56	static
+../HW_Devices/rs522.c:465:6:PcdWrite	48	static
+../HW_Devices/rs522.c:506:6:PcdRead	48	static
+../HW_Devices/rs522.c:539:6:PcdHalt	40	static
+../HW_Devices/rs522.c:552:6:IC_CMT	32	static
+../HW_Devices/rs522.c:571:6:RC522_Init	8	static
diff --git a/Debug/HW_Devices/subdir.mk b/Debug/HW_Devices/subdir.mk
index 3c1ad56..05a8c1b 100644
--- a/Debug/HW_Devices/subdir.mk
+++ b/Debug/HW_Devices/subdir.mk
@@ -1,6 +1,6 @@
 ################################################################################
 # Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (9-2020-q2-update)
+# Toolchain: GNU Tools for STM32 (11.3.rel1)
 ################################################################################
 
 # Add inputs and outputs from these tool invocations to the build variables 
@@ -33,13 +33,13 @@ C_DEPS += \
 
 
 # Each subdirectory must supply rules for building sources it contributes
-HW_Devices/%.o: ../HW_Devices/%.c HW_Devices/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/Desktop/M3s_stm32/SW_APPs" -I"C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices" -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+HW_Devices/%.o HW_Devices/%.su HW_Devices/%.cyclo: ../HW_Devices/%.c HW_Devices/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/m3s_stm32/SW_APPs" -I"C:/Users/wuwen/m3s_stm32/HW_Devices" -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 
 clean: clean-HW_Devices
 
 clean-HW_Devices:
-	-$(RM) ./HW_Devices/LCD.d ./HW_Devices/LCD.o ./HW_Devices/buzzer.d ./HW_Devices/buzzer.o ./HW_Devices/eeprom.d ./HW_Devices/eeprom.o ./HW_Devices/iic.d ./HW_Devices/iic.o ./HW_Devices/key.d ./HW_Devices/key.o ./HW_Devices/rs522.d ./HW_Devices/rs522.o ./HW_Devices/touch.d ./HW_Devices/touch.o
+	-$(RM) ./HW_Devices/LCD.cyclo ./HW_Devices/LCD.d ./HW_Devices/LCD.o ./HW_Devices/LCD.su ./HW_Devices/buzzer.cyclo ./HW_Devices/buzzer.d ./HW_Devices/buzzer.o ./HW_Devices/buzzer.su ./HW_Devices/eeprom.cyclo ./HW_Devices/eeprom.d ./HW_Devices/eeprom.o ./HW_Devices/eeprom.su ./HW_Devices/iic.cyclo ./HW_Devices/iic.d ./HW_Devices/iic.o ./HW_Devices/iic.su ./HW_Devices/key.cyclo ./HW_Devices/key.d ./HW_Devices/key.o ./HW_Devices/key.su ./HW_Devices/rs522.cyclo ./HW_Devices/rs522.d ./HW_Devices/rs522.o ./HW_Devices/rs522.su ./HW_Devices/touch.cyclo ./HW_Devices/touch.d ./HW_Devices/touch.o ./HW_Devices/touch.su
 
 .PHONY: clean-HW_Devices
 
diff --git a/Debug/HW_Devices/touch.cyclo b/Debug/HW_Devices/touch.cyclo
new file mode 100644
index 0000000..b0712ac
--- /dev/null
+++ b/Debug/HW_Devices/touch.cyclo
@@ -0,0 +1,9 @@
+../HW_Devices/touch.c:20:6:TP_Write_Byte	3
+../HW_Devices/touch.c:36:10:TP_Read_AD	3
+../HW_Devices/touch.c:70:10:TP_Read_XOY	6
+../HW_Devices/touch.c:97:6:TP_Read_XY_ADC	1
+../HW_Devices/touch.c:111:9:TP_Read_XY2	9
+../HW_Devices/touch.c:131:6:TP_Server	3
+../HW_Devices/touch.c:154:6:TP_XY	2
+../HW_Devices/touch.c:167:6:TP_DrwaTrage	1
+../HW_Devices/touch.c:178:6:TP_adjustment	27
diff --git a/Debug/HW_Devices/touch.d b/Debug/HW_Devices/touch.d
index 4542d4e..3a4bcbe 100644
--- a/Debug/HW_Devices/touch.d
+++ b/Debug/HW_Devices/touch.d
@@ -28,67 +28,35 @@ HW_Devices/touch.o: ../HW_Devices/touch.c ../HW_Devices/touch.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
  ../HW_Devices/LCD.h ../HW_Devices/eeprom.h
-
 ../HW_Devices/touch.h:
-
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
-
 ../HW_Devices/LCD.h:
-
 ../HW_Devices/eeprom.h:
diff --git a/Debug/HW_Devices/touch.su b/Debug/HW_Devices/touch.su
index bda2a89..13e8c26 100644
--- a/Debug/HW_Devices/touch.su
+++ b/Debug/HW_Devices/touch.su
@@ -1,9 +1,9 @@
-touch.c:20:6:TP_Write_Byte	24	static
-touch.c:36:10:TP_Read_AD	24	static
-touch.c:70:10:TP_Read_XOY	48	static
-touch.c:97:6:TP_Read_XY_ADC	24	static
-touch.c:111:9:TP_Read_XY2	24	static
-touch.c:131:6:TP_Server	16	static
-touch.c:154:6:TP_XY	24	static
-touch.c:167:6:TP_DrwaTrage	40	static
-touch.c:178:6:TP_adjustment	168	static
+../HW_Devices/touch.c:20:6:TP_Write_Byte	24	static
+../HW_Devices/touch.c:36:10:TP_Read_AD	24	static
+../HW_Devices/touch.c:70:10:TP_Read_XOY	48	static
+../HW_Devices/touch.c:97:6:TP_Read_XY_ADC	24	static
+../HW_Devices/touch.c:111:9:TP_Read_XY2	24	static
+../HW_Devices/touch.c:131:6:TP_Server	16	static
+../HW_Devices/touch.c:154:6:TP_XY	24	static
+../HW_Devices/touch.c:167:6:TP_DrwaTrage	40	static
+../HW_Devices/touch.c:178:6:TP_adjustment	168	static
diff --git a/Debug/SW_APPs/APP_IDcard.cyclo b/Debug/SW_APPs/APP_IDcard.cyclo
new file mode 100644
index 0000000..b7bccb1
--- /dev/null
+++ b/Debug/SW_APPs/APP_IDcard.cyclo
@@ -0,0 +1,2 @@
+../SW_APPs/APP_IDcard.c:12:6:APP_IDcard_init	1
+../SW_APPs/APP_IDcard.c:30:6:APP_IDcard_loop	8
diff --git a/Debug/SW_APPs/APP_IDcard.d b/Debug/SW_APPs/APP_IDcard.d
index 5c0f6a6..3deac02 100644
--- a/Debug/SW_APPs/APP_IDcard.d
+++ b/Debug/SW_APPs/APP_IDcard.d
@@ -27,71 +27,38 @@ SW_APPs/APP_IDcard.o: ../SW_APPs/APP_IDcard.c ../SW_APPs/APP_IDcard.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
- ../SW_APPs/windows.h C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/lcd.h \
- C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/rs522.h
-
+ ../SW_APPs/windows.h C:/Users/wuwen/m3s_stm32/HW_Devices/lcd.h \
+ C:/Users/wuwen/m3s_stm32/HW_Devices/rs522.h
 ../SW_APPs/APP_IDcard.h:
-
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
-
 ../SW_APPs/windows.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/lcd.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/rs522.h:
+C:/Users/wuwen/m3s_stm32/HW_Devices/lcd.h:
+C:/Users/wuwen/m3s_stm32/HW_Devices/rs522.h:
diff --git a/Debug/SW_APPs/APP_IDcard.su b/Debug/SW_APPs/APP_IDcard.su
index fca7088..3b5279a 100644
--- a/Debug/SW_APPs/APP_IDcard.su
+++ b/Debug/SW_APPs/APP_IDcard.su
@@ -1,2 +1,2 @@
-APP_IDcard.c:12:6:APP_IDcard_init	16	static
-APP_IDcard.c:30:6:APP_IDcard_loop	24	static
+../SW_APPs/APP_IDcard.c:12:6:APP_IDcard_init	16	static
+../SW_APPs/APP_IDcard.c:30:6:APP_IDcard_loop	24	static
diff --git a/Debug/SW_APPs/APP_blood.cyclo b/Debug/SW_APPs/APP_blood.cyclo
new file mode 100644
index 0000000..06328c5
--- /dev/null
+++ b/Debug/SW_APPs/APP_blood.cyclo
@@ -0,0 +1,15 @@
+../SW_APPs/APP_blood.c:18:9:Max30102_reset	1
+../SW_APPs/APP_blood.c:24:6:MAX30102_Config	1
+../SW_APPs/APP_blood.c:47:6:max30102_read_fifo	3
+../SW_APPs/APP_blood.c:93:6:APP_blood_init	1
+../SW_APPs/APP_blood.c:178:8:my_floor	2
+../SW_APPs/APP_blood.c:188:8:my_fmod	5
+../SW_APPs/APP_blood.c:202:8:XSin	6
+../SW_APPs/APP_blood.c:227:8:XCos	1
+../SW_APPs/APP_blood.c:233:5:qsqrt	3
+../SW_APPs/APP_blood.c:272:14:EE	1
+../SW_APPs/APP_blood.c:284:6:FFT	8
+../SW_APPs/APP_blood.c:341:5:find_max_num_index	3
+../SW_APPs/APP_blood.c:360:6:blood_data_translate	7
+../SW_APPs/APP_blood.c:436:6:APP_blood_loop	3
+../SW_APPs/APP_blood.c:501:6:HAL_TIM_PeriodElapsedCallback	3
diff --git a/Debug/SW_APPs/APP_blood.d b/Debug/SW_APPs/APP_blood.d
index 390530a..2d6d7b5 100644
--- a/Debug/SW_APPs/APP_blood.d
+++ b/Debug/SW_APPs/APP_blood.d
@@ -27,76 +27,41 @@ SW_APPs/APP_blood.o: ../SW_APPs/APP_blood.c ../SW_APPs/APP_blood.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
- ../SW_APPs/windows.h C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/lcd.h \
- C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/LCD.h \
- C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/iic.h ../SW_APPs/FFT.h
-
+ ../SW_APPs/windows.h C:/Users/wuwen/m3s_stm32/HW_Devices/lcd.h \
+ C:/Users/wuwen/m3s_stm32/HW_Devices/LCD.h \
+ C:/Users/wuwen/m3s_stm32/HW_Devices/iic.h ../SW_APPs/FFT.h
 ../SW_APPs/APP_blood.h:
-
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
-
 ../SW_APPs/windows.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/lcd.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/LCD.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/iic.h:
-
+C:/Users/wuwen/m3s_stm32/HW_Devices/lcd.h:
+C:/Users/wuwen/m3s_stm32/HW_Devices/LCD.h:
+C:/Users/wuwen/m3s_stm32/HW_Devices/iic.h:
 ../SW_APPs/FFT.h:
diff --git a/Debug/SW_APPs/APP_blood.su b/Debug/SW_APPs/APP_blood.su
index 0d85675..2ece4d1 100644
--- a/Debug/SW_APPs/APP_blood.su
+++ b/Debug/SW_APPs/APP_blood.su
@@ -1,15 +1,15 @@
-APP_blood.c:18:9:Max30102_reset	16	static
-APP_blood.c:24:6:MAX30102_Config	16	static
-APP_blood.c:47:6:max30102_read_fifo	16	static
-APP_blood.c:93:6:APP_blood_init	16	static
-APP_blood.c:178:8:my_floor	24	static
-APP_blood.c:188:8:my_fmod	48	static
-APP_blood.c:202:8:XSin	64	static
-APP_blood.c:227:8:XCos	16	static
-APP_blood.c:233:5:qsqrt	32	static
-APP_blood.c:272:14:EE	40	static
-APP_blood.c:284:6:FFT	104	static
-APP_blood.c:341:5:find_max_num_index	32	static
-APP_blood.c:360:6:blood_data_translate	64	static
-APP_blood.c:436:6:APP_blood_loop	16	static
-APP_blood.c:501:6:HAL_TIM_PeriodElapsedCallback	24	static
+../SW_APPs/APP_blood.c:18:9:Max30102_reset	16	static
+../SW_APPs/APP_blood.c:24:6:MAX30102_Config	16	static
+../SW_APPs/APP_blood.c:47:6:max30102_read_fifo	16	static
+../SW_APPs/APP_blood.c:93:6:APP_blood_init	16	static
+../SW_APPs/APP_blood.c:178:8:my_floor	24	static
+../SW_APPs/APP_blood.c:188:8:my_fmod	48	static
+../SW_APPs/APP_blood.c:202:8:XSin	72	static
+../SW_APPs/APP_blood.c:227:8:XCos	16	static
+../SW_APPs/APP_blood.c:233:5:qsqrt	32	static
+../SW_APPs/APP_blood.c:272:14:EE	40	static
+../SW_APPs/APP_blood.c:284:6:FFT	104	static
+../SW_APPs/APP_blood.c:341:5:find_max_num_index	32	static
+../SW_APPs/APP_blood.c:360:6:blood_data_translate	64	static
+../SW_APPs/APP_blood.c:436:6:APP_blood_loop	16	static
+../SW_APPs/APP_blood.c:501:6:HAL_TIM_PeriodElapsedCallback	24	static
diff --git a/Debug/SW_APPs/APP_morsecode.cyclo b/Debug/SW_APPs/APP_morsecode.cyclo
new file mode 100644
index 0000000..946d134
--- /dev/null
+++ b/Debug/SW_APPs/APP_morsecode.cyclo
@@ -0,0 +1,3 @@
+../SW_APPs/APP_morsecode.c:154:6:APP_morsecode_init	2
+../SW_APPs/APP_morsecode.c:167:6:getmorsecode	4
+../SW_APPs/APP_morsecode.c:182:6:APP_morsecode_loop	37
diff --git a/Debug/SW_APPs/APP_morsecode.d b/Debug/SW_APPs/APP_morsecode.d
index a2a48d2..def1a94 100644
--- a/Debug/SW_APPs/APP_morsecode.d
+++ b/Debug/SW_APPs/APP_morsecode.d
@@ -28,71 +28,38 @@ SW_APPs/APP_morsecode.o: ../SW_APPs/APP_morsecode.c \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
- ../SW_APPs/windows.h C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/lcd.h \
- C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/key.h
-
+ ../SW_APPs/windows.h C:/Users/wuwen/m3s_stm32/HW_Devices/lcd.h \
+ C:/Users/wuwen/m3s_stm32/HW_Devices/key.h
 ../SW_APPs/APP_morsecode.h:
-
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
-
 ../SW_APPs/windows.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/lcd.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/key.h:
+C:/Users/wuwen/m3s_stm32/HW_Devices/lcd.h:
+C:/Users/wuwen/m3s_stm32/HW_Devices/key.h:
diff --git a/Debug/SW_APPs/APP_morsecode.su b/Debug/SW_APPs/APP_morsecode.su
index 26f5911..9f295bd 100644
--- a/Debug/SW_APPs/APP_morsecode.su
+++ b/Debug/SW_APPs/APP_morsecode.su
@@ -1,3 +1,3 @@
-APP_morsecode.c:154:6:APP_morsecode_init	24	static
-APP_morsecode.c:167:6:getmorsecode	24	static
-APP_morsecode.c:182:6:APP_morsecode_loop	48	static
+../SW_APPs/APP_morsecode.c:154:6:APP_morsecode_init	24	static
+../SW_APPs/APP_morsecode.c:167:6:getmorsecode	24	static
+../SW_APPs/APP_morsecode.c:182:6:APP_morsecode_loop	48	static
diff --git a/Debug/SW_APPs/Main_APP.cyclo b/Debug/SW_APPs/Main_APP.cyclo
new file mode 100644
index 0000000..ecc9252
--- /dev/null
+++ b/Debug/SW_APPs/Main_APP.cyclo
@@ -0,0 +1 @@
+../SW_APPs/Main_APP.c:23:6:main_app	3
diff --git a/Debug/SW_APPs/Main_APP.d b/Debug/SW_APPs/Main_APP.d
index bde06bd..1d1014a 100644
--- a/Debug/SW_APPs/Main_APP.d
+++ b/Debug/SW_APPs/Main_APP.d
@@ -1,5 +1,5 @@
 SW_APPs/Main_APP.o: ../SW_APPs/Main_APP.c ../SW_APPs/Main_APP.h \
- C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/LCD.h ../Core/Inc/main.h \
+ C:/Users/wuwen/m3s_stm32/HW_Devices/LCD.h ../Core/Inc/main.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
  ../Core/Inc/stm32f1xx_hal_conf.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
@@ -28,82 +28,45 @@ SW_APPs/Main_APP.o: ../SW_APPs/Main_APP.c ../SW_APPs/Main_APP.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
- ../SW_APPs/windows.h C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/lcd.h \
- C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/touch.h \
- C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/eeprom.h \
- C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/key.h \
- C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/buzzer.h
-
+ ../SW_APPs/windows.h C:/Users/wuwen/m3s_stm32/HW_Devices/lcd.h \
+ C:/Users/wuwen/m3s_stm32/HW_Devices/touch.h \
+ C:/Users/wuwen/m3s_stm32/HW_Devices/eeprom.h \
+ C:/Users/wuwen/m3s_stm32/HW_Devices/key.h \
+ C:/Users/wuwen/m3s_stm32/HW_Devices/buzzer.h
 ../SW_APPs/Main_APP.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/LCD.h:
-
+C:/Users/wuwen/m3s_stm32/HW_Devices/LCD.h:
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
-
 ../SW_APPs/windows.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/lcd.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/touch.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/eeprom.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/key.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/buzzer.h:
+C:/Users/wuwen/m3s_stm32/HW_Devices/lcd.h:
+C:/Users/wuwen/m3s_stm32/HW_Devices/touch.h:
+C:/Users/wuwen/m3s_stm32/HW_Devices/eeprom.h:
+C:/Users/wuwen/m3s_stm32/HW_Devices/key.h:
+C:/Users/wuwen/m3s_stm32/HW_Devices/buzzer.h:
diff --git a/Debug/SW_APPs/Main_APP.su b/Debug/SW_APPs/Main_APP.su
index f7680af..1ae0d71 100644
--- a/Debug/SW_APPs/Main_APP.su
+++ b/Debug/SW_APPs/Main_APP.su
@@ -1 +1 @@
-Main_APP.c:23:6:main_app	96	static
+../SW_APPs/Main_APP.c:23:6:main_app	96	static
diff --git a/Debug/SW_APPs/subdir.mk b/Debug/SW_APPs/subdir.mk
index aaf3b7c..d41648b 100644
--- a/Debug/SW_APPs/subdir.mk
+++ b/Debug/SW_APPs/subdir.mk
@@ -1,6 +1,6 @@
 ################################################################################
 # Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (9-2020-q2-update)
+# Toolchain: GNU Tools for STM32 (11.3.rel1)
 ################################################################################
 
 # Add inputs and outputs from these tool invocations to the build variables 
@@ -27,13 +27,13 @@ C_DEPS += \
 
 
 # Each subdirectory must supply rules for building sources it contributes
-SW_APPs/%.o: ../SW_APPs/%.c SW_APPs/subdir.mk
-	arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/Desktop/M3s_stm32/SW_APPs" -I"C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices" -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+SW_APPs/%.o SW_APPs/%.su SW_APPs/%.cyclo: ../SW_APPs/%.c SW_APPs/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F103xE -c -I../Core/Inc -I"C:/Users/wuwen/m3s_stm32/SW_APPs" -I"C:/Users/wuwen/m3s_stm32/HW_Devices" -I../Drivers/CMSIS/Device/ST/STM32F1xx/Include -I../Drivers/CMSIS/Include -I../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy -I../Drivers/STM32F1xx_HAL_Driver/Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
 
 clean: clean-SW_APPs
 
 clean-SW_APPs:
-	-$(RM) ./SW_APPs/APP_IDcard.d ./SW_APPs/APP_IDcard.o ./SW_APPs/APP_blood.d ./SW_APPs/APP_blood.o ./SW_APPs/APP_morsecode.d ./SW_APPs/APP_morsecode.o ./SW_APPs/Main_APP.d ./SW_APPs/Main_APP.o ./SW_APPs/windows.d ./SW_APPs/windows.o
+	-$(RM) ./SW_APPs/APP_IDcard.cyclo ./SW_APPs/APP_IDcard.d ./SW_APPs/APP_IDcard.o ./SW_APPs/APP_IDcard.su ./SW_APPs/APP_blood.cyclo ./SW_APPs/APP_blood.d ./SW_APPs/APP_blood.o ./SW_APPs/APP_blood.su ./SW_APPs/APP_morsecode.cyclo ./SW_APPs/APP_morsecode.d ./SW_APPs/APP_morsecode.o ./SW_APPs/APP_morsecode.su ./SW_APPs/Main_APP.cyclo ./SW_APPs/Main_APP.d ./SW_APPs/Main_APP.o ./SW_APPs/Main_APP.su ./SW_APPs/windows.cyclo ./SW_APPs/windows.d ./SW_APPs/windows.o ./SW_APPs/windows.su
 
 .PHONY: clean-SW_APPs
 
diff --git a/Debug/SW_APPs/windows.cyclo b/Debug/SW_APPs/windows.cyclo
new file mode 100644
index 0000000..edf9ca7
--- /dev/null
+++ b/Debug/SW_APPs/windows.cyclo
@@ -0,0 +1,11 @@
+../SW_APPs/windows.c:13:6:Inteface_SetCursor	1
+../SW_APPs/windows.c:19:6:Inteface_SetColor	1
+../SW_APPs/windows.c:25:5:UI_Init	2
+../SW_APPs/windows.c:67:9:New_Window	4
+../SW_APPs/windows.c:114:6:Close_Windows_Stack	5
+../SW_APPs/windows.c:154:6:Set_Windows_Title	2
+../SW_APPs/windows.c:162:6:Set_Windows_XY_BY_ACC	1
+../SW_APPs/windows.c:169:6:Refresh_Window	12
+../SW_APPs/windows.c:241:6:Refresh_UI	5
+../SW_APPs/windows.c:317:9:Chack	13
+../SW_APPs/windows.c:337:6:UI_Server	17
diff --git a/Debug/SW_APPs/windows.d b/Debug/SW_APPs/windows.d
index 1ed56ec..0222f4b 100644
--- a/Debug/SW_APPs/windows.d
+++ b/Debug/SW_APPs/windows.d
@@ -27,69 +27,37 @@ SW_APPs/windows.o: ../SW_APPs/windows.c ../SW_APPs/windows.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
  ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
- C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/lcd.h \
- C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/touch.h
-
+ C:/Users/wuwen/m3s_stm32/HW_Devices/lcd.h \
+ C:/Users/wuwen/m3s_stm32/HW_Devices/touch.h
 ../SW_APPs/windows.h:
-
 ../Core/Inc/main.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
-
 ../Core/Inc/stm32f1xx_hal_conf.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
-
 ../Drivers/CMSIS/Include/core_cm3.h:
-
 ../Drivers/CMSIS/Include/cmsis_version.h:
-
 ../Drivers/CMSIS/Include/cmsis_compiler.h:
-
 ../Drivers/CMSIS/Include/cmsis_gcc.h:
-
 ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
-
 ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/lcd.h:
-
-C:/Users/wuwen/Desktop/M3s_stm32/HW_Devices/touch.h:
+C:/Users/wuwen/m3s_stm32/HW_Devices/lcd.h:
+C:/Users/wuwen/m3s_stm32/HW_Devices/touch.h:
diff --git a/Debug/SW_APPs/windows.su b/Debug/SW_APPs/windows.su
index db314cc..3bee5ba 100644
--- a/Debug/SW_APPs/windows.su
+++ b/Debug/SW_APPs/windows.su
@@ -1,11 +1,11 @@
-windows.c:13:6:Inteface_SetCursor	16	static
-windows.c:19:6:Inteface_SetColor	16	static
-windows.c:25:5:UI_Init	24	static
-windows.c:67:9:New_Window	40	static
-windows.c:114:6:Close_Windows_Stack	16	static
-windows.c:154:6:Set_Windows_Title	24	static
-windows.c:162:6:Set_Windows_XY_BY_ACC	24	static
-windows.c:169:6:Refresh_Window	40	static
-windows.c:241:6:Refresh_UI	32	static
-windows.c:317:9:Chack	32	static
-windows.c:337:6:UI_Server	40	static
+../SW_APPs/windows.c:13:6:Inteface_SetCursor	16	static
+../SW_APPs/windows.c:19:6:Inteface_SetColor	16	static
+../SW_APPs/windows.c:25:5:UI_Init	24	static
+../SW_APPs/windows.c:67:9:New_Window	40	static
+../SW_APPs/windows.c:114:6:Close_Windows_Stack	16	static
+../SW_APPs/windows.c:154:6:Set_Windows_Title	24	static
+../SW_APPs/windows.c:162:6:Set_Windows_XY_BY_ACC	24	static
+../SW_APPs/windows.c:169:6:Refresh_Window	40	static
+../SW_APPs/windows.c:241:6:Refresh_UI	32	static
+../SW_APPs/windows.c:317:9:Chack	32	static
+../SW_APPs/windows.c:337:6:UI_Server	40	static
diff --git a/Debug/m3s.bin b/Debug/m3s.bin
deleted file mode 100755
index 0baf6fab4479427e587a3d499e61eb0f2b7fe629..0000000000000000000000000000000000000000
GIT binary patch
literal 0
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diff --git a/Debug/m3s.list b/Debug/m3s.list
index d626f0a..8934992 100644
--- a/Debug/m3s.list
+++ b/Debug/m3s.list
@@ -5,45 +5,47 @@ Sections:
 Idx Name          Size      VMA       LMA       File off  Algn
   0 .isr_vector   000001e4  08000000  08000000  00010000  2**0
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  1 .text         0000a478  080001e8  080001e8  000101e8  2**3
+  1 .text         0000a464  080001e8  080001e8  000101e8  2**3
                   CONTENTS, ALLOC, LOAD, READONLY, CODE
-  2 .rodata       00000fd4  0800a660  0800a660  0001a660  2**3
+  2 .rodata       00000f64  0800a650  0800a650  0001a650  2**3
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  3 .ARM.extab    00000000  0800b634  0800b634  000201dc  2**0
+  3 .ARM.extab    00000000  0800b5b4  0800b5b4  000201d4  2**0
                   CONTENTS
-  4 .ARM          00000000  0800b634  0800b634  000201dc  2**0
+  4 .ARM          00000000  0800b5b4  0800b5b4  000201d4  2**0
                   CONTENTS
-  5 .preinit_array 00000000  0800b634  0800b634  000201dc  2**0
+  5 .preinit_array 00000000  0800b5b4  0800b5b4  000201d4  2**0
                   CONTENTS, ALLOC, LOAD, DATA
-  6 .init_array   00000004  0800b634  0800b634  0001b634  2**2
+  6 .init_array   00000004  0800b5b4  0800b5b4  0001b5b4  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  7 .fini_array   00000004  0800b638  0800b638  0001b638  2**2
+  7 .fini_array   00000004  0800b5b8  0800b5b8  0001b5b8  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  8 .data         000001dc  20000000  0800b63c  00020000  2**2
+  8 .data         000001d4  20000000  0800b5bc  00020000  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  9 .bss          00002448  200001dc  0800b818  000201dc  2**2
+  9 .bss          00002530  200001d4  0800b790  000201d4  2**2
                   ALLOC
- 10 ._user_heap_stack 00000c04  20002624  0800b818  00022624  2**0
+ 10 ._user_heap_stack 00000c04  20002704  0800b790  00022704  2**0
                   ALLOC
- 11 .ARM.attributes 00000029  00000000  00000000  000201dc  2**0
+ 11 .ARM.attributes 00000029  00000000  00000000  000201d4  2**0
                   CONTENTS, READONLY
- 12 .debug_info   0001c85a  00000000  00000000  00020205  2**0
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 13 .debug_abbrev 00003fcd  00000000  00000000  0003ca5f  2**0
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_aranges 00001370  00000000  00000000  00040a30  2**3
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_ranges 00001238  00000000  00000000  00041da0  2**3
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .debug_macro  0001e3e8  00000000  00000000  00042fd8  2**0
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 17 .debug_line   00019702  00000000  00000000  000613c0  2**0
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_str    000a0b5b  00000000  00000000  0007aac2  2**0
-                  CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .comment      00000053  00000000  00000000  0011b61d  2**0
+ 12 .comment      00000043  00000000  00000000  000201fd  2**0
                   CONTENTS, READONLY
- 20 .debug_frame  000062e4  00000000  00000000  0011b670  2**2
+ 13 .debug_info   00012ee9  00000000  00000000  00020240  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 14 .debug_abbrev 00003828  00000000  00000000  00033129  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 15 .debug_aranges 00001370  00000000  00000000  00036958  2**3
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 16 .debug_rnglists 00000f35  00000000  00000000  00037cc8  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 17 .debug_macro  0001da39  00000000  00000000  00038bfd  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 18 .debug_line   00019dbb  00000000  00000000  00056636  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 19 .debug_str    000a0bf7  00000000  00000000  000703f1  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 20 .debug_frame  000062ac  00000000  00000000  00110fe8  2**2
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 21 .debug_line_str 00000047  00000000  00000000  00117294  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
 
 Disassembly of section .text:
@@ -60,9 +62,9 @@ Disassembly of section .text:
  80001fa:	2301      	movs	r3, #1
  80001fc:	7023      	strb	r3, [r4, #0]
  80001fe:	bd10      	pop	{r4, pc}
- 8000200:	200001dc 	.word	0x200001dc
+ 8000200:	200001d4 	.word	0x200001d4
  8000204:	00000000 	.word	0x00000000
- 8000208:	0800a648 	.word	0x0800a648
+ 8000208:	0800a634 	.word	0x0800a634
 
 0800020c <frame_dummy>:
  800020c:	b508      	push	{r3, lr}
@@ -73,8 +75,8 @@ Disassembly of section .text:
  8000216:	f3af 8000 	nop.w
  800021a:	bd08      	pop	{r3, pc}
  800021c:	00000000 	.word	0x00000000
- 8000220:	200001e0 	.word	0x200001e0
- 8000224:	0800a648 	.word	0x0800a648
+ 8000220:	200001d8 	.word	0x200001d8
+ 8000224:	0800a634 	.word	0x0800a634
 
 08000228 <strlen>:
  8000228:	4603      	mov	r3, r0
@@ -1525,7 +1527,7 @@ int main(void)
  80011f0:	f000 f8ac 	bl	800134c <MX_TIM4_Init>
   /* USER CODE BEGIN 2 */
   main_app();
- 80011f4:	f005 ffe6 	bl	80071c4 <main_app>
+ 80011f4:	f005 ffea 	bl	80071cc <main_app>
   /* USER CODE END 2 */
 
   /* Infinite loop */
@@ -1548,7 +1550,7 @@ void SystemClock_Config(void)
  8001204:	2228      	movs	r2, #40	; 0x28
  8001206:	2100      	movs	r1, #0
  8001208:	4618      	mov	r0, r3
- 800120a:	f006 fb83 	bl	8007914 <memset>
+ 800120a:	f007 fa71 	bl	80086f0 <memset>
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  800120e:	1d3b      	adds	r3, r7, #4
  8001210:	2200      	movs	r2, #0
@@ -1593,6 +1595,7 @@ void SystemClock_Config(void)
     Error_Handler();
  800124e:	f000 fa8b 	bl	8001768 <Error_Handler>
   }
+
   /** Initializes the CPU, AHB and APB buses clocks
   */
   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
@@ -1616,7 +1619,7 @@ void SystemClock_Config(void)
  8001268:	1d3b      	adds	r3, r7, #4
  800126a:	2102      	movs	r1, #2
  800126c:	4618      	mov	r0, r3
- 800126e:	f002 faf5 	bl	800385c <HAL_RCC_ClockConfig>
+ 800126e:	f002 faf7 	bl	8003860 <HAL_RCC_ClockConfig>
  8001272:	4603      	mov	r3, r0
  8001274:	2b00      	cmp	r3, #0
  8001276:	d001      	beq.n	800127c <SystemClock_Config+0x82>
@@ -1697,7 +1700,7 @@ static void MX_I2C2_Init(void)
 }
  80012d0:	bf00      	nop
  80012d2:	bd80      	pop	{r7, pc}
- 80012d4:	20000274 	.word	0x20000274
+ 80012d4:	200001f0 	.word	0x200001f0
  80012d8:	40005800 	.word	0x40005800
  80012dc:	000186a0 	.word	0x000186a0
 
@@ -1780,7 +1783,7 @@ static void MX_SPI1_Init(void)
 }
  8001340:	bf00      	nop
  8001342:	bd80      	pop	{r7, pc}
- 8001344:	20000358 	.word	0x20000358
+ 8001344:	20000244 	.word	0x20000244
  8001348:	40013000 	.word	0x40013000
 
 0800134c <MX_TIM4_Init>:
@@ -1938,7 +1941,7 @@ static void MX_TIM4_Init(void)
  800142a:	3738      	adds	r7, #56	; 0x38
  800142c:	46bd      	mov	sp, r7
  800142e:	bd80      	pop	{r7, pc}
- 8001430:	2000022c 	.word	0x2000022c
+ 8001430:	2000029c 	.word	0x2000029c
  8001434:	40000800 	.word	0x40000800
 
 08001438 <MX_TIM6_Init>:
@@ -2023,7 +2026,7 @@ static void MX_TIM6_Init(void)
  8001496:	46bd      	mov	sp, r7
  8001498:	bd80      	pop	{r7, pc}
  800149a:	bf00      	nop
- 800149c:	20000310 	.word	0x20000310
+ 800149c:	200002e4 	.word	0x200002e4
  80014a0:	40001000 	.word	0x40001000
 
 080014a4 <MX_GPIO_Init>:
@@ -2043,6 +2046,8 @@ static void MX_GPIO_Init(void)
  80014b2:	605a      	str	r2, [r3, #4]
  80014b4:	609a      	str	r2, [r3, #8]
  80014b6:	60da      	str	r2, [r3, #12]
+/* USER CODE BEGIN MX_GPIO_Init_1 */
+/* USER CODE END MX_GPIO_Init_1 */
 
   /* GPIO Ports Clock Enable */
   __HAL_RCC_GPIOE_CLK_ENABLE();
@@ -2315,6 +2320,8 @@ static void MX_GPIO_Init(void)
  800167c:	4806      	ldr	r0, [pc, #24]	; (8001698 <MX_GPIO_Init+0x1f4>)
  800167e:	f000 fca9 	bl	8001fd4 <HAL_GPIO_Init>
 
+/* USER CODE BEGIN MX_GPIO_Init_2 */
+/* USER CODE END MX_GPIO_Init_2 */
 }
  8001682:	bf00      	nop
  8001684:	3728      	adds	r7, #40	; 0x28
@@ -2472,7 +2479,7 @@ static void MX_FSMC_Init(void)
  8001756:	3720      	adds	r7, #32
  8001758:	46bd      	mov	sp, r7
  800175a:	bd80      	pop	{r7, pc}
- 800175c:	200002c8 	.word	0x200002c8
+ 800175c:	2000032c 	.word	0x2000032c
  8001760:	a0000104 	.word	0xa0000104
  8001764:	40010000 	.word	0x40010000
 
@@ -3016,7 +3023,7 @@ static void HAL_FSMC_MspInit(void){
  8001a66:	46bd      	mov	sp, r7
  8001a68:	bd80      	pop	{r7, pc}
  8001a6a:	bf00      	nop
- 8001a6c:	200001f8 	.word	0x200001f8
+ 8001a6c:	20000374 	.word	0x20000374
  8001a70:	40021000 	.word	0x40021000
  8001a74:	40012000 	.word	0x40012000
  8001a78:	40011800 	.word	0x40011800
@@ -3223,7 +3230,7 @@ void TIM4_IRQHandler(void)
  8001aee:	bf00      	nop
  8001af0:	bd80      	pop	{r7, pc}
  8001af2:	bf00      	nop
- 8001af4:	2000022c 	.word	0x2000022c
+ 8001af4:	2000029c 	.word	0x2000029c
 
 08001af8 <TIM6_IRQHandler>:
 
@@ -3247,7 +3254,7 @@ void TIM6_IRQHandler(void)
  8001b02:	bf00      	nop
  8001b04:	bd80      	pop	{r7, pc}
  8001b06:	bf00      	nop
- 8001b08:	20000310 	.word	0x20000310
+ 8001b08:	200002e4 	.word	0x200002e4
 
 08001b0c <_getpid>:
 void initialise_monitor_handles()
@@ -3276,7 +3283,7 @@ int _kill(int pid, int sig)
  8001b20:	6078      	str	r0, [r7, #4]
  8001b22:	6039      	str	r1, [r7, #0]
 	errno = EINVAL;
- 8001b24:	f005 febc 	bl	80078a0 <__errno>
+ 8001b24:	f006 fe46 	bl	80087b4 <__errno>
  8001b28:	4603      	mov	r3, r0
  8001b2a:	2216      	movs	r2, #22
  8001b2c:	601a      	str	r2, [r3, #0]
@@ -3474,7 +3481,7 @@ void *_sbrk(ptrdiff_t incr)
  8001c16:	d207      	bcs.n	8001c28 <_sbrk+0x40>
   {
     errno = ENOMEM;
- 8001c18:	f005 fe42 	bl	80078a0 <__errno>
+ 8001c18:	f006 fdcc 	bl	80087b4 <__errno>
  8001c1c:	4603      	mov	r3, r0
  8001c1e:	220c      	movs	r2, #12
  8001c20:	601a      	str	r2, [r3, #0]
@@ -3504,8 +3511,8 @@ void *_sbrk(ptrdiff_t incr)
  8001c42:	bd80      	pop	{r7, pc}
  8001c44:	20010000 	.word	0x20010000
  8001c48:	00000800 	.word	0x00000800
- 8001c4c:	200001fc 	.word	0x200001fc
- 8001c50:	20002628 	.word	0x20002628
+ 8001c4c:	20000378 	.word	0x20000378
+ 8001c50:	20002708 	.word	0x20002708
 
 08001c54 <SystemInit>:
   * @note   This function should be used only after reset.
@@ -3595,7 +3602,7 @@ LoopFillZerobss:
  8001c86:	f7ff ffe5 	bl	8001c54 <SystemInit>
 /* Call static constructors */
     bl __libc_init_array
- 8001c8a:	f005 fe0f 	bl	80078ac <__libc_init_array>
+ 8001c8a:	f006 fd99 	bl	80087c0 <__libc_init_array>
 /* Call the application's entry point.*/
   bl main
  8001c8e:	f7ff fa9f 	bl	80011d0 <main>
@@ -3604,13 +3611,13 @@ LoopFillZerobss:
   ldr r0, =_sdata
  8001c94:	20000000 	.word	0x20000000
   ldr r1, =_edata
- 8001c98:	200001dc 	.word	0x200001dc
+ 8001c98:	200001d4 	.word	0x200001d4
   ldr r2, =_sidata
- 8001c9c:	0800b63c 	.word	0x0800b63c
+ 8001c9c:	0800b5bc 	.word	0x0800b5bc
   ldr r2, =_sbss
- 8001ca0:	200001dc 	.word	0x200001dc
+ 8001ca0:	200001d4 	.word	0x200001d4
   ldr r4, =_ebss
- 8001ca4:	20002624 	.word	0x20002624
+ 8001ca4:	20002704 	.word	0x20002704
 
 08001ca8 <ADC1_2_IRQHandler>:
  * @retval : None
@@ -3758,7 +3765,7 @@ __weak void HAL_IncTick(void)
  8001d50:	bc80      	pop	{r7}
  8001d52:	4770      	bx	lr
  8001d54:	20000008 	.word	0x20000008
- 8001d58:	200003b0 	.word	0x200003b0
+ 8001d58:	2000037c 	.word	0x2000037c
 
 08001d5c <HAL_GetTick>:
   * @note  This function is declared as __weak to be overwritten in case of other
@@ -3777,7 +3784,7 @@ __weak uint32_t HAL_GetTick(void)
  8001d66:	46bd      	mov	sp, r7
  8001d68:	bc80      	pop	{r7}
  8001d6a:	4770      	bx	lr
- 8001d6c:	200003b0 	.word	0x200003b0
+ 8001d6c:	2000037c 	.word	0x2000037c
 
 08001d70 <HAL_Delay>:
   *       implementations in user file.
@@ -4229,34 +4236,34 @@ void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
       switch (GPIO_Init->Mode)
  8002006:	683b      	ldr	r3, [r7, #0]
  8002008:	685b      	ldr	r3, [r3, #4]
- 800200a:	4aa0      	ldr	r2, [pc, #640]	; (800228c <HAL_GPIO_Init+0x2b8>)
+ 800200a:	4a96      	ldr	r2, [pc, #600]	; (8002264 <HAL_GPIO_Init+0x290>)
  800200c:	4293      	cmp	r3, r2
  800200e:	d05e      	beq.n	80020ce <HAL_GPIO_Init+0xfa>
- 8002010:	4a9e      	ldr	r2, [pc, #632]	; (800228c <HAL_GPIO_Init+0x2b8>)
+ 8002010:	4a94      	ldr	r2, [pc, #592]	; (8002264 <HAL_GPIO_Init+0x290>)
  8002012:	4293      	cmp	r3, r2
  8002014:	d875      	bhi.n	8002102 <HAL_GPIO_Init+0x12e>
- 8002016:	4a9e      	ldr	r2, [pc, #632]	; (8002290 <HAL_GPIO_Init+0x2bc>)
+ 8002016:	4a94      	ldr	r2, [pc, #592]	; (8002268 <HAL_GPIO_Init+0x294>)
  8002018:	4293      	cmp	r3, r2
  800201a:	d058      	beq.n	80020ce <HAL_GPIO_Init+0xfa>
- 800201c:	4a9c      	ldr	r2, [pc, #624]	; (8002290 <HAL_GPIO_Init+0x2bc>)
+ 800201c:	4a92      	ldr	r2, [pc, #584]	; (8002268 <HAL_GPIO_Init+0x294>)
  800201e:	4293      	cmp	r3, r2
  8002020:	d86f      	bhi.n	8002102 <HAL_GPIO_Init+0x12e>
- 8002022:	4a9c      	ldr	r2, [pc, #624]	; (8002294 <HAL_GPIO_Init+0x2c0>)
+ 8002022:	4a92      	ldr	r2, [pc, #584]	; (800226c <HAL_GPIO_Init+0x298>)
  8002024:	4293      	cmp	r3, r2
  8002026:	d052      	beq.n	80020ce <HAL_GPIO_Init+0xfa>
- 8002028:	4a9a      	ldr	r2, [pc, #616]	; (8002294 <HAL_GPIO_Init+0x2c0>)
+ 8002028:	4a90      	ldr	r2, [pc, #576]	; (800226c <HAL_GPIO_Init+0x298>)
  800202a:	4293      	cmp	r3, r2
  800202c:	d869      	bhi.n	8002102 <HAL_GPIO_Init+0x12e>
- 800202e:	4a9a      	ldr	r2, [pc, #616]	; (8002298 <HAL_GPIO_Init+0x2c4>)
+ 800202e:	4a90      	ldr	r2, [pc, #576]	; (8002270 <HAL_GPIO_Init+0x29c>)
  8002030:	4293      	cmp	r3, r2
  8002032:	d04c      	beq.n	80020ce <HAL_GPIO_Init+0xfa>
- 8002034:	4a98      	ldr	r2, [pc, #608]	; (8002298 <HAL_GPIO_Init+0x2c4>)
+ 8002034:	4a8e      	ldr	r2, [pc, #568]	; (8002270 <HAL_GPIO_Init+0x29c>)
  8002036:	4293      	cmp	r3, r2
  8002038:	d863      	bhi.n	8002102 <HAL_GPIO_Init+0x12e>
- 800203a:	4a98      	ldr	r2, [pc, #608]	; (800229c <HAL_GPIO_Init+0x2c8>)
+ 800203a:	4a8e      	ldr	r2, [pc, #568]	; (8002274 <HAL_GPIO_Init+0x2a0>)
  800203c:	4293      	cmp	r3, r2
  800203e:	d046      	beq.n	80020ce <HAL_GPIO_Init+0xfa>
- 8002040:	4a96      	ldr	r2, [pc, #600]	; (800229c <HAL_GPIO_Init+0x2c8>)
+ 8002040:	4a8c      	ldr	r2, [pc, #560]	; (8002274 <HAL_GPIO_Init+0x2a0>)
  8002042:	4293      	cmp	r3, r2
  8002044:	d85d      	bhi.n	8002102 <HAL_GPIO_Init+0x12e>
  8002046:	2b12      	cmp	r3, #18
@@ -4284,7 +4291,7 @@ void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
  8002094:	08002103 	.word	0x08002103
  8002098:	080020b1 	.word	0x080020b1
  800209c:	080020c5 	.word	0x080020c5
- 80020a0:	4a7f      	ldr	r2, [pc, #508]	; (80022a0 <HAL_GPIO_Init+0x2cc>)
+ 80020a0:	4a75      	ldr	r2, [pc, #468]	; (8002278 <HAL_GPIO_Init+0x2a4>)
  80020a2:	4293      	cmp	r3, r2
  80020a4:	d013      	beq.n	80020ce <HAL_GPIO_Init+0xfa>
           config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
@@ -4413,18 +4420,18 @@ void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
       {
         /* Enable AFIO Clock */
         __HAL_RCC_AFIO_CLK_ENABLE();
- 8002154:	4b53      	ldr	r3, [pc, #332]	; (80022a4 <HAL_GPIO_Init+0x2d0>)
+ 8002154:	4b49      	ldr	r3, [pc, #292]	; (800227c <HAL_GPIO_Init+0x2a8>)
  8002156:	699b      	ldr	r3, [r3, #24]
- 8002158:	4a52      	ldr	r2, [pc, #328]	; (80022a4 <HAL_GPIO_Init+0x2d0>)
+ 8002158:	4a48      	ldr	r2, [pc, #288]	; (800227c <HAL_GPIO_Init+0x2a8>)
  800215a:	f043 0301 	orr.w	r3, r3, #1
  800215e:	6193      	str	r3, [r2, #24]
- 8002160:	4b50      	ldr	r3, [pc, #320]	; (80022a4 <HAL_GPIO_Init+0x2d0>)
+ 8002160:	4b46      	ldr	r3, [pc, #280]	; (800227c <HAL_GPIO_Init+0x2a8>)
  8002162:	699b      	ldr	r3, [r3, #24]
  8002164:	f003 0301 	and.w	r3, r3, #1
  8002168:	60bb      	str	r3, [r7, #8]
  800216a:	68bb      	ldr	r3, [r7, #8]
         temp = AFIO->EXTICR[position >> 2u];
- 800216c:	4a4e      	ldr	r2, [pc, #312]	; (80022a8 <HAL_GPIO_Init+0x2d4>)
+ 800216c:	4a44      	ldr	r2, [pc, #272]	; (8002280 <HAL_GPIO_Init+0x2ac>)
  800216e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
  8002170:	089b      	lsrs	r3, r3, #2
  8002172:	3302      	adds	r3, #2
@@ -4442,27 +4449,27 @@ void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
  800218e:	60fb      	str	r3, [r7, #12]
         SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
  8002190:	687b      	ldr	r3, [r7, #4]
- 8002192:	4a46      	ldr	r2, [pc, #280]	; (80022ac <HAL_GPIO_Init+0x2d8>)
+ 8002192:	4a3c      	ldr	r2, [pc, #240]	; (8002284 <HAL_GPIO_Init+0x2b0>)
  8002194:	4293      	cmp	r3, r2
  8002196:	d01f      	beq.n	80021d8 <HAL_GPIO_Init+0x204>
  8002198:	687b      	ldr	r3, [r7, #4]
- 800219a:	4a45      	ldr	r2, [pc, #276]	; (80022b0 <HAL_GPIO_Init+0x2dc>)
+ 800219a:	4a3b      	ldr	r2, [pc, #236]	; (8002288 <HAL_GPIO_Init+0x2b4>)
  800219c:	4293      	cmp	r3, r2
  800219e:	d019      	beq.n	80021d4 <HAL_GPIO_Init+0x200>
  80021a0:	687b      	ldr	r3, [r7, #4]
- 80021a2:	4a44      	ldr	r2, [pc, #272]	; (80022b4 <HAL_GPIO_Init+0x2e0>)
+ 80021a2:	4a3a      	ldr	r2, [pc, #232]	; (800228c <HAL_GPIO_Init+0x2b8>)
  80021a4:	4293      	cmp	r3, r2
  80021a6:	d013      	beq.n	80021d0 <HAL_GPIO_Init+0x1fc>
  80021a8:	687b      	ldr	r3, [r7, #4]
- 80021aa:	4a43      	ldr	r2, [pc, #268]	; (80022b8 <HAL_GPIO_Init+0x2e4>)
+ 80021aa:	4a39      	ldr	r2, [pc, #228]	; (8002290 <HAL_GPIO_Init+0x2bc>)
  80021ac:	4293      	cmp	r3, r2
  80021ae:	d00d      	beq.n	80021cc <HAL_GPIO_Init+0x1f8>
  80021b0:	687b      	ldr	r3, [r7, #4]
- 80021b2:	4a42      	ldr	r2, [pc, #264]	; (80022bc <HAL_GPIO_Init+0x2e8>)
+ 80021b2:	4a38      	ldr	r2, [pc, #224]	; (8002294 <HAL_GPIO_Init+0x2c0>)
  80021b4:	4293      	cmp	r3, r2
  80021b6:	d007      	beq.n	80021c8 <HAL_GPIO_Init+0x1f4>
  80021b8:	687b      	ldr	r3, [r7, #4]
- 80021ba:	4a41      	ldr	r2, [pc, #260]	; (80022c0 <HAL_GPIO_Init+0x2ec>)
+ 80021ba:	4a37      	ldr	r2, [pc, #220]	; (8002298 <HAL_GPIO_Init+0x2c4>)
  80021bc:	4293      	cmp	r3, r2
  80021be:	d101      	bne.n	80021c4 <HAL_GPIO_Init+0x1f0>
  80021c0:	2305      	movs	r3, #5
@@ -4486,7 +4493,7 @@ void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
  80021e6:	4313      	orrs	r3, r2
  80021e8:	60fb      	str	r3, [r7, #12]
         AFIO->EXTICR[position >> 2u] = temp;
- 80021ea:	492f      	ldr	r1, [pc, #188]	; (80022a8 <HAL_GPIO_Init+0x2d4>)
+ 80021ea:	4925      	ldr	r1, [pc, #148]	; (8002280 <HAL_GPIO_Init+0x2ac>)
  80021ec:	6a7b      	ldr	r3, [r7, #36]	; 0x24
  80021ee:	089b      	lsrs	r3, r3, #2
  80021f0:	3302      	adds	r3, #2
@@ -4503,9 +4510,9 @@ void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
  8002202:	d006      	beq.n	8002212 <HAL_GPIO_Init+0x23e>
         {
           SET_BIT(EXTI->IMR, iocurrent);
- 8002204:	4b2f      	ldr	r3, [pc, #188]	; (80022c4 <HAL_GPIO_Init+0x2f0>)
+ 8002204:	4b25      	ldr	r3, [pc, #148]	; (800229c <HAL_GPIO_Init+0x2c8>)
  8002206:	681a      	ldr	r2, [r3, #0]
- 8002208:	492e      	ldr	r1, [pc, #184]	; (80022c4 <HAL_GPIO_Init+0x2f0>)
+ 8002208:	4924      	ldr	r1, [pc, #144]	; (800229c <HAL_GPIO_Init+0x2c8>)
  800220a:	69bb      	ldr	r3, [r7, #24]
  800220c:	4313      	orrs	r3, r2
  800220e:	600b      	str	r3, [r1, #0]
@@ -4514,11 +4521,11 @@ void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
         else
         {
           CLEAR_BIT(EXTI->IMR, iocurrent);
- 8002212:	4b2c      	ldr	r3, [pc, #176]	; (80022c4 <HAL_GPIO_Init+0x2f0>)
+ 8002212:	4b22      	ldr	r3, [pc, #136]	; (800229c <HAL_GPIO_Init+0x2c8>)
  8002214:	681a      	ldr	r2, [r3, #0]
  8002216:	69bb      	ldr	r3, [r7, #24]
  8002218:	43db      	mvns	r3, r3
- 800221a:	492a      	ldr	r1, [pc, #168]	; (80022c4 <HAL_GPIO_Init+0x2f0>)
+ 800221a:	4920      	ldr	r1, [pc, #128]	; (800229c <HAL_GPIO_Init+0x2c8>)
  800221c:	4013      	ands	r3, r2
  800221e:	600b      	str	r3, [r1, #0]
         }
@@ -4532,9 +4539,9 @@ void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
  800222a:	d006      	beq.n	800223a <HAL_GPIO_Init+0x266>
         {
           SET_BIT(EXTI->EMR, iocurrent);
- 800222c:	4b25      	ldr	r3, [pc, #148]	; (80022c4 <HAL_GPIO_Init+0x2f0>)
+ 800222c:	4b1b      	ldr	r3, [pc, #108]	; (800229c <HAL_GPIO_Init+0x2c8>)
  800222e:	685a      	ldr	r2, [r3, #4]
- 8002230:	4924      	ldr	r1, [pc, #144]	; (80022c4 <HAL_GPIO_Init+0x2f0>)
+ 8002230:	491a      	ldr	r1, [pc, #104]	; (800229c <HAL_GPIO_Init+0x2c8>)
  8002232:	69bb      	ldr	r3, [r7, #24]
  8002234:	4313      	orrs	r3, r2
  8002236:	604b      	str	r3, [r1, #4]
@@ -4543,11 +4550,11 @@ void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
         else
         {
           CLEAR_BIT(EXTI->EMR, iocurrent);
- 800223a:	4b22      	ldr	r3, [pc, #136]	; (80022c4 <HAL_GPIO_Init+0x2f0>)
+ 800223a:	4b18      	ldr	r3, [pc, #96]	; (800229c <HAL_GPIO_Init+0x2c8>)
  800223c:	685a      	ldr	r2, [r3, #4]
  800223e:	69bb      	ldr	r3, [r7, #24]
  8002240:	43db      	mvns	r3, r3
- 8002242:	4920      	ldr	r1, [pc, #128]	; (80022c4 <HAL_GPIO_Init+0x2f0>)
+ 8002242:	4916      	ldr	r1, [pc, #88]	; (800229c <HAL_GPIO_Init+0x2c8>)
  8002244:	4013      	ands	r3, r2
  8002246:	604b      	str	r3, [r1, #4]
         }
@@ -4558,61 +4565,61 @@ void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
  800224a:	685b      	ldr	r3, [r3, #4]
  800224c:	f403 1380 	and.w	r3, r3, #1048576	; 0x100000
  8002250:	2b00      	cmp	r3, #0
- 8002252:	d006      	beq.n	8002262 <HAL_GPIO_Init+0x28e>
+ 8002252:	d025      	beq.n	80022a0 <HAL_GPIO_Init+0x2cc>
         {
           SET_BIT(EXTI->RTSR, iocurrent);
- 8002254:	4b1b      	ldr	r3, [pc, #108]	; (80022c4 <HAL_GPIO_Init+0x2f0>)
+ 8002254:	4b11      	ldr	r3, [pc, #68]	; (800229c <HAL_GPIO_Init+0x2c8>)
  8002256:	689a      	ldr	r2, [r3, #8]
- 8002258:	491a      	ldr	r1, [pc, #104]	; (80022c4 <HAL_GPIO_Init+0x2f0>)
+ 8002258:	4910      	ldr	r1, [pc, #64]	; (800229c <HAL_GPIO_Init+0x2c8>)
  800225a:	69bb      	ldr	r3, [r7, #24]
  800225c:	4313      	orrs	r3, r2
  800225e:	608b      	str	r3, [r1, #8]
- 8002260:	e006      	b.n	8002270 <HAL_GPIO_Init+0x29c>
+ 8002260:	e025      	b.n	80022ae <HAL_GPIO_Init+0x2da>
+ 8002262:	bf00      	nop
+ 8002264:	10320000 	.word	0x10320000
+ 8002268:	10310000 	.word	0x10310000
+ 800226c:	10220000 	.word	0x10220000
+ 8002270:	10210000 	.word	0x10210000
+ 8002274:	10120000 	.word	0x10120000
+ 8002278:	10110000 	.word	0x10110000
+ 800227c:	40021000 	.word	0x40021000
+ 8002280:	40010000 	.word	0x40010000
+ 8002284:	40010800 	.word	0x40010800
+ 8002288:	40010c00 	.word	0x40010c00
+ 800228c:	40011000 	.word	0x40011000
+ 8002290:	40011400 	.word	0x40011400
+ 8002294:	40011800 	.word	0x40011800
+ 8002298:	40011c00 	.word	0x40011c00
+ 800229c:	40010400 	.word	0x40010400
         }
         else
         {
           CLEAR_BIT(EXTI->RTSR, iocurrent);
- 8002262:	4b18      	ldr	r3, [pc, #96]	; (80022c4 <HAL_GPIO_Init+0x2f0>)
- 8002264:	689a      	ldr	r2, [r3, #8]
- 8002266:	69bb      	ldr	r3, [r7, #24]
- 8002268:	43db      	mvns	r3, r3
- 800226a:	4916      	ldr	r1, [pc, #88]	; (80022c4 <HAL_GPIO_Init+0x2f0>)
- 800226c:	4013      	ands	r3, r2
- 800226e:	608b      	str	r3, [r1, #8]
+ 80022a0:	4b15      	ldr	r3, [pc, #84]	; (80022f8 <HAL_GPIO_Init+0x324>)
+ 80022a2:	689a      	ldr	r2, [r3, #8]
+ 80022a4:	69bb      	ldr	r3, [r7, #24]
+ 80022a6:	43db      	mvns	r3, r3
+ 80022a8:	4913      	ldr	r1, [pc, #76]	; (80022f8 <HAL_GPIO_Init+0x324>)
+ 80022aa:	4013      	ands	r3, r2
+ 80022ac:	608b      	str	r3, [r1, #8]
         }
 
         /* Enable or disable the falling trigger */
         if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
- 8002270:	683b      	ldr	r3, [r7, #0]
- 8002272:	685b      	ldr	r3, [r3, #4]
- 8002274:	f403 1300 	and.w	r3, r3, #2097152	; 0x200000
- 8002278:	2b00      	cmp	r3, #0
- 800227a:	d025      	beq.n	80022c8 <HAL_GPIO_Init+0x2f4>
+ 80022ae:	683b      	ldr	r3, [r7, #0]
+ 80022b0:	685b      	ldr	r3, [r3, #4]
+ 80022b2:	f403 1300 	and.w	r3, r3, #2097152	; 0x200000
+ 80022b6:	2b00      	cmp	r3, #0
+ 80022b8:	d006      	beq.n	80022c8 <HAL_GPIO_Init+0x2f4>
         {
           SET_BIT(EXTI->FTSR, iocurrent);
- 800227c:	4b11      	ldr	r3, [pc, #68]	; (80022c4 <HAL_GPIO_Init+0x2f0>)
- 800227e:	68da      	ldr	r2, [r3, #12]
- 8002280:	4910      	ldr	r1, [pc, #64]	; (80022c4 <HAL_GPIO_Init+0x2f0>)
- 8002282:	69bb      	ldr	r3, [r7, #24]
- 8002284:	4313      	orrs	r3, r2
- 8002286:	60cb      	str	r3, [r1, #12]
- 8002288:	e025      	b.n	80022d6 <HAL_GPIO_Init+0x302>
- 800228a:	bf00      	nop
- 800228c:	10320000 	.word	0x10320000
- 8002290:	10310000 	.word	0x10310000
- 8002294:	10220000 	.word	0x10220000
- 8002298:	10210000 	.word	0x10210000
- 800229c:	10120000 	.word	0x10120000
- 80022a0:	10110000 	.word	0x10110000
- 80022a4:	40021000 	.word	0x40021000
- 80022a8:	40010000 	.word	0x40010000
- 80022ac:	40010800 	.word	0x40010800
- 80022b0:	40010c00 	.word	0x40010c00
- 80022b4:	40011000 	.word	0x40011000
- 80022b8:	40011400 	.word	0x40011400
- 80022bc:	40011800 	.word	0x40011800
- 80022c0:	40011c00 	.word	0x40011c00
- 80022c4:	40010400 	.word	0x40010400
+ 80022ba:	4b0f      	ldr	r3, [pc, #60]	; (80022f8 <HAL_GPIO_Init+0x324>)
+ 80022bc:	68da      	ldr	r2, [r3, #12]
+ 80022be:	490e      	ldr	r1, [pc, #56]	; (80022f8 <HAL_GPIO_Init+0x324>)
+ 80022c0:	69bb      	ldr	r3, [r7, #24]
+ 80022c2:	4313      	orrs	r3, r2
+ 80022c4:	60cb      	str	r3, [r1, #12]
+ 80022c6:	e006      	b.n	80022d6 <HAL_GPIO_Init+0x302>
         }
         else
         {
@@ -7523,7 +7530,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
   {
     return HAL_ERROR;
  800336a:	2301      	movs	r3, #1
- 800336c:	e26c      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 800336c:	e272      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
 
   /* Check the parameters */
   assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
@@ -7571,7 +7578,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
       {
         return HAL_ERROR;
  80033b6:	2301      	movs	r3, #1
- 80033b8:	e246      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 80033b8:	e24c      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
       }
     }
     else
@@ -7656,7 +7663,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
           {
             return HAL_TIMEOUT;
  800344e:	2303      	movs	r3, #3
- 8003450:	e1fa      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 8003450:	e200      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
         while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
  8003452:	4b5d      	ldr	r3, [pc, #372]	; (80035c8 <HAL_RCC_OscConfig+0x26c>)
  8003454:	681b      	ldr	r3, [r3, #0]
@@ -7687,7 +7694,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
           {
             return HAL_TIMEOUT;
  8003476:	2303      	movs	r3, #3
- 8003478:	e1e6      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 8003478:	e1ec      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
         while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
  800347a:	4b53      	ldr	r3, [pc, #332]	; (80035c8 <HAL_RCC_OscConfig+0x26c>)
  800347c:	681b      	ldr	r3, [r3, #0]
@@ -7745,7 +7752,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
       {
         return HAL_ERROR;
  80034ce:	2301      	movs	r3, #1
- 80034d0:	e1ba      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 80034d0:	e1c0      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
       }
       /* Otherwise, just the calibration is allowed */
       else
@@ -7799,7 +7806,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
           {
             return HAL_TIMEOUT;
  800350c:	2303      	movs	r3, #3
- 800350e:	e19b      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 800350e:	e1a1      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
         while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
  8003510:	4b2d      	ldr	r3, [pc, #180]	; (80035c8 <HAL_RCC_OscConfig+0x26c>)
  8003512:	681b      	ldr	r3, [r3, #0]
@@ -7849,7 +7856,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
           {
             return HAL_TIMEOUT;
  800354e:	2303      	movs	r3, #3
- 8003550:	e17a      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 8003550:	e180      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
         while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
  8003552:	4b1d      	ldr	r3, [pc, #116]	; (80035c8 <HAL_RCC_OscConfig+0x26c>)
  8003554:	681b      	ldr	r3, [r3, #0]
@@ -7903,7 +7910,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         {
           return HAL_TIMEOUT;
  800358e:	2303      	movs	r3, #3
- 8003590:	e15a      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 8003590:	e160      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
       while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
  8003592:	4b0d      	ldr	r3, [pc, #52]	; (80035c8 <HAL_RCC_OscConfig+0x26c>)
  8003594:	6a5b      	ldr	r3, [r3, #36]	; 0x24
@@ -7946,13 +7953,13 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         {
           return HAL_TIMEOUT;
  80035c2:	2303      	movs	r3, #3
- 80035c4:	e140      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 80035c4:	e146      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
  80035c6:	bf00      	nop
  80035c8:	40021000 	.word	0x40021000
  80035cc:	42420000 	.word	0x42420000
  80035d0:	42420480 	.word	0x42420480
       while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
- 80035d4:	4b9e      	ldr	r3, [pc, #632]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 80035d4:	4b92      	ldr	r3, [pc, #584]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  80035d6:	6a5b      	ldr	r3, [r3, #36]	; 0x24
  80035d8:	f003 0302 	and.w	r3, r3, #2
  80035dc:	2b00      	cmp	r3, #0
@@ -7978,19 +7985,19 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
     /* Update LSE configuration in Backup Domain control register    */
     /* Requires to enable write access to Backup Domain of necessary */
     if (__HAL_RCC_PWR_IS_CLK_DISABLED())
- 80035f2:	4b97      	ldr	r3, [pc, #604]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 80035f2:	4b8b      	ldr	r3, [pc, #556]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  80035f4:	69db      	ldr	r3, [r3, #28]
  80035f6:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
  80035fa:	2b00      	cmp	r3, #0
  80035fc:	d10d      	bne.n	800361a <HAL_RCC_OscConfig+0x2be>
     {
       __HAL_RCC_PWR_CLK_ENABLE();
- 80035fe:	4b94      	ldr	r3, [pc, #592]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 80035fe:	4b88      	ldr	r3, [pc, #544]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  8003600:	69db      	ldr	r3, [r3, #28]
- 8003602:	4a93      	ldr	r2, [pc, #588]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 8003602:	4a87      	ldr	r2, [pc, #540]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  8003604:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
  8003608:	61d3      	str	r3, [r2, #28]
- 800360a:	4b91      	ldr	r3, [pc, #580]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 800360a:	4b85      	ldr	r3, [pc, #532]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  800360c:	69db      	ldr	r3, [r3, #28]
  800360e:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
  8003612:	60bb      	str	r3, [r7, #8]
@@ -8001,7 +8008,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
     }
 
     if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- 800361a:	4b8e      	ldr	r3, [pc, #568]	; (8003854 <HAL_RCC_OscConfig+0x4f8>)
+ 800361a:	4b82      	ldr	r3, [pc, #520]	; (8003824 <HAL_RCC_OscConfig+0x4c8>)
  800361c:	681b      	ldr	r3, [r3, #0]
  800361e:	f403 7380 	and.w	r3, r3, #256	; 0x100
  8003622:	2b00      	cmp	r3, #0
@@ -8009,9 +8016,9 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
     {
       /* Enable write access to Backup domain */
       SET_BIT(PWR->CR, PWR_CR_DBP);
- 8003626:	4b8b      	ldr	r3, [pc, #556]	; (8003854 <HAL_RCC_OscConfig+0x4f8>)
+ 8003626:	4b7f      	ldr	r3, [pc, #508]	; (8003824 <HAL_RCC_OscConfig+0x4c8>)
  8003628:	681b      	ldr	r3, [r3, #0]
- 800362a:	4a8a      	ldr	r2, [pc, #552]	; (8003854 <HAL_RCC_OscConfig+0x4f8>)
+ 800362a:	4a7e      	ldr	r2, [pc, #504]	; (8003824 <HAL_RCC_OscConfig+0x4c8>)
  800362c:	f443 7380 	orr.w	r3, r3, #256	; 0x100
  8003630:	6013      	str	r3, [r2, #0]
 
@@ -8033,9 +8040,9 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         {
           return HAL_TIMEOUT;
  8003648:	2303      	movs	r3, #3
- 800364a:	e0fd      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 800364a:	e103      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
       while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- 800364c:	4b81      	ldr	r3, [pc, #516]	; (8003854 <HAL_RCC_OscConfig+0x4f8>)
+ 800364c:	4b75      	ldr	r3, [pc, #468]	; (8003824 <HAL_RCC_OscConfig+0x4c8>)
  800364e:	681b      	ldr	r3, [r3, #0]
  8003650:	f403 7380 	and.w	r3, r3, #256	; 0x100
  8003654:	2b00      	cmp	r3, #0
@@ -8050,9 +8057,9 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
  800365a:	68db      	ldr	r3, [r3, #12]
  800365c:	2b01      	cmp	r3, #1
  800365e:	d106      	bne.n	800366e <HAL_RCC_OscConfig+0x312>
- 8003660:	4b7b      	ldr	r3, [pc, #492]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 8003660:	4b6f      	ldr	r3, [pc, #444]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  8003662:	6a1b      	ldr	r3, [r3, #32]
- 8003664:	4a7a      	ldr	r2, [pc, #488]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 8003664:	4a6e      	ldr	r2, [pc, #440]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  8003666:	f043 0301 	orr.w	r3, r3, #1
  800366a:	6213      	str	r3, [r2, #32]
  800366c:	e02d      	b.n	80036ca <HAL_RCC_OscConfig+0x36e>
@@ -8060,14 +8067,14 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
  8003670:	68db      	ldr	r3, [r3, #12]
  8003672:	2b00      	cmp	r3, #0
  8003674:	d10c      	bne.n	8003690 <HAL_RCC_OscConfig+0x334>
- 8003676:	4b76      	ldr	r3, [pc, #472]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 8003676:	4b6a      	ldr	r3, [pc, #424]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  8003678:	6a1b      	ldr	r3, [r3, #32]
- 800367a:	4a75      	ldr	r2, [pc, #468]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 800367a:	4a69      	ldr	r2, [pc, #420]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  800367c:	f023 0301 	bic.w	r3, r3, #1
  8003680:	6213      	str	r3, [r2, #32]
- 8003682:	4b73      	ldr	r3, [pc, #460]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 8003682:	4b67      	ldr	r3, [pc, #412]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  8003684:	6a1b      	ldr	r3, [r3, #32]
- 8003686:	4a72      	ldr	r2, [pc, #456]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 8003686:	4a66      	ldr	r2, [pc, #408]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  8003688:	f023 0304 	bic.w	r3, r3, #4
  800368c:	6213      	str	r3, [r2, #32]
  800368e:	e01c      	b.n	80036ca <HAL_RCC_OscConfig+0x36e>
@@ -8075,25 +8082,25 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
  8003692:	68db      	ldr	r3, [r3, #12]
  8003694:	2b05      	cmp	r3, #5
  8003696:	d10c      	bne.n	80036b2 <HAL_RCC_OscConfig+0x356>
- 8003698:	4b6d      	ldr	r3, [pc, #436]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 8003698:	4b61      	ldr	r3, [pc, #388]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  800369a:	6a1b      	ldr	r3, [r3, #32]
- 800369c:	4a6c      	ldr	r2, [pc, #432]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 800369c:	4a60      	ldr	r2, [pc, #384]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  800369e:	f043 0304 	orr.w	r3, r3, #4
  80036a2:	6213      	str	r3, [r2, #32]
- 80036a4:	4b6a      	ldr	r3, [pc, #424]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 80036a4:	4b5e      	ldr	r3, [pc, #376]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  80036a6:	6a1b      	ldr	r3, [r3, #32]
- 80036a8:	4a69      	ldr	r2, [pc, #420]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 80036a8:	4a5d      	ldr	r2, [pc, #372]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  80036aa:	f043 0301 	orr.w	r3, r3, #1
  80036ae:	6213      	str	r3, [r2, #32]
  80036b0:	e00b      	b.n	80036ca <HAL_RCC_OscConfig+0x36e>
- 80036b2:	4b67      	ldr	r3, [pc, #412]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 80036b2:	4b5b      	ldr	r3, [pc, #364]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  80036b4:	6a1b      	ldr	r3, [r3, #32]
- 80036b6:	4a66      	ldr	r2, [pc, #408]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 80036b6:	4a5a      	ldr	r2, [pc, #360]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  80036b8:	f023 0301 	bic.w	r3, r3, #1
  80036bc:	6213      	str	r3, [r2, #32]
- 80036be:	4b64      	ldr	r3, [pc, #400]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 80036be:	4b58      	ldr	r3, [pc, #352]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  80036c0:	6a1b      	ldr	r3, [r3, #32]
- 80036c2:	4a63      	ldr	r2, [pc, #396]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 80036c2:	4a57      	ldr	r2, [pc, #348]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  80036c4:	f023 0304 	bic.w	r3, r3, #4
  80036c8:	6213      	str	r3, [r2, #32]
     /* Check the LSE State */
@@ -8123,9 +8130,9 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         {
           return HAL_TIMEOUT;
  80036ec:	2303      	movs	r3, #3
- 80036ee:	e0ab      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 80036ee:	e0b1      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
       while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
- 80036f0:	4b57      	ldr	r3, [pc, #348]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 80036f0:	4b4b      	ldr	r3, [pc, #300]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  80036f2:	6a1b      	ldr	r3, [r3, #32]
  80036f4:	f003 0302 	and.w	r3, r3, #2
  80036f8:	2b00      	cmp	r3, #0
@@ -8155,9 +8162,9 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
         {
           return HAL_TIMEOUT;
  8003718:	2303      	movs	r3, #3
- 800371a:	e095      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 800371a:	e09b      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
       while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
- 800371c:	4b4c      	ldr	r3, [pc, #304]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 800371c:	4b40      	ldr	r3, [pc, #256]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  800371e:	6a1b      	ldr	r3, [r3, #32]
  8003720:	f003 0302 	and.w	r3, r3, #2
  8003724:	2b00      	cmp	r3, #0
@@ -8173,9 +8180,9 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
  800372c:	d105      	bne.n	800373a <HAL_RCC_OscConfig+0x3de>
     {
       __HAL_RCC_PWR_CLK_DISABLE();
- 800372e:	4b48      	ldr	r3, [pc, #288]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 800372e:	4b3c      	ldr	r3, [pc, #240]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  8003730:	69db      	ldr	r3, [r3, #28]
- 8003732:	4a47      	ldr	r2, [pc, #284]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 8003732:	4a3b      	ldr	r2, [pc, #236]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  8003734:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
  8003738:	61d3      	str	r3, [r2, #28]
 
@@ -8187,11 +8194,11 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
  800373a:	687b      	ldr	r3, [r7, #4]
  800373c:	69db      	ldr	r3, [r3, #28]
  800373e:	2b00      	cmp	r3, #0
- 8003740:	f000 8081 	beq.w	8003846 <HAL_RCC_OscConfig+0x4ea>
+ 8003740:	f000 8087 	beq.w	8003852 <HAL_RCC_OscConfig+0x4f6>
   {
     /* Check if the PLL is used as system clock or not */
     if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
- 8003744:	4b42      	ldr	r3, [pc, #264]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 8003744:	4b36      	ldr	r3, [pc, #216]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  8003746:	685b      	ldr	r3, [r3, #4]
  8003748:	f003 030c 	and.w	r3, r3, #12
  800374c:	2b08      	cmp	r3, #8
@@ -8208,7 +8215,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
 
         /* Disable the main PLL. */
         __HAL_RCC_PLL_DISABLE();
- 8003758:	4b3f      	ldr	r3, [pc, #252]	; (8003858 <HAL_RCC_OscConfig+0x4fc>)
+ 8003758:	4b33      	ldr	r3, [pc, #204]	; (8003828 <HAL_RCC_OscConfig+0x4cc>)
  800375a:	2200      	movs	r2, #0
  800375c:	601a      	str	r2, [r3, #0]
 
@@ -8231,9 +8238,9 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
           {
             return HAL_TIMEOUT;
  8003774:	2303      	movs	r3, #3
- 8003776:	e067      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 8003776:	e06d      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
         while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
- 8003778:	4b35      	ldr	r3, [pc, #212]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 8003778:	4b29      	ldr	r3, [pc, #164]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  800377a:	681b      	ldr	r3, [r3, #0]
  800377c:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
  8003780:	2b00      	cmp	r3, #0
@@ -8254,19 +8261,19 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
 
           /* Set PREDIV1 Value */
           __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
- 800378e:	4b30      	ldr	r3, [pc, #192]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 800378e:	4b24      	ldr	r3, [pc, #144]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  8003790:	685b      	ldr	r3, [r3, #4]
  8003792:	f423 3200 	bic.w	r2, r3, #131072	; 0x20000
  8003796:	687b      	ldr	r3, [r7, #4]
  8003798:	689b      	ldr	r3, [r3, #8]
- 800379a:	492d      	ldr	r1, [pc, #180]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 800379a:	4921      	ldr	r1, [pc, #132]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  800379c:	4313      	orrs	r3, r2
  800379e:	604b      	str	r3, [r1, #4]
         }
 
         /* Configure the main PLL clock source and multiplication factors. */
         __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
- 80037a0:	4b2b      	ldr	r3, [pc, #172]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 80037a0:	4b1f      	ldr	r3, [pc, #124]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  80037a2:	685b      	ldr	r3, [r3, #4]
  80037a4:	f423 1274 	bic.w	r2, r3, #3997696	; 0x3d0000
  80037a8:	687b      	ldr	r3, [r7, #4]
@@ -8274,13 +8281,13 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
  80037ac:	687b      	ldr	r3, [r7, #4]
  80037ae:	6a5b      	ldr	r3, [r3, #36]	; 0x24
  80037b0:	430b      	orrs	r3, r1
- 80037b2:	4927      	ldr	r1, [pc, #156]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 80037b2:	491b      	ldr	r1, [pc, #108]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  80037b4:	4313      	orrs	r3, r2
  80037b6:	604b      	str	r3, [r1, #4]
                              RCC_OscInitStruct->PLL.PLLMUL);
         /* Enable the main PLL. */
         __HAL_RCC_PLL_ENABLE();
- 80037b8:	4b27      	ldr	r3, [pc, #156]	; (8003858 <HAL_RCC_OscConfig+0x4fc>)
+ 80037b8:	4b1b      	ldr	r3, [pc, #108]	; (8003828 <HAL_RCC_OscConfig+0x4cc>)
  80037ba:	2201      	movs	r2, #1
  80037bc:	601a      	str	r2, [r3, #0]
 
@@ -8303,21 +8310,21 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
           {
             return HAL_TIMEOUT;
  80037d4:	2303      	movs	r3, #3
- 80037d6:	e037      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 80037d6:	e03d      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
         while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
- 80037d8:	4b1d      	ldr	r3, [pc, #116]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 80037d8:	4b11      	ldr	r3, [pc, #68]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  80037da:	681b      	ldr	r3, [r3, #0]
  80037dc:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
  80037e0:	2b00      	cmp	r3, #0
  80037e2:	d0f0      	beq.n	80037c6 <HAL_RCC_OscConfig+0x46a>
- 80037e4:	e02f      	b.n	8003846 <HAL_RCC_OscConfig+0x4ea>
+ 80037e4:	e035      	b.n	8003852 <HAL_RCC_OscConfig+0x4f6>
         }
       }
       else
       {
         /* Disable the main PLL. */
         __HAL_RCC_PLL_DISABLE();
- 80037e6:	4b1c      	ldr	r3, [pc, #112]	; (8003858 <HAL_RCC_OscConfig+0x4fc>)
+ 80037e6:	4b10      	ldr	r3, [pc, #64]	; (8003828 <HAL_RCC_OscConfig+0x4cc>)
  80037e8:	2200      	movs	r2, #0
  80037ea:	601a      	str	r2, [r3, #0]
 
@@ -8340,14 +8347,14 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
           {
             return HAL_TIMEOUT;
  8003802:	2303      	movs	r3, #3
- 8003804:	e020      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 8003804:	e026      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
         while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
- 8003806:	4b12      	ldr	r3, [pc, #72]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
+ 8003806:	4b06      	ldr	r3, [pc, #24]	; (8003820 <HAL_RCC_OscConfig+0x4c4>)
  8003808:	681b      	ldr	r3, [r3, #0]
  800380a:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
  800380e:	2b00      	cmp	r3, #0
  8003810:	d1f0      	bne.n	80037f4 <HAL_RCC_OscConfig+0x498>
- 8003812:	e018      	b.n	8003846 <HAL_RCC_OscConfig+0x4ea>
+ 8003812:	e01e      	b.n	8003852 <HAL_RCC_OscConfig+0x4f6>
       }
     }
     else
@@ -8357,483 +8364,484 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
  8003814:	687b      	ldr	r3, [r7, #4]
  8003816:	69db      	ldr	r3, [r3, #28]
  8003818:	2b01      	cmp	r3, #1
- 800381a:	d101      	bne.n	8003820 <HAL_RCC_OscConfig+0x4c4>
+ 800381a:	d107      	bne.n	800382c <HAL_RCC_OscConfig+0x4d0>
       {
         return HAL_ERROR;
  800381c:	2301      	movs	r3, #1
- 800381e:	e013      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 800381e:	e019      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
+ 8003820:	40021000 	.word	0x40021000
+ 8003824:	40007000 	.word	0x40007000
+ 8003828:	42420060 	.word	0x42420060
       }
       else
       {
         /* Do not return HAL_ERROR if request repeats the current configuration */
         pll_config = RCC->CFGR;
- 8003820:	4b0b      	ldr	r3, [pc, #44]	; (8003850 <HAL_RCC_OscConfig+0x4f4>)
- 8003822:	685b      	ldr	r3, [r3, #4]
- 8003824:	60fb      	str	r3, [r7, #12]
+ 800382c:	4b0b      	ldr	r3, [pc, #44]	; (800385c <HAL_RCC_OscConfig+0x500>)
+ 800382e:	685b      	ldr	r3, [r3, #4]
+ 8003830:	60fb      	str	r3, [r7, #12]
         if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
- 8003826:	68fb      	ldr	r3, [r7, #12]
- 8003828:	f403 3280 	and.w	r2, r3, #65536	; 0x10000
- 800382c:	687b      	ldr	r3, [r7, #4]
- 800382e:	6a1b      	ldr	r3, [r3, #32]
- 8003830:	429a      	cmp	r2, r3
- 8003832:	d106      	bne.n	8003842 <HAL_RCC_OscConfig+0x4e6>
+ 8003832:	68fb      	ldr	r3, [r7, #12]
+ 8003834:	f403 3280 	and.w	r2, r3, #65536	; 0x10000
+ 8003838:	687b      	ldr	r3, [r7, #4]
+ 800383a:	6a1b      	ldr	r3, [r3, #32]
+ 800383c:	429a      	cmp	r2, r3
+ 800383e:	d106      	bne.n	800384e <HAL_RCC_OscConfig+0x4f2>
             (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
- 8003834:	68fb      	ldr	r3, [r7, #12]
- 8003836:	f403 1270 	and.w	r2, r3, #3932160	; 0x3c0000
- 800383a:	687b      	ldr	r3, [r7, #4]
- 800383c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003840:	68fb      	ldr	r3, [r7, #12]
+ 8003842:	f403 1270 	and.w	r2, r3, #3932160	; 0x3c0000
+ 8003846:	687b      	ldr	r3, [r7, #4]
+ 8003848:	6a5b      	ldr	r3, [r3, #36]	; 0x24
         if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
- 800383e:	429a      	cmp	r2, r3
- 8003840:	d001      	beq.n	8003846 <HAL_RCC_OscConfig+0x4ea>
+ 800384a:	429a      	cmp	r2, r3
+ 800384c:	d001      	beq.n	8003852 <HAL_RCC_OscConfig+0x4f6>
         {
           return HAL_ERROR;
- 8003842:	2301      	movs	r3, #1
- 8003844:	e000      	b.n	8003848 <HAL_RCC_OscConfig+0x4ec>
+ 800384e:	2301      	movs	r3, #1
+ 8003850:	e000      	b.n	8003854 <HAL_RCC_OscConfig+0x4f8>
         }
       }
     }
   }
 
   return HAL_OK;
- 8003846:	2300      	movs	r3, #0
+ 8003852:	2300      	movs	r3, #0
 }
- 8003848:	4618      	mov	r0, r3
- 800384a:	3718      	adds	r7, #24
- 800384c:	46bd      	mov	sp, r7
- 800384e:	bd80      	pop	{r7, pc}
- 8003850:	40021000 	.word	0x40021000
- 8003854:	40007000 	.word	0x40007000
- 8003858:	42420060 	.word	0x42420060
+ 8003854:	4618      	mov	r0, r3
+ 8003856:	3718      	adds	r7, #24
+ 8003858:	46bd      	mov	sp, r7
+ 800385a:	bd80      	pop	{r7, pc}
+ 800385c:	40021000 	.word	0x40021000
 
-0800385c <HAL_RCC_ClockConfig>:
+08003860 <HAL_RCC_ClockConfig>:
   *         You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
   *         currently used as system clock source.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
 {
- 800385c:	b580      	push	{r7, lr}
- 800385e:	b084      	sub	sp, #16
- 8003860:	af00      	add	r7, sp, #0
- 8003862:	6078      	str	r0, [r7, #4]
- 8003864:	6039      	str	r1, [r7, #0]
+ 8003860:	b580      	push	{r7, lr}
+ 8003862:	b084      	sub	sp, #16
+ 8003864:	af00      	add	r7, sp, #0
+ 8003866:	6078      	str	r0, [r7, #4]
+ 8003868:	6039      	str	r1, [r7, #0]
   uint32_t tickstart;
 
   /* Check Null pointer */
   if (RCC_ClkInitStruct == NULL)
- 8003866:	687b      	ldr	r3, [r7, #4]
- 8003868:	2b00      	cmp	r3, #0
- 800386a:	d101      	bne.n	8003870 <HAL_RCC_ClockConfig+0x14>
+ 800386a:	687b      	ldr	r3, [r7, #4]
+ 800386c:	2b00      	cmp	r3, #0
+ 800386e:	d101      	bne.n	8003874 <HAL_RCC_ClockConfig+0x14>
   {
     return HAL_ERROR;
- 800386c:	2301      	movs	r3, #1
- 800386e:	e0d0      	b.n	8003a12 <HAL_RCC_ClockConfig+0x1b6>
+ 8003870:	2301      	movs	r3, #1
+ 8003872:	e0d0      	b.n	8003a16 <HAL_RCC_ClockConfig+0x1b6>
   must be correctly programmed according to the frequency of the CPU clock
     (HCLK) of the device. */
 
 #if defined(FLASH_ACR_LATENCY)
   /* Increasing the number of wait states because of higher CPU frequency */
   if (FLatency > __HAL_FLASH_GET_LATENCY())
- 8003870:	4b6a      	ldr	r3, [pc, #424]	; (8003a1c <HAL_RCC_ClockConfig+0x1c0>)
- 8003872:	681b      	ldr	r3, [r3, #0]
- 8003874:	f003 0307 	and.w	r3, r3, #7
- 8003878:	683a      	ldr	r2, [r7, #0]
- 800387a:	429a      	cmp	r2, r3
- 800387c:	d910      	bls.n	80038a0 <HAL_RCC_ClockConfig+0x44>
+ 8003874:	4b6a      	ldr	r3, [pc, #424]	; (8003a20 <HAL_RCC_ClockConfig+0x1c0>)
+ 8003876:	681b      	ldr	r3, [r3, #0]
+ 8003878:	f003 0307 	and.w	r3, r3, #7
+ 800387c:	683a      	ldr	r2, [r7, #0]
+ 800387e:	429a      	cmp	r2, r3
+ 8003880:	d910      	bls.n	80038a4 <HAL_RCC_ClockConfig+0x44>
   {
     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
     __HAL_FLASH_SET_LATENCY(FLatency);
- 800387e:	4b67      	ldr	r3, [pc, #412]	; (8003a1c <HAL_RCC_ClockConfig+0x1c0>)
- 8003880:	681b      	ldr	r3, [r3, #0]
- 8003882:	f023 0207 	bic.w	r2, r3, #7
- 8003886:	4965      	ldr	r1, [pc, #404]	; (8003a1c <HAL_RCC_ClockConfig+0x1c0>)
- 8003888:	683b      	ldr	r3, [r7, #0]
- 800388a:	4313      	orrs	r3, r2
- 800388c:	600b      	str	r3, [r1, #0]
+ 8003882:	4b67      	ldr	r3, [pc, #412]	; (8003a20 <HAL_RCC_ClockConfig+0x1c0>)
+ 8003884:	681b      	ldr	r3, [r3, #0]
+ 8003886:	f023 0207 	bic.w	r2, r3, #7
+ 800388a:	4965      	ldr	r1, [pc, #404]	; (8003a20 <HAL_RCC_ClockConfig+0x1c0>)
+ 800388c:	683b      	ldr	r3, [r7, #0]
+ 800388e:	4313      	orrs	r3, r2
+ 8003890:	600b      	str	r3, [r1, #0]
 
     /* Check that the new number of wait states is taken into account to access the Flash
     memory by reading the FLASH_ACR register */
     if (__HAL_FLASH_GET_LATENCY() != FLatency)
- 800388e:	4b63      	ldr	r3, [pc, #396]	; (8003a1c <HAL_RCC_ClockConfig+0x1c0>)
- 8003890:	681b      	ldr	r3, [r3, #0]
- 8003892:	f003 0307 	and.w	r3, r3, #7
- 8003896:	683a      	ldr	r2, [r7, #0]
- 8003898:	429a      	cmp	r2, r3
- 800389a:	d001      	beq.n	80038a0 <HAL_RCC_ClockConfig+0x44>
+ 8003892:	4b63      	ldr	r3, [pc, #396]	; (8003a20 <HAL_RCC_ClockConfig+0x1c0>)
+ 8003894:	681b      	ldr	r3, [r3, #0]
+ 8003896:	f003 0307 	and.w	r3, r3, #7
+ 800389a:	683a      	ldr	r2, [r7, #0]
+ 800389c:	429a      	cmp	r2, r3
+ 800389e:	d001      	beq.n	80038a4 <HAL_RCC_ClockConfig+0x44>
   {
     return HAL_ERROR;
- 800389c:	2301      	movs	r3, #1
- 800389e:	e0b8      	b.n	8003a12 <HAL_RCC_ClockConfig+0x1b6>
+ 80038a0:	2301      	movs	r3, #1
+ 80038a2:	e0b8      	b.n	8003a16 <HAL_RCC_ClockConfig+0x1b6>
   }
 }
 
 #endif /* FLASH_ACR_LATENCY */
 /*-------------------------- HCLK Configuration --------------------------*/
 if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
- 80038a0:	687b      	ldr	r3, [r7, #4]
- 80038a2:	681b      	ldr	r3, [r3, #0]
- 80038a4:	f003 0302 	and.w	r3, r3, #2
- 80038a8:	2b00      	cmp	r3, #0
- 80038aa:	d020      	beq.n	80038ee <HAL_RCC_ClockConfig+0x92>
+ 80038a4:	687b      	ldr	r3, [r7, #4]
+ 80038a6:	681b      	ldr	r3, [r3, #0]
+ 80038a8:	f003 0302 	and.w	r3, r3, #2
+ 80038ac:	2b00      	cmp	r3, #0
+ 80038ae:	d020      	beq.n	80038f2 <HAL_RCC_ClockConfig+0x92>
   {
     /* Set the highest APBx dividers in order to ensure that we do not go through
     a non-spec phase whatever we decrease or increase HCLK. */
     if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 80038ac:	687b      	ldr	r3, [r7, #4]
- 80038ae:	681b      	ldr	r3, [r3, #0]
- 80038b0:	f003 0304 	and.w	r3, r3, #4
- 80038b4:	2b00      	cmp	r3, #0
- 80038b6:	d005      	beq.n	80038c4 <HAL_RCC_ClockConfig+0x68>
+ 80038b0:	687b      	ldr	r3, [r7, #4]
+ 80038b2:	681b      	ldr	r3, [r3, #0]
+ 80038b4:	f003 0304 	and.w	r3, r3, #4
+ 80038b8:	2b00      	cmp	r3, #0
+ 80038ba:	d005      	beq.n	80038c8 <HAL_RCC_ClockConfig+0x68>
     {
       MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
- 80038b8:	4b59      	ldr	r3, [pc, #356]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 80038ba:	685b      	ldr	r3, [r3, #4]
- 80038bc:	4a58      	ldr	r2, [pc, #352]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 80038be:	f443 63e0 	orr.w	r3, r3, #1792	; 0x700
- 80038c2:	6053      	str	r3, [r2, #4]
+ 80038bc:	4b59      	ldr	r3, [pc, #356]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 80038be:	685b      	ldr	r3, [r3, #4]
+ 80038c0:	4a58      	ldr	r2, [pc, #352]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 80038c2:	f443 63e0 	orr.w	r3, r3, #1792	; 0x700
+ 80038c6:	6053      	str	r3, [r2, #4]
     }
 
     if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 80038c4:	687b      	ldr	r3, [r7, #4]
- 80038c6:	681b      	ldr	r3, [r3, #0]
- 80038c8:	f003 0308 	and.w	r3, r3, #8
- 80038cc:	2b00      	cmp	r3, #0
- 80038ce:	d005      	beq.n	80038dc <HAL_RCC_ClockConfig+0x80>
+ 80038c8:	687b      	ldr	r3, [r7, #4]
+ 80038ca:	681b      	ldr	r3, [r3, #0]
+ 80038cc:	f003 0308 	and.w	r3, r3, #8
+ 80038d0:	2b00      	cmp	r3, #0
+ 80038d2:	d005      	beq.n	80038e0 <HAL_RCC_ClockConfig+0x80>
     {
       MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
- 80038d0:	4b53      	ldr	r3, [pc, #332]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 80038d2:	685b      	ldr	r3, [r3, #4]
- 80038d4:	4a52      	ldr	r2, [pc, #328]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 80038d6:	f443 5360 	orr.w	r3, r3, #14336	; 0x3800
- 80038da:	6053      	str	r3, [r2, #4]
+ 80038d4:	4b53      	ldr	r3, [pc, #332]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 80038d6:	685b      	ldr	r3, [r3, #4]
+ 80038d8:	4a52      	ldr	r2, [pc, #328]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 80038da:	f443 5360 	orr.w	r3, r3, #14336	; 0x3800
+ 80038de:	6053      	str	r3, [r2, #4]
     }
 
     /* Set the new HCLK clock divider */
     assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
     MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
- 80038dc:	4b50      	ldr	r3, [pc, #320]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 80038de:	685b      	ldr	r3, [r3, #4]
- 80038e0:	f023 02f0 	bic.w	r2, r3, #240	; 0xf0
- 80038e4:	687b      	ldr	r3, [r7, #4]
- 80038e6:	689b      	ldr	r3, [r3, #8]
- 80038e8:	494d      	ldr	r1, [pc, #308]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 80038ea:	4313      	orrs	r3, r2
- 80038ec:	604b      	str	r3, [r1, #4]
+ 80038e0:	4b50      	ldr	r3, [pc, #320]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 80038e2:	685b      	ldr	r3, [r3, #4]
+ 80038e4:	f023 02f0 	bic.w	r2, r3, #240	; 0xf0
+ 80038e8:	687b      	ldr	r3, [r7, #4]
+ 80038ea:	689b      	ldr	r3, [r3, #8]
+ 80038ec:	494d      	ldr	r1, [pc, #308]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 80038ee:	4313      	orrs	r3, r2
+ 80038f0:	604b      	str	r3, [r1, #4]
   }
 
   /*------------------------- SYSCLK Configuration ---------------------------*/
   if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
- 80038ee:	687b      	ldr	r3, [r7, #4]
- 80038f0:	681b      	ldr	r3, [r3, #0]
- 80038f2:	f003 0301 	and.w	r3, r3, #1
- 80038f6:	2b00      	cmp	r3, #0
- 80038f8:	d040      	beq.n	800397c <HAL_RCC_ClockConfig+0x120>
+ 80038f2:	687b      	ldr	r3, [r7, #4]
+ 80038f4:	681b      	ldr	r3, [r3, #0]
+ 80038f6:	f003 0301 	and.w	r3, r3, #1
+ 80038fa:	2b00      	cmp	r3, #0
+ 80038fc:	d040      	beq.n	8003980 <HAL_RCC_ClockConfig+0x120>
   {
     assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
 
     /* HSE is selected as System Clock Source */
     if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
- 80038fa:	687b      	ldr	r3, [r7, #4]
- 80038fc:	685b      	ldr	r3, [r3, #4]
- 80038fe:	2b01      	cmp	r3, #1
- 8003900:	d107      	bne.n	8003912 <HAL_RCC_ClockConfig+0xb6>
+ 80038fe:	687b      	ldr	r3, [r7, #4]
+ 8003900:	685b      	ldr	r3, [r3, #4]
+ 8003902:	2b01      	cmp	r3, #1
+ 8003904:	d107      	bne.n	8003916 <HAL_RCC_ClockConfig+0xb6>
     {
       /* Check the HSE ready flag */
       if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
- 8003902:	4b47      	ldr	r3, [pc, #284]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 8003904:	681b      	ldr	r3, [r3, #0]
- 8003906:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
- 800390a:	2b00      	cmp	r3, #0
- 800390c:	d115      	bne.n	800393a <HAL_RCC_ClockConfig+0xde>
+ 8003906:	4b47      	ldr	r3, [pc, #284]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 8003908:	681b      	ldr	r3, [r3, #0]
+ 800390a:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
+ 800390e:	2b00      	cmp	r3, #0
+ 8003910:	d115      	bne.n	800393e <HAL_RCC_ClockConfig+0xde>
       {
         return HAL_ERROR;
- 800390e:	2301      	movs	r3, #1
- 8003910:	e07f      	b.n	8003a12 <HAL_RCC_ClockConfig+0x1b6>
+ 8003912:	2301      	movs	r3, #1
+ 8003914:	e07f      	b.n	8003a16 <HAL_RCC_ClockConfig+0x1b6>
       }
     }
     /* PLL is selected as System Clock Source */
     else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
- 8003912:	687b      	ldr	r3, [r7, #4]
- 8003914:	685b      	ldr	r3, [r3, #4]
- 8003916:	2b02      	cmp	r3, #2
- 8003918:	d107      	bne.n	800392a <HAL_RCC_ClockConfig+0xce>
+ 8003916:	687b      	ldr	r3, [r7, #4]
+ 8003918:	685b      	ldr	r3, [r3, #4]
+ 800391a:	2b02      	cmp	r3, #2
+ 800391c:	d107      	bne.n	800392e <HAL_RCC_ClockConfig+0xce>
     {
       /* Check the PLL ready flag */
       if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
- 800391a:	4b41      	ldr	r3, [pc, #260]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 800391c:	681b      	ldr	r3, [r3, #0]
- 800391e:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
- 8003922:	2b00      	cmp	r3, #0
- 8003924:	d109      	bne.n	800393a <HAL_RCC_ClockConfig+0xde>
+ 800391e:	4b41      	ldr	r3, [pc, #260]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 8003920:	681b      	ldr	r3, [r3, #0]
+ 8003922:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
+ 8003926:	2b00      	cmp	r3, #0
+ 8003928:	d109      	bne.n	800393e <HAL_RCC_ClockConfig+0xde>
       {
         return HAL_ERROR;
- 8003926:	2301      	movs	r3, #1
- 8003928:	e073      	b.n	8003a12 <HAL_RCC_ClockConfig+0x1b6>
+ 800392a:	2301      	movs	r3, #1
+ 800392c:	e073      	b.n	8003a16 <HAL_RCC_ClockConfig+0x1b6>
     }
     /* HSI is selected as System Clock Source */
     else
     {
       /* Check the HSI ready flag */
       if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
- 800392a:	4b3d      	ldr	r3, [pc, #244]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 800392c:	681b      	ldr	r3, [r3, #0]
- 800392e:	f003 0302 	and.w	r3, r3, #2
- 8003932:	2b00      	cmp	r3, #0
- 8003934:	d101      	bne.n	800393a <HAL_RCC_ClockConfig+0xde>
+ 800392e:	4b3d      	ldr	r3, [pc, #244]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 8003930:	681b      	ldr	r3, [r3, #0]
+ 8003932:	f003 0302 	and.w	r3, r3, #2
+ 8003936:	2b00      	cmp	r3, #0
+ 8003938:	d101      	bne.n	800393e <HAL_RCC_ClockConfig+0xde>
       {
         return HAL_ERROR;
- 8003936:	2301      	movs	r3, #1
- 8003938:	e06b      	b.n	8003a12 <HAL_RCC_ClockConfig+0x1b6>
+ 800393a:	2301      	movs	r3, #1
+ 800393c:	e06b      	b.n	8003a16 <HAL_RCC_ClockConfig+0x1b6>
       }
     }
     __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
- 800393a:	4b39      	ldr	r3, [pc, #228]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 800393c:	685b      	ldr	r3, [r3, #4]
- 800393e:	f023 0203 	bic.w	r2, r3, #3
- 8003942:	687b      	ldr	r3, [r7, #4]
- 8003944:	685b      	ldr	r3, [r3, #4]
- 8003946:	4936      	ldr	r1, [pc, #216]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 8003948:	4313      	orrs	r3, r2
- 800394a:	604b      	str	r3, [r1, #4]
+ 800393e:	4b39      	ldr	r3, [pc, #228]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 8003940:	685b      	ldr	r3, [r3, #4]
+ 8003942:	f023 0203 	bic.w	r2, r3, #3
+ 8003946:	687b      	ldr	r3, [r7, #4]
+ 8003948:	685b      	ldr	r3, [r3, #4]
+ 800394a:	4936      	ldr	r1, [pc, #216]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 800394c:	4313      	orrs	r3, r2
+ 800394e:	604b      	str	r3, [r1, #4]
 
     /* Get Start Tick */
     tickstart = HAL_GetTick();
- 800394c:	f7fe fa06 	bl	8001d5c <HAL_GetTick>
- 8003950:	60f8      	str	r0, [r7, #12]
+ 8003950:	f7fe fa04 	bl	8001d5c <HAL_GetTick>
+ 8003954:	60f8      	str	r0, [r7, #12]
 
     while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- 8003952:	e00a      	b.n	800396a <HAL_RCC_ClockConfig+0x10e>
+ 8003956:	e00a      	b.n	800396e <HAL_RCC_ClockConfig+0x10e>
     {
       if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
- 8003954:	f7fe fa02 	bl	8001d5c <HAL_GetTick>
- 8003958:	4602      	mov	r2, r0
- 800395a:	68fb      	ldr	r3, [r7, #12]
- 800395c:	1ad3      	subs	r3, r2, r3
- 800395e:	f241 3288 	movw	r2, #5000	; 0x1388
- 8003962:	4293      	cmp	r3, r2
- 8003964:	d901      	bls.n	800396a <HAL_RCC_ClockConfig+0x10e>
+ 8003958:	f7fe fa00 	bl	8001d5c <HAL_GetTick>
+ 800395c:	4602      	mov	r2, r0
+ 800395e:	68fb      	ldr	r3, [r7, #12]
+ 8003960:	1ad3      	subs	r3, r2, r3
+ 8003962:	f241 3288 	movw	r2, #5000	; 0x1388
+ 8003966:	4293      	cmp	r3, r2
+ 8003968:	d901      	bls.n	800396e <HAL_RCC_ClockConfig+0x10e>
       {
         return HAL_TIMEOUT;
- 8003966:	2303      	movs	r3, #3
- 8003968:	e053      	b.n	8003a12 <HAL_RCC_ClockConfig+0x1b6>
+ 800396a:	2303      	movs	r3, #3
+ 800396c:	e053      	b.n	8003a16 <HAL_RCC_ClockConfig+0x1b6>
     while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
- 800396a:	4b2d      	ldr	r3, [pc, #180]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 800396c:	685b      	ldr	r3, [r3, #4]
- 800396e:	f003 020c 	and.w	r2, r3, #12
- 8003972:	687b      	ldr	r3, [r7, #4]
- 8003974:	685b      	ldr	r3, [r3, #4]
- 8003976:	009b      	lsls	r3, r3, #2
- 8003978:	429a      	cmp	r2, r3
- 800397a:	d1eb      	bne.n	8003954 <HAL_RCC_ClockConfig+0xf8>
+ 800396e:	4b2d      	ldr	r3, [pc, #180]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 8003970:	685b      	ldr	r3, [r3, #4]
+ 8003972:	f003 020c 	and.w	r2, r3, #12
+ 8003976:	687b      	ldr	r3, [r7, #4]
+ 8003978:	685b      	ldr	r3, [r3, #4]
+ 800397a:	009b      	lsls	r3, r3, #2
+ 800397c:	429a      	cmp	r2, r3
+ 800397e:	d1eb      	bne.n	8003958 <HAL_RCC_ClockConfig+0xf8>
     }
   }
 
 #if defined(FLASH_ACR_LATENCY)
   /* Decreasing the number of wait states because of lower CPU frequency */
   if (FLatency < __HAL_FLASH_GET_LATENCY())
- 800397c:	4b27      	ldr	r3, [pc, #156]	; (8003a1c <HAL_RCC_ClockConfig+0x1c0>)
- 800397e:	681b      	ldr	r3, [r3, #0]
- 8003980:	f003 0307 	and.w	r3, r3, #7
- 8003984:	683a      	ldr	r2, [r7, #0]
- 8003986:	429a      	cmp	r2, r3
- 8003988:	d210      	bcs.n	80039ac <HAL_RCC_ClockConfig+0x150>
+ 8003980:	4b27      	ldr	r3, [pc, #156]	; (8003a20 <HAL_RCC_ClockConfig+0x1c0>)
+ 8003982:	681b      	ldr	r3, [r3, #0]
+ 8003984:	f003 0307 	and.w	r3, r3, #7
+ 8003988:	683a      	ldr	r2, [r7, #0]
+ 800398a:	429a      	cmp	r2, r3
+ 800398c:	d210      	bcs.n	80039b0 <HAL_RCC_ClockConfig+0x150>
   {
     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
     __HAL_FLASH_SET_LATENCY(FLatency);
- 800398a:	4b24      	ldr	r3, [pc, #144]	; (8003a1c <HAL_RCC_ClockConfig+0x1c0>)
- 800398c:	681b      	ldr	r3, [r3, #0]
- 800398e:	f023 0207 	bic.w	r2, r3, #7
- 8003992:	4922      	ldr	r1, [pc, #136]	; (8003a1c <HAL_RCC_ClockConfig+0x1c0>)
- 8003994:	683b      	ldr	r3, [r7, #0]
- 8003996:	4313      	orrs	r3, r2
- 8003998:	600b      	str	r3, [r1, #0]
+ 800398e:	4b24      	ldr	r3, [pc, #144]	; (8003a20 <HAL_RCC_ClockConfig+0x1c0>)
+ 8003990:	681b      	ldr	r3, [r3, #0]
+ 8003992:	f023 0207 	bic.w	r2, r3, #7
+ 8003996:	4922      	ldr	r1, [pc, #136]	; (8003a20 <HAL_RCC_ClockConfig+0x1c0>)
+ 8003998:	683b      	ldr	r3, [r7, #0]
+ 800399a:	4313      	orrs	r3, r2
+ 800399c:	600b      	str	r3, [r1, #0]
 
     /* Check that the new number of wait states is taken into account to access the Flash
     memory by reading the FLASH_ACR register */
     if (__HAL_FLASH_GET_LATENCY() != FLatency)
- 800399a:	4b20      	ldr	r3, [pc, #128]	; (8003a1c <HAL_RCC_ClockConfig+0x1c0>)
- 800399c:	681b      	ldr	r3, [r3, #0]
- 800399e:	f003 0307 	and.w	r3, r3, #7
- 80039a2:	683a      	ldr	r2, [r7, #0]
- 80039a4:	429a      	cmp	r2, r3
- 80039a6:	d001      	beq.n	80039ac <HAL_RCC_ClockConfig+0x150>
+ 800399e:	4b20      	ldr	r3, [pc, #128]	; (8003a20 <HAL_RCC_ClockConfig+0x1c0>)
+ 80039a0:	681b      	ldr	r3, [r3, #0]
+ 80039a2:	f003 0307 	and.w	r3, r3, #7
+ 80039a6:	683a      	ldr	r2, [r7, #0]
+ 80039a8:	429a      	cmp	r2, r3
+ 80039aa:	d001      	beq.n	80039b0 <HAL_RCC_ClockConfig+0x150>
   {
     return HAL_ERROR;
- 80039a8:	2301      	movs	r3, #1
- 80039aa:	e032      	b.n	8003a12 <HAL_RCC_ClockConfig+0x1b6>
+ 80039ac:	2301      	movs	r3, #1
+ 80039ae:	e032      	b.n	8003a16 <HAL_RCC_ClockConfig+0x1b6>
   }
 }
 #endif /* FLASH_ACR_LATENCY */
 
 /*-------------------------- PCLK1 Configuration ---------------------------*/
 if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 80039ac:	687b      	ldr	r3, [r7, #4]
- 80039ae:	681b      	ldr	r3, [r3, #0]
- 80039b0:	f003 0304 	and.w	r3, r3, #4
- 80039b4:	2b00      	cmp	r3, #0
- 80039b6:	d008      	beq.n	80039ca <HAL_RCC_ClockConfig+0x16e>
+ 80039b0:	687b      	ldr	r3, [r7, #4]
+ 80039b2:	681b      	ldr	r3, [r3, #0]
+ 80039b4:	f003 0304 	and.w	r3, r3, #4
+ 80039b8:	2b00      	cmp	r3, #0
+ 80039ba:	d008      	beq.n	80039ce <HAL_RCC_ClockConfig+0x16e>
   {
     assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
- 80039b8:	4b19      	ldr	r3, [pc, #100]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 80039ba:	685b      	ldr	r3, [r3, #4]
- 80039bc:	f423 62e0 	bic.w	r2, r3, #1792	; 0x700
- 80039c0:	687b      	ldr	r3, [r7, #4]
- 80039c2:	68db      	ldr	r3, [r3, #12]
- 80039c4:	4916      	ldr	r1, [pc, #88]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 80039c6:	4313      	orrs	r3, r2
- 80039c8:	604b      	str	r3, [r1, #4]
+ 80039bc:	4b19      	ldr	r3, [pc, #100]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 80039be:	685b      	ldr	r3, [r3, #4]
+ 80039c0:	f423 62e0 	bic.w	r2, r3, #1792	; 0x700
+ 80039c4:	687b      	ldr	r3, [r7, #4]
+ 80039c6:	68db      	ldr	r3, [r3, #12]
+ 80039c8:	4916      	ldr	r1, [pc, #88]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 80039ca:	4313      	orrs	r3, r2
+ 80039cc:	604b      	str	r3, [r1, #4]
   }
 
   /*-------------------------- PCLK2 Configuration ---------------------------*/
   if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 80039ca:	687b      	ldr	r3, [r7, #4]
- 80039cc:	681b      	ldr	r3, [r3, #0]
- 80039ce:	f003 0308 	and.w	r3, r3, #8
- 80039d2:	2b00      	cmp	r3, #0
- 80039d4:	d009      	beq.n	80039ea <HAL_RCC_ClockConfig+0x18e>
+ 80039ce:	687b      	ldr	r3, [r7, #4]
+ 80039d0:	681b      	ldr	r3, [r3, #0]
+ 80039d2:	f003 0308 	and.w	r3, r3, #8
+ 80039d6:	2b00      	cmp	r3, #0
+ 80039d8:	d009      	beq.n	80039ee <HAL_RCC_ClockConfig+0x18e>
   {
     assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
- 80039d6:	4b12      	ldr	r3, [pc, #72]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 80039d8:	685b      	ldr	r3, [r3, #4]
- 80039da:	f423 5260 	bic.w	r2, r3, #14336	; 0x3800
- 80039de:	687b      	ldr	r3, [r7, #4]
- 80039e0:	691b      	ldr	r3, [r3, #16]
- 80039e2:	00db      	lsls	r3, r3, #3
- 80039e4:	490e      	ldr	r1, [pc, #56]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 80039e6:	4313      	orrs	r3, r2
- 80039e8:	604b      	str	r3, [r1, #4]
+ 80039da:	4b12      	ldr	r3, [pc, #72]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 80039dc:	685b      	ldr	r3, [r3, #4]
+ 80039de:	f423 5260 	bic.w	r2, r3, #14336	; 0x3800
+ 80039e2:	687b      	ldr	r3, [r7, #4]
+ 80039e4:	691b      	ldr	r3, [r3, #16]
+ 80039e6:	00db      	lsls	r3, r3, #3
+ 80039e8:	490e      	ldr	r1, [pc, #56]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 80039ea:	4313      	orrs	r3, r2
+ 80039ec:	604b      	str	r3, [r1, #4]
   }
 
   /* Update the SystemCoreClock global variable */
   SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
- 80039ea:	f000 f821 	bl	8003a30 <HAL_RCC_GetSysClockFreq>
- 80039ee:	4602      	mov	r2, r0
- 80039f0:	4b0b      	ldr	r3, [pc, #44]	; (8003a20 <HAL_RCC_ClockConfig+0x1c4>)
- 80039f2:	685b      	ldr	r3, [r3, #4]
- 80039f4:	091b      	lsrs	r3, r3, #4
- 80039f6:	f003 030f 	and.w	r3, r3, #15
- 80039fa:	490a      	ldr	r1, [pc, #40]	; (8003a24 <HAL_RCC_ClockConfig+0x1c8>)
- 80039fc:	5ccb      	ldrb	r3, [r1, r3]
- 80039fe:	fa22 f303 	lsr.w	r3, r2, r3
- 8003a02:	4a09      	ldr	r2, [pc, #36]	; (8003a28 <HAL_RCC_ClockConfig+0x1cc>)
- 8003a04:	6013      	str	r3, [r2, #0]
+ 80039ee:	f000 f821 	bl	8003a34 <HAL_RCC_GetSysClockFreq>
+ 80039f2:	4602      	mov	r2, r0
+ 80039f4:	4b0b      	ldr	r3, [pc, #44]	; (8003a24 <HAL_RCC_ClockConfig+0x1c4>)
+ 80039f6:	685b      	ldr	r3, [r3, #4]
+ 80039f8:	091b      	lsrs	r3, r3, #4
+ 80039fa:	f003 030f 	and.w	r3, r3, #15
+ 80039fe:	490a      	ldr	r1, [pc, #40]	; (8003a28 <HAL_RCC_ClockConfig+0x1c8>)
+ 8003a00:	5ccb      	ldrb	r3, [r1, r3]
+ 8003a02:	fa22 f303 	lsr.w	r3, r2, r3
+ 8003a06:	4a09      	ldr	r2, [pc, #36]	; (8003a2c <HAL_RCC_ClockConfig+0x1cc>)
+ 8003a08:	6013      	str	r3, [r2, #0]
 
   /* Configure the source of time base considering new system clocks settings*/
   HAL_InitTick(uwTickPrio);
- 8003a06:	4b09      	ldr	r3, [pc, #36]	; (8003a2c <HAL_RCC_ClockConfig+0x1d0>)
- 8003a08:	681b      	ldr	r3, [r3, #0]
- 8003a0a:	4618      	mov	r0, r3
- 8003a0c:	f7fe f964 	bl	8001cd8 <HAL_InitTick>
+ 8003a0a:	4b09      	ldr	r3, [pc, #36]	; (8003a30 <HAL_RCC_ClockConfig+0x1d0>)
+ 8003a0c:	681b      	ldr	r3, [r3, #0]
+ 8003a0e:	4618      	mov	r0, r3
+ 8003a10:	f7fe f962 	bl	8001cd8 <HAL_InitTick>
 
   return HAL_OK;
- 8003a10:	2300      	movs	r3, #0
+ 8003a14:	2300      	movs	r3, #0
 }
- 8003a12:	4618      	mov	r0, r3
- 8003a14:	3710      	adds	r7, #16
- 8003a16:	46bd      	mov	sp, r7
- 8003a18:	bd80      	pop	{r7, pc}
- 8003a1a:	bf00      	nop
- 8003a1c:	40022000 	.word	0x40022000
- 8003a20:	40021000 	.word	0x40021000
- 8003a24:	0800a764 	.word	0x0800a764
- 8003a28:	20000000 	.word	0x20000000
- 8003a2c:	20000004 	.word	0x20000004
+ 8003a16:	4618      	mov	r0, r3
+ 8003a18:	3710      	adds	r7, #16
+ 8003a1a:	46bd      	mov	sp, r7
+ 8003a1c:	bd80      	pop	{r7, pc}
+ 8003a1e:	bf00      	nop
+ 8003a20:	40022000 	.word	0x40022000
+ 8003a24:	40021000 	.word	0x40021000
+ 8003a28:	0800a754 	.word	0x0800a754
+ 8003a2c:	20000000 	.word	0x20000000
+ 8003a30:	20000004 	.word	0x20000004
 
-08003a30 <HAL_RCC_GetSysClockFreq>:
+08003a34 <HAL_RCC_GetSysClockFreq>:
   *         right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
   *
   * @retval SYSCLK frequency
   */
 uint32_t HAL_RCC_GetSysClockFreq(void)
 {
- 8003a30:	b490      	push	{r4, r7}
- 8003a32:	b08a      	sub	sp, #40	; 0x28
- 8003a34:	af00      	add	r7, sp, #0
+ 8003a34:	b490      	push	{r4, r7}
+ 8003a36:	b08a      	sub	sp, #40	; 0x28
+ 8003a38:	af00      	add	r7, sp, #0
 #if defined(RCC_CFGR2_PREDIV1SRC)
   const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13};
   const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
 #else
   const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
- 8003a36:	4b2a      	ldr	r3, [pc, #168]	; (8003ae0 <HAL_RCC_GetSysClockFreq+0xb0>)
- 8003a38:	1d3c      	adds	r4, r7, #4
- 8003a3a:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
- 8003a3c:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
+ 8003a3a:	4b29      	ldr	r3, [pc, #164]	; (8003ae0 <HAL_RCC_GetSysClockFreq+0xac>)
+ 8003a3c:	1d3c      	adds	r4, r7, #4
+ 8003a3e:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
+ 8003a40:	e884 000f 	stmia.w	r4, {r0, r1, r2, r3}
 #if defined(RCC_CFGR2_PREDIV1)
   const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
 #else
   const uint8_t aPredivFactorTable[2] = {1, 2};
- 8003a40:	f240 2301 	movw	r3, #513	; 0x201
- 8003a44:	803b      	strh	r3, [r7, #0]
+ 8003a44:	f240 2301 	movw	r3, #513	; 0x201
+ 8003a48:	803b      	strh	r3, [r7, #0]
 #endif /*RCC_CFGR2_PREDIV1*/
 
 #endif
   uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
- 8003a46:	2300      	movs	r3, #0
- 8003a48:	61fb      	str	r3, [r7, #28]
  8003a4a:	2300      	movs	r3, #0
- 8003a4c:	61bb      	str	r3, [r7, #24]
+ 8003a4c:	61fb      	str	r3, [r7, #28]
  8003a4e:	2300      	movs	r3, #0
- 8003a50:	627b      	str	r3, [r7, #36]	; 0x24
+ 8003a50:	61bb      	str	r3, [r7, #24]
  8003a52:	2300      	movs	r3, #0
- 8003a54:	617b      	str	r3, [r7, #20]
-  uint32_t sysclockfreq = 0U;
+ 8003a54:	627b      	str	r3, [r7, #36]	; 0x24
  8003a56:	2300      	movs	r3, #0
- 8003a58:	623b      	str	r3, [r7, #32]
+ 8003a58:	617b      	str	r3, [r7, #20]
+  uint32_t sysclockfreq = 0U;
+ 8003a5a:	2300      	movs	r3, #0
+ 8003a5c:	623b      	str	r3, [r7, #32]
 #if defined(RCC_CFGR2_PREDIV1SRC)
   uint32_t prediv2 = 0U, pll2mul = 0U;
 #endif /*RCC_CFGR2_PREDIV1SRC*/
 
   tmpreg = RCC->CFGR;
- 8003a5a:	4b22      	ldr	r3, [pc, #136]	; (8003ae4 <HAL_RCC_GetSysClockFreq+0xb4>)
- 8003a5c:	685b      	ldr	r3, [r3, #4]
- 8003a5e:	61fb      	str	r3, [r7, #28]
+ 8003a5e:	4b21      	ldr	r3, [pc, #132]	; (8003ae4 <HAL_RCC_GetSysClockFreq+0xb0>)
+ 8003a60:	685b      	ldr	r3, [r3, #4]
+ 8003a62:	61fb      	str	r3, [r7, #28]
 
   /* Get SYSCLK source -------------------------------------------------------*/
   switch (tmpreg & RCC_CFGR_SWS)
- 8003a60:	69fb      	ldr	r3, [r7, #28]
- 8003a62:	f003 030c 	and.w	r3, r3, #12
- 8003a66:	2b04      	cmp	r3, #4
- 8003a68:	d002      	beq.n	8003a70 <HAL_RCC_GetSysClockFreq+0x40>
- 8003a6a:	2b08      	cmp	r3, #8
- 8003a6c:	d003      	beq.n	8003a76 <HAL_RCC_GetSysClockFreq+0x46>
- 8003a6e:	e02d      	b.n	8003acc <HAL_RCC_GetSysClockFreq+0x9c>
+ 8003a64:	69fb      	ldr	r3, [r7, #28]
+ 8003a66:	f003 030c 	and.w	r3, r3, #12
+ 8003a6a:	2b04      	cmp	r3, #4
+ 8003a6c:	d002      	beq.n	8003a74 <HAL_RCC_GetSysClockFreq+0x40>
+ 8003a6e:	2b08      	cmp	r3, #8
+ 8003a70:	d003      	beq.n	8003a7a <HAL_RCC_GetSysClockFreq+0x46>
+ 8003a72:	e02b      	b.n	8003acc <HAL_RCC_GetSysClockFreq+0x98>
   {
     case RCC_SYSCLKSOURCE_STATUS_HSE:  /* HSE used as system clock */
     {
       sysclockfreq = HSE_VALUE;
- 8003a70:	4b1d      	ldr	r3, [pc, #116]	; (8003ae8 <HAL_RCC_GetSysClockFreq+0xb8>)
- 8003a72:	623b      	str	r3, [r7, #32]
+ 8003a74:	4b1c      	ldr	r3, [pc, #112]	; (8003ae8 <HAL_RCC_GetSysClockFreq+0xb4>)
+ 8003a76:	623b      	str	r3, [r7, #32]
       break;
- 8003a74:	e02d      	b.n	8003ad2 <HAL_RCC_GetSysClockFreq+0xa2>
+ 8003a78:	e02b      	b.n	8003ad2 <HAL_RCC_GetSysClockFreq+0x9e>
     }
     case RCC_SYSCLKSOURCE_STATUS_PLLCLK:  /* PLL used as system clock */
     {
       pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
- 8003a76:	69fb      	ldr	r3, [r7, #28]
- 8003a78:	0c9b      	lsrs	r3, r3, #18
- 8003a7a:	f003 030f 	and.w	r3, r3, #15
- 8003a7e:	f107 0228 	add.w	r2, r7, #40	; 0x28
- 8003a82:	4413      	add	r3, r2
- 8003a84:	f813 3c24 	ldrb.w	r3, [r3, #-36]
- 8003a88:	617b      	str	r3, [r7, #20]
+ 8003a7a:	69fb      	ldr	r3, [r7, #28]
+ 8003a7c:	0c9b      	lsrs	r3, r3, #18
+ 8003a7e:	f003 030f 	and.w	r3, r3, #15
+ 8003a82:	3328      	adds	r3, #40	; 0x28
+ 8003a84:	443b      	add	r3, r7
+ 8003a86:	f813 3c24 	ldrb.w	r3, [r3, #-36]
+ 8003a8a:	617b      	str	r3, [r7, #20]
       if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
- 8003a8a:	69fb      	ldr	r3, [r7, #28]
- 8003a8c:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
- 8003a90:	2b00      	cmp	r3, #0
- 8003a92:	d013      	beq.n	8003abc <HAL_RCC_GetSysClockFreq+0x8c>
+ 8003a8c:	69fb      	ldr	r3, [r7, #28]
+ 8003a8e:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
+ 8003a92:	2b00      	cmp	r3, #0
+ 8003a94:	d012      	beq.n	8003abc <HAL_RCC_GetSysClockFreq+0x88>
       {
 #if defined(RCC_CFGR2_PREDIV1)
         prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
 #else
         prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
- 8003a94:	4b13      	ldr	r3, [pc, #76]	; (8003ae4 <HAL_RCC_GetSysClockFreq+0xb4>)
- 8003a96:	685b      	ldr	r3, [r3, #4]
- 8003a98:	0c5b      	lsrs	r3, r3, #17
- 8003a9a:	f003 0301 	and.w	r3, r3, #1
- 8003a9e:	f107 0228 	add.w	r2, r7, #40	; 0x28
- 8003aa2:	4413      	add	r3, r2
+ 8003a96:	4b13      	ldr	r3, [pc, #76]	; (8003ae4 <HAL_RCC_GetSysClockFreq+0xb0>)
+ 8003a98:	685b      	ldr	r3, [r3, #4]
+ 8003a9a:	0c5b      	lsrs	r3, r3, #17
+ 8003a9c:	f003 0301 	and.w	r3, r3, #1
+ 8003aa0:	3328      	adds	r3, #40	; 0x28
+ 8003aa2:	443b      	add	r3, r7
  8003aa4:	f813 3c28 	ldrb.w	r3, [r3, #-40]
  8003aa8:	61bb      	str	r3, [r7, #24]
         {
@@ -8843,12 +8851,12 @@ uint32_t HAL_RCC_GetSysClockFreq(void)
         /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
         pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
  8003aaa:	697b      	ldr	r3, [r7, #20]
- 8003aac:	4a0e      	ldr	r2, [pc, #56]	; (8003ae8 <HAL_RCC_GetSysClockFreq+0xb8>)
- 8003aae:	fb02 f203 	mul.w	r2, r2, r3
+ 8003aac:	4a0e      	ldr	r2, [pc, #56]	; (8003ae8 <HAL_RCC_GetSysClockFreq+0xb4>)
+ 8003aae:	fb03 f202 	mul.w	r2, r3, r2
  8003ab2:	69bb      	ldr	r3, [r7, #24]
  8003ab4:	fbb2 f3f3 	udiv	r3, r2, r3
  8003ab8:	627b      	str	r3, [r7, #36]	; 0x24
- 8003aba:	e004      	b.n	8003ac6 <HAL_RCC_GetSysClockFreq+0x96>
+ 8003aba:	e004      	b.n	8003ac6 <HAL_RCC_GetSysClockFreq+0x92>
 #endif /*RCC_CFGR2_PREDIV1SRC*/
       }
       else
@@ -8856,7 +8864,7 @@ uint32_t HAL_RCC_GetSysClockFreq(void)
         /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
         pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
  8003abc:	697b      	ldr	r3, [r7, #20]
- 8003abe:	4a0b      	ldr	r2, [pc, #44]	; (8003aec <HAL_RCC_GetSysClockFreq+0xbc>)
+ 8003abe:	4a0b      	ldr	r2, [pc, #44]	; (8003aec <HAL_RCC_GetSysClockFreq+0xb8>)
  8003ac0:	fb02 f303 	mul.w	r3, r2, r3
  8003ac4:	627b      	str	r3, [r7, #36]	; 0x24
       }
@@ -8864,13 +8872,13 @@ uint32_t HAL_RCC_GetSysClockFreq(void)
  8003ac6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
  8003ac8:	623b      	str	r3, [r7, #32]
       break;
- 8003aca:	e002      	b.n	8003ad2 <HAL_RCC_GetSysClockFreq+0xa2>
+ 8003aca:	e002      	b.n	8003ad2 <HAL_RCC_GetSysClockFreq+0x9e>
     }
     case RCC_SYSCLKSOURCE_STATUS_HSI:  /* HSI used as system clock source */
     default: /* HSI used as system clock */
     {
       sysclockfreq = HSI_VALUE;
- 8003acc:	4b06      	ldr	r3, [pc, #24]	; (8003ae8 <HAL_RCC_GetSysClockFreq+0xb8>)
+ 8003acc:	4b06      	ldr	r3, [pc, #24]	; (8003ae8 <HAL_RCC_GetSysClockFreq+0xb4>)
  8003ace:	623b      	str	r3, [r7, #32]
       break;
  8003ad0:	bf00      	nop
@@ -8885,7 +8893,7 @@ uint32_t HAL_RCC_GetSysClockFreq(void)
  8003ada:	bc90      	pop	{r4, r7}
  8003adc:	4770      	bx	lr
  8003ade:	bf00      	nop
- 8003ae0:	0800a660 	.word	0x0800a660
+ 8003ae0:	0800a650 	.word	0x0800a650
  8003ae4:	40021000 	.word	0x40021000
  8003ae8:	007a1200 	.word	0x007a1200
  8003aec:	003d0900 	.word	0x003d0900
@@ -8933,7 +8941,7 @@ uint32_t HAL_RCC_GetPCLK1Freq(void)
  8003b20:	4618      	mov	r0, r3
  8003b22:	bd80      	pop	{r7, pc}
  8003b24:	40021000 	.word	0x40021000
- 8003b28:	0800a774 	.word	0x0800a774
+ 8003b28:	0800a764 	.word	0x0800a764
 
 08003b2c <RCC_Delay>:
   * @brief  This function provides delay (in milliseconds) based on CPU cycles method.
@@ -10096,7 +10104,7 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
 #else
       HAL_TIM_PeriodElapsedCallback(htim);
  80041a6:	6878      	ldr	r0, [r7, #4]
- 80041a8:	f002 fc76 	bl	8006a98 <HAL_TIM_PeriodElapsedCallback>
+ 80041a8:	f002 fc70 	bl	8006a8c <HAL_TIM_PeriodElapsedCallback>
 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
     }
   }
@@ -10227,6 +10235,8 @@ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
  8004252:	68fb      	ldr	r3, [r7, #12]
  8004254:	2201      	movs	r2, #1
  8004256:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
+
+  switch (Channel)
  800425a:	687b      	ldr	r3, [r7, #4]
  800425c:	2b0c      	cmp	r3, #12
  800425e:	f200 809f 	bhi.w	80043a0 <HAL_TIM_PWM_ConfigChannel+0x168>
@@ -12521,7 +12531,7 @@ void LCD_Scan_Dir(uint8_t dir)
 		switch(dir)//方向转换
  8004ea2:	79fb      	ldrb	r3, [r7, #7]
  8004ea4:	2b07      	cmp	r3, #7
- 8004ea6:	d82c      	bhi.n	8004f02 <LCD_Scan_Dir+0x86>
+ 8004ea6:	d82b      	bhi.n	8004f00 <LCD_Scan_Dir+0x84>
  8004ea8:	a201      	add	r2, pc, #4	; (adr r2, 8004eb0 <LCD_Scan_Dir+0x34>)
  8004eaa:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
  8004eae:	bf00      	nop
@@ -12537,61 +12547,61 @@ void LCD_Scan_Dir(uint8_t dir)
 			case 0:dir=6;break;
  8004ed0:	2306      	movs	r3, #6
  8004ed2:	71fb      	strb	r3, [r7, #7]
- 8004ed4:	e015      	b.n	8004f02 <LCD_Scan_Dir+0x86>
+ 8004ed4:	e014      	b.n	8004f00 <LCD_Scan_Dir+0x84>
 			case 1:dir=7;break;
  8004ed6:	2307      	movs	r3, #7
  8004ed8:	71fb      	strb	r3, [r7, #7]
- 8004eda:	e012      	b.n	8004f02 <LCD_Scan_Dir+0x86>
+ 8004eda:	e011      	b.n	8004f00 <LCD_Scan_Dir+0x84>
 			case 2:dir=4;break;
  8004edc:	2304      	movs	r3, #4
  8004ede:	71fb      	strb	r3, [r7, #7]
- 8004ee0:	e00f      	b.n	8004f02 <LCD_Scan_Dir+0x86>
+ 8004ee0:	e00e      	b.n	8004f00 <LCD_Scan_Dir+0x84>
 			case 3:dir=5;break;
  8004ee2:	2305      	movs	r3, #5
  8004ee4:	71fb      	strb	r3, [r7, #7]
- 8004ee6:	e00c      	b.n	8004f02 <LCD_Scan_Dir+0x86>
+ 8004ee6:	e00b      	b.n	8004f00 <LCD_Scan_Dir+0x84>
 			case 4:dir=1;break;
  8004ee8:	2301      	movs	r3, #1
  8004eea:	71fb      	strb	r3, [r7, #7]
- 8004eec:	e009      	b.n	8004f02 <LCD_Scan_Dir+0x86>
+ 8004eec:	e008      	b.n	8004f00 <LCD_Scan_Dir+0x84>
 			case 5:dir=0;break;
  8004eee:	2300      	movs	r3, #0
  8004ef0:	71fb      	strb	r3, [r7, #7]
- 8004ef2:	e006      	b.n	8004f02 <LCD_Scan_Dir+0x86>
+ 8004ef2:	e005      	b.n	8004f00 <LCD_Scan_Dir+0x84>
 			case 6:dir=3;break;
  8004ef4:	2303      	movs	r3, #3
  8004ef6:	71fb      	strb	r3, [r7, #7]
- 8004ef8:	e003      	b.n	8004f02 <LCD_Scan_Dir+0x86>
+ 8004ef8:	e002      	b.n	8004f00 <LCD_Scan_Dir+0x84>
 			case 7:dir=2;break;
  8004efa:	2302      	movs	r3, #2
  8004efc:	71fb      	strb	r3, [r7, #7]
- 8004efe:	e000      	b.n	8004f02 <LCD_Scan_Dir+0x86>
+ 8004efe:	bf00      	nop
 		}
 	}
- 8004f00:	bf00      	nop
 	if(lcddev.id==0x9341||lcddev.id==0X6804||lcddev.id==0X5310)//9341/6804/5310,很特殊
- 8004f02:	4b8b      	ldr	r3, [pc, #556]	; (8005130 <LCD_Scan_Dir+0x2b4>)
- 8004f04:	889b      	ldrh	r3, [r3, #4]
- 8004f06:	f249 3241 	movw	r2, #37697	; 0x9341
- 8004f0a:	4293      	cmp	r3, r2
- 8004f0c:	d00c      	beq.n	8004f28 <LCD_Scan_Dir+0xac>
- 8004f0e:	4b88      	ldr	r3, [pc, #544]	; (8005130 <LCD_Scan_Dir+0x2b4>)
- 8004f10:	889b      	ldrh	r3, [r3, #4]
- 8004f12:	f646 0204 	movw	r2, #26628	; 0x6804
- 8004f16:	4293      	cmp	r3, r2
- 8004f18:	d006      	beq.n	8004f28 <LCD_Scan_Dir+0xac>
- 8004f1a:	4b85      	ldr	r3, [pc, #532]	; (8005130 <LCD_Scan_Dir+0x2b4>)
- 8004f1c:	889b      	ldrh	r3, [r3, #4]
- 8004f1e:	f245 3210 	movw	r2, #21264	; 0x5310
- 8004f22:	4293      	cmp	r3, r2
- 8004f24:	f040 80bb 	bne.w	800509e <LCD_Scan_Dir+0x222>
+ 8004f00:	4b8b      	ldr	r3, [pc, #556]	; (8005130 <LCD_Scan_Dir+0x2b4>)
+ 8004f02:	889b      	ldrh	r3, [r3, #4]
+ 8004f04:	f249 3241 	movw	r2, #37697	; 0x9341
+ 8004f08:	4293      	cmp	r3, r2
+ 8004f0a:	d00c      	beq.n	8004f26 <LCD_Scan_Dir+0xaa>
+ 8004f0c:	4b88      	ldr	r3, [pc, #544]	; (8005130 <LCD_Scan_Dir+0x2b4>)
+ 8004f0e:	889b      	ldrh	r3, [r3, #4]
+ 8004f10:	f646 0204 	movw	r2, #26628	; 0x6804
+ 8004f14:	4293      	cmp	r3, r2
+ 8004f16:	d006      	beq.n	8004f26 <LCD_Scan_Dir+0xaa>
+ 8004f18:	4b85      	ldr	r3, [pc, #532]	; (8005130 <LCD_Scan_Dir+0x2b4>)
+ 8004f1a:	889b      	ldrh	r3, [r3, #4]
+ 8004f1c:	f245 3210 	movw	r2, #21264	; 0x5310
+ 8004f20:	4293      	cmp	r3, r2
+ 8004f22:	f040 80bc 	bne.w	800509e <LCD_Scan_Dir+0x222>
 	{
 		switch(dir)
- 8004f28:	79fb      	ldrb	r3, [r7, #7]
- 8004f2a:	2b07      	cmp	r3, #7
- 8004f2c:	d835      	bhi.n	8004f9a <LCD_Scan_Dir+0x11e>
- 8004f2e:	a201      	add	r2, pc, #4	; (adr r2, 8004f34 <LCD_Scan_Dir+0xb8>)
- 8004f30:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 8004f26:	79fb      	ldrb	r3, [r7, #7]
+ 8004f28:	2b07      	cmp	r3, #7
+ 8004f2a:	d836      	bhi.n	8004f9a <LCD_Scan_Dir+0x11e>
+ 8004f2c:	a201      	add	r2, pc, #4	; (adr r2, 8004f34 <LCD_Scan_Dir+0xb8>)
+ 8004f2e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 8004f32:	bf00      	nop
  8004f34:	08004f9b 	.word	0x08004f9b
  8004f38:	08004f55 	.word	0x08004f55
  8004f3c:	08004f5f 	.word	0x08004f5f
@@ -12883,7 +12893,7 @@ void LCD_Scan_Dir(uint8_t dir)
  8005128:	f043 0340 	orr.w	r3, r3, #64	; 0x40
  800512c:	81fb      	strh	r3, [r7, #14]
  800512e:	e007      	b.n	8005140 <LCD_Scan_Dir+0x2c4>
- 8005130:	200003b4 	.word	0x200003b4
+ 8005130:	20000380 	.word	0x20000380
 	 	}else//其他驱动IC
 		{
 			dirreg=0X03;
@@ -13152,7 +13162,7 @@ void LCD_Display_Dir(uint8_t dir)
  80052da:	46bd      	mov	sp, r7
  80052dc:	bd80      	pop	{r7, pc}
  80052de:	bf00      	nop
- 80052e0:	200003b4 	.word	0x200003b4
+ 80052e0:	20000380 	.word	0x20000380
 
 080052e4 <LCDx_Init>:
 
@@ -13407,7 +13417,7 @@ void LCDx_Init(void)
 }
  80054c4:	bf00      	nop
  80054c6:	bd80      	pop	{r7, pc}
- 80054c8:	200003b4 	.word	0x200003b4
+ 80054c8:	20000380 	.word	0x20000380
  80054cc:	40010c00 	.word	0x40010c00
 
 080054d0 <LCD_SetCursor>:
@@ -13569,7 +13579,7 @@ void LCD_SetCursor(uint16_t Xpos, uint16_t Ypos)
  80055e6:	3708      	adds	r7, #8
  80055e8:	46bd      	mov	sp, r7
  80055ea:	bd80      	pop	{r7, pc}
- 80055ec:	200003b4 	.word	0x200003b4
+ 80055ec:	20000380 	.word	0x20000380
 
 080055f0 <LCD_set_dot>:
 }
@@ -13608,7 +13618,7 @@ void LCD_set_dot(uint16_t x,uint16_t y,uint16_t color)
  8005622:	3708      	adds	r7, #8
  8005624:	46bd      	mov	sp, r7
  8005626:	bd80      	pop	{r7, pc}
- 8005628:	200003b4 	.word	0x200003b4
+ 8005628:	20000380 	.word	0x20000380
  800562c:	6c000800 	.word	0x6c000800
 
 08005630 <LCD_Clear>:
@@ -13710,7 +13720,7 @@ void LCD_Clear(uint16_t color)
  80056c6:	3710      	adds	r7, #16
  80056c8:	46bd      	mov	sp, r7
  80056ca:	bd80      	pop	{r7, pc}
- 80056cc:	200003b4 	.word	0x200003b4
+ 80056cc:	20000380 	.word	0x20000380
  80056d0:	6c000800 	.word	0x6c000800
 
 080056d4 <LCD_DrawLine>:
@@ -14230,9 +14240,9 @@ void LCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint16_t bg,uin
  8005a1a:	3714      	adds	r7, #20
  8005a1c:	46bd      	mov	sp, r7
  8005a1e:	bd90      	pop	{r4, r7, pc}
- 8005a20:	0800a77c 	.word	0x0800a77c
- 8005a24:	0800abf0 	.word	0x0800abf0
- 8005a28:	200003b4 	.word	0x200003b4
+ 8005a20:	0800a76c 	.word	0x0800a76c
+ 8005a24:	0800abe0 	.word	0x0800abe0
+ 8005a28:	20000380 	.word	0x20000380
 
 08005a2c <LCD_ShowString>:
 //width,height:区域大小
@@ -14317,7 +14327,7 @@ void LCD_ShowString(uint16_t x,uint16_t y,uint8_t *p,uint8_t size,uint16_t bg,ui
  8005a9e:	3714      	adds	r7, #20
  8005aa0:	46bd      	mov	sp, r7
  8005aa2:	bd90      	pop	{r4, r7, pc}
- 8005aa4:	200003b4 	.word	0x200003b4
+ 8005aa4:	20000380 	.word	0x20000380
 
 08005aa8 <play_ones>:
 #include "buzzer.h"
@@ -14394,7 +14404,7 @@ void add_a_note(uint16_t freq,uint8_t duty,uint16_t deley)//
 struct notes* buff;
 buff = (struct notes*)malloc(sizeof(struct notes));
  8005b2a:	200c      	movs	r0, #12
- 8005b2c:	f001 fee2 	bl	80078f4 <malloc>
+ 8005b2c:	f001 ff0c 	bl	8007948 <malloc>
  8005b30:	4603      	mov	r3, r0
  8005b32:	60bb      	str	r3, [r7, #8]
 if (buff != NULL)
@@ -14461,7 +14471,7 @@ t->next_note = buff;
  8005b82:	46bd      	mov	sp, r7
  8005b84:	bd80      	pop	{r7, pc}
  8005b86:	bf00      	nop
- 8005b88:	200003c0 	.word	0x200003c0
+ 8005b88:	2000038c 	.word	0x2000038c
 
 08005b8c <delhead>:
 
@@ -14491,7 +14501,7 @@ free(notes);
  8005ba4:	4b0c      	ldr	r3, [pc, #48]	; (8005bd8 <delhead+0x4c>)
  8005ba6:	681b      	ldr	r3, [r3, #0]
  8005ba8:	4618      	mov	r0, r3
- 8005baa:	f001 feab 	bl	8007904 <free>
+ 8005baa:	f001 fed5 	bl	8007958 <free>
 notes = NULL;
  8005bae:	4b0a      	ldr	r3, [pc, #40]	; (8005bd8 <delhead+0x4c>)
  8005bb0:	2200      	movs	r2, #0
@@ -14512,7 +14522,7 @@ notes = notes->next_note;
  8005bc4:	6013      	str	r3, [r2, #0]
 free(t);
  8005bc6:	6878      	ldr	r0, [r7, #4]
- 8005bc8:	f001 fe9c 	bl	8007904 <free>
+ 8005bc8:	f001 fec6 	bl	8007958 <free>
  8005bcc:	e000      	b.n	8005bd0 <delhead+0x44>
 return;
  8005bce:	bf00      	nop
@@ -14526,7 +14536,7 @@ return;
  8005bd2:	46bd      	mov	sp, r7
  8005bd4:	bd80      	pop	{r7, pc}
  8005bd6:	bf00      	nop
- 8005bd8:	200003c0 	.word	0x200003c0
+ 8005bd8:	2000038c 	.word	0x2000038c
 
 08005bdc <buzzer_play_server>:
 
@@ -14609,9 +14619,9 @@ return busy_flag;
 }
  8005c40:	4618      	mov	r0, r3
  8005c42:	bd80      	pop	{r7, pc}
- 8005c44:	200003c0 	.word	0x200003c0
- 8005c48:	20000200 	.word	0x20000200
- 8005c4c:	20000204 	.word	0x20000204
+ 8005c44:	2000038c 	.word	0x2000038c
+ 8005c48:	20000390 	.word	0x20000390
+ 8005c4c:	20000394 	.word	0x20000394
 
 08005c50 <EPPROM_SLOWWRITE_INIT>:
 //因为eeprom芯片的写入速度有限，每写入一个字符都需要等待一段时间才能完成写入
@@ -14649,7 +14659,7 @@ void EPPROM_SLOWWRITE_INIT()								  //
  8005c7a:	bc80      	pop	{r7}
  8005c7c:	4770      	bx	lr
  8005c7e:	bf00      	nop
- 8005c80:	200003c4 	.word	0x200003c4
+ 8005c80:	20000398 	.word	0x20000398
 
 08005c84 <EEPROM_SLOWWRITE_SERVER>:
 
@@ -14729,7 +14739,7 @@ void EEPROM_SLOWWRITE_SERVER()
  8005cf4:	4b05      	ldr	r3, [pc, #20]	; (8005d0c <EEPROM_SLOWWRITE_SERVER+0x88>)
  8005cf6:	685b      	ldr	r3, [r3, #4]
  8005cf8:	4618      	mov	r0, r3
- 8005cfa:	f001 fe03 	bl	8007904 <free>
+ 8005cfa:	f001 fe2d 	bl	8007958 <free>
 				eeprom_write_buffer.head=buff;
  8005cfe:	4a03      	ldr	r2, [pc, #12]	; (8005d0c <EEPROM_SLOWWRITE_SERVER+0x88>)
  8005d00:	687b      	ldr	r3, [r7, #4]
@@ -14739,7 +14749,7 @@ void EEPROM_SLOWWRITE_SERVER()
  8005d06:	3708      	adds	r7, #8
  8005d08:	46bd      	mov	sp, r7
  8005d0a:	bd80      	pop	{r7, pc}
- 8005d0c:	200003c4 	.word	0x200003c4
+ 8005d0c:	20000398 	.word	0x20000398
 
 08005d10 <EEPROM_READ_BATY>:
 
@@ -14791,7 +14801,7 @@ void EEPROM_WRITE_BATY(uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG)
 	{
 		buff =(eeprom_write_buff*)malloc(sizeof(eeprom_write_buff));
  8005d4a:	2008      	movs	r0, #8
- 8005d4c:	f001 fdd2 	bl	80078f4 <malloc>
+ 8005d4c:	f001 fdfc 	bl	8007948 <malloc>
  8005d50:	4603      	mov	r3, r0
  8005d52:	613b      	str	r3, [r7, #16]
 		if(buff!=NULL)
@@ -14868,7 +14878,7 @@ void EEPROM_WRITE_BATY(uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG)
  8005db6:	46bd      	mov	sp, r7
  8005db8:	bd80      	pop	{r7, pc}
  8005dba:	bf00      	nop
- 8005dbc:	200003c4 	.word	0x200003c4
+ 8005dbc:	20000398 	.word	0x20000398
 
 08005dc0 <IIC_SAND_DATE>:
 
@@ -14906,7 +14916,7 @@ void IIC_SAND_DATE(uint16_t DEVICE_ADD,uint16_t IN_DEVICE_ADD,char *DATAS,uint16
  8005df2:	46bd      	mov	sp, r7
  8005df4:	bd80      	pop	{r7, pc}
  8005df6:	bf00      	nop
- 8005df8:	20000274 	.word	0x20000274
+ 8005df8:	200001f0 	.word	0x200001f0
 
 08005dfc <IIC_READ_DATE>:
 
@@ -14941,7 +14951,7 @@ void IIC_READ_DATE(uint16_t DEVICE_ADD,uint16_t IN_DEVICE_ADD,char *DATAS,uint16
  8005e2e:	46bd      	mov	sp, r7
  8005e30:	bd80      	pop	{r7, pc}
  8005e32:	bf00      	nop
- 8005e34:	20000274 	.word	0x20000274
+ 8005e34:	200001f0 	.word	0x200001f0
 
 08005e38 <GEI_BUTTON_CODE>:
 #include "key.h"
@@ -15281,7 +15291,7 @@ uint16_t TP_Read_XOY(uint8_t xy)
 	for(i=0;i<READ_TIMES;i++)buf[i]=TP_Read_AD(xy);
  8006032:	2300      	movs	r3, #0
  8006034:	83fb      	strh	r3, [r7, #30]
- 8006036:	e00f      	b.n	8006058 <TP_Read_XOY+0x34>
+ 8006036:	e00e      	b.n	8006056 <TP_Read_XOY+0x32>
  8006038:	8bfc      	ldrh	r4, [r7, #30]
  800603a:	79fb      	ldrb	r3, [r7, #7]
  800603c:	4618      	mov	r0, r3
@@ -15289,8499 +15299,8555 @@ uint16_t TP_Read_XOY(uint8_t xy)
  8006042:	4603      	mov	r3, r0
  8006044:	461a      	mov	r2, r3
  8006046:	0063      	lsls	r3, r4, #1
- 8006048:	f107 0120 	add.w	r1, r7, #32
- 800604c:	440b      	add	r3, r1
- 800604e:	f823 2c14 	strh.w	r2, [r3, #-20]
- 8006052:	8bfb      	ldrh	r3, [r7, #30]
- 8006054:	3301      	adds	r3, #1
- 8006056:	83fb      	strh	r3, [r7, #30]
- 8006058:	8bfb      	ldrh	r3, [r7, #30]
- 800605a:	2b04      	cmp	r3, #4
- 800605c:	d9ec      	bls.n	8006038 <TP_Read_XOY+0x14>
+ 8006048:	3320      	adds	r3, #32
+ 800604a:	443b      	add	r3, r7
+ 800604c:	f823 2c14 	strh.w	r2, [r3, #-20]
+ 8006050:	8bfb      	ldrh	r3, [r7, #30]
+ 8006052:	3301      	adds	r3, #1
+ 8006054:	83fb      	strh	r3, [r7, #30]
+ 8006056:	8bfb      	ldrh	r3, [r7, #30]
+ 8006058:	2b04      	cmp	r3, #4
+ 800605a:	d9ed      	bls.n	8006038 <TP_Read_XOY+0x14>
 	for(i=0;i<READ_TIMES-1; i++)//排序
- 800605e:	2300      	movs	r3, #0
- 8006060:	83fb      	strh	r3, [r7, #30]
- 8006062:	e03b      	b.n	80060dc <TP_Read_XOY+0xb8>
+ 800605c:	2300      	movs	r3, #0
+ 800605e:	83fb      	strh	r3, [r7, #30]
+ 8006060:	e035      	b.n	80060ce <TP_Read_XOY+0xaa>
 	{
 		for(j=i+1;j<READ_TIMES;j++)
- 8006064:	8bfb      	ldrh	r3, [r7, #30]
- 8006066:	3301      	adds	r3, #1
- 8006068:	83bb      	strh	r3, [r7, #28]
- 800606a:	e031      	b.n	80060d0 <TP_Read_XOY+0xac>
+ 8006062:	8bfb      	ldrh	r3, [r7, #30]
+ 8006064:	3301      	adds	r3, #1
+ 8006066:	83bb      	strh	r3, [r7, #28]
+ 8006068:	e02b      	b.n	80060c2 <TP_Read_XOY+0x9e>
 		{
 			if(buf[i]>buf[j])//升序排列
- 800606c:	8bfb      	ldrh	r3, [r7, #30]
- 800606e:	005b      	lsls	r3, r3, #1
- 8006070:	f107 0220 	add.w	r2, r7, #32
- 8006074:	4413      	add	r3, r2
- 8006076:	f833 2c14 	ldrh.w	r2, [r3, #-20]
- 800607a:	8bbb      	ldrh	r3, [r7, #28]
- 800607c:	005b      	lsls	r3, r3, #1
- 800607e:	f107 0120 	add.w	r1, r7, #32
- 8006082:	440b      	add	r3, r1
- 8006084:	f833 3c14 	ldrh.w	r3, [r3, #-20]
- 8006088:	429a      	cmp	r2, r3
- 800608a:	d91e      	bls.n	80060ca <TP_Read_XOY+0xa6>
+ 800606a:	8bfb      	ldrh	r3, [r7, #30]
+ 800606c:	005b      	lsls	r3, r3, #1
+ 800606e:	3320      	adds	r3, #32
+ 8006070:	443b      	add	r3, r7
+ 8006072:	f833 2c14 	ldrh.w	r2, [r3, #-20]
+ 8006076:	8bbb      	ldrh	r3, [r7, #28]
+ 8006078:	005b      	lsls	r3, r3, #1
+ 800607a:	3320      	adds	r3, #32
+ 800607c:	443b      	add	r3, r7
+ 800607e:	f833 3c14 	ldrh.w	r3, [r3, #-20]
+ 8006082:	429a      	cmp	r2, r3
+ 8006084:	d91a      	bls.n	80060bc <TP_Read_XOY+0x98>
 			{
 				temp=buf[i];
- 800608c:	8bfb      	ldrh	r3, [r7, #30]
- 800608e:	005b      	lsls	r3, r3, #1
- 8006090:	f107 0220 	add.w	r2, r7, #32
- 8006094:	4413      	add	r3, r2
- 8006096:	f833 3c14 	ldrh.w	r3, [r3, #-20]
- 800609a:	833b      	strh	r3, [r7, #24]
+ 8006086:	8bfb      	ldrh	r3, [r7, #30]
+ 8006088:	005b      	lsls	r3, r3, #1
+ 800608a:	3320      	adds	r3, #32
+ 800608c:	443b      	add	r3, r7
+ 800608e:	f833 3c14 	ldrh.w	r3, [r3, #-20]
+ 8006092:	833b      	strh	r3, [r7, #24]
 				buf[i]=buf[j];
- 800609c:	8bbb      	ldrh	r3, [r7, #28]
- 800609e:	8bfa      	ldrh	r2, [r7, #30]
- 80060a0:	005b      	lsls	r3, r3, #1
- 80060a2:	f107 0120 	add.w	r1, r7, #32
- 80060a6:	440b      	add	r3, r1
- 80060a8:	f833 1c14 	ldrh.w	r1, [r3, #-20]
- 80060ac:	0053      	lsls	r3, r2, #1
- 80060ae:	f107 0220 	add.w	r2, r7, #32
- 80060b2:	4413      	add	r3, r2
- 80060b4:	460a      	mov	r2, r1
- 80060b6:	f823 2c14 	strh.w	r2, [r3, #-20]
+ 8006094:	8bbb      	ldrh	r3, [r7, #28]
+ 8006096:	8bfa      	ldrh	r2, [r7, #30]
+ 8006098:	005b      	lsls	r3, r3, #1
+ 800609a:	3320      	adds	r3, #32
+ 800609c:	443b      	add	r3, r7
+ 800609e:	f833 1c14 	ldrh.w	r1, [r3, #-20]
+ 80060a2:	0053      	lsls	r3, r2, #1
+ 80060a4:	3320      	adds	r3, #32
+ 80060a6:	443b      	add	r3, r7
+ 80060a8:	460a      	mov	r2, r1
+ 80060aa:	f823 2c14 	strh.w	r2, [r3, #-20]
 				buf[j]=temp;
- 80060ba:	8bbb      	ldrh	r3, [r7, #28]
- 80060bc:	005b      	lsls	r3, r3, #1
- 80060be:	f107 0220 	add.w	r2, r7, #32
- 80060c2:	4413      	add	r3, r2
- 80060c4:	8b3a      	ldrh	r2, [r7, #24]
- 80060c6:	f823 2c14 	strh.w	r2, [r3, #-20]
+ 80060ae:	8bbb      	ldrh	r3, [r7, #28]
+ 80060b0:	005b      	lsls	r3, r3, #1
+ 80060b2:	3320      	adds	r3, #32
+ 80060b4:	443b      	add	r3, r7
+ 80060b6:	8b3a      	ldrh	r2, [r7, #24]
+ 80060b8:	f823 2c14 	strh.w	r2, [r3, #-20]
 		for(j=i+1;j<READ_TIMES;j++)
- 80060ca:	8bbb      	ldrh	r3, [r7, #28]
- 80060cc:	3301      	adds	r3, #1
- 80060ce:	83bb      	strh	r3, [r7, #28]
- 80060d0:	8bbb      	ldrh	r3, [r7, #28]
- 80060d2:	2b04      	cmp	r3, #4
- 80060d4:	d9ca      	bls.n	800606c <TP_Read_XOY+0x48>
+ 80060bc:	8bbb      	ldrh	r3, [r7, #28]
+ 80060be:	3301      	adds	r3, #1
+ 80060c0:	83bb      	strh	r3, [r7, #28]
+ 80060c2:	8bbb      	ldrh	r3, [r7, #28]
+ 80060c4:	2b04      	cmp	r3, #4
+ 80060c6:	d9d0      	bls.n	800606a <TP_Read_XOY+0x46>
 	for(i=0;i<READ_TIMES-1; i++)//排序
- 80060d6:	8bfb      	ldrh	r3, [r7, #30]
- 80060d8:	3301      	adds	r3, #1
- 80060da:	83fb      	strh	r3, [r7, #30]
- 80060dc:	8bfb      	ldrh	r3, [r7, #30]
- 80060de:	2b03      	cmp	r3, #3
- 80060e0:	d9c0      	bls.n	8006064 <TP_Read_XOY+0x40>
+ 80060c8:	8bfb      	ldrh	r3, [r7, #30]
+ 80060ca:	3301      	adds	r3, #1
+ 80060cc:	83fb      	strh	r3, [r7, #30]
+ 80060ce:	8bfb      	ldrh	r3, [r7, #30]
+ 80060d0:	2b03      	cmp	r3, #3
+ 80060d2:	d9c6      	bls.n	8006062 <TP_Read_XOY+0x3e>
 			}
 		}
 	}
 	sum=0;
- 80060e2:	2300      	movs	r3, #0
- 80060e4:	837b      	strh	r3, [r7, #26]
+ 80060d4:	2300      	movs	r3, #0
+ 80060d6:	837b      	strh	r3, [r7, #26]
 	for(i=LOST_VAL;i<READ_TIMES-LOST_VAL;i++)sum+=buf[i];
- 80060e6:	2301      	movs	r3, #1
- 80060e8:	83fb      	strh	r3, [r7, #30]
- 80060ea:	e00c      	b.n	8006106 <TP_Read_XOY+0xe2>
- 80060ec:	8bfb      	ldrh	r3, [r7, #30]
- 80060ee:	005b      	lsls	r3, r3, #1
- 80060f0:	f107 0220 	add.w	r2, r7, #32
- 80060f4:	4413      	add	r3, r2
- 80060f6:	f833 2c14 	ldrh.w	r2, [r3, #-20]
- 80060fa:	8b7b      	ldrh	r3, [r7, #26]
- 80060fc:	4413      	add	r3, r2
- 80060fe:	837b      	strh	r3, [r7, #26]
- 8006100:	8bfb      	ldrh	r3, [r7, #30]
- 8006102:	3301      	adds	r3, #1
- 8006104:	83fb      	strh	r3, [r7, #30]
- 8006106:	8bfb      	ldrh	r3, [r7, #30]
- 8006108:	2b03      	cmp	r3, #3
- 800610a:	d9ef      	bls.n	80060ec <TP_Read_XOY+0xc8>
+ 80060d8:	2301      	movs	r3, #1
+ 80060da:	83fb      	strh	r3, [r7, #30]
+ 80060dc:	e00b      	b.n	80060f6 <TP_Read_XOY+0xd2>
+ 80060de:	8bfb      	ldrh	r3, [r7, #30]
+ 80060e0:	005b      	lsls	r3, r3, #1
+ 80060e2:	3320      	adds	r3, #32
+ 80060e4:	443b      	add	r3, r7
+ 80060e6:	f833 2c14 	ldrh.w	r2, [r3, #-20]
+ 80060ea:	8b7b      	ldrh	r3, [r7, #26]
+ 80060ec:	4413      	add	r3, r2
+ 80060ee:	837b      	strh	r3, [r7, #26]
+ 80060f0:	8bfb      	ldrh	r3, [r7, #30]
+ 80060f2:	3301      	adds	r3, #1
+ 80060f4:	83fb      	strh	r3, [r7, #30]
+ 80060f6:	8bfb      	ldrh	r3, [r7, #30]
+ 80060f8:	2b03      	cmp	r3, #3
+ 80060fa:	d9f0      	bls.n	80060de <TP_Read_XOY+0xba>
 	temp=sum/(READ_TIMES-2*LOST_VAL);
- 800610c:	8b7b      	ldrh	r3, [r7, #26]
- 800610e:	4a05      	ldr	r2, [pc, #20]	; (8006124 <TP_Read_XOY+0x100>)
- 8006110:	fba2 2303 	umull	r2, r3, r2, r3
- 8006114:	085b      	lsrs	r3, r3, #1
- 8006116:	833b      	strh	r3, [r7, #24]
+ 80060fc:	8b7b      	ldrh	r3, [r7, #26]
+ 80060fe:	4a05      	ldr	r2, [pc, #20]	; (8006114 <TP_Read_XOY+0xf0>)
+ 8006100:	fba2 2303 	umull	r2, r3, r2, r3
+ 8006104:	085b      	lsrs	r3, r3, #1
+ 8006106:	833b      	strh	r3, [r7, #24]
 	return temp;
- 8006118:	8b3b      	ldrh	r3, [r7, #24]
+ 8006108:	8b3b      	ldrh	r3, [r7, #24]
 }
- 800611a:	4618      	mov	r0, r3
- 800611c:	3724      	adds	r7, #36	; 0x24
- 800611e:	46bd      	mov	sp, r7
- 8006120:	bd90      	pop	{r4, r7, pc}
- 8006122:	bf00      	nop
- 8006124:	aaaaaaab 	.word	0xaaaaaaab
+ 800610a:	4618      	mov	r0, r3
+ 800610c:	3724      	adds	r7, #36	; 0x24
+ 800610e:	46bd      	mov	sp, r7
+ 8006110:	bd90      	pop	{r4, r7, pc}
+ 8006112:	bf00      	nop
+ 8006114:	aaaaaaab 	.word	0xaaaaaaab
 
-08006128 <TP_Read_XY_ADC>:
+08006118 <TP_Read_XY_ADC>:
 
 //读取x,y坐标
 //x,y:读取到的坐标ADC值
 void TP_Read_XY_ADC(int16_t *x,int16_t *y)
 {
- 8006128:	b580      	push	{r7, lr}
- 800612a:	b084      	sub	sp, #16
- 800612c:	af00      	add	r7, sp, #0
- 800612e:	6078      	str	r0, [r7, #4]
- 8006130:	6039      	str	r1, [r7, #0]
+ 8006118:	b580      	push	{r7, lr}
+ 800611a:	b084      	sub	sp, #16
+ 800611c:	af00      	add	r7, sp, #0
+ 800611e:	6078      	str	r0, [r7, #4]
+ 8006120:	6039      	str	r1, [r7, #0]
 	int16_t xtemp,ytemp;
 	xtemp=TP_Read_XOY(CMD_RDX);
- 8006132:	2090      	movs	r0, #144	; 0x90
- 8006134:	f7ff ff76 	bl	8006024 <TP_Read_XOY>
- 8006138:	4603      	mov	r3, r0
- 800613a:	81fb      	strh	r3, [r7, #14]
+ 8006122:	2090      	movs	r0, #144	; 0x90
+ 8006124:	f7ff ff7e 	bl	8006024 <TP_Read_XOY>
+ 8006128:	4603      	mov	r3, r0
+ 800612a:	81fb      	strh	r3, [r7, #14]
 	ytemp=TP_Read_XOY(CMD_RDY);
- 800613c:	20d0      	movs	r0, #208	; 0xd0
- 800613e:	f7ff ff71 	bl	8006024 <TP_Read_XOY>
- 8006142:	4603      	mov	r3, r0
- 8006144:	81bb      	strh	r3, [r7, #12]
+ 800612c:	20d0      	movs	r0, #208	; 0xd0
+ 800612e:	f7ff ff79 	bl	8006024 <TP_Read_XOY>
+ 8006132:	4603      	mov	r3, r0
+ 8006134:	81bb      	strh	r3, [r7, #12]
 	*x=xtemp;
- 8006146:	687b      	ldr	r3, [r7, #4]
- 8006148:	89fa      	ldrh	r2, [r7, #14]
- 800614a:	801a      	strh	r2, [r3, #0]
+ 8006136:	687b      	ldr	r3, [r7, #4]
+ 8006138:	89fa      	ldrh	r2, [r7, #14]
+ 800613a:	801a      	strh	r2, [r3, #0]
 	*y=ytemp;
- 800614c:	683b      	ldr	r3, [r7, #0]
- 800614e:	89ba      	ldrh	r2, [r7, #12]
- 8006150:	801a      	strh	r2, [r3, #0]
+ 800613c:	683b      	ldr	r3, [r7, #0]
+ 800613e:	89ba      	ldrh	r2, [r7, #12]
+ 8006140:	801a      	strh	r2, [r3, #0]
 }
- 8006152:	bf00      	nop
- 8006154:	3710      	adds	r7, #16
- 8006156:	46bd      	mov	sp, r7
- 8006158:	bd80      	pop	{r7, pc}
+ 8006142:	bf00      	nop
+ 8006144:	3710      	adds	r7, #16
+ 8006146:	46bd      	mov	sp, r7
+ 8006148:	bd80      	pop	{r7, pc}
 
-0800615a <TP_Read_XY2>:
+0800614a <TP_Read_XY2>:
 //该函数能大大提高准确度
 //x,y:读取到的坐标值
 //返回值:0,失败;1,成功。
 #define ERR_RANGE 10 //误差范围
 uint8_t TP_Read_XY2(int16_t *x,int16_t *y)
 {
- 800615a:	b580      	push	{r7, lr}
- 800615c:	b084      	sub	sp, #16
- 800615e:	af00      	add	r7, sp, #0
- 8006160:	6078      	str	r0, [r7, #4]
- 8006162:	6039      	str	r1, [r7, #0]
+ 800614a:	b580      	push	{r7, lr}
+ 800614c:	b084      	sub	sp, #16
+ 800614e:	af00      	add	r7, sp, #0
+ 8006150:	6078      	str	r0, [r7, #4]
+ 8006152:	6039      	str	r1, [r7, #0]
 	int16_t x1,y1;
 	int16_t x2,y2;
 
     TP_Read_XY_ADC(&x1,&y1);
- 8006164:	f107 020c 	add.w	r2, r7, #12
- 8006168:	f107 030e 	add.w	r3, r7, #14
- 800616c:	4611      	mov	r1, r2
- 800616e:	4618      	mov	r0, r3
- 8006170:	f7ff ffda 	bl	8006128 <TP_Read_XY_ADC>
+ 8006154:	f107 020c 	add.w	r2, r7, #12
+ 8006158:	f107 030e 	add.w	r3, r7, #14
+ 800615c:	4611      	mov	r1, r2
+ 800615e:	4618      	mov	r0, r3
+ 8006160:	f7ff ffda 	bl	8006118 <TP_Read_XY_ADC>
 
     TP_Read_XY_ADC(&x2,&y2);
- 8006174:	f107 0208 	add.w	r2, r7, #8
- 8006178:	f107 030a 	add.w	r3, r7, #10
- 800617c:	4611      	mov	r1, r2
- 800617e:	4618      	mov	r0, r3
- 8006180:	f7ff ffd2 	bl	8006128 <TP_Read_XY_ADC>
+ 8006164:	f107 0208 	add.w	r2, r7, #8
+ 8006168:	f107 030a 	add.w	r3, r7, #10
+ 800616c:	4611      	mov	r1, r2
+ 800616e:	4618      	mov	r0, r3
+ 8006170:	f7ff ffd2 	bl	8006118 <TP_Read_XY_ADC>
 
     if(((x2<=x1&&x1<x2+ERR_RANGE)||(x1<=x2&&x2<x1+ERR_RANGE))//前后两次采样在+-50内
- 8006184:	f9b7 200a 	ldrsh.w	r2, [r7, #10]
- 8006188:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
- 800618c:	429a      	cmp	r2, r3
- 800618e:	dc06      	bgt.n	800619e <TP_Read_XY2+0x44>
- 8006190:	f9b7 300a 	ldrsh.w	r3, [r7, #10]
- 8006194:	3309      	adds	r3, #9
- 8006196:	f9b7 200e 	ldrsh.w	r2, [r7, #14]
- 800619a:	4293      	cmp	r3, r2
- 800619c:	da0c      	bge.n	80061b8 <TP_Read_XY2+0x5e>
- 800619e:	f9b7 200e 	ldrsh.w	r2, [r7, #14]
- 80061a2:	f9b7 300a 	ldrsh.w	r3, [r7, #10]
- 80061a6:	429a      	cmp	r2, r3
- 80061a8:	dc3a      	bgt.n	8006220 <TP_Read_XY2+0xc6>
- 80061aa:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
- 80061ae:	3309      	adds	r3, #9
- 80061b0:	f9b7 200a 	ldrsh.w	r2, [r7, #10]
- 80061b4:	4293      	cmp	r3, r2
- 80061b6:	db33      	blt.n	8006220 <TP_Read_XY2+0xc6>
+ 8006174:	f9b7 200a 	ldrsh.w	r2, [r7, #10]
+ 8006178:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
+ 800617c:	429a      	cmp	r2, r3
+ 800617e:	dc06      	bgt.n	800618e <TP_Read_XY2+0x44>
+ 8006180:	f9b7 300a 	ldrsh.w	r3, [r7, #10]
+ 8006184:	3309      	adds	r3, #9
+ 8006186:	f9b7 200e 	ldrsh.w	r2, [r7, #14]
+ 800618a:	4293      	cmp	r3, r2
+ 800618c:	da0c      	bge.n	80061a8 <TP_Read_XY2+0x5e>
+ 800618e:	f9b7 200e 	ldrsh.w	r2, [r7, #14]
+ 8006192:	f9b7 300a 	ldrsh.w	r3, [r7, #10]
+ 8006196:	429a      	cmp	r2, r3
+ 8006198:	dc3a      	bgt.n	8006210 <TP_Read_XY2+0xc6>
+ 800619a:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
+ 800619e:	3309      	adds	r3, #9
+ 80061a0:	f9b7 200a 	ldrsh.w	r2, [r7, #10]
+ 80061a4:	4293      	cmp	r3, r2
+ 80061a6:	db33      	blt.n	8006210 <TP_Read_XY2+0xc6>
     &&((y2<=y1&&y1<y2+ERR_RANGE)||(y1<=y2&&y2<y1+ERR_RANGE)))
- 80061b8:	f9b7 2008 	ldrsh.w	r2, [r7, #8]
- 80061bc:	f9b7 300c 	ldrsh.w	r3, [r7, #12]
- 80061c0:	429a      	cmp	r2, r3
- 80061c2:	dc06      	bgt.n	80061d2 <TP_Read_XY2+0x78>
- 80061c4:	f9b7 3008 	ldrsh.w	r3, [r7, #8]
- 80061c8:	3309      	adds	r3, #9
- 80061ca:	f9b7 200c 	ldrsh.w	r2, [r7, #12]
- 80061ce:	4293      	cmp	r3, r2
- 80061d0:	da0c      	bge.n	80061ec <TP_Read_XY2+0x92>
- 80061d2:	f9b7 200c 	ldrsh.w	r2, [r7, #12]
- 80061d6:	f9b7 3008 	ldrsh.w	r3, [r7, #8]
- 80061da:	429a      	cmp	r2, r3
- 80061dc:	dc20      	bgt.n	8006220 <TP_Read_XY2+0xc6>
- 80061de:	f9b7 300c 	ldrsh.w	r3, [r7, #12]
- 80061e2:	3309      	adds	r3, #9
- 80061e4:	f9b7 2008 	ldrsh.w	r2, [r7, #8]
- 80061e8:	4293      	cmp	r3, r2
- 80061ea:	db19      	blt.n	8006220 <TP_Read_XY2+0xc6>
+ 80061a8:	f9b7 2008 	ldrsh.w	r2, [r7, #8]
+ 80061ac:	f9b7 300c 	ldrsh.w	r3, [r7, #12]
+ 80061b0:	429a      	cmp	r2, r3
+ 80061b2:	dc06      	bgt.n	80061c2 <TP_Read_XY2+0x78>
+ 80061b4:	f9b7 3008 	ldrsh.w	r3, [r7, #8]
+ 80061b8:	3309      	adds	r3, #9
+ 80061ba:	f9b7 200c 	ldrsh.w	r2, [r7, #12]
+ 80061be:	4293      	cmp	r3, r2
+ 80061c0:	da0c      	bge.n	80061dc <TP_Read_XY2+0x92>
+ 80061c2:	f9b7 200c 	ldrsh.w	r2, [r7, #12]
+ 80061c6:	f9b7 3008 	ldrsh.w	r3, [r7, #8]
+ 80061ca:	429a      	cmp	r2, r3
+ 80061cc:	dc20      	bgt.n	8006210 <TP_Read_XY2+0xc6>
+ 80061ce:	f9b7 300c 	ldrsh.w	r3, [r7, #12]
+ 80061d2:	3309      	adds	r3, #9
+ 80061d4:	f9b7 2008 	ldrsh.w	r2, [r7, #8]
+ 80061d8:	4293      	cmp	r3, r2
+ 80061da:	db19      	blt.n	8006210 <TP_Read_XY2+0xc6>
     {
         *x=(x1+x2)/2;
- 80061ec:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
- 80061f0:	461a      	mov	r2, r3
- 80061f2:	f9b7 300a 	ldrsh.w	r3, [r7, #10]
- 80061f6:	4413      	add	r3, r2
- 80061f8:	0fda      	lsrs	r2, r3, #31
- 80061fa:	4413      	add	r3, r2
- 80061fc:	105b      	asrs	r3, r3, #1
- 80061fe:	b21a      	sxth	r2, r3
- 8006200:	687b      	ldr	r3, [r7, #4]
- 8006202:	801a      	strh	r2, [r3, #0]
+ 80061dc:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
+ 80061e0:	461a      	mov	r2, r3
+ 80061e2:	f9b7 300a 	ldrsh.w	r3, [r7, #10]
+ 80061e6:	4413      	add	r3, r2
+ 80061e8:	0fda      	lsrs	r2, r3, #31
+ 80061ea:	4413      	add	r3, r2
+ 80061ec:	105b      	asrs	r3, r3, #1
+ 80061ee:	b21a      	sxth	r2, r3
+ 80061f0:	687b      	ldr	r3, [r7, #4]
+ 80061f2:	801a      	strh	r2, [r3, #0]
         *y=(y1+y2)/2;
- 8006204:	f9b7 300c 	ldrsh.w	r3, [r7, #12]
- 8006208:	461a      	mov	r2, r3
- 800620a:	f9b7 3008 	ldrsh.w	r3, [r7, #8]
- 800620e:	4413      	add	r3, r2
- 8006210:	0fda      	lsrs	r2, r3, #31
- 8006212:	4413      	add	r3, r2
- 8006214:	105b      	asrs	r3, r3, #1
- 8006216:	b21a      	sxth	r2, r3
- 8006218:	683b      	ldr	r3, [r7, #0]
- 800621a:	801a      	strh	r2, [r3, #0]
+ 80061f4:	f9b7 300c 	ldrsh.w	r3, [r7, #12]
+ 80061f8:	461a      	mov	r2, r3
+ 80061fa:	f9b7 3008 	ldrsh.w	r3, [r7, #8]
+ 80061fe:	4413      	add	r3, r2
+ 8006200:	0fda      	lsrs	r2, r3, #31
+ 8006202:	4413      	add	r3, r2
+ 8006204:	105b      	asrs	r3, r3, #1
+ 8006206:	b21a      	sxth	r2, r3
+ 8006208:	683b      	ldr	r3, [r7, #0]
+ 800620a:	801a      	strh	r2, [r3, #0]
         return 1;
- 800621c:	2301      	movs	r3, #1
- 800621e:	e000      	b.n	8006222 <TP_Read_XY2+0xc8>
+ 800620c:	2301      	movs	r3, #1
+ 800620e:	e000      	b.n	8006212 <TP_Read_XY2+0xc8>
     }else return 0;
- 8006220:	2300      	movs	r3, #0
+ 8006210:	2300      	movs	r3, #0
 }
- 8006222:	4618      	mov	r0, r3
- 8006224:	3710      	adds	r7, #16
- 8006226:	46bd      	mov	sp, r7
- 8006228:	bd80      	pop	{r7, pc}
+ 8006212:	4618      	mov	r0, r3
+ 8006214:	3710      	adds	r7, #16
+ 8006216:	46bd      	mov	sp, r7
+ 8006218:	bd80      	pop	{r7, pc}
 	...
 
-0800622c <TP_Server>:
+0800621c <TP_Server>:
 touch_device t0;// t0 yyds~
 touch_config tconfig;
 //触摸更新服务，状态机写法，循环获取坐标
 void TP_Server()
 {
- 800622c:	b598      	push	{r3, r4, r7, lr}
- 800622e:	af00      	add	r7, sp, #0
+ 800621c:	b598      	push	{r3, r4, r7, lr}
+ 800621e:	af00      	add	r7, sp, #0
 	if(TPEN==0)                                             //如果有触摸
- 8006230:	f44f 6180 	mov.w	r1, #1024	; 0x400
- 8006234:	4835      	ldr	r0, [pc, #212]	; (800630c <TP_Server+0xe0>)
- 8006236:	f7fc f861 	bl	80022fc <HAL_GPIO_ReadPin>
- 800623a:	4603      	mov	r3, r0
- 800623c:	2b00      	cmp	r3, #0
- 800623e:	d155      	bne.n	80062ec <TP_Server+0xc0>
+ 8006220:	f44f 6180 	mov.w	r1, #1024	; 0x400
+ 8006224:	4835      	ldr	r0, [pc, #212]	; (80062fc <TP_Server+0xe0>)
+ 8006226:	f7fc f869 	bl	80022fc <HAL_GPIO_ReadPin>
+ 800622a:	4603      	mov	r3, r0
+ 800622c:	2b00      	cmp	r3, #0
+ 800622e:	d155      	bne.n	80062dc <TP_Server+0xc0>
 	{
 		if(TP_Read_XY2(&t0.adc_x,&t0.adc_y))
- 8006240:	4933      	ldr	r1, [pc, #204]	; (8006310 <TP_Server+0xe4>)
- 8006242:	4834      	ldr	r0, [pc, #208]	; (8006314 <TP_Server+0xe8>)
- 8006244:	f7ff ff89 	bl	800615a <TP_Read_XY2>
- 8006248:	4603      	mov	r3, r0
- 800624a:	2b00      	cmp	r3, #0
- 800624c:	d043      	beq.n	80062d6 <TP_Server+0xaa>
+ 8006230:	4933      	ldr	r1, [pc, #204]	; (8006300 <TP_Server+0xe4>)
+ 8006232:	4834      	ldr	r0, [pc, #208]	; (8006304 <TP_Server+0xe8>)
+ 8006234:	f7ff ff89 	bl	800614a <TP_Read_XY2>
+ 8006238:	4603      	mov	r3, r0
+ 800623a:	2b00      	cmp	r3, #0
+ 800623c:	d043      	beq.n	80062c6 <TP_Server+0xaa>
 		{//先读取ad值
 			t0.pix_x=(t0.adc_x/tconfig.x_acc)-tconfig.x_offset;//转换为像素坐标
- 800624e:	4b31      	ldr	r3, [pc, #196]	; (8006314 <TP_Server+0xe8>)
- 8006250:	881b      	ldrh	r3, [r3, #0]
- 8006252:	4618      	mov	r0, r3
- 8006254:	f7fa fd8e 	bl	8000d74 <__aeabi_i2f>
- 8006258:	4602      	mov	r2, r0
- 800625a:	4b2f      	ldr	r3, [pc, #188]	; (8006318 <TP_Server+0xec>)
- 800625c:	685b      	ldr	r3, [r3, #4]
- 800625e:	4619      	mov	r1, r3
- 8006260:	4610      	mov	r0, r2
- 8006262:	f7fa fe8f 	bl	8000f84 <__aeabi_fdiv>
- 8006266:	4603      	mov	r3, r0
- 8006268:	461c      	mov	r4, r3
- 800626a:	4b2b      	ldr	r3, [pc, #172]	; (8006318 <TP_Server+0xec>)
- 800626c:	68db      	ldr	r3, [r3, #12]
- 800626e:	4618      	mov	r0, r3
- 8006270:	f7fa fd80 	bl	8000d74 <__aeabi_i2f>
- 8006274:	4603      	mov	r3, r0
- 8006276:	4619      	mov	r1, r3
- 8006278:	4620      	mov	r0, r4
- 800627a:	f7fa fcc5 	bl	8000c08 <__aeabi_fsub>
- 800627e:	4603      	mov	r3, r0
- 8006280:	4618      	mov	r0, r3
- 8006282:	f7fa ff1b 	bl	80010bc <__aeabi_f2iz>
- 8006286:	4603      	mov	r3, r0
- 8006288:	4a22      	ldr	r2, [pc, #136]	; (8006314 <TP_Server+0xe8>)
- 800628a:	6053      	str	r3, [r2, #4]
+ 800623e:	4b31      	ldr	r3, [pc, #196]	; (8006304 <TP_Server+0xe8>)
+ 8006240:	881b      	ldrh	r3, [r3, #0]
+ 8006242:	4618      	mov	r0, r3
+ 8006244:	f7fa fd96 	bl	8000d74 <__aeabi_i2f>
+ 8006248:	4602      	mov	r2, r0
+ 800624a:	4b2f      	ldr	r3, [pc, #188]	; (8006308 <TP_Server+0xec>)
+ 800624c:	685b      	ldr	r3, [r3, #4]
+ 800624e:	4619      	mov	r1, r3
+ 8006250:	4610      	mov	r0, r2
+ 8006252:	f7fa fe97 	bl	8000f84 <__aeabi_fdiv>
+ 8006256:	4603      	mov	r3, r0
+ 8006258:	461c      	mov	r4, r3
+ 800625a:	4b2b      	ldr	r3, [pc, #172]	; (8006308 <TP_Server+0xec>)
+ 800625c:	68db      	ldr	r3, [r3, #12]
+ 800625e:	4618      	mov	r0, r3
+ 8006260:	f7fa fd88 	bl	8000d74 <__aeabi_i2f>
+ 8006264:	4603      	mov	r3, r0
+ 8006266:	4619      	mov	r1, r3
+ 8006268:	4620      	mov	r0, r4
+ 800626a:	f7fa fccd 	bl	8000c08 <__aeabi_fsub>
+ 800626e:	4603      	mov	r3, r0
+ 8006270:	4618      	mov	r0, r3
+ 8006272:	f7fa ff23 	bl	80010bc <__aeabi_f2iz>
+ 8006276:	4603      	mov	r3, r0
+ 8006278:	4a22      	ldr	r2, [pc, #136]	; (8006304 <TP_Server+0xe8>)
+ 800627a:	6053      	str	r3, [r2, #4]
 			t0.pix_y=(t0.adc_y/tconfig.y_acc)-tconfig.y_offset;
- 800628c:	4b21      	ldr	r3, [pc, #132]	; (8006314 <TP_Server+0xe8>)
- 800628e:	885b      	ldrh	r3, [r3, #2]
- 8006290:	4618      	mov	r0, r3
- 8006292:	f7fa fd6f 	bl	8000d74 <__aeabi_i2f>
- 8006296:	4602      	mov	r2, r0
- 8006298:	4b1f      	ldr	r3, [pc, #124]	; (8006318 <TP_Server+0xec>)
- 800629a:	689b      	ldr	r3, [r3, #8]
- 800629c:	4619      	mov	r1, r3
- 800629e:	4610      	mov	r0, r2
- 80062a0:	f7fa fe70 	bl	8000f84 <__aeabi_fdiv>
- 80062a4:	4603      	mov	r3, r0
- 80062a6:	461c      	mov	r4, r3
- 80062a8:	4b1b      	ldr	r3, [pc, #108]	; (8006318 <TP_Server+0xec>)
- 80062aa:	691b      	ldr	r3, [r3, #16]
- 80062ac:	4618      	mov	r0, r3
- 80062ae:	f7fa fd61 	bl	8000d74 <__aeabi_i2f>
- 80062b2:	4603      	mov	r3, r0
- 80062b4:	4619      	mov	r1, r3
- 80062b6:	4620      	mov	r0, r4
- 80062b8:	f7fa fca6 	bl	8000c08 <__aeabi_fsub>
- 80062bc:	4603      	mov	r3, r0
- 80062be:	4618      	mov	r0, r3
- 80062c0:	f7fa fefc 	bl	80010bc <__aeabi_f2iz>
- 80062c4:	4603      	mov	r3, r0
- 80062c6:	4a13      	ldr	r2, [pc, #76]	; (8006314 <TP_Server+0xe8>)
- 80062c8:	6093      	str	r3, [r2, #8]
+ 800627c:	4b21      	ldr	r3, [pc, #132]	; (8006304 <TP_Server+0xe8>)
+ 800627e:	885b      	ldrh	r3, [r3, #2]
+ 8006280:	4618      	mov	r0, r3
+ 8006282:	f7fa fd77 	bl	8000d74 <__aeabi_i2f>
+ 8006286:	4602      	mov	r2, r0
+ 8006288:	4b1f      	ldr	r3, [pc, #124]	; (8006308 <TP_Server+0xec>)
+ 800628a:	689b      	ldr	r3, [r3, #8]
+ 800628c:	4619      	mov	r1, r3
+ 800628e:	4610      	mov	r0, r2
+ 8006290:	f7fa fe78 	bl	8000f84 <__aeabi_fdiv>
+ 8006294:	4603      	mov	r3, r0
+ 8006296:	461c      	mov	r4, r3
+ 8006298:	4b1b      	ldr	r3, [pc, #108]	; (8006308 <TP_Server+0xec>)
+ 800629a:	691b      	ldr	r3, [r3, #16]
+ 800629c:	4618      	mov	r0, r3
+ 800629e:	f7fa fd69 	bl	8000d74 <__aeabi_i2f>
+ 80062a2:	4603      	mov	r3, r0
+ 80062a4:	4619      	mov	r1, r3
+ 80062a6:	4620      	mov	r0, r4
+ 80062a8:	f7fa fcae 	bl	8000c08 <__aeabi_fsub>
+ 80062ac:	4603      	mov	r3, r0
+ 80062ae:	4618      	mov	r0, r3
+ 80062b0:	f7fa ff04 	bl	80010bc <__aeabi_f2iz>
+ 80062b4:	4603      	mov	r3, r0
+ 80062b6:	4a13      	ldr	r2, [pc, #76]	; (8006304 <TP_Server+0xe8>)
+ 80062b8:	6093      	str	r3, [r2, #8]
 			t0.d=1;
- 80062ca:	4a12      	ldr	r2, [pc, #72]	; (8006314 <TP_Server+0xe8>)
- 80062cc:	7b13      	ldrb	r3, [r2, #12]
- 80062ce:	f043 0304 	orr.w	r3, r3, #4
- 80062d2:	7313      	strb	r3, [r2, #12]
- 80062d4:	e004      	b.n	80062e0 <TP_Server+0xb4>
+ 80062ba:	4a12      	ldr	r2, [pc, #72]	; (8006304 <TP_Server+0xe8>)
+ 80062bc:	7b13      	ldrb	r3, [r2, #12]
+ 80062be:	f043 0304 	orr.w	r3, r3, #4
+ 80062c2:	7313      	strb	r3, [r2, #12]
+ 80062c4:	e004      	b.n	80062d0 <TP_Server+0xb4>
 		}else
 		{
 			t0.d=0;
- 80062d6:	4a0f      	ldr	r2, [pc, #60]	; (8006314 <TP_Server+0xe8>)
- 80062d8:	7b13      	ldrb	r3, [r2, #12]
- 80062da:	f36f 0382 	bfc	r3, #2, #1
- 80062de:	7313      	strb	r3, [r2, #12]
+ 80062c6:	4a0f      	ldr	r2, [pc, #60]	; (8006304 <TP_Server+0xe8>)
+ 80062c8:	7b13      	ldrb	r3, [r2, #12]
+ 80062ca:	f36f 0382 	bfc	r3, #2, #1
+ 80062ce:	7313      	strb	r3, [r2, #12]
 		}
 		t0.c=1;
- 80062e0:	4a0c      	ldr	r2, [pc, #48]	; (8006314 <TP_Server+0xe8>)
- 80062e2:	7b13      	ldrb	r3, [r2, #12]
- 80062e4:	f043 0302 	orr.w	r3, r3, #2
- 80062e8:	7313      	strb	r3, [r2, #12]
+ 80062d0:	4a0c      	ldr	r2, [pc, #48]	; (8006304 <TP_Server+0xe8>)
+ 80062d2:	7b13      	ldrb	r3, [r2, #12]
+ 80062d4:	f043 0302 	orr.w	r3, r3, #2
+ 80062d8:	7313      	strb	r3, [r2, #12]
 	{
 		t0.c=0;
 		t0.pix_x=-1;
 		t0.pix_y=-1;
 	}
 }
- 80062ea:	e00c      	b.n	8006306 <TP_Server+0xda>
+ 80062da:	e00c      	b.n	80062f6 <TP_Server+0xda>
 		t0.c=0;
- 80062ec:	4a09      	ldr	r2, [pc, #36]	; (8006314 <TP_Server+0xe8>)
- 80062ee:	7b13      	ldrb	r3, [r2, #12]
- 80062f0:	f36f 0341 	bfc	r3, #1, #1
- 80062f4:	7313      	strb	r3, [r2, #12]
+ 80062dc:	4a09      	ldr	r2, [pc, #36]	; (8006304 <TP_Server+0xe8>)
+ 80062de:	7b13      	ldrb	r3, [r2, #12]
+ 80062e0:	f36f 0341 	bfc	r3, #1, #1
+ 80062e4:	7313      	strb	r3, [r2, #12]
 		t0.pix_x=-1;
- 80062f6:	4b07      	ldr	r3, [pc, #28]	; (8006314 <TP_Server+0xe8>)
- 80062f8:	f04f 32ff 	mov.w	r2, #4294967295
- 80062fc:	605a      	str	r2, [r3, #4]
+ 80062e6:	4b07      	ldr	r3, [pc, #28]	; (8006304 <TP_Server+0xe8>)
+ 80062e8:	f04f 32ff 	mov.w	r2, #4294967295
+ 80062ec:	605a      	str	r2, [r3, #4]
 		t0.pix_y=-1;
- 80062fe:	4b05      	ldr	r3, [pc, #20]	; (8006314 <TP_Server+0xe8>)
- 8006300:	f04f 32ff 	mov.w	r2, #4294967295
- 8006304:	609a      	str	r2, [r3, #8]
+ 80062ee:	4b05      	ldr	r3, [pc, #20]	; (8006304 <TP_Server+0xe8>)
+ 80062f0:	f04f 32ff 	mov.w	r2, #4294967295
+ 80062f4:	609a      	str	r2, [r3, #8]
 }
- 8006306:	bf00      	nop
- 8006308:	bd98      	pop	{r3, r4, r7, pc}
- 800630a:	bf00      	nop
- 800630c:	40011c00 	.word	0x40011c00
- 8006310:	20000422 	.word	0x20000422
- 8006314:	20000420 	.word	0x20000420
- 8006318:	20000408 	.word	0x20000408
+ 80062f6:	bf00      	nop
+ 80062f8:	bd98      	pop	{r3, r4, r7, pc}
+ 80062fa:	bf00      	nop
+ 80062fc:	40011c00 	.word	0x40011c00
+ 8006300:	200003de 	.word	0x200003de
+ 8006304:	200003dc 	.word	0x200003dc
+ 8006308:	200003ec 	.word	0x200003ec
 
-0800631c <TP_DrwaTrage>:
+0800630c <TP_DrwaTrage>:
 	return 0;
 }
 //校准用，画一个目标坐标
 //r=坐标半径，显示特效用
 void TP_DrwaTrage(int x,int y,int r)
 {
- 800631c:	b590      	push	{r4, r7, lr}
- 800631e:	b087      	sub	sp, #28
- 8006320:	af02      	add	r7, sp, #8
- 8006322:	60f8      	str	r0, [r7, #12]
- 8006324:	60b9      	str	r1, [r7, #8]
- 8006326:	607a      	str	r2, [r7, #4]
+ 800630c:	b590      	push	{r4, r7, lr}
+ 800630e:	b087      	sub	sp, #28
+ 8006310:	af02      	add	r7, sp, #8
+ 8006312:	60f8      	str	r0, [r7, #12]
+ 8006314:	60b9      	str	r1, [r7, #8]
+ 8006316:	607a      	str	r2, [r7, #4]
 	Draw_Circle(x,y,r+1,GRAY);
- 8006328:	68fb      	ldr	r3, [r7, #12]
- 800632a:	b298      	uxth	r0, r3
- 800632c:	68bb      	ldr	r3, [r7, #8]
- 800632e:	b299      	uxth	r1, r3
- 8006330:	687b      	ldr	r3, [r7, #4]
- 8006332:	b29b      	uxth	r3, r3
- 8006334:	3301      	adds	r3, #1
- 8006336:	b29a      	uxth	r2, r3
- 8006338:	f248 4330 	movw	r3, #33840	; 0x8430
- 800633c:	f7ff fa4f 	bl	80057de <Draw_Circle>
+ 8006318:	68fb      	ldr	r3, [r7, #12]
+ 800631a:	b298      	uxth	r0, r3
+ 800631c:	68bb      	ldr	r3, [r7, #8]
+ 800631e:	b299      	uxth	r1, r3
+ 8006320:	687b      	ldr	r3, [r7, #4]
+ 8006322:	b29b      	uxth	r3, r3
+ 8006324:	3301      	adds	r3, #1
+ 8006326:	b29a      	uxth	r2, r3
+ 8006328:	f248 4330 	movw	r3, #33840	; 0x8430
+ 800632c:	f7ff fa57 	bl	80057de <Draw_Circle>
 	Draw_Circle(x,y,r,RED);
- 8006340:	68fb      	ldr	r3, [r7, #12]
- 8006342:	b298      	uxth	r0, r3
- 8006344:	68bb      	ldr	r3, [r7, #8]
- 8006346:	b299      	uxth	r1, r3
- 8006348:	687b      	ldr	r3, [r7, #4]
- 800634a:	b29a      	uxth	r2, r3
- 800634c:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 8006350:	f7ff fa45 	bl	80057de <Draw_Circle>
+ 8006330:	68fb      	ldr	r3, [r7, #12]
+ 8006332:	b298      	uxth	r0, r3
+ 8006334:	68bb      	ldr	r3, [r7, #8]
+ 8006336:	b299      	uxth	r1, r3
+ 8006338:	687b      	ldr	r3, [r7, #4]
+ 800633a:	b29a      	uxth	r2, r3
+ 800633c:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 8006340:	f7ff fa4d 	bl	80057de <Draw_Circle>
 	LCD_DrawLine(x,y,x+10,y,RED);
- 8006354:	68fb      	ldr	r3, [r7, #12]
- 8006356:	b298      	uxth	r0, r3
- 8006358:	68bb      	ldr	r3, [r7, #8]
- 800635a:	b299      	uxth	r1, r3
- 800635c:	68fb      	ldr	r3, [r7, #12]
- 800635e:	b29b      	uxth	r3, r3
- 8006360:	330a      	adds	r3, #10
- 8006362:	b29a      	uxth	r2, r3
- 8006364:	68bb      	ldr	r3, [r7, #8]
- 8006366:	b29b      	uxth	r3, r3
- 8006368:	f44f 4478 	mov.w	r4, #63488	; 0xf800
- 800636c:	9400      	str	r4, [sp, #0]
- 800636e:	f7ff f9b1 	bl	80056d4 <LCD_DrawLine>
+ 8006344:	68fb      	ldr	r3, [r7, #12]
+ 8006346:	b298      	uxth	r0, r3
+ 8006348:	68bb      	ldr	r3, [r7, #8]
+ 800634a:	b299      	uxth	r1, r3
+ 800634c:	68fb      	ldr	r3, [r7, #12]
+ 800634e:	b29b      	uxth	r3, r3
+ 8006350:	330a      	adds	r3, #10
+ 8006352:	b29a      	uxth	r2, r3
+ 8006354:	68bb      	ldr	r3, [r7, #8]
+ 8006356:	b29b      	uxth	r3, r3
+ 8006358:	f44f 4478 	mov.w	r4, #63488	; 0xf800
+ 800635c:	9400      	str	r4, [sp, #0]
+ 800635e:	f7ff f9b9 	bl	80056d4 <LCD_DrawLine>
 	LCD_DrawLine(x,y,x,y+10,RED);
- 8006372:	68fb      	ldr	r3, [r7, #12]
- 8006374:	b298      	uxth	r0, r3
- 8006376:	68bb      	ldr	r3, [r7, #8]
- 8006378:	b299      	uxth	r1, r3
- 800637a:	68fb      	ldr	r3, [r7, #12]
- 800637c:	b29a      	uxth	r2, r3
- 800637e:	68bb      	ldr	r3, [r7, #8]
- 8006380:	b29b      	uxth	r3, r3
- 8006382:	330a      	adds	r3, #10
- 8006384:	b29b      	uxth	r3, r3
- 8006386:	f44f 4478 	mov.w	r4, #63488	; 0xf800
- 800638a:	9400      	str	r4, [sp, #0]
- 800638c:	f7ff f9a2 	bl	80056d4 <LCD_DrawLine>
+ 8006362:	68fb      	ldr	r3, [r7, #12]
+ 8006364:	b298      	uxth	r0, r3
+ 8006366:	68bb      	ldr	r3, [r7, #8]
+ 8006368:	b299      	uxth	r1, r3
+ 800636a:	68fb      	ldr	r3, [r7, #12]
+ 800636c:	b29a      	uxth	r2, r3
+ 800636e:	68bb      	ldr	r3, [r7, #8]
+ 8006370:	b29b      	uxth	r3, r3
+ 8006372:	330a      	adds	r3, #10
+ 8006374:	b29b      	uxth	r3, r3
+ 8006376:	f44f 4478 	mov.w	r4, #63488	; 0xf800
+ 800637a:	9400      	str	r4, [sp, #0]
+ 800637c:	f7ff f9aa 	bl	80056d4 <LCD_DrawLine>
 	LCD_DrawLine(x,y,x-10,y,RED);
- 8006390:	68fb      	ldr	r3, [r7, #12]
- 8006392:	b298      	uxth	r0, r3
- 8006394:	68bb      	ldr	r3, [r7, #8]
- 8006396:	b299      	uxth	r1, r3
- 8006398:	68fb      	ldr	r3, [r7, #12]
- 800639a:	b29b      	uxth	r3, r3
- 800639c:	3b0a      	subs	r3, #10
- 800639e:	b29a      	uxth	r2, r3
- 80063a0:	68bb      	ldr	r3, [r7, #8]
- 80063a2:	b29b      	uxth	r3, r3
- 80063a4:	f44f 4478 	mov.w	r4, #63488	; 0xf800
- 80063a8:	9400      	str	r4, [sp, #0]
- 80063aa:	f7ff f993 	bl	80056d4 <LCD_DrawLine>
+ 8006380:	68fb      	ldr	r3, [r7, #12]
+ 8006382:	b298      	uxth	r0, r3
+ 8006384:	68bb      	ldr	r3, [r7, #8]
+ 8006386:	b299      	uxth	r1, r3
+ 8006388:	68fb      	ldr	r3, [r7, #12]
+ 800638a:	b29b      	uxth	r3, r3
+ 800638c:	3b0a      	subs	r3, #10
+ 800638e:	b29a      	uxth	r2, r3
+ 8006390:	68bb      	ldr	r3, [r7, #8]
+ 8006392:	b29b      	uxth	r3, r3
+ 8006394:	f44f 4478 	mov.w	r4, #63488	; 0xf800
+ 8006398:	9400      	str	r4, [sp, #0]
+ 800639a:	f7ff f99b 	bl	80056d4 <LCD_DrawLine>
 	LCD_DrawLine(x,y,x,y-10,RED);
- 80063ae:	68fb      	ldr	r3, [r7, #12]
- 80063b0:	b298      	uxth	r0, r3
- 80063b2:	68bb      	ldr	r3, [r7, #8]
- 80063b4:	b299      	uxth	r1, r3
- 80063b6:	68fb      	ldr	r3, [r7, #12]
- 80063b8:	b29a      	uxth	r2, r3
- 80063ba:	68bb      	ldr	r3, [r7, #8]
- 80063bc:	b29b      	uxth	r3, r3
- 80063be:	3b0a      	subs	r3, #10
- 80063c0:	b29b      	uxth	r3, r3
- 80063c2:	f44f 4478 	mov.w	r4, #63488	; 0xf800
- 80063c6:	9400      	str	r4, [sp, #0]
- 80063c8:	f7ff f984 	bl	80056d4 <LCD_DrawLine>
+ 800639e:	68fb      	ldr	r3, [r7, #12]
+ 80063a0:	b298      	uxth	r0, r3
+ 80063a2:	68bb      	ldr	r3, [r7, #8]
+ 80063a4:	b299      	uxth	r1, r3
+ 80063a6:	68fb      	ldr	r3, [r7, #12]
+ 80063a8:	b29a      	uxth	r2, r3
+ 80063aa:	68bb      	ldr	r3, [r7, #8]
+ 80063ac:	b29b      	uxth	r3, r3
+ 80063ae:	3b0a      	subs	r3, #10
+ 80063b0:	b29b      	uxth	r3, r3
+ 80063b2:	f44f 4478 	mov.w	r4, #63488	; 0xf800
+ 80063b6:	9400      	str	r4, [sp, #0]
+ 80063b8:	f7ff f98c 	bl	80056d4 <LCD_DrawLine>
 }
- 80063cc:	bf00      	nop
- 80063ce:	3714      	adds	r7, #20
- 80063d0:	46bd      	mov	sp, r7
- 80063d2:	bd90      	pop	{r4, r7, pc}
+ 80063bc:	bf00      	nop
+ 80063be:	3714      	adds	r7, #20
+ 80063c0:	46bd      	mov	sp, r7
+ 80063c2:	bd90      	pop	{r4, r7, pc}
 
-080063d4 <TP_adjustment>:
+080063c4 <TP_adjustment>:
 //触摸屏校准
 //mode 校准模式，0 被动校准 ，1 主动校准
 void TP_adjustment(char mode)
 {
- 80063d4:	b5b0      	push	{r4, r5, r7, lr}
- 80063d6:	b0a6      	sub	sp, #152	; 0x98
- 80063d8:	af02      	add	r7, sp, #8
- 80063da:	4603      	mov	r3, r0
- 80063dc:	71fb      	strb	r3, [r7, #7]
+ 80063c4:	b5b0      	push	{r4, r5, r7, lr}
+ 80063c6:	b0a6      	sub	sp, #152	; 0x98
+ 80063c8:	af02      	add	r7, sp, #8
+ 80063ca:	4603      	mov	r3, r0
+ 80063cc:	71fb      	strb	r3, [r7, #7]
 	//判断是否需要校准，从eeprom获取数据
 	EEPROM_READ_BATY(16,(char *)&tconfig,sizeof(touch_config));
- 80063de:	2218      	movs	r2, #24
- 80063e0:	4917      	ldr	r1, [pc, #92]	; (8006440 <TP_adjustment+0x6c>)
- 80063e2:	2010      	movs	r0, #16
- 80063e4:	f7ff fc94 	bl	8005d10 <EEPROM_READ_BATY>
+ 80063ce:	2218      	movs	r2, #24
+ 80063d0:	4917      	ldr	r1, [pc, #92]	; (8006430 <TP_adjustment+0x6c>)
+ 80063d2:	2010      	movs	r0, #16
+ 80063d4:	f7ff fc9c 	bl	8005d10 <EEPROM_READ_BATY>
 	if(tconfig.begin==0xab&&tconfig.end==0xcd&&mode==0)     //判断校准标记
- 80063e8:	4b15      	ldr	r3, [pc, #84]	; (8006440 <TP_adjustment+0x6c>)
- 80063ea:	781b      	ldrb	r3, [r3, #0]
- 80063ec:	2bab      	cmp	r3, #171	; 0xab
- 80063ee:	d107      	bne.n	8006400 <TP_adjustment+0x2c>
- 80063f0:	4b13      	ldr	r3, [pc, #76]	; (8006440 <TP_adjustment+0x6c>)
- 80063f2:	7d1b      	ldrb	r3, [r3, #20]
- 80063f4:	2bcd      	cmp	r3, #205	; 0xcd
- 80063f6:	d103      	bne.n	8006400 <TP_adjustment+0x2c>
- 80063f8:	79fb      	ldrb	r3, [r7, #7]
- 80063fa:	2b00      	cmp	r3, #0
- 80063fc:	f000 82b8 	beq.w	8006970 <TP_adjustment+0x59c>
+ 80063d8:	4b15      	ldr	r3, [pc, #84]	; (8006430 <TP_adjustment+0x6c>)
+ 80063da:	781b      	ldrb	r3, [r3, #0]
+ 80063dc:	2bab      	cmp	r3, #171	; 0xab
+ 80063de:	d107      	bne.n	80063f0 <TP_adjustment+0x2c>
+ 80063e0:	4b13      	ldr	r3, [pc, #76]	; (8006430 <TP_adjustment+0x6c>)
+ 80063e2:	7d1b      	ldrb	r3, [r3, #20]
+ 80063e4:	2bcd      	cmp	r3, #205	; 0xcd
+ 80063e6:	d103      	bne.n	80063f0 <TP_adjustment+0x2c>
+ 80063e8:	79fb      	ldrb	r3, [r7, #7]
+ 80063ea:	2b00      	cmp	r3, #0
+ 80063ec:	f000 82b8 	beq.w	8006960 <TP_adjustment+0x59c>
 	{
 		return;												//已经校准过了
 	}
 	//校准方法比较简单，读取4个坐标计算ad值与像素的关系
 	char str[64];                               //用于字符串提示
 	uint16_t y_adc,x_adc,step=0,r=10;			//adc缓存，校准步骤，坐标的半径
- 8006400:	2300      	movs	r3, #0
- 8006402:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
- 8006406:	230a      	movs	r3, #10
- 8006408:	f8a7 308c 	strh.w	r3, [r7, #140]	; 0x8c
+ 80063f0:	2300      	movs	r3, #0
+ 80063f2:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
+ 80063f6:	230a      	movs	r3, #10
+ 80063f8:	f8a7 308c 	strh.w	r3, [r7, #140]	; 0x8c
 	uint16_t y1,y2,y3,y4,x1,x2,x3,x4;			//4个点缓存
 	int y5,x5,xd,xl,yd,yl;						//通过4个点算出xy的长边和短边
 	float acc_x,acc_y;							//算出的关系倍率
 	int   offset_x,offset_y;					//算出的偏差
 	uint32_t wait=HAL_GetTick()+50000,ms100=0;  //校准时间，50秒没操作就自动退出
- 800640c:	f7fb fca6 	bl	8001d5c <HAL_GetTick>
- 8006410:	4603      	mov	r3, r0
- 8006412:	f503 4343 	add.w	r3, r3, #49920	; 0xc300
- 8006416:	3350      	adds	r3, #80	; 0x50
- 8006418:	67bb      	str	r3, [r7, #120]	; 0x78
- 800641a:	2300      	movs	r3, #0
- 800641c:	677b      	str	r3, [r7, #116]	; 0x74
+ 80063fc:	f7fb fcae 	bl	8001d5c <HAL_GetTick>
+ 8006400:	4603      	mov	r3, r0
+ 8006402:	f503 4343 	add.w	r3, r3, #49920	; 0xc300
+ 8006406:	3350      	adds	r3, #80	; 0x50
+ 8006408:	67bb      	str	r3, [r7, #120]	; 0x78
+ 800640a:	2300      	movs	r3, #0
+ 800640c:	677b      	str	r3, [r7, #116]	; 0x74
 												//显示字符串提示
 	LCD_Clear(GRAY);
- 800641e:	f248 4030 	movw	r0, #33840	; 0x8430
- 8006422:	f7ff f905 	bl	8005630 <LCD_Clear>
+ 800640e:	f248 4030 	movw	r0, #33840	; 0x8430
+ 8006412:	f7ff f90d 	bl	8005630 <LCD_Clear>
 	LCD_ShowString(0,50,"Calibrate the touch screen",16,RED,RED);
- 8006426:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 800642a:	9301      	str	r3, [sp, #4]
- 800642c:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 8006430:	9300      	str	r3, [sp, #0]
- 8006432:	2310      	movs	r3, #16
- 8006434:	4a03      	ldr	r2, [pc, #12]	; (8006444 <TP_adjustment+0x70>)
- 8006436:	2132      	movs	r1, #50	; 0x32
- 8006438:	2000      	movs	r0, #0
- 800643a:	f7ff faf7 	bl	8005a2c <LCD_ShowString>
+ 8006416:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 800641a:	9301      	str	r3, [sp, #4]
+ 800641c:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 8006420:	9300      	str	r3, [sp, #0]
+ 8006422:	2310      	movs	r3, #16
+ 8006424:	4a03      	ldr	r2, [pc, #12]	; (8006434 <TP_adjustment+0x70>)
+ 8006426:	2132      	movs	r1, #50	; 0x32
+ 8006428:	2000      	movs	r0, #0
+ 800642a:	f7ff faff 	bl	8005a2c <LCD_ShowString>
 	//TP_DrwaTrage(30,30,10);
 												//开始校准
 	while(HAL_GetTick()<wait)
- 800643e:	e28f      	b.n	8006960 <TP_adjustment+0x58c>
- 8006440:	20000408 	.word	0x20000408
- 8006444:	0800a670 	.word	0x0800a670
+ 800642e:	e28f      	b.n	8006950 <TP_adjustment+0x58c>
+ 8006430:	200003ec 	.word	0x200003ec
+ 8006434:	0800a660 	.word	0x0800a660
 	{
 		if(TPEN==0)								//如果屏幕被按下
- 8006448:	f44f 6180 	mov.w	r1, #1024	; 0x400
- 800644c:	48d7      	ldr	r0, [pc, #860]	; (80067ac <TP_adjustment+0x3d8>)
- 800644e:	f7fb ff55 	bl	80022fc <HAL_GPIO_ReadPin>
- 8006452:	4603      	mov	r3, r0
- 8006454:	2b00      	cmp	r3, #0
- 8006456:	d14c      	bne.n	80064f2 <TP_adjustment+0x11e>
+ 8006438:	f44f 6180 	mov.w	r1, #1024	; 0x400
+ 800643c:	48ce      	ldr	r0, [pc, #824]	; (8006778 <TP_adjustment+0x3b4>)
+ 800643e:	f7fb ff5d 	bl	80022fc <HAL_GPIO_ReadPin>
+ 8006442:	4603      	mov	r3, r0
+ 8006444:	2b00      	cmp	r3, #0
+ 8006446:	d14c      	bne.n	80064e2 <TP_adjustment+0x11e>
 		{
 			wait=HAL_GetTick()+50000;			//重置50秒
- 8006458:	f7fb fc80 	bl	8001d5c <HAL_GetTick>
- 800645c:	4603      	mov	r3, r0
- 800645e:	f503 4343 	add.w	r3, r3, #49920	; 0xc300
- 8006462:	3350      	adds	r3, #80	; 0x50
- 8006464:	67bb      	str	r3, [r7, #120]	; 0x78
+ 8006448:	f7fb fc88 	bl	8001d5c <HAL_GetTick>
+ 800644c:	4603      	mov	r3, r0
+ 800644e:	f503 4343 	add.w	r3, r3, #49920	; 0xc300
+ 8006452:	3350      	adds	r3, #80	; 0x50
+ 8006454:	67bb      	str	r3, [r7, #120]	; 0x78
 
 			TP_Read_XY2(&x_adc,&y_adc);			//读取xy ad值
- 8006466:	f107 020a 	add.w	r2, r7, #10
- 800646a:	f107 0308 	add.w	r3, r7, #8
- 800646e:	4611      	mov	r1, r2
- 8006470:	4618      	mov	r0, r3
- 8006472:	f7ff fe72 	bl	800615a <TP_Read_XY2>
+ 8006456:	f107 020a 	add.w	r2, r7, #10
+ 800645a:	f107 0308 	add.w	r3, r7, #8
+ 800645e:	4611      	mov	r1, r2
+ 8006460:	4618      	mov	r0, r3
+ 8006462:	f7ff fe72 	bl	800614a <TP_Read_XY2>
 												//将读到的值显示出来
 			sprintf(str,"ADC_X:%04d",x_adc);
- 8006476:	893b      	ldrh	r3, [r7, #8]
- 8006478:	461a      	mov	r2, r3
- 800647a:	f107 030c 	add.w	r3, r7, #12
- 800647e:	49cc      	ldr	r1, [pc, #816]	; (80067b0 <TP_adjustment+0x3dc>)
- 8006480:	4618      	mov	r0, r3
- 8006482:	f001 ff65 	bl	8008350 <siprintf>
+ 8006466:	893b      	ldrh	r3, [r7, #8]
+ 8006468:	461a      	mov	r2, r3
+ 800646a:	f107 030c 	add.w	r3, r7, #12
+ 800646e:	49c3      	ldr	r1, [pc, #780]	; (800677c <TP_adjustment+0x3b8>)
+ 8006470:	4618      	mov	r0, r3
+ 8006472:	f002 f845 	bl	8008500 <siprintf>
 			LCD_ShowString(100, 0, str, 16, RED, GRAY);
- 8006486:	f107 020c 	add.w	r2, r7, #12
- 800648a:	f248 4330 	movw	r3, #33840	; 0x8430
- 800648e:	9301      	str	r3, [sp, #4]
- 8006490:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 8006494:	9300      	str	r3, [sp, #0]
- 8006496:	2310      	movs	r3, #16
- 8006498:	2100      	movs	r1, #0
- 800649a:	2064      	movs	r0, #100	; 0x64
- 800649c:	f7ff fac6 	bl	8005a2c <LCD_ShowString>
+ 8006476:	f107 020c 	add.w	r2, r7, #12
+ 800647a:	f248 4330 	movw	r3, #33840	; 0x8430
+ 800647e:	9301      	str	r3, [sp, #4]
+ 8006480:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 8006484:	9300      	str	r3, [sp, #0]
+ 8006486:	2310      	movs	r3, #16
+ 8006488:	2100      	movs	r1, #0
+ 800648a:	2064      	movs	r0, #100	; 0x64
+ 800648c:	f7ff face 	bl	8005a2c <LCD_ShowString>
 			sprintf(str,"ADC_Y:%04d",y_adc);
- 80064a0:	897b      	ldrh	r3, [r7, #10]
- 80064a2:	461a      	mov	r2, r3
- 80064a4:	f107 030c 	add.w	r3, r7, #12
- 80064a8:	49c2      	ldr	r1, [pc, #776]	; (80067b4 <TP_adjustment+0x3e0>)
- 80064aa:	4618      	mov	r0, r3
- 80064ac:	f001 ff50 	bl	8008350 <siprintf>
+ 8006490:	897b      	ldrh	r3, [r7, #10]
+ 8006492:	461a      	mov	r2, r3
+ 8006494:	f107 030c 	add.w	r3, r7, #12
+ 8006498:	49b9      	ldr	r1, [pc, #740]	; (8006780 <TP_adjustment+0x3bc>)
+ 800649a:	4618      	mov	r0, r3
+ 800649c:	f002 f830 	bl	8008500 <siprintf>
 			LCD_ShowString(100, 16, str, 16, RED, GRAY);
- 80064b0:	f107 020c 	add.w	r2, r7, #12
- 80064b4:	f248 4330 	movw	r3, #33840	; 0x8430
- 80064b8:	9301      	str	r3, [sp, #4]
- 80064ba:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 80064be:	9300      	str	r3, [sp, #0]
- 80064c0:	2310      	movs	r3, #16
- 80064c2:	2110      	movs	r1, #16
- 80064c4:	2064      	movs	r0, #100	; 0x64
- 80064c6:	f7ff fab1 	bl	8005a2c <LCD_ShowString>
+ 80064a0:	f107 020c 	add.w	r2, r7, #12
+ 80064a4:	f248 4330 	movw	r3, #33840	; 0x8430
+ 80064a8:	9301      	str	r3, [sp, #4]
+ 80064aa:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 80064ae:	9300      	str	r3, [sp, #0]
+ 80064b0:	2310      	movs	r3, #16
+ 80064b2:	2110      	movs	r1, #16
+ 80064b4:	2064      	movs	r0, #100	; 0x64
+ 80064b6:	f7ff fab9 	bl	8005a2c <LCD_ShowString>
 												//特效，半径开始收缩
 			if(HAL_GetTick()>ms100)
- 80064ca:	f7fb fc47 	bl	8001d5c <HAL_GetTick>
- 80064ce:	4602      	mov	r2, r0
- 80064d0:	6f7b      	ldr	r3, [r7, #116]	; 0x74
- 80064d2:	4293      	cmp	r3, r2
- 80064d4:	d20d      	bcs.n	80064f2 <TP_adjustment+0x11e>
+ 80064ba:	f7fb fc4f 	bl	8001d5c <HAL_GetTick>
+ 80064be:	4602      	mov	r2, r0
+ 80064c0:	6f7b      	ldr	r3, [r7, #116]	; 0x74
+ 80064c2:	4293      	cmp	r3, r2
+ 80064c4:	d20d      	bcs.n	80064e2 <TP_adjustment+0x11e>
 			{
 				ms100=HAL_GetTick()+100;
- 80064d6:	f7fb fc41 	bl	8001d5c <HAL_GetTick>
- 80064da:	4603      	mov	r3, r0
- 80064dc:	3364      	adds	r3, #100	; 0x64
- 80064de:	677b      	str	r3, [r7, #116]	; 0x74
+ 80064c6:	f7fb fc49 	bl	8001d5c <HAL_GetTick>
+ 80064ca:	4603      	mov	r3, r0
+ 80064cc:	3364      	adds	r3, #100	; 0x64
+ 80064ce:	677b      	str	r3, [r7, #116]	; 0x74
 				if(r>0){r--;}
- 80064e0:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
- 80064e4:	2b00      	cmp	r3, #0
- 80064e6:	d004      	beq.n	80064f2 <TP_adjustment+0x11e>
- 80064e8:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
- 80064ec:	3b01      	subs	r3, #1
- 80064ee:	f8a7 308c 	strh.w	r3, [r7, #140]	; 0x8c
+ 80064d0:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
+ 80064d4:	2b00      	cmp	r3, #0
+ 80064d6:	d004      	beq.n	80064e2 <TP_adjustment+0x11e>
+ 80064d8:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
+ 80064dc:	3b01      	subs	r3, #1
+ 80064de:	f8a7 308c 	strh.w	r3, [r7, #140]	; 0x8c
 			}
 		}
 		//步骤0，将点画在（30，30）此时半径为10
 		if(step==0)
- 80064f2:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 80064f6:	2b00      	cmp	r3, #0
- 80064f8:	d12b      	bne.n	8006552 <TP_adjustment+0x17e>
+ 80064e2:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 80064e6:	2b00      	cmp	r3, #0
+ 80064e8:	d12b      	bne.n	8006542 <TP_adjustment+0x17e>
 		{
 			TP_DrwaTrage(30,30,r);
- 80064fa:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
- 80064fe:	461a      	mov	r2, r3
- 8006500:	211e      	movs	r1, #30
- 8006502:	201e      	movs	r0, #30
- 8006504:	f7ff ff0a 	bl	800631c <TP_DrwaTrage>
+ 80064ea:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
+ 80064ee:	461a      	mov	r2, r3
+ 80064f0:	211e      	movs	r1, #30
+ 80064f2:	201e      	movs	r0, #30
+ 80064f4:	f7ff ff0a 	bl	800630c <TP_DrwaTrage>
 			if(r==0)//当半径收缩为0的时候
- 8006508:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
- 800650c:	2b00      	cmp	r3, #0
- 800650e:	d120      	bne.n	8006552 <TP_adjustment+0x17e>
+ 80064f8:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
+ 80064fc:	2b00      	cmp	r3, #0
+ 80064fe:	d120      	bne.n	8006542 <TP_adjustment+0x17e>
 			{
 					//进入下一个步骤，缓存这个点的值，显示出来
 				step+=1;
- 8006510:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 8006514:	3301      	adds	r3, #1
- 8006516:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
+ 8006500:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 8006504:	3301      	adds	r3, #1
+ 8006506:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
 				y1=y_adc;
- 800651a:	897b      	ldrh	r3, [r7, #10]
- 800651c:	f8a7 308a 	strh.w	r3, [r7, #138]	; 0x8a
+ 800650a:	897b      	ldrh	r3, [r7, #10]
+ 800650c:	f8a7 308a 	strh.w	r3, [r7, #138]	; 0x8a
 				x1=x_adc;
- 8006520:	893b      	ldrh	r3, [r7, #8]
- 8006522:	f8a7 3082 	strh.w	r3, [r7, #130]	; 0x82
+ 8006510:	893b      	ldrh	r3, [r7, #8]
+ 8006512:	f8a7 3082 	strh.w	r3, [r7, #130]	; 0x82
 				sprintf(str,"point_1 x:%d y:%d",x1,y1);
- 8006526:	f8b7 2082 	ldrh.w	r2, [r7, #130]	; 0x82
- 800652a:	f8b7 308a 	ldrh.w	r3, [r7, #138]	; 0x8a
- 800652e:	f107 000c 	add.w	r0, r7, #12
- 8006532:	49a1      	ldr	r1, [pc, #644]	; (80067b8 <TP_adjustment+0x3e4>)
- 8006534:	f001 ff0c 	bl	8008350 <siprintf>
+ 8006516:	f8b7 2082 	ldrh.w	r2, [r7, #130]	; 0x82
+ 800651a:	f8b7 308a 	ldrh.w	r3, [r7, #138]	; 0x8a
+ 800651e:	f107 000c 	add.w	r0, r7, #12
+ 8006522:	4998      	ldr	r1, [pc, #608]	; (8006784 <TP_adjustment+0x3c0>)
+ 8006524:	f001 ffec 	bl	8008500 <siprintf>
 				LCD_ShowString(0,66,str,16,RED,RED);
- 8006538:	f107 020c 	add.w	r2, r7, #12
- 800653c:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 8006540:	9301      	str	r3, [sp, #4]
- 8006542:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 8006546:	9300      	str	r3, [sp, #0]
- 8006548:	2310      	movs	r3, #16
- 800654a:	2142      	movs	r1, #66	; 0x42
- 800654c:	2000      	movs	r0, #0
- 800654e:	f7ff fa6d 	bl	8005a2c <LCD_ShowString>
+ 8006528:	f107 020c 	add.w	r2, r7, #12
+ 800652c:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 8006530:	9301      	str	r3, [sp, #4]
+ 8006532:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 8006536:	9300      	str	r3, [sp, #0]
+ 8006538:	2310      	movs	r3, #16
+ 800653a:	2142      	movs	r1, #66	; 0x42
+ 800653c:	2000      	movs	r0, #0
+ 800653e:	f7ff fa75 	bl	8005a2c <LCD_ShowString>
 			}
 		}
 		//步骤1，等待屏幕被松开，进入下一个步骤，重置半径
 		if(step==1)
- 8006552:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 8006556:	2b01      	cmp	r3, #1
- 8006558:	d10f      	bne.n	800657a <TP_adjustment+0x1a6>
+ 8006542:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 8006546:	2b01      	cmp	r3, #1
+ 8006548:	d10f      	bne.n	800656a <TP_adjustment+0x1a6>
 		{
 			if(TPEN==1)
- 800655a:	f44f 6180 	mov.w	r1, #1024	; 0x400
- 800655e:	4893      	ldr	r0, [pc, #588]	; (80067ac <TP_adjustment+0x3d8>)
- 8006560:	f7fb fecc 	bl	80022fc <HAL_GPIO_ReadPin>
- 8006564:	4603      	mov	r3, r0
- 8006566:	2b01      	cmp	r3, #1
- 8006568:	d107      	bne.n	800657a <TP_adjustment+0x1a6>
+ 800654a:	f44f 6180 	mov.w	r1, #1024	; 0x400
+ 800654e:	488a      	ldr	r0, [pc, #552]	; (8006778 <TP_adjustment+0x3b4>)
+ 8006550:	f7fb fed4 	bl	80022fc <HAL_GPIO_ReadPin>
+ 8006554:	4603      	mov	r3, r0
+ 8006556:	2b01      	cmp	r3, #1
+ 8006558:	d107      	bne.n	800656a <TP_adjustment+0x1a6>
 			{
 				step+=1;
- 800656a:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 800656e:	3301      	adds	r3, #1
- 8006570:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
+ 800655a:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 800655e:	3301      	adds	r3, #1
+ 8006560:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
 				r=10;
- 8006574:	230a      	movs	r3, #10
- 8006576:	f8a7 308c 	strh.w	r3, [r7, #140]	; 0x8c
+ 8006564:	230a      	movs	r3, #10
+ 8006566:	f8a7 308c 	strh.w	r3, [r7, #140]	; 0x8c
 			}
 
 		}
 		//下面几个步骤和上面一样
 		if(step==2)
- 800657a:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 800657e:	2b02      	cmp	r3, #2
- 8006580:	d12c      	bne.n	80065dc <TP_adjustment+0x208>
+ 800656a:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 800656e:	2b02      	cmp	r3, #2
+ 8006570:	d12c      	bne.n	80065cc <TP_adjustment+0x208>
 		{
 			TP_DrwaTrage(290,30,r);
- 8006582:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
- 8006586:	461a      	mov	r2, r3
- 8006588:	211e      	movs	r1, #30
- 800658a:	f44f 7091 	mov.w	r0, #290	; 0x122
- 800658e:	f7ff fec5 	bl	800631c <TP_DrwaTrage>
+ 8006572:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
+ 8006576:	461a      	mov	r2, r3
+ 8006578:	211e      	movs	r1, #30
+ 800657a:	f44f 7091 	mov.w	r0, #290	; 0x122
+ 800657e:	f7ff fec5 	bl	800630c <TP_DrwaTrage>
 			if(r==0)
- 8006592:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
- 8006596:	2b00      	cmp	r3, #0
- 8006598:	d120      	bne.n	80065dc <TP_adjustment+0x208>
+ 8006582:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
+ 8006586:	2b00      	cmp	r3, #0
+ 8006588:	d120      	bne.n	80065cc <TP_adjustment+0x208>
 			{
 				step+=1;
- 800659a:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 800659e:	3301      	adds	r3, #1
- 80065a0:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
+ 800658a:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 800658e:	3301      	adds	r3, #1
+ 8006590:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
 				y2=y_adc;
- 80065a4:	897b      	ldrh	r3, [r7, #10]
- 80065a6:	f8a7 3088 	strh.w	r3, [r7, #136]	; 0x88
+ 8006594:	897b      	ldrh	r3, [r7, #10]
+ 8006596:	f8a7 3088 	strh.w	r3, [r7, #136]	; 0x88
 				x2=x_adc;
- 80065aa:	893b      	ldrh	r3, [r7, #8]
- 80065ac:	f8a7 3080 	strh.w	r3, [r7, #128]	; 0x80
+ 800659a:	893b      	ldrh	r3, [r7, #8]
+ 800659c:	f8a7 3080 	strh.w	r3, [r7, #128]	; 0x80
 				sprintf(str,"point_2 x:%d y:%d",x2,y2);
- 80065b0:	f8b7 2080 	ldrh.w	r2, [r7, #128]	; 0x80
- 80065b4:	f8b7 3088 	ldrh.w	r3, [r7, #136]	; 0x88
- 80065b8:	f107 000c 	add.w	r0, r7, #12
- 80065bc:	497f      	ldr	r1, [pc, #508]	; (80067bc <TP_adjustment+0x3e8>)
- 80065be:	f001 fec7 	bl	8008350 <siprintf>
+ 80065a0:	f8b7 2080 	ldrh.w	r2, [r7, #128]	; 0x80
+ 80065a4:	f8b7 3088 	ldrh.w	r3, [r7, #136]	; 0x88
+ 80065a8:	f107 000c 	add.w	r0, r7, #12
+ 80065ac:	4976      	ldr	r1, [pc, #472]	; (8006788 <TP_adjustment+0x3c4>)
+ 80065ae:	f001 ffa7 	bl	8008500 <siprintf>
 				LCD_ShowString(0,66+16,str,16,RED,RED);
- 80065c2:	f107 020c 	add.w	r2, r7, #12
- 80065c6:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 80065ca:	9301      	str	r3, [sp, #4]
- 80065cc:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 80065d0:	9300      	str	r3, [sp, #0]
- 80065d2:	2310      	movs	r3, #16
- 80065d4:	2152      	movs	r1, #82	; 0x52
- 80065d6:	2000      	movs	r0, #0
- 80065d8:	f7ff fa28 	bl	8005a2c <LCD_ShowString>
+ 80065b2:	f107 020c 	add.w	r2, r7, #12
+ 80065b6:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 80065ba:	9301      	str	r3, [sp, #4]
+ 80065bc:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 80065c0:	9300      	str	r3, [sp, #0]
+ 80065c2:	2310      	movs	r3, #16
+ 80065c4:	2152      	movs	r1, #82	; 0x52
+ 80065c6:	2000      	movs	r0, #0
+ 80065c8:	f7ff fa30 	bl	8005a2c <LCD_ShowString>
 			}
 		}
 		if(step==3)
- 80065dc:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 80065e0:	2b03      	cmp	r3, #3
- 80065e2:	d10f      	bne.n	8006604 <TP_adjustment+0x230>
+ 80065cc:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 80065d0:	2b03      	cmp	r3, #3
+ 80065d2:	d10f      	bne.n	80065f4 <TP_adjustment+0x230>
 		{
 			if(TPEN==1)
- 80065e4:	f44f 6180 	mov.w	r1, #1024	; 0x400
- 80065e8:	4870      	ldr	r0, [pc, #448]	; (80067ac <TP_adjustment+0x3d8>)
- 80065ea:	f7fb fe87 	bl	80022fc <HAL_GPIO_ReadPin>
- 80065ee:	4603      	mov	r3, r0
- 80065f0:	2b01      	cmp	r3, #1
- 80065f2:	d107      	bne.n	8006604 <TP_adjustment+0x230>
+ 80065d4:	f44f 6180 	mov.w	r1, #1024	; 0x400
+ 80065d8:	4867      	ldr	r0, [pc, #412]	; (8006778 <TP_adjustment+0x3b4>)
+ 80065da:	f7fb fe8f 	bl	80022fc <HAL_GPIO_ReadPin>
+ 80065de:	4603      	mov	r3, r0
+ 80065e0:	2b01      	cmp	r3, #1
+ 80065e2:	d107      	bne.n	80065f4 <TP_adjustment+0x230>
 			{
 				step+=1;
- 80065f4:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 80065f8:	3301      	adds	r3, #1
- 80065fa:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
+ 80065e4:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 80065e8:	3301      	adds	r3, #1
+ 80065ea:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
 				r=10;
- 80065fe:	230a      	movs	r3, #10
- 8006600:	f8a7 308c 	strh.w	r3, [r7, #140]	; 0x8c
+ 80065ee:	230a      	movs	r3, #10
+ 80065f0:	f8a7 308c 	strh.w	r3, [r7, #140]	; 0x8c
 			}
 
 		}
 		if(step==4)
- 8006604:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 8006608:	2b04      	cmp	r3, #4
- 800660a:	d12b      	bne.n	8006664 <TP_adjustment+0x290>
+ 80065f4:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 80065f8:	2b04      	cmp	r3, #4
+ 80065fa:	d12b      	bne.n	8006654 <TP_adjustment+0x290>
 		{
 			TP_DrwaTrage(30,210,r);
- 800660c:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
- 8006610:	461a      	mov	r2, r3
- 8006612:	21d2      	movs	r1, #210	; 0xd2
- 8006614:	201e      	movs	r0, #30
- 8006616:	f7ff fe81 	bl	800631c <TP_DrwaTrage>
+ 80065fc:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
+ 8006600:	461a      	mov	r2, r3
+ 8006602:	21d2      	movs	r1, #210	; 0xd2
+ 8006604:	201e      	movs	r0, #30
+ 8006606:	f7ff fe81 	bl	800630c <TP_DrwaTrage>
 			if(r==0)
- 800661a:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
- 800661e:	2b00      	cmp	r3, #0
- 8006620:	d120      	bne.n	8006664 <TP_adjustment+0x290>
+ 800660a:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
+ 800660e:	2b00      	cmp	r3, #0
+ 8006610:	d120      	bne.n	8006654 <TP_adjustment+0x290>
 			{
 				step+=1;
- 8006622:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 8006626:	3301      	adds	r3, #1
- 8006628:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
+ 8006612:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 8006616:	3301      	adds	r3, #1
+ 8006618:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
 				y3=y_adc;
- 800662c:	897b      	ldrh	r3, [r7, #10]
- 800662e:	f8a7 3086 	strh.w	r3, [r7, #134]	; 0x86
+ 800661c:	897b      	ldrh	r3, [r7, #10]
+ 800661e:	f8a7 3086 	strh.w	r3, [r7, #134]	; 0x86
 				x3=x_adc;
- 8006632:	893b      	ldrh	r3, [r7, #8]
- 8006634:	f8a7 307e 	strh.w	r3, [r7, #126]	; 0x7e
+ 8006622:	893b      	ldrh	r3, [r7, #8]
+ 8006624:	f8a7 307e 	strh.w	r3, [r7, #126]	; 0x7e
 				sprintf(str,"point_3 x:%d y:%d",x3,y3);
- 8006638:	f8b7 207e 	ldrh.w	r2, [r7, #126]	; 0x7e
- 800663c:	f8b7 3086 	ldrh.w	r3, [r7, #134]	; 0x86
- 8006640:	f107 000c 	add.w	r0, r7, #12
- 8006644:	495e      	ldr	r1, [pc, #376]	; (80067c0 <TP_adjustment+0x3ec>)
- 8006646:	f001 fe83 	bl	8008350 <siprintf>
+ 8006628:	f8b7 207e 	ldrh.w	r2, [r7, #126]	; 0x7e
+ 800662c:	f8b7 3086 	ldrh.w	r3, [r7, #134]	; 0x86
+ 8006630:	f107 000c 	add.w	r0, r7, #12
+ 8006634:	4955      	ldr	r1, [pc, #340]	; (800678c <TP_adjustment+0x3c8>)
+ 8006636:	f001 ff63 	bl	8008500 <siprintf>
 				LCD_ShowString(0,66+16+16,str,16,RED,RED);
- 800664a:	f107 020c 	add.w	r2, r7, #12
- 800664e:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 8006652:	9301      	str	r3, [sp, #4]
- 8006654:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 8006658:	9300      	str	r3, [sp, #0]
- 800665a:	2310      	movs	r3, #16
- 800665c:	2162      	movs	r1, #98	; 0x62
- 800665e:	2000      	movs	r0, #0
- 8006660:	f7ff f9e4 	bl	8005a2c <LCD_ShowString>
+ 800663a:	f107 020c 	add.w	r2, r7, #12
+ 800663e:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 8006642:	9301      	str	r3, [sp, #4]
+ 8006644:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 8006648:	9300      	str	r3, [sp, #0]
+ 800664a:	2310      	movs	r3, #16
+ 800664c:	2162      	movs	r1, #98	; 0x62
+ 800664e:	2000      	movs	r0, #0
+ 8006650:	f7ff f9ec 	bl	8005a2c <LCD_ShowString>
 			}
 		}
 		if(step==5)
- 8006664:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 8006668:	2b05      	cmp	r3, #5
- 800666a:	d10f      	bne.n	800668c <TP_adjustment+0x2b8>
+ 8006654:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 8006658:	2b05      	cmp	r3, #5
+ 800665a:	d10f      	bne.n	800667c <TP_adjustment+0x2b8>
 		{
 			if(TPEN==1)
- 800666c:	f44f 6180 	mov.w	r1, #1024	; 0x400
- 8006670:	484e      	ldr	r0, [pc, #312]	; (80067ac <TP_adjustment+0x3d8>)
- 8006672:	f7fb fe43 	bl	80022fc <HAL_GPIO_ReadPin>
- 8006676:	4603      	mov	r3, r0
- 8006678:	2b01      	cmp	r3, #1
- 800667a:	d107      	bne.n	800668c <TP_adjustment+0x2b8>
+ 800665c:	f44f 6180 	mov.w	r1, #1024	; 0x400
+ 8006660:	4845      	ldr	r0, [pc, #276]	; (8006778 <TP_adjustment+0x3b4>)
+ 8006662:	f7fb fe4b 	bl	80022fc <HAL_GPIO_ReadPin>
+ 8006666:	4603      	mov	r3, r0
+ 8006668:	2b01      	cmp	r3, #1
+ 800666a:	d107      	bne.n	800667c <TP_adjustment+0x2b8>
 			{
 				step+=1;
- 800667c:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 8006680:	3301      	adds	r3, #1
- 8006682:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
+ 800666c:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 8006670:	3301      	adds	r3, #1
+ 8006672:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
 				r=10;
- 8006686:	230a      	movs	r3, #10
- 8006688:	f8a7 308c 	strh.w	r3, [r7, #140]	; 0x8c
+ 8006676:	230a      	movs	r3, #10
+ 8006678:	f8a7 308c 	strh.w	r3, [r7, #140]	; 0x8c
 			}
 
 		}
 		if(step==6)
- 800668c:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 8006690:	2b06      	cmp	r3, #6
- 8006692:	d12c      	bne.n	80066ee <TP_adjustment+0x31a>
+ 800667c:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 8006680:	2b06      	cmp	r3, #6
+ 8006682:	d12c      	bne.n	80066de <TP_adjustment+0x31a>
 		{
 			TP_DrwaTrage(290,210,r);
- 8006694:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
- 8006698:	461a      	mov	r2, r3
- 800669a:	21d2      	movs	r1, #210	; 0xd2
- 800669c:	f44f 7091 	mov.w	r0, #290	; 0x122
- 80066a0:	f7ff fe3c 	bl	800631c <TP_DrwaTrage>
+ 8006684:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
+ 8006688:	461a      	mov	r2, r3
+ 800668a:	21d2      	movs	r1, #210	; 0xd2
+ 800668c:	f44f 7091 	mov.w	r0, #290	; 0x122
+ 8006690:	f7ff fe3c 	bl	800630c <TP_DrwaTrage>
 			if(r==0)
- 80066a4:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
- 80066a8:	2b00      	cmp	r3, #0
- 80066aa:	d120      	bne.n	80066ee <TP_adjustment+0x31a>
+ 8006694:	f8b7 308c 	ldrh.w	r3, [r7, #140]	; 0x8c
+ 8006698:	2b00      	cmp	r3, #0
+ 800669a:	d120      	bne.n	80066de <TP_adjustment+0x31a>
 			{
 				step+=1;
- 80066ac:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 80066b0:	3301      	adds	r3, #1
- 80066b2:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
+ 800669c:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 80066a0:	3301      	adds	r3, #1
+ 80066a2:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
 				y4=y_adc;
- 80066b6:	897b      	ldrh	r3, [r7, #10]
- 80066b8:	f8a7 3084 	strh.w	r3, [r7, #132]	; 0x84
+ 80066a6:	897b      	ldrh	r3, [r7, #10]
+ 80066a8:	f8a7 3084 	strh.w	r3, [r7, #132]	; 0x84
 				x4=x_adc;
- 80066bc:	893b      	ldrh	r3, [r7, #8]
- 80066be:	f8a7 307c 	strh.w	r3, [r7, #124]	; 0x7c
+ 80066ac:	893b      	ldrh	r3, [r7, #8]
+ 80066ae:	f8a7 307c 	strh.w	r3, [r7, #124]	; 0x7c
 				sprintf(str,"point_4 x:%d y:%d",x4,y4);
- 80066c2:	f8b7 207c 	ldrh.w	r2, [r7, #124]	; 0x7c
- 80066c6:	f8b7 3084 	ldrh.w	r3, [r7, #132]	; 0x84
- 80066ca:	f107 000c 	add.w	r0, r7, #12
- 80066ce:	493d      	ldr	r1, [pc, #244]	; (80067c4 <TP_adjustment+0x3f0>)
- 80066d0:	f001 fe3e 	bl	8008350 <siprintf>
+ 80066b2:	f8b7 207c 	ldrh.w	r2, [r7, #124]	; 0x7c
+ 80066b6:	f8b7 3084 	ldrh.w	r3, [r7, #132]	; 0x84
+ 80066ba:	f107 000c 	add.w	r0, r7, #12
+ 80066be:	4934      	ldr	r1, [pc, #208]	; (8006790 <TP_adjustment+0x3cc>)
+ 80066c0:	f001 ff1e 	bl	8008500 <siprintf>
 				LCD_ShowString(0,66+16+16+16,str,16,RED,RED);
- 80066d4:	f107 020c 	add.w	r2, r7, #12
- 80066d8:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 80066dc:	9301      	str	r3, [sp, #4]
- 80066de:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 80066e2:	9300      	str	r3, [sp, #0]
- 80066e4:	2310      	movs	r3, #16
- 80066e6:	2172      	movs	r1, #114	; 0x72
- 80066e8:	2000      	movs	r0, #0
- 80066ea:	f7ff f99f 	bl	8005a2c <LCD_ShowString>
+ 80066c4:	f107 020c 	add.w	r2, r7, #12
+ 80066c8:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 80066cc:	9301      	str	r3, [sp, #4]
+ 80066ce:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 80066d2:	9300      	str	r3, [sp, #0]
+ 80066d4:	2310      	movs	r3, #16
+ 80066d6:	2172      	movs	r1, #114	; 0x72
+ 80066d8:	2000      	movs	r0, #0
+ 80066da:	f7ff f9a7 	bl	8005a2c <LCD_ShowString>
 			}
 		}
 		if(step==7)
- 80066ee:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 80066f2:	2b07      	cmp	r3, #7
- 80066f4:	d10f      	bne.n	8006716 <TP_adjustment+0x342>
+ 80066de:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 80066e2:	2b07      	cmp	r3, #7
+ 80066e4:	d10f      	bne.n	8006706 <TP_adjustment+0x342>
 		{
 			if(TPEN==1)
- 80066f6:	f44f 6180 	mov.w	r1, #1024	; 0x400
- 80066fa:	482c      	ldr	r0, [pc, #176]	; (80067ac <TP_adjustment+0x3d8>)
- 80066fc:	f7fb fdfe 	bl	80022fc <HAL_GPIO_ReadPin>
- 8006700:	4603      	mov	r3, r0
- 8006702:	2b01      	cmp	r3, #1
- 8006704:	d107      	bne.n	8006716 <TP_adjustment+0x342>
+ 80066e6:	f44f 6180 	mov.w	r1, #1024	; 0x400
+ 80066ea:	4823      	ldr	r0, [pc, #140]	; (8006778 <TP_adjustment+0x3b4>)
+ 80066ec:	f7fb fe06 	bl	80022fc <HAL_GPIO_ReadPin>
+ 80066f0:	4603      	mov	r3, r0
+ 80066f2:	2b01      	cmp	r3, #1
+ 80066f4:	d107      	bne.n	8006706 <TP_adjustment+0x342>
 			{
 				step+=1;
- 8006706:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 800670a:	3301      	adds	r3, #1
- 800670c:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
+ 80066f6:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 80066fa:	3301      	adds	r3, #1
+ 80066fc:	f8a7 308e 	strh.w	r3, [r7, #142]	; 0x8e
 				r=10;
- 8006710:	230a      	movs	r3, #10
- 8006712:	f8a7 308c 	strh.w	r3, [r7, #140]	; 0x8c
+ 8006700:	230a      	movs	r3, #10
+ 8006702:	f8a7 308c 	strh.w	r3, [r7, #140]	; 0x8c
 			}
 		}
 		//当4个点读取完，开始计算关系
 		if(step==8)
- 8006716:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
- 800671a:	2b08      	cmp	r3, #8
- 800671c:	f040 8120 	bne.w	8006960 <TP_adjustment+0x58c>
+ 8006706:	f8b7 308e 	ldrh.w	r3, [r7, #142]	; 0x8e
+ 800670a:	2b08      	cmp	r3, #8
+ 800670c:	f040 8120 	bne.w	8006950 <TP_adjustment+0x58c>
 		{
 			//其实只需要两个点就能校准，通过取平均值获得xy的长边和短边
 			xd=((x1+x3)/2);
- 8006720:	f8b7 2082 	ldrh.w	r2, [r7, #130]	; 0x82
- 8006724:	f8b7 307e 	ldrh.w	r3, [r7, #126]	; 0x7e
- 8006728:	4413      	add	r3, r2
- 800672a:	0fda      	lsrs	r2, r3, #31
- 800672c:	4413      	add	r3, r2
- 800672e:	105b      	asrs	r3, r3, #1
- 8006730:	673b      	str	r3, [r7, #112]	; 0x70
+ 8006710:	f8b7 2082 	ldrh.w	r2, [r7, #130]	; 0x82
+ 8006714:	f8b7 307e 	ldrh.w	r3, [r7, #126]	; 0x7e
+ 8006718:	4413      	add	r3, r2
+ 800671a:	0fda      	lsrs	r2, r3, #31
+ 800671c:	4413      	add	r3, r2
+ 800671e:	105b      	asrs	r3, r3, #1
+ 8006720:	673b      	str	r3, [r7, #112]	; 0x70
 			xl=((x2+x4)/2);
- 8006732:	f8b7 2080 	ldrh.w	r2, [r7, #128]	; 0x80
- 8006736:	f8b7 307c 	ldrh.w	r3, [r7, #124]	; 0x7c
- 800673a:	4413      	add	r3, r2
- 800673c:	0fda      	lsrs	r2, r3, #31
- 800673e:	4413      	add	r3, r2
- 8006740:	105b      	asrs	r3, r3, #1
- 8006742:	66fb      	str	r3, [r7, #108]	; 0x6c
+ 8006722:	f8b7 2080 	ldrh.w	r2, [r7, #128]	; 0x80
+ 8006726:	f8b7 307c 	ldrh.w	r3, [r7, #124]	; 0x7c
+ 800672a:	4413      	add	r3, r2
+ 800672c:	0fda      	lsrs	r2, r3, #31
+ 800672e:	4413      	add	r3, r2
+ 8006730:	105b      	asrs	r3, r3, #1
+ 8006732:	66fb      	str	r3, [r7, #108]	; 0x6c
 			yd=((y1+y2)/2);
- 8006744:	f8b7 208a 	ldrh.w	r2, [r7, #138]	; 0x8a
- 8006748:	f8b7 3088 	ldrh.w	r3, [r7, #136]	; 0x88
- 800674c:	4413      	add	r3, r2
- 800674e:	0fda      	lsrs	r2, r3, #31
- 8006750:	4413      	add	r3, r2
- 8006752:	105b      	asrs	r3, r3, #1
- 8006754:	66bb      	str	r3, [r7, #104]	; 0x68
+ 8006734:	f8b7 208a 	ldrh.w	r2, [r7, #138]	; 0x8a
+ 8006738:	f8b7 3088 	ldrh.w	r3, [r7, #136]	; 0x88
+ 800673c:	4413      	add	r3, r2
+ 800673e:	0fda      	lsrs	r2, r3, #31
+ 8006740:	4413      	add	r3, r2
+ 8006742:	105b      	asrs	r3, r3, #1
+ 8006744:	66bb      	str	r3, [r7, #104]	; 0x68
 			yl=((y3+y4)/2);
- 8006756:	f8b7 2086 	ldrh.w	r2, [r7, #134]	; 0x86
- 800675a:	f8b7 3084 	ldrh.w	r3, [r7, #132]	; 0x84
- 800675e:	4413      	add	r3, r2
- 8006760:	0fda      	lsrs	r2, r3, #31
- 8006762:	4413      	add	r3, r2
- 8006764:	105b      	asrs	r3, r3, #1
- 8006766:	667b      	str	r3, [r7, #100]	; 0x64
+ 8006746:	f8b7 2086 	ldrh.w	r2, [r7, #134]	; 0x86
+ 800674a:	f8b7 3084 	ldrh.w	r3, [r7, #132]	; 0x84
+ 800674e:	4413      	add	r3, r2
+ 8006750:	0fda      	lsrs	r2, r3, #31
+ 8006752:	4413      	add	r3, r2
+ 8006754:	105b      	asrs	r3, r3, #1
+ 8006756:	667b      	str	r3, [r7, #100]	; 0x64
 			//长边减去短边可以再获得一个点
 			x5=xl-xd;
- 8006768:	6efa      	ldr	r2, [r7, #108]	; 0x6c
- 800676a:	6f3b      	ldr	r3, [r7, #112]	; 0x70
- 800676c:	1ad3      	subs	r3, r2, r3
- 800676e:	663b      	str	r3, [r7, #96]	; 0x60
+ 8006758:	6efa      	ldr	r2, [r7, #108]	; 0x6c
+ 800675a:	6f3b      	ldr	r3, [r7, #112]	; 0x70
+ 800675c:	1ad3      	subs	r3, r2, r3
+ 800675e:	663b      	str	r3, [r7, #96]	; 0x60
 			y5=yl-yd;
- 8006770:	6e7a      	ldr	r2, [r7, #100]	; 0x64
- 8006772:	6ebb      	ldr	r3, [r7, #104]	; 0x68
- 8006774:	1ad3      	subs	r3, r2, r3
- 8006776:	65fb      	str	r3, [r7, #92]	; 0x5c
+ 8006760:	6e7a      	ldr	r2, [r7, #100]	; 0x64
+ 8006762:	6ebb      	ldr	r3, [r7, #104]	; 0x68
+ 8006764:	1ad3      	subs	r3, r2, r3
+ 8006766:	65fb      	str	r3, [r7, #92]	; 0x5c
 			//这个点如果是负数，肯定有错，可能是xy搞反了
 			if(x5<0||y5<0)
- 8006778:	6e3b      	ldr	r3, [r7, #96]	; 0x60
- 800677a:	2b00      	cmp	r3, #0
- 800677c:	db02      	blt.n	8006784 <TP_adjustment+0x3b0>
- 800677e:	6dfb      	ldr	r3, [r7, #92]	; 0x5c
- 8006780:	2b00      	cmp	r3, #0
- 8006782:	da23      	bge.n	80067cc <TP_adjustment+0x3f8>
+ 8006768:	6e3b      	ldr	r3, [r7, #96]	; 0x60
+ 800676a:	2b00      	cmp	r3, #0
+ 800676c:	db12      	blt.n	8006794 <TP_adjustment+0x3d0>
+ 800676e:	6dfb      	ldr	r3, [r7, #92]	; 0x5c
+ 8006770:	2b00      	cmp	r3, #0
+ 8006772:	da23      	bge.n	80067bc <TP_adjustment+0x3f8>
+ 8006774:	e00e      	b.n	8006794 <TP_adjustment+0x3d0>
+ 8006776:	bf00      	nop
+ 8006778:	40011c00 	.word	0x40011c00
+ 800677c:	0800a67c 	.word	0x0800a67c
+ 8006780:	0800a688 	.word	0x0800a688
+ 8006784:	0800a694 	.word	0x0800a694
+ 8006788:	0800a6a8 	.word	0x0800a6a8
+ 800678c:	0800a6bc 	.word	0x0800a6bc
+ 8006790:	0800a6d0 	.word	0x0800a6d0
 			{
 				//显示error
 				sprintf(str,"ERROR");
- 8006784:	f107 030c 	add.w	r3, r7, #12
- 8006788:	490f      	ldr	r1, [pc, #60]	; (80067c8 <TP_adjustment+0x3f4>)
- 800678a:	4618      	mov	r0, r3
- 800678c:	f001 fde0 	bl	8008350 <siprintf>
+ 8006794:	f107 030c 	add.w	r3, r7, #12
+ 8006798:	4973      	ldr	r1, [pc, #460]	; (8006968 <TP_adjustment+0x5a4>)
+ 800679a:	4618      	mov	r0, r3
+ 800679c:	f001 feb0 	bl	8008500 <siprintf>
 				LCD_ShowString(0,66+16+16+16+16,str,16,RED, GRAY);
- 8006790:	f107 020c 	add.w	r2, r7, #12
- 8006794:	f248 4330 	movw	r3, #33840	; 0x8430
- 8006798:	9301      	str	r3, [sp, #4]
- 800679a:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 800679e:	9300      	str	r3, [sp, #0]
- 80067a0:	2310      	movs	r3, #16
- 80067a2:	2182      	movs	r1, #130	; 0x82
- 80067a4:	2000      	movs	r0, #0
- 80067a6:	f7ff f941 	bl	8005a2c <LCD_ShowString>
- 80067aa:	e0cf      	b.n	800694c <TP_adjustment+0x578>
- 80067ac:	40011c00 	.word	0x40011c00
- 80067b0:	0800a68c 	.word	0x0800a68c
- 80067b4:	0800a698 	.word	0x0800a698
- 80067b8:	0800a6a4 	.word	0x0800a6a4
- 80067bc:	0800a6b8 	.word	0x0800a6b8
- 80067c0:	0800a6cc 	.word	0x0800a6cc
- 80067c4:	0800a6e0 	.word	0x0800a6e0
- 80067c8:	0800a6f4 	.word	0x0800a6f4
+ 80067a0:	f107 020c 	add.w	r2, r7, #12
+ 80067a4:	f248 4330 	movw	r3, #33840	; 0x8430
+ 80067a8:	9301      	str	r3, [sp, #4]
+ 80067aa:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 80067ae:	9300      	str	r3, [sp, #0]
+ 80067b0:	2310      	movs	r3, #16
+ 80067b2:	2182      	movs	r1, #130	; 0x82
+ 80067b4:	2000      	movs	r0, #0
+ 80067b6:	f7ff f939 	bl	8005a2c <LCD_ShowString>
+ 80067ba:	e0bf      	b.n	800693c <TP_adjustment+0x578>
 			}else
 			{
 				//计算关系倍率
 				//ad的长边减去短边再除去实际屏幕像素的长边减短边（260=320-30-30，180=240-30-30）
 				acc_x=x5/260.0;
- 80067cc:	6e38      	ldr	r0, [r7, #96]	; 0x60
- 80067ce:	f7f9 fe85 	bl	80004dc <__aeabi_i2d>
- 80067d2:	f04f 0200 	mov.w	r2, #0
- 80067d6:	4b68      	ldr	r3, [pc, #416]	; (8006978 <TP_adjustment+0x5a4>)
- 80067d8:	f7fa f814 	bl	8000804 <__aeabi_ddiv>
- 80067dc:	4602      	mov	r2, r0
- 80067de:	460b      	mov	r3, r1
- 80067e0:	4610      	mov	r0, r2
- 80067e2:	4619      	mov	r1, r3
- 80067e4:	f7fa f9bc 	bl	8000b60 <__aeabi_d2f>
- 80067e8:	4603      	mov	r3, r0
- 80067ea:	65bb      	str	r3, [r7, #88]	; 0x58
+ 80067bc:	6e38      	ldr	r0, [r7, #96]	; 0x60
+ 80067be:	f7f9 fe8d 	bl	80004dc <__aeabi_i2d>
+ 80067c2:	f04f 0200 	mov.w	r2, #0
+ 80067c6:	4b69      	ldr	r3, [pc, #420]	; (800696c <TP_adjustment+0x5a8>)
+ 80067c8:	f7fa f81c 	bl	8000804 <__aeabi_ddiv>
+ 80067cc:	4602      	mov	r2, r0
+ 80067ce:	460b      	mov	r3, r1
+ 80067d0:	4610      	mov	r0, r2
+ 80067d2:	4619      	mov	r1, r3
+ 80067d4:	f7fa f9c4 	bl	8000b60 <__aeabi_d2f>
+ 80067d8:	4603      	mov	r3, r0
+ 80067da:	65bb      	str	r3, [r7, #88]	; 0x58
 				acc_y=y5/180.0;
- 80067ec:	6df8      	ldr	r0, [r7, #92]	; 0x5c
- 80067ee:	f7f9 fe75 	bl	80004dc <__aeabi_i2d>
- 80067f2:	f04f 0200 	mov.w	r2, #0
- 80067f6:	4b61      	ldr	r3, [pc, #388]	; (800697c <TP_adjustment+0x5a8>)
- 80067f8:	f7fa f804 	bl	8000804 <__aeabi_ddiv>
- 80067fc:	4602      	mov	r2, r0
- 80067fe:	460b      	mov	r3, r1
- 8006800:	4610      	mov	r0, r2
- 8006802:	4619      	mov	r1, r3
- 8006804:	f7fa f9ac 	bl	8000b60 <__aeabi_d2f>
- 8006808:	4603      	mov	r3, r0
- 800680a:	657b      	str	r3, [r7, #84]	; 0x54
+ 80067dc:	6df8      	ldr	r0, [r7, #92]	; 0x5c
+ 80067de:	f7f9 fe7d 	bl	80004dc <__aeabi_i2d>
+ 80067e2:	f04f 0200 	mov.w	r2, #0
+ 80067e6:	4b62      	ldr	r3, [pc, #392]	; (8006970 <TP_adjustment+0x5ac>)
+ 80067e8:	f7fa f80c 	bl	8000804 <__aeabi_ddiv>
+ 80067ec:	4602      	mov	r2, r0
+ 80067ee:	460b      	mov	r3, r1
+ 80067f0:	4610      	mov	r0, r2
+ 80067f2:	4619      	mov	r1, r3
+ 80067f4:	f7fa f9b4 	bl	8000b60 <__aeabi_d2f>
+ 80067f8:	4603      	mov	r3, r0
+ 80067fa:	657b      	str	r3, [r7, #84]	; 0x54
 				//验证倍率，将实际值减去验证值就等于误差值，因为有两个点，所以计算了两个误差后求了平均值
 				offset_x=(((xd/acc_x)-30)+((xl/acc_x)-290))/2;
- 800680c:	6f38      	ldr	r0, [r7, #112]	; 0x70
- 800680e:	f7fa fab1 	bl	8000d74 <__aeabi_i2f>
- 8006812:	4603      	mov	r3, r0
- 8006814:	6db9      	ldr	r1, [r7, #88]	; 0x58
- 8006816:	4618      	mov	r0, r3
- 8006818:	f7fa fbb4 	bl	8000f84 <__aeabi_fdiv>
- 800681c:	4603      	mov	r3, r0
- 800681e:	4958      	ldr	r1, [pc, #352]	; (8006980 <TP_adjustment+0x5ac>)
- 8006820:	4618      	mov	r0, r3
- 8006822:	f7fa f9f1 	bl	8000c08 <__aeabi_fsub>
- 8006826:	4603      	mov	r3, r0
- 8006828:	461c      	mov	r4, r3
- 800682a:	6ef8      	ldr	r0, [r7, #108]	; 0x6c
- 800682c:	f7fa faa2 	bl	8000d74 <__aeabi_i2f>
- 8006830:	4603      	mov	r3, r0
- 8006832:	6db9      	ldr	r1, [r7, #88]	; 0x58
- 8006834:	4618      	mov	r0, r3
- 8006836:	f7fa fba5 	bl	8000f84 <__aeabi_fdiv>
- 800683a:	4603      	mov	r3, r0
- 800683c:	4951      	ldr	r1, [pc, #324]	; (8006984 <TP_adjustment+0x5b0>)
- 800683e:	4618      	mov	r0, r3
- 8006840:	f7fa f9e2 	bl	8000c08 <__aeabi_fsub>
- 8006844:	4603      	mov	r3, r0
- 8006846:	4619      	mov	r1, r3
- 8006848:	4620      	mov	r0, r4
- 800684a:	f7fa f9df 	bl	8000c0c <__addsf3>
- 800684e:	4603      	mov	r3, r0
- 8006850:	f04f 4180 	mov.w	r1, #1073741824	; 0x40000000
- 8006854:	4618      	mov	r0, r3
- 8006856:	f7fa fb95 	bl	8000f84 <__aeabi_fdiv>
- 800685a:	4603      	mov	r3, r0
- 800685c:	4618      	mov	r0, r3
- 800685e:	f7fa fc2d 	bl	80010bc <__aeabi_f2iz>
- 8006862:	4603      	mov	r3, r0
- 8006864:	653b      	str	r3, [r7, #80]	; 0x50
+ 80067fc:	6f38      	ldr	r0, [r7, #112]	; 0x70
+ 80067fe:	f7fa fab9 	bl	8000d74 <__aeabi_i2f>
+ 8006802:	4603      	mov	r3, r0
+ 8006804:	6db9      	ldr	r1, [r7, #88]	; 0x58
+ 8006806:	4618      	mov	r0, r3
+ 8006808:	f7fa fbbc 	bl	8000f84 <__aeabi_fdiv>
+ 800680c:	4603      	mov	r3, r0
+ 800680e:	4959      	ldr	r1, [pc, #356]	; (8006974 <TP_adjustment+0x5b0>)
+ 8006810:	4618      	mov	r0, r3
+ 8006812:	f7fa f9f9 	bl	8000c08 <__aeabi_fsub>
+ 8006816:	4603      	mov	r3, r0
+ 8006818:	461c      	mov	r4, r3
+ 800681a:	6ef8      	ldr	r0, [r7, #108]	; 0x6c
+ 800681c:	f7fa faaa 	bl	8000d74 <__aeabi_i2f>
+ 8006820:	4603      	mov	r3, r0
+ 8006822:	6db9      	ldr	r1, [r7, #88]	; 0x58
+ 8006824:	4618      	mov	r0, r3
+ 8006826:	f7fa fbad 	bl	8000f84 <__aeabi_fdiv>
+ 800682a:	4603      	mov	r3, r0
+ 800682c:	4952      	ldr	r1, [pc, #328]	; (8006978 <TP_adjustment+0x5b4>)
+ 800682e:	4618      	mov	r0, r3
+ 8006830:	f7fa f9ea 	bl	8000c08 <__aeabi_fsub>
+ 8006834:	4603      	mov	r3, r0
+ 8006836:	4619      	mov	r1, r3
+ 8006838:	4620      	mov	r0, r4
+ 800683a:	f7fa f9e7 	bl	8000c0c <__addsf3>
+ 800683e:	4603      	mov	r3, r0
+ 8006840:	f04f 4180 	mov.w	r1, #1073741824	; 0x40000000
+ 8006844:	4618      	mov	r0, r3
+ 8006846:	f7fa fb9d 	bl	8000f84 <__aeabi_fdiv>
+ 800684a:	4603      	mov	r3, r0
+ 800684c:	4618      	mov	r0, r3
+ 800684e:	f7fa fc35 	bl	80010bc <__aeabi_f2iz>
+ 8006852:	4603      	mov	r3, r0
+ 8006854:	653b      	str	r3, [r7, #80]	; 0x50
 				offset_y=(((yd/acc_y)-30)+((yl/acc_y)-210))/2;
- 8006866:	6eb8      	ldr	r0, [r7, #104]	; 0x68
- 8006868:	f7fa fa84 	bl	8000d74 <__aeabi_i2f>
- 800686c:	4603      	mov	r3, r0
- 800686e:	6d79      	ldr	r1, [r7, #84]	; 0x54
- 8006870:	4618      	mov	r0, r3
- 8006872:	f7fa fb87 	bl	8000f84 <__aeabi_fdiv>
- 8006876:	4603      	mov	r3, r0
- 8006878:	4941      	ldr	r1, [pc, #260]	; (8006980 <TP_adjustment+0x5ac>)
- 800687a:	4618      	mov	r0, r3
- 800687c:	f7fa f9c4 	bl	8000c08 <__aeabi_fsub>
- 8006880:	4603      	mov	r3, r0
- 8006882:	461c      	mov	r4, r3
- 8006884:	6e78      	ldr	r0, [r7, #100]	; 0x64
- 8006886:	f7fa fa75 	bl	8000d74 <__aeabi_i2f>
- 800688a:	4603      	mov	r3, r0
- 800688c:	6d79      	ldr	r1, [r7, #84]	; 0x54
- 800688e:	4618      	mov	r0, r3
- 8006890:	f7fa fb78 	bl	8000f84 <__aeabi_fdiv>
- 8006894:	4603      	mov	r3, r0
- 8006896:	493c      	ldr	r1, [pc, #240]	; (8006988 <TP_adjustment+0x5b4>)
- 8006898:	4618      	mov	r0, r3
- 800689a:	f7fa f9b5 	bl	8000c08 <__aeabi_fsub>
- 800689e:	4603      	mov	r3, r0
- 80068a0:	4619      	mov	r1, r3
- 80068a2:	4620      	mov	r0, r4
- 80068a4:	f7fa f9b2 	bl	8000c0c <__addsf3>
- 80068a8:	4603      	mov	r3, r0
- 80068aa:	f04f 4180 	mov.w	r1, #1073741824	; 0x40000000
- 80068ae:	4618      	mov	r0, r3
- 80068b0:	f7fa fb68 	bl	8000f84 <__aeabi_fdiv>
- 80068b4:	4603      	mov	r3, r0
- 80068b6:	4618      	mov	r0, r3
- 80068b8:	f7fa fc00 	bl	80010bc <__aeabi_f2iz>
- 80068bc:	4603      	mov	r3, r0
- 80068be:	64fb      	str	r3, [r7, #76]	; 0x4c
+ 8006856:	6eb8      	ldr	r0, [r7, #104]	; 0x68
+ 8006858:	f7fa fa8c 	bl	8000d74 <__aeabi_i2f>
+ 800685c:	4603      	mov	r3, r0
+ 800685e:	6d79      	ldr	r1, [r7, #84]	; 0x54
+ 8006860:	4618      	mov	r0, r3
+ 8006862:	f7fa fb8f 	bl	8000f84 <__aeabi_fdiv>
+ 8006866:	4603      	mov	r3, r0
+ 8006868:	4942      	ldr	r1, [pc, #264]	; (8006974 <TP_adjustment+0x5b0>)
+ 800686a:	4618      	mov	r0, r3
+ 800686c:	f7fa f9cc 	bl	8000c08 <__aeabi_fsub>
+ 8006870:	4603      	mov	r3, r0
+ 8006872:	461c      	mov	r4, r3
+ 8006874:	6e78      	ldr	r0, [r7, #100]	; 0x64
+ 8006876:	f7fa fa7d 	bl	8000d74 <__aeabi_i2f>
+ 800687a:	4603      	mov	r3, r0
+ 800687c:	6d79      	ldr	r1, [r7, #84]	; 0x54
+ 800687e:	4618      	mov	r0, r3
+ 8006880:	f7fa fb80 	bl	8000f84 <__aeabi_fdiv>
+ 8006884:	4603      	mov	r3, r0
+ 8006886:	493d      	ldr	r1, [pc, #244]	; (800697c <TP_adjustment+0x5b8>)
+ 8006888:	4618      	mov	r0, r3
+ 800688a:	f7fa f9bd 	bl	8000c08 <__aeabi_fsub>
+ 800688e:	4603      	mov	r3, r0
+ 8006890:	4619      	mov	r1, r3
+ 8006892:	4620      	mov	r0, r4
+ 8006894:	f7fa f9ba 	bl	8000c0c <__addsf3>
+ 8006898:	4603      	mov	r3, r0
+ 800689a:	f04f 4180 	mov.w	r1, #1073741824	; 0x40000000
+ 800689e:	4618      	mov	r0, r3
+ 80068a0:	f7fa fb70 	bl	8000f84 <__aeabi_fdiv>
+ 80068a4:	4603      	mov	r3, r0
+ 80068a6:	4618      	mov	r0, r3
+ 80068a8:	f7fa fc08 	bl	80010bc <__aeabi_f2iz>
+ 80068ac:	4603      	mov	r3, r0
+ 80068ae:	64fb      	str	r3, [r7, #76]	; 0x4c
 				//保存计算结果
 				tconfig.x_acc=acc_x;
- 80068c0:	4a32      	ldr	r2, [pc, #200]	; (800698c <TP_adjustment+0x5b8>)
- 80068c2:	6dbb      	ldr	r3, [r7, #88]	; 0x58
- 80068c4:	6053      	str	r3, [r2, #4]
+ 80068b0:	4a33      	ldr	r2, [pc, #204]	; (8006980 <TP_adjustment+0x5bc>)
+ 80068b2:	6dbb      	ldr	r3, [r7, #88]	; 0x58
+ 80068b4:	6053      	str	r3, [r2, #4]
 				tconfig.x_offset=offset_x;
- 80068c6:	4a31      	ldr	r2, [pc, #196]	; (800698c <TP_adjustment+0x5b8>)
- 80068c8:	6d3b      	ldr	r3, [r7, #80]	; 0x50
- 80068ca:	60d3      	str	r3, [r2, #12]
+ 80068b6:	4a32      	ldr	r2, [pc, #200]	; (8006980 <TP_adjustment+0x5bc>)
+ 80068b8:	6d3b      	ldr	r3, [r7, #80]	; 0x50
+ 80068ba:	60d3      	str	r3, [r2, #12]
 				tconfig.y_acc=acc_y;
- 80068cc:	4a2f      	ldr	r2, [pc, #188]	; (800698c <TP_adjustment+0x5b8>)
- 80068ce:	6d7b      	ldr	r3, [r7, #84]	; 0x54
- 80068d0:	6093      	str	r3, [r2, #8]
+ 80068bc:	4a30      	ldr	r2, [pc, #192]	; (8006980 <TP_adjustment+0x5bc>)
+ 80068be:	6d7b      	ldr	r3, [r7, #84]	; 0x54
+ 80068c0:	6093      	str	r3, [r2, #8]
 				tconfig.y_offset=offset_y;
- 80068d2:	4a2e      	ldr	r2, [pc, #184]	; (800698c <TP_adjustment+0x5b8>)
- 80068d4:	6cfb      	ldr	r3, [r7, #76]	; 0x4c
- 80068d6:	6113      	str	r3, [r2, #16]
+ 80068c2:	4a2f      	ldr	r2, [pc, #188]	; (8006980 <TP_adjustment+0x5bc>)
+ 80068c4:	6cfb      	ldr	r3, [r7, #76]	; 0x4c
+ 80068c6:	6113      	str	r3, [r2, #16]
 				//eeprom块标记
 				tconfig.begin=0xab;
- 80068d8:	4b2c      	ldr	r3, [pc, #176]	; (800698c <TP_adjustment+0x5b8>)
- 80068da:	22ab      	movs	r2, #171	; 0xab
- 80068dc:	701a      	strb	r2, [r3, #0]
+ 80068c8:	4b2d      	ldr	r3, [pc, #180]	; (8006980 <TP_adjustment+0x5bc>)
+ 80068ca:	22ab      	movs	r2, #171	; 0xab
+ 80068cc:	701a      	strb	r2, [r3, #0]
 				tconfig.end=0xcd;
- 80068de:	4b2b      	ldr	r3, [pc, #172]	; (800698c <TP_adjustment+0x5b8>)
- 80068e0:	22cd      	movs	r2, #205	; 0xcd
- 80068e2:	751a      	strb	r2, [r3, #20]
+ 80068ce:	4b2c      	ldr	r3, [pc, #176]	; (8006980 <TP_adjustment+0x5bc>)
+ 80068d0:	22cd      	movs	r2, #205	; 0xcd
+ 80068d2:	751a      	strb	r2, [r3, #20]
 
 				//显示计算结果
 				sprintf(str,"x_acc=%f y_acc=%f",acc_x,acc_y);
- 80068e4:	6db8      	ldr	r0, [r7, #88]	; 0x58
- 80068e6:	f7f9 fe0b 	bl	8000500 <__aeabi_f2d>
- 80068ea:	4604      	mov	r4, r0
- 80068ec:	460d      	mov	r5, r1
- 80068ee:	6d78      	ldr	r0, [r7, #84]	; 0x54
- 80068f0:	f7f9 fe06 	bl	8000500 <__aeabi_f2d>
- 80068f4:	4602      	mov	r2, r0
- 80068f6:	460b      	mov	r3, r1
- 80068f8:	f107 000c 	add.w	r0, r7, #12
- 80068fc:	e9cd 2300 	strd	r2, r3, [sp]
- 8006900:	4622      	mov	r2, r4
- 8006902:	462b      	mov	r3, r5
- 8006904:	4922      	ldr	r1, [pc, #136]	; (8006990 <TP_adjustment+0x5bc>)
- 8006906:	f001 fd23 	bl	8008350 <siprintf>
+ 80068d4:	6db8      	ldr	r0, [r7, #88]	; 0x58
+ 80068d6:	f7f9 fe13 	bl	8000500 <__aeabi_f2d>
+ 80068da:	4604      	mov	r4, r0
+ 80068dc:	460d      	mov	r5, r1
+ 80068de:	6d78      	ldr	r0, [r7, #84]	; 0x54
+ 80068e0:	f7f9 fe0e 	bl	8000500 <__aeabi_f2d>
+ 80068e4:	4602      	mov	r2, r0
+ 80068e6:	460b      	mov	r3, r1
+ 80068e8:	f107 000c 	add.w	r0, r7, #12
+ 80068ec:	e9cd 2300 	strd	r2, r3, [sp]
+ 80068f0:	4622      	mov	r2, r4
+ 80068f2:	462b      	mov	r3, r5
+ 80068f4:	4923      	ldr	r1, [pc, #140]	; (8006984 <TP_adjustment+0x5c0>)
+ 80068f6:	f001 fe03 	bl	8008500 <siprintf>
 				LCD_ShowString(0,66+16+16+16+16,str,16,RED,RED);
- 800690a:	f107 020c 	add.w	r2, r7, #12
- 800690e:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 8006912:	9301      	str	r3, [sp, #4]
- 8006914:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 8006918:	9300      	str	r3, [sp, #0]
- 800691a:	2310      	movs	r3, #16
- 800691c:	2182      	movs	r1, #130	; 0x82
- 800691e:	2000      	movs	r0, #0
- 8006920:	f7ff f884 	bl	8005a2c <LCD_ShowString>
+ 80068fa:	f107 020c 	add.w	r2, r7, #12
+ 80068fe:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 8006902:	9301      	str	r3, [sp, #4]
+ 8006904:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 8006908:	9300      	str	r3, [sp, #0]
+ 800690a:	2310      	movs	r3, #16
+ 800690c:	2182      	movs	r1, #130	; 0x82
+ 800690e:	2000      	movs	r0, #0
+ 8006910:	f7ff f88c 	bl	8005a2c <LCD_ShowString>
 				sprintf(str,"x_offset=%d y_offset=%d",offset_x,offset_y);
- 8006924:	f107 000c 	add.w	r0, r7, #12
- 8006928:	6cfb      	ldr	r3, [r7, #76]	; 0x4c
- 800692a:	6d3a      	ldr	r2, [r7, #80]	; 0x50
- 800692c:	4919      	ldr	r1, [pc, #100]	; (8006994 <TP_adjustment+0x5c0>)
- 800692e:	f001 fd0f 	bl	8008350 <siprintf>
+ 8006914:	f107 000c 	add.w	r0, r7, #12
+ 8006918:	6cfb      	ldr	r3, [r7, #76]	; 0x4c
+ 800691a:	6d3a      	ldr	r2, [r7, #80]	; 0x50
+ 800691c:	491a      	ldr	r1, [pc, #104]	; (8006988 <TP_adjustment+0x5c4>)
+ 800691e:	f001 fdef 	bl	8008500 <siprintf>
 				LCD_ShowString(0,66+16+16+16+16+16,str,16,RED,RED);
- 8006932:	f107 020c 	add.w	r2, r7, #12
- 8006936:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 800693a:	9301      	str	r3, [sp, #4]
- 800693c:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 8006940:	9300      	str	r3, [sp, #0]
- 8006942:	2310      	movs	r3, #16
- 8006944:	2192      	movs	r1, #146	; 0x92
- 8006946:	2000      	movs	r0, #0
- 8006948:	f7ff f870 	bl	8005a2c <LCD_ShowString>
+ 8006922:	f107 020c 	add.w	r2, r7, #12
+ 8006926:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 800692a:	9301      	str	r3, [sp, #4]
+ 800692c:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 8006930:	9300      	str	r3, [sp, #0]
+ 8006932:	2310      	movs	r3, #16
+ 8006934:	2192      	movs	r1, #146	; 0x92
+ 8006936:	2000      	movs	r0, #0
+ 8006938:	f7ff f878 	bl	8005a2c <LCD_ShowString>
 
 			}
 			//将结果保存起来
 			EEPROM_WRITE_BATY(16,(char *)&tconfig,sizeof(touch_config));
- 800694c:	2218      	movs	r2, #24
- 800694e:	490f      	ldr	r1, [pc, #60]	; (800698c <TP_adjustment+0x5b8>)
- 8006950:	2010      	movs	r0, #16
- 8006952:	f7ff f9ef 	bl	8005d34 <EEPROM_WRITE_BATY>
+ 800693c:	2218      	movs	r2, #24
+ 800693e:	4910      	ldr	r1, [pc, #64]	; (8006980 <TP_adjustment+0x5bc>)
+ 8006940:	2010      	movs	r0, #16
+ 8006942:	f7ff f9f7 	bl	8005d34 <EEPROM_WRITE_BATY>
 			HAL_Delay(1000);
- 8006956:	f44f 707a 	mov.w	r0, #1000	; 0x3e8
- 800695a:	f7fb fa09 	bl	8001d70 <HAL_Delay>
+ 8006946:	f44f 707a 	mov.w	r0, #1000	; 0x3e8
+ 800694a:	f7fb fa11 	bl	8001d70 <HAL_Delay>
 			return;
- 800695e:	e008      	b.n	8006972 <TP_adjustment+0x59e>
+ 800694e:	e008      	b.n	8006962 <TP_adjustment+0x59e>
 	while(HAL_GetTick()<wait)
- 8006960:	f7fb f9fc 	bl	8001d5c <HAL_GetTick>
- 8006964:	4602      	mov	r2, r0
- 8006966:	6fbb      	ldr	r3, [r7, #120]	; 0x78
- 8006968:	4293      	cmp	r3, r2
- 800696a:	f63f ad6d 	bhi.w	8006448 <TP_adjustment+0x74>
- 800696e:	e000      	b.n	8006972 <TP_adjustment+0x59e>
+ 8006950:	f7fb fa04 	bl	8001d5c <HAL_GetTick>
+ 8006954:	4602      	mov	r2, r0
+ 8006956:	6fbb      	ldr	r3, [r7, #120]	; 0x78
+ 8006958:	4293      	cmp	r3, r2
+ 800695a:	f63f ad6d 	bhi.w	8006438 <TP_adjustment+0x74>
+ 800695e:	e000      	b.n	8006962 <TP_adjustment+0x59e>
 		return;												//已经校准过了
- 8006970:	bf00      	nop
+ 8006960:	bf00      	nop
 
 		}
 	}
 
 }
- 8006972:	3790      	adds	r7, #144	; 0x90
- 8006974:	46bd      	mov	sp, r7
- 8006976:	bdb0      	pop	{r4, r5, r7, pc}
- 8006978:	40704000 	.word	0x40704000
- 800697c:	40668000 	.word	0x40668000
- 8006980:	41f00000 	.word	0x41f00000
- 8006984:	43910000 	.word	0x43910000
- 8006988:	43520000 	.word	0x43520000
- 800698c:	20000408 	.word	0x20000408
- 8006990:	0800a6fc 	.word	0x0800a6fc
- 8006994:	0800a710 	.word	0x0800a710
+ 8006962:	3790      	adds	r7, #144	; 0x90
+ 8006964:	46bd      	mov	sp, r7
+ 8006966:	bdb0      	pop	{r4, r5, r7, pc}
+ 8006968:	0800a6e4 	.word	0x0800a6e4
+ 800696c:	40704000 	.word	0x40704000
+ 8006970:	40668000 	.word	0x40668000
+ 8006974:	41f00000 	.word	0x41f00000
+ 8006978:	43910000 	.word	0x43910000
+ 800697c:	43520000 	.word	0x43520000
+ 8006980:	200003ec 	.word	0x200003ec
+ 8006984:	0800a6ec 	.word	0x0800a6ec
+ 8006988:	0800a700 	.word	0x0800a700
 
-08006998 <max30102_read_fifo>:
+0800698c <max30102_read_fifo>:
 	IIC_SAND_DATE(MAX30102_Device_address,REG_LED2_PA,&a,1);// Choose value for ~ 10mA for LED2
 	a=0x7f;
 	IIC_SAND_DATE(MAX30102_Device_address,REG_PILOT_PA,&a,1);// Choose value for ~ 25mA for Pilot LED
 }
 void max30102_read_fifo(void)
 {
- 8006998:	b580      	push	{r7, lr}
- 800699a:	b082      	sub	sp, #8
- 800699c:	af00      	add	r7, sp, #0
+ 800698c:	b580      	push	{r7, lr}
+ 800698e:	b082      	sub	sp, #8
+ 8006990:	af00      	add	r7, sp, #0
   uint16_t un_temp;
   fifo_red=0;
- 800699e:	4b3c      	ldr	r3, [pc, #240]	; (8006a90 <max30102_read_fifo+0xf8>)
- 80069a0:	2200      	movs	r2, #0
- 80069a2:	801a      	strh	r2, [r3, #0]
+ 8006992:	4b3c      	ldr	r3, [pc, #240]	; (8006a84 <max30102_read_fifo+0xf8>)
+ 8006994:	2200      	movs	r2, #0
+ 8006996:	801a      	strh	r2, [r3, #0]
   fifo_ir=0;
- 80069a4:	4b3b      	ldr	r3, [pc, #236]	; (8006a94 <max30102_read_fifo+0xfc>)
- 80069a6:	2200      	movs	r2, #0
- 80069a8:	801a      	strh	r2, [r3, #0]
+ 8006998:	4b3b      	ldr	r3, [pc, #236]	; (8006a88 <max30102_read_fifo+0xfc>)
+ 800699a:	2200      	movs	r2, #0
+ 800699c:	801a      	strh	r2, [r3, #0]
   uint8_t ach_i2c_data[6];
 
   //read and clear status register
   IIC_READ_DATE(MAX30102_Device_address,REG_INTR_STATUS_1,&ach_i2c_data,1);
+ 800699e:	463a      	mov	r2, r7
+ 80069a0:	2301      	movs	r3, #1
+ 80069a2:	2100      	movs	r1, #0
+ 80069a4:	20ae      	movs	r0, #174	; 0xae
+ 80069a6:	f7ff fa29 	bl	8005dfc <IIC_READ_DATE>
+  IIC_READ_DATE(MAX30102_Device_address,REG_INTR_STATUS_2,&ach_i2c_data,1);
  80069aa:	463a      	mov	r2, r7
  80069ac:	2301      	movs	r3, #1
- 80069ae:	2100      	movs	r1, #0
+ 80069ae:	2101      	movs	r1, #1
  80069b0:	20ae      	movs	r0, #174	; 0xae
  80069b2:	f7ff fa23 	bl	8005dfc <IIC_READ_DATE>
-  IIC_READ_DATE(MAX30102_Device_address,REG_INTR_STATUS_2,&ach_i2c_data,1);
- 80069b6:	463a      	mov	r2, r7
- 80069b8:	2301      	movs	r3, #1
- 80069ba:	2101      	movs	r1, #1
- 80069bc:	20ae      	movs	r0, #174	; 0xae
- 80069be:	f7ff fa1d 	bl	8005dfc <IIC_READ_DATE>
 
   ach_i2c_data[0]=REG_FIFO_DATA;
- 80069c2:	2307      	movs	r3, #7
- 80069c4:	703b      	strb	r3, [r7, #0]
+ 80069b6:	2307      	movs	r3, #7
+ 80069b8:	703b      	strb	r3, [r7, #0]
 
   IIC_READ_DATE(MAX30102_Device_address,REG_FIFO_DATA,&ach_i2c_data,6);
- 80069c6:	463a      	mov	r2, r7
- 80069c8:	2306      	movs	r3, #6
- 80069ca:	2107      	movs	r1, #7
- 80069cc:	20ae      	movs	r0, #174	; 0xae
- 80069ce:	f7ff fa15 	bl	8005dfc <IIC_READ_DATE>
+ 80069ba:	463a      	mov	r2, r7
+ 80069bc:	2306      	movs	r3, #6
+ 80069be:	2107      	movs	r1, #7
+ 80069c0:	20ae      	movs	r0, #174	; 0xae
+ 80069c2:	f7ff fa1b 	bl	8005dfc <IIC_READ_DATE>
 
   un_temp=ach_i2c_data[0];
- 80069d2:	783b      	ldrb	r3, [r7, #0]
- 80069d4:	80fb      	strh	r3, [r7, #6]
+ 80069c6:	783b      	ldrb	r3, [r7, #0]
+ 80069c8:	80fb      	strh	r3, [r7, #6]
   un_temp<<=14;
- 80069d6:	88fb      	ldrh	r3, [r7, #6]
- 80069d8:	039b      	lsls	r3, r3, #14
- 80069da:	80fb      	strh	r3, [r7, #6]
+ 80069ca:	88fb      	ldrh	r3, [r7, #6]
+ 80069cc:	039b      	lsls	r3, r3, #14
+ 80069ce:	80fb      	strh	r3, [r7, #6]
   fifo_red+=un_temp;
- 80069dc:	4b2c      	ldr	r3, [pc, #176]	; (8006a90 <max30102_read_fifo+0xf8>)
- 80069de:	881a      	ldrh	r2, [r3, #0]
- 80069e0:	88fb      	ldrh	r3, [r7, #6]
- 80069e2:	4413      	add	r3, r2
- 80069e4:	b29a      	uxth	r2, r3
- 80069e6:	4b2a      	ldr	r3, [pc, #168]	; (8006a90 <max30102_read_fifo+0xf8>)
- 80069e8:	801a      	strh	r2, [r3, #0]
+ 80069d0:	4b2c      	ldr	r3, [pc, #176]	; (8006a84 <max30102_read_fifo+0xf8>)
+ 80069d2:	881a      	ldrh	r2, [r3, #0]
+ 80069d4:	88fb      	ldrh	r3, [r7, #6]
+ 80069d6:	4413      	add	r3, r2
+ 80069d8:	b29a      	uxth	r2, r3
+ 80069da:	4b2a      	ldr	r3, [pc, #168]	; (8006a84 <max30102_read_fifo+0xf8>)
+ 80069dc:	801a      	strh	r2, [r3, #0]
   un_temp=ach_i2c_data[1];
- 80069ea:	787b      	ldrb	r3, [r7, #1]
- 80069ec:	80fb      	strh	r3, [r7, #6]
+ 80069de:	787b      	ldrb	r3, [r7, #1]
+ 80069e0:	80fb      	strh	r3, [r7, #6]
   un_temp<<=6;
- 80069ee:	88fb      	ldrh	r3, [r7, #6]
- 80069f0:	019b      	lsls	r3, r3, #6
- 80069f2:	80fb      	strh	r3, [r7, #6]
+ 80069e2:	88fb      	ldrh	r3, [r7, #6]
+ 80069e4:	019b      	lsls	r3, r3, #6
+ 80069e6:	80fb      	strh	r3, [r7, #6]
   fifo_red+=un_temp;
- 80069f4:	4b26      	ldr	r3, [pc, #152]	; (8006a90 <max30102_read_fifo+0xf8>)
- 80069f6:	881a      	ldrh	r2, [r3, #0]
- 80069f8:	88fb      	ldrh	r3, [r7, #6]
- 80069fa:	4413      	add	r3, r2
- 80069fc:	b29a      	uxth	r2, r3
- 80069fe:	4b24      	ldr	r3, [pc, #144]	; (8006a90 <max30102_read_fifo+0xf8>)
- 8006a00:	801a      	strh	r2, [r3, #0]
+ 80069e8:	4b26      	ldr	r3, [pc, #152]	; (8006a84 <max30102_read_fifo+0xf8>)
+ 80069ea:	881a      	ldrh	r2, [r3, #0]
+ 80069ec:	88fb      	ldrh	r3, [r7, #6]
+ 80069ee:	4413      	add	r3, r2
+ 80069f0:	b29a      	uxth	r2, r3
+ 80069f2:	4b24      	ldr	r3, [pc, #144]	; (8006a84 <max30102_read_fifo+0xf8>)
+ 80069f4:	801a      	strh	r2, [r3, #0]
   un_temp=ach_i2c_data[2];
- 8006a02:	78bb      	ldrb	r3, [r7, #2]
- 8006a04:	80fb      	strh	r3, [r7, #6]
+ 80069f6:	78bb      	ldrb	r3, [r7, #2]
+ 80069f8:	80fb      	strh	r3, [r7, #6]
 	un_temp>>=2;
- 8006a06:	88fb      	ldrh	r3, [r7, #6]
- 8006a08:	089b      	lsrs	r3, r3, #2
- 8006a0a:	80fb      	strh	r3, [r7, #6]
+ 80069fa:	88fb      	ldrh	r3, [r7, #6]
+ 80069fc:	089b      	lsrs	r3, r3, #2
+ 80069fe:	80fb      	strh	r3, [r7, #6]
 	fifo_red+=un_temp;
- 8006a0c:	4b20      	ldr	r3, [pc, #128]	; (8006a90 <max30102_read_fifo+0xf8>)
- 8006a0e:	881a      	ldrh	r2, [r3, #0]
- 8006a10:	88fb      	ldrh	r3, [r7, #6]
- 8006a12:	4413      	add	r3, r2
- 8006a14:	b29a      	uxth	r2, r3
- 8006a16:	4b1e      	ldr	r3, [pc, #120]	; (8006a90 <max30102_read_fifo+0xf8>)
- 8006a18:	801a      	strh	r2, [r3, #0]
+ 8006a00:	4b20      	ldr	r3, [pc, #128]	; (8006a84 <max30102_read_fifo+0xf8>)
+ 8006a02:	881a      	ldrh	r2, [r3, #0]
+ 8006a04:	88fb      	ldrh	r3, [r7, #6]
+ 8006a06:	4413      	add	r3, r2
+ 8006a08:	b29a      	uxth	r2, r3
+ 8006a0a:	4b1e      	ldr	r3, [pc, #120]	; (8006a84 <max30102_read_fifo+0xf8>)
+ 8006a0c:	801a      	strh	r2, [r3, #0]
 
   un_temp=ach_i2c_data[3];
- 8006a1a:	78fb      	ldrb	r3, [r7, #3]
- 8006a1c:	80fb      	strh	r3, [r7, #6]
+ 8006a0e:	78fb      	ldrb	r3, [r7, #3]
+ 8006a10:	80fb      	strh	r3, [r7, #6]
   un_temp<<=14;
- 8006a1e:	88fb      	ldrh	r3, [r7, #6]
- 8006a20:	039b      	lsls	r3, r3, #14
- 8006a22:	80fb      	strh	r3, [r7, #6]
+ 8006a12:	88fb      	ldrh	r3, [r7, #6]
+ 8006a14:	039b      	lsls	r3, r3, #14
+ 8006a16:	80fb      	strh	r3, [r7, #6]
   fifo_ir+=un_temp;
- 8006a24:	4b1b      	ldr	r3, [pc, #108]	; (8006a94 <max30102_read_fifo+0xfc>)
- 8006a26:	881a      	ldrh	r2, [r3, #0]
- 8006a28:	88fb      	ldrh	r3, [r7, #6]
- 8006a2a:	4413      	add	r3, r2
- 8006a2c:	b29a      	uxth	r2, r3
- 8006a2e:	4b19      	ldr	r3, [pc, #100]	; (8006a94 <max30102_read_fifo+0xfc>)
- 8006a30:	801a      	strh	r2, [r3, #0]
+ 8006a18:	4b1b      	ldr	r3, [pc, #108]	; (8006a88 <max30102_read_fifo+0xfc>)
+ 8006a1a:	881a      	ldrh	r2, [r3, #0]
+ 8006a1c:	88fb      	ldrh	r3, [r7, #6]
+ 8006a1e:	4413      	add	r3, r2
+ 8006a20:	b29a      	uxth	r2, r3
+ 8006a22:	4b19      	ldr	r3, [pc, #100]	; (8006a88 <max30102_read_fifo+0xfc>)
+ 8006a24:	801a      	strh	r2, [r3, #0]
   un_temp=ach_i2c_data[4];
- 8006a32:	793b      	ldrb	r3, [r7, #4]
- 8006a34:	80fb      	strh	r3, [r7, #6]
+ 8006a26:	793b      	ldrb	r3, [r7, #4]
+ 8006a28:	80fb      	strh	r3, [r7, #6]
   un_temp<<=6;
- 8006a36:	88fb      	ldrh	r3, [r7, #6]
- 8006a38:	019b      	lsls	r3, r3, #6
- 8006a3a:	80fb      	strh	r3, [r7, #6]
+ 8006a2a:	88fb      	ldrh	r3, [r7, #6]
+ 8006a2c:	019b      	lsls	r3, r3, #6
+ 8006a2e:	80fb      	strh	r3, [r7, #6]
   fifo_ir+=un_temp;
- 8006a3c:	4b15      	ldr	r3, [pc, #84]	; (8006a94 <max30102_read_fifo+0xfc>)
- 8006a3e:	881a      	ldrh	r2, [r3, #0]
- 8006a40:	88fb      	ldrh	r3, [r7, #6]
- 8006a42:	4413      	add	r3, r2
- 8006a44:	b29a      	uxth	r2, r3
- 8006a46:	4b13      	ldr	r3, [pc, #76]	; (8006a94 <max30102_read_fifo+0xfc>)
- 8006a48:	801a      	strh	r2, [r3, #0]
+ 8006a30:	4b15      	ldr	r3, [pc, #84]	; (8006a88 <max30102_read_fifo+0xfc>)
+ 8006a32:	881a      	ldrh	r2, [r3, #0]
+ 8006a34:	88fb      	ldrh	r3, [r7, #6]
+ 8006a36:	4413      	add	r3, r2
+ 8006a38:	b29a      	uxth	r2, r3
+ 8006a3a:	4b13      	ldr	r3, [pc, #76]	; (8006a88 <max30102_read_fifo+0xfc>)
+ 8006a3c:	801a      	strh	r2, [r3, #0]
   un_temp=ach_i2c_data[5];
- 8006a4a:	797b      	ldrb	r3, [r7, #5]
- 8006a4c:	80fb      	strh	r3, [r7, #6]
+ 8006a3e:	797b      	ldrb	r3, [r7, #5]
+ 8006a40:	80fb      	strh	r3, [r7, #6]
 	un_temp>>=2;
- 8006a4e:	88fb      	ldrh	r3, [r7, #6]
- 8006a50:	089b      	lsrs	r3, r3, #2
- 8006a52:	80fb      	strh	r3, [r7, #6]
+ 8006a42:	88fb      	ldrh	r3, [r7, #6]
+ 8006a44:	089b      	lsrs	r3, r3, #2
+ 8006a46:	80fb      	strh	r3, [r7, #6]
 	fifo_ir+=un_temp;
- 8006a54:	4b0f      	ldr	r3, [pc, #60]	; (8006a94 <max30102_read_fifo+0xfc>)
- 8006a56:	881a      	ldrh	r2, [r3, #0]
- 8006a58:	88fb      	ldrh	r3, [r7, #6]
- 8006a5a:	4413      	add	r3, r2
- 8006a5c:	b29a      	uxth	r2, r3
- 8006a5e:	4b0d      	ldr	r3, [pc, #52]	; (8006a94 <max30102_read_fifo+0xfc>)
- 8006a60:	801a      	strh	r2, [r3, #0]
+ 8006a48:	4b0f      	ldr	r3, [pc, #60]	; (8006a88 <max30102_read_fifo+0xfc>)
+ 8006a4a:	881a      	ldrh	r2, [r3, #0]
+ 8006a4c:	88fb      	ldrh	r3, [r7, #6]
+ 8006a4e:	4413      	add	r3, r2
+ 8006a50:	b29a      	uxth	r2, r3
+ 8006a52:	4b0d      	ldr	r3, [pc, #52]	; (8006a88 <max30102_read_fifo+0xfc>)
+ 8006a54:	801a      	strh	r2, [r3, #0]
 
 	if(fifo_ir<=10000)
- 8006a62:	4b0c      	ldr	r3, [pc, #48]	; (8006a94 <max30102_read_fifo+0xfc>)
- 8006a64:	881b      	ldrh	r3, [r3, #0]
- 8006a66:	f242 7210 	movw	r2, #10000	; 0x2710
- 8006a6a:	4293      	cmp	r3, r2
- 8006a6c:	d802      	bhi.n	8006a74 <max30102_read_fifo+0xdc>
+ 8006a56:	4b0c      	ldr	r3, [pc, #48]	; (8006a88 <max30102_read_fifo+0xfc>)
+ 8006a58:	881b      	ldrh	r3, [r3, #0]
+ 8006a5a:	f242 7210 	movw	r2, #10000	; 0x2710
+ 8006a5e:	4293      	cmp	r3, r2
+ 8006a60:	d802      	bhi.n	8006a68 <max30102_read_fifo+0xdc>
 	{
 		fifo_ir=0;
- 8006a6e:	4b09      	ldr	r3, [pc, #36]	; (8006a94 <max30102_read_fifo+0xfc>)
- 8006a70:	2200      	movs	r2, #0
- 8006a72:	801a      	strh	r2, [r3, #0]
+ 8006a62:	4b09      	ldr	r3, [pc, #36]	; (8006a88 <max30102_read_fifo+0xfc>)
+ 8006a64:	2200      	movs	r2, #0
+ 8006a66:	801a      	strh	r2, [r3, #0]
 	}
 	if(fifo_red<=10000)
- 8006a74:	4b06      	ldr	r3, [pc, #24]	; (8006a90 <max30102_read_fifo+0xf8>)
- 8006a76:	881b      	ldrh	r3, [r3, #0]
- 8006a78:	f242 7210 	movw	r2, #10000	; 0x2710
- 8006a7c:	4293      	cmp	r3, r2
- 8006a7e:	d802      	bhi.n	8006a86 <max30102_read_fifo+0xee>
+ 8006a68:	4b06      	ldr	r3, [pc, #24]	; (8006a84 <max30102_read_fifo+0xf8>)
+ 8006a6a:	881b      	ldrh	r3, [r3, #0]
+ 8006a6c:	f242 7210 	movw	r2, #10000	; 0x2710
+ 8006a70:	4293      	cmp	r3, r2
+ 8006a72:	d802      	bhi.n	8006a7a <max30102_read_fifo+0xee>
 	{
 		fifo_red=0;
- 8006a80:	4b03      	ldr	r3, [pc, #12]	; (8006a90 <max30102_read_fifo+0xf8>)
- 8006a82:	2200      	movs	r2, #0
- 8006a84:	801a      	strh	r2, [r3, #0]
+ 8006a74:	4b03      	ldr	r3, [pc, #12]	; (8006a84 <max30102_read_fifo+0xf8>)
+ 8006a76:	2200      	movs	r2, #0
+ 8006a78:	801a      	strh	r2, [r3, #0]
 	}
 
 }
- 8006a86:	bf00      	nop
- 8006a88:	3708      	adds	r7, #8
- 8006a8a:	46bd      	mov	sp, r7
- 8006a8c:	bd80      	pop	{r7, pc}
- 8006a8e:	bf00      	nop
- 8006a90:	20002580 	.word	0x20002580
- 8006a94:	20000470 	.word	0x20000470
+ 8006a7a:	bf00      	nop
+ 8006a7c:	3708      	adds	r7, #8
+ 8006a7e:	46bd      	mov	sp, r7
+ 8006a80:	bd80      	pop	{r7, pc}
+ 8006a82:	bf00      	nop
+ 8006a84:	20000404 	.word	0x20000404
+ 8006a88:	20000406 	.word	0x20000406
 
-08006a98 <HAL_TIM_PeriodElapsedCallback>:
+08006a8c <HAL_TIM_PeriodElapsedCallback>:
 
 
 }
 
 void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)//10us
 {
- 8006a98:	b590      	push	{r4, r7, lr}
- 8006a9a:	b083      	sub	sp, #12
- 8006a9c:	af00      	add	r7, sp, #0
- 8006a9e:	6078      	str	r0, [r7, #4]
+ 8006a8c:	b590      	push	{r4, r7, lr}
+ 8006a8e:	b083      	sub	sp, #12
+ 8006a90:	af00      	add	r7, sp, #0
+ 8006a92:	6078      	str	r0, [r7, #4]
     if (htim == (&htim6))
- 8006aa0:	687b      	ldr	r3, [r7, #4]
- 8006aa2:	4a21      	ldr	r2, [pc, #132]	; (8006b28 <HAL_TIM_PeriodElapsedCallback+0x90>)
- 8006aa4:	4293      	cmp	r3, r2
- 8006aa6:	d13a      	bne.n	8006b1e <HAL_TIM_PeriodElapsedCallback+0x86>
+ 8006a94:	687b      	ldr	r3, [r7, #4]
+ 8006a96:	4a21      	ldr	r2, [pc, #132]	; (8006b1c <HAL_TIM_PeriodElapsedCallback+0x90>)
+ 8006a98:	4293      	cmp	r3, r2
+ 8006a9a:	d13a      	bne.n	8006b12 <HAL_TIM_PeriodElapsedCallback+0x86>
         {
     		max30102_read_fifo();  //read from MAX30102 FIFO2
- 8006aa8:	f7ff ff76 	bl	8006998 <max30102_read_fifo>
+ 8006a9c:	f7ff ff76 	bl	800698c <max30102_read_fifo>
     		//将数据写入fft输入并清除输出
 			s1[g_fft_index].real = fifo_red;
- 8006aac:	4b1f      	ldr	r3, [pc, #124]	; (8006b2c <HAL_TIM_PeriodElapsedCallback+0x94>)
- 8006aae:	881b      	ldrh	r3, [r3, #0]
- 8006ab0:	4a1f      	ldr	r2, [pc, #124]	; (8006b30 <HAL_TIM_PeriodElapsedCallback+0x98>)
- 8006ab2:	8812      	ldrh	r2, [r2, #0]
- 8006ab4:	4614      	mov	r4, r2
- 8006ab6:	4618      	mov	r0, r3
- 8006ab8:	f7fa f958 	bl	8000d6c <__aeabi_ui2f>
- 8006abc:	4603      	mov	r3, r0
- 8006abe:	4a1d      	ldr	r2, [pc, #116]	; (8006b34 <HAL_TIM_PeriodElapsedCallback+0x9c>)
- 8006ac0:	f842 3034 	str.w	r3, [r2, r4, lsl #3]
+ 8006aa0:	4b1f      	ldr	r3, [pc, #124]	; (8006b20 <HAL_TIM_PeriodElapsedCallback+0x94>)
+ 8006aa2:	881b      	ldrh	r3, [r3, #0]
+ 8006aa4:	4a1f      	ldr	r2, [pc, #124]	; (8006b24 <HAL_TIM_PeriodElapsedCallback+0x98>)
+ 8006aa6:	8812      	ldrh	r2, [r2, #0]
+ 8006aa8:	4614      	mov	r4, r2
+ 8006aaa:	4618      	mov	r0, r3
+ 8006aac:	f7fa f95e 	bl	8000d6c <__aeabi_ui2f>
+ 8006ab0:	4603      	mov	r3, r0
+ 8006ab2:	4a1d      	ldr	r2, [pc, #116]	; (8006b28 <HAL_TIM_PeriodElapsedCallback+0x9c>)
+ 8006ab4:	f842 3034 	str.w	r3, [r2, r4, lsl #3]
 			s1[g_fft_index].imag= 0;
- 8006ac4:	4b1a      	ldr	r3, [pc, #104]	; (8006b30 <HAL_TIM_PeriodElapsedCallback+0x98>)
- 8006ac6:	881b      	ldrh	r3, [r3, #0]
- 8006ac8:	4a1a      	ldr	r2, [pc, #104]	; (8006b34 <HAL_TIM_PeriodElapsedCallback+0x9c>)
- 8006aca:	00db      	lsls	r3, r3, #3
- 8006acc:	4413      	add	r3, r2
- 8006ace:	f04f 0200 	mov.w	r2, #0
- 8006ad2:	605a      	str	r2, [r3, #4]
+ 8006ab8:	4b1a      	ldr	r3, [pc, #104]	; (8006b24 <HAL_TIM_PeriodElapsedCallback+0x98>)
+ 8006aba:	881b      	ldrh	r3, [r3, #0]
+ 8006abc:	4a1a      	ldr	r2, [pc, #104]	; (8006b28 <HAL_TIM_PeriodElapsedCallback+0x9c>)
+ 8006abe:	00db      	lsls	r3, r3, #3
+ 8006ac0:	4413      	add	r3, r2
+ 8006ac2:	f04f 0200 	mov.w	r2, #0
+ 8006ac6:	605a      	str	r2, [r3, #4]
 			s2[g_fft_index].real = fifo_ir;
- 8006ad4:	4b18      	ldr	r3, [pc, #96]	; (8006b38 <HAL_TIM_PeriodElapsedCallback+0xa0>)
- 8006ad6:	881b      	ldrh	r3, [r3, #0]
- 8006ad8:	4a15      	ldr	r2, [pc, #84]	; (8006b30 <HAL_TIM_PeriodElapsedCallback+0x98>)
- 8006ada:	8812      	ldrh	r2, [r2, #0]
- 8006adc:	4614      	mov	r4, r2
- 8006ade:	4618      	mov	r0, r3
- 8006ae0:	f7fa f944 	bl	8000d6c <__aeabi_ui2f>
- 8006ae4:	4603      	mov	r3, r0
- 8006ae6:	4a15      	ldr	r2, [pc, #84]	; (8006b3c <HAL_TIM_PeriodElapsedCallback+0xa4>)
- 8006ae8:	f842 3034 	str.w	r3, [r2, r4, lsl #3]
+ 8006ac8:	4b18      	ldr	r3, [pc, #96]	; (8006b2c <HAL_TIM_PeriodElapsedCallback+0xa0>)
+ 8006aca:	881b      	ldrh	r3, [r3, #0]
+ 8006acc:	4a15      	ldr	r2, [pc, #84]	; (8006b24 <HAL_TIM_PeriodElapsedCallback+0x98>)
+ 8006ace:	8812      	ldrh	r2, [r2, #0]
+ 8006ad0:	4614      	mov	r4, r2
+ 8006ad2:	4618      	mov	r0, r3
+ 8006ad4:	f7fa f94a 	bl	8000d6c <__aeabi_ui2f>
+ 8006ad8:	4603      	mov	r3, r0
+ 8006ada:	4a15      	ldr	r2, [pc, #84]	; (8006b30 <HAL_TIM_PeriodElapsedCallback+0xa4>)
+ 8006adc:	f842 3034 	str.w	r3, [r2, r4, lsl #3]
 			s2[g_fft_index].imag= 0;
- 8006aec:	4b10      	ldr	r3, [pc, #64]	; (8006b30 <HAL_TIM_PeriodElapsedCallback+0x98>)
- 8006aee:	881b      	ldrh	r3, [r3, #0]
- 8006af0:	4a12      	ldr	r2, [pc, #72]	; (8006b3c <HAL_TIM_PeriodElapsedCallback+0xa4>)
- 8006af2:	00db      	lsls	r3, r3, #3
- 8006af4:	4413      	add	r3, r2
- 8006af6:	f04f 0200 	mov.w	r2, #0
- 8006afa:	605a      	str	r2, [r3, #4]
+ 8006ae0:	4b10      	ldr	r3, [pc, #64]	; (8006b24 <HAL_TIM_PeriodElapsedCallback+0x98>)
+ 8006ae2:	881b      	ldrh	r3, [r3, #0]
+ 8006ae4:	4a12      	ldr	r2, [pc, #72]	; (8006b30 <HAL_TIM_PeriodElapsedCallback+0xa4>)
+ 8006ae6:	00db      	lsls	r3, r3, #3
+ 8006ae8:	4413      	add	r3, r2
+ 8006aea:	f04f 0200 	mov.w	r2, #0
+ 8006aee:	605a      	str	r2, [r3, #4]
 			g_fft_index++;
- 8006afc:	4b0c      	ldr	r3, [pc, #48]	; (8006b30 <HAL_TIM_PeriodElapsedCallback+0x98>)
- 8006afe:	881b      	ldrh	r3, [r3, #0]
- 8006b00:	3301      	adds	r3, #1
- 8006b02:	b29a      	uxth	r2, r3
- 8006b04:	4b0a      	ldr	r3, [pc, #40]	; (8006b30 <HAL_TIM_PeriodElapsedCallback+0x98>)
- 8006b06:	801a      	strh	r2, [r3, #0]
+ 8006af0:	4b0c      	ldr	r3, [pc, #48]	; (8006b24 <HAL_TIM_PeriodElapsedCallback+0x98>)
+ 8006af2:	881b      	ldrh	r3, [r3, #0]
+ 8006af4:	3301      	adds	r3, #1
+ 8006af6:	b29a      	uxth	r2, r3
+ 8006af8:	4b0a      	ldr	r3, [pc, #40]	; (8006b24 <HAL_TIM_PeriodElapsedCallback+0x98>)
+ 8006afa:	801a      	strh	r2, [r3, #0]
 			if(g_fft_index>FFT_N)
- 8006b08:	4b09      	ldr	r3, [pc, #36]	; (8006b30 <HAL_TIM_PeriodElapsedCallback+0x98>)
- 8006b0a:	881b      	ldrh	r3, [r3, #0]
- 8006b0c:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
- 8006b10:	d905      	bls.n	8006b1e <HAL_TIM_PeriodElapsedCallback+0x86>
+ 8006afc:	4b09      	ldr	r3, [pc, #36]	; (8006b24 <HAL_TIM_PeriodElapsedCallback+0x98>)
+ 8006afe:	881b      	ldrh	r3, [r3, #0]
+ 8006b00:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
+ 8006b04:	d905      	bls.n	8006b12 <HAL_TIM_PeriodElapsedCallback+0x86>
 			{
 				get_data_flag=1;
- 8006b12:	4b0b      	ldr	r3, [pc, #44]	; (8006b40 <HAL_TIM_PeriodElapsedCallback+0xa8>)
- 8006b14:	2201      	movs	r2, #1
- 8006b16:	701a      	strb	r2, [r3, #0]
+ 8006b06:	4b0b      	ldr	r3, [pc, #44]	; (8006b34 <HAL_TIM_PeriodElapsedCallback+0xa8>)
+ 8006b08:	2201      	movs	r2, #1
+ 8006b0a:	701a      	strb	r2, [r3, #0]
 				HAL_TIM_Base_Stop_IT(&htim6);
- 8006b18:	4803      	ldr	r0, [pc, #12]	; (8006b28 <HAL_TIM_PeriodElapsedCallback+0x90>)
- 8006b1a:	f7fd f945 	bl	8003da8 <HAL_TIM_Base_Stop_IT>
+ 8006b0c:	4803      	ldr	r0, [pc, #12]	; (8006b1c <HAL_TIM_PeriodElapsedCallback+0x90>)
+ 8006b0e:	f7fd f94b 	bl	8003da8 <HAL_TIM_Base_Stop_IT>
 			}
 
         }
 }
- 8006b1e:	bf00      	nop
- 8006b20:	370c      	adds	r7, #12
- 8006b22:	46bd      	mov	sp, r7
- 8006b24:	bd90      	pop	{r4, r7, pc}
- 8006b26:	bf00      	nop
- 8006b28:	20000310 	.word	0x20000310
- 8006b2c:	20002580 	.word	0x20002580
- 8006b30:	2000020a 	.word	0x2000020a
- 8006b34:	20000478 	.word	0x20000478
- 8006b38:	20000470 	.word	0x20000470
- 8006b3c:	200014f8 	.word	0x200014f8
- 8006b40:	20000208 	.word	0x20000208
+ 8006b12:	bf00      	nop
+ 8006b14:	370c      	adds	r7, #12
+ 8006b16:	46bd      	mov	sp, r7
+ 8006b18:	bd90      	pop	{r4, r7, pc}
+ 8006b1a:	bf00      	nop
+ 8006b1c:	200002e4 	.word	0x200002e4
+ 8006b20:	20000404 	.word	0x20000404
+ 8006b24:	2000250a 	.word	0x2000250a
+ 8006b28:	20000408 	.word	0x20000408
+ 8006b2c:	20000406 	.word	0x20000406
+ 8006b30:	20001488 	.word	0x20001488
+ 8006b34:	20002508 	.word	0x20002508
 
-08006b44 <APP_morsecode_init>:
+08006b38 <APP_morsecode_init>:
 };
 
 window *morsecode_window;
 
 void APP_morsecode_init(window *a_window)
 {
- 8006b44:	b480      	push	{r7}
- 8006b46:	b085      	sub	sp, #20
- 8006b48:	af00      	add	r7, sp, #0
- 8006b4a:	6078      	str	r0, [r7, #4]
+ 8006b38:	b480      	push	{r7}
+ 8006b3a:	b085      	sub	sp, #20
+ 8006b3c:	af00      	add	r7, sp, #0
+ 8006b3e:	6078      	str	r0, [r7, #4]
 	morsecode_window=a_window;
- 8006b4c:	4a0b      	ldr	r2, [pc, #44]	; (8006b7c <APP_morsecode_init+0x38>)
- 8006b4e:	687b      	ldr	r3, [r7, #4]
- 8006b50:	6013      	str	r3, [r2, #0]
+ 8006b40:	4a0b      	ldr	r2, [pc, #44]	; (8006b70 <APP_morsecode_init+0x38>)
+ 8006b42:	687b      	ldr	r3, [r7, #4]
+ 8006b44:	6013      	str	r3, [r2, #0]
 
 	for(int a=0;a<65;a++)
- 8006b52:	2300      	movs	r3, #0
- 8006b54:	60fb      	str	r3, [r7, #12]
- 8006b56:	e007      	b.n	8006b68 <APP_morsecode_init+0x24>
+ 8006b46:	2300      	movs	r3, #0
+ 8006b48:	60fb      	str	r3, [r7, #12]
+ 8006b4a:	e007      	b.n	8006b5c <APP_morsecode_init+0x24>
 	{
 		morse_input_buff[a]='\0';
- 8006b58:	4a09      	ldr	r2, [pc, #36]	; (8006b80 <APP_morsecode_init+0x3c>)
- 8006b5a:	68fb      	ldr	r3, [r7, #12]
- 8006b5c:	4413      	add	r3, r2
- 8006b5e:	2200      	movs	r2, #0
- 8006b60:	701a      	strb	r2, [r3, #0]
+ 8006b4c:	4a09      	ldr	r2, [pc, #36]	; (8006b74 <APP_morsecode_init+0x3c>)
+ 8006b4e:	68fb      	ldr	r3, [r7, #12]
+ 8006b50:	4413      	add	r3, r2
+ 8006b52:	2200      	movs	r2, #0
+ 8006b54:	701a      	strb	r2, [r3, #0]
 	for(int a=0;a<65;a++)
- 8006b62:	68fb      	ldr	r3, [r7, #12]
- 8006b64:	3301      	adds	r3, #1
- 8006b66:	60fb      	str	r3, [r7, #12]
- 8006b68:	68fb      	ldr	r3, [r7, #12]
- 8006b6a:	2b40      	cmp	r3, #64	; 0x40
- 8006b6c:	ddf4      	ble.n	8006b58 <APP_morsecode_init+0x14>
+ 8006b56:	68fb      	ldr	r3, [r7, #12]
+ 8006b58:	3301      	adds	r3, #1
+ 8006b5a:	60fb      	str	r3, [r7, #12]
+ 8006b5c:	68fb      	ldr	r3, [r7, #12]
+ 8006b5e:	2b40      	cmp	r3, #64	; 0x40
+ 8006b60:	ddf4      	ble.n	8006b4c <APP_morsecode_init+0x14>
 	}
 
 
 }
+ 8006b62:	bf00      	nop
+ 8006b64:	bf00      	nop
+ 8006b66:	3714      	adds	r7, #20
+ 8006b68:	46bd      	mov	sp, r7
+ 8006b6a:	bc80      	pop	{r7}
+ 8006b6c:	4770      	bx	lr
  8006b6e:	bf00      	nop
- 8006b70:	bf00      	nop
- 8006b72:	3714      	adds	r7, #20
- 8006b74:	46bd      	mov	sp, r7
- 8006b76:	bc80      	pop	{r7}
- 8006b78:	4770      	bx	lr
- 8006b7a:	bf00      	nop
- 8006b7c:	20002584 	.word	0x20002584
- 8006b80:	20002588 	.word	0x20002588
+ 8006b70:	200025b4 	.word	0x200025b4
+ 8006b74:	2000251c 	.word	0x2000251c
 
-08006b84 <getmorsecode>:
+08006b78 <getmorsecode>:
 
 
 char getmorsecode(uint8_t len,uint8_t code)
 {
- 8006b84:	b480      	push	{r7}
- 8006b86:	b085      	sub	sp, #20
- 8006b88:	af00      	add	r7, sp, #0
- 8006b8a:	4603      	mov	r3, r0
- 8006b8c:	460a      	mov	r2, r1
- 8006b8e:	71fb      	strb	r3, [r7, #7]
- 8006b90:	4613      	mov	r3, r2
- 8006b92:	71bb      	strb	r3, [r7, #6]
+ 8006b78:	b480      	push	{r7}
+ 8006b7a:	b085      	sub	sp, #20
+ 8006b7c:	af00      	add	r7, sp, #0
+ 8006b7e:	4603      	mov	r3, r0
+ 8006b80:	460a      	mov	r2, r1
+ 8006b82:	71fb      	strb	r3, [r7, #7]
+ 8006b84:	4613      	mov	r3, r2
+ 8006b86:	71bb      	strb	r3, [r7, #6]
 	for(int a=0;a<morsecodenum;a++)
- 8006b94:	2300      	movs	r3, #0
- 8006b96:	60fb      	str	r3, [r7, #12]
- 8006b98:	e020      	b.n	8006bdc <getmorsecode+0x58>
+ 8006b88:	2300      	movs	r3, #0
+ 8006b8a:	60fb      	str	r3, [r7, #12]
+ 8006b8c:	e020      	b.n	8006bd0 <getmorsecode+0x58>
 	{
 		if((morsecodes[a].len==len)&&(morsecodes[a].code==code))
- 8006b9a:	4915      	ldr	r1, [pc, #84]	; (8006bf0 <getmorsecode+0x6c>)
- 8006b9c:	68fa      	ldr	r2, [r7, #12]
- 8006b9e:	4613      	mov	r3, r2
- 8006ba0:	005b      	lsls	r3, r3, #1
- 8006ba2:	4413      	add	r3, r2
- 8006ba4:	440b      	add	r3, r1
- 8006ba6:	781b      	ldrb	r3, [r3, #0]
- 8006ba8:	79fa      	ldrb	r2, [r7, #7]
- 8006baa:	429a      	cmp	r2, r3
- 8006bac:	d113      	bne.n	8006bd6 <getmorsecode+0x52>
- 8006bae:	4910      	ldr	r1, [pc, #64]	; (8006bf0 <getmorsecode+0x6c>)
- 8006bb0:	68fa      	ldr	r2, [r7, #12]
- 8006bb2:	4613      	mov	r3, r2
- 8006bb4:	005b      	lsls	r3, r3, #1
- 8006bb6:	4413      	add	r3, r2
- 8006bb8:	440b      	add	r3, r1
- 8006bba:	3301      	adds	r3, #1
- 8006bbc:	781b      	ldrb	r3, [r3, #0]
- 8006bbe:	79ba      	ldrb	r2, [r7, #6]
- 8006bc0:	429a      	cmp	r2, r3
- 8006bc2:	d108      	bne.n	8006bd6 <getmorsecode+0x52>
+ 8006b8e:	4915      	ldr	r1, [pc, #84]	; (8006be4 <getmorsecode+0x6c>)
+ 8006b90:	68fa      	ldr	r2, [r7, #12]
+ 8006b92:	4613      	mov	r3, r2
+ 8006b94:	005b      	lsls	r3, r3, #1
+ 8006b96:	4413      	add	r3, r2
+ 8006b98:	440b      	add	r3, r1
+ 8006b9a:	781b      	ldrb	r3, [r3, #0]
+ 8006b9c:	79fa      	ldrb	r2, [r7, #7]
+ 8006b9e:	429a      	cmp	r2, r3
+ 8006ba0:	d113      	bne.n	8006bca <getmorsecode+0x52>
+ 8006ba2:	4910      	ldr	r1, [pc, #64]	; (8006be4 <getmorsecode+0x6c>)
+ 8006ba4:	68fa      	ldr	r2, [r7, #12]
+ 8006ba6:	4613      	mov	r3, r2
+ 8006ba8:	005b      	lsls	r3, r3, #1
+ 8006baa:	4413      	add	r3, r2
+ 8006bac:	440b      	add	r3, r1
+ 8006bae:	3301      	adds	r3, #1
+ 8006bb0:	781b      	ldrb	r3, [r3, #0]
+ 8006bb2:	79ba      	ldrb	r2, [r7, #6]
+ 8006bb4:	429a      	cmp	r2, r3
+ 8006bb6:	d108      	bne.n	8006bca <getmorsecode+0x52>
 		{
 			return morsecodes[a].letter;
- 8006bc4:	490a      	ldr	r1, [pc, #40]	; (8006bf0 <getmorsecode+0x6c>)
- 8006bc6:	68fa      	ldr	r2, [r7, #12]
- 8006bc8:	4613      	mov	r3, r2
- 8006bca:	005b      	lsls	r3, r3, #1
- 8006bcc:	4413      	add	r3, r2
- 8006bce:	440b      	add	r3, r1
- 8006bd0:	3302      	adds	r3, #2
- 8006bd2:	781b      	ldrb	r3, [r3, #0]
- 8006bd4:	e006      	b.n	8006be4 <getmorsecode+0x60>
+ 8006bb8:	490a      	ldr	r1, [pc, #40]	; (8006be4 <getmorsecode+0x6c>)
+ 8006bba:	68fa      	ldr	r2, [r7, #12]
+ 8006bbc:	4613      	mov	r3, r2
+ 8006bbe:	005b      	lsls	r3, r3, #1
+ 8006bc0:	4413      	add	r3, r2
+ 8006bc2:	440b      	add	r3, r1
+ 8006bc4:	3302      	adds	r3, #2
+ 8006bc6:	781b      	ldrb	r3, [r3, #0]
+ 8006bc8:	e006      	b.n	8006bd8 <getmorsecode+0x60>
 	for(int a=0;a<morsecodenum;a++)
- 8006bd6:	68fb      	ldr	r3, [r7, #12]
- 8006bd8:	3301      	adds	r3, #1
- 8006bda:	60fb      	str	r3, [r7, #12]
- 8006bdc:	68fb      	ldr	r3, [r7, #12]
- 8006bde:	2b25      	cmp	r3, #37	; 0x25
- 8006be0:	dddb      	ble.n	8006b9a <getmorsecode+0x16>
+ 8006bca:	68fb      	ldr	r3, [r7, #12]
+ 8006bcc:	3301      	adds	r3, #1
+ 8006bce:	60fb      	str	r3, [r7, #12]
+ 8006bd0:	68fb      	ldr	r3, [r7, #12]
+ 8006bd2:	2b25      	cmp	r3, #37	; 0x25
+ 8006bd4:	dddb      	ble.n	8006b8e <getmorsecode+0x16>
 		}
 
 	}
 	return 0;
- 8006be2:	2300      	movs	r3, #0
+ 8006bd6:	2300      	movs	r3, #0
 }
- 8006be4:	4618      	mov	r0, r3
- 8006be6:	3714      	adds	r7, #20
- 8006be8:	46bd      	mov	sp, r7
- 8006bea:	bc80      	pop	{r7}
- 8006bec:	4770      	bx	lr
- 8006bee:	bf00      	nop
- 8006bf0:	0800b1e0 	.word	0x0800b1e0
+ 8006bd8:	4618      	mov	r0, r3
+ 8006bda:	3714      	adds	r7, #20
+ 8006bdc:	46bd      	mov	sp, r7
+ 8006bde:	bc80      	pop	{r7}
+ 8006be0:	4770      	bx	lr
+ 8006be2:	bf00      	nop
+ 8006be4:	0800b1d0 	.word	0x0800b1d0
 
-08006bf4 <APP_morsecode_loop>:
+08006be8 <APP_morsecode_loop>:
 
 
 
 void APP_morsecode_loop()
 {
- 8006bf4:	b580      	push	{r7, lr}
- 8006bf6:	b08a      	sub	sp, #40	; 0x28
- 8006bf8:	af02      	add	r7, sp, #8
+ 8006be8:	b580      	push	{r7, lr}
+ 8006bea:	b08a      	sub	sp, #40	; 0x28
+ 8006bec:	af02      	add	r7, sp, #8
 	/*
 	char str[64],get_char_temp;
 	sprintf(str,"%d %d  ",morse_input_flag,morse_char_flag);
 	LCD_ShowString(morsecode_window->x, morsecode_window->y+100, str, 16, GREEN, RED);
 */
 	if(k3.code==1)
- 8006bfa:	4b97      	ldr	r3, [pc, #604]	; (8006e58 <APP_morsecode_loop+0x264>)
- 8006bfc:	681b      	ldr	r3, [r3, #0]
- 8006bfe:	2b01      	cmp	r3, #1
- 8006c00:	d16a      	bne.n	8006cd8 <APP_morsecode_loop+0xe4>
+ 8006bee:	4b97      	ldr	r3, [pc, #604]	; (8006e4c <APP_morsecode_loop+0x264>)
+ 8006bf0:	681b      	ldr	r3, [r3, #0]
+ 8006bf2:	2b01      	cmp	r3, #1
+ 8006bf4:	d16a      	bne.n	8006ccc <APP_morsecode_loop+0xe4>
 	{
 		for(int a=0;a<64;a++)
- 8006c02:	2300      	movs	r3, #0
- 8006c04:	61fb      	str	r3, [r7, #28]
- 8006c06:	e062      	b.n	8006cce <APP_morsecode_loop+0xda>
+ 8006bf6:	2300      	movs	r3, #0
+ 8006bf8:	61fb      	str	r3, [r7, #28]
+ 8006bfa:	e062      	b.n	8006cc2 <APP_morsecode_loop+0xda>
 		{
 
 			if(morse_input_buff[a]=='\0')
- 8006c08:	4a94      	ldr	r2, [pc, #592]	; (8006e5c <APP_morsecode_loop+0x268>)
- 8006c0a:	69fb      	ldr	r3, [r7, #28]
- 8006c0c:	4413      	add	r3, r2
- 8006c0e:	781b      	ldrb	r3, [r3, #0]
- 8006c10:	2b00      	cmp	r3, #0
- 8006c12:	d060      	beq.n	8006cd6 <APP_morsecode_loop+0xe2>
+ 8006bfc:	4a94      	ldr	r2, [pc, #592]	; (8006e50 <APP_morsecode_loop+0x268>)
+ 8006bfe:	69fb      	ldr	r3, [r7, #28]
+ 8006c00:	4413      	add	r3, r2
+ 8006c02:	781b      	ldrb	r3, [r3, #0]
+ 8006c04:	2b00      	cmp	r3, #0
+ 8006c06:	d060      	beq.n	8006cca <APP_morsecode_loop+0xe2>
 			{
 				break;
 			}
 
 			if(morse_input_buff[a]==' ')
- 8006c14:	4a91      	ldr	r2, [pc, #580]	; (8006e5c <APP_morsecode_loop+0x268>)
- 8006c16:	69fb      	ldr	r3, [r7, #28]
- 8006c18:	4413      	add	r3, r2
- 8006c1a:	781b      	ldrb	r3, [r3, #0]
- 8006c1c:	2b20      	cmp	r3, #32
- 8006c1e:	d105      	bne.n	8006c2c <APP_morsecode_loop+0x38>
+ 8006c08:	4a91      	ldr	r2, [pc, #580]	; (8006e50 <APP_morsecode_loop+0x268>)
+ 8006c0a:	69fb      	ldr	r3, [r7, #28]
+ 8006c0c:	4413      	add	r3, r2
+ 8006c0e:	781b      	ldrb	r3, [r3, #0]
+ 8006c10:	2b20      	cmp	r3, #32
+ 8006c12:	d105      	bne.n	8006c20 <APP_morsecode_loop+0x38>
 			{
 				add_a_note(0, 50, morse_play_t2);
- 8006c20:	2296      	movs	r2, #150	; 0x96
- 8006c22:	2132      	movs	r1, #50	; 0x32
- 8006c24:	2000      	movs	r0, #0
- 8006c26:	f7fe ff77 	bl	8005b18 <add_a_note>
- 8006c2a:	e04d      	b.n	8006cc8 <APP_morsecode_loop+0xd4>
+ 8006c14:	2296      	movs	r2, #150	; 0x96
+ 8006c16:	2132      	movs	r1, #50	; 0x32
+ 8006c18:	2000      	movs	r0, #0
+ 8006c1a:	f7fe ff7d 	bl	8005b18 <add_a_note>
+ 8006c1e:	e04d      	b.n	8006cbc <APP_morsecode_loop+0xd4>
 			}else
 			{
 				for(int b=0;b<morsecodenum;b++)
- 8006c2c:	2300      	movs	r3, #0
- 8006c2e:	61bb      	str	r3, [r7, #24]
- 8006c30:	e042      	b.n	8006cb8 <APP_morsecode_loop+0xc4>
+ 8006c20:	2300      	movs	r3, #0
+ 8006c22:	61bb      	str	r3, [r7, #24]
+ 8006c24:	e042      	b.n	8006cac <APP_morsecode_loop+0xc4>
 				{
 					if(morsecodes[b].letter==morse_input_buff[a])
- 8006c32:	498b      	ldr	r1, [pc, #556]	; (8006e60 <APP_morsecode_loop+0x26c>)
- 8006c34:	69ba      	ldr	r2, [r7, #24]
- 8006c36:	4613      	mov	r3, r2
- 8006c38:	005b      	lsls	r3, r3, #1
- 8006c3a:	4413      	add	r3, r2
- 8006c3c:	440b      	add	r3, r1
- 8006c3e:	3302      	adds	r3, #2
- 8006c40:	781a      	ldrb	r2, [r3, #0]
- 8006c42:	4986      	ldr	r1, [pc, #536]	; (8006e5c <APP_morsecode_loop+0x268>)
- 8006c44:	69fb      	ldr	r3, [r7, #28]
- 8006c46:	440b      	add	r3, r1
- 8006c48:	781b      	ldrb	r3, [r3, #0]
- 8006c4a:	429a      	cmp	r2, r3
- 8006c4c:	d131      	bne.n	8006cb2 <APP_morsecode_loop+0xbe>
+ 8006c26:	498b      	ldr	r1, [pc, #556]	; (8006e54 <APP_morsecode_loop+0x26c>)
+ 8006c28:	69ba      	ldr	r2, [r7, #24]
+ 8006c2a:	4613      	mov	r3, r2
+ 8006c2c:	005b      	lsls	r3, r3, #1
+ 8006c2e:	4413      	add	r3, r2
+ 8006c30:	440b      	add	r3, r1
+ 8006c32:	3302      	adds	r3, #2
+ 8006c34:	781a      	ldrb	r2, [r3, #0]
+ 8006c36:	4986      	ldr	r1, [pc, #536]	; (8006e50 <APP_morsecode_loop+0x268>)
+ 8006c38:	69fb      	ldr	r3, [r7, #28]
+ 8006c3a:	440b      	add	r3, r1
+ 8006c3c:	781b      	ldrb	r3, [r3, #0]
+ 8006c3e:	429a      	cmp	r2, r3
+ 8006c40:	d131      	bne.n	8006ca6 <APP_morsecode_loop+0xbe>
 					{
 						for(int c=0;c<morsecodes[b].len;c++)
- 8006c4e:	2300      	movs	r3, #0
- 8006c50:	617b      	str	r3, [r7, #20]
- 8006c52:	e022      	b.n	8006c9a <APP_morsecode_loop+0xa6>
+ 8006c42:	2300      	movs	r3, #0
+ 8006c44:	617b      	str	r3, [r7, #20]
+ 8006c46:	e022      	b.n	8006c8e <APP_morsecode_loop+0xa6>
 						{
 							if(morsecodes[b].code&(0x80>>c))
- 8006c54:	4982      	ldr	r1, [pc, #520]	; (8006e60 <APP_morsecode_loop+0x26c>)
- 8006c56:	69ba      	ldr	r2, [r7, #24]
- 8006c58:	4613      	mov	r3, r2
- 8006c5a:	005b      	lsls	r3, r3, #1
- 8006c5c:	4413      	add	r3, r2
- 8006c5e:	440b      	add	r3, r1
- 8006c60:	3301      	adds	r3, #1
- 8006c62:	781b      	ldrb	r3, [r3, #0]
- 8006c64:	4619      	mov	r1, r3
- 8006c66:	2280      	movs	r2, #128	; 0x80
- 8006c68:	697b      	ldr	r3, [r7, #20]
- 8006c6a:	fa42 f303 	asr.w	r3, r2, r3
- 8006c6e:	400b      	ands	r3, r1
- 8006c70:	2b00      	cmp	r3, #0
- 8006c72:	d005      	beq.n	8006c80 <APP_morsecode_loop+0x8c>
+ 8006c48:	4982      	ldr	r1, [pc, #520]	; (8006e54 <APP_morsecode_loop+0x26c>)
+ 8006c4a:	69ba      	ldr	r2, [r7, #24]
+ 8006c4c:	4613      	mov	r3, r2
+ 8006c4e:	005b      	lsls	r3, r3, #1
+ 8006c50:	4413      	add	r3, r2
+ 8006c52:	440b      	add	r3, r1
+ 8006c54:	3301      	adds	r3, #1
+ 8006c56:	781b      	ldrb	r3, [r3, #0]
+ 8006c58:	4619      	mov	r1, r3
+ 8006c5a:	2280      	movs	r2, #128	; 0x80
+ 8006c5c:	697b      	ldr	r3, [r7, #20]
+ 8006c5e:	fa42 f303 	asr.w	r3, r2, r3
+ 8006c62:	400b      	ands	r3, r1
+ 8006c64:	2b00      	cmp	r3, #0
+ 8006c66:	d005      	beq.n	8006c74 <APP_morsecode_loop+0x8c>
 							{
 								add_a_note(morse_play_hz, 50, morse_play_t2);
- 8006c74:	2296      	movs	r2, #150	; 0x96
- 8006c76:	2132      	movs	r1, #50	; 0x32
- 8006c78:	2064      	movs	r0, #100	; 0x64
- 8006c7a:	f7fe ff4d 	bl	8005b18 <add_a_note>
- 8006c7e:	e004      	b.n	8006c8a <APP_morsecode_loop+0x96>
+ 8006c68:	2296      	movs	r2, #150	; 0x96
+ 8006c6a:	2132      	movs	r1, #50	; 0x32
+ 8006c6c:	2064      	movs	r0, #100	; 0x64
+ 8006c6e:	f7fe ff53 	bl	8005b18 <add_a_note>
+ 8006c72:	e004      	b.n	8006c7e <APP_morsecode_loop+0x96>
 							}else
 							{
 								add_a_note(morse_play_hz, 50, morse_play_t1);
- 8006c80:	2232      	movs	r2, #50	; 0x32
- 8006c82:	2132      	movs	r1, #50	; 0x32
- 8006c84:	2064      	movs	r0, #100	; 0x64
- 8006c86:	f7fe ff47 	bl	8005b18 <add_a_note>
+ 8006c74:	2232      	movs	r2, #50	; 0x32
+ 8006c76:	2132      	movs	r1, #50	; 0x32
+ 8006c78:	2064      	movs	r0, #100	; 0x64
+ 8006c7a:	f7fe ff4d 	bl	8005b18 <add_a_note>
 							}
 							add_a_note(0, 50, morse_play_t1);
- 8006c8a:	2232      	movs	r2, #50	; 0x32
- 8006c8c:	2132      	movs	r1, #50	; 0x32
- 8006c8e:	2000      	movs	r0, #0
- 8006c90:	f7fe ff42 	bl	8005b18 <add_a_note>
+ 8006c7e:	2232      	movs	r2, #50	; 0x32
+ 8006c80:	2132      	movs	r1, #50	; 0x32
+ 8006c82:	2000      	movs	r0, #0
+ 8006c84:	f7fe ff48 	bl	8005b18 <add_a_note>
 						for(int c=0;c<morsecodes[b].len;c++)
- 8006c94:	697b      	ldr	r3, [r7, #20]
- 8006c96:	3301      	adds	r3, #1
- 8006c98:	617b      	str	r3, [r7, #20]
- 8006c9a:	4971      	ldr	r1, [pc, #452]	; (8006e60 <APP_morsecode_loop+0x26c>)
- 8006c9c:	69ba      	ldr	r2, [r7, #24]
- 8006c9e:	4613      	mov	r3, r2
- 8006ca0:	005b      	lsls	r3, r3, #1
- 8006ca2:	4413      	add	r3, r2
- 8006ca4:	440b      	add	r3, r1
- 8006ca6:	781b      	ldrb	r3, [r3, #0]
- 8006ca8:	461a      	mov	r2, r3
- 8006caa:	697b      	ldr	r3, [r7, #20]
- 8006cac:	4293      	cmp	r3, r2
- 8006cae:	dbd1      	blt.n	8006c54 <APP_morsecode_loop+0x60>
+ 8006c88:	697b      	ldr	r3, [r7, #20]
+ 8006c8a:	3301      	adds	r3, #1
+ 8006c8c:	617b      	str	r3, [r7, #20]
+ 8006c8e:	4971      	ldr	r1, [pc, #452]	; (8006e54 <APP_morsecode_loop+0x26c>)
+ 8006c90:	69ba      	ldr	r2, [r7, #24]
+ 8006c92:	4613      	mov	r3, r2
+ 8006c94:	005b      	lsls	r3, r3, #1
+ 8006c96:	4413      	add	r3, r2
+ 8006c98:	440b      	add	r3, r1
+ 8006c9a:	781b      	ldrb	r3, [r3, #0]
+ 8006c9c:	461a      	mov	r2, r3
+ 8006c9e:	697b      	ldr	r3, [r7, #20]
+ 8006ca0:	4293      	cmp	r3, r2
+ 8006ca2:	dbd1      	blt.n	8006c48 <APP_morsecode_loop+0x60>
 						}
 						break;
- 8006cb0:	e005      	b.n	8006cbe <APP_morsecode_loop+0xca>
+ 8006ca4:	e005      	b.n	8006cb2 <APP_morsecode_loop+0xca>
 				for(int b=0;b<morsecodenum;b++)
- 8006cb2:	69bb      	ldr	r3, [r7, #24]
- 8006cb4:	3301      	adds	r3, #1
- 8006cb6:	61bb      	str	r3, [r7, #24]
- 8006cb8:	69bb      	ldr	r3, [r7, #24]
- 8006cba:	2b25      	cmp	r3, #37	; 0x25
- 8006cbc:	ddb9      	ble.n	8006c32 <APP_morsecode_loop+0x3e>
+ 8006ca6:	69bb      	ldr	r3, [r7, #24]
+ 8006ca8:	3301      	adds	r3, #1
+ 8006caa:	61bb      	str	r3, [r7, #24]
+ 8006cac:	69bb      	ldr	r3, [r7, #24]
+ 8006cae:	2b25      	cmp	r3, #37	; 0x25
+ 8006cb0:	ddb9      	ble.n	8006c26 <APP_morsecode_loop+0x3e>
 					}
 
 				}
 				add_a_note(0, 50, morse_play_t2);
- 8006cbe:	2296      	movs	r2, #150	; 0x96
- 8006cc0:	2132      	movs	r1, #50	; 0x32
- 8006cc2:	2000      	movs	r0, #0
- 8006cc4:	f7fe ff28 	bl	8005b18 <add_a_note>
+ 8006cb2:	2296      	movs	r2, #150	; 0x96
+ 8006cb4:	2132      	movs	r1, #50	; 0x32
+ 8006cb6:	2000      	movs	r0, #0
+ 8006cb8:	f7fe ff2e 	bl	8005b18 <add_a_note>
 		for(int a=0;a<64;a++)
- 8006cc8:	69fb      	ldr	r3, [r7, #28]
- 8006cca:	3301      	adds	r3, #1
- 8006ccc:	61fb      	str	r3, [r7, #28]
- 8006cce:	69fb      	ldr	r3, [r7, #28]
- 8006cd0:	2b3f      	cmp	r3, #63	; 0x3f
- 8006cd2:	dd99      	ble.n	8006c08 <APP_morsecode_loop+0x14>
- 8006cd4:	e000      	b.n	8006cd8 <APP_morsecode_loop+0xe4>
+ 8006cbc:	69fb      	ldr	r3, [r7, #28]
+ 8006cbe:	3301      	adds	r3, #1
+ 8006cc0:	61fb      	str	r3, [r7, #28]
+ 8006cc2:	69fb      	ldr	r3, [r7, #28]
+ 8006cc4:	2b3f      	cmp	r3, #63	; 0x3f
+ 8006cc6:	dd99      	ble.n	8006bfc <APP_morsecode_loop+0x14>
+ 8006cc8:	e000      	b.n	8006ccc <APP_morsecode_loop+0xe4>
 				break;
- 8006cd6:	bf00      	nop
+ 8006cca:	bf00      	nop
 			}
 		}
 
 	}
 	if(k2.code==3)
- 8006cd8:	4b62      	ldr	r3, [pc, #392]	; (8006e64 <APP_morsecode_loop+0x270>)
- 8006cda:	681b      	ldr	r3, [r3, #0]
- 8006cdc:	2b03      	cmp	r3, #3
- 8006cde:	d103      	bne.n	8006ce8 <APP_morsecode_loop+0xf4>
+ 8006ccc:	4b62      	ldr	r3, [pc, #392]	; (8006e58 <APP_morsecode_loop+0x270>)
+ 8006cce:	681b      	ldr	r3, [r3, #0]
+ 8006cd0:	2b03      	cmp	r3, #3
+ 8006cd2:	d103      	bne.n	8006cdc <APP_morsecode_loop+0xf4>
 	{
 		sprintf(morse_input_buff,"EISH5  E I S H 5");
- 8006ce0:	4961      	ldr	r1, [pc, #388]	; (8006e68 <APP_morsecode_loop+0x274>)
- 8006ce2:	485e      	ldr	r0, [pc, #376]	; (8006e5c <APP_morsecode_loop+0x268>)
- 8006ce4:	f001 fb34 	bl	8008350 <siprintf>
+ 8006cd4:	4961      	ldr	r1, [pc, #388]	; (8006e5c <APP_morsecode_loop+0x274>)
+ 8006cd6:	485e      	ldr	r0, [pc, #376]	; (8006e50 <APP_morsecode_loop+0x268>)
+ 8006cd8:	f001 fc12 	bl	8008500 <siprintf>
 	}
 	if(k2.code==2)
- 8006ce8:	4b5e      	ldr	r3, [pc, #376]	; (8006e64 <APP_morsecode_loop+0x270>)
- 8006cea:	681b      	ldr	r3, [r3, #0]
- 8006cec:	2b02      	cmp	r3, #2
- 8006cee:	d103      	bne.n	8006cf8 <APP_morsecode_loop+0x104>
+ 8006cdc:	4b5e      	ldr	r3, [pc, #376]	; (8006e58 <APP_morsecode_loop+0x270>)
+ 8006cde:	681b      	ldr	r3, [r3, #0]
+ 8006ce0:	2b02      	cmp	r3, #2
+ 8006ce2:	d103      	bne.n	8006cec <APP_morsecode_loop+0x104>
 	{
 		sprintf(morse_input_buff,"HELLO WORLD");
- 8006cf0:	495e      	ldr	r1, [pc, #376]	; (8006e6c <APP_morsecode_loop+0x278>)
- 8006cf2:	485a      	ldr	r0, [pc, #360]	; (8006e5c <APP_morsecode_loop+0x268>)
- 8006cf4:	f001 fb2c 	bl	8008350 <siprintf>
+ 8006ce4:	495e      	ldr	r1, [pc, #376]	; (8006e60 <APP_morsecode_loop+0x278>)
+ 8006ce6:	485a      	ldr	r0, [pc, #360]	; (8006e50 <APP_morsecode_loop+0x268>)
+ 8006ce8:	f001 fc0a 	bl	8008500 <siprintf>
 	}
 	if(k2.code==3)
- 8006cf8:	4b5a      	ldr	r3, [pc, #360]	; (8006e64 <APP_morsecode_loop+0x270>)
- 8006cfa:	681b      	ldr	r3, [r3, #0]
- 8006cfc:	2b03      	cmp	r3, #3
- 8006cfe:	d103      	bne.n	8006d08 <APP_morsecode_loop+0x114>
+ 8006cec:	4b5a      	ldr	r3, [pc, #360]	; (8006e58 <APP_morsecode_loop+0x270>)
+ 8006cee:	681b      	ldr	r3, [r3, #0]
+ 8006cf0:	2b03      	cmp	r3, #3
+ 8006cf2:	d103      	bne.n	8006cfc <APP_morsecode_loop+0x114>
 	{
 		sprintf(morse_input_buff,"CQCQ DE HELLO");
- 8006d00:	495b      	ldr	r1, [pc, #364]	; (8006e70 <APP_morsecode_loop+0x27c>)
- 8006d02:	4856      	ldr	r0, [pc, #344]	; (8006e5c <APP_morsecode_loop+0x268>)
- 8006d04:	f001 fb24 	bl	8008350 <siprintf>
+ 8006cf4:	495b      	ldr	r1, [pc, #364]	; (8006e64 <APP_morsecode_loop+0x27c>)
+ 8006cf6:	4856      	ldr	r0, [pc, #344]	; (8006e50 <APP_morsecode_loop+0x268>)
+ 8006cf8:	f001 fc02 	bl	8008500 <siprintf>
 	}
 	if(k2.code==1)
- 8006d08:	4b56      	ldr	r3, [pc, #344]	; (8006e64 <APP_morsecode_loop+0x270>)
- 8006d0a:	681b      	ldr	r3, [r3, #0]
- 8006d0c:	2b01      	cmp	r3, #1
- 8006d0e:	d15e      	bne.n	8006dce <APP_morsecode_loop+0x1da>
+ 8006cfc:	4b56      	ldr	r3, [pc, #344]	; (8006e58 <APP_morsecode_loop+0x270>)
+ 8006cfe:	681b      	ldr	r3, [r3, #0]
+ 8006d00:	2b01      	cmp	r3, #1
+ 8006d02:	d15e      	bne.n	8006dc2 <APP_morsecode_loop+0x1da>
 	{
 		morse_x=morsecode_window->x;
- 8006d10:	4b58      	ldr	r3, [pc, #352]	; (8006e74 <APP_morsecode_loop+0x280>)
- 8006d12:	681b      	ldr	r3, [r3, #0]
- 8006d14:	881b      	ldrh	r3, [r3, #0]
- 8006d16:	461a      	mov	r2, r3
- 8006d18:	4b57      	ldr	r3, [pc, #348]	; (8006e78 <APP_morsecode_loop+0x284>)
- 8006d1a:	601a      	str	r2, [r3, #0]
+ 8006d04:	4b58      	ldr	r3, [pc, #352]	; (8006e68 <APP_morsecode_loop+0x280>)
+ 8006d06:	681b      	ldr	r3, [r3, #0]
+ 8006d08:	881b      	ldrh	r3, [r3, #0]
+ 8006d0a:	461a      	mov	r2, r3
+ 8006d0c:	4b57      	ldr	r3, [pc, #348]	; (8006e6c <APP_morsecode_loop+0x284>)
+ 8006d0e:	601a      	str	r2, [r3, #0]
 		morse_y=morsecode_window->y+16;
- 8006d1c:	4b55      	ldr	r3, [pc, #340]	; (8006e74 <APP_morsecode_loop+0x280>)
- 8006d1e:	681b      	ldr	r3, [r3, #0]
- 8006d20:	885b      	ldrh	r3, [r3, #2]
- 8006d22:	3310      	adds	r3, #16
- 8006d24:	4a55      	ldr	r2, [pc, #340]	; (8006e7c <APP_morsecode_loop+0x288>)
- 8006d26:	6013      	str	r3, [r2, #0]
+ 8006d10:	4b55      	ldr	r3, [pc, #340]	; (8006e68 <APP_morsecode_loop+0x280>)
+ 8006d12:	681b      	ldr	r3, [r3, #0]
+ 8006d14:	885b      	ldrh	r3, [r3, #2]
+ 8006d16:	3310      	adds	r3, #16
+ 8006d18:	4a55      	ldr	r2, [pc, #340]	; (8006e70 <APP_morsecode_loop+0x288>)
+ 8006d1a:	6013      	str	r3, [r2, #0]
 
 		for(int a=0;a<morse_input_buff_num;a++)
- 8006d28:	2300      	movs	r3, #0
- 8006d2a:	613b      	str	r3, [r7, #16]
- 8006d2c:	e043      	b.n	8006db6 <APP_morsecode_loop+0x1c2>
+ 8006d1c:	2300      	movs	r3, #0
+ 8006d1e:	613b      	str	r3, [r7, #16]
+ 8006d20:	e043      	b.n	8006daa <APP_morsecode_loop+0x1c2>
 		{
 			morse_input_buff[a]='\0';
- 8006d2e:	4a4b      	ldr	r2, [pc, #300]	; (8006e5c <APP_morsecode_loop+0x268>)
- 8006d30:	693b      	ldr	r3, [r7, #16]
- 8006d32:	4413      	add	r3, r2
- 8006d34:	2200      	movs	r2, #0
- 8006d36:	701a      	strb	r2, [r3, #0]
+ 8006d22:	4a4b      	ldr	r2, [pc, #300]	; (8006e50 <APP_morsecode_loop+0x268>)
+ 8006d24:	693b      	ldr	r3, [r7, #16]
+ 8006d26:	4413      	add	r3, r2
+ 8006d28:	2200      	movs	r2, #0
+ 8006d2a:	701a      	strb	r2, [r3, #0]
 			if(morse_x>=(morsecode_window->x+morsecode_window->width))
- 8006d38:	4b4e      	ldr	r3, [pc, #312]	; (8006e74 <APP_morsecode_loop+0x280>)
- 8006d3a:	681b      	ldr	r3, [r3, #0]
- 8006d3c:	881b      	ldrh	r3, [r3, #0]
- 8006d3e:	461a      	mov	r2, r3
- 8006d40:	4b4c      	ldr	r3, [pc, #304]	; (8006e74 <APP_morsecode_loop+0x280>)
- 8006d42:	681b      	ldr	r3, [r3, #0]
- 8006d44:	889b      	ldrh	r3, [r3, #4]
- 8006d46:	441a      	add	r2, r3
- 8006d48:	4b4b      	ldr	r3, [pc, #300]	; (8006e78 <APP_morsecode_loop+0x284>)
- 8006d4a:	681b      	ldr	r3, [r3, #0]
- 8006d4c:	429a      	cmp	r2, r3
- 8006d4e:	dc1c      	bgt.n	8006d8a <APP_morsecode_loop+0x196>
+ 8006d2c:	4b4e      	ldr	r3, [pc, #312]	; (8006e68 <APP_morsecode_loop+0x280>)
+ 8006d2e:	681b      	ldr	r3, [r3, #0]
+ 8006d30:	881b      	ldrh	r3, [r3, #0]
+ 8006d32:	461a      	mov	r2, r3
+ 8006d34:	4b4c      	ldr	r3, [pc, #304]	; (8006e68 <APP_morsecode_loop+0x280>)
+ 8006d36:	681b      	ldr	r3, [r3, #0]
+ 8006d38:	889b      	ldrh	r3, [r3, #4]
+ 8006d3a:	441a      	add	r2, r3
+ 8006d3c:	4b4b      	ldr	r3, [pc, #300]	; (8006e6c <APP_morsecode_loop+0x284>)
+ 8006d3e:	681b      	ldr	r3, [r3, #0]
+ 8006d40:	429a      	cmp	r2, r3
+ 8006d42:	dc1c      	bgt.n	8006d7e <APP_morsecode_loop+0x196>
 			{
 				morse_x=morsecode_window->x;
- 8006d50:	4b48      	ldr	r3, [pc, #288]	; (8006e74 <APP_morsecode_loop+0x280>)
- 8006d52:	681b      	ldr	r3, [r3, #0]
- 8006d54:	881b      	ldrh	r3, [r3, #0]
- 8006d56:	461a      	mov	r2, r3
- 8006d58:	4b47      	ldr	r3, [pc, #284]	; (8006e78 <APP_morsecode_loop+0x284>)
- 8006d5a:	601a      	str	r2, [r3, #0]
+ 8006d44:	4b48      	ldr	r3, [pc, #288]	; (8006e68 <APP_morsecode_loop+0x280>)
+ 8006d46:	681b      	ldr	r3, [r3, #0]
+ 8006d48:	881b      	ldrh	r3, [r3, #0]
+ 8006d4a:	461a      	mov	r2, r3
+ 8006d4c:	4b47      	ldr	r3, [pc, #284]	; (8006e6c <APP_morsecode_loop+0x284>)
+ 8006d4e:	601a      	str	r2, [r3, #0]
 				morse_y+=16;
- 8006d5c:	4b47      	ldr	r3, [pc, #284]	; (8006e7c <APP_morsecode_loop+0x288>)
- 8006d5e:	681b      	ldr	r3, [r3, #0]
- 8006d60:	3310      	adds	r3, #16
- 8006d62:	4a46      	ldr	r2, [pc, #280]	; (8006e7c <APP_morsecode_loop+0x288>)
- 8006d64:	6013      	str	r3, [r2, #0]
+ 8006d50:	4b47      	ldr	r3, [pc, #284]	; (8006e70 <APP_morsecode_loop+0x288>)
+ 8006d52:	681b      	ldr	r3, [r3, #0]
+ 8006d54:	3310      	adds	r3, #16
+ 8006d56:	4a46      	ldr	r2, [pc, #280]	; (8006e70 <APP_morsecode_loop+0x288>)
+ 8006d58:	6013      	str	r3, [r2, #0]
 				if(morse_y>=(morsecode_window->y+morsecode_window->high))
- 8006d66:	4b43      	ldr	r3, [pc, #268]	; (8006e74 <APP_morsecode_loop+0x280>)
- 8006d68:	681b      	ldr	r3, [r3, #0]
- 8006d6a:	885b      	ldrh	r3, [r3, #2]
- 8006d6c:	461a      	mov	r2, r3
- 8006d6e:	4b41      	ldr	r3, [pc, #260]	; (8006e74 <APP_morsecode_loop+0x280>)
- 8006d70:	681b      	ldr	r3, [r3, #0]
- 8006d72:	88db      	ldrh	r3, [r3, #6]
- 8006d74:	441a      	add	r2, r3
- 8006d76:	4b41      	ldr	r3, [pc, #260]	; (8006e7c <APP_morsecode_loop+0x288>)
- 8006d78:	681b      	ldr	r3, [r3, #0]
- 8006d7a:	429a      	cmp	r2, r3
- 8006d7c:	dc05      	bgt.n	8006d8a <APP_morsecode_loop+0x196>
+ 8006d5a:	4b43      	ldr	r3, [pc, #268]	; (8006e68 <APP_morsecode_loop+0x280>)
+ 8006d5c:	681b      	ldr	r3, [r3, #0]
+ 8006d5e:	885b      	ldrh	r3, [r3, #2]
+ 8006d60:	461a      	mov	r2, r3
+ 8006d62:	4b41      	ldr	r3, [pc, #260]	; (8006e68 <APP_morsecode_loop+0x280>)
+ 8006d64:	681b      	ldr	r3, [r3, #0]
+ 8006d66:	88db      	ldrh	r3, [r3, #6]
+ 8006d68:	441a      	add	r2, r3
+ 8006d6a:	4b41      	ldr	r3, [pc, #260]	; (8006e70 <APP_morsecode_loop+0x288>)
+ 8006d6c:	681b      	ldr	r3, [r3, #0]
+ 8006d6e:	429a      	cmp	r2, r3
+ 8006d70:	dc05      	bgt.n	8006d7e <APP_morsecode_loop+0x196>
 				{
 					morse_y=morsecode_window->y+16;
- 8006d7e:	4b3d      	ldr	r3, [pc, #244]	; (8006e74 <APP_morsecode_loop+0x280>)
- 8006d80:	681b      	ldr	r3, [r3, #0]
- 8006d82:	885b      	ldrh	r3, [r3, #2]
- 8006d84:	3310      	adds	r3, #16
- 8006d86:	4a3d      	ldr	r2, [pc, #244]	; (8006e7c <APP_morsecode_loop+0x288>)
- 8006d88:	6013      	str	r3, [r2, #0]
+ 8006d72:	4b3d      	ldr	r3, [pc, #244]	; (8006e68 <APP_morsecode_loop+0x280>)
+ 8006d74:	681b      	ldr	r3, [r3, #0]
+ 8006d76:	885b      	ldrh	r3, [r3, #2]
+ 8006d78:	3310      	adds	r3, #16
+ 8006d7a:	4a3d      	ldr	r2, [pc, #244]	; (8006e70 <APP_morsecode_loop+0x288>)
+ 8006d7c:	6013      	str	r3, [r2, #0]
 				}
 			}
 			LCD_ShowChar(morse_x,morse_y,' ',16,CYAN,RED);
- 8006d8a:	4b3b      	ldr	r3, [pc, #236]	; (8006e78 <APP_morsecode_loop+0x284>)
- 8006d8c:	6818      	ldr	r0, [r3, #0]
- 8006d8e:	4b3b      	ldr	r3, [pc, #236]	; (8006e7c <APP_morsecode_loop+0x288>)
- 8006d90:	6819      	ldr	r1, [r3, #0]
- 8006d92:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 8006d96:	9301      	str	r3, [sp, #4]
- 8006d98:	f647 73ff 	movw	r3, #32767	; 0x7fff
- 8006d9c:	9300      	str	r3, [sp, #0]
- 8006d9e:	2310      	movs	r3, #16
- 8006da0:	2220      	movs	r2, #32
- 8006da2:	f7fe fdc7 	bl	8005934 <LCD_ShowChar>
+ 8006d7e:	4b3b      	ldr	r3, [pc, #236]	; (8006e6c <APP_morsecode_loop+0x284>)
+ 8006d80:	6818      	ldr	r0, [r3, #0]
+ 8006d82:	4b3b      	ldr	r3, [pc, #236]	; (8006e70 <APP_morsecode_loop+0x288>)
+ 8006d84:	6819      	ldr	r1, [r3, #0]
+ 8006d86:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 8006d8a:	9301      	str	r3, [sp, #4]
+ 8006d8c:	f647 73ff 	movw	r3, #32767	; 0x7fff
+ 8006d90:	9300      	str	r3, [sp, #0]
+ 8006d92:	2310      	movs	r3, #16
+ 8006d94:	2220      	movs	r2, #32
+ 8006d96:	f7fe fdcd 	bl	8005934 <LCD_ShowChar>
 
 			morse_x+=8;
- 8006da6:	4b34      	ldr	r3, [pc, #208]	; (8006e78 <APP_morsecode_loop+0x284>)
- 8006da8:	681b      	ldr	r3, [r3, #0]
- 8006daa:	3308      	adds	r3, #8
- 8006dac:	4a32      	ldr	r2, [pc, #200]	; (8006e78 <APP_morsecode_loop+0x284>)
- 8006dae:	6013      	str	r3, [r2, #0]
+ 8006d9a:	4b34      	ldr	r3, [pc, #208]	; (8006e6c <APP_morsecode_loop+0x284>)
+ 8006d9c:	681b      	ldr	r3, [r3, #0]
+ 8006d9e:	3308      	adds	r3, #8
+ 8006da0:	4a32      	ldr	r2, [pc, #200]	; (8006e6c <APP_morsecode_loop+0x284>)
+ 8006da2:	6013      	str	r3, [r2, #0]
 		for(int a=0;a<morse_input_buff_num;a++)
- 8006db0:	693b      	ldr	r3, [r7, #16]
- 8006db2:	3301      	adds	r3, #1
- 8006db4:	613b      	str	r3, [r7, #16]
- 8006db6:	693b      	ldr	r3, [r7, #16]
- 8006db8:	2b7f      	cmp	r3, #127	; 0x7f
- 8006dba:	ddb8      	ble.n	8006d2e <APP_morsecode_loop+0x13a>
+ 8006da4:	693b      	ldr	r3, [r7, #16]
+ 8006da6:	3301      	adds	r3, #1
+ 8006da8:	613b      	str	r3, [r7, #16]
+ 8006daa:	693b      	ldr	r3, [r7, #16]
+ 8006dac:	2b7f      	cmp	r3, #127	; 0x7f
+ 8006dae:	ddb8      	ble.n	8006d22 <APP_morsecode_loop+0x13a>
 		}
 		morse_input_flag=0;
- 8006dbc:	4b30      	ldr	r3, [pc, #192]	; (8006e80 <APP_morsecode_loop+0x28c>)
- 8006dbe:	2200      	movs	r2, #0
- 8006dc0:	601a      	str	r2, [r3, #0]
+ 8006db0:	4b30      	ldr	r3, [pc, #192]	; (8006e74 <APP_morsecode_loop+0x28c>)
+ 8006db2:	2200      	movs	r2, #0
+ 8006db4:	601a      	str	r2, [r3, #0]
 		morse_char_flag=0;
- 8006dc2:	4b30      	ldr	r3, [pc, #192]	; (8006e84 <APP_morsecode_loop+0x290>)
- 8006dc4:	2200      	movs	r2, #0
- 8006dc6:	601a      	str	r2, [r3, #0]
+ 8006db6:	4b30      	ldr	r3, [pc, #192]	; (8006e78 <APP_morsecode_loop+0x290>)
+ 8006db8:	2200      	movs	r2, #0
+ 8006dba:	601a      	str	r2, [r3, #0]
 		morse_flah=0;
- 8006dc8:	4b2f      	ldr	r3, [pc, #188]	; (8006e88 <APP_morsecode_loop+0x294>)
- 8006dca:	2200      	movs	r2, #0
- 8006dcc:	701a      	strb	r2, [r3, #0]
+ 8006dbc:	4b2f      	ldr	r3, [pc, #188]	; (8006e7c <APP_morsecode_loop+0x294>)
+ 8006dbe:	2200      	movs	r2, #0
+ 8006dc0:	701a      	strb	r2, [r3, #0]
 	}
 
 	char get_char_temp;
 	push_key=KEY1;
- 8006dce:	2110      	movs	r1, #16
- 8006dd0:	482e      	ldr	r0, [pc, #184]	; (8006e8c <APP_morsecode_loop+0x298>)
- 8006dd2:	f7fb fa93 	bl	80022fc <HAL_GPIO_ReadPin>
- 8006dd6:	4603      	mov	r3, r0
- 8006dd8:	461a      	mov	r2, r3
- 8006dda:	4b2d      	ldr	r3, [pc, #180]	; (8006e90 <APP_morsecode_loop+0x29c>)
- 8006ddc:	701a      	strb	r2, [r3, #0]
+ 8006dc2:	2110      	movs	r1, #16
+ 8006dc4:	482e      	ldr	r0, [pc, #184]	; (8006e80 <APP_morsecode_loop+0x298>)
+ 8006dc6:	f7fb fa99 	bl	80022fc <HAL_GPIO_ReadPin>
+ 8006dca:	4603      	mov	r3, r0
+ 8006dcc:	461a      	mov	r2, r3
+ 8006dce:	4b2d      	ldr	r3, [pc, #180]	; (8006e84 <APP_morsecode_loop+0x29c>)
+ 8006dd0:	701a      	strb	r2, [r3, #0]
 
 	if(push_key!=last_key)
- 8006dde:	4b2c      	ldr	r3, [pc, #176]	; (8006e90 <APP_morsecode_loop+0x29c>)
- 8006de0:	781a      	ldrb	r2, [r3, #0]
- 8006de2:	4b2c      	ldr	r3, [pc, #176]	; (8006e94 <APP_morsecode_loop+0x2a0>)
- 8006de4:	781b      	ldrb	r3, [r3, #0]
- 8006de6:	429a      	cmp	r2, r3
- 8006de8:	d07b      	beq.n	8006ee2 <APP_morsecode_loop+0x2ee>
+ 8006dd2:	4b2c      	ldr	r3, [pc, #176]	; (8006e84 <APP_morsecode_loop+0x29c>)
+ 8006dd4:	781a      	ldrb	r2, [r3, #0]
+ 8006dd6:	4b2c      	ldr	r3, [pc, #176]	; (8006e88 <APP_morsecode_loop+0x2a0>)
+ 8006dd8:	781b      	ldrb	r3, [r3, #0]
+ 8006dda:	429a      	cmp	r2, r3
+ 8006ddc:	d07b      	beq.n	8006ed6 <APP_morsecode_loop+0x2ee>
 	{
 
 		if(push_key==0)
- 8006dea:	4b29      	ldr	r3, [pc, #164]	; (8006e90 <APP_morsecode_loop+0x29c>)
- 8006dec:	781b      	ldrb	r3, [r3, #0]
- 8006dee:	2b00      	cmp	r3, #0
- 8006df0:	d109      	bne.n	8006e06 <APP_morsecode_loop+0x212>
+ 8006dde:	4b29      	ldr	r3, [pc, #164]	; (8006e84 <APP_morsecode_loop+0x29c>)
+ 8006de0:	781b      	ldrb	r3, [r3, #0]
+ 8006de2:	2b00      	cmp	r3, #0
+ 8006de4:	d109      	bne.n	8006dfa <APP_morsecode_loop+0x212>
 		{
 			morse_t=HAL_GetTick();
- 8006df2:	f7fa ffb3 	bl	8001d5c <HAL_GetTick>
- 8006df6:	4603      	mov	r3, r0
- 8006df8:	4a27      	ldr	r2, [pc, #156]	; (8006e98 <APP_morsecode_loop+0x2a4>)
- 8006dfa:	6013      	str	r3, [r2, #0]
+ 8006de6:	f7fa ffb9 	bl	8001d5c <HAL_GetTick>
+ 8006dea:	4603      	mov	r3, r0
+ 8006dec:	4a27      	ldr	r2, [pc, #156]	; (8006e8c <APP_morsecode_loop+0x2a4>)
+ 8006dee:	6013      	str	r3, [r2, #0]
 			play_ones(morse_hz,50);
- 8006dfc:	2132      	movs	r1, #50	; 0x32
- 8006dfe:	2064      	movs	r0, #100	; 0x64
- 8006e00:	f7fe fe52 	bl	8005aa8 <play_ones>
- 8006e04:	e064      	b.n	8006ed0 <APP_morsecode_loop+0x2dc>
+ 8006df0:	2132      	movs	r1, #50	; 0x32
+ 8006df2:	2064      	movs	r0, #100	; 0x64
+ 8006df4:	f7fe fe58 	bl	8005aa8 <play_ones>
+ 8006df8:	e064      	b.n	8006ec4 <APP_morsecode_loop+0x2dc>
 		}else
 		{
 			morse_temp=HAL_GetTick()-morse_t;
- 8006e06:	f7fa ffa9 	bl	8001d5c <HAL_GetTick>
- 8006e0a:	4603      	mov	r3, r0
- 8006e0c:	b29a      	uxth	r2, r3
- 8006e0e:	4b22      	ldr	r3, [pc, #136]	; (8006e98 <APP_morsecode_loop+0x2a4>)
- 8006e10:	681b      	ldr	r3, [r3, #0]
- 8006e12:	b29b      	uxth	r3, r3
- 8006e14:	1ad3      	subs	r3, r2, r3
- 8006e16:	b29a      	uxth	r2, r3
- 8006e18:	4b20      	ldr	r3, [pc, #128]	; (8006e9c <APP_morsecode_loop+0x2a8>)
- 8006e1a:	801a      	strh	r2, [r3, #0]
+ 8006dfa:	f7fa ffaf 	bl	8001d5c <HAL_GetTick>
+ 8006dfe:	4603      	mov	r3, r0
+ 8006e00:	b29a      	uxth	r2, r3
+ 8006e02:	4b22      	ldr	r3, [pc, #136]	; (8006e8c <APP_morsecode_loop+0x2a4>)
+ 8006e04:	681b      	ldr	r3, [r3, #0]
+ 8006e06:	b29b      	uxth	r3, r3
+ 8006e08:	1ad3      	subs	r3, r2, r3
+ 8006e0a:	b29a      	uxth	r2, r3
+ 8006e0c:	4b20      	ldr	r3, [pc, #128]	; (8006e90 <APP_morsecode_loop+0x2a8>)
+ 8006e0e:	801a      	strh	r2, [r3, #0]
 			if(morse_temp>morse_t2)
- 8006e1c:	4b1f      	ldr	r3, [pc, #124]	; (8006e9c <APP_morsecode_loop+0x2a8>)
- 8006e1e:	881b      	ldrh	r3, [r3, #0]
- 8006e20:	f5b3 7fe1 	cmp.w	r3, #450	; 0x1c2
- 8006e24:	d845      	bhi.n	8006eb2 <APP_morsecode_loop+0x2be>
+ 8006e10:	4b1f      	ldr	r3, [pc, #124]	; (8006e90 <APP_morsecode_loop+0x2a8>)
+ 8006e12:	881b      	ldrh	r3, [r3, #0]
+ 8006e14:	f5b3 7fe1 	cmp.w	r3, #450	; 0x1c2
+ 8006e18:	d845      	bhi.n	8006ea6 <APP_morsecode_loop+0x2be>
 			{
 				//time out error
 			}else if(morse_temp>morse_t1)
- 8006e26:	4b1d      	ldr	r3, [pc, #116]	; (8006e9c <APP_morsecode_loop+0x2a8>)
- 8006e28:	881b      	ldrh	r3, [r3, #0]
- 8006e2a:	2b96      	cmp	r3, #150	; 0x96
- 8006e2c:	d93c      	bls.n	8006ea8 <APP_morsecode_loop+0x2b4>
+ 8006e1a:	4b1d      	ldr	r3, [pc, #116]	; (8006e90 <APP_morsecode_loop+0x2a8>)
+ 8006e1c:	881b      	ldrh	r3, [r3, #0]
+ 8006e1e:	2b96      	cmp	r3, #150	; 0x96
+ 8006e20:	d93c      	bls.n	8006e9c <APP_morsecode_loop+0x2b4>
 			{
 				//-
 				morse_input_buff[morse_input_flag]='-';
- 8006e2e:	4b14      	ldr	r3, [pc, #80]	; (8006e80 <APP_morsecode_loop+0x28c>)
- 8006e30:	681b      	ldr	r3, [r3, #0]
- 8006e32:	4a0a      	ldr	r2, [pc, #40]	; (8006e5c <APP_morsecode_loop+0x268>)
- 8006e34:	212d      	movs	r1, #45	; 0x2d
- 8006e36:	54d1      	strb	r1, [r2, r3]
+ 8006e22:	4b14      	ldr	r3, [pc, #80]	; (8006e74 <APP_morsecode_loop+0x28c>)
+ 8006e24:	681b      	ldr	r3, [r3, #0]
+ 8006e26:	4a0a      	ldr	r2, [pc, #40]	; (8006e50 <APP_morsecode_loop+0x268>)
+ 8006e28:	212d      	movs	r1, #45	; 0x2d
+ 8006e2a:	54d1      	strb	r1, [r2, r3]
 				morse_letter_temp|=(0x80>>morse_letter_flag);
- 8006e38:	4b19      	ldr	r3, [pc, #100]	; (8006ea0 <APP_morsecode_loop+0x2ac>)
+ 8006e2c:	4b19      	ldr	r3, [pc, #100]	; (8006e94 <APP_morsecode_loop+0x2ac>)
+ 8006e2e:	781b      	ldrb	r3, [r3, #0]
+ 8006e30:	461a      	mov	r2, r3
+ 8006e32:	2380      	movs	r3, #128	; 0x80
+ 8006e34:	4113      	asrs	r3, r2
+ 8006e36:	b25a      	sxtb	r2, r3
+ 8006e38:	4b17      	ldr	r3, [pc, #92]	; (8006e98 <APP_morsecode_loop+0x2b0>)
  8006e3a:	781b      	ldrb	r3, [r3, #0]
- 8006e3c:	461a      	mov	r2, r3
- 8006e3e:	2380      	movs	r3, #128	; 0x80
- 8006e40:	4113      	asrs	r3, r2
- 8006e42:	b25a      	sxtb	r2, r3
- 8006e44:	4b17      	ldr	r3, [pc, #92]	; (8006ea4 <APP_morsecode_loop+0x2b0>)
- 8006e46:	781b      	ldrb	r3, [r3, #0]
- 8006e48:	b25b      	sxtb	r3, r3
- 8006e4a:	4313      	orrs	r3, r2
- 8006e4c:	b25b      	sxtb	r3, r3
- 8006e4e:	b2da      	uxtb	r2, r3
- 8006e50:	4b14      	ldr	r3, [pc, #80]	; (8006ea4 <APP_morsecode_loop+0x2b0>)
- 8006e52:	701a      	strb	r2, [r3, #0]
- 8006e54:	e02d      	b.n	8006eb2 <APP_morsecode_loop+0x2be>
- 8006e56:	bf00      	nop
- 8006e58:	200003e8 	.word	0x200003e8
- 8006e5c:	20002588 	.word	0x20002588
- 8006e60:	0800b1e0 	.word	0x0800b1e0
- 8006e64:	200003d8 	.word	0x200003d8
- 8006e68:	0800a728 	.word	0x0800a728
- 8006e6c:	0800a73c 	.word	0x0800a73c
- 8006e70:	0800a748 	.word	0x0800a748
- 8006e74:	20002584 	.word	0x20002584
- 8006e78:	20002610 	.word	0x20002610
- 8006e7c:	2000260c 	.word	0x2000260c
- 8006e80:	20000218 	.word	0x20000218
- 8006e84:	2000021c 	.word	0x2000021c
- 8006e88:	20000220 	.word	0x20000220
- 8006e8c:	40011800 	.word	0x40011800
- 8006e90:	2000020c 	.word	0x2000020c
- 8006e94:	20000009 	.word	0x20000009
- 8006e98:	20000210 	.word	0x20000210
- 8006e9c:	20002614 	.word	0x20002614
- 8006ea0:	20000222 	.word	0x20000222
- 8006ea4:	20000221 	.word	0x20000221
+ 8006e3c:	b25b      	sxtb	r3, r3
+ 8006e3e:	4313      	orrs	r3, r2
+ 8006e40:	b25b      	sxtb	r3, r3
+ 8006e42:	b2da      	uxtb	r2, r3
+ 8006e44:	4b14      	ldr	r3, [pc, #80]	; (8006e98 <APP_morsecode_loop+0x2b0>)
+ 8006e46:	701a      	strb	r2, [r3, #0]
+ 8006e48:	e02d      	b.n	8006ea6 <APP_morsecode_loop+0x2be>
+ 8006e4a:	bf00      	nop
+ 8006e4c:	200003cc 	.word	0x200003cc
+ 8006e50:	2000251c 	.word	0x2000251c
+ 8006e54:	0800b1d0 	.word	0x0800b1d0
+ 8006e58:	200003bc 	.word	0x200003bc
+ 8006e5c:	0800a718 	.word	0x0800a718
+ 8006e60:	0800a72c 	.word	0x0800a72c
+ 8006e64:	0800a738 	.word	0x0800a738
+ 8006e68:	200025b4 	.word	0x200025b4
+ 8006e6c:	200025a8 	.word	0x200025a8
+ 8006e70:	200025ac 	.word	0x200025ac
+ 8006e74:	200025a0 	.word	0x200025a0
+ 8006e78:	200025a4 	.word	0x200025a4
+ 8006e7c:	200025b0 	.word	0x200025b0
+ 8006e80:	40011800 	.word	0x40011800
+ 8006e84:	2000250c 	.word	0x2000250c
+ 8006e88:	20000009 	.word	0x20000009
+ 8006e8c:	20002510 	.word	0x20002510
+ 8006e90:	20002518 	.word	0x20002518
+ 8006e94:	200025b2 	.word	0x200025b2
+ 8006e98:	200025b1 	.word	0x200025b1
 			}else
 			{
 				//.
 				morse_input_buff[morse_input_flag]='.';
- 8006ea8:	4b96      	ldr	r3, [pc, #600]	; (8007104 <APP_morsecode_loop+0x510>)
- 8006eaa:	681b      	ldr	r3, [r3, #0]
- 8006eac:	4a96      	ldr	r2, [pc, #600]	; (8007108 <APP_morsecode_loop+0x514>)
- 8006eae:	212e      	movs	r1, #46	; 0x2e
- 8006eb0:	54d1      	strb	r1, [r2, r3]
+ 8006e9c:	4b65      	ldr	r3, [pc, #404]	; (8007034 <APP_morsecode_loop+0x44c>)
+ 8006e9e:	681b      	ldr	r3, [r3, #0]
+ 8006ea0:	4a65      	ldr	r2, [pc, #404]	; (8007038 <APP_morsecode_loop+0x450>)
+ 8006ea2:	212e      	movs	r1, #46	; 0x2e
+ 8006ea4:	54d1      	strb	r1, [r2, r3]
 
 			}
 			morse_input_flag++;
- 8006eb2:	4b94      	ldr	r3, [pc, #592]	; (8007104 <APP_morsecode_loop+0x510>)
- 8006eb4:	681b      	ldr	r3, [r3, #0]
- 8006eb6:	3301      	adds	r3, #1
- 8006eb8:	4a92      	ldr	r2, [pc, #584]	; (8007104 <APP_morsecode_loop+0x510>)
- 8006eba:	6013      	str	r3, [r2, #0]
+ 8006ea6:	4b63      	ldr	r3, [pc, #396]	; (8007034 <APP_morsecode_loop+0x44c>)
+ 8006ea8:	681b      	ldr	r3, [r3, #0]
+ 8006eaa:	3301      	adds	r3, #1
+ 8006eac:	4a61      	ldr	r2, [pc, #388]	; (8007034 <APP_morsecode_loop+0x44c>)
+ 8006eae:	6013      	str	r3, [r2, #0]
 			morse_letter_flag++;
- 8006ebc:	4b93      	ldr	r3, [pc, #588]	; (800710c <APP_morsecode_loop+0x518>)
- 8006ebe:	781b      	ldrb	r3, [r3, #0]
- 8006ec0:	3301      	adds	r3, #1
- 8006ec2:	b2da      	uxtb	r2, r3
- 8006ec4:	4b91      	ldr	r3, [pc, #580]	; (800710c <APP_morsecode_loop+0x518>)
- 8006ec6:	701a      	strb	r2, [r3, #0]
+ 8006eb0:	4b62      	ldr	r3, [pc, #392]	; (800703c <APP_morsecode_loop+0x454>)
+ 8006eb2:	781b      	ldrb	r3, [r3, #0]
+ 8006eb4:	3301      	adds	r3, #1
+ 8006eb6:	b2da      	uxtb	r2, r3
+ 8006eb8:	4b60      	ldr	r3, [pc, #384]	; (800703c <APP_morsecode_loop+0x454>)
+ 8006eba:	701a      	strb	r2, [r3, #0]
 			//if(morse_input_flag>=morse_char_flag+8){morse_input_flag=morse_char_flag;morse_letter_flag=0;}
 			play_ones(0,0);
- 8006ec8:	2100      	movs	r1, #0
- 8006eca:	2000      	movs	r0, #0
- 8006ecc:	f7fe fdec 	bl	8005aa8 <play_ones>
+ 8006ebc:	2100      	movs	r1, #0
+ 8006ebe:	2000      	movs	r0, #0
+ 8006ec0:	f7fe fdf2 	bl	8005aa8 <play_ones>
 		}
 
 
 		last_key=push_key;
- 8006ed0:	4b8f      	ldr	r3, [pc, #572]	; (8007110 <APP_morsecode_loop+0x51c>)
- 8006ed2:	781a      	ldrb	r2, [r3, #0]
- 8006ed4:	4b8f      	ldr	r3, [pc, #572]	; (8007114 <APP_morsecode_loop+0x520>)
- 8006ed6:	701a      	strb	r2, [r3, #0]
+ 8006ec4:	4b5e      	ldr	r3, [pc, #376]	; (8007040 <APP_morsecode_loop+0x458>)
+ 8006ec6:	781a      	ldrb	r2, [r3, #0]
+ 8006ec8:	4b5e      	ldr	r3, [pc, #376]	; (8007044 <APP_morsecode_loop+0x45c>)
+ 8006eca:	701a      	strb	r2, [r3, #0]
 		morse_time_out=HAL_GetTick();
- 8006ed8:	f7fa ff40 	bl	8001d5c <HAL_GetTick>
- 8006edc:	4603      	mov	r3, r0
- 8006ede:	4a8e      	ldr	r2, [pc, #568]	; (8007118 <APP_morsecode_loop+0x524>)
- 8006ee0:	6013      	str	r3, [r2, #0]
+ 8006ecc:	f7fa ff46 	bl	8001d5c <HAL_GetTick>
+ 8006ed0:	4603      	mov	r3, r0
+ 8006ed2:	4a5d      	ldr	r2, [pc, #372]	; (8007048 <APP_morsecode_loop+0x460>)
+ 8006ed4:	6013      	str	r3, [r2, #0]
 	}
 
 	if(push_key==1)
- 8006ee2:	4b8b      	ldr	r3, [pc, #556]	; (8007110 <APP_morsecode_loop+0x51c>)
- 8006ee4:	781b      	ldrb	r3, [r3, #0]
- 8006ee6:	2b01      	cmp	r3, #1
- 8006ee8:	f040 80fc 	bne.w	80070e4 <APP_morsecode_loop+0x4f0>
+ 8006ed6:	4b5a      	ldr	r3, [pc, #360]	; (8007040 <APP_morsecode_loop+0x458>)
+ 8006ed8:	781b      	ldrb	r3, [r3, #0]
+ 8006eda:	2b01      	cmp	r3, #1
+ 8006edc:	f040 8113 	bne.w	8007106 <APP_morsecode_loop+0x51e>
 	{
 		//Get cursor on the screen
 		if((HAL_GetTick()-morse_time_out)>morse_t1)
- 8006eec:	f7fa ff36 	bl	8001d5c <HAL_GetTick>
- 8006ef0:	4602      	mov	r2, r0
- 8006ef2:	4b89      	ldr	r3, [pc, #548]	; (8007118 <APP_morsecode_loop+0x524>)
- 8006ef4:	681b      	ldr	r3, [r3, #0]
- 8006ef6:	1ad3      	subs	r3, r2, r3
- 8006ef8:	2b96      	cmp	r3, #150	; 0x96
- 8006efa:	f240 80d5 	bls.w	80070a8 <APP_morsecode_loop+0x4b4>
+ 8006ee0:	f7fa ff3c 	bl	8001d5c <HAL_GetTick>
+ 8006ee4:	4602      	mov	r2, r0
+ 8006ee6:	4b58      	ldr	r3, [pc, #352]	; (8007048 <APP_morsecode_loop+0x460>)
+ 8006ee8:	681b      	ldr	r3, [r3, #0]
+ 8006eea:	1ad3      	subs	r3, r2, r3
+ 8006eec:	2b96      	cmp	r3, #150	; 0x96
+ 8006eee:	f240 80ec 	bls.w	80070ca <APP_morsecode_loop+0x4e2>
 		{
 				if((morse_input_flag-morse_char_flag)>0)
- 8006efe:	4b81      	ldr	r3, [pc, #516]	; (8007104 <APP_morsecode_loop+0x510>)
- 8006f00:	681a      	ldr	r2, [r3, #0]
- 8006f02:	4b86      	ldr	r3, [pc, #536]	; (800711c <APP_morsecode_loop+0x528>)
- 8006f04:	681b      	ldr	r3, [r3, #0]
- 8006f06:	1ad3      	subs	r3, r2, r3
- 8006f08:	2b00      	cmp	r3, #0
- 8006f0a:	f340 80cd 	ble.w	80070a8 <APP_morsecode_loop+0x4b4>
+ 8006ef2:	4b50      	ldr	r3, [pc, #320]	; (8007034 <APP_morsecode_loop+0x44c>)
+ 8006ef4:	681a      	ldr	r2, [r3, #0]
+ 8006ef6:	4b55      	ldr	r3, [pc, #340]	; (800704c <APP_morsecode_loop+0x464>)
+ 8006ef8:	681b      	ldr	r3, [r3, #0]
+ 8006efa:	1ad3      	subs	r3, r2, r3
+ 8006efc:	2b00      	cmp	r3, #0
+ 8006efe:	f340 80e4 	ble.w	80070ca <APP_morsecode_loop+0x4e2>
 				{
 
 				get_char_temp=getmorsecode(morse_letter_flag,morse_letter_temp);
- 8006f0e:	4b7f      	ldr	r3, [pc, #508]	; (800710c <APP_morsecode_loop+0x518>)
- 8006f10:	781b      	ldrb	r3, [r3, #0]
- 8006f12:	4a83      	ldr	r2, [pc, #524]	; (8007120 <APP_morsecode_loop+0x52c>)
- 8006f14:	7812      	ldrb	r2, [r2, #0]
- 8006f16:	4611      	mov	r1, r2
- 8006f18:	4618      	mov	r0, r3
- 8006f1a:	f7ff fe33 	bl	8006b84 <getmorsecode>
- 8006f1e:	4603      	mov	r3, r0
- 8006f20:	70fb      	strb	r3, [r7, #3]
+ 8006f02:	4b4e      	ldr	r3, [pc, #312]	; (800703c <APP_morsecode_loop+0x454>)
+ 8006f04:	781b      	ldrb	r3, [r3, #0]
+ 8006f06:	4a52      	ldr	r2, [pc, #328]	; (8007050 <APP_morsecode_loop+0x468>)
+ 8006f08:	7812      	ldrb	r2, [r2, #0]
+ 8006f0a:	4611      	mov	r1, r2
+ 8006f0c:	4618      	mov	r0, r3
+ 8006f0e:	f7ff fe33 	bl	8006b78 <getmorsecode>
+ 8006f12:	4603      	mov	r3, r0
+ 8006f14:	70fb      	strb	r3, [r7, #3]
 
 				morse_x=morsecode_window->x;
- 8006f22:	4b80      	ldr	r3, [pc, #512]	; (8007124 <APP_morsecode_loop+0x530>)
- 8006f24:	681b      	ldr	r3, [r3, #0]
- 8006f26:	881b      	ldrh	r3, [r3, #0]
- 8006f28:	461a      	mov	r2, r3
- 8006f2a:	4b7f      	ldr	r3, [pc, #508]	; (8007128 <APP_morsecode_loop+0x534>)
- 8006f2c:	601a      	str	r2, [r3, #0]
+ 8006f16:	4b4f      	ldr	r3, [pc, #316]	; (8007054 <APP_morsecode_loop+0x46c>)
+ 8006f18:	681b      	ldr	r3, [r3, #0]
+ 8006f1a:	881b      	ldrh	r3, [r3, #0]
+ 8006f1c:	461a      	mov	r2, r3
+ 8006f1e:	4b4e      	ldr	r3, [pc, #312]	; (8007058 <APP_morsecode_loop+0x470>)
+ 8006f20:	601a      	str	r2, [r3, #0]
 				morse_y=morsecode_window->y+16;
- 8006f2e:	4b7d      	ldr	r3, [pc, #500]	; (8007124 <APP_morsecode_loop+0x530>)
- 8006f30:	681b      	ldr	r3, [r3, #0]
- 8006f32:	885b      	ldrh	r3, [r3, #2]
- 8006f34:	3310      	adds	r3, #16
- 8006f36:	4a7d      	ldr	r2, [pc, #500]	; (800712c <APP_morsecode_loop+0x538>)
- 8006f38:	6013      	str	r3, [r2, #0]
+ 8006f22:	4b4c      	ldr	r3, [pc, #304]	; (8007054 <APP_morsecode_loop+0x46c>)
+ 8006f24:	681b      	ldr	r3, [r3, #0]
+ 8006f26:	885b      	ldrh	r3, [r3, #2]
+ 8006f28:	3310      	adds	r3, #16
+ 8006f2a:	4a4c      	ldr	r2, [pc, #304]	; (800705c <APP_morsecode_loop+0x474>)
+ 8006f2c:	6013      	str	r3, [r2, #0]
 				for(int a=0;a<morse_char_flag;a++)
- 8006f3a:	2300      	movs	r3, #0
- 8006f3c:	60fb      	str	r3, [r7, #12]
- 8006f3e:	e030      	b.n	8006fa2 <APP_morsecode_loop+0x3ae>
+ 8006f2e:	2300      	movs	r3, #0
+ 8006f30:	60fb      	str	r3, [r7, #12]
+ 8006f32:	e030      	b.n	8006f96 <APP_morsecode_loop+0x3ae>
 				{
 
 					if(morse_x>=(morsecode_window->x+morsecode_window->width))
- 8006f40:	4b78      	ldr	r3, [pc, #480]	; (8007124 <APP_morsecode_loop+0x530>)
- 8006f42:	681b      	ldr	r3, [r3, #0]
- 8006f44:	881b      	ldrh	r3, [r3, #0]
- 8006f46:	461a      	mov	r2, r3
- 8006f48:	4b76      	ldr	r3, [pc, #472]	; (8007124 <APP_morsecode_loop+0x530>)
- 8006f4a:	681b      	ldr	r3, [r3, #0]
- 8006f4c:	889b      	ldrh	r3, [r3, #4]
- 8006f4e:	441a      	add	r2, r3
- 8006f50:	4b75      	ldr	r3, [pc, #468]	; (8007128 <APP_morsecode_loop+0x534>)
- 8006f52:	681b      	ldr	r3, [r3, #0]
- 8006f54:	429a      	cmp	r2, r3
- 8006f56:	dc1c      	bgt.n	8006f92 <APP_morsecode_loop+0x39e>
+ 8006f34:	4b47      	ldr	r3, [pc, #284]	; (8007054 <APP_morsecode_loop+0x46c>)
+ 8006f36:	681b      	ldr	r3, [r3, #0]
+ 8006f38:	881b      	ldrh	r3, [r3, #0]
+ 8006f3a:	461a      	mov	r2, r3
+ 8006f3c:	4b45      	ldr	r3, [pc, #276]	; (8007054 <APP_morsecode_loop+0x46c>)
+ 8006f3e:	681b      	ldr	r3, [r3, #0]
+ 8006f40:	889b      	ldrh	r3, [r3, #4]
+ 8006f42:	441a      	add	r2, r3
+ 8006f44:	4b44      	ldr	r3, [pc, #272]	; (8007058 <APP_morsecode_loop+0x470>)
+ 8006f46:	681b      	ldr	r3, [r3, #0]
+ 8006f48:	429a      	cmp	r2, r3
+ 8006f4a:	dc1c      	bgt.n	8006f86 <APP_morsecode_loop+0x39e>
 					{
 						morse_x=morsecode_window->x;
- 8006f58:	4b72      	ldr	r3, [pc, #456]	; (8007124 <APP_morsecode_loop+0x530>)
- 8006f5a:	681b      	ldr	r3, [r3, #0]
- 8006f5c:	881b      	ldrh	r3, [r3, #0]
- 8006f5e:	461a      	mov	r2, r3
- 8006f60:	4b71      	ldr	r3, [pc, #452]	; (8007128 <APP_morsecode_loop+0x534>)
- 8006f62:	601a      	str	r2, [r3, #0]
+ 8006f4c:	4b41      	ldr	r3, [pc, #260]	; (8007054 <APP_morsecode_loop+0x46c>)
+ 8006f4e:	681b      	ldr	r3, [r3, #0]
+ 8006f50:	881b      	ldrh	r3, [r3, #0]
+ 8006f52:	461a      	mov	r2, r3
+ 8006f54:	4b40      	ldr	r3, [pc, #256]	; (8007058 <APP_morsecode_loop+0x470>)
+ 8006f56:	601a      	str	r2, [r3, #0]
 						morse_y+=16;
- 8006f64:	4b71      	ldr	r3, [pc, #452]	; (800712c <APP_morsecode_loop+0x538>)
- 8006f66:	681b      	ldr	r3, [r3, #0]
- 8006f68:	3310      	adds	r3, #16
- 8006f6a:	4a70      	ldr	r2, [pc, #448]	; (800712c <APP_morsecode_loop+0x538>)
- 8006f6c:	6013      	str	r3, [r2, #0]
+ 8006f58:	4b40      	ldr	r3, [pc, #256]	; (800705c <APP_morsecode_loop+0x474>)
+ 8006f5a:	681b      	ldr	r3, [r3, #0]
+ 8006f5c:	3310      	adds	r3, #16
+ 8006f5e:	4a3f      	ldr	r2, [pc, #252]	; (800705c <APP_morsecode_loop+0x474>)
+ 8006f60:	6013      	str	r3, [r2, #0]
 						if(morse_y>=(morsecode_window->y+morsecode_window->high))
- 8006f6e:	4b6d      	ldr	r3, [pc, #436]	; (8007124 <APP_morsecode_loop+0x530>)
- 8006f70:	681b      	ldr	r3, [r3, #0]
- 8006f72:	885b      	ldrh	r3, [r3, #2]
- 8006f74:	461a      	mov	r2, r3
- 8006f76:	4b6b      	ldr	r3, [pc, #428]	; (8007124 <APP_morsecode_loop+0x530>)
- 8006f78:	681b      	ldr	r3, [r3, #0]
- 8006f7a:	88db      	ldrh	r3, [r3, #6]
- 8006f7c:	441a      	add	r2, r3
- 8006f7e:	4b6b      	ldr	r3, [pc, #428]	; (800712c <APP_morsecode_loop+0x538>)
- 8006f80:	681b      	ldr	r3, [r3, #0]
- 8006f82:	429a      	cmp	r2, r3
- 8006f84:	dc05      	bgt.n	8006f92 <APP_morsecode_loop+0x39e>
+ 8006f62:	4b3c      	ldr	r3, [pc, #240]	; (8007054 <APP_morsecode_loop+0x46c>)
+ 8006f64:	681b      	ldr	r3, [r3, #0]
+ 8006f66:	885b      	ldrh	r3, [r3, #2]
+ 8006f68:	461a      	mov	r2, r3
+ 8006f6a:	4b3a      	ldr	r3, [pc, #232]	; (8007054 <APP_morsecode_loop+0x46c>)
+ 8006f6c:	681b      	ldr	r3, [r3, #0]
+ 8006f6e:	88db      	ldrh	r3, [r3, #6]
+ 8006f70:	441a      	add	r2, r3
+ 8006f72:	4b3a      	ldr	r3, [pc, #232]	; (800705c <APP_morsecode_loop+0x474>)
+ 8006f74:	681b      	ldr	r3, [r3, #0]
+ 8006f76:	429a      	cmp	r2, r3
+ 8006f78:	dc05      	bgt.n	8006f86 <APP_morsecode_loop+0x39e>
 						{
 							morse_y=morsecode_window->y+16;
- 8006f86:	4b67      	ldr	r3, [pc, #412]	; (8007124 <APP_morsecode_loop+0x530>)
- 8006f88:	681b      	ldr	r3, [r3, #0]
- 8006f8a:	885b      	ldrh	r3, [r3, #2]
- 8006f8c:	3310      	adds	r3, #16
- 8006f8e:	4a67      	ldr	r2, [pc, #412]	; (800712c <APP_morsecode_loop+0x538>)
- 8006f90:	6013      	str	r3, [r2, #0]
+ 8006f7a:	4b36      	ldr	r3, [pc, #216]	; (8007054 <APP_morsecode_loop+0x46c>)
+ 8006f7c:	681b      	ldr	r3, [r3, #0]
+ 8006f7e:	885b      	ldrh	r3, [r3, #2]
+ 8006f80:	3310      	adds	r3, #16
+ 8006f82:	4a36      	ldr	r2, [pc, #216]	; (800705c <APP_morsecode_loop+0x474>)
+ 8006f84:	6013      	str	r3, [r2, #0]
 						}
 					}
 					morse_x+=8;
- 8006f92:	4b65      	ldr	r3, [pc, #404]	; (8007128 <APP_morsecode_loop+0x534>)
- 8006f94:	681b      	ldr	r3, [r3, #0]
- 8006f96:	3308      	adds	r3, #8
- 8006f98:	4a63      	ldr	r2, [pc, #396]	; (8007128 <APP_morsecode_loop+0x534>)
- 8006f9a:	6013      	str	r3, [r2, #0]
+ 8006f86:	4b34      	ldr	r3, [pc, #208]	; (8007058 <APP_morsecode_loop+0x470>)
+ 8006f88:	681b      	ldr	r3, [r3, #0]
+ 8006f8a:	3308      	adds	r3, #8
+ 8006f8c:	4a32      	ldr	r2, [pc, #200]	; (8007058 <APP_morsecode_loop+0x470>)
+ 8006f8e:	6013      	str	r3, [r2, #0]
 				for(int a=0;a<morse_char_flag;a++)
- 8006f9c:	68fb      	ldr	r3, [r7, #12]
- 8006f9e:	3301      	adds	r3, #1
- 8006fa0:	60fb      	str	r3, [r7, #12]
- 8006fa2:	4b5e      	ldr	r3, [pc, #376]	; (800711c <APP_morsecode_loop+0x528>)
- 8006fa4:	681b      	ldr	r3, [r3, #0]
- 8006fa6:	68fa      	ldr	r2, [r7, #12]
- 8006fa8:	429a      	cmp	r2, r3
- 8006faa:	dbc9      	blt.n	8006f40 <APP_morsecode_loop+0x34c>
+ 8006f90:	68fb      	ldr	r3, [r7, #12]
+ 8006f92:	3301      	adds	r3, #1
+ 8006f94:	60fb      	str	r3, [r7, #12]
+ 8006f96:	4b2d      	ldr	r3, [pc, #180]	; (800704c <APP_morsecode_loop+0x464>)
+ 8006f98:	681b      	ldr	r3, [r3, #0]
+ 8006f9a:	68fa      	ldr	r2, [r7, #12]
+ 8006f9c:	429a      	cmp	r2, r3
+ 8006f9e:	dbc9      	blt.n	8006f34 <APP_morsecode_loop+0x34c>
 				}
 
 				for(int a=morse_char_flag;a<morse_input_flag;a++)
- 8006fac:	4b5b      	ldr	r3, [pc, #364]	; (800711c <APP_morsecode_loop+0x528>)
- 8006fae:	681b      	ldr	r3, [r3, #0]
- 8006fb0:	60bb      	str	r3, [r7, #8]
- 8006fb2:	e05f      	b.n	8007074 <APP_morsecode_loop+0x480>
+ 8006fa0:	4b2a      	ldr	r3, [pc, #168]	; (800704c <APP_morsecode_loop+0x464>)
+ 8006fa2:	681b      	ldr	r3, [r3, #0]
+ 8006fa4:	60bb      	str	r3, [r7, #8]
+ 8006fa6:	e076      	b.n	8007096 <APP_morsecode_loop+0x4ae>
 				{
 
 					if(morse_x>=(morsecode_window->x+morsecode_window->width))
- 8006fb4:	4b5b      	ldr	r3, [pc, #364]	; (8007124 <APP_morsecode_loop+0x530>)
- 8006fb6:	681b      	ldr	r3, [r3, #0]
- 8006fb8:	881b      	ldrh	r3, [r3, #0]
- 8006fba:	461a      	mov	r2, r3
- 8006fbc:	4b59      	ldr	r3, [pc, #356]	; (8007124 <APP_morsecode_loop+0x530>)
- 8006fbe:	681b      	ldr	r3, [r3, #0]
- 8006fc0:	889b      	ldrh	r3, [r3, #4]
- 8006fc2:	441a      	add	r2, r3
- 8006fc4:	4b58      	ldr	r3, [pc, #352]	; (8007128 <APP_morsecode_loop+0x534>)
- 8006fc6:	681b      	ldr	r3, [r3, #0]
- 8006fc8:	429a      	cmp	r2, r3
- 8006fca:	dc1c      	bgt.n	8007006 <APP_morsecode_loop+0x412>
+ 8006fa8:	4b2a      	ldr	r3, [pc, #168]	; (8007054 <APP_morsecode_loop+0x46c>)
+ 8006faa:	681b      	ldr	r3, [r3, #0]
+ 8006fac:	881b      	ldrh	r3, [r3, #0]
+ 8006fae:	461a      	mov	r2, r3
+ 8006fb0:	4b28      	ldr	r3, [pc, #160]	; (8007054 <APP_morsecode_loop+0x46c>)
+ 8006fb2:	681b      	ldr	r3, [r3, #0]
+ 8006fb4:	889b      	ldrh	r3, [r3, #4]
+ 8006fb6:	441a      	add	r2, r3
+ 8006fb8:	4b27      	ldr	r3, [pc, #156]	; (8007058 <APP_morsecode_loop+0x470>)
+ 8006fba:	681b      	ldr	r3, [r3, #0]
+ 8006fbc:	429a      	cmp	r2, r3
+ 8006fbe:	dc1c      	bgt.n	8006ffa <APP_morsecode_loop+0x412>
 					{
 						morse_x=morsecode_window->x;
- 8006fcc:	4b55      	ldr	r3, [pc, #340]	; (8007124 <APP_morsecode_loop+0x530>)
- 8006fce:	681b      	ldr	r3, [r3, #0]
- 8006fd0:	881b      	ldrh	r3, [r3, #0]
- 8006fd2:	461a      	mov	r2, r3
- 8006fd4:	4b54      	ldr	r3, [pc, #336]	; (8007128 <APP_morsecode_loop+0x534>)
- 8006fd6:	601a      	str	r2, [r3, #0]
+ 8006fc0:	4b24      	ldr	r3, [pc, #144]	; (8007054 <APP_morsecode_loop+0x46c>)
+ 8006fc2:	681b      	ldr	r3, [r3, #0]
+ 8006fc4:	881b      	ldrh	r3, [r3, #0]
+ 8006fc6:	461a      	mov	r2, r3
+ 8006fc8:	4b23      	ldr	r3, [pc, #140]	; (8007058 <APP_morsecode_loop+0x470>)
+ 8006fca:	601a      	str	r2, [r3, #0]
 						morse_y+=16;
- 8006fd8:	4b54      	ldr	r3, [pc, #336]	; (800712c <APP_morsecode_loop+0x538>)
- 8006fda:	681b      	ldr	r3, [r3, #0]
- 8006fdc:	3310      	adds	r3, #16
- 8006fde:	4a53      	ldr	r2, [pc, #332]	; (800712c <APP_morsecode_loop+0x538>)
- 8006fe0:	6013      	str	r3, [r2, #0]
+ 8006fcc:	4b23      	ldr	r3, [pc, #140]	; (800705c <APP_morsecode_loop+0x474>)
+ 8006fce:	681b      	ldr	r3, [r3, #0]
+ 8006fd0:	3310      	adds	r3, #16
+ 8006fd2:	4a22      	ldr	r2, [pc, #136]	; (800705c <APP_morsecode_loop+0x474>)
+ 8006fd4:	6013      	str	r3, [r2, #0]
 						if(morse_y>=(morsecode_window->y+morsecode_window->high))
- 8006fe2:	4b50      	ldr	r3, [pc, #320]	; (8007124 <APP_morsecode_loop+0x530>)
- 8006fe4:	681b      	ldr	r3, [r3, #0]
- 8006fe6:	885b      	ldrh	r3, [r3, #2]
- 8006fe8:	461a      	mov	r2, r3
- 8006fea:	4b4e      	ldr	r3, [pc, #312]	; (8007124 <APP_morsecode_loop+0x530>)
- 8006fec:	681b      	ldr	r3, [r3, #0]
- 8006fee:	88db      	ldrh	r3, [r3, #6]
- 8006ff0:	441a      	add	r2, r3
- 8006ff2:	4b4e      	ldr	r3, [pc, #312]	; (800712c <APP_morsecode_loop+0x538>)
- 8006ff4:	681b      	ldr	r3, [r3, #0]
- 8006ff6:	429a      	cmp	r2, r3
- 8006ff8:	dc05      	bgt.n	8007006 <APP_morsecode_loop+0x412>
+ 8006fd6:	4b1f      	ldr	r3, [pc, #124]	; (8007054 <APP_morsecode_loop+0x46c>)
+ 8006fd8:	681b      	ldr	r3, [r3, #0]
+ 8006fda:	885b      	ldrh	r3, [r3, #2]
+ 8006fdc:	461a      	mov	r2, r3
+ 8006fde:	4b1d      	ldr	r3, [pc, #116]	; (8007054 <APP_morsecode_loop+0x46c>)
+ 8006fe0:	681b      	ldr	r3, [r3, #0]
+ 8006fe2:	88db      	ldrh	r3, [r3, #6]
+ 8006fe4:	441a      	add	r2, r3
+ 8006fe6:	4b1d      	ldr	r3, [pc, #116]	; (800705c <APP_morsecode_loop+0x474>)
+ 8006fe8:	681b      	ldr	r3, [r3, #0]
+ 8006fea:	429a      	cmp	r2, r3
+ 8006fec:	dc05      	bgt.n	8006ffa <APP_morsecode_loop+0x412>
 						{
 							morse_y=morsecode_window->y+16;
- 8006ffa:	4b4a      	ldr	r3, [pc, #296]	; (8007124 <APP_morsecode_loop+0x530>)
- 8006ffc:	681b      	ldr	r3, [r3, #0]
- 8006ffe:	885b      	ldrh	r3, [r3, #2]
- 8007000:	3310      	adds	r3, #16
- 8007002:	4a4a      	ldr	r2, [pc, #296]	; (800712c <APP_morsecode_loop+0x538>)
- 8007004:	6013      	str	r3, [r2, #0]
+ 8006fee:	4b19      	ldr	r3, [pc, #100]	; (8007054 <APP_morsecode_loop+0x46c>)
+ 8006ff0:	681b      	ldr	r3, [r3, #0]
+ 8006ff2:	885b      	ldrh	r3, [r3, #2]
+ 8006ff4:	3310      	adds	r3, #16
+ 8006ff6:	4a19      	ldr	r2, [pc, #100]	; (800705c <APP_morsecode_loop+0x474>)
+ 8006ff8:	6013      	str	r3, [r2, #0]
 						}
 					}
 
 					if((a==morse_char_flag)&&(get_char_temp!=0))
- 8007006:	4b45      	ldr	r3, [pc, #276]	; (800711c <APP_morsecode_loop+0x528>)
- 8007008:	681b      	ldr	r3, [r3, #0]
- 800700a:	68ba      	ldr	r2, [r7, #8]
- 800700c:	429a      	cmp	r2, r3
- 800700e:	d116      	bne.n	800703e <APP_morsecode_loop+0x44a>
- 8007010:	78fb      	ldrb	r3, [r7, #3]
- 8007012:	2b00      	cmp	r3, #0
- 8007014:	d013      	beq.n	800703e <APP_morsecode_loop+0x44a>
+ 8006ffa:	4b14      	ldr	r3, [pc, #80]	; (800704c <APP_morsecode_loop+0x464>)
+ 8006ffc:	681b      	ldr	r3, [r3, #0]
+ 8006ffe:	68ba      	ldr	r2, [r7, #8]
+ 8007000:	429a      	cmp	r2, r3
+ 8007002:	d12d      	bne.n	8007060 <APP_morsecode_loop+0x478>
+ 8007004:	78fb      	ldrb	r3, [r7, #3]
+ 8007006:	2b00      	cmp	r3, #0
+ 8007008:	d02a      	beq.n	8007060 <APP_morsecode_loop+0x478>
 					{
 
 						LCD_ShowChar(morse_x,morse_y,get_char_temp,16,CYAN,RED);
- 8007016:	4b44      	ldr	r3, [pc, #272]	; (8007128 <APP_morsecode_loop+0x534>)
- 8007018:	6818      	ldr	r0, [r3, #0]
- 800701a:	4b44      	ldr	r3, [pc, #272]	; (800712c <APP_morsecode_loop+0x538>)
- 800701c:	6819      	ldr	r1, [r3, #0]
- 800701e:	78fa      	ldrb	r2, [r7, #3]
- 8007020:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 8007024:	9301      	str	r3, [sp, #4]
- 8007026:	f647 73ff 	movw	r3, #32767	; 0x7fff
- 800702a:	9300      	str	r3, [sp, #0]
- 800702c:	2310      	movs	r3, #16
- 800702e:	f7fe fc81 	bl	8005934 <LCD_ShowChar>
+ 800700a:	4b13      	ldr	r3, [pc, #76]	; (8007058 <APP_morsecode_loop+0x470>)
+ 800700c:	6818      	ldr	r0, [r3, #0]
+ 800700e:	4b13      	ldr	r3, [pc, #76]	; (800705c <APP_morsecode_loop+0x474>)
+ 8007010:	6819      	ldr	r1, [r3, #0]
+ 8007012:	78fa      	ldrb	r2, [r7, #3]
+ 8007014:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 8007018:	9301      	str	r3, [sp, #4]
+ 800701a:	f647 73ff 	movw	r3, #32767	; 0x7fff
+ 800701e:	9300      	str	r3, [sp, #0]
+ 8007020:	2310      	movs	r3, #16
+ 8007022:	f7fe fc87 	bl	8005934 <LCD_ShowChar>
 						morse_input_buff[a]=get_char_temp;
- 8007032:	4a35      	ldr	r2, [pc, #212]	; (8007108 <APP_morsecode_loop+0x514>)
- 8007034:	68bb      	ldr	r3, [r7, #8]
- 8007036:	4413      	add	r3, r2
- 8007038:	78fa      	ldrb	r2, [r7, #3]
- 800703a:	701a      	strb	r2, [r3, #0]
+ 8007026:	4a04      	ldr	r2, [pc, #16]	; (8007038 <APP_morsecode_loop+0x450>)
+ 8007028:	68bb      	ldr	r3, [r7, #8]
+ 800702a:	4413      	add	r3, r2
+ 800702c:	78fa      	ldrb	r2, [r7, #3]
+ 800702e:	701a      	strb	r2, [r3, #0]
 					{
- 800703c:	e012      	b.n	8007064 <APP_morsecode_loop+0x470>
+ 8007030:	e029      	b.n	8007086 <APP_morsecode_loop+0x49e>
+ 8007032:	bf00      	nop
+ 8007034:	200025a0 	.word	0x200025a0
+ 8007038:	2000251c 	.word	0x2000251c
+ 800703c:	200025b2 	.word	0x200025b2
+ 8007040:	2000250c 	.word	0x2000250c
+ 8007044:	20000009 	.word	0x20000009
+ 8007048:	20002514 	.word	0x20002514
+ 800704c:	200025a4 	.word	0x200025a4
+ 8007050:	200025b1 	.word	0x200025b1
+ 8007054:	200025b4 	.word	0x200025b4
+ 8007058:	200025a8 	.word	0x200025a8
+ 800705c:	200025ac 	.word	0x200025ac
 
 					}else
 					{
 						LCD_ShowChar(morse_x,morse_y,' ',16,CYAN,RED);
- 800703e:	4b3a      	ldr	r3, [pc, #232]	; (8007128 <APP_morsecode_loop+0x534>)
- 8007040:	6818      	ldr	r0, [r3, #0]
- 8007042:	4b3a      	ldr	r3, [pc, #232]	; (800712c <APP_morsecode_loop+0x538>)
- 8007044:	6819      	ldr	r1, [r3, #0]
- 8007046:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 800704a:	9301      	str	r3, [sp, #4]
- 800704c:	f647 73ff 	movw	r3, #32767	; 0x7fff
- 8007050:	9300      	str	r3, [sp, #0]
- 8007052:	2310      	movs	r3, #16
- 8007054:	2220      	movs	r2, #32
- 8007056:	f7fe fc6d 	bl	8005934 <LCD_ShowChar>
+ 8007060:	4b50      	ldr	r3, [pc, #320]	; (80071a4 <APP_morsecode_loop+0x5bc>)
+ 8007062:	6818      	ldr	r0, [r3, #0]
+ 8007064:	4b50      	ldr	r3, [pc, #320]	; (80071a8 <APP_morsecode_loop+0x5c0>)
+ 8007066:	6819      	ldr	r1, [r3, #0]
+ 8007068:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 800706c:	9301      	str	r3, [sp, #4]
+ 800706e:	f647 73ff 	movw	r3, #32767	; 0x7fff
+ 8007072:	9300      	str	r3, [sp, #0]
+ 8007074:	2310      	movs	r3, #16
+ 8007076:	2220      	movs	r2, #32
+ 8007078:	f7fe fc5c 	bl	8005934 <LCD_ShowChar>
 						morse_input_buff[a]='\0';
- 800705a:	4a2b      	ldr	r2, [pc, #172]	; (8007108 <APP_morsecode_loop+0x514>)
- 800705c:	68bb      	ldr	r3, [r7, #8]
- 800705e:	4413      	add	r3, r2
- 8007060:	2200      	movs	r2, #0
- 8007062:	701a      	strb	r2, [r3, #0]
+ 800707c:	4a4b      	ldr	r2, [pc, #300]	; (80071ac <APP_morsecode_loop+0x5c4>)
+ 800707e:	68bb      	ldr	r3, [r7, #8]
+ 8007080:	4413      	add	r3, r2
+ 8007082:	2200      	movs	r2, #0
+ 8007084:	701a      	strb	r2, [r3, #0]
 					}
 
 					morse_x+=8;
- 8007064:	4b30      	ldr	r3, [pc, #192]	; (8007128 <APP_morsecode_loop+0x534>)
- 8007066:	681b      	ldr	r3, [r3, #0]
- 8007068:	3308      	adds	r3, #8
- 800706a:	4a2f      	ldr	r2, [pc, #188]	; (8007128 <APP_morsecode_loop+0x534>)
- 800706c:	6013      	str	r3, [r2, #0]
+ 8007086:	4b47      	ldr	r3, [pc, #284]	; (80071a4 <APP_morsecode_loop+0x5bc>)
+ 8007088:	681b      	ldr	r3, [r3, #0]
+ 800708a:	3308      	adds	r3, #8
+ 800708c:	4a45      	ldr	r2, [pc, #276]	; (80071a4 <APP_morsecode_loop+0x5bc>)
+ 800708e:	6013      	str	r3, [r2, #0]
 				for(int a=morse_char_flag;a<morse_input_flag;a++)
- 800706e:	68bb      	ldr	r3, [r7, #8]
- 8007070:	3301      	adds	r3, #1
- 8007072:	60bb      	str	r3, [r7, #8]
- 8007074:	4b23      	ldr	r3, [pc, #140]	; (8007104 <APP_morsecode_loop+0x510>)
- 8007076:	681b      	ldr	r3, [r3, #0]
- 8007078:	68ba      	ldr	r2, [r7, #8]
- 800707a:	429a      	cmp	r2, r3
- 800707c:	db9a      	blt.n	8006fb4 <APP_morsecode_loop+0x3c0>
+ 8007090:	68bb      	ldr	r3, [r7, #8]
+ 8007092:	3301      	adds	r3, #1
+ 8007094:	60bb      	str	r3, [r7, #8]
+ 8007096:	4b46      	ldr	r3, [pc, #280]	; (80071b0 <APP_morsecode_loop+0x5c8>)
+ 8007098:	681b      	ldr	r3, [r3, #0]
+ 800709a:	68ba      	ldr	r2, [r7, #8]
+ 800709c:	429a      	cmp	r2, r3
+ 800709e:	db83      	blt.n	8006fa8 <APP_morsecode_loop+0x3c0>
 
 
 				}
 				morse_letter_flag=0;
- 800707e:	4b23      	ldr	r3, [pc, #140]	; (800710c <APP_morsecode_loop+0x518>)
- 8007080:	2200      	movs	r2, #0
- 8007082:	701a      	strb	r2, [r3, #0]
+ 80070a0:	4b44      	ldr	r3, [pc, #272]	; (80071b4 <APP_morsecode_loop+0x5cc>)
+ 80070a2:	2200      	movs	r2, #0
+ 80070a4:	701a      	strb	r2, [r3, #0]
 				morse_letter_temp=0;
- 8007084:	4b26      	ldr	r3, [pc, #152]	; (8007120 <APP_morsecode_loop+0x52c>)
- 8007086:	2200      	movs	r2, #0
- 8007088:	701a      	strb	r2, [r3, #0]
+ 80070a6:	4b44      	ldr	r3, [pc, #272]	; (80071b8 <APP_morsecode_loop+0x5d0>)
+ 80070a8:	2200      	movs	r2, #0
+ 80070aa:	701a      	strb	r2, [r3, #0]
 				if(get_char_temp!=0){morse_flah=1;morse_char_flag+=1;}
- 800708a:	78fb      	ldrb	r3, [r7, #3]
- 800708c:	2b00      	cmp	r3, #0
- 800708e:	d007      	beq.n	80070a0 <APP_morsecode_loop+0x4ac>
- 8007090:	4b27      	ldr	r3, [pc, #156]	; (8007130 <APP_morsecode_loop+0x53c>)
- 8007092:	2201      	movs	r2, #1
- 8007094:	701a      	strb	r2, [r3, #0]
- 8007096:	4b21      	ldr	r3, [pc, #132]	; (800711c <APP_morsecode_loop+0x528>)
- 8007098:	681b      	ldr	r3, [r3, #0]
- 800709a:	3301      	adds	r3, #1
- 800709c:	4a1f      	ldr	r2, [pc, #124]	; (800711c <APP_morsecode_loop+0x528>)
- 800709e:	6013      	str	r3, [r2, #0]
+ 80070ac:	78fb      	ldrb	r3, [r7, #3]
+ 80070ae:	2b00      	cmp	r3, #0
+ 80070b0:	d007      	beq.n	80070c2 <APP_morsecode_loop+0x4da>
+ 80070b2:	4b42      	ldr	r3, [pc, #264]	; (80071bc <APP_morsecode_loop+0x5d4>)
+ 80070b4:	2201      	movs	r2, #1
+ 80070b6:	701a      	strb	r2, [r3, #0]
+ 80070b8:	4b41      	ldr	r3, [pc, #260]	; (80071c0 <APP_morsecode_loop+0x5d8>)
+ 80070ba:	681b      	ldr	r3, [r3, #0]
+ 80070bc:	3301      	adds	r3, #1
+ 80070be:	4a40      	ldr	r2, [pc, #256]	; (80071c0 <APP_morsecode_loop+0x5d8>)
+ 80070c0:	6013      	str	r3, [r2, #0]
 
 				morse_input_flag=morse_char_flag;
- 80070a0:	4b1e      	ldr	r3, [pc, #120]	; (800711c <APP_morsecode_loop+0x528>)
- 80070a2:	681b      	ldr	r3, [r3, #0]
- 80070a4:	4a17      	ldr	r2, [pc, #92]	; (8007104 <APP_morsecode_loop+0x510>)
- 80070a6:	6013      	str	r3, [r2, #0]
+ 80070c2:	4b3f      	ldr	r3, [pc, #252]	; (80071c0 <APP_morsecode_loop+0x5d8>)
+ 80070c4:	681b      	ldr	r3, [r3, #0]
+ 80070c6:	4a3a      	ldr	r2, [pc, #232]	; (80071b0 <APP_morsecode_loop+0x5c8>)
+ 80070c8:	6013      	str	r3, [r2, #0]
 
 
 			}
 		}
 		if((HAL_GetTick()-morse_time_out)>morse_t2)
- 80070a8:	f7fa fe58 	bl	8001d5c <HAL_GetTick>
- 80070ac:	4602      	mov	r2, r0
- 80070ae:	4b1a      	ldr	r3, [pc, #104]	; (8007118 <APP_morsecode_loop+0x524>)
- 80070b0:	681b      	ldr	r3, [r3, #0]
- 80070b2:	1ad3      	subs	r3, r2, r3
- 80070b4:	f5b3 7fe1 	cmp.w	r3, #450	; 0x1c2
- 80070b8:	d914      	bls.n	80070e4 <APP_morsecode_loop+0x4f0>
+ 80070ca:	f7fa fe47 	bl	8001d5c <HAL_GetTick>
+ 80070ce:	4602      	mov	r2, r0
+ 80070d0:	4b3c      	ldr	r3, [pc, #240]	; (80071c4 <APP_morsecode_loop+0x5dc>)
+ 80070d2:	681b      	ldr	r3, [r3, #0]
+ 80070d4:	1ad3      	subs	r3, r2, r3
+ 80070d6:	f5b3 7fe1 	cmp.w	r3, #450	; 0x1c2
+ 80070da:	d914      	bls.n	8007106 <APP_morsecode_loop+0x51e>
 		{
 			if(morse_flah==1)
- 80070ba:	4b1d      	ldr	r3, [pc, #116]	; (8007130 <APP_morsecode_loop+0x53c>)
- 80070bc:	781b      	ldrb	r3, [r3, #0]
- 80070be:	2b01      	cmp	r3, #1
- 80070c0:	d110      	bne.n	80070e4 <APP_morsecode_loop+0x4f0>
+ 80070dc:	4b37      	ldr	r3, [pc, #220]	; (80071bc <APP_morsecode_loop+0x5d4>)
+ 80070de:	781b      	ldrb	r3, [r3, #0]
+ 80070e0:	2b01      	cmp	r3, #1
+ 80070e2:	d110      	bne.n	8007106 <APP_morsecode_loop+0x51e>
 			{
 				morse_input_buff[morse_char_flag]=' ';
- 80070c2:	4b16      	ldr	r3, [pc, #88]	; (800711c <APP_morsecode_loop+0x528>)
- 80070c4:	681b      	ldr	r3, [r3, #0]
- 80070c6:	4a10      	ldr	r2, [pc, #64]	; (8007108 <APP_morsecode_loop+0x514>)
- 80070c8:	2120      	movs	r1, #32
- 80070ca:	54d1      	strb	r1, [r2, r3]
+ 80070e4:	4b36      	ldr	r3, [pc, #216]	; (80071c0 <APP_morsecode_loop+0x5d8>)
+ 80070e6:	681b      	ldr	r3, [r3, #0]
+ 80070e8:	4a30      	ldr	r2, [pc, #192]	; (80071ac <APP_morsecode_loop+0x5c4>)
+ 80070ea:	2120      	movs	r1, #32
+ 80070ec:	54d1      	strb	r1, [r2, r3]
 					}
 					morse_x+=8;
 				}
 				LCD_ShowChar(morse_x,morse_y,morse_input_buff[morse_char_flag],16,CYAN,RED);
 */
 				morse_char_flag+=1;
- 80070cc:	4b13      	ldr	r3, [pc, #76]	; (800711c <APP_morsecode_loop+0x528>)
- 80070ce:	681b      	ldr	r3, [r3, #0]
- 80070d0:	3301      	adds	r3, #1
- 80070d2:	4a12      	ldr	r2, [pc, #72]	; (800711c <APP_morsecode_loop+0x528>)
- 80070d4:	6013      	str	r3, [r2, #0]
+ 80070ee:	4b34      	ldr	r3, [pc, #208]	; (80071c0 <APP_morsecode_loop+0x5d8>)
+ 80070f0:	681b      	ldr	r3, [r3, #0]
+ 80070f2:	3301      	adds	r3, #1
+ 80070f4:	4a32      	ldr	r2, [pc, #200]	; (80071c0 <APP_morsecode_loop+0x5d8>)
+ 80070f6:	6013      	str	r3, [r2, #0]
 				morse_input_flag=morse_char_flag;
- 80070d6:	4b11      	ldr	r3, [pc, #68]	; (800711c <APP_morsecode_loop+0x528>)
- 80070d8:	681b      	ldr	r3, [r3, #0]
- 80070da:	4a0a      	ldr	r2, [pc, #40]	; (8007104 <APP_morsecode_loop+0x510>)
- 80070dc:	6013      	str	r3, [r2, #0]
+ 80070f8:	4b31      	ldr	r3, [pc, #196]	; (80071c0 <APP_morsecode_loop+0x5d8>)
+ 80070fa:	681b      	ldr	r3, [r3, #0]
+ 80070fc:	4a2c      	ldr	r2, [pc, #176]	; (80071b0 <APP_morsecode_loop+0x5c8>)
+ 80070fe:	6013      	str	r3, [r2, #0]
 				morse_flah=0;
- 80070de:	4b14      	ldr	r3, [pc, #80]	; (8007130 <APP_morsecode_loop+0x53c>)
- 80070e0:	2200      	movs	r2, #0
- 80070e2:	701a      	strb	r2, [r3, #0]
+ 8007100:	4b2e      	ldr	r3, [pc, #184]	; (80071bc <APP_morsecode_loop+0x5d4>)
+ 8007102:	2200      	movs	r2, #0
+ 8007104:	701a      	strb	r2, [r3, #0]
 			}
 		}
 	}
 
 	morse_x=morsecode_window->x;
- 80070e4:	4b0f      	ldr	r3, [pc, #60]	; (8007124 <APP_morsecode_loop+0x530>)
- 80070e6:	681b      	ldr	r3, [r3, #0]
- 80070e8:	881b      	ldrh	r3, [r3, #0]
- 80070ea:	461a      	mov	r2, r3
- 80070ec:	4b0e      	ldr	r3, [pc, #56]	; (8007128 <APP_morsecode_loop+0x534>)
- 80070ee:	601a      	str	r2, [r3, #0]
+ 8007106:	4b30      	ldr	r3, [pc, #192]	; (80071c8 <APP_morsecode_loop+0x5e0>)
+ 8007108:	681b      	ldr	r3, [r3, #0]
+ 800710a:	881b      	ldrh	r3, [r3, #0]
+ 800710c:	461a      	mov	r2, r3
+ 800710e:	4b25      	ldr	r3, [pc, #148]	; (80071a4 <APP_morsecode_loop+0x5bc>)
+ 8007110:	601a      	str	r2, [r3, #0]
 	morse_y=morsecode_window->y+16;
- 80070f0:	4b0c      	ldr	r3, [pc, #48]	; (8007124 <APP_morsecode_loop+0x530>)
- 80070f2:	681b      	ldr	r3, [r3, #0]
- 80070f4:	885b      	ldrh	r3, [r3, #2]
- 80070f6:	3310      	adds	r3, #16
- 80070f8:	4a0c      	ldr	r2, [pc, #48]	; (800712c <APP_morsecode_loop+0x538>)
- 80070fa:	6013      	str	r3, [r2, #0]
+ 8007112:	4b2d      	ldr	r3, [pc, #180]	; (80071c8 <APP_morsecode_loop+0x5e0>)
+ 8007114:	681b      	ldr	r3, [r3, #0]
+ 8007116:	885b      	ldrh	r3, [r3, #2]
+ 8007118:	3310      	adds	r3, #16
+ 800711a:	4a23      	ldr	r2, [pc, #140]	; (80071a8 <APP_morsecode_loop+0x5c0>)
+ 800711c:	6013      	str	r3, [r2, #0]
 
 	for(int a=0;a<morse_input_buff_num;a++)
- 80070fc:	2300      	movs	r3, #0
- 80070fe:	607b      	str	r3, [r7, #4]
- 8007100:	e04f      	b.n	80071a2 <APP_morsecode_loop+0x5ae>
- 8007102:	bf00      	nop
- 8007104:	20000218 	.word	0x20000218
- 8007108:	20002588 	.word	0x20002588
- 800710c:	20000222 	.word	0x20000222
- 8007110:	2000020c 	.word	0x2000020c
- 8007114:	20000009 	.word	0x20000009
- 8007118:	20000214 	.word	0x20000214
- 800711c:	2000021c 	.word	0x2000021c
- 8007120:	20000221 	.word	0x20000221
- 8007124:	20002584 	.word	0x20002584
- 8007128:	20002610 	.word	0x20002610
- 800712c:	2000260c 	.word	0x2000260c
- 8007130:	20000220 	.word	0x20000220
+ 800711e:	2300      	movs	r3, #0
+ 8007120:	607b      	str	r3, [r7, #4]
+ 8007122:	e036      	b.n	8007192 <APP_morsecode_loop+0x5aa>
 	{
 
 		if(morse_input_buff[a]=='\0')
- 8007134:	4a1f      	ldr	r2, [pc, #124]	; (80071b4 <APP_morsecode_loop+0x5c0>)
- 8007136:	687b      	ldr	r3, [r7, #4]
- 8007138:	4413      	add	r3, r2
- 800713a:	781b      	ldrb	r3, [r3, #0]
- 800713c:	2b00      	cmp	r3, #0
- 800713e:	d034      	beq.n	80071aa <APP_morsecode_loop+0x5b6>
+ 8007124:	4a21      	ldr	r2, [pc, #132]	; (80071ac <APP_morsecode_loop+0x5c4>)
+ 8007126:	687b      	ldr	r3, [r7, #4]
+ 8007128:	4413      	add	r3, r2
+ 800712a:	781b      	ldrb	r3, [r3, #0]
+ 800712c:	2b00      	cmp	r3, #0
+ 800712e:	d034      	beq.n	800719a <APP_morsecode_loop+0x5b2>
 		{
 			break;
 		}
 
 		if(morse_x>=(morsecode_window->x+morsecode_window->width))
- 8007140:	4b1d      	ldr	r3, [pc, #116]	; (80071b8 <APP_morsecode_loop+0x5c4>)
+ 8007130:	4b25      	ldr	r3, [pc, #148]	; (80071c8 <APP_morsecode_loop+0x5e0>)
+ 8007132:	681b      	ldr	r3, [r3, #0]
+ 8007134:	881b      	ldrh	r3, [r3, #0]
+ 8007136:	461a      	mov	r2, r3
+ 8007138:	4b23      	ldr	r3, [pc, #140]	; (80071c8 <APP_morsecode_loop+0x5e0>)
+ 800713a:	681b      	ldr	r3, [r3, #0]
+ 800713c:	889b      	ldrh	r3, [r3, #4]
+ 800713e:	441a      	add	r2, r3
+ 8007140:	4b18      	ldr	r3, [pc, #96]	; (80071a4 <APP_morsecode_loop+0x5bc>)
  8007142:	681b      	ldr	r3, [r3, #0]
- 8007144:	881b      	ldrh	r3, [r3, #0]
- 8007146:	461a      	mov	r2, r3
- 8007148:	4b1b      	ldr	r3, [pc, #108]	; (80071b8 <APP_morsecode_loop+0x5c4>)
- 800714a:	681b      	ldr	r3, [r3, #0]
- 800714c:	889b      	ldrh	r3, [r3, #4]
- 800714e:	441a      	add	r2, r3
- 8007150:	4b1a      	ldr	r3, [pc, #104]	; (80071bc <APP_morsecode_loop+0x5c8>)
- 8007152:	681b      	ldr	r3, [r3, #0]
- 8007154:	429a      	cmp	r2, r3
- 8007156:	dc0a      	bgt.n	800716e <APP_morsecode_loop+0x57a>
+ 8007144:	429a      	cmp	r2, r3
+ 8007146:	dc0a      	bgt.n	800715e <APP_morsecode_loop+0x576>
 		{
 			morse_x=morsecode_window->x;
- 8007158:	4b17      	ldr	r3, [pc, #92]	; (80071b8 <APP_morsecode_loop+0x5c4>)
- 800715a:	681b      	ldr	r3, [r3, #0]
- 800715c:	881b      	ldrh	r3, [r3, #0]
- 800715e:	461a      	mov	r2, r3
- 8007160:	4b16      	ldr	r3, [pc, #88]	; (80071bc <APP_morsecode_loop+0x5c8>)
- 8007162:	601a      	str	r2, [r3, #0]
+ 8007148:	4b1f      	ldr	r3, [pc, #124]	; (80071c8 <APP_morsecode_loop+0x5e0>)
+ 800714a:	681b      	ldr	r3, [r3, #0]
+ 800714c:	881b      	ldrh	r3, [r3, #0]
+ 800714e:	461a      	mov	r2, r3
+ 8007150:	4b14      	ldr	r3, [pc, #80]	; (80071a4 <APP_morsecode_loop+0x5bc>)
+ 8007152:	601a      	str	r2, [r3, #0]
 			morse_y+=16;
- 8007164:	4b16      	ldr	r3, [pc, #88]	; (80071c0 <APP_morsecode_loop+0x5cc>)
- 8007166:	681b      	ldr	r3, [r3, #0]
- 8007168:	3310      	adds	r3, #16
- 800716a:	4a15      	ldr	r2, [pc, #84]	; (80071c0 <APP_morsecode_loop+0x5cc>)
- 800716c:	6013      	str	r3, [r2, #0]
+ 8007154:	4b14      	ldr	r3, [pc, #80]	; (80071a8 <APP_morsecode_loop+0x5c0>)
+ 8007156:	681b      	ldr	r3, [r3, #0]
+ 8007158:	3310      	adds	r3, #16
+ 800715a:	4a13      	ldr	r2, [pc, #76]	; (80071a8 <APP_morsecode_loop+0x5c0>)
+ 800715c:	6013      	str	r3, [r2, #0]
 			//if(morse_y>=(morsecode_window->y+morsecode_window->high))
 			//{
 				//morse_y=morsecode_window->y+16;
 			//}
 		}
 		LCD_ShowChar(morse_x,morse_y,morse_input_buff[a],16,CYAN,RED);
- 800716e:	4b13      	ldr	r3, [pc, #76]	; (80071bc <APP_morsecode_loop+0x5c8>)
- 8007170:	6818      	ldr	r0, [r3, #0]
- 8007172:	4b13      	ldr	r3, [pc, #76]	; (80071c0 <APP_morsecode_loop+0x5cc>)
- 8007174:	6819      	ldr	r1, [r3, #0]
- 8007176:	4a0f      	ldr	r2, [pc, #60]	; (80071b4 <APP_morsecode_loop+0x5c0>)
- 8007178:	687b      	ldr	r3, [r7, #4]
- 800717a:	4413      	add	r3, r2
- 800717c:	781b      	ldrb	r3, [r3, #0]
- 800717e:	461a      	mov	r2, r3
- 8007180:	f44f 4378 	mov.w	r3, #63488	; 0xf800
- 8007184:	9301      	str	r3, [sp, #4]
- 8007186:	f647 73ff 	movw	r3, #32767	; 0x7fff
- 800718a:	9300      	str	r3, [sp, #0]
- 800718c:	2310      	movs	r3, #16
- 800718e:	f7fe fbd1 	bl	8005934 <LCD_ShowChar>
+ 800715e:	4b11      	ldr	r3, [pc, #68]	; (80071a4 <APP_morsecode_loop+0x5bc>)
+ 8007160:	6818      	ldr	r0, [r3, #0]
+ 8007162:	4b11      	ldr	r3, [pc, #68]	; (80071a8 <APP_morsecode_loop+0x5c0>)
+ 8007164:	6819      	ldr	r1, [r3, #0]
+ 8007166:	4a11      	ldr	r2, [pc, #68]	; (80071ac <APP_morsecode_loop+0x5c4>)
+ 8007168:	687b      	ldr	r3, [r7, #4]
+ 800716a:	4413      	add	r3, r2
+ 800716c:	781b      	ldrb	r3, [r3, #0]
+ 800716e:	461a      	mov	r2, r3
+ 8007170:	f44f 4378 	mov.w	r3, #63488	; 0xf800
+ 8007174:	9301      	str	r3, [sp, #4]
+ 8007176:	f647 73ff 	movw	r3, #32767	; 0x7fff
+ 800717a:	9300      	str	r3, [sp, #0]
+ 800717c:	2310      	movs	r3, #16
+ 800717e:	f7fe fbd9 	bl	8005934 <LCD_ShowChar>
 
 		morse_x+=8;
- 8007192:	4b0a      	ldr	r3, [pc, #40]	; (80071bc <APP_morsecode_loop+0x5c8>)
- 8007194:	681b      	ldr	r3, [r3, #0]
- 8007196:	3308      	adds	r3, #8
- 8007198:	4a08      	ldr	r2, [pc, #32]	; (80071bc <APP_morsecode_loop+0x5c8>)
- 800719a:	6013      	str	r3, [r2, #0]
+ 8007182:	4b08      	ldr	r3, [pc, #32]	; (80071a4 <APP_morsecode_loop+0x5bc>)
+ 8007184:	681b      	ldr	r3, [r3, #0]
+ 8007186:	3308      	adds	r3, #8
+ 8007188:	4a06      	ldr	r2, [pc, #24]	; (80071a4 <APP_morsecode_loop+0x5bc>)
+ 800718a:	6013      	str	r3, [r2, #0]
 	for(int a=0;a<morse_input_buff_num;a++)
- 800719c:	687b      	ldr	r3, [r7, #4]
- 800719e:	3301      	adds	r3, #1
- 80071a0:	607b      	str	r3, [r7, #4]
- 80071a2:	687b      	ldr	r3, [r7, #4]
- 80071a4:	2b7f      	cmp	r3, #127	; 0x7f
- 80071a6:	ddc5      	ble.n	8007134 <APP_morsecode_loop+0x540>
+ 800718c:	687b      	ldr	r3, [r7, #4]
+ 800718e:	3301      	adds	r3, #1
+ 8007190:	607b      	str	r3, [r7, #4]
+ 8007192:	687b      	ldr	r3, [r7, #4]
+ 8007194:	2b7f      	cmp	r3, #127	; 0x7f
+ 8007196:	ddc5      	ble.n	8007124 <APP_morsecode_loop+0x53c>
 	}
 
 }
- 80071a8:	e000      	b.n	80071ac <APP_morsecode_loop+0x5b8>
+ 8007198:	e000      	b.n	800719c <APP_morsecode_loop+0x5b4>
 			break;
- 80071aa:	bf00      	nop
+ 800719a:	bf00      	nop
 }
- 80071ac:	bf00      	nop
- 80071ae:	3720      	adds	r7, #32
- 80071b0:	46bd      	mov	sp, r7
- 80071b2:	bd80      	pop	{r7, pc}
- 80071b4:	20002588 	.word	0x20002588
- 80071b8:	20002584 	.word	0x20002584
- 80071bc:	20002610 	.word	0x20002610
- 80071c0:	2000260c 	.word	0x2000260c
+ 800719c:	bf00      	nop
+ 800719e:	3720      	adds	r7, #32
+ 80071a0:	46bd      	mov	sp, r7
+ 80071a2:	bd80      	pop	{r7, pc}
+ 80071a4:	200025a8 	.word	0x200025a8
+ 80071a8:	200025ac 	.word	0x200025ac
+ 80071ac:	2000251c 	.word	0x2000251c
+ 80071b0:	200025a0 	.word	0x200025a0
+ 80071b4:	200025b2 	.word	0x200025b2
+ 80071b8:	200025b1 	.word	0x200025b1
+ 80071bc:	200025b0 	.word	0x200025b0
+ 80071c0:	200025a4 	.word	0x200025a4
+ 80071c4:	20002514 	.word	0x20002514
+ 80071c8:	200025b4 	.word	0x200025b4
 
-080071c4 <main_app>:
+080071cc <main_app>:
 
 
 
 
 void main_app()
 {
- 80071c4:	b580      	push	{r7, lr}
- 80071c6:	b096      	sub	sp, #88	; 0x58
- 80071c8:	af04      	add	r7, sp, #16
+ 80071cc:	b580      	push	{r7, lr}
+ 80071ce:	b096      	sub	sp, #88	; 0x58
+ 80071d0:	af04      	add	r7, sp, #16
 
 	HAL_TIM_PWM_Start(&htim4,TIM_CHANNEL_3);//启动n通道的pwm
- 80071ca:	2108      	movs	r1, #8
- 80071cc:	482f      	ldr	r0, [pc, #188]	; (800728c <main_app+0xc8>)
- 80071ce:	f7fc fe71 	bl	8003eb4 <HAL_TIM_PWM_Start>
+ 80071d2:	2108      	movs	r1, #8
+ 80071d4:	482f      	ldr	r0, [pc, #188]	; (8007294 <main_app+0xc8>)
+ 80071d6:	f7fc fe6d 	bl	8003eb4 <HAL_TIM_PWM_Start>
 
 	char str[64];
 	LCDx_Init();
- 80071d2:	f7fe f887 	bl	80052e4 <LCDx_Init>
+ 80071da:	f7fe f883 	bl	80052e4 <LCDx_Init>
 	EPPROM_SLOWWRITE_INIT();
- 80071d6:	f7fe fd3b 	bl	8005c50 <EPPROM_SLOWWRITE_INIT>
+ 80071de:	f7fe fd37 	bl	8005c50 <EPPROM_SLOWWRITE_INIT>
 
 	if(KEY1==0&&KEY3==0)
- 80071da:	2110      	movs	r1, #16
- 80071dc:	482c      	ldr	r0, [pc, #176]	; (8007290 <main_app+0xcc>)
- 80071de:	f7fb f88d 	bl	80022fc <HAL_GPIO_ReadPin>
- 80071e2:	4603      	mov	r3, r0
- 80071e4:	2b00      	cmp	r3, #0
- 80071e6:	d10a      	bne.n	80071fe <main_app+0x3a>
- 80071e8:	2104      	movs	r1, #4
- 80071ea:	4829      	ldr	r0, [pc, #164]	; (8007290 <main_app+0xcc>)
- 80071ec:	f7fb f886 	bl	80022fc <HAL_GPIO_ReadPin>
- 80071f0:	4603      	mov	r3, r0
- 80071f2:	2b00      	cmp	r3, #0
- 80071f4:	d103      	bne.n	80071fe <main_app+0x3a>
+ 80071e2:	2110      	movs	r1, #16
+ 80071e4:	482c      	ldr	r0, [pc, #176]	; (8007298 <main_app+0xcc>)
+ 80071e6:	f7fb f889 	bl	80022fc <HAL_GPIO_ReadPin>
+ 80071ea:	4603      	mov	r3, r0
+ 80071ec:	2b00      	cmp	r3, #0
+ 80071ee:	d10a      	bne.n	8007206 <main_app+0x3a>
+ 80071f0:	2104      	movs	r1, #4
+ 80071f2:	4829      	ldr	r0, [pc, #164]	; (8007298 <main_app+0xcc>)
+ 80071f4:	f7fb f882 	bl	80022fc <HAL_GPIO_ReadPin>
+ 80071f8:	4603      	mov	r3, r0
+ 80071fa:	2b00      	cmp	r3, #0
+ 80071fc:	d103      	bne.n	8007206 <main_app+0x3a>
 	{
 		TP_adjustment(1);
- 80071f6:	2001      	movs	r0, #1
- 80071f8:	f7ff f8ec 	bl	80063d4 <TP_adjustment>
- 80071fc:	e002      	b.n	8007204 <main_app+0x40>
+ 80071fe:	2001      	movs	r0, #1
+ 8007200:	f7ff f8e0 	bl	80063c4 <TP_adjustment>
+ 8007204:	e002      	b.n	800720c <main_app+0x40>
 	}else
 	{
 		TP_adjustment(0);
- 80071fe:	2000      	movs	r0, #0
- 8007200:	f7ff f8e8 	bl	80063d4 <TP_adjustment>
+ 8007206:	2000      	movs	r0, #0
+ 8007208:	f7ff f8dc 	bl	80063c4 <TP_adjustment>
 	}
 
 
 
 	UI *ui=UI_Init(BLACK);
- 8007204:	2000      	movs	r0, #0
- 8007206:	f000 f877 	bl	80072f8 <UI_Init>
- 800720a:	6478      	str	r0, [r7, #68]	; 0x44
+ 800720c:	2000      	movs	r0, #0
+ 800720e:	f000 f877 	bl	8007300 <UI_Init>
+ 8007212:	6478      	str	r0, [r7, #68]	; 0x44
 
 	//APP_IDcard_init(New_Window(ui,25,30,150,100,GREEN,"IDcard"));
 	//New_Window(ui,80,80,60,90,YELLOW,"YELLOW");
 	//New_Window(ui,120,90,70,60,MAGENTA,"MAGENTA");
 
 	APP_morsecode_init(New_Window(ui,25,30,200,150,CYAN,"Morse code"));
- 800720c:	4b21      	ldr	r3, [pc, #132]	; (8007294 <main_app+0xd0>)
- 800720e:	9302      	str	r3, [sp, #8]
- 8007210:	f647 73ff 	movw	r3, #32767	; 0x7fff
- 8007214:	9301      	str	r3, [sp, #4]
- 8007216:	2396      	movs	r3, #150	; 0x96
- 8007218:	9300      	str	r3, [sp, #0]
- 800721a:	23c8      	movs	r3, #200	; 0xc8
- 800721c:	221e      	movs	r2, #30
- 800721e:	2119      	movs	r1, #25
- 8007220:	6c78      	ldr	r0, [r7, #68]	; 0x44
- 8007222:	f000 f89c 	bl	800735e <New_Window>
- 8007226:	4603      	mov	r3, r0
- 8007228:	4618      	mov	r0, r3
- 800722a:	f7ff fc8b 	bl	8006b44 <APP_morsecode_init>
+ 8007214:	4b21      	ldr	r3, [pc, #132]	; (800729c <main_app+0xd0>)
+ 8007216:	9302      	str	r3, [sp, #8]
+ 8007218:	f647 73ff 	movw	r3, #32767	; 0x7fff
+ 800721c:	9301      	str	r3, [sp, #4]
+ 800721e:	2396      	movs	r3, #150	; 0x96
+ 8007220:	9300      	str	r3, [sp, #0]
+ 8007222:	23c8      	movs	r3, #200	; 0xc8
+ 8007224:	221e      	movs	r2, #30
+ 8007226:	2119      	movs	r1, #25
+ 8007228:	6c78      	ldr	r0, [r7, #68]	; 0x44
+ 800722a:	f000 f89c 	bl	8007366 <New_Window>
+ 800722e:	4603      	mov	r3, r0
+ 8007230:	4618      	mov	r0, r3
+ 8007232:	f7ff fc81 	bl	8006b38 <APP_morsecode_init>
 
 	ui->refresh_ui_flag=1;
- 800722e:	6c7a      	ldr	r2, [r7, #68]	; 0x44
- 8007230:	f892 3020 	ldrb.w	r3, [r2, #32]
- 8007234:	f043 0304 	orr.w	r3, r3, #4
- 8007238:	f882 3020 	strb.w	r3, [r2, #32]
+ 8007236:	6c7a      	ldr	r2, [r7, #68]	; 0x44
+ 8007238:	f892 3020 	ldrb.w	r3, [r2, #32]
+ 800723c:	f043 0304 	orr.w	r3, r3, #4
+ 8007240:	f882 3020 	strb.w	r3, [r2, #32]
 */
 
 // 交叉编译测试
 		//APP_blood_loop();
 		//APP_IDcard_loop();
 		APP_morsecode_loop();
- 800723c:	f7ff fcda 	bl	8006bf4 <APP_morsecode_loop>
+ 8007244:	f7ff fcd0 	bl	8006be8 <APP_morsecode_loop>
 
 		GEI_BUTTON_CODE(&k1,KEY1);
- 8007240:	2110      	movs	r1, #16
- 8007242:	4813      	ldr	r0, [pc, #76]	; (8007290 <main_app+0xcc>)
- 8007244:	f7fb f85a 	bl	80022fc <HAL_GPIO_ReadPin>
- 8007248:	4603      	mov	r3, r0
- 800724a:	4619      	mov	r1, r3
- 800724c:	4812      	ldr	r0, [pc, #72]	; (8007298 <main_app+0xd4>)
- 800724e:	f7fe fdf3 	bl	8005e38 <GEI_BUTTON_CODE>
+ 8007248:	2110      	movs	r1, #16
+ 800724a:	4813      	ldr	r0, [pc, #76]	; (8007298 <main_app+0xcc>)
+ 800724c:	f7fb f856 	bl	80022fc <HAL_GPIO_ReadPin>
+ 8007250:	4603      	mov	r3, r0
+ 8007252:	4619      	mov	r1, r3
+ 8007254:	4812      	ldr	r0, [pc, #72]	; (80072a0 <main_app+0xd4>)
+ 8007256:	f7fe fdef 	bl	8005e38 <GEI_BUTTON_CODE>
 		GEI_BUTTON_CODE(&k2,KEY2);
- 8007252:	2108      	movs	r1, #8
- 8007254:	480e      	ldr	r0, [pc, #56]	; (8007290 <main_app+0xcc>)
- 8007256:	f7fb f851 	bl	80022fc <HAL_GPIO_ReadPin>
- 800725a:	4603      	mov	r3, r0
- 800725c:	4619      	mov	r1, r3
- 800725e:	480f      	ldr	r0, [pc, #60]	; (800729c <main_app+0xd8>)
- 8007260:	f7fe fdea 	bl	8005e38 <GEI_BUTTON_CODE>
+ 800725a:	2108      	movs	r1, #8
+ 800725c:	480e      	ldr	r0, [pc, #56]	; (8007298 <main_app+0xcc>)
+ 800725e:	f7fb f84d 	bl	80022fc <HAL_GPIO_ReadPin>
+ 8007262:	4603      	mov	r3, r0
+ 8007264:	4619      	mov	r1, r3
+ 8007266:	480f      	ldr	r0, [pc, #60]	; (80072a4 <main_app+0xd8>)
+ 8007268:	f7fe fde6 	bl	8005e38 <GEI_BUTTON_CODE>
 		GEI_BUTTON_CODE(&k3,KEY3);
- 8007264:	2104      	movs	r1, #4
- 8007266:	480a      	ldr	r0, [pc, #40]	; (8007290 <main_app+0xcc>)
- 8007268:	f7fb f848 	bl	80022fc <HAL_GPIO_ReadPin>
- 800726c:	4603      	mov	r3, r0
- 800726e:	4619      	mov	r1, r3
- 8007270:	480b      	ldr	r0, [pc, #44]	; (80072a0 <main_app+0xdc>)
- 8007272:	f7fe fde1 	bl	8005e38 <GEI_BUTTON_CODE>
+ 800726c:	2104      	movs	r1, #4
+ 800726e:	480a      	ldr	r0, [pc, #40]	; (8007298 <main_app+0xcc>)
+ 8007270:	f7fb f844 	bl	80022fc <HAL_GPIO_ReadPin>
+ 8007274:	4603      	mov	r3, r0
+ 8007276:	4619      	mov	r1, r3
+ 8007278:	480b      	ldr	r0, [pc, #44]	; (80072a8 <main_app+0xdc>)
+ 800727a:	f7fe fddd 	bl	8005e38 <GEI_BUTTON_CODE>
 		UI_Server(ui);
- 8007276:	6c78      	ldr	r0, [r7, #68]	; 0x44
- 8007278:	f000 fa18 	bl	80076ac <UI_Server>
+ 800727e:	6c78      	ldr	r0, [r7, #68]	; 0x44
+ 8007280:	f000 fa64 	bl	800774c <UI_Server>
 		TP_Server();
- 800727c:	f7fe ffd6 	bl	800622c <TP_Server>
+ 8007284:	f7fe ffca 	bl	800621c <TP_Server>
 		EEPROM_SLOWWRITE_SERVER();
- 8007280:	f7fe fd00 	bl	8005c84 <EEPROM_SLOWWRITE_SERVER>
+ 8007288:	f7fe fcfc 	bl	8005c84 <EEPROM_SLOWWRITE_SERVER>
 		buzzer_play_server();
- 8007284:	f7fe fcaa 	bl	8005bdc <buzzer_play_server>
+ 800728c:	f7fe fca6 	bl	8005bdc <buzzer_play_server>
 	{
- 8007288:	e7d8      	b.n	800723c <main_app+0x78>
- 800728a:	bf00      	nop
- 800728c:	2000022c 	.word	0x2000022c
- 8007290:	40011800 	.word	0x40011800
- 8007294:	0800a758 	.word	0x0800a758
- 8007298:	200003f8 	.word	0x200003f8
- 800729c:	200003d8 	.word	0x200003d8
- 80072a0:	200003e8 	.word	0x200003e8
+ 8007290:	e7d8      	b.n	8007244 <main_app+0x78>
+ 8007292:	bf00      	nop
+ 8007294:	2000029c 	.word	0x2000029c
+ 8007298:	40011800 	.word	0x40011800
+ 800729c:	0800a748 	.word	0x0800a748
+ 80072a0:	200003ac 	.word	0x200003ac
+ 80072a4:	200003bc 	.word	0x200003bc
+ 80072a8:	200003cc 	.word	0x200003cc
 
-080072a4 <Inteface_SetCursor>:
+080072ac <Inteface_SetCursor>:
 #include "touch.h"
 extern touch_device t0;
 //接口
 //设置屏幕像素坐标
 void Inteface_SetCursor(uint16_t Xpos, uint16_t Ypos)
 {
- 80072a4:	b580      	push	{r7, lr}
- 80072a6:	b082      	sub	sp, #8
- 80072a8:	af00      	add	r7, sp, #0
- 80072aa:	4603      	mov	r3, r0
- 80072ac:	460a      	mov	r2, r1
- 80072ae:	80fb      	strh	r3, [r7, #6]
- 80072b0:	4613      	mov	r3, r2
- 80072b2:	80bb      	strh	r3, [r7, #4]
+ 80072ac:	b580      	push	{r7, lr}
+ 80072ae:	b082      	sub	sp, #8
+ 80072b0:	af00      	add	r7, sp, #0
+ 80072b2:	4603      	mov	r3, r0
+ 80072b4:	460a      	mov	r2, r1
+ 80072b6:	80fb      	strh	r3, [r7, #6]
+ 80072b8:	4613      	mov	r3, r2
+ 80072ba:	80bb      	strh	r3, [r7, #4]
 	LCD_SetCursor(Xpos,Ypos);      				//设置光标位置
- 80072b4:	88ba      	ldrh	r2, [r7, #4]
- 80072b6:	88fb      	ldrh	r3, [r7, #6]
- 80072b8:	4611      	mov	r1, r2
- 80072ba:	4618      	mov	r0, r3
- 80072bc:	f7fe f908 	bl	80054d0 <LCD_SetCursor>
+ 80072bc:	88ba      	ldrh	r2, [r7, #4]
+ 80072be:	88fb      	ldrh	r3, [r7, #6]
+ 80072c0:	4611      	mov	r1, r2
+ 80072c2:	4618      	mov	r0, r3
+ 80072c4:	f7fe f904 	bl	80054d0 <LCD_SetCursor>
 	LCD_REG_ADDRESS=lcddev.wramcmd;     		//开始写入GRAM
- 80072c0:	4b04      	ldr	r3, [pc, #16]	; (80072d4 <Inteface_SetCursor+0x30>)
- 80072c2:	79da      	ldrb	r2, [r3, #7]
- 80072c4:	f04f 43d8 	mov.w	r3, #1811939328	; 0x6c000000
- 80072c8:	b292      	uxth	r2, r2
- 80072ca:	801a      	strh	r2, [r3, #0]
+ 80072c8:	4b04      	ldr	r3, [pc, #16]	; (80072dc <Inteface_SetCursor+0x30>)
+ 80072ca:	79da      	ldrb	r2, [r3, #7]
+ 80072cc:	f04f 43d8 	mov.w	r3, #1811939328	; 0x6c000000
+ 80072d0:	b292      	uxth	r2, r2
+ 80072d2:	801a      	strh	r2, [r3, #0]
 }
- 80072cc:	bf00      	nop
- 80072ce:	3708      	adds	r7, #8
- 80072d0:	46bd      	mov	sp, r7
- 80072d2:	bd80      	pop	{r7, pc}
- 80072d4:	200003b4 	.word	0x200003b4
+ 80072d4:	bf00      	nop
+ 80072d6:	3708      	adds	r7, #8
+ 80072d8:	46bd      	mov	sp, r7
+ 80072da:	bd80      	pop	{r7, pc}
+ 80072dc:	20000380 	.word	0x20000380
 
-080072d8 <Inteface_SetColor>:
+080072e0 <Inteface_SetColor>:
 //往像素坐标写入一个颜色
 void Inteface_SetColor(uint16_t color)
 {
- 80072d8:	b480      	push	{r7}
- 80072da:	b083      	sub	sp, #12
- 80072dc:	af00      	add	r7, sp, #0
- 80072de:	4603      	mov	r3, r0
- 80072e0:	80fb      	strh	r3, [r7, #6]
+ 80072e0:	b480      	push	{r7}
+ 80072e2:	b083      	sub	sp, #12
+ 80072e4:	af00      	add	r7, sp, #0
+ 80072e6:	4603      	mov	r3, r0
+ 80072e8:	80fb      	strh	r3, [r7, #6]
 	LCD_DATA_ADDRESS=color;
- 80072e2:	4a04      	ldr	r2, [pc, #16]	; (80072f4 <Inteface_SetColor+0x1c>)
- 80072e4:	88fb      	ldrh	r3, [r7, #6]
- 80072e6:	8013      	strh	r3, [r2, #0]
+ 80072ea:	4a04      	ldr	r2, [pc, #16]	; (80072fc <Inteface_SetColor+0x1c>)
+ 80072ec:	88fb      	ldrh	r3, [r7, #6]
+ 80072ee:	8013      	strh	r3, [r2, #0]
 }
- 80072e8:	bf00      	nop
- 80072ea:	370c      	adds	r7, #12
- 80072ec:	46bd      	mov	sp, r7
- 80072ee:	bc80      	pop	{r7}
- 80072f0:	4770      	bx	lr
- 80072f2:	bf00      	nop
- 80072f4:	6c000800 	.word	0x6c000800
+ 80072f0:	bf00      	nop
+ 80072f2:	370c      	adds	r7, #12
+ 80072f4:	46bd      	mov	sp, r7
+ 80072f6:	bc80      	pop	{r7}
+ 80072f8:	4770      	bx	lr
+ 80072fa:	bf00      	nop
+ 80072fc:	6c000800 	.word	0x6c000800
 
-080072f8 <UI_Init>:
+08007300 <UI_Init>:
 //新建一个UI对象
 //当时都想法是类似windows的多桌面，每个桌面都能有n个窗口
 UI *UI_Init(COLOR_16 background)
 {
- 80072f8:	b580      	push	{r7, lr}
- 80072fa:	b084      	sub	sp, #16
- 80072fc:	af00      	add	r7, sp, #0
- 80072fe:	6078      	str	r0, [r7, #4]
+ 8007300:	b580      	push	{r7, lr}
+ 8007302:	b084      	sub	sp, #16
+ 8007304:	af00      	add	r7, sp, #0
+ 8007306:	6078      	str	r0, [r7, #4]
 	UI *ui;
 	ui = (UI*)malloc(sizeof(UI));
- 8007300:	2024      	movs	r0, #36	; 0x24
- 8007302:	f000 faf7 	bl	80078f4 <malloc>
- 8007306:	4603      	mov	r3, r0
- 8007308:	60fb      	str	r3, [r7, #12]
+ 8007308:	2024      	movs	r0, #36	; 0x24
+ 800730a:	f000 fb1d 	bl	8007948 <malloc>
+ 800730e:	4603      	mov	r3, r0
+ 8007310:	60fb      	str	r3, [r7, #12]
 	if(ui!=NULL)
- 800730a:	68fb      	ldr	r3, [r7, #12]
- 800730c:	2b00      	cmp	r3, #0
- 800730e:	d021      	beq.n	8007354 <UI_Init+0x5c>
+ 8007312:	68fb      	ldr	r3, [r7, #12]
+ 8007314:	2b00      	cmp	r3, #0
+ 8007316:	d021      	beq.n	800735c <UI_Init+0x5c>
 	{
 		ui->x=0;
- 8007310:	68fb      	ldr	r3, [r7, #12]
- 8007312:	2200      	movs	r2, #0
- 8007314:	809a      	strh	r2, [r3, #4]
+ 8007318:	68fb      	ldr	r3, [r7, #12]
+ 800731a:	2200      	movs	r2, #0
+ 800731c:	809a      	strh	r2, [r3, #4]
 		ui->y=0;
- 8007316:	68fb      	ldr	r3, [r7, #12]
- 8007318:	2200      	movs	r2, #0
- 800731a:	80da      	strh	r2, [r3, #6]
+ 800731e:	68fb      	ldr	r3, [r7, #12]
+ 8007320:	2200      	movs	r2, #0
+ 8007322:	80da      	strh	r2, [r3, #6]
 		ui->high=240;
- 800731c:	68fb      	ldr	r3, [r7, #12]
- 800731e:	22f0      	movs	r2, #240	; 0xf0
- 8007320:	815a      	strh	r2, [r3, #10]
+ 8007324:	68fb      	ldr	r3, [r7, #12]
+ 8007326:	22f0      	movs	r2, #240	; 0xf0
+ 8007328:	815a      	strh	r2, [r3, #10]
 		ui->width=320;
- 8007322:	68fb      	ldr	r3, [r7, #12]
- 8007324:	f44f 72a0 	mov.w	r2, #320	; 0x140
- 8007328:	811a      	strh	r2, [r3, #8]
-		ui->background=background;
  800732a:	68fb      	ldr	r3, [r7, #12]
- 800732c:	687a      	ldr	r2, [r7, #4]
- 800732e:	601a      	str	r2, [r3, #0]
+ 800732c:	f44f 72a0 	mov.w	r2, #320	; 0x140
+ 8007330:	811a      	strh	r2, [r3, #8]
+		ui->background=background;
+ 8007332:	68fb      	ldr	r3, [r7, #12]
+ 8007334:	687a      	ldr	r2, [r7, #4]
+ 8007336:	601a      	str	r2, [r3, #0]
 		ui->windows=NULL;
- 8007330:	68fb      	ldr	r3, [r7, #12]
- 8007332:	2200      	movs	r2, #0
- 8007334:	60da      	str	r2, [r3, #12]
+ 8007338:	68fb      	ldr	r3, [r7, #12]
+ 800733a:	2200      	movs	r2, #0
+ 800733c:	60da      	str	r2, [r3, #12]
 		ui->last_windows=NULL;
- 8007336:	68fb      	ldr	r3, [r7, #12]
- 8007338:	2200      	movs	r2, #0
- 800733a:	611a      	str	r2, [r3, #16]
+ 800733e:	68fb      	ldr	r3, [r7, #12]
+ 8007340:	2200      	movs	r2, #0
+ 8007342:	611a      	str	r2, [r3, #16]
 		ui->refresh_ui_flag=1;
- 800733c:	68fa      	ldr	r2, [r7, #12]
- 800733e:	f892 3020 	ldrb.w	r3, [r2, #32]
- 8007342:	f043 0304 	orr.w	r3, r3, #4
- 8007346:	f882 3020 	strb.w	r3, [r2, #32]
+ 8007344:	68fa      	ldr	r2, [r7, #12]
+ 8007346:	f892 3020 	ldrb.w	r3, [r2, #32]
+ 800734a:	f043 0304 	orr.w	r3, r3, #4
+ 800734e:	f882 3020 	strb.w	r3, [r2, #32]
 		ui->moveed_windwos=NULL;
- 800734a:	68fb      	ldr	r3, [r7, #12]
- 800734c:	2200      	movs	r2, #0
- 800734e:	615a      	str	r2, [r3, #20]
+ 8007352:	68fb      	ldr	r3, [r7, #12]
+ 8007354:	2200      	movs	r2, #0
+ 8007356:	615a      	str	r2, [r3, #20]
 			ui->touch->acc_y=0;
 
 		}
 */
 
 		return ui;
- 8007350:	68fb      	ldr	r3, [r7, #12]
- 8007352:	e000      	b.n	8007356 <UI_Init+0x5e>
+ 8007358:	68fb      	ldr	r3, [r7, #12]
+ 800735a:	e000      	b.n	800735e <UI_Init+0x5e>
 	}
 	return NULL;
- 8007354:	2300      	movs	r3, #0
+ 800735c:	2300      	movs	r3, #0
 
 }
- 8007356:	4618      	mov	r0, r3
- 8007358:	3710      	adds	r7, #16
- 800735a:	46bd      	mov	sp, r7
- 800735c:	bd80      	pop	{r7, pc}
+ 800735e:	4618      	mov	r0, r3
+ 8007360:	3710      	adds	r7, #16
+ 8007362:	46bd      	mov	sp, r7
+ 8007364:	bd80      	pop	{r7, pc}
 
-0800735e <New_Window>:
+08007366 <New_Window>:
 //新建一个窗口
 //返回窗口的指针
 //将窗口挂载到某个ui
 window *New_Window(UI *ui,uint16_t x,uint16_t y,uint16_t width,uint16_t high,COLOR_16 background,const char *title)
 {
- 800735e:	b580      	push	{r7, lr}
- 8007360:	b088      	sub	sp, #32
- 8007362:	af00      	add	r7, sp, #0
- 8007364:	60f8      	str	r0, [r7, #12]
- 8007366:	4608      	mov	r0, r1
- 8007368:	4611      	mov	r1, r2
- 800736a:	461a      	mov	r2, r3
- 800736c:	4603      	mov	r3, r0
- 800736e:	817b      	strh	r3, [r7, #10]
- 8007370:	460b      	mov	r3, r1
- 8007372:	813b      	strh	r3, [r7, #8]
- 8007374:	4613      	mov	r3, r2
- 8007376:	80fb      	strh	r3, [r7, #6]
+ 8007366:	b580      	push	{r7, lr}
+ 8007368:	b088      	sub	sp, #32
+ 800736a:	af00      	add	r7, sp, #0
+ 800736c:	60f8      	str	r0, [r7, #12]
+ 800736e:	4608      	mov	r0, r1
+ 8007370:	4611      	mov	r1, r2
+ 8007372:	461a      	mov	r2, r3
+ 8007374:	4603      	mov	r3, r0
+ 8007376:	817b      	strh	r3, [r7, #10]
+ 8007378:	460b      	mov	r3, r1
+ 800737a:	813b      	strh	r3, [r7, #8]
+ 800737c:	4613      	mov	r3, r2
+ 800737e:	80fb      	strh	r3, [r7, #6]
 	window *temp_window;
 	temp_window = (window*)malloc(sizeof(window));
- 8007378:	201c      	movs	r0, #28
- 800737a:	f000 fabb 	bl	80078f4 <malloc>
- 800737e:	4603      	mov	r3, r0
- 8007380:	617b      	str	r3, [r7, #20]
+ 8007380:	201c      	movs	r0, #28
+ 8007382:	f000 fae1 	bl	8007948 <malloc>
+ 8007386:	4603      	mov	r3, r0
+ 8007388:	617b      	str	r3, [r7, #20]
 	if(temp_window!=NULL)
- 8007382:	697b      	ldr	r3, [r7, #20]
- 8007384:	2b00      	cmp	r3, #0
- 8007386:	d022      	beq.n	80073ce <New_Window+0x70>
+ 800738a:	697b      	ldr	r3, [r7, #20]
+ 800738c:	2b00      	cmp	r3, #0
+ 800738e:	d022      	beq.n	80073d6 <New_Window+0x70>
 	{
 		temp_window->background=background;
- 8007388:	697b      	ldr	r3, [r7, #20]
- 800738a:	6afa      	ldr	r2, [r7, #44]	; 0x2c
- 800738c:	609a      	str	r2, [r3, #8]
+ 8007390:	697b      	ldr	r3, [r7, #20]
+ 8007392:	6afa      	ldr	r2, [r7, #44]	; 0x2c
+ 8007394:	609a      	str	r2, [r3, #8]
 		temp_window->high=high;
- 800738e:	697b      	ldr	r3, [r7, #20]
- 8007390:	8d3a      	ldrh	r2, [r7, #40]	; 0x28
- 8007392:	80da      	strh	r2, [r3, #6]
+ 8007396:	697b      	ldr	r3, [r7, #20]
+ 8007398:	8d3a      	ldrh	r2, [r7, #40]	; 0x28
+ 800739a:	80da      	strh	r2, [r3, #6]
 		temp_window->width=width;
- 8007394:	697b      	ldr	r3, [r7, #20]
- 8007396:	88fa      	ldrh	r2, [r7, #6]
- 8007398:	809a      	strh	r2, [r3, #4]
+ 800739c:	697b      	ldr	r3, [r7, #20]
+ 800739e:	88fa      	ldrh	r2, [r7, #6]
+ 80073a0:	809a      	strh	r2, [r3, #4]
 		temp_window->x=x;
- 800739a:	697b      	ldr	r3, [r7, #20]
- 800739c:	897a      	ldrh	r2, [r7, #10]
- 800739e:	801a      	strh	r2, [r3, #0]
+ 80073a2:	697b      	ldr	r3, [r7, #20]
+ 80073a4:	897a      	ldrh	r2, [r7, #10]
+ 80073a6:	801a      	strh	r2, [r3, #0]
 		temp_window->y=y;
- 80073a0:	697b      	ldr	r3, [r7, #20]
- 80073a2:	893a      	ldrh	r2, [r7, #8]
- 80073a4:	805a      	strh	r2, [r3, #2]
+ 80073a8:	697b      	ldr	r3, [r7, #20]
+ 80073aa:	893a      	ldrh	r2, [r7, #8]
+ 80073ac:	805a      	strh	r2, [r3, #2]
 		for(int a=0;a<16;a++)
- 80073a6:	2300      	movs	r3, #0
- 80073a8:	61fb      	str	r3, [r7, #28]
- 80073aa:	e00c      	b.n	80073c6 <New_Window+0x68>
+ 80073ae:	2300      	movs	r3, #0
+ 80073b0:	61fb      	str	r3, [r7, #28]
+ 80073b2:	e00c      	b.n	80073ce <New_Window+0x68>
 		{
 			temp_window->title[a]=title[a];
- 80073ac:	69fb      	ldr	r3, [r7, #28]
- 80073ae:	6b3a      	ldr	r2, [r7, #48]	; 0x30
- 80073b0:	4413      	add	r3, r2
- 80073b2:	7819      	ldrb	r1, [r3, #0]
- 80073b4:	697a      	ldr	r2, [r7, #20]
- 80073b6:	69fb      	ldr	r3, [r7, #28]
+ 80073b4:	69fb      	ldr	r3, [r7, #28]
+ 80073b6:	6b3a      	ldr	r2, [r7, #48]	; 0x30
  80073b8:	4413      	add	r3, r2
- 80073ba:	330c      	adds	r3, #12
- 80073bc:	460a      	mov	r2, r1
- 80073be:	701a      	strb	r2, [r3, #0]
+ 80073ba:	7819      	ldrb	r1, [r3, #0]
+ 80073bc:	697a      	ldr	r2, [r7, #20]
+ 80073be:	69fb      	ldr	r3, [r7, #28]
+ 80073c0:	4413      	add	r3, r2
+ 80073c2:	330c      	adds	r3, #12
+ 80073c4:	460a      	mov	r2, r1
+ 80073c6:	701a      	strb	r2, [r3, #0]
 		for(int a=0;a<16;a++)
- 80073c0:	69fb      	ldr	r3, [r7, #28]
- 80073c2:	3301      	adds	r3, #1
- 80073c4:	61fb      	str	r3, [r7, #28]
- 80073c6:	69fb      	ldr	r3, [r7, #28]
- 80073c8:	2b0f      	cmp	r3, #15
- 80073ca:	ddef      	ble.n	80073ac <New_Window+0x4e>
- 80073cc:	e001      	b.n	80073d2 <New_Window+0x74>
+ 80073c8:	69fb      	ldr	r3, [r7, #28]
+ 80073ca:	3301      	adds	r3, #1
+ 80073cc:	61fb      	str	r3, [r7, #28]
+ 80073ce:	69fb      	ldr	r3, [r7, #28]
+ 80073d0:	2b0f      	cmp	r3, #15
+ 80073d2:	ddef      	ble.n	80073b4 <New_Window+0x4e>
+ 80073d4:	e001      	b.n	80073da <New_Window+0x74>
 		}
 	}else{return NULL;}
- 80073ce:	2300      	movs	r3, #0
- 80073d0:	e02a      	b.n	8007428 <New_Window+0xca>
+ 80073d6:	2300      	movs	r3, #0
+ 80073d8:	e02a      	b.n	8007430 <New_Window+0xca>
 
 	windows_stack *temp_windows_stack;
 	temp_windows_stack=ui->last_windows;
- 80073d2:	68fb      	ldr	r3, [r7, #12]
- 80073d4:	691b      	ldr	r3, [r3, #16]
- 80073d6:	61bb      	str	r3, [r7, #24]
+ 80073da:	68fb      	ldr	r3, [r7, #12]
+ 80073dc:	691b      	ldr	r3, [r3, #16]
+ 80073de:	61bb      	str	r3, [r7, #24]
 	if(temp_windows_stack==NULL)
- 80073d8:	69bb      	ldr	r3, [r7, #24]
- 80073da:	2b00      	cmp	r3, #0
- 80073dc:	d10b      	bne.n	80073f6 <New_Window+0x98>
+ 80073e0:	69bb      	ldr	r3, [r7, #24]
+ 80073e2:	2b00      	cmp	r3, #0
+ 80073e4:	d10b      	bne.n	80073fe <New_Window+0x98>
 	{
 		temp_windows_stack=(windows_stack*)malloc(sizeof(windows_stack));
- 80073de:	200c      	movs	r0, #12
- 80073e0:	f000 fa88 	bl	80078f4 <malloc>
- 80073e4:	4603      	mov	r3, r0
- 80073e6:	61bb      	str	r3, [r7, #24]
+ 80073e6:	200c      	movs	r0, #12
+ 80073e8:	f000 faae 	bl	8007948 <malloc>
+ 80073ec:	4603      	mov	r3, r0
+ 80073ee:	61bb      	str	r3, [r7, #24]
 		temp_windows_stack->up=NULL;
- 80073e8:	69bb      	ldr	r3, [r7, #24]
- 80073ea:	2200      	movs	r2, #0
- 80073ec:	601a      	str	r2, [r3, #0]
+ 80073f0:	69bb      	ldr	r3, [r7, #24]
+ 80073f2:	2200      	movs	r2, #0
+ 80073f4:	601a      	str	r2, [r3, #0]
 		ui->windows=temp_windows_stack;
- 80073ee:	68fb      	ldr	r3, [r7, #12]
- 80073f0:	69ba      	ldr	r2, [r7, #24]
- 80073f2:	60da      	str	r2, [r3, #12]
- 80073f4:	e00e      	b.n	8007414 <New_Window+0xb6>
+ 80073f6:	68fb      	ldr	r3, [r7, #12]
+ 80073f8:	69ba      	ldr	r2, [r7, #24]
+ 80073fa:	60da      	str	r2, [r3, #12]
+ 80073fc:	e00e      	b.n	800741c <New_Window+0xb6>
 		while(temp_windows_stack->next!=NULL)
 		{
 			temp_windows_stack=temp_windows_stack->next;
 		}
 */
 		windows_stack *up=temp_windows_stack;//备份当前对象指针
- 80073f6:	69bb      	ldr	r3, [r7, #24]
- 80073f8:	613b      	str	r3, [r7, #16]
+ 80073fe:	69bb      	ldr	r3, [r7, #24]
+ 8007400:	613b      	str	r3, [r7, #16]
 		temp_windows_stack->next=(windows_stack*)malloc(sizeof(windows_stack));
- 80073fa:	200c      	movs	r0, #12
- 80073fc:	f000 fa7a 	bl	80078f4 <malloc>
- 8007400:	4603      	mov	r3, r0
- 8007402:	461a      	mov	r2, r3
- 8007404:	69bb      	ldr	r3, [r7, #24]
- 8007406:	609a      	str	r2, [r3, #8]
+ 8007402:	200c      	movs	r0, #12
+ 8007404:	f000 faa0 	bl	8007948 <malloc>
+ 8007408:	4603      	mov	r3, r0
+ 800740a:	461a      	mov	r2, r3
+ 800740c:	69bb      	ldr	r3, [r7, #24]
+ 800740e:	609a      	str	r2, [r3, #8]
 		temp_windows_stack=temp_windows_stack->next;
- 8007408:	69bb      	ldr	r3, [r7, #24]
- 800740a:	689b      	ldr	r3, [r3, #8]
- 800740c:	61bb      	str	r3, [r7, #24]
+ 8007410:	69bb      	ldr	r3, [r7, #24]
+ 8007412:	689b      	ldr	r3, [r3, #8]
+ 8007414:	61bb      	str	r3, [r7, #24]
 		temp_windows_stack->up=up;
- 800740e:	69bb      	ldr	r3, [r7, #24]
- 8007410:	693a      	ldr	r2, [r7, #16]
- 8007412:	601a      	str	r2, [r3, #0]
+ 8007416:	69bb      	ldr	r3, [r7, #24]
+ 8007418:	693a      	ldr	r2, [r7, #16]
+ 800741a:	601a      	str	r2, [r3, #0]
 	}
 	temp_windows_stack->next=NULL;
- 8007414:	69bb      	ldr	r3, [r7, #24]
- 8007416:	2200      	movs	r2, #0
- 8007418:	609a      	str	r2, [r3, #8]
+ 800741c:	69bb      	ldr	r3, [r7, #24]
+ 800741e:	2200      	movs	r2, #0
+ 8007420:	609a      	str	r2, [r3, #8]
 	temp_windows_stack->window=temp_window;
- 800741a:	69bb      	ldr	r3, [r7, #24]
- 800741c:	697a      	ldr	r2, [r7, #20]
- 800741e:	605a      	str	r2, [r3, #4]
+ 8007422:	69bb      	ldr	r3, [r7, #24]
+ 8007424:	697a      	ldr	r2, [r7, #20]
+ 8007426:	605a      	str	r2, [r3, #4]
 
 	ui->last_windows=temp_windows_stack;
- 8007420:	68fb      	ldr	r3, [r7, #12]
- 8007422:	69ba      	ldr	r2, [r7, #24]
- 8007424:	611a      	str	r2, [r3, #16]
+ 8007428:	68fb      	ldr	r3, [r7, #12]
+ 800742a:	69ba      	ldr	r2, [r7, #24]
+ 800742c:	611a      	str	r2, [r3, #16]
 
 	return temp_window;
- 8007426:	697b      	ldr	r3, [r7, #20]
+ 800742e:	697b      	ldr	r3, [r7, #20]
 
 }
- 8007428:	4618      	mov	r0, r3
- 800742a:	3720      	adds	r7, #32
- 800742c:	46bd      	mov	sp, r7
- 800742e:	bd80      	pop	{r7, pc}
+ 8007430:	4618      	mov	r0, r3
+ 8007432:	3720      	adds	r7, #32
+ 8007434:	46bd      	mov	sp, r7
+ 8007436:	bd80      	pop	{r7, pc}
 
-08007430 <Refresh_Window>:
+08007438 <Close_Windows_Stack>:
+//关闭某个窗口
+//挺麻烦的，除了要释放窗口内存，还要去ui抹掉窗口的指针
+void Close_Windows_Stack(UI *ui,windows_stack *temp_windows_stack)
+{
+ 8007438:	b580      	push	{r7, lr}
+ 800743a:	b082      	sub	sp, #8
+ 800743c:	af00      	add	r7, sp, #0
+ 800743e:	6078      	str	r0, [r7, #4]
+ 8007440:	6039      	str	r1, [r7, #0]
+
+	if(temp_windows_stack==ui->windows)
+ 8007442:	687b      	ldr	r3, [r7, #4]
+ 8007444:	68db      	ldr	r3, [r3, #12]
+ 8007446:	683a      	ldr	r2, [r7, #0]
+ 8007448:	429a      	cmp	r2, r3
+ 800744a:	d113      	bne.n	8007474 <Close_Windows_Stack+0x3c>
+	{
+		if(temp_windows_stack->next!=NULL)
+ 800744c:	683b      	ldr	r3, [r7, #0]
+ 800744e:	689b      	ldr	r3, [r3, #8]
+ 8007450:	2b00      	cmp	r3, #0
+ 8007452:	d008      	beq.n	8007466 <Close_Windows_Stack+0x2e>
+		{
+			ui->windows=temp_windows_stack->next;
+ 8007454:	683b      	ldr	r3, [r7, #0]
+ 8007456:	689a      	ldr	r2, [r3, #8]
+ 8007458:	687b      	ldr	r3, [r7, #4]
+ 800745a:	60da      	str	r2, [r3, #12]
+			ui->windows->up=NULL;
+ 800745c:	687b      	ldr	r3, [r7, #4]
+ 800745e:	68db      	ldr	r3, [r3, #12]
+ 8007460:	2200      	movs	r2, #0
+ 8007462:	601a      	str	r2, [r3, #0]
+ 8007464:	e029      	b.n	80074ba <Close_Windows_Stack+0x82>
+		}else
+		{
+			ui->windows=NULL;
+ 8007466:	687b      	ldr	r3, [r7, #4]
+ 8007468:	2200      	movs	r2, #0
+ 800746a:	60da      	str	r2, [r3, #12]
+			ui->last_windows=NULL;
+ 800746c:	687b      	ldr	r3, [r7, #4]
+ 800746e:	2200      	movs	r2, #0
+ 8007470:	611a      	str	r2, [r3, #16]
+ 8007472:	e022      	b.n	80074ba <Close_Windows_Stack+0x82>
+		}
+
+	}else if(temp_windows_stack==ui->last_windows)
+ 8007474:	687b      	ldr	r3, [r7, #4]
+ 8007476:	691b      	ldr	r3, [r3, #16]
+ 8007478:	683a      	ldr	r2, [r7, #0]
+ 800747a:	429a      	cmp	r2, r3
+ 800747c:	d113      	bne.n	80074a6 <Close_Windows_Stack+0x6e>
+	{
+		if(temp_windows_stack->up!=NULL)
+ 800747e:	683b      	ldr	r3, [r7, #0]
+ 8007480:	681b      	ldr	r3, [r3, #0]
+ 8007482:	2b00      	cmp	r3, #0
+ 8007484:	d008      	beq.n	8007498 <Close_Windows_Stack+0x60>
+		{
+			ui->last_windows=temp_windows_stack->up;
+ 8007486:	683b      	ldr	r3, [r7, #0]
+ 8007488:	681a      	ldr	r2, [r3, #0]
+ 800748a:	687b      	ldr	r3, [r7, #4]
+ 800748c:	611a      	str	r2, [r3, #16]
+			ui->last_windows->next=NULL;
+ 800748e:	687b      	ldr	r3, [r7, #4]
+ 8007490:	691b      	ldr	r3, [r3, #16]
+ 8007492:	2200      	movs	r2, #0
+ 8007494:	609a      	str	r2, [r3, #8]
+ 8007496:	e010      	b.n	80074ba <Close_Windows_Stack+0x82>
+		}else
+		{
+			ui->windows=NULL;
+ 8007498:	687b      	ldr	r3, [r7, #4]
+ 800749a:	2200      	movs	r2, #0
+ 800749c:	60da      	str	r2, [r3, #12]
+			ui->last_windows=NULL;
+ 800749e:	687b      	ldr	r3, [r7, #4]
+ 80074a0:	2200      	movs	r2, #0
+ 80074a2:	611a      	str	r2, [r3, #16]
+ 80074a4:	e009      	b.n	80074ba <Close_Windows_Stack+0x82>
+		}
+	}else
+	{
+		temp_windows_stack->up->next=temp_windows_stack->next;  //取出这个节点 把节点的上下补上链接
+ 80074a6:	683b      	ldr	r3, [r7, #0]
+ 80074a8:	681b      	ldr	r3, [r3, #0]
+ 80074aa:	683a      	ldr	r2, [r7, #0]
+ 80074ac:	6892      	ldr	r2, [r2, #8]
+ 80074ae:	609a      	str	r2, [r3, #8]
+		temp_windows_stack->next->up=temp_windows_stack->up;
+ 80074b0:	683b      	ldr	r3, [r7, #0]
+ 80074b2:	689b      	ldr	r3, [r3, #8]
+ 80074b4:	683a      	ldr	r2, [r7, #0]
+ 80074b6:	6812      	ldr	r2, [r2, #0]
+ 80074b8:	601a      	str	r2, [r3, #0]
+	}
+
+	free(temp_windows_stack->window);
+ 80074ba:	683b      	ldr	r3, [r7, #0]
+ 80074bc:	685b      	ldr	r3, [r3, #4]
+ 80074be:	4618      	mov	r0, r3
+ 80074c0:	f000 fa4a 	bl	8007958 <free>
+	free(temp_windows_stack);
+ 80074c4:	6838      	ldr	r0, [r7, #0]
+ 80074c6:	f000 fa47 	bl	8007958 <free>
+
+
+
+}
+ 80074ca:	bf00      	nop
+ 80074cc:	3708      	adds	r7, #8
+ 80074ce:	46bd      	mov	sp, r7
+ 80074d0:	bd80      	pop	{r7, pc}
+
+080074d2 <Refresh_Window>:
 	temp_window->y=temp_window->y+acc_y;
 }
 
 //显示一个窗口
 void Refresh_Window(UI *ui,window *temp_window)
 {
- 8007430:	b580      	push	{r7, lr}
- 8007432:	b088      	sub	sp, #32
- 8007434:	af02      	add	r7, sp, #8
- 8007436:	6078      	str	r0, [r7, #4]
- 8007438:	6039      	str	r1, [r7, #0]
+ 80074d2:	b580      	push	{r7, lr}
+ 80074d4:	b088      	sub	sp, #32
+ 80074d6:	af02      	add	r7, sp, #8
+ 80074d8:	6078      	str	r0, [r7, #4]
+ 80074da:	6039      	str	r1, [r7, #0]
 	//开始绘制窗口//填充窗口背景
 	int x,y;
 	char z;
 	for(uint16_t temp_y=0;temp_y<temp_window->high;temp_y++)
- 800743a:	2300      	movs	r3, #0
- 800743c:	82bb      	strh	r3, [r7, #20]
- 800743e:	e063      	b.n	8007508 <Refresh_Window+0xd8>
+ 80074dc:	2300      	movs	r3, #0
+ 80074de:	82bb      	strh	r3, [r7, #20]
+ 80074e0:	e063      	b.n	80075aa <Refresh_Window+0xd8>
 	{
 		z=1;
- 8007440:	2301      	movs	r3, #1
- 8007442:	75fb      	strb	r3, [r7, #23]
+ 80074e2:	2301      	movs	r3, #1
+ 80074e4:	75fb      	strb	r3, [r7, #23]
 		for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
- 8007444:	2300      	movs	r3, #0
- 8007446:	827b      	strh	r3, [r7, #18]
- 8007448:	e056      	b.n	80074f8 <Refresh_Window+0xc8>
+ 80074e6:	2300      	movs	r3, #0
+ 80074e8:	827b      	strh	r3, [r7, #18]
+ 80074ea:	e056      	b.n	800759a <Refresh_Window+0xc8>
 		{
 			x=temp_window->x+temp_i;
- 800744a:	683b      	ldr	r3, [r7, #0]
- 800744c:	881b      	ldrh	r3, [r3, #0]
- 800744e:	461a      	mov	r2, r3
- 8007450:	8a7b      	ldrh	r3, [r7, #18]
- 8007452:	4413      	add	r3, r2
- 8007454:	60fb      	str	r3, [r7, #12]
+ 80074ec:	683b      	ldr	r3, [r7, #0]
+ 80074ee:	881b      	ldrh	r3, [r3, #0]
+ 80074f0:	461a      	mov	r2, r3
+ 80074f2:	8a7b      	ldrh	r3, [r7, #18]
+ 80074f4:	4413      	add	r3, r2
+ 80074f6:	60fb      	str	r3, [r7, #12]
 			y=temp_window->y+temp_y;
- 8007456:	683b      	ldr	r3, [r7, #0]
- 8007458:	885b      	ldrh	r3, [r3, #2]
- 800745a:	461a      	mov	r2, r3
- 800745c:	8abb      	ldrh	r3, [r7, #20]
- 800745e:	4413      	add	r3, r2
- 8007460:	60bb      	str	r3, [r7, #8]
+ 80074f8:	683b      	ldr	r3, [r7, #0]
+ 80074fa:	885b      	ldrh	r3, [r3, #2]
+ 80074fc:	461a      	mov	r2, r3
+ 80074fe:	8abb      	ldrh	r3, [r7, #20]
+ 8007500:	4413      	add	r3, r2
+ 8007502:	60bb      	str	r3, [r7, #8]
 			if(y>=ui->y&&z==1)
- 8007462:	687b      	ldr	r3, [r7, #4]
- 8007464:	88db      	ldrh	r3, [r3, #6]
- 8007466:	461a      	mov	r2, r3
- 8007468:	68bb      	ldr	r3, [r7, #8]
- 800746a:	4293      	cmp	r3, r2
- 800746c:	db0c      	blt.n	8007488 <Refresh_Window+0x58>
- 800746e:	7dfb      	ldrb	r3, [r7, #23]
- 8007470:	2b01      	cmp	r3, #1
- 8007472:	d109      	bne.n	8007488 <Refresh_Window+0x58>
+ 8007504:	687b      	ldr	r3, [r7, #4]
+ 8007506:	88db      	ldrh	r3, [r3, #6]
+ 8007508:	461a      	mov	r2, r3
+ 800750a:	68bb      	ldr	r3, [r7, #8]
+ 800750c:	4293      	cmp	r3, r2
+ 800750e:	db0c      	blt.n	800752a <Refresh_Window+0x58>
+ 8007510:	7dfb      	ldrb	r3, [r7, #23]
+ 8007512:	2b01      	cmp	r3, #1
+ 8007514:	d109      	bne.n	800752a <Refresh_Window+0x58>
 			{
 				Inteface_SetCursor(x,y);
- 8007474:	68fb      	ldr	r3, [r7, #12]
- 8007476:	b29b      	uxth	r3, r3
- 8007478:	68ba      	ldr	r2, [r7, #8]
- 800747a:	b292      	uxth	r2, r2
- 800747c:	4611      	mov	r1, r2
- 800747e:	4618      	mov	r0, r3
- 8007480:	f7ff ff10 	bl	80072a4 <Inteface_SetCursor>
+ 8007516:	68fb      	ldr	r3, [r7, #12]
+ 8007518:	b29b      	uxth	r3, r3
+ 800751a:	68ba      	ldr	r2, [r7, #8]
+ 800751c:	b292      	uxth	r2, r2
+ 800751e:	4611      	mov	r1, r2
+ 8007520:	4618      	mov	r0, r3
+ 8007522:	f7ff fec3 	bl	80072ac <Inteface_SetCursor>
 				z=0;
- 8007484:	2300      	movs	r3, #0
- 8007486:	75fb      	strb	r3, [r7, #23]
+ 8007526:	2300      	movs	r3, #0
+ 8007528:	75fb      	strb	r3, [r7, #23]
 			}
 			if(x>=ui->x)
- 8007488:	687b      	ldr	r3, [r7, #4]
- 800748a:	889b      	ldrh	r3, [r3, #4]
- 800748c:	461a      	mov	r2, r3
- 800748e:	68fb      	ldr	r3, [r7, #12]
- 8007490:	4293      	cmp	r3, r2
- 8007492:	db2e      	blt.n	80074f2 <Refresh_Window+0xc2>
+ 800752a:	687b      	ldr	r3, [r7, #4]
+ 800752c:	889b      	ldrh	r3, [r3, #4]
+ 800752e:	461a      	mov	r2, r3
+ 8007530:	68fb      	ldr	r3, [r7, #12]
+ 8007532:	4293      	cmp	r3, r2
+ 8007534:	db2e      	blt.n	8007594 <Refresh_Window+0xc2>
 			{
 				if(temp_y<16)
- 8007494:	8abb      	ldrh	r3, [r7, #20]
- 8007496:	2b0f      	cmp	r3, #15
- 8007498:	d80f      	bhi.n	80074ba <Refresh_Window+0x8a>
+ 8007536:	8abb      	ldrh	r3, [r7, #20]
+ 8007538:	2b0f      	cmp	r3, #15
+ 800753a:	d80f      	bhi.n	800755c <Refresh_Window+0x8a>
 				{
 					if(temp_i>temp_window->width-16)
- 800749a:	683b      	ldr	r3, [r7, #0]
- 800749c:	889b      	ldrh	r3, [r3, #4]
- 800749e:	f1a3 020f 	sub.w	r2, r3, #15
- 80074a2:	8a7b      	ldrh	r3, [r7, #18]
- 80074a4:	429a      	cmp	r2, r3
- 80074a6:	dc04      	bgt.n	80074b2 <Refresh_Window+0x82>
+ 800753c:	683b      	ldr	r3, [r7, #0]
+ 800753e:	889b      	ldrh	r3, [r3, #4]
+ 8007540:	f1a3 020f 	sub.w	r2, r3, #15
+ 8007544:	8a7b      	ldrh	r3, [r7, #18]
+ 8007546:	429a      	cmp	r2, r3
+ 8007548:	dc04      	bgt.n	8007554 <Refresh_Window+0x82>
 					{
 						Inteface_SetColor(RED);
- 80074a8:	f44f 4078 	mov.w	r0, #63488	; 0xf800
- 80074ac:	f7ff ff14 	bl	80072d8 <Inteface_SetColor>
- 80074b0:	e01f      	b.n	80074f2 <Refresh_Window+0xc2>
+ 800754a:	f44f 4078 	mov.w	r0, #63488	; 0xf800
+ 800754e:	f7ff fec7 	bl	80072e0 <Inteface_SetColor>
+ 8007552:	e01f      	b.n	8007594 <Refresh_Window+0xc2>
 					}else
 					{
 						Inteface_SetColor(BLUE);
- 80074b2:	201f      	movs	r0, #31
- 80074b4:	f7ff ff10 	bl	80072d8 <Inteface_SetColor>
- 80074b8:	e01b      	b.n	80074f2 <Refresh_Window+0xc2>
+ 8007554:	201f      	movs	r0, #31
+ 8007556:	f7ff fec3 	bl	80072e0 <Inteface_SetColor>
+ 800755a:	e01b      	b.n	8007594 <Refresh_Window+0xc2>
 					}
 				}else
 				{
 					if(temp_i==0||temp_y==0||temp_i==temp_window->width-1||temp_y==temp_window->high-1)
- 80074ba:	8a7b      	ldrh	r3, [r7, #18]
- 80074bc:	2b00      	cmp	r3, #0
- 80074be:	d00e      	beq.n	80074de <Refresh_Window+0xae>
- 80074c0:	8abb      	ldrh	r3, [r7, #20]
- 80074c2:	2b00      	cmp	r3, #0
- 80074c4:	d00b      	beq.n	80074de <Refresh_Window+0xae>
- 80074c6:	8a7a      	ldrh	r2, [r7, #18]
- 80074c8:	683b      	ldr	r3, [r7, #0]
- 80074ca:	889b      	ldrh	r3, [r3, #4]
- 80074cc:	3b01      	subs	r3, #1
- 80074ce:	429a      	cmp	r2, r3
- 80074d0:	d005      	beq.n	80074de <Refresh_Window+0xae>
- 80074d2:	8aba      	ldrh	r2, [r7, #20]
- 80074d4:	683b      	ldr	r3, [r7, #0]
- 80074d6:	88db      	ldrh	r3, [r3, #6]
- 80074d8:	3b01      	subs	r3, #1
- 80074da:	429a      	cmp	r2, r3
- 80074dc:	d103      	bne.n	80074e6 <Refresh_Window+0xb6>
+ 800755c:	8a7b      	ldrh	r3, [r7, #18]
+ 800755e:	2b00      	cmp	r3, #0
+ 8007560:	d00e      	beq.n	8007580 <Refresh_Window+0xae>
+ 8007562:	8abb      	ldrh	r3, [r7, #20]
+ 8007564:	2b00      	cmp	r3, #0
+ 8007566:	d00b      	beq.n	8007580 <Refresh_Window+0xae>
+ 8007568:	8a7a      	ldrh	r2, [r7, #18]
+ 800756a:	683b      	ldr	r3, [r7, #0]
+ 800756c:	889b      	ldrh	r3, [r3, #4]
+ 800756e:	3b01      	subs	r3, #1
+ 8007570:	429a      	cmp	r2, r3
+ 8007572:	d005      	beq.n	8007580 <Refresh_Window+0xae>
+ 8007574:	8aba      	ldrh	r2, [r7, #20]
+ 8007576:	683b      	ldr	r3, [r7, #0]
+ 8007578:	88db      	ldrh	r3, [r3, #6]
+ 800757a:	3b01      	subs	r3, #1
+ 800757c:	429a      	cmp	r2, r3
+ 800757e:	d103      	bne.n	8007588 <Refresh_Window+0xb6>
 					{
 						Inteface_SetColor(BLUE);
- 80074de:	201f      	movs	r0, #31
- 80074e0:	f7ff fefa 	bl	80072d8 <Inteface_SetColor>
- 80074e4:	e005      	b.n	80074f2 <Refresh_Window+0xc2>
+ 8007580:	201f      	movs	r0, #31
+ 8007582:	f7ff fead 	bl	80072e0 <Inteface_SetColor>
+ 8007586:	e005      	b.n	8007594 <Refresh_Window+0xc2>
 					}else
 					{
 						Inteface_SetColor(temp_window->background);
- 80074e6:	683b      	ldr	r3, [r7, #0]
- 80074e8:	689b      	ldr	r3, [r3, #8]
- 80074ea:	b29b      	uxth	r3, r3
- 80074ec:	4618      	mov	r0, r3
- 80074ee:	f7ff fef3 	bl	80072d8 <Inteface_SetColor>
+ 8007588:	683b      	ldr	r3, [r7, #0]
+ 800758a:	689b      	ldr	r3, [r3, #8]
+ 800758c:	b29b      	uxth	r3, r3
+ 800758e:	4618      	mov	r0, r3
+ 8007590:	f7ff fea6 	bl	80072e0 <Inteface_SetColor>
 		for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
- 80074f2:	8a7b      	ldrh	r3, [r7, #18]
- 80074f4:	3301      	adds	r3, #1
- 80074f6:	827b      	strh	r3, [r7, #18]
- 80074f8:	683b      	ldr	r3, [r7, #0]
- 80074fa:	889b      	ldrh	r3, [r3, #4]
- 80074fc:	8a7a      	ldrh	r2, [r7, #18]
- 80074fe:	429a      	cmp	r2, r3
- 8007500:	d3a3      	bcc.n	800744a <Refresh_Window+0x1a>
+ 8007594:	8a7b      	ldrh	r3, [r7, #18]
+ 8007596:	3301      	adds	r3, #1
+ 8007598:	827b      	strh	r3, [r7, #18]
+ 800759a:	683b      	ldr	r3, [r7, #0]
+ 800759c:	889b      	ldrh	r3, [r3, #4]
+ 800759e:	8a7a      	ldrh	r2, [r7, #18]
+ 80075a0:	429a      	cmp	r2, r3
+ 80075a2:	d3a3      	bcc.n	80074ec <Refresh_Window+0x1a>
 	for(uint16_t temp_y=0;temp_y<temp_window->high;temp_y++)
- 8007502:	8abb      	ldrh	r3, [r7, #20]
- 8007504:	3301      	adds	r3, #1
- 8007506:	82bb      	strh	r3, [r7, #20]
- 8007508:	683b      	ldr	r3, [r7, #0]
- 800750a:	88db      	ldrh	r3, [r3, #6]
- 800750c:	8aba      	ldrh	r2, [r7, #20]
- 800750e:	429a      	cmp	r2, r3
- 8007510:	d396      	bcc.n	8007440 <Refresh_Window+0x10>
+ 80075a4:	8abb      	ldrh	r3, [r7, #20]
+ 80075a6:	3301      	adds	r3, #1
+ 80075a8:	82bb      	strh	r3, [r7, #20]
+ 80075aa:	683b      	ldr	r3, [r7, #0]
+ 80075ac:	88db      	ldrh	r3, [r3, #6]
+ 80075ae:	8aba      	ldrh	r2, [r7, #20]
+ 80075b0:	429a      	cmp	r2, r3
+ 80075b2:	d396      	bcc.n	80074e2 <Refresh_Window+0x10>
 
 		}
 	}
 	*/
 	//显示title
 	LCD_ShowString(temp_window->x,temp_window->y,&temp_window->title,16,WHITE,WHITE);
- 8007512:	683b      	ldr	r3, [r7, #0]
- 8007514:	8818      	ldrh	r0, [r3, #0]
- 8007516:	683b      	ldr	r3, [r7, #0]
- 8007518:	8859      	ldrh	r1, [r3, #2]
- 800751a:	683b      	ldr	r3, [r7, #0]
- 800751c:	f103 020c 	add.w	r2, r3, #12
- 8007520:	f64f 73ff 	movw	r3, #65535	; 0xffff
- 8007524:	9301      	str	r3, [sp, #4]
- 8007526:	f64f 73ff 	movw	r3, #65535	; 0xffff
- 800752a:	9300      	str	r3, [sp, #0]
- 800752c:	2310      	movs	r3, #16
- 800752e:	f7fe fa7d 	bl	8005a2c <LCD_ShowString>
+ 80075b4:	683b      	ldr	r3, [r7, #0]
+ 80075b6:	8818      	ldrh	r0, [r3, #0]
+ 80075b8:	683b      	ldr	r3, [r7, #0]
+ 80075ba:	8859      	ldrh	r1, [r3, #2]
+ 80075bc:	683b      	ldr	r3, [r7, #0]
+ 80075be:	f103 020c 	add.w	r2, r3, #12
+ 80075c2:	f64f 73ff 	movw	r3, #65535	; 0xffff
+ 80075c6:	9301      	str	r3, [sp, #4]
+ 80075c8:	f64f 73ff 	movw	r3, #65535	; 0xffff
+ 80075cc:	9300      	str	r3, [sp, #0]
+ 80075ce:	2310      	movs	r3, #16
+ 80075d0:	f7fe fa2c 	bl	8005a2c <LCD_ShowString>
 
 }
- 8007532:	bf00      	nop
- 8007534:	3718      	adds	r7, #24
- 8007536:	46bd      	mov	sp, r7
- 8007538:	bd80      	pop	{r7, pc}
+ 80075d4:	bf00      	nop
+ 80075d6:	3718      	adds	r7, #24
+ 80075d8:	46bd      	mov	sp, r7
+ 80075da:	bd80      	pop	{r7, pc}
 
-0800753a <Refresh_UI>:
+080075dc <Refresh_UI>:
  * 很可惜 辛辛苦苦写的代码要被放弃
  * 用算法实现遮挡关系计算真挺蠢
  *
  * */
 void Refresh_UI(UI *ui)
 {
- 800753a:	b580      	push	{r7, lr}
- 800753c:	b086      	sub	sp, #24
- 800753e:	af00      	add	r7, sp, #0
- 8007540:	6078      	str	r0, [r7, #4]
+ 80075dc:	b580      	push	{r7, lr}
+ 80075de:	b086      	sub	sp, #24
+ 80075e0:	af00      	add	r7, sp, #0
+ 80075e2:	6078      	str	r0, [r7, #4]
 	int flag=0;
- 8007542:	2300      	movs	r3, #0
- 8007544:	617b      	str	r3, [r7, #20]
+ 80075e4:	2300      	movs	r3, #0
+ 80075e6:	617b      	str	r3, [r7, #20]
 	uint16_t dot_y=0,dot_x=0;
- 8007546:	2300      	movs	r3, #0
- 8007548:	827b      	strh	r3, [r7, #18]
- 800754a:	2300      	movs	r3, #0
- 800754c:	823b      	strh	r3, [r7, #16]
+ 80075e8:	2300      	movs	r3, #0
+ 80075ea:	827b      	strh	r3, [r7, #18]
+ 80075ec:	2300      	movs	r3, #0
+ 80075ee:	823b      	strh	r3, [r7, #16]
 	//画背景
 	for(dot_y=ui->y;dot_y<ui->high;dot_y++)
- 800754e:	687b      	ldr	r3, [r7, #4]
- 8007550:	88db      	ldrh	r3, [r3, #6]
- 8007552:	827b      	strh	r3, [r7, #18]
- 8007554:	e01a      	b.n	800758c <Refresh_UI+0x52>
+ 80075f0:	687b      	ldr	r3, [r7, #4]
+ 80075f2:	88db      	ldrh	r3, [r3, #6]
+ 80075f4:	827b      	strh	r3, [r7, #18]
+ 80075f6:	e01a      	b.n	800762e <Refresh_UI+0x52>
 	{
 		Inteface_SetCursor(dot_x,dot_y);
- 8007556:	8a7a      	ldrh	r2, [r7, #18]
- 8007558:	8a3b      	ldrh	r3, [r7, #16]
- 800755a:	4611      	mov	r1, r2
- 800755c:	4618      	mov	r0, r3
- 800755e:	f7ff fea1 	bl	80072a4 <Inteface_SetCursor>
+ 80075f8:	8a7a      	ldrh	r2, [r7, #18]
+ 80075fa:	8a3b      	ldrh	r3, [r7, #16]
+ 80075fc:	4611      	mov	r1, r2
+ 80075fe:	4618      	mov	r0, r3
+ 8007600:	f7ff fe54 	bl	80072ac <Inteface_SetCursor>
 		for(dot_x=ui->x;dot_x<ui->width;dot_x++)
- 8007562:	687b      	ldr	r3, [r7, #4]
- 8007564:	889b      	ldrh	r3, [r3, #4]
- 8007566:	823b      	strh	r3, [r7, #16]
- 8007568:	e008      	b.n	800757c <Refresh_UI+0x42>
+ 8007604:	687b      	ldr	r3, [r7, #4]
+ 8007606:	889b      	ldrh	r3, [r3, #4]
+ 8007608:	823b      	strh	r3, [r7, #16]
+ 800760a:	e008      	b.n	800761e <Refresh_UI+0x42>
 		{
 			Inteface_SetColor(ui->background);
- 800756a:	687b      	ldr	r3, [r7, #4]
- 800756c:	681b      	ldr	r3, [r3, #0]
- 800756e:	b29b      	uxth	r3, r3
- 8007570:	4618      	mov	r0, r3
- 8007572:	f7ff feb1 	bl	80072d8 <Inteface_SetColor>
+ 800760c:	687b      	ldr	r3, [r7, #4]
+ 800760e:	681b      	ldr	r3, [r3, #0]
+ 8007610:	b29b      	uxth	r3, r3
+ 8007612:	4618      	mov	r0, r3
+ 8007614:	f7ff fe64 	bl	80072e0 <Inteface_SetColor>
 		for(dot_x=ui->x;dot_x<ui->width;dot_x++)
- 8007576:	8a3b      	ldrh	r3, [r7, #16]
- 8007578:	3301      	adds	r3, #1
- 800757a:	823b      	strh	r3, [r7, #16]
- 800757c:	687b      	ldr	r3, [r7, #4]
- 800757e:	891b      	ldrh	r3, [r3, #8]
- 8007580:	8a3a      	ldrh	r2, [r7, #16]
- 8007582:	429a      	cmp	r2, r3
- 8007584:	d3f1      	bcc.n	800756a <Refresh_UI+0x30>
+ 8007618:	8a3b      	ldrh	r3, [r7, #16]
+ 800761a:	3301      	adds	r3, #1
+ 800761c:	823b      	strh	r3, [r7, #16]
+ 800761e:	687b      	ldr	r3, [r7, #4]
+ 8007620:	891b      	ldrh	r3, [r3, #8]
+ 8007622:	8a3a      	ldrh	r2, [r7, #16]
+ 8007624:	429a      	cmp	r2, r3
+ 8007626:	d3f1      	bcc.n	800760c <Refresh_UI+0x30>
 	for(dot_y=ui->y;dot_y<ui->high;dot_y++)
- 8007586:	8a7b      	ldrh	r3, [r7, #18]
- 8007588:	3301      	adds	r3, #1
- 800758a:	827b      	strh	r3, [r7, #18]
- 800758c:	687b      	ldr	r3, [r7, #4]
- 800758e:	895b      	ldrh	r3, [r3, #10]
- 8007590:	8a7a      	ldrh	r2, [r7, #18]
- 8007592:	429a      	cmp	r2, r3
- 8007594:	d3df      	bcc.n	8007556 <Refresh_UI+0x1c>
+ 8007628:	8a7b      	ldrh	r3, [r7, #18]
+ 800762a:	3301      	adds	r3, #1
+ 800762c:	827b      	strh	r3, [r7, #18]
+ 800762e:	687b      	ldr	r3, [r7, #4]
+ 8007630:	895b      	ldrh	r3, [r3, #10]
+ 8007632:	8a7a      	ldrh	r2, [r7, #18]
+ 8007634:	429a      	cmp	r2, r3
+ 8007636:	d3df      	bcc.n	80075f8 <Refresh_UI+0x1c>
 		}
 
 	}
 	windows_stack *temp_windows_stack,*temp_windows_stack2;
 	temp_windows_stack=ui->windows;
- 8007596:	687b      	ldr	r3, [r7, #4]
- 8007598:	68db      	ldr	r3, [r3, #12]
- 800759a:	60fb      	str	r3, [r7, #12]
+ 8007638:	687b      	ldr	r3, [r7, #4]
+ 800763a:	68db      	ldr	r3, [r3, #12]
+ 800763c:	60fb      	str	r3, [r7, #12]
 	do
 	{
 		if(temp_windows_stack!=NULL)
- 800759c:	68fb      	ldr	r3, [r7, #12]
- 800759e:	2b00      	cmp	r3, #0
- 80075a0:	d00b      	beq.n	80075ba <Refresh_UI+0x80>
+ 800763e:	68fb      	ldr	r3, [r7, #12]
+ 8007640:	2b00      	cmp	r3, #0
+ 8007642:	d00b      	beq.n	800765c <Refresh_UI+0x80>
 		{
 			flag=1;
- 80075a2:	2301      	movs	r3, #1
- 80075a4:	617b      	str	r3, [r7, #20]
+ 8007644:	2301      	movs	r3, #1
+ 8007646:	617b      	str	r3, [r7, #20]
 			Refresh_Window(ui,temp_windows_stack->window);
- 80075a6:	68fb      	ldr	r3, [r7, #12]
- 80075a8:	685b      	ldr	r3, [r3, #4]
- 80075aa:	4619      	mov	r1, r3
- 80075ac:	6878      	ldr	r0, [r7, #4]
- 80075ae:	f7ff ff3f 	bl	8007430 <Refresh_Window>
+ 8007648:	68fb      	ldr	r3, [r7, #12]
+ 800764a:	685b      	ldr	r3, [r3, #4]
+ 800764c:	4619      	mov	r1, r3
+ 800764e:	6878      	ldr	r0, [r7, #4]
+ 8007650:	f7ff ff3f 	bl	80074d2 <Refresh_Window>
 			//绘制下一个窗口
 			temp_windows_stack=temp_windows_stack->next;
- 80075b2:	68fb      	ldr	r3, [r7, #12]
- 80075b4:	689b      	ldr	r3, [r3, #8]
- 80075b6:	60fb      	str	r3, [r7, #12]
- 80075b8:	e001      	b.n	80075be <Refresh_UI+0x84>
+ 8007654:	68fb      	ldr	r3, [r7, #12]
+ 8007656:	689b      	ldr	r3, [r3, #8]
+ 8007658:	60fb      	str	r3, [r7, #12]
+ 800765a:	e001      	b.n	8007660 <Refresh_UI+0x84>
 		}else
 		{
 			flag=0;
- 80075ba:	2300      	movs	r3, #0
- 80075bc:	617b      	str	r3, [r7, #20]
+ 800765c:	2300      	movs	r3, #0
+ 800765e:	617b      	str	r3, [r7, #20]
 		}
 
 	}while(flag);
- 80075be:	697b      	ldr	r3, [r7, #20]
- 80075c0:	2b00      	cmp	r3, #0
- 80075c2:	d1eb      	bne.n	800759c <Refresh_UI+0x62>
+ 8007660:	697b      	ldr	r3, [r7, #20]
+ 8007662:	2b00      	cmp	r3, #0
+ 8007664:	d1eb      	bne.n	800763e <Refresh_UI+0x62>
 		}
 
 	}
 */
 
 }
- 80075c4:	bf00      	nop
- 80075c6:	bf00      	nop
- 80075c8:	3718      	adds	r7, #24
- 80075ca:	46bd      	mov	sp, r7
- 80075cc:	bd80      	pop	{r7, pc}
+ 8007666:	bf00      	nop
+ 8007668:	bf00      	nop
+ 800766a:	3718      	adds	r7, #24
+ 800766c:	46bd      	mov	sp, r7
+ 800766e:	bd80      	pop	{r7, pc}
 
-080075ce <Chack>:
+08007670 <Chack>:
 #define BODY  1
 #define BAR   2
 #define CLOSE 3
 
 uint8_t Chack(window *this_window,int x,int y)
 {
- 80075ce:	b480      	push	{r7}
- 80075d0:	b087      	sub	sp, #28
- 80075d2:	af00      	add	r7, sp, #0
- 80075d4:	60f8      	str	r0, [r7, #12]
- 80075d6:	60b9      	str	r1, [r7, #8]
- 80075d8:	607a      	str	r2, [r7, #4]
+ 8007670:	b480      	push	{r7}
+ 8007672:	b087      	sub	sp, #28
+ 8007674:	af00      	add	r7, sp, #0
+ 8007676:	60f8      	str	r0, [r7, #12]
+ 8007678:	60b9      	str	r1, [r7, #8]
+ 800767a:	607a      	str	r2, [r7, #4]
 	int a=0;
- 80075da:	2300      	movs	r3, #0
- 80075dc:	617b      	str	r3, [r7, #20]
+ 800767c:	2300      	movs	r3, #0
+ 800767e:	617b      	str	r3, [r7, #20]
 
 	if(((x>=this_window->x)&&(x<(this_window->x+this_window->width)))&&((y>=this_window->y+16)&&(y<(this_window->y+this_window->high))))
- 80075de:	68fb      	ldr	r3, [r7, #12]
- 80075e0:	881b      	ldrh	r3, [r3, #0]
- 80075e2:	461a      	mov	r2, r3
- 80075e4:	68bb      	ldr	r3, [r7, #8]
- 80075e6:	4293      	cmp	r3, r2
- 80075e8:	db19      	blt.n	800761e <Chack+0x50>
- 80075ea:	68fb      	ldr	r3, [r7, #12]
- 80075ec:	881b      	ldrh	r3, [r3, #0]
- 80075ee:	461a      	mov	r2, r3
- 80075f0:	68fb      	ldr	r3, [r7, #12]
- 80075f2:	889b      	ldrh	r3, [r3, #4]
- 80075f4:	4413      	add	r3, r2
- 80075f6:	68ba      	ldr	r2, [r7, #8]
- 80075f8:	429a      	cmp	r2, r3
- 80075fa:	da10      	bge.n	800761e <Chack+0x50>
- 80075fc:	68fb      	ldr	r3, [r7, #12]
- 80075fe:	885b      	ldrh	r3, [r3, #2]
- 8007600:	330f      	adds	r3, #15
- 8007602:	687a      	ldr	r2, [r7, #4]
- 8007604:	429a      	cmp	r2, r3
- 8007606:	dd0a      	ble.n	800761e <Chack+0x50>
- 8007608:	68fb      	ldr	r3, [r7, #12]
- 800760a:	885b      	ldrh	r3, [r3, #2]
- 800760c:	461a      	mov	r2, r3
- 800760e:	68fb      	ldr	r3, [r7, #12]
- 8007610:	88db      	ldrh	r3, [r3, #6]
- 8007612:	4413      	add	r3, r2
- 8007614:	687a      	ldr	r2, [r7, #4]
- 8007616:	429a      	cmp	r2, r3
- 8007618:	da01      	bge.n	800761e <Chack+0x50>
+ 8007680:	68fb      	ldr	r3, [r7, #12]
+ 8007682:	881b      	ldrh	r3, [r3, #0]
+ 8007684:	461a      	mov	r2, r3
+ 8007686:	68bb      	ldr	r3, [r7, #8]
+ 8007688:	4293      	cmp	r3, r2
+ 800768a:	db19      	blt.n	80076c0 <Chack+0x50>
+ 800768c:	68fb      	ldr	r3, [r7, #12]
+ 800768e:	881b      	ldrh	r3, [r3, #0]
+ 8007690:	461a      	mov	r2, r3
+ 8007692:	68fb      	ldr	r3, [r7, #12]
+ 8007694:	889b      	ldrh	r3, [r3, #4]
+ 8007696:	4413      	add	r3, r2
+ 8007698:	68ba      	ldr	r2, [r7, #8]
+ 800769a:	429a      	cmp	r2, r3
+ 800769c:	da10      	bge.n	80076c0 <Chack+0x50>
+ 800769e:	68fb      	ldr	r3, [r7, #12]
+ 80076a0:	885b      	ldrh	r3, [r3, #2]
+ 80076a2:	330f      	adds	r3, #15
+ 80076a4:	687a      	ldr	r2, [r7, #4]
+ 80076a6:	429a      	cmp	r2, r3
+ 80076a8:	dd0a      	ble.n	80076c0 <Chack+0x50>
+ 80076aa:	68fb      	ldr	r3, [r7, #12]
+ 80076ac:	885b      	ldrh	r3, [r3, #2]
+ 80076ae:	461a      	mov	r2, r3
+ 80076b0:	68fb      	ldr	r3, [r7, #12]
+ 80076b2:	88db      	ldrh	r3, [r3, #6]
+ 80076b4:	4413      	add	r3, r2
+ 80076b6:	687a      	ldr	r2, [r7, #4]
+ 80076b8:	429a      	cmp	r2, r3
+ 80076ba:	da01      	bge.n	80076c0 <Chack+0x50>
 	{
 		a=1;
- 800761a:	2301      	movs	r3, #1
- 800761c:	617b      	str	r3, [r7, #20]
+ 80076bc:	2301      	movs	r3, #1
+ 80076be:	617b      	str	r3, [r7, #20]
 	}
 	if(((x>=this_window->x)&&(x<(this_window->x+this_window->width-16)))&&((y>=this_window->y)&&(y<(this_window->y+16))))
- 800761e:	68fb      	ldr	r3, [r7, #12]
- 8007620:	881b      	ldrh	r3, [r3, #0]
- 8007622:	461a      	mov	r2, r3
- 8007624:	68bb      	ldr	r3, [r7, #8]
- 8007626:	4293      	cmp	r3, r2
- 8007628:	db17      	blt.n	800765a <Chack+0x8c>
- 800762a:	68fb      	ldr	r3, [r7, #12]
- 800762c:	881b      	ldrh	r3, [r3, #0]
- 800762e:	461a      	mov	r2, r3
- 8007630:	68fb      	ldr	r3, [r7, #12]
- 8007632:	889b      	ldrh	r3, [r3, #4]
- 8007634:	4413      	add	r3, r2
- 8007636:	3b10      	subs	r3, #16
- 8007638:	68ba      	ldr	r2, [r7, #8]
- 800763a:	429a      	cmp	r2, r3
- 800763c:	da0d      	bge.n	800765a <Chack+0x8c>
- 800763e:	68fb      	ldr	r3, [r7, #12]
- 8007640:	885b      	ldrh	r3, [r3, #2]
- 8007642:	461a      	mov	r2, r3
- 8007644:	687b      	ldr	r3, [r7, #4]
- 8007646:	4293      	cmp	r3, r2
- 8007648:	db07      	blt.n	800765a <Chack+0x8c>
- 800764a:	68fb      	ldr	r3, [r7, #12]
- 800764c:	885b      	ldrh	r3, [r3, #2]
- 800764e:	330f      	adds	r3, #15
- 8007650:	687a      	ldr	r2, [r7, #4]
- 8007652:	429a      	cmp	r2, r3
- 8007654:	dc01      	bgt.n	800765a <Chack+0x8c>
+ 80076c0:	68fb      	ldr	r3, [r7, #12]
+ 80076c2:	881b      	ldrh	r3, [r3, #0]
+ 80076c4:	461a      	mov	r2, r3
+ 80076c6:	68bb      	ldr	r3, [r7, #8]
+ 80076c8:	4293      	cmp	r3, r2
+ 80076ca:	db17      	blt.n	80076fc <Chack+0x8c>
+ 80076cc:	68fb      	ldr	r3, [r7, #12]
+ 80076ce:	881b      	ldrh	r3, [r3, #0]
+ 80076d0:	461a      	mov	r2, r3
+ 80076d2:	68fb      	ldr	r3, [r7, #12]
+ 80076d4:	889b      	ldrh	r3, [r3, #4]
+ 80076d6:	4413      	add	r3, r2
+ 80076d8:	3b10      	subs	r3, #16
+ 80076da:	68ba      	ldr	r2, [r7, #8]
+ 80076dc:	429a      	cmp	r2, r3
+ 80076de:	da0d      	bge.n	80076fc <Chack+0x8c>
+ 80076e0:	68fb      	ldr	r3, [r7, #12]
+ 80076e2:	885b      	ldrh	r3, [r3, #2]
+ 80076e4:	461a      	mov	r2, r3
+ 80076e6:	687b      	ldr	r3, [r7, #4]
+ 80076e8:	4293      	cmp	r3, r2
+ 80076ea:	db07      	blt.n	80076fc <Chack+0x8c>
+ 80076ec:	68fb      	ldr	r3, [r7, #12]
+ 80076ee:	885b      	ldrh	r3, [r3, #2]
+ 80076f0:	330f      	adds	r3, #15
+ 80076f2:	687a      	ldr	r2, [r7, #4]
+ 80076f4:	429a      	cmp	r2, r3
+ 80076f6:	dc01      	bgt.n	80076fc <Chack+0x8c>
 	{
 		a=2;
- 8007656:	2302      	movs	r3, #2
- 8007658:	617b      	str	r3, [r7, #20]
+ 80076f8:	2302      	movs	r3, #2
+ 80076fa:	617b      	str	r3, [r7, #20]
 	}
 	if((x>=(this_window->x+this_window->width-16))&&(x<(this_window->x+this_window->width))&&((y>=this_window->y)&&(y<(this_window->y+16))))
- 800765a:	68fb      	ldr	r3, [r7, #12]
- 800765c:	881b      	ldrh	r3, [r3, #0]
- 800765e:	461a      	mov	r2, r3
- 8007660:	68fb      	ldr	r3, [r7, #12]
- 8007662:	889b      	ldrh	r3, [r3, #4]
- 8007664:	4413      	add	r3, r2
- 8007666:	3b10      	subs	r3, #16
- 8007668:	68ba      	ldr	r2, [r7, #8]
- 800766a:	429a      	cmp	r2, r3
- 800766c:	db16      	blt.n	800769c <Chack+0xce>
- 800766e:	68fb      	ldr	r3, [r7, #12]
- 8007670:	881b      	ldrh	r3, [r3, #0]
- 8007672:	461a      	mov	r2, r3
- 8007674:	68fb      	ldr	r3, [r7, #12]
- 8007676:	889b      	ldrh	r3, [r3, #4]
- 8007678:	4413      	add	r3, r2
- 800767a:	68ba      	ldr	r2, [r7, #8]
- 800767c:	429a      	cmp	r2, r3
- 800767e:	da0d      	bge.n	800769c <Chack+0xce>
- 8007680:	68fb      	ldr	r3, [r7, #12]
- 8007682:	885b      	ldrh	r3, [r3, #2]
- 8007684:	461a      	mov	r2, r3
- 8007686:	687b      	ldr	r3, [r7, #4]
- 8007688:	4293      	cmp	r3, r2
- 800768a:	db07      	blt.n	800769c <Chack+0xce>
- 800768c:	68fb      	ldr	r3, [r7, #12]
- 800768e:	885b      	ldrh	r3, [r3, #2]
- 8007690:	330f      	adds	r3, #15
- 8007692:	687a      	ldr	r2, [r7, #4]
- 8007694:	429a      	cmp	r2, r3
- 8007696:	dc01      	bgt.n	800769c <Chack+0xce>
+ 80076fc:	68fb      	ldr	r3, [r7, #12]
+ 80076fe:	881b      	ldrh	r3, [r3, #0]
+ 8007700:	461a      	mov	r2, r3
+ 8007702:	68fb      	ldr	r3, [r7, #12]
+ 8007704:	889b      	ldrh	r3, [r3, #4]
+ 8007706:	4413      	add	r3, r2
+ 8007708:	3b10      	subs	r3, #16
+ 800770a:	68ba      	ldr	r2, [r7, #8]
+ 800770c:	429a      	cmp	r2, r3
+ 800770e:	db16      	blt.n	800773e <Chack+0xce>
+ 8007710:	68fb      	ldr	r3, [r7, #12]
+ 8007712:	881b      	ldrh	r3, [r3, #0]
+ 8007714:	461a      	mov	r2, r3
+ 8007716:	68fb      	ldr	r3, [r7, #12]
+ 8007718:	889b      	ldrh	r3, [r3, #4]
+ 800771a:	4413      	add	r3, r2
+ 800771c:	68ba      	ldr	r2, [r7, #8]
+ 800771e:	429a      	cmp	r2, r3
+ 8007720:	da0d      	bge.n	800773e <Chack+0xce>
+ 8007722:	68fb      	ldr	r3, [r7, #12]
+ 8007724:	885b      	ldrh	r3, [r3, #2]
+ 8007726:	461a      	mov	r2, r3
+ 8007728:	687b      	ldr	r3, [r7, #4]
+ 800772a:	4293      	cmp	r3, r2
+ 800772c:	db07      	blt.n	800773e <Chack+0xce>
+ 800772e:	68fb      	ldr	r3, [r7, #12]
+ 8007730:	885b      	ldrh	r3, [r3, #2]
+ 8007732:	330f      	adds	r3, #15
+ 8007734:	687a      	ldr	r2, [r7, #4]
+ 8007736:	429a      	cmp	r2, r3
+ 8007738:	dc01      	bgt.n	800773e <Chack+0xce>
 	{
 		a=3;
- 8007698:	2303      	movs	r3, #3
- 800769a:	617b      	str	r3, [r7, #20]
+ 800773a:	2303      	movs	r3, #3
+ 800773c:	617b      	str	r3, [r7, #20]
 	}
 	return a;
- 800769c:	697b      	ldr	r3, [r7, #20]
- 800769e:	b2db      	uxtb	r3, r3
+ 800773e:	697b      	ldr	r3, [r7, #20]
+ 8007740:	b2db      	uxtb	r3, r3
 
 }
- 80076a0:	4618      	mov	r0, r3
- 80076a2:	371c      	adds	r7, #28
- 80076a4:	46bd      	mov	sp, r7
- 80076a6:	bc80      	pop	{r7}
- 80076a8:	4770      	bx	lr
-	...
+ 8007742:	4618      	mov	r0, r3
+ 8007744:	371c      	adds	r7, #28
+ 8007746:	46bd      	mov	sp, r7
+ 8007748:	bc80      	pop	{r7}
+ 800774a:	4770      	bx	lr
 
-080076ac <UI_Server>:
+0800774c <UI_Server>:
 
 void UI_Server(UI *ui)
 {
- 80076ac:	b580      	push	{r7, lr}
- 80076ae:	b088      	sub	sp, #32
- 80076b0:	af00      	add	r7, sp, #0
- 80076b2:	6078      	str	r0, [r7, #4]
+ 800774c:	b580      	push	{r7, lr}
+ 800774e:	b088      	sub	sp, #32
+ 8007750:	af00      	add	r7, sp, #0
+ 8007752:	6078      	str	r0, [r7, #4]
 
 	windows_stack *temp_windows_stack=NULL;
- 80076b4:	2300      	movs	r3, #0
- 80076b6:	61fb      	str	r3, [r7, #28]
+ 8007754:	2300      	movs	r3, #0
+ 8007756:	61fb      	str	r3, [r7, #28]
 	window *temp_window;
 	//touch_device *temp_touch=NULL;
 	int flag=0;
- 80076b8:	2300      	movs	r3, #0
- 80076ba:	61bb      	str	r3, [r7, #24]
+ 8007758:	2300      	movs	r3, #0
+ 800775a:	61bb      	str	r3, [r7, #24]
 	uint8_t hit_flag=0;
- 80076bc:	2300      	movs	r3, #0
- 80076be:	75fb      	strb	r3, [r7, #23]
+ 800775c:	2300      	movs	r3, #0
+ 800775e:	75fb      	strb	r3, [r7, #23]
 
 	int t_x,t_y;
 	//touch
 	//temp_touch=ui->touch;
 	if(t0.c)//TP_XY(&t_x, &t_y))
- 80076c0:	4b76      	ldr	r3, [pc, #472]	; (800789c <UI_Server+0x1f0>)
- 80076c2:	7b1b      	ldrb	r3, [r3, #12]
- 80076c4:	f003 0302 	and.w	r3, r3, #2
- 80076c8:	b2db      	uxtb	r3, r3
- 80076ca:	2b00      	cmp	r3, #0
- 80076cc:	f000 80ba 	beq.w	8007844 <UI_Server+0x198>
+ 8007760:	4b78      	ldr	r3, [pc, #480]	; (8007944 <UI_Server+0x1f8>)
+ 8007762:	7b1b      	ldrb	r3, [r3, #12]
+ 8007764:	f003 0302 	and.w	r3, r3, #2
+ 8007768:	b2db      	uxtb	r3, r3
+ 800776a:	2b00      	cmp	r3, #0
+ 800776c:	f000 80be 	beq.w	80078ec <UI_Server+0x1a0>
 	{
 		if(t0.d)
- 80076d0:	4b72      	ldr	r3, [pc, #456]	; (800789c <UI_Server+0x1f0>)
- 80076d2:	7b1b      	ldrb	r3, [r3, #12]
- 80076d4:	f003 0304 	and.w	r3, r3, #4
- 80076d8:	b2db      	uxtb	r3, r3
- 80076da:	2b00      	cmp	r3, #0
- 80076dc:	f000 80c8 	beq.w	8007870 <UI_Server+0x1c4>
+ 8007770:	4b74      	ldr	r3, [pc, #464]	; (8007944 <UI_Server+0x1f8>)
+ 8007772:	7b1b      	ldrb	r3, [r3, #12]
+ 8007774:	f003 0304 	and.w	r3, r3, #4
+ 8007778:	b2db      	uxtb	r3, r3
+ 800777a:	2b00      	cmp	r3, #0
+ 800777c:	f000 80cc 	beq.w	8007918 <UI_Server+0x1cc>
 		{
 			t_x=t0.pix_x;
- 80076e0:	4b6e      	ldr	r3, [pc, #440]	; (800789c <UI_Server+0x1f0>)
- 80076e2:	685b      	ldr	r3, [r3, #4]
- 80076e4:	613b      	str	r3, [r7, #16]
+ 8007780:	4b70      	ldr	r3, [pc, #448]	; (8007944 <UI_Server+0x1f8>)
+ 8007782:	685b      	ldr	r3, [r3, #4]
+ 8007784:	613b      	str	r3, [r7, #16]
 			t_y=t0.pix_y;
- 80076e6:	4b6d      	ldr	r3, [pc, #436]	; (800789c <UI_Server+0x1f0>)
- 80076e8:	689b      	ldr	r3, [r3, #8]
- 80076ea:	60fb      	str	r3, [r7, #12]
+ 8007786:	4b6f      	ldr	r3, [pc, #444]	; (8007944 <UI_Server+0x1f8>)
+ 8007788:	689b      	ldr	r3, [r3, #8]
+ 800778a:	60fb      	str	r3, [r7, #12]
 			temp_window=NULL;
- 80076ec:	2300      	movs	r3, #0
- 80076ee:	60bb      	str	r3, [r7, #8]
+ 800778c:	2300      	movs	r3, #0
+ 800778e:	60bb      	str	r3, [r7, #8]
 
 			if(ui->moveed_windwos==NULL)
- 80076f0:	687b      	ldr	r3, [r7, #4]
- 80076f2:	695b      	ldr	r3, [r3, #20]
- 80076f4:	2b00      	cmp	r3, #0
- 80076f6:	f040 8088 	bne.w	800780a <UI_Server+0x15e>
+ 8007790:	687b      	ldr	r3, [r7, #4]
+ 8007792:	695b      	ldr	r3, [r3, #20]
+ 8007794:	2b00      	cmp	r3, #0
+ 8007796:	f040 808c 	bne.w	80078b2 <UI_Server+0x166>
 			{
 				if(ui->First_click_flag==0)
- 80076fa:	687b      	ldr	r3, [r7, #4]
- 80076fc:	f893 3020 	ldrb.w	r3, [r3, #32]
- 8007700:	f003 0302 	and.w	r3, r3, #2
- 8007704:	b2db      	uxtb	r3, r3
- 8007706:	2b00      	cmp	r3, #0
- 8007708:	f040 80b2 	bne.w	8007870 <UI_Server+0x1c4>
+ 800779a:	687b      	ldr	r3, [r7, #4]
+ 800779c:	f893 3020 	ldrb.w	r3, [r3, #32]
+ 80077a0:	f003 0302 	and.w	r3, r3, #2
+ 80077a4:	b2db      	uxtb	r3, r3
+ 80077a6:	2b00      	cmp	r3, #0
+ 80077a8:	f040 80b6 	bne.w	8007918 <UI_Server+0x1cc>
 				{
 					ui->First_click_flag=1;
- 800770c:	687a      	ldr	r2, [r7, #4]
- 800770e:	f892 3020 	ldrb.w	r3, [r2, #32]
- 8007712:	f043 0302 	orr.w	r3, r3, #2
- 8007716:	f882 3020 	strb.w	r3, [r2, #32]
+ 80077ac:	687a      	ldr	r2, [r7, #4]
+ 80077ae:	f892 3020 	ldrb.w	r3, [r2, #32]
+ 80077b2:	f043 0302 	orr.w	r3, r3, #2
+ 80077b6:	f882 3020 	strb.w	r3, [r2, #32]
 					temp_windows_stack=ui->last_windows;                           //获取ui中最前端的窗口  从前往后扫描
- 800771a:	687b      	ldr	r3, [r7, #4]
- 800771c:	691b      	ldr	r3, [r3, #16]
- 800771e:	61fb      	str	r3, [r7, #28]
+ 80077ba:	687b      	ldr	r3, [r7, #4]
+ 80077bc:	691b      	ldr	r3, [r3, #16]
+ 80077be:	61fb      	str	r3, [r7, #28]
 					do
 					{
 						if(temp_windows_stack!=NULL)                               //如果有窗口就开始扫描
- 8007720:	69fb      	ldr	r3, [r7, #28]
- 8007722:	2b00      	cmp	r3, #0
- 8007724:	d06b      	beq.n	80077fe <UI_Server+0x152>
+ 80077c0:	69fb      	ldr	r3, [r7, #28]
+ 80077c2:	2b00      	cmp	r3, #0
+ 80077c4:	d06f      	beq.n	80078a6 <UI_Server+0x15a>
 						{
 							flag=1;                                                //检查到有窗口 需要循环一次以检查是否有下一个窗口
- 8007726:	2301      	movs	r3, #1
- 8007728:	61bb      	str	r3, [r7, #24]
+ 80077c6:	2301      	movs	r3, #1
+ 80077c8:	61bb      	str	r3, [r7, #24]
 							//
 							temp_window=temp_windows_stack->window;                  //取出这个窗口
- 800772a:	69fb      	ldr	r3, [r7, #28]
- 800772c:	685b      	ldr	r3, [r3, #4]
- 800772e:	60bb      	str	r3, [r7, #8]
+ 80077ca:	69fb      	ldr	r3, [r7, #28]
+ 80077cc:	685b      	ldr	r3, [r3, #4]
+ 80077ce:	60bb      	str	r3, [r7, #8]
 							hit_flag=Chack(temp_window,t_x,t_y); //检查触摸是否命中 直接返回命中窗口的位置
- 8007730:	68fa      	ldr	r2, [r7, #12]
- 8007732:	6939      	ldr	r1, [r7, #16]
- 8007734:	68b8      	ldr	r0, [r7, #8]
- 8007736:	f7ff ff4a 	bl	80075ce <Chack>
- 800773a:	4603      	mov	r3, r0
- 800773c:	75fb      	strb	r3, [r7, #23]
+ 80077d0:	68fa      	ldr	r2, [r7, #12]
+ 80077d2:	6939      	ldr	r1, [r7, #16]
+ 80077d4:	68b8      	ldr	r0, [r7, #8]
+ 80077d6:	f7ff ff4b 	bl	8007670 <Chack>
+ 80077da:	4603      	mov	r3, r0
+ 80077dc:	75fb      	strb	r3, [r7, #23]
 							if(hit_flag)     										 // 命中继续
- 800773e:	7dfb      	ldrb	r3, [r7, #23]
- 8007740:	2b00      	cmp	r3, #0
- 8007742:	d058      	beq.n	80077f6 <UI_Server+0x14a>
+ 80077de:	7dfb      	ldrb	r3, [r7, #23]
+ 80077e0:	2b00      	cmp	r3, #0
+ 80077e2:	d05c      	beq.n	800789e <UI_Server+0x152>
 							{
 								if(temp_windows_stack!=ui->last_windows)           //检查是否最前端的窗口 如果不是就放最前面
- 8007744:	687b      	ldr	r3, [r7, #4]
- 8007746:	691b      	ldr	r3, [r3, #16]
- 8007748:	69fa      	ldr	r2, [r7, #28]
- 800774a:	429a      	cmp	r2, r3
- 800774c:	d02c      	beq.n	80077a8 <UI_Server+0xfc>
+ 80077e4:	687b      	ldr	r3, [r7, #4]
+ 80077e6:	691b      	ldr	r3, [r3, #16]
+ 80077e8:	69fa      	ldr	r2, [r7, #28]
+ 80077ea:	429a      	cmp	r2, r3
+ 80077ec:	d02c      	beq.n	8007848 <UI_Server+0xfc>
 								{
 									if(temp_windows_stack!=ui->windows)            //检查是否最后端的窗口  因为显示是从最后端往前显示的 所以ui有最后端窗口的入口
- 800774e:	687b      	ldr	r3, [r7, #4]
- 8007750:	68db      	ldr	r3, [r3, #12]
- 8007752:	69fa      	ldr	r2, [r7, #28]
- 8007754:	429a      	cmp	r2, r3
- 8007756:	d00a      	beq.n	800776e <UI_Server+0xc2>
+ 80077ee:	687b      	ldr	r3, [r7, #4]
+ 80077f0:	68db      	ldr	r3, [r3, #12]
+ 80077f2:	69fa      	ldr	r2, [r7, #28]
+ 80077f4:	429a      	cmp	r2, r3
+ 80077f6:	d00a      	beq.n	800780e <UI_Server+0xc2>
 									{
 										temp_windows_stack->up->next=temp_windows_stack->next;  //取出这个节点 把节点的上下补上链接
- 8007758:	69fb      	ldr	r3, [r7, #28]
- 800775a:	681b      	ldr	r3, [r3, #0]
- 800775c:	69fa      	ldr	r2, [r7, #28]
- 800775e:	6892      	ldr	r2, [r2, #8]
- 8007760:	609a      	str	r2, [r3, #8]
+ 80077f8:	69fb      	ldr	r3, [r7, #28]
+ 80077fa:	681b      	ldr	r3, [r3, #0]
+ 80077fc:	69fa      	ldr	r2, [r7, #28]
+ 80077fe:	6892      	ldr	r2, [r2, #8]
+ 8007800:	609a      	str	r2, [r3, #8]
 										temp_windows_stack->next->up=temp_windows_stack->up;
- 8007762:	69fb      	ldr	r3, [r7, #28]
- 8007764:	689b      	ldr	r3, [r3, #8]
- 8007766:	69fa      	ldr	r2, [r7, #28]
- 8007768:	6812      	ldr	r2, [r2, #0]
- 800776a:	601a      	str	r2, [r3, #0]
- 800776c:	e007      	b.n	800777e <UI_Server+0xd2>
+ 8007802:	69fb      	ldr	r3, [r7, #28]
+ 8007804:	689b      	ldr	r3, [r3, #8]
+ 8007806:	69fa      	ldr	r2, [r7, #28]
+ 8007808:	6812      	ldr	r2, [r2, #0]
+ 800780a:	601a      	str	r2, [r3, #0]
+ 800780c:	e007      	b.n	800781e <UI_Server+0xd2>
 									}else
 									{
 										ui->windows=temp_windows_stack->next;       //如果是最后端的窗口 则取出这个节点后入口就变下一个节点了
- 800776e:	69fb      	ldr	r3, [r7, #28]
- 8007770:	689a      	ldr	r2, [r3, #8]
- 8007772:	687b      	ldr	r3, [r7, #4]
- 8007774:	60da      	str	r2, [r3, #12]
+ 800780e:	69fb      	ldr	r3, [r7, #28]
+ 8007810:	689a      	ldr	r2, [r3, #8]
+ 8007812:	687b      	ldr	r3, [r7, #4]
+ 8007814:	60da      	str	r2, [r3, #12]
 										ui->windows->up=NULL;                       //倒数第二变最后端  在走就没了  所以要清空指针
- 8007776:	687b      	ldr	r3, [r7, #4]
- 8007778:	68db      	ldr	r3, [r3, #12]
- 800777a:	2200      	movs	r2, #0
- 800777c:	601a      	str	r2, [r3, #0]
+ 8007816:	687b      	ldr	r3, [r7, #4]
+ 8007818:	68db      	ldr	r3, [r3, #12]
+ 800781a:	2200      	movs	r2, #0
+ 800781c:	601a      	str	r2, [r3, #0]
 									}
 									temp_windows_stack->next=NULL;                  //取出的节点要放在最前端 所以 无法再往前 清空往前的指针
- 800777e:	69fb      	ldr	r3, [r7, #28]
- 8007780:	2200      	movs	r2, #0
- 8007782:	609a      	str	r2, [r3, #8]
+ 800781e:	69fb      	ldr	r3, [r7, #28]
+ 8007820:	2200      	movs	r2, #0
+ 8007822:	609a      	str	r2, [r3, #8]
 									temp_windows_stack->up=ui->last_windows;        //上一个指针就是原来的最后一个
- 8007784:	687b      	ldr	r3, [r7, #4]
- 8007786:	691a      	ldr	r2, [r3, #16]
- 8007788:	69fb      	ldr	r3, [r7, #28]
- 800778a:	601a      	str	r2, [r3, #0]
+ 8007824:	687b      	ldr	r3, [r7, #4]
+ 8007826:	691a      	ldr	r2, [r3, #16]
+ 8007828:	69fb      	ldr	r3, [r7, #28]
+ 800782a:	601a      	str	r2, [r3, #0]
 									ui->last_windows->next=temp_windows_stack;      //原来的最后一个指向现在的最后一个
- 800778c:	687b      	ldr	r3, [r7, #4]
- 800778e:	691b      	ldr	r3, [r3, #16]
- 8007790:	69fa      	ldr	r2, [r7, #28]
- 8007792:	609a      	str	r2, [r3, #8]
+ 800782c:	687b      	ldr	r3, [r7, #4]
+ 800782e:	691b      	ldr	r3, [r3, #16]
+ 8007830:	69fa      	ldr	r2, [r7, #28]
+ 8007832:	609a      	str	r2, [r3, #8]
 									ui->last_windows=temp_windows_stack;            //更新ui中的最后一个的入口
- 8007794:	687b      	ldr	r3, [r7, #4]
- 8007796:	69fa      	ldr	r2, [r7, #28]
- 8007798:	611a      	str	r2, [r3, #16]
+ 8007834:	687b      	ldr	r3, [r7, #4]
+ 8007836:	69fa      	ldr	r2, [r7, #28]
+ 8007838:	611a      	str	r2, [r3, #16]
 									ui->refresh_ui_flag=1;                          //发生了变化 刷新ui的显示
- 800779a:	687a      	ldr	r2, [r7, #4]
- 800779c:	f892 3020 	ldrb.w	r3, [r2, #32]
- 80077a0:	f043 0304 	orr.w	r3, r3, #4
- 80077a4:	f882 3020 	strb.w	r3, [r2, #32]
+ 800783a:	687a      	ldr	r2, [r7, #4]
+ 800783c:	f892 3020 	ldrb.w	r3, [r2, #32]
+ 8007840:	f043 0304 	orr.w	r3, r3, #4
+ 8007844:	f882 3020 	strb.w	r3, [r2, #32]
 								}
 
 								//检查标中窗口的什么位置
 								switch(hit_flag)
- 80077a8:	7dfb      	ldrb	r3, [r7, #23]
- 80077aa:	2b03      	cmp	r3, #3
- 80077ac:	d006      	beq.n	80077bc <UI_Server+0x110>
- 80077ae:	2b03      	cmp	r3, #3
- 80077b0:	dc1f      	bgt.n	80077f2 <UI_Server+0x146>
- 80077b2:	2b01      	cmp	r3, #1
- 80077b4:	d01c      	beq.n	80077f0 <UI_Server+0x144>
- 80077b6:	2b02      	cmp	r3, #2
- 80077b8:	d008      	beq.n	80077cc <UI_Server+0x120>
- 80077ba:	e01a      	b.n	80077f2 <UI_Server+0x146>
+ 8007848:	7dfb      	ldrb	r3, [r7, #23]
+ 800784a:	2b03      	cmp	r3, #3
+ 800784c:	d006      	beq.n	800785c <UI_Server+0x110>
+ 800784e:	2b03      	cmp	r3, #3
+ 8007850:	dc23      	bgt.n	800789a <UI_Server+0x14e>
+ 8007852:	2b01      	cmp	r3, #1
+ 8007854:	d020      	beq.n	8007898 <UI_Server+0x14c>
+ 8007856:	2b02      	cmp	r3, #2
+ 8007858:	d00c      	beq.n	8007874 <UI_Server+0x128>
+ 800785a:	e01e      	b.n	800789a <UI_Server+0x14e>
 								{
 								case CLOSE:
-									//Close_Windows_Stack(ui,temp_windows_stack);
+									Close_Windows_Stack(ui,temp_windows_stack);
+ 800785c:	69f9      	ldr	r1, [r7, #28]
+ 800785e:	6878      	ldr	r0, [r7, #4]
+ 8007860:	f7ff fdea 	bl	8007438 <Close_Windows_Stack>
 									ui->refresh_ui_flag=1;                          //发生了变化 刷新ui的显示
- 80077bc:	687a      	ldr	r2, [r7, #4]
- 80077be:	f892 3020 	ldrb.w	r3, [r2, #32]
- 80077c2:	f043 0304 	orr.w	r3, r3, #4
- 80077c6:	f882 3020 	strb.w	r3, [r2, #32]
+ 8007864:	687a      	ldr	r2, [r7, #4]
+ 8007866:	f892 3020 	ldrb.w	r3, [r2, #32]
+ 800786a:	f043 0304 	orr.w	r3, r3, #4
+ 800786e:	f882 3020 	strb.w	r3, [r2, #32]
 									break;
- 80077ca:	e012      	b.n	80077f2 <UI_Server+0x146>
+ 8007872:	e012      	b.n	800789a <UI_Server+0x14e>
 								case BAR:
 									ui->moveed_windwos=temp_window;
- 80077cc:	687b      	ldr	r3, [r7, #4]
- 80077ce:	68ba      	ldr	r2, [r7, #8]
- 80077d0:	615a      	str	r2, [r3, #20]
+ 8007874:	687b      	ldr	r3, [r7, #4]
+ 8007876:	68ba      	ldr	r2, [r7, #8]
+ 8007878:	615a      	str	r2, [r3, #20]
 									ui->move_x=t_x-temp_window->x;
- 80077d2:	68bb      	ldr	r3, [r7, #8]
- 80077d4:	881b      	ldrh	r3, [r3, #0]
- 80077d6:	461a      	mov	r2, r3
- 80077d8:	693b      	ldr	r3, [r7, #16]
- 80077da:	1a9a      	subs	r2, r3, r2
- 80077dc:	687b      	ldr	r3, [r7, #4]
- 80077de:	619a      	str	r2, [r3, #24]
+ 800787a:	68bb      	ldr	r3, [r7, #8]
+ 800787c:	881b      	ldrh	r3, [r3, #0]
+ 800787e:	461a      	mov	r2, r3
+ 8007880:	693b      	ldr	r3, [r7, #16]
+ 8007882:	1a9a      	subs	r2, r3, r2
+ 8007884:	687b      	ldr	r3, [r7, #4]
+ 8007886:	619a      	str	r2, [r3, #24]
 									ui->move_y=t_y-temp_window->y;
- 80077e0:	68bb      	ldr	r3, [r7, #8]
- 80077e2:	885b      	ldrh	r3, [r3, #2]
- 80077e4:	461a      	mov	r2, r3
- 80077e6:	68fb      	ldr	r3, [r7, #12]
- 80077e8:	1a9a      	subs	r2, r3, r2
- 80077ea:	687b      	ldr	r3, [r7, #4]
- 80077ec:	61da      	str	r2, [r3, #28]
+ 8007888:	68bb      	ldr	r3, [r7, #8]
+ 800788a:	885b      	ldrh	r3, [r3, #2]
+ 800788c:	461a      	mov	r2, r3
+ 800788e:	68fb      	ldr	r3, [r7, #12]
+ 8007890:	1a9a      	subs	r2, r3, r2
+ 8007892:	687b      	ldr	r3, [r7, #4]
+ 8007894:	61da      	str	r2, [r3, #28]
 
 									break;
- 80077ee:	e000      	b.n	80077f2 <UI_Server+0x146>
+ 8007896:	e000      	b.n	800789a <UI_Server+0x14e>
 								case BODY:
 									//ui->background=temp_windows_stack->window->background;
 									//ui->refresh_ui_flag=1;
 									break;
- 80077f0:	bf00      	nop
+ 8007898:	bf00      	nop
 								}
 
 
 								flag=0;                                             //结束扫描 防止穿透当前窗口
- 80077f2:	2300      	movs	r3, #0
- 80077f4:	61bb      	str	r3, [r7, #24]
+ 800789a:	2300      	movs	r3, #0
+ 800789c:	61bb      	str	r3, [r7, #24]
 							}
 							temp_windows_stack=temp_windows_stack->up;              //往前扫描
- 80077f6:	69fb      	ldr	r3, [r7, #28]
- 80077f8:	681b      	ldr	r3, [r3, #0]
- 80077fa:	61fb      	str	r3, [r7, #28]
- 80077fc:	e001      	b.n	8007802 <UI_Server+0x156>
+ 800789e:	69fb      	ldr	r3, [r7, #28]
+ 80078a0:	681b      	ldr	r3, [r3, #0]
+ 80078a2:	61fb      	str	r3, [r7, #28]
+ 80078a4:	e001      	b.n	80078aa <UI_Server+0x15e>
 						}else
 						{
 							flag=0;                                                 //一个窗口都没有 直接结束循环
- 80077fe:	2300      	movs	r3, #0
- 8007800:	61bb      	str	r3, [r7, #24]
+ 80078a6:	2300      	movs	r3, #0
+ 80078a8:	61bb      	str	r3, [r7, #24]
 						}
 					}while(flag);
- 8007802:	69bb      	ldr	r3, [r7, #24]
- 8007804:	2b00      	cmp	r3, #0
- 8007806:	d18b      	bne.n	8007720 <UI_Server+0x74>
- 8007808:	e032      	b.n	8007870 <UI_Server+0x1c4>
+ 80078aa:	69bb      	ldr	r3, [r7, #24]
+ 80078ac:	2b00      	cmp	r3, #0
+ 80078ae:	d187      	bne.n	80077c0 <UI_Server+0x74>
+ 80078b0:	e032      	b.n	8007918 <UI_Server+0x1cc>
 				}
 
 			}else
 			{
 				temp_window=ui->moveed_windwos;
- 800780a:	687b      	ldr	r3, [r7, #4]
- 800780c:	695b      	ldr	r3, [r3, #20]
- 800780e:	60bb      	str	r3, [r7, #8]
-				temp_window->x=t_x-ui->move_x;
- 8007810:	693b      	ldr	r3, [r7, #16]
- 8007812:	b29a      	uxth	r2, r3
- 8007814:	687b      	ldr	r3, [r7, #4]
- 8007816:	699b      	ldr	r3, [r3, #24]
- 8007818:	b29b      	uxth	r3, r3
- 800781a:	1ad3      	subs	r3, r2, r3
- 800781c:	b29a      	uxth	r2, r3
- 800781e:	68bb      	ldr	r3, [r7, #8]
- 8007820:	801a      	strh	r2, [r3, #0]
-				temp_window->y=t_y-ui->move_y;
- 8007822:	68fb      	ldr	r3, [r7, #12]
- 8007824:	b29a      	uxth	r2, r3
- 8007826:	687b      	ldr	r3, [r7, #4]
- 8007828:	69db      	ldr	r3, [r3, #28]
- 800782a:	b29b      	uxth	r3, r3
- 800782c:	1ad3      	subs	r3, r2, r3
- 800782e:	b29a      	uxth	r2, r3
- 8007830:	68bb      	ldr	r3, [r7, #8]
- 8007832:	805a      	strh	r2, [r3, #2]
+ 80078b2:	687b      	ldr	r3, [r7, #4]
+ 80078b4:	695b      	ldr	r3, [r3, #20]
+ 80078b6:	60bb      	str	r3, [r7, #8]
+				temp_window->x=(t_x-ui->move_x);
+ 80078b8:	693b      	ldr	r3, [r7, #16]
+ 80078ba:	b29a      	uxth	r2, r3
+ 80078bc:	687b      	ldr	r3, [r7, #4]
+ 80078be:	699b      	ldr	r3, [r3, #24]
+ 80078c0:	b29b      	uxth	r3, r3
+ 80078c2:	1ad3      	subs	r3, r2, r3
+ 80078c4:	b29a      	uxth	r2, r3
+ 80078c6:	68bb      	ldr	r3, [r7, #8]
+ 80078c8:	801a      	strh	r2, [r3, #0]
+				temp_window->y=(t_y-ui->move_y);
+ 80078ca:	68fb      	ldr	r3, [r7, #12]
+ 80078cc:	b29a      	uxth	r2, r3
+ 80078ce:	687b      	ldr	r3, [r7, #4]
+ 80078d0:	69db      	ldr	r3, [r3, #28]
+ 80078d2:	b29b      	uxth	r3, r3
+ 80078d4:	1ad3      	subs	r3, r2, r3
+ 80078d6:	b29a      	uxth	r2, r3
+ 80078d8:	68bb      	ldr	r3, [r7, #8]
+ 80078da:	805a      	strh	r2, [r3, #2]
 				ui->refresh_ui_flag=1;
- 8007834:	687a      	ldr	r2, [r7, #4]
- 8007836:	f892 3020 	ldrb.w	r3, [r2, #32]
- 800783a:	f043 0304 	orr.w	r3, r3, #4
- 800783e:	f882 3020 	strb.w	r3, [r2, #32]
- 8007842:	e015      	b.n	8007870 <UI_Server+0x1c4>
+ 80078dc:	687a      	ldr	r2, [r7, #4]
+ 80078de:	f892 3020 	ldrb.w	r3, [r2, #32]
+ 80078e2:	f043 0304 	orr.w	r3, r3, #4
+ 80078e6:	f882 3020 	strb.w	r3, [r2, #32]
+ 80078ea:	e015      	b.n	8007918 <UI_Server+0x1cc>
 
 
 
 	}else
 	{
 		if(ui->First_click_flag==1)
- 8007844:	687b      	ldr	r3, [r7, #4]
- 8007846:	f893 3020 	ldrb.w	r3, [r3, #32]
- 800784a:	f003 0302 	and.w	r3, r3, #2
- 800784e:	b2db      	uxtb	r3, r3
- 8007850:	2b00      	cmp	r3, #0
- 8007852:	d006      	beq.n	8007862 <UI_Server+0x1b6>
+ 80078ec:	687b      	ldr	r3, [r7, #4]
+ 80078ee:	f893 3020 	ldrb.w	r3, [r3, #32]
+ 80078f2:	f003 0302 	and.w	r3, r3, #2
+ 80078f6:	b2db      	uxtb	r3, r3
+ 80078f8:	2b00      	cmp	r3, #0
+ 80078fa:	d006      	beq.n	800790a <UI_Server+0x1be>
 		{
 			ui->First_click_flag=0;
- 8007854:	687a      	ldr	r2, [r7, #4]
- 8007856:	f892 3020 	ldrb.w	r3, [r2, #32]
- 800785a:	f36f 0341 	bfc	r3, #1, #1
- 800785e:	f882 3020 	strb.w	r3, [r2, #32]
+ 80078fc:	687a      	ldr	r2, [r7, #4]
+ 80078fe:	f892 3020 	ldrb.w	r3, [r2, #32]
+ 8007902:	f36f 0341 	bfc	r3, #1, #1
+ 8007906:	f882 3020 	strb.w	r3, [r2, #32]
 		}
 		if(ui->moveed_windwos!=NULL)
- 8007862:	687b      	ldr	r3, [r7, #4]
- 8007864:	695b      	ldr	r3, [r3, #20]
- 8007866:	2b00      	cmp	r3, #0
- 8007868:	d002      	beq.n	8007870 <UI_Server+0x1c4>
+ 800790a:	687b      	ldr	r3, [r7, #4]
+ 800790c:	695b      	ldr	r3, [r3, #20]
+ 800790e:	2b00      	cmp	r3, #0
+ 8007910:	d002      	beq.n	8007918 <UI_Server+0x1cc>
 		{
 			ui->moveed_windwos=NULL;
- 800786a:	687b      	ldr	r3, [r7, #4]
- 800786c:	2200      	movs	r2, #0
- 800786e:	615a      	str	r2, [r3, #20]
+ 8007912:	687b      	ldr	r3, [r7, #4]
+ 8007914:	2200      	movs	r2, #0
+ 8007916:	615a      	str	r2, [r3, #20]
 		}
 
 
 	}
 	//display
 	if(ui->refresh_ui_flag==1)
- 8007870:	687b      	ldr	r3, [r7, #4]
- 8007872:	f893 3020 	ldrb.w	r3, [r3, #32]
- 8007876:	f003 0304 	and.w	r3, r3, #4
- 800787a:	b2db      	uxtb	r3, r3
- 800787c:	2b00      	cmp	r3, #0
- 800787e:	d009      	beq.n	8007894 <UI_Server+0x1e8>
+ 8007918:	687b      	ldr	r3, [r7, #4]
+ 800791a:	f893 3020 	ldrb.w	r3, [r3, #32]
+ 800791e:	f003 0304 	and.w	r3, r3, #4
+ 8007922:	b2db      	uxtb	r3, r3
+ 8007924:	2b00      	cmp	r3, #0
+ 8007926:	d009      	beq.n	800793c <UI_Server+0x1f0>
 	{
 		ui->refresh_ui_flag=0;
- 8007880:	687a      	ldr	r2, [r7, #4]
- 8007882:	f892 3020 	ldrb.w	r3, [r2, #32]
- 8007886:	f36f 0382 	bfc	r3, #2, #1
- 800788a:	f882 3020 	strb.w	r3, [r2, #32]
+ 8007928:	687a      	ldr	r2, [r7, #4]
+ 800792a:	f892 3020 	ldrb.w	r3, [r2, #32]
+ 800792e:	f36f 0382 	bfc	r3, #2, #1
+ 8007932:	f882 3020 	strb.w	r3, [r2, #32]
 		Refresh_UI(ui);
- 800788e:	6878      	ldr	r0, [r7, #4]
- 8007890:	f7ff fe53 	bl	800753a <Refresh_UI>
+ 8007936:	6878      	ldr	r0, [r7, #4]
+ 8007938:	f7ff fe50 	bl	80075dc <Refresh_UI>
 
 	}
 
 }
- 8007894:	bf00      	nop
- 8007896:	3720      	adds	r7, #32
- 8007898:	46bd      	mov	sp, r7
- 800789a:	bd80      	pop	{r7, pc}
- 800789c:	20000420 	.word	0x20000420
+ 800793c:	bf00      	nop
+ 800793e:	3720      	adds	r7, #32
+ 8007940:	46bd      	mov	sp, r7
+ 8007942:	bd80      	pop	{r7, pc}
+ 8007944:	200003dc 	.word	0x200003dc
 
-080078a0 <__errno>:
- 80078a0:	4b01      	ldr	r3, [pc, #4]	; (80078a8 <__errno+0x8>)
- 80078a2:	6818      	ldr	r0, [r3, #0]
- 80078a4:	4770      	bx	lr
- 80078a6:	bf00      	nop
- 80078a8:	2000000c 	.word	0x2000000c
+08007948 <malloc>:
+ 8007948:	4b02      	ldr	r3, [pc, #8]	; (8007954 <malloc+0xc>)
+ 800794a:	4601      	mov	r1, r0
+ 800794c:	6818      	ldr	r0, [r3, #0]
+ 800794e:	f000 b82b 	b.w	80079a8 <_malloc_r>
+ 8007952:	bf00      	nop
+ 8007954:	20000064 	.word	0x20000064
 
-080078ac <__libc_init_array>:
- 80078ac:	b570      	push	{r4, r5, r6, lr}
- 80078ae:	2600      	movs	r6, #0
- 80078b0:	4d0c      	ldr	r5, [pc, #48]	; (80078e4 <__libc_init_array+0x38>)
- 80078b2:	4c0d      	ldr	r4, [pc, #52]	; (80078e8 <__libc_init_array+0x3c>)
- 80078b4:	1b64      	subs	r4, r4, r5
- 80078b6:	10a4      	asrs	r4, r4, #2
- 80078b8:	42a6      	cmp	r6, r4
- 80078ba:	d109      	bne.n	80078d0 <__libc_init_array+0x24>
- 80078bc:	f002 fec4 	bl	800a648 <_init>
- 80078c0:	2600      	movs	r6, #0
- 80078c2:	4d0a      	ldr	r5, [pc, #40]	; (80078ec <__libc_init_array+0x40>)
- 80078c4:	4c0a      	ldr	r4, [pc, #40]	; (80078f0 <__libc_init_array+0x44>)
- 80078c6:	1b64      	subs	r4, r4, r5
- 80078c8:	10a4      	asrs	r4, r4, #2
- 80078ca:	42a6      	cmp	r6, r4
- 80078cc:	d105      	bne.n	80078da <__libc_init_array+0x2e>
- 80078ce:	bd70      	pop	{r4, r5, r6, pc}
- 80078d0:	f855 3b04 	ldr.w	r3, [r5], #4
- 80078d4:	4798      	blx	r3
- 80078d6:	3601      	adds	r6, #1
- 80078d8:	e7ee      	b.n	80078b8 <__libc_init_array+0xc>
- 80078da:	f855 3b04 	ldr.w	r3, [r5], #4
- 80078de:	4798      	blx	r3
- 80078e0:	3601      	adds	r6, #1
- 80078e2:	e7f2      	b.n	80078ca <__libc_init_array+0x1e>
- 80078e4:	0800b634 	.word	0x0800b634
- 80078e8:	0800b634 	.word	0x0800b634
- 80078ec:	0800b634 	.word	0x0800b634
- 80078f0:	0800b638 	.word	0x0800b638
+08007958 <free>:
+ 8007958:	4b02      	ldr	r3, [pc, #8]	; (8007964 <free+0xc>)
+ 800795a:	4601      	mov	r1, r0
+ 800795c:	6818      	ldr	r0, [r3, #0]
+ 800795e:	f001 bdd3 	b.w	8009508 <_free_r>
+ 8007962:	bf00      	nop
+ 8007964:	20000064 	.word	0x20000064
 
-080078f4 <malloc>:
- 80078f4:	4b02      	ldr	r3, [pc, #8]	; (8007900 <malloc+0xc>)
- 80078f6:	4601      	mov	r1, r0
- 80078f8:	6818      	ldr	r0, [r3, #0]
- 80078fa:	f000 b85f 	b.w	80079bc <_malloc_r>
- 80078fe:	bf00      	nop
- 8007900:	2000000c 	.word	0x2000000c
+08007968 <sbrk_aligned>:
+ 8007968:	b570      	push	{r4, r5, r6, lr}
+ 800796a:	4e0e      	ldr	r6, [pc, #56]	; (80079a4 <sbrk_aligned+0x3c>)
+ 800796c:	460c      	mov	r4, r1
+ 800796e:	6831      	ldr	r1, [r6, #0]
+ 8007970:	4605      	mov	r5, r0
+ 8007972:	b911      	cbnz	r1, 800797a <sbrk_aligned+0x12>
+ 8007974:	f000 fefc 	bl	8008770 <_sbrk_r>
+ 8007978:	6030      	str	r0, [r6, #0]
+ 800797a:	4621      	mov	r1, r4
+ 800797c:	4628      	mov	r0, r5
+ 800797e:	f000 fef7 	bl	8008770 <_sbrk_r>
+ 8007982:	1c43      	adds	r3, r0, #1
+ 8007984:	d00a      	beq.n	800799c <sbrk_aligned+0x34>
+ 8007986:	1cc4      	adds	r4, r0, #3
+ 8007988:	f024 0403 	bic.w	r4, r4, #3
+ 800798c:	42a0      	cmp	r0, r4
+ 800798e:	d007      	beq.n	80079a0 <sbrk_aligned+0x38>
+ 8007990:	1a21      	subs	r1, r4, r0
+ 8007992:	4628      	mov	r0, r5
+ 8007994:	f000 feec 	bl	8008770 <_sbrk_r>
+ 8007998:	3001      	adds	r0, #1
+ 800799a:	d101      	bne.n	80079a0 <sbrk_aligned+0x38>
+ 800799c:	f04f 34ff 	mov.w	r4, #4294967295
+ 80079a0:	4620      	mov	r0, r4
+ 80079a2:	bd70      	pop	{r4, r5, r6, pc}
+ 80079a4:	200025bc 	.word	0x200025bc
 
-08007904 <free>:
- 8007904:	4b02      	ldr	r3, [pc, #8]	; (8007910 <free+0xc>)
- 8007906:	4601      	mov	r1, r0
- 8007908:	6818      	ldr	r0, [r3, #0]
- 800790a:	f000 b80b 	b.w	8007924 <_free_r>
- 800790e:	bf00      	nop
- 8007910:	2000000c 	.word	0x2000000c
+080079a8 <_malloc_r>:
+ 80079a8:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
+ 80079ac:	1ccd      	adds	r5, r1, #3
+ 80079ae:	f025 0503 	bic.w	r5, r5, #3
+ 80079b2:	3508      	adds	r5, #8
+ 80079b4:	2d0c      	cmp	r5, #12
+ 80079b6:	bf38      	it	cc
+ 80079b8:	250c      	movcc	r5, #12
+ 80079ba:	2d00      	cmp	r5, #0
+ 80079bc:	4607      	mov	r7, r0
+ 80079be:	db01      	blt.n	80079c4 <_malloc_r+0x1c>
+ 80079c0:	42a9      	cmp	r1, r5
+ 80079c2:	d905      	bls.n	80079d0 <_malloc_r+0x28>
+ 80079c4:	230c      	movs	r3, #12
+ 80079c6:	2600      	movs	r6, #0
+ 80079c8:	603b      	str	r3, [r7, #0]
+ 80079ca:	4630      	mov	r0, r6
+ 80079cc:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
+ 80079d0:	f8df 80d0 	ldr.w	r8, [pc, #208]	; 8007aa4 <_malloc_r+0xfc>
+ 80079d4:	f000 f868 	bl	8007aa8 <__malloc_lock>
+ 80079d8:	f8d8 3000 	ldr.w	r3, [r8]
+ 80079dc:	461c      	mov	r4, r3
+ 80079de:	bb5c      	cbnz	r4, 8007a38 <_malloc_r+0x90>
+ 80079e0:	4629      	mov	r1, r5
+ 80079e2:	4638      	mov	r0, r7
+ 80079e4:	f7ff ffc0 	bl	8007968 <sbrk_aligned>
+ 80079e8:	1c43      	adds	r3, r0, #1
+ 80079ea:	4604      	mov	r4, r0
+ 80079ec:	d155      	bne.n	8007a9a <_malloc_r+0xf2>
+ 80079ee:	f8d8 4000 	ldr.w	r4, [r8]
+ 80079f2:	4626      	mov	r6, r4
+ 80079f4:	2e00      	cmp	r6, #0
+ 80079f6:	d145      	bne.n	8007a84 <_malloc_r+0xdc>
+ 80079f8:	2c00      	cmp	r4, #0
+ 80079fa:	d048      	beq.n	8007a8e <_malloc_r+0xe6>
+ 80079fc:	6823      	ldr	r3, [r4, #0]
+ 80079fe:	4631      	mov	r1, r6
+ 8007a00:	4638      	mov	r0, r7
+ 8007a02:	eb04 0903 	add.w	r9, r4, r3
+ 8007a06:	f000 feb3 	bl	8008770 <_sbrk_r>
+ 8007a0a:	4581      	cmp	r9, r0
+ 8007a0c:	d13f      	bne.n	8007a8e <_malloc_r+0xe6>
+ 8007a0e:	6821      	ldr	r1, [r4, #0]
+ 8007a10:	4638      	mov	r0, r7
+ 8007a12:	1a6d      	subs	r5, r5, r1
+ 8007a14:	4629      	mov	r1, r5
+ 8007a16:	f7ff ffa7 	bl	8007968 <sbrk_aligned>
+ 8007a1a:	3001      	adds	r0, #1
+ 8007a1c:	d037      	beq.n	8007a8e <_malloc_r+0xe6>
+ 8007a1e:	6823      	ldr	r3, [r4, #0]
+ 8007a20:	442b      	add	r3, r5
+ 8007a22:	6023      	str	r3, [r4, #0]
+ 8007a24:	f8d8 3000 	ldr.w	r3, [r8]
+ 8007a28:	2b00      	cmp	r3, #0
+ 8007a2a:	d038      	beq.n	8007a9e <_malloc_r+0xf6>
+ 8007a2c:	685a      	ldr	r2, [r3, #4]
+ 8007a2e:	42a2      	cmp	r2, r4
+ 8007a30:	d12b      	bne.n	8007a8a <_malloc_r+0xe2>
+ 8007a32:	2200      	movs	r2, #0
+ 8007a34:	605a      	str	r2, [r3, #4]
+ 8007a36:	e00f      	b.n	8007a58 <_malloc_r+0xb0>
+ 8007a38:	6822      	ldr	r2, [r4, #0]
+ 8007a3a:	1b52      	subs	r2, r2, r5
+ 8007a3c:	d41f      	bmi.n	8007a7e <_malloc_r+0xd6>
+ 8007a3e:	2a0b      	cmp	r2, #11
+ 8007a40:	d917      	bls.n	8007a72 <_malloc_r+0xca>
+ 8007a42:	1961      	adds	r1, r4, r5
+ 8007a44:	42a3      	cmp	r3, r4
+ 8007a46:	6025      	str	r5, [r4, #0]
+ 8007a48:	bf18      	it	ne
+ 8007a4a:	6059      	strne	r1, [r3, #4]
+ 8007a4c:	6863      	ldr	r3, [r4, #4]
+ 8007a4e:	bf08      	it	eq
+ 8007a50:	f8c8 1000 	streq.w	r1, [r8]
+ 8007a54:	5162      	str	r2, [r4, r5]
+ 8007a56:	604b      	str	r3, [r1, #4]
+ 8007a58:	4638      	mov	r0, r7
+ 8007a5a:	f104 060b 	add.w	r6, r4, #11
+ 8007a5e:	f000 f829 	bl	8007ab4 <__malloc_unlock>
+ 8007a62:	f026 0607 	bic.w	r6, r6, #7
+ 8007a66:	1d23      	adds	r3, r4, #4
+ 8007a68:	1af2      	subs	r2, r6, r3
+ 8007a6a:	d0ae      	beq.n	80079ca <_malloc_r+0x22>
+ 8007a6c:	1b9b      	subs	r3, r3, r6
+ 8007a6e:	50a3      	str	r3, [r4, r2]
+ 8007a70:	e7ab      	b.n	80079ca <_malloc_r+0x22>
+ 8007a72:	42a3      	cmp	r3, r4
+ 8007a74:	6862      	ldr	r2, [r4, #4]
+ 8007a76:	d1dd      	bne.n	8007a34 <_malloc_r+0x8c>
+ 8007a78:	f8c8 2000 	str.w	r2, [r8]
+ 8007a7c:	e7ec      	b.n	8007a58 <_malloc_r+0xb0>
+ 8007a7e:	4623      	mov	r3, r4
+ 8007a80:	6864      	ldr	r4, [r4, #4]
+ 8007a82:	e7ac      	b.n	80079de <_malloc_r+0x36>
+ 8007a84:	4634      	mov	r4, r6
+ 8007a86:	6876      	ldr	r6, [r6, #4]
+ 8007a88:	e7b4      	b.n	80079f4 <_malloc_r+0x4c>
+ 8007a8a:	4613      	mov	r3, r2
+ 8007a8c:	e7cc      	b.n	8007a28 <_malloc_r+0x80>
+ 8007a8e:	230c      	movs	r3, #12
+ 8007a90:	4638      	mov	r0, r7
+ 8007a92:	603b      	str	r3, [r7, #0]
+ 8007a94:	f000 f80e 	bl	8007ab4 <__malloc_unlock>
+ 8007a98:	e797      	b.n	80079ca <_malloc_r+0x22>
+ 8007a9a:	6025      	str	r5, [r4, #0]
+ 8007a9c:	e7dc      	b.n	8007a58 <_malloc_r+0xb0>
+ 8007a9e:	605b      	str	r3, [r3, #4]
+ 8007aa0:	deff      	udf	#255	; 0xff
+ 8007aa2:	bf00      	nop
+ 8007aa4:	200025b8 	.word	0x200025b8
 
-08007914 <memset>:
- 8007914:	4603      	mov	r3, r0
- 8007916:	4402      	add	r2, r0
- 8007918:	4293      	cmp	r3, r2
- 800791a:	d100      	bne.n	800791e <memset+0xa>
- 800791c:	4770      	bx	lr
- 800791e:	f803 1b01 	strb.w	r1, [r3], #1
- 8007922:	e7f9      	b.n	8007918 <memset+0x4>
+08007aa8 <__malloc_lock>:
+ 8007aa8:	4801      	ldr	r0, [pc, #4]	; (8007ab0 <__malloc_lock+0x8>)
+ 8007aaa:	f000 beae 	b.w	800880a <__retarget_lock_acquire_recursive>
+ 8007aae:	bf00      	nop
+ 8007ab0:	20002700 	.word	0x20002700
 
-08007924 <_free_r>:
- 8007924:	b538      	push	{r3, r4, r5, lr}
- 8007926:	4605      	mov	r5, r0
- 8007928:	2900      	cmp	r1, #0
- 800792a:	d043      	beq.n	80079b4 <_free_r+0x90>
- 800792c:	f851 3c04 	ldr.w	r3, [r1, #-4]
- 8007930:	1f0c      	subs	r4, r1, #4
- 8007932:	2b00      	cmp	r3, #0
- 8007934:	bfb8      	it	lt
- 8007936:	18e4      	addlt	r4, r4, r3
- 8007938:	f001 fea8 	bl	800968c <__malloc_lock>
- 800793c:	4a1e      	ldr	r2, [pc, #120]	; (80079b8 <_free_r+0x94>)
- 800793e:	6813      	ldr	r3, [r2, #0]
- 8007940:	4610      	mov	r0, r2
- 8007942:	b933      	cbnz	r3, 8007952 <_free_r+0x2e>
- 8007944:	6063      	str	r3, [r4, #4]
- 8007946:	6014      	str	r4, [r2, #0]
- 8007948:	4628      	mov	r0, r5
- 800794a:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
- 800794e:	f001 bea3 	b.w	8009698 <__malloc_unlock>
- 8007952:	42a3      	cmp	r3, r4
- 8007954:	d90a      	bls.n	800796c <_free_r+0x48>
- 8007956:	6821      	ldr	r1, [r4, #0]
- 8007958:	1862      	adds	r2, r4, r1
- 800795a:	4293      	cmp	r3, r2
- 800795c:	bf01      	itttt	eq
- 800795e:	681a      	ldreq	r2, [r3, #0]
- 8007960:	685b      	ldreq	r3, [r3, #4]
- 8007962:	1852      	addeq	r2, r2, r1
- 8007964:	6022      	streq	r2, [r4, #0]
- 8007966:	6063      	str	r3, [r4, #4]
- 8007968:	6004      	str	r4, [r0, #0]
- 800796a:	e7ed      	b.n	8007948 <_free_r+0x24>
- 800796c:	461a      	mov	r2, r3
- 800796e:	685b      	ldr	r3, [r3, #4]
- 8007970:	b10b      	cbz	r3, 8007976 <_free_r+0x52>
- 8007972:	42a3      	cmp	r3, r4
- 8007974:	d9fa      	bls.n	800796c <_free_r+0x48>
- 8007976:	6811      	ldr	r1, [r2, #0]
- 8007978:	1850      	adds	r0, r2, r1
- 800797a:	42a0      	cmp	r0, r4
- 800797c:	d10b      	bne.n	8007996 <_free_r+0x72>
- 800797e:	6820      	ldr	r0, [r4, #0]
- 8007980:	4401      	add	r1, r0
- 8007982:	1850      	adds	r0, r2, r1
- 8007984:	4283      	cmp	r3, r0
- 8007986:	6011      	str	r1, [r2, #0]
- 8007988:	d1de      	bne.n	8007948 <_free_r+0x24>
- 800798a:	6818      	ldr	r0, [r3, #0]
- 800798c:	685b      	ldr	r3, [r3, #4]
- 800798e:	4401      	add	r1, r0
- 8007990:	6011      	str	r1, [r2, #0]
- 8007992:	6053      	str	r3, [r2, #4]
- 8007994:	e7d8      	b.n	8007948 <_free_r+0x24>
- 8007996:	d902      	bls.n	800799e <_free_r+0x7a>
- 8007998:	230c      	movs	r3, #12
- 800799a:	602b      	str	r3, [r5, #0]
- 800799c:	e7d4      	b.n	8007948 <_free_r+0x24>
- 800799e:	6820      	ldr	r0, [r4, #0]
- 80079a0:	1821      	adds	r1, r4, r0
- 80079a2:	428b      	cmp	r3, r1
- 80079a4:	bf01      	itttt	eq
- 80079a6:	6819      	ldreq	r1, [r3, #0]
- 80079a8:	685b      	ldreq	r3, [r3, #4]
- 80079aa:	1809      	addeq	r1, r1, r0
- 80079ac:	6021      	streq	r1, [r4, #0]
- 80079ae:	6063      	str	r3, [r4, #4]
- 80079b0:	6054      	str	r4, [r2, #4]
- 80079b2:	e7c9      	b.n	8007948 <_free_r+0x24>
- 80079b4:	bd38      	pop	{r3, r4, r5, pc}
- 80079b6:	bf00      	nop
- 80079b8:	20000224 	.word	0x20000224
+08007ab4 <__malloc_unlock>:
+ 8007ab4:	4801      	ldr	r0, [pc, #4]	; (8007abc <__malloc_unlock+0x8>)
+ 8007ab6:	f000 bea9 	b.w	800880c <__retarget_lock_release_recursive>
+ 8007aba:	bf00      	nop
+ 8007abc:	20002700 	.word	0x20002700
 
-080079bc <_malloc_r>:
- 80079bc:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 80079be:	1ccd      	adds	r5, r1, #3
- 80079c0:	f025 0503 	bic.w	r5, r5, #3
- 80079c4:	3508      	adds	r5, #8
- 80079c6:	2d0c      	cmp	r5, #12
- 80079c8:	bf38      	it	cc
- 80079ca:	250c      	movcc	r5, #12
- 80079cc:	2d00      	cmp	r5, #0
- 80079ce:	4606      	mov	r6, r0
- 80079d0:	db01      	blt.n	80079d6 <_malloc_r+0x1a>
- 80079d2:	42a9      	cmp	r1, r5
- 80079d4:	d903      	bls.n	80079de <_malloc_r+0x22>
- 80079d6:	230c      	movs	r3, #12
- 80079d8:	6033      	str	r3, [r6, #0]
- 80079da:	2000      	movs	r0, #0
- 80079dc:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
- 80079de:	f001 fe55 	bl	800968c <__malloc_lock>
- 80079e2:	4921      	ldr	r1, [pc, #132]	; (8007a68 <_malloc_r+0xac>)
- 80079e4:	680a      	ldr	r2, [r1, #0]
- 80079e6:	4614      	mov	r4, r2
- 80079e8:	b99c      	cbnz	r4, 8007a12 <_malloc_r+0x56>
- 80079ea:	4f20      	ldr	r7, [pc, #128]	; (8007a6c <_malloc_r+0xb0>)
- 80079ec:	683b      	ldr	r3, [r7, #0]
- 80079ee:	b923      	cbnz	r3, 80079fa <_malloc_r+0x3e>
- 80079f0:	4621      	mov	r1, r4
- 80079f2:	4630      	mov	r0, r6
- 80079f4:	f000 fc9c 	bl	8008330 <_sbrk_r>
- 80079f8:	6038      	str	r0, [r7, #0]
- 80079fa:	4629      	mov	r1, r5
- 80079fc:	4630      	mov	r0, r6
- 80079fe:	f000 fc97 	bl	8008330 <_sbrk_r>
- 8007a02:	1c43      	adds	r3, r0, #1
- 8007a04:	d123      	bne.n	8007a4e <_malloc_r+0x92>
- 8007a06:	230c      	movs	r3, #12
- 8007a08:	4630      	mov	r0, r6
- 8007a0a:	6033      	str	r3, [r6, #0]
- 8007a0c:	f001 fe44 	bl	8009698 <__malloc_unlock>
- 8007a10:	e7e3      	b.n	80079da <_malloc_r+0x1e>
- 8007a12:	6823      	ldr	r3, [r4, #0]
- 8007a14:	1b5b      	subs	r3, r3, r5
- 8007a16:	d417      	bmi.n	8007a48 <_malloc_r+0x8c>
- 8007a18:	2b0b      	cmp	r3, #11
- 8007a1a:	d903      	bls.n	8007a24 <_malloc_r+0x68>
- 8007a1c:	6023      	str	r3, [r4, #0]
- 8007a1e:	441c      	add	r4, r3
- 8007a20:	6025      	str	r5, [r4, #0]
- 8007a22:	e004      	b.n	8007a2e <_malloc_r+0x72>
- 8007a24:	6863      	ldr	r3, [r4, #4]
- 8007a26:	42a2      	cmp	r2, r4
- 8007a28:	bf0c      	ite	eq
- 8007a2a:	600b      	streq	r3, [r1, #0]
- 8007a2c:	6053      	strne	r3, [r2, #4]
- 8007a2e:	4630      	mov	r0, r6
- 8007a30:	f001 fe32 	bl	8009698 <__malloc_unlock>
- 8007a34:	f104 000b 	add.w	r0, r4, #11
- 8007a38:	1d23      	adds	r3, r4, #4
- 8007a3a:	f020 0007 	bic.w	r0, r0, #7
- 8007a3e:	1ac2      	subs	r2, r0, r3
- 8007a40:	d0cc      	beq.n	80079dc <_malloc_r+0x20>
- 8007a42:	1a1b      	subs	r3, r3, r0
- 8007a44:	50a3      	str	r3, [r4, r2]
- 8007a46:	e7c9      	b.n	80079dc <_malloc_r+0x20>
- 8007a48:	4622      	mov	r2, r4
- 8007a4a:	6864      	ldr	r4, [r4, #4]
- 8007a4c:	e7cc      	b.n	80079e8 <_malloc_r+0x2c>
- 8007a4e:	1cc4      	adds	r4, r0, #3
- 8007a50:	f024 0403 	bic.w	r4, r4, #3
- 8007a54:	42a0      	cmp	r0, r4
- 8007a56:	d0e3      	beq.n	8007a20 <_malloc_r+0x64>
- 8007a58:	1a21      	subs	r1, r4, r0
- 8007a5a:	4630      	mov	r0, r6
- 8007a5c:	f000 fc68 	bl	8008330 <_sbrk_r>
- 8007a60:	3001      	adds	r0, #1
- 8007a62:	d1dd      	bne.n	8007a20 <_malloc_r+0x64>
- 8007a64:	e7cf      	b.n	8007a06 <_malloc_r+0x4a>
- 8007a66:	bf00      	nop
- 8007a68:	20000224 	.word	0x20000224
- 8007a6c:	20000228 	.word	0x20000228
+08007ac0 <__cvt>:
+ 8007ac0:	2b00      	cmp	r3, #0
+ 8007ac2:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+ 8007ac6:	461f      	mov	r7, r3
+ 8007ac8:	bfbb      	ittet	lt
+ 8007aca:	f103 4300 	addlt.w	r3, r3, #2147483648	; 0x80000000
+ 8007ace:	461f      	movlt	r7, r3
+ 8007ad0:	2300      	movge	r3, #0
+ 8007ad2:	232d      	movlt	r3, #45	; 0x2d
+ 8007ad4:	b088      	sub	sp, #32
+ 8007ad6:	4614      	mov	r4, r2
+ 8007ad8:	9a12      	ldr	r2, [sp, #72]	; 0x48
+ 8007ada:	9d10      	ldr	r5, [sp, #64]	; 0x40
+ 8007adc:	7013      	strb	r3, [r2, #0]
+ 8007ade:	9b14      	ldr	r3, [sp, #80]	; 0x50
+ 8007ae0:	f8dd a04c 	ldr.w	sl, [sp, #76]	; 0x4c
+ 8007ae4:	f023 0820 	bic.w	r8, r3, #32
+ 8007ae8:	f1b8 0f46 	cmp.w	r8, #70	; 0x46
+ 8007aec:	d005      	beq.n	8007afa <__cvt+0x3a>
+ 8007aee:	f1b8 0f45 	cmp.w	r8, #69	; 0x45
+ 8007af2:	d100      	bne.n	8007af6 <__cvt+0x36>
+ 8007af4:	3501      	adds	r5, #1
+ 8007af6:	2302      	movs	r3, #2
+ 8007af8:	e000      	b.n	8007afc <__cvt+0x3c>
+ 8007afa:	2303      	movs	r3, #3
+ 8007afc:	aa07      	add	r2, sp, #28
+ 8007afe:	9204      	str	r2, [sp, #16]
+ 8007b00:	aa06      	add	r2, sp, #24
+ 8007b02:	e9cd a202 	strd	sl, r2, [sp, #8]
+ 8007b06:	e9cd 3500 	strd	r3, r5, [sp]
+ 8007b0a:	4622      	mov	r2, r4
+ 8007b0c:	463b      	mov	r3, r7
+ 8007b0e:	f000 ff17 	bl	8008940 <_dtoa_r>
+ 8007b12:	f1b8 0f47 	cmp.w	r8, #71	; 0x47
+ 8007b16:	4606      	mov	r6, r0
+ 8007b18:	d102      	bne.n	8007b20 <__cvt+0x60>
+ 8007b1a:	9b11      	ldr	r3, [sp, #68]	; 0x44
+ 8007b1c:	07db      	lsls	r3, r3, #31
+ 8007b1e:	d522      	bpl.n	8007b66 <__cvt+0xa6>
+ 8007b20:	f1b8 0f46 	cmp.w	r8, #70	; 0x46
+ 8007b24:	eb06 0905 	add.w	r9, r6, r5
+ 8007b28:	d110      	bne.n	8007b4c <__cvt+0x8c>
+ 8007b2a:	7833      	ldrb	r3, [r6, #0]
+ 8007b2c:	2b30      	cmp	r3, #48	; 0x30
+ 8007b2e:	d10a      	bne.n	8007b46 <__cvt+0x86>
+ 8007b30:	2200      	movs	r2, #0
+ 8007b32:	2300      	movs	r3, #0
+ 8007b34:	4620      	mov	r0, r4
+ 8007b36:	4639      	mov	r1, r7
+ 8007b38:	f7f8 ffa2 	bl	8000a80 <__aeabi_dcmpeq>
+ 8007b3c:	b918      	cbnz	r0, 8007b46 <__cvt+0x86>
+ 8007b3e:	f1c5 0501 	rsb	r5, r5, #1
+ 8007b42:	f8ca 5000 	str.w	r5, [sl]
+ 8007b46:	f8da 3000 	ldr.w	r3, [sl]
+ 8007b4a:	4499      	add	r9, r3
+ 8007b4c:	2200      	movs	r2, #0
+ 8007b4e:	2300      	movs	r3, #0
+ 8007b50:	4620      	mov	r0, r4
+ 8007b52:	4639      	mov	r1, r7
+ 8007b54:	f7f8 ff94 	bl	8000a80 <__aeabi_dcmpeq>
+ 8007b58:	b108      	cbz	r0, 8007b5e <__cvt+0x9e>
+ 8007b5a:	f8cd 901c 	str.w	r9, [sp, #28]
+ 8007b5e:	2230      	movs	r2, #48	; 0x30
+ 8007b60:	9b07      	ldr	r3, [sp, #28]
+ 8007b62:	454b      	cmp	r3, r9
+ 8007b64:	d307      	bcc.n	8007b76 <__cvt+0xb6>
+ 8007b66:	4630      	mov	r0, r6
+ 8007b68:	9b07      	ldr	r3, [sp, #28]
+ 8007b6a:	9a15      	ldr	r2, [sp, #84]	; 0x54
+ 8007b6c:	1b9b      	subs	r3, r3, r6
+ 8007b6e:	6013      	str	r3, [r2, #0]
+ 8007b70:	b008      	add	sp, #32
+ 8007b72:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 8007b76:	1c59      	adds	r1, r3, #1
+ 8007b78:	9107      	str	r1, [sp, #28]
+ 8007b7a:	701a      	strb	r2, [r3, #0]
+ 8007b7c:	e7f0      	b.n	8007b60 <__cvt+0xa0>
 
-08007a70 <__cvt>:
- 8007a70:	2b00      	cmp	r3, #0
- 8007a72:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8007a76:	461f      	mov	r7, r3
- 8007a78:	bfbb      	ittet	lt
- 8007a7a:	f103 4300 	addlt.w	r3, r3, #2147483648	; 0x80000000
- 8007a7e:	461f      	movlt	r7, r3
- 8007a80:	2300      	movge	r3, #0
- 8007a82:	232d      	movlt	r3, #45	; 0x2d
- 8007a84:	b088      	sub	sp, #32
- 8007a86:	4614      	mov	r4, r2
- 8007a88:	9a12      	ldr	r2, [sp, #72]	; 0x48
- 8007a8a:	9d10      	ldr	r5, [sp, #64]	; 0x40
- 8007a8c:	7013      	strb	r3, [r2, #0]
- 8007a8e:	9b14      	ldr	r3, [sp, #80]	; 0x50
- 8007a90:	f8dd a04c 	ldr.w	sl, [sp, #76]	; 0x4c
- 8007a94:	f023 0820 	bic.w	r8, r3, #32
- 8007a98:	f1b8 0f46 	cmp.w	r8, #70	; 0x46
- 8007a9c:	d005      	beq.n	8007aaa <__cvt+0x3a>
- 8007a9e:	f1b8 0f45 	cmp.w	r8, #69	; 0x45
- 8007aa2:	d100      	bne.n	8007aa6 <__cvt+0x36>
- 8007aa4:	3501      	adds	r5, #1
- 8007aa6:	2302      	movs	r3, #2
- 8007aa8:	e000      	b.n	8007aac <__cvt+0x3c>
- 8007aaa:	2303      	movs	r3, #3
- 8007aac:	aa07      	add	r2, sp, #28
- 8007aae:	9204      	str	r2, [sp, #16]
- 8007ab0:	aa06      	add	r2, sp, #24
- 8007ab2:	e9cd a202 	strd	sl, r2, [sp, #8]
- 8007ab6:	e9cd 3500 	strd	r3, r5, [sp]
- 8007aba:	4622      	mov	r2, r4
- 8007abc:	463b      	mov	r3, r7
- 8007abe:	f000 fdb7 	bl	8008630 <_dtoa_r>
- 8007ac2:	f1b8 0f47 	cmp.w	r8, #71	; 0x47
- 8007ac6:	4606      	mov	r6, r0
- 8007ac8:	d102      	bne.n	8007ad0 <__cvt+0x60>
- 8007aca:	9b11      	ldr	r3, [sp, #68]	; 0x44
- 8007acc:	07db      	lsls	r3, r3, #31
- 8007ace:	d522      	bpl.n	8007b16 <__cvt+0xa6>
- 8007ad0:	f1b8 0f46 	cmp.w	r8, #70	; 0x46
- 8007ad4:	eb06 0905 	add.w	r9, r6, r5
- 8007ad8:	d110      	bne.n	8007afc <__cvt+0x8c>
- 8007ada:	7833      	ldrb	r3, [r6, #0]
- 8007adc:	2b30      	cmp	r3, #48	; 0x30
- 8007ade:	d10a      	bne.n	8007af6 <__cvt+0x86>
- 8007ae0:	2200      	movs	r2, #0
- 8007ae2:	2300      	movs	r3, #0
- 8007ae4:	4620      	mov	r0, r4
- 8007ae6:	4639      	mov	r1, r7
- 8007ae8:	f7f8 ffca 	bl	8000a80 <__aeabi_dcmpeq>
- 8007aec:	b918      	cbnz	r0, 8007af6 <__cvt+0x86>
- 8007aee:	f1c5 0501 	rsb	r5, r5, #1
- 8007af2:	f8ca 5000 	str.w	r5, [sl]
- 8007af6:	f8da 3000 	ldr.w	r3, [sl]
- 8007afa:	4499      	add	r9, r3
- 8007afc:	2200      	movs	r2, #0
- 8007afe:	2300      	movs	r3, #0
- 8007b00:	4620      	mov	r0, r4
- 8007b02:	4639      	mov	r1, r7
- 8007b04:	f7f8 ffbc 	bl	8000a80 <__aeabi_dcmpeq>
- 8007b08:	b108      	cbz	r0, 8007b0e <__cvt+0x9e>
- 8007b0a:	f8cd 901c 	str.w	r9, [sp, #28]
- 8007b0e:	2230      	movs	r2, #48	; 0x30
- 8007b10:	9b07      	ldr	r3, [sp, #28]
- 8007b12:	454b      	cmp	r3, r9
- 8007b14:	d307      	bcc.n	8007b26 <__cvt+0xb6>
- 8007b16:	4630      	mov	r0, r6
- 8007b18:	9b07      	ldr	r3, [sp, #28]
- 8007b1a:	9a15      	ldr	r2, [sp, #84]	; 0x54
- 8007b1c:	1b9b      	subs	r3, r3, r6
- 8007b1e:	6013      	str	r3, [r2, #0]
- 8007b20:	b008      	add	sp, #32
- 8007b22:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 8007b26:	1c59      	adds	r1, r3, #1
- 8007b28:	9107      	str	r1, [sp, #28]
- 8007b2a:	701a      	strb	r2, [r3, #0]
- 8007b2c:	e7f0      	b.n	8007b10 <__cvt+0xa0>
+08007b7e <__exponent>:
+ 8007b7e:	4603      	mov	r3, r0
+ 8007b80:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+ 8007b82:	2900      	cmp	r1, #0
+ 8007b84:	f803 2b02 	strb.w	r2, [r3], #2
+ 8007b88:	bfb6      	itet	lt
+ 8007b8a:	222d      	movlt	r2, #45	; 0x2d
+ 8007b8c:	222b      	movge	r2, #43	; 0x2b
+ 8007b8e:	4249      	neglt	r1, r1
+ 8007b90:	2909      	cmp	r1, #9
+ 8007b92:	7042      	strb	r2, [r0, #1]
+ 8007b94:	dd2a      	ble.n	8007bec <__exponent+0x6e>
+ 8007b96:	f10d 0207 	add.w	r2, sp, #7
+ 8007b9a:	4617      	mov	r7, r2
+ 8007b9c:	260a      	movs	r6, #10
+ 8007b9e:	fb91 f5f6 	sdiv	r5, r1, r6
+ 8007ba2:	4694      	mov	ip, r2
+ 8007ba4:	fb06 1415 	mls	r4, r6, r5, r1
+ 8007ba8:	3430      	adds	r4, #48	; 0x30
+ 8007baa:	f80c 4c01 	strb.w	r4, [ip, #-1]
+ 8007bae:	460c      	mov	r4, r1
+ 8007bb0:	2c63      	cmp	r4, #99	; 0x63
+ 8007bb2:	4629      	mov	r1, r5
+ 8007bb4:	f102 32ff 	add.w	r2, r2, #4294967295
+ 8007bb8:	dcf1      	bgt.n	8007b9e <__exponent+0x20>
+ 8007bba:	3130      	adds	r1, #48	; 0x30
+ 8007bbc:	f1ac 0402 	sub.w	r4, ip, #2
+ 8007bc0:	f802 1c01 	strb.w	r1, [r2, #-1]
+ 8007bc4:	4622      	mov	r2, r4
+ 8007bc6:	1c41      	adds	r1, r0, #1
+ 8007bc8:	42ba      	cmp	r2, r7
+ 8007bca:	d30a      	bcc.n	8007be2 <__exponent+0x64>
+ 8007bcc:	f10d 0209 	add.w	r2, sp, #9
+ 8007bd0:	eba2 020c 	sub.w	r2, r2, ip
+ 8007bd4:	42bc      	cmp	r4, r7
+ 8007bd6:	bf88      	it	hi
+ 8007bd8:	2200      	movhi	r2, #0
+ 8007bda:	4413      	add	r3, r2
+ 8007bdc:	1a18      	subs	r0, r3, r0
+ 8007bde:	b003      	add	sp, #12
+ 8007be0:	bdf0      	pop	{r4, r5, r6, r7, pc}
+ 8007be2:	f812 5b01 	ldrb.w	r5, [r2], #1
+ 8007be6:	f801 5f01 	strb.w	r5, [r1, #1]!
+ 8007bea:	e7ed      	b.n	8007bc8 <__exponent+0x4a>
+ 8007bec:	2330      	movs	r3, #48	; 0x30
+ 8007bee:	3130      	adds	r1, #48	; 0x30
+ 8007bf0:	7083      	strb	r3, [r0, #2]
+ 8007bf2:	70c1      	strb	r1, [r0, #3]
+ 8007bf4:	1d03      	adds	r3, r0, #4
+ 8007bf6:	e7f1      	b.n	8007bdc <__exponent+0x5e>
 
-08007b2e <__exponent>:
- 8007b2e:	4603      	mov	r3, r0
- 8007b30:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
- 8007b32:	2900      	cmp	r1, #0
- 8007b34:	f803 2b02 	strb.w	r2, [r3], #2
- 8007b38:	bfb6      	itet	lt
- 8007b3a:	222d      	movlt	r2, #45	; 0x2d
- 8007b3c:	222b      	movge	r2, #43	; 0x2b
- 8007b3e:	4249      	neglt	r1, r1
- 8007b40:	2909      	cmp	r1, #9
- 8007b42:	7042      	strb	r2, [r0, #1]
- 8007b44:	dd2b      	ble.n	8007b9e <__exponent+0x70>
- 8007b46:	f10d 0407 	add.w	r4, sp, #7
- 8007b4a:	46a4      	mov	ip, r4
- 8007b4c:	270a      	movs	r7, #10
- 8007b4e:	fb91 f6f7 	sdiv	r6, r1, r7
- 8007b52:	460a      	mov	r2, r1
- 8007b54:	46a6      	mov	lr, r4
- 8007b56:	fb07 1516 	mls	r5, r7, r6, r1
- 8007b5a:	2a63      	cmp	r2, #99	; 0x63
- 8007b5c:	f105 0530 	add.w	r5, r5, #48	; 0x30
- 8007b60:	4631      	mov	r1, r6
- 8007b62:	f104 34ff 	add.w	r4, r4, #4294967295
- 8007b66:	f80e 5c01 	strb.w	r5, [lr, #-1]
- 8007b6a:	dcf0      	bgt.n	8007b4e <__exponent+0x20>
- 8007b6c:	3130      	adds	r1, #48	; 0x30
- 8007b6e:	f1ae 0502 	sub.w	r5, lr, #2
- 8007b72:	f804 1c01 	strb.w	r1, [r4, #-1]
- 8007b76:	4629      	mov	r1, r5
- 8007b78:	1c44      	adds	r4, r0, #1
- 8007b7a:	4561      	cmp	r1, ip
- 8007b7c:	d30a      	bcc.n	8007b94 <__exponent+0x66>
- 8007b7e:	f10d 0209 	add.w	r2, sp, #9
- 8007b82:	eba2 020e 	sub.w	r2, r2, lr
- 8007b86:	4565      	cmp	r5, ip
- 8007b88:	bf88      	it	hi
- 8007b8a:	2200      	movhi	r2, #0
- 8007b8c:	4413      	add	r3, r2
- 8007b8e:	1a18      	subs	r0, r3, r0
- 8007b90:	b003      	add	sp, #12
- 8007b92:	bdf0      	pop	{r4, r5, r6, r7, pc}
- 8007b94:	f811 2b01 	ldrb.w	r2, [r1], #1
- 8007b98:	f804 2f01 	strb.w	r2, [r4, #1]!
- 8007b9c:	e7ed      	b.n	8007b7a <__exponent+0x4c>
- 8007b9e:	2330      	movs	r3, #48	; 0x30
- 8007ba0:	3130      	adds	r1, #48	; 0x30
- 8007ba2:	7083      	strb	r3, [r0, #2]
- 8007ba4:	70c1      	strb	r1, [r0, #3]
- 8007ba6:	1d03      	adds	r3, r0, #4
- 8007ba8:	e7f1      	b.n	8007b8e <__exponent+0x60>
-	...
-
-08007bac <_printf_float>:
- 8007bac:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 8007bb0:	b091      	sub	sp, #68	; 0x44
- 8007bb2:	460c      	mov	r4, r1
- 8007bb4:	f8dd 8068 	ldr.w	r8, [sp, #104]	; 0x68
- 8007bb8:	4616      	mov	r6, r2
- 8007bba:	461f      	mov	r7, r3
- 8007bbc:	4605      	mov	r5, r0
- 8007bbe:	f001 fcdd 	bl	800957c <_localeconv_r>
- 8007bc2:	6803      	ldr	r3, [r0, #0]
- 8007bc4:	4618      	mov	r0, r3
- 8007bc6:	9309      	str	r3, [sp, #36]	; 0x24
- 8007bc8:	f7f8 fb2e 	bl	8000228 <strlen>
- 8007bcc:	2300      	movs	r3, #0
- 8007bce:	930e      	str	r3, [sp, #56]	; 0x38
- 8007bd0:	f8d8 3000 	ldr.w	r3, [r8]
- 8007bd4:	900a      	str	r0, [sp, #40]	; 0x28
- 8007bd6:	3307      	adds	r3, #7
- 8007bd8:	f023 0307 	bic.w	r3, r3, #7
- 8007bdc:	f103 0208 	add.w	r2, r3, #8
- 8007be0:	f894 9018 	ldrb.w	r9, [r4, #24]
- 8007be4:	f8d4 b000 	ldr.w	fp, [r4]
- 8007be8:	f8c8 2000 	str.w	r2, [r8]
- 8007bec:	e9d3 2300 	ldrd	r2, r3, [r3]
- 8007bf0:	e9c4 2312 	strd	r2, r3, [r4, #72]	; 0x48
- 8007bf4:	e9d4 8a12 	ldrd	r8, sl, [r4, #72]	; 0x48
- 8007bf8:	f02a 4300 	bic.w	r3, sl, #2147483648	; 0x80000000
- 8007bfc:	930b      	str	r3, [sp, #44]	; 0x2c
- 8007bfe:	f04f 32ff 	mov.w	r2, #4294967295
- 8007c02:	4640      	mov	r0, r8
- 8007c04:	4b9c      	ldr	r3, [pc, #624]	; (8007e78 <_printf_float+0x2cc>)
- 8007c06:	990b      	ldr	r1, [sp, #44]	; 0x2c
- 8007c08:	f7f8 ff6c 	bl	8000ae4 <__aeabi_dcmpun>
- 8007c0c:	bb70      	cbnz	r0, 8007c6c <_printf_float+0xc0>
- 8007c0e:	f04f 32ff 	mov.w	r2, #4294967295
- 8007c12:	4640      	mov	r0, r8
- 8007c14:	4b98      	ldr	r3, [pc, #608]	; (8007e78 <_printf_float+0x2cc>)
- 8007c16:	990b      	ldr	r1, [sp, #44]	; 0x2c
- 8007c18:	f7f8 ff46 	bl	8000aa8 <__aeabi_dcmple>
- 8007c1c:	bb30      	cbnz	r0, 8007c6c <_printf_float+0xc0>
- 8007c1e:	2200      	movs	r2, #0
- 8007c20:	2300      	movs	r3, #0
- 8007c22:	4640      	mov	r0, r8
- 8007c24:	4651      	mov	r1, sl
- 8007c26:	f7f8 ff35 	bl	8000a94 <__aeabi_dcmplt>
- 8007c2a:	b110      	cbz	r0, 8007c32 <_printf_float+0x86>
- 8007c2c:	232d      	movs	r3, #45	; 0x2d
- 8007c2e:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
- 8007c32:	4b92      	ldr	r3, [pc, #584]	; (8007e7c <_printf_float+0x2d0>)
- 8007c34:	4892      	ldr	r0, [pc, #584]	; (8007e80 <_printf_float+0x2d4>)
- 8007c36:	f1b9 0f47 	cmp.w	r9, #71	; 0x47
- 8007c3a:	bf94      	ite	ls
- 8007c3c:	4698      	movls	r8, r3
- 8007c3e:	4680      	movhi	r8, r0
- 8007c40:	2303      	movs	r3, #3
- 8007c42:	f04f 0a00 	mov.w	sl, #0
- 8007c46:	6123      	str	r3, [r4, #16]
- 8007c48:	f02b 0304 	bic.w	r3, fp, #4
- 8007c4c:	6023      	str	r3, [r4, #0]
- 8007c4e:	4633      	mov	r3, r6
- 8007c50:	4621      	mov	r1, r4
- 8007c52:	4628      	mov	r0, r5
- 8007c54:	9700      	str	r7, [sp, #0]
- 8007c56:	aa0f      	add	r2, sp, #60	; 0x3c
- 8007c58:	f000 f9d4 	bl	8008004 <_printf_common>
- 8007c5c:	3001      	adds	r0, #1
- 8007c5e:	f040 8090 	bne.w	8007d82 <_printf_float+0x1d6>
- 8007c62:	f04f 30ff 	mov.w	r0, #4294967295
- 8007c66:	b011      	add	sp, #68	; 0x44
- 8007c68:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8007c6c:	4642      	mov	r2, r8
- 8007c6e:	4653      	mov	r3, sl
- 8007c70:	4640      	mov	r0, r8
- 8007c72:	4651      	mov	r1, sl
- 8007c74:	f7f8 ff36 	bl	8000ae4 <__aeabi_dcmpun>
- 8007c78:	b148      	cbz	r0, 8007c8e <_printf_float+0xe2>
- 8007c7a:	f1ba 0f00 	cmp.w	sl, #0
- 8007c7e:	bfb8      	it	lt
- 8007c80:	232d      	movlt	r3, #45	; 0x2d
- 8007c82:	4880      	ldr	r0, [pc, #512]	; (8007e84 <_printf_float+0x2d8>)
- 8007c84:	bfb8      	it	lt
- 8007c86:	f884 3043 	strblt.w	r3, [r4, #67]	; 0x43
- 8007c8a:	4b7f      	ldr	r3, [pc, #508]	; (8007e88 <_printf_float+0x2dc>)
- 8007c8c:	e7d3      	b.n	8007c36 <_printf_float+0x8a>
- 8007c8e:	6863      	ldr	r3, [r4, #4]
- 8007c90:	f009 01df 	and.w	r1, r9, #223	; 0xdf
- 8007c94:	1c5a      	adds	r2, r3, #1
- 8007c96:	d142      	bne.n	8007d1e <_printf_float+0x172>
- 8007c98:	2306      	movs	r3, #6
- 8007c9a:	6063      	str	r3, [r4, #4]
- 8007c9c:	2200      	movs	r2, #0
- 8007c9e:	9206      	str	r2, [sp, #24]
- 8007ca0:	aa0e      	add	r2, sp, #56	; 0x38
- 8007ca2:	e9cd 9204 	strd	r9, r2, [sp, #16]
- 8007ca6:	aa0d      	add	r2, sp, #52	; 0x34
- 8007ca8:	f44b 6380 	orr.w	r3, fp, #1024	; 0x400
- 8007cac:	9203      	str	r2, [sp, #12]
- 8007cae:	f10d 0233 	add.w	r2, sp, #51	; 0x33
- 8007cb2:	e9cd 3201 	strd	r3, r2, [sp, #4]
- 8007cb6:	6023      	str	r3, [r4, #0]
- 8007cb8:	6863      	ldr	r3, [r4, #4]
- 8007cba:	4642      	mov	r2, r8
- 8007cbc:	9300      	str	r3, [sp, #0]
- 8007cbe:	4628      	mov	r0, r5
- 8007cc0:	4653      	mov	r3, sl
- 8007cc2:	910b      	str	r1, [sp, #44]	; 0x2c
- 8007cc4:	f7ff fed4 	bl	8007a70 <__cvt>
- 8007cc8:	990b      	ldr	r1, [sp, #44]	; 0x2c
- 8007cca:	4680      	mov	r8, r0
- 8007ccc:	2947      	cmp	r1, #71	; 0x47
- 8007cce:	990d      	ldr	r1, [sp, #52]	; 0x34
- 8007cd0:	d108      	bne.n	8007ce4 <_printf_float+0x138>
- 8007cd2:	1cc8      	adds	r0, r1, #3
- 8007cd4:	db02      	blt.n	8007cdc <_printf_float+0x130>
- 8007cd6:	6863      	ldr	r3, [r4, #4]
- 8007cd8:	4299      	cmp	r1, r3
- 8007cda:	dd40      	ble.n	8007d5e <_printf_float+0x1b2>
- 8007cdc:	f1a9 0902 	sub.w	r9, r9, #2
- 8007ce0:	fa5f f989 	uxtb.w	r9, r9
- 8007ce4:	f1b9 0f65 	cmp.w	r9, #101	; 0x65
- 8007ce8:	d81f      	bhi.n	8007d2a <_printf_float+0x17e>
- 8007cea:	464a      	mov	r2, r9
- 8007cec:	3901      	subs	r1, #1
- 8007cee:	f104 0050 	add.w	r0, r4, #80	; 0x50
- 8007cf2:	910d      	str	r1, [sp, #52]	; 0x34
- 8007cf4:	f7ff ff1b 	bl	8007b2e <__exponent>
- 8007cf8:	9a0e      	ldr	r2, [sp, #56]	; 0x38
- 8007cfa:	4682      	mov	sl, r0
- 8007cfc:	1813      	adds	r3, r2, r0
- 8007cfe:	2a01      	cmp	r2, #1
- 8007d00:	6123      	str	r3, [r4, #16]
- 8007d02:	dc02      	bgt.n	8007d0a <_printf_float+0x15e>
- 8007d04:	6822      	ldr	r2, [r4, #0]
- 8007d06:	07d2      	lsls	r2, r2, #31
- 8007d08:	d501      	bpl.n	8007d0e <_printf_float+0x162>
- 8007d0a:	3301      	adds	r3, #1
- 8007d0c:	6123      	str	r3, [r4, #16]
- 8007d0e:	f89d 3033 	ldrb.w	r3, [sp, #51]	; 0x33
- 8007d12:	2b00      	cmp	r3, #0
- 8007d14:	d09b      	beq.n	8007c4e <_printf_float+0xa2>
- 8007d16:	232d      	movs	r3, #45	; 0x2d
- 8007d18:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
- 8007d1c:	e797      	b.n	8007c4e <_printf_float+0xa2>
- 8007d1e:	2947      	cmp	r1, #71	; 0x47
- 8007d20:	d1bc      	bne.n	8007c9c <_printf_float+0xf0>
- 8007d22:	2b00      	cmp	r3, #0
- 8007d24:	d1ba      	bne.n	8007c9c <_printf_float+0xf0>
- 8007d26:	2301      	movs	r3, #1
- 8007d28:	e7b7      	b.n	8007c9a <_printf_float+0xee>
- 8007d2a:	f1b9 0f66 	cmp.w	r9, #102	; 0x66
- 8007d2e:	d118      	bne.n	8007d62 <_printf_float+0x1b6>
- 8007d30:	2900      	cmp	r1, #0
- 8007d32:	6863      	ldr	r3, [r4, #4]
- 8007d34:	dd0b      	ble.n	8007d4e <_printf_float+0x1a2>
- 8007d36:	6121      	str	r1, [r4, #16]
- 8007d38:	b913      	cbnz	r3, 8007d40 <_printf_float+0x194>
- 8007d3a:	6822      	ldr	r2, [r4, #0]
- 8007d3c:	07d0      	lsls	r0, r2, #31
- 8007d3e:	d502      	bpl.n	8007d46 <_printf_float+0x19a>
- 8007d40:	3301      	adds	r3, #1
- 8007d42:	440b      	add	r3, r1
- 8007d44:	6123      	str	r3, [r4, #16]
- 8007d46:	f04f 0a00 	mov.w	sl, #0
- 8007d4a:	65a1      	str	r1, [r4, #88]	; 0x58
- 8007d4c:	e7df      	b.n	8007d0e <_printf_float+0x162>
- 8007d4e:	b913      	cbnz	r3, 8007d56 <_printf_float+0x1aa>
+08007bf8 <_printf_float>:
+ 8007bf8:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 8007bfc:	b091      	sub	sp, #68	; 0x44
+ 8007bfe:	460c      	mov	r4, r1
+ 8007c00:	f8dd 8068 	ldr.w	r8, [sp, #104]	; 0x68
+ 8007c04:	4616      	mov	r6, r2
+ 8007c06:	461f      	mov	r7, r3
+ 8007c08:	4605      	mov	r5, r0
+ 8007c0a:	f000 fd79 	bl	8008700 <_localeconv_r>
+ 8007c0e:	6803      	ldr	r3, [r0, #0]
+ 8007c10:	4618      	mov	r0, r3
+ 8007c12:	9309      	str	r3, [sp, #36]	; 0x24
+ 8007c14:	f7f8 fb08 	bl	8000228 <strlen>
+ 8007c18:	2300      	movs	r3, #0
+ 8007c1a:	930e      	str	r3, [sp, #56]	; 0x38
+ 8007c1c:	f8d8 3000 	ldr.w	r3, [r8]
+ 8007c20:	900a      	str	r0, [sp, #40]	; 0x28
+ 8007c22:	3307      	adds	r3, #7
+ 8007c24:	f023 0307 	bic.w	r3, r3, #7
+ 8007c28:	f103 0208 	add.w	r2, r3, #8
+ 8007c2c:	f894 9018 	ldrb.w	r9, [r4, #24]
+ 8007c30:	f8d4 b000 	ldr.w	fp, [r4]
+ 8007c34:	f8c8 2000 	str.w	r2, [r8]
+ 8007c38:	e9d3 a800 	ldrd	sl, r8, [r3]
+ 8007c3c:	4652      	mov	r2, sl
+ 8007c3e:	4643      	mov	r3, r8
+ 8007c40:	e9c4 2312 	strd	r2, r3, [r4, #72]	; 0x48
+ 8007c44:	f028 4300 	bic.w	r3, r8, #2147483648	; 0x80000000
+ 8007c48:	930b      	str	r3, [sp, #44]	; 0x2c
+ 8007c4a:	f04f 32ff 	mov.w	r2, #4294967295
+ 8007c4e:	4650      	mov	r0, sl
+ 8007c50:	4b9c      	ldr	r3, [pc, #624]	; (8007ec4 <_printf_float+0x2cc>)
+ 8007c52:	990b      	ldr	r1, [sp, #44]	; 0x2c
+ 8007c54:	f7f8 ff46 	bl	8000ae4 <__aeabi_dcmpun>
+ 8007c58:	bb70      	cbnz	r0, 8007cb8 <_printf_float+0xc0>
+ 8007c5a:	f04f 32ff 	mov.w	r2, #4294967295
+ 8007c5e:	4650      	mov	r0, sl
+ 8007c60:	4b98      	ldr	r3, [pc, #608]	; (8007ec4 <_printf_float+0x2cc>)
+ 8007c62:	990b      	ldr	r1, [sp, #44]	; 0x2c
+ 8007c64:	f7f8 ff20 	bl	8000aa8 <__aeabi_dcmple>
+ 8007c68:	bb30      	cbnz	r0, 8007cb8 <_printf_float+0xc0>
+ 8007c6a:	2200      	movs	r2, #0
+ 8007c6c:	2300      	movs	r3, #0
+ 8007c6e:	4650      	mov	r0, sl
+ 8007c70:	4641      	mov	r1, r8
+ 8007c72:	f7f8 ff0f 	bl	8000a94 <__aeabi_dcmplt>
+ 8007c76:	b110      	cbz	r0, 8007c7e <_printf_float+0x86>
+ 8007c78:	232d      	movs	r3, #45	; 0x2d
+ 8007c7a:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
+ 8007c7e:	4a92      	ldr	r2, [pc, #584]	; (8007ec8 <_printf_float+0x2d0>)
+ 8007c80:	4b92      	ldr	r3, [pc, #584]	; (8007ecc <_printf_float+0x2d4>)
+ 8007c82:	f1b9 0f47 	cmp.w	r9, #71	; 0x47
+ 8007c86:	bf94      	ite	ls
+ 8007c88:	4690      	movls	r8, r2
+ 8007c8a:	4698      	movhi	r8, r3
+ 8007c8c:	2303      	movs	r3, #3
+ 8007c8e:	f04f 0a00 	mov.w	sl, #0
+ 8007c92:	6123      	str	r3, [r4, #16]
+ 8007c94:	f02b 0304 	bic.w	r3, fp, #4
+ 8007c98:	6023      	str	r3, [r4, #0]
+ 8007c9a:	4633      	mov	r3, r6
+ 8007c9c:	4621      	mov	r1, r4
+ 8007c9e:	4628      	mov	r0, r5
+ 8007ca0:	9700      	str	r7, [sp, #0]
+ 8007ca2:	aa0f      	add	r2, sp, #60	; 0x3c
+ 8007ca4:	f000 f9d6 	bl	8008054 <_printf_common>
+ 8007ca8:	3001      	adds	r0, #1
+ 8007caa:	f040 8090 	bne.w	8007dce <_printf_float+0x1d6>
+ 8007cae:	f04f 30ff 	mov.w	r0, #4294967295
+ 8007cb2:	b011      	add	sp, #68	; 0x44
+ 8007cb4:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+ 8007cb8:	4652      	mov	r2, sl
+ 8007cba:	4643      	mov	r3, r8
+ 8007cbc:	4650      	mov	r0, sl
+ 8007cbe:	4641      	mov	r1, r8
+ 8007cc0:	f7f8 ff10 	bl	8000ae4 <__aeabi_dcmpun>
+ 8007cc4:	b148      	cbz	r0, 8007cda <_printf_float+0xe2>
+ 8007cc6:	f1b8 0f00 	cmp.w	r8, #0
+ 8007cca:	bfb8      	it	lt
+ 8007ccc:	232d      	movlt	r3, #45	; 0x2d
+ 8007cce:	4a80      	ldr	r2, [pc, #512]	; (8007ed0 <_printf_float+0x2d8>)
+ 8007cd0:	bfb8      	it	lt
+ 8007cd2:	f884 3043 	strblt.w	r3, [r4, #67]	; 0x43
+ 8007cd6:	4b7f      	ldr	r3, [pc, #508]	; (8007ed4 <_printf_float+0x2dc>)
+ 8007cd8:	e7d3      	b.n	8007c82 <_printf_float+0x8a>
+ 8007cda:	6863      	ldr	r3, [r4, #4]
+ 8007cdc:	f009 01df 	and.w	r1, r9, #223	; 0xdf
+ 8007ce0:	1c5a      	adds	r2, r3, #1
+ 8007ce2:	d142      	bne.n	8007d6a <_printf_float+0x172>
+ 8007ce4:	2306      	movs	r3, #6
+ 8007ce6:	6063      	str	r3, [r4, #4]
+ 8007ce8:	2200      	movs	r2, #0
+ 8007cea:	9206      	str	r2, [sp, #24]
+ 8007cec:	aa0e      	add	r2, sp, #56	; 0x38
+ 8007cee:	e9cd 9204 	strd	r9, r2, [sp, #16]
+ 8007cf2:	aa0d      	add	r2, sp, #52	; 0x34
+ 8007cf4:	f44b 6380 	orr.w	r3, fp, #1024	; 0x400
+ 8007cf8:	9203      	str	r2, [sp, #12]
+ 8007cfa:	f10d 0233 	add.w	r2, sp, #51	; 0x33
+ 8007cfe:	e9cd 3201 	strd	r3, r2, [sp, #4]
+ 8007d02:	6023      	str	r3, [r4, #0]
+ 8007d04:	6863      	ldr	r3, [r4, #4]
+ 8007d06:	4652      	mov	r2, sl
+ 8007d08:	9300      	str	r3, [sp, #0]
+ 8007d0a:	4628      	mov	r0, r5
+ 8007d0c:	4643      	mov	r3, r8
+ 8007d0e:	910b      	str	r1, [sp, #44]	; 0x2c
+ 8007d10:	f7ff fed6 	bl	8007ac0 <__cvt>
+ 8007d14:	990b      	ldr	r1, [sp, #44]	; 0x2c
+ 8007d16:	4680      	mov	r8, r0
+ 8007d18:	2947      	cmp	r1, #71	; 0x47
+ 8007d1a:	990d      	ldr	r1, [sp, #52]	; 0x34
+ 8007d1c:	d108      	bne.n	8007d30 <_printf_float+0x138>
+ 8007d1e:	1cc8      	adds	r0, r1, #3
+ 8007d20:	db02      	blt.n	8007d28 <_printf_float+0x130>
+ 8007d22:	6863      	ldr	r3, [r4, #4]
+ 8007d24:	4299      	cmp	r1, r3
+ 8007d26:	dd40      	ble.n	8007daa <_printf_float+0x1b2>
+ 8007d28:	f1a9 0902 	sub.w	r9, r9, #2
+ 8007d2c:	fa5f f989 	uxtb.w	r9, r9
+ 8007d30:	f1b9 0f65 	cmp.w	r9, #101	; 0x65
+ 8007d34:	d81f      	bhi.n	8007d76 <_printf_float+0x17e>
+ 8007d36:	464a      	mov	r2, r9
+ 8007d38:	3901      	subs	r1, #1
+ 8007d3a:	f104 0050 	add.w	r0, r4, #80	; 0x50
+ 8007d3e:	910d      	str	r1, [sp, #52]	; 0x34
+ 8007d40:	f7ff ff1d 	bl	8007b7e <__exponent>
+ 8007d44:	9a0e      	ldr	r2, [sp, #56]	; 0x38
+ 8007d46:	4682      	mov	sl, r0
+ 8007d48:	1813      	adds	r3, r2, r0
+ 8007d4a:	2a01      	cmp	r2, #1
+ 8007d4c:	6123      	str	r3, [r4, #16]
+ 8007d4e:	dc02      	bgt.n	8007d56 <_printf_float+0x15e>
  8007d50:	6822      	ldr	r2, [r4, #0]
  8007d52:	07d2      	lsls	r2, r2, #31
- 8007d54:	d501      	bpl.n	8007d5a <_printf_float+0x1ae>
- 8007d56:	3302      	adds	r3, #2
- 8007d58:	e7f4      	b.n	8007d44 <_printf_float+0x198>
- 8007d5a:	2301      	movs	r3, #1
- 8007d5c:	e7f2      	b.n	8007d44 <_printf_float+0x198>
- 8007d5e:	f04f 0967 	mov.w	r9, #103	; 0x67
- 8007d62:	9b0e      	ldr	r3, [sp, #56]	; 0x38
- 8007d64:	4299      	cmp	r1, r3
- 8007d66:	db05      	blt.n	8007d74 <_printf_float+0x1c8>
- 8007d68:	6823      	ldr	r3, [r4, #0]
- 8007d6a:	6121      	str	r1, [r4, #16]
- 8007d6c:	07d8      	lsls	r0, r3, #31
- 8007d6e:	d5ea      	bpl.n	8007d46 <_printf_float+0x19a>
- 8007d70:	1c4b      	adds	r3, r1, #1
- 8007d72:	e7e7      	b.n	8007d44 <_printf_float+0x198>
- 8007d74:	2900      	cmp	r1, #0
- 8007d76:	bfcc      	ite	gt
- 8007d78:	2201      	movgt	r2, #1
- 8007d7a:	f1c1 0202 	rsble	r2, r1, #2
- 8007d7e:	4413      	add	r3, r2
- 8007d80:	e7e0      	b.n	8007d44 <_printf_float+0x198>
- 8007d82:	6823      	ldr	r3, [r4, #0]
- 8007d84:	055a      	lsls	r2, r3, #21
- 8007d86:	d407      	bmi.n	8007d98 <_printf_float+0x1ec>
- 8007d88:	6923      	ldr	r3, [r4, #16]
- 8007d8a:	4642      	mov	r2, r8
- 8007d8c:	4631      	mov	r1, r6
- 8007d8e:	4628      	mov	r0, r5
- 8007d90:	47b8      	blx	r7
- 8007d92:	3001      	adds	r0, #1
- 8007d94:	d12b      	bne.n	8007dee <_printf_float+0x242>
- 8007d96:	e764      	b.n	8007c62 <_printf_float+0xb6>
- 8007d98:	f1b9 0f65 	cmp.w	r9, #101	; 0x65
- 8007d9c:	f240 80dd 	bls.w	8007f5a <_printf_float+0x3ae>
- 8007da0:	e9d4 0112 	ldrd	r0, r1, [r4, #72]	; 0x48
- 8007da4:	2200      	movs	r2, #0
- 8007da6:	2300      	movs	r3, #0
- 8007da8:	f7f8 fe6a 	bl	8000a80 <__aeabi_dcmpeq>
- 8007dac:	2800      	cmp	r0, #0
- 8007dae:	d033      	beq.n	8007e18 <_printf_float+0x26c>
- 8007db0:	2301      	movs	r3, #1
- 8007db2:	4631      	mov	r1, r6
- 8007db4:	4628      	mov	r0, r5
- 8007db6:	4a35      	ldr	r2, [pc, #212]	; (8007e8c <_printf_float+0x2e0>)
- 8007db8:	47b8      	blx	r7
- 8007dba:	3001      	adds	r0, #1
- 8007dbc:	f43f af51 	beq.w	8007c62 <_printf_float+0xb6>
- 8007dc0:	e9dd 230d 	ldrd	r2, r3, [sp, #52]	; 0x34
- 8007dc4:	429a      	cmp	r2, r3
- 8007dc6:	db02      	blt.n	8007dce <_printf_float+0x222>
- 8007dc8:	6823      	ldr	r3, [r4, #0]
- 8007dca:	07d8      	lsls	r0, r3, #31
- 8007dcc:	d50f      	bpl.n	8007dee <_printf_float+0x242>
- 8007dce:	e9dd 2309 	ldrd	r2, r3, [sp, #36]	; 0x24
- 8007dd2:	4631      	mov	r1, r6
- 8007dd4:	4628      	mov	r0, r5
- 8007dd6:	47b8      	blx	r7
- 8007dd8:	3001      	adds	r0, #1
- 8007dda:	f43f af42 	beq.w	8007c62 <_printf_float+0xb6>
- 8007dde:	f04f 0800 	mov.w	r8, #0
- 8007de2:	f104 091a 	add.w	r9, r4, #26
- 8007de6:	9b0e      	ldr	r3, [sp, #56]	; 0x38
- 8007de8:	3b01      	subs	r3, #1
- 8007dea:	4543      	cmp	r3, r8
- 8007dec:	dc09      	bgt.n	8007e02 <_printf_float+0x256>
- 8007dee:	6823      	ldr	r3, [r4, #0]
- 8007df0:	079b      	lsls	r3, r3, #30
- 8007df2:	f100 8102 	bmi.w	8007ffa <_printf_float+0x44e>
- 8007df6:	68e0      	ldr	r0, [r4, #12]
- 8007df8:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
- 8007dfa:	4298      	cmp	r0, r3
- 8007dfc:	bfb8      	it	lt
- 8007dfe:	4618      	movlt	r0, r3
- 8007e00:	e731      	b.n	8007c66 <_printf_float+0xba>
- 8007e02:	2301      	movs	r3, #1
- 8007e04:	464a      	mov	r2, r9
- 8007e06:	4631      	mov	r1, r6
- 8007e08:	4628      	mov	r0, r5
- 8007e0a:	47b8      	blx	r7
- 8007e0c:	3001      	adds	r0, #1
- 8007e0e:	f43f af28 	beq.w	8007c62 <_printf_float+0xb6>
- 8007e12:	f108 0801 	add.w	r8, r8, #1
- 8007e16:	e7e6      	b.n	8007de6 <_printf_float+0x23a>
- 8007e18:	9b0d      	ldr	r3, [sp, #52]	; 0x34
- 8007e1a:	2b00      	cmp	r3, #0
- 8007e1c:	dc38      	bgt.n	8007e90 <_printf_float+0x2e4>
- 8007e1e:	2301      	movs	r3, #1
- 8007e20:	4631      	mov	r1, r6
- 8007e22:	4628      	mov	r0, r5
- 8007e24:	4a19      	ldr	r2, [pc, #100]	; (8007e8c <_printf_float+0x2e0>)
- 8007e26:	47b8      	blx	r7
- 8007e28:	3001      	adds	r0, #1
- 8007e2a:	f43f af1a 	beq.w	8007c62 <_printf_float+0xb6>
- 8007e2e:	e9dd 230d 	ldrd	r2, r3, [sp, #52]	; 0x34
- 8007e32:	4313      	orrs	r3, r2
- 8007e34:	d102      	bne.n	8007e3c <_printf_float+0x290>
- 8007e36:	6823      	ldr	r3, [r4, #0]
- 8007e38:	07d9      	lsls	r1, r3, #31
- 8007e3a:	d5d8      	bpl.n	8007dee <_printf_float+0x242>
- 8007e3c:	e9dd 2309 	ldrd	r2, r3, [sp, #36]	; 0x24
- 8007e40:	4631      	mov	r1, r6
- 8007e42:	4628      	mov	r0, r5
- 8007e44:	47b8      	blx	r7
- 8007e46:	3001      	adds	r0, #1
- 8007e48:	f43f af0b 	beq.w	8007c62 <_printf_float+0xb6>
- 8007e4c:	f04f 0900 	mov.w	r9, #0
- 8007e50:	f104 0a1a 	add.w	sl, r4, #26
- 8007e54:	9b0d      	ldr	r3, [sp, #52]	; 0x34
- 8007e56:	425b      	negs	r3, r3
- 8007e58:	454b      	cmp	r3, r9
- 8007e5a:	dc01      	bgt.n	8007e60 <_printf_float+0x2b4>
- 8007e5c:	9b0e      	ldr	r3, [sp, #56]	; 0x38
- 8007e5e:	e794      	b.n	8007d8a <_printf_float+0x1de>
- 8007e60:	2301      	movs	r3, #1
- 8007e62:	4652      	mov	r2, sl
- 8007e64:	4631      	mov	r1, r6
- 8007e66:	4628      	mov	r0, r5
- 8007e68:	47b8      	blx	r7
- 8007e6a:	3001      	adds	r0, #1
- 8007e6c:	f43f aef9 	beq.w	8007c62 <_printf_float+0xb6>
- 8007e70:	f109 0901 	add.w	r9, r9, #1
- 8007e74:	e7ee      	b.n	8007e54 <_printf_float+0x2a8>
- 8007e76:	bf00      	nop
- 8007e78:	7fefffff 	.word	0x7fefffff
- 8007e7c:	0800b258 	.word	0x0800b258
- 8007e80:	0800b25c 	.word	0x0800b25c
- 8007e84:	0800b264 	.word	0x0800b264
- 8007e88:	0800b260 	.word	0x0800b260
- 8007e8c:	0800b268 	.word	0x0800b268
- 8007e90:	9a0e      	ldr	r2, [sp, #56]	; 0x38
- 8007e92:	6da3      	ldr	r3, [r4, #88]	; 0x58
- 8007e94:	429a      	cmp	r2, r3
- 8007e96:	bfa8      	it	ge
- 8007e98:	461a      	movge	r2, r3
- 8007e9a:	2a00      	cmp	r2, #0
- 8007e9c:	4691      	mov	r9, r2
- 8007e9e:	dc37      	bgt.n	8007f10 <_printf_float+0x364>
- 8007ea0:	f04f 0b00 	mov.w	fp, #0
- 8007ea4:	ea29 79e9 	bic.w	r9, r9, r9, asr #31
- 8007ea8:	f104 021a 	add.w	r2, r4, #26
- 8007eac:	f8d4 a058 	ldr.w	sl, [r4, #88]	; 0x58
- 8007eb0:	ebaa 0309 	sub.w	r3, sl, r9
- 8007eb4:	455b      	cmp	r3, fp
- 8007eb6:	dc33      	bgt.n	8007f20 <_printf_float+0x374>
- 8007eb8:	e9dd 230d 	ldrd	r2, r3, [sp, #52]	; 0x34
- 8007ebc:	429a      	cmp	r2, r3
- 8007ebe:	db3b      	blt.n	8007f38 <_printf_float+0x38c>
- 8007ec0:	6823      	ldr	r3, [r4, #0]
- 8007ec2:	07da      	lsls	r2, r3, #31
- 8007ec4:	d438      	bmi.n	8007f38 <_printf_float+0x38c>
- 8007ec6:	9a0e      	ldr	r2, [sp, #56]	; 0x38
- 8007ec8:	990d      	ldr	r1, [sp, #52]	; 0x34
- 8007eca:	eba2 030a 	sub.w	r3, r2, sl
- 8007ece:	eba2 0901 	sub.w	r9, r2, r1
- 8007ed2:	4599      	cmp	r9, r3
- 8007ed4:	bfa8      	it	ge
- 8007ed6:	4699      	movge	r9, r3
- 8007ed8:	f1b9 0f00 	cmp.w	r9, #0
- 8007edc:	dc34      	bgt.n	8007f48 <_printf_float+0x39c>
- 8007ede:	f04f 0800 	mov.w	r8, #0
- 8007ee2:	ea29 79e9 	bic.w	r9, r9, r9, asr #31
- 8007ee6:	f104 0a1a 	add.w	sl, r4, #26
- 8007eea:	e9dd 230d 	ldrd	r2, r3, [sp, #52]	; 0x34
- 8007eee:	1a9b      	subs	r3, r3, r2
- 8007ef0:	eba3 0309 	sub.w	r3, r3, r9
- 8007ef4:	4543      	cmp	r3, r8
- 8007ef6:	f77f af7a 	ble.w	8007dee <_printf_float+0x242>
- 8007efa:	2301      	movs	r3, #1
- 8007efc:	4652      	mov	r2, sl
- 8007efe:	4631      	mov	r1, r6
- 8007f00:	4628      	mov	r0, r5
- 8007f02:	47b8      	blx	r7
- 8007f04:	3001      	adds	r0, #1
- 8007f06:	f43f aeac 	beq.w	8007c62 <_printf_float+0xb6>
- 8007f0a:	f108 0801 	add.w	r8, r8, #1
- 8007f0e:	e7ec      	b.n	8007eea <_printf_float+0x33e>
- 8007f10:	4613      	mov	r3, r2
- 8007f12:	4631      	mov	r1, r6
- 8007f14:	4642      	mov	r2, r8
- 8007f16:	4628      	mov	r0, r5
- 8007f18:	47b8      	blx	r7
- 8007f1a:	3001      	adds	r0, #1
- 8007f1c:	d1c0      	bne.n	8007ea0 <_printf_float+0x2f4>
- 8007f1e:	e6a0      	b.n	8007c62 <_printf_float+0xb6>
- 8007f20:	2301      	movs	r3, #1
- 8007f22:	4631      	mov	r1, r6
- 8007f24:	4628      	mov	r0, r5
- 8007f26:	920b      	str	r2, [sp, #44]	; 0x2c
- 8007f28:	47b8      	blx	r7
- 8007f2a:	3001      	adds	r0, #1
- 8007f2c:	f43f ae99 	beq.w	8007c62 <_printf_float+0xb6>
- 8007f30:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
- 8007f32:	f10b 0b01 	add.w	fp, fp, #1
- 8007f36:	e7b9      	b.n	8007eac <_printf_float+0x300>
- 8007f38:	4631      	mov	r1, r6
- 8007f3a:	e9dd 2309 	ldrd	r2, r3, [sp, #36]	; 0x24
- 8007f3e:	4628      	mov	r0, r5
- 8007f40:	47b8      	blx	r7
- 8007f42:	3001      	adds	r0, #1
- 8007f44:	d1bf      	bne.n	8007ec6 <_printf_float+0x31a>
- 8007f46:	e68c      	b.n	8007c62 <_printf_float+0xb6>
- 8007f48:	464b      	mov	r3, r9
+ 8007d54:	d501      	bpl.n	8007d5a <_printf_float+0x162>
+ 8007d56:	3301      	adds	r3, #1
+ 8007d58:	6123      	str	r3, [r4, #16]
+ 8007d5a:	f89d 3033 	ldrb.w	r3, [sp, #51]	; 0x33
+ 8007d5e:	2b00      	cmp	r3, #0
+ 8007d60:	d09b      	beq.n	8007c9a <_printf_float+0xa2>
+ 8007d62:	232d      	movs	r3, #45	; 0x2d
+ 8007d64:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
+ 8007d68:	e797      	b.n	8007c9a <_printf_float+0xa2>
+ 8007d6a:	2947      	cmp	r1, #71	; 0x47
+ 8007d6c:	d1bc      	bne.n	8007ce8 <_printf_float+0xf0>
+ 8007d6e:	2b00      	cmp	r3, #0
+ 8007d70:	d1ba      	bne.n	8007ce8 <_printf_float+0xf0>
+ 8007d72:	2301      	movs	r3, #1
+ 8007d74:	e7b7      	b.n	8007ce6 <_printf_float+0xee>
+ 8007d76:	f1b9 0f66 	cmp.w	r9, #102	; 0x66
+ 8007d7a:	d118      	bne.n	8007dae <_printf_float+0x1b6>
+ 8007d7c:	2900      	cmp	r1, #0
+ 8007d7e:	6863      	ldr	r3, [r4, #4]
+ 8007d80:	dd0b      	ble.n	8007d9a <_printf_float+0x1a2>
+ 8007d82:	6121      	str	r1, [r4, #16]
+ 8007d84:	b913      	cbnz	r3, 8007d8c <_printf_float+0x194>
+ 8007d86:	6822      	ldr	r2, [r4, #0]
+ 8007d88:	07d0      	lsls	r0, r2, #31
+ 8007d8a:	d502      	bpl.n	8007d92 <_printf_float+0x19a>
+ 8007d8c:	3301      	adds	r3, #1
+ 8007d8e:	440b      	add	r3, r1
+ 8007d90:	6123      	str	r3, [r4, #16]
+ 8007d92:	f04f 0a00 	mov.w	sl, #0
+ 8007d96:	65a1      	str	r1, [r4, #88]	; 0x58
+ 8007d98:	e7df      	b.n	8007d5a <_printf_float+0x162>
+ 8007d9a:	b913      	cbnz	r3, 8007da2 <_printf_float+0x1aa>
+ 8007d9c:	6822      	ldr	r2, [r4, #0]
+ 8007d9e:	07d2      	lsls	r2, r2, #31
+ 8007da0:	d501      	bpl.n	8007da6 <_printf_float+0x1ae>
+ 8007da2:	3302      	adds	r3, #2
+ 8007da4:	e7f4      	b.n	8007d90 <_printf_float+0x198>
+ 8007da6:	2301      	movs	r3, #1
+ 8007da8:	e7f2      	b.n	8007d90 <_printf_float+0x198>
+ 8007daa:	f04f 0967 	mov.w	r9, #103	; 0x67
+ 8007dae:	9b0e      	ldr	r3, [sp, #56]	; 0x38
+ 8007db0:	4299      	cmp	r1, r3
+ 8007db2:	db05      	blt.n	8007dc0 <_printf_float+0x1c8>
+ 8007db4:	6823      	ldr	r3, [r4, #0]
+ 8007db6:	6121      	str	r1, [r4, #16]
+ 8007db8:	07d8      	lsls	r0, r3, #31
+ 8007dba:	d5ea      	bpl.n	8007d92 <_printf_float+0x19a>
+ 8007dbc:	1c4b      	adds	r3, r1, #1
+ 8007dbe:	e7e7      	b.n	8007d90 <_printf_float+0x198>
+ 8007dc0:	2900      	cmp	r1, #0
+ 8007dc2:	bfcc      	ite	gt
+ 8007dc4:	2201      	movgt	r2, #1
+ 8007dc6:	f1c1 0202 	rsble	r2, r1, #2
+ 8007dca:	4413      	add	r3, r2
+ 8007dcc:	e7e0      	b.n	8007d90 <_printf_float+0x198>
+ 8007dce:	6823      	ldr	r3, [r4, #0]
+ 8007dd0:	055a      	lsls	r2, r3, #21
+ 8007dd2:	d407      	bmi.n	8007de4 <_printf_float+0x1ec>
+ 8007dd4:	6923      	ldr	r3, [r4, #16]
+ 8007dd6:	4642      	mov	r2, r8
+ 8007dd8:	4631      	mov	r1, r6
+ 8007dda:	4628      	mov	r0, r5
+ 8007ddc:	47b8      	blx	r7
+ 8007dde:	3001      	adds	r0, #1
+ 8007de0:	d12b      	bne.n	8007e3a <_printf_float+0x242>
+ 8007de2:	e764      	b.n	8007cae <_printf_float+0xb6>
+ 8007de4:	f1b9 0f65 	cmp.w	r9, #101	; 0x65
+ 8007de8:	f240 80dd 	bls.w	8007fa6 <_printf_float+0x3ae>
+ 8007dec:	e9d4 0112 	ldrd	r0, r1, [r4, #72]	; 0x48
+ 8007df0:	2200      	movs	r2, #0
+ 8007df2:	2300      	movs	r3, #0
+ 8007df4:	f7f8 fe44 	bl	8000a80 <__aeabi_dcmpeq>
+ 8007df8:	2800      	cmp	r0, #0
+ 8007dfa:	d033      	beq.n	8007e64 <_printf_float+0x26c>
+ 8007dfc:	2301      	movs	r3, #1
+ 8007dfe:	4631      	mov	r1, r6
+ 8007e00:	4628      	mov	r0, r5
+ 8007e02:	4a35      	ldr	r2, [pc, #212]	; (8007ed8 <_printf_float+0x2e0>)
+ 8007e04:	47b8      	blx	r7
+ 8007e06:	3001      	adds	r0, #1
+ 8007e08:	f43f af51 	beq.w	8007cae <_printf_float+0xb6>
+ 8007e0c:	e9dd 230d 	ldrd	r2, r3, [sp, #52]	; 0x34
+ 8007e10:	429a      	cmp	r2, r3
+ 8007e12:	db02      	blt.n	8007e1a <_printf_float+0x222>
+ 8007e14:	6823      	ldr	r3, [r4, #0]
+ 8007e16:	07d8      	lsls	r0, r3, #31
+ 8007e18:	d50f      	bpl.n	8007e3a <_printf_float+0x242>
+ 8007e1a:	e9dd 2309 	ldrd	r2, r3, [sp, #36]	; 0x24
+ 8007e1e:	4631      	mov	r1, r6
+ 8007e20:	4628      	mov	r0, r5
+ 8007e22:	47b8      	blx	r7
+ 8007e24:	3001      	adds	r0, #1
+ 8007e26:	f43f af42 	beq.w	8007cae <_printf_float+0xb6>
+ 8007e2a:	f04f 0800 	mov.w	r8, #0
+ 8007e2e:	f104 091a 	add.w	r9, r4, #26
+ 8007e32:	9b0e      	ldr	r3, [sp, #56]	; 0x38
+ 8007e34:	3b01      	subs	r3, #1
+ 8007e36:	4543      	cmp	r3, r8
+ 8007e38:	dc09      	bgt.n	8007e4e <_printf_float+0x256>
+ 8007e3a:	6823      	ldr	r3, [r4, #0]
+ 8007e3c:	079b      	lsls	r3, r3, #30
+ 8007e3e:	f100 8104 	bmi.w	800804a <_printf_float+0x452>
+ 8007e42:	68e0      	ldr	r0, [r4, #12]
+ 8007e44:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
+ 8007e46:	4298      	cmp	r0, r3
+ 8007e48:	bfb8      	it	lt
+ 8007e4a:	4618      	movlt	r0, r3
+ 8007e4c:	e731      	b.n	8007cb2 <_printf_float+0xba>
+ 8007e4e:	2301      	movs	r3, #1
+ 8007e50:	464a      	mov	r2, r9
+ 8007e52:	4631      	mov	r1, r6
+ 8007e54:	4628      	mov	r0, r5
+ 8007e56:	47b8      	blx	r7
+ 8007e58:	3001      	adds	r0, #1
+ 8007e5a:	f43f af28 	beq.w	8007cae <_printf_float+0xb6>
+ 8007e5e:	f108 0801 	add.w	r8, r8, #1
+ 8007e62:	e7e6      	b.n	8007e32 <_printf_float+0x23a>
+ 8007e64:	9b0d      	ldr	r3, [sp, #52]	; 0x34
+ 8007e66:	2b00      	cmp	r3, #0
+ 8007e68:	dc38      	bgt.n	8007edc <_printf_float+0x2e4>
+ 8007e6a:	2301      	movs	r3, #1
+ 8007e6c:	4631      	mov	r1, r6
+ 8007e6e:	4628      	mov	r0, r5
+ 8007e70:	4a19      	ldr	r2, [pc, #100]	; (8007ed8 <_printf_float+0x2e0>)
+ 8007e72:	47b8      	blx	r7
+ 8007e74:	3001      	adds	r0, #1
+ 8007e76:	f43f af1a 	beq.w	8007cae <_printf_float+0xb6>
+ 8007e7a:	e9dd 320d 	ldrd	r3, r2, [sp, #52]	; 0x34
+ 8007e7e:	4313      	orrs	r3, r2
+ 8007e80:	d102      	bne.n	8007e88 <_printf_float+0x290>
+ 8007e82:	6823      	ldr	r3, [r4, #0]
+ 8007e84:	07d9      	lsls	r1, r3, #31
+ 8007e86:	d5d8      	bpl.n	8007e3a <_printf_float+0x242>
+ 8007e88:	e9dd 2309 	ldrd	r2, r3, [sp, #36]	; 0x24
+ 8007e8c:	4631      	mov	r1, r6
+ 8007e8e:	4628      	mov	r0, r5
+ 8007e90:	47b8      	blx	r7
+ 8007e92:	3001      	adds	r0, #1
+ 8007e94:	f43f af0b 	beq.w	8007cae <_printf_float+0xb6>
+ 8007e98:	f04f 0900 	mov.w	r9, #0
+ 8007e9c:	f104 0a1a 	add.w	sl, r4, #26
+ 8007ea0:	9b0d      	ldr	r3, [sp, #52]	; 0x34
+ 8007ea2:	425b      	negs	r3, r3
+ 8007ea4:	454b      	cmp	r3, r9
+ 8007ea6:	dc01      	bgt.n	8007eac <_printf_float+0x2b4>
+ 8007ea8:	9b0e      	ldr	r3, [sp, #56]	; 0x38
+ 8007eaa:	e794      	b.n	8007dd6 <_printf_float+0x1de>
+ 8007eac:	2301      	movs	r3, #1
+ 8007eae:	4652      	mov	r2, sl
+ 8007eb0:	4631      	mov	r1, r6
+ 8007eb2:	4628      	mov	r0, r5
+ 8007eb4:	47b8      	blx	r7
+ 8007eb6:	3001      	adds	r0, #1
+ 8007eb8:	f43f aef9 	beq.w	8007cae <_printf_float+0xb6>
+ 8007ebc:	f109 0901 	add.w	r9, r9, #1
+ 8007ec0:	e7ee      	b.n	8007ea0 <_printf_float+0x2a8>
+ 8007ec2:	bf00      	nop
+ 8007ec4:	7fefffff 	.word	0x7fefffff
+ 8007ec8:	0800b242 	.word	0x0800b242
+ 8007ecc:	0800b246 	.word	0x0800b246
+ 8007ed0:	0800b24a 	.word	0x0800b24a
+ 8007ed4:	0800b24e 	.word	0x0800b24e
+ 8007ed8:	0800b252 	.word	0x0800b252
+ 8007edc:	9a0e      	ldr	r2, [sp, #56]	; 0x38
+ 8007ede:	6da3      	ldr	r3, [r4, #88]	; 0x58
+ 8007ee0:	429a      	cmp	r2, r3
+ 8007ee2:	bfa8      	it	ge
+ 8007ee4:	461a      	movge	r2, r3
+ 8007ee6:	2a00      	cmp	r2, #0
+ 8007ee8:	4691      	mov	r9, r2
+ 8007eea:	dc37      	bgt.n	8007f5c <_printf_float+0x364>
+ 8007eec:	f04f 0b00 	mov.w	fp, #0
+ 8007ef0:	ea29 79e9 	bic.w	r9, r9, r9, asr #31
+ 8007ef4:	f104 021a 	add.w	r2, r4, #26
+ 8007ef8:	f8d4 a058 	ldr.w	sl, [r4, #88]	; 0x58
+ 8007efc:	ebaa 0309 	sub.w	r3, sl, r9
+ 8007f00:	455b      	cmp	r3, fp
+ 8007f02:	dc33      	bgt.n	8007f6c <_printf_float+0x374>
+ 8007f04:	e9dd 230d 	ldrd	r2, r3, [sp, #52]	; 0x34
+ 8007f08:	429a      	cmp	r2, r3
+ 8007f0a:	db3b      	blt.n	8007f84 <_printf_float+0x38c>
+ 8007f0c:	6823      	ldr	r3, [r4, #0]
+ 8007f0e:	07da      	lsls	r2, r3, #31
+ 8007f10:	d438      	bmi.n	8007f84 <_printf_float+0x38c>
+ 8007f12:	e9dd 320d 	ldrd	r3, r2, [sp, #52]	; 0x34
+ 8007f16:	eba2 0903 	sub.w	r9, r2, r3
+ 8007f1a:	eba2 020a 	sub.w	r2, r2, sl
+ 8007f1e:	4591      	cmp	r9, r2
+ 8007f20:	bfa8      	it	ge
+ 8007f22:	4691      	movge	r9, r2
+ 8007f24:	f1b9 0f00 	cmp.w	r9, #0
+ 8007f28:	dc34      	bgt.n	8007f94 <_printf_float+0x39c>
+ 8007f2a:	f04f 0800 	mov.w	r8, #0
+ 8007f2e:	ea29 79e9 	bic.w	r9, r9, r9, asr #31
+ 8007f32:	f104 0a1a 	add.w	sl, r4, #26
+ 8007f36:	e9dd 230d 	ldrd	r2, r3, [sp, #52]	; 0x34
+ 8007f3a:	1a9b      	subs	r3, r3, r2
+ 8007f3c:	eba3 0309 	sub.w	r3, r3, r9
+ 8007f40:	4543      	cmp	r3, r8
+ 8007f42:	f77f af7a 	ble.w	8007e3a <_printf_float+0x242>
+ 8007f46:	2301      	movs	r3, #1
+ 8007f48:	4652      	mov	r2, sl
  8007f4a:	4631      	mov	r1, r6
  8007f4c:	4628      	mov	r0, r5
- 8007f4e:	eb08 020a 	add.w	r2, r8, sl
- 8007f52:	47b8      	blx	r7
- 8007f54:	3001      	adds	r0, #1
- 8007f56:	d1c2      	bne.n	8007ede <_printf_float+0x332>
- 8007f58:	e683      	b.n	8007c62 <_printf_float+0xb6>
- 8007f5a:	9a0e      	ldr	r2, [sp, #56]	; 0x38
- 8007f5c:	2a01      	cmp	r2, #1
- 8007f5e:	dc01      	bgt.n	8007f64 <_printf_float+0x3b8>
- 8007f60:	07db      	lsls	r3, r3, #31
- 8007f62:	d537      	bpl.n	8007fd4 <_printf_float+0x428>
- 8007f64:	2301      	movs	r3, #1
- 8007f66:	4642      	mov	r2, r8
- 8007f68:	4631      	mov	r1, r6
- 8007f6a:	4628      	mov	r0, r5
- 8007f6c:	47b8      	blx	r7
- 8007f6e:	3001      	adds	r0, #1
- 8007f70:	f43f ae77 	beq.w	8007c62 <_printf_float+0xb6>
- 8007f74:	e9dd 2309 	ldrd	r2, r3, [sp, #36]	; 0x24
- 8007f78:	4631      	mov	r1, r6
- 8007f7a:	4628      	mov	r0, r5
- 8007f7c:	47b8      	blx	r7
- 8007f7e:	3001      	adds	r0, #1
- 8007f80:	f43f ae6f 	beq.w	8007c62 <_printf_float+0xb6>
- 8007f84:	e9d4 0112 	ldrd	r0, r1, [r4, #72]	; 0x48
- 8007f88:	2200      	movs	r2, #0
- 8007f8a:	2300      	movs	r3, #0
- 8007f8c:	f7f8 fd78 	bl	8000a80 <__aeabi_dcmpeq>
- 8007f90:	b9d8      	cbnz	r0, 8007fca <_printf_float+0x41e>
- 8007f92:	9b0e      	ldr	r3, [sp, #56]	; 0x38
- 8007f94:	f108 0201 	add.w	r2, r8, #1
- 8007f98:	3b01      	subs	r3, #1
- 8007f9a:	4631      	mov	r1, r6
- 8007f9c:	4628      	mov	r0, r5
+ 8007f4e:	47b8      	blx	r7
+ 8007f50:	3001      	adds	r0, #1
+ 8007f52:	f43f aeac 	beq.w	8007cae <_printf_float+0xb6>
+ 8007f56:	f108 0801 	add.w	r8, r8, #1
+ 8007f5a:	e7ec      	b.n	8007f36 <_printf_float+0x33e>
+ 8007f5c:	4613      	mov	r3, r2
+ 8007f5e:	4631      	mov	r1, r6
+ 8007f60:	4642      	mov	r2, r8
+ 8007f62:	4628      	mov	r0, r5
+ 8007f64:	47b8      	blx	r7
+ 8007f66:	3001      	adds	r0, #1
+ 8007f68:	d1c0      	bne.n	8007eec <_printf_float+0x2f4>
+ 8007f6a:	e6a0      	b.n	8007cae <_printf_float+0xb6>
+ 8007f6c:	2301      	movs	r3, #1
+ 8007f6e:	4631      	mov	r1, r6
+ 8007f70:	4628      	mov	r0, r5
+ 8007f72:	920b      	str	r2, [sp, #44]	; 0x2c
+ 8007f74:	47b8      	blx	r7
+ 8007f76:	3001      	adds	r0, #1
+ 8007f78:	f43f ae99 	beq.w	8007cae <_printf_float+0xb6>
+ 8007f7c:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
+ 8007f7e:	f10b 0b01 	add.w	fp, fp, #1
+ 8007f82:	e7b9      	b.n	8007ef8 <_printf_float+0x300>
+ 8007f84:	4631      	mov	r1, r6
+ 8007f86:	e9dd 2309 	ldrd	r2, r3, [sp, #36]	; 0x24
+ 8007f8a:	4628      	mov	r0, r5
+ 8007f8c:	47b8      	blx	r7
+ 8007f8e:	3001      	adds	r0, #1
+ 8007f90:	d1bf      	bne.n	8007f12 <_printf_float+0x31a>
+ 8007f92:	e68c      	b.n	8007cae <_printf_float+0xb6>
+ 8007f94:	464b      	mov	r3, r9
+ 8007f96:	4631      	mov	r1, r6
+ 8007f98:	4628      	mov	r0, r5
+ 8007f9a:	eb08 020a 	add.w	r2, r8, sl
  8007f9e:	47b8      	blx	r7
  8007fa0:	3001      	adds	r0, #1
- 8007fa2:	d10e      	bne.n	8007fc2 <_printf_float+0x416>
- 8007fa4:	e65d      	b.n	8007c62 <_printf_float+0xb6>
- 8007fa6:	2301      	movs	r3, #1
- 8007fa8:	464a      	mov	r2, r9
- 8007faa:	4631      	mov	r1, r6
- 8007fac:	4628      	mov	r0, r5
- 8007fae:	47b8      	blx	r7
- 8007fb0:	3001      	adds	r0, #1
- 8007fb2:	f43f ae56 	beq.w	8007c62 <_printf_float+0xb6>
- 8007fb6:	f108 0801 	add.w	r8, r8, #1
- 8007fba:	9b0e      	ldr	r3, [sp, #56]	; 0x38
- 8007fbc:	3b01      	subs	r3, #1
- 8007fbe:	4543      	cmp	r3, r8
- 8007fc0:	dcf1      	bgt.n	8007fa6 <_printf_float+0x3fa>
- 8007fc2:	4653      	mov	r3, sl
- 8007fc4:	f104 0250 	add.w	r2, r4, #80	; 0x50
- 8007fc8:	e6e0      	b.n	8007d8c <_printf_float+0x1e0>
- 8007fca:	f04f 0800 	mov.w	r8, #0
- 8007fce:	f104 091a 	add.w	r9, r4, #26
- 8007fd2:	e7f2      	b.n	8007fba <_printf_float+0x40e>
- 8007fd4:	2301      	movs	r3, #1
- 8007fd6:	4642      	mov	r2, r8
- 8007fd8:	e7df      	b.n	8007f9a <_printf_float+0x3ee>
- 8007fda:	2301      	movs	r3, #1
- 8007fdc:	464a      	mov	r2, r9
- 8007fde:	4631      	mov	r1, r6
- 8007fe0:	4628      	mov	r0, r5
- 8007fe2:	47b8      	blx	r7
- 8007fe4:	3001      	adds	r0, #1
- 8007fe6:	f43f ae3c 	beq.w	8007c62 <_printf_float+0xb6>
- 8007fea:	f108 0801 	add.w	r8, r8, #1
- 8007fee:	68e3      	ldr	r3, [r4, #12]
- 8007ff0:	990f      	ldr	r1, [sp, #60]	; 0x3c
- 8007ff2:	1a5b      	subs	r3, r3, r1
- 8007ff4:	4543      	cmp	r3, r8
- 8007ff6:	dcf0      	bgt.n	8007fda <_printf_float+0x42e>
- 8007ff8:	e6fd      	b.n	8007df6 <_printf_float+0x24a>
- 8007ffa:	f04f 0800 	mov.w	r8, #0
- 8007ffe:	f104 0919 	add.w	r9, r4, #25
- 8008002:	e7f4      	b.n	8007fee <_printf_float+0x442>
+ 8007fa2:	d1c2      	bne.n	8007f2a <_printf_float+0x332>
+ 8007fa4:	e683      	b.n	8007cae <_printf_float+0xb6>
+ 8007fa6:	9a0e      	ldr	r2, [sp, #56]	; 0x38
+ 8007fa8:	2a01      	cmp	r2, #1
+ 8007faa:	dc01      	bgt.n	8007fb0 <_printf_float+0x3b8>
+ 8007fac:	07db      	lsls	r3, r3, #31
+ 8007fae:	d539      	bpl.n	8008024 <_printf_float+0x42c>
+ 8007fb0:	2301      	movs	r3, #1
+ 8007fb2:	4642      	mov	r2, r8
+ 8007fb4:	4631      	mov	r1, r6
+ 8007fb6:	4628      	mov	r0, r5
+ 8007fb8:	47b8      	blx	r7
+ 8007fba:	3001      	adds	r0, #1
+ 8007fbc:	f43f ae77 	beq.w	8007cae <_printf_float+0xb6>
+ 8007fc0:	e9dd 2309 	ldrd	r2, r3, [sp, #36]	; 0x24
+ 8007fc4:	4631      	mov	r1, r6
+ 8007fc6:	4628      	mov	r0, r5
+ 8007fc8:	47b8      	blx	r7
+ 8007fca:	3001      	adds	r0, #1
+ 8007fcc:	f43f ae6f 	beq.w	8007cae <_printf_float+0xb6>
+ 8007fd0:	e9d4 0112 	ldrd	r0, r1, [r4, #72]	; 0x48
+ 8007fd4:	2200      	movs	r2, #0
+ 8007fd6:	2300      	movs	r3, #0
+ 8007fd8:	f8dd 9038 	ldr.w	r9, [sp, #56]	; 0x38
+ 8007fdc:	f7f8 fd50 	bl	8000a80 <__aeabi_dcmpeq>
+ 8007fe0:	b9d8      	cbnz	r0, 800801a <_printf_float+0x422>
+ 8007fe2:	f109 33ff 	add.w	r3, r9, #4294967295
+ 8007fe6:	f108 0201 	add.w	r2, r8, #1
+ 8007fea:	4631      	mov	r1, r6
+ 8007fec:	4628      	mov	r0, r5
+ 8007fee:	47b8      	blx	r7
+ 8007ff0:	3001      	adds	r0, #1
+ 8007ff2:	d10e      	bne.n	8008012 <_printf_float+0x41a>
+ 8007ff4:	e65b      	b.n	8007cae <_printf_float+0xb6>
+ 8007ff6:	2301      	movs	r3, #1
+ 8007ff8:	464a      	mov	r2, r9
+ 8007ffa:	4631      	mov	r1, r6
+ 8007ffc:	4628      	mov	r0, r5
+ 8007ffe:	47b8      	blx	r7
+ 8008000:	3001      	adds	r0, #1
+ 8008002:	f43f ae54 	beq.w	8007cae <_printf_float+0xb6>
+ 8008006:	f108 0801 	add.w	r8, r8, #1
+ 800800a:	9b0e      	ldr	r3, [sp, #56]	; 0x38
+ 800800c:	3b01      	subs	r3, #1
+ 800800e:	4543      	cmp	r3, r8
+ 8008010:	dcf1      	bgt.n	8007ff6 <_printf_float+0x3fe>
+ 8008012:	4653      	mov	r3, sl
+ 8008014:	f104 0250 	add.w	r2, r4, #80	; 0x50
+ 8008018:	e6de      	b.n	8007dd8 <_printf_float+0x1e0>
+ 800801a:	f04f 0800 	mov.w	r8, #0
+ 800801e:	f104 091a 	add.w	r9, r4, #26
+ 8008022:	e7f2      	b.n	800800a <_printf_float+0x412>
+ 8008024:	2301      	movs	r3, #1
+ 8008026:	4642      	mov	r2, r8
+ 8008028:	e7df      	b.n	8007fea <_printf_float+0x3f2>
+ 800802a:	2301      	movs	r3, #1
+ 800802c:	464a      	mov	r2, r9
+ 800802e:	4631      	mov	r1, r6
+ 8008030:	4628      	mov	r0, r5
+ 8008032:	47b8      	blx	r7
+ 8008034:	3001      	adds	r0, #1
+ 8008036:	f43f ae3a 	beq.w	8007cae <_printf_float+0xb6>
+ 800803a:	f108 0801 	add.w	r8, r8, #1
+ 800803e:	68e3      	ldr	r3, [r4, #12]
+ 8008040:	990f      	ldr	r1, [sp, #60]	; 0x3c
+ 8008042:	1a5b      	subs	r3, r3, r1
+ 8008044:	4543      	cmp	r3, r8
+ 8008046:	dcf0      	bgt.n	800802a <_printf_float+0x432>
+ 8008048:	e6fb      	b.n	8007e42 <_printf_float+0x24a>
+ 800804a:	f04f 0800 	mov.w	r8, #0
+ 800804e:	f104 0919 	add.w	r9, r4, #25
+ 8008052:	e7f4      	b.n	800803e <_printf_float+0x446>
 
-08008004 <_printf_common>:
- 8008004:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8008008:	4616      	mov	r6, r2
- 800800a:	4699      	mov	r9, r3
- 800800c:	688a      	ldr	r2, [r1, #8]
- 800800e:	690b      	ldr	r3, [r1, #16]
- 8008010:	4607      	mov	r7, r0
- 8008012:	4293      	cmp	r3, r2
- 8008014:	bfb8      	it	lt
- 8008016:	4613      	movlt	r3, r2
- 8008018:	6033      	str	r3, [r6, #0]
- 800801a:	f891 2043 	ldrb.w	r2, [r1, #67]	; 0x43
- 800801e:	460c      	mov	r4, r1
- 8008020:	f8dd 8020 	ldr.w	r8, [sp, #32]
- 8008024:	b10a      	cbz	r2, 800802a <_printf_common+0x26>
- 8008026:	3301      	adds	r3, #1
- 8008028:	6033      	str	r3, [r6, #0]
- 800802a:	6823      	ldr	r3, [r4, #0]
- 800802c:	0699      	lsls	r1, r3, #26
- 800802e:	bf42      	ittt	mi
- 8008030:	6833      	ldrmi	r3, [r6, #0]
- 8008032:	3302      	addmi	r3, #2
- 8008034:	6033      	strmi	r3, [r6, #0]
- 8008036:	6825      	ldr	r5, [r4, #0]
- 8008038:	f015 0506 	ands.w	r5, r5, #6
- 800803c:	d106      	bne.n	800804c <_printf_common+0x48>
- 800803e:	f104 0a19 	add.w	sl, r4, #25
- 8008042:	68e3      	ldr	r3, [r4, #12]
- 8008044:	6832      	ldr	r2, [r6, #0]
- 8008046:	1a9b      	subs	r3, r3, r2
- 8008048:	42ab      	cmp	r3, r5
- 800804a:	dc28      	bgt.n	800809e <_printf_common+0x9a>
- 800804c:	f894 2043 	ldrb.w	r2, [r4, #67]	; 0x43
- 8008050:	1e13      	subs	r3, r2, #0
- 8008052:	6822      	ldr	r2, [r4, #0]
- 8008054:	bf18      	it	ne
- 8008056:	2301      	movne	r3, #1
- 8008058:	0692      	lsls	r2, r2, #26
- 800805a:	d42d      	bmi.n	80080b8 <_printf_common+0xb4>
- 800805c:	4649      	mov	r1, r9
- 800805e:	4638      	mov	r0, r7
- 8008060:	f104 0243 	add.w	r2, r4, #67	; 0x43
- 8008064:	47c0      	blx	r8
- 8008066:	3001      	adds	r0, #1
- 8008068:	d020      	beq.n	80080ac <_printf_common+0xa8>
- 800806a:	6823      	ldr	r3, [r4, #0]
- 800806c:	68e5      	ldr	r5, [r4, #12]
- 800806e:	f003 0306 	and.w	r3, r3, #6
- 8008072:	2b04      	cmp	r3, #4
- 8008074:	bf18      	it	ne
- 8008076:	2500      	movne	r5, #0
- 8008078:	6832      	ldr	r2, [r6, #0]
- 800807a:	f04f 0600 	mov.w	r6, #0
- 800807e:	68a3      	ldr	r3, [r4, #8]
- 8008080:	bf08      	it	eq
- 8008082:	1aad      	subeq	r5, r5, r2
- 8008084:	6922      	ldr	r2, [r4, #16]
- 8008086:	bf08      	it	eq
- 8008088:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
- 800808c:	4293      	cmp	r3, r2
- 800808e:	bfc4      	itt	gt
- 8008090:	1a9b      	subgt	r3, r3, r2
- 8008092:	18ed      	addgt	r5, r5, r3
- 8008094:	341a      	adds	r4, #26
- 8008096:	42b5      	cmp	r5, r6
- 8008098:	d11a      	bne.n	80080d0 <_printf_common+0xcc>
- 800809a:	2000      	movs	r0, #0
- 800809c:	e008      	b.n	80080b0 <_printf_common+0xac>
- 800809e:	2301      	movs	r3, #1
- 80080a0:	4652      	mov	r2, sl
- 80080a2:	4649      	mov	r1, r9
- 80080a4:	4638      	mov	r0, r7
- 80080a6:	47c0      	blx	r8
- 80080a8:	3001      	adds	r0, #1
- 80080aa:	d103      	bne.n	80080b4 <_printf_common+0xb0>
- 80080ac:	f04f 30ff 	mov.w	r0, #4294967295
- 80080b0:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 80080b4:	3501      	adds	r5, #1
- 80080b6:	e7c4      	b.n	8008042 <_printf_common+0x3e>
- 80080b8:	2030      	movs	r0, #48	; 0x30
- 80080ba:	18e1      	adds	r1, r4, r3
- 80080bc:	f881 0043 	strb.w	r0, [r1, #67]	; 0x43
- 80080c0:	1c5a      	adds	r2, r3, #1
- 80080c2:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
- 80080c6:	4422      	add	r2, r4
- 80080c8:	3302      	adds	r3, #2
- 80080ca:	f882 1043 	strb.w	r1, [r2, #67]	; 0x43
- 80080ce:	e7c5      	b.n	800805c <_printf_common+0x58>
- 80080d0:	2301      	movs	r3, #1
- 80080d2:	4622      	mov	r2, r4
- 80080d4:	4649      	mov	r1, r9
- 80080d6:	4638      	mov	r0, r7
- 80080d8:	47c0      	blx	r8
- 80080da:	3001      	adds	r0, #1
- 80080dc:	d0e6      	beq.n	80080ac <_printf_common+0xa8>
- 80080de:	3601      	adds	r6, #1
- 80080e0:	e7d9      	b.n	8008096 <_printf_common+0x92>
+08008054 <_printf_common>:
+ 8008054:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+ 8008058:	4616      	mov	r6, r2
+ 800805a:	4699      	mov	r9, r3
+ 800805c:	688a      	ldr	r2, [r1, #8]
+ 800805e:	690b      	ldr	r3, [r1, #16]
+ 8008060:	4607      	mov	r7, r0
+ 8008062:	4293      	cmp	r3, r2
+ 8008064:	bfb8      	it	lt
+ 8008066:	4613      	movlt	r3, r2
+ 8008068:	6033      	str	r3, [r6, #0]
+ 800806a:	f891 2043 	ldrb.w	r2, [r1, #67]	; 0x43
+ 800806e:	460c      	mov	r4, r1
+ 8008070:	f8dd 8020 	ldr.w	r8, [sp, #32]
+ 8008074:	b10a      	cbz	r2, 800807a <_printf_common+0x26>
+ 8008076:	3301      	adds	r3, #1
+ 8008078:	6033      	str	r3, [r6, #0]
+ 800807a:	6823      	ldr	r3, [r4, #0]
+ 800807c:	0699      	lsls	r1, r3, #26
+ 800807e:	bf42      	ittt	mi
+ 8008080:	6833      	ldrmi	r3, [r6, #0]
+ 8008082:	3302      	addmi	r3, #2
+ 8008084:	6033      	strmi	r3, [r6, #0]
+ 8008086:	6825      	ldr	r5, [r4, #0]
+ 8008088:	f015 0506 	ands.w	r5, r5, #6
+ 800808c:	d106      	bne.n	800809c <_printf_common+0x48>
+ 800808e:	f104 0a19 	add.w	sl, r4, #25
+ 8008092:	68e3      	ldr	r3, [r4, #12]
+ 8008094:	6832      	ldr	r2, [r6, #0]
+ 8008096:	1a9b      	subs	r3, r3, r2
+ 8008098:	42ab      	cmp	r3, r5
+ 800809a:	dc2b      	bgt.n	80080f4 <_printf_common+0xa0>
+ 800809c:	f894 2043 	ldrb.w	r2, [r4, #67]	; 0x43
+ 80080a0:	1e13      	subs	r3, r2, #0
+ 80080a2:	6822      	ldr	r2, [r4, #0]
+ 80080a4:	bf18      	it	ne
+ 80080a6:	2301      	movne	r3, #1
+ 80080a8:	0692      	lsls	r2, r2, #26
+ 80080aa:	d430      	bmi.n	800810e <_printf_common+0xba>
+ 80080ac:	4649      	mov	r1, r9
+ 80080ae:	4638      	mov	r0, r7
+ 80080b0:	f104 0243 	add.w	r2, r4, #67	; 0x43
+ 80080b4:	47c0      	blx	r8
+ 80080b6:	3001      	adds	r0, #1
+ 80080b8:	d023      	beq.n	8008102 <_printf_common+0xae>
+ 80080ba:	6823      	ldr	r3, [r4, #0]
+ 80080bc:	6922      	ldr	r2, [r4, #16]
+ 80080be:	f003 0306 	and.w	r3, r3, #6
+ 80080c2:	2b04      	cmp	r3, #4
+ 80080c4:	bf14      	ite	ne
+ 80080c6:	2500      	movne	r5, #0
+ 80080c8:	6833      	ldreq	r3, [r6, #0]
+ 80080ca:	f04f 0600 	mov.w	r6, #0
+ 80080ce:	bf08      	it	eq
+ 80080d0:	68e5      	ldreq	r5, [r4, #12]
+ 80080d2:	f104 041a 	add.w	r4, r4, #26
+ 80080d6:	bf08      	it	eq
+ 80080d8:	1aed      	subeq	r5, r5, r3
+ 80080da:	f854 3c12 	ldr.w	r3, [r4, #-18]
+ 80080de:	bf08      	it	eq
+ 80080e0:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
+ 80080e4:	4293      	cmp	r3, r2
+ 80080e6:	bfc4      	itt	gt
+ 80080e8:	1a9b      	subgt	r3, r3, r2
+ 80080ea:	18ed      	addgt	r5, r5, r3
+ 80080ec:	42b5      	cmp	r5, r6
+ 80080ee:	d11a      	bne.n	8008126 <_printf_common+0xd2>
+ 80080f0:	2000      	movs	r0, #0
+ 80080f2:	e008      	b.n	8008106 <_printf_common+0xb2>
+ 80080f4:	2301      	movs	r3, #1
+ 80080f6:	4652      	mov	r2, sl
+ 80080f8:	4649      	mov	r1, r9
+ 80080fa:	4638      	mov	r0, r7
+ 80080fc:	47c0      	blx	r8
+ 80080fe:	3001      	adds	r0, #1
+ 8008100:	d103      	bne.n	800810a <_printf_common+0xb6>
+ 8008102:	f04f 30ff 	mov.w	r0, #4294967295
+ 8008106:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 800810a:	3501      	adds	r5, #1
+ 800810c:	e7c1      	b.n	8008092 <_printf_common+0x3e>
+ 800810e:	2030      	movs	r0, #48	; 0x30
+ 8008110:	18e1      	adds	r1, r4, r3
+ 8008112:	f881 0043 	strb.w	r0, [r1, #67]	; 0x43
+ 8008116:	1c5a      	adds	r2, r3, #1
+ 8008118:	f894 1045 	ldrb.w	r1, [r4, #69]	; 0x45
+ 800811c:	4422      	add	r2, r4
+ 800811e:	3302      	adds	r3, #2
+ 8008120:	f882 1043 	strb.w	r1, [r2, #67]	; 0x43
+ 8008124:	e7c2      	b.n	80080ac <_printf_common+0x58>
+ 8008126:	2301      	movs	r3, #1
+ 8008128:	4622      	mov	r2, r4
+ 800812a:	4649      	mov	r1, r9
+ 800812c:	4638      	mov	r0, r7
+ 800812e:	47c0      	blx	r8
+ 8008130:	3001      	adds	r0, #1
+ 8008132:	d0e6      	beq.n	8008102 <_printf_common+0xae>
+ 8008134:	3601      	adds	r6, #1
+ 8008136:	e7d9      	b.n	80080ec <_printf_common+0x98>
+
+08008138 <_printf_i>:
+ 8008138:	e92d 47ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
+ 800813c:	7e0f      	ldrb	r7, [r1, #24]
+ 800813e:	4691      	mov	r9, r2
+ 8008140:	2f78      	cmp	r7, #120	; 0x78
+ 8008142:	4680      	mov	r8, r0
+ 8008144:	460c      	mov	r4, r1
+ 8008146:	469a      	mov	sl, r3
+ 8008148:	9d0c      	ldr	r5, [sp, #48]	; 0x30
+ 800814a:	f101 0243 	add.w	r2, r1, #67	; 0x43
+ 800814e:	d807      	bhi.n	8008160 <_printf_i+0x28>
+ 8008150:	2f62      	cmp	r7, #98	; 0x62
+ 8008152:	d80a      	bhi.n	800816a <_printf_i+0x32>
+ 8008154:	2f00      	cmp	r7, #0
+ 8008156:	f000 80d5 	beq.w	8008304 <_printf_i+0x1cc>
+ 800815a:	2f58      	cmp	r7, #88	; 0x58
+ 800815c:	f000 80c1 	beq.w	80082e2 <_printf_i+0x1aa>
+ 8008160:	f104 0542 	add.w	r5, r4, #66	; 0x42
+ 8008164:	f884 7042 	strb.w	r7, [r4, #66]	; 0x42
+ 8008168:	e03a      	b.n	80081e0 <_printf_i+0xa8>
+ 800816a:	f1a7 0363 	sub.w	r3, r7, #99	; 0x63
+ 800816e:	2b15      	cmp	r3, #21
+ 8008170:	d8f6      	bhi.n	8008160 <_printf_i+0x28>
+ 8008172:	a101      	add	r1, pc, #4	; (adr r1, 8008178 <_printf_i+0x40>)
+ 8008174:	f851 f023 	ldr.w	pc, [r1, r3, lsl #2]
+ 8008178:	080081d1 	.word	0x080081d1
+ 800817c:	080081e5 	.word	0x080081e5
+ 8008180:	08008161 	.word	0x08008161
+ 8008184:	08008161 	.word	0x08008161
+ 8008188:	08008161 	.word	0x08008161
+ 800818c:	08008161 	.word	0x08008161
+ 8008190:	080081e5 	.word	0x080081e5
+ 8008194:	08008161 	.word	0x08008161
+ 8008198:	08008161 	.word	0x08008161
+ 800819c:	08008161 	.word	0x08008161
+ 80081a0:	08008161 	.word	0x08008161
+ 80081a4:	080082eb 	.word	0x080082eb
+ 80081a8:	08008211 	.word	0x08008211
+ 80081ac:	080082a5 	.word	0x080082a5
+ 80081b0:	08008161 	.word	0x08008161
+ 80081b4:	08008161 	.word	0x08008161
+ 80081b8:	0800830d 	.word	0x0800830d
+ 80081bc:	08008161 	.word	0x08008161
+ 80081c0:	08008211 	.word	0x08008211
+ 80081c4:	08008161 	.word	0x08008161
+ 80081c8:	08008161 	.word	0x08008161
+ 80081cc:	080082ad 	.word	0x080082ad
+ 80081d0:	682b      	ldr	r3, [r5, #0]
+ 80081d2:	1d1a      	adds	r2, r3, #4
+ 80081d4:	681b      	ldr	r3, [r3, #0]
+ 80081d6:	602a      	str	r2, [r5, #0]
+ 80081d8:	f104 0542 	add.w	r5, r4, #66	; 0x42
+ 80081dc:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
+ 80081e0:	2301      	movs	r3, #1
+ 80081e2:	e0a0      	b.n	8008326 <_printf_i+0x1ee>
+ 80081e4:	6820      	ldr	r0, [r4, #0]
+ 80081e6:	682b      	ldr	r3, [r5, #0]
+ 80081e8:	0607      	lsls	r7, r0, #24
+ 80081ea:	f103 0104 	add.w	r1, r3, #4
+ 80081ee:	6029      	str	r1, [r5, #0]
+ 80081f0:	d501      	bpl.n	80081f6 <_printf_i+0xbe>
+ 80081f2:	681e      	ldr	r6, [r3, #0]
+ 80081f4:	e003      	b.n	80081fe <_printf_i+0xc6>
+ 80081f6:	0646      	lsls	r6, r0, #25
+ 80081f8:	d5fb      	bpl.n	80081f2 <_printf_i+0xba>
+ 80081fa:	f9b3 6000 	ldrsh.w	r6, [r3]
+ 80081fe:	2e00      	cmp	r6, #0
+ 8008200:	da03      	bge.n	800820a <_printf_i+0xd2>
+ 8008202:	232d      	movs	r3, #45	; 0x2d
+ 8008204:	4276      	negs	r6, r6
+ 8008206:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
+ 800820a:	230a      	movs	r3, #10
+ 800820c:	4859      	ldr	r0, [pc, #356]	; (8008374 <_printf_i+0x23c>)
+ 800820e:	e012      	b.n	8008236 <_printf_i+0xfe>
+ 8008210:	682b      	ldr	r3, [r5, #0]
+ 8008212:	6820      	ldr	r0, [r4, #0]
+ 8008214:	1d19      	adds	r1, r3, #4
+ 8008216:	6029      	str	r1, [r5, #0]
+ 8008218:	0605      	lsls	r5, r0, #24
+ 800821a:	d501      	bpl.n	8008220 <_printf_i+0xe8>
+ 800821c:	681e      	ldr	r6, [r3, #0]
+ 800821e:	e002      	b.n	8008226 <_printf_i+0xee>
+ 8008220:	0641      	lsls	r1, r0, #25
+ 8008222:	d5fb      	bpl.n	800821c <_printf_i+0xe4>
+ 8008224:	881e      	ldrh	r6, [r3, #0]
+ 8008226:	2f6f      	cmp	r7, #111	; 0x6f
+ 8008228:	bf0c      	ite	eq
+ 800822a:	2308      	moveq	r3, #8
+ 800822c:	230a      	movne	r3, #10
+ 800822e:	4851      	ldr	r0, [pc, #324]	; (8008374 <_printf_i+0x23c>)
+ 8008230:	2100      	movs	r1, #0
+ 8008232:	f884 1043 	strb.w	r1, [r4, #67]	; 0x43
+ 8008236:	6865      	ldr	r5, [r4, #4]
+ 8008238:	2d00      	cmp	r5, #0
+ 800823a:	bfa8      	it	ge
+ 800823c:	6821      	ldrge	r1, [r4, #0]
+ 800823e:	60a5      	str	r5, [r4, #8]
+ 8008240:	bfa4      	itt	ge
+ 8008242:	f021 0104 	bicge.w	r1, r1, #4
+ 8008246:	6021      	strge	r1, [r4, #0]
+ 8008248:	b90e      	cbnz	r6, 800824e <_printf_i+0x116>
+ 800824a:	2d00      	cmp	r5, #0
+ 800824c:	d04b      	beq.n	80082e6 <_printf_i+0x1ae>
+ 800824e:	4615      	mov	r5, r2
+ 8008250:	fbb6 f1f3 	udiv	r1, r6, r3
+ 8008254:	fb03 6711 	mls	r7, r3, r1, r6
+ 8008258:	5dc7      	ldrb	r7, [r0, r7]
+ 800825a:	f805 7d01 	strb.w	r7, [r5, #-1]!
+ 800825e:	4637      	mov	r7, r6
+ 8008260:	42bb      	cmp	r3, r7
+ 8008262:	460e      	mov	r6, r1
+ 8008264:	d9f4      	bls.n	8008250 <_printf_i+0x118>
+ 8008266:	2b08      	cmp	r3, #8
+ 8008268:	d10b      	bne.n	8008282 <_printf_i+0x14a>
+ 800826a:	6823      	ldr	r3, [r4, #0]
+ 800826c:	07de      	lsls	r6, r3, #31
+ 800826e:	d508      	bpl.n	8008282 <_printf_i+0x14a>
+ 8008270:	6923      	ldr	r3, [r4, #16]
+ 8008272:	6861      	ldr	r1, [r4, #4]
+ 8008274:	4299      	cmp	r1, r3
+ 8008276:	bfde      	ittt	le
+ 8008278:	2330      	movle	r3, #48	; 0x30
+ 800827a:	f805 3c01 	strble.w	r3, [r5, #-1]
+ 800827e:	f105 35ff 	addle.w	r5, r5, #4294967295
+ 8008282:	1b52      	subs	r2, r2, r5
+ 8008284:	6122      	str	r2, [r4, #16]
+ 8008286:	464b      	mov	r3, r9
+ 8008288:	4621      	mov	r1, r4
+ 800828a:	4640      	mov	r0, r8
+ 800828c:	f8cd a000 	str.w	sl, [sp]
+ 8008290:	aa03      	add	r2, sp, #12
+ 8008292:	f7ff fedf 	bl	8008054 <_printf_common>
+ 8008296:	3001      	adds	r0, #1
+ 8008298:	d14a      	bne.n	8008330 <_printf_i+0x1f8>
+ 800829a:	f04f 30ff 	mov.w	r0, #4294967295
+ 800829e:	b004      	add	sp, #16
+ 80082a0:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 80082a4:	6823      	ldr	r3, [r4, #0]
+ 80082a6:	f043 0320 	orr.w	r3, r3, #32
+ 80082aa:	6023      	str	r3, [r4, #0]
+ 80082ac:	2778      	movs	r7, #120	; 0x78
+ 80082ae:	4832      	ldr	r0, [pc, #200]	; (8008378 <_printf_i+0x240>)
+ 80082b0:	f884 7045 	strb.w	r7, [r4, #69]	; 0x45
+ 80082b4:	6823      	ldr	r3, [r4, #0]
+ 80082b6:	6829      	ldr	r1, [r5, #0]
+ 80082b8:	061f      	lsls	r7, r3, #24
+ 80082ba:	f851 6b04 	ldr.w	r6, [r1], #4
+ 80082be:	d402      	bmi.n	80082c6 <_printf_i+0x18e>
+ 80082c0:	065f      	lsls	r7, r3, #25
+ 80082c2:	bf48      	it	mi
+ 80082c4:	b2b6      	uxthmi	r6, r6
+ 80082c6:	07df      	lsls	r7, r3, #31
+ 80082c8:	bf48      	it	mi
+ 80082ca:	f043 0320 	orrmi.w	r3, r3, #32
+ 80082ce:	6029      	str	r1, [r5, #0]
+ 80082d0:	bf48      	it	mi
+ 80082d2:	6023      	strmi	r3, [r4, #0]
+ 80082d4:	b91e      	cbnz	r6, 80082de <_printf_i+0x1a6>
+ 80082d6:	6823      	ldr	r3, [r4, #0]
+ 80082d8:	f023 0320 	bic.w	r3, r3, #32
+ 80082dc:	6023      	str	r3, [r4, #0]
+ 80082de:	2310      	movs	r3, #16
+ 80082e0:	e7a6      	b.n	8008230 <_printf_i+0xf8>
+ 80082e2:	4824      	ldr	r0, [pc, #144]	; (8008374 <_printf_i+0x23c>)
+ 80082e4:	e7e4      	b.n	80082b0 <_printf_i+0x178>
+ 80082e6:	4615      	mov	r5, r2
+ 80082e8:	e7bd      	b.n	8008266 <_printf_i+0x12e>
+ 80082ea:	682b      	ldr	r3, [r5, #0]
+ 80082ec:	6826      	ldr	r6, [r4, #0]
+ 80082ee:	1d18      	adds	r0, r3, #4
+ 80082f0:	6961      	ldr	r1, [r4, #20]
+ 80082f2:	6028      	str	r0, [r5, #0]
+ 80082f4:	0635      	lsls	r5, r6, #24
+ 80082f6:	681b      	ldr	r3, [r3, #0]
+ 80082f8:	d501      	bpl.n	80082fe <_printf_i+0x1c6>
+ 80082fa:	6019      	str	r1, [r3, #0]
+ 80082fc:	e002      	b.n	8008304 <_printf_i+0x1cc>
+ 80082fe:	0670      	lsls	r0, r6, #25
+ 8008300:	d5fb      	bpl.n	80082fa <_printf_i+0x1c2>
+ 8008302:	8019      	strh	r1, [r3, #0]
+ 8008304:	2300      	movs	r3, #0
+ 8008306:	4615      	mov	r5, r2
+ 8008308:	6123      	str	r3, [r4, #16]
+ 800830a:	e7bc      	b.n	8008286 <_printf_i+0x14e>
+ 800830c:	682b      	ldr	r3, [r5, #0]
+ 800830e:	2100      	movs	r1, #0
+ 8008310:	1d1a      	adds	r2, r3, #4
+ 8008312:	602a      	str	r2, [r5, #0]
+ 8008314:	681d      	ldr	r5, [r3, #0]
+ 8008316:	6862      	ldr	r2, [r4, #4]
+ 8008318:	4628      	mov	r0, r5
+ 800831a:	f000 fa78 	bl	800880e <memchr>
+ 800831e:	b108      	cbz	r0, 8008324 <_printf_i+0x1ec>
+ 8008320:	1b40      	subs	r0, r0, r5
+ 8008322:	6060      	str	r0, [r4, #4]
+ 8008324:	6863      	ldr	r3, [r4, #4]
+ 8008326:	6123      	str	r3, [r4, #16]
+ 8008328:	2300      	movs	r3, #0
+ 800832a:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
+ 800832e:	e7aa      	b.n	8008286 <_printf_i+0x14e>
+ 8008330:	462a      	mov	r2, r5
+ 8008332:	4649      	mov	r1, r9
+ 8008334:	4640      	mov	r0, r8
+ 8008336:	6923      	ldr	r3, [r4, #16]
+ 8008338:	47d0      	blx	sl
+ 800833a:	3001      	adds	r0, #1
+ 800833c:	d0ad      	beq.n	800829a <_printf_i+0x162>
+ 800833e:	6823      	ldr	r3, [r4, #0]
+ 8008340:	079b      	lsls	r3, r3, #30
+ 8008342:	d413      	bmi.n	800836c <_printf_i+0x234>
+ 8008344:	68e0      	ldr	r0, [r4, #12]
+ 8008346:	9b03      	ldr	r3, [sp, #12]
+ 8008348:	4298      	cmp	r0, r3
+ 800834a:	bfb8      	it	lt
+ 800834c:	4618      	movlt	r0, r3
+ 800834e:	e7a6      	b.n	800829e <_printf_i+0x166>
+ 8008350:	2301      	movs	r3, #1
+ 8008352:	4632      	mov	r2, r6
+ 8008354:	4649      	mov	r1, r9
+ 8008356:	4640      	mov	r0, r8
+ 8008358:	47d0      	blx	sl
+ 800835a:	3001      	adds	r0, #1
+ 800835c:	d09d      	beq.n	800829a <_printf_i+0x162>
+ 800835e:	3501      	adds	r5, #1
+ 8008360:	68e3      	ldr	r3, [r4, #12]
+ 8008362:	9903      	ldr	r1, [sp, #12]
+ 8008364:	1a5b      	subs	r3, r3, r1
+ 8008366:	42ab      	cmp	r3, r5
+ 8008368:	dcf2      	bgt.n	8008350 <_printf_i+0x218>
+ 800836a:	e7eb      	b.n	8008344 <_printf_i+0x20c>
+ 800836c:	2500      	movs	r5, #0
+ 800836e:	f104 0619 	add.w	r6, r4, #25
+ 8008372:	e7f5      	b.n	8008360 <_printf_i+0x228>
+ 8008374:	0800b254 	.word	0x0800b254
+ 8008378:	0800b265 	.word	0x0800b265
+
+0800837c <std>:
+ 800837c:	2300      	movs	r3, #0
+ 800837e:	b510      	push	{r4, lr}
+ 8008380:	4604      	mov	r4, r0
+ 8008382:	e9c0 3300 	strd	r3, r3, [r0]
+ 8008386:	e9c0 3304 	strd	r3, r3, [r0, #16]
+ 800838a:	6083      	str	r3, [r0, #8]
+ 800838c:	8181      	strh	r1, [r0, #12]
+ 800838e:	6643      	str	r3, [r0, #100]	; 0x64
+ 8008390:	81c2      	strh	r2, [r0, #14]
+ 8008392:	6183      	str	r3, [r0, #24]
+ 8008394:	4619      	mov	r1, r3
+ 8008396:	2208      	movs	r2, #8
+ 8008398:	305c      	adds	r0, #92	; 0x5c
+ 800839a:	f000 f9a9 	bl	80086f0 <memset>
+ 800839e:	4b0d      	ldr	r3, [pc, #52]	; (80083d4 <std+0x58>)
+ 80083a0:	6224      	str	r4, [r4, #32]
+ 80083a2:	6263      	str	r3, [r4, #36]	; 0x24
+ 80083a4:	4b0c      	ldr	r3, [pc, #48]	; (80083d8 <std+0x5c>)
+ 80083a6:	62a3      	str	r3, [r4, #40]	; 0x28
+ 80083a8:	4b0c      	ldr	r3, [pc, #48]	; (80083dc <std+0x60>)
+ 80083aa:	62e3      	str	r3, [r4, #44]	; 0x2c
+ 80083ac:	4b0c      	ldr	r3, [pc, #48]	; (80083e0 <std+0x64>)
+ 80083ae:	6323      	str	r3, [r4, #48]	; 0x30
+ 80083b0:	4b0c      	ldr	r3, [pc, #48]	; (80083e4 <std+0x68>)
+ 80083b2:	429c      	cmp	r4, r3
+ 80083b4:	d006      	beq.n	80083c4 <std+0x48>
+ 80083b6:	f103 0268 	add.w	r2, r3, #104	; 0x68
+ 80083ba:	4294      	cmp	r4, r2
+ 80083bc:	d002      	beq.n	80083c4 <std+0x48>
+ 80083be:	33d0      	adds	r3, #208	; 0xd0
+ 80083c0:	429c      	cmp	r4, r3
+ 80083c2:	d105      	bne.n	80083d0 <std+0x54>
+ 80083c4:	f104 0058 	add.w	r0, r4, #88	; 0x58
+ 80083c8:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
+ 80083cc:	f000 ba1c 	b.w	8008808 <__retarget_lock_init_recursive>
+ 80083d0:	bd10      	pop	{r4, pc}
+ 80083d2:	bf00      	nop
+ 80083d4:	08008541 	.word	0x08008541
+ 80083d8:	08008563 	.word	0x08008563
+ 80083dc:	0800859b 	.word	0x0800859b
+ 80083e0:	080085bf 	.word	0x080085bf
+ 80083e4:	200025c0 	.word	0x200025c0
+
+080083e8 <stdio_exit_handler>:
+ 80083e8:	4a02      	ldr	r2, [pc, #8]	; (80083f4 <stdio_exit_handler+0xc>)
+ 80083ea:	4903      	ldr	r1, [pc, #12]	; (80083f8 <stdio_exit_handler+0x10>)
+ 80083ec:	4803      	ldr	r0, [pc, #12]	; (80083fc <stdio_exit_handler+0x14>)
+ 80083ee:	f000 b869 	b.w	80084c4 <_fwalk_sglue>
+ 80083f2:	bf00      	nop
+ 80083f4:	2000000c 	.word	0x2000000c
+ 80083f8:	0800a2c1 	.word	0x0800a2c1
+ 80083fc:	20000018 	.word	0x20000018
+
+08008400 <cleanup_stdio>:
+ 8008400:	6841      	ldr	r1, [r0, #4]
+ 8008402:	4b0c      	ldr	r3, [pc, #48]	; (8008434 <cleanup_stdio+0x34>)
+ 8008404:	b510      	push	{r4, lr}
+ 8008406:	4299      	cmp	r1, r3
+ 8008408:	4604      	mov	r4, r0
+ 800840a:	d001      	beq.n	8008410 <cleanup_stdio+0x10>
+ 800840c:	f001 ff58 	bl	800a2c0 <_fflush_r>
+ 8008410:	68a1      	ldr	r1, [r4, #8]
+ 8008412:	4b09      	ldr	r3, [pc, #36]	; (8008438 <cleanup_stdio+0x38>)
+ 8008414:	4299      	cmp	r1, r3
+ 8008416:	d002      	beq.n	800841e <cleanup_stdio+0x1e>
+ 8008418:	4620      	mov	r0, r4
+ 800841a:	f001 ff51 	bl	800a2c0 <_fflush_r>
+ 800841e:	68e1      	ldr	r1, [r4, #12]
+ 8008420:	4b06      	ldr	r3, [pc, #24]	; (800843c <cleanup_stdio+0x3c>)
+ 8008422:	4299      	cmp	r1, r3
+ 8008424:	d004      	beq.n	8008430 <cleanup_stdio+0x30>
+ 8008426:	4620      	mov	r0, r4
+ 8008428:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
+ 800842c:	f001 bf48 	b.w	800a2c0 <_fflush_r>
+ 8008430:	bd10      	pop	{r4, pc}
+ 8008432:	bf00      	nop
+ 8008434:	200025c0 	.word	0x200025c0
+ 8008438:	20002628 	.word	0x20002628
+ 800843c:	20002690 	.word	0x20002690
+
+08008440 <global_stdio_init.part.0>:
+ 8008440:	b510      	push	{r4, lr}
+ 8008442:	4b0b      	ldr	r3, [pc, #44]	; (8008470 <global_stdio_init.part.0+0x30>)
+ 8008444:	4c0b      	ldr	r4, [pc, #44]	; (8008474 <global_stdio_init.part.0+0x34>)
+ 8008446:	4a0c      	ldr	r2, [pc, #48]	; (8008478 <global_stdio_init.part.0+0x38>)
+ 8008448:	4620      	mov	r0, r4
+ 800844a:	601a      	str	r2, [r3, #0]
+ 800844c:	2104      	movs	r1, #4
+ 800844e:	2200      	movs	r2, #0
+ 8008450:	f7ff ff94 	bl	800837c <std>
+ 8008454:	f104 0068 	add.w	r0, r4, #104	; 0x68
+ 8008458:	2201      	movs	r2, #1
+ 800845a:	2109      	movs	r1, #9
+ 800845c:	f7ff ff8e 	bl	800837c <std>
+ 8008460:	f104 00d0 	add.w	r0, r4, #208	; 0xd0
+ 8008464:	2202      	movs	r2, #2
+ 8008466:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
+ 800846a:	2112      	movs	r1, #18
+ 800846c:	f7ff bf86 	b.w	800837c <std>
+ 8008470:	200026f8 	.word	0x200026f8
+ 8008474:	200025c0 	.word	0x200025c0
+ 8008478:	080083e9 	.word	0x080083e9
+
+0800847c <__sfp_lock_acquire>:
+ 800847c:	4801      	ldr	r0, [pc, #4]	; (8008484 <__sfp_lock_acquire+0x8>)
+ 800847e:	f000 b9c4 	b.w	800880a <__retarget_lock_acquire_recursive>
+ 8008482:	bf00      	nop
+ 8008484:	20002701 	.word	0x20002701
+
+08008488 <__sfp_lock_release>:
+ 8008488:	4801      	ldr	r0, [pc, #4]	; (8008490 <__sfp_lock_release+0x8>)
+ 800848a:	f000 b9bf 	b.w	800880c <__retarget_lock_release_recursive>
+ 800848e:	bf00      	nop
+ 8008490:	20002701 	.word	0x20002701
+
+08008494 <__sinit>:
+ 8008494:	b510      	push	{r4, lr}
+ 8008496:	4604      	mov	r4, r0
+ 8008498:	f7ff fff0 	bl	800847c <__sfp_lock_acquire>
+ 800849c:	6a23      	ldr	r3, [r4, #32]
+ 800849e:	b11b      	cbz	r3, 80084a8 <__sinit+0x14>
+ 80084a0:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
+ 80084a4:	f7ff bff0 	b.w	8008488 <__sfp_lock_release>
+ 80084a8:	4b04      	ldr	r3, [pc, #16]	; (80084bc <__sinit+0x28>)
+ 80084aa:	6223      	str	r3, [r4, #32]
+ 80084ac:	4b04      	ldr	r3, [pc, #16]	; (80084c0 <__sinit+0x2c>)
+ 80084ae:	681b      	ldr	r3, [r3, #0]
+ 80084b0:	2b00      	cmp	r3, #0
+ 80084b2:	d1f5      	bne.n	80084a0 <__sinit+0xc>
+ 80084b4:	f7ff ffc4 	bl	8008440 <global_stdio_init.part.0>
+ 80084b8:	e7f2      	b.n	80084a0 <__sinit+0xc>
+ 80084ba:	bf00      	nop
+ 80084bc:	08008401 	.word	0x08008401
+ 80084c0:	200026f8 	.word	0x200026f8
+
+080084c4 <_fwalk_sglue>:
+ 80084c4:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
+ 80084c8:	4607      	mov	r7, r0
+ 80084ca:	4688      	mov	r8, r1
+ 80084cc:	4614      	mov	r4, r2
+ 80084ce:	2600      	movs	r6, #0
+ 80084d0:	e9d4 9501 	ldrd	r9, r5, [r4, #4]
+ 80084d4:	f1b9 0901 	subs.w	r9, r9, #1
+ 80084d8:	d505      	bpl.n	80084e6 <_fwalk_sglue+0x22>
+ 80084da:	6824      	ldr	r4, [r4, #0]
+ 80084dc:	2c00      	cmp	r4, #0
+ 80084de:	d1f7      	bne.n	80084d0 <_fwalk_sglue+0xc>
+ 80084e0:	4630      	mov	r0, r6
+ 80084e2:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
+ 80084e6:	89ab      	ldrh	r3, [r5, #12]
+ 80084e8:	2b01      	cmp	r3, #1
+ 80084ea:	d907      	bls.n	80084fc <_fwalk_sglue+0x38>
+ 80084ec:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
+ 80084f0:	3301      	adds	r3, #1
+ 80084f2:	d003      	beq.n	80084fc <_fwalk_sglue+0x38>
+ 80084f4:	4629      	mov	r1, r5
+ 80084f6:	4638      	mov	r0, r7
+ 80084f8:	47c0      	blx	r8
+ 80084fa:	4306      	orrs	r6, r0
+ 80084fc:	3568      	adds	r5, #104	; 0x68
+ 80084fe:	e7e9      	b.n	80084d4 <_fwalk_sglue+0x10>
+
+08008500 <siprintf>:
+ 8008500:	b40e      	push	{r1, r2, r3}
+ 8008502:	f06f 4100 	mvn.w	r1, #2147483648	; 0x80000000
+ 8008506:	b500      	push	{lr}
+ 8008508:	b09c      	sub	sp, #112	; 0x70
+ 800850a:	ab1d      	add	r3, sp, #116	; 0x74
+ 800850c:	9002      	str	r0, [sp, #8]
+ 800850e:	9006      	str	r0, [sp, #24]
+ 8008510:	9107      	str	r1, [sp, #28]
+ 8008512:	9104      	str	r1, [sp, #16]
+ 8008514:	4808      	ldr	r0, [pc, #32]	; (8008538 <siprintf+0x38>)
+ 8008516:	4909      	ldr	r1, [pc, #36]	; (800853c <siprintf+0x3c>)
+ 8008518:	f853 2b04 	ldr.w	r2, [r3], #4
+ 800851c:	9105      	str	r1, [sp, #20]
+ 800851e:	6800      	ldr	r0, [r0, #0]
+ 8008520:	a902      	add	r1, sp, #8
+ 8008522:	9301      	str	r3, [sp, #4]
+ 8008524:	f001 fc0a 	bl	8009d3c <_svfiprintf_r>
+ 8008528:	2200      	movs	r2, #0
+ 800852a:	9b02      	ldr	r3, [sp, #8]
+ 800852c:	701a      	strb	r2, [r3, #0]
+ 800852e:	b01c      	add	sp, #112	; 0x70
+ 8008530:	f85d eb04 	ldr.w	lr, [sp], #4
+ 8008534:	b003      	add	sp, #12
+ 8008536:	4770      	bx	lr
+ 8008538:	20000064 	.word	0x20000064
+ 800853c:	ffff0208 	.word	0xffff0208
+
+08008540 <__sread>:
+ 8008540:	b510      	push	{r4, lr}
+ 8008542:	460c      	mov	r4, r1
+ 8008544:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
+ 8008548:	f000 f900 	bl	800874c <_read_r>
+ 800854c:	2800      	cmp	r0, #0
+ 800854e:	bfab      	itete	ge
+ 8008550:	6d63      	ldrge	r3, [r4, #84]	; 0x54
+ 8008552:	89a3      	ldrhlt	r3, [r4, #12]
+ 8008554:	181b      	addge	r3, r3, r0
+ 8008556:	f423 5380 	biclt.w	r3, r3, #4096	; 0x1000
+ 800855a:	bfac      	ite	ge
+ 800855c:	6563      	strge	r3, [r4, #84]	; 0x54
+ 800855e:	81a3      	strhlt	r3, [r4, #12]
+ 8008560:	bd10      	pop	{r4, pc}
+
+08008562 <__swrite>:
+ 8008562:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
+ 8008566:	461f      	mov	r7, r3
+ 8008568:	898b      	ldrh	r3, [r1, #12]
+ 800856a:	4605      	mov	r5, r0
+ 800856c:	05db      	lsls	r3, r3, #23
+ 800856e:	460c      	mov	r4, r1
+ 8008570:	4616      	mov	r6, r2
+ 8008572:	d505      	bpl.n	8008580 <__swrite+0x1e>
+ 8008574:	2302      	movs	r3, #2
+ 8008576:	2200      	movs	r2, #0
+ 8008578:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
+ 800857c:	f000 f8d4 	bl	8008728 <_lseek_r>
+ 8008580:	89a3      	ldrh	r3, [r4, #12]
+ 8008582:	4632      	mov	r2, r6
+ 8008584:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
+ 8008588:	81a3      	strh	r3, [r4, #12]
+ 800858a:	4628      	mov	r0, r5
+ 800858c:	463b      	mov	r3, r7
+ 800858e:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
+ 8008592:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
+ 8008596:	f000 b8fb 	b.w	8008790 <_write_r>
+
+0800859a <__sseek>:
+ 800859a:	b510      	push	{r4, lr}
+ 800859c:	460c      	mov	r4, r1
+ 800859e:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
+ 80085a2:	f000 f8c1 	bl	8008728 <_lseek_r>
+ 80085a6:	1c43      	adds	r3, r0, #1
+ 80085a8:	89a3      	ldrh	r3, [r4, #12]
+ 80085aa:	bf15      	itete	ne
+ 80085ac:	6560      	strne	r0, [r4, #84]	; 0x54
+ 80085ae:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
+ 80085b2:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
+ 80085b6:	81a3      	strheq	r3, [r4, #12]
+ 80085b8:	bf18      	it	ne
+ 80085ba:	81a3      	strhne	r3, [r4, #12]
+ 80085bc:	bd10      	pop	{r4, pc}
+
+080085be <__sclose>:
+ 80085be:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
+ 80085c2:	f000 b8a1 	b.w	8008708 <_close_r>
+
+080085c6 <__swbuf_r>:
+ 80085c6:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 80085c8:	460e      	mov	r6, r1
+ 80085ca:	4614      	mov	r4, r2
+ 80085cc:	4605      	mov	r5, r0
+ 80085ce:	b118      	cbz	r0, 80085d8 <__swbuf_r+0x12>
+ 80085d0:	6a03      	ldr	r3, [r0, #32]
+ 80085d2:	b90b      	cbnz	r3, 80085d8 <__swbuf_r+0x12>
+ 80085d4:	f7ff ff5e 	bl	8008494 <__sinit>
+ 80085d8:	69a3      	ldr	r3, [r4, #24]
+ 80085da:	60a3      	str	r3, [r4, #8]
+ 80085dc:	89a3      	ldrh	r3, [r4, #12]
+ 80085de:	071a      	lsls	r2, r3, #28
+ 80085e0:	d525      	bpl.n	800862e <__swbuf_r+0x68>
+ 80085e2:	6923      	ldr	r3, [r4, #16]
+ 80085e4:	b31b      	cbz	r3, 800862e <__swbuf_r+0x68>
+ 80085e6:	6823      	ldr	r3, [r4, #0]
+ 80085e8:	6922      	ldr	r2, [r4, #16]
+ 80085ea:	b2f6      	uxtb	r6, r6
+ 80085ec:	1a98      	subs	r0, r3, r2
+ 80085ee:	6963      	ldr	r3, [r4, #20]
+ 80085f0:	4637      	mov	r7, r6
+ 80085f2:	4283      	cmp	r3, r0
+ 80085f4:	dc04      	bgt.n	8008600 <__swbuf_r+0x3a>
+ 80085f6:	4621      	mov	r1, r4
+ 80085f8:	4628      	mov	r0, r5
+ 80085fa:	f001 fe61 	bl	800a2c0 <_fflush_r>
+ 80085fe:	b9e0      	cbnz	r0, 800863a <__swbuf_r+0x74>
+ 8008600:	68a3      	ldr	r3, [r4, #8]
+ 8008602:	3b01      	subs	r3, #1
+ 8008604:	60a3      	str	r3, [r4, #8]
+ 8008606:	6823      	ldr	r3, [r4, #0]
+ 8008608:	1c5a      	adds	r2, r3, #1
+ 800860a:	6022      	str	r2, [r4, #0]
+ 800860c:	701e      	strb	r6, [r3, #0]
+ 800860e:	6962      	ldr	r2, [r4, #20]
+ 8008610:	1c43      	adds	r3, r0, #1
+ 8008612:	429a      	cmp	r2, r3
+ 8008614:	d004      	beq.n	8008620 <__swbuf_r+0x5a>
+ 8008616:	89a3      	ldrh	r3, [r4, #12]
+ 8008618:	07db      	lsls	r3, r3, #31
+ 800861a:	d506      	bpl.n	800862a <__swbuf_r+0x64>
+ 800861c:	2e0a      	cmp	r6, #10
+ 800861e:	d104      	bne.n	800862a <__swbuf_r+0x64>
+ 8008620:	4621      	mov	r1, r4
+ 8008622:	4628      	mov	r0, r5
+ 8008624:	f001 fe4c 	bl	800a2c0 <_fflush_r>
+ 8008628:	b938      	cbnz	r0, 800863a <__swbuf_r+0x74>
+ 800862a:	4638      	mov	r0, r7
+ 800862c:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
+ 800862e:	4621      	mov	r1, r4
+ 8008630:	4628      	mov	r0, r5
+ 8008632:	f000 f805 	bl	8008640 <__swsetup_r>
+ 8008636:	2800      	cmp	r0, #0
+ 8008638:	d0d5      	beq.n	80085e6 <__swbuf_r+0x20>
+ 800863a:	f04f 37ff 	mov.w	r7, #4294967295
+ 800863e:	e7f4      	b.n	800862a <__swbuf_r+0x64>
+
+08008640 <__swsetup_r>:
+ 8008640:	b538      	push	{r3, r4, r5, lr}
+ 8008642:	4b2a      	ldr	r3, [pc, #168]	; (80086ec <__swsetup_r+0xac>)
+ 8008644:	4605      	mov	r5, r0
+ 8008646:	6818      	ldr	r0, [r3, #0]
+ 8008648:	460c      	mov	r4, r1
+ 800864a:	b118      	cbz	r0, 8008654 <__swsetup_r+0x14>
+ 800864c:	6a03      	ldr	r3, [r0, #32]
+ 800864e:	b90b      	cbnz	r3, 8008654 <__swsetup_r+0x14>
+ 8008650:	f7ff ff20 	bl	8008494 <__sinit>
+ 8008654:	89a3      	ldrh	r3, [r4, #12]
+ 8008656:	f9b4 200c 	ldrsh.w	r2, [r4, #12]
+ 800865a:	0718      	lsls	r0, r3, #28
+ 800865c:	d422      	bmi.n	80086a4 <__swsetup_r+0x64>
+ 800865e:	06d9      	lsls	r1, r3, #27
+ 8008660:	d407      	bmi.n	8008672 <__swsetup_r+0x32>
+ 8008662:	2309      	movs	r3, #9
+ 8008664:	602b      	str	r3, [r5, #0]
+ 8008666:	f042 0340 	orr.w	r3, r2, #64	; 0x40
+ 800866a:	f04f 30ff 	mov.w	r0, #4294967295
+ 800866e:	81a3      	strh	r3, [r4, #12]
+ 8008670:	e034      	b.n	80086dc <__swsetup_r+0x9c>
+ 8008672:	0758      	lsls	r0, r3, #29
+ 8008674:	d512      	bpl.n	800869c <__swsetup_r+0x5c>
+ 8008676:	6b61      	ldr	r1, [r4, #52]	; 0x34
+ 8008678:	b141      	cbz	r1, 800868c <__swsetup_r+0x4c>
+ 800867a:	f104 0344 	add.w	r3, r4, #68	; 0x44
+ 800867e:	4299      	cmp	r1, r3
+ 8008680:	d002      	beq.n	8008688 <__swsetup_r+0x48>
+ 8008682:	4628      	mov	r0, r5
+ 8008684:	f000 ff40 	bl	8009508 <_free_r>
+ 8008688:	2300      	movs	r3, #0
+ 800868a:	6363      	str	r3, [r4, #52]	; 0x34
+ 800868c:	89a3      	ldrh	r3, [r4, #12]
+ 800868e:	f023 0324 	bic.w	r3, r3, #36	; 0x24
+ 8008692:	81a3      	strh	r3, [r4, #12]
+ 8008694:	2300      	movs	r3, #0
+ 8008696:	6063      	str	r3, [r4, #4]
+ 8008698:	6923      	ldr	r3, [r4, #16]
+ 800869a:	6023      	str	r3, [r4, #0]
+ 800869c:	89a3      	ldrh	r3, [r4, #12]
+ 800869e:	f043 0308 	orr.w	r3, r3, #8
+ 80086a2:	81a3      	strh	r3, [r4, #12]
+ 80086a4:	6923      	ldr	r3, [r4, #16]
+ 80086a6:	b94b      	cbnz	r3, 80086bc <__swsetup_r+0x7c>
+ 80086a8:	89a3      	ldrh	r3, [r4, #12]
+ 80086aa:	f403 7320 	and.w	r3, r3, #640	; 0x280
+ 80086ae:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
+ 80086b2:	d003      	beq.n	80086bc <__swsetup_r+0x7c>
+ 80086b4:	4621      	mov	r1, r4
+ 80086b6:	4628      	mov	r0, r5
+ 80086b8:	f001 fe4f 	bl	800a35a <__smakebuf_r>
+ 80086bc:	89a0      	ldrh	r0, [r4, #12]
+ 80086be:	f9b4 200c 	ldrsh.w	r2, [r4, #12]
+ 80086c2:	f010 0301 	ands.w	r3, r0, #1
+ 80086c6:	d00a      	beq.n	80086de <__swsetup_r+0x9e>
+ 80086c8:	2300      	movs	r3, #0
+ 80086ca:	60a3      	str	r3, [r4, #8]
+ 80086cc:	6963      	ldr	r3, [r4, #20]
+ 80086ce:	425b      	negs	r3, r3
+ 80086d0:	61a3      	str	r3, [r4, #24]
+ 80086d2:	6923      	ldr	r3, [r4, #16]
+ 80086d4:	b943      	cbnz	r3, 80086e8 <__swsetup_r+0xa8>
+ 80086d6:	f010 0080 	ands.w	r0, r0, #128	; 0x80
+ 80086da:	d1c4      	bne.n	8008666 <__swsetup_r+0x26>
+ 80086dc:	bd38      	pop	{r3, r4, r5, pc}
+ 80086de:	0781      	lsls	r1, r0, #30
+ 80086e0:	bf58      	it	pl
+ 80086e2:	6963      	ldrpl	r3, [r4, #20]
+ 80086e4:	60a3      	str	r3, [r4, #8]
+ 80086e6:	e7f4      	b.n	80086d2 <__swsetup_r+0x92>
+ 80086e8:	2000      	movs	r0, #0
+ 80086ea:	e7f7      	b.n	80086dc <__swsetup_r+0x9c>
+ 80086ec:	20000064 	.word	0x20000064
+
+080086f0 <memset>:
+ 80086f0:	4603      	mov	r3, r0
+ 80086f2:	4402      	add	r2, r0
+ 80086f4:	4293      	cmp	r3, r2
+ 80086f6:	d100      	bne.n	80086fa <memset+0xa>
+ 80086f8:	4770      	bx	lr
+ 80086fa:	f803 1b01 	strb.w	r1, [r3], #1
+ 80086fe:	e7f9      	b.n	80086f4 <memset+0x4>
+
+08008700 <_localeconv_r>:
+ 8008700:	4800      	ldr	r0, [pc, #0]	; (8008704 <_localeconv_r+0x4>)
+ 8008702:	4770      	bx	lr
+ 8008704:	20000158 	.word	0x20000158
+
+08008708 <_close_r>:
+ 8008708:	b538      	push	{r3, r4, r5, lr}
+ 800870a:	2300      	movs	r3, #0
+ 800870c:	4d05      	ldr	r5, [pc, #20]	; (8008724 <_close_r+0x1c>)
+ 800870e:	4604      	mov	r4, r0
+ 8008710:	4608      	mov	r0, r1
+ 8008712:	602b      	str	r3, [r5, #0]
+ 8008714:	f7f9 fa38 	bl	8001b88 <_close>
+ 8008718:	1c43      	adds	r3, r0, #1
+ 800871a:	d102      	bne.n	8008722 <_close_r+0x1a>
+ 800871c:	682b      	ldr	r3, [r5, #0]
+ 800871e:	b103      	cbz	r3, 8008722 <_close_r+0x1a>
+ 8008720:	6023      	str	r3, [r4, #0]
+ 8008722:	bd38      	pop	{r3, r4, r5, pc}
+ 8008724:	200026fc 	.word	0x200026fc
+
+08008728 <_lseek_r>:
+ 8008728:	b538      	push	{r3, r4, r5, lr}
+ 800872a:	4604      	mov	r4, r0
+ 800872c:	4608      	mov	r0, r1
+ 800872e:	4611      	mov	r1, r2
+ 8008730:	2200      	movs	r2, #0
+ 8008732:	4d05      	ldr	r5, [pc, #20]	; (8008748 <_lseek_r+0x20>)
+ 8008734:	602a      	str	r2, [r5, #0]
+ 8008736:	461a      	mov	r2, r3
+ 8008738:	f7f9 fa4a 	bl	8001bd0 <_lseek>
+ 800873c:	1c43      	adds	r3, r0, #1
+ 800873e:	d102      	bne.n	8008746 <_lseek_r+0x1e>
+ 8008740:	682b      	ldr	r3, [r5, #0]
+ 8008742:	b103      	cbz	r3, 8008746 <_lseek_r+0x1e>
+ 8008744:	6023      	str	r3, [r4, #0]
+ 8008746:	bd38      	pop	{r3, r4, r5, pc}
+ 8008748:	200026fc 	.word	0x200026fc
+
+0800874c <_read_r>:
+ 800874c:	b538      	push	{r3, r4, r5, lr}
+ 800874e:	4604      	mov	r4, r0
+ 8008750:	4608      	mov	r0, r1
+ 8008752:	4611      	mov	r1, r2
+ 8008754:	2200      	movs	r2, #0
+ 8008756:	4d05      	ldr	r5, [pc, #20]	; (800876c <_read_r+0x20>)
+ 8008758:	602a      	str	r2, [r5, #0]
+ 800875a:	461a      	mov	r2, r3
+ 800875c:	f7f9 f9f7 	bl	8001b4e <_read>
+ 8008760:	1c43      	adds	r3, r0, #1
+ 8008762:	d102      	bne.n	800876a <_read_r+0x1e>
+ 8008764:	682b      	ldr	r3, [r5, #0]
+ 8008766:	b103      	cbz	r3, 800876a <_read_r+0x1e>
+ 8008768:	6023      	str	r3, [r4, #0]
+ 800876a:	bd38      	pop	{r3, r4, r5, pc}
+ 800876c:	200026fc 	.word	0x200026fc
+
+08008770 <_sbrk_r>:
+ 8008770:	b538      	push	{r3, r4, r5, lr}
+ 8008772:	2300      	movs	r3, #0
+ 8008774:	4d05      	ldr	r5, [pc, #20]	; (800878c <_sbrk_r+0x1c>)
+ 8008776:	4604      	mov	r4, r0
+ 8008778:	4608      	mov	r0, r1
+ 800877a:	602b      	str	r3, [r5, #0]
+ 800877c:	f7f9 fa34 	bl	8001be8 <_sbrk>
+ 8008780:	1c43      	adds	r3, r0, #1
+ 8008782:	d102      	bne.n	800878a <_sbrk_r+0x1a>
+ 8008784:	682b      	ldr	r3, [r5, #0]
+ 8008786:	b103      	cbz	r3, 800878a <_sbrk_r+0x1a>
+ 8008788:	6023      	str	r3, [r4, #0]
+ 800878a:	bd38      	pop	{r3, r4, r5, pc}
+ 800878c:	200026fc 	.word	0x200026fc
+
+08008790 <_write_r>:
+ 8008790:	b538      	push	{r3, r4, r5, lr}
+ 8008792:	4604      	mov	r4, r0
+ 8008794:	4608      	mov	r0, r1
+ 8008796:	4611      	mov	r1, r2
+ 8008798:	2200      	movs	r2, #0
+ 800879a:	4d05      	ldr	r5, [pc, #20]	; (80087b0 <_write_r+0x20>)
+ 800879c:	602a      	str	r2, [r5, #0]
+ 800879e:	461a      	mov	r2, r3
+ 80087a0:	f7f8 fcf8 	bl	8001194 <_write>
+ 80087a4:	1c43      	adds	r3, r0, #1
+ 80087a6:	d102      	bne.n	80087ae <_write_r+0x1e>
+ 80087a8:	682b      	ldr	r3, [r5, #0]
+ 80087aa:	b103      	cbz	r3, 80087ae <_write_r+0x1e>
+ 80087ac:	6023      	str	r3, [r4, #0]
+ 80087ae:	bd38      	pop	{r3, r4, r5, pc}
+ 80087b0:	200026fc 	.word	0x200026fc
+
+080087b4 <__errno>:
+ 80087b4:	4b01      	ldr	r3, [pc, #4]	; (80087bc <__errno+0x8>)
+ 80087b6:	6818      	ldr	r0, [r3, #0]
+ 80087b8:	4770      	bx	lr
+ 80087ba:	bf00      	nop
+ 80087bc:	20000064 	.word	0x20000064
+
+080087c0 <__libc_init_array>:
+ 80087c0:	b570      	push	{r4, r5, r6, lr}
+ 80087c2:	2600      	movs	r6, #0
+ 80087c4:	4d0c      	ldr	r5, [pc, #48]	; (80087f8 <__libc_init_array+0x38>)
+ 80087c6:	4c0d      	ldr	r4, [pc, #52]	; (80087fc <__libc_init_array+0x3c>)
+ 80087c8:	1b64      	subs	r4, r4, r5
+ 80087ca:	10a4      	asrs	r4, r4, #2
+ 80087cc:	42a6      	cmp	r6, r4
+ 80087ce:	d109      	bne.n	80087e4 <__libc_init_array+0x24>
+ 80087d0:	f001 ff30 	bl	800a634 <_init>
+ 80087d4:	2600      	movs	r6, #0
+ 80087d6:	4d0a      	ldr	r5, [pc, #40]	; (8008800 <__libc_init_array+0x40>)
+ 80087d8:	4c0a      	ldr	r4, [pc, #40]	; (8008804 <__libc_init_array+0x44>)
+ 80087da:	1b64      	subs	r4, r4, r5
+ 80087dc:	10a4      	asrs	r4, r4, #2
+ 80087de:	42a6      	cmp	r6, r4
+ 80087e0:	d105      	bne.n	80087ee <__libc_init_array+0x2e>
+ 80087e2:	bd70      	pop	{r4, r5, r6, pc}
+ 80087e4:	f855 3b04 	ldr.w	r3, [r5], #4
+ 80087e8:	4798      	blx	r3
+ 80087ea:	3601      	adds	r6, #1
+ 80087ec:	e7ee      	b.n	80087cc <__libc_init_array+0xc>
+ 80087ee:	f855 3b04 	ldr.w	r3, [r5], #4
+ 80087f2:	4798      	blx	r3
+ 80087f4:	3601      	adds	r6, #1
+ 80087f6:	e7f2      	b.n	80087de <__libc_init_array+0x1e>
+ 80087f8:	0800b5b4 	.word	0x0800b5b4
+ 80087fc:	0800b5b4 	.word	0x0800b5b4
+ 8008800:	0800b5b4 	.word	0x0800b5b4
+ 8008804:	0800b5b8 	.word	0x0800b5b8
+
+08008808 <__retarget_lock_init_recursive>:
+ 8008808:	4770      	bx	lr
+
+0800880a <__retarget_lock_acquire_recursive>:
+ 800880a:	4770      	bx	lr
+
+0800880c <__retarget_lock_release_recursive>:
+ 800880c:	4770      	bx	lr
+
+0800880e <memchr>:
+ 800880e:	4603      	mov	r3, r0
+ 8008810:	b510      	push	{r4, lr}
+ 8008812:	b2c9      	uxtb	r1, r1
+ 8008814:	4402      	add	r2, r0
+ 8008816:	4293      	cmp	r3, r2
+ 8008818:	4618      	mov	r0, r3
+ 800881a:	d101      	bne.n	8008820 <memchr+0x12>
+ 800881c:	2000      	movs	r0, #0
+ 800881e:	e003      	b.n	8008828 <memchr+0x1a>
+ 8008820:	7804      	ldrb	r4, [r0, #0]
+ 8008822:	3301      	adds	r3, #1
+ 8008824:	428c      	cmp	r4, r1
+ 8008826:	d1f6      	bne.n	8008816 <memchr+0x8>
+ 8008828:	bd10      	pop	{r4, pc}
+
+0800882a <quorem>:
+ 800882a:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 800882e:	6903      	ldr	r3, [r0, #16]
+ 8008830:	690c      	ldr	r4, [r1, #16]
+ 8008832:	4607      	mov	r7, r0
+ 8008834:	42a3      	cmp	r3, r4
+ 8008836:	db7f      	blt.n	8008938 <quorem+0x10e>
+ 8008838:	3c01      	subs	r4, #1
+ 800883a:	f100 0514 	add.w	r5, r0, #20
+ 800883e:	f101 0814 	add.w	r8, r1, #20
+ 8008842:	eb05 0384 	add.w	r3, r5, r4, lsl #2
+ 8008846:	9301      	str	r3, [sp, #4]
+ 8008848:	f858 3024 	ldr.w	r3, [r8, r4, lsl #2]
+ 800884c:	f855 2024 	ldr.w	r2, [r5, r4, lsl #2]
+ 8008850:	3301      	adds	r3, #1
+ 8008852:	429a      	cmp	r2, r3
+ 8008854:	fbb2 f6f3 	udiv	r6, r2, r3
+ 8008858:	ea4f 0b84 	mov.w	fp, r4, lsl #2
+ 800885c:	eb08 0984 	add.w	r9, r8, r4, lsl #2
+ 8008860:	d331      	bcc.n	80088c6 <quorem+0x9c>
+ 8008862:	f04f 0e00 	mov.w	lr, #0
+ 8008866:	4640      	mov	r0, r8
+ 8008868:	46ac      	mov	ip, r5
+ 800886a:	46f2      	mov	sl, lr
+ 800886c:	f850 2b04 	ldr.w	r2, [r0], #4
+ 8008870:	b293      	uxth	r3, r2
+ 8008872:	fb06 e303 	mla	r3, r6, r3, lr
+ 8008876:	ea4f 4e12 	mov.w	lr, r2, lsr #16
+ 800887a:	0c1a      	lsrs	r2, r3, #16
+ 800887c:	b29b      	uxth	r3, r3
+ 800887e:	fb06 220e 	mla	r2, r6, lr, r2
+ 8008882:	ebaa 0303 	sub.w	r3, sl, r3
+ 8008886:	f8dc a000 	ldr.w	sl, [ip]
+ 800888a:	ea4f 4e12 	mov.w	lr, r2, lsr #16
+ 800888e:	fa1f fa8a 	uxth.w	sl, sl
+ 8008892:	4453      	add	r3, sl
+ 8008894:	f8dc a000 	ldr.w	sl, [ip]
+ 8008898:	b292      	uxth	r2, r2
+ 800889a:	ebc2 421a 	rsb	r2, r2, sl, lsr #16
+ 800889e:	eb02 4223 	add.w	r2, r2, r3, asr #16
+ 80088a2:	b29b      	uxth	r3, r3
+ 80088a4:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
+ 80088a8:	4581      	cmp	r9, r0
+ 80088aa:	ea4f 4a22 	mov.w	sl, r2, asr #16
+ 80088ae:	f84c 3b04 	str.w	r3, [ip], #4
+ 80088b2:	d2db      	bcs.n	800886c <quorem+0x42>
+ 80088b4:	f855 300b 	ldr.w	r3, [r5, fp]
+ 80088b8:	b92b      	cbnz	r3, 80088c6 <quorem+0x9c>
+ 80088ba:	9b01      	ldr	r3, [sp, #4]
+ 80088bc:	3b04      	subs	r3, #4
+ 80088be:	429d      	cmp	r5, r3
+ 80088c0:	461a      	mov	r2, r3
+ 80088c2:	d32d      	bcc.n	8008920 <quorem+0xf6>
+ 80088c4:	613c      	str	r4, [r7, #16]
+ 80088c6:	4638      	mov	r0, r7
+ 80088c8:	f001 f8e0 	bl	8009a8c <__mcmp>
+ 80088cc:	2800      	cmp	r0, #0
+ 80088ce:	db23      	blt.n	8008918 <quorem+0xee>
+ 80088d0:	4629      	mov	r1, r5
+ 80088d2:	2000      	movs	r0, #0
+ 80088d4:	3601      	adds	r6, #1
+ 80088d6:	f858 2b04 	ldr.w	r2, [r8], #4
+ 80088da:	f8d1 c000 	ldr.w	ip, [r1]
+ 80088de:	b293      	uxth	r3, r2
+ 80088e0:	1ac3      	subs	r3, r0, r3
+ 80088e2:	0c12      	lsrs	r2, r2, #16
+ 80088e4:	fa1f f08c 	uxth.w	r0, ip
+ 80088e8:	4403      	add	r3, r0
+ 80088ea:	ebc2 421c 	rsb	r2, r2, ip, lsr #16
+ 80088ee:	eb02 4223 	add.w	r2, r2, r3, asr #16
+ 80088f2:	b29b      	uxth	r3, r3
+ 80088f4:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
+ 80088f8:	45c1      	cmp	r9, r8
+ 80088fa:	ea4f 4022 	mov.w	r0, r2, asr #16
+ 80088fe:	f841 3b04 	str.w	r3, [r1], #4
+ 8008902:	d2e8      	bcs.n	80088d6 <quorem+0xac>
+ 8008904:	f855 2024 	ldr.w	r2, [r5, r4, lsl #2]
+ 8008908:	eb05 0384 	add.w	r3, r5, r4, lsl #2
+ 800890c:	b922      	cbnz	r2, 8008918 <quorem+0xee>
+ 800890e:	3b04      	subs	r3, #4
+ 8008910:	429d      	cmp	r5, r3
+ 8008912:	461a      	mov	r2, r3
+ 8008914:	d30a      	bcc.n	800892c <quorem+0x102>
+ 8008916:	613c      	str	r4, [r7, #16]
+ 8008918:	4630      	mov	r0, r6
+ 800891a:	b003      	add	sp, #12
+ 800891c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+ 8008920:	6812      	ldr	r2, [r2, #0]
+ 8008922:	3b04      	subs	r3, #4
+ 8008924:	2a00      	cmp	r2, #0
+ 8008926:	d1cd      	bne.n	80088c4 <quorem+0x9a>
+ 8008928:	3c01      	subs	r4, #1
+ 800892a:	e7c8      	b.n	80088be <quorem+0x94>
+ 800892c:	6812      	ldr	r2, [r2, #0]
+ 800892e:	3b04      	subs	r3, #4
+ 8008930:	2a00      	cmp	r2, #0
+ 8008932:	d1f0      	bne.n	8008916 <quorem+0xec>
+ 8008934:	3c01      	subs	r4, #1
+ 8008936:	e7eb      	b.n	8008910 <quorem+0xe6>
+ 8008938:	2000      	movs	r0, #0
+ 800893a:	e7ee      	b.n	800891a <quorem+0xf0>
+ 800893c:	0000      	movs	r0, r0
 	...
 
-080080e4 <_printf_i>:
- 80080e4:	e92d 47ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
- 80080e8:	460c      	mov	r4, r1
- 80080ea:	7e27      	ldrb	r7, [r4, #24]
- 80080ec:	4691      	mov	r9, r2
- 80080ee:	2f78      	cmp	r7, #120	; 0x78
- 80080f0:	4680      	mov	r8, r0
- 80080f2:	469a      	mov	sl, r3
- 80080f4:	990c      	ldr	r1, [sp, #48]	; 0x30
- 80080f6:	f104 0243 	add.w	r2, r4, #67	; 0x43
- 80080fa:	d807      	bhi.n	800810c <_printf_i+0x28>
- 80080fc:	2f62      	cmp	r7, #98	; 0x62
- 80080fe:	d80a      	bhi.n	8008116 <_printf_i+0x32>
- 8008100:	2f00      	cmp	r7, #0
- 8008102:	f000 80d9 	beq.w	80082b8 <_printf_i+0x1d4>
- 8008106:	2f58      	cmp	r7, #88	; 0x58
- 8008108:	f000 80a4 	beq.w	8008254 <_printf_i+0x170>
- 800810c:	f104 0642 	add.w	r6, r4, #66	; 0x42
- 8008110:	f884 7042 	strb.w	r7, [r4, #66]	; 0x42
- 8008114:	e03a      	b.n	800818c <_printf_i+0xa8>
- 8008116:	f1a7 0363 	sub.w	r3, r7, #99	; 0x63
- 800811a:	2b15      	cmp	r3, #21
- 800811c:	d8f6      	bhi.n	800810c <_printf_i+0x28>
- 800811e:	a001      	add	r0, pc, #4	; (adr r0, 8008124 <_printf_i+0x40>)
- 8008120:	f850 f023 	ldr.w	pc, [r0, r3, lsl #2]
- 8008124:	0800817d 	.word	0x0800817d
- 8008128:	08008191 	.word	0x08008191
- 800812c:	0800810d 	.word	0x0800810d
- 8008130:	0800810d 	.word	0x0800810d
- 8008134:	0800810d 	.word	0x0800810d
- 8008138:	0800810d 	.word	0x0800810d
- 800813c:	08008191 	.word	0x08008191
- 8008140:	0800810d 	.word	0x0800810d
- 8008144:	0800810d 	.word	0x0800810d
- 8008148:	0800810d 	.word	0x0800810d
- 800814c:	0800810d 	.word	0x0800810d
- 8008150:	0800829f 	.word	0x0800829f
- 8008154:	080081c1 	.word	0x080081c1
- 8008158:	08008281 	.word	0x08008281
- 800815c:	0800810d 	.word	0x0800810d
- 8008160:	0800810d 	.word	0x0800810d
- 8008164:	080082c1 	.word	0x080082c1
- 8008168:	0800810d 	.word	0x0800810d
- 800816c:	080081c1 	.word	0x080081c1
- 8008170:	0800810d 	.word	0x0800810d
- 8008174:	0800810d 	.word	0x0800810d
- 8008178:	08008289 	.word	0x08008289
- 800817c:	680b      	ldr	r3, [r1, #0]
- 800817e:	f104 0642 	add.w	r6, r4, #66	; 0x42
- 8008182:	1d1a      	adds	r2, r3, #4
- 8008184:	681b      	ldr	r3, [r3, #0]
- 8008186:	600a      	str	r2, [r1, #0]
- 8008188:	f884 3042 	strb.w	r3, [r4, #66]	; 0x42
- 800818c:	2301      	movs	r3, #1
- 800818e:	e0a4      	b.n	80082da <_printf_i+0x1f6>
- 8008190:	6825      	ldr	r5, [r4, #0]
- 8008192:	6808      	ldr	r0, [r1, #0]
- 8008194:	062e      	lsls	r6, r5, #24
- 8008196:	f100 0304 	add.w	r3, r0, #4
- 800819a:	d50a      	bpl.n	80081b2 <_printf_i+0xce>
- 800819c:	6805      	ldr	r5, [r0, #0]
- 800819e:	600b      	str	r3, [r1, #0]
- 80081a0:	2d00      	cmp	r5, #0
- 80081a2:	da03      	bge.n	80081ac <_printf_i+0xc8>
- 80081a4:	232d      	movs	r3, #45	; 0x2d
- 80081a6:	426d      	negs	r5, r5
- 80081a8:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
- 80081ac:	230a      	movs	r3, #10
- 80081ae:	485e      	ldr	r0, [pc, #376]	; (8008328 <_printf_i+0x244>)
- 80081b0:	e019      	b.n	80081e6 <_printf_i+0x102>
- 80081b2:	f015 0f40 	tst.w	r5, #64	; 0x40
- 80081b6:	6805      	ldr	r5, [r0, #0]
- 80081b8:	600b      	str	r3, [r1, #0]
- 80081ba:	bf18      	it	ne
- 80081bc:	b22d      	sxthne	r5, r5
- 80081be:	e7ef      	b.n	80081a0 <_printf_i+0xbc>
- 80081c0:	680b      	ldr	r3, [r1, #0]
- 80081c2:	6825      	ldr	r5, [r4, #0]
- 80081c4:	1d18      	adds	r0, r3, #4
- 80081c6:	6008      	str	r0, [r1, #0]
- 80081c8:	0628      	lsls	r0, r5, #24
- 80081ca:	d501      	bpl.n	80081d0 <_printf_i+0xec>
- 80081cc:	681d      	ldr	r5, [r3, #0]
- 80081ce:	e002      	b.n	80081d6 <_printf_i+0xf2>
- 80081d0:	0669      	lsls	r1, r5, #25
- 80081d2:	d5fb      	bpl.n	80081cc <_printf_i+0xe8>
- 80081d4:	881d      	ldrh	r5, [r3, #0]
- 80081d6:	2f6f      	cmp	r7, #111	; 0x6f
- 80081d8:	bf0c      	ite	eq
- 80081da:	2308      	moveq	r3, #8
- 80081dc:	230a      	movne	r3, #10
- 80081de:	4852      	ldr	r0, [pc, #328]	; (8008328 <_printf_i+0x244>)
- 80081e0:	2100      	movs	r1, #0
- 80081e2:	f884 1043 	strb.w	r1, [r4, #67]	; 0x43
- 80081e6:	6866      	ldr	r6, [r4, #4]
- 80081e8:	2e00      	cmp	r6, #0
- 80081ea:	bfa8      	it	ge
- 80081ec:	6821      	ldrge	r1, [r4, #0]
- 80081ee:	60a6      	str	r6, [r4, #8]
- 80081f0:	bfa4      	itt	ge
- 80081f2:	f021 0104 	bicge.w	r1, r1, #4
- 80081f6:	6021      	strge	r1, [r4, #0]
- 80081f8:	b90d      	cbnz	r5, 80081fe <_printf_i+0x11a>
- 80081fa:	2e00      	cmp	r6, #0
- 80081fc:	d04d      	beq.n	800829a <_printf_i+0x1b6>
- 80081fe:	4616      	mov	r6, r2
- 8008200:	fbb5 f1f3 	udiv	r1, r5, r3
- 8008204:	fb03 5711 	mls	r7, r3, r1, r5
- 8008208:	5dc7      	ldrb	r7, [r0, r7]
- 800820a:	f806 7d01 	strb.w	r7, [r6, #-1]!
- 800820e:	462f      	mov	r7, r5
- 8008210:	42bb      	cmp	r3, r7
- 8008212:	460d      	mov	r5, r1
- 8008214:	d9f4      	bls.n	8008200 <_printf_i+0x11c>
- 8008216:	2b08      	cmp	r3, #8
- 8008218:	d10b      	bne.n	8008232 <_printf_i+0x14e>
- 800821a:	6823      	ldr	r3, [r4, #0]
- 800821c:	07df      	lsls	r7, r3, #31
- 800821e:	d508      	bpl.n	8008232 <_printf_i+0x14e>
- 8008220:	6923      	ldr	r3, [r4, #16]
- 8008222:	6861      	ldr	r1, [r4, #4]
- 8008224:	4299      	cmp	r1, r3
- 8008226:	bfde      	ittt	le
- 8008228:	2330      	movle	r3, #48	; 0x30
- 800822a:	f806 3c01 	strble.w	r3, [r6, #-1]
- 800822e:	f106 36ff 	addle.w	r6, r6, #4294967295
- 8008232:	1b92      	subs	r2, r2, r6
- 8008234:	6122      	str	r2, [r4, #16]
- 8008236:	464b      	mov	r3, r9
- 8008238:	4621      	mov	r1, r4
- 800823a:	4640      	mov	r0, r8
- 800823c:	f8cd a000 	str.w	sl, [sp]
- 8008240:	aa03      	add	r2, sp, #12
- 8008242:	f7ff fedf 	bl	8008004 <_printf_common>
- 8008246:	3001      	adds	r0, #1
- 8008248:	d14c      	bne.n	80082e4 <_printf_i+0x200>
- 800824a:	f04f 30ff 	mov.w	r0, #4294967295
- 800824e:	b004      	add	sp, #16
- 8008250:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 8008254:	4834      	ldr	r0, [pc, #208]	; (8008328 <_printf_i+0x244>)
- 8008256:	f884 7045 	strb.w	r7, [r4, #69]	; 0x45
- 800825a:	680e      	ldr	r6, [r1, #0]
- 800825c:	6823      	ldr	r3, [r4, #0]
- 800825e:	f856 5b04 	ldr.w	r5, [r6], #4
- 8008262:	061f      	lsls	r7, r3, #24
- 8008264:	600e      	str	r6, [r1, #0]
- 8008266:	d514      	bpl.n	8008292 <_printf_i+0x1ae>
- 8008268:	07d9      	lsls	r1, r3, #31
- 800826a:	bf44      	itt	mi
- 800826c:	f043 0320 	orrmi.w	r3, r3, #32
- 8008270:	6023      	strmi	r3, [r4, #0]
- 8008272:	b91d      	cbnz	r5, 800827c <_printf_i+0x198>
- 8008274:	6823      	ldr	r3, [r4, #0]
- 8008276:	f023 0320 	bic.w	r3, r3, #32
- 800827a:	6023      	str	r3, [r4, #0]
- 800827c:	2310      	movs	r3, #16
- 800827e:	e7af      	b.n	80081e0 <_printf_i+0xfc>
- 8008280:	6823      	ldr	r3, [r4, #0]
- 8008282:	f043 0320 	orr.w	r3, r3, #32
- 8008286:	6023      	str	r3, [r4, #0]
- 8008288:	2378      	movs	r3, #120	; 0x78
- 800828a:	4828      	ldr	r0, [pc, #160]	; (800832c <_printf_i+0x248>)
- 800828c:	f884 3045 	strb.w	r3, [r4, #69]	; 0x45
- 8008290:	e7e3      	b.n	800825a <_printf_i+0x176>
- 8008292:	065e      	lsls	r6, r3, #25
- 8008294:	bf48      	it	mi
- 8008296:	b2ad      	uxthmi	r5, r5
- 8008298:	e7e6      	b.n	8008268 <_printf_i+0x184>
- 800829a:	4616      	mov	r6, r2
- 800829c:	e7bb      	b.n	8008216 <_printf_i+0x132>
- 800829e:	680b      	ldr	r3, [r1, #0]
- 80082a0:	6826      	ldr	r6, [r4, #0]
- 80082a2:	1d1d      	adds	r5, r3, #4
- 80082a4:	6960      	ldr	r0, [r4, #20]
- 80082a6:	600d      	str	r5, [r1, #0]
- 80082a8:	0635      	lsls	r5, r6, #24
- 80082aa:	681b      	ldr	r3, [r3, #0]
- 80082ac:	d501      	bpl.n	80082b2 <_printf_i+0x1ce>
- 80082ae:	6018      	str	r0, [r3, #0]
- 80082b0:	e002      	b.n	80082b8 <_printf_i+0x1d4>
- 80082b2:	0671      	lsls	r1, r6, #25
- 80082b4:	d5fb      	bpl.n	80082ae <_printf_i+0x1ca>
- 80082b6:	8018      	strh	r0, [r3, #0]
- 80082b8:	2300      	movs	r3, #0
- 80082ba:	4616      	mov	r6, r2
- 80082bc:	6123      	str	r3, [r4, #16]
- 80082be:	e7ba      	b.n	8008236 <_printf_i+0x152>
- 80082c0:	680b      	ldr	r3, [r1, #0]
- 80082c2:	1d1a      	adds	r2, r3, #4
- 80082c4:	600a      	str	r2, [r1, #0]
- 80082c6:	681e      	ldr	r6, [r3, #0]
- 80082c8:	2100      	movs	r1, #0
- 80082ca:	4630      	mov	r0, r6
- 80082cc:	6862      	ldr	r2, [r4, #4]
- 80082ce:	f001 f9c1 	bl	8009654 <memchr>
- 80082d2:	b108      	cbz	r0, 80082d8 <_printf_i+0x1f4>
- 80082d4:	1b80      	subs	r0, r0, r6
- 80082d6:	6060      	str	r0, [r4, #4]
- 80082d8:	6863      	ldr	r3, [r4, #4]
- 80082da:	6123      	str	r3, [r4, #16]
- 80082dc:	2300      	movs	r3, #0
- 80082de:	f884 3043 	strb.w	r3, [r4, #67]	; 0x43
- 80082e2:	e7a8      	b.n	8008236 <_printf_i+0x152>
- 80082e4:	4632      	mov	r2, r6
- 80082e6:	4649      	mov	r1, r9
- 80082e8:	4640      	mov	r0, r8
- 80082ea:	6923      	ldr	r3, [r4, #16]
- 80082ec:	47d0      	blx	sl
- 80082ee:	3001      	adds	r0, #1
- 80082f0:	d0ab      	beq.n	800824a <_printf_i+0x166>
- 80082f2:	6823      	ldr	r3, [r4, #0]
- 80082f4:	079b      	lsls	r3, r3, #30
- 80082f6:	d413      	bmi.n	8008320 <_printf_i+0x23c>
- 80082f8:	68e0      	ldr	r0, [r4, #12]
- 80082fa:	9b03      	ldr	r3, [sp, #12]
- 80082fc:	4298      	cmp	r0, r3
- 80082fe:	bfb8      	it	lt
- 8008300:	4618      	movlt	r0, r3
- 8008302:	e7a4      	b.n	800824e <_printf_i+0x16a>
- 8008304:	2301      	movs	r3, #1
- 8008306:	4632      	mov	r2, r6
- 8008308:	4649      	mov	r1, r9
- 800830a:	4640      	mov	r0, r8
- 800830c:	47d0      	blx	sl
- 800830e:	3001      	adds	r0, #1
- 8008310:	d09b      	beq.n	800824a <_printf_i+0x166>
- 8008312:	3501      	adds	r5, #1
- 8008314:	68e3      	ldr	r3, [r4, #12]
- 8008316:	9903      	ldr	r1, [sp, #12]
- 8008318:	1a5b      	subs	r3, r3, r1
- 800831a:	42ab      	cmp	r3, r5
- 800831c:	dcf2      	bgt.n	8008304 <_printf_i+0x220>
- 800831e:	e7eb      	b.n	80082f8 <_printf_i+0x214>
- 8008320:	2500      	movs	r5, #0
- 8008322:	f104 0619 	add.w	r6, r4, #25
- 8008326:	e7f5      	b.n	8008314 <_printf_i+0x230>
- 8008328:	0800b26a 	.word	0x0800b26a
- 800832c:	0800b27b 	.word	0x0800b27b
-
-08008330 <_sbrk_r>:
- 8008330:	b538      	push	{r3, r4, r5, lr}
- 8008332:	2300      	movs	r3, #0
- 8008334:	4d05      	ldr	r5, [pc, #20]	; (800834c <_sbrk_r+0x1c>)
- 8008336:	4604      	mov	r4, r0
- 8008338:	4608      	mov	r0, r1
- 800833a:	602b      	str	r3, [r5, #0]
- 800833c:	f7f9 fc54 	bl	8001be8 <_sbrk>
- 8008340:	1c43      	adds	r3, r0, #1
- 8008342:	d102      	bne.n	800834a <_sbrk_r+0x1a>
- 8008344:	682b      	ldr	r3, [r5, #0]
- 8008346:	b103      	cbz	r3, 800834a <_sbrk_r+0x1a>
- 8008348:	6023      	str	r3, [r4, #0]
- 800834a:	bd38      	pop	{r3, r4, r5, pc}
- 800834c:	20002620 	.word	0x20002620
-
-08008350 <siprintf>:
- 8008350:	b40e      	push	{r1, r2, r3}
- 8008352:	f06f 4100 	mvn.w	r1, #2147483648	; 0x80000000
- 8008356:	b500      	push	{lr}
- 8008358:	b09c      	sub	sp, #112	; 0x70
- 800835a:	ab1d      	add	r3, sp, #116	; 0x74
- 800835c:	9002      	str	r0, [sp, #8]
- 800835e:	9006      	str	r0, [sp, #24]
- 8008360:	9107      	str	r1, [sp, #28]
- 8008362:	9104      	str	r1, [sp, #16]
- 8008364:	4808      	ldr	r0, [pc, #32]	; (8008388 <siprintf+0x38>)
- 8008366:	4909      	ldr	r1, [pc, #36]	; (800838c <siprintf+0x3c>)
- 8008368:	f853 2b04 	ldr.w	r2, [r3], #4
- 800836c:	9105      	str	r1, [sp, #20]
- 800836e:	6800      	ldr	r0, [r0, #0]
- 8008370:	a902      	add	r1, sp, #8
- 8008372:	9301      	str	r3, [sp, #4]
- 8008374:	f001 fd82 	bl	8009e7c <_svfiprintf_r>
- 8008378:	2200      	movs	r2, #0
- 800837a:	9b02      	ldr	r3, [sp, #8]
- 800837c:	701a      	strb	r2, [r3, #0]
- 800837e:	b01c      	add	sp, #112	; 0x70
- 8008380:	f85d eb04 	ldr.w	lr, [sp], #4
- 8008384:	b003      	add	sp, #12
- 8008386:	4770      	bx	lr
- 8008388:	2000000c 	.word	0x2000000c
- 800838c:	ffff0208 	.word	0xffff0208
-
-08008390 <__swbuf_r>:
- 8008390:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 8008392:	460e      	mov	r6, r1
- 8008394:	4614      	mov	r4, r2
- 8008396:	4605      	mov	r5, r0
- 8008398:	b118      	cbz	r0, 80083a2 <__swbuf_r+0x12>
- 800839a:	6983      	ldr	r3, [r0, #24]
- 800839c:	b90b      	cbnz	r3, 80083a2 <__swbuf_r+0x12>
- 800839e:	f001 f84f 	bl	8009440 <__sinit>
- 80083a2:	4b21      	ldr	r3, [pc, #132]	; (8008428 <__swbuf_r+0x98>)
- 80083a4:	429c      	cmp	r4, r3
- 80083a6:	d12b      	bne.n	8008400 <__swbuf_r+0x70>
- 80083a8:	686c      	ldr	r4, [r5, #4]
- 80083aa:	69a3      	ldr	r3, [r4, #24]
- 80083ac:	60a3      	str	r3, [r4, #8]
- 80083ae:	89a3      	ldrh	r3, [r4, #12]
- 80083b0:	071a      	lsls	r2, r3, #28
- 80083b2:	d52f      	bpl.n	8008414 <__swbuf_r+0x84>
- 80083b4:	6923      	ldr	r3, [r4, #16]
- 80083b6:	b36b      	cbz	r3, 8008414 <__swbuf_r+0x84>
- 80083b8:	6923      	ldr	r3, [r4, #16]
- 80083ba:	6820      	ldr	r0, [r4, #0]
- 80083bc:	b2f6      	uxtb	r6, r6
- 80083be:	1ac0      	subs	r0, r0, r3
- 80083c0:	6963      	ldr	r3, [r4, #20]
- 80083c2:	4637      	mov	r7, r6
- 80083c4:	4283      	cmp	r3, r0
- 80083c6:	dc04      	bgt.n	80083d2 <__swbuf_r+0x42>
- 80083c8:	4621      	mov	r1, r4
- 80083ca:	4628      	mov	r0, r5
- 80083cc:	f000 ffa4 	bl	8009318 <_fflush_r>
- 80083d0:	bb30      	cbnz	r0, 8008420 <__swbuf_r+0x90>
- 80083d2:	68a3      	ldr	r3, [r4, #8]
- 80083d4:	3001      	adds	r0, #1
- 80083d6:	3b01      	subs	r3, #1
- 80083d8:	60a3      	str	r3, [r4, #8]
- 80083da:	6823      	ldr	r3, [r4, #0]
- 80083dc:	1c5a      	adds	r2, r3, #1
- 80083de:	6022      	str	r2, [r4, #0]
- 80083e0:	701e      	strb	r6, [r3, #0]
- 80083e2:	6963      	ldr	r3, [r4, #20]
- 80083e4:	4283      	cmp	r3, r0
- 80083e6:	d004      	beq.n	80083f2 <__swbuf_r+0x62>
- 80083e8:	89a3      	ldrh	r3, [r4, #12]
- 80083ea:	07db      	lsls	r3, r3, #31
- 80083ec:	d506      	bpl.n	80083fc <__swbuf_r+0x6c>
- 80083ee:	2e0a      	cmp	r6, #10
- 80083f0:	d104      	bne.n	80083fc <__swbuf_r+0x6c>
- 80083f2:	4621      	mov	r1, r4
- 80083f4:	4628      	mov	r0, r5
- 80083f6:	f000 ff8f 	bl	8009318 <_fflush_r>
- 80083fa:	b988      	cbnz	r0, 8008420 <__swbuf_r+0x90>
- 80083fc:	4638      	mov	r0, r7
- 80083fe:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
- 8008400:	4b0a      	ldr	r3, [pc, #40]	; (800842c <__swbuf_r+0x9c>)
- 8008402:	429c      	cmp	r4, r3
- 8008404:	d101      	bne.n	800840a <__swbuf_r+0x7a>
- 8008406:	68ac      	ldr	r4, [r5, #8]
- 8008408:	e7cf      	b.n	80083aa <__swbuf_r+0x1a>
- 800840a:	4b09      	ldr	r3, [pc, #36]	; (8008430 <__swbuf_r+0xa0>)
- 800840c:	429c      	cmp	r4, r3
- 800840e:	bf08      	it	eq
- 8008410:	68ec      	ldreq	r4, [r5, #12]
- 8008412:	e7ca      	b.n	80083aa <__swbuf_r+0x1a>
- 8008414:	4621      	mov	r1, r4
- 8008416:	4628      	mov	r0, r5
- 8008418:	f000 f80c 	bl	8008434 <__swsetup_r>
- 800841c:	2800      	cmp	r0, #0
- 800841e:	d0cb      	beq.n	80083b8 <__swbuf_r+0x28>
- 8008420:	f04f 37ff 	mov.w	r7, #4294967295
- 8008424:	e7ea      	b.n	80083fc <__swbuf_r+0x6c>
- 8008426:	bf00      	nop
- 8008428:	0800b340 	.word	0x0800b340
- 800842c:	0800b360 	.word	0x0800b360
- 8008430:	0800b320 	.word	0x0800b320
-
-08008434 <__swsetup_r>:
- 8008434:	4b32      	ldr	r3, [pc, #200]	; (8008500 <__swsetup_r+0xcc>)
- 8008436:	b570      	push	{r4, r5, r6, lr}
- 8008438:	681d      	ldr	r5, [r3, #0]
- 800843a:	4606      	mov	r6, r0
- 800843c:	460c      	mov	r4, r1
- 800843e:	b125      	cbz	r5, 800844a <__swsetup_r+0x16>
- 8008440:	69ab      	ldr	r3, [r5, #24]
- 8008442:	b913      	cbnz	r3, 800844a <__swsetup_r+0x16>
- 8008444:	4628      	mov	r0, r5
- 8008446:	f000 fffb 	bl	8009440 <__sinit>
- 800844a:	4b2e      	ldr	r3, [pc, #184]	; (8008504 <__swsetup_r+0xd0>)
- 800844c:	429c      	cmp	r4, r3
- 800844e:	d10f      	bne.n	8008470 <__swsetup_r+0x3c>
- 8008450:	686c      	ldr	r4, [r5, #4]
- 8008452:	89a3      	ldrh	r3, [r4, #12]
- 8008454:	f9b4 200c 	ldrsh.w	r2, [r4, #12]
- 8008458:	0719      	lsls	r1, r3, #28
- 800845a:	d42c      	bmi.n	80084b6 <__swsetup_r+0x82>
- 800845c:	06dd      	lsls	r5, r3, #27
- 800845e:	d411      	bmi.n	8008484 <__swsetup_r+0x50>
- 8008460:	2309      	movs	r3, #9
- 8008462:	6033      	str	r3, [r6, #0]
- 8008464:	f042 0340 	orr.w	r3, r2, #64	; 0x40
- 8008468:	f04f 30ff 	mov.w	r0, #4294967295
- 800846c:	81a3      	strh	r3, [r4, #12]
- 800846e:	e03e      	b.n	80084ee <__swsetup_r+0xba>
- 8008470:	4b25      	ldr	r3, [pc, #148]	; (8008508 <__swsetup_r+0xd4>)
- 8008472:	429c      	cmp	r4, r3
- 8008474:	d101      	bne.n	800847a <__swsetup_r+0x46>
- 8008476:	68ac      	ldr	r4, [r5, #8]
- 8008478:	e7eb      	b.n	8008452 <__swsetup_r+0x1e>
- 800847a:	4b24      	ldr	r3, [pc, #144]	; (800850c <__swsetup_r+0xd8>)
- 800847c:	429c      	cmp	r4, r3
- 800847e:	bf08      	it	eq
- 8008480:	68ec      	ldreq	r4, [r5, #12]
- 8008482:	e7e6      	b.n	8008452 <__swsetup_r+0x1e>
- 8008484:	0758      	lsls	r0, r3, #29
- 8008486:	d512      	bpl.n	80084ae <__swsetup_r+0x7a>
- 8008488:	6b61      	ldr	r1, [r4, #52]	; 0x34
- 800848a:	b141      	cbz	r1, 800849e <__swsetup_r+0x6a>
- 800848c:	f104 0344 	add.w	r3, r4, #68	; 0x44
- 8008490:	4299      	cmp	r1, r3
- 8008492:	d002      	beq.n	800849a <__swsetup_r+0x66>
- 8008494:	4630      	mov	r0, r6
- 8008496:	f7ff fa45 	bl	8007924 <_free_r>
- 800849a:	2300      	movs	r3, #0
- 800849c:	6363      	str	r3, [r4, #52]	; 0x34
- 800849e:	89a3      	ldrh	r3, [r4, #12]
- 80084a0:	f023 0324 	bic.w	r3, r3, #36	; 0x24
- 80084a4:	81a3      	strh	r3, [r4, #12]
- 80084a6:	2300      	movs	r3, #0
- 80084a8:	6063      	str	r3, [r4, #4]
- 80084aa:	6923      	ldr	r3, [r4, #16]
- 80084ac:	6023      	str	r3, [r4, #0]
- 80084ae:	89a3      	ldrh	r3, [r4, #12]
- 80084b0:	f043 0308 	orr.w	r3, r3, #8
- 80084b4:	81a3      	strh	r3, [r4, #12]
- 80084b6:	6923      	ldr	r3, [r4, #16]
- 80084b8:	b94b      	cbnz	r3, 80084ce <__swsetup_r+0x9a>
- 80084ba:	89a3      	ldrh	r3, [r4, #12]
- 80084bc:	f403 7320 	and.w	r3, r3, #640	; 0x280
- 80084c0:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
- 80084c4:	d003      	beq.n	80084ce <__swsetup_r+0x9a>
- 80084c6:	4621      	mov	r1, r4
- 80084c8:	4630      	mov	r0, r6
- 80084ca:	f001 f883 	bl	80095d4 <__smakebuf_r>
- 80084ce:	89a0      	ldrh	r0, [r4, #12]
- 80084d0:	f9b4 200c 	ldrsh.w	r2, [r4, #12]
- 80084d4:	f010 0301 	ands.w	r3, r0, #1
- 80084d8:	d00a      	beq.n	80084f0 <__swsetup_r+0xbc>
- 80084da:	2300      	movs	r3, #0
- 80084dc:	60a3      	str	r3, [r4, #8]
- 80084de:	6963      	ldr	r3, [r4, #20]
- 80084e0:	425b      	negs	r3, r3
- 80084e2:	61a3      	str	r3, [r4, #24]
- 80084e4:	6923      	ldr	r3, [r4, #16]
- 80084e6:	b943      	cbnz	r3, 80084fa <__swsetup_r+0xc6>
- 80084e8:	f010 0080 	ands.w	r0, r0, #128	; 0x80
- 80084ec:	d1ba      	bne.n	8008464 <__swsetup_r+0x30>
- 80084ee:	bd70      	pop	{r4, r5, r6, pc}
- 80084f0:	0781      	lsls	r1, r0, #30
- 80084f2:	bf58      	it	pl
- 80084f4:	6963      	ldrpl	r3, [r4, #20]
- 80084f6:	60a3      	str	r3, [r4, #8]
- 80084f8:	e7f4      	b.n	80084e4 <__swsetup_r+0xb0>
- 80084fa:	2000      	movs	r0, #0
- 80084fc:	e7f7      	b.n	80084ee <__swsetup_r+0xba>
- 80084fe:	bf00      	nop
- 8008500:	2000000c 	.word	0x2000000c
- 8008504:	0800b340 	.word	0x0800b340
- 8008508:	0800b360 	.word	0x0800b360
- 800850c:	0800b320 	.word	0x0800b320
-
-08008510 <quorem>:
- 8008510:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 8008514:	6903      	ldr	r3, [r0, #16]
- 8008516:	690c      	ldr	r4, [r1, #16]
- 8008518:	4607      	mov	r7, r0
- 800851a:	42a3      	cmp	r3, r4
- 800851c:	f2c0 8083 	blt.w	8008626 <quorem+0x116>
- 8008520:	3c01      	subs	r4, #1
- 8008522:	f100 0514 	add.w	r5, r0, #20
- 8008526:	f101 0814 	add.w	r8, r1, #20
- 800852a:	eb05 0384 	add.w	r3, r5, r4, lsl #2
- 800852e:	9301      	str	r3, [sp, #4]
- 8008530:	f858 3024 	ldr.w	r3, [r8, r4, lsl #2]
- 8008534:	f855 2024 	ldr.w	r2, [r5, r4, lsl #2]
- 8008538:	3301      	adds	r3, #1
- 800853a:	429a      	cmp	r2, r3
- 800853c:	fbb2 f6f3 	udiv	r6, r2, r3
- 8008540:	ea4f 0b84 	mov.w	fp, r4, lsl #2
- 8008544:	eb08 0984 	add.w	r9, r8, r4, lsl #2
- 8008548:	d332      	bcc.n	80085b0 <quorem+0xa0>
- 800854a:	f04f 0e00 	mov.w	lr, #0
- 800854e:	4640      	mov	r0, r8
- 8008550:	46ac      	mov	ip, r5
- 8008552:	46f2      	mov	sl, lr
- 8008554:	f850 2b04 	ldr.w	r2, [r0], #4
- 8008558:	b293      	uxth	r3, r2
- 800855a:	fb06 e303 	mla	r3, r6, r3, lr
- 800855e:	0c12      	lsrs	r2, r2, #16
- 8008560:	ea4f 4e13 	mov.w	lr, r3, lsr #16
- 8008564:	fb06 e202 	mla	r2, r6, r2, lr
- 8008568:	b29b      	uxth	r3, r3
- 800856a:	ebaa 0303 	sub.w	r3, sl, r3
- 800856e:	f8dc a000 	ldr.w	sl, [ip]
- 8008572:	ea4f 4e12 	mov.w	lr, r2, lsr #16
- 8008576:	fa1f fa8a 	uxth.w	sl, sl
- 800857a:	4453      	add	r3, sl
- 800857c:	fa1f fa82 	uxth.w	sl, r2
- 8008580:	f8dc 2000 	ldr.w	r2, [ip]
- 8008584:	4581      	cmp	r9, r0
- 8008586:	ebca 4212 	rsb	r2, sl, r2, lsr #16
- 800858a:	eb02 4223 	add.w	r2, r2, r3, asr #16
- 800858e:	b29b      	uxth	r3, r3
- 8008590:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
- 8008594:	ea4f 4a22 	mov.w	sl, r2, asr #16
- 8008598:	f84c 3b04 	str.w	r3, [ip], #4
- 800859c:	d2da      	bcs.n	8008554 <quorem+0x44>
- 800859e:	f855 300b 	ldr.w	r3, [r5, fp]
- 80085a2:	b92b      	cbnz	r3, 80085b0 <quorem+0xa0>
- 80085a4:	9b01      	ldr	r3, [sp, #4]
- 80085a6:	3b04      	subs	r3, #4
- 80085a8:	429d      	cmp	r5, r3
- 80085aa:	461a      	mov	r2, r3
- 80085ac:	d32f      	bcc.n	800860e <quorem+0xfe>
- 80085ae:	613c      	str	r4, [r7, #16]
- 80085b0:	4638      	mov	r0, r7
- 80085b2:	f001 faf1 	bl	8009b98 <__mcmp>
- 80085b6:	2800      	cmp	r0, #0
- 80085b8:	db25      	blt.n	8008606 <quorem+0xf6>
- 80085ba:	4628      	mov	r0, r5
- 80085bc:	f04f 0c00 	mov.w	ip, #0
- 80085c0:	3601      	adds	r6, #1
- 80085c2:	f858 1b04 	ldr.w	r1, [r8], #4
- 80085c6:	f8d0 e000 	ldr.w	lr, [r0]
- 80085ca:	b28b      	uxth	r3, r1
- 80085cc:	ebac 0303 	sub.w	r3, ip, r3
- 80085d0:	fa1f f28e 	uxth.w	r2, lr
- 80085d4:	4413      	add	r3, r2
- 80085d6:	0c0a      	lsrs	r2, r1, #16
- 80085d8:	ebc2 421e 	rsb	r2, r2, lr, lsr #16
- 80085dc:	eb02 4223 	add.w	r2, r2, r3, asr #16
- 80085e0:	b29b      	uxth	r3, r3
- 80085e2:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
- 80085e6:	45c1      	cmp	r9, r8
- 80085e8:	ea4f 4c22 	mov.w	ip, r2, asr #16
- 80085ec:	f840 3b04 	str.w	r3, [r0], #4
- 80085f0:	d2e7      	bcs.n	80085c2 <quorem+0xb2>
- 80085f2:	f855 2024 	ldr.w	r2, [r5, r4, lsl #2]
- 80085f6:	eb05 0384 	add.w	r3, r5, r4, lsl #2
- 80085fa:	b922      	cbnz	r2, 8008606 <quorem+0xf6>
- 80085fc:	3b04      	subs	r3, #4
- 80085fe:	429d      	cmp	r5, r3
- 8008600:	461a      	mov	r2, r3
- 8008602:	d30a      	bcc.n	800861a <quorem+0x10a>
- 8008604:	613c      	str	r4, [r7, #16]
- 8008606:	4630      	mov	r0, r6
- 8008608:	b003      	add	sp, #12
- 800860a:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800860e:	6812      	ldr	r2, [r2, #0]
- 8008610:	3b04      	subs	r3, #4
- 8008612:	2a00      	cmp	r2, #0
- 8008614:	d1cb      	bne.n	80085ae <quorem+0x9e>
- 8008616:	3c01      	subs	r4, #1
- 8008618:	e7c6      	b.n	80085a8 <quorem+0x98>
- 800861a:	6812      	ldr	r2, [r2, #0]
- 800861c:	3b04      	subs	r3, #4
- 800861e:	2a00      	cmp	r2, #0
- 8008620:	d1f0      	bne.n	8008604 <quorem+0xf4>
- 8008622:	3c01      	subs	r4, #1
- 8008624:	e7eb      	b.n	80085fe <quorem+0xee>
- 8008626:	2000      	movs	r0, #0
- 8008628:	e7ee      	b.n	8008608 <quorem+0xf8>
- 800862a:	0000      	movs	r0, r0
- 800862c:	0000      	movs	r0, r0
-	...
-
-08008630 <_dtoa_r>:
- 8008630:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 8008634:	4616      	mov	r6, r2
- 8008636:	461f      	mov	r7, r3
- 8008638:	6a44      	ldr	r4, [r0, #36]	; 0x24
- 800863a:	b099      	sub	sp, #100	; 0x64
- 800863c:	4605      	mov	r5, r0
- 800863e:	e9cd 6704 	strd	r6, r7, [sp, #16]
- 8008642:	f8dd 8094 	ldr.w	r8, [sp, #148]	; 0x94
- 8008646:	b974      	cbnz	r4, 8008666 <_dtoa_r+0x36>
- 8008648:	2010      	movs	r0, #16
- 800864a:	f7ff f953 	bl	80078f4 <malloc>
- 800864e:	4602      	mov	r2, r0
- 8008650:	6268      	str	r0, [r5, #36]	; 0x24
- 8008652:	b920      	cbnz	r0, 800865e <_dtoa_r+0x2e>
- 8008654:	21ea      	movs	r1, #234	; 0xea
- 8008656:	4bae      	ldr	r3, [pc, #696]	; (8008910 <_dtoa_r+0x2e0>)
- 8008658:	48ae      	ldr	r0, [pc, #696]	; (8008914 <_dtoa_r+0x2e4>)
- 800865a:	f001 febd 	bl	800a3d8 <__assert_func>
- 800865e:	e9c0 4401 	strd	r4, r4, [r0, #4]
- 8008662:	6004      	str	r4, [r0, #0]
- 8008664:	60c4      	str	r4, [r0, #12]
- 8008666:	6a6b      	ldr	r3, [r5, #36]	; 0x24
- 8008668:	6819      	ldr	r1, [r3, #0]
- 800866a:	b151      	cbz	r1, 8008682 <_dtoa_r+0x52>
- 800866c:	685a      	ldr	r2, [r3, #4]
- 800866e:	2301      	movs	r3, #1
- 8008670:	4093      	lsls	r3, r2
- 8008672:	604a      	str	r2, [r1, #4]
- 8008674:	608b      	str	r3, [r1, #8]
- 8008676:	4628      	mov	r0, r5
- 8008678:	f001 f854 	bl	8009724 <_Bfree>
- 800867c:	2200      	movs	r2, #0
- 800867e:	6a6b      	ldr	r3, [r5, #36]	; 0x24
- 8008680:	601a      	str	r2, [r3, #0]
- 8008682:	1e3b      	subs	r3, r7, #0
- 8008684:	bfaf      	iteee	ge
- 8008686:	2300      	movge	r3, #0
- 8008688:	2201      	movlt	r2, #1
- 800868a:	f023 4300 	biclt.w	r3, r3, #2147483648	; 0x80000000
- 800868e:	9305      	strlt	r3, [sp, #20]
- 8008690:	bfa8      	it	ge
- 8008692:	f8c8 3000 	strge.w	r3, [r8]
- 8008696:	f8dd 9014 	ldr.w	r9, [sp, #20]
- 800869a:	4b9f      	ldr	r3, [pc, #636]	; (8008918 <_dtoa_r+0x2e8>)
- 800869c:	bfb8      	it	lt
- 800869e:	f8c8 2000 	strlt.w	r2, [r8]
- 80086a2:	ea33 0309 	bics.w	r3, r3, r9
- 80086a6:	d119      	bne.n	80086dc <_dtoa_r+0xac>
- 80086a8:	f242 730f 	movw	r3, #9999	; 0x270f
- 80086ac:	9a24      	ldr	r2, [sp, #144]	; 0x90
- 80086ae:	6013      	str	r3, [r2, #0]
- 80086b0:	f3c9 0313 	ubfx	r3, r9, #0, #20
- 80086b4:	4333      	orrs	r3, r6
- 80086b6:	f000 8580 	beq.w	80091ba <_dtoa_r+0xb8a>
- 80086ba:	9b26      	ldr	r3, [sp, #152]	; 0x98
- 80086bc:	b953      	cbnz	r3, 80086d4 <_dtoa_r+0xa4>
- 80086be:	4b97      	ldr	r3, [pc, #604]	; (800891c <_dtoa_r+0x2ec>)
- 80086c0:	e022      	b.n	8008708 <_dtoa_r+0xd8>
- 80086c2:	4b97      	ldr	r3, [pc, #604]	; (8008920 <_dtoa_r+0x2f0>)
- 80086c4:	9308      	str	r3, [sp, #32]
- 80086c6:	3308      	adds	r3, #8
- 80086c8:	9a26      	ldr	r2, [sp, #152]	; 0x98
- 80086ca:	6013      	str	r3, [r2, #0]
- 80086cc:	9808      	ldr	r0, [sp, #32]
- 80086ce:	b019      	add	sp, #100	; 0x64
- 80086d0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 80086d4:	4b91      	ldr	r3, [pc, #580]	; (800891c <_dtoa_r+0x2ec>)
- 80086d6:	9308      	str	r3, [sp, #32]
- 80086d8:	3303      	adds	r3, #3
- 80086da:	e7f5      	b.n	80086c8 <_dtoa_r+0x98>
- 80086dc:	e9dd 3404 	ldrd	r3, r4, [sp, #16]
- 80086e0:	e9cd 340c 	strd	r3, r4, [sp, #48]	; 0x30
- 80086e4:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
- 80086e8:	2200      	movs	r2, #0
- 80086ea:	2300      	movs	r3, #0
- 80086ec:	f7f8 f9c8 	bl	8000a80 <__aeabi_dcmpeq>
- 80086f0:	4680      	mov	r8, r0
- 80086f2:	b158      	cbz	r0, 800870c <_dtoa_r+0xdc>
- 80086f4:	2301      	movs	r3, #1
- 80086f6:	9a24      	ldr	r2, [sp, #144]	; 0x90
- 80086f8:	6013      	str	r3, [r2, #0]
- 80086fa:	9b26      	ldr	r3, [sp, #152]	; 0x98
- 80086fc:	2b00      	cmp	r3, #0
- 80086fe:	f000 8559 	beq.w	80091b4 <_dtoa_r+0xb84>
- 8008702:	4888      	ldr	r0, [pc, #544]	; (8008924 <_dtoa_r+0x2f4>)
- 8008704:	6018      	str	r0, [r3, #0]
- 8008706:	1e43      	subs	r3, r0, #1
- 8008708:	9308      	str	r3, [sp, #32]
- 800870a:	e7df      	b.n	80086cc <_dtoa_r+0x9c>
- 800870c:	ab16      	add	r3, sp, #88	; 0x58
- 800870e:	9301      	str	r3, [sp, #4]
- 8008710:	ab17      	add	r3, sp, #92	; 0x5c
- 8008712:	9300      	str	r3, [sp, #0]
- 8008714:	4628      	mov	r0, r5
- 8008716:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
- 800871a:	f001 fae9 	bl	8009cf0 <__d2b>
- 800871e:	f3c9 540a 	ubfx	r4, r9, #20, #11
- 8008722:	4682      	mov	sl, r0
- 8008724:	2c00      	cmp	r4, #0
- 8008726:	d07e      	beq.n	8008826 <_dtoa_r+0x1f6>
- 8008728:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
- 800872c:	9b0d      	ldr	r3, [sp, #52]	; 0x34
- 800872e:	f2a4 34ff 	subw	r4, r4, #1023	; 0x3ff
- 8008732:	f3c3 0313 	ubfx	r3, r3, #0, #20
- 8008736:	f043 517f 	orr.w	r1, r3, #1069547520	; 0x3fc00000
- 800873a:	f441 1140 	orr.w	r1, r1, #3145728	; 0x300000
- 800873e:	f8cd 804c 	str.w	r8, [sp, #76]	; 0x4c
- 8008742:	2200      	movs	r2, #0
- 8008744:	4b78      	ldr	r3, [pc, #480]	; (8008928 <_dtoa_r+0x2f8>)
- 8008746:	f7f7 fd7b 	bl	8000240 <__aeabi_dsub>
- 800874a:	a36b      	add	r3, pc, #428	; (adr r3, 80088f8 <_dtoa_r+0x2c8>)
- 800874c:	e9d3 2300 	ldrd	r2, r3, [r3]
- 8008750:	f7f7 ff2e 	bl	80005b0 <__aeabi_dmul>
- 8008754:	a36a      	add	r3, pc, #424	; (adr r3, 8008900 <_dtoa_r+0x2d0>)
- 8008756:	e9d3 2300 	ldrd	r2, r3, [r3]
- 800875a:	f7f7 fd73 	bl	8000244 <__adddf3>
- 800875e:	4606      	mov	r6, r0
- 8008760:	4620      	mov	r0, r4
- 8008762:	460f      	mov	r7, r1
- 8008764:	f7f7 feba 	bl	80004dc <__aeabi_i2d>
- 8008768:	a367      	add	r3, pc, #412	; (adr r3, 8008908 <_dtoa_r+0x2d8>)
- 800876a:	e9d3 2300 	ldrd	r2, r3, [r3]
- 800876e:	f7f7 ff1f 	bl	80005b0 <__aeabi_dmul>
- 8008772:	4602      	mov	r2, r0
- 8008774:	460b      	mov	r3, r1
- 8008776:	4630      	mov	r0, r6
- 8008778:	4639      	mov	r1, r7
- 800877a:	f7f7 fd63 	bl	8000244 <__adddf3>
- 800877e:	4606      	mov	r6, r0
- 8008780:	460f      	mov	r7, r1
- 8008782:	f7f8 f9c5 	bl	8000b10 <__aeabi_d2iz>
- 8008786:	2200      	movs	r2, #0
- 8008788:	4681      	mov	r9, r0
- 800878a:	2300      	movs	r3, #0
- 800878c:	4630      	mov	r0, r6
- 800878e:	4639      	mov	r1, r7
- 8008790:	f7f8 f980 	bl	8000a94 <__aeabi_dcmplt>
- 8008794:	b148      	cbz	r0, 80087aa <_dtoa_r+0x17a>
- 8008796:	4648      	mov	r0, r9
- 8008798:	f7f7 fea0 	bl	80004dc <__aeabi_i2d>
- 800879c:	4632      	mov	r2, r6
- 800879e:	463b      	mov	r3, r7
- 80087a0:	f7f8 f96e 	bl	8000a80 <__aeabi_dcmpeq>
- 80087a4:	b908      	cbnz	r0, 80087aa <_dtoa_r+0x17a>
- 80087a6:	f109 39ff 	add.w	r9, r9, #4294967295
- 80087aa:	f1b9 0f16 	cmp.w	r9, #22
- 80087ae:	d857      	bhi.n	8008860 <_dtoa_r+0x230>
- 80087b0:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
- 80087b4:	4b5d      	ldr	r3, [pc, #372]	; (800892c <_dtoa_r+0x2fc>)
- 80087b6:	eb03 03c9 	add.w	r3, r3, r9, lsl #3
- 80087ba:	e9d3 2300 	ldrd	r2, r3, [r3]
- 80087be:	f7f8 f969 	bl	8000a94 <__aeabi_dcmplt>
- 80087c2:	2800      	cmp	r0, #0
- 80087c4:	d04e      	beq.n	8008864 <_dtoa_r+0x234>
- 80087c6:	2300      	movs	r3, #0
- 80087c8:	f109 39ff 	add.w	r9, r9, #4294967295
- 80087cc:	930f      	str	r3, [sp, #60]	; 0x3c
- 80087ce:	9b16      	ldr	r3, [sp, #88]	; 0x58
- 80087d0:	1b1c      	subs	r4, r3, r4
- 80087d2:	1e63      	subs	r3, r4, #1
- 80087d4:	9309      	str	r3, [sp, #36]	; 0x24
- 80087d6:	bf49      	itett	mi
- 80087d8:	f1c4 0301 	rsbmi	r3, r4, #1
- 80087dc:	2300      	movpl	r3, #0
- 80087de:	9306      	strmi	r3, [sp, #24]
- 80087e0:	2300      	movmi	r3, #0
- 80087e2:	bf54      	ite	pl
- 80087e4:	9306      	strpl	r3, [sp, #24]
- 80087e6:	9309      	strmi	r3, [sp, #36]	; 0x24
- 80087e8:	f1b9 0f00 	cmp.w	r9, #0
- 80087ec:	db3c      	blt.n	8008868 <_dtoa_r+0x238>
- 80087ee:	9b09      	ldr	r3, [sp, #36]	; 0x24
- 80087f0:	f8cd 9038 	str.w	r9, [sp, #56]	; 0x38
- 80087f4:	444b      	add	r3, r9
- 80087f6:	9309      	str	r3, [sp, #36]	; 0x24
- 80087f8:	2300      	movs	r3, #0
- 80087fa:	930a      	str	r3, [sp, #40]	; 0x28
- 80087fc:	9b22      	ldr	r3, [sp, #136]	; 0x88
- 80087fe:	2b09      	cmp	r3, #9
- 8008800:	d86c      	bhi.n	80088dc <_dtoa_r+0x2ac>
- 8008802:	2b05      	cmp	r3, #5
- 8008804:	bfc4      	itt	gt
- 8008806:	3b04      	subgt	r3, #4
- 8008808:	9322      	strgt	r3, [sp, #136]	; 0x88
- 800880a:	9b22      	ldr	r3, [sp, #136]	; 0x88
- 800880c:	bfc8      	it	gt
- 800880e:	2400      	movgt	r4, #0
- 8008810:	f1a3 0302 	sub.w	r3, r3, #2
- 8008814:	bfd8      	it	le
- 8008816:	2401      	movle	r4, #1
- 8008818:	2b03      	cmp	r3, #3
- 800881a:	f200 808b 	bhi.w	8008934 <_dtoa_r+0x304>
- 800881e:	e8df f003 	tbb	[pc, r3]
- 8008822:	4f2d      	.short	0x4f2d
- 8008824:	5b4d      	.short	0x5b4d
- 8008826:	e9dd 4316 	ldrd	r4, r3, [sp, #88]	; 0x58
- 800882a:	441c      	add	r4, r3
- 800882c:	f204 4332 	addw	r3, r4, #1074	; 0x432
- 8008830:	2b20      	cmp	r3, #32
- 8008832:	bfc3      	ittte	gt
- 8008834:	f1c3 0340 	rsbgt	r3, r3, #64	; 0x40
- 8008838:	f204 4012 	addwgt	r0, r4, #1042	; 0x412
- 800883c:	fa09 f303 	lslgt.w	r3, r9, r3
- 8008840:	f1c3 0320 	rsble	r3, r3, #32
- 8008844:	bfc6      	itte	gt
- 8008846:	fa26 f000 	lsrgt.w	r0, r6, r0
- 800884a:	4318      	orrgt	r0, r3
- 800884c:	fa06 f003 	lslle.w	r0, r6, r3
- 8008850:	f7f7 fe34 	bl	80004bc <__aeabi_ui2d>
- 8008854:	2301      	movs	r3, #1
- 8008856:	f1a1 71f8 	sub.w	r1, r1, #32505856	; 0x1f00000
- 800885a:	3c01      	subs	r4, #1
- 800885c:	9313      	str	r3, [sp, #76]	; 0x4c
- 800885e:	e770      	b.n	8008742 <_dtoa_r+0x112>
- 8008860:	2301      	movs	r3, #1
- 8008862:	e7b3      	b.n	80087cc <_dtoa_r+0x19c>
- 8008864:	900f      	str	r0, [sp, #60]	; 0x3c
- 8008866:	e7b2      	b.n	80087ce <_dtoa_r+0x19e>
- 8008868:	9b06      	ldr	r3, [sp, #24]
- 800886a:	eba3 0309 	sub.w	r3, r3, r9
- 800886e:	9306      	str	r3, [sp, #24]
- 8008870:	f1c9 0300 	rsb	r3, r9, #0
- 8008874:	930a      	str	r3, [sp, #40]	; 0x28
- 8008876:	2300      	movs	r3, #0
- 8008878:	930e      	str	r3, [sp, #56]	; 0x38
- 800887a:	e7bf      	b.n	80087fc <_dtoa_r+0x1cc>
- 800887c:	2300      	movs	r3, #0
- 800887e:	930b      	str	r3, [sp, #44]	; 0x2c
- 8008880:	9b23      	ldr	r3, [sp, #140]	; 0x8c
- 8008882:	2b00      	cmp	r3, #0
- 8008884:	dc59      	bgt.n	800893a <_dtoa_r+0x30a>
- 8008886:	f04f 0b01 	mov.w	fp, #1
- 800888a:	465b      	mov	r3, fp
- 800888c:	f8cd b008 	str.w	fp, [sp, #8]
- 8008890:	f8cd b08c 	str.w	fp, [sp, #140]	; 0x8c
- 8008894:	2200      	movs	r2, #0
- 8008896:	6a68      	ldr	r0, [r5, #36]	; 0x24
- 8008898:	6042      	str	r2, [r0, #4]
- 800889a:	2204      	movs	r2, #4
- 800889c:	f102 0614 	add.w	r6, r2, #20
- 80088a0:	429e      	cmp	r6, r3
- 80088a2:	6841      	ldr	r1, [r0, #4]
- 80088a4:	d94f      	bls.n	8008946 <_dtoa_r+0x316>
- 80088a6:	4628      	mov	r0, r5
- 80088a8:	f000 fefc 	bl	80096a4 <_Balloc>
- 80088ac:	9008      	str	r0, [sp, #32]
- 80088ae:	2800      	cmp	r0, #0
- 80088b0:	d14d      	bne.n	800894e <_dtoa_r+0x31e>
- 80088b2:	4602      	mov	r2, r0
- 80088b4:	f44f 71d5 	mov.w	r1, #426	; 0x1aa
- 80088b8:	4b1d      	ldr	r3, [pc, #116]	; (8008930 <_dtoa_r+0x300>)
- 80088ba:	e6cd      	b.n	8008658 <_dtoa_r+0x28>
- 80088bc:	2301      	movs	r3, #1
- 80088be:	e7de      	b.n	800887e <_dtoa_r+0x24e>
- 80088c0:	2300      	movs	r3, #0
- 80088c2:	930b      	str	r3, [sp, #44]	; 0x2c
- 80088c4:	9b23      	ldr	r3, [sp, #140]	; 0x8c
- 80088c6:	eb09 0b03 	add.w	fp, r9, r3
- 80088ca:	f10b 0301 	add.w	r3, fp, #1
- 80088ce:	2b01      	cmp	r3, #1
- 80088d0:	9302      	str	r3, [sp, #8]
- 80088d2:	bfb8      	it	lt
- 80088d4:	2301      	movlt	r3, #1
- 80088d6:	e7dd      	b.n	8008894 <_dtoa_r+0x264>
- 80088d8:	2301      	movs	r3, #1
- 80088da:	e7f2      	b.n	80088c2 <_dtoa_r+0x292>
- 80088dc:	2401      	movs	r4, #1
- 80088de:	2300      	movs	r3, #0
- 80088e0:	940b      	str	r4, [sp, #44]	; 0x2c
- 80088e2:	9322      	str	r3, [sp, #136]	; 0x88
- 80088e4:	f04f 3bff 	mov.w	fp, #4294967295
- 80088e8:	2200      	movs	r2, #0
- 80088ea:	2312      	movs	r3, #18
- 80088ec:	f8cd b008 	str.w	fp, [sp, #8]
- 80088f0:	9223      	str	r2, [sp, #140]	; 0x8c
- 80088f2:	e7cf      	b.n	8008894 <_dtoa_r+0x264>
- 80088f4:	f3af 8000 	nop.w
- 80088f8:	636f4361 	.word	0x636f4361
- 80088fc:	3fd287a7 	.word	0x3fd287a7
- 8008900:	8b60c8b3 	.word	0x8b60c8b3
- 8008904:	3fc68a28 	.word	0x3fc68a28
- 8008908:	509f79fb 	.word	0x509f79fb
- 800890c:	3fd34413 	.word	0x3fd34413
- 8008910:	0800b299 	.word	0x0800b299
- 8008914:	0800b2b0 	.word	0x0800b2b0
- 8008918:	7ff00000 	.word	0x7ff00000
- 800891c:	0800b295 	.word	0x0800b295
- 8008920:	0800b28c 	.word	0x0800b28c
- 8008924:	0800b269 	.word	0x0800b269
- 8008928:	3ff80000 	.word	0x3ff80000
- 800892c:	0800b408 	.word	0x0800b408
- 8008930:	0800b30f 	.word	0x0800b30f
- 8008934:	2301      	movs	r3, #1
- 8008936:	930b      	str	r3, [sp, #44]	; 0x2c
- 8008938:	e7d4      	b.n	80088e4 <_dtoa_r+0x2b4>
- 800893a:	f8dd b08c 	ldr.w	fp, [sp, #140]	; 0x8c
- 800893e:	465b      	mov	r3, fp
- 8008940:	f8cd b008 	str.w	fp, [sp, #8]
- 8008944:	e7a6      	b.n	8008894 <_dtoa_r+0x264>
- 8008946:	3101      	adds	r1, #1
- 8008948:	6041      	str	r1, [r0, #4]
- 800894a:	0052      	lsls	r2, r2, #1
- 800894c:	e7a6      	b.n	800889c <_dtoa_r+0x26c>
- 800894e:	6a6b      	ldr	r3, [r5, #36]	; 0x24
- 8008950:	9a08      	ldr	r2, [sp, #32]
- 8008952:	601a      	str	r2, [r3, #0]
- 8008954:	9b02      	ldr	r3, [sp, #8]
- 8008956:	2b0e      	cmp	r3, #14
- 8008958:	f200 80a8 	bhi.w	8008aac <_dtoa_r+0x47c>
- 800895c:	2c00      	cmp	r4, #0
- 800895e:	f000 80a5 	beq.w	8008aac <_dtoa_r+0x47c>
- 8008962:	f1b9 0f00 	cmp.w	r9, #0
- 8008966:	dd34      	ble.n	80089d2 <_dtoa_r+0x3a2>
- 8008968:	4a9a      	ldr	r2, [pc, #616]	; (8008bd4 <_dtoa_r+0x5a4>)
- 800896a:	f009 030f 	and.w	r3, r9, #15
- 800896e:	eb02 03c3 	add.w	r3, r2, r3, lsl #3
- 8008972:	f419 7f80 	tst.w	r9, #256	; 0x100
- 8008976:	e9d3 3400 	ldrd	r3, r4, [r3]
- 800897a:	e9cd 3410 	strd	r3, r4, [sp, #64]	; 0x40
- 800897e:	ea4f 1429 	mov.w	r4, r9, asr #4
- 8008982:	d016      	beq.n	80089b2 <_dtoa_r+0x382>
- 8008984:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
- 8008988:	4b93      	ldr	r3, [pc, #588]	; (8008bd8 <_dtoa_r+0x5a8>)
- 800898a:	2703      	movs	r7, #3
- 800898c:	e9d3 2308 	ldrd	r2, r3, [r3, #32]
- 8008990:	f7f7 ff38 	bl	8000804 <__aeabi_ddiv>
- 8008994:	e9cd 0104 	strd	r0, r1, [sp, #16]
- 8008998:	f004 040f 	and.w	r4, r4, #15
- 800899c:	4e8e      	ldr	r6, [pc, #568]	; (8008bd8 <_dtoa_r+0x5a8>)
- 800899e:	b954      	cbnz	r4, 80089b6 <_dtoa_r+0x386>
- 80089a0:	e9dd 2310 	ldrd	r2, r3, [sp, #64]	; 0x40
- 80089a4:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
- 80089a8:	f7f7 ff2c 	bl	8000804 <__aeabi_ddiv>
- 80089ac:	e9cd 0104 	strd	r0, r1, [sp, #16]
- 80089b0:	e029      	b.n	8008a06 <_dtoa_r+0x3d6>
- 80089b2:	2702      	movs	r7, #2
- 80089b4:	e7f2      	b.n	800899c <_dtoa_r+0x36c>
- 80089b6:	07e1      	lsls	r1, r4, #31
- 80089b8:	d508      	bpl.n	80089cc <_dtoa_r+0x39c>
- 80089ba:	e9dd 0110 	ldrd	r0, r1, [sp, #64]	; 0x40
- 80089be:	e9d6 2300 	ldrd	r2, r3, [r6]
- 80089c2:	f7f7 fdf5 	bl	80005b0 <__aeabi_dmul>
- 80089c6:	e9cd 0110 	strd	r0, r1, [sp, #64]	; 0x40
- 80089ca:	3701      	adds	r7, #1
- 80089cc:	1064      	asrs	r4, r4, #1
- 80089ce:	3608      	adds	r6, #8
- 80089d0:	e7e5      	b.n	800899e <_dtoa_r+0x36e>
- 80089d2:	f000 80a5 	beq.w	8008b20 <_dtoa_r+0x4f0>
- 80089d6:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
- 80089da:	f1c9 0400 	rsb	r4, r9, #0
- 80089de:	4b7d      	ldr	r3, [pc, #500]	; (8008bd4 <_dtoa_r+0x5a4>)
- 80089e0:	f004 020f 	and.w	r2, r4, #15
- 80089e4:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
- 80089e8:	e9d3 2300 	ldrd	r2, r3, [r3]
- 80089ec:	f7f7 fde0 	bl	80005b0 <__aeabi_dmul>
- 80089f0:	2702      	movs	r7, #2
- 80089f2:	2300      	movs	r3, #0
- 80089f4:	e9cd 0104 	strd	r0, r1, [sp, #16]
- 80089f8:	4e77      	ldr	r6, [pc, #476]	; (8008bd8 <_dtoa_r+0x5a8>)
- 80089fa:	1124      	asrs	r4, r4, #4
- 80089fc:	2c00      	cmp	r4, #0
- 80089fe:	f040 8084 	bne.w	8008b0a <_dtoa_r+0x4da>
- 8008a02:	2b00      	cmp	r3, #0
- 8008a04:	d1d2      	bne.n	80089ac <_dtoa_r+0x37c>
- 8008a06:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
- 8008a08:	2b00      	cmp	r3, #0
- 8008a0a:	f000 808b 	beq.w	8008b24 <_dtoa_r+0x4f4>
- 8008a0e:	e9dd 3404 	ldrd	r3, r4, [sp, #16]
- 8008a12:	e9cd 3410 	strd	r3, r4, [sp, #64]	; 0x40
- 8008a16:	e9dd 0110 	ldrd	r0, r1, [sp, #64]	; 0x40
- 8008a1a:	2200      	movs	r2, #0
- 8008a1c:	4b6f      	ldr	r3, [pc, #444]	; (8008bdc <_dtoa_r+0x5ac>)
- 8008a1e:	f7f8 f839 	bl	8000a94 <__aeabi_dcmplt>
- 8008a22:	2800      	cmp	r0, #0
- 8008a24:	d07e      	beq.n	8008b24 <_dtoa_r+0x4f4>
- 8008a26:	9b02      	ldr	r3, [sp, #8]
- 8008a28:	2b00      	cmp	r3, #0
- 8008a2a:	d07b      	beq.n	8008b24 <_dtoa_r+0x4f4>
- 8008a2c:	f1bb 0f00 	cmp.w	fp, #0
- 8008a30:	dd38      	ble.n	8008aa4 <_dtoa_r+0x474>
- 8008a32:	e9dd 0110 	ldrd	r0, r1, [sp, #64]	; 0x40
- 8008a36:	2200      	movs	r2, #0
- 8008a38:	4b69      	ldr	r3, [pc, #420]	; (8008be0 <_dtoa_r+0x5b0>)
- 8008a3a:	f7f7 fdb9 	bl	80005b0 <__aeabi_dmul>
- 8008a3e:	465c      	mov	r4, fp
- 8008a40:	e9cd 0104 	strd	r0, r1, [sp, #16]
- 8008a44:	f109 38ff 	add.w	r8, r9, #4294967295
- 8008a48:	3701      	adds	r7, #1
- 8008a4a:	4638      	mov	r0, r7
- 8008a4c:	f7f7 fd46 	bl	80004dc <__aeabi_i2d>
- 8008a50:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
- 8008a54:	f7f7 fdac 	bl	80005b0 <__aeabi_dmul>
- 8008a58:	2200      	movs	r2, #0
- 8008a5a:	4b62      	ldr	r3, [pc, #392]	; (8008be4 <_dtoa_r+0x5b4>)
- 8008a5c:	f7f7 fbf2 	bl	8000244 <__adddf3>
- 8008a60:	f1a1 7650 	sub.w	r6, r1, #54525952	; 0x3400000
- 8008a64:	e9cd 0110 	strd	r0, r1, [sp, #64]	; 0x40
- 8008a68:	9611      	str	r6, [sp, #68]	; 0x44
- 8008a6a:	2c00      	cmp	r4, #0
- 8008a6c:	d15d      	bne.n	8008b2a <_dtoa_r+0x4fa>
- 8008a6e:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
- 8008a72:	2200      	movs	r2, #0
- 8008a74:	4b5c      	ldr	r3, [pc, #368]	; (8008be8 <_dtoa_r+0x5b8>)
- 8008a76:	f7f7 fbe3 	bl	8000240 <__aeabi_dsub>
- 8008a7a:	4602      	mov	r2, r0
- 8008a7c:	460b      	mov	r3, r1
- 8008a7e:	e9cd 2304 	strd	r2, r3, [sp, #16]
- 8008a82:	4633      	mov	r3, r6
- 8008a84:	9a10      	ldr	r2, [sp, #64]	; 0x40
- 8008a86:	f7f8 f823 	bl	8000ad0 <__aeabi_dcmpgt>
- 8008a8a:	2800      	cmp	r0, #0
- 8008a8c:	f040 829e 	bne.w	8008fcc <_dtoa_r+0x99c>
- 8008a90:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
- 8008a94:	9a10      	ldr	r2, [sp, #64]	; 0x40
- 8008a96:	f106 4300 	add.w	r3, r6, #2147483648	; 0x80000000
- 8008a9a:	f7f7 fffb 	bl	8000a94 <__aeabi_dcmplt>
- 8008a9e:	2800      	cmp	r0, #0
- 8008aa0:	f040 8292 	bne.w	8008fc8 <_dtoa_r+0x998>
- 8008aa4:	e9dd 340c 	ldrd	r3, r4, [sp, #48]	; 0x30
- 8008aa8:	e9cd 3404 	strd	r3, r4, [sp, #16]
- 8008aac:	9b17      	ldr	r3, [sp, #92]	; 0x5c
- 8008aae:	2b00      	cmp	r3, #0
- 8008ab0:	f2c0 8153 	blt.w	8008d5a <_dtoa_r+0x72a>
- 8008ab4:	f1b9 0f0e 	cmp.w	r9, #14
- 8008ab8:	f300 814f 	bgt.w	8008d5a <_dtoa_r+0x72a>
- 8008abc:	4b45      	ldr	r3, [pc, #276]	; (8008bd4 <_dtoa_r+0x5a4>)
- 8008abe:	eb03 03c9 	add.w	r3, r3, r9, lsl #3
- 8008ac2:	e9d3 3400 	ldrd	r3, r4, [r3]
- 8008ac6:	e9cd 3406 	strd	r3, r4, [sp, #24]
- 8008aca:	9b23      	ldr	r3, [sp, #140]	; 0x8c
- 8008acc:	2b00      	cmp	r3, #0
- 8008ace:	f280 80db 	bge.w	8008c88 <_dtoa_r+0x658>
- 8008ad2:	9b02      	ldr	r3, [sp, #8]
- 8008ad4:	2b00      	cmp	r3, #0
- 8008ad6:	f300 80d7 	bgt.w	8008c88 <_dtoa_r+0x658>
- 8008ada:	f040 8274 	bne.w	8008fc6 <_dtoa_r+0x996>
- 8008ade:	e9dd 0106 	ldrd	r0, r1, [sp, #24]
- 8008ae2:	2200      	movs	r2, #0
- 8008ae4:	4b40      	ldr	r3, [pc, #256]	; (8008be8 <_dtoa_r+0x5b8>)
- 8008ae6:	f7f7 fd63 	bl	80005b0 <__aeabi_dmul>
- 8008aea:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
- 8008aee:	f7f7 ffe5 	bl	8000abc <__aeabi_dcmpge>
- 8008af2:	9c02      	ldr	r4, [sp, #8]
- 8008af4:	4626      	mov	r6, r4
- 8008af6:	2800      	cmp	r0, #0
- 8008af8:	f040 824a 	bne.w	8008f90 <_dtoa_r+0x960>
- 8008afc:	2331      	movs	r3, #49	; 0x31
- 8008afe:	9f08      	ldr	r7, [sp, #32]
- 8008b00:	f109 0901 	add.w	r9, r9, #1
- 8008b04:	f807 3b01 	strb.w	r3, [r7], #1
- 8008b08:	e246      	b.n	8008f98 <_dtoa_r+0x968>
- 8008b0a:	07e2      	lsls	r2, r4, #31
- 8008b0c:	d505      	bpl.n	8008b1a <_dtoa_r+0x4ea>
- 8008b0e:	e9d6 2300 	ldrd	r2, r3, [r6]
- 8008b12:	f7f7 fd4d 	bl	80005b0 <__aeabi_dmul>
- 8008b16:	2301      	movs	r3, #1
- 8008b18:	3701      	adds	r7, #1
- 8008b1a:	1064      	asrs	r4, r4, #1
- 8008b1c:	3608      	adds	r6, #8
- 8008b1e:	e76d      	b.n	80089fc <_dtoa_r+0x3cc>
- 8008b20:	2702      	movs	r7, #2
- 8008b22:	e770      	b.n	8008a06 <_dtoa_r+0x3d6>
- 8008b24:	46c8      	mov	r8, r9
- 8008b26:	9c02      	ldr	r4, [sp, #8]
- 8008b28:	e78f      	b.n	8008a4a <_dtoa_r+0x41a>
- 8008b2a:	9908      	ldr	r1, [sp, #32]
- 8008b2c:	4b29      	ldr	r3, [pc, #164]	; (8008bd4 <_dtoa_r+0x5a4>)
- 8008b2e:	4421      	add	r1, r4
- 8008b30:	9112      	str	r1, [sp, #72]	; 0x48
- 8008b32:	990b      	ldr	r1, [sp, #44]	; 0x2c
- 8008b34:	eb03 03c4 	add.w	r3, r3, r4, lsl #3
- 8008b38:	e9dd 6710 	ldrd	r6, r7, [sp, #64]	; 0x40
- 8008b3c:	e953 2302 	ldrd	r2, r3, [r3, #-8]
- 8008b40:	2900      	cmp	r1, #0
- 8008b42:	d055      	beq.n	8008bf0 <_dtoa_r+0x5c0>
- 8008b44:	2000      	movs	r0, #0
- 8008b46:	4929      	ldr	r1, [pc, #164]	; (8008bec <_dtoa_r+0x5bc>)
- 8008b48:	f7f7 fe5c 	bl	8000804 <__aeabi_ddiv>
- 8008b4c:	463b      	mov	r3, r7
- 8008b4e:	4632      	mov	r2, r6
- 8008b50:	f7f7 fb76 	bl	8000240 <__aeabi_dsub>
- 8008b54:	e9cd 0110 	strd	r0, r1, [sp, #64]	; 0x40
- 8008b58:	9f08      	ldr	r7, [sp, #32]
- 8008b5a:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
- 8008b5e:	f7f7 ffd7 	bl	8000b10 <__aeabi_d2iz>
- 8008b62:	4604      	mov	r4, r0
- 8008b64:	f7f7 fcba 	bl	80004dc <__aeabi_i2d>
- 8008b68:	4602      	mov	r2, r0
- 8008b6a:	460b      	mov	r3, r1
- 8008b6c:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
- 8008b70:	f7f7 fb66 	bl	8000240 <__aeabi_dsub>
- 8008b74:	4602      	mov	r2, r0
- 8008b76:	460b      	mov	r3, r1
- 8008b78:	3430      	adds	r4, #48	; 0x30
- 8008b7a:	e9cd 2304 	strd	r2, r3, [sp, #16]
- 8008b7e:	e9dd 2310 	ldrd	r2, r3, [sp, #64]	; 0x40
- 8008b82:	f807 4b01 	strb.w	r4, [r7], #1
- 8008b86:	f7f7 ff85 	bl	8000a94 <__aeabi_dcmplt>
- 8008b8a:	2800      	cmp	r0, #0
- 8008b8c:	d174      	bne.n	8008c78 <_dtoa_r+0x648>
- 8008b8e:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
- 8008b92:	2000      	movs	r0, #0
- 8008b94:	4911      	ldr	r1, [pc, #68]	; (8008bdc <_dtoa_r+0x5ac>)
- 8008b96:	f7f7 fb53 	bl	8000240 <__aeabi_dsub>
- 8008b9a:	e9dd 2310 	ldrd	r2, r3, [sp, #64]	; 0x40
- 8008b9e:	f7f7 ff79 	bl	8000a94 <__aeabi_dcmplt>
- 8008ba2:	2800      	cmp	r0, #0
- 8008ba4:	f040 80b6 	bne.w	8008d14 <_dtoa_r+0x6e4>
- 8008ba8:	9b12      	ldr	r3, [sp, #72]	; 0x48
- 8008baa:	429f      	cmp	r7, r3
- 8008bac:	f43f af7a 	beq.w	8008aa4 <_dtoa_r+0x474>
- 8008bb0:	e9dd 0110 	ldrd	r0, r1, [sp, #64]	; 0x40
- 8008bb4:	2200      	movs	r2, #0
- 8008bb6:	4b0a      	ldr	r3, [pc, #40]	; (8008be0 <_dtoa_r+0x5b0>)
- 8008bb8:	f7f7 fcfa 	bl	80005b0 <__aeabi_dmul>
- 8008bbc:	2200      	movs	r2, #0
- 8008bbe:	e9cd 0110 	strd	r0, r1, [sp, #64]	; 0x40
- 8008bc2:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
- 8008bc6:	4b06      	ldr	r3, [pc, #24]	; (8008be0 <_dtoa_r+0x5b0>)
- 8008bc8:	f7f7 fcf2 	bl	80005b0 <__aeabi_dmul>
- 8008bcc:	e9cd 0104 	strd	r0, r1, [sp, #16]
- 8008bd0:	e7c3      	b.n	8008b5a <_dtoa_r+0x52a>
- 8008bd2:	bf00      	nop
- 8008bd4:	0800b408 	.word	0x0800b408
- 8008bd8:	0800b3e0 	.word	0x0800b3e0
- 8008bdc:	3ff00000 	.word	0x3ff00000
- 8008be0:	40240000 	.word	0x40240000
- 8008be4:	401c0000 	.word	0x401c0000
- 8008be8:	40140000 	.word	0x40140000
- 8008bec:	3fe00000 	.word	0x3fe00000
- 8008bf0:	4630      	mov	r0, r6
- 8008bf2:	4639      	mov	r1, r7
- 8008bf4:	f7f7 fcdc 	bl	80005b0 <__aeabi_dmul>
- 8008bf8:	9b12      	ldr	r3, [sp, #72]	; 0x48
- 8008bfa:	e9cd 0110 	strd	r0, r1, [sp, #64]	; 0x40
- 8008bfe:	9c08      	ldr	r4, [sp, #32]
- 8008c00:	9314      	str	r3, [sp, #80]	; 0x50
- 8008c02:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
- 8008c06:	f7f7 ff83 	bl	8000b10 <__aeabi_d2iz>
- 8008c0a:	9015      	str	r0, [sp, #84]	; 0x54
- 8008c0c:	f7f7 fc66 	bl	80004dc <__aeabi_i2d>
- 8008c10:	4602      	mov	r2, r0
- 8008c12:	460b      	mov	r3, r1
- 8008c14:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
- 8008c18:	f7f7 fb12 	bl	8000240 <__aeabi_dsub>
- 8008c1c:	9b15      	ldr	r3, [sp, #84]	; 0x54
- 8008c1e:	4606      	mov	r6, r0
- 8008c20:	3330      	adds	r3, #48	; 0x30
- 8008c22:	f804 3b01 	strb.w	r3, [r4], #1
- 8008c26:	9b12      	ldr	r3, [sp, #72]	; 0x48
- 8008c28:	460f      	mov	r7, r1
- 8008c2a:	429c      	cmp	r4, r3
- 8008c2c:	f04f 0200 	mov.w	r2, #0
- 8008c30:	d124      	bne.n	8008c7c <_dtoa_r+0x64c>
- 8008c32:	e9dd 0110 	ldrd	r0, r1, [sp, #64]	; 0x40
- 8008c36:	4bb3      	ldr	r3, [pc, #716]	; (8008f04 <_dtoa_r+0x8d4>)
- 8008c38:	f7f7 fb04 	bl	8000244 <__adddf3>
- 8008c3c:	4602      	mov	r2, r0
- 8008c3e:	460b      	mov	r3, r1
- 8008c40:	4630      	mov	r0, r6
- 8008c42:	4639      	mov	r1, r7
- 8008c44:	f7f7 ff44 	bl	8000ad0 <__aeabi_dcmpgt>
- 8008c48:	2800      	cmp	r0, #0
- 8008c4a:	d162      	bne.n	8008d12 <_dtoa_r+0x6e2>
- 8008c4c:	e9dd 2310 	ldrd	r2, r3, [sp, #64]	; 0x40
- 8008c50:	2000      	movs	r0, #0
- 8008c52:	49ac      	ldr	r1, [pc, #688]	; (8008f04 <_dtoa_r+0x8d4>)
- 8008c54:	f7f7 faf4 	bl	8000240 <__aeabi_dsub>
- 8008c58:	4602      	mov	r2, r0
- 8008c5a:	460b      	mov	r3, r1
- 8008c5c:	4630      	mov	r0, r6
- 8008c5e:	4639      	mov	r1, r7
- 8008c60:	f7f7 ff18 	bl	8000a94 <__aeabi_dcmplt>
- 8008c64:	2800      	cmp	r0, #0
- 8008c66:	f43f af1d 	beq.w	8008aa4 <_dtoa_r+0x474>
- 8008c6a:	9f14      	ldr	r7, [sp, #80]	; 0x50
- 8008c6c:	1e7b      	subs	r3, r7, #1
- 8008c6e:	9314      	str	r3, [sp, #80]	; 0x50
- 8008c70:	f817 3c01 	ldrb.w	r3, [r7, #-1]
- 8008c74:	2b30      	cmp	r3, #48	; 0x30
- 8008c76:	d0f8      	beq.n	8008c6a <_dtoa_r+0x63a>
- 8008c78:	46c1      	mov	r9, r8
- 8008c7a:	e03a      	b.n	8008cf2 <_dtoa_r+0x6c2>
- 8008c7c:	4ba2      	ldr	r3, [pc, #648]	; (8008f08 <_dtoa_r+0x8d8>)
- 8008c7e:	f7f7 fc97 	bl	80005b0 <__aeabi_dmul>
- 8008c82:	e9cd 0104 	strd	r0, r1, [sp, #16]
- 8008c86:	e7bc      	b.n	8008c02 <_dtoa_r+0x5d2>
- 8008c88:	9f08      	ldr	r7, [sp, #32]
- 8008c8a:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
- 8008c8e:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
+08008940 <_dtoa_r>:
+ 8008940:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 8008944:	4616      	mov	r6, r2
+ 8008946:	461f      	mov	r7, r3
+ 8008948:	69c4      	ldr	r4, [r0, #28]
+ 800894a:	b099      	sub	sp, #100	; 0x64
+ 800894c:	4605      	mov	r5, r0
+ 800894e:	e9cd 6704 	strd	r6, r7, [sp, #16]
+ 8008952:	f8dd 8094 	ldr.w	r8, [sp, #148]	; 0x94
+ 8008956:	b974      	cbnz	r4, 8008976 <_dtoa_r+0x36>
+ 8008958:	2010      	movs	r0, #16
+ 800895a:	f7fe fff5 	bl	8007948 <malloc>
+ 800895e:	4602      	mov	r2, r0
+ 8008960:	61e8      	str	r0, [r5, #28]
+ 8008962:	b920      	cbnz	r0, 800896e <_dtoa_r+0x2e>
+ 8008964:	21ef      	movs	r1, #239	; 0xef
+ 8008966:	4bac      	ldr	r3, [pc, #688]	; (8008c18 <_dtoa_r+0x2d8>)
+ 8008968:	48ac      	ldr	r0, [pc, #688]	; (8008c1c <_dtoa_r+0x2dc>)
+ 800896a:	f001 fd7d 	bl	800a468 <__assert_func>
+ 800896e:	e9c0 4401 	strd	r4, r4, [r0, #4]
+ 8008972:	6004      	str	r4, [r0, #0]
+ 8008974:	60c4      	str	r4, [r0, #12]
+ 8008976:	69eb      	ldr	r3, [r5, #28]
+ 8008978:	6819      	ldr	r1, [r3, #0]
+ 800897a:	b151      	cbz	r1, 8008992 <_dtoa_r+0x52>
+ 800897c:	685a      	ldr	r2, [r3, #4]
+ 800897e:	2301      	movs	r3, #1
+ 8008980:	4093      	lsls	r3, r2
+ 8008982:	604a      	str	r2, [r1, #4]
+ 8008984:	608b      	str	r3, [r1, #8]
+ 8008986:	4628      	mov	r0, r5
+ 8008988:	f000 fe46 	bl	8009618 <_Bfree>
+ 800898c:	2200      	movs	r2, #0
+ 800898e:	69eb      	ldr	r3, [r5, #28]
+ 8008990:	601a      	str	r2, [r3, #0]
+ 8008992:	1e3b      	subs	r3, r7, #0
+ 8008994:	bfaf      	iteee	ge
+ 8008996:	2300      	movge	r3, #0
+ 8008998:	2201      	movlt	r2, #1
+ 800899a:	f023 4300 	biclt.w	r3, r3, #2147483648	; 0x80000000
+ 800899e:	9305      	strlt	r3, [sp, #20]
+ 80089a0:	bfa8      	it	ge
+ 80089a2:	f8c8 3000 	strge.w	r3, [r8]
+ 80089a6:	f8dd 9014 	ldr.w	r9, [sp, #20]
+ 80089aa:	4b9d      	ldr	r3, [pc, #628]	; (8008c20 <_dtoa_r+0x2e0>)
+ 80089ac:	bfb8      	it	lt
+ 80089ae:	f8c8 2000 	strlt.w	r2, [r8]
+ 80089b2:	ea33 0309 	bics.w	r3, r3, r9
+ 80089b6:	d119      	bne.n	80089ec <_dtoa_r+0xac>
+ 80089b8:	f242 730f 	movw	r3, #9999	; 0x270f
+ 80089bc:	9a24      	ldr	r2, [sp, #144]	; 0x90
+ 80089be:	6013      	str	r3, [r2, #0]
+ 80089c0:	f3c9 0313 	ubfx	r3, r9, #0, #20
+ 80089c4:	4333      	orrs	r3, r6
+ 80089c6:	f000 8589 	beq.w	80094dc <_dtoa_r+0xb9c>
+ 80089ca:	9b26      	ldr	r3, [sp, #152]	; 0x98
+ 80089cc:	b953      	cbnz	r3, 80089e4 <_dtoa_r+0xa4>
+ 80089ce:	4b95      	ldr	r3, [pc, #596]	; (8008c24 <_dtoa_r+0x2e4>)
+ 80089d0:	e023      	b.n	8008a1a <_dtoa_r+0xda>
+ 80089d2:	4b95      	ldr	r3, [pc, #596]	; (8008c28 <_dtoa_r+0x2e8>)
+ 80089d4:	9303      	str	r3, [sp, #12]
+ 80089d6:	3308      	adds	r3, #8
+ 80089d8:	9a26      	ldr	r2, [sp, #152]	; 0x98
+ 80089da:	6013      	str	r3, [r2, #0]
+ 80089dc:	9803      	ldr	r0, [sp, #12]
+ 80089de:	b019      	add	sp, #100	; 0x64
+ 80089e0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+ 80089e4:	4b8f      	ldr	r3, [pc, #572]	; (8008c24 <_dtoa_r+0x2e4>)
+ 80089e6:	9303      	str	r3, [sp, #12]
+ 80089e8:	3303      	adds	r3, #3
+ 80089ea:	e7f5      	b.n	80089d8 <_dtoa_r+0x98>
+ 80089ec:	e9dd 3404 	ldrd	r3, r4, [sp, #16]
+ 80089f0:	e9cd 340c 	strd	r3, r4, [sp, #48]	; 0x30
+ 80089f4:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
+ 80089f8:	2200      	movs	r2, #0
+ 80089fa:	2300      	movs	r3, #0
+ 80089fc:	f7f8 f840 	bl	8000a80 <__aeabi_dcmpeq>
+ 8008a00:	4680      	mov	r8, r0
+ 8008a02:	b160      	cbz	r0, 8008a1e <_dtoa_r+0xde>
+ 8008a04:	2301      	movs	r3, #1
+ 8008a06:	9a24      	ldr	r2, [sp, #144]	; 0x90
+ 8008a08:	6013      	str	r3, [r2, #0]
+ 8008a0a:	9b26      	ldr	r3, [sp, #152]	; 0x98
+ 8008a0c:	2b00      	cmp	r3, #0
+ 8008a0e:	f000 8562 	beq.w	80094d6 <_dtoa_r+0xb96>
+ 8008a12:	4b86      	ldr	r3, [pc, #536]	; (8008c2c <_dtoa_r+0x2ec>)
+ 8008a14:	9a26      	ldr	r2, [sp, #152]	; 0x98
+ 8008a16:	6013      	str	r3, [r2, #0]
+ 8008a18:	3b01      	subs	r3, #1
+ 8008a1a:	9303      	str	r3, [sp, #12]
+ 8008a1c:	e7de      	b.n	80089dc <_dtoa_r+0x9c>
+ 8008a1e:	ab16      	add	r3, sp, #88	; 0x58
+ 8008a20:	9301      	str	r3, [sp, #4]
+ 8008a22:	ab17      	add	r3, sp, #92	; 0x5c
+ 8008a24:	9300      	str	r3, [sp, #0]
+ 8008a26:	4628      	mov	r0, r5
+ 8008a28:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
+ 8008a2c:	f001 f8d6 	bl	8009bdc <__d2b>
+ 8008a30:	f3c9 540a 	ubfx	r4, r9, #20, #11
+ 8008a34:	4682      	mov	sl, r0
+ 8008a36:	2c00      	cmp	r4, #0
+ 8008a38:	d07e      	beq.n	8008b38 <_dtoa_r+0x1f8>
+ 8008a3a:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
+ 8008a3e:	9b0d      	ldr	r3, [sp, #52]	; 0x34
+ 8008a40:	f2a4 34ff 	subw	r4, r4, #1023	; 0x3ff
+ 8008a44:	f3c3 0313 	ubfx	r3, r3, #0, #20
+ 8008a48:	f043 537f 	orr.w	r3, r3, #1069547520	; 0x3fc00000
+ 8008a4c:	f443 1340 	orr.w	r3, r3, #3145728	; 0x300000
+ 8008a50:	f8cd 804c 	str.w	r8, [sp, #76]	; 0x4c
+ 8008a54:	4619      	mov	r1, r3
+ 8008a56:	2200      	movs	r2, #0
+ 8008a58:	4b75      	ldr	r3, [pc, #468]	; (8008c30 <_dtoa_r+0x2f0>)
+ 8008a5a:	f7f7 fbf1 	bl	8000240 <__aeabi_dsub>
+ 8008a5e:	a368      	add	r3, pc, #416	; (adr r3, 8008c00 <_dtoa_r+0x2c0>)
+ 8008a60:	e9d3 2300 	ldrd	r2, r3, [r3]
+ 8008a64:	f7f7 fda4 	bl	80005b0 <__aeabi_dmul>
+ 8008a68:	a367      	add	r3, pc, #412	; (adr r3, 8008c08 <_dtoa_r+0x2c8>)
+ 8008a6a:	e9d3 2300 	ldrd	r2, r3, [r3]
+ 8008a6e:	f7f7 fbe9 	bl	8000244 <__adddf3>
+ 8008a72:	4606      	mov	r6, r0
+ 8008a74:	4620      	mov	r0, r4
+ 8008a76:	460f      	mov	r7, r1
+ 8008a78:	f7f7 fd30 	bl	80004dc <__aeabi_i2d>
+ 8008a7c:	a364      	add	r3, pc, #400	; (adr r3, 8008c10 <_dtoa_r+0x2d0>)
+ 8008a7e:	e9d3 2300 	ldrd	r2, r3, [r3]
+ 8008a82:	f7f7 fd95 	bl	80005b0 <__aeabi_dmul>
+ 8008a86:	4602      	mov	r2, r0
+ 8008a88:	460b      	mov	r3, r1
+ 8008a8a:	4630      	mov	r0, r6
+ 8008a8c:	4639      	mov	r1, r7
+ 8008a8e:	f7f7 fbd9 	bl	8000244 <__adddf3>
+ 8008a92:	4606      	mov	r6, r0
+ 8008a94:	460f      	mov	r7, r1
+ 8008a96:	f7f8 f83b 	bl	8000b10 <__aeabi_d2iz>
+ 8008a9a:	2200      	movs	r2, #0
+ 8008a9c:	4683      	mov	fp, r0
+ 8008a9e:	2300      	movs	r3, #0
+ 8008aa0:	4630      	mov	r0, r6
+ 8008aa2:	4639      	mov	r1, r7
+ 8008aa4:	f7f7 fff6 	bl	8000a94 <__aeabi_dcmplt>
+ 8008aa8:	b148      	cbz	r0, 8008abe <_dtoa_r+0x17e>
+ 8008aaa:	4658      	mov	r0, fp
+ 8008aac:	f7f7 fd16 	bl	80004dc <__aeabi_i2d>
+ 8008ab0:	4632      	mov	r2, r6
+ 8008ab2:	463b      	mov	r3, r7
+ 8008ab4:	f7f7 ffe4 	bl	8000a80 <__aeabi_dcmpeq>
+ 8008ab8:	b908      	cbnz	r0, 8008abe <_dtoa_r+0x17e>
+ 8008aba:	f10b 3bff 	add.w	fp, fp, #4294967295
+ 8008abe:	f1bb 0f16 	cmp.w	fp, #22
+ 8008ac2:	d857      	bhi.n	8008b74 <_dtoa_r+0x234>
+ 8008ac4:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
+ 8008ac8:	4b5a      	ldr	r3, [pc, #360]	; (8008c34 <_dtoa_r+0x2f4>)
+ 8008aca:	eb03 03cb 	add.w	r3, r3, fp, lsl #3
+ 8008ace:	e9d3 2300 	ldrd	r2, r3, [r3]
+ 8008ad2:	f7f7 ffdf 	bl	8000a94 <__aeabi_dcmplt>
+ 8008ad6:	2800      	cmp	r0, #0
+ 8008ad8:	d04e      	beq.n	8008b78 <_dtoa_r+0x238>
+ 8008ada:	2300      	movs	r3, #0
+ 8008adc:	f10b 3bff 	add.w	fp, fp, #4294967295
+ 8008ae0:	930f      	str	r3, [sp, #60]	; 0x3c
+ 8008ae2:	9b16      	ldr	r3, [sp, #88]	; 0x58
+ 8008ae4:	1b1b      	subs	r3, r3, r4
+ 8008ae6:	1e5a      	subs	r2, r3, #1
+ 8008ae8:	bf46      	itte	mi
+ 8008aea:	f1c3 0901 	rsbmi	r9, r3, #1
+ 8008aee:	2300      	movmi	r3, #0
+ 8008af0:	f04f 0900 	movpl.w	r9, #0
+ 8008af4:	9209      	str	r2, [sp, #36]	; 0x24
+ 8008af6:	bf48      	it	mi
+ 8008af8:	9309      	strmi	r3, [sp, #36]	; 0x24
+ 8008afa:	f1bb 0f00 	cmp.w	fp, #0
+ 8008afe:	db3d      	blt.n	8008b7c <_dtoa_r+0x23c>
+ 8008b00:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 8008b02:	f8cd b038 	str.w	fp, [sp, #56]	; 0x38
+ 8008b06:	445b      	add	r3, fp
+ 8008b08:	9309      	str	r3, [sp, #36]	; 0x24
+ 8008b0a:	2300      	movs	r3, #0
+ 8008b0c:	930a      	str	r3, [sp, #40]	; 0x28
+ 8008b0e:	9b22      	ldr	r3, [sp, #136]	; 0x88
+ 8008b10:	2b09      	cmp	r3, #9
+ 8008b12:	d867      	bhi.n	8008be4 <_dtoa_r+0x2a4>
+ 8008b14:	2b05      	cmp	r3, #5
+ 8008b16:	bfc4      	itt	gt
+ 8008b18:	3b04      	subgt	r3, #4
+ 8008b1a:	9322      	strgt	r3, [sp, #136]	; 0x88
+ 8008b1c:	9b22      	ldr	r3, [sp, #136]	; 0x88
+ 8008b1e:	bfc8      	it	gt
+ 8008b20:	2400      	movgt	r4, #0
+ 8008b22:	f1a3 0302 	sub.w	r3, r3, #2
+ 8008b26:	bfd8      	it	le
+ 8008b28:	2401      	movle	r4, #1
+ 8008b2a:	2b03      	cmp	r3, #3
+ 8008b2c:	f200 8086 	bhi.w	8008c3c <_dtoa_r+0x2fc>
+ 8008b30:	e8df f003 	tbb	[pc, r3]
+ 8008b34:	5637392c 	.word	0x5637392c
+ 8008b38:	e9dd 4316 	ldrd	r4, r3, [sp, #88]	; 0x58
+ 8008b3c:	441c      	add	r4, r3
+ 8008b3e:	f204 4332 	addw	r3, r4, #1074	; 0x432
+ 8008b42:	2b20      	cmp	r3, #32
+ 8008b44:	bfc1      	itttt	gt
+ 8008b46:	f1c3 0340 	rsbgt	r3, r3, #64	; 0x40
+ 8008b4a:	fa09 f903 	lslgt.w	r9, r9, r3
+ 8008b4e:	f204 4312 	addwgt	r3, r4, #1042	; 0x412
+ 8008b52:	fa26 f303 	lsrgt.w	r3, r6, r3
+ 8008b56:	bfd6      	itet	le
+ 8008b58:	f1c3 0320 	rsble	r3, r3, #32
+ 8008b5c:	ea49 0003 	orrgt.w	r0, r9, r3
+ 8008b60:	fa06 f003 	lslle.w	r0, r6, r3
+ 8008b64:	f7f7 fcaa 	bl	80004bc <__aeabi_ui2d>
+ 8008b68:	2201      	movs	r2, #1
+ 8008b6a:	f1a1 73f8 	sub.w	r3, r1, #32505856	; 0x1f00000
+ 8008b6e:	3c01      	subs	r4, #1
+ 8008b70:	9213      	str	r2, [sp, #76]	; 0x4c
+ 8008b72:	e76f      	b.n	8008a54 <_dtoa_r+0x114>
+ 8008b74:	2301      	movs	r3, #1
+ 8008b76:	e7b3      	b.n	8008ae0 <_dtoa_r+0x1a0>
+ 8008b78:	900f      	str	r0, [sp, #60]	; 0x3c
+ 8008b7a:	e7b2      	b.n	8008ae2 <_dtoa_r+0x1a2>
+ 8008b7c:	f1cb 0300 	rsb	r3, fp, #0
+ 8008b80:	930a      	str	r3, [sp, #40]	; 0x28
+ 8008b82:	2300      	movs	r3, #0
+ 8008b84:	eba9 090b 	sub.w	r9, r9, fp
+ 8008b88:	930e      	str	r3, [sp, #56]	; 0x38
+ 8008b8a:	e7c0      	b.n	8008b0e <_dtoa_r+0x1ce>
+ 8008b8c:	2300      	movs	r3, #0
+ 8008b8e:	930b      	str	r3, [sp, #44]	; 0x2c
+ 8008b90:	9b23      	ldr	r3, [sp, #140]	; 0x8c
+ 8008b92:	2b00      	cmp	r3, #0
+ 8008b94:	dc55      	bgt.n	8008c42 <_dtoa_r+0x302>
+ 8008b96:	2301      	movs	r3, #1
+ 8008b98:	461a      	mov	r2, r3
+ 8008b9a:	9306      	str	r3, [sp, #24]
+ 8008b9c:	9308      	str	r3, [sp, #32]
+ 8008b9e:	9223      	str	r2, [sp, #140]	; 0x8c
+ 8008ba0:	e00b      	b.n	8008bba <_dtoa_r+0x27a>
+ 8008ba2:	2301      	movs	r3, #1
+ 8008ba4:	e7f3      	b.n	8008b8e <_dtoa_r+0x24e>
+ 8008ba6:	2300      	movs	r3, #0
+ 8008ba8:	930b      	str	r3, [sp, #44]	; 0x2c
+ 8008baa:	9b23      	ldr	r3, [sp, #140]	; 0x8c
+ 8008bac:	445b      	add	r3, fp
+ 8008bae:	9306      	str	r3, [sp, #24]
+ 8008bb0:	3301      	adds	r3, #1
+ 8008bb2:	2b01      	cmp	r3, #1
+ 8008bb4:	9308      	str	r3, [sp, #32]
+ 8008bb6:	bfb8      	it	lt
+ 8008bb8:	2301      	movlt	r3, #1
+ 8008bba:	2100      	movs	r1, #0
+ 8008bbc:	2204      	movs	r2, #4
+ 8008bbe:	69e8      	ldr	r0, [r5, #28]
+ 8008bc0:	f102 0614 	add.w	r6, r2, #20
+ 8008bc4:	429e      	cmp	r6, r3
+ 8008bc6:	d940      	bls.n	8008c4a <_dtoa_r+0x30a>
+ 8008bc8:	6041      	str	r1, [r0, #4]
+ 8008bca:	4628      	mov	r0, r5
+ 8008bcc:	f000 fce4 	bl	8009598 <_Balloc>
+ 8008bd0:	9003      	str	r0, [sp, #12]
+ 8008bd2:	2800      	cmp	r0, #0
+ 8008bd4:	d13c      	bne.n	8008c50 <_dtoa_r+0x310>
+ 8008bd6:	4602      	mov	r2, r0
+ 8008bd8:	f240 11af 	movw	r1, #431	; 0x1af
+ 8008bdc:	4b16      	ldr	r3, [pc, #88]	; (8008c38 <_dtoa_r+0x2f8>)
+ 8008bde:	e6c3      	b.n	8008968 <_dtoa_r+0x28>
+ 8008be0:	2301      	movs	r3, #1
+ 8008be2:	e7e1      	b.n	8008ba8 <_dtoa_r+0x268>
+ 8008be4:	2401      	movs	r4, #1
+ 8008be6:	2300      	movs	r3, #0
+ 8008be8:	940b      	str	r4, [sp, #44]	; 0x2c
+ 8008bea:	9322      	str	r3, [sp, #136]	; 0x88
+ 8008bec:	f04f 33ff 	mov.w	r3, #4294967295
+ 8008bf0:	2200      	movs	r2, #0
+ 8008bf2:	9306      	str	r3, [sp, #24]
+ 8008bf4:	9308      	str	r3, [sp, #32]
+ 8008bf6:	2312      	movs	r3, #18
+ 8008bf8:	e7d1      	b.n	8008b9e <_dtoa_r+0x25e>
+ 8008bfa:	bf00      	nop
+ 8008bfc:	f3af 8000 	nop.w
+ 8008c00:	636f4361 	.word	0x636f4361
+ 8008c04:	3fd287a7 	.word	0x3fd287a7
+ 8008c08:	8b60c8b3 	.word	0x8b60c8b3
+ 8008c0c:	3fc68a28 	.word	0x3fc68a28
+ 8008c10:	509f79fb 	.word	0x509f79fb
+ 8008c14:	3fd34413 	.word	0x3fd34413
+ 8008c18:	0800b283 	.word	0x0800b283
+ 8008c1c:	0800b29a 	.word	0x0800b29a
+ 8008c20:	7ff00000 	.word	0x7ff00000
+ 8008c24:	0800b27f 	.word	0x0800b27f
+ 8008c28:	0800b276 	.word	0x0800b276
+ 8008c2c:	0800b253 	.word	0x0800b253
+ 8008c30:	3ff80000 	.word	0x3ff80000
+ 8008c34:	0800b388 	.word	0x0800b388
+ 8008c38:	0800b2f2 	.word	0x0800b2f2
+ 8008c3c:	2301      	movs	r3, #1
+ 8008c3e:	930b      	str	r3, [sp, #44]	; 0x2c
+ 8008c40:	e7d4      	b.n	8008bec <_dtoa_r+0x2ac>
+ 8008c42:	9b23      	ldr	r3, [sp, #140]	; 0x8c
+ 8008c44:	9306      	str	r3, [sp, #24]
+ 8008c46:	9308      	str	r3, [sp, #32]
+ 8008c48:	e7b7      	b.n	8008bba <_dtoa_r+0x27a>
+ 8008c4a:	3101      	adds	r1, #1
+ 8008c4c:	0052      	lsls	r2, r2, #1
+ 8008c4e:	e7b7      	b.n	8008bc0 <_dtoa_r+0x280>
+ 8008c50:	69eb      	ldr	r3, [r5, #28]
+ 8008c52:	9a03      	ldr	r2, [sp, #12]
+ 8008c54:	601a      	str	r2, [r3, #0]
+ 8008c56:	9b08      	ldr	r3, [sp, #32]
+ 8008c58:	2b0e      	cmp	r3, #14
+ 8008c5a:	f200 80a8 	bhi.w	8008dae <_dtoa_r+0x46e>
+ 8008c5e:	2c00      	cmp	r4, #0
+ 8008c60:	f000 80a5 	beq.w	8008dae <_dtoa_r+0x46e>
+ 8008c64:	f1bb 0f00 	cmp.w	fp, #0
+ 8008c68:	dd34      	ble.n	8008cd4 <_dtoa_r+0x394>
+ 8008c6a:	4b9a      	ldr	r3, [pc, #616]	; (8008ed4 <_dtoa_r+0x594>)
+ 8008c6c:	f00b 020f 	and.w	r2, fp, #15
+ 8008c70:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
+ 8008c74:	f41b 7f80 	tst.w	fp, #256	; 0x100
+ 8008c78:	e9d3 3400 	ldrd	r3, r4, [r3]
+ 8008c7c:	e9cd 3410 	strd	r3, r4, [sp, #64]	; 0x40
+ 8008c80:	ea4f 142b 	mov.w	r4, fp, asr #4
+ 8008c84:	d016      	beq.n	8008cb4 <_dtoa_r+0x374>
+ 8008c86:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
+ 8008c8a:	4b93      	ldr	r3, [pc, #588]	; (8008ed8 <_dtoa_r+0x598>)
+ 8008c8c:	2703      	movs	r7, #3
+ 8008c8e:	e9d3 2308 	ldrd	r2, r3, [r3, #32]
  8008c92:	f7f7 fdb7 	bl	8000804 <__aeabi_ddiv>
- 8008c96:	f7f7 ff3b 	bl	8000b10 <__aeabi_d2iz>
- 8008c9a:	4604      	mov	r4, r0
- 8008c9c:	f7f7 fc1e 	bl	80004dc <__aeabi_i2d>
- 8008ca0:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
- 8008ca4:	f7f7 fc84 	bl	80005b0 <__aeabi_dmul>
- 8008ca8:	f104 0630 	add.w	r6, r4, #48	; 0x30
- 8008cac:	460b      	mov	r3, r1
- 8008cae:	4602      	mov	r2, r0
- 8008cb0:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
- 8008cb4:	f7f7 fac4 	bl	8000240 <__aeabi_dsub>
- 8008cb8:	f807 6b01 	strb.w	r6, [r7], #1
- 8008cbc:	9e08      	ldr	r6, [sp, #32]
- 8008cbe:	9b02      	ldr	r3, [sp, #8]
- 8008cc0:	1bbe      	subs	r6, r7, r6
- 8008cc2:	42b3      	cmp	r3, r6
- 8008cc4:	d13a      	bne.n	8008d3c <_dtoa_r+0x70c>
- 8008cc6:	4602      	mov	r2, r0
- 8008cc8:	460b      	mov	r3, r1
- 8008cca:	f7f7 fabb 	bl	8000244 <__adddf3>
- 8008cce:	4602      	mov	r2, r0
- 8008cd0:	460b      	mov	r3, r1
- 8008cd2:	e9cd 2302 	strd	r2, r3, [sp, #8]
- 8008cd6:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
- 8008cda:	f7f7 fef9 	bl	8000ad0 <__aeabi_dcmpgt>
- 8008cde:	bb58      	cbnz	r0, 8008d38 <_dtoa_r+0x708>
- 8008ce0:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
- 8008ce4:	e9dd 0102 	ldrd	r0, r1, [sp, #8]
- 8008ce8:	f7f7 feca 	bl	8000a80 <__aeabi_dcmpeq>
- 8008cec:	b108      	cbz	r0, 8008cf2 <_dtoa_r+0x6c2>
- 8008cee:	07e1      	lsls	r1, r4, #31
- 8008cf0:	d422      	bmi.n	8008d38 <_dtoa_r+0x708>
- 8008cf2:	4628      	mov	r0, r5
- 8008cf4:	4651      	mov	r1, sl
- 8008cf6:	f000 fd15 	bl	8009724 <_Bfree>
- 8008cfa:	2300      	movs	r3, #0
- 8008cfc:	703b      	strb	r3, [r7, #0]
- 8008cfe:	9b24      	ldr	r3, [sp, #144]	; 0x90
- 8008d00:	f109 0001 	add.w	r0, r9, #1
- 8008d04:	6018      	str	r0, [r3, #0]
- 8008d06:	9b26      	ldr	r3, [sp, #152]	; 0x98
- 8008d08:	2b00      	cmp	r3, #0
- 8008d0a:	f43f acdf 	beq.w	80086cc <_dtoa_r+0x9c>
- 8008d0e:	601f      	str	r7, [r3, #0]
- 8008d10:	e4dc      	b.n	80086cc <_dtoa_r+0x9c>
- 8008d12:	4627      	mov	r7, r4
- 8008d14:	463b      	mov	r3, r7
- 8008d16:	461f      	mov	r7, r3
- 8008d18:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
- 8008d1c:	2a39      	cmp	r2, #57	; 0x39
- 8008d1e:	d107      	bne.n	8008d30 <_dtoa_r+0x700>
- 8008d20:	9a08      	ldr	r2, [sp, #32]
- 8008d22:	429a      	cmp	r2, r3
- 8008d24:	d1f7      	bne.n	8008d16 <_dtoa_r+0x6e6>
- 8008d26:	2230      	movs	r2, #48	; 0x30
- 8008d28:	9908      	ldr	r1, [sp, #32]
- 8008d2a:	f108 0801 	add.w	r8, r8, #1
- 8008d2e:	700a      	strb	r2, [r1, #0]
- 8008d30:	781a      	ldrb	r2, [r3, #0]
- 8008d32:	3201      	adds	r2, #1
- 8008d34:	701a      	strb	r2, [r3, #0]
- 8008d36:	e79f      	b.n	8008c78 <_dtoa_r+0x648>
- 8008d38:	46c8      	mov	r8, r9
- 8008d3a:	e7eb      	b.n	8008d14 <_dtoa_r+0x6e4>
- 8008d3c:	2200      	movs	r2, #0
- 8008d3e:	4b72      	ldr	r3, [pc, #456]	; (8008f08 <_dtoa_r+0x8d8>)
- 8008d40:	f7f7 fc36 	bl	80005b0 <__aeabi_dmul>
- 8008d44:	4602      	mov	r2, r0
- 8008d46:	460b      	mov	r3, r1
- 8008d48:	e9cd 2304 	strd	r2, r3, [sp, #16]
- 8008d4c:	2200      	movs	r2, #0
- 8008d4e:	2300      	movs	r3, #0
- 8008d50:	f7f7 fe96 	bl	8000a80 <__aeabi_dcmpeq>
- 8008d54:	2800      	cmp	r0, #0
- 8008d56:	d098      	beq.n	8008c8a <_dtoa_r+0x65a>
- 8008d58:	e7cb      	b.n	8008cf2 <_dtoa_r+0x6c2>
- 8008d5a:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
- 8008d5c:	2a00      	cmp	r2, #0
- 8008d5e:	f000 80cd 	beq.w	8008efc <_dtoa_r+0x8cc>
- 8008d62:	9a22      	ldr	r2, [sp, #136]	; 0x88
- 8008d64:	2a01      	cmp	r2, #1
- 8008d66:	f300 80af 	bgt.w	8008ec8 <_dtoa_r+0x898>
- 8008d6a:	9a13      	ldr	r2, [sp, #76]	; 0x4c
- 8008d6c:	2a00      	cmp	r2, #0
- 8008d6e:	f000 80a7 	beq.w	8008ec0 <_dtoa_r+0x890>
- 8008d72:	f203 4333 	addw	r3, r3, #1075	; 0x433
- 8008d76:	9c0a      	ldr	r4, [sp, #40]	; 0x28
- 8008d78:	9f06      	ldr	r7, [sp, #24]
- 8008d7a:	9a06      	ldr	r2, [sp, #24]
- 8008d7c:	2101      	movs	r1, #1
- 8008d7e:	441a      	add	r2, r3
- 8008d80:	9206      	str	r2, [sp, #24]
- 8008d82:	9a09      	ldr	r2, [sp, #36]	; 0x24
- 8008d84:	4628      	mov	r0, r5
- 8008d86:	441a      	add	r2, r3
- 8008d88:	9209      	str	r2, [sp, #36]	; 0x24
- 8008d8a:	f000 fd85 	bl	8009898 <__i2b>
- 8008d8e:	4606      	mov	r6, r0
- 8008d90:	2f00      	cmp	r7, #0
- 8008d92:	dd0c      	ble.n	8008dae <_dtoa_r+0x77e>
- 8008d94:	9b09      	ldr	r3, [sp, #36]	; 0x24
- 8008d96:	2b00      	cmp	r3, #0
- 8008d98:	dd09      	ble.n	8008dae <_dtoa_r+0x77e>
- 8008d9a:	42bb      	cmp	r3, r7
- 8008d9c:	bfa8      	it	ge
- 8008d9e:	463b      	movge	r3, r7
- 8008da0:	9a06      	ldr	r2, [sp, #24]
- 8008da2:	1aff      	subs	r7, r7, r3
- 8008da4:	1ad2      	subs	r2, r2, r3
- 8008da6:	9206      	str	r2, [sp, #24]
- 8008da8:	9a09      	ldr	r2, [sp, #36]	; 0x24
- 8008daa:	1ad3      	subs	r3, r2, r3
- 8008dac:	9309      	str	r3, [sp, #36]	; 0x24
- 8008dae:	9b0a      	ldr	r3, [sp, #40]	; 0x28
- 8008db0:	b1f3      	cbz	r3, 8008df0 <_dtoa_r+0x7c0>
- 8008db2:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
- 8008db4:	2b00      	cmp	r3, #0
- 8008db6:	f000 80a9 	beq.w	8008f0c <_dtoa_r+0x8dc>
- 8008dba:	2c00      	cmp	r4, #0
- 8008dbc:	dd10      	ble.n	8008de0 <_dtoa_r+0x7b0>
- 8008dbe:	4631      	mov	r1, r6
- 8008dc0:	4622      	mov	r2, r4
- 8008dc2:	4628      	mov	r0, r5
- 8008dc4:	f000 fe22 	bl	8009a0c <__pow5mult>
- 8008dc8:	4652      	mov	r2, sl
- 8008dca:	4601      	mov	r1, r0
- 8008dcc:	4606      	mov	r6, r0
- 8008dce:	4628      	mov	r0, r5
- 8008dd0:	f000 fd78 	bl	80098c4 <__multiply>
- 8008dd4:	4680      	mov	r8, r0
- 8008dd6:	4651      	mov	r1, sl
- 8008dd8:	4628      	mov	r0, r5
- 8008dda:	f000 fca3 	bl	8009724 <_Bfree>
- 8008dde:	46c2      	mov	sl, r8
- 8008de0:	9b0a      	ldr	r3, [sp, #40]	; 0x28
- 8008de2:	1b1a      	subs	r2, r3, r4
- 8008de4:	d004      	beq.n	8008df0 <_dtoa_r+0x7c0>
- 8008de6:	4651      	mov	r1, sl
- 8008de8:	4628      	mov	r0, r5
- 8008dea:	f000 fe0f 	bl	8009a0c <__pow5mult>
- 8008dee:	4682      	mov	sl, r0
- 8008df0:	2101      	movs	r1, #1
- 8008df2:	4628      	mov	r0, r5
- 8008df4:	f000 fd50 	bl	8009898 <__i2b>
- 8008df8:	9b0e      	ldr	r3, [sp, #56]	; 0x38
- 8008dfa:	4604      	mov	r4, r0
- 8008dfc:	2b00      	cmp	r3, #0
- 8008dfe:	f340 8087 	ble.w	8008f10 <_dtoa_r+0x8e0>
- 8008e02:	461a      	mov	r2, r3
- 8008e04:	4601      	mov	r1, r0
- 8008e06:	4628      	mov	r0, r5
- 8008e08:	f000 fe00 	bl	8009a0c <__pow5mult>
- 8008e0c:	9b22      	ldr	r3, [sp, #136]	; 0x88
- 8008e0e:	4604      	mov	r4, r0
- 8008e10:	2b01      	cmp	r3, #1
- 8008e12:	f340 8080 	ble.w	8008f16 <_dtoa_r+0x8e6>
- 8008e16:	f04f 0800 	mov.w	r8, #0
- 8008e1a:	6923      	ldr	r3, [r4, #16]
- 8008e1c:	eb04 0383 	add.w	r3, r4, r3, lsl #2
- 8008e20:	6918      	ldr	r0, [r3, #16]
- 8008e22:	f000 fceb 	bl	80097fc <__hi0bits>
- 8008e26:	f1c0 0020 	rsb	r0, r0, #32
- 8008e2a:	9b09      	ldr	r3, [sp, #36]	; 0x24
- 8008e2c:	4418      	add	r0, r3
- 8008e2e:	f010 001f 	ands.w	r0, r0, #31
- 8008e32:	f000 8092 	beq.w	8008f5a <_dtoa_r+0x92a>
- 8008e36:	f1c0 0320 	rsb	r3, r0, #32
- 8008e3a:	2b04      	cmp	r3, #4
- 8008e3c:	f340 808a 	ble.w	8008f54 <_dtoa_r+0x924>
- 8008e40:	f1c0 001c 	rsb	r0, r0, #28
- 8008e44:	9b06      	ldr	r3, [sp, #24]
- 8008e46:	4407      	add	r7, r0
- 8008e48:	4403      	add	r3, r0
- 8008e4a:	9306      	str	r3, [sp, #24]
- 8008e4c:	9b09      	ldr	r3, [sp, #36]	; 0x24
- 8008e4e:	4403      	add	r3, r0
- 8008e50:	9309      	str	r3, [sp, #36]	; 0x24
- 8008e52:	9b06      	ldr	r3, [sp, #24]
- 8008e54:	2b00      	cmp	r3, #0
- 8008e56:	dd05      	ble.n	8008e64 <_dtoa_r+0x834>
- 8008e58:	4651      	mov	r1, sl
- 8008e5a:	461a      	mov	r2, r3
- 8008e5c:	4628      	mov	r0, r5
- 8008e5e:	f000 fe2f 	bl	8009ac0 <__lshift>
- 8008e62:	4682      	mov	sl, r0
- 8008e64:	9b09      	ldr	r3, [sp, #36]	; 0x24
- 8008e66:	2b00      	cmp	r3, #0
- 8008e68:	dd05      	ble.n	8008e76 <_dtoa_r+0x846>
- 8008e6a:	4621      	mov	r1, r4
- 8008e6c:	461a      	mov	r2, r3
- 8008e6e:	4628      	mov	r0, r5
- 8008e70:	f000 fe26 	bl	8009ac0 <__lshift>
- 8008e74:	4604      	mov	r4, r0
- 8008e76:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
- 8008e78:	2b00      	cmp	r3, #0
- 8008e7a:	d070      	beq.n	8008f5e <_dtoa_r+0x92e>
- 8008e7c:	4621      	mov	r1, r4
- 8008e7e:	4650      	mov	r0, sl
- 8008e80:	f000 fe8a 	bl	8009b98 <__mcmp>
- 8008e84:	2800      	cmp	r0, #0
- 8008e86:	da6a      	bge.n	8008f5e <_dtoa_r+0x92e>
- 8008e88:	2300      	movs	r3, #0
- 8008e8a:	4651      	mov	r1, sl
- 8008e8c:	220a      	movs	r2, #10
- 8008e8e:	4628      	mov	r0, r5
- 8008e90:	f000 fc6a 	bl	8009768 <__multadd>
- 8008e94:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
- 8008e96:	4682      	mov	sl, r0
- 8008e98:	f109 39ff 	add.w	r9, r9, #4294967295
- 8008e9c:	2b00      	cmp	r3, #0
- 8008e9e:	f000 8193 	beq.w	80091c8 <_dtoa_r+0xb98>
- 8008ea2:	4631      	mov	r1, r6
- 8008ea4:	2300      	movs	r3, #0
- 8008ea6:	220a      	movs	r2, #10
- 8008ea8:	4628      	mov	r0, r5
- 8008eaa:	f000 fc5d 	bl	8009768 <__multadd>
- 8008eae:	f1bb 0f00 	cmp.w	fp, #0
- 8008eb2:	4606      	mov	r6, r0
- 8008eb4:	f300 8093 	bgt.w	8008fde <_dtoa_r+0x9ae>
- 8008eb8:	9b22      	ldr	r3, [sp, #136]	; 0x88
- 8008eba:	2b02      	cmp	r3, #2
- 8008ebc:	dc57      	bgt.n	8008f6e <_dtoa_r+0x93e>
- 8008ebe:	e08e      	b.n	8008fde <_dtoa_r+0x9ae>
- 8008ec0:	9b16      	ldr	r3, [sp, #88]	; 0x58
- 8008ec2:	f1c3 0336 	rsb	r3, r3, #54	; 0x36
- 8008ec6:	e756      	b.n	8008d76 <_dtoa_r+0x746>
- 8008ec8:	9b02      	ldr	r3, [sp, #8]
- 8008eca:	1e5c      	subs	r4, r3, #1
- 8008ecc:	9b0a      	ldr	r3, [sp, #40]	; 0x28
- 8008ece:	42a3      	cmp	r3, r4
- 8008ed0:	bfb7      	itett	lt
- 8008ed2:	9b0a      	ldrlt	r3, [sp, #40]	; 0x28
- 8008ed4:	1b1c      	subge	r4, r3, r4
- 8008ed6:	1ae2      	sublt	r2, r4, r3
- 8008ed8:	9b0e      	ldrlt	r3, [sp, #56]	; 0x38
- 8008eda:	bfbe      	ittt	lt
- 8008edc:	940a      	strlt	r4, [sp, #40]	; 0x28
- 8008ede:	189b      	addlt	r3, r3, r2
- 8008ee0:	930e      	strlt	r3, [sp, #56]	; 0x38
- 8008ee2:	9b02      	ldr	r3, [sp, #8]
- 8008ee4:	bfb8      	it	lt
- 8008ee6:	2400      	movlt	r4, #0
- 8008ee8:	2b00      	cmp	r3, #0
- 8008eea:	bfbb      	ittet	lt
- 8008eec:	9b06      	ldrlt	r3, [sp, #24]
- 8008eee:	9a02      	ldrlt	r2, [sp, #8]
- 8008ef0:	9f06      	ldrge	r7, [sp, #24]
- 8008ef2:	1a9f      	sublt	r7, r3, r2
- 8008ef4:	bfac      	ite	ge
- 8008ef6:	9b02      	ldrge	r3, [sp, #8]
- 8008ef8:	2300      	movlt	r3, #0
- 8008efa:	e73e      	b.n	8008d7a <_dtoa_r+0x74a>
- 8008efc:	9c0a      	ldr	r4, [sp, #40]	; 0x28
- 8008efe:	9f06      	ldr	r7, [sp, #24]
- 8008f00:	9e0b      	ldr	r6, [sp, #44]	; 0x2c
- 8008f02:	e745      	b.n	8008d90 <_dtoa_r+0x760>
- 8008f04:	3fe00000 	.word	0x3fe00000
- 8008f08:	40240000 	.word	0x40240000
- 8008f0c:	9a0a      	ldr	r2, [sp, #40]	; 0x28
- 8008f0e:	e76a      	b.n	8008de6 <_dtoa_r+0x7b6>
- 8008f10:	9b22      	ldr	r3, [sp, #136]	; 0x88
- 8008f12:	2b01      	cmp	r3, #1
- 8008f14:	dc19      	bgt.n	8008f4a <_dtoa_r+0x91a>
- 8008f16:	9b04      	ldr	r3, [sp, #16]
- 8008f18:	b9bb      	cbnz	r3, 8008f4a <_dtoa_r+0x91a>
- 8008f1a:	9b05      	ldr	r3, [sp, #20]
- 8008f1c:	f3c3 0313 	ubfx	r3, r3, #0, #20
- 8008f20:	b99b      	cbnz	r3, 8008f4a <_dtoa_r+0x91a>
- 8008f22:	9b05      	ldr	r3, [sp, #20]
- 8008f24:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
- 8008f28:	0d1b      	lsrs	r3, r3, #20
- 8008f2a:	051b      	lsls	r3, r3, #20
- 8008f2c:	b183      	cbz	r3, 8008f50 <_dtoa_r+0x920>
- 8008f2e:	f04f 0801 	mov.w	r8, #1
- 8008f32:	9b06      	ldr	r3, [sp, #24]
- 8008f34:	3301      	adds	r3, #1
- 8008f36:	9306      	str	r3, [sp, #24]
- 8008f38:	9b09      	ldr	r3, [sp, #36]	; 0x24
- 8008f3a:	3301      	adds	r3, #1
- 8008f3c:	9309      	str	r3, [sp, #36]	; 0x24
- 8008f3e:	9b0e      	ldr	r3, [sp, #56]	; 0x38
- 8008f40:	2b00      	cmp	r3, #0
- 8008f42:	f47f af6a 	bne.w	8008e1a <_dtoa_r+0x7ea>
- 8008f46:	2001      	movs	r0, #1
- 8008f48:	e76f      	b.n	8008e2a <_dtoa_r+0x7fa>
- 8008f4a:	f04f 0800 	mov.w	r8, #0
- 8008f4e:	e7f6      	b.n	8008f3e <_dtoa_r+0x90e>
- 8008f50:	4698      	mov	r8, r3
- 8008f52:	e7f4      	b.n	8008f3e <_dtoa_r+0x90e>
- 8008f54:	f43f af7d 	beq.w	8008e52 <_dtoa_r+0x822>
- 8008f58:	4618      	mov	r0, r3
- 8008f5a:	301c      	adds	r0, #28
- 8008f5c:	e772      	b.n	8008e44 <_dtoa_r+0x814>
- 8008f5e:	9b02      	ldr	r3, [sp, #8]
- 8008f60:	2b00      	cmp	r3, #0
- 8008f62:	dc36      	bgt.n	8008fd2 <_dtoa_r+0x9a2>
- 8008f64:	9b22      	ldr	r3, [sp, #136]	; 0x88
- 8008f66:	2b02      	cmp	r3, #2
- 8008f68:	dd33      	ble.n	8008fd2 <_dtoa_r+0x9a2>
- 8008f6a:	f8dd b008 	ldr.w	fp, [sp, #8]
- 8008f6e:	f1bb 0f00 	cmp.w	fp, #0
- 8008f72:	d10d      	bne.n	8008f90 <_dtoa_r+0x960>
- 8008f74:	4621      	mov	r1, r4
- 8008f76:	465b      	mov	r3, fp
- 8008f78:	2205      	movs	r2, #5
- 8008f7a:	4628      	mov	r0, r5
- 8008f7c:	f000 fbf4 	bl	8009768 <__multadd>
- 8008f80:	4601      	mov	r1, r0
- 8008f82:	4604      	mov	r4, r0
- 8008f84:	4650      	mov	r0, sl
- 8008f86:	f000 fe07 	bl	8009b98 <__mcmp>
- 8008f8a:	2800      	cmp	r0, #0
- 8008f8c:	f73f adb6 	bgt.w	8008afc <_dtoa_r+0x4cc>
- 8008f90:	9b23      	ldr	r3, [sp, #140]	; 0x8c
- 8008f92:	9f08      	ldr	r7, [sp, #32]
- 8008f94:	ea6f 0903 	mvn.w	r9, r3
- 8008f98:	f04f 0800 	mov.w	r8, #0
- 8008f9c:	4621      	mov	r1, r4
- 8008f9e:	4628      	mov	r0, r5
- 8008fa0:	f000 fbc0 	bl	8009724 <_Bfree>
- 8008fa4:	2e00      	cmp	r6, #0
- 8008fa6:	f43f aea4 	beq.w	8008cf2 <_dtoa_r+0x6c2>
- 8008faa:	f1b8 0f00 	cmp.w	r8, #0
- 8008fae:	d005      	beq.n	8008fbc <_dtoa_r+0x98c>
- 8008fb0:	45b0      	cmp	r8, r6
- 8008fb2:	d003      	beq.n	8008fbc <_dtoa_r+0x98c>
- 8008fb4:	4641      	mov	r1, r8
- 8008fb6:	4628      	mov	r0, r5
- 8008fb8:	f000 fbb4 	bl	8009724 <_Bfree>
- 8008fbc:	4631      	mov	r1, r6
- 8008fbe:	4628      	mov	r0, r5
- 8008fc0:	f000 fbb0 	bl	8009724 <_Bfree>
- 8008fc4:	e695      	b.n	8008cf2 <_dtoa_r+0x6c2>
- 8008fc6:	2400      	movs	r4, #0
- 8008fc8:	4626      	mov	r6, r4
- 8008fca:	e7e1      	b.n	8008f90 <_dtoa_r+0x960>
- 8008fcc:	46c1      	mov	r9, r8
- 8008fce:	4626      	mov	r6, r4
- 8008fd0:	e594      	b.n	8008afc <_dtoa_r+0x4cc>
- 8008fd2:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
- 8008fd4:	f8dd b008 	ldr.w	fp, [sp, #8]
- 8008fd8:	2b00      	cmp	r3, #0
- 8008fda:	f000 80fc 	beq.w	80091d6 <_dtoa_r+0xba6>
- 8008fde:	2f00      	cmp	r7, #0
- 8008fe0:	dd05      	ble.n	8008fee <_dtoa_r+0x9be>
- 8008fe2:	4631      	mov	r1, r6
- 8008fe4:	463a      	mov	r2, r7
- 8008fe6:	4628      	mov	r0, r5
- 8008fe8:	f000 fd6a 	bl	8009ac0 <__lshift>
- 8008fec:	4606      	mov	r6, r0
- 8008fee:	f1b8 0f00 	cmp.w	r8, #0
- 8008ff2:	d05c      	beq.n	80090ae <_dtoa_r+0xa7e>
- 8008ff4:	4628      	mov	r0, r5
- 8008ff6:	6871      	ldr	r1, [r6, #4]
- 8008ff8:	f000 fb54 	bl	80096a4 <_Balloc>
- 8008ffc:	4607      	mov	r7, r0
- 8008ffe:	b928      	cbnz	r0, 800900c <_dtoa_r+0x9dc>
- 8009000:	4602      	mov	r2, r0
- 8009002:	f240 21ea 	movw	r1, #746	; 0x2ea
- 8009006:	4b7e      	ldr	r3, [pc, #504]	; (8009200 <_dtoa_r+0xbd0>)
- 8009008:	f7ff bb26 	b.w	8008658 <_dtoa_r+0x28>
- 800900c:	6932      	ldr	r2, [r6, #16]
- 800900e:	f106 010c 	add.w	r1, r6, #12
- 8009012:	3202      	adds	r2, #2
- 8009014:	0092      	lsls	r2, r2, #2
- 8009016:	300c      	adds	r0, #12
- 8009018:	f000 fb2a 	bl	8009670 <memcpy>
- 800901c:	2201      	movs	r2, #1
- 800901e:	4639      	mov	r1, r7
- 8009020:	4628      	mov	r0, r5
- 8009022:	f000 fd4d 	bl	8009ac0 <__lshift>
- 8009026:	46b0      	mov	r8, r6
- 8009028:	4606      	mov	r6, r0
- 800902a:	9b08      	ldr	r3, [sp, #32]
- 800902c:	3301      	adds	r3, #1
- 800902e:	9302      	str	r3, [sp, #8]
- 8009030:	9b08      	ldr	r3, [sp, #32]
- 8009032:	445b      	add	r3, fp
- 8009034:	930a      	str	r3, [sp, #40]	; 0x28
- 8009036:	9b04      	ldr	r3, [sp, #16]
- 8009038:	f003 0301 	and.w	r3, r3, #1
- 800903c:	9309      	str	r3, [sp, #36]	; 0x24
- 800903e:	9b02      	ldr	r3, [sp, #8]
- 8009040:	4621      	mov	r1, r4
- 8009042:	4650      	mov	r0, sl
- 8009044:	f103 3bff 	add.w	fp, r3, #4294967295
- 8009048:	f7ff fa62 	bl	8008510 <quorem>
- 800904c:	4603      	mov	r3, r0
- 800904e:	4641      	mov	r1, r8
- 8009050:	3330      	adds	r3, #48	; 0x30
- 8009052:	9004      	str	r0, [sp, #16]
- 8009054:	4650      	mov	r0, sl
- 8009056:	930b      	str	r3, [sp, #44]	; 0x2c
- 8009058:	f000 fd9e 	bl	8009b98 <__mcmp>
- 800905c:	4632      	mov	r2, r6
- 800905e:	9006      	str	r0, [sp, #24]
- 8009060:	4621      	mov	r1, r4
- 8009062:	4628      	mov	r0, r5
- 8009064:	f000 fdb4 	bl	8009bd0 <__mdiff>
- 8009068:	68c2      	ldr	r2, [r0, #12]
- 800906a:	4607      	mov	r7, r0
- 800906c:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
- 800906e:	bb02      	cbnz	r2, 80090b2 <_dtoa_r+0xa82>
- 8009070:	4601      	mov	r1, r0
- 8009072:	4650      	mov	r0, sl
- 8009074:	f000 fd90 	bl	8009b98 <__mcmp>
- 8009078:	4602      	mov	r2, r0
- 800907a:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
- 800907c:	4639      	mov	r1, r7
+ 8008c96:	e9cd 0104 	strd	r0, r1, [sp, #16]
+ 8008c9a:	f004 040f 	and.w	r4, r4, #15
+ 8008c9e:	4e8e      	ldr	r6, [pc, #568]	; (8008ed8 <_dtoa_r+0x598>)
+ 8008ca0:	b954      	cbnz	r4, 8008cb8 <_dtoa_r+0x378>
+ 8008ca2:	e9dd 2310 	ldrd	r2, r3, [sp, #64]	; 0x40
+ 8008ca6:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
+ 8008caa:	f7f7 fdab 	bl	8000804 <__aeabi_ddiv>
+ 8008cae:	e9cd 0104 	strd	r0, r1, [sp, #16]
+ 8008cb2:	e029      	b.n	8008d08 <_dtoa_r+0x3c8>
+ 8008cb4:	2702      	movs	r7, #2
+ 8008cb6:	e7f2      	b.n	8008c9e <_dtoa_r+0x35e>
+ 8008cb8:	07e1      	lsls	r1, r4, #31
+ 8008cba:	d508      	bpl.n	8008cce <_dtoa_r+0x38e>
+ 8008cbc:	e9dd 0110 	ldrd	r0, r1, [sp, #64]	; 0x40
+ 8008cc0:	e9d6 2300 	ldrd	r2, r3, [r6]
+ 8008cc4:	f7f7 fc74 	bl	80005b0 <__aeabi_dmul>
+ 8008cc8:	e9cd 0110 	strd	r0, r1, [sp, #64]	; 0x40
+ 8008ccc:	3701      	adds	r7, #1
+ 8008cce:	1064      	asrs	r4, r4, #1
+ 8008cd0:	3608      	adds	r6, #8
+ 8008cd2:	e7e5      	b.n	8008ca0 <_dtoa_r+0x360>
+ 8008cd4:	f000 80a5 	beq.w	8008e22 <_dtoa_r+0x4e2>
+ 8008cd8:	e9dd 010c 	ldrd	r0, r1, [sp, #48]	; 0x30
+ 8008cdc:	f1cb 0400 	rsb	r4, fp, #0
+ 8008ce0:	4b7c      	ldr	r3, [pc, #496]	; (8008ed4 <_dtoa_r+0x594>)
+ 8008ce2:	f004 020f 	and.w	r2, r4, #15
+ 8008ce6:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
+ 8008cea:	e9d3 2300 	ldrd	r2, r3, [r3]
+ 8008cee:	f7f7 fc5f 	bl	80005b0 <__aeabi_dmul>
+ 8008cf2:	2702      	movs	r7, #2
+ 8008cf4:	2300      	movs	r3, #0
+ 8008cf6:	e9cd 0104 	strd	r0, r1, [sp, #16]
+ 8008cfa:	4e77      	ldr	r6, [pc, #476]	; (8008ed8 <_dtoa_r+0x598>)
+ 8008cfc:	1124      	asrs	r4, r4, #4
+ 8008cfe:	2c00      	cmp	r4, #0
+ 8008d00:	f040 8084 	bne.w	8008e0c <_dtoa_r+0x4cc>
+ 8008d04:	2b00      	cmp	r3, #0
+ 8008d06:	d1d2      	bne.n	8008cae <_dtoa_r+0x36e>
+ 8008d08:	e9dd 3404 	ldrd	r3, r4, [sp, #16]
+ 8008d0c:	e9cd 3410 	strd	r3, r4, [sp, #64]	; 0x40
+ 8008d10:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
+ 8008d12:	2b00      	cmp	r3, #0
+ 8008d14:	f000 8087 	beq.w	8008e26 <_dtoa_r+0x4e6>
+ 8008d18:	e9dd 0110 	ldrd	r0, r1, [sp, #64]	; 0x40
+ 8008d1c:	2200      	movs	r2, #0
+ 8008d1e:	4b6f      	ldr	r3, [pc, #444]	; (8008edc <_dtoa_r+0x59c>)
+ 8008d20:	f7f7 feb8 	bl	8000a94 <__aeabi_dcmplt>
+ 8008d24:	2800      	cmp	r0, #0
+ 8008d26:	d07e      	beq.n	8008e26 <_dtoa_r+0x4e6>
+ 8008d28:	9b08      	ldr	r3, [sp, #32]
+ 8008d2a:	2b00      	cmp	r3, #0
+ 8008d2c:	d07b      	beq.n	8008e26 <_dtoa_r+0x4e6>
+ 8008d2e:	9b06      	ldr	r3, [sp, #24]
+ 8008d30:	2b00      	cmp	r3, #0
+ 8008d32:	dd38      	ble.n	8008da6 <_dtoa_r+0x466>
+ 8008d34:	e9dd 0110 	ldrd	r0, r1, [sp, #64]	; 0x40
+ 8008d38:	2200      	movs	r2, #0
+ 8008d3a:	4b69      	ldr	r3, [pc, #420]	; (8008ee0 <_dtoa_r+0x5a0>)
+ 8008d3c:	f7f7 fc38 	bl	80005b0 <__aeabi_dmul>
+ 8008d40:	e9cd 0104 	strd	r0, r1, [sp, #16]
+ 8008d44:	9c06      	ldr	r4, [sp, #24]
+ 8008d46:	f10b 38ff 	add.w	r8, fp, #4294967295
+ 8008d4a:	3701      	adds	r7, #1
+ 8008d4c:	4638      	mov	r0, r7
+ 8008d4e:	f7f7 fbc5 	bl	80004dc <__aeabi_i2d>
+ 8008d52:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
+ 8008d56:	f7f7 fc2b 	bl	80005b0 <__aeabi_dmul>
+ 8008d5a:	2200      	movs	r2, #0
+ 8008d5c:	4b61      	ldr	r3, [pc, #388]	; (8008ee4 <_dtoa_r+0x5a4>)
+ 8008d5e:	f7f7 fa71 	bl	8000244 <__adddf3>
+ 8008d62:	f1a1 7650 	sub.w	r6, r1, #54525952	; 0x3400000
+ 8008d66:	e9cd 0110 	strd	r0, r1, [sp, #64]	; 0x40
+ 8008d6a:	9611      	str	r6, [sp, #68]	; 0x44
+ 8008d6c:	2c00      	cmp	r4, #0
+ 8008d6e:	d15d      	bne.n	8008e2c <_dtoa_r+0x4ec>
+ 8008d70:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
+ 8008d74:	2200      	movs	r2, #0
+ 8008d76:	4b5c      	ldr	r3, [pc, #368]	; (8008ee8 <_dtoa_r+0x5a8>)
+ 8008d78:	f7f7 fa62 	bl	8000240 <__aeabi_dsub>
+ 8008d7c:	4602      	mov	r2, r0
+ 8008d7e:	460b      	mov	r3, r1
+ 8008d80:	e9cd 2304 	strd	r2, r3, [sp, #16]
+ 8008d84:	4633      	mov	r3, r6
+ 8008d86:	9a10      	ldr	r2, [sp, #64]	; 0x40
+ 8008d88:	f7f7 fea2 	bl	8000ad0 <__aeabi_dcmpgt>
+ 8008d8c:	2800      	cmp	r0, #0
+ 8008d8e:	f040 8295 	bne.w	80092bc <_dtoa_r+0x97c>
+ 8008d92:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
+ 8008d96:	9a10      	ldr	r2, [sp, #64]	; 0x40
+ 8008d98:	f106 4300 	add.w	r3, r6, #2147483648	; 0x80000000
+ 8008d9c:	f7f7 fe7a 	bl	8000a94 <__aeabi_dcmplt>
+ 8008da0:	2800      	cmp	r0, #0
+ 8008da2:	f040 8289 	bne.w	80092b8 <_dtoa_r+0x978>
+ 8008da6:	e9dd 340c 	ldrd	r3, r4, [sp, #48]	; 0x30
+ 8008daa:	e9cd 3404 	strd	r3, r4, [sp, #16]
+ 8008dae:	9b17      	ldr	r3, [sp, #92]	; 0x5c
+ 8008db0:	2b00      	cmp	r3, #0
+ 8008db2:	f2c0 8151 	blt.w	8009058 <_dtoa_r+0x718>
+ 8008db6:	f1bb 0f0e 	cmp.w	fp, #14
+ 8008dba:	f300 814d 	bgt.w	8009058 <_dtoa_r+0x718>
+ 8008dbe:	4b45      	ldr	r3, [pc, #276]	; (8008ed4 <_dtoa_r+0x594>)
+ 8008dc0:	eb03 03cb 	add.w	r3, r3, fp, lsl #3
+ 8008dc4:	e9d3 3400 	ldrd	r3, r4, [r3]
+ 8008dc8:	e9cd 3406 	strd	r3, r4, [sp, #24]
+ 8008dcc:	9b23      	ldr	r3, [sp, #140]	; 0x8c
+ 8008dce:	2b00      	cmp	r3, #0
+ 8008dd0:	f280 80da 	bge.w	8008f88 <_dtoa_r+0x648>
+ 8008dd4:	9b08      	ldr	r3, [sp, #32]
+ 8008dd6:	2b00      	cmp	r3, #0
+ 8008dd8:	f300 80d6 	bgt.w	8008f88 <_dtoa_r+0x648>
+ 8008ddc:	f040 826b 	bne.w	80092b6 <_dtoa_r+0x976>
+ 8008de0:	e9dd 0106 	ldrd	r0, r1, [sp, #24]
+ 8008de4:	2200      	movs	r2, #0
+ 8008de6:	4b40      	ldr	r3, [pc, #256]	; (8008ee8 <_dtoa_r+0x5a8>)
+ 8008de8:	f7f7 fbe2 	bl	80005b0 <__aeabi_dmul>
+ 8008dec:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
+ 8008df0:	f7f7 fe64 	bl	8000abc <__aeabi_dcmpge>
+ 8008df4:	9c08      	ldr	r4, [sp, #32]
+ 8008df6:	4626      	mov	r6, r4
+ 8008df8:	2800      	cmp	r0, #0
+ 8008dfa:	f040 8241 	bne.w	8009280 <_dtoa_r+0x940>
+ 8008dfe:	2331      	movs	r3, #49	; 0x31
+ 8008e00:	9f03      	ldr	r7, [sp, #12]
+ 8008e02:	f10b 0b01 	add.w	fp, fp, #1
+ 8008e06:	f807 3b01 	strb.w	r3, [r7], #1
+ 8008e0a:	e23d      	b.n	8009288 <_dtoa_r+0x948>
+ 8008e0c:	07e2      	lsls	r2, r4, #31
+ 8008e0e:	d505      	bpl.n	8008e1c <_dtoa_r+0x4dc>
+ 8008e10:	e9d6 2300 	ldrd	r2, r3, [r6]
+ 8008e14:	f7f7 fbcc 	bl	80005b0 <__aeabi_dmul>
+ 8008e18:	2301      	movs	r3, #1
+ 8008e1a:	3701      	adds	r7, #1
+ 8008e1c:	1064      	asrs	r4, r4, #1
+ 8008e1e:	3608      	adds	r6, #8
+ 8008e20:	e76d      	b.n	8008cfe <_dtoa_r+0x3be>
+ 8008e22:	2702      	movs	r7, #2
+ 8008e24:	e770      	b.n	8008d08 <_dtoa_r+0x3c8>
+ 8008e26:	46d8      	mov	r8, fp
+ 8008e28:	9c08      	ldr	r4, [sp, #32]
+ 8008e2a:	e78f      	b.n	8008d4c <_dtoa_r+0x40c>
+ 8008e2c:	9903      	ldr	r1, [sp, #12]
+ 8008e2e:	4b29      	ldr	r3, [pc, #164]	; (8008ed4 <_dtoa_r+0x594>)
+ 8008e30:	4421      	add	r1, r4
+ 8008e32:	9112      	str	r1, [sp, #72]	; 0x48
+ 8008e34:	990b      	ldr	r1, [sp, #44]	; 0x2c
+ 8008e36:	eb03 03c4 	add.w	r3, r3, r4, lsl #3
+ 8008e3a:	e9dd 6710 	ldrd	r6, r7, [sp, #64]	; 0x40
+ 8008e3e:	e953 2302 	ldrd	r2, r3, [r3, #-8]
+ 8008e42:	2900      	cmp	r1, #0
+ 8008e44:	d054      	beq.n	8008ef0 <_dtoa_r+0x5b0>
+ 8008e46:	2000      	movs	r0, #0
+ 8008e48:	4928      	ldr	r1, [pc, #160]	; (8008eec <_dtoa_r+0x5ac>)
+ 8008e4a:	f7f7 fcdb 	bl	8000804 <__aeabi_ddiv>
+ 8008e4e:	463b      	mov	r3, r7
+ 8008e50:	4632      	mov	r2, r6
+ 8008e52:	f7f7 f9f5 	bl	8000240 <__aeabi_dsub>
+ 8008e56:	e9cd 0110 	strd	r0, r1, [sp, #64]	; 0x40
+ 8008e5a:	9f03      	ldr	r7, [sp, #12]
+ 8008e5c:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
+ 8008e60:	f7f7 fe56 	bl	8000b10 <__aeabi_d2iz>
+ 8008e64:	4604      	mov	r4, r0
+ 8008e66:	f7f7 fb39 	bl	80004dc <__aeabi_i2d>
+ 8008e6a:	4602      	mov	r2, r0
+ 8008e6c:	460b      	mov	r3, r1
+ 8008e6e:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
+ 8008e72:	f7f7 f9e5 	bl	8000240 <__aeabi_dsub>
+ 8008e76:	4602      	mov	r2, r0
+ 8008e78:	460b      	mov	r3, r1
+ 8008e7a:	3430      	adds	r4, #48	; 0x30
+ 8008e7c:	e9cd 2304 	strd	r2, r3, [sp, #16]
+ 8008e80:	e9dd 2310 	ldrd	r2, r3, [sp, #64]	; 0x40
+ 8008e84:	f807 4b01 	strb.w	r4, [r7], #1
+ 8008e88:	f7f7 fe04 	bl	8000a94 <__aeabi_dcmplt>
+ 8008e8c:	2800      	cmp	r0, #0
+ 8008e8e:	d173      	bne.n	8008f78 <_dtoa_r+0x638>
+ 8008e90:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
+ 8008e94:	2000      	movs	r0, #0
+ 8008e96:	4911      	ldr	r1, [pc, #68]	; (8008edc <_dtoa_r+0x59c>)
+ 8008e98:	f7f7 f9d2 	bl	8000240 <__aeabi_dsub>
+ 8008e9c:	e9dd 2310 	ldrd	r2, r3, [sp, #64]	; 0x40
+ 8008ea0:	f7f7 fdf8 	bl	8000a94 <__aeabi_dcmplt>
+ 8008ea4:	2800      	cmp	r0, #0
+ 8008ea6:	f040 80b6 	bne.w	8009016 <_dtoa_r+0x6d6>
+ 8008eaa:	9b12      	ldr	r3, [sp, #72]	; 0x48
+ 8008eac:	429f      	cmp	r7, r3
+ 8008eae:	f43f af7a 	beq.w	8008da6 <_dtoa_r+0x466>
+ 8008eb2:	e9dd 0110 	ldrd	r0, r1, [sp, #64]	; 0x40
+ 8008eb6:	2200      	movs	r2, #0
+ 8008eb8:	4b09      	ldr	r3, [pc, #36]	; (8008ee0 <_dtoa_r+0x5a0>)
+ 8008eba:	f7f7 fb79 	bl	80005b0 <__aeabi_dmul>
+ 8008ebe:	2200      	movs	r2, #0
+ 8008ec0:	e9cd 0110 	strd	r0, r1, [sp, #64]	; 0x40
+ 8008ec4:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
+ 8008ec8:	4b05      	ldr	r3, [pc, #20]	; (8008ee0 <_dtoa_r+0x5a0>)
+ 8008eca:	f7f7 fb71 	bl	80005b0 <__aeabi_dmul>
+ 8008ece:	e9cd 0104 	strd	r0, r1, [sp, #16]
+ 8008ed2:	e7c3      	b.n	8008e5c <_dtoa_r+0x51c>
+ 8008ed4:	0800b388 	.word	0x0800b388
+ 8008ed8:	0800b360 	.word	0x0800b360
+ 8008edc:	3ff00000 	.word	0x3ff00000
+ 8008ee0:	40240000 	.word	0x40240000
+ 8008ee4:	401c0000 	.word	0x401c0000
+ 8008ee8:	40140000 	.word	0x40140000
+ 8008eec:	3fe00000 	.word	0x3fe00000
+ 8008ef0:	4630      	mov	r0, r6
+ 8008ef2:	4639      	mov	r1, r7
+ 8008ef4:	f7f7 fb5c 	bl	80005b0 <__aeabi_dmul>
+ 8008ef8:	9b12      	ldr	r3, [sp, #72]	; 0x48
+ 8008efa:	e9cd 0110 	strd	r0, r1, [sp, #64]	; 0x40
+ 8008efe:	9c03      	ldr	r4, [sp, #12]
+ 8008f00:	9314      	str	r3, [sp, #80]	; 0x50
+ 8008f02:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
+ 8008f06:	f7f7 fe03 	bl	8000b10 <__aeabi_d2iz>
+ 8008f0a:	9015      	str	r0, [sp, #84]	; 0x54
+ 8008f0c:	f7f7 fae6 	bl	80004dc <__aeabi_i2d>
+ 8008f10:	4602      	mov	r2, r0
+ 8008f12:	460b      	mov	r3, r1
+ 8008f14:	e9dd 0104 	ldrd	r0, r1, [sp, #16]
+ 8008f18:	f7f7 f992 	bl	8000240 <__aeabi_dsub>
+ 8008f1c:	9b15      	ldr	r3, [sp, #84]	; 0x54
+ 8008f1e:	4606      	mov	r6, r0
+ 8008f20:	3330      	adds	r3, #48	; 0x30
+ 8008f22:	f804 3b01 	strb.w	r3, [r4], #1
+ 8008f26:	9b12      	ldr	r3, [sp, #72]	; 0x48
+ 8008f28:	460f      	mov	r7, r1
+ 8008f2a:	429c      	cmp	r4, r3
+ 8008f2c:	f04f 0200 	mov.w	r2, #0
+ 8008f30:	d124      	bne.n	8008f7c <_dtoa_r+0x63c>
+ 8008f32:	e9dd 0110 	ldrd	r0, r1, [sp, #64]	; 0x40
+ 8008f36:	4baf      	ldr	r3, [pc, #700]	; (80091f4 <_dtoa_r+0x8b4>)
+ 8008f38:	f7f7 f984 	bl	8000244 <__adddf3>
+ 8008f3c:	4602      	mov	r2, r0
+ 8008f3e:	460b      	mov	r3, r1
+ 8008f40:	4630      	mov	r0, r6
+ 8008f42:	4639      	mov	r1, r7
+ 8008f44:	f7f7 fdc4 	bl	8000ad0 <__aeabi_dcmpgt>
+ 8008f48:	2800      	cmp	r0, #0
+ 8008f4a:	d163      	bne.n	8009014 <_dtoa_r+0x6d4>
+ 8008f4c:	e9dd 2310 	ldrd	r2, r3, [sp, #64]	; 0x40
+ 8008f50:	2000      	movs	r0, #0
+ 8008f52:	49a8      	ldr	r1, [pc, #672]	; (80091f4 <_dtoa_r+0x8b4>)
+ 8008f54:	f7f7 f974 	bl	8000240 <__aeabi_dsub>
+ 8008f58:	4602      	mov	r2, r0
+ 8008f5a:	460b      	mov	r3, r1
+ 8008f5c:	4630      	mov	r0, r6
+ 8008f5e:	4639      	mov	r1, r7
+ 8008f60:	f7f7 fd98 	bl	8000a94 <__aeabi_dcmplt>
+ 8008f64:	2800      	cmp	r0, #0
+ 8008f66:	f43f af1e 	beq.w	8008da6 <_dtoa_r+0x466>
+ 8008f6a:	9f14      	ldr	r7, [sp, #80]	; 0x50
+ 8008f6c:	1e7b      	subs	r3, r7, #1
+ 8008f6e:	9314      	str	r3, [sp, #80]	; 0x50
+ 8008f70:	f817 3c01 	ldrb.w	r3, [r7, #-1]
+ 8008f74:	2b30      	cmp	r3, #48	; 0x30
+ 8008f76:	d0f8      	beq.n	8008f6a <_dtoa_r+0x62a>
+ 8008f78:	46c3      	mov	fp, r8
+ 8008f7a:	e03b      	b.n	8008ff4 <_dtoa_r+0x6b4>
+ 8008f7c:	4b9e      	ldr	r3, [pc, #632]	; (80091f8 <_dtoa_r+0x8b8>)
+ 8008f7e:	f7f7 fb17 	bl	80005b0 <__aeabi_dmul>
+ 8008f82:	e9cd 0104 	strd	r0, r1, [sp, #16]
+ 8008f86:	e7bc      	b.n	8008f02 <_dtoa_r+0x5c2>
+ 8008f88:	9f03      	ldr	r7, [sp, #12]
+ 8008f8a:	e9dd 8904 	ldrd	r8, r9, [sp, #16]
+ 8008f8e:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
+ 8008f92:	4640      	mov	r0, r8
+ 8008f94:	4649      	mov	r1, r9
+ 8008f96:	f7f7 fc35 	bl	8000804 <__aeabi_ddiv>
+ 8008f9a:	f7f7 fdb9 	bl	8000b10 <__aeabi_d2iz>
+ 8008f9e:	4604      	mov	r4, r0
+ 8008fa0:	f7f7 fa9c 	bl	80004dc <__aeabi_i2d>
+ 8008fa4:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
+ 8008fa8:	f7f7 fb02 	bl	80005b0 <__aeabi_dmul>
+ 8008fac:	4602      	mov	r2, r0
+ 8008fae:	460b      	mov	r3, r1
+ 8008fb0:	4640      	mov	r0, r8
+ 8008fb2:	4649      	mov	r1, r9
+ 8008fb4:	f7f7 f944 	bl	8000240 <__aeabi_dsub>
+ 8008fb8:	f104 0630 	add.w	r6, r4, #48	; 0x30
+ 8008fbc:	f807 6b01 	strb.w	r6, [r7], #1
+ 8008fc0:	9e03      	ldr	r6, [sp, #12]
+ 8008fc2:	f8dd c020 	ldr.w	ip, [sp, #32]
+ 8008fc6:	1bbe      	subs	r6, r7, r6
+ 8008fc8:	45b4      	cmp	ip, r6
+ 8008fca:	4602      	mov	r2, r0
+ 8008fcc:	460b      	mov	r3, r1
+ 8008fce:	d136      	bne.n	800903e <_dtoa_r+0x6fe>
+ 8008fd0:	f7f7 f938 	bl	8000244 <__adddf3>
+ 8008fd4:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
+ 8008fd8:	4680      	mov	r8, r0
+ 8008fda:	4689      	mov	r9, r1
+ 8008fdc:	f7f7 fd78 	bl	8000ad0 <__aeabi_dcmpgt>
+ 8008fe0:	bb58      	cbnz	r0, 800903a <_dtoa_r+0x6fa>
+ 8008fe2:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
+ 8008fe6:	4640      	mov	r0, r8
+ 8008fe8:	4649      	mov	r1, r9
+ 8008fea:	f7f7 fd49 	bl	8000a80 <__aeabi_dcmpeq>
+ 8008fee:	b108      	cbz	r0, 8008ff4 <_dtoa_r+0x6b4>
+ 8008ff0:	07e3      	lsls	r3, r4, #31
+ 8008ff2:	d422      	bmi.n	800903a <_dtoa_r+0x6fa>
+ 8008ff4:	4651      	mov	r1, sl
+ 8008ff6:	4628      	mov	r0, r5
+ 8008ff8:	f000 fb0e 	bl	8009618 <_Bfree>
+ 8008ffc:	2300      	movs	r3, #0
+ 8008ffe:	9a24      	ldr	r2, [sp, #144]	; 0x90
+ 8009000:	703b      	strb	r3, [r7, #0]
+ 8009002:	f10b 0301 	add.w	r3, fp, #1
+ 8009006:	6013      	str	r3, [r2, #0]
+ 8009008:	9b26      	ldr	r3, [sp, #152]	; 0x98
+ 800900a:	2b00      	cmp	r3, #0
+ 800900c:	f43f ace6 	beq.w	80089dc <_dtoa_r+0x9c>
+ 8009010:	601f      	str	r7, [r3, #0]
+ 8009012:	e4e3      	b.n	80089dc <_dtoa_r+0x9c>
+ 8009014:	4627      	mov	r7, r4
+ 8009016:	463b      	mov	r3, r7
+ 8009018:	461f      	mov	r7, r3
+ 800901a:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
+ 800901e:	2a39      	cmp	r2, #57	; 0x39
+ 8009020:	d107      	bne.n	8009032 <_dtoa_r+0x6f2>
+ 8009022:	9a03      	ldr	r2, [sp, #12]
+ 8009024:	429a      	cmp	r2, r3
+ 8009026:	d1f7      	bne.n	8009018 <_dtoa_r+0x6d8>
+ 8009028:	2230      	movs	r2, #48	; 0x30
+ 800902a:	9903      	ldr	r1, [sp, #12]
+ 800902c:	f108 0801 	add.w	r8, r8, #1
+ 8009030:	700a      	strb	r2, [r1, #0]
+ 8009032:	781a      	ldrb	r2, [r3, #0]
+ 8009034:	3201      	adds	r2, #1
+ 8009036:	701a      	strb	r2, [r3, #0]
+ 8009038:	e79e      	b.n	8008f78 <_dtoa_r+0x638>
+ 800903a:	46d8      	mov	r8, fp
+ 800903c:	e7eb      	b.n	8009016 <_dtoa_r+0x6d6>
+ 800903e:	2200      	movs	r2, #0
+ 8009040:	4b6d      	ldr	r3, [pc, #436]	; (80091f8 <_dtoa_r+0x8b8>)
+ 8009042:	f7f7 fab5 	bl	80005b0 <__aeabi_dmul>
+ 8009046:	2200      	movs	r2, #0
+ 8009048:	2300      	movs	r3, #0
+ 800904a:	4680      	mov	r8, r0
+ 800904c:	4689      	mov	r9, r1
+ 800904e:	f7f7 fd17 	bl	8000a80 <__aeabi_dcmpeq>
+ 8009052:	2800      	cmp	r0, #0
+ 8009054:	d09b      	beq.n	8008f8e <_dtoa_r+0x64e>
+ 8009056:	e7cd      	b.n	8008ff4 <_dtoa_r+0x6b4>
+ 8009058:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
+ 800905a:	2a00      	cmp	r2, #0
+ 800905c:	f000 80c4 	beq.w	80091e8 <_dtoa_r+0x8a8>
+ 8009060:	9a22      	ldr	r2, [sp, #136]	; 0x88
+ 8009062:	2a01      	cmp	r2, #1
+ 8009064:	f300 80a8 	bgt.w	80091b8 <_dtoa_r+0x878>
+ 8009068:	9a13      	ldr	r2, [sp, #76]	; 0x4c
+ 800906a:	2a00      	cmp	r2, #0
+ 800906c:	f000 80a0 	beq.w	80091b0 <_dtoa_r+0x870>
+ 8009070:	f203 4333 	addw	r3, r3, #1075	; 0x433
+ 8009074:	464f      	mov	r7, r9
+ 8009076:	9c0a      	ldr	r4, [sp, #40]	; 0x28
+ 8009078:	9a09      	ldr	r2, [sp, #36]	; 0x24
+ 800907a:	2101      	movs	r1, #1
+ 800907c:	441a      	add	r2, r3
  800907e:	4628      	mov	r0, r5
- 8009080:	e9cd 320b 	strd	r3, r2, [sp, #44]	; 0x2c
- 8009084:	f000 fb4e 	bl	8009724 <_Bfree>
- 8009088:	9b22      	ldr	r3, [sp, #136]	; 0x88
- 800908a:	9a0c      	ldr	r2, [sp, #48]	; 0x30
- 800908c:	9f02      	ldr	r7, [sp, #8]
- 800908e:	ea43 0102 	orr.w	r1, r3, r2
- 8009092:	9b09      	ldr	r3, [sp, #36]	; 0x24
- 8009094:	430b      	orrs	r3, r1
- 8009096:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
- 8009098:	d10d      	bne.n	80090b6 <_dtoa_r+0xa86>
- 800909a:	2b39      	cmp	r3, #57	; 0x39
- 800909c:	d027      	beq.n	80090ee <_dtoa_r+0xabe>
- 800909e:	9a06      	ldr	r2, [sp, #24]
- 80090a0:	2a00      	cmp	r2, #0
- 80090a2:	dd01      	ble.n	80090a8 <_dtoa_r+0xa78>
- 80090a4:	9b04      	ldr	r3, [sp, #16]
- 80090a6:	3331      	adds	r3, #49	; 0x31
- 80090a8:	f88b 3000 	strb.w	r3, [fp]
- 80090ac:	e776      	b.n	8008f9c <_dtoa_r+0x96c>
- 80090ae:	4630      	mov	r0, r6
- 80090b0:	e7b9      	b.n	8009026 <_dtoa_r+0x9f6>
- 80090b2:	2201      	movs	r2, #1
- 80090b4:	e7e2      	b.n	800907c <_dtoa_r+0xa4c>
- 80090b6:	9906      	ldr	r1, [sp, #24]
- 80090b8:	2900      	cmp	r1, #0
- 80090ba:	db04      	blt.n	80090c6 <_dtoa_r+0xa96>
- 80090bc:	9822      	ldr	r0, [sp, #136]	; 0x88
- 80090be:	4301      	orrs	r1, r0
- 80090c0:	9809      	ldr	r0, [sp, #36]	; 0x24
- 80090c2:	4301      	orrs	r1, r0
- 80090c4:	d120      	bne.n	8009108 <_dtoa_r+0xad8>
- 80090c6:	2a00      	cmp	r2, #0
- 80090c8:	ddee      	ble.n	80090a8 <_dtoa_r+0xa78>
- 80090ca:	4651      	mov	r1, sl
- 80090cc:	2201      	movs	r2, #1
+ 8009080:	4499      	add	r9, r3
+ 8009082:	9209      	str	r2, [sp, #36]	; 0x24
+ 8009084:	f000 fb7e 	bl	8009784 <__i2b>
+ 8009088:	4606      	mov	r6, r0
+ 800908a:	b15f      	cbz	r7, 80090a4 <_dtoa_r+0x764>
+ 800908c:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 800908e:	2b00      	cmp	r3, #0
+ 8009090:	dd08      	ble.n	80090a4 <_dtoa_r+0x764>
+ 8009092:	42bb      	cmp	r3, r7
+ 8009094:	bfa8      	it	ge
+ 8009096:	463b      	movge	r3, r7
+ 8009098:	9a09      	ldr	r2, [sp, #36]	; 0x24
+ 800909a:	eba9 0903 	sub.w	r9, r9, r3
+ 800909e:	1aff      	subs	r7, r7, r3
+ 80090a0:	1ad3      	subs	r3, r2, r3
+ 80090a2:	9309      	str	r3, [sp, #36]	; 0x24
+ 80090a4:	9b0a      	ldr	r3, [sp, #40]	; 0x28
+ 80090a6:	b1f3      	cbz	r3, 80090e6 <_dtoa_r+0x7a6>
+ 80090a8:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
+ 80090aa:	2b00      	cmp	r3, #0
+ 80090ac:	f000 80a0 	beq.w	80091f0 <_dtoa_r+0x8b0>
+ 80090b0:	2c00      	cmp	r4, #0
+ 80090b2:	dd10      	ble.n	80090d6 <_dtoa_r+0x796>
+ 80090b4:	4631      	mov	r1, r6
+ 80090b6:	4622      	mov	r2, r4
+ 80090b8:	4628      	mov	r0, r5
+ 80090ba:	f000 fc21 	bl	8009900 <__pow5mult>
+ 80090be:	4652      	mov	r2, sl
+ 80090c0:	4601      	mov	r1, r0
+ 80090c2:	4606      	mov	r6, r0
+ 80090c4:	4628      	mov	r0, r5
+ 80090c6:	f000 fb73 	bl	80097b0 <__multiply>
+ 80090ca:	4680      	mov	r8, r0
+ 80090cc:	4651      	mov	r1, sl
  80090ce:	4628      	mov	r0, r5
- 80090d0:	9302      	str	r3, [sp, #8]
- 80090d2:	f000 fcf5 	bl	8009ac0 <__lshift>
- 80090d6:	4621      	mov	r1, r4
- 80090d8:	4682      	mov	sl, r0
- 80090da:	f000 fd5d 	bl	8009b98 <__mcmp>
- 80090de:	2800      	cmp	r0, #0
- 80090e0:	9b02      	ldr	r3, [sp, #8]
- 80090e2:	dc02      	bgt.n	80090ea <_dtoa_r+0xaba>
- 80090e4:	d1e0      	bne.n	80090a8 <_dtoa_r+0xa78>
- 80090e6:	07da      	lsls	r2, r3, #31
- 80090e8:	d5de      	bpl.n	80090a8 <_dtoa_r+0xa78>
- 80090ea:	2b39      	cmp	r3, #57	; 0x39
- 80090ec:	d1da      	bne.n	80090a4 <_dtoa_r+0xa74>
- 80090ee:	2339      	movs	r3, #57	; 0x39
- 80090f0:	f88b 3000 	strb.w	r3, [fp]
- 80090f4:	463b      	mov	r3, r7
- 80090f6:	461f      	mov	r7, r3
- 80090f8:	f817 2c01 	ldrb.w	r2, [r7, #-1]
- 80090fc:	3b01      	subs	r3, #1
- 80090fe:	2a39      	cmp	r2, #57	; 0x39
- 8009100:	d050      	beq.n	80091a4 <_dtoa_r+0xb74>
- 8009102:	3201      	adds	r2, #1
- 8009104:	701a      	strb	r2, [r3, #0]
- 8009106:	e749      	b.n	8008f9c <_dtoa_r+0x96c>
- 8009108:	2a00      	cmp	r2, #0
- 800910a:	dd03      	ble.n	8009114 <_dtoa_r+0xae4>
- 800910c:	2b39      	cmp	r3, #57	; 0x39
- 800910e:	d0ee      	beq.n	80090ee <_dtoa_r+0xabe>
- 8009110:	3301      	adds	r3, #1
- 8009112:	e7c9      	b.n	80090a8 <_dtoa_r+0xa78>
- 8009114:	9a02      	ldr	r2, [sp, #8]
- 8009116:	990a      	ldr	r1, [sp, #40]	; 0x28
- 8009118:	f802 3c01 	strb.w	r3, [r2, #-1]
- 800911c:	428a      	cmp	r2, r1
- 800911e:	d02a      	beq.n	8009176 <_dtoa_r+0xb46>
- 8009120:	4651      	mov	r1, sl
- 8009122:	2300      	movs	r3, #0
- 8009124:	220a      	movs	r2, #10
- 8009126:	4628      	mov	r0, r5
- 8009128:	f000 fb1e 	bl	8009768 <__multadd>
- 800912c:	45b0      	cmp	r8, r6
- 800912e:	4682      	mov	sl, r0
- 8009130:	f04f 0300 	mov.w	r3, #0
- 8009134:	f04f 020a 	mov.w	r2, #10
- 8009138:	4641      	mov	r1, r8
- 800913a:	4628      	mov	r0, r5
- 800913c:	d107      	bne.n	800914e <_dtoa_r+0xb1e>
- 800913e:	f000 fb13 	bl	8009768 <__multadd>
- 8009142:	4680      	mov	r8, r0
- 8009144:	4606      	mov	r6, r0
- 8009146:	9b02      	ldr	r3, [sp, #8]
- 8009148:	3301      	adds	r3, #1
- 800914a:	9302      	str	r3, [sp, #8]
- 800914c:	e777      	b.n	800903e <_dtoa_r+0xa0e>
- 800914e:	f000 fb0b 	bl	8009768 <__multadd>
- 8009152:	4631      	mov	r1, r6
- 8009154:	4680      	mov	r8, r0
- 8009156:	2300      	movs	r3, #0
- 8009158:	220a      	movs	r2, #10
- 800915a:	4628      	mov	r0, r5
- 800915c:	f000 fb04 	bl	8009768 <__multadd>
- 8009160:	4606      	mov	r6, r0
- 8009162:	e7f0      	b.n	8009146 <_dtoa_r+0xb16>
- 8009164:	f1bb 0f00 	cmp.w	fp, #0
- 8009168:	bfcc      	ite	gt
- 800916a:	465f      	movgt	r7, fp
- 800916c:	2701      	movle	r7, #1
- 800916e:	f04f 0800 	mov.w	r8, #0
- 8009172:	9a08      	ldr	r2, [sp, #32]
- 8009174:	4417      	add	r7, r2
- 8009176:	4651      	mov	r1, sl
- 8009178:	2201      	movs	r2, #1
- 800917a:	4628      	mov	r0, r5
- 800917c:	9302      	str	r3, [sp, #8]
- 800917e:	f000 fc9f 	bl	8009ac0 <__lshift>
- 8009182:	4621      	mov	r1, r4
- 8009184:	4682      	mov	sl, r0
- 8009186:	f000 fd07 	bl	8009b98 <__mcmp>
- 800918a:	2800      	cmp	r0, #0
- 800918c:	dcb2      	bgt.n	80090f4 <_dtoa_r+0xac4>
- 800918e:	d102      	bne.n	8009196 <_dtoa_r+0xb66>
- 8009190:	9b02      	ldr	r3, [sp, #8]
- 8009192:	07db      	lsls	r3, r3, #31
- 8009194:	d4ae      	bmi.n	80090f4 <_dtoa_r+0xac4>
- 8009196:	463b      	mov	r3, r7
- 8009198:	461f      	mov	r7, r3
- 800919a:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
- 800919e:	2a30      	cmp	r2, #48	; 0x30
- 80091a0:	d0fa      	beq.n	8009198 <_dtoa_r+0xb68>
- 80091a2:	e6fb      	b.n	8008f9c <_dtoa_r+0x96c>
- 80091a4:	9a08      	ldr	r2, [sp, #32]
- 80091a6:	429a      	cmp	r2, r3
- 80091a8:	d1a5      	bne.n	80090f6 <_dtoa_r+0xac6>
- 80091aa:	2331      	movs	r3, #49	; 0x31
- 80091ac:	f109 0901 	add.w	r9, r9, #1
- 80091b0:	7013      	strb	r3, [r2, #0]
- 80091b2:	e6f3      	b.n	8008f9c <_dtoa_r+0x96c>
- 80091b4:	4b13      	ldr	r3, [pc, #76]	; (8009204 <_dtoa_r+0xbd4>)
- 80091b6:	f7ff baa7 	b.w	8008708 <_dtoa_r+0xd8>
- 80091ba:	9b26      	ldr	r3, [sp, #152]	; 0x98
- 80091bc:	2b00      	cmp	r3, #0
- 80091be:	f47f aa80 	bne.w	80086c2 <_dtoa_r+0x92>
- 80091c2:	4b11      	ldr	r3, [pc, #68]	; (8009208 <_dtoa_r+0xbd8>)
- 80091c4:	f7ff baa0 	b.w	8008708 <_dtoa_r+0xd8>
- 80091c8:	f1bb 0f00 	cmp.w	fp, #0
- 80091cc:	dc03      	bgt.n	80091d6 <_dtoa_r+0xba6>
- 80091ce:	9b22      	ldr	r3, [sp, #136]	; 0x88
- 80091d0:	2b02      	cmp	r3, #2
- 80091d2:	f73f aecc 	bgt.w	8008f6e <_dtoa_r+0x93e>
- 80091d6:	9f08      	ldr	r7, [sp, #32]
- 80091d8:	4621      	mov	r1, r4
- 80091da:	4650      	mov	r0, sl
- 80091dc:	f7ff f998 	bl	8008510 <quorem>
- 80091e0:	9a08      	ldr	r2, [sp, #32]
- 80091e2:	f100 0330 	add.w	r3, r0, #48	; 0x30
- 80091e6:	f807 3b01 	strb.w	r3, [r7], #1
- 80091ea:	1aba      	subs	r2, r7, r2
- 80091ec:	4593      	cmp	fp, r2
- 80091ee:	ddb9      	ble.n	8009164 <_dtoa_r+0xb34>
- 80091f0:	4651      	mov	r1, sl
- 80091f2:	2300      	movs	r3, #0
- 80091f4:	220a      	movs	r2, #10
- 80091f6:	4628      	mov	r0, r5
- 80091f8:	f000 fab6 	bl	8009768 <__multadd>
- 80091fc:	4682      	mov	sl, r0
- 80091fe:	e7eb      	b.n	80091d8 <_dtoa_r+0xba8>
- 8009200:	0800b30f 	.word	0x0800b30f
- 8009204:	0800b268 	.word	0x0800b268
- 8009208:	0800b28c 	.word	0x0800b28c
-
-0800920c <__sflush_r>:
- 800920c:	898a      	ldrh	r2, [r1, #12]
- 800920e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
- 8009212:	4605      	mov	r5, r0
- 8009214:	0710      	lsls	r0, r2, #28
- 8009216:	460c      	mov	r4, r1
- 8009218:	d458      	bmi.n	80092cc <__sflush_r+0xc0>
- 800921a:	684b      	ldr	r3, [r1, #4]
- 800921c:	2b00      	cmp	r3, #0
- 800921e:	dc05      	bgt.n	800922c <__sflush_r+0x20>
- 8009220:	6c0b      	ldr	r3, [r1, #64]	; 0x40
- 8009222:	2b00      	cmp	r3, #0
- 8009224:	dc02      	bgt.n	800922c <__sflush_r+0x20>
- 8009226:	2000      	movs	r0, #0
- 8009228:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
- 800922c:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
- 800922e:	2e00      	cmp	r6, #0
- 8009230:	d0f9      	beq.n	8009226 <__sflush_r+0x1a>
- 8009232:	2300      	movs	r3, #0
- 8009234:	f412 5280 	ands.w	r2, r2, #4096	; 0x1000
- 8009238:	682f      	ldr	r7, [r5, #0]
- 800923a:	602b      	str	r3, [r5, #0]
- 800923c:	d032      	beq.n	80092a4 <__sflush_r+0x98>
- 800923e:	6d60      	ldr	r0, [r4, #84]	; 0x54
- 8009240:	89a3      	ldrh	r3, [r4, #12]
- 8009242:	075a      	lsls	r2, r3, #29
- 8009244:	d505      	bpl.n	8009252 <__sflush_r+0x46>
- 8009246:	6863      	ldr	r3, [r4, #4]
- 8009248:	1ac0      	subs	r0, r0, r3
- 800924a:	6b63      	ldr	r3, [r4, #52]	; 0x34
- 800924c:	b10b      	cbz	r3, 8009252 <__sflush_r+0x46>
- 800924e:	6c23      	ldr	r3, [r4, #64]	; 0x40
- 8009250:	1ac0      	subs	r0, r0, r3
- 8009252:	2300      	movs	r3, #0
- 8009254:	4602      	mov	r2, r0
- 8009256:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
- 8009258:	4628      	mov	r0, r5
- 800925a:	6a21      	ldr	r1, [r4, #32]
- 800925c:	47b0      	blx	r6
- 800925e:	1c43      	adds	r3, r0, #1
- 8009260:	89a3      	ldrh	r3, [r4, #12]
- 8009262:	d106      	bne.n	8009272 <__sflush_r+0x66>
- 8009264:	6829      	ldr	r1, [r5, #0]
- 8009266:	291d      	cmp	r1, #29
- 8009268:	d82c      	bhi.n	80092c4 <__sflush_r+0xb8>
- 800926a:	4a2a      	ldr	r2, [pc, #168]	; (8009314 <__sflush_r+0x108>)
- 800926c:	40ca      	lsrs	r2, r1
- 800926e:	07d6      	lsls	r6, r2, #31
- 8009270:	d528      	bpl.n	80092c4 <__sflush_r+0xb8>
- 8009272:	2200      	movs	r2, #0
- 8009274:	6062      	str	r2, [r4, #4]
- 8009276:	6922      	ldr	r2, [r4, #16]
- 8009278:	04d9      	lsls	r1, r3, #19
- 800927a:	6022      	str	r2, [r4, #0]
- 800927c:	d504      	bpl.n	8009288 <__sflush_r+0x7c>
- 800927e:	1c42      	adds	r2, r0, #1
- 8009280:	d101      	bne.n	8009286 <__sflush_r+0x7a>
- 8009282:	682b      	ldr	r3, [r5, #0]
- 8009284:	b903      	cbnz	r3, 8009288 <__sflush_r+0x7c>
- 8009286:	6560      	str	r0, [r4, #84]	; 0x54
- 8009288:	6b61      	ldr	r1, [r4, #52]	; 0x34
- 800928a:	602f      	str	r7, [r5, #0]
- 800928c:	2900      	cmp	r1, #0
- 800928e:	d0ca      	beq.n	8009226 <__sflush_r+0x1a>
- 8009290:	f104 0344 	add.w	r3, r4, #68	; 0x44
- 8009294:	4299      	cmp	r1, r3
- 8009296:	d002      	beq.n	800929e <__sflush_r+0x92>
- 8009298:	4628      	mov	r0, r5
- 800929a:	f7fe fb43 	bl	8007924 <_free_r>
- 800929e:	2000      	movs	r0, #0
- 80092a0:	6360      	str	r0, [r4, #52]	; 0x34
- 80092a2:	e7c1      	b.n	8009228 <__sflush_r+0x1c>
- 80092a4:	6a21      	ldr	r1, [r4, #32]
- 80092a6:	2301      	movs	r3, #1
- 80092a8:	4628      	mov	r0, r5
- 80092aa:	47b0      	blx	r6
- 80092ac:	1c41      	adds	r1, r0, #1
- 80092ae:	d1c7      	bne.n	8009240 <__sflush_r+0x34>
- 80092b0:	682b      	ldr	r3, [r5, #0]
- 80092b2:	2b00      	cmp	r3, #0
- 80092b4:	d0c4      	beq.n	8009240 <__sflush_r+0x34>
- 80092b6:	2b1d      	cmp	r3, #29
- 80092b8:	d001      	beq.n	80092be <__sflush_r+0xb2>
- 80092ba:	2b16      	cmp	r3, #22
- 80092bc:	d101      	bne.n	80092c2 <__sflush_r+0xb6>
- 80092be:	602f      	str	r7, [r5, #0]
- 80092c0:	e7b1      	b.n	8009226 <__sflush_r+0x1a>
- 80092c2:	89a3      	ldrh	r3, [r4, #12]
- 80092c4:	f043 0340 	orr.w	r3, r3, #64	; 0x40
- 80092c8:	81a3      	strh	r3, [r4, #12]
- 80092ca:	e7ad      	b.n	8009228 <__sflush_r+0x1c>
- 80092cc:	690f      	ldr	r7, [r1, #16]
+ 80090d0:	f000 faa2 	bl	8009618 <_Bfree>
+ 80090d4:	46c2      	mov	sl, r8
+ 80090d6:	9b0a      	ldr	r3, [sp, #40]	; 0x28
+ 80090d8:	1b1a      	subs	r2, r3, r4
+ 80090da:	d004      	beq.n	80090e6 <_dtoa_r+0x7a6>
+ 80090dc:	4651      	mov	r1, sl
+ 80090de:	4628      	mov	r0, r5
+ 80090e0:	f000 fc0e 	bl	8009900 <__pow5mult>
+ 80090e4:	4682      	mov	sl, r0
+ 80090e6:	2101      	movs	r1, #1
+ 80090e8:	4628      	mov	r0, r5
+ 80090ea:	f000 fb4b 	bl	8009784 <__i2b>
+ 80090ee:	9b0e      	ldr	r3, [sp, #56]	; 0x38
+ 80090f0:	4604      	mov	r4, r0
+ 80090f2:	2b00      	cmp	r3, #0
+ 80090f4:	f340 8082 	ble.w	80091fc <_dtoa_r+0x8bc>
+ 80090f8:	461a      	mov	r2, r3
+ 80090fa:	4601      	mov	r1, r0
+ 80090fc:	4628      	mov	r0, r5
+ 80090fe:	f000 fbff 	bl	8009900 <__pow5mult>
+ 8009102:	9b22      	ldr	r3, [sp, #136]	; 0x88
+ 8009104:	4604      	mov	r4, r0
+ 8009106:	2b01      	cmp	r3, #1
+ 8009108:	dd7b      	ble.n	8009202 <_dtoa_r+0x8c2>
+ 800910a:	f04f 0800 	mov.w	r8, #0
+ 800910e:	6923      	ldr	r3, [r4, #16]
+ 8009110:	eb04 0383 	add.w	r3, r4, r3, lsl #2
+ 8009114:	6918      	ldr	r0, [r3, #16]
+ 8009116:	f000 fae7 	bl	80096e8 <__hi0bits>
+ 800911a:	f1c0 0020 	rsb	r0, r0, #32
+ 800911e:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 8009120:	4418      	add	r0, r3
+ 8009122:	f010 001f 	ands.w	r0, r0, #31
+ 8009126:	f000 8092 	beq.w	800924e <_dtoa_r+0x90e>
+ 800912a:	f1c0 0320 	rsb	r3, r0, #32
+ 800912e:	2b04      	cmp	r3, #4
+ 8009130:	f340 8085 	ble.w	800923e <_dtoa_r+0x8fe>
+ 8009134:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 8009136:	f1c0 001c 	rsb	r0, r0, #28
+ 800913a:	4403      	add	r3, r0
+ 800913c:	4481      	add	r9, r0
+ 800913e:	4407      	add	r7, r0
+ 8009140:	9309      	str	r3, [sp, #36]	; 0x24
+ 8009142:	f1b9 0f00 	cmp.w	r9, #0
+ 8009146:	dd05      	ble.n	8009154 <_dtoa_r+0x814>
+ 8009148:	4651      	mov	r1, sl
+ 800914a:	464a      	mov	r2, r9
+ 800914c:	4628      	mov	r0, r5
+ 800914e:	f000 fc31 	bl	80099b4 <__lshift>
+ 8009152:	4682      	mov	sl, r0
+ 8009154:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 8009156:	2b00      	cmp	r3, #0
+ 8009158:	dd05      	ble.n	8009166 <_dtoa_r+0x826>
+ 800915a:	4621      	mov	r1, r4
+ 800915c:	461a      	mov	r2, r3
+ 800915e:	4628      	mov	r0, r5
+ 8009160:	f000 fc28 	bl	80099b4 <__lshift>
+ 8009164:	4604      	mov	r4, r0
+ 8009166:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
+ 8009168:	2b00      	cmp	r3, #0
+ 800916a:	d072      	beq.n	8009252 <_dtoa_r+0x912>
+ 800916c:	4621      	mov	r1, r4
+ 800916e:	4650      	mov	r0, sl
+ 8009170:	f000 fc8c 	bl	8009a8c <__mcmp>
+ 8009174:	2800      	cmp	r0, #0
+ 8009176:	da6c      	bge.n	8009252 <_dtoa_r+0x912>
+ 8009178:	2300      	movs	r3, #0
+ 800917a:	4651      	mov	r1, sl
+ 800917c:	220a      	movs	r2, #10
+ 800917e:	4628      	mov	r0, r5
+ 8009180:	f000 fa6c 	bl	800965c <__multadd>
+ 8009184:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
+ 8009186:	4682      	mov	sl, r0
+ 8009188:	f10b 3bff 	add.w	fp, fp, #4294967295
+ 800918c:	2b00      	cmp	r3, #0
+ 800918e:	f000 81ac 	beq.w	80094ea <_dtoa_r+0xbaa>
+ 8009192:	2300      	movs	r3, #0
+ 8009194:	4631      	mov	r1, r6
+ 8009196:	220a      	movs	r2, #10
+ 8009198:	4628      	mov	r0, r5
+ 800919a:	f000 fa5f 	bl	800965c <__multadd>
+ 800919e:	9b06      	ldr	r3, [sp, #24]
+ 80091a0:	4606      	mov	r6, r0
+ 80091a2:	2b00      	cmp	r3, #0
+ 80091a4:	f300 8093 	bgt.w	80092ce <_dtoa_r+0x98e>
+ 80091a8:	9b22      	ldr	r3, [sp, #136]	; 0x88
+ 80091aa:	2b02      	cmp	r3, #2
+ 80091ac:	dc59      	bgt.n	8009262 <_dtoa_r+0x922>
+ 80091ae:	e08e      	b.n	80092ce <_dtoa_r+0x98e>
+ 80091b0:	9b16      	ldr	r3, [sp, #88]	; 0x58
+ 80091b2:	f1c3 0336 	rsb	r3, r3, #54	; 0x36
+ 80091b6:	e75d      	b.n	8009074 <_dtoa_r+0x734>
+ 80091b8:	9b08      	ldr	r3, [sp, #32]
+ 80091ba:	1e5c      	subs	r4, r3, #1
+ 80091bc:	9b0a      	ldr	r3, [sp, #40]	; 0x28
+ 80091be:	42a3      	cmp	r3, r4
+ 80091c0:	bfbf      	itttt	lt
+ 80091c2:	9b0a      	ldrlt	r3, [sp, #40]	; 0x28
+ 80091c4:	9a0e      	ldrlt	r2, [sp, #56]	; 0x38
+ 80091c6:	1ae3      	sublt	r3, r4, r3
+ 80091c8:	18d2      	addlt	r2, r2, r3
+ 80091ca:	bfa8      	it	ge
+ 80091cc:	1b1c      	subge	r4, r3, r4
+ 80091ce:	9b08      	ldr	r3, [sp, #32]
+ 80091d0:	bfbe      	ittt	lt
+ 80091d2:	940a      	strlt	r4, [sp, #40]	; 0x28
+ 80091d4:	920e      	strlt	r2, [sp, #56]	; 0x38
+ 80091d6:	2400      	movlt	r4, #0
+ 80091d8:	2b00      	cmp	r3, #0
+ 80091da:	bfb5      	itete	lt
+ 80091dc:	eba9 0703 	sublt.w	r7, r9, r3
+ 80091e0:	464f      	movge	r7, r9
+ 80091e2:	2300      	movlt	r3, #0
+ 80091e4:	9b08      	ldrge	r3, [sp, #32]
+ 80091e6:	e747      	b.n	8009078 <_dtoa_r+0x738>
+ 80091e8:	464f      	mov	r7, r9
+ 80091ea:	9c0a      	ldr	r4, [sp, #40]	; 0x28
+ 80091ec:	9e0b      	ldr	r6, [sp, #44]	; 0x2c
+ 80091ee:	e74c      	b.n	800908a <_dtoa_r+0x74a>
+ 80091f0:	9a0a      	ldr	r2, [sp, #40]	; 0x28
+ 80091f2:	e773      	b.n	80090dc <_dtoa_r+0x79c>
+ 80091f4:	3fe00000 	.word	0x3fe00000
+ 80091f8:	40240000 	.word	0x40240000
+ 80091fc:	9b22      	ldr	r3, [sp, #136]	; 0x88
+ 80091fe:	2b01      	cmp	r3, #1
+ 8009200:	dc18      	bgt.n	8009234 <_dtoa_r+0x8f4>
+ 8009202:	9b04      	ldr	r3, [sp, #16]
+ 8009204:	b9b3      	cbnz	r3, 8009234 <_dtoa_r+0x8f4>
+ 8009206:	9b05      	ldr	r3, [sp, #20]
+ 8009208:	f3c3 0313 	ubfx	r3, r3, #0, #20
+ 800920c:	b993      	cbnz	r3, 8009234 <_dtoa_r+0x8f4>
+ 800920e:	9b05      	ldr	r3, [sp, #20]
+ 8009210:	f023 4300 	bic.w	r3, r3, #2147483648	; 0x80000000
+ 8009214:	0d1b      	lsrs	r3, r3, #20
+ 8009216:	051b      	lsls	r3, r3, #20
+ 8009218:	b17b      	cbz	r3, 800923a <_dtoa_r+0x8fa>
+ 800921a:	f04f 0801 	mov.w	r8, #1
+ 800921e:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 8009220:	f109 0901 	add.w	r9, r9, #1
+ 8009224:	3301      	adds	r3, #1
+ 8009226:	9309      	str	r3, [sp, #36]	; 0x24
+ 8009228:	9b0e      	ldr	r3, [sp, #56]	; 0x38
+ 800922a:	2b00      	cmp	r3, #0
+ 800922c:	f47f af6f 	bne.w	800910e <_dtoa_r+0x7ce>
+ 8009230:	2001      	movs	r0, #1
+ 8009232:	e774      	b.n	800911e <_dtoa_r+0x7de>
+ 8009234:	f04f 0800 	mov.w	r8, #0
+ 8009238:	e7f6      	b.n	8009228 <_dtoa_r+0x8e8>
+ 800923a:	4698      	mov	r8, r3
+ 800923c:	e7f4      	b.n	8009228 <_dtoa_r+0x8e8>
+ 800923e:	d080      	beq.n	8009142 <_dtoa_r+0x802>
+ 8009240:	9a09      	ldr	r2, [sp, #36]	; 0x24
+ 8009242:	331c      	adds	r3, #28
+ 8009244:	441a      	add	r2, r3
+ 8009246:	4499      	add	r9, r3
+ 8009248:	441f      	add	r7, r3
+ 800924a:	9209      	str	r2, [sp, #36]	; 0x24
+ 800924c:	e779      	b.n	8009142 <_dtoa_r+0x802>
+ 800924e:	4603      	mov	r3, r0
+ 8009250:	e7f6      	b.n	8009240 <_dtoa_r+0x900>
+ 8009252:	9b08      	ldr	r3, [sp, #32]
+ 8009254:	2b00      	cmp	r3, #0
+ 8009256:	dc34      	bgt.n	80092c2 <_dtoa_r+0x982>
+ 8009258:	9b22      	ldr	r3, [sp, #136]	; 0x88
+ 800925a:	2b02      	cmp	r3, #2
+ 800925c:	dd31      	ble.n	80092c2 <_dtoa_r+0x982>
+ 800925e:	9b08      	ldr	r3, [sp, #32]
+ 8009260:	9306      	str	r3, [sp, #24]
+ 8009262:	9b06      	ldr	r3, [sp, #24]
+ 8009264:	b963      	cbnz	r3, 8009280 <_dtoa_r+0x940>
+ 8009266:	4621      	mov	r1, r4
+ 8009268:	2205      	movs	r2, #5
+ 800926a:	4628      	mov	r0, r5
+ 800926c:	f000 f9f6 	bl	800965c <__multadd>
+ 8009270:	4601      	mov	r1, r0
+ 8009272:	4604      	mov	r4, r0
+ 8009274:	4650      	mov	r0, sl
+ 8009276:	f000 fc09 	bl	8009a8c <__mcmp>
+ 800927a:	2800      	cmp	r0, #0
+ 800927c:	f73f adbf 	bgt.w	8008dfe <_dtoa_r+0x4be>
+ 8009280:	9b23      	ldr	r3, [sp, #140]	; 0x8c
+ 8009282:	9f03      	ldr	r7, [sp, #12]
+ 8009284:	ea6f 0b03 	mvn.w	fp, r3
+ 8009288:	f04f 0800 	mov.w	r8, #0
+ 800928c:	4621      	mov	r1, r4
+ 800928e:	4628      	mov	r0, r5
+ 8009290:	f000 f9c2 	bl	8009618 <_Bfree>
+ 8009294:	2e00      	cmp	r6, #0
+ 8009296:	f43f aead 	beq.w	8008ff4 <_dtoa_r+0x6b4>
+ 800929a:	f1b8 0f00 	cmp.w	r8, #0
+ 800929e:	d005      	beq.n	80092ac <_dtoa_r+0x96c>
+ 80092a0:	45b0      	cmp	r8, r6
+ 80092a2:	d003      	beq.n	80092ac <_dtoa_r+0x96c>
+ 80092a4:	4641      	mov	r1, r8
+ 80092a6:	4628      	mov	r0, r5
+ 80092a8:	f000 f9b6 	bl	8009618 <_Bfree>
+ 80092ac:	4631      	mov	r1, r6
+ 80092ae:	4628      	mov	r0, r5
+ 80092b0:	f000 f9b2 	bl	8009618 <_Bfree>
+ 80092b4:	e69e      	b.n	8008ff4 <_dtoa_r+0x6b4>
+ 80092b6:	2400      	movs	r4, #0
+ 80092b8:	4626      	mov	r6, r4
+ 80092ba:	e7e1      	b.n	8009280 <_dtoa_r+0x940>
+ 80092bc:	46c3      	mov	fp, r8
+ 80092be:	4626      	mov	r6, r4
+ 80092c0:	e59d      	b.n	8008dfe <_dtoa_r+0x4be>
+ 80092c2:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
+ 80092c4:	2b00      	cmp	r3, #0
+ 80092c6:	f000 80c8 	beq.w	800945a <_dtoa_r+0xb1a>
+ 80092ca:	9b08      	ldr	r3, [sp, #32]
+ 80092cc:	9306      	str	r3, [sp, #24]
  80092ce:	2f00      	cmp	r7, #0
- 80092d0:	d0a9      	beq.n	8009226 <__sflush_r+0x1a>
- 80092d2:	0793      	lsls	r3, r2, #30
- 80092d4:	bf18      	it	ne
- 80092d6:	2300      	movne	r3, #0
- 80092d8:	680e      	ldr	r6, [r1, #0]
- 80092da:	bf08      	it	eq
- 80092dc:	694b      	ldreq	r3, [r1, #20]
- 80092de:	eba6 0807 	sub.w	r8, r6, r7
- 80092e2:	600f      	str	r7, [r1, #0]
- 80092e4:	608b      	str	r3, [r1, #8]
- 80092e6:	f1b8 0f00 	cmp.w	r8, #0
- 80092ea:	dd9c      	ble.n	8009226 <__sflush_r+0x1a>
- 80092ec:	4643      	mov	r3, r8
- 80092ee:	463a      	mov	r2, r7
- 80092f0:	4628      	mov	r0, r5
- 80092f2:	6a21      	ldr	r1, [r4, #32]
- 80092f4:	6aa6      	ldr	r6, [r4, #40]	; 0x28
- 80092f6:	47b0      	blx	r6
- 80092f8:	2800      	cmp	r0, #0
- 80092fa:	dc06      	bgt.n	800930a <__sflush_r+0xfe>
- 80092fc:	89a3      	ldrh	r3, [r4, #12]
- 80092fe:	f04f 30ff 	mov.w	r0, #4294967295
- 8009302:	f043 0340 	orr.w	r3, r3, #64	; 0x40
- 8009306:	81a3      	strh	r3, [r4, #12]
- 8009308:	e78e      	b.n	8009228 <__sflush_r+0x1c>
- 800930a:	4407      	add	r7, r0
- 800930c:	eba8 0800 	sub.w	r8, r8, r0
- 8009310:	e7e9      	b.n	80092e6 <__sflush_r+0xda>
- 8009312:	bf00      	nop
- 8009314:	20400001 	.word	0x20400001
-
-08009318 <_fflush_r>:
- 8009318:	b538      	push	{r3, r4, r5, lr}
- 800931a:	690b      	ldr	r3, [r1, #16]
- 800931c:	4605      	mov	r5, r0
- 800931e:	460c      	mov	r4, r1
- 8009320:	b913      	cbnz	r3, 8009328 <_fflush_r+0x10>
- 8009322:	2500      	movs	r5, #0
- 8009324:	4628      	mov	r0, r5
- 8009326:	bd38      	pop	{r3, r4, r5, pc}
- 8009328:	b118      	cbz	r0, 8009332 <_fflush_r+0x1a>
- 800932a:	6983      	ldr	r3, [r0, #24]
- 800932c:	b90b      	cbnz	r3, 8009332 <_fflush_r+0x1a>
- 800932e:	f000 f887 	bl	8009440 <__sinit>
- 8009332:	4b14      	ldr	r3, [pc, #80]	; (8009384 <_fflush_r+0x6c>)
- 8009334:	429c      	cmp	r4, r3
- 8009336:	d11b      	bne.n	8009370 <_fflush_r+0x58>
- 8009338:	686c      	ldr	r4, [r5, #4]
- 800933a:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
- 800933e:	2b00      	cmp	r3, #0
- 8009340:	d0ef      	beq.n	8009322 <_fflush_r+0xa>
- 8009342:	6e62      	ldr	r2, [r4, #100]	; 0x64
- 8009344:	07d0      	lsls	r0, r2, #31
- 8009346:	d404      	bmi.n	8009352 <_fflush_r+0x3a>
- 8009348:	0599      	lsls	r1, r3, #22
- 800934a:	d402      	bmi.n	8009352 <_fflush_r+0x3a>
- 800934c:	6da0      	ldr	r0, [r4, #88]	; 0x58
- 800934e:	f000 f91a 	bl	8009586 <__retarget_lock_acquire_recursive>
+ 80092d0:	dd05      	ble.n	80092de <_dtoa_r+0x99e>
+ 80092d2:	4631      	mov	r1, r6
+ 80092d4:	463a      	mov	r2, r7
+ 80092d6:	4628      	mov	r0, r5
+ 80092d8:	f000 fb6c 	bl	80099b4 <__lshift>
+ 80092dc:	4606      	mov	r6, r0
+ 80092de:	f1b8 0f00 	cmp.w	r8, #0
+ 80092e2:	d05b      	beq.n	800939c <_dtoa_r+0xa5c>
+ 80092e4:	4628      	mov	r0, r5
+ 80092e6:	6871      	ldr	r1, [r6, #4]
+ 80092e8:	f000 f956 	bl	8009598 <_Balloc>
+ 80092ec:	4607      	mov	r7, r0
+ 80092ee:	b928      	cbnz	r0, 80092fc <_dtoa_r+0x9bc>
+ 80092f0:	4602      	mov	r2, r0
+ 80092f2:	f240 21ef 	movw	r1, #751	; 0x2ef
+ 80092f6:	4b81      	ldr	r3, [pc, #516]	; (80094fc <_dtoa_r+0xbbc>)
+ 80092f8:	f7ff bb36 	b.w	8008968 <_dtoa_r+0x28>
+ 80092fc:	6932      	ldr	r2, [r6, #16]
+ 80092fe:	f106 010c 	add.w	r1, r6, #12
+ 8009302:	3202      	adds	r2, #2
+ 8009304:	0092      	lsls	r2, r2, #2
+ 8009306:	300c      	adds	r0, #12
+ 8009308:	f001 f8a0 	bl	800a44c <memcpy>
+ 800930c:	2201      	movs	r2, #1
+ 800930e:	4639      	mov	r1, r7
+ 8009310:	4628      	mov	r0, r5
+ 8009312:	f000 fb4f 	bl	80099b4 <__lshift>
+ 8009316:	46b0      	mov	r8, r6
+ 8009318:	4606      	mov	r6, r0
+ 800931a:	9b03      	ldr	r3, [sp, #12]
+ 800931c:	9a03      	ldr	r2, [sp, #12]
+ 800931e:	3301      	adds	r3, #1
+ 8009320:	9308      	str	r3, [sp, #32]
+ 8009322:	9b06      	ldr	r3, [sp, #24]
+ 8009324:	4413      	add	r3, r2
+ 8009326:	930b      	str	r3, [sp, #44]	; 0x2c
+ 8009328:	9b04      	ldr	r3, [sp, #16]
+ 800932a:	f003 0301 	and.w	r3, r3, #1
+ 800932e:	930a      	str	r3, [sp, #40]	; 0x28
+ 8009330:	9b08      	ldr	r3, [sp, #32]
+ 8009332:	4621      	mov	r1, r4
+ 8009334:	3b01      	subs	r3, #1
+ 8009336:	4650      	mov	r0, sl
+ 8009338:	9304      	str	r3, [sp, #16]
+ 800933a:	f7ff fa76 	bl	800882a <quorem>
+ 800933e:	4641      	mov	r1, r8
+ 8009340:	9006      	str	r0, [sp, #24]
+ 8009342:	f100 0930 	add.w	r9, r0, #48	; 0x30
+ 8009346:	4650      	mov	r0, sl
+ 8009348:	f000 fba0 	bl	8009a8c <__mcmp>
+ 800934c:	4632      	mov	r2, r6
+ 800934e:	9009      	str	r0, [sp, #36]	; 0x24
+ 8009350:	4621      	mov	r1, r4
  8009352:	4628      	mov	r0, r5
- 8009354:	4621      	mov	r1, r4
- 8009356:	f7ff ff59 	bl	800920c <__sflush_r>
- 800935a:	6e63      	ldr	r3, [r4, #100]	; 0x64
- 800935c:	4605      	mov	r5, r0
- 800935e:	07da      	lsls	r2, r3, #31
- 8009360:	d4e0      	bmi.n	8009324 <_fflush_r+0xc>
- 8009362:	89a3      	ldrh	r3, [r4, #12]
- 8009364:	059b      	lsls	r3, r3, #22
- 8009366:	d4dd      	bmi.n	8009324 <_fflush_r+0xc>
- 8009368:	6da0      	ldr	r0, [r4, #88]	; 0x58
- 800936a:	f000 f90d 	bl	8009588 <__retarget_lock_release_recursive>
- 800936e:	e7d9      	b.n	8009324 <_fflush_r+0xc>
- 8009370:	4b05      	ldr	r3, [pc, #20]	; (8009388 <_fflush_r+0x70>)
- 8009372:	429c      	cmp	r4, r3
- 8009374:	d101      	bne.n	800937a <_fflush_r+0x62>
- 8009376:	68ac      	ldr	r4, [r5, #8]
- 8009378:	e7df      	b.n	800933a <_fflush_r+0x22>
- 800937a:	4b04      	ldr	r3, [pc, #16]	; (800938c <_fflush_r+0x74>)
- 800937c:	429c      	cmp	r4, r3
- 800937e:	bf08      	it	eq
- 8009380:	68ec      	ldreq	r4, [r5, #12]
- 8009382:	e7da      	b.n	800933a <_fflush_r+0x22>
- 8009384:	0800b340 	.word	0x0800b340
- 8009388:	0800b360 	.word	0x0800b360
- 800938c:	0800b320 	.word	0x0800b320
+ 8009354:	f000 fbb6 	bl	8009ac4 <__mdiff>
+ 8009358:	68c2      	ldr	r2, [r0, #12]
+ 800935a:	4607      	mov	r7, r0
+ 800935c:	bb02      	cbnz	r2, 80093a0 <_dtoa_r+0xa60>
+ 800935e:	4601      	mov	r1, r0
+ 8009360:	4650      	mov	r0, sl
+ 8009362:	f000 fb93 	bl	8009a8c <__mcmp>
+ 8009366:	4602      	mov	r2, r0
+ 8009368:	4639      	mov	r1, r7
+ 800936a:	4628      	mov	r0, r5
+ 800936c:	920c      	str	r2, [sp, #48]	; 0x30
+ 800936e:	f000 f953 	bl	8009618 <_Bfree>
+ 8009372:	9b22      	ldr	r3, [sp, #136]	; 0x88
+ 8009374:	9a0c      	ldr	r2, [sp, #48]	; 0x30
+ 8009376:	9f08      	ldr	r7, [sp, #32]
+ 8009378:	ea43 0102 	orr.w	r1, r3, r2
+ 800937c:	9b0a      	ldr	r3, [sp, #40]	; 0x28
+ 800937e:	4319      	orrs	r1, r3
+ 8009380:	d110      	bne.n	80093a4 <_dtoa_r+0xa64>
+ 8009382:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
+ 8009386:	d029      	beq.n	80093dc <_dtoa_r+0xa9c>
+ 8009388:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 800938a:	2b00      	cmp	r3, #0
+ 800938c:	dd02      	ble.n	8009394 <_dtoa_r+0xa54>
+ 800938e:	9b06      	ldr	r3, [sp, #24]
+ 8009390:	f103 0931 	add.w	r9, r3, #49	; 0x31
+ 8009394:	9b04      	ldr	r3, [sp, #16]
+ 8009396:	f883 9000 	strb.w	r9, [r3]
+ 800939a:	e777      	b.n	800928c <_dtoa_r+0x94c>
+ 800939c:	4630      	mov	r0, r6
+ 800939e:	e7ba      	b.n	8009316 <_dtoa_r+0x9d6>
+ 80093a0:	2201      	movs	r2, #1
+ 80093a2:	e7e1      	b.n	8009368 <_dtoa_r+0xa28>
+ 80093a4:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 80093a6:	2b00      	cmp	r3, #0
+ 80093a8:	db04      	blt.n	80093b4 <_dtoa_r+0xa74>
+ 80093aa:	9922      	ldr	r1, [sp, #136]	; 0x88
+ 80093ac:	430b      	orrs	r3, r1
+ 80093ae:	990a      	ldr	r1, [sp, #40]	; 0x28
+ 80093b0:	430b      	orrs	r3, r1
+ 80093b2:	d120      	bne.n	80093f6 <_dtoa_r+0xab6>
+ 80093b4:	2a00      	cmp	r2, #0
+ 80093b6:	dded      	ble.n	8009394 <_dtoa_r+0xa54>
+ 80093b8:	4651      	mov	r1, sl
+ 80093ba:	2201      	movs	r2, #1
+ 80093bc:	4628      	mov	r0, r5
+ 80093be:	f000 faf9 	bl	80099b4 <__lshift>
+ 80093c2:	4621      	mov	r1, r4
+ 80093c4:	4682      	mov	sl, r0
+ 80093c6:	f000 fb61 	bl	8009a8c <__mcmp>
+ 80093ca:	2800      	cmp	r0, #0
+ 80093cc:	dc03      	bgt.n	80093d6 <_dtoa_r+0xa96>
+ 80093ce:	d1e1      	bne.n	8009394 <_dtoa_r+0xa54>
+ 80093d0:	f019 0f01 	tst.w	r9, #1
+ 80093d4:	d0de      	beq.n	8009394 <_dtoa_r+0xa54>
+ 80093d6:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
+ 80093da:	d1d8      	bne.n	800938e <_dtoa_r+0xa4e>
+ 80093dc:	2339      	movs	r3, #57	; 0x39
+ 80093de:	9a04      	ldr	r2, [sp, #16]
+ 80093e0:	7013      	strb	r3, [r2, #0]
+ 80093e2:	463b      	mov	r3, r7
+ 80093e4:	461f      	mov	r7, r3
+ 80093e6:	f817 2c01 	ldrb.w	r2, [r7, #-1]
+ 80093ea:	3b01      	subs	r3, #1
+ 80093ec:	2a39      	cmp	r2, #57	; 0x39
+ 80093ee:	d06b      	beq.n	80094c8 <_dtoa_r+0xb88>
+ 80093f0:	3201      	adds	r2, #1
+ 80093f2:	701a      	strb	r2, [r3, #0]
+ 80093f4:	e74a      	b.n	800928c <_dtoa_r+0x94c>
+ 80093f6:	2a00      	cmp	r2, #0
+ 80093f8:	dd07      	ble.n	800940a <_dtoa_r+0xaca>
+ 80093fa:	f1b9 0f39 	cmp.w	r9, #57	; 0x39
+ 80093fe:	d0ed      	beq.n	80093dc <_dtoa_r+0xa9c>
+ 8009400:	9a04      	ldr	r2, [sp, #16]
+ 8009402:	f109 0301 	add.w	r3, r9, #1
+ 8009406:	7013      	strb	r3, [r2, #0]
+ 8009408:	e740      	b.n	800928c <_dtoa_r+0x94c>
+ 800940a:	9b08      	ldr	r3, [sp, #32]
+ 800940c:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
+ 800940e:	f803 9c01 	strb.w	r9, [r3, #-1]
+ 8009412:	4293      	cmp	r3, r2
+ 8009414:	d042      	beq.n	800949c <_dtoa_r+0xb5c>
+ 8009416:	4651      	mov	r1, sl
+ 8009418:	2300      	movs	r3, #0
+ 800941a:	220a      	movs	r2, #10
+ 800941c:	4628      	mov	r0, r5
+ 800941e:	f000 f91d 	bl	800965c <__multadd>
+ 8009422:	45b0      	cmp	r8, r6
+ 8009424:	4682      	mov	sl, r0
+ 8009426:	f04f 0300 	mov.w	r3, #0
+ 800942a:	f04f 020a 	mov.w	r2, #10
+ 800942e:	4641      	mov	r1, r8
+ 8009430:	4628      	mov	r0, r5
+ 8009432:	d107      	bne.n	8009444 <_dtoa_r+0xb04>
+ 8009434:	f000 f912 	bl	800965c <__multadd>
+ 8009438:	4680      	mov	r8, r0
+ 800943a:	4606      	mov	r6, r0
+ 800943c:	9b08      	ldr	r3, [sp, #32]
+ 800943e:	3301      	adds	r3, #1
+ 8009440:	9308      	str	r3, [sp, #32]
+ 8009442:	e775      	b.n	8009330 <_dtoa_r+0x9f0>
+ 8009444:	f000 f90a 	bl	800965c <__multadd>
+ 8009448:	4631      	mov	r1, r6
+ 800944a:	4680      	mov	r8, r0
+ 800944c:	2300      	movs	r3, #0
+ 800944e:	220a      	movs	r2, #10
+ 8009450:	4628      	mov	r0, r5
+ 8009452:	f000 f903 	bl	800965c <__multadd>
+ 8009456:	4606      	mov	r6, r0
+ 8009458:	e7f0      	b.n	800943c <_dtoa_r+0xafc>
+ 800945a:	9b08      	ldr	r3, [sp, #32]
+ 800945c:	9306      	str	r3, [sp, #24]
+ 800945e:	9f03      	ldr	r7, [sp, #12]
+ 8009460:	4621      	mov	r1, r4
+ 8009462:	4650      	mov	r0, sl
+ 8009464:	f7ff f9e1 	bl	800882a <quorem>
+ 8009468:	9b03      	ldr	r3, [sp, #12]
+ 800946a:	f100 0930 	add.w	r9, r0, #48	; 0x30
+ 800946e:	f807 9b01 	strb.w	r9, [r7], #1
+ 8009472:	1afa      	subs	r2, r7, r3
+ 8009474:	9b06      	ldr	r3, [sp, #24]
+ 8009476:	4293      	cmp	r3, r2
+ 8009478:	dd07      	ble.n	800948a <_dtoa_r+0xb4a>
+ 800947a:	4651      	mov	r1, sl
+ 800947c:	2300      	movs	r3, #0
+ 800947e:	220a      	movs	r2, #10
+ 8009480:	4628      	mov	r0, r5
+ 8009482:	f000 f8eb 	bl	800965c <__multadd>
+ 8009486:	4682      	mov	sl, r0
+ 8009488:	e7ea      	b.n	8009460 <_dtoa_r+0xb20>
+ 800948a:	9b06      	ldr	r3, [sp, #24]
+ 800948c:	f04f 0800 	mov.w	r8, #0
+ 8009490:	2b00      	cmp	r3, #0
+ 8009492:	bfcc      	ite	gt
+ 8009494:	461f      	movgt	r7, r3
+ 8009496:	2701      	movle	r7, #1
+ 8009498:	9b03      	ldr	r3, [sp, #12]
+ 800949a:	441f      	add	r7, r3
+ 800949c:	4651      	mov	r1, sl
+ 800949e:	2201      	movs	r2, #1
+ 80094a0:	4628      	mov	r0, r5
+ 80094a2:	f000 fa87 	bl	80099b4 <__lshift>
+ 80094a6:	4621      	mov	r1, r4
+ 80094a8:	4682      	mov	sl, r0
+ 80094aa:	f000 faef 	bl	8009a8c <__mcmp>
+ 80094ae:	2800      	cmp	r0, #0
+ 80094b0:	dc97      	bgt.n	80093e2 <_dtoa_r+0xaa2>
+ 80094b2:	d102      	bne.n	80094ba <_dtoa_r+0xb7a>
+ 80094b4:	f019 0f01 	tst.w	r9, #1
+ 80094b8:	d193      	bne.n	80093e2 <_dtoa_r+0xaa2>
+ 80094ba:	463b      	mov	r3, r7
+ 80094bc:	461f      	mov	r7, r3
+ 80094be:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
+ 80094c2:	2a30      	cmp	r2, #48	; 0x30
+ 80094c4:	d0fa      	beq.n	80094bc <_dtoa_r+0xb7c>
+ 80094c6:	e6e1      	b.n	800928c <_dtoa_r+0x94c>
+ 80094c8:	9a03      	ldr	r2, [sp, #12]
+ 80094ca:	429a      	cmp	r2, r3
+ 80094cc:	d18a      	bne.n	80093e4 <_dtoa_r+0xaa4>
+ 80094ce:	2331      	movs	r3, #49	; 0x31
+ 80094d0:	f10b 0b01 	add.w	fp, fp, #1
+ 80094d4:	e797      	b.n	8009406 <_dtoa_r+0xac6>
+ 80094d6:	4b0a      	ldr	r3, [pc, #40]	; (8009500 <_dtoa_r+0xbc0>)
+ 80094d8:	f7ff ba9f 	b.w	8008a1a <_dtoa_r+0xda>
+ 80094dc:	9b26      	ldr	r3, [sp, #152]	; 0x98
+ 80094de:	2b00      	cmp	r3, #0
+ 80094e0:	f47f aa77 	bne.w	80089d2 <_dtoa_r+0x92>
+ 80094e4:	4b07      	ldr	r3, [pc, #28]	; (8009504 <_dtoa_r+0xbc4>)
+ 80094e6:	f7ff ba98 	b.w	8008a1a <_dtoa_r+0xda>
+ 80094ea:	9b06      	ldr	r3, [sp, #24]
+ 80094ec:	2b00      	cmp	r3, #0
+ 80094ee:	dcb6      	bgt.n	800945e <_dtoa_r+0xb1e>
+ 80094f0:	9b22      	ldr	r3, [sp, #136]	; 0x88
+ 80094f2:	2b02      	cmp	r3, #2
+ 80094f4:	f73f aeb5 	bgt.w	8009262 <_dtoa_r+0x922>
+ 80094f8:	e7b1      	b.n	800945e <_dtoa_r+0xb1e>
+ 80094fa:	bf00      	nop
+ 80094fc:	0800b2f2 	.word	0x0800b2f2
+ 8009500:	0800b252 	.word	0x0800b252
+ 8009504:	0800b276 	.word	0x0800b276
 
-08009390 <std>:
- 8009390:	2300      	movs	r3, #0
- 8009392:	b510      	push	{r4, lr}
- 8009394:	4604      	mov	r4, r0
- 8009396:	e9c0 3300 	strd	r3, r3, [r0]
- 800939a:	e9c0 3304 	strd	r3, r3, [r0, #16]
- 800939e:	6083      	str	r3, [r0, #8]
- 80093a0:	8181      	strh	r1, [r0, #12]
- 80093a2:	6643      	str	r3, [r0, #100]	; 0x64
- 80093a4:	81c2      	strh	r2, [r0, #14]
- 80093a6:	6183      	str	r3, [r0, #24]
- 80093a8:	4619      	mov	r1, r3
- 80093aa:	2208      	movs	r2, #8
- 80093ac:	305c      	adds	r0, #92	; 0x5c
- 80093ae:	f7fe fab1 	bl	8007914 <memset>
- 80093b2:	4b05      	ldr	r3, [pc, #20]	; (80093c8 <std+0x38>)
- 80093b4:	6224      	str	r4, [r4, #32]
- 80093b6:	6263      	str	r3, [r4, #36]	; 0x24
- 80093b8:	4b04      	ldr	r3, [pc, #16]	; (80093cc <std+0x3c>)
- 80093ba:	62a3      	str	r3, [r4, #40]	; 0x28
- 80093bc:	4b04      	ldr	r3, [pc, #16]	; (80093d0 <std+0x40>)
- 80093be:	62e3      	str	r3, [r4, #44]	; 0x2c
- 80093c0:	4b04      	ldr	r3, [pc, #16]	; (80093d4 <std+0x44>)
- 80093c2:	6323      	str	r3, [r4, #48]	; 0x30
- 80093c4:	bd10      	pop	{r4, pc}
- 80093c6:	bf00      	nop
- 80093c8:	0800a32d 	.word	0x0800a32d
- 80093cc:	0800a34f 	.word	0x0800a34f
- 80093d0:	0800a387 	.word	0x0800a387
- 80093d4:	0800a3ab 	.word	0x0800a3ab
+08009508 <_free_r>:
+ 8009508:	b538      	push	{r3, r4, r5, lr}
+ 800950a:	4605      	mov	r5, r0
+ 800950c:	2900      	cmp	r1, #0
+ 800950e:	d040      	beq.n	8009592 <_free_r+0x8a>
+ 8009510:	f851 3c04 	ldr.w	r3, [r1, #-4]
+ 8009514:	1f0c      	subs	r4, r1, #4
+ 8009516:	2b00      	cmp	r3, #0
+ 8009518:	bfb8      	it	lt
+ 800951a:	18e4      	addlt	r4, r4, r3
+ 800951c:	f7fe fac4 	bl	8007aa8 <__malloc_lock>
+ 8009520:	4a1c      	ldr	r2, [pc, #112]	; (8009594 <_free_r+0x8c>)
+ 8009522:	6813      	ldr	r3, [r2, #0]
+ 8009524:	b933      	cbnz	r3, 8009534 <_free_r+0x2c>
+ 8009526:	6063      	str	r3, [r4, #4]
+ 8009528:	6014      	str	r4, [r2, #0]
+ 800952a:	4628      	mov	r0, r5
+ 800952c:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
+ 8009530:	f7fe bac0 	b.w	8007ab4 <__malloc_unlock>
+ 8009534:	42a3      	cmp	r3, r4
+ 8009536:	d908      	bls.n	800954a <_free_r+0x42>
+ 8009538:	6820      	ldr	r0, [r4, #0]
+ 800953a:	1821      	adds	r1, r4, r0
+ 800953c:	428b      	cmp	r3, r1
+ 800953e:	bf01      	itttt	eq
+ 8009540:	6819      	ldreq	r1, [r3, #0]
+ 8009542:	685b      	ldreq	r3, [r3, #4]
+ 8009544:	1809      	addeq	r1, r1, r0
+ 8009546:	6021      	streq	r1, [r4, #0]
+ 8009548:	e7ed      	b.n	8009526 <_free_r+0x1e>
+ 800954a:	461a      	mov	r2, r3
+ 800954c:	685b      	ldr	r3, [r3, #4]
+ 800954e:	b10b      	cbz	r3, 8009554 <_free_r+0x4c>
+ 8009550:	42a3      	cmp	r3, r4
+ 8009552:	d9fa      	bls.n	800954a <_free_r+0x42>
+ 8009554:	6811      	ldr	r1, [r2, #0]
+ 8009556:	1850      	adds	r0, r2, r1
+ 8009558:	42a0      	cmp	r0, r4
+ 800955a:	d10b      	bne.n	8009574 <_free_r+0x6c>
+ 800955c:	6820      	ldr	r0, [r4, #0]
+ 800955e:	4401      	add	r1, r0
+ 8009560:	1850      	adds	r0, r2, r1
+ 8009562:	4283      	cmp	r3, r0
+ 8009564:	6011      	str	r1, [r2, #0]
+ 8009566:	d1e0      	bne.n	800952a <_free_r+0x22>
+ 8009568:	6818      	ldr	r0, [r3, #0]
+ 800956a:	685b      	ldr	r3, [r3, #4]
+ 800956c:	4408      	add	r0, r1
+ 800956e:	6010      	str	r0, [r2, #0]
+ 8009570:	6053      	str	r3, [r2, #4]
+ 8009572:	e7da      	b.n	800952a <_free_r+0x22>
+ 8009574:	d902      	bls.n	800957c <_free_r+0x74>
+ 8009576:	230c      	movs	r3, #12
+ 8009578:	602b      	str	r3, [r5, #0]
+ 800957a:	e7d6      	b.n	800952a <_free_r+0x22>
+ 800957c:	6820      	ldr	r0, [r4, #0]
+ 800957e:	1821      	adds	r1, r4, r0
+ 8009580:	428b      	cmp	r3, r1
+ 8009582:	bf01      	itttt	eq
+ 8009584:	6819      	ldreq	r1, [r3, #0]
+ 8009586:	685b      	ldreq	r3, [r3, #4]
+ 8009588:	1809      	addeq	r1, r1, r0
+ 800958a:	6021      	streq	r1, [r4, #0]
+ 800958c:	6063      	str	r3, [r4, #4]
+ 800958e:	6054      	str	r4, [r2, #4]
+ 8009590:	e7cb      	b.n	800952a <_free_r+0x22>
+ 8009592:	bd38      	pop	{r3, r4, r5, pc}
+ 8009594:	200025b8 	.word	0x200025b8
 
-080093d8 <_cleanup_r>:
- 80093d8:	4901      	ldr	r1, [pc, #4]	; (80093e0 <_cleanup_r+0x8>)
- 80093da:	f000 b8af 	b.w	800953c <_fwalk_reent>
- 80093de:	bf00      	nop
- 80093e0:	08009319 	.word	0x08009319
+08009598 <_Balloc>:
+ 8009598:	b570      	push	{r4, r5, r6, lr}
+ 800959a:	69c6      	ldr	r6, [r0, #28]
+ 800959c:	4604      	mov	r4, r0
+ 800959e:	460d      	mov	r5, r1
+ 80095a0:	b976      	cbnz	r6, 80095c0 <_Balloc+0x28>
+ 80095a2:	2010      	movs	r0, #16
+ 80095a4:	f7fe f9d0 	bl	8007948 <malloc>
+ 80095a8:	4602      	mov	r2, r0
+ 80095aa:	61e0      	str	r0, [r4, #28]
+ 80095ac:	b920      	cbnz	r0, 80095b8 <_Balloc+0x20>
+ 80095ae:	216b      	movs	r1, #107	; 0x6b
+ 80095b0:	4b17      	ldr	r3, [pc, #92]	; (8009610 <_Balloc+0x78>)
+ 80095b2:	4818      	ldr	r0, [pc, #96]	; (8009614 <_Balloc+0x7c>)
+ 80095b4:	f000 ff58 	bl	800a468 <__assert_func>
+ 80095b8:	e9c0 6601 	strd	r6, r6, [r0, #4]
+ 80095bc:	6006      	str	r6, [r0, #0]
+ 80095be:	60c6      	str	r6, [r0, #12]
+ 80095c0:	69e6      	ldr	r6, [r4, #28]
+ 80095c2:	68f3      	ldr	r3, [r6, #12]
+ 80095c4:	b183      	cbz	r3, 80095e8 <_Balloc+0x50>
+ 80095c6:	69e3      	ldr	r3, [r4, #28]
+ 80095c8:	68db      	ldr	r3, [r3, #12]
+ 80095ca:	f853 0025 	ldr.w	r0, [r3, r5, lsl #2]
+ 80095ce:	b9b8      	cbnz	r0, 8009600 <_Balloc+0x68>
+ 80095d0:	2101      	movs	r1, #1
+ 80095d2:	fa01 f605 	lsl.w	r6, r1, r5
+ 80095d6:	1d72      	adds	r2, r6, #5
+ 80095d8:	4620      	mov	r0, r4
+ 80095da:	0092      	lsls	r2, r2, #2
+ 80095dc:	f000 ff62 	bl	800a4a4 <_calloc_r>
+ 80095e0:	b160      	cbz	r0, 80095fc <_Balloc+0x64>
+ 80095e2:	e9c0 5601 	strd	r5, r6, [r0, #4]
+ 80095e6:	e00e      	b.n	8009606 <_Balloc+0x6e>
+ 80095e8:	2221      	movs	r2, #33	; 0x21
+ 80095ea:	2104      	movs	r1, #4
+ 80095ec:	4620      	mov	r0, r4
+ 80095ee:	f000 ff59 	bl	800a4a4 <_calloc_r>
+ 80095f2:	69e3      	ldr	r3, [r4, #28]
+ 80095f4:	60f0      	str	r0, [r6, #12]
+ 80095f6:	68db      	ldr	r3, [r3, #12]
+ 80095f8:	2b00      	cmp	r3, #0
+ 80095fa:	d1e4      	bne.n	80095c6 <_Balloc+0x2e>
+ 80095fc:	2000      	movs	r0, #0
+ 80095fe:	bd70      	pop	{r4, r5, r6, pc}
+ 8009600:	6802      	ldr	r2, [r0, #0]
+ 8009602:	f843 2025 	str.w	r2, [r3, r5, lsl #2]
+ 8009606:	2300      	movs	r3, #0
+ 8009608:	e9c0 3303 	strd	r3, r3, [r0, #12]
+ 800960c:	e7f7      	b.n	80095fe <_Balloc+0x66>
+ 800960e:	bf00      	nop
+ 8009610:	0800b283 	.word	0x0800b283
+ 8009614:	0800b303 	.word	0x0800b303
 
-080093e4 <__sfmoreglue>:
- 80093e4:	b570      	push	{r4, r5, r6, lr}
- 80093e6:	2568      	movs	r5, #104	; 0x68
- 80093e8:	1e4a      	subs	r2, r1, #1
- 80093ea:	4355      	muls	r5, r2
- 80093ec:	460e      	mov	r6, r1
- 80093ee:	f105 0174 	add.w	r1, r5, #116	; 0x74
- 80093f2:	f7fe fae3 	bl	80079bc <_malloc_r>
- 80093f6:	4604      	mov	r4, r0
- 80093f8:	b140      	cbz	r0, 800940c <__sfmoreglue+0x28>
- 80093fa:	2100      	movs	r1, #0
- 80093fc:	e9c0 1600 	strd	r1, r6, [r0]
- 8009400:	300c      	adds	r0, #12
- 8009402:	60a0      	str	r0, [r4, #8]
- 8009404:	f105 0268 	add.w	r2, r5, #104	; 0x68
- 8009408:	f7fe fa84 	bl	8007914 <memset>
- 800940c:	4620      	mov	r0, r4
- 800940e:	bd70      	pop	{r4, r5, r6, pc}
+08009618 <_Bfree>:
+ 8009618:	b570      	push	{r4, r5, r6, lr}
+ 800961a:	69c6      	ldr	r6, [r0, #28]
+ 800961c:	4605      	mov	r5, r0
+ 800961e:	460c      	mov	r4, r1
+ 8009620:	b976      	cbnz	r6, 8009640 <_Bfree+0x28>
+ 8009622:	2010      	movs	r0, #16
+ 8009624:	f7fe f990 	bl	8007948 <malloc>
+ 8009628:	4602      	mov	r2, r0
+ 800962a:	61e8      	str	r0, [r5, #28]
+ 800962c:	b920      	cbnz	r0, 8009638 <_Bfree+0x20>
+ 800962e:	218f      	movs	r1, #143	; 0x8f
+ 8009630:	4b08      	ldr	r3, [pc, #32]	; (8009654 <_Bfree+0x3c>)
+ 8009632:	4809      	ldr	r0, [pc, #36]	; (8009658 <_Bfree+0x40>)
+ 8009634:	f000 ff18 	bl	800a468 <__assert_func>
+ 8009638:	e9c0 6601 	strd	r6, r6, [r0, #4]
+ 800963c:	6006      	str	r6, [r0, #0]
+ 800963e:	60c6      	str	r6, [r0, #12]
+ 8009640:	b13c      	cbz	r4, 8009652 <_Bfree+0x3a>
+ 8009642:	69eb      	ldr	r3, [r5, #28]
+ 8009644:	6862      	ldr	r2, [r4, #4]
+ 8009646:	68db      	ldr	r3, [r3, #12]
+ 8009648:	f853 1022 	ldr.w	r1, [r3, r2, lsl #2]
+ 800964c:	6021      	str	r1, [r4, #0]
+ 800964e:	f843 4022 	str.w	r4, [r3, r2, lsl #2]
+ 8009652:	bd70      	pop	{r4, r5, r6, pc}
+ 8009654:	0800b283 	.word	0x0800b283
+ 8009658:	0800b303 	.word	0x0800b303
 
-08009410 <__sfp_lock_acquire>:
- 8009410:	4801      	ldr	r0, [pc, #4]	; (8009418 <__sfp_lock_acquire+0x8>)
- 8009412:	f000 b8b8 	b.w	8009586 <__retarget_lock_acquire_recursive>
- 8009416:	bf00      	nop
- 8009418:	2000261e 	.word	0x2000261e
+0800965c <__multadd>:
+ 800965c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
+ 8009660:	4607      	mov	r7, r0
+ 8009662:	460c      	mov	r4, r1
+ 8009664:	461e      	mov	r6, r3
+ 8009666:	2000      	movs	r0, #0
+ 8009668:	690d      	ldr	r5, [r1, #16]
+ 800966a:	f101 0c14 	add.w	ip, r1, #20
+ 800966e:	f8dc 3000 	ldr.w	r3, [ip]
+ 8009672:	3001      	adds	r0, #1
+ 8009674:	b299      	uxth	r1, r3
+ 8009676:	fb02 6101 	mla	r1, r2, r1, r6
+ 800967a:	0c1e      	lsrs	r6, r3, #16
+ 800967c:	0c0b      	lsrs	r3, r1, #16
+ 800967e:	fb02 3306 	mla	r3, r2, r6, r3
+ 8009682:	b289      	uxth	r1, r1
+ 8009684:	eb01 4103 	add.w	r1, r1, r3, lsl #16
+ 8009688:	4285      	cmp	r5, r0
+ 800968a:	ea4f 4613 	mov.w	r6, r3, lsr #16
+ 800968e:	f84c 1b04 	str.w	r1, [ip], #4
+ 8009692:	dcec      	bgt.n	800966e <__multadd+0x12>
+ 8009694:	b30e      	cbz	r6, 80096da <__multadd+0x7e>
+ 8009696:	68a3      	ldr	r3, [r4, #8]
+ 8009698:	42ab      	cmp	r3, r5
+ 800969a:	dc19      	bgt.n	80096d0 <__multadd+0x74>
+ 800969c:	6861      	ldr	r1, [r4, #4]
+ 800969e:	4638      	mov	r0, r7
+ 80096a0:	3101      	adds	r1, #1
+ 80096a2:	f7ff ff79 	bl	8009598 <_Balloc>
+ 80096a6:	4680      	mov	r8, r0
+ 80096a8:	b928      	cbnz	r0, 80096b6 <__multadd+0x5a>
+ 80096aa:	4602      	mov	r2, r0
+ 80096ac:	21ba      	movs	r1, #186	; 0xba
+ 80096ae:	4b0c      	ldr	r3, [pc, #48]	; (80096e0 <__multadd+0x84>)
+ 80096b0:	480c      	ldr	r0, [pc, #48]	; (80096e4 <__multadd+0x88>)
+ 80096b2:	f000 fed9 	bl	800a468 <__assert_func>
+ 80096b6:	6922      	ldr	r2, [r4, #16]
+ 80096b8:	f104 010c 	add.w	r1, r4, #12
+ 80096bc:	3202      	adds	r2, #2
+ 80096be:	0092      	lsls	r2, r2, #2
+ 80096c0:	300c      	adds	r0, #12
+ 80096c2:	f000 fec3 	bl	800a44c <memcpy>
+ 80096c6:	4621      	mov	r1, r4
+ 80096c8:	4638      	mov	r0, r7
+ 80096ca:	f7ff ffa5 	bl	8009618 <_Bfree>
+ 80096ce:	4644      	mov	r4, r8
+ 80096d0:	eb04 0385 	add.w	r3, r4, r5, lsl #2
+ 80096d4:	3501      	adds	r5, #1
+ 80096d6:	615e      	str	r6, [r3, #20]
+ 80096d8:	6125      	str	r5, [r4, #16]
+ 80096da:	4620      	mov	r0, r4
+ 80096dc:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
+ 80096e0:	0800b2f2 	.word	0x0800b2f2
+ 80096e4:	0800b303 	.word	0x0800b303
 
-0800941c <__sfp_lock_release>:
- 800941c:	4801      	ldr	r0, [pc, #4]	; (8009424 <__sfp_lock_release+0x8>)
- 800941e:	f000 b8b3 	b.w	8009588 <__retarget_lock_release_recursive>
- 8009422:	bf00      	nop
- 8009424:	2000261e 	.word	0x2000261e
+080096e8 <__hi0bits>:
+ 80096e8:	0c02      	lsrs	r2, r0, #16
+ 80096ea:	0412      	lsls	r2, r2, #16
+ 80096ec:	4603      	mov	r3, r0
+ 80096ee:	b9ca      	cbnz	r2, 8009724 <__hi0bits+0x3c>
+ 80096f0:	0403      	lsls	r3, r0, #16
+ 80096f2:	2010      	movs	r0, #16
+ 80096f4:	f013 4f7f 	tst.w	r3, #4278190080	; 0xff000000
+ 80096f8:	bf04      	itt	eq
+ 80096fa:	021b      	lsleq	r3, r3, #8
+ 80096fc:	3008      	addeq	r0, #8
+ 80096fe:	f013 4f70 	tst.w	r3, #4026531840	; 0xf0000000
+ 8009702:	bf04      	itt	eq
+ 8009704:	011b      	lsleq	r3, r3, #4
+ 8009706:	3004      	addeq	r0, #4
+ 8009708:	f013 4f40 	tst.w	r3, #3221225472	; 0xc0000000
+ 800970c:	bf04      	itt	eq
+ 800970e:	009b      	lsleq	r3, r3, #2
+ 8009710:	3002      	addeq	r0, #2
+ 8009712:	2b00      	cmp	r3, #0
+ 8009714:	db05      	blt.n	8009722 <__hi0bits+0x3a>
+ 8009716:	f013 4f80 	tst.w	r3, #1073741824	; 0x40000000
+ 800971a:	f100 0001 	add.w	r0, r0, #1
+ 800971e:	bf08      	it	eq
+ 8009720:	2020      	moveq	r0, #32
+ 8009722:	4770      	bx	lr
+ 8009724:	2000      	movs	r0, #0
+ 8009726:	e7e5      	b.n	80096f4 <__hi0bits+0xc>
 
-08009428 <__sinit_lock_acquire>:
- 8009428:	4801      	ldr	r0, [pc, #4]	; (8009430 <__sinit_lock_acquire+0x8>)
- 800942a:	f000 b8ac 	b.w	8009586 <__retarget_lock_acquire_recursive>
- 800942e:	bf00      	nop
- 8009430:	20002619 	.word	0x20002619
-
-08009434 <__sinit_lock_release>:
- 8009434:	4801      	ldr	r0, [pc, #4]	; (800943c <__sinit_lock_release+0x8>)
- 8009436:	f000 b8a7 	b.w	8009588 <__retarget_lock_release_recursive>
- 800943a:	bf00      	nop
- 800943c:	20002619 	.word	0x20002619
-
-08009440 <__sinit>:
- 8009440:	b510      	push	{r4, lr}
- 8009442:	4604      	mov	r4, r0
- 8009444:	f7ff fff0 	bl	8009428 <__sinit_lock_acquire>
- 8009448:	69a3      	ldr	r3, [r4, #24]
- 800944a:	b11b      	cbz	r3, 8009454 <__sinit+0x14>
- 800944c:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
- 8009450:	f7ff bff0 	b.w	8009434 <__sinit_lock_release>
- 8009454:	e9c4 3312 	strd	r3, r3, [r4, #72]	; 0x48
- 8009458:	6523      	str	r3, [r4, #80]	; 0x50
- 800945a:	4b13      	ldr	r3, [pc, #76]	; (80094a8 <__sinit+0x68>)
- 800945c:	4a13      	ldr	r2, [pc, #76]	; (80094ac <__sinit+0x6c>)
- 800945e:	681b      	ldr	r3, [r3, #0]
- 8009460:	62a2      	str	r2, [r4, #40]	; 0x28
- 8009462:	42a3      	cmp	r3, r4
- 8009464:	bf08      	it	eq
- 8009466:	2301      	moveq	r3, #1
- 8009468:	4620      	mov	r0, r4
- 800946a:	bf08      	it	eq
- 800946c:	61a3      	streq	r3, [r4, #24]
- 800946e:	f000 f81f 	bl	80094b0 <__sfp>
- 8009472:	6060      	str	r0, [r4, #4]
- 8009474:	4620      	mov	r0, r4
- 8009476:	f000 f81b 	bl	80094b0 <__sfp>
- 800947a:	60a0      	str	r0, [r4, #8]
- 800947c:	4620      	mov	r0, r4
- 800947e:	f000 f817 	bl	80094b0 <__sfp>
- 8009482:	2200      	movs	r2, #0
- 8009484:	2104      	movs	r1, #4
- 8009486:	60e0      	str	r0, [r4, #12]
- 8009488:	6860      	ldr	r0, [r4, #4]
- 800948a:	f7ff ff81 	bl	8009390 <std>
- 800948e:	2201      	movs	r2, #1
- 8009490:	2109      	movs	r1, #9
- 8009492:	68a0      	ldr	r0, [r4, #8]
- 8009494:	f7ff ff7c 	bl	8009390 <std>
- 8009498:	2202      	movs	r2, #2
- 800949a:	2112      	movs	r1, #18
- 800949c:	68e0      	ldr	r0, [r4, #12]
- 800949e:	f7ff ff77 	bl	8009390 <std>
- 80094a2:	2301      	movs	r3, #1
- 80094a4:	61a3      	str	r3, [r4, #24]
- 80094a6:	e7d1      	b.n	800944c <__sinit+0xc>
- 80094a8:	0800b254 	.word	0x0800b254
- 80094ac:	080093d9 	.word	0x080093d9
-
-080094b0 <__sfp>:
- 80094b0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 80094b2:	4607      	mov	r7, r0
- 80094b4:	f7ff ffac 	bl	8009410 <__sfp_lock_acquire>
- 80094b8:	4b1e      	ldr	r3, [pc, #120]	; (8009534 <__sfp+0x84>)
- 80094ba:	681e      	ldr	r6, [r3, #0]
- 80094bc:	69b3      	ldr	r3, [r6, #24]
- 80094be:	b913      	cbnz	r3, 80094c6 <__sfp+0x16>
- 80094c0:	4630      	mov	r0, r6
- 80094c2:	f7ff ffbd 	bl	8009440 <__sinit>
- 80094c6:	3648      	adds	r6, #72	; 0x48
- 80094c8:	e9d6 3401 	ldrd	r3, r4, [r6, #4]
- 80094cc:	3b01      	subs	r3, #1
- 80094ce:	d503      	bpl.n	80094d8 <__sfp+0x28>
- 80094d0:	6833      	ldr	r3, [r6, #0]
- 80094d2:	b30b      	cbz	r3, 8009518 <__sfp+0x68>
- 80094d4:	6836      	ldr	r6, [r6, #0]
- 80094d6:	e7f7      	b.n	80094c8 <__sfp+0x18>
- 80094d8:	f9b4 500c 	ldrsh.w	r5, [r4, #12]
- 80094dc:	b9d5      	cbnz	r5, 8009514 <__sfp+0x64>
- 80094de:	4b16      	ldr	r3, [pc, #88]	; (8009538 <__sfp+0x88>)
- 80094e0:	f104 0058 	add.w	r0, r4, #88	; 0x58
- 80094e4:	60e3      	str	r3, [r4, #12]
- 80094e6:	6665      	str	r5, [r4, #100]	; 0x64
- 80094e8:	f000 f84c 	bl	8009584 <__retarget_lock_init_recursive>
- 80094ec:	f7ff ff96 	bl	800941c <__sfp_lock_release>
- 80094f0:	2208      	movs	r2, #8
- 80094f2:	4629      	mov	r1, r5
- 80094f4:	e9c4 5501 	strd	r5, r5, [r4, #4]
- 80094f8:	e9c4 5504 	strd	r5, r5, [r4, #16]
- 80094fc:	6025      	str	r5, [r4, #0]
- 80094fe:	61a5      	str	r5, [r4, #24]
- 8009500:	f104 005c 	add.w	r0, r4, #92	; 0x5c
- 8009504:	f7fe fa06 	bl	8007914 <memset>
- 8009508:	e9c4 550d 	strd	r5, r5, [r4, #52]	; 0x34
- 800950c:	e9c4 5512 	strd	r5, r5, [r4, #72]	; 0x48
- 8009510:	4620      	mov	r0, r4
- 8009512:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
- 8009514:	3468      	adds	r4, #104	; 0x68
- 8009516:	e7d9      	b.n	80094cc <__sfp+0x1c>
- 8009518:	2104      	movs	r1, #4
- 800951a:	4638      	mov	r0, r7
- 800951c:	f7ff ff62 	bl	80093e4 <__sfmoreglue>
- 8009520:	4604      	mov	r4, r0
- 8009522:	6030      	str	r0, [r6, #0]
- 8009524:	2800      	cmp	r0, #0
- 8009526:	d1d5      	bne.n	80094d4 <__sfp+0x24>
- 8009528:	f7ff ff78 	bl	800941c <__sfp_lock_release>
- 800952c:	230c      	movs	r3, #12
- 800952e:	603b      	str	r3, [r7, #0]
- 8009530:	e7ee      	b.n	8009510 <__sfp+0x60>
- 8009532:	bf00      	nop
- 8009534:	0800b254 	.word	0x0800b254
- 8009538:	ffff0001 	.word	0xffff0001
-
-0800953c <_fwalk_reent>:
- 800953c:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
- 8009540:	4606      	mov	r6, r0
- 8009542:	4688      	mov	r8, r1
- 8009544:	2700      	movs	r7, #0
- 8009546:	f100 0448 	add.w	r4, r0, #72	; 0x48
- 800954a:	e9d4 9501 	ldrd	r9, r5, [r4, #4]
- 800954e:	f1b9 0901 	subs.w	r9, r9, #1
- 8009552:	d505      	bpl.n	8009560 <_fwalk_reent+0x24>
- 8009554:	6824      	ldr	r4, [r4, #0]
- 8009556:	2c00      	cmp	r4, #0
- 8009558:	d1f7      	bne.n	800954a <_fwalk_reent+0xe>
- 800955a:	4638      	mov	r0, r7
- 800955c:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
- 8009560:	89ab      	ldrh	r3, [r5, #12]
- 8009562:	2b01      	cmp	r3, #1
- 8009564:	d907      	bls.n	8009576 <_fwalk_reent+0x3a>
- 8009566:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
- 800956a:	3301      	adds	r3, #1
- 800956c:	d003      	beq.n	8009576 <_fwalk_reent+0x3a>
- 800956e:	4629      	mov	r1, r5
- 8009570:	4630      	mov	r0, r6
- 8009572:	47c0      	blx	r8
- 8009574:	4307      	orrs	r7, r0
- 8009576:	3568      	adds	r5, #104	; 0x68
- 8009578:	e7e9      	b.n	800954e <_fwalk_reent+0x12>
+08009728 <__lo0bits>:
+ 8009728:	6803      	ldr	r3, [r0, #0]
+ 800972a:	4602      	mov	r2, r0
+ 800972c:	f013 0007 	ands.w	r0, r3, #7
+ 8009730:	d00b      	beq.n	800974a <__lo0bits+0x22>
+ 8009732:	07d9      	lsls	r1, r3, #31
+ 8009734:	d421      	bmi.n	800977a <__lo0bits+0x52>
+ 8009736:	0798      	lsls	r0, r3, #30
+ 8009738:	bf49      	itett	mi
+ 800973a:	085b      	lsrmi	r3, r3, #1
+ 800973c:	089b      	lsrpl	r3, r3, #2
+ 800973e:	2001      	movmi	r0, #1
+ 8009740:	6013      	strmi	r3, [r2, #0]
+ 8009742:	bf5c      	itt	pl
+ 8009744:	2002      	movpl	r0, #2
+ 8009746:	6013      	strpl	r3, [r2, #0]
+ 8009748:	4770      	bx	lr
+ 800974a:	b299      	uxth	r1, r3
+ 800974c:	b909      	cbnz	r1, 8009752 <__lo0bits+0x2a>
+ 800974e:	2010      	movs	r0, #16
+ 8009750:	0c1b      	lsrs	r3, r3, #16
+ 8009752:	b2d9      	uxtb	r1, r3
+ 8009754:	b909      	cbnz	r1, 800975a <__lo0bits+0x32>
+ 8009756:	3008      	adds	r0, #8
+ 8009758:	0a1b      	lsrs	r3, r3, #8
+ 800975a:	0719      	lsls	r1, r3, #28
+ 800975c:	bf04      	itt	eq
+ 800975e:	091b      	lsreq	r3, r3, #4
+ 8009760:	3004      	addeq	r0, #4
+ 8009762:	0799      	lsls	r1, r3, #30
+ 8009764:	bf04      	itt	eq
+ 8009766:	089b      	lsreq	r3, r3, #2
+ 8009768:	3002      	addeq	r0, #2
+ 800976a:	07d9      	lsls	r1, r3, #31
+ 800976c:	d403      	bmi.n	8009776 <__lo0bits+0x4e>
+ 800976e:	085b      	lsrs	r3, r3, #1
+ 8009770:	f100 0001 	add.w	r0, r0, #1
+ 8009774:	d003      	beq.n	800977e <__lo0bits+0x56>
+ 8009776:	6013      	str	r3, [r2, #0]
+ 8009778:	4770      	bx	lr
+ 800977a:	2000      	movs	r0, #0
+ 800977c:	4770      	bx	lr
+ 800977e:	2020      	movs	r0, #32
+ 8009780:	4770      	bx	lr
 	...
 
-0800957c <_localeconv_r>:
- 800957c:	4800      	ldr	r0, [pc, #0]	; (8009580 <_localeconv_r+0x4>)
- 800957e:	4770      	bx	lr
- 8009580:	20000160 	.word	0x20000160
+08009784 <__i2b>:
+ 8009784:	b510      	push	{r4, lr}
+ 8009786:	460c      	mov	r4, r1
+ 8009788:	2101      	movs	r1, #1
+ 800978a:	f7ff ff05 	bl	8009598 <_Balloc>
+ 800978e:	4602      	mov	r2, r0
+ 8009790:	b928      	cbnz	r0, 800979e <__i2b+0x1a>
+ 8009792:	f240 1145 	movw	r1, #325	; 0x145
+ 8009796:	4b04      	ldr	r3, [pc, #16]	; (80097a8 <__i2b+0x24>)
+ 8009798:	4804      	ldr	r0, [pc, #16]	; (80097ac <__i2b+0x28>)
+ 800979a:	f000 fe65 	bl	800a468 <__assert_func>
+ 800979e:	2301      	movs	r3, #1
+ 80097a0:	6144      	str	r4, [r0, #20]
+ 80097a2:	6103      	str	r3, [r0, #16]
+ 80097a4:	bd10      	pop	{r4, pc}
+ 80097a6:	bf00      	nop
+ 80097a8:	0800b2f2 	.word	0x0800b2f2
+ 80097ac:	0800b303 	.word	0x0800b303
 
-08009584 <__retarget_lock_init_recursive>:
- 8009584:	4770      	bx	lr
+080097b0 <__multiply>:
+ 80097b0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 80097b4:	4691      	mov	r9, r2
+ 80097b6:	690a      	ldr	r2, [r1, #16]
+ 80097b8:	f8d9 3010 	ldr.w	r3, [r9, #16]
+ 80097bc:	460c      	mov	r4, r1
+ 80097be:	429a      	cmp	r2, r3
+ 80097c0:	bfbe      	ittt	lt
+ 80097c2:	460b      	movlt	r3, r1
+ 80097c4:	464c      	movlt	r4, r9
+ 80097c6:	4699      	movlt	r9, r3
+ 80097c8:	6927      	ldr	r7, [r4, #16]
+ 80097ca:	f8d9 a010 	ldr.w	sl, [r9, #16]
+ 80097ce:	68a3      	ldr	r3, [r4, #8]
+ 80097d0:	6861      	ldr	r1, [r4, #4]
+ 80097d2:	eb07 060a 	add.w	r6, r7, sl
+ 80097d6:	42b3      	cmp	r3, r6
+ 80097d8:	b085      	sub	sp, #20
+ 80097da:	bfb8      	it	lt
+ 80097dc:	3101      	addlt	r1, #1
+ 80097de:	f7ff fedb 	bl	8009598 <_Balloc>
+ 80097e2:	b930      	cbnz	r0, 80097f2 <__multiply+0x42>
+ 80097e4:	4602      	mov	r2, r0
+ 80097e6:	f44f 71b1 	mov.w	r1, #354	; 0x162
+ 80097ea:	4b43      	ldr	r3, [pc, #268]	; (80098f8 <__multiply+0x148>)
+ 80097ec:	4843      	ldr	r0, [pc, #268]	; (80098fc <__multiply+0x14c>)
+ 80097ee:	f000 fe3b 	bl	800a468 <__assert_func>
+ 80097f2:	f100 0514 	add.w	r5, r0, #20
+ 80097f6:	462b      	mov	r3, r5
+ 80097f8:	2200      	movs	r2, #0
+ 80097fa:	eb05 0886 	add.w	r8, r5, r6, lsl #2
+ 80097fe:	4543      	cmp	r3, r8
+ 8009800:	d321      	bcc.n	8009846 <__multiply+0x96>
+ 8009802:	f104 0314 	add.w	r3, r4, #20
+ 8009806:	eb03 0787 	add.w	r7, r3, r7, lsl #2
+ 800980a:	f109 0314 	add.w	r3, r9, #20
+ 800980e:	eb03 028a 	add.w	r2, r3, sl, lsl #2
+ 8009812:	9202      	str	r2, [sp, #8]
+ 8009814:	1b3a      	subs	r2, r7, r4
+ 8009816:	3a15      	subs	r2, #21
+ 8009818:	f022 0203 	bic.w	r2, r2, #3
+ 800981c:	3204      	adds	r2, #4
+ 800981e:	f104 0115 	add.w	r1, r4, #21
+ 8009822:	428f      	cmp	r7, r1
+ 8009824:	bf38      	it	cc
+ 8009826:	2204      	movcc	r2, #4
+ 8009828:	9201      	str	r2, [sp, #4]
+ 800982a:	9a02      	ldr	r2, [sp, #8]
+ 800982c:	9303      	str	r3, [sp, #12]
+ 800982e:	429a      	cmp	r2, r3
+ 8009830:	d80c      	bhi.n	800984c <__multiply+0x9c>
+ 8009832:	2e00      	cmp	r6, #0
+ 8009834:	dd03      	ble.n	800983e <__multiply+0x8e>
+ 8009836:	f858 3d04 	ldr.w	r3, [r8, #-4]!
+ 800983a:	2b00      	cmp	r3, #0
+ 800983c:	d05a      	beq.n	80098f4 <__multiply+0x144>
+ 800983e:	6106      	str	r6, [r0, #16]
+ 8009840:	b005      	add	sp, #20
+ 8009842:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+ 8009846:	f843 2b04 	str.w	r2, [r3], #4
+ 800984a:	e7d8      	b.n	80097fe <__multiply+0x4e>
+ 800984c:	f8b3 a000 	ldrh.w	sl, [r3]
+ 8009850:	f1ba 0f00 	cmp.w	sl, #0
+ 8009854:	d023      	beq.n	800989e <__multiply+0xee>
+ 8009856:	46a9      	mov	r9, r5
+ 8009858:	f04f 0c00 	mov.w	ip, #0
+ 800985c:	f104 0e14 	add.w	lr, r4, #20
+ 8009860:	f85e 2b04 	ldr.w	r2, [lr], #4
+ 8009864:	f8d9 1000 	ldr.w	r1, [r9]
+ 8009868:	fa1f fb82 	uxth.w	fp, r2
+ 800986c:	b289      	uxth	r1, r1
+ 800986e:	fb0a 110b 	mla	r1, sl, fp, r1
+ 8009872:	4461      	add	r1, ip
+ 8009874:	f8d9 c000 	ldr.w	ip, [r9]
+ 8009878:	0c12      	lsrs	r2, r2, #16
+ 800987a:	ea4f 4c1c 	mov.w	ip, ip, lsr #16
+ 800987e:	fb0a c202 	mla	r2, sl, r2, ip
+ 8009882:	eb02 4211 	add.w	r2, r2, r1, lsr #16
+ 8009886:	b289      	uxth	r1, r1
+ 8009888:	ea41 4102 	orr.w	r1, r1, r2, lsl #16
+ 800988c:	4577      	cmp	r7, lr
+ 800988e:	ea4f 4c12 	mov.w	ip, r2, lsr #16
+ 8009892:	f849 1b04 	str.w	r1, [r9], #4
+ 8009896:	d8e3      	bhi.n	8009860 <__multiply+0xb0>
+ 8009898:	9a01      	ldr	r2, [sp, #4]
+ 800989a:	f845 c002 	str.w	ip, [r5, r2]
+ 800989e:	9a03      	ldr	r2, [sp, #12]
+ 80098a0:	3304      	adds	r3, #4
+ 80098a2:	f8b2 9002 	ldrh.w	r9, [r2, #2]
+ 80098a6:	f1b9 0f00 	cmp.w	r9, #0
+ 80098aa:	d021      	beq.n	80098f0 <__multiply+0x140>
+ 80098ac:	46ae      	mov	lr, r5
+ 80098ae:	f04f 0a00 	mov.w	sl, #0
+ 80098b2:	6829      	ldr	r1, [r5, #0]
+ 80098b4:	f104 0c14 	add.w	ip, r4, #20
+ 80098b8:	f8bc b000 	ldrh.w	fp, [ip]
+ 80098bc:	f8be 2002 	ldrh.w	r2, [lr, #2]
+ 80098c0:	b289      	uxth	r1, r1
+ 80098c2:	fb09 220b 	mla	r2, r9, fp, r2
+ 80098c6:	4452      	add	r2, sl
+ 80098c8:	ea41 4102 	orr.w	r1, r1, r2, lsl #16
+ 80098cc:	f84e 1b04 	str.w	r1, [lr], #4
+ 80098d0:	f85c 1b04 	ldr.w	r1, [ip], #4
+ 80098d4:	ea4f 4a11 	mov.w	sl, r1, lsr #16
+ 80098d8:	f8be 1000 	ldrh.w	r1, [lr]
+ 80098dc:	4567      	cmp	r7, ip
+ 80098de:	fb09 110a 	mla	r1, r9, sl, r1
+ 80098e2:	eb01 4112 	add.w	r1, r1, r2, lsr #16
+ 80098e6:	ea4f 4a11 	mov.w	sl, r1, lsr #16
+ 80098ea:	d8e5      	bhi.n	80098b8 <__multiply+0x108>
+ 80098ec:	9a01      	ldr	r2, [sp, #4]
+ 80098ee:	50a9      	str	r1, [r5, r2]
+ 80098f0:	3504      	adds	r5, #4
+ 80098f2:	e79a      	b.n	800982a <__multiply+0x7a>
+ 80098f4:	3e01      	subs	r6, #1
+ 80098f6:	e79c      	b.n	8009832 <__multiply+0x82>
+ 80098f8:	0800b2f2 	.word	0x0800b2f2
+ 80098fc:	0800b303 	.word	0x0800b303
 
-08009586 <__retarget_lock_acquire_recursive>:
- 8009586:	4770      	bx	lr
+08009900 <__pow5mult>:
+ 8009900:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
+ 8009904:	4615      	mov	r5, r2
+ 8009906:	f012 0203 	ands.w	r2, r2, #3
+ 800990a:	4606      	mov	r6, r0
+ 800990c:	460f      	mov	r7, r1
+ 800990e:	d007      	beq.n	8009920 <__pow5mult+0x20>
+ 8009910:	4c25      	ldr	r4, [pc, #148]	; (80099a8 <__pow5mult+0xa8>)
+ 8009912:	3a01      	subs	r2, #1
+ 8009914:	2300      	movs	r3, #0
+ 8009916:	f854 2022 	ldr.w	r2, [r4, r2, lsl #2]
+ 800991a:	f7ff fe9f 	bl	800965c <__multadd>
+ 800991e:	4607      	mov	r7, r0
+ 8009920:	10ad      	asrs	r5, r5, #2
+ 8009922:	d03d      	beq.n	80099a0 <__pow5mult+0xa0>
+ 8009924:	69f4      	ldr	r4, [r6, #28]
+ 8009926:	b97c      	cbnz	r4, 8009948 <__pow5mult+0x48>
+ 8009928:	2010      	movs	r0, #16
+ 800992a:	f7fe f80d 	bl	8007948 <malloc>
+ 800992e:	4602      	mov	r2, r0
+ 8009930:	61f0      	str	r0, [r6, #28]
+ 8009932:	b928      	cbnz	r0, 8009940 <__pow5mult+0x40>
+ 8009934:	f240 11b3 	movw	r1, #435	; 0x1b3
+ 8009938:	4b1c      	ldr	r3, [pc, #112]	; (80099ac <__pow5mult+0xac>)
+ 800993a:	481d      	ldr	r0, [pc, #116]	; (80099b0 <__pow5mult+0xb0>)
+ 800993c:	f000 fd94 	bl	800a468 <__assert_func>
+ 8009940:	e9c0 4401 	strd	r4, r4, [r0, #4]
+ 8009944:	6004      	str	r4, [r0, #0]
+ 8009946:	60c4      	str	r4, [r0, #12]
+ 8009948:	f8d6 801c 	ldr.w	r8, [r6, #28]
+ 800994c:	f8d8 4008 	ldr.w	r4, [r8, #8]
+ 8009950:	b94c      	cbnz	r4, 8009966 <__pow5mult+0x66>
+ 8009952:	f240 2171 	movw	r1, #625	; 0x271
+ 8009956:	4630      	mov	r0, r6
+ 8009958:	f7ff ff14 	bl	8009784 <__i2b>
+ 800995c:	2300      	movs	r3, #0
+ 800995e:	4604      	mov	r4, r0
+ 8009960:	f8c8 0008 	str.w	r0, [r8, #8]
+ 8009964:	6003      	str	r3, [r0, #0]
+ 8009966:	f04f 0900 	mov.w	r9, #0
+ 800996a:	07eb      	lsls	r3, r5, #31
+ 800996c:	d50a      	bpl.n	8009984 <__pow5mult+0x84>
+ 800996e:	4639      	mov	r1, r7
+ 8009970:	4622      	mov	r2, r4
+ 8009972:	4630      	mov	r0, r6
+ 8009974:	f7ff ff1c 	bl	80097b0 <__multiply>
+ 8009978:	4680      	mov	r8, r0
+ 800997a:	4639      	mov	r1, r7
+ 800997c:	4630      	mov	r0, r6
+ 800997e:	f7ff fe4b 	bl	8009618 <_Bfree>
+ 8009982:	4647      	mov	r7, r8
+ 8009984:	106d      	asrs	r5, r5, #1
+ 8009986:	d00b      	beq.n	80099a0 <__pow5mult+0xa0>
+ 8009988:	6820      	ldr	r0, [r4, #0]
+ 800998a:	b938      	cbnz	r0, 800999c <__pow5mult+0x9c>
+ 800998c:	4622      	mov	r2, r4
+ 800998e:	4621      	mov	r1, r4
+ 8009990:	4630      	mov	r0, r6
+ 8009992:	f7ff ff0d 	bl	80097b0 <__multiply>
+ 8009996:	6020      	str	r0, [r4, #0]
+ 8009998:	f8c0 9000 	str.w	r9, [r0]
+ 800999c:	4604      	mov	r4, r0
+ 800999e:	e7e4      	b.n	800996a <__pow5mult+0x6a>
+ 80099a0:	4638      	mov	r0, r7
+ 80099a2:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
+ 80099a6:	bf00      	nop
+ 80099a8:	0800b450 	.word	0x0800b450
+ 80099ac:	0800b283 	.word	0x0800b283
+ 80099b0:	0800b303 	.word	0x0800b303
 
-08009588 <__retarget_lock_release_recursive>:
- 8009588:	4770      	bx	lr
+080099b4 <__lshift>:
+ 80099b4:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+ 80099b8:	460c      	mov	r4, r1
+ 80099ba:	4607      	mov	r7, r0
+ 80099bc:	4691      	mov	r9, r2
+ 80099be:	6923      	ldr	r3, [r4, #16]
+ 80099c0:	6849      	ldr	r1, [r1, #4]
+ 80099c2:	eb03 1862 	add.w	r8, r3, r2, asr #5
+ 80099c6:	68a3      	ldr	r3, [r4, #8]
+ 80099c8:	ea4f 1a62 	mov.w	sl, r2, asr #5
+ 80099cc:	f108 0601 	add.w	r6, r8, #1
+ 80099d0:	42b3      	cmp	r3, r6
+ 80099d2:	db0b      	blt.n	80099ec <__lshift+0x38>
+ 80099d4:	4638      	mov	r0, r7
+ 80099d6:	f7ff fddf 	bl	8009598 <_Balloc>
+ 80099da:	4605      	mov	r5, r0
+ 80099dc:	b948      	cbnz	r0, 80099f2 <__lshift+0x3e>
+ 80099de:	4602      	mov	r2, r0
+ 80099e0:	f44f 71ef 	mov.w	r1, #478	; 0x1de
+ 80099e4:	4b27      	ldr	r3, [pc, #156]	; (8009a84 <__lshift+0xd0>)
+ 80099e6:	4828      	ldr	r0, [pc, #160]	; (8009a88 <__lshift+0xd4>)
+ 80099e8:	f000 fd3e 	bl	800a468 <__assert_func>
+ 80099ec:	3101      	adds	r1, #1
+ 80099ee:	005b      	lsls	r3, r3, #1
+ 80099f0:	e7ee      	b.n	80099d0 <__lshift+0x1c>
+ 80099f2:	2300      	movs	r3, #0
+ 80099f4:	f100 0114 	add.w	r1, r0, #20
+ 80099f8:	f100 0210 	add.w	r2, r0, #16
+ 80099fc:	4618      	mov	r0, r3
+ 80099fe:	4553      	cmp	r3, sl
+ 8009a00:	db33      	blt.n	8009a6a <__lshift+0xb6>
+ 8009a02:	6920      	ldr	r0, [r4, #16]
+ 8009a04:	ea2a 7aea 	bic.w	sl, sl, sl, asr #31
+ 8009a08:	f104 0314 	add.w	r3, r4, #20
+ 8009a0c:	f019 091f 	ands.w	r9, r9, #31
+ 8009a10:	eb01 018a 	add.w	r1, r1, sl, lsl #2
+ 8009a14:	eb03 0c80 	add.w	ip, r3, r0, lsl #2
+ 8009a18:	d02b      	beq.n	8009a72 <__lshift+0xbe>
+ 8009a1a:	468a      	mov	sl, r1
+ 8009a1c:	2200      	movs	r2, #0
+ 8009a1e:	f1c9 0e20 	rsb	lr, r9, #32
+ 8009a22:	6818      	ldr	r0, [r3, #0]
+ 8009a24:	fa00 f009 	lsl.w	r0, r0, r9
+ 8009a28:	4310      	orrs	r0, r2
+ 8009a2a:	f84a 0b04 	str.w	r0, [sl], #4
+ 8009a2e:	f853 2b04 	ldr.w	r2, [r3], #4
+ 8009a32:	459c      	cmp	ip, r3
+ 8009a34:	fa22 f20e 	lsr.w	r2, r2, lr
+ 8009a38:	d8f3      	bhi.n	8009a22 <__lshift+0x6e>
+ 8009a3a:	ebac 0304 	sub.w	r3, ip, r4
+ 8009a3e:	3b15      	subs	r3, #21
+ 8009a40:	f023 0303 	bic.w	r3, r3, #3
+ 8009a44:	3304      	adds	r3, #4
+ 8009a46:	f104 0015 	add.w	r0, r4, #21
+ 8009a4a:	4584      	cmp	ip, r0
+ 8009a4c:	bf38      	it	cc
+ 8009a4e:	2304      	movcc	r3, #4
+ 8009a50:	50ca      	str	r2, [r1, r3]
+ 8009a52:	b10a      	cbz	r2, 8009a58 <__lshift+0xa4>
+ 8009a54:	f108 0602 	add.w	r6, r8, #2
+ 8009a58:	3e01      	subs	r6, #1
+ 8009a5a:	4638      	mov	r0, r7
+ 8009a5c:	4621      	mov	r1, r4
+ 8009a5e:	612e      	str	r6, [r5, #16]
+ 8009a60:	f7ff fdda 	bl	8009618 <_Bfree>
+ 8009a64:	4628      	mov	r0, r5
+ 8009a66:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 8009a6a:	f842 0f04 	str.w	r0, [r2, #4]!
+ 8009a6e:	3301      	adds	r3, #1
+ 8009a70:	e7c5      	b.n	80099fe <__lshift+0x4a>
+ 8009a72:	3904      	subs	r1, #4
+ 8009a74:	f853 2b04 	ldr.w	r2, [r3], #4
+ 8009a78:	459c      	cmp	ip, r3
+ 8009a7a:	f841 2f04 	str.w	r2, [r1, #4]!
+ 8009a7e:	d8f9      	bhi.n	8009a74 <__lshift+0xc0>
+ 8009a80:	e7ea      	b.n	8009a58 <__lshift+0xa4>
+ 8009a82:	bf00      	nop
+ 8009a84:	0800b2f2 	.word	0x0800b2f2
+ 8009a88:	0800b303 	.word	0x0800b303
 
-0800958a <__swhatbuf_r>:
- 800958a:	b570      	push	{r4, r5, r6, lr}
- 800958c:	460e      	mov	r6, r1
- 800958e:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
- 8009592:	4614      	mov	r4, r2
- 8009594:	2900      	cmp	r1, #0
- 8009596:	461d      	mov	r5, r3
- 8009598:	b096      	sub	sp, #88	; 0x58
- 800959a:	da07      	bge.n	80095ac <__swhatbuf_r+0x22>
- 800959c:	2300      	movs	r3, #0
- 800959e:	602b      	str	r3, [r5, #0]
- 80095a0:	89b3      	ldrh	r3, [r6, #12]
- 80095a2:	061a      	lsls	r2, r3, #24
- 80095a4:	d410      	bmi.n	80095c8 <__swhatbuf_r+0x3e>
- 80095a6:	f44f 6380 	mov.w	r3, #1024	; 0x400
- 80095aa:	e00e      	b.n	80095ca <__swhatbuf_r+0x40>
- 80095ac:	466a      	mov	r2, sp
- 80095ae:	f000 ff53 	bl	800a458 <_fstat_r>
- 80095b2:	2800      	cmp	r0, #0
- 80095b4:	dbf2      	blt.n	800959c <__swhatbuf_r+0x12>
- 80095b6:	9a01      	ldr	r2, [sp, #4]
- 80095b8:	f402 4270 	and.w	r2, r2, #61440	; 0xf000
- 80095bc:	f5a2 5300 	sub.w	r3, r2, #8192	; 0x2000
- 80095c0:	425a      	negs	r2, r3
- 80095c2:	415a      	adcs	r2, r3
- 80095c4:	602a      	str	r2, [r5, #0]
- 80095c6:	e7ee      	b.n	80095a6 <__swhatbuf_r+0x1c>
- 80095c8:	2340      	movs	r3, #64	; 0x40
- 80095ca:	2000      	movs	r0, #0
- 80095cc:	6023      	str	r3, [r4, #0]
- 80095ce:	b016      	add	sp, #88	; 0x58
- 80095d0:	bd70      	pop	{r4, r5, r6, pc}
+08009a8c <__mcmp>:
+ 8009a8c:	4603      	mov	r3, r0
+ 8009a8e:	690a      	ldr	r2, [r1, #16]
+ 8009a90:	6900      	ldr	r0, [r0, #16]
+ 8009a92:	b530      	push	{r4, r5, lr}
+ 8009a94:	1a80      	subs	r0, r0, r2
+ 8009a96:	d10d      	bne.n	8009ab4 <__mcmp+0x28>
+ 8009a98:	3314      	adds	r3, #20
+ 8009a9a:	3114      	adds	r1, #20
+ 8009a9c:	eb03 0482 	add.w	r4, r3, r2, lsl #2
+ 8009aa0:	eb01 0182 	add.w	r1, r1, r2, lsl #2
+ 8009aa4:	f854 5d04 	ldr.w	r5, [r4, #-4]!
+ 8009aa8:	f851 2d04 	ldr.w	r2, [r1, #-4]!
+ 8009aac:	4295      	cmp	r5, r2
+ 8009aae:	d002      	beq.n	8009ab6 <__mcmp+0x2a>
+ 8009ab0:	d304      	bcc.n	8009abc <__mcmp+0x30>
+ 8009ab2:	2001      	movs	r0, #1
+ 8009ab4:	bd30      	pop	{r4, r5, pc}
+ 8009ab6:	42a3      	cmp	r3, r4
+ 8009ab8:	d3f4      	bcc.n	8009aa4 <__mcmp+0x18>
+ 8009aba:	e7fb      	b.n	8009ab4 <__mcmp+0x28>
+ 8009abc:	f04f 30ff 	mov.w	r0, #4294967295
+ 8009ac0:	e7f8      	b.n	8009ab4 <__mcmp+0x28>
 	...
 
-080095d4 <__smakebuf_r>:
- 80095d4:	898b      	ldrh	r3, [r1, #12]
- 80095d6:	b573      	push	{r0, r1, r4, r5, r6, lr}
- 80095d8:	079d      	lsls	r5, r3, #30
- 80095da:	4606      	mov	r6, r0
- 80095dc:	460c      	mov	r4, r1
- 80095de:	d507      	bpl.n	80095f0 <__smakebuf_r+0x1c>
- 80095e0:	f104 0347 	add.w	r3, r4, #71	; 0x47
- 80095e4:	6023      	str	r3, [r4, #0]
- 80095e6:	6123      	str	r3, [r4, #16]
- 80095e8:	2301      	movs	r3, #1
- 80095ea:	6163      	str	r3, [r4, #20]
- 80095ec:	b002      	add	sp, #8
- 80095ee:	bd70      	pop	{r4, r5, r6, pc}
- 80095f0:	466a      	mov	r2, sp
- 80095f2:	ab01      	add	r3, sp, #4
- 80095f4:	f7ff ffc9 	bl	800958a <__swhatbuf_r>
- 80095f8:	9900      	ldr	r1, [sp, #0]
- 80095fa:	4605      	mov	r5, r0
- 80095fc:	4630      	mov	r0, r6
- 80095fe:	f7fe f9dd 	bl	80079bc <_malloc_r>
- 8009602:	b948      	cbnz	r0, 8009618 <__smakebuf_r+0x44>
- 8009604:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
- 8009608:	059a      	lsls	r2, r3, #22
- 800960a:	d4ef      	bmi.n	80095ec <__smakebuf_r+0x18>
- 800960c:	f023 0303 	bic.w	r3, r3, #3
- 8009610:	f043 0302 	orr.w	r3, r3, #2
- 8009614:	81a3      	strh	r3, [r4, #12]
- 8009616:	e7e3      	b.n	80095e0 <__smakebuf_r+0xc>
- 8009618:	4b0d      	ldr	r3, [pc, #52]	; (8009650 <__smakebuf_r+0x7c>)
- 800961a:	62b3      	str	r3, [r6, #40]	; 0x28
- 800961c:	89a3      	ldrh	r3, [r4, #12]
- 800961e:	6020      	str	r0, [r4, #0]
- 8009620:	f043 0380 	orr.w	r3, r3, #128	; 0x80
- 8009624:	81a3      	strh	r3, [r4, #12]
- 8009626:	9b00      	ldr	r3, [sp, #0]
- 8009628:	6120      	str	r0, [r4, #16]
- 800962a:	6163      	str	r3, [r4, #20]
- 800962c:	9b01      	ldr	r3, [sp, #4]
- 800962e:	b15b      	cbz	r3, 8009648 <__smakebuf_r+0x74>
- 8009630:	4630      	mov	r0, r6
- 8009632:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
- 8009636:	f000 ff21 	bl	800a47c <_isatty_r>
- 800963a:	b128      	cbz	r0, 8009648 <__smakebuf_r+0x74>
- 800963c:	89a3      	ldrh	r3, [r4, #12]
- 800963e:	f023 0303 	bic.w	r3, r3, #3
- 8009642:	f043 0301 	orr.w	r3, r3, #1
- 8009646:	81a3      	strh	r3, [r4, #12]
- 8009648:	89a0      	ldrh	r0, [r4, #12]
- 800964a:	4305      	orrs	r5, r0
- 800964c:	81a5      	strh	r5, [r4, #12]
- 800964e:	e7cd      	b.n	80095ec <__smakebuf_r+0x18>
- 8009650:	080093d9 	.word	0x080093d9
+08009ac4 <__mdiff>:
+ 8009ac4:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 8009ac8:	460d      	mov	r5, r1
+ 8009aca:	4607      	mov	r7, r0
+ 8009acc:	4611      	mov	r1, r2
+ 8009ace:	4628      	mov	r0, r5
+ 8009ad0:	4614      	mov	r4, r2
+ 8009ad2:	f7ff ffdb 	bl	8009a8c <__mcmp>
+ 8009ad6:	1e06      	subs	r6, r0, #0
+ 8009ad8:	d111      	bne.n	8009afe <__mdiff+0x3a>
+ 8009ada:	4631      	mov	r1, r6
+ 8009adc:	4638      	mov	r0, r7
+ 8009ade:	f7ff fd5b 	bl	8009598 <_Balloc>
+ 8009ae2:	4602      	mov	r2, r0
+ 8009ae4:	b928      	cbnz	r0, 8009af2 <__mdiff+0x2e>
+ 8009ae6:	f240 2137 	movw	r1, #567	; 0x237
+ 8009aea:	4b3a      	ldr	r3, [pc, #232]	; (8009bd4 <__mdiff+0x110>)
+ 8009aec:	483a      	ldr	r0, [pc, #232]	; (8009bd8 <__mdiff+0x114>)
+ 8009aee:	f000 fcbb 	bl	800a468 <__assert_func>
+ 8009af2:	2301      	movs	r3, #1
+ 8009af4:	e9c0 3604 	strd	r3, r6, [r0, #16]
+ 8009af8:	4610      	mov	r0, r2
+ 8009afa:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
+ 8009afe:	bfa4      	itt	ge
+ 8009b00:	4623      	movge	r3, r4
+ 8009b02:	462c      	movge	r4, r5
+ 8009b04:	4638      	mov	r0, r7
+ 8009b06:	6861      	ldr	r1, [r4, #4]
+ 8009b08:	bfa6      	itte	ge
+ 8009b0a:	461d      	movge	r5, r3
+ 8009b0c:	2600      	movge	r6, #0
+ 8009b0e:	2601      	movlt	r6, #1
+ 8009b10:	f7ff fd42 	bl	8009598 <_Balloc>
+ 8009b14:	4602      	mov	r2, r0
+ 8009b16:	b918      	cbnz	r0, 8009b20 <__mdiff+0x5c>
+ 8009b18:	f240 2145 	movw	r1, #581	; 0x245
+ 8009b1c:	4b2d      	ldr	r3, [pc, #180]	; (8009bd4 <__mdiff+0x110>)
+ 8009b1e:	e7e5      	b.n	8009aec <__mdiff+0x28>
+ 8009b20:	f102 0814 	add.w	r8, r2, #20
+ 8009b24:	46c2      	mov	sl, r8
+ 8009b26:	f04f 0c00 	mov.w	ip, #0
+ 8009b2a:	6927      	ldr	r7, [r4, #16]
+ 8009b2c:	60c6      	str	r6, [r0, #12]
+ 8009b2e:	692e      	ldr	r6, [r5, #16]
+ 8009b30:	f104 0014 	add.w	r0, r4, #20
+ 8009b34:	f105 0914 	add.w	r9, r5, #20
+ 8009b38:	eb00 0e87 	add.w	lr, r0, r7, lsl #2
+ 8009b3c:	eb09 0686 	add.w	r6, r9, r6, lsl #2
+ 8009b40:	3410      	adds	r4, #16
+ 8009b42:	f854 bf04 	ldr.w	fp, [r4, #4]!
+ 8009b46:	f859 3b04 	ldr.w	r3, [r9], #4
+ 8009b4a:	fa1f f18b 	uxth.w	r1, fp
+ 8009b4e:	4461      	add	r1, ip
+ 8009b50:	fa1f fc83 	uxth.w	ip, r3
+ 8009b54:	0c1b      	lsrs	r3, r3, #16
+ 8009b56:	eba1 010c 	sub.w	r1, r1, ip
+ 8009b5a:	ebc3 431b 	rsb	r3, r3, fp, lsr #16
+ 8009b5e:	eb03 4321 	add.w	r3, r3, r1, asr #16
+ 8009b62:	b289      	uxth	r1, r1
+ 8009b64:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
+ 8009b68:	454e      	cmp	r6, r9
+ 8009b6a:	ea4f 4c23 	mov.w	ip, r3, asr #16
+ 8009b6e:	f84a 1b04 	str.w	r1, [sl], #4
+ 8009b72:	d8e6      	bhi.n	8009b42 <__mdiff+0x7e>
+ 8009b74:	1b73      	subs	r3, r6, r5
+ 8009b76:	3b15      	subs	r3, #21
+ 8009b78:	f023 0303 	bic.w	r3, r3, #3
+ 8009b7c:	3515      	adds	r5, #21
+ 8009b7e:	3304      	adds	r3, #4
+ 8009b80:	42ae      	cmp	r6, r5
+ 8009b82:	bf38      	it	cc
+ 8009b84:	2304      	movcc	r3, #4
+ 8009b86:	4418      	add	r0, r3
+ 8009b88:	4443      	add	r3, r8
+ 8009b8a:	461e      	mov	r6, r3
+ 8009b8c:	4605      	mov	r5, r0
+ 8009b8e:	4575      	cmp	r5, lr
+ 8009b90:	d30e      	bcc.n	8009bb0 <__mdiff+0xec>
+ 8009b92:	f10e 0103 	add.w	r1, lr, #3
+ 8009b96:	1a09      	subs	r1, r1, r0
+ 8009b98:	f021 0103 	bic.w	r1, r1, #3
+ 8009b9c:	3803      	subs	r0, #3
+ 8009b9e:	4586      	cmp	lr, r0
+ 8009ba0:	bf38      	it	cc
+ 8009ba2:	2100      	movcc	r1, #0
+ 8009ba4:	440b      	add	r3, r1
+ 8009ba6:	f853 1d04 	ldr.w	r1, [r3, #-4]!
+ 8009baa:	b189      	cbz	r1, 8009bd0 <__mdiff+0x10c>
+ 8009bac:	6117      	str	r7, [r2, #16]
+ 8009bae:	e7a3      	b.n	8009af8 <__mdiff+0x34>
+ 8009bb0:	f855 8b04 	ldr.w	r8, [r5], #4
+ 8009bb4:	fa1f f188 	uxth.w	r1, r8
+ 8009bb8:	4461      	add	r1, ip
+ 8009bba:	140c      	asrs	r4, r1, #16
+ 8009bbc:	eb04 4418 	add.w	r4, r4, r8, lsr #16
+ 8009bc0:	b289      	uxth	r1, r1
+ 8009bc2:	ea41 4104 	orr.w	r1, r1, r4, lsl #16
+ 8009bc6:	ea4f 4c24 	mov.w	ip, r4, asr #16
+ 8009bca:	f846 1b04 	str.w	r1, [r6], #4
+ 8009bce:	e7de      	b.n	8009b8e <__mdiff+0xca>
+ 8009bd0:	3f01      	subs	r7, #1
+ 8009bd2:	e7e8      	b.n	8009ba6 <__mdiff+0xe2>
+ 8009bd4:	0800b2f2 	.word	0x0800b2f2
+ 8009bd8:	0800b303 	.word	0x0800b303
 
-08009654 <memchr>:
- 8009654:	4603      	mov	r3, r0
- 8009656:	b510      	push	{r4, lr}
- 8009658:	b2c9      	uxtb	r1, r1
- 800965a:	4402      	add	r2, r0
- 800965c:	4293      	cmp	r3, r2
- 800965e:	4618      	mov	r0, r3
- 8009660:	d101      	bne.n	8009666 <memchr+0x12>
- 8009662:	2000      	movs	r0, #0
- 8009664:	e003      	b.n	800966e <memchr+0x1a>
- 8009666:	7804      	ldrb	r4, [r0, #0]
- 8009668:	3301      	adds	r3, #1
- 800966a:	428c      	cmp	r4, r1
- 800966c:	d1f6      	bne.n	800965c <memchr+0x8>
- 800966e:	bd10      	pop	{r4, pc}
-
-08009670 <memcpy>:
- 8009670:	440a      	add	r2, r1
- 8009672:	4291      	cmp	r1, r2
- 8009674:	f100 33ff 	add.w	r3, r0, #4294967295
- 8009678:	d100      	bne.n	800967c <memcpy+0xc>
- 800967a:	4770      	bx	lr
- 800967c:	b510      	push	{r4, lr}
- 800967e:	f811 4b01 	ldrb.w	r4, [r1], #1
- 8009682:	4291      	cmp	r1, r2
- 8009684:	f803 4f01 	strb.w	r4, [r3, #1]!
- 8009688:	d1f9      	bne.n	800967e <memcpy+0xe>
- 800968a:	bd10      	pop	{r4, pc}
-
-0800968c <__malloc_lock>:
- 800968c:	4801      	ldr	r0, [pc, #4]	; (8009694 <__malloc_lock+0x8>)
- 800968e:	f7ff bf7a 	b.w	8009586 <__retarget_lock_acquire_recursive>
- 8009692:	bf00      	nop
- 8009694:	2000261a 	.word	0x2000261a
-
-08009698 <__malloc_unlock>:
- 8009698:	4801      	ldr	r0, [pc, #4]	; (80096a0 <__malloc_unlock+0x8>)
- 800969a:	f7ff bf75 	b.w	8009588 <__retarget_lock_release_recursive>
- 800969e:	bf00      	nop
- 80096a0:	2000261a 	.word	0x2000261a
-
-080096a4 <_Balloc>:
- 80096a4:	b570      	push	{r4, r5, r6, lr}
- 80096a6:	6a46      	ldr	r6, [r0, #36]	; 0x24
- 80096a8:	4604      	mov	r4, r0
- 80096aa:	460d      	mov	r5, r1
- 80096ac:	b976      	cbnz	r6, 80096cc <_Balloc+0x28>
- 80096ae:	2010      	movs	r0, #16
- 80096b0:	f7fe f920 	bl	80078f4 <malloc>
- 80096b4:	4602      	mov	r2, r0
- 80096b6:	6260      	str	r0, [r4, #36]	; 0x24
- 80096b8:	b920      	cbnz	r0, 80096c4 <_Balloc+0x20>
- 80096ba:	2166      	movs	r1, #102	; 0x66
- 80096bc:	4b17      	ldr	r3, [pc, #92]	; (800971c <_Balloc+0x78>)
- 80096be:	4818      	ldr	r0, [pc, #96]	; (8009720 <_Balloc+0x7c>)
- 80096c0:	f000 fe8a 	bl	800a3d8 <__assert_func>
- 80096c4:	e9c0 6601 	strd	r6, r6, [r0, #4]
- 80096c8:	6006      	str	r6, [r0, #0]
- 80096ca:	60c6      	str	r6, [r0, #12]
- 80096cc:	6a66      	ldr	r6, [r4, #36]	; 0x24
- 80096ce:	68f3      	ldr	r3, [r6, #12]
- 80096d0:	b183      	cbz	r3, 80096f4 <_Balloc+0x50>
- 80096d2:	6a63      	ldr	r3, [r4, #36]	; 0x24
- 80096d4:	68db      	ldr	r3, [r3, #12]
- 80096d6:	f853 0025 	ldr.w	r0, [r3, r5, lsl #2]
- 80096da:	b9b8      	cbnz	r0, 800970c <_Balloc+0x68>
- 80096dc:	2101      	movs	r1, #1
- 80096de:	fa01 f605 	lsl.w	r6, r1, r5
- 80096e2:	1d72      	adds	r2, r6, #5
- 80096e4:	4620      	mov	r0, r4
- 80096e6:	0092      	lsls	r2, r2, #2
- 80096e8:	f000 fb5e 	bl	8009da8 <_calloc_r>
- 80096ec:	b160      	cbz	r0, 8009708 <_Balloc+0x64>
- 80096ee:	e9c0 5601 	strd	r5, r6, [r0, #4]
- 80096f2:	e00e      	b.n	8009712 <_Balloc+0x6e>
- 80096f4:	2221      	movs	r2, #33	; 0x21
- 80096f6:	2104      	movs	r1, #4
- 80096f8:	4620      	mov	r0, r4
- 80096fa:	f000 fb55 	bl	8009da8 <_calloc_r>
- 80096fe:	6a63      	ldr	r3, [r4, #36]	; 0x24
- 8009700:	60f0      	str	r0, [r6, #12]
- 8009702:	68db      	ldr	r3, [r3, #12]
- 8009704:	2b00      	cmp	r3, #0
- 8009706:	d1e4      	bne.n	80096d2 <_Balloc+0x2e>
- 8009708:	2000      	movs	r0, #0
- 800970a:	bd70      	pop	{r4, r5, r6, pc}
- 800970c:	6802      	ldr	r2, [r0, #0]
- 800970e:	f843 2025 	str.w	r2, [r3, r5, lsl #2]
- 8009712:	2300      	movs	r3, #0
- 8009714:	e9c0 3303 	strd	r3, r3, [r0, #12]
- 8009718:	e7f7      	b.n	800970a <_Balloc+0x66>
- 800971a:	bf00      	nop
- 800971c:	0800b299 	.word	0x0800b299
- 8009720:	0800b380 	.word	0x0800b380
-
-08009724 <_Bfree>:
- 8009724:	b570      	push	{r4, r5, r6, lr}
- 8009726:	6a46      	ldr	r6, [r0, #36]	; 0x24
- 8009728:	4605      	mov	r5, r0
- 800972a:	460c      	mov	r4, r1
- 800972c:	b976      	cbnz	r6, 800974c <_Bfree+0x28>
- 800972e:	2010      	movs	r0, #16
- 8009730:	f7fe f8e0 	bl	80078f4 <malloc>
- 8009734:	4602      	mov	r2, r0
- 8009736:	6268      	str	r0, [r5, #36]	; 0x24
- 8009738:	b920      	cbnz	r0, 8009744 <_Bfree+0x20>
- 800973a:	218a      	movs	r1, #138	; 0x8a
- 800973c:	4b08      	ldr	r3, [pc, #32]	; (8009760 <_Bfree+0x3c>)
- 800973e:	4809      	ldr	r0, [pc, #36]	; (8009764 <_Bfree+0x40>)
- 8009740:	f000 fe4a 	bl	800a3d8 <__assert_func>
- 8009744:	e9c0 6601 	strd	r6, r6, [r0, #4]
- 8009748:	6006      	str	r6, [r0, #0]
- 800974a:	60c6      	str	r6, [r0, #12]
- 800974c:	b13c      	cbz	r4, 800975e <_Bfree+0x3a>
- 800974e:	6a6b      	ldr	r3, [r5, #36]	; 0x24
- 8009750:	6862      	ldr	r2, [r4, #4]
- 8009752:	68db      	ldr	r3, [r3, #12]
- 8009754:	f853 1022 	ldr.w	r1, [r3, r2, lsl #2]
- 8009758:	6021      	str	r1, [r4, #0]
- 800975a:	f843 4022 	str.w	r4, [r3, r2, lsl #2]
- 800975e:	bd70      	pop	{r4, r5, r6, pc}
- 8009760:	0800b299 	.word	0x0800b299
- 8009764:	0800b380 	.word	0x0800b380
-
-08009768 <__multadd>:
- 8009768:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
- 800976c:	4698      	mov	r8, r3
- 800976e:	460c      	mov	r4, r1
- 8009770:	2300      	movs	r3, #0
- 8009772:	690e      	ldr	r6, [r1, #16]
- 8009774:	4607      	mov	r7, r0
- 8009776:	f101 0014 	add.w	r0, r1, #20
- 800977a:	6805      	ldr	r5, [r0, #0]
- 800977c:	3301      	adds	r3, #1
- 800977e:	b2a9      	uxth	r1, r5
- 8009780:	fb02 8101 	mla	r1, r2, r1, r8
- 8009784:	0c2d      	lsrs	r5, r5, #16
- 8009786:	ea4f 4c11 	mov.w	ip, r1, lsr #16
- 800978a:	fb02 c505 	mla	r5, r2, r5, ip
- 800978e:	b289      	uxth	r1, r1
- 8009790:	eb01 4105 	add.w	r1, r1, r5, lsl #16
- 8009794:	429e      	cmp	r6, r3
- 8009796:	ea4f 4815 	mov.w	r8, r5, lsr #16
- 800979a:	f840 1b04 	str.w	r1, [r0], #4
- 800979e:	dcec      	bgt.n	800977a <__multadd+0x12>
- 80097a0:	f1b8 0f00 	cmp.w	r8, #0
- 80097a4:	d022      	beq.n	80097ec <__multadd+0x84>
- 80097a6:	68a3      	ldr	r3, [r4, #8]
- 80097a8:	42b3      	cmp	r3, r6
- 80097aa:	dc19      	bgt.n	80097e0 <__multadd+0x78>
- 80097ac:	6861      	ldr	r1, [r4, #4]
- 80097ae:	4638      	mov	r0, r7
- 80097b0:	3101      	adds	r1, #1
- 80097b2:	f7ff ff77 	bl	80096a4 <_Balloc>
- 80097b6:	4605      	mov	r5, r0
- 80097b8:	b928      	cbnz	r0, 80097c6 <__multadd+0x5e>
- 80097ba:	4602      	mov	r2, r0
- 80097bc:	21b5      	movs	r1, #181	; 0xb5
- 80097be:	4b0d      	ldr	r3, [pc, #52]	; (80097f4 <__multadd+0x8c>)
- 80097c0:	480d      	ldr	r0, [pc, #52]	; (80097f8 <__multadd+0x90>)
- 80097c2:	f000 fe09 	bl	800a3d8 <__assert_func>
- 80097c6:	6922      	ldr	r2, [r4, #16]
- 80097c8:	f104 010c 	add.w	r1, r4, #12
- 80097cc:	3202      	adds	r2, #2
- 80097ce:	0092      	lsls	r2, r2, #2
- 80097d0:	300c      	adds	r0, #12
- 80097d2:	f7ff ff4d 	bl	8009670 <memcpy>
- 80097d6:	4621      	mov	r1, r4
- 80097d8:	4638      	mov	r0, r7
- 80097da:	f7ff ffa3 	bl	8009724 <_Bfree>
- 80097de:	462c      	mov	r4, r5
- 80097e0:	eb04 0386 	add.w	r3, r4, r6, lsl #2
- 80097e4:	3601      	adds	r6, #1
- 80097e6:	f8c3 8014 	str.w	r8, [r3, #20]
- 80097ea:	6126      	str	r6, [r4, #16]
- 80097ec:	4620      	mov	r0, r4
- 80097ee:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
- 80097f2:	bf00      	nop
- 80097f4:	0800b30f 	.word	0x0800b30f
- 80097f8:	0800b380 	.word	0x0800b380
-
-080097fc <__hi0bits>:
- 80097fc:	0c02      	lsrs	r2, r0, #16
- 80097fe:	0412      	lsls	r2, r2, #16
- 8009800:	4603      	mov	r3, r0
- 8009802:	b9ca      	cbnz	r2, 8009838 <__hi0bits+0x3c>
- 8009804:	0403      	lsls	r3, r0, #16
- 8009806:	2010      	movs	r0, #16
- 8009808:	f013 4f7f 	tst.w	r3, #4278190080	; 0xff000000
- 800980c:	bf04      	itt	eq
- 800980e:	021b      	lsleq	r3, r3, #8
- 8009810:	3008      	addeq	r0, #8
- 8009812:	f013 4f70 	tst.w	r3, #4026531840	; 0xf0000000
- 8009816:	bf04      	itt	eq
- 8009818:	011b      	lsleq	r3, r3, #4
- 800981a:	3004      	addeq	r0, #4
- 800981c:	f013 4f40 	tst.w	r3, #3221225472	; 0xc0000000
- 8009820:	bf04      	itt	eq
- 8009822:	009b      	lsleq	r3, r3, #2
- 8009824:	3002      	addeq	r0, #2
- 8009826:	2b00      	cmp	r3, #0
- 8009828:	db05      	blt.n	8009836 <__hi0bits+0x3a>
- 800982a:	f013 4f80 	tst.w	r3, #1073741824	; 0x40000000
- 800982e:	f100 0001 	add.w	r0, r0, #1
- 8009832:	bf08      	it	eq
- 8009834:	2020      	moveq	r0, #32
- 8009836:	4770      	bx	lr
- 8009838:	2000      	movs	r0, #0
- 800983a:	e7e5      	b.n	8009808 <__hi0bits+0xc>
-
-0800983c <__lo0bits>:
- 800983c:	6803      	ldr	r3, [r0, #0]
- 800983e:	4602      	mov	r2, r0
- 8009840:	f013 0007 	ands.w	r0, r3, #7
- 8009844:	d00b      	beq.n	800985e <__lo0bits+0x22>
- 8009846:	07d9      	lsls	r1, r3, #31
- 8009848:	d422      	bmi.n	8009890 <__lo0bits+0x54>
- 800984a:	0798      	lsls	r0, r3, #30
- 800984c:	bf49      	itett	mi
- 800984e:	085b      	lsrmi	r3, r3, #1
- 8009850:	089b      	lsrpl	r3, r3, #2
- 8009852:	2001      	movmi	r0, #1
- 8009854:	6013      	strmi	r3, [r2, #0]
- 8009856:	bf5c      	itt	pl
- 8009858:	2002      	movpl	r0, #2
- 800985a:	6013      	strpl	r3, [r2, #0]
- 800985c:	4770      	bx	lr
- 800985e:	b299      	uxth	r1, r3
- 8009860:	b909      	cbnz	r1, 8009866 <__lo0bits+0x2a>
- 8009862:	2010      	movs	r0, #16
- 8009864:	0c1b      	lsrs	r3, r3, #16
- 8009866:	f013 0fff 	tst.w	r3, #255	; 0xff
- 800986a:	bf04      	itt	eq
- 800986c:	0a1b      	lsreq	r3, r3, #8
- 800986e:	3008      	addeq	r0, #8
- 8009870:	0719      	lsls	r1, r3, #28
- 8009872:	bf04      	itt	eq
- 8009874:	091b      	lsreq	r3, r3, #4
- 8009876:	3004      	addeq	r0, #4
- 8009878:	0799      	lsls	r1, r3, #30
- 800987a:	bf04      	itt	eq
- 800987c:	089b      	lsreq	r3, r3, #2
- 800987e:	3002      	addeq	r0, #2
- 8009880:	07d9      	lsls	r1, r3, #31
- 8009882:	d403      	bmi.n	800988c <__lo0bits+0x50>
- 8009884:	085b      	lsrs	r3, r3, #1
- 8009886:	f100 0001 	add.w	r0, r0, #1
- 800988a:	d003      	beq.n	8009894 <__lo0bits+0x58>
- 800988c:	6013      	str	r3, [r2, #0]
- 800988e:	4770      	bx	lr
- 8009890:	2000      	movs	r0, #0
- 8009892:	4770      	bx	lr
- 8009894:	2020      	movs	r0, #32
- 8009896:	4770      	bx	lr
-
-08009898 <__i2b>:
- 8009898:	b510      	push	{r4, lr}
- 800989a:	460c      	mov	r4, r1
- 800989c:	2101      	movs	r1, #1
- 800989e:	f7ff ff01 	bl	80096a4 <_Balloc>
- 80098a2:	4602      	mov	r2, r0
- 80098a4:	b928      	cbnz	r0, 80098b2 <__i2b+0x1a>
- 80098a6:	f44f 71a0 	mov.w	r1, #320	; 0x140
- 80098aa:	4b04      	ldr	r3, [pc, #16]	; (80098bc <__i2b+0x24>)
- 80098ac:	4804      	ldr	r0, [pc, #16]	; (80098c0 <__i2b+0x28>)
- 80098ae:	f000 fd93 	bl	800a3d8 <__assert_func>
- 80098b2:	2301      	movs	r3, #1
- 80098b4:	6144      	str	r4, [r0, #20]
- 80098b6:	6103      	str	r3, [r0, #16]
- 80098b8:	bd10      	pop	{r4, pc}
- 80098ba:	bf00      	nop
- 80098bc:	0800b30f 	.word	0x0800b30f
- 80098c0:	0800b380 	.word	0x0800b380
-
-080098c4 <__multiply>:
- 80098c4:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 80098c8:	4614      	mov	r4, r2
- 80098ca:	690a      	ldr	r2, [r1, #16]
- 80098cc:	6923      	ldr	r3, [r4, #16]
- 80098ce:	460d      	mov	r5, r1
- 80098d0:	429a      	cmp	r2, r3
- 80098d2:	bfbe      	ittt	lt
- 80098d4:	460b      	movlt	r3, r1
- 80098d6:	4625      	movlt	r5, r4
- 80098d8:	461c      	movlt	r4, r3
- 80098da:	f8d5 a010 	ldr.w	sl, [r5, #16]
- 80098de:	f8d4 9010 	ldr.w	r9, [r4, #16]
- 80098e2:	68ab      	ldr	r3, [r5, #8]
- 80098e4:	6869      	ldr	r1, [r5, #4]
- 80098e6:	eb0a 0709 	add.w	r7, sl, r9
- 80098ea:	42bb      	cmp	r3, r7
- 80098ec:	b085      	sub	sp, #20
- 80098ee:	bfb8      	it	lt
- 80098f0:	3101      	addlt	r1, #1
- 80098f2:	f7ff fed7 	bl	80096a4 <_Balloc>
- 80098f6:	b930      	cbnz	r0, 8009906 <__multiply+0x42>
- 80098f8:	4602      	mov	r2, r0
- 80098fa:	f240 115d 	movw	r1, #349	; 0x15d
- 80098fe:	4b41      	ldr	r3, [pc, #260]	; (8009a04 <__multiply+0x140>)
- 8009900:	4841      	ldr	r0, [pc, #260]	; (8009a08 <__multiply+0x144>)
- 8009902:	f000 fd69 	bl	800a3d8 <__assert_func>
- 8009906:	f100 0614 	add.w	r6, r0, #20
- 800990a:	4633      	mov	r3, r6
- 800990c:	2200      	movs	r2, #0
- 800990e:	eb06 0887 	add.w	r8, r6, r7, lsl #2
- 8009912:	4543      	cmp	r3, r8
- 8009914:	d31e      	bcc.n	8009954 <__multiply+0x90>
- 8009916:	f105 0c14 	add.w	ip, r5, #20
- 800991a:	f104 0314 	add.w	r3, r4, #20
- 800991e:	eb0c 0c8a 	add.w	ip, ip, sl, lsl #2
- 8009922:	eb03 0289 	add.w	r2, r3, r9, lsl #2
- 8009926:	9202      	str	r2, [sp, #8]
- 8009928:	ebac 0205 	sub.w	r2, ip, r5
- 800992c:	3a15      	subs	r2, #21
- 800992e:	f022 0203 	bic.w	r2, r2, #3
- 8009932:	3204      	adds	r2, #4
- 8009934:	f105 0115 	add.w	r1, r5, #21
- 8009938:	458c      	cmp	ip, r1
- 800993a:	bf38      	it	cc
- 800993c:	2204      	movcc	r2, #4
- 800993e:	9201      	str	r2, [sp, #4]
- 8009940:	9a02      	ldr	r2, [sp, #8]
- 8009942:	9303      	str	r3, [sp, #12]
- 8009944:	429a      	cmp	r2, r3
- 8009946:	d808      	bhi.n	800995a <__multiply+0x96>
- 8009948:	2f00      	cmp	r7, #0
- 800994a:	dc55      	bgt.n	80099f8 <__multiply+0x134>
- 800994c:	6107      	str	r7, [r0, #16]
- 800994e:	b005      	add	sp, #20
- 8009950:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8009954:	f843 2b04 	str.w	r2, [r3], #4
- 8009958:	e7db      	b.n	8009912 <__multiply+0x4e>
- 800995a:	f8b3 a000 	ldrh.w	sl, [r3]
- 800995e:	f1ba 0f00 	cmp.w	sl, #0
- 8009962:	d020      	beq.n	80099a6 <__multiply+0xe2>
- 8009964:	46b1      	mov	r9, r6
- 8009966:	2200      	movs	r2, #0
- 8009968:	f105 0e14 	add.w	lr, r5, #20
- 800996c:	f85e 4b04 	ldr.w	r4, [lr], #4
- 8009970:	f8d9 b000 	ldr.w	fp, [r9]
- 8009974:	b2a1      	uxth	r1, r4
- 8009976:	fa1f fb8b 	uxth.w	fp, fp
- 800997a:	fb0a b101 	mla	r1, sl, r1, fp
- 800997e:	4411      	add	r1, r2
- 8009980:	f8d9 2000 	ldr.w	r2, [r9]
- 8009984:	0c24      	lsrs	r4, r4, #16
- 8009986:	0c12      	lsrs	r2, r2, #16
- 8009988:	fb0a 2404 	mla	r4, sl, r4, r2
- 800998c:	eb04 4411 	add.w	r4, r4, r1, lsr #16
- 8009990:	b289      	uxth	r1, r1
- 8009992:	ea41 4104 	orr.w	r1, r1, r4, lsl #16
- 8009996:	45f4      	cmp	ip, lr
- 8009998:	ea4f 4214 	mov.w	r2, r4, lsr #16
- 800999c:	f849 1b04 	str.w	r1, [r9], #4
- 80099a0:	d8e4      	bhi.n	800996c <__multiply+0xa8>
- 80099a2:	9901      	ldr	r1, [sp, #4]
- 80099a4:	5072      	str	r2, [r6, r1]
- 80099a6:	9a03      	ldr	r2, [sp, #12]
- 80099a8:	3304      	adds	r3, #4
- 80099aa:	f8b2 9002 	ldrh.w	r9, [r2, #2]
- 80099ae:	f1b9 0f00 	cmp.w	r9, #0
- 80099b2:	d01f      	beq.n	80099f4 <__multiply+0x130>
- 80099b4:	46b6      	mov	lr, r6
- 80099b6:	f04f 0a00 	mov.w	sl, #0
- 80099ba:	6834      	ldr	r4, [r6, #0]
- 80099bc:	f105 0114 	add.w	r1, r5, #20
- 80099c0:	880a      	ldrh	r2, [r1, #0]
- 80099c2:	f8be b002 	ldrh.w	fp, [lr, #2]
- 80099c6:	b2a4      	uxth	r4, r4
- 80099c8:	fb09 b202 	mla	r2, r9, r2, fp
- 80099cc:	4492      	add	sl, r2
- 80099ce:	ea44 440a 	orr.w	r4, r4, sl, lsl #16
- 80099d2:	f84e 4b04 	str.w	r4, [lr], #4
- 80099d6:	f851 4b04 	ldr.w	r4, [r1], #4
- 80099da:	f8be 2000 	ldrh.w	r2, [lr]
- 80099de:	0c24      	lsrs	r4, r4, #16
- 80099e0:	fb09 2404 	mla	r4, r9, r4, r2
- 80099e4:	458c      	cmp	ip, r1
- 80099e6:	eb04 441a 	add.w	r4, r4, sl, lsr #16
- 80099ea:	ea4f 4a14 	mov.w	sl, r4, lsr #16
- 80099ee:	d8e7      	bhi.n	80099c0 <__multiply+0xfc>
- 80099f0:	9a01      	ldr	r2, [sp, #4]
- 80099f2:	50b4      	str	r4, [r6, r2]
- 80099f4:	3604      	adds	r6, #4
- 80099f6:	e7a3      	b.n	8009940 <__multiply+0x7c>
- 80099f8:	f858 3d04 	ldr.w	r3, [r8, #-4]!
- 80099fc:	2b00      	cmp	r3, #0
- 80099fe:	d1a5      	bne.n	800994c <__multiply+0x88>
- 8009a00:	3f01      	subs	r7, #1
- 8009a02:	e7a1      	b.n	8009948 <__multiply+0x84>
- 8009a04:	0800b30f 	.word	0x0800b30f
- 8009a08:	0800b380 	.word	0x0800b380
-
-08009a0c <__pow5mult>:
- 8009a0c:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
- 8009a10:	4615      	mov	r5, r2
- 8009a12:	f012 0203 	ands.w	r2, r2, #3
- 8009a16:	4606      	mov	r6, r0
- 8009a18:	460f      	mov	r7, r1
- 8009a1a:	d007      	beq.n	8009a2c <__pow5mult+0x20>
- 8009a1c:	4c25      	ldr	r4, [pc, #148]	; (8009ab4 <__pow5mult+0xa8>)
- 8009a1e:	3a01      	subs	r2, #1
- 8009a20:	2300      	movs	r3, #0
- 8009a22:	f854 2022 	ldr.w	r2, [r4, r2, lsl #2]
- 8009a26:	f7ff fe9f 	bl	8009768 <__multadd>
- 8009a2a:	4607      	mov	r7, r0
- 8009a2c:	10ad      	asrs	r5, r5, #2
- 8009a2e:	d03d      	beq.n	8009aac <__pow5mult+0xa0>
- 8009a30:	6a74      	ldr	r4, [r6, #36]	; 0x24
- 8009a32:	b97c      	cbnz	r4, 8009a54 <__pow5mult+0x48>
- 8009a34:	2010      	movs	r0, #16
- 8009a36:	f7fd ff5d 	bl	80078f4 <malloc>
- 8009a3a:	4602      	mov	r2, r0
- 8009a3c:	6270      	str	r0, [r6, #36]	; 0x24
- 8009a3e:	b928      	cbnz	r0, 8009a4c <__pow5mult+0x40>
- 8009a40:	f44f 71d7 	mov.w	r1, #430	; 0x1ae
- 8009a44:	4b1c      	ldr	r3, [pc, #112]	; (8009ab8 <__pow5mult+0xac>)
- 8009a46:	481d      	ldr	r0, [pc, #116]	; (8009abc <__pow5mult+0xb0>)
- 8009a48:	f000 fcc6 	bl	800a3d8 <__assert_func>
- 8009a4c:	e9c0 4401 	strd	r4, r4, [r0, #4]
- 8009a50:	6004      	str	r4, [r0, #0]
- 8009a52:	60c4      	str	r4, [r0, #12]
- 8009a54:	f8d6 8024 	ldr.w	r8, [r6, #36]	; 0x24
- 8009a58:	f8d8 4008 	ldr.w	r4, [r8, #8]
- 8009a5c:	b94c      	cbnz	r4, 8009a72 <__pow5mult+0x66>
- 8009a5e:	f240 2171 	movw	r1, #625	; 0x271
- 8009a62:	4630      	mov	r0, r6
- 8009a64:	f7ff ff18 	bl	8009898 <__i2b>
- 8009a68:	2300      	movs	r3, #0
- 8009a6a:	4604      	mov	r4, r0
- 8009a6c:	f8c8 0008 	str.w	r0, [r8, #8]
- 8009a70:	6003      	str	r3, [r0, #0]
- 8009a72:	f04f 0900 	mov.w	r9, #0
- 8009a76:	07eb      	lsls	r3, r5, #31
- 8009a78:	d50a      	bpl.n	8009a90 <__pow5mult+0x84>
- 8009a7a:	4639      	mov	r1, r7
- 8009a7c:	4622      	mov	r2, r4
- 8009a7e:	4630      	mov	r0, r6
- 8009a80:	f7ff ff20 	bl	80098c4 <__multiply>
- 8009a84:	4680      	mov	r8, r0
- 8009a86:	4639      	mov	r1, r7
- 8009a88:	4630      	mov	r0, r6
- 8009a8a:	f7ff fe4b 	bl	8009724 <_Bfree>
- 8009a8e:	4647      	mov	r7, r8
- 8009a90:	106d      	asrs	r5, r5, #1
- 8009a92:	d00b      	beq.n	8009aac <__pow5mult+0xa0>
- 8009a94:	6820      	ldr	r0, [r4, #0]
- 8009a96:	b938      	cbnz	r0, 8009aa8 <__pow5mult+0x9c>
- 8009a98:	4622      	mov	r2, r4
- 8009a9a:	4621      	mov	r1, r4
- 8009a9c:	4630      	mov	r0, r6
- 8009a9e:	f7ff ff11 	bl	80098c4 <__multiply>
- 8009aa2:	6020      	str	r0, [r4, #0]
- 8009aa4:	f8c0 9000 	str.w	r9, [r0]
- 8009aa8:	4604      	mov	r4, r0
- 8009aaa:	e7e4      	b.n	8009a76 <__pow5mult+0x6a>
- 8009aac:	4638      	mov	r0, r7
- 8009aae:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
- 8009ab2:	bf00      	nop
- 8009ab4:	0800b4d0 	.word	0x0800b4d0
- 8009ab8:	0800b299 	.word	0x0800b299
- 8009abc:	0800b380 	.word	0x0800b380
-
-08009ac0 <__lshift>:
- 8009ac0:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8009ac4:	460c      	mov	r4, r1
- 8009ac6:	4607      	mov	r7, r0
- 8009ac8:	4691      	mov	r9, r2
- 8009aca:	6923      	ldr	r3, [r4, #16]
- 8009acc:	6849      	ldr	r1, [r1, #4]
- 8009ace:	eb03 1862 	add.w	r8, r3, r2, asr #5
- 8009ad2:	68a3      	ldr	r3, [r4, #8]
- 8009ad4:	ea4f 1a62 	mov.w	sl, r2, asr #5
- 8009ad8:	f108 0601 	add.w	r6, r8, #1
- 8009adc:	42b3      	cmp	r3, r6
- 8009ade:	db0b      	blt.n	8009af8 <__lshift+0x38>
- 8009ae0:	4638      	mov	r0, r7
- 8009ae2:	f7ff fddf 	bl	80096a4 <_Balloc>
- 8009ae6:	4605      	mov	r5, r0
- 8009ae8:	b948      	cbnz	r0, 8009afe <__lshift+0x3e>
- 8009aea:	4602      	mov	r2, r0
- 8009aec:	f240 11d9 	movw	r1, #473	; 0x1d9
- 8009af0:	4b27      	ldr	r3, [pc, #156]	; (8009b90 <__lshift+0xd0>)
- 8009af2:	4828      	ldr	r0, [pc, #160]	; (8009b94 <__lshift+0xd4>)
- 8009af4:	f000 fc70 	bl	800a3d8 <__assert_func>
- 8009af8:	3101      	adds	r1, #1
- 8009afa:	005b      	lsls	r3, r3, #1
- 8009afc:	e7ee      	b.n	8009adc <__lshift+0x1c>
- 8009afe:	2300      	movs	r3, #0
- 8009b00:	f100 0114 	add.w	r1, r0, #20
- 8009b04:	f100 0210 	add.w	r2, r0, #16
- 8009b08:	4618      	mov	r0, r3
- 8009b0a:	4553      	cmp	r3, sl
- 8009b0c:	db33      	blt.n	8009b76 <__lshift+0xb6>
- 8009b0e:	6920      	ldr	r0, [r4, #16]
- 8009b10:	ea2a 7aea 	bic.w	sl, sl, sl, asr #31
- 8009b14:	f104 0314 	add.w	r3, r4, #20
- 8009b18:	f019 091f 	ands.w	r9, r9, #31
- 8009b1c:	eb01 018a 	add.w	r1, r1, sl, lsl #2
- 8009b20:	eb03 0c80 	add.w	ip, r3, r0, lsl #2
- 8009b24:	d02b      	beq.n	8009b7e <__lshift+0xbe>
- 8009b26:	468a      	mov	sl, r1
- 8009b28:	2200      	movs	r2, #0
- 8009b2a:	f1c9 0e20 	rsb	lr, r9, #32
- 8009b2e:	6818      	ldr	r0, [r3, #0]
- 8009b30:	fa00 f009 	lsl.w	r0, r0, r9
- 8009b34:	4302      	orrs	r2, r0
- 8009b36:	f84a 2b04 	str.w	r2, [sl], #4
- 8009b3a:	f853 2b04 	ldr.w	r2, [r3], #4
- 8009b3e:	459c      	cmp	ip, r3
- 8009b40:	fa22 f20e 	lsr.w	r2, r2, lr
- 8009b44:	d8f3      	bhi.n	8009b2e <__lshift+0x6e>
- 8009b46:	ebac 0304 	sub.w	r3, ip, r4
- 8009b4a:	3b15      	subs	r3, #21
- 8009b4c:	f023 0303 	bic.w	r3, r3, #3
- 8009b50:	3304      	adds	r3, #4
- 8009b52:	f104 0015 	add.w	r0, r4, #21
- 8009b56:	4584      	cmp	ip, r0
- 8009b58:	bf38      	it	cc
- 8009b5a:	2304      	movcc	r3, #4
- 8009b5c:	50ca      	str	r2, [r1, r3]
- 8009b5e:	b10a      	cbz	r2, 8009b64 <__lshift+0xa4>
- 8009b60:	f108 0602 	add.w	r6, r8, #2
- 8009b64:	3e01      	subs	r6, #1
- 8009b66:	4638      	mov	r0, r7
- 8009b68:	4621      	mov	r1, r4
- 8009b6a:	612e      	str	r6, [r5, #16]
- 8009b6c:	f7ff fdda 	bl	8009724 <_Bfree>
- 8009b70:	4628      	mov	r0, r5
- 8009b72:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 8009b76:	f842 0f04 	str.w	r0, [r2, #4]!
- 8009b7a:	3301      	adds	r3, #1
- 8009b7c:	e7c5      	b.n	8009b0a <__lshift+0x4a>
- 8009b7e:	3904      	subs	r1, #4
- 8009b80:	f853 2b04 	ldr.w	r2, [r3], #4
- 8009b84:	459c      	cmp	ip, r3
- 8009b86:	f841 2f04 	str.w	r2, [r1, #4]!
- 8009b8a:	d8f9      	bhi.n	8009b80 <__lshift+0xc0>
- 8009b8c:	e7ea      	b.n	8009b64 <__lshift+0xa4>
- 8009b8e:	bf00      	nop
- 8009b90:	0800b30f 	.word	0x0800b30f
- 8009b94:	0800b380 	.word	0x0800b380
-
-08009b98 <__mcmp>:
- 8009b98:	4603      	mov	r3, r0
- 8009b9a:	690a      	ldr	r2, [r1, #16]
- 8009b9c:	6900      	ldr	r0, [r0, #16]
- 8009b9e:	b530      	push	{r4, r5, lr}
- 8009ba0:	1a80      	subs	r0, r0, r2
- 8009ba2:	d10d      	bne.n	8009bc0 <__mcmp+0x28>
- 8009ba4:	3314      	adds	r3, #20
- 8009ba6:	3114      	adds	r1, #20
- 8009ba8:	eb03 0482 	add.w	r4, r3, r2, lsl #2
- 8009bac:	eb01 0182 	add.w	r1, r1, r2, lsl #2
- 8009bb0:	f854 5d04 	ldr.w	r5, [r4, #-4]!
- 8009bb4:	f851 2d04 	ldr.w	r2, [r1, #-4]!
- 8009bb8:	4295      	cmp	r5, r2
- 8009bba:	d002      	beq.n	8009bc2 <__mcmp+0x2a>
- 8009bbc:	d304      	bcc.n	8009bc8 <__mcmp+0x30>
- 8009bbe:	2001      	movs	r0, #1
- 8009bc0:	bd30      	pop	{r4, r5, pc}
- 8009bc2:	42a3      	cmp	r3, r4
- 8009bc4:	d3f4      	bcc.n	8009bb0 <__mcmp+0x18>
- 8009bc6:	e7fb      	b.n	8009bc0 <__mcmp+0x28>
- 8009bc8:	f04f 30ff 	mov.w	r0, #4294967295
- 8009bcc:	e7f8      	b.n	8009bc0 <__mcmp+0x28>
-	...
-
-08009bd0 <__mdiff>:
- 8009bd0:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 8009bd4:	460c      	mov	r4, r1
- 8009bd6:	4606      	mov	r6, r0
- 8009bd8:	4611      	mov	r1, r2
- 8009bda:	4620      	mov	r0, r4
- 8009bdc:	4692      	mov	sl, r2
- 8009bde:	f7ff ffdb 	bl	8009b98 <__mcmp>
- 8009be2:	1e05      	subs	r5, r0, #0
- 8009be4:	d111      	bne.n	8009c0a <__mdiff+0x3a>
- 8009be6:	4629      	mov	r1, r5
- 8009be8:	4630      	mov	r0, r6
- 8009bea:	f7ff fd5b 	bl	80096a4 <_Balloc>
+08009bdc <__d2b>:
+ 8009bdc:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+ 8009bde:	2101      	movs	r1, #1
+ 8009be0:	4617      	mov	r7, r2
+ 8009be2:	461c      	mov	r4, r3
+ 8009be4:	9e08      	ldr	r6, [sp, #32]
+ 8009be6:	f7ff fcd7 	bl	8009598 <_Balloc>
+ 8009bea:	4605      	mov	r5, r0
+ 8009bec:	b930      	cbnz	r0, 8009bfc <__d2b+0x20>
  8009bee:	4602      	mov	r2, r0
- 8009bf0:	b928      	cbnz	r0, 8009bfe <__mdiff+0x2e>
- 8009bf2:	f240 2132 	movw	r1, #562	; 0x232
- 8009bf6:	4b3c      	ldr	r3, [pc, #240]	; (8009ce8 <__mdiff+0x118>)
- 8009bf8:	483c      	ldr	r0, [pc, #240]	; (8009cec <__mdiff+0x11c>)
- 8009bfa:	f000 fbed 	bl	800a3d8 <__assert_func>
- 8009bfe:	2301      	movs	r3, #1
- 8009c00:	e9c0 3504 	strd	r3, r5, [r0, #16]
- 8009c04:	4610      	mov	r0, r2
- 8009c06:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 8009c0a:	bfa4      	itt	ge
- 8009c0c:	4653      	movge	r3, sl
- 8009c0e:	46a2      	movge	sl, r4
- 8009c10:	4630      	mov	r0, r6
- 8009c12:	f8da 1004 	ldr.w	r1, [sl, #4]
- 8009c16:	bfa6      	itte	ge
- 8009c18:	461c      	movge	r4, r3
- 8009c1a:	2500      	movge	r5, #0
- 8009c1c:	2501      	movlt	r5, #1
- 8009c1e:	f7ff fd41 	bl	80096a4 <_Balloc>
- 8009c22:	4602      	mov	r2, r0
- 8009c24:	b918      	cbnz	r0, 8009c2e <__mdiff+0x5e>
- 8009c26:	f44f 7110 	mov.w	r1, #576	; 0x240
- 8009c2a:	4b2f      	ldr	r3, [pc, #188]	; (8009ce8 <__mdiff+0x118>)
- 8009c2c:	e7e4      	b.n	8009bf8 <__mdiff+0x28>
- 8009c2e:	f100 0814 	add.w	r8, r0, #20
- 8009c32:	f8da 7010 	ldr.w	r7, [sl, #16]
- 8009c36:	60c5      	str	r5, [r0, #12]
- 8009c38:	f04f 0c00 	mov.w	ip, #0
- 8009c3c:	f10a 0514 	add.w	r5, sl, #20
- 8009c40:	f10a 0010 	add.w	r0, sl, #16
- 8009c44:	46c2      	mov	sl, r8
- 8009c46:	6926      	ldr	r6, [r4, #16]
- 8009c48:	f104 0914 	add.w	r9, r4, #20
- 8009c4c:	eb05 0e87 	add.w	lr, r5, r7, lsl #2
- 8009c50:	eb09 0686 	add.w	r6, r9, r6, lsl #2
- 8009c54:	f850 bf04 	ldr.w	fp, [r0, #4]!
- 8009c58:	f859 3b04 	ldr.w	r3, [r9], #4
- 8009c5c:	fa1f f18b 	uxth.w	r1, fp
- 8009c60:	4461      	add	r1, ip
- 8009c62:	fa1f fc83 	uxth.w	ip, r3
- 8009c66:	0c1b      	lsrs	r3, r3, #16
- 8009c68:	eba1 010c 	sub.w	r1, r1, ip
- 8009c6c:	ebc3 431b 	rsb	r3, r3, fp, lsr #16
- 8009c70:	eb03 4321 	add.w	r3, r3, r1, asr #16
- 8009c74:	b289      	uxth	r1, r1
- 8009c76:	ea4f 4c23 	mov.w	ip, r3, asr #16
- 8009c7a:	454e      	cmp	r6, r9
- 8009c7c:	ea41 4303 	orr.w	r3, r1, r3, lsl #16
- 8009c80:	f84a 3b04 	str.w	r3, [sl], #4
- 8009c84:	d8e6      	bhi.n	8009c54 <__mdiff+0x84>
- 8009c86:	1b33      	subs	r3, r6, r4
- 8009c88:	3b15      	subs	r3, #21
- 8009c8a:	f023 0303 	bic.w	r3, r3, #3
- 8009c8e:	3415      	adds	r4, #21
- 8009c90:	3304      	adds	r3, #4
- 8009c92:	42a6      	cmp	r6, r4
- 8009c94:	bf38      	it	cc
- 8009c96:	2304      	movcc	r3, #4
- 8009c98:	441d      	add	r5, r3
- 8009c9a:	4443      	add	r3, r8
- 8009c9c:	461e      	mov	r6, r3
- 8009c9e:	462c      	mov	r4, r5
- 8009ca0:	4574      	cmp	r4, lr
- 8009ca2:	d30e      	bcc.n	8009cc2 <__mdiff+0xf2>
- 8009ca4:	f10e 0103 	add.w	r1, lr, #3
- 8009ca8:	1b49      	subs	r1, r1, r5
- 8009caa:	f021 0103 	bic.w	r1, r1, #3
- 8009cae:	3d03      	subs	r5, #3
- 8009cb0:	45ae      	cmp	lr, r5
- 8009cb2:	bf38      	it	cc
- 8009cb4:	2100      	movcc	r1, #0
- 8009cb6:	4419      	add	r1, r3
- 8009cb8:	f851 3d04 	ldr.w	r3, [r1, #-4]!
- 8009cbc:	b18b      	cbz	r3, 8009ce2 <__mdiff+0x112>
- 8009cbe:	6117      	str	r7, [r2, #16]
- 8009cc0:	e7a0      	b.n	8009c04 <__mdiff+0x34>
- 8009cc2:	f854 8b04 	ldr.w	r8, [r4], #4
- 8009cc6:	fa1f f188 	uxth.w	r1, r8
- 8009cca:	4461      	add	r1, ip
- 8009ccc:	1408      	asrs	r0, r1, #16
- 8009cce:	eb00 4018 	add.w	r0, r0, r8, lsr #16
- 8009cd2:	b289      	uxth	r1, r1
- 8009cd4:	ea41 4100 	orr.w	r1, r1, r0, lsl #16
- 8009cd8:	ea4f 4c20 	mov.w	ip, r0, asr #16
- 8009cdc:	f846 1b04 	str.w	r1, [r6], #4
- 8009ce0:	e7de      	b.n	8009ca0 <__mdiff+0xd0>
- 8009ce2:	3f01      	subs	r7, #1
- 8009ce4:	e7e8      	b.n	8009cb8 <__mdiff+0xe8>
- 8009ce6:	bf00      	nop
- 8009ce8:	0800b30f 	.word	0x0800b30f
- 8009cec:	0800b380 	.word	0x0800b380
+ 8009bf0:	f240 310f 	movw	r1, #783	; 0x30f
+ 8009bf4:	4b22      	ldr	r3, [pc, #136]	; (8009c80 <__d2b+0xa4>)
+ 8009bf6:	4823      	ldr	r0, [pc, #140]	; (8009c84 <__d2b+0xa8>)
+ 8009bf8:	f000 fc36 	bl	800a468 <__assert_func>
+ 8009bfc:	f3c4 0313 	ubfx	r3, r4, #0, #20
+ 8009c00:	f3c4 540a 	ubfx	r4, r4, #20, #11
+ 8009c04:	bb24      	cbnz	r4, 8009c50 <__d2b+0x74>
+ 8009c06:	2f00      	cmp	r7, #0
+ 8009c08:	9301      	str	r3, [sp, #4]
+ 8009c0a:	d026      	beq.n	8009c5a <__d2b+0x7e>
+ 8009c0c:	4668      	mov	r0, sp
+ 8009c0e:	9700      	str	r7, [sp, #0]
+ 8009c10:	f7ff fd8a 	bl	8009728 <__lo0bits>
+ 8009c14:	e9dd 1200 	ldrd	r1, r2, [sp]
+ 8009c18:	b1e8      	cbz	r0, 8009c56 <__d2b+0x7a>
+ 8009c1a:	f1c0 0320 	rsb	r3, r0, #32
+ 8009c1e:	fa02 f303 	lsl.w	r3, r2, r3
+ 8009c22:	430b      	orrs	r3, r1
+ 8009c24:	40c2      	lsrs	r2, r0
+ 8009c26:	616b      	str	r3, [r5, #20]
+ 8009c28:	9201      	str	r2, [sp, #4]
+ 8009c2a:	9b01      	ldr	r3, [sp, #4]
+ 8009c2c:	2b00      	cmp	r3, #0
+ 8009c2e:	bf14      	ite	ne
+ 8009c30:	2102      	movne	r1, #2
+ 8009c32:	2101      	moveq	r1, #1
+ 8009c34:	61ab      	str	r3, [r5, #24]
+ 8009c36:	6129      	str	r1, [r5, #16]
+ 8009c38:	b1bc      	cbz	r4, 8009c6a <__d2b+0x8e>
+ 8009c3a:	f2a4 4433 	subw	r4, r4, #1075	; 0x433
+ 8009c3e:	4404      	add	r4, r0
+ 8009c40:	6034      	str	r4, [r6, #0]
+ 8009c42:	f1c0 0035 	rsb	r0, r0, #53	; 0x35
+ 8009c46:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 8009c48:	6018      	str	r0, [r3, #0]
+ 8009c4a:	4628      	mov	r0, r5
+ 8009c4c:	b003      	add	sp, #12
+ 8009c4e:	bdf0      	pop	{r4, r5, r6, r7, pc}
+ 8009c50:	f443 1380 	orr.w	r3, r3, #1048576	; 0x100000
+ 8009c54:	e7d7      	b.n	8009c06 <__d2b+0x2a>
+ 8009c56:	6169      	str	r1, [r5, #20]
+ 8009c58:	e7e7      	b.n	8009c2a <__d2b+0x4e>
+ 8009c5a:	a801      	add	r0, sp, #4
+ 8009c5c:	f7ff fd64 	bl	8009728 <__lo0bits>
+ 8009c60:	9b01      	ldr	r3, [sp, #4]
+ 8009c62:	2101      	movs	r1, #1
+ 8009c64:	616b      	str	r3, [r5, #20]
+ 8009c66:	3020      	adds	r0, #32
+ 8009c68:	e7e5      	b.n	8009c36 <__d2b+0x5a>
+ 8009c6a:	f2a0 4032 	subw	r0, r0, #1074	; 0x432
+ 8009c6e:	eb05 0381 	add.w	r3, r5, r1, lsl #2
+ 8009c72:	6030      	str	r0, [r6, #0]
+ 8009c74:	6918      	ldr	r0, [r3, #16]
+ 8009c76:	f7ff fd37 	bl	80096e8 <__hi0bits>
+ 8009c7a:	ebc0 1041 	rsb	r0, r0, r1, lsl #5
+ 8009c7e:	e7e2      	b.n	8009c46 <__d2b+0x6a>
+ 8009c80:	0800b2f2 	.word	0x0800b2f2
+ 8009c84:	0800b303 	.word	0x0800b303
 
-08009cf0 <__d2b>:
- 8009cf0:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
- 8009cf4:	2101      	movs	r1, #1
- 8009cf6:	e9dd 7608 	ldrd	r7, r6, [sp, #32]
- 8009cfa:	4690      	mov	r8, r2
- 8009cfc:	461d      	mov	r5, r3
- 8009cfe:	f7ff fcd1 	bl	80096a4 <_Balloc>
- 8009d02:	4604      	mov	r4, r0
- 8009d04:	b930      	cbnz	r0, 8009d14 <__d2b+0x24>
- 8009d06:	4602      	mov	r2, r0
- 8009d08:	f240 310a 	movw	r1, #778	; 0x30a
- 8009d0c:	4b24      	ldr	r3, [pc, #144]	; (8009da0 <__d2b+0xb0>)
- 8009d0e:	4825      	ldr	r0, [pc, #148]	; (8009da4 <__d2b+0xb4>)
- 8009d10:	f000 fb62 	bl	800a3d8 <__assert_func>
- 8009d14:	f3c5 0313 	ubfx	r3, r5, #0, #20
- 8009d18:	f3c5 550a 	ubfx	r5, r5, #20, #11
- 8009d1c:	bb2d      	cbnz	r5, 8009d6a <__d2b+0x7a>
- 8009d1e:	9301      	str	r3, [sp, #4]
- 8009d20:	f1b8 0300 	subs.w	r3, r8, #0
- 8009d24:	d026      	beq.n	8009d74 <__d2b+0x84>
- 8009d26:	4668      	mov	r0, sp
- 8009d28:	9300      	str	r3, [sp, #0]
- 8009d2a:	f7ff fd87 	bl	800983c <__lo0bits>
- 8009d2e:	9900      	ldr	r1, [sp, #0]
- 8009d30:	b1f0      	cbz	r0, 8009d70 <__d2b+0x80>
- 8009d32:	9a01      	ldr	r2, [sp, #4]
- 8009d34:	f1c0 0320 	rsb	r3, r0, #32
- 8009d38:	fa02 f303 	lsl.w	r3, r2, r3
- 8009d3c:	430b      	orrs	r3, r1
- 8009d3e:	40c2      	lsrs	r2, r0
- 8009d40:	6163      	str	r3, [r4, #20]
- 8009d42:	9201      	str	r2, [sp, #4]
- 8009d44:	9b01      	ldr	r3, [sp, #4]
- 8009d46:	2b00      	cmp	r3, #0
- 8009d48:	bf14      	ite	ne
- 8009d4a:	2102      	movne	r1, #2
- 8009d4c:	2101      	moveq	r1, #1
- 8009d4e:	61a3      	str	r3, [r4, #24]
- 8009d50:	6121      	str	r1, [r4, #16]
- 8009d52:	b1c5      	cbz	r5, 8009d86 <__d2b+0x96>
- 8009d54:	f2a5 4533 	subw	r5, r5, #1075	; 0x433
- 8009d58:	4405      	add	r5, r0
- 8009d5a:	f1c0 0035 	rsb	r0, r0, #53	; 0x35
- 8009d5e:	603d      	str	r5, [r7, #0]
- 8009d60:	6030      	str	r0, [r6, #0]
- 8009d62:	4620      	mov	r0, r4
- 8009d64:	b002      	add	sp, #8
- 8009d66:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
- 8009d6a:	f443 1380 	orr.w	r3, r3, #1048576	; 0x100000
- 8009d6e:	e7d6      	b.n	8009d1e <__d2b+0x2e>
- 8009d70:	6161      	str	r1, [r4, #20]
- 8009d72:	e7e7      	b.n	8009d44 <__d2b+0x54>
- 8009d74:	a801      	add	r0, sp, #4
- 8009d76:	f7ff fd61 	bl	800983c <__lo0bits>
- 8009d7a:	2101      	movs	r1, #1
- 8009d7c:	9b01      	ldr	r3, [sp, #4]
- 8009d7e:	6121      	str	r1, [r4, #16]
- 8009d80:	6163      	str	r3, [r4, #20]
- 8009d82:	3020      	adds	r0, #32
- 8009d84:	e7e5      	b.n	8009d52 <__d2b+0x62>
- 8009d86:	eb04 0381 	add.w	r3, r4, r1, lsl #2
- 8009d8a:	f2a0 4032 	subw	r0, r0, #1074	; 0x432
- 8009d8e:	6038      	str	r0, [r7, #0]
- 8009d90:	6918      	ldr	r0, [r3, #16]
- 8009d92:	f7ff fd33 	bl	80097fc <__hi0bits>
- 8009d96:	ebc0 1141 	rsb	r1, r0, r1, lsl #5
- 8009d9a:	6031      	str	r1, [r6, #0]
- 8009d9c:	e7e1      	b.n	8009d62 <__d2b+0x72>
- 8009d9e:	bf00      	nop
- 8009da0:	0800b30f 	.word	0x0800b30f
- 8009da4:	0800b380 	.word	0x0800b380
+08009c88 <__ssputs_r>:
+ 8009c88:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+ 8009c8c:	461f      	mov	r7, r3
+ 8009c8e:	688e      	ldr	r6, [r1, #8]
+ 8009c90:	4682      	mov	sl, r0
+ 8009c92:	42be      	cmp	r6, r7
+ 8009c94:	460c      	mov	r4, r1
+ 8009c96:	4690      	mov	r8, r2
+ 8009c98:	680b      	ldr	r3, [r1, #0]
+ 8009c9a:	d82c      	bhi.n	8009cf6 <__ssputs_r+0x6e>
+ 8009c9c:	898a      	ldrh	r2, [r1, #12]
+ 8009c9e:	f412 6f90 	tst.w	r2, #1152	; 0x480
+ 8009ca2:	d026      	beq.n	8009cf2 <__ssputs_r+0x6a>
+ 8009ca4:	6965      	ldr	r5, [r4, #20]
+ 8009ca6:	6909      	ldr	r1, [r1, #16]
+ 8009ca8:	eb05 0545 	add.w	r5, r5, r5, lsl #1
+ 8009cac:	eba3 0901 	sub.w	r9, r3, r1
+ 8009cb0:	eb05 75d5 	add.w	r5, r5, r5, lsr #31
+ 8009cb4:	1c7b      	adds	r3, r7, #1
+ 8009cb6:	444b      	add	r3, r9
+ 8009cb8:	106d      	asrs	r5, r5, #1
+ 8009cba:	429d      	cmp	r5, r3
+ 8009cbc:	bf38      	it	cc
+ 8009cbe:	461d      	movcc	r5, r3
+ 8009cc0:	0553      	lsls	r3, r2, #21
+ 8009cc2:	d527      	bpl.n	8009d14 <__ssputs_r+0x8c>
+ 8009cc4:	4629      	mov	r1, r5
+ 8009cc6:	f7fd fe6f 	bl	80079a8 <_malloc_r>
+ 8009cca:	4606      	mov	r6, r0
+ 8009ccc:	b360      	cbz	r0, 8009d28 <__ssputs_r+0xa0>
+ 8009cce:	464a      	mov	r2, r9
+ 8009cd0:	6921      	ldr	r1, [r4, #16]
+ 8009cd2:	f000 fbbb 	bl	800a44c <memcpy>
+ 8009cd6:	89a3      	ldrh	r3, [r4, #12]
+ 8009cd8:	f423 6390 	bic.w	r3, r3, #1152	; 0x480
+ 8009cdc:	f043 0380 	orr.w	r3, r3, #128	; 0x80
+ 8009ce0:	81a3      	strh	r3, [r4, #12]
+ 8009ce2:	6126      	str	r6, [r4, #16]
+ 8009ce4:	444e      	add	r6, r9
+ 8009ce6:	6026      	str	r6, [r4, #0]
+ 8009ce8:	463e      	mov	r6, r7
+ 8009cea:	6165      	str	r5, [r4, #20]
+ 8009cec:	eba5 0509 	sub.w	r5, r5, r9
+ 8009cf0:	60a5      	str	r5, [r4, #8]
+ 8009cf2:	42be      	cmp	r6, r7
+ 8009cf4:	d900      	bls.n	8009cf8 <__ssputs_r+0x70>
+ 8009cf6:	463e      	mov	r6, r7
+ 8009cf8:	4632      	mov	r2, r6
+ 8009cfa:	4641      	mov	r1, r8
+ 8009cfc:	6820      	ldr	r0, [r4, #0]
+ 8009cfe:	f000 fb68 	bl	800a3d2 <memmove>
+ 8009d02:	2000      	movs	r0, #0
+ 8009d04:	68a3      	ldr	r3, [r4, #8]
+ 8009d06:	1b9b      	subs	r3, r3, r6
+ 8009d08:	60a3      	str	r3, [r4, #8]
+ 8009d0a:	6823      	ldr	r3, [r4, #0]
+ 8009d0c:	4433      	add	r3, r6
+ 8009d0e:	6023      	str	r3, [r4, #0]
+ 8009d10:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 8009d14:	462a      	mov	r2, r5
+ 8009d16:	f000 fbeb 	bl	800a4f0 <_realloc_r>
+ 8009d1a:	4606      	mov	r6, r0
+ 8009d1c:	2800      	cmp	r0, #0
+ 8009d1e:	d1e0      	bne.n	8009ce2 <__ssputs_r+0x5a>
+ 8009d20:	4650      	mov	r0, sl
+ 8009d22:	6921      	ldr	r1, [r4, #16]
+ 8009d24:	f7ff fbf0 	bl	8009508 <_free_r>
+ 8009d28:	230c      	movs	r3, #12
+ 8009d2a:	f8ca 3000 	str.w	r3, [sl]
+ 8009d2e:	89a3      	ldrh	r3, [r4, #12]
+ 8009d30:	f04f 30ff 	mov.w	r0, #4294967295
+ 8009d34:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 8009d38:	81a3      	strh	r3, [r4, #12]
+ 8009d3a:	e7e9      	b.n	8009d10 <__ssputs_r+0x88>
 
-08009da8 <_calloc_r>:
- 8009da8:	b538      	push	{r3, r4, r5, lr}
- 8009daa:	fb02 f501 	mul.w	r5, r2, r1
- 8009dae:	4629      	mov	r1, r5
- 8009db0:	f7fd fe04 	bl	80079bc <_malloc_r>
- 8009db4:	4604      	mov	r4, r0
- 8009db6:	b118      	cbz	r0, 8009dc0 <_calloc_r+0x18>
- 8009db8:	462a      	mov	r2, r5
- 8009dba:	2100      	movs	r1, #0
- 8009dbc:	f7fd fdaa 	bl	8007914 <memset>
- 8009dc0:	4620      	mov	r0, r4
- 8009dc2:	bd38      	pop	{r3, r4, r5, pc}
+08009d3c <_svfiprintf_r>:
+ 8009d3c:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 8009d40:	4698      	mov	r8, r3
+ 8009d42:	898b      	ldrh	r3, [r1, #12]
+ 8009d44:	4607      	mov	r7, r0
+ 8009d46:	061b      	lsls	r3, r3, #24
+ 8009d48:	460d      	mov	r5, r1
+ 8009d4a:	4614      	mov	r4, r2
+ 8009d4c:	b09d      	sub	sp, #116	; 0x74
+ 8009d4e:	d50e      	bpl.n	8009d6e <_svfiprintf_r+0x32>
+ 8009d50:	690b      	ldr	r3, [r1, #16]
+ 8009d52:	b963      	cbnz	r3, 8009d6e <_svfiprintf_r+0x32>
+ 8009d54:	2140      	movs	r1, #64	; 0x40
+ 8009d56:	f7fd fe27 	bl	80079a8 <_malloc_r>
+ 8009d5a:	6028      	str	r0, [r5, #0]
+ 8009d5c:	6128      	str	r0, [r5, #16]
+ 8009d5e:	b920      	cbnz	r0, 8009d6a <_svfiprintf_r+0x2e>
+ 8009d60:	230c      	movs	r3, #12
+ 8009d62:	603b      	str	r3, [r7, #0]
+ 8009d64:	f04f 30ff 	mov.w	r0, #4294967295
+ 8009d68:	e0d0      	b.n	8009f0c <_svfiprintf_r+0x1d0>
+ 8009d6a:	2340      	movs	r3, #64	; 0x40
+ 8009d6c:	616b      	str	r3, [r5, #20]
+ 8009d6e:	2300      	movs	r3, #0
+ 8009d70:	9309      	str	r3, [sp, #36]	; 0x24
+ 8009d72:	2320      	movs	r3, #32
+ 8009d74:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
+ 8009d78:	2330      	movs	r3, #48	; 0x30
+ 8009d7a:	f04f 0901 	mov.w	r9, #1
+ 8009d7e:	f8cd 800c 	str.w	r8, [sp, #12]
+ 8009d82:	f8df 81a0 	ldr.w	r8, [pc, #416]	; 8009f24 <_svfiprintf_r+0x1e8>
+ 8009d86:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
+ 8009d8a:	4623      	mov	r3, r4
+ 8009d8c:	469a      	mov	sl, r3
+ 8009d8e:	f813 2b01 	ldrb.w	r2, [r3], #1
+ 8009d92:	b10a      	cbz	r2, 8009d98 <_svfiprintf_r+0x5c>
+ 8009d94:	2a25      	cmp	r2, #37	; 0x25
+ 8009d96:	d1f9      	bne.n	8009d8c <_svfiprintf_r+0x50>
+ 8009d98:	ebba 0b04 	subs.w	fp, sl, r4
+ 8009d9c:	d00b      	beq.n	8009db6 <_svfiprintf_r+0x7a>
+ 8009d9e:	465b      	mov	r3, fp
+ 8009da0:	4622      	mov	r2, r4
+ 8009da2:	4629      	mov	r1, r5
+ 8009da4:	4638      	mov	r0, r7
+ 8009da6:	f7ff ff6f 	bl	8009c88 <__ssputs_r>
+ 8009daa:	3001      	adds	r0, #1
+ 8009dac:	f000 80a9 	beq.w	8009f02 <_svfiprintf_r+0x1c6>
+ 8009db0:	9a09      	ldr	r2, [sp, #36]	; 0x24
+ 8009db2:	445a      	add	r2, fp
+ 8009db4:	9209      	str	r2, [sp, #36]	; 0x24
+ 8009db6:	f89a 3000 	ldrb.w	r3, [sl]
+ 8009dba:	2b00      	cmp	r3, #0
+ 8009dbc:	f000 80a1 	beq.w	8009f02 <_svfiprintf_r+0x1c6>
+ 8009dc0:	2300      	movs	r3, #0
+ 8009dc2:	f04f 32ff 	mov.w	r2, #4294967295
+ 8009dc6:	e9cd 2305 	strd	r2, r3, [sp, #20]
+ 8009dca:	f10a 0a01 	add.w	sl, sl, #1
+ 8009dce:	9304      	str	r3, [sp, #16]
+ 8009dd0:	9307      	str	r3, [sp, #28]
+ 8009dd2:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
+ 8009dd6:	931a      	str	r3, [sp, #104]	; 0x68
+ 8009dd8:	4654      	mov	r4, sl
+ 8009dda:	2205      	movs	r2, #5
+ 8009ddc:	f814 1b01 	ldrb.w	r1, [r4], #1
+ 8009de0:	4850      	ldr	r0, [pc, #320]	; (8009f24 <_svfiprintf_r+0x1e8>)
+ 8009de2:	f7fe fd14 	bl	800880e <memchr>
+ 8009de6:	9a04      	ldr	r2, [sp, #16]
+ 8009de8:	b9d8      	cbnz	r0, 8009e22 <_svfiprintf_r+0xe6>
+ 8009dea:	06d0      	lsls	r0, r2, #27
+ 8009dec:	bf44      	itt	mi
+ 8009dee:	2320      	movmi	r3, #32
+ 8009df0:	f88d 3053 	strbmi.w	r3, [sp, #83]	; 0x53
+ 8009df4:	0711      	lsls	r1, r2, #28
+ 8009df6:	bf44      	itt	mi
+ 8009df8:	232b      	movmi	r3, #43	; 0x2b
+ 8009dfa:	f88d 3053 	strbmi.w	r3, [sp, #83]	; 0x53
+ 8009dfe:	f89a 3000 	ldrb.w	r3, [sl]
+ 8009e02:	2b2a      	cmp	r3, #42	; 0x2a
+ 8009e04:	d015      	beq.n	8009e32 <_svfiprintf_r+0xf6>
+ 8009e06:	4654      	mov	r4, sl
+ 8009e08:	2000      	movs	r0, #0
+ 8009e0a:	f04f 0c0a 	mov.w	ip, #10
+ 8009e0e:	9a07      	ldr	r2, [sp, #28]
+ 8009e10:	4621      	mov	r1, r4
+ 8009e12:	f811 3b01 	ldrb.w	r3, [r1], #1
+ 8009e16:	3b30      	subs	r3, #48	; 0x30
+ 8009e18:	2b09      	cmp	r3, #9
+ 8009e1a:	d94d      	bls.n	8009eb8 <_svfiprintf_r+0x17c>
+ 8009e1c:	b1b0      	cbz	r0, 8009e4c <_svfiprintf_r+0x110>
+ 8009e1e:	9207      	str	r2, [sp, #28]
+ 8009e20:	e014      	b.n	8009e4c <_svfiprintf_r+0x110>
+ 8009e22:	eba0 0308 	sub.w	r3, r0, r8
+ 8009e26:	fa09 f303 	lsl.w	r3, r9, r3
+ 8009e2a:	4313      	orrs	r3, r2
+ 8009e2c:	46a2      	mov	sl, r4
+ 8009e2e:	9304      	str	r3, [sp, #16]
+ 8009e30:	e7d2      	b.n	8009dd8 <_svfiprintf_r+0x9c>
+ 8009e32:	9b03      	ldr	r3, [sp, #12]
+ 8009e34:	1d19      	adds	r1, r3, #4
+ 8009e36:	681b      	ldr	r3, [r3, #0]
+ 8009e38:	9103      	str	r1, [sp, #12]
+ 8009e3a:	2b00      	cmp	r3, #0
+ 8009e3c:	bfbb      	ittet	lt
+ 8009e3e:	425b      	neglt	r3, r3
+ 8009e40:	f042 0202 	orrlt.w	r2, r2, #2
+ 8009e44:	9307      	strge	r3, [sp, #28]
+ 8009e46:	9307      	strlt	r3, [sp, #28]
+ 8009e48:	bfb8      	it	lt
+ 8009e4a:	9204      	strlt	r2, [sp, #16]
+ 8009e4c:	7823      	ldrb	r3, [r4, #0]
+ 8009e4e:	2b2e      	cmp	r3, #46	; 0x2e
+ 8009e50:	d10c      	bne.n	8009e6c <_svfiprintf_r+0x130>
+ 8009e52:	7863      	ldrb	r3, [r4, #1]
+ 8009e54:	2b2a      	cmp	r3, #42	; 0x2a
+ 8009e56:	d134      	bne.n	8009ec2 <_svfiprintf_r+0x186>
+ 8009e58:	9b03      	ldr	r3, [sp, #12]
+ 8009e5a:	3402      	adds	r4, #2
+ 8009e5c:	1d1a      	adds	r2, r3, #4
+ 8009e5e:	681b      	ldr	r3, [r3, #0]
+ 8009e60:	9203      	str	r2, [sp, #12]
+ 8009e62:	2b00      	cmp	r3, #0
+ 8009e64:	bfb8      	it	lt
+ 8009e66:	f04f 33ff 	movlt.w	r3, #4294967295
+ 8009e6a:	9305      	str	r3, [sp, #20]
+ 8009e6c:	f8df a0b8 	ldr.w	sl, [pc, #184]	; 8009f28 <_svfiprintf_r+0x1ec>
+ 8009e70:	2203      	movs	r2, #3
+ 8009e72:	4650      	mov	r0, sl
+ 8009e74:	7821      	ldrb	r1, [r4, #0]
+ 8009e76:	f7fe fcca 	bl	800880e <memchr>
+ 8009e7a:	b138      	cbz	r0, 8009e8c <_svfiprintf_r+0x150>
+ 8009e7c:	2240      	movs	r2, #64	; 0x40
+ 8009e7e:	9b04      	ldr	r3, [sp, #16]
+ 8009e80:	eba0 000a 	sub.w	r0, r0, sl
+ 8009e84:	4082      	lsls	r2, r0
+ 8009e86:	4313      	orrs	r3, r2
+ 8009e88:	3401      	adds	r4, #1
+ 8009e8a:	9304      	str	r3, [sp, #16]
+ 8009e8c:	f814 1b01 	ldrb.w	r1, [r4], #1
+ 8009e90:	2206      	movs	r2, #6
+ 8009e92:	4826      	ldr	r0, [pc, #152]	; (8009f2c <_svfiprintf_r+0x1f0>)
+ 8009e94:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
+ 8009e98:	f7fe fcb9 	bl	800880e <memchr>
+ 8009e9c:	2800      	cmp	r0, #0
+ 8009e9e:	d038      	beq.n	8009f12 <_svfiprintf_r+0x1d6>
+ 8009ea0:	4b23      	ldr	r3, [pc, #140]	; (8009f30 <_svfiprintf_r+0x1f4>)
+ 8009ea2:	bb1b      	cbnz	r3, 8009eec <_svfiprintf_r+0x1b0>
+ 8009ea4:	9b03      	ldr	r3, [sp, #12]
+ 8009ea6:	3307      	adds	r3, #7
+ 8009ea8:	f023 0307 	bic.w	r3, r3, #7
+ 8009eac:	3308      	adds	r3, #8
+ 8009eae:	9303      	str	r3, [sp, #12]
+ 8009eb0:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 8009eb2:	4433      	add	r3, r6
+ 8009eb4:	9309      	str	r3, [sp, #36]	; 0x24
+ 8009eb6:	e768      	b.n	8009d8a <_svfiprintf_r+0x4e>
+ 8009eb8:	460c      	mov	r4, r1
+ 8009eba:	2001      	movs	r0, #1
+ 8009ebc:	fb0c 3202 	mla	r2, ip, r2, r3
+ 8009ec0:	e7a6      	b.n	8009e10 <_svfiprintf_r+0xd4>
+ 8009ec2:	2300      	movs	r3, #0
+ 8009ec4:	f04f 0c0a 	mov.w	ip, #10
+ 8009ec8:	4619      	mov	r1, r3
+ 8009eca:	3401      	adds	r4, #1
+ 8009ecc:	9305      	str	r3, [sp, #20]
+ 8009ece:	4620      	mov	r0, r4
+ 8009ed0:	f810 2b01 	ldrb.w	r2, [r0], #1
+ 8009ed4:	3a30      	subs	r2, #48	; 0x30
+ 8009ed6:	2a09      	cmp	r2, #9
+ 8009ed8:	d903      	bls.n	8009ee2 <_svfiprintf_r+0x1a6>
+ 8009eda:	2b00      	cmp	r3, #0
+ 8009edc:	d0c6      	beq.n	8009e6c <_svfiprintf_r+0x130>
+ 8009ede:	9105      	str	r1, [sp, #20]
+ 8009ee0:	e7c4      	b.n	8009e6c <_svfiprintf_r+0x130>
+ 8009ee2:	4604      	mov	r4, r0
+ 8009ee4:	2301      	movs	r3, #1
+ 8009ee6:	fb0c 2101 	mla	r1, ip, r1, r2
+ 8009eea:	e7f0      	b.n	8009ece <_svfiprintf_r+0x192>
+ 8009eec:	ab03      	add	r3, sp, #12
+ 8009eee:	9300      	str	r3, [sp, #0]
+ 8009ef0:	462a      	mov	r2, r5
+ 8009ef2:	4638      	mov	r0, r7
+ 8009ef4:	4b0f      	ldr	r3, [pc, #60]	; (8009f34 <_svfiprintf_r+0x1f8>)
+ 8009ef6:	a904      	add	r1, sp, #16
+ 8009ef8:	f7fd fe7e 	bl	8007bf8 <_printf_float>
+ 8009efc:	1c42      	adds	r2, r0, #1
+ 8009efe:	4606      	mov	r6, r0
+ 8009f00:	d1d6      	bne.n	8009eb0 <_svfiprintf_r+0x174>
+ 8009f02:	89ab      	ldrh	r3, [r5, #12]
+ 8009f04:	065b      	lsls	r3, r3, #25
+ 8009f06:	f53f af2d 	bmi.w	8009d64 <_svfiprintf_r+0x28>
+ 8009f0a:	9809      	ldr	r0, [sp, #36]	; 0x24
+ 8009f0c:	b01d      	add	sp, #116	; 0x74
+ 8009f0e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+ 8009f12:	ab03      	add	r3, sp, #12
+ 8009f14:	9300      	str	r3, [sp, #0]
+ 8009f16:	462a      	mov	r2, r5
+ 8009f18:	4638      	mov	r0, r7
+ 8009f1a:	4b06      	ldr	r3, [pc, #24]	; (8009f34 <_svfiprintf_r+0x1f8>)
+ 8009f1c:	a904      	add	r1, sp, #16
+ 8009f1e:	f7fe f90b 	bl	8008138 <_printf_i>
+ 8009f22:	e7eb      	b.n	8009efc <_svfiprintf_r+0x1c0>
+ 8009f24:	0800b45c 	.word	0x0800b45c
+ 8009f28:	0800b462 	.word	0x0800b462
+ 8009f2c:	0800b466 	.word	0x0800b466
+ 8009f30:	08007bf9 	.word	0x08007bf9
+ 8009f34:	08009c89 	.word	0x08009c89
 
-08009dc4 <__ssputs_r>:
- 8009dc4:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
- 8009dc8:	688e      	ldr	r6, [r1, #8]
- 8009dca:	4682      	mov	sl, r0
- 8009dcc:	429e      	cmp	r6, r3
- 8009dce:	460c      	mov	r4, r1
- 8009dd0:	4690      	mov	r8, r2
- 8009dd2:	461f      	mov	r7, r3
- 8009dd4:	d838      	bhi.n	8009e48 <__ssputs_r+0x84>
- 8009dd6:	898a      	ldrh	r2, [r1, #12]
- 8009dd8:	f412 6f90 	tst.w	r2, #1152	; 0x480
- 8009ddc:	d032      	beq.n	8009e44 <__ssputs_r+0x80>
- 8009dde:	6825      	ldr	r5, [r4, #0]
- 8009de0:	6909      	ldr	r1, [r1, #16]
- 8009de2:	3301      	adds	r3, #1
- 8009de4:	eba5 0901 	sub.w	r9, r5, r1
- 8009de8:	6965      	ldr	r5, [r4, #20]
- 8009dea:	444b      	add	r3, r9
- 8009dec:	eb05 0545 	add.w	r5, r5, r5, lsl #1
- 8009df0:	eb05 75d5 	add.w	r5, r5, r5, lsr #31
- 8009df4:	106d      	asrs	r5, r5, #1
- 8009df6:	429d      	cmp	r5, r3
- 8009df8:	bf38      	it	cc
- 8009dfa:	461d      	movcc	r5, r3
- 8009dfc:	0553      	lsls	r3, r2, #21
- 8009dfe:	d531      	bpl.n	8009e64 <__ssputs_r+0xa0>
- 8009e00:	4629      	mov	r1, r5
- 8009e02:	f7fd fddb 	bl	80079bc <_malloc_r>
- 8009e06:	4606      	mov	r6, r0
- 8009e08:	b950      	cbnz	r0, 8009e20 <__ssputs_r+0x5c>
- 8009e0a:	230c      	movs	r3, #12
- 8009e0c:	f04f 30ff 	mov.w	r0, #4294967295
- 8009e10:	f8ca 3000 	str.w	r3, [sl]
- 8009e14:	89a3      	ldrh	r3, [r4, #12]
- 8009e16:	f043 0340 	orr.w	r3, r3, #64	; 0x40
- 8009e1a:	81a3      	strh	r3, [r4, #12]
- 8009e1c:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
- 8009e20:	464a      	mov	r2, r9
- 8009e22:	6921      	ldr	r1, [r4, #16]
- 8009e24:	f7ff fc24 	bl	8009670 <memcpy>
- 8009e28:	89a3      	ldrh	r3, [r4, #12]
- 8009e2a:	f423 6390 	bic.w	r3, r3, #1152	; 0x480
- 8009e2e:	f043 0380 	orr.w	r3, r3, #128	; 0x80
- 8009e32:	81a3      	strh	r3, [r4, #12]
- 8009e34:	6126      	str	r6, [r4, #16]
- 8009e36:	444e      	add	r6, r9
- 8009e38:	6026      	str	r6, [r4, #0]
- 8009e3a:	463e      	mov	r6, r7
- 8009e3c:	6165      	str	r5, [r4, #20]
- 8009e3e:	eba5 0509 	sub.w	r5, r5, r9
- 8009e42:	60a5      	str	r5, [r4, #8]
- 8009e44:	42be      	cmp	r6, r7
- 8009e46:	d900      	bls.n	8009e4a <__ssputs_r+0x86>
- 8009e48:	463e      	mov	r6, r7
- 8009e4a:	4632      	mov	r2, r6
- 8009e4c:	4641      	mov	r1, r8
- 8009e4e:	6820      	ldr	r0, [r4, #0]
- 8009e50:	f000 fb48 	bl	800a4e4 <memmove>
- 8009e54:	68a3      	ldr	r3, [r4, #8]
- 8009e56:	6822      	ldr	r2, [r4, #0]
- 8009e58:	1b9b      	subs	r3, r3, r6
- 8009e5a:	4432      	add	r2, r6
- 8009e5c:	2000      	movs	r0, #0
- 8009e5e:	60a3      	str	r3, [r4, #8]
- 8009e60:	6022      	str	r2, [r4, #0]
- 8009e62:	e7db      	b.n	8009e1c <__ssputs_r+0x58>
- 8009e64:	462a      	mov	r2, r5
- 8009e66:	f000 fb57 	bl	800a518 <_realloc_r>
- 8009e6a:	4606      	mov	r6, r0
- 8009e6c:	2800      	cmp	r0, #0
- 8009e6e:	d1e1      	bne.n	8009e34 <__ssputs_r+0x70>
- 8009e70:	4650      	mov	r0, sl
- 8009e72:	6921      	ldr	r1, [r4, #16]
- 8009e74:	f7fd fd56 	bl	8007924 <_free_r>
- 8009e78:	e7c7      	b.n	8009e0a <__ssputs_r+0x46>
+08009f38 <__sfputc_r>:
+ 8009f38:	6893      	ldr	r3, [r2, #8]
+ 8009f3a:	b410      	push	{r4}
+ 8009f3c:	3b01      	subs	r3, #1
+ 8009f3e:	2b00      	cmp	r3, #0
+ 8009f40:	6093      	str	r3, [r2, #8]
+ 8009f42:	da07      	bge.n	8009f54 <__sfputc_r+0x1c>
+ 8009f44:	6994      	ldr	r4, [r2, #24]
+ 8009f46:	42a3      	cmp	r3, r4
+ 8009f48:	db01      	blt.n	8009f4e <__sfputc_r+0x16>
+ 8009f4a:	290a      	cmp	r1, #10
+ 8009f4c:	d102      	bne.n	8009f54 <__sfputc_r+0x1c>
+ 8009f4e:	bc10      	pop	{r4}
+ 8009f50:	f7fe bb39 	b.w	80085c6 <__swbuf_r>
+ 8009f54:	6813      	ldr	r3, [r2, #0]
+ 8009f56:	1c58      	adds	r0, r3, #1
+ 8009f58:	6010      	str	r0, [r2, #0]
+ 8009f5a:	7019      	strb	r1, [r3, #0]
+ 8009f5c:	4608      	mov	r0, r1
+ 8009f5e:	bc10      	pop	{r4}
+ 8009f60:	4770      	bx	lr
+
+08009f62 <__sfputs_r>:
+ 8009f62:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 8009f64:	4606      	mov	r6, r0
+ 8009f66:	460f      	mov	r7, r1
+ 8009f68:	4614      	mov	r4, r2
+ 8009f6a:	18d5      	adds	r5, r2, r3
+ 8009f6c:	42ac      	cmp	r4, r5
+ 8009f6e:	d101      	bne.n	8009f74 <__sfputs_r+0x12>
+ 8009f70:	2000      	movs	r0, #0
+ 8009f72:	e007      	b.n	8009f84 <__sfputs_r+0x22>
+ 8009f74:	463a      	mov	r2, r7
+ 8009f76:	4630      	mov	r0, r6
+ 8009f78:	f814 1b01 	ldrb.w	r1, [r4], #1
+ 8009f7c:	f7ff ffdc 	bl	8009f38 <__sfputc_r>
+ 8009f80:	1c43      	adds	r3, r0, #1
+ 8009f82:	d1f3      	bne.n	8009f6c <__sfputs_r+0xa>
+ 8009f84:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 	...
 
-08009e7c <_svfiprintf_r>:
- 8009e7c:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 8009e80:	4698      	mov	r8, r3
- 8009e82:	898b      	ldrh	r3, [r1, #12]
- 8009e84:	4607      	mov	r7, r0
- 8009e86:	061b      	lsls	r3, r3, #24
- 8009e88:	460d      	mov	r5, r1
- 8009e8a:	4614      	mov	r4, r2
- 8009e8c:	b09d      	sub	sp, #116	; 0x74
- 8009e8e:	d50e      	bpl.n	8009eae <_svfiprintf_r+0x32>
- 8009e90:	690b      	ldr	r3, [r1, #16]
- 8009e92:	b963      	cbnz	r3, 8009eae <_svfiprintf_r+0x32>
- 8009e94:	2140      	movs	r1, #64	; 0x40
- 8009e96:	f7fd fd91 	bl	80079bc <_malloc_r>
- 8009e9a:	6028      	str	r0, [r5, #0]
- 8009e9c:	6128      	str	r0, [r5, #16]
- 8009e9e:	b920      	cbnz	r0, 8009eaa <_svfiprintf_r+0x2e>
- 8009ea0:	230c      	movs	r3, #12
- 8009ea2:	603b      	str	r3, [r7, #0]
- 8009ea4:	f04f 30ff 	mov.w	r0, #4294967295
- 8009ea8:	e0d1      	b.n	800a04e <_svfiprintf_r+0x1d2>
- 8009eaa:	2340      	movs	r3, #64	; 0x40
- 8009eac:	616b      	str	r3, [r5, #20]
- 8009eae:	2300      	movs	r3, #0
- 8009eb0:	9309      	str	r3, [sp, #36]	; 0x24
- 8009eb2:	2320      	movs	r3, #32
- 8009eb4:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
- 8009eb8:	2330      	movs	r3, #48	; 0x30
- 8009eba:	f04f 0901 	mov.w	r9, #1
- 8009ebe:	f8cd 800c 	str.w	r8, [sp, #12]
- 8009ec2:	f8df 81a4 	ldr.w	r8, [pc, #420]	; 800a068 <_svfiprintf_r+0x1ec>
- 8009ec6:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
- 8009eca:	4623      	mov	r3, r4
- 8009ecc:	469a      	mov	sl, r3
- 8009ece:	f813 2b01 	ldrb.w	r2, [r3], #1
- 8009ed2:	b10a      	cbz	r2, 8009ed8 <_svfiprintf_r+0x5c>
- 8009ed4:	2a25      	cmp	r2, #37	; 0x25
- 8009ed6:	d1f9      	bne.n	8009ecc <_svfiprintf_r+0x50>
- 8009ed8:	ebba 0b04 	subs.w	fp, sl, r4
- 8009edc:	d00b      	beq.n	8009ef6 <_svfiprintf_r+0x7a>
- 8009ede:	465b      	mov	r3, fp
- 8009ee0:	4622      	mov	r2, r4
- 8009ee2:	4629      	mov	r1, r5
- 8009ee4:	4638      	mov	r0, r7
- 8009ee6:	f7ff ff6d 	bl	8009dc4 <__ssputs_r>
- 8009eea:	3001      	adds	r0, #1
- 8009eec:	f000 80aa 	beq.w	800a044 <_svfiprintf_r+0x1c8>
- 8009ef0:	9a09      	ldr	r2, [sp, #36]	; 0x24
- 8009ef2:	445a      	add	r2, fp
- 8009ef4:	9209      	str	r2, [sp, #36]	; 0x24
- 8009ef6:	f89a 3000 	ldrb.w	r3, [sl]
- 8009efa:	2b00      	cmp	r3, #0
- 8009efc:	f000 80a2 	beq.w	800a044 <_svfiprintf_r+0x1c8>
- 8009f00:	2300      	movs	r3, #0
- 8009f02:	f04f 32ff 	mov.w	r2, #4294967295
- 8009f06:	e9cd 2305 	strd	r2, r3, [sp, #20]
- 8009f0a:	f10a 0a01 	add.w	sl, sl, #1
- 8009f0e:	9304      	str	r3, [sp, #16]
- 8009f10:	9307      	str	r3, [sp, #28]
- 8009f12:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
- 8009f16:	931a      	str	r3, [sp, #104]	; 0x68
- 8009f18:	4654      	mov	r4, sl
- 8009f1a:	2205      	movs	r2, #5
- 8009f1c:	f814 1b01 	ldrb.w	r1, [r4], #1
- 8009f20:	4851      	ldr	r0, [pc, #324]	; (800a068 <_svfiprintf_r+0x1ec>)
- 8009f22:	f7ff fb97 	bl	8009654 <memchr>
- 8009f26:	9a04      	ldr	r2, [sp, #16]
- 8009f28:	b9d8      	cbnz	r0, 8009f62 <_svfiprintf_r+0xe6>
- 8009f2a:	06d0      	lsls	r0, r2, #27
- 8009f2c:	bf44      	itt	mi
- 8009f2e:	2320      	movmi	r3, #32
- 8009f30:	f88d 3053 	strbmi.w	r3, [sp, #83]	; 0x53
- 8009f34:	0711      	lsls	r1, r2, #28
- 8009f36:	bf44      	itt	mi
- 8009f38:	232b      	movmi	r3, #43	; 0x2b
- 8009f3a:	f88d 3053 	strbmi.w	r3, [sp, #83]	; 0x53
- 8009f3e:	f89a 3000 	ldrb.w	r3, [sl]
- 8009f42:	2b2a      	cmp	r3, #42	; 0x2a
- 8009f44:	d015      	beq.n	8009f72 <_svfiprintf_r+0xf6>
- 8009f46:	4654      	mov	r4, sl
- 8009f48:	2000      	movs	r0, #0
- 8009f4a:	f04f 0c0a 	mov.w	ip, #10
- 8009f4e:	9a07      	ldr	r2, [sp, #28]
- 8009f50:	4621      	mov	r1, r4
- 8009f52:	f811 3b01 	ldrb.w	r3, [r1], #1
- 8009f56:	3b30      	subs	r3, #48	; 0x30
- 8009f58:	2b09      	cmp	r3, #9
- 8009f5a:	d94e      	bls.n	8009ffa <_svfiprintf_r+0x17e>
- 8009f5c:	b1b0      	cbz	r0, 8009f8c <_svfiprintf_r+0x110>
- 8009f5e:	9207      	str	r2, [sp, #28]
- 8009f60:	e014      	b.n	8009f8c <_svfiprintf_r+0x110>
- 8009f62:	eba0 0308 	sub.w	r3, r0, r8
- 8009f66:	fa09 f303 	lsl.w	r3, r9, r3
- 8009f6a:	4313      	orrs	r3, r2
- 8009f6c:	46a2      	mov	sl, r4
- 8009f6e:	9304      	str	r3, [sp, #16]
- 8009f70:	e7d2      	b.n	8009f18 <_svfiprintf_r+0x9c>
- 8009f72:	9b03      	ldr	r3, [sp, #12]
- 8009f74:	1d19      	adds	r1, r3, #4
- 8009f76:	681b      	ldr	r3, [r3, #0]
- 8009f78:	9103      	str	r1, [sp, #12]
- 8009f7a:	2b00      	cmp	r3, #0
- 8009f7c:	bfbb      	ittet	lt
- 8009f7e:	425b      	neglt	r3, r3
- 8009f80:	f042 0202 	orrlt.w	r2, r2, #2
- 8009f84:	9307      	strge	r3, [sp, #28]
- 8009f86:	9307      	strlt	r3, [sp, #28]
- 8009f88:	bfb8      	it	lt
- 8009f8a:	9204      	strlt	r2, [sp, #16]
- 8009f8c:	7823      	ldrb	r3, [r4, #0]
- 8009f8e:	2b2e      	cmp	r3, #46	; 0x2e
- 8009f90:	d10c      	bne.n	8009fac <_svfiprintf_r+0x130>
- 8009f92:	7863      	ldrb	r3, [r4, #1]
- 8009f94:	2b2a      	cmp	r3, #42	; 0x2a
- 8009f96:	d135      	bne.n	800a004 <_svfiprintf_r+0x188>
- 8009f98:	9b03      	ldr	r3, [sp, #12]
- 8009f9a:	3402      	adds	r4, #2
- 8009f9c:	1d1a      	adds	r2, r3, #4
- 8009f9e:	681b      	ldr	r3, [r3, #0]
- 8009fa0:	9203      	str	r2, [sp, #12]
- 8009fa2:	2b00      	cmp	r3, #0
- 8009fa4:	bfb8      	it	lt
- 8009fa6:	f04f 33ff 	movlt.w	r3, #4294967295
- 8009faa:	9305      	str	r3, [sp, #20]
- 8009fac:	f8df a0c8 	ldr.w	sl, [pc, #200]	; 800a078 <_svfiprintf_r+0x1fc>
- 8009fb0:	2203      	movs	r2, #3
- 8009fb2:	4650      	mov	r0, sl
- 8009fb4:	7821      	ldrb	r1, [r4, #0]
- 8009fb6:	f7ff fb4d 	bl	8009654 <memchr>
- 8009fba:	b140      	cbz	r0, 8009fce <_svfiprintf_r+0x152>
- 8009fbc:	2340      	movs	r3, #64	; 0x40
- 8009fbe:	eba0 000a 	sub.w	r0, r0, sl
- 8009fc2:	fa03 f000 	lsl.w	r0, r3, r0
- 8009fc6:	9b04      	ldr	r3, [sp, #16]
- 8009fc8:	3401      	adds	r4, #1
- 8009fca:	4303      	orrs	r3, r0
- 8009fcc:	9304      	str	r3, [sp, #16]
- 8009fce:	f814 1b01 	ldrb.w	r1, [r4], #1
- 8009fd2:	2206      	movs	r2, #6
- 8009fd4:	4825      	ldr	r0, [pc, #148]	; (800a06c <_svfiprintf_r+0x1f0>)
- 8009fd6:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
- 8009fda:	f7ff fb3b 	bl	8009654 <memchr>
- 8009fde:	2800      	cmp	r0, #0
- 8009fe0:	d038      	beq.n	800a054 <_svfiprintf_r+0x1d8>
- 8009fe2:	4b23      	ldr	r3, [pc, #140]	; (800a070 <_svfiprintf_r+0x1f4>)
- 8009fe4:	bb1b      	cbnz	r3, 800a02e <_svfiprintf_r+0x1b2>
- 8009fe6:	9b03      	ldr	r3, [sp, #12]
- 8009fe8:	3307      	adds	r3, #7
- 8009fea:	f023 0307 	bic.w	r3, r3, #7
- 8009fee:	3308      	adds	r3, #8
- 8009ff0:	9303      	str	r3, [sp, #12]
- 8009ff2:	9b09      	ldr	r3, [sp, #36]	; 0x24
- 8009ff4:	4433      	add	r3, r6
- 8009ff6:	9309      	str	r3, [sp, #36]	; 0x24
- 8009ff8:	e767      	b.n	8009eca <_svfiprintf_r+0x4e>
- 8009ffa:	460c      	mov	r4, r1
- 8009ffc:	2001      	movs	r0, #1
- 8009ffe:	fb0c 3202 	mla	r2, ip, r2, r3
- 800a002:	e7a5      	b.n	8009f50 <_svfiprintf_r+0xd4>
- 800a004:	2300      	movs	r3, #0
- 800a006:	f04f 0c0a 	mov.w	ip, #10
- 800a00a:	4619      	mov	r1, r3
- 800a00c:	3401      	adds	r4, #1
- 800a00e:	9305      	str	r3, [sp, #20]
- 800a010:	4620      	mov	r0, r4
- 800a012:	f810 2b01 	ldrb.w	r2, [r0], #1
- 800a016:	3a30      	subs	r2, #48	; 0x30
- 800a018:	2a09      	cmp	r2, #9
- 800a01a:	d903      	bls.n	800a024 <_svfiprintf_r+0x1a8>
- 800a01c:	2b00      	cmp	r3, #0
- 800a01e:	d0c5      	beq.n	8009fac <_svfiprintf_r+0x130>
- 800a020:	9105      	str	r1, [sp, #20]
- 800a022:	e7c3      	b.n	8009fac <_svfiprintf_r+0x130>
- 800a024:	4604      	mov	r4, r0
- 800a026:	2301      	movs	r3, #1
- 800a028:	fb0c 2101 	mla	r1, ip, r1, r2
- 800a02c:	e7f0      	b.n	800a010 <_svfiprintf_r+0x194>
- 800a02e:	ab03      	add	r3, sp, #12
- 800a030:	9300      	str	r3, [sp, #0]
- 800a032:	462a      	mov	r2, r5
- 800a034:	4638      	mov	r0, r7
- 800a036:	4b0f      	ldr	r3, [pc, #60]	; (800a074 <_svfiprintf_r+0x1f8>)
- 800a038:	a904      	add	r1, sp, #16
- 800a03a:	f7fd fdb7 	bl	8007bac <_printf_float>
- 800a03e:	1c42      	adds	r2, r0, #1
- 800a040:	4606      	mov	r6, r0
- 800a042:	d1d6      	bne.n	8009ff2 <_svfiprintf_r+0x176>
- 800a044:	89ab      	ldrh	r3, [r5, #12]
- 800a046:	065b      	lsls	r3, r3, #25
- 800a048:	f53f af2c 	bmi.w	8009ea4 <_svfiprintf_r+0x28>
- 800a04c:	9809      	ldr	r0, [sp, #36]	; 0x24
- 800a04e:	b01d      	add	sp, #116	; 0x74
- 800a050:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800a054:	ab03      	add	r3, sp, #12
- 800a056:	9300      	str	r3, [sp, #0]
- 800a058:	462a      	mov	r2, r5
- 800a05a:	4638      	mov	r0, r7
- 800a05c:	4b05      	ldr	r3, [pc, #20]	; (800a074 <_svfiprintf_r+0x1f8>)
- 800a05e:	a904      	add	r1, sp, #16
- 800a060:	f7fe f840 	bl	80080e4 <_printf_i>
- 800a064:	e7eb      	b.n	800a03e <_svfiprintf_r+0x1c2>
- 800a066:	bf00      	nop
- 800a068:	0800b4dc 	.word	0x0800b4dc
- 800a06c:	0800b4e6 	.word	0x0800b4e6
- 800a070:	08007bad 	.word	0x08007bad
- 800a074:	08009dc5 	.word	0x08009dc5
- 800a078:	0800b4e2 	.word	0x0800b4e2
+08009f88 <_vfiprintf_r>:
+ 8009f88:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 8009f8c:	460d      	mov	r5, r1
+ 8009f8e:	4614      	mov	r4, r2
+ 8009f90:	4698      	mov	r8, r3
+ 8009f92:	4606      	mov	r6, r0
+ 8009f94:	b09d      	sub	sp, #116	; 0x74
+ 8009f96:	b118      	cbz	r0, 8009fa0 <_vfiprintf_r+0x18>
+ 8009f98:	6a03      	ldr	r3, [r0, #32]
+ 8009f9a:	b90b      	cbnz	r3, 8009fa0 <_vfiprintf_r+0x18>
+ 8009f9c:	f7fe fa7a 	bl	8008494 <__sinit>
+ 8009fa0:	6e6b      	ldr	r3, [r5, #100]	; 0x64
+ 8009fa2:	07d9      	lsls	r1, r3, #31
+ 8009fa4:	d405      	bmi.n	8009fb2 <_vfiprintf_r+0x2a>
+ 8009fa6:	89ab      	ldrh	r3, [r5, #12]
+ 8009fa8:	059a      	lsls	r2, r3, #22
+ 8009faa:	d402      	bmi.n	8009fb2 <_vfiprintf_r+0x2a>
+ 8009fac:	6da8      	ldr	r0, [r5, #88]	; 0x58
+ 8009fae:	f7fe fc2c 	bl	800880a <__retarget_lock_acquire_recursive>
+ 8009fb2:	89ab      	ldrh	r3, [r5, #12]
+ 8009fb4:	071b      	lsls	r3, r3, #28
+ 8009fb6:	d501      	bpl.n	8009fbc <_vfiprintf_r+0x34>
+ 8009fb8:	692b      	ldr	r3, [r5, #16]
+ 8009fba:	b99b      	cbnz	r3, 8009fe4 <_vfiprintf_r+0x5c>
+ 8009fbc:	4629      	mov	r1, r5
+ 8009fbe:	4630      	mov	r0, r6
+ 8009fc0:	f7fe fb3e 	bl	8008640 <__swsetup_r>
+ 8009fc4:	b170      	cbz	r0, 8009fe4 <_vfiprintf_r+0x5c>
+ 8009fc6:	6e6b      	ldr	r3, [r5, #100]	; 0x64
+ 8009fc8:	07dc      	lsls	r4, r3, #31
+ 8009fca:	d504      	bpl.n	8009fd6 <_vfiprintf_r+0x4e>
+ 8009fcc:	f04f 30ff 	mov.w	r0, #4294967295
+ 8009fd0:	b01d      	add	sp, #116	; 0x74
+ 8009fd2:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
+ 8009fd6:	89ab      	ldrh	r3, [r5, #12]
+ 8009fd8:	0598      	lsls	r0, r3, #22
+ 8009fda:	d4f7      	bmi.n	8009fcc <_vfiprintf_r+0x44>
+ 8009fdc:	6da8      	ldr	r0, [r5, #88]	; 0x58
+ 8009fde:	f7fe fc15 	bl	800880c <__retarget_lock_release_recursive>
+ 8009fe2:	e7f3      	b.n	8009fcc <_vfiprintf_r+0x44>
+ 8009fe4:	2300      	movs	r3, #0
+ 8009fe6:	9309      	str	r3, [sp, #36]	; 0x24
+ 8009fe8:	2320      	movs	r3, #32
+ 8009fea:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
+ 8009fee:	2330      	movs	r3, #48	; 0x30
+ 8009ff0:	f04f 0901 	mov.w	r9, #1
+ 8009ff4:	f8cd 800c 	str.w	r8, [sp, #12]
+ 8009ff8:	f8df 81ac 	ldr.w	r8, [pc, #428]	; 800a1a8 <_vfiprintf_r+0x220>
+ 8009ffc:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
+ 800a000:	4623      	mov	r3, r4
+ 800a002:	469a      	mov	sl, r3
+ 800a004:	f813 2b01 	ldrb.w	r2, [r3], #1
+ 800a008:	b10a      	cbz	r2, 800a00e <_vfiprintf_r+0x86>
+ 800a00a:	2a25      	cmp	r2, #37	; 0x25
+ 800a00c:	d1f9      	bne.n	800a002 <_vfiprintf_r+0x7a>
+ 800a00e:	ebba 0b04 	subs.w	fp, sl, r4
+ 800a012:	d00b      	beq.n	800a02c <_vfiprintf_r+0xa4>
+ 800a014:	465b      	mov	r3, fp
+ 800a016:	4622      	mov	r2, r4
+ 800a018:	4629      	mov	r1, r5
+ 800a01a:	4630      	mov	r0, r6
+ 800a01c:	f7ff ffa1 	bl	8009f62 <__sfputs_r>
+ 800a020:	3001      	adds	r0, #1
+ 800a022:	f000 80a9 	beq.w	800a178 <_vfiprintf_r+0x1f0>
+ 800a026:	9a09      	ldr	r2, [sp, #36]	; 0x24
+ 800a028:	445a      	add	r2, fp
+ 800a02a:	9209      	str	r2, [sp, #36]	; 0x24
+ 800a02c:	f89a 3000 	ldrb.w	r3, [sl]
+ 800a030:	2b00      	cmp	r3, #0
+ 800a032:	f000 80a1 	beq.w	800a178 <_vfiprintf_r+0x1f0>
+ 800a036:	2300      	movs	r3, #0
+ 800a038:	f04f 32ff 	mov.w	r2, #4294967295
+ 800a03c:	e9cd 2305 	strd	r2, r3, [sp, #20]
+ 800a040:	f10a 0a01 	add.w	sl, sl, #1
+ 800a044:	9304      	str	r3, [sp, #16]
+ 800a046:	9307      	str	r3, [sp, #28]
+ 800a048:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
+ 800a04c:	931a      	str	r3, [sp, #104]	; 0x68
+ 800a04e:	4654      	mov	r4, sl
+ 800a050:	2205      	movs	r2, #5
+ 800a052:	f814 1b01 	ldrb.w	r1, [r4], #1
+ 800a056:	4854      	ldr	r0, [pc, #336]	; (800a1a8 <_vfiprintf_r+0x220>)
+ 800a058:	f7fe fbd9 	bl	800880e <memchr>
+ 800a05c:	9a04      	ldr	r2, [sp, #16]
+ 800a05e:	b9d8      	cbnz	r0, 800a098 <_vfiprintf_r+0x110>
+ 800a060:	06d1      	lsls	r1, r2, #27
+ 800a062:	bf44      	itt	mi
+ 800a064:	2320      	movmi	r3, #32
+ 800a066:	f88d 3053 	strbmi.w	r3, [sp, #83]	; 0x53
+ 800a06a:	0713      	lsls	r3, r2, #28
+ 800a06c:	bf44      	itt	mi
+ 800a06e:	232b      	movmi	r3, #43	; 0x2b
+ 800a070:	f88d 3053 	strbmi.w	r3, [sp, #83]	; 0x53
+ 800a074:	f89a 3000 	ldrb.w	r3, [sl]
+ 800a078:	2b2a      	cmp	r3, #42	; 0x2a
+ 800a07a:	d015      	beq.n	800a0a8 <_vfiprintf_r+0x120>
+ 800a07c:	4654      	mov	r4, sl
+ 800a07e:	2000      	movs	r0, #0
+ 800a080:	f04f 0c0a 	mov.w	ip, #10
+ 800a084:	9a07      	ldr	r2, [sp, #28]
+ 800a086:	4621      	mov	r1, r4
+ 800a088:	f811 3b01 	ldrb.w	r3, [r1], #1
+ 800a08c:	3b30      	subs	r3, #48	; 0x30
+ 800a08e:	2b09      	cmp	r3, #9
+ 800a090:	d94d      	bls.n	800a12e <_vfiprintf_r+0x1a6>
+ 800a092:	b1b0      	cbz	r0, 800a0c2 <_vfiprintf_r+0x13a>
+ 800a094:	9207      	str	r2, [sp, #28]
+ 800a096:	e014      	b.n	800a0c2 <_vfiprintf_r+0x13a>
+ 800a098:	eba0 0308 	sub.w	r3, r0, r8
+ 800a09c:	fa09 f303 	lsl.w	r3, r9, r3
+ 800a0a0:	4313      	orrs	r3, r2
+ 800a0a2:	46a2      	mov	sl, r4
+ 800a0a4:	9304      	str	r3, [sp, #16]
+ 800a0a6:	e7d2      	b.n	800a04e <_vfiprintf_r+0xc6>
+ 800a0a8:	9b03      	ldr	r3, [sp, #12]
+ 800a0aa:	1d19      	adds	r1, r3, #4
+ 800a0ac:	681b      	ldr	r3, [r3, #0]
+ 800a0ae:	9103      	str	r1, [sp, #12]
+ 800a0b0:	2b00      	cmp	r3, #0
+ 800a0b2:	bfbb      	ittet	lt
+ 800a0b4:	425b      	neglt	r3, r3
+ 800a0b6:	f042 0202 	orrlt.w	r2, r2, #2
+ 800a0ba:	9307      	strge	r3, [sp, #28]
+ 800a0bc:	9307      	strlt	r3, [sp, #28]
+ 800a0be:	bfb8      	it	lt
+ 800a0c0:	9204      	strlt	r2, [sp, #16]
+ 800a0c2:	7823      	ldrb	r3, [r4, #0]
+ 800a0c4:	2b2e      	cmp	r3, #46	; 0x2e
+ 800a0c6:	d10c      	bne.n	800a0e2 <_vfiprintf_r+0x15a>
+ 800a0c8:	7863      	ldrb	r3, [r4, #1]
+ 800a0ca:	2b2a      	cmp	r3, #42	; 0x2a
+ 800a0cc:	d134      	bne.n	800a138 <_vfiprintf_r+0x1b0>
+ 800a0ce:	9b03      	ldr	r3, [sp, #12]
+ 800a0d0:	3402      	adds	r4, #2
+ 800a0d2:	1d1a      	adds	r2, r3, #4
+ 800a0d4:	681b      	ldr	r3, [r3, #0]
+ 800a0d6:	9203      	str	r2, [sp, #12]
+ 800a0d8:	2b00      	cmp	r3, #0
+ 800a0da:	bfb8      	it	lt
+ 800a0dc:	f04f 33ff 	movlt.w	r3, #4294967295
+ 800a0e0:	9305      	str	r3, [sp, #20]
+ 800a0e2:	f8df a0c8 	ldr.w	sl, [pc, #200]	; 800a1ac <_vfiprintf_r+0x224>
+ 800a0e6:	2203      	movs	r2, #3
+ 800a0e8:	4650      	mov	r0, sl
+ 800a0ea:	7821      	ldrb	r1, [r4, #0]
+ 800a0ec:	f7fe fb8f 	bl	800880e <memchr>
+ 800a0f0:	b138      	cbz	r0, 800a102 <_vfiprintf_r+0x17a>
+ 800a0f2:	2240      	movs	r2, #64	; 0x40
+ 800a0f4:	9b04      	ldr	r3, [sp, #16]
+ 800a0f6:	eba0 000a 	sub.w	r0, r0, sl
+ 800a0fa:	4082      	lsls	r2, r0
+ 800a0fc:	4313      	orrs	r3, r2
+ 800a0fe:	3401      	adds	r4, #1
+ 800a100:	9304      	str	r3, [sp, #16]
+ 800a102:	f814 1b01 	ldrb.w	r1, [r4], #1
+ 800a106:	2206      	movs	r2, #6
+ 800a108:	4829      	ldr	r0, [pc, #164]	; (800a1b0 <_vfiprintf_r+0x228>)
+ 800a10a:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
+ 800a10e:	f7fe fb7e 	bl	800880e <memchr>
+ 800a112:	2800      	cmp	r0, #0
+ 800a114:	d03f      	beq.n	800a196 <_vfiprintf_r+0x20e>
+ 800a116:	4b27      	ldr	r3, [pc, #156]	; (800a1b4 <_vfiprintf_r+0x22c>)
+ 800a118:	bb1b      	cbnz	r3, 800a162 <_vfiprintf_r+0x1da>
+ 800a11a:	9b03      	ldr	r3, [sp, #12]
+ 800a11c:	3307      	adds	r3, #7
+ 800a11e:	f023 0307 	bic.w	r3, r3, #7
+ 800a122:	3308      	adds	r3, #8
+ 800a124:	9303      	str	r3, [sp, #12]
+ 800a126:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 800a128:	443b      	add	r3, r7
+ 800a12a:	9309      	str	r3, [sp, #36]	; 0x24
+ 800a12c:	e768      	b.n	800a000 <_vfiprintf_r+0x78>
+ 800a12e:	460c      	mov	r4, r1
+ 800a130:	2001      	movs	r0, #1
+ 800a132:	fb0c 3202 	mla	r2, ip, r2, r3
+ 800a136:	e7a6      	b.n	800a086 <_vfiprintf_r+0xfe>
+ 800a138:	2300      	movs	r3, #0
+ 800a13a:	f04f 0c0a 	mov.w	ip, #10
+ 800a13e:	4619      	mov	r1, r3
+ 800a140:	3401      	adds	r4, #1
+ 800a142:	9305      	str	r3, [sp, #20]
+ 800a144:	4620      	mov	r0, r4
+ 800a146:	f810 2b01 	ldrb.w	r2, [r0], #1
+ 800a14a:	3a30      	subs	r2, #48	; 0x30
+ 800a14c:	2a09      	cmp	r2, #9
+ 800a14e:	d903      	bls.n	800a158 <_vfiprintf_r+0x1d0>
+ 800a150:	2b00      	cmp	r3, #0
+ 800a152:	d0c6      	beq.n	800a0e2 <_vfiprintf_r+0x15a>
+ 800a154:	9105      	str	r1, [sp, #20]
+ 800a156:	e7c4      	b.n	800a0e2 <_vfiprintf_r+0x15a>
+ 800a158:	4604      	mov	r4, r0
+ 800a15a:	2301      	movs	r3, #1
+ 800a15c:	fb0c 2101 	mla	r1, ip, r1, r2
+ 800a160:	e7f0      	b.n	800a144 <_vfiprintf_r+0x1bc>
+ 800a162:	ab03      	add	r3, sp, #12
+ 800a164:	9300      	str	r3, [sp, #0]
+ 800a166:	462a      	mov	r2, r5
+ 800a168:	4630      	mov	r0, r6
+ 800a16a:	4b13      	ldr	r3, [pc, #76]	; (800a1b8 <_vfiprintf_r+0x230>)
+ 800a16c:	a904      	add	r1, sp, #16
+ 800a16e:	f7fd fd43 	bl	8007bf8 <_printf_float>
+ 800a172:	4607      	mov	r7, r0
+ 800a174:	1c78      	adds	r0, r7, #1
+ 800a176:	d1d6      	bne.n	800a126 <_vfiprintf_r+0x19e>
+ 800a178:	6e6b      	ldr	r3, [r5, #100]	; 0x64
+ 800a17a:	07d9      	lsls	r1, r3, #31
+ 800a17c:	d405      	bmi.n	800a18a <_vfiprintf_r+0x202>
+ 800a17e:	89ab      	ldrh	r3, [r5, #12]
+ 800a180:	059a      	lsls	r2, r3, #22
+ 800a182:	d402      	bmi.n	800a18a <_vfiprintf_r+0x202>
+ 800a184:	6da8      	ldr	r0, [r5, #88]	; 0x58
+ 800a186:	f7fe fb41 	bl	800880c <__retarget_lock_release_recursive>
+ 800a18a:	89ab      	ldrh	r3, [r5, #12]
+ 800a18c:	065b      	lsls	r3, r3, #25
+ 800a18e:	f53f af1d 	bmi.w	8009fcc <_vfiprintf_r+0x44>
+ 800a192:	9809      	ldr	r0, [sp, #36]	; 0x24
+ 800a194:	e71c      	b.n	8009fd0 <_vfiprintf_r+0x48>
+ 800a196:	ab03      	add	r3, sp, #12
+ 800a198:	9300      	str	r3, [sp, #0]
+ 800a19a:	462a      	mov	r2, r5
+ 800a19c:	4630      	mov	r0, r6
+ 800a19e:	4b06      	ldr	r3, [pc, #24]	; (800a1b8 <_vfiprintf_r+0x230>)
+ 800a1a0:	a904      	add	r1, sp, #16
+ 800a1a2:	f7fd ffc9 	bl	8008138 <_printf_i>
+ 800a1a6:	e7e4      	b.n	800a172 <_vfiprintf_r+0x1ea>
+ 800a1a8:	0800b45c 	.word	0x0800b45c
+ 800a1ac:	0800b462 	.word	0x0800b462
+ 800a1b0:	0800b466 	.word	0x0800b466
+ 800a1b4:	08007bf9 	.word	0x08007bf9
+ 800a1b8:	08009f63 	.word	0x08009f63
 
-0800a07c <__sfputc_r>:
- 800a07c:	6893      	ldr	r3, [r2, #8]
- 800a07e:	b410      	push	{r4}
- 800a080:	3b01      	subs	r3, #1
- 800a082:	2b00      	cmp	r3, #0
- 800a084:	6093      	str	r3, [r2, #8]
- 800a086:	da07      	bge.n	800a098 <__sfputc_r+0x1c>
- 800a088:	6994      	ldr	r4, [r2, #24]
- 800a08a:	42a3      	cmp	r3, r4
- 800a08c:	db01      	blt.n	800a092 <__sfputc_r+0x16>
- 800a08e:	290a      	cmp	r1, #10
- 800a090:	d102      	bne.n	800a098 <__sfputc_r+0x1c>
- 800a092:	bc10      	pop	{r4}
- 800a094:	f7fe b97c 	b.w	8008390 <__swbuf_r>
- 800a098:	6813      	ldr	r3, [r2, #0]
- 800a09a:	1c58      	adds	r0, r3, #1
- 800a09c:	6010      	str	r0, [r2, #0]
- 800a09e:	7019      	strb	r1, [r3, #0]
- 800a0a0:	4608      	mov	r0, r1
- 800a0a2:	bc10      	pop	{r4}
- 800a0a4:	4770      	bx	lr
+0800a1bc <__sflush_r>:
+ 800a1bc:	898a      	ldrh	r2, [r1, #12]
+ 800a1be:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 800a1c0:	4605      	mov	r5, r0
+ 800a1c2:	0710      	lsls	r0, r2, #28
+ 800a1c4:	460c      	mov	r4, r1
+ 800a1c6:	d457      	bmi.n	800a278 <__sflush_r+0xbc>
+ 800a1c8:	684b      	ldr	r3, [r1, #4]
+ 800a1ca:	2b00      	cmp	r3, #0
+ 800a1cc:	dc04      	bgt.n	800a1d8 <__sflush_r+0x1c>
+ 800a1ce:	6c0b      	ldr	r3, [r1, #64]	; 0x40
+ 800a1d0:	2b00      	cmp	r3, #0
+ 800a1d2:	dc01      	bgt.n	800a1d8 <__sflush_r+0x1c>
+ 800a1d4:	2000      	movs	r0, #0
+ 800a1d6:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
+ 800a1d8:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
+ 800a1da:	2e00      	cmp	r6, #0
+ 800a1dc:	d0fa      	beq.n	800a1d4 <__sflush_r+0x18>
+ 800a1de:	2300      	movs	r3, #0
+ 800a1e0:	f412 5280 	ands.w	r2, r2, #4096	; 0x1000
+ 800a1e4:	682f      	ldr	r7, [r5, #0]
+ 800a1e6:	6a21      	ldr	r1, [r4, #32]
+ 800a1e8:	602b      	str	r3, [r5, #0]
+ 800a1ea:	d032      	beq.n	800a252 <__sflush_r+0x96>
+ 800a1ec:	6d60      	ldr	r0, [r4, #84]	; 0x54
+ 800a1ee:	89a3      	ldrh	r3, [r4, #12]
+ 800a1f0:	075a      	lsls	r2, r3, #29
+ 800a1f2:	d505      	bpl.n	800a200 <__sflush_r+0x44>
+ 800a1f4:	6863      	ldr	r3, [r4, #4]
+ 800a1f6:	1ac0      	subs	r0, r0, r3
+ 800a1f8:	6b63      	ldr	r3, [r4, #52]	; 0x34
+ 800a1fa:	b10b      	cbz	r3, 800a200 <__sflush_r+0x44>
+ 800a1fc:	6c23      	ldr	r3, [r4, #64]	; 0x40
+ 800a1fe:	1ac0      	subs	r0, r0, r3
+ 800a200:	2300      	movs	r3, #0
+ 800a202:	4602      	mov	r2, r0
+ 800a204:	6ae6      	ldr	r6, [r4, #44]	; 0x2c
+ 800a206:	4628      	mov	r0, r5
+ 800a208:	6a21      	ldr	r1, [r4, #32]
+ 800a20a:	47b0      	blx	r6
+ 800a20c:	1c43      	adds	r3, r0, #1
+ 800a20e:	89a3      	ldrh	r3, [r4, #12]
+ 800a210:	d106      	bne.n	800a220 <__sflush_r+0x64>
+ 800a212:	6829      	ldr	r1, [r5, #0]
+ 800a214:	291d      	cmp	r1, #29
+ 800a216:	d82b      	bhi.n	800a270 <__sflush_r+0xb4>
+ 800a218:	4a28      	ldr	r2, [pc, #160]	; (800a2bc <__sflush_r+0x100>)
+ 800a21a:	410a      	asrs	r2, r1
+ 800a21c:	07d6      	lsls	r6, r2, #31
+ 800a21e:	d427      	bmi.n	800a270 <__sflush_r+0xb4>
+ 800a220:	2200      	movs	r2, #0
+ 800a222:	6062      	str	r2, [r4, #4]
+ 800a224:	6922      	ldr	r2, [r4, #16]
+ 800a226:	04d9      	lsls	r1, r3, #19
+ 800a228:	6022      	str	r2, [r4, #0]
+ 800a22a:	d504      	bpl.n	800a236 <__sflush_r+0x7a>
+ 800a22c:	1c42      	adds	r2, r0, #1
+ 800a22e:	d101      	bne.n	800a234 <__sflush_r+0x78>
+ 800a230:	682b      	ldr	r3, [r5, #0]
+ 800a232:	b903      	cbnz	r3, 800a236 <__sflush_r+0x7a>
+ 800a234:	6560      	str	r0, [r4, #84]	; 0x54
+ 800a236:	6b61      	ldr	r1, [r4, #52]	; 0x34
+ 800a238:	602f      	str	r7, [r5, #0]
+ 800a23a:	2900      	cmp	r1, #0
+ 800a23c:	d0ca      	beq.n	800a1d4 <__sflush_r+0x18>
+ 800a23e:	f104 0344 	add.w	r3, r4, #68	; 0x44
+ 800a242:	4299      	cmp	r1, r3
+ 800a244:	d002      	beq.n	800a24c <__sflush_r+0x90>
+ 800a246:	4628      	mov	r0, r5
+ 800a248:	f7ff f95e 	bl	8009508 <_free_r>
+ 800a24c:	2000      	movs	r0, #0
+ 800a24e:	6360      	str	r0, [r4, #52]	; 0x34
+ 800a250:	e7c1      	b.n	800a1d6 <__sflush_r+0x1a>
+ 800a252:	2301      	movs	r3, #1
+ 800a254:	4628      	mov	r0, r5
+ 800a256:	47b0      	blx	r6
+ 800a258:	1c41      	adds	r1, r0, #1
+ 800a25a:	d1c8      	bne.n	800a1ee <__sflush_r+0x32>
+ 800a25c:	682b      	ldr	r3, [r5, #0]
+ 800a25e:	2b00      	cmp	r3, #0
+ 800a260:	d0c5      	beq.n	800a1ee <__sflush_r+0x32>
+ 800a262:	2b1d      	cmp	r3, #29
+ 800a264:	d001      	beq.n	800a26a <__sflush_r+0xae>
+ 800a266:	2b16      	cmp	r3, #22
+ 800a268:	d101      	bne.n	800a26e <__sflush_r+0xb2>
+ 800a26a:	602f      	str	r7, [r5, #0]
+ 800a26c:	e7b2      	b.n	800a1d4 <__sflush_r+0x18>
+ 800a26e:	89a3      	ldrh	r3, [r4, #12]
+ 800a270:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 800a274:	81a3      	strh	r3, [r4, #12]
+ 800a276:	e7ae      	b.n	800a1d6 <__sflush_r+0x1a>
+ 800a278:	690f      	ldr	r7, [r1, #16]
+ 800a27a:	2f00      	cmp	r7, #0
+ 800a27c:	d0aa      	beq.n	800a1d4 <__sflush_r+0x18>
+ 800a27e:	0793      	lsls	r3, r2, #30
+ 800a280:	bf18      	it	ne
+ 800a282:	2300      	movne	r3, #0
+ 800a284:	680e      	ldr	r6, [r1, #0]
+ 800a286:	bf08      	it	eq
+ 800a288:	694b      	ldreq	r3, [r1, #20]
+ 800a28a:	1bf6      	subs	r6, r6, r7
+ 800a28c:	600f      	str	r7, [r1, #0]
+ 800a28e:	608b      	str	r3, [r1, #8]
+ 800a290:	2e00      	cmp	r6, #0
+ 800a292:	dd9f      	ble.n	800a1d4 <__sflush_r+0x18>
+ 800a294:	4633      	mov	r3, r6
+ 800a296:	463a      	mov	r2, r7
+ 800a298:	4628      	mov	r0, r5
+ 800a29a:	6a21      	ldr	r1, [r4, #32]
+ 800a29c:	f8d4 c028 	ldr.w	ip, [r4, #40]	; 0x28
+ 800a2a0:	47e0      	blx	ip
+ 800a2a2:	2800      	cmp	r0, #0
+ 800a2a4:	dc06      	bgt.n	800a2b4 <__sflush_r+0xf8>
+ 800a2a6:	89a3      	ldrh	r3, [r4, #12]
+ 800a2a8:	f04f 30ff 	mov.w	r0, #4294967295
+ 800a2ac:	f043 0340 	orr.w	r3, r3, #64	; 0x40
+ 800a2b0:	81a3      	strh	r3, [r4, #12]
+ 800a2b2:	e790      	b.n	800a1d6 <__sflush_r+0x1a>
+ 800a2b4:	4407      	add	r7, r0
+ 800a2b6:	1a36      	subs	r6, r6, r0
+ 800a2b8:	e7ea      	b.n	800a290 <__sflush_r+0xd4>
+ 800a2ba:	bf00      	nop
+ 800a2bc:	dfbffffe 	.word	0xdfbffffe
 
-0800a0a6 <__sfputs_r>:
- 800a0a6:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 800a0a8:	4606      	mov	r6, r0
- 800a0aa:	460f      	mov	r7, r1
- 800a0ac:	4614      	mov	r4, r2
- 800a0ae:	18d5      	adds	r5, r2, r3
- 800a0b0:	42ac      	cmp	r4, r5
- 800a0b2:	d101      	bne.n	800a0b8 <__sfputs_r+0x12>
- 800a0b4:	2000      	movs	r0, #0
- 800a0b6:	e007      	b.n	800a0c8 <__sfputs_r+0x22>
- 800a0b8:	463a      	mov	r2, r7
- 800a0ba:	4630      	mov	r0, r6
- 800a0bc:	f814 1b01 	ldrb.w	r1, [r4], #1
- 800a0c0:	f7ff ffdc 	bl	800a07c <__sfputc_r>
- 800a0c4:	1c43      	adds	r3, r0, #1
- 800a0c6:	d1f3      	bne.n	800a0b0 <__sfputs_r+0xa>
- 800a0c8:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
+0800a2c0 <_fflush_r>:
+ 800a2c0:	b538      	push	{r3, r4, r5, lr}
+ 800a2c2:	690b      	ldr	r3, [r1, #16]
+ 800a2c4:	4605      	mov	r5, r0
+ 800a2c6:	460c      	mov	r4, r1
+ 800a2c8:	b913      	cbnz	r3, 800a2d0 <_fflush_r+0x10>
+ 800a2ca:	2500      	movs	r5, #0
+ 800a2cc:	4628      	mov	r0, r5
+ 800a2ce:	bd38      	pop	{r3, r4, r5, pc}
+ 800a2d0:	b118      	cbz	r0, 800a2da <_fflush_r+0x1a>
+ 800a2d2:	6a03      	ldr	r3, [r0, #32]
+ 800a2d4:	b90b      	cbnz	r3, 800a2da <_fflush_r+0x1a>
+ 800a2d6:	f7fe f8dd 	bl	8008494 <__sinit>
+ 800a2da:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
+ 800a2de:	2b00      	cmp	r3, #0
+ 800a2e0:	d0f3      	beq.n	800a2ca <_fflush_r+0xa>
+ 800a2e2:	6e62      	ldr	r2, [r4, #100]	; 0x64
+ 800a2e4:	07d0      	lsls	r0, r2, #31
+ 800a2e6:	d404      	bmi.n	800a2f2 <_fflush_r+0x32>
+ 800a2e8:	0599      	lsls	r1, r3, #22
+ 800a2ea:	d402      	bmi.n	800a2f2 <_fflush_r+0x32>
+ 800a2ec:	6da0      	ldr	r0, [r4, #88]	; 0x58
+ 800a2ee:	f7fe fa8c 	bl	800880a <__retarget_lock_acquire_recursive>
+ 800a2f2:	4628      	mov	r0, r5
+ 800a2f4:	4621      	mov	r1, r4
+ 800a2f6:	f7ff ff61 	bl	800a1bc <__sflush_r>
+ 800a2fa:	6e63      	ldr	r3, [r4, #100]	; 0x64
+ 800a2fc:	4605      	mov	r5, r0
+ 800a2fe:	07da      	lsls	r2, r3, #31
+ 800a300:	d4e4      	bmi.n	800a2cc <_fflush_r+0xc>
+ 800a302:	89a3      	ldrh	r3, [r4, #12]
+ 800a304:	059b      	lsls	r3, r3, #22
+ 800a306:	d4e1      	bmi.n	800a2cc <_fflush_r+0xc>
+ 800a308:	6da0      	ldr	r0, [r4, #88]	; 0x58
+ 800a30a:	f7fe fa7f 	bl	800880c <__retarget_lock_release_recursive>
+ 800a30e:	e7dd      	b.n	800a2cc <_fflush_r+0xc>
+
+0800a310 <__swhatbuf_r>:
+ 800a310:	b570      	push	{r4, r5, r6, lr}
+ 800a312:	460c      	mov	r4, r1
+ 800a314:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
+ 800a318:	4615      	mov	r5, r2
+ 800a31a:	2900      	cmp	r1, #0
+ 800a31c:	461e      	mov	r6, r3
+ 800a31e:	b096      	sub	sp, #88	; 0x58
+ 800a320:	da0c      	bge.n	800a33c <__swhatbuf_r+0x2c>
+ 800a322:	89a3      	ldrh	r3, [r4, #12]
+ 800a324:	2100      	movs	r1, #0
+ 800a326:	f013 0f80 	tst.w	r3, #128	; 0x80
+ 800a32a:	bf0c      	ite	eq
+ 800a32c:	f44f 6380 	moveq.w	r3, #1024	; 0x400
+ 800a330:	2340      	movne	r3, #64	; 0x40
+ 800a332:	2000      	movs	r0, #0
+ 800a334:	6031      	str	r1, [r6, #0]
+ 800a336:	602b      	str	r3, [r5, #0]
+ 800a338:	b016      	add	sp, #88	; 0x58
+ 800a33a:	bd70      	pop	{r4, r5, r6, pc}
+ 800a33c:	466a      	mov	r2, sp
+ 800a33e:	f000 f863 	bl	800a408 <_fstat_r>
+ 800a342:	2800      	cmp	r0, #0
+ 800a344:	dbed      	blt.n	800a322 <__swhatbuf_r+0x12>
+ 800a346:	9901      	ldr	r1, [sp, #4]
+ 800a348:	f401 4170 	and.w	r1, r1, #61440	; 0xf000
+ 800a34c:	f5a1 5300 	sub.w	r3, r1, #8192	; 0x2000
+ 800a350:	4259      	negs	r1, r3
+ 800a352:	4159      	adcs	r1, r3
+ 800a354:	f44f 6380 	mov.w	r3, #1024	; 0x400
+ 800a358:	e7eb      	b.n	800a332 <__swhatbuf_r+0x22>
+
+0800a35a <__smakebuf_r>:
+ 800a35a:	898b      	ldrh	r3, [r1, #12]
+ 800a35c:	b573      	push	{r0, r1, r4, r5, r6, lr}
+ 800a35e:	079d      	lsls	r5, r3, #30
+ 800a360:	4606      	mov	r6, r0
+ 800a362:	460c      	mov	r4, r1
+ 800a364:	d507      	bpl.n	800a376 <__smakebuf_r+0x1c>
+ 800a366:	f104 0347 	add.w	r3, r4, #71	; 0x47
+ 800a36a:	6023      	str	r3, [r4, #0]
+ 800a36c:	6123      	str	r3, [r4, #16]
+ 800a36e:	2301      	movs	r3, #1
+ 800a370:	6163      	str	r3, [r4, #20]
+ 800a372:	b002      	add	sp, #8
+ 800a374:	bd70      	pop	{r4, r5, r6, pc}
+ 800a376:	466a      	mov	r2, sp
+ 800a378:	ab01      	add	r3, sp, #4
+ 800a37a:	f7ff ffc9 	bl	800a310 <__swhatbuf_r>
+ 800a37e:	9900      	ldr	r1, [sp, #0]
+ 800a380:	4605      	mov	r5, r0
+ 800a382:	4630      	mov	r0, r6
+ 800a384:	f7fd fb10 	bl	80079a8 <_malloc_r>
+ 800a388:	b948      	cbnz	r0, 800a39e <__smakebuf_r+0x44>
+ 800a38a:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
+ 800a38e:	059a      	lsls	r2, r3, #22
+ 800a390:	d4ef      	bmi.n	800a372 <__smakebuf_r+0x18>
+ 800a392:	f023 0303 	bic.w	r3, r3, #3
+ 800a396:	f043 0302 	orr.w	r3, r3, #2
+ 800a39a:	81a3      	strh	r3, [r4, #12]
+ 800a39c:	e7e3      	b.n	800a366 <__smakebuf_r+0xc>
+ 800a39e:	89a3      	ldrh	r3, [r4, #12]
+ 800a3a0:	6020      	str	r0, [r4, #0]
+ 800a3a2:	f043 0380 	orr.w	r3, r3, #128	; 0x80
+ 800a3a6:	81a3      	strh	r3, [r4, #12]
+ 800a3a8:	9b00      	ldr	r3, [sp, #0]
+ 800a3aa:	6120      	str	r0, [r4, #16]
+ 800a3ac:	6163      	str	r3, [r4, #20]
+ 800a3ae:	9b01      	ldr	r3, [sp, #4]
+ 800a3b0:	b15b      	cbz	r3, 800a3ca <__smakebuf_r+0x70>
+ 800a3b2:	4630      	mov	r0, r6
+ 800a3b4:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
+ 800a3b8:	f000 f838 	bl	800a42c <_isatty_r>
+ 800a3bc:	b128      	cbz	r0, 800a3ca <__smakebuf_r+0x70>
+ 800a3be:	89a3      	ldrh	r3, [r4, #12]
+ 800a3c0:	f023 0303 	bic.w	r3, r3, #3
+ 800a3c4:	f043 0301 	orr.w	r3, r3, #1
+ 800a3c8:	81a3      	strh	r3, [r4, #12]
+ 800a3ca:	89a3      	ldrh	r3, [r4, #12]
+ 800a3cc:	431d      	orrs	r5, r3
+ 800a3ce:	81a5      	strh	r5, [r4, #12]
+ 800a3d0:	e7cf      	b.n	800a372 <__smakebuf_r+0x18>
+
+0800a3d2 <memmove>:
+ 800a3d2:	4288      	cmp	r0, r1
+ 800a3d4:	b510      	push	{r4, lr}
+ 800a3d6:	eb01 0402 	add.w	r4, r1, r2
+ 800a3da:	d902      	bls.n	800a3e2 <memmove+0x10>
+ 800a3dc:	4284      	cmp	r4, r0
+ 800a3de:	4623      	mov	r3, r4
+ 800a3e0:	d807      	bhi.n	800a3f2 <memmove+0x20>
+ 800a3e2:	1e43      	subs	r3, r0, #1
+ 800a3e4:	42a1      	cmp	r1, r4
+ 800a3e6:	d008      	beq.n	800a3fa <memmove+0x28>
+ 800a3e8:	f811 2b01 	ldrb.w	r2, [r1], #1
+ 800a3ec:	f803 2f01 	strb.w	r2, [r3, #1]!
+ 800a3f0:	e7f8      	b.n	800a3e4 <memmove+0x12>
+ 800a3f2:	4601      	mov	r1, r0
+ 800a3f4:	4402      	add	r2, r0
+ 800a3f6:	428a      	cmp	r2, r1
+ 800a3f8:	d100      	bne.n	800a3fc <memmove+0x2a>
+ 800a3fa:	bd10      	pop	{r4, pc}
+ 800a3fc:	f813 4d01 	ldrb.w	r4, [r3, #-1]!
+ 800a400:	f802 4d01 	strb.w	r4, [r2, #-1]!
+ 800a404:	e7f7      	b.n	800a3f6 <memmove+0x24>
 	...
 
-0800a0cc <_vfiprintf_r>:
- 800a0cc:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
- 800a0d0:	460d      	mov	r5, r1
- 800a0d2:	4614      	mov	r4, r2
- 800a0d4:	4698      	mov	r8, r3
- 800a0d6:	4606      	mov	r6, r0
- 800a0d8:	b09d      	sub	sp, #116	; 0x74
- 800a0da:	b118      	cbz	r0, 800a0e4 <_vfiprintf_r+0x18>
- 800a0dc:	6983      	ldr	r3, [r0, #24]
- 800a0de:	b90b      	cbnz	r3, 800a0e4 <_vfiprintf_r+0x18>
- 800a0e0:	f7ff f9ae 	bl	8009440 <__sinit>
- 800a0e4:	4b89      	ldr	r3, [pc, #548]	; (800a30c <_vfiprintf_r+0x240>)
- 800a0e6:	429d      	cmp	r5, r3
- 800a0e8:	d11b      	bne.n	800a122 <_vfiprintf_r+0x56>
- 800a0ea:	6875      	ldr	r5, [r6, #4]
- 800a0ec:	6e6b      	ldr	r3, [r5, #100]	; 0x64
- 800a0ee:	07d9      	lsls	r1, r3, #31
- 800a0f0:	d405      	bmi.n	800a0fe <_vfiprintf_r+0x32>
- 800a0f2:	89ab      	ldrh	r3, [r5, #12]
- 800a0f4:	059a      	lsls	r2, r3, #22
- 800a0f6:	d402      	bmi.n	800a0fe <_vfiprintf_r+0x32>
- 800a0f8:	6da8      	ldr	r0, [r5, #88]	; 0x58
- 800a0fa:	f7ff fa44 	bl	8009586 <__retarget_lock_acquire_recursive>
- 800a0fe:	89ab      	ldrh	r3, [r5, #12]
- 800a100:	071b      	lsls	r3, r3, #28
- 800a102:	d501      	bpl.n	800a108 <_vfiprintf_r+0x3c>
- 800a104:	692b      	ldr	r3, [r5, #16]
- 800a106:	b9eb      	cbnz	r3, 800a144 <_vfiprintf_r+0x78>
- 800a108:	4629      	mov	r1, r5
- 800a10a:	4630      	mov	r0, r6
- 800a10c:	f7fe f992 	bl	8008434 <__swsetup_r>
- 800a110:	b1c0      	cbz	r0, 800a144 <_vfiprintf_r+0x78>
- 800a112:	6e6b      	ldr	r3, [r5, #100]	; 0x64
- 800a114:	07dc      	lsls	r4, r3, #31
- 800a116:	d50e      	bpl.n	800a136 <_vfiprintf_r+0x6a>
- 800a118:	f04f 30ff 	mov.w	r0, #4294967295
- 800a11c:	b01d      	add	sp, #116	; 0x74
- 800a11e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
- 800a122:	4b7b      	ldr	r3, [pc, #492]	; (800a310 <_vfiprintf_r+0x244>)
- 800a124:	429d      	cmp	r5, r3
- 800a126:	d101      	bne.n	800a12c <_vfiprintf_r+0x60>
- 800a128:	68b5      	ldr	r5, [r6, #8]
- 800a12a:	e7df      	b.n	800a0ec <_vfiprintf_r+0x20>
- 800a12c:	4b79      	ldr	r3, [pc, #484]	; (800a314 <_vfiprintf_r+0x248>)
- 800a12e:	429d      	cmp	r5, r3
- 800a130:	bf08      	it	eq
- 800a132:	68f5      	ldreq	r5, [r6, #12]
- 800a134:	e7da      	b.n	800a0ec <_vfiprintf_r+0x20>
- 800a136:	89ab      	ldrh	r3, [r5, #12]
- 800a138:	0598      	lsls	r0, r3, #22
- 800a13a:	d4ed      	bmi.n	800a118 <_vfiprintf_r+0x4c>
- 800a13c:	6da8      	ldr	r0, [r5, #88]	; 0x58
- 800a13e:	f7ff fa23 	bl	8009588 <__retarget_lock_release_recursive>
- 800a142:	e7e9      	b.n	800a118 <_vfiprintf_r+0x4c>
- 800a144:	2300      	movs	r3, #0
- 800a146:	9309      	str	r3, [sp, #36]	; 0x24
- 800a148:	2320      	movs	r3, #32
- 800a14a:	f88d 3029 	strb.w	r3, [sp, #41]	; 0x29
- 800a14e:	2330      	movs	r3, #48	; 0x30
- 800a150:	f04f 0901 	mov.w	r9, #1
- 800a154:	f8cd 800c 	str.w	r8, [sp, #12]
- 800a158:	f8df 81bc 	ldr.w	r8, [pc, #444]	; 800a318 <_vfiprintf_r+0x24c>
- 800a15c:	f88d 302a 	strb.w	r3, [sp, #42]	; 0x2a
- 800a160:	4623      	mov	r3, r4
- 800a162:	469a      	mov	sl, r3
- 800a164:	f813 2b01 	ldrb.w	r2, [r3], #1
- 800a168:	b10a      	cbz	r2, 800a16e <_vfiprintf_r+0xa2>
- 800a16a:	2a25      	cmp	r2, #37	; 0x25
- 800a16c:	d1f9      	bne.n	800a162 <_vfiprintf_r+0x96>
- 800a16e:	ebba 0b04 	subs.w	fp, sl, r4
- 800a172:	d00b      	beq.n	800a18c <_vfiprintf_r+0xc0>
- 800a174:	465b      	mov	r3, fp
- 800a176:	4622      	mov	r2, r4
- 800a178:	4629      	mov	r1, r5
- 800a17a:	4630      	mov	r0, r6
- 800a17c:	f7ff ff93 	bl	800a0a6 <__sfputs_r>
- 800a180:	3001      	adds	r0, #1
- 800a182:	f000 80aa 	beq.w	800a2da <_vfiprintf_r+0x20e>
- 800a186:	9a09      	ldr	r2, [sp, #36]	; 0x24
- 800a188:	445a      	add	r2, fp
- 800a18a:	9209      	str	r2, [sp, #36]	; 0x24
- 800a18c:	f89a 3000 	ldrb.w	r3, [sl]
- 800a190:	2b00      	cmp	r3, #0
- 800a192:	f000 80a2 	beq.w	800a2da <_vfiprintf_r+0x20e>
- 800a196:	2300      	movs	r3, #0
- 800a198:	f04f 32ff 	mov.w	r2, #4294967295
- 800a19c:	e9cd 2305 	strd	r2, r3, [sp, #20]
- 800a1a0:	f10a 0a01 	add.w	sl, sl, #1
- 800a1a4:	9304      	str	r3, [sp, #16]
- 800a1a6:	9307      	str	r3, [sp, #28]
- 800a1a8:	f88d 3053 	strb.w	r3, [sp, #83]	; 0x53
- 800a1ac:	931a      	str	r3, [sp, #104]	; 0x68
- 800a1ae:	4654      	mov	r4, sl
- 800a1b0:	2205      	movs	r2, #5
- 800a1b2:	f814 1b01 	ldrb.w	r1, [r4], #1
- 800a1b6:	4858      	ldr	r0, [pc, #352]	; (800a318 <_vfiprintf_r+0x24c>)
- 800a1b8:	f7ff fa4c 	bl	8009654 <memchr>
- 800a1bc:	9a04      	ldr	r2, [sp, #16]
- 800a1be:	b9d8      	cbnz	r0, 800a1f8 <_vfiprintf_r+0x12c>
- 800a1c0:	06d1      	lsls	r1, r2, #27
- 800a1c2:	bf44      	itt	mi
- 800a1c4:	2320      	movmi	r3, #32
- 800a1c6:	f88d 3053 	strbmi.w	r3, [sp, #83]	; 0x53
- 800a1ca:	0713      	lsls	r3, r2, #28
- 800a1cc:	bf44      	itt	mi
- 800a1ce:	232b      	movmi	r3, #43	; 0x2b
- 800a1d0:	f88d 3053 	strbmi.w	r3, [sp, #83]	; 0x53
- 800a1d4:	f89a 3000 	ldrb.w	r3, [sl]
- 800a1d8:	2b2a      	cmp	r3, #42	; 0x2a
- 800a1da:	d015      	beq.n	800a208 <_vfiprintf_r+0x13c>
- 800a1dc:	4654      	mov	r4, sl
- 800a1de:	2000      	movs	r0, #0
- 800a1e0:	f04f 0c0a 	mov.w	ip, #10
- 800a1e4:	9a07      	ldr	r2, [sp, #28]
- 800a1e6:	4621      	mov	r1, r4
- 800a1e8:	f811 3b01 	ldrb.w	r3, [r1], #1
- 800a1ec:	3b30      	subs	r3, #48	; 0x30
- 800a1ee:	2b09      	cmp	r3, #9
- 800a1f0:	d94e      	bls.n	800a290 <_vfiprintf_r+0x1c4>
- 800a1f2:	b1b0      	cbz	r0, 800a222 <_vfiprintf_r+0x156>
- 800a1f4:	9207      	str	r2, [sp, #28]
- 800a1f6:	e014      	b.n	800a222 <_vfiprintf_r+0x156>
- 800a1f8:	eba0 0308 	sub.w	r3, r0, r8
- 800a1fc:	fa09 f303 	lsl.w	r3, r9, r3
- 800a200:	4313      	orrs	r3, r2
- 800a202:	46a2      	mov	sl, r4
- 800a204:	9304      	str	r3, [sp, #16]
- 800a206:	e7d2      	b.n	800a1ae <_vfiprintf_r+0xe2>
- 800a208:	9b03      	ldr	r3, [sp, #12]
- 800a20a:	1d19      	adds	r1, r3, #4
- 800a20c:	681b      	ldr	r3, [r3, #0]
- 800a20e:	9103      	str	r1, [sp, #12]
- 800a210:	2b00      	cmp	r3, #0
- 800a212:	bfbb      	ittet	lt
- 800a214:	425b      	neglt	r3, r3
- 800a216:	f042 0202 	orrlt.w	r2, r2, #2
- 800a21a:	9307      	strge	r3, [sp, #28]
- 800a21c:	9307      	strlt	r3, [sp, #28]
- 800a21e:	bfb8      	it	lt
- 800a220:	9204      	strlt	r2, [sp, #16]
- 800a222:	7823      	ldrb	r3, [r4, #0]
- 800a224:	2b2e      	cmp	r3, #46	; 0x2e
- 800a226:	d10c      	bne.n	800a242 <_vfiprintf_r+0x176>
- 800a228:	7863      	ldrb	r3, [r4, #1]
- 800a22a:	2b2a      	cmp	r3, #42	; 0x2a
- 800a22c:	d135      	bne.n	800a29a <_vfiprintf_r+0x1ce>
- 800a22e:	9b03      	ldr	r3, [sp, #12]
- 800a230:	3402      	adds	r4, #2
- 800a232:	1d1a      	adds	r2, r3, #4
- 800a234:	681b      	ldr	r3, [r3, #0]
- 800a236:	9203      	str	r2, [sp, #12]
- 800a238:	2b00      	cmp	r3, #0
- 800a23a:	bfb8      	it	lt
- 800a23c:	f04f 33ff 	movlt.w	r3, #4294967295
- 800a240:	9305      	str	r3, [sp, #20]
- 800a242:	f8df a0e4 	ldr.w	sl, [pc, #228]	; 800a328 <_vfiprintf_r+0x25c>
- 800a246:	2203      	movs	r2, #3
- 800a248:	4650      	mov	r0, sl
- 800a24a:	7821      	ldrb	r1, [r4, #0]
- 800a24c:	f7ff fa02 	bl	8009654 <memchr>
- 800a250:	b140      	cbz	r0, 800a264 <_vfiprintf_r+0x198>
- 800a252:	2340      	movs	r3, #64	; 0x40
- 800a254:	eba0 000a 	sub.w	r0, r0, sl
- 800a258:	fa03 f000 	lsl.w	r0, r3, r0
- 800a25c:	9b04      	ldr	r3, [sp, #16]
- 800a25e:	3401      	adds	r4, #1
- 800a260:	4303      	orrs	r3, r0
- 800a262:	9304      	str	r3, [sp, #16]
- 800a264:	f814 1b01 	ldrb.w	r1, [r4], #1
- 800a268:	2206      	movs	r2, #6
- 800a26a:	482c      	ldr	r0, [pc, #176]	; (800a31c <_vfiprintf_r+0x250>)
- 800a26c:	f88d 1028 	strb.w	r1, [sp, #40]	; 0x28
- 800a270:	f7ff f9f0 	bl	8009654 <memchr>
- 800a274:	2800      	cmp	r0, #0
- 800a276:	d03f      	beq.n	800a2f8 <_vfiprintf_r+0x22c>
- 800a278:	4b29      	ldr	r3, [pc, #164]	; (800a320 <_vfiprintf_r+0x254>)
- 800a27a:	bb1b      	cbnz	r3, 800a2c4 <_vfiprintf_r+0x1f8>
- 800a27c:	9b03      	ldr	r3, [sp, #12]
- 800a27e:	3307      	adds	r3, #7
- 800a280:	f023 0307 	bic.w	r3, r3, #7
- 800a284:	3308      	adds	r3, #8
- 800a286:	9303      	str	r3, [sp, #12]
- 800a288:	9b09      	ldr	r3, [sp, #36]	; 0x24
- 800a28a:	443b      	add	r3, r7
- 800a28c:	9309      	str	r3, [sp, #36]	; 0x24
- 800a28e:	e767      	b.n	800a160 <_vfiprintf_r+0x94>
- 800a290:	460c      	mov	r4, r1
- 800a292:	2001      	movs	r0, #1
- 800a294:	fb0c 3202 	mla	r2, ip, r2, r3
- 800a298:	e7a5      	b.n	800a1e6 <_vfiprintf_r+0x11a>
- 800a29a:	2300      	movs	r3, #0
- 800a29c:	f04f 0c0a 	mov.w	ip, #10
- 800a2a0:	4619      	mov	r1, r3
- 800a2a2:	3401      	adds	r4, #1
- 800a2a4:	9305      	str	r3, [sp, #20]
- 800a2a6:	4620      	mov	r0, r4
- 800a2a8:	f810 2b01 	ldrb.w	r2, [r0], #1
- 800a2ac:	3a30      	subs	r2, #48	; 0x30
- 800a2ae:	2a09      	cmp	r2, #9
- 800a2b0:	d903      	bls.n	800a2ba <_vfiprintf_r+0x1ee>
- 800a2b2:	2b00      	cmp	r3, #0
- 800a2b4:	d0c5      	beq.n	800a242 <_vfiprintf_r+0x176>
- 800a2b6:	9105      	str	r1, [sp, #20]
- 800a2b8:	e7c3      	b.n	800a242 <_vfiprintf_r+0x176>
- 800a2ba:	4604      	mov	r4, r0
- 800a2bc:	2301      	movs	r3, #1
- 800a2be:	fb0c 2101 	mla	r1, ip, r1, r2
- 800a2c2:	e7f0      	b.n	800a2a6 <_vfiprintf_r+0x1da>
- 800a2c4:	ab03      	add	r3, sp, #12
- 800a2c6:	9300      	str	r3, [sp, #0]
- 800a2c8:	462a      	mov	r2, r5
- 800a2ca:	4630      	mov	r0, r6
- 800a2cc:	4b15      	ldr	r3, [pc, #84]	; (800a324 <_vfiprintf_r+0x258>)
- 800a2ce:	a904      	add	r1, sp, #16
- 800a2d0:	f7fd fc6c 	bl	8007bac <_printf_float>
- 800a2d4:	4607      	mov	r7, r0
- 800a2d6:	1c78      	adds	r0, r7, #1
- 800a2d8:	d1d6      	bne.n	800a288 <_vfiprintf_r+0x1bc>
- 800a2da:	6e6b      	ldr	r3, [r5, #100]	; 0x64
- 800a2dc:	07d9      	lsls	r1, r3, #31
- 800a2de:	d405      	bmi.n	800a2ec <_vfiprintf_r+0x220>
- 800a2e0:	89ab      	ldrh	r3, [r5, #12]
- 800a2e2:	059a      	lsls	r2, r3, #22
- 800a2e4:	d402      	bmi.n	800a2ec <_vfiprintf_r+0x220>
- 800a2e6:	6da8      	ldr	r0, [r5, #88]	; 0x58
- 800a2e8:	f7ff f94e 	bl	8009588 <__retarget_lock_release_recursive>
- 800a2ec:	89ab      	ldrh	r3, [r5, #12]
- 800a2ee:	065b      	lsls	r3, r3, #25
- 800a2f0:	f53f af12 	bmi.w	800a118 <_vfiprintf_r+0x4c>
- 800a2f4:	9809      	ldr	r0, [sp, #36]	; 0x24
- 800a2f6:	e711      	b.n	800a11c <_vfiprintf_r+0x50>
- 800a2f8:	ab03      	add	r3, sp, #12
- 800a2fa:	9300      	str	r3, [sp, #0]
- 800a2fc:	462a      	mov	r2, r5
- 800a2fe:	4630      	mov	r0, r6
- 800a300:	4b08      	ldr	r3, [pc, #32]	; (800a324 <_vfiprintf_r+0x258>)
- 800a302:	a904      	add	r1, sp, #16
- 800a304:	f7fd feee 	bl	80080e4 <_printf_i>
- 800a308:	e7e4      	b.n	800a2d4 <_vfiprintf_r+0x208>
- 800a30a:	bf00      	nop
- 800a30c:	0800b340 	.word	0x0800b340
- 800a310:	0800b360 	.word	0x0800b360
- 800a314:	0800b320 	.word	0x0800b320
- 800a318:	0800b4dc 	.word	0x0800b4dc
- 800a31c:	0800b4e6 	.word	0x0800b4e6
- 800a320:	08007bad 	.word	0x08007bad
- 800a324:	0800a0a7 	.word	0x0800a0a7
- 800a328:	0800b4e2 	.word	0x0800b4e2
+0800a408 <_fstat_r>:
+ 800a408:	b538      	push	{r3, r4, r5, lr}
+ 800a40a:	2300      	movs	r3, #0
+ 800a40c:	4d06      	ldr	r5, [pc, #24]	; (800a428 <_fstat_r+0x20>)
+ 800a40e:	4604      	mov	r4, r0
+ 800a410:	4608      	mov	r0, r1
+ 800a412:	4611      	mov	r1, r2
+ 800a414:	602b      	str	r3, [r5, #0]
+ 800a416:	f7f7 fbc2 	bl	8001b9e <_fstat>
+ 800a41a:	1c43      	adds	r3, r0, #1
+ 800a41c:	d102      	bne.n	800a424 <_fstat_r+0x1c>
+ 800a41e:	682b      	ldr	r3, [r5, #0]
+ 800a420:	b103      	cbz	r3, 800a424 <_fstat_r+0x1c>
+ 800a422:	6023      	str	r3, [r4, #0]
+ 800a424:	bd38      	pop	{r3, r4, r5, pc}
+ 800a426:	bf00      	nop
+ 800a428:	200026fc 	.word	0x200026fc
 
-0800a32c <__sread>:
- 800a32c:	b510      	push	{r4, lr}
- 800a32e:	460c      	mov	r4, r1
- 800a330:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
- 800a334:	f000 f916 	bl	800a564 <_read_r>
- 800a338:	2800      	cmp	r0, #0
- 800a33a:	bfab      	itete	ge
- 800a33c:	6d63      	ldrge	r3, [r4, #84]	; 0x54
- 800a33e:	89a3      	ldrhlt	r3, [r4, #12]
- 800a340:	181b      	addge	r3, r3, r0
- 800a342:	f423 5380 	biclt.w	r3, r3, #4096	; 0x1000
- 800a346:	bfac      	ite	ge
- 800a348:	6563      	strge	r3, [r4, #84]	; 0x54
- 800a34a:	81a3      	strhlt	r3, [r4, #12]
- 800a34c:	bd10      	pop	{r4, pc}
+0800a42c <_isatty_r>:
+ 800a42c:	b538      	push	{r3, r4, r5, lr}
+ 800a42e:	2300      	movs	r3, #0
+ 800a430:	4d05      	ldr	r5, [pc, #20]	; (800a448 <_isatty_r+0x1c>)
+ 800a432:	4604      	mov	r4, r0
+ 800a434:	4608      	mov	r0, r1
+ 800a436:	602b      	str	r3, [r5, #0]
+ 800a438:	f7f7 fbc0 	bl	8001bbc <_isatty>
+ 800a43c:	1c43      	adds	r3, r0, #1
+ 800a43e:	d102      	bne.n	800a446 <_isatty_r+0x1a>
+ 800a440:	682b      	ldr	r3, [r5, #0]
+ 800a442:	b103      	cbz	r3, 800a446 <_isatty_r+0x1a>
+ 800a444:	6023      	str	r3, [r4, #0]
+ 800a446:	bd38      	pop	{r3, r4, r5, pc}
+ 800a448:	200026fc 	.word	0x200026fc
 
-0800a34e <__swrite>:
- 800a34e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
- 800a352:	461f      	mov	r7, r3
- 800a354:	898b      	ldrh	r3, [r1, #12]
- 800a356:	4605      	mov	r5, r0
- 800a358:	05db      	lsls	r3, r3, #23
- 800a35a:	460c      	mov	r4, r1
- 800a35c:	4616      	mov	r6, r2
- 800a35e:	d505      	bpl.n	800a36c <__swrite+0x1e>
- 800a360:	2302      	movs	r3, #2
- 800a362:	2200      	movs	r2, #0
- 800a364:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
- 800a368:	f000 f898 	bl	800a49c <_lseek_r>
- 800a36c:	89a3      	ldrh	r3, [r4, #12]
- 800a36e:	4632      	mov	r2, r6
- 800a370:	f423 5380 	bic.w	r3, r3, #4096	; 0x1000
- 800a374:	81a3      	strh	r3, [r4, #12]
- 800a376:	4628      	mov	r0, r5
- 800a378:	463b      	mov	r3, r7
- 800a37a:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
- 800a37e:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
- 800a382:	f000 b817 	b.w	800a3b4 <_write_r>
+0800a44c <memcpy>:
+ 800a44c:	440a      	add	r2, r1
+ 800a44e:	4291      	cmp	r1, r2
+ 800a450:	f100 33ff 	add.w	r3, r0, #4294967295
+ 800a454:	d100      	bne.n	800a458 <memcpy+0xc>
+ 800a456:	4770      	bx	lr
+ 800a458:	b510      	push	{r4, lr}
+ 800a45a:	f811 4b01 	ldrb.w	r4, [r1], #1
+ 800a45e:	4291      	cmp	r1, r2
+ 800a460:	f803 4f01 	strb.w	r4, [r3, #1]!
+ 800a464:	d1f9      	bne.n	800a45a <memcpy+0xe>
+ 800a466:	bd10      	pop	{r4, pc}
 
-0800a386 <__sseek>:
- 800a386:	b510      	push	{r4, lr}
- 800a388:	460c      	mov	r4, r1
- 800a38a:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
- 800a38e:	f000 f885 	bl	800a49c <_lseek_r>
- 800a392:	1c43      	adds	r3, r0, #1
- 800a394:	89a3      	ldrh	r3, [r4, #12]
- 800a396:	bf15      	itete	ne
- 800a398:	6560      	strne	r0, [r4, #84]	; 0x54
- 800a39a:	f423 5380 	biceq.w	r3, r3, #4096	; 0x1000
- 800a39e:	f443 5380 	orrne.w	r3, r3, #4096	; 0x1000
- 800a3a2:	81a3      	strheq	r3, [r4, #12]
- 800a3a4:	bf18      	it	ne
- 800a3a6:	81a3      	strhne	r3, [r4, #12]
- 800a3a8:	bd10      	pop	{r4, pc}
+0800a468 <__assert_func>:
+ 800a468:	b51f      	push	{r0, r1, r2, r3, r4, lr}
+ 800a46a:	4614      	mov	r4, r2
+ 800a46c:	461a      	mov	r2, r3
+ 800a46e:	4b09      	ldr	r3, [pc, #36]	; (800a494 <__assert_func+0x2c>)
+ 800a470:	4605      	mov	r5, r0
+ 800a472:	681b      	ldr	r3, [r3, #0]
+ 800a474:	68d8      	ldr	r0, [r3, #12]
+ 800a476:	b14c      	cbz	r4, 800a48c <__assert_func+0x24>
+ 800a478:	4b07      	ldr	r3, [pc, #28]	; (800a498 <__assert_func+0x30>)
+ 800a47a:	e9cd 3401 	strd	r3, r4, [sp, #4]
+ 800a47e:	9100      	str	r1, [sp, #0]
+ 800a480:	462b      	mov	r3, r5
+ 800a482:	4906      	ldr	r1, [pc, #24]	; (800a49c <__assert_func+0x34>)
+ 800a484:	f000 f870 	bl	800a568 <fiprintf>
+ 800a488:	f000 f880 	bl	800a58c <abort>
+ 800a48c:	4b04      	ldr	r3, [pc, #16]	; (800a4a0 <__assert_func+0x38>)
+ 800a48e:	461c      	mov	r4, r3
+ 800a490:	e7f3      	b.n	800a47a <__assert_func+0x12>
+ 800a492:	bf00      	nop
+ 800a494:	20000064 	.word	0x20000064
+ 800a498:	0800b477 	.word	0x0800b477
+ 800a49c:	0800b484 	.word	0x0800b484
+ 800a4a0:	0800b4b2 	.word	0x0800b4b2
 
-0800a3aa <__sclose>:
- 800a3aa:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
- 800a3ae:	f000 b831 	b.w	800a414 <_close_r>
-	...
+0800a4a4 <_calloc_r>:
+ 800a4a4:	b570      	push	{r4, r5, r6, lr}
+ 800a4a6:	fba1 5402 	umull	r5, r4, r1, r2
+ 800a4aa:	b934      	cbnz	r4, 800a4ba <_calloc_r+0x16>
+ 800a4ac:	4629      	mov	r1, r5
+ 800a4ae:	f7fd fa7b 	bl	80079a8 <_malloc_r>
+ 800a4b2:	4606      	mov	r6, r0
+ 800a4b4:	b928      	cbnz	r0, 800a4c2 <_calloc_r+0x1e>
+ 800a4b6:	4630      	mov	r0, r6
+ 800a4b8:	bd70      	pop	{r4, r5, r6, pc}
+ 800a4ba:	220c      	movs	r2, #12
+ 800a4bc:	2600      	movs	r6, #0
+ 800a4be:	6002      	str	r2, [r0, #0]
+ 800a4c0:	e7f9      	b.n	800a4b6 <_calloc_r+0x12>
+ 800a4c2:	462a      	mov	r2, r5
+ 800a4c4:	4621      	mov	r1, r4
+ 800a4c6:	f7fe f913 	bl	80086f0 <memset>
+ 800a4ca:	e7f4      	b.n	800a4b6 <_calloc_r+0x12>
 
-0800a3b4 <_write_r>:
- 800a3b4:	b538      	push	{r3, r4, r5, lr}
- 800a3b6:	4604      	mov	r4, r0
- 800a3b8:	4608      	mov	r0, r1
- 800a3ba:	4611      	mov	r1, r2
- 800a3bc:	2200      	movs	r2, #0
- 800a3be:	4d05      	ldr	r5, [pc, #20]	; (800a3d4 <_write_r+0x20>)
- 800a3c0:	602a      	str	r2, [r5, #0]
- 800a3c2:	461a      	mov	r2, r3
- 800a3c4:	f7f6 fee6 	bl	8001194 <_write>
- 800a3c8:	1c43      	adds	r3, r0, #1
- 800a3ca:	d102      	bne.n	800a3d2 <_write_r+0x1e>
- 800a3cc:	682b      	ldr	r3, [r5, #0]
- 800a3ce:	b103      	cbz	r3, 800a3d2 <_write_r+0x1e>
- 800a3d0:	6023      	str	r3, [r4, #0]
- 800a3d2:	bd38      	pop	{r3, r4, r5, pc}
- 800a3d4:	20002620 	.word	0x20002620
+0800a4cc <__ascii_mbtowc>:
+ 800a4cc:	b082      	sub	sp, #8
+ 800a4ce:	b901      	cbnz	r1, 800a4d2 <__ascii_mbtowc+0x6>
+ 800a4d0:	a901      	add	r1, sp, #4
+ 800a4d2:	b142      	cbz	r2, 800a4e6 <__ascii_mbtowc+0x1a>
+ 800a4d4:	b14b      	cbz	r3, 800a4ea <__ascii_mbtowc+0x1e>
+ 800a4d6:	7813      	ldrb	r3, [r2, #0]
+ 800a4d8:	600b      	str	r3, [r1, #0]
+ 800a4da:	7812      	ldrb	r2, [r2, #0]
+ 800a4dc:	1e10      	subs	r0, r2, #0
+ 800a4de:	bf18      	it	ne
+ 800a4e0:	2001      	movne	r0, #1
+ 800a4e2:	b002      	add	sp, #8
+ 800a4e4:	4770      	bx	lr
+ 800a4e6:	4610      	mov	r0, r2
+ 800a4e8:	e7fb      	b.n	800a4e2 <__ascii_mbtowc+0x16>
+ 800a4ea:	f06f 0001 	mvn.w	r0, #1
+ 800a4ee:	e7f8      	b.n	800a4e2 <__ascii_mbtowc+0x16>
 
-0800a3d8 <__assert_func>:
- 800a3d8:	b51f      	push	{r0, r1, r2, r3, r4, lr}
- 800a3da:	4614      	mov	r4, r2
- 800a3dc:	461a      	mov	r2, r3
- 800a3de:	4b09      	ldr	r3, [pc, #36]	; (800a404 <__assert_func+0x2c>)
- 800a3e0:	4605      	mov	r5, r0
- 800a3e2:	681b      	ldr	r3, [r3, #0]
- 800a3e4:	68d8      	ldr	r0, [r3, #12]
- 800a3e6:	b14c      	cbz	r4, 800a3fc <__assert_func+0x24>
- 800a3e8:	4b07      	ldr	r3, [pc, #28]	; (800a408 <__assert_func+0x30>)
- 800a3ea:	e9cd 3401 	strd	r3, r4, [sp, #4]
- 800a3ee:	9100      	str	r1, [sp, #0]
- 800a3f0:	462b      	mov	r3, r5
- 800a3f2:	4906      	ldr	r1, [pc, #24]	; (800a40c <__assert_func+0x34>)
- 800a3f4:	f000 f81e 	bl	800a434 <fiprintf>
- 800a3f8:	f000 f8d3 	bl	800a5a2 <abort>
- 800a3fc:	4b04      	ldr	r3, [pc, #16]	; (800a410 <__assert_func+0x38>)
- 800a3fe:	461c      	mov	r4, r3
- 800a400:	e7f3      	b.n	800a3ea <__assert_func+0x12>
- 800a402:	bf00      	nop
- 800a404:	2000000c 	.word	0x2000000c
- 800a408:	0800b4ed 	.word	0x0800b4ed
- 800a40c:	0800b4fa 	.word	0x0800b4fa
- 800a410:	0800b528 	.word	0x0800b528
-
-0800a414 <_close_r>:
- 800a414:	b538      	push	{r3, r4, r5, lr}
- 800a416:	2300      	movs	r3, #0
- 800a418:	4d05      	ldr	r5, [pc, #20]	; (800a430 <_close_r+0x1c>)
- 800a41a:	4604      	mov	r4, r0
- 800a41c:	4608      	mov	r0, r1
- 800a41e:	602b      	str	r3, [r5, #0]
- 800a420:	f7f7 fbb2 	bl	8001b88 <_close>
- 800a424:	1c43      	adds	r3, r0, #1
- 800a426:	d102      	bne.n	800a42e <_close_r+0x1a>
- 800a428:	682b      	ldr	r3, [r5, #0]
- 800a42a:	b103      	cbz	r3, 800a42e <_close_r+0x1a>
- 800a42c:	6023      	str	r3, [r4, #0]
- 800a42e:	bd38      	pop	{r3, r4, r5, pc}
- 800a430:	20002620 	.word	0x20002620
-
-0800a434 <fiprintf>:
- 800a434:	b40e      	push	{r1, r2, r3}
- 800a436:	b503      	push	{r0, r1, lr}
- 800a438:	4601      	mov	r1, r0
- 800a43a:	ab03      	add	r3, sp, #12
- 800a43c:	4805      	ldr	r0, [pc, #20]	; (800a454 <fiprintf+0x20>)
- 800a43e:	f853 2b04 	ldr.w	r2, [r3], #4
- 800a442:	6800      	ldr	r0, [r0, #0]
- 800a444:	9301      	str	r3, [sp, #4]
- 800a446:	f7ff fe41 	bl	800a0cc <_vfiprintf_r>
- 800a44a:	b002      	add	sp, #8
- 800a44c:	f85d eb04 	ldr.w	lr, [sp], #4
- 800a450:	b003      	add	sp, #12
- 800a452:	4770      	bx	lr
- 800a454:	2000000c 	.word	0x2000000c
-
-0800a458 <_fstat_r>:
- 800a458:	b538      	push	{r3, r4, r5, lr}
- 800a45a:	2300      	movs	r3, #0
- 800a45c:	4d06      	ldr	r5, [pc, #24]	; (800a478 <_fstat_r+0x20>)
- 800a45e:	4604      	mov	r4, r0
- 800a460:	4608      	mov	r0, r1
- 800a462:	4611      	mov	r1, r2
- 800a464:	602b      	str	r3, [r5, #0]
- 800a466:	f7f7 fb9a 	bl	8001b9e <_fstat>
- 800a46a:	1c43      	adds	r3, r0, #1
- 800a46c:	d102      	bne.n	800a474 <_fstat_r+0x1c>
- 800a46e:	682b      	ldr	r3, [r5, #0]
- 800a470:	b103      	cbz	r3, 800a474 <_fstat_r+0x1c>
- 800a472:	6023      	str	r3, [r4, #0]
- 800a474:	bd38      	pop	{r3, r4, r5, pc}
- 800a476:	bf00      	nop
- 800a478:	20002620 	.word	0x20002620
-
-0800a47c <_isatty_r>:
- 800a47c:	b538      	push	{r3, r4, r5, lr}
- 800a47e:	2300      	movs	r3, #0
- 800a480:	4d05      	ldr	r5, [pc, #20]	; (800a498 <_isatty_r+0x1c>)
- 800a482:	4604      	mov	r4, r0
- 800a484:	4608      	mov	r0, r1
- 800a486:	602b      	str	r3, [r5, #0]
- 800a488:	f7f7 fb98 	bl	8001bbc <_isatty>
- 800a48c:	1c43      	adds	r3, r0, #1
- 800a48e:	d102      	bne.n	800a496 <_isatty_r+0x1a>
- 800a490:	682b      	ldr	r3, [r5, #0]
- 800a492:	b103      	cbz	r3, 800a496 <_isatty_r+0x1a>
- 800a494:	6023      	str	r3, [r4, #0]
- 800a496:	bd38      	pop	{r3, r4, r5, pc}
- 800a498:	20002620 	.word	0x20002620
-
-0800a49c <_lseek_r>:
- 800a49c:	b538      	push	{r3, r4, r5, lr}
- 800a49e:	4604      	mov	r4, r0
- 800a4a0:	4608      	mov	r0, r1
- 800a4a2:	4611      	mov	r1, r2
- 800a4a4:	2200      	movs	r2, #0
- 800a4a6:	4d05      	ldr	r5, [pc, #20]	; (800a4bc <_lseek_r+0x20>)
- 800a4a8:	602a      	str	r2, [r5, #0]
- 800a4aa:	461a      	mov	r2, r3
- 800a4ac:	f7f7 fb90 	bl	8001bd0 <_lseek>
- 800a4b0:	1c43      	adds	r3, r0, #1
- 800a4b2:	d102      	bne.n	800a4ba <_lseek_r+0x1e>
- 800a4b4:	682b      	ldr	r3, [r5, #0]
- 800a4b6:	b103      	cbz	r3, 800a4ba <_lseek_r+0x1e>
- 800a4b8:	6023      	str	r3, [r4, #0]
- 800a4ba:	bd38      	pop	{r3, r4, r5, pc}
- 800a4bc:	20002620 	.word	0x20002620
-
-0800a4c0 <__ascii_mbtowc>:
- 800a4c0:	b082      	sub	sp, #8
- 800a4c2:	b901      	cbnz	r1, 800a4c6 <__ascii_mbtowc+0x6>
- 800a4c4:	a901      	add	r1, sp, #4
- 800a4c6:	b142      	cbz	r2, 800a4da <__ascii_mbtowc+0x1a>
- 800a4c8:	b14b      	cbz	r3, 800a4de <__ascii_mbtowc+0x1e>
- 800a4ca:	7813      	ldrb	r3, [r2, #0]
- 800a4cc:	600b      	str	r3, [r1, #0]
- 800a4ce:	7812      	ldrb	r2, [r2, #0]
- 800a4d0:	1e10      	subs	r0, r2, #0
- 800a4d2:	bf18      	it	ne
- 800a4d4:	2001      	movne	r0, #1
- 800a4d6:	b002      	add	sp, #8
- 800a4d8:	4770      	bx	lr
- 800a4da:	4610      	mov	r0, r2
- 800a4dc:	e7fb      	b.n	800a4d6 <__ascii_mbtowc+0x16>
- 800a4de:	f06f 0001 	mvn.w	r0, #1
- 800a4e2:	e7f8      	b.n	800a4d6 <__ascii_mbtowc+0x16>
-
-0800a4e4 <memmove>:
- 800a4e4:	4288      	cmp	r0, r1
- 800a4e6:	b510      	push	{r4, lr}
- 800a4e8:	eb01 0402 	add.w	r4, r1, r2
- 800a4ec:	d902      	bls.n	800a4f4 <memmove+0x10>
- 800a4ee:	4284      	cmp	r4, r0
- 800a4f0:	4623      	mov	r3, r4
- 800a4f2:	d807      	bhi.n	800a504 <memmove+0x20>
- 800a4f4:	1e43      	subs	r3, r0, #1
- 800a4f6:	42a1      	cmp	r1, r4
- 800a4f8:	d008      	beq.n	800a50c <memmove+0x28>
- 800a4fa:	f811 2b01 	ldrb.w	r2, [r1], #1
- 800a4fe:	f803 2f01 	strb.w	r2, [r3, #1]!
- 800a502:	e7f8      	b.n	800a4f6 <memmove+0x12>
- 800a504:	4601      	mov	r1, r0
- 800a506:	4402      	add	r2, r0
- 800a508:	428a      	cmp	r2, r1
- 800a50a:	d100      	bne.n	800a50e <memmove+0x2a>
- 800a50c:	bd10      	pop	{r4, pc}
- 800a50e:	f813 4d01 	ldrb.w	r4, [r3, #-1]!
- 800a512:	f802 4d01 	strb.w	r4, [r2, #-1]!
- 800a516:	e7f7      	b.n	800a508 <memmove+0x24>
-
-0800a518 <_realloc_r>:
- 800a518:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+0800a4f0 <_realloc_r>:
+ 800a4f0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
+ 800a4f4:	4680      	mov	r8, r0
+ 800a4f6:	4614      	mov	r4, r2
+ 800a4f8:	460e      	mov	r6, r1
+ 800a4fa:	b921      	cbnz	r1, 800a506 <_realloc_r+0x16>
+ 800a4fc:	4611      	mov	r1, r2
+ 800a4fe:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
+ 800a502:	f7fd ba51 	b.w	80079a8 <_malloc_r>
+ 800a506:	b92a      	cbnz	r2, 800a514 <_realloc_r+0x24>
+ 800a508:	f7fe fffe 	bl	8009508 <_free_r>
+ 800a50c:	4625      	mov	r5, r4
+ 800a50e:	4628      	mov	r0, r5
+ 800a510:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
+ 800a514:	f000 f841 	bl	800a59a <_malloc_usable_size_r>
+ 800a518:	4284      	cmp	r4, r0
  800a51a:	4607      	mov	r7, r0
- 800a51c:	4614      	mov	r4, r2
- 800a51e:	460e      	mov	r6, r1
- 800a520:	b921      	cbnz	r1, 800a52c <_realloc_r+0x14>
- 800a522:	4611      	mov	r1, r2
- 800a524:	e8bd 40f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, lr}
- 800a528:	f7fd ba48 	b.w	80079bc <_malloc_r>
- 800a52c:	b922      	cbnz	r2, 800a538 <_realloc_r+0x20>
- 800a52e:	f7fd f9f9 	bl	8007924 <_free_r>
- 800a532:	4625      	mov	r5, r4
- 800a534:	4628      	mov	r0, r5
- 800a536:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
- 800a538:	f000 f83a 	bl	800a5b0 <_malloc_usable_size_r>
- 800a53c:	42a0      	cmp	r0, r4
- 800a53e:	d20f      	bcs.n	800a560 <_realloc_r+0x48>
- 800a540:	4621      	mov	r1, r4
- 800a542:	4638      	mov	r0, r7
- 800a544:	f7fd fa3a 	bl	80079bc <_malloc_r>
- 800a548:	4605      	mov	r5, r0
- 800a54a:	2800      	cmp	r0, #0
- 800a54c:	d0f2      	beq.n	800a534 <_realloc_r+0x1c>
- 800a54e:	4631      	mov	r1, r6
- 800a550:	4622      	mov	r2, r4
- 800a552:	f7ff f88d 	bl	8009670 <memcpy>
- 800a556:	4631      	mov	r1, r6
- 800a558:	4638      	mov	r0, r7
- 800a55a:	f7fd f9e3 	bl	8007924 <_free_r>
- 800a55e:	e7e9      	b.n	800a534 <_realloc_r+0x1c>
- 800a560:	4635      	mov	r5, r6
- 800a562:	e7e7      	b.n	800a534 <_realloc_r+0x1c>
+ 800a51c:	d802      	bhi.n	800a524 <_realloc_r+0x34>
+ 800a51e:	ebb4 0f50 	cmp.w	r4, r0, lsr #1
+ 800a522:	d812      	bhi.n	800a54a <_realloc_r+0x5a>
+ 800a524:	4621      	mov	r1, r4
+ 800a526:	4640      	mov	r0, r8
+ 800a528:	f7fd fa3e 	bl	80079a8 <_malloc_r>
+ 800a52c:	4605      	mov	r5, r0
+ 800a52e:	2800      	cmp	r0, #0
+ 800a530:	d0ed      	beq.n	800a50e <_realloc_r+0x1e>
+ 800a532:	42bc      	cmp	r4, r7
+ 800a534:	4622      	mov	r2, r4
+ 800a536:	4631      	mov	r1, r6
+ 800a538:	bf28      	it	cs
+ 800a53a:	463a      	movcs	r2, r7
+ 800a53c:	f7ff ff86 	bl	800a44c <memcpy>
+ 800a540:	4631      	mov	r1, r6
+ 800a542:	4640      	mov	r0, r8
+ 800a544:	f7fe ffe0 	bl	8009508 <_free_r>
+ 800a548:	e7e1      	b.n	800a50e <_realloc_r+0x1e>
+ 800a54a:	4635      	mov	r5, r6
+ 800a54c:	e7df      	b.n	800a50e <_realloc_r+0x1e>
 
-0800a564 <_read_r>:
- 800a564:	b538      	push	{r3, r4, r5, lr}
- 800a566:	4604      	mov	r4, r0
- 800a568:	4608      	mov	r0, r1
- 800a56a:	4611      	mov	r1, r2
- 800a56c:	2200      	movs	r2, #0
- 800a56e:	4d05      	ldr	r5, [pc, #20]	; (800a584 <_read_r+0x20>)
- 800a570:	602a      	str	r2, [r5, #0]
- 800a572:	461a      	mov	r2, r3
- 800a574:	f7f7 faeb 	bl	8001b4e <_read>
- 800a578:	1c43      	adds	r3, r0, #1
- 800a57a:	d102      	bne.n	800a582 <_read_r+0x1e>
- 800a57c:	682b      	ldr	r3, [r5, #0]
- 800a57e:	b103      	cbz	r3, 800a582 <_read_r+0x1e>
- 800a580:	6023      	str	r3, [r4, #0]
- 800a582:	bd38      	pop	{r3, r4, r5, pc}
- 800a584:	20002620 	.word	0x20002620
+0800a54e <__ascii_wctomb>:
+ 800a54e:	4603      	mov	r3, r0
+ 800a550:	4608      	mov	r0, r1
+ 800a552:	b141      	cbz	r1, 800a566 <__ascii_wctomb+0x18>
+ 800a554:	2aff      	cmp	r2, #255	; 0xff
+ 800a556:	d904      	bls.n	800a562 <__ascii_wctomb+0x14>
+ 800a558:	228a      	movs	r2, #138	; 0x8a
+ 800a55a:	f04f 30ff 	mov.w	r0, #4294967295
+ 800a55e:	601a      	str	r2, [r3, #0]
+ 800a560:	4770      	bx	lr
+ 800a562:	2001      	movs	r0, #1
+ 800a564:	700a      	strb	r2, [r1, #0]
+ 800a566:	4770      	bx	lr
 
-0800a588 <__ascii_wctomb>:
- 800a588:	4603      	mov	r3, r0
- 800a58a:	4608      	mov	r0, r1
- 800a58c:	b141      	cbz	r1, 800a5a0 <__ascii_wctomb+0x18>
- 800a58e:	2aff      	cmp	r2, #255	; 0xff
- 800a590:	d904      	bls.n	800a59c <__ascii_wctomb+0x14>
- 800a592:	228a      	movs	r2, #138	; 0x8a
- 800a594:	f04f 30ff 	mov.w	r0, #4294967295
- 800a598:	601a      	str	r2, [r3, #0]
- 800a59a:	4770      	bx	lr
- 800a59c:	2001      	movs	r0, #1
- 800a59e:	700a      	strb	r2, [r1, #0]
- 800a5a0:	4770      	bx	lr
+0800a568 <fiprintf>:
+ 800a568:	b40e      	push	{r1, r2, r3}
+ 800a56a:	b503      	push	{r0, r1, lr}
+ 800a56c:	4601      	mov	r1, r0
+ 800a56e:	ab03      	add	r3, sp, #12
+ 800a570:	4805      	ldr	r0, [pc, #20]	; (800a588 <fiprintf+0x20>)
+ 800a572:	f853 2b04 	ldr.w	r2, [r3], #4
+ 800a576:	6800      	ldr	r0, [r0, #0]
+ 800a578:	9301      	str	r3, [sp, #4]
+ 800a57a:	f7ff fd05 	bl	8009f88 <_vfiprintf_r>
+ 800a57e:	b002      	add	sp, #8
+ 800a580:	f85d eb04 	ldr.w	lr, [sp], #4
+ 800a584:	b003      	add	sp, #12
+ 800a586:	4770      	bx	lr
+ 800a588:	20000064 	.word	0x20000064
 
-0800a5a2 <abort>:
- 800a5a2:	2006      	movs	r0, #6
- 800a5a4:	b508      	push	{r3, lr}
- 800a5a6:	f000 f833 	bl	800a610 <raise>
- 800a5aa:	2001      	movs	r0, #1
- 800a5ac:	f7f7 fac5 	bl	8001b3a <_exit>
+0800a58c <abort>:
+ 800a58c:	2006      	movs	r0, #6
+ 800a58e:	b508      	push	{r3, lr}
+ 800a590:	f000 f834 	bl	800a5fc <raise>
+ 800a594:	2001      	movs	r0, #1
+ 800a596:	f7f7 fad0 	bl	8001b3a <_exit>
 
-0800a5b0 <_malloc_usable_size_r>:
- 800a5b0:	f851 3c04 	ldr.w	r3, [r1, #-4]
- 800a5b4:	1f18      	subs	r0, r3, #4
- 800a5b6:	2b00      	cmp	r3, #0
- 800a5b8:	bfbc      	itt	lt
- 800a5ba:	580b      	ldrlt	r3, [r1, r0]
- 800a5bc:	18c0      	addlt	r0, r0, r3
- 800a5be:	4770      	bx	lr
+0800a59a <_malloc_usable_size_r>:
+ 800a59a:	f851 3c04 	ldr.w	r3, [r1, #-4]
+ 800a59e:	1f18      	subs	r0, r3, #4
+ 800a5a0:	2b00      	cmp	r3, #0
+ 800a5a2:	bfbc      	itt	lt
+ 800a5a4:	580b      	ldrlt	r3, [r1, r0]
+ 800a5a6:	18c0      	addlt	r0, r0, r3
+ 800a5a8:	4770      	bx	lr
 
-0800a5c0 <_raise_r>:
- 800a5c0:	291f      	cmp	r1, #31
- 800a5c2:	b538      	push	{r3, r4, r5, lr}
- 800a5c4:	4604      	mov	r4, r0
- 800a5c6:	460d      	mov	r5, r1
- 800a5c8:	d904      	bls.n	800a5d4 <_raise_r+0x14>
- 800a5ca:	2316      	movs	r3, #22
- 800a5cc:	6003      	str	r3, [r0, #0]
- 800a5ce:	f04f 30ff 	mov.w	r0, #4294967295
- 800a5d2:	bd38      	pop	{r3, r4, r5, pc}
- 800a5d4:	6c42      	ldr	r2, [r0, #68]	; 0x44
- 800a5d6:	b112      	cbz	r2, 800a5de <_raise_r+0x1e>
- 800a5d8:	f852 3021 	ldr.w	r3, [r2, r1, lsl #2]
- 800a5dc:	b94b      	cbnz	r3, 800a5f2 <_raise_r+0x32>
- 800a5de:	4620      	mov	r0, r4
- 800a5e0:	f000 f830 	bl	800a644 <_getpid_r>
- 800a5e4:	462a      	mov	r2, r5
- 800a5e6:	4601      	mov	r1, r0
- 800a5e8:	4620      	mov	r0, r4
- 800a5ea:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
- 800a5ee:	f000 b817 	b.w	800a620 <_kill_r>
- 800a5f2:	2b01      	cmp	r3, #1
- 800a5f4:	d00a      	beq.n	800a60c <_raise_r+0x4c>
- 800a5f6:	1c59      	adds	r1, r3, #1
- 800a5f8:	d103      	bne.n	800a602 <_raise_r+0x42>
- 800a5fa:	2316      	movs	r3, #22
- 800a5fc:	6003      	str	r3, [r0, #0]
- 800a5fe:	2001      	movs	r0, #1
- 800a600:	e7e7      	b.n	800a5d2 <_raise_r+0x12>
- 800a602:	2400      	movs	r4, #0
- 800a604:	4628      	mov	r0, r5
- 800a606:	f842 4025 	str.w	r4, [r2, r5, lsl #2]
- 800a60a:	4798      	blx	r3
- 800a60c:	2000      	movs	r0, #0
- 800a60e:	e7e0      	b.n	800a5d2 <_raise_r+0x12>
+0800a5aa <_raise_r>:
+ 800a5aa:	291f      	cmp	r1, #31
+ 800a5ac:	b538      	push	{r3, r4, r5, lr}
+ 800a5ae:	4604      	mov	r4, r0
+ 800a5b0:	460d      	mov	r5, r1
+ 800a5b2:	d904      	bls.n	800a5be <_raise_r+0x14>
+ 800a5b4:	2316      	movs	r3, #22
+ 800a5b6:	6003      	str	r3, [r0, #0]
+ 800a5b8:	f04f 30ff 	mov.w	r0, #4294967295
+ 800a5bc:	bd38      	pop	{r3, r4, r5, pc}
+ 800a5be:	6bc2      	ldr	r2, [r0, #60]	; 0x3c
+ 800a5c0:	b112      	cbz	r2, 800a5c8 <_raise_r+0x1e>
+ 800a5c2:	f852 3021 	ldr.w	r3, [r2, r1, lsl #2]
+ 800a5c6:	b94b      	cbnz	r3, 800a5dc <_raise_r+0x32>
+ 800a5c8:	4620      	mov	r0, r4
+ 800a5ca:	f000 f831 	bl	800a630 <_getpid_r>
+ 800a5ce:	462a      	mov	r2, r5
+ 800a5d0:	4601      	mov	r1, r0
+ 800a5d2:	4620      	mov	r0, r4
+ 800a5d4:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
+ 800a5d8:	f000 b818 	b.w	800a60c <_kill_r>
+ 800a5dc:	2b01      	cmp	r3, #1
+ 800a5de:	d00a      	beq.n	800a5f6 <_raise_r+0x4c>
+ 800a5e0:	1c59      	adds	r1, r3, #1
+ 800a5e2:	d103      	bne.n	800a5ec <_raise_r+0x42>
+ 800a5e4:	2316      	movs	r3, #22
+ 800a5e6:	6003      	str	r3, [r0, #0]
+ 800a5e8:	2001      	movs	r0, #1
+ 800a5ea:	e7e7      	b.n	800a5bc <_raise_r+0x12>
+ 800a5ec:	2400      	movs	r4, #0
+ 800a5ee:	4628      	mov	r0, r5
+ 800a5f0:	f842 4025 	str.w	r4, [r2, r5, lsl #2]
+ 800a5f4:	4798      	blx	r3
+ 800a5f6:	2000      	movs	r0, #0
+ 800a5f8:	e7e0      	b.n	800a5bc <_raise_r+0x12>
+	...
 
-0800a610 <raise>:
- 800a610:	4b02      	ldr	r3, [pc, #8]	; (800a61c <raise+0xc>)
- 800a612:	4601      	mov	r1, r0
- 800a614:	6818      	ldr	r0, [r3, #0]
- 800a616:	f7ff bfd3 	b.w	800a5c0 <_raise_r>
- 800a61a:	bf00      	nop
- 800a61c:	2000000c 	.word	0x2000000c
+0800a5fc <raise>:
+ 800a5fc:	4b02      	ldr	r3, [pc, #8]	; (800a608 <raise+0xc>)
+ 800a5fe:	4601      	mov	r1, r0
+ 800a600:	6818      	ldr	r0, [r3, #0]
+ 800a602:	f7ff bfd2 	b.w	800a5aa <_raise_r>
+ 800a606:	bf00      	nop
+ 800a608:	20000064 	.word	0x20000064
 
-0800a620 <_kill_r>:
- 800a620:	b538      	push	{r3, r4, r5, lr}
- 800a622:	2300      	movs	r3, #0
- 800a624:	4d06      	ldr	r5, [pc, #24]	; (800a640 <_kill_r+0x20>)
- 800a626:	4604      	mov	r4, r0
- 800a628:	4608      	mov	r0, r1
- 800a62a:	4611      	mov	r1, r2
- 800a62c:	602b      	str	r3, [r5, #0]
- 800a62e:	f7f7 fa74 	bl	8001b1a <_kill>
- 800a632:	1c43      	adds	r3, r0, #1
- 800a634:	d102      	bne.n	800a63c <_kill_r+0x1c>
- 800a636:	682b      	ldr	r3, [r5, #0]
- 800a638:	b103      	cbz	r3, 800a63c <_kill_r+0x1c>
- 800a63a:	6023      	str	r3, [r4, #0]
- 800a63c:	bd38      	pop	{r3, r4, r5, pc}
- 800a63e:	bf00      	nop
- 800a640:	20002620 	.word	0x20002620
+0800a60c <_kill_r>:
+ 800a60c:	b538      	push	{r3, r4, r5, lr}
+ 800a60e:	2300      	movs	r3, #0
+ 800a610:	4d06      	ldr	r5, [pc, #24]	; (800a62c <_kill_r+0x20>)
+ 800a612:	4604      	mov	r4, r0
+ 800a614:	4608      	mov	r0, r1
+ 800a616:	4611      	mov	r1, r2
+ 800a618:	602b      	str	r3, [r5, #0]
+ 800a61a:	f7f7 fa7e 	bl	8001b1a <_kill>
+ 800a61e:	1c43      	adds	r3, r0, #1
+ 800a620:	d102      	bne.n	800a628 <_kill_r+0x1c>
+ 800a622:	682b      	ldr	r3, [r5, #0]
+ 800a624:	b103      	cbz	r3, 800a628 <_kill_r+0x1c>
+ 800a626:	6023      	str	r3, [r4, #0]
+ 800a628:	bd38      	pop	{r3, r4, r5, pc}
+ 800a62a:	bf00      	nop
+ 800a62c:	200026fc 	.word	0x200026fc
 
-0800a644 <_getpid_r>:
- 800a644:	f7f7 ba62 	b.w	8001b0c <_getpid>
+0800a630 <_getpid_r>:
+ 800a630:	f7f7 ba6c 	b.w	8001b0c <_getpid>
 
-0800a648 <_init>:
- 800a648:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 800a64a:	bf00      	nop
- 800a64c:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 800a64e:	bc08      	pop	{r3}
- 800a650:	469e      	mov	lr, r3
- 800a652:	4770      	bx	lr
+0800a634 <_init>:
+ 800a634:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 800a636:	bf00      	nop
+ 800a638:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 800a63a:	bc08      	pop	{r3}
+ 800a63c:	469e      	mov	lr, r3
+ 800a63e:	4770      	bx	lr
 
-0800a654 <_fini>:
- 800a654:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 800a656:	bf00      	nop
- 800a658:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 800a65a:	bc08      	pop	{r3}
- 800a65c:	469e      	mov	lr, r3
- 800a65e:	4770      	bx	lr
+0800a640 <_fini>:
+ 800a640:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 800a642:	bf00      	nop
+ 800a644:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 800a646:	bc08      	pop	{r3}
+ 800a648:	469e      	mov	lr, r3
+ 800a64a:	4770      	bx	lr
diff --git a/Debug/m3s.map b/Debug/m3s.map
index f7f32cd..a123885 100644
--- a/Debug/m3s.map
+++ b/Debug/m3s.map
@@ -1,233 +1,170 @@
 Archive member included to satisfy reference by file (symbol)
 
-c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-errno.o)
-                              ./Core/Src/syscalls.o (__errno)
-c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-exit.o)
-                              c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/crt0.o (exit)
-c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-impure.o)
-                              c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-exit.o) (_global_impure_ptr)
-c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-init.o)
-                              c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/crt0.o (__libc_init_array)
-c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-malloc.o)
+C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-exit.o)
+                              C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/crt0.o (exit)
+C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-malloc.o)
                               ./HW_Devices/buzzer.o (malloc)
-c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-memset.o)
-                              c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/crt0.o (memset)
-c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-nano-freer.o)
-                              c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-malloc.o) (_free_r)
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                               (_printf_float)
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                               ./SW_APPs/APP_IDcard.o (printf)
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                               ./SW_APPs/APP_IDcard.o (putchar)
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                               ./SW_APPs/APP_IDcard.o (puts)
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                               ./HW_Devices/touch.o (sprintf)
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+                              C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-reallocr.o) (_malloc_usable_size_r)
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+                              C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-abort.o) (raise)
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+                              C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-signal.o) (_kill_r)
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                               ./SW_APPs/APP_blood.o (sqrtf)
-c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(lib_a-ef_sqrt.o)
-                              c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(lib_a-wf_sqrt.o) (__ieee754_sqrtf)
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-                              c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(lib_a-wf_sqrt.o) (__fdlib_version)
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+                              C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-wf_sqrt.o) (__ieee754_sqrtf)
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                               ./SW_APPs/APP_blood.o (__aeabi_dmul)
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                               ./HW_Devices/buzzer.o (__aeabi_fmul)
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                               ./SW_APPs/APP_blood.o (__aeabi_dsub)
-c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivdf3.o)
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                               ./HW_Devices/touch.o (__aeabi_ddiv)
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                               ./SW_APPs/APP_blood.o (__aeabi_dcmpeq)
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-                              c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-nano-vfprintf_float.o) (__aeabi_dcmpun)
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+                              C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-nano-vfprintf_float.o) (__aeabi_dcmpun)
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                               ./SW_APPs/APP_blood.o (__aeabi_d2iz)
-c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_truncdfsf2.o)
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                               ./HW_Devices/touch.o (__aeabi_d2f)
-c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o)
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                               ./HW_Devices/touch.o (__aeabi_fsub)
-c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o)
+C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o)
                               ./HW_Devices/buzzer.o (__aeabi_fdiv)
-c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpsf2.o)
+C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpsf2.o)
                               ./SW_APPs/APP_blood.o (__aeabi_fcmplt)
-c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o)
-                              c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(lib_a-wf_sqrt.o) (__aeabi_fcmpun)
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+                              C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-wf_sqrt.o) (__aeabi_fcmpun)
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                               ./HW_Devices/touch.o (__aeabi_f2iz)
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                               ./HW_Devices/buzzer.o (__aeabi_f2uiz)
 
-Allocating common symbols
-Common symbol       size              file
-
-blood_str           0x40              ./SW_APPs/APP_blood.o
-run_loop            0x8               ./SW_APPs/Main_APP.o
-__lock___atexit_recursive_mutex
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-RFID                0x10              ./SW_APPs/APP_IDcard.o
-__lock___arc4random_mutex
-                    0x1               c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-lock.o)
-htim4               0x48              ./Core/Src/main.o
-errno               0x4               c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-reent.o)
-fifo_ir             0x2               ./SW_APPs/APP_blood.o
-PA                  0x1               ./SW_APPs/APP_IDcard.o
-notes               0x4               ./HW_Devices/buzzer.o
-tconfig             0x18              ./HW_Devices/touch.o
-hi2c2               0x54              ./Core/Src/main.o
-uwTick              0x4               ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o
-pFlash              0x20              ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
-__lock___env_recursive_mutex
-                    0x1               c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-lock.o)
-__lock___sinit_recursive_mutex
-                    0x1               c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-lock.o)
-morsecode_window    0x4               ./SW_APPs/APP_morsecode.o
-blood_win           0x4               ./SW_APPs/APP_blood.o
-hsram1              0x48              ./Core/Src/main.o
-s1                  0x1080            ./SW_APPs/APP_blood.o
-idcard_str          0x20              ./SW_APPs/APP_IDcard.o
-__lock___malloc_recursive_mutex
-                    0x1               c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-lock.o)
-morse_input_buff    0x81              ./SW_APPs/APP_morsecode.o
-read_flag           0x1               ./SW_APPs/APP_IDcard.o
-idcard_window       0x4               ./SW_APPs/APP_IDcard.o
-k2                  0x10              ./HW_Devices/key.o
-morse_y             0x4               ./SW_APPs/APP_morsecode.o
-eeprom_write_buffer
-                    0x14              ./HW_Devices/eeprom.o
-checkkey            0x1               ./SW_APPs/APP_IDcard.o
-CT                  0x2               ./SW_APPs/APP_IDcard.o
-htim6               0x48              ./Core/Src/main.o
-k3                  0x10              ./HW_Devices/key.o
-lcddev              0xa               ./HW_Devices/LCD.o
-SN                  0x4               ./SW_APPs/APP_IDcard.o
-s2                  0x1080            ./SW_APPs/APP_blood.o
-t0                  0x10              ./HW_Devices/touch.o
-fundcard            0x1               ./SW_APPs/APP_IDcard.o
-hspi1               0x58              ./Core/Src/main.o
-g_BloodWave         0x8               ./SW_APPs/APP_blood.o
-morse_x             0x4               ./SW_APPs/APP_morsecode.o
-__lock___at_quick_exit_mutex
-                    0x1               c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-lock.o)
-morse_temp          0x2               ./SW_APPs/APP_morsecode.o
-k1                  0x10              ./HW_Devices/key.o
-__lock___dd_hash_mutex
-                    0x1               c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-lock.o)
-__lock___tz_mutex   0x1               c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-lock.o)
-sele                0x1               ./SW_APPs/APP_IDcard.o
-fifo_red            0x2               ./SW_APPs/APP_blood.o
-status              0x1               ./SW_APPs/APP_IDcard.o
-__lock___sfp_recursive_mutex
-                    0x1               c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-lock.o)
-
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  .group         0x0000000000000000        0xc ./Core/Src/main.o
@@ -347,14 +284,6 @@ Discarded input sections
  .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_hal_msp.o
  .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_hal_msp.o
  .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_hal_msp.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_hal_msp.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_hal_msp.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_hal_msp.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_hal_msp.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_hal_msp.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_hal_msp.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_hal_msp.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_hal_msp.o
  .text          0x0000000000000000        0x0 ./Core/Src/stm32f1xx_hal_msp.o
  .data          0x0000000000000000        0x0 ./Core/Src/stm32f1xx_hal_msp.o
  .bss           0x0000000000000000        0x0 ./Core/Src/stm32f1xx_hal_msp.o
@@ -382,7 +311,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0x1c ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0x22 ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000       0xc3 ./Core/Src/stm32f1xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0xbd ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000      0xd23 ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000     0xfd8c ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0x6d ./Core/Src/stm32f1xx_hal_msp.o
@@ -408,33 +337,25 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000      0x8d1 ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0xb5 ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x52 ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x18 ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x3c ./Core/Src/stm32f1xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x61 ./Core/Src/stm32f1xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x24 ./Core/Src/stm32f1xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x43 ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0x34 ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0x16 ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0x35 ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x333 ./Core/Src/stm32f1xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x369 ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0x10 ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0x16 ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0x43 ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0x34 ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0x10 ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0x58 ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x71 ./Core/Src/stm32f1xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x8e ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0x1c ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x12a ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x10 ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x1c ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x52 ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x22 ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x10 ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x40 ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000       0xd5 ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x1c ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000       0x3d ./Core/Src/stm32f1xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x177 ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0x16 ./Core/Src/stm32f1xx_hal_msp.o
- .debug_macro   0x0000000000000000      0x145 ./Core/Src/stm32f1xx_hal_msp.o
+ .debug_macro   0x0000000000000000       0x16 ./Core/Src/stm32f1xx_hal_msp.o
+ .debug_macro   0x0000000000000000      0x147 ./Core/Src/stm32f1xx_hal_msp.o
  .debug_macro   0x0000000000000000       0xac ./Core/Src/stm32f1xx_hal_msp.o
  .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_it.o
  .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_it.o
@@ -494,14 +415,6 @@ Discarded input sections
  .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_it.o
  .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_it.o
  .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_it.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_it.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_it.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_it.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_it.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_it.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_it.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_it.o
- .group         0x0000000000000000        0xc ./Core/Src/stm32f1xx_it.o
  .text          0x0000000000000000        0x0 ./Core/Src/stm32f1xx_it.o
  .data          0x0000000000000000        0x0 ./Core/Src/stm32f1xx_it.o
  .bss           0x0000000000000000        0x0 ./Core/Src/stm32f1xx_it.o
@@ -517,7 +430,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0x1c ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0x22 ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000       0xc3 ./Core/Src/stm32f1xx_it.o
+ .debug_macro   0x0000000000000000       0xbd ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000      0xd23 ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000     0xfd8c ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0x6d ./Core/Src/stm32f1xx_it.o
@@ -543,33 +456,25 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000      0x8d1 ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0xb5 ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000       0x52 ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000       0x18 ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000       0x3c ./Core/Src/stm32f1xx_it.o
+ .debug_macro   0x0000000000000000       0x61 ./Core/Src/stm32f1xx_it.o
+ .debug_macro   0x0000000000000000       0x24 ./Core/Src/stm32f1xx_it.o
+ .debug_macro   0x0000000000000000       0x43 ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0x34 ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0x16 ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0x35 ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000      0x333 ./Core/Src/stm32f1xx_it.o
+ .debug_macro   0x0000000000000000      0x369 ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0x10 ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0x16 ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0x43 ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0x34 ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0x10 ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0x58 ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000       0x71 ./Core/Src/stm32f1xx_it.o
+ .debug_macro   0x0000000000000000       0x8e ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0x1c ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000      0x12a ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000       0x10 ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000       0x1c ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000       0x52 ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000       0x22 ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000       0x10 ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000       0x40 ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000       0xd5 ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000       0x1c ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000       0x3d ./Core/Src/stm32f1xx_it.o
+ .debug_macro   0x0000000000000000      0x177 ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0x16 ./Core/Src/stm32f1xx_it.o
- .debug_macro   0x0000000000000000      0x145 ./Core/Src/stm32f1xx_it.o
+ .debug_macro   0x0000000000000000       0x16 ./Core/Src/stm32f1xx_it.o
+ .debug_macro   0x0000000000000000      0x147 ./Core/Src/stm32f1xx_it.o
  .debug_macro   0x0000000000000000       0xac ./Core/Src/stm32f1xx_it.o
  .group         0x0000000000000000        0xc ./Core/Src/syscalls.o
  .group         0x0000000000000000        0xc ./Core/Src/syscalls.o
@@ -618,6 +523,8 @@ Discarded input sections
  .group         0x0000000000000000        0xc ./Core/Src/syscalls.o
  .group         0x0000000000000000        0xc ./Core/Src/syscalls.o
  .group         0x0000000000000000        0xc ./Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc ./Core/Src/syscalls.o
+ .group         0x0000000000000000        0xc ./Core/Src/syscalls.o
  .text          0x0000000000000000        0x0 ./Core/Src/syscalls.o
  .data          0x0000000000000000        0x0 ./Core/Src/syscalls.o
  .bss           0x0000000000000000        0x0 ./Core/Src/syscalls.o
@@ -636,32 +543,26 @@ Discarded input sections
  .text._execve  0x0000000000000000       0x22 ./Core/Src/syscalls.o
  .debug_macro   0x0000000000000000      0xa9c ./Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x22 ./Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x18 ./Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x3c ./Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x24 ./Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x43 ./Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x34 ./Core/Src/syscalls.o
  .debug_macro   0x0000000000000000      0x174 ./Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x369 ./Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x16 ./Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x43 ./Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x34 ./Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x10 ./Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x58 ./Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x71 ./Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000       0x8e ./Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x1c ./Core/Src/syscalls.o
- .debug_macro   0x0000000000000000      0x12a ./Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x177 ./Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x35 ./Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x10 ./Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x6a ./Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x1c ./Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x52 ./Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x22 ./Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x10 ./Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x40 ./Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0xd5 ./Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x1c ./Core/Src/syscalls.o
- .debug_macro   0x0000000000000000       0x3d ./Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x10 ./Core/Src/syscalls.o
  .debug_macro   0x0000000000000000       0x16 ./Core/Src/syscalls.o
- .debug_macro   0x0000000000000000      0x145 ./Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x147 ./Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x103 ./Core/Src/syscalls.o
+ .debug_macro   0x0000000000000000      0x1df ./Core/Src/syscalls.o
  .group         0x0000000000000000        0xc ./Core/Src/sysmem.o
  .group         0x0000000000000000        0xc ./Core/Src/sysmem.o
  .group         0x0000000000000000        0xc ./Core/Src/sysmem.o
@@ -690,10 +591,10 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0xa9c ./Core/Src/sysmem.o
  .debug_macro   0x0000000000000000       0x10 ./Core/Src/sysmem.o
  .debug_macro   0x0000000000000000       0x22 ./Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x4c ./Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x18 ./Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x5b ./Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x24 ./Core/Src/sysmem.o
  .debug_macro   0x0000000000000000       0x94 ./Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x3c ./Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x43 ./Core/Src/sysmem.o
  .debug_macro   0x0000000000000000       0x34 ./Core/Src/sysmem.o
  .debug_macro   0x0000000000000000      0x174 ./Core/Src/sysmem.o
  .debug_macro   0x0000000000000000       0x16 ./Core/Src/sysmem.o
@@ -702,9 +603,9 @@ Discarded input sections
  .debug_macro   0x0000000000000000       0x34 ./Core/Src/sysmem.o
  .debug_macro   0x0000000000000000       0x10 ./Core/Src/sysmem.o
  .debug_macro   0x0000000000000000       0x58 ./Core/Src/sysmem.o
- .debug_macro   0x0000000000000000       0x71 ./Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000       0x8e ./Core/Src/sysmem.o
  .debug_macro   0x0000000000000000       0x1c ./Core/Src/sysmem.o
- .debug_macro   0x0000000000000000      0x12a ./Core/Src/sysmem.o
+ .debug_macro   0x0000000000000000      0x177 ./Core/Src/sysmem.o
  .debug_macro   0x0000000000000000      0x103 ./Core/Src/sysmem.o
  .debug_macro   0x0000000000000000       0x6a ./Core/Src/sysmem.o
  .debug_macro   0x0000000000000000      0x1df ./Core/Src/sysmem.o
@@ -762,7 +663,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Core/Src/system_stm32f1xx.o
  .debug_macro   0x0000000000000000       0x1c ./Core/Src/system_stm32f1xx.o
  .debug_macro   0x0000000000000000       0x22 ./Core/Src/system_stm32f1xx.o
- .debug_macro   0x0000000000000000       0xc3 ./Core/Src/system_stm32f1xx.o
+ .debug_macro   0x0000000000000000       0xbd ./Core/Src/system_stm32f1xx.o
  .debug_macro   0x0000000000000000      0xd23 ./Core/Src/system_stm32f1xx.o
  .debug_macro   0x0000000000000000     0xfd8c ./Core/Src/system_stm32f1xx.o
  .debug_macro   0x0000000000000000       0x6d ./Core/Src/system_stm32f1xx.o
@@ -885,7 +786,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o
@@ -1002,7 +903,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o
@@ -1095,11 +996,12 @@ Discarded input sections
                 0x0000000000000000       0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
  .text.DMA_SetConfig
                 0x0000000000000000       0x5a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
- .debug_info    0x0000000000000000      0x81e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
- .debug_abbrev  0x0000000000000000      0x228 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
+ .debug_info    0x0000000000000000      0x6cd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
+ .debug_abbrev  0x0000000000000000      0x20b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
  .debug_aranges
                 0x0000000000000000       0x80 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
- .debug_ranges  0x0000000000000000       0x70 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
+ .debug_rnglists
+                0x0000000000000000       0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
  .debug_macro   0x0000000000000000      0x1c7 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
  .debug_macro   0x0000000000000000      0xa9c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
  .debug_macro   0x0000000000000000      0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
@@ -1113,7 +1015,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
@@ -1139,9 +1041,9 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
  .debug_macro   0x0000000000000000      0x8d1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
  .debug_macro   0x0000000000000000       0xb5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
- .debug_line    0x0000000000000000     0x1297 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
- .debug_str     0x0000000000000000    0x95010 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
- .comment       0x0000000000000000       0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
+ .debug_line    0x0000000000000000     0x131f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
+ .debug_str     0x0000000000000000    0x94f2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
+ .comment       0x0000000000000000       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
  .debug_frame   0x0000000000000000      0x20c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
  .ARM.attributes
                 0x0000000000000000       0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o
@@ -1204,11 +1106,12 @@ Discarded input sections
                 0x0000000000000000       0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
  .text.HAL_EXTI_GenerateSWI
                 0x0000000000000000       0x2c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
- .debug_info    0x0000000000000000      0x62f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
- .debug_abbrev  0x0000000000000000      0x1e2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
+ .debug_info    0x0000000000000000      0x4ec ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
+ .debug_abbrev  0x0000000000000000      0x1c5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
  .debug_aranges
                 0x0000000000000000       0x60 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
- .debug_ranges  0x0000000000000000       0x50 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
+ .debug_rnglists
+                0x0000000000000000       0x46 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
  .debug_macro   0x0000000000000000      0x1c7 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
  .debug_macro   0x0000000000000000      0xa9c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
  .debug_macro   0x0000000000000000      0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
@@ -1222,7 +1125,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
@@ -1248,9 +1151,9 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
  .debug_macro   0x0000000000000000      0x8d1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
  .debug_macro   0x0000000000000000       0xb5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
- .debug_line    0x0000000000000000      0x995 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
- .debug_str     0x0000000000000000    0x94df5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
- .comment       0x0000000000000000       0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
+ .debug_line    0x0000000000000000      0xa1d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
+ .debug_str     0x0000000000000000    0x94d06 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
+ .comment       0x0000000000000000       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
  .debug_frame   0x0000000000000000      0x174 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
  .ARM.attributes
                 0x0000000000000000       0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o
@@ -1295,6 +1198,7 @@ Discarded input sections
  .text          0x0000000000000000        0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .data          0x0000000000000000        0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .bss           0x0000000000000000        0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
+ .bss.pFlash    0x0000000000000000       0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .text.HAL_FLASH_Program
                 0x0000000000000000       0xe0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .text.HAL_FLASH_Program_IT
@@ -1323,11 +1227,12 @@ Discarded input sections
                 0x0000000000000000       0x8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .text.FLASH_SetErrorCode
                 0x0000000000000000       0xa0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
- .debug_info    0x0000000000000000      0x5f3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
- .debug_abbrev  0x0000000000000000      0x23e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
+ .debug_info    0x0000000000000000      0x4f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
+ .debug_abbrev  0x0000000000000000      0x250 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .debug_aranges
                 0x0000000000000000       0x88 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
- .debug_ranges  0x0000000000000000       0x78 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
+ .debug_rnglists
+                0x0000000000000000       0x66 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .debug_macro   0x0000000000000000      0x1c7 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .debug_macro   0x0000000000000000      0xa9c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .debug_macro   0x0000000000000000      0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
@@ -1341,7 +1246,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
@@ -1367,13 +1272,12 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .debug_macro   0x0000000000000000      0x8d1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .debug_macro   0x0000000000000000       0xb5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
- .debug_line    0x0000000000000000      0xa4a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
- .debug_str     0x0000000000000000    0x94f0b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
- .comment       0x0000000000000000       0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
+ .debug_line    0x0000000000000000      0xad2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
+ .debug_str     0x0000000000000000    0x94e5f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
+ .comment       0x0000000000000000       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .debug_frame   0x0000000000000000      0x20c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .ARM.attributes
                 0x0000000000000000       0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
- COMMON         0x0000000000000000       0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o
  .group         0x0000000000000000        0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .group         0x0000000000000000        0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .group         0x0000000000000000        0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
@@ -1447,11 +1351,12 @@ Discarded input sections
                 0x0000000000000000       0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .text.FLASH_PageErase
                 0x0000000000000000       0x40 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
- .debug_info    0x0000000000000000      0x8a2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
- .debug_abbrev  0x0000000000000000      0x249 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
+ .debug_info    0x0000000000000000      0x777 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
+ .debug_abbrev  0x0000000000000000      0x247 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .debug_aranges
                 0x0000000000000000       0x98 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
- .debug_ranges  0x0000000000000000       0x88 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
+ .debug_rnglists
+                0x0000000000000000       0x74 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .debug_macro   0x0000000000000000      0x1d9 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .debug_macro   0x0000000000000000      0xa9c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .debug_macro   0x0000000000000000      0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
@@ -1465,7 +1370,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
@@ -1491,9 +1396,9 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .debug_macro   0x0000000000000000      0x8d1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .debug_macro   0x0000000000000000       0xb5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
- .debug_line    0x0000000000000000      0xb3b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
- .debug_str     0x0000000000000000    0x950cf ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
- .comment       0x0000000000000000       0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
+ .debug_line    0x0000000000000000      0xbaf ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
+ .debug_str     0x0000000000000000    0x9500d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
+ .comment       0x0000000000000000       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .debug_frame   0x0000000000000000      0x258 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
  .ARM.attributes
                 0x0000000000000000       0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o
@@ -1560,7 +1465,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o
@@ -1633,11 +1538,12 @@ Discarded input sections
                 0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
  .text.HAL_GPIOEx_DisableEventout
                 0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
- .debug_info    0x0000000000000000      0x248 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
- .debug_abbrev  0x0000000000000000      0x112 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
+ .debug_info    0x0000000000000000      0x152 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
+ .debug_abbrev  0x0000000000000000       0xca ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
  .debug_aranges
                 0x0000000000000000       0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
- .debug_ranges  0x0000000000000000       0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
+ .debug_rnglists
+                0x0000000000000000       0x1f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
  .debug_macro   0x0000000000000000      0x1c7 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
  .debug_macro   0x0000000000000000      0xa9c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
  .debug_macro   0x0000000000000000      0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
@@ -1651,7 +1557,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
@@ -1677,9 +1583,9 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
  .debug_macro   0x0000000000000000      0x8d1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
  .debug_macro   0x0000000000000000       0xb5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
- .debug_line    0x0000000000000000      0x703 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
- .debug_str     0x0000000000000000    0x94c76 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
- .comment       0x0000000000000000       0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
+ .debug_line    0x0000000000000000      0x78b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
+ .debug_str     0x0000000000000000    0x94b87 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
+ .comment       0x0000000000000000       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
  .debug_frame   0x0000000000000000       0x78 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
  .ARM.attributes
                 0x0000000000000000       0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o
@@ -1767,7 +1673,7 @@ Discarded input sections
  .text.HAL_I2C_Master_Seq_Transmit_IT
                 0x0000000000000000      0x18c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .text.HAL_I2C_Master_Seq_Transmit_DMA
-                0x0000000000000000      0x2c4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
+                0x0000000000000000      0x2c8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .text.HAL_I2C_Master_Seq_Receive_IT
                 0x0000000000000000      0x1f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .text.HAL_I2C_Master_Seq_Receive_DMA
@@ -1787,9 +1693,9 @@ Discarded input sections
  .text.HAL_I2C_Master_Abort_IT
                 0x0000000000000000       0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .text.HAL_I2C_EV_IRQHandler
-                0x0000000000000000      0x2e2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
+                0x0000000000000000      0x2a6 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .text.HAL_I2C_ER_IRQHandler
-                0x0000000000000000      0x15e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
+                0x0000000000000000      0x14e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .text.HAL_I2C_MasterTxCpltCallback
                 0x0000000000000000       0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .text.HAL_I2C_MasterRxCpltCallback
@@ -1841,7 +1747,7 @@ Discarded input sections
  .text.I2C_SlaveReceive_BTF
                 0x0000000000000000       0x42 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .text.I2C_Slave_ADDR
-                0x0000000000000000       0x94 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
+                0x0000000000000000       0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .text.I2C_Slave_STOPF
                 0x0000000000000000      0x260 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .text.I2C_Slave_AF
@@ -1876,7 +1782,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
@@ -1979,11 +1885,12 @@ Discarded input sections
                 0x0000000000000000       0x24 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
  .text.HAL_PWR_PVDCallback
                 0x0000000000000000        0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
- .debug_info    0x0000000000000000      0x730 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
- .debug_abbrev  0x0000000000000000      0x213 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
+ .debug_info    0x0000000000000000      0x628 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
+ .debug_abbrev  0x0000000000000000      0x1f6 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
  .debug_aranges
                 0x0000000000000000       0xa8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
- .debug_ranges  0x0000000000000000       0x98 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
+ .debug_rnglists
+                0x0000000000000000       0x7a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
  .debug_macro   0x0000000000000000      0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
  .debug_macro   0x0000000000000000      0xa9c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
  .debug_macro   0x0000000000000000      0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
@@ -1997,7 +1904,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
@@ -2023,9 +1930,9 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
  .debug_macro   0x0000000000000000      0x8d1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
  .debug_macro   0x0000000000000000       0xb5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
- .debug_line    0x0000000000000000      0x8ef ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
- .debug_str     0x0000000000000000    0x95198 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
- .comment       0x0000000000000000       0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
+ .debug_line    0x0000000000000000      0x977 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
+ .debug_str     0x0000000000000000    0x950bb ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
+ .comment       0x0000000000000000       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
  .debug_frame   0x0000000000000000      0x270 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
  .ARM.attributes
                 0x0000000000000000       0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o
@@ -2100,7 +2007,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
@@ -2173,12 +2080,13 @@ Discarded input sections
                 0x0000000000000000       0x84 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .rodata        0x0000000000000000       0x10 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .text.HAL_RCCEx_GetPeriphCLKFreq
-                0x0000000000000000      0x1cc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
- .debug_info    0x0000000000000000      0x49c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
- .debug_abbrev  0x0000000000000000      0x193 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
+                0x0000000000000000      0x1c8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
+ .debug_info    0x0000000000000000      0x3e3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
+ .debug_abbrev  0x0000000000000000      0x188 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .debug_aranges
                 0x0000000000000000       0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
- .debug_ranges  0x0000000000000000       0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
+ .debug_rnglists
+                0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .debug_macro   0x0000000000000000      0x1c7 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .debug_macro   0x0000000000000000      0xa9c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .debug_macro   0x0000000000000000      0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
@@ -2192,7 +2100,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
@@ -2218,9 +2126,9 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .debug_macro   0x0000000000000000      0x8d1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .debug_macro   0x0000000000000000       0xb5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
- .debug_line    0x0000000000000000      0x8cb ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
- .debug_str     0x0000000000000000    0x94de5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
- .comment       0x0000000000000000       0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
+ .debug_line    0x0000000000000000      0x951 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
+ .debug_str     0x0000000000000000    0x94d41 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
+ .comment       0x0000000000000000       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .debug_frame   0x0000000000000000       0x84 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
  .ARM.attributes
                 0x0000000000000000       0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o
@@ -2300,7 +2208,7 @@ Discarded input sections
  .text.HAL_SPI_DMAStop
                 0x0000000000000000       0x7e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o
  .text.HAL_SPI_IRQHandler
-                0x0000000000000000      0x1cc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o
+                0x0000000000000000      0x1bc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o
  .text.HAL_SPI_TxCpltCallback
                 0x0000000000000000       0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o
  .text.HAL_SPI_RxCpltCallback
@@ -2385,7 +2293,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o
@@ -2502,7 +2410,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.o
@@ -2775,7 +2683,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o
@@ -2932,7 +2840,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o
@@ -3041,7 +2949,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.o
  .debug_macro   0x0000000000000000       0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.o
  .debug_macro   0x0000000000000000       0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.o
- .debug_macro   0x0000000000000000       0xc3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.o
+ .debug_macro   0x0000000000000000       0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.o
  .debug_macro   0x0000000000000000      0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.o
  .debug_macro   0x0000000000000000     0xfd8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.o
  .debug_macro   0x0000000000000000       0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.o
@@ -3126,14 +3034,6 @@ Discarded input sections
  .group         0x0000000000000000        0xc ./HW_Devices/LCD.o
  .group         0x0000000000000000        0xc ./HW_Devices/LCD.o
  .group         0x0000000000000000        0xc ./HW_Devices/LCD.o
- .group         0x0000000000000000        0xc ./HW_Devices/LCD.o
- .group         0x0000000000000000        0xc ./HW_Devices/LCD.o
- .group         0x0000000000000000        0xc ./HW_Devices/LCD.o
- .group         0x0000000000000000        0xc ./HW_Devices/LCD.o
- .group         0x0000000000000000        0xc ./HW_Devices/LCD.o
- .group         0x0000000000000000        0xc ./HW_Devices/LCD.o
- .group         0x0000000000000000        0xc ./HW_Devices/LCD.o
- .group         0x0000000000000000        0xc ./HW_Devices/LCD.o
  .text          0x0000000000000000        0x0 ./HW_Devices/LCD.o
  .data          0x0000000000000000        0x0 ./HW_Devices/LCD.o
  .bss           0x0000000000000000        0x0 ./HW_Devices/LCD.o
@@ -3165,7 +3065,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0x1c ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0x22 ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000       0xc3 ./HW_Devices/LCD.o
+ .debug_macro   0x0000000000000000       0xbd ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000      0xd23 ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000     0xfd8c ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0x6d ./HW_Devices/LCD.o
@@ -3191,33 +3091,25 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000      0x8d1 ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0xb5 ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000       0x52 ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000       0x18 ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000       0x3c ./HW_Devices/LCD.o
+ .debug_macro   0x0000000000000000       0x61 ./HW_Devices/LCD.o
+ .debug_macro   0x0000000000000000       0x24 ./HW_Devices/LCD.o
+ .debug_macro   0x0000000000000000       0x43 ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0x34 ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0x35 ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000      0x333 ./HW_Devices/LCD.o
+ .debug_macro   0x0000000000000000      0x369 ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0x10 ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0x43 ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0x34 ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0x10 ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0x58 ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000       0x71 ./HW_Devices/LCD.o
+ .debug_macro   0x0000000000000000       0x8e ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0x1c ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000      0x12a ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000       0x10 ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000       0x1c ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000       0x52 ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000       0x22 ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000       0x10 ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000       0x40 ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000       0xd5 ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000       0x1c ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000       0x3d ./HW_Devices/LCD.o
+ .debug_macro   0x0000000000000000      0x177 ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/LCD.o
- .debug_macro   0x0000000000000000      0x145 ./HW_Devices/LCD.o
+ .debug_macro   0x0000000000000000       0x16 ./HW_Devices/LCD.o
+ .debug_macro   0x0000000000000000      0x147 ./HW_Devices/LCD.o
  .debug_macro   0x0000000000000000       0xac ./HW_Devices/LCD.o
  .group         0x0000000000000000        0xc ./HW_Devices/buzzer.o
  .group         0x0000000000000000        0xc ./HW_Devices/buzzer.o
@@ -3277,14 +3169,6 @@ Discarded input sections
  .group         0x0000000000000000        0xc ./HW_Devices/buzzer.o
  .group         0x0000000000000000        0xc ./HW_Devices/buzzer.o
  .group         0x0000000000000000        0xc ./HW_Devices/buzzer.o
- .group         0x0000000000000000        0xc ./HW_Devices/buzzer.o
- .group         0x0000000000000000        0xc ./HW_Devices/buzzer.o
- .group         0x0000000000000000        0xc ./HW_Devices/buzzer.o
- .group         0x0000000000000000        0xc ./HW_Devices/buzzer.o
- .group         0x0000000000000000        0xc ./HW_Devices/buzzer.o
- .group         0x0000000000000000        0xc ./HW_Devices/buzzer.o
- .group         0x0000000000000000        0xc ./HW_Devices/buzzer.o
- .group         0x0000000000000000        0xc ./HW_Devices/buzzer.o
  .text          0x0000000000000000        0x0 ./HW_Devices/buzzer.o
  .data          0x0000000000000000        0x0 ./HW_Devices/buzzer.o
  .bss           0x0000000000000000        0x0 ./HW_Devices/buzzer.o
@@ -3300,7 +3184,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0x1c ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0x22 ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000       0xc3 ./HW_Devices/buzzer.o
+ .debug_macro   0x0000000000000000       0xbd ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000      0xd23 ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000     0xfd8c ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0x6d ./HW_Devices/buzzer.o
@@ -3326,33 +3210,25 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000      0x8d1 ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0xb5 ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000       0x52 ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000       0x18 ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000       0x3c ./HW_Devices/buzzer.o
+ .debug_macro   0x0000000000000000       0x61 ./HW_Devices/buzzer.o
+ .debug_macro   0x0000000000000000       0x24 ./HW_Devices/buzzer.o
+ .debug_macro   0x0000000000000000       0x43 ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0x34 ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0x35 ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000      0x333 ./HW_Devices/buzzer.o
+ .debug_macro   0x0000000000000000      0x369 ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0x10 ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0x43 ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0x34 ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0x10 ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0x58 ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000       0x71 ./HW_Devices/buzzer.o
+ .debug_macro   0x0000000000000000       0x8e ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0x1c ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000      0x12a ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000       0x10 ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000       0x1c ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000       0x52 ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000       0x22 ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000       0x10 ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000       0x40 ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000       0xd5 ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000       0x1c ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000       0x3d ./HW_Devices/buzzer.o
+ .debug_macro   0x0000000000000000      0x177 ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/buzzer.o
- .debug_macro   0x0000000000000000      0x145 ./HW_Devices/buzzer.o
+ .debug_macro   0x0000000000000000       0x16 ./HW_Devices/buzzer.o
+ .debug_macro   0x0000000000000000      0x147 ./HW_Devices/buzzer.o
  .debug_macro   0x0000000000000000       0xac ./HW_Devices/buzzer.o
  .group         0x0000000000000000        0xc ./HW_Devices/eeprom.o
  .group         0x0000000000000000        0xc ./HW_Devices/eeprom.o
@@ -3412,14 +3288,6 @@ Discarded input sections
  .group         0x0000000000000000        0xc ./HW_Devices/eeprom.o
  .group         0x0000000000000000        0xc ./HW_Devices/eeprom.o
  .group         0x0000000000000000        0xc ./HW_Devices/eeprom.o
- .group         0x0000000000000000        0xc ./HW_Devices/eeprom.o
- .group         0x0000000000000000        0xc ./HW_Devices/eeprom.o
- .group         0x0000000000000000        0xc ./HW_Devices/eeprom.o
- .group         0x0000000000000000        0xc ./HW_Devices/eeprom.o
- .group         0x0000000000000000        0xc ./HW_Devices/eeprom.o
- .group         0x0000000000000000        0xc ./HW_Devices/eeprom.o
- .group         0x0000000000000000        0xc ./HW_Devices/eeprom.o
- .group         0x0000000000000000        0xc ./HW_Devices/eeprom.o
  .text          0x0000000000000000        0x0 ./HW_Devices/eeprom.o
  .data          0x0000000000000000        0x0 ./HW_Devices/eeprom.o
  .bss           0x0000000000000000        0x0 ./HW_Devices/eeprom.o
@@ -3435,7 +3303,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0x1c ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0x22 ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000       0xc3 ./HW_Devices/eeprom.o
+ .debug_macro   0x0000000000000000       0xbd ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000      0xd23 ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000     0xfd8c ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0x6d ./HW_Devices/eeprom.o
@@ -3461,33 +3329,25 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000      0x8d1 ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0xb5 ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000       0x52 ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000       0x18 ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000       0x3c ./HW_Devices/eeprom.o
+ .debug_macro   0x0000000000000000       0x61 ./HW_Devices/eeprom.o
+ .debug_macro   0x0000000000000000       0x24 ./HW_Devices/eeprom.o
+ .debug_macro   0x0000000000000000       0x43 ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0x34 ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0x35 ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000      0x333 ./HW_Devices/eeprom.o
+ .debug_macro   0x0000000000000000      0x369 ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0x10 ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0x43 ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0x34 ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0x10 ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0x58 ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000       0x71 ./HW_Devices/eeprom.o
+ .debug_macro   0x0000000000000000       0x8e ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0x1c ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000      0x12a ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000       0x10 ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000       0x1c ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000       0x52 ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000       0x22 ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000       0x10 ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000       0x40 ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000       0xd5 ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000       0x1c ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000       0x3d ./HW_Devices/eeprom.o
+ .debug_macro   0x0000000000000000      0x177 ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/eeprom.o
- .debug_macro   0x0000000000000000      0x145 ./HW_Devices/eeprom.o
+ .debug_macro   0x0000000000000000       0x16 ./HW_Devices/eeprom.o
+ .debug_macro   0x0000000000000000      0x147 ./HW_Devices/eeprom.o
  .debug_macro   0x0000000000000000       0xac ./HW_Devices/eeprom.o
  .group         0x0000000000000000        0xc ./HW_Devices/iic.o
  .group         0x0000000000000000        0xc ./HW_Devices/iic.o
@@ -3547,14 +3407,6 @@ Discarded input sections
  .group         0x0000000000000000        0xc ./HW_Devices/iic.o
  .group         0x0000000000000000        0xc ./HW_Devices/iic.o
  .group         0x0000000000000000        0xc ./HW_Devices/iic.o
- .group         0x0000000000000000        0xc ./HW_Devices/iic.o
- .group         0x0000000000000000        0xc ./HW_Devices/iic.o
- .group         0x0000000000000000        0xc ./HW_Devices/iic.o
- .group         0x0000000000000000        0xc ./HW_Devices/iic.o
- .group         0x0000000000000000        0xc ./HW_Devices/iic.o
- .group         0x0000000000000000        0xc ./HW_Devices/iic.o
- .group         0x0000000000000000        0xc ./HW_Devices/iic.o
- .group         0x0000000000000000        0xc ./HW_Devices/iic.o
  .text          0x0000000000000000        0x0 ./HW_Devices/iic.o
  .data          0x0000000000000000        0x0 ./HW_Devices/iic.o
  .bss           0x0000000000000000        0x0 ./HW_Devices/iic.o
@@ -3570,7 +3422,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0x1c ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0x22 ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000       0xc3 ./HW_Devices/iic.o
+ .debug_macro   0x0000000000000000       0xbd ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000      0xd23 ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000     0xfd8c ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0x6d ./HW_Devices/iic.o
@@ -3596,33 +3448,25 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000      0x8d1 ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0xb5 ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000       0x52 ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000       0x18 ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000       0x3c ./HW_Devices/iic.o
+ .debug_macro   0x0000000000000000       0x61 ./HW_Devices/iic.o
+ .debug_macro   0x0000000000000000       0x24 ./HW_Devices/iic.o
+ .debug_macro   0x0000000000000000       0x43 ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0x34 ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0x35 ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000      0x333 ./HW_Devices/iic.o
+ .debug_macro   0x0000000000000000      0x369 ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0x10 ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0x43 ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0x34 ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0x10 ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0x58 ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000       0x71 ./HW_Devices/iic.o
+ .debug_macro   0x0000000000000000       0x8e ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0x1c ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000      0x12a ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000       0x10 ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000       0x1c ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000       0x52 ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000       0x22 ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000       0x10 ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000       0x40 ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000       0xd5 ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000       0x1c ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000       0x3d ./HW_Devices/iic.o
+ .debug_macro   0x0000000000000000      0x177 ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/iic.o
- .debug_macro   0x0000000000000000      0x145 ./HW_Devices/iic.o
+ .debug_macro   0x0000000000000000       0x16 ./HW_Devices/iic.o
+ .debug_macro   0x0000000000000000      0x147 ./HW_Devices/iic.o
  .debug_macro   0x0000000000000000       0xac ./HW_Devices/iic.o
  .group         0x0000000000000000        0xc ./HW_Devices/key.o
  .group         0x0000000000000000        0xc ./HW_Devices/key.o
@@ -3683,14 +3527,6 @@ Discarded input sections
  .group         0x0000000000000000        0xc ./HW_Devices/key.o
  .group         0x0000000000000000        0xc ./HW_Devices/key.o
  .group         0x0000000000000000        0xc ./HW_Devices/key.o
- .group         0x0000000000000000        0xc ./HW_Devices/key.o
- .group         0x0000000000000000        0xc ./HW_Devices/key.o
- .group         0x0000000000000000        0xc ./HW_Devices/key.o
- .group         0x0000000000000000        0xc ./HW_Devices/key.o
- .group         0x0000000000000000        0xc ./HW_Devices/key.o
- .group         0x0000000000000000        0xc ./HW_Devices/key.o
- .group         0x0000000000000000        0xc ./HW_Devices/key.o
- .group         0x0000000000000000        0xc ./HW_Devices/key.o
  .text          0x0000000000000000        0x0 ./HW_Devices/key.o
  .data          0x0000000000000000        0x0 ./HW_Devices/key.o
  .bss           0x0000000000000000        0x0 ./HW_Devices/key.o
@@ -3706,7 +3542,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0x1c ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0x22 ./HW_Devices/key.o
- .debug_macro   0x0000000000000000       0xc3 ./HW_Devices/key.o
+ .debug_macro   0x0000000000000000       0xbd ./HW_Devices/key.o
  .debug_macro   0x0000000000000000      0xd23 ./HW_Devices/key.o
  .debug_macro   0x0000000000000000     0xfd8c ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0x6d ./HW_Devices/key.o
@@ -3732,33 +3568,25 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./HW_Devices/key.o
  .debug_macro   0x0000000000000000      0x8d1 ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0xb5 ./HW_Devices/key.o
- .debug_macro   0x0000000000000000       0x52 ./HW_Devices/key.o
- .debug_macro   0x0000000000000000       0x18 ./HW_Devices/key.o
- .debug_macro   0x0000000000000000       0x3c ./HW_Devices/key.o
+ .debug_macro   0x0000000000000000       0x61 ./HW_Devices/key.o
+ .debug_macro   0x0000000000000000       0x24 ./HW_Devices/key.o
+ .debug_macro   0x0000000000000000       0x43 ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0x34 ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0x35 ./HW_Devices/key.o
- .debug_macro   0x0000000000000000      0x333 ./HW_Devices/key.o
+ .debug_macro   0x0000000000000000      0x369 ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0x10 ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0x43 ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0x34 ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0x10 ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0x58 ./HW_Devices/key.o
- .debug_macro   0x0000000000000000       0x71 ./HW_Devices/key.o
+ .debug_macro   0x0000000000000000       0x8e ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0x1c ./HW_Devices/key.o
- .debug_macro   0x0000000000000000      0x12a ./HW_Devices/key.o
- .debug_macro   0x0000000000000000       0x10 ./HW_Devices/key.o
- .debug_macro   0x0000000000000000       0x1c ./HW_Devices/key.o
- .debug_macro   0x0000000000000000       0x52 ./HW_Devices/key.o
- .debug_macro   0x0000000000000000       0x22 ./HW_Devices/key.o
- .debug_macro   0x0000000000000000       0x10 ./HW_Devices/key.o
- .debug_macro   0x0000000000000000       0x40 ./HW_Devices/key.o
- .debug_macro   0x0000000000000000       0xd5 ./HW_Devices/key.o
- .debug_macro   0x0000000000000000       0x1c ./HW_Devices/key.o
- .debug_macro   0x0000000000000000       0x3d ./HW_Devices/key.o
+ .debug_macro   0x0000000000000000      0x177 ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/key.o
- .debug_macro   0x0000000000000000      0x145 ./HW_Devices/key.o
+ .debug_macro   0x0000000000000000       0x16 ./HW_Devices/key.o
+ .debug_macro   0x0000000000000000      0x147 ./HW_Devices/key.o
  .debug_macro   0x0000000000000000       0xac ./HW_Devices/key.o
  .group         0x0000000000000000        0xc ./HW_Devices/rs522.o
  .group         0x0000000000000000        0xc ./HW_Devices/rs522.o
@@ -3819,14 +3647,6 @@ Discarded input sections
  .group         0x0000000000000000        0xc ./HW_Devices/rs522.o
  .group         0x0000000000000000        0xc ./HW_Devices/rs522.o
  .group         0x0000000000000000        0xc ./HW_Devices/rs522.o
- .group         0x0000000000000000        0xc ./HW_Devices/rs522.o
- .group         0x0000000000000000        0xc ./HW_Devices/rs522.o
- .group         0x0000000000000000        0xc ./HW_Devices/rs522.o
- .group         0x0000000000000000        0xc ./HW_Devices/rs522.o
- .group         0x0000000000000000        0xc ./HW_Devices/rs522.o
- .group         0x0000000000000000        0xc ./HW_Devices/rs522.o
- .group         0x0000000000000000        0xc ./HW_Devices/rs522.o
- .group         0x0000000000000000        0xc ./HW_Devices/rs522.o
  .text          0x0000000000000000        0x0 ./HW_Devices/rs522.o
  .data          0x0000000000000000        0x0 ./HW_Devices/rs522.o
  .bss           0x0000000000000000        0x0 ./HW_Devices/rs522.o
@@ -3851,26 +3671,27 @@ Discarded input sections
  .text.PcdRequest
                 0x0000000000000000       0x6e ./HW_Devices/rs522.o
  .text.PcdAnticoll
-                0x0000000000000000       0xce ./HW_Devices/rs522.o
+                0x0000000000000000       0xc8 ./HW_Devices/rs522.o
  .text.CalulateCRC
                 0x0000000000000000       0x9a ./HW_Devices/rs522.o
  .text.PcdSelect
-                0x0000000000000000       0xa2 ./HW_Devices/rs522.o
+                0x0000000000000000       0xa0 ./HW_Devices/rs522.o
  .text.PcdAuthState
-                0x0000000000000000       0xca ./HW_Devices/rs522.o
+                0x0000000000000000       0xc6 ./HW_Devices/rs522.o
  .text.PcdWrite
-                0x0000000000000000       0xdc ./HW_Devices/rs522.o
- .text.PcdRead  0x0000000000000000       0x84 ./HW_Devices/rs522.o
+                0x0000000000000000       0xda ./HW_Devices/rs522.o
+ .text.PcdRead  0x0000000000000000       0x82 ./HW_Devices/rs522.o
  .text.PcdHalt  0x0000000000000000       0x38 ./HW_Devices/rs522.o
  .text.IC_CMT   0x0000000000000000       0x60 ./HW_Devices/rs522.o
  .text.RC522_Init
                 0x0000000000000000       0x12 ./HW_Devices/rs522.o
- .debug_info    0x0000000000000000     0x15e0 ./HW_Devices/rs522.o
- .debug_abbrev  0x0000000000000000      0x2e7 ./HW_Devices/rs522.o
+ .debug_info    0x0000000000000000      0xc8a ./HW_Devices/rs522.o
+ .debug_abbrev  0x0000000000000000      0x2bb ./HW_Devices/rs522.o
  .debug_aranges
                 0x0000000000000000       0xb0 ./HW_Devices/rs522.o
- .debug_ranges  0x0000000000000000       0xa0 ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000      0x344 ./HW_Devices/rs522.o
+ .debug_rnglists
+                0x0000000000000000       0x86 ./HW_Devices/rs522.o
+ .debug_macro   0x0000000000000000      0x2bd ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000      0xa9c ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000      0x227 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x2e ./HW_Devices/rs522.o
@@ -3883,7 +3704,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x1c ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x22 ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000       0xc3 ./HW_Devices/rs522.o
+ .debug_macro   0x0000000000000000       0xbd ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000      0xd23 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000     0xfd8c ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x6d ./HW_Devices/rs522.o
@@ -3909,38 +3730,30 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000      0x8d1 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0xb5 ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000       0x52 ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000       0x18 ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000       0x3c ./HW_Devices/rs522.o
+ .debug_macro   0x0000000000000000       0x61 ./HW_Devices/rs522.o
+ .debug_macro   0x0000000000000000       0x24 ./HW_Devices/rs522.o
+ .debug_macro   0x0000000000000000       0x43 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x34 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x35 ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000      0x333 ./HW_Devices/rs522.o
+ .debug_macro   0x0000000000000000      0x369 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x10 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x43 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x34 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x10 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x58 ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000       0x71 ./HW_Devices/rs522.o
+ .debug_macro   0x0000000000000000       0x8e ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x1c ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000      0x12a ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000       0x10 ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000       0x1c ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000       0x52 ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000       0x22 ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000       0x10 ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000       0x40 ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000       0xd5 ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000       0x1c ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000       0x3d ./HW_Devices/rs522.o
+ .debug_macro   0x0000000000000000      0x177 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/rs522.o
- .debug_macro   0x0000000000000000      0x145 ./HW_Devices/rs522.o
+ .debug_macro   0x0000000000000000       0x16 ./HW_Devices/rs522.o
+ .debug_macro   0x0000000000000000      0x147 ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000       0xac ./HW_Devices/rs522.o
  .debug_macro   0x0000000000000000      0x244 ./HW_Devices/rs522.o
- .debug_line    0x0000000000000000      0xe8e ./HW_Devices/rs522.o
- .debug_str     0x0000000000000000    0x99a76 ./HW_Devices/rs522.o
- .comment       0x0000000000000000       0x54 ./HW_Devices/rs522.o
+ .debug_line    0x0000000000000000      0xe80 ./HW_Devices/rs522.o
+ .debug_str     0x0000000000000000    0x99092 ./HW_Devices/rs522.o
+ .comment       0x0000000000000000       0x44 ./HW_Devices/rs522.o
  .debug_frame   0x0000000000000000      0x2bc ./HW_Devices/rs522.o
  .ARM.attributes
                 0x0000000000000000       0x2d ./HW_Devices/rs522.o
@@ -4005,14 +3818,6 @@ Discarded input sections
  .group         0x0000000000000000        0xc ./HW_Devices/touch.o
  .group         0x0000000000000000        0xc ./HW_Devices/touch.o
  .group         0x0000000000000000        0xc ./HW_Devices/touch.o
- .group         0x0000000000000000        0xc ./HW_Devices/touch.o
- .group         0x0000000000000000        0xc ./HW_Devices/touch.o
- .group         0x0000000000000000        0xc ./HW_Devices/touch.o
- .group         0x0000000000000000        0xc ./HW_Devices/touch.o
- .group         0x0000000000000000        0xc ./HW_Devices/touch.o
- .group         0x0000000000000000        0xc ./HW_Devices/touch.o
- .group         0x0000000000000000        0xc ./HW_Devices/touch.o
- .group         0x0000000000000000        0xc ./HW_Devices/touch.o
  .text          0x0000000000000000        0x0 ./HW_Devices/touch.o
  .data          0x0000000000000000        0x0 ./HW_Devices/touch.o
  .bss           0x0000000000000000        0x0 ./HW_Devices/touch.o
@@ -4029,7 +3834,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0x1c ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0x22 ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000       0xc3 ./HW_Devices/touch.o
+ .debug_macro   0x0000000000000000       0xbd ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000      0xd23 ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000     0xfd8c ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0x6d ./HW_Devices/touch.o
@@ -4055,33 +3860,25 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000      0x8d1 ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0xb5 ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000       0x52 ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000       0x18 ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000       0x3c ./HW_Devices/touch.o
+ .debug_macro   0x0000000000000000       0x61 ./HW_Devices/touch.o
+ .debug_macro   0x0000000000000000       0x24 ./HW_Devices/touch.o
+ .debug_macro   0x0000000000000000       0x43 ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0x34 ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0x35 ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000      0x333 ./HW_Devices/touch.o
+ .debug_macro   0x0000000000000000      0x369 ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0x10 ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0x43 ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0x34 ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0x10 ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0x58 ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000       0x71 ./HW_Devices/touch.o
+ .debug_macro   0x0000000000000000       0x8e ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0x1c ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000      0x12a ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000       0x10 ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000       0x1c ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000       0x52 ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000       0x22 ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000       0x10 ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000       0x40 ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000       0xd5 ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000       0x1c ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000       0x3d ./HW_Devices/touch.o
+ .debug_macro   0x0000000000000000      0x177 ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0x16 ./HW_Devices/touch.o
- .debug_macro   0x0000000000000000      0x145 ./HW_Devices/touch.o
+ .debug_macro   0x0000000000000000       0x16 ./HW_Devices/touch.o
+ .debug_macro   0x0000000000000000      0x147 ./HW_Devices/touch.o
  .debug_macro   0x0000000000000000       0xac ./HW_Devices/touch.o
  .group         0x0000000000000000        0xc ./SW_APPs/APP_IDcard.o
  .group         0x0000000000000000        0xc ./SW_APPs/APP_IDcard.o
@@ -4143,33 +3940,40 @@ Discarded input sections
  .group         0x0000000000000000        0xc ./SW_APPs/APP_IDcard.o
  .group         0x0000000000000000        0xc ./SW_APPs/APP_IDcard.o
  .group         0x0000000000000000        0xc ./SW_APPs/APP_IDcard.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_IDcard.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_IDcard.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_IDcard.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_IDcard.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_IDcard.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_IDcard.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_IDcard.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_IDcard.o
  .text          0x0000000000000000        0x0 ./SW_APPs/APP_IDcard.o
  .data          0x0000000000000000        0x0 ./SW_APPs/APP_IDcard.o
  .bss           0x0000000000000000        0x0 ./SW_APPs/APP_IDcard.o
+ .bss.idcard_window
+                0x0000000000000000        0x4 ./SW_APPs/APP_IDcard.o
+ .bss.idcard_str
+                0x0000000000000000       0x20 ./SW_APPs/APP_IDcard.o
  .text.APP_IDcard_init
                 0x0000000000000000       0x20 ./SW_APPs/APP_IDcard.o
+ .bss.CT        0x0000000000000000        0x2 ./SW_APPs/APP_IDcard.o
+ .bss.SN        0x0000000000000000        0x4 ./SW_APPs/APP_IDcard.o
+ .bss.RFID      0x0000000000000000       0x10 ./SW_APPs/APP_IDcard.o
+ .bss.status    0x0000000000000000        0x1 ./SW_APPs/APP_IDcard.o
  .data.s        0x0000000000000000        0x1 ./SW_APPs/APP_IDcard.o
  .bss.KEYA      0x0000000000000000        0x6 ./SW_APPs/APP_IDcard.o
  .data.KEYB     0x0000000000000000        0x6 ./SW_APPs/APP_IDcard.o
  .bss.card_number_D
                 0x0000000000000000        0x4 ./SW_APPs/APP_IDcard.o
+ .bss.fundcard  0x0000000000000000        0x1 ./SW_APPs/APP_IDcard.o
+ .bss.PA        0x0000000000000000        0x1 ./SW_APPs/APP_IDcard.o
+ .bss.sele      0x0000000000000000        0x1 ./SW_APPs/APP_IDcard.o
+ .bss.checkkey  0x0000000000000000        0x1 ./SW_APPs/APP_IDcard.o
+ .bss.read_flag
+                0x0000000000000000        0x1 ./SW_APPs/APP_IDcard.o
  .rodata        0x0000000000000000       0x82 ./SW_APPs/APP_IDcard.o
  .text.APP_IDcard_loop
                 0x0000000000000000      0x210 ./SW_APPs/APP_IDcard.o
- .debug_info    0x0000000000000000      0xcf8 ./SW_APPs/APP_IDcard.o
- .debug_abbrev  0x0000000000000000      0x23c ./SW_APPs/APP_IDcard.o
+ .debug_info    0x0000000000000000      0x3f2 ./SW_APPs/APP_IDcard.o
+ .debug_abbrev  0x0000000000000000      0x17c ./SW_APPs/APP_IDcard.o
  .debug_aranges
                 0x0000000000000000       0x28 ./SW_APPs/APP_IDcard.o
- .debug_ranges  0x0000000000000000       0x18 ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000      0x35b ./SW_APPs/APP_IDcard.o
+ .debug_rnglists
+                0x0000000000000000       0x1a ./SW_APPs/APP_IDcard.o
+ .debug_macro   0x0000000000000000      0x2d4 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000      0xa9c ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000      0x227 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x2e ./SW_APPs/APP_IDcard.o
@@ -4182,7 +3986,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x1c ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x22 ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000       0xc3 ./SW_APPs/APP_IDcard.o
+ .debug_macro   0x0000000000000000       0xbd ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000      0xd23 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000     0xfd8c ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x6d ./SW_APPs/APP_IDcard.o
@@ -4208,51 +4012,34 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000      0x8d1 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0xb5 ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000       0x52 ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000       0x18 ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000       0x3c ./SW_APPs/APP_IDcard.o
+ .debug_macro   0x0000000000000000       0x61 ./SW_APPs/APP_IDcard.o
+ .debug_macro   0x0000000000000000       0x24 ./SW_APPs/APP_IDcard.o
+ .debug_macro   0x0000000000000000       0x43 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x34 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x16 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x35 ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000      0x333 ./SW_APPs/APP_IDcard.o
+ .debug_macro   0x0000000000000000      0x369 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x10 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x16 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x43 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x34 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x10 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x58 ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000       0x71 ./SW_APPs/APP_IDcard.o
+ .debug_macro   0x0000000000000000       0x8e ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x1c ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000      0x12a ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000       0x10 ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000       0x1c ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000       0x52 ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000       0x22 ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000       0x10 ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000       0x40 ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000       0xd5 ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000       0x1c ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000       0x3d ./SW_APPs/APP_IDcard.o
+ .debug_macro   0x0000000000000000      0x177 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0x16 ./SW_APPs/APP_IDcard.o
- .debug_macro   0x0000000000000000      0x145 ./SW_APPs/APP_IDcard.o
+ .debug_macro   0x0000000000000000       0x16 ./SW_APPs/APP_IDcard.o
+ .debug_macro   0x0000000000000000      0x147 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000       0xac ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000      0x391 ./SW_APPs/APP_IDcard.o
  .debug_macro   0x0000000000000000      0x24a ./SW_APPs/APP_IDcard.o
- .debug_line    0x0000000000000000      0xa00 ./SW_APPs/APP_IDcard.o
- .debug_str     0x0000000000000000    0x99bf1 ./SW_APPs/APP_IDcard.o
- .comment       0x0000000000000000       0x54 ./SW_APPs/APP_IDcard.o
+ .debug_line    0x0000000000000000      0x9f4 ./SW_APPs/APP_IDcard.o
+ .debug_str     0x0000000000000000    0x99194 ./SW_APPs/APP_IDcard.o
+ .comment       0x0000000000000000       0x44 ./SW_APPs/APP_IDcard.o
  .debug_frame   0x0000000000000000       0x5c ./SW_APPs/APP_IDcard.o
  .ARM.attributes
                 0x0000000000000000       0x2d ./SW_APPs/APP_IDcard.o
- COMMON         0x0000000000000000       0x4b ./SW_APPs/APP_IDcard.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_blood.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_blood.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_blood.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_blood.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_blood.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_blood.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_blood.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_blood.o
  .group         0x0000000000000000        0xc ./SW_APPs/APP_blood.o
  .group         0x0000000000000000        0xc ./SW_APPs/APP_blood.o
  .group         0x0000000000000000        0xc ./SW_APPs/APP_blood.o
@@ -4317,12 +4104,18 @@ Discarded input sections
  .text          0x0000000000000000        0x0 ./SW_APPs/APP_blood.o
  .data          0x0000000000000000        0x0 ./SW_APPs/APP_blood.o
  .bss           0x0000000000000000        0x0 ./SW_APPs/APP_blood.o
+ .bss.blood_win
+                0x0000000000000000        0x4 ./SW_APPs/APP_blood.o
+ .bss.blood_str
+                0x0000000000000000       0x40 ./SW_APPs/APP_blood.o
  .text.Max30102_reset
                 0x0000000000000000       0x20 ./SW_APPs/APP_blood.o
  .text.MAX30102_Config
                 0x0000000000000000       0xae ./SW_APPs/APP_blood.o
  .text.APP_blood_init
                 0x0000000000000000       0x40 ./SW_APPs/APP_blood.o
+ .bss.g_BloodWave
+                0x0000000000000000        0x8 ./SW_APPs/APP_blood.o
  .rodata.XSinTbl
                 0x0000000000000000      0x328 ./SW_APPs/APP_blood.o
  .bss.g_blooddata
@@ -4330,7 +4123,7 @@ Discarded input sections
  .text.my_floor
                 0x0000000000000000       0x6e ./SW_APPs/APP_blood.o
  .text.my_fmod  0x0000000000000000       0xd4 ./SW_APPs/APP_blood.o
- .text.XSin     0x0000000000000000      0x2b4 ./SW_APPs/APP_blood.o
+ .text.XSin     0x0000000000000000      0x2bc ./SW_APPs/APP_blood.o
  .text.XCos     0x0000000000000000       0x40 ./SW_APPs/APP_blood.o
  .text.qsqrt    0x0000000000000000       0x68 ./SW_APPs/APP_blood.o
  .text.EE       0x0000000000000000       0x84 ./SW_APPs/APP_blood.o
@@ -4346,10 +4139,10 @@ Discarded input sections
                 0x0000000000000000      0x184 ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000      0xa9c ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x22 ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000       0x4c ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000       0x18 ./SW_APPs/APP_blood.o
+ .debug_macro   0x0000000000000000       0x5b ./SW_APPs/APP_blood.o
+ .debug_macro   0x0000000000000000       0x24 ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x94 ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000       0x3c ./SW_APPs/APP_blood.o
+ .debug_macro   0x0000000000000000       0x43 ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x34 ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000      0x174 ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x16 ./SW_APPs/APP_blood.o
@@ -4358,10 +4151,10 @@ Discarded input sections
  .debug_macro   0x0000000000000000       0x34 ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x10 ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x58 ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000       0x71 ./SW_APPs/APP_blood.o
+ .debug_macro   0x0000000000000000       0x8e ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x1c ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000      0x12a ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000      0x339 ./SW_APPs/APP_blood.o
+ .debug_macro   0x0000000000000000      0x177 ./SW_APPs/APP_blood.o
+ .debug_macro   0x0000000000000000      0x369 ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000      0x227 ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x2e ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x22 ./SW_APPs/APP_blood.o
@@ -4370,6 +4163,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x1c ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x22 ./SW_APPs/APP_blood.o
+ .debug_macro   0x0000000000000000       0xbd ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000      0xd23 ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000     0xfd8c ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x6d ./SW_APPs/APP_blood.o
@@ -4396,17 +4190,8 @@ Discarded input sections
  .debug_macro   0x0000000000000000       0x1c ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x35 ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x10 ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000       0x10 ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000       0x1c ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000       0x52 ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000       0x22 ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000       0x10 ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000       0x40 ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000       0xd5 ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000       0x1c ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000       0x3d ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0x16 ./SW_APPs/APP_blood.o
- .debug_macro   0x0000000000000000      0x145 ./SW_APPs/APP_blood.o
+ .debug_macro   0x0000000000000000      0x147 ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000       0xac ./SW_APPs/APP_blood.o
  .debug_macro   0x0000000000000000      0x391 ./SW_APPs/APP_blood.o
  .group         0x0000000000000000        0xc ./SW_APPs/APP_morsecode.o
@@ -4469,14 +4254,6 @@ Discarded input sections
  .group         0x0000000000000000        0xc ./SW_APPs/APP_morsecode.o
  .group         0x0000000000000000        0xc ./SW_APPs/APP_morsecode.o
  .group         0x0000000000000000        0xc ./SW_APPs/APP_morsecode.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_morsecode.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_morsecode.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_morsecode.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_morsecode.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_morsecode.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_morsecode.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_morsecode.o
- .group         0x0000000000000000        0xc ./SW_APPs/APP_morsecode.o
  .text          0x0000000000000000        0x0 ./SW_APPs/APP_morsecode.o
  .data          0x0000000000000000        0x0 ./SW_APPs/APP_morsecode.o
  .bss           0x0000000000000000        0x0 ./SW_APPs/APP_morsecode.o
@@ -4492,7 +4269,7 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x1df ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0x1c ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0x22 ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000       0xc3 ./SW_APPs/APP_morsecode.o
+ .debug_macro   0x0000000000000000       0xbd ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000      0xd23 ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000     0xfd8c ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0x6d ./SW_APPs/APP_morsecode.o
@@ -4518,33 +4295,25 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x217 ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000      0x8d1 ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0xb5 ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000       0x52 ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000       0x18 ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000       0x3c ./SW_APPs/APP_morsecode.o
+ .debug_macro   0x0000000000000000       0x61 ./SW_APPs/APP_morsecode.o
+ .debug_macro   0x0000000000000000       0x24 ./SW_APPs/APP_morsecode.o
+ .debug_macro   0x0000000000000000       0x43 ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0x34 ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0x16 ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0x35 ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000      0x333 ./SW_APPs/APP_morsecode.o
+ .debug_macro   0x0000000000000000      0x369 ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0x10 ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0x16 ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0x43 ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0x34 ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0x10 ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0x58 ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000       0x71 ./SW_APPs/APP_morsecode.o
+ .debug_macro   0x0000000000000000       0x8e ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0x1c ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000      0x12a ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000       0x10 ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000       0x1c ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000       0x52 ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000       0x22 ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000       0x10 ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000       0x40 ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000       0xd5 ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000       0x1c ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000       0x3d ./SW_APPs/APP_morsecode.o
+ .debug_macro   0x0000000000000000      0x177 ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0x16 ./SW_APPs/APP_morsecode.o
- .debug_macro   0x0000000000000000      0x145 ./SW_APPs/APP_morsecode.o
+ .debug_macro   0x0000000000000000       0x16 ./SW_APPs/APP_morsecode.o
+ .debug_macro   0x0000000000000000      0x147 ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000       0xac ./SW_APPs/APP_morsecode.o
  .debug_macro   0x0000000000000000      0x391 ./SW_APPs/APP_morsecode.o
  .group         0x0000000000000000        0xc ./SW_APPs/Main_APP.o
@@ -4609,17 +4378,10 @@ Discarded input sections
  .group         0x0000000000000000        0xc ./SW_APPs/Main_APP.o
  .group         0x0000000000000000        0xc ./SW_APPs/Main_APP.o
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+ .text          0x0000000000000000        0x0 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtend.o
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+ .bss           0x0000000000000000        0x0 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtend.o
+ .rodata        0x0000000000000000       0x24 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtend.o
+ .eh_frame      0x0000000000000000        0x4 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtend.o
+ .comment       0x0000000000000000       0x44 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtend.o
  .ARM.attributes
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- .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o)
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- .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o)
- .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtend.o
- .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtend.o
- .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtend.o
- .eh_frame      0x0000000000000000        0x4 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtend.o
- .ARM.attributes
-                0x0000000000000000       0x2d c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtend.o
- .text          0x0000000000000000        0x0 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtn.o
- .data          0x0000000000000000        0x0 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtn.o
- .bss           0x0000000000000000        0x0 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtn.o
+                0x0000000000000000       0x2d C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtend.o
+ .text          0x0000000000000000        0x0 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtn.o
+ .data          0x0000000000000000        0x0 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtn.o
+ .bss           0x0000000000000000        0x0 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtn.o
 
 Memory Configuration
 
@@ -5202,9 +4942,9 @@ FLASH            0x0000000008000000 0x0000000000080000 xr
 
 Linker script and memory map
 
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crti.o
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtbegin.o
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/crt0.o
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crti.o
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtbegin.o
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/crt0.o
 LOAD ./Core/Src/main.o
 LOAD ./Core/Src/stm32f1xx_hal_msp.o
 LOAD ./Core/Src/stm32f1xx_it.o
@@ -5242,25 +4982,25 @@ LOAD ./SW_APPs/APP_morsecode.o
 LOAD ./SW_APPs/Main_APP.o
 LOAD ./SW_APPs/windows.o
 START GROUP
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a
 END GROUP
 START GROUP
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a
 END GROUP
 START GROUP
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libnosys.a
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libnosys.a
 END GROUP
 START GROUP
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libnosys.a
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libnosys.a
 END GROUP
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtend.o
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtn.o
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtend.o
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtn.o
                 0x0000000020010000                _estack = (ORIGIN (RAM) + LENGTH (RAM))
                 0x0000000000000400                _Min_Heap_Size = 0x400
                 0x0000000000000800                _Min_Stack_Size = 0x800
@@ -5272,13 +5012,13 @@ LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x0000000008000000                g_pfnVectors
                 0x00000000080001e4                . = ALIGN (0x4)
 
-.text           0x00000000080001e8     0xa478
+.text           0x00000000080001e8     0xa464
                 0x00000000080001e8                . = ALIGN (0x4)
  *(.text)
- .text          0x00000000080001e8       0x40 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtbegin.o
- .text          0x0000000008000228       0x10 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-strlen.o)
+ .text          0x00000000080001e8       0x40 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtbegin.o
+ .text          0x0000000008000228       0x10 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-strlen.o)
                 0x0000000008000228                strlen
- .text          0x0000000008000238      0x378 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubdf3.o)
+ .text          0x0000000008000238      0x378 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubdf3.o)
                 0x0000000008000238                __aeabi_drsub
                 0x0000000008000240                __aeabi_dsub
                 0x0000000008000240                __subdf3
@@ -5294,12 +5034,12 @@ LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x0000000008000544                __aeabi_ul2d
                 0x0000000008000554                __floatdidf
                 0x0000000008000554                __aeabi_l2d
- .text          0x00000000080005b0      0x424 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivdf3.o)
+ .text          0x00000000080005b0      0x424 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivdf3.o)
                 0x00000000080005b0                __aeabi_dmul
                 0x00000000080005b0                __muldf3
                 0x0000000008000804                __divdf3
                 0x0000000008000804                __aeabi_ddiv
- .text          0x00000000080009d4      0x110 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpdf2.o)
+ .text          0x00000000080009d4      0x110 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpdf2.o)
                 0x00000000080009d4                __gtdf2
                 0x00000000080009d4                __gedf2
                 0x00000000080009dc                __ltdf2
@@ -5315,16 +5055,16 @@ LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x0000000008000aa8                __aeabi_dcmple
                 0x0000000008000abc                __aeabi_dcmpge
                 0x0000000008000ad0                __aeabi_dcmpgt
- .text          0x0000000008000ae4       0x2c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unorddf2.o)
+ .text          0x0000000008000ae4       0x2c C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unorddf2.o)
                 0x0000000008000ae4                __unorddf2
                 0x0000000008000ae4                __aeabi_dcmpun
- .text          0x0000000008000b10       0x50 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixdfsi.o)
+ .text          0x0000000008000b10       0x50 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixdfsi.o)
                 0x0000000008000b10                __aeabi_d2iz
                 0x0000000008000b10                __fixdfsi
- .text          0x0000000008000b60       0xa0 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_truncdfsf2.o)
+ .text          0x0000000008000b60       0xa0 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_truncdfsf2.o)
                 0x0000000008000b60                __truncdfsf2
                 0x0000000008000b60                __aeabi_d2f
- .text          0x0000000008000c00      0x21c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o)
+ .text          0x0000000008000c00      0x21c C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o)
                 0x0000000008000c00                __aeabi_frsub
                 0x0000000008000c08                __subsf3
                 0x0000000008000c08                __aeabi_fsub
@@ -5338,15 +5078,15 @@ LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x0000000008000d90                __floatundisf
                 0x0000000008000da0                __aeabi_l2f
                 0x0000000008000da0                __floatdisf
- .text          0x0000000008000e1c      0x2a0 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o)
+ .text          0x0000000008000e1c      0x2a0 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o)
                 0x0000000008000e1c                __mulsf3
                 0x0000000008000e1c                __aeabi_fmul
                 0x0000000008000f84                __aeabi_fdiv
                 0x0000000008000f84                __divsf3
- .text          0x00000000080010bc       0x4c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o)
+ .text          0x00000000080010bc       0x4c C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o)
                 0x00000000080010bc                __aeabi_f2iz
                 0x00000000080010bc                __fixsfsi
- .text          0x0000000008001108       0x40 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o)
+ .text          0x0000000008001108       0x40 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o)
                 0x0000000008001108                __fixunssfsi
                 0x0000000008001108                __aeabi_f2uiz
  *(.text*)
@@ -5591,14 +5331,14 @@ LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
  .text.I2C_IsAcknowledgeFailed
                 0x0000000008003300       0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
  .text.HAL_RCC_OscConfig
-                0x000000000800335c      0x500 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
+                0x000000000800335c      0x504 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
                 0x000000000800335c                HAL_RCC_OscConfig
  .text.HAL_RCC_ClockConfig
-                0x000000000800385c      0x1d4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
-                0x000000000800385c                HAL_RCC_ClockConfig
+                0x0000000008003860      0x1d4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
+                0x0000000008003860                HAL_RCC_ClockConfig
  .text.HAL_RCC_GetSysClockFreq
-                0x0000000008003a30       0xc0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
-                0x0000000008003a30                HAL_RCC_GetSysClockFreq
+                0x0000000008003a34       0xbc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
+                0x0000000008003a34                HAL_RCC_GetSysClockFreq
  .text.HAL_RCC_GetHCLKFreq
                 0x0000000008003af0       0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
                 0x0000000008003af0                HAL_RCC_GetHCLKFreq
@@ -5772,429 +5512,409 @@ LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x0000000008005f5c       0xc8 ./HW_Devices/touch.o
                 0x0000000008005f5c                TP_Read_AD
  .text.TP_Read_XOY
-                0x0000000008006024      0x104 ./HW_Devices/touch.o
+                0x0000000008006024       0xf4 ./HW_Devices/touch.o
                 0x0000000008006024                TP_Read_XOY
  .text.TP_Read_XY_ADC
-                0x0000000008006128       0x32 ./HW_Devices/touch.o
-                0x0000000008006128                TP_Read_XY_ADC
+                0x0000000008006118       0x32 ./HW_Devices/touch.o
+                0x0000000008006118                TP_Read_XY_ADC
  .text.TP_Read_XY2
-                0x000000000800615a       0xd0 ./HW_Devices/touch.o
-                0x000000000800615a                TP_Read_XY2
- *fill*         0x000000000800622a        0x2 
+                0x000000000800614a       0xd0 ./HW_Devices/touch.o
+                0x000000000800614a                TP_Read_XY2
+ *fill*         0x000000000800621a        0x2 
  .text.TP_Server
-                0x000000000800622c       0xf0 ./HW_Devices/touch.o
-                0x000000000800622c                TP_Server
+                0x000000000800621c       0xf0 ./HW_Devices/touch.o
+                0x000000000800621c                TP_Server
  .text.TP_DrwaTrage
-                0x000000000800631c       0xb8 ./HW_Devices/touch.o
-                0x000000000800631c                TP_DrwaTrage
+                0x000000000800630c       0xb8 ./HW_Devices/touch.o
+                0x000000000800630c                TP_DrwaTrage
  .text.TP_adjustment
-                0x00000000080063d4      0x5c4 ./HW_Devices/touch.o
-                0x00000000080063d4                TP_adjustment
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  *(.ARM.extab* .gnu.linkonce.armextab.*)
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                 [!provide]                        PROVIDE (__fini_array_start = .)
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+.data           0x0000000020000000      0x1d4 load address 0x000000000800b5bc
                 0x0000000020000000                . = ALIGN (0x4)
                 0x0000000020000000                _sdata = .
  *(.data)
@@ -6212,141 +5932,161 @@ LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x0000000020000009        0x1 ./SW_APPs/APP_morsecode.o
                 0x0000000020000009                last_key
  *fill*         0x000000002000000a        0x2 
+ .data.__sglue  0x000000002000000c        0xc C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o)
+                0x000000002000000c                __sglue
+ .data._impure_data
+                0x0000000020000018       0x4c C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o)
+                0x0000000020000018                _impure_data
  .data._impure_ptr
-                0x000000002000000c        0x4 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-impure.o)
-                0x000000002000000c                _impure_ptr
- .data.impure_data
-                0x0000000020000010       0x60 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-impure.o)
+                0x0000000020000064        0x4 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o)
+                0x0000000020000064                _impure_ptr
  .data.__global_locale
-                0x0000000020000070      0x16c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-locale.o)
-                0x0000000020000070                __global_locale
+                0x0000000020000068      0x16c C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-locale.o)
+                0x0000000020000068                __global_locale
  *(.RamFunc)
  *(.RamFunc*)
-                0x00000000200001dc                . = ALIGN (0x4)
-                0x00000000200001dc                _edata = .
+                0x00000000200001d4                . = ALIGN (0x4)
+                0x00000000200001d4                _edata = .
 
-.igot.plt       0x00000000200001dc        0x0 load address 0x000000000800b818
- .igot.plt      0x00000000200001dc        0x0 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtbegin.o
-                0x00000000200001dc                . = ALIGN (0x4)
+.igot.plt       0x00000000200001d4        0x0 load address 0x000000000800b790
+ .igot.plt      0x00000000200001d4        0x0 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtbegin.o
+                0x00000000200001d4                . = ALIGN (0x4)
 
-.bss            0x00000000200001dc     0x2448 load address 0x000000000800b818
-                0x00000000200001dc                _sbss = .
-                0x00000000200001dc                __bss_start__ = _sbss
+.bss            0x00000000200001d4     0x2530 load address 0x000000000800b790
+                0x00000000200001d4                _sbss = .
+                0x00000000200001d4                __bss_start__ = _sbss
  *(.bss)
- .bss           0x00000000200001dc       0x1c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtbegin.o
+ .bss           0x00000000200001d4       0x1c C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtbegin.o
  *(.bss*)
+ .bss.hi2c2     0x00000000200001f0       0x54 ./Core/Src/main.o
+                0x00000000200001f0                hi2c2
+ .bss.hspi1     0x0000000020000244       0x58 ./Core/Src/main.o
+                0x0000000020000244                hspi1
+ .bss.htim4     0x000000002000029c       0x48 ./Core/Src/main.o
+                0x000000002000029c                htim4
+ .bss.htim6     0x00000000200002e4       0x48 ./Core/Src/main.o
+                0x00000000200002e4                htim6
+ .bss.hsram1    0x000000002000032c       0x48 ./Core/Src/main.o
+                0x000000002000032c                hsram1
  .bss.FSMC_Initialized
-                0x00000000200001f8        0x4 ./Core/Src/stm32f1xx_hal_msp.o
+                0x0000000020000374        0x4 ./Core/Src/stm32f1xx_hal_msp.o
  .bss.__sbrk_heap_end
-                0x00000000200001fc        0x4 ./Core/Src/sysmem.o
- .bss.busy_flag.7696
-                0x0000000020000200        0x1 ./HW_Devices/buzzer.o
- *fill*         0x0000000020000201        0x3 
- .bss.play_delay.7697
-                0x0000000020000204        0x4 ./HW_Devices/buzzer.o
+                0x0000000020000378        0x4 ./Core/Src/sysmem.o
+ .bss.uwTick    0x000000002000037c        0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o
+                0x000000002000037c                uwTick
+ .bss.lcddev    0x0000000020000380        0xa ./HW_Devices/LCD.o
+                0x0000000020000380                lcddev
+ *fill*         0x000000002000038a        0x2 
+ .bss.notes     0x000000002000038c        0x4 ./HW_Devices/buzzer.o
+                0x000000002000038c                notes
+ .bss.busy_flag.1
+                0x0000000020000390        0x1 ./HW_Devices/buzzer.o
+ *fill*         0x0000000020000391        0x3 
+ .bss.play_delay.0
+                0x0000000020000394        0x4 ./HW_Devices/buzzer.o
+ .bss.eeprom_write_buffer
+                0x0000000020000398       0x14 ./HW_Devices/eeprom.o
+                0x0000000020000398                eeprom_write_buffer
+ .bss.k1        0x00000000200003ac       0x10 ./HW_Devices/key.o
+                0x00000000200003ac                k1
+ .bss.k2        0x00000000200003bc       0x10 ./HW_Devices/key.o
+                0x00000000200003bc                k2
+ .bss.k3        0x00000000200003cc       0x10 ./HW_Devices/key.o
+                0x00000000200003cc                k3
+ .bss.t0        0x00000000200003dc       0x10 ./HW_Devices/touch.o
+                0x00000000200003dc                t0
+ .bss.tconfig   0x00000000200003ec       0x18 ./HW_Devices/touch.o
+                0x00000000200003ec                tconfig
+ .bss.fifo_red  0x0000000020000404        0x2 ./SW_APPs/APP_blood.o
+                0x0000000020000404                fifo_red
+ .bss.fifo_ir   0x0000000020000406        0x2 ./SW_APPs/APP_blood.o
+                0x0000000020000406                fifo_ir
+ .bss.s1        0x0000000020000408     0x1080 ./SW_APPs/APP_blood.o
+                0x0000000020000408                s1
+ .bss.s2        0x0000000020001488     0x1080 ./SW_APPs/APP_blood.o
+                0x0000000020001488                s2
  .bss.get_data_flag
-                0x0000000020000208        0x1 ./SW_APPs/APP_blood.o
-                0x0000000020000208                get_data_flag
- *fill*         0x0000000020000209        0x1 
+                0x0000000020002508        0x1 ./SW_APPs/APP_blood.o
+                0x0000000020002508                get_data_flag
+ *fill*         0x0000000020002509        0x1 
  .bss.g_fft_index
-                0x000000002000020a        0x2 ./SW_APPs/APP_blood.o
-                0x000000002000020a                g_fft_index
- .bss.push_key  0x000000002000020c        0x1 ./SW_APPs/APP_morsecode.o
-                0x000000002000020c                push_key
- *fill*         0x000000002000020d        0x3 
- .bss.morse_t   0x0000000020000210        0x4 ./SW_APPs/APP_morsecode.o
-                0x0000000020000210                morse_t
+                0x000000002000250a        0x2 ./SW_APPs/APP_blood.o
+                0x000000002000250a                g_fft_index
+ .bss.push_key  0x000000002000250c        0x1 ./SW_APPs/APP_morsecode.o
+                0x000000002000250c                push_key
+ *fill*         0x000000002000250d        0x3 
+ .bss.morse_t   0x0000000020002510        0x4 ./SW_APPs/APP_morsecode.o
+                0x0000000020002510                morse_t
  .bss.morse_time_out
-                0x0000000020000214        0x4 ./SW_APPs/APP_morsecode.o
-                0x0000000020000214                morse_time_out
+                0x0000000020002514        0x4 ./SW_APPs/APP_morsecode.o
+                0x0000000020002514                morse_time_out
+ .bss.morse_temp
+                0x0000000020002518        0x2 ./SW_APPs/APP_morsecode.o
+                0x0000000020002518                morse_temp
+ *fill*         0x000000002000251a        0x2 
+ .bss.morse_input_buff
+                0x000000002000251c       0x81 ./SW_APPs/APP_morsecode.o
+                0x000000002000251c                morse_input_buff
+ *fill*         0x000000002000259d        0x3 
  .bss.morse_input_flag
-                0x0000000020000218        0x4 ./SW_APPs/APP_morsecode.o
-                0x0000000020000218                morse_input_flag
+                0x00000000200025a0        0x4 ./SW_APPs/APP_morsecode.o
+                0x00000000200025a0                morse_input_flag
  .bss.morse_char_flag
-                0x000000002000021c        0x4 ./SW_APPs/APP_morsecode.o
-                0x000000002000021c                morse_char_flag
+                0x00000000200025a4        0x4 ./SW_APPs/APP_morsecode.o
+                0x00000000200025a4                morse_char_flag
+ .bss.morse_x   0x00000000200025a8        0x4 ./SW_APPs/APP_morsecode.o
+                0x00000000200025a8                morse_x
+ .bss.morse_y   0x00000000200025ac        0x4 ./SW_APPs/APP_morsecode.o
+                0x00000000200025ac                morse_y
  .bss.morse_flah
-                0x0000000020000220        0x1 ./SW_APPs/APP_morsecode.o
-                0x0000000020000220                morse_flah
+                0x00000000200025b0        0x1 ./SW_APPs/APP_morsecode.o
+                0x00000000200025b0                morse_flah
  .bss.morse_letter_temp
-                0x0000000020000221        0x1 ./SW_APPs/APP_morsecode.o
-                0x0000000020000221                morse_letter_temp
+                0x00000000200025b1        0x1 ./SW_APPs/APP_morsecode.o
+                0x00000000200025b1                morse_letter_temp
  .bss.morse_letter_flag
-                0x0000000020000222        0x1 ./SW_APPs/APP_morsecode.o
-                0x0000000020000222                morse_letter_flag
- *fill*         0x0000000020000223        0x1 
+                0x00000000200025b2        0x1 ./SW_APPs/APP_morsecode.o
+                0x00000000200025b2                morse_letter_flag
+ *fill*         0x00000000200025b3        0x1 
+ .bss.morsecode_window
+                0x00000000200025b4        0x4 ./SW_APPs/APP_morsecode.o
+                0x00000000200025b4                morsecode_window
  .bss.__malloc_free_list
-                0x0000000020000224        0x4 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-nano-mallocr.o)
-                0x0000000020000224                __malloc_free_list
+                0x00000000200025b8        0x4 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-mallocr.o)
+                0x00000000200025b8                __malloc_free_list
  .bss.__malloc_sbrk_start
-                0x0000000020000228        0x4 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-nano-mallocr.o)
-                0x0000000020000228                __malloc_sbrk_start
+                0x00000000200025bc        0x4 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-mallocr.o)
+                0x00000000200025bc                __malloc_sbrk_start
+ .bss.__sf      0x00000000200025c0      0x138 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o)
+                0x00000000200025c0                __sf
+ .bss.__stdio_exit_handler
+                0x00000000200026f8        0x4 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o)
+                0x00000000200026f8                __stdio_exit_handler
+ .bss.errno     0x00000000200026fc        0x4 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-reent.o)
+                0x00000000200026fc                errno
+ .bss.__lock___malloc_recursive_mutex
+                0x0000000020002700        0x1 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-lock.o)
+                0x0000000020002700                __lock___malloc_recursive_mutex
+ .bss.__lock___sfp_recursive_mutex
+                0x0000000020002701        0x1 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-lock.o)
+                0x0000000020002701                __lock___sfp_recursive_mutex
  *(COMMON)
- COMMON         0x000000002000022c      0x184 ./Core/Src/main.o
-                0x000000002000022c                htim4
-                0x0000000020000274                hi2c2
-                0x00000000200002c8                hsram1
-                0x0000000020000310                htim6
-                0x0000000020000358                hspi1
- COMMON         0x00000000200003b0        0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o
-                0x00000000200003b0                uwTick
- COMMON         0x00000000200003b4        0xa ./HW_Devices/LCD.o
-                0x00000000200003b4                lcddev
- *fill*         0x00000000200003be        0x2 
- COMMON         0x00000000200003c0        0x4 ./HW_Devices/buzzer.o
-                0x00000000200003c0                notes
- COMMON         0x00000000200003c4       0x14 ./HW_Devices/eeprom.o
-                0x00000000200003c4                eeprom_write_buffer
- COMMON         0x00000000200003d8       0x30 ./HW_Devices/key.o
-                0x00000000200003d8                k2
-                0x00000000200003e8                k3
-                0x00000000200003f8                k1
- COMMON         0x0000000020000408       0x28 ./HW_Devices/touch.o
-                0x0000000020000408                tconfig
-                0x0000000020000420                t0
- COMMON         0x0000000020000430     0x2152 ./SW_APPs/APP_blood.o
-                0x0000000020000430                blood_str
-                0x0000000020000470                fifo_ir
-                0x0000000020000474                blood_win
-                0x0000000020000478                s1
-                0x00000000200014f8                s2
-                0x0000000020002578                g_BloodWave
-                0x0000000020002580                fifo_red
- *fill*         0x0000000020002582        0x2 
- COMMON         0x0000000020002584       0x92 ./SW_APPs/APP_morsecode.o
-                0x0000000020002584                morsecode_window
-                0x0000000020002588                morse_input_buff
-                0x000000002000260c                morse_y
-                0x0000000020002610                morse_x
-                0x0000000020002614                morse_temp
- COMMON         0x0000000020002616        0x9 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-lock.o)
-                0x0000000020002616                __lock___atexit_recursive_mutex
-                0x0000000020002617                __lock___arc4random_mutex
-                0x0000000020002618                __lock___env_recursive_mutex
-                0x0000000020002619                __lock___sinit_recursive_mutex
-                0x000000002000261a                __lock___malloc_recursive_mutex
-                0x000000002000261b                __lock___at_quick_exit_mutex
-                0x000000002000261c                __lock___dd_hash_mutex
-                0x000000002000261d                __lock___tz_mutex
-                0x000000002000261e                __lock___sfp_recursive_mutex
- *fill*         0x000000002000261f        0x1 
- COMMON         0x0000000020002620        0x4 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-reent.o)
-                0x0000000020002620                errno
-                0x0000000020002624                . = ALIGN (0x4)
-                0x0000000020002624                _ebss = .
-                0x0000000020002624                __bss_end__ = _ebss
+                0x0000000020002704                . = ALIGN (0x4)
+ *fill*         0x0000000020002702        0x2 
+                0x0000000020002704                _ebss = .
+                0x0000000020002704                __bss_end__ = _ebss
 
 ._user_heap_stack
-                0x0000000020002624      0xc04 load address 0x000000000800b818
-                0x0000000020002628                . = ALIGN (0x8)
- *fill*         0x0000000020002624        0x4 
+                0x0000000020002704      0xc04 load address 0x000000000800b790
+                0x0000000020002708                . = ALIGN (0x8)
+ *fill*         0x0000000020002704        0x4 
                 [!provide]                        PROVIDE (end = .)
-                0x0000000020002628                PROVIDE (_end = .)
-                0x0000000020002a28                . = (. + _Min_Heap_Size)
- *fill*         0x0000000020002628      0x400 
-                0x0000000020003228                . = (. + _Min_Stack_Size)
- *fill*         0x0000000020002a28      0x800 
-                0x0000000020003228                . = ALIGN (0x8)
+                0x0000000020002708                PROVIDE (_end = .)
+                0x0000000020002b08                . = (. + _Min_Heap_Size)
+ *fill*         0x0000000020002708      0x400 
+                0x0000000020003308                . = (. + _Min_Stack_Size)
+ *fill*         0x0000000020002b08      0x800 
+                0x0000000020003308                . = ALIGN (0x8)
 
 /DISCARD/
  libc.a(*)
@@ -6357,9 +6097,9 @@ LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
                 0x0000000000000000       0x29
  *(.ARM.attributes)
  .ARM.attributes
-                0x0000000000000000       0x1d c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crti.o
+                0x0000000000000000       0x1d C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crti.o
  .ARM.attributes
-                0x000000000000001d       0x2d c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtbegin.o
+                0x000000000000001d       0x2d C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtbegin.o
  .ARM.attributes
                 0x000000000000004a       0x2d ./Core/Src/main.o
  .ARM.attributes
@@ -6415,186 +6155,216 @@ LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
  .ARM.attributes
                 0x00000000000004d0       0x2d ./SW_APPs/windows.o
  .ARM.attributes
-                0x00000000000004fd       0x2d c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-errno.o)
+                0x00000000000004fd       0x2d C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-malloc.o)
  .ARM.attributes
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+                0x000000000000052a       0x2d C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-mallocr.o)
  .ARM.attributes
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+                0x0000000000000557       0x2d C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-mlock.o)
  .ARM.attributes
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  .ARM.attributes
-                0x00000000000005b1       0x2d c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-memset.o)
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  .ARM.attributes
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  .ARM.attributes
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+                0x000000000000060b       0x2d C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-fwalk.o)
  .ARM.attributes
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+                0x0000000000000638       0x2d C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-sprintf.o)
  .ARM.attributes
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  .ARM.attributes
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  .ARM.attributes
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  .ARM.attributes
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  .ARM.attributes
-                0x0000000000000dcb       0x1d c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixdfsi.o)
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  .ARM.attributes
-                0x0000000000000de8       0x1d c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_truncdfsf2.o)
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  .ARM.attributes
-                0x0000000000000e05       0x1d c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o)
+                0x0000000000000e05       0x1d C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o)
  .ARM.attributes
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  .ARM.attributes
-                0x0000000000000e3f       0x1d c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o)
+                0x0000000000000e3f       0x1d C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o)
  .ARM.attributes
-                0x0000000000000e5c       0x1d c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o)
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  .ARM.attributes
-                0x0000000000000e79       0x1d c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp/crtn.o
+                0x0000000000000e79       0x1d C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtn.o
 OUTPUT(m3s.elf elf32-littlearm)
 LOAD linker stubs
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc.a
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a
-LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v7-m/nofp\libgcc.a
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc.a
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a
+LOAD C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a
 
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- .debug_info    0x0000000000004ea2      0xfa8 ./Core/Src/syscalls.o
- .debug_info    0x0000000000005e4a      0xa25 ./Core/Src/sysmem.o
- .debug_info    0x000000000000686f      0x2be ./Core/Src/system_stm32f1xx.o
- .debug_info    0x0000000000006b2d       0x22 ./Core/Startup/startup_stm32f103zetx.o
- .debug_info    0x0000000000006b4f      0x7d0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o
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- .debug_info    0x000000000001b764     0x10f6 ./SW_APPs/windows.o
+.comment        0x0000000000000000       0x43
+ .comment       0x0000000000000000       0x43 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp/crtbegin.o
+                                         0x44 (size before relaxing)
+ .comment       0x0000000000000043       0x44 ./Core/Src/main.o
+ .comment       0x0000000000000043       0x44 ./Core/Src/stm32f1xx_hal_msp.o
+ .comment       0x0000000000000043       0x44 ./Core/Src/stm32f1xx_it.o
+ .comment       0x0000000000000043       0x44 ./Core/Src/syscalls.o
+ .comment       0x0000000000000043       0x44 ./Core/Src/sysmem.o
+ .comment       0x0000000000000043       0x44 ./Core/Src/system_stm32f1xx.o
+ .comment       0x0000000000000043       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o
+ .comment       0x0000000000000043       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o
+ .comment       0x0000000000000043       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o
+ .comment       0x0000000000000043       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o
+ .comment       0x0000000000000043       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o
+ .comment       0x0000000000000043       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.o
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+ .comment       0x0000000000000043       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o
+ .comment       0x0000000000000043       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o
+ .comment       0x0000000000000043       0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.o
+ .comment       0x0000000000000043       0x44 ./HW_Devices/LCD.o
+ .comment       0x0000000000000043       0x44 ./HW_Devices/buzzer.o
+ .comment       0x0000000000000043       0x44 ./HW_Devices/eeprom.o
+ .comment       0x0000000000000043       0x44 ./HW_Devices/iic.o
+ .comment       0x0000000000000043       0x44 ./HW_Devices/key.o
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+ .comment       0x0000000000000043       0x44 ./SW_APPs/APP_blood.o
+ .comment       0x0000000000000043       0x44 ./SW_APPs/APP_morsecode.o
+ .comment       0x0000000000000043       0x44 ./SW_APPs/Main_APP.o
+ .comment       0x0000000000000043       0x44 ./SW_APPs/windows.o
 
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+
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+ .debug_abbrev  0x0000000000003068      0x287 ./SW_APPs/APP_morsecode.o
+ .debug_abbrev  0x00000000000032ef      0x26b ./SW_APPs/Main_APP.o
+ .debug_abbrev  0x000000000000355a      0x2ce ./SW_APPs/windows.o
 
 .debug_aranges  0x0000000000000000     0x1370
  .debug_aranges
@@ -6652,275 +6422,274 @@ LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
  .debug_aranges
                 0x0000000000001300       0x70 ./SW_APPs/windows.o
 
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-
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@@ -6947,58 +6716,64 @@ LOAD c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
  .debug_frame   0x0000000000004d90       0x88 ./SW_APPs/APP_morsecode.o
  .debug_frame   0x0000000000004e18       0x30 ./SW_APPs/Main_APP.o
  .debug_frame   0x0000000000004e48      0x1b0 ./SW_APPs/windows.o
- .debug_frame   0x0000000000004ff8       0x20 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-errno.o)
- .debug_frame   0x0000000000005018       0x2c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-init.o)
- .debug_frame   0x0000000000005044       0x30 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-malloc.o)
- .debug_frame   0x0000000000005074       0x20 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-memset.o)
- .debug_frame   0x0000000000005094       0x38 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-nano-freer.o)
- .debug_frame   0x00000000000050cc       0x30 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-nano-mallocr.o)
- .debug_frame   0x00000000000050fc       0x94 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-nano-vfprintf_float.o)
- .debug_frame   0x0000000000005190       0x60 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-nano-vfprintf_i.o)
- .debug_frame   0x00000000000051f0       0x2c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-sbrkr.o)
- .debug_frame   0x000000000000521c       0x6c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-sprintf.o)
- .debug_frame   0x0000000000005288       0x40 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-wbuf.o)
- .debug_frame   0x00000000000052c8       0x2c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-wsetup.o)
- .debug_frame   0x00000000000052f4       0x6c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-dtoa.o)
- .debug_frame   0x0000000000005360       0x5c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-fflush.o)
- .debug_frame   0x00000000000053bc      0x14c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-findfp.o)
- .debug_frame   0x0000000000005508       0x54 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-fwalk.o)
- .debug_frame   0x000000000000555c       0x40 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-localeconv.o)
- .debug_frame   0x000000000000559c       0xb0 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-lock.o)
- .debug_frame   0x000000000000564c       0x58 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-makebuf.o)
- .debug_frame   0x00000000000056a4       0x28 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-memchr-stub.o)
- .debug_frame   0x00000000000056cc       0x28 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-memcpy-stub.o)
- .debug_frame   0x00000000000056f4       0x30 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-mlock.o)
- .debug_frame   0x0000000000005724      0x254 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-mprec.o)
- .debug_frame   0x0000000000005978       0x2c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-nano-callocr.o)
- .debug_frame   0x00000000000059a4       0x90 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-nano-svfprintf.o)
- .debug_frame   0x0000000000005a34       0xac c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-nano-vfprintf.o)
- .debug_frame   0x0000000000005ae0       0x5c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-reent.o)
- .debug_frame   0x0000000000005b3c       0x88 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-stdio.o)
- .debug_frame   0x0000000000005bc4       0x2c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-writer.o)
- .debug_frame   0x0000000000005bf0       0x40 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-assert.o)
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- .debug_frame   0x0000000000005c5c       0x64 c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-fprintf.o)
- .debug_frame   0x0000000000005cc0       0x2c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-fstatr.o)
- .debug_frame   0x0000000000005cec       0x2c c:/st/stm32cubeide_1.8.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.win32_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(lib_a-isattyr.o)
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+ .debug_frame   0x00000000000060b4       0xc4 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpdf2.o)
+ .debug_frame   0x0000000000006178       0x20 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unorddf2.o)
+ .debug_frame   0x0000000000006198       0x24 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixdfsi.o)
+ .debug_frame   0x00000000000061bc       0x24 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_truncdfsf2.o)
+ .debug_frame   0x00000000000061e0       0x4c C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o)
+ .debug_frame   0x000000000000622c       0x38 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o)
+ .debug_frame   0x0000000000006264       0x24 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o)
+ .debug_frame   0x0000000000006288       0x24 C:/ST/STM32CubeIDE_1.14.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.win32_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o)
+
+.debug_line_str
+                0x0000000000000000       0x47
+ .debug_line_str
+                0x0000000000000000       0x47 ./Core/Startup/startup_stm32f103zetx.o
+                                         0x5f (size before relaxing)
diff --git a/Debug/makefile b/Debug/makefile
index 6543fa6..20c2573 100644
--- a/Debug/makefile
+++ b/Debug/makefile
@@ -1,6 +1,6 @@
 ################################################################################
 # Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (9-2020-q2-update)
+# Toolchain: GNU Tools for STM32 (11.3.rel1)
 ################################################################################
 
 -include ../makefile.init
@@ -45,15 +45,15 @@ BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME)$(if $(BUILD_ART
 EXECUTABLES += \
 m3s.elf \
 
+MAP_FILES += \
+m3s.map \
+
 SIZE_OUTPUT += \
 default.size.stdout \
 
 OBJDUMP_LIST += \
 m3s.list \
 
-OBJCOPY_BIN += \
-m3s.bin \
-
 
 # All Target
 all: main-build
@@ -62,8 +62,8 @@ all: main-build
 main-build: m3s.elf secondary-outputs
 
 # Tool invocations
-m3s.elf: $(OBJS) $(USER_OBJS) C:\Users\wuwen\Desktop\M3s_stm32\STM32F103ZETX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS)
-	arm-none-eabi-gcc -o "m3s.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m3 -T"C:\Users\wuwen\Desktop\M3s_stm32\STM32F103ZETX_FLASH.ld" --specs=nosys.specs -Wl,-Map="m3s.map" -Wl,--gc-sections -static --specs=nano.specs -mfloat-abi=soft -mthumb -u _printf_float -Wl,--start-group -lc -lm -Wl,--end-group
+m3s.elf m3s.map: $(OBJS) $(USER_OBJS) C:\Users\wuwen\m3s_stm32\STM32F103ZETX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS)
+	arm-none-eabi-gcc -o "m3s.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m3 -T"C:\Users\wuwen\m3s_stm32\STM32F103ZETX_FLASH.ld" --specs=nosys.specs -Wl,-Map="m3s.map" -Wl,--gc-sections -static --specs=nano.specs -mfloat-abi=soft -mthumb -u _printf_float -Wl,--start-group -lc -lm -Wl,--end-group
 	@echo 'Finished building target: $@'
 	@echo ' '
 
@@ -77,17 +77,12 @@ m3s.list: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS)
 	@echo 'Finished building: $@'
 	@echo ' '
 
-m3s.bin: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS)
-	arm-none-eabi-objcopy  -O binary $(EXECUTABLES) "m3s.bin"
-	@echo 'Finished building: $@'
-	@echo ' '
-
 # Other Targets
 clean:
-	-$(RM) default.size.stdout m3s.bin m3s.elf m3s.list
+	-$(RM) default.size.stdout m3s.elf m3s.list m3s.map
 	-@echo ' '
 
-secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST) $(OBJCOPY_BIN)
+secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST)
 
 fail-specified-linker-script-missing:
 	@echo 'Error: Cannot find the specified linker script. Check the linker settings in the build configuration.'
diff --git a/Debug/objects.mk b/Debug/objects.mk
index e12976d..820854b 100644
--- a/Debug/objects.mk
+++ b/Debug/objects.mk
@@ -1,6 +1,6 @@
 ################################################################################
 # Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (9-2020-q2-update)
+# Toolchain: GNU Tools for STM32 (11.3.rel1)
 ################################################################################
 
 USER_OBJS :=
diff --git a/Debug/sources.mk b/Debug/sources.mk
index f6a21d6..a37dc46 100644
--- a/Debug/sources.mk
+++ b/Debug/sources.mk
@@ -1,6 +1,6 @@
 ################################################################################
 # Automatically-generated file. Do not edit!
-# Toolchain: GNU Tools for STM32 (9-2020-q2-update)
+# Toolchain: GNU Tools for STM32 (11.3.rel1)
 ################################################################################
 
 ELF_SRCS := 
@@ -9,14 +9,16 @@ S_SRCS :=
 C_SRCS := 
 S_UPPER_SRCS := 
 O_SRCS := 
+CYCLO_FILES := 
 SIZE_OUTPUT := 
 OBJDUMP_LIST := 
+SU_FILES := 
 EXECUTABLES := 
 OBJS := 
+MAP_FILES := 
 S_DEPS := 
 S_UPPER_DEPS := 
 C_DEPS := 
-OBJCOPY_BIN := 
 
 # Every subdirectory with source files must be described here
 SUBDIRS := \
diff --git a/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h
new file mode 100644
index 0000000..8857920
--- /dev/null
+++ b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h
@@ -0,0 +1,1015 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_ll_bus.h
+  * @author  MCD Application Team
+  * @brief   Header file of BUS LL module.
+
+  @verbatim
+                      ##### RCC Limitations #####
+  ==============================================================================
+    [..]
+      A delay between an RCC peripheral clock enable and the effective peripheral
+      enabling should be taken into account in order to manage the peripheral read/write
+      from/to registers.
+      (+) This delay depends on the peripheral mapping.
+        (++) AHB & APB peripherals, 1 dummy read is necessary
+
+    [..]
+      Workarounds:
+      (#) For AHB & APB peripherals, a dummy read to the peripheral register has been
+          inserted in each LL_{BUS}_GRP{x}_EnableClock() function.
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_LL_BUS_H
+#define __STM32F1xx_LL_BUS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx.h"
+
+/** @addtogroup STM32F1xx_LL_Driver
+  * @{
+  */
+
+#if defined(RCC)
+
+/** @defgroup BUS_LL BUS
+  * @{
+  */
+
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+/* Private constants ---------------------------------------------------------*/
+#if defined(RCC_AHBRSTR_OTGFSRST) || defined(RCC_AHBRSTR_ETHMACRST)
+#define RCC_AHBRSTR_SUPPORT
+#endif /* RCC_AHBRSTR_OTGFSRST || RCC_AHBRSTR_ETHMACRST */
+
+/* Private macros ------------------------------------------------------------*/
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup BUS_LL_Exported_Constants BUS Exported Constants
+  * @{
+  */
+
+/** @defgroup BUS_LL_EC_AHB1_GRP1_PERIPH  AHB1 GRP1 PERIPH
+  * @{
+  */
+#define LL_AHB1_GRP1_PERIPH_ALL            (uint32_t)0xFFFFFFFFU
+#define LL_AHB1_GRP1_PERIPH_CRC            RCC_AHBENR_CRCEN
+#define LL_AHB1_GRP1_PERIPH_DMA1           RCC_AHBENR_DMA1EN
+#if defined(DMA2)
+#define LL_AHB1_GRP1_PERIPH_DMA2           RCC_AHBENR_DMA2EN
+#endif /*DMA2*/
+#if defined(ETH)
+#define LL_AHB1_GRP1_PERIPH_ETHMAC         RCC_AHBENR_ETHMACEN
+#define LL_AHB1_GRP1_PERIPH_ETHMACRX       RCC_AHBENR_ETHMACRXEN
+#define LL_AHB1_GRP1_PERIPH_ETHMACTX       RCC_AHBENR_ETHMACTXEN
+#endif /*ETH*/
+#define LL_AHB1_GRP1_PERIPH_FLASH          RCC_AHBENR_FLITFEN
+#if defined(FSMC_Bank1)
+#define LL_AHB1_GRP1_PERIPH_FSMC           RCC_AHBENR_FSMCEN
+#endif /*FSMC_Bank1*/
+#if defined(USB_OTG_FS)
+#define LL_AHB1_GRP1_PERIPH_OTGFS          RCC_AHBENR_OTGFSEN
+#endif /*USB_OTG_FS*/
+#if defined(SDIO)
+#define LL_AHB1_GRP1_PERIPH_SDIO           RCC_AHBENR_SDIOEN
+#endif /*SDIO*/
+#define LL_AHB1_GRP1_PERIPH_SRAM           RCC_AHBENR_SRAMEN
+/**
+  * @}
+  */
+
+/** @defgroup BUS_LL_EC_APB1_GRP1_PERIPH  APB1 GRP1 PERIPH
+  * @{
+  */
+#define LL_APB1_GRP1_PERIPH_ALL            (uint32_t)0xFFFFFFFFU
+#define LL_APB1_GRP1_PERIPH_BKP            RCC_APB1ENR_BKPEN
+#if defined(CAN1)
+#define LL_APB1_GRP1_PERIPH_CAN1           RCC_APB1ENR_CAN1EN
+#endif /*CAN1*/
+#if defined(CAN2)
+#define LL_APB1_GRP1_PERIPH_CAN2           RCC_APB1ENR_CAN2EN
+#endif /*CAN2*/
+#if defined(CEC)
+#define LL_APB1_GRP1_PERIPH_CEC            RCC_APB1ENR_CECEN
+#endif /*CEC*/
+#if defined(DAC)
+#define LL_APB1_GRP1_PERIPH_DAC1           RCC_APB1ENR_DACEN
+#endif /*DAC*/
+#define LL_APB1_GRP1_PERIPH_I2C1           RCC_APB1ENR_I2C1EN
+#if defined(I2C2)
+#define LL_APB1_GRP1_PERIPH_I2C2           RCC_APB1ENR_I2C2EN
+#endif /*I2C2*/
+#define LL_APB1_GRP1_PERIPH_PWR            RCC_APB1ENR_PWREN
+#if defined(SPI2)
+#define LL_APB1_GRP1_PERIPH_SPI2           RCC_APB1ENR_SPI2EN
+#endif /*SPI2*/
+#if defined(SPI3)
+#define LL_APB1_GRP1_PERIPH_SPI3           RCC_APB1ENR_SPI3EN
+#endif /*SPI3*/
+#if defined(TIM12)
+#define LL_APB1_GRP1_PERIPH_TIM12          RCC_APB1ENR_TIM12EN
+#endif /*TIM12*/
+#if defined(TIM13)
+#define LL_APB1_GRP1_PERIPH_TIM13          RCC_APB1ENR_TIM13EN
+#endif /*TIM13*/
+#if defined(TIM14)
+#define LL_APB1_GRP1_PERIPH_TIM14          RCC_APB1ENR_TIM14EN
+#endif /*TIM14*/
+#define LL_APB1_GRP1_PERIPH_TIM2           RCC_APB1ENR_TIM2EN
+#define LL_APB1_GRP1_PERIPH_TIM3           RCC_APB1ENR_TIM3EN
+#if defined(TIM4)
+#define LL_APB1_GRP1_PERIPH_TIM4           RCC_APB1ENR_TIM4EN
+#endif /*TIM4*/
+#if defined(TIM5)
+#define LL_APB1_GRP1_PERIPH_TIM5           RCC_APB1ENR_TIM5EN
+#endif /*TIM5*/
+#if defined(TIM6)
+#define LL_APB1_GRP1_PERIPH_TIM6           RCC_APB1ENR_TIM6EN
+#endif /*TIM6*/
+#if defined(TIM7)
+#define LL_APB1_GRP1_PERIPH_TIM7           RCC_APB1ENR_TIM7EN
+#endif /*TIM7*/
+#if defined(UART4)
+#define LL_APB1_GRP1_PERIPH_UART4          RCC_APB1ENR_UART4EN
+#endif /*UART4*/
+#if defined(UART5)
+#define LL_APB1_GRP1_PERIPH_UART5          RCC_APB1ENR_UART5EN
+#endif /*UART5*/
+#define LL_APB1_GRP1_PERIPH_USART2         RCC_APB1ENR_USART2EN
+#if defined(USART3)
+#define LL_APB1_GRP1_PERIPH_USART3         RCC_APB1ENR_USART3EN
+#endif /*USART3*/
+#if defined(USB)
+#define LL_APB1_GRP1_PERIPH_USB            RCC_APB1ENR_USBEN
+#endif /*USB*/
+#define LL_APB1_GRP1_PERIPH_WWDG           RCC_APB1ENR_WWDGEN
+/**
+  * @}
+  */
+
+/** @defgroup BUS_LL_EC_APB2_GRP1_PERIPH  APB2 GRP1 PERIPH
+  * @{
+  */
+#define LL_APB2_GRP1_PERIPH_ALL            (uint32_t)0xFFFFFFFFU
+#define LL_APB2_GRP1_PERIPH_ADC1           RCC_APB2ENR_ADC1EN
+#if defined(ADC2)
+#define LL_APB2_GRP1_PERIPH_ADC2           RCC_APB2ENR_ADC2EN
+#endif /*ADC2*/
+#if defined(ADC3)
+#define LL_APB2_GRP1_PERIPH_ADC3           RCC_APB2ENR_ADC3EN
+#endif /*ADC3*/
+#define LL_APB2_GRP1_PERIPH_AFIO           RCC_APB2ENR_AFIOEN
+#define LL_APB2_GRP1_PERIPH_GPIOA          RCC_APB2ENR_IOPAEN
+#define LL_APB2_GRP1_PERIPH_GPIOB          RCC_APB2ENR_IOPBEN
+#define LL_APB2_GRP1_PERIPH_GPIOC          RCC_APB2ENR_IOPCEN
+#define LL_APB2_GRP1_PERIPH_GPIOD          RCC_APB2ENR_IOPDEN
+#if defined(GPIOE)
+#define LL_APB2_GRP1_PERIPH_GPIOE          RCC_APB2ENR_IOPEEN
+#endif /*GPIOE*/
+#if defined(GPIOF)
+#define LL_APB2_GRP1_PERIPH_GPIOF          RCC_APB2ENR_IOPFEN
+#endif /*GPIOF*/
+#if defined(GPIOG)
+#define LL_APB2_GRP1_PERIPH_GPIOG          RCC_APB2ENR_IOPGEN
+#endif /*GPIOG*/
+#define LL_APB2_GRP1_PERIPH_SPI1           RCC_APB2ENR_SPI1EN
+#if defined(TIM10)
+#define LL_APB2_GRP1_PERIPH_TIM10          RCC_APB2ENR_TIM10EN
+#endif /*TIM10*/
+#if defined(TIM11)
+#define LL_APB2_GRP1_PERIPH_TIM11          RCC_APB2ENR_TIM11EN
+#endif /*TIM11*/
+#if defined(TIM15)
+#define LL_APB2_GRP1_PERIPH_TIM15          RCC_APB2ENR_TIM15EN
+#endif /*TIM15*/
+#if defined(TIM16)
+#define LL_APB2_GRP1_PERIPH_TIM16          RCC_APB2ENR_TIM16EN
+#endif /*TIM16*/
+#if defined(TIM17)
+#define LL_APB2_GRP1_PERIPH_TIM17          RCC_APB2ENR_TIM17EN
+#endif /*TIM17*/
+#define LL_APB2_GRP1_PERIPH_TIM1           RCC_APB2ENR_TIM1EN
+#if defined(TIM8)
+#define LL_APB2_GRP1_PERIPH_TIM8           RCC_APB2ENR_TIM8EN
+#endif /*TIM8*/
+#if defined(TIM9)
+#define LL_APB2_GRP1_PERIPH_TIM9           RCC_APB2ENR_TIM9EN
+#endif /*TIM9*/
+#define LL_APB2_GRP1_PERIPH_USART1         RCC_APB2ENR_USART1EN
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup BUS_LL_Exported_Functions BUS Exported Functions
+  * @{
+  */
+
+/** @defgroup BUS_LL_EF_AHB1 AHB1
+  * @{
+  */
+
+/**
+  * @brief  Enable AHB1 peripherals clock.
+  * @rmtoll AHBENR       CRCEN         LL_AHB1_GRP1_EnableClock\n
+  *         AHBENR       DMA1EN        LL_AHB1_GRP1_EnableClock\n
+  *         AHBENR       DMA2EN        LL_AHB1_GRP1_EnableClock\n
+  *         AHBENR       ETHMACEN      LL_AHB1_GRP1_EnableClock\n
+  *         AHBENR       ETHMACRXEN    LL_AHB1_GRP1_EnableClock\n
+  *         AHBENR       ETHMACTXEN    LL_AHB1_GRP1_EnableClock\n
+  *         AHBENR       FLITFEN       LL_AHB1_GRP1_EnableClock\n
+  *         AHBENR       FSMCEN        LL_AHB1_GRP1_EnableClock\n
+  *         AHBENR       OTGFSEN       LL_AHB1_GRP1_EnableClock\n
+  *         AHBENR       SDIOEN        LL_AHB1_GRP1_EnableClock\n
+  *         AHBENR       SRAMEN        LL_AHB1_GRP1_EnableClock
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_FLASH
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_FSMC (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_OTGFS (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_SDIO (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_SRAM
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+*/
+__STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)
+{
+  __IO uint32_t tmpreg;
+  SET_BIT(RCC->AHBENR, Periphs);
+  /* Delay after an RCC peripheral clock enabling */
+  tmpreg = READ_BIT(RCC->AHBENR, Periphs);
+  (void)tmpreg;
+}
+
+/**
+  * @brief  Check if AHB1 peripheral clock is enabled or not
+  * @rmtoll AHBENR       CRCEN         LL_AHB1_GRP1_IsEnabledClock\n
+  *         AHBENR       DMA1EN        LL_AHB1_GRP1_IsEnabledClock\n
+  *         AHBENR       DMA2EN        LL_AHB1_GRP1_IsEnabledClock\n
+  *         AHBENR       ETHMACEN      LL_AHB1_GRP1_IsEnabledClock\n
+  *         AHBENR       ETHMACRXEN    LL_AHB1_GRP1_IsEnabledClock\n
+  *         AHBENR       ETHMACTXEN    LL_AHB1_GRP1_IsEnabledClock\n
+  *         AHBENR       FLITFEN       LL_AHB1_GRP1_IsEnabledClock\n
+  *         AHBENR       FSMCEN        LL_AHB1_GRP1_IsEnabledClock\n
+  *         AHBENR       OTGFSEN       LL_AHB1_GRP1_IsEnabledClock\n
+  *         AHBENR       SDIOEN        LL_AHB1_GRP1_IsEnabledClock\n
+  *         AHBENR       SRAMEN        LL_AHB1_GRP1_IsEnabledClock
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_FLASH
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_FSMC (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_OTGFS (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_SDIO (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_SRAM
+  *
+  *         (*) value not defined in all devices.
+  * @retval State of Periphs (1 or 0).
+*/
+__STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)
+{
+  return (READ_BIT(RCC->AHBENR, Periphs) == Periphs);
+}
+
+/**
+  * @brief  Disable AHB1 peripherals clock.
+  * @rmtoll AHBENR       CRCEN         LL_AHB1_GRP1_DisableClock\n
+  *         AHBENR       DMA1EN        LL_AHB1_GRP1_DisableClock\n
+  *         AHBENR       DMA2EN        LL_AHB1_GRP1_DisableClock\n
+  *         AHBENR       ETHMACEN      LL_AHB1_GRP1_DisableClock\n
+  *         AHBENR       ETHMACRXEN    LL_AHB1_GRP1_DisableClock\n
+  *         AHBENR       ETHMACTXEN    LL_AHB1_GRP1_DisableClock\n
+  *         AHBENR       FLITFEN       LL_AHB1_GRP1_DisableClock\n
+  *         AHBENR       FSMCEN        LL_AHB1_GRP1_DisableClock\n
+  *         AHBENR       OTGFSEN       LL_AHB1_GRP1_DisableClock\n
+  *         AHBENR       SDIOEN        LL_AHB1_GRP1_DisableClock\n
+  *         AHBENR       SRAMEN        LL_AHB1_GRP1_DisableClock
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_FLASH
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_FSMC (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_OTGFS (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_SDIO (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_SRAM
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+*/
+__STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs)
+{
+  CLEAR_BIT(RCC->AHBENR, Periphs);
+}
+
+#if defined(RCC_AHBRSTR_SUPPORT)
+/**
+  * @brief  Force AHB1 peripherals reset.
+  * @rmtoll AHBRSTR      ETHMACRST     LL_AHB1_GRP1_ForceReset\n
+  *         AHBRSTR      OTGFSRST      LL_AHB1_GRP1_ForceReset
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_ALL
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_OTGFS (*)
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+*/
+__STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs)
+{
+  SET_BIT(RCC->AHBRSTR, Periphs);
+}
+
+/**
+  * @brief  Release AHB1 peripherals reset.
+  * @rmtoll AHBRSTR      ETHMACRST     LL_AHB1_GRP1_ReleaseReset\n
+  *         AHBRSTR      OTGFSRST      LL_AHB1_GRP1_ReleaseReset
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_ALL
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
+  *         @arg @ref LL_AHB1_GRP1_PERIPH_OTGFS (*)
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+*/
+__STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs)
+{
+  CLEAR_BIT(RCC->AHBRSTR, Periphs);
+}
+#endif /* RCC_AHBRSTR_SUPPORT */
+
+/**
+  * @}
+  */
+
+/** @defgroup BUS_LL_EF_APB1 APB1
+  * @{
+  */
+
+/**
+  * @brief  Enable APB1 peripherals clock.
+  * @rmtoll APB1ENR      BKPEN         LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      CAN1EN        LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      CAN2EN        LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      CECEN         LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      DACEN         LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      I2C1EN        LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      I2C2EN        LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      PWREN         LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      SPI2EN        LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      SPI3EN        LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      TIM12EN       LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      TIM13EN       LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      TIM14EN       LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      TIM2EN        LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      TIM3EN        LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      TIM4EN        LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      TIM5EN        LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      TIM6EN        LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      TIM7EN        LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      UART4EN       LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      UART5EN       LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      USART2EN      LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      USART3EN      LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      USBEN         LL_APB1_GRP1_EnableClock\n
+  *         APB1ENR      WWDGEN        LL_APB1_GRP1_EnableClock
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_APB1_GRP1_PERIPH_BKP
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
+  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
+  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+*/
+__STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)
+{
+  __IO uint32_t tmpreg;
+  SET_BIT(RCC->APB1ENR, Periphs);
+  /* Delay after an RCC peripheral clock enabling */
+  tmpreg = READ_BIT(RCC->APB1ENR, Periphs);
+  (void)tmpreg;
+}
+
+/**
+  * @brief  Check if APB1 peripheral clock is enabled or not
+  * @rmtoll APB1ENR      BKPEN         LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      CAN1EN        LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      CAN2EN        LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      CECEN         LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      DACEN         LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      I2C1EN        LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      I2C2EN        LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      PWREN         LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      SPI2EN        LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      SPI3EN        LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      TIM12EN       LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      TIM13EN       LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      TIM14EN       LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      TIM2EN        LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      TIM3EN        LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      TIM4EN        LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      TIM5EN        LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      TIM6EN        LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      TIM7EN        LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      UART4EN       LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      UART5EN       LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      USART2EN      LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      USART3EN      LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      USBEN         LL_APB1_GRP1_IsEnabledClock\n
+  *         APB1ENR      WWDGEN        LL_APB1_GRP1_IsEnabledClock
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_APB1_GRP1_PERIPH_BKP
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
+  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
+  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
+  *
+  *         (*) value not defined in all devices.
+  * @retval State of Periphs (1 or 0).
+*/
+__STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs)
+{
+  return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs);
+}
+
+/**
+  * @brief  Disable APB1 peripherals clock.
+  * @rmtoll APB1ENR      BKPEN         LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      CAN1EN        LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      CAN2EN        LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      CECEN         LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      DACEN         LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      I2C1EN        LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      I2C2EN        LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      PWREN         LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      SPI2EN        LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      SPI3EN        LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      TIM12EN       LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      TIM13EN       LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      TIM14EN       LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      TIM2EN        LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      TIM3EN        LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      TIM4EN        LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      TIM5EN        LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      TIM6EN        LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      TIM7EN        LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      UART4EN       LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      UART5EN       LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      USART2EN      LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      USART3EN      LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      USBEN         LL_APB1_GRP1_DisableClock\n
+  *         APB1ENR      WWDGEN        LL_APB1_GRP1_DisableClock
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_APB1_GRP1_PERIPH_BKP
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
+  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
+  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+*/
+__STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs)
+{
+  CLEAR_BIT(RCC->APB1ENR, Periphs);
+}
+
+/**
+  * @brief  Force APB1 peripherals reset.
+  * @rmtoll APB1RSTR     BKPRST        LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     CAN1RST       LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     CAN2RST       LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     CECRST        LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     DACRST        LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     I2C1RST       LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     I2C2RST       LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     PWRRST        LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     SPI2RST       LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     SPI3RST       LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     TIM12RST      LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     TIM13RST      LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     TIM14RST      LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     TIM2RST       LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     TIM3RST       LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     TIM4RST       LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     TIM5RST       LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     TIM6RST       LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     TIM7RST       LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     UART4RST      LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     UART5RST      LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     USART2RST     LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     USART3RST     LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     USBRST        LL_APB1_GRP1_ForceReset\n
+  *         APB1RSTR     WWDGRST       LL_APB1_GRP1_ForceReset
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_APB1_GRP1_PERIPH_ALL
+  *         @arg @ref LL_APB1_GRP1_PERIPH_BKP
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
+  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
+  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+*/
+__STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs)
+{
+  SET_BIT(RCC->APB1RSTR, Periphs);
+}
+
+/**
+  * @brief  Release APB1 peripherals reset.
+  * @rmtoll APB1RSTR     BKPRST        LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     CAN1RST       LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     CAN2RST       LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     CECRST        LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     DACRST        LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     I2C1RST       LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     I2C2RST       LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     PWRRST        LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     SPI2RST       LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     SPI3RST       LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     TIM12RST      LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     TIM13RST      LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     TIM14RST      LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     TIM2RST       LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     TIM3RST       LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     TIM4RST       LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     TIM5RST       LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     TIM6RST       LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     TIM7RST       LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     UART4RST      LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     UART5RST      LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     USART2RST     LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     USART3RST     LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     USBRST        LL_APB1_GRP1_ReleaseReset\n
+  *         APB1RSTR     WWDGRST       LL_APB1_GRP1_ReleaseReset
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_APB1_GRP1_PERIPH_ALL
+  *         @arg @ref LL_APB1_GRP1_PERIPH_BKP
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
+  *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
+  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
+  *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+*/
+__STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs)
+{
+  CLEAR_BIT(RCC->APB1RSTR, Periphs);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup BUS_LL_EF_APB2 APB2
+  * @{
+  */
+
+/**
+  * @brief  Enable APB2 peripherals clock.
+  * @rmtoll APB2ENR      ADC1EN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      ADC2EN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      ADC3EN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      AFIOEN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      IOPAEN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      IOPBEN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      IOPCEN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      IOPDEN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      IOPEEN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      IOPFEN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      IOPGEN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      SPI1EN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      TIM10EN       LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      TIM11EN       LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      TIM15EN       LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      TIM16EN       LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      TIM17EN       LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      TIM1EN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      TIM8EN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      TIM9EN        LL_APB2_GRP1_EnableClock\n
+  *         APB2ENR      USART1EN      LL_APB2_GRP1_EnableClock
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_AFIO
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOA
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOB
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOC
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOD
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOE (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOF (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOG (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM11 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM15 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM16 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM17 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM9 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_USART1
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+*/
+__STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs)
+{
+  __IO uint32_t tmpreg;
+  SET_BIT(RCC->APB2ENR, Periphs);
+  /* Delay after an RCC peripheral clock enabling */
+  tmpreg = READ_BIT(RCC->APB2ENR, Periphs);
+  (void)tmpreg;
+}
+
+/**
+  * @brief  Check if APB2 peripheral clock is enabled or not
+  * @rmtoll APB2ENR      ADC1EN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      ADC2EN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      ADC3EN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      AFIOEN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      IOPAEN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      IOPBEN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      IOPCEN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      IOPDEN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      IOPEEN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      IOPFEN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      IOPGEN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      SPI1EN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      TIM10EN       LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      TIM11EN       LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      TIM15EN       LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      TIM16EN       LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      TIM17EN       LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      TIM1EN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      TIM8EN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      TIM9EN        LL_APB2_GRP1_IsEnabledClock\n
+  *         APB2ENR      USART1EN      LL_APB2_GRP1_IsEnabledClock
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_AFIO
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOA
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOB
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOC
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOD
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOE (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOF (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOG (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM11 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM15 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM16 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM17 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM9 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_USART1
+  *
+  *         (*) value not defined in all devices.
+  * @retval State of Periphs (1 or 0).
+*/
+__STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs)
+{
+  return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs);
+}
+
+/**
+  * @brief  Disable APB2 peripherals clock.
+  * @rmtoll APB2ENR      ADC1EN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      ADC2EN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      ADC3EN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      AFIOEN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      IOPAEN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      IOPBEN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      IOPCEN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      IOPDEN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      IOPEEN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      IOPFEN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      IOPGEN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      SPI1EN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      TIM10EN       LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      TIM11EN       LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      TIM15EN       LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      TIM16EN       LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      TIM17EN       LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      TIM1EN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      TIM8EN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      TIM9EN        LL_APB2_GRP1_DisableClock\n
+  *         APB2ENR      USART1EN      LL_APB2_GRP1_DisableClock
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_AFIO
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOA
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOB
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOC
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOD
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOE (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOF (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOG (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM11 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM15 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM16 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM17 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM9 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_USART1
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+*/
+__STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs)
+{
+  CLEAR_BIT(RCC->APB2ENR, Periphs);
+}
+
+/**
+  * @brief  Force APB2 peripherals reset.
+  * @rmtoll APB2RSTR     ADC1RST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     ADC2RST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     ADC3RST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     AFIORST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     IOPARST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     IOPBRST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     IOPCRST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     IOPDRST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     IOPERST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     IOPFRST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     IOPGRST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     SPI1RST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     TIM10RST      LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     TIM11RST      LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     TIM15RST      LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     TIM16RST      LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     TIM17RST      LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     TIM1RST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     TIM8RST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     TIM9RST       LL_APB2_GRP1_ForceReset\n
+  *         APB2RSTR     USART1RST     LL_APB2_GRP1_ForceReset
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ALL
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_AFIO
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOA
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOB
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOC
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOD
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOE (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOF (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOG (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM11 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM15 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM16 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM17 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM9 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_USART1
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+*/
+__STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs)
+{
+  SET_BIT(RCC->APB2RSTR, Periphs);
+}
+
+/**
+  * @brief  Release APB2 peripherals reset.
+  * @rmtoll APB2RSTR     ADC1RST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     ADC2RST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     ADC3RST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     AFIORST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     IOPARST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     IOPBRST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     IOPCRST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     IOPDRST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     IOPERST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     IOPFRST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     IOPGRST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     SPI1RST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     TIM10RST      LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     TIM11RST      LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     TIM15RST      LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     TIM16RST      LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     TIM17RST      LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     TIM1RST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     TIM8RST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     TIM9RST       LL_APB2_GRP1_ReleaseReset\n
+  *         APB2RSTR     USART1RST     LL_APB2_GRP1_ReleaseReset
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ALL
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_AFIO
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOA
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOB
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOC
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOD
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOE (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOF (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_GPIOG (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM11 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM15 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM16 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM17 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM1
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_TIM9 (*)
+  *         @arg @ref LL_APB2_GRP1_PERIPH_USART1
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+*/
+__STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs)
+{
+  CLEAR_BIT(RCC->APB2RSTR, Periphs);
+}
+
+/**
+  * @}
+  */
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* defined(RCC) */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F1xx_LL_BUS_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_cortex.h b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_cortex.h
new file mode 100644
index 0000000..a1444a8
--- /dev/null
+++ b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_cortex.h
@@ -0,0 +1,640 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_ll_cortex.h
+  * @author  MCD Application Team
+  * @brief   Header file of CORTEX LL module.
+  @verbatim
+  ==============================================================================
+                     ##### How to use this driver #####
+  ==============================================================================
+    [..]
+    The LL CORTEX driver contains a set of generic APIs that can be
+    used by user:
+      (+) SYSTICK configuration used by @ref LL_mDelay and @ref LL_Init1msTick
+          functions
+      (+) Low power mode configuration (SCB register of Cortex-MCU)
+      (+) MPU API to configure and enable regions
+          (MPU services provided only on some devices)
+      (+) API to access to MCU info (CPUID register)
+      (+) API to enable fault handler (SHCSR accesses)
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_LL_CORTEX_H
+#define __STM32F1xx_LL_CORTEX_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx.h"
+
+/** @addtogroup STM32F1xx_LL_Driver
+  * @{
+  */
+
+/** @defgroup CORTEX_LL CORTEX
+  * @{
+  */
+
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+/* Private constants ---------------------------------------------------------*/
+
+/* Private macros ------------------------------------------------------------*/
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup CORTEX_LL_Exported_Constants CORTEX Exported Constants
+  * @{
+  */
+
+/** @defgroup CORTEX_LL_EC_CLKSOURCE_HCLK SYSTICK Clock Source
+  * @{
+  */
+#define LL_SYSTICK_CLKSOURCE_HCLK_DIV8     0x00000000U                 /*!< AHB clock divided by 8 selected as SysTick clock source.*/
+#define LL_SYSTICK_CLKSOURCE_HCLK          SysTick_CTRL_CLKSOURCE_Msk  /*!< AHB clock selected as SysTick clock source. */
+/**
+  * @}
+  */
+
+/** @defgroup CORTEX_LL_EC_FAULT Handler Fault type
+  * @{
+  */
+#define LL_HANDLER_FAULT_USG               SCB_SHCSR_USGFAULTENA_Msk              /*!< Usage fault */
+#define LL_HANDLER_FAULT_BUS               SCB_SHCSR_BUSFAULTENA_Msk              /*!< Bus fault */
+#define LL_HANDLER_FAULT_MEM               SCB_SHCSR_MEMFAULTENA_Msk              /*!< Memory management fault */
+/**
+  * @}
+  */
+
+#if __MPU_PRESENT
+
+/** @defgroup CORTEX_LL_EC_CTRL_HFNMI_PRIVDEF MPU Control
+  * @{
+  */
+#define LL_MPU_CTRL_HFNMI_PRIVDEF_NONE     0x00000000U                                       /*!< Disable NMI and privileged SW access */
+#define LL_MPU_CTRL_HARDFAULT_NMI          MPU_CTRL_HFNMIENA_Msk                             /*!< Enables the operation of MPU during hard fault, NMI, and FAULTMASK handlers */
+#define LL_MPU_CTRL_PRIVILEGED_DEFAULT     MPU_CTRL_PRIVDEFENA_Msk                           /*!< Enable privileged software access to default memory map */
+#define LL_MPU_CTRL_HFNMI_PRIVDEF          (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk) /*!< Enable NMI and privileged SW access */
+/**
+  * @}
+  */
+
+/** @defgroup CORTEX_LL_EC_REGION MPU Region Number
+  * @{
+  */
+#define LL_MPU_REGION_NUMBER0              0x00U /*!< REGION Number 0 */
+#define LL_MPU_REGION_NUMBER1              0x01U /*!< REGION Number 1 */
+#define LL_MPU_REGION_NUMBER2              0x02U /*!< REGION Number 2 */
+#define LL_MPU_REGION_NUMBER3              0x03U /*!< REGION Number 3 */
+#define LL_MPU_REGION_NUMBER4              0x04U /*!< REGION Number 4 */
+#define LL_MPU_REGION_NUMBER5              0x05U /*!< REGION Number 5 */
+#define LL_MPU_REGION_NUMBER6              0x06U /*!< REGION Number 6 */
+#define LL_MPU_REGION_NUMBER7              0x07U /*!< REGION Number 7 */
+/**
+  * @}
+  */
+
+/** @defgroup CORTEX_LL_EC_REGION_SIZE MPU Region Size
+  * @{
+  */
+#define LL_MPU_REGION_SIZE_32B             (0x04U << MPU_RASR_SIZE_Pos) /*!< 32B Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_64B             (0x05U << MPU_RASR_SIZE_Pos) /*!< 64B Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_128B            (0x06U << MPU_RASR_SIZE_Pos) /*!< 128B Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_256B            (0x07U << MPU_RASR_SIZE_Pos) /*!< 256B Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_512B            (0x08U << MPU_RASR_SIZE_Pos) /*!< 512B Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_1KB             (0x09U << MPU_RASR_SIZE_Pos) /*!< 1KB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_2KB             (0x0AU << MPU_RASR_SIZE_Pos) /*!< 2KB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_4KB             (0x0BU << MPU_RASR_SIZE_Pos) /*!< 4KB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_8KB             (0x0CU << MPU_RASR_SIZE_Pos) /*!< 8KB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_16KB            (0x0DU << MPU_RASR_SIZE_Pos) /*!< 16KB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_32KB            (0x0EU << MPU_RASR_SIZE_Pos) /*!< 32KB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_64KB            (0x0FU << MPU_RASR_SIZE_Pos) /*!< 64KB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_128KB           (0x10U << MPU_RASR_SIZE_Pos) /*!< 128KB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_256KB           (0x11U << MPU_RASR_SIZE_Pos) /*!< 256KB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_512KB           (0x12U << MPU_RASR_SIZE_Pos) /*!< 512KB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_1MB             (0x13U << MPU_RASR_SIZE_Pos) /*!< 1MB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_2MB             (0x14U << MPU_RASR_SIZE_Pos) /*!< 2MB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_4MB             (0x15U << MPU_RASR_SIZE_Pos) /*!< 4MB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_8MB             (0x16U << MPU_RASR_SIZE_Pos) /*!< 8MB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_16MB            (0x17U << MPU_RASR_SIZE_Pos) /*!< 16MB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_32MB            (0x18U << MPU_RASR_SIZE_Pos) /*!< 32MB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_64MB            (0x19U << MPU_RASR_SIZE_Pos) /*!< 64MB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_128MB           (0x1AU << MPU_RASR_SIZE_Pos) /*!< 128MB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_256MB           (0x1BU << MPU_RASR_SIZE_Pos) /*!< 256MB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_512MB           (0x1CU << MPU_RASR_SIZE_Pos) /*!< 512MB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_1GB             (0x1DU << MPU_RASR_SIZE_Pos) /*!< 1GB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_2GB             (0x1EU << MPU_RASR_SIZE_Pos) /*!< 2GB Size of the MPU protection region */
+#define LL_MPU_REGION_SIZE_4GB             (0x1FU << MPU_RASR_SIZE_Pos) /*!< 4GB Size of the MPU protection region */
+/**
+  * @}
+  */
+
+/** @defgroup CORTEX_LL_EC_REGION_PRIVILEDGES MPU Region Privileges
+  * @{
+  */
+#define LL_MPU_REGION_NO_ACCESS            (0x00U << MPU_RASR_AP_Pos) /*!< No access*/
+#define LL_MPU_REGION_PRIV_RW              (0x01U << MPU_RASR_AP_Pos) /*!< RW privileged (privileged access only)*/
+#define LL_MPU_REGION_PRIV_RW_URO          (0x02U << MPU_RASR_AP_Pos) /*!< RW privileged - RO user (Write in a user program generates a fault) */
+#define LL_MPU_REGION_FULL_ACCESS          (0x03U << MPU_RASR_AP_Pos) /*!< RW privileged & user (Full access) */
+#define LL_MPU_REGION_PRIV_RO              (0x05U << MPU_RASR_AP_Pos) /*!< RO privileged (privileged read only)*/
+#define LL_MPU_REGION_PRIV_RO_URO          (0x06U << MPU_RASR_AP_Pos) /*!< RO privileged & user (read only) */
+/**
+  * @}
+  */
+
+/** @defgroup CORTEX_LL_EC_TEX MPU TEX Level
+  * @{
+  */
+#define LL_MPU_TEX_LEVEL0                  (0x00U << MPU_RASR_TEX_Pos) /*!< b000 for TEX bits */
+#define LL_MPU_TEX_LEVEL1                  (0x01U << MPU_RASR_TEX_Pos) /*!< b001 for TEX bits */
+#define LL_MPU_TEX_LEVEL2                  (0x02U << MPU_RASR_TEX_Pos) /*!< b010 for TEX bits */
+#define LL_MPU_TEX_LEVEL4                  (0x04U << MPU_RASR_TEX_Pos) /*!< b100 for TEX bits */
+/**
+  * @}
+  */
+
+/** @defgroup CORTEX_LL_EC_INSTRUCTION_ACCESS MPU Instruction Access
+  * @{
+  */
+#define LL_MPU_INSTRUCTION_ACCESS_ENABLE   0x00U            /*!< Instruction fetches enabled */
+#define LL_MPU_INSTRUCTION_ACCESS_DISABLE  MPU_RASR_XN_Msk  /*!< Instruction fetches disabled*/
+/**
+  * @}
+  */
+
+/** @defgroup CORTEX_LL_EC_SHAREABLE_ACCESS MPU Shareable Access
+  * @{
+  */
+#define LL_MPU_ACCESS_SHAREABLE            MPU_RASR_S_Msk   /*!< Shareable memory attribute */
+#define LL_MPU_ACCESS_NOT_SHAREABLE        0x00U            /*!< Not Shareable memory attribute */
+/**
+  * @}
+  */
+
+/** @defgroup CORTEX_LL_EC_CACHEABLE_ACCESS MPU Cacheable Access
+  * @{
+  */
+#define LL_MPU_ACCESS_CACHEABLE            MPU_RASR_C_Msk   /*!< Cacheable memory attribute */
+#define LL_MPU_ACCESS_NOT_CACHEABLE        0x00U            /*!< Not Cacheable memory attribute */
+/**
+  * @}
+  */
+
+/** @defgroup CORTEX_LL_EC_BUFFERABLE_ACCESS MPU Bufferable Access
+  * @{
+  */
+#define LL_MPU_ACCESS_BUFFERABLE           MPU_RASR_B_Msk   /*!< Bufferable memory attribute */
+#define LL_MPU_ACCESS_NOT_BUFFERABLE       0x00U            /*!< Not Bufferable memory attribute */
+/**
+  * @}
+  */
+#endif /* __MPU_PRESENT */
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup CORTEX_LL_Exported_Functions CORTEX Exported Functions
+  * @{
+  */
+
+/** @defgroup CORTEX_LL_EF_SYSTICK SYSTICK
+  * @{
+  */
+
+/**
+  * @brief  This function checks if the Systick counter flag is active or not.
+  * @note   It can be used in timeout function on application side.
+  * @rmtoll STK_CTRL     COUNTFLAG     LL_SYSTICK_IsActiveCounterFlag
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SYSTICK_IsActiveCounterFlag(void)
+{
+  return ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == (SysTick_CTRL_COUNTFLAG_Msk));
+}
+
+/**
+  * @brief  Configures the SysTick clock source
+  * @rmtoll STK_CTRL     CLKSOURCE     LL_SYSTICK_SetClkSource
+  * @param  Source This parameter can be one of the following values:
+  *         @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8
+  *         @arg @ref LL_SYSTICK_CLKSOURCE_HCLK
+  * @retval None
+  */
+__STATIC_INLINE void LL_SYSTICK_SetClkSource(uint32_t Source)
+{
+  if (Source == LL_SYSTICK_CLKSOURCE_HCLK)
+  {
+    SET_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
+  }
+  else
+  {
+    CLEAR_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
+  }
+}
+
+/**
+  * @brief  Get the SysTick clock source
+  * @rmtoll STK_CTRL     CLKSOURCE     LL_SYSTICK_GetClkSource
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_SYSTICK_CLKSOURCE_HCLK_DIV8
+  *         @arg @ref LL_SYSTICK_CLKSOURCE_HCLK
+  */
+__STATIC_INLINE uint32_t LL_SYSTICK_GetClkSource(void)
+{
+  return READ_BIT(SysTick->CTRL, LL_SYSTICK_CLKSOURCE_HCLK);
+}
+
+/**
+  * @brief  Enable SysTick exception request
+  * @rmtoll STK_CTRL     TICKINT       LL_SYSTICK_EnableIT
+  * @retval None
+  */
+__STATIC_INLINE void LL_SYSTICK_EnableIT(void)
+{
+  SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk);
+}
+
+/**
+  * @brief  Disable SysTick exception request
+  * @rmtoll STK_CTRL     TICKINT       LL_SYSTICK_DisableIT
+  * @retval None
+  */
+__STATIC_INLINE void LL_SYSTICK_DisableIT(void)
+{
+  CLEAR_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk);
+}
+
+/**
+  * @brief  Checks if the SYSTICK interrupt is enabled or disabled.
+  * @rmtoll STK_CTRL     TICKINT       LL_SYSTICK_IsEnabledIT
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SYSTICK_IsEnabledIT(void)
+{
+  return (READ_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk) == (SysTick_CTRL_TICKINT_Msk));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup CORTEX_LL_EF_LOW_POWER_MODE LOW POWER MODE
+  * @{
+  */
+
+/**
+  * @brief  Processor uses sleep as its low power mode
+  * @rmtoll SCB_SCR      SLEEPDEEP     LL_LPM_EnableSleep
+  * @retval None
+  */
+__STATIC_INLINE void LL_LPM_EnableSleep(void)
+{
+  /* Clear SLEEPDEEP bit of Cortex System Control Register */
+  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
+}
+
+/**
+  * @brief  Processor uses deep sleep as its low power mode
+  * @rmtoll SCB_SCR      SLEEPDEEP     LL_LPM_EnableDeepSleep
+  * @retval None
+  */
+__STATIC_INLINE void LL_LPM_EnableDeepSleep(void)
+{
+  /* Set SLEEPDEEP bit of Cortex System Control Register */
+  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
+}
+
+/**
+  * @brief  Configures sleep-on-exit when returning from Handler mode to Thread mode.
+  * @note   Setting this bit to 1 enables an interrupt-driven application to avoid returning to an
+  *         empty main application.
+  * @rmtoll SCB_SCR      SLEEPONEXIT   LL_LPM_EnableSleepOnExit
+  * @retval None
+  */
+__STATIC_INLINE void LL_LPM_EnableSleepOnExit(void)
+{
+  /* Set SLEEPONEXIT bit of Cortex System Control Register */
+  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
+}
+
+/**
+  * @brief  Do not sleep when returning to Thread mode.
+  * @rmtoll SCB_SCR      SLEEPONEXIT   LL_LPM_DisableSleepOnExit
+  * @retval None
+  */
+__STATIC_INLINE void LL_LPM_DisableSleepOnExit(void)
+{
+  /* Clear SLEEPONEXIT bit of Cortex System Control Register */
+  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
+}
+
+/**
+  * @brief  Enabled events and all interrupts, including disabled interrupts, can wakeup the
+  *         processor.
+  * @rmtoll SCB_SCR      SEVEONPEND    LL_LPM_EnableEventOnPend
+  * @retval None
+  */
+__STATIC_INLINE void LL_LPM_EnableEventOnPend(void)
+{
+  /* Set SEVEONPEND bit of Cortex System Control Register */
+  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
+}
+
+/**
+  * @brief  Only enabled interrupts or events can wakeup the processor, disabled interrupts are
+  *         excluded
+  * @rmtoll SCB_SCR      SEVEONPEND    LL_LPM_DisableEventOnPend
+  * @retval None
+  */
+__STATIC_INLINE void LL_LPM_DisableEventOnPend(void)
+{
+  /* Clear SEVEONPEND bit of Cortex System Control Register */
+  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup CORTEX_LL_EF_HANDLER HANDLER
+  * @{
+  */
+
+/**
+  * @brief  Enable a fault in System handler control register (SHCSR)
+  * @rmtoll SCB_SHCSR    MEMFAULTENA   LL_HANDLER_EnableFault
+  * @param  Fault This parameter can be a combination of the following values:
+  *         @arg @ref LL_HANDLER_FAULT_USG
+  *         @arg @ref LL_HANDLER_FAULT_BUS
+  *         @arg @ref LL_HANDLER_FAULT_MEM
+  * @retval None
+  */
+__STATIC_INLINE void LL_HANDLER_EnableFault(uint32_t Fault)
+{
+  /* Enable the system handler fault */
+  SET_BIT(SCB->SHCSR, Fault);
+}
+
+/**
+  * @brief  Disable a fault in System handler control register (SHCSR)
+  * @rmtoll SCB_SHCSR    MEMFAULTENA   LL_HANDLER_DisableFault
+  * @param  Fault This parameter can be a combination of the following values:
+  *         @arg @ref LL_HANDLER_FAULT_USG
+  *         @arg @ref LL_HANDLER_FAULT_BUS
+  *         @arg @ref LL_HANDLER_FAULT_MEM
+  * @retval None
+  */
+__STATIC_INLINE void LL_HANDLER_DisableFault(uint32_t Fault)
+{
+  /* Disable the system handler fault */
+  CLEAR_BIT(SCB->SHCSR, Fault);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup CORTEX_LL_EF_MCU_INFO MCU INFO
+  * @{
+  */
+
+/**
+  * @brief  Get Implementer code
+  * @rmtoll SCB_CPUID    IMPLEMENTER   LL_CPUID_GetImplementer
+  * @retval Value should be equal to 0x41 for ARM
+  */
+__STATIC_INLINE uint32_t LL_CPUID_GetImplementer(void)
+{
+  return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_IMPLEMENTER_Msk) >> SCB_CPUID_IMPLEMENTER_Pos);
+}
+
+/**
+  * @brief  Get Variant number (The r value in the rnpn product revision identifier)
+  * @rmtoll SCB_CPUID    VARIANT       LL_CPUID_GetVariant
+  * @retval Value between 0 and 255 (0x1: revision 1, 0x2: revision 2)
+  */
+__STATIC_INLINE uint32_t LL_CPUID_GetVariant(void)
+{
+  return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_VARIANT_Msk) >> SCB_CPUID_VARIANT_Pos);
+}
+
+/**
+  * @brief  Get Constant number
+  * @rmtoll SCB_CPUID    ARCHITECTURE  LL_CPUID_GetConstant
+  * @retval Value should be equal to 0xF for Cortex-M3 devices
+  */
+__STATIC_INLINE uint32_t LL_CPUID_GetConstant(void)
+{
+  return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_ARCHITECTURE_Msk) >> SCB_CPUID_ARCHITECTURE_Pos);
+}
+
+/**
+  * @brief  Get Part number
+  * @rmtoll SCB_CPUID    PARTNO        LL_CPUID_GetParNo
+  * @retval Value should be equal to 0xC23 for Cortex-M3
+  */
+__STATIC_INLINE uint32_t LL_CPUID_GetParNo(void)
+{
+  return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_PARTNO_Msk) >> SCB_CPUID_PARTNO_Pos);
+}
+
+/**
+  * @brief  Get Revision number (The p value in the rnpn product revision identifier, indicates patch release)
+  * @rmtoll SCB_CPUID    REVISION      LL_CPUID_GetRevision
+  * @retval Value between 0 and 255 (0x0: patch 0, 0x1: patch 1)
+  */
+__STATIC_INLINE uint32_t LL_CPUID_GetRevision(void)
+{
+  return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_REVISION_Msk) >> SCB_CPUID_REVISION_Pos);
+}
+
+/**
+  * @}
+  */
+
+#if __MPU_PRESENT
+/** @defgroup CORTEX_LL_EF_MPU MPU
+  * @{
+  */
+
+/**
+  * @brief  Enable MPU with input options
+  * @rmtoll MPU_CTRL     ENABLE        LL_MPU_Enable
+  * @param  Options This parameter can be one of the following values:
+  *         @arg @ref LL_MPU_CTRL_HFNMI_PRIVDEF_NONE
+  *         @arg @ref LL_MPU_CTRL_HARDFAULT_NMI
+  *         @arg @ref LL_MPU_CTRL_PRIVILEGED_DEFAULT
+  *         @arg @ref LL_MPU_CTRL_HFNMI_PRIVDEF
+  * @retval None
+  */
+__STATIC_INLINE void LL_MPU_Enable(uint32_t Options)
+{
+  /* Enable the MPU*/
+  WRITE_REG(MPU->CTRL, (MPU_CTRL_ENABLE_Msk | Options));
+  /* Ensure MPU settings take effects */
+  __DSB();
+  /* Sequence instruction fetches using update settings */
+  __ISB();
+}
+
+/**
+  * @brief  Disable MPU
+  * @rmtoll MPU_CTRL     ENABLE        LL_MPU_Disable
+  * @retval None
+  */
+__STATIC_INLINE void LL_MPU_Disable(void)
+{
+  /* Make sure outstanding transfers are done */
+  __DMB();
+  /* Disable MPU*/
+  WRITE_REG(MPU->CTRL, 0U);
+}
+
+/**
+  * @brief  Check if MPU is enabled or not
+  * @rmtoll MPU_CTRL     ENABLE        LL_MPU_IsEnabled
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_MPU_IsEnabled(void)
+{
+  return (READ_BIT(MPU->CTRL, MPU_CTRL_ENABLE_Msk) == (MPU_CTRL_ENABLE_Msk));
+}
+
+/**
+  * @brief  Enable a MPU region
+  * @rmtoll MPU_RASR     ENABLE        LL_MPU_EnableRegion
+  * @param  Region This parameter can be one of the following values:
+  *         @arg @ref LL_MPU_REGION_NUMBER0
+  *         @arg @ref LL_MPU_REGION_NUMBER1
+  *         @arg @ref LL_MPU_REGION_NUMBER2
+  *         @arg @ref LL_MPU_REGION_NUMBER3
+  *         @arg @ref LL_MPU_REGION_NUMBER4
+  *         @arg @ref LL_MPU_REGION_NUMBER5
+  *         @arg @ref LL_MPU_REGION_NUMBER6
+  *         @arg @ref LL_MPU_REGION_NUMBER7
+  * @retval None
+  */
+__STATIC_INLINE void LL_MPU_EnableRegion(uint32_t Region)
+{
+  /* Set Region number */
+  WRITE_REG(MPU->RNR, Region);
+  /* Enable the MPU region */
+  SET_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
+}
+
+/**
+  * @brief  Configure and enable a region
+  * @rmtoll MPU_RNR      REGION        LL_MPU_ConfigRegion\n
+  *         MPU_RBAR     REGION        LL_MPU_ConfigRegion\n
+  *         MPU_RBAR     ADDR          LL_MPU_ConfigRegion\n
+  *         MPU_RASR     XN            LL_MPU_ConfigRegion\n
+  *         MPU_RASR     AP            LL_MPU_ConfigRegion\n
+  *         MPU_RASR     S             LL_MPU_ConfigRegion\n
+  *         MPU_RASR     C             LL_MPU_ConfigRegion\n
+  *         MPU_RASR     B             LL_MPU_ConfigRegion\n
+  *         MPU_RASR     SIZE          LL_MPU_ConfigRegion
+  * @param  Region This parameter can be one of the following values:
+  *         @arg @ref LL_MPU_REGION_NUMBER0
+  *         @arg @ref LL_MPU_REGION_NUMBER1
+  *         @arg @ref LL_MPU_REGION_NUMBER2
+  *         @arg @ref LL_MPU_REGION_NUMBER3
+  *         @arg @ref LL_MPU_REGION_NUMBER4
+  *         @arg @ref LL_MPU_REGION_NUMBER5
+  *         @arg @ref LL_MPU_REGION_NUMBER6
+  *         @arg @ref LL_MPU_REGION_NUMBER7
+  * @param  Address Value of region base address
+  * @param  SubRegionDisable Sub-region disable value between Min_Data = 0x00 and Max_Data = 0xFF
+  * @param  Attributes This parameter can be a combination of the following values:
+  *         @arg @ref LL_MPU_REGION_SIZE_32B or @ref LL_MPU_REGION_SIZE_64B or @ref LL_MPU_REGION_SIZE_128B or @ref LL_MPU_REGION_SIZE_256B or @ref LL_MPU_REGION_SIZE_512B
+  *           or @ref LL_MPU_REGION_SIZE_1KB or @ref LL_MPU_REGION_SIZE_2KB or @ref LL_MPU_REGION_SIZE_4KB or @ref LL_MPU_REGION_SIZE_8KB or @ref LL_MPU_REGION_SIZE_16KB
+  *           or @ref LL_MPU_REGION_SIZE_32KB or @ref LL_MPU_REGION_SIZE_64KB or @ref LL_MPU_REGION_SIZE_128KB or @ref LL_MPU_REGION_SIZE_256KB or @ref LL_MPU_REGION_SIZE_512KB
+  *           or @ref LL_MPU_REGION_SIZE_1MB or @ref LL_MPU_REGION_SIZE_2MB or @ref LL_MPU_REGION_SIZE_4MB or @ref LL_MPU_REGION_SIZE_8MB or @ref LL_MPU_REGION_SIZE_16MB
+  *           or @ref LL_MPU_REGION_SIZE_32MB or @ref LL_MPU_REGION_SIZE_64MB or @ref LL_MPU_REGION_SIZE_128MB or @ref LL_MPU_REGION_SIZE_256MB or @ref LL_MPU_REGION_SIZE_512MB
+  *           or @ref LL_MPU_REGION_SIZE_1GB or @ref LL_MPU_REGION_SIZE_2GB or @ref LL_MPU_REGION_SIZE_4GB
+  *         @arg @ref LL_MPU_REGION_NO_ACCESS or @ref LL_MPU_REGION_PRIV_RW or @ref LL_MPU_REGION_PRIV_RW_URO or @ref LL_MPU_REGION_FULL_ACCESS
+  *           or @ref LL_MPU_REGION_PRIV_RO or @ref LL_MPU_REGION_PRIV_RO_URO
+  *         @arg @ref LL_MPU_TEX_LEVEL0 or @ref LL_MPU_TEX_LEVEL1 or @ref LL_MPU_TEX_LEVEL2 or @ref LL_MPU_TEX_LEVEL4
+  *         @arg @ref LL_MPU_INSTRUCTION_ACCESS_ENABLE or  @ref LL_MPU_INSTRUCTION_ACCESS_DISABLE
+  *         @arg @ref LL_MPU_ACCESS_SHAREABLE or @ref LL_MPU_ACCESS_NOT_SHAREABLE
+  *         @arg @ref LL_MPU_ACCESS_CACHEABLE or @ref LL_MPU_ACCESS_NOT_CACHEABLE
+  *         @arg @ref LL_MPU_ACCESS_BUFFERABLE or @ref LL_MPU_ACCESS_NOT_BUFFERABLE
+  * @retval None
+  */
+__STATIC_INLINE void LL_MPU_ConfigRegion(uint32_t Region, uint32_t SubRegionDisable, uint32_t Address, uint32_t Attributes)
+{
+  /* Set Region number */
+  WRITE_REG(MPU->RNR, Region);
+  /* Set base address */
+  WRITE_REG(MPU->RBAR, (Address & 0xFFFFFFE0U));
+  /* Configure MPU */
+  WRITE_REG(MPU->RASR, (MPU_RASR_ENABLE_Msk | Attributes | SubRegionDisable << MPU_RASR_SRD_Pos));
+}
+
+/**
+  * @brief  Disable a region
+  * @rmtoll MPU_RNR      REGION        LL_MPU_DisableRegion\n
+  *         MPU_RASR     ENABLE        LL_MPU_DisableRegion
+  * @param  Region This parameter can be one of the following values:
+  *         @arg @ref LL_MPU_REGION_NUMBER0
+  *         @arg @ref LL_MPU_REGION_NUMBER1
+  *         @arg @ref LL_MPU_REGION_NUMBER2
+  *         @arg @ref LL_MPU_REGION_NUMBER3
+  *         @arg @ref LL_MPU_REGION_NUMBER4
+  *         @arg @ref LL_MPU_REGION_NUMBER5
+  *         @arg @ref LL_MPU_REGION_NUMBER6
+  *         @arg @ref LL_MPU_REGION_NUMBER7
+  * @retval None
+  */
+__STATIC_INLINE void LL_MPU_DisableRegion(uint32_t Region)
+{
+  /* Set Region number */
+  WRITE_REG(MPU->RNR, Region);
+  /* Disable the MPU region */
+  CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
+}
+
+/**
+  * @}
+  */
+
+#endif /* __MPU_PRESENT */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F1xx_LL_CORTEX_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h
new file mode 100644
index 0000000..e205066
--- /dev/null
+++ b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h
@@ -0,0 +1,1960 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_ll_dma.h
+  * @author  MCD Application Team
+  * @brief   Header file of DMA LL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_LL_DMA_H
+#define __STM32F1xx_LL_DMA_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx.h"
+
+/** @addtogroup STM32F1xx_LL_Driver
+  * @{
+  */
+
+#if defined (DMA1) || defined (DMA2)
+
+/** @defgroup DMA_LL DMA
+  * @{
+  */
+
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/** @defgroup DMA_LL_Private_Variables DMA Private Variables
+  * @{
+  */
+/* Array used to get the DMA channel register offset versus channel index LL_DMA_CHANNEL_x */
+static const uint8_t CHANNEL_OFFSET_TAB[] =
+{
+  (uint8_t)(DMA1_Channel1_BASE - DMA1_BASE),
+  (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
+  (uint8_t)(DMA1_Channel3_BASE - DMA1_BASE),
+  (uint8_t)(DMA1_Channel4_BASE - DMA1_BASE),
+  (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
+  (uint8_t)(DMA1_Channel6_BASE - DMA1_BASE),
+  (uint8_t)(DMA1_Channel7_BASE - DMA1_BASE)
+};
+/**
+  * @}
+  */
+/* Private constants ---------------------------------------------------------*/
+/* Private macros ------------------------------------------------------------*/
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup DMA_LL_Private_Macros DMA Private Macros
+  * @{
+  */
+/**
+  * @}
+  */
+#endif /*USE_FULL_LL_DRIVER*/
+
+/* Exported types ------------------------------------------------------------*/
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup DMA_LL_ES_INIT DMA Exported Init structure
+  * @{
+  */
+typedef struct
+{
+  uint32_t PeriphOrM2MSrcAddress;  /*!< Specifies the peripheral base address for DMA transfer
+                                        or as Source base address in case of memory to memory transfer direction.
+
+                                        This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */
+
+  uint32_t MemoryOrM2MDstAddress;  /*!< Specifies the memory base address for DMA transfer
+                                        or as Destination base address in case of memory to memory transfer direction.
+
+                                        This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */
+
+  uint32_t Direction;              /*!< Specifies if the data will be transferred from memory to peripheral,
+                                        from memory to memory or from peripheral to memory.
+                                        This parameter can be a value of @ref DMA_LL_EC_DIRECTION
+
+                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetDataTransferDirection(). */
+
+  uint32_t Mode;                   /*!< Specifies the normal or circular operation mode.
+                                        This parameter can be a value of @ref DMA_LL_EC_MODE
+                                        @note: The circular buffer mode cannot be used if the memory to memory
+                                               data transfer direction is configured on the selected Channel
+
+                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetMode(). */
+
+  uint32_t PeriphOrM2MSrcIncMode;  /*!< Specifies whether the Peripheral address or Source address in case of memory to memory transfer direction
+                                        is incremented or not.
+                                        This parameter can be a value of @ref DMA_LL_EC_PERIPH
+
+                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphIncMode(). */
+
+  uint32_t MemoryOrM2MDstIncMode;  /*!< Specifies whether the Memory address or Destination address in case of memory to memory transfer direction
+                                        is incremented or not.
+                                        This parameter can be a value of @ref DMA_LL_EC_MEMORY
+
+                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemoryIncMode(). */
+
+  uint32_t PeriphOrM2MSrcDataSize; /*!< Specifies the Peripheral data size alignment or Source data size alignment (byte, half word, word)
+                                        in case of memory to memory transfer direction.
+                                        This parameter can be a value of @ref DMA_LL_EC_PDATAALIGN
+
+                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphSize(). */
+
+  uint32_t MemoryOrM2MDstDataSize; /*!< Specifies the Memory data size alignment or Destination data size alignment (byte, half word, word)
+                                        in case of memory to memory transfer direction.
+                                        This parameter can be a value of @ref DMA_LL_EC_MDATAALIGN
+
+                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemorySize(). */
+
+  uint32_t NbData;                 /*!< Specifies the number of data to transfer, in data unit.
+                                        The data unit is equal to the source buffer configuration set in PeripheralSize
+                                        or MemorySize parameters depending in the transfer direction.
+                                        This parameter must be a value between Min_Data = 0 and Max_Data = 0x0000FFFF
+
+                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetDataLength(). */
+
+  uint32_t Priority;               /*!< Specifies the channel priority level.
+                                        This parameter can be a value of @ref DMA_LL_EC_PRIORITY
+
+                                        This feature can be modified afterwards using unitary function @ref LL_DMA_SetChannelPriorityLevel(). */
+
+} LL_DMA_InitTypeDef;
+/**
+  * @}
+  */
+#endif /*USE_FULL_LL_DRIVER*/
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup DMA_LL_Exported_Constants DMA Exported Constants
+  * @{
+  */
+/** @defgroup DMA_LL_EC_CLEAR_FLAG Clear Flags Defines
+  * @brief    Flags defines which can be used with LL_DMA_WriteReg function
+  * @{
+  */
+#define LL_DMA_IFCR_CGIF1                 DMA_IFCR_CGIF1        /*!< Channel 1 global flag            */
+#define LL_DMA_IFCR_CTCIF1                DMA_IFCR_CTCIF1       /*!< Channel 1 transfer complete flag */
+#define LL_DMA_IFCR_CHTIF1                DMA_IFCR_CHTIF1       /*!< Channel 1 half transfer flag     */
+#define LL_DMA_IFCR_CTEIF1                DMA_IFCR_CTEIF1       /*!< Channel 1 transfer error flag    */
+#define LL_DMA_IFCR_CGIF2                 DMA_IFCR_CGIF2        /*!< Channel 2 global flag            */
+#define LL_DMA_IFCR_CTCIF2                DMA_IFCR_CTCIF2       /*!< Channel 2 transfer complete flag */
+#define LL_DMA_IFCR_CHTIF2                DMA_IFCR_CHTIF2       /*!< Channel 2 half transfer flag     */
+#define LL_DMA_IFCR_CTEIF2                DMA_IFCR_CTEIF2       /*!< Channel 2 transfer error flag    */
+#define LL_DMA_IFCR_CGIF3                 DMA_IFCR_CGIF3        /*!< Channel 3 global flag            */
+#define LL_DMA_IFCR_CTCIF3                DMA_IFCR_CTCIF3       /*!< Channel 3 transfer complete flag */
+#define LL_DMA_IFCR_CHTIF3                DMA_IFCR_CHTIF3       /*!< Channel 3 half transfer flag     */
+#define LL_DMA_IFCR_CTEIF3                DMA_IFCR_CTEIF3       /*!< Channel 3 transfer error flag    */
+#define LL_DMA_IFCR_CGIF4                 DMA_IFCR_CGIF4        /*!< Channel 4 global flag            */
+#define LL_DMA_IFCR_CTCIF4                DMA_IFCR_CTCIF4       /*!< Channel 4 transfer complete flag */
+#define LL_DMA_IFCR_CHTIF4                DMA_IFCR_CHTIF4       /*!< Channel 4 half transfer flag     */
+#define LL_DMA_IFCR_CTEIF4                DMA_IFCR_CTEIF4       /*!< Channel 4 transfer error flag    */
+#define LL_DMA_IFCR_CGIF5                 DMA_IFCR_CGIF5        /*!< Channel 5 global flag            */
+#define LL_DMA_IFCR_CTCIF5                DMA_IFCR_CTCIF5       /*!< Channel 5 transfer complete flag */
+#define LL_DMA_IFCR_CHTIF5                DMA_IFCR_CHTIF5       /*!< Channel 5 half transfer flag     */
+#define LL_DMA_IFCR_CTEIF5                DMA_IFCR_CTEIF5       /*!< Channel 5 transfer error flag    */
+#define LL_DMA_IFCR_CGIF6                 DMA_IFCR_CGIF6        /*!< Channel 6 global flag            */
+#define LL_DMA_IFCR_CTCIF6                DMA_IFCR_CTCIF6       /*!< Channel 6 transfer complete flag */
+#define LL_DMA_IFCR_CHTIF6                DMA_IFCR_CHTIF6       /*!< Channel 6 half transfer flag     */
+#define LL_DMA_IFCR_CTEIF6                DMA_IFCR_CTEIF6       /*!< Channel 6 transfer error flag    */
+#define LL_DMA_IFCR_CGIF7                 DMA_IFCR_CGIF7        /*!< Channel 7 global flag            */
+#define LL_DMA_IFCR_CTCIF7                DMA_IFCR_CTCIF7       /*!< Channel 7 transfer complete flag */
+#define LL_DMA_IFCR_CHTIF7                DMA_IFCR_CHTIF7       /*!< Channel 7 half transfer flag     */
+#define LL_DMA_IFCR_CTEIF7                DMA_IFCR_CTEIF7       /*!< Channel 7 transfer error flag    */
+/**
+  * @}
+  */
+
+/** @defgroup DMA_LL_EC_GET_FLAG Get Flags Defines
+  * @brief    Flags defines which can be used with LL_DMA_ReadReg function
+  * @{
+  */
+#define LL_DMA_ISR_GIF1                   DMA_ISR_GIF1          /*!< Channel 1 global flag            */
+#define LL_DMA_ISR_TCIF1                  DMA_ISR_TCIF1         /*!< Channel 1 transfer complete flag */
+#define LL_DMA_ISR_HTIF1                  DMA_ISR_HTIF1         /*!< Channel 1 half transfer flag     */
+#define LL_DMA_ISR_TEIF1                  DMA_ISR_TEIF1         /*!< Channel 1 transfer error flag    */
+#define LL_DMA_ISR_GIF2                   DMA_ISR_GIF2          /*!< Channel 2 global flag            */
+#define LL_DMA_ISR_TCIF2                  DMA_ISR_TCIF2         /*!< Channel 2 transfer complete flag */
+#define LL_DMA_ISR_HTIF2                  DMA_ISR_HTIF2         /*!< Channel 2 half transfer flag     */
+#define LL_DMA_ISR_TEIF2                  DMA_ISR_TEIF2         /*!< Channel 2 transfer error flag    */
+#define LL_DMA_ISR_GIF3                   DMA_ISR_GIF3          /*!< Channel 3 global flag            */
+#define LL_DMA_ISR_TCIF3                  DMA_ISR_TCIF3         /*!< Channel 3 transfer complete flag */
+#define LL_DMA_ISR_HTIF3                  DMA_ISR_HTIF3         /*!< Channel 3 half transfer flag     */
+#define LL_DMA_ISR_TEIF3                  DMA_ISR_TEIF3         /*!< Channel 3 transfer error flag    */
+#define LL_DMA_ISR_GIF4                   DMA_ISR_GIF4          /*!< Channel 4 global flag            */
+#define LL_DMA_ISR_TCIF4                  DMA_ISR_TCIF4         /*!< Channel 4 transfer complete flag */
+#define LL_DMA_ISR_HTIF4                  DMA_ISR_HTIF4         /*!< Channel 4 half transfer flag     */
+#define LL_DMA_ISR_TEIF4                  DMA_ISR_TEIF4         /*!< Channel 4 transfer error flag    */
+#define LL_DMA_ISR_GIF5                   DMA_ISR_GIF5          /*!< Channel 5 global flag            */
+#define LL_DMA_ISR_TCIF5                  DMA_ISR_TCIF5         /*!< Channel 5 transfer complete flag */
+#define LL_DMA_ISR_HTIF5                  DMA_ISR_HTIF5         /*!< Channel 5 half transfer flag     */
+#define LL_DMA_ISR_TEIF5                  DMA_ISR_TEIF5         /*!< Channel 5 transfer error flag    */
+#define LL_DMA_ISR_GIF6                   DMA_ISR_GIF6          /*!< Channel 6 global flag            */
+#define LL_DMA_ISR_TCIF6                  DMA_ISR_TCIF6         /*!< Channel 6 transfer complete flag */
+#define LL_DMA_ISR_HTIF6                  DMA_ISR_HTIF6         /*!< Channel 6 half transfer flag     */
+#define LL_DMA_ISR_TEIF6                  DMA_ISR_TEIF6         /*!< Channel 6 transfer error flag    */
+#define LL_DMA_ISR_GIF7                   DMA_ISR_GIF7          /*!< Channel 7 global flag            */
+#define LL_DMA_ISR_TCIF7                  DMA_ISR_TCIF7         /*!< Channel 7 transfer complete flag */
+#define LL_DMA_ISR_HTIF7                  DMA_ISR_HTIF7         /*!< Channel 7 half transfer flag     */
+#define LL_DMA_ISR_TEIF7                  DMA_ISR_TEIF7         /*!< Channel 7 transfer error flag    */
+/**
+  * @}
+  */
+
+/** @defgroup DMA_LL_EC_IT IT Defines
+  * @brief    IT defines which can be used with LL_DMA_ReadReg and  LL_DMA_WriteReg functions
+  * @{
+  */
+#define LL_DMA_CCR_TCIE                   DMA_CCR_TCIE          /*!< Transfer complete interrupt */
+#define LL_DMA_CCR_HTIE                   DMA_CCR_HTIE          /*!< Half Transfer interrupt     */
+#define LL_DMA_CCR_TEIE                   DMA_CCR_TEIE          /*!< Transfer error interrupt    */
+/**
+  * @}
+  */
+
+/** @defgroup DMA_LL_EC_CHANNEL CHANNEL
+  * @{
+  */
+#define LL_DMA_CHANNEL_1                  0x00000001U /*!< DMA Channel 1 */
+#define LL_DMA_CHANNEL_2                  0x00000002U /*!< DMA Channel 2 */
+#define LL_DMA_CHANNEL_3                  0x00000003U /*!< DMA Channel 3 */
+#define LL_DMA_CHANNEL_4                  0x00000004U /*!< DMA Channel 4 */
+#define LL_DMA_CHANNEL_5                  0x00000005U /*!< DMA Channel 5 */
+#define LL_DMA_CHANNEL_6                  0x00000006U /*!< DMA Channel 6 */
+#define LL_DMA_CHANNEL_7                  0x00000007U /*!< DMA Channel 7 */
+#if defined(USE_FULL_LL_DRIVER)
+#define LL_DMA_CHANNEL_ALL                0xFFFF0000U /*!< DMA Channel all (used only for function @ref LL_DMA_DeInit(). */
+#endif /*USE_FULL_LL_DRIVER*/
+/**
+  * @}
+  */
+
+/** @defgroup DMA_LL_EC_DIRECTION Transfer Direction
+  * @{
+  */
+#define LL_DMA_DIRECTION_PERIPH_TO_MEMORY 0x00000000U             /*!< Peripheral to memory direction */
+#define LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_CCR_DIR             /*!< Memory to peripheral direction */
+#define LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_CCR_MEM2MEM         /*!< Memory to memory direction     */
+/**
+  * @}
+  */
+
+/** @defgroup DMA_LL_EC_MODE Transfer mode
+  * @{
+  */
+#define LL_DMA_MODE_NORMAL                0x00000000U             /*!< Normal Mode                  */
+#define LL_DMA_MODE_CIRCULAR              DMA_CCR_CIRC            /*!< Circular Mode                */
+/**
+  * @}
+  */
+
+/** @defgroup DMA_LL_EC_PERIPH Peripheral increment mode
+  * @{
+  */
+#define LL_DMA_PERIPH_INCREMENT           DMA_CCR_PINC            /*!< Peripheral increment mode Enable */
+#define LL_DMA_PERIPH_NOINCREMENT         0x00000000U             /*!< Peripheral increment mode Disable */
+/**
+  * @}
+  */
+
+/** @defgroup DMA_LL_EC_MEMORY Memory increment mode
+  * @{
+  */
+#define LL_DMA_MEMORY_INCREMENT           DMA_CCR_MINC            /*!< Memory increment mode Enable  */
+#define LL_DMA_MEMORY_NOINCREMENT         0x00000000U             /*!< Memory increment mode Disable */
+/**
+  * @}
+  */
+
+/** @defgroup DMA_LL_EC_PDATAALIGN Peripheral data alignment
+  * @{
+  */
+#define LL_DMA_PDATAALIGN_BYTE            0x00000000U             /*!< Peripheral data alignment : Byte     */
+#define LL_DMA_PDATAALIGN_HALFWORD        DMA_CCR_PSIZE_0         /*!< Peripheral data alignment : HalfWord */
+#define LL_DMA_PDATAALIGN_WORD            DMA_CCR_PSIZE_1         /*!< Peripheral data alignment : Word     */
+/**
+  * @}
+  */
+
+/** @defgroup DMA_LL_EC_MDATAALIGN Memory data alignment
+  * @{
+  */
+#define LL_DMA_MDATAALIGN_BYTE            0x00000000U             /*!< Memory data alignment : Byte     */
+#define LL_DMA_MDATAALIGN_HALFWORD        DMA_CCR_MSIZE_0         /*!< Memory data alignment : HalfWord */
+#define LL_DMA_MDATAALIGN_WORD            DMA_CCR_MSIZE_1         /*!< Memory data alignment : Word     */
+/**
+  * @}
+  */
+
+/** @defgroup DMA_LL_EC_PRIORITY Transfer Priority level
+  * @{
+  */
+#define LL_DMA_PRIORITY_LOW               0x00000000U             /*!< Priority level : Low       */
+#define LL_DMA_PRIORITY_MEDIUM            DMA_CCR_PL_0            /*!< Priority level : Medium    */
+#define LL_DMA_PRIORITY_HIGH              DMA_CCR_PL_1            /*!< Priority level : High      */
+#define LL_DMA_PRIORITY_VERYHIGH          DMA_CCR_PL              /*!< Priority level : Very_High */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup DMA_LL_Exported_Macros DMA Exported Macros
+  * @{
+  */
+
+/** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros
+  * @{
+  */
+/**
+  * @brief  Write a value in DMA register
+  * @param  __INSTANCE__ DMA Instance
+  * @param  __REG__ Register to be written
+  * @param  __VALUE__ Value to be written in the register
+  * @retval None
+  */
+#define LL_DMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
+
+/**
+  * @brief  Read a value in DMA register
+  * @param  __INSTANCE__ DMA Instance
+  * @param  __REG__ Register to be read
+  * @retval Register value
+  */
+#define LL_DMA_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
+/**
+  * @}
+  */
+
+/** @defgroup DMA_LL_EM_CONVERT_DMAxCHANNELy Convert DMAxChannely
+  * @{
+  */
+
+/**
+  * @brief  Convert DMAx_Channely into DMAx
+  * @param  __CHANNEL_INSTANCE__ DMAx_Channely
+  * @retval DMAx
+  */
+#if defined(DMA2)
+#define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__)   \
+(((uint32_t)(__CHANNEL_INSTANCE__) > ((uint32_t)DMA1_Channel7)) ?  DMA2 : DMA1)
+#else
+#define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__)  (DMA1)
+#endif
+
+/**
+  * @brief  Convert DMAx_Channely into LL_DMA_CHANNEL_y
+  * @param  __CHANNEL_INSTANCE__ DMAx_Channely
+  * @retval LL_DMA_CHANNEL_y
+  */
+#if defined (DMA2)
+#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__)   \
+(((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel1)) ? LL_DMA_CHANNEL_1 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel2)) ? LL_DMA_CHANNEL_2 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel3)) ? LL_DMA_CHANNEL_3 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel4)) ? LL_DMA_CHANNEL_4 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel5)) ? LL_DMA_CHANNEL_5 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel6)) ? LL_DMA_CHANNEL_6 : \
+ LL_DMA_CHANNEL_7)
+#else
+#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__)   \
+(((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \
+ ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel6)) ? LL_DMA_CHANNEL_6 : \
+ LL_DMA_CHANNEL_7)
+#endif
+
+/**
+  * @brief  Convert DMA Instance DMAx and LL_DMA_CHANNEL_y into DMAx_Channely
+  * @param  __DMA_INSTANCE__ DMAx
+  * @param  __CHANNEL__ LL_DMA_CHANNEL_y
+  * @retval DMAx_Channely
+  */
+#if defined (DMA2)
+#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__)   \
+((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA2_Channel1 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA2_Channel2 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA2_Channel3 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA2_Channel4 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA1_Channel5 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA2_Channel5 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_6))) ? DMA1_Channel6 : \
+ DMA1_Channel7)
+#else
+#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__)   \
+((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA1_Channel5 : \
+ (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_6))) ? DMA1_Channel6 : \
+ DMA1_Channel7)
+#endif
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup DMA_LL_Exported_Functions DMA Exported Functions
+ * @{
+ */
+
+/** @defgroup DMA_LL_EF_Configuration Configuration
+  * @{
+  */
+/**
+  * @brief  Enable DMA channel.
+  * @rmtoll CCR          EN            LL_DMA_EnableChannel
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_EN);
+}
+
+/**
+  * @brief  Disable DMA channel.
+  * @rmtoll CCR          EN            LL_DMA_DisableChannel
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_EN);
+}
+
+/**
+  * @brief  Check if DMA channel is enabled or disabled.
+  * @rmtoll CCR          EN            LL_DMA_IsEnabledChannel
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
+                   DMA_CCR_EN) == (DMA_CCR_EN));
+}
+
+/**
+  * @brief  Configure all parameters link to DMA transfer.
+  * @rmtoll CCR          DIR           LL_DMA_ConfigTransfer\n
+  *         CCR          MEM2MEM       LL_DMA_ConfigTransfer\n
+  *         CCR          CIRC          LL_DMA_ConfigTransfer\n
+  *         CCR          PINC          LL_DMA_ConfigTransfer\n
+  *         CCR          MINC          LL_DMA_ConfigTransfer\n
+  *         CCR          PSIZE         LL_DMA_ConfigTransfer\n
+  *         CCR          MSIZE         LL_DMA_ConfigTransfer\n
+  *         CCR          PL            LL_DMA_ConfigTransfer
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @param  Configuration This parameter must be a combination of all the following values:
+  *         @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY or @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH or @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
+  *         @arg @ref LL_DMA_MODE_NORMAL or @ref LL_DMA_MODE_CIRCULAR
+  *         @arg @ref LL_DMA_PERIPH_INCREMENT or @ref LL_DMA_PERIPH_NOINCREMENT
+  *         @arg @ref LL_DMA_MEMORY_INCREMENT or @ref LL_DMA_MEMORY_NOINCREMENT
+  *         @arg @ref LL_DMA_PDATAALIGN_BYTE or @ref LL_DMA_PDATAALIGN_HALFWORD or @ref LL_DMA_PDATAALIGN_WORD
+  *         @arg @ref LL_DMA_MDATAALIGN_BYTE or @ref LL_DMA_MDATAALIGN_HALFWORD or @ref LL_DMA_MDATAALIGN_WORD
+  *         @arg @ref LL_DMA_PRIORITY_LOW or @ref LL_DMA_PRIORITY_MEDIUM or @ref LL_DMA_PRIORITY_HIGH or @ref LL_DMA_PRIORITY_VERYHIGH
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configuration)
+{
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
+             DMA_CCR_DIR | DMA_CCR_MEM2MEM | DMA_CCR_CIRC | DMA_CCR_PINC | DMA_CCR_MINC | DMA_CCR_PSIZE | DMA_CCR_MSIZE | DMA_CCR_PL,
+             Configuration);
+}
+
+/**
+  * @brief  Set Data transfer direction (read from peripheral or from memory).
+  * @rmtoll CCR          DIR           LL_DMA_SetDataTransferDirection\n
+  *         CCR          MEM2MEM       LL_DMA_SetDataTransferDirection
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @param  Direction This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
+  *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
+  *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Direction)
+{
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
+             DMA_CCR_DIR | DMA_CCR_MEM2MEM, Direction);
+}
+
+/**
+  * @brief  Get Data transfer direction (read from peripheral or from memory).
+  * @rmtoll CCR          DIR           LL_DMA_GetDataTransferDirection\n
+  *         CCR          MEM2MEM       LL_DMA_GetDataTransferDirection
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
+  *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
+  *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
+  */
+__STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
+                   DMA_CCR_DIR | DMA_CCR_MEM2MEM));
+}
+
+/**
+  * @brief  Set DMA mode circular or normal.
+  * @note The circular buffer mode cannot be used if the memory-to-memory
+  * data transfer is configured on the selected Channel.
+  * @rmtoll CCR          CIRC          LL_DMA_SetMode
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @param  Mode This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_MODE_NORMAL
+  *         @arg @ref LL_DMA_MODE_CIRCULAR
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode)
+{
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_CIRC,
+             Mode);
+}
+
+/**
+  * @brief  Get DMA mode circular or normal.
+  * @rmtoll CCR          CIRC          LL_DMA_GetMode
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_DMA_MODE_NORMAL
+  *         @arg @ref LL_DMA_MODE_CIRCULAR
+  */
+__STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
+                   DMA_CCR_CIRC));
+}
+
+/**
+  * @brief  Set Peripheral increment mode.
+  * @rmtoll CCR          PINC          LL_DMA_SetPeriphIncMode
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @param  PeriphOrM2MSrcIncMode This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_PERIPH_INCREMENT
+  *         @arg @ref LL_DMA_PERIPH_NOINCREMENT
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode)
+{
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PINC,
+             PeriphOrM2MSrcIncMode);
+}
+
+/**
+  * @brief  Get Peripheral increment mode.
+  * @rmtoll CCR          PINC          LL_DMA_GetPeriphIncMode
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_DMA_PERIPH_INCREMENT
+  *         @arg @ref LL_DMA_PERIPH_NOINCREMENT
+  */
+__STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
+                   DMA_CCR_PINC));
+}
+
+/**
+  * @brief  Set Memory increment mode.
+  * @rmtoll CCR          MINC          LL_DMA_SetMemoryIncMode
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @param  MemoryOrM2MDstIncMode This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_MEMORY_INCREMENT
+  *         @arg @ref LL_DMA_MEMORY_NOINCREMENT
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstIncMode)
+{
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MINC,
+             MemoryOrM2MDstIncMode);
+}
+
+/**
+  * @brief  Get Memory increment mode.
+  * @rmtoll CCR          MINC          LL_DMA_GetMemoryIncMode
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_DMA_MEMORY_INCREMENT
+  *         @arg @ref LL_DMA_MEMORY_NOINCREMENT
+  */
+__STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
+                   DMA_CCR_MINC));
+}
+
+/**
+  * @brief  Set Peripheral size.
+  * @rmtoll CCR          PSIZE         LL_DMA_SetPeriphSize
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @param  PeriphOrM2MSrcDataSize This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_PDATAALIGN_BYTE
+  *         @arg @ref LL_DMA_PDATAALIGN_HALFWORD
+  *         @arg @ref LL_DMA_PDATAALIGN_WORD
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize)
+{
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PSIZE,
+             PeriphOrM2MSrcDataSize);
+}
+
+/**
+  * @brief  Get Peripheral size.
+  * @rmtoll CCR          PSIZE         LL_DMA_GetPeriphSize
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_DMA_PDATAALIGN_BYTE
+  *         @arg @ref LL_DMA_PDATAALIGN_HALFWORD
+  *         @arg @ref LL_DMA_PDATAALIGN_WORD
+  */
+__STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
+                   DMA_CCR_PSIZE));
+}
+
+/**
+  * @brief  Set Memory size.
+  * @rmtoll CCR          MSIZE         LL_DMA_SetMemorySize
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @param  MemoryOrM2MDstDataSize This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_MDATAALIGN_BYTE
+  *         @arg @ref LL_DMA_MDATAALIGN_HALFWORD
+  *         @arg @ref LL_DMA_MDATAALIGN_WORD
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstDataSize)
+{
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MSIZE,
+             MemoryOrM2MDstDataSize);
+}
+
+/**
+  * @brief  Get Memory size.
+  * @rmtoll CCR          MSIZE         LL_DMA_GetMemorySize
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_DMA_MDATAALIGN_BYTE
+  *         @arg @ref LL_DMA_MDATAALIGN_HALFWORD
+  *         @arg @ref LL_DMA_MDATAALIGN_WORD
+  */
+__STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
+                   DMA_CCR_MSIZE));
+}
+
+/**
+  * @brief  Set Channel priority level.
+  * @rmtoll CCR          PL            LL_DMA_SetChannelPriorityLevel
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @param  Priority This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_PRIORITY_LOW
+  *         @arg @ref LL_DMA_PRIORITY_MEDIUM
+  *         @arg @ref LL_DMA_PRIORITY_HIGH
+  *         @arg @ref LL_DMA_PRIORITY_VERYHIGH
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Priority)
+{
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PL,
+             Priority);
+}
+
+/**
+  * @brief  Get Channel priority level.
+  * @rmtoll CCR          PL            LL_DMA_GetChannelPriorityLevel
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_DMA_PRIORITY_LOW
+  *         @arg @ref LL_DMA_PRIORITY_MEDIUM
+  *         @arg @ref LL_DMA_PRIORITY_HIGH
+  *         @arg @ref LL_DMA_PRIORITY_VERYHIGH
+  */
+__STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
+                   DMA_CCR_PL));
+}
+
+/**
+  * @brief  Set Number of data to transfer.
+  * @note   This action has no effect if
+  *         channel is enabled.
+  * @rmtoll CNDTR        NDT           LL_DMA_SetDataLength
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @param  NbData Between Min_Data = 0 and Max_Data = 0x0000FFFF
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData)
+{
+  MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CNDTR,
+             DMA_CNDTR_NDT, NbData);
+}
+
+/**
+  * @brief  Get Number of data to transfer.
+  * @note   Once the channel is enabled, the return value indicate the
+  *         remaining bytes to be transmitted.
+  * @rmtoll CNDTR        NDT           LL_DMA_GetDataLength
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
+  */
+__STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CNDTR,
+                   DMA_CNDTR_NDT));
+}
+
+/**
+  * @brief  Configure the Source and Destination addresses.
+  * @note   This API must not be called when the DMA channel is enabled.
+  * @note   Each IP using DMA provides an API to get directly the register adress (LL_PPP_DMA_GetRegAddr).
+  * @rmtoll CPAR         PA            LL_DMA_ConfigAddresses\n
+  *         CMAR         MA            LL_DMA_ConfigAddresses
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @param  SrcAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
+  * @param  DstAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
+  * @param  Direction This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
+  *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
+  *         @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t SrcAddress,
+                                            uint32_t DstAddress, uint32_t Direction)
+{
+  /* Direction Memory to Periph */
+  if (Direction == LL_DMA_DIRECTION_MEMORY_TO_PERIPH)
+  {
+    WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, SrcAddress);
+    WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DstAddress);
+  }
+  /* Direction Periph to Memory and Memory to Memory */
+  else
+  {
+    WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, SrcAddress);
+    WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DstAddress);
+  }
+}
+
+/**
+  * @brief  Set the Memory address.
+  * @note   Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
+  * @note   This API must not be called when the DMA channel is enabled.
+  * @rmtoll CMAR         MA            LL_DMA_SetMemoryAddress
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @param  MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
+{
+  WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress);
+}
+
+/**
+  * @brief  Set the Peripheral address.
+  * @note   Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
+  * @note   This API must not be called when the DMA channel is enabled.
+  * @rmtoll CPAR         PA            LL_DMA_SetPeriphAddress
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @param  PeriphAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAddress)
+{
+  WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, PeriphAddress);
+}
+
+/**
+  * @brief  Get Memory address.
+  * @note   Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
+  * @rmtoll CMAR         MA            LL_DMA_GetMemoryAddress
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
+  */
+__STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR));
+}
+
+/**
+  * @brief  Get Peripheral address.
+  * @note   Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
+  * @rmtoll CPAR         PA            LL_DMA_GetPeriphAddress
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
+  */
+__STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR));
+}
+
+/**
+  * @brief  Set the Memory to Memory Source address.
+  * @note   Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
+  * @note   This API must not be called when the DMA channel is enabled.
+  * @rmtoll CPAR         PA            LL_DMA_SetM2MSrcAddress
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @param  MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
+{
+  WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, MemoryAddress);
+}
+
+/**
+  * @brief  Set the Memory to Memory Destination address.
+  * @note   Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
+  * @note   This API must not be called when the DMA channel is enabled.
+  * @rmtoll CMAR         MA            LL_DMA_SetM2MDstAddress
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @param  MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
+{
+  WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, MemoryAddress);
+}
+
+/**
+  * @brief  Get the Memory to Memory Source address.
+  * @note   Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
+  * @rmtoll CPAR         PA            LL_DMA_GetM2MSrcAddress
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
+  */
+__STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR));
+}
+
+/**
+  * @brief  Get the Memory to Memory Destination address.
+  * @note   Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
+  * @rmtoll CMAR         MA            LL_DMA_GetM2MDstAddress
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
+  */
+__STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup DMA_LL_EF_FLAG_Management FLAG_Management
+  * @{
+  */
+
+/**
+  * @brief  Get Channel 1 global interrupt flag.
+  * @rmtoll ISR          GIF1          LL_DMA_IsActiveFlag_GI1
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI1(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_GIF1) == (DMA_ISR_GIF1));
+}
+
+/**
+  * @brief  Get Channel 2 global interrupt flag.
+  * @rmtoll ISR          GIF2          LL_DMA_IsActiveFlag_GI2
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI2(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_GIF2) == (DMA_ISR_GIF2));
+}
+
+/**
+  * @brief  Get Channel 3 global interrupt flag.
+  * @rmtoll ISR          GIF3          LL_DMA_IsActiveFlag_GI3
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI3(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_GIF3) == (DMA_ISR_GIF3));
+}
+
+/**
+  * @brief  Get Channel 4 global interrupt flag.
+  * @rmtoll ISR          GIF4          LL_DMA_IsActiveFlag_GI4
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI4(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_GIF4) == (DMA_ISR_GIF4));
+}
+
+/**
+  * @brief  Get Channel 5 global interrupt flag.
+  * @rmtoll ISR          GIF5          LL_DMA_IsActiveFlag_GI5
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI5(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_GIF5) == (DMA_ISR_GIF5));
+}
+
+/**
+  * @brief  Get Channel 6 global interrupt flag.
+  * @rmtoll ISR          GIF6          LL_DMA_IsActiveFlag_GI6
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI6(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_GIF6) == (DMA_ISR_GIF6));
+}
+
+/**
+  * @brief  Get Channel 7 global interrupt flag.
+  * @rmtoll ISR          GIF7          LL_DMA_IsActiveFlag_GI7
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI7(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_GIF7) == (DMA_ISR_GIF7));
+}
+
+/**
+  * @brief  Get Channel 1 transfer complete flag.
+  * @rmtoll ISR          TCIF1         LL_DMA_IsActiveFlag_TC1
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC1(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF1) == (DMA_ISR_TCIF1));
+}
+
+/**
+  * @brief  Get Channel 2 transfer complete flag.
+  * @rmtoll ISR          TCIF2         LL_DMA_IsActiveFlag_TC2
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF2) == (DMA_ISR_TCIF2));
+}
+
+/**
+  * @brief  Get Channel 3 transfer complete flag.
+  * @rmtoll ISR          TCIF3         LL_DMA_IsActiveFlag_TC3
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC3(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF3) == (DMA_ISR_TCIF3));
+}
+
+/**
+  * @brief  Get Channel 4 transfer complete flag.
+  * @rmtoll ISR          TCIF4         LL_DMA_IsActiveFlag_TC4
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF4) == (DMA_ISR_TCIF4));
+}
+
+/**
+  * @brief  Get Channel 5 transfer complete flag.
+  * @rmtoll ISR          TCIF5         LL_DMA_IsActiveFlag_TC5
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC5(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF5) == (DMA_ISR_TCIF5));
+}
+
+/**
+  * @brief  Get Channel 6 transfer complete flag.
+  * @rmtoll ISR          TCIF6         LL_DMA_IsActiveFlag_TC6
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC6(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF6) == (DMA_ISR_TCIF6));
+}
+
+/**
+  * @brief  Get Channel 7 transfer complete flag.
+  * @rmtoll ISR          TCIF7         LL_DMA_IsActiveFlag_TC7
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF7) == (DMA_ISR_TCIF7));
+}
+
+/**
+  * @brief  Get Channel 1 half transfer flag.
+  * @rmtoll ISR          HTIF1         LL_DMA_IsActiveFlag_HT1
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF1) == (DMA_ISR_HTIF1));
+}
+
+/**
+  * @brief  Get Channel 2 half transfer flag.
+  * @rmtoll ISR          HTIF2         LL_DMA_IsActiveFlag_HT2
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF2) == (DMA_ISR_HTIF2));
+}
+
+/**
+  * @brief  Get Channel 3 half transfer flag.
+  * @rmtoll ISR          HTIF3         LL_DMA_IsActiveFlag_HT3
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT3(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF3) == (DMA_ISR_HTIF3));
+}
+
+/**
+  * @brief  Get Channel 4 half transfer flag.
+  * @rmtoll ISR          HTIF4         LL_DMA_IsActiveFlag_HT4
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF4) == (DMA_ISR_HTIF4));
+}
+
+/**
+  * @brief  Get Channel 5 half transfer flag.
+  * @rmtoll ISR          HTIF5         LL_DMA_IsActiveFlag_HT5
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF5) == (DMA_ISR_HTIF5));
+}
+
+/**
+  * @brief  Get Channel 6 half transfer flag.
+  * @rmtoll ISR          HTIF6         LL_DMA_IsActiveFlag_HT6
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF6) == (DMA_ISR_HTIF6));
+}
+
+/**
+  * @brief  Get Channel 7 half transfer flag.
+  * @rmtoll ISR          HTIF7         LL_DMA_IsActiveFlag_HT7
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF7) == (DMA_ISR_HTIF7));
+}
+
+/**
+  * @brief  Get Channel 1 transfer error flag.
+  * @rmtoll ISR          TEIF1         LL_DMA_IsActiveFlag_TE1
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF1) == (DMA_ISR_TEIF1));
+}
+
+/**
+  * @brief  Get Channel 2 transfer error flag.
+  * @rmtoll ISR          TEIF2         LL_DMA_IsActiveFlag_TE2
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF2) == (DMA_ISR_TEIF2));
+}
+
+/**
+  * @brief  Get Channel 3 transfer error flag.
+  * @rmtoll ISR          TEIF3         LL_DMA_IsActiveFlag_TE3
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE3(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF3) == (DMA_ISR_TEIF3));
+}
+
+/**
+  * @brief  Get Channel 4 transfer error flag.
+  * @rmtoll ISR          TEIF4         LL_DMA_IsActiveFlag_TE4
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE4(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF4) == (DMA_ISR_TEIF4));
+}
+
+/**
+  * @brief  Get Channel 5 transfer error flag.
+  * @rmtoll ISR          TEIF5         LL_DMA_IsActiveFlag_TE5
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE5(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF5) == (DMA_ISR_TEIF5));
+}
+
+/**
+  * @brief  Get Channel 6 transfer error flag.
+  * @rmtoll ISR          TEIF6         LL_DMA_IsActiveFlag_TE6
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF6) == (DMA_ISR_TEIF6));
+}
+
+/**
+  * @brief  Get Channel 7 transfer error flag.
+  * @rmtoll ISR          TEIF7         LL_DMA_IsActiveFlag_TE7
+  * @param  DMAx DMAx Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef *DMAx)
+{
+  return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF7) == (DMA_ISR_TEIF7));
+}
+
+/**
+  * @brief  Clear Channel 1 global interrupt flag.
+  * @rmtoll IFCR         CGIF1         LL_DMA_ClearFlag_GI1
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_GI1(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1);
+}
+
+/**
+  * @brief  Clear Channel 2 global interrupt flag.
+  * @rmtoll IFCR         CGIF2         LL_DMA_ClearFlag_GI2
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_GI2(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2);
+}
+
+/**
+  * @brief  Clear Channel 3 global interrupt flag.
+  * @rmtoll IFCR         CGIF3         LL_DMA_ClearFlag_GI3
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_GI3(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3);
+}
+
+/**
+  * @brief  Clear Channel 4 global interrupt flag.
+  * @rmtoll IFCR         CGIF4         LL_DMA_ClearFlag_GI4
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_GI4(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4);
+}
+
+/**
+  * @brief  Clear Channel 5 global interrupt flag.
+  * @rmtoll IFCR         CGIF5         LL_DMA_ClearFlag_GI5
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_GI5(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5);
+}
+
+/**
+  * @brief  Clear Channel 6 global interrupt flag.
+  * @rmtoll IFCR         CGIF6         LL_DMA_ClearFlag_GI6
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_GI6(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6);
+}
+
+/**
+  * @brief  Clear Channel 7 global interrupt flag.
+  * @rmtoll IFCR         CGIF7         LL_DMA_ClearFlag_GI7
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_GI7(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7);
+}
+
+/**
+  * @brief  Clear Channel 1  transfer complete flag.
+  * @rmtoll IFCR         CTCIF1        LL_DMA_ClearFlag_TC1
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_TC1(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1);
+}
+
+/**
+  * @brief  Clear Channel 2  transfer complete flag.
+  * @rmtoll IFCR         CTCIF2        LL_DMA_ClearFlag_TC2
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_TC2(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2);
+}
+
+/**
+  * @brief  Clear Channel 3  transfer complete flag.
+  * @rmtoll IFCR         CTCIF3        LL_DMA_ClearFlag_TC3
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_TC3(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF3);
+}
+
+/**
+  * @brief  Clear Channel 4  transfer complete flag.
+  * @rmtoll IFCR         CTCIF4        LL_DMA_ClearFlag_TC4
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_TC4(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF4);
+}
+
+/**
+  * @brief  Clear Channel 5  transfer complete flag.
+  * @rmtoll IFCR         CTCIF5        LL_DMA_ClearFlag_TC5
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF5);
+}
+
+/**
+  * @brief  Clear Channel 6  transfer complete flag.
+  * @rmtoll IFCR         CTCIF6        LL_DMA_ClearFlag_TC6
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF6);
+}
+
+/**
+  * @brief  Clear Channel 7  transfer complete flag.
+  * @rmtoll IFCR         CTCIF7        LL_DMA_ClearFlag_TC7
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF7);
+}
+
+/**
+  * @brief  Clear Channel 1  half transfer flag.
+  * @rmtoll IFCR         CHTIF1        LL_DMA_ClearFlag_HT1
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF1);
+}
+
+/**
+  * @brief  Clear Channel 2  half transfer flag.
+  * @rmtoll IFCR         CHTIF2        LL_DMA_ClearFlag_HT2
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_HT2(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF2);
+}
+
+/**
+  * @brief  Clear Channel 3  half transfer flag.
+  * @rmtoll IFCR         CHTIF3        LL_DMA_ClearFlag_HT3
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF3);
+}
+
+/**
+  * @brief  Clear Channel 4  half transfer flag.
+  * @rmtoll IFCR         CHTIF4        LL_DMA_ClearFlag_HT4
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_HT4(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF4);
+}
+
+/**
+  * @brief  Clear Channel 5  half transfer flag.
+  * @rmtoll IFCR         CHTIF5        LL_DMA_ClearFlag_HT5
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_HT5(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF5);
+}
+
+/**
+  * @brief  Clear Channel 6  half transfer flag.
+  * @rmtoll IFCR         CHTIF6        LL_DMA_ClearFlag_HT6
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_HT6(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF6);
+}
+
+/**
+  * @brief  Clear Channel 7  half transfer flag.
+  * @rmtoll IFCR         CHTIF7        LL_DMA_ClearFlag_HT7
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_HT7(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF7);
+}
+
+/**
+  * @brief  Clear Channel 1 transfer error flag.
+  * @rmtoll IFCR         CTEIF1        LL_DMA_ClearFlag_TE1
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF1);
+}
+
+/**
+  * @brief  Clear Channel 2 transfer error flag.
+  * @rmtoll IFCR         CTEIF2        LL_DMA_ClearFlag_TE2
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_TE2(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF2);
+}
+
+/**
+  * @brief  Clear Channel 3 transfer error flag.
+  * @rmtoll IFCR         CTEIF3        LL_DMA_ClearFlag_TE3
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_TE3(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF3);
+}
+
+/**
+  * @brief  Clear Channel 4 transfer error flag.
+  * @rmtoll IFCR         CTEIF4        LL_DMA_ClearFlag_TE4
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF4);
+}
+
+/**
+  * @brief  Clear Channel 5 transfer error flag.
+  * @rmtoll IFCR         CTEIF5        LL_DMA_ClearFlag_TE5
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_TE5(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF5);
+}
+
+/**
+  * @brief  Clear Channel 6 transfer error flag.
+  * @rmtoll IFCR         CTEIF6        LL_DMA_ClearFlag_TE6
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF6);
+}
+
+/**
+  * @brief  Clear Channel 7 transfer error flag.
+  * @rmtoll IFCR         CTEIF7        LL_DMA_ClearFlag_TE7
+  * @param  DMAx DMAx Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx)
+{
+  WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF7);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup DMA_LL_EF_IT_Management IT_Management
+  * @{
+  */
+
+/**
+  * @brief  Enable Transfer complete interrupt.
+  * @rmtoll CCR          TCIE          LL_DMA_EnableIT_TC
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE);
+}
+
+/**
+  * @brief  Enable Half transfer interrupt.
+  * @rmtoll CCR          HTIE          LL_DMA_EnableIT_HT
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE);
+}
+
+/**
+  * @brief  Enable Transfer error interrupt.
+  * @rmtoll CCR          TEIE          LL_DMA_EnableIT_TE
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TEIE);
+}
+
+/**
+  * @brief  Disable Transfer complete interrupt.
+  * @rmtoll CCR          TCIE          LL_DMA_DisableIT_TC
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE);
+}
+
+/**
+  * @brief  Disable Half transfer interrupt.
+  * @rmtoll CCR          HTIE          LL_DMA_DisableIT_HT
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE);
+}
+
+/**
+  * @brief  Disable Transfer error interrupt.
+  * @rmtoll CCR          TEIE          LL_DMA_DisableIT_TE
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval None
+  */
+__STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TEIE);
+}
+
+/**
+  * @brief  Check if Transfer complete Interrupt is enabled.
+  * @rmtoll CCR          TCIE          LL_DMA_IsEnabledIT_TC
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
+                   DMA_CCR_TCIE) == (DMA_CCR_TCIE));
+}
+
+/**
+  * @brief  Check if Half transfer Interrupt is enabled.
+  * @rmtoll CCR          HTIE          LL_DMA_IsEnabledIT_HT
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
+                   DMA_CCR_HTIE) == (DMA_CCR_HTIE));
+}
+
+/**
+  * @brief  Check if Transfer error Interrupt is enabled.
+  * @rmtoll CCR          TEIE          LL_DMA_IsEnabledIT_TE
+  * @param  DMAx DMAx Instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_DMA_CHANNEL_1
+  *         @arg @ref LL_DMA_CHANNEL_2
+  *         @arg @ref LL_DMA_CHANNEL_3
+  *         @arg @ref LL_DMA_CHANNEL_4
+  *         @arg @ref LL_DMA_CHANNEL_5
+  *         @arg @ref LL_DMA_CHANNEL_6
+  *         @arg @ref LL_DMA_CHANNEL_7
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
+{
+  return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
+                   DMA_CCR_TEIE) == (DMA_CCR_TEIE));
+}
+
+/**
+  * @}
+  */
+
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup DMA_LL_EF_Init Initialization and de-initialization functions
+  * @{
+  */
+
+uint32_t LL_DMA_Init(DMA_TypeDef *DMAx, uint32_t Channel, LL_DMA_InitTypeDef *DMA_InitStruct);
+uint32_t LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Channel);
+void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct);
+
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* DMA1 || DMA2 */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F1xx_LL_DMA_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_exti.h b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_exti.h
new file mode 100644
index 0000000..f0be0ad
--- /dev/null
+++ b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_exti.h
@@ -0,0 +1,888 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_ll_exti.h
+  * @author  MCD Application Team
+  * @brief   Header file of EXTI LL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32F1xx_LL_EXTI_H
+#define STM32F1xx_LL_EXTI_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx.h"
+
+/** @addtogroup STM32F1xx_LL_Driver
+  * @{
+  */
+
+#if defined (EXTI)
+
+/** @defgroup EXTI_LL EXTI
+  * @{
+  */
+
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private constants ---------------------------------------------------------*/
+/* Private Macros ------------------------------------------------------------*/
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
+  * @{
+  */
+/**
+  * @}
+  */
+#endif /*USE_FULL_LL_DRIVER*/
+/* Exported types ------------------------------------------------------------*/
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
+  * @{
+  */
+typedef struct
+{
+
+  uint32_t Line_0_31;           /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
+                                     This parameter can be any combination of @ref EXTI_LL_EC_LINE */
+
+  FunctionalState LineCommand;  /*!< Specifies the new state of the selected EXTI lines.
+                                     This parameter can be set either to ENABLE or DISABLE */
+
+  uint8_t Mode;                 /*!< Specifies the mode for the EXTI lines.
+                                     This parameter can be a value of @ref EXTI_LL_EC_MODE. */
+
+  uint8_t Trigger;              /*!< Specifies the trigger signal active edge for the EXTI lines.
+                                     This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
+} LL_EXTI_InitTypeDef;
+
+/**
+  * @}
+  */
+#endif /*USE_FULL_LL_DRIVER*/
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
+  * @{
+  */
+
+/** @defgroup EXTI_LL_EC_LINE LINE
+  * @{
+  */
+#define LL_EXTI_LINE_0                 EXTI_IMR_IM0           /*!< Extended line 0 */
+#define LL_EXTI_LINE_1                 EXTI_IMR_IM1           /*!< Extended line 1 */
+#define LL_EXTI_LINE_2                 EXTI_IMR_IM2           /*!< Extended line 2 */
+#define LL_EXTI_LINE_3                 EXTI_IMR_IM3           /*!< Extended line 3 */
+#define LL_EXTI_LINE_4                 EXTI_IMR_IM4           /*!< Extended line 4 */
+#define LL_EXTI_LINE_5                 EXTI_IMR_IM5           /*!< Extended line 5 */
+#define LL_EXTI_LINE_6                 EXTI_IMR_IM6           /*!< Extended line 6 */
+#define LL_EXTI_LINE_7                 EXTI_IMR_IM7           /*!< Extended line 7 */
+#define LL_EXTI_LINE_8                 EXTI_IMR_IM8           /*!< Extended line 8 */
+#define LL_EXTI_LINE_9                 EXTI_IMR_IM9           /*!< Extended line 9 */
+#define LL_EXTI_LINE_10                EXTI_IMR_IM10          /*!< Extended line 10 */
+#define LL_EXTI_LINE_11                EXTI_IMR_IM11          /*!< Extended line 11 */
+#define LL_EXTI_LINE_12                EXTI_IMR_IM12          /*!< Extended line 12 */
+#define LL_EXTI_LINE_13                EXTI_IMR_IM13          /*!< Extended line 13 */
+#define LL_EXTI_LINE_14                EXTI_IMR_IM14          /*!< Extended line 14 */
+#define LL_EXTI_LINE_15                EXTI_IMR_IM15          /*!< Extended line 15 */
+#if defined(EXTI_IMR_IM16)
+#define LL_EXTI_LINE_16                EXTI_IMR_IM16          /*!< Extended line 16 */
+#endif
+#define LL_EXTI_LINE_17                EXTI_IMR_IM17          /*!< Extended line 17 */
+#if defined(EXTI_IMR_IM18)
+#define LL_EXTI_LINE_18                EXTI_IMR_IM18          /*!< Extended line 18 */
+#endif
+#if defined(EXTI_IMR_IM19)
+#define LL_EXTI_LINE_19                EXTI_IMR_IM19          /*!< Extended line 19 */
+#endif
+#if defined(EXTI_IMR_IM20)
+#define LL_EXTI_LINE_20                EXTI_IMR_IM20          /*!< Extended line 20 */
+#endif
+#if defined(EXTI_IMR_IM21)
+#define LL_EXTI_LINE_21                EXTI_IMR_IM21          /*!< Extended line 21 */
+#endif
+#if defined(EXTI_IMR_IM22)
+#define LL_EXTI_LINE_22                EXTI_IMR_IM22          /*!< Extended line 22 */
+#endif
+#if defined(EXTI_IMR_IM23)
+#define LL_EXTI_LINE_23                EXTI_IMR_IM23          /*!< Extended line 23 */
+#endif
+#if defined(EXTI_IMR_IM24)
+#define LL_EXTI_LINE_24                EXTI_IMR_IM24          /*!< Extended line 24 */
+#endif
+#if defined(EXTI_IMR_IM25)
+#define LL_EXTI_LINE_25                EXTI_IMR_IM25          /*!< Extended line 25 */
+#endif
+#if defined(EXTI_IMR_IM26)
+#define LL_EXTI_LINE_26                EXTI_IMR_IM26          /*!< Extended line 26 */
+#endif
+#if defined(EXTI_IMR_IM27)
+#define LL_EXTI_LINE_27                EXTI_IMR_IM27          /*!< Extended line 27 */
+#endif
+#if defined(EXTI_IMR_IM28)
+#define LL_EXTI_LINE_28                EXTI_IMR_IM28          /*!< Extended line 28 */
+#endif
+#if defined(EXTI_IMR_IM29)
+#define LL_EXTI_LINE_29                EXTI_IMR_IM29          /*!< Extended line 29 */
+#endif
+#if defined(EXTI_IMR_IM30)
+#define LL_EXTI_LINE_30                EXTI_IMR_IM30          /*!< Extended line 30 */
+#endif
+#if defined(EXTI_IMR_IM31)
+#define LL_EXTI_LINE_31                EXTI_IMR_IM31          /*!< Extended line 31 */
+#endif
+#define LL_EXTI_LINE_ALL_0_31          EXTI_IMR_IM            /*!< All Extended line not reserved*/
+
+
+#define LL_EXTI_LINE_ALL               (0xFFFFFFFFU)  /*!< All Extended line */
+
+#if defined(USE_FULL_LL_DRIVER)
+#define LL_EXTI_LINE_NONE              (0x00000000U)  /*!< None Extended line */
+#endif /*USE_FULL_LL_DRIVER*/
+
+/**
+  * @}
+  */
+#if defined(USE_FULL_LL_DRIVER)
+
+/** @defgroup EXTI_LL_EC_MODE Mode
+  * @{
+  */
+#define LL_EXTI_MODE_IT                 ((uint8_t)0x00) /*!< Interrupt Mode */
+#define LL_EXTI_MODE_EVENT              ((uint8_t)0x01) /*!< Event Mode */
+#define LL_EXTI_MODE_IT_EVENT           ((uint8_t)0x02) /*!< Interrupt & Event Mode */
+/**
+  * @}
+  */
+
+/** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
+  * @{
+  */
+#define LL_EXTI_TRIGGER_NONE            ((uint8_t)0x00) /*!< No Trigger Mode */
+#define LL_EXTI_TRIGGER_RISING          ((uint8_t)0x01) /*!< Trigger Rising Mode */
+#define LL_EXTI_TRIGGER_FALLING         ((uint8_t)0x02) /*!< Trigger Falling Mode */
+#define LL_EXTI_TRIGGER_RISING_FALLING  ((uint8_t)0x03) /*!< Trigger Rising & Falling Mode */
+
+/**
+  * @}
+  */
+
+
+#endif /*USE_FULL_LL_DRIVER*/
+
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
+  * @{
+  */
+
+/** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
+  * @{
+  */
+
+/**
+  * @brief  Write a value in EXTI register
+  * @param  __REG__ Register to be written
+  * @param  __VALUE__ Value to be written in the register
+  * @retval None
+  */
+#define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
+
+/**
+  * @brief  Read a value in EXTI register
+  * @param  __REG__ Register to be read
+  * @retval Register value
+  */
+#define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
+/**
+  * @}
+  */
+
+
+/**
+  * @}
+  */
+
+
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
+ * @{
+ */
+/** @defgroup EXTI_LL_EF_IT_Management IT_Management
+  * @{
+  */
+
+/**
+  * @brief  Enable ExtiLine Interrupt request for Lines in range 0 to 31
+  * @note The reset value for the direct or internal lines (see RM)
+  *       is set to 1 in order to enable the interrupt by default.
+  *       Bits are set automatically at Power on.
+  * @rmtoll IMR         IMx           LL_EXTI_EnableIT_0_31
+  * @param  ExtiLine This parameter can be one of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_17
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  *         @arg @ref LL_EXTI_LINE_ALL_0_31
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval None
+  */
+__STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
+{
+  SET_BIT(EXTI->IMR, ExtiLine);
+}
+
+/**
+  * @brief  Disable ExtiLine Interrupt request for Lines in range 0 to 31
+  * @note The reset value for the direct or internal lines (see RM)
+  *       is set to 1 in order to enable the interrupt by default.
+  *       Bits are set automatically at Power on.
+  * @rmtoll IMR         IMx           LL_EXTI_DisableIT_0_31
+  * @param  ExtiLine This parameter can be one of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_17
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  *         @arg @ref LL_EXTI_LINE_ALL_0_31
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval None
+  */
+__STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
+{
+  CLEAR_BIT(EXTI->IMR, ExtiLine);
+}
+
+
+/**
+  * @brief  Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
+  * @note The reset value for the direct or internal lines (see RM)
+  *       is set to 1 in order to enable the interrupt by default.
+  *       Bits are set automatically at Power on.
+  * @rmtoll IMR         IMx           LL_EXTI_IsEnabledIT_0_31
+  * @param  ExtiLine This parameter can be one of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_17
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  *         @arg @ref LL_EXTI_LINE_ALL_0_31
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
+{
+  return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine));
+}
+
+
+/**
+  * @}
+  */
+
+/** @defgroup EXTI_LL_EF_Event_Management Event_Management
+  * @{
+  */
+
+/**
+  * @brief  Enable ExtiLine Event request for Lines in range 0 to 31
+  * @rmtoll EMR         EMx           LL_EXTI_EnableEvent_0_31
+  * @param  ExtiLine This parameter can be one of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_17
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  *         @arg @ref LL_EXTI_LINE_ALL_0_31
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval None
+  */
+__STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
+{
+  SET_BIT(EXTI->EMR, ExtiLine);
+
+}
+
+
+/**
+  * @brief  Disable ExtiLine Event request for Lines in range 0 to 31
+  * @rmtoll EMR         EMx           LL_EXTI_DisableEvent_0_31
+  * @param  ExtiLine This parameter can be one of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_17
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  *         @arg @ref LL_EXTI_LINE_ALL_0_31
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval None
+  */
+__STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
+{
+  CLEAR_BIT(EXTI->EMR, ExtiLine);
+}
+
+
+/**
+  * @brief  Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
+  * @rmtoll EMR         EMx           LL_EXTI_IsEnabledEvent_0_31
+  * @param  ExtiLine This parameter can be one of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_17
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  *         @arg @ref LL_EXTI_LINE_ALL_0_31
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
+{
+  return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine));
+
+}
+
+
+/**
+  * @}
+  */
+
+/** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
+  * @{
+  */
+
+/**
+  * @brief  Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
+  * @note The configurable wakeup lines are edge-triggered. No glitch must be
+  *       generated on these lines. If a rising edge on a configurable interrupt
+  *       line occurs during a write operation in the EXTI_RTSR register, the
+  *       pending bit is not set.
+  *       Rising and falling edge triggers can be set for
+  *       the same interrupt line. In this case, both generate a trigger
+  *       condition.
+  * @rmtoll RTSR        RTx           LL_EXTI_EnableRisingTrig_0_31
+  * @param  ExtiLine This parameter can be a combination of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval None
+  */
+__STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
+{
+  SET_BIT(EXTI->RTSR, ExtiLine);
+
+}
+
+
+/**
+  * @brief  Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
+  * @note The configurable wakeup lines are edge-triggered. No glitch must be
+  *       generated on these lines. If a rising edge on a configurable interrupt
+  *       line occurs during a write operation in the EXTI_RTSR register, the
+  *       pending bit is not set.
+  *       Rising and falling edge triggers can be set for
+  *       the same interrupt line. In this case, both generate a trigger
+  *       condition.
+  * @rmtoll RTSR        RTx           LL_EXTI_DisableRisingTrig_0_31
+  * @param  ExtiLine This parameter can be a combination of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval None
+  */
+__STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
+{
+  CLEAR_BIT(EXTI->RTSR, ExtiLine);
+
+}
+
+
+/**
+  * @brief  Check if rising edge trigger is enabled for Lines in range 0 to 31
+  * @rmtoll RTSR        RTx           LL_EXTI_IsEnabledRisingTrig_0_31
+  * @param  ExtiLine This parameter can be a combination of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
+{
+  return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine));
+}
+
+
+/**
+  * @}
+  */
+
+/** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
+  * @{
+  */
+
+/**
+  * @brief  Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
+  * @note The configurable wakeup lines are edge-triggered. No glitch must be
+  *       generated on these lines. If a falling edge on a configurable interrupt
+  *       line occurs during a write operation in the EXTI_FTSR register, the
+  *       pending bit is not set.
+  *       Rising and falling edge triggers can be set for
+  *       the same interrupt line. In this case, both generate a trigger
+  *       condition.
+  * @rmtoll FTSR        FTx           LL_EXTI_EnableFallingTrig_0_31
+  * @param  ExtiLine This parameter can be a combination of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval None
+  */
+__STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
+{
+  SET_BIT(EXTI->FTSR, ExtiLine);
+}
+
+
+/**
+  * @brief  Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
+  * @note The configurable wakeup lines are edge-triggered. No glitch must be
+  *       generated on these lines. If a Falling edge on a configurable interrupt
+  *       line occurs during a write operation in the EXTI_FTSR register, the
+  *       pending bit is not set.
+  *       Rising and falling edge triggers can be set for the same interrupt line.
+  *       In this case, both generate a trigger condition.
+  * @rmtoll FTSR        FTx           LL_EXTI_DisableFallingTrig_0_31
+  * @param  ExtiLine This parameter can be a combination of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval None
+  */
+__STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
+{
+  CLEAR_BIT(EXTI->FTSR, ExtiLine);
+}
+
+
+/**
+  * @brief  Check if falling edge trigger is enabled for Lines in range 0 to 31
+  * @rmtoll FTSR        FTx           LL_EXTI_IsEnabledFallingTrig_0_31
+  * @param  ExtiLine This parameter can be a combination of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
+{
+  return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine));
+}
+
+
+/**
+  * @}
+  */
+
+/** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
+  * @{
+  */
+
+/**
+  * @brief  Generate a software Interrupt Event for Lines in range 0 to 31
+  * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
+  *       this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
+  *       resulting in an interrupt request generation.
+  *       This bit is cleared by clearing the corresponding bit in the EXTI_PR
+  *       register (by writing a 1 into the bit)
+  * @rmtoll SWIER       SWIx          LL_EXTI_GenerateSWI_0_31
+  * @param  ExtiLine This parameter can be a combination of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval None
+  */
+__STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
+{
+  SET_BIT(EXTI->SWIER, ExtiLine);
+}
+
+
+/**
+  * @}
+  */
+
+/** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
+  * @{
+  */
+
+/**
+  * @brief  Check if the ExtLine Flag is set or not for Lines in range 0 to 31
+  * @note This bit is set when the selected edge event arrives on the interrupt
+  *       line. This bit is cleared by writing a 1 to the bit.
+  * @rmtoll PR          PIFx           LL_EXTI_IsActiveFlag_0_31
+  * @param  ExtiLine This parameter can be a combination of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
+{
+  return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine));
+}
+
+
+/**
+  * @brief  Read ExtLine Combination Flag for Lines in range 0 to 31
+  * @note This bit is set when the selected edge event arrives on the interrupt
+  *       line. This bit is cleared by writing a 1 to the bit.
+  * @rmtoll PR          PIFx           LL_EXTI_ReadFlag_0_31
+  * @param  ExtiLine This parameter can be a combination of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval @note This bit is set when the selected edge event arrives on the interrupt
+  */
+__STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
+{
+  return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine));
+}
+
+
+/**
+  * @brief  Clear ExtLine Flags  for Lines in range 0 to 31
+  * @note This bit is set when the selected edge event arrives on the interrupt
+  *       line. This bit is cleared by writing a 1 to the bit.
+  * @rmtoll PR          PIFx           LL_EXTI_ClearFlag_0_31
+  * @param  ExtiLine This parameter can be a combination of the following values:
+  *         @arg @ref LL_EXTI_LINE_0
+  *         @arg @ref LL_EXTI_LINE_1
+  *         @arg @ref LL_EXTI_LINE_2
+  *         @arg @ref LL_EXTI_LINE_3
+  *         @arg @ref LL_EXTI_LINE_4
+  *         @arg @ref LL_EXTI_LINE_5
+  *         @arg @ref LL_EXTI_LINE_6
+  *         @arg @ref LL_EXTI_LINE_7
+  *         @arg @ref LL_EXTI_LINE_8
+  *         @arg @ref LL_EXTI_LINE_9
+  *         @arg @ref LL_EXTI_LINE_10
+  *         @arg @ref LL_EXTI_LINE_11
+  *         @arg @ref LL_EXTI_LINE_12
+  *         @arg @ref LL_EXTI_LINE_13
+  *         @arg @ref LL_EXTI_LINE_14
+  *         @arg @ref LL_EXTI_LINE_15
+  *         @arg @ref LL_EXTI_LINE_16
+  *         @arg @ref LL_EXTI_LINE_18
+  *         @arg @ref LL_EXTI_LINE_19
+  * @note   Please check each device line mapping for EXTI Line availability
+  * @retval None
+  */
+__STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
+{
+  WRITE_REG(EXTI->PR, ExtiLine);
+}
+
+
+/**
+  * @}
+  */
+
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
+  * @{
+  */
+
+uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
+uint32_t LL_EXTI_DeInit(void);
+void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
+
+
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* EXTI */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32F1xx_LL_EXTI_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h
new file mode 100644
index 0000000..c6f41d5
--- /dev/null
+++ b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h
@@ -0,0 +1,2347 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_ll_gpio.h
+  * @author  MCD Application Team
+  * @brief   Header file of GPIO LL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32F1xx_LL_GPIO_H
+#define STM32F1xx_LL_GPIO_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx.h"
+
+/** @addtogroup STM32F1xx_LL_Driver
+  * @{
+  */
+
+#if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG)
+
+/** @defgroup GPIO_LL GPIO
+  * @{
+  */
+
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private constants ---------------------------------------------------------*/
+
+/** @defgroup GPIO_LL_Private_Constants GPIO Private Constants
+  * @{
+  */
+/* Defines used for Pin Mask Initialization */
+#define GPIO_PIN_MASK_POS   8U
+#define GPIO_PIN_NB         16U
+/**
+  * @}
+  */
+
+/* Private macros ------------------------------------------------------------*/
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup GPIO_LL_Private_Macros GPIO Private Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+#endif /*USE_FULL_LL_DRIVER*/
+
+/* Exported types ------------------------------------------------------------*/
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup GPIO_LL_ES_INIT GPIO Exported Init structures
+  * @{
+  */
+
+/**
+  * @brief LL GPIO Init Structure definition
+  */
+typedef struct
+{
+  uint32_t Pin;          /*!< Specifies the GPIO pins to be configured.
+                              This parameter can be any value of @ref GPIO_LL_EC_PIN */
+
+  uint32_t Mode;         /*!< Specifies the operating mode for the selected pins.
+                              This parameter can be a value of @ref GPIO_LL_EC_MODE.
+
+                              GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinMode().*/
+
+  uint32_t Speed;        /*!< Specifies the speed for the selected pins.
+                              This parameter can be a value of @ref GPIO_LL_EC_SPEED.
+
+                              GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinSpeed().*/
+
+  uint32_t OutputType;   /*!< Specifies the operating output type for the selected pins.
+                              This parameter can be a value of @ref GPIO_LL_EC_OUTPUT.
+
+                              GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinOutputType().*/
+
+  uint32_t Pull;         /*!< Specifies the operating Pull-up/Pull down for the selected pins.
+                              This parameter can be a value of @ref GPIO_LL_EC_PULL.
+
+                              GPIO HW configuration can be modified afterwards using unitary function @ref LL_GPIO_SetPinPull().*/
+} LL_GPIO_InitTypeDef;
+
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup GPIO_LL_Exported_Constants GPIO Exported Constants
+  * @{
+  */
+
+/** @defgroup GPIO_LL_EC_PIN PIN
+  * @{
+  */
+#define LL_GPIO_PIN_0                    ((GPIO_BSRR_BS0  << GPIO_PIN_MASK_POS) | 0x00000001U)  /*!< Select pin 0  */
+#define LL_GPIO_PIN_1                    ((GPIO_BSRR_BS1  << GPIO_PIN_MASK_POS) | 0x00000002U)  /*!< Select pin 1  */
+#define LL_GPIO_PIN_2                    ((GPIO_BSRR_BS2  << GPIO_PIN_MASK_POS) | 0x00000004U)  /*!< Select pin 2  */
+#define LL_GPIO_PIN_3                    ((GPIO_BSRR_BS3  << GPIO_PIN_MASK_POS) | 0x00000008U)  /*!< Select pin 3  */
+#define LL_GPIO_PIN_4                    ((GPIO_BSRR_BS4  << GPIO_PIN_MASK_POS) | 0x00000010U)  /*!< Select pin 4  */
+#define LL_GPIO_PIN_5                    ((GPIO_BSRR_BS5  << GPIO_PIN_MASK_POS) | 0x00000020U)  /*!< Select pin 5  */
+#define LL_GPIO_PIN_6                    ((GPIO_BSRR_BS6  << GPIO_PIN_MASK_POS) | 0x00000040U)  /*!< Select pin 6  */
+#define LL_GPIO_PIN_7                    ((GPIO_BSRR_BS7  << GPIO_PIN_MASK_POS) | 0x00000080U)  /*!< Select pin 7  */
+#define LL_GPIO_PIN_8                    ((GPIO_BSRR_BS8  << GPIO_PIN_MASK_POS) | 0x04000001U)  /*!< Select pin 8  */
+#define LL_GPIO_PIN_9                    ((GPIO_BSRR_BS9  << GPIO_PIN_MASK_POS) | 0x04000002U)  /*!< Select pin 9  */
+#define LL_GPIO_PIN_10                   ((GPIO_BSRR_BS10 << GPIO_PIN_MASK_POS) | 0x04000004U)  /*!< Select pin 10 */
+#define LL_GPIO_PIN_11                   ((GPIO_BSRR_BS11 << GPIO_PIN_MASK_POS) | 0x04000008U)  /*!< Select pin 11 */
+#define LL_GPIO_PIN_12                   ((GPIO_BSRR_BS12 << GPIO_PIN_MASK_POS) | 0x04000010U)  /*!< Select pin 12 */
+#define LL_GPIO_PIN_13                   ((GPIO_BSRR_BS13 << GPIO_PIN_MASK_POS) | 0x04000020U)  /*!< Select pin 13 */
+#define LL_GPIO_PIN_14                   ((GPIO_BSRR_BS14 << GPIO_PIN_MASK_POS) | 0x04000040U)  /*!< Select pin 14 */
+#define LL_GPIO_PIN_15                   ((GPIO_BSRR_BS15 << GPIO_PIN_MASK_POS) | 0x04000080U)  /*!< Select pin 15 */
+#define LL_GPIO_PIN_ALL                  (LL_GPIO_PIN_0  | LL_GPIO_PIN_1  | LL_GPIO_PIN_2  | \
+                                          LL_GPIO_PIN_3  | LL_GPIO_PIN_4  | LL_GPIO_PIN_5  | \
+                                          LL_GPIO_PIN_6  | LL_GPIO_PIN_7  | LL_GPIO_PIN_8  | \
+                                          LL_GPIO_PIN_9  | LL_GPIO_PIN_10 | LL_GPIO_PIN_11 | \
+                                          LL_GPIO_PIN_12 | LL_GPIO_PIN_13 | LL_GPIO_PIN_14 | \
+                                          LL_GPIO_PIN_15)                                      /*!< Select all pins */
+/**
+  * @}
+  */
+
+/** @defgroup GPIO_LL_EC_MODE Mode
+  * @{
+  */
+#define LL_GPIO_MODE_ANALOG              0x00000000U       /*!< Select analog mode */
+#define LL_GPIO_MODE_FLOATING            GPIO_CRL_CNF0_0   /*!< Select floating mode */
+#define LL_GPIO_MODE_INPUT               GPIO_CRL_CNF0_1   /*!< Select input mode */
+#define LL_GPIO_MODE_OUTPUT              GPIO_CRL_MODE0_0  /*!< Select general purpose output mode */
+#define LL_GPIO_MODE_ALTERNATE           (GPIO_CRL_CNF0_1 | GPIO_CRL_MODE0_0) /*!< Select alternate function mode */
+/**
+  * @}
+  */
+
+/** @defgroup GPIO_LL_EC_OUTPUT Output Type
+  * @{
+  */
+#define LL_GPIO_OUTPUT_PUSHPULL          0x00000000U                /*!< Select push-pull as output type */
+#define LL_GPIO_OUTPUT_OPENDRAIN         GPIO_CRL_CNF0_0            /*!< Select open-drain as output type */
+/**
+  * @}
+  */
+
+/** @defgroup GPIO_LL_EC_SPEED Output Speed
+  * @{
+  */
+#define LL_GPIO_MODE_OUTPUT_10MHz        GPIO_CRL_MODE0_0            /*!< Select Output mode, max speed 10 MHz */
+#define LL_GPIO_MODE_OUTPUT_2MHz         GPIO_CRL_MODE0_1            /*!< Select Output mode, max speed 20 MHz */
+#define LL_GPIO_MODE_OUTPUT_50MHz        GPIO_CRL_MODE0              /*!< Select Output mode, max speed 50 MHz */
+/**
+  * @}
+  */
+
+#define LL_GPIO_SPEED_FREQ_LOW           LL_GPIO_MODE_OUTPUT_2MHz    /*!< Select I/O low output speed    */
+#define LL_GPIO_SPEED_FREQ_MEDIUM        LL_GPIO_MODE_OUTPUT_10MHz   /*!< Select I/O medium output speed */
+#define LL_GPIO_SPEED_FREQ_HIGH          LL_GPIO_MODE_OUTPUT_50MHz   /*!< Select I/O high output speed   */
+
+/** @defgroup GPIO_LL_EC_PULL Pull Up Pull Down
+  * @{
+  */
+#define LL_GPIO_PULL_DOWN                0x00000000U    /*!< Select I/O pull down */
+#define LL_GPIO_PULL_UP                  GPIO_ODR_ODR0  /*!< Select I/O pull up */
+
+/**
+  * @}
+  */
+
+/** @defgroup GPIO_LL_EVENTOUT_PIN EVENTOUT Pin
+  * @{
+  */
+
+#define LL_GPIO_AF_EVENTOUT_PIN_0        AFIO_EVCR_PIN_PX0   /*!< EVENTOUT on pin 0 */
+#define LL_GPIO_AF_EVENTOUT_PIN_1        AFIO_EVCR_PIN_PX1   /*!< EVENTOUT on pin 1 */
+#define LL_GPIO_AF_EVENTOUT_PIN_2        AFIO_EVCR_PIN_PX2   /*!< EVENTOUT on pin 2 */
+#define LL_GPIO_AF_EVENTOUT_PIN_3        AFIO_EVCR_PIN_PX3   /*!< EVENTOUT on pin 3 */
+#define LL_GPIO_AF_EVENTOUT_PIN_4        AFIO_EVCR_PIN_PX4   /*!< EVENTOUT on pin 4 */
+#define LL_GPIO_AF_EVENTOUT_PIN_5        AFIO_EVCR_PIN_PX5   /*!< EVENTOUT on pin 5 */
+#define LL_GPIO_AF_EVENTOUT_PIN_6        AFIO_EVCR_PIN_PX6   /*!< EVENTOUT on pin 6 */
+#define LL_GPIO_AF_EVENTOUT_PIN_7        AFIO_EVCR_PIN_PX7   /*!< EVENTOUT on pin 7 */
+#define LL_GPIO_AF_EVENTOUT_PIN_8        AFIO_EVCR_PIN_PX8   /*!< EVENTOUT on pin 8 */
+#define LL_GPIO_AF_EVENTOUT_PIN_9        AFIO_EVCR_PIN_PX9   /*!< EVENTOUT on pin 9 */
+#define LL_GPIO_AF_EVENTOUT_PIN_10       AFIO_EVCR_PIN_PX10  /*!< EVENTOUT on pin 10 */
+#define LL_GPIO_AF_EVENTOUT_PIN_11       AFIO_EVCR_PIN_PX11  /*!< EVENTOUT on pin 11 */
+#define LL_GPIO_AF_EVENTOUT_PIN_12       AFIO_EVCR_PIN_PX12  /*!< EVENTOUT on pin 12 */
+#define LL_GPIO_AF_EVENTOUT_PIN_13       AFIO_EVCR_PIN_PX13  /*!< EVENTOUT on pin 13 */
+#define LL_GPIO_AF_EVENTOUT_PIN_14       AFIO_EVCR_PIN_PX14  /*!< EVENTOUT on pin 14 */
+#define LL_GPIO_AF_EVENTOUT_PIN_15       AFIO_EVCR_PIN_PX15  /*!< EVENTOUT on pin 15 */
+
+/**
+  * @}
+  */
+
+/** @defgroup GPIO_LL_EVENTOUT_PORT EVENTOUT Port
+  * @{
+  */
+
+#define LL_GPIO_AF_EVENTOUT_PORT_A       AFIO_EVCR_PORT_PA  /*!< EVENTOUT on port A */
+#define LL_GPIO_AF_EVENTOUT_PORT_B       AFIO_EVCR_PORT_PB  /*!< EVENTOUT on port B */
+#define LL_GPIO_AF_EVENTOUT_PORT_C       AFIO_EVCR_PORT_PC  /*!< EVENTOUT on port C */
+#define LL_GPIO_AF_EVENTOUT_PORT_D       AFIO_EVCR_PORT_PD  /*!< EVENTOUT on port D */
+#define LL_GPIO_AF_EVENTOUT_PORT_E       AFIO_EVCR_PORT_PE  /*!< EVENTOUT on port E */
+
+/**
+  * @}
+  */
+
+/** @defgroup GPIO_LL_EC_EXTI_PORT GPIO EXTI PORT
+  * @{
+  */
+#define LL_GPIO_AF_EXTI_PORTA            0U   /*!< EXTI PORT A */
+#define LL_GPIO_AF_EXTI_PORTB            1U   /*!< EXTI PORT B */
+#define LL_GPIO_AF_EXTI_PORTC            2U   /*!< EXTI PORT C */
+#define LL_GPIO_AF_EXTI_PORTD            3U   /*!< EXTI PORT D */
+#define LL_GPIO_AF_EXTI_PORTE            4U   /*!< EXTI PORT E */
+#define LL_GPIO_AF_EXTI_PORTF            5U   /*!< EXTI PORT F */
+#define LL_GPIO_AF_EXTI_PORTG            6U   /*!< EXTI PORT G */
+/**
+  * @}
+  */
+
+/** @defgroup GPIO_LL_EC_EXTI_LINE GPIO EXTI LINE
+  * @{
+  */
+#define LL_GPIO_AF_EXTI_LINE0            (0x000FU << 16U | 0U)  /*!< EXTI_POSITION_0  | EXTICR[0] */
+#define LL_GPIO_AF_EXTI_LINE1            (0x00F0U << 16U | 0U)  /*!< EXTI_POSITION_4  | EXTICR[0] */
+#define LL_GPIO_AF_EXTI_LINE2            (0x0F00U << 16U | 0U)  /*!< EXTI_POSITION_8  | EXTICR[0] */
+#define LL_GPIO_AF_EXTI_LINE3            (0xF000U << 16U | 0U)  /*!< EXTI_POSITION_12 | EXTICR[0] */
+#define LL_GPIO_AF_EXTI_LINE4            (0x000FU << 16U | 1U)  /*!< EXTI_POSITION_0  | EXTICR[1] */
+#define LL_GPIO_AF_EXTI_LINE5            (0x00F0U << 16U | 1U)  /*!< EXTI_POSITION_4  | EXTICR[1] */
+#define LL_GPIO_AF_EXTI_LINE6            (0x0F00U << 16U | 1U)  /*!< EXTI_POSITION_8  | EXTICR[1] */
+#define LL_GPIO_AF_EXTI_LINE7            (0xF000U << 16U | 1U)  /*!< EXTI_POSITION_12 | EXTICR[1] */
+#define LL_GPIO_AF_EXTI_LINE8            (0x000FU << 16U | 2U)  /*!< EXTI_POSITION_0  | EXTICR[2] */
+#define LL_GPIO_AF_EXTI_LINE9            (0x00F0U << 16U | 2U)  /*!< EXTI_POSITION_4  | EXTICR[2] */
+#define LL_GPIO_AF_EXTI_LINE10           (0x0F00U << 16U | 2U)  /*!< EXTI_POSITION_8  | EXTICR[2] */
+#define LL_GPIO_AF_EXTI_LINE11           (0xF000U << 16U | 2U)  /*!< EXTI_POSITION_12 | EXTICR[2] */
+#define LL_GPIO_AF_EXTI_LINE12           (0x000FU << 16U | 3U)  /*!< EXTI_POSITION_0  | EXTICR[3] */
+#define LL_GPIO_AF_EXTI_LINE13           (0x00F0U << 16U | 3U)  /*!< EXTI_POSITION_4  | EXTICR[3] */
+#define LL_GPIO_AF_EXTI_LINE14           (0x0F00U << 16U | 3U)  /*!< EXTI_POSITION_8  | EXTICR[3] */
+#define LL_GPIO_AF_EXTI_LINE15           (0xF000U << 16U | 3U)  /*!< EXTI_POSITION_12 | EXTICR[3] */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup GPIO_LL_Exported_Macros GPIO Exported Macros
+  * @{
+  */
+
+/** @defgroup GPIO_LL_EM_WRITE_READ Common Write and read registers Macros
+  * @{
+  */
+
+/**
+  * @brief  Write a value in GPIO register
+  * @param  __INSTANCE__ GPIO Instance
+  * @param  __REG__ Register to be written
+  * @param  __VALUE__ Value to be written in the register
+  * @retval None
+  */
+#define LL_GPIO_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
+
+/**
+  * @brief  Read a value in GPIO register
+  * @param  __INSTANCE__ GPIO Instance
+  * @param  __REG__ Register to be read
+  * @retval Register value
+  */
+#define LL_GPIO_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup GPIO_LL_Exported_Functions GPIO Exported Functions
+  * @{
+  */
+
+/** @defgroup GPIO_LL_EF_Port_Configuration Port Configuration
+  * @{
+  */
+
+/**
+  * @brief  Configure gpio mode for a dedicated pin on dedicated port.
+  * @note   I/O mode can be Analog, Floating input, Input with pull-up/pull-down, General purpose Output,
+  *         Alternate function Output.
+  * @note   Warning: only one pin can be passed as parameter.
+  * @rmtoll CRL        CNFy         LL_GPIO_SetPinMode
+  * @rmtoll CRL        MODEy        LL_GPIO_SetPinMode
+  * @rmtoll CRH        CNFy         LL_GPIO_SetPinMode
+  * @rmtoll CRH        MODEy        LL_GPIO_SetPinMode
+  * @param  GPIOx GPIO Port
+  * @param  Pin This parameter can be one of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  * @param  Mode This parameter can be one of the following values:
+  *         @arg @ref LL_GPIO_MODE_ANALOG
+  *         @arg @ref LL_GPIO_MODE_FLOATING
+  *         @arg @ref LL_GPIO_MODE_INPUT
+  *         @arg @ref LL_GPIO_MODE_OUTPUT
+  *         @arg @ref LL_GPIO_MODE_ALTERNATE
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Mode)
+{
+  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&GPIOx->CRL) + (Pin >> 24)));
+  MODIFY_REG(*pReg, ((GPIO_CRL_CNF0 | GPIO_CRL_MODE0) << (POSITION_VAL(Pin) * 4U)), (Mode << (POSITION_VAL(Pin) * 4U)));
+}
+
+/**
+  * @brief  Return gpio mode for a dedicated pin on dedicated port.
+  * @note   I/O mode can be Analog, Floating input, Input with pull-up/pull-down, General purpose Output,
+  *         Alternate function Output.
+  * @note   Warning: only one pin can be passed as parameter.
+  * @rmtoll CRL        CNFy         LL_GPIO_GetPinMode
+  * @rmtoll CRL        MODEy        LL_GPIO_GetPinMode
+  * @rmtoll CRH        CNFy         LL_GPIO_GetPinMode
+  * @rmtoll CRH        MODEy        LL_GPIO_GetPinMode
+  * @param  GPIOx GPIO Port
+  * @param  Pin This parameter can be one of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_GPIO_MODE_ANALOG
+  *         @arg @ref LL_GPIO_MODE_FLOATING
+  *         @arg @ref LL_GPIO_MODE_INPUT
+  *         @arg @ref LL_GPIO_MODE_OUTPUT
+  *         @arg @ref LL_GPIO_MODE_ALTERNATE
+  */
+__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
+{
+  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&GPIOx->CRL) + (Pin >> 24)));
+  return (READ_BIT(*pReg, ((GPIO_CRL_CNF0 | GPIO_CRL_MODE0) << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U));
+}
+
+/**
+  * @brief  Configure gpio speed for a dedicated pin on dedicated port.
+  * @note   I/O speed can be Low, Medium or Fast speed.
+  * @note   Warning: only one pin can be passed as parameter.
+  * @note   Refer to datasheet for frequency specifications and the power
+  *         supply and load conditions for each speed.
+  * @rmtoll CRL      MODEy       LL_GPIO_SetPinSpeed
+  * @rmtoll CRH      MODEy       LL_GPIO_SetPinSpeed
+  * @param  GPIOx GPIO Port
+  * @param  Pin This parameter can be one of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  * @param  Speed This parameter can be one of the following values:
+  *         @arg @ref LL_GPIO_SPEED_FREQ_LOW
+  *         @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
+  *         @arg @ref LL_GPIO_SPEED_FREQ_HIGH
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t  Speed)
+{
+  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&GPIOx->CRL) + (Pin >> 24)));
+  MODIFY_REG(*pReg, (GPIO_CRL_MODE0 << (POSITION_VAL(Pin) * 4U)),
+             (Speed << (POSITION_VAL(Pin) * 4U)));
+}
+
+/**
+  * @brief  Return gpio speed for a dedicated pin on dedicated port.
+  * @note   I/O speed can be Low, Medium, Fast or High speed.
+  * @note   Warning: only one pin can be passed as parameter.
+  * @note   Refer to datasheet for frequency specifications and the power
+  *         supply and load conditions for each speed.
+  * @rmtoll CRL      MODEy       LL_GPIO_GetPinSpeed
+  * @rmtoll CRH      MODEy       LL_GPIO_GetPinSpeed
+  * @param  GPIOx GPIO Port
+  * @param  Pin This parameter can be one of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_GPIO_SPEED_FREQ_LOW
+  *         @arg @ref LL_GPIO_SPEED_FREQ_MEDIUM
+  *         @arg @ref LL_GPIO_SPEED_FREQ_HIGH
+  */
+__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
+{
+  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&GPIOx->CRL) + (Pin >> 24)));
+  return (READ_BIT(*pReg, (GPIO_CRL_MODE0 << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U));
+}
+
+/**
+  * @brief  Configure gpio output type for several pins on dedicated port.
+  * @note   Output type as to be set when gpio pin is in output or
+  *         alternate modes. Possible type are Push-pull or Open-drain.
+  * @rmtoll CRL       MODEy           LL_GPIO_SetPinOutputType
+  * @rmtoll CRH       MODEy           LL_GPIO_SetPinOutputType
+  * @param  GPIOx GPIO Port
+  * @param  Pin This parameter can be a combination of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  *         @arg @ref LL_GPIO_PIN_ALL
+  * @param  OutputType This parameter can be one of the following values:
+  *         @arg @ref LL_GPIO_OUTPUT_PUSHPULL
+  *         @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t OutputType)
+{
+  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&GPIOx->CRL) + (Pin >> 24)));
+  MODIFY_REG(*pReg, (GPIO_CRL_CNF0_0 << (POSITION_VAL(Pin) * 4U)),
+             (OutputType << (POSITION_VAL(Pin) * 4U)));
+}
+
+/**
+  * @brief  Return gpio output type for several pins on dedicated port.
+  * @note   Output type as to be set when gpio pin is in output or
+  *         alternate modes. Possible type are Push-pull or Open-drain.
+  * @note   Warning: only one pin can be passed as parameter.
+  * @rmtoll CRL       MODEy       LL_GPIO_GetPinOutputType
+  * @rmtoll CRH       MODEy       LL_GPIO_GetPinOutputType
+  * @param  GPIOx GPIO Port
+  * @param  Pin This parameter can be one of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  *         @arg @ref LL_GPIO_PIN_ALL
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_GPIO_OUTPUT_PUSHPULL
+  *         @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
+  */
+__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
+{
+  register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&GPIOx->CRL) + (Pin >> 24)));
+  return (READ_BIT(*pReg, (GPIO_CRL_CNF0_0 << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U));
+
+}
+
+/**
+  * @brief  Configure gpio pull-up or pull-down for a dedicated pin on a dedicated port.
+  * @note   Warning: only one pin can be passed as parameter.
+  * @rmtoll ODR        ODR         LL_GPIO_SetPinPull
+  * @param  GPIOx GPIO Port
+  * @param  Pin This parameter can be one of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  * @param  Pull This parameter can be one of the following values:
+  *         @arg @ref LL_GPIO_PULL_DOWN
+  *         @arg @ref LL_GPIO_PULL_UP
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint32_t Pull)
+{
+  MODIFY_REG(GPIOx->ODR, (Pin >> GPIO_PIN_MASK_POS), Pull << (POSITION_VAL(Pin >> GPIO_PIN_MASK_POS)));
+}
+
+/**
+  * @brief  Return gpio pull-up or pull-down for a dedicated pin on a dedicated port
+  * @note   Warning: only one pin can be passed as parameter.
+  * @rmtoll ODR        ODR         LL_GPIO_GetPinPull
+  * @param  GPIOx GPIO Port
+  * @param  Pin This parameter can be one of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_GPIO_PULL_DOWN
+  *         @arg @ref LL_GPIO_PULL_UP
+  */
+__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
+{
+  return (READ_BIT(GPIOx->ODR, (GPIO_ODR_ODR0 << (POSITION_VAL(Pin >> GPIO_PIN_MASK_POS)))) >> (POSITION_VAL(Pin >> GPIO_PIN_MASK_POS)));
+}
+
+/**
+  * @brief  Lock configuration of several pins for a dedicated port.
+  * @note   When the lock sequence has been applied on a port bit, the
+  *         value of this port bit can no longer be modified until the
+  *         next reset.
+  * @note   Each lock bit freezes a specific configuration register
+  *         (control and alternate function registers).
+  * @rmtoll LCKR         LCKK          LL_GPIO_LockPin
+  * @param  GPIOx GPIO Port
+  * @param  PinMask This parameter can be a combination of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  *         @arg @ref LL_GPIO_PIN_ALL
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+{
+  __IO uint32_t temp;
+  WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | ((PinMask >> GPIO_PIN_MASK_POS) & 0x0000FFFFU));
+  WRITE_REG(GPIOx->LCKR, ((PinMask >> GPIO_PIN_MASK_POS) & 0x0000FFFFU));
+  WRITE_REG(GPIOx->LCKR, GPIO_LCKR_LCKK | ((PinMask >> GPIO_PIN_MASK_POS) & 0x0000FFFFU));
+  temp = READ_REG(GPIOx->LCKR);
+  (void) temp;
+}
+
+/**
+  * @brief  Return 1 if all pins passed as parameter, of a dedicated port, are locked. else Return 0.
+  * @rmtoll LCKR         LCKy          LL_GPIO_IsPinLocked
+  * @param  GPIOx GPIO Port
+  * @param  PinMask This parameter can be a combination of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  *         @arg @ref LL_GPIO_PIN_ALL
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+{
+  return (READ_BIT(GPIOx->LCKR, ((PinMask >> GPIO_PIN_MASK_POS) & 0x0000FFFFU)) == ((PinMask >> GPIO_PIN_MASK_POS) & 0x0000FFFFU));
+}
+
+/**
+  * @brief  Return 1 if one of the pin of a dedicated port is locked. else return 0.
+  * @rmtoll LCKR         LCKK          LL_GPIO_IsAnyPinLocked
+  * @param  GPIOx GPIO Port
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
+{
+  return (READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup GPIO_LL_EF_Data_Access Data Access
+  * @{
+  */
+
+/**
+  * @brief  Return full input data register value for a dedicated port.
+  * @rmtoll IDR          IDy           LL_GPIO_ReadInputPort
+  * @param  GPIOx GPIO Port
+  * @retval Input data register value of port
+  */
+__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
+{
+  return (READ_REG(GPIOx->IDR));
+}
+
+/**
+  * @brief  Return if input data level for several pins of dedicated port is high or low.
+  * @rmtoll IDR          IDy           LL_GPIO_IsInputPinSet
+  * @param  GPIOx GPIO Port
+  * @param  PinMask This parameter can be a combination of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  *         @arg @ref LL_GPIO_PIN_ALL
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+{
+  return (READ_BIT(GPIOx->IDR, (PinMask >> GPIO_PIN_MASK_POS) & 0x0000FFFFU) == ((PinMask >> GPIO_PIN_MASK_POS) & 0x0000FFFFU));
+}
+
+/**
+  * @brief  Write output data register for the port.
+  * @rmtoll ODR          ODy           LL_GPIO_WriteOutputPort
+  * @param  GPIOx GPIO Port
+  * @param  PortValue Level value for each pin of the port
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortValue)
+{
+  WRITE_REG(GPIOx->ODR, PortValue);
+}
+
+/**
+  * @brief  Return full output data register value for a dedicated port.
+  * @rmtoll ODR          ODy           LL_GPIO_ReadOutputPort
+  * @param  GPIOx GPIO Port
+  * @retval Output data register value of port
+  */
+__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
+{
+  return (uint32_t)(READ_REG(GPIOx->ODR));
+}
+
+/**
+  * @brief  Return if input data level for several pins of dedicated port is high or low.
+  * @rmtoll ODR          ODy           LL_GPIO_IsOutputPinSet
+  * @param  GPIOx GPIO Port
+  * @param  PinMask This parameter can be a combination of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  *         @arg @ref LL_GPIO_PIN_ALL
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+{
+  return (READ_BIT(GPIOx->ODR, (PinMask >> GPIO_PIN_MASK_POS) & 0x0000FFFFU) == ((PinMask >> GPIO_PIN_MASK_POS) & 0x0000FFFFU));
+}
+
+/**
+  * @brief  Set several pins to high level on dedicated gpio port.
+  * @rmtoll BSRR         BSy           LL_GPIO_SetOutputPin
+  * @param  GPIOx GPIO Port
+  * @param  PinMask This parameter can be a combination of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  *         @arg @ref LL_GPIO_PIN_ALL
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+{
+  WRITE_REG(GPIOx->BSRR, (PinMask >> GPIO_PIN_MASK_POS) & 0x0000FFFFU);
+}
+
+/**
+  * @brief  Set several pins to low level on dedicated gpio port.
+  * @rmtoll BRR          BRy           LL_GPIO_ResetOutputPin
+  * @param  GPIOx GPIO Port
+  * @param  PinMask This parameter can be a combination of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  *         @arg @ref LL_GPIO_PIN_ALL
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_ResetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+{
+  WRITE_REG(GPIOx->BRR, (PinMask >> GPIO_PIN_MASK_POS) & 0x0000FFFFU);
+}
+
+/**
+  * @brief  Toggle data value for several pin of dedicated port.
+  * @rmtoll ODR          ODy           LL_GPIO_TogglePin
+  * @param  GPIOx GPIO Port
+  * @param  PinMask This parameter can be a combination of the following values:
+  *         @arg @ref LL_GPIO_PIN_0
+  *         @arg @ref LL_GPIO_PIN_1
+  *         @arg @ref LL_GPIO_PIN_2
+  *         @arg @ref LL_GPIO_PIN_3
+  *         @arg @ref LL_GPIO_PIN_4
+  *         @arg @ref LL_GPIO_PIN_5
+  *         @arg @ref LL_GPIO_PIN_6
+  *         @arg @ref LL_GPIO_PIN_7
+  *         @arg @ref LL_GPIO_PIN_8
+  *         @arg @ref LL_GPIO_PIN_9
+  *         @arg @ref LL_GPIO_PIN_10
+  *         @arg @ref LL_GPIO_PIN_11
+  *         @arg @ref LL_GPIO_PIN_12
+  *         @arg @ref LL_GPIO_PIN_13
+  *         @arg @ref LL_GPIO_PIN_14
+  *         @arg @ref LL_GPIO_PIN_15
+  *         @arg @ref LL_GPIO_PIN_ALL
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+{
+  uint32_t odr = READ_REG(GPIOx->ODR);
+  uint32_t pinmask = ((PinMask >> GPIO_PIN_MASK_POS) & 0x0000FFFFU);
+  WRITE_REG(GPIOx->BSRR, ((odr & pinmask) << 16u) | (~odr & pinmask));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup GPIO_AF_REMAPPING Alternate Function Remapping
+  * @brief This section propose definition to remap the alternate function to some other port/pins.
+  * @{
+  */
+
+/**
+  * @brief  Enable the remapping of SPI1 alternate function NSS, SCK, MISO and MOSI.
+  * @rmtoll MAPR          SPI1_REMAP           LL_GPIO_AF_EnableRemap_SPI1
+  * @note   ENABLE: Remap (NSS/PA15, SCK/PB3, MISO/PB4, MOSI/PB5)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_SPI1(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_SPI1_REMAP | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Disable the remapping of SPI1 alternate function NSS, SCK, MISO and MOSI.
+  * @rmtoll MAPR          SPI1_REMAP           LL_GPIO_AF_DisableRemap_SPI1
+  * @note  DISABLE: No remap (NSS/PA4,  SCK/PA5, MISO/PA6, MOSI/PA7)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_SPI1(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_SPI1_REMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief  Check if SPI1 has been remaped or not
+  * @rmtoll MAPR         SPI1_REMAP         LL_GPIO_AF_IsEnabledRemap_SPI1
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_SPI1(void)
+{
+  return (READ_BIT(AFIO->MAPR, AFIO_MAPR_SPI1_REMAP) == (AFIO_MAPR_SPI1_REMAP));
+}
+
+/**
+  * @brief Enable the remapping of I2C1 alternate function SCL and SDA.
+  * @rmtoll MAPR          I2C1_REMAP           LL_GPIO_AF_EnableRemap_I2C1
+  * @note  ENABLE: Remap     (SCL/PB8, SDA/PB9)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_I2C1(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_I2C1_REMAP | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Disable the remapping of I2C1 alternate function SCL and SDA.
+  * @rmtoll MAPR          I2C1_REMAP           LL_GPIO_AF_DisableRemap_I2C1
+  * @note  DISABLE: No remap (SCL/PB6, SDA/PB7)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_I2C1(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_I2C1_REMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief  Check if I2C1 has been remaped or not
+  * @rmtoll MAPR         I2C1_REMAP         LL_GPIO_AF_IsEnabledRemap_I2C1
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_I2C1(void)
+{
+  return (READ_BIT(AFIO->MAPR, AFIO_MAPR_I2C1_REMAP) == (AFIO_MAPR_I2C1_REMAP));
+}
+
+/**
+  * @brief Enable the remapping of USART1 alternate function TX and RX.
+  * @rmtoll MAPR          USART1_REMAP           LL_GPIO_AF_EnableRemap_USART1
+  * @note  ENABLE: Remap     (TX/PB6, RX/PB7)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_USART1(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_USART1_REMAP | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Disable the remapping of USART1 alternate function TX and RX.
+  * @rmtoll MAPR          USART1_REMAP           LL_GPIO_AF_DisableRemap_USART1
+  * @note  DISABLE: No remap (TX/PA9, RX/PA10)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_USART1(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_USART1_REMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief  Check if USART1 has been remaped or not
+  * @rmtoll MAPR         USART1_REMAP         LL_GPIO_AF_IsEnabledRemap_USART1
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_USART1(void)
+{
+  return (READ_BIT(AFIO->MAPR, AFIO_MAPR_USART1_REMAP) == (AFIO_MAPR_USART1_REMAP));
+}
+
+/**
+  * @brief Enable the remapping of USART2 alternate function CTS, RTS, CK, TX and RX.
+  * @rmtoll MAPR          USART2_REMAP           LL_GPIO_AF_EnableRemap_USART2
+  * @note  ENABLE: Remap     (CTS/PD3, RTS/PD4, TX/PD5, RX/PD6, CK/PD7)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_USART2(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_USART2_REMAP | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Disable the remapping of USART2 alternate function CTS, RTS, CK, TX and RX.
+  * @rmtoll MAPR          USART2_REMAP           LL_GPIO_AF_DisableRemap_USART2
+  * @note  DISABLE: No remap (CTS/PA0, RTS/PA1, TX/PA2, RX/PA3, CK/PA4)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_USART2(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_USART2_REMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief  Check if USART2 has been remaped or not
+  * @rmtoll MAPR         USART2_REMAP         LL_GPIO_AF_IsEnabledRemap_USART2
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_USART2(void)
+{
+  return (READ_BIT(AFIO->MAPR, AFIO_MAPR_USART2_REMAP) == (AFIO_MAPR_USART2_REMAP));
+}
+
+#if defined (AFIO_MAPR_USART3_REMAP)
+/**
+  * @brief Enable the remapping of USART3 alternate function CTS, RTS, CK, TX and RX.
+  * @rmtoll MAPR          USART3_REMAP           LL_GPIO_AF_EnableRemap_USART3
+  * @note  ENABLE: Full remap     (TX/PD8,  RX/PD9,  CK/PD10, CTS/PD11, RTS/PD12)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_USART3(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_USART3_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_USART3_REMAP_FULLREMAP | AFIO_MAPR_SWJ_CFG));
+}
+
+/**
+  * @brief Enable the remapping of USART3 alternate function CTS, RTS, CK, TX and RX.
+  * @rmtoll MAPR          USART3_REMAP           LL_GPIO_AF_RemapPartial_USART3
+  * @note  PARTIAL: Partial remap (TX/PC10, RX/PC11, CK/PC12, CTS/PB13, RTS/PB14)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_RemapPartial_USART3(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_USART3_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_USART3_REMAP_PARTIALREMAP | AFIO_MAPR_SWJ_CFG));
+}
+
+/**
+  * @brief Disable the remapping of USART3 alternate function CTS, RTS, CK, TX and RX.
+  * @rmtoll MAPR          USART3_REMAP           LL_GPIO_AF_DisableRemap_USART3
+  * @note  DISABLE: No remap      (TX/PB10, RX/PB11, CK/PB12, CTS/PB13, RTS/PB14)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_USART3(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_USART3_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_USART3_REMAP_NOREMAP | AFIO_MAPR_SWJ_CFG));
+}
+#endif
+
+/**
+  * @brief Enable the remapping of TIM1 alternate function channels 1 to 4, 1N to 3N, external trigger (ETR) and Break input (BKIN)
+  * @rmtoll MAPR          TIM1_REMAP           LL_GPIO_AF_EnableRemap_TIM1
+  * @note  ENABLE: Full remap     (ETR/PE7,  CH1/PE9, CH2/PE11, CH3/PE13, CH4/PE14, BKIN/PE15, CH1N/PE8,  CH2N/PE10, CH3N/PE12)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM1(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_TIM1_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_TIM1_REMAP_FULLREMAP | AFIO_MAPR_SWJ_CFG));
+}
+
+/**
+  * @brief Enable the remapping of TIM1 alternate function channels 1 to 4, 1N to 3N, external trigger (ETR) and Break input (BKIN)
+  * @rmtoll MAPR          TIM1_REMAP           LL_GPIO_AF_RemapPartial_TIM1
+  * @note  PARTIAL: Partial remap (ETR/PA12, CH1/PA8, CH2/PA9,  CH3/PA10, CH4/PA11, BKIN/PA6,  CH1N/PA7,  CH2N/PB0,  CH3N/PB1)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_RemapPartial_TIM1(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_TIM1_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_TIM1_REMAP_PARTIALREMAP | AFIO_MAPR_SWJ_CFG));
+}
+
+/**
+  * @brief Disable the remapping of TIM1 alternate function channels 1 to 4, 1N to 3N, external trigger (ETR) and Break input (BKIN)
+  * @rmtoll MAPR          TIM1_REMAP           LL_GPIO_AF_DisableRemap_TIM1
+  * @note  DISABLE: No remap      (ETR/PA12, CH1/PA8, CH2/PA9,  CH3/PA10, CH4/PA11, BKIN/PB12, CH1N/PB13, CH2N/PB14, CH3N/PB15)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM1(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_TIM1_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_TIM1_REMAP_NOREMAP | AFIO_MAPR_SWJ_CFG));
+}
+
+/**
+  * @brief Enable the remapping of TIM2 alternate function channels 1 to 4 and external trigger (ETR)
+  * @rmtoll MAPR          TIM2_REMAP           LL_GPIO_AF_EnableRemap_TIM2
+  * @note  ENABLE: Full remap       (CH1/ETR/PA15, CH2/PB3, CH3/PB10, CH4/PB11)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM2(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_TIM2_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_TIM2_REMAP_FULLREMAP | AFIO_MAPR_SWJ_CFG));
+}
+
+/**
+  * @brief Enable the remapping of TIM2 alternate function channels 1 to 4 and external trigger (ETR)
+  * @rmtoll MAPR          TIM2_REMAP           LL_GPIO_AF_RemapPartial2_TIM2
+  * @note  PARTIAL_2: Partial remap (CH1/ETR/PA0,  CH2/PA1, CH3/PB10, CH4/PB11)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_RemapPartial2_TIM2(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_TIM2_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_TIM2_REMAP_PARTIALREMAP2 | AFIO_MAPR_SWJ_CFG));
+}
+
+/**
+  * @brief Enable the remapping of TIM2 alternate function channels 1 to 4 and external trigger (ETR)
+  * @rmtoll MAPR          TIM2_REMAP           LL_GPIO_AF_RemapPartial1_TIM2
+  * @note  PARTIAL_1: Partial remap (CH1/ETR/PA15, CH2/PB3, CH3/PA2,  CH4/PA3)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_RemapPartial1_TIM2(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_TIM2_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1 | AFIO_MAPR_SWJ_CFG));
+}
+
+/**
+  * @brief Disable the remapping of TIM2 alternate function channels 1 to 4 and external trigger (ETR)
+  * @rmtoll MAPR          TIM2_REMAP           LL_GPIO_AF_DisableRemap_TIM2
+  * @note  DISABLE: No remap        (CH1/ETR/PA0,  CH2/PA1, CH3/PA2,  CH4/PA3)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM2(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_TIM2_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_TIM2_REMAP_NOREMAP | AFIO_MAPR_SWJ_CFG));
+}
+
+/**
+  * @brief Enable the remapping of TIM3 alternate function channels 1 to 4
+  * @rmtoll MAPR          TIM3_REMAP           LL_GPIO_AF_EnableRemap_TIM3
+  * @note  ENABLE: Full remap     (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9)
+  * @note  TIM3_ETR on PE0 is not re-mapped.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM3(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_TIM3_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_TIM3_REMAP_FULLREMAP | AFIO_MAPR_SWJ_CFG));
+}
+
+/**
+  * @brief Enable the remapping of TIM3 alternate function channels 1 to 4
+  * @rmtoll MAPR          TIM3_REMAP           LL_GPIO_AF_RemapPartial_TIM3
+  * @note  PARTIAL: Partial remap (CH1/PB4, CH2/PB5, CH3/PB0, CH4/PB1)
+  * @note  TIM3_ETR on PE0 is not re-mapped.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_RemapPartial_TIM3(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_TIM3_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_TIM3_REMAP_PARTIALREMAP | AFIO_MAPR_SWJ_CFG));
+}
+
+/**
+  * @brief Disable the remapping of TIM3 alternate function channels 1 to 4
+  * @rmtoll MAPR          TIM3_REMAP           LL_GPIO_AF_DisableRemap_TIM3
+  * @note  DISABLE: No remap      (CH1/PA6, CH2/PA7, CH3/PB0, CH4/PB1)
+  * @note  TIM3_ETR on PE0 is not re-mapped.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM3(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_TIM3_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_TIM3_REMAP_NOREMAP | AFIO_MAPR_SWJ_CFG));
+}
+
+#if defined(AFIO_MAPR_TIM4_REMAP)
+/**
+  * @brief Enable the remapping of TIM4 alternate function channels 1 to 4.
+  * @rmtoll MAPR          TIM4_REMAP           LL_GPIO_AF_EnableRemap_TIM4
+  * @note  ENABLE: Full remap (TIM4_CH1/PD12, TIM4_CH2/PD13, TIM4_CH3/PD14, TIM4_CH4/PD15)
+  * @note  TIM4_ETR on PE0 is not re-mapped.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM4(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_TIM4_REMAP | AFIO_MAPR_SWJ_CFG);
+}
+/**
+  * @brief Disable the remapping of TIM4 alternate function channels 1 to 4.
+  * @rmtoll MAPR          TIM4_REMAP           LL_GPIO_AF_DisableRemap_TIM4
+  * @note  DISABLE: No remap  (TIM4_CH1/PB6,  TIM4_CH2/PB7,  TIM4_CH3/PB8,  TIM4_CH4/PB9)
+  * @note  TIM4_ETR on PE0 is not re-mapped.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM4(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_TIM4_REMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief  Check if TIM4 has been remaped or not
+  * @rmtoll MAPR         TIM4_REMAP         LL_GPIO_AF_IsEnabledRemap_TIM4
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_TIM4(void)
+{
+  return (READ_BIT(AFIO->MAPR, AFIO_MAPR_TIM4_REMAP) == (AFIO_MAPR_TIM4_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR_CAN_REMAP_REMAP1)
+
+/**
+  * @brief Enable or disable the remapping of CAN alternate function CAN_RX and CAN_TX in devices with a single CAN interface.
+  * @rmtoll MAPR          CAN_REMAP           LL_GPIO_AF_RemapPartial1_CAN1
+  * @note  CASE 1: CAN_RX mapped to PA11, CAN_TX mapped to PA12
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_RemapPartial1_CAN1(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_CAN_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_CAN_REMAP_REMAP1 | AFIO_MAPR_SWJ_CFG));
+}
+
+/**
+  * @brief Enable or disable the remapping of CAN alternate function CAN_RX and CAN_TX in devices with a single CAN interface.
+  * @rmtoll MAPR          CAN_REMAP           LL_GPIO_AF_RemapPartial2_CAN1
+  * @note  CASE 2: CAN_RX mapped to PB8,  CAN_TX mapped to PB9 (not available on 36-pin package)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_RemapPartial2_CAN1(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_CAN_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_CAN_REMAP_REMAP2 | AFIO_MAPR_SWJ_CFG));
+}
+
+/**
+  * @brief Enable or disable the remapping of CAN alternate function CAN_RX and CAN_TX in devices with a single CAN interface.
+  * @rmtoll MAPR          CAN_REMAP           LL_GPIO_AF_RemapPartial3_CAN1
+  * @note  CASE 3: CAN_RX mapped to PD0,  CAN_TX mapped to PD1
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_RemapPartial3_CAN1(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_CAN_REMAP | AFIO_MAPR_SWJ_CFG), (AFIO_MAPR_CAN_REMAP_REMAP3 | AFIO_MAPR_SWJ_CFG));
+}
+#endif
+
+/**
+  * @brief Enable the remapping of PD0 and PD1. When the HSE oscillator is not used
+  *        (application running on internal 8 MHz RC) PD0 and PD1 can be mapped on OSC_IN and
+  *        OSC_OUT. This is available only on 36, 48 and 64 pins packages (PD0 and PD1 are available
+  *        on 100-pin and 144-pin packages, no need for remapping).
+  * @rmtoll MAPR          PD01_REMAP           LL_GPIO_AF_EnableRemap_PD01
+  * @note  ENABLE: PD0 remapped on OSC_IN, PD1 remapped on OSC_OUT.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_PD01(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_PD01_REMAP | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Disable the remapping of PD0 and PD1. When the HSE oscillator is not used
+  *        (application running on internal 8 MHz RC) PD0 and PD1 can be mapped on OSC_IN and
+  *        OSC_OUT. This is available only on 36, 48 and 64 pins packages (PD0 and PD1 are available
+  *        on 100-pin and 144-pin packages, no need for remapping).
+  * @rmtoll MAPR          PD01_REMAP           LL_GPIO_AF_DisableRemap_PD01
+  * @note  DISABLE: No remapping of PD0 and PD1
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_PD01(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_PD01_REMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief  Check if PD01 has been remaped or not
+  * @rmtoll MAPR         PD01_REMAP         LL_GPIO_AF_IsEnabledRemap_PD01
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_PD01(void)
+{
+  return (READ_BIT(AFIO->MAPR, AFIO_MAPR_PD01_REMAP) == (AFIO_MAPR_PD01_REMAP));
+}
+
+#if defined(AFIO_MAPR_TIM5CH4_IREMAP)
+/**
+  * @brief Enable the remapping of TIM5CH4.
+  * @rmtoll MAPR          TIM5CH4_IREMAP           LL_GPIO_AF_EnableRemap_TIM5CH4
+  * @note  ENABLE: LSI internal clock is connected to TIM5_CH4 input for calibration purpose.
+  * @note  This function is available only in high density value line devices.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM5CH4(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_TIM5CH4_IREMAP | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Disable the remapping of TIM5CH4.
+  * @rmtoll MAPR          TIM5CH4_IREMAP           LL_GPIO_AF_DisableRemap_TIM5CH4
+  * @note  DISABLE: TIM5_CH4 is connected to PA3
+  * @note  This function is available only in high density value line devices.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM5CH4(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_TIM5CH4_IREMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief  Check if TIM5CH4 has been remaped or not
+  * @rmtoll MAPR         TIM5CH4_IREMAP         LL_GPIO_AF_IsEnabledRemap_TIM5CH4
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_TIM5CH4(void)
+{
+  return (READ_BIT(AFIO->MAPR, AFIO_MAPR_TIM5CH4_IREMAP) == (AFIO_MAPR_TIM5CH4_IREMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR_ETH_REMAP)
+/**
+  * @brief Enable the remapping of Ethernet MAC connections with the PHY.
+  * @rmtoll MAPR          ETH_REMAP           LL_GPIO_AF_EnableRemap_ETH
+  * @note  ENABLE: Remap     (RX_DV-CRS_DV/PD8, RXD0/PD9, RXD1/PD10, RXD2/PD11, RXD3/PD12)
+  * @note  This bit is available only in connectivity line devices and is reserved otherwise.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_ETH(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_ETH_REMAP | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Disable the remapping of Ethernet MAC connections with the PHY.
+  * @rmtoll MAPR          ETH_REMAP           LL_GPIO_AF_DisableRemap_ETH
+  * @note  DISABLE: No remap (RX_DV-CRS_DV/PA7, RXD0/PC4, RXD1/PC5,  RXD2/PB0,  RXD3/PB1)
+  * @note  This bit is available only in connectivity line devices and is reserved otherwise.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_ETH(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_ETH_REMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief  Check if ETH has been remaped or not
+  * @rmtoll MAPR         ETH_REMAP         LL_GPIO_AF_IsEnabledRemap_ETH
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_ETH(void)
+{
+  return (READ_BIT(AFIO->MAPR, AFIO_MAPR_ETH_REMAP) == (AFIO_MAPR_ETH_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR_CAN2_REMAP)
+
+/**
+  * @brief Enable the remapping of CAN2 alternate function CAN2_RX and CAN2_TX.
+  * @rmtoll MAPR          CAN2_REMAP           LL_GPIO_AF_EnableRemap_CAN2
+  * @note  ENABLE: Remap     (CAN2_RX/PB5,  CAN2_TX/PB6)
+  * @note  This bit is available only in connectivity line devices and is reserved otherwise.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_CAN2(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_CAN2_REMAP | AFIO_MAPR_SWJ_CFG);
+}
+/**
+  * @brief Disable the remapping of CAN2 alternate function CAN2_RX and CAN2_TX.
+  * @rmtoll MAPR          CAN2_REMAP           LL_GPIO_AF_DisableRemap_CAN2
+  * @note  DISABLE: No remap (CAN2_RX/PB12, CAN2_TX/PB13)
+  * @note  This bit is available only in connectivity line devices and is reserved otherwise.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_CAN2(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_CAN2_REMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief  Check if CAN2 has been remaped or not
+  * @rmtoll MAPR         CAN2_REMAP         LL_GPIO_AF_IsEnabledRemap_CAN2
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_CAN2(void)
+{
+  return (READ_BIT(AFIO->MAPR, AFIO_MAPR_CAN2_REMAP) == (AFIO_MAPR_CAN2_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR_MII_RMII_SEL)
+/**
+  * @brief Configures the Ethernet MAC internally for use with an external MII or RMII PHY.
+  * @rmtoll MAPR          MII_RMII_SEL           LL_GPIO_AF_Select_ETH_RMII
+  * @note  ETH_RMII: Configure Ethernet MAC for connection with an RMII PHY
+  * @note  This bit is available only in connectivity line devices and is reserved otherwise.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_Select_ETH_RMII(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_MII_RMII_SEL | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Configures the Ethernet MAC internally for use with an external MII or RMII PHY.
+  * @rmtoll MAPR          MII_RMII_SEL           LL_GPIO_AF_Select_ETH_MII
+  * @note  ETH_MII: Configure Ethernet MAC for connection with an MII PHY
+  * @note  This bit is available only in connectivity line devices and is reserved otherwise.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_Select_ETH_MII(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_MII_RMII_SEL | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+#endif
+
+#if defined(AFIO_MAPR_ADC1_ETRGINJ_REMAP)
+/**
+  * @brief Enable the remapping of ADC1_ETRGINJ (ADC 1 External trigger injected conversion).
+  * @rmtoll MAPR          ADC1_ETRGINJ_REMAP           LL_GPIO_AF_EnableRemap_ADC1_ETRGINJ
+  * @note  ENABLE: ADC1 External Event injected conversion is connected to TIM8 Channel4.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_ADC1_ETRGINJ(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_ADC1_ETRGINJ_REMAP | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Disable the remapping of ADC1_ETRGINJ (ADC 1 External trigger injected conversion).
+  * @rmtoll MAPR          ADC1_ETRGINJ_REMAP           LL_GPIO_AF_DisableRemap_ADC1_ETRGINJ
+  * @note  DISABLE: ADC1 External trigger injected conversion is connected to EXTI15
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_ADC1_ETRGINJ(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_ADC1_ETRGINJ_REMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief  Check if ADC1_ETRGINJ has been remaped or not
+  * @rmtoll MAPR         ADC1_ETRGINJ_REMAP         LL_GPIO_AF_IsEnabledRemap_ADC1_ETRGINJ
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_ADC1_ETRGINJ(void)
+{
+  return (READ_BIT(AFIO->MAPR, AFIO_MAPR_ADC1_ETRGINJ_REMAP) == (AFIO_MAPR_ADC1_ETRGINJ_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR_ADC1_ETRGREG_REMAP)
+/**
+  * @brief Enable the remapping of ADC1_ETRGREG (ADC 1 External trigger regular conversion).
+  * @rmtoll MAPR          ADC1_ETRGREG_REMAP           LL_GPIO_AF_EnableRemap_ADC1_ETRGREG
+  * @note  ENABLE: ADC1 External Event regular conversion is connected to TIM8 TRG0.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_ADC1_ETRGREG(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_ADC1_ETRGREG_REMAP | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Disable the remapping of ADC1_ETRGREG (ADC 1 External trigger regular conversion).
+  * @rmtoll MAPR          ADC1_ETRGREG_REMAP           LL_GPIO_AF_DisableRemap_ADC1_ETRGREG
+  * @note  DISABLE: ADC1 External trigger regular conversion is connected to EXTI11
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_ADC1_ETRGREG(void)
+{
+   MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_ADC1_ETRGREG_REMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief  Check if ADC1_ETRGREG has been remaped or not
+  * @rmtoll MAPR         ADC1_ETRGREG_REMAP         LL_GPIO_AF_IsEnabledRemap_ADC1_ETRGREG
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_ADC1_ETRGREG(void)
+{
+  return (READ_BIT(AFIO->MAPR, AFIO_MAPR_ADC1_ETRGREG_REMAP) == (AFIO_MAPR_ADC1_ETRGREG_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR_ADC2_ETRGINJ_REMAP)
+
+/**
+  * @brief Enable the remapping of ADC2_ETRGREG (ADC 2 External trigger injected conversion).
+  * @rmtoll MAPR          ADC2_ETRGINJ_REMAP           LL_GPIO_AF_EnableRemap_ADC2_ETRGINJ
+  * @note  ENABLE: ADC2 External Event injected conversion is connected to TIM8 Channel4.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_ADC2_ETRGINJ(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_ADC2_ETRGINJ_REMAP | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Disable the remapping of ADC2_ETRGREG (ADC 2 External trigger injected conversion).
+  * @rmtoll MAPR          ADC2_ETRGINJ_REMAP           LL_GPIO_AF_DisableRemap_ADC2_ETRGINJ
+  * @note  DISABLE: ADC2 External trigger injected conversion is connected to EXTI15
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_ADC2_ETRGINJ(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_ADC2_ETRGINJ_REMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief  Check if ADC2_ETRGINJ has been remaped or not
+  * @rmtoll MAPR         ADC2_ETRGINJ_REMAP         LL_GPIO_AF_IsEnabledRemap_ADC2_ETRGINJ
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_ADC2_ETRGINJ(void)
+{
+  return (READ_BIT(AFIO->MAPR, AFIO_MAPR_ADC2_ETRGINJ_REMAP) == (AFIO_MAPR_ADC2_ETRGINJ_REMAP));
+}
+#endif
+
+#if defined (AFIO_MAPR_ADC2_ETRGREG_REMAP)
+
+/**
+  * @brief Enable the remapping of ADC2_ETRGREG (ADC 2 External trigger regular conversion).
+  * @rmtoll MAPR          ADC2_ETRGREG_REMAP           LL_GPIO_AF_EnableRemap_ADC2_ETRGREG
+  * @note  ENABLE: ADC2 External Event regular conversion is connected to TIM8 TRG0.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_ADC2_ETRGREG(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_ADC2_ETRGREG_REMAP | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Disable the remapping of ADC2_ETRGREG (ADC 2 External trigger regular conversion).
+  * @rmtoll MAPR          ADC2_ETRGREG_REMAP           LL_GPIO_AF_DisableRemap_ADC2_ETRGREG
+  * @note  DISABLE: ADC2 External trigger regular conversion is connected to EXTI11
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_ADC2_ETRGREG(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_ADC2_ETRGREG_REMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief  Check if ADC2_ETRGREG has been remaped or not
+  * @rmtoll MAPR         ADC2_ETRGREG_REMAP         LL_GPIO_AF_IsEnabledRemap_ADC2_ETRGREG
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_ADC2_ETRGREG(void)
+{
+  return (READ_BIT(AFIO->MAPR, AFIO_MAPR_ADC2_ETRGREG_REMAP) == (AFIO_MAPR_ADC2_ETRGREG_REMAP));
+}
+#endif
+
+/**
+  * @brief Enable the Serial wire JTAG configuration
+  * @rmtoll MAPR          SWJ_CFG           LL_GPIO_AF_EnableRemap_SWJ
+  * @note  ENABLE: Full SWJ (JTAG-DP + SW-DP): Reset State
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_SWJ(void)
+{
+  CLEAR_BIT(AFIO->MAPR,AFIO_MAPR_SWJ_CFG);
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_SWJ_CFG_RESET);
+}
+
+/**
+  * @brief Enable the Serial wire JTAG configuration
+  * @rmtoll MAPR          SWJ_CFG           LL_GPIO_AF_Remap_SWJ_NONJTRST
+  * @note  NONJTRST: Full SWJ (JTAG-DP + SW-DP) but without NJTRST
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_Remap_SWJ_NONJTRST(void)
+{
+  CLEAR_BIT(AFIO->MAPR,AFIO_MAPR_SWJ_CFG);
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_SWJ_CFG_NOJNTRST);
+}
+
+/**
+  * @brief Enable the Serial wire JTAG configuration
+  * @rmtoll MAPR          SWJ_CFG           LL_GPIO_AF_Remap_SWJ_NOJTAG
+  * @note  NOJTAG: JTAG-DP Disabled and SW-DP Enabled
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_Remap_SWJ_NOJTAG(void)
+{
+  CLEAR_BIT(AFIO->MAPR,AFIO_MAPR_SWJ_CFG);
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_SWJ_CFG_JTAGDISABLE);
+}
+
+/**
+  * @brief Disable the Serial wire JTAG configuration
+  * @rmtoll MAPR          SWJ_CFG           LL_GPIO_AF_DisableRemap_SWJ
+  * @note  DISABLE: JTAG-DP Disabled and SW-DP Disabled
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_SWJ(void)
+{
+  CLEAR_BIT(AFIO->MAPR,AFIO_MAPR_SWJ_CFG);
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_SWJ_CFG_DISABLE);
+}
+
+#if defined(AFIO_MAPR_SPI3_REMAP)
+
+/**
+  * @brief Enable the remapping of SPI3 alternate functions SPI3_NSS/I2S3_WS, SPI3_SCK/I2S3_CK, SPI3_MISO, SPI3_MOSI/I2S3_SD.
+  * @rmtoll MAPR          SPI3_REMAP           LL_GPIO_AF_EnableRemap_SPI3
+  * @note  ENABLE: Remap     (SPI3_NSS-I2S3_WS/PA4,  SPI3_SCK-I2S3_CK/PC10, SPI3_MISO/PC11, SPI3_MOSI-I2S3_SD/PC12)
+  * @note  This bit is available only in connectivity line devices and is reserved otherwise.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_SPI3(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_SPI3_REMAP | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Disable the remapping of SPI3 alternate functions SPI3_NSS/I2S3_WS, SPI3_SCK/I2S3_CK, SPI3_MISO, SPI3_MOSI/I2S3_SD.
+  * @rmtoll MAPR          SPI3_REMAP           LL_GPIO_AF_DisableRemap_SPI3
+  * @note  DISABLE: No remap (SPI3_NSS-I2S3_WS/PA15, SPI3_SCK-I2S3_CK/PB3,  SPI3_MISO/PB4,  SPI3_MOSI-I2S3_SD/PB5).
+  * @note  This bit is available only in connectivity line devices and is reserved otherwise.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_SPI3(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_SPI3_REMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief  Check if SPI3 has been remaped or not
+  * @rmtoll MAPR         SPI3_REMAP         LL_GPIO_AF_IsEnabledRemap_SPI3_REMAP
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_SPI3(void)
+{
+  return (READ_BIT(AFIO->MAPR, AFIO_MAPR_SPI3_REMAP) == (AFIO_MAPR_SPI3_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR_TIM2ITR1_IREMAP)
+
+/**
+  * @brief Control of TIM2_ITR1 internal mapping.
+  * @rmtoll MAPR          TIM2ITR1_IREMAP           LL_GPIO_AF_Remap_TIM2ITR1_TO_USB
+  * @note  TO_USB: Connect USB OTG SOF (Start of Frame) output to TIM2_ITR1 for calibration purposes.
+  * @note  This bit is available only in connectivity line devices and is reserved otherwise.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_Remap_TIM2ITR1_TO_USB(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_TIM2ITR1_IREMAP | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Control of TIM2_ITR1 internal mapping.
+  * @rmtoll MAPR          TIM2ITR1_IREMAP           LL_GPIO_AF_Remap_TIM2ITR1_TO_ETH
+  * @note  TO_ETH: Connect TIM2_ITR1 internally to the Ethernet PTP output for calibration purposes.
+  * @note  This bit is available only in connectivity line devices and is reserved otherwise.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_Remap_TIM2ITR1_TO_ETH(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_TIM2ITR1_IREMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+#endif
+
+#if defined(AFIO_MAPR_PTP_PPS_REMAP)
+
+/**
+  * @brief Enable the remapping of ADC2_ETRGREG (ADC 2 External trigger regular conversion).
+  * @rmtoll MAPR          PTP_PPS_REMAP           LL_GPIO_AF_EnableRemap_ETH_PTP_PPS
+  * @note  ENABLE: PTP_PPS is output on PB5 pin.
+  * @note  This bit is available only in connectivity line devices and is reserved otherwise.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_ETH_PTP_PPS(void)
+{
+  SET_BIT(AFIO->MAPR, AFIO_MAPR_PTP_PPS_REMAP | AFIO_MAPR_SWJ_CFG);
+}
+
+/**
+  * @brief Disable the remapping of ADC2_ETRGREG (ADC 2 External trigger regular conversion).
+  * @rmtoll MAPR          PTP_PPS_REMAP           LL_GPIO_AF_DisableRemap_ETH_PTP_PPS
+  * @note  DISABLE: PTP_PPS not output on PB5 pin.
+  * @note  This bit is available only in connectivity line devices and is reserved otherwise.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_ETH_PTP_PPS(void)
+{
+  MODIFY_REG(AFIO->MAPR, (AFIO_MAPR_PTP_PPS_REMAP | AFIO_MAPR_SWJ_CFG), AFIO_MAPR_SWJ_CFG);
+}
+#endif
+
+#if defined(AFIO_MAPR2_TIM9_REMAP)
+
+/**
+  * @brief Enable the remapping of TIM9_CH1 and TIM9_CH2.
+  * @rmtoll MAPR2          TIM9_REMAP           LL_GPIO_AF_EnableRemap_TIM9
+  * @note  ENABLE: Remap     (TIM9_CH1 on PE5 and TIM9_CH2 on PE6).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM9(void)
+{
+  SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM9_REMAP);
+}
+
+/**
+  * @brief Disable the remapping of TIM9_CH1 and TIM9_CH2.
+  * @rmtoll MAPR2          TIM9_REMAP           LL_GPIO_AF_DisableRemap_TIM9
+  * @note  DISABLE: No remap (TIM9_CH1 on PA2 and TIM9_CH2 on PA3).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM9(void)
+{
+  CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM9_REMAP);
+}
+
+/**
+  * @brief  Check if TIM9_CH1 and TIM9_CH2 have been remaped or not
+  * @rmtoll MAPR2         TIM9_REMAP         LL_GPIO_AF_IsEnabledRemap_TIM9
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_TIM9(void)
+{
+  return (READ_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM9_REMAP) == (AFIO_MAPR2_TIM9_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR2_TIM10_REMAP)
+
+/**
+  * @brief Enable the remapping of TIM10_CH1.
+  * @rmtoll MAPR2          TIM10_REMAP           LL_GPIO_AF_EnableRemap_TIM10
+  * @note  ENABLE: Remap     (TIM10_CH1 on PF6).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM10(void)
+{
+  SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM10_REMAP);
+}
+
+/**
+  * @brief Disable the remapping of TIM10_CH1.
+  * @rmtoll MAPR2          TIM10_REMAP           LL_GPIO_AF_DisableRemap_TIM10
+  * @note  DISABLE: No remap (TIM10_CH1 on PB8).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM10(void)
+{
+  CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM10_REMAP);
+}
+
+/**
+  * @brief  Check if TIM10_CH1 has been remaped or not
+  * @rmtoll MAPR2         TIM10_REMAP         LL_GPIO_AF_IsEnabledRemap_TIM10
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_TIM10(void)
+{
+  return (READ_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM10_REMAP) == (AFIO_MAPR2_TIM10_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR2_TIM11_REMAP)
+/**
+  * @brief Enable the remapping of TIM11_CH1.
+  * @rmtoll MAPR2          TIM11_REMAP           LL_GPIO_AF_EnableRemap_TIM11
+  * @note  ENABLE: Remap     (TIM11_CH1 on PF7).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM11(void)
+{
+  SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM11_REMAP);
+}
+
+/**
+  * @brief Disable the remapping of TIM11_CH1.
+  * @rmtoll MAPR2          TIM11_REMAP           LL_GPIO_AF_DisableRemap_TIM11
+  * @note  DISABLE: No remap (TIM11_CH1 on PB9).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM11(void)
+{
+  CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM11_REMAP);
+}
+
+/**
+  * @brief  Check if TIM11_CH1 has been remaped or not
+  * @rmtoll MAPR2         TIM11_REMAP         LL_GPIO_AF_IsEnabledRemap_TIM11
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_TIM11(void)
+{
+  return (READ_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM11_REMAP) == (AFIO_MAPR2_TIM11_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR2_TIM13_REMAP)
+
+/**
+  * @brief Enable the remapping of TIM13_CH1.
+  * @rmtoll MAPR2          TIM13_REMAP           LL_GPIO_AF_EnableRemap_TIM13
+  * @note  ENABLE: Remap     STM32F100:(TIM13_CH1 on PF8). Others:(TIM13_CH1 on PB0).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM13(void)
+{
+  SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM13_REMAP);
+}
+
+/**
+  * @brief Disable the remapping of TIM13_CH1.
+  * @rmtoll MAPR2          TIM13_REMAP           LL_GPIO_AF_DisableRemap_TIM13
+  * @note  DISABLE: No remap STM32F100:(TIM13_CH1 on PA6). Others:(TIM13_CH1 on PC8).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM13(void)
+{
+  CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM13_REMAP);
+}
+
+/**
+  * @brief  Check if TIM13_CH1 has been remaped or not
+  * @rmtoll MAPR2         TIM13_REMAP         LL_GPIO_AF_IsEnabledRemap_TIM13
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_TIM13(void)
+{
+  return (READ_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM13_REMAP) == (AFIO_MAPR2_TIM13_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR2_TIM14_REMAP)
+
+/**
+  * @brief Enable the remapping of TIM14_CH1.
+  * @rmtoll MAPR2          TIM14_REMAP           LL_GPIO_AF_EnableRemap_TIM14
+  * @note  ENABLE: Remap     STM32F100:(TIM14_CH1 on PB1). Others:(TIM14_CH1 on PF9).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM14(void)
+{
+  SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM14_REMAP);
+}
+
+/**
+  * @brief Disable the remapping of TIM14_CH1.
+  * @rmtoll MAPR2          TIM14_REMAP           LL_GPIO_AF_DisableRemap_TIM14
+  * @note  DISABLE: No remap STM32F100:(TIM14_CH1 on PC9). Others:(TIM14_CH1 on PA7).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM14(void)
+{
+  CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM14_REMAP);
+}
+
+/**
+  * @brief  Check if TIM14_CH1 has been remaped or not
+  * @rmtoll MAPR2         TIM14_REMAP         LL_GPIO_AF_IsEnabledRemap_TIM14
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_TIM14(void)
+{
+  return (READ_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM14_REMAP) == (AFIO_MAPR2_TIM14_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR2_FSMC_NADV_REMAP)
+
+/**
+  * @brief Controls the use of the optional FSMC_NADV signal.
+  * @rmtoll MAPR2          FSMC_NADV           LL_GPIO_AF_Disconnect_FSMCNADV
+  * @note  DISCONNECTED: The NADV signal is not connected. The I/O pin can be used by another peripheral.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_Disconnect_FSMCNADV(void)
+{
+  SET_BIT(AFIO->MAPR2, AFIO_MAPR2_FSMC_NADV_REMAP);
+}
+
+/**
+  * @brief Controls the use of the optional FSMC_NADV signal.
+  * @rmtoll MAPR2          FSMC_NADV           LL_GPIO_AF_Connect_FSMCNADV
+  * @note  CONNECTED: The NADV signal is connected to the output (default).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_Connect_FSMCNADV(void)
+{
+  CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_FSMC_NADV_REMAP);
+}
+#endif
+
+#if defined(AFIO_MAPR2_TIM15_REMAP)
+
+/**
+  * @brief Enable the remapping of TIM15_CH1 and TIM15_CH2.
+  * @rmtoll MAPR2          TIM15_REMAP           LL_GPIO_AF_EnableRemap_TIM15
+  * @note  ENABLE: Remap     (TIM15_CH1 on PB14 and TIM15_CH2 on PB15).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM15(void)
+{
+  SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM15_REMAP);
+}
+/**
+  * @brief Disable the remapping of TIM15_CH1 and TIM15_CH2.
+  * @rmtoll MAPR2          TIM15_REMAP           LL_GPIO_AF_DisableRemap_TIM15
+  * @note  DISABLE: No remap (TIM15_CH1 on PA2  and TIM15_CH2 on PA3).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM15(void)
+{
+  CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM15_REMAP);
+}
+
+/**
+  * @brief  Check if TIM15_CH1 has been remaped or not
+  * @rmtoll MAPR2         TIM15_REMAP         LL_GPIO_AF_IsEnabledRemap_TIM15
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_TIM15(void)
+{
+  return (READ_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM15_REMAP) == (AFIO_MAPR2_TIM15_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR2_TIM16_REMAP)
+
+/**
+  * @brief Enable the remapping of TIM16_CH1.
+  * @rmtoll MAPR2          TIM16_REMAP           LL_GPIO_AF_EnableRemap_TIM16
+  * @note  ENABLE: Remap     (TIM16_CH1 on PA6).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM16(void)
+{
+  SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM16_REMAP);
+}
+
+/**
+  * @brief Disable the remapping of TIM16_CH1.
+  * @rmtoll MAPR2          TIM16_REMAP           LL_GPIO_AF_DisableRemap_TIM16
+  * @note  DISABLE: No remap (TIM16_CH1 on PB8).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM16(void)
+{
+  CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM16_REMAP);
+}
+
+/**
+  * @brief  Check if TIM16_CH1 has been remaped or not
+  * @rmtoll MAPR2         TIM16_REMAP         LL_GPIO_AF_IsEnabledRemap_TIM16
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_TIM16(void)
+{
+  return (READ_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM16_REMAP) == (AFIO_MAPR2_TIM16_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR2_TIM17_REMAP)
+
+/**
+  * @brief Enable the remapping of TIM17_CH1.
+  * @rmtoll MAPR2          TIM17_REMAP           LL_GPIO_AF_EnableRemap_TIM17
+  * @note  ENABLE: Remap     (TIM17_CH1 on PA7).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM17(void)
+{
+  SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM17_REMAP);
+}
+
+/**
+  * @brief Disable the remapping of TIM17_CH1.
+  * @rmtoll MAPR2          TIM17_REMAP           LL_GPIO_AF_DisableRemap_TIM17
+  * @note  DISABLE: No remap (TIM17_CH1 on PB9).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM17(void)
+{
+  CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM17_REMAP);
+}
+
+/**
+  * @brief  Check if TIM17_CH1 has been remaped or not
+  * @rmtoll MAPR2         TIM17_REMAP         LL_GPIO_AF_IsEnabledRemap_TIM17
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_TIM17(void)
+{
+  return (READ_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM17_REMAP) == (AFIO_MAPR2_TIM17_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR2_CEC_REMAP)
+
+/**
+  * @brief Enable the remapping of CEC.
+  * @rmtoll MAPR2          CEC_REMAP           LL_GPIO_AF_EnableRemap_CEC
+  * @note  ENABLE: Remap     (CEC on PB10).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_CEC(void)
+{
+  SET_BIT(AFIO->MAPR2, AFIO_MAPR2_CEC_REMAP);
+}
+
+/**
+  * @brief Disable the remapping of CEC.
+  * @rmtoll MAPR2          CEC_REMAP           LL_GPIO_AF_DisableRemap_CEC
+  * @note  DISABLE: No remap (CEC on PB8).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_CEC(void)
+{
+  CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_CEC_REMAP);
+}
+
+/**
+  * @brief  Check if CEC has been remaped or not
+  * @rmtoll MAPR2         CEC_REMAP         LL_GPIO_AF_IsEnabledRemap_CEC
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_CEC(void)
+{
+  return (READ_BIT(AFIO->MAPR2, AFIO_MAPR2_CEC_REMAP) == (AFIO_MAPR2_CEC_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR2_TIM1_DMA_REMAP)
+
+/**
+  * @brief Controls the mapping of the TIM1_CH1 TIM1_CH2 DMA requests onto the DMA1 channels.
+  * @rmtoll MAPR2          TIM1_DMA_REMAP           LL_GPIO_AF_EnableRemap_TIM1DMA
+  * @note  ENABLE: Remap (TIM1_CH1 DMA request/DMA1 Channel6, TIM1_CH2 DMA request/DMA1 Channel6)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM1DMA(void)
+{
+  SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM1_DMA_REMAP);
+}
+
+/**
+  * @brief Controls the mapping of the TIM1_CH1 TIM1_CH2 DMA requests onto the DMA1 channels.
+  * @rmtoll MAPR2          TIM1_DMA_REMAP           LL_GPIO_AF_DisableRemap_TIM1DMA
+  * @note  DISABLE: No remap (TIM1_CH1 DMA request/DMA1 Channel2, TIM1_CH2 DMA request/DMA1 Channel3).
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM1DMA(void)
+{
+  CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM1_DMA_REMAP);
+}
+
+/**
+  * @brief  Check if TIM1DMA has been remaped or not
+  * @rmtoll MAPR2         TIM1_DMA_REMAP         LL_GPIO_AF_IsEnabledRemap_TIM1DMA
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_TIM1DMA(void)
+{
+  return (READ_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM1_DMA_REMAP) == (AFIO_MAPR2_TIM1_DMA_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR2_TIM67_DAC_DMA_REMAP)
+
+/**
+  * @brief Controls the mapping of the TIM6_DAC1 and TIM7_DAC2 DMA requests onto the DMA1 channels.
+  * @rmtoll MAPR2          TIM76_DAC_DMA_REMAP           LL_GPIO_AF_EnableRemap_TIM67DACDMA
+  * @note  ENABLE: Remap (TIM6_DAC1 DMA request/DMA1 Channel3, TIM7_DAC2 DMA request/DMA1 Channel4)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM67DACDMA(void)
+{
+  SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM67_DAC_DMA_REMAP);
+}
+
+/**
+  * @brief Controls the mapping of the TIM6_DAC1 and TIM7_DAC2 DMA requests onto the DMA1 channels.
+  * @rmtoll MAPR2          TIM76_DAC_DMA_REMAP           LL_GPIO_AF_DisableRemap_TIM67DACDMA
+  * @note  DISABLE: No remap (TIM6_DAC1 DMA request/DMA2 Channel3, TIM7_DAC2 DMA request/DMA2 Channel4)
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM67DACDMA(void)
+{
+  CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM67_DAC_DMA_REMAP);
+}
+
+/**
+  * @brief  Check if TIM67DACDMA has been remaped or not
+  * @rmtoll MAPR2         TIM76_DAC_DMA_REMAP         LL_GPIO_AF_IsEnabledRemap_TIM67DACDMA
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_TIM67DACDMA(void)
+{
+  return (READ_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM67_DAC_DMA_REMAP) == (AFIO_MAPR2_TIM67_DAC_DMA_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR2_TIM12_REMAP)
+
+/**
+  * @brief Enable the remapping of TIM12_CH1 and TIM12_CH2.
+  * @rmtoll MAPR2          TIM12_REMAP           LL_GPIO_AF_EnableRemap_TIM12
+  * @note  ENABLE: Remap     (TIM12_CH1 on PB12 and TIM12_CH2 on PB13).
+  * @note  This bit is available only in high density value line devices.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_TIM12(void)
+{
+  SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM12_REMAP);
+}
+
+/**
+  * @brief Disable the remapping of TIM12_CH1 and TIM12_CH2.
+  * @rmtoll MAPR2          TIM12_REMAP           LL_GPIO_AF_DisableRemap_TIM12
+  * @note  DISABLE: No remap (TIM12_CH1 on PC4  and TIM12_CH2 on PC5).
+  * @note  This bit is available only in high density value line devices.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_TIM12(void)
+{
+  CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM12_REMAP);
+}
+
+/**
+  * @brief  Check if TIM12_CH1 has been remaped or not
+  * @rmtoll MAPR2         TIM12_REMAP         LL_GPIO_AF_IsEnabledRemap_TIM12
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_TIM12(void)
+{
+  return (READ_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM12_REMAP) == (AFIO_MAPR2_TIM12_REMAP));
+}
+#endif
+
+#if defined(AFIO_MAPR2_MISC_REMAP)
+
+/**
+  * @brief Miscellaneous features remapping.
+  *        This bit is set and cleared by software. It controls miscellaneous features.
+  *        The DMA2 channel 5 interrupt position in the vector table.
+  *        The timer selection for DAC trigger 3 (TSEL[2:0] = 011, for more details refer to the DAC_CR register).
+  * @rmtoll MAPR2          MISC_REMAP           LL_GPIO_AF_EnableRemap_MISC
+  * @note  ENABLE: DMA2 channel 5 interrupt is mapped separately at position 60 and TIM15 TRGO event is
+  *        selected as DAC Trigger 3, TIM15 triggers TIM1/3.
+  * @note  This bit is available only in high density value line devices.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableRemap_MISC(void)
+{
+  SET_BIT(AFIO->MAPR2, AFIO_MAPR2_MISC_REMAP);
+}
+
+/**
+  * @brief Miscellaneous features remapping.
+  *        This bit is set and cleared by software. It controls miscellaneous features.
+  *        The DMA2 channel 5 interrupt position in the vector table.
+  *        The timer selection for DAC trigger 3 (TSEL[2:0] = 011, for more details refer to the DAC_CR register).
+  * @rmtoll MAPR2          MISC_REMAP           LL_GPIO_AF_DisableRemap_MISC
+  * @note  DISABLE: DMA2 channel 5 interrupt is mapped with DMA2 channel 4 at position 59, TIM5 TRGO
+  *        event is selected as DAC Trigger 3, TIM5 triggers TIM1/3.
+  * @note  This bit is available only in high density value line devices.
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableRemap_MISC(void)
+{
+  CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_MISC_REMAP);
+}
+
+/**
+  * @brief  Check if MISC has been remaped or not
+  * @rmtoll MAPR2         MISC_REMAP         LL_GPIO_AF_IsEnabledRemap_MISC
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_IsEnabledRemap_MISC(void)
+{
+  return (READ_BIT(AFIO->MAPR2, AFIO_MAPR2_MISC_REMAP) == (AFIO_MAPR2_MISC_REMAP));
+}
+#endif
+
+/**
+  * @}
+  */
+
+/** @defgroup GPIO_AF_LL_EVENTOUT Output Event configuration
+  * @brief This section propose definition to Configure EVENTOUT Cortex feature .
+  * @{
+  */
+
+/**
+  * @brief  Configures the port and pin on which the EVENTOUT Cortex signal will be connected.
+  * @rmtoll EVCR          PORT           LL_GPIO_AF_ConfigEventout\n
+  *         EVCR          PIN            LL_GPIO_AF_ConfigEventout
+  * @param  LL_GPIO_PortSource This parameter can be one of the following values:
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PORT_A
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PORT_B
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PORT_C
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PORT_D
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PORT_E
+  * @param  LL_GPIO_PinSource This parameter can be one of the following values:
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_0
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_1
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_2
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_3
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_4
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_5
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_6
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_7
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_8
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_9
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_10
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_11
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_12
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_13
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_14
+  *      @arg @ref LL_GPIO_AF_EVENTOUT_PIN_15
+  * @retval None
+*/
+__STATIC_INLINE void LL_GPIO_AF_ConfigEventout(uint32_t LL_GPIO_PortSource, uint32_t LL_GPIO_PinSource)
+{
+  MODIFY_REG(AFIO->EVCR, (AFIO_EVCR_PORT) | (AFIO_EVCR_PIN), (LL_GPIO_PortSource) | (LL_GPIO_PinSource));
+}
+
+/**
+  * @brief  Enables the Event Output.
+  * @rmtoll EVCR          EVOE           LL_GPIO_AF_EnableEventout
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_EnableEventout(void)
+{
+  SET_BIT(AFIO->EVCR, AFIO_EVCR_EVOE);
+}
+
+/**
+  * @brief  Disables the Event Output.
+  * @rmtoll EVCR          EVOE           LL_GPIO_AF_DisableEventout
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_DisableEventout(void)
+{
+  CLEAR_BIT(AFIO->EVCR, AFIO_EVCR_EVOE);
+}
+
+/**
+  * @}
+  */
+/** @defgroup GPIO_AF_LL_EXTI EXTI external interrupt
+  * @brief This section Configure source input for the EXTI external interrupt .
+  * @{
+  */
+
+/**
+  * @brief  Configure source input for the EXTI external interrupt.
+  * @rmtoll AFIO_EXTICR1      EXTIx         LL_GPIO_AF_SetEXTISource\n
+  *         AFIO_EXTICR2      EXTIx         LL_GPIO_AF_SetEXTISource\n
+  *         AFIO_EXTICR3      EXTIx         LL_GPIO_AF_SetEXTISource\n
+  *         AFIO_EXTICR4      EXTIx         LL_GPIO_AF_SetEXTISource
+  * @param  Port This parameter can be one of the following values:
+  *         @arg @ref LL_GPIO_AF_EXTI_PORTA
+  *         @arg @ref LL_GPIO_AF_EXTI_PORTB
+  *         @arg @ref LL_GPIO_AF_EXTI_PORTC
+  *         @arg @ref LL_GPIO_AF_EXTI_PORTD
+  *         @arg @ref LL_GPIO_AF_EXTI_PORTE
+  *         @arg @ref LL_GPIO_AF_EXTI_PORTF
+  *         @arg @ref LL_GPIO_AF_EXTI_PORTG
+  * @param  Line This parameter can be one of the following values:
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE0
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE1
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE2
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE3
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE4
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE5
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE6
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE7
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE8
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE9
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE10
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE11
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE12
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE13
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE14
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE15
+  * @retval None
+  */
+__STATIC_INLINE void LL_GPIO_AF_SetEXTISource(uint32_t Port, uint32_t Line)
+{
+  MODIFY_REG(AFIO->EXTICR[Line & 0xFF], (Line >> 16), Port << POSITION_VAL((Line >> 16)));
+}
+
+/**
+  * @brief  Get the configured defined for specific EXTI Line
+  * @rmtoll AFIO_EXTICR1      EXTIx         LL_GPIO_AF_GetEXTISource\n
+  *         AFIO_EXTICR2      EXTIx         LL_GPIO_AF_GetEXTISource\n
+  *         AFIO_EXTICR3      EXTIx         LL_GPIO_AF_GetEXTISource\n
+  *         AFIO_EXTICR4      EXTIx         LL_GPIO_AF_GetEXTISource
+  * @param  Line This parameter can be one of the following values:
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE0
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE1
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE2
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE3
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE4
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE5
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE6
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE7
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE8
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE9
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE10
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE11
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE12
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE13
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE14
+  *         @arg @ref LL_GPIO_AF_EXTI_LINE15
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_GPIO_AF_EXTI_PORTA
+  *         @arg @ref LL_GPIO_AF_EXTI_PORTB
+  *         @arg @ref LL_GPIO_AF_EXTI_PORTC
+  *         @arg @ref LL_GPIO_AF_EXTI_PORTD
+  *         @arg @ref LL_GPIO_AF_EXTI_PORTE
+  *         @arg @ref LL_GPIO_AF_EXTI_PORTF
+  *         @arg @ref LL_GPIO_AF_EXTI_PORTG
+  */
+__STATIC_INLINE uint32_t LL_GPIO_AF_GetEXTISource(uint32_t Line)
+{
+  return (uint32_t)(READ_BIT(AFIO->EXTICR[Line & 0xFF], (Line >> 16)) >> POSITION_VAL(Line >> 16));
+}
+
+/**
+  * @}
+  */
+
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup GPIO_LL_EF_Init Initialization and de-initialization functions
+  * @{
+  */
+
+ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
+ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
+void        LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
+
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) */
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32F1xx_LL_GPIO_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_i2c.h b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_i2c.h
new file mode 100644
index 0000000..e865505
--- /dev/null
+++ b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_i2c.h
@@ -0,0 +1,1784 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_ll_i2c.h
+  * @author  MCD Application Team
+  * @brief   Header file of I2C LL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_LL_I2C_H
+#define __STM32F1xx_LL_I2C_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx.h"
+
+/** @addtogroup STM32F1xx_LL_Driver
+  * @{
+  */
+
+#if defined (I2C1) || defined (I2C2)
+
+/** @defgroup I2C_LL I2C
+  * @{
+  */
+
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup I2C_LL_Private_Constants I2C Private Constants
+  * @{
+  */
+
+/* Defines used to perform compute and check in the macros */
+#define LL_I2C_MAX_SPEED_STANDARD           100000U
+#define LL_I2C_MAX_SPEED_FAST               400000U
+/**
+  * @}
+  */
+
+/* Private macros ------------------------------------------------------------*/
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup I2C_LL_Private_Macros I2C Private Macros
+  * @{
+  */
+/**
+  * @}
+  */
+#endif /*USE_FULL_LL_DRIVER*/
+
+/* Exported types ------------------------------------------------------------*/
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup I2C_LL_ES_INIT I2C Exported Init structure
+  * @{
+  */
+typedef struct
+{
+  uint32_t PeripheralMode;      /*!< Specifies the peripheral mode.
+                                     This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE
+
+                                     This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */
+
+  uint32_t ClockSpeed;          /*!< Specifies the clock frequency.
+                                     This parameter must be set to a value lower than 400kHz (in Hz)
+
+                                     This feature can be modified afterwards using unitary function @ref LL_I2C_SetClockPeriod()
+                                     or @ref LL_I2C_SetDutyCycle() or @ref LL_I2C_SetClockSpeedMode() or @ref LL_I2C_ConfigSpeed(). */
+
+  uint32_t DutyCycle;           /*!< Specifies the I2C fast mode duty cycle.
+                                     This parameter can be a value of @ref I2C_LL_EC_DUTYCYCLE
+
+                                     This feature can be modified afterwards using unitary function @ref LL_I2C_SetDutyCycle(). */
+
+  uint32_t OwnAddress1;         /*!< Specifies the device own address 1.
+                                     This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF
+
+                                     This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
+
+  uint32_t TypeAcknowledge;     /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
+                                     This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE
+
+                                     This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */
+
+  uint32_t OwnAddrSize;         /*!< Specifies the device own address 1 size (7-bit or 10-bit).
+                                     This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1
+
+                                     This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
+} LL_I2C_InitTypeDef;
+/**
+  * @}
+  */
+#endif /*USE_FULL_LL_DRIVER*/
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup I2C_LL_Exported_Constants I2C Exported Constants
+  * @{
+  */
+
+/** @defgroup I2C_LL_EC_GET_FLAG Get Flags Defines
+  * @brief    Flags defines which can be used with LL_I2C_ReadReg function
+  * @{
+  */
+#define LL_I2C_SR1_SB                       I2C_SR1_SB              /*!< Start Bit (master mode)                   */
+#define LL_I2C_SR1_ADDR                     I2C_SR1_ADDR            /*!< Address sent (master mode) or
+                                                                         Address matched flag (slave mode)         */
+#define LL_I2C_SR1_BTF                      I2C_SR1_BTF             /*!< Byte Transfer Finished flag               */
+#define LL_I2C_SR1_ADD10                    I2C_SR1_ADD10           /*!< 10-bit header sent (master mode)          */
+#define LL_I2C_SR1_STOPF                    I2C_SR1_STOPF           /*!< Stop detection flag (slave mode)          */
+#define LL_I2C_SR1_RXNE                     I2C_SR1_RXNE            /*!< Data register not empty (receivers)       */
+#define LL_I2C_SR1_TXE                      I2C_SR1_TXE             /*!< Data register empty (transmitters)        */
+#define LL_I2C_SR1_BERR                     I2C_SR1_BERR            /*!< Bus error                                 */
+#define LL_I2C_SR1_ARLO                     I2C_SR1_ARLO            /*!< Arbitration lost                          */
+#define LL_I2C_SR1_AF                       I2C_SR1_AF              /*!< Acknowledge failure flag                  */
+#define LL_I2C_SR1_OVR                      I2C_SR1_OVR             /*!< Overrun/Underrun                          */
+#define LL_I2C_SR1_PECERR                   I2C_ISR_PECERR          /*!< PEC Error in reception (SMBus mode)       */
+#define LL_I2C_SR1_TIMEOUT                  I2C_ISR_TIMEOUT         /*!< Timeout detection flag (SMBus mode)       */
+#define LL_I2C_SR1_SMALERT                  I2C_ISR_SMALERT         /*!< SMBus alert (SMBus mode)                  */
+#define LL_I2C_SR2_MSL                      I2C_SR2_MSL             /*!< Master/Slave flag                         */
+#define LL_I2C_SR2_BUSY                     I2C_SR2_BUSY            /*!< Bus busy flag                             */
+#define LL_I2C_SR2_TRA                      I2C_SR2_TRA             /*!< Transmitter/receiver direction            */
+#define LL_I2C_SR2_GENCALL                  I2C_SR2_GENCALL         /*!< General call address (Slave mode)         */
+#define LL_I2C_SR2_SMBDEFAULT               I2C_SR2_SMBDEFAULT      /*!< SMBus Device default address (Slave mode) */
+#define LL_I2C_SR2_SMBHOST                  I2C_SR2_SMBHOST         /*!< SMBus Host address (Slave mode)           */
+#define LL_I2C_SR2_DUALF                    I2C_SR2_DUALF           /*!< Dual flag  (Slave mode)                   */
+/**
+  * @}
+  */
+
+/** @defgroup I2C_LL_EC_IT IT Defines
+  * @brief    IT defines which can be used with LL_I2C_ReadReg and  LL_I2C_WriteReg functions
+  * @{
+  */
+#define LL_I2C_CR2_ITEVTEN                  I2C_CR2_ITEVTEN         /*!< Events interrupts enable */
+#define LL_I2C_CR2_ITBUFEN                  I2C_CR2_ITBUFEN         /*!< Buffer interrupts enable */
+#define LL_I2C_CR2_ITERREN                  I2C_CR2_ITERREN         /*!< Error interrupts enable  */
+/**
+  * @}
+  */
+
+/** @defgroup I2C_LL_EC_OWNADDRESS1 Own Address 1 Length
+  * @{
+  */
+#define LL_I2C_OWNADDRESS1_7BIT             0x00004000U                                /*!< Own address 1 is a 7-bit address.   */
+#define LL_I2C_OWNADDRESS1_10BIT            (uint32_t)(I2C_OAR1_ADDMODE | 0x00004000U) /*!< Own address 1 is a 10-bit address.  */
+/**
+  * @}
+  */
+
+/** @defgroup I2C_LL_EC_DUTYCYCLE Fast Mode Duty Cycle
+  * @{
+  */
+#define LL_I2C_DUTYCYCLE_2                  0x00000000U             /*!< I2C fast mode Tlow/Thigh = 2        */
+#define LL_I2C_DUTYCYCLE_16_9               I2C_CCR_DUTY            /*!< I2C fast mode Tlow/Thigh = 16/9     */
+/**
+  * @}
+  */
+
+/** @defgroup I2C_LL_EC_CLOCK_SPEED_MODE Master Clock Speed Mode
+  * @{
+  */
+#define LL_I2C_CLOCK_SPEED_STANDARD_MODE    0x00000000U             /*!< Master clock speed range is standard mode */
+#define LL_I2C_CLOCK_SPEED_FAST_MODE        I2C_CCR_FS              /*!< Master clock speed range is fast mode     */
+/**
+  * @}
+  */
+
+/** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode
+  * @{
+  */
+#define LL_I2C_MODE_I2C                     0x00000000U                                                 /*!< I2C Master or Slave mode                                    */
+#define LL_I2C_MODE_SMBUS_HOST              (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP) /*!< SMBus Host address acknowledge                              */
+#define LL_I2C_MODE_SMBUS_DEVICE            I2C_CR1_SMBUS                                               /*!< SMBus Device default mode (Default address not acknowledge) */
+#define LL_I2C_MODE_SMBUS_DEVICE_ARP        (uint32_t)(I2C_CR1_SMBUS | I2C_CR1_ENARP)                   /*!< SMBus Device Default address acknowledge                    */
+/**
+  * @}
+  */
+
+/** @defgroup I2C_LL_EC_I2C_ACKNOWLEDGE Acknowledge Generation
+  * @{
+  */
+#define LL_I2C_ACK                          I2C_CR1_ACK             /*!< ACK is sent after current received byte. */
+#define LL_I2C_NACK                         0x00000000U             /*!< NACK is sent after current received byte.*/
+/**
+  * @}
+  */
+
+/** @defgroup I2C_LL_EC_DIRECTION Read Write Direction
+  * @{
+  */
+#define LL_I2C_DIRECTION_WRITE              I2C_SR2_TRA             /*!< Bus is in write transfer */
+#define LL_I2C_DIRECTION_READ               0x00000000U             /*!< Bus is in read transfer  */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup I2C_LL_Exported_Macros I2C Exported Macros
+  * @{
+  */
+
+/** @defgroup I2C_LL_EM_WRITE_READ Common Write and read registers Macros
+  * @{
+  */
+
+/**
+  * @brief  Write a value in I2C register
+  * @param  __INSTANCE__ I2C Instance
+  * @param  __REG__ Register to be written
+  * @param  __VALUE__ Value to be written in the register
+  * @retval None
+  */
+#define LL_I2C_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
+
+/**
+  * @brief  Read a value in I2C register
+  * @param  __INSTANCE__ I2C Instance
+  * @param  __REG__ Register to be read
+  * @retval Register value
+  */
+#define LL_I2C_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
+/**
+  * @}
+  */
+
+/** @defgroup I2C_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
+  * @{
+  */
+
+/**
+  * @brief  Convert Peripheral Clock Frequency in Mhz.
+  * @param  __PCLK__ This parameter must be a value of peripheral clock (in Hz).
+  * @retval Value of peripheral clock (in Mhz)
+  */
+#define __LL_I2C_FREQ_HZ_TO_MHZ(__PCLK__)                               (uint32_t)((__PCLK__)/1000000U)
+
+/**
+  * @brief  Convert Peripheral Clock Frequency in Hz.
+  * @param  __PCLK__ This parameter must be a value of peripheral clock (in Mhz).
+  * @retval Value of peripheral clock (in Hz)
+  */
+#define __LL_I2C_FREQ_MHZ_TO_HZ(__PCLK__)                               (uint32_t)((__PCLK__)*1000000U)
+
+/**
+  * @brief  Compute I2C Clock rising time.
+  * @param  __FREQRANGE__ This parameter must be a value of peripheral clock (in Mhz).
+  * @param  __SPEED__ This parameter must be a value lower than 400kHz (in Hz).
+  * @retval Value between Min_Data=0x02 and Max_Data=0x3F
+  */
+#define __LL_I2C_RISE_TIME(__FREQRANGE__, __SPEED__)                    (uint32_t)(((__SPEED__) <= LL_I2C_MAX_SPEED_STANDARD) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
+
+/**
+  * @brief  Compute Speed clock range to a Clock Control Register (I2C_CCR_CCR) value.
+  * @param  __PCLK__ This parameter must be a value of peripheral clock (in Hz).
+  * @param  __SPEED__ This parameter must be a value lower than 400kHz (in Hz).
+  * @param  __DUTYCYCLE__ This parameter can be one of the following values:
+  *         @arg @ref LL_I2C_DUTYCYCLE_2
+  *         @arg @ref LL_I2C_DUTYCYCLE_16_9
+  * @retval Value between Min_Data=0x004 and Max_Data=0xFFF, except in FAST DUTY mode where Min_Data=0x001.
+  */
+#define __LL_I2C_SPEED_TO_CCR(__PCLK__, __SPEED__, __DUTYCYCLE__)       (uint32_t)(((__SPEED__) <= LL_I2C_MAX_SPEED_STANDARD)? \
+                                                                                  (__LL_I2C_SPEED_STANDARD_TO_CCR((__PCLK__), (__SPEED__))) : \
+                                                                                  (__LL_I2C_SPEED_FAST_TO_CCR((__PCLK__), (__SPEED__), (__DUTYCYCLE__))))
+
+/**
+  * @brief  Compute Speed Standard clock range to a Clock Control Register (I2C_CCR_CCR) value.
+  * @param  __PCLK__ This parameter must be a value of peripheral clock (in Hz).
+  * @param  __SPEED__ This parameter must be a value lower than 100kHz (in Hz).
+  * @retval Value between Min_Data=0x004 and Max_Data=0xFFF.
+  */
+#define __LL_I2C_SPEED_STANDARD_TO_CCR(__PCLK__, __SPEED__)             (uint32_t)(((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U)))
+
+/**
+  * @brief  Compute Speed Fast clock range to a Clock Control Register (I2C_CCR_CCR) value.
+  * @param  __PCLK__ This parameter must be a value of peripheral clock (in Hz).
+  * @param  __SPEED__ This parameter must be a value between Min_Data=100Khz and Max_Data=400Khz (in Hz).
+  * @param  __DUTYCYCLE__ This parameter can be one of the following values:
+  *         @arg @ref LL_I2C_DUTYCYCLE_2
+  *         @arg @ref LL_I2C_DUTYCYCLE_16_9
+  * @retval Value between Min_Data=0x001 and Max_Data=0xFFF
+  */
+#define __LL_I2C_SPEED_FAST_TO_CCR(__PCLK__, __SPEED__, __DUTYCYCLE__)  (uint32_t)(((__DUTYCYCLE__) == LL_I2C_DUTYCYCLE_2)? \
+                                                                            (((((__PCLK__) / ((__SPEED__) * 3U)) & I2C_CCR_CCR) == 0U)? 1U:((__PCLK__) / ((__SPEED__) * 3U))) : \
+                                                                            (((((__PCLK__) / ((__SPEED__) * 25U)) & I2C_CCR_CCR) == 0U)? 1U:((__PCLK__) / ((__SPEED__) * 25U))))
+
+/**
+  * @brief  Get the Least significant bits of a 10-Bits address.
+  * @param  __ADDRESS__ This parameter must be a value of a 10-Bits slave address.
+  * @retval Value between Min_Data=0x00 and Max_Data=0xFF
+  */
+#define __LL_I2C_10BIT_ADDRESS(__ADDRESS__)                             ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
+
+/**
+  * @brief  Convert a 10-Bits address to a 10-Bits header with Write direction.
+  * @param  __ADDRESS__ This parameter must be a value of a 10-Bits slave address.
+  * @retval Value between Min_Data=0xF0 and Max_Data=0xF6
+  */
+#define __LL_I2C_10BIT_HEADER_WRITE(__ADDRESS__)                        ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) | (uint16_t)(0xF0))))
+
+/**
+  * @brief  Convert a 10-Bits address to a 10-Bits header with Read direction.
+  * @param  __ADDRESS__ This parameter must be a value of a 10-Bits slave address.
+  * @retval Value between Min_Data=0xF1 and Max_Data=0xF7
+  */
+#define __LL_I2C_10BIT_HEADER_READ(__ADDRESS__)                         ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) | (uint16_t)(0xF1))))
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+
+/** @defgroup I2C_LL_Exported_Functions I2C Exported Functions
+  * @{
+  */
+
+/** @defgroup I2C_LL_EF_Configuration Configuration
+  * @{
+  */
+
+/**
+  * @brief  Enable I2C peripheral (PE = 1).
+  * @rmtoll CR1          PE            LL_I2C_Enable
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_Enable(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR1, I2C_CR1_PE);
+}
+
+/**
+  * @brief  Disable I2C peripheral (PE = 0).
+  * @rmtoll CR1          PE            LL_I2C_Disable
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_Disable(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);
+}
+
+/**
+  * @brief  Check if the I2C peripheral is enabled or disabled.
+  * @rmtoll CR1          PE            LL_I2C_IsEnabled
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE));
+}
+
+
+/**
+  * @brief  Enable DMA transmission requests.
+  * @rmtoll CR2          DMAEN         LL_I2C_EnableDMAReq_TX
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableDMAReq_TX(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR2, I2C_CR2_DMAEN);
+}
+
+/**
+  * @brief  Disable DMA transmission requests.
+  * @rmtoll CR2          DMAEN         LL_I2C_DisableDMAReq_TX
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableDMAReq_TX(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR2, I2C_CR2_DMAEN);
+}
+
+/**
+  * @brief  Check if DMA transmission requests are enabled or disabled.
+  * @rmtoll CR2          DMAEN         LL_I2C_IsEnabledDMAReq_TX
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_TX(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR2, I2C_CR2_DMAEN) == (I2C_CR2_DMAEN));
+}
+
+/**
+  * @brief  Enable DMA reception requests.
+  * @rmtoll CR2          DMAEN         LL_I2C_EnableDMAReq_RX
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableDMAReq_RX(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR2, I2C_CR2_DMAEN);
+}
+
+/**
+  * @brief  Disable DMA reception requests.
+  * @rmtoll CR2          DMAEN         LL_I2C_DisableDMAReq_RX
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableDMAReq_RX(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR2, I2C_CR2_DMAEN);
+}
+
+/**
+  * @brief  Check if DMA reception requests are enabled or disabled.
+  * @rmtoll CR2          DMAEN         LL_I2C_IsEnabledDMAReq_RX
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR2, I2C_CR2_DMAEN) == (I2C_CR2_DMAEN));
+}
+
+/**
+  * @brief  Get the data register address used for DMA transfer.
+  * @rmtoll DR           DR            LL_I2C_DMA_GetRegAddr
+  * @param  I2Cx I2C Instance.
+  * @retval Address of data register
+  */
+__STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx)
+{
+  return (uint32_t) & (I2Cx->DR);
+}
+
+/**
+  * @brief  Enable Clock stretching.
+  * @note   This bit can only be programmed when the I2C is disabled (PE = 0).
+  * @rmtoll CR1          NOSTRETCH     LL_I2C_EnableClockStretching
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableClockStretching(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
+}
+
+/**
+  * @brief  Disable Clock stretching.
+  * @note   This bit can only be programmed when the I2C is disabled (PE = 0).
+  * @rmtoll CR1          NOSTRETCH     LL_I2C_DisableClockStretching
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableClockStretching(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
+}
+
+/**
+  * @brief  Check if Clock stretching is enabled or disabled.
+  * @rmtoll CR1          NOSTRETCH     LL_I2C_IsEnabledClockStretching
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledClockStretching(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH));
+}
+
+/**
+  * @brief  Enable General Call.
+  * @note   When enabled the Address 0x00 is ACKed.
+  * @rmtoll CR1          ENGC          LL_I2C_EnableGeneralCall
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableGeneralCall(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR1, I2C_CR1_ENGC);
+}
+
+/**
+  * @brief  Disable General Call.
+  * @note   When disabled the Address 0x00 is NACKed.
+  * @rmtoll CR1          ENGC          LL_I2C_DisableGeneralCall
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableGeneralCall(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR1, I2C_CR1_ENGC);
+}
+
+/**
+  * @brief  Check if General Call is enabled or disabled.
+  * @rmtoll CR1          ENGC          LL_I2C_IsEnabledGeneralCall
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledGeneralCall(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR1, I2C_CR1_ENGC) == (I2C_CR1_ENGC));
+}
+
+/**
+  * @brief  Set the Own Address1.
+  * @rmtoll OAR1         ADD0          LL_I2C_SetOwnAddress1\n
+  *         OAR1         ADD1_7        LL_I2C_SetOwnAddress1\n
+  *         OAR1         ADD8_9        LL_I2C_SetOwnAddress1\n
+  *         OAR1         ADDMODE       LL_I2C_SetOwnAddress1
+  * @param  I2Cx I2C Instance.
+  * @param  OwnAddress1 This parameter must be a value between Min_Data=0 and Max_Data=0x3FF.
+  * @param  OwnAddrSize This parameter can be one of the following values:
+  *         @arg @ref LL_I2C_OWNADDRESS1_7BIT
+  *         @arg @ref LL_I2C_OWNADDRESS1_10BIT
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_SetOwnAddress1(I2C_TypeDef *I2Cx, uint32_t OwnAddress1, uint32_t OwnAddrSize)
+{
+  MODIFY_REG(I2Cx->OAR1, I2C_OAR1_ADD0 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD8_9 | I2C_OAR1_ADDMODE, OwnAddress1 | OwnAddrSize);
+}
+
+/**
+  * @brief  Set the 7bits Own Address2.
+  * @note   This action has no effect if own address2 is enabled.
+  * @rmtoll OAR2         ADD2          LL_I2C_SetOwnAddress2
+  * @param  I2Cx I2C Instance.
+  * @param  OwnAddress2 This parameter must be a value between Min_Data=0 and Max_Data=0x7F.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_SetOwnAddress2(I2C_TypeDef *I2Cx, uint32_t OwnAddress2)
+{
+  MODIFY_REG(I2Cx->OAR2, I2C_OAR2_ADD2, OwnAddress2);
+}
+
+/**
+  * @brief  Enable acknowledge on Own Address2 match address.
+  * @rmtoll OAR2         ENDUAL        LL_I2C_EnableOwnAddress2
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableOwnAddress2(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->OAR2, I2C_OAR2_ENDUAL);
+}
+
+/**
+  * @brief  Disable  acknowledge on Own Address2 match address.
+  * @rmtoll OAR2         ENDUAL        LL_I2C_DisableOwnAddress2
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableOwnAddress2(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_ENDUAL);
+}
+
+/**
+  * @brief  Check if Own Address1 acknowledge is enabled or disabled.
+  * @rmtoll OAR2         ENDUAL        LL_I2C_IsEnabledOwnAddress2
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress2(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->OAR2, I2C_OAR2_ENDUAL) == (I2C_OAR2_ENDUAL));
+}
+
+/**
+  * @brief  Configure the Peripheral clock frequency.
+  * @rmtoll CR2          FREQ          LL_I2C_SetPeriphClock
+  * @param  I2Cx I2C Instance.
+  * @param  PeriphClock Peripheral Clock (in Hz)
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_SetPeriphClock(I2C_TypeDef *I2Cx, uint32_t PeriphClock)
+{
+  MODIFY_REG(I2Cx->CR2, I2C_CR2_FREQ, __LL_I2C_FREQ_HZ_TO_MHZ(PeriphClock));
+}
+
+/**
+  * @brief  Get the Peripheral clock frequency.
+  * @rmtoll CR2          FREQ          LL_I2C_GetPeriphClock
+  * @param  I2Cx I2C Instance.
+  * @retval Value of Peripheral Clock (in Hz)
+  */
+__STATIC_INLINE uint32_t LL_I2C_GetPeriphClock(I2C_TypeDef *I2Cx)
+{
+  return (uint32_t)(__LL_I2C_FREQ_MHZ_TO_HZ(READ_BIT(I2Cx->CR2, I2C_CR2_FREQ)));
+}
+
+/**
+  * @brief  Configure the Duty cycle (Fast mode only).
+  * @rmtoll CCR          DUTY          LL_I2C_SetDutyCycle
+  * @param  I2Cx I2C Instance.
+  * @param  DutyCycle This parameter can be one of the following values:
+  *         @arg @ref LL_I2C_DUTYCYCLE_2
+  *         @arg @ref LL_I2C_DUTYCYCLE_16_9
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_SetDutyCycle(I2C_TypeDef *I2Cx, uint32_t DutyCycle)
+{
+  MODIFY_REG(I2Cx->CCR, I2C_CCR_DUTY, DutyCycle);
+}
+
+/**
+  * @brief  Get the Duty cycle (Fast mode only).
+  * @rmtoll CCR          DUTY          LL_I2C_GetDutyCycle
+  * @param  I2Cx I2C Instance.
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_I2C_DUTYCYCLE_2
+  *         @arg @ref LL_I2C_DUTYCYCLE_16_9
+  */
+__STATIC_INLINE uint32_t LL_I2C_GetDutyCycle(I2C_TypeDef *I2Cx)
+{
+  return (uint32_t)(READ_BIT(I2Cx->CCR, I2C_CCR_DUTY));
+}
+
+/**
+  * @brief  Configure the I2C master clock speed mode.
+  * @rmtoll CCR          FS            LL_I2C_SetClockSpeedMode
+  * @param  I2Cx I2C Instance.
+  * @param  ClockSpeedMode This parameter can be one of the following values:
+  *         @arg @ref LL_I2C_CLOCK_SPEED_STANDARD_MODE
+  *         @arg @ref LL_I2C_CLOCK_SPEED_FAST_MODE
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_SetClockSpeedMode(I2C_TypeDef *I2Cx, uint32_t ClockSpeedMode)
+{
+  MODIFY_REG(I2Cx->CCR, I2C_CCR_FS, ClockSpeedMode);
+}
+
+/**
+  * @brief  Get the the I2C master speed mode.
+  * @rmtoll CCR          FS            LL_I2C_GetClockSpeedMode
+  * @param  I2Cx I2C Instance.
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_I2C_CLOCK_SPEED_STANDARD_MODE
+  *         @arg @ref LL_I2C_CLOCK_SPEED_FAST_MODE
+  */
+__STATIC_INLINE uint32_t LL_I2C_GetClockSpeedMode(I2C_TypeDef *I2Cx)
+{
+  return (uint32_t)(READ_BIT(I2Cx->CCR, I2C_CCR_FS));
+}
+
+/**
+  * @brief  Configure the SCL, SDA rising time.
+  * @note   This bit can only be programmed when the I2C is disabled (PE = 0).
+  * @rmtoll TRISE        TRISE         LL_I2C_SetRiseTime
+  * @param  I2Cx I2C Instance.
+  * @param  RiseTime This parameter must be a value between Min_Data=0x02 and Max_Data=0x3F.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_SetRiseTime(I2C_TypeDef *I2Cx, uint32_t RiseTime)
+{
+  MODIFY_REG(I2Cx->TRISE, I2C_TRISE_TRISE, RiseTime);
+}
+
+/**
+  * @brief  Get the SCL, SDA rising time.
+  * @rmtoll TRISE        TRISE         LL_I2C_GetRiseTime
+  * @param  I2Cx I2C Instance.
+  * @retval Value between Min_Data=0x02 and Max_Data=0x3F
+  */
+__STATIC_INLINE uint32_t LL_I2C_GetRiseTime(I2C_TypeDef *I2Cx)
+{
+  return (uint32_t)(READ_BIT(I2Cx->TRISE, I2C_TRISE_TRISE));
+}
+
+/**
+  * @brief  Configure the SCL high and low period.
+  * @note   This bit can only be programmed when the I2C is disabled (PE = 0).
+  * @rmtoll CCR          CCR           LL_I2C_SetClockPeriod
+  * @param  I2Cx I2C Instance.
+  * @param  ClockPeriod This parameter must be a value between Min_Data=0x004 and Max_Data=0xFFF, except in FAST DUTY mode where Min_Data=0x001.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_SetClockPeriod(I2C_TypeDef *I2Cx, uint32_t ClockPeriod)
+{
+  MODIFY_REG(I2Cx->CCR, I2C_CCR_CCR, ClockPeriod);
+}
+
+/**
+  * @brief  Get the SCL high and low period.
+  * @rmtoll CCR          CCR           LL_I2C_GetClockPeriod
+  * @param  I2Cx I2C Instance.
+  * @retval Value between Min_Data=0x004 and Max_Data=0xFFF, except in FAST DUTY mode where Min_Data=0x001.
+  */
+__STATIC_INLINE uint32_t LL_I2C_GetClockPeriod(I2C_TypeDef *I2Cx)
+{
+  return (uint32_t)(READ_BIT(I2Cx->CCR, I2C_CCR_CCR));
+}
+
+/**
+  * @brief  Configure the SCL speed.
+  * @note   This bit can only be programmed when the I2C is disabled (PE = 0).
+  * @rmtoll CR2          FREQ          LL_I2C_ConfigSpeed\n
+  *         TRISE        TRISE         LL_I2C_ConfigSpeed\n
+  *         CCR          FS            LL_I2C_ConfigSpeed\n
+  *         CCR          DUTY          LL_I2C_ConfigSpeed\n
+  *         CCR          CCR           LL_I2C_ConfigSpeed
+  * @param  I2Cx I2C Instance.
+  * @param  PeriphClock Peripheral Clock (in Hz)
+  * @param  ClockSpeed This parameter must be a value lower than 400kHz (in Hz).
+  * @param  DutyCycle This parameter can be one of the following values:
+  *         @arg @ref LL_I2C_DUTYCYCLE_2
+  *         @arg @ref LL_I2C_DUTYCYCLE_16_9
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_ConfigSpeed(I2C_TypeDef *I2Cx, uint32_t PeriphClock, uint32_t ClockSpeed,
+                                        uint32_t DutyCycle)
+{
+  uint32_t freqrange = 0x0U;
+  uint32_t clockconfig = 0x0U;
+
+  /* Compute frequency range */
+  freqrange = __LL_I2C_FREQ_HZ_TO_MHZ(PeriphClock);
+
+  /* Configure I2Cx: Frequency range register */
+  MODIFY_REG(I2Cx->CR2, I2C_CR2_FREQ, freqrange);
+
+  /* Configure I2Cx: Rise Time register */
+  MODIFY_REG(I2Cx->TRISE, I2C_TRISE_TRISE, __LL_I2C_RISE_TIME(freqrange, ClockSpeed));
+
+  /* Configure Speed mode, Duty Cycle and Clock control register value */
+  if (ClockSpeed > LL_I2C_MAX_SPEED_STANDARD)
+  {
+    /* Set Speed mode at fast and duty cycle for Clock Speed request in fast clock range */
+    clockconfig = LL_I2C_CLOCK_SPEED_FAST_MODE                                          | \
+                  __LL_I2C_SPEED_FAST_TO_CCR(PeriphClock, ClockSpeed, DutyCycle)        | \
+                  DutyCycle;
+  }
+  else
+  {
+    /* Set Speed mode at standard for Clock Speed request in standard clock range */
+    clockconfig = LL_I2C_CLOCK_SPEED_STANDARD_MODE                                      | \
+                  __LL_I2C_SPEED_STANDARD_TO_CCR(PeriphClock, ClockSpeed);
+  }
+
+  /* Configure I2Cx: Clock control register */
+  MODIFY_REG(I2Cx->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), clockconfig);
+}
+
+/**
+  * @brief  Configure peripheral mode.
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @rmtoll CR1          SMBUS         LL_I2C_SetMode\n
+  *         CR1          SMBTYPE       LL_I2C_SetMode\n
+  *         CR1          ENARP         LL_I2C_SetMode
+  * @param  I2Cx I2C Instance.
+  * @param  PeripheralMode This parameter can be one of the following values:
+  *         @arg @ref LL_I2C_MODE_I2C
+  *         @arg @ref LL_I2C_MODE_SMBUS_HOST
+  *         @arg @ref LL_I2C_MODE_SMBUS_DEVICE
+  *         @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
+{
+  MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP, PeripheralMode);
+}
+
+/**
+  * @brief  Get peripheral mode.
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @rmtoll CR1          SMBUS         LL_I2C_GetMode\n
+  *         CR1          SMBTYPE       LL_I2C_GetMode\n
+  *         CR1          ENARP         LL_I2C_GetMode
+  * @param  I2Cx I2C Instance.
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_I2C_MODE_I2C
+  *         @arg @ref LL_I2C_MODE_SMBUS_HOST
+  *         @arg @ref LL_I2C_MODE_SMBUS_DEVICE
+  *         @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
+  */
+__STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
+{
+  return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBUS | I2C_CR1_SMBTYPE | I2C_CR1_ENARP));
+}
+
+/**
+  * @brief  Enable SMBus alert (Host or Device mode)
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @note   SMBus Device mode:
+  *         - SMBus Alert pin is drived low and
+  *           Alert Response Address Header acknowledge is enabled.
+  *         SMBus Host mode:
+  *         - SMBus Alert pin management is supported.
+  * @rmtoll CR1          ALERT         LL_I2C_EnableSMBusAlert
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR1, I2C_CR1_ALERT);
+}
+
+/**
+  * @brief  Disable SMBus alert (Host or Device mode)
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @note   SMBus Device mode:
+  *         - SMBus Alert pin is not drived (can be used as a standard GPIO) and
+  *           Alert Response Address Header acknowledge is disabled.
+  *         SMBus Host mode:
+  *         - SMBus Alert pin management is not supported.
+  * @rmtoll CR1          ALERT         LL_I2C_DisableSMBusAlert
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERT);
+}
+
+/**
+  * @brief  Check if SMBus alert (Host or Device mode) is enabled or disabled.
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @rmtoll CR1          ALERT         LL_I2C_IsEnabledSMBusAlert
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR1, I2C_CR1_ALERT) == (I2C_CR1_ALERT));
+}
+
+/**
+  * @brief  Enable SMBus Packet Error Calculation (PEC).
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @rmtoll CR1          ENPEC         LL_I2C_EnableSMBusPEC
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR1, I2C_CR1_ENPEC);
+}
+
+/**
+  * @brief  Disable SMBus Packet Error Calculation (PEC).
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @rmtoll CR1          ENPEC         LL_I2C_DisableSMBusPEC
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR1, I2C_CR1_ENPEC);
+}
+
+/**
+  * @brief  Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @rmtoll CR1          ENPEC         LL_I2C_IsEnabledSMBusPEC
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR1, I2C_CR1_ENPEC) == (I2C_CR1_ENPEC));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup I2C_LL_EF_IT_Management IT_Management
+  * @{
+  */
+
+/**
+  * @brief  Enable TXE interrupt.
+  * @rmtoll CR2          ITEVTEN       LL_I2C_EnableIT_TX\n
+  *         CR2          ITBUFEN       LL_I2C_EnableIT_TX
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableIT_TX(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN);
+}
+
+/**
+  * @brief  Disable TXE interrupt.
+  * @rmtoll CR2          ITEVTEN       LL_I2C_DisableIT_TX\n
+  *         CR2          ITBUFEN       LL_I2C_DisableIT_TX
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableIT_TX(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN);
+}
+
+/**
+  * @brief  Check if the TXE Interrupt is enabled or disabled.
+  * @rmtoll CR2          ITEVTEN       LL_I2C_IsEnabledIT_TX\n
+  *         CR2          ITBUFEN       LL_I2C_IsEnabledIT_TX
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TX(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN) == (I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN));
+}
+
+/**
+  * @brief  Enable RXNE interrupt.
+  * @rmtoll CR2          ITEVTEN       LL_I2C_EnableIT_RX\n
+  *         CR2          ITBUFEN       LL_I2C_EnableIT_RX
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableIT_RX(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN);
+}
+
+/**
+  * @brief  Disable RXNE interrupt.
+  * @rmtoll CR2          ITEVTEN       LL_I2C_DisableIT_RX\n
+  *         CR2          ITBUFEN       LL_I2C_DisableIT_RX
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableIT_RX(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN);
+}
+
+/**
+  * @brief  Check if the RXNE Interrupt is enabled or disabled.
+  * @rmtoll CR2          ITEVTEN       LL_I2C_IsEnabledIT_RX\n
+  *         CR2          ITBUFEN       LL_I2C_IsEnabledIT_RX
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_RX(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN) == (I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN));
+}
+
+/**
+  * @brief  Enable Events interrupts.
+  * @note   Any of these events will generate interrupt :
+  *         Start Bit (SB)
+  *         Address sent, Address matched (ADDR)
+  *         10-bit header sent (ADD10)
+  *         Stop detection  (STOPF)
+  *         Byte transfer finished (BTF)
+  *
+  * @note   Any of these events will generate interrupt if Buffer interrupts are enabled too(using unitary function @ref LL_I2C_EnableIT_BUF()) :
+  *         Receive buffer not empty (RXNE)
+  *         Transmit buffer empty (TXE)
+  * @rmtoll CR2          ITEVTEN       LL_I2C_EnableIT_EVT
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableIT_EVT(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN);
+}
+
+/**
+  * @brief  Disable Events interrupts.
+  * @note   Any of these events will generate interrupt :
+  *         Start Bit (SB)
+  *         Address sent, Address matched (ADDR)
+  *         10-bit header sent (ADD10)
+  *         Stop detection  (STOPF)
+  *         Byte transfer finished (BTF)
+  *         Receive buffer not empty (RXNE)
+  *         Transmit buffer empty (TXE)
+  * @rmtoll CR2          ITEVTEN       LL_I2C_DisableIT_EVT
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableIT_EVT(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN);
+}
+
+/**
+  * @brief  Check if Events interrupts are enabled or disabled.
+  * @rmtoll CR2          ITEVTEN       LL_I2C_IsEnabledIT_EVT
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_EVT(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN) == (I2C_CR2_ITEVTEN));
+}
+
+/**
+  * @brief  Enable Buffer interrupts.
+  * @note   Any of these Buffer events will generate interrupt if Events interrupts are enabled too(using unitary function @ref LL_I2C_EnableIT_EVT()) :
+  *         Receive buffer not empty (RXNE)
+  *         Transmit buffer empty (TXE)
+  * @rmtoll CR2          ITBUFEN       LL_I2C_EnableIT_BUF
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableIT_BUF(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR2, I2C_CR2_ITBUFEN);
+}
+
+/**
+  * @brief  Disable Buffer interrupts.
+  * @note   Any of these Buffer events will generate interrupt :
+  *         Receive buffer not empty (RXNE)
+  *         Transmit buffer empty (TXE)
+  * @rmtoll CR2          ITBUFEN       LL_I2C_DisableIT_BUF
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableIT_BUF(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITBUFEN);
+}
+
+/**
+  * @brief  Check if Buffer interrupts are enabled or disabled.
+  * @rmtoll CR2          ITBUFEN       LL_I2C_IsEnabledIT_BUF
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_BUF(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR2, I2C_CR2_ITBUFEN) == (I2C_CR2_ITBUFEN));
+}
+
+/**
+  * @brief  Enable Error interrupts.
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @note   Any of these errors will generate interrupt :
+  *         Bus Error detection (BERR)
+  *         Arbitration Loss (ARLO)
+  *         Acknowledge Failure(AF)
+  *         Overrun/Underrun (OVR)
+  *         SMBus Timeout detection (TIMEOUT)
+  *         SMBus PEC error detection (PECERR)
+  *         SMBus Alert pin event detection (SMBALERT)
+  * @rmtoll CR2          ITERREN       LL_I2C_EnableIT_ERR
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR2, I2C_CR2_ITERREN);
+}
+
+/**
+  * @brief  Disable Error interrupts.
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @note   Any of these errors will generate interrupt :
+  *         Bus Error detection (BERR)
+  *         Arbitration Loss (ARLO)
+  *         Acknowledge Failure(AF)
+  *         Overrun/Underrun (OVR)
+  *         SMBus Timeout detection (TIMEOUT)
+  *         SMBus PEC error detection (PECERR)
+  *         SMBus Alert pin event detection (SMBALERT)
+  * @rmtoll CR2          ITERREN       LL_I2C_DisableIT_ERR
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableIT_ERR(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITERREN);
+}
+
+/**
+  * @brief  Check if Error interrupts are enabled or disabled.
+  * @rmtoll CR2          ITERREN       LL_I2C_IsEnabledIT_ERR
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR2, I2C_CR2_ITERREN) == (I2C_CR2_ITERREN));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup I2C_LL_EF_FLAG_management FLAG_management
+  * @{
+  */
+
+/**
+  * @brief  Indicate the status of Transmit data register empty flag.
+  * @note   RESET: When next data is written in Transmit data register.
+  *         SET: When Transmit data register is empty.
+  * @rmtoll SR1          TXE           LL_I2C_IsActiveFlag_TXE
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR1, I2C_SR1_TXE) == (I2C_SR1_TXE));
+}
+
+/**
+  * @brief  Indicate the status of Byte Transfer Finished flag.
+  *         RESET: When Data byte transfer not done.
+  *         SET: When Data byte transfer succeeded.
+  * @rmtoll SR1          BTF           LL_I2C_IsActiveFlag_BTF
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BTF(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR1, I2C_SR1_BTF) == (I2C_SR1_BTF));
+}
+
+/**
+  * @brief  Indicate the status of Receive data register not empty flag.
+  * @note   RESET: When Receive data register is read.
+  *         SET: When the received data is copied in Receive data register.
+  * @rmtoll SR1          RXNE          LL_I2C_IsActiveFlag_RXNE
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR1, I2C_SR1_RXNE) == (I2C_SR1_RXNE));
+}
+
+/**
+  * @brief  Indicate the status of Start Bit (master mode).
+  * @note   RESET: When No Start condition.
+  *         SET: When Start condition is generated.
+  * @rmtoll SR1          SB            LL_I2C_IsActiveFlag_SB
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_SB(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR1, I2C_SR1_SB) == (I2C_SR1_SB));
+}
+
+/**
+  * @brief  Indicate the status of Address sent (master mode) or Address matched flag (slave mode).
+  * @note   RESET: Clear default value.
+  *         SET: When the address is fully sent (master mode) or when the received slave address matched with one of the enabled slave address (slave mode).
+  * @rmtoll SR1          ADDR          LL_I2C_IsActiveFlag_ADDR
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR1, I2C_SR1_ADDR) == (I2C_SR1_ADDR));
+}
+
+/**
+  * @brief  Indicate the status of 10-bit header sent (master mode).
+  * @note   RESET: When no ADD10 event occurred.
+  *         SET: When the master has sent the first address byte (header).
+  * @rmtoll SR1          ADD10         LL_I2C_IsActiveFlag_ADD10
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADD10(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR1, I2C_SR1_ADD10) == (I2C_SR1_ADD10));
+}
+
+/**
+  * @brief  Indicate the status of Acknowledge failure flag.
+  * @note   RESET: No acknowledge failure.
+  *         SET: When an acknowledge failure is received after a byte transmission.
+  * @rmtoll SR1          AF            LL_I2C_IsActiveFlag_AF
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_AF(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR1, I2C_SR1_AF) == (I2C_SR1_AF));
+}
+
+/**
+  * @brief  Indicate the status of Stop detection flag (slave mode).
+  * @note   RESET: Clear default value.
+  *         SET: When a Stop condition is detected.
+  * @rmtoll SR1          STOPF         LL_I2C_IsActiveFlag_STOP
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR1, I2C_SR1_STOPF) == (I2C_SR1_STOPF));
+}
+
+/**
+  * @brief  Indicate the status of Bus error flag.
+  * @note   RESET: Clear default value.
+  *         SET: When a misplaced Start or Stop condition is detected.
+  * @rmtoll SR1          BERR          LL_I2C_IsActiveFlag_BERR
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR1, I2C_SR1_BERR) == (I2C_SR1_BERR));
+}
+
+/**
+  * @brief  Indicate the status of Arbitration lost flag.
+  * @note   RESET: Clear default value.
+  *         SET: When arbitration lost.
+  * @rmtoll SR1          ARLO          LL_I2C_IsActiveFlag_ARLO
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR1, I2C_SR1_ARLO) == (I2C_SR1_ARLO));
+}
+
+/**
+  * @brief  Indicate the status of Overrun/Underrun flag.
+  * @note   RESET: Clear default value.
+  *         SET: When an overrun/underrun error occurs (Clock Stretching Disabled).
+  * @rmtoll SR1          OVR           LL_I2C_IsActiveFlag_OVR
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR1, I2C_SR1_OVR) == (I2C_SR1_OVR));
+}
+
+/**
+  * @brief  Indicate the status of SMBus PEC error flag in reception.
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @rmtoll SR1          PECERR        LL_I2C_IsActiveSMBusFlag_PECERR
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR1, I2C_SR1_PECERR) == (I2C_SR1_PECERR));
+}
+
+/**
+  * @brief  Indicate the status of SMBus Timeout detection flag.
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @rmtoll SR1          TIMEOUT       LL_I2C_IsActiveSMBusFlag_TIMEOUT
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR1, I2C_SR1_TIMEOUT) == (I2C_SR1_TIMEOUT));
+}
+
+/**
+  * @brief  Indicate the status of SMBus alert flag.
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @rmtoll SR1          SMBALERT      LL_I2C_IsActiveSMBusFlag_ALERT
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR1, I2C_SR1_SMBALERT) == (I2C_SR1_SMBALERT));
+}
+
+/**
+  * @brief  Indicate the status of Bus Busy flag.
+  * @note   RESET: Clear default value.
+  *         SET: When a Start condition is detected.
+  * @rmtoll SR2          BUSY          LL_I2C_IsActiveFlag_BUSY
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BUSY(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR2, I2C_SR2_BUSY) == (I2C_SR2_BUSY));
+}
+
+/**
+  * @brief  Indicate the status of Dual flag.
+  * @note   RESET: Received address matched with OAR1.
+  *         SET: Received address matched with OAR2.
+  * @rmtoll SR2          DUALF         LL_I2C_IsActiveFlag_DUAL
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_DUAL(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR2, I2C_SR2_DUALF) == (I2C_SR2_DUALF));
+}
+
+/**
+  * @brief  Indicate the status of SMBus Host address reception (Slave mode).
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @note   RESET: No SMBus Host address
+  *         SET: SMBus Host address received.
+  * @note   This status is cleared by hardware after a STOP condition or repeated START condition.
+  * @rmtoll SR2          SMBHOST       LL_I2C_IsActiveSMBusFlag_SMBHOST
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_SMBHOST(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR2, I2C_SR2_SMBHOST) == (I2C_SR2_SMBHOST));
+}
+
+/**
+  * @brief  Indicate the status of SMBus Device default address reception (Slave mode).
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @note   RESET: No SMBus Device default address
+  *         SET: SMBus Device default address received.
+  * @note   This status is cleared by hardware after a STOP condition or repeated START condition.
+  * @rmtoll SR2          SMBDEFAULT    LL_I2C_IsActiveSMBusFlag_SMBDEFAULT
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_SMBDEFAULT(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR2, I2C_SR2_SMBDEFAULT) == (I2C_SR2_SMBDEFAULT));
+}
+
+/**
+  * @brief  Indicate the status of General call address reception (Slave mode).
+  * @note   RESET: No General call address
+  *         SET: General call address received.
+  * @note   This status is cleared by hardware after a STOP condition or repeated START condition.
+  * @rmtoll SR2          GENCALL       LL_I2C_IsActiveFlag_GENCALL
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_GENCALL(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR2, I2C_SR2_GENCALL) == (I2C_SR2_GENCALL));
+}
+
+/**
+  * @brief  Indicate the status of Master/Slave flag.
+  * @note   RESET: Slave Mode.
+  *         SET: Master Mode.
+  * @rmtoll SR2          MSL           LL_I2C_IsActiveFlag_MSL
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_MSL(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->SR2, I2C_SR2_MSL) == (I2C_SR2_MSL));
+}
+
+/**
+  * @brief  Clear Address Matched flag.
+  * @note   Clearing this flag is done by a read access to the I2Cx_SR1
+  *         register followed by a read access to the I2Cx_SR2 register.
+  * @rmtoll SR1          ADDR          LL_I2C_ClearFlag_ADDR
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_ClearFlag_ADDR(I2C_TypeDef *I2Cx)
+{
+  __IO uint32_t tmpreg;
+  tmpreg = I2Cx->SR1;
+  (void) tmpreg;
+  tmpreg = I2Cx->SR2;
+  (void) tmpreg;
+}
+
+/**
+  * @brief  Clear Acknowledge failure flag.
+  * @rmtoll SR1          AF            LL_I2C_ClearFlag_AF
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_ClearFlag_AF(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->SR1, I2C_SR1_AF);
+}
+
+/**
+  * @brief  Clear Stop detection flag.
+  * @note   Clearing this flag is done by a read access to the I2Cx_SR1
+  *         register followed by a write access to I2Cx_CR1 register.
+  * @rmtoll SR1          STOPF         LL_I2C_ClearFlag_STOP\n
+  *         CR1          PE            LL_I2C_ClearFlag_STOP
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
+{
+  __IO uint32_t tmpreg;
+  tmpreg = I2Cx->SR1;
+  (void) tmpreg;
+  SET_BIT(I2Cx->CR1, I2C_CR1_PE);
+}
+
+/**
+  * @brief  Clear Bus error flag.
+  * @rmtoll SR1          BERR          LL_I2C_ClearFlag_BERR
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_ClearFlag_BERR(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->SR1, I2C_SR1_BERR);
+}
+
+/**
+  * @brief  Clear Arbitration lost flag.
+  * @rmtoll SR1          ARLO          LL_I2C_ClearFlag_ARLO
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_ClearFlag_ARLO(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->SR1, I2C_SR1_ARLO);
+}
+
+/**
+  * @brief  Clear Overrun/Underrun flag.
+  * @rmtoll SR1          OVR           LL_I2C_ClearFlag_OVR
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->SR1, I2C_SR1_OVR);
+}
+
+/**
+  * @brief  Clear SMBus PEC error flag.
+  * @rmtoll SR1          PECERR        LL_I2C_ClearSMBusFlag_PECERR
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->SR1, I2C_SR1_PECERR);
+}
+
+/**
+  * @brief  Clear SMBus Timeout detection flag.
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @rmtoll SR1          TIMEOUT       LL_I2C_ClearSMBusFlag_TIMEOUT
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->SR1, I2C_SR1_TIMEOUT);
+}
+
+/**
+  * @brief  Clear SMBus Alert flag.
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @rmtoll SR1          SMBALERT      LL_I2C_ClearSMBusFlag_ALERT
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_ClearSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->SR1, I2C_SR1_SMBALERT);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup I2C_LL_EF_Data_Management Data_Management
+  * @{
+  */
+
+/**
+  * @brief  Enable Reset of I2C peripheral.
+  * @rmtoll CR1          SWRST         LL_I2C_EnableReset
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableReset(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR1, I2C_CR1_SWRST);
+}
+
+/**
+  * @brief  Disable Reset of I2C peripheral.
+  * @rmtoll CR1          SWRST         LL_I2C_DisableReset
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableReset(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR1, I2C_CR1_SWRST);
+}
+
+/**
+  * @brief  Check if the I2C peripheral is under reset state or not.
+  * @rmtoll CR1          SWRST         LL_I2C_IsResetEnabled
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsResetEnabled(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR1, I2C_CR1_SWRST) == (I2C_CR1_SWRST));
+}
+
+/**
+  * @brief  Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
+  * @note   Usage in Slave or Master mode.
+  * @rmtoll CR1          ACK           LL_I2C_AcknowledgeNextData
+  * @param  I2Cx I2C Instance.
+  * @param  TypeAcknowledge This parameter can be one of the following values:
+  *         @arg @ref LL_I2C_ACK
+  *         @arg @ref LL_I2C_NACK
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_AcknowledgeNextData(I2C_TypeDef *I2Cx, uint32_t TypeAcknowledge)
+{
+  MODIFY_REG(I2Cx->CR1, I2C_CR1_ACK, TypeAcknowledge);
+}
+
+/**
+  * @brief  Generate a START or RESTART condition
+  * @note   The START bit can be set even if bus is BUSY or I2C is in slave mode.
+  *         This action has no effect when RELOAD is set.
+  * @rmtoll CR1          START         LL_I2C_GenerateStartCondition
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_GenerateStartCondition(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR1, I2C_CR1_START);
+}
+
+/**
+  * @brief  Generate a STOP condition after the current byte transfer (master mode).
+  * @rmtoll CR1          STOP          LL_I2C_GenerateStopCondition
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR1, I2C_CR1_STOP);
+}
+
+/**
+  * @brief  Enable bit POS (master/host mode).
+  * @note   In that case, the ACK bit controls the (N)ACK of the next byte received or the PEC bit indicates that the next byte in shift register is a PEC.
+  * @rmtoll CR1          POS           LL_I2C_EnableBitPOS
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableBitPOS(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR1, I2C_CR1_POS);
+}
+
+/**
+  * @brief  Disable bit POS (master/host mode).
+  * @note   In that case, the ACK bit controls the (N)ACK of the current byte received or the PEC bit indicates that the current byte in shift register is a PEC.
+  * @rmtoll CR1          POS           LL_I2C_DisableBitPOS
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableBitPOS(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR1, I2C_CR1_POS);
+}
+
+/**
+  * @brief  Check if bit POS  is enabled or disabled.
+  * @rmtoll CR1          POS           LL_I2C_IsEnabledBitPOS
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledBitPOS(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR1, I2C_CR1_POS) == (I2C_CR1_POS));
+}
+
+/**
+  * @brief  Indicate the value of transfer direction.
+  * @note   RESET: Bus is in read transfer (peripheral point of view).
+  *         SET: Bus is in write transfer (peripheral point of view).
+  * @rmtoll SR2          TRA           LL_I2C_GetTransferDirection
+  * @param  I2Cx I2C Instance.
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_I2C_DIRECTION_WRITE
+  *         @arg @ref LL_I2C_DIRECTION_READ
+  */
+__STATIC_INLINE uint32_t LL_I2C_GetTransferDirection(I2C_TypeDef *I2Cx)
+{
+  return (uint32_t)(READ_BIT(I2Cx->SR2, I2C_SR2_TRA));
+}
+
+/**
+  * @brief  Enable DMA last transfer.
+  * @note   This action mean that next DMA EOT is the last transfer.
+  * @rmtoll CR2          LAST          LL_I2C_EnableLastDMA
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableLastDMA(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR2, I2C_CR2_LAST);
+}
+
+/**
+  * @brief  Disable DMA last transfer.
+  * @note   This action mean that next DMA EOT is not the last transfer.
+  * @rmtoll CR2          LAST          LL_I2C_DisableLastDMA
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableLastDMA(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR2, I2C_CR2_LAST);
+}
+
+/**
+  * @brief  Check if DMA last transfer is enabled or disabled.
+  * @rmtoll CR2          LAST          LL_I2C_IsEnabledLastDMA
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledLastDMA(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR2, I2C_CR2_LAST) == (I2C_CR2_LAST));
+}
+
+/**
+  * @brief  Enable transfer or internal comparison of the SMBus Packet Error byte (transmission or reception mode).
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @note   This feature is cleared by hardware when the PEC byte is transferred or compared,
+  *         or by a START or STOP condition, it is also cleared by software.
+  * @rmtoll CR1          PEC           LL_I2C_EnableSMBusPECCompare
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
+{
+  SET_BIT(I2Cx->CR1, I2C_CR1_PEC);
+}
+
+/**
+  * @brief  Disable transfer or internal comparison of the SMBus Packet Error byte (transmission or reception mode).
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @rmtoll CR1          PEC           LL_I2C_DisableSMBusPECCompare
+  * @param  I2Cx I2C Instance.
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_DisableSMBusPECCompare(I2C_TypeDef *I2Cx)
+{
+  CLEAR_BIT(I2Cx->CR1, I2C_CR1_PEC);
+}
+
+/**
+  * @brief  Check if the SMBus Packet Error byte transfer or internal comparison is requested or not.
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @rmtoll CR1          PEC           LL_I2C_IsEnabledSMBusPECCompare
+  * @param  I2Cx I2C Instance.
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
+{
+  return (READ_BIT(I2Cx->CR1, I2C_CR1_PEC) == (I2C_CR1_PEC));
+}
+
+/**
+  * @brief  Get the SMBus Packet Error byte calculated.
+  * @note   Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
+  *         SMBus feature is supported by the I2Cx Instance.
+  * @rmtoll SR2          PEC           LL_I2C_GetSMBusPEC
+  * @param  I2Cx I2C Instance.
+  * @retval Value between Min_Data=0x00 and Max_Data=0xFF
+  */
+__STATIC_INLINE uint32_t LL_I2C_GetSMBusPEC(I2C_TypeDef *I2Cx)
+{
+  return (uint32_t)(READ_BIT(I2Cx->SR2, I2C_SR2_PEC) >> I2C_SR2_PEC_Pos);
+}
+
+/**
+  * @brief  Read Receive Data register.
+  * @rmtoll DR           DR            LL_I2C_ReceiveData8
+  * @param  I2Cx I2C Instance.
+  * @retval Value between Min_Data=0x0 and Max_Data=0xFF
+  */
+__STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
+{
+  return (uint8_t)(READ_BIT(I2Cx->DR, I2C_DR_DR));
+}
+
+/**
+  * @brief  Write in Transmit Data Register .
+  * @rmtoll DR           DR            LL_I2C_TransmitData8
+  * @param  I2Cx I2C Instance.
+  * @param  Data Value between Min_Data=0x0 and Max_Data=0xFF
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
+{
+  MODIFY_REG(I2Cx->DR, I2C_DR_DR, Data);
+}
+
+/**
+  * @}
+  */
+
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup I2C_LL_EF_Init Initialization and de-initialization functions
+  * @{
+  */
+
+uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct);
+uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx);
+void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
+
+
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* I2C1 || I2C2 */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F1xx_LL_I2C_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_pwr.h b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_pwr.h
new file mode 100644
index 0000000..caad8b3
--- /dev/null
+++ b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_pwr.h
@@ -0,0 +1,440 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_ll_pwr.h
+  * @author  MCD Application Team
+  * @brief   Header file of PWR LL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_LL_PWR_H
+#define __STM32F1xx_LL_PWR_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx.h"
+
+/** @addtogroup STM32F1xx_LL_Driver
+  * @{
+  */
+
+#if defined(PWR)
+
+/** @defgroup PWR_LL PWR
+  * @{
+  */
+
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private constants ---------------------------------------------------------*/
+/* Private macros ------------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
+  * @{
+  */
+
+/** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
+  * @brief    Flags defines which can be used with LL_PWR_WriteReg function
+  * @{
+  */
+#define LL_PWR_CR_CSBF                     PWR_CR_CSBF            /*!< Clear standby flag */
+#define LL_PWR_CR_CWUF                     PWR_CR_CWUF            /*!< Clear wakeup flag */
+/**
+  * @}
+  */
+
+/** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
+  * @brief    Flags defines which can be used with LL_PWR_ReadReg function
+  * @{
+  */
+#define LL_PWR_CSR_WUF                     PWR_CSR_WUF            /*!< Wakeup flag */
+#define LL_PWR_CSR_SBF                     PWR_CSR_SBF            /*!< Standby flag */
+#define LL_PWR_CSR_PVDO                    PWR_CSR_PVDO           /*!< Power voltage detector output flag */
+#define LL_PWR_CSR_EWUP1                   PWR_CSR_EWUP           /*!< Enable WKUP pin 1 */
+/**
+  * @}
+  */
+
+
+/** @defgroup PWR_LL_EC_MODE_PWR Mode Power
+  * @{
+  */
+#define LL_PWR_MODE_STOP_MAINREGU             0x00000000U                    /*!< Enter Stop mode when the CPU enters deepsleep */
+#define LL_PWR_MODE_STOP_LPREGU               (PWR_CR_LPDS)                  /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */
+#define LL_PWR_MODE_STANDBY                   (PWR_CR_PDDS)                  /*!< Enter Standby mode when the CPU enters deepsleep */
+/**
+  * @}
+  */
+
+/** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE  Regulator Mode In Deep Sleep Mode
+ * @{
+ */
+#define LL_PWR_REGU_DSMODE_MAIN        0x00000000U           /*!< Voltage Regulator in main mode during deepsleep mode */
+#define LL_PWR_REGU_DSMODE_LOW_POWER   (PWR_CR_LPDS)         /*!< Voltage Regulator in low-power mode during deepsleep mode */
+/**
+  * @}
+  */
+
+/** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
+  * @{
+  */
+#define LL_PWR_PVDLEVEL_0                  (PWR_CR_PLS_LEV0)      /*!< Voltage threshold detected by PVD 2.2 V */
+#define LL_PWR_PVDLEVEL_1                  (PWR_CR_PLS_LEV1)      /*!< Voltage threshold detected by PVD 2.3 V */
+#define LL_PWR_PVDLEVEL_2                  (PWR_CR_PLS_LEV2)      /*!< Voltage threshold detected by PVD 2.4 V */
+#define LL_PWR_PVDLEVEL_3                  (PWR_CR_PLS_LEV3)      /*!< Voltage threshold detected by PVD 2.5 V */
+#define LL_PWR_PVDLEVEL_4                  (PWR_CR_PLS_LEV4)      /*!< Voltage threshold detected by PVD 2.6 V */
+#define LL_PWR_PVDLEVEL_5                  (PWR_CR_PLS_LEV5)      /*!< Voltage threshold detected by PVD 2.7 V */
+#define LL_PWR_PVDLEVEL_6                  (PWR_CR_PLS_LEV6)      /*!< Voltage threshold detected by PVD 2.8 V */
+#define LL_PWR_PVDLEVEL_7                  (PWR_CR_PLS_LEV7)      /*!< Voltage threshold detected by PVD 2.9 V */
+/**
+  * @}
+  */
+/** @defgroup PWR_LL_EC_WAKEUP_PIN  Wakeup Pins
+  * @{
+  */
+#define LL_PWR_WAKEUP_PIN1                 (PWR_CSR_EWUP)         /*!< WKUP pin 1 : PA0 */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
+  * @{
+  */
+
+/** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
+  * @{
+  */
+
+/**
+  * @brief  Write a value in PWR register
+  * @param  __REG__ Register to be written
+  * @param  __VALUE__ Value to be written in the register
+  * @retval None
+  */
+#define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
+
+/**
+  * @brief  Read a value in PWR register
+  * @param  __REG__ Register to be read
+  * @retval Register value
+  */
+#define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
+  * @{
+  */
+
+/** @defgroup PWR_LL_EF_Configuration Configuration
+  * @{
+  */
+
+/**
+  * @brief  Enable access to the backup domain
+  * @rmtoll CR    DBP       LL_PWR_EnableBkUpAccess
+  * @retval None
+  */
+__STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
+{
+  SET_BIT(PWR->CR, PWR_CR_DBP);
+}
+
+/**
+  * @brief  Disable access to the backup domain
+  * @rmtoll CR    DBP       LL_PWR_DisableBkUpAccess
+  * @retval None
+  */
+__STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
+{
+  CLEAR_BIT(PWR->CR, PWR_CR_DBP);
+}
+
+/**
+  * @brief  Check if the backup domain is enabled
+  * @rmtoll CR    DBP       LL_PWR_IsEnabledBkUpAccess
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
+{
+  return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
+}
+
+/**
+  * @brief  Set voltage Regulator mode during deep sleep mode
+  * @rmtoll CR    LPDS         LL_PWR_SetRegulModeDS
+  * @param  RegulMode This parameter can be one of the following values:
+  *         @arg @ref LL_PWR_REGU_DSMODE_MAIN
+  *         @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
+  * @retval None
+  */
+__STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
+{
+  MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
+}
+
+/**
+  * @brief  Get voltage Regulator mode during deep sleep mode
+  * @rmtoll CR    LPDS         LL_PWR_GetRegulModeDS
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_PWR_REGU_DSMODE_MAIN
+  *         @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
+  */
+__STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
+{
+  return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
+}
+
+/**
+  * @brief  Set Power Down mode when CPU enters deepsleep
+  * @rmtoll CR    PDDS         LL_PWR_SetPowerMode\n
+  * @rmtoll CR    LPDS         LL_PWR_SetPowerMode
+  * @param  PDMode This parameter can be one of the following values:
+  *         @arg @ref LL_PWR_MODE_STOP_MAINREGU
+  *         @arg @ref LL_PWR_MODE_STOP_LPREGU
+  *         @arg @ref LL_PWR_MODE_STANDBY
+  * @retval None
+  */
+__STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
+{
+  MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode);
+}
+
+/**
+  * @brief  Get Power Down mode when CPU enters deepsleep
+  * @rmtoll CR    PDDS         LL_PWR_GetPowerMode\n
+  * @rmtoll CR    LPDS         LL_PWR_GetPowerMode
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_PWR_MODE_STOP_MAINREGU
+  *         @arg @ref LL_PWR_MODE_STOP_LPREGU
+  *         @arg @ref LL_PWR_MODE_STANDBY
+  */
+__STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
+{
+  return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS)));
+}
+
+/**
+  * @brief  Configure the voltage threshold detected by the Power Voltage Detector
+  * @rmtoll CR    PLS       LL_PWR_SetPVDLevel
+  * @param  PVDLevel This parameter can be one of the following values:
+  *         @arg @ref LL_PWR_PVDLEVEL_0
+  *         @arg @ref LL_PWR_PVDLEVEL_1
+  *         @arg @ref LL_PWR_PVDLEVEL_2
+  *         @arg @ref LL_PWR_PVDLEVEL_3
+  *         @arg @ref LL_PWR_PVDLEVEL_4
+  *         @arg @ref LL_PWR_PVDLEVEL_5
+  *         @arg @ref LL_PWR_PVDLEVEL_6
+  *         @arg @ref LL_PWR_PVDLEVEL_7
+  * @retval None
+  */
+__STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
+{
+  MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
+}
+
+/**
+  * @brief  Get the voltage threshold detection
+  * @rmtoll CR    PLS       LL_PWR_GetPVDLevel
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_PWR_PVDLEVEL_0
+  *         @arg @ref LL_PWR_PVDLEVEL_1
+  *         @arg @ref LL_PWR_PVDLEVEL_2
+  *         @arg @ref LL_PWR_PVDLEVEL_3
+  *         @arg @ref LL_PWR_PVDLEVEL_4
+  *         @arg @ref LL_PWR_PVDLEVEL_5
+  *         @arg @ref LL_PWR_PVDLEVEL_6
+  *         @arg @ref LL_PWR_PVDLEVEL_7
+  */
+__STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
+{
+  return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
+}
+
+/**
+  * @brief  Enable Power Voltage Detector
+  * @rmtoll CR    PVDE       LL_PWR_EnablePVD
+  * @retval None
+  */
+__STATIC_INLINE void LL_PWR_EnablePVD(void)
+{
+  SET_BIT(PWR->CR, PWR_CR_PVDE);
+}
+
+/**
+  * @brief  Disable Power Voltage Detector
+  * @rmtoll CR    PVDE       LL_PWR_DisablePVD
+  * @retval None
+  */
+__STATIC_INLINE void LL_PWR_DisablePVD(void)
+{
+  CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
+}
+
+/**
+  * @brief  Check if Power Voltage Detector is enabled
+  * @rmtoll CR    PVDE       LL_PWR_IsEnabledPVD
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
+{
+  return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
+}
+
+/**
+  * @brief  Enable the WakeUp PINx functionality
+  * @rmtoll CSR   EWUP       LL_PWR_EnableWakeUpPin
+  * @param  WakeUpPin This parameter can be one of the following values:
+  *         @arg @ref LL_PWR_WAKEUP_PIN1
+  * @retval None
+  */
+__STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
+{
+  SET_BIT(PWR->CSR, WakeUpPin);
+}
+
+/**
+  * @brief  Disable the WakeUp PINx functionality
+  * @rmtoll CSR   EWUP       LL_PWR_DisableWakeUpPin
+  * @param  WakeUpPin This parameter can be one of the following values:
+  *         @arg @ref LL_PWR_WAKEUP_PIN1
+  * @retval None
+  */
+__STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
+{
+  CLEAR_BIT(PWR->CSR, WakeUpPin);
+}
+
+/**
+  * @brief  Check if the WakeUp PINx functionality is enabled
+  * @rmtoll CSR   EWUP       LL_PWR_IsEnabledWakeUpPin
+  * @param  WakeUpPin This parameter can be one of the following values:
+  *         @arg @ref LL_PWR_WAKEUP_PIN1
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
+{
+  return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
+}
+
+
+/**
+  * @}
+  */
+
+/** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
+  * @{
+  */
+
+/**
+  * @brief  Get Wake-up Flag
+  * @rmtoll CSR   WUF       LL_PWR_IsActiveFlag_WU
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
+{
+  return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
+}
+
+/**
+  * @brief  Get Standby Flag
+  * @rmtoll CSR   SBF       LL_PWR_IsActiveFlag_SB
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
+{
+  return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
+}
+
+/**
+  * @brief  Indicate whether VDD voltage is below the selected PVD threshold
+  * @rmtoll CSR   PVDO       LL_PWR_IsActiveFlag_PVDO
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
+{
+  return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
+}
+
+/**
+  * @brief  Clear Standby Flag
+  * @rmtoll CR   CSBF       LL_PWR_ClearFlag_SB
+  * @retval None
+  */
+__STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
+{
+  SET_BIT(PWR->CR, PWR_CR_CSBF);
+}
+
+/**
+  * @brief  Clear Wake-up Flags
+  * @rmtoll CR   CWUF       LL_PWR_ClearFlag_WU
+  * @retval None
+  */
+__STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
+{
+  SET_BIT(PWR->CR, PWR_CR_CWUF);
+}
+
+/**
+  * @}
+  */
+
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup PWR_LL_EF_Init De-initialization function
+  * @{
+  */
+ErrorStatus LL_PWR_DeInit(void);
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* defined(PWR) */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F1xx_LL_PWR_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h
new file mode 100644
index 0000000..804c75f
--- /dev/null
+++ b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h
@@ -0,0 +1,2312 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_ll_rcc.h
+  * @author  MCD Application Team
+  * @brief   Header file of RCC LL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_LL_RCC_H
+#define __STM32F1xx_LL_RCC_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx.h"
+
+/** @addtogroup STM32F1xx_LL_Driver
+  * @{
+  */
+
+#if defined(RCC)
+
+/** @defgroup RCC_LL RCC
+  * @{
+  */
+
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private constants ---------------------------------------------------------*/
+/* Private macros ------------------------------------------------------------*/
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup RCC_LL_Private_Macros RCC Private Macros
+  * @{
+  */
+/**
+  * @}
+  */
+#endif /*USE_FULL_LL_DRIVER*/
+/* Exported types ------------------------------------------------------------*/
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup RCC_LL_Exported_Types RCC Exported Types
+  * @{
+  */
+
+/** @defgroup LL_ES_CLOCK_FREQ Clocks Frequency Structure
+  * @{
+  */
+
+/**
+  * @brief  RCC Clocks Frequency Structure
+  */
+typedef struct
+{
+  uint32_t SYSCLK_Frequency;        /*!< SYSCLK clock frequency */
+  uint32_t HCLK_Frequency;          /*!< HCLK clock frequency */
+  uint32_t PCLK1_Frequency;         /*!< PCLK1 clock frequency */
+  uint32_t PCLK2_Frequency;         /*!< PCLK2 clock frequency */
+} LL_RCC_ClocksTypeDef;
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup RCC_LL_Exported_Constants RCC Exported Constants
+  * @{
+  */
+
+/** @defgroup RCC_LL_EC_OSC_VALUES Oscillator Values adaptation
+  * @brief    Defines used to adapt values of different oscillators
+  * @note     These values could be modified in the user environment according to
+  *           HW set-up.
+  * @{
+  */
+#if !defined  (HSE_VALUE)
+#define HSE_VALUE    8000000U  /*!< Value of the HSE oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+#define HSI_VALUE    8000000U  /*!< Value of the HSI oscillator in Hz */
+#endif /* HSI_VALUE */
+
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE    32768U    /*!< Value of the LSE oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSI_VALUE)
+#define LSI_VALUE    40000U    /*!< Value of the LSI oscillator in Hz */
+#endif /* LSI_VALUE */
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EC_CLEAR_FLAG Clear Flags Defines
+  * @brief    Flags defines which can be used with LL_RCC_WriteReg function
+  * @{
+  */
+#define LL_RCC_CIR_LSIRDYC                RCC_CIR_LSIRDYC     /*!< LSI Ready Interrupt Clear */
+#define LL_RCC_CIR_LSERDYC                RCC_CIR_LSERDYC     /*!< LSE Ready Interrupt Clear */
+#define LL_RCC_CIR_HSIRDYC                RCC_CIR_HSIRDYC     /*!< HSI Ready Interrupt Clear */
+#define LL_RCC_CIR_HSERDYC                RCC_CIR_HSERDYC     /*!< HSE Ready Interrupt Clear */
+#define LL_RCC_CIR_PLLRDYC                RCC_CIR_PLLRDYC     /*!< PLL Ready Interrupt Clear */
+#define LL_RCC_CIR_PLL3RDYC               RCC_CIR_PLL3RDYC    /*!< PLL3(PLLI2S) Ready Interrupt Clear */
+#define LL_RCC_CIR_PLL2RDYC               RCC_CIR_PLL2RDYC    /*!< PLL2 Ready Interrupt Clear */
+#define LL_RCC_CIR_CSSC                   RCC_CIR_CSSC        /*!< Clock Security System Interrupt Clear */
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EC_GET_FLAG Get Flags Defines
+  * @brief    Flags defines which can be used with LL_RCC_ReadReg function
+  * @{
+  */
+#define LL_RCC_CIR_LSIRDYF                RCC_CIR_LSIRDYF     /*!< LSI Ready Interrupt flag */
+#define LL_RCC_CIR_LSERDYF                RCC_CIR_LSERDYF     /*!< LSE Ready Interrupt flag */
+#define LL_RCC_CIR_HSIRDYF                RCC_CIR_HSIRDYF     /*!< HSI Ready Interrupt flag */
+#define LL_RCC_CIR_HSERDYF                RCC_CIR_HSERDYF     /*!< HSE Ready Interrupt flag */
+#define LL_RCC_CIR_PLLRDYF                RCC_CIR_PLLRDYF     /*!< PLL Ready Interrupt flag */
+#define LL_RCC_CIR_PLL3RDYF               RCC_CIR_PLL3RDYF    /*!< PLL3(PLLI2S) Ready Interrupt flag */
+#define LL_RCC_CIR_PLL2RDYF               RCC_CIR_PLL2RDYF    /*!< PLL2 Ready Interrupt flag */
+#define LL_RCC_CIR_CSSF                   RCC_CIR_CSSF        /*!< Clock Security System Interrupt flag */
+#define LL_RCC_CSR_PINRSTF                RCC_CSR_PINRSTF     /*!< PIN reset flag */
+#define LL_RCC_CSR_PORRSTF                RCC_CSR_PORRSTF     /*!< POR/PDR reset flag */
+#define LL_RCC_CSR_SFTRSTF                RCC_CSR_SFTRSTF     /*!< Software Reset flag */
+#define LL_RCC_CSR_IWDGRSTF               RCC_CSR_IWDGRSTF    /*!< Independent Watchdog reset flag */
+#define LL_RCC_CSR_WWDGRSTF               RCC_CSR_WWDGRSTF    /*!< Window watchdog reset flag */
+#define LL_RCC_CSR_LPWRRSTF               RCC_CSR_LPWRRSTF    /*!< Low-Power reset flag */
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EC_IT IT Defines
+  * @brief    IT defines which can be used with LL_RCC_ReadReg and  LL_RCC_WriteReg functions
+  * @{
+  */
+#define LL_RCC_CIR_LSIRDYIE               RCC_CIR_LSIRDYIE      /*!< LSI Ready Interrupt Enable */
+#define LL_RCC_CIR_LSERDYIE               RCC_CIR_LSERDYIE      /*!< LSE Ready Interrupt Enable */
+#define LL_RCC_CIR_HSIRDYIE               RCC_CIR_HSIRDYIE      /*!< HSI Ready Interrupt Enable */
+#define LL_RCC_CIR_HSERDYIE               RCC_CIR_HSERDYIE      /*!< HSE Ready Interrupt Enable */
+#define LL_RCC_CIR_PLLRDYIE               RCC_CIR_PLLRDYIE      /*!< PLL Ready Interrupt Enable */
+#define LL_RCC_CIR_PLL3RDYIE              RCC_CIR_PLL3RDYIE     /*!< PLL3(PLLI2S) Ready Interrupt Enable */
+#define LL_RCC_CIR_PLL2RDYIE              RCC_CIR_PLL2RDYIE     /*!< PLL2 Ready Interrupt Enable */
+/**
+  * @}
+  */
+
+#if defined(RCC_CFGR2_PREDIV2)
+/** @defgroup RCC_LL_EC_HSE_PREDIV2_DIV HSE PREDIV2 Division factor
+  * @{
+  */
+#define LL_RCC_HSE_PREDIV2_DIV_1           RCC_CFGR2_PREDIV2_DIV1   /*!< PREDIV2 input clock not divided */
+#define LL_RCC_HSE_PREDIV2_DIV_2           RCC_CFGR2_PREDIV2_DIV2   /*!< PREDIV2 input clock divided by 2 */
+#define LL_RCC_HSE_PREDIV2_DIV_3           RCC_CFGR2_PREDIV2_DIV3   /*!< PREDIV2 input clock divided by 3 */
+#define LL_RCC_HSE_PREDIV2_DIV_4           RCC_CFGR2_PREDIV2_DIV4   /*!< PREDIV2 input clock divided by 4 */
+#define LL_RCC_HSE_PREDIV2_DIV_5           RCC_CFGR2_PREDIV2_DIV5   /*!< PREDIV2 input clock divided by 5 */
+#define LL_RCC_HSE_PREDIV2_DIV_6           RCC_CFGR2_PREDIV2_DIV6   /*!< PREDIV2 input clock divided by 6 */
+#define LL_RCC_HSE_PREDIV2_DIV_7           RCC_CFGR2_PREDIV2_DIV7   /*!< PREDIV2 input clock divided by 7 */
+#define LL_RCC_HSE_PREDIV2_DIV_8           RCC_CFGR2_PREDIV2_DIV8   /*!< PREDIV2 input clock divided by 8 */
+#define LL_RCC_HSE_PREDIV2_DIV_9           RCC_CFGR2_PREDIV2_DIV9   /*!< PREDIV2 input clock divided by 9 */
+#define LL_RCC_HSE_PREDIV2_DIV_10          RCC_CFGR2_PREDIV2_DIV10  /*!< PREDIV2 input clock divided by 10 */
+#define LL_RCC_HSE_PREDIV2_DIV_11          RCC_CFGR2_PREDIV2_DIV11  /*!< PREDIV2 input clock divided by 11 */
+#define LL_RCC_HSE_PREDIV2_DIV_12          RCC_CFGR2_PREDIV2_DIV12  /*!< PREDIV2 input clock divided by 12 */
+#define LL_RCC_HSE_PREDIV2_DIV_13          RCC_CFGR2_PREDIV2_DIV13  /*!< PREDIV2 input clock divided by 13 */
+#define LL_RCC_HSE_PREDIV2_DIV_14          RCC_CFGR2_PREDIV2_DIV14  /*!< PREDIV2 input clock divided by 14 */
+#define LL_RCC_HSE_PREDIV2_DIV_15          RCC_CFGR2_PREDIV2_DIV15  /*!< PREDIV2 input clock divided by 15 */
+#define LL_RCC_HSE_PREDIV2_DIV_16          RCC_CFGR2_PREDIV2_DIV16  /*!< PREDIV2 input clock divided by 16 */
+/**
+  * @}
+  */
+
+#endif /* RCC_CFGR2_PREDIV2 */
+
+/** @defgroup RCC_LL_EC_SYS_CLKSOURCE  System clock switch
+  * @{
+  */
+#define LL_RCC_SYS_CLKSOURCE_HSI           RCC_CFGR_SW_HSI    /*!< HSI selection as system clock */
+#define LL_RCC_SYS_CLKSOURCE_HSE           RCC_CFGR_SW_HSE    /*!< HSE selection as system clock */
+#define LL_RCC_SYS_CLKSOURCE_PLL           RCC_CFGR_SW_PLL    /*!< PLL selection as system clock */
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EC_SYS_CLKSOURCE_STATUS  System clock switch status
+  * @{
+  */
+#define LL_RCC_SYS_CLKSOURCE_STATUS_HSI    RCC_CFGR_SWS_HSI   /*!< HSI used as system clock */
+#define LL_RCC_SYS_CLKSOURCE_STATUS_HSE    RCC_CFGR_SWS_HSE   /*!< HSE used as system clock */
+#define LL_RCC_SYS_CLKSOURCE_STATUS_PLL    RCC_CFGR_SWS_PLL   /*!< PLL used as system clock */
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EC_SYSCLK_DIV  AHB prescaler
+  * @{
+  */
+#define LL_RCC_SYSCLK_DIV_1                RCC_CFGR_HPRE_DIV1   /*!< SYSCLK not divided */
+#define LL_RCC_SYSCLK_DIV_2                RCC_CFGR_HPRE_DIV2   /*!< SYSCLK divided by 2 */
+#define LL_RCC_SYSCLK_DIV_4                RCC_CFGR_HPRE_DIV4   /*!< SYSCLK divided by 4 */
+#define LL_RCC_SYSCLK_DIV_8                RCC_CFGR_HPRE_DIV8   /*!< SYSCLK divided by 8 */
+#define LL_RCC_SYSCLK_DIV_16               RCC_CFGR_HPRE_DIV16  /*!< SYSCLK divided by 16 */
+#define LL_RCC_SYSCLK_DIV_64               RCC_CFGR_HPRE_DIV64  /*!< SYSCLK divided by 64 */
+#define LL_RCC_SYSCLK_DIV_128              RCC_CFGR_HPRE_DIV128 /*!< SYSCLK divided by 128 */
+#define LL_RCC_SYSCLK_DIV_256              RCC_CFGR_HPRE_DIV256 /*!< SYSCLK divided by 256 */
+#define LL_RCC_SYSCLK_DIV_512              RCC_CFGR_HPRE_DIV512 /*!< SYSCLK divided by 512 */
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EC_APB1_DIV  APB low-speed prescaler (APB1)
+  * @{
+  */
+#define LL_RCC_APB1_DIV_1                  RCC_CFGR_PPRE1_DIV1  /*!< HCLK not divided */
+#define LL_RCC_APB1_DIV_2                  RCC_CFGR_PPRE1_DIV2  /*!< HCLK divided by 2 */
+#define LL_RCC_APB1_DIV_4                  RCC_CFGR_PPRE1_DIV4  /*!< HCLK divided by 4 */
+#define LL_RCC_APB1_DIV_8                  RCC_CFGR_PPRE1_DIV8  /*!< HCLK divided by 8 */
+#define LL_RCC_APB1_DIV_16                 RCC_CFGR_PPRE1_DIV16 /*!< HCLK divided by 16 */
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EC_APB2_DIV  APB high-speed prescaler (APB2)
+  * @{
+  */
+#define LL_RCC_APB2_DIV_1                  RCC_CFGR_PPRE2_DIV1  /*!< HCLK not divided */
+#define LL_RCC_APB2_DIV_2                  RCC_CFGR_PPRE2_DIV2  /*!< HCLK divided by 2 */
+#define LL_RCC_APB2_DIV_4                  RCC_CFGR_PPRE2_DIV4  /*!< HCLK divided by 4 */
+#define LL_RCC_APB2_DIV_8                  RCC_CFGR_PPRE2_DIV8  /*!< HCLK divided by 8 */
+#define LL_RCC_APB2_DIV_16                 RCC_CFGR_PPRE2_DIV16 /*!< HCLK divided by 16 */
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EC_MCO1SOURCE  MCO1 SOURCE selection
+  * @{
+  */
+#define LL_RCC_MCO1SOURCE_NOCLOCK          RCC_CFGR_MCO_NOCLOCK      /*!< MCO output disabled, no clock on MCO */
+#define LL_RCC_MCO1SOURCE_SYSCLK           RCC_CFGR_MCO_SYSCLK       /*!< SYSCLK selection as MCO source */
+#define LL_RCC_MCO1SOURCE_HSI              RCC_CFGR_MCO_HSI          /*!< HSI selection as MCO source */
+#define LL_RCC_MCO1SOURCE_HSE              RCC_CFGR_MCO_HSE          /*!< HSE selection as MCO source */
+#define LL_RCC_MCO1SOURCE_PLLCLK_DIV_2     RCC_CFGR_MCO_PLLCLK_DIV2  /*!< PLL clock divided by 2*/
+#if defined(RCC_CFGR_MCO_PLL2CLK)
+#define LL_RCC_MCO1SOURCE_PLL2CLK          RCC_CFGR_MCO_PLL2CLK      /*!< PLL2 clock selected as MCO source*/
+#endif /* RCC_CFGR_MCO_PLL2CLK */
+#if defined(RCC_CFGR_MCO_PLL3CLK_DIV2)
+#define LL_RCC_MCO1SOURCE_PLLI2SCLK_DIV2   RCC_CFGR_MCO_PLL3CLK_DIV2 /*!< PLLI2S clock divided by 2 selected as MCO source*/
+#endif /* RCC_CFGR_MCO_PLL3CLK_DIV2 */
+#if defined(RCC_CFGR_MCO_EXT_HSE)
+#define LL_RCC_MCO1SOURCE_EXT_HSE          RCC_CFGR_MCO_EXT_HSE      /*!< XT1 external 3-25 MHz oscillator clock selected as MCO source */
+#endif /* RCC_CFGR_MCO_EXT_HSE */
+#if defined(RCC_CFGR_MCO_PLL3CLK)
+#define LL_RCC_MCO1SOURCE_PLLI2SCLK        RCC_CFGR_MCO_PLL3CLK      /*!< PLLI2S clock selected as MCO source */
+#endif /* RCC_CFGR_MCO_PLL3CLK */
+/**
+  * @}
+  */
+
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup RCC_LL_EC_PERIPH_FREQUENCY Peripheral clock frequency
+  * @{
+  */
+#define LL_RCC_PERIPH_FREQUENCY_NO         0x00000000U      /*!< No clock enabled for the peripheral            */
+#define LL_RCC_PERIPH_FREQUENCY_NA         0xFFFFFFFFU      /*!< Frequency cannot be provided as external clock */
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+#if defined(RCC_CFGR2_I2S2SRC)
+/** @defgroup RCC_LL_EC_I2S2CLKSOURCE Peripheral I2S clock source selection
+  * @{
+  */
+#define LL_RCC_I2S2_CLKSOURCE_SYSCLK        RCC_CFGR2_I2S2SRC                                          /*!< System clock (SYSCLK) selected as I2S2 clock entry */
+#define LL_RCC_I2S2_CLKSOURCE_PLLI2S_VCO    (uint32_t)(RCC_CFGR2_I2S2SRC | (RCC_CFGR2_I2S2SRC >> 16U)) /*!< PLLI2S VCO clock selected as I2S2 clock entry */
+#define LL_RCC_I2S3_CLKSOURCE_SYSCLK        RCC_CFGR2_I2S3SRC                                          /*!< System clock (SYSCLK) selected as I2S3 clock entry */
+#define LL_RCC_I2S3_CLKSOURCE_PLLI2S_VCO    (uint32_t)(RCC_CFGR2_I2S3SRC | (RCC_CFGR2_I2S3SRC >> 16U)) /*!< PLLI2S VCO clock selected as I2S3 clock entry */
+/**
+  * @}
+  */
+#endif /* RCC_CFGR2_I2S2SRC */
+
+#if defined(USB_OTG_FS) || defined(USB)
+/** @defgroup RCC_LL_EC_USB_CLKSOURCE Peripheral USB clock source selection
+  * @{
+  */
+#if defined(RCC_CFGR_USBPRE)
+#define LL_RCC_USB_CLKSOURCE_PLL             RCC_CFGR_USBPRE        /*!< PLL clock is not divided */
+#define LL_RCC_USB_CLKSOURCE_PLL_DIV_1_5     0x00000000U            /*!< PLL clock is divided by 1.5 */
+#endif /*RCC_CFGR_USBPRE*/
+#if defined(RCC_CFGR_OTGFSPRE)
+#define LL_RCC_USB_CLKSOURCE_PLL_DIV_2       RCC_CFGR_OTGFSPRE      /*!< PLL clock is divided by 2 */
+#define LL_RCC_USB_CLKSOURCE_PLL_DIV_3       0x00000000U            /*!< PLL clock is divided by 3 */
+#endif /*RCC_CFGR_OTGFSPRE*/
+/**
+  * @}
+  */
+#endif /* USB_OTG_FS || USB */
+
+/** @defgroup RCC_LL_EC_ADC_CLKSOURCE_PCLK2 Peripheral ADC clock source selection
+  * @{
+  */
+#define LL_RCC_ADC_CLKSRC_PCLK2_DIV_2    RCC_CFGR_ADCPRE_DIV2 /*ADC prescaler PCLK2 divided by 2*/
+#define LL_RCC_ADC_CLKSRC_PCLK2_DIV_4    RCC_CFGR_ADCPRE_DIV4 /*ADC prescaler PCLK2 divided by 4*/
+#define LL_RCC_ADC_CLKSRC_PCLK2_DIV_6    RCC_CFGR_ADCPRE_DIV6 /*ADC prescaler PCLK2 divided by 6*/
+#define LL_RCC_ADC_CLKSRC_PCLK2_DIV_8    RCC_CFGR_ADCPRE_DIV8 /*ADC prescaler PCLK2 divided by 8*/
+/**
+  * @}
+  */
+
+#if defined(RCC_CFGR2_I2S2SRC)
+/** @defgroup RCC_LL_EC_I2S2 Peripheral I2S get clock source
+  * @{
+  */
+#define LL_RCC_I2S2_CLKSOURCE              RCC_CFGR2_I2S2SRC       /*!< I2S2 Clock source selection */
+#define LL_RCC_I2S3_CLKSOURCE              RCC_CFGR2_I2S3SRC       /*!< I2S3 Clock source selection */
+/**
+  * @}
+  */
+
+#endif /* RCC_CFGR2_I2S2SRC */
+
+#if defined(USB_OTG_FS) || defined(USB)
+/** @defgroup RCC_LL_EC_USB Peripheral USB get clock source
+  * @{
+  */
+#define LL_RCC_USB_CLKSOURCE               0x00400000U     /*!< USB Clock source selection */
+/**
+  * @}
+  */
+
+#endif /* USB_OTG_FS || USB */
+
+/** @defgroup RCC_LL_EC_ADC Peripheral ADC get clock source
+  * @{
+  */
+#define LL_RCC_ADC_CLKSOURCE               RCC_CFGR_ADCPRE /*!< ADC Clock source selection */
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EC_RTC_CLKSOURCE  RTC clock source selection
+  * @{
+  */
+#define LL_RCC_RTC_CLKSOURCE_NONE          0x00000000U             /*!< No clock used as RTC clock */
+#define LL_RCC_RTC_CLKSOURCE_LSE           RCC_BDCR_RTCSEL_0       /*!< LSE oscillator clock used as RTC clock */
+#define LL_RCC_RTC_CLKSOURCE_LSI           RCC_BDCR_RTCSEL_1       /*!< LSI oscillator clock used as RTC clock */
+#define LL_RCC_RTC_CLKSOURCE_HSE_DIV128    RCC_BDCR_RTCSEL         /*!< HSE oscillator clock divided by 128 used as RTC clock */
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EC_PLL_MUL PLL Multiplicator factor
+  * @{
+  */
+#if defined(RCC_CFGR_PLLMULL2)
+#define LL_RCC_PLL_MUL_2                   RCC_CFGR_PLLMULL2  /*!< PLL input clock*2 */
+#endif /*RCC_CFGR_PLLMULL2*/
+#if defined(RCC_CFGR_PLLMULL3)
+#define LL_RCC_PLL_MUL_3                   RCC_CFGR_PLLMULL3  /*!< PLL input clock*3 */
+#endif /*RCC_CFGR_PLLMULL3*/
+#define LL_RCC_PLL_MUL_4                   RCC_CFGR_PLLMULL4  /*!< PLL input clock*4 */
+#define LL_RCC_PLL_MUL_5                   RCC_CFGR_PLLMULL5  /*!< PLL input clock*5 */
+#define LL_RCC_PLL_MUL_6                   RCC_CFGR_PLLMULL6  /*!< PLL input clock*6 */
+#define LL_RCC_PLL_MUL_7                   RCC_CFGR_PLLMULL7  /*!< PLL input clock*7 */
+#define LL_RCC_PLL_MUL_8                   RCC_CFGR_PLLMULL8  /*!< PLL input clock*8 */
+#define LL_RCC_PLL_MUL_9                   RCC_CFGR_PLLMULL9  /*!< PLL input clock*9 */
+#if defined(RCC_CFGR_PLLMULL6_5)
+#define LL_RCC_PLL_MUL_6_5                 RCC_CFGR_PLLMULL6_5 /*!< PLL input clock*6 */
+#else
+#define LL_RCC_PLL_MUL_10                  RCC_CFGR_PLLMULL10  /*!< PLL input clock*10 */
+#define LL_RCC_PLL_MUL_11                  RCC_CFGR_PLLMULL11  /*!< PLL input clock*11 */
+#define LL_RCC_PLL_MUL_12                  RCC_CFGR_PLLMULL12  /*!< PLL input clock*12 */
+#define LL_RCC_PLL_MUL_13                  RCC_CFGR_PLLMULL13  /*!< PLL input clock*13 */
+#define LL_RCC_PLL_MUL_14                  RCC_CFGR_PLLMULL14  /*!< PLL input clock*14 */
+#define LL_RCC_PLL_MUL_15                  RCC_CFGR_PLLMULL15  /*!< PLL input clock*15 */
+#define LL_RCC_PLL_MUL_16                  RCC_CFGR_PLLMULL16  /*!< PLL input clock*16 */
+#endif /*RCC_CFGR_PLLMULL6_5*/
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EC_PLLSOURCE PLL SOURCE
+  * @{
+  */
+#define LL_RCC_PLLSOURCE_HSI_DIV_2         0x00000000U                                    /*!< HSI clock divided by 2 selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE               RCC_CFGR_PLLSRC                                /*!< HSE/PREDIV1 clock selected as PLL entry clock source */
+#if defined(RCC_CFGR2_PREDIV1SRC)
+#define LL_RCC_PLLSOURCE_PLL2              (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1SRC << 4U) /*!< PLL2/PREDIV1 clock selected as PLL entry clock source */
+#endif /*RCC_CFGR2_PREDIV1SRC*/
+
+#if defined(RCC_CFGR2_PREDIV1)
+#define LL_RCC_PLLSOURCE_HSE_DIV_1         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV1)    /*!< HSE/1 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_2         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV2)    /*!< HSE/2 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_3         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV3)    /*!< HSE/3 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_4         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV4)    /*!< HSE/4 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_5         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV5)    /*!< HSE/5 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_6         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV6)    /*!< HSE/6 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_7         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV7)    /*!< HSE/7 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_8         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV8)    /*!< HSE/8 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_9         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV9)    /*!< HSE/9 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_10        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV10)   /*!< HSE/10 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_11        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV11)   /*!< HSE/11 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_12        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV12)   /*!< HSE/12 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_13        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV13)   /*!< HSE/13 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_14        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV14)   /*!< HSE/14 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_15        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV15)   /*!< HSE/15 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_16        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV16)   /*!< HSE/16 clock selected as PLL entry clock source */
+#if defined(RCC_CFGR2_PREDIV1SRC)
+#define LL_RCC_PLLSOURCE_PLL2_DIV_1        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV1 | RCC_CFGR2_PREDIV1SRC << 4U)    /*!< PLL2/1 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_2        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV2 | RCC_CFGR2_PREDIV1SRC << 4U)    /*!< PLL2/2 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_3        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV3 | RCC_CFGR2_PREDIV1SRC << 4U)    /*!< PLL2/3 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_4        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV4 | RCC_CFGR2_PREDIV1SRC << 4U)    /*!< PLL2/4 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_5        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV5 | RCC_CFGR2_PREDIV1SRC << 4U)    /*!< PLL2/5 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_6        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV6 | RCC_CFGR2_PREDIV1SRC << 4U)    /*!< PLL2/6 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_7        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV7 | RCC_CFGR2_PREDIV1SRC << 4U)    /*!< PLL2/7 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_8        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV8 | RCC_CFGR2_PREDIV1SRC << 4U)    /*!< PLL2/8 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_9        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV9 | RCC_CFGR2_PREDIV1SRC << 4U)    /*!< PLL2/9 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_10       (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV10 | RCC_CFGR2_PREDIV1SRC << 4U)   /*!< PLL2/10 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_11       (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV11 | RCC_CFGR2_PREDIV1SRC << 4U)   /*!< PLL2/11 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_12       (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV12 | RCC_CFGR2_PREDIV1SRC << 4U)   /*!< PLL2/12 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_13       (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV13 | RCC_CFGR2_PREDIV1SRC << 4U)   /*!< PLL2/13 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_14       (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV14 | RCC_CFGR2_PREDIV1SRC << 4U)   /*!< PLL2/14 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_15       (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV15 | RCC_CFGR2_PREDIV1SRC << 4U)   /*!< PLL2/15 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_PLL2_DIV_16       (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV16 | RCC_CFGR2_PREDIV1SRC << 4U)   /*!< PLL2/16 clock selected as PLL entry clock source */
+#endif /*RCC_CFGR2_PREDIV1SRC*/
+#else
+#define LL_RCC_PLLSOURCE_HSE_DIV_1         (RCC_CFGR_PLLSRC | 0x00000000U)               /*!< HSE/1 clock selected as PLL entry clock source */
+#define LL_RCC_PLLSOURCE_HSE_DIV_2         (RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE)         /*!< HSE/2 clock selected as PLL entry clock source */
+#endif /*RCC_CFGR2_PREDIV1*/
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EC_PREDIV_DIV PREDIV Division factor
+  * @{
+  */
+#if defined(RCC_CFGR2_PREDIV1)
+#define LL_RCC_PREDIV_DIV_1                RCC_CFGR2_PREDIV1_DIV1   /*!< PREDIV1 input clock not divided */
+#define LL_RCC_PREDIV_DIV_2                RCC_CFGR2_PREDIV1_DIV2   /*!< PREDIV1 input clock divided by 2 */
+#define LL_RCC_PREDIV_DIV_3                RCC_CFGR2_PREDIV1_DIV3   /*!< PREDIV1 input clock divided by 3 */
+#define LL_RCC_PREDIV_DIV_4                RCC_CFGR2_PREDIV1_DIV4   /*!< PREDIV1 input clock divided by 4 */
+#define LL_RCC_PREDIV_DIV_5                RCC_CFGR2_PREDIV1_DIV5   /*!< PREDIV1 input clock divided by 5 */
+#define LL_RCC_PREDIV_DIV_6                RCC_CFGR2_PREDIV1_DIV6   /*!< PREDIV1 input clock divided by 6 */
+#define LL_RCC_PREDIV_DIV_7                RCC_CFGR2_PREDIV1_DIV7   /*!< PREDIV1 input clock divided by 7 */
+#define LL_RCC_PREDIV_DIV_8                RCC_CFGR2_PREDIV1_DIV8   /*!< PREDIV1 input clock divided by 8 */
+#define LL_RCC_PREDIV_DIV_9                RCC_CFGR2_PREDIV1_DIV9   /*!< PREDIV1 input clock divided by 9 */
+#define LL_RCC_PREDIV_DIV_10               RCC_CFGR2_PREDIV1_DIV10  /*!< PREDIV1 input clock divided by 10 */
+#define LL_RCC_PREDIV_DIV_11               RCC_CFGR2_PREDIV1_DIV11  /*!< PREDIV1 input clock divided by 11 */
+#define LL_RCC_PREDIV_DIV_12               RCC_CFGR2_PREDIV1_DIV12  /*!< PREDIV1 input clock divided by 12 */
+#define LL_RCC_PREDIV_DIV_13               RCC_CFGR2_PREDIV1_DIV13  /*!< PREDIV1 input clock divided by 13 */
+#define LL_RCC_PREDIV_DIV_14               RCC_CFGR2_PREDIV1_DIV14  /*!< PREDIV1 input clock divided by 14 */
+#define LL_RCC_PREDIV_DIV_15               RCC_CFGR2_PREDIV1_DIV15  /*!< PREDIV1 input clock divided by 15 */
+#define LL_RCC_PREDIV_DIV_16               RCC_CFGR2_PREDIV1_DIV16  /*!< PREDIV1 input clock divided by 16 */
+#else
+#define LL_RCC_PREDIV_DIV_1                0x00000000U              /*!< HSE divider clock clock not divided */
+#define LL_RCC_PREDIV_DIV_2                RCC_CFGR_PLLXTPRE        /*!< HSE divider clock divided by 2 for PLL entry */
+#endif /*RCC_CFGR2_PREDIV1*/
+/**
+  * @}
+  */
+
+#if defined(RCC_PLLI2S_SUPPORT)
+/** @defgroup RCC_LL_EC_PLLI2S_MUL PLLI2S MUL
+  * @{
+  */
+#define LL_RCC_PLLI2S_MUL_8                RCC_CFGR2_PLL3MUL8   /*!< PLLI2S input clock * 8 */
+#define LL_RCC_PLLI2S_MUL_9                RCC_CFGR2_PLL3MUL9   /*!< PLLI2S input clock * 9 */
+#define LL_RCC_PLLI2S_MUL_10               RCC_CFGR2_PLL3MUL10  /*!< PLLI2S input clock * 10 */
+#define LL_RCC_PLLI2S_MUL_11               RCC_CFGR2_PLL3MUL11  /*!< PLLI2S input clock * 11 */
+#define LL_RCC_PLLI2S_MUL_12               RCC_CFGR2_PLL3MUL12  /*!< PLLI2S input clock * 12 */
+#define LL_RCC_PLLI2S_MUL_13               RCC_CFGR2_PLL3MUL13  /*!< PLLI2S input clock * 13 */
+#define LL_RCC_PLLI2S_MUL_14               RCC_CFGR2_PLL3MUL14  /*!< PLLI2S input clock * 14 */
+#define LL_RCC_PLLI2S_MUL_16               RCC_CFGR2_PLL3MUL16  /*!< PLLI2S input clock * 16 */
+#define LL_RCC_PLLI2S_MUL_20               RCC_CFGR2_PLL3MUL20  /*!< PLLI2S input clock * 20 */
+/**
+  * @}
+  */
+
+#endif /* RCC_PLLI2S_SUPPORT */
+
+#if defined(RCC_PLL2_SUPPORT)
+/** @defgroup RCC_LL_EC_PLL2_MUL PLL2 MUL
+  * @{
+  */
+#define LL_RCC_PLL2_MUL_8                  RCC_CFGR2_PLL2MUL8   /*!< PLL2 input clock * 8 */
+#define LL_RCC_PLL2_MUL_9                  RCC_CFGR2_PLL2MUL9   /*!< PLL2 input clock * 9 */
+#define LL_RCC_PLL2_MUL_10                 RCC_CFGR2_PLL2MUL10  /*!< PLL2 input clock * 10 */
+#define LL_RCC_PLL2_MUL_11                 RCC_CFGR2_PLL2MUL11  /*!< PLL2 input clock * 11 */
+#define LL_RCC_PLL2_MUL_12                 RCC_CFGR2_PLL2MUL12  /*!< PLL2 input clock * 12 */
+#define LL_RCC_PLL2_MUL_13                 RCC_CFGR2_PLL2MUL13  /*!< PLL2 input clock * 13 */
+#define LL_RCC_PLL2_MUL_14                 RCC_CFGR2_PLL2MUL14  /*!< PLL2 input clock * 14 */
+#define LL_RCC_PLL2_MUL_16                 RCC_CFGR2_PLL2MUL16  /*!< PLL2 input clock * 16 */
+#define LL_RCC_PLL2_MUL_20                 RCC_CFGR2_PLL2MUL20  /*!< PLL2 input clock * 20 */
+/**
+  * @}
+  */
+
+#endif /* RCC_PLL2_SUPPORT */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup RCC_LL_Exported_Macros RCC Exported Macros
+  * @{
+  */
+
+/** @defgroup RCC_LL_EM_WRITE_READ Common Write and read registers Macros
+  * @{
+  */
+
+/**
+  * @brief  Write a value in RCC register
+  * @param  __REG__ Register to be written
+  * @param  __VALUE__ Value to be written in the register
+  * @retval None
+  */
+#define LL_RCC_WriteReg(__REG__, __VALUE__) WRITE_REG(RCC->__REG__, (__VALUE__))
+
+/**
+  * @brief  Read a value in RCC register
+  * @param  __REG__ Register to be read
+  * @retval Register value
+  */
+#define LL_RCC_ReadReg(__REG__) READ_REG(RCC->__REG__)
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EM_CALC_FREQ Calculate frequencies
+  * @{
+  */
+
+#if defined(RCC_CFGR_PLLMULL6_5)
+/**
+  * @brief  Helper macro to calculate the PLLCLK frequency
+  * @note ex: @ref __LL_RCC_CALC_PLLCLK_FREQ (HSE_VALUE / (@ref LL_RCC_PLL_GetPrediv () + 1), @ref LL_RCC_PLL_GetMultiplicator());
+  * @param  __INPUTFREQ__ PLL Input frequency (based on HSE div Prediv1 / HSI div 2 / PLL2 div Prediv1)
+  * @param  __PLLMUL__: This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_PLL_MUL_4
+  *         @arg @ref LL_RCC_PLL_MUL_5
+  *         @arg @ref LL_RCC_PLL_MUL_6
+  *         @arg @ref LL_RCC_PLL_MUL_7
+  *         @arg @ref LL_RCC_PLL_MUL_8
+  *         @arg @ref LL_RCC_PLL_MUL_9
+  *         @arg @ref LL_RCC_PLL_MUL_6_5
+  * @retval PLL clock frequency (in Hz)
+  */
+#define __LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLMUL__) \
+          (((__PLLMUL__) != RCC_CFGR_PLLMULL6_5) ? \
+              ((__INPUTFREQ__) * ((((__PLLMUL__) & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos) + 2U)) :\
+              (((__INPUTFREQ__) * 13U) / 2U))
+
+#else
+/**
+  * @brief  Helper macro to calculate the PLLCLK frequency
+  * @note ex: @ref __LL_RCC_CALC_PLLCLK_FREQ (HSE_VALUE / (@ref LL_RCC_PLL_GetPrediv () + 1), @ref LL_RCC_PLL_GetMultiplicator ());
+  * @param  __INPUTFREQ__ PLL Input frequency (based on HSE div Prediv1 or div 2 / HSI div 2)
+  * @param  __PLLMUL__: This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_PLL_MUL_2
+  *         @arg @ref LL_RCC_PLL_MUL_3
+  *         @arg @ref LL_RCC_PLL_MUL_4
+  *         @arg @ref LL_RCC_PLL_MUL_5
+  *         @arg @ref LL_RCC_PLL_MUL_6
+  *         @arg @ref LL_RCC_PLL_MUL_7
+  *         @arg @ref LL_RCC_PLL_MUL_8
+  *         @arg @ref LL_RCC_PLL_MUL_9
+  *         @arg @ref LL_RCC_PLL_MUL_10
+  *         @arg @ref LL_RCC_PLL_MUL_11
+  *         @arg @ref LL_RCC_PLL_MUL_12
+  *         @arg @ref LL_RCC_PLL_MUL_13
+  *         @arg @ref LL_RCC_PLL_MUL_14
+  *         @arg @ref LL_RCC_PLL_MUL_15
+  *         @arg @ref LL_RCC_PLL_MUL_16
+  * @retval PLL clock frequency (in Hz)
+  */
+#define __LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLMUL__) ((__INPUTFREQ__) * (((__PLLMUL__) >> RCC_CFGR_PLLMULL_Pos) + 2U))
+#endif /* RCC_CFGR_PLLMULL6_5 */
+
+#if defined(RCC_PLLI2S_SUPPORT)
+/**
+  * @brief  Helper macro to calculate the PLLI2S frequency
+  * @note ex: @ref __LL_RCC_CALC_PLLI2SCLK_FREQ (HSE_VALUE, @ref LL_RCC_PLLI2S_GetMultiplicator (), @ref LL_RCC_HSE_GetPrediv2 ());
+  * @param  __INPUTFREQ__ PLLI2S Input frequency (based on HSE value)
+  * @param  __PLLI2SMUL__: This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_PLLI2S_MUL_8
+  *         @arg @ref LL_RCC_PLLI2S_MUL_9
+  *         @arg @ref LL_RCC_PLLI2S_MUL_10
+  *         @arg @ref LL_RCC_PLLI2S_MUL_11
+  *         @arg @ref LL_RCC_PLLI2S_MUL_12
+  *         @arg @ref LL_RCC_PLLI2S_MUL_13
+  *         @arg @ref LL_RCC_PLLI2S_MUL_14
+  *         @arg @ref LL_RCC_PLLI2S_MUL_16
+  *         @arg @ref LL_RCC_PLLI2S_MUL_20
+  * @param  __PLLI2SDIV__: This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_1
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_2
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_3
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_4
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_5
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_6
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_7
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_8
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_9
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_10
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_11
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_12
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_13
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_14
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_15
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_16
+  * @retval PLLI2S clock frequency (in Hz)
+  */
+#define __LL_RCC_CALC_PLLI2SCLK_FREQ(__INPUTFREQ__, __PLLI2SMUL__, __PLLI2SDIV__) (((__INPUTFREQ__) * (((__PLLI2SMUL__) >> RCC_CFGR2_PLL3MUL_Pos) + 2U)) / (((__PLLI2SDIV__) >> RCC_CFGR2_PREDIV2_Pos) + 1U))
+#endif /* RCC_PLLI2S_SUPPORT */
+
+#if defined(RCC_PLL2_SUPPORT)
+/**
+  * @brief  Helper macro to calculate the PLL2 frequency
+  * @note ex: @ref __LL_RCC_CALC_PLL2CLK_FREQ (HSE_VALUE, @ref LL_RCC_PLL2_GetMultiplicator (), @ref LL_RCC_HSE_GetPrediv2 ());
+  * @param  __INPUTFREQ__ PLL2 Input frequency (based on HSE value)
+  * @param  __PLL2MUL__: This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_PLL2_MUL_8
+  *         @arg @ref LL_RCC_PLL2_MUL_9
+  *         @arg @ref LL_RCC_PLL2_MUL_10
+  *         @arg @ref LL_RCC_PLL2_MUL_11
+  *         @arg @ref LL_RCC_PLL2_MUL_12
+  *         @arg @ref LL_RCC_PLL2_MUL_13
+  *         @arg @ref LL_RCC_PLL2_MUL_14
+  *         @arg @ref LL_RCC_PLL2_MUL_16
+  *         @arg @ref LL_RCC_PLL2_MUL_20
+  * @param  __PLL2DIV__: This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_1
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_2
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_3
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_4
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_5
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_6
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_7
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_8
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_9
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_10
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_11
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_12
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_13
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_14
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_15
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_16
+  * @retval PLL2 clock frequency (in Hz)
+  */
+#define __LL_RCC_CALC_PLL2CLK_FREQ(__INPUTFREQ__, __PLL2MUL__, __PLL2DIV__) (((__INPUTFREQ__) * (((__PLL2MUL__) >> RCC_CFGR2_PLL2MUL_Pos) + 2U)) / (((__PLL2DIV__) >> RCC_CFGR2_PREDIV2_Pos) + 1U))
+#endif /* RCC_PLL2_SUPPORT */
+
+/**
+  * @brief  Helper macro to calculate the HCLK frequency
+  * @note: __AHBPRESCALER__ be retrieved by @ref LL_RCC_GetAHBPrescaler
+  *        ex: __LL_RCC_CALC_HCLK_FREQ(LL_RCC_GetAHBPrescaler())
+  * @param  __SYSCLKFREQ__ SYSCLK frequency (based on HSE/HSI/PLLCLK)
+  * @param  __AHBPRESCALER__: This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_SYSCLK_DIV_1
+  *         @arg @ref LL_RCC_SYSCLK_DIV_2
+  *         @arg @ref LL_RCC_SYSCLK_DIV_4
+  *         @arg @ref LL_RCC_SYSCLK_DIV_8
+  *         @arg @ref LL_RCC_SYSCLK_DIV_16
+  *         @arg @ref LL_RCC_SYSCLK_DIV_64
+  *         @arg @ref LL_RCC_SYSCLK_DIV_128
+  *         @arg @ref LL_RCC_SYSCLK_DIV_256
+  *         @arg @ref LL_RCC_SYSCLK_DIV_512
+  * @retval HCLK clock frequency (in Hz)
+  */
+#define __LL_RCC_CALC_HCLK_FREQ(__SYSCLKFREQ__, __AHBPRESCALER__) ((__SYSCLKFREQ__) >> AHBPrescTable[((__AHBPRESCALER__) & RCC_CFGR_HPRE) >>  RCC_CFGR_HPRE_Pos])
+
+/**
+  * @brief  Helper macro to calculate the PCLK1 frequency (ABP1)
+  * @note: __APB1PRESCALER__ be retrieved by @ref LL_RCC_GetAPB1Prescaler
+  *        ex: __LL_RCC_CALC_PCLK1_FREQ(LL_RCC_GetAPB1Prescaler())
+  * @param  __HCLKFREQ__ HCLK frequency
+  * @param  __APB1PRESCALER__: This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_APB1_DIV_1
+  *         @arg @ref LL_RCC_APB1_DIV_2
+  *         @arg @ref LL_RCC_APB1_DIV_4
+  *         @arg @ref LL_RCC_APB1_DIV_8
+  *         @arg @ref LL_RCC_APB1_DIV_16
+  * @retval PCLK1 clock frequency (in Hz)
+  */
+#define __LL_RCC_CALC_PCLK1_FREQ(__HCLKFREQ__, __APB1PRESCALER__) ((__HCLKFREQ__) >> APBPrescTable[(__APB1PRESCALER__) >>  RCC_CFGR_PPRE1_Pos])
+
+/**
+  * @brief  Helper macro to calculate the PCLK2 frequency (ABP2)
+  * @note: __APB2PRESCALER__ be retrieved by @ref LL_RCC_GetAPB2Prescaler
+  *        ex: __LL_RCC_CALC_PCLK2_FREQ(LL_RCC_GetAPB2Prescaler())
+  * @param  __HCLKFREQ__ HCLK frequency
+  * @param  __APB2PRESCALER__: This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_APB2_DIV_1
+  *         @arg @ref LL_RCC_APB2_DIV_2
+  *         @arg @ref LL_RCC_APB2_DIV_4
+  *         @arg @ref LL_RCC_APB2_DIV_8
+  *         @arg @ref LL_RCC_APB2_DIV_16
+  * @retval PCLK2 clock frequency (in Hz)
+  */
+#define __LL_RCC_CALC_PCLK2_FREQ(__HCLKFREQ__, __APB2PRESCALER__) ((__HCLKFREQ__) >> APBPrescTable[(__APB2PRESCALER__) >>  RCC_CFGR_PPRE2_Pos])
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup RCC_LL_Exported_Functions RCC Exported Functions
+  * @{
+  */
+
+/** @defgroup RCC_LL_EF_HSE HSE
+  * @{
+  */
+
+/**
+  * @brief  Enable the Clock Security System.
+  * @rmtoll CR           CSSON         LL_RCC_HSE_EnableCSS
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_HSE_EnableCSS(void)
+{
+  SET_BIT(RCC->CR, RCC_CR_CSSON);
+}
+
+/**
+  * @brief  Enable HSE external oscillator (HSE Bypass)
+  * @rmtoll CR           HSEBYP        LL_RCC_HSE_EnableBypass
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_HSE_EnableBypass(void)
+{
+  SET_BIT(RCC->CR, RCC_CR_HSEBYP);
+}
+
+/**
+  * @brief  Disable HSE external oscillator (HSE Bypass)
+  * @rmtoll CR           HSEBYP        LL_RCC_HSE_DisableBypass
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_HSE_DisableBypass(void)
+{
+  CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
+}
+
+/**
+  * @brief  Enable HSE crystal oscillator (HSE ON)
+  * @rmtoll CR           HSEON         LL_RCC_HSE_Enable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_HSE_Enable(void)
+{
+  SET_BIT(RCC->CR, RCC_CR_HSEON);
+}
+
+/**
+  * @brief  Disable HSE crystal oscillator (HSE ON)
+  * @rmtoll CR           HSEON         LL_RCC_HSE_Disable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_HSE_Disable(void)
+{
+  CLEAR_BIT(RCC->CR, RCC_CR_HSEON);
+}
+
+/**
+  * @brief  Check if HSE oscillator Ready
+  * @rmtoll CR           HSERDY        LL_RCC_HSE_IsReady
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_HSE_IsReady(void)
+{
+  return (READ_BIT(RCC->CR, RCC_CR_HSERDY) == (RCC_CR_HSERDY));
+}
+
+#if defined(RCC_CFGR2_PREDIV2)
+/**
+  * @brief  Get PREDIV2 division factor
+  * @rmtoll CFGR2        PREDIV2       LL_RCC_HSE_GetPrediv2
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_1
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_2
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_3
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_4
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_5
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_6
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_7
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_8
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_9
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_10
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_11
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_12
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_13
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_14
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_15
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_16
+  */
+__STATIC_INLINE uint32_t LL_RCC_HSE_GetPrediv2(void)
+{
+  return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV2));
+}
+#endif /* RCC_CFGR2_PREDIV2 */
+
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EF_HSI HSI
+  * @{
+  */
+
+/**
+  * @brief  Enable HSI oscillator
+  * @rmtoll CR           HSION         LL_RCC_HSI_Enable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_HSI_Enable(void)
+{
+  SET_BIT(RCC->CR, RCC_CR_HSION);
+}
+
+/**
+  * @brief  Disable HSI oscillator
+  * @rmtoll CR           HSION         LL_RCC_HSI_Disable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_HSI_Disable(void)
+{
+  CLEAR_BIT(RCC->CR, RCC_CR_HSION);
+}
+
+/**
+  * @brief  Check if HSI clock is ready
+  * @rmtoll CR           HSIRDY        LL_RCC_HSI_IsReady
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_HSI_IsReady(void)
+{
+  return (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == (RCC_CR_HSIRDY));
+}
+
+/**
+  * @brief  Get HSI Calibration value
+  * @note When HSITRIM is written, HSICAL is updated with the sum of
+  *       HSITRIM and the factory trim value
+  * @rmtoll CR        HSICAL        LL_RCC_HSI_GetCalibration
+  * @retval Between Min_Data = 0x00 and Max_Data = 0xFF
+  */
+__STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibration(void)
+{
+  return (uint32_t)(READ_BIT(RCC->CR, RCC_CR_HSICAL) >> RCC_CR_HSICAL_Pos);
+}
+
+/**
+  * @brief  Set HSI Calibration trimming
+  * @note user-programmable trimming value that is added to the HSICAL
+  * @note Default value is 16, which, when added to the HSICAL value,
+  *       should trim the HSI to 16 MHz +/- 1 %
+  * @rmtoll CR        HSITRIM       LL_RCC_HSI_SetCalibTrimming
+  * @param  Value between Min_Data = 0x00 and Max_Data = 0x1F
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_HSI_SetCalibTrimming(uint32_t Value)
+{
+  MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, Value << RCC_CR_HSITRIM_Pos);
+}
+
+/**
+  * @brief  Get HSI Calibration trimming
+  * @rmtoll CR        HSITRIM       LL_RCC_HSI_GetCalibTrimming
+  * @retval Between Min_Data = 0x00 and Max_Data = 0x1F
+  */
+__STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibTrimming(void)
+{
+  return (uint32_t)(READ_BIT(RCC->CR, RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_Pos);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EF_LSE LSE
+  * @{
+  */
+
+/**
+  * @brief  Enable  Low Speed External (LSE) crystal.
+  * @rmtoll BDCR         LSEON         LL_RCC_LSE_Enable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_LSE_Enable(void)
+{
+  SET_BIT(RCC->BDCR, RCC_BDCR_LSEON);
+}
+
+/**
+  * @brief  Disable  Low Speed External (LSE) crystal.
+  * @rmtoll BDCR         LSEON         LL_RCC_LSE_Disable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_LSE_Disable(void)
+{
+  CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON);
+}
+
+/**
+  * @brief  Enable external clock source (LSE bypass).
+  * @rmtoll BDCR         LSEBYP        LL_RCC_LSE_EnableBypass
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_LSE_EnableBypass(void)
+{
+  SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP);
+}
+
+/**
+  * @brief  Disable external clock source (LSE bypass).
+  * @rmtoll BDCR         LSEBYP        LL_RCC_LSE_DisableBypass
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_LSE_DisableBypass(void)
+{
+  CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP);
+}
+
+/**
+  * @brief  Check if LSE oscillator Ready
+  * @rmtoll BDCR         LSERDY        LL_RCC_LSE_IsReady
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void)
+{
+  return (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == (RCC_BDCR_LSERDY));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EF_LSI LSI
+  * @{
+  */
+
+/**
+  * @brief  Enable LSI Oscillator
+  * @rmtoll CSR          LSION         LL_RCC_LSI_Enable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_LSI_Enable(void)
+{
+  SET_BIT(RCC->CSR, RCC_CSR_LSION);
+}
+
+/**
+  * @brief  Disable LSI Oscillator
+  * @rmtoll CSR          LSION         LL_RCC_LSI_Disable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_LSI_Disable(void)
+{
+  CLEAR_BIT(RCC->CSR, RCC_CSR_LSION);
+}
+
+/**
+  * @brief  Check if LSI is Ready
+  * @rmtoll CSR          LSIRDY        LL_RCC_LSI_IsReady
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_LSI_IsReady(void)
+{
+  return (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == (RCC_CSR_LSIRDY));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EF_System System
+  * @{
+  */
+
+/**
+  * @brief  Configure the system clock source
+  * @rmtoll CFGR         SW            LL_RCC_SetSysClkSource
+  * @param  Source This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_SYS_CLKSOURCE_HSI
+  *         @arg @ref LL_RCC_SYS_CLKSOURCE_HSE
+  *         @arg @ref LL_RCC_SYS_CLKSOURCE_PLL
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source)
+{
+  MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source);
+}
+
+/**
+  * @brief  Get the system clock source
+  * @rmtoll CFGR         SWS           LL_RCC_GetSysClkSource
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI
+  *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE
+  *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL
+  */
+__STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void)
+{
+  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
+}
+
+/**
+  * @brief  Set AHB prescaler
+  * @rmtoll CFGR         HPRE          LL_RCC_SetAHBPrescaler
+  * @param  Prescaler This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_SYSCLK_DIV_1
+  *         @arg @ref LL_RCC_SYSCLK_DIV_2
+  *         @arg @ref LL_RCC_SYSCLK_DIV_4
+  *         @arg @ref LL_RCC_SYSCLK_DIV_8
+  *         @arg @ref LL_RCC_SYSCLK_DIV_16
+  *         @arg @ref LL_RCC_SYSCLK_DIV_64
+  *         @arg @ref LL_RCC_SYSCLK_DIV_128
+  *         @arg @ref LL_RCC_SYSCLK_DIV_256
+  *         @arg @ref LL_RCC_SYSCLK_DIV_512
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler)
+{
+  MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler);
+}
+
+/**
+  * @brief  Set APB1 prescaler
+  * @rmtoll CFGR         PPRE1         LL_RCC_SetAPB1Prescaler
+  * @param  Prescaler This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_APB1_DIV_1
+  *         @arg @ref LL_RCC_APB1_DIV_2
+  *         @arg @ref LL_RCC_APB1_DIV_4
+  *         @arg @ref LL_RCC_APB1_DIV_8
+  *         @arg @ref LL_RCC_APB1_DIV_16
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler)
+{
+  MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler);
+}
+
+/**
+  * @brief  Set APB2 prescaler
+  * @rmtoll CFGR         PPRE2         LL_RCC_SetAPB2Prescaler
+  * @param  Prescaler This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_APB2_DIV_1
+  *         @arg @ref LL_RCC_APB2_DIV_2
+  *         @arg @ref LL_RCC_APB2_DIV_4
+  *         @arg @ref LL_RCC_APB2_DIV_8
+  *         @arg @ref LL_RCC_APB2_DIV_16
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler)
+{
+  MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler);
+}
+
+/**
+  * @brief  Get AHB prescaler
+  * @rmtoll CFGR         HPRE          LL_RCC_GetAHBPrescaler
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_SYSCLK_DIV_1
+  *         @arg @ref LL_RCC_SYSCLK_DIV_2
+  *         @arg @ref LL_RCC_SYSCLK_DIV_4
+  *         @arg @ref LL_RCC_SYSCLK_DIV_8
+  *         @arg @ref LL_RCC_SYSCLK_DIV_16
+  *         @arg @ref LL_RCC_SYSCLK_DIV_64
+  *         @arg @ref LL_RCC_SYSCLK_DIV_128
+  *         @arg @ref LL_RCC_SYSCLK_DIV_256
+  *         @arg @ref LL_RCC_SYSCLK_DIV_512
+  */
+__STATIC_INLINE uint32_t LL_RCC_GetAHBPrescaler(void)
+{
+  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE));
+}
+
+/**
+  * @brief  Get APB1 prescaler
+  * @rmtoll CFGR         PPRE1         LL_RCC_GetAPB1Prescaler
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_APB1_DIV_1
+  *         @arg @ref LL_RCC_APB1_DIV_2
+  *         @arg @ref LL_RCC_APB1_DIV_4
+  *         @arg @ref LL_RCC_APB1_DIV_8
+  *         @arg @ref LL_RCC_APB1_DIV_16
+  */
+__STATIC_INLINE uint32_t LL_RCC_GetAPB1Prescaler(void)
+{
+  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1));
+}
+
+/**
+  * @brief  Get APB2 prescaler
+  * @rmtoll CFGR         PPRE2         LL_RCC_GetAPB2Prescaler
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_APB2_DIV_1
+  *         @arg @ref LL_RCC_APB2_DIV_2
+  *         @arg @ref LL_RCC_APB2_DIV_4
+  *         @arg @ref LL_RCC_APB2_DIV_8
+  *         @arg @ref LL_RCC_APB2_DIV_16
+  */
+__STATIC_INLINE uint32_t LL_RCC_GetAPB2Prescaler(void)
+{
+  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EF_MCO MCO
+  * @{
+  */
+
+/**
+  * @brief  Configure MCOx
+  * @rmtoll CFGR         MCO           LL_RCC_ConfigMCO
+  * @param  MCOxSource This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_MCO1SOURCE_NOCLOCK
+  *         @arg @ref LL_RCC_MCO1SOURCE_SYSCLK
+  *         @arg @ref LL_RCC_MCO1SOURCE_HSI
+  *         @arg @ref LL_RCC_MCO1SOURCE_HSE
+  *         @arg @ref LL_RCC_MCO1SOURCE_PLLCLK_DIV_2
+  *         @arg @ref LL_RCC_MCO1SOURCE_PLL2CLK (*)
+  *         @arg @ref LL_RCC_MCO1SOURCE_PLLI2SCLK_DIV2 (*)
+  *         @arg @ref LL_RCC_MCO1SOURCE_EXT_HSE (*)
+  *         @arg @ref LL_RCC_MCO1SOURCE_PLLI2SCLK (*)
+  *
+  *         (*) value not defined in all devices
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_ConfigMCO(uint32_t MCOxSource)
+{
+  MODIFY_REG(RCC->CFGR, RCC_CFGR_MCOSEL, MCOxSource);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EF_Peripheral_Clock_Source Peripheral Clock Source
+  * @{
+  */
+
+#if defined(RCC_CFGR2_I2S2SRC)
+/**
+  * @brief  Configure I2Sx clock source
+  * @rmtoll CFGR2        I2S2SRC       LL_RCC_SetI2SClockSource\n
+  *         CFGR2        I2S3SRC       LL_RCC_SetI2SClockSource
+  * @param  I2SxSource This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_I2S2_CLKSOURCE_SYSCLK
+  *         @arg @ref LL_RCC_I2S2_CLKSOURCE_PLLI2S_VCO
+  *         @arg @ref LL_RCC_I2S3_CLKSOURCE_SYSCLK
+  *         @arg @ref LL_RCC_I2S3_CLKSOURCE_PLLI2S_VCO
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetI2SClockSource(uint32_t I2SxSource)
+{
+  MODIFY_REG(RCC->CFGR2, (I2SxSource & 0xFFFF0000U), (I2SxSource << 16U));
+}
+#endif /* RCC_CFGR2_I2S2SRC */
+
+#if defined(USB_OTG_FS) || defined(USB)
+/**
+  * @brief  Configure USB clock source
+  * @rmtoll CFGR         OTGFSPRE      LL_RCC_SetUSBClockSource\n
+  *         CFGR         USBPRE        LL_RCC_SetUSBClockSource
+  * @param  USBxSource This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL (*)
+  *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL_DIV_1_5 (*)
+  *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL_DIV_2 (*)
+  *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL_DIV_3 (*)
+  *
+  *         (*) value not defined in all devices
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetUSBClockSource(uint32_t USBxSource)
+{
+#if defined(RCC_CFGR_USBPRE)
+  MODIFY_REG(RCC->CFGR, RCC_CFGR_USBPRE, USBxSource);
+#else /*RCC_CFGR_OTGFSPRE*/
+  MODIFY_REG(RCC->CFGR, RCC_CFGR_OTGFSPRE, USBxSource);
+#endif /*RCC_CFGR_USBPRE*/
+}
+#endif /* USB_OTG_FS || USB */
+
+/**
+  * @brief  Configure ADC clock source
+  * @rmtoll CFGR         ADCPRE        LL_RCC_SetADCClockSource
+  * @param  ADCxSource This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_2
+  *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_4
+  *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_6
+  *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_8
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetADCClockSource(uint32_t ADCxSource)
+{
+  MODIFY_REG(RCC->CFGR, RCC_CFGR_ADCPRE, ADCxSource);
+}
+
+#if defined(RCC_CFGR2_I2S2SRC)
+/**
+  * @brief  Get I2Sx clock source
+  * @rmtoll CFGR2        I2S2SRC       LL_RCC_GetI2SClockSource\n
+  *         CFGR2        I2S3SRC       LL_RCC_GetI2SClockSource
+  * @param  I2Sx This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_I2S2_CLKSOURCE
+  *         @arg @ref LL_RCC_I2S3_CLKSOURCE
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_I2S2_CLKSOURCE_SYSCLK
+  *         @arg @ref LL_RCC_I2S2_CLKSOURCE_PLLI2S_VCO
+  *         @arg @ref LL_RCC_I2S3_CLKSOURCE_SYSCLK
+  *         @arg @ref LL_RCC_I2S3_CLKSOURCE_PLLI2S_VCO
+  */
+__STATIC_INLINE uint32_t LL_RCC_GetI2SClockSource(uint32_t I2Sx)
+{
+  return (uint32_t)(READ_BIT(RCC->CFGR2, I2Sx) >> 16U | I2Sx);
+}
+#endif /* RCC_CFGR2_I2S2SRC */
+
+#if defined(USB_OTG_FS) || defined(USB)
+/**
+  * @brief  Get USBx clock source
+  * @rmtoll CFGR         OTGFSPRE      LL_RCC_GetUSBClockSource\n
+  *         CFGR         USBPRE        LL_RCC_GetUSBClockSource
+  * @param  USBx This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_USB_CLKSOURCE
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL (*)
+  *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL_DIV_1_5 (*)
+  *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL_DIV_2 (*)
+  *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL_DIV_3 (*)
+  *
+  *         (*) value not defined in all devices
+  */
+__STATIC_INLINE uint32_t LL_RCC_GetUSBClockSource(uint32_t USBx)
+{
+  return (uint32_t)(READ_BIT(RCC->CFGR, USBx));
+}
+#endif /* USB_OTG_FS || USB */
+
+/**
+  * @brief  Get ADCx clock source
+  * @rmtoll CFGR         ADCPRE        LL_RCC_GetADCClockSource
+  * @param  ADCx This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_ADC_CLKSOURCE
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_2
+  *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_4
+  *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_6
+  *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_8
+  */
+__STATIC_INLINE uint32_t LL_RCC_GetADCClockSource(uint32_t ADCx)
+{
+  return (uint32_t)(READ_BIT(RCC->CFGR, ADCx));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EF_RTC RTC
+  * @{
+  */
+
+/**
+  * @brief  Set RTC Clock Source
+  * @note Once the RTC clock source has been selected, it cannot be changed any more unless
+  *       the Backup domain is reset. The BDRST bit can be used to reset them.
+  * @rmtoll BDCR         RTCSEL        LL_RCC_SetRTCClockSource
+  * @param  Source This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_RTC_CLKSOURCE_NONE
+  *         @arg @ref LL_RCC_RTC_CLKSOURCE_LSE
+  *         @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
+  *         @arg @ref LL_RCC_RTC_CLKSOURCE_HSE_DIV128
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_SetRTCClockSource(uint32_t Source)
+{
+  MODIFY_REG(RCC->BDCR, RCC_BDCR_RTCSEL, Source);
+}
+
+/**
+  * @brief  Get RTC Clock Source
+  * @rmtoll BDCR         RTCSEL        LL_RCC_GetRTCClockSource
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_RTC_CLKSOURCE_NONE
+  *         @arg @ref LL_RCC_RTC_CLKSOURCE_LSE
+  *         @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
+  *         @arg @ref LL_RCC_RTC_CLKSOURCE_HSE_DIV128
+  */
+__STATIC_INLINE uint32_t LL_RCC_GetRTCClockSource(void)
+{
+  return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL));
+}
+
+/**
+  * @brief  Enable RTC
+  * @rmtoll BDCR         RTCEN         LL_RCC_EnableRTC
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_EnableRTC(void)
+{
+  SET_BIT(RCC->BDCR, RCC_BDCR_RTCEN);
+}
+
+/**
+  * @brief  Disable RTC
+  * @rmtoll BDCR         RTCEN         LL_RCC_DisableRTC
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_DisableRTC(void)
+{
+  CLEAR_BIT(RCC->BDCR, RCC_BDCR_RTCEN);
+}
+
+/**
+  * @brief  Check if RTC has been enabled or not
+  * @rmtoll BDCR         RTCEN         LL_RCC_IsEnabledRTC
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsEnabledRTC(void)
+{
+  return (READ_BIT(RCC->BDCR, RCC_BDCR_RTCEN) == (RCC_BDCR_RTCEN));
+}
+
+/**
+  * @brief  Force the Backup domain reset
+  * @rmtoll BDCR         BDRST         LL_RCC_ForceBackupDomainReset
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_ForceBackupDomainReset(void)
+{
+  SET_BIT(RCC->BDCR, RCC_BDCR_BDRST);
+}
+
+/**
+  * @brief  Release the Backup domain reset
+  * @rmtoll BDCR         BDRST         LL_RCC_ReleaseBackupDomainReset
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_ReleaseBackupDomainReset(void)
+{
+  CLEAR_BIT(RCC->BDCR, RCC_BDCR_BDRST);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EF_PLL PLL
+  * @{
+  */
+
+/**
+  * @brief  Enable PLL
+  * @rmtoll CR           PLLON         LL_RCC_PLL_Enable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_PLL_Enable(void)
+{
+  SET_BIT(RCC->CR, RCC_CR_PLLON);
+}
+
+/**
+  * @brief  Disable PLL
+  * @note Cannot be disabled if the PLL clock is used as the system clock
+  * @rmtoll CR           PLLON         LL_RCC_PLL_Disable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_PLL_Disable(void)
+{
+  CLEAR_BIT(RCC->CR, RCC_CR_PLLON);
+}
+
+/**
+  * @brief  Check if PLL Ready
+  * @rmtoll CR           PLLRDY        LL_RCC_PLL_IsReady
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_PLL_IsReady(void)
+{
+  return (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == (RCC_CR_PLLRDY));
+}
+
+/**
+  * @brief  Configure PLL used for SYSCLK Domain
+  * @rmtoll CFGR         PLLSRC        LL_RCC_PLL_ConfigDomain_SYS\n
+  *         CFGR         PLLXTPRE      LL_RCC_PLL_ConfigDomain_SYS\n
+  *         CFGR         PLLMULL       LL_RCC_PLL_ConfigDomain_SYS\n
+  *         CFGR2        PREDIV1       LL_RCC_PLL_ConfigDomain_SYS\n
+  *         CFGR2        PREDIV1SRC    LL_RCC_PLL_ConfigDomain_SYS
+  * @param  Source This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_PLLSOURCE_HSI_DIV_2
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_1
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_2 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_3 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_4 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_5 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_6 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_7 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_8 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_9 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_10 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_11 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_12 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_13 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_14 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_15 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_16 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_1 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_2 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_3 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_4 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_5 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_6 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_7 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_8 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_9 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_10 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_11 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_12 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_13 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_14 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_15 (*)
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_16 (*)
+  *
+  *         (*) value not defined in all devices
+  * @param  PLLMul This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_PLL_MUL_2 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_3 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_4
+  *         @arg @ref LL_RCC_PLL_MUL_5
+  *         @arg @ref LL_RCC_PLL_MUL_6
+  *         @arg @ref LL_RCC_PLL_MUL_7
+  *         @arg @ref LL_RCC_PLL_MUL_8
+  *         @arg @ref LL_RCC_PLL_MUL_9
+  *         @arg @ref LL_RCC_PLL_MUL_6_5 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_10 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_11 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_12 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_13 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_14 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_15 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_16 (*)
+  *
+  *         (*) value not defined in all devices
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLMul)
+{
+  MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL,
+             (Source & (RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE)) | PLLMul);
+#if defined(RCC_CFGR2_PREDIV1)
+#if defined(RCC_CFGR2_PREDIV1SRC)
+  MODIFY_REG(RCC->CFGR2, (RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC),
+             (Source & RCC_CFGR2_PREDIV1) | ((Source & (RCC_CFGR2_PREDIV1SRC << 4U)) >> 4U));
+#else
+  MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PREDIV1, (Source & RCC_CFGR2_PREDIV1));
+#endif /*RCC_CFGR2_PREDIV1SRC*/
+#endif /*RCC_CFGR2_PREDIV1*/
+}
+
+/**
+  * @brief  Configure PLL clock source
+  * @rmtoll CFGR      PLLSRC        LL_RCC_PLL_SetMainSource\n
+  *         CFGR2     PREDIV1SRC    LL_RCC_PLL_SetMainSource
+  * @param PLLSource This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_PLLSOURCE_HSI_DIV_2
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2 (*)
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_PLL_SetMainSource(uint32_t PLLSource)
+{
+#if defined(RCC_CFGR2_PREDIV1SRC)
+  MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC, ((PLLSource & (RCC_CFGR2_PREDIV1SRC << 4U)) >> 4U));
+#endif /* RCC_CFGR2_PREDIV1SRC */
+  MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC, PLLSource);
+}
+
+/**
+  * @brief  Get the oscillator used as PLL clock source.
+  * @rmtoll CFGR         PLLSRC        LL_RCC_PLL_GetMainSource\n
+  *         CFGR2        PREDIV1SRC    LL_RCC_PLL_GetMainSource
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_PLLSOURCE_HSI_DIV_2
+  *         @arg @ref LL_RCC_PLLSOURCE_HSE
+  *         @arg @ref LL_RCC_PLLSOURCE_PLL2 (*)
+  *
+  *         (*) value not defined in all devices
+  */
+__STATIC_INLINE uint32_t LL_RCC_PLL_GetMainSource(void)
+{
+#if defined(RCC_CFGR2_PREDIV1SRC)
+  uint32_t pllsrc = READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC);
+  uint32_t predivsrc = (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC) << 4U);
+  return (uint32_t)(pllsrc | predivsrc);
+#else
+  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC));
+#endif /*RCC_CFGR2_PREDIV1SRC*/
+}
+
+/**
+  * @brief  Get PLL multiplication Factor
+  * @rmtoll CFGR         PLLMULL       LL_RCC_PLL_GetMultiplicator
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_PLL_MUL_2 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_3 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_4
+  *         @arg @ref LL_RCC_PLL_MUL_5
+  *         @arg @ref LL_RCC_PLL_MUL_6
+  *         @arg @ref LL_RCC_PLL_MUL_7
+  *         @arg @ref LL_RCC_PLL_MUL_8
+  *         @arg @ref LL_RCC_PLL_MUL_9
+  *         @arg @ref LL_RCC_PLL_MUL_6_5 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_10 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_11 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_12 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_13 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_14 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_15 (*)
+  *         @arg @ref LL_RCC_PLL_MUL_16 (*)
+  *
+  *         (*) value not defined in all devices
+  */
+__STATIC_INLINE uint32_t LL_RCC_PLL_GetMultiplicator(void)
+{
+  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLMULL));
+}
+
+/**
+  * @brief  Get PREDIV1 division factor for the main PLL
+  * @note They can be written only when the PLL is disabled
+  * @rmtoll CFGR2        PREDIV1       LL_RCC_PLL_GetPrediv\n
+  *         CFGR2        PLLXTPRE      LL_RCC_PLL_GetPrediv
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_PREDIV_DIV_1
+  *         @arg @ref LL_RCC_PREDIV_DIV_2
+  *         @arg @ref LL_RCC_PREDIV_DIV_3 (*)
+  *         @arg @ref LL_RCC_PREDIV_DIV_4 (*)
+  *         @arg @ref LL_RCC_PREDIV_DIV_5 (*)
+  *         @arg @ref LL_RCC_PREDIV_DIV_6 (*)
+  *         @arg @ref LL_RCC_PREDIV_DIV_7 (*)
+  *         @arg @ref LL_RCC_PREDIV_DIV_8 (*)
+  *         @arg @ref LL_RCC_PREDIV_DIV_9 (*)
+  *         @arg @ref LL_RCC_PREDIV_DIV_10 (*)
+  *         @arg @ref LL_RCC_PREDIV_DIV_11 (*)
+  *         @arg @ref LL_RCC_PREDIV_DIV_12 (*)
+  *         @arg @ref LL_RCC_PREDIV_DIV_13 (*)
+  *         @arg @ref LL_RCC_PREDIV_DIV_14 (*)
+  *         @arg @ref LL_RCC_PREDIV_DIV_15 (*)
+  *         @arg @ref LL_RCC_PREDIV_DIV_16 (*)
+  *
+  *         (*) value not defined in all devices
+  */
+__STATIC_INLINE uint32_t LL_RCC_PLL_GetPrediv(void)
+{
+#if defined(RCC_CFGR2_PREDIV1)
+  return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1));
+#else
+  return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos);
+#endif /*RCC_CFGR2_PREDIV1*/
+}
+
+/**
+  * @}
+  */
+
+#if defined(RCC_PLLI2S_SUPPORT)
+/** @defgroup RCC_LL_EF_PLLI2S PLLI2S
+  * @{
+  */
+
+/**
+  * @brief  Enable PLLI2S
+  * @rmtoll CR           PLL3ON        LL_RCC_PLLI2S_Enable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_PLLI2S_Enable(void)
+{
+  SET_BIT(RCC->CR, RCC_CR_PLL3ON);
+}
+
+/**
+  * @brief  Disable PLLI2S
+  * @rmtoll CR           PLL3ON        LL_RCC_PLLI2S_Disable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_PLLI2S_Disable(void)
+{
+  CLEAR_BIT(RCC->CR, RCC_CR_PLL3ON);
+}
+
+/**
+  * @brief  Check if PLLI2S Ready
+  * @rmtoll CR           PLL3RDY       LL_RCC_PLLI2S_IsReady
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_PLLI2S_IsReady(void)
+{
+  return (READ_BIT(RCC->CR, RCC_CR_PLL3RDY) == (RCC_CR_PLL3RDY));
+}
+
+/**
+  * @brief  Configure PLLI2S used for I2S Domain
+  * @rmtoll CFGR2        PREDIV2       LL_RCC_PLL_ConfigDomain_PLLI2S\n
+  *         CFGR2        PLL3MUL       LL_RCC_PLL_ConfigDomain_PLLI2S
+  * @param  Divider This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_1
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_2
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_3
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_4
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_5
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_6
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_7
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_8
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_9
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_10
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_11
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_12
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_13
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_14
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_15
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_16
+  * @param  Multiplicator This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_PLLI2S_MUL_8
+  *         @arg @ref LL_RCC_PLLI2S_MUL_9
+  *         @arg @ref LL_RCC_PLLI2S_MUL_10
+  *         @arg @ref LL_RCC_PLLI2S_MUL_11
+  *         @arg @ref LL_RCC_PLLI2S_MUL_12
+  *         @arg @ref LL_RCC_PLLI2S_MUL_13
+  *         @arg @ref LL_RCC_PLLI2S_MUL_14
+  *         @arg @ref LL_RCC_PLLI2S_MUL_16
+  *         @arg @ref LL_RCC_PLLI2S_MUL_20
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_PLLI2S(uint32_t Divider, uint32_t Multiplicator)
+{
+  MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL3MUL, Divider | Multiplicator);
+}
+
+/**
+  * @brief  Get PLLI2S Multiplication Factor
+  * @rmtoll CFGR2        PLL3MUL       LL_RCC_PLLI2S_GetMultiplicator
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_PLLI2S_MUL_8
+  *         @arg @ref LL_RCC_PLLI2S_MUL_9
+  *         @arg @ref LL_RCC_PLLI2S_MUL_10
+  *         @arg @ref LL_RCC_PLLI2S_MUL_11
+  *         @arg @ref LL_RCC_PLLI2S_MUL_12
+  *         @arg @ref LL_RCC_PLLI2S_MUL_13
+  *         @arg @ref LL_RCC_PLLI2S_MUL_14
+  *         @arg @ref LL_RCC_PLLI2S_MUL_16
+  *         @arg @ref LL_RCC_PLLI2S_MUL_20
+  */
+__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetMultiplicator(void)
+{
+  return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PLL3MUL));
+}
+
+/**
+  * @}
+  */
+#endif /* RCC_PLLI2S_SUPPORT */
+
+#if defined(RCC_PLL2_SUPPORT)
+/** @defgroup RCC_LL_EF_PLL2 PLL2
+  * @{
+  */
+
+/**
+  * @brief  Enable PLL2
+  * @rmtoll CR           PLL2ON        LL_RCC_PLL2_Enable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_PLL2_Enable(void)
+{
+  SET_BIT(RCC->CR, RCC_CR_PLL2ON);
+}
+
+/**
+  * @brief  Disable PLL2
+  * @rmtoll CR           PLL2ON        LL_RCC_PLL2_Disable
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_PLL2_Disable(void)
+{
+  CLEAR_BIT(RCC->CR, RCC_CR_PLL2ON);
+}
+
+/**
+  * @brief  Check if PLL2 Ready
+  * @rmtoll CR           PLL2RDY       LL_RCC_PLL2_IsReady
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_PLL2_IsReady(void)
+{
+  return (READ_BIT(RCC->CR, RCC_CR_PLL2RDY) == (RCC_CR_PLL2RDY));
+}
+
+/**
+  * @brief  Configure PLL2 used for PLL2 Domain
+  * @rmtoll CFGR2        PREDIV2       LL_RCC_PLL_ConfigDomain_PLL2\n
+  *         CFGR2        PLL2MUL       LL_RCC_PLL_ConfigDomain_PLL2
+  * @param  Divider This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_1
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_2
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_3
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_4
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_5
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_6
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_7
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_8
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_9
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_10
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_11
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_12
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_13
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_14
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_15
+  *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_16
+  * @param  Multiplicator This parameter can be one of the following values:
+  *         @arg @ref LL_RCC_PLL2_MUL_8
+  *         @arg @ref LL_RCC_PLL2_MUL_9
+  *         @arg @ref LL_RCC_PLL2_MUL_10
+  *         @arg @ref LL_RCC_PLL2_MUL_11
+  *         @arg @ref LL_RCC_PLL2_MUL_12
+  *         @arg @ref LL_RCC_PLL2_MUL_13
+  *         @arg @ref LL_RCC_PLL2_MUL_14
+  *         @arg @ref LL_RCC_PLL2_MUL_16
+  *         @arg @ref LL_RCC_PLL2_MUL_20
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_PLL2(uint32_t Divider, uint32_t Multiplicator)
+{
+  MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL, Divider | Multiplicator);
+}
+
+/**
+  * @brief  Get PLL2 Multiplication Factor
+  * @rmtoll CFGR2        PLL2MUL       LL_RCC_PLL2_GetMultiplicator
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_RCC_PLL2_MUL_8
+  *         @arg @ref LL_RCC_PLL2_MUL_9
+  *         @arg @ref LL_RCC_PLL2_MUL_10
+  *         @arg @ref LL_RCC_PLL2_MUL_11
+  *         @arg @ref LL_RCC_PLL2_MUL_12
+  *         @arg @ref LL_RCC_PLL2_MUL_13
+  *         @arg @ref LL_RCC_PLL2_MUL_14
+  *         @arg @ref LL_RCC_PLL2_MUL_16
+  *         @arg @ref LL_RCC_PLL2_MUL_20
+  */
+__STATIC_INLINE uint32_t LL_RCC_PLL2_GetMultiplicator(void)
+{
+  return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PLL2MUL));
+}
+
+/**
+  * @}
+  */
+#endif /* RCC_PLL2_SUPPORT */
+
+/** @defgroup RCC_LL_EF_FLAG_Management FLAG Management
+  * @{
+  */
+
+/**
+  * @brief  Clear LSI ready interrupt flag
+  * @rmtoll CIR         LSIRDYC       LL_RCC_ClearFlag_LSIRDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_ClearFlag_LSIRDY(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_LSIRDYC);
+}
+
+/**
+  * @brief  Clear LSE ready interrupt flag
+  * @rmtoll CIR         LSERDYC       LL_RCC_ClearFlag_LSERDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_ClearFlag_LSERDY(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_LSERDYC);
+}
+
+/**
+  * @brief  Clear HSI ready interrupt flag
+  * @rmtoll CIR         HSIRDYC       LL_RCC_ClearFlag_HSIRDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_ClearFlag_HSIRDY(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_HSIRDYC);
+}
+
+/**
+  * @brief  Clear HSE ready interrupt flag
+  * @rmtoll CIR         HSERDYC       LL_RCC_ClearFlag_HSERDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_ClearFlag_HSERDY(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_HSERDYC);
+}
+
+/**
+  * @brief  Clear PLL ready interrupt flag
+  * @rmtoll CIR         PLLRDYC       LL_RCC_ClearFlag_PLLRDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_ClearFlag_PLLRDY(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_PLLRDYC);
+}
+
+#if defined(RCC_PLLI2S_SUPPORT)
+/**
+  * @brief  Clear PLLI2S ready interrupt flag
+  * @rmtoll CIR          PLL3RDYC      LL_RCC_ClearFlag_PLLI2SRDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_ClearFlag_PLLI2SRDY(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_PLL3RDYC);
+}
+#endif /* RCC_PLLI2S_SUPPORT */
+
+#if defined(RCC_PLL2_SUPPORT)
+/**
+  * @brief  Clear PLL2 ready interrupt flag
+  * @rmtoll CIR          PLL2RDYC      LL_RCC_ClearFlag_PLL2RDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_ClearFlag_PLL2RDY(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_PLL2RDYC);
+}
+#endif /* RCC_PLL2_SUPPORT */
+
+/**
+  * @brief  Clear Clock security system interrupt flag
+  * @rmtoll CIR         CSSC          LL_RCC_ClearFlag_HSECSS
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_ClearFlag_HSECSS(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_CSSC);
+}
+
+/**
+  * @brief  Check if LSI ready interrupt occurred or not
+  * @rmtoll CIR         LSIRDYF       LL_RCC_IsActiveFlag_LSIRDY
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSIRDY(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_LSIRDYF) == (RCC_CIR_LSIRDYF));
+}
+
+/**
+  * @brief  Check if LSE ready interrupt occurred or not
+  * @rmtoll CIR         LSERDYF       LL_RCC_IsActiveFlag_LSERDY
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSERDY(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_LSERDYF) == (RCC_CIR_LSERDYF));
+}
+
+/**
+  * @brief  Check if HSI ready interrupt occurred or not
+  * @rmtoll CIR         HSIRDYF       LL_RCC_IsActiveFlag_HSIRDY
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSIRDY(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_HSIRDYF) == (RCC_CIR_HSIRDYF));
+}
+
+/**
+  * @brief  Check if HSE ready interrupt occurred or not
+  * @rmtoll CIR         HSERDYF       LL_RCC_IsActiveFlag_HSERDY
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSERDY(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_HSERDYF) == (RCC_CIR_HSERDYF));
+}
+
+/**
+  * @brief  Check if PLL ready interrupt occurred or not
+  * @rmtoll CIR         PLLRDYF       LL_RCC_IsActiveFlag_PLLRDY
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLLRDY(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_PLLRDYF) == (RCC_CIR_PLLRDYF));
+}
+
+#if defined(RCC_PLLI2S_SUPPORT)
+/**
+  * @brief  Check if PLLI2S ready interrupt occurred or not
+  * @rmtoll CIR          PLL3RDYF      LL_RCC_IsActiveFlag_PLLI2SRDY
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLLI2SRDY(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_PLL3RDYF) == (RCC_CIR_PLL3RDYF));
+}
+#endif /* RCC_PLLI2S_SUPPORT */
+
+#if defined(RCC_PLL2_SUPPORT)
+/**
+  * @brief  Check if PLL2 ready interrupt occurred or not
+  * @rmtoll CIR          PLL2RDYF      LL_RCC_IsActiveFlag_PLL2RDY
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLL2RDY(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_PLL2RDYF) == (RCC_CIR_PLL2RDYF));
+}
+#endif /* RCC_PLL2_SUPPORT */
+
+/**
+  * @brief  Check if Clock security system interrupt occurred or not
+  * @rmtoll CIR         CSSF          LL_RCC_IsActiveFlag_HSECSS
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSECSS(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_CSSF) == (RCC_CIR_CSSF));
+}
+
+/**
+  * @brief  Check if RCC flag Independent Watchdog reset is set or not.
+  * @rmtoll CSR          IWDGRSTF      LL_RCC_IsActiveFlag_IWDGRST
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_IWDGRST(void)
+{
+  return (READ_BIT(RCC->CSR, RCC_CSR_IWDGRSTF) == (RCC_CSR_IWDGRSTF));
+}
+
+/**
+  * @brief  Check if RCC flag Low Power reset is set or not.
+  * @rmtoll CSR          LPWRRSTF      LL_RCC_IsActiveFlag_LPWRRST
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LPWRRST(void)
+{
+  return (READ_BIT(RCC->CSR, RCC_CSR_LPWRRSTF) == (RCC_CSR_LPWRRSTF));
+}
+
+/**
+  * @brief  Check if RCC flag Pin reset is set or not.
+  * @rmtoll CSR          PINRSTF       LL_RCC_IsActiveFlag_PINRST
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PINRST(void)
+{
+  return (READ_BIT(RCC->CSR, RCC_CSR_PINRSTF) == (RCC_CSR_PINRSTF));
+}
+
+/**
+  * @brief  Check if RCC flag POR/PDR reset is set or not.
+  * @rmtoll CSR          PORRSTF       LL_RCC_IsActiveFlag_PORRST
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PORRST(void)
+{
+  return (READ_BIT(RCC->CSR, RCC_CSR_PORRSTF) == (RCC_CSR_PORRSTF));
+}
+
+/**
+  * @brief  Check if RCC flag Software reset is set or not.
+  * @rmtoll CSR          SFTRSTF       LL_RCC_IsActiveFlag_SFTRST
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_SFTRST(void)
+{
+  return (READ_BIT(RCC->CSR, RCC_CSR_SFTRSTF) == (RCC_CSR_SFTRSTF));
+}
+
+/**
+  * @brief  Check if RCC flag Window Watchdog reset is set or not.
+  * @rmtoll CSR          WWDGRSTF      LL_RCC_IsActiveFlag_WWDGRST
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_WWDGRST(void)
+{
+  return (READ_BIT(RCC->CSR, RCC_CSR_WWDGRSTF) == (RCC_CSR_WWDGRSTF));
+}
+
+/**
+  * @brief  Set RMVF bit to clear the reset flags.
+  * @rmtoll CSR          RMVF          LL_RCC_ClearResetFlags
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_ClearResetFlags(void)
+{
+  SET_BIT(RCC->CSR, RCC_CSR_RMVF);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EF_IT_Management IT Management
+  * @{
+  */
+
+/**
+  * @brief  Enable LSI ready interrupt
+  * @rmtoll CIR         LSIRDYIE      LL_RCC_EnableIT_LSIRDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_EnableIT_LSIRDY(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_LSIRDYIE);
+}
+
+/**
+  * @brief  Enable LSE ready interrupt
+  * @rmtoll CIR         LSERDYIE      LL_RCC_EnableIT_LSERDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_EnableIT_LSERDY(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_LSERDYIE);
+}
+
+/**
+  * @brief  Enable HSI ready interrupt
+  * @rmtoll CIR         HSIRDYIE      LL_RCC_EnableIT_HSIRDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_EnableIT_HSIRDY(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_HSIRDYIE);
+}
+
+/**
+  * @brief  Enable HSE ready interrupt
+  * @rmtoll CIR         HSERDYIE      LL_RCC_EnableIT_HSERDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_EnableIT_HSERDY(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_HSERDYIE);
+}
+
+/**
+  * @brief  Enable PLL ready interrupt
+  * @rmtoll CIR         PLLRDYIE      LL_RCC_EnableIT_PLLRDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_EnableIT_PLLRDY(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_PLLRDYIE);
+}
+
+#if defined(RCC_PLLI2S_SUPPORT)
+/**
+  * @brief  Enable PLLI2S ready interrupt
+  * @rmtoll CIR          PLL3RDYIE     LL_RCC_EnableIT_PLLI2SRDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_EnableIT_PLLI2SRDY(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_PLL3RDYIE);
+}
+#endif /* RCC_PLLI2S_SUPPORT */
+
+#if defined(RCC_PLL2_SUPPORT)
+/**
+  * @brief  Enable PLL2 ready interrupt
+  * @rmtoll CIR          PLL2RDYIE     LL_RCC_EnableIT_PLL2RDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_EnableIT_PLL2RDY(void)
+{
+  SET_BIT(RCC->CIR, RCC_CIR_PLL2RDYIE);
+}
+#endif /* RCC_PLL2_SUPPORT */
+
+/**
+  * @brief  Disable LSI ready interrupt
+  * @rmtoll CIR         LSIRDYIE      LL_RCC_DisableIT_LSIRDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_DisableIT_LSIRDY(void)
+{
+  CLEAR_BIT(RCC->CIR, RCC_CIR_LSIRDYIE);
+}
+
+/**
+  * @brief  Disable LSE ready interrupt
+  * @rmtoll CIR         LSERDYIE      LL_RCC_DisableIT_LSERDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_DisableIT_LSERDY(void)
+{
+  CLEAR_BIT(RCC->CIR, RCC_CIR_LSERDYIE);
+}
+
+/**
+  * @brief  Disable HSI ready interrupt
+  * @rmtoll CIR         HSIRDYIE      LL_RCC_DisableIT_HSIRDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_DisableIT_HSIRDY(void)
+{
+  CLEAR_BIT(RCC->CIR, RCC_CIR_HSIRDYIE);
+}
+
+/**
+  * @brief  Disable HSE ready interrupt
+  * @rmtoll CIR         HSERDYIE      LL_RCC_DisableIT_HSERDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_DisableIT_HSERDY(void)
+{
+  CLEAR_BIT(RCC->CIR, RCC_CIR_HSERDYIE);
+}
+
+/**
+  * @brief  Disable PLL ready interrupt
+  * @rmtoll CIR         PLLRDYIE      LL_RCC_DisableIT_PLLRDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_DisableIT_PLLRDY(void)
+{
+  CLEAR_BIT(RCC->CIR, RCC_CIR_PLLRDYIE);
+}
+
+#if defined(RCC_PLLI2S_SUPPORT)
+/**
+  * @brief  Disable PLLI2S ready interrupt
+  * @rmtoll CIR          PLL3RDYIE     LL_RCC_DisableIT_PLLI2SRDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_DisableIT_PLLI2SRDY(void)
+{
+  CLEAR_BIT(RCC->CIR, RCC_CIR_PLL3RDYIE);
+}
+#endif /* RCC_PLLI2S_SUPPORT */
+
+#if defined(RCC_PLL2_SUPPORT)
+/**
+  * @brief  Disable PLL2 ready interrupt
+  * @rmtoll CIR          PLL2RDYIE     LL_RCC_DisableIT_PLL2RDY
+  * @retval None
+  */
+__STATIC_INLINE void LL_RCC_DisableIT_PLL2RDY(void)
+{
+  CLEAR_BIT(RCC->CIR, RCC_CIR_PLL2RDYIE);
+}
+#endif /* RCC_PLL2_SUPPORT */
+
+/**
+  * @brief  Checks if LSI ready interrupt source is enabled or disabled.
+  * @rmtoll CIR         LSIRDYIE      LL_RCC_IsEnabledIT_LSIRDY
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSIRDY(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_LSIRDYIE) == (RCC_CIR_LSIRDYIE));
+}
+
+/**
+  * @brief  Checks if LSE ready interrupt source is enabled or disabled.
+  * @rmtoll CIR         LSERDYIE      LL_RCC_IsEnabledIT_LSERDY
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_LSERDY(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_LSERDYIE) == (RCC_CIR_LSERDYIE));
+}
+
+/**
+  * @brief  Checks if HSI ready interrupt source is enabled or disabled.
+  * @rmtoll CIR         HSIRDYIE      LL_RCC_IsEnabledIT_HSIRDY
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSIRDY(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_HSIRDYIE) == (RCC_CIR_HSIRDYIE));
+}
+
+/**
+  * @brief  Checks if HSE ready interrupt source is enabled or disabled.
+  * @rmtoll CIR         HSERDYIE      LL_RCC_IsEnabledIT_HSERDY
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_HSERDY(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_HSERDYIE) == (RCC_CIR_HSERDYIE));
+}
+
+/**
+  * @brief  Checks if PLL ready interrupt source is enabled or disabled.
+  * @rmtoll CIR         PLLRDYIE      LL_RCC_IsEnabledIT_PLLRDY
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_PLLRDY(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_PLLRDYIE) == (RCC_CIR_PLLRDYIE));
+}
+
+#if defined(RCC_PLLI2S_SUPPORT)
+/**
+  * @brief  Checks if PLLI2S ready interrupt source is enabled or disabled.
+  * @rmtoll CIR          PLL3RDYIE     LL_RCC_IsEnabledIT_PLLI2SRDY
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_PLLI2SRDY(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_PLL3RDYIE) == (RCC_CIR_PLL3RDYIE));
+}
+#endif /* RCC_PLLI2S_SUPPORT */
+
+#if defined(RCC_PLL2_SUPPORT)
+/**
+  * @brief  Checks if PLL2 ready interrupt source is enabled or disabled.
+  * @rmtoll CIR          PLL2RDYIE     LL_RCC_IsEnabledIT_PLL2RDY
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_RCC_IsEnabledIT_PLL2RDY(void)
+{
+  return (READ_BIT(RCC->CIR, RCC_CIR_PLL2RDYIE) == (RCC_CIR_PLL2RDYIE));
+}
+#endif /* RCC_PLL2_SUPPORT */
+
+/**
+  * @}
+  */
+
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup RCC_LL_EF_Init De-initialization function
+  * @{
+  */
+ErrorStatus LL_RCC_DeInit(void);
+/**
+  * @}
+  */
+
+/** @defgroup RCC_LL_EF_Get_Freq Get system and peripherals clocks frequency functions
+  * @{
+  */
+void        LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks);
+#if defined(RCC_CFGR2_I2S2SRC)
+uint32_t    LL_RCC_GetI2SClockFreq(uint32_t I2SxSource);
+#endif /* RCC_CFGR2_I2S2SRC */
+#if defined(USB_OTG_FS) || defined(USB)
+uint32_t    LL_RCC_GetUSBClockFreq(uint32_t USBxSource);
+#endif /* USB_OTG_FS || USB */
+uint32_t    LL_RCC_GetADCClockFreq(uint32_t ADCxSource);
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* RCC */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F1xx_LL_RCC_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_spi.h b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_spi.h
new file mode 100644
index 0000000..5b654d5
--- /dev/null
+++ b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_spi.h
@@ -0,0 +1,1938 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_ll_spi.h
+  * @author  MCD Application Team
+  * @brief   Header file of SPI LL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32F1xx_LL_SPI_H
+#define STM32F1xx_LL_SPI_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx.h"
+
+/** @addtogroup STM32F1xx_LL_Driver
+  * @{
+  */
+
+#if defined (SPI1) || defined (SPI2) || defined (SPI3)
+
+/** @defgroup SPI_LL SPI
+  * @{
+  */
+
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private macros ------------------------------------------------------------*/
+
+/* Exported types ------------------------------------------------------------*/
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup SPI_LL_ES_INIT SPI Exported Init structure
+  * @{
+  */
+
+/**
+  * @brief  SPI Init structures definition
+  */
+typedef struct
+{
+  uint32_t TransferDirection;       /*!< Specifies the SPI unidirectional or bidirectional data mode.
+                                         This parameter can be a value of @ref SPI_LL_EC_TRANSFER_MODE.
+
+                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferDirection().*/
+
+  uint32_t Mode;                    /*!< Specifies the SPI mode (Master/Slave).
+                                         This parameter can be a value of @ref SPI_LL_EC_MODE.
+
+                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetMode().*/
+
+  uint32_t DataWidth;               /*!< Specifies the SPI data width.
+                                         This parameter can be a value of @ref SPI_LL_EC_DATAWIDTH.
+
+                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetDataWidth().*/
+
+  uint32_t ClockPolarity;           /*!< Specifies the serial clock steady state.
+                                         This parameter can be a value of @ref SPI_LL_EC_POLARITY.
+
+                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPolarity().*/
+
+  uint32_t ClockPhase;              /*!< Specifies the clock active edge for the bit capture.
+                                         This parameter can be a value of @ref SPI_LL_EC_PHASE.
+
+                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetClockPhase().*/
+
+  uint32_t NSS;                     /*!< Specifies whether the NSS signal is managed by hardware (NSS pin) or by software using the SSI bit.
+                                         This parameter can be a value of @ref SPI_LL_EC_NSS_MODE.
+
+                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetNSSMode().*/
+
+  uint32_t BaudRate;                /*!< Specifies the BaudRate prescaler value which will be used to configure the transmit and receive SCK clock.
+                                         This parameter can be a value of @ref SPI_LL_EC_BAUDRATEPRESCALER.
+                                         @note The communication clock is derived from the master clock. The slave clock does not need to be set.
+
+                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetBaudRatePrescaler().*/
+
+  uint32_t BitOrder;                /*!< Specifies whether data transfers start from MSB or LSB bit.
+                                         This parameter can be a value of @ref SPI_LL_EC_BIT_ORDER.
+
+                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetTransferBitOrder().*/
+
+  uint32_t CRCCalculation;          /*!< Specifies if the CRC calculation is enabled or not.
+                                         This parameter can be a value of @ref SPI_LL_EC_CRC_CALCULATION.
+
+                                         This feature can be modified afterwards using unitary functions @ref LL_SPI_EnableCRC() and @ref LL_SPI_DisableCRC().*/
+
+  uint32_t CRCPoly;                 /*!< Specifies the polynomial used for the CRC calculation.
+                                         This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF.
+
+                                         This feature can be modified afterwards using unitary function @ref LL_SPI_SetCRCPolynomial().*/
+
+} LL_SPI_InitTypeDef;
+
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup SPI_LL_Exported_Constants SPI Exported Constants
+  * @{
+  */
+
+/** @defgroup SPI_LL_EC_GET_FLAG Get Flags Defines
+  * @brief    Flags defines which can be used with LL_SPI_ReadReg function
+  * @{
+  */
+#define LL_SPI_SR_RXNE                     SPI_SR_RXNE               /*!< Rx buffer not empty flag         */
+#define LL_SPI_SR_TXE                      SPI_SR_TXE                /*!< Tx buffer empty flag             */
+#define LL_SPI_SR_BSY                      SPI_SR_BSY                /*!< Busy flag                        */
+#define LL_SPI_SR_CRCERR                   SPI_SR_CRCERR             /*!< CRC error flag                   */
+#define LL_SPI_SR_MODF                     SPI_SR_MODF               /*!< Mode fault flag                  */
+#define LL_SPI_SR_OVR                      SPI_SR_OVR                /*!< Overrun flag                     */
+#define LL_SPI_SR_FRE                      SPI_SR_FRE                /*!< TI mode frame format error flag  */
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EC_IT IT Defines
+  * @brief    IT defines which can be used with LL_SPI_ReadReg and  LL_SPI_WriteReg functions
+  * @{
+  */
+#define LL_SPI_CR2_RXNEIE                  SPI_CR2_RXNEIE            /*!< Rx buffer not empty interrupt enable */
+#define LL_SPI_CR2_TXEIE                   SPI_CR2_TXEIE             /*!< Tx buffer empty interrupt enable     */
+#define LL_SPI_CR2_ERRIE                   SPI_CR2_ERRIE             /*!< Error interrupt enable               */
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EC_MODE Operation Mode
+  * @{
+  */
+#define LL_SPI_MODE_MASTER                 (SPI_CR1_MSTR | SPI_CR1_SSI)    /*!< Master configuration  */
+#define LL_SPI_MODE_SLAVE                  0x00000000U                     /*!< Slave configuration   */
+/**
+  * @}
+  */
+
+
+/** @defgroup SPI_LL_EC_PHASE Clock Phase
+  * @{
+  */
+#define LL_SPI_PHASE_1EDGE                 0x00000000U               /*!< First clock transition is the first data capture edge  */
+#define LL_SPI_PHASE_2EDGE                 (SPI_CR1_CPHA)            /*!< Second clock transition is the first data capture edge */
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EC_POLARITY Clock Polarity
+  * @{
+  */
+#define LL_SPI_POLARITY_LOW                0x00000000U               /*!< Clock to 0 when idle */
+#define LL_SPI_POLARITY_HIGH               (SPI_CR1_CPOL)            /*!< Clock to 1 when idle */
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EC_BAUDRATEPRESCALER Baud Rate Prescaler
+  * @{
+  */
+#define LL_SPI_BAUDRATEPRESCALER_DIV2      0x00000000U                                    /*!< BaudRate control equal to fPCLK/2   */
+#define LL_SPI_BAUDRATEPRESCALER_DIV4      (SPI_CR1_BR_0)                                 /*!< BaudRate control equal to fPCLK/4   */
+#define LL_SPI_BAUDRATEPRESCALER_DIV8      (SPI_CR1_BR_1)                                 /*!< BaudRate control equal to fPCLK/8   */
+#define LL_SPI_BAUDRATEPRESCALER_DIV16     (SPI_CR1_BR_1 | SPI_CR1_BR_0)                  /*!< BaudRate control equal to fPCLK/16  */
+#define LL_SPI_BAUDRATEPRESCALER_DIV32     (SPI_CR1_BR_2)                                 /*!< BaudRate control equal to fPCLK/32  */
+#define LL_SPI_BAUDRATEPRESCALER_DIV64     (SPI_CR1_BR_2 | SPI_CR1_BR_0)                  /*!< BaudRate control equal to fPCLK/64  */
+#define LL_SPI_BAUDRATEPRESCALER_DIV128    (SPI_CR1_BR_2 | SPI_CR1_BR_1)                  /*!< BaudRate control equal to fPCLK/128 */
+#define LL_SPI_BAUDRATEPRESCALER_DIV256    (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)   /*!< BaudRate control equal to fPCLK/256 */
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EC_BIT_ORDER Transmission Bit Order
+  * @{
+  */
+#define LL_SPI_LSB_FIRST                   (SPI_CR1_LSBFIRST)        /*!< Data is transmitted/received with the LSB first */
+#define LL_SPI_MSB_FIRST                   0x00000000U               /*!< Data is transmitted/received with the MSB first */
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EC_TRANSFER_MODE Transfer Mode
+  * @{
+  */
+#define LL_SPI_FULL_DUPLEX                 0x00000000U                          /*!< Full-Duplex mode. Rx and Tx transfer on 2 lines */
+#define LL_SPI_SIMPLEX_RX                  (SPI_CR1_RXONLY)                     /*!< Simplex Rx mode.  Rx transfer only on 1 line    */
+#define LL_SPI_HALF_DUPLEX_RX              (SPI_CR1_BIDIMODE)                   /*!< Half-Duplex Rx mode. Rx transfer on 1 line      */
+#define LL_SPI_HALF_DUPLEX_TX              (SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE)  /*!< Half-Duplex Tx mode. Tx transfer on 1 line      */
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EC_NSS_MODE Slave Select Pin Mode
+  * @{
+  */
+#define LL_SPI_NSS_SOFT                    (SPI_CR1_SSM)                     /*!< NSS managed internally. NSS pin not used and free              */
+#define LL_SPI_NSS_HARD_INPUT              0x00000000U                       /*!< NSS pin used in Input. Only used in Master mode                */
+#define LL_SPI_NSS_HARD_OUTPUT             (((uint32_t)SPI_CR2_SSOE << 16U)) /*!< NSS pin used in Output. Only used in Slave mode as chip select */
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EC_DATAWIDTH Datawidth
+  * @{
+  */
+#define LL_SPI_DATAWIDTH_8BIT              0x00000000U                       /*!< Data length for SPI transfer:  8 bits */
+#define LL_SPI_DATAWIDTH_16BIT             (SPI_CR1_DFF)                     /*!< Data length for SPI transfer:  16 bits */
+/**
+  * @}
+  */
+#if defined(USE_FULL_LL_DRIVER)
+
+/** @defgroup SPI_LL_EC_CRC_CALCULATION CRC Calculation
+  * @{
+  */
+#define LL_SPI_CRCCALCULATION_DISABLE      0x00000000U               /*!< CRC calculation disabled */
+#define LL_SPI_CRCCALCULATION_ENABLE       (SPI_CR1_CRCEN)           /*!< CRC calculation enabled  */
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup SPI_LL_Exported_Macros SPI Exported Macros
+  * @{
+  */
+
+/** @defgroup SPI_LL_EM_WRITE_READ Common Write and read registers Macros
+  * @{
+  */
+
+/**
+  * @brief  Write a value in SPI register
+  * @param  __INSTANCE__ SPI Instance
+  * @param  __REG__ Register to be written
+  * @param  __VALUE__ Value to be written in the register
+  * @retval None
+  */
+#define LL_SPI_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
+
+/**
+  * @brief  Read a value in SPI register
+  * @param  __INSTANCE__ SPI Instance
+  * @param  __REG__ Register to be read
+  * @retval Register value
+  */
+#define LL_SPI_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup SPI_LL_Exported_Functions SPI Exported Functions
+  * @{
+  */
+
+/** @defgroup SPI_LL_EF_Configuration Configuration
+  * @{
+  */
+
+/**
+  * @brief  Enable SPI peripheral
+  * @rmtoll CR1          SPE           LL_SPI_Enable
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_Enable(SPI_TypeDef *SPIx)
+{
+  SET_BIT(SPIx->CR1, SPI_CR1_SPE);
+}
+
+/**
+  * @brief  Disable SPI peripheral
+  * @note   When disabling the SPI, follow the procedure described in the Reference Manual.
+  * @rmtoll CR1          SPE           LL_SPI_Disable
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_Disable(SPI_TypeDef *SPIx)
+{
+  CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE);
+}
+
+/**
+  * @brief  Check if SPI peripheral is enabled
+  * @rmtoll CR1          SPE           LL_SPI_IsEnabled
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Set SPI operation mode to Master or Slave
+  * @note   This bit should not be changed when communication is ongoing.
+  * @rmtoll CR1          MSTR          LL_SPI_SetMode\n
+  *         CR1          SSI           LL_SPI_SetMode
+  * @param  SPIx SPI Instance
+  * @param  Mode This parameter can be one of the following values:
+  *         @arg @ref LL_SPI_MODE_MASTER
+  *         @arg @ref LL_SPI_MODE_SLAVE
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_SetMode(SPI_TypeDef *SPIx, uint32_t Mode)
+{
+  MODIFY_REG(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI, Mode);
+}
+
+/**
+  * @brief  Get SPI operation mode (Master or Slave)
+  * @rmtoll CR1          MSTR          LL_SPI_GetMode\n
+  *         CR1          SSI           LL_SPI_GetMode
+  * @param  SPIx SPI Instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_SPI_MODE_MASTER
+  *         @arg @ref LL_SPI_MODE_SLAVE
+  */
+__STATIC_INLINE uint32_t LL_SPI_GetMode(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI));
+}
+
+
+/**
+  * @brief  Set clock phase
+  * @note   This bit should not be changed when communication is ongoing.
+  *         This bit is not used in SPI TI mode.
+  * @rmtoll CR1          CPHA          LL_SPI_SetClockPhase
+  * @param  SPIx SPI Instance
+  * @param  ClockPhase This parameter can be one of the following values:
+  *         @arg @ref LL_SPI_PHASE_1EDGE
+  *         @arg @ref LL_SPI_PHASE_2EDGE
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_SetClockPhase(SPI_TypeDef *SPIx, uint32_t ClockPhase)
+{
+  MODIFY_REG(SPIx->CR1, SPI_CR1_CPHA, ClockPhase);
+}
+
+/**
+  * @brief  Get clock phase
+  * @rmtoll CR1          CPHA          LL_SPI_GetClockPhase
+  * @param  SPIx SPI Instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_SPI_PHASE_1EDGE
+  *         @arg @ref LL_SPI_PHASE_2EDGE
+  */
+__STATIC_INLINE uint32_t LL_SPI_GetClockPhase(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA));
+}
+
+/**
+  * @brief  Set clock polarity
+  * @note   This bit should not be changed when communication is ongoing.
+  *         This bit is not used in SPI TI mode.
+  * @rmtoll CR1          CPOL          LL_SPI_SetClockPolarity
+  * @param  SPIx SPI Instance
+  * @param  ClockPolarity This parameter can be one of the following values:
+  *         @arg @ref LL_SPI_POLARITY_LOW
+  *         @arg @ref LL_SPI_POLARITY_HIGH
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity)
+{
+  MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity);
+}
+
+/**
+  * @brief  Get clock polarity
+  * @rmtoll CR1          CPOL          LL_SPI_GetClockPolarity
+  * @param  SPIx SPI Instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_SPI_POLARITY_LOW
+  *         @arg @ref LL_SPI_POLARITY_HIGH
+  */
+__STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPOL));
+}
+
+/**
+  * @brief  Set baud rate prescaler
+  * @note   These bits should not be changed when communication is ongoing. SPI BaudRate = fPCLK/Prescaler.
+  * @rmtoll CR1          BR            LL_SPI_SetBaudRatePrescaler
+  * @param  SPIx SPI Instance
+  * @param  BaudRate This parameter can be one of the following values:
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV8
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV16
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV32
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV64
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_SetBaudRatePrescaler(SPI_TypeDef *SPIx, uint32_t BaudRate)
+{
+  MODIFY_REG(SPIx->CR1, SPI_CR1_BR, BaudRate);
+}
+
+/**
+  * @brief  Get baud rate prescaler
+  * @rmtoll CR1          BR            LL_SPI_GetBaudRatePrescaler
+  * @param  SPIx SPI Instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV8
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV16
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV32
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV64
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128
+  *         @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256
+  */
+__STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_BR));
+}
+
+/**
+  * @brief  Set transfer bit order
+  * @note   This bit should not be changed when communication is ongoing. This bit is not used in SPI TI mode.
+  * @rmtoll CR1          LSBFIRST      LL_SPI_SetTransferBitOrder
+  * @param  SPIx SPI Instance
+  * @param  BitOrder This parameter can be one of the following values:
+  *         @arg @ref LL_SPI_LSB_FIRST
+  *         @arg @ref LL_SPI_MSB_FIRST
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_SetTransferBitOrder(SPI_TypeDef *SPIx, uint32_t BitOrder)
+{
+  MODIFY_REG(SPIx->CR1, SPI_CR1_LSBFIRST, BitOrder);
+}
+
+/**
+  * @brief  Get transfer bit order
+  * @rmtoll CR1          LSBFIRST      LL_SPI_GetTransferBitOrder
+  * @param  SPIx SPI Instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_SPI_LSB_FIRST
+  *         @arg @ref LL_SPI_MSB_FIRST
+  */
+__STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_LSBFIRST));
+}
+
+/**
+  * @brief  Set transfer direction mode
+  * @note   For Half-Duplex mode, Rx Direction is set by default.
+  *         In master mode, the MOSI pin is used and in slave mode, the MISO pin is used for Half-Duplex.
+  * @rmtoll CR1          RXONLY        LL_SPI_SetTransferDirection\n
+  *         CR1          BIDIMODE      LL_SPI_SetTransferDirection\n
+  *         CR1          BIDIOE        LL_SPI_SetTransferDirection
+  * @param  SPIx SPI Instance
+  * @param  TransferDirection This parameter can be one of the following values:
+  *         @arg @ref LL_SPI_FULL_DUPLEX
+  *         @arg @ref LL_SPI_SIMPLEX_RX
+  *         @arg @ref LL_SPI_HALF_DUPLEX_RX
+  *         @arg @ref LL_SPI_HALF_DUPLEX_TX
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_SetTransferDirection(SPI_TypeDef *SPIx, uint32_t TransferDirection)
+{
+  MODIFY_REG(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE, TransferDirection);
+}
+
+/**
+  * @brief  Get transfer direction mode
+  * @rmtoll CR1          RXONLY        LL_SPI_GetTransferDirection\n
+  *         CR1          BIDIMODE      LL_SPI_GetTransferDirection\n
+  *         CR1          BIDIOE        LL_SPI_GetTransferDirection
+  * @param  SPIx SPI Instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_SPI_FULL_DUPLEX
+  *         @arg @ref LL_SPI_SIMPLEX_RX
+  *         @arg @ref LL_SPI_HALF_DUPLEX_RX
+  *         @arg @ref LL_SPI_HALF_DUPLEX_TX
+  */
+__STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_RXONLY | SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE));
+}
+
+/**
+  * @brief  Set frame data width
+  * @rmtoll CR1          DFF           LL_SPI_SetDataWidth
+  * @param  SPIx SPI Instance
+  * @param  DataWidth This parameter can be one of the following values:
+  *         @arg @ref LL_SPI_DATAWIDTH_8BIT
+  *         @arg @ref LL_SPI_DATAWIDTH_16BIT
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_SetDataWidth(SPI_TypeDef *SPIx, uint32_t DataWidth)
+{
+  MODIFY_REG(SPIx->CR1, SPI_CR1_DFF, DataWidth);
+}
+
+/**
+  * @brief  Get frame data width
+  * @rmtoll CR1          DFF           LL_SPI_GetDataWidth
+  * @param  SPIx SPI Instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_SPI_DATAWIDTH_8BIT
+  *         @arg @ref LL_SPI_DATAWIDTH_16BIT
+  */
+__STATIC_INLINE uint32_t LL_SPI_GetDataWidth(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_DFF));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EF_CRC_Management CRC Management
+  * @{
+  */
+
+/**
+  * @brief  Enable CRC
+  * @note   This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
+  * @rmtoll CR1          CRCEN         LL_SPI_EnableCRC
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_EnableCRC(SPI_TypeDef *SPIx)
+{
+  SET_BIT(SPIx->CR1, SPI_CR1_CRCEN);
+}
+
+/**
+  * @brief  Disable CRC
+  * @note   This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
+  * @rmtoll CR1          CRCEN         LL_SPI_DisableCRC
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_DisableCRC(SPI_TypeDef *SPIx)
+{
+  CLEAR_BIT(SPIx->CR1, SPI_CR1_CRCEN);
+}
+
+/**
+  * @brief  Check if CRC is enabled
+  * @note   This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
+  * @rmtoll CR1          CRCEN         LL_SPI_IsEnabledCRC
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SPI_IsEnabledCRC(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->CR1, SPI_CR1_CRCEN) == (SPI_CR1_CRCEN)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Set CRCNext to transfer CRC on the line
+  * @note   This bit has to be written as soon as the last data is written in the SPIx_DR register.
+  * @rmtoll CR1          CRCNEXT       LL_SPI_SetCRCNext
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_SetCRCNext(SPI_TypeDef *SPIx)
+{
+  SET_BIT(SPIx->CR1, SPI_CR1_CRCNEXT);
+}
+
+/**
+  * @brief  Set polynomial for CRC calculation
+  * @rmtoll CRCPR        CRCPOLY       LL_SPI_SetCRCPolynomial
+  * @param  SPIx SPI Instance
+  * @param  CRCPoly This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_SetCRCPolynomial(SPI_TypeDef *SPIx, uint32_t CRCPoly)
+{
+  WRITE_REG(SPIx->CRCPR, (uint16_t)CRCPoly);
+}
+
+/**
+  * @brief  Get polynomial for CRC calculation
+  * @rmtoll CRCPR        CRCPOLY       LL_SPI_GetCRCPolynomial
+  * @param  SPIx SPI Instance
+  * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
+  */
+__STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_REG(SPIx->CRCPR));
+}
+
+/**
+  * @brief  Get Rx CRC
+  * @rmtoll RXCRCR       RXCRC         LL_SPI_GetRxCRC
+  * @param  SPIx SPI Instance
+  * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
+  */
+__STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_REG(SPIx->RXCRCR));
+}
+
+/**
+  * @brief  Get Tx CRC
+  * @rmtoll TXCRCR       TXCRC         LL_SPI_GetTxCRC
+  * @param  SPIx SPI Instance
+  * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
+  */
+__STATIC_INLINE uint32_t LL_SPI_GetTxCRC(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_REG(SPIx->TXCRCR));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EF_NSS_Management Slave Select Pin Management
+  * @{
+  */
+
+/**
+  * @brief  Set NSS mode
+  * @note   LL_SPI_NSS_SOFT Mode is not used in SPI TI mode.
+  * @rmtoll CR1          SSM           LL_SPI_SetNSSMode\n
+  * @rmtoll CR2          SSOE          LL_SPI_SetNSSMode
+  * @param  SPIx SPI Instance
+  * @param  NSS This parameter can be one of the following values:
+  *         @arg @ref LL_SPI_NSS_SOFT
+  *         @arg @ref LL_SPI_NSS_HARD_INPUT
+  *         @arg @ref LL_SPI_NSS_HARD_OUTPUT
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_SetNSSMode(SPI_TypeDef *SPIx, uint32_t NSS)
+{
+  MODIFY_REG(SPIx->CR1, SPI_CR1_SSM,  NSS);
+  MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, ((uint32_t)(NSS >> 16U)));
+}
+
+/**
+  * @brief  Get NSS mode
+  * @rmtoll CR1          SSM           LL_SPI_GetNSSMode\n
+  * @rmtoll CR2          SSOE          LL_SPI_GetNSSMode
+  * @param  SPIx SPI Instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_SPI_NSS_SOFT
+  *         @arg @ref LL_SPI_NSS_HARD_INPUT
+  *         @arg @ref LL_SPI_NSS_HARD_OUTPUT
+  */
+__STATIC_INLINE uint32_t LL_SPI_GetNSSMode(SPI_TypeDef *SPIx)
+{
+  uint32_t Ssm  = (READ_BIT(SPIx->CR1, SPI_CR1_SSM));
+  uint32_t Ssoe = (READ_BIT(SPIx->CR2,  SPI_CR2_SSOE) << 16U);
+  return (Ssm | Ssoe);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EF_FLAG_Management FLAG Management
+  * @{
+  */
+
+/**
+  * @brief  Check if Rx buffer is not empty
+  * @rmtoll SR           RXNE          LL_SPI_IsActiveFlag_RXNE
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->SR, SPI_SR_RXNE) == (SPI_SR_RXNE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Check if Tx buffer is empty
+  * @rmtoll SR           TXE           LL_SPI_IsActiveFlag_TXE
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Get CRC error flag
+  * @rmtoll SR           CRCERR        LL_SPI_IsActiveFlag_CRCERR
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->SR, SPI_SR_CRCERR) == (SPI_SR_CRCERR)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Get mode fault error flag
+  * @rmtoll SR           MODF          LL_SPI_IsActiveFlag_MODF
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Get overrun error flag
+  * @rmtoll SR           OVR           LL_SPI_IsActiveFlag_OVR
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->SR, SPI_SR_OVR) == (SPI_SR_OVR)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Get busy flag
+  * @note   The BSY flag is cleared under any one of the following conditions:
+  * -When the SPI is correctly disabled
+  * -When a fault is detected in Master mode (MODF bit set to 1)
+  * -In Master mode, when it finishes a data transmission and no new data is ready to be
+  * sent
+  * -In Slave mode, when the BSY flag is set to '0' for at least one SPI clock cycle between
+  * each data transfer.
+  * @rmtoll SR           BSY           LL_SPI_IsActiveFlag_BSY
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->SR, SPI_SR_BSY) == (SPI_SR_BSY)) ? 1UL : 0UL);
+}
+
+
+/**
+  * @brief  Clear CRC error flag
+  * @rmtoll SR           CRCERR        LL_SPI_ClearFlag_CRCERR
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_ClearFlag_CRCERR(SPI_TypeDef *SPIx)
+{
+  CLEAR_BIT(SPIx->SR, SPI_SR_CRCERR);
+}
+
+/**
+  * @brief  Clear mode fault error flag
+  * @note   Clearing this flag is done by a read access to the SPIx_SR
+  *         register followed by a write access to the SPIx_CR1 register
+  * @rmtoll SR           MODF          LL_SPI_ClearFlag_MODF
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_ClearFlag_MODF(SPI_TypeDef *SPIx)
+{
+  __IO uint32_t tmpreg_sr;
+  tmpreg_sr = SPIx->SR;
+  (void) tmpreg_sr;
+  CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE);
+}
+
+/**
+  * @brief  Clear overrun error flag
+  * @note   Clearing this flag is done by a read access to the SPIx_DR
+  *         register followed by a read access to the SPIx_SR register
+  * @rmtoll SR           OVR           LL_SPI_ClearFlag_OVR
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_ClearFlag_OVR(SPI_TypeDef *SPIx)
+{
+  __IO uint32_t tmpreg;
+  tmpreg = SPIx->DR;
+  (void) tmpreg;
+  tmpreg = SPIx->SR;
+  (void) tmpreg;
+}
+
+/**
+  * @brief  Clear frame format error flag
+  * @note   Clearing this flag is done by reading SPIx_SR register
+  * @rmtoll SR           FRE           LL_SPI_ClearFlag_FRE
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_ClearFlag_FRE(SPI_TypeDef *SPIx)
+{
+  __IO uint32_t tmpreg;
+  tmpreg = SPIx->SR;
+  (void) tmpreg;
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EF_IT_Management Interrupt Management
+  * @{
+  */
+
+/**
+  * @brief  Enable error interrupt
+  * @note   This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode).
+  * @rmtoll CR2          ERRIE         LL_SPI_EnableIT_ERR
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_EnableIT_ERR(SPI_TypeDef *SPIx)
+{
+  SET_BIT(SPIx->CR2, SPI_CR2_ERRIE);
+}
+
+/**
+  * @brief  Enable Rx buffer not empty interrupt
+  * @rmtoll CR2          RXNEIE        LL_SPI_EnableIT_RXNE
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_EnableIT_RXNE(SPI_TypeDef *SPIx)
+{
+  SET_BIT(SPIx->CR2, SPI_CR2_RXNEIE);
+}
+
+/**
+  * @brief  Enable Tx buffer empty interrupt
+  * @rmtoll CR2          TXEIE         LL_SPI_EnableIT_TXE
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_EnableIT_TXE(SPI_TypeDef *SPIx)
+{
+  SET_BIT(SPIx->CR2, SPI_CR2_TXEIE);
+}
+
+/**
+  * @brief  Disable error interrupt
+  * @note   This bit controls the generation of an interrupt when an error condition occurs (CRCERR, OVR, MODF in SPI mode, FRE at TI mode).
+  * @rmtoll CR2          ERRIE         LL_SPI_DisableIT_ERR
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_DisableIT_ERR(SPI_TypeDef *SPIx)
+{
+  CLEAR_BIT(SPIx->CR2, SPI_CR2_ERRIE);
+}
+
+/**
+  * @brief  Disable Rx buffer not empty interrupt
+  * @rmtoll CR2          RXNEIE        LL_SPI_DisableIT_RXNE
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_DisableIT_RXNE(SPI_TypeDef *SPIx)
+{
+  CLEAR_BIT(SPIx->CR2, SPI_CR2_RXNEIE);
+}
+
+/**
+  * @brief  Disable Tx buffer empty interrupt
+  * @rmtoll CR2          TXEIE         LL_SPI_DisableIT_TXE
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_DisableIT_TXE(SPI_TypeDef *SPIx)
+{
+  CLEAR_BIT(SPIx->CR2, SPI_CR2_TXEIE);
+}
+
+/**
+  * @brief  Check if error interrupt is enabled
+  * @rmtoll CR2          ERRIE         LL_SPI_IsEnabledIT_ERR
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->CR2, SPI_CR2_ERRIE) == (SPI_CR2_ERRIE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Check if Rx buffer not empty interrupt is enabled
+  * @rmtoll CR2          RXNEIE        LL_SPI_IsEnabledIT_RXNE
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->CR2, SPI_CR2_RXNEIE) == (SPI_CR2_RXNEIE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Check if Tx buffer empty interrupt
+  * @rmtoll CR2          TXEIE         LL_SPI_IsEnabledIT_TXE
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->CR2, SPI_CR2_TXEIE) == (SPI_CR2_TXEIE)) ? 1UL : 0UL);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EF_DMA_Management DMA Management
+  * @{
+  */
+
+/**
+  * @brief  Enable DMA Rx
+  * @rmtoll CR2          RXDMAEN       LL_SPI_EnableDMAReq_RX
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_EnableDMAReq_RX(SPI_TypeDef *SPIx)
+{
+  SET_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);
+}
+
+/**
+  * @brief  Disable DMA Rx
+  * @rmtoll CR2          RXDMAEN       LL_SPI_DisableDMAReq_RX
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_DisableDMAReq_RX(SPI_TypeDef *SPIx)
+{
+  CLEAR_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);
+}
+
+/**
+  * @brief  Check if DMA Rx is enabled
+  * @rmtoll CR2          RXDMAEN       LL_SPI_IsEnabledDMAReq_RX
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->CR2, SPI_CR2_RXDMAEN) == (SPI_CR2_RXDMAEN)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable DMA Tx
+  * @rmtoll CR2          TXDMAEN       LL_SPI_EnableDMAReq_TX
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_EnableDMAReq_TX(SPI_TypeDef *SPIx)
+{
+  SET_BIT(SPIx->CR2, SPI_CR2_TXDMAEN);
+}
+
+/**
+  * @brief  Disable DMA Tx
+  * @rmtoll CR2          TXDMAEN       LL_SPI_DisableDMAReq_TX
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_DisableDMAReq_TX(SPI_TypeDef *SPIx)
+{
+  CLEAR_BIT(SPIx->CR2, SPI_CR2_TXDMAEN);
+}
+
+/**
+  * @brief  Check if DMA Tx is enabled
+  * @rmtoll CR2          TXDMAEN       LL_SPI_IsEnabledDMAReq_TX
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Get the data register address used for DMA transfer
+  * @rmtoll DR           DR            LL_SPI_DMA_GetRegAddr
+  * @param  SPIx SPI Instance
+  * @retval Address of data register
+  */
+__STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx)
+{
+  return (uint32_t) &(SPIx->DR);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EF_DATA_Management DATA Management
+  * @{
+  */
+
+/**
+  * @brief  Read 8-Bits in the data register
+  * @rmtoll DR           DR            LL_SPI_ReceiveData8
+  * @param  SPIx SPI Instance
+  * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFF
+  */
+__STATIC_INLINE uint8_t LL_SPI_ReceiveData8(SPI_TypeDef *SPIx)
+{
+  return (*((__IO uint8_t *)&SPIx->DR));
+}
+
+/**
+  * @brief  Read 16-Bits in the data register
+  * @rmtoll DR           DR            LL_SPI_ReceiveData16
+  * @param  SPIx SPI Instance
+  * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFFFF
+  */
+__STATIC_INLINE uint16_t LL_SPI_ReceiveData16(SPI_TypeDef *SPIx)
+{
+  return (uint16_t)(READ_REG(SPIx->DR));
+}
+
+/**
+  * @brief  Write 8-Bits in the data register
+  * @rmtoll DR           DR            LL_SPI_TransmitData8
+  * @param  SPIx SPI Instance
+  * @param  TxData Value between Min_Data=0x00 and Max_Data=0xFF
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_TransmitData8(SPI_TypeDef *SPIx, uint8_t TxData)
+{
+#if defined (__GNUC__)
+  __IO uint8_t *spidr = ((__IO uint8_t *)&SPIx->DR);
+  *spidr = TxData;
+#else
+  *((__IO uint8_t *)&SPIx->DR) = TxData;
+#endif /* __GNUC__ */
+}
+
+/**
+  * @brief  Write 16-Bits in the data register
+  * @rmtoll DR           DR            LL_SPI_TransmitData16
+  * @param  SPIx SPI Instance
+  * @param  TxData Value between Min_Data=0x00 and Max_Data=0xFFFF
+  * @retval None
+  */
+__STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData)
+{
+#if defined (__GNUC__)
+  __IO uint16_t *spidr = ((__IO uint16_t *)&SPIx->DR);
+  *spidr = TxData;
+#else
+  SPIx->DR = TxData;
+#endif /* __GNUC__ */
+}
+
+/**
+  * @}
+  */
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup SPI_LL_EF_Init Initialization and de-initialization functions
+  * @{
+  */
+
+ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx);
+ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct);
+void        LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct);
+
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#if defined(SPI_I2S_SUPPORT)
+/** @defgroup I2S_LL I2S
+  * @{
+  */
+
+/* Private variables ---------------------------------------------------------*/
+/* Private constants ---------------------------------------------------------*/
+/* Private macros ------------------------------------------------------------*/
+
+/* Exported types ------------------------------------------------------------*/
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup I2S_LL_ES_INIT I2S Exported Init structure
+  * @{
+  */
+
+/**
+  * @brief  I2S Init structure definition
+  */
+
+typedef struct
+{
+  uint32_t Mode;                    /*!< Specifies the I2S operating mode.
+                                         This parameter can be a value of @ref I2S_LL_EC_MODE
+
+                                         This feature can be modified afterwards using unitary function @ref LL_I2S_SetTransferMode().*/
+
+  uint32_t Standard;                /*!< Specifies the standard used for the I2S communication.
+                                         This parameter can be a value of @ref I2S_LL_EC_STANDARD
+
+                                         This feature can be modified afterwards using unitary function @ref LL_I2S_SetStandard().*/
+
+
+  uint32_t DataFormat;              /*!< Specifies the data format for the I2S communication.
+                                         This parameter can be a value of @ref I2S_LL_EC_DATA_FORMAT
+
+                                         This feature can be modified afterwards using unitary function @ref LL_I2S_SetDataFormat().*/
+
+
+  uint32_t MCLKOutput;              /*!< Specifies whether the I2S MCLK output is enabled or not.
+                                         This parameter can be a value of @ref I2S_LL_EC_MCLK_OUTPUT
+
+                                         This feature can be modified afterwards using unitary functions @ref LL_I2S_EnableMasterClock() or @ref LL_I2S_DisableMasterClock.*/
+
+
+  uint32_t AudioFreq;               /*!< Specifies the frequency selected for the I2S communication.
+                                         This parameter can be a value of @ref I2S_LL_EC_AUDIO_FREQ
+
+                                         Audio Frequency can be modified afterwards using Reference manual formulas to calculate Prescaler Linear, Parity
+                                         and unitary functions @ref LL_I2S_SetPrescalerLinear() and @ref LL_I2S_SetPrescalerParity() to set it.*/
+
+
+  uint32_t ClockPolarity;           /*!< Specifies the idle state of the I2S clock.
+                                         This parameter can be a value of @ref I2S_LL_EC_POLARITY
+
+                                         This feature can be modified afterwards using unitary function @ref LL_I2S_SetClockPolarity().*/
+
+} LL_I2S_InitTypeDef;
+
+/**
+  * @}
+  */
+#endif /*USE_FULL_LL_DRIVER*/
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup I2S_LL_Exported_Constants I2S Exported Constants
+  * @{
+  */
+
+/** @defgroup I2S_LL_EC_GET_FLAG Get Flags Defines
+  * @brief    Flags defines which can be used with LL_I2S_ReadReg function
+  * @{
+  */
+#define LL_I2S_SR_RXNE                     LL_SPI_SR_RXNE            /*!< Rx buffer not empty flag         */
+#define LL_I2S_SR_TXE                      LL_SPI_SR_TXE             /*!< Tx buffer empty flag             */
+#define LL_I2S_SR_BSY                      LL_SPI_SR_BSY             /*!< Busy flag                        */
+#define LL_I2S_SR_UDR                      SPI_SR_UDR                /*!< Underrun flag                    */
+#define LL_I2S_SR_OVR                      LL_SPI_SR_OVR             /*!< Overrun flag                     */
+#define LL_I2S_SR_FRE                      LL_SPI_SR_FRE             /*!< TI mode frame format error flag  */
+/**
+  * @}
+  */
+
+/** @defgroup SPI_LL_EC_IT IT Defines
+  * @brief    IT defines which can be used with LL_SPI_ReadReg and  LL_SPI_WriteReg functions
+  * @{
+  */
+#define LL_I2S_CR2_RXNEIE                  LL_SPI_CR2_RXNEIE         /*!< Rx buffer not empty interrupt enable */
+#define LL_I2S_CR2_TXEIE                   LL_SPI_CR2_TXEIE          /*!< Tx buffer empty interrupt enable     */
+#define LL_I2S_CR2_ERRIE                   LL_SPI_CR2_ERRIE          /*!< Error interrupt enable               */
+/**
+  * @}
+  */
+
+/** @defgroup I2S_LL_EC_DATA_FORMAT Data format
+  * @{
+  */
+#define LL_I2S_DATAFORMAT_16B              0x00000000U                                   /*!< Data length 16 bits, Channel length 16bit */
+#define LL_I2S_DATAFORMAT_16B_EXTENDED     (SPI_I2SCFGR_CHLEN)                           /*!< Data length 16 bits, Channel length 32bit */
+#define LL_I2S_DATAFORMAT_24B              (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0)    /*!< Data length 24 bits, Channel length 32bit */
+#define LL_I2S_DATAFORMAT_32B              (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1)    /*!< Data length 16 bits, Channel length 32bit */
+/**
+  * @}
+  */
+
+/** @defgroup I2S_LL_EC_POLARITY Clock Polarity
+  * @{
+  */
+#define LL_I2S_POLARITY_LOW                0x00000000U               /*!< Clock steady state is low level  */
+#define LL_I2S_POLARITY_HIGH               (SPI_I2SCFGR_CKPOL)       /*!< Clock steady state is high level */
+/**
+  * @}
+  */
+
+/** @defgroup I2S_LL_EC_STANDARD I2s Standard
+  * @{
+  */
+#define LL_I2S_STANDARD_PHILIPS            0x00000000U                                                         /*!< I2S standard philips                      */
+#define LL_I2S_STANDARD_MSB                (SPI_I2SCFGR_I2SSTD_0)                                              /*!< MSB justified standard (left justified)   */
+#define LL_I2S_STANDARD_LSB                (SPI_I2SCFGR_I2SSTD_1)                                              /*!< LSB justified standard (right justified)  */
+#define LL_I2S_STANDARD_PCM_SHORT          (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1)                       /*!< PCM standard, short frame synchronization */
+#define LL_I2S_STANDARD_PCM_LONG           (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC) /*!< PCM standard, long frame synchronization  */
+/**
+  * @}
+  */
+
+/** @defgroup I2S_LL_EC_MODE Operation Mode
+  * @{
+  */
+#define LL_I2S_MODE_SLAVE_TX               0x00000000U                                   /*!< Slave Tx configuration  */
+#define LL_I2S_MODE_SLAVE_RX               (SPI_I2SCFGR_I2SCFG_0)                        /*!< Slave Rx configuration  */
+#define LL_I2S_MODE_MASTER_TX              (SPI_I2SCFGR_I2SCFG_1)                        /*!< Master Tx configuration */
+#define LL_I2S_MODE_MASTER_RX              (SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1) /*!< Master Rx configuration */
+/**
+  * @}
+  */
+
+/** @defgroup I2S_LL_EC_PRESCALER_FACTOR Prescaler Factor
+  * @{
+  */
+#define LL_I2S_PRESCALER_PARITY_EVEN       0x00000000U               /*!< Odd factor: Real divider value is =  I2SDIV * 2    */
+#define LL_I2S_PRESCALER_PARITY_ODD        (SPI_I2SPR_ODD >> 8U)     /*!< Odd factor: Real divider value is = (I2SDIV * 2)+1 */
+/**
+  * @}
+  */
+
+#if defined(USE_FULL_LL_DRIVER)
+
+/** @defgroup I2S_LL_EC_MCLK_OUTPUT MCLK Output
+  * @{
+  */
+#define LL_I2S_MCLK_OUTPUT_DISABLE         0x00000000U               /*!< Master clock output is disabled */
+#define LL_I2S_MCLK_OUTPUT_ENABLE          (SPI_I2SPR_MCKOE)         /*!< Master clock output is enabled  */
+/**
+  * @}
+  */
+
+/** @defgroup I2S_LL_EC_AUDIO_FREQ Audio Frequency
+  * @{
+  */
+
+#define LL_I2S_AUDIOFREQ_192K              192000U       /*!< Audio Frequency configuration 192000 Hz       */
+#define LL_I2S_AUDIOFREQ_96K               96000U        /*!< Audio Frequency configuration  96000 Hz       */
+#define LL_I2S_AUDIOFREQ_48K               48000U        /*!< Audio Frequency configuration  48000 Hz       */
+#define LL_I2S_AUDIOFREQ_44K               44100U        /*!< Audio Frequency configuration  44100 Hz       */
+#define LL_I2S_AUDIOFREQ_32K               32000U        /*!< Audio Frequency configuration  32000 Hz       */
+#define LL_I2S_AUDIOFREQ_22K               22050U        /*!< Audio Frequency configuration  22050 Hz       */
+#define LL_I2S_AUDIOFREQ_16K               16000U        /*!< Audio Frequency configuration  16000 Hz       */
+#define LL_I2S_AUDIOFREQ_11K               11025U        /*!< Audio Frequency configuration  11025 Hz       */
+#define LL_I2S_AUDIOFREQ_8K                8000U         /*!< Audio Frequency configuration   8000 Hz       */
+#define LL_I2S_AUDIOFREQ_DEFAULT           2U            /*!< Audio Freq not specified. Register I2SDIV = 2 */
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup I2S_LL_Exported_Macros I2S Exported Macros
+  * @{
+  */
+
+/** @defgroup I2S_LL_EM_WRITE_READ Common Write and read registers Macros
+  * @{
+  */
+
+/**
+  * @brief  Write a value in I2S register
+  * @param  __INSTANCE__ I2S Instance
+  * @param  __REG__ Register to be written
+  * @param  __VALUE__ Value to be written in the register
+  * @retval None
+  */
+#define LL_I2S_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
+
+/**
+  * @brief  Read a value in I2S register
+  * @param  __INSTANCE__ I2S Instance
+  * @param  __REG__ Register to be read
+  * @retval Register value
+  */
+#define LL_I2S_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+
+/* Exported functions --------------------------------------------------------*/
+
+/** @defgroup I2S_LL_Exported_Functions I2S Exported Functions
+  * @{
+  */
+
+/** @defgroup I2S_LL_EF_Configuration Configuration
+  * @{
+  */
+
+/**
+  * @brief  Select I2S mode and Enable I2S peripheral
+  * @rmtoll I2SCFGR      I2SMOD        LL_I2S_Enable\n
+  *         I2SCFGR      I2SE          LL_I2S_Enable
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_Enable(SPI_TypeDef *SPIx)
+{
+  SET_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD | SPI_I2SCFGR_I2SE);
+}
+
+/**
+  * @brief  Disable I2S peripheral
+  * @rmtoll I2SCFGR      I2SE          LL_I2S_Disable
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_Disable(SPI_TypeDef *SPIx)
+{
+  CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD | SPI_I2SCFGR_I2SE);
+}
+
+/**
+  * @brief  Check if I2S peripheral is enabled
+  * @rmtoll I2SCFGR      I2SE          LL_I2S_IsEnabled
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2S_IsEnabled(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SE) == (SPI_I2SCFGR_I2SE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Set I2S data frame length
+  * @rmtoll I2SCFGR      DATLEN        LL_I2S_SetDataFormat\n
+  *         I2SCFGR      CHLEN         LL_I2S_SetDataFormat
+  * @param  SPIx SPI Instance
+  * @param  DataFormat This parameter can be one of the following values:
+  *         @arg @ref LL_I2S_DATAFORMAT_16B
+  *         @arg @ref LL_I2S_DATAFORMAT_16B_EXTENDED
+  *         @arg @ref LL_I2S_DATAFORMAT_24B
+  *         @arg @ref LL_I2S_DATAFORMAT_32B
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_SetDataFormat(SPI_TypeDef *SPIx, uint32_t DataFormat)
+{
+  MODIFY_REG(SPIx->I2SCFGR, SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN, DataFormat);
+}
+
+/**
+  * @brief  Get I2S data frame length
+  * @rmtoll I2SCFGR      DATLEN        LL_I2S_GetDataFormat\n
+  *         I2SCFGR      CHLEN         LL_I2S_GetDataFormat
+  * @param  SPIx SPI Instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_I2S_DATAFORMAT_16B
+  *         @arg @ref LL_I2S_DATAFORMAT_16B_EXTENDED
+  *         @arg @ref LL_I2S_DATAFORMAT_24B
+  *         @arg @ref LL_I2S_DATAFORMAT_32B
+  */
+__STATIC_INLINE uint32_t LL_I2S_GetDataFormat(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN));
+}
+
+/**
+  * @brief  Set I2S clock polarity
+  * @rmtoll I2SCFGR      CKPOL         LL_I2S_SetClockPolarity
+  * @param  SPIx SPI Instance
+  * @param  ClockPolarity This parameter can be one of the following values:
+  *         @arg @ref LL_I2S_POLARITY_LOW
+  *         @arg @ref LL_I2S_POLARITY_HIGH
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity)
+{
+  SET_BIT(SPIx->I2SCFGR, ClockPolarity);
+}
+
+/**
+  * @brief  Get I2S clock polarity
+  * @rmtoll I2SCFGR      CKPOL         LL_I2S_GetClockPolarity
+  * @param  SPIx SPI Instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_I2S_POLARITY_LOW
+  *         @arg @ref LL_I2S_POLARITY_HIGH
+  */
+__STATIC_INLINE uint32_t LL_I2S_GetClockPolarity(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_CKPOL));
+}
+
+/**
+  * @brief  Set I2S standard protocol
+  * @rmtoll I2SCFGR      I2SSTD        LL_I2S_SetStandard\n
+  *         I2SCFGR      PCMSYNC       LL_I2S_SetStandard
+  * @param  SPIx SPI Instance
+  * @param  Standard This parameter can be one of the following values:
+  *         @arg @ref LL_I2S_STANDARD_PHILIPS
+  *         @arg @ref LL_I2S_STANDARD_MSB
+  *         @arg @ref LL_I2S_STANDARD_LSB
+  *         @arg @ref LL_I2S_STANDARD_PCM_SHORT
+  *         @arg @ref LL_I2S_STANDARD_PCM_LONG
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard)
+{
+  MODIFY_REG(SPIx->I2SCFGR, SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC, Standard);
+}
+
+/**
+  * @brief  Get I2S standard protocol
+  * @rmtoll I2SCFGR      I2SSTD        LL_I2S_GetStandard\n
+  *         I2SCFGR      PCMSYNC       LL_I2S_GetStandard
+  * @param  SPIx SPI Instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_I2S_STANDARD_PHILIPS
+  *         @arg @ref LL_I2S_STANDARD_MSB
+  *         @arg @ref LL_I2S_STANDARD_LSB
+  *         @arg @ref LL_I2S_STANDARD_PCM_SHORT
+  *         @arg @ref LL_I2S_STANDARD_PCM_LONG
+  */
+__STATIC_INLINE uint32_t LL_I2S_GetStandard(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC));
+}
+
+/**
+  * @brief  Set I2S transfer mode
+  * @rmtoll I2SCFGR      I2SCFG        LL_I2S_SetTransferMode
+  * @param  SPIx SPI Instance
+  * @param  Mode This parameter can be one of the following values:
+  *         @arg @ref LL_I2S_MODE_SLAVE_TX
+  *         @arg @ref LL_I2S_MODE_SLAVE_RX
+  *         @arg @ref LL_I2S_MODE_MASTER_TX
+  *         @arg @ref LL_I2S_MODE_MASTER_RX
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_SetTransferMode(SPI_TypeDef *SPIx, uint32_t Mode)
+{
+  MODIFY_REG(SPIx->I2SCFGR, SPI_I2SCFGR_I2SCFG, Mode);
+}
+
+/**
+  * @brief  Get I2S transfer mode
+  * @rmtoll I2SCFGR      I2SCFG        LL_I2S_GetTransferMode
+  * @param  SPIx SPI Instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_I2S_MODE_SLAVE_TX
+  *         @arg @ref LL_I2S_MODE_SLAVE_RX
+  *         @arg @ref LL_I2S_MODE_MASTER_TX
+  *         @arg @ref LL_I2S_MODE_MASTER_RX
+  */
+__STATIC_INLINE uint32_t LL_I2S_GetTransferMode(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SCFG));
+}
+
+/**
+  * @brief  Set I2S linear prescaler
+  * @rmtoll I2SPR        I2SDIV        LL_I2S_SetPrescalerLinear
+  * @param  SPIx SPI Instance
+  * @param  PrescalerLinear Value between Min_Data=0x02 and Max_Data=0xFF
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_SetPrescalerLinear(SPI_TypeDef *SPIx, uint8_t PrescalerLinear)
+{
+  MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_I2SDIV, PrescalerLinear);
+}
+
+/**
+  * @brief  Get I2S linear prescaler
+  * @rmtoll I2SPR        I2SDIV        LL_I2S_GetPrescalerLinear
+  * @param  SPIx SPI Instance
+  * @retval PrescalerLinear Value between Min_Data=0x02 and Max_Data=0xFF
+  */
+__STATIC_INLINE uint32_t LL_I2S_GetPrescalerLinear(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_BIT(SPIx->I2SPR, SPI_I2SPR_I2SDIV));
+}
+
+/**
+  * @brief  Set I2S parity prescaler
+  * @rmtoll I2SPR        ODD           LL_I2S_SetPrescalerParity
+  * @param  SPIx SPI Instance
+  * @param  PrescalerParity This parameter can be one of the following values:
+  *         @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
+  *         @arg @ref LL_I2S_PRESCALER_PARITY_ODD
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_SetPrescalerParity(SPI_TypeDef *SPIx, uint32_t PrescalerParity)
+{
+  MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_ODD, PrescalerParity << 8U);
+}
+
+/**
+  * @brief  Get I2S parity prescaler
+  * @rmtoll I2SPR        ODD           LL_I2S_GetPrescalerParity
+  * @param  SPIx SPI Instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
+  *         @arg @ref LL_I2S_PRESCALER_PARITY_ODD
+  */
+__STATIC_INLINE uint32_t LL_I2S_GetPrescalerParity(SPI_TypeDef *SPIx)
+{
+  return (uint32_t)(READ_BIT(SPIx->I2SPR, SPI_I2SPR_ODD) >> 8U);
+}
+
+/**
+  * @brief  Enable the master clock output (Pin MCK)
+  * @rmtoll I2SPR        MCKOE         LL_I2S_EnableMasterClock
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_EnableMasterClock(SPI_TypeDef *SPIx)
+{
+  SET_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE);
+}
+
+/**
+  * @brief  Disable the master clock output (Pin MCK)
+  * @rmtoll I2SPR        MCKOE         LL_I2S_DisableMasterClock
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_DisableMasterClock(SPI_TypeDef *SPIx)
+{
+  CLEAR_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE);
+}
+
+/**
+  * @brief  Check if the master clock output (Pin MCK) is enabled
+  * @rmtoll I2SPR        MCKOE         LL_I2S_IsEnabledMasterClock
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2S_IsEnabledMasterClock(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE) == (SPI_I2SPR_MCKOE)) ? 1UL : 0UL);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup I2S_LL_EF_FLAG FLAG Management
+  * @{
+  */
+
+/**
+  * @brief  Check if Rx buffer is not empty
+  * @rmtoll SR           RXNE          LL_I2S_IsActiveFlag_RXNE
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_RXNE(SPI_TypeDef *SPIx)
+{
+  return LL_SPI_IsActiveFlag_RXNE(SPIx);
+}
+
+/**
+  * @brief  Check if Tx buffer is empty
+  * @rmtoll SR           TXE           LL_I2S_IsActiveFlag_TXE
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_TXE(SPI_TypeDef *SPIx)
+{
+  return LL_SPI_IsActiveFlag_TXE(SPIx);
+}
+
+/**
+  * @brief  Get busy flag
+  * @rmtoll SR           BSY           LL_I2S_IsActiveFlag_BSY
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_BSY(SPI_TypeDef *SPIx)
+{
+  return LL_SPI_IsActiveFlag_BSY(SPIx);
+}
+
+/**
+  * @brief  Get overrun error flag
+  * @rmtoll SR           OVR           LL_I2S_IsActiveFlag_OVR
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_OVR(SPI_TypeDef *SPIx)
+{
+  return LL_SPI_IsActiveFlag_OVR(SPIx);
+}
+
+/**
+  * @brief  Get underrun error flag
+  * @rmtoll SR           UDR           LL_I2S_IsActiveFlag_UDR
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_UDR(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->SR, SPI_SR_UDR) == (SPI_SR_UDR)) ? 1UL : 0UL);
+}
+
+
+/**
+  * @brief  Get channel side flag.
+  * @note   0: Channel Left has to be transmitted or has been received\n
+  *         1: Channel Right has to be transmitted or has been received\n
+  *         It has no significance in PCM mode.
+  * @rmtoll SR           CHSIDE        LL_I2S_IsActiveFlag_CHSIDE
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_CHSIDE(SPI_TypeDef *SPIx)
+{
+  return ((READ_BIT(SPIx->SR, SPI_SR_CHSIDE) == (SPI_SR_CHSIDE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Clear overrun error flag
+  * @rmtoll SR           OVR           LL_I2S_ClearFlag_OVR
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_ClearFlag_OVR(SPI_TypeDef *SPIx)
+{
+  LL_SPI_ClearFlag_OVR(SPIx);
+}
+
+/**
+  * @brief  Clear underrun error flag
+  * @rmtoll SR           UDR           LL_I2S_ClearFlag_UDR
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_ClearFlag_UDR(SPI_TypeDef *SPIx)
+{
+  __IO uint32_t tmpreg;
+  tmpreg = SPIx->SR;
+  (void)tmpreg;
+}
+
+/**
+  * @brief  Clear frame format error flag
+  * @rmtoll SR           FRE           LL_I2S_ClearFlag_FRE
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_ClearFlag_FRE(SPI_TypeDef *SPIx)
+{
+  LL_SPI_ClearFlag_FRE(SPIx);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup I2S_LL_EF_IT Interrupt Management
+  * @{
+  */
+
+/**
+  * @brief  Enable error IT
+  * @note   This bit controls the generation of an interrupt when an error condition occurs (OVR, UDR and FRE in I2S mode).
+  * @rmtoll CR2          ERRIE         LL_I2S_EnableIT_ERR
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_EnableIT_ERR(SPI_TypeDef *SPIx)
+{
+  LL_SPI_EnableIT_ERR(SPIx);
+}
+
+/**
+  * @brief  Enable Rx buffer not empty IT
+  * @rmtoll CR2          RXNEIE        LL_I2S_EnableIT_RXNE
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_EnableIT_RXNE(SPI_TypeDef *SPIx)
+{
+  LL_SPI_EnableIT_RXNE(SPIx);
+}
+
+/**
+  * @brief  Enable Tx buffer empty IT
+  * @rmtoll CR2          TXEIE         LL_I2S_EnableIT_TXE
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_EnableIT_TXE(SPI_TypeDef *SPIx)
+{
+  LL_SPI_EnableIT_TXE(SPIx);
+}
+
+/**
+  * @brief  Disable error IT
+  * @note   This bit controls the generation of an interrupt when an error condition occurs (OVR, UDR and FRE in I2S mode).
+  * @rmtoll CR2          ERRIE         LL_I2S_DisableIT_ERR
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_DisableIT_ERR(SPI_TypeDef *SPIx)
+{
+  LL_SPI_DisableIT_ERR(SPIx);
+}
+
+/**
+  * @brief  Disable Rx buffer not empty IT
+  * @rmtoll CR2          RXNEIE        LL_I2S_DisableIT_RXNE
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_DisableIT_RXNE(SPI_TypeDef *SPIx)
+{
+  LL_SPI_DisableIT_RXNE(SPIx);
+}
+
+/**
+  * @brief  Disable Tx buffer empty IT
+  * @rmtoll CR2          TXEIE         LL_I2S_DisableIT_TXE
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_DisableIT_TXE(SPI_TypeDef *SPIx)
+{
+  LL_SPI_DisableIT_TXE(SPIx);
+}
+
+/**
+  * @brief  Check if ERR IT is enabled
+  * @rmtoll CR2          ERRIE         LL_I2S_IsEnabledIT_ERR
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_ERR(SPI_TypeDef *SPIx)
+{
+  return LL_SPI_IsEnabledIT_ERR(SPIx);
+}
+
+/**
+  * @brief  Check if RXNE IT is enabled
+  * @rmtoll CR2          RXNEIE        LL_I2S_IsEnabledIT_RXNE
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_RXNE(SPI_TypeDef *SPIx)
+{
+  return LL_SPI_IsEnabledIT_RXNE(SPIx);
+}
+
+/**
+  * @brief  Check if TXE IT is enabled
+  * @rmtoll CR2          TXEIE         LL_I2S_IsEnabledIT_TXE
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2S_IsEnabledIT_TXE(SPI_TypeDef *SPIx)
+{
+  return LL_SPI_IsEnabledIT_TXE(SPIx);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup I2S_LL_EF_DMA DMA Management
+  * @{
+  */
+
+/**
+  * @brief  Enable DMA Rx
+  * @rmtoll CR2          RXDMAEN       LL_I2S_EnableDMAReq_RX
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_EnableDMAReq_RX(SPI_TypeDef *SPIx)
+{
+  LL_SPI_EnableDMAReq_RX(SPIx);
+}
+
+/**
+  * @brief  Disable DMA Rx
+  * @rmtoll CR2          RXDMAEN       LL_I2S_DisableDMAReq_RX
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_DisableDMAReq_RX(SPI_TypeDef *SPIx)
+{
+  LL_SPI_DisableDMAReq_RX(SPIx);
+}
+
+/**
+  * @brief  Check if DMA Rx is enabled
+  * @rmtoll CR2          RXDMAEN       LL_I2S_IsEnabledDMAReq_RX
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx)
+{
+  return LL_SPI_IsEnabledDMAReq_RX(SPIx);
+}
+
+/**
+  * @brief  Enable DMA Tx
+  * @rmtoll CR2          TXDMAEN       LL_I2S_EnableDMAReq_TX
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_EnableDMAReq_TX(SPI_TypeDef *SPIx)
+{
+  LL_SPI_EnableDMAReq_TX(SPIx);
+}
+
+/**
+  * @brief  Disable DMA Tx
+  * @rmtoll CR2          TXDMAEN       LL_I2S_DisableDMAReq_TX
+  * @param  SPIx SPI Instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_DisableDMAReq_TX(SPI_TypeDef *SPIx)
+{
+  LL_SPI_DisableDMAReq_TX(SPIx);
+}
+
+/**
+  * @brief  Check if DMA Tx is enabled
+  * @rmtoll CR2          TXDMAEN       LL_I2S_IsEnabledDMAReq_TX
+  * @param  SPIx SPI Instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_I2S_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx)
+{
+  return LL_SPI_IsEnabledDMAReq_TX(SPIx);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup I2S_LL_EF_DATA DATA Management
+  * @{
+  */
+
+/**
+  * @brief  Read 16-Bits in data register
+  * @rmtoll DR           DR            LL_I2S_ReceiveData16
+  * @param  SPIx SPI Instance
+  * @retval RxData Value between Min_Data=0x0000 and Max_Data=0xFFFF
+  */
+__STATIC_INLINE uint16_t LL_I2S_ReceiveData16(SPI_TypeDef *SPIx)
+{
+  return LL_SPI_ReceiveData16(SPIx);
+}
+
+/**
+  * @brief  Write 16-Bits in data register
+  * @rmtoll DR           DR            LL_I2S_TransmitData16
+  * @param  SPIx SPI Instance
+  * @param  TxData Value between Min_Data=0x0000 and Max_Data=0xFFFF
+  * @retval None
+  */
+__STATIC_INLINE void LL_I2S_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData)
+{
+  LL_SPI_TransmitData16(SPIx, TxData);
+}
+
+/**
+  * @}
+  */
+
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup I2S_LL_EF_Init Initialization and de-initialization functions
+  * @{
+  */
+
+ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx);
+ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct);
+void        LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct);
+void        LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity);
+
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+#endif /* SPI_I2S_SUPPORT */
+
+#endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32F1xx_LL_SPI_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_system.h b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_system.h
new file mode 100644
index 0000000..f62c1d2
--- /dev/null
+++ b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_system.h
@@ -0,0 +1,574 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_ll_system.h
+  * @author  MCD Application Team
+  * @brief   Header file of SYSTEM LL module.
+  @verbatim
+  ==============================================================================
+                     ##### How to use this driver #####
+  ==============================================================================
+    [..]
+    The LL SYSTEM driver contains a set of generic APIs that can be
+    used by user:
+      (+) Some of the FLASH features need to be handled in the SYSTEM file.
+      (+) Access to DBGCMU registers
+      (+) Access to SYSCFG registers
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_LL_SYSTEM_H
+#define __STM32F1xx_LL_SYSTEM_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx.h"
+
+/** @addtogroup STM32F1xx_LL_Driver
+  * @{
+  */
+
+#if defined (FLASH) || defined (DBGMCU)
+
+/** @defgroup SYSTEM_LL SYSTEM
+  * @{
+  */
+
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup SYSTEM_LL_Private_Constants SYSTEM Private Constants
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/* Private macros ------------------------------------------------------------*/
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup SYSTEM_LL_Exported_Constants SYSTEM Exported Constants
+  * @{
+  */
+
+
+
+/** @defgroup SYSTEM_LL_EC_TRACE DBGMCU TRACE Pin Assignment
+  * @{
+  */
+#define LL_DBGMCU_TRACE_NONE               0x00000000U                                     /*!< TRACE pins not assigned (default state) */
+#define LL_DBGMCU_TRACE_ASYNCH             DBGMCU_CR_TRACE_IOEN                            /*!< TRACE pin assignment for Asynchronous Mode */
+#define LL_DBGMCU_TRACE_SYNCH_SIZE1        (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE_0) /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 1 */
+#define LL_DBGMCU_TRACE_SYNCH_SIZE2        (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE_1) /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 2 */
+#define LL_DBGMCU_TRACE_SYNCH_SIZE4        (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE)   /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 4 */
+/**
+  * @}
+  */
+
+/** @defgroup SYSTEM_LL_EC_APB1_GRP1_STOP_IP DBGMCU APB1 GRP1 STOP IP
+  * @{
+  */
+#define LL_DBGMCU_APB1_GRP1_TIM2_STOP      DBGMCU_CR_DBG_TIM2_STOP          /*!< TIM2 counter stopped when core is halted */
+#define LL_DBGMCU_APB1_GRP1_TIM3_STOP      DBGMCU_CR_DBG_TIM3_STOP          /*!< TIM3 counter stopped when core is halted */
+#define LL_DBGMCU_APB1_GRP1_TIM4_STOP      DBGMCU_CR_DBG_TIM4_STOP          /*!< TIM4 counter stopped when core is halted */
+#if defined(DBGMCU_CR_DBG_TIM5_STOP)
+#define LL_DBGMCU_APB1_GRP1_TIM5_STOP      DBGMCU_CR_DBG_TIM5_STOP          /*!< TIM5 counter stopped when core is halted */
+#endif /* DBGMCU_CR_DBG_TIM5_STOP */
+#if defined(DBGMCU_CR_DBG_TIM6_STOP)
+#define LL_DBGMCU_APB1_GRP1_TIM6_STOP      DBGMCU_CR_DBG_TIM6_STOP          /*!< TIM6 counter stopped when core is halted */
+#endif /* DBGMCU_CR_DBG_TIM6_STOP */
+#if defined(DBGMCU_CR_DBG_TIM7_STOP)
+#define LL_DBGMCU_APB1_GRP1_TIM7_STOP      DBGMCU_CR_DBG_TIM7_STOP          /*!< TIM7 counter stopped when core is halted */
+#endif /* DBGMCU_CR_DBG_TIM7_STOP */
+#if defined(DBGMCU_CR_DBG_TIM12_STOP)
+#define LL_DBGMCU_APB1_GRP1_TIM12_STOP     DBGMCU_CR_DBG_TIM12_STOP         /*!< TIM12 counter stopped when core is halted */
+#endif /* DBGMCU_CR_DBG_TIM12_STOP */
+#if defined(DBGMCU_CR_DBG_TIM13_STOP)
+#define LL_DBGMCU_APB1_GRP1_TIM13_STOP     DBGMCU_CR_DBG_TIM13_STOP         /*!< TIM13 counter stopped when core is halted */
+#endif /* DBGMCU_CR_DBG_TIM13_STOP */
+#if defined(DBGMCU_CR_DBG_TIM14_STOP)
+#define LL_DBGMCU_APB1_GRP1_TIM14_STOP     DBGMCU_CR_DBG_TIM14_STOP         /*!< TIM14 counter stopped when core is halted */
+#endif /* DBGMCU_CR_DBG_TIM14_STOP */
+#define LL_DBGMCU_APB1_GRP1_WWDG_STOP      DBGMCU_CR_DBG_WWDG_STOP          /*!< Debug Window Watchdog stopped when Core is halted */
+#define LL_DBGMCU_APB1_GRP1_IWDG_STOP      DBGMCU_CR_DBG_IWDG_STOP          /*!< Debug Independent Watchdog stopped when Core is halted */
+#define LL_DBGMCU_APB1_GRP1_I2C1_STOP      DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT /*!< I2C1 SMBUS timeout mode stopped when Core is halted */
+#if defined(DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
+#define LL_DBGMCU_APB1_GRP1_I2C2_STOP      DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT /*!< I2C2 SMBUS timeout mode stopped when Core is halted */
+#endif /* DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT */
+#if defined(DBGMCU_CR_DBG_CAN1_STOP)
+#define LL_DBGMCU_APB1_GRP1_CAN1_STOP      DBGMCU_CR_DBG_CAN1_STOP          /*!< CAN1 debug stopped when Core is halted  */
+#endif /* DBGMCU_CR_DBG_CAN1_STOP */
+#if defined(DBGMCU_CR_DBG_CAN2_STOP)
+#define LL_DBGMCU_APB1_GRP1_CAN2_STOP      DBGMCU_CR_DBG_CAN2_STOP          /*!< CAN2 debug stopped when Core is halted  */
+#endif /* DBGMCU_CR_DBG_CAN2_STOP */
+/**
+  * @}
+  */
+
+/** @defgroup SYSTEM_LL_EC_APB2_GRP1_STOP_IP DBGMCU APB2 GRP1 STOP IP
+  * @{
+  */
+#define LL_DBGMCU_APB2_GRP1_TIM1_STOP      DBGMCU_CR_DBG_TIM1_STOP   /*!< TIM1 counter stopped when core is halted */
+#if defined(DBGMCU_CR_DBG_TIM8_STOP)
+#define LL_DBGMCU_APB2_GRP1_TIM8_STOP      DBGMCU_CR_DBG_TIM8_STOP   /*!< TIM8 counter stopped when core is halted */
+#endif /* DBGMCU_CR_DBG_CAN1_STOP */
+#if defined(DBGMCU_CR_DBG_TIM9_STOP)
+#define LL_DBGMCU_APB2_GRP1_TIM9_STOP      DBGMCU_CR_DBG_TIM9_STOP   /*!< TIM9 counter stopped when core is halted */
+#endif /* DBGMCU_CR_DBG_TIM9_STOP */
+#if defined(DBGMCU_CR_DBG_TIM10_STOP)
+#define LL_DBGMCU_APB2_GRP1_TIM10_STOP     DBGMCU_CR_DBG_TIM10_STOP   /*!< TIM10 counter stopped when core is halted */
+#endif /* DBGMCU_CR_DBG_TIM10_STOP */
+#if defined(DBGMCU_CR_DBG_TIM11_STOP)
+#define LL_DBGMCU_APB2_GRP1_TIM11_STOP     DBGMCU_CR_DBG_TIM11_STOP   /*!< TIM11 counter stopped when core is halted */
+#endif /* DBGMCU_CR_DBG_TIM11_STOP */
+#if defined(DBGMCU_CR_DBG_TIM15_STOP)
+#define LL_DBGMCU_APB2_GRP1_TIM15_STOP     DBGMCU_CR_DBG_TIM15_STOP   /*!< TIM15 counter stopped when core is halted */
+#endif /* DBGMCU_CR_DBG_TIM15_STOP */
+#if defined(DBGMCU_CR_DBG_TIM16_STOP)
+#define LL_DBGMCU_APB2_GRP1_TIM16_STOP     DBGMCU_CR_DBG_TIM16_STOP   /*!< TIM16 counter stopped when core is halted */
+#endif /* DBGMCU_CR_DBG_TIM16_STOP */
+#if defined(DBGMCU_CR_DBG_TIM17_STOP)
+#define LL_DBGMCU_APB2_GRP1_TIM17_STOP     DBGMCU_CR_DBG_TIM17_STOP   /*!< TIM17 counter stopped when core is halted */
+#endif /* DBGMCU_CR_DBG_TIM17_STOP */
+/**
+  * @}
+  */
+
+/** @defgroup SYSTEM_LL_EC_LATENCY FLASH LATENCY
+  * @{
+  */
+#if defined(FLASH_ACR_LATENCY)
+#define LL_FLASH_LATENCY_0                 0x00000000U             /*!< FLASH Zero Latency cycle */
+#define LL_FLASH_LATENCY_1                 FLASH_ACR_LATENCY_0     /*!< FLASH One Latency cycle */
+#define LL_FLASH_LATENCY_2                 FLASH_ACR_LATENCY_1     /*!< FLASH Two wait states */
+#else
+#endif /* FLASH_ACR_LATENCY */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup SYSTEM_LL_Exported_Functions SYSTEM Exported Functions
+  * @{
+  */
+
+
+
+/** @defgroup SYSTEM_LL_EF_DBGMCU DBGMCU
+  * @{
+  */
+
+/**
+  * @brief  Return the device identifier
+  * @note For Low Density devices, the device ID is 0x412
+  * @note For Medium Density devices, the device ID is 0x410
+  * @note For High Density devices, the device ID is 0x414
+  * @note For XL Density devices, the device ID is 0x430
+  * @note For Connectivity Line devices, the device ID is 0x418
+  * @rmtoll DBGMCU_IDCODE DEV_ID        LL_DBGMCU_GetDeviceID
+  * @retval Values between Min_Data=0x00 and Max_Data=0xFFF
+  */
+__STATIC_INLINE uint32_t LL_DBGMCU_GetDeviceID(void)
+{
+  return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_DEV_ID));
+}
+
+/**
+  * @brief  Return the device revision identifier
+  * @note This field indicates the revision of the device.
+          For example, it is read as revA -> 0x1000,for Low Density devices
+          For example, it is read as revA -> 0x0000, revB -> 0x2000, revZ -> 0x2001, rev1,2,3,X or Y -> 0x2003,for Medium Density devices
+          For example, it is read as revA or 1 -> 0x1000, revZ -> 0x1001,rev1,2,3,X or Y -> 0x1003,for Medium Density devices
+          For example, it is read as revA or 1 -> 0x1003,for XL Density devices
+          For example, it is read as revA -> 0x1000, revZ -> 0x1001 for  Connectivity line devices
+  * @rmtoll DBGMCU_IDCODE REV_ID        LL_DBGMCU_GetRevisionID
+  * @retval Values between Min_Data=0x00 and Max_Data=0xFFFF
+  */
+__STATIC_INLINE uint32_t LL_DBGMCU_GetRevisionID(void)
+{
+  return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_REV_ID) >> DBGMCU_IDCODE_REV_ID_Pos);
+}
+
+/**
+  * @brief  Enable the Debug Module during SLEEP mode
+  * @rmtoll DBGMCU_CR    DBG_SLEEP     LL_DBGMCU_EnableDBGSleepMode
+  * @retval None
+  */
+__STATIC_INLINE void LL_DBGMCU_EnableDBGSleepMode(void)
+{
+  SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
+}
+
+/**
+  * @brief  Disable the Debug Module during SLEEP mode
+  * @rmtoll DBGMCU_CR    DBG_SLEEP     LL_DBGMCU_DisableDBGSleepMode
+  * @retval None
+  */
+__STATIC_INLINE void LL_DBGMCU_DisableDBGSleepMode(void)
+{
+  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
+}
+
+/**
+  * @brief  Enable the Debug Module during STOP mode
+  * @rmtoll DBGMCU_CR    DBG_STOP      LL_DBGMCU_EnableDBGStopMode
+  * @retval None
+  */
+__STATIC_INLINE void LL_DBGMCU_EnableDBGStopMode(void)
+{
+  SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
+}
+
+/**
+  * @brief  Disable the Debug Module during STOP mode
+  * @rmtoll DBGMCU_CR    DBG_STOP      LL_DBGMCU_DisableDBGStopMode
+  * @retval None
+  */
+__STATIC_INLINE void LL_DBGMCU_DisableDBGStopMode(void)
+{
+  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
+}
+
+/**
+  * @brief  Enable the Debug Module during STANDBY mode
+  * @rmtoll DBGMCU_CR    DBG_STANDBY   LL_DBGMCU_EnableDBGStandbyMode
+  * @retval None
+  */
+__STATIC_INLINE void LL_DBGMCU_EnableDBGStandbyMode(void)
+{
+  SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
+}
+
+/**
+  * @brief  Disable the Debug Module during STANDBY mode
+  * @rmtoll DBGMCU_CR    DBG_STANDBY   LL_DBGMCU_DisableDBGStandbyMode
+  * @retval None
+  */
+__STATIC_INLINE void LL_DBGMCU_DisableDBGStandbyMode(void)
+{
+  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
+}
+
+/**
+  * @brief  Set Trace pin assignment control
+  * @rmtoll DBGMCU_CR    TRACE_IOEN    LL_DBGMCU_SetTracePinAssignment\n
+  *         DBGMCU_CR    TRACE_MODE    LL_DBGMCU_SetTracePinAssignment
+  * @param  PinAssignment This parameter can be one of the following values:
+  *         @arg @ref LL_DBGMCU_TRACE_NONE
+  *         @arg @ref LL_DBGMCU_TRACE_ASYNCH
+  *         @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE1
+  *         @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE2
+  *         @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE4
+  * @retval None
+  */
+__STATIC_INLINE void LL_DBGMCU_SetTracePinAssignment(uint32_t PinAssignment)
+{
+  MODIFY_REG(DBGMCU->CR, DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE, PinAssignment);
+}
+
+/**
+  * @brief  Get Trace pin assignment control
+  * @rmtoll DBGMCU_CR    TRACE_IOEN    LL_DBGMCU_GetTracePinAssignment\n
+  *         DBGMCU_CR    TRACE_MODE    LL_DBGMCU_GetTracePinAssignment
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_DBGMCU_TRACE_NONE
+  *         @arg @ref LL_DBGMCU_TRACE_ASYNCH
+  *         @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE1
+  *         @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE2
+  *         @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE4
+  */
+__STATIC_INLINE uint32_t LL_DBGMCU_GetTracePinAssignment(void)
+{
+  return (uint32_t)(READ_BIT(DBGMCU->CR, DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE));
+}
+
+/**
+  * @brief  Freeze APB1 peripherals (group1 peripherals)
+  * @rmtoll DBGMCU_CR_APB1      DBG_TIM2_STOP           LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM3_STOP           LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM4_STOP           LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM5_STOP           LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM6_STOP           LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM7_STOP           LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM12_STOP          LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM13_STOP          LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM14_STOP          LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_RTC_STOP            LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_WWDG_STOP           LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_IWDG_STOP           LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_I2C1_SMBUS_TIMEOUT  LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_I2C2_SMBUS_TIMEOUT  LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_CAN1_STOP           LL_DBGMCU_APB1_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_CAN2_STOP           LL_DBGMCU_APB1_GRP1_FreezePeriph
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM4_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM5_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM12_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM13_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM14_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_CAN1_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_CAN2_STOP (*)
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+  */
+__STATIC_INLINE void LL_DBGMCU_APB1_GRP1_FreezePeriph(uint32_t Periphs)
+{
+  SET_BIT(DBGMCU->CR, Periphs);
+}
+
+/**
+  * @brief  Unfreeze APB1 peripherals (group1 peripherals)
+  * @rmtoll DBGMCU_CR_APB1      DBG_TIM2_STOP           LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM3_STOP           LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM4_STOP           LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM5_STOP           LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM6_STOP           LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM7_STOP           LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM12_STOP          LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM13_STOP          LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_TIM14_STOP          LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_RTC_STOP            LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_WWDG_STOP           LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_IWDG_STOP           LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_I2C1_SMBUS_TIMEOUT  LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_I2C2_SMBUS_TIMEOUT  LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_CAN1_STOP           LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
+  *         DBGMCU_CR_APB1      DBG_CAN2_STOP           LL_DBGMCU_APB1_GRP1_UnFreezePeriph
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM4_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM5_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM12_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM13_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_TIM14_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_CAN1_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB1_GRP1_CAN2_STOP (*)
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+  */
+__STATIC_INLINE void LL_DBGMCU_APB1_GRP1_UnFreezePeriph(uint32_t Periphs)
+{
+  CLEAR_BIT(DBGMCU->CR, Periphs);
+}
+
+/**
+  * @brief  Freeze APB2 peripherals
+  * @rmtoll DBGMCU_CR_APB2      DBG_TIM1_STOP    LL_DBGMCU_APB2_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB2      DBG_TIM8_STOP    LL_DBGMCU_APB2_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB2      DBG_TIM9_STOP    LL_DBGMCU_APB2_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB2      DBG_TIM10_STOP   LL_DBGMCU_APB2_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB2      DBG_TIM11_STOP   LL_DBGMCU_APB2_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB2      DBG_TIM15_STOP   LL_DBGMCU_APB2_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB2      DBG_TIM16_STOP   LL_DBGMCU_APB2_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB2      DBG_TIM17_STOP   LL_DBGMCU_APB2_GRP1_FreezePeriph
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM1_STOP
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM8_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM9_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM10_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM11_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM15_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM16_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM17_STOP (*)
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+  */
+__STATIC_INLINE void LL_DBGMCU_APB2_GRP1_FreezePeriph(uint32_t Periphs)
+{
+  SET_BIT(DBGMCU->CR, Periphs);
+}
+
+/**
+  * @brief  Unfreeze APB2 peripherals
+  * @rmtoll DBGMCU_CR_APB2      DBG_TIM1_STOP    LL_DBGMCU_APB2_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB2      DBG_TIM8_STOP    LL_DBGMCU_APB2_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB2      DBG_TIM9_STOP    LL_DBGMCU_APB2_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB2      DBG_TIM10_STOP   LL_DBGMCU_APB2_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB2      DBG_TIM11_STOP   LL_DBGMCU_APB2_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB2      DBG_TIM15_STOP   LL_DBGMCU_APB2_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB2      DBG_TIM16_STOP   LL_DBGMCU_APB2_GRP1_FreezePeriph\n
+  *         DBGMCU_CR_APB2      DBG_TIM17_STOP   LL_DBGMCU_APB2_GRP1_FreezePeriph
+  * @param  Periphs This parameter can be a combination of the following values:
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM1_STOP
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM8_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM9_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM10_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM11_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM15_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM16_STOP (*)
+  *         @arg @ref LL_DBGMCU_APB2_GRP1_TIM17_STOP (*)
+  *
+  *         (*) value not defined in all devices.
+  * @retval None
+  */
+__STATIC_INLINE void LL_DBGMCU_APB2_GRP1_UnFreezePeriph(uint32_t Periphs)
+{
+  CLEAR_BIT(DBGMCU->CR, Periphs);
+}
+/**
+  * @}
+  */
+
+#if defined(FLASH_ACR_LATENCY)
+/** @defgroup SYSTEM_LL_EF_FLASH FLASH
+  * @{
+  */
+
+/**
+  * @brief  Set FLASH Latency
+  * @rmtoll FLASH_ACR    LATENCY       LL_FLASH_SetLatency
+  * @param  Latency This parameter can be one of the following values:
+  *         @arg @ref LL_FLASH_LATENCY_0
+  *         @arg @ref LL_FLASH_LATENCY_1
+  *         @arg @ref LL_FLASH_LATENCY_2
+  * @retval None
+  */
+__STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency)
+{
+  MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency);
+}
+
+/**
+  * @brief  Get FLASH Latency
+  * @rmtoll FLASH_ACR    LATENCY       LL_FLASH_GetLatency
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_FLASH_LATENCY_0
+  *         @arg @ref LL_FLASH_LATENCY_1
+  *         @arg @ref LL_FLASH_LATENCY_2
+  */
+__STATIC_INLINE uint32_t LL_FLASH_GetLatency(void)
+{
+  return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY));
+}
+
+/**
+  * @brief  Enable Prefetch
+  * @rmtoll FLASH_ACR    PRFTBE        LL_FLASH_EnablePrefetch
+  * @retval None
+  */
+__STATIC_INLINE void LL_FLASH_EnablePrefetch(void)
+{
+  SET_BIT(FLASH->ACR, FLASH_ACR_PRFTBE);
+}
+
+/**
+  * @brief  Disable Prefetch
+  * @rmtoll FLASH_ACR    PRFTBE        LL_FLASH_DisablePrefetch
+  * @retval None
+  */
+__STATIC_INLINE void LL_FLASH_DisablePrefetch(void)
+{
+  CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTBE);
+}
+
+/**
+  * @brief  Check if Prefetch buffer is enabled
+  * @rmtoll FLASH_ACR    PRFTBS        LL_FLASH_IsPrefetchEnabled
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_FLASH_IsPrefetchEnabled(void)
+{
+  return (READ_BIT(FLASH->ACR, FLASH_ACR_PRFTBS) == (FLASH_ACR_PRFTBS));
+}
+
+#endif /* FLASH_ACR_LATENCY */
+/**
+  * @brief  Enable Flash Half Cycle Access
+  * @rmtoll FLASH_ACR    HLFCYA        LL_FLASH_EnableHalfCycleAccess
+  * @retval None
+  */
+__STATIC_INLINE void LL_FLASH_EnableHalfCycleAccess(void)
+{
+  SET_BIT(FLASH->ACR, FLASH_ACR_HLFCYA);
+}
+
+/**
+  * @brief  Disable Flash Half Cycle Access
+  * @rmtoll FLASH_ACR    HLFCYA        LL_FLASH_DisableHalfCycleAccess
+  * @retval None
+  */
+__STATIC_INLINE void LL_FLASH_DisableHalfCycleAccess(void)
+{
+  CLEAR_BIT(FLASH->ACR, FLASH_ACR_HLFCYA);
+}
+
+/**
+  * @brief  Check if  Flash Half Cycle Access is enabled or not
+  * @rmtoll FLASH_ACR    HLFCYA        LL_FLASH_IsHalfCycleAccessEnabled
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_FLASH_IsHalfCycleAccessEnabled(void)
+{
+  return (READ_BIT(FLASH->ACR, FLASH_ACR_HLFCYA) == (FLASH_ACR_HLFCYA));
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* defined (FLASH) || defined (DBGMCU) */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F1xx_LL_SYSTEM_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h
new file mode 100644
index 0000000..8f8346d
--- /dev/null
+++ b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h
@@ -0,0 +1,3904 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_ll_tim.h
+  * @author  MCD Application Team
+  * @brief   Header file of TIM LL module.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_LL_TIM_H
+#define __STM32F1xx_LL_TIM_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx.h"
+
+/** @addtogroup STM32F1xx_LL_Driver
+  * @{
+  */
+
+#if defined (TIM1) || defined (TIM2) || defined (TIM3) || defined (TIM4) || defined (TIM5) || defined (TIM6) || defined (TIM7) || defined (TIM8) || defined (TIM9) || defined (TIM10) || defined (TIM11) || defined (TIM12) || defined (TIM13) || defined (TIM14) || defined (TIM15) || defined (TIM16) || defined (TIM17)
+
+/** @defgroup TIM_LL TIM
+  * @{
+  */
+
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/** @defgroup TIM_LL_Private_Variables TIM Private Variables
+  * @{
+  */
+static const uint8_t OFFSET_TAB_CCMRx[] =
+{
+  0x00U,   /* 0: TIMx_CH1  */
+  0x00U,   /* 1: TIMx_CH1N */
+  0x00U,   /* 2: TIMx_CH2  */
+  0x00U,   /* 3: TIMx_CH2N */
+  0x04U,   /* 4: TIMx_CH3  */
+  0x04U,   /* 5: TIMx_CH3N */
+  0x04U    /* 6: TIMx_CH4  */
+};
+
+static const uint8_t SHIFT_TAB_OCxx[] =
+{
+  0U,            /* 0: OC1M, OC1FE, OC1PE */
+  0U,            /* 1: - NA */
+  8U,            /* 2: OC2M, OC2FE, OC2PE */
+  0U,            /* 3: - NA */
+  0U,            /* 4: OC3M, OC3FE, OC3PE */
+  0U,            /* 5: - NA */
+  8U             /* 6: OC4M, OC4FE, OC4PE */
+};
+
+static const uint8_t SHIFT_TAB_ICxx[] =
+{
+  0U,            /* 0: CC1S, IC1PSC, IC1F */
+  0U,            /* 1: - NA */
+  8U,            /* 2: CC2S, IC2PSC, IC2F */
+  0U,            /* 3: - NA */
+  0U,            /* 4: CC3S, IC3PSC, IC3F */
+  0U,            /* 5: - NA */
+  8U             /* 6: CC4S, IC4PSC, IC4F */
+};
+
+static const uint8_t SHIFT_TAB_CCxP[] =
+{
+  0U,            /* 0: CC1P */
+  2U,            /* 1: CC1NP */
+  4U,            /* 2: CC2P */
+  6U,            /* 3: CC2NP */
+  8U,            /* 4: CC3P */
+  10U,           /* 5: CC3NP */
+  12U            /* 6: CC4P */
+};
+
+static const uint8_t SHIFT_TAB_OISx[] =
+{
+  0U,            /* 0: OIS1 */
+  1U,            /* 1: OIS1N */
+  2U,            /* 2: OIS2 */
+  3U,            /* 3: OIS2N */
+  4U,            /* 4: OIS3 */
+  5U,            /* 5: OIS3N */
+  6U             /* 6: OIS4 */
+};
+/**
+  * @}
+  */
+
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup TIM_LL_Private_Constants TIM Private Constants
+  * @{
+  */
+
+
+
+/* Mask used to set the TDG[x:0] of the DTG bits of the TIMx_BDTR register */
+#define DT_DELAY_1 ((uint8_t)0x7F)
+#define DT_DELAY_2 ((uint8_t)0x3F)
+#define DT_DELAY_3 ((uint8_t)0x1F)
+#define DT_DELAY_4 ((uint8_t)0x1F)
+
+/* Mask used to set the DTG[7:5] bits of the DTG bits of the TIMx_BDTR register */
+#define DT_RANGE_1 ((uint8_t)0x00)
+#define DT_RANGE_2 ((uint8_t)0x80)
+#define DT_RANGE_3 ((uint8_t)0xC0)
+#define DT_RANGE_4 ((uint8_t)0xE0)
+
+
+/**
+  * @}
+  */
+
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup TIM_LL_Private_Macros TIM Private Macros
+  * @{
+  */
+/** @brief  Convert channel id into channel index.
+  * @param  __CHANNEL__ This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH1N
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH2N
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH3N
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval none
+  */
+#define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \
+  (((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\
+   ((__CHANNEL__) == LL_TIM_CHANNEL_CH1N) ? 1U :\
+   ((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\
+   ((__CHANNEL__) == LL_TIM_CHANNEL_CH2N) ? 3U :\
+   ((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U :\
+   ((__CHANNEL__) == LL_TIM_CHANNEL_CH3N) ? 5U : 6U)
+
+/** @brief  Calculate the deadtime sampling period(in ps).
+  * @param  __TIMCLK__ timer input clock frequency (in Hz).
+  * @param  __CKD__ This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV1
+  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV2
+  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV4
+  * @retval none
+  */
+#define TIM_CALC_DTS(__TIMCLK__, __CKD__)                                                        \
+  (((__CKD__) == LL_TIM_CLOCKDIVISION_DIV1) ? ((uint64_t)1000000000000U/(__TIMCLK__))         : \
+   ((__CKD__) == LL_TIM_CLOCKDIVISION_DIV2) ? ((uint64_t)1000000000000U/((__TIMCLK__) >> 1U)) : \
+   ((uint64_t)1000000000000U/((__TIMCLK__) >> 2U)))
+/**
+  * @}
+  */
+
+
+/* Exported types ------------------------------------------------------------*/
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup TIM_LL_ES_INIT TIM Exported Init structure
+  * @{
+  */
+
+/**
+  * @brief  TIM Time Base configuration structure definition.
+  */
+typedef struct
+{
+  uint16_t Prescaler;         /*!< Specifies the prescaler value used to divide the TIM clock.
+                                   This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
+
+                                   This feature can be modified afterwards using unitary function
+                                   @ref LL_TIM_SetPrescaler().*/
+
+  uint32_t CounterMode;       /*!< Specifies the counter mode.
+                                   This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE.
+
+                                   This feature can be modified afterwards using unitary function
+                                   @ref LL_TIM_SetCounterMode().*/
+
+  uint32_t Autoreload;        /*!< Specifies the auto reload value to be loaded into the active
+                                   Auto-Reload Register at the next update event.
+                                   This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
+                                   Some timer instances may support 32 bits counters. In that case this parameter must
+                                   be a number between 0x0000 and 0xFFFFFFFF.
+
+                                   This feature can be modified afterwards using unitary function
+                                   @ref LL_TIM_SetAutoReload().*/
+
+  uint32_t ClockDivision;     /*!< Specifies the clock division.
+                                   This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION.
+
+                                   This feature can be modified afterwards using unitary function
+                                   @ref LL_TIM_SetClockDivision().*/
+
+  uint32_t RepetitionCounter;  /*!< Specifies the repetition counter value. Each time the RCR downcounter
+                                   reaches zero, an update event is generated and counting restarts
+                                   from the RCR value (N).
+                                   This means in PWM mode that (N+1) corresponds to:
+                                      - the number of PWM periods in edge-aligned mode
+                                      - the number of half PWM period in center-aligned mode
+                                   GP timers: this parameter must be a number between Min_Data = 0x00 and
+                                   Max_Data = 0xFF.
+                                   Advanced timers: this parameter must be a number between Min_Data = 0x0000 and
+                                   Max_Data = 0xFFFF.
+
+                                   This feature can be modified afterwards using unitary function
+                                   @ref LL_TIM_SetRepetitionCounter().*/
+} LL_TIM_InitTypeDef;
+
+/**
+  * @brief  TIM Output Compare configuration structure definition.
+  */
+typedef struct
+{
+  uint32_t OCMode;        /*!< Specifies the output mode.
+                               This parameter can be a value of @ref TIM_LL_EC_OCMODE.
+
+                               This feature can be modified afterwards using unitary function
+                               @ref LL_TIM_OC_SetMode().*/
+
+  uint32_t OCState;       /*!< Specifies the TIM Output Compare state.
+                               This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
+
+                               This feature can be modified afterwards using unitary functions
+                               @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
+
+  uint32_t OCNState;      /*!< Specifies the TIM complementary Output Compare state.
+                               This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
+
+                               This feature can be modified afterwards using unitary functions
+                               @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
+
+  uint32_t CompareValue;  /*!< Specifies the Compare value to be loaded into the Capture Compare Register.
+                               This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
+
+                               This feature can be modified afterwards using unitary function
+                               LL_TIM_OC_SetCompareCHx (x=1..6).*/
+
+  uint32_t OCPolarity;    /*!< Specifies the output polarity.
+                               This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
+
+                               This feature can be modified afterwards using unitary function
+                               @ref LL_TIM_OC_SetPolarity().*/
+
+  uint32_t OCNPolarity;   /*!< Specifies the complementary output polarity.
+                               This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
+
+                               This feature can be modified afterwards using unitary function
+                               @ref LL_TIM_OC_SetPolarity().*/
+
+
+  uint32_t OCIdleState;   /*!< Specifies the TIM Output Compare pin state during Idle state.
+                               This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
+
+                               This feature can be modified afterwards using unitary function
+                               @ref LL_TIM_OC_SetIdleState().*/
+
+  uint32_t OCNIdleState;  /*!< Specifies the TIM Output Compare pin state during Idle state.
+                               This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
+
+                               This feature can be modified afterwards using unitary function
+                               @ref LL_TIM_OC_SetIdleState().*/
+} LL_TIM_OC_InitTypeDef;
+
+/**
+  * @brief  TIM Input Capture configuration structure definition.
+  */
+
+typedef struct
+{
+
+  uint32_t ICPolarity;    /*!< Specifies the active edge of the input signal.
+                               This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
+
+                               This feature can be modified afterwards using unitary function
+                               @ref LL_TIM_IC_SetPolarity().*/
+
+  uint32_t ICActiveInput; /*!< Specifies the input.
+                               This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
+
+                               This feature can be modified afterwards using unitary function
+                               @ref LL_TIM_IC_SetActiveInput().*/
+
+  uint32_t ICPrescaler;   /*!< Specifies the Input Capture Prescaler.
+                               This parameter can be a value of @ref TIM_LL_EC_ICPSC.
+
+                               This feature can be modified afterwards using unitary function
+                               @ref LL_TIM_IC_SetPrescaler().*/
+
+  uint32_t ICFilter;      /*!< Specifies the input capture filter.
+                               This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
+
+                               This feature can be modified afterwards using unitary function
+                               @ref LL_TIM_IC_SetFilter().*/
+} LL_TIM_IC_InitTypeDef;
+
+
+/**
+  * @brief  TIM Encoder interface configuration structure definition.
+  */
+typedef struct
+{
+  uint32_t EncoderMode;     /*!< Specifies the encoder resolution (x2 or x4).
+                                 This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE.
+
+                                 This feature can be modified afterwards using unitary function
+                                 @ref LL_TIM_SetEncoderMode().*/
+
+  uint32_t IC1Polarity;     /*!< Specifies the active edge of TI1 input.
+                                 This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
+
+                                 This feature can be modified afterwards using unitary function
+                                 @ref LL_TIM_IC_SetPolarity().*/
+
+  uint32_t IC1ActiveInput;  /*!< Specifies the TI1 input source
+                                 This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
+
+                                 This feature can be modified afterwards using unitary function
+                                 @ref LL_TIM_IC_SetActiveInput().*/
+
+  uint32_t IC1Prescaler;    /*!< Specifies the TI1 input prescaler value.
+                                 This parameter can be a value of @ref TIM_LL_EC_ICPSC.
+
+                                 This feature can be modified afterwards using unitary function
+                                 @ref LL_TIM_IC_SetPrescaler().*/
+
+  uint32_t IC1Filter;       /*!< Specifies the TI1 input filter.
+                                 This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
+
+                                 This feature can be modified afterwards using unitary function
+                                 @ref LL_TIM_IC_SetFilter().*/
+
+  uint32_t IC2Polarity;      /*!< Specifies the active edge of TI2 input.
+                                 This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
+
+                                 This feature can be modified afterwards using unitary function
+                                 @ref LL_TIM_IC_SetPolarity().*/
+
+  uint32_t IC2ActiveInput;  /*!< Specifies the TI2 input source
+                                 This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
+
+                                 This feature can be modified afterwards using unitary function
+                                 @ref LL_TIM_IC_SetActiveInput().*/
+
+  uint32_t IC2Prescaler;    /*!< Specifies the TI2 input prescaler value.
+                                 This parameter can be a value of @ref TIM_LL_EC_ICPSC.
+
+                                 This feature can be modified afterwards using unitary function
+                                 @ref LL_TIM_IC_SetPrescaler().*/
+
+  uint32_t IC2Filter;       /*!< Specifies the TI2 input filter.
+                                 This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
+
+                                 This feature can be modified afterwards using unitary function
+                                 @ref LL_TIM_IC_SetFilter().*/
+
+} LL_TIM_ENCODER_InitTypeDef;
+
+/**
+  * @brief  TIM Hall sensor interface configuration structure definition.
+  */
+typedef struct
+{
+
+  uint32_t IC1Polarity;        /*!< Specifies the active edge of TI1 input.
+                                    This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
+
+                                    This feature can be modified afterwards using unitary function
+                                    @ref LL_TIM_IC_SetPolarity().*/
+
+  uint32_t IC1Prescaler;       /*!< Specifies the TI1 input prescaler value.
+                                    Prescaler must be set to get a maximum counter period longer than the
+                                    time interval between 2 consecutive changes on the Hall inputs.
+                                    This parameter can be a value of @ref TIM_LL_EC_ICPSC.
+
+                                    This feature can be modified afterwards using unitary function
+                                    @ref LL_TIM_IC_SetPrescaler().*/
+
+  uint32_t IC1Filter;          /*!< Specifies the TI1 input filter.
+                                    This parameter can be a value of
+                                    @ref TIM_LL_EC_IC_FILTER.
+
+                                    This feature can be modified afterwards using unitary function
+                                    @ref LL_TIM_IC_SetFilter().*/
+
+  uint32_t CommutationDelay;   /*!< Specifies the compare value to be loaded into the Capture Compare Register.
+                                    A positive pulse (TRGO event) is generated with a programmable delay every time
+                                    a change occurs on the Hall inputs.
+                                    This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
+
+                                    This feature can be modified afterwards using unitary function
+                                    @ref LL_TIM_OC_SetCompareCH2().*/
+} LL_TIM_HALLSENSOR_InitTypeDef;
+
+/**
+  * @brief  BDTR (Break and Dead Time) structure definition
+  */
+typedef struct
+{
+  uint32_t OSSRState;            /*!< Specifies the Off-State selection used in Run mode.
+                                      This parameter can be a value of @ref TIM_LL_EC_OSSR
+
+                                      This feature can be modified afterwards using unitary function
+                                      @ref LL_TIM_SetOffStates()
+
+                                      @note This bit-field cannot be modified as long as LOCK level 2 has been
+                                       programmed. */
+
+  uint32_t OSSIState;            /*!< Specifies the Off-State used in Idle state.
+                                      This parameter can be a value of @ref TIM_LL_EC_OSSI
+
+                                      This feature can be modified afterwards using unitary function
+                                      @ref LL_TIM_SetOffStates()
+
+                                      @note This bit-field cannot be modified as long as LOCK level 2 has been
+                                      programmed. */
+
+  uint32_t LockLevel;            /*!< Specifies the LOCK level parameters.
+                                      This parameter can be a value of @ref TIM_LL_EC_LOCKLEVEL
+
+                                      @note The LOCK bits can be written only once after the reset. Once the TIMx_BDTR
+                                      register has been written, their content is frozen until the next reset.*/
+
+  uint8_t DeadTime;              /*!< Specifies the delay time between the switching-off and the
+                                      switching-on of the outputs.
+                                      This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF.
+
+                                      This feature can be modified afterwards using unitary function
+                                      @ref LL_TIM_OC_SetDeadTime()
+
+                                      @note This bit-field can not be modified as long as LOCK level 1, 2 or 3 has been
+                                       programmed. */
+
+  uint16_t BreakState;           /*!< Specifies whether the TIM Break input is enabled or not.
+                                      This parameter can be a value of @ref TIM_LL_EC_BREAK_ENABLE
+
+                                      This feature can be modified afterwards using unitary functions
+                                      @ref LL_TIM_EnableBRK() or @ref LL_TIM_DisableBRK()
+
+                                      @note This bit-field can not be modified as long as LOCK level 1 has been
+                                      programmed. */
+
+  uint32_t BreakPolarity;        /*!< Specifies the TIM Break Input pin polarity.
+                                      This parameter can be a value of @ref TIM_LL_EC_BREAK_POLARITY
+
+                                      This feature can be modified afterwards using unitary function
+                                      @ref LL_TIM_ConfigBRK()
+
+                                      @note This bit-field can not be modified as long as LOCK level 1 has been
+                                      programmed. */
+
+  uint32_t AutomaticOutput;      /*!< Specifies whether the TIM Automatic Output feature is enabled or not.
+                                      This parameter can be a value of @ref TIM_LL_EC_AUTOMATICOUTPUT_ENABLE
+
+                                      This feature can be modified afterwards using unitary functions
+                                      @ref LL_TIM_EnableAutomaticOutput() or @ref LL_TIM_DisableAutomaticOutput()
+
+                                      @note This bit-field can not be modified as long as LOCK level 1 has been
+                                      programmed. */
+} LL_TIM_BDTR_InitTypeDef;
+
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup TIM_LL_Exported_Constants TIM Exported Constants
+  * @{
+  */
+
+/** @defgroup TIM_LL_EC_GET_FLAG Get Flags Defines
+  * @brief    Flags defines which can be used with LL_TIM_ReadReg function.
+  * @{
+  */
+#define LL_TIM_SR_UIF                          TIM_SR_UIF           /*!< Update interrupt flag */
+#define LL_TIM_SR_CC1IF                        TIM_SR_CC1IF         /*!< Capture/compare 1 interrupt flag */
+#define LL_TIM_SR_CC2IF                        TIM_SR_CC2IF         /*!< Capture/compare 2 interrupt flag */
+#define LL_TIM_SR_CC3IF                        TIM_SR_CC3IF         /*!< Capture/compare 3 interrupt flag */
+#define LL_TIM_SR_CC4IF                        TIM_SR_CC4IF         /*!< Capture/compare 4 interrupt flag */
+#define LL_TIM_SR_COMIF                        TIM_SR_COMIF         /*!< COM interrupt flag */
+#define LL_TIM_SR_TIF                          TIM_SR_TIF           /*!< Trigger interrupt flag */
+#define LL_TIM_SR_BIF                          TIM_SR_BIF           /*!< Break interrupt flag */
+#define LL_TIM_SR_CC1OF                        TIM_SR_CC1OF         /*!< Capture/Compare 1 overcapture flag */
+#define LL_TIM_SR_CC2OF                        TIM_SR_CC2OF         /*!< Capture/Compare 2 overcapture flag */
+#define LL_TIM_SR_CC3OF                        TIM_SR_CC3OF         /*!< Capture/Compare 3 overcapture flag */
+#define LL_TIM_SR_CC4OF                        TIM_SR_CC4OF         /*!< Capture/Compare 4 overcapture flag */
+/**
+  * @}
+  */
+
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup TIM_LL_EC_BREAK_ENABLE Break Enable
+  * @{
+  */
+#define LL_TIM_BREAK_DISABLE            0x00000000U             /*!< Break function disabled */
+#define LL_TIM_BREAK_ENABLE             TIM_BDTR_BKE            /*!< Break function enabled */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_AUTOMATICOUTPUT_ENABLE Automatic output enable
+  * @{
+  */
+#define LL_TIM_AUTOMATICOUTPUT_DISABLE         0x00000000U             /*!< MOE can be set only by software */
+#define LL_TIM_AUTOMATICOUTPUT_ENABLE          TIM_BDTR_AOE            /*!< MOE can be set by software or automatically at the next update event */
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/** @defgroup TIM_LL_EC_IT IT Defines
+  * @brief    IT defines which can be used with LL_TIM_ReadReg and  LL_TIM_WriteReg functions.
+  * @{
+  */
+#define LL_TIM_DIER_UIE                        TIM_DIER_UIE         /*!< Update interrupt enable */
+#define LL_TIM_DIER_CC1IE                      TIM_DIER_CC1IE       /*!< Capture/compare 1 interrupt enable */
+#define LL_TIM_DIER_CC2IE                      TIM_DIER_CC2IE       /*!< Capture/compare 2 interrupt enable */
+#define LL_TIM_DIER_CC3IE                      TIM_DIER_CC3IE       /*!< Capture/compare 3 interrupt enable */
+#define LL_TIM_DIER_CC4IE                      TIM_DIER_CC4IE       /*!< Capture/compare 4 interrupt enable */
+#define LL_TIM_DIER_COMIE                      TIM_DIER_COMIE       /*!< COM interrupt enable */
+#define LL_TIM_DIER_TIE                        TIM_DIER_TIE         /*!< Trigger interrupt enable */
+#define LL_TIM_DIER_BIE                        TIM_DIER_BIE         /*!< Break interrupt enable */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_UPDATESOURCE Update Source
+  * @{
+  */
+#define LL_TIM_UPDATESOURCE_REGULAR            0x00000000U          /*!< Counter overflow/underflow, Setting the UG bit or Update generation through the slave mode controller generates an update request */
+#define LL_TIM_UPDATESOURCE_COUNTER            TIM_CR1_URS          /*!< Only counter overflow/underflow generates an update request */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode
+  * @{
+  */
+#define LL_TIM_ONEPULSEMODE_SINGLE             TIM_CR1_OPM          /*!< Counter stops counting at the next update event */
+#define LL_TIM_ONEPULSEMODE_REPETITIVE         0x00000000U          /*!< Counter is not stopped at update event */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode
+  * @{
+  */
+#define LL_TIM_COUNTERMODE_UP                  0x00000000U          /*!<Counter used as upcounter */
+#define LL_TIM_COUNTERMODE_DOWN                TIM_CR1_DIR          /*!< Counter used as downcounter */
+#define LL_TIM_COUNTERMODE_CENTER_DOWN         TIM_CR1_CMS_0        /*!< The counter counts up and down alternatively. Output compare interrupt flags of output channels  are set only when the counter is counting down. */
+#define LL_TIM_COUNTERMODE_CENTER_UP           TIM_CR1_CMS_1        /*!<The counter counts up and down alternatively. Output compare interrupt flags of output channels  are set only when the counter is counting up */
+#define LL_TIM_COUNTERMODE_CENTER_UP_DOWN      TIM_CR1_CMS          /*!< The counter counts up and down alternatively. Output compare interrupt flags of output channels  are set only when the counter is counting up or down. */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_CLOCKDIVISION Clock Division
+  * @{
+  */
+#define LL_TIM_CLOCKDIVISION_DIV1              0x00000000U          /*!< tDTS=tCK_INT */
+#define LL_TIM_CLOCKDIVISION_DIV2              TIM_CR1_CKD_0        /*!< tDTS=2*tCK_INT */
+#define LL_TIM_CLOCKDIVISION_DIV4              TIM_CR1_CKD_1        /*!< tDTS=4*tCK_INT */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_COUNTERDIRECTION Counter Direction
+  * @{
+  */
+#define LL_TIM_COUNTERDIRECTION_UP             0x00000000U          /*!< Timer counter counts up */
+#define LL_TIM_COUNTERDIRECTION_DOWN           TIM_CR1_DIR          /*!< Timer counter counts down */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_CCUPDATESOURCE Capture Compare  Update Source
+  * @{
+  */
+#define LL_TIM_CCUPDATESOURCE_COMG_ONLY        0x00000000U          /*!< Capture/compare control bits are updated by setting the COMG bit only */
+#define LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI    TIM_CR2_CCUS         /*!< Capture/compare control bits are updated by setting the COMG bit or when a rising edge occurs on trigger input (TRGI) */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_CCDMAREQUEST Capture Compare DMA Request
+  * @{
+  */
+#define LL_TIM_CCDMAREQUEST_CC                 0x00000000U          /*!< CCx DMA request sent when CCx event occurs */
+#define LL_TIM_CCDMAREQUEST_UPDATE             TIM_CR2_CCDS         /*!< CCx DMA requests sent when update event occurs */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_LOCKLEVEL Lock Level
+  * @{
+  */
+#define LL_TIM_LOCKLEVEL_OFF                   0x00000000U          /*!< LOCK OFF - No bit is write protected */
+#define LL_TIM_LOCKLEVEL_1                     TIM_BDTR_LOCK_0      /*!< LOCK Level 1 */
+#define LL_TIM_LOCKLEVEL_2                     TIM_BDTR_LOCK_1      /*!< LOCK Level 2 */
+#define LL_TIM_LOCKLEVEL_3                     TIM_BDTR_LOCK        /*!< LOCK Level 3 */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_CHANNEL Channel
+  * @{
+  */
+#define LL_TIM_CHANNEL_CH1                     TIM_CCER_CC1E     /*!< Timer input/output channel 1 */
+#define LL_TIM_CHANNEL_CH1N                    TIM_CCER_CC1NE    /*!< Timer complementary output channel 1 */
+#define LL_TIM_CHANNEL_CH2                     TIM_CCER_CC2E     /*!< Timer input/output channel 2 */
+#define LL_TIM_CHANNEL_CH2N                    TIM_CCER_CC2NE    /*!< Timer complementary output channel 2 */
+#define LL_TIM_CHANNEL_CH3                     TIM_CCER_CC3E     /*!< Timer input/output channel 3 */
+#define LL_TIM_CHANNEL_CH3N                    TIM_CCER_CC3NE    /*!< Timer complementary output channel 3 */
+#define LL_TIM_CHANNEL_CH4                     TIM_CCER_CC4E     /*!< Timer input/output channel 4 */
+/**
+  * @}
+  */
+
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup TIM_LL_EC_OCSTATE Output Configuration State
+  * @{
+  */
+#define LL_TIM_OCSTATE_DISABLE                 0x00000000U             /*!< OCx is not active */
+#define LL_TIM_OCSTATE_ENABLE                  TIM_CCER_CC1E           /*!< OCx signal is output on the corresponding output pin */
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/** @defgroup TIM_LL_EC_OCMODE Output Configuration Mode
+  * @{
+  */
+#define LL_TIM_OCMODE_FROZEN                   0x00000000U                                              /*!<The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the output channel level */
+#define LL_TIM_OCMODE_ACTIVE                   TIM_CCMR1_OC1M_0                                         /*!<OCyREF is forced high on compare match*/
+#define LL_TIM_OCMODE_INACTIVE                 TIM_CCMR1_OC1M_1                                         /*!<OCyREF is forced low on compare match*/
+#define LL_TIM_OCMODE_TOGGLE                   (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)                    /*!<OCyREF toggles on compare match*/
+#define LL_TIM_OCMODE_FORCED_INACTIVE          TIM_CCMR1_OC1M_2                                         /*!<OCyREF is forced low*/
+#define LL_TIM_OCMODE_FORCED_ACTIVE            (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)                    /*!<OCyREF is forced high*/
+#define LL_TIM_OCMODE_PWM1                     (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)                    /*!<In upcounting, channel y is active as long as TIMx_CNT<TIMx_CCRy else inactive.  In downcounting, channel y is inactive as long as TIMx_CNT>TIMx_CCRy else active.*/
+#define LL_TIM_OCMODE_PWM2                     (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) /*!<In upcounting, channel y is inactive as long as TIMx_CNT<TIMx_CCRy else active.  In downcounting, channel y is active as long as TIMx_CNT>TIMx_CCRy else inactive*/
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_OCPOLARITY Output Configuration Polarity
+  * @{
+  */
+#define LL_TIM_OCPOLARITY_HIGH                 0x00000000U                 /*!< OCxactive high*/
+#define LL_TIM_OCPOLARITY_LOW                  TIM_CCER_CC1P               /*!< OCxactive low*/
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_OCIDLESTATE Output Configuration Idle State
+  * @{
+  */
+#define LL_TIM_OCIDLESTATE_LOW                 0x00000000U             /*!<OCx=0 (after a dead-time if OC is implemented) when MOE=0*/
+#define LL_TIM_OCIDLESTATE_HIGH                TIM_CR2_OIS1            /*!<OCx=1 (after a dead-time if OC is implemented) when MOE=0*/
+/**
+  * @}
+  */
+
+
+/** @defgroup TIM_LL_EC_ACTIVEINPUT Active Input Selection
+  * @{
+  */
+#define LL_TIM_ACTIVEINPUT_DIRECTTI            (TIM_CCMR1_CC1S_0 << 16U) /*!< ICx is mapped on TIx */
+#define LL_TIM_ACTIVEINPUT_INDIRECTTI          (TIM_CCMR1_CC1S_1 << 16U) /*!< ICx is mapped on TIy */
+#define LL_TIM_ACTIVEINPUT_TRC                 (TIM_CCMR1_CC1S << 16U)   /*!< ICx is mapped on TRC */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_ICPSC Input Configuration Prescaler
+  * @{
+  */
+#define LL_TIM_ICPSC_DIV1                      0x00000000U                    /*!< No prescaler, capture is done each time an edge is detected on the capture input */
+#define LL_TIM_ICPSC_DIV2                      (TIM_CCMR1_IC1PSC_0 << 16U)    /*!< Capture is done once every 2 events */
+#define LL_TIM_ICPSC_DIV4                      (TIM_CCMR1_IC1PSC_1 << 16U)    /*!< Capture is done once every 4 events */
+#define LL_TIM_ICPSC_DIV8                      (TIM_CCMR1_IC1PSC << 16U)      /*!< Capture is done once every 8 events */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_IC_FILTER Input Configuration Filter
+  * @{
+  */
+#define LL_TIM_IC_FILTER_FDIV1                 0x00000000U                                                        /*!< No filter, sampling is done at fDTS */
+#define LL_TIM_IC_FILTER_FDIV1_N2              (TIM_CCMR1_IC1F_0 << 16U)                                          /*!< fSAMPLING=fCK_INT, N=2 */
+#define LL_TIM_IC_FILTER_FDIV1_N4              (TIM_CCMR1_IC1F_1 << 16U)                                          /*!< fSAMPLING=fCK_INT, N=4 */
+#define LL_TIM_IC_FILTER_FDIV1_N8              ((TIM_CCMR1_IC1F_1 | TIM_CCMR1_IC1F_0) << 16U)                     /*!< fSAMPLING=fCK_INT, N=8 */
+#define LL_TIM_IC_FILTER_FDIV2_N6              (TIM_CCMR1_IC1F_2 << 16U)                                          /*!< fSAMPLING=fDTS/2, N=6 */
+#define LL_TIM_IC_FILTER_FDIV2_N8              ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_0) << 16U)                     /*!< fSAMPLING=fDTS/2, N=8 */
+#define LL_TIM_IC_FILTER_FDIV4_N6              ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1) << 16U)                     /*!< fSAMPLING=fDTS/4, N=6 */
+#define LL_TIM_IC_FILTER_FDIV4_N8              ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1 | TIM_CCMR1_IC1F_0) << 16U)  /*!< fSAMPLING=fDTS/4, N=8 */
+#define LL_TIM_IC_FILTER_FDIV8_N6              (TIM_CCMR1_IC1F_3 << 16U)                                          /*!< fSAMPLING=fDTS/8, N=6 */
+#define LL_TIM_IC_FILTER_FDIV8_N8              ((TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC1F_0) << 16U)                     /*!< fSAMPLING=fDTS/8, N=8 */
+#define LL_TIM_IC_FILTER_FDIV16_N5             ((TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC1F_1) << 16U)                     /*!< fSAMPLING=fDTS/16, N=5 */
+#define LL_TIM_IC_FILTER_FDIV16_N6             ((TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC1F_1 | TIM_CCMR1_IC1F_0) << 16U)  /*!< fSAMPLING=fDTS/16, N=6 */
+#define LL_TIM_IC_FILTER_FDIV16_N8             ((TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC1F_2) << 16U)                     /*!< fSAMPLING=fDTS/16, N=8 */
+#define LL_TIM_IC_FILTER_FDIV32_N5             ((TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_0) << 16U)  /*!< fSAMPLING=fDTS/32, N=5 */
+#define LL_TIM_IC_FILTER_FDIV32_N6             ((TIM_CCMR1_IC1F_3 | TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1) << 16U)  /*!< fSAMPLING=fDTS/32, N=6 */
+#define LL_TIM_IC_FILTER_FDIV32_N8             (TIM_CCMR1_IC1F << 16U)                                            /*!< fSAMPLING=fDTS/32, N=8 */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_IC_POLARITY Input Configuration Polarity
+  * @{
+  */
+#define LL_TIM_IC_POLARITY_RISING              0x00000000U                      /*!< The circuit is sensitive to TIxFP1 rising edge, TIxFP1 is not inverted */
+#define LL_TIM_IC_POLARITY_FALLING             TIM_CCER_CC1P                    /*!< The circuit is sensitive to TIxFP1 falling edge, TIxFP1 is inverted */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_CLOCKSOURCE Clock Source
+  * @{
+  */
+#define LL_TIM_CLOCKSOURCE_INTERNAL            0x00000000U                                          /*!< The timer is clocked by the internal clock provided from the RCC */
+#define LL_TIM_CLOCKSOURCE_EXT_MODE1           (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)   /*!< Counter counts at each rising or falling edge on a selected input*/
+#define LL_TIM_CLOCKSOURCE_EXT_MODE2           TIM_SMCR_ECE                                         /*!< Counter counts at each rising or falling edge on the external trigger input ETR */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_ENCODERMODE Encoder Mode
+  * @{
+  */
+#define LL_TIM_ENCODERMODE_X2_TI1                     TIM_SMCR_SMS_0                                                     /*!< Quadrature encoder mode 1, x2 mode - Counter counts up/down on TI1FP1 edge depending on TI2FP2 level */
+#define LL_TIM_ENCODERMODE_X2_TI2                     TIM_SMCR_SMS_1                                                     /*!< Quadrature encoder mode 2, x2 mode - Counter counts up/down on TI2FP2 edge depending on TI1FP1 level */
+#define LL_TIM_ENCODERMODE_X4_TI12                   (TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)                                   /*!< Quadrature encoder mode 3, x4 mode - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_TRGO Trigger Output
+  * @{
+  */
+#define LL_TIM_TRGO_RESET                      0x00000000U                                     /*!< UG bit from the TIMx_EGR register is used as trigger output */
+#define LL_TIM_TRGO_ENABLE                     TIM_CR2_MMS_0                                   /*!< Counter Enable signal (CNT_EN) is used as trigger output */
+#define LL_TIM_TRGO_UPDATE                     TIM_CR2_MMS_1                                   /*!< Update event is used as trigger output */
+#define LL_TIM_TRGO_CC1IF                      (TIM_CR2_MMS_1 | TIM_CR2_MMS_0)                 /*!< CC1 capture or a compare match is used as trigger output */
+#define LL_TIM_TRGO_OC1REF                     TIM_CR2_MMS_2                                   /*!< OC1REF signal is used as trigger output */
+#define LL_TIM_TRGO_OC2REF                     (TIM_CR2_MMS_2 | TIM_CR2_MMS_0)                 /*!< OC2REF signal is used as trigger output */
+#define LL_TIM_TRGO_OC3REF                     (TIM_CR2_MMS_2 | TIM_CR2_MMS_1)                 /*!< OC3REF signal is used as trigger output */
+#define LL_TIM_TRGO_OC4REF                     (TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0) /*!< OC4REF signal is used as trigger output */
+/**
+  * @}
+  */
+
+
+/** @defgroup TIM_LL_EC_SLAVEMODE Slave Mode
+  * @{
+  */
+#define LL_TIM_SLAVEMODE_DISABLED              0x00000000U                         /*!< Slave mode disabled */
+#define LL_TIM_SLAVEMODE_RESET                 TIM_SMCR_SMS_2                      /*!< Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter */
+#define LL_TIM_SLAVEMODE_GATED                 (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0)   /*!< Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high */
+#define LL_TIM_SLAVEMODE_TRIGGER               (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1)   /*!< Trigger Mode - The counter starts at a rising edge of the trigger TRGI */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_TS Trigger Selection
+  * @{
+  */
+#define LL_TIM_TS_ITR0                         0x00000000U                                                     /*!< Internal Trigger 0 (ITR0) is used as trigger input */
+#define LL_TIM_TS_ITR1                         TIM_SMCR_TS_0                                                   /*!< Internal Trigger 1 (ITR1) is used as trigger input */
+#define LL_TIM_TS_ITR2                         TIM_SMCR_TS_1                                                   /*!< Internal Trigger 2 (ITR2) is used as trigger input */
+#define LL_TIM_TS_ITR3                         (TIM_SMCR_TS_0 | TIM_SMCR_TS_1)                                 /*!< Internal Trigger 3 (ITR3) is used as trigger input */
+#define LL_TIM_TS_TI1F_ED                      TIM_SMCR_TS_2                                                   /*!< TI1 Edge Detector (TI1F_ED) is used as trigger input */
+#define LL_TIM_TS_TI1FP1                       (TIM_SMCR_TS_2 | TIM_SMCR_TS_0)                                 /*!< Filtered Timer Input 1 (TI1FP1) is used as trigger input */
+#define LL_TIM_TS_TI2FP2                       (TIM_SMCR_TS_2 | TIM_SMCR_TS_1)                                 /*!< Filtered Timer Input 2 (TI12P2) is used as trigger input */
+#define LL_TIM_TS_ETRF                         (TIM_SMCR_TS_2 | TIM_SMCR_TS_1 | TIM_SMCR_TS_0)                 /*!< Filtered external Trigger (ETRF) is used as trigger input */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_ETR_POLARITY External Trigger Polarity
+  * @{
+  */
+#define LL_TIM_ETR_POLARITY_NONINVERTED        0x00000000U             /*!< ETR is non-inverted, active at high level or rising edge */
+#define LL_TIM_ETR_POLARITY_INVERTED           TIM_SMCR_ETP            /*!< ETR is inverted, active at low level or falling edge */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_ETR_PRESCALER External Trigger Prescaler
+  * @{
+  */
+#define LL_TIM_ETR_PRESCALER_DIV1              0x00000000U             /*!< ETR prescaler OFF */
+#define LL_TIM_ETR_PRESCALER_DIV2              TIM_SMCR_ETPS_0         /*!< ETR frequency is divided by 2 */
+#define LL_TIM_ETR_PRESCALER_DIV4              TIM_SMCR_ETPS_1         /*!< ETR frequency is divided by 4 */
+#define LL_TIM_ETR_PRESCALER_DIV8              TIM_SMCR_ETPS           /*!< ETR frequency is divided by 8 */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_ETR_FILTER External Trigger Filter
+  * @{
+  */
+#define LL_TIM_ETR_FILTER_FDIV1                0x00000000U                                          /*!< No filter, sampling is done at fDTS */
+#define LL_TIM_ETR_FILTER_FDIV1_N2             TIM_SMCR_ETF_0                                       /*!< fSAMPLING=fCK_INT, N=2 */
+#define LL_TIM_ETR_FILTER_FDIV1_N4             TIM_SMCR_ETF_1                                       /*!< fSAMPLING=fCK_INT, N=4 */
+#define LL_TIM_ETR_FILTER_FDIV1_N8             (TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0)                    /*!< fSAMPLING=fCK_INT, N=8 */
+#define LL_TIM_ETR_FILTER_FDIV2_N6             TIM_SMCR_ETF_2                                       /*!< fSAMPLING=fDTS/2, N=6 */
+#define LL_TIM_ETR_FILTER_FDIV2_N8             (TIM_SMCR_ETF_2 | TIM_SMCR_ETF_0)                    /*!< fSAMPLING=fDTS/2, N=8 */
+#define LL_TIM_ETR_FILTER_FDIV4_N6             (TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1)                    /*!< fSAMPLING=fDTS/4, N=6 */
+#define LL_TIM_ETR_FILTER_FDIV4_N8             (TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0)   /*!< fSAMPLING=fDTS/4, N=8 */
+#define LL_TIM_ETR_FILTER_FDIV8_N6             TIM_SMCR_ETF_3                                       /*!< fSAMPLING=fDTS/8, N=8 */
+#define LL_TIM_ETR_FILTER_FDIV8_N8             (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_0)                    /*!< fSAMPLING=fDTS/16, N=5 */
+#define LL_TIM_ETR_FILTER_FDIV16_N5            (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1)                    /*!< fSAMPLING=fDTS/16, N=6 */
+#define LL_TIM_ETR_FILTER_FDIV16_N6            (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0)   /*!< fSAMPLING=fDTS/16, N=8 */
+#define LL_TIM_ETR_FILTER_FDIV16_N8            (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2)                    /*!< fSAMPLING=fDTS/16, N=5 */
+#define LL_TIM_ETR_FILTER_FDIV32_N5            (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 | TIM_SMCR_ETF_0)   /*!< fSAMPLING=fDTS/32, N=5 */
+#define LL_TIM_ETR_FILTER_FDIV32_N6            (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1)   /*!< fSAMPLING=fDTS/32, N=6 */
+#define LL_TIM_ETR_FILTER_FDIV32_N8            TIM_SMCR_ETF                                         /*!< fSAMPLING=fDTS/32, N=8 */
+/**
+  * @}
+  */
+
+
+/** @defgroup TIM_LL_EC_BREAK_POLARITY break polarity
+  * @{
+  */
+#define LL_TIM_BREAK_POLARITY_LOW              0x00000000U               /*!< Break input BRK is active low */
+#define LL_TIM_BREAK_POLARITY_HIGH             TIM_BDTR_BKP              /*!< Break input BRK is active high */
+/**
+  * @}
+  */
+
+
+
+
+/** @defgroup TIM_LL_EC_OSSI OSSI
+  * @{
+  */
+#define LL_TIM_OSSI_DISABLE                    0x00000000U             /*!< When inactive, OCx/OCxN outputs are disabled */
+#define LL_TIM_OSSI_ENABLE                     TIM_BDTR_OSSI           /*!< When inactive, OxC/OCxN outputs are first forced with their inactive level then forced to their idle level after the deadtime */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_OSSR OSSR
+  * @{
+  */
+#define LL_TIM_OSSR_DISABLE                    0x00000000U             /*!< When inactive, OCx/OCxN outputs are disabled */
+#define LL_TIM_OSSR_ENABLE                     TIM_BDTR_OSSR           /*!< When inactive, OC/OCN outputs are enabled with their inactive level as soon as CCxE=1 or CCxNE=1 */
+/**
+  * @}
+  */
+
+
+/** @defgroup TIM_LL_EC_DMABURST_BASEADDR DMA Burst Base Address
+  * @{
+  */
+#define LL_TIM_DMABURST_BASEADDR_CR1           0x00000000U                                                      /*!< TIMx_CR1 register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_CR2           TIM_DCR_DBA_0                                                    /*!< TIMx_CR2 register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_SMCR          TIM_DCR_DBA_1                                                    /*!< TIMx_SMCR register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_DIER          (TIM_DCR_DBA_1 |  TIM_DCR_DBA_0)                                 /*!< TIMx_DIER register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_SR            TIM_DCR_DBA_2                                                    /*!< TIMx_SR register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_EGR           (TIM_DCR_DBA_2 | TIM_DCR_DBA_0)                                  /*!< TIMx_EGR register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_CCMR1         (TIM_DCR_DBA_2 | TIM_DCR_DBA_1)                                  /*!< TIMx_CCMR1 register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_CCMR2         (TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0)                  /*!< TIMx_CCMR2 register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_CCER          TIM_DCR_DBA_3                                                    /*!< TIMx_CCER register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_CNT           (TIM_DCR_DBA_3 | TIM_DCR_DBA_0)                                  /*!< TIMx_CNT register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_PSC           (TIM_DCR_DBA_3 | TIM_DCR_DBA_1)                                  /*!< TIMx_PSC register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_ARR           (TIM_DCR_DBA_3 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0)                  /*!< TIMx_ARR register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_RCR           (TIM_DCR_DBA_3 | TIM_DCR_DBA_2)                                  /*!< TIMx_RCR register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_CCR1          (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0)                  /*!< TIMx_CCR1 register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_CCR2          (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1)                  /*!< TIMx_CCR2 register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_CCR3          (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0)  /*!< TIMx_CCR3 register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_CCR4          TIM_DCR_DBA_4                                                    /*!< TIMx_CCR4 register is the DMA base address for DMA burst */
+#define LL_TIM_DMABURST_BASEADDR_BDTR          (TIM_DCR_DBA_4 | TIM_DCR_DBA_0)                                  /*!< TIMx_BDTR register is the DMA base address for DMA burst */
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EC_DMABURST_LENGTH DMA Burst Length
+  * @{
+  */
+#define LL_TIM_DMABURST_LENGTH_1TRANSFER       0x00000000U                                                     /*!< Transfer is done to 1 register starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_2TRANSFERS      TIM_DCR_DBL_0                                                   /*!< Transfer is done to 2 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_3TRANSFERS      TIM_DCR_DBL_1                                                   /*!< Transfer is done to 3 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_4TRANSFERS      (TIM_DCR_DBL_1 |  TIM_DCR_DBL_0)                                /*!< Transfer is done to 4 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_5TRANSFERS      TIM_DCR_DBL_2                                                   /*!< Transfer is done to 5 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_6TRANSFERS      (TIM_DCR_DBL_2 | TIM_DCR_DBL_0)                                 /*!< Transfer is done to 6 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_7TRANSFERS      (TIM_DCR_DBL_2 | TIM_DCR_DBL_1)                                 /*!< Transfer is done to 7 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_8TRANSFERS      (TIM_DCR_DBL_2 | TIM_DCR_DBL_1 | TIM_DCR_DBL_0)                 /*!< Transfer is done to 1 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_9TRANSFERS      TIM_DCR_DBL_3                                                   /*!< Transfer is done to 9 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_10TRANSFERS     (TIM_DCR_DBL_3 | TIM_DCR_DBL_0)                                 /*!< Transfer is done to 10 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_11TRANSFERS     (TIM_DCR_DBL_3 | TIM_DCR_DBL_1)                                 /*!< Transfer is done to 11 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_12TRANSFERS     (TIM_DCR_DBL_3 | TIM_DCR_DBL_1 | TIM_DCR_DBL_0)                 /*!< Transfer is done to 12 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_13TRANSFERS     (TIM_DCR_DBL_3 | TIM_DCR_DBL_2)                                 /*!< Transfer is done to 13 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_14TRANSFERS     (TIM_DCR_DBL_3 | TIM_DCR_DBL_2 | TIM_DCR_DBL_0)                 /*!< Transfer is done to 14 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_15TRANSFERS     (TIM_DCR_DBL_3 | TIM_DCR_DBL_2 | TIM_DCR_DBL_1)                 /*!< Transfer is done to 15 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_16TRANSFERS     (TIM_DCR_DBL_3 | TIM_DCR_DBL_2 | TIM_DCR_DBL_1 | TIM_DCR_DBL_0) /*!< Transfer is done to 16 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_17TRANSFERS     TIM_DCR_DBL_4                                                   /*!< Transfer is done to 17 registers starting from the DMA burst base address */
+#define LL_TIM_DMABURST_LENGTH_18TRANSFERS     (TIM_DCR_DBL_4 |  TIM_DCR_DBL_0)                                /*!< Transfer is done to 18 registers starting from the DMA burst base address */
+/**
+  * @}
+  */
+
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+/** @defgroup TIM_LL_Exported_Macros TIM Exported Macros
+  * @{
+  */
+
+/** @defgroup TIM_LL_EM_WRITE_READ Common Write and read registers Macros
+  * @{
+  */
+/**
+  * @brief  Write a value in TIM register.
+  * @param  __INSTANCE__ TIM Instance
+  * @param  __REG__ Register to be written
+  * @param  __VALUE__ Value to be written in the register
+  * @retval None
+  */
+#define LL_TIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
+
+/**
+  * @brief  Read a value in TIM register.
+  * @param  __INSTANCE__ TIM Instance
+  * @param  __REG__ Register to be read
+  * @retval Register value
+  */
+#define LL_TIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EM_Exported_Macros Exported_Macros
+  * @{
+  */
+
+/**
+  * @brief  HELPER macro calculating DTG[0:7] in the TIMx_BDTR register to achieve the requested dead time duration.
+  * @note ex: @ref __LL_TIM_CALC_DEADTIME (80000000, @ref LL_TIM_GetClockDivision (), 120);
+  * @param  __TIMCLK__ timer input clock frequency (in Hz)
+  * @param  __CKD__ This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV1
+  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV2
+  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV4
+  * @param  __DT__ deadtime duration (in ns)
+  * @retval DTG[0:7]
+  */
+#define __LL_TIM_CALC_DEADTIME(__TIMCLK__, __CKD__, __DT__)  \
+  ( (((uint64_t)((__DT__)*1000U)) < ((DT_DELAY_1+1U) * TIM_CALC_DTS((__TIMCLK__), (__CKD__))))    ?  \
+    (uint8_t)(((uint64_t)((__DT__)*1000U) / TIM_CALC_DTS((__TIMCLK__), (__CKD__)))  & DT_DELAY_1) :      \
+    (((uint64_t)((__DT__)*1000U)) < ((64U + (DT_DELAY_2+1U)) * 2U * TIM_CALC_DTS((__TIMCLK__), (__CKD__))))  ?  \
+    (uint8_t)(DT_RANGE_2 | ((uint8_t)((uint8_t)((((uint64_t)((__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__),   \
+                                                 (__CKD__))) >> 1U) - (uint8_t) 64) & DT_DELAY_2)) :\
+    (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_3+1U)) * 8U * TIM_CALC_DTS((__TIMCLK__), (__CKD__))))  ?  \
+    (uint8_t)(DT_RANGE_3 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__),  \
+                                                 (__CKD__))) >> 3U) - (uint8_t) 32) & DT_DELAY_3)) :\
+    (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_4+1U)) * 16U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ?  \
+    (uint8_t)(DT_RANGE_4 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__),  \
+                                                 (__CKD__))) >> 4U) - (uint8_t) 32) & DT_DELAY_4)) :\
+    0U)
+
+/**
+  * @brief  HELPER macro calculating the prescaler value to achieve the required counter clock frequency.
+  * @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000);
+  * @param  __TIMCLK__ timer input clock frequency (in Hz)
+  * @param  __CNTCLK__ counter clock frequency (in Hz)
+  * @retval Prescaler value  (between Min_Data=0 and Max_Data=65535)
+  */
+#define __LL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__)   \
+  (((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)(((__TIMCLK__)/(__CNTCLK__)) - 1U) : 0U)
+
+/**
+  * @brief  HELPER macro calculating the auto-reload value to achieve the required output signal frequency.
+  * @note ex: @ref __LL_TIM_CALC_ARR (1000000, @ref LL_TIM_GetPrescaler (), 10000);
+  * @param  __TIMCLK__ timer input clock frequency (in Hz)
+  * @param  __PSC__ prescaler
+  * @param  __FREQ__ output signal frequency (in Hz)
+  * @retval  Auto-reload value  (between Min_Data=0 and Max_Data=65535)
+  */
+#define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \
+  ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U))) - 1U) : 0U)
+
+/**
+  * @brief  HELPER macro calculating the compare value required to achieve the required timer output compare
+  *         active/inactive delay.
+  * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10);
+  * @param  __TIMCLK__ timer input clock frequency (in Hz)
+  * @param  __PSC__ prescaler
+  * @param  __DELAY__ timer output compare active/inactive delay (in us)
+  * @retval Compare value  (between Min_Data=0 and Max_Data=65535)
+  */
+#define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__)  \
+  ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \
+              / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
+
+/**
+  * @brief  HELPER macro calculating the auto-reload value to achieve the required pulse duration
+  *         (when the timer operates in one pulse mode).
+  * @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20);
+  * @param  __TIMCLK__ timer input clock frequency (in Hz)
+  * @param  __PSC__ prescaler
+  * @param  __DELAY__ timer output compare active/inactive delay (in us)
+  * @param  __PULSE__ pulse duration (in us)
+  * @retval Auto-reload value  (between Min_Data=0 and Max_Data=65535)
+  */
+#define __LL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__, __PULSE__)  \
+  ((uint32_t)(__LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__PULSE__)) \
+              + __LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__DELAY__))))
+
+/**
+  * @brief  HELPER macro retrieving the ratio of the input capture prescaler
+  * @note ex: @ref __LL_TIM_GET_ICPSC_RATIO (@ref LL_TIM_IC_GetPrescaler ());
+  * @param  __ICPSC__ This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_ICPSC_DIV1
+  *         @arg @ref LL_TIM_ICPSC_DIV2
+  *         @arg @ref LL_TIM_ICPSC_DIV4
+  *         @arg @ref LL_TIM_ICPSC_DIV8
+  * @retval Input capture prescaler ratio (1, 2, 4 or 8)
+  */
+#define __LL_TIM_GET_ICPSC_RATIO(__ICPSC__)  \
+  ((uint32_t)(0x01U << (((__ICPSC__) >> 16U) >> TIM_CCMR1_IC1PSC_Pos)))
+
+
+/**
+  * @}
+  */
+
+
+/**
+  * @}
+  */
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup TIM_LL_Exported_Functions TIM Exported Functions
+  * @{
+  */
+
+/** @defgroup TIM_LL_EF_Time_Base Time Base configuration
+  * @{
+  */
+/**
+  * @brief  Enable timer counter.
+  * @rmtoll CR1          CEN           LL_TIM_EnableCounter
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->CR1, TIM_CR1_CEN);
+}
+
+/**
+  * @brief  Disable timer counter.
+  * @rmtoll CR1          CEN           LL_TIM_DisableCounter
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN);
+}
+
+/**
+  * @brief  Indicates whether the timer counter is enabled.
+  * @rmtoll CR1          CEN           LL_TIM_IsEnabledCounter
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable update event generation.
+  * @rmtoll CR1          UDIS          LL_TIM_EnableUpdateEvent
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);
+}
+
+/**
+  * @brief  Disable update event generation.
+  * @rmtoll CR1          UDIS          LL_TIM_DisableUpdateEvent
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->CR1, TIM_CR1_UDIS);
+}
+
+/**
+  * @brief  Indicates whether update event generation is enabled.
+  * @rmtoll CR1          UDIS          LL_TIM_IsEnabledUpdateEvent
+  * @param  TIMx Timer instance
+  * @retval Inverted state of bit (0 or 1).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Set update event source
+  * @note Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events
+  *       generate an update interrupt or DMA request if enabled:
+  *        - Counter overflow/underflow
+  *        - Setting the UG bit
+  *        - Update generation through the slave mode controller
+  * @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter
+  *       overflow/underflow generates an update interrupt or DMA request if enabled.
+  * @rmtoll CR1          URS           LL_TIM_SetUpdateSource
+  * @param  TIMx Timer instance
+  * @param  UpdateSource This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_UPDATESOURCE_REGULAR
+  *         @arg @ref LL_TIM_UPDATESOURCE_COUNTER
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource)
+{
+  MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource);
+}
+
+/**
+  * @brief  Get actual event update source
+  * @rmtoll CR1          URS           LL_TIM_GetUpdateSource
+  * @param  TIMx Timer instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_TIM_UPDATESOURCE_REGULAR
+  *         @arg @ref LL_TIM_UPDATESOURCE_COUNTER
+  */
+__STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));
+}
+
+/**
+  * @brief  Set one pulse mode (one shot v.s. repetitive).
+  * @rmtoll CR1          OPM           LL_TIM_SetOnePulseMode
+  * @param  TIMx Timer instance
+  * @param  OnePulseMode This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
+  *         @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode)
+{
+  MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);
+}
+
+/**
+  * @brief  Get actual one pulse mode.
+  * @rmtoll CR1          OPM           LL_TIM_GetOnePulseMode
+  * @param  TIMx Timer instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
+  *         @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
+  */
+__STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));
+}
+
+/**
+  * @brief  Set the timer counter counting mode.
+  * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
+  *       check whether or not the counter mode selection feature is supported
+  *       by a timer instance.
+  * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
+  *       requires a timer reset to avoid unexpected direction
+  *       due to DIR bit readonly in center aligned mode.
+  * @rmtoll CR1          DIR           LL_TIM_SetCounterMode\n
+  *         CR1          CMS           LL_TIM_SetCounterMode
+  * @param  TIMx Timer instance
+  * @param  CounterMode This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_COUNTERMODE_UP
+  *         @arg @ref LL_TIM_COUNTERMODE_DOWN
+  *         @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
+  *         @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
+  *         @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode)
+{
+  MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode);
+}
+
+/**
+  * @brief  Get actual counter mode.
+  * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
+  *       check whether or not the counter mode selection feature is supported
+  *       by a timer instance.
+  * @rmtoll CR1          DIR           LL_TIM_GetCounterMode\n
+  *         CR1          CMS           LL_TIM_GetCounterMode
+  * @param  TIMx Timer instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_TIM_COUNTERMODE_UP
+  *         @arg @ref LL_TIM_COUNTERMODE_DOWN
+  *         @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
+  *         @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
+  *         @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
+  */
+__STATIC_INLINE uint32_t LL_TIM_GetCounterMode(TIM_TypeDef *TIMx)
+{
+  uint32_t counter_mode;
+
+  counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS));
+
+  if (counter_mode == 0U)
+  {
+    counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
+  }
+
+  return counter_mode;
+}
+
+/**
+  * @brief  Enable auto-reload (ARR) preload.
+  * @rmtoll CR1          ARPE          LL_TIM_EnableARRPreload
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->CR1, TIM_CR1_ARPE);
+}
+
+/**
+  * @brief  Disable auto-reload (ARR) preload.
+  * @rmtoll CR1          ARPE          LL_TIM_DisableARRPreload
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);
+}
+
+/**
+  * @brief  Indicates whether auto-reload (ARR) preload is enabled.
+  * @rmtoll CR1          ARPE          LL_TIM_IsEnabledARRPreload
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Set the division ratio between the timer clock  and the sampling clock used by the dead-time generators
+  *         (when supported) and the digital filters.
+  * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
+  *       whether or not the clock division feature is supported by the timer
+  *       instance.
+  * @rmtoll CR1          CKD           LL_TIM_SetClockDivision
+  * @param  TIMx Timer instance
+  * @param  ClockDivision This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV1
+  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV2
+  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV4
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision)
+{
+  MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);
+}
+
+/**
+  * @brief  Get the actual division ratio between the timer clock  and the sampling clock used by the dead-time
+  *         generators (when supported) and the digital filters.
+  * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
+  *       whether or not the clock division feature is supported by the timer
+  *       instance.
+  * @rmtoll CR1          CKD           LL_TIM_GetClockDivision
+  * @param  TIMx Timer instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV1
+  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV2
+  *         @arg @ref LL_TIM_CLOCKDIVISION_DIV4
+  */
+__STATIC_INLINE uint32_t LL_TIM_GetClockDivision(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));
+}
+
+/**
+  * @brief  Set the counter value.
+  * @rmtoll CNT          CNT           LL_TIM_SetCounter
+  * @param  TIMx Timer instance
+  * @param  Counter Counter value (between Min_Data=0 and Max_Data=0xFFFF)
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)
+{
+  WRITE_REG(TIMx->CNT, Counter);
+}
+
+/**
+  * @brief  Get the counter value.
+  * @rmtoll CNT          CNT           LL_TIM_GetCounter
+  * @param  TIMx Timer instance
+  * @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF)
+  */
+__STATIC_INLINE uint32_t LL_TIM_GetCounter(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_REG(TIMx->CNT));
+}
+
+/**
+  * @brief  Get the current direction of the counter
+  * @rmtoll CR1          DIR           LL_TIM_GetDirection
+  * @param  TIMx Timer instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_TIM_COUNTERDIRECTION_UP
+  *         @arg @ref LL_TIM_COUNTERDIRECTION_DOWN
+  */
+__STATIC_INLINE uint32_t LL_TIM_GetDirection(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
+}
+
+/**
+  * @brief  Set the prescaler value.
+  * @note The counter clock frequency CK_CNT is equal to fCK_PSC / (PSC[15:0] + 1).
+  * @note The prescaler can be changed on the fly as this control register is buffered. The new
+  *       prescaler ratio is taken into account at the next update event.
+  * @note Helper macro @ref __LL_TIM_CALC_PSC can be used to calculate the Prescaler parameter
+  * @rmtoll PSC          PSC           LL_TIM_SetPrescaler
+  * @param  TIMx Timer instance
+  * @param  Prescaler between Min_Data=0 and Max_Data=65535
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)
+{
+  WRITE_REG(TIMx->PSC, Prescaler);
+}
+
+/**
+  * @brief  Get the prescaler value.
+  * @rmtoll PSC          PSC           LL_TIM_GetPrescaler
+  * @param  TIMx Timer instance
+  * @retval  Prescaler value between Min_Data=0 and Max_Data=65535
+  */
+__STATIC_INLINE uint32_t LL_TIM_GetPrescaler(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_REG(TIMx->PSC));
+}
+
+/**
+  * @brief  Set the auto-reload value.
+  * @note The counter is blocked while the auto-reload value is null.
+  * @note Helper macro @ref __LL_TIM_CALC_ARR can be used to calculate the AutoReload parameter
+  * @rmtoll ARR          ARR           LL_TIM_SetAutoReload
+  * @param  TIMx Timer instance
+  * @param  AutoReload between Min_Data=0 and Max_Data=65535
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload)
+{
+  WRITE_REG(TIMx->ARR, AutoReload);
+}
+
+/**
+  * @brief  Get the auto-reload value.
+  * @rmtoll ARR          ARR           LL_TIM_GetAutoReload
+  * @param  TIMx Timer instance
+  * @retval Auto-reload value
+  */
+__STATIC_INLINE uint32_t LL_TIM_GetAutoReload(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_REG(TIMx->ARR));
+}
+
+/**
+  * @brief  Set the repetition counter value.
+  * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check
+  *       whether or not a timer instance supports a repetition counter.
+  * @rmtoll RCR          REP           LL_TIM_SetRepetitionCounter
+  * @param  TIMx Timer instance
+  * @param  RepetitionCounter between Min_Data=0 and Max_Data=255 or 65535 for advanced timer.
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter)
+{
+  WRITE_REG(TIMx->RCR, RepetitionCounter);
+}
+
+/**
+  * @brief  Get the repetition counter value.
+  * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check
+  *       whether or not a timer instance supports a repetition counter.
+  * @rmtoll RCR          REP           LL_TIM_GetRepetitionCounter
+  * @param  TIMx Timer instance
+  * @retval Repetition counter value
+  */
+__STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_REG(TIMx->RCR));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EF_Capture_Compare Capture Compare configuration
+  * @{
+  */
+/**
+  * @brief  Enable  the capture/compare control bits (CCxE, CCxNE and OCxM) preload.
+  * @note CCxE, CCxNE and OCxM bits are preloaded, after having been written,
+  *       they are updated only when a commutation event (COM) occurs.
+  * @note Only on channels that have a complementary output.
+  * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
+  *       whether or not a timer instance is able to generate a commutation event.
+  * @rmtoll CR2          CCPC          LL_TIM_CC_EnablePreload
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->CR2, TIM_CR2_CCPC);
+}
+
+/**
+  * @brief  Disable  the capture/compare control bits (CCxE, CCxNE and OCxM) preload.
+  * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
+  *       whether or not a timer instance is able to generate a commutation event.
+  * @rmtoll CR2          CCPC          LL_TIM_CC_DisablePreload
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);
+}
+
+/**
+  * @brief  Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM).
+  * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
+  *       whether or not a timer instance is able to generate a commutation event.
+  * @rmtoll CR2          CCUS          LL_TIM_CC_SetUpdate
+  * @param  TIMx Timer instance
+  * @param  CCUpdateSource This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CCUPDATESOURCE_COMG_ONLY
+  *         @arg @ref LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource)
+{
+  MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource);
+}
+
+/**
+  * @brief  Set the trigger of the capture/compare DMA request.
+  * @rmtoll CR2          CCDS          LL_TIM_CC_SetDMAReqTrigger
+  * @param  TIMx Timer instance
+  * @param  DMAReqTrigger This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CCDMAREQUEST_CC
+  *         @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger)
+{
+  MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger);
+}
+
+/**
+  * @brief  Get actual trigger of the capture/compare DMA request.
+  * @rmtoll CR2          CCDS          LL_TIM_CC_GetDMAReqTrigger
+  * @param  TIMx Timer instance
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_TIM_CCDMAREQUEST_CC
+  *         @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
+  */
+__STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));
+}
+
+/**
+  * @brief  Set the lock level to freeze the
+  *         configuration of several capture/compare parameters.
+  * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+  *       the lock mechanism is supported by a timer instance.
+  * @rmtoll BDTR         LOCK          LL_TIM_CC_SetLockLevel
+  * @param  TIMx Timer instance
+  * @param  LockLevel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_LOCKLEVEL_OFF
+  *         @arg @ref LL_TIM_LOCKLEVEL_1
+  *         @arg @ref LL_TIM_LOCKLEVEL_2
+  *         @arg @ref LL_TIM_LOCKLEVEL_3
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel)
+{
+  MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);
+}
+
+/**
+  * @brief  Enable capture/compare channels.
+  * @rmtoll CCER         CC1E          LL_TIM_CC_EnableChannel\n
+  *         CCER         CC1NE         LL_TIM_CC_EnableChannel\n
+  *         CCER         CC2E          LL_TIM_CC_EnableChannel\n
+  *         CCER         CC2NE         LL_TIM_CC_EnableChannel\n
+  *         CCER         CC3E          LL_TIM_CC_EnableChannel\n
+  *         CCER         CC3NE         LL_TIM_CC_EnableChannel\n
+  *         CCER         CC4E          LL_TIM_CC_EnableChannel
+  * @param  TIMx Timer instance
+  * @param  Channels This parameter can be a combination of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH1N
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH2N
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH3N
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
+{
+  SET_BIT(TIMx->CCER, Channels);
+}
+
+/**
+  * @brief  Disable capture/compare channels.
+  * @rmtoll CCER         CC1E          LL_TIM_CC_DisableChannel\n
+  *         CCER         CC1NE         LL_TIM_CC_DisableChannel\n
+  *         CCER         CC2E          LL_TIM_CC_DisableChannel\n
+  *         CCER         CC2NE         LL_TIM_CC_DisableChannel\n
+  *         CCER         CC3E          LL_TIM_CC_DisableChannel\n
+  *         CCER         CC3NE         LL_TIM_CC_DisableChannel\n
+  *         CCER         CC4E          LL_TIM_CC_DisableChannel
+  * @param  TIMx Timer instance
+  * @param  Channels This parameter can be a combination of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH1N
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH2N
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH3N
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
+{
+  CLEAR_BIT(TIMx->CCER, Channels);
+}
+
+/**
+  * @brief  Indicate whether channel(s) is(are) enabled.
+  * @rmtoll CCER         CC1E          LL_TIM_CC_IsEnabledChannel\n
+  *         CCER         CC1NE         LL_TIM_CC_IsEnabledChannel\n
+  *         CCER         CC2E          LL_TIM_CC_IsEnabledChannel\n
+  *         CCER         CC2NE         LL_TIM_CC_IsEnabledChannel\n
+  *         CCER         CC3E          LL_TIM_CC_IsEnabledChannel\n
+  *         CCER         CC3NE         LL_TIM_CC_IsEnabledChannel\n
+  *         CCER         CC4E          LL_TIM_CC_IsEnabledChannel
+  * @param  TIMx Timer instance
+  * @param  Channels This parameter can be a combination of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH1N
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH2N
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH3N
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(TIM_TypeDef *TIMx, uint32_t Channels)
+{
+  return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EF_Output_Channel Output channel configuration
+  * @{
+  */
+/**
+  * @brief  Configure an output channel.
+  * @rmtoll CCMR1        CC1S          LL_TIM_OC_ConfigOutput\n
+  *         CCMR1        CC2S          LL_TIM_OC_ConfigOutput\n
+  *         CCMR2        CC3S          LL_TIM_OC_ConfigOutput\n
+  *         CCMR2        CC4S          LL_TIM_OC_ConfigOutput\n
+  *         CCER         CC1P          LL_TIM_OC_ConfigOutput\n
+  *         CCER         CC2P          LL_TIM_OC_ConfigOutput\n
+  *         CCER         CC3P          LL_TIM_OC_ConfigOutput\n
+  *         CCER         CC4P          LL_TIM_OC_ConfigOutput\n
+  *         CR2          OIS1          LL_TIM_OC_ConfigOutput\n
+  *         CR2          OIS2          LL_TIM_OC_ConfigOutput\n
+  *         CR2          OIS3          LL_TIM_OC_ConfigOutput\n
+  *         CR2          OIS4          LL_TIM_OC_ConfigOutput
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @param  Configuration This parameter must be a combination of all the following values:
+  *         @arg @ref LL_TIM_OCPOLARITY_HIGH or @ref LL_TIM_OCPOLARITY_LOW
+  *         @arg @ref LL_TIM_OCIDLESTATE_LOW or @ref LL_TIM_OCIDLESTATE_HIGH
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel]));
+  MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),
+             (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]);
+  MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),
+             (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]);
+}
+
+/**
+  * @brief  Define the behavior of the output reference signal OCxREF from which
+  *         OCx and OCxN (when relevant) are derived.
+  * @rmtoll CCMR1        OC1M          LL_TIM_OC_SetMode\n
+  *         CCMR1        OC2M          LL_TIM_OC_SetMode\n
+  *         CCMR2        OC3M          LL_TIM_OC_SetMode\n
+  *         CCMR2        OC4M          LL_TIM_OC_SetMode
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @param  Mode This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_OCMODE_FROZEN
+  *         @arg @ref LL_TIM_OCMODE_ACTIVE
+  *         @arg @ref LL_TIM_OCMODE_INACTIVE
+  *         @arg @ref LL_TIM_OCMODE_TOGGLE
+  *         @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
+  *         @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
+  *         @arg @ref LL_TIM_OCMODE_PWM1
+  *         @arg @ref LL_TIM_OCMODE_PWM2
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M  | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]);
+}
+
+/**
+  * @brief  Get the output compare mode of an output channel.
+  * @rmtoll CCMR1        OC1M          LL_TIM_OC_GetMode\n
+  *         CCMR1        OC2M          LL_TIM_OC_GetMode\n
+  *         CCMR2        OC3M          LL_TIM_OC_GetMode\n
+  *         CCMR2        OC4M          LL_TIM_OC_GetMode
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_TIM_OCMODE_FROZEN
+  *         @arg @ref LL_TIM_OCMODE_ACTIVE
+  *         @arg @ref LL_TIM_OCMODE_INACTIVE
+  *         @arg @ref LL_TIM_OCMODE_TOGGLE
+  *         @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
+  *         @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
+  *         @arg @ref LL_TIM_OCMODE_PWM1
+  *         @arg @ref LL_TIM_OCMODE_PWM2
+  */
+__STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]);
+}
+
+/**
+  * @brief  Set the polarity of an output channel.
+  * @rmtoll CCER         CC1P          LL_TIM_OC_SetPolarity\n
+  *         CCER         CC1NP         LL_TIM_OC_SetPolarity\n
+  *         CCER         CC2P          LL_TIM_OC_SetPolarity\n
+  *         CCER         CC2NP         LL_TIM_OC_SetPolarity\n
+  *         CCER         CC3P          LL_TIM_OC_SetPolarity\n
+  *         CCER         CC3NP         LL_TIM_OC_SetPolarity\n
+  *         CCER         CC4P          LL_TIM_OC_SetPolarity
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH1N
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH2N
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH3N
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @param  Polarity This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_OCPOLARITY_HIGH
+  *         @arg @ref LL_TIM_OCPOLARITY_LOW
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),  Polarity << SHIFT_TAB_CCxP[iChannel]);
+}
+
+/**
+  * @brief  Get the polarity of an output channel.
+  * @rmtoll CCER         CC1P          LL_TIM_OC_GetPolarity\n
+  *         CCER         CC1NP         LL_TIM_OC_GetPolarity\n
+  *         CCER         CC2P          LL_TIM_OC_GetPolarity\n
+  *         CCER         CC2NP         LL_TIM_OC_GetPolarity\n
+  *         CCER         CC3P          LL_TIM_OC_GetPolarity\n
+  *         CCER         CC3NP         LL_TIM_OC_GetPolarity\n
+  *         CCER         CC4P          LL_TIM_OC_GetPolarity
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH1N
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH2N
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH3N
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_TIM_OCPOLARITY_HIGH
+  *         @arg @ref LL_TIM_OCPOLARITY_LOW
+  */
+__STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]);
+}
+
+/**
+  * @brief  Set the IDLE state of an output channel
+  * @note This function is significant only for the timer instances
+  *       supporting the break feature. Macro IS_TIM_BREAK_INSTANCE(TIMx)
+  *       can be used to check whether or not a timer instance provides
+  *       a break input.
+  * @rmtoll CR2         OIS1          LL_TIM_OC_SetIdleState\n
+  *         CR2         OIS1N         LL_TIM_OC_SetIdleState\n
+  *         CR2         OIS2          LL_TIM_OC_SetIdleState\n
+  *         CR2         OIS2N         LL_TIM_OC_SetIdleState\n
+  *         CR2         OIS3          LL_TIM_OC_SetIdleState\n
+  *         CR2         OIS3N         LL_TIM_OC_SetIdleState\n
+  *         CR2         OIS4          LL_TIM_OC_SetIdleState
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH1N
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH2N
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH3N
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @param  IdleState This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_OCIDLESTATE_LOW
+  *         @arg @ref LL_TIM_OCIDLESTATE_HIGH
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),  IdleState << SHIFT_TAB_OISx[iChannel]);
+}
+
+/**
+  * @brief  Get the IDLE state of an output channel
+  * @rmtoll CR2         OIS1          LL_TIM_OC_GetIdleState\n
+  *         CR2         OIS1N         LL_TIM_OC_GetIdleState\n
+  *         CR2         OIS2          LL_TIM_OC_GetIdleState\n
+  *         CR2         OIS2N         LL_TIM_OC_GetIdleState\n
+  *         CR2         OIS3          LL_TIM_OC_GetIdleState\n
+  *         CR2         OIS3N         LL_TIM_OC_GetIdleState\n
+  *         CR2         OIS4          LL_TIM_OC_GetIdleState
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH1N
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH2N
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH3N
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_TIM_OCIDLESTATE_LOW
+  *         @arg @ref LL_TIM_OCIDLESTATE_HIGH
+  */
+__STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel]);
+}
+
+/**
+  * @brief  Enable fast mode for the output channel.
+  * @note Acts only if the channel is configured in PWM1 or PWM2 mode.
+  * @rmtoll CCMR1        OC1FE          LL_TIM_OC_EnableFast\n
+  *         CCMR1        OC2FE          LL_TIM_OC_EnableFast\n
+  *         CCMR2        OC3FE          LL_TIM_OC_EnableFast\n
+  *         CCMR2        OC4FE          LL_TIM_OC_EnableFast
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
+
+}
+
+/**
+  * @brief  Disable fast mode for the output channel.
+  * @rmtoll CCMR1        OC1FE          LL_TIM_OC_DisableFast\n
+  *         CCMR1        OC2FE          LL_TIM_OC_DisableFast\n
+  *         CCMR2        OC3FE          LL_TIM_OC_DisableFast\n
+  *         CCMR2        OC4FE          LL_TIM_OC_DisableFast
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
+
+}
+
+/**
+  * @brief  Indicates whether fast mode is enabled for the output channel.
+  * @rmtoll CCMR1        OC1FE          LL_TIM_OC_IsEnabledFast\n
+  *         CCMR1        OC2FE          LL_TIM_OC_IsEnabledFast\n
+  *         CCMR2        OC3FE          LL_TIM_OC_IsEnabledFast\n
+  *         CCMR2        OC4FE          LL_TIM_OC_IsEnabledFast\n
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel];
+  return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable compare register (TIMx_CCRx) preload for the output channel.
+  * @rmtoll CCMR1        OC1PE          LL_TIM_OC_EnablePreload\n
+  *         CCMR1        OC2PE          LL_TIM_OC_EnablePreload\n
+  *         CCMR2        OC3PE          LL_TIM_OC_EnablePreload\n
+  *         CCMR2        OC4PE          LL_TIM_OC_EnablePreload
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
+}
+
+/**
+  * @brief  Disable compare register (TIMx_CCRx) preload for the output channel.
+  * @rmtoll CCMR1        OC1PE          LL_TIM_OC_DisablePreload\n
+  *         CCMR1        OC2PE          LL_TIM_OC_DisablePreload\n
+  *         CCMR2        OC3PE          LL_TIM_OC_DisablePreload\n
+  *         CCMR2        OC4PE          LL_TIM_OC_DisablePreload
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
+}
+
+/**
+  * @brief  Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channel.
+  * @rmtoll CCMR1        OC1PE          LL_TIM_OC_IsEnabledPreload\n
+  *         CCMR1        OC2PE          LL_TIM_OC_IsEnabledPreload\n
+  *         CCMR2        OC3PE          LL_TIM_OC_IsEnabledPreload\n
+  *         CCMR2        OC4PE          LL_TIM_OC_IsEnabledPreload\n
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel];
+  return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable clearing the output channel on an external event.
+  * @note This function can only be used in Output compare and PWM modes. It does not work in Forced mode.
+  * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
+  *       or not a timer instance can clear the OCxREF signal on an external event.
+  * @rmtoll CCMR1        OC1CE          LL_TIM_OC_EnableClear\n
+  *         CCMR1        OC2CE          LL_TIM_OC_EnableClear\n
+  *         CCMR2        OC3CE          LL_TIM_OC_EnableClear\n
+  *         CCMR2        OC4CE          LL_TIM_OC_EnableClear
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
+}
+
+/**
+  * @brief  Disable clearing the output channel on an external event.
+  * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
+  *       or not a timer instance can clear the OCxREF signal on an external event.
+  * @rmtoll CCMR1        OC1CE          LL_TIM_OC_DisableClear\n
+  *         CCMR1        OC2CE          LL_TIM_OC_DisableClear\n
+  *         CCMR2        OC3CE          LL_TIM_OC_DisableClear\n
+  *         CCMR2        OC4CE          LL_TIM_OC_DisableClear
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
+}
+
+/**
+  * @brief  Indicates clearing the output channel on an external event is enabled for the output channel.
+  * @note This function enables clearing the output channel on an external event.
+  * @note This function can only be used in Output compare and PWM modes. It does not work in Forced mode.
+  * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
+  *       or not a timer instance can clear the OCxREF signal on an external event.
+  * @rmtoll CCMR1        OC1CE          LL_TIM_OC_IsEnabledClear\n
+  *         CCMR1        OC2CE          LL_TIM_OC_IsEnabledClear\n
+  *         CCMR2        OC3CE          LL_TIM_OC_IsEnabledClear\n
+  *         CCMR2        OC4CE          LL_TIM_OC_IsEnabledClear\n
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel];
+  return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal and the rising edge of
+  *         the Ocx and OCxN signals).
+  * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+  *       dead-time insertion feature is supported by a timer instance.
+  * @note Helper macro @ref __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter
+  * @rmtoll BDTR         DTG           LL_TIM_OC_SetDeadTime
+  * @param  TIMx Timer instance
+  * @param  DeadTime between Min_Data=0 and Max_Data=255
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)
+{
+  MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);
+}
+
+/**
+  * @brief  Set compare value for output channel 1 (TIMx_CCR1).
+  * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
+  *       output channel 1 is supported by a timer instance.
+  * @rmtoll CCR1         CCR1          LL_TIM_OC_SetCompareCH1
+  * @param  TIMx Timer instance
+  * @param  CompareValue between Min_Data=0 and Max_Data=65535
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue)
+{
+  WRITE_REG(TIMx->CCR1, CompareValue);
+}
+
+/**
+  * @brief  Set compare value for output channel 2 (TIMx_CCR2).
+  * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
+  *       output channel 2 is supported by a timer instance.
+  * @rmtoll CCR2         CCR2          LL_TIM_OC_SetCompareCH2
+  * @param  TIMx Timer instance
+  * @param  CompareValue between Min_Data=0 and Max_Data=65535
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue)
+{
+  WRITE_REG(TIMx->CCR2, CompareValue);
+}
+
+/**
+  * @brief  Set compare value for output channel 3 (TIMx_CCR3).
+  * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
+  *       output channel is supported by a timer instance.
+  * @rmtoll CCR3         CCR3          LL_TIM_OC_SetCompareCH3
+  * @param  TIMx Timer instance
+  * @param  CompareValue between Min_Data=0 and Max_Data=65535
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue)
+{
+  WRITE_REG(TIMx->CCR3, CompareValue);
+}
+
+/**
+  * @brief  Set compare value for output channel 4 (TIMx_CCR4).
+  * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
+  *       output channel 4 is supported by a timer instance.
+  * @rmtoll CCR4         CCR4          LL_TIM_OC_SetCompareCH4
+  * @param  TIMx Timer instance
+  * @param  CompareValue between Min_Data=0 and Max_Data=65535
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue)
+{
+  WRITE_REG(TIMx->CCR4, CompareValue);
+}
+
+/**
+  * @brief  Get compare value (TIMx_CCR1) set for  output channel 1.
+  * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
+  *       output channel 1 is supported by a timer instance.
+  * @rmtoll CCR1         CCR1          LL_TIM_OC_GetCompareCH1
+  * @param  TIMx Timer instance
+  * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
+  */
+__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_REG(TIMx->CCR1));
+}
+
+/**
+  * @brief  Get compare value (TIMx_CCR2) set for  output channel 2.
+  * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
+  *       output channel 2 is supported by a timer instance.
+  * @rmtoll CCR2         CCR2          LL_TIM_OC_GetCompareCH2
+  * @param  TIMx Timer instance
+  * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
+  */
+__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_REG(TIMx->CCR2));
+}
+
+/**
+  * @brief  Get compare value (TIMx_CCR3) set for  output channel 3.
+  * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
+  *       output channel 3 is supported by a timer instance.
+  * @rmtoll CCR3         CCR3          LL_TIM_OC_GetCompareCH3
+  * @param  TIMx Timer instance
+  * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
+  */
+__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_REG(TIMx->CCR3));
+}
+
+/**
+  * @brief  Get compare value (TIMx_CCR4) set for  output channel 4.
+  * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
+  *       output channel 4 is supported by a timer instance.
+  * @rmtoll CCR4         CCR4          LL_TIM_OC_GetCompareCH4
+  * @param  TIMx Timer instance
+  * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
+  */
+__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_REG(TIMx->CCR4));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EF_Input_Channel Input channel configuration
+  * @{
+  */
+/**
+  * @brief  Configure input channel.
+  * @rmtoll CCMR1        CC1S          LL_TIM_IC_Config\n
+  *         CCMR1        IC1PSC        LL_TIM_IC_Config\n
+  *         CCMR1        IC1F          LL_TIM_IC_Config\n
+  *         CCMR1        CC2S          LL_TIM_IC_Config\n
+  *         CCMR1        IC2PSC        LL_TIM_IC_Config\n
+  *         CCMR1        IC2F          LL_TIM_IC_Config\n
+  *         CCMR2        CC3S          LL_TIM_IC_Config\n
+  *         CCMR2        IC3PSC        LL_TIM_IC_Config\n
+  *         CCMR2        IC3F          LL_TIM_IC_Config\n
+  *         CCMR2        CC4S          LL_TIM_IC_Config\n
+  *         CCMR2        IC4PSC        LL_TIM_IC_Config\n
+  *         CCMR2        IC4F          LL_TIM_IC_Config\n
+  *         CCER         CC1P          LL_TIM_IC_Config\n
+  *         CCER         CC1NP         LL_TIM_IC_Config\n
+  *         CCER         CC2P          LL_TIM_IC_Config\n
+  *         CCER         CC2NP         LL_TIM_IC_Config\n
+  *         CCER         CC3P          LL_TIM_IC_Config\n
+  *         CCER         CC3NP         LL_TIM_IC_Config\n
+  *         CCER         CC4P          LL_TIM_IC_Config\n
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @param  Configuration This parameter must be a combination of all the following values:
+  *         @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI or @ref LL_TIM_ACTIVEINPUT_INDIRECTTI or @ref LL_TIM_ACTIVEINPUT_TRC
+  *         @arg @ref LL_TIM_ICPSC_DIV1 or ... or @ref LL_TIM_ICPSC_DIV8
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV1 or ... or @ref LL_TIM_IC_FILTER_FDIV32_N8
+  *         @arg @ref LL_TIM_IC_POLARITY_RISING or @ref LL_TIM_IC_POLARITY_FALLING
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]),
+             ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S))                \
+             << SHIFT_TAB_ICxx[iChannel]);
+  MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
+             (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]);
+}
+
+/**
+  * @brief  Set the active input.
+  * @rmtoll CCMR1        CC1S          LL_TIM_IC_SetActiveInput\n
+  *         CCMR1        CC2S          LL_TIM_IC_SetActiveInput\n
+  *         CCMR2        CC3S          LL_TIM_IC_SetActiveInput\n
+  *         CCMR2        CC4S          LL_TIM_IC_SetActiveInput
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @param  ICActiveInput This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
+  *         @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
+  *         @arg @ref LL_TIM_ACTIVEINPUT_TRC
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiveInput)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT_TAB_ICxx[iChannel]);
+}
+
+/**
+  * @brief  Get the current active input.
+  * @rmtoll CCMR1        CC1S          LL_TIM_IC_GetActiveInput\n
+  *         CCMR1        CC2S          LL_TIM_IC_GetActiveInput\n
+  *         CCMR2        CC3S          LL_TIM_IC_GetActiveInput\n
+  *         CCMR2        CC4S          LL_TIM_IC_GetActiveInput
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
+  *         @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
+  *         @arg @ref LL_TIM_ACTIVEINPUT_TRC
+  */
+__STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
+}
+
+/**
+  * @brief  Set the prescaler of input channel.
+  * @rmtoll CCMR1        IC1PSC        LL_TIM_IC_SetPrescaler\n
+  *         CCMR1        IC2PSC        LL_TIM_IC_SetPrescaler\n
+  *         CCMR2        IC3PSC        LL_TIM_IC_SetPrescaler\n
+  *         CCMR2        IC4PSC        LL_TIM_IC_SetPrescaler
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @param  ICPrescaler This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_ICPSC_DIV1
+  *         @arg @ref LL_TIM_ICPSC_DIV2
+  *         @arg @ref LL_TIM_ICPSC_DIV4
+  *         @arg @ref LL_TIM_ICPSC_DIV8
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescaler)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT_TAB_ICxx[iChannel]);
+}
+
+/**
+  * @brief  Get the current prescaler value acting on an  input channel.
+  * @rmtoll CCMR1        IC1PSC        LL_TIM_IC_GetPrescaler\n
+  *         CCMR1        IC2PSC        LL_TIM_IC_GetPrescaler\n
+  *         CCMR2        IC3PSC        LL_TIM_IC_GetPrescaler\n
+  *         CCMR2        IC4PSC        LL_TIM_IC_GetPrescaler
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_TIM_ICPSC_DIV1
+  *         @arg @ref LL_TIM_ICPSC_DIV2
+  *         @arg @ref LL_TIM_ICPSC_DIV4
+  *         @arg @ref LL_TIM_ICPSC_DIV8
+  */
+__STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
+}
+
+/**
+  * @brief  Set the input filter duration.
+  * @rmtoll CCMR1        IC1F          LL_TIM_IC_SetFilter\n
+  *         CCMR1        IC2F          LL_TIM_IC_SetFilter\n
+  *         CCMR2        IC3F          LL_TIM_IC_SetFilter\n
+  *         CCMR2        IC4F          LL_TIM_IC_SetFilter
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @param  ICFilter This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV1
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel]), (ICFilter >> 16U) << SHIFT_TAB_ICxx[iChannel]);
+}
+
+/**
+  * @brief  Get the input filter duration.
+  * @rmtoll CCMR1        IC1F          LL_TIM_IC_GetFilter\n
+  *         CCMR1        IC2F          LL_TIM_IC_GetFilter\n
+  *         CCMR2        IC3F          LL_TIM_IC_GetFilter\n
+  *         CCMR2        IC4F          LL_TIM_IC_GetFilter
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV1
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
+  *         @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
+  */
+__STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
+  return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
+}
+
+/**
+  * @brief  Set the input channel polarity.
+  * @rmtoll CCER         CC1P          LL_TIM_IC_SetPolarity\n
+  *         CCER         CC1NP         LL_TIM_IC_SetPolarity\n
+  *         CCER         CC2P          LL_TIM_IC_SetPolarity\n
+  *         CCER         CC2NP         LL_TIM_IC_SetPolarity\n
+  *         CCER         CC3P          LL_TIM_IC_SetPolarity\n
+  *         CCER         CC3NP         LL_TIM_IC_SetPolarity\n
+  *         CCER         CC4P          LL_TIM_IC_SetPolarity\n
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @param  ICPolarity This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_IC_POLARITY_RISING
+  *         @arg @ref LL_TIM_IC_POLARITY_FALLING
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
+             ICPolarity << SHIFT_TAB_CCxP[iChannel]);
+}
+
+/**
+  * @brief  Get the current input channel polarity.
+  * @rmtoll CCER         CC1P          LL_TIM_IC_GetPolarity\n
+  *         CCER         CC1NP         LL_TIM_IC_GetPolarity\n
+  *         CCER         CC2P          LL_TIM_IC_GetPolarity\n
+  *         CCER         CC2NP         LL_TIM_IC_GetPolarity\n
+  *         CCER         CC3P          LL_TIM_IC_GetPolarity\n
+  *         CCER         CC3NP         LL_TIM_IC_GetPolarity\n
+  *         CCER         CC4P          LL_TIM_IC_GetPolarity\n
+  * @param  TIMx Timer instance
+  * @param  Channel This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CHANNEL_CH1
+  *         @arg @ref LL_TIM_CHANNEL_CH2
+  *         @arg @ref LL_TIM_CHANNEL_CH3
+  *         @arg @ref LL_TIM_CHANNEL_CH4
+  * @retval Returned value can be one of the following values:
+  *         @arg @ref LL_TIM_IC_POLARITY_RISING
+  *         @arg @ref LL_TIM_IC_POLARITY_FALLING
+  */
+__STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel)
+{
+  uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+  return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >>
+          SHIFT_TAB_CCxP[iChannel]);
+}
+
+/**
+  * @brief  Connect the TIMx_CH1, CH2 and CH3 pins  to the TI1 input (XOR combination).
+  * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance provides an XOR input.
+  * @rmtoll CR2          TI1S          LL_TIM_IC_EnableXORCombination
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->CR2, TIM_CR2_TI1S);
+}
+
+/**
+  * @brief  Disconnect the TIMx_CH1, CH2 and CH3 pins  from the TI1 input.
+  * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance provides an XOR input.
+  * @rmtoll CR2          TI1S          LL_TIM_IC_DisableXORCombination
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);
+}
+
+/**
+  * @brief  Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input.
+  * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
+  * a timer instance provides an XOR input.
+  * @rmtoll CR2          TI1S          LL_TIM_IC_IsEnabledXORCombination
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Get captured value for input channel 1.
+  * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
+  *       input channel 1 is supported by a timer instance.
+  * @rmtoll CCR1         CCR1          LL_TIM_IC_GetCaptureCH1
+  * @param  TIMx Timer instance
+  * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
+  */
+__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_REG(TIMx->CCR1));
+}
+
+/**
+  * @brief  Get captured value for input channel 2.
+  * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
+  *       input channel 2 is supported by a timer instance.
+  * @rmtoll CCR2         CCR2          LL_TIM_IC_GetCaptureCH2
+  * @param  TIMx Timer instance
+  * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
+  */
+__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_REG(TIMx->CCR2));
+}
+
+/**
+  * @brief  Get captured value for input channel 3.
+  * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
+  *       input channel 3 is supported by a timer instance.
+  * @rmtoll CCR3         CCR3          LL_TIM_IC_GetCaptureCH3
+  * @param  TIMx Timer instance
+  * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
+  */
+__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_REG(TIMx->CCR3));
+}
+
+/**
+  * @brief  Get captured value for input channel 4.
+  * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
+  *       input channel 4 is supported by a timer instance.
+  * @rmtoll CCR4         CCR4          LL_TIM_IC_GetCaptureCH4
+  * @param  TIMx Timer instance
+  * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
+  */
+__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(TIM_TypeDef *TIMx)
+{
+  return (uint32_t)(READ_REG(TIMx->CCR4));
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EF_Clock_Selection Counter clock selection
+  * @{
+  */
+/**
+  * @brief  Enable external clock mode 2.
+  * @note When external clock mode 2 is enabled the counter is clocked by any active edge on the ETRF signal.
+  * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
+  *       whether or not a timer instance supports external clock mode2.
+  * @rmtoll SMCR         ECE           LL_TIM_EnableExternalClock
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->SMCR, TIM_SMCR_ECE);
+}
+
+/**
+  * @brief  Disable external clock mode 2.
+  * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
+  *       whether or not a timer instance supports external clock mode2.
+  * @rmtoll SMCR         ECE           LL_TIM_DisableExternalClock
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);
+}
+
+/**
+  * @brief  Indicate whether external clock mode 2 is enabled.
+  * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
+  *       whether or not a timer instance supports external clock mode2.
+  * @rmtoll SMCR         ECE           LL_TIM_IsEnabledExternalClock
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Set the clock source of the counter clock.
+  * @note when selected clock source is external clock mode 1, the timer input
+  *       the external clock is applied is selected by calling the @ref LL_TIM_SetTriggerInput()
+  *       function. This timer input must be configured by calling
+  *       the @ref LL_TIM_IC_Config() function.
+  * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(TIMx) can be used to check
+  *       whether or not a timer instance supports external clock mode1.
+  * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
+  *       whether or not a timer instance supports external clock mode2.
+  * @rmtoll SMCR         SMS           LL_TIM_SetClockSource\n
+  *         SMCR         ECE           LL_TIM_SetClockSource
+  * @param  TIMx Timer instance
+  * @param  ClockSource This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_CLOCKSOURCE_INTERNAL
+  *         @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE1
+  *         @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE2
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)
+{
+  MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource);
+}
+
+/**
+  * @brief  Set the encoder interface mode.
+  * @note Macro IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx) can be used to check
+  *       whether or not a timer instance supports the encoder mode.
+  * @rmtoll SMCR         SMS           LL_TIM_SetEncoderMode
+  * @param  TIMx Timer instance
+  * @param  EncoderMode This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_ENCODERMODE_X2_TI1
+  *         @arg @ref LL_TIM_ENCODERMODE_X2_TI2
+  *         @arg @ref LL_TIM_ENCODERMODE_X4_TI12
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode)
+{
+  MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EF_Timer_Synchronization Timer synchronisation configuration
+  * @{
+  */
+/**
+  * @brief  Set the trigger output (TRGO) used for timer synchronization .
+  * @note Macro IS_TIM_MASTER_INSTANCE(TIMx) can be used to check
+  *       whether or not a timer instance can operate as a master timer.
+  * @rmtoll CR2          MMS           LL_TIM_SetTriggerOutput
+  * @param  TIMx Timer instance
+  * @param  TimerSynchronization This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_TRGO_RESET
+  *         @arg @ref LL_TIM_TRGO_ENABLE
+  *         @arg @ref LL_TIM_TRGO_UPDATE
+  *         @arg @ref LL_TIM_TRGO_CC1IF
+  *         @arg @ref LL_TIM_TRGO_OC1REF
+  *         @arg @ref LL_TIM_TRGO_OC2REF
+  *         @arg @ref LL_TIM_TRGO_OC3REF
+  *         @arg @ref LL_TIM_TRGO_OC4REF
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)
+{
+  MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);
+}
+
+/**
+  * @brief  Set the synchronization mode of a slave timer.
+  * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance can operate as a slave timer.
+  * @rmtoll SMCR         SMS           LL_TIM_SetSlaveMode
+  * @param  TIMx Timer instance
+  * @param  SlaveMode This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_SLAVEMODE_DISABLED
+  *         @arg @ref LL_TIM_SLAVEMODE_RESET
+  *         @arg @ref LL_TIM_SLAVEMODE_GATED
+  *         @arg @ref LL_TIM_SLAVEMODE_TRIGGER
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode)
+{
+  MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode);
+}
+
+/**
+  * @brief  Set the selects the trigger input to be used to synchronize the counter.
+  * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance can operate as a slave timer.
+  * @rmtoll SMCR         TS            LL_TIM_SetTriggerInput
+  * @param  TIMx Timer instance
+  * @param  TriggerInput This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_TS_ITR0
+  *         @arg @ref LL_TIM_TS_ITR1
+  *         @arg @ref LL_TIM_TS_ITR2
+  *         @arg @ref LL_TIM_TS_ITR3
+  *         @arg @ref LL_TIM_TS_TI1F_ED
+  *         @arg @ref LL_TIM_TS_TI1FP1
+  *         @arg @ref LL_TIM_TS_TI2FP2
+  *         @arg @ref LL_TIM_TS_ETRF
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput)
+{
+  MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput);
+}
+
+/**
+  * @brief  Enable the Master/Slave mode.
+  * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance can operate as a slave timer.
+  * @rmtoll SMCR         MSM           LL_TIM_EnableMasterSlaveMode
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->SMCR, TIM_SMCR_MSM);
+}
+
+/**
+  * @brief  Disable the Master/Slave mode.
+  * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance can operate as a slave timer.
+  * @rmtoll SMCR         MSM           LL_TIM_DisableMasterSlaveMode
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);
+}
+
+/**
+  * @brief Indicates whether the Master/Slave mode is enabled.
+  * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
+  * a timer instance can operate as a slave timer.
+  * @rmtoll SMCR         MSM           LL_TIM_IsEnabledMasterSlaveMode
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Configure the external trigger (ETR) input.
+  * @note Macro IS_TIM_ETR_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance provides an external trigger input.
+  * @rmtoll SMCR         ETP           LL_TIM_ConfigETR\n
+  *         SMCR         ETPS          LL_TIM_ConfigETR\n
+  *         SMCR         ETF           LL_TIM_ConfigETR
+  * @param  TIMx Timer instance
+  * @param  ETRPolarity This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_ETR_POLARITY_NONINVERTED
+  *         @arg @ref LL_TIM_ETR_POLARITY_INVERTED
+  * @param  ETRPrescaler This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_ETR_PRESCALER_DIV1
+  *         @arg @ref LL_TIM_ETR_PRESCALER_DIV2
+  *         @arg @ref LL_TIM_ETR_PRESCALER_DIV4
+  *         @arg @ref LL_TIM_ETR_PRESCALER_DIV8
+  * @param  ETRFilter This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV1
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV1_N2
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV1_N4
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV1_N8
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV2_N6
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV2_N8
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV4_N6
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV4_N8
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV8_N6
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV8_N8
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV16_N5
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV16_N6
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV16_N8
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV32_N5
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV32_N6
+  *         @arg @ref LL_TIM_ETR_FILTER_FDIV32_N8
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescaler,
+                                      uint32_t ETRFilter)
+{
+  MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | ETRFilter);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EF_Break_Function Break function configuration
+  * @{
+  */
+/**
+  * @brief  Enable the break function.
+  * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance provides a break input.
+  * @rmtoll BDTR         BKE           LL_TIM_EnableBRK
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx)
+{
+  __IO uint32_t tmpreg;
+  SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);
+  /* Note: Any write operation to this bit takes a delay of 1 APB clock cycle to become effective. */
+  tmpreg = READ_REG(TIMx->BDTR);
+  (void)(tmpreg);
+}
+
+/**
+  * @brief  Disable the break function.
+  * @rmtoll BDTR         BKE           LL_TIM_DisableBRK
+  * @param  TIMx Timer instance
+  * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance provides a break input.
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx)
+{
+  __IO uint32_t tmpreg;
+  CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);
+  /* Note: Any write operation to this bit takes a delay of 1 APB clock cycle to become effective. */
+  tmpreg = READ_REG(TIMx->BDTR);
+  (void)(tmpreg);
+}
+
+/**
+  * @brief  Configure the break input.
+  * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance provides a break input.
+  * @rmtoll BDTR         BKP           LL_TIM_ConfigBRK
+  * @param  TIMx Timer instance
+  * @param  BreakPolarity This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_BREAK_POLARITY_LOW
+  *         @arg @ref LL_TIM_BREAK_POLARITY_HIGH
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity)
+{
+  __IO uint32_t tmpreg;
+  MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP, BreakPolarity);
+  /* Note: Any write operation to BKP bit takes a delay of 1 APB clock cycle to become effective. */
+  tmpreg = READ_REG(TIMx->BDTR);
+  (void)(tmpreg);
+}
+
+/**
+  * @brief  Select the outputs off state (enabled v.s. disabled) in Idle and Run modes.
+  * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance provides a break input.
+  * @rmtoll BDTR         OSSI          LL_TIM_SetOffStates\n
+  *         BDTR         OSSR          LL_TIM_SetOffStates
+  * @param  TIMx Timer instance
+  * @param  OffStateIdle This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_OSSI_DISABLE
+  *         @arg @ref LL_TIM_OSSI_ENABLE
+  * @param  OffStateRun This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_OSSR_DISABLE
+  *         @arg @ref LL_TIM_OSSR_ENABLE
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStateRun)
+{
+  MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun);
+}
+
+/**
+  * @brief  Enable automatic output (MOE can be set by software or automatically when a break input is active).
+  * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance provides a break input.
+  * @rmtoll BDTR         AOE           LL_TIM_EnableAutomaticOutput
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);
+}
+
+/**
+  * @brief  Disable automatic output (MOE can be set only by software).
+  * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance provides a break input.
+  * @rmtoll BDTR         AOE           LL_TIM_DisableAutomaticOutput
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);
+}
+
+/**
+  * @brief  Indicate whether automatic output is enabled.
+  * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance provides a break input.
+  * @rmtoll BDTR         AOE           LL_TIM_IsEnabledAutomaticOutput
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable the outputs (set the MOE bit in TIMx_BDTR register).
+  * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by
+  *       software and is reset in case of break or break2 event
+  * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance provides a break input.
+  * @rmtoll BDTR         MOE           LL_TIM_EnableAllOutputs
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);
+}
+
+/**
+  * @brief  Disable the outputs (reset the MOE bit in TIMx_BDTR register).
+  * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by
+  *       software and is reset in case of break or break2 event.
+  * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance provides a break input.
+  * @rmtoll BDTR         MOE           LL_TIM_DisableAllOutputs
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);
+}
+
+/**
+  * @brief  Indicates whether outputs are enabled.
+  * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+  *       a timer instance provides a break input.
+  * @rmtoll BDTR         MOE           LL_TIM_IsEnabledAllOutputs
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EF_DMA_Burst_Mode DMA burst mode configuration
+  * @{
+  */
+/**
+  * @brief  Configures the timer DMA burst feature.
+  * @note Macro IS_TIM_DMABURST_INSTANCE(TIMx) can be used to check whether or
+  *       not a timer instance supports the DMA burst mode.
+  * @rmtoll DCR          DBL           LL_TIM_ConfigDMABurst\n
+  *         DCR          DBA           LL_TIM_ConfigDMABurst
+  * @param  TIMx Timer instance
+  * @param  DMABurstBaseAddress This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CR1
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CR2
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_SMCR
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_DIER
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_SR
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_EGR
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR1
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR2
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCER
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CNT
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_PSC
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_ARR
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_RCR
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCR1
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCR2
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCR3
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_CCR4
+  *         @arg @ref LL_TIM_DMABURST_BASEADDR_BDTR
+  * @param  DMABurstLength This parameter can be one of the following values:
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_4TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_5TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_6TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_7TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_8TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_9TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_10TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_11TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_12TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_13TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_14TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_15TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_16TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_17TRANSFERS
+  *         @arg @ref LL_TIM_DMABURST_LENGTH_18TRANSFERS
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_t DMABurstLength)
+{
+  MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA), (DMABurstBaseAddress | DMABurstLength));
+}
+
+/**
+  * @}
+  */
+
+
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EF_FLAG_Management FLAG-Management
+  * @{
+  */
+/**
+  * @brief  Clear the update interrupt flag (UIF).
+  * @rmtoll SR           UIF           LL_TIM_ClearFlag_UPDATE
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)
+{
+  WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));
+}
+
+/**
+  * @brief  Indicate whether update interrupt flag (UIF) is set (update interrupt is pending).
+  * @rmtoll SR           UIF           LL_TIM_IsActiveFlag_UPDATE
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Clear the Capture/Compare 1 interrupt flag (CC1F).
+  * @rmtoll SR           CC1IF         LL_TIM_ClearFlag_CC1
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx)
+{
+  WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF));
+}
+
+/**
+  * @brief  Indicate whether Capture/Compare 1 interrupt flag (CC1F) is set (Capture/Compare 1 interrupt is pending).
+  * @rmtoll SR           CC1IF         LL_TIM_IsActiveFlag_CC1
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Clear the Capture/Compare 2 interrupt flag (CC2F).
+  * @rmtoll SR           CC2IF         LL_TIM_ClearFlag_CC2
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx)
+{
+  WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF));
+}
+
+/**
+  * @brief  Indicate whether Capture/Compare 2 interrupt flag (CC2F) is set (Capture/Compare 2 interrupt is pending).
+  * @rmtoll SR           CC2IF         LL_TIM_IsActiveFlag_CC2
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Clear the Capture/Compare 3 interrupt flag (CC3F).
+  * @rmtoll SR           CC3IF         LL_TIM_ClearFlag_CC3
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx)
+{
+  WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF));
+}
+
+/**
+  * @brief  Indicate whether Capture/Compare 3 interrupt flag (CC3F) is set (Capture/Compare 3 interrupt is pending).
+  * @rmtoll SR           CC3IF         LL_TIM_IsActiveFlag_CC3
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Clear the Capture/Compare 4 interrupt flag (CC4F).
+  * @rmtoll SR           CC4IF         LL_TIM_ClearFlag_CC4
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx)
+{
+  WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF));
+}
+
+/**
+  * @brief  Indicate whether Capture/Compare 4 interrupt flag (CC4F) is set (Capture/Compare 4 interrupt is pending).
+  * @rmtoll SR           CC4IF         LL_TIM_IsActiveFlag_CC4
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Clear the commutation interrupt flag (COMIF).
+  * @rmtoll SR           COMIF         LL_TIM_ClearFlag_COM
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx)
+{
+  WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF));
+}
+
+/**
+  * @brief  Indicate whether commutation interrupt flag (COMIF) is set (commutation interrupt is pending).
+  * @rmtoll SR           COMIF         LL_TIM_IsActiveFlag_COM
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Clear the trigger interrupt flag (TIF).
+  * @rmtoll SR           TIF           LL_TIM_ClearFlag_TRIG
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx)
+{
+  WRITE_REG(TIMx->SR, ~(TIM_SR_TIF));
+}
+
+/**
+  * @brief  Indicate whether trigger interrupt flag (TIF) is set (trigger interrupt is pending).
+  * @rmtoll SR           TIF           LL_TIM_IsActiveFlag_TRIG
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Clear the break interrupt flag (BIF).
+  * @rmtoll SR           BIF           LL_TIM_ClearFlag_BRK
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx)
+{
+  WRITE_REG(TIMx->SR, ~(TIM_SR_BIF));
+}
+
+/**
+  * @brief  Indicate whether break interrupt flag (BIF) is set (break interrupt is pending).
+  * @rmtoll SR           BIF           LL_TIM_IsActiveFlag_BRK
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Clear the Capture/Compare 1 over-capture interrupt flag (CC1OF).
+  * @rmtoll SR           CC1OF         LL_TIM_ClearFlag_CC1OVR
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)
+{
+  WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF));
+}
+
+/**
+  * @brief  Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set
+  *         (Capture/Compare 1 interrupt is pending).
+  * @rmtoll SR           CC1OF         LL_TIM_IsActiveFlag_CC1OVR
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Clear the Capture/Compare 2 over-capture interrupt flag (CC2OF).
+  * @rmtoll SR           CC2OF         LL_TIM_ClearFlag_CC2OVR
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)
+{
+  WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF));
+}
+
+/**
+  * @brief  Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set
+  *         (Capture/Compare 2 over-capture interrupt is pending).
+  * @rmtoll SR           CC2OF         LL_TIM_IsActiveFlag_CC2OVR
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Clear the Capture/Compare 3 over-capture interrupt flag (CC3OF).
+  * @rmtoll SR           CC3OF         LL_TIM_ClearFlag_CC3OVR
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)
+{
+  WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF));
+}
+
+/**
+  * @brief  Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set
+  *         (Capture/Compare 3 over-capture interrupt is pending).
+  * @rmtoll SR           CC3OF         LL_TIM_IsActiveFlag_CC3OVR
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF).
+  * @rmtoll SR           CC4OF         LL_TIM_ClearFlag_CC4OVR
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)
+{
+  WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF));
+}
+
+/**
+  * @brief  Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set
+  *         (Capture/Compare 4 over-capture interrupt is pending).
+  * @rmtoll SR           CC4OF         LL_TIM_IsActiveFlag_CC4OVR
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EF_IT_Management IT-Management
+  * @{
+  */
+/**
+  * @brief  Enable update interrupt (UIE).
+  * @rmtoll DIER         UIE           LL_TIM_EnableIT_UPDATE
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_UIE);
+}
+
+/**
+  * @brief  Disable update interrupt (UIE).
+  * @rmtoll DIER         UIE           LL_TIM_DisableIT_UPDATE
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE);
+}
+
+/**
+  * @brief  Indicates whether the update interrupt (UIE) is enabled.
+  * @rmtoll DIER         UIE           LL_TIM_IsEnabledIT_UPDATE
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable capture/compare 1 interrupt (CC1IE).
+  * @rmtoll DIER         CC1IE         LL_TIM_EnableIT_CC1
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_CC1IE);
+}
+
+/**
+  * @brief  Disable capture/compare 1  interrupt (CC1IE).
+  * @rmtoll DIER         CC1IE         LL_TIM_DisableIT_CC1
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE);
+}
+
+/**
+  * @brief  Indicates whether the capture/compare 1 interrupt (CC1IE) is enabled.
+  * @rmtoll DIER         CC1IE         LL_TIM_IsEnabledIT_CC1
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable capture/compare 2 interrupt (CC2IE).
+  * @rmtoll DIER         CC2IE         LL_TIM_EnableIT_CC2
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_CC2IE);
+}
+
+/**
+  * @brief  Disable capture/compare 2  interrupt (CC2IE).
+  * @rmtoll DIER         CC2IE         LL_TIM_DisableIT_CC2
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE);
+}
+
+/**
+  * @brief  Indicates whether the capture/compare 2 interrupt (CC2IE) is enabled.
+  * @rmtoll DIER         CC2IE         LL_TIM_IsEnabledIT_CC2
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable capture/compare 3 interrupt (CC3IE).
+  * @rmtoll DIER         CC3IE         LL_TIM_EnableIT_CC3
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_CC3IE);
+}
+
+/**
+  * @brief  Disable capture/compare 3  interrupt (CC3IE).
+  * @rmtoll DIER         CC3IE         LL_TIM_DisableIT_CC3
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE);
+}
+
+/**
+  * @brief  Indicates whether the capture/compare 3 interrupt (CC3IE) is enabled.
+  * @rmtoll DIER         CC3IE         LL_TIM_IsEnabledIT_CC3
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable capture/compare 4 interrupt (CC4IE).
+  * @rmtoll DIER         CC4IE         LL_TIM_EnableIT_CC4
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_CC4IE);
+}
+
+/**
+  * @brief  Disable capture/compare 4  interrupt (CC4IE).
+  * @rmtoll DIER         CC4IE         LL_TIM_DisableIT_CC4
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE);
+}
+
+/**
+  * @brief  Indicates whether the capture/compare 4 interrupt (CC4IE) is enabled.
+  * @rmtoll DIER         CC4IE         LL_TIM_IsEnabledIT_CC4
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable commutation interrupt (COMIE).
+  * @rmtoll DIER         COMIE         LL_TIM_EnableIT_COM
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableIT_COM(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_COMIE);
+}
+
+/**
+  * @brief  Disable commutation interrupt (COMIE).
+  * @rmtoll DIER         COMIE         LL_TIM_DisableIT_COM
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_COMIE);
+}
+
+/**
+  * @brief  Indicates whether the commutation interrupt (COMIE) is enabled.
+  * @rmtoll DIER         COMIE         LL_TIM_IsEnabledIT_COM
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable trigger interrupt (TIE).
+  * @rmtoll DIER         TIE           LL_TIM_EnableIT_TRIG
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_TIE);
+}
+
+/**
+  * @brief  Disable trigger interrupt (TIE).
+  * @rmtoll DIER         TIE           LL_TIM_DisableIT_TRIG
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE);
+}
+
+/**
+  * @brief  Indicates whether the trigger interrupt (TIE) is enabled.
+  * @rmtoll DIER         TIE           LL_TIM_IsEnabledIT_TRIG
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable break interrupt (BIE).
+  * @rmtoll DIER         BIE           LL_TIM_EnableIT_BRK
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_BIE);
+}
+
+/**
+  * @brief  Disable break interrupt (BIE).
+  * @rmtoll DIER         BIE           LL_TIM_DisableIT_BRK
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_BIE);
+}
+
+/**
+  * @brief  Indicates whether the break interrupt (BIE) is enabled.
+  * @rmtoll DIER         BIE           LL_TIM_IsEnabledIT_BRK
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE)) ? 1UL : 0UL);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EF_DMA_Management DMA-Management
+  * @{
+  */
+/**
+  * @brief  Enable update DMA request (UDE).
+  * @rmtoll DIER         UDE           LL_TIM_EnableDMAReq_UPDATE
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_UDE);
+}
+
+/**
+  * @brief  Disable update DMA request (UDE).
+  * @rmtoll DIER         UDE           LL_TIM_DisableDMAReq_UPDATE
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE);
+}
+
+/**
+  * @brief  Indicates whether the update DMA request  (UDE) is enabled.
+  * @rmtoll DIER         UDE           LL_TIM_IsEnabledDMAReq_UPDATE
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable capture/compare 1 DMA request (CC1DE).
+  * @rmtoll DIER         CC1DE         LL_TIM_EnableDMAReq_CC1
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_CC1DE);
+}
+
+/**
+  * @brief  Disable capture/compare 1  DMA request (CC1DE).
+  * @rmtoll DIER         CC1DE         LL_TIM_DisableDMAReq_CC1
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE);
+}
+
+/**
+  * @brief  Indicates whether the capture/compare 1 DMA request (CC1DE) is enabled.
+  * @rmtoll DIER         CC1DE         LL_TIM_IsEnabledDMAReq_CC1
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable capture/compare 2 DMA request (CC2DE).
+  * @rmtoll DIER         CC2DE         LL_TIM_EnableDMAReq_CC2
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_CC2DE);
+}
+
+/**
+  * @brief  Disable capture/compare 2  DMA request (CC2DE).
+  * @rmtoll DIER         CC2DE         LL_TIM_DisableDMAReq_CC2
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE);
+}
+
+/**
+  * @brief  Indicates whether the capture/compare 2 DMA request (CC2DE) is enabled.
+  * @rmtoll DIER         CC2DE         LL_TIM_IsEnabledDMAReq_CC2
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable capture/compare 3 DMA request (CC3DE).
+  * @rmtoll DIER         CC3DE         LL_TIM_EnableDMAReq_CC3
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_CC3DE);
+}
+
+/**
+  * @brief  Disable capture/compare 3  DMA request (CC3DE).
+  * @rmtoll DIER         CC3DE         LL_TIM_DisableDMAReq_CC3
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE);
+}
+
+/**
+  * @brief  Indicates whether the capture/compare 3 DMA request (CC3DE) is enabled.
+  * @rmtoll DIER         CC3DE         LL_TIM_IsEnabledDMAReq_CC3
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable capture/compare 4 DMA request (CC4DE).
+  * @rmtoll DIER         CC4DE         LL_TIM_EnableDMAReq_CC4
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_CC4DE);
+}
+
+/**
+  * @brief  Disable capture/compare 4  DMA request (CC4DE).
+  * @rmtoll DIER         CC4DE         LL_TIM_DisableDMAReq_CC4
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE);
+}
+
+/**
+  * @brief  Indicates whether the capture/compare 4 DMA request (CC4DE) is enabled.
+  * @rmtoll DIER         CC4DE         LL_TIM_IsEnabledDMAReq_CC4
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable commutation DMA request (COMDE).
+  * @rmtoll DIER         COMDE         LL_TIM_EnableDMAReq_COM
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableDMAReq_COM(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_COMDE);
+}
+
+/**
+  * @brief  Disable commutation DMA request (COMDE).
+  * @rmtoll DIER         COMDE         LL_TIM_DisableDMAReq_COM
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableDMAReq_COM(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_COMDE);
+}
+
+/**
+  * @brief  Indicates whether the commutation DMA request (COMDE) is enabled.
+  * @rmtoll DIER         COMDE         LL_TIM_IsEnabledDMAReq_COM
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE)) ? 1UL : 0UL);
+}
+
+/**
+  * @brief  Enable trigger interrupt (TDE).
+  * @rmtoll DIER         TDE           LL_TIM_EnableDMAReq_TRIG
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->DIER, TIM_DIER_TDE);
+}
+
+/**
+  * @brief  Disable trigger interrupt (TDE).
+  * @rmtoll DIER         TDE           LL_TIM_DisableDMAReq_TRIG
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx)
+{
+  CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE);
+}
+
+/**
+  * @brief  Indicates whether the trigger interrupt (TDE) is enabled.
+  * @rmtoll DIER         TDE           LL_TIM_IsEnabledDMAReq_TRIG
+  * @param  TIMx Timer instance
+  * @retval State of bit (1 or 0).
+  */
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(TIM_TypeDef *TIMx)
+{
+  return ((READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)) ? 1UL : 0UL);
+}
+
+/**
+  * @}
+  */
+
+/** @defgroup TIM_LL_EF_EVENT_Management EVENT-Management
+  * @{
+  */
+/**
+  * @brief  Generate an update event.
+  * @rmtoll EGR          UG            LL_TIM_GenerateEvent_UPDATE
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->EGR, TIM_EGR_UG);
+}
+
+/**
+  * @brief  Generate Capture/Compare 1 event.
+  * @rmtoll EGR          CC1G          LL_TIM_GenerateEvent_CC1
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->EGR, TIM_EGR_CC1G);
+}
+
+/**
+  * @brief  Generate Capture/Compare 2 event.
+  * @rmtoll EGR          CC2G          LL_TIM_GenerateEvent_CC2
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->EGR, TIM_EGR_CC2G);
+}
+
+/**
+  * @brief  Generate Capture/Compare 3 event.
+  * @rmtoll EGR          CC3G          LL_TIM_GenerateEvent_CC3
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->EGR, TIM_EGR_CC3G);
+}
+
+/**
+  * @brief  Generate Capture/Compare 4 event.
+  * @rmtoll EGR          CC4G          LL_TIM_GenerateEvent_CC4
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->EGR, TIM_EGR_CC4G);
+}
+
+/**
+  * @brief  Generate commutation event.
+  * @rmtoll EGR          COMG          LL_TIM_GenerateEvent_COM
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_GenerateEvent_COM(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->EGR, TIM_EGR_COMG);
+}
+
+/**
+  * @brief  Generate trigger event.
+  * @rmtoll EGR          TG            LL_TIM_GenerateEvent_TRIG
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->EGR, TIM_EGR_TG);
+}
+
+/**
+  * @brief  Generate break event.
+  * @rmtoll EGR          BG            LL_TIM_GenerateEvent_BRK
+  * @param  TIMx Timer instance
+  * @retval None
+  */
+__STATIC_INLINE void LL_TIM_GenerateEvent_BRK(TIM_TypeDef *TIMx)
+{
+  SET_BIT(TIMx->EGR, TIM_EGR_BG);
+}
+
+/**
+  * @}
+  */
+
+#if defined(USE_FULL_LL_DRIVER)
+/** @defgroup TIM_LL_EF_Init Initialisation and deinitialisation functions
+  * @{
+  */
+
+ErrorStatus LL_TIM_DeInit(TIM_TypeDef *TIMx);
+void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct);
+ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct);
+void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
+ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
+void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
+ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct);
+void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
+ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
+void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct);
+ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct);
+void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);
+ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);
+/**
+  * @}
+  */
+#endif /* USE_FULL_LL_DRIVER */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* TIM1 || TIM2 || TIM3 || TIM4 || TIM5 || TIM6 || TIM7 || TIM8 || TIM9 || TIM10 || TIM11 || TIM12 || TIM13 || TIM14  || TIM15 || TIM16 || TIM17 */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F1xx_LL_TIM_H */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_utils.h b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_utils.h
new file mode 100644
index 0000000..681ef89
--- /dev/null
+++ b/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_utils.h
@@ -0,0 +1,272 @@
+/**
+  ******************************************************************************
+  * @file    stm32f1xx_ll_utils.h
+  * @author  MCD Application Team
+  * @brief   Header file of UTILS LL module.
+  @verbatim
+  ==============================================================================
+                     ##### How to use this driver #####
+  ==============================================================================
+    [..]
+    The LL UTILS driver contains a set of generic APIs that can be
+    used by user:
+      (+) Device electronic signature
+      (+) Timing functions
+      (+) PLL configuration functions
+
+  @endverbatim
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_LL_UTILS_H
+#define __STM32F1xx_LL_UTILS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx.h"
+
+/** @addtogroup STM32F1xx_LL_Driver
+  * @{
+  */
+
+/** @defgroup UTILS_LL UTILS
+  * @{
+  */
+
+/* Private types -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+/* Private constants ---------------------------------------------------------*/
+/** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
+  * @{
+  */
+
+/* Max delay can be used in LL_mDelay */
+#define LL_MAX_DELAY                  0xFFFFFFFFU
+
+/**
+ * @brief Unique device ID register base address
+ */
+#define UID_BASE_ADDRESS              UID_BASE
+
+/**
+ * @brief Flash size data register base address
+ */
+#define FLASHSIZE_BASE_ADDRESS        FLASHSIZE_BASE
+
+/**
+  * @}
+  */
+
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
+  * @{
+  */
+/**
+  * @}
+  */
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
+  * @{
+  */
+/**
+  * @brief  UTILS PLL structure definition
+  */
+typedef struct
+{
+  uint32_t PLLMul;   /*!< Multiplication factor for PLL VCO input clock.
+                          This parameter can be a value of @ref RCC_LL_EC_PLL_MUL
+
+                          This feature can be modified afterwards using unitary function
+                          @ref LL_RCC_PLL_ConfigDomain_SYS(). */
+
+  uint32_t Prediv;   /*!< Division factor for HSE used as PLL clock source.
+                          This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV
+
+                          This feature can be modified afterwards using unitary function
+                          @ref LL_RCC_PLL_ConfigDomain_SYS(). */
+} LL_UTILS_PLLInitTypeDef;
+
+/**
+  * @brief  UTILS System, AHB and APB buses clock configuration structure definition
+  */
+typedef struct
+{
+  uint32_t AHBCLKDivider;         /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
+                                       This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
+
+                                       This feature can be modified afterwards using unitary function
+                                       @ref LL_RCC_SetAHBPrescaler(). */
+
+  uint32_t APB1CLKDivider;        /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
+                                       This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
+
+                                       This feature can be modified afterwards using unitary function
+                                       @ref LL_RCC_SetAPB1Prescaler(). */
+
+  uint32_t APB2CLKDivider;        /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
+                                       This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
+
+                                       This feature can be modified afterwards using unitary function
+                                       @ref LL_RCC_SetAPB2Prescaler(). */
+
+} LL_UTILS_ClkInitTypeDef;
+
+/**
+  * @}
+  */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
+  * @{
+  */
+
+/** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
+  * @{
+  */
+#define LL_UTILS_HSEBYPASS_OFF        0x00000000U       /*!< HSE Bypass is not enabled                */
+#define LL_UTILS_HSEBYPASS_ON         0x00000001U       /*!< HSE Bypass is enabled                    */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/* Exported macro ------------------------------------------------------------*/
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
+  * @{
+  */
+
+/** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
+  * @{
+  */
+
+/**
+  * @brief  Get Word0 of the unique device identifier (UID based on 96 bits)
+  * @retval UID[31:0]
+  */
+__STATIC_INLINE uint32_t LL_GetUID_Word0(void)
+{
+  return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
+}
+
+/**
+  * @brief  Get Word1 of the unique device identifier (UID based on 96 bits)
+  * @retval UID[63:32]
+  */
+__STATIC_INLINE uint32_t LL_GetUID_Word1(void)
+{
+  return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
+}
+
+/**
+  * @brief  Get Word2 of the unique device identifier (UID based on 96 bits)
+  * @retval UID[95:64]
+  */
+__STATIC_INLINE uint32_t LL_GetUID_Word2(void)
+{
+  return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
+}
+
+/**
+  * @brief  Get Flash memory size
+  * @note   This bitfield indicates the size of the device Flash memory expressed in
+  *         Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
+  * @retval FLASH_SIZE[15:0]: Flash memory size
+  */
+__STATIC_INLINE uint32_t LL_GetFlashSize(void)
+{
+  return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
+}
+
+
+/**
+  * @}
+  */
+
+/** @defgroup UTILS_LL_EF_DELAY DELAY
+  * @{
+  */
+
+/**
+  * @brief  This function configures the Cortex-M SysTick source of the time base.
+  * @param  HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
+  * @note   When a RTOS is used, it is recommended to avoid changing the SysTick
+  *         configuration by calling this function, for a delay use rather osDelay RTOS service.
+  * @param  Ticks Number of ticks
+  * @retval None
+  */
+__STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
+{
+  /* Configure the SysTick to have interrupt in 1ms time base */
+  SysTick->LOAD  = (uint32_t)((HCLKFrequency / Ticks) - 1UL);  /* set reload register */
+  SysTick->VAL   = 0UL;                                       /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_ENABLE_Msk;                   /* Enable the Systick Timer */
+}
+
+void        LL_Init1msTick(uint32_t HCLKFrequency);
+void        LL_mDelay(uint32_t Delay);
+
+/**
+  * @}
+  */
+
+/** @defgroup UTILS_EF_SYSTEM SYSTEM
+  * @{
+  */
+
+void        LL_SetSystemCoreClock(uint32_t HCLKFrequency);
+#if defined(FLASH_ACR_LATENCY)
+ErrorStatus LL_SetFlashLatency(uint32_t Frequency);
+#endif /* FLASH_ACR_LATENCY */
+ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
+                                         LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
+ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
+                                         LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
+#if defined(RCC_PLL2_SUPPORT)
+ErrorStatus LL_PLL_ConfigSystemClock_PLL2(uint32_t HSEFrequency, uint32_t HSEBypass, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
+                                          LL_UTILS_PLLInitTypeDef *UTILS_PLL2InitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
+#endif /* RCC_PLL2_SUPPORT */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F1xx_LL_UTILS_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/STM32F103ZETX_FLASH.ld b/STM32F103ZETX_FLASH.ld
index c7beb2d..7d781ff 100644
--- a/STM32F103ZETX_FLASH.ld
+++ b/STM32F103ZETX_FLASH.ld
@@ -39,8 +39,8 @@ ENTRY(Reset_Handler)
 /* Highest address of the user mode stack */
 _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
 
-_Min_Heap_Size = 0x400 ; /* required amount of heap */
-_Min_Stack_Size = 0x800 ; /* required amount of stack */
+_Min_Heap_Size = 0x400; /* required amount of heap */
+_Min_Stack_Size = 0x800; /* required amount of stack */
 
 /* Memories definition */
 MEMORY
diff --git a/SW_APPs/windows.c b/SW_APPs/windows.c
index ab7e722..708dc40 100644
--- a/SW_APPs/windows.c
+++ b/SW_APPs/windows.c
@@ -392,7 +392,7 @@ void UI_Server(UI *ui)
 								switch(hit_flag)
 								{
 								case CLOSE:
-									//Close_Windows_Stack(ui,temp_windows_stack);
+									Close_Windows_Stack(ui,temp_windows_stack);
 									ui->refresh_ui_flag=1;                          //发生了变化 刷新ui的显示
 									break;
 								case BAR:
@@ -421,8 +421,8 @@ void UI_Server(UI *ui)
 			}else
 			{
 				temp_window=ui->moveed_windwos;
-				temp_window->x=t_x-ui->move_x;
-				temp_window->y=t_y-ui->move_y;
+				temp_window->x=(t_x-ui->move_x);
+				temp_window->y=(t_y-ui->move_y);
 				ui->refresh_ui_flag=1;
 				//发生了变化 刷新ui的显示
 			}
diff --git a/m3s Debug.launch b/m3s Debug.launch
index c574443..8ced4a7 100644
--- a/m3s Debug.launch	
+++ b/m3s Debug.launch	
@@ -38,7 +38,7 @@
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_txt_serial_number" value=""/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.watchdog_config" value="none"/>
     <booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkenable_rtos" value="false"/>
-    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkrestart_configurations" value="{&quot;fItems&quot;:[{&quot;fDisplayName&quot;:&quot;Reset&quot;,&quot;fIsSuppressible&quot;:false,&quot;fResetAttribute&quot;:&quot;Software system reset&quot;,&quot;fResetStrategies&quot;:[{&quot;fDisplayName&quot;:&quot;Software system reset&quot;,&quot;fLaunchAttribute&quot;:&quot;system_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset\r\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;Hardware reset&quot;,&quot;fLaunchAttribute&quot;:&quot;hardware_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset hardware\r\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;Core reset&quot;,&quot;fLaunchAttribute&quot;:&quot;core_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset core\r\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;None&quot;,&quot;fLaunchAttribute&quot;:&quot;no_reset&quot;,&quot;fGdbCommands&quot;:[],&quot;fCmdOptions&quot;:[&quot;-g&quot;]}],&quot;fGdbCommandGroup&quot;:{&quot;name&quot;:&quot;Additional commands&quot;,&quot;commands&quot;:[]}}]}"/>
+    <stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkrestart_configurations" value="{&quot;fVersion&quot;:1,&quot;fItems&quot;:[{&quot;fDisplayName&quot;:&quot;Reset&quot;,&quot;fIsSuppressible&quot;:false,&quot;fResetAttribute&quot;:&quot;Software system reset&quot;,&quot;fResetStrategies&quot;:[{&quot;fDisplayName&quot;:&quot;Software system reset&quot;,&quot;fLaunchAttribute&quot;:&quot;system_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset\r\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;Hardware reset&quot;,&quot;fLaunchAttribute&quot;:&quot;hardware_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset hardware\r\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;Core reset&quot;,&quot;fLaunchAttribute&quot;:&quot;core_reset&quot;,&quot;fGdbCommands&quot;:[&quot;monitor reset core\r\n&quot;],&quot;fCmdOptions&quot;:[&quot;-g&quot;]},{&quot;fDisplayName&quot;:&quot;None&quot;,&quot;fLaunchAttribute&quot;:&quot;no_reset&quot;,&quot;fGdbCommands&quot;:[],&quot;fCmdOptions&quot;:[&quot;-g&quot;]}],&quot;fGdbCommandGroup&quot;:{&quot;name&quot;:&quot;Additional commands&quot;,&quot;commands&quot;:[]},&quot;fStartApplication&quot;:true}]}"/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.swv.datatrace_0" value="Enabled=true:Address=0x0:Access=Read/Write:Size=Word:Function=Data Value"/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.swv.datatrace_1" value="Enabled=false:Address=0x0:Access=Read/Write:Size=Word:Function=Data Value"/>
     <stringAttribute key="com.st.stm32cube.ide.mcu.debug.swv.datatrace_2" value="Enabled=false:Address=0x0:Access=Read/Write:Size=Word:Function=Data Value"/>
diff --git a/m3s.ioc b/m3s.ioc
index cb3614f..f13b826 100644
--- a/m3s.ioc
+++ b/m3s.ioc
@@ -1,4 +1,7 @@
 #MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
 FSMC.AddressSetupTime1=0
 FSMC.BusTurnAroundDuration1=0
 FSMC.DataSetupTime1=1
@@ -6,6 +9,7 @@ FSMC.IPParameters=AddressSetupTime1,DataSetupTime1,BusTurnAroundDuration1
 File.Version=6
 GPIO.groupedBy=Group By Peripherals
 KeepUserPlacement=false
+Mcu.CPN=STM32F103ZET6
 Mcu.Family=STM32F1
 Mcu.IP0=FSMC
 Mcu.IP1=I2C2
@@ -70,21 +74,21 @@ Mcu.PinsNb=48
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32F103ZETx
-MxCube.Version=6.3.0
-MxDb.Version=DB.6.0.30
-NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
-NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.ForceEnableDMAVector=true
-NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
-NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
-NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
-NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
-NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
-NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true
-NVIC.TIM4_IRQn=true\:0\:0\:false\:false\:true\:true\:true
-NVIC.TIM6_IRQn=true\:0\:0\:false\:false\:true\:true\:true
-NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
+NVIC.TIM4_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.TIM6_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 OSC_IN.Mode=HSE-External-Oscillator
 OSC_IN.Signal=RCC_OSC_IN
 OSC_OUT.Mode=HSE-External-Oscillator
@@ -216,7 +220,7 @@ ProjectManager.FreePins=false
 ProjectManager.HalAssertFull=false
 ProjectManager.HeapSize=0x400
 ProjectManager.KeepUserCode=true
-ProjectManager.LastFirmware=true
+ProjectManager.LastFirmware=false
 ProjectManager.LibraryCopy=1
 ProjectManager.MainLocation=Core/Src
 ProjectManager.NoMain=false
@@ -224,10 +228,13 @@ ProjectManager.PreviousToolchain=STM32CubeIDE
 ProjectManager.ProjectBuild=false
 ProjectManager.ProjectFileName=m3s.ioc
 ProjectManager.ProjectName=m3s
+ProjectManager.ProjectStructure=
 ProjectManager.RegisterCallBack=
 ProjectManager.StackSize=0x800
 ProjectManager.TargetToolchain=STM32CubeIDE
 ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
 ProjectManager.UnderRoot=true
 ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_FSMC_Init-FSMC-false-HAL-true,4-MX_I2C2_Init-I2C2-false-HAL-true,5-MX_TIM6_Init-TIM6-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true,7-MX_TIM4_Init-TIM4-false-HAL-true
 RCC.ADCFreqValue=36000000
@@ -314,4 +321,3 @@ VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT
 VP_TIM6_VS_ClockSourceINT.Mode=Enable_Timer
 VP_TIM6_VS_ClockSourceINT.Signal=TIM6_VS_ClockSourceINT
 board=custom
-isbadioc=false