m3s.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000a4d0 080001e8 080001e8 000101e8 2**3 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000fb4 0800a6b8 0800a6b8 0001a6b8 2**3 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 0800b66c 0800b66c 000201e4 2**0 CONTENTS 4 .ARM 00000000 0800b66c 0800b66c 000201e4 2**0 CONTENTS 5 .preinit_array 00000000 0800b66c 0800b66c 000201e4 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 0800b66c 0800b66c 0001b66c 2**2 CONTENTS, ALLOC, LOAD, DATA 7 .fini_array 00000004 0800b670 0800b670 0001b670 2**2 CONTENTS, ALLOC, LOAD, DATA 8 .data 000001e4 20000000 0800b674 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 00002364 200001e4 0800b858 000201e4 2**2 ALLOC 10 ._user_heap_stack 00000c00 20002548 0800b858 00022548 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 000201e4 2**0 CONTENTS, READONLY 12 .debug_info 0001bb92 00000000 00000000 0002020d 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 00003d70 00000000 00000000 0003bd9f 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 000013a8 00000000 00000000 0003fb10 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_ranges 00001250 00000000 00000000 00040eb8 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 0001e8fd 00000000 00000000 00042108 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 00019533 00000000 00000000 00060a05 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 000a103e 00000000 00000000 00079f38 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000053 00000000 00000000 0011af76 2**0 CONTENTS, READONLY 20 .debug_frame 00006560 00000000 00000000 0011afcc 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080001e8 <__do_global_dtors_aux>: 80001e8: b510 push {r4, lr} 80001ea: 4c05 ldr r4, [pc, #20] ; (8000200 <__do_global_dtors_aux+0x18>) 80001ec: 7823 ldrb r3, [r4, #0] 80001ee: b933 cbnz r3, 80001fe <__do_global_dtors_aux+0x16> 80001f0: 4b04 ldr r3, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x1c>) 80001f2: b113 cbz r3, 80001fa <__do_global_dtors_aux+0x12> 80001f4: 4804 ldr r0, [pc, #16] ; (8000208 <__do_global_dtors_aux+0x20>) 80001f6: f3af 8000 nop.w 80001fa: 2301 movs r3, #1 80001fc: 7023 strb r3, [r4, #0] 80001fe: bd10 pop {r4, pc} 8000200: 200001e4 .word 0x200001e4 8000204: 00000000 .word 0x00000000 8000208: 0800a6a0 .word 0x0800a6a0 0800020c : 800020c: b508 push {r3, lr} 800020e: 4b03 ldr r3, [pc, #12] ; (800021c ) 8000210: b11b cbz r3, 800021a 8000212: 4903 ldr r1, [pc, #12] ; (8000220 ) 8000214: 4803 ldr r0, [pc, #12] ; (8000224 ) 8000216: f3af 8000 nop.w 800021a: bd08 pop {r3, pc} 800021c: 00000000 .word 0x00000000 8000220: 200001e8 .word 0x200001e8 8000224: 0800a6a0 .word 0x0800a6a0 08000228 : 8000228: 4603 mov r3, r0 800022a: f813 2b01 ldrb.w r2, [r3], #1 800022e: 2a00 cmp r2, #0 8000230: d1fb bne.n 800022a 8000232: 1a18 subs r0, r3, r0 8000234: 3801 subs r0, #1 8000236: 4770 bx lr 08000238 <__aeabi_drsub>: 8000238: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000 800023c: e002 b.n 8000244 <__adddf3> 800023e: bf00 nop 08000240 <__aeabi_dsub>: 8000240: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000 08000244 <__adddf3>: 8000244: b530 push {r4, r5, lr} 8000246: ea4f 0441 mov.w r4, r1, lsl #1 800024a: ea4f 0543 mov.w r5, r3, lsl #1 800024e: ea94 0f05 teq r4, r5 8000252: bf08 it eq 8000254: ea90 0f02 teqeq r0, r2 8000258: bf1f itttt ne 800025a: ea54 0c00 orrsne.w ip, r4, r0 800025e: ea55 0c02 orrsne.w ip, r5, r2 8000262: ea7f 5c64 mvnsne.w ip, r4, asr #21 8000266: ea7f 5c65 mvnsne.w ip, r5, asr #21 800026a: f000 80e2 beq.w 8000432 <__adddf3+0x1ee> 800026e: ea4f 5454 mov.w r4, r4, lsr #21 8000272: ebd4 5555 rsbs r5, r4, r5, lsr #21 8000276: bfb8 it lt 8000278: 426d neglt r5, r5 800027a: dd0c ble.n 8000296 <__adddf3+0x52> 800027c: 442c add r4, r5 800027e: ea80 0202 eor.w r2, r0, r2 8000282: ea81 0303 eor.w r3, r1, r3 8000286: ea82 0000 eor.w r0, r2, r0 800028a: ea83 0101 eor.w r1, r3, r1 800028e: ea80 0202 eor.w r2, r0, r2 8000292: ea81 0303 eor.w r3, r1, r3 8000296: 2d36 cmp r5, #54 ; 0x36 8000298: bf88 it hi 800029a: bd30 pophi {r4, r5, pc} 800029c: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 80002a0: ea4f 3101 mov.w r1, r1, lsl #12 80002a4: f44f 1c80 mov.w ip, #1048576 ; 0x100000 80002a8: ea4c 3111 orr.w r1, ip, r1, lsr #12 80002ac: d002 beq.n 80002b4 <__adddf3+0x70> 80002ae: 4240 negs r0, r0 80002b0: eb61 0141 sbc.w r1, r1, r1, lsl #1 80002b4: f013 4f00 tst.w r3, #2147483648 ; 0x80000000 80002b8: ea4f 3303 mov.w r3, r3, lsl #12 80002bc: ea4c 3313 orr.w r3, ip, r3, lsr #12 80002c0: d002 beq.n 80002c8 <__adddf3+0x84> 80002c2: 4252 negs r2, r2 80002c4: eb63 0343 sbc.w r3, r3, r3, lsl #1 80002c8: ea94 0f05 teq r4, r5 80002cc: f000 80a7 beq.w 800041e <__adddf3+0x1da> 80002d0: f1a4 0401 sub.w r4, r4, #1 80002d4: f1d5 0e20 rsbs lr, r5, #32 80002d8: db0d blt.n 80002f6 <__adddf3+0xb2> 80002da: fa02 fc0e lsl.w ip, r2, lr 80002de: fa22 f205 lsr.w r2, r2, r5 80002e2: 1880 adds r0, r0, r2 80002e4: f141 0100 adc.w r1, r1, #0 80002e8: fa03 f20e lsl.w r2, r3, lr 80002ec: 1880 adds r0, r0, r2 80002ee: fa43 f305 asr.w r3, r3, r5 80002f2: 4159 adcs r1, r3 80002f4: e00e b.n 8000314 <__adddf3+0xd0> 80002f6: f1a5 0520 sub.w r5, r5, #32 80002fa: f10e 0e20 add.w lr, lr, #32 80002fe: 2a01 cmp r2, #1 8000300: fa03 fc0e lsl.w ip, r3, lr 8000304: bf28 it cs 8000306: f04c 0c02 orrcs.w ip, ip, #2 800030a: fa43 f305 asr.w r3, r3, r5 800030e: 18c0 adds r0, r0, r3 8000310: eb51 71e3 adcs.w r1, r1, r3, asr #31 8000314: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 8000318: d507 bpl.n 800032a <__adddf3+0xe6> 800031a: f04f 0e00 mov.w lr, #0 800031e: f1dc 0c00 rsbs ip, ip, #0 8000322: eb7e 0000 sbcs.w r0, lr, r0 8000326: eb6e 0101 sbc.w r1, lr, r1 800032a: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000 800032e: d31b bcc.n 8000368 <__adddf3+0x124> 8000330: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000 8000334: d30c bcc.n 8000350 <__adddf3+0x10c> 8000336: 0849 lsrs r1, r1, #1 8000338: ea5f 0030 movs.w r0, r0, rrx 800033c: ea4f 0c3c mov.w ip, ip, rrx 8000340: f104 0401 add.w r4, r4, #1 8000344: ea4f 5244 mov.w r2, r4, lsl #21 8000348: f512 0f80 cmn.w r2, #4194304 ; 0x400000 800034c: f080 809a bcs.w 8000484 <__adddf3+0x240> 8000350: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000 8000354: bf08 it eq 8000356: ea5f 0c50 movseq.w ip, r0, lsr #1 800035a: f150 0000 adcs.w r0, r0, #0 800035e: eb41 5104 adc.w r1, r1, r4, lsl #20 8000362: ea41 0105 orr.w r1, r1, r5 8000366: bd30 pop {r4, r5, pc} 8000368: ea5f 0c4c movs.w ip, ip, lsl #1 800036c: 4140 adcs r0, r0 800036e: eb41 0101 adc.w r1, r1, r1 8000372: 3c01 subs r4, #1 8000374: bf28 it cs 8000376: f5b1 1f80 cmpcs.w r1, #1048576 ; 0x100000 800037a: d2e9 bcs.n 8000350 <__adddf3+0x10c> 800037c: f091 0f00 teq r1, #0 8000380: bf04 itt eq 8000382: 4601 moveq r1, r0 8000384: 2000 moveq r0, #0 8000386: fab1 f381 clz r3, r1 800038a: bf08 it eq 800038c: 3320 addeq r3, #32 800038e: f1a3 030b sub.w r3, r3, #11 8000392: f1b3 0220 subs.w r2, r3, #32 8000396: da0c bge.n 80003b2 <__adddf3+0x16e> 8000398: 320c adds r2, #12 800039a: dd08 ble.n 80003ae <__adddf3+0x16a> 800039c: f102 0c14 add.w ip, r2, #20 80003a0: f1c2 020c rsb r2, r2, #12 80003a4: fa01 f00c lsl.w r0, r1, ip 80003a8: fa21 f102 lsr.w r1, r1, r2 80003ac: e00c b.n 80003c8 <__adddf3+0x184> 80003ae: f102 0214 add.w r2, r2, #20 80003b2: bfd8 it le 80003b4: f1c2 0c20 rsble ip, r2, #32 80003b8: fa01 f102 lsl.w r1, r1, r2 80003bc: fa20 fc0c lsr.w ip, r0, ip 80003c0: bfdc itt le 80003c2: ea41 010c orrle.w r1, r1, ip 80003c6: 4090 lslle r0, r2 80003c8: 1ae4 subs r4, r4, r3 80003ca: bfa2 ittt ge 80003cc: eb01 5104 addge.w r1, r1, r4, lsl #20 80003d0: 4329 orrge r1, r5 80003d2: bd30 popge {r4, r5, pc} 80003d4: ea6f 0404 mvn.w r4, r4 80003d8: 3c1f subs r4, #31 80003da: da1c bge.n 8000416 <__adddf3+0x1d2> 80003dc: 340c adds r4, #12 80003de: dc0e bgt.n 80003fe <__adddf3+0x1ba> 80003e0: f104 0414 add.w r4, r4, #20 80003e4: f1c4 0220 rsb r2, r4, #32 80003e8: fa20 f004 lsr.w r0, r0, r4 80003ec: fa01 f302 lsl.w r3, r1, r2 80003f0: ea40 0003 orr.w r0, r0, r3 80003f4: fa21 f304 lsr.w r3, r1, r4 80003f8: ea45 0103 orr.w r1, r5, r3 80003fc: bd30 pop {r4, r5, pc} 80003fe: f1c4 040c rsb r4, r4, #12 8000402: f1c4 0220 rsb r2, r4, #32 8000406: fa20 f002 lsr.w r0, r0, r2 800040a: fa01 f304 lsl.w r3, r1, r4 800040e: ea40 0003 orr.w r0, r0, r3 8000412: 4629 mov r1, r5 8000414: bd30 pop {r4, r5, pc} 8000416: fa21 f004 lsr.w r0, r1, r4 800041a: 4629 mov r1, r5 800041c: bd30 pop {r4, r5, pc} 800041e: f094 0f00 teq r4, #0 8000422: f483 1380 eor.w r3, r3, #1048576 ; 0x100000 8000426: bf06 itte eq 8000428: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000 800042c: 3401 addeq r4, #1 800042e: 3d01 subne r5, #1 8000430: e74e b.n 80002d0 <__adddf3+0x8c> 8000432: ea7f 5c64 mvns.w ip, r4, asr #21 8000436: bf18 it ne 8000438: ea7f 5c65 mvnsne.w ip, r5, asr #21 800043c: d029 beq.n 8000492 <__adddf3+0x24e> 800043e: ea94 0f05 teq r4, r5 8000442: bf08 it eq 8000444: ea90 0f02 teqeq r0, r2 8000448: d005 beq.n 8000456 <__adddf3+0x212> 800044a: ea54 0c00 orrs.w ip, r4, r0 800044e: bf04 itt eq 8000450: 4619 moveq r1, r3 8000452: 4610 moveq r0, r2 8000454: bd30 pop {r4, r5, pc} 8000456: ea91 0f03 teq r1, r3 800045a: bf1e ittt ne 800045c: 2100 movne r1, #0 800045e: 2000 movne r0, #0 8000460: bd30 popne {r4, r5, pc} 8000462: ea5f 5c54 movs.w ip, r4, lsr #21 8000466: d105 bne.n 8000474 <__adddf3+0x230> 8000468: 0040 lsls r0, r0, #1 800046a: 4149 adcs r1, r1 800046c: bf28 it cs 800046e: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000 8000472: bd30 pop {r4, r5, pc} 8000474: f514 0480 adds.w r4, r4, #4194304 ; 0x400000 8000478: bf3c itt cc 800047a: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000 800047e: bd30 popcc {r4, r5, pc} 8000480: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 8000484: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000 8000488: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 800048c: f04f 0000 mov.w r0, #0 8000490: bd30 pop {r4, r5, pc} 8000492: ea7f 5c64 mvns.w ip, r4, asr #21 8000496: bf1a itte ne 8000498: 4619 movne r1, r3 800049a: 4610 movne r0, r2 800049c: ea7f 5c65 mvnseq.w ip, r5, asr #21 80004a0: bf1c itt ne 80004a2: 460b movne r3, r1 80004a4: 4602 movne r2, r0 80004a6: ea50 3401 orrs.w r4, r0, r1, lsl #12 80004aa: bf06 itte eq 80004ac: ea52 3503 orrseq.w r5, r2, r3, lsl #12 80004b0: ea91 0f03 teqeq r1, r3 80004b4: f441 2100 orrne.w r1, r1, #524288 ; 0x80000 80004b8: bd30 pop {r4, r5, pc} 80004ba: bf00 nop 080004bc <__aeabi_ui2d>: 80004bc: f090 0f00 teq r0, #0 80004c0: bf04 itt eq 80004c2: 2100 moveq r1, #0 80004c4: 4770 bxeq lr 80004c6: b530 push {r4, r5, lr} 80004c8: f44f 6480 mov.w r4, #1024 ; 0x400 80004cc: f104 0432 add.w r4, r4, #50 ; 0x32 80004d0: f04f 0500 mov.w r5, #0 80004d4: f04f 0100 mov.w r1, #0 80004d8: e750 b.n 800037c <__adddf3+0x138> 80004da: bf00 nop 080004dc <__aeabi_i2d>: 80004dc: f090 0f00 teq r0, #0 80004e0: bf04 itt eq 80004e2: 2100 moveq r1, #0 80004e4: 4770 bxeq lr 80004e6: b530 push {r4, r5, lr} 80004e8: f44f 6480 mov.w r4, #1024 ; 0x400 80004ec: f104 0432 add.w r4, r4, #50 ; 0x32 80004f0: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000 80004f4: bf48 it mi 80004f6: 4240 negmi r0, r0 80004f8: f04f 0100 mov.w r1, #0 80004fc: e73e b.n 800037c <__adddf3+0x138> 80004fe: bf00 nop 08000500 <__aeabi_f2d>: 8000500: 0042 lsls r2, r0, #1 8000502: ea4f 01e2 mov.w r1, r2, asr #3 8000506: ea4f 0131 mov.w r1, r1, rrx 800050a: ea4f 7002 mov.w r0, r2, lsl #28 800050e: bf1f itttt ne 8000510: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000 8000514: f093 4f7f teqne r3, #4278190080 ; 0xff000000 8000518: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000 800051c: 4770 bxne lr 800051e: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000 8000522: bf08 it eq 8000524: 4770 bxeq lr 8000526: f093 4f7f teq r3, #4278190080 ; 0xff000000 800052a: bf04 itt eq 800052c: f441 2100 orreq.w r1, r1, #524288 ; 0x80000 8000530: 4770 bxeq lr 8000532: b530 push {r4, r5, lr} 8000534: f44f 7460 mov.w r4, #896 ; 0x380 8000538: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 800053c: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 8000540: e71c b.n 800037c <__adddf3+0x138> 8000542: bf00 nop 08000544 <__aeabi_ul2d>: 8000544: ea50 0201 orrs.w r2, r0, r1 8000548: bf08 it eq 800054a: 4770 bxeq lr 800054c: b530 push {r4, r5, lr} 800054e: f04f 0500 mov.w r5, #0 8000552: e00a b.n 800056a <__aeabi_l2d+0x16> 08000554 <__aeabi_l2d>: 8000554: ea50 0201 orrs.w r2, r0, r1 8000558: bf08 it eq 800055a: 4770 bxeq lr 800055c: b530 push {r4, r5, lr} 800055e: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000 8000562: d502 bpl.n 800056a <__aeabi_l2d+0x16> 8000564: 4240 negs r0, r0 8000566: eb61 0141 sbc.w r1, r1, r1, lsl #1 800056a: f44f 6480 mov.w r4, #1024 ; 0x400 800056e: f104 0432 add.w r4, r4, #50 ; 0x32 8000572: ea5f 5c91 movs.w ip, r1, lsr #22 8000576: f43f aed8 beq.w 800032a <__adddf3+0xe6> 800057a: f04f 0203 mov.w r2, #3 800057e: ea5f 0cdc movs.w ip, ip, lsr #3 8000582: bf18 it ne 8000584: 3203 addne r2, #3 8000586: ea5f 0cdc movs.w ip, ip, lsr #3 800058a: bf18 it ne 800058c: 3203 addne r2, #3 800058e: eb02 02dc add.w r2, r2, ip, lsr #3 8000592: f1c2 0320 rsb r3, r2, #32 8000596: fa00 fc03 lsl.w ip, r0, r3 800059a: fa20 f002 lsr.w r0, r0, r2 800059e: fa01 fe03 lsl.w lr, r1, r3 80005a2: ea40 000e orr.w r0, r0, lr 80005a6: fa21 f102 lsr.w r1, r1, r2 80005aa: 4414 add r4, r2 80005ac: e6bd b.n 800032a <__adddf3+0xe6> 80005ae: bf00 nop 080005b0 <__aeabi_dmul>: 80005b0: b570 push {r4, r5, r6, lr} 80005b2: f04f 0cff mov.w ip, #255 ; 0xff 80005b6: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 80005ba: ea1c 5411 ands.w r4, ip, r1, lsr #20 80005be: bf1d ittte ne 80005c0: ea1c 5513 andsne.w r5, ip, r3, lsr #20 80005c4: ea94 0f0c teqne r4, ip 80005c8: ea95 0f0c teqne r5, ip 80005cc: f000 f8de bleq 800078c <__aeabi_dmul+0x1dc> 80005d0: 442c add r4, r5 80005d2: ea81 0603 eor.w r6, r1, r3 80005d6: ea21 514c bic.w r1, r1, ip, lsl #21 80005da: ea23 534c bic.w r3, r3, ip, lsl #21 80005de: ea50 3501 orrs.w r5, r0, r1, lsl #12 80005e2: bf18 it ne 80005e4: ea52 3503 orrsne.w r5, r2, r3, lsl #12 80005e8: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 80005ec: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 80005f0: d038 beq.n 8000664 <__aeabi_dmul+0xb4> 80005f2: fba0 ce02 umull ip, lr, r0, r2 80005f6: f04f 0500 mov.w r5, #0 80005fa: fbe1 e502 umlal lr, r5, r1, r2 80005fe: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000 8000602: fbe0 e503 umlal lr, r5, r0, r3 8000606: f04f 0600 mov.w r6, #0 800060a: fbe1 5603 umlal r5, r6, r1, r3 800060e: f09c 0f00 teq ip, #0 8000612: bf18 it ne 8000614: f04e 0e01 orrne.w lr, lr, #1 8000618: f1a4 04ff sub.w r4, r4, #255 ; 0xff 800061c: f5b6 7f00 cmp.w r6, #512 ; 0x200 8000620: f564 7440 sbc.w r4, r4, #768 ; 0x300 8000624: d204 bcs.n 8000630 <__aeabi_dmul+0x80> 8000626: ea5f 0e4e movs.w lr, lr, lsl #1 800062a: 416d adcs r5, r5 800062c: eb46 0606 adc.w r6, r6, r6 8000630: ea42 21c6 orr.w r1, r2, r6, lsl #11 8000634: ea41 5155 orr.w r1, r1, r5, lsr #21 8000638: ea4f 20c5 mov.w r0, r5, lsl #11 800063c: ea40 505e orr.w r0, r0, lr, lsr #21 8000640: ea4f 2ece mov.w lr, lr, lsl #11 8000644: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd 8000648: bf88 it hi 800064a: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 800064e: d81e bhi.n 800068e <__aeabi_dmul+0xde> 8000650: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000 8000654: bf08 it eq 8000656: ea5f 0e50 movseq.w lr, r0, lsr #1 800065a: f150 0000 adcs.w r0, r0, #0 800065e: eb41 5104 adc.w r1, r1, r4, lsl #20 8000662: bd70 pop {r4, r5, r6, pc} 8000664: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000 8000668: ea46 0101 orr.w r1, r6, r1 800066c: ea40 0002 orr.w r0, r0, r2 8000670: ea81 0103 eor.w r1, r1, r3 8000674: ebb4 045c subs.w r4, r4, ip, lsr #1 8000678: bfc2 ittt gt 800067a: ebd4 050c rsbsgt r5, r4, ip 800067e: ea41 5104 orrgt.w r1, r1, r4, lsl #20 8000682: bd70 popgt {r4, r5, r6, pc} 8000684: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 8000688: f04f 0e00 mov.w lr, #0 800068c: 3c01 subs r4, #1 800068e: f300 80ab bgt.w 80007e8 <__aeabi_dmul+0x238> 8000692: f114 0f36 cmn.w r4, #54 ; 0x36 8000696: bfde ittt le 8000698: 2000 movle r0, #0 800069a: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000 800069e: bd70 pople {r4, r5, r6, pc} 80006a0: f1c4 0400 rsb r4, r4, #0 80006a4: 3c20 subs r4, #32 80006a6: da35 bge.n 8000714 <__aeabi_dmul+0x164> 80006a8: 340c adds r4, #12 80006aa: dc1b bgt.n 80006e4 <__aeabi_dmul+0x134> 80006ac: f104 0414 add.w r4, r4, #20 80006b0: f1c4 0520 rsb r5, r4, #32 80006b4: fa00 f305 lsl.w r3, r0, r5 80006b8: fa20 f004 lsr.w r0, r0, r4 80006bc: fa01 f205 lsl.w r2, r1, r5 80006c0: ea40 0002 orr.w r0, r0, r2 80006c4: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000 80006c8: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 80006cc: eb10 70d3 adds.w r0, r0, r3, lsr #31 80006d0: fa21 f604 lsr.w r6, r1, r4 80006d4: eb42 0106 adc.w r1, r2, r6 80006d8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80006dc: bf08 it eq 80006de: ea20 70d3 biceq.w r0, r0, r3, lsr #31 80006e2: bd70 pop {r4, r5, r6, pc} 80006e4: f1c4 040c rsb r4, r4, #12 80006e8: f1c4 0520 rsb r5, r4, #32 80006ec: fa00 f304 lsl.w r3, r0, r4 80006f0: fa20 f005 lsr.w r0, r0, r5 80006f4: fa01 f204 lsl.w r2, r1, r4 80006f8: ea40 0002 orr.w r0, r0, r2 80006fc: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 8000700: eb10 70d3 adds.w r0, r0, r3, lsr #31 8000704: f141 0100 adc.w r1, r1, #0 8000708: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 800070c: bf08 it eq 800070e: ea20 70d3 biceq.w r0, r0, r3, lsr #31 8000712: bd70 pop {r4, r5, r6, pc} 8000714: f1c4 0520 rsb r5, r4, #32 8000718: fa00 f205 lsl.w r2, r0, r5 800071c: ea4e 0e02 orr.w lr, lr, r2 8000720: fa20 f304 lsr.w r3, r0, r4 8000724: fa01 f205 lsl.w r2, r1, r5 8000728: ea43 0302 orr.w r3, r3, r2 800072c: fa21 f004 lsr.w r0, r1, r4 8000730: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 8000734: fa21 f204 lsr.w r2, r1, r4 8000738: ea20 0002 bic.w r0, r0, r2 800073c: eb00 70d3 add.w r0, r0, r3, lsr #31 8000740: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8000744: bf08 it eq 8000746: ea20 70d3 biceq.w r0, r0, r3, lsr #31 800074a: bd70 pop {r4, r5, r6, pc} 800074c: f094 0f00 teq r4, #0 8000750: d10f bne.n 8000772 <__aeabi_dmul+0x1c2> 8000752: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000 8000756: 0040 lsls r0, r0, #1 8000758: eb41 0101 adc.w r1, r1, r1 800075c: f411 1f80 tst.w r1, #1048576 ; 0x100000 8000760: bf08 it eq 8000762: 3c01 subeq r4, #1 8000764: d0f7 beq.n 8000756 <__aeabi_dmul+0x1a6> 8000766: ea41 0106 orr.w r1, r1, r6 800076a: f095 0f00 teq r5, #0 800076e: bf18 it ne 8000770: 4770 bxne lr 8000772: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000 8000776: 0052 lsls r2, r2, #1 8000778: eb43 0303 adc.w r3, r3, r3 800077c: f413 1f80 tst.w r3, #1048576 ; 0x100000 8000780: bf08 it eq 8000782: 3d01 subeq r5, #1 8000784: d0f7 beq.n 8000776 <__aeabi_dmul+0x1c6> 8000786: ea43 0306 orr.w r3, r3, r6 800078a: 4770 bx lr 800078c: ea94 0f0c teq r4, ip 8000790: ea0c 5513 and.w r5, ip, r3, lsr #20 8000794: bf18 it ne 8000796: ea95 0f0c teqne r5, ip 800079a: d00c beq.n 80007b6 <__aeabi_dmul+0x206> 800079c: ea50 0641 orrs.w r6, r0, r1, lsl #1 80007a0: bf18 it ne 80007a2: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80007a6: d1d1 bne.n 800074c <__aeabi_dmul+0x19c> 80007a8: ea81 0103 eor.w r1, r1, r3 80007ac: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 80007b0: f04f 0000 mov.w r0, #0 80007b4: bd70 pop {r4, r5, r6, pc} 80007b6: ea50 0641 orrs.w r6, r0, r1, lsl #1 80007ba: bf06 itte eq 80007bc: 4610 moveq r0, r2 80007be: 4619 moveq r1, r3 80007c0: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80007c4: d019 beq.n 80007fa <__aeabi_dmul+0x24a> 80007c6: ea94 0f0c teq r4, ip 80007ca: d102 bne.n 80007d2 <__aeabi_dmul+0x222> 80007cc: ea50 3601 orrs.w r6, r0, r1, lsl #12 80007d0: d113 bne.n 80007fa <__aeabi_dmul+0x24a> 80007d2: ea95 0f0c teq r5, ip 80007d6: d105 bne.n 80007e4 <__aeabi_dmul+0x234> 80007d8: ea52 3603 orrs.w r6, r2, r3, lsl #12 80007dc: bf1c itt ne 80007de: 4610 movne r0, r2 80007e0: 4619 movne r1, r3 80007e2: d10a bne.n 80007fa <__aeabi_dmul+0x24a> 80007e4: ea81 0103 eor.w r1, r1, r3 80007e8: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 80007ec: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 80007f0: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 80007f4: f04f 0000 mov.w r0, #0 80007f8: bd70 pop {r4, r5, r6, pc} 80007fa: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 80007fe: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000 8000802: bd70 pop {r4, r5, r6, pc} 08000804 <__aeabi_ddiv>: 8000804: b570 push {r4, r5, r6, lr} 8000806: f04f 0cff mov.w ip, #255 ; 0xff 800080a: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 800080e: ea1c 5411 ands.w r4, ip, r1, lsr #20 8000812: bf1d ittte ne 8000814: ea1c 5513 andsne.w r5, ip, r3, lsr #20 8000818: ea94 0f0c teqne r4, ip 800081c: ea95 0f0c teqne r5, ip 8000820: f000 f8a7 bleq 8000972 <__aeabi_ddiv+0x16e> 8000824: eba4 0405 sub.w r4, r4, r5 8000828: ea81 0e03 eor.w lr, r1, r3 800082c: ea52 3503 orrs.w r5, r2, r3, lsl #12 8000830: ea4f 3101 mov.w r1, r1, lsl #12 8000834: f000 8088 beq.w 8000948 <__aeabi_ddiv+0x144> 8000838: ea4f 3303 mov.w r3, r3, lsl #12 800083c: f04f 5580 mov.w r5, #268435456 ; 0x10000000 8000840: ea45 1313 orr.w r3, r5, r3, lsr #4 8000844: ea43 6312 orr.w r3, r3, r2, lsr #24 8000848: ea4f 2202 mov.w r2, r2, lsl #8 800084c: ea45 1511 orr.w r5, r5, r1, lsr #4 8000850: ea45 6510 orr.w r5, r5, r0, lsr #24 8000854: ea4f 2600 mov.w r6, r0, lsl #8 8000858: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000 800085c: 429d cmp r5, r3 800085e: bf08 it eq 8000860: 4296 cmpeq r6, r2 8000862: f144 04fd adc.w r4, r4, #253 ; 0xfd 8000866: f504 7440 add.w r4, r4, #768 ; 0x300 800086a: d202 bcs.n 8000872 <__aeabi_ddiv+0x6e> 800086c: 085b lsrs r3, r3, #1 800086e: ea4f 0232 mov.w r2, r2, rrx 8000872: 1ab6 subs r6, r6, r2 8000874: eb65 0503 sbc.w r5, r5, r3 8000878: 085b lsrs r3, r3, #1 800087a: ea4f 0232 mov.w r2, r2, rrx 800087e: f44f 1080 mov.w r0, #1048576 ; 0x100000 8000882: f44f 2c00 mov.w ip, #524288 ; 0x80000 8000886: ebb6 0e02 subs.w lr, r6, r2 800088a: eb75 0e03 sbcs.w lr, r5, r3 800088e: bf22 ittt cs 8000890: 1ab6 subcs r6, r6, r2 8000892: 4675 movcs r5, lr 8000894: ea40 000c orrcs.w r0, r0, ip 8000898: 085b lsrs r3, r3, #1 800089a: ea4f 0232 mov.w r2, r2, rrx 800089e: ebb6 0e02 subs.w lr, r6, r2 80008a2: eb75 0e03 sbcs.w lr, r5, r3 80008a6: bf22 ittt cs 80008a8: 1ab6 subcs r6, r6, r2 80008aa: 4675 movcs r5, lr 80008ac: ea40 005c orrcs.w r0, r0, ip, lsr #1 80008b0: 085b lsrs r3, r3, #1 80008b2: ea4f 0232 mov.w r2, r2, rrx 80008b6: ebb6 0e02 subs.w lr, r6, r2 80008ba: eb75 0e03 sbcs.w lr, r5, r3 80008be: bf22 ittt cs 80008c0: 1ab6 subcs r6, r6, r2 80008c2: 4675 movcs r5, lr 80008c4: ea40 009c orrcs.w r0, r0, ip, lsr #2 80008c8: 085b lsrs r3, r3, #1 80008ca: ea4f 0232 mov.w r2, r2, rrx 80008ce: ebb6 0e02 subs.w lr, r6, r2 80008d2: eb75 0e03 sbcs.w lr, r5, r3 80008d6: bf22 ittt cs 80008d8: 1ab6 subcs r6, r6, r2 80008da: 4675 movcs r5, lr 80008dc: ea40 00dc orrcs.w r0, r0, ip, lsr #3 80008e0: ea55 0e06 orrs.w lr, r5, r6 80008e4: d018 beq.n 8000918 <__aeabi_ddiv+0x114> 80008e6: ea4f 1505 mov.w r5, r5, lsl #4 80008ea: ea45 7516 orr.w r5, r5, r6, lsr #28 80008ee: ea4f 1606 mov.w r6, r6, lsl #4 80008f2: ea4f 03c3 mov.w r3, r3, lsl #3 80008f6: ea43 7352 orr.w r3, r3, r2, lsr #29 80008fa: ea4f 02c2 mov.w r2, r2, lsl #3 80008fe: ea5f 1c1c movs.w ip, ip, lsr #4 8000902: d1c0 bne.n 8000886 <__aeabi_ddiv+0x82> 8000904: f411 1f80 tst.w r1, #1048576 ; 0x100000 8000908: d10b bne.n 8000922 <__aeabi_ddiv+0x11e> 800090a: ea41 0100 orr.w r1, r1, r0 800090e: f04f 0000 mov.w r0, #0 8000912: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000 8000916: e7b6 b.n 8000886 <__aeabi_ddiv+0x82> 8000918: f411 1f80 tst.w r1, #1048576 ; 0x100000 800091c: bf04 itt eq 800091e: 4301 orreq r1, r0 8000920: 2000 moveq r0, #0 8000922: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd 8000926: bf88 it hi 8000928: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 800092c: f63f aeaf bhi.w 800068e <__aeabi_dmul+0xde> 8000930: ebb5 0c03 subs.w ip, r5, r3 8000934: bf04 itt eq 8000936: ebb6 0c02 subseq.w ip, r6, r2 800093a: ea5f 0c50 movseq.w ip, r0, lsr #1 800093e: f150 0000 adcs.w r0, r0, #0 8000942: eb41 5104 adc.w r1, r1, r4, lsl #20 8000946: bd70 pop {r4, r5, r6, pc} 8000948: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000 800094c: ea4e 3111 orr.w r1, lr, r1, lsr #12 8000950: eb14 045c adds.w r4, r4, ip, lsr #1 8000954: bfc2 ittt gt 8000956: ebd4 050c rsbsgt r5, r4, ip 800095a: ea41 5104 orrgt.w r1, r1, r4, lsl #20 800095e: bd70 popgt {r4, r5, r6, pc} 8000960: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 8000964: f04f 0e00 mov.w lr, #0 8000968: 3c01 subs r4, #1 800096a: e690 b.n 800068e <__aeabi_dmul+0xde> 800096c: ea45 0e06 orr.w lr, r5, r6 8000970: e68d b.n 800068e <__aeabi_dmul+0xde> 8000972: ea0c 5513 and.w r5, ip, r3, lsr #20 8000976: ea94 0f0c teq r4, ip 800097a: bf08 it eq 800097c: ea95 0f0c teqeq r5, ip 8000980: f43f af3b beq.w 80007fa <__aeabi_dmul+0x24a> 8000984: ea94 0f0c teq r4, ip 8000988: d10a bne.n 80009a0 <__aeabi_ddiv+0x19c> 800098a: ea50 3401 orrs.w r4, r0, r1, lsl #12 800098e: f47f af34 bne.w 80007fa <__aeabi_dmul+0x24a> 8000992: ea95 0f0c teq r5, ip 8000996: f47f af25 bne.w 80007e4 <__aeabi_dmul+0x234> 800099a: 4610 mov r0, r2 800099c: 4619 mov r1, r3 800099e: e72c b.n 80007fa <__aeabi_dmul+0x24a> 80009a0: ea95 0f0c teq r5, ip 80009a4: d106 bne.n 80009b4 <__aeabi_ddiv+0x1b0> 80009a6: ea52 3503 orrs.w r5, r2, r3, lsl #12 80009aa: f43f aefd beq.w 80007a8 <__aeabi_dmul+0x1f8> 80009ae: 4610 mov r0, r2 80009b0: 4619 mov r1, r3 80009b2: e722 b.n 80007fa <__aeabi_dmul+0x24a> 80009b4: ea50 0641 orrs.w r6, r0, r1, lsl #1 80009b8: bf18 it ne 80009ba: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80009be: f47f aec5 bne.w 800074c <__aeabi_dmul+0x19c> 80009c2: ea50 0441 orrs.w r4, r0, r1, lsl #1 80009c6: f47f af0d bne.w 80007e4 <__aeabi_dmul+0x234> 80009ca: ea52 0543 orrs.w r5, r2, r3, lsl #1 80009ce: f47f aeeb bne.w 80007a8 <__aeabi_dmul+0x1f8> 80009d2: e712 b.n 80007fa <__aeabi_dmul+0x24a> 080009d4 <__gedf2>: 80009d4: f04f 3cff mov.w ip, #4294967295 ; 0xffffffff 80009d8: e006 b.n 80009e8 <__cmpdf2+0x4> 80009da: bf00 nop 080009dc <__ledf2>: 80009dc: f04f 0c01 mov.w ip, #1 80009e0: e002 b.n 80009e8 <__cmpdf2+0x4> 80009e2: bf00 nop 080009e4 <__cmpdf2>: 80009e4: f04f 0c01 mov.w ip, #1 80009e8: f84d cd04 str.w ip, [sp, #-4]! 80009ec: ea4f 0c41 mov.w ip, r1, lsl #1 80009f0: ea7f 5c6c mvns.w ip, ip, asr #21 80009f4: ea4f 0c43 mov.w ip, r3, lsl #1 80009f8: bf18 it ne 80009fa: ea7f 5c6c mvnsne.w ip, ip, asr #21 80009fe: d01b beq.n 8000a38 <__cmpdf2+0x54> 8000a00: b001 add sp, #4 8000a02: ea50 0c41 orrs.w ip, r0, r1, lsl #1 8000a06: bf0c ite eq 8000a08: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 8000a0c: ea91 0f03 teqne r1, r3 8000a10: bf02 ittt eq 8000a12: ea90 0f02 teqeq r0, r2 8000a16: 2000 moveq r0, #0 8000a18: 4770 bxeq lr 8000a1a: f110 0f00 cmn.w r0, #0 8000a1e: ea91 0f03 teq r1, r3 8000a22: bf58 it pl 8000a24: 4299 cmppl r1, r3 8000a26: bf08 it eq 8000a28: 4290 cmpeq r0, r2 8000a2a: bf2c ite cs 8000a2c: 17d8 asrcs r0, r3, #31 8000a2e: ea6f 70e3 mvncc.w r0, r3, asr #31 8000a32: f040 0001 orr.w r0, r0, #1 8000a36: 4770 bx lr 8000a38: ea4f 0c41 mov.w ip, r1, lsl #1 8000a3c: ea7f 5c6c mvns.w ip, ip, asr #21 8000a40: d102 bne.n 8000a48 <__cmpdf2+0x64> 8000a42: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8000a46: d107 bne.n 8000a58 <__cmpdf2+0x74> 8000a48: ea4f 0c43 mov.w ip, r3, lsl #1 8000a4c: ea7f 5c6c mvns.w ip, ip, asr #21 8000a50: d1d6 bne.n 8000a00 <__cmpdf2+0x1c> 8000a52: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8000a56: d0d3 beq.n 8000a00 <__cmpdf2+0x1c> 8000a58: f85d 0b04 ldr.w r0, [sp], #4 8000a5c: 4770 bx lr 8000a5e: bf00 nop 08000a60 <__aeabi_cdrcmple>: 8000a60: 4684 mov ip, r0 8000a62: 4610 mov r0, r2 8000a64: 4662 mov r2, ip 8000a66: 468c mov ip, r1 8000a68: 4619 mov r1, r3 8000a6a: 4663 mov r3, ip 8000a6c: e000 b.n 8000a70 <__aeabi_cdcmpeq> 8000a6e: bf00 nop 08000a70 <__aeabi_cdcmpeq>: 8000a70: b501 push {r0, lr} 8000a72: f7ff ffb7 bl 80009e4 <__cmpdf2> 8000a76: 2800 cmp r0, #0 8000a78: bf48 it mi 8000a7a: f110 0f00 cmnmi.w r0, #0 8000a7e: bd01 pop {r0, pc} 08000a80 <__aeabi_dcmpeq>: 8000a80: f84d ed08 str.w lr, [sp, #-8]! 8000a84: f7ff fff4 bl 8000a70 <__aeabi_cdcmpeq> 8000a88: bf0c ite eq 8000a8a: 2001 moveq r0, #1 8000a8c: 2000 movne r0, #0 8000a8e: f85d fb08 ldr.w pc, [sp], #8 8000a92: bf00 nop 08000a94 <__aeabi_dcmplt>: 8000a94: f84d ed08 str.w lr, [sp, #-8]! 8000a98: f7ff ffea bl 8000a70 <__aeabi_cdcmpeq> 8000a9c: bf34 ite cc 8000a9e: 2001 movcc r0, #1 8000aa0: 2000 movcs r0, #0 8000aa2: f85d fb08 ldr.w pc, [sp], #8 8000aa6: bf00 nop 08000aa8 <__aeabi_dcmple>: 8000aa8: f84d ed08 str.w lr, [sp, #-8]! 8000aac: f7ff ffe0 bl 8000a70 <__aeabi_cdcmpeq> 8000ab0: bf94 ite ls 8000ab2: 2001 movls r0, #1 8000ab4: 2000 movhi r0, #0 8000ab6: f85d fb08 ldr.w pc, [sp], #8 8000aba: bf00 nop 08000abc <__aeabi_dcmpge>: 8000abc: f84d ed08 str.w lr, [sp, #-8]! 8000ac0: f7ff ffce bl 8000a60 <__aeabi_cdrcmple> 8000ac4: bf94 ite ls 8000ac6: 2001 movls r0, #1 8000ac8: 2000 movhi r0, #0 8000aca: f85d fb08 ldr.w pc, [sp], #8 8000ace: bf00 nop 08000ad0 <__aeabi_dcmpgt>: 8000ad0: f84d ed08 str.w lr, [sp, #-8]! 8000ad4: f7ff ffc4 bl 8000a60 <__aeabi_cdrcmple> 8000ad8: bf34 ite cc 8000ada: 2001 movcc r0, #1 8000adc: 2000 movcs r0, #0 8000ade: f85d fb08 ldr.w pc, [sp], #8 8000ae2: bf00 nop 08000ae4 <__aeabi_dcmpun>: 8000ae4: ea4f 0c41 mov.w ip, r1, lsl #1 8000ae8: ea7f 5c6c mvns.w ip, ip, asr #21 8000aec: d102 bne.n 8000af4 <__aeabi_dcmpun+0x10> 8000aee: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8000af2: d10a bne.n 8000b0a <__aeabi_dcmpun+0x26> 8000af4: ea4f 0c43 mov.w ip, r3, lsl #1 8000af8: ea7f 5c6c mvns.w ip, ip, asr #21 8000afc: d102 bne.n 8000b04 <__aeabi_dcmpun+0x20> 8000afe: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8000b02: d102 bne.n 8000b0a <__aeabi_dcmpun+0x26> 8000b04: f04f 0000 mov.w r0, #0 8000b08: 4770 bx lr 8000b0a: f04f 0001 mov.w r0, #1 8000b0e: 4770 bx lr 08000b10 <__aeabi_d2iz>: 8000b10: ea4f 0241 mov.w r2, r1, lsl #1 8000b14: f512 1200 adds.w r2, r2, #2097152 ; 0x200000 8000b18: d215 bcs.n 8000b46 <__aeabi_d2iz+0x36> 8000b1a: d511 bpl.n 8000b40 <__aeabi_d2iz+0x30> 8000b1c: f46f 7378 mvn.w r3, #992 ; 0x3e0 8000b20: ebb3 5262 subs.w r2, r3, r2, asr #21 8000b24: d912 bls.n 8000b4c <__aeabi_d2iz+0x3c> 8000b26: ea4f 23c1 mov.w r3, r1, lsl #11 8000b2a: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 8000b2e: ea43 5350 orr.w r3, r3, r0, lsr #21 8000b32: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 8000b36: fa23 f002 lsr.w r0, r3, r2 8000b3a: bf18 it ne 8000b3c: 4240 negne r0, r0 8000b3e: 4770 bx lr 8000b40: f04f 0000 mov.w r0, #0 8000b44: 4770 bx lr 8000b46: ea50 3001 orrs.w r0, r0, r1, lsl #12 8000b4a: d105 bne.n 8000b58 <__aeabi_d2iz+0x48> 8000b4c: f011 4000 ands.w r0, r1, #2147483648 ; 0x80000000 8000b50: bf08 it eq 8000b52: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000 8000b56: 4770 bx lr 8000b58: f04f 0000 mov.w r0, #0 8000b5c: 4770 bx lr 8000b5e: bf00 nop 08000b60 <__aeabi_d2f>: 8000b60: ea4f 0241 mov.w r2, r1, lsl #1 8000b64: f1b2 43e0 subs.w r3, r2, #1879048192 ; 0x70000000 8000b68: bf24 itt cs 8000b6a: f5b3 1c00 subscs.w ip, r3, #2097152 ; 0x200000 8000b6e: f1dc 5cfe rsbscs ip, ip, #532676608 ; 0x1fc00000 8000b72: d90d bls.n 8000b90 <__aeabi_d2f+0x30> 8000b74: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 8000b78: ea4f 02c0 mov.w r2, r0, lsl #3 8000b7c: ea4c 7050 orr.w r0, ip, r0, lsr #29 8000b80: f1b2 4f00 cmp.w r2, #2147483648 ; 0x80000000 8000b84: eb40 0083 adc.w r0, r0, r3, lsl #2 8000b88: bf08 it eq 8000b8a: f020 0001 biceq.w r0, r0, #1 8000b8e: 4770 bx lr 8000b90: f011 4f80 tst.w r1, #1073741824 ; 0x40000000 8000b94: d121 bne.n 8000bda <__aeabi_d2f+0x7a> 8000b96: f113 7238 adds.w r2, r3, #48234496 ; 0x2e00000 8000b9a: bfbc itt lt 8000b9c: f001 4000 andlt.w r0, r1, #2147483648 ; 0x80000000 8000ba0: 4770 bxlt lr 8000ba2: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 8000ba6: ea4f 5252 mov.w r2, r2, lsr #21 8000baa: f1c2 0218 rsb r2, r2, #24 8000bae: f1c2 0c20 rsb ip, r2, #32 8000bb2: fa10 f30c lsls.w r3, r0, ip 8000bb6: fa20 f002 lsr.w r0, r0, r2 8000bba: bf18 it ne 8000bbc: f040 0001 orrne.w r0, r0, #1 8000bc0: ea4f 23c1 mov.w r3, r1, lsl #11 8000bc4: ea4f 23d3 mov.w r3, r3, lsr #11 8000bc8: fa03 fc0c lsl.w ip, r3, ip 8000bcc: ea40 000c orr.w r0, r0, ip 8000bd0: fa23 f302 lsr.w r3, r3, r2 8000bd4: ea4f 0343 mov.w r3, r3, lsl #1 8000bd8: e7cc b.n 8000b74 <__aeabi_d2f+0x14> 8000bda: ea7f 5362 mvns.w r3, r2, asr #21 8000bde: d107 bne.n 8000bf0 <__aeabi_d2f+0x90> 8000be0: ea50 3301 orrs.w r3, r0, r1, lsl #12 8000be4: bf1e ittt ne 8000be6: f04f 40fe movne.w r0, #2130706432 ; 0x7f000000 8000bea: f440 0040 orrne.w r0, r0, #12582912 ; 0xc00000 8000bee: 4770 bxne lr 8000bf0: f001 4000 and.w r0, r1, #2147483648 ; 0x80000000 8000bf4: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8000bf8: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000bfc: 4770 bx lr 8000bfe: bf00 nop 08000c00 <__aeabi_frsub>: 8000c00: f080 4000 eor.w r0, r0, #2147483648 ; 0x80000000 8000c04: e002 b.n 8000c0c <__addsf3> 8000c06: bf00 nop 08000c08 <__aeabi_fsub>: 8000c08: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000 08000c0c <__addsf3>: 8000c0c: 0042 lsls r2, r0, #1 8000c0e: bf1f itttt ne 8000c10: ea5f 0341 movsne.w r3, r1, lsl #1 8000c14: ea92 0f03 teqne r2, r3 8000c18: ea7f 6c22 mvnsne.w ip, r2, asr #24 8000c1c: ea7f 6c23 mvnsne.w ip, r3, asr #24 8000c20: d06a beq.n 8000cf8 <__addsf3+0xec> 8000c22: ea4f 6212 mov.w r2, r2, lsr #24 8000c26: ebd2 6313 rsbs r3, r2, r3, lsr #24 8000c2a: bfc1 itttt gt 8000c2c: 18d2 addgt r2, r2, r3 8000c2e: 4041 eorgt r1, r0 8000c30: 4048 eorgt r0, r1 8000c32: 4041 eorgt r1, r0 8000c34: bfb8 it lt 8000c36: 425b neglt r3, r3 8000c38: 2b19 cmp r3, #25 8000c3a: bf88 it hi 8000c3c: 4770 bxhi lr 8000c3e: f010 4f00 tst.w r0, #2147483648 ; 0x80000000 8000c42: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000c46: f020 407f bic.w r0, r0, #4278190080 ; 0xff000000 8000c4a: bf18 it ne 8000c4c: 4240 negne r0, r0 8000c4e: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 8000c52: f441 0100 orr.w r1, r1, #8388608 ; 0x800000 8000c56: f021 417f bic.w r1, r1, #4278190080 ; 0xff000000 8000c5a: bf18 it ne 8000c5c: 4249 negne r1, r1 8000c5e: ea92 0f03 teq r2, r3 8000c62: d03f beq.n 8000ce4 <__addsf3+0xd8> 8000c64: f1a2 0201 sub.w r2, r2, #1 8000c68: fa41 fc03 asr.w ip, r1, r3 8000c6c: eb10 000c adds.w r0, r0, ip 8000c70: f1c3 0320 rsb r3, r3, #32 8000c74: fa01 f103 lsl.w r1, r1, r3 8000c78: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000 8000c7c: d502 bpl.n 8000c84 <__addsf3+0x78> 8000c7e: 4249 negs r1, r1 8000c80: eb60 0040 sbc.w r0, r0, r0, lsl #1 8000c84: f5b0 0f00 cmp.w r0, #8388608 ; 0x800000 8000c88: d313 bcc.n 8000cb2 <__addsf3+0xa6> 8000c8a: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 8000c8e: d306 bcc.n 8000c9e <__addsf3+0x92> 8000c90: 0840 lsrs r0, r0, #1 8000c92: ea4f 0131 mov.w r1, r1, rrx 8000c96: f102 0201 add.w r2, r2, #1 8000c9a: 2afe cmp r2, #254 ; 0xfe 8000c9c: d251 bcs.n 8000d42 <__addsf3+0x136> 8000c9e: f1b1 4f00 cmp.w r1, #2147483648 ; 0x80000000 8000ca2: eb40 50c2 adc.w r0, r0, r2, lsl #23 8000ca6: bf08 it eq 8000ca8: f020 0001 biceq.w r0, r0, #1 8000cac: ea40 0003 orr.w r0, r0, r3 8000cb0: 4770 bx lr 8000cb2: 0049 lsls r1, r1, #1 8000cb4: eb40 0000 adc.w r0, r0, r0 8000cb8: 3a01 subs r2, #1 8000cba: bf28 it cs 8000cbc: f5b0 0f00 cmpcs.w r0, #8388608 ; 0x800000 8000cc0: d2ed bcs.n 8000c9e <__addsf3+0x92> 8000cc2: fab0 fc80 clz ip, r0 8000cc6: f1ac 0c08 sub.w ip, ip, #8 8000cca: ebb2 020c subs.w r2, r2, ip 8000cce: fa00 f00c lsl.w r0, r0, ip 8000cd2: bfaa itet ge 8000cd4: eb00 50c2 addge.w r0, r0, r2, lsl #23 8000cd8: 4252 neglt r2, r2 8000cda: 4318 orrge r0, r3 8000cdc: bfbc itt lt 8000cde: 40d0 lsrlt r0, r2 8000ce0: 4318 orrlt r0, r3 8000ce2: 4770 bx lr 8000ce4: f092 0f00 teq r2, #0 8000ce8: f481 0100 eor.w r1, r1, #8388608 ; 0x800000 8000cec: bf06 itte eq 8000cee: f480 0000 eoreq.w r0, r0, #8388608 ; 0x800000 8000cf2: 3201 addeq r2, #1 8000cf4: 3b01 subne r3, #1 8000cf6: e7b5 b.n 8000c64 <__addsf3+0x58> 8000cf8: ea4f 0341 mov.w r3, r1, lsl #1 8000cfc: ea7f 6c22 mvns.w ip, r2, asr #24 8000d00: bf18 it ne 8000d02: ea7f 6c23 mvnsne.w ip, r3, asr #24 8000d06: d021 beq.n 8000d4c <__addsf3+0x140> 8000d08: ea92 0f03 teq r2, r3 8000d0c: d004 beq.n 8000d18 <__addsf3+0x10c> 8000d0e: f092 0f00 teq r2, #0 8000d12: bf08 it eq 8000d14: 4608 moveq r0, r1 8000d16: 4770 bx lr 8000d18: ea90 0f01 teq r0, r1 8000d1c: bf1c itt ne 8000d1e: 2000 movne r0, #0 8000d20: 4770 bxne lr 8000d22: f012 4f7f tst.w r2, #4278190080 ; 0xff000000 8000d26: d104 bne.n 8000d32 <__addsf3+0x126> 8000d28: 0040 lsls r0, r0, #1 8000d2a: bf28 it cs 8000d2c: f040 4000 orrcs.w r0, r0, #2147483648 ; 0x80000000 8000d30: 4770 bx lr 8000d32: f112 7200 adds.w r2, r2, #33554432 ; 0x2000000 8000d36: bf3c itt cc 8000d38: f500 0000 addcc.w r0, r0, #8388608 ; 0x800000 8000d3c: 4770 bxcc lr 8000d3e: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000 8000d42: f043 40fe orr.w r0, r3, #2130706432 ; 0x7f000000 8000d46: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000d4a: 4770 bx lr 8000d4c: ea7f 6222 mvns.w r2, r2, asr #24 8000d50: bf16 itet ne 8000d52: 4608 movne r0, r1 8000d54: ea7f 6323 mvnseq.w r3, r3, asr #24 8000d58: 4601 movne r1, r0 8000d5a: 0242 lsls r2, r0, #9 8000d5c: bf06 itte eq 8000d5e: ea5f 2341 movseq.w r3, r1, lsl #9 8000d62: ea90 0f01 teqeq r0, r1 8000d66: f440 0080 orrne.w r0, r0, #4194304 ; 0x400000 8000d6a: 4770 bx lr 08000d6c <__aeabi_ui2f>: 8000d6c: f04f 0300 mov.w r3, #0 8000d70: e004 b.n 8000d7c <__aeabi_i2f+0x8> 8000d72: bf00 nop 08000d74 <__aeabi_i2f>: 8000d74: f010 4300 ands.w r3, r0, #2147483648 ; 0x80000000 8000d78: bf48 it mi 8000d7a: 4240 negmi r0, r0 8000d7c: ea5f 0c00 movs.w ip, r0 8000d80: bf08 it eq 8000d82: 4770 bxeq lr 8000d84: f043 4396 orr.w r3, r3, #1258291200 ; 0x4b000000 8000d88: 4601 mov r1, r0 8000d8a: f04f 0000 mov.w r0, #0 8000d8e: e01c b.n 8000dca <__aeabi_l2f+0x2a> 08000d90 <__aeabi_ul2f>: 8000d90: ea50 0201 orrs.w r2, r0, r1 8000d94: bf08 it eq 8000d96: 4770 bxeq lr 8000d98: f04f 0300 mov.w r3, #0 8000d9c: e00a b.n 8000db4 <__aeabi_l2f+0x14> 8000d9e: bf00 nop 08000da0 <__aeabi_l2f>: 8000da0: ea50 0201 orrs.w r2, r0, r1 8000da4: bf08 it eq 8000da6: 4770 bxeq lr 8000da8: f011 4300 ands.w r3, r1, #2147483648 ; 0x80000000 8000dac: d502 bpl.n 8000db4 <__aeabi_l2f+0x14> 8000dae: 4240 negs r0, r0 8000db0: eb61 0141 sbc.w r1, r1, r1, lsl #1 8000db4: ea5f 0c01 movs.w ip, r1 8000db8: bf02 ittt eq 8000dba: 4684 moveq ip, r0 8000dbc: 4601 moveq r1, r0 8000dbe: 2000 moveq r0, #0 8000dc0: f043 43b6 orr.w r3, r3, #1526726656 ; 0x5b000000 8000dc4: bf08 it eq 8000dc6: f1a3 5380 subeq.w r3, r3, #268435456 ; 0x10000000 8000dca: f5a3 0300 sub.w r3, r3, #8388608 ; 0x800000 8000dce: fabc f28c clz r2, ip 8000dd2: 3a08 subs r2, #8 8000dd4: eba3 53c2 sub.w r3, r3, r2, lsl #23 8000dd8: db10 blt.n 8000dfc <__aeabi_l2f+0x5c> 8000dda: fa01 fc02 lsl.w ip, r1, r2 8000dde: 4463 add r3, ip 8000de0: fa00 fc02 lsl.w ip, r0, r2 8000de4: f1c2 0220 rsb r2, r2, #32 8000de8: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000 8000dec: fa20 f202 lsr.w r2, r0, r2 8000df0: eb43 0002 adc.w r0, r3, r2 8000df4: bf08 it eq 8000df6: f020 0001 biceq.w r0, r0, #1 8000dfa: 4770 bx lr 8000dfc: f102 0220 add.w r2, r2, #32 8000e00: fa01 fc02 lsl.w ip, r1, r2 8000e04: f1c2 0220 rsb r2, r2, #32 8000e08: ea50 004c orrs.w r0, r0, ip, lsl #1 8000e0c: fa21 f202 lsr.w r2, r1, r2 8000e10: eb43 0002 adc.w r0, r3, r2 8000e14: bf08 it eq 8000e16: ea20 70dc biceq.w r0, r0, ip, lsr #31 8000e1a: 4770 bx lr 08000e1c <__aeabi_fmul>: 8000e1c: f04f 0cff mov.w ip, #255 ; 0xff 8000e20: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8000e24: bf1e ittt ne 8000e26: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8000e2a: ea92 0f0c teqne r2, ip 8000e2e: ea93 0f0c teqne r3, ip 8000e32: d06f beq.n 8000f14 <__aeabi_fmul+0xf8> 8000e34: 441a add r2, r3 8000e36: ea80 0c01 eor.w ip, r0, r1 8000e3a: 0240 lsls r0, r0, #9 8000e3c: bf18 it ne 8000e3e: ea5f 2141 movsne.w r1, r1, lsl #9 8000e42: d01e beq.n 8000e82 <__aeabi_fmul+0x66> 8000e44: f04f 6300 mov.w r3, #134217728 ; 0x8000000 8000e48: ea43 1050 orr.w r0, r3, r0, lsr #5 8000e4c: ea43 1151 orr.w r1, r3, r1, lsr #5 8000e50: fba0 3101 umull r3, r1, r0, r1 8000e54: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000 8000e58: f5b1 0f00 cmp.w r1, #8388608 ; 0x800000 8000e5c: bf3e ittt cc 8000e5e: 0049 lslcc r1, r1, #1 8000e60: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 8000e64: 005b lslcc r3, r3, #1 8000e66: ea40 0001 orr.w r0, r0, r1 8000e6a: f162 027f sbc.w r2, r2, #127 ; 0x7f 8000e6e: 2afd cmp r2, #253 ; 0xfd 8000e70: d81d bhi.n 8000eae <__aeabi_fmul+0x92> 8000e72: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 8000e76: eb40 50c2 adc.w r0, r0, r2, lsl #23 8000e7a: bf08 it eq 8000e7c: f020 0001 biceq.w r0, r0, #1 8000e80: 4770 bx lr 8000e82: f090 0f00 teq r0, #0 8000e86: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000 8000e8a: bf08 it eq 8000e8c: 0249 lsleq r1, r1, #9 8000e8e: ea4c 2050 orr.w r0, ip, r0, lsr #9 8000e92: ea40 2051 orr.w r0, r0, r1, lsr #9 8000e96: 3a7f subs r2, #127 ; 0x7f 8000e98: bfc2 ittt gt 8000e9a: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff 8000e9e: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8000ea2: 4770 bxgt lr 8000ea4: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000ea8: f04f 0300 mov.w r3, #0 8000eac: 3a01 subs r2, #1 8000eae: dc5d bgt.n 8000f6c <__aeabi_fmul+0x150> 8000eb0: f112 0f19 cmn.w r2, #25 8000eb4: bfdc itt le 8000eb6: f000 4000 andle.w r0, r0, #2147483648 ; 0x80000000 8000eba: 4770 bxle lr 8000ebc: f1c2 0200 rsb r2, r2, #0 8000ec0: 0041 lsls r1, r0, #1 8000ec2: fa21 f102 lsr.w r1, r1, r2 8000ec6: f1c2 0220 rsb r2, r2, #32 8000eca: fa00 fc02 lsl.w ip, r0, r2 8000ece: ea5f 0031 movs.w r0, r1, rrx 8000ed2: f140 0000 adc.w r0, r0, #0 8000ed6: ea53 034c orrs.w r3, r3, ip, lsl #1 8000eda: bf08 it eq 8000edc: ea20 70dc biceq.w r0, r0, ip, lsr #31 8000ee0: 4770 bx lr 8000ee2: f092 0f00 teq r2, #0 8000ee6: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000 8000eea: bf02 ittt eq 8000eec: 0040 lsleq r0, r0, #1 8000eee: f410 0f00 tsteq.w r0, #8388608 ; 0x800000 8000ef2: 3a01 subeq r2, #1 8000ef4: d0f9 beq.n 8000eea <__aeabi_fmul+0xce> 8000ef6: ea40 000c orr.w r0, r0, ip 8000efa: f093 0f00 teq r3, #0 8000efe: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 8000f02: bf02 ittt eq 8000f04: 0049 lsleq r1, r1, #1 8000f06: f411 0f00 tsteq.w r1, #8388608 ; 0x800000 8000f0a: 3b01 subeq r3, #1 8000f0c: d0f9 beq.n 8000f02 <__aeabi_fmul+0xe6> 8000f0e: ea41 010c orr.w r1, r1, ip 8000f12: e78f b.n 8000e34 <__aeabi_fmul+0x18> 8000f14: ea0c 53d1 and.w r3, ip, r1, lsr #23 8000f18: ea92 0f0c teq r2, ip 8000f1c: bf18 it ne 8000f1e: ea93 0f0c teqne r3, ip 8000f22: d00a beq.n 8000f3a <__aeabi_fmul+0x11e> 8000f24: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000 8000f28: bf18 it ne 8000f2a: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000 8000f2e: d1d8 bne.n 8000ee2 <__aeabi_fmul+0xc6> 8000f30: ea80 0001 eor.w r0, r0, r1 8000f34: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 8000f38: 4770 bx lr 8000f3a: f090 0f00 teq r0, #0 8000f3e: bf17 itett ne 8000f40: f090 4f00 teqne r0, #2147483648 ; 0x80000000 8000f44: 4608 moveq r0, r1 8000f46: f091 0f00 teqne r1, #0 8000f4a: f091 4f00 teqne r1, #2147483648 ; 0x80000000 8000f4e: d014 beq.n 8000f7a <__aeabi_fmul+0x15e> 8000f50: ea92 0f0c teq r2, ip 8000f54: d101 bne.n 8000f5a <__aeabi_fmul+0x13e> 8000f56: 0242 lsls r2, r0, #9 8000f58: d10f bne.n 8000f7a <__aeabi_fmul+0x15e> 8000f5a: ea93 0f0c teq r3, ip 8000f5e: d103 bne.n 8000f68 <__aeabi_fmul+0x14c> 8000f60: 024b lsls r3, r1, #9 8000f62: bf18 it ne 8000f64: 4608 movne r0, r1 8000f66: d108 bne.n 8000f7a <__aeabi_fmul+0x15e> 8000f68: ea80 0001 eor.w r0, r0, r1 8000f6c: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 8000f70: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8000f74: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000f78: 4770 bx lr 8000f7a: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8000f7e: f440 0040 orr.w r0, r0, #12582912 ; 0xc00000 8000f82: 4770 bx lr 08000f84 <__aeabi_fdiv>: 8000f84: f04f 0cff mov.w ip, #255 ; 0xff 8000f88: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8000f8c: bf1e ittt ne 8000f8e: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8000f92: ea92 0f0c teqne r2, ip 8000f96: ea93 0f0c teqne r3, ip 8000f9a: d069 beq.n 8001070 <__aeabi_fdiv+0xec> 8000f9c: eba2 0203 sub.w r2, r2, r3 8000fa0: ea80 0c01 eor.w ip, r0, r1 8000fa4: 0249 lsls r1, r1, #9 8000fa6: ea4f 2040 mov.w r0, r0, lsl #9 8000faa: d037 beq.n 800101c <__aeabi_fdiv+0x98> 8000fac: f04f 5380 mov.w r3, #268435456 ; 0x10000000 8000fb0: ea43 1111 orr.w r1, r3, r1, lsr #4 8000fb4: ea43 1310 orr.w r3, r3, r0, lsr #4 8000fb8: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000 8000fbc: 428b cmp r3, r1 8000fbe: bf38 it cc 8000fc0: 005b lslcc r3, r3, #1 8000fc2: f142 027d adc.w r2, r2, #125 ; 0x7d 8000fc6: f44f 0c00 mov.w ip, #8388608 ; 0x800000 8000fca: 428b cmp r3, r1 8000fcc: bf24 itt cs 8000fce: 1a5b subcs r3, r3, r1 8000fd0: ea40 000c orrcs.w r0, r0, ip 8000fd4: ebb3 0f51 cmp.w r3, r1, lsr #1 8000fd8: bf24 itt cs 8000fda: eba3 0351 subcs.w r3, r3, r1, lsr #1 8000fde: ea40 005c orrcs.w r0, r0, ip, lsr #1 8000fe2: ebb3 0f91 cmp.w r3, r1, lsr #2 8000fe6: bf24 itt cs 8000fe8: eba3 0391 subcs.w r3, r3, r1, lsr #2 8000fec: ea40 009c orrcs.w r0, r0, ip, lsr #2 8000ff0: ebb3 0fd1 cmp.w r3, r1, lsr #3 8000ff4: bf24 itt cs 8000ff6: eba3 03d1 subcs.w r3, r3, r1, lsr #3 8000ffa: ea40 00dc orrcs.w r0, r0, ip, lsr #3 8000ffe: 011b lsls r3, r3, #4 8001000: bf18 it ne 8001002: ea5f 1c1c movsne.w ip, ip, lsr #4 8001006: d1e0 bne.n 8000fca <__aeabi_fdiv+0x46> 8001008: 2afd cmp r2, #253 ; 0xfd 800100a: f63f af50 bhi.w 8000eae <__aeabi_fmul+0x92> 800100e: 428b cmp r3, r1 8001010: eb40 50c2 adc.w r0, r0, r2, lsl #23 8001014: bf08 it eq 8001016: f020 0001 biceq.w r0, r0, #1 800101a: 4770 bx lr 800101c: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000 8001020: ea4c 2050 orr.w r0, ip, r0, lsr #9 8001024: 327f adds r2, #127 ; 0x7f 8001026: bfc2 ittt gt 8001028: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff 800102c: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8001030: 4770 bxgt lr 8001032: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8001036: f04f 0300 mov.w r3, #0 800103a: 3a01 subs r2, #1 800103c: e737 b.n 8000eae <__aeabi_fmul+0x92> 800103e: f092 0f00 teq r2, #0 8001042: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000 8001046: bf02 ittt eq 8001048: 0040 lsleq r0, r0, #1 800104a: f410 0f00 tsteq.w r0, #8388608 ; 0x800000 800104e: 3a01 subeq r2, #1 8001050: d0f9 beq.n 8001046 <__aeabi_fdiv+0xc2> 8001052: ea40 000c orr.w r0, r0, ip 8001056: f093 0f00 teq r3, #0 800105a: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 800105e: bf02 ittt eq 8001060: 0049 lsleq r1, r1, #1 8001062: f411 0f00 tsteq.w r1, #8388608 ; 0x800000 8001066: 3b01 subeq r3, #1 8001068: d0f9 beq.n 800105e <__aeabi_fdiv+0xda> 800106a: ea41 010c orr.w r1, r1, ip 800106e: e795 b.n 8000f9c <__aeabi_fdiv+0x18> 8001070: ea0c 53d1 and.w r3, ip, r1, lsr #23 8001074: ea92 0f0c teq r2, ip 8001078: d108 bne.n 800108c <__aeabi_fdiv+0x108> 800107a: 0242 lsls r2, r0, #9 800107c: f47f af7d bne.w 8000f7a <__aeabi_fmul+0x15e> 8001080: ea93 0f0c teq r3, ip 8001084: f47f af70 bne.w 8000f68 <__aeabi_fmul+0x14c> 8001088: 4608 mov r0, r1 800108a: e776 b.n 8000f7a <__aeabi_fmul+0x15e> 800108c: ea93 0f0c teq r3, ip 8001090: d104 bne.n 800109c <__aeabi_fdiv+0x118> 8001092: 024b lsls r3, r1, #9 8001094: f43f af4c beq.w 8000f30 <__aeabi_fmul+0x114> 8001098: 4608 mov r0, r1 800109a: e76e b.n 8000f7a <__aeabi_fmul+0x15e> 800109c: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000 80010a0: bf18 it ne 80010a2: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000 80010a6: d1ca bne.n 800103e <__aeabi_fdiv+0xba> 80010a8: f030 4200 bics.w r2, r0, #2147483648 ; 0x80000000 80010ac: f47f af5c bne.w 8000f68 <__aeabi_fmul+0x14c> 80010b0: f031 4300 bics.w r3, r1, #2147483648 ; 0x80000000 80010b4: f47f af3c bne.w 8000f30 <__aeabi_fmul+0x114> 80010b8: e75f b.n 8000f7a <__aeabi_fmul+0x15e> 80010ba: bf00 nop 080010bc <__aeabi_f2iz>: 80010bc: ea4f 0240 mov.w r2, r0, lsl #1 80010c0: f1b2 4ffe cmp.w r2, #2130706432 ; 0x7f000000 80010c4: d30f bcc.n 80010e6 <__aeabi_f2iz+0x2a> 80010c6: f04f 039e mov.w r3, #158 ; 0x9e 80010ca: ebb3 6212 subs.w r2, r3, r2, lsr #24 80010ce: d90d bls.n 80010ec <__aeabi_f2iz+0x30> 80010d0: ea4f 2300 mov.w r3, r0, lsl #8 80010d4: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 80010d8: f010 4f00 tst.w r0, #2147483648 ; 0x80000000 80010dc: fa23 f002 lsr.w r0, r3, r2 80010e0: bf18 it ne 80010e2: 4240 negne r0, r0 80010e4: 4770 bx lr 80010e6: f04f 0000 mov.w r0, #0 80010ea: 4770 bx lr 80010ec: f112 0f61 cmn.w r2, #97 ; 0x61 80010f0: d101 bne.n 80010f6 <__aeabi_f2iz+0x3a> 80010f2: 0242 lsls r2, r0, #9 80010f4: d105 bne.n 8001102 <__aeabi_f2iz+0x46> 80010f6: f010 4000 ands.w r0, r0, #2147483648 ; 0x80000000 80010fa: bf08 it eq 80010fc: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000 8001100: 4770 bx lr 8001102: f04f 0000 mov.w r0, #0 8001106: 4770 bx lr 08001108 : \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. \param [in] ch Character to transmit. \returns Character to transmit. */ __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) { 8001108: b480 push {r7} 800110a: b083 sub sp, #12 800110c: af00 add r7, sp, #0 800110e: 6078 str r0, [r7, #4] if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ 8001110: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000 8001114: f8d3 3e80 ldr.w r3, [r3, #3712] ; 0xe80 8001118: f003 0301 and.w r3, r3, #1 800111c: 2b00 cmp r3, #0 800111e: d013 beq.n 8001148 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ 8001120: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000 8001124: f8d3 3e00 ldr.w r3, [r3, #3584] ; 0xe00 8001128: f003 0301 and.w r3, r3, #1 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ 800112c: 2b00 cmp r3, #0 800112e: d00b beq.n 8001148 { while (ITM->PORT[0U].u32 == 0UL) 8001130: e000 b.n 8001134 { __NOP(); 8001132: bf00 nop while (ITM->PORT[0U].u32 == 0UL) 8001134: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000 8001138: 681b ldr r3, [r3, #0] 800113a: 2b00 cmp r3, #0 800113c: d0f9 beq.n 8001132 } ITM->PORT[0U].u8 = (uint8_t)ch; 800113e: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000 8001142: 687a ldr r2, [r7, #4] 8001144: b2d2 uxtb r2, r2 8001146: 701a strb r2, [r3, #0] } return (ch); 8001148: 687b ldr r3, [r7, #4] } 800114a: 4618 mov r0, r3 800114c: 370c adds r7, #12 800114e: 46bd mov sp, r7 8001150: bc80 pop {r7} 8001152: 4770 bx lr 08001154 <_write>: /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ int _write(int file , char *ptr,int len) { 8001154: b580 push {r7, lr} 8001156: b086 sub sp, #24 8001158: af00 add r7, sp, #0 800115a: 60f8 str r0, [r7, #12] 800115c: 60b9 str r1, [r7, #8] 800115e: 607a str r2, [r7, #4] int i = 0; 8001160: 2300 movs r3, #0 8001162: 617b str r3, [r7, #20] for(i = 0;i ITM_SendChar((*ptr++)); 800116a: 68bb ldr r3, [r7, #8] 800116c: 1c5a adds r2, r3, #1 800116e: 60ba str r2, [r7, #8] 8001170: 781b ldrb r3, [r3, #0] 8001172: 4618 mov r0, r3 8001174: f7ff ffc8 bl 8001108 for(i = 0;i return len; 8001186: 687b ldr r3, [r7, #4] } 8001188: 4618 mov r0, r3 800118a: 3718 adds r7, #24 800118c: 46bd mov sp, r7 800118e: bd80 pop {r7, pc} 08001190
: /** * @brief The application entry point. * @retval int */ int main(void) { 8001190: b580 push {r7, lr} 8001192: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 8001194: f000 fc98 bl 8001ac8 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8001198: f000 f80d bl 80011b6 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 800119c: f000 f8ea bl 8001374 MX_FSMC_Init(); 80011a0: f000 f9e6 bl 8001570 MX_I2C2_Init(); 80011a4: f000 f84c bl 8001240 MX_TIM6_Init(); 80011a8: f000 f8ae bl 8001308 MX_SPI1_Init(); 80011ac: f000 f876 bl 800129c /* USER CODE BEGIN 2 */ main_app(); 80011b0: f005 ff7a bl 80070a8 /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) 80011b4: e7fe b.n 80011b4 080011b6 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 80011b6: b580 push {r7, lr} 80011b8: b090 sub sp, #64 ; 0x40 80011ba: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 80011bc: f107 0318 add.w r3, r7, #24 80011c0: 2228 movs r2, #40 ; 0x28 80011c2: 2100 movs r1, #0 80011c4: 4618 mov r0, r3 80011c6: f006 fae7 bl 8007798 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 80011ca: 1d3b adds r3, r7, #4 80011cc: 2200 movs r2, #0 80011ce: 601a str r2, [r3, #0] 80011d0: 605a str r2, [r3, #4] 80011d2: 609a str r2, [r3, #8] 80011d4: 60da str r2, [r3, #12] 80011d6: 611a str r2, [r3, #16] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 80011d8: 2301 movs r3, #1 80011da: 61bb str r3, [r7, #24] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 80011dc: f44f 3380 mov.w r3, #65536 ; 0x10000 80011e0: 61fb str r3, [r7, #28] RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 80011e2: 2300 movs r3, #0 80011e4: 623b str r3, [r7, #32] RCC_OscInitStruct.HSIState = RCC_HSI_ON; 80011e6: 2301 movs r3, #1 80011e8: 62bb str r3, [r7, #40] ; 0x28 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 80011ea: 2302 movs r3, #2 80011ec: 637b str r3, [r7, #52] ; 0x34 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 80011ee: f44f 3380 mov.w r3, #65536 ; 0x10000 80011f2: 63bb str r3, [r7, #56] ; 0x38 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 80011f4: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000 80011f8: 63fb str r3, [r7, #60] ; 0x3c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 80011fa: f107 0318 add.w r3, r7, #24 80011fe: 4618 mov r0, r3 8001200: f001 ffba bl 8003178 8001204: 4603 mov r3, r0 8001206: 2b00 cmp r3, #0 8001208: d001 beq.n 800120e { Error_Handler(); 800120a: f000 fa15 bl 8001638 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 800120e: 230f movs r3, #15 8001210: 607b str r3, [r7, #4] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8001212: 2302 movs r3, #2 8001214: 60bb str r3, [r7, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8001216: 2300 movs r3, #0 8001218: 60fb str r3, [r7, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 800121a: f44f 6380 mov.w r3, #1024 ; 0x400 800121e: 613b str r3, [r7, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8001220: 2300 movs r3, #0 8001222: 617b str r3, [r7, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8001224: 1d3b adds r3, r7, #4 8001226: 2102 movs r1, #2 8001228: 4618 mov r0, r3 800122a: f002 fa25 bl 8003678 800122e: 4603 mov r3, r0 8001230: 2b00 cmp r3, #0 8001232: d001 beq.n 8001238 { Error_Handler(); 8001234: f000 fa00 bl 8001638 } } 8001238: bf00 nop 800123a: 3740 adds r7, #64 ; 0x40 800123c: 46bd mov sp, r7 800123e: bd80 pop {r7, pc} 08001240 : * @brief I2C2 Initialization Function * @param None * @retval None */ static void MX_I2C2_Init(void) { 8001240: b580 push {r7, lr} 8001242: af00 add r7, sp, #0 /* USER CODE END I2C2_Init 0 */ /* USER CODE BEGIN I2C2_Init 1 */ /* USER CODE END I2C2_Init 1 */ hi2c2.Instance = I2C2; 8001244: 4b12 ldr r3, [pc, #72] ; (8001290 ) 8001246: 4a13 ldr r2, [pc, #76] ; (8001294 ) 8001248: 601a str r2, [r3, #0] hi2c2.Init.ClockSpeed = 100000; 800124a: 4b11 ldr r3, [pc, #68] ; (8001290 ) 800124c: 4a12 ldr r2, [pc, #72] ; (8001298 ) 800124e: 605a str r2, [r3, #4] hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 8001250: 4b0f ldr r3, [pc, #60] ; (8001290 ) 8001252: 2200 movs r2, #0 8001254: 609a str r2, [r3, #8] hi2c2.Init.OwnAddress1 = 0; 8001256: 4b0e ldr r3, [pc, #56] ; (8001290 ) 8001258: 2200 movs r2, #0 800125a: 60da str r2, [r3, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 800125c: 4b0c ldr r3, [pc, #48] ; (8001290 ) 800125e: f44f 4280 mov.w r2, #16384 ; 0x4000 8001262: 611a str r2, [r3, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 8001264: 4b0a ldr r3, [pc, #40] ; (8001290 ) 8001266: 2200 movs r2, #0 8001268: 615a str r2, [r3, #20] hi2c2.Init.OwnAddress2 = 0; 800126a: 4b09 ldr r3, [pc, #36] ; (8001290 ) 800126c: 2200 movs r2, #0 800126e: 619a str r2, [r3, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 8001270: 4b07 ldr r3, [pc, #28] ; (8001290 ) 8001272: 2200 movs r2, #0 8001274: 61da str r2, [r3, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8001276: 4b06 ldr r3, [pc, #24] ; (8001290 ) 8001278: 2200 movs r2, #0 800127a: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) 800127c: 4804 ldr r0, [pc, #16] ; (8001290 ) 800127e: f000 ff7b bl 8002178 8001282: 4603 mov r3, r0 8001284: 2b00 cmp r3, #0 8001286: d001 beq.n 800128c { Error_Handler(); 8001288: f000 f9d6 bl 8001638 } /* USER CODE BEGIN I2C2_Init 2 */ /* USER CODE END I2C2_Init 2 */ } 800128c: bf00 nop 800128e: bd80 pop {r7, pc} 8001290: 20000214 .word 0x20000214 8001294: 40005800 .word 0x40005800 8001298: 000186a0 .word 0x000186a0 0800129c : * @brief SPI1 Initialization Function * @param None * @retval None */ static void MX_SPI1_Init(void) { 800129c: b580 push {r7, lr} 800129e: af00 add r7, sp, #0 /* USER CODE BEGIN SPI1_Init 1 */ /* USER CODE END SPI1_Init 1 */ /* SPI1 parameter configuration*/ hspi1.Instance = SPI1; 80012a0: 4b17 ldr r3, [pc, #92] ; (8001300 ) 80012a2: 4a18 ldr r2, [pc, #96] ; (8001304 ) 80012a4: 601a str r2, [r3, #0] hspi1.Init.Mode = SPI_MODE_MASTER; 80012a6: 4b16 ldr r3, [pc, #88] ; (8001300 ) 80012a8: f44f 7282 mov.w r2, #260 ; 0x104 80012ac: 605a str r2, [r3, #4] hspi1.Init.Direction = SPI_DIRECTION_2LINES; 80012ae: 4b14 ldr r3, [pc, #80] ; (8001300 ) 80012b0: 2200 movs r2, #0 80012b2: 609a str r2, [r3, #8] hspi1.Init.DataSize = SPI_DATASIZE_8BIT; 80012b4: 4b12 ldr r3, [pc, #72] ; (8001300 ) 80012b6: 2200 movs r2, #0 80012b8: 60da str r2, [r3, #12] hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; 80012ba: 4b11 ldr r3, [pc, #68] ; (8001300 ) 80012bc: 2200 movs r2, #0 80012be: 611a str r2, [r3, #16] hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; 80012c0: 4b0f ldr r3, [pc, #60] ; (8001300 ) 80012c2: 2200 movs r2, #0 80012c4: 615a str r2, [r3, #20] hspi1.Init.NSS = SPI_NSS_SOFT; 80012c6: 4b0e ldr r3, [pc, #56] ; (8001300 ) 80012c8: f44f 7200 mov.w r2, #512 ; 0x200 80012cc: 619a str r2, [r3, #24] hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; 80012ce: 4b0c ldr r3, [pc, #48] ; (8001300 ) 80012d0: 2208 movs r2, #8 80012d2: 61da str r2, [r3, #28] hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; 80012d4: 4b0a ldr r3, [pc, #40] ; (8001300 ) 80012d6: 2200 movs r2, #0 80012d8: 621a str r2, [r3, #32] hspi1.Init.TIMode = SPI_TIMODE_DISABLE; 80012da: 4b09 ldr r3, [pc, #36] ; (8001300 ) 80012dc: 2200 movs r2, #0 80012de: 625a str r2, [r3, #36] ; 0x24 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 80012e0: 4b07 ldr r3, [pc, #28] ; (8001300 ) 80012e2: 2200 movs r2, #0 80012e4: 629a str r2, [r3, #40] ; 0x28 hspi1.Init.CRCPolynomial = 10; 80012e6: 4b06 ldr r3, [pc, #24] ; (8001300 ) 80012e8: 220a movs r2, #10 80012ea: 62da str r2, [r3, #44] ; 0x2c if (HAL_SPI_Init(&hspi1) != HAL_OK) 80012ec: 4804 ldr r0, [pc, #16] ; (8001300 ) 80012ee: f002 fb49 bl 8003984 80012f2: 4603 mov r3, r0 80012f4: 2b00 cmp r3, #0 80012f6: d001 beq.n 80012fc { Error_Handler(); 80012f8: f000 f99e bl 8001638 } /* USER CODE BEGIN SPI1_Init 2 */ /* USER CODE END SPI1_Init 2 */ } 80012fc: bf00 nop 80012fe: bd80 pop {r7, pc} 8001300: 200002f8 .word 0x200002f8 8001304: 40013000 .word 0x40013000 08001308 : * @brief TIM6 Initialization Function * @param None * @retval None */ static void MX_TIM6_Init(void) { 8001308: b580 push {r7, lr} 800130a: b082 sub sp, #8 800130c: af00 add r7, sp, #0 /* USER CODE BEGIN TIM6_Init 0 */ /* USER CODE END TIM6_Init 0 */ TIM_MasterConfigTypeDef sMasterConfig = {0}; 800130e: 463b mov r3, r7 8001310: 2200 movs r2, #0 8001312: 601a str r2, [r3, #0] 8001314: 605a str r2, [r3, #4] /* USER CODE BEGIN TIM6_Init 1 */ /* USER CODE END TIM6_Init 1 */ htim6.Instance = TIM6; 8001316: 4b15 ldr r3, [pc, #84] ; (800136c ) 8001318: 4a15 ldr r2, [pc, #84] ; (8001370 ) 800131a: 601a str r2, [r3, #0] htim6.Init.Prescaler = 72-1; 800131c: 4b13 ldr r3, [pc, #76] ; (800136c ) 800131e: 2247 movs r2, #71 ; 0x47 8001320: 605a str r2, [r3, #4] htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 8001322: 4b12 ldr r3, [pc, #72] ; (800136c ) 8001324: 2200 movs r2, #0 8001326: 609a str r2, [r3, #8] htim6.Init.Period = 10000-1; 8001328: 4b10 ldr r3, [pc, #64] ; (800136c ) 800132a: f242 720f movw r2, #9999 ; 0x270f 800132e: 60da str r2, [r3, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8001330: 4b0e ldr r3, [pc, #56] ; (800136c ) 8001332: 2200 movs r2, #0 8001334: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8001336: 480d ldr r0, [pc, #52] ; (800136c ) 8001338: f003 f8dd bl 80044f6 800133c: 4603 mov r3, r0 800133e: 2b00 cmp r3, #0 8001340: d001 beq.n 8001346 { Error_Handler(); 8001342: f000 f979 bl 8001638 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8001346: 2300 movs r3, #0 8001348: 603b str r3, [r7, #0] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800134a: 2300 movs r3, #0 800134c: 607b str r3, [r7, #4] if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 800134e: 463b mov r3, r7 8001350: 4619 mov r1, r3 8001352: 4806 ldr r0, [pc, #24] ; (800136c ) 8001354: f003 faf2 bl 800493c 8001358: 4603 mov r3, r0 800135a: 2b00 cmp r3, #0 800135c: d001 beq.n 8001362 { Error_Handler(); 800135e: f000 f96b bl 8001638 } /* USER CODE BEGIN TIM6_Init 2 */ /* USER CODE END TIM6_Init 2 */ } 8001362: bf00 nop 8001364: 3708 adds r7, #8 8001366: 46bd mov sp, r7 8001368: bd80 pop {r7, pc} 800136a: bf00 nop 800136c: 200002b0 .word 0x200002b0 8001370: 40001000 .word 0x40001000 08001374 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 8001374: b580 push {r7, lr} 8001376: b08a sub sp, #40 ; 0x28 8001378: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800137a: f107 0318 add.w r3, r7, #24 800137e: 2200 movs r2, #0 8001380: 601a str r2, [r3, #0] 8001382: 605a str r2, [r3, #4] 8001384: 609a str r2, [r3, #8] 8001386: 60da str r2, [r3, #12] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); 8001388: 4b74 ldr r3, [pc, #464] ; (800155c ) 800138a: 699b ldr r3, [r3, #24] 800138c: 4a73 ldr r2, [pc, #460] ; (800155c ) 800138e: f043 0340 orr.w r3, r3, #64 ; 0x40 8001392: 6193 str r3, [r2, #24] 8001394: 4b71 ldr r3, [pc, #452] ; (800155c ) 8001396: 699b ldr r3, [r3, #24] 8001398: f003 0340 and.w r3, r3, #64 ; 0x40 800139c: 617b str r3, [r7, #20] 800139e: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOF_CLK_ENABLE(); 80013a0: 4b6e ldr r3, [pc, #440] ; (800155c ) 80013a2: 699b ldr r3, [r3, #24] 80013a4: 4a6d ldr r2, [pc, #436] ; (800155c ) 80013a6: f043 0380 orr.w r3, r3, #128 ; 0x80 80013aa: 6193 str r3, [r2, #24] 80013ac: 4b6b ldr r3, [pc, #428] ; (800155c ) 80013ae: 699b ldr r3, [r3, #24] 80013b0: f003 0380 and.w r3, r3, #128 ; 0x80 80013b4: 613b str r3, [r7, #16] 80013b6: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 80013b8: 4b68 ldr r3, [pc, #416] ; (800155c ) 80013ba: 699b ldr r3, [r3, #24] 80013bc: 4a67 ldr r2, [pc, #412] ; (800155c ) 80013be: f043 0304 orr.w r3, r3, #4 80013c2: 6193 str r3, [r2, #24] 80013c4: 4b65 ldr r3, [pc, #404] ; (800155c ) 80013c6: 699b ldr r3, [r3, #24] 80013c8: f003 0304 and.w r3, r3, #4 80013cc: 60fb str r3, [r7, #12] 80013ce: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOB_CLK_ENABLE(); 80013d0: 4b62 ldr r3, [pc, #392] ; (800155c ) 80013d2: 699b ldr r3, [r3, #24] 80013d4: 4a61 ldr r2, [pc, #388] ; (800155c ) 80013d6: f043 0308 orr.w r3, r3, #8 80013da: 6193 str r3, [r2, #24] 80013dc: 4b5f ldr r3, [pc, #380] ; (800155c ) 80013de: 699b ldr r3, [r3, #24] 80013e0: f003 0308 and.w r3, r3, #8 80013e4: 60bb str r3, [r7, #8] 80013e6: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOG_CLK_ENABLE(); 80013e8: 4b5c ldr r3, [pc, #368] ; (800155c ) 80013ea: 699b ldr r3, [r3, #24] 80013ec: 4a5b ldr r2, [pc, #364] ; (800155c ) 80013ee: f443 7380 orr.w r3, r3, #256 ; 0x100 80013f2: 6193 str r3, [r2, #24] 80013f4: 4b59 ldr r3, [pc, #356] ; (800155c ) 80013f6: 699b ldr r3, [r3, #24] 80013f8: f403 7380 and.w r3, r3, #256 ; 0x100 80013fc: 607b str r3, [r7, #4] 80013fe: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOD_CLK_ENABLE(); 8001400: 4b56 ldr r3, [pc, #344] ; (800155c ) 8001402: 699b ldr r3, [r3, #24] 8001404: 4a55 ldr r2, [pc, #340] ; (800155c ) 8001406: f043 0320 orr.w r3, r3, #32 800140a: 6193 str r3, [r2, #24] 800140c: 4b53 ldr r3, [pc, #332] ; (800155c ) 800140e: 699b ldr r3, [r3, #24] 8001410: f003 0320 and.w r3, r3, #32 8001414: 603b str r3, [r7, #0] 8001416: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(TDIN_GPIO_Port, TDIN_Pin, GPIO_PIN_SET); 8001418: 2201 movs r2, #1 800141a: f44f 7100 mov.w r1, #512 ; 0x200 800141e: 4850 ldr r0, [pc, #320] ; (8001560 ) 8001420: f000 fe91 bl 8002146 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(RC522_CS_GPIO_Port, RC522_CS_Pin, GPIO_PIN_RESET); 8001424: 2200 movs r2, #0 8001426: 2110 movs r1, #16 8001428: 484e ldr r0, [pc, #312] ; (8001564 ) 800142a: f000 fe8c bl 8002146 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(LCD_BL_GPIO_Port, LCD_BL_Pin, GPIO_PIN_RESET); 800142e: 2200 movs r2, #0 8001430: 2101 movs r1, #1 8001432: 484d ldr r0, [pc, #308] ; (8001568 ) 8001434: f000 fe87 bl 8002146 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, TCLK_Pin|TCS_Pin|MAX_IRD_Pin|MAX_RD_Pin, GPIO_PIN_SET); 8001438: 2201 movs r2, #1 800143a: f245 0106 movw r1, #20486 ; 0x5006 800143e: 484a ldr r0, [pc, #296] ; (8001568 ) 8001440: f000 fe81 bl 8002146 /*Configure GPIO pins : KEY3_Pin KEY2_Pin KEY1_Pin */ GPIO_InitStruct.Pin = KEY3_Pin|KEY2_Pin|KEY1_Pin; 8001444: 231c movs r3, #28 8001446: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001448: 2300 movs r3, #0 800144a: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 800144c: 2301 movs r3, #1 800144e: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8001450: f107 0318 add.w r3, r7, #24 8001454: 4619 mov r1, r3 8001456: 4845 ldr r0, [pc, #276] ; (800156c ) 8001458: f000 fcca bl 8001df0 /*Configure GPIO pin : TDOUT_Pin */ GPIO_InitStruct.Pin = TDOUT_Pin; 800145c: f44f 7380 mov.w r3, #256 ; 0x100 8001460: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001462: 2300 movs r3, #0 8001464: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001466: 2300 movs r3, #0 8001468: 623b str r3, [r7, #32] HAL_GPIO_Init(TDOUT_GPIO_Port, &GPIO_InitStruct); 800146a: f107 0318 add.w r3, r7, #24 800146e: 4619 mov r1, r3 8001470: 483b ldr r0, [pc, #236] ; (8001560 ) 8001472: f000 fcbd bl 8001df0 /*Configure GPIO pin : TDIN_Pin */ GPIO_InitStruct.Pin = TDIN_Pin; 8001476: f44f 7300 mov.w r3, #512 ; 0x200 800147a: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800147c: 2301 movs r3, #1 800147e: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001480: 2300 movs r3, #0 8001482: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001484: 2303 movs r3, #3 8001486: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(TDIN_GPIO_Port, &GPIO_InitStruct); 8001488: f107 0318 add.w r3, r7, #24 800148c: 4619 mov r1, r3 800148e: 4834 ldr r0, [pc, #208] ; (8001560 ) 8001490: f000 fcae bl 8001df0 /*Configure GPIO pin : TPEN_Pin */ GPIO_InitStruct.Pin = TPEN_Pin; 8001494: f44f 6380 mov.w r3, #1024 ; 0x400 8001498: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800149a: 2300 movs r3, #0 800149c: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 800149e: 2301 movs r3, #1 80014a0: 623b str r3, [r7, #32] HAL_GPIO_Init(TPEN_GPIO_Port, &GPIO_InitStruct); 80014a2: f107 0318 add.w r3, r7, #24 80014a6: 4619 mov r1, r3 80014a8: 482d ldr r0, [pc, #180] ; (8001560 ) 80014aa: f000 fca1 bl 8001df0 /*Configure GPIO pin : KEY0_Pin */ GPIO_InitStruct.Pin = KEY0_Pin; 80014ae: 2301 movs r3, #1 80014b0: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80014b2: 2300 movs r3, #0 80014b4: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 80014b6: 2300 movs r3, #0 80014b8: 623b str r3, [r7, #32] HAL_GPIO_Init(KEY0_GPIO_Port, &GPIO_InitStruct); 80014ba: f107 0318 add.w r3, r7, #24 80014be: 4619 mov r1, r3 80014c0: 4828 ldr r0, [pc, #160] ; (8001564 ) 80014c2: f000 fc95 bl 8001df0 /*Configure GPIO pin : RC522_CS_Pin */ GPIO_InitStruct.Pin = RC522_CS_Pin; 80014c6: 2310 movs r3, #16 80014c8: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80014ca: 2301 movs r3, #1 80014cc: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 80014ce: 2300 movs r3, #0 80014d0: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80014d2: 2302 movs r3, #2 80014d4: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(RC522_CS_GPIO_Port, &GPIO_InitStruct); 80014d6: f107 0318 add.w r3, r7, #24 80014da: 4619 mov r1, r3 80014dc: 4821 ldr r0, [pc, #132] ; (8001564 ) 80014de: f000 fc87 bl 8001df0 /*Configure GPIO pin : LCD_BL_Pin */ GPIO_InitStruct.Pin = LCD_BL_Pin; 80014e2: 2301 movs r3, #1 80014e4: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80014e6: 2301 movs r3, #1 80014e8: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 80014ea: 2300 movs r3, #0 80014ec: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80014ee: 2302 movs r3, #2 80014f0: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(LCD_BL_GPIO_Port, &GPIO_InitStruct); 80014f2: f107 0318 add.w r3, r7, #24 80014f6: 4619 mov r1, r3 80014f8: 481b ldr r0, [pc, #108] ; (8001568 ) 80014fa: f000 fc79 bl 8001df0 /*Configure GPIO pins : TCLK_Pin TCS_Pin */ GPIO_InitStruct.Pin = TCLK_Pin|TCS_Pin; 80014fe: 2306 movs r3, #6 8001500: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001502: 2301 movs r3, #1 8001504: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001506: 2300 movs r3, #0 8001508: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800150a: 2303 movs r3, #3 800150c: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800150e: f107 0318 add.w r3, r7, #24 8001512: 4619 mov r1, r3 8001514: 4814 ldr r0, [pc, #80] ; (8001568 ) 8001516: f000 fc6b bl 8001df0 /*Configure GPIO pins : MAX_IRD_Pin MAX_RD_Pin */ GPIO_InitStruct.Pin = MAX_IRD_Pin|MAX_RD_Pin; 800151a: f44f 43a0 mov.w r3, #20480 ; 0x5000 800151e: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001520: 2301 movs r3, #1 8001522: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 8001524: 2301 movs r3, #1 8001526: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001528: 2303 movs r3, #3 800152a: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800152c: f107 0318 add.w r3, r7, #24 8001530: 4619 mov r1, r3 8001532: 480d ldr r0, [pc, #52] ; (8001568 ) 8001534: f000 fc5c bl 8001df0 /*Configure GPIO pin : MAX_INT_Pin */ GPIO_InitStruct.Pin = MAX_INT_Pin; 8001538: f44f 5300 mov.w r3, #8192 ; 0x2000 800153c: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800153e: 2300 movs r3, #0 8001540: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 8001542: 2301 movs r3, #1 8001544: 623b str r3, [r7, #32] HAL_GPIO_Init(MAX_INT_GPIO_Port, &GPIO_InitStruct); 8001546: f107 0318 add.w r3, r7, #24 800154a: 4619 mov r1, r3 800154c: 4806 ldr r0, [pc, #24] ; (8001568 ) 800154e: f000 fc4f bl 8001df0 } 8001552: bf00 nop 8001554: 3728 adds r7, #40 ; 0x28 8001556: 46bd mov sp, r7 8001558: bd80 pop {r7, pc} 800155a: bf00 nop 800155c: 40021000 .word 0x40021000 8001560: 40011c00 .word 0x40011c00 8001564: 40010800 .word 0x40010800 8001568: 40010c00 .word 0x40010c00 800156c: 40011800 .word 0x40011800 08001570 : /* FSMC initialization function */ static void MX_FSMC_Init(void) { 8001570: b580 push {r7, lr} 8001572: b088 sub sp, #32 8001574: af00 add r7, sp, #0 /* USER CODE BEGIN FSMC_Init 0 */ /* USER CODE END FSMC_Init 0 */ FSMC_NORSRAM_TimingTypeDef Timing = {0}; 8001576: 1d3b adds r3, r7, #4 8001578: 2200 movs r2, #0 800157a: 601a str r2, [r3, #0] 800157c: 605a str r2, [r3, #4] 800157e: 609a str r2, [r3, #8] 8001580: 60da str r2, [r3, #12] 8001582: 611a str r2, [r3, #16] 8001584: 615a str r2, [r3, #20] 8001586: 619a str r2, [r3, #24] /* USER CODE END FSMC_Init 1 */ /** Perform the SRAM1 memory initialization sequence */ hsram1.Instance = FSMC_NORSRAM_DEVICE; 8001588: 4b28 ldr r3, [pc, #160] ; (800162c ) 800158a: f04f 4220 mov.w r2, #2684354560 ; 0xa0000000 800158e: 601a str r2, [r3, #0] hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE; 8001590: 4b26 ldr r3, [pc, #152] ; (800162c ) 8001592: 4a27 ldr r2, [pc, #156] ; (8001630 ) 8001594: 605a str r2, [r3, #4] /* hsram1.Init */ hsram1.Init.NSBank = FSMC_NORSRAM_BANK4; 8001596: 4b25 ldr r3, [pc, #148] ; (800162c ) 8001598: 2206 movs r2, #6 800159a: 609a str r2, [r3, #8] hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE; 800159c: 4b23 ldr r3, [pc, #140] ; (800162c ) 800159e: 2200 movs r2, #0 80015a0: 60da str r2, [r3, #12] hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM; 80015a2: 4b22 ldr r3, [pc, #136] ; (800162c ) 80015a4: 2200 movs r2, #0 80015a6: 611a str r2, [r3, #16] hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16; 80015a8: 4b20 ldr r3, [pc, #128] ; (800162c ) 80015aa: 2210 movs r2, #16 80015ac: 615a str r2, [r3, #20] hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE; 80015ae: 4b1f ldr r3, [pc, #124] ; (800162c ) 80015b0: 2200 movs r2, #0 80015b2: 619a str r2, [r3, #24] hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW; 80015b4: 4b1d ldr r3, [pc, #116] ; (800162c ) 80015b6: 2200 movs r2, #0 80015b8: 61da str r2, [r3, #28] hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE; 80015ba: 4b1c ldr r3, [pc, #112] ; (800162c ) 80015bc: 2200 movs r2, #0 80015be: 621a str r2, [r3, #32] hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS; 80015c0: 4b1a ldr r3, [pc, #104] ; (800162c ) 80015c2: 2200 movs r2, #0 80015c4: 625a str r2, [r3, #36] ; 0x24 hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE; 80015c6: 4b19 ldr r3, [pc, #100] ; (800162c ) 80015c8: f44f 5280 mov.w r2, #4096 ; 0x1000 80015cc: 629a str r2, [r3, #40] ; 0x28 hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE; 80015ce: 4b17 ldr r3, [pc, #92] ; (800162c ) 80015d0: 2200 movs r2, #0 80015d2: 62da str r2, [r3, #44] ; 0x2c hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE; 80015d4: 4b15 ldr r3, [pc, #84] ; (800162c ) 80015d6: 2200 movs r2, #0 80015d8: 631a str r2, [r3, #48] ; 0x30 hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE; 80015da: 4b14 ldr r3, [pc, #80] ; (800162c ) 80015dc: 2200 movs r2, #0 80015de: 635a str r2, [r3, #52] ; 0x34 hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE; 80015e0: 4b12 ldr r3, [pc, #72] ; (800162c ) 80015e2: 2200 movs r2, #0 80015e4: 639a str r2, [r3, #56] ; 0x38 /* Timing */ Timing.AddressSetupTime = 0; 80015e6: 2300 movs r3, #0 80015e8: 607b str r3, [r7, #4] Timing.AddressHoldTime = 15; 80015ea: 230f movs r3, #15 80015ec: 60bb str r3, [r7, #8] Timing.DataSetupTime = 1; 80015ee: 2301 movs r3, #1 80015f0: 60fb str r3, [r7, #12] Timing.BusTurnAroundDuration = 0; 80015f2: 2300 movs r3, #0 80015f4: 613b str r3, [r7, #16] Timing.CLKDivision = 16; 80015f6: 2310 movs r3, #16 80015f8: 617b str r3, [r7, #20] Timing.DataLatency = 17; 80015fa: 2311 movs r3, #17 80015fc: 61bb str r3, [r7, #24] Timing.AccessMode = FSMC_ACCESS_MODE_A; 80015fe: 2300 movs r3, #0 8001600: 61fb str r3, [r7, #28] /* ExtTiming */ if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK) 8001602: 1d3b adds r3, r7, #4 8001604: 2200 movs r2, #0 8001606: 4619 mov r1, r3 8001608: 4808 ldr r0, [pc, #32] ; (800162c ) 800160a: f002 ff27 bl 800445c 800160e: 4603 mov r3, r0 8001610: 2b00 cmp r3, #0 8001612: d001 beq.n 8001618 { Error_Handler( ); 8001614: f000 f810 bl 8001638 } /** Disconnect NADV */ __HAL_AFIO_FSMCNADV_DISCONNECTED(); 8001618: 4b06 ldr r3, [pc, #24] ; (8001634 ) 800161a: 69db ldr r3, [r3, #28] 800161c: 4a05 ldr r2, [pc, #20] ; (8001634 ) 800161e: f443 6380 orr.w r3, r3, #1024 ; 0x400 8001622: 61d3 str r3, [r2, #28] /* USER CODE BEGIN FSMC_Init 2 */ /* USER CODE END FSMC_Init 2 */ } 8001624: bf00 nop 8001626: 3720 adds r7, #32 8001628: 46bd mov sp, r7 800162a: bd80 pop {r7, pc} 800162c: 20000268 .word 0x20000268 8001630: a0000104 .word 0xa0000104 8001634: 40010000 .word 0x40010000 08001638 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8001638: b480 push {r7} 800163a: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 800163c: b672 cpsid i } 800163e: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8001640: e7fe b.n 8001640 ... 08001644 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8001644: b480 push {r7} 8001646: b085 sub sp, #20 8001648: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 800164a: 4b15 ldr r3, [pc, #84] ; (80016a0 ) 800164c: 699b ldr r3, [r3, #24] 800164e: 4a14 ldr r2, [pc, #80] ; (80016a0 ) 8001650: f043 0301 orr.w r3, r3, #1 8001654: 6193 str r3, [r2, #24] 8001656: 4b12 ldr r3, [pc, #72] ; (80016a0 ) 8001658: 699b ldr r3, [r3, #24] 800165a: f003 0301 and.w r3, r3, #1 800165e: 60bb str r3, [r7, #8] 8001660: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 8001662: 4b0f ldr r3, [pc, #60] ; (80016a0 ) 8001664: 69db ldr r3, [r3, #28] 8001666: 4a0e ldr r2, [pc, #56] ; (80016a0 ) 8001668: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 800166c: 61d3 str r3, [r2, #28] 800166e: 4b0c ldr r3, [pc, #48] ; (80016a0 ) 8001670: 69db ldr r3, [r3, #28] 8001672: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8001676: 607b str r3, [r7, #4] 8001678: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 800167a: 4b0a ldr r3, [pc, #40] ; (80016a4 ) 800167c: 685b ldr r3, [r3, #4] 800167e: 60fb str r3, [r7, #12] 8001680: 68fb ldr r3, [r7, #12] 8001682: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 8001686: 60fb str r3, [r7, #12] 8001688: 68fb ldr r3, [r7, #12] 800168a: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 800168e: 60fb str r3, [r7, #12] 8001690: 4a04 ldr r2, [pc, #16] ; (80016a4 ) 8001692: 68fb ldr r3, [r7, #12] 8001694: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8001696: bf00 nop 8001698: 3714 adds r7, #20 800169a: 46bd mov sp, r7 800169c: bc80 pop {r7} 800169e: 4770 bx lr 80016a0: 40021000 .word 0x40021000 80016a4: 40010000 .word 0x40010000 080016a8 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 80016a8: b580 push {r7, lr} 80016aa: b088 sub sp, #32 80016ac: af00 add r7, sp, #0 80016ae: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 80016b0: f107 0310 add.w r3, r7, #16 80016b4: 2200 movs r2, #0 80016b6: 601a str r2, [r3, #0] 80016b8: 605a str r2, [r3, #4] 80016ba: 609a str r2, [r3, #8] 80016bc: 60da str r2, [r3, #12] if(hi2c->Instance==I2C2) 80016be: 687b ldr r3, [r7, #4] 80016c0: 681b ldr r3, [r3, #0] 80016c2: 4a16 ldr r2, [pc, #88] ; (800171c ) 80016c4: 4293 cmp r3, r2 80016c6: d124 bne.n 8001712 { /* USER CODE BEGIN I2C2_MspInit 0 */ /* USER CODE END I2C2_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 80016c8: 4b15 ldr r3, [pc, #84] ; (8001720 ) 80016ca: 699b ldr r3, [r3, #24] 80016cc: 4a14 ldr r2, [pc, #80] ; (8001720 ) 80016ce: f043 0308 orr.w r3, r3, #8 80016d2: 6193 str r3, [r2, #24] 80016d4: 4b12 ldr r3, [pc, #72] ; (8001720 ) 80016d6: 699b ldr r3, [r3, #24] 80016d8: f003 0308 and.w r3, r3, #8 80016dc: 60fb str r3, [r7, #12] 80016de: 68fb ldr r3, [r7, #12] /**I2C2 GPIO Configuration PB10 ------> I2C2_SCL PB11 ------> I2C2_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; 80016e0: f44f 6340 mov.w r3, #3072 ; 0xc00 80016e4: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 80016e6: 2312 movs r3, #18 80016e8: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80016ea: 2303 movs r3, #3 80016ec: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80016ee: f107 0310 add.w r3, r7, #16 80016f2: 4619 mov r1, r3 80016f4: 480b ldr r0, [pc, #44] ; (8001724 ) 80016f6: f000 fb7b bl 8001df0 /* Peripheral clock enable */ __HAL_RCC_I2C2_CLK_ENABLE(); 80016fa: 4b09 ldr r3, [pc, #36] ; (8001720 ) 80016fc: 69db ldr r3, [r3, #28] 80016fe: 4a08 ldr r2, [pc, #32] ; (8001720 ) 8001700: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 8001704: 61d3 str r3, [r2, #28] 8001706: 4b06 ldr r3, [pc, #24] ; (8001720 ) 8001708: 69db ldr r3, [r3, #28] 800170a: f403 0380 and.w r3, r3, #4194304 ; 0x400000 800170e: 60bb str r3, [r7, #8] 8001710: 68bb ldr r3, [r7, #8] /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } 8001712: bf00 nop 8001714: 3720 adds r7, #32 8001716: 46bd mov sp, r7 8001718: bd80 pop {r7, pc} 800171a: bf00 nop 800171c: 40005800 .word 0x40005800 8001720: 40021000 .word 0x40021000 8001724: 40010c00 .word 0x40010c00 08001728 : * This function configures the hardware resources used in this example * @param hspi: SPI handle pointer * @retval None */ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) { 8001728: b580 push {r7, lr} 800172a: b088 sub sp, #32 800172c: af00 add r7, sp, #0 800172e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001730: f107 0310 add.w r3, r7, #16 8001734: 2200 movs r2, #0 8001736: 601a str r2, [r3, #0] 8001738: 605a str r2, [r3, #4] 800173a: 609a str r2, [r3, #8] 800173c: 60da str r2, [r3, #12] if(hspi->Instance==SPI1) 800173e: 687b ldr r3, [r7, #4] 8001740: 681b ldr r3, [r3, #0] 8001742: 4a1b ldr r2, [pc, #108] ; (80017b0 ) 8001744: 4293 cmp r3, r2 8001746: d12f bne.n 80017a8 { /* USER CODE BEGIN SPI1_MspInit 0 */ /* USER CODE END SPI1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_SPI1_CLK_ENABLE(); 8001748: 4b1a ldr r3, [pc, #104] ; (80017b4 ) 800174a: 699b ldr r3, [r3, #24] 800174c: 4a19 ldr r2, [pc, #100] ; (80017b4 ) 800174e: f443 5380 orr.w r3, r3, #4096 ; 0x1000 8001752: 6193 str r3, [r2, #24] 8001754: 4b17 ldr r3, [pc, #92] ; (80017b4 ) 8001756: 699b ldr r3, [r3, #24] 8001758: f403 5380 and.w r3, r3, #4096 ; 0x1000 800175c: 60fb str r3, [r7, #12] 800175e: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001760: 4b14 ldr r3, [pc, #80] ; (80017b4 ) 8001762: 699b ldr r3, [r3, #24] 8001764: 4a13 ldr r2, [pc, #76] ; (80017b4 ) 8001766: f043 0304 orr.w r3, r3, #4 800176a: 6193 str r3, [r2, #24] 800176c: 4b11 ldr r3, [pc, #68] ; (80017b4 ) 800176e: 699b ldr r3, [r3, #24] 8001770: f003 0304 and.w r3, r3, #4 8001774: 60bb str r3, [r7, #8] 8001776: 68bb ldr r3, [r7, #8] /**SPI1 GPIO Configuration PA5 ------> SPI1_SCK PA6 ------> SPI1_MISO PA7 ------> SPI1_MOSI */ GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_7; 8001778: 23a0 movs r3, #160 ; 0xa0 800177a: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800177c: 2302 movs r3, #2 800177e: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001780: 2303 movs r3, #3 8001782: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001784: f107 0310 add.w r3, r7, #16 8001788: 4619 mov r1, r3 800178a: 480b ldr r0, [pc, #44] ; (80017b8 ) 800178c: f000 fb30 bl 8001df0 GPIO_InitStruct.Pin = GPIO_PIN_6; 8001790: 2340 movs r3, #64 ; 0x40 8001792: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001794: 2300 movs r3, #0 8001796: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001798: 2300 movs r3, #0 800179a: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800179c: f107 0310 add.w r3, r7, #16 80017a0: 4619 mov r1, r3 80017a2: 4805 ldr r0, [pc, #20] ; (80017b8 ) 80017a4: f000 fb24 bl 8001df0 /* USER CODE BEGIN SPI1_MspInit 1 */ /* USER CODE END SPI1_MspInit 1 */ } } 80017a8: bf00 nop 80017aa: 3720 adds r7, #32 80017ac: 46bd mov sp, r7 80017ae: bd80 pop {r7, pc} 80017b0: 40013000 .word 0x40013000 80017b4: 40021000 .word 0x40021000 80017b8: 40010800 .word 0x40010800 080017bc : * This function configures the hardware resources used in this example * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { 80017bc: b580 push {r7, lr} 80017be: b084 sub sp, #16 80017c0: af00 add r7, sp, #0 80017c2: 6078 str r0, [r7, #4] if(htim_base->Instance==TIM6) 80017c4: 687b ldr r3, [r7, #4] 80017c6: 681b ldr r3, [r3, #0] 80017c8: 4a0d ldr r2, [pc, #52] ; (8001800 ) 80017ca: 4293 cmp r3, r2 80017cc: d113 bne.n 80017f6 { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 80017ce: 4b0d ldr r3, [pc, #52] ; (8001804 ) 80017d0: 69db ldr r3, [r3, #28] 80017d2: 4a0c ldr r2, [pc, #48] ; (8001804 ) 80017d4: f043 0310 orr.w r3, r3, #16 80017d8: 61d3 str r3, [r2, #28] 80017da: 4b0a ldr r3, [pc, #40] ; (8001804 ) 80017dc: 69db ldr r3, [r3, #28] 80017de: f003 0310 and.w r3, r3, #16 80017e2: 60fb str r3, [r7, #12] 80017e4: 68fb ldr r3, [r7, #12] /* TIM6 interrupt Init */ HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 80017e6: 2200 movs r2, #0 80017e8: 2100 movs r1, #0 80017ea: 2036 movs r0, #54 ; 0x36 80017ec: f000 fac9 bl 8001d82 HAL_NVIC_EnableIRQ(TIM6_IRQn); 80017f0: 2036 movs r0, #54 ; 0x36 80017f2: f000 fae2 bl 8001dba /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 80017f6: bf00 nop 80017f8: 3710 adds r7, #16 80017fa: 46bd mov sp, r7 80017fc: bd80 pop {r7, pc} 80017fe: bf00 nop 8001800: 40001000 .word 0x40001000 8001804: 40021000 .word 0x40021000 08001808 : } static uint32_t FSMC_Initialized = 0; static void HAL_FSMC_MspInit(void){ 8001808: b580 push {r7, lr} 800180a: b086 sub sp, #24 800180c: af00 add r7, sp, #0 /* USER CODE BEGIN FSMC_MspInit 0 */ /* USER CODE END FSMC_MspInit 0 */ GPIO_InitTypeDef GPIO_InitStruct ={0}; 800180e: f107 0308 add.w r3, r7, #8 8001812: 2200 movs r2, #0 8001814: 601a str r2, [r3, #0] 8001816: 605a str r2, [r3, #4] 8001818: 609a str r2, [r3, #8] 800181a: 60da str r2, [r3, #12] if (FSMC_Initialized) { 800181c: 4b1f ldr r3, [pc, #124] ; (800189c ) 800181e: 681b ldr r3, [r3, #0] 8001820: 2b00 cmp r3, #0 8001822: d136 bne.n 8001892 return; } FSMC_Initialized = 1; 8001824: 4b1d ldr r3, [pc, #116] ; (800189c ) 8001826: 2201 movs r2, #1 8001828: 601a str r2, [r3, #0] /* Peripheral clock enable */ __HAL_RCC_FSMC_CLK_ENABLE(); 800182a: 4b1d ldr r3, [pc, #116] ; (80018a0 ) 800182c: 695b ldr r3, [r3, #20] 800182e: 4a1c ldr r2, [pc, #112] ; (80018a0 ) 8001830: f443 7380 orr.w r3, r3, #256 ; 0x100 8001834: 6153 str r3, [r2, #20] 8001836: 4b1a ldr r3, [pc, #104] ; (80018a0 ) 8001838: 695b ldr r3, [r3, #20] 800183a: f403 7380 and.w r3, r3, #256 ; 0x100 800183e: 607b str r3, [r7, #4] 8001840: 687b ldr r3, [r7, #4] PD1 ------> FSMC_D3 PD4 ------> FSMC_NOE PD5 ------> FSMC_NWE PG12 ------> FSMC_NE4 */ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_12; 8001842: f241 0301 movw r3, #4097 ; 0x1001 8001846: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001848: 2302 movs r3, #2 800184a: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800184c: 2303 movs r3, #3 800184e: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8001850: f107 0308 add.w r3, r7, #8 8001854: 4619 mov r1, r3 8001856: 4813 ldr r0, [pc, #76] ; (80018a4 ) 8001858: f000 faca bl 8001df0 GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10 800185c: f64f 7380 movw r3, #65408 ; 0xff80 8001860: 60bb str r3, [r7, #8] |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14 |GPIO_PIN_15; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001862: 2302 movs r3, #2 8001864: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001866: 2303 movs r3, #3 8001868: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 800186a: f107 0308 add.w r3, r7, #8 800186e: 4619 mov r1, r3 8001870: 480d ldr r0, [pc, #52] ; (80018a8 ) 8001872: f000 fabd bl 8001df0 GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14 8001876: f24c 7333 movw r3, #50995 ; 0xc733 800187a: 60bb str r3, [r7, #8] |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4 |GPIO_PIN_5; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800187c: 2302 movs r3, #2 800187e: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001880: 2303 movs r3, #3 8001882: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8001884: f107 0308 add.w r3, r7, #8 8001888: 4619 mov r1, r3 800188a: 4808 ldr r0, [pc, #32] ; (80018ac ) 800188c: f000 fab0 bl 8001df0 8001890: e000 b.n 8001894 return; 8001892: bf00 nop /* USER CODE BEGIN FSMC_MspInit 1 */ /* USER CODE END FSMC_MspInit 1 */ } 8001894: 3718 adds r7, #24 8001896: 46bd mov sp, r7 8001898: bd80 pop {r7, pc} 800189a: bf00 nop 800189c: 20000200 .word 0x20000200 80018a0: 40021000 .word 0x40021000 80018a4: 40012000 .word 0x40012000 80018a8: 40011800 .word 0x40011800 80018ac: 40011400 .word 0x40011400 080018b0 : void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){ 80018b0: b580 push {r7, lr} 80018b2: b082 sub sp, #8 80018b4: af00 add r7, sp, #0 80018b6: 6078 str r0, [r7, #4] /* USER CODE BEGIN SRAM_MspInit 0 */ /* USER CODE END SRAM_MspInit 0 */ HAL_FSMC_MspInit(); 80018b8: f7ff ffa6 bl 8001808 /* USER CODE BEGIN SRAM_MspInit 1 */ /* USER CODE END SRAM_MspInit 1 */ } 80018bc: bf00 nop 80018be: 3708 adds r7, #8 80018c0: 46bd mov sp, r7 80018c2: bd80 pop {r7, pc} 080018c4 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 80018c4: b480 push {r7} 80018c6: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 80018c8: e7fe b.n 80018c8 080018ca : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 80018ca: b480 push {r7} 80018cc: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 80018ce: e7fe b.n 80018ce 080018d0 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 80018d0: b480 push {r7} 80018d2: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 80018d4: e7fe b.n 80018d4 080018d6 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 80018d6: b480 push {r7} 80018d8: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 80018da: e7fe b.n 80018da 080018dc : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 80018dc: b480 push {r7} 80018de: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 80018e0: e7fe b.n 80018e0 080018e2 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 80018e2: b480 push {r7} 80018e4: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 80018e6: bf00 nop 80018e8: 46bd mov sp, r7 80018ea: bc80 pop {r7} 80018ec: 4770 bx lr 080018ee : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 80018ee: b480 push {r7} 80018f0: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 80018f2: bf00 nop 80018f4: 46bd mov sp, r7 80018f6: bc80 pop {r7} 80018f8: 4770 bx lr 080018fa : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 80018fa: b480 push {r7} 80018fc: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 80018fe: bf00 nop 8001900: 46bd mov sp, r7 8001902: bc80 pop {r7} 8001904: 4770 bx lr 08001906 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 8001906: b580 push {r7, lr} 8001908: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 800190a: f000 f923 bl 8001b54 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 800190e: bf00 nop 8001910: bd80 pop {r7, pc} ... 08001914 : /** * @brief This function handles TIM6 global interrupt. */ void TIM6_IRQHandler(void) { 8001914: b580 push {r7, lr} 8001916: af00 add r7, sp, #0 /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8001918: 4802 ldr r0, [pc, #8] ; (8001924 ) 800191a: f002 fe69 bl 80045f0 /* USER CODE BEGIN TIM6_IRQn 1 */ /* USER CODE END TIM6_IRQn 1 */ } 800191e: bf00 nop 8001920: bd80 pop {r7, pc} 8001922: bf00 nop 8001924: 200002b0 .word 0x200002b0 08001928 <_getpid>: void initialise_monitor_handles() { } int _getpid(void) { 8001928: b480 push {r7} 800192a: af00 add r7, sp, #0 return 1; 800192c: 2301 movs r3, #1 } 800192e: 4618 mov r0, r3 8001930: 46bd mov sp, r7 8001932: bc80 pop {r7} 8001934: 4770 bx lr 08001936 <_kill>: int _kill(int pid, int sig) { 8001936: b580 push {r7, lr} 8001938: b082 sub sp, #8 800193a: af00 add r7, sp, #0 800193c: 6078 str r0, [r7, #4] 800193e: 6039 str r1, [r7, #0] errno = EINVAL; 8001940: f005 fef0 bl 8007724 <__errno> 8001944: 4603 mov r3, r0 8001946: 2216 movs r2, #22 8001948: 601a str r2, [r3, #0] return -1; 800194a: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff } 800194e: 4618 mov r0, r3 8001950: 3708 adds r7, #8 8001952: 46bd mov sp, r7 8001954: bd80 pop {r7, pc} 08001956 <_exit>: void _exit (int status) { 8001956: b580 push {r7, lr} 8001958: b082 sub sp, #8 800195a: af00 add r7, sp, #0 800195c: 6078 str r0, [r7, #4] _kill(status, -1); 800195e: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff 8001962: 6878 ldr r0, [r7, #4] 8001964: f7ff ffe7 bl 8001936 <_kill> while (1) {} /* Make sure we hang here */ 8001968: e7fe b.n 8001968 <_exit+0x12> 0800196a <_read>: } __attribute__((weak)) int _read(int file, char *ptr, int len) { 800196a: b580 push {r7, lr} 800196c: b086 sub sp, #24 800196e: af00 add r7, sp, #0 8001970: 60f8 str r0, [r7, #12] 8001972: 60b9 str r1, [r7, #8] 8001974: 607a str r2, [r7, #4] int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8001976: 2300 movs r3, #0 8001978: 617b str r3, [r7, #20] 800197a: e00a b.n 8001992 <_read+0x28> { *ptr++ = __io_getchar(); 800197c: f3af 8000 nop.w 8001980: 4601 mov r1, r0 8001982: 68bb ldr r3, [r7, #8] 8001984: 1c5a adds r2, r3, #1 8001986: 60ba str r2, [r7, #8] 8001988: b2ca uxtb r2, r1 800198a: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) 800198c: 697b ldr r3, [r7, #20] 800198e: 3301 adds r3, #1 8001990: 617b str r3, [r7, #20] 8001992: 697a ldr r2, [r7, #20] 8001994: 687b ldr r3, [r7, #4] 8001996: 429a cmp r2, r3 8001998: dbf0 blt.n 800197c <_read+0x12> } return len; 800199a: 687b ldr r3, [r7, #4] } 800199c: 4618 mov r0, r3 800199e: 3718 adds r7, #24 80019a0: 46bd mov sp, r7 80019a2: bd80 pop {r7, pc} 080019a4 <_close>: } return len; } int _close(int file) { 80019a4: b480 push {r7} 80019a6: b083 sub sp, #12 80019a8: af00 add r7, sp, #0 80019aa: 6078 str r0, [r7, #4] return -1; 80019ac: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff } 80019b0: 4618 mov r0, r3 80019b2: 370c adds r7, #12 80019b4: 46bd mov sp, r7 80019b6: bc80 pop {r7} 80019b8: 4770 bx lr 080019ba <_fstat>: int _fstat(int file, struct stat *st) { 80019ba: b480 push {r7} 80019bc: b083 sub sp, #12 80019be: af00 add r7, sp, #0 80019c0: 6078 str r0, [r7, #4] 80019c2: 6039 str r1, [r7, #0] st->st_mode = S_IFCHR; 80019c4: 683b ldr r3, [r7, #0] 80019c6: f44f 5200 mov.w r2, #8192 ; 0x2000 80019ca: 605a str r2, [r3, #4] return 0; 80019cc: 2300 movs r3, #0 } 80019ce: 4618 mov r0, r3 80019d0: 370c adds r7, #12 80019d2: 46bd mov sp, r7 80019d4: bc80 pop {r7} 80019d6: 4770 bx lr 080019d8 <_isatty>: int _isatty(int file) { 80019d8: b480 push {r7} 80019da: b083 sub sp, #12 80019dc: af00 add r7, sp, #0 80019de: 6078 str r0, [r7, #4] return 1; 80019e0: 2301 movs r3, #1 } 80019e2: 4618 mov r0, r3 80019e4: 370c adds r7, #12 80019e6: 46bd mov sp, r7 80019e8: bc80 pop {r7} 80019ea: 4770 bx lr 080019ec <_lseek>: int _lseek(int file, int ptr, int dir) { 80019ec: b480 push {r7} 80019ee: b085 sub sp, #20 80019f0: af00 add r7, sp, #0 80019f2: 60f8 str r0, [r7, #12] 80019f4: 60b9 str r1, [r7, #8] 80019f6: 607a str r2, [r7, #4] return 0; 80019f8: 2300 movs r3, #0 } 80019fa: 4618 mov r0, r3 80019fc: 3714 adds r7, #20 80019fe: 46bd mov sp, r7 8001a00: bc80 pop {r7} 8001a02: 4770 bx lr 08001a04 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 8001a04: b580 push {r7, lr} 8001a06: b086 sub sp, #24 8001a08: af00 add r7, sp, #0 8001a0a: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 8001a0c: 4a14 ldr r2, [pc, #80] ; (8001a60 <_sbrk+0x5c>) 8001a0e: 4b15 ldr r3, [pc, #84] ; (8001a64 <_sbrk+0x60>) 8001a10: 1ad3 subs r3, r2, r3 8001a12: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 8001a14: 697b ldr r3, [r7, #20] 8001a16: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 8001a18: 4b13 ldr r3, [pc, #76] ; (8001a68 <_sbrk+0x64>) 8001a1a: 681b ldr r3, [r3, #0] 8001a1c: 2b00 cmp r3, #0 8001a1e: d102 bne.n 8001a26 <_sbrk+0x22> { __sbrk_heap_end = &_end; 8001a20: 4b11 ldr r3, [pc, #68] ; (8001a68 <_sbrk+0x64>) 8001a22: 4a12 ldr r2, [pc, #72] ; (8001a6c <_sbrk+0x68>) 8001a24: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 8001a26: 4b10 ldr r3, [pc, #64] ; (8001a68 <_sbrk+0x64>) 8001a28: 681a ldr r2, [r3, #0] 8001a2a: 687b ldr r3, [r7, #4] 8001a2c: 4413 add r3, r2 8001a2e: 693a ldr r2, [r7, #16] 8001a30: 429a cmp r2, r3 8001a32: d207 bcs.n 8001a44 <_sbrk+0x40> { errno = ENOMEM; 8001a34: f005 fe76 bl 8007724 <__errno> 8001a38: 4603 mov r3, r0 8001a3a: 220c movs r2, #12 8001a3c: 601a str r2, [r3, #0] return (void *)-1; 8001a3e: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff 8001a42: e009 b.n 8001a58 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 8001a44: 4b08 ldr r3, [pc, #32] ; (8001a68 <_sbrk+0x64>) 8001a46: 681b ldr r3, [r3, #0] 8001a48: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 8001a4a: 4b07 ldr r3, [pc, #28] ; (8001a68 <_sbrk+0x64>) 8001a4c: 681a ldr r2, [r3, #0] 8001a4e: 687b ldr r3, [r7, #4] 8001a50: 4413 add r3, r2 8001a52: 4a05 ldr r2, [pc, #20] ; (8001a68 <_sbrk+0x64>) 8001a54: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 8001a56: 68fb ldr r3, [r7, #12] } 8001a58: 4618 mov r0, r3 8001a5a: 3718 adds r7, #24 8001a5c: 46bd mov sp, r7 8001a5e: bd80 pop {r7, pc} 8001a60: 20010000 .word 0x20010000 8001a64: 00000800 .word 0x00000800 8001a68: 20000204 .word 0x20000204 8001a6c: 20002548 .word 0x20002548 08001a70 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 8001a70: b480 push {r7} 8001a72: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 8001a74: bf00 nop 8001a76: 46bd mov sp, r7 8001a78: bc80 pop {r7} 8001a7a: 4770 bx lr 08001a7c : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 8001a7c: 480c ldr r0, [pc, #48] ; (8001ab0 ) ldr r1, =_edata 8001a7e: 490d ldr r1, [pc, #52] ; (8001ab4 ) ldr r2, =_sidata 8001a80: 4a0d ldr r2, [pc, #52] ; (8001ab8 ) movs r3, #0 8001a82: 2300 movs r3, #0 b LoopCopyDataInit 8001a84: e002 b.n 8001a8c 08001a86 : CopyDataInit: ldr r4, [r2, r3] 8001a86: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 8001a88: 50c4 str r4, [r0, r3] adds r3, r3, #4 8001a8a: 3304 adds r3, #4 08001a8c : LoopCopyDataInit: adds r4, r0, r3 8001a8c: 18c4 adds r4, r0, r3 cmp r4, r1 8001a8e: 428c cmp r4, r1 bcc CopyDataInit 8001a90: d3f9 bcc.n 8001a86 /* Zero fill the bss segment. */ ldr r2, =_sbss 8001a92: 4a0a ldr r2, [pc, #40] ; (8001abc ) ldr r4, =_ebss 8001a94: 4c0a ldr r4, [pc, #40] ; (8001ac0 ) movs r3, #0 8001a96: 2300 movs r3, #0 b LoopFillZerobss 8001a98: e001 b.n 8001a9e 08001a9a : FillZerobss: str r3, [r2] 8001a9a: 6013 str r3, [r2, #0] adds r2, r2, #4 8001a9c: 3204 adds r2, #4 08001a9e : LoopFillZerobss: cmp r2, r4 8001a9e: 42a2 cmp r2, r4 bcc FillZerobss 8001aa0: d3fb bcc.n 8001a9a /* Call the clock system intitialization function.*/ bl SystemInit 8001aa2: f7ff ffe5 bl 8001a70 /* Call static constructors */ bl __libc_init_array 8001aa6: f005 fe43 bl 8007730 <__libc_init_array> /* Call the application's entry point.*/ bl main 8001aaa: f7ff fb71 bl 8001190
bx lr 8001aae: 4770 bx lr ldr r0, =_sdata 8001ab0: 20000000 .word 0x20000000 ldr r1, =_edata 8001ab4: 200001e4 .word 0x200001e4 ldr r2, =_sidata 8001ab8: 0800b674 .word 0x0800b674 ldr r2, =_sbss 8001abc: 200001e4 .word 0x200001e4 ldr r4, =_ebss 8001ac0: 20002548 .word 0x20002548 08001ac4 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8001ac4: e7fe b.n 8001ac4 ... 08001ac8 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8001ac8: b580 push {r7, lr} 8001aca: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8001acc: 4b08 ldr r3, [pc, #32] ; (8001af0 ) 8001ace: 681b ldr r3, [r3, #0] 8001ad0: 4a07 ldr r2, [pc, #28] ; (8001af0 ) 8001ad2: f043 0310 orr.w r3, r3, #16 8001ad6: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8001ad8: 2003 movs r0, #3 8001ada: f000 f947 bl 8001d6c /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 8001ade: 200f movs r0, #15 8001ae0: f000 f808 bl 8001af4 /* Init the low level hardware */ HAL_MspInit(); 8001ae4: f7ff fdae bl 8001644 /* Return function status */ return HAL_OK; 8001ae8: 2300 movs r3, #0 } 8001aea: 4618 mov r0, r3 8001aec: bd80 pop {r7, pc} 8001aee: bf00 nop 8001af0: 40022000 .word 0x40022000 08001af4 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8001af4: b580 push {r7, lr} 8001af6: b082 sub sp, #8 8001af8: af00 add r7, sp, #0 8001afa: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8001afc: 4b12 ldr r3, [pc, #72] ; (8001b48 ) 8001afe: 681a ldr r2, [r3, #0] 8001b00: 4b12 ldr r3, [pc, #72] ; (8001b4c ) 8001b02: 781b ldrb r3, [r3, #0] 8001b04: 4619 mov r1, r3 8001b06: f44f 737a mov.w r3, #1000 ; 0x3e8 8001b0a: fbb3 f3f1 udiv r3, r3, r1 8001b0e: fbb2 f3f3 udiv r3, r2, r3 8001b12: 4618 mov r0, r3 8001b14: f000 f95f bl 8001dd6 8001b18: 4603 mov r3, r0 8001b1a: 2b00 cmp r3, #0 8001b1c: d001 beq.n 8001b22 { return HAL_ERROR; 8001b1e: 2301 movs r3, #1 8001b20: e00e b.n 8001b40 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 8001b22: 687b ldr r3, [r7, #4] 8001b24: 2b0f cmp r3, #15 8001b26: d80a bhi.n 8001b3e { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8001b28: 2200 movs r2, #0 8001b2a: 6879 ldr r1, [r7, #4] 8001b2c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8001b30: f000 f927 bl 8001d82 uwTickPrio = TickPriority; 8001b34: 4a06 ldr r2, [pc, #24] ; (8001b50 ) 8001b36: 687b ldr r3, [r7, #4] 8001b38: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 8001b3a: 2300 movs r3, #0 8001b3c: e000 b.n 8001b40 return HAL_ERROR; 8001b3e: 2301 movs r3, #1 } 8001b40: 4618 mov r0, r3 8001b42: 3708 adds r7, #8 8001b44: 46bd mov sp, r7 8001b46: bd80 pop {r7, pc} 8001b48: 20000000 .word 0x20000000 8001b4c: 20000008 .word 0x20000008 8001b50: 20000004 .word 0x20000004 08001b54 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8001b54: b480 push {r7} 8001b56: af00 add r7, sp, #0 uwTick += uwTickFreq; 8001b58: 4b05 ldr r3, [pc, #20] ; (8001b70 ) 8001b5a: 781b ldrb r3, [r3, #0] 8001b5c: 461a mov r2, r3 8001b5e: 4b05 ldr r3, [pc, #20] ; (8001b74 ) 8001b60: 681b ldr r3, [r3, #0] 8001b62: 4413 add r3, r2 8001b64: 4a03 ldr r2, [pc, #12] ; (8001b74 ) 8001b66: 6013 str r3, [r2, #0] } 8001b68: bf00 nop 8001b6a: 46bd mov sp, r7 8001b6c: bc80 pop {r7} 8001b6e: 4770 bx lr 8001b70: 20000008 .word 0x20000008 8001b74: 20000350 .word 0x20000350 08001b78 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8001b78: b480 push {r7} 8001b7a: af00 add r7, sp, #0 return uwTick; 8001b7c: 4b02 ldr r3, [pc, #8] ; (8001b88 ) 8001b7e: 681b ldr r3, [r3, #0] } 8001b80: 4618 mov r0, r3 8001b82: 46bd mov sp, r7 8001b84: bc80 pop {r7} 8001b86: 4770 bx lr 8001b88: 20000350 .word 0x20000350 08001b8c : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 8001b8c: b580 push {r7, lr} 8001b8e: b084 sub sp, #16 8001b90: af00 add r7, sp, #0 8001b92: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 8001b94: f7ff fff0 bl 8001b78 8001b98: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 8001b9a: 687b ldr r3, [r7, #4] 8001b9c: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 8001b9e: 68fb ldr r3, [r7, #12] 8001ba0: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8001ba4: d005 beq.n 8001bb2 { wait += (uint32_t)(uwTickFreq); 8001ba6: 4b0a ldr r3, [pc, #40] ; (8001bd0 ) 8001ba8: 781b ldrb r3, [r3, #0] 8001baa: 461a mov r2, r3 8001bac: 68fb ldr r3, [r7, #12] 8001bae: 4413 add r3, r2 8001bb0: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 8001bb2: bf00 nop 8001bb4: f7ff ffe0 bl 8001b78 8001bb8: 4602 mov r2, r0 8001bba: 68bb ldr r3, [r7, #8] 8001bbc: 1ad3 subs r3, r2, r3 8001bbe: 68fa ldr r2, [r7, #12] 8001bc0: 429a cmp r2, r3 8001bc2: d8f7 bhi.n 8001bb4 { } } 8001bc4: bf00 nop 8001bc6: bf00 nop 8001bc8: 3710 adds r7, #16 8001bca: 46bd mov sp, r7 8001bcc: bd80 pop {r7, pc} 8001bce: bf00 nop 8001bd0: 20000008 .word 0x20000008 08001bd4 <__NVIC_SetPriorityGrouping>: { 8001bd4: b480 push {r7} 8001bd6: b085 sub sp, #20 8001bd8: af00 add r7, sp, #0 8001bda: 6078 str r0, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8001bdc: 687b ldr r3, [r7, #4] 8001bde: f003 0307 and.w r3, r3, #7 8001be2: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 8001be4: 4b0c ldr r3, [pc, #48] ; (8001c18 <__NVIC_SetPriorityGrouping+0x44>) 8001be6: 68db ldr r3, [r3, #12] 8001be8: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8001bea: 68ba ldr r2, [r7, #8] 8001bec: f64f 03ff movw r3, #63743 ; 0xf8ff 8001bf0: 4013 ands r3, r2 8001bf2: 60bb str r3, [r7, #8] (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 8001bf4: 68fb ldr r3, [r7, #12] 8001bf6: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8001bf8: 68bb ldr r3, [r7, #8] 8001bfa: 4313 orrs r3, r2 reg_value = (reg_value | 8001bfc: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 8001c00: f443 3300 orr.w r3, r3, #131072 ; 0x20000 8001c04: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 8001c06: 4a04 ldr r2, [pc, #16] ; (8001c18 <__NVIC_SetPriorityGrouping+0x44>) 8001c08: 68bb ldr r3, [r7, #8] 8001c0a: 60d3 str r3, [r2, #12] } 8001c0c: bf00 nop 8001c0e: 3714 adds r7, #20 8001c10: 46bd mov sp, r7 8001c12: bc80 pop {r7} 8001c14: 4770 bx lr 8001c16: bf00 nop 8001c18: e000ed00 .word 0xe000ed00 08001c1c <__NVIC_GetPriorityGrouping>: { 8001c1c: b480 push {r7} 8001c1e: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8001c20: 4b04 ldr r3, [pc, #16] ; (8001c34 <__NVIC_GetPriorityGrouping+0x18>) 8001c22: 68db ldr r3, [r3, #12] 8001c24: 0a1b lsrs r3, r3, #8 8001c26: f003 0307 and.w r3, r3, #7 } 8001c2a: 4618 mov r0, r3 8001c2c: 46bd mov sp, r7 8001c2e: bc80 pop {r7} 8001c30: 4770 bx lr 8001c32: bf00 nop 8001c34: e000ed00 .word 0xe000ed00 08001c38 <__NVIC_EnableIRQ>: { 8001c38: b480 push {r7} 8001c3a: b083 sub sp, #12 8001c3c: af00 add r7, sp, #0 8001c3e: 4603 mov r3, r0 8001c40: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001c42: f997 3007 ldrsb.w r3, [r7, #7] 8001c46: 2b00 cmp r3, #0 8001c48: db0b blt.n 8001c62 <__NVIC_EnableIRQ+0x2a> NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8001c4a: 79fb ldrb r3, [r7, #7] 8001c4c: f003 021f and.w r2, r3, #31 8001c50: 4906 ldr r1, [pc, #24] ; (8001c6c <__NVIC_EnableIRQ+0x34>) 8001c52: f997 3007 ldrsb.w r3, [r7, #7] 8001c56: 095b lsrs r3, r3, #5 8001c58: 2001 movs r0, #1 8001c5a: fa00 f202 lsl.w r2, r0, r2 8001c5e: f841 2023 str.w r2, [r1, r3, lsl #2] } 8001c62: bf00 nop 8001c64: 370c adds r7, #12 8001c66: 46bd mov sp, r7 8001c68: bc80 pop {r7} 8001c6a: 4770 bx lr 8001c6c: e000e100 .word 0xe000e100 08001c70 <__NVIC_SetPriority>: { 8001c70: b480 push {r7} 8001c72: b083 sub sp, #12 8001c74: af00 add r7, sp, #0 8001c76: 4603 mov r3, r0 8001c78: 6039 str r1, [r7, #0] 8001c7a: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001c7c: f997 3007 ldrsb.w r3, [r7, #7] 8001c80: 2b00 cmp r3, #0 8001c82: db0a blt.n 8001c9a <__NVIC_SetPriority+0x2a> NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8001c84: 683b ldr r3, [r7, #0] 8001c86: b2da uxtb r2, r3 8001c88: 490c ldr r1, [pc, #48] ; (8001cbc <__NVIC_SetPriority+0x4c>) 8001c8a: f997 3007 ldrsb.w r3, [r7, #7] 8001c8e: 0112 lsls r2, r2, #4 8001c90: b2d2 uxtb r2, r2 8001c92: 440b add r3, r1 8001c94: f883 2300 strb.w r2, [r3, #768] ; 0x300 } 8001c98: e00a b.n 8001cb0 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8001c9a: 683b ldr r3, [r7, #0] 8001c9c: b2da uxtb r2, r3 8001c9e: 4908 ldr r1, [pc, #32] ; (8001cc0 <__NVIC_SetPriority+0x50>) 8001ca0: 79fb ldrb r3, [r7, #7] 8001ca2: f003 030f and.w r3, r3, #15 8001ca6: 3b04 subs r3, #4 8001ca8: 0112 lsls r2, r2, #4 8001caa: b2d2 uxtb r2, r2 8001cac: 440b add r3, r1 8001cae: 761a strb r2, [r3, #24] } 8001cb0: bf00 nop 8001cb2: 370c adds r7, #12 8001cb4: 46bd mov sp, r7 8001cb6: bc80 pop {r7} 8001cb8: 4770 bx lr 8001cba: bf00 nop 8001cbc: e000e100 .word 0xe000e100 8001cc0: e000ed00 .word 0xe000ed00 08001cc4 : { 8001cc4: b480 push {r7} 8001cc6: b089 sub sp, #36 ; 0x24 8001cc8: af00 add r7, sp, #0 8001cca: 60f8 str r0, [r7, #12] 8001ccc: 60b9 str r1, [r7, #8] 8001cce: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8001cd0: 68fb ldr r3, [r7, #12] 8001cd2: f003 0307 and.w r3, r3, #7 8001cd6: 61fb str r3, [r7, #28] PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8001cd8: 69fb ldr r3, [r7, #28] 8001cda: f1c3 0307 rsb r3, r3, #7 8001cde: 2b04 cmp r3, #4 8001ce0: bf28 it cs 8001ce2: 2304 movcs r3, #4 8001ce4: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8001ce6: 69fb ldr r3, [r7, #28] 8001ce8: 3304 adds r3, #4 8001cea: 2b06 cmp r3, #6 8001cec: d902 bls.n 8001cf4 8001cee: 69fb ldr r3, [r7, #28] 8001cf0: 3b03 subs r3, #3 8001cf2: e000 b.n 8001cf6 8001cf4: 2300 movs r3, #0 8001cf6: 617b str r3, [r7, #20] ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8001cf8: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 8001cfc: 69bb ldr r3, [r7, #24] 8001cfe: fa02 f303 lsl.w r3, r2, r3 8001d02: 43da mvns r2, r3 8001d04: 68bb ldr r3, [r7, #8] 8001d06: 401a ands r2, r3 8001d08: 697b ldr r3, [r7, #20] 8001d0a: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8001d0c: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff 8001d10: 697b ldr r3, [r7, #20] 8001d12: fa01 f303 lsl.w r3, r1, r3 8001d16: 43d9 mvns r1, r3 8001d18: 687b ldr r3, [r7, #4] 8001d1a: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8001d1c: 4313 orrs r3, r2 } 8001d1e: 4618 mov r0, r3 8001d20: 3724 adds r7, #36 ; 0x24 8001d22: 46bd mov sp, r7 8001d24: bc80 pop {r7} 8001d26: 4770 bx lr 08001d28 : { 8001d28: b580 push {r7, lr} 8001d2a: b082 sub sp, #8 8001d2c: af00 add r7, sp, #0 8001d2e: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8001d30: 687b ldr r3, [r7, #4] 8001d32: 3b01 subs r3, #1 8001d34: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 8001d38: d301 bcc.n 8001d3e return (1UL); /* Reload value impossible */ 8001d3a: 2301 movs r3, #1 8001d3c: e00f b.n 8001d5e SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8001d3e: 4a0a ldr r2, [pc, #40] ; (8001d68 ) 8001d40: 687b ldr r3, [r7, #4] 8001d42: 3b01 subs r3, #1 8001d44: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8001d46: 210f movs r1, #15 8001d48: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8001d4c: f7ff ff90 bl 8001c70 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8001d50: 4b05 ldr r3, [pc, #20] ; (8001d68 ) 8001d52: 2200 movs r2, #0 8001d54: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8001d56: 4b04 ldr r3, [pc, #16] ; (8001d68 ) 8001d58: 2207 movs r2, #7 8001d5a: 601a str r2, [r3, #0] return (0UL); /* Function successful */ 8001d5c: 2300 movs r3, #0 } 8001d5e: 4618 mov r0, r3 8001d60: 3708 adds r7, #8 8001d62: 46bd mov sp, r7 8001d64: bd80 pop {r7, pc} 8001d66: bf00 nop 8001d68: e000e010 .word 0xe000e010 08001d6c : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8001d6c: b580 push {r7, lr} 8001d6e: b082 sub sp, #8 8001d70: af00 add r7, sp, #0 8001d72: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8001d74: 6878 ldr r0, [r7, #4] 8001d76: f7ff ff2d bl 8001bd4 <__NVIC_SetPriorityGrouping> } 8001d7a: bf00 nop 8001d7c: 3708 adds r7, #8 8001d7e: 46bd mov sp, r7 8001d80: bd80 pop {r7, pc} 08001d82 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8001d82: b580 push {r7, lr} 8001d84: b086 sub sp, #24 8001d86: af00 add r7, sp, #0 8001d88: 4603 mov r3, r0 8001d8a: 60b9 str r1, [r7, #8] 8001d8c: 607a str r2, [r7, #4] 8001d8e: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8001d90: 2300 movs r3, #0 8001d92: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8001d94: f7ff ff42 bl 8001c1c <__NVIC_GetPriorityGrouping> 8001d98: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8001d9a: 687a ldr r2, [r7, #4] 8001d9c: 68b9 ldr r1, [r7, #8] 8001d9e: 6978 ldr r0, [r7, #20] 8001da0: f7ff ff90 bl 8001cc4 8001da4: 4602 mov r2, r0 8001da6: f997 300f ldrsb.w r3, [r7, #15] 8001daa: 4611 mov r1, r2 8001dac: 4618 mov r0, r3 8001dae: f7ff ff5f bl 8001c70 <__NVIC_SetPriority> } 8001db2: bf00 nop 8001db4: 3718 adds r7, #24 8001db6: 46bd mov sp, r7 8001db8: bd80 pop {r7, pc} 08001dba : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 8001dba: b580 push {r7, lr} 8001dbc: b082 sub sp, #8 8001dbe: af00 add r7, sp, #0 8001dc0: 4603 mov r3, r0 8001dc2: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 8001dc4: f997 3007 ldrsb.w r3, [r7, #7] 8001dc8: 4618 mov r0, r3 8001dca: f7ff ff35 bl 8001c38 <__NVIC_EnableIRQ> } 8001dce: bf00 nop 8001dd0: 3708 adds r7, #8 8001dd2: 46bd mov sp, r7 8001dd4: bd80 pop {r7, pc} 08001dd6 : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 8001dd6: b580 push {r7, lr} 8001dd8: b082 sub sp, #8 8001dda: af00 add r7, sp, #0 8001ddc: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 8001dde: 6878 ldr r0, [r7, #4] 8001de0: f7ff ffa2 bl 8001d28 8001de4: 4603 mov r3, r0 } 8001de6: 4618 mov r0, r3 8001de8: 3708 adds r7, #8 8001dea: 46bd mov sp, r7 8001dec: bd80 pop {r7, pc} ... 08001df0 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8001df0: b480 push {r7} 8001df2: b08b sub sp, #44 ; 0x2c 8001df4: af00 add r7, sp, #0 8001df6: 6078 str r0, [r7, #4] 8001df8: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 8001dfa: 2300 movs r3, #0 8001dfc: 627b str r3, [r7, #36] ; 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 8001dfe: 2300 movs r3, #0 8001e00: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 8001e02: e179 b.n 80020f8 { /* Get the IO position */ ioposition = (0x01uL << position); 8001e04: 2201 movs r2, #1 8001e06: 6a7b ldr r3, [r7, #36] ; 0x24 8001e08: fa02 f303 lsl.w r3, r2, r3 8001e0c: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8001e0e: 683b ldr r3, [r7, #0] 8001e10: 681b ldr r3, [r3, #0] 8001e12: 69fa ldr r2, [r7, #28] 8001e14: 4013 ands r3, r2 8001e16: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 8001e18: 69ba ldr r2, [r7, #24] 8001e1a: 69fb ldr r3, [r7, #28] 8001e1c: 429a cmp r2, r3 8001e1e: f040 8168 bne.w 80020f2 { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 8001e22: 683b ldr r3, [r7, #0] 8001e24: 685b ldr r3, [r3, #4] 8001e26: 4aa0 ldr r2, [pc, #640] ; (80020a8 ) 8001e28: 4293 cmp r3, r2 8001e2a: d05e beq.n 8001eea 8001e2c: 4a9e ldr r2, [pc, #632] ; (80020a8 ) 8001e2e: 4293 cmp r3, r2 8001e30: d875 bhi.n 8001f1e 8001e32: 4a9e ldr r2, [pc, #632] ; (80020ac ) 8001e34: 4293 cmp r3, r2 8001e36: d058 beq.n 8001eea 8001e38: 4a9c ldr r2, [pc, #624] ; (80020ac ) 8001e3a: 4293 cmp r3, r2 8001e3c: d86f bhi.n 8001f1e 8001e3e: 4a9c ldr r2, [pc, #624] ; (80020b0 ) 8001e40: 4293 cmp r3, r2 8001e42: d052 beq.n 8001eea 8001e44: 4a9a ldr r2, [pc, #616] ; (80020b0 ) 8001e46: 4293 cmp r3, r2 8001e48: d869 bhi.n 8001f1e 8001e4a: 4a9a ldr r2, [pc, #616] ; (80020b4 ) 8001e4c: 4293 cmp r3, r2 8001e4e: d04c beq.n 8001eea 8001e50: 4a98 ldr r2, [pc, #608] ; (80020b4 ) 8001e52: 4293 cmp r3, r2 8001e54: d863 bhi.n 8001f1e 8001e56: 4a98 ldr r2, [pc, #608] ; (80020b8 ) 8001e58: 4293 cmp r3, r2 8001e5a: d046 beq.n 8001eea 8001e5c: 4a96 ldr r2, [pc, #600] ; (80020b8 ) 8001e5e: 4293 cmp r3, r2 8001e60: d85d bhi.n 8001f1e 8001e62: 2b12 cmp r3, #18 8001e64: d82a bhi.n 8001ebc 8001e66: 2b12 cmp r3, #18 8001e68: d859 bhi.n 8001f1e 8001e6a: a201 add r2, pc, #4 ; (adr r2, 8001e70 ) 8001e6c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8001e70: 08001eeb .word 0x08001eeb 8001e74: 08001ec5 .word 0x08001ec5 8001e78: 08001ed7 .word 0x08001ed7 8001e7c: 08001f19 .word 0x08001f19 8001e80: 08001f1f .word 0x08001f1f 8001e84: 08001f1f .word 0x08001f1f 8001e88: 08001f1f .word 0x08001f1f 8001e8c: 08001f1f .word 0x08001f1f 8001e90: 08001f1f .word 0x08001f1f 8001e94: 08001f1f .word 0x08001f1f 8001e98: 08001f1f .word 0x08001f1f 8001e9c: 08001f1f .word 0x08001f1f 8001ea0: 08001f1f .word 0x08001f1f 8001ea4: 08001f1f .word 0x08001f1f 8001ea8: 08001f1f .word 0x08001f1f 8001eac: 08001f1f .word 0x08001f1f 8001eb0: 08001f1f .word 0x08001f1f 8001eb4: 08001ecd .word 0x08001ecd 8001eb8: 08001ee1 .word 0x08001ee1 8001ebc: 4a7f ldr r2, [pc, #508] ; (80020bc ) 8001ebe: 4293 cmp r3, r2 8001ec0: d013 beq.n 8001eea config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; 8001ec2: e02c b.n 8001f1e config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8001ec4: 683b ldr r3, [r7, #0] 8001ec6: 68db ldr r3, [r3, #12] 8001ec8: 623b str r3, [r7, #32] break; 8001eca: e029 b.n 8001f20 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8001ecc: 683b ldr r3, [r7, #0] 8001ece: 68db ldr r3, [r3, #12] 8001ed0: 3304 adds r3, #4 8001ed2: 623b str r3, [r7, #32] break; 8001ed4: e024 b.n 8001f20 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8001ed6: 683b ldr r3, [r7, #0] 8001ed8: 68db ldr r3, [r3, #12] 8001eda: 3308 adds r3, #8 8001edc: 623b str r3, [r7, #32] break; 8001ede: e01f b.n 8001f20 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8001ee0: 683b ldr r3, [r7, #0] 8001ee2: 68db ldr r3, [r3, #12] 8001ee4: 330c adds r3, #12 8001ee6: 623b str r3, [r7, #32] break; 8001ee8: e01a b.n 8001f20 if (GPIO_Init->Pull == GPIO_NOPULL) 8001eea: 683b ldr r3, [r7, #0] 8001eec: 689b ldr r3, [r3, #8] 8001eee: 2b00 cmp r3, #0 8001ef0: d102 bne.n 8001ef8 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8001ef2: 2304 movs r3, #4 8001ef4: 623b str r3, [r7, #32] break; 8001ef6: e013 b.n 8001f20 else if (GPIO_Init->Pull == GPIO_PULLUP) 8001ef8: 683b ldr r3, [r7, #0] 8001efa: 689b ldr r3, [r3, #8] 8001efc: 2b01 cmp r3, #1 8001efe: d105 bne.n 8001f0c config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8001f00: 2308 movs r3, #8 8001f02: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; 8001f04: 687b ldr r3, [r7, #4] 8001f06: 69fa ldr r2, [r7, #28] 8001f08: 611a str r2, [r3, #16] break; 8001f0a: e009 b.n 8001f20 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8001f0c: 2308 movs r3, #8 8001f0e: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; 8001f10: 687b ldr r3, [r7, #4] 8001f12: 69fa ldr r2, [r7, #28] 8001f14: 615a str r2, [r3, #20] break; 8001f16: e003 b.n 8001f20 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8001f18: 2300 movs r3, #0 8001f1a: 623b str r3, [r7, #32] break; 8001f1c: e000 b.n 8001f20 break; 8001f1e: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8001f20: 69bb ldr r3, [r7, #24] 8001f22: 2bff cmp r3, #255 ; 0xff 8001f24: d801 bhi.n 8001f2a 8001f26: 687b ldr r3, [r7, #4] 8001f28: e001 b.n 8001f2e 8001f2a: 687b ldr r3, [r7, #4] 8001f2c: 3304 adds r3, #4 8001f2e: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); 8001f30: 69bb ldr r3, [r7, #24] 8001f32: 2bff cmp r3, #255 ; 0xff 8001f34: d802 bhi.n 8001f3c 8001f36: 6a7b ldr r3, [r7, #36] ; 0x24 8001f38: 009b lsls r3, r3, #2 8001f3a: e002 b.n 8001f42 8001f3c: 6a7b ldr r3, [r7, #36] ; 0x24 8001f3e: 3b08 subs r3, #8 8001f40: 009b lsls r3, r3, #2 8001f42: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8001f44: 697b ldr r3, [r7, #20] 8001f46: 681a ldr r2, [r3, #0] 8001f48: 210f movs r1, #15 8001f4a: 693b ldr r3, [r7, #16] 8001f4c: fa01 f303 lsl.w r3, r1, r3 8001f50: 43db mvns r3, r3 8001f52: 401a ands r2, r3 8001f54: 6a39 ldr r1, [r7, #32] 8001f56: 693b ldr r3, [r7, #16] 8001f58: fa01 f303 lsl.w r3, r1, r3 8001f5c: 431a orrs r2, r3 8001f5e: 697b ldr r3, [r7, #20] 8001f60: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8001f62: 683b ldr r3, [r7, #0] 8001f64: 685b ldr r3, [r3, #4] 8001f66: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8001f6a: 2b00 cmp r3, #0 8001f6c: f000 80c1 beq.w 80020f2 { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8001f70: 4b53 ldr r3, [pc, #332] ; (80020c0 ) 8001f72: 699b ldr r3, [r3, #24] 8001f74: 4a52 ldr r2, [pc, #328] ; (80020c0 ) 8001f76: f043 0301 orr.w r3, r3, #1 8001f7a: 6193 str r3, [r2, #24] 8001f7c: 4b50 ldr r3, [pc, #320] ; (80020c0 ) 8001f7e: 699b ldr r3, [r3, #24] 8001f80: f003 0301 and.w r3, r3, #1 8001f84: 60bb str r3, [r7, #8] 8001f86: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; 8001f88: 4a4e ldr r2, [pc, #312] ; (80020c4 ) 8001f8a: 6a7b ldr r3, [r7, #36] ; 0x24 8001f8c: 089b lsrs r3, r3, #2 8001f8e: 3302 adds r3, #2 8001f90: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8001f94: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 8001f96: 6a7b ldr r3, [r7, #36] ; 0x24 8001f98: f003 0303 and.w r3, r3, #3 8001f9c: 009b lsls r3, r3, #2 8001f9e: 220f movs r2, #15 8001fa0: fa02 f303 lsl.w r3, r2, r3 8001fa4: 43db mvns r3, r3 8001fa6: 68fa ldr r2, [r7, #12] 8001fa8: 4013 ands r3, r2 8001faa: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 8001fac: 687b ldr r3, [r7, #4] 8001fae: 4a46 ldr r2, [pc, #280] ; (80020c8 ) 8001fb0: 4293 cmp r3, r2 8001fb2: d01f beq.n 8001ff4 8001fb4: 687b ldr r3, [r7, #4] 8001fb6: 4a45 ldr r2, [pc, #276] ; (80020cc ) 8001fb8: 4293 cmp r3, r2 8001fba: d019 beq.n 8001ff0 8001fbc: 687b ldr r3, [r7, #4] 8001fbe: 4a44 ldr r2, [pc, #272] ; (80020d0 ) 8001fc0: 4293 cmp r3, r2 8001fc2: d013 beq.n 8001fec 8001fc4: 687b ldr r3, [r7, #4] 8001fc6: 4a43 ldr r2, [pc, #268] ; (80020d4 ) 8001fc8: 4293 cmp r3, r2 8001fca: d00d beq.n 8001fe8 8001fcc: 687b ldr r3, [r7, #4] 8001fce: 4a42 ldr r2, [pc, #264] ; (80020d8 ) 8001fd0: 4293 cmp r3, r2 8001fd2: d007 beq.n 8001fe4 8001fd4: 687b ldr r3, [r7, #4] 8001fd6: 4a41 ldr r2, [pc, #260] ; (80020dc ) 8001fd8: 4293 cmp r3, r2 8001fda: d101 bne.n 8001fe0 8001fdc: 2305 movs r3, #5 8001fde: e00a b.n 8001ff6 8001fe0: 2306 movs r3, #6 8001fe2: e008 b.n 8001ff6 8001fe4: 2304 movs r3, #4 8001fe6: e006 b.n 8001ff6 8001fe8: 2303 movs r3, #3 8001fea: e004 b.n 8001ff6 8001fec: 2302 movs r3, #2 8001fee: e002 b.n 8001ff6 8001ff0: 2301 movs r3, #1 8001ff2: e000 b.n 8001ff6 8001ff4: 2300 movs r3, #0 8001ff6: 6a7a ldr r2, [r7, #36] ; 0x24 8001ff8: f002 0203 and.w r2, r2, #3 8001ffc: 0092 lsls r2, r2, #2 8001ffe: 4093 lsls r3, r2 8002000: 68fa ldr r2, [r7, #12] 8002002: 4313 orrs r3, r2 8002004: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; 8002006: 492f ldr r1, [pc, #188] ; (80020c4 ) 8002008: 6a7b ldr r3, [r7, #36] ; 0x24 800200a: 089b lsrs r3, r3, #2 800200c: 3302 adds r3, #2 800200e: 68fa ldr r2, [r7, #12] 8002010: f841 2023 str.w r2, [r1, r3, lsl #2] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8002014: 683b ldr r3, [r7, #0] 8002016: 685b ldr r3, [r3, #4] 8002018: f403 3380 and.w r3, r3, #65536 ; 0x10000 800201c: 2b00 cmp r3, #0 800201e: d006 beq.n 800202e { SET_BIT(EXTI->IMR, iocurrent); 8002020: 4b2f ldr r3, [pc, #188] ; (80020e0 ) 8002022: 681a ldr r2, [r3, #0] 8002024: 492e ldr r1, [pc, #184] ; (80020e0 ) 8002026: 69bb ldr r3, [r7, #24] 8002028: 4313 orrs r3, r2 800202a: 600b str r3, [r1, #0] 800202c: e006 b.n 800203c } else { CLEAR_BIT(EXTI->IMR, iocurrent); 800202e: 4b2c ldr r3, [pc, #176] ; (80020e0 ) 8002030: 681a ldr r2, [r3, #0] 8002032: 69bb ldr r3, [r7, #24] 8002034: 43db mvns r3, r3 8002036: 492a ldr r1, [pc, #168] ; (80020e0 ) 8002038: 4013 ands r3, r2 800203a: 600b str r3, [r1, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 800203c: 683b ldr r3, [r7, #0] 800203e: 685b ldr r3, [r3, #4] 8002040: f403 3300 and.w r3, r3, #131072 ; 0x20000 8002044: 2b00 cmp r3, #0 8002046: d006 beq.n 8002056 { SET_BIT(EXTI->EMR, iocurrent); 8002048: 4b25 ldr r3, [pc, #148] ; (80020e0 ) 800204a: 685a ldr r2, [r3, #4] 800204c: 4924 ldr r1, [pc, #144] ; (80020e0 ) 800204e: 69bb ldr r3, [r7, #24] 8002050: 4313 orrs r3, r2 8002052: 604b str r3, [r1, #4] 8002054: e006 b.n 8002064 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8002056: 4b22 ldr r3, [pc, #136] ; (80020e0 ) 8002058: 685a ldr r2, [r3, #4] 800205a: 69bb ldr r3, [r7, #24] 800205c: 43db mvns r3, r3 800205e: 4920 ldr r1, [pc, #128] ; (80020e0 ) 8002060: 4013 ands r3, r2 8002062: 604b str r3, [r1, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8002064: 683b ldr r3, [r7, #0] 8002066: 685b ldr r3, [r3, #4] 8002068: f403 1380 and.w r3, r3, #1048576 ; 0x100000 800206c: 2b00 cmp r3, #0 800206e: d006 beq.n 800207e { SET_BIT(EXTI->RTSR, iocurrent); 8002070: 4b1b ldr r3, [pc, #108] ; (80020e0 ) 8002072: 689a ldr r2, [r3, #8] 8002074: 491a ldr r1, [pc, #104] ; (80020e0 ) 8002076: 69bb ldr r3, [r7, #24] 8002078: 4313 orrs r3, r2 800207a: 608b str r3, [r1, #8] 800207c: e006 b.n 800208c } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 800207e: 4b18 ldr r3, [pc, #96] ; (80020e0 ) 8002080: 689a ldr r2, [r3, #8] 8002082: 69bb ldr r3, [r7, #24] 8002084: 43db mvns r3, r3 8002086: 4916 ldr r1, [pc, #88] ; (80020e0 ) 8002088: 4013 ands r3, r2 800208a: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 800208c: 683b ldr r3, [r7, #0] 800208e: 685b ldr r3, [r3, #4] 8002090: f403 1300 and.w r3, r3, #2097152 ; 0x200000 8002094: 2b00 cmp r3, #0 8002096: d025 beq.n 80020e4 { SET_BIT(EXTI->FTSR, iocurrent); 8002098: 4b11 ldr r3, [pc, #68] ; (80020e0 ) 800209a: 68da ldr r2, [r3, #12] 800209c: 4910 ldr r1, [pc, #64] ; (80020e0 ) 800209e: 69bb ldr r3, [r7, #24] 80020a0: 4313 orrs r3, r2 80020a2: 60cb str r3, [r1, #12] 80020a4: e025 b.n 80020f2 80020a6: bf00 nop 80020a8: 10320000 .word 0x10320000 80020ac: 10310000 .word 0x10310000 80020b0: 10220000 .word 0x10220000 80020b4: 10210000 .word 0x10210000 80020b8: 10120000 .word 0x10120000 80020bc: 10110000 .word 0x10110000 80020c0: 40021000 .word 0x40021000 80020c4: 40010000 .word 0x40010000 80020c8: 40010800 .word 0x40010800 80020cc: 40010c00 .word 0x40010c00 80020d0: 40011000 .word 0x40011000 80020d4: 40011400 .word 0x40011400 80020d8: 40011800 .word 0x40011800 80020dc: 40011c00 .word 0x40011c00 80020e0: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 80020e4: 4b0b ldr r3, [pc, #44] ; (8002114 ) 80020e6: 68da ldr r2, [r3, #12] 80020e8: 69bb ldr r3, [r7, #24] 80020ea: 43db mvns r3, r3 80020ec: 4909 ldr r1, [pc, #36] ; (8002114 ) 80020ee: 4013 ands r3, r2 80020f0: 60cb str r3, [r1, #12] } } } position++; 80020f2: 6a7b ldr r3, [r7, #36] ; 0x24 80020f4: 3301 adds r3, #1 80020f6: 627b str r3, [r7, #36] ; 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) 80020f8: 683b ldr r3, [r7, #0] 80020fa: 681a ldr r2, [r3, #0] 80020fc: 6a7b ldr r3, [r7, #36] ; 0x24 80020fe: fa22 f303 lsr.w r3, r2, r3 8002102: 2b00 cmp r3, #0 8002104: f47f ae7e bne.w 8001e04 } } 8002108: bf00 nop 800210a: bf00 nop 800210c: 372c adds r7, #44 ; 0x2c 800210e: 46bd mov sp, r7 8002110: bc80 pop {r7} 8002112: 4770 bx lr 8002114: 40010400 .word 0x40010400 08002118 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 8002118: b480 push {r7} 800211a: b085 sub sp, #20 800211c: af00 add r7, sp, #0 800211e: 6078 str r0, [r7, #4] 8002120: 460b mov r3, r1 8002122: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 8002124: 687b ldr r3, [r7, #4] 8002126: 689a ldr r2, [r3, #8] 8002128: 887b ldrh r3, [r7, #2] 800212a: 4013 ands r3, r2 800212c: 2b00 cmp r3, #0 800212e: d002 beq.n 8002136 { bitstatus = GPIO_PIN_SET; 8002130: 2301 movs r3, #1 8002132: 73fb strb r3, [r7, #15] 8002134: e001 b.n 800213a } else { bitstatus = GPIO_PIN_RESET; 8002136: 2300 movs r3, #0 8002138: 73fb strb r3, [r7, #15] } return bitstatus; 800213a: 7bfb ldrb r3, [r7, #15] } 800213c: 4618 mov r0, r3 800213e: 3714 adds r7, #20 8002140: 46bd mov sp, r7 8002142: bc80 pop {r7} 8002144: 4770 bx lr 08002146 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 8002146: b480 push {r7} 8002148: b083 sub sp, #12 800214a: af00 add r7, sp, #0 800214c: 6078 str r0, [r7, #4] 800214e: 460b mov r3, r1 8002150: 807b strh r3, [r7, #2] 8002152: 4613 mov r3, r2 8002154: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8002156: 787b ldrb r3, [r7, #1] 8002158: 2b00 cmp r3, #0 800215a: d003 beq.n 8002164 { GPIOx->BSRR = GPIO_Pin; 800215c: 887a ldrh r2, [r7, #2] 800215e: 687b ldr r3, [r7, #4] 8002160: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } 8002162: e003 b.n 800216c GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 8002164: 887b ldrh r3, [r7, #2] 8002166: 041a lsls r2, r3, #16 8002168: 687b ldr r3, [r7, #4] 800216a: 611a str r2, [r3, #16] } 800216c: bf00 nop 800216e: 370c adds r7, #12 8002170: 46bd mov sp, r7 8002172: bc80 pop {r7} 8002174: 4770 bx lr ... 08002178 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 8002178: b580 push {r7, lr} 800217a: b084 sub sp, #16 800217c: af00 add r7, sp, #0 800217e: 6078 str r0, [r7, #4] uint32_t freqrange; uint32_t pclk1; /* Check the I2C handle allocation */ if (hi2c == NULL) 8002180: 687b ldr r3, [r7, #4] 8002182: 2b00 cmp r3, #0 8002184: d101 bne.n 800218a { return HAL_ERROR; 8002186: 2301 movs r3, #1 8002188: e12b b.n 80023e2 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) 800218a: 687b ldr r3, [r7, #4] 800218c: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 8002190: b2db uxtb r3, r3 8002192: 2b00 cmp r3, #0 8002194: d106 bne.n 80021a4 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 8002196: 687b ldr r3, [r7, #4] 8002198: 2200 movs r2, #0 800219a: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); 800219e: 6878 ldr r0, [r7, #4] 80021a0: f7ff fa82 bl 80016a8 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; 80021a4: 687b ldr r3, [r7, #4] 80021a6: 2224 movs r2, #36 ; 0x24 80021a8: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 80021ac: 687b ldr r3, [r7, #4] 80021ae: 681b ldr r3, [r3, #0] 80021b0: 681a ldr r2, [r3, #0] 80021b2: 687b ldr r3, [r7, #4] 80021b4: 681b ldr r3, [r3, #0] 80021b6: f022 0201 bic.w r2, r2, #1 80021ba: 601a str r2, [r3, #0] /*Reset I2C*/ hi2c->Instance->CR1 |= I2C_CR1_SWRST; 80021bc: 687b ldr r3, [r7, #4] 80021be: 681b ldr r3, [r3, #0] 80021c0: 681a ldr r2, [r3, #0] 80021c2: 687b ldr r3, [r7, #4] 80021c4: 681b ldr r3, [r3, #0] 80021c6: f442 4200 orr.w r2, r2, #32768 ; 0x8000 80021ca: 601a str r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_SWRST; 80021cc: 687b ldr r3, [r7, #4] 80021ce: 681b ldr r3, [r3, #0] 80021d0: 681a ldr r2, [r3, #0] 80021d2: 687b ldr r3, [r7, #4] 80021d4: 681b ldr r3, [r3, #0] 80021d6: f422 4200 bic.w r2, r2, #32768 ; 0x8000 80021da: 601a str r2, [r3, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); 80021dc: f001 fba0 bl 8003920 80021e0: 60f8 str r0, [r7, #12] /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 80021e2: 687b ldr r3, [r7, #4] 80021e4: 685b ldr r3, [r3, #4] 80021e6: 4a81 ldr r2, [pc, #516] ; (80023ec ) 80021e8: 4293 cmp r3, r2 80021ea: d807 bhi.n 80021fc 80021ec: 68fb ldr r3, [r7, #12] 80021ee: 4a80 ldr r2, [pc, #512] ; (80023f0 ) 80021f0: 4293 cmp r3, r2 80021f2: bf94 ite ls 80021f4: 2301 movls r3, #1 80021f6: 2300 movhi r3, #0 80021f8: b2db uxtb r3, r3 80021fa: e006 b.n 800220a 80021fc: 68fb ldr r3, [r7, #12] 80021fe: 4a7d ldr r2, [pc, #500] ; (80023f4 ) 8002200: 4293 cmp r3, r2 8002202: bf94 ite ls 8002204: 2301 movls r3, #1 8002206: 2300 movhi r3, #0 8002208: b2db uxtb r3, r3 800220a: 2b00 cmp r3, #0 800220c: d001 beq.n 8002212 { return HAL_ERROR; 800220e: 2301 movs r3, #1 8002210: e0e7 b.n 80023e2 } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); 8002212: 68fb ldr r3, [r7, #12] 8002214: 4a78 ldr r2, [pc, #480] ; (80023f8 ) 8002216: fba2 2303 umull r2, r3, r2, r3 800221a: 0c9b lsrs r3, r3, #18 800221c: 60bb str r3, [r7, #8] /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange); 800221e: 687b ldr r3, [r7, #4] 8002220: 681b ldr r3, [r3, #0] 8002222: 685b ldr r3, [r3, #4] 8002224: f023 013f bic.w r1, r3, #63 ; 0x3f 8002228: 687b ldr r3, [r7, #4] 800222a: 681b ldr r3, [r3, #0] 800222c: 68ba ldr r2, [r7, #8] 800222e: 430a orrs r2, r1 8002230: 605a str r2, [r3, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed)); 8002232: 687b ldr r3, [r7, #4] 8002234: 681b ldr r3, [r3, #0] 8002236: 6a1b ldr r3, [r3, #32] 8002238: f023 013f bic.w r1, r3, #63 ; 0x3f 800223c: 687b ldr r3, [r7, #4] 800223e: 685b ldr r3, [r3, #4] 8002240: 4a6a ldr r2, [pc, #424] ; (80023ec ) 8002242: 4293 cmp r3, r2 8002244: d802 bhi.n 800224c 8002246: 68bb ldr r3, [r7, #8] 8002248: 3301 adds r3, #1 800224a: e009 b.n 8002260 800224c: 68bb ldr r3, [r7, #8] 800224e: f44f 7296 mov.w r2, #300 ; 0x12c 8002252: fb02 f303 mul.w r3, r2, r3 8002256: 4a69 ldr r2, [pc, #420] ; (80023fc ) 8002258: fba2 2303 umull r2, r3, r2, r3 800225c: 099b lsrs r3, r3, #6 800225e: 3301 adds r3, #1 8002260: 687a ldr r2, [r7, #4] 8002262: 6812 ldr r2, [r2, #0] 8002264: 430b orrs r3, r1 8002266: 6213 str r3, [r2, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle)); 8002268: 687b ldr r3, [r7, #4] 800226a: 681b ldr r3, [r3, #0] 800226c: 69db ldr r3, [r3, #28] 800226e: f423 424f bic.w r2, r3, #52992 ; 0xcf00 8002272: f022 02ff bic.w r2, r2, #255 ; 0xff 8002276: 687b ldr r3, [r7, #4] 8002278: 685b ldr r3, [r3, #4] 800227a: 495c ldr r1, [pc, #368] ; (80023ec ) 800227c: 428b cmp r3, r1 800227e: d819 bhi.n 80022b4 8002280: 68fb ldr r3, [r7, #12] 8002282: 1e59 subs r1, r3, #1 8002284: 687b ldr r3, [r7, #4] 8002286: 685b ldr r3, [r3, #4] 8002288: 005b lsls r3, r3, #1 800228a: fbb1 f3f3 udiv r3, r1, r3 800228e: 1c59 adds r1, r3, #1 8002290: f640 73fc movw r3, #4092 ; 0xffc 8002294: 400b ands r3, r1 8002296: 2b00 cmp r3, #0 8002298: d00a beq.n 80022b0 800229a: 68fb ldr r3, [r7, #12] 800229c: 1e59 subs r1, r3, #1 800229e: 687b ldr r3, [r7, #4] 80022a0: 685b ldr r3, [r3, #4] 80022a2: 005b lsls r3, r3, #1 80022a4: fbb1 f3f3 udiv r3, r1, r3 80022a8: 3301 adds r3, #1 80022aa: f3c3 030b ubfx r3, r3, #0, #12 80022ae: e051 b.n 8002354 80022b0: 2304 movs r3, #4 80022b2: e04f b.n 8002354 80022b4: 687b ldr r3, [r7, #4] 80022b6: 689b ldr r3, [r3, #8] 80022b8: 2b00 cmp r3, #0 80022ba: d111 bne.n 80022e0 80022bc: 68fb ldr r3, [r7, #12] 80022be: 1e58 subs r0, r3, #1 80022c0: 687b ldr r3, [r7, #4] 80022c2: 6859 ldr r1, [r3, #4] 80022c4: 460b mov r3, r1 80022c6: 005b lsls r3, r3, #1 80022c8: 440b add r3, r1 80022ca: fbb0 f3f3 udiv r3, r0, r3 80022ce: 3301 adds r3, #1 80022d0: f3c3 030b ubfx r3, r3, #0, #12 80022d4: 2b00 cmp r3, #0 80022d6: bf0c ite eq 80022d8: 2301 moveq r3, #1 80022da: 2300 movne r3, #0 80022dc: b2db uxtb r3, r3 80022de: e012 b.n 8002306 80022e0: 68fb ldr r3, [r7, #12] 80022e2: 1e58 subs r0, r3, #1 80022e4: 687b ldr r3, [r7, #4] 80022e6: 6859 ldr r1, [r3, #4] 80022e8: 460b mov r3, r1 80022ea: 009b lsls r3, r3, #2 80022ec: 440b add r3, r1 80022ee: 0099 lsls r1, r3, #2 80022f0: 440b add r3, r1 80022f2: fbb0 f3f3 udiv r3, r0, r3 80022f6: 3301 adds r3, #1 80022f8: f3c3 030b ubfx r3, r3, #0, #12 80022fc: 2b00 cmp r3, #0 80022fe: bf0c ite eq 8002300: 2301 moveq r3, #1 8002302: 2300 movne r3, #0 8002304: b2db uxtb r3, r3 8002306: 2b00 cmp r3, #0 8002308: d001 beq.n 800230e 800230a: 2301 movs r3, #1 800230c: e022 b.n 8002354 800230e: 687b ldr r3, [r7, #4] 8002310: 689b ldr r3, [r3, #8] 8002312: 2b00 cmp r3, #0 8002314: d10e bne.n 8002334 8002316: 68fb ldr r3, [r7, #12] 8002318: 1e58 subs r0, r3, #1 800231a: 687b ldr r3, [r7, #4] 800231c: 6859 ldr r1, [r3, #4] 800231e: 460b mov r3, r1 8002320: 005b lsls r3, r3, #1 8002322: 440b add r3, r1 8002324: fbb0 f3f3 udiv r3, r0, r3 8002328: 3301 adds r3, #1 800232a: f3c3 030b ubfx r3, r3, #0, #12 800232e: f443 4300 orr.w r3, r3, #32768 ; 0x8000 8002332: e00f b.n 8002354 8002334: 68fb ldr r3, [r7, #12] 8002336: 1e58 subs r0, r3, #1 8002338: 687b ldr r3, [r7, #4] 800233a: 6859 ldr r1, [r3, #4] 800233c: 460b mov r3, r1 800233e: 009b lsls r3, r3, #2 8002340: 440b add r3, r1 8002342: 0099 lsls r1, r3, #2 8002344: 440b add r3, r1 8002346: fbb0 f3f3 udiv r3, r0, r3 800234a: 3301 adds r3, #1 800234c: f3c3 030b ubfx r3, r3, #0, #12 8002350: f443 4340 orr.w r3, r3, #49152 ; 0xc000 8002354: 6879 ldr r1, [r7, #4] 8002356: 6809 ldr r1, [r1, #0] 8002358: 4313 orrs r3, r2 800235a: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode)); 800235c: 687b ldr r3, [r7, #4] 800235e: 681b ldr r3, [r3, #0] 8002360: 681b ldr r3, [r3, #0] 8002362: f023 01c0 bic.w r1, r3, #192 ; 0xc0 8002366: 687b ldr r3, [r7, #4] 8002368: 69da ldr r2, [r3, #28] 800236a: 687b ldr r3, [r7, #4] 800236c: 6a1b ldr r3, [r3, #32] 800236e: 431a orrs r2, r3 8002370: 687b ldr r3, [r7, #4] 8002372: 681b ldr r3, [r3, #0] 8002374: 430a orrs r2, r1 8002376: 601a str r2, [r3, #0] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Configure I2Cx: Own Address1 and addressing mode */ MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1)); 8002378: 687b ldr r3, [r7, #4] 800237a: 681b ldr r3, [r3, #0] 800237c: 689b ldr r3, [r3, #8] 800237e: f423 4303 bic.w r3, r3, #33536 ; 0x8300 8002382: f023 03ff bic.w r3, r3, #255 ; 0xff 8002386: 687a ldr r2, [r7, #4] 8002388: 6911 ldr r1, [r2, #16] 800238a: 687a ldr r2, [r7, #4] 800238c: 68d2 ldr r2, [r2, #12] 800238e: 4311 orrs r1, r2 8002390: 687a ldr r2, [r7, #4] 8002392: 6812 ldr r2, [r2, #0] 8002394: 430b orrs r3, r1 8002396: 6093 str r3, [r2, #8] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Configure I2Cx: Dual mode and Own Address2 */ MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2)); 8002398: 687b ldr r3, [r7, #4] 800239a: 681b ldr r3, [r3, #0] 800239c: 68db ldr r3, [r3, #12] 800239e: f023 01ff bic.w r1, r3, #255 ; 0xff 80023a2: 687b ldr r3, [r7, #4] 80023a4: 695a ldr r2, [r3, #20] 80023a6: 687b ldr r3, [r7, #4] 80023a8: 699b ldr r3, [r3, #24] 80023aa: 431a orrs r2, r3 80023ac: 687b ldr r3, [r7, #4] 80023ae: 681b ldr r3, [r3, #0] 80023b0: 430a orrs r2, r1 80023b2: 60da str r2, [r3, #12] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 80023b4: 687b ldr r3, [r7, #4] 80023b6: 681b ldr r3, [r3, #0] 80023b8: 681a ldr r2, [r3, #0] 80023ba: 687b ldr r3, [r7, #4] 80023bc: 681b ldr r3, [r3, #0] 80023be: f042 0201 orr.w r2, r2, #1 80023c2: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 80023c4: 687b ldr r3, [r7, #4] 80023c6: 2200 movs r2, #0 80023c8: 641a str r2, [r3, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_READY; 80023ca: 687b ldr r3, [r7, #4] 80023cc: 2220 movs r2, #32 80023ce: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 80023d2: 687b ldr r3, [r7, #4] 80023d4: 2200 movs r2, #0 80023d6: 631a str r2, [r3, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 80023d8: 687b ldr r3, [r7, #4] 80023da: 2200 movs r2, #0 80023dc: f883 203e strb.w r2, [r3, #62] ; 0x3e return HAL_OK; 80023e0: 2300 movs r3, #0 } 80023e2: 4618 mov r0, r3 80023e4: 3710 adds r7, #16 80023e6: 46bd mov sp, r7 80023e8: bd80 pop {r7, pc} 80023ea: bf00 nop 80023ec: 000186a0 .word 0x000186a0 80023f0: 001e847f .word 0x001e847f 80023f4: 003d08ff .word 0x003d08ff 80023f8: 431bde83 .word 0x431bde83 80023fc: 10624dd3 .word 0x10624dd3 08002400 : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8002400: b580 push {r7, lr} 8002402: b088 sub sp, #32 8002404: af02 add r7, sp, #8 8002406: 60f8 str r0, [r7, #12] 8002408: 4608 mov r0, r1 800240a: 4611 mov r1, r2 800240c: 461a mov r2, r3 800240e: 4603 mov r3, r0 8002410: 817b strh r3, [r7, #10] 8002412: 460b mov r3, r1 8002414: 813b strh r3, [r7, #8] 8002416: 4613 mov r3, r2 8002418: 80fb strh r3, [r7, #6] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); 800241a: f7ff fbad bl 8001b78 800241e: 6178 str r0, [r7, #20] /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 8002420: 68fb ldr r3, [r7, #12] 8002422: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 8002426: b2db uxtb r3, r3 8002428: 2b20 cmp r3, #32 800242a: f040 80d9 bne.w 80025e0 { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 800242e: 697b ldr r3, [r7, #20] 8002430: 9300 str r3, [sp, #0] 8002432: 2319 movs r3, #25 8002434: 2201 movs r2, #1 8002436: 496d ldr r1, [pc, #436] ; (80025ec ) 8002438: 68f8 ldr r0, [r7, #12] 800243a: f000 fcc1 bl 8002dc0 800243e: 4603 mov r3, r0 8002440: 2b00 cmp r3, #0 8002442: d001 beq.n 8002448 { return HAL_BUSY; 8002444: 2302 movs r3, #2 8002446: e0cc b.n 80025e2 } /* Process Locked */ __HAL_LOCK(hi2c); 8002448: 68fb ldr r3, [r7, #12] 800244a: f893 303c ldrb.w r3, [r3, #60] ; 0x3c 800244e: 2b01 cmp r3, #1 8002450: d101 bne.n 8002456 8002452: 2302 movs r3, #2 8002454: e0c5 b.n 80025e2 8002456: 68fb ldr r3, [r7, #12] 8002458: 2201 movs r2, #1 800245a: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 800245e: 68fb ldr r3, [r7, #12] 8002460: 681b ldr r3, [r3, #0] 8002462: 681b ldr r3, [r3, #0] 8002464: f003 0301 and.w r3, r3, #1 8002468: 2b01 cmp r3, #1 800246a: d007 beq.n 800247c { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 800246c: 68fb ldr r3, [r7, #12] 800246e: 681b ldr r3, [r3, #0] 8002470: 681a ldr r2, [r3, #0] 8002472: 68fb ldr r3, [r7, #12] 8002474: 681b ldr r3, [r3, #0] 8002476: f042 0201 orr.w r2, r2, #1 800247a: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); 800247c: 68fb ldr r3, [r7, #12] 800247e: 681b ldr r3, [r3, #0] 8002480: 681a ldr r2, [r3, #0] 8002482: 68fb ldr r3, [r7, #12] 8002484: 681b ldr r3, [r3, #0] 8002486: f422 6200 bic.w r2, r2, #2048 ; 0x800 800248a: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_TX; 800248c: 68fb ldr r3, [r7, #12] 800248e: 2221 movs r2, #33 ; 0x21 8002490: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 8002494: 68fb ldr r3, [r7, #12] 8002496: 2240 movs r2, #64 ; 0x40 8002498: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 800249c: 68fb ldr r3, [r7, #12] 800249e: 2200 movs r2, #0 80024a0: 641a str r2, [r3, #64] ; 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; 80024a2: 68fb ldr r3, [r7, #12] 80024a4: 6a3a ldr r2, [r7, #32] 80024a6: 625a str r2, [r3, #36] ; 0x24 hi2c->XferCount = Size; 80024a8: 68fb ldr r3, [r7, #12] 80024aa: 8cba ldrh r2, [r7, #36] ; 0x24 80024ac: 855a strh r2, [r3, #42] ; 0x2a hi2c->XferSize = hi2c->XferCount; 80024ae: 68fb ldr r3, [r7, #12] 80024b0: 8d5b ldrh r3, [r3, #42] ; 0x2a 80024b2: b29a uxth r2, r3 80024b4: 68fb ldr r3, [r7, #12] 80024b6: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 80024b8: 68fb ldr r3, [r7, #12] 80024ba: 4a4d ldr r2, [pc, #308] ; (80025f0 ) 80024bc: 62da str r2, [r3, #44] ; 0x2c /* Send Slave Address and Memory Address */ if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 80024be: 88f8 ldrh r0, [r7, #6] 80024c0: 893a ldrh r2, [r7, #8] 80024c2: 8979 ldrh r1, [r7, #10] 80024c4: 697b ldr r3, [r7, #20] 80024c6: 9301 str r3, [sp, #4] 80024c8: 6abb ldr r3, [r7, #40] ; 0x28 80024ca: 9300 str r3, [sp, #0] 80024cc: 4603 mov r3, r0 80024ce: 68f8 ldr r0, [r7, #12] 80024d0: f000 faf8 bl 8002ac4 80024d4: 4603 mov r3, r0 80024d6: 2b00 cmp r3, #0 80024d8: d052 beq.n 8002580 { return HAL_ERROR; 80024da: 2301 movs r3, #1 80024dc: e081 b.n 80025e2 } while (hi2c->XferSize > 0U) { /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 80024de: 697a ldr r2, [r7, #20] 80024e0: 6ab9 ldr r1, [r7, #40] ; 0x28 80024e2: 68f8 ldr r0, [r7, #12] 80024e4: f000 fd42 bl 8002f6c 80024e8: 4603 mov r3, r0 80024ea: 2b00 cmp r3, #0 80024ec: d00d beq.n 800250a { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 80024ee: 68fb ldr r3, [r7, #12] 80024f0: 6c1b ldr r3, [r3, #64] ; 0x40 80024f2: 2b04 cmp r3, #4 80024f4: d107 bne.n 8002506 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 80024f6: 68fb ldr r3, [r7, #12] 80024f8: 681b ldr r3, [r3, #0] 80024fa: 681a ldr r2, [r3, #0] 80024fc: 68fb ldr r3, [r7, #12] 80024fe: 681b ldr r3, [r3, #0] 8002500: f442 7200 orr.w r2, r2, #512 ; 0x200 8002504: 601a str r2, [r3, #0] } return HAL_ERROR; 8002506: 2301 movs r3, #1 8002508: e06b b.n 80025e2 } /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; 800250a: 68fb ldr r3, [r7, #12] 800250c: 6a5b ldr r3, [r3, #36] ; 0x24 800250e: 781a ldrb r2, [r3, #0] 8002510: 68fb ldr r3, [r7, #12] 8002512: 681b ldr r3, [r3, #0] 8002514: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002516: 68fb ldr r3, [r7, #12] 8002518: 6a5b ldr r3, [r3, #36] ; 0x24 800251a: 1c5a adds r2, r3, #1 800251c: 68fb ldr r3, [r7, #12] 800251e: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002520: 68fb ldr r3, [r7, #12] 8002522: 8d1b ldrh r3, [r3, #40] ; 0x28 8002524: 3b01 subs r3, #1 8002526: b29a uxth r2, r3 8002528: 68fb ldr r3, [r7, #12] 800252a: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 800252c: 68fb ldr r3, [r7, #12] 800252e: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002530: b29b uxth r3, r3 8002532: 3b01 subs r3, #1 8002534: b29a uxth r2, r3 8002536: 68fb ldr r3, [r7, #12] 8002538: 855a strh r2, [r3, #42] ; 0x2a if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 800253a: 68fb ldr r3, [r7, #12] 800253c: 681b ldr r3, [r3, #0] 800253e: 695b ldr r3, [r3, #20] 8002540: f003 0304 and.w r3, r3, #4 8002544: 2b04 cmp r3, #4 8002546: d11b bne.n 8002580 8002548: 68fb ldr r3, [r7, #12] 800254a: 8d1b ldrh r3, [r3, #40] ; 0x28 800254c: 2b00 cmp r3, #0 800254e: d017 beq.n 8002580 { /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; 8002550: 68fb ldr r3, [r7, #12] 8002552: 6a5b ldr r3, [r3, #36] ; 0x24 8002554: 781a ldrb r2, [r3, #0] 8002556: 68fb ldr r3, [r7, #12] 8002558: 681b ldr r3, [r3, #0] 800255a: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 800255c: 68fb ldr r3, [r7, #12] 800255e: 6a5b ldr r3, [r3, #36] ; 0x24 8002560: 1c5a adds r2, r3, #1 8002562: 68fb ldr r3, [r7, #12] 8002564: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002566: 68fb ldr r3, [r7, #12] 8002568: 8d1b ldrh r3, [r3, #40] ; 0x28 800256a: 3b01 subs r3, #1 800256c: b29a uxth r2, r3 800256e: 68fb ldr r3, [r7, #12] 8002570: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002572: 68fb ldr r3, [r7, #12] 8002574: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002576: b29b uxth r3, r3 8002578: 3b01 subs r3, #1 800257a: b29a uxth r2, r3 800257c: 68fb ldr r3, [r7, #12] 800257e: 855a strh r2, [r3, #42] ; 0x2a while (hi2c->XferSize > 0U) 8002580: 68fb ldr r3, [r7, #12] 8002582: 8d1b ldrh r3, [r3, #40] ; 0x28 8002584: 2b00 cmp r3, #0 8002586: d1aa bne.n 80024de } } /* Wait until BTF flag is set */ if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8002588: 697a ldr r2, [r7, #20] 800258a: 6ab9 ldr r1, [r7, #40] ; 0x28 800258c: 68f8 ldr r0, [r7, #12] 800258e: f000 fd2e bl 8002fee 8002592: 4603 mov r3, r0 8002594: 2b00 cmp r3, #0 8002596: d00d beq.n 80025b4 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002598: 68fb ldr r3, [r7, #12] 800259a: 6c1b ldr r3, [r3, #64] ; 0x40 800259c: 2b04 cmp r3, #4 800259e: d107 bne.n 80025b0 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 80025a0: 68fb ldr r3, [r7, #12] 80025a2: 681b ldr r3, [r3, #0] 80025a4: 681a ldr r2, [r3, #0] 80025a6: 68fb ldr r3, [r7, #12] 80025a8: 681b ldr r3, [r3, #0] 80025aa: f442 7200 orr.w r2, r2, #512 ; 0x200 80025ae: 601a str r2, [r3, #0] } return HAL_ERROR; 80025b0: 2301 movs r3, #1 80025b2: e016 b.n 80025e2 } /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 80025b4: 68fb ldr r3, [r7, #12] 80025b6: 681b ldr r3, [r3, #0] 80025b8: 681a ldr r2, [r3, #0] 80025ba: 68fb ldr r3, [r7, #12] 80025bc: 681b ldr r3, [r3, #0] 80025be: f442 7200 orr.w r2, r2, #512 ; 0x200 80025c2: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 80025c4: 68fb ldr r3, [r7, #12] 80025c6: 2220 movs r2, #32 80025c8: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 80025cc: 68fb ldr r3, [r7, #12] 80025ce: 2200 movs r2, #0 80025d0: f883 203e strb.w r2, [r3, #62] ; 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); 80025d4: 68fb ldr r3, [r7, #12] 80025d6: 2200 movs r2, #0 80025d8: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; 80025dc: 2300 movs r3, #0 80025de: e000 b.n 80025e2 } else { return HAL_BUSY; 80025e0: 2302 movs r3, #2 } } 80025e2: 4618 mov r0, r3 80025e4: 3718 adds r7, #24 80025e6: 46bd mov sp, r7 80025e8: bd80 pop {r7, pc} 80025ea: bf00 nop 80025ec: 00100002 .word 0x00100002 80025f0: ffff0000 .word 0xffff0000 080025f4 : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 80025f4: b580 push {r7, lr} 80025f6: b08c sub sp, #48 ; 0x30 80025f8: af02 add r7, sp, #8 80025fa: 60f8 str r0, [r7, #12] 80025fc: 4608 mov r0, r1 80025fe: 4611 mov r1, r2 8002600: 461a mov r2, r3 8002602: 4603 mov r3, r0 8002604: 817b strh r3, [r7, #10] 8002606: 460b mov r3, r1 8002608: 813b strh r3, [r7, #8] 800260a: 4613 mov r3, r2 800260c: 80fb strh r3, [r7, #6] __IO uint32_t count = 0U; 800260e: 2300 movs r3, #0 8002610: 623b str r3, [r7, #32] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); 8002612: f7ff fab1 bl 8001b78 8002616: 6278 str r0, [r7, #36] ; 0x24 /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 8002618: 68fb ldr r3, [r7, #12] 800261a: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 800261e: b2db uxtb r3, r3 8002620: 2b20 cmp r3, #32 8002622: f040 8244 bne.w 8002aae { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 8002626: 6a7b ldr r3, [r7, #36] ; 0x24 8002628: 9300 str r3, [sp, #0] 800262a: 2319 movs r3, #25 800262c: 2201 movs r2, #1 800262e: 4982 ldr r1, [pc, #520] ; (8002838 ) 8002630: 68f8 ldr r0, [r7, #12] 8002632: f000 fbc5 bl 8002dc0 8002636: 4603 mov r3, r0 8002638: 2b00 cmp r3, #0 800263a: d001 beq.n 8002640 { return HAL_BUSY; 800263c: 2302 movs r3, #2 800263e: e237 b.n 8002ab0 } /* Process Locked */ __HAL_LOCK(hi2c); 8002640: 68fb ldr r3, [r7, #12] 8002642: f893 303c ldrb.w r3, [r3, #60] ; 0x3c 8002646: 2b01 cmp r3, #1 8002648: d101 bne.n 800264e 800264a: 2302 movs r3, #2 800264c: e230 b.n 8002ab0 800264e: 68fb ldr r3, [r7, #12] 8002650: 2201 movs r2, #1 8002652: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8002656: 68fb ldr r3, [r7, #12] 8002658: 681b ldr r3, [r3, #0] 800265a: 681b ldr r3, [r3, #0] 800265c: f003 0301 and.w r3, r3, #1 8002660: 2b01 cmp r3, #1 8002662: d007 beq.n 8002674 { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 8002664: 68fb ldr r3, [r7, #12] 8002666: 681b ldr r3, [r3, #0] 8002668: 681a ldr r2, [r3, #0] 800266a: 68fb ldr r3, [r7, #12] 800266c: 681b ldr r3, [r3, #0] 800266e: f042 0201 orr.w r2, r2, #1 8002672: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); 8002674: 68fb ldr r3, [r7, #12] 8002676: 681b ldr r3, [r3, #0] 8002678: 681a ldr r2, [r3, #0] 800267a: 68fb ldr r3, [r7, #12] 800267c: 681b ldr r3, [r3, #0] 800267e: f422 6200 bic.w r2, r2, #2048 ; 0x800 8002682: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_RX; 8002684: 68fb ldr r3, [r7, #12] 8002686: 2222 movs r2, #34 ; 0x22 8002688: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 800268c: 68fb ldr r3, [r7, #12] 800268e: 2240 movs r2, #64 ; 0x40 8002690: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8002694: 68fb ldr r3, [r7, #12] 8002696: 2200 movs r2, #0 8002698: 641a str r2, [r3, #64] ; 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; 800269a: 68fb ldr r3, [r7, #12] 800269c: 6b3a ldr r2, [r7, #48] ; 0x30 800269e: 625a str r2, [r3, #36] ; 0x24 hi2c->XferCount = Size; 80026a0: 68fb ldr r3, [r7, #12] 80026a2: 8eba ldrh r2, [r7, #52] ; 0x34 80026a4: 855a strh r2, [r3, #42] ; 0x2a hi2c->XferSize = hi2c->XferCount; 80026a6: 68fb ldr r3, [r7, #12] 80026a8: 8d5b ldrh r3, [r3, #42] ; 0x2a 80026aa: b29a uxth r2, r3 80026ac: 68fb ldr r3, [r7, #12] 80026ae: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 80026b0: 68fb ldr r3, [r7, #12] 80026b2: 4a62 ldr r2, [pc, #392] ; (800283c ) 80026b4: 62da str r2, [r3, #44] ; 0x2c /* Send Slave Address and Memory Address */ if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 80026b6: 88f8 ldrh r0, [r7, #6] 80026b8: 893a ldrh r2, [r7, #8] 80026ba: 8979 ldrh r1, [r7, #10] 80026bc: 6a7b ldr r3, [r7, #36] ; 0x24 80026be: 9301 str r3, [sp, #4] 80026c0: 6bbb ldr r3, [r7, #56] ; 0x38 80026c2: 9300 str r3, [sp, #0] 80026c4: 4603 mov r3, r0 80026c6: 68f8 ldr r0, [r7, #12] 80026c8: f000 fa92 bl 8002bf0 80026cc: 4603 mov r3, r0 80026ce: 2b00 cmp r3, #0 80026d0: d001 beq.n 80026d6 { return HAL_ERROR; 80026d2: 2301 movs r3, #1 80026d4: e1ec b.n 8002ab0 } if (hi2c->XferSize == 0U) 80026d6: 68fb ldr r3, [r7, #12] 80026d8: 8d1b ldrh r3, [r3, #40] ; 0x28 80026da: 2b00 cmp r3, #0 80026dc: d113 bne.n 8002706 { /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80026de: 2300 movs r3, #0 80026e0: 61fb str r3, [r7, #28] 80026e2: 68fb ldr r3, [r7, #12] 80026e4: 681b ldr r3, [r3, #0] 80026e6: 695b ldr r3, [r3, #20] 80026e8: 61fb str r3, [r7, #28] 80026ea: 68fb ldr r3, [r7, #12] 80026ec: 681b ldr r3, [r3, #0] 80026ee: 699b ldr r3, [r3, #24] 80026f0: 61fb str r3, [r7, #28] 80026f2: 69fb ldr r3, [r7, #28] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 80026f4: 68fb ldr r3, [r7, #12] 80026f6: 681b ldr r3, [r3, #0] 80026f8: 681a ldr r2, [r3, #0] 80026fa: 68fb ldr r3, [r7, #12] 80026fc: 681b ldr r3, [r3, #0] 80026fe: f442 7200 orr.w r2, r2, #512 ; 0x200 8002702: 601a str r2, [r3, #0] 8002704: e1c0 b.n 8002a88 } else if (hi2c->XferSize == 1U) 8002706: 68fb ldr r3, [r7, #12] 8002708: 8d1b ldrh r3, [r3, #40] ; 0x28 800270a: 2b01 cmp r3, #1 800270c: d11e bne.n 800274c { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 800270e: 68fb ldr r3, [r7, #12] 8002710: 681b ldr r3, [r3, #0] 8002712: 681a ldr r2, [r3, #0] 8002714: 68fb ldr r3, [r7, #12] 8002716: 681b ldr r3, [r3, #0] 8002718: f422 6280 bic.w r2, r2, #1024 ; 0x400 800271c: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); 800271e: b672 cpsid i } 8002720: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8002722: 2300 movs r3, #0 8002724: 61bb str r3, [r7, #24] 8002726: 68fb ldr r3, [r7, #12] 8002728: 681b ldr r3, [r3, #0] 800272a: 695b ldr r3, [r3, #20] 800272c: 61bb str r3, [r7, #24] 800272e: 68fb ldr r3, [r7, #12] 8002730: 681b ldr r3, [r3, #0] 8002732: 699b ldr r3, [r3, #24] 8002734: 61bb str r3, [r7, #24] 8002736: 69bb ldr r3, [r7, #24] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002738: 68fb ldr r3, [r7, #12] 800273a: 681b ldr r3, [r3, #0] 800273c: 681a ldr r2, [r3, #0] 800273e: 68fb ldr r3, [r7, #12] 8002740: 681b ldr r3, [r3, #0] 8002742: f442 7200 orr.w r2, r2, #512 ; 0x200 8002746: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); 8002748: b662 cpsie i } 800274a: e035 b.n 80027b8 /* Re-enable IRQs */ __enable_irq(); } else if (hi2c->XferSize == 2U) 800274c: 68fb ldr r3, [r7, #12] 800274e: 8d1b ldrh r3, [r3, #40] ; 0x28 8002750: 2b02 cmp r3, #2 8002752: d11e bne.n 8002792 { /* Enable Pos */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); 8002754: 68fb ldr r3, [r7, #12] 8002756: 681b ldr r3, [r3, #0] 8002758: 681a ldr r2, [r3, #0] 800275a: 68fb ldr r3, [r7, #12] 800275c: 681b ldr r3, [r3, #0] 800275e: f442 6200 orr.w r2, r2, #2048 ; 0x800 8002762: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); 8002764: b672 cpsid i } 8002766: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8002768: 2300 movs r3, #0 800276a: 617b str r3, [r7, #20] 800276c: 68fb ldr r3, [r7, #12] 800276e: 681b ldr r3, [r3, #0] 8002770: 695b ldr r3, [r3, #20] 8002772: 617b str r3, [r7, #20] 8002774: 68fb ldr r3, [r7, #12] 8002776: 681b ldr r3, [r3, #0] 8002778: 699b ldr r3, [r3, #24] 800277a: 617b str r3, [r7, #20] 800277c: 697b ldr r3, [r7, #20] /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 800277e: 68fb ldr r3, [r7, #12] 8002780: 681b ldr r3, [r3, #0] 8002782: 681a ldr r2, [r3, #0] 8002784: 68fb ldr r3, [r7, #12] 8002786: 681b ldr r3, [r3, #0] 8002788: f422 6280 bic.w r2, r2, #1024 ; 0x400 800278c: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); 800278e: b662 cpsie i } 8002790: e012 b.n 80027b8 __enable_irq(); } else { /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8002792: 68fb ldr r3, [r7, #12] 8002794: 681b ldr r3, [r3, #0] 8002796: 681a ldr r2, [r3, #0] 8002798: 68fb ldr r3, [r7, #12] 800279a: 681b ldr r3, [r3, #0] 800279c: f442 6280 orr.w r2, r2, #1024 ; 0x400 80027a0: 601a str r2, [r3, #0] /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80027a2: 2300 movs r3, #0 80027a4: 613b str r3, [r7, #16] 80027a6: 68fb ldr r3, [r7, #12] 80027a8: 681b ldr r3, [r3, #0] 80027aa: 695b ldr r3, [r3, #20] 80027ac: 613b str r3, [r7, #16] 80027ae: 68fb ldr r3, [r7, #12] 80027b0: 681b ldr r3, [r3, #0] 80027b2: 699b ldr r3, [r3, #24] 80027b4: 613b str r3, [r7, #16] 80027b6: 693b ldr r3, [r7, #16] } while (hi2c->XferSize > 0U) 80027b8: e166 b.n 8002a88 { if (hi2c->XferSize <= 3U) 80027ba: 68fb ldr r3, [r7, #12] 80027bc: 8d1b ldrh r3, [r3, #40] ; 0x28 80027be: 2b03 cmp r3, #3 80027c0: f200 811f bhi.w 8002a02 { /* One byte */ if (hi2c->XferSize == 1U) 80027c4: 68fb ldr r3, [r7, #12] 80027c6: 8d1b ldrh r3, [r3, #40] ; 0x28 80027c8: 2b01 cmp r3, #1 80027ca: d123 bne.n 8002814 { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 80027cc: 6a7a ldr r2, [r7, #36] ; 0x24 80027ce: 6bb9 ldr r1, [r7, #56] ; 0x38 80027d0: 68f8 ldr r0, [r7, #12] 80027d2: f000 fc4d bl 8003070 80027d6: 4603 mov r3, r0 80027d8: 2b00 cmp r3, #0 80027da: d001 beq.n 80027e0 { return HAL_ERROR; 80027dc: 2301 movs r3, #1 80027de: e167 b.n 8002ab0 } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 80027e0: 68fb ldr r3, [r7, #12] 80027e2: 681b ldr r3, [r3, #0] 80027e4: 691a ldr r2, [r3, #16] 80027e6: 68fb ldr r3, [r7, #12] 80027e8: 6a5b ldr r3, [r3, #36] ; 0x24 80027ea: b2d2 uxtb r2, r2 80027ec: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 80027ee: 68fb ldr r3, [r7, #12] 80027f0: 6a5b ldr r3, [r3, #36] ; 0x24 80027f2: 1c5a adds r2, r3, #1 80027f4: 68fb ldr r3, [r7, #12] 80027f6: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 80027f8: 68fb ldr r3, [r7, #12] 80027fa: 8d1b ldrh r3, [r3, #40] ; 0x28 80027fc: 3b01 subs r3, #1 80027fe: b29a uxth r2, r3 8002800: 68fb ldr r3, [r7, #12] 8002802: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002804: 68fb ldr r3, [r7, #12] 8002806: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002808: b29b uxth r3, r3 800280a: 3b01 subs r3, #1 800280c: b29a uxth r2, r3 800280e: 68fb ldr r3, [r7, #12] 8002810: 855a strh r2, [r3, #42] ; 0x2a 8002812: e139 b.n 8002a88 } /* Two bytes */ else if (hi2c->XferSize == 2U) 8002814: 68fb ldr r3, [r7, #12] 8002816: 8d1b ldrh r3, [r3, #40] ; 0x28 8002818: 2b02 cmp r3, #2 800281a: d152 bne.n 80028c2 { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 800281c: 6a7b ldr r3, [r7, #36] ; 0x24 800281e: 9300 str r3, [sp, #0] 8002820: 6bbb ldr r3, [r7, #56] ; 0x38 8002822: 2200 movs r2, #0 8002824: 4906 ldr r1, [pc, #24] ; (8002840 ) 8002826: 68f8 ldr r0, [r7, #12] 8002828: f000 faca bl 8002dc0 800282c: 4603 mov r3, r0 800282e: 2b00 cmp r3, #0 8002830: d008 beq.n 8002844 { return HAL_ERROR; 8002832: 2301 movs r3, #1 8002834: e13c b.n 8002ab0 8002836: bf00 nop 8002838: 00100002 .word 0x00100002 800283c: ffff0000 .word 0xffff0000 8002840: 00010004 .word 0x00010004 __ASM volatile ("cpsid i" : : : "memory"); 8002844: b672 cpsid i } 8002846: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002848: 68fb ldr r3, [r7, #12] 800284a: 681b ldr r3, [r3, #0] 800284c: 681a ldr r2, [r3, #0] 800284e: 68fb ldr r3, [r7, #12] 8002850: 681b ldr r3, [r3, #0] 8002852: f442 7200 orr.w r2, r2, #512 ; 0x200 8002856: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002858: 68fb ldr r3, [r7, #12] 800285a: 681b ldr r3, [r3, #0] 800285c: 691a ldr r2, [r3, #16] 800285e: 68fb ldr r3, [r7, #12] 8002860: 6a5b ldr r3, [r3, #36] ; 0x24 8002862: b2d2 uxtb r2, r2 8002864: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002866: 68fb ldr r3, [r7, #12] 8002868: 6a5b ldr r3, [r3, #36] ; 0x24 800286a: 1c5a adds r2, r3, #1 800286c: 68fb ldr r3, [r7, #12] 800286e: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002870: 68fb ldr r3, [r7, #12] 8002872: 8d1b ldrh r3, [r3, #40] ; 0x28 8002874: 3b01 subs r3, #1 8002876: b29a uxth r2, r3 8002878: 68fb ldr r3, [r7, #12] 800287a: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 800287c: 68fb ldr r3, [r7, #12] 800287e: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002880: b29b uxth r3, r3 8002882: 3b01 subs r3, #1 8002884: b29a uxth r2, r3 8002886: 68fb ldr r3, [r7, #12] 8002888: 855a strh r2, [r3, #42] ; 0x2a __ASM volatile ("cpsie i" : : : "memory"); 800288a: b662 cpsie i } 800288c: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 800288e: 68fb ldr r3, [r7, #12] 8002890: 681b ldr r3, [r3, #0] 8002892: 691a ldr r2, [r3, #16] 8002894: 68fb ldr r3, [r7, #12] 8002896: 6a5b ldr r3, [r3, #36] ; 0x24 8002898: b2d2 uxtb r2, r2 800289a: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 800289c: 68fb ldr r3, [r7, #12] 800289e: 6a5b ldr r3, [r3, #36] ; 0x24 80028a0: 1c5a adds r2, r3, #1 80028a2: 68fb ldr r3, [r7, #12] 80028a4: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 80028a6: 68fb ldr r3, [r7, #12] 80028a8: 8d1b ldrh r3, [r3, #40] ; 0x28 80028aa: 3b01 subs r3, #1 80028ac: b29a uxth r2, r3 80028ae: 68fb ldr r3, [r7, #12] 80028b0: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 80028b2: 68fb ldr r3, [r7, #12] 80028b4: 8d5b ldrh r3, [r3, #42] ; 0x2a 80028b6: b29b uxth r3, r3 80028b8: 3b01 subs r3, #1 80028ba: b29a uxth r2, r3 80028bc: 68fb ldr r3, [r7, #12] 80028be: 855a strh r2, [r3, #42] ; 0x2a 80028c0: e0e2 b.n 8002a88 } /* 3 Last bytes */ else { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 80028c2: 6a7b ldr r3, [r7, #36] ; 0x24 80028c4: 9300 str r3, [sp, #0] 80028c6: 6bbb ldr r3, [r7, #56] ; 0x38 80028c8: 2200 movs r2, #0 80028ca: 497b ldr r1, [pc, #492] ; (8002ab8 ) 80028cc: 68f8 ldr r0, [r7, #12] 80028ce: f000 fa77 bl 8002dc0 80028d2: 4603 mov r3, r0 80028d4: 2b00 cmp r3, #0 80028d6: d001 beq.n 80028dc { return HAL_ERROR; 80028d8: 2301 movs r3, #1 80028da: e0e9 b.n 8002ab0 } /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 80028dc: 68fb ldr r3, [r7, #12] 80028de: 681b ldr r3, [r3, #0] 80028e0: 681a ldr r2, [r3, #0] 80028e2: 68fb ldr r3, [r7, #12] 80028e4: 681b ldr r3, [r3, #0] 80028e6: f422 6280 bic.w r2, r2, #1024 ; 0x400 80028ea: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); 80028ec: b672 cpsid i } 80028ee: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 80028f0: 68fb ldr r3, [r7, #12] 80028f2: 681b ldr r3, [r3, #0] 80028f4: 691a ldr r2, [r3, #16] 80028f6: 68fb ldr r3, [r7, #12] 80028f8: 6a5b ldr r3, [r3, #36] ; 0x24 80028fa: b2d2 uxtb r2, r2 80028fc: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 80028fe: 68fb ldr r3, [r7, #12] 8002900: 6a5b ldr r3, [r3, #36] ; 0x24 8002902: 1c5a adds r2, r3, #1 8002904: 68fb ldr r3, [r7, #12] 8002906: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002908: 68fb ldr r3, [r7, #12] 800290a: 8d1b ldrh r3, [r3, #40] ; 0x28 800290c: 3b01 subs r3, #1 800290e: b29a uxth r2, r3 8002910: 68fb ldr r3, [r7, #12] 8002912: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002914: 68fb ldr r3, [r7, #12] 8002916: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002918: b29b uxth r3, r3 800291a: 3b01 subs r3, #1 800291c: b29a uxth r2, r3 800291e: 68fb ldr r3, [r7, #12] 8002920: 855a strh r2, [r3, #42] ; 0x2a /* Wait until BTF flag is set */ count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U); 8002922: 4b66 ldr r3, [pc, #408] ; (8002abc ) 8002924: 681b ldr r3, [r3, #0] 8002926: 08db lsrs r3, r3, #3 8002928: 4a65 ldr r2, [pc, #404] ; (8002ac0 ) 800292a: fba2 2303 umull r2, r3, r2, r3 800292e: 0a1a lsrs r2, r3, #8 8002930: 4613 mov r3, r2 8002932: 009b lsls r3, r3, #2 8002934: 4413 add r3, r2 8002936: 00da lsls r2, r3, #3 8002938: 1ad3 subs r3, r2, r3 800293a: 623b str r3, [r7, #32] do { count--; 800293c: 6a3b ldr r3, [r7, #32] 800293e: 3b01 subs r3, #1 8002940: 623b str r3, [r7, #32] if (count == 0U) 8002942: 6a3b ldr r3, [r7, #32] 8002944: 2b00 cmp r3, #0 8002946: d118 bne.n 800297a { hi2c->PreviousState = I2C_STATE_NONE; 8002948: 68fb ldr r3, [r7, #12] 800294a: 2200 movs r2, #0 800294c: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 800294e: 68fb ldr r3, [r7, #12] 8002950: 2220 movs r2, #32 8002952: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002956: 68fb ldr r3, [r7, #12] 8002958: 2200 movs r2, #0 800295a: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 800295e: 68fb ldr r3, [r7, #12] 8002960: 6c1b ldr r3, [r3, #64] ; 0x40 8002962: f043 0220 orr.w r2, r3, #32 8002966: 68fb ldr r3, [r7, #12] 8002968: 641a str r2, [r3, #64] ; 0x40 __ASM volatile ("cpsie i" : : : "memory"); 800296a: b662 cpsie i } 800296c: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Process Unlocked */ __HAL_UNLOCK(hi2c); 800296e: 68fb ldr r3, [r7, #12] 8002970: 2200 movs r2, #0 8002972: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8002976: 2301 movs r3, #1 8002978: e09a b.n 8002ab0 } } while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET); 800297a: 68fb ldr r3, [r7, #12] 800297c: 681b ldr r3, [r3, #0] 800297e: 695b ldr r3, [r3, #20] 8002980: f003 0304 and.w r3, r3, #4 8002984: 2b04 cmp r3, #4 8002986: d1d9 bne.n 800293c /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002988: 68fb ldr r3, [r7, #12] 800298a: 681b ldr r3, [r3, #0] 800298c: 681a ldr r2, [r3, #0] 800298e: 68fb ldr r3, [r7, #12] 8002990: 681b ldr r3, [r3, #0] 8002992: f442 7200 orr.w r2, r2, #512 ; 0x200 8002996: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002998: 68fb ldr r3, [r7, #12] 800299a: 681b ldr r3, [r3, #0] 800299c: 691a ldr r2, [r3, #16] 800299e: 68fb ldr r3, [r7, #12] 80029a0: 6a5b ldr r3, [r3, #36] ; 0x24 80029a2: b2d2 uxtb r2, r2 80029a4: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 80029a6: 68fb ldr r3, [r7, #12] 80029a8: 6a5b ldr r3, [r3, #36] ; 0x24 80029aa: 1c5a adds r2, r3, #1 80029ac: 68fb ldr r3, [r7, #12] 80029ae: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 80029b0: 68fb ldr r3, [r7, #12] 80029b2: 8d1b ldrh r3, [r3, #40] ; 0x28 80029b4: 3b01 subs r3, #1 80029b6: b29a uxth r2, r3 80029b8: 68fb ldr r3, [r7, #12] 80029ba: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 80029bc: 68fb ldr r3, [r7, #12] 80029be: 8d5b ldrh r3, [r3, #42] ; 0x2a 80029c0: b29b uxth r3, r3 80029c2: 3b01 subs r3, #1 80029c4: b29a uxth r2, r3 80029c6: 68fb ldr r3, [r7, #12] 80029c8: 855a strh r2, [r3, #42] ; 0x2a __ASM volatile ("cpsie i" : : : "memory"); 80029ca: b662 cpsie i } 80029cc: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 80029ce: 68fb ldr r3, [r7, #12] 80029d0: 681b ldr r3, [r3, #0] 80029d2: 691a ldr r2, [r3, #16] 80029d4: 68fb ldr r3, [r7, #12] 80029d6: 6a5b ldr r3, [r3, #36] ; 0x24 80029d8: b2d2 uxtb r2, r2 80029da: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 80029dc: 68fb ldr r3, [r7, #12] 80029de: 6a5b ldr r3, [r3, #36] ; 0x24 80029e0: 1c5a adds r2, r3, #1 80029e2: 68fb ldr r3, [r7, #12] 80029e4: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 80029e6: 68fb ldr r3, [r7, #12] 80029e8: 8d1b ldrh r3, [r3, #40] ; 0x28 80029ea: 3b01 subs r3, #1 80029ec: b29a uxth r2, r3 80029ee: 68fb ldr r3, [r7, #12] 80029f0: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 80029f2: 68fb ldr r3, [r7, #12] 80029f4: 8d5b ldrh r3, [r3, #42] ; 0x2a 80029f6: b29b uxth r3, r3 80029f8: 3b01 subs r3, #1 80029fa: b29a uxth r2, r3 80029fc: 68fb ldr r3, [r7, #12] 80029fe: 855a strh r2, [r3, #42] ; 0x2a 8002a00: e042 b.n 8002a88 } } else { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8002a02: 6a7a ldr r2, [r7, #36] ; 0x24 8002a04: 6bb9 ldr r1, [r7, #56] ; 0x38 8002a06: 68f8 ldr r0, [r7, #12] 8002a08: f000 fb32 bl 8003070 8002a0c: 4603 mov r3, r0 8002a0e: 2b00 cmp r3, #0 8002a10: d001 beq.n 8002a16 { return HAL_ERROR; 8002a12: 2301 movs r3, #1 8002a14: e04c b.n 8002ab0 } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002a16: 68fb ldr r3, [r7, #12] 8002a18: 681b ldr r3, [r3, #0] 8002a1a: 691a ldr r2, [r3, #16] 8002a1c: 68fb ldr r3, [r7, #12] 8002a1e: 6a5b ldr r3, [r3, #36] ; 0x24 8002a20: b2d2 uxtb r2, r2 8002a22: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002a24: 68fb ldr r3, [r7, #12] 8002a26: 6a5b ldr r3, [r3, #36] ; 0x24 8002a28: 1c5a adds r2, r3, #1 8002a2a: 68fb ldr r3, [r7, #12] 8002a2c: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002a2e: 68fb ldr r3, [r7, #12] 8002a30: 8d1b ldrh r3, [r3, #40] ; 0x28 8002a32: 3b01 subs r3, #1 8002a34: b29a uxth r2, r3 8002a36: 68fb ldr r3, [r7, #12] 8002a38: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002a3a: 68fb ldr r3, [r7, #12] 8002a3c: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002a3e: b29b uxth r3, r3 8002a40: 3b01 subs r3, #1 8002a42: b29a uxth r2, r3 8002a44: 68fb ldr r3, [r7, #12] 8002a46: 855a strh r2, [r3, #42] ; 0x2a if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 8002a48: 68fb ldr r3, [r7, #12] 8002a4a: 681b ldr r3, [r3, #0] 8002a4c: 695b ldr r3, [r3, #20] 8002a4e: f003 0304 and.w r3, r3, #4 8002a52: 2b04 cmp r3, #4 8002a54: d118 bne.n 8002a88 { /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002a56: 68fb ldr r3, [r7, #12] 8002a58: 681b ldr r3, [r3, #0] 8002a5a: 691a ldr r2, [r3, #16] 8002a5c: 68fb ldr r3, [r7, #12] 8002a5e: 6a5b ldr r3, [r3, #36] ; 0x24 8002a60: b2d2 uxtb r2, r2 8002a62: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002a64: 68fb ldr r3, [r7, #12] 8002a66: 6a5b ldr r3, [r3, #36] ; 0x24 8002a68: 1c5a adds r2, r3, #1 8002a6a: 68fb ldr r3, [r7, #12] 8002a6c: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002a6e: 68fb ldr r3, [r7, #12] 8002a70: 8d1b ldrh r3, [r3, #40] ; 0x28 8002a72: 3b01 subs r3, #1 8002a74: b29a uxth r2, r3 8002a76: 68fb ldr r3, [r7, #12] 8002a78: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002a7a: 68fb ldr r3, [r7, #12] 8002a7c: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002a7e: b29b uxth r3, r3 8002a80: 3b01 subs r3, #1 8002a82: b29a uxth r2, r3 8002a84: 68fb ldr r3, [r7, #12] 8002a86: 855a strh r2, [r3, #42] ; 0x2a while (hi2c->XferSize > 0U) 8002a88: 68fb ldr r3, [r7, #12] 8002a8a: 8d1b ldrh r3, [r3, #40] ; 0x28 8002a8c: 2b00 cmp r3, #0 8002a8e: f47f ae94 bne.w 80027ba } } } hi2c->State = HAL_I2C_STATE_READY; 8002a92: 68fb ldr r3, [r7, #12] 8002a94: 2220 movs r2, #32 8002a96: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002a9a: 68fb ldr r3, [r7, #12] 8002a9c: 2200 movs r2, #0 8002a9e: f883 203e strb.w r2, [r3, #62] ; 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002aa2: 68fb ldr r3, [r7, #12] 8002aa4: 2200 movs r2, #0 8002aa6: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; 8002aaa: 2300 movs r3, #0 8002aac: e000 b.n 8002ab0 } else { return HAL_BUSY; 8002aae: 2302 movs r3, #2 } } 8002ab0: 4618 mov r0, r3 8002ab2: 3728 adds r7, #40 ; 0x28 8002ab4: 46bd mov sp, r7 8002ab6: bd80 pop {r7, pc} 8002ab8: 00010004 .word 0x00010004 8002abc: 20000000 .word 0x20000000 8002ac0: 14f8b589 .word 0x14f8b589 08002ac4 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) { 8002ac4: b580 push {r7, lr} 8002ac6: b088 sub sp, #32 8002ac8: af02 add r7, sp, #8 8002aca: 60f8 str r0, [r7, #12] 8002acc: 4608 mov r0, r1 8002ace: 4611 mov r1, r2 8002ad0: 461a mov r2, r3 8002ad2: 4603 mov r3, r0 8002ad4: 817b strh r3, [r7, #10] 8002ad6: 460b mov r3, r1 8002ad8: 813b strh r3, [r7, #8] 8002ada: 4613 mov r3, r2 8002adc: 80fb strh r3, [r7, #6] /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); 8002ade: 68fb ldr r3, [r7, #12] 8002ae0: 681b ldr r3, [r3, #0] 8002ae2: 681a ldr r2, [r3, #0] 8002ae4: 68fb ldr r3, [r7, #12] 8002ae6: 681b ldr r3, [r3, #0] 8002ae8: f442 7280 orr.w r2, r2, #256 ; 0x100 8002aec: 601a str r2, [r3, #0] /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8002aee: 6a7b ldr r3, [r7, #36] ; 0x24 8002af0: 9300 str r3, [sp, #0] 8002af2: 6a3b ldr r3, [r7, #32] 8002af4: 2200 movs r2, #0 8002af6: f04f 1101 mov.w r1, #65537 ; 0x10001 8002afa: 68f8 ldr r0, [r7, #12] 8002afc: f000 f960 bl 8002dc0 8002b00: 4603 mov r3, r0 8002b02: 2b00 cmp r3, #0 8002b04: d00d beq.n 8002b22 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) 8002b06: 68fb ldr r3, [r7, #12] 8002b08: 681b ldr r3, [r3, #0] 8002b0a: 681b ldr r3, [r3, #0] 8002b0c: f403 7380 and.w r3, r3, #256 ; 0x100 8002b10: f5b3 7f80 cmp.w r3, #256 ; 0x100 8002b14: d103 bne.n 8002b1e { hi2c->ErrorCode = HAL_I2C_WRONG_START; 8002b16: 68fb ldr r3, [r7, #12] 8002b18: f44f 7200 mov.w r2, #512 ; 0x200 8002b1c: 641a str r2, [r3, #64] ; 0x40 } return HAL_TIMEOUT; 8002b1e: 2303 movs r3, #3 8002b20: e05f b.n 8002be2 } /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 8002b22: 897b ldrh r3, [r7, #10] 8002b24: b2db uxtb r3, r3 8002b26: 461a mov r2, r3 8002b28: 68fb ldr r3, [r7, #12] 8002b2a: 681b ldr r3, [r3, #0] 8002b2c: f002 02fe and.w r2, r2, #254 ; 0xfe 8002b30: 611a str r2, [r3, #16] /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8002b32: 6a7b ldr r3, [r7, #36] ; 0x24 8002b34: 6a3a ldr r2, [r7, #32] 8002b36: 492d ldr r1, [pc, #180] ; (8002bec ) 8002b38: 68f8 ldr r0, [r7, #12] 8002b3a: f000 f998 bl 8002e6e 8002b3e: 4603 mov r3, r0 8002b40: 2b00 cmp r3, #0 8002b42: d001 beq.n 8002b48 { return HAL_ERROR; 8002b44: 2301 movs r3, #1 8002b46: e04c b.n 8002be2 } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8002b48: 2300 movs r3, #0 8002b4a: 617b str r3, [r7, #20] 8002b4c: 68fb ldr r3, [r7, #12] 8002b4e: 681b ldr r3, [r3, #0] 8002b50: 695b ldr r3, [r3, #20] 8002b52: 617b str r3, [r7, #20] 8002b54: 68fb ldr r3, [r7, #12] 8002b56: 681b ldr r3, [r3, #0] 8002b58: 699b ldr r3, [r3, #24] 8002b5a: 617b str r3, [r7, #20] 8002b5c: 697b ldr r3, [r7, #20] /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002b5e: 6a7a ldr r2, [r7, #36] ; 0x24 8002b60: 6a39 ldr r1, [r7, #32] 8002b62: 68f8 ldr r0, [r7, #12] 8002b64: f000 fa02 bl 8002f6c 8002b68: 4603 mov r3, r0 8002b6a: 2b00 cmp r3, #0 8002b6c: d00d beq.n 8002b8a { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002b6e: 68fb ldr r3, [r7, #12] 8002b70: 6c1b ldr r3, [r3, #64] ; 0x40 8002b72: 2b04 cmp r3, #4 8002b74: d107 bne.n 8002b86 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002b76: 68fb ldr r3, [r7, #12] 8002b78: 681b ldr r3, [r3, #0] 8002b7a: 681a ldr r2, [r3, #0] 8002b7c: 68fb ldr r3, [r7, #12] 8002b7e: 681b ldr r3, [r3, #0] 8002b80: f442 7200 orr.w r2, r2, #512 ; 0x200 8002b84: 601a str r2, [r3, #0] } return HAL_ERROR; 8002b86: 2301 movs r3, #1 8002b88: e02b b.n 8002be2 } /* If Memory address size is 8Bit */ if (MemAddSize == I2C_MEMADD_SIZE_8BIT) 8002b8a: 88fb ldrh r3, [r7, #6] 8002b8c: 2b01 cmp r3, #1 8002b8e: d105 bne.n 8002b9c { /* Send Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8002b90: 893b ldrh r3, [r7, #8] 8002b92: b2da uxtb r2, r3 8002b94: 68fb ldr r3, [r7, #12] 8002b96: 681b ldr r3, [r3, #0] 8002b98: 611a str r2, [r3, #16] 8002b9a: e021 b.n 8002be0 } /* If Memory address size is 16Bit */ else { /* Send MSB of Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 8002b9c: 893b ldrh r3, [r7, #8] 8002b9e: 0a1b lsrs r3, r3, #8 8002ba0: b29b uxth r3, r3 8002ba2: b2da uxtb r2, r3 8002ba4: 68fb ldr r3, [r7, #12] 8002ba6: 681b ldr r3, [r3, #0] 8002ba8: 611a str r2, [r3, #16] /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002baa: 6a7a ldr r2, [r7, #36] ; 0x24 8002bac: 6a39 ldr r1, [r7, #32] 8002bae: 68f8 ldr r0, [r7, #12] 8002bb0: f000 f9dc bl 8002f6c 8002bb4: 4603 mov r3, r0 8002bb6: 2b00 cmp r3, #0 8002bb8: d00d beq.n 8002bd6 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002bba: 68fb ldr r3, [r7, #12] 8002bbc: 6c1b ldr r3, [r3, #64] ; 0x40 8002bbe: 2b04 cmp r3, #4 8002bc0: d107 bne.n 8002bd2 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002bc2: 68fb ldr r3, [r7, #12] 8002bc4: 681b ldr r3, [r3, #0] 8002bc6: 681a ldr r2, [r3, #0] 8002bc8: 68fb ldr r3, [r7, #12] 8002bca: 681b ldr r3, [r3, #0] 8002bcc: f442 7200 orr.w r2, r2, #512 ; 0x200 8002bd0: 601a str r2, [r3, #0] } return HAL_ERROR; 8002bd2: 2301 movs r3, #1 8002bd4: e005 b.n 8002be2 } /* Send LSB of Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8002bd6: 893b ldrh r3, [r7, #8] 8002bd8: b2da uxtb r2, r3 8002bda: 68fb ldr r3, [r7, #12] 8002bdc: 681b ldr r3, [r3, #0] 8002bde: 611a str r2, [r3, #16] } return HAL_OK; 8002be0: 2300 movs r3, #0 } 8002be2: 4618 mov r0, r3 8002be4: 3718 adds r7, #24 8002be6: 46bd mov sp, r7 8002be8: bd80 pop {r7, pc} 8002bea: bf00 nop 8002bec: 00010002 .word 0x00010002 08002bf0 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) { 8002bf0: b580 push {r7, lr} 8002bf2: b088 sub sp, #32 8002bf4: af02 add r7, sp, #8 8002bf6: 60f8 str r0, [r7, #12] 8002bf8: 4608 mov r0, r1 8002bfa: 4611 mov r1, r2 8002bfc: 461a mov r2, r3 8002bfe: 4603 mov r3, r0 8002c00: 817b strh r3, [r7, #10] 8002c02: 460b mov r3, r1 8002c04: 813b strh r3, [r7, #8] 8002c06: 4613 mov r3, r2 8002c08: 80fb strh r3, [r7, #6] /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8002c0a: 68fb ldr r3, [r7, #12] 8002c0c: 681b ldr r3, [r3, #0] 8002c0e: 681a ldr r2, [r3, #0] 8002c10: 68fb ldr r3, [r7, #12] 8002c12: 681b ldr r3, [r3, #0] 8002c14: f442 6280 orr.w r2, r2, #1024 ; 0x400 8002c18: 601a str r2, [r3, #0] /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); 8002c1a: 68fb ldr r3, [r7, #12] 8002c1c: 681b ldr r3, [r3, #0] 8002c1e: 681a ldr r2, [r3, #0] 8002c20: 68fb ldr r3, [r7, #12] 8002c22: 681b ldr r3, [r3, #0] 8002c24: f442 7280 orr.w r2, r2, #256 ; 0x100 8002c28: 601a str r2, [r3, #0] /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8002c2a: 6a7b ldr r3, [r7, #36] ; 0x24 8002c2c: 9300 str r3, [sp, #0] 8002c2e: 6a3b ldr r3, [r7, #32] 8002c30: 2200 movs r2, #0 8002c32: f04f 1101 mov.w r1, #65537 ; 0x10001 8002c36: 68f8 ldr r0, [r7, #12] 8002c38: f000 f8c2 bl 8002dc0 8002c3c: 4603 mov r3, r0 8002c3e: 2b00 cmp r3, #0 8002c40: d00d beq.n 8002c5e { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) 8002c42: 68fb ldr r3, [r7, #12] 8002c44: 681b ldr r3, [r3, #0] 8002c46: 681b ldr r3, [r3, #0] 8002c48: f403 7380 and.w r3, r3, #256 ; 0x100 8002c4c: f5b3 7f80 cmp.w r3, #256 ; 0x100 8002c50: d103 bne.n 8002c5a { hi2c->ErrorCode = HAL_I2C_WRONG_START; 8002c52: 68fb ldr r3, [r7, #12] 8002c54: f44f 7200 mov.w r2, #512 ; 0x200 8002c58: 641a str r2, [r3, #64] ; 0x40 } return HAL_TIMEOUT; 8002c5a: 2303 movs r3, #3 8002c5c: e0aa b.n 8002db4 } /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 8002c5e: 897b ldrh r3, [r7, #10] 8002c60: b2db uxtb r3, r3 8002c62: 461a mov r2, r3 8002c64: 68fb ldr r3, [r7, #12] 8002c66: 681b ldr r3, [r3, #0] 8002c68: f002 02fe and.w r2, r2, #254 ; 0xfe 8002c6c: 611a str r2, [r3, #16] /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8002c6e: 6a7b ldr r3, [r7, #36] ; 0x24 8002c70: 6a3a ldr r2, [r7, #32] 8002c72: 4952 ldr r1, [pc, #328] ; (8002dbc ) 8002c74: 68f8 ldr r0, [r7, #12] 8002c76: f000 f8fa bl 8002e6e 8002c7a: 4603 mov r3, r0 8002c7c: 2b00 cmp r3, #0 8002c7e: d001 beq.n 8002c84 { return HAL_ERROR; 8002c80: 2301 movs r3, #1 8002c82: e097 b.n 8002db4 } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8002c84: 2300 movs r3, #0 8002c86: 617b str r3, [r7, #20] 8002c88: 68fb ldr r3, [r7, #12] 8002c8a: 681b ldr r3, [r3, #0] 8002c8c: 695b ldr r3, [r3, #20] 8002c8e: 617b str r3, [r7, #20] 8002c90: 68fb ldr r3, [r7, #12] 8002c92: 681b ldr r3, [r3, #0] 8002c94: 699b ldr r3, [r3, #24] 8002c96: 617b str r3, [r7, #20] 8002c98: 697b ldr r3, [r7, #20] /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002c9a: 6a7a ldr r2, [r7, #36] ; 0x24 8002c9c: 6a39 ldr r1, [r7, #32] 8002c9e: 68f8 ldr r0, [r7, #12] 8002ca0: f000 f964 bl 8002f6c 8002ca4: 4603 mov r3, r0 8002ca6: 2b00 cmp r3, #0 8002ca8: d00d beq.n 8002cc6 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002caa: 68fb ldr r3, [r7, #12] 8002cac: 6c1b ldr r3, [r3, #64] ; 0x40 8002cae: 2b04 cmp r3, #4 8002cb0: d107 bne.n 8002cc2 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002cb2: 68fb ldr r3, [r7, #12] 8002cb4: 681b ldr r3, [r3, #0] 8002cb6: 681a ldr r2, [r3, #0] 8002cb8: 68fb ldr r3, [r7, #12] 8002cba: 681b ldr r3, [r3, #0] 8002cbc: f442 7200 orr.w r2, r2, #512 ; 0x200 8002cc0: 601a str r2, [r3, #0] } return HAL_ERROR; 8002cc2: 2301 movs r3, #1 8002cc4: e076 b.n 8002db4 } /* If Memory address size is 8Bit */ if (MemAddSize == I2C_MEMADD_SIZE_8BIT) 8002cc6: 88fb ldrh r3, [r7, #6] 8002cc8: 2b01 cmp r3, #1 8002cca: d105 bne.n 8002cd8 { /* Send Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8002ccc: 893b ldrh r3, [r7, #8] 8002cce: b2da uxtb r2, r3 8002cd0: 68fb ldr r3, [r7, #12] 8002cd2: 681b ldr r3, [r3, #0] 8002cd4: 611a str r2, [r3, #16] 8002cd6: e021 b.n 8002d1c } /* If Memory address size is 16Bit */ else { /* Send MSB of Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 8002cd8: 893b ldrh r3, [r7, #8] 8002cda: 0a1b lsrs r3, r3, #8 8002cdc: b29b uxth r3, r3 8002cde: b2da uxtb r2, r3 8002ce0: 68fb ldr r3, [r7, #12] 8002ce2: 681b ldr r3, [r3, #0] 8002ce4: 611a str r2, [r3, #16] /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002ce6: 6a7a ldr r2, [r7, #36] ; 0x24 8002ce8: 6a39 ldr r1, [r7, #32] 8002cea: 68f8 ldr r0, [r7, #12] 8002cec: f000 f93e bl 8002f6c 8002cf0: 4603 mov r3, r0 8002cf2: 2b00 cmp r3, #0 8002cf4: d00d beq.n 8002d12 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002cf6: 68fb ldr r3, [r7, #12] 8002cf8: 6c1b ldr r3, [r3, #64] ; 0x40 8002cfa: 2b04 cmp r3, #4 8002cfc: d107 bne.n 8002d0e { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002cfe: 68fb ldr r3, [r7, #12] 8002d00: 681b ldr r3, [r3, #0] 8002d02: 681a ldr r2, [r3, #0] 8002d04: 68fb ldr r3, [r7, #12] 8002d06: 681b ldr r3, [r3, #0] 8002d08: f442 7200 orr.w r2, r2, #512 ; 0x200 8002d0c: 601a str r2, [r3, #0] } return HAL_ERROR; 8002d0e: 2301 movs r3, #1 8002d10: e050 b.n 8002db4 } /* Send LSB of Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8002d12: 893b ldrh r3, [r7, #8] 8002d14: b2da uxtb r2, r3 8002d16: 68fb ldr r3, [r7, #12] 8002d18: 681b ldr r3, [r3, #0] 8002d1a: 611a str r2, [r3, #16] } /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002d1c: 6a7a ldr r2, [r7, #36] ; 0x24 8002d1e: 6a39 ldr r1, [r7, #32] 8002d20: 68f8 ldr r0, [r7, #12] 8002d22: f000 f923 bl 8002f6c 8002d26: 4603 mov r3, r0 8002d28: 2b00 cmp r3, #0 8002d2a: d00d beq.n 8002d48 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002d2c: 68fb ldr r3, [r7, #12] 8002d2e: 6c1b ldr r3, [r3, #64] ; 0x40 8002d30: 2b04 cmp r3, #4 8002d32: d107 bne.n 8002d44 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002d34: 68fb ldr r3, [r7, #12] 8002d36: 681b ldr r3, [r3, #0] 8002d38: 681a ldr r2, [r3, #0] 8002d3a: 68fb ldr r3, [r7, #12] 8002d3c: 681b ldr r3, [r3, #0] 8002d3e: f442 7200 orr.w r2, r2, #512 ; 0x200 8002d42: 601a str r2, [r3, #0] } return HAL_ERROR; 8002d44: 2301 movs r3, #1 8002d46: e035 b.n 8002db4 } /* Generate Restart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); 8002d48: 68fb ldr r3, [r7, #12] 8002d4a: 681b ldr r3, [r3, #0] 8002d4c: 681a ldr r2, [r3, #0] 8002d4e: 68fb ldr r3, [r7, #12] 8002d50: 681b ldr r3, [r3, #0] 8002d52: f442 7280 orr.w r2, r2, #256 ; 0x100 8002d56: 601a str r2, [r3, #0] /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8002d58: 6a7b ldr r3, [r7, #36] ; 0x24 8002d5a: 9300 str r3, [sp, #0] 8002d5c: 6a3b ldr r3, [r7, #32] 8002d5e: 2200 movs r2, #0 8002d60: f04f 1101 mov.w r1, #65537 ; 0x10001 8002d64: 68f8 ldr r0, [r7, #12] 8002d66: f000 f82b bl 8002dc0 8002d6a: 4603 mov r3, r0 8002d6c: 2b00 cmp r3, #0 8002d6e: d00d beq.n 8002d8c { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) 8002d70: 68fb ldr r3, [r7, #12] 8002d72: 681b ldr r3, [r3, #0] 8002d74: 681b ldr r3, [r3, #0] 8002d76: f403 7380 and.w r3, r3, #256 ; 0x100 8002d7a: f5b3 7f80 cmp.w r3, #256 ; 0x100 8002d7e: d103 bne.n 8002d88 { hi2c->ErrorCode = HAL_I2C_WRONG_START; 8002d80: 68fb ldr r3, [r7, #12] 8002d82: f44f 7200 mov.w r2, #512 ; 0x200 8002d86: 641a str r2, [r3, #64] ; 0x40 } return HAL_TIMEOUT; 8002d88: 2303 movs r3, #3 8002d8a: e013 b.n 8002db4 } /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); 8002d8c: 897b ldrh r3, [r7, #10] 8002d8e: b2db uxtb r3, r3 8002d90: f043 0301 orr.w r3, r3, #1 8002d94: b2da uxtb r2, r3 8002d96: 68fb ldr r3, [r7, #12] 8002d98: 681b ldr r3, [r3, #0] 8002d9a: 611a str r2, [r3, #16] /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8002d9c: 6a7b ldr r3, [r7, #36] ; 0x24 8002d9e: 6a3a ldr r2, [r7, #32] 8002da0: 4906 ldr r1, [pc, #24] ; (8002dbc ) 8002da2: 68f8 ldr r0, [r7, #12] 8002da4: f000 f863 bl 8002e6e 8002da8: 4603 mov r3, r0 8002daa: 2b00 cmp r3, #0 8002dac: d001 beq.n 8002db2 { return HAL_ERROR; 8002dae: 2301 movs r3, #1 8002db0: e000 b.n 8002db4 } return HAL_OK; 8002db2: 2300 movs r3, #0 } 8002db4: 4618 mov r0, r3 8002db6: 3718 adds r7, #24 8002db8: 46bd mov sp, r7 8002dba: bd80 pop {r7, pc} 8002dbc: 00010002 .word 0x00010002 08002dc0 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) { 8002dc0: b580 push {r7, lr} 8002dc2: b084 sub sp, #16 8002dc4: af00 add r7, sp, #0 8002dc6: 60f8 str r0, [r7, #12] 8002dc8: 60b9 str r1, [r7, #8] 8002dca: 603b str r3, [r7, #0] 8002dcc: 4613 mov r3, r2 8002dce: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) 8002dd0: e025 b.n 8002e1e { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8002dd2: 683b ldr r3, [r7, #0] 8002dd4: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8002dd8: d021 beq.n 8002e1e { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8002dda: f7fe fecd bl 8001b78 8002dde: 4602 mov r2, r0 8002de0: 69bb ldr r3, [r7, #24] 8002de2: 1ad3 subs r3, r2, r3 8002de4: 683a ldr r2, [r7, #0] 8002de6: 429a cmp r2, r3 8002de8: d302 bcc.n 8002df0 8002dea: 683b ldr r3, [r7, #0] 8002dec: 2b00 cmp r3, #0 8002dee: d116 bne.n 8002e1e { hi2c->PreviousState = I2C_STATE_NONE; 8002df0: 68fb ldr r3, [r7, #12] 8002df2: 2200 movs r2, #0 8002df4: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8002df6: 68fb ldr r3, [r7, #12] 8002df8: 2220 movs r2, #32 8002dfa: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002dfe: 68fb ldr r3, [r7, #12] 8002e00: 2200 movs r2, #0 8002e02: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8002e06: 68fb ldr r3, [r7, #12] 8002e08: 6c1b ldr r3, [r3, #64] ; 0x40 8002e0a: f043 0220 orr.w r2, r3, #32 8002e0e: 68fb ldr r3, [r7, #12] 8002e10: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002e12: 68fb ldr r3, [r7, #12] 8002e14: 2200 movs r2, #0 8002e16: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8002e1a: 2301 movs r3, #1 8002e1c: e023 b.n 8002e66 while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) 8002e1e: 68bb ldr r3, [r7, #8] 8002e20: 0c1b lsrs r3, r3, #16 8002e22: b2db uxtb r3, r3 8002e24: 2b01 cmp r3, #1 8002e26: d10d bne.n 8002e44 8002e28: 68fb ldr r3, [r7, #12] 8002e2a: 681b ldr r3, [r3, #0] 8002e2c: 695b ldr r3, [r3, #20] 8002e2e: 43da mvns r2, r3 8002e30: 68bb ldr r3, [r7, #8] 8002e32: 4013 ands r3, r2 8002e34: b29b uxth r3, r3 8002e36: 2b00 cmp r3, #0 8002e38: bf0c ite eq 8002e3a: 2301 moveq r3, #1 8002e3c: 2300 movne r3, #0 8002e3e: b2db uxtb r3, r3 8002e40: 461a mov r2, r3 8002e42: e00c b.n 8002e5e 8002e44: 68fb ldr r3, [r7, #12] 8002e46: 681b ldr r3, [r3, #0] 8002e48: 699b ldr r3, [r3, #24] 8002e4a: 43da mvns r2, r3 8002e4c: 68bb ldr r3, [r7, #8] 8002e4e: 4013 ands r3, r2 8002e50: b29b uxth r3, r3 8002e52: 2b00 cmp r3, #0 8002e54: bf0c ite eq 8002e56: 2301 moveq r3, #1 8002e58: 2300 movne r3, #0 8002e5a: b2db uxtb r3, r3 8002e5c: 461a mov r2, r3 8002e5e: 79fb ldrb r3, [r7, #7] 8002e60: 429a cmp r2, r3 8002e62: d0b6 beq.n 8002dd2 } } } return HAL_OK; 8002e64: 2300 movs r3, #0 } 8002e66: 4618 mov r0, r3 8002e68: 3710 adds r7, #16 8002e6a: 46bd mov sp, r7 8002e6c: bd80 pop {r7, pc} 08002e6e : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart) { 8002e6e: b580 push {r7, lr} 8002e70: b084 sub sp, #16 8002e72: af00 add r7, sp, #0 8002e74: 60f8 str r0, [r7, #12] 8002e76: 60b9 str r1, [r7, #8] 8002e78: 607a str r2, [r7, #4] 8002e7a: 603b str r3, [r7, #0] while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) 8002e7c: e051 b.n 8002f22 { if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 8002e7e: 68fb ldr r3, [r7, #12] 8002e80: 681b ldr r3, [r3, #0] 8002e82: 695b ldr r3, [r3, #20] 8002e84: f403 6380 and.w r3, r3, #1024 ; 0x400 8002e88: f5b3 6f80 cmp.w r3, #1024 ; 0x400 8002e8c: d123 bne.n 8002ed6 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002e8e: 68fb ldr r3, [r7, #12] 8002e90: 681b ldr r3, [r3, #0] 8002e92: 681a ldr r2, [r3, #0] 8002e94: 68fb ldr r3, [r7, #12] 8002e96: 681b ldr r3, [r3, #0] 8002e98: f442 7200 orr.w r2, r2, #512 ; 0x200 8002e9c: 601a str r2, [r3, #0] /* Clear AF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 8002e9e: 68fb ldr r3, [r7, #12] 8002ea0: 681b ldr r3, [r3, #0] 8002ea2: f46f 6280 mvn.w r2, #1024 ; 0x400 8002ea6: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; 8002ea8: 68fb ldr r3, [r7, #12] 8002eaa: 2200 movs r2, #0 8002eac: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8002eae: 68fb ldr r3, [r7, #12] 8002eb0: 2220 movs r2, #32 8002eb2: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002eb6: 68fb ldr r3, [r7, #12] 8002eb8: 2200 movs r2, #0 8002eba: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; 8002ebe: 68fb ldr r3, [r7, #12] 8002ec0: 6c1b ldr r3, [r3, #64] ; 0x40 8002ec2: f043 0204 orr.w r2, r3, #4 8002ec6: 68fb ldr r3, [r7, #12] 8002ec8: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002eca: 68fb ldr r3, [r7, #12] 8002ecc: 2200 movs r2, #0 8002ece: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8002ed2: 2301 movs r3, #1 8002ed4: e046 b.n 8002f64 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8002ed6: 687b ldr r3, [r7, #4] 8002ed8: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8002edc: d021 beq.n 8002f22 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8002ede: f7fe fe4b bl 8001b78 8002ee2: 4602 mov r2, r0 8002ee4: 683b ldr r3, [r7, #0] 8002ee6: 1ad3 subs r3, r2, r3 8002ee8: 687a ldr r2, [r7, #4] 8002eea: 429a cmp r2, r3 8002eec: d302 bcc.n 8002ef4 8002eee: 687b ldr r3, [r7, #4] 8002ef0: 2b00 cmp r3, #0 8002ef2: d116 bne.n 8002f22 { hi2c->PreviousState = I2C_STATE_NONE; 8002ef4: 68fb ldr r3, [r7, #12] 8002ef6: 2200 movs r2, #0 8002ef8: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8002efa: 68fb ldr r3, [r7, #12] 8002efc: 2220 movs r2, #32 8002efe: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002f02: 68fb ldr r3, [r7, #12] 8002f04: 2200 movs r2, #0 8002f06: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8002f0a: 68fb ldr r3, [r7, #12] 8002f0c: 6c1b ldr r3, [r3, #64] ; 0x40 8002f0e: f043 0220 orr.w r2, r3, #32 8002f12: 68fb ldr r3, [r7, #12] 8002f14: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002f16: 68fb ldr r3, [r7, #12] 8002f18: 2200 movs r2, #0 8002f1a: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8002f1e: 2301 movs r3, #1 8002f20: e020 b.n 8002f64 while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) 8002f22: 68bb ldr r3, [r7, #8] 8002f24: 0c1b lsrs r3, r3, #16 8002f26: b2db uxtb r3, r3 8002f28: 2b01 cmp r3, #1 8002f2a: d10c bne.n 8002f46 8002f2c: 68fb ldr r3, [r7, #12] 8002f2e: 681b ldr r3, [r3, #0] 8002f30: 695b ldr r3, [r3, #20] 8002f32: 43da mvns r2, r3 8002f34: 68bb ldr r3, [r7, #8] 8002f36: 4013 ands r3, r2 8002f38: b29b uxth r3, r3 8002f3a: 2b00 cmp r3, #0 8002f3c: bf14 ite ne 8002f3e: 2301 movne r3, #1 8002f40: 2300 moveq r3, #0 8002f42: b2db uxtb r3, r3 8002f44: e00b b.n 8002f5e 8002f46: 68fb ldr r3, [r7, #12] 8002f48: 681b ldr r3, [r3, #0] 8002f4a: 699b ldr r3, [r3, #24] 8002f4c: 43da mvns r2, r3 8002f4e: 68bb ldr r3, [r7, #8] 8002f50: 4013 ands r3, r2 8002f52: b29b uxth r3, r3 8002f54: 2b00 cmp r3, #0 8002f56: bf14 ite ne 8002f58: 2301 movne r3, #1 8002f5a: 2300 moveq r3, #0 8002f5c: b2db uxtb r3, r3 8002f5e: 2b00 cmp r3, #0 8002f60: d18d bne.n 8002e7e } } } return HAL_OK; 8002f62: 2300 movs r3, #0 } 8002f64: 4618 mov r0, r3 8002f66: 3710 adds r7, #16 8002f68: 46bd mov sp, r7 8002f6a: bd80 pop {r7, pc} 08002f6c : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8002f6c: b580 push {r7, lr} 8002f6e: b084 sub sp, #16 8002f70: af00 add r7, sp, #0 8002f72: 60f8 str r0, [r7, #12] 8002f74: 60b9 str r1, [r7, #8] 8002f76: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) 8002f78: e02d b.n 8002fd6 { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 8002f7a: 68f8 ldr r0, [r7, #12] 8002f7c: f000 f8ce bl 800311c 8002f80: 4603 mov r3, r0 8002f82: 2b00 cmp r3, #0 8002f84: d001 beq.n 8002f8a { return HAL_ERROR; 8002f86: 2301 movs r3, #1 8002f88: e02d b.n 8002fe6 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8002f8a: 68bb ldr r3, [r7, #8] 8002f8c: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8002f90: d021 beq.n 8002fd6 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8002f92: f7fe fdf1 bl 8001b78 8002f96: 4602 mov r2, r0 8002f98: 687b ldr r3, [r7, #4] 8002f9a: 1ad3 subs r3, r2, r3 8002f9c: 68ba ldr r2, [r7, #8] 8002f9e: 429a cmp r2, r3 8002fa0: d302 bcc.n 8002fa8 8002fa2: 68bb ldr r3, [r7, #8] 8002fa4: 2b00 cmp r3, #0 8002fa6: d116 bne.n 8002fd6 { hi2c->PreviousState = I2C_STATE_NONE; 8002fa8: 68fb ldr r3, [r7, #12] 8002faa: 2200 movs r2, #0 8002fac: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8002fae: 68fb ldr r3, [r7, #12] 8002fb0: 2220 movs r2, #32 8002fb2: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002fb6: 68fb ldr r3, [r7, #12] 8002fb8: 2200 movs r2, #0 8002fba: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8002fbe: 68fb ldr r3, [r7, #12] 8002fc0: 6c1b ldr r3, [r3, #64] ; 0x40 8002fc2: f043 0220 orr.w r2, r3, #32 8002fc6: 68fb ldr r3, [r7, #12] 8002fc8: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002fca: 68fb ldr r3, [r7, #12] 8002fcc: 2200 movs r2, #0 8002fce: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8002fd2: 2301 movs r3, #1 8002fd4: e007 b.n 8002fe6 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) 8002fd6: 68fb ldr r3, [r7, #12] 8002fd8: 681b ldr r3, [r3, #0] 8002fda: 695b ldr r3, [r3, #20] 8002fdc: f003 0380 and.w r3, r3, #128 ; 0x80 8002fe0: 2b80 cmp r3, #128 ; 0x80 8002fe2: d1ca bne.n 8002f7a } } } return HAL_OK; 8002fe4: 2300 movs r3, #0 } 8002fe6: 4618 mov r0, r3 8002fe8: 3710 adds r7, #16 8002fea: 46bd mov sp, r7 8002fec: bd80 pop {r7, pc} 08002fee : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8002fee: b580 push {r7, lr} 8002ff0: b084 sub sp, #16 8002ff2: af00 add r7, sp, #0 8002ff4: 60f8 str r0, [r7, #12] 8002ff6: 60b9 str r1, [r7, #8] 8002ff8: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) 8002ffa: e02d b.n 8003058 { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 8002ffc: 68f8 ldr r0, [r7, #12] 8002ffe: f000 f88d bl 800311c 8003002: 4603 mov r3, r0 8003004: 2b00 cmp r3, #0 8003006: d001 beq.n 800300c { return HAL_ERROR; 8003008: 2301 movs r3, #1 800300a: e02d b.n 8003068 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 800300c: 68bb ldr r3, [r7, #8] 800300e: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8003012: d021 beq.n 8003058 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8003014: f7fe fdb0 bl 8001b78 8003018: 4602 mov r2, r0 800301a: 687b ldr r3, [r7, #4] 800301c: 1ad3 subs r3, r2, r3 800301e: 68ba ldr r2, [r7, #8] 8003020: 429a cmp r2, r3 8003022: d302 bcc.n 800302a 8003024: 68bb ldr r3, [r7, #8] 8003026: 2b00 cmp r3, #0 8003028: d116 bne.n 8003058 { hi2c->PreviousState = I2C_STATE_NONE; 800302a: 68fb ldr r3, [r7, #12] 800302c: 2200 movs r2, #0 800302e: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8003030: 68fb ldr r3, [r7, #12] 8003032: 2220 movs r2, #32 8003034: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8003038: 68fb ldr r3, [r7, #12] 800303a: 2200 movs r2, #0 800303c: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8003040: 68fb ldr r3, [r7, #12] 8003042: 6c1b ldr r3, [r3, #64] ; 0x40 8003044: f043 0220 orr.w r2, r3, #32 8003048: 68fb ldr r3, [r7, #12] 800304a: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 800304c: 68fb ldr r3, [r7, #12] 800304e: 2200 movs r2, #0 8003050: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8003054: 2301 movs r3, #1 8003056: e007 b.n 8003068 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) 8003058: 68fb ldr r3, [r7, #12] 800305a: 681b ldr r3, [r3, #0] 800305c: 695b ldr r3, [r3, #20] 800305e: f003 0304 and.w r3, r3, #4 8003062: 2b04 cmp r3, #4 8003064: d1ca bne.n 8002ffc } } } return HAL_OK; 8003066: 2300 movs r3, #0 } 8003068: 4618 mov r0, r3 800306a: 3710 adds r7, #16 800306c: 46bd mov sp, r7 800306e: bd80 pop {r7, pc} 08003070 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8003070: b580 push {r7, lr} 8003072: b084 sub sp, #16 8003074: af00 add r7, sp, #0 8003076: 60f8 str r0, [r7, #12] 8003078: 60b9 str r1, [r7, #8] 800307a: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) 800307c: e042 b.n 8003104 { /* Check if a STOPF is detected */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) 800307e: 68fb ldr r3, [r7, #12] 8003080: 681b ldr r3, [r3, #0] 8003082: 695b ldr r3, [r3, #20] 8003084: f003 0310 and.w r3, r3, #16 8003088: 2b10 cmp r3, #16 800308a: d119 bne.n 80030c0 { /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 800308c: 68fb ldr r3, [r7, #12] 800308e: 681b ldr r3, [r3, #0] 8003090: f06f 0210 mvn.w r2, #16 8003094: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; 8003096: 68fb ldr r3, [r7, #12] 8003098: 2200 movs r2, #0 800309a: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 800309c: 68fb ldr r3, [r7, #12] 800309e: 2220 movs r2, #32 80030a0: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 80030a4: 68fb ldr r3, [r7, #12] 80030a6: 2200 movs r2, #0 80030a8: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_NONE; 80030ac: 68fb ldr r3, [r7, #12] 80030ae: 6c1a ldr r2, [r3, #64] ; 0x40 80030b0: 68fb ldr r3, [r7, #12] 80030b2: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 80030b4: 68fb ldr r3, [r7, #12] 80030b6: 2200 movs r2, #0 80030b8: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 80030bc: 2301 movs r3, #1 80030be: e029 b.n 8003114 } /* Check for the Timeout */ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 80030c0: f7fe fd5a bl 8001b78 80030c4: 4602 mov r2, r0 80030c6: 687b ldr r3, [r7, #4] 80030c8: 1ad3 subs r3, r2, r3 80030ca: 68ba ldr r2, [r7, #8] 80030cc: 429a cmp r2, r3 80030ce: d302 bcc.n 80030d6 80030d0: 68bb ldr r3, [r7, #8] 80030d2: 2b00 cmp r3, #0 80030d4: d116 bne.n 8003104 { hi2c->PreviousState = I2C_STATE_NONE; 80030d6: 68fb ldr r3, [r7, #12] 80030d8: 2200 movs r2, #0 80030da: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 80030dc: 68fb ldr r3, [r7, #12] 80030de: 2220 movs r2, #32 80030e0: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 80030e4: 68fb ldr r3, [r7, #12] 80030e6: 2200 movs r2, #0 80030e8: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 80030ec: 68fb ldr r3, [r7, #12] 80030ee: 6c1b ldr r3, [r3, #64] ; 0x40 80030f0: f043 0220 orr.w r2, r3, #32 80030f4: 68fb ldr r3, [r7, #12] 80030f6: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 80030f8: 68fb ldr r3, [r7, #12] 80030fa: 2200 movs r2, #0 80030fc: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8003100: 2301 movs r3, #1 8003102: e007 b.n 8003114 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) 8003104: 68fb ldr r3, [r7, #12] 8003106: 681b ldr r3, [r3, #0] 8003108: 695b ldr r3, [r3, #20] 800310a: f003 0340 and.w r3, r3, #64 ; 0x40 800310e: 2b40 cmp r3, #64 ; 0x40 8003110: d1b5 bne.n 800307e } } return HAL_OK; 8003112: 2300 movs r3, #0 } 8003114: 4618 mov r0, r3 8003116: 3710 adds r7, #16 8003118: 46bd mov sp, r7 800311a: bd80 pop {r7, pc} 0800311c : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) { 800311c: b480 push {r7} 800311e: b083 sub sp, #12 8003120: af00 add r7, sp, #0 8003122: 6078 str r0, [r7, #4] if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 8003124: 687b ldr r3, [r7, #4] 8003126: 681b ldr r3, [r3, #0] 8003128: 695b ldr r3, [r3, #20] 800312a: f403 6380 and.w r3, r3, #1024 ; 0x400 800312e: f5b3 6f80 cmp.w r3, #1024 ; 0x400 8003132: d11b bne.n 800316c { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 8003134: 687b ldr r3, [r7, #4] 8003136: 681b ldr r3, [r3, #0] 8003138: f46f 6280 mvn.w r2, #1024 ; 0x400 800313c: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; 800313e: 687b ldr r3, [r7, #4] 8003140: 2200 movs r2, #0 8003142: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8003144: 687b ldr r3, [r7, #4] 8003146: 2220 movs r2, #32 8003148: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 800314c: 687b ldr r3, [r7, #4] 800314e: 2200 movs r2, #0 8003150: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; 8003154: 687b ldr r3, [r7, #4] 8003156: 6c1b ldr r3, [r3, #64] ; 0x40 8003158: f043 0204 orr.w r2, r3, #4 800315c: 687b ldr r3, [r7, #4] 800315e: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003160: 687b ldr r3, [r7, #4] 8003162: 2200 movs r2, #0 8003164: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8003168: 2301 movs r3, #1 800316a: e000 b.n 800316e } return HAL_OK; 800316c: 2300 movs r3, #0 } 800316e: 4618 mov r0, r3 8003170: 370c adds r7, #12 8003172: 46bd mov sp, r7 8003174: bc80 pop {r7} 8003176: 4770 bx lr 08003178 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 8003178: b580 push {r7, lr} 800317a: b086 sub sp, #24 800317c: af00 add r7, sp, #0 800317e: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 8003180: 687b ldr r3, [r7, #4] 8003182: 2b00 cmp r3, #0 8003184: d101 bne.n 800318a { return HAL_ERROR; 8003186: 2301 movs r3, #1 8003188: e26c b.n 8003664 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 800318a: 687b ldr r3, [r7, #4] 800318c: 681b ldr r3, [r3, #0] 800318e: f003 0301 and.w r3, r3, #1 8003192: 2b00 cmp r3, #0 8003194: f000 8087 beq.w 80032a6 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8003198: 4b92 ldr r3, [pc, #584] ; (80033e4 ) 800319a: 685b ldr r3, [r3, #4] 800319c: f003 030c and.w r3, r3, #12 80031a0: 2b04 cmp r3, #4 80031a2: d00c beq.n 80031be || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 80031a4: 4b8f ldr r3, [pc, #572] ; (80033e4 ) 80031a6: 685b ldr r3, [r3, #4] 80031a8: f003 030c and.w r3, r3, #12 80031ac: 2b08 cmp r3, #8 80031ae: d112 bne.n 80031d6 80031b0: 4b8c ldr r3, [pc, #560] ; (80033e4 ) 80031b2: 685b ldr r3, [r3, #4] 80031b4: f403 3380 and.w r3, r3, #65536 ; 0x10000 80031b8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 80031bc: d10b bne.n 80031d6 { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 80031be: 4b89 ldr r3, [pc, #548] ; (80033e4 ) 80031c0: 681b ldr r3, [r3, #0] 80031c2: f403 3300 and.w r3, r3, #131072 ; 0x20000 80031c6: 2b00 cmp r3, #0 80031c8: d06c beq.n 80032a4 80031ca: 687b ldr r3, [r7, #4] 80031cc: 685b ldr r3, [r3, #4] 80031ce: 2b00 cmp r3, #0 80031d0: d168 bne.n 80032a4 { return HAL_ERROR; 80031d2: 2301 movs r3, #1 80031d4: e246 b.n 8003664 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 80031d6: 687b ldr r3, [r7, #4] 80031d8: 685b ldr r3, [r3, #4] 80031da: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 80031de: d106 bne.n 80031ee 80031e0: 4b80 ldr r3, [pc, #512] ; (80033e4 ) 80031e2: 681b ldr r3, [r3, #0] 80031e4: 4a7f ldr r2, [pc, #508] ; (80033e4 ) 80031e6: f443 3380 orr.w r3, r3, #65536 ; 0x10000 80031ea: 6013 str r3, [r2, #0] 80031ec: e02e b.n 800324c 80031ee: 687b ldr r3, [r7, #4] 80031f0: 685b ldr r3, [r3, #4] 80031f2: 2b00 cmp r3, #0 80031f4: d10c bne.n 8003210 80031f6: 4b7b ldr r3, [pc, #492] ; (80033e4 ) 80031f8: 681b ldr r3, [r3, #0] 80031fa: 4a7a ldr r2, [pc, #488] ; (80033e4 ) 80031fc: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8003200: 6013 str r3, [r2, #0] 8003202: 4b78 ldr r3, [pc, #480] ; (80033e4 ) 8003204: 681b ldr r3, [r3, #0] 8003206: 4a77 ldr r2, [pc, #476] ; (80033e4 ) 8003208: f423 2380 bic.w r3, r3, #262144 ; 0x40000 800320c: 6013 str r3, [r2, #0] 800320e: e01d b.n 800324c 8003210: 687b ldr r3, [r7, #4] 8003212: 685b ldr r3, [r3, #4] 8003214: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 8003218: d10c bne.n 8003234 800321a: 4b72 ldr r3, [pc, #456] ; (80033e4 ) 800321c: 681b ldr r3, [r3, #0] 800321e: 4a71 ldr r2, [pc, #452] ; (80033e4 ) 8003220: f443 2380 orr.w r3, r3, #262144 ; 0x40000 8003224: 6013 str r3, [r2, #0] 8003226: 4b6f ldr r3, [pc, #444] ; (80033e4 ) 8003228: 681b ldr r3, [r3, #0] 800322a: 4a6e ldr r2, [pc, #440] ; (80033e4 ) 800322c: f443 3380 orr.w r3, r3, #65536 ; 0x10000 8003230: 6013 str r3, [r2, #0] 8003232: e00b b.n 800324c 8003234: 4b6b ldr r3, [pc, #428] ; (80033e4 ) 8003236: 681b ldr r3, [r3, #0] 8003238: 4a6a ldr r2, [pc, #424] ; (80033e4 ) 800323a: f423 3380 bic.w r3, r3, #65536 ; 0x10000 800323e: 6013 str r3, [r2, #0] 8003240: 4b68 ldr r3, [pc, #416] ; (80033e4 ) 8003242: 681b ldr r3, [r3, #0] 8003244: 4a67 ldr r2, [pc, #412] ; (80033e4 ) 8003246: f423 2380 bic.w r3, r3, #262144 ; 0x40000 800324a: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 800324c: 687b ldr r3, [r7, #4] 800324e: 685b ldr r3, [r3, #4] 8003250: 2b00 cmp r3, #0 8003252: d013 beq.n 800327c { /* Get Start Tick */ tickstart = HAL_GetTick(); 8003254: f7fe fc90 bl 8001b78 8003258: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800325a: e008 b.n 800326e { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 800325c: f7fe fc8c bl 8001b78 8003260: 4602 mov r2, r0 8003262: 693b ldr r3, [r7, #16] 8003264: 1ad3 subs r3, r2, r3 8003266: 2b64 cmp r3, #100 ; 0x64 8003268: d901 bls.n 800326e { return HAL_TIMEOUT; 800326a: 2303 movs r3, #3 800326c: e1fa b.n 8003664 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800326e: 4b5d ldr r3, [pc, #372] ; (80033e4 ) 8003270: 681b ldr r3, [r3, #0] 8003272: f403 3300 and.w r3, r3, #131072 ; 0x20000 8003276: 2b00 cmp r3, #0 8003278: d0f0 beq.n 800325c 800327a: e014 b.n 80032a6 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 800327c: f7fe fc7c bl 8001b78 8003280: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8003282: e008 b.n 8003296 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8003284: f7fe fc78 bl 8001b78 8003288: 4602 mov r2, r0 800328a: 693b ldr r3, [r7, #16] 800328c: 1ad3 subs r3, r2, r3 800328e: 2b64 cmp r3, #100 ; 0x64 8003290: d901 bls.n 8003296 { return HAL_TIMEOUT; 8003292: 2303 movs r3, #3 8003294: e1e6 b.n 8003664 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8003296: 4b53 ldr r3, [pc, #332] ; (80033e4 ) 8003298: 681b ldr r3, [r3, #0] 800329a: f403 3300 and.w r3, r3, #131072 ; 0x20000 800329e: 2b00 cmp r3, #0 80032a0: d1f0 bne.n 8003284 80032a2: e000 b.n 80032a6 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 80032a4: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 80032a6: 687b ldr r3, [r7, #4] 80032a8: 681b ldr r3, [r3, #0] 80032aa: f003 0302 and.w r3, r3, #2 80032ae: 2b00 cmp r3, #0 80032b0: d063 beq.n 800337a /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 80032b2: 4b4c ldr r3, [pc, #304] ; (80033e4 ) 80032b4: 685b ldr r3, [r3, #4] 80032b6: f003 030c and.w r3, r3, #12 80032ba: 2b00 cmp r3, #0 80032bc: d00b beq.n 80032d6 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 80032be: 4b49 ldr r3, [pc, #292] ; (80033e4 ) 80032c0: 685b ldr r3, [r3, #4] 80032c2: f003 030c and.w r3, r3, #12 80032c6: 2b08 cmp r3, #8 80032c8: d11c bne.n 8003304 80032ca: 4b46 ldr r3, [pc, #280] ; (80033e4 ) 80032cc: 685b ldr r3, [r3, #4] 80032ce: f403 3380 and.w r3, r3, #65536 ; 0x10000 80032d2: 2b00 cmp r3, #0 80032d4: d116 bne.n 8003304 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80032d6: 4b43 ldr r3, [pc, #268] ; (80033e4 ) 80032d8: 681b ldr r3, [r3, #0] 80032da: f003 0302 and.w r3, r3, #2 80032de: 2b00 cmp r3, #0 80032e0: d005 beq.n 80032ee 80032e2: 687b ldr r3, [r7, #4] 80032e4: 691b ldr r3, [r3, #16] 80032e6: 2b01 cmp r3, #1 80032e8: d001 beq.n 80032ee { return HAL_ERROR; 80032ea: 2301 movs r3, #1 80032ec: e1ba b.n 8003664 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80032ee: 4b3d ldr r3, [pc, #244] ; (80033e4 ) 80032f0: 681b ldr r3, [r3, #0] 80032f2: f023 02f8 bic.w r2, r3, #248 ; 0xf8 80032f6: 687b ldr r3, [r7, #4] 80032f8: 695b ldr r3, [r3, #20] 80032fa: 00db lsls r3, r3, #3 80032fc: 4939 ldr r1, [pc, #228] ; (80033e4 ) 80032fe: 4313 orrs r3, r2 8003300: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8003302: e03a b.n 800337a } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8003304: 687b ldr r3, [r7, #4] 8003306: 691b ldr r3, [r3, #16] 8003308: 2b00 cmp r3, #0 800330a: d020 beq.n 800334e { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 800330c: 4b36 ldr r3, [pc, #216] ; (80033e8 ) 800330e: 2201 movs r2, #1 8003310: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8003312: f7fe fc31 bl 8001b78 8003316: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8003318: e008 b.n 800332c { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 800331a: f7fe fc2d bl 8001b78 800331e: 4602 mov r2, r0 8003320: 693b ldr r3, [r7, #16] 8003322: 1ad3 subs r3, r2, r3 8003324: 2b02 cmp r3, #2 8003326: d901 bls.n 800332c { return HAL_TIMEOUT; 8003328: 2303 movs r3, #3 800332a: e19b b.n 8003664 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 800332c: 4b2d ldr r3, [pc, #180] ; (80033e4 ) 800332e: 681b ldr r3, [r3, #0] 8003330: f003 0302 and.w r3, r3, #2 8003334: 2b00 cmp r3, #0 8003336: d0f0 beq.n 800331a } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8003338: 4b2a ldr r3, [pc, #168] ; (80033e4 ) 800333a: 681b ldr r3, [r3, #0] 800333c: f023 02f8 bic.w r2, r3, #248 ; 0xf8 8003340: 687b ldr r3, [r7, #4] 8003342: 695b ldr r3, [r3, #20] 8003344: 00db lsls r3, r3, #3 8003346: 4927 ldr r1, [pc, #156] ; (80033e4 ) 8003348: 4313 orrs r3, r2 800334a: 600b str r3, [r1, #0] 800334c: e015 b.n 800337a } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 800334e: 4b26 ldr r3, [pc, #152] ; (80033e8 ) 8003350: 2200 movs r2, #0 8003352: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8003354: f7fe fc10 bl 8001b78 8003358: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 800335a: e008 b.n 800336e { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 800335c: f7fe fc0c bl 8001b78 8003360: 4602 mov r2, r0 8003362: 693b ldr r3, [r7, #16] 8003364: 1ad3 subs r3, r2, r3 8003366: 2b02 cmp r3, #2 8003368: d901 bls.n 800336e { return HAL_TIMEOUT; 800336a: 2303 movs r3, #3 800336c: e17a b.n 8003664 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 800336e: 4b1d ldr r3, [pc, #116] ; (80033e4 ) 8003370: 681b ldr r3, [r3, #0] 8003372: f003 0302 and.w r3, r3, #2 8003376: 2b00 cmp r3, #0 8003378: d1f0 bne.n 800335c } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 800337a: 687b ldr r3, [r7, #4] 800337c: 681b ldr r3, [r3, #0] 800337e: f003 0308 and.w r3, r3, #8 8003382: 2b00 cmp r3, #0 8003384: d03a beq.n 80033fc { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8003386: 687b ldr r3, [r7, #4] 8003388: 699b ldr r3, [r3, #24] 800338a: 2b00 cmp r3, #0 800338c: d019 beq.n 80033c2 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 800338e: 4b17 ldr r3, [pc, #92] ; (80033ec ) 8003390: 2201 movs r2, #1 8003392: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8003394: f7fe fbf0 bl 8001b78 8003398: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 800339a: e008 b.n 80033ae { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 800339c: f7fe fbec bl 8001b78 80033a0: 4602 mov r2, r0 80033a2: 693b ldr r3, [r7, #16] 80033a4: 1ad3 subs r3, r2, r3 80033a6: 2b02 cmp r3, #2 80033a8: d901 bls.n 80033ae { return HAL_TIMEOUT; 80033aa: 2303 movs r3, #3 80033ac: e15a b.n 8003664 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 80033ae: 4b0d ldr r3, [pc, #52] ; (80033e4 ) 80033b0: 6a5b ldr r3, [r3, #36] ; 0x24 80033b2: f003 0302 and.w r3, r3, #2 80033b6: 2b00 cmp r3, #0 80033b8: d0f0 beq.n 800339c } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); 80033ba: 2001 movs r0, #1 80033bc: f000 fac4 bl 8003948 80033c0: e01c b.n 80033fc } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 80033c2: 4b0a ldr r3, [pc, #40] ; (80033ec ) 80033c4: 2200 movs r2, #0 80033c6: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80033c8: f7fe fbd6 bl 8001b78 80033cc: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 80033ce: e00f b.n 80033f0 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 80033d0: f7fe fbd2 bl 8001b78 80033d4: 4602 mov r2, r0 80033d6: 693b ldr r3, [r7, #16] 80033d8: 1ad3 subs r3, r2, r3 80033da: 2b02 cmp r3, #2 80033dc: d908 bls.n 80033f0 { return HAL_TIMEOUT; 80033de: 2303 movs r3, #3 80033e0: e140 b.n 8003664 80033e2: bf00 nop 80033e4: 40021000 .word 0x40021000 80033e8: 42420000 .word 0x42420000 80033ec: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 80033f0: 4b9e ldr r3, [pc, #632] ; (800366c ) 80033f2: 6a5b ldr r3, [r3, #36] ; 0x24 80033f4: f003 0302 and.w r3, r3, #2 80033f8: 2b00 cmp r3, #0 80033fa: d1e9 bne.n 80033d0 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 80033fc: 687b ldr r3, [r7, #4] 80033fe: 681b ldr r3, [r3, #0] 8003400: f003 0304 and.w r3, r3, #4 8003404: 2b00 cmp r3, #0 8003406: f000 80a6 beq.w 8003556 { FlagStatus pwrclkchanged = RESET; 800340a: 2300 movs r3, #0 800340c: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 800340e: 4b97 ldr r3, [pc, #604] ; (800366c ) 8003410: 69db ldr r3, [r3, #28] 8003412: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8003416: 2b00 cmp r3, #0 8003418: d10d bne.n 8003436 { __HAL_RCC_PWR_CLK_ENABLE(); 800341a: 4b94 ldr r3, [pc, #592] ; (800366c ) 800341c: 69db ldr r3, [r3, #28] 800341e: 4a93 ldr r2, [pc, #588] ; (800366c ) 8003420: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8003424: 61d3 str r3, [r2, #28] 8003426: 4b91 ldr r3, [pc, #580] ; (800366c ) 8003428: 69db ldr r3, [r3, #28] 800342a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 800342e: 60bb str r3, [r7, #8] 8003430: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8003432: 2301 movs r3, #1 8003434: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8003436: 4b8e ldr r3, [pc, #568] ; (8003670 ) 8003438: 681b ldr r3, [r3, #0] 800343a: f403 7380 and.w r3, r3, #256 ; 0x100 800343e: 2b00 cmp r3, #0 8003440: d118 bne.n 8003474 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8003442: 4b8b ldr r3, [pc, #556] ; (8003670 ) 8003444: 681b ldr r3, [r3, #0] 8003446: 4a8a ldr r2, [pc, #552] ; (8003670 ) 8003448: f443 7380 orr.w r3, r3, #256 ; 0x100 800344c: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 800344e: f7fe fb93 bl 8001b78 8003452: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8003454: e008 b.n 8003468 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8003456: f7fe fb8f bl 8001b78 800345a: 4602 mov r2, r0 800345c: 693b ldr r3, [r7, #16] 800345e: 1ad3 subs r3, r2, r3 8003460: 2b64 cmp r3, #100 ; 0x64 8003462: d901 bls.n 8003468 { return HAL_TIMEOUT; 8003464: 2303 movs r3, #3 8003466: e0fd b.n 8003664 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8003468: 4b81 ldr r3, [pc, #516] ; (8003670 ) 800346a: 681b ldr r3, [r3, #0] 800346c: f403 7380 and.w r3, r3, #256 ; 0x100 8003470: 2b00 cmp r3, #0 8003472: d0f0 beq.n 8003456 } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8003474: 687b ldr r3, [r7, #4] 8003476: 68db ldr r3, [r3, #12] 8003478: 2b01 cmp r3, #1 800347a: d106 bne.n 800348a 800347c: 4b7b ldr r3, [pc, #492] ; (800366c ) 800347e: 6a1b ldr r3, [r3, #32] 8003480: 4a7a ldr r2, [pc, #488] ; (800366c ) 8003482: f043 0301 orr.w r3, r3, #1 8003486: 6213 str r3, [r2, #32] 8003488: e02d b.n 80034e6 800348a: 687b ldr r3, [r7, #4] 800348c: 68db ldr r3, [r3, #12] 800348e: 2b00 cmp r3, #0 8003490: d10c bne.n 80034ac 8003492: 4b76 ldr r3, [pc, #472] ; (800366c ) 8003494: 6a1b ldr r3, [r3, #32] 8003496: 4a75 ldr r2, [pc, #468] ; (800366c ) 8003498: f023 0301 bic.w r3, r3, #1 800349c: 6213 str r3, [r2, #32] 800349e: 4b73 ldr r3, [pc, #460] ; (800366c ) 80034a0: 6a1b ldr r3, [r3, #32] 80034a2: 4a72 ldr r2, [pc, #456] ; (800366c ) 80034a4: f023 0304 bic.w r3, r3, #4 80034a8: 6213 str r3, [r2, #32] 80034aa: e01c b.n 80034e6 80034ac: 687b ldr r3, [r7, #4] 80034ae: 68db ldr r3, [r3, #12] 80034b0: 2b05 cmp r3, #5 80034b2: d10c bne.n 80034ce 80034b4: 4b6d ldr r3, [pc, #436] ; (800366c ) 80034b6: 6a1b ldr r3, [r3, #32] 80034b8: 4a6c ldr r2, [pc, #432] ; (800366c ) 80034ba: f043 0304 orr.w r3, r3, #4 80034be: 6213 str r3, [r2, #32] 80034c0: 4b6a ldr r3, [pc, #424] ; (800366c ) 80034c2: 6a1b ldr r3, [r3, #32] 80034c4: 4a69 ldr r2, [pc, #420] ; (800366c ) 80034c6: f043 0301 orr.w r3, r3, #1 80034ca: 6213 str r3, [r2, #32] 80034cc: e00b b.n 80034e6 80034ce: 4b67 ldr r3, [pc, #412] ; (800366c ) 80034d0: 6a1b ldr r3, [r3, #32] 80034d2: 4a66 ldr r2, [pc, #408] ; (800366c ) 80034d4: f023 0301 bic.w r3, r3, #1 80034d8: 6213 str r3, [r2, #32] 80034da: 4b64 ldr r3, [pc, #400] ; (800366c ) 80034dc: 6a1b ldr r3, [r3, #32] 80034de: 4a63 ldr r2, [pc, #396] ; (800366c ) 80034e0: f023 0304 bic.w r3, r3, #4 80034e4: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 80034e6: 687b ldr r3, [r7, #4] 80034e8: 68db ldr r3, [r3, #12] 80034ea: 2b00 cmp r3, #0 80034ec: d015 beq.n 800351a { /* Get Start Tick */ tickstart = HAL_GetTick(); 80034ee: f7fe fb43 bl 8001b78 80034f2: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80034f4: e00a b.n 800350c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80034f6: f7fe fb3f bl 8001b78 80034fa: 4602 mov r2, r0 80034fc: 693b ldr r3, [r7, #16] 80034fe: 1ad3 subs r3, r2, r3 8003500: f241 3288 movw r2, #5000 ; 0x1388 8003504: 4293 cmp r3, r2 8003506: d901 bls.n 800350c { return HAL_TIMEOUT; 8003508: 2303 movs r3, #3 800350a: e0ab b.n 8003664 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 800350c: 4b57 ldr r3, [pc, #348] ; (800366c ) 800350e: 6a1b ldr r3, [r3, #32] 8003510: f003 0302 and.w r3, r3, #2 8003514: 2b00 cmp r3, #0 8003516: d0ee beq.n 80034f6 8003518: e014 b.n 8003544 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 800351a: f7fe fb2d bl 8001b78 800351e: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8003520: e00a b.n 8003538 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8003522: f7fe fb29 bl 8001b78 8003526: 4602 mov r2, r0 8003528: 693b ldr r3, [r7, #16] 800352a: 1ad3 subs r3, r2, r3 800352c: f241 3288 movw r2, #5000 ; 0x1388 8003530: 4293 cmp r3, r2 8003532: d901 bls.n 8003538 { return HAL_TIMEOUT; 8003534: 2303 movs r3, #3 8003536: e095 b.n 8003664 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8003538: 4b4c ldr r3, [pc, #304] ; (800366c ) 800353a: 6a1b ldr r3, [r3, #32] 800353c: f003 0302 and.w r3, r3, #2 8003540: 2b00 cmp r3, #0 8003542: d1ee bne.n 8003522 } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8003544: 7dfb ldrb r3, [r7, #23] 8003546: 2b01 cmp r3, #1 8003548: d105 bne.n 8003556 { __HAL_RCC_PWR_CLK_DISABLE(); 800354a: 4b48 ldr r3, [pc, #288] ; (800366c ) 800354c: 69db ldr r3, [r3, #28] 800354e: 4a47 ldr r2, [pc, #284] ; (800366c ) 8003550: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8003554: 61d3 str r3, [r2, #28] #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8003556: 687b ldr r3, [r7, #4] 8003558: 69db ldr r3, [r3, #28] 800355a: 2b00 cmp r3, #0 800355c: f000 8081 beq.w 8003662 { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8003560: 4b42 ldr r3, [pc, #264] ; (800366c ) 8003562: 685b ldr r3, [r3, #4] 8003564: f003 030c and.w r3, r3, #12 8003568: 2b08 cmp r3, #8 800356a: d061 beq.n 8003630 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 800356c: 687b ldr r3, [r7, #4] 800356e: 69db ldr r3, [r3, #28] 8003570: 2b02 cmp r3, #2 8003572: d146 bne.n 8003602 /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8003574: 4b3f ldr r3, [pc, #252] ; (8003674 ) 8003576: 2200 movs r2, #0 8003578: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 800357a: f7fe fafd bl 8001b78 800357e: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8003580: e008 b.n 8003594 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8003582: f7fe faf9 bl 8001b78 8003586: 4602 mov r2, r0 8003588: 693b ldr r3, [r7, #16] 800358a: 1ad3 subs r3, r2, r3 800358c: 2b02 cmp r3, #2 800358e: d901 bls.n 8003594 { return HAL_TIMEOUT; 8003590: 2303 movs r3, #3 8003592: e067 b.n 8003664 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8003594: 4b35 ldr r3, [pc, #212] ; (800366c ) 8003596: 681b ldr r3, [r3, #0] 8003598: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 800359c: 2b00 cmp r3, #0 800359e: d1f0 bne.n 8003582 } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 80035a0: 687b ldr r3, [r7, #4] 80035a2: 6a1b ldr r3, [r3, #32] 80035a4: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 80035a8: d108 bne.n 80035bc /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 80035aa: 4b30 ldr r3, [pc, #192] ; (800366c ) 80035ac: 685b ldr r3, [r3, #4] 80035ae: f423 3200 bic.w r2, r3, #131072 ; 0x20000 80035b2: 687b ldr r3, [r7, #4] 80035b4: 689b ldr r3, [r3, #8] 80035b6: 492d ldr r1, [pc, #180] ; (800366c ) 80035b8: 4313 orrs r3, r2 80035ba: 604b str r3, [r1, #4] } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 80035bc: 4b2b ldr r3, [pc, #172] ; (800366c ) 80035be: 685b ldr r3, [r3, #4] 80035c0: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000 80035c4: 687b ldr r3, [r7, #4] 80035c6: 6a19 ldr r1, [r3, #32] 80035c8: 687b ldr r3, [r7, #4] 80035ca: 6a5b ldr r3, [r3, #36] ; 0x24 80035cc: 430b orrs r3, r1 80035ce: 4927 ldr r1, [pc, #156] ; (800366c ) 80035d0: 4313 orrs r3, r2 80035d2: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 80035d4: 4b27 ldr r3, [pc, #156] ; (8003674 ) 80035d6: 2201 movs r2, #1 80035d8: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80035da: f7fe facd bl 8001b78 80035de: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80035e0: e008 b.n 80035f4 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 80035e2: f7fe fac9 bl 8001b78 80035e6: 4602 mov r2, r0 80035e8: 693b ldr r3, [r7, #16] 80035ea: 1ad3 subs r3, r2, r3 80035ec: 2b02 cmp r3, #2 80035ee: d901 bls.n 80035f4 { return HAL_TIMEOUT; 80035f0: 2303 movs r3, #3 80035f2: e037 b.n 8003664 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80035f4: 4b1d ldr r3, [pc, #116] ; (800366c ) 80035f6: 681b ldr r3, [r3, #0] 80035f8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 80035fc: 2b00 cmp r3, #0 80035fe: d0f0 beq.n 80035e2 8003600: e02f b.n 8003662 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8003602: 4b1c ldr r3, [pc, #112] ; (8003674 ) 8003604: 2200 movs r2, #0 8003606: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8003608: f7fe fab6 bl 8001b78 800360c: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 800360e: e008 b.n 8003622 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8003610: f7fe fab2 bl 8001b78 8003614: 4602 mov r2, r0 8003616: 693b ldr r3, [r7, #16] 8003618: 1ad3 subs r3, r2, r3 800361a: 2b02 cmp r3, #2 800361c: d901 bls.n 8003622 { return HAL_TIMEOUT; 800361e: 2303 movs r3, #3 8003620: e020 b.n 8003664 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8003622: 4b12 ldr r3, [pc, #72] ; (800366c ) 8003624: 681b ldr r3, [r3, #0] 8003626: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 800362a: 2b00 cmp r3, #0 800362c: d1f0 bne.n 8003610 800362e: e018 b.n 8003662 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 8003630: 687b ldr r3, [r7, #4] 8003632: 69db ldr r3, [r3, #28] 8003634: 2b01 cmp r3, #1 8003636: d101 bne.n 800363c { return HAL_ERROR; 8003638: 2301 movs r3, #1 800363a: e013 b.n 8003664 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; 800363c: 4b0b ldr r3, [pc, #44] ; (800366c ) 800363e: 685b ldr r3, [r3, #4] 8003640: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8003642: 68fb ldr r3, [r7, #12] 8003644: f403 3280 and.w r2, r3, #65536 ; 0x10000 8003648: 687b ldr r3, [r7, #4] 800364a: 6a1b ldr r3, [r3, #32] 800364c: 429a cmp r2, r3 800364e: d106 bne.n 800365e (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) 8003650: 68fb ldr r3, [r7, #12] 8003652: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000 8003656: 687b ldr r3, [r7, #4] 8003658: 6a5b ldr r3, [r3, #36] ; 0x24 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 800365a: 429a cmp r2, r3 800365c: d001 beq.n 8003662 { return HAL_ERROR; 800365e: 2301 movs r3, #1 8003660: e000 b.n 8003664 } } } } return HAL_OK; 8003662: 2300 movs r3, #0 } 8003664: 4618 mov r0, r3 8003666: 3718 adds r7, #24 8003668: 46bd mov sp, r7 800366a: bd80 pop {r7, pc} 800366c: 40021000 .word 0x40021000 8003670: 40007000 .word 0x40007000 8003674: 42420060 .word 0x42420060 08003678 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 8003678: b580 push {r7, lr} 800367a: b084 sub sp, #16 800367c: af00 add r7, sp, #0 800367e: 6078 str r0, [r7, #4] 8003680: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 8003682: 687b ldr r3, [r7, #4] 8003684: 2b00 cmp r3, #0 8003686: d101 bne.n 800368c { return HAL_ERROR; 8003688: 2301 movs r3, #1 800368a: e0d0 b.n 800382e must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 800368c: 4b6a ldr r3, [pc, #424] ; (8003838 ) 800368e: 681b ldr r3, [r3, #0] 8003690: f003 0307 and.w r3, r3, #7 8003694: 683a ldr r2, [r7, #0] 8003696: 429a cmp r2, r3 8003698: d910 bls.n 80036bc { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 800369a: 4b67 ldr r3, [pc, #412] ; (8003838 ) 800369c: 681b ldr r3, [r3, #0] 800369e: f023 0207 bic.w r2, r3, #7 80036a2: 4965 ldr r1, [pc, #404] ; (8003838 ) 80036a4: 683b ldr r3, [r7, #0] 80036a6: 4313 orrs r3, r2 80036a8: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 80036aa: 4b63 ldr r3, [pc, #396] ; (8003838 ) 80036ac: 681b ldr r3, [r3, #0] 80036ae: f003 0307 and.w r3, r3, #7 80036b2: 683a ldr r2, [r7, #0] 80036b4: 429a cmp r2, r3 80036b6: d001 beq.n 80036bc { return HAL_ERROR; 80036b8: 2301 movs r3, #1 80036ba: e0b8 b.n 800382e } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 80036bc: 687b ldr r3, [r7, #4] 80036be: 681b ldr r3, [r3, #0] 80036c0: f003 0302 and.w r3, r3, #2 80036c4: 2b00 cmp r3, #0 80036c6: d020 beq.n 800370a { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 80036c8: 687b ldr r3, [r7, #4] 80036ca: 681b ldr r3, [r3, #0] 80036cc: f003 0304 and.w r3, r3, #4 80036d0: 2b00 cmp r3, #0 80036d2: d005 beq.n 80036e0 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 80036d4: 4b59 ldr r3, [pc, #356] ; (800383c ) 80036d6: 685b ldr r3, [r3, #4] 80036d8: 4a58 ldr r2, [pc, #352] ; (800383c ) 80036da: f443 63e0 orr.w r3, r3, #1792 ; 0x700 80036de: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 80036e0: 687b ldr r3, [r7, #4] 80036e2: 681b ldr r3, [r3, #0] 80036e4: f003 0308 and.w r3, r3, #8 80036e8: 2b00 cmp r3, #0 80036ea: d005 beq.n 80036f8 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 80036ec: 4b53 ldr r3, [pc, #332] ; (800383c ) 80036ee: 685b ldr r3, [r3, #4] 80036f0: 4a52 ldr r2, [pc, #328] ; (800383c ) 80036f2: f443 5360 orr.w r3, r3, #14336 ; 0x3800 80036f6: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 80036f8: 4b50 ldr r3, [pc, #320] ; (800383c ) 80036fa: 685b ldr r3, [r3, #4] 80036fc: f023 02f0 bic.w r2, r3, #240 ; 0xf0 8003700: 687b ldr r3, [r7, #4] 8003702: 689b ldr r3, [r3, #8] 8003704: 494d ldr r1, [pc, #308] ; (800383c ) 8003706: 4313 orrs r3, r2 8003708: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 800370a: 687b ldr r3, [r7, #4] 800370c: 681b ldr r3, [r3, #0] 800370e: f003 0301 and.w r3, r3, #1 8003712: 2b00 cmp r3, #0 8003714: d040 beq.n 8003798 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8003716: 687b ldr r3, [r7, #4] 8003718: 685b ldr r3, [r3, #4] 800371a: 2b01 cmp r3, #1 800371c: d107 bne.n 800372e { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800371e: 4b47 ldr r3, [pc, #284] ; (800383c ) 8003720: 681b ldr r3, [r3, #0] 8003722: f403 3300 and.w r3, r3, #131072 ; 0x20000 8003726: 2b00 cmp r3, #0 8003728: d115 bne.n 8003756 { return HAL_ERROR; 800372a: 2301 movs r3, #1 800372c: e07f b.n 800382e } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 800372e: 687b ldr r3, [r7, #4] 8003730: 685b ldr r3, [r3, #4] 8003732: 2b02 cmp r3, #2 8003734: d107 bne.n 8003746 { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8003736: 4b41 ldr r3, [pc, #260] ; (800383c ) 8003738: 681b ldr r3, [r3, #0] 800373a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 800373e: 2b00 cmp r3, #0 8003740: d109 bne.n 8003756 { return HAL_ERROR; 8003742: 2301 movs r3, #1 8003744: e073 b.n 800382e } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8003746: 4b3d ldr r3, [pc, #244] ; (800383c ) 8003748: 681b ldr r3, [r3, #0] 800374a: f003 0302 and.w r3, r3, #2 800374e: 2b00 cmp r3, #0 8003750: d101 bne.n 8003756 { return HAL_ERROR; 8003752: 2301 movs r3, #1 8003754: e06b b.n 800382e } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8003756: 4b39 ldr r3, [pc, #228] ; (800383c ) 8003758: 685b ldr r3, [r3, #4] 800375a: f023 0203 bic.w r2, r3, #3 800375e: 687b ldr r3, [r7, #4] 8003760: 685b ldr r3, [r3, #4] 8003762: 4936 ldr r1, [pc, #216] ; (800383c ) 8003764: 4313 orrs r3, r2 8003766: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 8003768: f7fe fa06 bl 8001b78 800376c: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 800376e: e00a b.n 8003786 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8003770: f7fe fa02 bl 8001b78 8003774: 4602 mov r2, r0 8003776: 68fb ldr r3, [r7, #12] 8003778: 1ad3 subs r3, r2, r3 800377a: f241 3288 movw r2, #5000 ; 0x1388 800377e: 4293 cmp r3, r2 8003780: d901 bls.n 8003786 { return HAL_TIMEOUT; 8003782: 2303 movs r3, #3 8003784: e053 b.n 800382e while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8003786: 4b2d ldr r3, [pc, #180] ; (800383c ) 8003788: 685b ldr r3, [r3, #4] 800378a: f003 020c and.w r2, r3, #12 800378e: 687b ldr r3, [r7, #4] 8003790: 685b ldr r3, [r3, #4] 8003792: 009b lsls r3, r3, #2 8003794: 429a cmp r2, r3 8003796: d1eb bne.n 8003770 } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 8003798: 4b27 ldr r3, [pc, #156] ; (8003838 ) 800379a: 681b ldr r3, [r3, #0] 800379c: f003 0307 and.w r3, r3, #7 80037a0: 683a ldr r2, [r7, #0] 80037a2: 429a cmp r2, r3 80037a4: d210 bcs.n 80037c8 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 80037a6: 4b24 ldr r3, [pc, #144] ; (8003838 ) 80037a8: 681b ldr r3, [r3, #0] 80037aa: f023 0207 bic.w r2, r3, #7 80037ae: 4922 ldr r1, [pc, #136] ; (8003838 ) 80037b0: 683b ldr r3, [r7, #0] 80037b2: 4313 orrs r3, r2 80037b4: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 80037b6: 4b20 ldr r3, [pc, #128] ; (8003838 ) 80037b8: 681b ldr r3, [r3, #0] 80037ba: f003 0307 and.w r3, r3, #7 80037be: 683a ldr r2, [r7, #0] 80037c0: 429a cmp r2, r3 80037c2: d001 beq.n 80037c8 { return HAL_ERROR; 80037c4: 2301 movs r3, #1 80037c6: e032 b.n 800382e } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 80037c8: 687b ldr r3, [r7, #4] 80037ca: 681b ldr r3, [r3, #0] 80037cc: f003 0304 and.w r3, r3, #4 80037d0: 2b00 cmp r3, #0 80037d2: d008 beq.n 80037e6 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 80037d4: 4b19 ldr r3, [pc, #100] ; (800383c ) 80037d6: 685b ldr r3, [r3, #4] 80037d8: f423 62e0 bic.w r2, r3, #1792 ; 0x700 80037dc: 687b ldr r3, [r7, #4] 80037de: 68db ldr r3, [r3, #12] 80037e0: 4916 ldr r1, [pc, #88] ; (800383c ) 80037e2: 4313 orrs r3, r2 80037e4: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 80037e6: 687b ldr r3, [r7, #4] 80037e8: 681b ldr r3, [r3, #0] 80037ea: f003 0308 and.w r3, r3, #8 80037ee: 2b00 cmp r3, #0 80037f0: d009 beq.n 8003806 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 80037f2: 4b12 ldr r3, [pc, #72] ; (800383c ) 80037f4: 685b ldr r3, [r3, #4] 80037f6: f423 5260 bic.w r2, r3, #14336 ; 0x3800 80037fa: 687b ldr r3, [r7, #4] 80037fc: 691b ldr r3, [r3, #16] 80037fe: 00db lsls r3, r3, #3 8003800: 490e ldr r1, [pc, #56] ; (800383c ) 8003802: 4313 orrs r3, r2 8003804: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 8003806: f000 f821 bl 800384c 800380a: 4602 mov r2, r0 800380c: 4b0b ldr r3, [pc, #44] ; (800383c ) 800380e: 685b ldr r3, [r3, #4] 8003810: 091b lsrs r3, r3, #4 8003812: f003 030f and.w r3, r3, #15 8003816: 490a ldr r1, [pc, #40] ; (8003840 ) 8003818: 5ccb ldrb r3, [r1, r3] 800381a: fa22 f303 lsr.w r3, r2, r3 800381e: 4a09 ldr r2, [pc, #36] ; (8003844 ) 8003820: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); 8003822: 4b09 ldr r3, [pc, #36] ; (8003848 ) 8003824: 681b ldr r3, [r3, #0] 8003826: 4618 mov r0, r3 8003828: f7fe f964 bl 8001af4 return HAL_OK; 800382c: 2300 movs r3, #0 } 800382e: 4618 mov r0, r3 8003830: 3710 adds r7, #16 8003832: 46bd mov sp, r7 8003834: bd80 pop {r7, pc} 8003836: bf00 nop 8003838: 40022000 .word 0x40022000 800383c: 40021000 .word 0x40021000 8003840: 0800a80c .word 0x0800a80c 8003844: 20000000 .word 0x20000000 8003848: 20000004 .word 0x20000004 0800384c : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 800384c: b490 push {r4, r7} 800384e: b08a sub sp, #40 ; 0x28 8003850: af00 add r7, sp, #0 #if defined(RCC_CFGR2_PREDIV1SRC) const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13}; const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; #else const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8003852: 4b2a ldr r3, [pc, #168] ; (80038fc ) 8003854: 1d3c adds r4, r7, #4 8003856: cb0f ldmia r3, {r0, r1, r2, r3} 8003858: e884 000f stmia.w r4, {r0, r1, r2, r3} #if defined(RCC_CFGR2_PREDIV1) const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; #else const uint8_t aPredivFactorTable[2] = {1, 2}; 800385c: f240 2301 movw r3, #513 ; 0x201 8003860: 803b strh r3, [r7, #0] #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 8003862: 2300 movs r3, #0 8003864: 61fb str r3, [r7, #28] 8003866: 2300 movs r3, #0 8003868: 61bb str r3, [r7, #24] 800386a: 2300 movs r3, #0 800386c: 627b str r3, [r7, #36] ; 0x24 800386e: 2300 movs r3, #0 8003870: 617b str r3, [r7, #20] uint32_t sysclockfreq = 0U; 8003872: 2300 movs r3, #0 8003874: 623b str r3, [r7, #32] #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; 8003876: 4b22 ldr r3, [pc, #136] ; (8003900 ) 8003878: 685b ldr r3, [r3, #4] 800387a: 61fb str r3, [r7, #28] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 800387c: 69fb ldr r3, [r7, #28] 800387e: f003 030c and.w r3, r3, #12 8003882: 2b04 cmp r3, #4 8003884: d002 beq.n 800388c 8003886: 2b08 cmp r3, #8 8003888: d003 beq.n 8003892 800388a: e02d b.n 80038e8 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; 800388c: 4b1d ldr r3, [pc, #116] ; (8003904 ) 800388e: 623b str r3, [r7, #32] break; 8003890: e02d b.n 80038ee } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8003892: 69fb ldr r3, [r7, #28] 8003894: 0c9b lsrs r3, r3, #18 8003896: f003 030f and.w r3, r3, #15 800389a: f107 0228 add.w r2, r7, #40 ; 0x28 800389e: 4413 add r3, r2 80038a0: f813 3c24 ldrb.w r3, [r3, #-36] 80038a4: 617b str r3, [r7, #20] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 80038a6: 69fb ldr r3, [r7, #28] 80038a8: f403 3380 and.w r3, r3, #65536 ; 0x10000 80038ac: 2b00 cmp r3, #0 80038ae: d013 beq.n 80038d8 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 80038b0: 4b13 ldr r3, [pc, #76] ; (8003900 ) 80038b2: 685b ldr r3, [r3, #4] 80038b4: 0c5b lsrs r3, r3, #17 80038b6: f003 0301 and.w r3, r3, #1 80038ba: f107 0228 add.w r2, r7, #40 ; 0x28 80038be: 4413 add r3, r2 80038c0: f813 3c28 ldrb.w r3, [r3, #-40] 80038c4: 61bb str r3, [r7, #24] { pllclk = pllclk / 2; } #else /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 80038c6: 697b ldr r3, [r7, #20] 80038c8: 4a0e ldr r2, [pc, #56] ; (8003904 ) 80038ca: fb02 f203 mul.w r2, r2, r3 80038ce: 69bb ldr r3, [r7, #24] 80038d0: fbb2 f3f3 udiv r3, r2, r3 80038d4: 627b str r3, [r7, #36] ; 0x24 80038d6: e004 b.n 80038e2 #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 80038d8: 697b ldr r3, [r7, #20] 80038da: 4a0b ldr r2, [pc, #44] ; (8003908 ) 80038dc: fb02 f303 mul.w r3, r2, r3 80038e0: 627b str r3, [r7, #36] ; 0x24 } sysclockfreq = pllclk; 80038e2: 6a7b ldr r3, [r7, #36] ; 0x24 80038e4: 623b str r3, [r7, #32] break; 80038e6: e002 b.n 80038ee } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; 80038e8: 4b06 ldr r3, [pc, #24] ; (8003904 ) 80038ea: 623b str r3, [r7, #32] break; 80038ec: bf00 nop } } return sysclockfreq; 80038ee: 6a3b ldr r3, [r7, #32] } 80038f0: 4618 mov r0, r3 80038f2: 3728 adds r7, #40 ; 0x28 80038f4: 46bd mov sp, r7 80038f6: bc90 pop {r4, r7} 80038f8: 4770 bx lr 80038fa: bf00 nop 80038fc: 0800a6b8 .word 0x0800a6b8 8003900: 40021000 .word 0x40021000 8003904: 007a1200 .word 0x007a1200 8003908: 003d0900 .word 0x003d0900 0800390c : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 800390c: b480 push {r7} 800390e: af00 add r7, sp, #0 return SystemCoreClock; 8003910: 4b02 ldr r3, [pc, #8] ; (800391c ) 8003912: 681b ldr r3, [r3, #0] } 8003914: 4618 mov r0, r3 8003916: 46bd mov sp, r7 8003918: bc80 pop {r7} 800391a: 4770 bx lr 800391c: 20000000 .word 0x20000000 08003920 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 8003920: b580 push {r7, lr} 8003922: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8003924: f7ff fff2 bl 800390c 8003928: 4602 mov r2, r0 800392a: 4b05 ldr r3, [pc, #20] ; (8003940 ) 800392c: 685b ldr r3, [r3, #4] 800392e: 0a1b lsrs r3, r3, #8 8003930: f003 0307 and.w r3, r3, #7 8003934: 4903 ldr r1, [pc, #12] ; (8003944 ) 8003936: 5ccb ldrb r3, [r1, r3] 8003938: fa22 f303 lsr.w r3, r2, r3 } 800393c: 4618 mov r0, r3 800393e: bd80 pop {r7, pc} 8003940: 40021000 .word 0x40021000 8003944: 0800a81c .word 0x0800a81c 08003948 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { 8003948: b480 push {r7} 800394a: b085 sub sp, #20 800394c: af00 add r7, sp, #0 800394e: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8003950: 4b0a ldr r3, [pc, #40] ; (800397c ) 8003952: 681b ldr r3, [r3, #0] 8003954: 4a0a ldr r2, [pc, #40] ; (8003980 ) 8003956: fba2 2303 umull r2, r3, r2, r3 800395a: 0a5b lsrs r3, r3, #9 800395c: 687a ldr r2, [r7, #4] 800395e: fb02 f303 mul.w r3, r2, r3 8003962: 60fb str r3, [r7, #12] do { __NOP(); 8003964: bf00 nop } while (Delay --); 8003966: 68fb ldr r3, [r7, #12] 8003968: 1e5a subs r2, r3, #1 800396a: 60fa str r2, [r7, #12] 800396c: 2b00 cmp r3, #0 800396e: d1f9 bne.n 8003964 } 8003970: bf00 nop 8003972: bf00 nop 8003974: 3714 adds r7, #20 8003976: 46bd mov sp, r7 8003978: bc80 pop {r7} 800397a: 4770 bx lr 800397c: 20000000 .word 0x20000000 8003980: 10624dd3 .word 0x10624dd3 08003984 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) { 8003984: b580 push {r7, lr} 8003986: b082 sub sp, #8 8003988: af00 add r7, sp, #0 800398a: 6078 str r0, [r7, #4] /* Check the SPI handle allocation */ if (hspi == NULL) 800398c: 687b ldr r3, [r7, #4] 800398e: 2b00 cmp r3, #0 8003990: d101 bne.n 8003996 { return HAL_ERROR; 8003992: 2301 movs r3, #1 8003994: e076 b.n 8003a84 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); /* TI mode is not supported on this device. TIMode parameter is mandatory equal to SPI_TIMODE_DISABLE */ assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) 8003996: 687b ldr r3, [r7, #4] 8003998: 6a5b ldr r3, [r3, #36] ; 0x24 800399a: 2b00 cmp r3, #0 800399c: d108 bne.n 80039b0 { assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); if (hspi->Init.Mode == SPI_MODE_MASTER) 800399e: 687b ldr r3, [r7, #4] 80039a0: 685b ldr r3, [r3, #4] 80039a2: f5b3 7f82 cmp.w r3, #260 ; 0x104 80039a6: d009 beq.n 80039bc assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); } else { /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */ hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; 80039a8: 687b ldr r3, [r7, #4] 80039aa: 2200 movs r2, #0 80039ac: 61da str r2, [r3, #28] 80039ae: e005 b.n 80039bc else { assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); /* Force polarity and phase to TI protocaol requirements */ hspi->Init.CLKPolarity = SPI_POLARITY_LOW; 80039b0: 687b ldr r3, [r7, #4] 80039b2: 2200 movs r2, #0 80039b4: 611a str r2, [r3, #16] hspi->Init.CLKPhase = SPI_PHASE_1EDGE; 80039b6: 687b ldr r3, [r7, #4] 80039b8: 2200 movs r2, #0 80039ba: 615a str r2, [r3, #20] if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) { assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); } #else hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 80039bc: 687b ldr r3, [r7, #4] 80039be: 2200 movs r2, #0 80039c0: 629a str r2, [r3, #40] ; 0x28 #endif /* USE_SPI_CRC */ if (hspi->State == HAL_SPI_STATE_RESET) 80039c2: 687b ldr r3, [r7, #4] 80039c4: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 80039c8: b2db uxtb r3, r3 80039ca: 2b00 cmp r3, #0 80039cc: d106 bne.n 80039dc { /* Allocate lock resource and initialize it */ hspi->Lock = HAL_UNLOCKED; 80039ce: 687b ldr r3, [r7, #4] 80039d0: 2200 movs r2, #0 80039d2: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Init the low level hardware : GPIO, CLOCK, NVIC... */ hspi->MspInitCallback(hspi); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_SPI_MspInit(hspi); 80039d6: 6878 ldr r0, [r7, #4] 80039d8: f7fd fea6 bl 8001728 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } hspi->State = HAL_SPI_STATE_BUSY; 80039dc: 687b ldr r3, [r7, #4] 80039de: 2202 movs r2, #2 80039e0: f883 2051 strb.w r2, [r3, #81] ; 0x51 /* Disable the selected SPI peripheral */ __HAL_SPI_DISABLE(hspi); 80039e4: 687b ldr r3, [r7, #4] 80039e6: 681b ldr r3, [r3, #0] 80039e8: 681a ldr r2, [r3, #0] 80039ea: 687b ldr r3, [r7, #4] 80039ec: 681b ldr r3, [r3, #0] 80039ee: f022 0240 bic.w r2, r2, #64 ; 0x40 80039f2: 601a str r2, [r3, #0] /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management, Communication speed, First bit and CRC calculation state */ WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) | 80039f4: 687b ldr r3, [r7, #4] 80039f6: 685b ldr r3, [r3, #4] 80039f8: f403 7282 and.w r2, r3, #260 ; 0x104 80039fc: 687b ldr r3, [r7, #4] 80039fe: 689b ldr r3, [r3, #8] 8003a00: f403 4304 and.w r3, r3, #33792 ; 0x8400 8003a04: 431a orrs r2, r3 8003a06: 687b ldr r3, [r7, #4] 8003a08: 68db ldr r3, [r3, #12] 8003a0a: f403 6300 and.w r3, r3, #2048 ; 0x800 8003a0e: 431a orrs r2, r3 8003a10: 687b ldr r3, [r7, #4] 8003a12: 691b ldr r3, [r3, #16] 8003a14: f003 0302 and.w r3, r3, #2 8003a18: 431a orrs r2, r3 8003a1a: 687b ldr r3, [r7, #4] 8003a1c: 695b ldr r3, [r3, #20] 8003a1e: f003 0301 and.w r3, r3, #1 8003a22: 431a orrs r2, r3 8003a24: 687b ldr r3, [r7, #4] 8003a26: 699b ldr r3, [r3, #24] 8003a28: f403 7300 and.w r3, r3, #512 ; 0x200 8003a2c: 431a orrs r2, r3 8003a2e: 687b ldr r3, [r7, #4] 8003a30: 69db ldr r3, [r3, #28] 8003a32: f003 0338 and.w r3, r3, #56 ; 0x38 8003a36: 431a orrs r2, r3 8003a38: 687b ldr r3, [r7, #4] 8003a3a: 6a1b ldr r3, [r3, #32] 8003a3c: f003 0380 and.w r3, r3, #128 ; 0x80 8003a40: ea42 0103 orr.w r1, r2, r3 8003a44: 687b ldr r3, [r7, #4] 8003a46: 6a9b ldr r3, [r3, #40] ; 0x28 8003a48: f403 5200 and.w r2, r3, #8192 ; 0x2000 8003a4c: 687b ldr r3, [r7, #4] 8003a4e: 681b ldr r3, [r3, #0] 8003a50: 430a orrs r2, r1 8003a52: 601a str r2, [r3, #0] (hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) | (hspi->Init.FirstBit & SPI_CR1_LSBFIRST) | (hspi->Init.CRCCalculation & SPI_CR1_CRCEN))); /* Configure : NSS management */ WRITE_REG(hspi->Instance->CR2, ((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE)); 8003a54: 687b ldr r3, [r7, #4] 8003a56: 699b ldr r3, [r3, #24] 8003a58: 0c1a lsrs r2, r3, #16 8003a5a: 687b ldr r3, [r7, #4] 8003a5c: 681b ldr r3, [r3, #0] 8003a5e: f002 0204 and.w r2, r2, #4 8003a62: 605a str r2, [r3, #4] } #endif /* USE_SPI_CRC */ #if defined(SPI_I2SCFGR_I2SMOD) /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); 8003a64: 687b ldr r3, [r7, #4] 8003a66: 681b ldr r3, [r3, #0] 8003a68: 69da ldr r2, [r3, #28] 8003a6a: 687b ldr r3, [r7, #4] 8003a6c: 681b ldr r3, [r3, #0] 8003a6e: f422 6200 bic.w r2, r2, #2048 ; 0x800 8003a72: 61da str r2, [r3, #28] #endif /* SPI_I2SCFGR_I2SMOD */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8003a74: 687b ldr r3, [r7, #4] 8003a76: 2200 movs r2, #0 8003a78: 655a str r2, [r3, #84] ; 0x54 hspi->State = HAL_SPI_STATE_READY; 8003a7a: 687b ldr r3, [r7, #4] 8003a7c: 2201 movs r2, #1 8003a7e: f883 2051 strb.w r2, [r3, #81] ; 0x51 return HAL_OK; 8003a82: 2300 movs r3, #0 } 8003a84: 4618 mov r0, r3 8003a86: 3708 adds r7, #8 8003a88: 46bd mov sp, r7 8003a8a: bd80 pop {r7, pc} 08003a8c : * @param Size amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8003a8c: b580 push {r7, lr} 8003a8e: b088 sub sp, #32 8003a90: af00 add r7, sp, #0 8003a92: 60f8 str r0, [r7, #12] 8003a94: 60b9 str r1, [r7, #8] 8003a96: 603b str r3, [r7, #0] 8003a98: 4613 mov r3, r2 8003a9a: 80fb strh r3, [r7, #6] uint32_t tickstart; HAL_StatusTypeDef errorcode = HAL_OK; 8003a9c: 2300 movs r3, #0 8003a9e: 77fb strb r3, [r7, #31] /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); /* Process Locked */ __HAL_LOCK(hspi); 8003aa0: 68fb ldr r3, [r7, #12] 8003aa2: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 8003aa6: 2b01 cmp r3, #1 8003aa8: d101 bne.n 8003aae 8003aaa: 2302 movs r3, #2 8003aac: e126 b.n 8003cfc 8003aae: 68fb ldr r3, [r7, #12] 8003ab0: 2201 movs r2, #1 8003ab2: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 8003ab6: f7fe f85f bl 8001b78 8003aba: 61b8 str r0, [r7, #24] initial_TxXferCount = Size; 8003abc: 88fb ldrh r3, [r7, #6] 8003abe: 82fb strh r3, [r7, #22] if (hspi->State != HAL_SPI_STATE_READY) 8003ac0: 68fb ldr r3, [r7, #12] 8003ac2: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 8003ac6: b2db uxtb r3, r3 8003ac8: 2b01 cmp r3, #1 8003aca: d002 beq.n 8003ad2 { errorcode = HAL_BUSY; 8003acc: 2302 movs r3, #2 8003ace: 77fb strb r3, [r7, #31] goto error; 8003ad0: e10b b.n 8003cea } if ((pData == NULL) || (Size == 0U)) 8003ad2: 68bb ldr r3, [r7, #8] 8003ad4: 2b00 cmp r3, #0 8003ad6: d002 beq.n 8003ade 8003ad8: 88fb ldrh r3, [r7, #6] 8003ada: 2b00 cmp r3, #0 8003adc: d102 bne.n 8003ae4 { errorcode = HAL_ERROR; 8003ade: 2301 movs r3, #1 8003ae0: 77fb strb r3, [r7, #31] goto error; 8003ae2: e102 b.n 8003cea } /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_TX; 8003ae4: 68fb ldr r3, [r7, #12] 8003ae6: 2203 movs r2, #3 8003ae8: f883 2051 strb.w r2, [r3, #81] ; 0x51 hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8003aec: 68fb ldr r3, [r7, #12] 8003aee: 2200 movs r2, #0 8003af0: 655a str r2, [r3, #84] ; 0x54 hspi->pTxBuffPtr = (uint8_t *)pData; 8003af2: 68fb ldr r3, [r7, #12] 8003af4: 68ba ldr r2, [r7, #8] 8003af6: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferSize = Size; 8003af8: 68fb ldr r3, [r7, #12] 8003afa: 88fa ldrh r2, [r7, #6] 8003afc: 869a strh r2, [r3, #52] ; 0x34 hspi->TxXferCount = Size; 8003afe: 68fb ldr r3, [r7, #12] 8003b00: 88fa ldrh r2, [r7, #6] 8003b02: 86da strh r2, [r3, #54] ; 0x36 /*Init field not used in handle to zero */ hspi->pRxBuffPtr = (uint8_t *)NULL; 8003b04: 68fb ldr r3, [r7, #12] 8003b06: 2200 movs r2, #0 8003b08: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferSize = 0U; 8003b0a: 68fb ldr r3, [r7, #12] 8003b0c: 2200 movs r2, #0 8003b0e: 879a strh r2, [r3, #60] ; 0x3c hspi->RxXferCount = 0U; 8003b10: 68fb ldr r3, [r7, #12] 8003b12: 2200 movs r2, #0 8003b14: 87da strh r2, [r3, #62] ; 0x3e hspi->TxISR = NULL; 8003b16: 68fb ldr r3, [r7, #12] 8003b18: 2200 movs r2, #0 8003b1a: 645a str r2, [r3, #68] ; 0x44 hspi->RxISR = NULL; 8003b1c: 68fb ldr r3, [r7, #12] 8003b1e: 2200 movs r2, #0 8003b20: 641a str r2, [r3, #64] ; 0x40 /* Configure communication direction : 1Line */ if (hspi->Init.Direction == SPI_DIRECTION_1LINE) 8003b22: 68fb ldr r3, [r7, #12] 8003b24: 689b ldr r3, [r3, #8] 8003b26: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 8003b2a: d10f bne.n 8003b4c { /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ __HAL_SPI_DISABLE(hspi); 8003b2c: 68fb ldr r3, [r7, #12] 8003b2e: 681b ldr r3, [r3, #0] 8003b30: 681a ldr r2, [r3, #0] 8003b32: 68fb ldr r3, [r7, #12] 8003b34: 681b ldr r3, [r3, #0] 8003b36: f022 0240 bic.w r2, r2, #64 ; 0x40 8003b3a: 601a str r2, [r3, #0] SPI_1LINE_TX(hspi); 8003b3c: 68fb ldr r3, [r7, #12] 8003b3e: 681b ldr r3, [r3, #0] 8003b40: 681a ldr r2, [r3, #0] 8003b42: 68fb ldr r3, [r7, #12] 8003b44: 681b ldr r3, [r3, #0] 8003b46: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8003b4a: 601a str r2, [r3, #0] SPI_RESET_CRC(hspi); } #endif /* USE_SPI_CRC */ /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) 8003b4c: 68fb ldr r3, [r7, #12] 8003b4e: 681b ldr r3, [r3, #0] 8003b50: 681b ldr r3, [r3, #0] 8003b52: f003 0340 and.w r3, r3, #64 ; 0x40 8003b56: 2b40 cmp r3, #64 ; 0x40 8003b58: d007 beq.n 8003b6a { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); 8003b5a: 68fb ldr r3, [r7, #12] 8003b5c: 681b ldr r3, [r3, #0] 8003b5e: 681a ldr r2, [r3, #0] 8003b60: 68fb ldr r3, [r7, #12] 8003b62: 681b ldr r3, [r3, #0] 8003b64: f042 0240 orr.w r2, r2, #64 ; 0x40 8003b68: 601a str r2, [r3, #0] } /* Transmit data in 16 Bit mode */ if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) 8003b6a: 68fb ldr r3, [r7, #12] 8003b6c: 68db ldr r3, [r3, #12] 8003b6e: f5b3 6f00 cmp.w r3, #2048 ; 0x800 8003b72: d14b bne.n 8003c0c { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) 8003b74: 68fb ldr r3, [r7, #12] 8003b76: 685b ldr r3, [r3, #4] 8003b78: 2b00 cmp r3, #0 8003b7a: d002 beq.n 8003b82 8003b7c: 8afb ldrh r3, [r7, #22] 8003b7e: 2b01 cmp r3, #1 8003b80: d13e bne.n 8003c00 { hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); 8003b82: 68fb ldr r3, [r7, #12] 8003b84: 6b1b ldr r3, [r3, #48] ; 0x30 8003b86: 881a ldrh r2, [r3, #0] 8003b88: 68fb ldr r3, [r7, #12] 8003b8a: 681b ldr r3, [r3, #0] 8003b8c: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 8003b8e: 68fb ldr r3, [r7, #12] 8003b90: 6b1b ldr r3, [r3, #48] ; 0x30 8003b92: 1c9a adds r2, r3, #2 8003b94: 68fb ldr r3, [r7, #12] 8003b96: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 8003b98: 68fb ldr r3, [r7, #12] 8003b9a: 8edb ldrh r3, [r3, #54] ; 0x36 8003b9c: b29b uxth r3, r3 8003b9e: 3b01 subs r3, #1 8003ba0: b29a uxth r2, r3 8003ba2: 68fb ldr r3, [r7, #12] 8003ba4: 86da strh r2, [r3, #54] ; 0x36 } /* Transmit data in 16 Bit mode */ while (hspi->TxXferCount > 0U) 8003ba6: e02b b.n 8003c00 { /* Wait until TXE flag is set to send data */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) 8003ba8: 68fb ldr r3, [r7, #12] 8003baa: 681b ldr r3, [r3, #0] 8003bac: 689b ldr r3, [r3, #8] 8003bae: f003 0302 and.w r3, r3, #2 8003bb2: 2b02 cmp r3, #2 8003bb4: d112 bne.n 8003bdc { hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); 8003bb6: 68fb ldr r3, [r7, #12] 8003bb8: 6b1b ldr r3, [r3, #48] ; 0x30 8003bba: 881a ldrh r2, [r3, #0] 8003bbc: 68fb ldr r3, [r7, #12] 8003bbe: 681b ldr r3, [r3, #0] 8003bc0: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 8003bc2: 68fb ldr r3, [r7, #12] 8003bc4: 6b1b ldr r3, [r3, #48] ; 0x30 8003bc6: 1c9a adds r2, r3, #2 8003bc8: 68fb ldr r3, [r7, #12] 8003bca: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 8003bcc: 68fb ldr r3, [r7, #12] 8003bce: 8edb ldrh r3, [r3, #54] ; 0x36 8003bd0: b29b uxth r3, r3 8003bd2: 3b01 subs r3, #1 8003bd4: b29a uxth r2, r3 8003bd6: 68fb ldr r3, [r7, #12] 8003bd8: 86da strh r2, [r3, #54] ; 0x36 8003bda: e011 b.n 8003c00 } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) 8003bdc: f7fd ffcc bl 8001b78 8003be0: 4602 mov r2, r0 8003be2: 69bb ldr r3, [r7, #24] 8003be4: 1ad3 subs r3, r2, r3 8003be6: 683a ldr r2, [r7, #0] 8003be8: 429a cmp r2, r3 8003bea: d803 bhi.n 8003bf4 8003bec: 683b ldr r3, [r7, #0] 8003bee: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8003bf2: d102 bne.n 8003bfa 8003bf4: 683b ldr r3, [r7, #0] 8003bf6: 2b00 cmp r3, #0 8003bf8: d102 bne.n 8003c00 { errorcode = HAL_TIMEOUT; 8003bfa: 2303 movs r3, #3 8003bfc: 77fb strb r3, [r7, #31] goto error; 8003bfe: e074 b.n 8003cea while (hspi->TxXferCount > 0U) 8003c00: 68fb ldr r3, [r7, #12] 8003c02: 8edb ldrh r3, [r3, #54] ; 0x36 8003c04: b29b uxth r3, r3 8003c06: 2b00 cmp r3, #0 8003c08: d1ce bne.n 8003ba8 8003c0a: e04c b.n 8003ca6 } } /* Transmit data in 8 Bit mode */ else { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) 8003c0c: 68fb ldr r3, [r7, #12] 8003c0e: 685b ldr r3, [r3, #4] 8003c10: 2b00 cmp r3, #0 8003c12: d002 beq.n 8003c1a 8003c14: 8afb ldrh r3, [r7, #22] 8003c16: 2b01 cmp r3, #1 8003c18: d140 bne.n 8003c9c { *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); 8003c1a: 68fb ldr r3, [r7, #12] 8003c1c: 6b1a ldr r2, [r3, #48] ; 0x30 8003c1e: 68fb ldr r3, [r7, #12] 8003c20: 681b ldr r3, [r3, #0] 8003c22: 330c adds r3, #12 8003c24: 7812 ldrb r2, [r2, #0] 8003c26: 701a strb r2, [r3, #0] hspi->pTxBuffPtr += sizeof(uint8_t); 8003c28: 68fb ldr r3, [r7, #12] 8003c2a: 6b1b ldr r3, [r3, #48] ; 0x30 8003c2c: 1c5a adds r2, r3, #1 8003c2e: 68fb ldr r3, [r7, #12] 8003c30: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 8003c32: 68fb ldr r3, [r7, #12] 8003c34: 8edb ldrh r3, [r3, #54] ; 0x36 8003c36: b29b uxth r3, r3 8003c38: 3b01 subs r3, #1 8003c3a: b29a uxth r2, r3 8003c3c: 68fb ldr r3, [r7, #12] 8003c3e: 86da strh r2, [r3, #54] ; 0x36 } while (hspi->TxXferCount > 0U) 8003c40: e02c b.n 8003c9c { /* Wait until TXE flag is set to send data */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) 8003c42: 68fb ldr r3, [r7, #12] 8003c44: 681b ldr r3, [r3, #0] 8003c46: 689b ldr r3, [r3, #8] 8003c48: f003 0302 and.w r3, r3, #2 8003c4c: 2b02 cmp r3, #2 8003c4e: d113 bne.n 8003c78 { *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); 8003c50: 68fb ldr r3, [r7, #12] 8003c52: 6b1a ldr r2, [r3, #48] ; 0x30 8003c54: 68fb ldr r3, [r7, #12] 8003c56: 681b ldr r3, [r3, #0] 8003c58: 330c adds r3, #12 8003c5a: 7812 ldrb r2, [r2, #0] 8003c5c: 701a strb r2, [r3, #0] hspi->pTxBuffPtr += sizeof(uint8_t); 8003c5e: 68fb ldr r3, [r7, #12] 8003c60: 6b1b ldr r3, [r3, #48] ; 0x30 8003c62: 1c5a adds r2, r3, #1 8003c64: 68fb ldr r3, [r7, #12] 8003c66: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 8003c68: 68fb ldr r3, [r7, #12] 8003c6a: 8edb ldrh r3, [r3, #54] ; 0x36 8003c6c: b29b uxth r3, r3 8003c6e: 3b01 subs r3, #1 8003c70: b29a uxth r2, r3 8003c72: 68fb ldr r3, [r7, #12] 8003c74: 86da strh r2, [r3, #54] ; 0x36 8003c76: e011 b.n 8003c9c } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) 8003c78: f7fd ff7e bl 8001b78 8003c7c: 4602 mov r2, r0 8003c7e: 69bb ldr r3, [r7, #24] 8003c80: 1ad3 subs r3, r2, r3 8003c82: 683a ldr r2, [r7, #0] 8003c84: 429a cmp r2, r3 8003c86: d803 bhi.n 8003c90 8003c88: 683b ldr r3, [r7, #0] 8003c8a: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8003c8e: d102 bne.n 8003c96 8003c90: 683b ldr r3, [r7, #0] 8003c92: 2b00 cmp r3, #0 8003c94: d102 bne.n 8003c9c { errorcode = HAL_TIMEOUT; 8003c96: 2303 movs r3, #3 8003c98: 77fb strb r3, [r7, #31] goto error; 8003c9a: e026 b.n 8003cea while (hspi->TxXferCount > 0U) 8003c9c: 68fb ldr r3, [r7, #12] 8003c9e: 8edb ldrh r3, [r3, #54] ; 0x36 8003ca0: b29b uxth r3, r3 8003ca2: 2b00 cmp r3, #0 8003ca4: d1cd bne.n 8003c42 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) 8003ca6: 69ba ldr r2, [r7, #24] 8003ca8: 6839 ldr r1, [r7, #0] 8003caa: 68f8 ldr r0, [r7, #12] 8003cac: f000 fbb8 bl 8004420 8003cb0: 4603 mov r3, r0 8003cb2: 2b00 cmp r3, #0 8003cb4: d002 beq.n 8003cbc { hspi->ErrorCode = HAL_SPI_ERROR_FLAG; 8003cb6: 68fb ldr r3, [r7, #12] 8003cb8: 2220 movs r2, #32 8003cba: 655a str r2, [r3, #84] ; 0x54 } /* Clear overrun flag in 2 Lines communication mode because received is not read */ if (hspi->Init.Direction == SPI_DIRECTION_2LINES) 8003cbc: 68fb ldr r3, [r7, #12] 8003cbe: 689b ldr r3, [r3, #8] 8003cc0: 2b00 cmp r3, #0 8003cc2: d10a bne.n 8003cda { __HAL_SPI_CLEAR_OVRFLAG(hspi); 8003cc4: 2300 movs r3, #0 8003cc6: 613b str r3, [r7, #16] 8003cc8: 68fb ldr r3, [r7, #12] 8003cca: 681b ldr r3, [r3, #0] 8003ccc: 68db ldr r3, [r3, #12] 8003cce: 613b str r3, [r7, #16] 8003cd0: 68fb ldr r3, [r7, #12] 8003cd2: 681b ldr r3, [r3, #0] 8003cd4: 689b ldr r3, [r3, #8] 8003cd6: 613b str r3, [r7, #16] 8003cd8: 693b ldr r3, [r7, #16] } if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) 8003cda: 68fb ldr r3, [r7, #12] 8003cdc: 6d5b ldr r3, [r3, #84] ; 0x54 8003cde: 2b00 cmp r3, #0 8003ce0: d002 beq.n 8003ce8 { errorcode = HAL_ERROR; 8003ce2: 2301 movs r3, #1 8003ce4: 77fb strb r3, [r7, #31] 8003ce6: e000 b.n 8003cea } error: 8003ce8: bf00 nop hspi->State = HAL_SPI_STATE_READY; 8003cea: 68fb ldr r3, [r7, #12] 8003cec: 2201 movs r2, #1 8003cee: f883 2051 strb.w r2, [r3, #81] ; 0x51 /* Process Unlocked */ __HAL_UNLOCK(hspi); 8003cf2: 68fb ldr r3, [r7, #12] 8003cf4: 2200 movs r2, #0 8003cf6: f883 2050 strb.w r2, [r3, #80] ; 0x50 return errorcode; 8003cfa: 7ffb ldrb r3, [r7, #31] } 8003cfc: 4618 mov r0, r3 8003cfe: 3720 adds r7, #32 8003d00: 46bd mov sp, r7 8003d02: bd80 pop {r7, pc} 08003d04 : * @param Size amount of data to be received * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8003d04: b580 push {r7, lr} 8003d06: b088 sub sp, #32 8003d08: af02 add r7, sp, #8 8003d0a: 60f8 str r0, [r7, #12] 8003d0c: 60b9 str r1, [r7, #8] 8003d0e: 603b str r3, [r7, #0] 8003d10: 4613 mov r3, r2 8003d12: 80fb strh r3, [r7, #6] #if (USE_SPI_CRC != 0U) __IO uint32_t tmpreg = 0U; #endif /* USE_SPI_CRC */ uint32_t tickstart; HAL_StatusTypeDef errorcode = HAL_OK; 8003d14: 2300 movs r3, #0 8003d16: 75fb strb r3, [r7, #23] if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES)) 8003d18: 68fb ldr r3, [r7, #12] 8003d1a: 685b ldr r3, [r3, #4] 8003d1c: f5b3 7f82 cmp.w r3, #260 ; 0x104 8003d20: d112 bne.n 8003d48 8003d22: 68fb ldr r3, [r7, #12] 8003d24: 689b ldr r3, [r3, #8] 8003d26: 2b00 cmp r3, #0 8003d28: d10e bne.n 8003d48 { hspi->State = HAL_SPI_STATE_BUSY_RX; 8003d2a: 68fb ldr r3, [r7, #12] 8003d2c: 2204 movs r2, #4 8003d2e: f883 2051 strb.w r2, [r3, #81] ; 0x51 /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */ return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout); 8003d32: 88fa ldrh r2, [r7, #6] 8003d34: 683b ldr r3, [r7, #0] 8003d36: 9300 str r3, [sp, #0] 8003d38: 4613 mov r3, r2 8003d3a: 68ba ldr r2, [r7, #8] 8003d3c: 68b9 ldr r1, [r7, #8] 8003d3e: 68f8 ldr r0, [r7, #12] 8003d40: f000 f8f1 bl 8003f26 8003d44: 4603 mov r3, r0 8003d46: e0ea b.n 8003f1e } /* Process Locked */ __HAL_LOCK(hspi); 8003d48: 68fb ldr r3, [r7, #12] 8003d4a: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 8003d4e: 2b01 cmp r3, #1 8003d50: d101 bne.n 8003d56 8003d52: 2302 movs r3, #2 8003d54: e0e3 b.n 8003f1e 8003d56: 68fb ldr r3, [r7, #12] 8003d58: 2201 movs r2, #1 8003d5a: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 8003d5e: f7fd ff0b bl 8001b78 8003d62: 6138 str r0, [r7, #16] if (hspi->State != HAL_SPI_STATE_READY) 8003d64: 68fb ldr r3, [r7, #12] 8003d66: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 8003d6a: b2db uxtb r3, r3 8003d6c: 2b01 cmp r3, #1 8003d6e: d002 beq.n 8003d76 { errorcode = HAL_BUSY; 8003d70: 2302 movs r3, #2 8003d72: 75fb strb r3, [r7, #23] goto error; 8003d74: e0ca b.n 8003f0c } if ((pData == NULL) || (Size == 0U)) 8003d76: 68bb ldr r3, [r7, #8] 8003d78: 2b00 cmp r3, #0 8003d7a: d002 beq.n 8003d82 8003d7c: 88fb ldrh r3, [r7, #6] 8003d7e: 2b00 cmp r3, #0 8003d80: d102 bne.n 8003d88 { errorcode = HAL_ERROR; 8003d82: 2301 movs r3, #1 8003d84: 75fb strb r3, [r7, #23] goto error; 8003d86: e0c1 b.n 8003f0c } /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_RX; 8003d88: 68fb ldr r3, [r7, #12] 8003d8a: 2204 movs r2, #4 8003d8c: f883 2051 strb.w r2, [r3, #81] ; 0x51 hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8003d90: 68fb ldr r3, [r7, #12] 8003d92: 2200 movs r2, #0 8003d94: 655a str r2, [r3, #84] ; 0x54 hspi->pRxBuffPtr = (uint8_t *)pData; 8003d96: 68fb ldr r3, [r7, #12] 8003d98: 68ba ldr r2, [r7, #8] 8003d9a: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferSize = Size; 8003d9c: 68fb ldr r3, [r7, #12] 8003d9e: 88fa ldrh r2, [r7, #6] 8003da0: 879a strh r2, [r3, #60] ; 0x3c hspi->RxXferCount = Size; 8003da2: 68fb ldr r3, [r7, #12] 8003da4: 88fa ldrh r2, [r7, #6] 8003da6: 87da strh r2, [r3, #62] ; 0x3e /*Init field not used in handle to zero */ hspi->pTxBuffPtr = (uint8_t *)NULL; 8003da8: 68fb ldr r3, [r7, #12] 8003daa: 2200 movs r2, #0 8003dac: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferSize = 0U; 8003dae: 68fb ldr r3, [r7, #12] 8003db0: 2200 movs r2, #0 8003db2: 869a strh r2, [r3, #52] ; 0x34 hspi->TxXferCount = 0U; 8003db4: 68fb ldr r3, [r7, #12] 8003db6: 2200 movs r2, #0 8003db8: 86da strh r2, [r3, #54] ; 0x36 hspi->RxISR = NULL; 8003dba: 68fb ldr r3, [r7, #12] 8003dbc: 2200 movs r2, #0 8003dbe: 641a str r2, [r3, #64] ; 0x40 hspi->TxISR = NULL; 8003dc0: 68fb ldr r3, [r7, #12] 8003dc2: 2200 movs r2, #0 8003dc4: 645a str r2, [r3, #68] ; 0x44 hspi->RxXferCount--; } #endif /* USE_SPI_CRC */ /* Configure communication direction: 1Line */ if (hspi->Init.Direction == SPI_DIRECTION_1LINE) 8003dc6: 68fb ldr r3, [r7, #12] 8003dc8: 689b ldr r3, [r3, #8] 8003dca: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 8003dce: d10f bne.n 8003df0 { /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ __HAL_SPI_DISABLE(hspi); 8003dd0: 68fb ldr r3, [r7, #12] 8003dd2: 681b ldr r3, [r3, #0] 8003dd4: 681a ldr r2, [r3, #0] 8003dd6: 68fb ldr r3, [r7, #12] 8003dd8: 681b ldr r3, [r3, #0] 8003dda: f022 0240 bic.w r2, r2, #64 ; 0x40 8003dde: 601a str r2, [r3, #0] SPI_1LINE_RX(hspi); 8003de0: 68fb ldr r3, [r7, #12] 8003de2: 681b ldr r3, [r3, #0] 8003de4: 681a ldr r2, [r3, #0] 8003de6: 68fb ldr r3, [r7, #12] 8003de8: 681b ldr r3, [r3, #0] 8003dea: f422 4280 bic.w r2, r2, #16384 ; 0x4000 8003dee: 601a str r2, [r3, #0] } /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) 8003df0: 68fb ldr r3, [r7, #12] 8003df2: 681b ldr r3, [r3, #0] 8003df4: 681b ldr r3, [r3, #0] 8003df6: f003 0340 and.w r3, r3, #64 ; 0x40 8003dfa: 2b40 cmp r3, #64 ; 0x40 8003dfc: d007 beq.n 8003e0e { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); 8003dfe: 68fb ldr r3, [r7, #12] 8003e00: 681b ldr r3, [r3, #0] 8003e02: 681a ldr r2, [r3, #0] 8003e04: 68fb ldr r3, [r7, #12] 8003e06: 681b ldr r3, [r3, #0] 8003e08: f042 0240 orr.w r2, r2, #64 ; 0x40 8003e0c: 601a str r2, [r3, #0] } /* Receive data in 8 Bit mode */ if (hspi->Init.DataSize == SPI_DATASIZE_8BIT) 8003e0e: 68fb ldr r3, [r7, #12] 8003e10: 68db ldr r3, [r3, #12] 8003e12: 2b00 cmp r3, #0 8003e14: d162 bne.n 8003edc { /* Transfer loop */ while (hspi->RxXferCount > 0U) 8003e16: e02e b.n 8003e76 { /* Check the RXNE flag */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) 8003e18: 68fb ldr r3, [r7, #12] 8003e1a: 681b ldr r3, [r3, #0] 8003e1c: 689b ldr r3, [r3, #8] 8003e1e: f003 0301 and.w r3, r3, #1 8003e22: 2b01 cmp r3, #1 8003e24: d115 bne.n 8003e52 { /* read the received data */ (* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; 8003e26: 68fb ldr r3, [r7, #12] 8003e28: 681b ldr r3, [r3, #0] 8003e2a: f103 020c add.w r2, r3, #12 8003e2e: 68fb ldr r3, [r7, #12] 8003e30: 6b9b ldr r3, [r3, #56] ; 0x38 8003e32: 7812 ldrb r2, [r2, #0] 8003e34: b2d2 uxtb r2, r2 8003e36: 701a strb r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint8_t); 8003e38: 68fb ldr r3, [r7, #12] 8003e3a: 6b9b ldr r3, [r3, #56] ; 0x38 8003e3c: 1c5a adds r2, r3, #1 8003e3e: 68fb ldr r3, [r7, #12] 8003e40: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount--; 8003e42: 68fb ldr r3, [r7, #12] 8003e44: 8fdb ldrh r3, [r3, #62] ; 0x3e 8003e46: b29b uxth r3, r3 8003e48: 3b01 subs r3, #1 8003e4a: b29a uxth r2, r3 8003e4c: 68fb ldr r3, [r7, #12] 8003e4e: 87da strh r2, [r3, #62] ; 0x3e 8003e50: e011 b.n 8003e76 } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) 8003e52: f7fd fe91 bl 8001b78 8003e56: 4602 mov r2, r0 8003e58: 693b ldr r3, [r7, #16] 8003e5a: 1ad3 subs r3, r2, r3 8003e5c: 683a ldr r2, [r7, #0] 8003e5e: 429a cmp r2, r3 8003e60: d803 bhi.n 8003e6a 8003e62: 683b ldr r3, [r7, #0] 8003e64: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8003e68: d102 bne.n 8003e70 8003e6a: 683b ldr r3, [r7, #0] 8003e6c: 2b00 cmp r3, #0 8003e6e: d102 bne.n 8003e76 { errorcode = HAL_TIMEOUT; 8003e70: 2303 movs r3, #3 8003e72: 75fb strb r3, [r7, #23] goto error; 8003e74: e04a b.n 8003f0c while (hspi->RxXferCount > 0U) 8003e76: 68fb ldr r3, [r7, #12] 8003e78: 8fdb ldrh r3, [r3, #62] ; 0x3e 8003e7a: b29b uxth r3, r3 8003e7c: 2b00 cmp r3, #0 8003e7e: d1cb bne.n 8003e18 8003e80: e031 b.n 8003ee6 { /* Transfer loop */ while (hspi->RxXferCount > 0U) { /* Check the RXNE flag */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) 8003e82: 68fb ldr r3, [r7, #12] 8003e84: 681b ldr r3, [r3, #0] 8003e86: 689b ldr r3, [r3, #8] 8003e88: f003 0301 and.w r3, r3, #1 8003e8c: 2b01 cmp r3, #1 8003e8e: d113 bne.n 8003eb8 { *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; 8003e90: 68fb ldr r3, [r7, #12] 8003e92: 681b ldr r3, [r3, #0] 8003e94: 68da ldr r2, [r3, #12] 8003e96: 68fb ldr r3, [r7, #12] 8003e98: 6b9b ldr r3, [r3, #56] ; 0x38 8003e9a: b292 uxth r2, r2 8003e9c: 801a strh r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint16_t); 8003e9e: 68fb ldr r3, [r7, #12] 8003ea0: 6b9b ldr r3, [r3, #56] ; 0x38 8003ea2: 1c9a adds r2, r3, #2 8003ea4: 68fb ldr r3, [r7, #12] 8003ea6: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount--; 8003ea8: 68fb ldr r3, [r7, #12] 8003eaa: 8fdb ldrh r3, [r3, #62] ; 0x3e 8003eac: b29b uxth r3, r3 8003eae: 3b01 subs r3, #1 8003eb0: b29a uxth r2, r3 8003eb2: 68fb ldr r3, [r7, #12] 8003eb4: 87da strh r2, [r3, #62] ; 0x3e 8003eb6: e011 b.n 8003edc } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) 8003eb8: f7fd fe5e bl 8001b78 8003ebc: 4602 mov r2, r0 8003ebe: 693b ldr r3, [r7, #16] 8003ec0: 1ad3 subs r3, r2, r3 8003ec2: 683a ldr r2, [r7, #0] 8003ec4: 429a cmp r2, r3 8003ec6: d803 bhi.n 8003ed0 8003ec8: 683b ldr r3, [r7, #0] 8003eca: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8003ece: d102 bne.n 8003ed6 8003ed0: 683b ldr r3, [r7, #0] 8003ed2: 2b00 cmp r3, #0 8003ed4: d102 bne.n 8003edc { errorcode = HAL_TIMEOUT; 8003ed6: 2303 movs r3, #3 8003ed8: 75fb strb r3, [r7, #23] goto error; 8003eda: e017 b.n 8003f0c while (hspi->RxXferCount > 0U) 8003edc: 68fb ldr r3, [r7, #12] 8003ede: 8fdb ldrh r3, [r3, #62] ; 0x3e 8003ee0: b29b uxth r3, r3 8003ee2: 2b00 cmp r3, #0 8003ee4: d1cd bne.n 8003e82 UNUSED(tmpreg); } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK) 8003ee6: 693a ldr r2, [r7, #16] 8003ee8: 6839 ldr r1, [r7, #0] 8003eea: 68f8 ldr r0, [r7, #12] 8003eec: f000 fa46 bl 800437c 8003ef0: 4603 mov r3, r0 8003ef2: 2b00 cmp r3, #0 8003ef4: d002 beq.n 8003efc { hspi->ErrorCode = HAL_SPI_ERROR_FLAG; 8003ef6: 68fb ldr r3, [r7, #12] 8003ef8: 2220 movs r2, #32 8003efa: 655a str r2, [r3, #84] ; 0x54 __HAL_SPI_CLEAR_CRCERRFLAG(hspi); } } #endif /* USE_SPI_CRC */ if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) 8003efc: 68fb ldr r3, [r7, #12] 8003efe: 6d5b ldr r3, [r3, #84] ; 0x54 8003f00: 2b00 cmp r3, #0 8003f02: d002 beq.n 8003f0a { errorcode = HAL_ERROR; 8003f04: 2301 movs r3, #1 8003f06: 75fb strb r3, [r7, #23] 8003f08: e000 b.n 8003f0c } error : 8003f0a: bf00 nop hspi->State = HAL_SPI_STATE_READY; 8003f0c: 68fb ldr r3, [r7, #12] 8003f0e: 2201 movs r2, #1 8003f10: f883 2051 strb.w r2, [r3, #81] ; 0x51 __HAL_UNLOCK(hspi); 8003f14: 68fb ldr r3, [r7, #12] 8003f16: 2200 movs r2, #0 8003f18: f883 2050 strb.w r2, [r3, #80] ; 0x50 return errorcode; 8003f1c: 7dfb ldrb r3, [r7, #23] } 8003f1e: 4618 mov r0, r3 8003f20: 3718 adds r7, #24 8003f22: 46bd mov sp, r7 8003f24: bd80 pop {r7, pc} 08003f26 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout) { 8003f26: b580 push {r7, lr} 8003f28: b08c sub sp, #48 ; 0x30 8003f2a: af00 add r7, sp, #0 8003f2c: 60f8 str r0, [r7, #12] 8003f2e: 60b9 str r1, [r7, #8] 8003f30: 607a str r2, [r7, #4] 8003f32: 807b strh r3, [r7, #2] #if (USE_SPI_CRC != 0U) __IO uint32_t tmpreg = 0U; #endif /* USE_SPI_CRC */ /* Variable used to alternate Rx and Tx during transfer */ uint32_t txallowed = 1U; 8003f34: 2301 movs r3, #1 8003f36: 62fb str r3, [r7, #44] ; 0x2c HAL_StatusTypeDef errorcode = HAL_OK; 8003f38: 2300 movs r3, #0 8003f3a: f887 302b strb.w r3, [r7, #43] ; 0x2b /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); /* Process Locked */ __HAL_LOCK(hspi); 8003f3e: 68fb ldr r3, [r7, #12] 8003f40: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 8003f44: 2b01 cmp r3, #1 8003f46: d101 bne.n 8003f4c 8003f48: 2302 movs r3, #2 8003f4a: e18a b.n 8004262 8003f4c: 68fb ldr r3, [r7, #12] 8003f4e: 2201 movs r2, #1 8003f50: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 8003f54: f7fd fe10 bl 8001b78 8003f58: 6278 str r0, [r7, #36] ; 0x24 /* Init temporary variables */ tmp_state = hspi->State; 8003f5a: 68fb ldr r3, [r7, #12] 8003f5c: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 8003f60: f887 3023 strb.w r3, [r7, #35] ; 0x23 tmp_mode = hspi->Init.Mode; 8003f64: 68fb ldr r3, [r7, #12] 8003f66: 685b ldr r3, [r3, #4] 8003f68: 61fb str r3, [r7, #28] initial_TxXferCount = Size; 8003f6a: 887b ldrh r3, [r7, #2] 8003f6c: 837b strh r3, [r7, #26] if (!((tmp_state == HAL_SPI_STATE_READY) || \ 8003f6e: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 8003f72: 2b01 cmp r3, #1 8003f74: d00f beq.n 8003f96 8003f76: 69fb ldr r3, [r7, #28] 8003f78: f5b3 7f82 cmp.w r3, #260 ; 0x104 8003f7c: d107 bne.n 8003f8e ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) 8003f7e: 68fb ldr r3, [r7, #12] 8003f80: 689b ldr r3, [r3, #8] 8003f82: 2b00 cmp r3, #0 8003f84: d103 bne.n 8003f8e 8003f86: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 8003f8a: 2b04 cmp r3, #4 8003f8c: d003 beq.n 8003f96 { errorcode = HAL_BUSY; 8003f8e: 2302 movs r3, #2 8003f90: f887 302b strb.w r3, [r7, #43] ; 0x2b goto error; 8003f94: e15b b.n 800424e } if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) 8003f96: 68bb ldr r3, [r7, #8] 8003f98: 2b00 cmp r3, #0 8003f9a: d005 beq.n 8003fa8 8003f9c: 687b ldr r3, [r7, #4] 8003f9e: 2b00 cmp r3, #0 8003fa0: d002 beq.n 8003fa8 8003fa2: 887b ldrh r3, [r7, #2] 8003fa4: 2b00 cmp r3, #0 8003fa6: d103 bne.n 8003fb0 { errorcode = HAL_ERROR; 8003fa8: 2301 movs r3, #1 8003faa: f887 302b strb.w r3, [r7, #43] ; 0x2b goto error; 8003fae: e14e b.n 800424e } /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ if (hspi->State != HAL_SPI_STATE_BUSY_RX) 8003fb0: 68fb ldr r3, [r7, #12] 8003fb2: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 8003fb6: b2db uxtb r3, r3 8003fb8: 2b04 cmp r3, #4 8003fba: d003 beq.n 8003fc4 { hspi->State = HAL_SPI_STATE_BUSY_TX_RX; 8003fbc: 68fb ldr r3, [r7, #12] 8003fbe: 2205 movs r2, #5 8003fc0: f883 2051 strb.w r2, [r3, #81] ; 0x51 } /* Set the transaction information */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8003fc4: 68fb ldr r3, [r7, #12] 8003fc6: 2200 movs r2, #0 8003fc8: 655a str r2, [r3, #84] ; 0x54 hspi->pRxBuffPtr = (uint8_t *)pRxData; 8003fca: 68fb ldr r3, [r7, #12] 8003fcc: 687a ldr r2, [r7, #4] 8003fce: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount = Size; 8003fd0: 68fb ldr r3, [r7, #12] 8003fd2: 887a ldrh r2, [r7, #2] 8003fd4: 87da strh r2, [r3, #62] ; 0x3e hspi->RxXferSize = Size; 8003fd6: 68fb ldr r3, [r7, #12] 8003fd8: 887a ldrh r2, [r7, #2] 8003fda: 879a strh r2, [r3, #60] ; 0x3c hspi->pTxBuffPtr = (uint8_t *)pTxData; 8003fdc: 68fb ldr r3, [r7, #12] 8003fde: 68ba ldr r2, [r7, #8] 8003fe0: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount = Size; 8003fe2: 68fb ldr r3, [r7, #12] 8003fe4: 887a ldrh r2, [r7, #2] 8003fe6: 86da strh r2, [r3, #54] ; 0x36 hspi->TxXferSize = Size; 8003fe8: 68fb ldr r3, [r7, #12] 8003fea: 887a ldrh r2, [r7, #2] 8003fec: 869a strh r2, [r3, #52] ; 0x34 /*Init field not used in handle to zero */ hspi->RxISR = NULL; 8003fee: 68fb ldr r3, [r7, #12] 8003ff0: 2200 movs r2, #0 8003ff2: 641a str r2, [r3, #64] ; 0x40 hspi->TxISR = NULL; 8003ff4: 68fb ldr r3, [r7, #12] 8003ff6: 2200 movs r2, #0 8003ff8: 645a str r2, [r3, #68] ; 0x44 SPI_RESET_CRC(hspi); } #endif /* USE_SPI_CRC */ /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) 8003ffa: 68fb ldr r3, [r7, #12] 8003ffc: 681b ldr r3, [r3, #0] 8003ffe: 681b ldr r3, [r3, #0] 8004000: f003 0340 and.w r3, r3, #64 ; 0x40 8004004: 2b40 cmp r3, #64 ; 0x40 8004006: d007 beq.n 8004018 { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); 8004008: 68fb ldr r3, [r7, #12] 800400a: 681b ldr r3, [r3, #0] 800400c: 681a ldr r2, [r3, #0] 800400e: 68fb ldr r3, [r7, #12] 8004010: 681b ldr r3, [r3, #0] 8004012: f042 0240 orr.w r2, r2, #64 ; 0x40 8004016: 601a str r2, [r3, #0] } /* Transmit and Receive data in 16 Bit mode */ if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) 8004018: 68fb ldr r3, [r7, #12] 800401a: 68db ldr r3, [r3, #12] 800401c: f5b3 6f00 cmp.w r3, #2048 ; 0x800 8004020: d178 bne.n 8004114 { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) 8004022: 68fb ldr r3, [r7, #12] 8004024: 685b ldr r3, [r3, #4] 8004026: 2b00 cmp r3, #0 8004028: d002 beq.n 8004030 800402a: 8b7b ldrh r3, [r7, #26] 800402c: 2b01 cmp r3, #1 800402e: d166 bne.n 80040fe { hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); 8004030: 68fb ldr r3, [r7, #12] 8004032: 6b1b ldr r3, [r3, #48] ; 0x30 8004034: 881a ldrh r2, [r3, #0] 8004036: 68fb ldr r3, [r7, #12] 8004038: 681b ldr r3, [r3, #0] 800403a: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 800403c: 68fb ldr r3, [r7, #12] 800403e: 6b1b ldr r3, [r3, #48] ; 0x30 8004040: 1c9a adds r2, r3, #2 8004042: 68fb ldr r3, [r7, #12] 8004044: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 8004046: 68fb ldr r3, [r7, #12] 8004048: 8edb ldrh r3, [r3, #54] ; 0x36 800404a: b29b uxth r3, r3 800404c: 3b01 subs r3, #1 800404e: b29a uxth r2, r3 8004050: 68fb ldr r3, [r7, #12] 8004052: 86da strh r2, [r3, #54] ; 0x36 } while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) 8004054: e053 b.n 80040fe { /* Check TXE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) 8004056: 68fb ldr r3, [r7, #12] 8004058: 681b ldr r3, [r3, #0] 800405a: 689b ldr r3, [r3, #8] 800405c: f003 0302 and.w r3, r3, #2 8004060: 2b02 cmp r3, #2 8004062: d11b bne.n 800409c 8004064: 68fb ldr r3, [r7, #12] 8004066: 8edb ldrh r3, [r3, #54] ; 0x36 8004068: b29b uxth r3, r3 800406a: 2b00 cmp r3, #0 800406c: d016 beq.n 800409c 800406e: 6afb ldr r3, [r7, #44] ; 0x2c 8004070: 2b01 cmp r3, #1 8004072: d113 bne.n 800409c { hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); 8004074: 68fb ldr r3, [r7, #12] 8004076: 6b1b ldr r3, [r3, #48] ; 0x30 8004078: 881a ldrh r2, [r3, #0] 800407a: 68fb ldr r3, [r7, #12] 800407c: 681b ldr r3, [r3, #0] 800407e: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 8004080: 68fb ldr r3, [r7, #12] 8004082: 6b1b ldr r3, [r3, #48] ; 0x30 8004084: 1c9a adds r2, r3, #2 8004086: 68fb ldr r3, [r7, #12] 8004088: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 800408a: 68fb ldr r3, [r7, #12] 800408c: 8edb ldrh r3, [r3, #54] ; 0x36 800408e: b29b uxth r3, r3 8004090: 3b01 subs r3, #1 8004092: b29a uxth r2, r3 8004094: 68fb ldr r3, [r7, #12] 8004096: 86da strh r2, [r3, #54] ; 0x36 /* Next Data is a reception (Rx). Tx not allowed */ txallowed = 0U; 8004098: 2300 movs r3, #0 800409a: 62fb str r3, [r7, #44] ; 0x2c } #endif /* USE_SPI_CRC */ } /* Check RXNE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) 800409c: 68fb ldr r3, [r7, #12] 800409e: 681b ldr r3, [r3, #0] 80040a0: 689b ldr r3, [r3, #8] 80040a2: f003 0301 and.w r3, r3, #1 80040a6: 2b01 cmp r3, #1 80040a8: d119 bne.n 80040de 80040aa: 68fb ldr r3, [r7, #12] 80040ac: 8fdb ldrh r3, [r3, #62] ; 0x3e 80040ae: b29b uxth r3, r3 80040b0: 2b00 cmp r3, #0 80040b2: d014 beq.n 80040de { *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; 80040b4: 68fb ldr r3, [r7, #12] 80040b6: 681b ldr r3, [r3, #0] 80040b8: 68da ldr r2, [r3, #12] 80040ba: 68fb ldr r3, [r7, #12] 80040bc: 6b9b ldr r3, [r3, #56] ; 0x38 80040be: b292 uxth r2, r2 80040c0: 801a strh r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint16_t); 80040c2: 68fb ldr r3, [r7, #12] 80040c4: 6b9b ldr r3, [r3, #56] ; 0x38 80040c6: 1c9a adds r2, r3, #2 80040c8: 68fb ldr r3, [r7, #12] 80040ca: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount--; 80040cc: 68fb ldr r3, [r7, #12] 80040ce: 8fdb ldrh r3, [r3, #62] ; 0x3e 80040d0: b29b uxth r3, r3 80040d2: 3b01 subs r3, #1 80040d4: b29a uxth r2, r3 80040d6: 68fb ldr r3, [r7, #12] 80040d8: 87da strh r2, [r3, #62] ; 0x3e /* Next Data is a Transmission (Tx). Tx is allowed */ txallowed = 1U; 80040da: 2301 movs r3, #1 80040dc: 62fb str r3, [r7, #44] ; 0x2c } if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) 80040de: f7fd fd4b bl 8001b78 80040e2: 4602 mov r2, r0 80040e4: 6a7b ldr r3, [r7, #36] ; 0x24 80040e6: 1ad3 subs r3, r2, r3 80040e8: 6bba ldr r2, [r7, #56] ; 0x38 80040ea: 429a cmp r2, r3 80040ec: d807 bhi.n 80040fe 80040ee: 6bbb ldr r3, [r7, #56] ; 0x38 80040f0: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 80040f4: d003 beq.n 80040fe { errorcode = HAL_TIMEOUT; 80040f6: 2303 movs r3, #3 80040f8: f887 302b strb.w r3, [r7, #43] ; 0x2b goto error; 80040fc: e0a7 b.n 800424e while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) 80040fe: 68fb ldr r3, [r7, #12] 8004100: 8edb ldrh r3, [r3, #54] ; 0x36 8004102: b29b uxth r3, r3 8004104: 2b00 cmp r3, #0 8004106: d1a6 bne.n 8004056 8004108: 68fb ldr r3, [r7, #12] 800410a: 8fdb ldrh r3, [r3, #62] ; 0x3e 800410c: b29b uxth r3, r3 800410e: 2b00 cmp r3, #0 8004110: d1a1 bne.n 8004056 8004112: e07c b.n 800420e } } /* Transmit and Receive data in 8 Bit mode */ else { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) 8004114: 68fb ldr r3, [r7, #12] 8004116: 685b ldr r3, [r3, #4] 8004118: 2b00 cmp r3, #0 800411a: d002 beq.n 8004122 800411c: 8b7b ldrh r3, [r7, #26] 800411e: 2b01 cmp r3, #1 8004120: d16b bne.n 80041fa { *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); 8004122: 68fb ldr r3, [r7, #12] 8004124: 6b1a ldr r2, [r3, #48] ; 0x30 8004126: 68fb ldr r3, [r7, #12] 8004128: 681b ldr r3, [r3, #0] 800412a: 330c adds r3, #12 800412c: 7812 ldrb r2, [r2, #0] 800412e: 701a strb r2, [r3, #0] hspi->pTxBuffPtr += sizeof(uint8_t); 8004130: 68fb ldr r3, [r7, #12] 8004132: 6b1b ldr r3, [r3, #48] ; 0x30 8004134: 1c5a adds r2, r3, #1 8004136: 68fb ldr r3, [r7, #12] 8004138: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 800413a: 68fb ldr r3, [r7, #12] 800413c: 8edb ldrh r3, [r3, #54] ; 0x36 800413e: b29b uxth r3, r3 8004140: 3b01 subs r3, #1 8004142: b29a uxth r2, r3 8004144: 68fb ldr r3, [r7, #12] 8004146: 86da strh r2, [r3, #54] ; 0x36 } while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) 8004148: e057 b.n 80041fa { /* Check TXE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) 800414a: 68fb ldr r3, [r7, #12] 800414c: 681b ldr r3, [r3, #0] 800414e: 689b ldr r3, [r3, #8] 8004150: f003 0302 and.w r3, r3, #2 8004154: 2b02 cmp r3, #2 8004156: d11c bne.n 8004192 8004158: 68fb ldr r3, [r7, #12] 800415a: 8edb ldrh r3, [r3, #54] ; 0x36 800415c: b29b uxth r3, r3 800415e: 2b00 cmp r3, #0 8004160: d017 beq.n 8004192 8004162: 6afb ldr r3, [r7, #44] ; 0x2c 8004164: 2b01 cmp r3, #1 8004166: d114 bne.n 8004192 { *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); 8004168: 68fb ldr r3, [r7, #12] 800416a: 6b1a ldr r2, [r3, #48] ; 0x30 800416c: 68fb ldr r3, [r7, #12] 800416e: 681b ldr r3, [r3, #0] 8004170: 330c adds r3, #12 8004172: 7812 ldrb r2, [r2, #0] 8004174: 701a strb r2, [r3, #0] hspi->pTxBuffPtr++; 8004176: 68fb ldr r3, [r7, #12] 8004178: 6b1b ldr r3, [r3, #48] ; 0x30 800417a: 1c5a adds r2, r3, #1 800417c: 68fb ldr r3, [r7, #12] 800417e: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 8004180: 68fb ldr r3, [r7, #12] 8004182: 8edb ldrh r3, [r3, #54] ; 0x36 8004184: b29b uxth r3, r3 8004186: 3b01 subs r3, #1 8004188: b29a uxth r2, r3 800418a: 68fb ldr r3, [r7, #12] 800418c: 86da strh r2, [r3, #54] ; 0x36 /* Next Data is a reception (Rx). Tx not allowed */ txallowed = 0U; 800418e: 2300 movs r3, #0 8004190: 62fb str r3, [r7, #44] ; 0x2c } #endif /* USE_SPI_CRC */ } /* Wait until RXNE flag is reset */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) 8004192: 68fb ldr r3, [r7, #12] 8004194: 681b ldr r3, [r3, #0] 8004196: 689b ldr r3, [r3, #8] 8004198: f003 0301 and.w r3, r3, #1 800419c: 2b01 cmp r3, #1 800419e: d119 bne.n 80041d4 80041a0: 68fb ldr r3, [r7, #12] 80041a2: 8fdb ldrh r3, [r3, #62] ; 0x3e 80041a4: b29b uxth r3, r3 80041a6: 2b00 cmp r3, #0 80041a8: d014 beq.n 80041d4 { (*(uint8_t *)hspi->pRxBuffPtr) = hspi->Instance->DR; 80041aa: 68fb ldr r3, [r7, #12] 80041ac: 681b ldr r3, [r3, #0] 80041ae: 68da ldr r2, [r3, #12] 80041b0: 68fb ldr r3, [r7, #12] 80041b2: 6b9b ldr r3, [r3, #56] ; 0x38 80041b4: b2d2 uxtb r2, r2 80041b6: 701a strb r2, [r3, #0] hspi->pRxBuffPtr++; 80041b8: 68fb ldr r3, [r7, #12] 80041ba: 6b9b ldr r3, [r3, #56] ; 0x38 80041bc: 1c5a adds r2, r3, #1 80041be: 68fb ldr r3, [r7, #12] 80041c0: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount--; 80041c2: 68fb ldr r3, [r7, #12] 80041c4: 8fdb ldrh r3, [r3, #62] ; 0x3e 80041c6: b29b uxth r3, r3 80041c8: 3b01 subs r3, #1 80041ca: b29a uxth r2, r3 80041cc: 68fb ldr r3, [r7, #12] 80041ce: 87da strh r2, [r3, #62] ; 0x3e /* Next Data is a Transmission (Tx). Tx is allowed */ txallowed = 1U; 80041d0: 2301 movs r3, #1 80041d2: 62fb str r3, [r7, #44] ; 0x2c } if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U)) 80041d4: f7fd fcd0 bl 8001b78 80041d8: 4602 mov r2, r0 80041da: 6a7b ldr r3, [r7, #36] ; 0x24 80041dc: 1ad3 subs r3, r2, r3 80041de: 6bba ldr r2, [r7, #56] ; 0x38 80041e0: 429a cmp r2, r3 80041e2: d803 bhi.n 80041ec 80041e4: 6bbb ldr r3, [r7, #56] ; 0x38 80041e6: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 80041ea: d102 bne.n 80041f2 80041ec: 6bbb ldr r3, [r7, #56] ; 0x38 80041ee: 2b00 cmp r3, #0 80041f0: d103 bne.n 80041fa { errorcode = HAL_TIMEOUT; 80041f2: 2303 movs r3, #3 80041f4: f887 302b strb.w r3, [r7, #43] ; 0x2b goto error; 80041f8: e029 b.n 800424e while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) 80041fa: 68fb ldr r3, [r7, #12] 80041fc: 8edb ldrh r3, [r3, #54] ; 0x36 80041fe: b29b uxth r3, r3 8004200: 2b00 cmp r3, #0 8004202: d1a2 bne.n 800414a 8004204: 68fb ldr r3, [r7, #12] 8004206: 8fdb ldrh r3, [r3, #62] ; 0x3e 8004208: b29b uxth r3, r3 800420a: 2b00 cmp r3, #0 800420c: d19d bne.n 800414a } } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) 800420e: 6a7a ldr r2, [r7, #36] ; 0x24 8004210: 6bb9 ldr r1, [r7, #56] ; 0x38 8004212: 68f8 ldr r0, [r7, #12] 8004214: f000 f904 bl 8004420 8004218: 4603 mov r3, r0 800421a: 2b00 cmp r3, #0 800421c: d006 beq.n 800422c { errorcode = HAL_ERROR; 800421e: 2301 movs r3, #1 8004220: f887 302b strb.w r3, [r7, #43] ; 0x2b hspi->ErrorCode = HAL_SPI_ERROR_FLAG; 8004224: 68fb ldr r3, [r7, #12] 8004226: 2220 movs r2, #32 8004228: 655a str r2, [r3, #84] ; 0x54 goto error; 800422a: e010 b.n 800424e } /* Clear overrun flag in 2 Lines communication mode because received is not read */ if (hspi->Init.Direction == SPI_DIRECTION_2LINES) 800422c: 68fb ldr r3, [r7, #12] 800422e: 689b ldr r3, [r3, #8] 8004230: 2b00 cmp r3, #0 8004232: d10b bne.n 800424c { __HAL_SPI_CLEAR_OVRFLAG(hspi); 8004234: 2300 movs r3, #0 8004236: 617b str r3, [r7, #20] 8004238: 68fb ldr r3, [r7, #12] 800423a: 681b ldr r3, [r3, #0] 800423c: 68db ldr r3, [r3, #12] 800423e: 617b str r3, [r7, #20] 8004240: 68fb ldr r3, [r7, #12] 8004242: 681b ldr r3, [r3, #0] 8004244: 689b ldr r3, [r3, #8] 8004246: 617b str r3, [r7, #20] 8004248: 697b ldr r3, [r7, #20] 800424a: e000 b.n 800424e } error : 800424c: bf00 nop hspi->State = HAL_SPI_STATE_READY; 800424e: 68fb ldr r3, [r7, #12] 8004250: 2201 movs r2, #1 8004252: f883 2051 strb.w r2, [r3, #81] ; 0x51 __HAL_UNLOCK(hspi); 8004256: 68fb ldr r3, [r7, #12] 8004258: 2200 movs r2, #0 800425a: f883 2050 strb.w r2, [r3, #80] ; 0x50 return errorcode; 800425e: f897 302b ldrb.w r3, [r7, #43] ; 0x2b } 8004262: 4618 mov r0, r3 8004264: 3730 adds r7, #48 ; 0x30 8004266: 46bd mov sp, r7 8004268: bd80 pop {r7, pc} ... 0800426c : * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State, uint32_t Timeout, uint32_t Tickstart) { 800426c: b580 push {r7, lr} 800426e: b088 sub sp, #32 8004270: af00 add r7, sp, #0 8004272: 60f8 str r0, [r7, #12] 8004274: 60b9 str r1, [r7, #8] 8004276: 603b str r3, [r7, #0] 8004278: 4613 mov r3, r2 800427a: 71fb strb r3, [r7, #7] __IO uint32_t count; uint32_t tmp_timeout; uint32_t tmp_tickstart; /* Adjust Timeout value in case of end of transfer */ tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); 800427c: f7fd fc7c bl 8001b78 8004280: 4602 mov r2, r0 8004282: 6abb ldr r3, [r7, #40] ; 0x28 8004284: 1a9b subs r3, r3, r2 8004286: 683a ldr r2, [r7, #0] 8004288: 4413 add r3, r2 800428a: 61fb str r3, [r7, #28] tmp_tickstart = HAL_GetTick(); 800428c: f7fd fc74 bl 8001b78 8004290: 61b8 str r0, [r7, #24] /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U); 8004292: 4b39 ldr r3, [pc, #228] ; (8004378 ) 8004294: 681b ldr r3, [r3, #0] 8004296: 015b lsls r3, r3, #5 8004298: 0d1b lsrs r3, r3, #20 800429a: 69fa ldr r2, [r7, #28] 800429c: fb02 f303 mul.w r3, r2, r3 80042a0: 617b str r3, [r7, #20] while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) 80042a2: e054 b.n 800434e { if (Timeout != HAL_MAX_DELAY) 80042a4: 683b ldr r3, [r7, #0] 80042a6: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 80042aa: d050 beq.n 800434e { if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) 80042ac: f7fd fc64 bl 8001b78 80042b0: 4602 mov r2, r0 80042b2: 69bb ldr r3, [r7, #24] 80042b4: 1ad3 subs r3, r2, r3 80042b6: 69fa ldr r2, [r7, #28] 80042b8: 429a cmp r2, r3 80042ba: d902 bls.n 80042c2 80042bc: 69fb ldr r3, [r7, #28] 80042be: 2b00 cmp r3, #0 80042c0: d13d bne.n 800433e /* Disable the SPI and reset the CRC: the CRC value should be cleared on both master and slave sides in order to resynchronize the master and slave for their respective CRC calculation */ /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); 80042c2: 68fb ldr r3, [r7, #12] 80042c4: 681b ldr r3, [r3, #0] 80042c6: 685a ldr r2, [r3, #4] 80042c8: 68fb ldr r3, [r7, #12] 80042ca: 681b ldr r3, [r3, #0] 80042cc: f022 02e0 bic.w r2, r2, #224 ; 0xe0 80042d0: 605a str r2, [r3, #4] if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) 80042d2: 68fb ldr r3, [r7, #12] 80042d4: 685b ldr r3, [r3, #4] 80042d6: f5b3 7f82 cmp.w r3, #260 ; 0x104 80042da: d111 bne.n 8004300 80042dc: 68fb ldr r3, [r7, #12] 80042de: 689b ldr r3, [r3, #8] 80042e0: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 80042e4: d004 beq.n 80042f0 || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) 80042e6: 68fb ldr r3, [r7, #12] 80042e8: 689b ldr r3, [r3, #8] 80042ea: f5b3 6f80 cmp.w r3, #1024 ; 0x400 80042ee: d107 bne.n 8004300 { /* Disable SPI peripheral */ __HAL_SPI_DISABLE(hspi); 80042f0: 68fb ldr r3, [r7, #12] 80042f2: 681b ldr r3, [r3, #0] 80042f4: 681a ldr r2, [r3, #0] 80042f6: 68fb ldr r3, [r7, #12] 80042f8: 681b ldr r3, [r3, #0] 80042fa: f022 0240 bic.w r2, r2, #64 ; 0x40 80042fe: 601a str r2, [r3, #0] } /* Reset CRC Calculation */ if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) 8004300: 68fb ldr r3, [r7, #12] 8004302: 6a9b ldr r3, [r3, #40] ; 0x28 8004304: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 8004308: d10f bne.n 800432a { SPI_RESET_CRC(hspi); 800430a: 68fb ldr r3, [r7, #12] 800430c: 681b ldr r3, [r3, #0] 800430e: 681a ldr r2, [r3, #0] 8004310: 68fb ldr r3, [r7, #12] 8004312: 681b ldr r3, [r3, #0] 8004314: f422 5200 bic.w r2, r2, #8192 ; 0x2000 8004318: 601a str r2, [r3, #0] 800431a: 68fb ldr r3, [r7, #12] 800431c: 681b ldr r3, [r3, #0] 800431e: 681a ldr r2, [r3, #0] 8004320: 68fb ldr r3, [r7, #12] 8004322: 681b ldr r3, [r3, #0] 8004324: f442 5200 orr.w r2, r2, #8192 ; 0x2000 8004328: 601a str r2, [r3, #0] } hspi->State = HAL_SPI_STATE_READY; 800432a: 68fb ldr r3, [r7, #12] 800432c: 2201 movs r2, #1 800432e: f883 2051 strb.w r2, [r3, #81] ; 0x51 /* Process Unlocked */ __HAL_UNLOCK(hspi); 8004332: 68fb ldr r3, [r7, #12] 8004334: 2200 movs r2, #0 8004336: f883 2050 strb.w r2, [r3, #80] ; 0x50 return HAL_TIMEOUT; 800433a: 2303 movs r3, #3 800433c: e017 b.n 800436e } /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */ if(count == 0U) 800433e: 697b ldr r3, [r7, #20] 8004340: 2b00 cmp r3, #0 8004342: d101 bne.n 8004348 { tmp_timeout = 0U; 8004344: 2300 movs r3, #0 8004346: 61fb str r3, [r7, #28] } count--; 8004348: 697b ldr r3, [r7, #20] 800434a: 3b01 subs r3, #1 800434c: 617b str r3, [r7, #20] while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) 800434e: 68fb ldr r3, [r7, #12] 8004350: 681b ldr r3, [r3, #0] 8004352: 689a ldr r2, [r3, #8] 8004354: 68bb ldr r3, [r7, #8] 8004356: 4013 ands r3, r2 8004358: 68ba ldr r2, [r7, #8] 800435a: 429a cmp r2, r3 800435c: bf0c ite eq 800435e: 2301 moveq r3, #1 8004360: 2300 movne r3, #0 8004362: b2db uxtb r3, r3 8004364: 461a mov r2, r3 8004366: 79fb ldrb r3, [r7, #7] 8004368: 429a cmp r2, r3 800436a: d19b bne.n 80042a4 } } return HAL_OK; 800436c: 2300 movs r3, #0 } 800436e: 4618 mov r0, r3 8004370: 3720 adds r7, #32 8004372: 46bd mov sp, r7 8004374: bd80 pop {r7, pc} 8004376: bf00 nop 8004378: 20000000 .word 0x20000000 0800437c : * @param Timeout Timeout duration * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { 800437c: b580 push {r7, lr} 800437e: b086 sub sp, #24 8004380: af02 add r7, sp, #8 8004382: 60f8 str r0, [r7, #12] 8004384: 60b9 str r1, [r7, #8] 8004386: 607a str r2, [r7, #4] if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) 8004388: 68fb ldr r3, [r7, #12] 800438a: 685b ldr r3, [r3, #4] 800438c: f5b3 7f82 cmp.w r3, #260 ; 0x104 8004390: d111 bne.n 80043b6 8004392: 68fb ldr r3, [r7, #12] 8004394: 689b ldr r3, [r3, #8] 8004396: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 800439a: d004 beq.n 80043a6 || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) 800439c: 68fb ldr r3, [r7, #12] 800439e: 689b ldr r3, [r3, #8] 80043a0: f5b3 6f80 cmp.w r3, #1024 ; 0x400 80043a4: d107 bne.n 80043b6 { /* Disable SPI peripheral */ __HAL_SPI_DISABLE(hspi); 80043a6: 68fb ldr r3, [r7, #12] 80043a8: 681b ldr r3, [r3, #0] 80043aa: 681a ldr r2, [r3, #0] 80043ac: 68fb ldr r3, [r7, #12] 80043ae: 681b ldr r3, [r3, #0] 80043b0: f022 0240 bic.w r2, r2, #64 ; 0x40 80043b4: 601a str r2, [r3, #0] } if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)) 80043b6: 68fb ldr r3, [r7, #12] 80043b8: 685b ldr r3, [r3, #4] 80043ba: f5b3 7f82 cmp.w r3, #260 ; 0x104 80043be: d117 bne.n 80043f0 80043c0: 68fb ldr r3, [r7, #12] 80043c2: 689b ldr r3, [r3, #8] 80043c4: f5b3 6f80 cmp.w r3, #1024 ; 0x400 80043c8: d112 bne.n 80043f0 { /* Wait the RXNE reset */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout, Tickstart) != HAL_OK) 80043ca: 687b ldr r3, [r7, #4] 80043cc: 9300 str r3, [sp, #0] 80043ce: 68bb ldr r3, [r7, #8] 80043d0: 2200 movs r2, #0 80043d2: 2101 movs r1, #1 80043d4: 68f8 ldr r0, [r7, #12] 80043d6: f7ff ff49 bl 800426c 80043da: 4603 mov r3, r0 80043dc: 2b00 cmp r3, #0 80043de: d01a beq.n 8004416 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); 80043e0: 68fb ldr r3, [r7, #12] 80043e2: 6d5b ldr r3, [r3, #84] ; 0x54 80043e4: f043 0220 orr.w r2, r3, #32 80043e8: 68fb ldr r3, [r7, #12] 80043ea: 655a str r2, [r3, #84] ; 0x54 return HAL_TIMEOUT; 80043ec: 2303 movs r3, #3 80043ee: e013 b.n 8004418 } } else { /* Control the BSY flag */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) 80043f0: 687b ldr r3, [r7, #4] 80043f2: 9300 str r3, [sp, #0] 80043f4: 68bb ldr r3, [r7, #8] 80043f6: 2200 movs r2, #0 80043f8: 2180 movs r1, #128 ; 0x80 80043fa: 68f8 ldr r0, [r7, #12] 80043fc: f7ff ff36 bl 800426c 8004400: 4603 mov r3, r0 8004402: 2b00 cmp r3, #0 8004404: d007 beq.n 8004416 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); 8004406: 68fb ldr r3, [r7, #12] 8004408: 6d5b ldr r3, [r3, #84] ; 0x54 800440a: f043 0220 orr.w r2, r3, #32 800440e: 68fb ldr r3, [r7, #12] 8004410: 655a str r2, [r3, #84] ; 0x54 return HAL_TIMEOUT; 8004412: 2303 movs r3, #3 8004414: e000 b.n 8004418 } } return HAL_OK; 8004416: 2300 movs r3, #0 } 8004418: 4618 mov r0, r3 800441a: 3710 adds r7, #16 800441c: 46bd mov sp, r7 800441e: bd80 pop {r7, pc} 08004420 : * @param Timeout Timeout duration * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { 8004420: b580 push {r7, lr} 8004422: b086 sub sp, #24 8004424: af02 add r7, sp, #8 8004426: 60f8 str r0, [r7, #12] 8004428: 60b9 str r1, [r7, #8] 800442a: 607a str r2, [r7, #4] /* Control the BSY flag */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) 800442c: 687b ldr r3, [r7, #4] 800442e: 9300 str r3, [sp, #0] 8004430: 68bb ldr r3, [r7, #8] 8004432: 2200 movs r2, #0 8004434: 2180 movs r1, #128 ; 0x80 8004436: 68f8 ldr r0, [r7, #12] 8004438: f7ff ff18 bl 800426c 800443c: 4603 mov r3, r0 800443e: 2b00 cmp r3, #0 8004440: d007 beq.n 8004452 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); 8004442: 68fb ldr r3, [r7, #12] 8004444: 6d5b ldr r3, [r3, #84] ; 0x54 8004446: f043 0220 orr.w r2, r3, #32 800444a: 68fb ldr r3, [r7, #12] 800444c: 655a str r2, [r3, #84] ; 0x54 return HAL_TIMEOUT; 800444e: 2303 movs r3, #3 8004450: e000 b.n 8004454 } return HAL_OK; 8004452: 2300 movs r3, #0 } 8004454: 4618 mov r0, r3 8004456: 3710 adds r7, #16 8004458: 46bd mov sp, r7 800445a: bd80 pop {r7, pc} 0800445c : * @param ExtTiming Pointer to SRAM extended mode timing structure * @retval HAL status */ HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming) { 800445c: b580 push {r7, lr} 800445e: b084 sub sp, #16 8004460: af00 add r7, sp, #0 8004462: 60f8 str r0, [r7, #12] 8004464: 60b9 str r1, [r7, #8] 8004466: 607a str r2, [r7, #4] /* Check the SRAM handle parameter */ if ((hsram == NULL) || (hsram->Init.BurstAccessMode == FSMC_BURST_ACCESS_MODE_ENABLE)) 8004468: 68fb ldr r3, [r7, #12] 800446a: 2b00 cmp r3, #0 800446c: d004 beq.n 8004478 800446e: 68fb ldr r3, [r7, #12] 8004470: 699b ldr r3, [r3, #24] 8004472: f5b3 7f80 cmp.w r3, #256 ; 0x100 8004476: d101 bne.n 800447c { return HAL_ERROR; 8004478: 2301 movs r3, #1 800447a: e038 b.n 80044ee } if (hsram->State == HAL_SRAM_STATE_RESET) 800447c: 68fb ldr r3, [r7, #12] 800447e: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 8004482: b2db uxtb r3, r3 8004484: 2b00 cmp r3, #0 8004486: d106 bne.n 8004496 { /* Allocate lock resource and initialize it */ hsram->Lock = HAL_UNLOCKED; 8004488: 68fb ldr r3, [r7, #12] 800448a: 2200 movs r2, #0 800448c: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Init the low level hardware */ hsram->MspInitCallback(hsram); #else /* Initialize the low level hardware (MSP) */ HAL_SRAM_MspInit(hsram); 8004490: 68f8 ldr r0, [r7, #12] 8004492: f7fd fa0d bl 80018b0 #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ } /* Initialize SRAM control Interface */ (void)FSMC_NORSRAM_Init(hsram->Instance, &(hsram->Init)); 8004496: 68fb ldr r3, [r7, #12] 8004498: 681a ldr r2, [r3, #0] 800449a: 68fb ldr r3, [r7, #12] 800449c: 3308 adds r3, #8 800449e: 4619 mov r1, r3 80044a0: 4610 mov r0, r2 80044a2: f000 fac9 bl 8004a38 /* Initialize SRAM timing Interface */ (void)FSMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank); 80044a6: 68fb ldr r3, [r7, #12] 80044a8: 6818 ldr r0, [r3, #0] 80044aa: 68fb ldr r3, [r7, #12] 80044ac: 689b ldr r3, [r3, #8] 80044ae: 461a mov r2, r3 80044b0: 68b9 ldr r1, [r7, #8] 80044b2: f000 fb2b bl 8004b0c /* Initialize SRAM extended mode timing Interface */ (void)FSMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank, 80044b6: 68fb ldr r3, [r7, #12] 80044b8: 6858 ldr r0, [r3, #4] 80044ba: 68fb ldr r3, [r7, #12] 80044bc: 689a ldr r2, [r3, #8] 80044be: 68fb ldr r3, [r7, #12] 80044c0: 6b1b ldr r3, [r3, #48] ; 0x30 80044c2: 6879 ldr r1, [r7, #4] 80044c4: f000 fb56 bl 8004b74 hsram->Init.ExtendedMode); /* Enable the NORSRAM device */ __FSMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank); 80044c8: 68fb ldr r3, [r7, #12] 80044ca: 681b ldr r3, [r3, #0] 80044cc: 68fa ldr r2, [r7, #12] 80044ce: 6892 ldr r2, [r2, #8] 80044d0: f853 1022 ldr.w r1, [r3, r2, lsl #2] 80044d4: 68fb ldr r3, [r7, #12] 80044d6: 681b ldr r3, [r3, #0] 80044d8: 68fa ldr r2, [r7, #12] 80044da: 6892 ldr r2, [r2, #8] 80044dc: f041 0101 orr.w r1, r1, #1 80044e0: f843 1022 str.w r1, [r3, r2, lsl #2] /* Initialize the SRAM controller state */ hsram->State = HAL_SRAM_STATE_READY; 80044e4: 68fb ldr r3, [r7, #12] 80044e6: 2201 movs r2, #1 80044e8: f883 2041 strb.w r2, [r3, #65] ; 0x41 return HAL_OK; 80044ec: 2300 movs r3, #0 } 80044ee: 4618 mov r0, r3 80044f0: 3710 adds r7, #16 80044f2: 46bd mov sp, r7 80044f4: bd80 pop {r7, pc} 080044f6 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 80044f6: b580 push {r7, lr} 80044f8: b082 sub sp, #8 80044fa: af00 add r7, sp, #0 80044fc: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 80044fe: 687b ldr r3, [r7, #4] 8004500: 2b00 cmp r3, #0 8004502: d101 bne.n 8004508 { return HAL_ERROR; 8004504: 2301 movs r3, #1 8004506: e041 b.n 800458c assert_param(IS_TIM_INSTANCE(htim->Instance)); assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8004508: 687b ldr r3, [r7, #4] 800450a: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 800450e: b2db uxtb r3, r3 8004510: 2b00 cmp r3, #0 8004512: d106 bne.n 8004522 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8004514: 687b ldr r3, [r7, #4] 8004516: 2200 movs r2, #0 8004518: f883 203c strb.w r2, [r3, #60] ; 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 800451c: 6878 ldr r0, [r7, #4] 800451e: f7fd f94d bl 80017bc #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8004522: 687b ldr r3, [r7, #4] 8004524: 2202 movs r2, #2 8004526: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 800452a: 687b ldr r3, [r7, #4] 800452c: 681a ldr r2, [r3, #0] 800452e: 687b ldr r3, [r7, #4] 8004530: 3304 adds r3, #4 8004532: 4619 mov r1, r3 8004534: 4610 mov r0, r2 8004536: f000 f987 bl 8004848 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 800453a: 687b ldr r3, [r7, #4] 800453c: 2201 movs r2, #1 800453e: f883 2046 strb.w r2, [r3, #70] ; 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8004542: 687b ldr r3, [r7, #4] 8004544: 2201 movs r2, #1 8004546: f883 203e strb.w r2, [r3, #62] ; 0x3e 800454a: 687b ldr r3, [r7, #4] 800454c: 2201 movs r2, #1 800454e: f883 203f strb.w r2, [r3, #63] ; 0x3f 8004552: 687b ldr r3, [r7, #4] 8004554: 2201 movs r2, #1 8004556: f883 2040 strb.w r2, [r3, #64] ; 0x40 800455a: 687b ldr r3, [r7, #4] 800455c: 2201 movs r2, #1 800455e: f883 2041 strb.w r2, [r3, #65] ; 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8004562: 687b ldr r3, [r7, #4] 8004564: 2201 movs r2, #1 8004566: f883 2042 strb.w r2, [r3, #66] ; 0x42 800456a: 687b ldr r3, [r7, #4] 800456c: 2201 movs r2, #1 800456e: f883 2043 strb.w r2, [r3, #67] ; 0x43 8004572: 687b ldr r3, [r7, #4] 8004574: 2201 movs r2, #1 8004576: f883 2044 strb.w r2, [r3, #68] ; 0x44 800457a: 687b ldr r3, [r7, #4] 800457c: 2201 movs r2, #1 800457e: f883 2045 strb.w r2, [r3, #69] ; 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8004582: 687b ldr r3, [r7, #4] 8004584: 2201 movs r2, #1 8004586: f883 203d strb.w r2, [r3, #61] ; 0x3d return HAL_OK; 800458a: 2300 movs r3, #0 } 800458c: 4618 mov r0, r3 800458e: 3708 adds r7, #8 8004590: 46bd mov sp, r7 8004592: bd80 pop {r7, pc} 08004594 : * @brief Stops the TIM Base generation in interrupt mode. * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim) { 8004594: b480 push {r7} 8004596: b083 sub sp, #12 8004598: af00 add r7, sp, #0 800459a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Disable the TIM Update interrupt */ __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE); 800459c: 687b ldr r3, [r7, #4] 800459e: 681b ldr r3, [r3, #0] 80045a0: 68da ldr r2, [r3, #12] 80045a2: 687b ldr r3, [r7, #4] 80045a4: 681b ldr r3, [r3, #0] 80045a6: f022 0201 bic.w r2, r2, #1 80045aa: 60da str r2, [r3, #12] /* Disable the Peripheral */ __HAL_TIM_DISABLE(htim); 80045ac: 687b ldr r3, [r7, #4] 80045ae: 681b ldr r3, [r3, #0] 80045b0: 6a1a ldr r2, [r3, #32] 80045b2: f241 1311 movw r3, #4369 ; 0x1111 80045b6: 4013 ands r3, r2 80045b8: 2b00 cmp r3, #0 80045ba: d10f bne.n 80045dc 80045bc: 687b ldr r3, [r7, #4] 80045be: 681b ldr r3, [r3, #0] 80045c0: 6a1a ldr r2, [r3, #32] 80045c2: f240 4344 movw r3, #1092 ; 0x444 80045c6: 4013 ands r3, r2 80045c8: 2b00 cmp r3, #0 80045ca: d107 bne.n 80045dc 80045cc: 687b ldr r3, [r7, #4] 80045ce: 681b ldr r3, [r3, #0] 80045d0: 681a ldr r2, [r3, #0] 80045d2: 687b ldr r3, [r7, #4] 80045d4: 681b ldr r3, [r3, #0] 80045d6: f022 0201 bic.w r2, r2, #1 80045da: 601a str r2, [r3, #0] /* Set the TIM state */ htim->State = HAL_TIM_STATE_READY; 80045dc: 687b ldr r3, [r7, #4] 80045de: 2201 movs r2, #1 80045e0: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Return function status */ return HAL_OK; 80045e4: 2300 movs r3, #0 } 80045e6: 4618 mov r0, r3 80045e8: 370c adds r7, #12 80045ea: 46bd mov sp, r7 80045ec: bc80 pop {r7} 80045ee: 4770 bx lr 080045f0 : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { 80045f0: b580 push {r7, lr} 80045f2: b082 sub sp, #8 80045f4: af00 add r7, sp, #0 80045f6: 6078 str r0, [r7, #4] /* Capture compare 1 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80045f8: 687b ldr r3, [r7, #4] 80045fa: 681b ldr r3, [r3, #0] 80045fc: 691b ldr r3, [r3, #16] 80045fe: f003 0302 and.w r3, r3, #2 8004602: 2b02 cmp r3, #2 8004604: d122 bne.n 800464c { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) 8004606: 687b ldr r3, [r7, #4] 8004608: 681b ldr r3, [r3, #0] 800460a: 68db ldr r3, [r3, #12] 800460c: f003 0302 and.w r3, r3, #2 8004610: 2b02 cmp r3, #2 8004612: d11b bne.n 800464c { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 8004614: 687b ldr r3, [r7, #4] 8004616: 681b ldr r3, [r3, #0] 8004618: f06f 0202 mvn.w r2, #2 800461c: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 800461e: 687b ldr r3, [r7, #4] 8004620: 2201 movs r2, #1 8004622: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8004624: 687b ldr r3, [r7, #4] 8004626: 681b ldr r3, [r3, #0] 8004628: 699b ldr r3, [r3, #24] 800462a: f003 0303 and.w r3, r3, #3 800462e: 2b00 cmp r3, #0 8004630: d003 beq.n 800463a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 8004632: 6878 ldr r0, [r7, #4] 8004634: f000 f8ed bl 8004812 8004638: e005 b.n 8004646 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 800463a: 6878 ldr r0, [r7, #4] 800463c: f000 f8e0 bl 8004800 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004640: 6878 ldr r0, [r7, #4] 8004642: f000 f8ef bl 8004824 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004646: 687b ldr r3, [r7, #4] 8004648: 2200 movs r2, #0 800464a: 771a strb r2, [r3, #28] } } } /* Capture compare 2 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 800464c: 687b ldr r3, [r7, #4] 800464e: 681b ldr r3, [r3, #0] 8004650: 691b ldr r3, [r3, #16] 8004652: f003 0304 and.w r3, r3, #4 8004656: 2b04 cmp r3, #4 8004658: d122 bne.n 80046a0 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) 800465a: 687b ldr r3, [r7, #4] 800465c: 681b ldr r3, [r3, #0] 800465e: 68db ldr r3, [r3, #12] 8004660: f003 0304 and.w r3, r3, #4 8004664: 2b04 cmp r3, #4 8004666: d11b bne.n 80046a0 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 8004668: 687b ldr r3, [r7, #4] 800466a: 681b ldr r3, [r3, #0] 800466c: f06f 0204 mvn.w r2, #4 8004670: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8004672: 687b ldr r3, [r7, #4] 8004674: 2202 movs r2, #2 8004676: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8004678: 687b ldr r3, [r7, #4] 800467a: 681b ldr r3, [r3, #0] 800467c: 699b ldr r3, [r3, #24] 800467e: f403 7340 and.w r3, r3, #768 ; 0x300 8004682: 2b00 cmp r3, #0 8004684: d003 beq.n 800468e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 8004686: 6878 ldr r0, [r7, #4] 8004688: f000 f8c3 bl 8004812 800468c: e005 b.n 800469a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 800468e: 6878 ldr r0, [r7, #4] 8004690: f000 f8b6 bl 8004800 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004694: 6878 ldr r0, [r7, #4] 8004696: f000 f8c5 bl 8004824 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800469a: 687b ldr r3, [r7, #4] 800469c: 2200 movs r2, #0 800469e: 771a strb r2, [r3, #28] } } /* Capture compare 3 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 80046a0: 687b ldr r3, [r7, #4] 80046a2: 681b ldr r3, [r3, #0] 80046a4: 691b ldr r3, [r3, #16] 80046a6: f003 0308 and.w r3, r3, #8 80046aa: 2b08 cmp r3, #8 80046ac: d122 bne.n 80046f4 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) 80046ae: 687b ldr r3, [r7, #4] 80046b0: 681b ldr r3, [r3, #0] 80046b2: 68db ldr r3, [r3, #12] 80046b4: f003 0308 and.w r3, r3, #8 80046b8: 2b08 cmp r3, #8 80046ba: d11b bne.n 80046f4 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 80046bc: 687b ldr r3, [r7, #4] 80046be: 681b ldr r3, [r3, #0] 80046c0: f06f 0208 mvn.w r2, #8 80046c4: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 80046c6: 687b ldr r3, [r7, #4] 80046c8: 2204 movs r2, #4 80046ca: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 80046cc: 687b ldr r3, [r7, #4] 80046ce: 681b ldr r3, [r3, #0] 80046d0: 69db ldr r3, [r3, #28] 80046d2: f003 0303 and.w r3, r3, #3 80046d6: 2b00 cmp r3, #0 80046d8: d003 beq.n 80046e2 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 80046da: 6878 ldr r0, [r7, #4] 80046dc: f000 f899 bl 8004812 80046e0: e005 b.n 80046ee { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 80046e2: 6878 ldr r0, [r7, #4] 80046e4: f000 f88c bl 8004800 HAL_TIM_PWM_PulseFinishedCallback(htim); 80046e8: 6878 ldr r0, [r7, #4] 80046ea: f000 f89b bl 8004824 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80046ee: 687b ldr r3, [r7, #4] 80046f0: 2200 movs r2, #0 80046f2: 771a strb r2, [r3, #28] } } /* Capture compare 4 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 80046f4: 687b ldr r3, [r7, #4] 80046f6: 681b ldr r3, [r3, #0] 80046f8: 691b ldr r3, [r3, #16] 80046fa: f003 0310 and.w r3, r3, #16 80046fe: 2b10 cmp r3, #16 8004700: d122 bne.n 8004748 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) 8004702: 687b ldr r3, [r7, #4] 8004704: 681b ldr r3, [r3, #0] 8004706: 68db ldr r3, [r3, #12] 8004708: f003 0310 and.w r3, r3, #16 800470c: 2b10 cmp r3, #16 800470e: d11b bne.n 8004748 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 8004710: 687b ldr r3, [r7, #4] 8004712: 681b ldr r3, [r3, #0] 8004714: f06f 0210 mvn.w r2, #16 8004718: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 800471a: 687b ldr r3, [r7, #4] 800471c: 2208 movs r2, #8 800471e: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8004720: 687b ldr r3, [r7, #4] 8004722: 681b ldr r3, [r3, #0] 8004724: 69db ldr r3, [r3, #28] 8004726: f403 7340 and.w r3, r3, #768 ; 0x300 800472a: 2b00 cmp r3, #0 800472c: d003 beq.n 8004736 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 800472e: 6878 ldr r0, [r7, #4] 8004730: f000 f86f bl 8004812 8004734: e005 b.n 8004742 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 8004736: 6878 ldr r0, [r7, #4] 8004738: f000 f862 bl 8004800 HAL_TIM_PWM_PulseFinishedCallback(htim); 800473c: 6878 ldr r0, [r7, #4] 800473e: f000 f871 bl 8004824 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004742: 687b ldr r3, [r7, #4] 8004744: 2200 movs r2, #0 8004746: 771a strb r2, [r3, #28] } } /* TIM Update event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 8004748: 687b ldr r3, [r7, #4] 800474a: 681b ldr r3, [r3, #0] 800474c: 691b ldr r3, [r3, #16] 800474e: f003 0301 and.w r3, r3, #1 8004752: 2b01 cmp r3, #1 8004754: d10e bne.n 8004774 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) 8004756: 687b ldr r3, [r7, #4] 8004758: 681b ldr r3, [r3, #0] 800475a: 68db ldr r3, [r3, #12] 800475c: f003 0301 and.w r3, r3, #1 8004760: 2b01 cmp r3, #1 8004762: d107 bne.n 8004774 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8004764: 687b ldr r3, [r7, #4] 8004766: 681b ldr r3, [r3, #0] 8004768: f06f 0201 mvn.w r2, #1 800476c: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); 800476e: 6878 ldr r0, [r7, #4] 8004770: f002 fc44 bl 8006ffc #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 8004774: 687b ldr r3, [r7, #4] 8004776: 681b ldr r3, [r3, #0] 8004778: 691b ldr r3, [r3, #16] 800477a: f003 0380 and.w r3, r3, #128 ; 0x80 800477e: 2b80 cmp r3, #128 ; 0x80 8004780: d10e bne.n 80047a0 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) 8004782: 687b ldr r3, [r7, #4] 8004784: 681b ldr r3, [r3, #0] 8004786: 68db ldr r3, [r3, #12] 8004788: f003 0380 and.w r3, r3, #128 ; 0x80 800478c: 2b80 cmp r3, #128 ; 0x80 800478e: d107 bne.n 80047a0 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8004790: 687b ldr r3, [r7, #4] 8004792: 681b ldr r3, [r3, #0] 8004794: f06f 0280 mvn.w r2, #128 ; 0x80 8004798: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); 800479a: 6878 ldr r0, [r7, #4] 800479c: f000 f943 bl 8004a26 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 80047a0: 687b ldr r3, [r7, #4] 80047a2: 681b ldr r3, [r3, #0] 80047a4: 691b ldr r3, [r3, #16] 80047a6: f003 0340 and.w r3, r3, #64 ; 0x40 80047aa: 2b40 cmp r3, #64 ; 0x40 80047ac: d10e bne.n 80047cc { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) 80047ae: 687b ldr r3, [r7, #4] 80047b0: 681b ldr r3, [r3, #0] 80047b2: 68db ldr r3, [r3, #12] 80047b4: f003 0340 and.w r3, r3, #64 ; 0x40 80047b8: 2b40 cmp r3, #64 ; 0x40 80047ba: d107 bne.n 80047cc { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80047bc: 687b ldr r3, [r7, #4] 80047be: 681b ldr r3, [r3, #0] 80047c0: f06f 0240 mvn.w r2, #64 ; 0x40 80047c4: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); 80047c6: 6878 ldr r0, [r7, #4] 80047c8: f000 f835 bl 8004836 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 80047cc: 687b ldr r3, [r7, #4] 80047ce: 681b ldr r3, [r3, #0] 80047d0: 691b ldr r3, [r3, #16] 80047d2: f003 0320 and.w r3, r3, #32 80047d6: 2b20 cmp r3, #32 80047d8: d10e bne.n 80047f8 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) 80047da: 687b ldr r3, [r7, #4] 80047dc: 681b ldr r3, [r3, #0] 80047de: 68db ldr r3, [r3, #12] 80047e0: f003 0320 and.w r3, r3, #32 80047e4: 2b20 cmp r3, #32 80047e6: d107 bne.n 80047f8 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 80047e8: 687b ldr r3, [r7, #4] 80047ea: 681b ldr r3, [r3, #0] 80047ec: f06f 0220 mvn.w r2, #32 80047f0: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); 80047f2: 6878 ldr r0, [r7, #4] 80047f4: f000 f90e bl 8004a14 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } 80047f8: bf00 nop 80047fa: 3708 adds r7, #8 80047fc: 46bd mov sp, r7 80047fe: bd80 pop {r7, pc} 08004800 : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { 8004800: b480 push {r7} 8004802: b083 sub sp, #12 8004804: af00 add r7, sp, #0 8004806: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } 8004808: bf00 nop 800480a: 370c adds r7, #12 800480c: 46bd mov sp, r7 800480e: bc80 pop {r7} 8004810: 4770 bx lr 08004812 : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { 8004812: b480 push {r7} 8004814: b083 sub sp, #12 8004816: af00 add r7, sp, #0 8004818: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } 800481a: bf00 nop 800481c: 370c adds r7, #12 800481e: 46bd mov sp, r7 8004820: bc80 pop {r7} 8004822: 4770 bx lr 08004824 : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { 8004824: b480 push {r7} 8004826: b083 sub sp, #12 8004828: af00 add r7, sp, #0 800482a: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } 800482c: bf00 nop 800482e: 370c adds r7, #12 8004830: 46bd mov sp, r7 8004832: bc80 pop {r7} 8004834: 4770 bx lr 08004836 : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { 8004836: b480 push {r7} 8004838: b083 sub sp, #12 800483a: af00 add r7, sp, #0 800483c: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } 800483e: bf00 nop 8004840: 370c adds r7, #12 8004842: 46bd mov sp, r7 8004844: bc80 pop {r7} 8004846: 4770 bx lr 08004848 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) { 8004848: b480 push {r7} 800484a: b085 sub sp, #20 800484c: af00 add r7, sp, #0 800484e: 6078 str r0, [r7, #4] 8004850: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 8004852: 687b ldr r3, [r7, #4] 8004854: 681b ldr r3, [r3, #0] 8004856: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8004858: 687b ldr r3, [r7, #4] 800485a: 4a33 ldr r2, [pc, #204] ; (8004928 ) 800485c: 4293 cmp r3, r2 800485e: d013 beq.n 8004888 8004860: 687b ldr r3, [r7, #4] 8004862: 4a32 ldr r2, [pc, #200] ; (800492c ) 8004864: 4293 cmp r3, r2 8004866: d00f beq.n 8004888 8004868: 687b ldr r3, [r7, #4] 800486a: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 800486e: d00b beq.n 8004888 8004870: 687b ldr r3, [r7, #4] 8004872: 4a2f ldr r2, [pc, #188] ; (8004930 ) 8004874: 4293 cmp r3, r2 8004876: d007 beq.n 8004888 8004878: 687b ldr r3, [r7, #4] 800487a: 4a2e ldr r2, [pc, #184] ; (8004934 ) 800487c: 4293 cmp r3, r2 800487e: d003 beq.n 8004888 8004880: 687b ldr r3, [r7, #4] 8004882: 4a2d ldr r2, [pc, #180] ; (8004938 ) 8004884: 4293 cmp r3, r2 8004886: d108 bne.n 800489a { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8004888: 68fb ldr r3, [r7, #12] 800488a: f023 0370 bic.w r3, r3, #112 ; 0x70 800488e: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 8004890: 683b ldr r3, [r7, #0] 8004892: 685b ldr r3, [r3, #4] 8004894: 68fa ldr r2, [r7, #12] 8004896: 4313 orrs r3, r2 8004898: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 800489a: 687b ldr r3, [r7, #4] 800489c: 4a22 ldr r2, [pc, #136] ; (8004928 ) 800489e: 4293 cmp r3, r2 80048a0: d013 beq.n 80048ca 80048a2: 687b ldr r3, [r7, #4] 80048a4: 4a21 ldr r2, [pc, #132] ; (800492c ) 80048a6: 4293 cmp r3, r2 80048a8: d00f beq.n 80048ca 80048aa: 687b ldr r3, [r7, #4] 80048ac: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 80048b0: d00b beq.n 80048ca 80048b2: 687b ldr r3, [r7, #4] 80048b4: 4a1e ldr r2, [pc, #120] ; (8004930 ) 80048b6: 4293 cmp r3, r2 80048b8: d007 beq.n 80048ca 80048ba: 687b ldr r3, [r7, #4] 80048bc: 4a1d ldr r2, [pc, #116] ; (8004934 ) 80048be: 4293 cmp r3, r2 80048c0: d003 beq.n 80048ca 80048c2: 687b ldr r3, [r7, #4] 80048c4: 4a1c ldr r2, [pc, #112] ; (8004938 ) 80048c6: 4293 cmp r3, r2 80048c8: d108 bne.n 80048dc { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 80048ca: 68fb ldr r3, [r7, #12] 80048cc: f423 7340 bic.w r3, r3, #768 ; 0x300 80048d0: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 80048d2: 683b ldr r3, [r7, #0] 80048d4: 68db ldr r3, [r3, #12] 80048d6: 68fa ldr r2, [r7, #12] 80048d8: 4313 orrs r3, r2 80048da: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 80048dc: 68fb ldr r3, [r7, #12] 80048de: f023 0280 bic.w r2, r3, #128 ; 0x80 80048e2: 683b ldr r3, [r7, #0] 80048e4: 695b ldr r3, [r3, #20] 80048e6: 4313 orrs r3, r2 80048e8: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; 80048ea: 687b ldr r3, [r7, #4] 80048ec: 68fa ldr r2, [r7, #12] 80048ee: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 80048f0: 683b ldr r3, [r7, #0] 80048f2: 689a ldr r2, [r3, #8] 80048f4: 687b ldr r3, [r7, #4] 80048f6: 62da str r2, [r3, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 80048f8: 683b ldr r3, [r7, #0] 80048fa: 681a ldr r2, [r3, #0] 80048fc: 687b ldr r3, [r7, #4] 80048fe: 629a str r2, [r3, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8004900: 687b ldr r3, [r7, #4] 8004902: 4a09 ldr r2, [pc, #36] ; (8004928 ) 8004904: 4293 cmp r3, r2 8004906: d003 beq.n 8004910 8004908: 687b ldr r3, [r7, #4] 800490a: 4a08 ldr r2, [pc, #32] ; (800492c ) 800490c: 4293 cmp r3, r2 800490e: d103 bne.n 8004918 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8004910: 683b ldr r3, [r7, #0] 8004912: 691a ldr r2, [r3, #16] 8004914: 687b ldr r3, [r7, #4] 8004916: 631a str r2, [r3, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 8004918: 687b ldr r3, [r7, #4] 800491a: 2201 movs r2, #1 800491c: 615a str r2, [r3, #20] } 800491e: bf00 nop 8004920: 3714 adds r7, #20 8004922: 46bd mov sp, r7 8004924: bc80 pop {r7} 8004926: 4770 bx lr 8004928: 40012c00 .word 0x40012c00 800492c: 40013400 .word 0x40013400 8004930: 40000400 .word 0x40000400 8004934: 40000800 .word 0x40000800 8004938: 40000c00 .word 0x40000c00 0800493c : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig) { 800493c: b480 push {r7} 800493e: b085 sub sp, #20 8004940: af00 add r7, sp, #0 8004942: 6078 str r0, [r7, #4] 8004944: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 8004946: 687b ldr r3, [r7, #4] 8004948: f893 303c ldrb.w r3, [r3, #60] ; 0x3c 800494c: 2b01 cmp r3, #1 800494e: d101 bne.n 8004954 8004950: 2302 movs r3, #2 8004952: e050 b.n 80049f6 8004954: 687b ldr r3, [r7, #4] 8004956: 2201 movs r2, #1 8004958: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 800495c: 687b ldr r3, [r7, #4] 800495e: 2202 movs r2, #2 8004960: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 8004964: 687b ldr r3, [r7, #4] 8004966: 681b ldr r3, [r3, #0] 8004968: 685b ldr r3, [r3, #4] 800496a: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 800496c: 687b ldr r3, [r7, #4] 800496e: 681b ldr r3, [r3, #0] 8004970: 689b ldr r3, [r3, #8] 8004972: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 8004974: 68fb ldr r3, [r7, #12] 8004976: f023 0370 bic.w r3, r3, #112 ; 0x70 800497a: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 800497c: 683b ldr r3, [r7, #0] 800497e: 681b ldr r3, [r3, #0] 8004980: 68fa ldr r2, [r7, #12] 8004982: 4313 orrs r3, r2 8004984: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 8004986: 687b ldr r3, [r7, #4] 8004988: 681b ldr r3, [r3, #0] 800498a: 68fa ldr r2, [r7, #12] 800498c: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 800498e: 687b ldr r3, [r7, #4] 8004990: 681b ldr r3, [r3, #0] 8004992: 4a1b ldr r2, [pc, #108] ; (8004a00 ) 8004994: 4293 cmp r3, r2 8004996: d018 beq.n 80049ca 8004998: 687b ldr r3, [r7, #4] 800499a: 681b ldr r3, [r3, #0] 800499c: 4a19 ldr r2, [pc, #100] ; (8004a04 ) 800499e: 4293 cmp r3, r2 80049a0: d013 beq.n 80049ca 80049a2: 687b ldr r3, [r7, #4] 80049a4: 681b ldr r3, [r3, #0] 80049a6: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 80049aa: d00e beq.n 80049ca 80049ac: 687b ldr r3, [r7, #4] 80049ae: 681b ldr r3, [r3, #0] 80049b0: 4a15 ldr r2, [pc, #84] ; (8004a08 ) 80049b2: 4293 cmp r3, r2 80049b4: d009 beq.n 80049ca 80049b6: 687b ldr r3, [r7, #4] 80049b8: 681b ldr r3, [r3, #0] 80049ba: 4a14 ldr r2, [pc, #80] ; (8004a0c ) 80049bc: 4293 cmp r3, r2 80049be: d004 beq.n 80049ca 80049c0: 687b ldr r3, [r7, #4] 80049c2: 681b ldr r3, [r3, #0] 80049c4: 4a12 ldr r2, [pc, #72] ; (8004a10 ) 80049c6: 4293 cmp r3, r2 80049c8: d10c bne.n 80049e4 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 80049ca: 68bb ldr r3, [r7, #8] 80049cc: f023 0380 bic.w r3, r3, #128 ; 0x80 80049d0: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 80049d2: 683b ldr r3, [r7, #0] 80049d4: 685b ldr r3, [r3, #4] 80049d6: 68ba ldr r2, [r7, #8] 80049d8: 4313 orrs r3, r2 80049da: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 80049dc: 687b ldr r3, [r7, #4] 80049de: 681b ldr r3, [r3, #0] 80049e0: 68ba ldr r2, [r7, #8] 80049e2: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 80049e4: 687b ldr r3, [r7, #4] 80049e6: 2201 movs r2, #1 80049e8: f883 203d strb.w r2, [r3, #61] ; 0x3d __HAL_UNLOCK(htim); 80049ec: 687b ldr r3, [r7, #4] 80049ee: 2200 movs r2, #0 80049f0: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; 80049f4: 2300 movs r3, #0 } 80049f6: 4618 mov r0, r3 80049f8: 3714 adds r7, #20 80049fa: 46bd mov sp, r7 80049fc: bc80 pop {r7} 80049fe: 4770 bx lr 8004a00: 40012c00 .word 0x40012c00 8004a04: 40013400 .word 0x40013400 8004a08: 40000400 .word 0x40000400 8004a0c: 40000800 .word 0x40000800 8004a10: 40000c00 .word 0x40000c00 08004a14 : * @brief Hall commutation changed callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { 8004a14: b480 push {r7} 8004a16: b083 sub sp, #12 8004a18: af00 add r7, sp, #0 8004a1a: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_CommutCallback could be implemented in the user file */ } 8004a1c: bf00 nop 8004a1e: 370c adds r7, #12 8004a20: 46bd mov sp, r7 8004a22: bc80 pop {r7} 8004a24: 4770 bx lr 08004a26 : * @brief Hall Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 8004a26: b480 push {r7} 8004a28: b083 sub sp, #12 8004a2a: af00 add r7, sp, #0 8004a2c: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_BreakCallback could be implemented in the user file */ } 8004a2e: bf00 nop 8004a30: 370c adds r7, #12 8004a32: 46bd mov sp, r7 8004a34: bc80 pop {r7} 8004a36: 4770 bx lr 08004a38 : * @param Init Pointer to NORSRAM Initialization structure * @retval HAL status */ HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_InitTypeDef *Init) { 8004a38: b480 push {r7} 8004a3a: b087 sub sp, #28 8004a3c: af00 add r7, sp, #0 8004a3e: 6078 str r0, [r7, #4] 8004a40: 6039 str r1, [r7, #0] assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait)); assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst)); assert_param(IS_FSMC_PAGESIZE(Init->PageSize)); /* Disable NORSRAM Device */ __FSMC_NORSRAM_DISABLE(Device, Init->NSBank); 8004a42: 683b ldr r3, [r7, #0] 8004a44: 681a ldr r2, [r3, #0] 8004a46: 687b ldr r3, [r7, #4] 8004a48: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8004a4c: 683a ldr r2, [r7, #0] 8004a4e: 6812 ldr r2, [r2, #0] 8004a50: f023 0101 bic.w r1, r3, #1 8004a54: 687b ldr r3, [r7, #4] 8004a56: f843 1022 str.w r1, [r3, r2, lsl #2] /* Set NORSRAM device control parameters */ if (Init->MemoryType == FSMC_MEMORY_TYPE_NOR) 8004a5a: 683b ldr r3, [r7, #0] 8004a5c: 689b ldr r3, [r3, #8] 8004a5e: 2b08 cmp r3, #8 8004a60: d102 bne.n 8004a68 { flashaccess = FSMC_NORSRAM_FLASH_ACCESS_ENABLE; 8004a62: 2340 movs r3, #64 ; 0x40 8004a64: 617b str r3, [r7, #20] 8004a66: e001 b.n 8004a6c } else { flashaccess = FSMC_NORSRAM_FLASH_ACCESS_DISABLE; 8004a68: 2300 movs r3, #0 8004a6a: 617b str r3, [r7, #20] } btcr_reg = (flashaccess | \ Init->DataAddressMux | \ 8004a6c: 683b ldr r3, [r7, #0] 8004a6e: 685a ldr r2, [r3, #4] btcr_reg = (flashaccess | \ 8004a70: 697b ldr r3, [r7, #20] 8004a72: 431a orrs r2, r3 Init->MemoryType | \ 8004a74: 683b ldr r3, [r7, #0] 8004a76: 689b ldr r3, [r3, #8] Init->DataAddressMux | \ 8004a78: 431a orrs r2, r3 Init->MemoryDataWidth | \ 8004a7a: 683b ldr r3, [r7, #0] 8004a7c: 68db ldr r3, [r3, #12] Init->MemoryType | \ 8004a7e: 431a orrs r2, r3 Init->BurstAccessMode | \ 8004a80: 683b ldr r3, [r7, #0] 8004a82: 691b ldr r3, [r3, #16] Init->MemoryDataWidth | \ 8004a84: 431a orrs r2, r3 Init->WaitSignalPolarity | \ 8004a86: 683b ldr r3, [r7, #0] 8004a88: 695b ldr r3, [r3, #20] Init->BurstAccessMode | \ 8004a8a: 431a orrs r2, r3 Init->WaitSignalActive | \ 8004a8c: 683b ldr r3, [r7, #0] 8004a8e: 69db ldr r3, [r3, #28] Init->WaitSignalPolarity | \ 8004a90: 431a orrs r2, r3 Init->WriteOperation | \ 8004a92: 683b ldr r3, [r7, #0] 8004a94: 6a1b ldr r3, [r3, #32] Init->WaitSignalActive | \ 8004a96: 431a orrs r2, r3 Init->WaitSignal | \ 8004a98: 683b ldr r3, [r7, #0] 8004a9a: 6a5b ldr r3, [r3, #36] ; 0x24 Init->WriteOperation | \ 8004a9c: 431a orrs r2, r3 Init->ExtendedMode | \ 8004a9e: 683b ldr r3, [r7, #0] 8004aa0: 6a9b ldr r3, [r3, #40] ; 0x28 Init->WaitSignal | \ 8004aa2: 431a orrs r2, r3 Init->AsynchronousWait | \ 8004aa4: 683b ldr r3, [r7, #0] 8004aa6: 6adb ldr r3, [r3, #44] ; 0x2c Init->ExtendedMode | \ 8004aa8: 431a orrs r2, r3 Init->WriteBurst); 8004aaa: 683b ldr r3, [r7, #0] 8004aac: 6b1b ldr r3, [r3, #48] ; 0x30 btcr_reg = (flashaccess | \ 8004aae: 4313 orrs r3, r2 8004ab0: 613b str r3, [r7, #16] btcr_reg |= Init->WrapMode; 8004ab2: 683b ldr r3, [r7, #0] 8004ab4: 699b ldr r3, [r3, #24] 8004ab6: 693a ldr r2, [r7, #16] 8004ab8: 4313 orrs r3, r2 8004aba: 613b str r3, [r7, #16] btcr_reg |= Init->PageSize; 8004abc: 683b ldr r3, [r7, #0] 8004abe: 6b5b ldr r3, [r3, #52] ; 0x34 8004ac0: 693a ldr r2, [r7, #16] 8004ac2: 4313 orrs r3, r2 8004ac4: 613b str r3, [r7, #16] mask = (FSMC_BCRx_MBKEN | 8004ac6: 4b10 ldr r3, [pc, #64] ; (8004b08 ) 8004ac8: 60fb str r3, [r7, #12] FSMC_BCRx_WAITEN | FSMC_BCRx_EXTMOD | FSMC_BCRx_ASYNCWAIT | FSMC_BCRx_CBURSTRW); mask |= FSMC_BCRx_WRAPMOD; 8004aca: 68fb ldr r3, [r7, #12] 8004acc: f443 6380 orr.w r3, r3, #1024 ; 0x400 8004ad0: 60fb str r3, [r7, #12] mask |= 0x00070000U; /* CPSIZE to be defined in CMSIS file */ 8004ad2: 68fb ldr r3, [r7, #12] 8004ad4: f443 23e0 orr.w r3, r3, #458752 ; 0x70000 8004ad8: 60fb str r3, [r7, #12] MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); 8004ada: 683b ldr r3, [r7, #0] 8004adc: 681a ldr r2, [r3, #0] 8004ade: 687b ldr r3, [r7, #4] 8004ae0: f853 2022 ldr.w r2, [r3, r2, lsl #2] 8004ae4: 68fb ldr r3, [r7, #12] 8004ae6: 43db mvns r3, r3 8004ae8: ea02 0103 and.w r1, r2, r3 8004aec: 683b ldr r3, [r7, #0] 8004aee: 681a ldr r2, [r3, #0] 8004af0: 693b ldr r3, [r7, #16] 8004af2: 4319 orrs r1, r3 8004af4: 687b ldr r3, [r7, #4] 8004af6: f843 1022 str.w r1, [r3, r2, lsl #2] return HAL_OK; 8004afa: 2300 movs r3, #0 } 8004afc: 4618 mov r0, r3 8004afe: 371c adds r7, #28 8004b00: 46bd mov sp, r7 8004b02: bc80 pop {r7} 8004b04: 4770 bx lr 8004b06: bf00 nop 8004b08: 0008fb7f .word 0x0008fb7f 08004b0c : * @param Bank NORSRAM bank number * @retval HAL status */ HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank) { 8004b0c: b480 push {r7} 8004b0e: b085 sub sp, #20 8004b10: af00 add r7, sp, #0 8004b12: 60f8 str r0, [r7, #12] 8004b14: 60b9 str r1, [r7, #8] 8004b16: 607a str r2, [r7, #4] assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency)); assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode)); assert_param(IS_FSMC_NORSRAM_BANK(Bank)); /* Set FSMC_NORSRAM device timing parameters */ MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime | 8004b18: 687b ldr r3, [r7, #4] 8004b1a: 1c5a adds r2, r3, #1 8004b1c: 68fb ldr r3, [r7, #12] 8004b1e: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8004b22: f003 4140 and.w r1, r3, #3221225472 ; 0xc0000000 8004b26: 68bb ldr r3, [r7, #8] 8004b28: 681a ldr r2, [r3, #0] 8004b2a: 68bb ldr r3, [r7, #8] 8004b2c: 685b ldr r3, [r3, #4] 8004b2e: 011b lsls r3, r3, #4 8004b30: 431a orrs r2, r3 8004b32: 68bb ldr r3, [r7, #8] 8004b34: 689b ldr r3, [r3, #8] 8004b36: 021b lsls r3, r3, #8 8004b38: 431a orrs r2, r3 8004b3a: 68bb ldr r3, [r7, #8] 8004b3c: 68db ldr r3, [r3, #12] 8004b3e: 041b lsls r3, r3, #16 8004b40: 431a orrs r2, r3 8004b42: 68bb ldr r3, [r7, #8] 8004b44: 691b ldr r3, [r3, #16] 8004b46: 3b01 subs r3, #1 8004b48: 051b lsls r3, r3, #20 8004b4a: 431a orrs r2, r3 8004b4c: 68bb ldr r3, [r7, #8] 8004b4e: 695b ldr r3, [r3, #20] 8004b50: 3b02 subs r3, #2 8004b52: 061b lsls r3, r3, #24 8004b54: 431a orrs r2, r3 8004b56: 68bb ldr r3, [r7, #8] 8004b58: 699b ldr r3, [r3, #24] 8004b5a: 4313 orrs r3, r2 8004b5c: 687a ldr r2, [r7, #4] 8004b5e: 3201 adds r2, #1 8004b60: 4319 orrs r1, r3 8004b62: 68fb ldr r3, [r7, #12] 8004b64: f843 1022 str.w r1, [r3, r2, lsl #2] ((Timing->BusTurnAroundDuration) << FSMC_BTRx_BUSTURN_Pos) | (((Timing->CLKDivision) - 1U) << FSMC_BTRx_CLKDIV_Pos) | (((Timing->DataLatency) - 2U) << FSMC_BTRx_DATLAT_Pos) | (Timing->AccessMode))); return HAL_OK; 8004b68: 2300 movs r3, #0 } 8004b6a: 4618 mov r0, r3 8004b6c: 3714 adds r7, #20 8004b6e: 46bd mov sp, r7 8004b70: bc80 pop {r7} 8004b72: 4770 bx lr 08004b74 : * @retval HAL status */ HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode) { 8004b74: b480 push {r7} 8004b76: b085 sub sp, #20 8004b78: af00 add r7, sp, #0 8004b7a: 60f8 str r0, [r7, #12] 8004b7c: 60b9 str r1, [r7, #8] 8004b7e: 607a str r2, [r7, #4] 8004b80: 603b str r3, [r7, #0] /* Check the parameters */ assert_param(IS_FSMC_EXTENDED_MODE(ExtendedMode)); /* Set NORSRAM device timing register for write configuration, if extended mode is used */ if (ExtendedMode == FSMC_EXTENDED_MODE_ENABLE) 8004b82: 683b ldr r3, [r7, #0] 8004b84: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 8004b88: d11d bne.n 8004bc6 assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode)); assert_param(IS_FSMC_NORSRAM_BANK(Bank)); /* Set NORSRAM device timing register for write configuration, if extended mode is used */ #if defined(FSMC_BWTRx_BUSTURN) MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime | 8004b8a: 68fb ldr r3, [r7, #12] 8004b8c: 687a ldr r2, [r7, #4] 8004b8e: f853 2022 ldr.w r2, [r3, r2, lsl #2] 8004b92: 4b13 ldr r3, [pc, #76] ; (8004be0 ) 8004b94: 4013 ands r3, r2 8004b96: 68ba ldr r2, [r7, #8] 8004b98: 6811 ldr r1, [r2, #0] 8004b9a: 68ba ldr r2, [r7, #8] 8004b9c: 6852 ldr r2, [r2, #4] 8004b9e: 0112 lsls r2, r2, #4 8004ba0: 4311 orrs r1, r2 8004ba2: 68ba ldr r2, [r7, #8] 8004ba4: 6892 ldr r2, [r2, #8] 8004ba6: 0212 lsls r2, r2, #8 8004ba8: 4311 orrs r1, r2 8004baa: 68ba ldr r2, [r7, #8] 8004bac: 6992 ldr r2, [r2, #24] 8004bae: 4311 orrs r1, r2 8004bb0: 68ba ldr r2, [r7, #8] 8004bb2: 68d2 ldr r2, [r2, #12] 8004bb4: 0412 lsls r2, r2, #16 8004bb6: 430a orrs r2, r1 8004bb8: ea43 0102 orr.w r1, r3, r2 8004bbc: 68fb ldr r3, [r7, #12] 8004bbe: 687a ldr r2, [r7, #4] 8004bc0: f843 1022 str.w r1, [r3, r2, lsl #2] 8004bc4: e005 b.n 8004bd2 (((Timing->DataLatency) - 2U) << FSMC_BWTRx_DATLAT_Pos))); #endif /* FSMC_BWTRx_BUSTURN */ } else { Device->BWTR[Bank] = 0x0FFFFFFFU; 8004bc6: 68fb ldr r3, [r7, #12] 8004bc8: 687a ldr r2, [r7, #4] 8004bca: f06f 4170 mvn.w r1, #4026531840 ; 0xf0000000 8004bce: f843 1022 str.w r1, [r3, r2, lsl #2] } return HAL_OK; 8004bd2: 2300 movs r3, #0 } 8004bd4: 4618 mov r0, r3 8004bd6: 3714 adds r7, #20 8004bd8: 46bd mov sp, r7 8004bda: bc80 pop {r7} 8004bdc: 4770 bx lr 8004bde: bf00 nop 8004be0: cff00000 .word 0xcff00000 08004be4 : _lcd_dev lcddev; //¹ÜÀíLCDÖØÒª²ÎÊý //**************************************************¼¸ÖÖ¿ìËÙ½Ó¿Ú //д¼Ä´æÆ÷º¯Êý //regval:¼Ä´æÆ÷Öµ void LCD_WR_REG(uint16_t regval) { 8004be4: b480 push {r7} 8004be6: b083 sub sp, #12 8004be8: af00 add r7, sp, #0 8004bea: 4603 mov r3, r0 8004bec: 80fb strh r3, [r7, #6] LCD_REG_ADDRESS=regval;//дÈëҪдµÄ¼Ä´æÆ÷ÐòºÅ 8004bee: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000 8004bf2: 88fb ldrh r3, [r7, #6] 8004bf4: 8013 strh r3, [r2, #0] } 8004bf6: bf00 nop 8004bf8: 370c adds r7, #12 8004bfa: 46bd mov sp, r7 8004bfc: bc80 pop {r7} 8004bfe: 4770 bx lr 08004c00 : //дLCDÊý¾Ý //data:ҪдÈëµÄÖµ void LCD_WR_DATA(uint16_t data) { 8004c00: b480 push {r7} 8004c02: b083 sub sp, #12 8004c04: af00 add r7, sp, #0 8004c06: 4603 mov r3, r0 8004c08: 80fb strh r3, [r7, #6] LCD_DATA_ADDRESS=data; 8004c0a: 4a04 ldr r2, [pc, #16] ; (8004c1c ) 8004c0c: 88fb ldrh r3, [r7, #6] 8004c0e: 8013 strh r3, [r2, #0] } 8004c10: bf00 nop 8004c12: 370c adds r7, #12 8004c14: 46bd mov sp, r7 8004c16: bc80 pop {r7} 8004c18: 4770 bx lr 8004c1a: bf00 nop 8004c1c: 6c000800 .word 0x6c000800 08004c20 : } //д¼Ä´æÆ÷ //LCD_Reg:¼Ä´æÆ÷µØÖ· //LCD_RegValue:ҪдÈëµÄÊý¾Ý void LCD_WriteReg(uint16_t LCD_Reg, uint16_t LCD_RegValue) { 8004c20: b480 push {r7} 8004c22: b083 sub sp, #12 8004c24: af00 add r7, sp, #0 8004c26: 4603 mov r3, r0 8004c28: 460a mov r2, r1 8004c2a: 80fb strh r3, [r7, #6] 8004c2c: 4613 mov r3, r2 8004c2e: 80bb strh r3, [r7, #4] LCD_REG_ADDRESS = LCD_Reg; //дÈëҪдµÄ¼Ä´æÆ÷ÐòºÅ 8004c30: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000 8004c34: 88fb ldrh r3, [r7, #6] 8004c36: 8013 strh r3, [r2, #0] LCD_DATA_ADDRESS = LCD_RegValue;//дÈëÊý¾Ý 8004c38: 4a03 ldr r2, [pc, #12] ; (8004c48 ) 8004c3a: 88bb ldrh r3, [r7, #4] 8004c3c: 8013 strh r3, [r2, #0] } 8004c3e: bf00 nop 8004c40: 370c adds r7, #12 8004c42: 46bd mov sp, r7 8004c44: bc80 pop {r7} 8004c46: 4770 bx lr 8004c48: 6c000800 .word 0x6c000800 08004c4c : //¶Á¼Ä´æÆ÷ //LCD_Reg:¼Ä´æÆ÷µØÖ· //·µ»ØÖµ:¶Áµ½µÄÊý¾Ý uint16_t LCD_ReadReg(uint16_t LCD_Reg) { 8004c4c: b480 push {r7} 8004c4e: b083 sub sp, #12 8004c50: af00 add r7, sp, #0 8004c52: 4603 mov r3, r0 8004c54: 80fb strh r3, [r7, #6] LCD_REG_ADDRESS=LCD_Reg; //дÈëÒª¶ÁµÄ¼Ä´æÆ÷ÐòºÅ 8004c56: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000 8004c5a: 88fb ldrh r3, [r7, #6] 8004c5c: 8013 strh r3, [r2, #0] //delay_us(5); return LCD_DATA_ADDRESS; //·µ»Ø¶Áµ½µÄÖµ 8004c5e: 4b04 ldr r3, [pc, #16] ; (8004c70 ) 8004c60: 881b ldrh r3, [r3, #0] 8004c62: b29b uxth r3, r3 } 8004c64: 4618 mov r0, r3 8004c66: 370c adds r7, #12 8004c68: 46bd mov sp, r7 8004c6a: bc80 pop {r7} 8004c6c: 4770 bx lr 8004c6e: bf00 nop 8004c70: 6c000800 .word 0x6c000800 08004c74 : //×¢Òâ:ÆäËûº¯Êý¿ÉÄÜ»áÊܵ½´Ëº¯ÊýÉèÖõÄÓ°Ïì(ÓÈÆäÊÇ9341/6804ÕâÁ½¸öÆæÝâ), //ËùÒÔ,Ò»°ãÉèÖÃΪL2R_U2D¼´¿É,Èç¹ûÉèÖÃΪÆäËûɨÃ跽ʽ,¿ÉÄܵ¼ÖÂÏÔʾ²»Õý³£. //dir:0~7,´ú±í8¸ö·½Ïò(¾ßÌ嶨Òå¼ûlcd.h) //9320/9325/9328/4531/4535/1505/b505/8989/5408/9341/5310µÈICÒѾ­Êµ¼Ê²âÊÔ void LCD_Scan_Dir(uint8_t dir) { 8004c74: b580 push {r7, lr} 8004c76: b084 sub sp, #16 8004c78: af00 add r7, sp, #0 8004c7a: 4603 mov r3, r0 8004c7c: 71fb strb r3, [r7, #7] uint16_t regval=0; 8004c7e: 2300 movs r3, #0 8004c80: 81fb strh r3, [r7, #14] uint8_t dirreg=0; 8004c82: 2300 movs r3, #0 8004c84: 737b strb r3, [r7, #13] uint16_t temp; if(lcddev.dir==1&&lcddev.id!=0X6804)//ºáÆÁʱ£¬¶Ô6804²»¸Ä±äɨÃè·½Ïò£¡ 8004c86: 4ba8 ldr r3, [pc, #672] ; (8004f28 ) 8004c88: 799b ldrb r3, [r3, #6] 8004c8a: 2b01 cmp r3, #1 8004c8c: d134 bne.n 8004cf8 8004c8e: 4ba6 ldr r3, [pc, #664] ; (8004f28 ) 8004c90: 889b ldrh r3, [r3, #4] 8004c92: f646 0204 movw r2, #26628 ; 0x6804 8004c96: 4293 cmp r3, r2 8004c98: d02e beq.n 8004cf8 { switch(dir)//·½Ïòת»» 8004c9a: 79fb ldrb r3, [r7, #7] 8004c9c: 2b07 cmp r3, #7 8004c9e: d82c bhi.n 8004cfa 8004ca0: a201 add r2, pc, #4 ; (adr r2, 8004ca8 ) 8004ca2: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004ca6: bf00 nop 8004ca8: 08004cc9 .word 0x08004cc9 8004cac: 08004ccf .word 0x08004ccf 8004cb0: 08004cd5 .word 0x08004cd5 8004cb4: 08004cdb .word 0x08004cdb 8004cb8: 08004ce1 .word 0x08004ce1 8004cbc: 08004ce7 .word 0x08004ce7 8004cc0: 08004ced .word 0x08004ced 8004cc4: 08004cf3 .word 0x08004cf3 { case 0:dir=6;break; 8004cc8: 2306 movs r3, #6 8004cca: 71fb strb r3, [r7, #7] 8004ccc: e015 b.n 8004cfa case 1:dir=7;break; 8004cce: 2307 movs r3, #7 8004cd0: 71fb strb r3, [r7, #7] 8004cd2: e012 b.n 8004cfa case 2:dir=4;break; 8004cd4: 2304 movs r3, #4 8004cd6: 71fb strb r3, [r7, #7] 8004cd8: e00f b.n 8004cfa case 3:dir=5;break; 8004cda: 2305 movs r3, #5 8004cdc: 71fb strb r3, [r7, #7] 8004cde: e00c b.n 8004cfa case 4:dir=1;break; 8004ce0: 2301 movs r3, #1 8004ce2: 71fb strb r3, [r7, #7] 8004ce4: e009 b.n 8004cfa case 5:dir=0;break; 8004ce6: 2300 movs r3, #0 8004ce8: 71fb strb r3, [r7, #7] 8004cea: e006 b.n 8004cfa case 6:dir=3;break; 8004cec: 2303 movs r3, #3 8004cee: 71fb strb r3, [r7, #7] 8004cf0: e003 b.n 8004cfa case 7:dir=2;break; 8004cf2: 2302 movs r3, #2 8004cf4: 71fb strb r3, [r7, #7] 8004cf6: e000 b.n 8004cfa } } 8004cf8: bf00 nop if(lcddev.id==0x9341||lcddev.id==0X6804||lcddev.id==0X5310)//9341/6804/5310,ºÜÌØÊâ 8004cfa: 4b8b ldr r3, [pc, #556] ; (8004f28 ) 8004cfc: 889b ldrh r3, [r3, #4] 8004cfe: f249 3241 movw r2, #37697 ; 0x9341 8004d02: 4293 cmp r3, r2 8004d04: d00c beq.n 8004d20 8004d06: 4b88 ldr r3, [pc, #544] ; (8004f28 ) 8004d08: 889b ldrh r3, [r3, #4] 8004d0a: f646 0204 movw r2, #26628 ; 0x6804 8004d0e: 4293 cmp r3, r2 8004d10: d006 beq.n 8004d20 8004d12: 4b85 ldr r3, [pc, #532] ; (8004f28 ) 8004d14: 889b ldrh r3, [r3, #4] 8004d16: f245 3210 movw r2, #21264 ; 0x5310 8004d1a: 4293 cmp r3, r2 8004d1c: f040 80bb bne.w 8004e96 { switch(dir) 8004d20: 79fb ldrb r3, [r7, #7] 8004d22: 2b07 cmp r3, #7 8004d24: d835 bhi.n 8004d92 8004d26: a201 add r2, pc, #4 ; (adr r2, 8004d2c ) 8004d28: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004d2c: 08004d93 .word 0x08004d93 8004d30: 08004d4d .word 0x08004d4d 8004d34: 08004d57 .word 0x08004d57 8004d38: 08004d61 .word 0x08004d61 8004d3c: 08004d6b .word 0x08004d6b 8004d40: 08004d75 .word 0x08004d75 8004d44: 08004d7f .word 0x08004d7f 8004d48: 08004d89 .word 0x08004d89 { case L2R_U2D://´Ó×óµ½ÓÒ,´ÓÉϵ½Ï regval|=(0<<7)|(0<<6)|(0<<5); break; case L2R_D2U://´Ó×óµ½ÓÒ,´Óϵ½ÉÏ regval|=(1<<7)|(0<<6)|(0<<5); 8004d4c: 89fb ldrh r3, [r7, #14] 8004d4e: f043 0380 orr.w r3, r3, #128 ; 0x80 8004d52: 81fb strh r3, [r7, #14] break; 8004d54: e01d b.n 8004d92 case R2L_U2D://´ÓÓÒµ½×ó,´ÓÉϵ½Ï regval|=(0<<7)|(1<<6)|(0<<5); 8004d56: 89fb ldrh r3, [r7, #14] 8004d58: f043 0340 orr.w r3, r3, #64 ; 0x40 8004d5c: 81fb strh r3, [r7, #14] break; 8004d5e: e018 b.n 8004d92 case R2L_D2U://´ÓÓÒµ½×ó,´Óϵ½ÉÏ regval|=(1<<7)|(1<<6)|(0<<5); 8004d60: 89fb ldrh r3, [r7, #14] 8004d62: f043 03c0 orr.w r3, r3, #192 ; 0xc0 8004d66: 81fb strh r3, [r7, #14] break; 8004d68: e013 b.n 8004d92 case U2D_L2R://´ÓÉϵ½ÏÂ,´Ó×óµ½ÓÒ regval|=(0<<7)|(0<<6)|(1<<5); 8004d6a: 89fb ldrh r3, [r7, #14] 8004d6c: f043 0320 orr.w r3, r3, #32 8004d70: 81fb strh r3, [r7, #14] break; 8004d72: e00e b.n 8004d92 case U2D_R2L://´ÓÉϵ½ÏÂ,´ÓÓÒµ½×ó regval|=(0<<7)|(1<<6)|(1<<5); 8004d74: 89fb ldrh r3, [r7, #14] 8004d76: f043 0360 orr.w r3, r3, #96 ; 0x60 8004d7a: 81fb strh r3, [r7, #14] break; 8004d7c: e009 b.n 8004d92 case D2U_L2R://´Óϵ½ÉÏ,´Ó×óµ½ÓÒ regval|=(1<<7)|(0<<6)|(1<<5); 8004d7e: 89fb ldrh r3, [r7, #14] 8004d80: f043 03a0 orr.w r3, r3, #160 ; 0xa0 8004d84: 81fb strh r3, [r7, #14] break; 8004d86: e004 b.n 8004d92 case D2U_R2L://´Óϵ½ÉÏ,´ÓÓÒµ½×ó regval|=(1<<7)|(1<<6)|(1<<5); 8004d88: 89fb ldrh r3, [r7, #14] 8004d8a: f043 03e0 orr.w r3, r3, #224 ; 0xe0 8004d8e: 81fb strh r3, [r7, #14] break; 8004d90: bf00 nop } dirreg=0X36; 8004d92: 2336 movs r3, #54 ; 0x36 8004d94: 737b strb r3, [r7, #13] if(lcddev.id!=0X5310)regval|=0X08;//5310²»ÐèÒªBGR 8004d96: 4b64 ldr r3, [pc, #400] ; (8004f28 ) 8004d98: 889b ldrh r3, [r3, #4] 8004d9a: f245 3210 movw r2, #21264 ; 0x5310 8004d9e: 4293 cmp r3, r2 8004da0: d003 beq.n 8004daa 8004da2: 89fb ldrh r3, [r7, #14] 8004da4: f043 0308 orr.w r3, r3, #8 8004da8: 81fb strh r3, [r7, #14] if(lcddev.id==0X6804)regval|=0x02;//6804µÄBIT6ºÍ9341µÄ·´ÁË 8004daa: 4b5f ldr r3, [pc, #380] ; (8004f28 ) 8004dac: 889b ldrh r3, [r3, #4] 8004dae: f646 0204 movw r2, #26628 ; 0x6804 8004db2: 4293 cmp r3, r2 8004db4: d103 bne.n 8004dbe 8004db6: 89fb ldrh r3, [r7, #14] 8004db8: f043 0302 orr.w r3, r3, #2 8004dbc: 81fb strh r3, [r7, #14] LCD_WriteReg(dirreg,regval); 8004dbe: 7b7b ldrb r3, [r7, #13] 8004dc0: b29b uxth r3, r3 8004dc2: 89fa ldrh r2, [r7, #14] 8004dc4: 4611 mov r1, r2 8004dc6: 4618 mov r0, r3 8004dc8: f7ff ff2a bl 8004c20 if((regval&0X20)||lcddev.dir==1) 8004dcc: 89fb ldrh r3, [r7, #14] 8004dce: f003 0320 and.w r3, r3, #32 8004dd2: 2b00 cmp r3, #0 8004dd4: d103 bne.n 8004dde 8004dd6: 4b54 ldr r3, [pc, #336] ; (8004f28 ) 8004dd8: 799b ldrb r3, [r3, #6] 8004dda: 2b01 cmp r3, #1 8004ddc: d110 bne.n 8004e00 { if(lcddev.width) 8004de0: 881a ldrh r2, [r3, #0] 8004de2: 4b51 ldr r3, [pc, #324] ; (8004f28 ) 8004de4: 885b ldrh r3, [r3, #2] 8004de6: 429a cmp r2, r3 8004de8: d21a bcs.n 8004e20 { temp=lcddev.width; 8004dea: 4b4f ldr r3, [pc, #316] ; (8004f28 ) 8004dec: 881b ldrh r3, [r3, #0] 8004dee: 817b strh r3, [r7, #10] lcddev.width=lcddev.height; 8004df0: 4b4d ldr r3, [pc, #308] ; (8004f28 ) 8004df2: 885a ldrh r2, [r3, #2] 8004df4: 4b4c ldr r3, [pc, #304] ; (8004f28 ) 8004df6: 801a strh r2, [r3, #0] lcddev.height=temp; 8004df8: 4a4b ldr r2, [pc, #300] ; (8004f28 ) 8004dfa: 897b ldrh r3, [r7, #10] 8004dfc: 8053 strh r3, [r2, #2] if(lcddev.width } }else { if(lcddev.width>lcddev.height)//½»»»X,Y 8004e00: 4b49 ldr r3, [pc, #292] ; (8004f28 ) 8004e02: 881a ldrh r2, [r3, #0] 8004e04: 4b48 ldr r3, [pc, #288] ; (8004f28 ) 8004e06: 885b ldrh r3, [r3, #2] 8004e08: 429a cmp r2, r3 8004e0a: d909 bls.n 8004e20 { temp=lcddev.width; 8004e0c: 4b46 ldr r3, [pc, #280] ; (8004f28 ) 8004e0e: 881b ldrh r3, [r3, #0] 8004e10: 817b strh r3, [r7, #10] lcddev.width=lcddev.height; 8004e12: 4b45 ldr r3, [pc, #276] ; (8004f28 ) 8004e14: 885a ldrh r2, [r3, #2] 8004e16: 4b44 ldr r3, [pc, #272] ; (8004f28 ) 8004e18: 801a strh r2, [r3, #0] lcddev.height=temp; 8004e1a: 4a43 ldr r2, [pc, #268] ; (8004f28 ) 8004e1c: 897b ldrh r3, [r7, #10] 8004e1e: 8053 strh r3, [r2, #2] } } LCD_WR_REG(lcddev.setxcmd); 8004e20: 4b41 ldr r3, [pc, #260] ; (8004f28 ) 8004e22: 7a1b ldrb r3, [r3, #8] 8004e24: b29b uxth r3, r3 8004e26: 4618 mov r0, r3 8004e28: f7ff fedc bl 8004be4 LCD_WR_DATA(0);LCD_WR_DATA(0); 8004e2c: 2000 movs r0, #0 8004e2e: f7ff fee7 bl 8004c00 8004e32: 2000 movs r0, #0 8004e34: f7ff fee4 bl 8004c00 LCD_WR_DATA((lcddev.width-1)>>8);LCD_WR_DATA((lcddev.width-1)&0XFF); 8004e38: 4b3b ldr r3, [pc, #236] ; (8004f28 ) 8004e3a: 881b ldrh r3, [r3, #0] 8004e3c: 3b01 subs r3, #1 8004e3e: 121b asrs r3, r3, #8 8004e40: b29b uxth r3, r3 8004e42: 4618 mov r0, r3 8004e44: f7ff fedc bl 8004c00 8004e48: 4b37 ldr r3, [pc, #220] ; (8004f28 ) 8004e4a: 881b ldrh r3, [r3, #0] 8004e4c: 3b01 subs r3, #1 8004e4e: b29b uxth r3, r3 8004e50: b2db uxtb r3, r3 8004e52: b29b uxth r3, r3 8004e54: 4618 mov r0, r3 8004e56: f7ff fed3 bl 8004c00 LCD_WR_REG(lcddev.setycmd); 8004e5a: 4b33 ldr r3, [pc, #204] ; (8004f28 ) 8004e5c: 7a5b ldrb r3, [r3, #9] 8004e5e: b29b uxth r3, r3 8004e60: 4618 mov r0, r3 8004e62: f7ff febf bl 8004be4 LCD_WR_DATA(0);LCD_WR_DATA(0); 8004e66: 2000 movs r0, #0 8004e68: f7ff feca bl 8004c00 8004e6c: 2000 movs r0, #0 8004e6e: f7ff fec7 bl 8004c00 LCD_WR_DATA((lcddev.height-1)>>8);LCD_WR_DATA((lcddev.height-1)&0XFF); 8004e72: 4b2d ldr r3, [pc, #180] ; (8004f28 ) 8004e74: 885b ldrh r3, [r3, #2] 8004e76: 3b01 subs r3, #1 8004e78: 121b asrs r3, r3, #8 8004e7a: b29b uxth r3, r3 8004e7c: 4618 mov r0, r3 8004e7e: f7ff febf bl 8004c00 8004e82: 4b29 ldr r3, [pc, #164] ; (8004f28 ) 8004e84: 885b ldrh r3, [r3, #2] 8004e86: 3b01 subs r3, #1 8004e88: b29b uxth r3, r3 8004e8a: b2db uxtb r3, r3 8004e8c: b29b uxth r3, r3 8004e8e: 4618 mov r0, r3 8004e90: f7ff feb6 bl 8004c00 8004e94: e058 b.n 8004f48 }else { switch(dir) 8004e96: 79fb ldrb r3, [r7, #7] 8004e98: 2b07 cmp r3, #7 8004e9a: d836 bhi.n 8004f0a 8004e9c: a201 add r2, pc, #4 ; (adr r2, 8004ea4 ) 8004e9e: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004ea2: bf00 nop 8004ea4: 08004ec5 .word 0x08004ec5 8004ea8: 08004ecf .word 0x08004ecf 8004eac: 08004ed9 .word 0x08004ed9 8004eb0: 08004f0b .word 0x08004f0b 8004eb4: 08004ee3 .word 0x08004ee3 8004eb8: 08004eed .word 0x08004eed 8004ebc: 08004ef7 .word 0x08004ef7 8004ec0: 08004f01 .word 0x08004f01 { case L2R_U2D://´Ó×óµ½ÓÒ,´ÓÉϵ½Ï regval|=(1<<5)|(1<<4)|(0<<3); 8004ec4: 89fb ldrh r3, [r7, #14] 8004ec6: f043 0330 orr.w r3, r3, #48 ; 0x30 8004eca: 81fb strh r3, [r7, #14] break; 8004ecc: e01d b.n 8004f0a case L2R_D2U://´Ó×óµ½ÓÒ,´Óϵ½ÉÏ regval|=(0<<5)|(1<<4)|(0<<3); 8004ece: 89fb ldrh r3, [r7, #14] 8004ed0: f043 0310 orr.w r3, r3, #16 8004ed4: 81fb strh r3, [r7, #14] break; 8004ed6: e018 b.n 8004f0a case R2L_U2D://´ÓÓÒµ½×ó,´ÓÉϵ½Ï regval|=(1<<5)|(0<<4)|(0<<3); 8004ed8: 89fb ldrh r3, [r7, #14] 8004eda: f043 0320 orr.w r3, r3, #32 8004ede: 81fb strh r3, [r7, #14] break; 8004ee0: e013 b.n 8004f0a case R2L_D2U://´ÓÓÒµ½×ó,´Óϵ½ÉÏ regval|=(0<<5)|(0<<4)|(0<<3); break; case U2D_L2R://´ÓÉϵ½ÏÂ,´Ó×óµ½ÓÒ regval|=(1<<5)|(1<<4)|(1<<3); 8004ee2: 89fb ldrh r3, [r7, #14] 8004ee4: f043 0338 orr.w r3, r3, #56 ; 0x38 8004ee8: 81fb strh r3, [r7, #14] break; 8004eea: e00e b.n 8004f0a case U2D_R2L://´ÓÉϵ½ÏÂ,´ÓÓÒµ½×ó regval|=(1<<5)|(0<<4)|(1<<3); 8004eec: 89fb ldrh r3, [r7, #14] 8004eee: f043 0328 orr.w r3, r3, #40 ; 0x28 8004ef2: 81fb strh r3, [r7, #14] break; 8004ef4: e009 b.n 8004f0a case D2U_L2R://´Óϵ½ÉÏ,´Ó×óµ½ÓÒ regval|=(0<<5)|(1<<4)|(1<<3); 8004ef6: 89fb ldrh r3, [r7, #14] 8004ef8: f043 0318 orr.w r3, r3, #24 8004efc: 81fb strh r3, [r7, #14] break; 8004efe: e004 b.n 8004f0a case D2U_R2L://´Óϵ½ÉÏ,´ÓÓÒµ½×ó regval|=(0<<5)|(0<<4)|(1<<3); 8004f00: 89fb ldrh r3, [r7, #14] 8004f02: f043 0308 orr.w r3, r3, #8 8004f06: 81fb strh r3, [r7, #14] break; 8004f08: bf00 nop } if(lcddev.id==0x8989)//8989 IC 8004f0a: 4b07 ldr r3, [pc, #28] ; (8004f28 ) 8004f0c: 889b ldrh r3, [r3, #4] 8004f0e: f648 1289 movw r2, #35209 ; 0x8989 8004f12: 4293 cmp r3, r2 8004f14: d10a bne.n 8004f2c { dirreg=0X11; 8004f16: 2311 movs r3, #17 8004f18: 737b strb r3, [r7, #13] regval|=0X6040; //65K 8004f1a: 89fb ldrh r3, [r7, #14] 8004f1c: f443 43c0 orr.w r3, r3, #24576 ; 0x6000 8004f20: f043 0340 orr.w r3, r3, #64 ; 0x40 8004f24: 81fb strh r3, [r7, #14] 8004f26: e007 b.n 8004f38 8004f28: 20000354 .word 0x20000354 }else//ÆäËûÇý¶¯IC { dirreg=0X03; 8004f2c: 2303 movs r3, #3 8004f2e: 737b strb r3, [r7, #13] regval|=1<<12; 8004f30: 89fb ldrh r3, [r7, #14] 8004f32: f443 5380 orr.w r3, r3, #4096 ; 0x1000 8004f36: 81fb strh r3, [r7, #14] } LCD_WriteReg(dirreg,regval); 8004f38: 7b7b ldrb r3, [r7, #13] 8004f3a: b29b uxth r3, r3 8004f3c: 89fa ldrh r2, [r7, #14] 8004f3e: 4611 mov r1, r2 8004f40: 4618 mov r0, r3 8004f42: f7ff fe6d bl 8004c20 } } 8004f46: bf00 nop 8004f48: bf00 nop 8004f4a: 3710 adds r7, #16 8004f4c: 46bd mov sp, r7 8004f4e: bd80 pop {r7, pc} 08004f50 : //ÉèÖÃLCDÏÔʾ·½Ïò //dir:0,ÊúÆÁ£»1,ºáÆÁ void LCD_Display_Dir(uint8_t dir) { 8004f50: b580 push {r7, lr} 8004f52: b082 sub sp, #8 8004f54: af00 add r7, sp, #0 8004f56: 4603 mov r3, r0 8004f58: 71fb strb r3, [r7, #7] if(dir==0) //ÊúÆÁ 8004f5a: 79fb ldrb r3, [r7, #7] 8004f5c: 2b00 cmp r3, #0 8004f5e: d154 bne.n 800500a { lcddev.dir=0; //ÊúÆÁ 8004f60: 4b5d ldr r3, [pc, #372] ; (80050d8 ) 8004f62: 2200 movs r2, #0 8004f64: 719a strb r2, [r3, #6] lcddev.width=240; 8004f66: 4b5c ldr r3, [pc, #368] ; (80050d8 ) 8004f68: 22f0 movs r2, #240 ; 0xf0 8004f6a: 801a strh r2, [r3, #0] lcddev.height=320; 8004f6c: 4b5a ldr r3, [pc, #360] ; (80050d8 ) 8004f6e: f44f 72a0 mov.w r2, #320 ; 0x140 8004f72: 805a strh r2, [r3, #2] if(lcddev.id==0X9341||lcddev.id==0X6804||lcddev.id==0X5310) 8004f74: 4b58 ldr r3, [pc, #352] ; (80050d8 ) 8004f76: 889b ldrh r3, [r3, #4] 8004f78: f249 3241 movw r2, #37697 ; 0x9341 8004f7c: 4293 cmp r3, r2 8004f7e: d00b beq.n 8004f98 8004f80: 4b55 ldr r3, [pc, #340] ; (80050d8 ) 8004f82: 889b ldrh r3, [r3, #4] 8004f84: f646 0204 movw r2, #26628 ; 0x6804 8004f88: 4293 cmp r3, r2 8004f8a: d005 beq.n 8004f98 8004f8c: 4b52 ldr r3, [pc, #328] ; (80050d8 ) 8004f8e: 889b ldrh r3, [r3, #4] 8004f90: f245 3210 movw r2, #21264 ; 0x5310 8004f94: 4293 cmp r3, r2 8004f96: d11e bne.n 8004fd6 { lcddev.wramcmd=0X2C; 8004f98: 4b4f ldr r3, [pc, #316] ; (80050d8 ) 8004f9a: 222c movs r2, #44 ; 0x2c 8004f9c: 71da strb r2, [r3, #7] lcddev.setxcmd=0X2A; 8004f9e: 4b4e ldr r3, [pc, #312] ; (80050d8 ) 8004fa0: 222a movs r2, #42 ; 0x2a 8004fa2: 721a strb r2, [r3, #8] lcddev.setycmd=0X2B; 8004fa4: 4b4c ldr r3, [pc, #304] ; (80050d8 ) 8004fa6: 222b movs r2, #43 ; 0x2b 8004fa8: 725a strb r2, [r3, #9] if(lcddev.id==0X6804||lcddev.id==0X5310) 8004faa: 4b4b ldr r3, [pc, #300] ; (80050d8 ) 8004fac: 889b ldrh r3, [r3, #4] 8004fae: f646 0204 movw r2, #26628 ; 0x6804 8004fb2: 4293 cmp r3, r2 8004fb4: d006 beq.n 8004fc4 8004fb6: 4b48 ldr r3, [pc, #288] ; (80050d8 ) 8004fb8: 889b ldrh r3, [r3, #4] 8004fba: f245 3210 movw r2, #21264 ; 0x5310 8004fbe: 4293 cmp r3, r2 8004fc0: f040 8081 bne.w 80050c6 { lcddev.width=320; 8004fc4: 4b44 ldr r3, [pc, #272] ; (80050d8 ) 8004fc6: f44f 72a0 mov.w r2, #320 ; 0x140 8004fca: 801a strh r2, [r3, #0] lcddev.height=480; 8004fcc: 4b42 ldr r3, [pc, #264] ; (80050d8 ) 8004fce: f44f 72f0 mov.w r2, #480 ; 0x1e0 8004fd2: 805a strh r2, [r3, #2] if(lcddev.id==0X6804||lcddev.id==0X5310) 8004fd4: e077 b.n 80050c6 } }else if(lcddev.id==0X8989) 8004fd6: 4b40 ldr r3, [pc, #256] ; (80050d8 ) 8004fd8: 889b ldrh r3, [r3, #4] 8004fda: f648 1289 movw r2, #35209 ; 0x8989 8004fde: 4293 cmp r3, r2 8004fe0: d109 bne.n 8004ff6 { lcddev.wramcmd=R34; 8004fe2: 4b3d ldr r3, [pc, #244] ; (80050d8 ) 8004fe4: 2222 movs r2, #34 ; 0x22 8004fe6: 71da strb r2, [r3, #7] lcddev.setxcmd=0X4E; 8004fe8: 4b3b ldr r3, [pc, #236] ; (80050d8 ) 8004fea: 224e movs r2, #78 ; 0x4e 8004fec: 721a strb r2, [r3, #8] lcddev.setycmd=0X4F; 8004fee: 4b3a ldr r3, [pc, #232] ; (80050d8 ) 8004ff0: 224f movs r2, #79 ; 0x4f 8004ff2: 725a strb r2, [r3, #9] 8004ff4: e068 b.n 80050c8 }else { lcddev.wramcmd=R34; 8004ff6: 4b38 ldr r3, [pc, #224] ; (80050d8 ) 8004ff8: 2222 movs r2, #34 ; 0x22 8004ffa: 71da strb r2, [r3, #7] lcddev.setxcmd=R32; 8004ffc: 4b36 ldr r3, [pc, #216] ; (80050d8 ) 8004ffe: 2220 movs r2, #32 8005000: 721a strb r2, [r3, #8] lcddev.setycmd=R33; 8005002: 4b35 ldr r3, [pc, #212] ; (80050d8 ) 8005004: 2221 movs r2, #33 ; 0x21 8005006: 725a strb r2, [r3, #9] 8005008: e05e b.n 80050c8 } }else //ºáÆÁ { lcddev.dir=1; //ºáÆÁ 800500a: 4b33 ldr r3, [pc, #204] ; (80050d8 ) 800500c: 2201 movs r2, #1 800500e: 719a strb r2, [r3, #6] lcddev.width=320; 8005010: 4b31 ldr r3, [pc, #196] ; (80050d8 ) 8005012: f44f 72a0 mov.w r2, #320 ; 0x140 8005016: 801a strh r2, [r3, #0] lcddev.height=240; 8005018: 4b2f ldr r3, [pc, #188] ; (80050d8 ) 800501a: 22f0 movs r2, #240 ; 0xf0 800501c: 805a strh r2, [r3, #2] if(lcddev.id==0X9341||lcddev.id==0X5310) 800501e: 4b2e ldr r3, [pc, #184] ; (80050d8 ) 8005020: 889b ldrh r3, [r3, #4] 8005022: f249 3241 movw r2, #37697 ; 0x9341 8005026: 4293 cmp r3, r2 8005028: d005 beq.n 8005036 800502a: 4b2b ldr r3, [pc, #172] ; (80050d8 ) 800502c: 889b ldrh r3, [r3, #4] 800502e: f245 3210 movw r2, #21264 ; 0x5310 8005032: 4293 cmp r3, r2 8005034: d109 bne.n 800504a { lcddev.wramcmd=0X2C; 8005036: 4b28 ldr r3, [pc, #160] ; (80050d8 ) 8005038: 222c movs r2, #44 ; 0x2c 800503a: 71da strb r2, [r3, #7] lcddev.setxcmd=0X2A; 800503c: 4b26 ldr r3, [pc, #152] ; (80050d8 ) 800503e: 222a movs r2, #42 ; 0x2a 8005040: 721a strb r2, [r3, #8] lcddev.setycmd=0X2B; 8005042: 4b25 ldr r3, [pc, #148] ; (80050d8 ) 8005044: 222b movs r2, #43 ; 0x2b 8005046: 725a strb r2, [r3, #9] 8005048: e028 b.n 800509c }else if(lcddev.id==0X6804) 800504a: 4b23 ldr r3, [pc, #140] ; (80050d8 ) 800504c: 889b ldrh r3, [r3, #4] 800504e: f646 0204 movw r2, #26628 ; 0x6804 8005052: 4293 cmp r3, r2 8005054: d109 bne.n 800506a { lcddev.wramcmd=0X2C; 8005056: 4b20 ldr r3, [pc, #128] ; (80050d8 ) 8005058: 222c movs r2, #44 ; 0x2c 800505a: 71da strb r2, [r3, #7] lcddev.setxcmd=0X2B; 800505c: 4b1e ldr r3, [pc, #120] ; (80050d8 ) 800505e: 222b movs r2, #43 ; 0x2b 8005060: 721a strb r2, [r3, #8] lcddev.setycmd=0X2A; 8005062: 4b1d ldr r3, [pc, #116] ; (80050d8 ) 8005064: 222a movs r2, #42 ; 0x2a 8005066: 725a strb r2, [r3, #9] 8005068: e018 b.n 800509c }else if(lcddev.id==0X8989) 800506a: 4b1b ldr r3, [pc, #108] ; (80050d8 ) 800506c: 889b ldrh r3, [r3, #4] 800506e: f648 1289 movw r2, #35209 ; 0x8989 8005072: 4293 cmp r3, r2 8005074: d109 bne.n 800508a { lcddev.wramcmd=R34; 8005076: 4b18 ldr r3, [pc, #96] ; (80050d8 ) 8005078: 2222 movs r2, #34 ; 0x22 800507a: 71da strb r2, [r3, #7] lcddev.setxcmd=0X4F; 800507c: 4b16 ldr r3, [pc, #88] ; (80050d8 ) 800507e: 224f movs r2, #79 ; 0x4f 8005080: 721a strb r2, [r3, #8] lcddev.setycmd=0X4E; 8005082: 4b15 ldr r3, [pc, #84] ; (80050d8 ) 8005084: 224e movs r2, #78 ; 0x4e 8005086: 725a strb r2, [r3, #9] 8005088: e008 b.n 800509c }else { lcddev.wramcmd=R34; 800508a: 4b13 ldr r3, [pc, #76] ; (80050d8 ) 800508c: 2222 movs r2, #34 ; 0x22 800508e: 71da strb r2, [r3, #7] lcddev.setxcmd=R33; 8005090: 4b11 ldr r3, [pc, #68] ; (80050d8 ) 8005092: 2221 movs r2, #33 ; 0x21 8005094: 721a strb r2, [r3, #8] lcddev.setycmd=R32; 8005096: 4b10 ldr r3, [pc, #64] ; (80050d8 ) 8005098: 2220 movs r2, #32 800509a: 725a strb r2, [r3, #9] } if(lcddev.id==0X6804||lcddev.id==0X5310) 800509c: 4b0e ldr r3, [pc, #56] ; (80050d8 ) 800509e: 889b ldrh r3, [r3, #4] 80050a0: f646 0204 movw r2, #26628 ; 0x6804 80050a4: 4293 cmp r3, r2 80050a6: d005 beq.n 80050b4 80050a8: 4b0b ldr r3, [pc, #44] ; (80050d8 ) 80050aa: 889b ldrh r3, [r3, #4] 80050ac: f245 3210 movw r2, #21264 ; 0x5310 80050b0: 4293 cmp r3, r2 80050b2: d109 bne.n 80050c8 { lcddev.width=480; 80050b4: 4b08 ldr r3, [pc, #32] ; (80050d8 ) 80050b6: f44f 72f0 mov.w r2, #480 ; 0x1e0 80050ba: 801a strh r2, [r3, #0] lcddev.height=320; 80050bc: 4b06 ldr r3, [pc, #24] ; (80050d8 ) 80050be: f44f 72a0 mov.w r2, #320 ; 0x140 80050c2: 805a strh r2, [r3, #2] 80050c4: e000 b.n 80050c8 if(lcddev.id==0X6804||lcddev.id==0X5310) 80050c6: bf00 nop } } LCD_Scan_Dir(DFT_SCAN_DIR); //ĬÈÏɨÃè·½Ïò 80050c8: 2000 movs r0, #0 80050ca: f7ff fdd3 bl 8004c74 } 80050ce: bf00 nop 80050d0: 3708 adds r7, #8 80050d2: 46bd mov sp, r7 80050d4: bd80 pop {r7, pc} 80050d6: bf00 nop 80050d8: 20000354 .word 0x20000354 080050dc : //³õʼ»¯lcd //¸Ã³õʼ»¯º¯Êý¿ÉÒÔ³õʼ»¯¸÷ÖÖÒº¾§! void LCDx_Init(void) { 80050dc: b580 push {r7, lr} 80050de: af00 add r7, sp, #0 HAL_Delay(50); // delay 50 ms 80050e0: 2032 movs r0, #50 ; 0x32 80050e2: f7fc fd53 bl 8001b8c LCD_WriteReg(0x0000,0x0001); 80050e6: 2101 movs r1, #1 80050e8: 2000 movs r0, #0 80050ea: f7ff fd99 bl 8004c20 HAL_Delay(50); // delay 50 ms 80050ee: 2032 movs r0, #50 ; 0x32 80050f0: f7fc fd4c bl 8001b8c lcddev.id = LCD_ReadReg(0x0000); 80050f4: 2000 movs r0, #0 80050f6: f7ff fda9 bl 8004c4c 80050fa: 4603 mov r3, r0 80050fc: 461a mov r2, r3 80050fe: 4b70 ldr r3, [pc, #448] ; (80052c0 ) 8005100: 809a strh r2, [r3, #4] LCD_WriteReg(0x00E5,0x78F0); 8005102: f647 01f0 movw r1, #30960 ; 0x78f0 8005106: 20e5 movs r0, #229 ; 0xe5 8005108: f7ff fd8a bl 8004c20 LCD_WriteReg(0x0001,0x0100); 800510c: f44f 7180 mov.w r1, #256 ; 0x100 8005110: 2001 movs r0, #1 8005112: f7ff fd85 bl 8004c20 LCD_WriteReg(0x0002,0x0700); 8005116: f44f 61e0 mov.w r1, #1792 ; 0x700 800511a: 2002 movs r0, #2 800511c: f7ff fd80 bl 8004c20 LCD_WriteReg(0x0003,0x1030); 8005120: f241 0130 movw r1, #4144 ; 0x1030 8005124: 2003 movs r0, #3 8005126: f7ff fd7b bl 8004c20 LCD_WriteReg(0x0004,0x0000); 800512a: 2100 movs r1, #0 800512c: 2004 movs r0, #4 800512e: f7ff fd77 bl 8004c20 LCD_WriteReg(0x0008,0x0202); 8005132: f240 2102 movw r1, #514 ; 0x202 8005136: 2008 movs r0, #8 8005138: f7ff fd72 bl 8004c20 LCD_WriteReg(0x0009,0x0000); 800513c: 2100 movs r1, #0 800513e: 2009 movs r0, #9 8005140: f7ff fd6e bl 8004c20 LCD_WriteReg(0x000A,0x0000); 8005144: 2100 movs r1, #0 8005146: 200a movs r0, #10 8005148: f7ff fd6a bl 8004c20 LCD_WriteReg(0x000C,0x0000); 800514c: 2100 movs r1, #0 800514e: 200c movs r0, #12 8005150: f7ff fd66 bl 8004c20 LCD_WriteReg(0x000D,0x0000); 8005154: 2100 movs r1, #0 8005156: 200d movs r0, #13 8005158: f7ff fd62 bl 8004c20 LCD_WriteReg(0x000F,0x0000); 800515c: 2100 movs r1, #0 800515e: 200f movs r0, #15 8005160: f7ff fd5e bl 8004c20 //power on sequence VGHVGL LCD_WriteReg(0x0010,0x0000); 8005164: 2100 movs r1, #0 8005166: 2010 movs r0, #16 8005168: f7ff fd5a bl 8004c20 LCD_WriteReg(0x0011,0x0007); 800516c: 2107 movs r1, #7 800516e: 2011 movs r0, #17 8005170: f7ff fd56 bl 8004c20 LCD_WriteReg(0x0012,0x0000); 8005174: 2100 movs r1, #0 8005176: 2012 movs r0, #18 8005178: f7ff fd52 bl 8004c20 LCD_WriteReg(0x0013,0x0000); 800517c: 2100 movs r1, #0 800517e: 2013 movs r0, #19 8005180: f7ff fd4e bl 8004c20 LCD_WriteReg(0x0007,0x0000); 8005184: 2100 movs r1, #0 8005186: 2007 movs r0, #7 8005188: f7ff fd4a bl 8004c20 //vgh LCD_WriteReg(0x0010,0x1690); 800518c: f241 6190 movw r1, #5776 ; 0x1690 8005190: 2010 movs r0, #16 8005192: f7ff fd45 bl 8004c20 LCD_WriteReg(0x0011,0x0227); 8005196: f240 2127 movw r1, #551 ; 0x227 800519a: 2011 movs r0, #17 800519c: f7ff fd40 bl 8004c20 //delayms(100); //vregiout LCD_WriteReg(0x0012,0x009D); //0x001b 80051a0: 219d movs r1, #157 ; 0x9d 80051a2: 2012 movs r0, #18 80051a4: f7ff fd3c bl 8004c20 //delayms(100); //vom amplitude LCD_WriteReg(0x0013,0x1900); 80051a8: f44f 51c8 mov.w r1, #6400 ; 0x1900 80051ac: 2013 movs r0, #19 80051ae: f7ff fd37 bl 8004c20 //delayms(100); //vom H LCD_WriteReg(0x0029,0x0025); 80051b2: 2125 movs r1, #37 ; 0x25 80051b4: 2029 movs r0, #41 ; 0x29 80051b6: f7ff fd33 bl 8004c20 LCD_WriteReg(0x002B,0x000D); 80051ba: 210d movs r1, #13 80051bc: 202b movs r0, #43 ; 0x2b 80051be: f7ff fd2f bl 8004c20 //gamma LCD_WriteReg(0x0030,0x0007); 80051c2: 2107 movs r1, #7 80051c4: 2030 movs r0, #48 ; 0x30 80051c6: f7ff fd2b bl 8004c20 LCD_WriteReg(0x0031,0x0303); 80051ca: f240 3103 movw r1, #771 ; 0x303 80051ce: 2031 movs r0, #49 ; 0x31 80051d0: f7ff fd26 bl 8004c20 LCD_WriteReg(0x0032,0x0003);// 0006 80051d4: 2103 movs r1, #3 80051d6: 2032 movs r0, #50 ; 0x32 80051d8: f7ff fd22 bl 8004c20 LCD_WriteReg(0x0035,0x0206); 80051dc: f240 2106 movw r1, #518 ; 0x206 80051e0: 2035 movs r0, #53 ; 0x35 80051e2: f7ff fd1d bl 8004c20 LCD_WriteReg(0x0036,0x0008); 80051e6: 2108 movs r1, #8 80051e8: 2036 movs r0, #54 ; 0x36 80051ea: f7ff fd19 bl 8004c20 LCD_WriteReg(0x0037,0x0406); 80051ee: f240 4106 movw r1, #1030 ; 0x406 80051f2: 2037 movs r0, #55 ; 0x37 80051f4: f7ff fd14 bl 8004c20 LCD_WriteReg(0x0038,0x0304);//0200 80051f8: f44f 7141 mov.w r1, #772 ; 0x304 80051fc: 2038 movs r0, #56 ; 0x38 80051fe: f7ff fd0f bl 8004c20 LCD_WriteReg(0x0039,0x0007); 8005202: 2107 movs r1, #7 8005204: 2039 movs r0, #57 ; 0x39 8005206: f7ff fd0b bl 8004c20 LCD_WriteReg(0x003C,0x0602);// 0504 800520a: f240 6102 movw r1, #1538 ; 0x602 800520e: 203c movs r0, #60 ; 0x3c 8005210: f7ff fd06 bl 8004c20 LCD_WriteReg(0x003D,0x0008); 8005214: 2108 movs r1, #8 8005216: 203d movs r0, #61 ; 0x3d 8005218: f7ff fd02 bl 8004c20 //ram LCD_WriteReg(0x0050,0x0000); 800521c: 2100 movs r1, #0 800521e: 2050 movs r0, #80 ; 0x50 8005220: f7ff fcfe bl 8004c20 LCD_WriteReg(0x0051,0x00EF); 8005224: 21ef movs r1, #239 ; 0xef 8005226: 2051 movs r0, #81 ; 0x51 8005228: f7ff fcfa bl 8004c20 LCD_WriteReg(0x0052,0x0000); 800522c: 2100 movs r1, #0 800522e: 2052 movs r0, #82 ; 0x52 8005230: f7ff fcf6 bl 8004c20 LCD_WriteReg(0x0053,0x013F); 8005234: f240 113f movw r1, #319 ; 0x13f 8005238: 2053 movs r0, #83 ; 0x53 800523a: f7ff fcf1 bl 8004c20 LCD_WriteReg(0x0060,0xA700); 800523e: f44f 4127 mov.w r1, #42752 ; 0xa700 8005242: 2060 movs r0, #96 ; 0x60 8005244: f7ff fcec bl 8004c20 LCD_WriteReg(0x0061,0x0001); 8005248: 2101 movs r1, #1 800524a: 2061 movs r0, #97 ; 0x61 800524c: f7ff fce8 bl 8004c20 LCD_WriteReg(0x006A,0x0000); 8005250: 2100 movs r1, #0 8005252: 206a movs r0, #106 ; 0x6a 8005254: f7ff fce4 bl 8004c20 // LCD_WriteReg(0x0080,0x0000); 8005258: 2100 movs r1, #0 800525a: 2080 movs r0, #128 ; 0x80 800525c: f7ff fce0 bl 8004c20 LCD_WriteReg(0x0081,0x0000); 8005260: 2100 movs r1, #0 8005262: 2081 movs r0, #129 ; 0x81 8005264: f7ff fcdc bl 8004c20 LCD_WriteReg(0x0082,0x0000); 8005268: 2100 movs r1, #0 800526a: 2082 movs r0, #130 ; 0x82 800526c: f7ff fcd8 bl 8004c20 LCD_WriteReg(0x0083,0x0000); 8005270: 2100 movs r1, #0 8005272: 2083 movs r0, #131 ; 0x83 8005274: f7ff fcd4 bl 8004c20 LCD_WriteReg(0x0084,0x0000); 8005278: 2100 movs r1, #0 800527a: 2084 movs r0, #132 ; 0x84 800527c: f7ff fcd0 bl 8004c20 LCD_WriteReg(0x0085,0x0000); 8005280: 2100 movs r1, #0 8005282: 2085 movs r0, #133 ; 0x85 8005284: f7ff fccc bl 8004c20 // LCD_WriteReg(0x0090,0x0010); 8005288: 2110 movs r1, #16 800528a: 2090 movs r0, #144 ; 0x90 800528c: f7ff fcc8 bl 8004c20 LCD_WriteReg(0x0092,0x0600); 8005290: f44f 61c0 mov.w r1, #1536 ; 0x600 8005294: 2092 movs r0, #146 ; 0x92 8005296: f7ff fcc3 bl 8004c20 LCD_WriteReg(0x0007,0x0133); 800529a: f240 1133 movw r1, #307 ; 0x133 800529e: 2007 movs r0, #7 80052a0: f7ff fcbe bl 8004c20 LCD_WriteReg(0x00,0x0022);// 80052a4: 2122 movs r1, #34 ; 0x22 80052a6: 2000 movs r0, #0 80052a8: f7ff fcba bl 8004c20 LCD_Display_Dir(1); //ĬÈÏΪhÆÁ 80052ac: 2001 movs r0, #1 80052ae: f7ff fe4f bl 8004f50 LCD_BL(0); 80052b2: 2200 movs r2, #0 80052b4: 2101 movs r1, #1 80052b6: 4803 ldr r0, [pc, #12] ; (80052c4 ) 80052b8: f7fc ff45 bl 8002146 } 80052bc: bf00 nop 80052be: bd80 pop {r7, pc} 80052c0: 20000354 .word 0x20000354 80052c4: 40010c00 .word 0x40010c00 080052c8 : //***********************************************************´òµã ¶Áµã ʲôµÄ //ÉèÖùâ±êλÖà //Xpos:ºá×ø±ê //Ypos:×Ý×ø±ê void LCD_SetCursor(uint16_t Xpos, uint16_t Ypos) { 80052c8: b580 push {r7, lr} 80052ca: b082 sub sp, #8 80052cc: af00 add r7, sp, #0 80052ce: 4603 mov r3, r0 80052d0: 460a mov r2, r1 80052d2: 80fb strh r3, [r7, #6] 80052d4: 4613 mov r3, r2 80052d6: 80bb strh r3, [r7, #4] if(lcddev.id==0X9341||lcddev.id==0X5310) 80052d8: 4b42 ldr r3, [pc, #264] ; (80053e4 ) 80052da: 889b ldrh r3, [r3, #4] 80052dc: f249 3241 movw r2, #37697 ; 0x9341 80052e0: 4293 cmp r3, r2 80052e2: d005 beq.n 80052f0 80052e4: 4b3f ldr r3, [pc, #252] ; (80053e4 ) 80052e6: 889b ldrh r3, [r3, #4] 80052e8: f245 3210 movw r2, #21264 ; 0x5310 80052ec: 4293 cmp r3, r2 80052ee: d124 bne.n 800533a { LCD_WR_REG(lcddev.setxcmd); 80052f0: 4b3c ldr r3, [pc, #240] ; (80053e4 ) 80052f2: 7a1b ldrb r3, [r3, #8] 80052f4: b29b uxth r3, r3 80052f6: 4618 mov r0, r3 80052f8: f7ff fc74 bl 8004be4 LCD_WR_DATA(Xpos>>8); 80052fc: 88fb ldrh r3, [r7, #6] 80052fe: 0a1b lsrs r3, r3, #8 8005300: b29b uxth r3, r3 8005302: 4618 mov r0, r3 8005304: f7ff fc7c bl 8004c00 LCD_WR_DATA(Xpos&0XFF); 8005308: 88fb ldrh r3, [r7, #6] 800530a: b2db uxtb r3, r3 800530c: b29b uxth r3, r3 800530e: 4618 mov r0, r3 8005310: f7ff fc76 bl 8004c00 LCD_WR_REG(lcddev.setycmd); 8005314: 4b33 ldr r3, [pc, #204] ; (80053e4 ) 8005316: 7a5b ldrb r3, [r3, #9] 8005318: b29b uxth r3, r3 800531a: 4618 mov r0, r3 800531c: f7ff fc62 bl 8004be4 LCD_WR_DATA(Ypos>>8); 8005320: 88bb ldrh r3, [r7, #4] 8005322: 0a1b lsrs r3, r3, #8 8005324: b29b uxth r3, r3 8005326: 4618 mov r0, r3 8005328: f7ff fc6a bl 8004c00 LCD_WR_DATA(Ypos&0XFF); 800532c: 88bb ldrh r3, [r7, #4] 800532e: b2db uxtb r3, r3 8005330: b29b uxth r3, r3 8005332: 4618 mov r0, r3 8005334: f7ff fc64 bl 8004c00 { if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//ºáÆÁÆäʵ¾ÍÊǵ÷תx,y×ø±ê LCD_WriteReg(lcddev.setxcmd, Xpos); LCD_WriteReg(lcddev.setycmd, Ypos); } } 8005338: e050 b.n 80053dc }else if(lcddev.id==0X6804) 800533a: 4b2a ldr r3, [pc, #168] ; (80053e4 ) 800533c: 889b ldrh r3, [r3, #4] 800533e: f646 0204 movw r2, #26628 ; 0x6804 8005342: 4293 cmp r3, r2 8005344: d12f bne.n 80053a6 if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//ºáÆÁʱ´¦Àí 8005346: 4b27 ldr r3, [pc, #156] ; (80053e4 ) 8005348: 799b ldrb r3, [r3, #6] 800534a: 2b01 cmp r3, #1 800534c: d106 bne.n 800535c 800534e: 4b25 ldr r3, [pc, #148] ; (80053e4 ) 8005350: 881a ldrh r2, [r3, #0] 8005352: 88fb ldrh r3, [r7, #6] 8005354: 1ad3 subs r3, r2, r3 8005356: b29b uxth r3, r3 8005358: 3b01 subs r3, #1 800535a: 80fb strh r3, [r7, #6] LCD_WR_REG(lcddev.setxcmd); 800535c: 4b21 ldr r3, [pc, #132] ; (80053e4 ) 800535e: 7a1b ldrb r3, [r3, #8] 8005360: b29b uxth r3, r3 8005362: 4618 mov r0, r3 8005364: f7ff fc3e bl 8004be4 LCD_WR_DATA(Xpos>>8); 8005368: 88fb ldrh r3, [r7, #6] 800536a: 0a1b lsrs r3, r3, #8 800536c: b29b uxth r3, r3 800536e: 4618 mov r0, r3 8005370: f7ff fc46 bl 8004c00 LCD_WR_DATA(Xpos&0XFF); 8005374: 88fb ldrh r3, [r7, #6] 8005376: b2db uxtb r3, r3 8005378: b29b uxth r3, r3 800537a: 4618 mov r0, r3 800537c: f7ff fc40 bl 8004c00 LCD_WR_REG(lcddev.setycmd); 8005380: 4b18 ldr r3, [pc, #96] ; (80053e4 ) 8005382: 7a5b ldrb r3, [r3, #9] 8005384: b29b uxth r3, r3 8005386: 4618 mov r0, r3 8005388: f7ff fc2c bl 8004be4 LCD_WR_DATA(Ypos>>8); 800538c: 88bb ldrh r3, [r7, #4] 800538e: 0a1b lsrs r3, r3, #8 8005390: b29b uxth r3, r3 8005392: 4618 mov r0, r3 8005394: f7ff fc34 bl 8004c00 LCD_WR_DATA(Ypos&0XFF); 8005398: 88bb ldrh r3, [r7, #4] 800539a: b2db uxtb r3, r3 800539c: b29b uxth r3, r3 800539e: 4618 mov r0, r3 80053a0: f7ff fc2e bl 8004c00 } 80053a4: e01a b.n 80053dc if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//ºáÆÁÆäʵ¾ÍÊǵ÷תx,y×ø±ê 80053a6: 4b0f ldr r3, [pc, #60] ; (80053e4 ) 80053a8: 799b ldrb r3, [r3, #6] 80053aa: 2b01 cmp r3, #1 80053ac: d106 bne.n 80053bc 80053ae: 4b0d ldr r3, [pc, #52] ; (80053e4 ) 80053b0: 881a ldrh r2, [r3, #0] 80053b2: 88fb ldrh r3, [r7, #6] 80053b4: 1ad3 subs r3, r2, r3 80053b6: b29b uxth r3, r3 80053b8: 3b01 subs r3, #1 80053ba: 80fb strh r3, [r7, #6] LCD_WriteReg(lcddev.setxcmd, Xpos); 80053bc: 4b09 ldr r3, [pc, #36] ; (80053e4 ) 80053be: 7a1b ldrb r3, [r3, #8] 80053c0: b29b uxth r3, r3 80053c2: 88fa ldrh r2, [r7, #6] 80053c4: 4611 mov r1, r2 80053c6: 4618 mov r0, r3 80053c8: f7ff fc2a bl 8004c20 LCD_WriteReg(lcddev.setycmd, Ypos); 80053cc: 4b05 ldr r3, [pc, #20] ; (80053e4 ) 80053ce: 7a5b ldrb r3, [r3, #9] 80053d0: b29b uxth r3, r3 80053d2: 88ba ldrh r2, [r7, #4] 80053d4: 4611 mov r1, r2 80053d6: 4618 mov r0, r3 80053d8: f7ff fc22 bl 8004c20 } 80053dc: bf00 nop 80053de: 3708 adds r7, #8 80053e0: 46bd mov sp, r7 80053e2: bd80 pop {r7, pc} 80053e4: 20000354 .word 0x20000354 080053e8 : } //»­µã //x,y:×ø±ê //POINT_COLOR:´ËµãµÄÑÕÉ« void LCD_set_dot(uint16_t x,uint16_t y,uint16_t color) { 80053e8: b580 push {r7, lr} 80053ea: b082 sub sp, #8 80053ec: af00 add r7, sp, #0 80053ee: 4603 mov r3, r0 80053f0: 80fb strh r3, [r7, #6] 80053f2: 460b mov r3, r1 80053f4: 80bb strh r3, [r7, #4] 80053f6: 4613 mov r3, r2 80053f8: 807b strh r3, [r7, #2] LCD_SetCursor(x,y); //ÉèÖùâ±êλÖà 80053fa: 88ba ldrh r2, [r7, #4] 80053fc: 88fb ldrh r3, [r7, #6] 80053fe: 4611 mov r1, r2 8005400: 4618 mov r0, r3 8005402: f7ff ff61 bl 80052c8 LCD_REG_ADDRESS=lcddev.wramcmd; //¿ªÊ¼Ð´ÈëGRAM 8005406: 4b06 ldr r3, [pc, #24] ; (8005420 ) 8005408: 79da ldrb r2, [r3, #7] 800540a: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000 800540e: b292 uxth r2, r2 8005410: 801a strh r2, [r3, #0] LCD_DATA_ADDRESS=color; 8005412: 4a04 ldr r2, [pc, #16] ; (8005424 ) 8005414: 887b ldrh r3, [r7, #2] 8005416: 8013 strh r3, [r2, #0] } 8005418: bf00 nop 800541a: 3708 adds r7, #8 800541c: 46bd mov sp, r7 800541e: bd80 pop {r7, pc} 8005420: 20000354 .word 0x20000354 8005424: 6c000800 .word 0x6c000800 08005428 : //ÇåÆÁº¯Êý //color:ÒªÇåÆÁµÄÌî³äÉ« void LCD_Clear(uint16_t color) { 8005428: b580 push {r7, lr} 800542a: b084 sub sp, #16 800542c: af00 add r7, sp, #0 800542e: 4603 mov r3, r0 8005430: 80fb strh r3, [r7, #6] uint32_t index=0; 8005432: 2300 movs r3, #0 8005434: 60fb str r3, [r7, #12] uint32_t totalpoint=lcddev.width; 8005436: 4b23 ldr r3, [pc, #140] ; (80054c4 ) 8005438: 881b ldrh r3, [r3, #0] 800543a: 60bb str r3, [r7, #8] totalpoint*=lcddev.height; //µÃµ½×ܵãÊý 800543c: 4b21 ldr r3, [pc, #132] ; (80054c4 ) 800543e: 885b ldrh r3, [r3, #2] 8005440: 461a mov r2, r3 8005442: 68bb ldr r3, [r7, #8] 8005444: fb02 f303 mul.w r3, r2, r3 8005448: 60bb str r3, [r7, #8] if((lcddev.id==0X6804)&&(lcddev.dir==1))//6804ºáÆÁµÄʱºòÌØÊâ´¦Àí 800544a: 4b1e ldr r3, [pc, #120] ; (80054c4 ) 800544c: 889b ldrh r3, [r3, #4] 800544e: f646 0204 movw r2, #26628 ; 0x6804 8005452: 4293 cmp r3, r2 8005454: d11a bne.n 800548c 8005456: 4b1b ldr r3, [pc, #108] ; (80054c4 ) 8005458: 799b ldrb r3, [r3, #6] 800545a: 2b01 cmp r3, #1 800545c: d116 bne.n 800548c { lcddev.dir=0; 800545e: 4b19 ldr r3, [pc, #100] ; (80054c4 ) 8005460: 2200 movs r2, #0 8005462: 719a strb r2, [r3, #6] lcddev.setxcmd=0X2A; 8005464: 4b17 ldr r3, [pc, #92] ; (80054c4 ) 8005466: 222a movs r2, #42 ; 0x2a 8005468: 721a strb r2, [r3, #8] lcddev.setycmd=0X2B; 800546a: 4b16 ldr r3, [pc, #88] ; (80054c4 ) 800546c: 222b movs r2, #43 ; 0x2b 800546e: 725a strb r2, [r3, #9] LCD_SetCursor(0x00,0x0000); //ÉèÖùâ±êλÖà 8005470: 2100 movs r1, #0 8005472: 2000 movs r0, #0 8005474: f7ff ff28 bl 80052c8 lcddev.dir=1; 8005478: 4b12 ldr r3, [pc, #72] ; (80054c4 ) 800547a: 2201 movs r2, #1 800547c: 719a strb r2, [r3, #6] lcddev.setxcmd=0X2B; 800547e: 4b11 ldr r3, [pc, #68] ; (80054c4 ) 8005480: 222b movs r2, #43 ; 0x2b 8005482: 721a strb r2, [r3, #8] lcddev.setycmd=0X2A; 8005484: 4b0f ldr r3, [pc, #60] ; (80054c4 ) 8005486: 222a movs r2, #42 ; 0x2a 8005488: 725a strb r2, [r3, #9] 800548a: e003 b.n 8005494 }else LCD_SetCursor(0x00,0x0000); //ÉèÖùâ±êλÖà 800548c: 2100 movs r1, #0 800548e: 2000 movs r0, #0 8005490: f7ff ff1a bl 80052c8 LCD_REG_ADDRESS=lcddev.wramcmd; //¿ªÊ¼Ð´ÈëGRAM 8005494: 4b0b ldr r3, [pc, #44] ; (80054c4 ) 8005496: 79da ldrb r2, [r3, #7] 8005498: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000 800549c: b292 uxth r2, r2 800549e: 801a strh r2, [r3, #0] for(index=0;index { LCD_DATA_ADDRESS=color; 80054a6: 4a08 ldr r2, [pc, #32] ; (80054c8 ) 80054a8: 88fb ldrh r3, [r7, #6] 80054aa: 8013 strh r3, [r2, #0] for(index=0;index } } 80054ba: bf00 nop 80054bc: bf00 nop 80054be: 3710 adds r7, #16 80054c0: 46bd mov sp, r7 80054c2: bd80 pop {r7, pc} 80054c4: 20000354 .word 0x20000354 80054c8: 6c000800 .word 0x6c000800 080054cc : //***********************************2D //»­Ïß //x1,y1:Æðµã×ø±ê //x2,y2:ÖÕµã×ø±ê void LCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2,uint16_t color) { 80054cc: b590 push {r4, r7, lr} 80054ce: b08d sub sp, #52 ; 0x34 80054d0: af00 add r7, sp, #0 80054d2: 4604 mov r4, r0 80054d4: 4608 mov r0, r1 80054d6: 4611 mov r1, r2 80054d8: 461a mov r2, r3 80054da: 4623 mov r3, r4 80054dc: 80fb strh r3, [r7, #6] 80054de: 4603 mov r3, r0 80054e0: 80bb strh r3, [r7, #4] 80054e2: 460b mov r3, r1 80054e4: 807b strh r3, [r7, #2] 80054e6: 4613 mov r3, r2 80054e8: 803b strh r3, [r7, #0] uint16_t t; int xerr=0,yerr=0,delta_x,delta_y,distance; 80054ea: 2300 movs r3, #0 80054ec: 62bb str r3, [r7, #40] ; 0x28 80054ee: 2300 movs r3, #0 80054f0: 627b str r3, [r7, #36] ; 0x24 int incx,incy,uRow,uCol; delta_x=x2-x1; //¼ÆËã×ø±êÔöÁ¿ 80054f2: 887a ldrh r2, [r7, #2] 80054f4: 88fb ldrh r3, [r7, #6] 80054f6: 1ad3 subs r3, r2, r3 80054f8: 623b str r3, [r7, #32] delta_y=y2-y1; 80054fa: 883a ldrh r2, [r7, #0] 80054fc: 88bb ldrh r3, [r7, #4] 80054fe: 1ad3 subs r3, r2, r3 8005500: 61fb str r3, [r7, #28] uRow=x1; 8005502: 88fb ldrh r3, [r7, #6] 8005504: 60fb str r3, [r7, #12] uCol=y1; 8005506: 88bb ldrh r3, [r7, #4] 8005508: 60bb str r3, [r7, #8] if(delta_x>0)incx=1; //ÉèÖõ¥²½·½Ïò 800550a: 6a3b ldr r3, [r7, #32] 800550c: 2b00 cmp r3, #0 800550e: dd02 ble.n 8005516 8005510: 2301 movs r3, #1 8005512: 617b str r3, [r7, #20] 8005514: e00b b.n 800552e else if(delta_x==0)incx=0;//´¹Ö±Ïß 8005516: 6a3b ldr r3, [r7, #32] 8005518: 2b00 cmp r3, #0 800551a: d102 bne.n 8005522 800551c: 2300 movs r3, #0 800551e: 617b str r3, [r7, #20] 8005520: e005 b.n 800552e else {incx=-1;delta_x=-delta_x;} 8005522: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff 8005526: 617b str r3, [r7, #20] 8005528: 6a3b ldr r3, [r7, #32] 800552a: 425b negs r3, r3 800552c: 623b str r3, [r7, #32] if(delta_y>0)incy=1; 800552e: 69fb ldr r3, [r7, #28] 8005530: 2b00 cmp r3, #0 8005532: dd02 ble.n 800553a 8005534: 2301 movs r3, #1 8005536: 613b str r3, [r7, #16] 8005538: e00b b.n 8005552 else if(delta_y==0)incy=0;//ˮƽÏß 800553a: 69fb ldr r3, [r7, #28] 800553c: 2b00 cmp r3, #0 800553e: d102 bne.n 8005546 8005540: 2300 movs r3, #0 8005542: 613b str r3, [r7, #16] 8005544: e005 b.n 8005552 else{incy=-1;delta_y=-delta_y;} 8005546: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff 800554a: 613b str r3, [r7, #16] 800554c: 69fb ldr r3, [r7, #28] 800554e: 425b negs r3, r3 8005550: 61fb str r3, [r7, #28] if( delta_x>delta_y)distance=delta_x; //Ñ¡È¡»ù±¾ÔöÁ¿×ø±êÖá 8005552: 6a3a ldr r2, [r7, #32] 8005554: 69fb ldr r3, [r7, #28] 8005556: 429a cmp r2, r3 8005558: dd02 ble.n 8005560 800555a: 6a3b ldr r3, [r7, #32] 800555c: 61bb str r3, [r7, #24] 800555e: e001 b.n 8005564 else distance=delta_y; 8005560: 69fb ldr r3, [r7, #28] 8005562: 61bb str r3, [r7, #24] for(t=0;t<=distance+1;t++ )//»­ÏßÊä³ö 8005564: 2300 movs r3, #0 8005566: 85fb strh r3, [r7, #46] ; 0x2e 8005568: e02b b.n 80055c2 { LCD_set_dot(uRow,uCol,color);//»­µã 800556a: 68fb ldr r3, [r7, #12] 800556c: b29b uxth r3, r3 800556e: 68ba ldr r2, [r7, #8] 8005570: b291 uxth r1, r2 8005572: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40 8005576: 4618 mov r0, r3 8005578: f7ff ff36 bl 80053e8 xerr+=delta_x ; 800557c: 6aba ldr r2, [r7, #40] ; 0x28 800557e: 6a3b ldr r3, [r7, #32] 8005580: 4413 add r3, r2 8005582: 62bb str r3, [r7, #40] ; 0x28 yerr+=delta_y ; 8005584: 6a7a ldr r2, [r7, #36] ; 0x24 8005586: 69fb ldr r3, [r7, #28] 8005588: 4413 add r3, r2 800558a: 627b str r3, [r7, #36] ; 0x24 if(xerr>distance) 800558c: 6aba ldr r2, [r7, #40] ; 0x28 800558e: 69bb ldr r3, [r7, #24] 8005590: 429a cmp r2, r3 8005592: dd07 ble.n 80055a4 { xerr-=distance; 8005594: 6aba ldr r2, [r7, #40] ; 0x28 8005596: 69bb ldr r3, [r7, #24] 8005598: 1ad3 subs r3, r2, r3 800559a: 62bb str r3, [r7, #40] ; 0x28 uRow+=incx; 800559c: 68fa ldr r2, [r7, #12] 800559e: 697b ldr r3, [r7, #20] 80055a0: 4413 add r3, r2 80055a2: 60fb str r3, [r7, #12] } if(yerr>distance) 80055a4: 6a7a ldr r2, [r7, #36] ; 0x24 80055a6: 69bb ldr r3, [r7, #24] 80055a8: 429a cmp r2, r3 80055aa: dd07 ble.n 80055bc { yerr-=distance; 80055ac: 6a7a ldr r2, [r7, #36] ; 0x24 80055ae: 69bb ldr r3, [r7, #24] 80055b0: 1ad3 subs r3, r2, r3 80055b2: 627b str r3, [r7, #36] ; 0x24 uCol+=incy; 80055b4: 68ba ldr r2, [r7, #8] 80055b6: 693b ldr r3, [r7, #16] 80055b8: 4413 add r3, r2 80055ba: 60bb str r3, [r7, #8] for(t=0;t<=distance+1;t++ )//»­ÏßÊä³ö 80055bc: 8dfb ldrh r3, [r7, #46] ; 0x2e 80055be: 3301 adds r3, #1 80055c0: 85fb strh r3, [r7, #46] ; 0x2e 80055c2: 8dfa ldrh r2, [r7, #46] ; 0x2e 80055c4: 69bb ldr r3, [r7, #24] 80055c6: 3301 adds r3, #1 80055c8: 429a cmp r2, r3 80055ca: ddce ble.n 800556a } } } 80055cc: bf00 nop 80055ce: bf00 nop 80055d0: 3734 adds r7, #52 ; 0x34 80055d2: 46bd mov sp, r7 80055d4: bd90 pop {r4, r7, pc} 080055d6 : //ÔÚÖ¸¶¨Î»Öû­Ò»¸öÖ¸¶¨´óСµÄÔ² //(x,y):ÖÐÐĵã //r :°ë¾¶ void Draw_Circle(uint16_t x0,uint16_t y0,uint16_t r,uint16_t color) { 80055d6: b590 push {r4, r7, lr} 80055d8: b087 sub sp, #28 80055da: af00 add r7, sp, #0 80055dc: 4604 mov r4, r0 80055de: 4608 mov r0, r1 80055e0: 4611 mov r1, r2 80055e2: 461a mov r2, r3 80055e4: 4623 mov r3, r4 80055e6: 80fb strh r3, [r7, #6] 80055e8: 4603 mov r3, r0 80055ea: 80bb strh r3, [r7, #4] 80055ec: 460b mov r3, r1 80055ee: 807b strh r3, [r7, #2] 80055f0: 4613 mov r3, r2 80055f2: 803b strh r3, [r7, #0] int a,b; int di; a=0;b=r; 80055f4: 2300 movs r3, #0 80055f6: 617b str r3, [r7, #20] 80055f8: 887b ldrh r3, [r7, #2] 80055fa: 613b str r3, [r7, #16] di=3-(r<<1); //ÅжÏϸöµãλÖõıêÖ¾ 80055fc: 887b ldrh r3, [r7, #2] 80055fe: 005b lsls r3, r3, #1 8005600: f1c3 0303 rsb r3, r3, #3 8005604: 60fb str r3, [r7, #12] while(a<=b) 8005606: e087 b.n 8005718 { LCD_set_dot(x0+a,y0-b,color); //5 8005608: 697b ldr r3, [r7, #20] 800560a: b29a uxth r2, r3 800560c: 88fb ldrh r3, [r7, #6] 800560e: 4413 add r3, r2 8005610: b298 uxth r0, r3 8005612: 693b ldr r3, [r7, #16] 8005614: b29b uxth r3, r3 8005616: 88ba ldrh r2, [r7, #4] 8005618: 1ad3 subs r3, r2, r3 800561a: b29b uxth r3, r3 800561c: 883a ldrh r2, [r7, #0] 800561e: 4619 mov r1, r3 8005620: f7ff fee2 bl 80053e8 LCD_set_dot(x0+b,y0-a,color); //0 8005624: 693b ldr r3, [r7, #16] 8005626: b29a uxth r2, r3 8005628: 88fb ldrh r3, [r7, #6] 800562a: 4413 add r3, r2 800562c: b298 uxth r0, r3 800562e: 697b ldr r3, [r7, #20] 8005630: b29b uxth r3, r3 8005632: 88ba ldrh r2, [r7, #4] 8005634: 1ad3 subs r3, r2, r3 8005636: b29b uxth r3, r3 8005638: 883a ldrh r2, [r7, #0] 800563a: 4619 mov r1, r3 800563c: f7ff fed4 bl 80053e8 LCD_set_dot(x0+b,y0+a,color); //4 8005640: 693b ldr r3, [r7, #16] 8005642: b29a uxth r2, r3 8005644: 88fb ldrh r3, [r7, #6] 8005646: 4413 add r3, r2 8005648: b298 uxth r0, r3 800564a: 697b ldr r3, [r7, #20] 800564c: b29a uxth r2, r3 800564e: 88bb ldrh r3, [r7, #4] 8005650: 4413 add r3, r2 8005652: b29b uxth r3, r3 8005654: 883a ldrh r2, [r7, #0] 8005656: 4619 mov r1, r3 8005658: f7ff fec6 bl 80053e8 LCD_set_dot(x0+a,y0+b,color); //6 800565c: 697b ldr r3, [r7, #20] 800565e: b29a uxth r2, r3 8005660: 88fb ldrh r3, [r7, #6] 8005662: 4413 add r3, r2 8005664: b298 uxth r0, r3 8005666: 693b ldr r3, [r7, #16] 8005668: b29a uxth r2, r3 800566a: 88bb ldrh r3, [r7, #4] 800566c: 4413 add r3, r2 800566e: b29b uxth r3, r3 8005670: 883a ldrh r2, [r7, #0] 8005672: 4619 mov r1, r3 8005674: f7ff feb8 bl 80053e8 LCD_set_dot(x0-a,y0+b,color); //1 8005678: 697b ldr r3, [r7, #20] 800567a: b29b uxth r3, r3 800567c: 88fa ldrh r2, [r7, #6] 800567e: 1ad3 subs r3, r2, r3 8005680: b298 uxth r0, r3 8005682: 693b ldr r3, [r7, #16] 8005684: b29a uxth r2, r3 8005686: 88bb ldrh r3, [r7, #4] 8005688: 4413 add r3, r2 800568a: b29b uxth r3, r3 800568c: 883a ldrh r2, [r7, #0] 800568e: 4619 mov r1, r3 8005690: f7ff feaa bl 80053e8 LCD_set_dot(x0-b,y0+a,color); 8005694: 693b ldr r3, [r7, #16] 8005696: b29b uxth r3, r3 8005698: 88fa ldrh r2, [r7, #6] 800569a: 1ad3 subs r3, r2, r3 800569c: b298 uxth r0, r3 800569e: 697b ldr r3, [r7, #20] 80056a0: b29a uxth r2, r3 80056a2: 88bb ldrh r3, [r7, #4] 80056a4: 4413 add r3, r2 80056a6: b29b uxth r3, r3 80056a8: 883a ldrh r2, [r7, #0] 80056aa: 4619 mov r1, r3 80056ac: f7ff fe9c bl 80053e8 LCD_set_dot(x0-a,y0-b,color); //2 80056b0: 697b ldr r3, [r7, #20] 80056b2: b29b uxth r3, r3 80056b4: 88fa ldrh r2, [r7, #6] 80056b6: 1ad3 subs r3, r2, r3 80056b8: b298 uxth r0, r3 80056ba: 693b ldr r3, [r7, #16] 80056bc: b29b uxth r3, r3 80056be: 88ba ldrh r2, [r7, #4] 80056c0: 1ad3 subs r3, r2, r3 80056c2: b29b uxth r3, r3 80056c4: 883a ldrh r2, [r7, #0] 80056c6: 4619 mov r1, r3 80056c8: f7ff fe8e bl 80053e8 LCD_set_dot(x0-b,y0-a,color); //7 80056cc: 693b ldr r3, [r7, #16] 80056ce: b29b uxth r3, r3 80056d0: 88fa ldrh r2, [r7, #6] 80056d2: 1ad3 subs r3, r2, r3 80056d4: b298 uxth r0, r3 80056d6: 697b ldr r3, [r7, #20] 80056d8: b29b uxth r3, r3 80056da: 88ba ldrh r2, [r7, #4] 80056dc: 1ad3 subs r3, r2, r3 80056de: b29b uxth r3, r3 80056e0: 883a ldrh r2, [r7, #0] 80056e2: 4619 mov r1, r3 80056e4: f7ff fe80 bl 80053e8 a++; 80056e8: 697b ldr r3, [r7, #20] 80056ea: 3301 adds r3, #1 80056ec: 617b str r3, [r7, #20] //ʹÓÃBresenhamËã·¨»­Ô² if(di<0)di +=4*a+6; 80056ee: 68fb ldr r3, [r7, #12] 80056f0: 2b00 cmp r3, #0 80056f2: da06 bge.n 8005702 80056f4: 697b ldr r3, [r7, #20] 80056f6: 009b lsls r3, r3, #2 80056f8: 3306 adds r3, #6 80056fa: 68fa ldr r2, [r7, #12] 80056fc: 4413 add r3, r2 80056fe: 60fb str r3, [r7, #12] 8005700: e00a b.n 8005718 else { di+=10+4*(a-b); 8005702: 697a ldr r2, [r7, #20] 8005704: 693b ldr r3, [r7, #16] 8005706: 1ad3 subs r3, r2, r3 8005708: 009b lsls r3, r3, #2 800570a: 330a adds r3, #10 800570c: 68fa ldr r2, [r7, #12] 800570e: 4413 add r3, r2 8005710: 60fb str r3, [r7, #12] b--; 8005712: 693b ldr r3, [r7, #16] 8005714: 3b01 subs r3, #1 8005716: 613b str r3, [r7, #16] while(a<=b) 8005718: 697a ldr r2, [r7, #20] 800571a: 693b ldr r3, [r7, #16] 800571c: 429a cmp r2, r3 800571e: f77f af73 ble.w 8005608 } } } 8005722: bf00 nop 8005724: bf00 nop 8005726: 371c adds r7, #28 8005728: 46bd mov sp, r7 800572a: bd90 pop {r4, r7, pc} 0800572c : //num:ÒªÏÔʾµÄ×Ö·û:" "--->"~" //size:×ÖÌå´óС 12/16 //mode:µþ¼Ó·½Ê½(1)»¹ÊǷǵþ¼Ó·½Ê½(0) void LCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint16_t bg,uint16_t color) { 800572c: b590 push {r4, r7, lr} 800572e: b085 sub sp, #20 8005730: af00 add r7, sp, #0 8005732: 4604 mov r4, r0 8005734: 4608 mov r0, r1 8005736: 4611 mov r1, r2 8005738: 461a mov r2, r3 800573a: 4623 mov r3, r4 800573c: 80fb strh r3, [r7, #6] 800573e: 4603 mov r3, r0 8005740: 80bb strh r3, [r7, #4] 8005742: 460b mov r3, r1 8005744: 70fb strb r3, [r7, #3] 8005746: 4613 mov r3, r2 8005748: 70bb strb r3, [r7, #2] uint8_t temp,t1,t; uint16_t y0=y; 800574a: 88bb ldrh r3, [r7, #4] 800574c: 817b strh r3, [r7, #10] //ÉèÖô°¿Ú num=num-' ';//µÃµ½Æ«ÒƺóµÄÖµ 800574e: 78fb ldrb r3, [r7, #3] 8005750: 3b20 subs r3, #32 8005752: 70fb strb r3, [r7, #3] for(t=0;t { if(size==12){temp=asc2_1206[num][t];} //µ÷ÓÃ1206×ÖÌå 800575a: 78bb ldrb r3, [r7, #2] 800575c: 2b0c cmp r3, #12 800575e: d10b bne.n 8005778 8005760: 78fa ldrb r2, [r7, #3] 8005762: 7b79 ldrb r1, [r7, #13] 8005764: 482c ldr r0, [pc, #176] ; (8005818 ) 8005766: 4613 mov r3, r2 8005768: 005b lsls r3, r3, #1 800576a: 4413 add r3, r2 800576c: 009b lsls r3, r3, #2 800576e: 4403 add r3, r0 8005770: 440b add r3, r1 8005772: 781b ldrb r3, [r3, #0] 8005774: 73fb strb r3, [r7, #15] 8005776: e007 b.n 8005788 else{ temp=asc2_1608[num][t]; } //µ÷ÓÃ1608×ÖÌå 8005778: 78fa ldrb r2, [r7, #3] 800577a: 7b7b ldrb r3, [r7, #13] 800577c: 4927 ldr r1, [pc, #156] ; (800581c ) 800577e: 0112 lsls r2, r2, #4 8005780: 440a add r2, r1 8005782: 4413 add r3, r2 8005784: 781b ldrb r3, [r3, #0] 8005786: 73fb strb r3, [r7, #15] for(t1=0;t1<8;t1++) 8005788: 2300 movs r3, #0 800578a: 73bb strb r3, [r7, #14] 800578c: e033 b.n 80057f6 { if(temp&0x80){LCD_set_dot(x,y,color);}else{if(bg!=color){LCD_set_dot(x,y,bg);}} 800578e: f997 300f ldrsb.w r3, [r7, #15] 8005792: 2b00 cmp r3, #0 8005794: da06 bge.n 80057a4 8005796: 8cba ldrh r2, [r7, #36] ; 0x24 8005798: 88b9 ldrh r1, [r7, #4] 800579a: 88fb ldrh r3, [r7, #6] 800579c: 4618 mov r0, r3 800579e: f7ff fe23 bl 80053e8 80057a2: e009 b.n 80057b8 80057a4: 8c3a ldrh r2, [r7, #32] 80057a6: 8cbb ldrh r3, [r7, #36] ; 0x24 80057a8: 429a cmp r2, r3 80057aa: d005 beq.n 80057b8 80057ac: 8c3a ldrh r2, [r7, #32] 80057ae: 88b9 ldrh r1, [r7, #4] 80057b0: 88fb ldrh r3, [r7, #6] 80057b2: 4618 mov r0, r3 80057b4: f7ff fe18 bl 80053e8 temp<<=1; 80057b8: 7bfb ldrb r3, [r7, #15] 80057ba: 005b lsls r3, r3, #1 80057bc: 73fb strb r3, [r7, #15] y++; 80057be: 88bb ldrh r3, [r7, #4] 80057c0: 3301 adds r3, #1 80057c2: 80bb strh r3, [r7, #4] if(x>=lcddev.width){return;}//³¬ÇøÓòÁË 80057c4: 4b16 ldr r3, [pc, #88] ; (8005820 ) 80057c6: 881b ldrh r3, [r3, #0] 80057c8: 88fa ldrh r2, [r7, #6] 80057ca: 429a cmp r2, r3 80057cc: d220 bcs.n 8005810 if((y-y0)==size) 80057ce: 88ba ldrh r2, [r7, #4] 80057d0: 897b ldrh r3, [r7, #10] 80057d2: 1ad2 subs r2, r2, r3 80057d4: 78bb ldrb r3, [r7, #2] 80057d6: 429a cmp r2, r3 80057d8: d10a bne.n 80057f0 { y=y0; 80057da: 897b ldrh r3, [r7, #10] 80057dc: 80bb strh r3, [r7, #4] x++; 80057de: 88fb ldrh r3, [r7, #6] 80057e0: 3301 adds r3, #1 80057e2: 80fb strh r3, [r7, #6] if(x>=lcddev.width){return;}//³¬ÇøÓòÁË 80057e4: 4b0e ldr r3, [pc, #56] ; (8005820 ) 80057e6: 881b ldrh r3, [r3, #0] 80057e8: 88fa ldrh r2, [r7, #6] 80057ea: 429a cmp r2, r3 80057ec: d307 bcc.n 80057fe 80057ee: e010 b.n 8005812 for(t1=0;t1<8;t1++) 80057f0: 7bbb ldrb r3, [r7, #14] 80057f2: 3301 adds r3, #1 80057f4: 73bb strb r3, [r7, #14] 80057f6: 7bbb ldrb r3, [r7, #14] 80057f8: 2b07 cmp r3, #7 80057fa: d9c8 bls.n 800578e 80057fc: e000 b.n 8005800 break; 80057fe: bf00 nop for(t=0;t 800580e: e000 b.n 8005812 if(x>=lcddev.width){return;}//³¬ÇøÓòÁË 8005810: bf00 nop } } } 8005812: 3714 adds r7, #20 8005814: 46bd mov sp, r7 8005816: bd90 pop {r4, r7, pc} 8005818: 0800a824 .word 0x0800a824 800581c: 0800ac98 .word 0x0800ac98 8005820: 20000354 .word 0x20000354 08005824 : //width,height:ÇøÓò´óС //size:×ÖÌå´óС //*p:×Ö·û´®ÆðʼµØÖ· void LCD_ShowString(uint16_t x,uint16_t y,uint8_t *p,uint8_t size,uint16_t bg,uint16_t color) { 8005824: b590 push {r4, r7, lr} 8005826: b087 sub sp, #28 8005828: af02 add r7, sp, #8 800582a: 60ba str r2, [r7, #8] 800582c: 461a mov r2, r3 800582e: 4603 mov r3, r0 8005830: 81fb strh r3, [r7, #14] 8005832: 460b mov r3, r1 8005834: 81bb strh r3, [r7, #12] 8005836: 4613 mov r3, r2 8005838: 71fb strb r3, [r7, #7] while(*p!='\0') 800583a: e026 b.n 800588a { if(x>=lcddev.width||*p=='\n') 800583c: 4b17 ldr r3, [pc, #92] ; (800589c ) 800583e: 881b ldrh r3, [r3, #0] 8005840: 89fa ldrh r2, [r7, #14] 8005842: 429a cmp r2, r3 8005844: d203 bcs.n 800584e 8005846: 68bb ldr r3, [r7, #8] 8005848: 781b ldrb r3, [r3, #0] 800584a: 2b0a cmp r3, #10 800584c: d107 bne.n 800585e { x=0; 800584e: 2300 movs r3, #0 8005850: 81fb strh r3, [r7, #14] y+=size; 8005852: 79fb ldrb r3, [r7, #7] 8005854: b29a uxth r2, r3 8005856: 89bb ldrh r3, [r7, #12] 8005858: 4413 add r3, r2 800585a: 81bb strh r3, [r7, #12] 800585c: e012 b.n 8005884 }else { LCD_ShowChar(x,y,*p,size,bg,color); 800585e: 68bb ldr r3, [r7, #8] 8005860: 781a ldrb r2, [r3, #0] 8005862: 79fc ldrb r4, [r7, #7] 8005864: 89b9 ldrh r1, [r7, #12] 8005866: 89f8 ldrh r0, [r7, #14] 8005868: 8cbb ldrh r3, [r7, #36] ; 0x24 800586a: 9301 str r3, [sp, #4] 800586c: 8c3b ldrh r3, [r7, #32] 800586e: 9300 str r3, [sp, #0] 8005870: 4623 mov r3, r4 8005872: f7ff ff5b bl 800572c x+=(size/2); 8005876: 79fb ldrb r3, [r7, #7] 8005878: 085b lsrs r3, r3, #1 800587a: b2db uxtb r3, r3 800587c: b29a uxth r2, r3 800587e: 89fb ldrh r3, [r7, #14] 8005880: 4413 add r3, r2 8005882: 81fb strh r3, [r7, #14] } p++; 8005884: 68bb ldr r3, [r7, #8] 8005886: 3301 adds r3, #1 8005888: 60bb str r3, [r7, #8] while(*p!='\0') 800588a: 68bb ldr r3, [r7, #8] 800588c: 781b ldrb r3, [r3, #0] 800588e: 2b00 cmp r3, #0 8005890: d1d4 bne.n 800583c } } 8005892: bf00 nop 8005894: bf00 nop 8005896: 3714 adds r7, #20 8005898: 46bd mov sp, r7 800589a: bd90 pop {r4, r7, pc} 800589c: 20000354 .word 0x20000354 080058a0 : //ÒòΪeepromоƬµÄдÈëËÙ¶ÈÓÐÏÞ£¬Ã¿Ð´ÈëÒ»¸ö×Ö·û¶¼ÐèÒªµÈ´ýÒ»¶Îʱ¼ä²ÅÄÜÍê³ÉдÈë //Õû¸öϵͳ²»¿ÉÄܵÈËüÒ»¸öµÄ£¬´«Í³µÄ½â¾ö·½·¨¿ÉÒÔʹÓö¨Ê±Æ÷ÖжϻòÕ߶àÏ߳̿ª±Ù×ÓÈÎÎñÔÚºǫ́±£´æ£¬ //ÕâÀïµÄ½â¾ö·½·¨ÊÇʹÓÃ״̬»ú£¬Í¨¹ýÒ»¸öÁ´±í½«Òª±£´æµÄÊý¾Ý´®ÆðÀ´£¬ÔÙͨ¹ý״̬ѭ»·Ò»¸ö¸ö±£´æ£¬±£´æÑÓʱµÈÓÚÑ­»·ÓÃʱ¡£ eeprom_write_buff_info eeprom_write_buffer; //´´½¨Á´±í void EPPROM_SLOWWRITE_INIT() //³õʼ»¯Á´±í { 80058a0: b480 push {r7} 80058a2: af00 add r7, sp, #0 eeprom_write_buffer.buff=NULL; 80058a4: 4b0a ldr r3, [pc, #40] ; (80058d0 ) 80058a6: 2200 movs r2, #0 80058a8: 601a str r2, [r3, #0] eeprom_write_buffer.end=NULL; 80058aa: 4b09 ldr r3, [pc, #36] ; (80058d0 ) 80058ac: 2200 movs r2, #0 80058ae: 609a str r2, [r3, #8] eeprom_write_buffer.head=NULL; 80058b0: 4b07 ldr r3, [pc, #28] ; (80058d0 ) 80058b2: 2200 movs r2, #0 80058b4: 605a str r2, [r3, #4] eeprom_write_buffer.save_timeout=5; //±ÜÃâ״̬»úÑ­»·¹ý¿ìµ¼Öµı£´æʧ°Ü£¬Õâ¸öÊÇ×îÉÙÑÓʱ¡££¨¸Ð¾õû±ØҪдÔÚÕâÀ̫ÀË·Ñ¿Õ¼äÁË£© 80058b6: 4b06 ldr r3, [pc, #24] ; (80058d0 ) 80058b8: 2205 movs r2, #5 80058ba: 741a strb r2, [r3, #16] eeprom_write_buffer.save_busy=0; //×îСÑÓʱÄÚΪæ״̬ 80058bc: 4a04 ldr r2, [pc, #16] ; (80058d0 ) 80058be: 7c53 ldrb r3, [r2, #17] 80058c0: f36f 0300 bfc r3, #0, #1 80058c4: 7453 strb r3, [r2, #17] } 80058c6: bf00 nop 80058c8: 46bd mov sp, r7 80058ca: bc80 pop {r7} 80058cc: 4770 bx lr 80058ce: bf00 nop 80058d0: 20000360 .word 0x20000360 080058d4 : //Ñ­»·±£´æ·þÎñ£¬¼ì²éÁ´±íÍ·ÊÇ·ñÓÐÊý¾ÝÊÇ·ñæ¡£ void EEPROM_SLOWWRITE_SERVER() { 80058d4: b580 push {r7, lr} 80058d6: b082 sub sp, #8 80058d8: af00 add r7, sp, #0 eeprom_write_buff *buff; char data; if(eeprom_write_buffer.save_busy) 80058da: 4b20 ldr r3, [pc, #128] ; (800595c ) 80058dc: 7c5b ldrb r3, [r3, #17] 80058de: f003 0301 and.w r3, r3, #1 80058e2: b2db uxtb r3, r3 80058e4: 2b00 cmp r3, #0 80058e6: d00c beq.n 8005902 { if(HAL_GetTick()>eeprom_write_buffer.save_time) 80058e8: f7fc f946 bl 8001b78 80058ec: 4602 mov r2, r0 80058ee: 4b1b ldr r3, [pc, #108] ; (800595c ) 80058f0: 68db ldr r3, [r3, #12] 80058f2: 429a cmp r2, r3 80058f4: d92e bls.n 8005954 { eeprom_write_buffer.save_busy=0; 80058f6: 4a19 ldr r2, [pc, #100] ; (800595c ) 80058f8: 7c53 ldrb r3, [r2, #17] 80058fa: f36f 0300 bfc r3, #0, #1 80058fe: 7453 strb r3, [r2, #17] free(eeprom_write_buffer.head); eeprom_write_buffer.head=buff; } } } 8005900: e028 b.n 8005954 if(eeprom_write_buffer.head!=NULL) 8005902: 4b16 ldr r3, [pc, #88] ; (800595c ) 8005904: 685b ldr r3, [r3, #4] 8005906: 2b00 cmp r3, #0 8005908: d024 beq.n 8005954 eeprom_write_buffer.save_busy=1; 800590a: 4a14 ldr r2, [pc, #80] ; (800595c ) 800590c: 7c53 ldrb r3, [r2, #17] 800590e: f043 0301 orr.w r3, r3, #1 8005912: 7453 strb r3, [r2, #17] eeprom_write_buffer.save_time=HAL_GetTick()+eeprom_write_buffer.save_timeout; 8005914: f7fc f930 bl 8001b78 8005918: 4603 mov r3, r0 800591a: 4a10 ldr r2, [pc, #64] ; (800595c ) 800591c: 7c12 ldrb r2, [r2, #16] 800591e: 4413 add r3, r2 8005920: 4a0e ldr r2, [pc, #56] ; (800595c ) 8005922: 60d3 str r3, [r2, #12] buff=eeprom_write_buffer.head->next; 8005924: 4b0d ldr r3, [pc, #52] ; (800595c ) 8005926: 685b ldr r3, [r3, #4] 8005928: 681b ldr r3, [r3, #0] 800592a: 607b str r3, [r7, #4] data=eeprom_write_buffer.head->date; 800592c: 4b0b ldr r3, [pc, #44] ; (800595c ) 800592e: 685b ldr r3, [r3, #4] 8005930: 799b ldrb r3, [r3, #6] 8005932: 70fb strb r3, [r7, #3] IIC_SAND_DATE(EEPROM_ADDRESS,eeprom_write_buffer.head->add,&data,1); 8005934: 4b09 ldr r3, [pc, #36] ; (800595c ) 8005936: 685b ldr r3, [r3, #4] 8005938: 8899 ldrh r1, [r3, #4] 800593a: 1cfa adds r2, r7, #3 800593c: 2301 movs r3, #1 800593e: 20a0 movs r0, #160 ; 0xa0 8005940: f000 f866 bl 8005a10 free(eeprom_write_buffer.head); 8005944: 4b05 ldr r3, [pc, #20] ; (800595c ) 8005946: 685b ldr r3, [r3, #4] 8005948: 4618 mov r0, r3 800594a: f001 ff1d bl 8007788 eeprom_write_buffer.head=buff; 800594e: 4a03 ldr r2, [pc, #12] ; (800595c ) 8005950: 687b ldr r3, [r7, #4] 8005952: 6053 str r3, [r2, #4] } 8005954: bf00 nop 8005956: 3708 adds r7, #8 8005958: 46bd mov sp, r7 800595a: bd80 pop {r7, pc} 800595c: 20000360 .word 0x20000360 08005960 : //´Óeeprom¶ÁÈ¡Êý¾Ý void EEPROM_READ_BATY(uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG) { 8005960: b580 push {r7, lr} 8005962: b082 sub sp, #8 8005964: af00 add r7, sp, #0 8005966: 4603 mov r3, r0 8005968: 6039 str r1, [r7, #0] 800596a: 80fb strh r3, [r7, #6] 800596c: 4613 mov r3, r2 800596e: 80bb strh r3, [r7, #4] IIC_READ_DATE(EEPROM_ADDRESS,IN_DEVICE_ADD,DATAS,LONG); 8005970: 88bb ldrh r3, [r7, #4] 8005972: 88f9 ldrh r1, [r7, #6] 8005974: 683a ldr r2, [r7, #0] 8005976: 20a0 movs r0, #160 ; 0xa0 8005978: f000 f868 bl 8005a4c } 800597c: bf00 nop 800597e: 3708 adds r7, #8 8005980: 46bd mov sp, r7 8005982: bd80 pop {r7, pc} 08005984 : //ÏòeepromдÈëÊý¾Ý void EEPROM_WRITE_BATY(uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG) { 8005984: b580 push {r7, lr} 8005986: b086 sub sp, #24 8005988: af00 add r7, sp, #0 800598a: 4603 mov r3, r0 800598c: 6039 str r1, [r7, #0] 800598e: 80fb strh r3, [r7, #6] 8005990: 4613 mov r3, r2 8005992: 80bb strh r3, [r7, #4] //IIC_SAND_DATE(EEPROM_ADDRESS,IN_DEVICE_ADD,DATAS,LONG); uint16_t addoffset=0; 8005994: 2300 movs r3, #0 8005996: 82fb strh r3, [r7, #22] eeprom_write_buff *buff; eeprom_write_buff *buff2; while(LONG--) 8005998: e02d b.n 80059f6 { buff =(eeprom_write_buff*)malloc(sizeof(eeprom_write_buff)); 800599a: 2008 movs r0, #8 800599c: f001 feec bl 8007778 80059a0: 4603 mov r3, r0 80059a2: 613b str r3, [r7, #16] if(buff!=NULL) 80059a4: 693b ldr r3, [r7, #16] 80059a6: 2b00 cmp r3, #0 80059a8: d02b beq.n 8005a02 { buff->add=IN_DEVICE_ADD+addoffset; 80059aa: 88fa ldrh r2, [r7, #6] 80059ac: 8afb ldrh r3, [r7, #22] 80059ae: 4413 add r3, r2 80059b0: b29a uxth r2, r3 80059b2: 693b ldr r3, [r7, #16] 80059b4: 809a strh r2, [r3, #4] buff->date=DATAS[addoffset]; 80059b6: 8afb ldrh r3, [r7, #22] 80059b8: 683a ldr r2, [r7, #0] 80059ba: 4413 add r3, r2 80059bc: 781a ldrb r2, [r3, #0] 80059be: 693b ldr r3, [r7, #16] 80059c0: 719a strb r2, [r3, #6] buff->next=NULL; 80059c2: 693b ldr r3, [r7, #16] 80059c4: 2200 movs r2, #0 80059c6: 601a str r2, [r3, #0] }else{return ;} if(eeprom_write_buffer.head==NULL) 80059c8: 4b10 ldr r3, [pc, #64] ; (8005a0c ) 80059ca: 685b ldr r3, [r3, #4] 80059cc: 2b00 cmp r3, #0 80059ce: d106 bne.n 80059de { eeprom_write_buffer.head=buff; 80059d0: 4a0e ldr r2, [pc, #56] ; (8005a0c ) 80059d2: 693b ldr r3, [r7, #16] 80059d4: 6053 str r3, [r2, #4] eeprom_write_buffer.end=buff; 80059d6: 4a0d ldr r2, [pc, #52] ; (8005a0c ) 80059d8: 693b ldr r3, [r7, #16] 80059da: 6093 str r3, [r2, #8] 80059dc: e008 b.n 80059f0 }else { buff2=eeprom_write_buffer.end; 80059de: 4b0b ldr r3, [pc, #44] ; (8005a0c ) 80059e0: 689b ldr r3, [r3, #8] 80059e2: 60fb str r3, [r7, #12] buff2->next=buff; 80059e4: 68fb ldr r3, [r7, #12] 80059e6: 693a ldr r2, [r7, #16] 80059e8: 601a str r2, [r3, #0] eeprom_write_buffer.end=buff; 80059ea: 4a08 ldr r2, [pc, #32] ; (8005a0c ) 80059ec: 693b ldr r3, [r7, #16] 80059ee: 6093 str r3, [r2, #8] } addoffset++; 80059f0: 8afb ldrh r3, [r7, #22] 80059f2: 3301 adds r3, #1 80059f4: 82fb strh r3, [r7, #22] while(LONG--) 80059f6: 88bb ldrh r3, [r7, #4] 80059f8: 1e5a subs r2, r3, #1 80059fa: 80ba strh r2, [r7, #4] 80059fc: 2b00 cmp r3, #0 80059fe: d1cc bne.n 800599a 8005a00: e000 b.n 8005a04 }else{return ;} 8005a02: bf00 nop } } 8005a04: 3718 adds r7, #24 8005a06: 46bd mov sp, r7 8005a08: bd80 pop {r7, pc} 8005a0a: bf00 nop 8005a0c: 20000360 .word 0x20000360 08005a10 : //iicÓ²¼þ½Ó¿Ú extern I2C_HandleTypeDef hi2c2; void IIC_SAND_DATE(uint16_t DEVICE_ADD,uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG) { 8005a10: b580 push {r7, lr} 8005a12: b088 sub sp, #32 8005a14: af04 add r7, sp, #16 8005a16: 60ba str r2, [r7, #8] 8005a18: 461a mov r2, r3 8005a1a: 4603 mov r3, r0 8005a1c: 81fb strh r3, [r7, #14] 8005a1e: 460b mov r3, r1 8005a20: 81bb strh r3, [r7, #12] 8005a22: 4613 mov r3, r2 8005a24: 80fb strh r3, [r7, #6] HAL_I2C_Mem_Write(&hi2c2,DEVICE_ADD,IN_DEVICE_ADD,I2C_MEMADD_SIZE_8BIT,DATAS,LONG,100); 8005a26: 89ba ldrh r2, [r7, #12] 8005a28: 89f9 ldrh r1, [r7, #14] 8005a2a: 2364 movs r3, #100 ; 0x64 8005a2c: 9302 str r3, [sp, #8] 8005a2e: 88fb ldrh r3, [r7, #6] 8005a30: 9301 str r3, [sp, #4] 8005a32: 68bb ldr r3, [r7, #8] 8005a34: 9300 str r3, [sp, #0] 8005a36: 2301 movs r3, #1 8005a38: 4803 ldr r0, [pc, #12] ; (8005a48 ) 8005a3a: f7fc fce1 bl 8002400 } 8005a3e: bf00 nop 8005a40: 3710 adds r7, #16 8005a42: 46bd mov sp, r7 8005a44: bd80 pop {r7, pc} 8005a46: bf00 nop 8005a48: 20000214 .word 0x20000214 08005a4c : void IIC_READ_DATE(uint16_t DEVICE_ADD,uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG) { 8005a4c: b580 push {r7, lr} 8005a4e: b088 sub sp, #32 8005a50: af04 add r7, sp, #16 8005a52: 60ba str r2, [r7, #8] 8005a54: 461a mov r2, r3 8005a56: 4603 mov r3, r0 8005a58: 81fb strh r3, [r7, #14] 8005a5a: 460b mov r3, r1 8005a5c: 81bb strh r3, [r7, #12] 8005a5e: 4613 mov r3, r2 8005a60: 80fb strh r3, [r7, #6] HAL_I2C_Mem_Read(&hi2c2,DEVICE_ADD,IN_DEVICE_ADD,I2C_MEMADD_SIZE_8BIT,DATAS,LONG,100); 8005a62: 89ba ldrh r2, [r7, #12] 8005a64: 89f9 ldrh r1, [r7, #14] 8005a66: 2364 movs r3, #100 ; 0x64 8005a68: 9302 str r3, [sp, #8] 8005a6a: 88fb ldrh r3, [r7, #6] 8005a6c: 9301 str r3, [sp, #4] 8005a6e: 68bb ldr r3, [r7, #8] 8005a70: 9300 str r3, [sp, #0] 8005a72: 2301 movs r3, #1 8005a74: 4803 ldr r0, [pc, #12] ; (8005a84 ) 8005a76: f7fc fdbd bl 80025f4 } 8005a7a: bf00 nop 8005a7c: 3710 adds r7, #16 8005a7e: 46bd mov sp, r7 8005a80: bd80 pop {r7, pc} 8005a82: bf00 nop 8005a84: 20000214 .word 0x20000214 08005a88 : * ÊäÈë £ºucAddress£¬¼Ä´æÆ÷µØÖ· * ·µ»Ø : ¼Ä´æÆ÷µÄµ±Ç°Öµ * µ÷Óà £ºÄÚ²¿µ÷Óà */ uint8_t ReadRawRC ( uint8_t ucAddress ) { 8005a88: b580 push {r7, lr} 8005a8a: b084 sub sp, #16 8005a8c: af00 add r7, sp, #0 8005a8e: 4603 mov r3, r0 8005a90: 71fb strb r3, [r7, #7] uint8_t ucAddr, ucReturn; ucAddr = ( ( ucAddress << 1 ) & 0x7E ) | 0x80; 8005a92: 79fb ldrb r3, [r7, #7] 8005a94: 005b lsls r3, r3, #1 8005a96: b25b sxtb r3, r3 8005a98: f003 037e and.w r3, r3, #126 ; 0x7e 8005a9c: b25b sxtb r3, r3 8005a9e: f063 037f orn r3, r3, #127 ; 0x7f 8005aa2: b25b sxtb r3, r3 8005aa4: b2db uxtb r3, r3 8005aa6: 73fb strb r3, [r7, #15] HAL_GPIO_WritePin(RC522_CS_GPIO_Port, RC522_CS_Pin, 0); 8005aa8: 2200 movs r2, #0 8005aaa: 2110 movs r1, #16 8005aac: 480d ldr r0, [pc, #52] ; (8005ae4 ) 8005aae: f7fc fb4a bl 8002146 HAL_SPI_Transmit(&hspi1,&ucAddr,1,100); 8005ab2: f107 010f add.w r1, r7, #15 8005ab6: 2364 movs r3, #100 ; 0x64 8005ab8: 2201 movs r2, #1 8005aba: 480b ldr r0, [pc, #44] ; (8005ae8 ) 8005abc: f7fd ffe6 bl 8003a8c HAL_SPI_Receive(&hspi1,&ucReturn,1,100); 8005ac0: f107 010e add.w r1, r7, #14 8005ac4: 2364 movs r3, #100 ; 0x64 8005ac6: 2201 movs r2, #1 8005ac8: 4807 ldr r0, [pc, #28] ; (8005ae8 ) 8005aca: f7fe f91b bl 8003d04 HAL_GPIO_WritePin(RC522_CS_GPIO_Port, RC522_CS_Pin, 1); 8005ace: 2201 movs r2, #1 8005ad0: 2110 movs r1, #16 8005ad2: 4804 ldr r0, [pc, #16] ; (8005ae4 ) 8005ad4: f7fc fb37 bl 8002146 return ucReturn; 8005ad8: 7bbb ldrb r3, [r7, #14] } 8005ada: 4618 mov r0, r3 8005adc: 3710 adds r7, #16 8005ade: 46bd mov sp, r7 8005ae0: bd80 pop {r7, pc} 8005ae2: bf00 nop 8005ae4: 40010800 .word 0x40010800 8005ae8: 200002f8 .word 0x200002f8 08005aec : * ucValue£¬Ð´Èë¼Ä´æÆ÷µÄÖµ * ·µ»Ø : ÎÞ * µ÷Óà £ºÄÚ²¿µ÷Óà */ void WriteRawRC ( uint8_t ucAddress, uint8_t ucValue ) { 8005aec: b580 push {r7, lr} 8005aee: b084 sub sp, #16 8005af0: af00 add r7, sp, #0 8005af2: 4603 mov r3, r0 8005af4: 460a mov r2, r1 8005af6: 71fb strb r3, [r7, #7] 8005af8: 4613 mov r3, r2 8005afa: 71bb strb r3, [r7, #6] uint8_t ucAddr; ucAddr = ( ucAddress << 1 ) & 0x7E; 8005afc: 79fb ldrb r3, [r7, #7] 8005afe: 005b lsls r3, r3, #1 8005b00: b2db uxtb r3, r3 8005b02: f003 037e and.w r3, r3, #126 ; 0x7e 8005b06: b2db uxtb r3, r3 8005b08: 73fb strb r3, [r7, #15] HAL_GPIO_WritePin(RC522_CS_GPIO_Port, RC522_CS_Pin, 0); 8005b0a: 2200 movs r2, #0 8005b0c: 2110 movs r1, #16 8005b0e: 480c ldr r0, [pc, #48] ; (8005b40 ) 8005b10: f7fc fb19 bl 8002146 HAL_SPI_Transmit(&hspi1,&ucAddr,1,100); 8005b14: f107 010f add.w r1, r7, #15 8005b18: 2364 movs r3, #100 ; 0x64 8005b1a: 2201 movs r2, #1 8005b1c: 4809 ldr r0, [pc, #36] ; (8005b44 ) 8005b1e: f7fd ffb5 bl 8003a8c HAL_SPI_Transmit(&hspi1,&ucValue,1,100); 8005b22: 1db9 adds r1, r7, #6 8005b24: 2364 movs r3, #100 ; 0x64 8005b26: 2201 movs r2, #1 8005b28: 4806 ldr r0, [pc, #24] ; (8005b44 ) 8005b2a: f7fd ffaf bl 8003a8c HAL_GPIO_WritePin(RC522_CS_GPIO_Port, RC522_CS_Pin, 1); 8005b2e: 2201 movs r2, #1 8005b30: 2110 movs r1, #16 8005b32: 4803 ldr r0, [pc, #12] ; (8005b40 ) 8005b34: f7fc fb07 bl 8002146 } 8005b38: bf00 nop 8005b3a: 3710 adds r7, #16 8005b3c: 46bd mov sp, r7 8005b3e: bd80 pop {r7, pc} 8005b40: 40010800 .word 0x40010800 8005b44: 200002f8 .word 0x200002f8 08005b48 : * ucMask£¬ÖÃλֵ * ·µ»Ø : ÎÞ * µ÷Óà £ºÄÚ²¿µ÷Óà */ void SetBitMask ( uint8_t ucReg, uint8_t ucMask ) { 8005b48: b580 push {r7, lr} 8005b4a: b084 sub sp, #16 8005b4c: af00 add r7, sp, #0 8005b4e: 4603 mov r3, r0 8005b50: 460a mov r2, r1 8005b52: 71fb strb r3, [r7, #7] 8005b54: 4613 mov r3, r2 8005b56: 71bb strb r3, [r7, #6] uint8_t ucTemp; ucTemp = ReadRawRC ( ucReg ); 8005b58: 79fb ldrb r3, [r7, #7] 8005b5a: 4618 mov r0, r3 8005b5c: f7ff ff94 bl 8005a88 8005b60: 4603 mov r3, r0 8005b62: 73fb strb r3, [r7, #15] WriteRawRC ( ucReg, ucTemp | ucMask ); // set bit mask 8005b64: 7bfa ldrb r2, [r7, #15] 8005b66: 79bb ldrb r3, [r7, #6] 8005b68: 4313 orrs r3, r2 8005b6a: b2da uxtb r2, r3 8005b6c: 79fb ldrb r3, [r7, #7] 8005b6e: 4611 mov r1, r2 8005b70: 4618 mov r0, r3 8005b72: f7ff ffbb bl 8005aec } 8005b76: bf00 nop 8005b78: 3710 adds r7, #16 8005b7a: 46bd mov sp, r7 8005b7c: bd80 pop {r7, pc} 08005b7e : * ucMask£¬Çåλֵ * ·µ»Ø : ÎÞ * µ÷Óà £ºÄÚ²¿µ÷Óà */ void ClearBitMask ( uint8_t ucReg, uint8_t ucMask ) { 8005b7e: b580 push {r7, lr} 8005b80: b084 sub sp, #16 8005b82: af00 add r7, sp, #0 8005b84: 4603 mov r3, r0 8005b86: 460a mov r2, r1 8005b88: 71fb strb r3, [r7, #7] 8005b8a: 4613 mov r3, r2 8005b8c: 71bb strb r3, [r7, #6] uint8_t ucTemp; ucTemp = ReadRawRC ( ucReg ); 8005b8e: 79fb ldrb r3, [r7, #7] 8005b90: 4618 mov r0, r3 8005b92: f7ff ff79 bl 8005a88 8005b96: 4603 mov r3, r0 8005b98: 73fb strb r3, [r7, #15] WriteRawRC ( ucReg, ucTemp & ( ~ ucMask) ); // clear bit mask 8005b9a: f997 3006 ldrsb.w r3, [r7, #6] 8005b9e: 43db mvns r3, r3 8005ba0: b25a sxtb r2, r3 8005ba2: f997 300f ldrsb.w r3, [r7, #15] 8005ba6: 4013 ands r3, r2 8005ba8: b25b sxtb r3, r3 8005baa: b2da uxtb r2, r3 8005bac: 79fb ldrb r3, [r7, #7] 8005bae: 4611 mov r1, r2 8005bb0: 4618 mov r0, r3 8005bb2: f7ff ff9b bl 8005aec } 8005bb6: bf00 nop 8005bb8: 3710 adds r7, #16 8005bba: 46bd mov sp, r7 8005bbc: bd80 pop {r7, pc} 08005bbe : * ÊäÈë £ºÎÞ * ·µ»Ø : ÎÞ * µ÷Óà £ºÄÚ²¿µ÷Óà */ void PcdAntennaOn ( void ) { 8005bbe: b580 push {r7, lr} 8005bc0: b082 sub sp, #8 8005bc2: af00 add r7, sp, #0 uint8_t uc; uc = ReadRawRC ( TxControlReg ); 8005bc4: 2014 movs r0, #20 8005bc6: f7ff ff5f bl 8005a88 8005bca: 4603 mov r3, r0 8005bcc: 71fb strb r3, [r7, #7] if ( ! ( uc & 0x03 ) ) 8005bce: 79fb ldrb r3, [r7, #7] 8005bd0: f003 0303 and.w r3, r3, #3 8005bd4: 2b00 cmp r3, #0 8005bd6: d103 bne.n 8005be0 { SetBitMask(TxControlReg, 0x03); 8005bd8: 2103 movs r1, #3 8005bda: 2014 movs r0, #20 8005bdc: f7ff ffb4 bl 8005b48 } } 8005be0: bf00 nop 8005be2: 3708 adds r7, #8 8005be4: 46bd mov sp, r7 8005be6: bd80 pop {r7, pc} 08005be8 : * ÊäÈë £ºÎÞ * ·µ»Ø : ÎÞ * µ÷Óà £ºÍⲿµ÷Óà */ void PcdReset ( void ) { 8005be8: b580 push {r7, lr} 8005bea: af00 add r7, sp, #0 HAL_Delay(1); 8005bec: 2001 movs r0, #1 8005bee: f7fb ffcd bl 8001b8c WriteRawRC ( CommandReg, 0x0f ); 8005bf2: 210f movs r1, #15 8005bf4: 2001 movs r0, #1 8005bf6: f7ff ff79 bl 8005aec while ( ReadRawRC ( CommandReg ) & 0x10 ); 8005bfa: bf00 nop 8005bfc: 2001 movs r0, #1 8005bfe: f7ff ff43 bl 8005a88 8005c02: 4603 mov r3, r0 8005c04: f003 0310 and.w r3, r3, #16 8005c08: 2b00 cmp r3, #0 8005c0a: d1f7 bne.n 8005bfc HAL_Delay(1); 8005c0c: 2001 movs r0, #1 8005c0e: f7fb ffbd bl 8001b8c WriteRawRC ( ModeReg, 0x3D ); //¶¨Òå·¢ËͺͽÓÊÕ³£ÓÃģʽ ºÍMifare¿¨Í¨Ñ¶£¬CRC³õʼֵ0x6363 8005c12: 213d movs r1, #61 ; 0x3d 8005c14: 2011 movs r0, #17 8005c16: f7ff ff69 bl 8005aec WriteRawRC ( TReloadRegL, 30 ); //16λ¶¨Ê±Æ÷µÍλ 8005c1a: 211e movs r1, #30 8005c1c: 202d movs r0, #45 ; 0x2d 8005c1e: f7ff ff65 bl 8005aec WriteRawRC ( TReloadRegH, 0 ); //16λ¶¨Ê±Æ÷¸ßλ 8005c22: 2100 movs r1, #0 8005c24: 202c movs r0, #44 ; 0x2c 8005c26: f7ff ff61 bl 8005aec WriteRawRC ( TModeReg, 0x8D ); //¶¨ÒåÄÚ²¿¶¨Ê±Æ÷µÄÉèÖà 8005c2a: 218d movs r1, #141 ; 0x8d 8005c2c: 202a movs r0, #42 ; 0x2a 8005c2e: f7ff ff5d bl 8005aec WriteRawRC ( TPrescalerReg, 0x3E ); //ÉèÖö¨Ê±Æ÷·ÖƵϵÊý 8005c32: 213e movs r1, #62 ; 0x3e 8005c34: 202b movs r0, #43 ; 0x2b 8005c36: f7ff ff59 bl 8005aec WriteRawRC ( TxAutoReg, 0x40 ); //µ÷ÖÆ·¢ËÍÐźÅΪ100%ASK 8005c3a: 2140 movs r1, #64 ; 0x40 8005c3c: 2015 movs r0, #21 8005c3e: f7ff ff55 bl 8005aec } 8005c42: bf00 nop 8005c44: bd80 pop {r7, pc} 08005c46 : * ÊäÈë £ºucType£¬¹¤×÷·½Ê½ * ·µ»Ø : ÎÞ * µ÷Óà £ºÍⲿµ÷Óà */ void M500PcdConfigISOType ( uint8_t ucType ) { 8005c46: b580 push {r7, lr} 8005c48: b082 sub sp, #8 8005c4a: af00 add r7, sp, #0 8005c4c: 4603 mov r3, r0 8005c4e: 71fb strb r3, [r7, #7] if ( ucType == 'A') //ISO14443_A 8005c50: 79fb ldrb r3, [r7, #7] 8005c52: 2b41 cmp r3, #65 ; 0x41 8005c54: d124 bne.n 8005ca0 { ClearBitMask ( Status2Reg, 0x08 ); 8005c56: 2108 movs r1, #8 8005c58: 2008 movs r0, #8 8005c5a: f7ff ff90 bl 8005b7e WriteRawRC ( ModeReg, 0x3D );//3F 8005c5e: 213d movs r1, #61 ; 0x3d 8005c60: 2011 movs r0, #17 8005c62: f7ff ff43 bl 8005aec WriteRawRC ( RxSelReg, 0x86 );//84 8005c66: 2186 movs r1, #134 ; 0x86 8005c68: 2017 movs r0, #23 8005c6a: f7ff ff3f bl 8005aec WriteRawRC( RFCfgReg, 0x7F ); //4F 8005c6e: 217f movs r1, #127 ; 0x7f 8005c70: 2026 movs r0, #38 ; 0x26 8005c72: f7ff ff3b bl 8005aec WriteRawRC( TReloadRegL, 30 );//tmoLength);// TReloadVal = 'h6a =tmoLength(dec) 8005c76: 211e movs r1, #30 8005c78: 202d movs r0, #45 ; 0x2d 8005c7a: f7ff ff37 bl 8005aec WriteRawRC ( TReloadRegH, 0 ); 8005c7e: 2100 movs r1, #0 8005c80: 202c movs r0, #44 ; 0x2c 8005c82: f7ff ff33 bl 8005aec WriteRawRC ( TModeReg, 0x8D ); 8005c86: 218d movs r1, #141 ; 0x8d 8005c88: 202a movs r0, #42 ; 0x2a 8005c8a: f7ff ff2f bl 8005aec WriteRawRC ( TPrescalerReg, 0x3E ); 8005c8e: 213e movs r1, #62 ; 0x3e 8005c90: 202b movs r0, #43 ; 0x2b 8005c92: f7ff ff2b bl 8005aec HAL_Delay(1); 8005c96: 2001 movs r0, #1 8005c98: f7fb ff78 bl 8001b8c PcdAntennaOn ();//¿ªÌìÏß 8005c9c: f7ff ff8f bl 8005bbe } } 8005ca0: bf00 nop 8005ca2: 3708 adds r7, #8 8005ca4: 46bd mov sp, r7 8005ca6: bd80 pop {r7, pc} 08005ca8 : * ·µ»Ø : ״ֵ̬ * = MI_OK£¬³É¹¦ * µ÷Óà £ºÄÚ²¿µ÷Óà */ char PcdComMF522 ( uint8_t ucCommand, uint8_t * pInData, uint8_t ucInLenByte, uint8_t * pOutData, uint32_t * pOutLenBit ) { 8005ca8: b590 push {r4, r7, lr} 8005caa: b089 sub sp, #36 ; 0x24 8005cac: af00 add r7, sp, #0 8005cae: 60b9 str r1, [r7, #8] 8005cb0: 607b str r3, [r7, #4] 8005cb2: 4603 mov r3, r0 8005cb4: 73fb strb r3, [r7, #15] 8005cb6: 4613 mov r3, r2 8005cb8: 73bb strb r3, [r7, #14] char cStatus = MI_ERR; 8005cba: 2302 movs r3, #2 8005cbc: 77fb strb r3, [r7, #31] uint8_t ucIrqEn = 0x00; 8005cbe: 2300 movs r3, #0 8005cc0: 77bb strb r3, [r7, #30] uint8_t ucWaitFor = 0x00; 8005cc2: 2300 movs r3, #0 8005cc4: 777b strb r3, [r7, #29] uint8_t ucLastBits; uint8_t ucN; uint32_t ul; switch ( ucCommand ) 8005cc6: 7bfb ldrb r3, [r7, #15] 8005cc8: 2b0c cmp r3, #12 8005cca: d006 beq.n 8005cda 8005ccc: 2b0e cmp r3, #14 8005cce: d109 bne.n 8005ce4 { case PCD_AUTHENT: //MifareÈÏÖ¤ ucIrqEn = 0x12; //ÔÊÐí´íÎóÖжÏÇëÇóErrIEn ÔÊÐí¿ÕÏÐÖжÏIdleIEn 8005cd0: 2312 movs r3, #18 8005cd2: 77bb strb r3, [r7, #30] ucWaitFor = 0x10; //ÈÏ֤Ѱ¿¨µÈ´ýʱºò ²éѯ¿ÕÏÐÖжϱê־λ 8005cd4: 2310 movs r3, #16 8005cd6: 777b strb r3, [r7, #29] break; 8005cd8: e005 b.n 8005ce6 case PCD_TRANSCEIVE: //½ÓÊÕ·¢ËÍ ·¢ËͽÓÊÕ ucIrqEn = 0x77; //ÔÊÐíTxIEn RxIEn IdleIEn LoAlertIEn ErrIEn TimerIEn 8005cda: 2377 movs r3, #119 ; 0x77 8005cdc: 77bb strb r3, [r7, #30] ucWaitFor = 0x30; //Ñ°¿¨µÈ´ýʱºò ²éѯ½ÓÊÕÖжϱê־λÓë ¿ÕÏÐÖжϱê־λ 8005cde: 2330 movs r3, #48 ; 0x30 8005ce0: 777b strb r3, [r7, #29] break; 8005ce2: e000 b.n 8005ce6 default: break; 8005ce4: bf00 nop } WriteRawRC ( ComIEnReg, ucIrqEn | 0x80 ); //IRqInvÖÃλ¹Ü½ÅIRQÓëStatus1RegµÄIRqλµÄÖµÏà·´ 8005ce6: 7fbb ldrb r3, [r7, #30] 8005ce8: f063 037f orn r3, r3, #127 ; 0x7f 8005cec: b2db uxtb r3, r3 8005cee: 4619 mov r1, r3 8005cf0: 2002 movs r0, #2 8005cf2: f7ff fefb bl 8005aec ClearBitMask ( ComIrqReg, 0x80 ); //Set1¸ÃλÇåÁãʱ£¬CommIRqRegµÄÆÁ±ÎλÇåÁã 8005cf6: 2180 movs r1, #128 ; 0x80 8005cf8: 2004 movs r0, #4 8005cfa: f7ff ff40 bl 8005b7e WriteRawRC ( CommandReg, PCD_IDLE ); //д¿ÕÏÐÃüÁî 8005cfe: 2100 movs r1, #0 8005d00: 2001 movs r0, #1 8005d02: f7ff fef3 bl 8005aec SetBitMask ( FIFOLevelReg, 0x80 ); //ÖÃλFlushBufferÇå³ýÄÚ²¿FIFOµÄ¶ÁºÍдָÕëÒÔ¼°ErrRegµÄBufferOvfl±ê־λ±»Çå³ý 8005d06: 2180 movs r1, #128 ; 0x80 8005d08: 200a movs r0, #10 8005d0a: f7ff ff1d bl 8005b48 for ( ul = 0; ul < ucInLenByte; ul ++ ) 8005d0e: 2300 movs r3, #0 8005d10: 61bb str r3, [r7, #24] 8005d12: e00a b.n 8005d2a { WriteRawRC ( FIFODataReg, pInData [ ul ] ); //дÊý¾Ý½øFIFOdata 8005d14: 68ba ldr r2, [r7, #8] 8005d16: 69bb ldr r3, [r7, #24] 8005d18: 4413 add r3, r2 8005d1a: 781b ldrb r3, [r3, #0] 8005d1c: 4619 mov r1, r3 8005d1e: 2009 movs r0, #9 8005d20: f7ff fee4 bl 8005aec for ( ul = 0; ul < ucInLenByte; ul ++ ) 8005d24: 69bb ldr r3, [r7, #24] 8005d26: 3301 adds r3, #1 8005d28: 61bb str r3, [r7, #24] 8005d2a: 7bbb ldrb r3, [r7, #14] 8005d2c: 69ba ldr r2, [r7, #24] 8005d2e: 429a cmp r2, r3 8005d30: d3f0 bcc.n 8005d14 } WriteRawRC ( CommandReg, ucCommand ); //дÃüÁî 8005d32: 7bfb ldrb r3, [r7, #15] 8005d34: 4619 mov r1, r3 8005d36: 2001 movs r0, #1 8005d38: f7ff fed8 bl 8005aec if ( ucCommand == PCD_TRANSCEIVE ) 8005d3c: 7bfb ldrb r3, [r7, #15] 8005d3e: 2b0c cmp r3, #12 8005d40: d103 bne.n 8005d4a { SetBitMask(BitFramingReg,0x80); //StartSendÖÃλÆô¶¯Êý¾Ý·¢ËÍ ¸ÃλÓëÊÕ·¢ÃüÁîʹÓÃʱ²ÅÓÐЧ 8005d42: 2180 movs r1, #128 ; 0x80 8005d44: 200d movs r0, #13 8005d46: f7ff feff bl 8005b48 } ul = 1000;//¸ù¾ÝʱÖÓƵÂʵ÷Õû£¬²Ù×÷M1¿¨×î´óµÈ´ýʱ¼ä25ms 8005d4a: f44f 737a mov.w r3, #1000 ; 0x3e8 8005d4e: 61bb str r3, [r7, #24] do //ÈÏÖ¤ ÓëÑ°¿¨µÈ´ýʱ¼ä { ucN = ReadRawRC ( ComIrqReg ); //²éѯʼþÖÐ¶Ï 8005d50: 2004 movs r0, #4 8005d52: f7ff fe99 bl 8005a88 8005d56: 4603 mov r3, r0 8005d58: 773b strb r3, [r7, #28] ul --; 8005d5a: 69bb ldr r3, [r7, #24] 8005d5c: 3b01 subs r3, #1 8005d5e: 61bb str r3, [r7, #24] } while ( ( ul != 0 ) && ( ! ( ucN & 0x01 ) ) && ( ! ( ucN & ucWaitFor ) ) ); //Í˳öÌõ¼þi=0,¶¨Ê±Æ÷Öжϣ¬Óëд¿ÕÏÐÃüÁî 8005d60: 69bb ldr r3, [r7, #24] 8005d62: 2b00 cmp r3, #0 8005d64: d00a beq.n 8005d7c 8005d66: 7f3b ldrb r3, [r7, #28] 8005d68: f003 0301 and.w r3, r3, #1 8005d6c: 2b00 cmp r3, #0 8005d6e: d105 bne.n 8005d7c 8005d70: 7f3a ldrb r2, [r7, #28] 8005d72: 7f7b ldrb r3, [r7, #29] 8005d74: 4013 ands r3, r2 8005d76: b2db uxtb r3, r3 8005d78: 2b00 cmp r3, #0 8005d7a: d0e9 beq.n 8005d50 ClearBitMask ( BitFramingReg, 0x80 ); //ÇåÀíÔÊÐíStartSendλ 8005d7c: 2180 movs r1, #128 ; 0x80 8005d7e: 200d movs r0, #13 8005d80: f7ff fefd bl 8005b7e if ( ul != 0 ) 8005d84: 69bb ldr r3, [r7, #24] 8005d86: 2b00 cmp r3, #0 8005d88: d052 beq.n 8005e30 { if ( ! (( ReadRawRC ( ErrorReg ) & 0x1B )) ) //¶Á´íÎó±êÖ¾¼Ä´æÆ÷BufferOfI CollErr ParityErr ProtocolErr 8005d8a: 2006 movs r0, #6 8005d8c: f7ff fe7c bl 8005a88 8005d90: 4603 mov r3, r0 8005d92: f003 031b and.w r3, r3, #27 8005d96: 2b00 cmp r3, #0 8005d98: d148 bne.n 8005e2c { cStatus = MI_OK; 8005d9a: 2300 movs r3, #0 8005d9c: 77fb strb r3, [r7, #31] if ( ucN & ucIrqEn & 0x01 ) //ÊÇ·ñ·¢Éú¶¨Ê±Æ÷ÖÐ¶Ï 8005d9e: 7f3a ldrb r2, [r7, #28] 8005da0: 7fbb ldrb r3, [r7, #30] 8005da2: 4013 ands r3, r2 8005da4: b2db uxtb r3, r3 8005da6: f003 0301 and.w r3, r3, #1 8005daa: 2b00 cmp r3, #0 8005dac: d001 beq.n 8005db2 { cStatus = MI_NOTAGERR; 8005dae: 2301 movs r3, #1 8005db0: 77fb strb r3, [r7, #31] } if ( ucCommand == PCD_TRANSCEIVE ) 8005db2: 7bfb ldrb r3, [r7, #15] 8005db4: 2b0c cmp r3, #12 8005db6: d13b bne.n 8005e30 { ucN = ReadRawRC ( FIFOLevelReg ); //¶ÁFIFOÖб£´æµÄ×Ö½ÚÊý 8005db8: 200a movs r0, #10 8005dba: f7ff fe65 bl 8005a88 8005dbe: 4603 mov r3, r0 8005dc0: 773b strb r3, [r7, #28] ucLastBits = ReadRawRC ( ControlReg ) & 0x07; //×îºó½ÓÊÕµ½µÃ×Ö½ÚµÄÓÐЧλÊý 8005dc2: 200c movs r0, #12 8005dc4: f7ff fe60 bl 8005a88 8005dc8: 4603 mov r3, r0 8005dca: f003 0307 and.w r3, r3, #7 8005dce: 75fb strb r3, [r7, #23] if ( ucLastBits ) 8005dd0: 7dfb ldrb r3, [r7, #23] 8005dd2: 2b00 cmp r3, #0 8005dd4: d008 beq.n 8005de8 { * pOutLenBit = ( ucN - 1 ) * 8 + ucLastBits; //N¸ö×Ö½ÚÊý¼õÈ¥1£¨×îºóÒ»¸ö×Ö½Ú£©+×îºóһλµÄλÊý ¶ÁÈ¡µ½µÄÊý¾Ý×ÜλÊý 8005dd6: 7f3b ldrb r3, [r7, #28] 8005dd8: 3b01 subs r3, #1 8005dda: 00da lsls r2, r3, #3 8005ddc: 7dfb ldrb r3, [r7, #23] 8005dde: 4413 add r3, r2 8005de0: 461a mov r2, r3 8005de2: 6b3b ldr r3, [r7, #48] ; 0x30 8005de4: 601a str r2, [r3, #0] 8005de6: e004 b.n 8005df2 } else { * pOutLenBit = ucN * 8; //×îºó½ÓÊÕµ½µÄ×Ö½ÚÕû¸ö×Ö½ÚÓÐЧ 8005de8: 7f3b ldrb r3, [r7, #28] 8005dea: 00db lsls r3, r3, #3 8005dec: 461a mov r2, r3 8005dee: 6b3b ldr r3, [r7, #48] ; 0x30 8005df0: 601a str r2, [r3, #0] } if ( ucN == 0 ) 8005df2: 7f3b ldrb r3, [r7, #28] 8005df4: 2b00 cmp r3, #0 8005df6: d101 bne.n 8005dfc { ucN = 1; 8005df8: 2301 movs r3, #1 8005dfa: 773b strb r3, [r7, #28] } if ( ucN > MAXRLEN ) 8005dfc: 7f3b ldrb r3, [r7, #28] 8005dfe: 2b12 cmp r3, #18 8005e00: d901 bls.n 8005e06 { ucN = MAXRLEN; 8005e02: 2312 movs r3, #18 8005e04: 773b strb r3, [r7, #28] } for ( ul = 0; ul < ucN; ul ++ ) 8005e06: 2300 movs r3, #0 8005e08: 61bb str r3, [r7, #24] 8005e0a: e00a b.n 8005e22 { pOutData [ ul ] = ReadRawRC ( FIFODataReg ); 8005e0c: 687a ldr r2, [r7, #4] 8005e0e: 69bb ldr r3, [r7, #24] 8005e10: 18d4 adds r4, r2, r3 8005e12: 2009 movs r0, #9 8005e14: f7ff fe38 bl 8005a88 8005e18: 4603 mov r3, r0 8005e1a: 7023 strb r3, [r4, #0] for ( ul = 0; ul < ucN; ul ++ ) 8005e1c: 69bb ldr r3, [r7, #24] 8005e1e: 3301 adds r3, #1 8005e20: 61bb str r3, [r7, #24] 8005e22: 7f3b ldrb r3, [r7, #28] 8005e24: 69ba ldr r2, [r7, #24] 8005e26: 429a cmp r2, r3 8005e28: d3f0 bcc.n 8005e0c 8005e2a: e001 b.n 8005e30 } } else { cStatus = MI_ERR; 8005e2c: 2302 movs r3, #2 8005e2e: 77fb strb r3, [r7, #31] } } SetBitMask ( ControlReg, 0x80 ); // stop timer now 8005e30: 2180 movs r1, #128 ; 0x80 8005e32: 200c movs r0, #12 8005e34: f7ff fe88 bl 8005b48 WriteRawRC ( CommandReg, PCD_IDLE ); 8005e38: 2100 movs r1, #0 8005e3a: 2001 movs r0, #1 8005e3c: f7ff fe56 bl 8005aec return cStatus; 8005e40: 7ffb ldrb r3, [r7, #31] } 8005e42: 4618 mov r0, r3 8005e44: 3724 adds r7, #36 ; 0x24 8005e46: 46bd mov sp, r7 8005e48: bd90 pop {r4, r7, pc} 08005e4a : * ·µ»Ø : ״ֵ̬ * = MI_OK£¬³É¹¦ * µ÷Óà £ºÍⲿµ÷Óà */ char PcdRequest ( uint8_t ucReq_code, uint8_t * pTagType ) { 8005e4a: b580 push {r7, lr} 8005e4c: b08a sub sp, #40 ; 0x28 8005e4e: af02 add r7, sp, #8 8005e50: 4603 mov r3, r0 8005e52: 6039 str r1, [r7, #0] 8005e54: 71fb strb r3, [r7, #7] char cStatus; uint8_t ucComMF522Buf [ MAXRLEN ]; uint32_t ulLen; ClearBitMask ( Status2Reg, 0x08 ); //ÇåÀíָʾMIFARECyptolµ¥Ôª½ÓͨÒÔ¼°ËùÓп¨µÄÊý¾ÝͨÐű»¼ÓÃܵÄÇé¿ö 8005e56: 2108 movs r1, #8 8005e58: 2008 movs r0, #8 8005e5a: f7ff fe90 bl 8005b7e WriteRawRC ( BitFramingReg, 0x07 ); // ·¢Ë͵Ä×îºóÒ»¸ö×Ö½ÚµÄ Æßλ 8005e5e: 2107 movs r1, #7 8005e60: 200d movs r0, #13 8005e62: f7ff fe43 bl 8005aec SetBitMask ( TxControlReg, 0x03 ); //TX1,TX2¹Ü½ÅµÄÊä³öÐźŴ«µÝ¾­·¢Ë͵÷ÖƵÄ13.56µÄÄÜÁ¿Ôز¨ÐźŠ8005e66: 2103 movs r1, #3 8005e68: 2014 movs r0, #20 8005e6a: f7ff fe6d bl 8005b48 ucComMF522Buf [ 0 ] = ucReq_code; //´æÈë ¿¨Æ¬ÃüÁî×Ö 8005e6e: 79fb ldrb r3, [r7, #7] 8005e70: 733b strb r3, [r7, #12] cStatus = PcdComMF522 ( PCD_TRANSCEIVE, ucComMF522Buf, 1, ucComMF522Buf, & ulLen ); //Ñ°¿¨ 8005e72: f107 020c add.w r2, r7, #12 8005e76: f107 010c add.w r1, r7, #12 8005e7a: f107 0308 add.w r3, r7, #8 8005e7e: 9300 str r3, [sp, #0] 8005e80: 4613 mov r3, r2 8005e82: 2201 movs r2, #1 8005e84: 200c movs r0, #12 8005e86: f7ff ff0f bl 8005ca8 8005e8a: 4603 mov r3, r0 8005e8c: 77fb strb r3, [r7, #31] if ( ( cStatus == MI_OK ) && ( ulLen == 0x10 ) ) //Ñ°¿¨³É¹¦·µ»Ø¿¨ÀàÐÍ 8005e8e: 7ffb ldrb r3, [r7, #31] 8005e90: 2b00 cmp r3, #0 8005e92: d10a bne.n 8005eaa 8005e94: 68bb ldr r3, [r7, #8] 8005e96: 2b10 cmp r3, #16 8005e98: d107 bne.n 8005eaa { * pTagType = ucComMF522Buf [ 0 ]; 8005e9a: 7b3a ldrb r2, [r7, #12] 8005e9c: 683b ldr r3, [r7, #0] 8005e9e: 701a strb r2, [r3, #0] * ( pTagType + 1 ) = ucComMF522Buf [ 1 ]; 8005ea0: 683b ldr r3, [r7, #0] 8005ea2: 3301 adds r3, #1 8005ea4: 7b7a ldrb r2, [r7, #13] 8005ea6: 701a strb r2, [r3, #0] 8005ea8: e001 b.n 8005eae } else { cStatus = MI_ERR; 8005eaa: 2302 movs r3, #2 8005eac: 77fb strb r3, [r7, #31] } return cStatus; 8005eae: 7ffb ldrb r3, [r7, #31] } 8005eb0: 4618 mov r0, r3 8005eb2: 3720 adds r7, #32 8005eb4: 46bd mov sp, r7 8005eb6: bd80 pop {r7, pc} 08005eb8 : * ·µ»Ø : ״ֵ̬ * = MI_OK£¬³É¹¦ * µ÷Óà £ºÍⲿµ÷Óà */ char PcdAnticoll ( uint8_t * pSnr ) { 8005eb8: b580 push {r7, lr} 8005eba: b08c sub sp, #48 ; 0x30 8005ebc: af02 add r7, sp, #8 8005ebe: 6078 str r0, [r7, #4] char cStatus; uint8_t uc, ucSnr_check = 0; 8005ec0: 2300 movs r3, #0 8005ec2: f887 3025 strb.w r3, [r7, #37] ; 0x25 uint8_t ucComMF522Buf [ MAXRLEN ]; uint32_t ulLen; ClearBitMask ( Status2Reg, 0x08 ); //ÇåMFCryptol Onλ Ö»Óгɹ¦Ö´ÐÐMFAuthentÃüÁîºó£¬¸Ãλ²ÅÄÜÖÃλ 8005ec6: 2108 movs r1, #8 8005ec8: 2008 movs r0, #8 8005eca: f7ff fe58 bl 8005b7e WriteRawRC ( BitFramingReg, 0x00); //ÇåÀí¼Ä´æÆ÷ Í£Ö¹ÊÕ·¢ 8005ece: 2100 movs r1, #0 8005ed0: 200d movs r0, #13 8005ed2: f7ff fe0b bl 8005aec ClearBitMask ( CollReg, 0x80 ); //ÇåValuesAfterCollËùÓнÓÊÕµÄλÔÚ³åÍ»ºó±»Çå³ý 8005ed6: 2180 movs r1, #128 ; 0x80 8005ed8: 200e movs r0, #14 8005eda: f7ff fe50 bl 8005b7e ucComMF522Buf [ 0 ] = 0x93; //¿¨Æ¬·À³åÍ»ÃüÁî 8005ede: 2393 movs r3, #147 ; 0x93 8005ee0: 743b strb r3, [r7, #16] ucComMF522Buf [ 1 ] = 0x20; 8005ee2: 2320 movs r3, #32 8005ee4: 747b strb r3, [r7, #17] cStatus = PcdComMF522 ( PCD_TRANSCEIVE, ucComMF522Buf, 2, ucComMF522Buf, & ulLen);//Ó뿨ƬͨÐÅ 8005ee6: f107 0210 add.w r2, r7, #16 8005eea: f107 0110 add.w r1, r7, #16 8005eee: f107 030c add.w r3, r7, #12 8005ef2: 9300 str r3, [sp, #0] 8005ef4: 4613 mov r3, r2 8005ef6: 2202 movs r2, #2 8005ef8: 200c movs r0, #12 8005efa: f7ff fed5 bl 8005ca8 8005efe: 4603 mov r3, r0 8005f00: f887 3027 strb.w r3, [r7, #39] ; 0x27 if ( cStatus == MI_OK) //ͨÐųɹ¦ 8005f04: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 8005f08: 2b00 cmp r3, #0 8005f0a: d132 bne.n 8005f72 { for ( uc = 0; uc < 4; uc ++ ) 8005f0c: 2300 movs r3, #0 8005f0e: f887 3026 strb.w r3, [r7, #38] ; 0x26 8005f12: e01c b.n 8005f4e { * ( pSnr + uc ) = ucComMF522Buf [ uc ]; //¶Á³öUID 8005f14: f897 2026 ldrb.w r2, [r7, #38] ; 0x26 8005f18: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8005f1c: 6879 ldr r1, [r7, #4] 8005f1e: 440b add r3, r1 8005f20: f107 0128 add.w r1, r7, #40 ; 0x28 8005f24: 440a add r2, r1 8005f26: f812 2c18 ldrb.w r2, [r2, #-24] 8005f2a: 701a strb r2, [r3, #0] ucSnr_check ^= ucComMF522Buf [ uc ]; 8005f2c: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8005f30: f107 0228 add.w r2, r7, #40 ; 0x28 8005f34: 4413 add r3, r2 8005f36: f813 2c18 ldrb.w r2, [r3, #-24] 8005f3a: f897 3025 ldrb.w r3, [r7, #37] ; 0x25 8005f3e: 4053 eors r3, r2 8005f40: f887 3025 strb.w r3, [r7, #37] ; 0x25 for ( uc = 0; uc < 4; uc ++ ) 8005f44: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8005f48: 3301 adds r3, #1 8005f4a: f887 3026 strb.w r3, [r7, #38] ; 0x26 8005f4e: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8005f52: 2b03 cmp r3, #3 8005f54: d9de bls.n 8005f14 } if ( ucSnr_check != ucComMF522Buf [ uc ] ) 8005f56: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8005f5a: f107 0228 add.w r2, r7, #40 ; 0x28 8005f5e: 4413 add r3, r2 8005f60: f813 3c18 ldrb.w r3, [r3, #-24] 8005f64: f897 2025 ldrb.w r2, [r7, #37] ; 0x25 8005f68: 429a cmp r2, r3 8005f6a: d002 beq.n 8005f72 { cStatus = MI_ERR; 8005f6c: 2302 movs r3, #2 8005f6e: f887 3027 strb.w r3, [r7, #39] ; 0x27 } } SetBitMask ( CollReg, 0x80 ); 8005f72: 2180 movs r1, #128 ; 0x80 8005f74: 200e movs r0, #14 8005f76: f7ff fde7 bl 8005b48 return cStatus; 8005f7a: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 } 8005f7e: 4618 mov r0, r3 8005f80: 3728 adds r7, #40 ; 0x28 8005f82: 46bd mov sp, r7 8005f84: bd80 pop {r7, pc} 08005f86 : * pOutData£¬´æ·Å¼ÆËã½á¹û´æ·ÅµÄÊ×µØÖ· * ·µ»Ø : ÎÞ * µ÷Óà £ºÄÚ²¿µ÷Óà */ void CalulateCRC ( uint8_t * pIndata, uint8_t ucLen, uint8_t * pOutData ) { 8005f86: b590 push {r4, r7, lr} 8005f88: b087 sub sp, #28 8005f8a: af00 add r7, sp, #0 8005f8c: 60f8 str r0, [r7, #12] 8005f8e: 460b mov r3, r1 8005f90: 607a str r2, [r7, #4] 8005f92: 72fb strb r3, [r7, #11] uint8_t uc, ucN; ClearBitMask(DivIrqReg,0x04); 8005f94: 2104 movs r1, #4 8005f96: 2005 movs r0, #5 8005f98: f7ff fdf1 bl 8005b7e WriteRawRC(CommandReg,PCD_IDLE); 8005f9c: 2100 movs r1, #0 8005f9e: 2001 movs r0, #1 8005fa0: f7ff fda4 bl 8005aec SetBitMask(FIFOLevelReg,0x80); 8005fa4: 2180 movs r1, #128 ; 0x80 8005fa6: 200a movs r0, #10 8005fa8: f7ff fdce bl 8005b48 for ( uc = 0; uc < ucLen; uc ++) 8005fac: 2300 movs r3, #0 8005fae: 75fb strb r3, [r7, #23] 8005fb0: e00a b.n 8005fc8 { WriteRawRC ( FIFODataReg, * ( pIndata + uc ) ); 8005fb2: 7dfb ldrb r3, [r7, #23] 8005fb4: 68fa ldr r2, [r7, #12] 8005fb6: 4413 add r3, r2 8005fb8: 781b ldrb r3, [r3, #0] 8005fba: 4619 mov r1, r3 8005fbc: 2009 movs r0, #9 8005fbe: f7ff fd95 bl 8005aec for ( uc = 0; uc < ucLen; uc ++) 8005fc2: 7dfb ldrb r3, [r7, #23] 8005fc4: 3301 adds r3, #1 8005fc6: 75fb strb r3, [r7, #23] 8005fc8: 7dfa ldrb r2, [r7, #23] 8005fca: 7afb ldrb r3, [r7, #11] 8005fcc: 429a cmp r2, r3 8005fce: d3f0 bcc.n 8005fb2 } WriteRawRC ( CommandReg, PCD_CALCCRC ); 8005fd0: 2103 movs r1, #3 8005fd2: 2001 movs r0, #1 8005fd4: f7ff fd8a bl 8005aec uc = 0xFF; 8005fd8: 23ff movs r3, #255 ; 0xff 8005fda: 75fb strb r3, [r7, #23] do { ucN = ReadRawRC ( DivIrqReg ); 8005fdc: 2005 movs r0, #5 8005fde: f7ff fd53 bl 8005a88 8005fe2: 4603 mov r3, r0 8005fe4: 75bb strb r3, [r7, #22] uc --; 8005fe6: 7dfb ldrb r3, [r7, #23] 8005fe8: 3b01 subs r3, #1 8005fea: 75fb strb r3, [r7, #23] } while ( ( uc != 0 ) && ! ( ucN & 0x04 ) ); 8005fec: 7dfb ldrb r3, [r7, #23] 8005fee: 2b00 cmp r3, #0 8005ff0: d004 beq.n 8005ffc 8005ff2: 7dbb ldrb r3, [r7, #22] 8005ff4: f003 0304 and.w r3, r3, #4 8005ff8: 2b00 cmp r3, #0 8005ffa: d0ef beq.n 8005fdc pOutData [ 0 ] = ReadRawRC ( CRCResultRegL ); 8005ffc: 2022 movs r0, #34 ; 0x22 8005ffe: f7ff fd43 bl 8005a88 8006002: 4603 mov r3, r0 8006004: 461a mov r2, r3 8006006: 687b ldr r3, [r7, #4] 8006008: 701a strb r2, [r3, #0] pOutData [ 1 ] = ReadRawRC ( CRCResultRegM ); 800600a: 687b ldr r3, [r7, #4] 800600c: 1c5c adds r4, r3, #1 800600e: 2021 movs r0, #33 ; 0x21 8006010: f7ff fd3a bl 8005a88 8006014: 4603 mov r3, r0 8006016: 7023 strb r3, [r4, #0] } 8006018: bf00 nop 800601a: 371c adds r7, #28 800601c: 46bd mov sp, r7 800601e: bd90 pop {r4, r7, pc} 08006020 : * ·µ»Ø : ״ֵ̬ * = MI_OK£¬³É¹¦ * µ÷Óà £ºÍⲿµ÷Óà */ char PcdSelect ( uint8_t * pSnr ) { 8006020: b580 push {r7, lr} 8006022: b08a sub sp, #40 ; 0x28 8006024: af02 add r7, sp, #8 8006026: 6078 str r0, [r7, #4] char ucN; uint8_t uc; uint8_t ucComMF522Buf [ MAXRLEN ]; uint32_t ulLen; ucComMF522Buf [ 0 ] = PICC_ANTICOLL1; 8006028: 2393 movs r3, #147 ; 0x93 800602a: 733b strb r3, [r7, #12] ucComMF522Buf [ 1 ] = 0x70; 800602c: 2370 movs r3, #112 ; 0x70 800602e: 737b strb r3, [r7, #13] ucComMF522Buf [ 6 ] = 0; 8006030: 2300 movs r3, #0 8006032: 74bb strb r3, [r7, #18] for ( uc = 0; uc < 4; uc ++ ) 8006034: 2300 movs r3, #0 8006036: 77bb strb r3, [r7, #30] 8006038: e015 b.n 8006066 { ucComMF522Buf [ uc + 2 ] = * ( pSnr + uc ); 800603a: 7fbb ldrb r3, [r7, #30] 800603c: 687a ldr r2, [r7, #4] 800603e: 441a add r2, r3 8006040: 7fbb ldrb r3, [r7, #30] 8006042: 3302 adds r3, #2 8006044: 7812 ldrb r2, [r2, #0] 8006046: f107 0120 add.w r1, r7, #32 800604a: 440b add r3, r1 800604c: f803 2c14 strb.w r2, [r3, #-20] ucComMF522Buf [ 6 ] ^= * ( pSnr + uc ); 8006050: 7cba ldrb r2, [r7, #18] 8006052: 7fbb ldrb r3, [r7, #30] 8006054: 6879 ldr r1, [r7, #4] 8006056: 440b add r3, r1 8006058: 781b ldrb r3, [r3, #0] 800605a: 4053 eors r3, r2 800605c: b2db uxtb r3, r3 800605e: 74bb strb r3, [r7, #18] for ( uc = 0; uc < 4; uc ++ ) 8006060: 7fbb ldrb r3, [r7, #30] 8006062: 3301 adds r3, #1 8006064: 77bb strb r3, [r7, #30] 8006066: 7fbb ldrb r3, [r7, #30] 8006068: 2b03 cmp r3, #3 800606a: d9e6 bls.n 800603a } CalulateCRC ( ucComMF522Buf, 7, & ucComMF522Buf [ 7 ] ); 800606c: f107 030c add.w r3, r7, #12 8006070: 1dda adds r2, r3, #7 8006072: f107 030c add.w r3, r7, #12 8006076: 2107 movs r1, #7 8006078: 4618 mov r0, r3 800607a: f7ff ff84 bl 8005f86 ClearBitMask ( Status2Reg, 0x08 ); 800607e: 2108 movs r1, #8 8006080: 2008 movs r0, #8 8006082: f7ff fd7c bl 8005b7e ucN = PcdComMF522 ( PCD_TRANSCEIVE, ucComMF522Buf, 9, ucComMF522Buf, & ulLen ); 8006086: f107 020c add.w r2, r7, #12 800608a: f107 010c add.w r1, r7, #12 800608e: f107 0308 add.w r3, r7, #8 8006092: 9300 str r3, [sp, #0] 8006094: 4613 mov r3, r2 8006096: 2209 movs r2, #9 8006098: 200c movs r0, #12 800609a: f7ff fe05 bl 8005ca8 800609e: 4603 mov r3, r0 80060a0: 77fb strb r3, [r7, #31] if ( ( ucN == MI_OK ) && ( ulLen == 0x18 ) ) 80060a2: 7ffb ldrb r3, [r7, #31] 80060a4: 2b00 cmp r3, #0 80060a6: d105 bne.n 80060b4 80060a8: 68bb ldr r3, [r7, #8] 80060aa: 2b18 cmp r3, #24 80060ac: d102 bne.n 80060b4 { ucN = MI_OK; 80060ae: 2300 movs r3, #0 80060b0: 77fb strb r3, [r7, #31] 80060b2: e001 b.n 80060b8 } else { ucN = MI_ERR; 80060b4: 2302 movs r3, #2 80060b6: 77fb strb r3, [r7, #31] } return ucN; 80060b8: 7ffb ldrb r3, [r7, #31] } 80060ba: 4618 mov r0, r3 80060bc: 3720 adds r7, #32 80060be: 46bd mov sp, r7 80060c0: bd80 pop {r7, pc} 080060c2 : * ·µ»Ø : ״ֵ̬ * = MI_OK£¬³É¹¦ * µ÷Óà £ºÍⲿµ÷Óà */ char PcdAuthState ( uint8_t ucAuth_mode, uint8_t ucAddr, char * pKey, uint8_t * pSnr ) { 80060c2: b580 push {r7, lr} 80060c4: b08c sub sp, #48 ; 0x30 80060c6: af02 add r7, sp, #8 80060c8: 60ba str r2, [r7, #8] 80060ca: 607b str r3, [r7, #4] 80060cc: 4603 mov r3, r0 80060ce: 73fb strb r3, [r7, #15] 80060d0: 460b mov r3, r1 80060d2: 73bb strb r3, [r7, #14] char cStatus; uint8_t uc, ucComMF522Buf [ MAXRLEN ]; uint32_t ulLen; ucComMF522Buf [ 0 ] = ucAuth_mode; 80060d4: 7bfb ldrb r3, [r7, #15] 80060d6: 753b strb r3, [r7, #20] ucComMF522Buf [ 1 ] = ucAddr; 80060d8: 7bbb ldrb r3, [r7, #14] 80060da: 757b strb r3, [r7, #21] for ( uc = 0; uc < 6; uc ++ ) 80060dc: 2300 movs r3, #0 80060de: f887 3026 strb.w r3, [r7, #38] ; 0x26 80060e2: e011 b.n 8006108 { ucComMF522Buf [ uc + 2 ] = * ( pKey + uc ); 80060e4: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 80060e8: 68ba ldr r2, [r7, #8] 80060ea: 441a add r2, r3 80060ec: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 80060f0: 3302 adds r3, #2 80060f2: 7812 ldrb r2, [r2, #0] 80060f4: f107 0128 add.w r1, r7, #40 ; 0x28 80060f8: 440b add r3, r1 80060fa: f803 2c14 strb.w r2, [r3, #-20] for ( uc = 0; uc < 6; uc ++ ) 80060fe: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8006102: 3301 adds r3, #1 8006104: f887 3026 strb.w r3, [r7, #38] ; 0x26 8006108: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 800610c: 2b05 cmp r3, #5 800610e: d9e9 bls.n 80060e4 } for ( uc = 0; uc < 6; uc ++ ) 8006110: 2300 movs r3, #0 8006112: f887 3026 strb.w r3, [r7, #38] ; 0x26 8006116: e011 b.n 800613c { ucComMF522Buf [ uc + 8 ] = * ( pSnr + uc ); 8006118: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 800611c: 687a ldr r2, [r7, #4] 800611e: 441a add r2, r3 8006120: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8006124: 3308 adds r3, #8 8006126: 7812 ldrb r2, [r2, #0] 8006128: f107 0128 add.w r1, r7, #40 ; 0x28 800612c: 440b add r3, r1 800612e: f803 2c14 strb.w r2, [r3, #-20] for ( uc = 0; uc < 6; uc ++ ) 8006132: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8006136: 3301 adds r3, #1 8006138: f887 3026 strb.w r3, [r7, #38] ; 0x26 800613c: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8006140: 2b05 cmp r3, #5 8006142: d9e9 bls.n 8006118 } cStatus = PcdComMF522 ( PCD_AUTHENT, ucComMF522Buf, 12, ucComMF522Buf, & ulLen ); 8006144: f107 0214 add.w r2, r7, #20 8006148: f107 0114 add.w r1, r7, #20 800614c: f107 0310 add.w r3, r7, #16 8006150: 9300 str r3, [sp, #0] 8006152: 4613 mov r3, r2 8006154: 220c movs r2, #12 8006156: 200e movs r0, #14 8006158: f7ff fda6 bl 8005ca8 800615c: 4603 mov r3, r0 800615e: f887 3027 strb.w r3, [r7, #39] ; 0x27 if ( ( cStatus != MI_OK ) || ( ! ( ReadRawRC ( Status2Reg ) & 0x08 ) ) ) 8006162: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 8006166: 2b00 cmp r3, #0 8006168: d107 bne.n 800617a 800616a: 2008 movs r0, #8 800616c: f7ff fc8c bl 8005a88 8006170: 4603 mov r3, r0 8006172: f003 0308 and.w r3, r3, #8 8006176: 2b00 cmp r3, #0 8006178: d102 bne.n 8006180 { // if(cStatus != MI_OK) // printf("666") ; // else // printf("888"); cStatus = MI_ERR; 800617a: 2302 movs r3, #2 800617c: f887 3027 strb.w r3, [r7, #39] ; 0x27 } return cStatus; 8006180: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 } 8006184: 4618 mov r0, r3 8006186: 3728 adds r7, #40 ; 0x28 8006188: 46bd mov sp, r7 800618a: bd80 pop {r7, pc} 0800618c : * ·µ»Ø : ״ֵ̬ * = MI_OK£¬³É¹¦ * µ÷Óà £ºÍⲿµ÷Óà */ char PcdRead ( uint8_t ucAddr, uint8_t * pData ) { 800618c: b580 push {r7, lr} 800618e: b08a sub sp, #40 ; 0x28 8006190: af02 add r7, sp, #8 8006192: 4603 mov r3, r0 8006194: 6039 str r1, [r7, #0] 8006196: 71fb strb r3, [r7, #7] char cStatus; uint8_t uc, ucComMF522Buf [ MAXRLEN ]; uint32_t ulLen; ucComMF522Buf [ 0 ] = PICC_READ; 8006198: 2330 movs r3, #48 ; 0x30 800619a: 733b strb r3, [r7, #12] ucComMF522Buf [ 1 ] = ucAddr; 800619c: 79fb ldrb r3, [r7, #7] 800619e: 737b strb r3, [r7, #13] CalulateCRC ( ucComMF522Buf, 2, & ucComMF522Buf [ 2 ] ); 80061a0: f107 030c add.w r3, r7, #12 80061a4: 1c9a adds r2, r3, #2 80061a6: f107 030c add.w r3, r7, #12 80061aa: 2102 movs r1, #2 80061ac: 4618 mov r0, r3 80061ae: f7ff feea bl 8005f86 cStatus = PcdComMF522 ( PCD_TRANSCEIVE, ucComMF522Buf, 4, ucComMF522Buf, & ulLen ); 80061b2: f107 020c add.w r2, r7, #12 80061b6: f107 010c add.w r1, r7, #12 80061ba: f107 0308 add.w r3, r7, #8 80061be: 9300 str r3, [sp, #0] 80061c0: 4613 mov r3, r2 80061c2: 2204 movs r2, #4 80061c4: 200c movs r0, #12 80061c6: f7ff fd6f bl 8005ca8 80061ca: 4603 mov r3, r0 80061cc: 77fb strb r3, [r7, #31] if ( ( cStatus == MI_OK ) && ( ulLen == 0x90 ) ) 80061ce: 7ffb ldrb r3, [r7, #31] 80061d0: 2b00 cmp r3, #0 80061d2: d116 bne.n 8006202 80061d4: 68bb ldr r3, [r7, #8] 80061d6: 2b90 cmp r3, #144 ; 0x90 80061d8: d113 bne.n 8006202 { for ( uc = 0; uc < 16; uc ++ ) 80061da: 2300 movs r3, #0 80061dc: 77bb strb r3, [r7, #30] 80061de: e00c b.n 80061fa { * ( pData + uc ) = ucComMF522Buf [ uc ]; 80061e0: 7fba ldrb r2, [r7, #30] 80061e2: 7fbb ldrb r3, [r7, #30] 80061e4: 6839 ldr r1, [r7, #0] 80061e6: 440b add r3, r1 80061e8: f107 0120 add.w r1, r7, #32 80061ec: 440a add r2, r1 80061ee: f812 2c14 ldrb.w r2, [r2, #-20] 80061f2: 701a strb r2, [r3, #0] for ( uc = 0; uc < 16; uc ++ ) 80061f4: 7fbb ldrb r3, [r7, #30] 80061f6: 3301 adds r3, #1 80061f8: 77bb strb r3, [r7, #30] 80061fa: 7fbb ldrb r3, [r7, #30] 80061fc: 2b0f cmp r3, #15 80061fe: d9ef bls.n 80061e0 if ( ( cStatus == MI_OK ) && ( ulLen == 0x90 ) ) 8006200: e001 b.n 8006206 } } else { cStatus = MI_ERR; 8006202: 2302 movs r3, #2 8006204: 77fb strb r3, [r7, #31] } return cStatus; 8006206: 7ffb ldrb r3, [r7, #31] } 8006208: 4618 mov r0, r3 800620a: 3720 adds r7, #32 800620c: 46bd mov sp, r7 800620e: bd80 pop {r7, pc} 08006210 : PcdHalt (); } void RC522_Init ( void ) { 8006210: b580 push {r7, lr} 8006212: af00 add r7, sp, #0 PcdReset (); 8006214: f7ff fce8 bl 8005be8 M500PcdConfigISOType ( 'A' );//ÉèÖù¤×÷·½Ê½ 8006218: 2041 movs r0, #65 ; 0x41 800621a: f7ff fd14 bl 8005c46 } 800621e: bf00 nop 8006220: bd80 pop {r7, pc} ... 08006224 : //SPIдÊý¾Ý //Ïò´¥ÃþÆÁICдÈë1byteÊý¾Ý //num:ҪдÈëµÄÊý¾Ý void TP_Write_Byte(char num) { 8006224: b580 push {r7, lr} 8006226: b084 sub sp, #16 8006228: af00 add r7, sp, #0 800622a: 4603 mov r3, r0 800622c: 71fb strb r3, [r7, #7] for(uint8_t count=0;count<8;count++) 800622e: 2300 movs r3, #0 8006230: 73fb strb r3, [r7, #15] 8006232: e020 b.n 8006276 { if(num&0x80){TDIN(1);} 8006234: f997 3007 ldrsb.w r3, [r7, #7] 8006238: 2b00 cmp r3, #0 800623a: da06 bge.n 800624a 800623c: 2201 movs r2, #1 800623e: f44f 7100 mov.w r1, #512 ; 0x200 8006242: 4811 ldr r0, [pc, #68] ; (8006288 ) 8006244: f7fb ff7f bl 8002146 8006248: e005 b.n 8006256 else {TDIN(0);} 800624a: 2200 movs r2, #0 800624c: f44f 7100 mov.w r1, #512 ; 0x200 8006250: 480d ldr r0, [pc, #52] ; (8006288 ) 8006252: f7fb ff78 bl 8002146 num<<=1; 8006256: 79fb ldrb r3, [r7, #7] 8006258: 005b lsls r3, r3, #1 800625a: 71fb strb r3, [r7, #7] TCLK(0); 800625c: 2200 movs r2, #0 800625e: 2102 movs r1, #2 8006260: 480a ldr r0, [pc, #40] ; (800628c ) 8006262: f7fb ff70 bl 8002146 TCLK(1); //ÉÏÉýÑØÓÐЧ 8006266: 2201 movs r2, #1 8006268: 2102 movs r1, #2 800626a: 4808 ldr r0, [pc, #32] ; (800628c ) 800626c: f7fb ff6b bl 8002146 for(uint8_t count=0;count<8;count++) 8006270: 7bfb ldrb r3, [r7, #15] 8006272: 3301 adds r3, #1 8006274: 73fb strb r3, [r7, #15] 8006276: 7bfb ldrb r3, [r7, #15] 8006278: 2b07 cmp r3, #7 800627a: d9db bls.n 8006234 } } 800627c: bf00 nop 800627e: bf00 nop 8006280: 3710 adds r7, #16 8006282: 46bd mov sp, r7 8006284: bd80 pop {r7, pc} 8006286: bf00 nop 8006288: 40011c00 .word 0x40011c00 800628c: 40010c00 .word 0x40010c00 08006290 : //SPI¶ÁÊý¾Ý //´Ó´¥ÃþÆÁIC¶ÁÈ¡adcÖµ //CMD:Ö¸Áî //·µ»ØÖµ:¶Áµ½µÄÊý¾Ý uint16_t TP_Read_AD(char CMD) { 8006290: b580 push {r7, lr} 8006292: b084 sub sp, #16 8006294: af00 add r7, sp, #0 8006296: 4603 mov r3, r0 8006298: 71fb strb r3, [r7, #7] uint16_t Num=0; 800629a: 2300 movs r3, #0 800629c: 81fb strh r3, [r7, #14] TCLK(0); //ÏÈÀ­µÍʱÖÓ 800629e: 2200 movs r2, #0 80062a0: 2102 movs r1, #2 80062a2: 482b ldr r0, [pc, #172] ; (8006350 ) 80062a4: f7fb ff4f bl 8002146 TDIN(0); //À­µÍÊý¾ÝÏß 80062a8: 2200 movs r2, #0 80062aa: f44f 7100 mov.w r1, #512 ; 0x200 80062ae: 4829 ldr r0, [pc, #164] ; (8006354 ) 80062b0: f7fb ff49 bl 8002146 TCS(0); //Ñ¡Öд¥ÃþÆÁIC 80062b4: 2200 movs r2, #0 80062b6: 2104 movs r1, #4 80062b8: 4825 ldr r0, [pc, #148] ; (8006350 ) 80062ba: f7fb ff44 bl 8002146 TP_Write_Byte(CMD);//·¢ËÍÃüÁî×Ö 80062be: 79fb ldrb r3, [r7, #7] 80062c0: 4618 mov r0, r3 80062c2: f7ff ffaf bl 8006224 HAL_GetTick(); //ÉÔ΢ÑÓʱ£¬adת»»ÐèҪʱ¼ä 80062c6: f7fb fc57 bl 8001b78 HAL_GetTick(); 80062ca: f7fb fc55 bl 8001b78 HAL_GetTick(); 80062ce: f7fb fc53 bl 8001b78 HAL_GetTick(); 80062d2: f7fb fc51 bl 8001b78 HAL_GetTick(); 80062d6: f7fb fc4f bl 8001b78 HAL_GetTick(); 80062da: f7fb fc4d bl 8001b78 TCLK(1); //¸ø1¸öʱÖÓ£¬Çå³ýBUSY 80062de: 2201 movs r2, #1 80062e0: 2102 movs r1, #2 80062e2: 481b ldr r0, [pc, #108] ; (8006350 ) 80062e4: f7fb ff2f bl 8002146 TCLK(0); 80062e8: 2200 movs r2, #0 80062ea: 2102 movs r1, #2 80062ec: 4818 ldr r0, [pc, #96] ; (8006350 ) 80062ee: f7fb ff2a bl 8002146 for(uint8_t count=0;count<16;count++)//¶Á³ö16λÊý¾Ý,Ö»Óиß12λÓÐЧ 80062f2: 2300 movs r3, #0 80062f4: 737b strb r3, [r7, #13] 80062f6: e01a b.n 800632e { Num<<=1; 80062f8: 89fb ldrh r3, [r7, #14] 80062fa: 005b lsls r3, r3, #1 80062fc: 81fb strh r3, [r7, #14] TCLK(0); //ϽµÑØÓÐЧ 80062fe: 2200 movs r2, #0 8006300: 2102 movs r1, #2 8006302: 4813 ldr r0, [pc, #76] ; (8006350 ) 8006304: f7fb ff1f bl 8002146 TCLK(1);; 8006308: 2201 movs r2, #1 800630a: 2102 movs r1, #2 800630c: 4810 ldr r0, [pc, #64] ; (8006350 ) 800630e: f7fb ff1a bl 8002146 if(TDOUT){Num++;} 8006312: f44f 7180 mov.w r1, #256 ; 0x100 8006316: 480f ldr r0, [pc, #60] ; (8006354 ) 8006318: f7fb fefe bl 8002118 800631c: 4603 mov r3, r0 800631e: 2b00 cmp r3, #0 8006320: d002 beq.n 8006328 8006322: 89fb ldrh r3, [r7, #14] 8006324: 3301 adds r3, #1 8006326: 81fb strh r3, [r7, #14] for(uint8_t count=0;count<16;count++)//¶Á³ö16λÊý¾Ý,Ö»Óиß12λÓÐЧ 8006328: 7b7b ldrb r3, [r7, #13] 800632a: 3301 adds r3, #1 800632c: 737b strb r3, [r7, #13] 800632e: 7b7b ldrb r3, [r7, #13] 8006330: 2b0f cmp r3, #15 8006332: d9e1 bls.n 80062f8 } Num>>=4; //Ö»Óиß12λÓÐЧ. 8006334: 89fb ldrh r3, [r7, #14] 8006336: 091b lsrs r3, r3, #4 8006338: 81fb strh r3, [r7, #14] TCS(1); //ÊÍ·ÅƬѡ 800633a: 2201 movs r2, #1 800633c: 2104 movs r1, #4 800633e: 4804 ldr r0, [pc, #16] ; (8006350 ) 8006340: f7fb ff01 bl 8002146 return(Num); 8006344: 89fb ldrh r3, [r7, #14] } 8006346: 4618 mov r0, r3 8006348: 3710 adds r7, #16 800634a: 46bd mov sp, r7 800634c: bd80 pop {r7, pc} 800634e: bf00 nop 8006350: 40010c00 .word 0x40010c00 8006354: 40011c00 .word 0x40011c00 08006358 : //xy:Ö¸ÁCMD_RDX/CMD_RDY£© //·µ»ØÖµ:¶Áµ½µÄÊý¾Ý #define READ_TIMES 5 //¶ÁÈ¡´ÎÊý #define LOST_VAL 1 //¶ªÆúÖµ uint16_t TP_Read_XOY(uint8_t xy) { 8006358: b590 push {r4, r7, lr} 800635a: b089 sub sp, #36 ; 0x24 800635c: af00 add r7, sp, #0 800635e: 4603 mov r3, r0 8006360: 71fb strb r3, [r7, #7] uint16_t i, j; uint16_t buf[READ_TIMES]; uint16_t sum=0; 8006362: 2300 movs r3, #0 8006364: 837b strh r3, [r7, #26] uint16_t temp; for(i=0;i 800636c: 8bfc ldrh r4, [r7, #30] 800636e: 79fb ldrb r3, [r7, #7] 8006370: 4618 mov r0, r3 8006372: f7ff ff8d bl 8006290 8006376: 4603 mov r3, r0 8006378: 461a mov r2, r3 800637a: 0063 lsls r3, r4, #1 800637c: f107 0120 add.w r1, r7, #32 8006380: 440b add r3, r1 8006382: f823 2c14 strh.w r2, [r3, #-20] 8006386: 8bfb ldrh r3, [r7, #30] 8006388: 3301 adds r3, #1 800638a: 83fb strh r3, [r7, #30] 800638c: 8bfb ldrh r3, [r7, #30] 800638e: 2b04 cmp r3, #4 8006390: d9ec bls.n 800636c for(i=0;i { for(j=i+1;j { if(buf[i]>buf[j])//ÉýÐòÅÅÁÐ 80063a0: 8bfb ldrh r3, [r7, #30] 80063a2: 005b lsls r3, r3, #1 80063a4: f107 0220 add.w r2, r7, #32 80063a8: 4413 add r3, r2 80063aa: f833 2c14 ldrh.w r2, [r3, #-20] 80063ae: 8bbb ldrh r3, [r7, #28] 80063b0: 005b lsls r3, r3, #1 80063b2: f107 0120 add.w r1, r7, #32 80063b6: 440b add r3, r1 80063b8: f833 3c14 ldrh.w r3, [r3, #-20] 80063bc: 429a cmp r2, r3 80063be: d91e bls.n 80063fe { temp=buf[i]; 80063c0: 8bfb ldrh r3, [r7, #30] 80063c2: 005b lsls r3, r3, #1 80063c4: f107 0220 add.w r2, r7, #32 80063c8: 4413 add r3, r2 80063ca: f833 3c14 ldrh.w r3, [r3, #-20] 80063ce: 833b strh r3, [r7, #24] buf[i]=buf[j]; 80063d0: 8bbb ldrh r3, [r7, #28] 80063d2: 8bfa ldrh r2, [r7, #30] 80063d4: 005b lsls r3, r3, #1 80063d6: f107 0120 add.w r1, r7, #32 80063da: 440b add r3, r1 80063dc: f833 1c14 ldrh.w r1, [r3, #-20] 80063e0: 0053 lsls r3, r2, #1 80063e2: f107 0220 add.w r2, r7, #32 80063e6: 4413 add r3, r2 80063e8: 460a mov r2, r1 80063ea: f823 2c14 strh.w r2, [r3, #-20] buf[j]=temp; 80063ee: 8bbb ldrh r3, [r7, #28] 80063f0: 005b lsls r3, r3, #1 80063f2: f107 0220 add.w r2, r7, #32 80063f6: 4413 add r3, r2 80063f8: 8b3a ldrh r2, [r7, #24] 80063fa: f823 2c14 strh.w r2, [r3, #-20] for(j=i+1;j for(i=0;i } } } sum=0; 8006416: 2300 movs r3, #0 8006418: 837b strh r3, [r7, #26] for(i=LOST_VAL;i 8006420: 8bfb ldrh r3, [r7, #30] 8006422: 005b lsls r3, r3, #1 8006424: f107 0220 add.w r2, r7, #32 8006428: 4413 add r3, r2 800642a: f833 2c14 ldrh.w r2, [r3, #-20] 800642e: 8b7b ldrh r3, [r7, #26] 8006430: 4413 add r3, r2 8006432: 837b strh r3, [r7, #26] 8006434: 8bfb ldrh r3, [r7, #30] 8006436: 3301 adds r3, #1 8006438: 83fb strh r3, [r7, #30] 800643a: 8bfb ldrh r3, [r7, #30] 800643c: 2b03 cmp r3, #3 800643e: d9ef bls.n 8006420 temp=sum/(READ_TIMES-2*LOST_VAL); 8006440: 8b7b ldrh r3, [r7, #26] 8006442: 4a05 ldr r2, [pc, #20] ; (8006458 ) 8006444: fba2 2303 umull r2, r3, r2, r3 8006448: 085b lsrs r3, r3, #1 800644a: 833b strh r3, [r7, #24] return temp; 800644c: 8b3b ldrh r3, [r7, #24] } 800644e: 4618 mov r0, r3 8006450: 3724 adds r7, #36 ; 0x24 8006452: 46bd mov sp, r7 8006454: bd90 pop {r4, r7, pc} 8006456: bf00 nop 8006458: aaaaaaab .word 0xaaaaaaab 0800645c : //¶ÁÈ¡x,y×ø±ê //x,y:¶ÁÈ¡µ½µÄ×ø±êADCÖµ void TP_Read_XY_ADC(int16_t *x,int16_t *y) { 800645c: b580 push {r7, lr} 800645e: b084 sub sp, #16 8006460: af00 add r7, sp, #0 8006462: 6078 str r0, [r7, #4] 8006464: 6039 str r1, [r7, #0] int16_t xtemp,ytemp; xtemp=TP_Read_XOY(CMD_RDX); 8006466: 2090 movs r0, #144 ; 0x90 8006468: f7ff ff76 bl 8006358 800646c: 4603 mov r3, r0 800646e: 81fb strh r3, [r7, #14] ytemp=TP_Read_XOY(CMD_RDY); 8006470: 20d0 movs r0, #208 ; 0xd0 8006472: f7ff ff71 bl 8006358 8006476: 4603 mov r3, r0 8006478: 81bb strh r3, [r7, #12] *x=xtemp; 800647a: 687b ldr r3, [r7, #4] 800647c: 89fa ldrh r2, [r7, #14] 800647e: 801a strh r2, [r3, #0] *y=ytemp; 8006480: 683b ldr r3, [r7, #0] 8006482: 89ba ldrh r2, [r7, #12] 8006484: 801a strh r2, [r3, #0] } 8006486: bf00 nop 8006488: 3710 adds r7, #16 800648a: 46bd mov sp, r7 800648c: bd80 pop {r7, pc} 0800648e : //¸Ãº¯ÊýÄÜ´ó´óÌá¸ß׼ȷ¶È //x,y:¶ÁÈ¡µ½µÄ×ø±êÖµ //·µ»ØÖµ:0,ʧ°Ü;1,³É¹¦¡£ #define ERR_RANGE 10 //Îó²î·¶Î§ uint8_t TP_Read_XY2(int16_t *x,int16_t *y) { 800648e: b580 push {r7, lr} 8006490: b084 sub sp, #16 8006492: af00 add r7, sp, #0 8006494: 6078 str r0, [r7, #4] 8006496: 6039 str r1, [r7, #0] int16_t x1,y1; int16_t x2,y2; TP_Read_XY_ADC(&x1,&y1); 8006498: f107 020c add.w r2, r7, #12 800649c: f107 030e add.w r3, r7, #14 80064a0: 4611 mov r1, r2 80064a2: 4618 mov r0, r3 80064a4: f7ff ffda bl 800645c TP_Read_XY_ADC(&x2,&y2); 80064a8: f107 0208 add.w r2, r7, #8 80064ac: f107 030a add.w r3, r7, #10 80064b0: 4611 mov r1, r2 80064b2: 4618 mov r0, r3 80064b4: f7ff ffd2 bl 800645c if(((x2<=x1&&x1 80064c4: f9b7 300a ldrsh.w r3, [r7, #10] 80064c8: 3309 adds r3, #9 80064ca: f9b7 200e ldrsh.w r2, [r7, #14] 80064ce: 4293 cmp r3, r2 80064d0: da0c bge.n 80064ec 80064d2: f9b7 200e ldrsh.w r2, [r7, #14] 80064d6: f9b7 300a ldrsh.w r3, [r7, #10] 80064da: 429a cmp r2, r3 80064dc: dc3a bgt.n 8006554 80064de: f9b7 300e ldrsh.w r3, [r7, #14] 80064e2: 3309 adds r3, #9 80064e4: f9b7 200a ldrsh.w r2, [r7, #10] 80064e8: 4293 cmp r3, r2 80064ea: db33 blt.n 8006554 &&((y2<=y1&&y1 80064f8: f9b7 3008 ldrsh.w r3, [r7, #8] 80064fc: 3309 adds r3, #9 80064fe: f9b7 200c ldrsh.w r2, [r7, #12] 8006502: 4293 cmp r3, r2 8006504: da0c bge.n 8006520 8006506: f9b7 200c ldrsh.w r2, [r7, #12] 800650a: f9b7 3008 ldrsh.w r3, [r7, #8] 800650e: 429a cmp r2, r3 8006510: dc20 bgt.n 8006554 8006512: f9b7 300c ldrsh.w r3, [r7, #12] 8006516: 3309 adds r3, #9 8006518: f9b7 2008 ldrsh.w r2, [r7, #8] 800651c: 4293 cmp r3, r2 800651e: db19 blt.n 8006554 { *x=(x1+x2)/2; 8006520: f9b7 300e ldrsh.w r3, [r7, #14] 8006524: 461a mov r2, r3 8006526: f9b7 300a ldrsh.w r3, [r7, #10] 800652a: 4413 add r3, r2 800652c: 0fda lsrs r2, r3, #31 800652e: 4413 add r3, r2 8006530: 105b asrs r3, r3, #1 8006532: b21a sxth r2, r3 8006534: 687b ldr r3, [r7, #4] 8006536: 801a strh r2, [r3, #0] *y=(y1+y2)/2; 8006538: f9b7 300c ldrsh.w r3, [r7, #12] 800653c: 461a mov r2, r3 800653e: f9b7 3008 ldrsh.w r3, [r7, #8] 8006542: 4413 add r3, r2 8006544: 0fda lsrs r2, r3, #31 8006546: 4413 add r3, r2 8006548: 105b asrs r3, r3, #1 800654a: b21a sxth r2, r3 800654c: 683b ldr r3, [r7, #0] 800654e: 801a strh r2, [r3, #0] return 1; 8006550: 2301 movs r3, #1 8006552: e000 b.n 8006556 }else return 0; 8006554: 2300 movs r3, #0 } 8006556: 4618 mov r0, r3 8006558: 3710 adds r7, #16 800655a: 46bd mov sp, r7 800655c: bd80 pop {r7, pc} ... 08006560 : touch_device t0;// t0 yyds~ touch_config tconfig; //´¥Ãþ¸üзþÎñ£¬×´Ì¬»úд·¨£¬Ñ­»·»ñÈ¡×ø±ê void TP_Server() { 8006560: b598 push {r3, r4, r7, lr} 8006562: af00 add r7, sp, #0 if(TPEN==0) //Èç¹ûÓд¥Ãþ 8006564: f44f 6180 mov.w r1, #1024 ; 0x400 8006568: 4835 ldr r0, [pc, #212] ; (8006640 ) 800656a: f7fb fdd5 bl 8002118 800656e: 4603 mov r3, r0 8006570: 2b00 cmp r3, #0 8006572: d155 bne.n 8006620 { if(TP_Read_XY2(&t0.adc_x,&t0.adc_y)) 8006574: 4933 ldr r1, [pc, #204] ; (8006644 ) 8006576: 4834 ldr r0, [pc, #208] ; (8006648 ) 8006578: f7ff ff89 bl 800648e 800657c: 4603 mov r3, r0 800657e: 2b00 cmp r3, #0 8006580: d043 beq.n 800660a {//ÏȶÁÈ¡adÖµ t0.pix_x=(t0.adc_x/tconfig.x_acc)-tconfig.x_offset;//ת»»ÎªÏñËØ×ø±ê 8006582: 4b31 ldr r3, [pc, #196] ; (8006648 ) 8006584: 881b ldrh r3, [r3, #0] 8006586: 4618 mov r0, r3 8006588: f7fa fbf4 bl 8000d74 <__aeabi_i2f> 800658c: 4602 mov r2, r0 800658e: 4b2f ldr r3, [pc, #188] ; (800664c ) 8006590: 685b ldr r3, [r3, #4] 8006592: 4619 mov r1, r3 8006594: 4610 mov r0, r2 8006596: f7fa fcf5 bl 8000f84 <__aeabi_fdiv> 800659a: 4603 mov r3, r0 800659c: 461c mov r4, r3 800659e: 4b2b ldr r3, [pc, #172] ; (800664c ) 80065a0: 68db ldr r3, [r3, #12] 80065a2: 4618 mov r0, r3 80065a4: f7fa fbe6 bl 8000d74 <__aeabi_i2f> 80065a8: 4603 mov r3, r0 80065aa: 4619 mov r1, r3 80065ac: 4620 mov r0, r4 80065ae: f7fa fb2b bl 8000c08 <__aeabi_fsub> 80065b2: 4603 mov r3, r0 80065b4: 4618 mov r0, r3 80065b6: f7fa fd81 bl 80010bc <__aeabi_f2iz> 80065ba: 4603 mov r3, r0 80065bc: 4a22 ldr r2, [pc, #136] ; (8006648 ) 80065be: 6053 str r3, [r2, #4] t0.pix_y=(t0.adc_y/tconfig.y_acc)-tconfig.y_offset; 80065c0: 4b21 ldr r3, [pc, #132] ; (8006648 ) 80065c2: 885b ldrh r3, [r3, #2] 80065c4: 4618 mov r0, r3 80065c6: f7fa fbd5 bl 8000d74 <__aeabi_i2f> 80065ca: 4602 mov r2, r0 80065cc: 4b1f ldr r3, [pc, #124] ; (800664c ) 80065ce: 689b ldr r3, [r3, #8] 80065d0: 4619 mov r1, r3 80065d2: 4610 mov r0, r2 80065d4: f7fa fcd6 bl 8000f84 <__aeabi_fdiv> 80065d8: 4603 mov r3, r0 80065da: 461c mov r4, r3 80065dc: 4b1b ldr r3, [pc, #108] ; (800664c ) 80065de: 691b ldr r3, [r3, #16] 80065e0: 4618 mov r0, r3 80065e2: f7fa fbc7 bl 8000d74 <__aeabi_i2f> 80065e6: 4603 mov r3, r0 80065e8: 4619 mov r1, r3 80065ea: 4620 mov r0, r4 80065ec: f7fa fb0c bl 8000c08 <__aeabi_fsub> 80065f0: 4603 mov r3, r0 80065f2: 4618 mov r0, r3 80065f4: f7fa fd62 bl 80010bc <__aeabi_f2iz> 80065f8: 4603 mov r3, r0 80065fa: 4a13 ldr r2, [pc, #76] ; (8006648 ) 80065fc: 6093 str r3, [r2, #8] t0.d=1; 80065fe: 4a12 ldr r2, [pc, #72] ; (8006648 ) 8006600: 7b13 ldrb r3, [r2, #12] 8006602: f043 0304 orr.w r3, r3, #4 8006606: 7313 strb r3, [r2, #12] 8006608: e004 b.n 8006614 }else { t0.d=0; 800660a: 4a0f ldr r2, [pc, #60] ; (8006648 ) 800660c: 7b13 ldrb r3, [r2, #12] 800660e: f36f 0382 bfc r3, #2, #1 8006612: 7313 strb r3, [r2, #12] } t0.c=1; 8006614: 4a0c ldr r2, [pc, #48] ; (8006648 ) 8006616: 7b13 ldrb r3, [r2, #12] 8006618: f043 0302 orr.w r3, r3, #2 800661c: 7313 strb r3, [r2, #12] { t0.c=0; t0.pix_x=-1; t0.pix_y=-1; } } 800661e: e00c b.n 800663a t0.c=0; 8006620: 4a09 ldr r2, [pc, #36] ; (8006648 ) 8006622: 7b13 ldrb r3, [r2, #12] 8006624: f36f 0341 bfc r3, #1, #1 8006628: 7313 strb r3, [r2, #12] t0.pix_x=-1; 800662a: 4b07 ldr r3, [pc, #28] ; (8006648 ) 800662c: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 8006630: 605a str r2, [r3, #4] t0.pix_y=-1; 8006632: 4b05 ldr r3, [pc, #20] ; (8006648 ) 8006634: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 8006638: 609a str r2, [r3, #8] } 800663a: bf00 nop 800663c: bd98 pop {r3, r4, r7, pc} 800663e: bf00 nop 8006640: 40011c00 .word 0x40011c00 8006644: 2000038e .word 0x2000038e 8006648: 2000038c .word 0x2000038c 800664c: 20000374 .word 0x20000374 08006650 : return 0; } //У׼Ó㬻­Ò»¸öÄ¿±ê×ø±ê //r=×ø±ê°ë¾¶£¬ÏÔʾÌØЧÓà void TP_DrwaTrage(int x,int y,int r) { 8006650: b590 push {r4, r7, lr} 8006652: b087 sub sp, #28 8006654: af02 add r7, sp, #8 8006656: 60f8 str r0, [r7, #12] 8006658: 60b9 str r1, [r7, #8] 800665a: 607a str r2, [r7, #4] Draw_Circle(x,y,r+1,GRAY); 800665c: 68fb ldr r3, [r7, #12] 800665e: b298 uxth r0, r3 8006660: 68bb ldr r3, [r7, #8] 8006662: b299 uxth r1, r3 8006664: 687b ldr r3, [r7, #4] 8006666: b29b uxth r3, r3 8006668: 3301 adds r3, #1 800666a: b29a uxth r2, r3 800666c: f248 4330 movw r3, #33840 ; 0x8430 8006670: f7fe ffb1 bl 80055d6 Draw_Circle(x,y,r,RED); 8006674: 68fb ldr r3, [r7, #12] 8006676: b298 uxth r0, r3 8006678: 68bb ldr r3, [r7, #8] 800667a: b299 uxth r1, r3 800667c: 687b ldr r3, [r7, #4] 800667e: b29a uxth r2, r3 8006680: f44f 4378 mov.w r3, #63488 ; 0xf800 8006684: f7fe ffa7 bl 80055d6 LCD_DrawLine(x,y,x+10,y,RED); 8006688: 68fb ldr r3, [r7, #12] 800668a: b298 uxth r0, r3 800668c: 68bb ldr r3, [r7, #8] 800668e: b299 uxth r1, r3 8006690: 68fb ldr r3, [r7, #12] 8006692: b29b uxth r3, r3 8006694: 330a adds r3, #10 8006696: b29a uxth r2, r3 8006698: 68bb ldr r3, [r7, #8] 800669a: b29b uxth r3, r3 800669c: f44f 4478 mov.w r4, #63488 ; 0xf800 80066a0: 9400 str r4, [sp, #0] 80066a2: f7fe ff13 bl 80054cc LCD_DrawLine(x,y,x,y+10,RED); 80066a6: 68fb ldr r3, [r7, #12] 80066a8: b298 uxth r0, r3 80066aa: 68bb ldr r3, [r7, #8] 80066ac: b299 uxth r1, r3 80066ae: 68fb ldr r3, [r7, #12] 80066b0: b29a uxth r2, r3 80066b2: 68bb ldr r3, [r7, #8] 80066b4: b29b uxth r3, r3 80066b6: 330a adds r3, #10 80066b8: b29b uxth r3, r3 80066ba: f44f 4478 mov.w r4, #63488 ; 0xf800 80066be: 9400 str r4, [sp, #0] 80066c0: f7fe ff04 bl 80054cc LCD_DrawLine(x,y,x-10,y,RED); 80066c4: 68fb ldr r3, [r7, #12] 80066c6: b298 uxth r0, r3 80066c8: 68bb ldr r3, [r7, #8] 80066ca: b299 uxth r1, r3 80066cc: 68fb ldr r3, [r7, #12] 80066ce: b29b uxth r3, r3 80066d0: 3b0a subs r3, #10 80066d2: b29a uxth r2, r3 80066d4: 68bb ldr r3, [r7, #8] 80066d6: b29b uxth r3, r3 80066d8: f44f 4478 mov.w r4, #63488 ; 0xf800 80066dc: 9400 str r4, [sp, #0] 80066de: f7fe fef5 bl 80054cc LCD_DrawLine(x,y,x,y-10,RED); 80066e2: 68fb ldr r3, [r7, #12] 80066e4: b298 uxth r0, r3 80066e6: 68bb ldr r3, [r7, #8] 80066e8: b299 uxth r1, r3 80066ea: 68fb ldr r3, [r7, #12] 80066ec: b29a uxth r2, r3 80066ee: 68bb ldr r3, [r7, #8] 80066f0: b29b uxth r3, r3 80066f2: 3b0a subs r3, #10 80066f4: b29b uxth r3, r3 80066f6: f44f 4478 mov.w r4, #63488 ; 0xf800 80066fa: 9400 str r4, [sp, #0] 80066fc: f7fe fee6 bl 80054cc } 8006700: bf00 nop 8006702: 3714 adds r7, #20 8006704: 46bd mov sp, r7 8006706: bd90 pop {r4, r7, pc} 08006708 : //´¥ÃþÆÁУ׼ //mode У׼ģʽ£¬0 ±»¶¯Ð£×¼ £¬1 Ö÷¶¯Ð£×¼ void TP_adjustment(char mode) { 8006708: b5b0 push {r4, r5, r7, lr} 800670a: b0a6 sub sp, #152 ; 0x98 800670c: af02 add r7, sp, #8 800670e: 4603 mov r3, r0 8006710: 71fb strb r3, [r7, #7] //ÅжÏÊÇ·ñÐèҪУ׼£¬´Óeeprom»ñÈ¡Êý¾Ý EEPROM_READ_BATY(16,(char *)&tconfig,sizeof(touch_config)); 8006712: 2218 movs r2, #24 8006714: 4917 ldr r1, [pc, #92] ; (8006774 ) 8006716: 2010 movs r0, #16 8006718: f7ff f922 bl 8005960 if(tconfig.begin==0xab&&tconfig.end==0xcd&&mode==0) //ÅжÏУ׼±ê¼Ç 800671c: 4b15 ldr r3, [pc, #84] ; (8006774 ) 800671e: 781b ldrb r3, [r3, #0] 8006720: 2bab cmp r3, #171 ; 0xab 8006722: d107 bne.n 8006734 8006724: 4b13 ldr r3, [pc, #76] ; (8006774 ) 8006726: 7d1b ldrb r3, [r3, #20] 8006728: 2bcd cmp r3, #205 ; 0xcd 800672a: d103 bne.n 8006734 800672c: 79fb ldrb r3, [r7, #7] 800672e: 2b00 cmp r3, #0 8006730: f000 82b8 beq.w 8006ca4 { return; //ÒѾ­Ð£×¼¹ýÁË } //У׼·½·¨±È½Ï¼òµ¥£¬¶ÁÈ¡4¸ö×ø±ê¼ÆËãadÖµÓëÏñËصĹØϵ char str[64]; //ÓÃÓÚ×Ö·û´®Ìáʾ uint16_t y_adc,x_adc,step=0,r=10; //adc»º´æ£¬Ð£×¼²½Ö裬×ø±êµÄ°ë¾¶ 8006734: 2300 movs r3, #0 8006736: f8a7 308e strh.w r3, [r7, #142] ; 0x8e 800673a: 230a movs r3, #10 800673c: f8a7 308c strh.w r3, [r7, #140] ; 0x8c uint16_t y1,y2,y3,y4,x1,x2,x3,x4; //4¸öµã»º´æ int y5,x5,xd,xl,yd,yl; //ͨ¹ý4¸öµãËã³öxyµÄ³¤±ßºÍ¶Ì±ß float acc_x,acc_y; //Ëã³öµÄ¹Øϵ±¶ÂÊ int offset_x,offset_y; //Ëã³öµÄÆ«²î uint32_t wait=HAL_GetTick()+50000,ms100=0; //У׼ʱ¼ä£¬50Ãëû²Ù×÷¾Í×Ô¶¯Í˳ö 8006740: f7fb fa1a bl 8001b78 8006744: 4603 mov r3, r0 8006746: f503 4343 add.w r3, r3, #49920 ; 0xc300 800674a: 3350 adds r3, #80 ; 0x50 800674c: 67bb str r3, [r7, #120] ; 0x78 800674e: 2300 movs r3, #0 8006750: 677b str r3, [r7, #116] ; 0x74 //ÏÔʾ×Ö·û´®Ìáʾ LCD_Clear(GRAY); 8006752: f248 4030 movw r0, #33840 ; 0x8430 8006756: f7fe fe67 bl 8005428 LCD_ShowString(0,50,"Calibrate the touch screen",16,RED,RED); 800675a: f44f 4378 mov.w r3, #63488 ; 0xf800 800675e: 9301 str r3, [sp, #4] 8006760: f44f 4378 mov.w r3, #63488 ; 0xf800 8006764: 9300 str r3, [sp, #0] 8006766: 2310 movs r3, #16 8006768: 4a03 ldr r2, [pc, #12] ; (8006778 ) 800676a: 2132 movs r1, #50 ; 0x32 800676c: 2000 movs r0, #0 800676e: f7ff f859 bl 8005824 //TP_DrwaTrage(30,30,10); //¿ªÊ¼Ð£×¼ while(HAL_GetTick() 8006774: 20000374 .word 0x20000374 8006778: 0800a6c8 .word 0x0800a6c8 { if(TPEN==0) //Èç¹ûÆÁÄ»±»°´Ï 800677c: f44f 6180 mov.w r1, #1024 ; 0x400 8006780: 48d7 ldr r0, [pc, #860] ; (8006ae0 ) 8006782: f7fb fcc9 bl 8002118 8006786: 4603 mov r3, r0 8006788: 2b00 cmp r3, #0 800678a: d14c bne.n 8006826 { wait=HAL_GetTick()+50000; //ÖØÖÃ50Ãë 800678c: f7fb f9f4 bl 8001b78 8006790: 4603 mov r3, r0 8006792: f503 4343 add.w r3, r3, #49920 ; 0xc300 8006796: 3350 adds r3, #80 ; 0x50 8006798: 67bb str r3, [r7, #120] ; 0x78 TP_Read_XY2(&x_adc,&y_adc); //¶ÁÈ¡xy adÖµ 800679a: f107 020a add.w r2, r7, #10 800679e: f107 0308 add.w r3, r7, #8 80067a2: 4611 mov r1, r2 80067a4: 4618 mov r0, r3 80067a6: f7ff fe72 bl 800648e //½«¶Áµ½µÄÖµÏÔʾ³öÀ´ sprintf(str,"ADC_X:%04d",x_adc); 80067aa: 893b ldrh r3, [r7, #8] 80067ac: 461a mov r2, r3 80067ae: f107 030c add.w r3, r7, #12 80067b2: 49cc ldr r1, [pc, #816] ; (8006ae4 ) 80067b4: 4618 mov r0, r3 80067b6: f001 fdaf bl 8008318 LCD_ShowString(100, 0, str, 16, RED, GRAY); 80067ba: f107 020c add.w r2, r7, #12 80067be: f248 4330 movw r3, #33840 ; 0x8430 80067c2: 9301 str r3, [sp, #4] 80067c4: f44f 4378 mov.w r3, #63488 ; 0xf800 80067c8: 9300 str r3, [sp, #0] 80067ca: 2310 movs r3, #16 80067cc: 2100 movs r1, #0 80067ce: 2064 movs r0, #100 ; 0x64 80067d0: f7ff f828 bl 8005824 sprintf(str,"ADC_Y:%04d",y_adc); 80067d4: 897b ldrh r3, [r7, #10] 80067d6: 461a mov r2, r3 80067d8: f107 030c add.w r3, r7, #12 80067dc: 49c2 ldr r1, [pc, #776] ; (8006ae8 ) 80067de: 4618 mov r0, r3 80067e0: f001 fd9a bl 8008318 LCD_ShowString(100, 16, str, 16, RED, GRAY); 80067e4: f107 020c add.w r2, r7, #12 80067e8: f248 4330 movw r3, #33840 ; 0x8430 80067ec: 9301 str r3, [sp, #4] 80067ee: f44f 4378 mov.w r3, #63488 ; 0xf800 80067f2: 9300 str r3, [sp, #0] 80067f4: 2310 movs r3, #16 80067f6: 2110 movs r1, #16 80067f8: 2064 movs r0, #100 ; 0x64 80067fa: f7ff f813 bl 8005824 //ÌØЧ£¬°ë¾¶¿ªÊ¼ÊÕËõ if(HAL_GetTick()>ms100) 80067fe: f7fb f9bb bl 8001b78 8006802: 4602 mov r2, r0 8006804: 6f7b ldr r3, [r7, #116] ; 0x74 8006806: 4293 cmp r3, r2 8006808: d20d bcs.n 8006826 { ms100=HAL_GetTick()+100; 800680a: f7fb f9b5 bl 8001b78 800680e: 4603 mov r3, r0 8006810: 3364 adds r3, #100 ; 0x64 8006812: 677b str r3, [r7, #116] ; 0x74 if(r>0){r--;} 8006814: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006818: 2b00 cmp r3, #0 800681a: d004 beq.n 8006826 800681c: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006820: 3b01 subs r3, #1 8006822: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } //²½Öè0£¬½«µã»­ÔÚ£¨30£¬30£©´Ëʱ°ë¾¶Îª10 if(step==0) 8006826: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 800682a: 2b00 cmp r3, #0 800682c: d12b bne.n 8006886 { TP_DrwaTrage(30,30,r); 800682e: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006832: 461a mov r2, r3 8006834: 211e movs r1, #30 8006836: 201e movs r0, #30 8006838: f7ff ff0a bl 8006650 if(r==0)//µ±°ë¾¶ÊÕËõΪ0µÄʱºò 800683c: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006840: 2b00 cmp r3, #0 8006842: d120 bne.n 8006886 { //½øÈëÏÂÒ»¸ö²½Ö裬»º´æÕâ¸öµãµÄÖµ£¬ÏÔʾ³öÀ´ step+=1; 8006844: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006848: 3301 adds r3, #1 800684a: f8a7 308e strh.w r3, [r7, #142] ; 0x8e y1=y_adc; 800684e: 897b ldrh r3, [r7, #10] 8006850: f8a7 308a strh.w r3, [r7, #138] ; 0x8a x1=x_adc; 8006854: 893b ldrh r3, [r7, #8] 8006856: f8a7 3082 strh.w r3, [r7, #130] ; 0x82 sprintf(str,"point_1 x:%d y:%d",x1,y1); 800685a: f8b7 2082 ldrh.w r2, [r7, #130] ; 0x82 800685e: f8b7 308a ldrh.w r3, [r7, #138] ; 0x8a 8006862: f107 000c add.w r0, r7, #12 8006866: 49a1 ldr r1, [pc, #644] ; (8006aec ) 8006868: f001 fd56 bl 8008318 LCD_ShowString(0,66,str,16,RED,RED); 800686c: f107 020c add.w r2, r7, #12 8006870: f44f 4378 mov.w r3, #63488 ; 0xf800 8006874: 9301 str r3, [sp, #4] 8006876: f44f 4378 mov.w r3, #63488 ; 0xf800 800687a: 9300 str r3, [sp, #0] 800687c: 2310 movs r3, #16 800687e: 2142 movs r1, #66 ; 0x42 8006880: 2000 movs r0, #0 8006882: f7fe ffcf bl 8005824 } } //²½Öè1£¬µÈ´ýÆÁÄ»±»ËÉ¿ª£¬½øÈëÏÂÒ»¸ö²½Ö裬ÖØÖð뾶 if(step==1) 8006886: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 800688a: 2b01 cmp r3, #1 800688c: d10f bne.n 80068ae { if(TPEN==1) 800688e: f44f 6180 mov.w r1, #1024 ; 0x400 8006892: 4893 ldr r0, [pc, #588] ; (8006ae0 ) 8006894: f7fb fc40 bl 8002118 8006898: 4603 mov r3, r0 800689a: 2b01 cmp r3, #1 800689c: d107 bne.n 80068ae { step+=1; 800689e: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80068a2: 3301 adds r3, #1 80068a4: f8a7 308e strh.w r3, [r7, #142] ; 0x8e r=10; 80068a8: 230a movs r3, #10 80068aa: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } //ÏÂÃ漸¸ö²½ÖèºÍÉÏÃæÒ»Ñù if(step==2) 80068ae: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80068b2: 2b02 cmp r3, #2 80068b4: d12c bne.n 8006910 { TP_DrwaTrage(290,30,r); 80068b6: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 80068ba: 461a mov r2, r3 80068bc: 211e movs r1, #30 80068be: f44f 7091 mov.w r0, #290 ; 0x122 80068c2: f7ff fec5 bl 8006650 if(r==0) 80068c6: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 80068ca: 2b00 cmp r3, #0 80068cc: d120 bne.n 8006910 { step+=1; 80068ce: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80068d2: 3301 adds r3, #1 80068d4: f8a7 308e strh.w r3, [r7, #142] ; 0x8e y2=y_adc; 80068d8: 897b ldrh r3, [r7, #10] 80068da: f8a7 3088 strh.w r3, [r7, #136] ; 0x88 x2=x_adc; 80068de: 893b ldrh r3, [r7, #8] 80068e0: f8a7 3080 strh.w r3, [r7, #128] ; 0x80 sprintf(str,"point_2 x:%d y:%d",x2,y2); 80068e4: f8b7 2080 ldrh.w r2, [r7, #128] ; 0x80 80068e8: f8b7 3088 ldrh.w r3, [r7, #136] ; 0x88 80068ec: f107 000c add.w r0, r7, #12 80068f0: 497f ldr r1, [pc, #508] ; (8006af0 ) 80068f2: f001 fd11 bl 8008318 LCD_ShowString(0,66+16,str,16,RED,RED); 80068f6: f107 020c add.w r2, r7, #12 80068fa: f44f 4378 mov.w r3, #63488 ; 0xf800 80068fe: 9301 str r3, [sp, #4] 8006900: f44f 4378 mov.w r3, #63488 ; 0xf800 8006904: 9300 str r3, [sp, #0] 8006906: 2310 movs r3, #16 8006908: 2152 movs r1, #82 ; 0x52 800690a: 2000 movs r0, #0 800690c: f7fe ff8a bl 8005824 } } if(step==3) 8006910: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006914: 2b03 cmp r3, #3 8006916: d10f bne.n 8006938 { if(TPEN==1) 8006918: f44f 6180 mov.w r1, #1024 ; 0x400 800691c: 4870 ldr r0, [pc, #448] ; (8006ae0 ) 800691e: f7fb fbfb bl 8002118 8006922: 4603 mov r3, r0 8006924: 2b01 cmp r3, #1 8006926: d107 bne.n 8006938 { step+=1; 8006928: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 800692c: 3301 adds r3, #1 800692e: f8a7 308e strh.w r3, [r7, #142] ; 0x8e r=10; 8006932: 230a movs r3, #10 8006934: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } if(step==4) 8006938: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 800693c: 2b04 cmp r3, #4 800693e: d12b bne.n 8006998 { TP_DrwaTrage(30,210,r); 8006940: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006944: 461a mov r2, r3 8006946: 21d2 movs r1, #210 ; 0xd2 8006948: 201e movs r0, #30 800694a: f7ff fe81 bl 8006650 if(r==0) 800694e: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006952: 2b00 cmp r3, #0 8006954: d120 bne.n 8006998 { step+=1; 8006956: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 800695a: 3301 adds r3, #1 800695c: f8a7 308e strh.w r3, [r7, #142] ; 0x8e y3=y_adc; 8006960: 897b ldrh r3, [r7, #10] 8006962: f8a7 3086 strh.w r3, [r7, #134] ; 0x86 x3=x_adc; 8006966: 893b ldrh r3, [r7, #8] 8006968: f8a7 307e strh.w r3, [r7, #126] ; 0x7e sprintf(str,"point_3 x:%d y:%d",x3,y3); 800696c: f8b7 207e ldrh.w r2, [r7, #126] ; 0x7e 8006970: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86 8006974: f107 000c add.w r0, r7, #12 8006978: 495e ldr r1, [pc, #376] ; (8006af4 ) 800697a: f001 fccd bl 8008318 LCD_ShowString(0,66+16+16,str,16,RED,RED); 800697e: f107 020c add.w r2, r7, #12 8006982: f44f 4378 mov.w r3, #63488 ; 0xf800 8006986: 9301 str r3, [sp, #4] 8006988: f44f 4378 mov.w r3, #63488 ; 0xf800 800698c: 9300 str r3, [sp, #0] 800698e: 2310 movs r3, #16 8006990: 2162 movs r1, #98 ; 0x62 8006992: 2000 movs r0, #0 8006994: f7fe ff46 bl 8005824 } } if(step==5) 8006998: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 800699c: 2b05 cmp r3, #5 800699e: d10f bne.n 80069c0 { if(TPEN==1) 80069a0: f44f 6180 mov.w r1, #1024 ; 0x400 80069a4: 484e ldr r0, [pc, #312] ; (8006ae0 ) 80069a6: f7fb fbb7 bl 8002118 80069aa: 4603 mov r3, r0 80069ac: 2b01 cmp r3, #1 80069ae: d107 bne.n 80069c0 { step+=1; 80069b0: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80069b4: 3301 adds r3, #1 80069b6: f8a7 308e strh.w r3, [r7, #142] ; 0x8e r=10; 80069ba: 230a movs r3, #10 80069bc: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } if(step==6) 80069c0: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80069c4: 2b06 cmp r3, #6 80069c6: d12c bne.n 8006a22 { TP_DrwaTrage(290,210,r); 80069c8: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 80069cc: 461a mov r2, r3 80069ce: 21d2 movs r1, #210 ; 0xd2 80069d0: f44f 7091 mov.w r0, #290 ; 0x122 80069d4: f7ff fe3c bl 8006650 if(r==0) 80069d8: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 80069dc: 2b00 cmp r3, #0 80069de: d120 bne.n 8006a22 { step+=1; 80069e0: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80069e4: 3301 adds r3, #1 80069e6: f8a7 308e strh.w r3, [r7, #142] ; 0x8e y4=y_adc; 80069ea: 897b ldrh r3, [r7, #10] 80069ec: f8a7 3084 strh.w r3, [r7, #132] ; 0x84 x4=x_adc; 80069f0: 893b ldrh r3, [r7, #8] 80069f2: f8a7 307c strh.w r3, [r7, #124] ; 0x7c sprintf(str,"point_4 x:%d y:%d",x4,y4); 80069f6: f8b7 207c ldrh.w r2, [r7, #124] ; 0x7c 80069fa: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84 80069fe: f107 000c add.w r0, r7, #12 8006a02: 493d ldr r1, [pc, #244] ; (8006af8 ) 8006a04: f001 fc88 bl 8008318 LCD_ShowString(0,66+16+16+16,str,16,RED,RED); 8006a08: f107 020c add.w r2, r7, #12 8006a0c: f44f 4378 mov.w r3, #63488 ; 0xf800 8006a10: 9301 str r3, [sp, #4] 8006a12: f44f 4378 mov.w r3, #63488 ; 0xf800 8006a16: 9300 str r3, [sp, #0] 8006a18: 2310 movs r3, #16 8006a1a: 2172 movs r1, #114 ; 0x72 8006a1c: 2000 movs r0, #0 8006a1e: f7fe ff01 bl 8005824 } } if(step==7) 8006a22: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006a26: 2b07 cmp r3, #7 8006a28: d10f bne.n 8006a4a { if(TPEN==1) 8006a2a: f44f 6180 mov.w r1, #1024 ; 0x400 8006a2e: 482c ldr r0, [pc, #176] ; (8006ae0 ) 8006a30: f7fb fb72 bl 8002118 8006a34: 4603 mov r3, r0 8006a36: 2b01 cmp r3, #1 8006a38: d107 bne.n 8006a4a { step+=1; 8006a3a: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006a3e: 3301 adds r3, #1 8006a40: f8a7 308e strh.w r3, [r7, #142] ; 0x8e r=10; 8006a44: 230a movs r3, #10 8006a46: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } //µ±4¸öµã¶ÁÈ¡Í꣬¿ªÊ¼¼ÆËã¹Øϵ if(step==8) 8006a4a: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006a4e: 2b08 cmp r3, #8 8006a50: f040 8120 bne.w 8006c94 { //ÆäʵֻÐèÒªÁ½¸öµã¾ÍÄÜУ׼£¬Í¨¹ýȡƽ¾ùÖµ»ñµÃxyµÄ³¤±ßºÍ¶Ì±ß xd=((x1+x3)/2); 8006a54: f8b7 2082 ldrh.w r2, [r7, #130] ; 0x82 8006a58: f8b7 307e ldrh.w r3, [r7, #126] ; 0x7e 8006a5c: 4413 add r3, r2 8006a5e: 0fda lsrs r2, r3, #31 8006a60: 4413 add r3, r2 8006a62: 105b asrs r3, r3, #1 8006a64: 673b str r3, [r7, #112] ; 0x70 xl=((x2+x4)/2); 8006a66: f8b7 2080 ldrh.w r2, [r7, #128] ; 0x80 8006a6a: f8b7 307c ldrh.w r3, [r7, #124] ; 0x7c 8006a6e: 4413 add r3, r2 8006a70: 0fda lsrs r2, r3, #31 8006a72: 4413 add r3, r2 8006a74: 105b asrs r3, r3, #1 8006a76: 66fb str r3, [r7, #108] ; 0x6c yd=((y1+y2)/2); 8006a78: f8b7 208a ldrh.w r2, [r7, #138] ; 0x8a 8006a7c: f8b7 3088 ldrh.w r3, [r7, #136] ; 0x88 8006a80: 4413 add r3, r2 8006a82: 0fda lsrs r2, r3, #31 8006a84: 4413 add r3, r2 8006a86: 105b asrs r3, r3, #1 8006a88: 66bb str r3, [r7, #104] ; 0x68 yl=((y3+y4)/2); 8006a8a: f8b7 2086 ldrh.w r2, [r7, #134] ; 0x86 8006a8e: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84 8006a92: 4413 add r3, r2 8006a94: 0fda lsrs r2, r3, #31 8006a96: 4413 add r3, r2 8006a98: 105b asrs r3, r3, #1 8006a9a: 667b str r3, [r7, #100] ; 0x64 //³¤±ß¼õÈ¥¶Ì±ß¿ÉÒÔÔÙ»ñµÃÒ»¸öµã x5=xl-xd; 8006a9c: 6efa ldr r2, [r7, #108] ; 0x6c 8006a9e: 6f3b ldr r3, [r7, #112] ; 0x70 8006aa0: 1ad3 subs r3, r2, r3 8006aa2: 663b str r3, [r7, #96] ; 0x60 y5=yl-yd; 8006aa4: 6e7a ldr r2, [r7, #100] ; 0x64 8006aa6: 6ebb ldr r3, [r7, #104] ; 0x68 8006aa8: 1ad3 subs r3, r2, r3 8006aaa: 65fb str r3, [r7, #92] ; 0x5c //Õâ¸öµãÈç¹ûÊǸºÊý£¬¿Ï¶¨ÓÐ´í£¬¿ÉÄÜÊÇxy¸ã·´ÁË if(x5<0||y5<0) 8006aac: 6e3b ldr r3, [r7, #96] ; 0x60 8006aae: 2b00 cmp r3, #0 8006ab0: db02 blt.n 8006ab8 8006ab2: 6dfb ldr r3, [r7, #92] ; 0x5c 8006ab4: 2b00 cmp r3, #0 8006ab6: da23 bge.n 8006b00 { //ÏÔʾerror sprintf(str,"ERROR"); 8006ab8: f107 030c add.w r3, r7, #12 8006abc: 490f ldr r1, [pc, #60] ; (8006afc ) 8006abe: 4618 mov r0, r3 8006ac0: f001 fc2a bl 8008318 LCD_ShowString(0,66+16+16+16+16,str,16,RED, GRAY); 8006ac4: f107 020c add.w r2, r7, #12 8006ac8: f248 4330 movw r3, #33840 ; 0x8430 8006acc: 9301 str r3, [sp, #4] 8006ace: f44f 4378 mov.w r3, #63488 ; 0xf800 8006ad2: 9300 str r3, [sp, #0] 8006ad4: 2310 movs r3, #16 8006ad6: 2182 movs r1, #130 ; 0x82 8006ad8: 2000 movs r0, #0 8006ada: f7fe fea3 bl 8005824 8006ade: e0cf b.n 8006c80 8006ae0: 40011c00 .word 0x40011c00 8006ae4: 0800a6e4 .word 0x0800a6e4 8006ae8: 0800a6f0 .word 0x0800a6f0 8006aec: 0800a6fc .word 0x0800a6fc 8006af0: 0800a710 .word 0x0800a710 8006af4: 0800a724 .word 0x0800a724 8006af8: 0800a738 .word 0x0800a738 8006afc: 0800a74c .word 0x0800a74c }else { //¼ÆËã¹Øϵ±¶ÂÊ //adµÄ³¤±ß¼õÈ¥¶Ì±ßÔÙ³ýȥʵ¼ÊÆÁÄ»ÏñËصij¤±ß¼õ¶Ì±ß£¨260=320-30-30£¬180=240-30-30£© acc_x=x5/260.0; 8006b00: 6e38 ldr r0, [r7, #96] ; 0x60 8006b02: f7f9 fceb bl 80004dc <__aeabi_i2d> 8006b06: f04f 0200 mov.w r2, #0 8006b0a: 4b68 ldr r3, [pc, #416] ; (8006cac ) 8006b0c: f7f9 fe7a bl 8000804 <__aeabi_ddiv> 8006b10: 4602 mov r2, r0 8006b12: 460b mov r3, r1 8006b14: 4610 mov r0, r2 8006b16: 4619 mov r1, r3 8006b18: f7fa f822 bl 8000b60 <__aeabi_d2f> 8006b1c: 4603 mov r3, r0 8006b1e: 65bb str r3, [r7, #88] ; 0x58 acc_y=y5/180.0; 8006b20: 6df8 ldr r0, [r7, #92] ; 0x5c 8006b22: f7f9 fcdb bl 80004dc <__aeabi_i2d> 8006b26: f04f 0200 mov.w r2, #0 8006b2a: 4b61 ldr r3, [pc, #388] ; (8006cb0 ) 8006b2c: f7f9 fe6a bl 8000804 <__aeabi_ddiv> 8006b30: 4602 mov r2, r0 8006b32: 460b mov r3, r1 8006b34: 4610 mov r0, r2 8006b36: 4619 mov r1, r3 8006b38: f7fa f812 bl 8000b60 <__aeabi_d2f> 8006b3c: 4603 mov r3, r0 8006b3e: 657b str r3, [r7, #84] ; 0x54 //ÑéÖ¤±¶ÂÊ£¬½«Êµ¼ÊÖµ¼õÈ¥ÑéÖ¤Öµ¾ÍµÈÓÚÎó²îÖµ£¬ÒòΪÓÐÁ½¸öµã£¬ËùÒÔ¼ÆËãÁËÁ½¸öÎó²îºóÇóÁËƽ¾ùÖµ offset_x=(((xd/acc_x)-30)+((xl/acc_x)-290))/2; 8006b40: 6f38 ldr r0, [r7, #112] ; 0x70 8006b42: f7fa f917 bl 8000d74 <__aeabi_i2f> 8006b46: 4603 mov r3, r0 8006b48: 6db9 ldr r1, [r7, #88] ; 0x58 8006b4a: 4618 mov r0, r3 8006b4c: f7fa fa1a bl 8000f84 <__aeabi_fdiv> 8006b50: 4603 mov r3, r0 8006b52: 4958 ldr r1, [pc, #352] ; (8006cb4 ) 8006b54: 4618 mov r0, r3 8006b56: f7fa f857 bl 8000c08 <__aeabi_fsub> 8006b5a: 4603 mov r3, r0 8006b5c: 461c mov r4, r3 8006b5e: 6ef8 ldr r0, [r7, #108] ; 0x6c 8006b60: f7fa f908 bl 8000d74 <__aeabi_i2f> 8006b64: 4603 mov r3, r0 8006b66: 6db9 ldr r1, [r7, #88] ; 0x58 8006b68: 4618 mov r0, r3 8006b6a: f7fa fa0b bl 8000f84 <__aeabi_fdiv> 8006b6e: 4603 mov r3, r0 8006b70: 4951 ldr r1, [pc, #324] ; (8006cb8 ) 8006b72: 4618 mov r0, r3 8006b74: f7fa f848 bl 8000c08 <__aeabi_fsub> 8006b78: 4603 mov r3, r0 8006b7a: 4619 mov r1, r3 8006b7c: 4620 mov r0, r4 8006b7e: f7fa f845 bl 8000c0c <__addsf3> 8006b82: 4603 mov r3, r0 8006b84: f04f 4180 mov.w r1, #1073741824 ; 0x40000000 8006b88: 4618 mov r0, r3 8006b8a: f7fa f9fb bl 8000f84 <__aeabi_fdiv> 8006b8e: 4603 mov r3, r0 8006b90: 4618 mov r0, r3 8006b92: f7fa fa93 bl 80010bc <__aeabi_f2iz> 8006b96: 4603 mov r3, r0 8006b98: 653b str r3, [r7, #80] ; 0x50 offset_y=(((yd/acc_y)-30)+((yl/acc_y)-210))/2; 8006b9a: 6eb8 ldr r0, [r7, #104] ; 0x68 8006b9c: f7fa f8ea bl 8000d74 <__aeabi_i2f> 8006ba0: 4603 mov r3, r0 8006ba2: 6d79 ldr r1, [r7, #84] ; 0x54 8006ba4: 4618 mov r0, r3 8006ba6: f7fa f9ed bl 8000f84 <__aeabi_fdiv> 8006baa: 4603 mov r3, r0 8006bac: 4941 ldr r1, [pc, #260] ; (8006cb4 ) 8006bae: 4618 mov r0, r3 8006bb0: f7fa f82a bl 8000c08 <__aeabi_fsub> 8006bb4: 4603 mov r3, r0 8006bb6: 461c mov r4, r3 8006bb8: 6e78 ldr r0, [r7, #100] ; 0x64 8006bba: f7fa f8db bl 8000d74 <__aeabi_i2f> 8006bbe: 4603 mov r3, r0 8006bc0: 6d79 ldr r1, [r7, #84] ; 0x54 8006bc2: 4618 mov r0, r3 8006bc4: f7fa f9de bl 8000f84 <__aeabi_fdiv> 8006bc8: 4603 mov r3, r0 8006bca: 493c ldr r1, [pc, #240] ; (8006cbc ) 8006bcc: 4618 mov r0, r3 8006bce: f7fa f81b bl 8000c08 <__aeabi_fsub> 8006bd2: 4603 mov r3, r0 8006bd4: 4619 mov r1, r3 8006bd6: 4620 mov r0, r4 8006bd8: f7fa f818 bl 8000c0c <__addsf3> 8006bdc: 4603 mov r3, r0 8006bde: f04f 4180 mov.w r1, #1073741824 ; 0x40000000 8006be2: 4618 mov r0, r3 8006be4: f7fa f9ce bl 8000f84 <__aeabi_fdiv> 8006be8: 4603 mov r3, r0 8006bea: 4618 mov r0, r3 8006bec: f7fa fa66 bl 80010bc <__aeabi_f2iz> 8006bf0: 4603 mov r3, r0 8006bf2: 64fb str r3, [r7, #76] ; 0x4c //±£´æ¼ÆËã½á¹û tconfig.x_acc=acc_x; 8006bf4: 4a32 ldr r2, [pc, #200] ; (8006cc0 ) 8006bf6: 6dbb ldr r3, [r7, #88] ; 0x58 8006bf8: 6053 str r3, [r2, #4] tconfig.x_offset=offset_x; 8006bfa: 4a31 ldr r2, [pc, #196] ; (8006cc0 ) 8006bfc: 6d3b ldr r3, [r7, #80] ; 0x50 8006bfe: 60d3 str r3, [r2, #12] tconfig.y_acc=acc_y; 8006c00: 4a2f ldr r2, [pc, #188] ; (8006cc0 ) 8006c02: 6d7b ldr r3, [r7, #84] ; 0x54 8006c04: 6093 str r3, [r2, #8] tconfig.y_offset=offset_y; 8006c06: 4a2e ldr r2, [pc, #184] ; (8006cc0 ) 8006c08: 6cfb ldr r3, [r7, #76] ; 0x4c 8006c0a: 6113 str r3, [r2, #16] //eeprom¿é±ê¼Ç tconfig.begin=0xab; 8006c0c: 4b2c ldr r3, [pc, #176] ; (8006cc0 ) 8006c0e: 22ab movs r2, #171 ; 0xab 8006c10: 701a strb r2, [r3, #0] tconfig.end=0xcd; 8006c12: 4b2b ldr r3, [pc, #172] ; (8006cc0 ) 8006c14: 22cd movs r2, #205 ; 0xcd 8006c16: 751a strb r2, [r3, #20] //ÏÔʾ¼ÆËã½á¹û sprintf(str,"x_acc=%f y_acc=%f",acc_x,acc_y); 8006c18: 6db8 ldr r0, [r7, #88] ; 0x58 8006c1a: f7f9 fc71 bl 8000500 <__aeabi_f2d> 8006c1e: 4604 mov r4, r0 8006c20: 460d mov r5, r1 8006c22: 6d78 ldr r0, [r7, #84] ; 0x54 8006c24: f7f9 fc6c bl 8000500 <__aeabi_f2d> 8006c28: 4602 mov r2, r0 8006c2a: 460b mov r3, r1 8006c2c: f107 000c add.w r0, r7, #12 8006c30: e9cd 2300 strd r2, r3, [sp] 8006c34: 4622 mov r2, r4 8006c36: 462b mov r3, r5 8006c38: 4922 ldr r1, [pc, #136] ; (8006cc4 ) 8006c3a: f001 fb6d bl 8008318 LCD_ShowString(0,66+16+16+16+16,str,16,RED,RED); 8006c3e: f107 020c add.w r2, r7, #12 8006c42: f44f 4378 mov.w r3, #63488 ; 0xf800 8006c46: 9301 str r3, [sp, #4] 8006c48: f44f 4378 mov.w r3, #63488 ; 0xf800 8006c4c: 9300 str r3, [sp, #0] 8006c4e: 2310 movs r3, #16 8006c50: 2182 movs r1, #130 ; 0x82 8006c52: 2000 movs r0, #0 8006c54: f7fe fde6 bl 8005824 sprintf(str,"x_offset=%d y_offset=%d",offset_x,offset_y); 8006c58: f107 000c add.w r0, r7, #12 8006c5c: 6cfb ldr r3, [r7, #76] ; 0x4c 8006c5e: 6d3a ldr r2, [r7, #80] ; 0x50 8006c60: 4919 ldr r1, [pc, #100] ; (8006cc8 ) 8006c62: f001 fb59 bl 8008318 LCD_ShowString(0,66+16+16+16+16+16,str,16,RED,RED); 8006c66: f107 020c add.w r2, r7, #12 8006c6a: f44f 4378 mov.w r3, #63488 ; 0xf800 8006c6e: 9301 str r3, [sp, #4] 8006c70: f44f 4378 mov.w r3, #63488 ; 0xf800 8006c74: 9300 str r3, [sp, #0] 8006c76: 2310 movs r3, #16 8006c78: 2192 movs r1, #146 ; 0x92 8006c7a: 2000 movs r0, #0 8006c7c: f7fe fdd2 bl 8005824 } //½«½á¹û±£´æÆðÀ´ EEPROM_WRITE_BATY(16,(char *)&tconfig,sizeof(touch_config)); 8006c80: 2218 movs r2, #24 8006c82: 490f ldr r1, [pc, #60] ; (8006cc0 ) 8006c84: 2010 movs r0, #16 8006c86: f7fe fe7d bl 8005984 HAL_Delay(1000); 8006c8a: f44f 707a mov.w r0, #1000 ; 0x3e8 8006c8e: f7fa ff7d bl 8001b8c return; 8006c92: e008 b.n 8006ca6 while(HAL_GetTick() 8006c98: 4602 mov r2, r0 8006c9a: 6fbb ldr r3, [r7, #120] ; 0x78 8006c9c: 4293 cmp r3, r2 8006c9e: f63f ad6d bhi.w 800677c 8006ca2: e000 b.n 8006ca6 return; //ÒѾ­Ð£×¼¹ýÁË 8006ca4: bf00 nop } } } 8006ca6: 3790 adds r7, #144 ; 0x90 8006ca8: 46bd mov sp, r7 8006caa: bdb0 pop {r4, r5, r7, pc} 8006cac: 40704000 .word 0x40704000 8006cb0: 40668000 .word 0x40668000 8006cb4: 41f00000 .word 0x41f00000 8006cb8: 43910000 .word 0x43910000 8006cbc: 43520000 .word 0x43520000 8006cc0: 20000374 .word 0x20000374 8006cc4: 0800a754 .word 0x0800a754 8006cc8: 0800a768 .word 0x0800a768 08006ccc : window *idcard_window; char idcard_str[32]; void APP_IDcard_init(window *a_window) { 8006ccc: b580 push {r7, lr} 8006cce: b082 sub sp, #8 8006cd0: af00 add r7, sp, #0 8006cd2: 6078 str r0, [r7, #4] idcard_window=a_window; 8006cd4: 4a04 ldr r2, [pc, #16] ; (8006ce8 ) 8006cd6: 687b ldr r3, [r7, #4] 8006cd8: 6013 str r3, [r2, #0] RC522_Init(); 8006cda: f7ff fa99 bl 8006210 } 8006cde: bf00 nop 8006ce0: 3708 adds r7, #8 8006ce2: 46bd mov sp, r7 8006ce4: bd80 pop {r7, pc} 8006ce6: bf00 nop 8006ce8: 200003d4 .word 0x200003d4 08006cec : char fundcard,PA,sele,checkkey,read_flag; //ͨ¹ýdebug·µ»Ø¿¨Æ¬Êý¾Ý void APP_IDcard_loop() { 8006cec: b580 push {r7, lr} 8006cee: b084 sub sp, #16 8006cf0: af02 add r7, sp, #8 fundcard = PcdRequest(PICC_REQALL,CT); 8006cf2: 496d ldr r1, [pc, #436] ; (8006ea8 ) 8006cf4: 2052 movs r0, #82 ; 0x52 8006cf6: f7ff f8a8 bl 8005e4a 8006cfa: 4603 mov r3, r0 8006cfc: 461a mov r2, r3 8006cfe: 4b6b ldr r3, [pc, #428] ; (8006eac ) 8006d00: 701a strb r2, [r3, #0] if(fundcard==MI_OK) 8006d02: 4b6a ldr r3, [pc, #424] ; (8006eac ) 8006d04: 781b ldrb r3, [r3, #0] 8006d06: 2b00 cmp r3, #0 8006d08: f040 80ca bne.w 8006ea0 { status=MI_ERR; 8006d0c: 4b68 ldr r3, [pc, #416] ; (8006eb0 ) 8006d0e: 2202 movs r2, #2 8006d10: 701a strb r2, [r3, #0] PA = PcdAnticoll(SN); 8006d12: 4868 ldr r0, [pc, #416] ; (8006eb4 ) 8006d14: f7ff f8d0 bl 8005eb8 8006d18: 4603 mov r3, r0 8006d1a: 461a mov r2, r3 8006d1c: 4b66 ldr r3, [pc, #408] ; (8006eb8 ) 8006d1e: 701a strb r2, [r3, #0] if(PA==MI_OK) 8006d20: 4b65 ldr r3, [pc, #404] ; (8006eb8 ) 8006d22: 781b ldrb r3, [r3, #0] 8006d24: 2b00 cmp r3, #0 8006d26: f040 80bb bne.w 8006ea0 { printf("\n***********************\n"); 8006d2a: 4864 ldr r0, [pc, #400] ; (8006ebc ) 8006d2c: f001 fadc bl 80082e8 printf("Card Type:%X%X\n",CT[0],CT[1]); 8006d30: 4b5d ldr r3, [pc, #372] ; (8006ea8 ) 8006d32: 781b ldrb r3, [r3, #0] 8006d34: 4619 mov r1, r3 8006d36: 4b5c ldr r3, [pc, #368] ; (8006ea8 ) 8006d38: 785b ldrb r3, [r3, #1] 8006d3a: 461a mov r2, r3 8006d3c: 4860 ldr r0, [pc, #384] ; (8006ec0 ) 8006d3e: f001 fa39 bl 80081b4 printf("CardId:%X%X%X%X\n",SN[0],SN[1],SN[2],SN[3]); 8006d42: 4b5c ldr r3, [pc, #368] ; (8006eb4 ) 8006d44: 781b ldrb r3, [r3, #0] 8006d46: 4619 mov r1, r3 8006d48: 4b5a ldr r3, [pc, #360] ; (8006eb4 ) 8006d4a: 785b ldrb r3, [r3, #1] 8006d4c: 461a mov r2, r3 8006d4e: 4b59 ldr r3, [pc, #356] ; (8006eb4 ) 8006d50: 789b ldrb r3, [r3, #2] 8006d52: 4618 mov r0, r3 8006d54: 4b57 ldr r3, [pc, #348] ; (8006eb4 ) 8006d56: 78db ldrb r3, [r3, #3] 8006d58: 9300 str r3, [sp, #0] 8006d5a: 4603 mov r3, r0 8006d5c: 4859 ldr r0, [pc, #356] ; (8006ec4 ) 8006d5e: f001 fa29 bl 80081b4 sprintf(idcard_str,"CardId:%X%X",CT[0],CT[1]); 8006d62: 4b51 ldr r3, [pc, #324] ; (8006ea8 ) 8006d64: 781b ldrb r3, [r3, #0] 8006d66: 461a mov r2, r3 8006d68: 4b4f ldr r3, [pc, #316] ; (8006ea8 ) 8006d6a: 785b ldrb r3, [r3, #1] 8006d6c: 4956 ldr r1, [pc, #344] ; (8006ec8 ) 8006d6e: 4857 ldr r0, [pc, #348] ; (8006ecc ) 8006d70: f001 fad2 bl 8008318 LCD_ShowString(idcard_window->x, idcard_window->y+16, idcard_str, 16, GREEN, RED); 8006d74: 4b56 ldr r3, [pc, #344] ; (8006ed0 ) 8006d76: 681b ldr r3, [r3, #0] 8006d78: 8818 ldrh r0, [r3, #0] 8006d7a: 4b55 ldr r3, [pc, #340] ; (8006ed0 ) 8006d7c: 681b ldr r3, [r3, #0] 8006d7e: 885b ldrh r3, [r3, #2] 8006d80: 3310 adds r3, #16 8006d82: b299 uxth r1, r3 8006d84: f44f 4378 mov.w r3, #63488 ; 0xf800 8006d88: 9301 str r3, [sp, #4] 8006d8a: f44f 63fc mov.w r3, #2016 ; 0x7e0 8006d8e: 9300 str r3, [sp, #0] 8006d90: 2310 movs r3, #16 8006d92: 4a4e ldr r2, [pc, #312] ; (8006ecc ) 8006d94: f7fe fd46 bl 8005824 sprintf(idcard_str,"CardId:%X%X%X%X",SN[0],SN[1],SN[2],SN[3]); 8006d98: 4b46 ldr r3, [pc, #280] ; (8006eb4 ) 8006d9a: 781b ldrb r3, [r3, #0] 8006d9c: 4619 mov r1, r3 8006d9e: 4b45 ldr r3, [pc, #276] ; (8006eb4 ) 8006da0: 785b ldrb r3, [r3, #1] 8006da2: 4618 mov r0, r3 8006da4: 4b43 ldr r3, [pc, #268] ; (8006eb4 ) 8006da6: 789b ldrb r3, [r3, #2] 8006da8: 461a mov r2, r3 8006daa: 4b42 ldr r3, [pc, #264] ; (8006eb4 ) 8006dac: 78db ldrb r3, [r3, #3] 8006dae: 9301 str r3, [sp, #4] 8006db0: 9200 str r2, [sp, #0] 8006db2: 4603 mov r3, r0 8006db4: 460a mov r2, r1 8006db6: 4947 ldr r1, [pc, #284] ; (8006ed4 ) 8006db8: 4844 ldr r0, [pc, #272] ; (8006ecc ) 8006dba: f001 faad bl 8008318 LCD_ShowString(idcard_window->x, idcard_window->y+32, idcard_str, 16, GREEN, RED); 8006dbe: 4b44 ldr r3, [pc, #272] ; (8006ed0 ) 8006dc0: 681b ldr r3, [r3, #0] 8006dc2: 8818 ldrh r0, [r3, #0] 8006dc4: 4b42 ldr r3, [pc, #264] ; (8006ed0 ) 8006dc6: 681b ldr r3, [r3, #0] 8006dc8: 885b ldrh r3, [r3, #2] 8006dca: 3320 adds r3, #32 8006dcc: b299 uxth r1, r3 8006dce: f44f 4378 mov.w r3, #63488 ; 0xf800 8006dd2: 9301 str r3, [sp, #4] 8006dd4: f44f 63fc mov.w r3, #2016 ; 0x7e0 8006dd8: 9300 str r3, [sp, #0] 8006dda: 2310 movs r3, #16 8006ddc: 4a3b ldr r2, [pc, #236] ; (8006ecc ) 8006dde: f7fe fd21 bl 8005824 sele=PcdSelect(SN); 8006de2: 4834 ldr r0, [pc, #208] ; (8006eb4 ) 8006de4: f7ff f91c bl 8006020 8006de8: 4603 mov r3, r0 8006dea: b2da uxtb r2, r3 8006dec: 4b3a ldr r3, [pc, #232] ; (8006ed8 ) 8006dee: 701a strb r2, [r3, #0] if(sele==MI_OK) 8006df0: 4b39 ldr r3, [pc, #228] ; (8006ed8 ) 8006df2: 781b ldrb r3, [r3, #0] 8006df4: 2b00 cmp r3, #0 8006df6: d153 bne.n 8006ea0 { LCD_ShowString(idcard_window->x, idcard_window->y+48, "Key ok", 16, GREEN, RED); 8006df8: 4b35 ldr r3, [pc, #212] ; (8006ed0 ) 8006dfa: 681b ldr r3, [r3, #0] 8006dfc: 8818 ldrh r0, [r3, #0] 8006dfe: 4b34 ldr r3, [pc, #208] ; (8006ed0 ) 8006e00: 681b ldr r3, [r3, #0] 8006e02: 885b ldrh r3, [r3, #2] 8006e04: 3330 adds r3, #48 ; 0x30 8006e06: b299 uxth r1, r3 8006e08: f44f 4378 mov.w r3, #63488 ; 0xf800 8006e0c: 9301 str r3, [sp, #4] 8006e0e: f44f 63fc mov.w r3, #2016 ; 0x7e0 8006e12: 9300 str r3, [sp, #0] 8006e14: 2310 movs r3, #16 8006e16: 4a31 ldr r2, [pc, #196] ; (8006edc ) 8006e18: f7fe fd04 bl 8005824 for(int a=0;a<64;a++) 8006e1c: 2300 movs r3, #0 8006e1e: 607b str r3, [r7, #4] 8006e20: e03b b.n 8006e9a { checkkey=PcdAuthState(0x61,a,KEYB,SN); 8006e22: 687b ldr r3, [r7, #4] 8006e24: b2d9 uxtb r1, r3 8006e26: 4b23 ldr r3, [pc, #140] ; (8006eb4 ) 8006e28: 4a2d ldr r2, [pc, #180] ; (8006ee0 ) 8006e2a: 2061 movs r0, #97 ; 0x61 8006e2c: f7ff f949 bl 80060c2 8006e30: 4603 mov r3, r0 8006e32: 461a mov r2, r3 8006e34: 4b2b ldr r3, [pc, #172] ; (8006ee4 ) 8006e36: 701a strb r2, [r3, #0] if(checkkey==MI_OK) 8006e38: 4b2a ldr r3, [pc, #168] ; (8006ee4 ) 8006e3a: 781b ldrb r3, [r3, #0] 8006e3c: 2b00 cmp r3, #0 8006e3e: d123 bne.n 8006e88 { read_flag=PcdRead(a,RFID); 8006e40: 687b ldr r3, [r7, #4] 8006e42: b2db uxtb r3, r3 8006e44: 4928 ldr r1, [pc, #160] ; (8006ee8 ) 8006e46: 4618 mov r0, r3 8006e48: f7ff f9a0 bl 800618c 8006e4c: 4603 mov r3, r0 8006e4e: 461a mov r2, r3 8006e50: 4b26 ldr r3, [pc, #152] ; (8006eec ) 8006e52: 701a strb r2, [r3, #0] if(read_flag==MI_OK) 8006e54: 4b25 ldr r3, [pc, #148] ; (8006eec ) 8006e56: 781b ldrb r3, [r3, #0] 8006e58: 2b00 cmp r3, #0 8006e5a: d111 bne.n 8006e80 { for(int d=0;d<16;d++) 8006e5c: 2300 movs r3, #0 8006e5e: 603b str r3, [r7, #0] 8006e60: e00a b.n 8006e78 { printf("%02X",RFID[d]); 8006e62: 4a21 ldr r2, [pc, #132] ; (8006ee8 ) 8006e64: 683b ldr r3, [r7, #0] 8006e66: 4413 add r3, r2 8006e68: 781b ldrb r3, [r3, #0] 8006e6a: 4619 mov r1, r3 8006e6c: 4820 ldr r0, [pc, #128] ; (8006ef0 ) 8006e6e: f001 f9a1 bl 80081b4 for(int d=0;d<16;d++) 8006e72: 683b ldr r3, [r7, #0] 8006e74: 3301 adds r3, #1 8006e76: 603b str r3, [r7, #0] 8006e78: 683b ldr r3, [r7, #0] 8006e7a: 2b0f cmp r3, #15 8006e7c: ddf1 ble.n 8006e62 8006e7e: e006 b.n 8006e8e } }else { printf("READ_ERROR"); 8006e80: 481c ldr r0, [pc, #112] ; (8006ef4 ) 8006e82: f001 f997 bl 80081b4 8006e86: e002 b.n 8006e8e } }else { printf("KEY_ERROR"); 8006e88: 481b ldr r0, [pc, #108] ; (8006ef8 ) 8006e8a: f001 f993 bl 80081b4 } printf("\n"); 8006e8e: 200a movs r0, #10 8006e90: f001 f9a8 bl 80081e4 for(int a=0;a<64;a++) 8006e94: 687b ldr r3, [r7, #4] 8006e96: 3301 adds r3, #1 8006e98: 607b str r3, [r7, #4] 8006e9a: 687b ldr r3, [r7, #4] 8006e9c: 2b3f cmp r3, #63 ; 0x3f 8006e9e: ddc0 ble.n 8006e22 sprintf(idcard_str,"%x%x%x%x%x%x%x%x%x%x%x%x%x%x%x%x",RFID[0],RFID[1],RFID[2],RFID[3],RFID[4],RFID[5],RFID[6],RFID[7],RFID[8],RFID[9],RFID[10],RFID[11],RFID[12],RFID[13],RFID[14],RFID[15]); LCD_ShowString(idcard_window->x, idcard_window->y+32, idcard_str, 16, GREEN, RED); } */ } 8006ea0: bf00 nop 8006ea2: 3708 adds r7, #8 8006ea4: 46bd mov sp, r7 8006ea6: bd80 pop {r7, pc} 8006ea8: 200003dc .word 0x200003dc 8006eac: 200003e4 .word 0x200003e4 8006eb0: 200003e6 .word 0x200003e6 8006eb4: 200003e0 .word 0x200003e0 8006eb8: 200003ac .word 0x200003ac 8006ebc: 0800a780 .word 0x0800a780 8006ec0: 0800a79c .word 0x0800a79c 8006ec4: 0800a7ac .word 0x0800a7ac 8006ec8: 0800a7c0 .word 0x0800a7c0 8006ecc: 200003b0 .word 0x200003b0 8006ed0: 200003d4 .word 0x200003d4 8006ed4: 0800a7cc .word 0x0800a7cc 8006ed8: 200003e5 .word 0x200003e5 8006edc: 0800a7dc .word 0x0800a7dc 8006ee0: 2000000c .word 0x2000000c 8006ee4: 200003d8 .word 0x200003d8 8006ee8: 2000039c .word 0x2000039c 8006eec: 200003d0 .word 0x200003d0 8006ef0: 0800a7e4 .word 0x0800a7e4 8006ef4: 0800a7ec .word 0x0800a7ec 8006ef8: 0800a7f8 .word 0x0800a7f8 08006efc : IIC_SAND_DATE(MAX30102_Device_address,REG_LED2_PA,&a,1);// Choose value for ~ 10mA for LED2 a=0x7f; IIC_SAND_DATE(MAX30102_Device_address,REG_PILOT_PA,&a,1);// Choose value for ~ 25mA for Pilot LED } void max30102_read_fifo(void) { 8006efc: b580 push {r7, lr} 8006efe: b082 sub sp, #8 8006f00: af00 add r7, sp, #0 uint16_t un_temp; fifo_red=0; 8006f02: 4b3c ldr r3, [pc, #240] ; (8006ff4 ) 8006f04: 2200 movs r2, #0 8006f06: 801a strh r2, [r3, #0] fifo_ir=0; 8006f08: 4b3b ldr r3, [pc, #236] ; (8006ff8 ) 8006f0a: 2200 movs r2, #0 8006f0c: 801a strh r2, [r3, #0] uint8_t ach_i2c_data[6]; //read and clear status register IIC_READ_DATE(MAX30102_Device_address,REG_INTR_STATUS_1,&ach_i2c_data,1); 8006f0e: 463a mov r2, r7 8006f10: 2301 movs r3, #1 8006f12: 2100 movs r1, #0 8006f14: 20ae movs r0, #174 ; 0xae 8006f16: f7fe fd99 bl 8005a4c IIC_READ_DATE(MAX30102_Device_address,REG_INTR_STATUS_2,&ach_i2c_data,1); 8006f1a: 463a mov r2, r7 8006f1c: 2301 movs r3, #1 8006f1e: 2101 movs r1, #1 8006f20: 20ae movs r0, #174 ; 0xae 8006f22: f7fe fd93 bl 8005a4c ach_i2c_data[0]=REG_FIFO_DATA; 8006f26: 2307 movs r3, #7 8006f28: 703b strb r3, [r7, #0] IIC_READ_DATE(MAX30102_Device_address,REG_FIFO_DATA,&ach_i2c_data,6); 8006f2a: 463a mov r2, r7 8006f2c: 2306 movs r3, #6 8006f2e: 2107 movs r1, #7 8006f30: 20ae movs r0, #174 ; 0xae 8006f32: f7fe fd8b bl 8005a4c un_temp=ach_i2c_data[0]; 8006f36: 783b ldrb r3, [r7, #0] 8006f38: 80fb strh r3, [r7, #6] un_temp<<=14; 8006f3a: 88fb ldrh r3, [r7, #6] 8006f3c: 039b lsls r3, r3, #14 8006f3e: 80fb strh r3, [r7, #6] fifo_red+=un_temp; 8006f40: 4b2c ldr r3, [pc, #176] ; (8006ff4 ) 8006f42: 881a ldrh r2, [r3, #0] 8006f44: 88fb ldrh r3, [r7, #6] 8006f46: 4413 add r3, r2 8006f48: b29a uxth r2, r3 8006f4a: 4b2a ldr r3, [pc, #168] ; (8006ff4 ) 8006f4c: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[1]; 8006f4e: 787b ldrb r3, [r7, #1] 8006f50: 80fb strh r3, [r7, #6] un_temp<<=6; 8006f52: 88fb ldrh r3, [r7, #6] 8006f54: 019b lsls r3, r3, #6 8006f56: 80fb strh r3, [r7, #6] fifo_red+=un_temp; 8006f58: 4b26 ldr r3, [pc, #152] ; (8006ff4 ) 8006f5a: 881a ldrh r2, [r3, #0] 8006f5c: 88fb ldrh r3, [r7, #6] 8006f5e: 4413 add r3, r2 8006f60: b29a uxth r2, r3 8006f62: 4b24 ldr r3, [pc, #144] ; (8006ff4 ) 8006f64: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[2]; 8006f66: 78bb ldrb r3, [r7, #2] 8006f68: 80fb strh r3, [r7, #6] un_temp>>=2; 8006f6a: 88fb ldrh r3, [r7, #6] 8006f6c: 089b lsrs r3, r3, #2 8006f6e: 80fb strh r3, [r7, #6] fifo_red+=un_temp; 8006f70: 4b20 ldr r3, [pc, #128] ; (8006ff4 ) 8006f72: 881a ldrh r2, [r3, #0] 8006f74: 88fb ldrh r3, [r7, #6] 8006f76: 4413 add r3, r2 8006f78: b29a uxth r2, r3 8006f7a: 4b1e ldr r3, [pc, #120] ; (8006ff4 ) 8006f7c: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[3]; 8006f7e: 78fb ldrb r3, [r7, #3] 8006f80: 80fb strh r3, [r7, #6] un_temp<<=14; 8006f82: 88fb ldrh r3, [r7, #6] 8006f84: 039b lsls r3, r3, #14 8006f86: 80fb strh r3, [r7, #6] fifo_ir+=un_temp; 8006f88: 4b1b ldr r3, [pc, #108] ; (8006ff8 ) 8006f8a: 881a ldrh r2, [r3, #0] 8006f8c: 88fb ldrh r3, [r7, #6] 8006f8e: 4413 add r3, r2 8006f90: b29a uxth r2, r3 8006f92: 4b19 ldr r3, [pc, #100] ; (8006ff8 ) 8006f94: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[4]; 8006f96: 793b ldrb r3, [r7, #4] 8006f98: 80fb strh r3, [r7, #6] un_temp<<=6; 8006f9a: 88fb ldrh r3, [r7, #6] 8006f9c: 019b lsls r3, r3, #6 8006f9e: 80fb strh r3, [r7, #6] fifo_ir+=un_temp; 8006fa0: 4b15 ldr r3, [pc, #84] ; (8006ff8 ) 8006fa2: 881a ldrh r2, [r3, #0] 8006fa4: 88fb ldrh r3, [r7, #6] 8006fa6: 4413 add r3, r2 8006fa8: b29a uxth r2, r3 8006faa: 4b13 ldr r3, [pc, #76] ; (8006ff8 ) 8006fac: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[5]; 8006fae: 797b ldrb r3, [r7, #5] 8006fb0: 80fb strh r3, [r7, #6] un_temp>>=2; 8006fb2: 88fb ldrh r3, [r7, #6] 8006fb4: 089b lsrs r3, r3, #2 8006fb6: 80fb strh r3, [r7, #6] fifo_ir+=un_temp; 8006fb8: 4b0f ldr r3, [pc, #60] ; (8006ff8 ) 8006fba: 881a ldrh r2, [r3, #0] 8006fbc: 88fb ldrh r3, [r7, #6] 8006fbe: 4413 add r3, r2 8006fc0: b29a uxth r2, r3 8006fc2: 4b0d ldr r3, [pc, #52] ; (8006ff8 ) 8006fc4: 801a strh r2, [r3, #0] if(fifo_ir<=10000) 8006fc6: 4b0c ldr r3, [pc, #48] ; (8006ff8 ) 8006fc8: 881b ldrh r3, [r3, #0] 8006fca: f242 7210 movw r2, #10000 ; 0x2710 8006fce: 4293 cmp r3, r2 8006fd0: d802 bhi.n 8006fd8 { fifo_ir=0; 8006fd2: 4b09 ldr r3, [pc, #36] ; (8006ff8 ) 8006fd4: 2200 movs r2, #0 8006fd6: 801a strh r2, [r3, #0] } if(fifo_red<=10000) 8006fd8: 4b06 ldr r3, [pc, #24] ; (8006ff4 ) 8006fda: 881b ldrh r3, [r3, #0] 8006fdc: f242 7210 movw r2, #10000 ; 0x2710 8006fe0: 4293 cmp r3, r2 8006fe2: d802 bhi.n 8006fea { fifo_red=0; 8006fe4: 4b03 ldr r3, [pc, #12] ; (8006ff4 ) 8006fe6: 2200 movs r2, #0 8006fe8: 801a strh r2, [r3, #0] } } 8006fea: bf00 nop 8006fec: 3708 adds r7, #8 8006fee: 46bd mov sp, r7 8006ff0: bd80 pop {r7, pc} 8006ff2: bf00 nop 8006ff4: 20002538 .word 0x20002538 8006ff8: 20000428 .word 0x20000428 08006ffc : } void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)//10us { 8006ffc: b590 push {r4, r7, lr} 8006ffe: b083 sub sp, #12 8007000: af00 add r7, sp, #0 8007002: 6078 str r0, [r7, #4] if (htim == (&htim6)) 8007004: 687b ldr r3, [r7, #4] 8007006: 4a21 ldr r2, [pc, #132] ; (800708c ) 8007008: 4293 cmp r3, r2 800700a: d13a bne.n 8007082 { max30102_read_fifo(); //read from MAX30102 FIFO2 800700c: f7ff ff76 bl 8006efc //½«Êý¾ÝдÈëfftÊäÈë²¢Çå³ýÊä³ö s1[g_fft_index].real = fifo_red; 8007010: 4b1f ldr r3, [pc, #124] ; (8007090 ) 8007012: 881b ldrh r3, [r3, #0] 8007014: 4a1f ldr r2, [pc, #124] ; (8007094 ) 8007016: 8812 ldrh r2, [r2, #0] 8007018: 4614 mov r4, r2 800701a: 4618 mov r0, r3 800701c: f7f9 fea6 bl 8000d6c <__aeabi_ui2f> 8007020: 4603 mov r3, r0 8007022: 4a1d ldr r2, [pc, #116] ; (8007098 ) 8007024: f842 3034 str.w r3, [r2, r4, lsl #3] s1[g_fft_index].imag= 0; 8007028: 4b1a ldr r3, [pc, #104] ; (8007094 ) 800702a: 881b ldrh r3, [r3, #0] 800702c: 4a1a ldr r2, [pc, #104] ; (8007098 ) 800702e: 00db lsls r3, r3, #3 8007030: 4413 add r3, r2 8007032: f04f 0200 mov.w r2, #0 8007036: 605a str r2, [r3, #4] s2[g_fft_index].real = fifo_ir; 8007038: 4b18 ldr r3, [pc, #96] ; (800709c ) 800703a: 881b ldrh r3, [r3, #0] 800703c: 4a15 ldr r2, [pc, #84] ; (8007094 ) 800703e: 8812 ldrh r2, [r2, #0] 8007040: 4614 mov r4, r2 8007042: 4618 mov r0, r3 8007044: f7f9 fe92 bl 8000d6c <__aeabi_ui2f> 8007048: 4603 mov r3, r0 800704a: 4a15 ldr r2, [pc, #84] ; (80070a0 ) 800704c: f842 3034 str.w r3, [r2, r4, lsl #3] s2[g_fft_index].imag= 0; 8007050: 4b10 ldr r3, [pc, #64] ; (8007094 ) 8007052: 881b ldrh r3, [r3, #0] 8007054: 4a12 ldr r2, [pc, #72] ; (80070a0 ) 8007056: 00db lsls r3, r3, #3 8007058: 4413 add r3, r2 800705a: f04f 0200 mov.w r2, #0 800705e: 605a str r2, [r3, #4] g_fft_index++; 8007060: 4b0c ldr r3, [pc, #48] ; (8007094 ) 8007062: 881b ldrh r3, [r3, #0] 8007064: 3301 adds r3, #1 8007066: b29a uxth r2, r3 8007068: 4b0a ldr r3, [pc, #40] ; (8007094 ) 800706a: 801a strh r2, [r3, #0] if(g_fft_index>FFT_N) 800706c: 4b09 ldr r3, [pc, #36] ; (8007094 ) 800706e: 881b ldrh r3, [r3, #0] 8007070: f5b3 7f00 cmp.w r3, #512 ; 0x200 8007074: d905 bls.n 8007082 { get_data_flag=1; 8007076: 4b0b ldr r3, [pc, #44] ; (80070a4 ) 8007078: 2201 movs r2, #1 800707a: 701a strb r2, [r3, #0] HAL_TIM_Base_Stop_IT(&htim6); 800707c: 4803 ldr r0, [pc, #12] ; (800708c ) 800707e: f7fd fa89 bl 8004594 } } } 8007082: bf00 nop 8007084: 370c adds r7, #12 8007086: 46bd mov sp, r7 8007088: bd90 pop {r4, r7, pc} 800708a: bf00 nop 800708c: 200002b0 .word 0x200002b0 8007090: 20002538 .word 0x20002538 8007094: 2000020a .word 0x2000020a 8007098: 20000430 .word 0x20000430 800709c: 20000428 .word 0x20000428 80070a0: 200014b0 .word 0x200014b0 80070a4: 20000208 .word 0x20000208 080070a8 : void main_app() { 80070a8: b580 push {r7, lr} 80070aa: b096 sub sp, #88 ; 0x58 80070ac: af04 add r7, sp, #16 char str[64]; LCDx_Init(); 80070ae: f7fe f815 bl 80050dc EPPROM_SLOWWRITE_INIT(); 80070b2: f7fe fbf5 bl 80058a0 if(HAL_GPIO_ReadPin(KEY3_GPIO_Port, KEY3_Pin)==0) 80070b6: 2104 movs r1, #4 80070b8: 4819 ldr r0, [pc, #100] ; (8007120 ) 80070ba: f7fb f82d bl 8002118 80070be: 4603 mov r3, r0 80070c0: 2b00 cmp r3, #0 80070c2: d103 bne.n 80070cc { TP_adjustment(1); 80070c4: 2001 movs r0, #1 80070c6: f7ff fb1f bl 8006708 80070ca: e002 b.n 80070d2 }else { TP_adjustment(0); 80070cc: 2000 movs r0, #0 80070ce: f7ff fb1b bl 8006708 } UI *ui=UI_Init(BLACK); 80070d2: 2000 movs r0, #0 80070d4: f000 f852 bl 800717c 80070d8: 6478 str r0, [r7, #68] ; 0x44 //APP_blood_init(New_Window(ui,10,10,128,128,WHITE,"MAX30102")); APP_IDcard_init(New_Window(ui,25,30,150,100,GREEN,"IDcard")); 80070da: 4b12 ldr r3, [pc, #72] ; (8007124 ) 80070dc: 9302 str r3, [sp, #8] 80070de: f44f 63fc mov.w r3, #2016 ; 0x7e0 80070e2: 9301 str r3, [sp, #4] 80070e4: 2364 movs r3, #100 ; 0x64 80070e6: 9300 str r3, [sp, #0] 80070e8: 2396 movs r3, #150 ; 0x96 80070ea: 221e movs r2, #30 80070ec: 2119 movs r1, #25 80070ee: 6c78 ldr r0, [r7, #68] ; 0x44 80070f0: f000 f877 bl 80071e2 80070f4: 4603 mov r3, r0 80070f6: 4618 mov r0, r3 80070f8: f7ff fde8 bl 8006ccc //New_Window(ui,80,80,60,90,YELLOW,"YELLOW"); //New_Window(ui,120,90,70,60,MAGENTA,"MAGENTA"); ui->refresh_ui_flag=1; 80070fc: 6c7a ldr r2, [r7, #68] ; 0x44 80070fe: f892 3020 ldrb.w r3, [r2, #32] 8007102: f043 0304 orr.w r3, r3, #4 8007106: f882 3020 strb.w r3, [r2, #32] */ // ½»²æ±àÒë²âÊÔ //APP_blood_loop(); APP_IDcard_loop(); 800710a: f7ff fdef bl 8006cec UI_Server(ui); 800710e: 6c78 ldr r0, [r7, #68] ; 0x44 8007110: f000 fa0e bl 8007530 TP_Server(); 8007114: f7ff fa24 bl 8006560 EEPROM_SLOWWRITE_SERVER(); 8007118: f7fe fbdc bl 80058d4 { 800711c: e7f5 b.n 800710a 800711e: bf00 nop 8007120: 40011800 .word 0x40011800 8007124: 0800a804 .word 0x0800a804 08007128 : #include "touch.h" extern touch_device t0; //½Ó¿Ú //ÉèÖÃÆÁÄ»ÏñËØ×ø±ê void Inteface_SetCursor(uint16_t Xpos, uint16_t Ypos) { 8007128: b580 push {r7, lr} 800712a: b082 sub sp, #8 800712c: af00 add r7, sp, #0 800712e: 4603 mov r3, r0 8007130: 460a mov r2, r1 8007132: 80fb strh r3, [r7, #6] 8007134: 4613 mov r3, r2 8007136: 80bb strh r3, [r7, #4] LCD_SetCursor(Xpos,Ypos); //ÉèÖùâ±êλÖà 8007138: 88ba ldrh r2, [r7, #4] 800713a: 88fb ldrh r3, [r7, #6] 800713c: 4611 mov r1, r2 800713e: 4618 mov r0, r3 8007140: f7fe f8c2 bl 80052c8 LCD_REG_ADDRESS=lcddev.wramcmd; //¿ªÊ¼Ð´ÈëGRAM 8007144: 4b04 ldr r3, [pc, #16] ; (8007158 ) 8007146: 79da ldrb r2, [r3, #7] 8007148: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000 800714c: b292 uxth r2, r2 800714e: 801a strh r2, [r3, #0] } 8007150: bf00 nop 8007152: 3708 adds r7, #8 8007154: 46bd mov sp, r7 8007156: bd80 pop {r7, pc} 8007158: 20000354 .word 0x20000354 0800715c : //ÍùÏñËØ×ø±êдÈëÒ»¸öÑÕÉ« void Inteface_SetColor(uint16_t color) { 800715c: b480 push {r7} 800715e: b083 sub sp, #12 8007160: af00 add r7, sp, #0 8007162: 4603 mov r3, r0 8007164: 80fb strh r3, [r7, #6] LCD_DATA_ADDRESS=color; 8007166: 4a04 ldr r2, [pc, #16] ; (8007178 ) 8007168: 88fb ldrh r3, [r7, #6] 800716a: 8013 strh r3, [r2, #0] } 800716c: bf00 nop 800716e: 370c adds r7, #12 8007170: 46bd mov sp, r7 8007172: bc80 pop {r7} 8007174: 4770 bx lr 8007176: bf00 nop 8007178: 6c000800 .word 0x6c000800 0800717c : //н¨Ò»¸öUI¶ÔÏó //µ±Ê±¶¼Ïë·¨ÊÇÀàËÆwindowsµÄ¶à×ÀÃ棬ÿ¸ö×ÀÃ涼ÄÜÓÐn¸ö´°¿Ú UI *UI_Init(COLOR_16 background) { 800717c: b580 push {r7, lr} 800717e: b084 sub sp, #16 8007180: af00 add r7, sp, #0 8007182: 6078 str r0, [r7, #4] UI *ui; ui = (UI*)malloc(sizeof(UI)); 8007184: 2024 movs r0, #36 ; 0x24 8007186: f000 faf7 bl 8007778 800718a: 4603 mov r3, r0 800718c: 60fb str r3, [r7, #12] if(ui!=NULL) 800718e: 68fb ldr r3, [r7, #12] 8007190: 2b00 cmp r3, #0 8007192: d021 beq.n 80071d8 { ui->x=0; 8007194: 68fb ldr r3, [r7, #12] 8007196: 2200 movs r2, #0 8007198: 809a strh r2, [r3, #4] ui->y=0; 800719a: 68fb ldr r3, [r7, #12] 800719c: 2200 movs r2, #0 800719e: 80da strh r2, [r3, #6] ui->high=240; 80071a0: 68fb ldr r3, [r7, #12] 80071a2: 22f0 movs r2, #240 ; 0xf0 80071a4: 815a strh r2, [r3, #10] ui->width=320; 80071a6: 68fb ldr r3, [r7, #12] 80071a8: f44f 72a0 mov.w r2, #320 ; 0x140 80071ac: 811a strh r2, [r3, #8] ui->background=background; 80071ae: 68fb ldr r3, [r7, #12] 80071b0: 687a ldr r2, [r7, #4] 80071b2: 601a str r2, [r3, #0] ui->windows=NULL; 80071b4: 68fb ldr r3, [r7, #12] 80071b6: 2200 movs r2, #0 80071b8: 60da str r2, [r3, #12] ui->last_windows=NULL; 80071ba: 68fb ldr r3, [r7, #12] 80071bc: 2200 movs r2, #0 80071be: 611a str r2, [r3, #16] ui->refresh_ui_flag=1; 80071c0: 68fa ldr r2, [r7, #12] 80071c2: f892 3020 ldrb.w r3, [r2, #32] 80071c6: f043 0304 orr.w r3, r3, #4 80071ca: f882 3020 strb.w r3, [r2, #32] ui->moveed_windwos=NULL; 80071ce: 68fb ldr r3, [r7, #12] 80071d0: 2200 movs r2, #0 80071d2: 615a str r2, [r3, #20] ui->touch->acc_y=0; } */ return ui; 80071d4: 68fb ldr r3, [r7, #12] 80071d6: e000 b.n 80071da } return NULL; 80071d8: 2300 movs r3, #0 } 80071da: 4618 mov r0, r3 80071dc: 3710 adds r7, #16 80071de: 46bd mov sp, r7 80071e0: bd80 pop {r7, pc} 080071e2 : //н¨Ò»¸ö´°¿Ú //·µ»Ø´°¿ÚµÄÖ¸Õë //½«´°¿Ú¹ÒÔص½Ä³¸öui window *New_Window(UI *ui,uint16_t x,uint16_t y,uint16_t width,uint16_t high,COLOR_16 background,const char *title) { 80071e2: b580 push {r7, lr} 80071e4: b088 sub sp, #32 80071e6: af00 add r7, sp, #0 80071e8: 60f8 str r0, [r7, #12] 80071ea: 4608 mov r0, r1 80071ec: 4611 mov r1, r2 80071ee: 461a mov r2, r3 80071f0: 4603 mov r3, r0 80071f2: 817b strh r3, [r7, #10] 80071f4: 460b mov r3, r1 80071f6: 813b strh r3, [r7, #8] 80071f8: 4613 mov r3, r2 80071fa: 80fb strh r3, [r7, #6] window *temp_window; temp_window = (window*)malloc(sizeof(window)); 80071fc: 201c movs r0, #28 80071fe: f000 fabb bl 8007778 8007202: 4603 mov r3, r0 8007204: 617b str r3, [r7, #20] if(temp_window!=NULL) 8007206: 697b ldr r3, [r7, #20] 8007208: 2b00 cmp r3, #0 800720a: d022 beq.n 8007252 { temp_window->background=background; 800720c: 697b ldr r3, [r7, #20] 800720e: 6afa ldr r2, [r7, #44] ; 0x2c 8007210: 609a str r2, [r3, #8] temp_window->high=high; 8007212: 697b ldr r3, [r7, #20] 8007214: 8d3a ldrh r2, [r7, #40] ; 0x28 8007216: 80da strh r2, [r3, #6] temp_window->width=width; 8007218: 697b ldr r3, [r7, #20] 800721a: 88fa ldrh r2, [r7, #6] 800721c: 809a strh r2, [r3, #4] temp_window->x=x; 800721e: 697b ldr r3, [r7, #20] 8007220: 897a ldrh r2, [r7, #10] 8007222: 801a strh r2, [r3, #0] temp_window->y=y; 8007224: 697b ldr r3, [r7, #20] 8007226: 893a ldrh r2, [r7, #8] 8007228: 805a strh r2, [r3, #2] for(int a=0;a<16;a++) 800722a: 2300 movs r3, #0 800722c: 61fb str r3, [r7, #28] 800722e: e00c b.n 800724a { temp_window->title[a]=title[a]; 8007230: 69fb ldr r3, [r7, #28] 8007232: 6b3a ldr r2, [r7, #48] ; 0x30 8007234: 4413 add r3, r2 8007236: 7819 ldrb r1, [r3, #0] 8007238: 697a ldr r2, [r7, #20] 800723a: 69fb ldr r3, [r7, #28] 800723c: 4413 add r3, r2 800723e: 330c adds r3, #12 8007240: 460a mov r2, r1 8007242: 701a strb r2, [r3, #0] for(int a=0;a<16;a++) 8007244: 69fb ldr r3, [r7, #28] 8007246: 3301 adds r3, #1 8007248: 61fb str r3, [r7, #28] 800724a: 69fb ldr r3, [r7, #28] 800724c: 2b0f cmp r3, #15 800724e: ddef ble.n 8007230 8007250: e001 b.n 8007256 } }else{return NULL;} 8007252: 2300 movs r3, #0 8007254: e02a b.n 80072ac windows_stack *temp_windows_stack; temp_windows_stack=ui->last_windows; 8007256: 68fb ldr r3, [r7, #12] 8007258: 691b ldr r3, [r3, #16] 800725a: 61bb str r3, [r7, #24] if(temp_windows_stack==NULL) 800725c: 69bb ldr r3, [r7, #24] 800725e: 2b00 cmp r3, #0 8007260: d10b bne.n 800727a { temp_windows_stack=(windows_stack*)malloc(sizeof(windows_stack)); 8007262: 200c movs r0, #12 8007264: f000 fa88 bl 8007778 8007268: 4603 mov r3, r0 800726a: 61bb str r3, [r7, #24] temp_windows_stack->up=NULL; 800726c: 69bb ldr r3, [r7, #24] 800726e: 2200 movs r2, #0 8007270: 601a str r2, [r3, #0] ui->windows=temp_windows_stack; 8007272: 68fb ldr r3, [r7, #12] 8007274: 69ba ldr r2, [r7, #24] 8007276: 60da str r2, [r3, #12] 8007278: e00e b.n 8007298 while(temp_windows_stack->next!=NULL) { temp_windows_stack=temp_windows_stack->next; } */ windows_stack *up=temp_windows_stack;//±¸·Ýµ±Ç°¶ÔÏóÖ¸Õë 800727a: 69bb ldr r3, [r7, #24] 800727c: 613b str r3, [r7, #16] temp_windows_stack->next=(windows_stack*)malloc(sizeof(windows_stack)); 800727e: 200c movs r0, #12 8007280: f000 fa7a bl 8007778 8007284: 4603 mov r3, r0 8007286: 461a mov r2, r3 8007288: 69bb ldr r3, [r7, #24] 800728a: 609a str r2, [r3, #8] temp_windows_stack=temp_windows_stack->next; 800728c: 69bb ldr r3, [r7, #24] 800728e: 689b ldr r3, [r3, #8] 8007290: 61bb str r3, [r7, #24] temp_windows_stack->up=up; 8007292: 69bb ldr r3, [r7, #24] 8007294: 693a ldr r2, [r7, #16] 8007296: 601a str r2, [r3, #0] } temp_windows_stack->next=NULL; 8007298: 69bb ldr r3, [r7, #24] 800729a: 2200 movs r2, #0 800729c: 609a str r2, [r3, #8] temp_windows_stack->window=temp_window; 800729e: 69bb ldr r3, [r7, #24] 80072a0: 697a ldr r2, [r7, #20] 80072a2: 605a str r2, [r3, #4] ui->last_windows=temp_windows_stack; 80072a4: 68fb ldr r3, [r7, #12] 80072a6: 69ba ldr r2, [r7, #24] 80072a8: 611a str r2, [r3, #16] return temp_window; 80072aa: 697b ldr r3, [r7, #20] } 80072ac: 4618 mov r0, r3 80072ae: 3720 adds r7, #32 80072b0: 46bd mov sp, r7 80072b2: bd80 pop {r7, pc} 080072b4 : temp_window->y=temp_window->y+acc_y; } //ÏÔʾһ¸ö´°¿Ú void Refresh_Window(UI *ui,window *temp_window) { 80072b4: b580 push {r7, lr} 80072b6: b088 sub sp, #32 80072b8: af02 add r7, sp, #8 80072ba: 6078 str r0, [r7, #4] 80072bc: 6039 str r1, [r7, #0] //¿ªÊ¼»æÖÆ´°¿Ú//Ìî³ä´°¿Ú±³¾° int x,y; char z; for(uint16_t temp_y=0;temp_yhigh;temp_y++) 80072be: 2300 movs r3, #0 80072c0: 82bb strh r3, [r7, #20] 80072c2: e063 b.n 800738c { z=1; 80072c4: 2301 movs r3, #1 80072c6: 75fb strb r3, [r7, #23] for(uint16_t temp_i=0;temp_iwidth;temp_i++) 80072c8: 2300 movs r3, #0 80072ca: 827b strh r3, [r7, #18] 80072cc: e056 b.n 800737c { x=temp_window->x+temp_i; 80072ce: 683b ldr r3, [r7, #0] 80072d0: 881b ldrh r3, [r3, #0] 80072d2: 461a mov r2, r3 80072d4: 8a7b ldrh r3, [r7, #18] 80072d6: 4413 add r3, r2 80072d8: 60fb str r3, [r7, #12] y=temp_window->y+temp_y; 80072da: 683b ldr r3, [r7, #0] 80072dc: 885b ldrh r3, [r3, #2] 80072de: 461a mov r2, r3 80072e0: 8abb ldrh r3, [r7, #20] 80072e2: 4413 add r3, r2 80072e4: 60bb str r3, [r7, #8] if(y>=ui->y&&z==1) 80072e6: 687b ldr r3, [r7, #4] 80072e8: 88db ldrh r3, [r3, #6] 80072ea: 461a mov r2, r3 80072ec: 68bb ldr r3, [r7, #8] 80072ee: 4293 cmp r3, r2 80072f0: db0c blt.n 800730c 80072f2: 7dfb ldrb r3, [r7, #23] 80072f4: 2b01 cmp r3, #1 80072f6: d109 bne.n 800730c { Inteface_SetCursor(x,y); 80072f8: 68fb ldr r3, [r7, #12] 80072fa: b29b uxth r3, r3 80072fc: 68ba ldr r2, [r7, #8] 80072fe: b292 uxth r2, r2 8007300: 4611 mov r1, r2 8007302: 4618 mov r0, r3 8007304: f7ff ff10 bl 8007128 z=0; 8007308: 2300 movs r3, #0 800730a: 75fb strb r3, [r7, #23] } if(x>=ui->x) 800730c: 687b ldr r3, [r7, #4] 800730e: 889b ldrh r3, [r3, #4] 8007310: 461a mov r2, r3 8007312: 68fb ldr r3, [r7, #12] 8007314: 4293 cmp r3, r2 8007316: db2e blt.n 8007376 { if(temp_y<16) 8007318: 8abb ldrh r3, [r7, #20] 800731a: 2b0f cmp r3, #15 800731c: d80f bhi.n 800733e { if(temp_i>temp_window->width-16) 800731e: 683b ldr r3, [r7, #0] 8007320: 889b ldrh r3, [r3, #4] 8007322: f1a3 020f sub.w r2, r3, #15 8007326: 8a7b ldrh r3, [r7, #18] 8007328: 429a cmp r2, r3 800732a: dc04 bgt.n 8007336 { Inteface_SetColor(RED); 800732c: f44f 4078 mov.w r0, #63488 ; 0xf800 8007330: f7ff ff14 bl 800715c 8007334: e01f b.n 8007376 }else { Inteface_SetColor(BLUE); 8007336: 201f movs r0, #31 8007338: f7ff ff10 bl 800715c 800733c: e01b b.n 8007376 } }else { if(temp_i==0||temp_y==0||temp_i==temp_window->width-1||temp_y==temp_window->high-1) 800733e: 8a7b ldrh r3, [r7, #18] 8007340: 2b00 cmp r3, #0 8007342: d00e beq.n 8007362 8007344: 8abb ldrh r3, [r7, #20] 8007346: 2b00 cmp r3, #0 8007348: d00b beq.n 8007362 800734a: 8a7a ldrh r2, [r7, #18] 800734c: 683b ldr r3, [r7, #0] 800734e: 889b ldrh r3, [r3, #4] 8007350: 3b01 subs r3, #1 8007352: 429a cmp r2, r3 8007354: d005 beq.n 8007362 8007356: 8aba ldrh r2, [r7, #20] 8007358: 683b ldr r3, [r7, #0] 800735a: 88db ldrh r3, [r3, #6] 800735c: 3b01 subs r3, #1 800735e: 429a cmp r2, r3 8007360: d103 bne.n 800736a { Inteface_SetColor(BLUE); 8007362: 201f movs r0, #31 8007364: f7ff fefa bl 800715c 8007368: e005 b.n 8007376 }else { Inteface_SetColor(temp_window->background); 800736a: 683b ldr r3, [r7, #0] 800736c: 689b ldr r3, [r3, #8] 800736e: b29b uxth r3, r3 8007370: 4618 mov r0, r3 8007372: f7ff fef3 bl 800715c for(uint16_t temp_i=0;temp_iwidth;temp_i++) 8007376: 8a7b ldrh r3, [r7, #18] 8007378: 3301 adds r3, #1 800737a: 827b strh r3, [r7, #18] 800737c: 683b ldr r3, [r7, #0] 800737e: 889b ldrh r3, [r3, #4] 8007380: 8a7a ldrh r2, [r7, #18] 8007382: 429a cmp r2, r3 8007384: d3a3 bcc.n 80072ce for(uint16_t temp_y=0;temp_yhigh;temp_y++) 8007386: 8abb ldrh r3, [r7, #20] 8007388: 3301 adds r3, #1 800738a: 82bb strh r3, [r7, #20] 800738c: 683b ldr r3, [r7, #0] 800738e: 88db ldrh r3, [r3, #6] 8007390: 8aba ldrh r2, [r7, #20] 8007392: 429a cmp r2, r3 8007394: d396 bcc.n 80072c4 } } */ //ÏÔʾtitle LCD_ShowString(temp_window->x,temp_window->y,&temp_window->title,16,WHITE,WHITE); 8007396: 683b ldr r3, [r7, #0] 8007398: 8818 ldrh r0, [r3, #0] 800739a: 683b ldr r3, [r7, #0] 800739c: 8859 ldrh r1, [r3, #2] 800739e: 683b ldr r3, [r7, #0] 80073a0: f103 020c add.w r2, r3, #12 80073a4: f64f 73ff movw r3, #65535 ; 0xffff 80073a8: 9301 str r3, [sp, #4] 80073aa: f64f 73ff movw r3, #65535 ; 0xffff 80073ae: 9300 str r3, [sp, #0] 80073b0: 2310 movs r3, #16 80073b2: f7fe fa37 bl 8005824 } 80073b6: bf00 nop 80073b8: 3718 adds r7, #24 80073ba: 46bd mov sp, r7 80073bc: bd80 pop {r7, pc} 080073be : * ºÜ¿Éϧ ÐÁÐÁ¿à¿àдµÄ´úÂëÒª±»·ÅÆú * ÓÃË㷨ʵÏÖÕÚµ²¹Øϵ¼ÆËãÕæͦ´À * * */ void Refresh_UI(UI *ui) { 80073be: b580 push {r7, lr} 80073c0: b086 sub sp, #24 80073c2: af00 add r7, sp, #0 80073c4: 6078 str r0, [r7, #4] int flag=0; 80073c6: 2300 movs r3, #0 80073c8: 617b str r3, [r7, #20] uint16_t dot_y=0,dot_x=0; 80073ca: 2300 movs r3, #0 80073cc: 827b strh r3, [r7, #18] 80073ce: 2300 movs r3, #0 80073d0: 823b strh r3, [r7, #16] //»­±³¾° for(dot_y=ui->y;dot_yhigh;dot_y++) 80073d2: 687b ldr r3, [r7, #4] 80073d4: 88db ldrh r3, [r3, #6] 80073d6: 827b strh r3, [r7, #18] 80073d8: e01a b.n 8007410 { Inteface_SetCursor(dot_x,dot_y); 80073da: 8a7a ldrh r2, [r7, #18] 80073dc: 8a3b ldrh r3, [r7, #16] 80073de: 4611 mov r1, r2 80073e0: 4618 mov r0, r3 80073e2: f7ff fea1 bl 8007128 for(dot_x=ui->x;dot_xwidth;dot_x++) 80073e6: 687b ldr r3, [r7, #4] 80073e8: 889b ldrh r3, [r3, #4] 80073ea: 823b strh r3, [r7, #16] 80073ec: e008 b.n 8007400 { Inteface_SetColor(ui->background); 80073ee: 687b ldr r3, [r7, #4] 80073f0: 681b ldr r3, [r3, #0] 80073f2: b29b uxth r3, r3 80073f4: 4618 mov r0, r3 80073f6: f7ff feb1 bl 800715c for(dot_x=ui->x;dot_xwidth;dot_x++) 80073fa: 8a3b ldrh r3, [r7, #16] 80073fc: 3301 adds r3, #1 80073fe: 823b strh r3, [r7, #16] 8007400: 687b ldr r3, [r7, #4] 8007402: 891b ldrh r3, [r3, #8] 8007404: 8a3a ldrh r2, [r7, #16] 8007406: 429a cmp r2, r3 8007408: d3f1 bcc.n 80073ee for(dot_y=ui->y;dot_yhigh;dot_y++) 800740a: 8a7b ldrh r3, [r7, #18] 800740c: 3301 adds r3, #1 800740e: 827b strh r3, [r7, #18] 8007410: 687b ldr r3, [r7, #4] 8007412: 895b ldrh r3, [r3, #10] 8007414: 8a7a ldrh r2, [r7, #18] 8007416: 429a cmp r2, r3 8007418: d3df bcc.n 80073da } } windows_stack *temp_windows_stack,*temp_windows_stack2; temp_windows_stack=ui->windows; 800741a: 687b ldr r3, [r7, #4] 800741c: 68db ldr r3, [r3, #12] 800741e: 60fb str r3, [r7, #12] do { if(temp_windows_stack!=NULL) 8007420: 68fb ldr r3, [r7, #12] 8007422: 2b00 cmp r3, #0 8007424: d00b beq.n 800743e { flag=1; 8007426: 2301 movs r3, #1 8007428: 617b str r3, [r7, #20] Refresh_Window(ui,temp_windows_stack->window); 800742a: 68fb ldr r3, [r7, #12] 800742c: 685b ldr r3, [r3, #4] 800742e: 4619 mov r1, r3 8007430: 6878 ldr r0, [r7, #4] 8007432: f7ff ff3f bl 80072b4 //»æÖÆÏÂÒ»¸ö´°¿Ú temp_windows_stack=temp_windows_stack->next; 8007436: 68fb ldr r3, [r7, #12] 8007438: 689b ldr r3, [r3, #8] 800743a: 60fb str r3, [r7, #12] 800743c: e001 b.n 8007442 }else { flag=0; 800743e: 2300 movs r3, #0 8007440: 617b str r3, [r7, #20] } }while(flag); 8007442: 697b ldr r3, [r7, #20] 8007444: 2b00 cmp r3, #0 8007446: d1eb bne.n 8007420 } } */ } 8007448: bf00 nop 800744a: bf00 nop 800744c: 3718 adds r7, #24 800744e: 46bd mov sp, r7 8007450: bd80 pop {r7, pc} 08007452 : #define BODY 1 #define BAR 2 #define CLOSE 3 uint8_t Chack(window *this_window,int x,int y) { 8007452: b480 push {r7} 8007454: b087 sub sp, #28 8007456: af00 add r7, sp, #0 8007458: 60f8 str r0, [r7, #12] 800745a: 60b9 str r1, [r7, #8] 800745c: 607a str r2, [r7, #4] int a=0; 800745e: 2300 movs r3, #0 8007460: 617b str r3, [r7, #20] if(((x>=this_window->x)&&(x<(this_window->x+this_window->width)))&&((y>=this_window->y+16)&&(y<(this_window->y+this_window->high)))) 8007462: 68fb ldr r3, [r7, #12] 8007464: 881b ldrh r3, [r3, #0] 8007466: 461a mov r2, r3 8007468: 68bb ldr r3, [r7, #8] 800746a: 4293 cmp r3, r2 800746c: db19 blt.n 80074a2 800746e: 68fb ldr r3, [r7, #12] 8007470: 881b ldrh r3, [r3, #0] 8007472: 461a mov r2, r3 8007474: 68fb ldr r3, [r7, #12] 8007476: 889b ldrh r3, [r3, #4] 8007478: 4413 add r3, r2 800747a: 68ba ldr r2, [r7, #8] 800747c: 429a cmp r2, r3 800747e: da10 bge.n 80074a2 8007480: 68fb ldr r3, [r7, #12] 8007482: 885b ldrh r3, [r3, #2] 8007484: 330f adds r3, #15 8007486: 687a ldr r2, [r7, #4] 8007488: 429a cmp r2, r3 800748a: dd0a ble.n 80074a2 800748c: 68fb ldr r3, [r7, #12] 800748e: 885b ldrh r3, [r3, #2] 8007490: 461a mov r2, r3 8007492: 68fb ldr r3, [r7, #12] 8007494: 88db ldrh r3, [r3, #6] 8007496: 4413 add r3, r2 8007498: 687a ldr r2, [r7, #4] 800749a: 429a cmp r2, r3 800749c: da01 bge.n 80074a2 { a=1; 800749e: 2301 movs r3, #1 80074a0: 617b str r3, [r7, #20] } if(((x>=this_window->x)&&(x<(this_window->x+this_window->width-16)))&&((y>=this_window->y)&&(y<(this_window->y+16)))) 80074a2: 68fb ldr r3, [r7, #12] 80074a4: 881b ldrh r3, [r3, #0] 80074a6: 461a mov r2, r3 80074a8: 68bb ldr r3, [r7, #8] 80074aa: 4293 cmp r3, r2 80074ac: db17 blt.n 80074de 80074ae: 68fb ldr r3, [r7, #12] 80074b0: 881b ldrh r3, [r3, #0] 80074b2: 461a mov r2, r3 80074b4: 68fb ldr r3, [r7, #12] 80074b6: 889b ldrh r3, [r3, #4] 80074b8: 4413 add r3, r2 80074ba: 3b10 subs r3, #16 80074bc: 68ba ldr r2, [r7, #8] 80074be: 429a cmp r2, r3 80074c0: da0d bge.n 80074de 80074c2: 68fb ldr r3, [r7, #12] 80074c4: 885b ldrh r3, [r3, #2] 80074c6: 461a mov r2, r3 80074c8: 687b ldr r3, [r7, #4] 80074ca: 4293 cmp r3, r2 80074cc: db07 blt.n 80074de 80074ce: 68fb ldr r3, [r7, #12] 80074d0: 885b ldrh r3, [r3, #2] 80074d2: 330f adds r3, #15 80074d4: 687a ldr r2, [r7, #4] 80074d6: 429a cmp r2, r3 80074d8: dc01 bgt.n 80074de { a=2; 80074da: 2302 movs r3, #2 80074dc: 617b str r3, [r7, #20] } if((x>=(this_window->x+this_window->width-16))&&(x<(this_window->x+this_window->width))&&((y>=this_window->y)&&(y<(this_window->y+16)))) 80074de: 68fb ldr r3, [r7, #12] 80074e0: 881b ldrh r3, [r3, #0] 80074e2: 461a mov r2, r3 80074e4: 68fb ldr r3, [r7, #12] 80074e6: 889b ldrh r3, [r3, #4] 80074e8: 4413 add r3, r2 80074ea: 3b10 subs r3, #16 80074ec: 68ba ldr r2, [r7, #8] 80074ee: 429a cmp r2, r3 80074f0: db16 blt.n 8007520 80074f2: 68fb ldr r3, [r7, #12] 80074f4: 881b ldrh r3, [r3, #0] 80074f6: 461a mov r2, r3 80074f8: 68fb ldr r3, [r7, #12] 80074fa: 889b ldrh r3, [r3, #4] 80074fc: 4413 add r3, r2 80074fe: 68ba ldr r2, [r7, #8] 8007500: 429a cmp r2, r3 8007502: da0d bge.n 8007520 8007504: 68fb ldr r3, [r7, #12] 8007506: 885b ldrh r3, [r3, #2] 8007508: 461a mov r2, r3 800750a: 687b ldr r3, [r7, #4] 800750c: 4293 cmp r3, r2 800750e: db07 blt.n 8007520 8007510: 68fb ldr r3, [r7, #12] 8007512: 885b ldrh r3, [r3, #2] 8007514: 330f adds r3, #15 8007516: 687a ldr r2, [r7, #4] 8007518: 429a cmp r2, r3 800751a: dc01 bgt.n 8007520 { a=3; 800751c: 2303 movs r3, #3 800751e: 617b str r3, [r7, #20] } return a; 8007520: 697b ldr r3, [r7, #20] 8007522: b2db uxtb r3, r3 } 8007524: 4618 mov r0, r3 8007526: 371c adds r7, #28 8007528: 46bd mov sp, r7 800752a: bc80 pop {r7} 800752c: 4770 bx lr ... 08007530 : void UI_Server(UI *ui) { 8007530: b580 push {r7, lr} 8007532: b088 sub sp, #32 8007534: af00 add r7, sp, #0 8007536: 6078 str r0, [r7, #4] windows_stack *temp_windows_stack=NULL; 8007538: 2300 movs r3, #0 800753a: 61fb str r3, [r7, #28] window *temp_window; //touch_device *temp_touch=NULL; int flag=0; 800753c: 2300 movs r3, #0 800753e: 61bb str r3, [r7, #24] uint8_t hit_flag=0; 8007540: 2300 movs r3, #0 8007542: 75fb strb r3, [r7, #23] int t_x,t_y; //touch //temp_touch=ui->touch; if(t0.c)//TP_XY(&t_x, &t_y)) 8007544: 4b76 ldr r3, [pc, #472] ; (8007720 ) 8007546: 7b1b ldrb r3, [r3, #12] 8007548: f003 0302 and.w r3, r3, #2 800754c: b2db uxtb r3, r3 800754e: 2b00 cmp r3, #0 8007550: f000 80ba beq.w 80076c8 { if(t0.d) 8007554: 4b72 ldr r3, [pc, #456] ; (8007720 ) 8007556: 7b1b ldrb r3, [r3, #12] 8007558: f003 0304 and.w r3, r3, #4 800755c: b2db uxtb r3, r3 800755e: 2b00 cmp r3, #0 8007560: f000 80c8 beq.w 80076f4 { t_x=t0.pix_x; 8007564: 4b6e ldr r3, [pc, #440] ; (8007720 ) 8007566: 685b ldr r3, [r3, #4] 8007568: 613b str r3, [r7, #16] t_y=t0.pix_y; 800756a: 4b6d ldr r3, [pc, #436] ; (8007720 ) 800756c: 689b ldr r3, [r3, #8] 800756e: 60fb str r3, [r7, #12] temp_window=NULL; 8007570: 2300 movs r3, #0 8007572: 60bb str r3, [r7, #8] if(ui->moveed_windwos==NULL) 8007574: 687b ldr r3, [r7, #4] 8007576: 695b ldr r3, [r3, #20] 8007578: 2b00 cmp r3, #0 800757a: f040 8088 bne.w 800768e { if(ui->First_click_flag==0) 800757e: 687b ldr r3, [r7, #4] 8007580: f893 3020 ldrb.w r3, [r3, #32] 8007584: f003 0302 and.w r3, r3, #2 8007588: b2db uxtb r3, r3 800758a: 2b00 cmp r3, #0 800758c: f040 80b2 bne.w 80076f4 { ui->First_click_flag=1; 8007590: 687a ldr r2, [r7, #4] 8007592: f892 3020 ldrb.w r3, [r2, #32] 8007596: f043 0302 orr.w r3, r3, #2 800759a: f882 3020 strb.w r3, [r2, #32] temp_windows_stack=ui->last_windows; //»ñÈ¡uiÖÐ×îÇ°¶ËµÄ´°¿Ú ´ÓÇ°ÍùºóɨÃè 800759e: 687b ldr r3, [r7, #4] 80075a0: 691b ldr r3, [r3, #16] 80075a2: 61fb str r3, [r7, #28] do { if(temp_windows_stack!=NULL) //Èç¹ûÓд°¿Ú¾Í¿ªÊ¼É¨Ãè 80075a4: 69fb ldr r3, [r7, #28] 80075a6: 2b00 cmp r3, #0 80075a8: d06b beq.n 8007682 { flag=1; //¼ì²éµ½Óд°¿Ú ÐèҪѭ»·Ò»´ÎÒÔ¼ì²éÊÇ·ñÓÐÏÂÒ»¸ö´°¿Ú 80075aa: 2301 movs r3, #1 80075ac: 61bb str r3, [r7, #24] // temp_window=temp_windows_stack->window; //È¡³öÕâ¸ö´°¿Ú 80075ae: 69fb ldr r3, [r7, #28] 80075b0: 685b ldr r3, [r3, #4] 80075b2: 60bb str r3, [r7, #8] hit_flag=Chack(temp_window,t_x,t_y); //¼ì²é´¥ÃþÊÇ·ñÃüÖÐ Ö±½Ó·µ»ØÃüÖд°¿ÚµÄλÖà 80075b4: 68fa ldr r2, [r7, #12] 80075b6: 6939 ldr r1, [r7, #16] 80075b8: 68b8 ldr r0, [r7, #8] 80075ba: f7ff ff4a bl 8007452 80075be: 4603 mov r3, r0 80075c0: 75fb strb r3, [r7, #23] if(hit_flag) // ÃüÖмÌÐø 80075c2: 7dfb ldrb r3, [r7, #23] 80075c4: 2b00 cmp r3, #0 80075c6: d058 beq.n 800767a { if(temp_windows_stack!=ui->last_windows) //¼ì²éÊÇ·ñ×îÇ°¶ËµÄ´°¿Ú Èç¹û²»ÊǾͷÅ×îÇ°Ãæ 80075c8: 687b ldr r3, [r7, #4] 80075ca: 691b ldr r3, [r3, #16] 80075cc: 69fa ldr r2, [r7, #28] 80075ce: 429a cmp r2, r3 80075d0: d02c beq.n 800762c { if(temp_windows_stack!=ui->windows) //¼ì²éÊÇ·ñ×îºó¶ËµÄ´°¿Ú ÒòΪÏÔʾÊÇ´Ó×îºó¶ËÍùÇ°ÏÔʾµÄ ËùÒÔuiÓÐ×îºó¶Ë´°¿ÚµÄÈë¿Ú 80075d2: 687b ldr r3, [r7, #4] 80075d4: 68db ldr r3, [r3, #12] 80075d6: 69fa ldr r2, [r7, #28] 80075d8: 429a cmp r2, r3 80075da: d00a beq.n 80075f2 { temp_windows_stack->up->next=temp_windows_stack->next; //È¡³öÕâ¸ö½Úµã °Ñ½ÚµãµÄÉÏϲ¹ÉÏÁ´½Ó 80075dc: 69fb ldr r3, [r7, #28] 80075de: 681b ldr r3, [r3, #0] 80075e0: 69fa ldr r2, [r7, #28] 80075e2: 6892 ldr r2, [r2, #8] 80075e4: 609a str r2, [r3, #8] temp_windows_stack->next->up=temp_windows_stack->up; 80075e6: 69fb ldr r3, [r7, #28] 80075e8: 689b ldr r3, [r3, #8] 80075ea: 69fa ldr r2, [r7, #28] 80075ec: 6812 ldr r2, [r2, #0] 80075ee: 601a str r2, [r3, #0] 80075f0: e007 b.n 8007602 }else { ui->windows=temp_windows_stack->next; //Èç¹ûÊÇ×îºó¶ËµÄ´°¿Ú ÔòÈ¡³öÕâ¸ö½ÚµãºóÈë¿Ú¾Í±äÏÂÒ»¸ö½ÚµãÁË 80075f2: 69fb ldr r3, [r7, #28] 80075f4: 689a ldr r2, [r3, #8] 80075f6: 687b ldr r3, [r7, #4] 80075f8: 60da str r2, [r3, #12] ui->windows->up=NULL; //µ¹ÊýµÚ¶þ±ä×îºó¶Ë ÔÚ×ß¾ÍûÁË ËùÒÔÒªÇå¿ÕÖ¸Õë 80075fa: 687b ldr r3, [r7, #4] 80075fc: 68db ldr r3, [r3, #12] 80075fe: 2200 movs r2, #0 8007600: 601a str r2, [r3, #0] } temp_windows_stack->next=NULL; //È¡³öµÄ½ÚµãÒª·ÅÔÚ×îÇ°¶Ë ËùÒÔ ÎÞ·¨ÔÙÍùÇ° Çå¿ÕÍùÇ°µÄÖ¸Õë 8007602: 69fb ldr r3, [r7, #28] 8007604: 2200 movs r2, #0 8007606: 609a str r2, [r3, #8] temp_windows_stack->up=ui->last_windows; //ÉÏÒ»¸öÖ¸Õë¾ÍÊÇÔ­À´µÄ×îºóÒ»¸ö 8007608: 687b ldr r3, [r7, #4] 800760a: 691a ldr r2, [r3, #16] 800760c: 69fb ldr r3, [r7, #28] 800760e: 601a str r2, [r3, #0] ui->last_windows->next=temp_windows_stack; //Ô­À´µÄ×îºóÒ»¸öÖ¸ÏòÏÖÔÚµÄ×îºóÒ»¸ö 8007610: 687b ldr r3, [r7, #4] 8007612: 691b ldr r3, [r3, #16] 8007614: 69fa ldr r2, [r7, #28] 8007616: 609a str r2, [r3, #8] ui->last_windows=temp_windows_stack; //¸üÐÂuiÖеÄ×îºóÒ»¸öµÄÈë¿Ú 8007618: 687b ldr r3, [r7, #4] 800761a: 69fa ldr r2, [r7, #28] 800761c: 611a str r2, [r3, #16] ui->refresh_ui_flag=1; //·¢ÉúÁ˱仯 Ë¢ÐÂuiµÄÏÔʾ 800761e: 687a ldr r2, [r7, #4] 8007620: f892 3020 ldrb.w r3, [r2, #32] 8007624: f043 0304 orr.w r3, r3, #4 8007628: f882 3020 strb.w r3, [r2, #32] } //¼ì²é±êÖд°¿ÚµÄʲôλÖà switch(hit_flag) 800762c: 7dfb ldrb r3, [r7, #23] 800762e: 2b03 cmp r3, #3 8007630: d006 beq.n 8007640 8007632: 2b03 cmp r3, #3 8007634: dc1f bgt.n 8007676 8007636: 2b01 cmp r3, #1 8007638: d01c beq.n 8007674 800763a: 2b02 cmp r3, #2 800763c: d008 beq.n 8007650 800763e: e01a b.n 8007676 { case CLOSE: //Close_Windows_Stack(ui,temp_windows_stack); ui->refresh_ui_flag=1; //·¢ÉúÁ˱仯 Ë¢ÐÂuiµÄÏÔʾ 8007640: 687a ldr r2, [r7, #4] 8007642: f892 3020 ldrb.w r3, [r2, #32] 8007646: f043 0304 orr.w r3, r3, #4 800764a: f882 3020 strb.w r3, [r2, #32] break; 800764e: e012 b.n 8007676 case BAR: ui->moveed_windwos=temp_window; 8007650: 687b ldr r3, [r7, #4] 8007652: 68ba ldr r2, [r7, #8] 8007654: 615a str r2, [r3, #20] ui->move_x=t_x-temp_window->x; 8007656: 68bb ldr r3, [r7, #8] 8007658: 881b ldrh r3, [r3, #0] 800765a: 461a mov r2, r3 800765c: 693b ldr r3, [r7, #16] 800765e: 1a9a subs r2, r3, r2 8007660: 687b ldr r3, [r7, #4] 8007662: 619a str r2, [r3, #24] ui->move_y=t_y-temp_window->y; 8007664: 68bb ldr r3, [r7, #8] 8007666: 885b ldrh r3, [r3, #2] 8007668: 461a mov r2, r3 800766a: 68fb ldr r3, [r7, #12] 800766c: 1a9a subs r2, r3, r2 800766e: 687b ldr r3, [r7, #4] 8007670: 61da str r2, [r3, #28] break; 8007672: e000 b.n 8007676 case BODY: //ui->background=temp_windows_stack->window->background; //ui->refresh_ui_flag=1; break; 8007674: bf00 nop } flag=0; //½áÊøɨÃè ·ÀÖ¹´©Í¸µ±Ç°´°¿Ú 8007676: 2300 movs r3, #0 8007678: 61bb str r3, [r7, #24] } temp_windows_stack=temp_windows_stack->up; //ÍùǰɨÃè 800767a: 69fb ldr r3, [r7, #28] 800767c: 681b ldr r3, [r3, #0] 800767e: 61fb str r3, [r7, #28] 8007680: e001 b.n 8007686 }else { flag=0; //Ò»¸ö´°¿Ú¶¼Ã»ÓÐ Ö±½Ó½áÊøÑ­»· 8007682: 2300 movs r3, #0 8007684: 61bb str r3, [r7, #24] } }while(flag); 8007686: 69bb ldr r3, [r7, #24] 8007688: 2b00 cmp r3, #0 800768a: d18b bne.n 80075a4 800768c: e032 b.n 80076f4 } }else { temp_window=ui->moveed_windwos; 800768e: 687b ldr r3, [r7, #4] 8007690: 695b ldr r3, [r3, #20] 8007692: 60bb str r3, [r7, #8] temp_window->x=t_x-ui->move_x; 8007694: 693b ldr r3, [r7, #16] 8007696: b29a uxth r2, r3 8007698: 687b ldr r3, [r7, #4] 800769a: 699b ldr r3, [r3, #24] 800769c: b29b uxth r3, r3 800769e: 1ad3 subs r3, r2, r3 80076a0: b29a uxth r2, r3 80076a2: 68bb ldr r3, [r7, #8] 80076a4: 801a strh r2, [r3, #0] temp_window->y=t_y-ui->move_y; 80076a6: 68fb ldr r3, [r7, #12] 80076a8: b29a uxth r2, r3 80076aa: 687b ldr r3, [r7, #4] 80076ac: 69db ldr r3, [r3, #28] 80076ae: b29b uxth r3, r3 80076b0: 1ad3 subs r3, r2, r3 80076b2: b29a uxth r2, r3 80076b4: 68bb ldr r3, [r7, #8] 80076b6: 805a strh r2, [r3, #2] ui->refresh_ui_flag=1; 80076b8: 687a ldr r2, [r7, #4] 80076ba: f892 3020 ldrb.w r3, [r2, #32] 80076be: f043 0304 orr.w r3, r3, #4 80076c2: f882 3020 strb.w r3, [r2, #32] 80076c6: e015 b.n 80076f4 }else { if(ui->First_click_flag==1) 80076c8: 687b ldr r3, [r7, #4] 80076ca: f893 3020 ldrb.w r3, [r3, #32] 80076ce: f003 0302 and.w r3, r3, #2 80076d2: b2db uxtb r3, r3 80076d4: 2b00 cmp r3, #0 80076d6: d006 beq.n 80076e6 { ui->First_click_flag=0; 80076d8: 687a ldr r2, [r7, #4] 80076da: f892 3020 ldrb.w r3, [r2, #32] 80076de: f36f 0341 bfc r3, #1, #1 80076e2: f882 3020 strb.w r3, [r2, #32] } if(ui->moveed_windwos!=NULL) 80076e6: 687b ldr r3, [r7, #4] 80076e8: 695b ldr r3, [r3, #20] 80076ea: 2b00 cmp r3, #0 80076ec: d002 beq.n 80076f4 { ui->moveed_windwos=NULL; 80076ee: 687b ldr r3, [r7, #4] 80076f0: 2200 movs r2, #0 80076f2: 615a str r2, [r3, #20] } } //display if(ui->refresh_ui_flag==1) 80076f4: 687b ldr r3, [r7, #4] 80076f6: f893 3020 ldrb.w r3, [r3, #32] 80076fa: f003 0304 and.w r3, r3, #4 80076fe: b2db uxtb r3, r3 8007700: 2b00 cmp r3, #0 8007702: d009 beq.n 8007718 { ui->refresh_ui_flag=0; 8007704: 687a ldr r2, [r7, #4] 8007706: f892 3020 ldrb.w r3, [r2, #32] 800770a: f36f 0382 bfc r3, #2, #1 800770e: f882 3020 strb.w r3, [r2, #32] Refresh_UI(ui); 8007712: 6878 ldr r0, [r7, #4] 8007714: f7ff fe53 bl 80073be } } 8007718: bf00 nop 800771a: 3720 adds r7, #32 800771c: 46bd mov sp, r7 800771e: bd80 pop {r7, pc} 8007720: 2000038c .word 0x2000038c 08007724 <__errno>: 8007724: 4b01 ldr r3, [pc, #4] ; (800772c <__errno+0x8>) 8007726: 6818 ldr r0, [r3, #0] 8007728: 4770 bx lr 800772a: bf00 nop 800772c: 20000014 .word 0x20000014 08007730 <__libc_init_array>: 8007730: b570 push {r4, r5, r6, lr} 8007732: 2600 movs r6, #0 8007734: 4d0c ldr r5, [pc, #48] ; (8007768 <__libc_init_array+0x38>) 8007736: 4c0d ldr r4, [pc, #52] ; (800776c <__libc_init_array+0x3c>) 8007738: 1b64 subs r4, r4, r5 800773a: 10a4 asrs r4, r4, #2 800773c: 42a6 cmp r6, r4 800773e: d109 bne.n 8007754 <__libc_init_array+0x24> 8007740: f002 ffae bl 800a6a0 <_init> 8007744: 2600 movs r6, #0 8007746: 4d0a ldr r5, [pc, #40] ; (8007770 <__libc_init_array+0x40>) 8007748: 4c0a ldr r4, [pc, #40] ; (8007774 <__libc_init_array+0x44>) 800774a: 1b64 subs r4, r4, r5 800774c: 10a4 asrs r4, r4, #2 800774e: 42a6 cmp r6, r4 8007750: d105 bne.n 800775e <__libc_init_array+0x2e> 8007752: bd70 pop {r4, r5, r6, pc} 8007754: f855 3b04 ldr.w r3, [r5], #4 8007758: 4798 blx r3 800775a: 3601 adds r6, #1 800775c: e7ee b.n 800773c <__libc_init_array+0xc> 800775e: f855 3b04 ldr.w r3, [r5], #4 8007762: 4798 blx r3 8007764: 3601 adds r6, #1 8007766: e7f2 b.n 800774e <__libc_init_array+0x1e> 8007768: 0800b66c .word 0x0800b66c 800776c: 0800b66c .word 0x0800b66c 8007770: 0800b66c .word 0x0800b66c 8007774: 0800b670 .word 0x0800b670 08007778 : 8007778: 4b02 ldr r3, [pc, #8] ; (8007784 ) 800777a: 4601 mov r1, r0 800777c: 6818 ldr r0, [r3, #0] 800777e: f000 b85f b.w 8007840 <_malloc_r> 8007782: bf00 nop 8007784: 20000014 .word 0x20000014 08007788 : 8007788: 4b02 ldr r3, [pc, #8] ; (8007794 ) 800778a: 4601 mov r1, r0 800778c: 6818 ldr r0, [r3, #0] 800778e: f000 b80b b.w 80077a8 <_free_r> 8007792: bf00 nop 8007794: 20000014 .word 0x20000014 08007798 : 8007798: 4603 mov r3, r0 800779a: 4402 add r2, r0 800779c: 4293 cmp r3, r2 800779e: d100 bne.n 80077a2 80077a0: 4770 bx lr 80077a2: f803 1b01 strb.w r1, [r3], #1 80077a6: e7f9 b.n 800779c 080077a8 <_free_r>: 80077a8: b538 push {r3, r4, r5, lr} 80077aa: 4605 mov r5, r0 80077ac: 2900 cmp r1, #0 80077ae: d043 beq.n 8007838 <_free_r+0x90> 80077b0: f851 3c04 ldr.w r3, [r1, #-4] 80077b4: 1f0c subs r4, r1, #4 80077b6: 2b00 cmp r3, #0 80077b8: bfb8 it lt 80077ba: 18e4 addlt r4, r4, r3 80077bc: f001 ff4a bl 8009654 <__malloc_lock> 80077c0: 4a1e ldr r2, [pc, #120] ; (800783c <_free_r+0x94>) 80077c2: 6813 ldr r3, [r2, #0] 80077c4: 4610 mov r0, r2 80077c6: b933 cbnz r3, 80077d6 <_free_r+0x2e> 80077c8: 6063 str r3, [r4, #4] 80077ca: 6014 str r4, [r2, #0] 80077cc: 4628 mov r0, r5 80077ce: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80077d2: f001 bf45 b.w 8009660 <__malloc_unlock> 80077d6: 42a3 cmp r3, r4 80077d8: d90a bls.n 80077f0 <_free_r+0x48> 80077da: 6821 ldr r1, [r4, #0] 80077dc: 1862 adds r2, r4, r1 80077de: 4293 cmp r3, r2 80077e0: bf01 itttt eq 80077e2: 681a ldreq r2, [r3, #0] 80077e4: 685b ldreq r3, [r3, #4] 80077e6: 1852 addeq r2, r2, r1 80077e8: 6022 streq r2, [r4, #0] 80077ea: 6063 str r3, [r4, #4] 80077ec: 6004 str r4, [r0, #0] 80077ee: e7ed b.n 80077cc <_free_r+0x24> 80077f0: 461a mov r2, r3 80077f2: 685b ldr r3, [r3, #4] 80077f4: b10b cbz r3, 80077fa <_free_r+0x52> 80077f6: 42a3 cmp r3, r4 80077f8: d9fa bls.n 80077f0 <_free_r+0x48> 80077fa: 6811 ldr r1, [r2, #0] 80077fc: 1850 adds r0, r2, r1 80077fe: 42a0 cmp r0, r4 8007800: d10b bne.n 800781a <_free_r+0x72> 8007802: 6820 ldr r0, [r4, #0] 8007804: 4401 add r1, r0 8007806: 1850 adds r0, r2, r1 8007808: 4283 cmp r3, r0 800780a: 6011 str r1, [r2, #0] 800780c: d1de bne.n 80077cc <_free_r+0x24> 800780e: 6818 ldr r0, [r3, #0] 8007810: 685b ldr r3, [r3, #4] 8007812: 4401 add r1, r0 8007814: 6011 str r1, [r2, #0] 8007816: 6053 str r3, [r2, #4] 8007818: e7d8 b.n 80077cc <_free_r+0x24> 800781a: d902 bls.n 8007822 <_free_r+0x7a> 800781c: 230c movs r3, #12 800781e: 602b str r3, [r5, #0] 8007820: e7d4 b.n 80077cc <_free_r+0x24> 8007822: 6820 ldr r0, [r4, #0] 8007824: 1821 adds r1, r4, r0 8007826: 428b cmp r3, r1 8007828: bf01 itttt eq 800782a: 6819 ldreq r1, [r3, #0] 800782c: 685b ldreq r3, [r3, #4] 800782e: 1809 addeq r1, r1, r0 8007830: 6021 streq r1, [r4, #0] 8007832: 6063 str r3, [r4, #4] 8007834: 6054 str r4, [r2, #4] 8007836: e7c9 b.n 80077cc <_free_r+0x24> 8007838: bd38 pop {r3, r4, r5, pc} 800783a: bf00 nop 800783c: 2000020c .word 0x2000020c 08007840 <_malloc_r>: 8007840: b5f8 push {r3, r4, r5, r6, r7, lr} 8007842: 1ccd adds r5, r1, #3 8007844: f025 0503 bic.w r5, r5, #3 8007848: 3508 adds r5, #8 800784a: 2d0c cmp r5, #12 800784c: bf38 it cc 800784e: 250c movcc r5, #12 8007850: 2d00 cmp r5, #0 8007852: 4606 mov r6, r0 8007854: db01 blt.n 800785a <_malloc_r+0x1a> 8007856: 42a9 cmp r1, r5 8007858: d903 bls.n 8007862 <_malloc_r+0x22> 800785a: 230c movs r3, #12 800785c: 6033 str r3, [r6, #0] 800785e: 2000 movs r0, #0 8007860: bdf8 pop {r3, r4, r5, r6, r7, pc} 8007862: f001 fef7 bl 8009654 <__malloc_lock> 8007866: 4921 ldr r1, [pc, #132] ; (80078ec <_malloc_r+0xac>) 8007868: 680a ldr r2, [r1, #0] 800786a: 4614 mov r4, r2 800786c: b99c cbnz r4, 8007896 <_malloc_r+0x56> 800786e: 4f20 ldr r7, [pc, #128] ; (80078f0 <_malloc_r+0xb0>) 8007870: 683b ldr r3, [r7, #0] 8007872: b923 cbnz r3, 800787e <_malloc_r+0x3e> 8007874: 4621 mov r1, r4 8007876: 4630 mov r0, r6 8007878: f000 fd3e bl 80082f8 <_sbrk_r> 800787c: 6038 str r0, [r7, #0] 800787e: 4629 mov r1, r5 8007880: 4630 mov r0, r6 8007882: f000 fd39 bl 80082f8 <_sbrk_r> 8007886: 1c43 adds r3, r0, #1 8007888: d123 bne.n 80078d2 <_malloc_r+0x92> 800788a: 230c movs r3, #12 800788c: 4630 mov r0, r6 800788e: 6033 str r3, [r6, #0] 8007890: f001 fee6 bl 8009660 <__malloc_unlock> 8007894: e7e3 b.n 800785e <_malloc_r+0x1e> 8007896: 6823 ldr r3, [r4, #0] 8007898: 1b5b subs r3, r3, r5 800789a: d417 bmi.n 80078cc <_malloc_r+0x8c> 800789c: 2b0b cmp r3, #11 800789e: d903 bls.n 80078a8 <_malloc_r+0x68> 80078a0: 6023 str r3, [r4, #0] 80078a2: 441c add r4, r3 80078a4: 6025 str r5, [r4, #0] 80078a6: e004 b.n 80078b2 <_malloc_r+0x72> 80078a8: 6863 ldr r3, [r4, #4] 80078aa: 42a2 cmp r2, r4 80078ac: bf0c ite eq 80078ae: 600b streq r3, [r1, #0] 80078b0: 6053 strne r3, [r2, #4] 80078b2: 4630 mov r0, r6 80078b4: f001 fed4 bl 8009660 <__malloc_unlock> 80078b8: f104 000b add.w r0, r4, #11 80078bc: 1d23 adds r3, r4, #4 80078be: f020 0007 bic.w r0, r0, #7 80078c2: 1ac2 subs r2, r0, r3 80078c4: d0cc beq.n 8007860 <_malloc_r+0x20> 80078c6: 1a1b subs r3, r3, r0 80078c8: 50a3 str r3, [r4, r2] 80078ca: e7c9 b.n 8007860 <_malloc_r+0x20> 80078cc: 4622 mov r2, r4 80078ce: 6864 ldr r4, [r4, #4] 80078d0: e7cc b.n 800786c <_malloc_r+0x2c> 80078d2: 1cc4 adds r4, r0, #3 80078d4: f024 0403 bic.w r4, r4, #3 80078d8: 42a0 cmp r0, r4 80078da: d0e3 beq.n 80078a4 <_malloc_r+0x64> 80078dc: 1a21 subs r1, r4, r0 80078de: 4630 mov r0, r6 80078e0: f000 fd0a bl 80082f8 <_sbrk_r> 80078e4: 3001 adds r0, #1 80078e6: d1dd bne.n 80078a4 <_malloc_r+0x64> 80078e8: e7cf b.n 800788a <_malloc_r+0x4a> 80078ea: bf00 nop 80078ec: 2000020c .word 0x2000020c 80078f0: 20000210 .word 0x20000210 080078f4 <__cvt>: 80078f4: 2b00 cmp r3, #0 80078f6: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80078fa: 461f mov r7, r3 80078fc: bfbb ittet lt 80078fe: f103 4300 addlt.w r3, r3, #2147483648 ; 0x80000000 8007902: 461f movlt r7, r3 8007904: 2300 movge r3, #0 8007906: 232d movlt r3, #45 ; 0x2d 8007908: b088 sub sp, #32 800790a: 4614 mov r4, r2 800790c: 9a12 ldr r2, [sp, #72] ; 0x48 800790e: 9d10 ldr r5, [sp, #64] ; 0x40 8007910: 7013 strb r3, [r2, #0] 8007912: 9b14 ldr r3, [sp, #80] ; 0x50 8007914: f8dd a04c ldr.w sl, [sp, #76] ; 0x4c 8007918: f023 0820 bic.w r8, r3, #32 800791c: f1b8 0f46 cmp.w r8, #70 ; 0x46 8007920: d005 beq.n 800792e <__cvt+0x3a> 8007922: f1b8 0f45 cmp.w r8, #69 ; 0x45 8007926: d100 bne.n 800792a <__cvt+0x36> 8007928: 3501 adds r5, #1 800792a: 2302 movs r3, #2 800792c: e000 b.n 8007930 <__cvt+0x3c> 800792e: 2303 movs r3, #3 8007930: aa07 add r2, sp, #28 8007932: 9204 str r2, [sp, #16] 8007934: aa06 add r2, sp, #24 8007936: e9cd a202 strd sl, r2, [sp, #8] 800793a: e9cd 3500 strd r3, r5, [sp] 800793e: 4622 mov r2, r4 8007940: 463b mov r3, r7 8007942: f000 fe59 bl 80085f8 <_dtoa_r> 8007946: f1b8 0f47 cmp.w r8, #71 ; 0x47 800794a: 4606 mov r6, r0 800794c: d102 bne.n 8007954 <__cvt+0x60> 800794e: 9b11 ldr r3, [sp, #68] ; 0x44 8007950: 07db lsls r3, r3, #31 8007952: d522 bpl.n 800799a <__cvt+0xa6> 8007954: f1b8 0f46 cmp.w r8, #70 ; 0x46 8007958: eb06 0905 add.w r9, r6, r5 800795c: d110 bne.n 8007980 <__cvt+0x8c> 800795e: 7833 ldrb r3, [r6, #0] 8007960: 2b30 cmp r3, #48 ; 0x30 8007962: d10a bne.n 800797a <__cvt+0x86> 8007964: 2200 movs r2, #0 8007966: 2300 movs r3, #0 8007968: 4620 mov r0, r4 800796a: 4639 mov r1, r7 800796c: f7f9 f888 bl 8000a80 <__aeabi_dcmpeq> 8007970: b918 cbnz r0, 800797a <__cvt+0x86> 8007972: f1c5 0501 rsb r5, r5, #1 8007976: f8ca 5000 str.w r5, [sl] 800797a: f8da 3000 ldr.w r3, [sl] 800797e: 4499 add r9, r3 8007980: 2200 movs r2, #0 8007982: 2300 movs r3, #0 8007984: 4620 mov r0, r4 8007986: 4639 mov r1, r7 8007988: f7f9 f87a bl 8000a80 <__aeabi_dcmpeq> 800798c: b108 cbz r0, 8007992 <__cvt+0x9e> 800798e: f8cd 901c str.w r9, [sp, #28] 8007992: 2230 movs r2, #48 ; 0x30 8007994: 9b07 ldr r3, [sp, #28] 8007996: 454b cmp r3, r9 8007998: d307 bcc.n 80079aa <__cvt+0xb6> 800799a: 4630 mov r0, r6 800799c: 9b07 ldr r3, [sp, #28] 800799e: 9a15 ldr r2, [sp, #84] ; 0x54 80079a0: 1b9b subs r3, r3, r6 80079a2: 6013 str r3, [r2, #0] 80079a4: b008 add sp, #32 80079a6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80079aa: 1c59 adds r1, r3, #1 80079ac: 9107 str r1, [sp, #28] 80079ae: 701a strb r2, [r3, #0] 80079b0: e7f0 b.n 8007994 <__cvt+0xa0> 080079b2 <__exponent>: 80079b2: 4603 mov r3, r0 80079b4: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 80079b6: 2900 cmp r1, #0 80079b8: f803 2b02 strb.w r2, [r3], #2 80079bc: bfb6 itet lt 80079be: 222d movlt r2, #45 ; 0x2d 80079c0: 222b movge r2, #43 ; 0x2b 80079c2: 4249 neglt r1, r1 80079c4: 2909 cmp r1, #9 80079c6: 7042 strb r2, [r0, #1] 80079c8: dd2b ble.n 8007a22 <__exponent+0x70> 80079ca: f10d 0407 add.w r4, sp, #7 80079ce: 46a4 mov ip, r4 80079d0: 270a movs r7, #10 80079d2: fb91 f6f7 sdiv r6, r1, r7 80079d6: 460a mov r2, r1 80079d8: 46a6 mov lr, r4 80079da: fb07 1516 mls r5, r7, r6, r1 80079de: 2a63 cmp r2, #99 ; 0x63 80079e0: f105 0530 add.w r5, r5, #48 ; 0x30 80079e4: 4631 mov r1, r6 80079e6: f104 34ff add.w r4, r4, #4294967295 ; 0xffffffff 80079ea: f80e 5c01 strb.w r5, [lr, #-1] 80079ee: dcf0 bgt.n 80079d2 <__exponent+0x20> 80079f0: 3130 adds r1, #48 ; 0x30 80079f2: f1ae 0502 sub.w r5, lr, #2 80079f6: f804 1c01 strb.w r1, [r4, #-1] 80079fa: 4629 mov r1, r5 80079fc: 1c44 adds r4, r0, #1 80079fe: 4561 cmp r1, ip 8007a00: d30a bcc.n 8007a18 <__exponent+0x66> 8007a02: f10d 0209 add.w r2, sp, #9 8007a06: eba2 020e sub.w r2, r2, lr 8007a0a: 4565 cmp r5, ip 8007a0c: bf88 it hi 8007a0e: 2200 movhi r2, #0 8007a10: 4413 add r3, r2 8007a12: 1a18 subs r0, r3, r0 8007a14: b003 add sp, #12 8007a16: bdf0 pop {r4, r5, r6, r7, pc} 8007a18: f811 2b01 ldrb.w r2, [r1], #1 8007a1c: f804 2f01 strb.w r2, [r4, #1]! 8007a20: e7ed b.n 80079fe <__exponent+0x4c> 8007a22: 2330 movs r3, #48 ; 0x30 8007a24: 3130 adds r1, #48 ; 0x30 8007a26: 7083 strb r3, [r0, #2] 8007a28: 70c1 strb r1, [r0, #3] 8007a2a: 1d03 adds r3, r0, #4 8007a2c: e7f1 b.n 8007a12 <__exponent+0x60> ... 08007a30 <_printf_float>: 8007a30: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8007a34: b091 sub sp, #68 ; 0x44 8007a36: 460c mov r4, r1 8007a38: f8dd 8068 ldr.w r8, [sp, #104] ; 0x68 8007a3c: 4616 mov r6, r2 8007a3e: 461f mov r7, r3 8007a40: 4605 mov r5, r0 8007a42: f001 fd7f bl 8009544 <_localeconv_r> 8007a46: 6803 ldr r3, [r0, #0] 8007a48: 4618 mov r0, r3 8007a4a: 9309 str r3, [sp, #36] ; 0x24 8007a4c: f7f8 fbec bl 8000228 8007a50: 2300 movs r3, #0 8007a52: 930e str r3, [sp, #56] ; 0x38 8007a54: f8d8 3000 ldr.w r3, [r8] 8007a58: 900a str r0, [sp, #40] ; 0x28 8007a5a: 3307 adds r3, #7 8007a5c: f023 0307 bic.w r3, r3, #7 8007a60: f103 0208 add.w r2, r3, #8 8007a64: f894 9018 ldrb.w r9, [r4, #24] 8007a68: f8d4 b000 ldr.w fp, [r4] 8007a6c: f8c8 2000 str.w r2, [r8] 8007a70: e9d3 2300 ldrd r2, r3, [r3] 8007a74: e9c4 2312 strd r2, r3, [r4, #72] ; 0x48 8007a78: e9d4 8a12 ldrd r8, sl, [r4, #72] ; 0x48 8007a7c: f02a 4300 bic.w r3, sl, #2147483648 ; 0x80000000 8007a80: 930b str r3, [sp, #44] ; 0x2c 8007a82: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 8007a86: 4640 mov r0, r8 8007a88: 4b9c ldr r3, [pc, #624] ; (8007cfc <_printf_float+0x2cc>) 8007a8a: 990b ldr r1, [sp, #44] ; 0x2c 8007a8c: f7f9 f82a bl 8000ae4 <__aeabi_dcmpun> 8007a90: bb70 cbnz r0, 8007af0 <_printf_float+0xc0> 8007a92: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 8007a96: 4640 mov r0, r8 8007a98: 4b98 ldr r3, [pc, #608] ; (8007cfc <_printf_float+0x2cc>) 8007a9a: 990b ldr r1, [sp, #44] ; 0x2c 8007a9c: f7f9 f804 bl 8000aa8 <__aeabi_dcmple> 8007aa0: bb30 cbnz r0, 8007af0 <_printf_float+0xc0> 8007aa2: 2200 movs r2, #0 8007aa4: 2300 movs r3, #0 8007aa6: 4640 mov r0, r8 8007aa8: 4651 mov r1, sl 8007aaa: f7f8 fff3 bl 8000a94 <__aeabi_dcmplt> 8007aae: b110 cbz r0, 8007ab6 <_printf_float+0x86> 8007ab0: 232d movs r3, #45 ; 0x2d 8007ab2: f884 3043 strb.w r3, [r4, #67] ; 0x43 8007ab6: 4b92 ldr r3, [pc, #584] ; (8007d00 <_printf_float+0x2d0>) 8007ab8: 4892 ldr r0, [pc, #584] ; (8007d04 <_printf_float+0x2d4>) 8007aba: f1b9 0f47 cmp.w r9, #71 ; 0x47 8007abe: bf94 ite ls 8007ac0: 4698 movls r8, r3 8007ac2: 4680 movhi r8, r0 8007ac4: 2303 movs r3, #3 8007ac6: f04f 0a00 mov.w sl, #0 8007aca: 6123 str r3, [r4, #16] 8007acc: f02b 0304 bic.w r3, fp, #4 8007ad0: 6023 str r3, [r4, #0] 8007ad2: 4633 mov r3, r6 8007ad4: 4621 mov r1, r4 8007ad6: 4628 mov r0, r5 8007ad8: 9700 str r7, [sp, #0] 8007ada: aa0f add r2, sp, #60 ; 0x3c 8007adc: f000 f9d4 bl 8007e88 <_printf_common> 8007ae0: 3001 adds r0, #1 8007ae2: f040 8090 bne.w 8007c06 <_printf_float+0x1d6> 8007ae6: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8007aea: b011 add sp, #68 ; 0x44 8007aec: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8007af0: 4642 mov r2, r8 8007af2: 4653 mov r3, sl 8007af4: 4640 mov r0, r8 8007af6: 4651 mov r1, sl 8007af8: f7f8 fff4 bl 8000ae4 <__aeabi_dcmpun> 8007afc: b148 cbz r0, 8007b12 <_printf_float+0xe2> 8007afe: f1ba 0f00 cmp.w sl, #0 8007b02: bfb8 it lt 8007b04: 232d movlt r3, #45 ; 0x2d 8007b06: 4880 ldr r0, [pc, #512] ; (8007d08 <_printf_float+0x2d8>) 8007b08: bfb8 it lt 8007b0a: f884 3043 strblt.w r3, [r4, #67] ; 0x43 8007b0e: 4b7f ldr r3, [pc, #508] ; (8007d0c <_printf_float+0x2dc>) 8007b10: e7d3 b.n 8007aba <_printf_float+0x8a> 8007b12: 6863 ldr r3, [r4, #4] 8007b14: f009 01df and.w r1, r9, #223 ; 0xdf 8007b18: 1c5a adds r2, r3, #1 8007b1a: d142 bne.n 8007ba2 <_printf_float+0x172> 8007b1c: 2306 movs r3, #6 8007b1e: 6063 str r3, [r4, #4] 8007b20: 2200 movs r2, #0 8007b22: 9206 str r2, [sp, #24] 8007b24: aa0e add r2, sp, #56 ; 0x38 8007b26: e9cd 9204 strd r9, r2, [sp, #16] 8007b2a: aa0d add r2, sp, #52 ; 0x34 8007b2c: f44b 6380 orr.w r3, fp, #1024 ; 0x400 8007b30: 9203 str r2, [sp, #12] 8007b32: f10d 0233 add.w r2, sp, #51 ; 0x33 8007b36: e9cd 3201 strd r3, r2, [sp, #4] 8007b3a: 6023 str r3, [r4, #0] 8007b3c: 6863 ldr r3, [r4, #4] 8007b3e: 4642 mov r2, r8 8007b40: 9300 str r3, [sp, #0] 8007b42: 4628 mov r0, r5 8007b44: 4653 mov r3, sl 8007b46: 910b str r1, [sp, #44] ; 0x2c 8007b48: f7ff fed4 bl 80078f4 <__cvt> 8007b4c: 990b ldr r1, [sp, #44] ; 0x2c 8007b4e: 4680 mov r8, r0 8007b50: 2947 cmp r1, #71 ; 0x47 8007b52: 990d ldr r1, [sp, #52] ; 0x34 8007b54: d108 bne.n 8007b68 <_printf_float+0x138> 8007b56: 1cc8 adds r0, r1, #3 8007b58: db02 blt.n 8007b60 <_printf_float+0x130> 8007b5a: 6863 ldr r3, [r4, #4] 8007b5c: 4299 cmp r1, r3 8007b5e: dd40 ble.n 8007be2 <_printf_float+0x1b2> 8007b60: f1a9 0902 sub.w r9, r9, #2 8007b64: fa5f f989 uxtb.w r9, r9 8007b68: f1b9 0f65 cmp.w r9, #101 ; 0x65 8007b6c: d81f bhi.n 8007bae <_printf_float+0x17e> 8007b6e: 464a mov r2, r9 8007b70: 3901 subs r1, #1 8007b72: f104 0050 add.w r0, r4, #80 ; 0x50 8007b76: 910d str r1, [sp, #52] ; 0x34 8007b78: f7ff ff1b bl 80079b2 <__exponent> 8007b7c: 9a0e ldr r2, [sp, #56] ; 0x38 8007b7e: 4682 mov sl, r0 8007b80: 1813 adds r3, r2, r0 8007b82: 2a01 cmp r2, #1 8007b84: 6123 str r3, [r4, #16] 8007b86: dc02 bgt.n 8007b8e <_printf_float+0x15e> 8007b88: 6822 ldr r2, [r4, #0] 8007b8a: 07d2 lsls r2, r2, #31 8007b8c: d501 bpl.n 8007b92 <_printf_float+0x162> 8007b8e: 3301 adds r3, #1 8007b90: 6123 str r3, [r4, #16] 8007b92: f89d 3033 ldrb.w r3, [sp, #51] ; 0x33 8007b96: 2b00 cmp r3, #0 8007b98: d09b beq.n 8007ad2 <_printf_float+0xa2> 8007b9a: 232d movs r3, #45 ; 0x2d 8007b9c: f884 3043 strb.w r3, [r4, #67] ; 0x43 8007ba0: e797 b.n 8007ad2 <_printf_float+0xa2> 8007ba2: 2947 cmp r1, #71 ; 0x47 8007ba4: d1bc bne.n 8007b20 <_printf_float+0xf0> 8007ba6: 2b00 cmp r3, #0 8007ba8: d1ba bne.n 8007b20 <_printf_float+0xf0> 8007baa: 2301 movs r3, #1 8007bac: e7b7 b.n 8007b1e <_printf_float+0xee> 8007bae: f1b9 0f66 cmp.w r9, #102 ; 0x66 8007bb2: d118 bne.n 8007be6 <_printf_float+0x1b6> 8007bb4: 2900 cmp r1, #0 8007bb6: 6863 ldr r3, [r4, #4] 8007bb8: dd0b ble.n 8007bd2 <_printf_float+0x1a2> 8007bba: 6121 str r1, [r4, #16] 8007bbc: b913 cbnz r3, 8007bc4 <_printf_float+0x194> 8007bbe: 6822 ldr r2, [r4, #0] 8007bc0: 07d0 lsls r0, r2, #31 8007bc2: d502 bpl.n 8007bca <_printf_float+0x19a> 8007bc4: 3301 adds r3, #1 8007bc6: 440b add r3, r1 8007bc8: 6123 str r3, [r4, #16] 8007bca: f04f 0a00 mov.w sl, #0 8007bce: 65a1 str r1, [r4, #88] ; 0x58 8007bd0: e7df b.n 8007b92 <_printf_float+0x162> 8007bd2: b913 cbnz r3, 8007bda <_printf_float+0x1aa> 8007bd4: 6822 ldr r2, [r4, #0] 8007bd6: 07d2 lsls r2, r2, #31 8007bd8: d501 bpl.n 8007bde <_printf_float+0x1ae> 8007bda: 3302 adds r3, #2 8007bdc: e7f4 b.n 8007bc8 <_printf_float+0x198> 8007bde: 2301 movs r3, #1 8007be0: e7f2 b.n 8007bc8 <_printf_float+0x198> 8007be2: f04f 0967 mov.w r9, #103 ; 0x67 8007be6: 9b0e ldr r3, [sp, #56] ; 0x38 8007be8: 4299 cmp r1, r3 8007bea: db05 blt.n 8007bf8 <_printf_float+0x1c8> 8007bec: 6823 ldr r3, [r4, #0] 8007bee: 6121 str r1, [r4, #16] 8007bf0: 07d8 lsls r0, r3, #31 8007bf2: d5ea bpl.n 8007bca <_printf_float+0x19a> 8007bf4: 1c4b adds r3, r1, #1 8007bf6: e7e7 b.n 8007bc8 <_printf_float+0x198> 8007bf8: 2900 cmp r1, #0 8007bfa: bfcc ite gt 8007bfc: 2201 movgt r2, #1 8007bfe: f1c1 0202 rsble r2, r1, #2 8007c02: 4413 add r3, r2 8007c04: e7e0 b.n 8007bc8 <_printf_float+0x198> 8007c06: 6823 ldr r3, [r4, #0] 8007c08: 055a lsls r2, r3, #21 8007c0a: d407 bmi.n 8007c1c <_printf_float+0x1ec> 8007c0c: 6923 ldr r3, [r4, #16] 8007c0e: 4642 mov r2, r8 8007c10: 4631 mov r1, r6 8007c12: 4628 mov r0, r5 8007c14: 47b8 blx r7 8007c16: 3001 adds r0, #1 8007c18: d12b bne.n 8007c72 <_printf_float+0x242> 8007c1a: e764 b.n 8007ae6 <_printf_float+0xb6> 8007c1c: f1b9 0f65 cmp.w r9, #101 ; 0x65 8007c20: f240 80dd bls.w 8007dde <_printf_float+0x3ae> 8007c24: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48 8007c28: 2200 movs r2, #0 8007c2a: 2300 movs r3, #0 8007c2c: f7f8 ff28 bl 8000a80 <__aeabi_dcmpeq> 8007c30: 2800 cmp r0, #0 8007c32: d033 beq.n 8007c9c <_printf_float+0x26c> 8007c34: 2301 movs r3, #1 8007c36: 4631 mov r1, r6 8007c38: 4628 mov r0, r5 8007c3a: 4a35 ldr r2, [pc, #212] ; (8007d10 <_printf_float+0x2e0>) 8007c3c: 47b8 blx r7 8007c3e: 3001 adds r0, #1 8007c40: f43f af51 beq.w 8007ae6 <_printf_float+0xb6> 8007c44: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 8007c48: 429a cmp r2, r3 8007c4a: db02 blt.n 8007c52 <_printf_float+0x222> 8007c4c: 6823 ldr r3, [r4, #0] 8007c4e: 07d8 lsls r0, r3, #31 8007c50: d50f bpl.n 8007c72 <_printf_float+0x242> 8007c52: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 8007c56: 4631 mov r1, r6 8007c58: 4628 mov r0, r5 8007c5a: 47b8 blx r7 8007c5c: 3001 adds r0, #1 8007c5e: f43f af42 beq.w 8007ae6 <_printf_float+0xb6> 8007c62: f04f 0800 mov.w r8, #0 8007c66: f104 091a add.w r9, r4, #26 8007c6a: 9b0e ldr r3, [sp, #56] ; 0x38 8007c6c: 3b01 subs r3, #1 8007c6e: 4543 cmp r3, r8 8007c70: dc09 bgt.n 8007c86 <_printf_float+0x256> 8007c72: 6823 ldr r3, [r4, #0] 8007c74: 079b lsls r3, r3, #30 8007c76: f100 8102 bmi.w 8007e7e <_printf_float+0x44e> 8007c7a: 68e0 ldr r0, [r4, #12] 8007c7c: 9b0f ldr r3, [sp, #60] ; 0x3c 8007c7e: 4298 cmp r0, r3 8007c80: bfb8 it lt 8007c82: 4618 movlt r0, r3 8007c84: e731 b.n 8007aea <_printf_float+0xba> 8007c86: 2301 movs r3, #1 8007c88: 464a mov r2, r9 8007c8a: 4631 mov r1, r6 8007c8c: 4628 mov r0, r5 8007c8e: 47b8 blx r7 8007c90: 3001 adds r0, #1 8007c92: f43f af28 beq.w 8007ae6 <_printf_float+0xb6> 8007c96: f108 0801 add.w r8, r8, #1 8007c9a: e7e6 b.n 8007c6a <_printf_float+0x23a> 8007c9c: 9b0d ldr r3, [sp, #52] ; 0x34 8007c9e: 2b00 cmp r3, #0 8007ca0: dc38 bgt.n 8007d14 <_printf_float+0x2e4> 8007ca2: 2301 movs r3, #1 8007ca4: 4631 mov r1, r6 8007ca6: 4628 mov r0, r5 8007ca8: 4a19 ldr r2, [pc, #100] ; (8007d10 <_printf_float+0x2e0>) 8007caa: 47b8 blx r7 8007cac: 3001 adds r0, #1 8007cae: f43f af1a beq.w 8007ae6 <_printf_float+0xb6> 8007cb2: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 8007cb6: 4313 orrs r3, r2 8007cb8: d102 bne.n 8007cc0 <_printf_float+0x290> 8007cba: 6823 ldr r3, [r4, #0] 8007cbc: 07d9 lsls r1, r3, #31 8007cbe: d5d8 bpl.n 8007c72 <_printf_float+0x242> 8007cc0: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 8007cc4: 4631 mov r1, r6 8007cc6: 4628 mov r0, r5 8007cc8: 47b8 blx r7 8007cca: 3001 adds r0, #1 8007ccc: f43f af0b beq.w 8007ae6 <_printf_float+0xb6> 8007cd0: f04f 0900 mov.w r9, #0 8007cd4: f104 0a1a add.w sl, r4, #26 8007cd8: 9b0d ldr r3, [sp, #52] ; 0x34 8007cda: 425b negs r3, r3 8007cdc: 454b cmp r3, r9 8007cde: dc01 bgt.n 8007ce4 <_printf_float+0x2b4> 8007ce0: 9b0e ldr r3, [sp, #56] ; 0x38 8007ce2: e794 b.n 8007c0e <_printf_float+0x1de> 8007ce4: 2301 movs r3, #1 8007ce6: 4652 mov r2, sl 8007ce8: 4631 mov r1, r6 8007cea: 4628 mov r0, r5 8007cec: 47b8 blx r7 8007cee: 3001 adds r0, #1 8007cf0: f43f aef9 beq.w 8007ae6 <_printf_float+0xb6> 8007cf4: f109 0901 add.w r9, r9, #1 8007cf8: e7ee b.n 8007cd8 <_printf_float+0x2a8> 8007cfa: bf00 nop 8007cfc: 7fefffff .word 0x7fefffff 8007d00: 0800b28c .word 0x0800b28c 8007d04: 0800b290 .word 0x0800b290 8007d08: 0800b298 .word 0x0800b298 8007d0c: 0800b294 .word 0x0800b294 8007d10: 0800b29c .word 0x0800b29c 8007d14: 9a0e ldr r2, [sp, #56] ; 0x38 8007d16: 6da3 ldr r3, [r4, #88] ; 0x58 8007d18: 429a cmp r2, r3 8007d1a: bfa8 it ge 8007d1c: 461a movge r2, r3 8007d1e: 2a00 cmp r2, #0 8007d20: 4691 mov r9, r2 8007d22: dc37 bgt.n 8007d94 <_printf_float+0x364> 8007d24: f04f 0b00 mov.w fp, #0 8007d28: ea29 79e9 bic.w r9, r9, r9, asr #31 8007d2c: f104 021a add.w r2, r4, #26 8007d30: f8d4 a058 ldr.w sl, [r4, #88] ; 0x58 8007d34: ebaa 0309 sub.w r3, sl, r9 8007d38: 455b cmp r3, fp 8007d3a: dc33 bgt.n 8007da4 <_printf_float+0x374> 8007d3c: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 8007d40: 429a cmp r2, r3 8007d42: db3b blt.n 8007dbc <_printf_float+0x38c> 8007d44: 6823 ldr r3, [r4, #0] 8007d46: 07da lsls r2, r3, #31 8007d48: d438 bmi.n 8007dbc <_printf_float+0x38c> 8007d4a: 9a0e ldr r2, [sp, #56] ; 0x38 8007d4c: 990d ldr r1, [sp, #52] ; 0x34 8007d4e: eba2 030a sub.w r3, r2, sl 8007d52: eba2 0901 sub.w r9, r2, r1 8007d56: 4599 cmp r9, r3 8007d58: bfa8 it ge 8007d5a: 4699 movge r9, r3 8007d5c: f1b9 0f00 cmp.w r9, #0 8007d60: dc34 bgt.n 8007dcc <_printf_float+0x39c> 8007d62: f04f 0800 mov.w r8, #0 8007d66: ea29 79e9 bic.w r9, r9, r9, asr #31 8007d6a: f104 0a1a add.w sl, r4, #26 8007d6e: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 8007d72: 1a9b subs r3, r3, r2 8007d74: eba3 0309 sub.w r3, r3, r9 8007d78: 4543 cmp r3, r8 8007d7a: f77f af7a ble.w 8007c72 <_printf_float+0x242> 8007d7e: 2301 movs r3, #1 8007d80: 4652 mov r2, sl 8007d82: 4631 mov r1, r6 8007d84: 4628 mov r0, r5 8007d86: 47b8 blx r7 8007d88: 3001 adds r0, #1 8007d8a: f43f aeac beq.w 8007ae6 <_printf_float+0xb6> 8007d8e: f108 0801 add.w r8, r8, #1 8007d92: e7ec b.n 8007d6e <_printf_float+0x33e> 8007d94: 4613 mov r3, r2 8007d96: 4631 mov r1, r6 8007d98: 4642 mov r2, r8 8007d9a: 4628 mov r0, r5 8007d9c: 47b8 blx r7 8007d9e: 3001 adds r0, #1 8007da0: d1c0 bne.n 8007d24 <_printf_float+0x2f4> 8007da2: e6a0 b.n 8007ae6 <_printf_float+0xb6> 8007da4: 2301 movs r3, #1 8007da6: 4631 mov r1, r6 8007da8: 4628 mov r0, r5 8007daa: 920b str r2, [sp, #44] ; 0x2c 8007dac: 47b8 blx r7 8007dae: 3001 adds r0, #1 8007db0: f43f ae99 beq.w 8007ae6 <_printf_float+0xb6> 8007db4: 9a0b ldr r2, [sp, #44] ; 0x2c 8007db6: f10b 0b01 add.w fp, fp, #1 8007dba: e7b9 b.n 8007d30 <_printf_float+0x300> 8007dbc: 4631 mov r1, r6 8007dbe: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 8007dc2: 4628 mov r0, r5 8007dc4: 47b8 blx r7 8007dc6: 3001 adds r0, #1 8007dc8: d1bf bne.n 8007d4a <_printf_float+0x31a> 8007dca: e68c b.n 8007ae6 <_printf_float+0xb6> 8007dcc: 464b mov r3, r9 8007dce: 4631 mov r1, r6 8007dd0: 4628 mov r0, r5 8007dd2: eb08 020a add.w r2, r8, sl 8007dd6: 47b8 blx r7 8007dd8: 3001 adds r0, #1 8007dda: d1c2 bne.n 8007d62 <_printf_float+0x332> 8007ddc: e683 b.n 8007ae6 <_printf_float+0xb6> 8007dde: 9a0e ldr r2, [sp, #56] ; 0x38 8007de0: 2a01 cmp r2, #1 8007de2: dc01 bgt.n 8007de8 <_printf_float+0x3b8> 8007de4: 07db lsls r3, r3, #31 8007de6: d537 bpl.n 8007e58 <_printf_float+0x428> 8007de8: 2301 movs r3, #1 8007dea: 4642 mov r2, r8 8007dec: 4631 mov r1, r6 8007dee: 4628 mov r0, r5 8007df0: 47b8 blx r7 8007df2: 3001 adds r0, #1 8007df4: f43f ae77 beq.w 8007ae6 <_printf_float+0xb6> 8007df8: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 8007dfc: 4631 mov r1, r6 8007dfe: 4628 mov r0, r5 8007e00: 47b8 blx r7 8007e02: 3001 adds r0, #1 8007e04: f43f ae6f beq.w 8007ae6 <_printf_float+0xb6> 8007e08: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48 8007e0c: 2200 movs r2, #0 8007e0e: 2300 movs r3, #0 8007e10: f7f8 fe36 bl 8000a80 <__aeabi_dcmpeq> 8007e14: b9d8 cbnz r0, 8007e4e <_printf_float+0x41e> 8007e16: 9b0e ldr r3, [sp, #56] ; 0x38 8007e18: f108 0201 add.w r2, r8, #1 8007e1c: 3b01 subs r3, #1 8007e1e: 4631 mov r1, r6 8007e20: 4628 mov r0, r5 8007e22: 47b8 blx r7 8007e24: 3001 adds r0, #1 8007e26: d10e bne.n 8007e46 <_printf_float+0x416> 8007e28: e65d b.n 8007ae6 <_printf_float+0xb6> 8007e2a: 2301 movs r3, #1 8007e2c: 464a mov r2, r9 8007e2e: 4631 mov r1, r6 8007e30: 4628 mov r0, r5 8007e32: 47b8 blx r7 8007e34: 3001 adds r0, #1 8007e36: f43f ae56 beq.w 8007ae6 <_printf_float+0xb6> 8007e3a: f108 0801 add.w r8, r8, #1 8007e3e: 9b0e ldr r3, [sp, #56] ; 0x38 8007e40: 3b01 subs r3, #1 8007e42: 4543 cmp r3, r8 8007e44: dcf1 bgt.n 8007e2a <_printf_float+0x3fa> 8007e46: 4653 mov r3, sl 8007e48: f104 0250 add.w r2, r4, #80 ; 0x50 8007e4c: e6e0 b.n 8007c10 <_printf_float+0x1e0> 8007e4e: f04f 0800 mov.w r8, #0 8007e52: f104 091a add.w r9, r4, #26 8007e56: e7f2 b.n 8007e3e <_printf_float+0x40e> 8007e58: 2301 movs r3, #1 8007e5a: 4642 mov r2, r8 8007e5c: e7df b.n 8007e1e <_printf_float+0x3ee> 8007e5e: 2301 movs r3, #1 8007e60: 464a mov r2, r9 8007e62: 4631 mov r1, r6 8007e64: 4628 mov r0, r5 8007e66: 47b8 blx r7 8007e68: 3001 adds r0, #1 8007e6a: f43f ae3c beq.w 8007ae6 <_printf_float+0xb6> 8007e6e: f108 0801 add.w r8, r8, #1 8007e72: 68e3 ldr r3, [r4, #12] 8007e74: 990f ldr r1, [sp, #60] ; 0x3c 8007e76: 1a5b subs r3, r3, r1 8007e78: 4543 cmp r3, r8 8007e7a: dcf0 bgt.n 8007e5e <_printf_float+0x42e> 8007e7c: e6fd b.n 8007c7a <_printf_float+0x24a> 8007e7e: f04f 0800 mov.w r8, #0 8007e82: f104 0919 add.w r9, r4, #25 8007e86: e7f4 b.n 8007e72 <_printf_float+0x442> 08007e88 <_printf_common>: 8007e88: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8007e8c: 4616 mov r6, r2 8007e8e: 4699 mov r9, r3 8007e90: 688a ldr r2, [r1, #8] 8007e92: 690b ldr r3, [r1, #16] 8007e94: 4607 mov r7, r0 8007e96: 4293 cmp r3, r2 8007e98: bfb8 it lt 8007e9a: 4613 movlt r3, r2 8007e9c: 6033 str r3, [r6, #0] 8007e9e: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 8007ea2: 460c mov r4, r1 8007ea4: f8dd 8020 ldr.w r8, [sp, #32] 8007ea8: b10a cbz r2, 8007eae <_printf_common+0x26> 8007eaa: 3301 adds r3, #1 8007eac: 6033 str r3, [r6, #0] 8007eae: 6823 ldr r3, [r4, #0] 8007eb0: 0699 lsls r1, r3, #26 8007eb2: bf42 ittt mi 8007eb4: 6833 ldrmi r3, [r6, #0] 8007eb6: 3302 addmi r3, #2 8007eb8: 6033 strmi r3, [r6, #0] 8007eba: 6825 ldr r5, [r4, #0] 8007ebc: f015 0506 ands.w r5, r5, #6 8007ec0: d106 bne.n 8007ed0 <_printf_common+0x48> 8007ec2: f104 0a19 add.w sl, r4, #25 8007ec6: 68e3 ldr r3, [r4, #12] 8007ec8: 6832 ldr r2, [r6, #0] 8007eca: 1a9b subs r3, r3, r2 8007ecc: 42ab cmp r3, r5 8007ece: dc28 bgt.n 8007f22 <_printf_common+0x9a> 8007ed0: f894 2043 ldrb.w r2, [r4, #67] ; 0x43 8007ed4: 1e13 subs r3, r2, #0 8007ed6: 6822 ldr r2, [r4, #0] 8007ed8: bf18 it ne 8007eda: 2301 movne r3, #1 8007edc: 0692 lsls r2, r2, #26 8007ede: d42d bmi.n 8007f3c <_printf_common+0xb4> 8007ee0: 4649 mov r1, r9 8007ee2: 4638 mov r0, r7 8007ee4: f104 0243 add.w r2, r4, #67 ; 0x43 8007ee8: 47c0 blx r8 8007eea: 3001 adds r0, #1 8007eec: d020 beq.n 8007f30 <_printf_common+0xa8> 8007eee: 6823 ldr r3, [r4, #0] 8007ef0: 68e5 ldr r5, [r4, #12] 8007ef2: f003 0306 and.w r3, r3, #6 8007ef6: 2b04 cmp r3, #4 8007ef8: bf18 it ne 8007efa: 2500 movne r5, #0 8007efc: 6832 ldr r2, [r6, #0] 8007efe: f04f 0600 mov.w r6, #0 8007f02: 68a3 ldr r3, [r4, #8] 8007f04: bf08 it eq 8007f06: 1aad subeq r5, r5, r2 8007f08: 6922 ldr r2, [r4, #16] 8007f0a: bf08 it eq 8007f0c: ea25 75e5 biceq.w r5, r5, r5, asr #31 8007f10: 4293 cmp r3, r2 8007f12: bfc4 itt gt 8007f14: 1a9b subgt r3, r3, r2 8007f16: 18ed addgt r5, r5, r3 8007f18: 341a adds r4, #26 8007f1a: 42b5 cmp r5, r6 8007f1c: d11a bne.n 8007f54 <_printf_common+0xcc> 8007f1e: 2000 movs r0, #0 8007f20: e008 b.n 8007f34 <_printf_common+0xac> 8007f22: 2301 movs r3, #1 8007f24: 4652 mov r2, sl 8007f26: 4649 mov r1, r9 8007f28: 4638 mov r0, r7 8007f2a: 47c0 blx r8 8007f2c: 3001 adds r0, #1 8007f2e: d103 bne.n 8007f38 <_printf_common+0xb0> 8007f30: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8007f34: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8007f38: 3501 adds r5, #1 8007f3a: e7c4 b.n 8007ec6 <_printf_common+0x3e> 8007f3c: 2030 movs r0, #48 ; 0x30 8007f3e: 18e1 adds r1, r4, r3 8007f40: f881 0043 strb.w r0, [r1, #67] ; 0x43 8007f44: 1c5a adds r2, r3, #1 8007f46: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8007f4a: 4422 add r2, r4 8007f4c: 3302 adds r3, #2 8007f4e: f882 1043 strb.w r1, [r2, #67] ; 0x43 8007f52: e7c5 b.n 8007ee0 <_printf_common+0x58> 8007f54: 2301 movs r3, #1 8007f56: 4622 mov r2, r4 8007f58: 4649 mov r1, r9 8007f5a: 4638 mov r0, r7 8007f5c: 47c0 blx r8 8007f5e: 3001 adds r0, #1 8007f60: d0e6 beq.n 8007f30 <_printf_common+0xa8> 8007f62: 3601 adds r6, #1 8007f64: e7d9 b.n 8007f1a <_printf_common+0x92> ... 08007f68 <_printf_i>: 8007f68: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 8007f6c: 460c mov r4, r1 8007f6e: 7e27 ldrb r7, [r4, #24] 8007f70: 4691 mov r9, r2 8007f72: 2f78 cmp r7, #120 ; 0x78 8007f74: 4680 mov r8, r0 8007f76: 469a mov sl, r3 8007f78: 990c ldr r1, [sp, #48] ; 0x30 8007f7a: f104 0243 add.w r2, r4, #67 ; 0x43 8007f7e: d807 bhi.n 8007f90 <_printf_i+0x28> 8007f80: 2f62 cmp r7, #98 ; 0x62 8007f82: d80a bhi.n 8007f9a <_printf_i+0x32> 8007f84: 2f00 cmp r7, #0 8007f86: f000 80d9 beq.w 800813c <_printf_i+0x1d4> 8007f8a: 2f58 cmp r7, #88 ; 0x58 8007f8c: f000 80a4 beq.w 80080d8 <_printf_i+0x170> 8007f90: f104 0642 add.w r6, r4, #66 ; 0x42 8007f94: f884 7042 strb.w r7, [r4, #66] ; 0x42 8007f98: e03a b.n 8008010 <_printf_i+0xa8> 8007f9a: f1a7 0363 sub.w r3, r7, #99 ; 0x63 8007f9e: 2b15 cmp r3, #21 8007fa0: d8f6 bhi.n 8007f90 <_printf_i+0x28> 8007fa2: a001 add r0, pc, #4 ; (adr r0, 8007fa8 <_printf_i+0x40>) 8007fa4: f850 f023 ldr.w pc, [r0, r3, lsl #2] 8007fa8: 08008001 .word 0x08008001 8007fac: 08008015 .word 0x08008015 8007fb0: 08007f91 .word 0x08007f91 8007fb4: 08007f91 .word 0x08007f91 8007fb8: 08007f91 .word 0x08007f91 8007fbc: 08007f91 .word 0x08007f91 8007fc0: 08008015 .word 0x08008015 8007fc4: 08007f91 .word 0x08007f91 8007fc8: 08007f91 .word 0x08007f91 8007fcc: 08007f91 .word 0x08007f91 8007fd0: 08007f91 .word 0x08007f91 8007fd4: 08008123 .word 0x08008123 8007fd8: 08008045 .word 0x08008045 8007fdc: 08008105 .word 0x08008105 8007fe0: 08007f91 .word 0x08007f91 8007fe4: 08007f91 .word 0x08007f91 8007fe8: 08008145 .word 0x08008145 8007fec: 08007f91 .word 0x08007f91 8007ff0: 08008045 .word 0x08008045 8007ff4: 08007f91 .word 0x08007f91 8007ff8: 08007f91 .word 0x08007f91 8007ffc: 0800810d .word 0x0800810d 8008000: 680b ldr r3, [r1, #0] 8008002: f104 0642 add.w r6, r4, #66 ; 0x42 8008006: 1d1a adds r2, r3, #4 8008008: 681b ldr r3, [r3, #0] 800800a: 600a str r2, [r1, #0] 800800c: f884 3042 strb.w r3, [r4, #66] ; 0x42 8008010: 2301 movs r3, #1 8008012: e0a4 b.n 800815e <_printf_i+0x1f6> 8008014: 6825 ldr r5, [r4, #0] 8008016: 6808 ldr r0, [r1, #0] 8008018: 062e lsls r6, r5, #24 800801a: f100 0304 add.w r3, r0, #4 800801e: d50a bpl.n 8008036 <_printf_i+0xce> 8008020: 6805 ldr r5, [r0, #0] 8008022: 600b str r3, [r1, #0] 8008024: 2d00 cmp r5, #0 8008026: da03 bge.n 8008030 <_printf_i+0xc8> 8008028: 232d movs r3, #45 ; 0x2d 800802a: 426d negs r5, r5 800802c: f884 3043 strb.w r3, [r4, #67] ; 0x43 8008030: 230a movs r3, #10 8008032: 485e ldr r0, [pc, #376] ; (80081ac <_printf_i+0x244>) 8008034: e019 b.n 800806a <_printf_i+0x102> 8008036: f015 0f40 tst.w r5, #64 ; 0x40 800803a: 6805 ldr r5, [r0, #0] 800803c: 600b str r3, [r1, #0] 800803e: bf18 it ne 8008040: b22d sxthne r5, r5 8008042: e7ef b.n 8008024 <_printf_i+0xbc> 8008044: 680b ldr r3, [r1, #0] 8008046: 6825 ldr r5, [r4, #0] 8008048: 1d18 adds r0, r3, #4 800804a: 6008 str r0, [r1, #0] 800804c: 0628 lsls r0, r5, #24 800804e: d501 bpl.n 8008054 <_printf_i+0xec> 8008050: 681d ldr r5, [r3, #0] 8008052: e002 b.n 800805a <_printf_i+0xf2> 8008054: 0669 lsls r1, r5, #25 8008056: d5fb bpl.n 8008050 <_printf_i+0xe8> 8008058: 881d ldrh r5, [r3, #0] 800805a: 2f6f cmp r7, #111 ; 0x6f 800805c: bf0c ite eq 800805e: 2308 moveq r3, #8 8008060: 230a movne r3, #10 8008062: 4852 ldr r0, [pc, #328] ; (80081ac <_printf_i+0x244>) 8008064: 2100 movs r1, #0 8008066: f884 1043 strb.w r1, [r4, #67] ; 0x43 800806a: 6866 ldr r6, [r4, #4] 800806c: 2e00 cmp r6, #0 800806e: bfa8 it ge 8008070: 6821 ldrge r1, [r4, #0] 8008072: 60a6 str r6, [r4, #8] 8008074: bfa4 itt ge 8008076: f021 0104 bicge.w r1, r1, #4 800807a: 6021 strge r1, [r4, #0] 800807c: b90d cbnz r5, 8008082 <_printf_i+0x11a> 800807e: 2e00 cmp r6, #0 8008080: d04d beq.n 800811e <_printf_i+0x1b6> 8008082: 4616 mov r6, r2 8008084: fbb5 f1f3 udiv r1, r5, r3 8008088: fb03 5711 mls r7, r3, r1, r5 800808c: 5dc7 ldrb r7, [r0, r7] 800808e: f806 7d01 strb.w r7, [r6, #-1]! 8008092: 462f mov r7, r5 8008094: 42bb cmp r3, r7 8008096: 460d mov r5, r1 8008098: d9f4 bls.n 8008084 <_printf_i+0x11c> 800809a: 2b08 cmp r3, #8 800809c: d10b bne.n 80080b6 <_printf_i+0x14e> 800809e: 6823 ldr r3, [r4, #0] 80080a0: 07df lsls r7, r3, #31 80080a2: d508 bpl.n 80080b6 <_printf_i+0x14e> 80080a4: 6923 ldr r3, [r4, #16] 80080a6: 6861 ldr r1, [r4, #4] 80080a8: 4299 cmp r1, r3 80080aa: bfde ittt le 80080ac: 2330 movle r3, #48 ; 0x30 80080ae: f806 3c01 strble.w r3, [r6, #-1] 80080b2: f106 36ff addle.w r6, r6, #4294967295 ; 0xffffffff 80080b6: 1b92 subs r2, r2, r6 80080b8: 6122 str r2, [r4, #16] 80080ba: 464b mov r3, r9 80080bc: 4621 mov r1, r4 80080be: 4640 mov r0, r8 80080c0: f8cd a000 str.w sl, [sp] 80080c4: aa03 add r2, sp, #12 80080c6: f7ff fedf bl 8007e88 <_printf_common> 80080ca: 3001 adds r0, #1 80080cc: d14c bne.n 8008168 <_printf_i+0x200> 80080ce: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 80080d2: b004 add sp, #16 80080d4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80080d8: 4834 ldr r0, [pc, #208] ; (80081ac <_printf_i+0x244>) 80080da: f884 7045 strb.w r7, [r4, #69] ; 0x45 80080de: 680e ldr r6, [r1, #0] 80080e0: 6823 ldr r3, [r4, #0] 80080e2: f856 5b04 ldr.w r5, [r6], #4 80080e6: 061f lsls r7, r3, #24 80080e8: 600e str r6, [r1, #0] 80080ea: d514 bpl.n 8008116 <_printf_i+0x1ae> 80080ec: 07d9 lsls r1, r3, #31 80080ee: bf44 itt mi 80080f0: f043 0320 orrmi.w r3, r3, #32 80080f4: 6023 strmi r3, [r4, #0] 80080f6: b91d cbnz r5, 8008100 <_printf_i+0x198> 80080f8: 6823 ldr r3, [r4, #0] 80080fa: f023 0320 bic.w r3, r3, #32 80080fe: 6023 str r3, [r4, #0] 8008100: 2310 movs r3, #16 8008102: e7af b.n 8008064 <_printf_i+0xfc> 8008104: 6823 ldr r3, [r4, #0] 8008106: f043 0320 orr.w r3, r3, #32 800810a: 6023 str r3, [r4, #0] 800810c: 2378 movs r3, #120 ; 0x78 800810e: 4828 ldr r0, [pc, #160] ; (80081b0 <_printf_i+0x248>) 8008110: f884 3045 strb.w r3, [r4, #69] ; 0x45 8008114: e7e3 b.n 80080de <_printf_i+0x176> 8008116: 065e lsls r6, r3, #25 8008118: bf48 it mi 800811a: b2ad uxthmi r5, r5 800811c: e7e6 b.n 80080ec <_printf_i+0x184> 800811e: 4616 mov r6, r2 8008120: e7bb b.n 800809a <_printf_i+0x132> 8008122: 680b ldr r3, [r1, #0] 8008124: 6826 ldr r6, [r4, #0] 8008126: 1d1d adds r5, r3, #4 8008128: 6960 ldr r0, [r4, #20] 800812a: 600d str r5, [r1, #0] 800812c: 0635 lsls r5, r6, #24 800812e: 681b ldr r3, [r3, #0] 8008130: d501 bpl.n 8008136 <_printf_i+0x1ce> 8008132: 6018 str r0, [r3, #0] 8008134: e002 b.n 800813c <_printf_i+0x1d4> 8008136: 0671 lsls r1, r6, #25 8008138: d5fb bpl.n 8008132 <_printf_i+0x1ca> 800813a: 8018 strh r0, [r3, #0] 800813c: 2300 movs r3, #0 800813e: 4616 mov r6, r2 8008140: 6123 str r3, [r4, #16] 8008142: e7ba b.n 80080ba <_printf_i+0x152> 8008144: 680b ldr r3, [r1, #0] 8008146: 1d1a adds r2, r3, #4 8008148: 600a str r2, [r1, #0] 800814a: 681e ldr r6, [r3, #0] 800814c: 2100 movs r1, #0 800814e: 4630 mov r0, r6 8008150: 6862 ldr r2, [r4, #4] 8008152: f001 fa63 bl 800961c 8008156: b108 cbz r0, 800815c <_printf_i+0x1f4> 8008158: 1b80 subs r0, r0, r6 800815a: 6060 str r0, [r4, #4] 800815c: 6863 ldr r3, [r4, #4] 800815e: 6123 str r3, [r4, #16] 8008160: 2300 movs r3, #0 8008162: f884 3043 strb.w r3, [r4, #67] ; 0x43 8008166: e7a8 b.n 80080ba <_printf_i+0x152> 8008168: 4632 mov r2, r6 800816a: 4649 mov r1, r9 800816c: 4640 mov r0, r8 800816e: 6923 ldr r3, [r4, #16] 8008170: 47d0 blx sl 8008172: 3001 adds r0, #1 8008174: d0ab beq.n 80080ce <_printf_i+0x166> 8008176: 6823 ldr r3, [r4, #0] 8008178: 079b lsls r3, r3, #30 800817a: d413 bmi.n 80081a4 <_printf_i+0x23c> 800817c: 68e0 ldr r0, [r4, #12] 800817e: 9b03 ldr r3, [sp, #12] 8008180: 4298 cmp r0, r3 8008182: bfb8 it lt 8008184: 4618 movlt r0, r3 8008186: e7a4 b.n 80080d2 <_printf_i+0x16a> 8008188: 2301 movs r3, #1 800818a: 4632 mov r2, r6 800818c: 4649 mov r1, r9 800818e: 4640 mov r0, r8 8008190: 47d0 blx sl 8008192: 3001 adds r0, #1 8008194: d09b beq.n 80080ce <_printf_i+0x166> 8008196: 3501 adds r5, #1 8008198: 68e3 ldr r3, [r4, #12] 800819a: 9903 ldr r1, [sp, #12] 800819c: 1a5b subs r3, r3, r1 800819e: 42ab cmp r3, r5 80081a0: dcf2 bgt.n 8008188 <_printf_i+0x220> 80081a2: e7eb b.n 800817c <_printf_i+0x214> 80081a4: 2500 movs r5, #0 80081a6: f104 0619 add.w r6, r4, #25 80081aa: e7f5 b.n 8008198 <_printf_i+0x230> 80081ac: 0800b29e .word 0x0800b29e 80081b0: 0800b2af .word 0x0800b2af 080081b4 : 80081b4: b40f push {r0, r1, r2, r3} 80081b6: 4b0a ldr r3, [pc, #40] ; (80081e0 ) 80081b8: b513 push {r0, r1, r4, lr} 80081ba: 681c ldr r4, [r3, #0] 80081bc: b124 cbz r4, 80081c8 80081be: 69a3 ldr r3, [r4, #24] 80081c0: b913 cbnz r3, 80081c8 80081c2: 4620 mov r0, r4 80081c4: f001 f920 bl 8009408 <__sinit> 80081c8: ab05 add r3, sp, #20 80081ca: 4620 mov r0, r4 80081cc: 9a04 ldr r2, [sp, #16] 80081ce: 68a1 ldr r1, [r4, #8] 80081d0: 9301 str r3, [sp, #4] 80081d2: f001 ff5f bl 800a094 <_vfiprintf_r> 80081d6: b002 add sp, #8 80081d8: e8bd 4010 ldmia.w sp!, {r4, lr} 80081dc: b004 add sp, #16 80081de: 4770 bx lr 80081e0: 20000014 .word 0x20000014 080081e4 : 80081e4: b538 push {r3, r4, r5, lr} 80081e6: 4b08 ldr r3, [pc, #32] ; (8008208 ) 80081e8: 4605 mov r5, r0 80081ea: 681c ldr r4, [r3, #0] 80081ec: b124 cbz r4, 80081f8 80081ee: 69a3 ldr r3, [r4, #24] 80081f0: b913 cbnz r3, 80081f8 80081f2: 4620 mov r0, r4 80081f4: f001 f908 bl 8009408 <__sinit> 80081f8: 4629 mov r1, r5 80081fa: 4620 mov r0, r4 80081fc: 68a2 ldr r2, [r4, #8] 80081fe: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8008202: f002 b877 b.w 800a2f4 <_putc_r> 8008206: bf00 nop 8008208: 20000014 .word 0x20000014 0800820c <_puts_r>: 800820c: b570 push {r4, r5, r6, lr} 800820e: 460e mov r6, r1 8008210: 4605 mov r5, r0 8008212: b118 cbz r0, 800821c <_puts_r+0x10> 8008214: 6983 ldr r3, [r0, #24] 8008216: b90b cbnz r3, 800821c <_puts_r+0x10> 8008218: f001 f8f6 bl 8009408 <__sinit> 800821c: 69ab ldr r3, [r5, #24] 800821e: 68ac ldr r4, [r5, #8] 8008220: b913 cbnz r3, 8008228 <_puts_r+0x1c> 8008222: 4628 mov r0, r5 8008224: f001 f8f0 bl 8009408 <__sinit> 8008228: 4b2c ldr r3, [pc, #176] ; (80082dc <_puts_r+0xd0>) 800822a: 429c cmp r4, r3 800822c: d120 bne.n 8008270 <_puts_r+0x64> 800822e: 686c ldr r4, [r5, #4] 8008230: 6e63 ldr r3, [r4, #100] ; 0x64 8008232: 07db lsls r3, r3, #31 8008234: d405 bmi.n 8008242 <_puts_r+0x36> 8008236: 89a3 ldrh r3, [r4, #12] 8008238: 0598 lsls r0, r3, #22 800823a: d402 bmi.n 8008242 <_puts_r+0x36> 800823c: 6da0 ldr r0, [r4, #88] ; 0x58 800823e: f001 f986 bl 800954e <__retarget_lock_acquire_recursive> 8008242: 89a3 ldrh r3, [r4, #12] 8008244: 0719 lsls r1, r3, #28 8008246: d51d bpl.n 8008284 <_puts_r+0x78> 8008248: 6923 ldr r3, [r4, #16] 800824a: b1db cbz r3, 8008284 <_puts_r+0x78> 800824c: 3e01 subs r6, #1 800824e: 68a3 ldr r3, [r4, #8] 8008250: f816 1f01 ldrb.w r1, [r6, #1]! 8008254: 3b01 subs r3, #1 8008256: 60a3 str r3, [r4, #8] 8008258: bb39 cbnz r1, 80082aa <_puts_r+0x9e> 800825a: 2b00 cmp r3, #0 800825c: da38 bge.n 80082d0 <_puts_r+0xc4> 800825e: 4622 mov r2, r4 8008260: 210a movs r1, #10 8008262: 4628 mov r0, r5 8008264: f000 f878 bl 8008358 <__swbuf_r> 8008268: 3001 adds r0, #1 800826a: d011 beq.n 8008290 <_puts_r+0x84> 800826c: 250a movs r5, #10 800826e: e011 b.n 8008294 <_puts_r+0x88> 8008270: 4b1b ldr r3, [pc, #108] ; (80082e0 <_puts_r+0xd4>) 8008272: 429c cmp r4, r3 8008274: d101 bne.n 800827a <_puts_r+0x6e> 8008276: 68ac ldr r4, [r5, #8] 8008278: e7da b.n 8008230 <_puts_r+0x24> 800827a: 4b1a ldr r3, [pc, #104] ; (80082e4 <_puts_r+0xd8>) 800827c: 429c cmp r4, r3 800827e: bf08 it eq 8008280: 68ec ldreq r4, [r5, #12] 8008282: e7d5 b.n 8008230 <_puts_r+0x24> 8008284: 4621 mov r1, r4 8008286: 4628 mov r0, r5 8008288: f000 f8b8 bl 80083fc <__swsetup_r> 800828c: 2800 cmp r0, #0 800828e: d0dd beq.n 800824c <_puts_r+0x40> 8008290: f04f 35ff mov.w r5, #4294967295 ; 0xffffffff 8008294: 6e63 ldr r3, [r4, #100] ; 0x64 8008296: 07da lsls r2, r3, #31 8008298: d405 bmi.n 80082a6 <_puts_r+0x9a> 800829a: 89a3 ldrh r3, [r4, #12] 800829c: 059b lsls r3, r3, #22 800829e: d402 bmi.n 80082a6 <_puts_r+0x9a> 80082a0: 6da0 ldr r0, [r4, #88] ; 0x58 80082a2: f001 f955 bl 8009550 <__retarget_lock_release_recursive> 80082a6: 4628 mov r0, r5 80082a8: bd70 pop {r4, r5, r6, pc} 80082aa: 2b00 cmp r3, #0 80082ac: da04 bge.n 80082b8 <_puts_r+0xac> 80082ae: 69a2 ldr r2, [r4, #24] 80082b0: 429a cmp r2, r3 80082b2: dc06 bgt.n 80082c2 <_puts_r+0xb6> 80082b4: 290a cmp r1, #10 80082b6: d004 beq.n 80082c2 <_puts_r+0xb6> 80082b8: 6823 ldr r3, [r4, #0] 80082ba: 1c5a adds r2, r3, #1 80082bc: 6022 str r2, [r4, #0] 80082be: 7019 strb r1, [r3, #0] 80082c0: e7c5 b.n 800824e <_puts_r+0x42> 80082c2: 4622 mov r2, r4 80082c4: 4628 mov r0, r5 80082c6: f000 f847 bl 8008358 <__swbuf_r> 80082ca: 3001 adds r0, #1 80082cc: d1bf bne.n 800824e <_puts_r+0x42> 80082ce: e7df b.n 8008290 <_puts_r+0x84> 80082d0: 250a movs r5, #10 80082d2: 6823 ldr r3, [r4, #0] 80082d4: 1c5a adds r2, r3, #1 80082d6: 6022 str r2, [r4, #0] 80082d8: 701d strb r5, [r3, #0] 80082da: e7db b.n 8008294 <_puts_r+0x88> 80082dc: 0800b374 .word 0x0800b374 80082e0: 0800b394 .word 0x0800b394 80082e4: 0800b354 .word 0x0800b354 080082e8 : 80082e8: 4b02 ldr r3, [pc, #8] ; (80082f4 ) 80082ea: 4601 mov r1, r0 80082ec: 6818 ldr r0, [r3, #0] 80082ee: f7ff bf8d b.w 800820c <_puts_r> 80082f2: bf00 nop 80082f4: 20000014 .word 0x20000014 080082f8 <_sbrk_r>: 80082f8: b538 push {r3, r4, r5, lr} 80082fa: 2300 movs r3, #0 80082fc: 4d05 ldr r5, [pc, #20] ; (8008314 <_sbrk_r+0x1c>) 80082fe: 4604 mov r4, r0 8008300: 4608 mov r0, r1 8008302: 602b str r3, [r5, #0] 8008304: f7f9 fb7e bl 8001a04 <_sbrk> 8008308: 1c43 adds r3, r0, #1 800830a: d102 bne.n 8008312 <_sbrk_r+0x1a> 800830c: 682b ldr r3, [r5, #0] 800830e: b103 cbz r3, 8008312 <_sbrk_r+0x1a> 8008310: 6023 str r3, [r4, #0] 8008312: bd38 pop {r3, r4, r5, pc} 8008314: 20002544 .word 0x20002544 08008318 : 8008318: b40e push {r1, r2, r3} 800831a: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000 800831e: b500 push {lr} 8008320: b09c sub sp, #112 ; 0x70 8008322: ab1d add r3, sp, #116 ; 0x74 8008324: 9002 str r0, [sp, #8] 8008326: 9006 str r0, [sp, #24] 8008328: 9107 str r1, [sp, #28] 800832a: 9104 str r1, [sp, #16] 800832c: 4808 ldr r0, [pc, #32] ; (8008350 ) 800832e: 4909 ldr r1, [pc, #36] ; (8008354 ) 8008330: f853 2b04 ldr.w r2, [r3], #4 8008334: 9105 str r1, [sp, #20] 8008336: 6800 ldr r0, [r0, #0] 8008338: a902 add r1, sp, #8 800833a: 9301 str r3, [sp, #4] 800833c: f001 fd82 bl 8009e44 <_svfiprintf_r> 8008340: 2200 movs r2, #0 8008342: 9b02 ldr r3, [sp, #8] 8008344: 701a strb r2, [r3, #0] 8008346: b01c add sp, #112 ; 0x70 8008348: f85d eb04 ldr.w lr, [sp], #4 800834c: b003 add sp, #12 800834e: 4770 bx lr 8008350: 20000014 .word 0x20000014 8008354: ffff0208 .word 0xffff0208 08008358 <__swbuf_r>: 8008358: b5f8 push {r3, r4, r5, r6, r7, lr} 800835a: 460e mov r6, r1 800835c: 4614 mov r4, r2 800835e: 4605 mov r5, r0 8008360: b118 cbz r0, 800836a <__swbuf_r+0x12> 8008362: 6983 ldr r3, [r0, #24] 8008364: b90b cbnz r3, 800836a <__swbuf_r+0x12> 8008366: f001 f84f bl 8009408 <__sinit> 800836a: 4b21 ldr r3, [pc, #132] ; (80083f0 <__swbuf_r+0x98>) 800836c: 429c cmp r4, r3 800836e: d12b bne.n 80083c8 <__swbuf_r+0x70> 8008370: 686c ldr r4, [r5, #4] 8008372: 69a3 ldr r3, [r4, #24] 8008374: 60a3 str r3, [r4, #8] 8008376: 89a3 ldrh r3, [r4, #12] 8008378: 071a lsls r2, r3, #28 800837a: d52f bpl.n 80083dc <__swbuf_r+0x84> 800837c: 6923 ldr r3, [r4, #16] 800837e: b36b cbz r3, 80083dc <__swbuf_r+0x84> 8008380: 6923 ldr r3, [r4, #16] 8008382: 6820 ldr r0, [r4, #0] 8008384: b2f6 uxtb r6, r6 8008386: 1ac0 subs r0, r0, r3 8008388: 6963 ldr r3, [r4, #20] 800838a: 4637 mov r7, r6 800838c: 4283 cmp r3, r0 800838e: dc04 bgt.n 800839a <__swbuf_r+0x42> 8008390: 4621 mov r1, r4 8008392: 4628 mov r0, r5 8008394: f000 ffa4 bl 80092e0 <_fflush_r> 8008398: bb30 cbnz r0, 80083e8 <__swbuf_r+0x90> 800839a: 68a3 ldr r3, [r4, #8] 800839c: 3001 adds r0, #1 800839e: 3b01 subs r3, #1 80083a0: 60a3 str r3, [r4, #8] 80083a2: 6823 ldr r3, [r4, #0] 80083a4: 1c5a adds r2, r3, #1 80083a6: 6022 str r2, [r4, #0] 80083a8: 701e strb r6, [r3, #0] 80083aa: 6963 ldr r3, [r4, #20] 80083ac: 4283 cmp r3, r0 80083ae: d004 beq.n 80083ba <__swbuf_r+0x62> 80083b0: 89a3 ldrh r3, [r4, #12] 80083b2: 07db lsls r3, r3, #31 80083b4: d506 bpl.n 80083c4 <__swbuf_r+0x6c> 80083b6: 2e0a cmp r6, #10 80083b8: d104 bne.n 80083c4 <__swbuf_r+0x6c> 80083ba: 4621 mov r1, r4 80083bc: 4628 mov r0, r5 80083be: f000 ff8f bl 80092e0 <_fflush_r> 80083c2: b988 cbnz r0, 80083e8 <__swbuf_r+0x90> 80083c4: 4638 mov r0, r7 80083c6: bdf8 pop {r3, r4, r5, r6, r7, pc} 80083c8: 4b0a ldr r3, [pc, #40] ; (80083f4 <__swbuf_r+0x9c>) 80083ca: 429c cmp r4, r3 80083cc: d101 bne.n 80083d2 <__swbuf_r+0x7a> 80083ce: 68ac ldr r4, [r5, #8] 80083d0: e7cf b.n 8008372 <__swbuf_r+0x1a> 80083d2: 4b09 ldr r3, [pc, #36] ; (80083f8 <__swbuf_r+0xa0>) 80083d4: 429c cmp r4, r3 80083d6: bf08 it eq 80083d8: 68ec ldreq r4, [r5, #12] 80083da: e7ca b.n 8008372 <__swbuf_r+0x1a> 80083dc: 4621 mov r1, r4 80083de: 4628 mov r0, r5 80083e0: f000 f80c bl 80083fc <__swsetup_r> 80083e4: 2800 cmp r0, #0 80083e6: d0cb beq.n 8008380 <__swbuf_r+0x28> 80083e8: f04f 37ff mov.w r7, #4294967295 ; 0xffffffff 80083ec: e7ea b.n 80083c4 <__swbuf_r+0x6c> 80083ee: bf00 nop 80083f0: 0800b374 .word 0x0800b374 80083f4: 0800b394 .word 0x0800b394 80083f8: 0800b354 .word 0x0800b354 080083fc <__swsetup_r>: 80083fc: 4b32 ldr r3, [pc, #200] ; (80084c8 <__swsetup_r+0xcc>) 80083fe: b570 push {r4, r5, r6, lr} 8008400: 681d ldr r5, [r3, #0] 8008402: 4606 mov r6, r0 8008404: 460c mov r4, r1 8008406: b125 cbz r5, 8008412 <__swsetup_r+0x16> 8008408: 69ab ldr r3, [r5, #24] 800840a: b913 cbnz r3, 8008412 <__swsetup_r+0x16> 800840c: 4628 mov r0, r5 800840e: f000 fffb bl 8009408 <__sinit> 8008412: 4b2e ldr r3, [pc, #184] ; (80084cc <__swsetup_r+0xd0>) 8008414: 429c cmp r4, r3 8008416: d10f bne.n 8008438 <__swsetup_r+0x3c> 8008418: 686c ldr r4, [r5, #4] 800841a: 89a3 ldrh r3, [r4, #12] 800841c: f9b4 200c ldrsh.w r2, [r4, #12] 8008420: 0719 lsls r1, r3, #28 8008422: d42c bmi.n 800847e <__swsetup_r+0x82> 8008424: 06dd lsls r5, r3, #27 8008426: d411 bmi.n 800844c <__swsetup_r+0x50> 8008428: 2309 movs r3, #9 800842a: 6033 str r3, [r6, #0] 800842c: f042 0340 orr.w r3, r2, #64 ; 0x40 8008430: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8008434: 81a3 strh r3, [r4, #12] 8008436: e03e b.n 80084b6 <__swsetup_r+0xba> 8008438: 4b25 ldr r3, [pc, #148] ; (80084d0 <__swsetup_r+0xd4>) 800843a: 429c cmp r4, r3 800843c: d101 bne.n 8008442 <__swsetup_r+0x46> 800843e: 68ac ldr r4, [r5, #8] 8008440: e7eb b.n 800841a <__swsetup_r+0x1e> 8008442: 4b24 ldr r3, [pc, #144] ; (80084d4 <__swsetup_r+0xd8>) 8008444: 429c cmp r4, r3 8008446: bf08 it eq 8008448: 68ec ldreq r4, [r5, #12] 800844a: e7e6 b.n 800841a <__swsetup_r+0x1e> 800844c: 0758 lsls r0, r3, #29 800844e: d512 bpl.n 8008476 <__swsetup_r+0x7a> 8008450: 6b61 ldr r1, [r4, #52] ; 0x34 8008452: b141 cbz r1, 8008466 <__swsetup_r+0x6a> 8008454: f104 0344 add.w r3, r4, #68 ; 0x44 8008458: 4299 cmp r1, r3 800845a: d002 beq.n 8008462 <__swsetup_r+0x66> 800845c: 4630 mov r0, r6 800845e: f7ff f9a3 bl 80077a8 <_free_r> 8008462: 2300 movs r3, #0 8008464: 6363 str r3, [r4, #52] ; 0x34 8008466: 89a3 ldrh r3, [r4, #12] 8008468: f023 0324 bic.w r3, r3, #36 ; 0x24 800846c: 81a3 strh r3, [r4, #12] 800846e: 2300 movs r3, #0 8008470: 6063 str r3, [r4, #4] 8008472: 6923 ldr r3, [r4, #16] 8008474: 6023 str r3, [r4, #0] 8008476: 89a3 ldrh r3, [r4, #12] 8008478: f043 0308 orr.w r3, r3, #8 800847c: 81a3 strh r3, [r4, #12] 800847e: 6923 ldr r3, [r4, #16] 8008480: b94b cbnz r3, 8008496 <__swsetup_r+0x9a> 8008482: 89a3 ldrh r3, [r4, #12] 8008484: f403 7320 and.w r3, r3, #640 ; 0x280 8008488: f5b3 7f00 cmp.w r3, #512 ; 0x200 800848c: d003 beq.n 8008496 <__swsetup_r+0x9a> 800848e: 4621 mov r1, r4 8008490: 4630 mov r0, r6 8008492: f001 f883 bl 800959c <__smakebuf_r> 8008496: 89a0 ldrh r0, [r4, #12] 8008498: f9b4 200c ldrsh.w r2, [r4, #12] 800849c: f010 0301 ands.w r3, r0, #1 80084a0: d00a beq.n 80084b8 <__swsetup_r+0xbc> 80084a2: 2300 movs r3, #0 80084a4: 60a3 str r3, [r4, #8] 80084a6: 6963 ldr r3, [r4, #20] 80084a8: 425b negs r3, r3 80084aa: 61a3 str r3, [r4, #24] 80084ac: 6923 ldr r3, [r4, #16] 80084ae: b943 cbnz r3, 80084c2 <__swsetup_r+0xc6> 80084b0: f010 0080 ands.w r0, r0, #128 ; 0x80 80084b4: d1ba bne.n 800842c <__swsetup_r+0x30> 80084b6: bd70 pop {r4, r5, r6, pc} 80084b8: 0781 lsls r1, r0, #30 80084ba: bf58 it pl 80084bc: 6963 ldrpl r3, [r4, #20] 80084be: 60a3 str r3, [r4, #8] 80084c0: e7f4 b.n 80084ac <__swsetup_r+0xb0> 80084c2: 2000 movs r0, #0 80084c4: e7f7 b.n 80084b6 <__swsetup_r+0xba> 80084c6: bf00 nop 80084c8: 20000014 .word 0x20000014 80084cc: 0800b374 .word 0x0800b374 80084d0: 0800b394 .word 0x0800b394 80084d4: 0800b354 .word 0x0800b354 080084d8 : 80084d8: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 80084dc: 6903 ldr r3, [r0, #16] 80084de: 690c ldr r4, [r1, #16] 80084e0: 4607 mov r7, r0 80084e2: 42a3 cmp r3, r4 80084e4: f2c0 8083 blt.w 80085ee 80084e8: 3c01 subs r4, #1 80084ea: f100 0514 add.w r5, r0, #20 80084ee: f101 0814 add.w r8, r1, #20 80084f2: eb05 0384 add.w r3, r5, r4, lsl #2 80084f6: 9301 str r3, [sp, #4] 80084f8: f858 3024 ldr.w r3, [r8, r4, lsl #2] 80084fc: f855 2024 ldr.w r2, [r5, r4, lsl #2] 8008500: 3301 adds r3, #1 8008502: 429a cmp r2, r3 8008504: fbb2 f6f3 udiv r6, r2, r3 8008508: ea4f 0b84 mov.w fp, r4, lsl #2 800850c: eb08 0984 add.w r9, r8, r4, lsl #2 8008510: d332 bcc.n 8008578 8008512: f04f 0e00 mov.w lr, #0 8008516: 4640 mov r0, r8 8008518: 46ac mov ip, r5 800851a: 46f2 mov sl, lr 800851c: f850 2b04 ldr.w r2, [r0], #4 8008520: b293 uxth r3, r2 8008522: fb06 e303 mla r3, r6, r3, lr 8008526: 0c12 lsrs r2, r2, #16 8008528: ea4f 4e13 mov.w lr, r3, lsr #16 800852c: fb06 e202 mla r2, r6, r2, lr 8008530: b29b uxth r3, r3 8008532: ebaa 0303 sub.w r3, sl, r3 8008536: f8dc a000 ldr.w sl, [ip] 800853a: ea4f 4e12 mov.w lr, r2, lsr #16 800853e: fa1f fa8a uxth.w sl, sl 8008542: 4453 add r3, sl 8008544: fa1f fa82 uxth.w sl, r2 8008548: f8dc 2000 ldr.w r2, [ip] 800854c: 4581 cmp r9, r0 800854e: ebca 4212 rsb r2, sl, r2, lsr #16 8008552: eb02 4223 add.w r2, r2, r3, asr #16 8008556: b29b uxth r3, r3 8008558: ea43 4302 orr.w r3, r3, r2, lsl #16 800855c: ea4f 4a22 mov.w sl, r2, asr #16 8008560: f84c 3b04 str.w r3, [ip], #4 8008564: d2da bcs.n 800851c 8008566: f855 300b ldr.w r3, [r5, fp] 800856a: b92b cbnz r3, 8008578 800856c: 9b01 ldr r3, [sp, #4] 800856e: 3b04 subs r3, #4 8008570: 429d cmp r5, r3 8008572: 461a mov r2, r3 8008574: d32f bcc.n 80085d6 8008576: 613c str r4, [r7, #16] 8008578: 4638 mov r0, r7 800857a: f001 faf1 bl 8009b60 <__mcmp> 800857e: 2800 cmp r0, #0 8008580: db25 blt.n 80085ce 8008582: 4628 mov r0, r5 8008584: f04f 0c00 mov.w ip, #0 8008588: 3601 adds r6, #1 800858a: f858 1b04 ldr.w r1, [r8], #4 800858e: f8d0 e000 ldr.w lr, [r0] 8008592: b28b uxth r3, r1 8008594: ebac 0303 sub.w r3, ip, r3 8008598: fa1f f28e uxth.w r2, lr 800859c: 4413 add r3, r2 800859e: 0c0a lsrs r2, r1, #16 80085a0: ebc2 421e rsb r2, r2, lr, lsr #16 80085a4: eb02 4223 add.w r2, r2, r3, asr #16 80085a8: b29b uxth r3, r3 80085aa: ea43 4302 orr.w r3, r3, r2, lsl #16 80085ae: 45c1 cmp r9, r8 80085b0: ea4f 4c22 mov.w ip, r2, asr #16 80085b4: f840 3b04 str.w r3, [r0], #4 80085b8: d2e7 bcs.n 800858a 80085ba: f855 2024 ldr.w r2, [r5, r4, lsl #2] 80085be: eb05 0384 add.w r3, r5, r4, lsl #2 80085c2: b922 cbnz r2, 80085ce 80085c4: 3b04 subs r3, #4 80085c6: 429d cmp r5, r3 80085c8: 461a mov r2, r3 80085ca: d30a bcc.n 80085e2 80085cc: 613c str r4, [r7, #16] 80085ce: 4630 mov r0, r6 80085d0: b003 add sp, #12 80085d2: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80085d6: 6812 ldr r2, [r2, #0] 80085d8: 3b04 subs r3, #4 80085da: 2a00 cmp r2, #0 80085dc: d1cb bne.n 8008576 80085de: 3c01 subs r4, #1 80085e0: e7c6 b.n 8008570 80085e2: 6812 ldr r2, [r2, #0] 80085e4: 3b04 subs r3, #4 80085e6: 2a00 cmp r2, #0 80085e8: d1f0 bne.n 80085cc 80085ea: 3c01 subs r4, #1 80085ec: e7eb b.n 80085c6 80085ee: 2000 movs r0, #0 80085f0: e7ee b.n 80085d0 80085f2: 0000 movs r0, r0 80085f4: 0000 movs r0, r0 ... 080085f8 <_dtoa_r>: 80085f8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80085fc: 4616 mov r6, r2 80085fe: 461f mov r7, r3 8008600: 6a44 ldr r4, [r0, #36] ; 0x24 8008602: b099 sub sp, #100 ; 0x64 8008604: 4605 mov r5, r0 8008606: e9cd 6704 strd r6, r7, [sp, #16] 800860a: f8dd 8094 ldr.w r8, [sp, #148] ; 0x94 800860e: b974 cbnz r4, 800862e <_dtoa_r+0x36> 8008610: 2010 movs r0, #16 8008612: f7ff f8b1 bl 8007778 8008616: 4602 mov r2, r0 8008618: 6268 str r0, [r5, #36] ; 0x24 800861a: b920 cbnz r0, 8008626 <_dtoa_r+0x2e> 800861c: 21ea movs r1, #234 ; 0xea 800861e: 4bae ldr r3, [pc, #696] ; (80088d8 <_dtoa_r+0x2e0>) 8008620: 48ae ldr r0, [pc, #696] ; (80088dc <_dtoa_r+0x2e4>) 8008622: f001 ff05 bl 800a430 <__assert_func> 8008626: e9c0 4401 strd r4, r4, [r0, #4] 800862a: 6004 str r4, [r0, #0] 800862c: 60c4 str r4, [r0, #12] 800862e: 6a6b ldr r3, [r5, #36] ; 0x24 8008630: 6819 ldr r1, [r3, #0] 8008632: b151 cbz r1, 800864a <_dtoa_r+0x52> 8008634: 685a ldr r2, [r3, #4] 8008636: 2301 movs r3, #1 8008638: 4093 lsls r3, r2 800863a: 604a str r2, [r1, #4] 800863c: 608b str r3, [r1, #8] 800863e: 4628 mov r0, r5 8008640: f001 f854 bl 80096ec <_Bfree> 8008644: 2200 movs r2, #0 8008646: 6a6b ldr r3, [r5, #36] ; 0x24 8008648: 601a str r2, [r3, #0] 800864a: 1e3b subs r3, r7, #0 800864c: bfaf iteee ge 800864e: 2300 movge r3, #0 8008650: 2201 movlt r2, #1 8008652: f023 4300 biclt.w r3, r3, #2147483648 ; 0x80000000 8008656: 9305 strlt r3, [sp, #20] 8008658: bfa8 it ge 800865a: f8c8 3000 strge.w r3, [r8] 800865e: f8dd 9014 ldr.w r9, [sp, #20] 8008662: 4b9f ldr r3, [pc, #636] ; (80088e0 <_dtoa_r+0x2e8>) 8008664: bfb8 it lt 8008666: f8c8 2000 strlt.w r2, [r8] 800866a: ea33 0309 bics.w r3, r3, r9 800866e: d119 bne.n 80086a4 <_dtoa_r+0xac> 8008670: f242 730f movw r3, #9999 ; 0x270f 8008674: 9a24 ldr r2, [sp, #144] ; 0x90 8008676: 6013 str r3, [r2, #0] 8008678: f3c9 0313 ubfx r3, r9, #0, #20 800867c: 4333 orrs r3, r6 800867e: f000 8580 beq.w 8009182 <_dtoa_r+0xb8a> 8008682: 9b26 ldr r3, [sp, #152] ; 0x98 8008684: b953 cbnz r3, 800869c <_dtoa_r+0xa4> 8008686: 4b97 ldr r3, [pc, #604] ; (80088e4 <_dtoa_r+0x2ec>) 8008688: e022 b.n 80086d0 <_dtoa_r+0xd8> 800868a: 4b97 ldr r3, [pc, #604] ; (80088e8 <_dtoa_r+0x2f0>) 800868c: 9308 str r3, [sp, #32] 800868e: 3308 adds r3, #8 8008690: 9a26 ldr r2, [sp, #152] ; 0x98 8008692: 6013 str r3, [r2, #0] 8008694: 9808 ldr r0, [sp, #32] 8008696: b019 add sp, #100 ; 0x64 8008698: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800869c: 4b91 ldr r3, [pc, #580] ; (80088e4 <_dtoa_r+0x2ec>) 800869e: 9308 str r3, [sp, #32] 80086a0: 3303 adds r3, #3 80086a2: e7f5 b.n 8008690 <_dtoa_r+0x98> 80086a4: e9dd 3404 ldrd r3, r4, [sp, #16] 80086a8: e9cd 340c strd r3, r4, [sp, #48] ; 0x30 80086ac: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 80086b0: 2200 movs r2, #0 80086b2: 2300 movs r3, #0 80086b4: f7f8 f9e4 bl 8000a80 <__aeabi_dcmpeq> 80086b8: 4680 mov r8, r0 80086ba: b158 cbz r0, 80086d4 <_dtoa_r+0xdc> 80086bc: 2301 movs r3, #1 80086be: 9a24 ldr r2, [sp, #144] ; 0x90 80086c0: 6013 str r3, [r2, #0] 80086c2: 9b26 ldr r3, [sp, #152] ; 0x98 80086c4: 2b00 cmp r3, #0 80086c6: f000 8559 beq.w 800917c <_dtoa_r+0xb84> 80086ca: 4888 ldr r0, [pc, #544] ; (80088ec <_dtoa_r+0x2f4>) 80086cc: 6018 str r0, [r3, #0] 80086ce: 1e43 subs r3, r0, #1 80086d0: 9308 str r3, [sp, #32] 80086d2: e7df b.n 8008694 <_dtoa_r+0x9c> 80086d4: ab16 add r3, sp, #88 ; 0x58 80086d6: 9301 str r3, [sp, #4] 80086d8: ab17 add r3, sp, #92 ; 0x5c 80086da: 9300 str r3, [sp, #0] 80086dc: 4628 mov r0, r5 80086de: e9dd 230c ldrd r2, r3, [sp, #48] ; 0x30 80086e2: f001 fae9 bl 8009cb8 <__d2b> 80086e6: f3c9 540a ubfx r4, r9, #20, #11 80086ea: 4682 mov sl, r0 80086ec: 2c00 cmp r4, #0 80086ee: d07e beq.n 80087ee <_dtoa_r+0x1f6> 80086f0: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 80086f4: 9b0d ldr r3, [sp, #52] ; 0x34 80086f6: f2a4 34ff subw r4, r4, #1023 ; 0x3ff 80086fa: f3c3 0313 ubfx r3, r3, #0, #20 80086fe: f043 517f orr.w r1, r3, #1069547520 ; 0x3fc00000 8008702: f441 1140 orr.w r1, r1, #3145728 ; 0x300000 8008706: f8cd 804c str.w r8, [sp, #76] ; 0x4c 800870a: 2200 movs r2, #0 800870c: 4b78 ldr r3, [pc, #480] ; (80088f0 <_dtoa_r+0x2f8>) 800870e: f7f7 fd97 bl 8000240 <__aeabi_dsub> 8008712: a36b add r3, pc, #428 ; (adr r3, 80088c0 <_dtoa_r+0x2c8>) 8008714: e9d3 2300 ldrd r2, r3, [r3] 8008718: f7f7 ff4a bl 80005b0 <__aeabi_dmul> 800871c: a36a add r3, pc, #424 ; (adr r3, 80088c8 <_dtoa_r+0x2d0>) 800871e: e9d3 2300 ldrd r2, r3, [r3] 8008722: f7f7 fd8f bl 8000244 <__adddf3> 8008726: 4606 mov r6, r0 8008728: 4620 mov r0, r4 800872a: 460f mov r7, r1 800872c: f7f7 fed6 bl 80004dc <__aeabi_i2d> 8008730: a367 add r3, pc, #412 ; (adr r3, 80088d0 <_dtoa_r+0x2d8>) 8008732: e9d3 2300 ldrd r2, r3, [r3] 8008736: f7f7 ff3b bl 80005b0 <__aeabi_dmul> 800873a: 4602 mov r2, r0 800873c: 460b mov r3, r1 800873e: 4630 mov r0, r6 8008740: 4639 mov r1, r7 8008742: f7f7 fd7f bl 8000244 <__adddf3> 8008746: 4606 mov r6, r0 8008748: 460f mov r7, r1 800874a: f7f8 f9e1 bl 8000b10 <__aeabi_d2iz> 800874e: 2200 movs r2, #0 8008750: 4681 mov r9, r0 8008752: 2300 movs r3, #0 8008754: 4630 mov r0, r6 8008756: 4639 mov r1, r7 8008758: f7f8 f99c bl 8000a94 <__aeabi_dcmplt> 800875c: b148 cbz r0, 8008772 <_dtoa_r+0x17a> 800875e: 4648 mov r0, r9 8008760: f7f7 febc bl 80004dc <__aeabi_i2d> 8008764: 4632 mov r2, r6 8008766: 463b mov r3, r7 8008768: f7f8 f98a bl 8000a80 <__aeabi_dcmpeq> 800876c: b908 cbnz r0, 8008772 <_dtoa_r+0x17a> 800876e: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff 8008772: f1b9 0f16 cmp.w r9, #22 8008776: d857 bhi.n 8008828 <_dtoa_r+0x230> 8008778: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 800877c: 4b5d ldr r3, [pc, #372] ; (80088f4 <_dtoa_r+0x2fc>) 800877e: eb03 03c9 add.w r3, r3, r9, lsl #3 8008782: e9d3 2300 ldrd r2, r3, [r3] 8008786: f7f8 f985 bl 8000a94 <__aeabi_dcmplt> 800878a: 2800 cmp r0, #0 800878c: d04e beq.n 800882c <_dtoa_r+0x234> 800878e: 2300 movs r3, #0 8008790: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff 8008794: 930f str r3, [sp, #60] ; 0x3c 8008796: 9b16 ldr r3, [sp, #88] ; 0x58 8008798: 1b1c subs r4, r3, r4 800879a: 1e63 subs r3, r4, #1 800879c: 9309 str r3, [sp, #36] ; 0x24 800879e: bf49 itett mi 80087a0: f1c4 0301 rsbmi r3, r4, #1 80087a4: 2300 movpl r3, #0 80087a6: 9306 strmi r3, [sp, #24] 80087a8: 2300 movmi r3, #0 80087aa: bf54 ite pl 80087ac: 9306 strpl r3, [sp, #24] 80087ae: 9309 strmi r3, [sp, #36] ; 0x24 80087b0: f1b9 0f00 cmp.w r9, #0 80087b4: db3c blt.n 8008830 <_dtoa_r+0x238> 80087b6: 9b09 ldr r3, [sp, #36] ; 0x24 80087b8: f8cd 9038 str.w r9, [sp, #56] ; 0x38 80087bc: 444b add r3, r9 80087be: 9309 str r3, [sp, #36] ; 0x24 80087c0: 2300 movs r3, #0 80087c2: 930a str r3, [sp, #40] ; 0x28 80087c4: 9b22 ldr r3, [sp, #136] ; 0x88 80087c6: 2b09 cmp r3, #9 80087c8: d86c bhi.n 80088a4 <_dtoa_r+0x2ac> 80087ca: 2b05 cmp r3, #5 80087cc: bfc4 itt gt 80087ce: 3b04 subgt r3, #4 80087d0: 9322 strgt r3, [sp, #136] ; 0x88 80087d2: 9b22 ldr r3, [sp, #136] ; 0x88 80087d4: bfc8 it gt 80087d6: 2400 movgt r4, #0 80087d8: f1a3 0302 sub.w r3, r3, #2 80087dc: bfd8 it le 80087de: 2401 movle r4, #1 80087e0: 2b03 cmp r3, #3 80087e2: f200 808b bhi.w 80088fc <_dtoa_r+0x304> 80087e6: e8df f003 tbb [pc, r3] 80087ea: 4f2d .short 0x4f2d 80087ec: 5b4d .short 0x5b4d 80087ee: e9dd 4316 ldrd r4, r3, [sp, #88] ; 0x58 80087f2: 441c add r4, r3 80087f4: f204 4332 addw r3, r4, #1074 ; 0x432 80087f8: 2b20 cmp r3, #32 80087fa: bfc3 ittte gt 80087fc: f1c3 0340 rsbgt r3, r3, #64 ; 0x40 8008800: f204 4012 addwgt r0, r4, #1042 ; 0x412 8008804: fa09 f303 lslgt.w r3, r9, r3 8008808: f1c3 0320 rsble r3, r3, #32 800880c: bfc6 itte gt 800880e: fa26 f000 lsrgt.w r0, r6, r0 8008812: 4318 orrgt r0, r3 8008814: fa06 f003 lslle.w r0, r6, r3 8008818: f7f7 fe50 bl 80004bc <__aeabi_ui2d> 800881c: 2301 movs r3, #1 800881e: f1a1 71f8 sub.w r1, r1, #32505856 ; 0x1f00000 8008822: 3c01 subs r4, #1 8008824: 9313 str r3, [sp, #76] ; 0x4c 8008826: e770 b.n 800870a <_dtoa_r+0x112> 8008828: 2301 movs r3, #1 800882a: e7b3 b.n 8008794 <_dtoa_r+0x19c> 800882c: 900f str r0, [sp, #60] ; 0x3c 800882e: e7b2 b.n 8008796 <_dtoa_r+0x19e> 8008830: 9b06 ldr r3, [sp, #24] 8008832: eba3 0309 sub.w r3, r3, r9 8008836: 9306 str r3, [sp, #24] 8008838: f1c9 0300 rsb r3, r9, #0 800883c: 930a str r3, [sp, #40] ; 0x28 800883e: 2300 movs r3, #0 8008840: 930e str r3, [sp, #56] ; 0x38 8008842: e7bf b.n 80087c4 <_dtoa_r+0x1cc> 8008844: 2300 movs r3, #0 8008846: 930b str r3, [sp, #44] ; 0x2c 8008848: 9b23 ldr r3, [sp, #140] ; 0x8c 800884a: 2b00 cmp r3, #0 800884c: dc59 bgt.n 8008902 <_dtoa_r+0x30a> 800884e: f04f 0b01 mov.w fp, #1 8008852: 465b mov r3, fp 8008854: f8cd b008 str.w fp, [sp, #8] 8008858: f8cd b08c str.w fp, [sp, #140] ; 0x8c 800885c: 2200 movs r2, #0 800885e: 6a68 ldr r0, [r5, #36] ; 0x24 8008860: 6042 str r2, [r0, #4] 8008862: 2204 movs r2, #4 8008864: f102 0614 add.w r6, r2, #20 8008868: 429e cmp r6, r3 800886a: 6841 ldr r1, [r0, #4] 800886c: d94f bls.n 800890e <_dtoa_r+0x316> 800886e: 4628 mov r0, r5 8008870: f000 fefc bl 800966c <_Balloc> 8008874: 9008 str r0, [sp, #32] 8008876: 2800 cmp r0, #0 8008878: d14d bne.n 8008916 <_dtoa_r+0x31e> 800887a: 4602 mov r2, r0 800887c: f44f 71d5 mov.w r1, #426 ; 0x1aa 8008880: 4b1d ldr r3, [pc, #116] ; (80088f8 <_dtoa_r+0x300>) 8008882: e6cd b.n 8008620 <_dtoa_r+0x28> 8008884: 2301 movs r3, #1 8008886: e7de b.n 8008846 <_dtoa_r+0x24e> 8008888: 2300 movs r3, #0 800888a: 930b str r3, [sp, #44] ; 0x2c 800888c: 9b23 ldr r3, [sp, #140] ; 0x8c 800888e: eb09 0b03 add.w fp, r9, r3 8008892: f10b 0301 add.w r3, fp, #1 8008896: 2b01 cmp r3, #1 8008898: 9302 str r3, [sp, #8] 800889a: bfb8 it lt 800889c: 2301 movlt r3, #1 800889e: e7dd b.n 800885c <_dtoa_r+0x264> 80088a0: 2301 movs r3, #1 80088a2: e7f2 b.n 800888a <_dtoa_r+0x292> 80088a4: 2401 movs r4, #1 80088a6: 2300 movs r3, #0 80088a8: 940b str r4, [sp, #44] ; 0x2c 80088aa: 9322 str r3, [sp, #136] ; 0x88 80088ac: f04f 3bff mov.w fp, #4294967295 ; 0xffffffff 80088b0: 2200 movs r2, #0 80088b2: 2312 movs r3, #18 80088b4: f8cd b008 str.w fp, [sp, #8] 80088b8: 9223 str r2, [sp, #140] ; 0x8c 80088ba: e7cf b.n 800885c <_dtoa_r+0x264> 80088bc: f3af 8000 nop.w 80088c0: 636f4361 .word 0x636f4361 80088c4: 3fd287a7 .word 0x3fd287a7 80088c8: 8b60c8b3 .word 0x8b60c8b3 80088cc: 3fc68a28 .word 0x3fc68a28 80088d0: 509f79fb .word 0x509f79fb 80088d4: 3fd34413 .word 0x3fd34413 80088d8: 0800b2cd .word 0x0800b2cd 80088dc: 0800b2e4 .word 0x0800b2e4 80088e0: 7ff00000 .word 0x7ff00000 80088e4: 0800b2c9 .word 0x0800b2c9 80088e8: 0800b2c0 .word 0x0800b2c0 80088ec: 0800b29d .word 0x0800b29d 80088f0: 3ff80000 .word 0x3ff80000 80088f4: 0800b440 .word 0x0800b440 80088f8: 0800b343 .word 0x0800b343 80088fc: 2301 movs r3, #1 80088fe: 930b str r3, [sp, #44] ; 0x2c 8008900: e7d4 b.n 80088ac <_dtoa_r+0x2b4> 8008902: f8dd b08c ldr.w fp, [sp, #140] ; 0x8c 8008906: 465b mov r3, fp 8008908: f8cd b008 str.w fp, [sp, #8] 800890c: e7a6 b.n 800885c <_dtoa_r+0x264> 800890e: 3101 adds r1, #1 8008910: 6041 str r1, [r0, #4] 8008912: 0052 lsls r2, r2, #1 8008914: e7a6 b.n 8008864 <_dtoa_r+0x26c> 8008916: 6a6b ldr r3, [r5, #36] ; 0x24 8008918: 9a08 ldr r2, [sp, #32] 800891a: 601a str r2, [r3, #0] 800891c: 9b02 ldr r3, [sp, #8] 800891e: 2b0e cmp r3, #14 8008920: f200 80a8 bhi.w 8008a74 <_dtoa_r+0x47c> 8008924: 2c00 cmp r4, #0 8008926: f000 80a5 beq.w 8008a74 <_dtoa_r+0x47c> 800892a: f1b9 0f00 cmp.w r9, #0 800892e: dd34 ble.n 800899a <_dtoa_r+0x3a2> 8008930: 4a9a ldr r2, [pc, #616] ; (8008b9c <_dtoa_r+0x5a4>) 8008932: f009 030f and.w r3, r9, #15 8008936: eb02 03c3 add.w r3, r2, r3, lsl #3 800893a: f419 7f80 tst.w r9, #256 ; 0x100 800893e: e9d3 3400 ldrd r3, r4, [r3] 8008942: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40 8008946: ea4f 1429 mov.w r4, r9, asr #4 800894a: d016 beq.n 800897a <_dtoa_r+0x382> 800894c: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 8008950: 4b93 ldr r3, [pc, #588] ; (8008ba0 <_dtoa_r+0x5a8>) 8008952: 2703 movs r7, #3 8008954: e9d3 2308 ldrd r2, r3, [r3, #32] 8008958: f7f7 ff54 bl 8000804 <__aeabi_ddiv> 800895c: e9cd 0104 strd r0, r1, [sp, #16] 8008960: f004 040f and.w r4, r4, #15 8008964: 4e8e ldr r6, [pc, #568] ; (8008ba0 <_dtoa_r+0x5a8>) 8008966: b954 cbnz r4, 800897e <_dtoa_r+0x386> 8008968: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 800896c: e9dd 0104 ldrd r0, r1, [sp, #16] 8008970: f7f7 ff48 bl 8000804 <__aeabi_ddiv> 8008974: e9cd 0104 strd r0, r1, [sp, #16] 8008978: e029 b.n 80089ce <_dtoa_r+0x3d6> 800897a: 2702 movs r7, #2 800897c: e7f2 b.n 8008964 <_dtoa_r+0x36c> 800897e: 07e1 lsls r1, r4, #31 8008980: d508 bpl.n 8008994 <_dtoa_r+0x39c> 8008982: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 8008986: e9d6 2300 ldrd r2, r3, [r6] 800898a: f7f7 fe11 bl 80005b0 <__aeabi_dmul> 800898e: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 8008992: 3701 adds r7, #1 8008994: 1064 asrs r4, r4, #1 8008996: 3608 adds r6, #8 8008998: e7e5 b.n 8008966 <_dtoa_r+0x36e> 800899a: f000 80a5 beq.w 8008ae8 <_dtoa_r+0x4f0> 800899e: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 80089a2: f1c9 0400 rsb r4, r9, #0 80089a6: 4b7d ldr r3, [pc, #500] ; (8008b9c <_dtoa_r+0x5a4>) 80089a8: f004 020f and.w r2, r4, #15 80089ac: eb03 03c2 add.w r3, r3, r2, lsl #3 80089b0: e9d3 2300 ldrd r2, r3, [r3] 80089b4: f7f7 fdfc bl 80005b0 <__aeabi_dmul> 80089b8: 2702 movs r7, #2 80089ba: 2300 movs r3, #0 80089bc: e9cd 0104 strd r0, r1, [sp, #16] 80089c0: 4e77 ldr r6, [pc, #476] ; (8008ba0 <_dtoa_r+0x5a8>) 80089c2: 1124 asrs r4, r4, #4 80089c4: 2c00 cmp r4, #0 80089c6: f040 8084 bne.w 8008ad2 <_dtoa_r+0x4da> 80089ca: 2b00 cmp r3, #0 80089cc: d1d2 bne.n 8008974 <_dtoa_r+0x37c> 80089ce: 9b0f ldr r3, [sp, #60] ; 0x3c 80089d0: 2b00 cmp r3, #0 80089d2: f000 808b beq.w 8008aec <_dtoa_r+0x4f4> 80089d6: e9dd 3404 ldrd r3, r4, [sp, #16] 80089da: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40 80089de: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 80089e2: 2200 movs r2, #0 80089e4: 4b6f ldr r3, [pc, #444] ; (8008ba4 <_dtoa_r+0x5ac>) 80089e6: f7f8 f855 bl 8000a94 <__aeabi_dcmplt> 80089ea: 2800 cmp r0, #0 80089ec: d07e beq.n 8008aec <_dtoa_r+0x4f4> 80089ee: 9b02 ldr r3, [sp, #8] 80089f0: 2b00 cmp r3, #0 80089f2: d07b beq.n 8008aec <_dtoa_r+0x4f4> 80089f4: f1bb 0f00 cmp.w fp, #0 80089f8: dd38 ble.n 8008a6c <_dtoa_r+0x474> 80089fa: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 80089fe: 2200 movs r2, #0 8008a00: 4b69 ldr r3, [pc, #420] ; (8008ba8 <_dtoa_r+0x5b0>) 8008a02: f7f7 fdd5 bl 80005b0 <__aeabi_dmul> 8008a06: 465c mov r4, fp 8008a08: e9cd 0104 strd r0, r1, [sp, #16] 8008a0c: f109 38ff add.w r8, r9, #4294967295 ; 0xffffffff 8008a10: 3701 adds r7, #1 8008a12: 4638 mov r0, r7 8008a14: f7f7 fd62 bl 80004dc <__aeabi_i2d> 8008a18: e9dd 2304 ldrd r2, r3, [sp, #16] 8008a1c: f7f7 fdc8 bl 80005b0 <__aeabi_dmul> 8008a20: 2200 movs r2, #0 8008a22: 4b62 ldr r3, [pc, #392] ; (8008bac <_dtoa_r+0x5b4>) 8008a24: f7f7 fc0e bl 8000244 <__adddf3> 8008a28: f1a1 7650 sub.w r6, r1, #54525952 ; 0x3400000 8008a2c: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 8008a30: 9611 str r6, [sp, #68] ; 0x44 8008a32: 2c00 cmp r4, #0 8008a34: d15d bne.n 8008af2 <_dtoa_r+0x4fa> 8008a36: e9dd 0104 ldrd r0, r1, [sp, #16] 8008a3a: 2200 movs r2, #0 8008a3c: 4b5c ldr r3, [pc, #368] ; (8008bb0 <_dtoa_r+0x5b8>) 8008a3e: f7f7 fbff bl 8000240 <__aeabi_dsub> 8008a42: 4602 mov r2, r0 8008a44: 460b mov r3, r1 8008a46: e9cd 2304 strd r2, r3, [sp, #16] 8008a4a: 4633 mov r3, r6 8008a4c: 9a10 ldr r2, [sp, #64] ; 0x40 8008a4e: f7f8 f83f bl 8000ad0 <__aeabi_dcmpgt> 8008a52: 2800 cmp r0, #0 8008a54: f040 829e bne.w 8008f94 <_dtoa_r+0x99c> 8008a58: e9dd 0104 ldrd r0, r1, [sp, #16] 8008a5c: 9a10 ldr r2, [sp, #64] ; 0x40 8008a5e: f106 4300 add.w r3, r6, #2147483648 ; 0x80000000 8008a62: f7f8 f817 bl 8000a94 <__aeabi_dcmplt> 8008a66: 2800 cmp r0, #0 8008a68: f040 8292 bne.w 8008f90 <_dtoa_r+0x998> 8008a6c: e9dd 340c ldrd r3, r4, [sp, #48] ; 0x30 8008a70: e9cd 3404 strd r3, r4, [sp, #16] 8008a74: 9b17 ldr r3, [sp, #92] ; 0x5c 8008a76: 2b00 cmp r3, #0 8008a78: f2c0 8153 blt.w 8008d22 <_dtoa_r+0x72a> 8008a7c: f1b9 0f0e cmp.w r9, #14 8008a80: f300 814f bgt.w 8008d22 <_dtoa_r+0x72a> 8008a84: 4b45 ldr r3, [pc, #276] ; (8008b9c <_dtoa_r+0x5a4>) 8008a86: eb03 03c9 add.w r3, r3, r9, lsl #3 8008a8a: e9d3 3400 ldrd r3, r4, [r3] 8008a8e: e9cd 3406 strd r3, r4, [sp, #24] 8008a92: 9b23 ldr r3, [sp, #140] ; 0x8c 8008a94: 2b00 cmp r3, #0 8008a96: f280 80db bge.w 8008c50 <_dtoa_r+0x658> 8008a9a: 9b02 ldr r3, [sp, #8] 8008a9c: 2b00 cmp r3, #0 8008a9e: f300 80d7 bgt.w 8008c50 <_dtoa_r+0x658> 8008aa2: f040 8274 bne.w 8008f8e <_dtoa_r+0x996> 8008aa6: e9dd 0106 ldrd r0, r1, [sp, #24] 8008aaa: 2200 movs r2, #0 8008aac: 4b40 ldr r3, [pc, #256] ; (8008bb0 <_dtoa_r+0x5b8>) 8008aae: f7f7 fd7f bl 80005b0 <__aeabi_dmul> 8008ab2: e9dd 2304 ldrd r2, r3, [sp, #16] 8008ab6: f7f8 f801 bl 8000abc <__aeabi_dcmpge> 8008aba: 9c02 ldr r4, [sp, #8] 8008abc: 4626 mov r6, r4 8008abe: 2800 cmp r0, #0 8008ac0: f040 824a bne.w 8008f58 <_dtoa_r+0x960> 8008ac4: 2331 movs r3, #49 ; 0x31 8008ac6: 9f08 ldr r7, [sp, #32] 8008ac8: f109 0901 add.w r9, r9, #1 8008acc: f807 3b01 strb.w r3, [r7], #1 8008ad0: e246 b.n 8008f60 <_dtoa_r+0x968> 8008ad2: 07e2 lsls r2, r4, #31 8008ad4: d505 bpl.n 8008ae2 <_dtoa_r+0x4ea> 8008ad6: e9d6 2300 ldrd r2, r3, [r6] 8008ada: f7f7 fd69 bl 80005b0 <__aeabi_dmul> 8008ade: 2301 movs r3, #1 8008ae0: 3701 adds r7, #1 8008ae2: 1064 asrs r4, r4, #1 8008ae4: 3608 adds r6, #8 8008ae6: e76d b.n 80089c4 <_dtoa_r+0x3cc> 8008ae8: 2702 movs r7, #2 8008aea: e770 b.n 80089ce <_dtoa_r+0x3d6> 8008aec: 46c8 mov r8, r9 8008aee: 9c02 ldr r4, [sp, #8] 8008af0: e78f b.n 8008a12 <_dtoa_r+0x41a> 8008af2: 9908 ldr r1, [sp, #32] 8008af4: 4b29 ldr r3, [pc, #164] ; (8008b9c <_dtoa_r+0x5a4>) 8008af6: 4421 add r1, r4 8008af8: 9112 str r1, [sp, #72] ; 0x48 8008afa: 990b ldr r1, [sp, #44] ; 0x2c 8008afc: eb03 03c4 add.w r3, r3, r4, lsl #3 8008b00: e9dd 6710 ldrd r6, r7, [sp, #64] ; 0x40 8008b04: e953 2302 ldrd r2, r3, [r3, #-8] 8008b08: 2900 cmp r1, #0 8008b0a: d055 beq.n 8008bb8 <_dtoa_r+0x5c0> 8008b0c: 2000 movs r0, #0 8008b0e: 4929 ldr r1, [pc, #164] ; (8008bb4 <_dtoa_r+0x5bc>) 8008b10: f7f7 fe78 bl 8000804 <__aeabi_ddiv> 8008b14: 463b mov r3, r7 8008b16: 4632 mov r2, r6 8008b18: f7f7 fb92 bl 8000240 <__aeabi_dsub> 8008b1c: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 8008b20: 9f08 ldr r7, [sp, #32] 8008b22: e9dd 0104 ldrd r0, r1, [sp, #16] 8008b26: f7f7 fff3 bl 8000b10 <__aeabi_d2iz> 8008b2a: 4604 mov r4, r0 8008b2c: f7f7 fcd6 bl 80004dc <__aeabi_i2d> 8008b30: 4602 mov r2, r0 8008b32: 460b mov r3, r1 8008b34: e9dd 0104 ldrd r0, r1, [sp, #16] 8008b38: f7f7 fb82 bl 8000240 <__aeabi_dsub> 8008b3c: 4602 mov r2, r0 8008b3e: 460b mov r3, r1 8008b40: 3430 adds r4, #48 ; 0x30 8008b42: e9cd 2304 strd r2, r3, [sp, #16] 8008b46: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 8008b4a: f807 4b01 strb.w r4, [r7], #1 8008b4e: f7f7 ffa1 bl 8000a94 <__aeabi_dcmplt> 8008b52: 2800 cmp r0, #0 8008b54: d174 bne.n 8008c40 <_dtoa_r+0x648> 8008b56: e9dd 2304 ldrd r2, r3, [sp, #16] 8008b5a: 2000 movs r0, #0 8008b5c: 4911 ldr r1, [pc, #68] ; (8008ba4 <_dtoa_r+0x5ac>) 8008b5e: f7f7 fb6f bl 8000240 <__aeabi_dsub> 8008b62: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 8008b66: f7f7 ff95 bl 8000a94 <__aeabi_dcmplt> 8008b6a: 2800 cmp r0, #0 8008b6c: f040 80b6 bne.w 8008cdc <_dtoa_r+0x6e4> 8008b70: 9b12 ldr r3, [sp, #72] ; 0x48 8008b72: 429f cmp r7, r3 8008b74: f43f af7a beq.w 8008a6c <_dtoa_r+0x474> 8008b78: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 8008b7c: 2200 movs r2, #0 8008b7e: 4b0a ldr r3, [pc, #40] ; (8008ba8 <_dtoa_r+0x5b0>) 8008b80: f7f7 fd16 bl 80005b0 <__aeabi_dmul> 8008b84: 2200 movs r2, #0 8008b86: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 8008b8a: e9dd 0104 ldrd r0, r1, [sp, #16] 8008b8e: 4b06 ldr r3, [pc, #24] ; (8008ba8 <_dtoa_r+0x5b0>) 8008b90: f7f7 fd0e bl 80005b0 <__aeabi_dmul> 8008b94: e9cd 0104 strd r0, r1, [sp, #16] 8008b98: e7c3 b.n 8008b22 <_dtoa_r+0x52a> 8008b9a: bf00 nop 8008b9c: 0800b440 .word 0x0800b440 8008ba0: 0800b418 .word 0x0800b418 8008ba4: 3ff00000 .word 0x3ff00000 8008ba8: 40240000 .word 0x40240000 8008bac: 401c0000 .word 0x401c0000 8008bb0: 40140000 .word 0x40140000 8008bb4: 3fe00000 .word 0x3fe00000 8008bb8: 4630 mov r0, r6 8008bba: 4639 mov r1, r7 8008bbc: f7f7 fcf8 bl 80005b0 <__aeabi_dmul> 8008bc0: 9b12 ldr r3, [sp, #72] ; 0x48 8008bc2: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 8008bc6: 9c08 ldr r4, [sp, #32] 8008bc8: 9314 str r3, [sp, #80] ; 0x50 8008bca: e9dd 0104 ldrd r0, r1, [sp, #16] 8008bce: f7f7 ff9f bl 8000b10 <__aeabi_d2iz> 8008bd2: 9015 str r0, [sp, #84] ; 0x54 8008bd4: f7f7 fc82 bl 80004dc <__aeabi_i2d> 8008bd8: 4602 mov r2, r0 8008bda: 460b mov r3, r1 8008bdc: e9dd 0104 ldrd r0, r1, [sp, #16] 8008be0: f7f7 fb2e bl 8000240 <__aeabi_dsub> 8008be4: 9b15 ldr r3, [sp, #84] ; 0x54 8008be6: 4606 mov r6, r0 8008be8: 3330 adds r3, #48 ; 0x30 8008bea: f804 3b01 strb.w r3, [r4], #1 8008bee: 9b12 ldr r3, [sp, #72] ; 0x48 8008bf0: 460f mov r7, r1 8008bf2: 429c cmp r4, r3 8008bf4: f04f 0200 mov.w r2, #0 8008bf8: d124 bne.n 8008c44 <_dtoa_r+0x64c> 8008bfa: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 8008bfe: 4bb3 ldr r3, [pc, #716] ; (8008ecc <_dtoa_r+0x8d4>) 8008c00: f7f7 fb20 bl 8000244 <__adddf3> 8008c04: 4602 mov r2, r0 8008c06: 460b mov r3, r1 8008c08: 4630 mov r0, r6 8008c0a: 4639 mov r1, r7 8008c0c: f7f7 ff60 bl 8000ad0 <__aeabi_dcmpgt> 8008c10: 2800 cmp r0, #0 8008c12: d162 bne.n 8008cda <_dtoa_r+0x6e2> 8008c14: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 8008c18: 2000 movs r0, #0 8008c1a: 49ac ldr r1, [pc, #688] ; (8008ecc <_dtoa_r+0x8d4>) 8008c1c: f7f7 fb10 bl 8000240 <__aeabi_dsub> 8008c20: 4602 mov r2, r0 8008c22: 460b mov r3, r1 8008c24: 4630 mov r0, r6 8008c26: 4639 mov r1, r7 8008c28: f7f7 ff34 bl 8000a94 <__aeabi_dcmplt> 8008c2c: 2800 cmp r0, #0 8008c2e: f43f af1d beq.w 8008a6c <_dtoa_r+0x474> 8008c32: 9f14 ldr r7, [sp, #80] ; 0x50 8008c34: 1e7b subs r3, r7, #1 8008c36: 9314 str r3, [sp, #80] ; 0x50 8008c38: f817 3c01 ldrb.w r3, [r7, #-1] 8008c3c: 2b30 cmp r3, #48 ; 0x30 8008c3e: d0f8 beq.n 8008c32 <_dtoa_r+0x63a> 8008c40: 46c1 mov r9, r8 8008c42: e03a b.n 8008cba <_dtoa_r+0x6c2> 8008c44: 4ba2 ldr r3, [pc, #648] ; (8008ed0 <_dtoa_r+0x8d8>) 8008c46: f7f7 fcb3 bl 80005b0 <__aeabi_dmul> 8008c4a: e9cd 0104 strd r0, r1, [sp, #16] 8008c4e: e7bc b.n 8008bca <_dtoa_r+0x5d2> 8008c50: 9f08 ldr r7, [sp, #32] 8008c52: e9dd 2306 ldrd r2, r3, [sp, #24] 8008c56: e9dd 0104 ldrd r0, r1, [sp, #16] 8008c5a: f7f7 fdd3 bl 8000804 <__aeabi_ddiv> 8008c5e: f7f7 ff57 bl 8000b10 <__aeabi_d2iz> 8008c62: 4604 mov r4, r0 8008c64: f7f7 fc3a bl 80004dc <__aeabi_i2d> 8008c68: e9dd 2306 ldrd r2, r3, [sp, #24] 8008c6c: f7f7 fca0 bl 80005b0 <__aeabi_dmul> 8008c70: f104 0630 add.w r6, r4, #48 ; 0x30 8008c74: 460b mov r3, r1 8008c76: 4602 mov r2, r0 8008c78: e9dd 0104 ldrd r0, r1, [sp, #16] 8008c7c: f7f7 fae0 bl 8000240 <__aeabi_dsub> 8008c80: f807 6b01 strb.w r6, [r7], #1 8008c84: 9e08 ldr r6, [sp, #32] 8008c86: 9b02 ldr r3, [sp, #8] 8008c88: 1bbe subs r6, r7, r6 8008c8a: 42b3 cmp r3, r6 8008c8c: d13a bne.n 8008d04 <_dtoa_r+0x70c> 8008c8e: 4602 mov r2, r0 8008c90: 460b mov r3, r1 8008c92: f7f7 fad7 bl 8000244 <__adddf3> 8008c96: 4602 mov r2, r0 8008c98: 460b mov r3, r1 8008c9a: e9cd 2302 strd r2, r3, [sp, #8] 8008c9e: e9dd 2306 ldrd r2, r3, [sp, #24] 8008ca2: f7f7 ff15 bl 8000ad0 <__aeabi_dcmpgt> 8008ca6: bb58 cbnz r0, 8008d00 <_dtoa_r+0x708> 8008ca8: e9dd 2306 ldrd r2, r3, [sp, #24] 8008cac: e9dd 0102 ldrd r0, r1, [sp, #8] 8008cb0: f7f7 fee6 bl 8000a80 <__aeabi_dcmpeq> 8008cb4: b108 cbz r0, 8008cba <_dtoa_r+0x6c2> 8008cb6: 07e1 lsls r1, r4, #31 8008cb8: d422 bmi.n 8008d00 <_dtoa_r+0x708> 8008cba: 4628 mov r0, r5 8008cbc: 4651 mov r1, sl 8008cbe: f000 fd15 bl 80096ec <_Bfree> 8008cc2: 2300 movs r3, #0 8008cc4: 703b strb r3, [r7, #0] 8008cc6: 9b24 ldr r3, [sp, #144] ; 0x90 8008cc8: f109 0001 add.w r0, r9, #1 8008ccc: 6018 str r0, [r3, #0] 8008cce: 9b26 ldr r3, [sp, #152] ; 0x98 8008cd0: 2b00 cmp r3, #0 8008cd2: f43f acdf beq.w 8008694 <_dtoa_r+0x9c> 8008cd6: 601f str r7, [r3, #0] 8008cd8: e4dc b.n 8008694 <_dtoa_r+0x9c> 8008cda: 4627 mov r7, r4 8008cdc: 463b mov r3, r7 8008cde: 461f mov r7, r3 8008ce0: f813 2d01 ldrb.w r2, [r3, #-1]! 8008ce4: 2a39 cmp r2, #57 ; 0x39 8008ce6: d107 bne.n 8008cf8 <_dtoa_r+0x700> 8008ce8: 9a08 ldr r2, [sp, #32] 8008cea: 429a cmp r2, r3 8008cec: d1f7 bne.n 8008cde <_dtoa_r+0x6e6> 8008cee: 2230 movs r2, #48 ; 0x30 8008cf0: 9908 ldr r1, [sp, #32] 8008cf2: f108 0801 add.w r8, r8, #1 8008cf6: 700a strb r2, [r1, #0] 8008cf8: 781a ldrb r2, [r3, #0] 8008cfa: 3201 adds r2, #1 8008cfc: 701a strb r2, [r3, #0] 8008cfe: e79f b.n 8008c40 <_dtoa_r+0x648> 8008d00: 46c8 mov r8, r9 8008d02: e7eb b.n 8008cdc <_dtoa_r+0x6e4> 8008d04: 2200 movs r2, #0 8008d06: 4b72 ldr r3, [pc, #456] ; (8008ed0 <_dtoa_r+0x8d8>) 8008d08: f7f7 fc52 bl 80005b0 <__aeabi_dmul> 8008d0c: 4602 mov r2, r0 8008d0e: 460b mov r3, r1 8008d10: e9cd 2304 strd r2, r3, [sp, #16] 8008d14: 2200 movs r2, #0 8008d16: 2300 movs r3, #0 8008d18: f7f7 feb2 bl 8000a80 <__aeabi_dcmpeq> 8008d1c: 2800 cmp r0, #0 8008d1e: d098 beq.n 8008c52 <_dtoa_r+0x65a> 8008d20: e7cb b.n 8008cba <_dtoa_r+0x6c2> 8008d22: 9a0b ldr r2, [sp, #44] ; 0x2c 8008d24: 2a00 cmp r2, #0 8008d26: f000 80cd beq.w 8008ec4 <_dtoa_r+0x8cc> 8008d2a: 9a22 ldr r2, [sp, #136] ; 0x88 8008d2c: 2a01 cmp r2, #1 8008d2e: f300 80af bgt.w 8008e90 <_dtoa_r+0x898> 8008d32: 9a13 ldr r2, [sp, #76] ; 0x4c 8008d34: 2a00 cmp r2, #0 8008d36: f000 80a7 beq.w 8008e88 <_dtoa_r+0x890> 8008d3a: f203 4333 addw r3, r3, #1075 ; 0x433 8008d3e: 9c0a ldr r4, [sp, #40] ; 0x28 8008d40: 9f06 ldr r7, [sp, #24] 8008d42: 9a06 ldr r2, [sp, #24] 8008d44: 2101 movs r1, #1 8008d46: 441a add r2, r3 8008d48: 9206 str r2, [sp, #24] 8008d4a: 9a09 ldr r2, [sp, #36] ; 0x24 8008d4c: 4628 mov r0, r5 8008d4e: 441a add r2, r3 8008d50: 9209 str r2, [sp, #36] ; 0x24 8008d52: f000 fd85 bl 8009860 <__i2b> 8008d56: 4606 mov r6, r0 8008d58: 2f00 cmp r7, #0 8008d5a: dd0c ble.n 8008d76 <_dtoa_r+0x77e> 8008d5c: 9b09 ldr r3, [sp, #36] ; 0x24 8008d5e: 2b00 cmp r3, #0 8008d60: dd09 ble.n 8008d76 <_dtoa_r+0x77e> 8008d62: 42bb cmp r3, r7 8008d64: bfa8 it ge 8008d66: 463b movge r3, r7 8008d68: 9a06 ldr r2, [sp, #24] 8008d6a: 1aff subs r7, r7, r3 8008d6c: 1ad2 subs r2, r2, r3 8008d6e: 9206 str r2, [sp, #24] 8008d70: 9a09 ldr r2, [sp, #36] ; 0x24 8008d72: 1ad3 subs r3, r2, r3 8008d74: 9309 str r3, [sp, #36] ; 0x24 8008d76: 9b0a ldr r3, [sp, #40] ; 0x28 8008d78: b1f3 cbz r3, 8008db8 <_dtoa_r+0x7c0> 8008d7a: 9b0b ldr r3, [sp, #44] ; 0x2c 8008d7c: 2b00 cmp r3, #0 8008d7e: f000 80a9 beq.w 8008ed4 <_dtoa_r+0x8dc> 8008d82: 2c00 cmp r4, #0 8008d84: dd10 ble.n 8008da8 <_dtoa_r+0x7b0> 8008d86: 4631 mov r1, r6 8008d88: 4622 mov r2, r4 8008d8a: 4628 mov r0, r5 8008d8c: f000 fe22 bl 80099d4 <__pow5mult> 8008d90: 4652 mov r2, sl 8008d92: 4601 mov r1, r0 8008d94: 4606 mov r6, r0 8008d96: 4628 mov r0, r5 8008d98: f000 fd78 bl 800988c <__multiply> 8008d9c: 4680 mov r8, r0 8008d9e: 4651 mov r1, sl 8008da0: 4628 mov r0, r5 8008da2: f000 fca3 bl 80096ec <_Bfree> 8008da6: 46c2 mov sl, r8 8008da8: 9b0a ldr r3, [sp, #40] ; 0x28 8008daa: 1b1a subs r2, r3, r4 8008dac: d004 beq.n 8008db8 <_dtoa_r+0x7c0> 8008dae: 4651 mov r1, sl 8008db0: 4628 mov r0, r5 8008db2: f000 fe0f bl 80099d4 <__pow5mult> 8008db6: 4682 mov sl, r0 8008db8: 2101 movs r1, #1 8008dba: 4628 mov r0, r5 8008dbc: f000 fd50 bl 8009860 <__i2b> 8008dc0: 9b0e ldr r3, [sp, #56] ; 0x38 8008dc2: 4604 mov r4, r0 8008dc4: 2b00 cmp r3, #0 8008dc6: f340 8087 ble.w 8008ed8 <_dtoa_r+0x8e0> 8008dca: 461a mov r2, r3 8008dcc: 4601 mov r1, r0 8008dce: 4628 mov r0, r5 8008dd0: f000 fe00 bl 80099d4 <__pow5mult> 8008dd4: 9b22 ldr r3, [sp, #136] ; 0x88 8008dd6: 4604 mov r4, r0 8008dd8: 2b01 cmp r3, #1 8008dda: f340 8080 ble.w 8008ede <_dtoa_r+0x8e6> 8008dde: f04f 0800 mov.w r8, #0 8008de2: 6923 ldr r3, [r4, #16] 8008de4: eb04 0383 add.w r3, r4, r3, lsl #2 8008de8: 6918 ldr r0, [r3, #16] 8008dea: f000 fceb bl 80097c4 <__hi0bits> 8008dee: f1c0 0020 rsb r0, r0, #32 8008df2: 9b09 ldr r3, [sp, #36] ; 0x24 8008df4: 4418 add r0, r3 8008df6: f010 001f ands.w r0, r0, #31 8008dfa: f000 8092 beq.w 8008f22 <_dtoa_r+0x92a> 8008dfe: f1c0 0320 rsb r3, r0, #32 8008e02: 2b04 cmp r3, #4 8008e04: f340 808a ble.w 8008f1c <_dtoa_r+0x924> 8008e08: f1c0 001c rsb r0, r0, #28 8008e0c: 9b06 ldr r3, [sp, #24] 8008e0e: 4407 add r7, r0 8008e10: 4403 add r3, r0 8008e12: 9306 str r3, [sp, #24] 8008e14: 9b09 ldr r3, [sp, #36] ; 0x24 8008e16: 4403 add r3, r0 8008e18: 9309 str r3, [sp, #36] ; 0x24 8008e1a: 9b06 ldr r3, [sp, #24] 8008e1c: 2b00 cmp r3, #0 8008e1e: dd05 ble.n 8008e2c <_dtoa_r+0x834> 8008e20: 4651 mov r1, sl 8008e22: 461a mov r2, r3 8008e24: 4628 mov r0, r5 8008e26: f000 fe2f bl 8009a88 <__lshift> 8008e2a: 4682 mov sl, r0 8008e2c: 9b09 ldr r3, [sp, #36] ; 0x24 8008e2e: 2b00 cmp r3, #0 8008e30: dd05 ble.n 8008e3e <_dtoa_r+0x846> 8008e32: 4621 mov r1, r4 8008e34: 461a mov r2, r3 8008e36: 4628 mov r0, r5 8008e38: f000 fe26 bl 8009a88 <__lshift> 8008e3c: 4604 mov r4, r0 8008e3e: 9b0f ldr r3, [sp, #60] ; 0x3c 8008e40: 2b00 cmp r3, #0 8008e42: d070 beq.n 8008f26 <_dtoa_r+0x92e> 8008e44: 4621 mov r1, r4 8008e46: 4650 mov r0, sl 8008e48: f000 fe8a bl 8009b60 <__mcmp> 8008e4c: 2800 cmp r0, #0 8008e4e: da6a bge.n 8008f26 <_dtoa_r+0x92e> 8008e50: 2300 movs r3, #0 8008e52: 4651 mov r1, sl 8008e54: 220a movs r2, #10 8008e56: 4628 mov r0, r5 8008e58: f000 fc6a bl 8009730 <__multadd> 8008e5c: 9b0b ldr r3, [sp, #44] ; 0x2c 8008e5e: 4682 mov sl, r0 8008e60: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff 8008e64: 2b00 cmp r3, #0 8008e66: f000 8193 beq.w 8009190 <_dtoa_r+0xb98> 8008e6a: 4631 mov r1, r6 8008e6c: 2300 movs r3, #0 8008e6e: 220a movs r2, #10 8008e70: 4628 mov r0, r5 8008e72: f000 fc5d bl 8009730 <__multadd> 8008e76: f1bb 0f00 cmp.w fp, #0 8008e7a: 4606 mov r6, r0 8008e7c: f300 8093 bgt.w 8008fa6 <_dtoa_r+0x9ae> 8008e80: 9b22 ldr r3, [sp, #136] ; 0x88 8008e82: 2b02 cmp r3, #2 8008e84: dc57 bgt.n 8008f36 <_dtoa_r+0x93e> 8008e86: e08e b.n 8008fa6 <_dtoa_r+0x9ae> 8008e88: 9b16 ldr r3, [sp, #88] ; 0x58 8008e8a: f1c3 0336 rsb r3, r3, #54 ; 0x36 8008e8e: e756 b.n 8008d3e <_dtoa_r+0x746> 8008e90: 9b02 ldr r3, [sp, #8] 8008e92: 1e5c subs r4, r3, #1 8008e94: 9b0a ldr r3, [sp, #40] ; 0x28 8008e96: 42a3 cmp r3, r4 8008e98: bfb7 itett lt 8008e9a: 9b0a ldrlt r3, [sp, #40] ; 0x28 8008e9c: 1b1c subge r4, r3, r4 8008e9e: 1ae2 sublt r2, r4, r3 8008ea0: 9b0e ldrlt r3, [sp, #56] ; 0x38 8008ea2: bfbe ittt lt 8008ea4: 940a strlt r4, [sp, #40] ; 0x28 8008ea6: 189b addlt r3, r3, r2 8008ea8: 930e strlt r3, [sp, #56] ; 0x38 8008eaa: 9b02 ldr r3, [sp, #8] 8008eac: bfb8 it lt 8008eae: 2400 movlt r4, #0 8008eb0: 2b00 cmp r3, #0 8008eb2: bfbb ittet lt 8008eb4: 9b06 ldrlt r3, [sp, #24] 8008eb6: 9a02 ldrlt r2, [sp, #8] 8008eb8: 9f06 ldrge r7, [sp, #24] 8008eba: 1a9f sublt r7, r3, r2 8008ebc: bfac ite ge 8008ebe: 9b02 ldrge r3, [sp, #8] 8008ec0: 2300 movlt r3, #0 8008ec2: e73e b.n 8008d42 <_dtoa_r+0x74a> 8008ec4: 9c0a ldr r4, [sp, #40] ; 0x28 8008ec6: 9f06 ldr r7, [sp, #24] 8008ec8: 9e0b ldr r6, [sp, #44] ; 0x2c 8008eca: e745 b.n 8008d58 <_dtoa_r+0x760> 8008ecc: 3fe00000 .word 0x3fe00000 8008ed0: 40240000 .word 0x40240000 8008ed4: 9a0a ldr r2, [sp, #40] ; 0x28 8008ed6: e76a b.n 8008dae <_dtoa_r+0x7b6> 8008ed8: 9b22 ldr r3, [sp, #136] ; 0x88 8008eda: 2b01 cmp r3, #1 8008edc: dc19 bgt.n 8008f12 <_dtoa_r+0x91a> 8008ede: 9b04 ldr r3, [sp, #16] 8008ee0: b9bb cbnz r3, 8008f12 <_dtoa_r+0x91a> 8008ee2: 9b05 ldr r3, [sp, #20] 8008ee4: f3c3 0313 ubfx r3, r3, #0, #20 8008ee8: b99b cbnz r3, 8008f12 <_dtoa_r+0x91a> 8008eea: 9b05 ldr r3, [sp, #20] 8008eec: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 8008ef0: 0d1b lsrs r3, r3, #20 8008ef2: 051b lsls r3, r3, #20 8008ef4: b183 cbz r3, 8008f18 <_dtoa_r+0x920> 8008ef6: f04f 0801 mov.w r8, #1 8008efa: 9b06 ldr r3, [sp, #24] 8008efc: 3301 adds r3, #1 8008efe: 9306 str r3, [sp, #24] 8008f00: 9b09 ldr r3, [sp, #36] ; 0x24 8008f02: 3301 adds r3, #1 8008f04: 9309 str r3, [sp, #36] ; 0x24 8008f06: 9b0e ldr r3, [sp, #56] ; 0x38 8008f08: 2b00 cmp r3, #0 8008f0a: f47f af6a bne.w 8008de2 <_dtoa_r+0x7ea> 8008f0e: 2001 movs r0, #1 8008f10: e76f b.n 8008df2 <_dtoa_r+0x7fa> 8008f12: f04f 0800 mov.w r8, #0 8008f16: e7f6 b.n 8008f06 <_dtoa_r+0x90e> 8008f18: 4698 mov r8, r3 8008f1a: e7f4 b.n 8008f06 <_dtoa_r+0x90e> 8008f1c: f43f af7d beq.w 8008e1a <_dtoa_r+0x822> 8008f20: 4618 mov r0, r3 8008f22: 301c adds r0, #28 8008f24: e772 b.n 8008e0c <_dtoa_r+0x814> 8008f26: 9b02 ldr r3, [sp, #8] 8008f28: 2b00 cmp r3, #0 8008f2a: dc36 bgt.n 8008f9a <_dtoa_r+0x9a2> 8008f2c: 9b22 ldr r3, [sp, #136] ; 0x88 8008f2e: 2b02 cmp r3, #2 8008f30: dd33 ble.n 8008f9a <_dtoa_r+0x9a2> 8008f32: f8dd b008 ldr.w fp, [sp, #8] 8008f36: f1bb 0f00 cmp.w fp, #0 8008f3a: d10d bne.n 8008f58 <_dtoa_r+0x960> 8008f3c: 4621 mov r1, r4 8008f3e: 465b mov r3, fp 8008f40: 2205 movs r2, #5 8008f42: 4628 mov r0, r5 8008f44: f000 fbf4 bl 8009730 <__multadd> 8008f48: 4601 mov r1, r0 8008f4a: 4604 mov r4, r0 8008f4c: 4650 mov r0, sl 8008f4e: f000 fe07 bl 8009b60 <__mcmp> 8008f52: 2800 cmp r0, #0 8008f54: f73f adb6 bgt.w 8008ac4 <_dtoa_r+0x4cc> 8008f58: 9b23 ldr r3, [sp, #140] ; 0x8c 8008f5a: 9f08 ldr r7, [sp, #32] 8008f5c: ea6f 0903 mvn.w r9, r3 8008f60: f04f 0800 mov.w r8, #0 8008f64: 4621 mov r1, r4 8008f66: 4628 mov r0, r5 8008f68: f000 fbc0 bl 80096ec <_Bfree> 8008f6c: 2e00 cmp r6, #0 8008f6e: f43f aea4 beq.w 8008cba <_dtoa_r+0x6c2> 8008f72: f1b8 0f00 cmp.w r8, #0 8008f76: d005 beq.n 8008f84 <_dtoa_r+0x98c> 8008f78: 45b0 cmp r8, r6 8008f7a: d003 beq.n 8008f84 <_dtoa_r+0x98c> 8008f7c: 4641 mov r1, r8 8008f7e: 4628 mov r0, r5 8008f80: f000 fbb4 bl 80096ec <_Bfree> 8008f84: 4631 mov r1, r6 8008f86: 4628 mov r0, r5 8008f88: f000 fbb0 bl 80096ec <_Bfree> 8008f8c: e695 b.n 8008cba <_dtoa_r+0x6c2> 8008f8e: 2400 movs r4, #0 8008f90: 4626 mov r6, r4 8008f92: e7e1 b.n 8008f58 <_dtoa_r+0x960> 8008f94: 46c1 mov r9, r8 8008f96: 4626 mov r6, r4 8008f98: e594 b.n 8008ac4 <_dtoa_r+0x4cc> 8008f9a: 9b0b ldr r3, [sp, #44] ; 0x2c 8008f9c: f8dd b008 ldr.w fp, [sp, #8] 8008fa0: 2b00 cmp r3, #0 8008fa2: f000 80fc beq.w 800919e <_dtoa_r+0xba6> 8008fa6: 2f00 cmp r7, #0 8008fa8: dd05 ble.n 8008fb6 <_dtoa_r+0x9be> 8008faa: 4631 mov r1, r6 8008fac: 463a mov r2, r7 8008fae: 4628 mov r0, r5 8008fb0: f000 fd6a bl 8009a88 <__lshift> 8008fb4: 4606 mov r6, r0 8008fb6: f1b8 0f00 cmp.w r8, #0 8008fba: d05c beq.n 8009076 <_dtoa_r+0xa7e> 8008fbc: 4628 mov r0, r5 8008fbe: 6871 ldr r1, [r6, #4] 8008fc0: f000 fb54 bl 800966c <_Balloc> 8008fc4: 4607 mov r7, r0 8008fc6: b928 cbnz r0, 8008fd4 <_dtoa_r+0x9dc> 8008fc8: 4602 mov r2, r0 8008fca: f240 21ea movw r1, #746 ; 0x2ea 8008fce: 4b7e ldr r3, [pc, #504] ; (80091c8 <_dtoa_r+0xbd0>) 8008fd0: f7ff bb26 b.w 8008620 <_dtoa_r+0x28> 8008fd4: 6932 ldr r2, [r6, #16] 8008fd6: f106 010c add.w r1, r6, #12 8008fda: 3202 adds r2, #2 8008fdc: 0092 lsls r2, r2, #2 8008fde: 300c adds r0, #12 8008fe0: f000 fb2a bl 8009638 8008fe4: 2201 movs r2, #1 8008fe6: 4639 mov r1, r7 8008fe8: 4628 mov r0, r5 8008fea: f000 fd4d bl 8009a88 <__lshift> 8008fee: 46b0 mov r8, r6 8008ff0: 4606 mov r6, r0 8008ff2: 9b08 ldr r3, [sp, #32] 8008ff4: 3301 adds r3, #1 8008ff6: 9302 str r3, [sp, #8] 8008ff8: 9b08 ldr r3, [sp, #32] 8008ffa: 445b add r3, fp 8008ffc: 930a str r3, [sp, #40] ; 0x28 8008ffe: 9b04 ldr r3, [sp, #16] 8009000: f003 0301 and.w r3, r3, #1 8009004: 9309 str r3, [sp, #36] ; 0x24 8009006: 9b02 ldr r3, [sp, #8] 8009008: 4621 mov r1, r4 800900a: 4650 mov r0, sl 800900c: f103 3bff add.w fp, r3, #4294967295 ; 0xffffffff 8009010: f7ff fa62 bl 80084d8 8009014: 4603 mov r3, r0 8009016: 4641 mov r1, r8 8009018: 3330 adds r3, #48 ; 0x30 800901a: 9004 str r0, [sp, #16] 800901c: 4650 mov r0, sl 800901e: 930b str r3, [sp, #44] ; 0x2c 8009020: f000 fd9e bl 8009b60 <__mcmp> 8009024: 4632 mov r2, r6 8009026: 9006 str r0, [sp, #24] 8009028: 4621 mov r1, r4 800902a: 4628 mov r0, r5 800902c: f000 fdb4 bl 8009b98 <__mdiff> 8009030: 68c2 ldr r2, [r0, #12] 8009032: 4607 mov r7, r0 8009034: 9b0b ldr r3, [sp, #44] ; 0x2c 8009036: bb02 cbnz r2, 800907a <_dtoa_r+0xa82> 8009038: 4601 mov r1, r0 800903a: 4650 mov r0, sl 800903c: f000 fd90 bl 8009b60 <__mcmp> 8009040: 4602 mov r2, r0 8009042: 9b0b ldr r3, [sp, #44] ; 0x2c 8009044: 4639 mov r1, r7 8009046: 4628 mov r0, r5 8009048: e9cd 320b strd r3, r2, [sp, #44] ; 0x2c 800904c: f000 fb4e bl 80096ec <_Bfree> 8009050: 9b22 ldr r3, [sp, #136] ; 0x88 8009052: 9a0c ldr r2, [sp, #48] ; 0x30 8009054: 9f02 ldr r7, [sp, #8] 8009056: ea43 0102 orr.w r1, r3, r2 800905a: 9b09 ldr r3, [sp, #36] ; 0x24 800905c: 430b orrs r3, r1 800905e: 9b0b ldr r3, [sp, #44] ; 0x2c 8009060: d10d bne.n 800907e <_dtoa_r+0xa86> 8009062: 2b39 cmp r3, #57 ; 0x39 8009064: d027 beq.n 80090b6 <_dtoa_r+0xabe> 8009066: 9a06 ldr r2, [sp, #24] 8009068: 2a00 cmp r2, #0 800906a: dd01 ble.n 8009070 <_dtoa_r+0xa78> 800906c: 9b04 ldr r3, [sp, #16] 800906e: 3331 adds r3, #49 ; 0x31 8009070: f88b 3000 strb.w r3, [fp] 8009074: e776 b.n 8008f64 <_dtoa_r+0x96c> 8009076: 4630 mov r0, r6 8009078: e7b9 b.n 8008fee <_dtoa_r+0x9f6> 800907a: 2201 movs r2, #1 800907c: e7e2 b.n 8009044 <_dtoa_r+0xa4c> 800907e: 9906 ldr r1, [sp, #24] 8009080: 2900 cmp r1, #0 8009082: db04 blt.n 800908e <_dtoa_r+0xa96> 8009084: 9822 ldr r0, [sp, #136] ; 0x88 8009086: 4301 orrs r1, r0 8009088: 9809 ldr r0, [sp, #36] ; 0x24 800908a: 4301 orrs r1, r0 800908c: d120 bne.n 80090d0 <_dtoa_r+0xad8> 800908e: 2a00 cmp r2, #0 8009090: ddee ble.n 8009070 <_dtoa_r+0xa78> 8009092: 4651 mov r1, sl 8009094: 2201 movs r2, #1 8009096: 4628 mov r0, r5 8009098: 9302 str r3, [sp, #8] 800909a: f000 fcf5 bl 8009a88 <__lshift> 800909e: 4621 mov r1, r4 80090a0: 4682 mov sl, r0 80090a2: f000 fd5d bl 8009b60 <__mcmp> 80090a6: 2800 cmp r0, #0 80090a8: 9b02 ldr r3, [sp, #8] 80090aa: dc02 bgt.n 80090b2 <_dtoa_r+0xaba> 80090ac: d1e0 bne.n 8009070 <_dtoa_r+0xa78> 80090ae: 07da lsls r2, r3, #31 80090b0: d5de bpl.n 8009070 <_dtoa_r+0xa78> 80090b2: 2b39 cmp r3, #57 ; 0x39 80090b4: d1da bne.n 800906c <_dtoa_r+0xa74> 80090b6: 2339 movs r3, #57 ; 0x39 80090b8: f88b 3000 strb.w r3, [fp] 80090bc: 463b mov r3, r7 80090be: 461f mov r7, r3 80090c0: f817 2c01 ldrb.w r2, [r7, #-1] 80090c4: 3b01 subs r3, #1 80090c6: 2a39 cmp r2, #57 ; 0x39 80090c8: d050 beq.n 800916c <_dtoa_r+0xb74> 80090ca: 3201 adds r2, #1 80090cc: 701a strb r2, [r3, #0] 80090ce: e749 b.n 8008f64 <_dtoa_r+0x96c> 80090d0: 2a00 cmp r2, #0 80090d2: dd03 ble.n 80090dc <_dtoa_r+0xae4> 80090d4: 2b39 cmp r3, #57 ; 0x39 80090d6: d0ee beq.n 80090b6 <_dtoa_r+0xabe> 80090d8: 3301 adds r3, #1 80090da: e7c9 b.n 8009070 <_dtoa_r+0xa78> 80090dc: 9a02 ldr r2, [sp, #8] 80090de: 990a ldr r1, [sp, #40] ; 0x28 80090e0: f802 3c01 strb.w r3, [r2, #-1] 80090e4: 428a cmp r2, r1 80090e6: d02a beq.n 800913e <_dtoa_r+0xb46> 80090e8: 4651 mov r1, sl 80090ea: 2300 movs r3, #0 80090ec: 220a movs r2, #10 80090ee: 4628 mov r0, r5 80090f0: f000 fb1e bl 8009730 <__multadd> 80090f4: 45b0 cmp r8, r6 80090f6: 4682 mov sl, r0 80090f8: f04f 0300 mov.w r3, #0 80090fc: f04f 020a mov.w r2, #10 8009100: 4641 mov r1, r8 8009102: 4628 mov r0, r5 8009104: d107 bne.n 8009116 <_dtoa_r+0xb1e> 8009106: f000 fb13 bl 8009730 <__multadd> 800910a: 4680 mov r8, r0 800910c: 4606 mov r6, r0 800910e: 9b02 ldr r3, [sp, #8] 8009110: 3301 adds r3, #1 8009112: 9302 str r3, [sp, #8] 8009114: e777 b.n 8009006 <_dtoa_r+0xa0e> 8009116: f000 fb0b bl 8009730 <__multadd> 800911a: 4631 mov r1, r6 800911c: 4680 mov r8, r0 800911e: 2300 movs r3, #0 8009120: 220a movs r2, #10 8009122: 4628 mov r0, r5 8009124: f000 fb04 bl 8009730 <__multadd> 8009128: 4606 mov r6, r0 800912a: e7f0 b.n 800910e <_dtoa_r+0xb16> 800912c: f1bb 0f00 cmp.w fp, #0 8009130: bfcc ite gt 8009132: 465f movgt r7, fp 8009134: 2701 movle r7, #1 8009136: f04f 0800 mov.w r8, #0 800913a: 9a08 ldr r2, [sp, #32] 800913c: 4417 add r7, r2 800913e: 4651 mov r1, sl 8009140: 2201 movs r2, #1 8009142: 4628 mov r0, r5 8009144: 9302 str r3, [sp, #8] 8009146: f000 fc9f bl 8009a88 <__lshift> 800914a: 4621 mov r1, r4 800914c: 4682 mov sl, r0 800914e: f000 fd07 bl 8009b60 <__mcmp> 8009152: 2800 cmp r0, #0 8009154: dcb2 bgt.n 80090bc <_dtoa_r+0xac4> 8009156: d102 bne.n 800915e <_dtoa_r+0xb66> 8009158: 9b02 ldr r3, [sp, #8] 800915a: 07db lsls r3, r3, #31 800915c: d4ae bmi.n 80090bc <_dtoa_r+0xac4> 800915e: 463b mov r3, r7 8009160: 461f mov r7, r3 8009162: f813 2d01 ldrb.w r2, [r3, #-1]! 8009166: 2a30 cmp r2, #48 ; 0x30 8009168: d0fa beq.n 8009160 <_dtoa_r+0xb68> 800916a: e6fb b.n 8008f64 <_dtoa_r+0x96c> 800916c: 9a08 ldr r2, [sp, #32] 800916e: 429a cmp r2, r3 8009170: d1a5 bne.n 80090be <_dtoa_r+0xac6> 8009172: 2331 movs r3, #49 ; 0x31 8009174: f109 0901 add.w r9, r9, #1 8009178: 7013 strb r3, [r2, #0] 800917a: e6f3 b.n 8008f64 <_dtoa_r+0x96c> 800917c: 4b13 ldr r3, [pc, #76] ; (80091cc <_dtoa_r+0xbd4>) 800917e: f7ff baa7 b.w 80086d0 <_dtoa_r+0xd8> 8009182: 9b26 ldr r3, [sp, #152] ; 0x98 8009184: 2b00 cmp r3, #0 8009186: f47f aa80 bne.w 800868a <_dtoa_r+0x92> 800918a: 4b11 ldr r3, [pc, #68] ; (80091d0 <_dtoa_r+0xbd8>) 800918c: f7ff baa0 b.w 80086d0 <_dtoa_r+0xd8> 8009190: f1bb 0f00 cmp.w fp, #0 8009194: dc03 bgt.n 800919e <_dtoa_r+0xba6> 8009196: 9b22 ldr r3, [sp, #136] ; 0x88 8009198: 2b02 cmp r3, #2 800919a: f73f aecc bgt.w 8008f36 <_dtoa_r+0x93e> 800919e: 9f08 ldr r7, [sp, #32] 80091a0: 4621 mov r1, r4 80091a2: 4650 mov r0, sl 80091a4: f7ff f998 bl 80084d8 80091a8: 9a08 ldr r2, [sp, #32] 80091aa: f100 0330 add.w r3, r0, #48 ; 0x30 80091ae: f807 3b01 strb.w r3, [r7], #1 80091b2: 1aba subs r2, r7, r2 80091b4: 4593 cmp fp, r2 80091b6: ddb9 ble.n 800912c <_dtoa_r+0xb34> 80091b8: 4651 mov r1, sl 80091ba: 2300 movs r3, #0 80091bc: 220a movs r2, #10 80091be: 4628 mov r0, r5 80091c0: f000 fab6 bl 8009730 <__multadd> 80091c4: 4682 mov sl, r0 80091c6: e7eb b.n 80091a0 <_dtoa_r+0xba8> 80091c8: 0800b343 .word 0x0800b343 80091cc: 0800b29c .word 0x0800b29c 80091d0: 0800b2c0 .word 0x0800b2c0 080091d4 <__sflush_r>: 80091d4: 898a ldrh r2, [r1, #12] 80091d6: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80091da: 4605 mov r5, r0 80091dc: 0710 lsls r0, r2, #28 80091de: 460c mov r4, r1 80091e0: d458 bmi.n 8009294 <__sflush_r+0xc0> 80091e2: 684b ldr r3, [r1, #4] 80091e4: 2b00 cmp r3, #0 80091e6: dc05 bgt.n 80091f4 <__sflush_r+0x20> 80091e8: 6c0b ldr r3, [r1, #64] ; 0x40 80091ea: 2b00 cmp r3, #0 80091ec: dc02 bgt.n 80091f4 <__sflush_r+0x20> 80091ee: 2000 movs r0, #0 80091f0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80091f4: 6ae6 ldr r6, [r4, #44] ; 0x2c 80091f6: 2e00 cmp r6, #0 80091f8: d0f9 beq.n 80091ee <__sflush_r+0x1a> 80091fa: 2300 movs r3, #0 80091fc: f412 5280 ands.w r2, r2, #4096 ; 0x1000 8009200: 682f ldr r7, [r5, #0] 8009202: 602b str r3, [r5, #0] 8009204: d032 beq.n 800926c <__sflush_r+0x98> 8009206: 6d60 ldr r0, [r4, #84] ; 0x54 8009208: 89a3 ldrh r3, [r4, #12] 800920a: 075a lsls r2, r3, #29 800920c: d505 bpl.n 800921a <__sflush_r+0x46> 800920e: 6863 ldr r3, [r4, #4] 8009210: 1ac0 subs r0, r0, r3 8009212: 6b63 ldr r3, [r4, #52] ; 0x34 8009214: b10b cbz r3, 800921a <__sflush_r+0x46> 8009216: 6c23 ldr r3, [r4, #64] ; 0x40 8009218: 1ac0 subs r0, r0, r3 800921a: 2300 movs r3, #0 800921c: 4602 mov r2, r0 800921e: 6ae6 ldr r6, [r4, #44] ; 0x2c 8009220: 4628 mov r0, r5 8009222: 6a21 ldr r1, [r4, #32] 8009224: 47b0 blx r6 8009226: 1c43 adds r3, r0, #1 8009228: 89a3 ldrh r3, [r4, #12] 800922a: d106 bne.n 800923a <__sflush_r+0x66> 800922c: 6829 ldr r1, [r5, #0] 800922e: 291d cmp r1, #29 8009230: d82c bhi.n 800928c <__sflush_r+0xb8> 8009232: 4a2a ldr r2, [pc, #168] ; (80092dc <__sflush_r+0x108>) 8009234: 40ca lsrs r2, r1 8009236: 07d6 lsls r6, r2, #31 8009238: d528 bpl.n 800928c <__sflush_r+0xb8> 800923a: 2200 movs r2, #0 800923c: 6062 str r2, [r4, #4] 800923e: 6922 ldr r2, [r4, #16] 8009240: 04d9 lsls r1, r3, #19 8009242: 6022 str r2, [r4, #0] 8009244: d504 bpl.n 8009250 <__sflush_r+0x7c> 8009246: 1c42 adds r2, r0, #1 8009248: d101 bne.n 800924e <__sflush_r+0x7a> 800924a: 682b ldr r3, [r5, #0] 800924c: b903 cbnz r3, 8009250 <__sflush_r+0x7c> 800924e: 6560 str r0, [r4, #84] ; 0x54 8009250: 6b61 ldr r1, [r4, #52] ; 0x34 8009252: 602f str r7, [r5, #0] 8009254: 2900 cmp r1, #0 8009256: d0ca beq.n 80091ee <__sflush_r+0x1a> 8009258: f104 0344 add.w r3, r4, #68 ; 0x44 800925c: 4299 cmp r1, r3 800925e: d002 beq.n 8009266 <__sflush_r+0x92> 8009260: 4628 mov r0, r5 8009262: f7fe faa1 bl 80077a8 <_free_r> 8009266: 2000 movs r0, #0 8009268: 6360 str r0, [r4, #52] ; 0x34 800926a: e7c1 b.n 80091f0 <__sflush_r+0x1c> 800926c: 6a21 ldr r1, [r4, #32] 800926e: 2301 movs r3, #1 8009270: 4628 mov r0, r5 8009272: 47b0 blx r6 8009274: 1c41 adds r1, r0, #1 8009276: d1c7 bne.n 8009208 <__sflush_r+0x34> 8009278: 682b ldr r3, [r5, #0] 800927a: 2b00 cmp r3, #0 800927c: d0c4 beq.n 8009208 <__sflush_r+0x34> 800927e: 2b1d cmp r3, #29 8009280: d001 beq.n 8009286 <__sflush_r+0xb2> 8009282: 2b16 cmp r3, #22 8009284: d101 bne.n 800928a <__sflush_r+0xb6> 8009286: 602f str r7, [r5, #0] 8009288: e7b1 b.n 80091ee <__sflush_r+0x1a> 800928a: 89a3 ldrh r3, [r4, #12] 800928c: f043 0340 orr.w r3, r3, #64 ; 0x40 8009290: 81a3 strh r3, [r4, #12] 8009292: e7ad b.n 80091f0 <__sflush_r+0x1c> 8009294: 690f ldr r7, [r1, #16] 8009296: 2f00 cmp r7, #0 8009298: d0a9 beq.n 80091ee <__sflush_r+0x1a> 800929a: 0793 lsls r3, r2, #30 800929c: bf18 it ne 800929e: 2300 movne r3, #0 80092a0: 680e ldr r6, [r1, #0] 80092a2: bf08 it eq 80092a4: 694b ldreq r3, [r1, #20] 80092a6: eba6 0807 sub.w r8, r6, r7 80092aa: 600f str r7, [r1, #0] 80092ac: 608b str r3, [r1, #8] 80092ae: f1b8 0f00 cmp.w r8, #0 80092b2: dd9c ble.n 80091ee <__sflush_r+0x1a> 80092b4: 4643 mov r3, r8 80092b6: 463a mov r2, r7 80092b8: 4628 mov r0, r5 80092ba: 6a21 ldr r1, [r4, #32] 80092bc: 6aa6 ldr r6, [r4, #40] ; 0x28 80092be: 47b0 blx r6 80092c0: 2800 cmp r0, #0 80092c2: dc06 bgt.n 80092d2 <__sflush_r+0xfe> 80092c4: 89a3 ldrh r3, [r4, #12] 80092c6: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 80092ca: f043 0340 orr.w r3, r3, #64 ; 0x40 80092ce: 81a3 strh r3, [r4, #12] 80092d0: e78e b.n 80091f0 <__sflush_r+0x1c> 80092d2: 4407 add r7, r0 80092d4: eba8 0800 sub.w r8, r8, r0 80092d8: e7e9 b.n 80092ae <__sflush_r+0xda> 80092da: bf00 nop 80092dc: 20400001 .word 0x20400001 080092e0 <_fflush_r>: 80092e0: b538 push {r3, r4, r5, lr} 80092e2: 690b ldr r3, [r1, #16] 80092e4: 4605 mov r5, r0 80092e6: 460c mov r4, r1 80092e8: b913 cbnz r3, 80092f0 <_fflush_r+0x10> 80092ea: 2500 movs r5, #0 80092ec: 4628 mov r0, r5 80092ee: bd38 pop {r3, r4, r5, pc} 80092f0: b118 cbz r0, 80092fa <_fflush_r+0x1a> 80092f2: 6983 ldr r3, [r0, #24] 80092f4: b90b cbnz r3, 80092fa <_fflush_r+0x1a> 80092f6: f000 f887 bl 8009408 <__sinit> 80092fa: 4b14 ldr r3, [pc, #80] ; (800934c <_fflush_r+0x6c>) 80092fc: 429c cmp r4, r3 80092fe: d11b bne.n 8009338 <_fflush_r+0x58> 8009300: 686c ldr r4, [r5, #4] 8009302: f9b4 300c ldrsh.w r3, [r4, #12] 8009306: 2b00 cmp r3, #0 8009308: d0ef beq.n 80092ea <_fflush_r+0xa> 800930a: 6e62 ldr r2, [r4, #100] ; 0x64 800930c: 07d0 lsls r0, r2, #31 800930e: d404 bmi.n 800931a <_fflush_r+0x3a> 8009310: 0599 lsls r1, r3, #22 8009312: d402 bmi.n 800931a <_fflush_r+0x3a> 8009314: 6da0 ldr r0, [r4, #88] ; 0x58 8009316: f000 f91a bl 800954e <__retarget_lock_acquire_recursive> 800931a: 4628 mov r0, r5 800931c: 4621 mov r1, r4 800931e: f7ff ff59 bl 80091d4 <__sflush_r> 8009322: 6e63 ldr r3, [r4, #100] ; 0x64 8009324: 4605 mov r5, r0 8009326: 07da lsls r2, r3, #31 8009328: d4e0 bmi.n 80092ec <_fflush_r+0xc> 800932a: 89a3 ldrh r3, [r4, #12] 800932c: 059b lsls r3, r3, #22 800932e: d4dd bmi.n 80092ec <_fflush_r+0xc> 8009330: 6da0 ldr r0, [r4, #88] ; 0x58 8009332: f000 f90d bl 8009550 <__retarget_lock_release_recursive> 8009336: e7d9 b.n 80092ec <_fflush_r+0xc> 8009338: 4b05 ldr r3, [pc, #20] ; (8009350 <_fflush_r+0x70>) 800933a: 429c cmp r4, r3 800933c: d101 bne.n 8009342 <_fflush_r+0x62> 800933e: 68ac ldr r4, [r5, #8] 8009340: e7df b.n 8009302 <_fflush_r+0x22> 8009342: 4b04 ldr r3, [pc, #16] ; (8009354 <_fflush_r+0x74>) 8009344: 429c cmp r4, r3 8009346: bf08 it eq 8009348: 68ec ldreq r4, [r5, #12] 800934a: e7da b.n 8009302 <_fflush_r+0x22> 800934c: 0800b374 .word 0x0800b374 8009350: 0800b394 .word 0x0800b394 8009354: 0800b354 .word 0x0800b354 08009358 : 8009358: 2300 movs r3, #0 800935a: b510 push {r4, lr} 800935c: 4604 mov r4, r0 800935e: e9c0 3300 strd r3, r3, [r0] 8009362: e9c0 3304 strd r3, r3, [r0, #16] 8009366: 6083 str r3, [r0, #8] 8009368: 8181 strh r1, [r0, #12] 800936a: 6643 str r3, [r0, #100] ; 0x64 800936c: 81c2 strh r2, [r0, #14] 800936e: 6183 str r3, [r0, #24] 8009370: 4619 mov r1, r3 8009372: 2208 movs r2, #8 8009374: 305c adds r0, #92 ; 0x5c 8009376: f7fe fa0f bl 8007798 800937a: 4b05 ldr r3, [pc, #20] ; (8009390 ) 800937c: 6224 str r4, [r4, #32] 800937e: 6263 str r3, [r4, #36] ; 0x24 8009380: 4b04 ldr r3, [pc, #16] ; (8009394 ) 8009382: 62a3 str r3, [r4, #40] ; 0x28 8009384: 4b04 ldr r3, [pc, #16] ; (8009398 ) 8009386: 62e3 str r3, [r4, #44] ; 0x2c 8009388: 4b04 ldr r3, [pc, #16] ; (800939c ) 800938a: 6323 str r3, [r4, #48] ; 0x30 800938c: bd10 pop {r4, pc} 800938e: bf00 nop 8009390: 0800a385 .word 0x0800a385 8009394: 0800a3a7 .word 0x0800a3a7 8009398: 0800a3df .word 0x0800a3df 800939c: 0800a403 .word 0x0800a403 080093a0 <_cleanup_r>: 80093a0: 4901 ldr r1, [pc, #4] ; (80093a8 <_cleanup_r+0x8>) 80093a2: f000 b8af b.w 8009504 <_fwalk_reent> 80093a6: bf00 nop 80093a8: 080092e1 .word 0x080092e1 080093ac <__sfmoreglue>: 80093ac: b570 push {r4, r5, r6, lr} 80093ae: 2568 movs r5, #104 ; 0x68 80093b0: 1e4a subs r2, r1, #1 80093b2: 4355 muls r5, r2 80093b4: 460e mov r6, r1 80093b6: f105 0174 add.w r1, r5, #116 ; 0x74 80093ba: f7fe fa41 bl 8007840 <_malloc_r> 80093be: 4604 mov r4, r0 80093c0: b140 cbz r0, 80093d4 <__sfmoreglue+0x28> 80093c2: 2100 movs r1, #0 80093c4: e9c0 1600 strd r1, r6, [r0] 80093c8: 300c adds r0, #12 80093ca: 60a0 str r0, [r4, #8] 80093cc: f105 0268 add.w r2, r5, #104 ; 0x68 80093d0: f7fe f9e2 bl 8007798 80093d4: 4620 mov r0, r4 80093d6: bd70 pop {r4, r5, r6, pc} 080093d8 <__sfp_lock_acquire>: 80093d8: 4801 ldr r0, [pc, #4] ; (80093e0 <__sfp_lock_acquire+0x8>) 80093da: f000 b8b8 b.w 800954e <__retarget_lock_acquire_recursive> 80093de: bf00 nop 80093e0: 20002542 .word 0x20002542 080093e4 <__sfp_lock_release>: 80093e4: 4801 ldr r0, [pc, #4] ; (80093ec <__sfp_lock_release+0x8>) 80093e6: f000 b8b3 b.w 8009550 <__retarget_lock_release_recursive> 80093ea: bf00 nop 80093ec: 20002542 .word 0x20002542 080093f0 <__sinit_lock_acquire>: 80093f0: 4801 ldr r0, [pc, #4] ; (80093f8 <__sinit_lock_acquire+0x8>) 80093f2: f000 b8ac b.w 800954e <__retarget_lock_acquire_recursive> 80093f6: bf00 nop 80093f8: 2000253d .word 0x2000253d 080093fc <__sinit_lock_release>: 80093fc: 4801 ldr r0, [pc, #4] ; (8009404 <__sinit_lock_release+0x8>) 80093fe: f000 b8a7 b.w 8009550 <__retarget_lock_release_recursive> 8009402: bf00 nop 8009404: 2000253d .word 0x2000253d 08009408 <__sinit>: 8009408: b510 push {r4, lr} 800940a: 4604 mov r4, r0 800940c: f7ff fff0 bl 80093f0 <__sinit_lock_acquire> 8009410: 69a3 ldr r3, [r4, #24] 8009412: b11b cbz r3, 800941c <__sinit+0x14> 8009414: e8bd 4010 ldmia.w sp!, {r4, lr} 8009418: f7ff bff0 b.w 80093fc <__sinit_lock_release> 800941c: e9c4 3312 strd r3, r3, [r4, #72] ; 0x48 8009420: 6523 str r3, [r4, #80] ; 0x50 8009422: 4b13 ldr r3, [pc, #76] ; (8009470 <__sinit+0x68>) 8009424: 4a13 ldr r2, [pc, #76] ; (8009474 <__sinit+0x6c>) 8009426: 681b ldr r3, [r3, #0] 8009428: 62a2 str r2, [r4, #40] ; 0x28 800942a: 42a3 cmp r3, r4 800942c: bf08 it eq 800942e: 2301 moveq r3, #1 8009430: 4620 mov r0, r4 8009432: bf08 it eq 8009434: 61a3 streq r3, [r4, #24] 8009436: f000 f81f bl 8009478 <__sfp> 800943a: 6060 str r0, [r4, #4] 800943c: 4620 mov r0, r4 800943e: f000 f81b bl 8009478 <__sfp> 8009442: 60a0 str r0, [r4, #8] 8009444: 4620 mov r0, r4 8009446: f000 f817 bl 8009478 <__sfp> 800944a: 2200 movs r2, #0 800944c: 2104 movs r1, #4 800944e: 60e0 str r0, [r4, #12] 8009450: 6860 ldr r0, [r4, #4] 8009452: f7ff ff81 bl 8009358 8009456: 2201 movs r2, #1 8009458: 2109 movs r1, #9 800945a: 68a0 ldr r0, [r4, #8] 800945c: f7ff ff7c bl 8009358 8009460: 2202 movs r2, #2 8009462: 2112 movs r1, #18 8009464: 68e0 ldr r0, [r4, #12] 8009466: f7ff ff77 bl 8009358 800946a: 2301 movs r3, #1 800946c: 61a3 str r3, [r4, #24] 800946e: e7d1 b.n 8009414 <__sinit+0xc> 8009470: 0800b288 .word 0x0800b288 8009474: 080093a1 .word 0x080093a1 08009478 <__sfp>: 8009478: b5f8 push {r3, r4, r5, r6, r7, lr} 800947a: 4607 mov r7, r0 800947c: f7ff ffac bl 80093d8 <__sfp_lock_acquire> 8009480: 4b1e ldr r3, [pc, #120] ; (80094fc <__sfp+0x84>) 8009482: 681e ldr r6, [r3, #0] 8009484: 69b3 ldr r3, [r6, #24] 8009486: b913 cbnz r3, 800948e <__sfp+0x16> 8009488: 4630 mov r0, r6 800948a: f7ff ffbd bl 8009408 <__sinit> 800948e: 3648 adds r6, #72 ; 0x48 8009490: e9d6 3401 ldrd r3, r4, [r6, #4] 8009494: 3b01 subs r3, #1 8009496: d503 bpl.n 80094a0 <__sfp+0x28> 8009498: 6833 ldr r3, [r6, #0] 800949a: b30b cbz r3, 80094e0 <__sfp+0x68> 800949c: 6836 ldr r6, [r6, #0] 800949e: e7f7 b.n 8009490 <__sfp+0x18> 80094a0: f9b4 500c ldrsh.w r5, [r4, #12] 80094a4: b9d5 cbnz r5, 80094dc <__sfp+0x64> 80094a6: 4b16 ldr r3, [pc, #88] ; (8009500 <__sfp+0x88>) 80094a8: f104 0058 add.w r0, r4, #88 ; 0x58 80094ac: 60e3 str r3, [r4, #12] 80094ae: 6665 str r5, [r4, #100] ; 0x64 80094b0: f000 f84c bl 800954c <__retarget_lock_init_recursive> 80094b4: f7ff ff96 bl 80093e4 <__sfp_lock_release> 80094b8: 2208 movs r2, #8 80094ba: 4629 mov r1, r5 80094bc: e9c4 5501 strd r5, r5, [r4, #4] 80094c0: e9c4 5504 strd r5, r5, [r4, #16] 80094c4: 6025 str r5, [r4, #0] 80094c6: 61a5 str r5, [r4, #24] 80094c8: f104 005c add.w r0, r4, #92 ; 0x5c 80094cc: f7fe f964 bl 8007798 80094d0: e9c4 550d strd r5, r5, [r4, #52] ; 0x34 80094d4: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48 80094d8: 4620 mov r0, r4 80094da: bdf8 pop {r3, r4, r5, r6, r7, pc} 80094dc: 3468 adds r4, #104 ; 0x68 80094de: e7d9 b.n 8009494 <__sfp+0x1c> 80094e0: 2104 movs r1, #4 80094e2: 4638 mov r0, r7 80094e4: f7ff ff62 bl 80093ac <__sfmoreglue> 80094e8: 4604 mov r4, r0 80094ea: 6030 str r0, [r6, #0] 80094ec: 2800 cmp r0, #0 80094ee: d1d5 bne.n 800949c <__sfp+0x24> 80094f0: f7ff ff78 bl 80093e4 <__sfp_lock_release> 80094f4: 230c movs r3, #12 80094f6: 603b str r3, [r7, #0] 80094f8: e7ee b.n 80094d8 <__sfp+0x60> 80094fa: bf00 nop 80094fc: 0800b288 .word 0x0800b288 8009500: ffff0001 .word 0xffff0001 08009504 <_fwalk_reent>: 8009504: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8009508: 4606 mov r6, r0 800950a: 4688 mov r8, r1 800950c: 2700 movs r7, #0 800950e: f100 0448 add.w r4, r0, #72 ; 0x48 8009512: e9d4 9501 ldrd r9, r5, [r4, #4] 8009516: f1b9 0901 subs.w r9, r9, #1 800951a: d505 bpl.n 8009528 <_fwalk_reent+0x24> 800951c: 6824 ldr r4, [r4, #0] 800951e: 2c00 cmp r4, #0 8009520: d1f7 bne.n 8009512 <_fwalk_reent+0xe> 8009522: 4638 mov r0, r7 8009524: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8009528: 89ab ldrh r3, [r5, #12] 800952a: 2b01 cmp r3, #1 800952c: d907 bls.n 800953e <_fwalk_reent+0x3a> 800952e: f9b5 300e ldrsh.w r3, [r5, #14] 8009532: 3301 adds r3, #1 8009534: d003 beq.n 800953e <_fwalk_reent+0x3a> 8009536: 4629 mov r1, r5 8009538: 4630 mov r0, r6 800953a: 47c0 blx r8 800953c: 4307 orrs r7, r0 800953e: 3568 adds r5, #104 ; 0x68 8009540: e7e9 b.n 8009516 <_fwalk_reent+0x12> ... 08009544 <_localeconv_r>: 8009544: 4800 ldr r0, [pc, #0] ; (8009548 <_localeconv_r+0x4>) 8009546: 4770 bx lr 8009548: 20000168 .word 0x20000168 0800954c <__retarget_lock_init_recursive>: 800954c: 4770 bx lr 0800954e <__retarget_lock_acquire_recursive>: 800954e: 4770 bx lr 08009550 <__retarget_lock_release_recursive>: 8009550: 4770 bx lr 08009552 <__swhatbuf_r>: 8009552: b570 push {r4, r5, r6, lr} 8009554: 460e mov r6, r1 8009556: f9b1 100e ldrsh.w r1, [r1, #14] 800955a: 4614 mov r4, r2 800955c: 2900 cmp r1, #0 800955e: 461d mov r5, r3 8009560: b096 sub sp, #88 ; 0x58 8009562: da07 bge.n 8009574 <__swhatbuf_r+0x22> 8009564: 2300 movs r3, #0 8009566: 602b str r3, [r5, #0] 8009568: 89b3 ldrh r3, [r6, #12] 800956a: 061a lsls r2, r3, #24 800956c: d410 bmi.n 8009590 <__swhatbuf_r+0x3e> 800956e: f44f 6380 mov.w r3, #1024 ; 0x400 8009572: e00e b.n 8009592 <__swhatbuf_r+0x40> 8009574: 466a mov r2, sp 8009576: f000 ff9b bl 800a4b0 <_fstat_r> 800957a: 2800 cmp r0, #0 800957c: dbf2 blt.n 8009564 <__swhatbuf_r+0x12> 800957e: 9a01 ldr r2, [sp, #4] 8009580: f402 4270 and.w r2, r2, #61440 ; 0xf000 8009584: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 8009588: 425a negs r2, r3 800958a: 415a adcs r2, r3 800958c: 602a str r2, [r5, #0] 800958e: e7ee b.n 800956e <__swhatbuf_r+0x1c> 8009590: 2340 movs r3, #64 ; 0x40 8009592: 2000 movs r0, #0 8009594: 6023 str r3, [r4, #0] 8009596: b016 add sp, #88 ; 0x58 8009598: bd70 pop {r4, r5, r6, pc} ... 0800959c <__smakebuf_r>: 800959c: 898b ldrh r3, [r1, #12] 800959e: b573 push {r0, r1, r4, r5, r6, lr} 80095a0: 079d lsls r5, r3, #30 80095a2: 4606 mov r6, r0 80095a4: 460c mov r4, r1 80095a6: d507 bpl.n 80095b8 <__smakebuf_r+0x1c> 80095a8: f104 0347 add.w r3, r4, #71 ; 0x47 80095ac: 6023 str r3, [r4, #0] 80095ae: 6123 str r3, [r4, #16] 80095b0: 2301 movs r3, #1 80095b2: 6163 str r3, [r4, #20] 80095b4: b002 add sp, #8 80095b6: bd70 pop {r4, r5, r6, pc} 80095b8: 466a mov r2, sp 80095ba: ab01 add r3, sp, #4 80095bc: f7ff ffc9 bl 8009552 <__swhatbuf_r> 80095c0: 9900 ldr r1, [sp, #0] 80095c2: 4605 mov r5, r0 80095c4: 4630 mov r0, r6 80095c6: f7fe f93b bl 8007840 <_malloc_r> 80095ca: b948 cbnz r0, 80095e0 <__smakebuf_r+0x44> 80095cc: f9b4 300c ldrsh.w r3, [r4, #12] 80095d0: 059a lsls r2, r3, #22 80095d2: d4ef bmi.n 80095b4 <__smakebuf_r+0x18> 80095d4: f023 0303 bic.w r3, r3, #3 80095d8: f043 0302 orr.w r3, r3, #2 80095dc: 81a3 strh r3, [r4, #12] 80095de: e7e3 b.n 80095a8 <__smakebuf_r+0xc> 80095e0: 4b0d ldr r3, [pc, #52] ; (8009618 <__smakebuf_r+0x7c>) 80095e2: 62b3 str r3, [r6, #40] ; 0x28 80095e4: 89a3 ldrh r3, [r4, #12] 80095e6: 6020 str r0, [r4, #0] 80095e8: f043 0380 orr.w r3, r3, #128 ; 0x80 80095ec: 81a3 strh r3, [r4, #12] 80095ee: 9b00 ldr r3, [sp, #0] 80095f0: 6120 str r0, [r4, #16] 80095f2: 6163 str r3, [r4, #20] 80095f4: 9b01 ldr r3, [sp, #4] 80095f6: b15b cbz r3, 8009610 <__smakebuf_r+0x74> 80095f8: 4630 mov r0, r6 80095fa: f9b4 100e ldrsh.w r1, [r4, #14] 80095fe: f000 ff69 bl 800a4d4 <_isatty_r> 8009602: b128 cbz r0, 8009610 <__smakebuf_r+0x74> 8009604: 89a3 ldrh r3, [r4, #12] 8009606: f023 0303 bic.w r3, r3, #3 800960a: f043 0301 orr.w r3, r3, #1 800960e: 81a3 strh r3, [r4, #12] 8009610: 89a0 ldrh r0, [r4, #12] 8009612: 4305 orrs r5, r0 8009614: 81a5 strh r5, [r4, #12] 8009616: e7cd b.n 80095b4 <__smakebuf_r+0x18> 8009618: 080093a1 .word 0x080093a1 0800961c : 800961c: 4603 mov r3, r0 800961e: b510 push {r4, lr} 8009620: b2c9 uxtb r1, r1 8009622: 4402 add r2, r0 8009624: 4293 cmp r3, r2 8009626: 4618 mov r0, r3 8009628: d101 bne.n 800962e 800962a: 2000 movs r0, #0 800962c: e003 b.n 8009636 800962e: 7804 ldrb r4, [r0, #0] 8009630: 3301 adds r3, #1 8009632: 428c cmp r4, r1 8009634: d1f6 bne.n 8009624 8009636: bd10 pop {r4, pc} 08009638 : 8009638: 440a add r2, r1 800963a: 4291 cmp r1, r2 800963c: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff 8009640: d100 bne.n 8009644 8009642: 4770 bx lr 8009644: b510 push {r4, lr} 8009646: f811 4b01 ldrb.w r4, [r1], #1 800964a: 4291 cmp r1, r2 800964c: f803 4f01 strb.w r4, [r3, #1]! 8009650: d1f9 bne.n 8009646 8009652: bd10 pop {r4, pc} 08009654 <__malloc_lock>: 8009654: 4801 ldr r0, [pc, #4] ; (800965c <__malloc_lock+0x8>) 8009656: f7ff bf7a b.w 800954e <__retarget_lock_acquire_recursive> 800965a: bf00 nop 800965c: 2000253e .word 0x2000253e 08009660 <__malloc_unlock>: 8009660: 4801 ldr r0, [pc, #4] ; (8009668 <__malloc_unlock+0x8>) 8009662: f7ff bf75 b.w 8009550 <__retarget_lock_release_recursive> 8009666: bf00 nop 8009668: 2000253e .word 0x2000253e 0800966c <_Balloc>: 800966c: b570 push {r4, r5, r6, lr} 800966e: 6a46 ldr r6, [r0, #36] ; 0x24 8009670: 4604 mov r4, r0 8009672: 460d mov r5, r1 8009674: b976 cbnz r6, 8009694 <_Balloc+0x28> 8009676: 2010 movs r0, #16 8009678: f7fe f87e bl 8007778 800967c: 4602 mov r2, r0 800967e: 6260 str r0, [r4, #36] ; 0x24 8009680: b920 cbnz r0, 800968c <_Balloc+0x20> 8009682: 2166 movs r1, #102 ; 0x66 8009684: 4b17 ldr r3, [pc, #92] ; (80096e4 <_Balloc+0x78>) 8009686: 4818 ldr r0, [pc, #96] ; (80096e8 <_Balloc+0x7c>) 8009688: f000 fed2 bl 800a430 <__assert_func> 800968c: e9c0 6601 strd r6, r6, [r0, #4] 8009690: 6006 str r6, [r0, #0] 8009692: 60c6 str r6, [r0, #12] 8009694: 6a66 ldr r6, [r4, #36] ; 0x24 8009696: 68f3 ldr r3, [r6, #12] 8009698: b183 cbz r3, 80096bc <_Balloc+0x50> 800969a: 6a63 ldr r3, [r4, #36] ; 0x24 800969c: 68db ldr r3, [r3, #12] 800969e: f853 0025 ldr.w r0, [r3, r5, lsl #2] 80096a2: b9b8 cbnz r0, 80096d4 <_Balloc+0x68> 80096a4: 2101 movs r1, #1 80096a6: fa01 f605 lsl.w r6, r1, r5 80096aa: 1d72 adds r2, r6, #5 80096ac: 4620 mov r0, r4 80096ae: 0092 lsls r2, r2, #2 80096b0: f000 fb5e bl 8009d70 <_calloc_r> 80096b4: b160 cbz r0, 80096d0 <_Balloc+0x64> 80096b6: e9c0 5601 strd r5, r6, [r0, #4] 80096ba: e00e b.n 80096da <_Balloc+0x6e> 80096bc: 2221 movs r2, #33 ; 0x21 80096be: 2104 movs r1, #4 80096c0: 4620 mov r0, r4 80096c2: f000 fb55 bl 8009d70 <_calloc_r> 80096c6: 6a63 ldr r3, [r4, #36] ; 0x24 80096c8: 60f0 str r0, [r6, #12] 80096ca: 68db ldr r3, [r3, #12] 80096cc: 2b00 cmp r3, #0 80096ce: d1e4 bne.n 800969a <_Balloc+0x2e> 80096d0: 2000 movs r0, #0 80096d2: bd70 pop {r4, r5, r6, pc} 80096d4: 6802 ldr r2, [r0, #0] 80096d6: f843 2025 str.w r2, [r3, r5, lsl #2] 80096da: 2300 movs r3, #0 80096dc: e9c0 3303 strd r3, r3, [r0, #12] 80096e0: e7f7 b.n 80096d2 <_Balloc+0x66> 80096e2: bf00 nop 80096e4: 0800b2cd .word 0x0800b2cd 80096e8: 0800b3b4 .word 0x0800b3b4 080096ec <_Bfree>: 80096ec: b570 push {r4, r5, r6, lr} 80096ee: 6a46 ldr r6, [r0, #36] ; 0x24 80096f0: 4605 mov r5, r0 80096f2: 460c mov r4, r1 80096f4: b976 cbnz r6, 8009714 <_Bfree+0x28> 80096f6: 2010 movs r0, #16 80096f8: f7fe f83e bl 8007778 80096fc: 4602 mov r2, r0 80096fe: 6268 str r0, [r5, #36] ; 0x24 8009700: b920 cbnz r0, 800970c <_Bfree+0x20> 8009702: 218a movs r1, #138 ; 0x8a 8009704: 4b08 ldr r3, [pc, #32] ; (8009728 <_Bfree+0x3c>) 8009706: 4809 ldr r0, [pc, #36] ; (800972c <_Bfree+0x40>) 8009708: f000 fe92 bl 800a430 <__assert_func> 800970c: e9c0 6601 strd r6, r6, [r0, #4] 8009710: 6006 str r6, [r0, #0] 8009712: 60c6 str r6, [r0, #12] 8009714: b13c cbz r4, 8009726 <_Bfree+0x3a> 8009716: 6a6b ldr r3, [r5, #36] ; 0x24 8009718: 6862 ldr r2, [r4, #4] 800971a: 68db ldr r3, [r3, #12] 800971c: f853 1022 ldr.w r1, [r3, r2, lsl #2] 8009720: 6021 str r1, [r4, #0] 8009722: f843 4022 str.w r4, [r3, r2, lsl #2] 8009726: bd70 pop {r4, r5, r6, pc} 8009728: 0800b2cd .word 0x0800b2cd 800972c: 0800b3b4 .word 0x0800b3b4 08009730 <__multadd>: 8009730: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8009734: 4698 mov r8, r3 8009736: 460c mov r4, r1 8009738: 2300 movs r3, #0 800973a: 690e ldr r6, [r1, #16] 800973c: 4607 mov r7, r0 800973e: f101 0014 add.w r0, r1, #20 8009742: 6805 ldr r5, [r0, #0] 8009744: 3301 adds r3, #1 8009746: b2a9 uxth r1, r5 8009748: fb02 8101 mla r1, r2, r1, r8 800974c: 0c2d lsrs r5, r5, #16 800974e: ea4f 4c11 mov.w ip, r1, lsr #16 8009752: fb02 c505 mla r5, r2, r5, ip 8009756: b289 uxth r1, r1 8009758: eb01 4105 add.w r1, r1, r5, lsl #16 800975c: 429e cmp r6, r3 800975e: ea4f 4815 mov.w r8, r5, lsr #16 8009762: f840 1b04 str.w r1, [r0], #4 8009766: dcec bgt.n 8009742 <__multadd+0x12> 8009768: f1b8 0f00 cmp.w r8, #0 800976c: d022 beq.n 80097b4 <__multadd+0x84> 800976e: 68a3 ldr r3, [r4, #8] 8009770: 42b3 cmp r3, r6 8009772: dc19 bgt.n 80097a8 <__multadd+0x78> 8009774: 6861 ldr r1, [r4, #4] 8009776: 4638 mov r0, r7 8009778: 3101 adds r1, #1 800977a: f7ff ff77 bl 800966c <_Balloc> 800977e: 4605 mov r5, r0 8009780: b928 cbnz r0, 800978e <__multadd+0x5e> 8009782: 4602 mov r2, r0 8009784: 21b5 movs r1, #181 ; 0xb5 8009786: 4b0d ldr r3, [pc, #52] ; (80097bc <__multadd+0x8c>) 8009788: 480d ldr r0, [pc, #52] ; (80097c0 <__multadd+0x90>) 800978a: f000 fe51 bl 800a430 <__assert_func> 800978e: 6922 ldr r2, [r4, #16] 8009790: f104 010c add.w r1, r4, #12 8009794: 3202 adds r2, #2 8009796: 0092 lsls r2, r2, #2 8009798: 300c adds r0, #12 800979a: f7ff ff4d bl 8009638 800979e: 4621 mov r1, r4 80097a0: 4638 mov r0, r7 80097a2: f7ff ffa3 bl 80096ec <_Bfree> 80097a6: 462c mov r4, r5 80097a8: eb04 0386 add.w r3, r4, r6, lsl #2 80097ac: 3601 adds r6, #1 80097ae: f8c3 8014 str.w r8, [r3, #20] 80097b2: 6126 str r6, [r4, #16] 80097b4: 4620 mov r0, r4 80097b6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80097ba: bf00 nop 80097bc: 0800b343 .word 0x0800b343 80097c0: 0800b3b4 .word 0x0800b3b4 080097c4 <__hi0bits>: 80097c4: 0c02 lsrs r2, r0, #16 80097c6: 0412 lsls r2, r2, #16 80097c8: 4603 mov r3, r0 80097ca: b9ca cbnz r2, 8009800 <__hi0bits+0x3c> 80097cc: 0403 lsls r3, r0, #16 80097ce: 2010 movs r0, #16 80097d0: f013 4f7f tst.w r3, #4278190080 ; 0xff000000 80097d4: bf04 itt eq 80097d6: 021b lsleq r3, r3, #8 80097d8: 3008 addeq r0, #8 80097da: f013 4f70 tst.w r3, #4026531840 ; 0xf0000000 80097de: bf04 itt eq 80097e0: 011b lsleq r3, r3, #4 80097e2: 3004 addeq r0, #4 80097e4: f013 4f40 tst.w r3, #3221225472 ; 0xc0000000 80097e8: bf04 itt eq 80097ea: 009b lsleq r3, r3, #2 80097ec: 3002 addeq r0, #2 80097ee: 2b00 cmp r3, #0 80097f0: db05 blt.n 80097fe <__hi0bits+0x3a> 80097f2: f013 4f80 tst.w r3, #1073741824 ; 0x40000000 80097f6: f100 0001 add.w r0, r0, #1 80097fa: bf08 it eq 80097fc: 2020 moveq r0, #32 80097fe: 4770 bx lr 8009800: 2000 movs r0, #0 8009802: e7e5 b.n 80097d0 <__hi0bits+0xc> 08009804 <__lo0bits>: 8009804: 6803 ldr r3, [r0, #0] 8009806: 4602 mov r2, r0 8009808: f013 0007 ands.w r0, r3, #7 800980c: d00b beq.n 8009826 <__lo0bits+0x22> 800980e: 07d9 lsls r1, r3, #31 8009810: d422 bmi.n 8009858 <__lo0bits+0x54> 8009812: 0798 lsls r0, r3, #30 8009814: bf49 itett mi 8009816: 085b lsrmi r3, r3, #1 8009818: 089b lsrpl r3, r3, #2 800981a: 2001 movmi r0, #1 800981c: 6013 strmi r3, [r2, #0] 800981e: bf5c itt pl 8009820: 2002 movpl r0, #2 8009822: 6013 strpl r3, [r2, #0] 8009824: 4770 bx lr 8009826: b299 uxth r1, r3 8009828: b909 cbnz r1, 800982e <__lo0bits+0x2a> 800982a: 2010 movs r0, #16 800982c: 0c1b lsrs r3, r3, #16 800982e: f013 0fff tst.w r3, #255 ; 0xff 8009832: bf04 itt eq 8009834: 0a1b lsreq r3, r3, #8 8009836: 3008 addeq r0, #8 8009838: 0719 lsls r1, r3, #28 800983a: bf04 itt eq 800983c: 091b lsreq r3, r3, #4 800983e: 3004 addeq r0, #4 8009840: 0799 lsls r1, r3, #30 8009842: bf04 itt eq 8009844: 089b lsreq r3, r3, #2 8009846: 3002 addeq r0, #2 8009848: 07d9 lsls r1, r3, #31 800984a: d403 bmi.n 8009854 <__lo0bits+0x50> 800984c: 085b lsrs r3, r3, #1 800984e: f100 0001 add.w r0, r0, #1 8009852: d003 beq.n 800985c <__lo0bits+0x58> 8009854: 6013 str r3, [r2, #0] 8009856: 4770 bx lr 8009858: 2000 movs r0, #0 800985a: 4770 bx lr 800985c: 2020 movs r0, #32 800985e: 4770 bx lr 08009860 <__i2b>: 8009860: b510 push {r4, lr} 8009862: 460c mov r4, r1 8009864: 2101 movs r1, #1 8009866: f7ff ff01 bl 800966c <_Balloc> 800986a: 4602 mov r2, r0 800986c: b928 cbnz r0, 800987a <__i2b+0x1a> 800986e: f44f 71a0 mov.w r1, #320 ; 0x140 8009872: 4b04 ldr r3, [pc, #16] ; (8009884 <__i2b+0x24>) 8009874: 4804 ldr r0, [pc, #16] ; (8009888 <__i2b+0x28>) 8009876: f000 fddb bl 800a430 <__assert_func> 800987a: 2301 movs r3, #1 800987c: 6144 str r4, [r0, #20] 800987e: 6103 str r3, [r0, #16] 8009880: bd10 pop {r4, pc} 8009882: bf00 nop 8009884: 0800b343 .word 0x0800b343 8009888: 0800b3b4 .word 0x0800b3b4 0800988c <__multiply>: 800988c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8009890: 4614 mov r4, r2 8009892: 690a ldr r2, [r1, #16] 8009894: 6923 ldr r3, [r4, #16] 8009896: 460d mov r5, r1 8009898: 429a cmp r2, r3 800989a: bfbe ittt lt 800989c: 460b movlt r3, r1 800989e: 4625 movlt r5, r4 80098a0: 461c movlt r4, r3 80098a2: f8d5 a010 ldr.w sl, [r5, #16] 80098a6: f8d4 9010 ldr.w r9, [r4, #16] 80098aa: 68ab ldr r3, [r5, #8] 80098ac: 6869 ldr r1, [r5, #4] 80098ae: eb0a 0709 add.w r7, sl, r9 80098b2: 42bb cmp r3, r7 80098b4: b085 sub sp, #20 80098b6: bfb8 it lt 80098b8: 3101 addlt r1, #1 80098ba: f7ff fed7 bl 800966c <_Balloc> 80098be: b930 cbnz r0, 80098ce <__multiply+0x42> 80098c0: 4602 mov r2, r0 80098c2: f240 115d movw r1, #349 ; 0x15d 80098c6: 4b41 ldr r3, [pc, #260] ; (80099cc <__multiply+0x140>) 80098c8: 4841 ldr r0, [pc, #260] ; (80099d0 <__multiply+0x144>) 80098ca: f000 fdb1 bl 800a430 <__assert_func> 80098ce: f100 0614 add.w r6, r0, #20 80098d2: 4633 mov r3, r6 80098d4: 2200 movs r2, #0 80098d6: eb06 0887 add.w r8, r6, r7, lsl #2 80098da: 4543 cmp r3, r8 80098dc: d31e bcc.n 800991c <__multiply+0x90> 80098de: f105 0c14 add.w ip, r5, #20 80098e2: f104 0314 add.w r3, r4, #20 80098e6: eb0c 0c8a add.w ip, ip, sl, lsl #2 80098ea: eb03 0289 add.w r2, r3, r9, lsl #2 80098ee: 9202 str r2, [sp, #8] 80098f0: ebac 0205 sub.w r2, ip, r5 80098f4: 3a15 subs r2, #21 80098f6: f022 0203 bic.w r2, r2, #3 80098fa: 3204 adds r2, #4 80098fc: f105 0115 add.w r1, r5, #21 8009900: 458c cmp ip, r1 8009902: bf38 it cc 8009904: 2204 movcc r2, #4 8009906: 9201 str r2, [sp, #4] 8009908: 9a02 ldr r2, [sp, #8] 800990a: 9303 str r3, [sp, #12] 800990c: 429a cmp r2, r3 800990e: d808 bhi.n 8009922 <__multiply+0x96> 8009910: 2f00 cmp r7, #0 8009912: dc55 bgt.n 80099c0 <__multiply+0x134> 8009914: 6107 str r7, [r0, #16] 8009916: b005 add sp, #20 8009918: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800991c: f843 2b04 str.w r2, [r3], #4 8009920: e7db b.n 80098da <__multiply+0x4e> 8009922: f8b3 a000 ldrh.w sl, [r3] 8009926: f1ba 0f00 cmp.w sl, #0 800992a: d020 beq.n 800996e <__multiply+0xe2> 800992c: 46b1 mov r9, r6 800992e: 2200 movs r2, #0 8009930: f105 0e14 add.w lr, r5, #20 8009934: f85e 4b04 ldr.w r4, [lr], #4 8009938: f8d9 b000 ldr.w fp, [r9] 800993c: b2a1 uxth r1, r4 800993e: fa1f fb8b uxth.w fp, fp 8009942: fb0a b101 mla r1, sl, r1, fp 8009946: 4411 add r1, r2 8009948: f8d9 2000 ldr.w r2, [r9] 800994c: 0c24 lsrs r4, r4, #16 800994e: 0c12 lsrs r2, r2, #16 8009950: fb0a 2404 mla r4, sl, r4, r2 8009954: eb04 4411 add.w r4, r4, r1, lsr #16 8009958: b289 uxth r1, r1 800995a: ea41 4104 orr.w r1, r1, r4, lsl #16 800995e: 45f4 cmp ip, lr 8009960: ea4f 4214 mov.w r2, r4, lsr #16 8009964: f849 1b04 str.w r1, [r9], #4 8009968: d8e4 bhi.n 8009934 <__multiply+0xa8> 800996a: 9901 ldr r1, [sp, #4] 800996c: 5072 str r2, [r6, r1] 800996e: 9a03 ldr r2, [sp, #12] 8009970: 3304 adds r3, #4 8009972: f8b2 9002 ldrh.w r9, [r2, #2] 8009976: f1b9 0f00 cmp.w r9, #0 800997a: d01f beq.n 80099bc <__multiply+0x130> 800997c: 46b6 mov lr, r6 800997e: f04f 0a00 mov.w sl, #0 8009982: 6834 ldr r4, [r6, #0] 8009984: f105 0114 add.w r1, r5, #20 8009988: 880a ldrh r2, [r1, #0] 800998a: f8be b002 ldrh.w fp, [lr, #2] 800998e: b2a4 uxth r4, r4 8009990: fb09 b202 mla r2, r9, r2, fp 8009994: 4492 add sl, r2 8009996: ea44 440a orr.w r4, r4, sl, lsl #16 800999a: f84e 4b04 str.w r4, [lr], #4 800999e: f851 4b04 ldr.w r4, [r1], #4 80099a2: f8be 2000 ldrh.w r2, [lr] 80099a6: 0c24 lsrs r4, r4, #16 80099a8: fb09 2404 mla r4, r9, r4, r2 80099ac: 458c cmp ip, r1 80099ae: eb04 441a add.w r4, r4, sl, lsr #16 80099b2: ea4f 4a14 mov.w sl, r4, lsr #16 80099b6: d8e7 bhi.n 8009988 <__multiply+0xfc> 80099b8: 9a01 ldr r2, [sp, #4] 80099ba: 50b4 str r4, [r6, r2] 80099bc: 3604 adds r6, #4 80099be: e7a3 b.n 8009908 <__multiply+0x7c> 80099c0: f858 3d04 ldr.w r3, [r8, #-4]! 80099c4: 2b00 cmp r3, #0 80099c6: d1a5 bne.n 8009914 <__multiply+0x88> 80099c8: 3f01 subs r7, #1 80099ca: e7a1 b.n 8009910 <__multiply+0x84> 80099cc: 0800b343 .word 0x0800b343 80099d0: 0800b3b4 .word 0x0800b3b4 080099d4 <__pow5mult>: 80099d4: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 80099d8: 4615 mov r5, r2 80099da: f012 0203 ands.w r2, r2, #3 80099de: 4606 mov r6, r0 80099e0: 460f mov r7, r1 80099e2: d007 beq.n 80099f4 <__pow5mult+0x20> 80099e4: 4c25 ldr r4, [pc, #148] ; (8009a7c <__pow5mult+0xa8>) 80099e6: 3a01 subs r2, #1 80099e8: 2300 movs r3, #0 80099ea: f854 2022 ldr.w r2, [r4, r2, lsl #2] 80099ee: f7ff fe9f bl 8009730 <__multadd> 80099f2: 4607 mov r7, r0 80099f4: 10ad asrs r5, r5, #2 80099f6: d03d beq.n 8009a74 <__pow5mult+0xa0> 80099f8: 6a74 ldr r4, [r6, #36] ; 0x24 80099fa: b97c cbnz r4, 8009a1c <__pow5mult+0x48> 80099fc: 2010 movs r0, #16 80099fe: f7fd febb bl 8007778 8009a02: 4602 mov r2, r0 8009a04: 6270 str r0, [r6, #36] ; 0x24 8009a06: b928 cbnz r0, 8009a14 <__pow5mult+0x40> 8009a08: f44f 71d7 mov.w r1, #430 ; 0x1ae 8009a0c: 4b1c ldr r3, [pc, #112] ; (8009a80 <__pow5mult+0xac>) 8009a0e: 481d ldr r0, [pc, #116] ; (8009a84 <__pow5mult+0xb0>) 8009a10: f000 fd0e bl 800a430 <__assert_func> 8009a14: e9c0 4401 strd r4, r4, [r0, #4] 8009a18: 6004 str r4, [r0, #0] 8009a1a: 60c4 str r4, [r0, #12] 8009a1c: f8d6 8024 ldr.w r8, [r6, #36] ; 0x24 8009a20: f8d8 4008 ldr.w r4, [r8, #8] 8009a24: b94c cbnz r4, 8009a3a <__pow5mult+0x66> 8009a26: f240 2171 movw r1, #625 ; 0x271 8009a2a: 4630 mov r0, r6 8009a2c: f7ff ff18 bl 8009860 <__i2b> 8009a30: 2300 movs r3, #0 8009a32: 4604 mov r4, r0 8009a34: f8c8 0008 str.w r0, [r8, #8] 8009a38: 6003 str r3, [r0, #0] 8009a3a: f04f 0900 mov.w r9, #0 8009a3e: 07eb lsls r3, r5, #31 8009a40: d50a bpl.n 8009a58 <__pow5mult+0x84> 8009a42: 4639 mov r1, r7 8009a44: 4622 mov r2, r4 8009a46: 4630 mov r0, r6 8009a48: f7ff ff20 bl 800988c <__multiply> 8009a4c: 4680 mov r8, r0 8009a4e: 4639 mov r1, r7 8009a50: 4630 mov r0, r6 8009a52: f7ff fe4b bl 80096ec <_Bfree> 8009a56: 4647 mov r7, r8 8009a58: 106d asrs r5, r5, #1 8009a5a: d00b beq.n 8009a74 <__pow5mult+0xa0> 8009a5c: 6820 ldr r0, [r4, #0] 8009a5e: b938 cbnz r0, 8009a70 <__pow5mult+0x9c> 8009a60: 4622 mov r2, r4 8009a62: 4621 mov r1, r4 8009a64: 4630 mov r0, r6 8009a66: f7ff ff11 bl 800988c <__multiply> 8009a6a: 6020 str r0, [r4, #0] 8009a6c: f8c0 9000 str.w r9, [r0] 8009a70: 4604 mov r4, r0 8009a72: e7e4 b.n 8009a3e <__pow5mult+0x6a> 8009a74: 4638 mov r0, r7 8009a76: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8009a7a: bf00 nop 8009a7c: 0800b508 .word 0x0800b508 8009a80: 0800b2cd .word 0x0800b2cd 8009a84: 0800b3b4 .word 0x0800b3b4 08009a88 <__lshift>: 8009a88: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8009a8c: 460c mov r4, r1 8009a8e: 4607 mov r7, r0 8009a90: 4691 mov r9, r2 8009a92: 6923 ldr r3, [r4, #16] 8009a94: 6849 ldr r1, [r1, #4] 8009a96: eb03 1862 add.w r8, r3, r2, asr #5 8009a9a: 68a3 ldr r3, [r4, #8] 8009a9c: ea4f 1a62 mov.w sl, r2, asr #5 8009aa0: f108 0601 add.w r6, r8, #1 8009aa4: 42b3 cmp r3, r6 8009aa6: db0b blt.n 8009ac0 <__lshift+0x38> 8009aa8: 4638 mov r0, r7 8009aaa: f7ff fddf bl 800966c <_Balloc> 8009aae: 4605 mov r5, r0 8009ab0: b948 cbnz r0, 8009ac6 <__lshift+0x3e> 8009ab2: 4602 mov r2, r0 8009ab4: f240 11d9 movw r1, #473 ; 0x1d9 8009ab8: 4b27 ldr r3, [pc, #156] ; (8009b58 <__lshift+0xd0>) 8009aba: 4828 ldr r0, [pc, #160] ; (8009b5c <__lshift+0xd4>) 8009abc: f000 fcb8 bl 800a430 <__assert_func> 8009ac0: 3101 adds r1, #1 8009ac2: 005b lsls r3, r3, #1 8009ac4: e7ee b.n 8009aa4 <__lshift+0x1c> 8009ac6: 2300 movs r3, #0 8009ac8: f100 0114 add.w r1, r0, #20 8009acc: f100 0210 add.w r2, r0, #16 8009ad0: 4618 mov r0, r3 8009ad2: 4553 cmp r3, sl 8009ad4: db33 blt.n 8009b3e <__lshift+0xb6> 8009ad6: 6920 ldr r0, [r4, #16] 8009ad8: ea2a 7aea bic.w sl, sl, sl, asr #31 8009adc: f104 0314 add.w r3, r4, #20 8009ae0: f019 091f ands.w r9, r9, #31 8009ae4: eb01 018a add.w r1, r1, sl, lsl #2 8009ae8: eb03 0c80 add.w ip, r3, r0, lsl #2 8009aec: d02b beq.n 8009b46 <__lshift+0xbe> 8009aee: 468a mov sl, r1 8009af0: 2200 movs r2, #0 8009af2: f1c9 0e20 rsb lr, r9, #32 8009af6: 6818 ldr r0, [r3, #0] 8009af8: fa00 f009 lsl.w r0, r0, r9 8009afc: 4302 orrs r2, r0 8009afe: f84a 2b04 str.w r2, [sl], #4 8009b02: f853 2b04 ldr.w r2, [r3], #4 8009b06: 459c cmp ip, r3 8009b08: fa22 f20e lsr.w r2, r2, lr 8009b0c: d8f3 bhi.n 8009af6 <__lshift+0x6e> 8009b0e: ebac 0304 sub.w r3, ip, r4 8009b12: 3b15 subs r3, #21 8009b14: f023 0303 bic.w r3, r3, #3 8009b18: 3304 adds r3, #4 8009b1a: f104 0015 add.w r0, r4, #21 8009b1e: 4584 cmp ip, r0 8009b20: bf38 it cc 8009b22: 2304 movcc r3, #4 8009b24: 50ca str r2, [r1, r3] 8009b26: b10a cbz r2, 8009b2c <__lshift+0xa4> 8009b28: f108 0602 add.w r6, r8, #2 8009b2c: 3e01 subs r6, #1 8009b2e: 4638 mov r0, r7 8009b30: 4621 mov r1, r4 8009b32: 612e str r6, [r5, #16] 8009b34: f7ff fdda bl 80096ec <_Bfree> 8009b38: 4628 mov r0, r5 8009b3a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8009b3e: f842 0f04 str.w r0, [r2, #4]! 8009b42: 3301 adds r3, #1 8009b44: e7c5 b.n 8009ad2 <__lshift+0x4a> 8009b46: 3904 subs r1, #4 8009b48: f853 2b04 ldr.w r2, [r3], #4 8009b4c: 459c cmp ip, r3 8009b4e: f841 2f04 str.w r2, [r1, #4]! 8009b52: d8f9 bhi.n 8009b48 <__lshift+0xc0> 8009b54: e7ea b.n 8009b2c <__lshift+0xa4> 8009b56: bf00 nop 8009b58: 0800b343 .word 0x0800b343 8009b5c: 0800b3b4 .word 0x0800b3b4 08009b60 <__mcmp>: 8009b60: 4603 mov r3, r0 8009b62: 690a ldr r2, [r1, #16] 8009b64: 6900 ldr r0, [r0, #16] 8009b66: b530 push {r4, r5, lr} 8009b68: 1a80 subs r0, r0, r2 8009b6a: d10d bne.n 8009b88 <__mcmp+0x28> 8009b6c: 3314 adds r3, #20 8009b6e: 3114 adds r1, #20 8009b70: eb03 0482 add.w r4, r3, r2, lsl #2 8009b74: eb01 0182 add.w r1, r1, r2, lsl #2 8009b78: f854 5d04 ldr.w r5, [r4, #-4]! 8009b7c: f851 2d04 ldr.w r2, [r1, #-4]! 8009b80: 4295 cmp r5, r2 8009b82: d002 beq.n 8009b8a <__mcmp+0x2a> 8009b84: d304 bcc.n 8009b90 <__mcmp+0x30> 8009b86: 2001 movs r0, #1 8009b88: bd30 pop {r4, r5, pc} 8009b8a: 42a3 cmp r3, r4 8009b8c: d3f4 bcc.n 8009b78 <__mcmp+0x18> 8009b8e: e7fb b.n 8009b88 <__mcmp+0x28> 8009b90: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8009b94: e7f8 b.n 8009b88 <__mcmp+0x28> ... 08009b98 <__mdiff>: 8009b98: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8009b9c: 460c mov r4, r1 8009b9e: 4606 mov r6, r0 8009ba0: 4611 mov r1, r2 8009ba2: 4620 mov r0, r4 8009ba4: 4692 mov sl, r2 8009ba6: f7ff ffdb bl 8009b60 <__mcmp> 8009baa: 1e05 subs r5, r0, #0 8009bac: d111 bne.n 8009bd2 <__mdiff+0x3a> 8009bae: 4629 mov r1, r5 8009bb0: 4630 mov r0, r6 8009bb2: f7ff fd5b bl 800966c <_Balloc> 8009bb6: 4602 mov r2, r0 8009bb8: b928 cbnz r0, 8009bc6 <__mdiff+0x2e> 8009bba: f240 2132 movw r1, #562 ; 0x232 8009bbe: 4b3c ldr r3, [pc, #240] ; (8009cb0 <__mdiff+0x118>) 8009bc0: 483c ldr r0, [pc, #240] ; (8009cb4 <__mdiff+0x11c>) 8009bc2: f000 fc35 bl 800a430 <__assert_func> 8009bc6: 2301 movs r3, #1 8009bc8: e9c0 3504 strd r3, r5, [r0, #16] 8009bcc: 4610 mov r0, r2 8009bce: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 8009bd2: bfa4 itt ge 8009bd4: 4653 movge r3, sl 8009bd6: 46a2 movge sl, r4 8009bd8: 4630 mov r0, r6 8009bda: f8da 1004 ldr.w r1, [sl, #4] 8009bde: bfa6 itte ge 8009be0: 461c movge r4, r3 8009be2: 2500 movge r5, #0 8009be4: 2501 movlt r5, #1 8009be6: f7ff fd41 bl 800966c <_Balloc> 8009bea: 4602 mov r2, r0 8009bec: b918 cbnz r0, 8009bf6 <__mdiff+0x5e> 8009bee: f44f 7110 mov.w r1, #576 ; 0x240 8009bf2: 4b2f ldr r3, [pc, #188] ; (8009cb0 <__mdiff+0x118>) 8009bf4: e7e4 b.n 8009bc0 <__mdiff+0x28> 8009bf6: f100 0814 add.w r8, r0, #20 8009bfa: f8da 7010 ldr.w r7, [sl, #16] 8009bfe: 60c5 str r5, [r0, #12] 8009c00: f04f 0c00 mov.w ip, #0 8009c04: f10a 0514 add.w r5, sl, #20 8009c08: f10a 0010 add.w r0, sl, #16 8009c0c: 46c2 mov sl, r8 8009c0e: 6926 ldr r6, [r4, #16] 8009c10: f104 0914 add.w r9, r4, #20 8009c14: eb05 0e87 add.w lr, r5, r7, lsl #2 8009c18: eb09 0686 add.w r6, r9, r6, lsl #2 8009c1c: f850 bf04 ldr.w fp, [r0, #4]! 8009c20: f859 3b04 ldr.w r3, [r9], #4 8009c24: fa1f f18b uxth.w r1, fp 8009c28: 4461 add r1, ip 8009c2a: fa1f fc83 uxth.w ip, r3 8009c2e: 0c1b lsrs r3, r3, #16 8009c30: eba1 010c sub.w r1, r1, ip 8009c34: ebc3 431b rsb r3, r3, fp, lsr #16 8009c38: eb03 4321 add.w r3, r3, r1, asr #16 8009c3c: b289 uxth r1, r1 8009c3e: ea4f 4c23 mov.w ip, r3, asr #16 8009c42: 454e cmp r6, r9 8009c44: ea41 4303 orr.w r3, r1, r3, lsl #16 8009c48: f84a 3b04 str.w r3, [sl], #4 8009c4c: d8e6 bhi.n 8009c1c <__mdiff+0x84> 8009c4e: 1b33 subs r3, r6, r4 8009c50: 3b15 subs r3, #21 8009c52: f023 0303 bic.w r3, r3, #3 8009c56: 3415 adds r4, #21 8009c58: 3304 adds r3, #4 8009c5a: 42a6 cmp r6, r4 8009c5c: bf38 it cc 8009c5e: 2304 movcc r3, #4 8009c60: 441d add r5, r3 8009c62: 4443 add r3, r8 8009c64: 461e mov r6, r3 8009c66: 462c mov r4, r5 8009c68: 4574 cmp r4, lr 8009c6a: d30e bcc.n 8009c8a <__mdiff+0xf2> 8009c6c: f10e 0103 add.w r1, lr, #3 8009c70: 1b49 subs r1, r1, r5 8009c72: f021 0103 bic.w r1, r1, #3 8009c76: 3d03 subs r5, #3 8009c78: 45ae cmp lr, r5 8009c7a: bf38 it cc 8009c7c: 2100 movcc r1, #0 8009c7e: 4419 add r1, r3 8009c80: f851 3d04 ldr.w r3, [r1, #-4]! 8009c84: b18b cbz r3, 8009caa <__mdiff+0x112> 8009c86: 6117 str r7, [r2, #16] 8009c88: e7a0 b.n 8009bcc <__mdiff+0x34> 8009c8a: f854 8b04 ldr.w r8, [r4], #4 8009c8e: fa1f f188 uxth.w r1, r8 8009c92: 4461 add r1, ip 8009c94: 1408 asrs r0, r1, #16 8009c96: eb00 4018 add.w r0, r0, r8, lsr #16 8009c9a: b289 uxth r1, r1 8009c9c: ea41 4100 orr.w r1, r1, r0, lsl #16 8009ca0: ea4f 4c20 mov.w ip, r0, asr #16 8009ca4: f846 1b04 str.w r1, [r6], #4 8009ca8: e7de b.n 8009c68 <__mdiff+0xd0> 8009caa: 3f01 subs r7, #1 8009cac: e7e8 b.n 8009c80 <__mdiff+0xe8> 8009cae: bf00 nop 8009cb0: 0800b343 .word 0x0800b343 8009cb4: 0800b3b4 .word 0x0800b3b4 08009cb8 <__d2b>: 8009cb8: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} 8009cbc: 2101 movs r1, #1 8009cbe: e9dd 7608 ldrd r7, r6, [sp, #32] 8009cc2: 4690 mov r8, r2 8009cc4: 461d mov r5, r3 8009cc6: f7ff fcd1 bl 800966c <_Balloc> 8009cca: 4604 mov r4, r0 8009ccc: b930 cbnz r0, 8009cdc <__d2b+0x24> 8009cce: 4602 mov r2, r0 8009cd0: f240 310a movw r1, #778 ; 0x30a 8009cd4: 4b24 ldr r3, [pc, #144] ; (8009d68 <__d2b+0xb0>) 8009cd6: 4825 ldr r0, [pc, #148] ; (8009d6c <__d2b+0xb4>) 8009cd8: f000 fbaa bl 800a430 <__assert_func> 8009cdc: f3c5 0313 ubfx r3, r5, #0, #20 8009ce0: f3c5 550a ubfx r5, r5, #20, #11 8009ce4: bb2d cbnz r5, 8009d32 <__d2b+0x7a> 8009ce6: 9301 str r3, [sp, #4] 8009ce8: f1b8 0300 subs.w r3, r8, #0 8009cec: d026 beq.n 8009d3c <__d2b+0x84> 8009cee: 4668 mov r0, sp 8009cf0: 9300 str r3, [sp, #0] 8009cf2: f7ff fd87 bl 8009804 <__lo0bits> 8009cf6: 9900 ldr r1, [sp, #0] 8009cf8: b1f0 cbz r0, 8009d38 <__d2b+0x80> 8009cfa: 9a01 ldr r2, [sp, #4] 8009cfc: f1c0 0320 rsb r3, r0, #32 8009d00: fa02 f303 lsl.w r3, r2, r3 8009d04: 430b orrs r3, r1 8009d06: 40c2 lsrs r2, r0 8009d08: 6163 str r3, [r4, #20] 8009d0a: 9201 str r2, [sp, #4] 8009d0c: 9b01 ldr r3, [sp, #4] 8009d0e: 2b00 cmp r3, #0 8009d10: bf14 ite ne 8009d12: 2102 movne r1, #2 8009d14: 2101 moveq r1, #1 8009d16: 61a3 str r3, [r4, #24] 8009d18: 6121 str r1, [r4, #16] 8009d1a: b1c5 cbz r5, 8009d4e <__d2b+0x96> 8009d1c: f2a5 4533 subw r5, r5, #1075 ; 0x433 8009d20: 4405 add r5, r0 8009d22: f1c0 0035 rsb r0, r0, #53 ; 0x35 8009d26: 603d str r5, [r7, #0] 8009d28: 6030 str r0, [r6, #0] 8009d2a: 4620 mov r0, r4 8009d2c: b002 add sp, #8 8009d2e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8009d32: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 8009d36: e7d6 b.n 8009ce6 <__d2b+0x2e> 8009d38: 6161 str r1, [r4, #20] 8009d3a: e7e7 b.n 8009d0c <__d2b+0x54> 8009d3c: a801 add r0, sp, #4 8009d3e: f7ff fd61 bl 8009804 <__lo0bits> 8009d42: 2101 movs r1, #1 8009d44: 9b01 ldr r3, [sp, #4] 8009d46: 6121 str r1, [r4, #16] 8009d48: 6163 str r3, [r4, #20] 8009d4a: 3020 adds r0, #32 8009d4c: e7e5 b.n 8009d1a <__d2b+0x62> 8009d4e: eb04 0381 add.w r3, r4, r1, lsl #2 8009d52: f2a0 4032 subw r0, r0, #1074 ; 0x432 8009d56: 6038 str r0, [r7, #0] 8009d58: 6918 ldr r0, [r3, #16] 8009d5a: f7ff fd33 bl 80097c4 <__hi0bits> 8009d5e: ebc0 1141 rsb r1, r0, r1, lsl #5 8009d62: 6031 str r1, [r6, #0] 8009d64: e7e1 b.n 8009d2a <__d2b+0x72> 8009d66: bf00 nop 8009d68: 0800b343 .word 0x0800b343 8009d6c: 0800b3b4 .word 0x0800b3b4 08009d70 <_calloc_r>: 8009d70: b538 push {r3, r4, r5, lr} 8009d72: fb02 f501 mul.w r5, r2, r1 8009d76: 4629 mov r1, r5 8009d78: f7fd fd62 bl 8007840 <_malloc_r> 8009d7c: 4604 mov r4, r0 8009d7e: b118 cbz r0, 8009d88 <_calloc_r+0x18> 8009d80: 462a mov r2, r5 8009d82: 2100 movs r1, #0 8009d84: f7fd fd08 bl 8007798 8009d88: 4620 mov r0, r4 8009d8a: bd38 pop {r3, r4, r5, pc} 08009d8c <__ssputs_r>: 8009d8c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8009d90: 688e ldr r6, [r1, #8] 8009d92: 4682 mov sl, r0 8009d94: 429e cmp r6, r3 8009d96: 460c mov r4, r1 8009d98: 4690 mov r8, r2 8009d9a: 461f mov r7, r3 8009d9c: d838 bhi.n 8009e10 <__ssputs_r+0x84> 8009d9e: 898a ldrh r2, [r1, #12] 8009da0: f412 6f90 tst.w r2, #1152 ; 0x480 8009da4: d032 beq.n 8009e0c <__ssputs_r+0x80> 8009da6: 6825 ldr r5, [r4, #0] 8009da8: 6909 ldr r1, [r1, #16] 8009daa: 3301 adds r3, #1 8009dac: eba5 0901 sub.w r9, r5, r1 8009db0: 6965 ldr r5, [r4, #20] 8009db2: 444b add r3, r9 8009db4: eb05 0545 add.w r5, r5, r5, lsl #1 8009db8: eb05 75d5 add.w r5, r5, r5, lsr #31 8009dbc: 106d asrs r5, r5, #1 8009dbe: 429d cmp r5, r3 8009dc0: bf38 it cc 8009dc2: 461d movcc r5, r3 8009dc4: 0553 lsls r3, r2, #21 8009dc6: d531 bpl.n 8009e2c <__ssputs_r+0xa0> 8009dc8: 4629 mov r1, r5 8009dca: f7fd fd39 bl 8007840 <_malloc_r> 8009dce: 4606 mov r6, r0 8009dd0: b950 cbnz r0, 8009de8 <__ssputs_r+0x5c> 8009dd2: 230c movs r3, #12 8009dd4: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8009dd8: f8ca 3000 str.w r3, [sl] 8009ddc: 89a3 ldrh r3, [r4, #12] 8009dde: f043 0340 orr.w r3, r3, #64 ; 0x40 8009de2: 81a3 strh r3, [r4, #12] 8009de4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8009de8: 464a mov r2, r9 8009dea: 6921 ldr r1, [r4, #16] 8009dec: f7ff fc24 bl 8009638 8009df0: 89a3 ldrh r3, [r4, #12] 8009df2: f423 6390 bic.w r3, r3, #1152 ; 0x480 8009df6: f043 0380 orr.w r3, r3, #128 ; 0x80 8009dfa: 81a3 strh r3, [r4, #12] 8009dfc: 6126 str r6, [r4, #16] 8009dfe: 444e add r6, r9 8009e00: 6026 str r6, [r4, #0] 8009e02: 463e mov r6, r7 8009e04: 6165 str r5, [r4, #20] 8009e06: eba5 0509 sub.w r5, r5, r9 8009e0a: 60a5 str r5, [r4, #8] 8009e0c: 42be cmp r6, r7 8009e0e: d900 bls.n 8009e12 <__ssputs_r+0x86> 8009e10: 463e mov r6, r7 8009e12: 4632 mov r2, r6 8009e14: 4641 mov r1, r8 8009e16: 6820 ldr r0, [r4, #0] 8009e18: f000 fb90 bl 800a53c 8009e1c: 68a3 ldr r3, [r4, #8] 8009e1e: 6822 ldr r2, [r4, #0] 8009e20: 1b9b subs r3, r3, r6 8009e22: 4432 add r2, r6 8009e24: 2000 movs r0, #0 8009e26: 60a3 str r3, [r4, #8] 8009e28: 6022 str r2, [r4, #0] 8009e2a: e7db b.n 8009de4 <__ssputs_r+0x58> 8009e2c: 462a mov r2, r5 8009e2e: f000 fb9f bl 800a570 <_realloc_r> 8009e32: 4606 mov r6, r0 8009e34: 2800 cmp r0, #0 8009e36: d1e1 bne.n 8009dfc <__ssputs_r+0x70> 8009e38: 4650 mov r0, sl 8009e3a: 6921 ldr r1, [r4, #16] 8009e3c: f7fd fcb4 bl 80077a8 <_free_r> 8009e40: e7c7 b.n 8009dd2 <__ssputs_r+0x46> ... 08009e44 <_svfiprintf_r>: 8009e44: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8009e48: 4698 mov r8, r3 8009e4a: 898b ldrh r3, [r1, #12] 8009e4c: 4607 mov r7, r0 8009e4e: 061b lsls r3, r3, #24 8009e50: 460d mov r5, r1 8009e52: 4614 mov r4, r2 8009e54: b09d sub sp, #116 ; 0x74 8009e56: d50e bpl.n 8009e76 <_svfiprintf_r+0x32> 8009e58: 690b ldr r3, [r1, #16] 8009e5a: b963 cbnz r3, 8009e76 <_svfiprintf_r+0x32> 8009e5c: 2140 movs r1, #64 ; 0x40 8009e5e: f7fd fcef bl 8007840 <_malloc_r> 8009e62: 6028 str r0, [r5, #0] 8009e64: 6128 str r0, [r5, #16] 8009e66: b920 cbnz r0, 8009e72 <_svfiprintf_r+0x2e> 8009e68: 230c movs r3, #12 8009e6a: 603b str r3, [r7, #0] 8009e6c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8009e70: e0d1 b.n 800a016 <_svfiprintf_r+0x1d2> 8009e72: 2340 movs r3, #64 ; 0x40 8009e74: 616b str r3, [r5, #20] 8009e76: 2300 movs r3, #0 8009e78: 9309 str r3, [sp, #36] ; 0x24 8009e7a: 2320 movs r3, #32 8009e7c: f88d 3029 strb.w r3, [sp, #41] ; 0x29 8009e80: 2330 movs r3, #48 ; 0x30 8009e82: f04f 0901 mov.w r9, #1 8009e86: f8cd 800c str.w r8, [sp, #12] 8009e8a: f8df 81a4 ldr.w r8, [pc, #420] ; 800a030 <_svfiprintf_r+0x1ec> 8009e8e: f88d 302a strb.w r3, [sp, #42] ; 0x2a 8009e92: 4623 mov r3, r4 8009e94: 469a mov sl, r3 8009e96: f813 2b01 ldrb.w r2, [r3], #1 8009e9a: b10a cbz r2, 8009ea0 <_svfiprintf_r+0x5c> 8009e9c: 2a25 cmp r2, #37 ; 0x25 8009e9e: d1f9 bne.n 8009e94 <_svfiprintf_r+0x50> 8009ea0: ebba 0b04 subs.w fp, sl, r4 8009ea4: d00b beq.n 8009ebe <_svfiprintf_r+0x7a> 8009ea6: 465b mov r3, fp 8009ea8: 4622 mov r2, r4 8009eaa: 4629 mov r1, r5 8009eac: 4638 mov r0, r7 8009eae: f7ff ff6d bl 8009d8c <__ssputs_r> 8009eb2: 3001 adds r0, #1 8009eb4: f000 80aa beq.w 800a00c <_svfiprintf_r+0x1c8> 8009eb8: 9a09 ldr r2, [sp, #36] ; 0x24 8009eba: 445a add r2, fp 8009ebc: 9209 str r2, [sp, #36] ; 0x24 8009ebe: f89a 3000 ldrb.w r3, [sl] 8009ec2: 2b00 cmp r3, #0 8009ec4: f000 80a2 beq.w 800a00c <_svfiprintf_r+0x1c8> 8009ec8: 2300 movs r3, #0 8009eca: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 8009ece: e9cd 2305 strd r2, r3, [sp, #20] 8009ed2: f10a 0a01 add.w sl, sl, #1 8009ed6: 9304 str r3, [sp, #16] 8009ed8: 9307 str r3, [sp, #28] 8009eda: f88d 3053 strb.w r3, [sp, #83] ; 0x53 8009ede: 931a str r3, [sp, #104] ; 0x68 8009ee0: 4654 mov r4, sl 8009ee2: 2205 movs r2, #5 8009ee4: f814 1b01 ldrb.w r1, [r4], #1 8009ee8: 4851 ldr r0, [pc, #324] ; (800a030 <_svfiprintf_r+0x1ec>) 8009eea: f7ff fb97 bl 800961c 8009eee: 9a04 ldr r2, [sp, #16] 8009ef0: b9d8 cbnz r0, 8009f2a <_svfiprintf_r+0xe6> 8009ef2: 06d0 lsls r0, r2, #27 8009ef4: bf44 itt mi 8009ef6: 2320 movmi r3, #32 8009ef8: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 8009efc: 0711 lsls r1, r2, #28 8009efe: bf44 itt mi 8009f00: 232b movmi r3, #43 ; 0x2b 8009f02: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 8009f06: f89a 3000 ldrb.w r3, [sl] 8009f0a: 2b2a cmp r3, #42 ; 0x2a 8009f0c: d015 beq.n 8009f3a <_svfiprintf_r+0xf6> 8009f0e: 4654 mov r4, sl 8009f10: 2000 movs r0, #0 8009f12: f04f 0c0a mov.w ip, #10 8009f16: 9a07 ldr r2, [sp, #28] 8009f18: 4621 mov r1, r4 8009f1a: f811 3b01 ldrb.w r3, [r1], #1 8009f1e: 3b30 subs r3, #48 ; 0x30 8009f20: 2b09 cmp r3, #9 8009f22: d94e bls.n 8009fc2 <_svfiprintf_r+0x17e> 8009f24: b1b0 cbz r0, 8009f54 <_svfiprintf_r+0x110> 8009f26: 9207 str r2, [sp, #28] 8009f28: e014 b.n 8009f54 <_svfiprintf_r+0x110> 8009f2a: eba0 0308 sub.w r3, r0, r8 8009f2e: fa09 f303 lsl.w r3, r9, r3 8009f32: 4313 orrs r3, r2 8009f34: 46a2 mov sl, r4 8009f36: 9304 str r3, [sp, #16] 8009f38: e7d2 b.n 8009ee0 <_svfiprintf_r+0x9c> 8009f3a: 9b03 ldr r3, [sp, #12] 8009f3c: 1d19 adds r1, r3, #4 8009f3e: 681b ldr r3, [r3, #0] 8009f40: 9103 str r1, [sp, #12] 8009f42: 2b00 cmp r3, #0 8009f44: bfbb ittet lt 8009f46: 425b neglt r3, r3 8009f48: f042 0202 orrlt.w r2, r2, #2 8009f4c: 9307 strge r3, [sp, #28] 8009f4e: 9307 strlt r3, [sp, #28] 8009f50: bfb8 it lt 8009f52: 9204 strlt r2, [sp, #16] 8009f54: 7823 ldrb r3, [r4, #0] 8009f56: 2b2e cmp r3, #46 ; 0x2e 8009f58: d10c bne.n 8009f74 <_svfiprintf_r+0x130> 8009f5a: 7863 ldrb r3, [r4, #1] 8009f5c: 2b2a cmp r3, #42 ; 0x2a 8009f5e: d135 bne.n 8009fcc <_svfiprintf_r+0x188> 8009f60: 9b03 ldr r3, [sp, #12] 8009f62: 3402 adds r4, #2 8009f64: 1d1a adds r2, r3, #4 8009f66: 681b ldr r3, [r3, #0] 8009f68: 9203 str r2, [sp, #12] 8009f6a: 2b00 cmp r3, #0 8009f6c: bfb8 it lt 8009f6e: f04f 33ff movlt.w r3, #4294967295 ; 0xffffffff 8009f72: 9305 str r3, [sp, #20] 8009f74: f8df a0c8 ldr.w sl, [pc, #200] ; 800a040 <_svfiprintf_r+0x1fc> 8009f78: 2203 movs r2, #3 8009f7a: 4650 mov r0, sl 8009f7c: 7821 ldrb r1, [r4, #0] 8009f7e: f7ff fb4d bl 800961c 8009f82: b140 cbz r0, 8009f96 <_svfiprintf_r+0x152> 8009f84: 2340 movs r3, #64 ; 0x40 8009f86: eba0 000a sub.w r0, r0, sl 8009f8a: fa03 f000 lsl.w r0, r3, r0 8009f8e: 9b04 ldr r3, [sp, #16] 8009f90: 3401 adds r4, #1 8009f92: 4303 orrs r3, r0 8009f94: 9304 str r3, [sp, #16] 8009f96: f814 1b01 ldrb.w r1, [r4], #1 8009f9a: 2206 movs r2, #6 8009f9c: 4825 ldr r0, [pc, #148] ; (800a034 <_svfiprintf_r+0x1f0>) 8009f9e: f88d 1028 strb.w r1, [sp, #40] ; 0x28 8009fa2: f7ff fb3b bl 800961c 8009fa6: 2800 cmp r0, #0 8009fa8: d038 beq.n 800a01c <_svfiprintf_r+0x1d8> 8009faa: 4b23 ldr r3, [pc, #140] ; (800a038 <_svfiprintf_r+0x1f4>) 8009fac: bb1b cbnz r3, 8009ff6 <_svfiprintf_r+0x1b2> 8009fae: 9b03 ldr r3, [sp, #12] 8009fb0: 3307 adds r3, #7 8009fb2: f023 0307 bic.w r3, r3, #7 8009fb6: 3308 adds r3, #8 8009fb8: 9303 str r3, [sp, #12] 8009fba: 9b09 ldr r3, [sp, #36] ; 0x24 8009fbc: 4433 add r3, r6 8009fbe: 9309 str r3, [sp, #36] ; 0x24 8009fc0: e767 b.n 8009e92 <_svfiprintf_r+0x4e> 8009fc2: 460c mov r4, r1 8009fc4: 2001 movs r0, #1 8009fc6: fb0c 3202 mla r2, ip, r2, r3 8009fca: e7a5 b.n 8009f18 <_svfiprintf_r+0xd4> 8009fcc: 2300 movs r3, #0 8009fce: f04f 0c0a mov.w ip, #10 8009fd2: 4619 mov r1, r3 8009fd4: 3401 adds r4, #1 8009fd6: 9305 str r3, [sp, #20] 8009fd8: 4620 mov r0, r4 8009fda: f810 2b01 ldrb.w r2, [r0], #1 8009fde: 3a30 subs r2, #48 ; 0x30 8009fe0: 2a09 cmp r2, #9 8009fe2: d903 bls.n 8009fec <_svfiprintf_r+0x1a8> 8009fe4: 2b00 cmp r3, #0 8009fe6: d0c5 beq.n 8009f74 <_svfiprintf_r+0x130> 8009fe8: 9105 str r1, [sp, #20] 8009fea: e7c3 b.n 8009f74 <_svfiprintf_r+0x130> 8009fec: 4604 mov r4, r0 8009fee: 2301 movs r3, #1 8009ff0: fb0c 2101 mla r1, ip, r1, r2 8009ff4: e7f0 b.n 8009fd8 <_svfiprintf_r+0x194> 8009ff6: ab03 add r3, sp, #12 8009ff8: 9300 str r3, [sp, #0] 8009ffa: 462a mov r2, r5 8009ffc: 4638 mov r0, r7 8009ffe: 4b0f ldr r3, [pc, #60] ; (800a03c <_svfiprintf_r+0x1f8>) 800a000: a904 add r1, sp, #16 800a002: f7fd fd15 bl 8007a30 <_printf_float> 800a006: 1c42 adds r2, r0, #1 800a008: 4606 mov r6, r0 800a00a: d1d6 bne.n 8009fba <_svfiprintf_r+0x176> 800a00c: 89ab ldrh r3, [r5, #12] 800a00e: 065b lsls r3, r3, #25 800a010: f53f af2c bmi.w 8009e6c <_svfiprintf_r+0x28> 800a014: 9809 ldr r0, [sp, #36] ; 0x24 800a016: b01d add sp, #116 ; 0x74 800a018: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800a01c: ab03 add r3, sp, #12 800a01e: 9300 str r3, [sp, #0] 800a020: 462a mov r2, r5 800a022: 4638 mov r0, r7 800a024: 4b05 ldr r3, [pc, #20] ; (800a03c <_svfiprintf_r+0x1f8>) 800a026: a904 add r1, sp, #16 800a028: f7fd ff9e bl 8007f68 <_printf_i> 800a02c: e7eb b.n 800a006 <_svfiprintf_r+0x1c2> 800a02e: bf00 nop 800a030: 0800b514 .word 0x0800b514 800a034: 0800b51e .word 0x0800b51e 800a038: 08007a31 .word 0x08007a31 800a03c: 08009d8d .word 0x08009d8d 800a040: 0800b51a .word 0x0800b51a 0800a044 <__sfputc_r>: 800a044: 6893 ldr r3, [r2, #8] 800a046: b410 push {r4} 800a048: 3b01 subs r3, #1 800a04a: 2b00 cmp r3, #0 800a04c: 6093 str r3, [r2, #8] 800a04e: da07 bge.n 800a060 <__sfputc_r+0x1c> 800a050: 6994 ldr r4, [r2, #24] 800a052: 42a3 cmp r3, r4 800a054: db01 blt.n 800a05a <__sfputc_r+0x16> 800a056: 290a cmp r1, #10 800a058: d102 bne.n 800a060 <__sfputc_r+0x1c> 800a05a: bc10 pop {r4} 800a05c: f7fe b97c b.w 8008358 <__swbuf_r> 800a060: 6813 ldr r3, [r2, #0] 800a062: 1c58 adds r0, r3, #1 800a064: 6010 str r0, [r2, #0] 800a066: 7019 strb r1, [r3, #0] 800a068: 4608 mov r0, r1 800a06a: bc10 pop {r4} 800a06c: 4770 bx lr 0800a06e <__sfputs_r>: 800a06e: b5f8 push {r3, r4, r5, r6, r7, lr} 800a070: 4606 mov r6, r0 800a072: 460f mov r7, r1 800a074: 4614 mov r4, r2 800a076: 18d5 adds r5, r2, r3 800a078: 42ac cmp r4, r5 800a07a: d101 bne.n 800a080 <__sfputs_r+0x12> 800a07c: 2000 movs r0, #0 800a07e: e007 b.n 800a090 <__sfputs_r+0x22> 800a080: 463a mov r2, r7 800a082: 4630 mov r0, r6 800a084: f814 1b01 ldrb.w r1, [r4], #1 800a088: f7ff ffdc bl 800a044 <__sfputc_r> 800a08c: 1c43 adds r3, r0, #1 800a08e: d1f3 bne.n 800a078 <__sfputs_r+0xa> 800a090: bdf8 pop {r3, r4, r5, r6, r7, pc} ... 0800a094 <_vfiprintf_r>: 800a094: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800a098: 460d mov r5, r1 800a09a: 4614 mov r4, r2 800a09c: 4698 mov r8, r3 800a09e: 4606 mov r6, r0 800a0a0: b09d sub sp, #116 ; 0x74 800a0a2: b118 cbz r0, 800a0ac <_vfiprintf_r+0x18> 800a0a4: 6983 ldr r3, [r0, #24] 800a0a6: b90b cbnz r3, 800a0ac <_vfiprintf_r+0x18> 800a0a8: f7ff f9ae bl 8009408 <__sinit> 800a0ac: 4b89 ldr r3, [pc, #548] ; (800a2d4 <_vfiprintf_r+0x240>) 800a0ae: 429d cmp r5, r3 800a0b0: d11b bne.n 800a0ea <_vfiprintf_r+0x56> 800a0b2: 6875 ldr r5, [r6, #4] 800a0b4: 6e6b ldr r3, [r5, #100] ; 0x64 800a0b6: 07d9 lsls r1, r3, #31 800a0b8: d405 bmi.n 800a0c6 <_vfiprintf_r+0x32> 800a0ba: 89ab ldrh r3, [r5, #12] 800a0bc: 059a lsls r2, r3, #22 800a0be: d402 bmi.n 800a0c6 <_vfiprintf_r+0x32> 800a0c0: 6da8 ldr r0, [r5, #88] ; 0x58 800a0c2: f7ff fa44 bl 800954e <__retarget_lock_acquire_recursive> 800a0c6: 89ab ldrh r3, [r5, #12] 800a0c8: 071b lsls r3, r3, #28 800a0ca: d501 bpl.n 800a0d0 <_vfiprintf_r+0x3c> 800a0cc: 692b ldr r3, [r5, #16] 800a0ce: b9eb cbnz r3, 800a10c <_vfiprintf_r+0x78> 800a0d0: 4629 mov r1, r5 800a0d2: 4630 mov r0, r6 800a0d4: f7fe f992 bl 80083fc <__swsetup_r> 800a0d8: b1c0 cbz r0, 800a10c <_vfiprintf_r+0x78> 800a0da: 6e6b ldr r3, [r5, #100] ; 0x64 800a0dc: 07dc lsls r4, r3, #31 800a0de: d50e bpl.n 800a0fe <_vfiprintf_r+0x6a> 800a0e0: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 800a0e4: b01d add sp, #116 ; 0x74 800a0e6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800a0ea: 4b7b ldr r3, [pc, #492] ; (800a2d8 <_vfiprintf_r+0x244>) 800a0ec: 429d cmp r5, r3 800a0ee: d101 bne.n 800a0f4 <_vfiprintf_r+0x60> 800a0f0: 68b5 ldr r5, [r6, #8] 800a0f2: e7df b.n 800a0b4 <_vfiprintf_r+0x20> 800a0f4: 4b79 ldr r3, [pc, #484] ; (800a2dc <_vfiprintf_r+0x248>) 800a0f6: 429d cmp r5, r3 800a0f8: bf08 it eq 800a0fa: 68f5 ldreq r5, [r6, #12] 800a0fc: e7da b.n 800a0b4 <_vfiprintf_r+0x20> 800a0fe: 89ab ldrh r3, [r5, #12] 800a100: 0598 lsls r0, r3, #22 800a102: d4ed bmi.n 800a0e0 <_vfiprintf_r+0x4c> 800a104: 6da8 ldr r0, [r5, #88] ; 0x58 800a106: f7ff fa23 bl 8009550 <__retarget_lock_release_recursive> 800a10a: e7e9 b.n 800a0e0 <_vfiprintf_r+0x4c> 800a10c: 2300 movs r3, #0 800a10e: 9309 str r3, [sp, #36] ; 0x24 800a110: 2320 movs r3, #32 800a112: f88d 3029 strb.w r3, [sp, #41] ; 0x29 800a116: 2330 movs r3, #48 ; 0x30 800a118: f04f 0901 mov.w r9, #1 800a11c: f8cd 800c str.w r8, [sp, #12] 800a120: f8df 81bc ldr.w r8, [pc, #444] ; 800a2e0 <_vfiprintf_r+0x24c> 800a124: f88d 302a strb.w r3, [sp, #42] ; 0x2a 800a128: 4623 mov r3, r4 800a12a: 469a mov sl, r3 800a12c: f813 2b01 ldrb.w r2, [r3], #1 800a130: b10a cbz r2, 800a136 <_vfiprintf_r+0xa2> 800a132: 2a25 cmp r2, #37 ; 0x25 800a134: d1f9 bne.n 800a12a <_vfiprintf_r+0x96> 800a136: ebba 0b04 subs.w fp, sl, r4 800a13a: d00b beq.n 800a154 <_vfiprintf_r+0xc0> 800a13c: 465b mov r3, fp 800a13e: 4622 mov r2, r4 800a140: 4629 mov r1, r5 800a142: 4630 mov r0, r6 800a144: f7ff ff93 bl 800a06e <__sfputs_r> 800a148: 3001 adds r0, #1 800a14a: f000 80aa beq.w 800a2a2 <_vfiprintf_r+0x20e> 800a14e: 9a09 ldr r2, [sp, #36] ; 0x24 800a150: 445a add r2, fp 800a152: 9209 str r2, [sp, #36] ; 0x24 800a154: f89a 3000 ldrb.w r3, [sl] 800a158: 2b00 cmp r3, #0 800a15a: f000 80a2 beq.w 800a2a2 <_vfiprintf_r+0x20e> 800a15e: 2300 movs r3, #0 800a160: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 800a164: e9cd 2305 strd r2, r3, [sp, #20] 800a168: f10a 0a01 add.w sl, sl, #1 800a16c: 9304 str r3, [sp, #16] 800a16e: 9307 str r3, [sp, #28] 800a170: f88d 3053 strb.w r3, [sp, #83] ; 0x53 800a174: 931a str r3, [sp, #104] ; 0x68 800a176: 4654 mov r4, sl 800a178: 2205 movs r2, #5 800a17a: f814 1b01 ldrb.w r1, [r4], #1 800a17e: 4858 ldr r0, [pc, #352] ; (800a2e0 <_vfiprintf_r+0x24c>) 800a180: f7ff fa4c bl 800961c 800a184: 9a04 ldr r2, [sp, #16] 800a186: b9d8 cbnz r0, 800a1c0 <_vfiprintf_r+0x12c> 800a188: 06d1 lsls r1, r2, #27 800a18a: bf44 itt mi 800a18c: 2320 movmi r3, #32 800a18e: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 800a192: 0713 lsls r3, r2, #28 800a194: bf44 itt mi 800a196: 232b movmi r3, #43 ; 0x2b 800a198: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 800a19c: f89a 3000 ldrb.w r3, [sl] 800a1a0: 2b2a cmp r3, #42 ; 0x2a 800a1a2: d015 beq.n 800a1d0 <_vfiprintf_r+0x13c> 800a1a4: 4654 mov r4, sl 800a1a6: 2000 movs r0, #0 800a1a8: f04f 0c0a mov.w ip, #10 800a1ac: 9a07 ldr r2, [sp, #28] 800a1ae: 4621 mov r1, r4 800a1b0: f811 3b01 ldrb.w r3, [r1], #1 800a1b4: 3b30 subs r3, #48 ; 0x30 800a1b6: 2b09 cmp r3, #9 800a1b8: d94e bls.n 800a258 <_vfiprintf_r+0x1c4> 800a1ba: b1b0 cbz r0, 800a1ea <_vfiprintf_r+0x156> 800a1bc: 9207 str r2, [sp, #28] 800a1be: e014 b.n 800a1ea <_vfiprintf_r+0x156> 800a1c0: eba0 0308 sub.w r3, r0, r8 800a1c4: fa09 f303 lsl.w r3, r9, r3 800a1c8: 4313 orrs r3, r2 800a1ca: 46a2 mov sl, r4 800a1cc: 9304 str r3, [sp, #16] 800a1ce: e7d2 b.n 800a176 <_vfiprintf_r+0xe2> 800a1d0: 9b03 ldr r3, [sp, #12] 800a1d2: 1d19 adds r1, r3, #4 800a1d4: 681b ldr r3, [r3, #0] 800a1d6: 9103 str r1, [sp, #12] 800a1d8: 2b00 cmp r3, #0 800a1da: bfbb ittet lt 800a1dc: 425b neglt r3, r3 800a1de: f042 0202 orrlt.w r2, r2, #2 800a1e2: 9307 strge r3, [sp, #28] 800a1e4: 9307 strlt r3, [sp, #28] 800a1e6: bfb8 it lt 800a1e8: 9204 strlt r2, [sp, #16] 800a1ea: 7823 ldrb r3, [r4, #0] 800a1ec: 2b2e cmp r3, #46 ; 0x2e 800a1ee: d10c bne.n 800a20a <_vfiprintf_r+0x176> 800a1f0: 7863 ldrb r3, [r4, #1] 800a1f2: 2b2a cmp r3, #42 ; 0x2a 800a1f4: d135 bne.n 800a262 <_vfiprintf_r+0x1ce> 800a1f6: 9b03 ldr r3, [sp, #12] 800a1f8: 3402 adds r4, #2 800a1fa: 1d1a adds r2, r3, #4 800a1fc: 681b ldr r3, [r3, #0] 800a1fe: 9203 str r2, [sp, #12] 800a200: 2b00 cmp r3, #0 800a202: bfb8 it lt 800a204: f04f 33ff movlt.w r3, #4294967295 ; 0xffffffff 800a208: 9305 str r3, [sp, #20] 800a20a: f8df a0e4 ldr.w sl, [pc, #228] ; 800a2f0 <_vfiprintf_r+0x25c> 800a20e: 2203 movs r2, #3 800a210: 4650 mov r0, sl 800a212: 7821 ldrb r1, [r4, #0] 800a214: f7ff fa02 bl 800961c 800a218: b140 cbz r0, 800a22c <_vfiprintf_r+0x198> 800a21a: 2340 movs r3, #64 ; 0x40 800a21c: eba0 000a sub.w r0, r0, sl 800a220: fa03 f000 lsl.w r0, r3, r0 800a224: 9b04 ldr r3, [sp, #16] 800a226: 3401 adds r4, #1 800a228: 4303 orrs r3, r0 800a22a: 9304 str r3, [sp, #16] 800a22c: f814 1b01 ldrb.w r1, [r4], #1 800a230: 2206 movs r2, #6 800a232: 482c ldr r0, [pc, #176] ; (800a2e4 <_vfiprintf_r+0x250>) 800a234: f88d 1028 strb.w r1, [sp, #40] ; 0x28 800a238: f7ff f9f0 bl 800961c 800a23c: 2800 cmp r0, #0 800a23e: d03f beq.n 800a2c0 <_vfiprintf_r+0x22c> 800a240: 4b29 ldr r3, [pc, #164] ; (800a2e8 <_vfiprintf_r+0x254>) 800a242: bb1b cbnz r3, 800a28c <_vfiprintf_r+0x1f8> 800a244: 9b03 ldr r3, [sp, #12] 800a246: 3307 adds r3, #7 800a248: f023 0307 bic.w r3, r3, #7 800a24c: 3308 adds r3, #8 800a24e: 9303 str r3, [sp, #12] 800a250: 9b09 ldr r3, [sp, #36] ; 0x24 800a252: 443b add r3, r7 800a254: 9309 str r3, [sp, #36] ; 0x24 800a256: e767 b.n 800a128 <_vfiprintf_r+0x94> 800a258: 460c mov r4, r1 800a25a: 2001 movs r0, #1 800a25c: fb0c 3202 mla r2, ip, r2, r3 800a260: e7a5 b.n 800a1ae <_vfiprintf_r+0x11a> 800a262: 2300 movs r3, #0 800a264: f04f 0c0a mov.w ip, #10 800a268: 4619 mov r1, r3 800a26a: 3401 adds r4, #1 800a26c: 9305 str r3, [sp, #20] 800a26e: 4620 mov r0, r4 800a270: f810 2b01 ldrb.w r2, [r0], #1 800a274: 3a30 subs r2, #48 ; 0x30 800a276: 2a09 cmp r2, #9 800a278: d903 bls.n 800a282 <_vfiprintf_r+0x1ee> 800a27a: 2b00 cmp r3, #0 800a27c: d0c5 beq.n 800a20a <_vfiprintf_r+0x176> 800a27e: 9105 str r1, [sp, #20] 800a280: e7c3 b.n 800a20a <_vfiprintf_r+0x176> 800a282: 4604 mov r4, r0 800a284: 2301 movs r3, #1 800a286: fb0c 2101 mla r1, ip, r1, r2 800a28a: e7f0 b.n 800a26e <_vfiprintf_r+0x1da> 800a28c: ab03 add r3, sp, #12 800a28e: 9300 str r3, [sp, #0] 800a290: 462a mov r2, r5 800a292: 4630 mov r0, r6 800a294: 4b15 ldr r3, [pc, #84] ; (800a2ec <_vfiprintf_r+0x258>) 800a296: a904 add r1, sp, #16 800a298: f7fd fbca bl 8007a30 <_printf_float> 800a29c: 4607 mov r7, r0 800a29e: 1c78 adds r0, r7, #1 800a2a0: d1d6 bne.n 800a250 <_vfiprintf_r+0x1bc> 800a2a2: 6e6b ldr r3, [r5, #100] ; 0x64 800a2a4: 07d9 lsls r1, r3, #31 800a2a6: d405 bmi.n 800a2b4 <_vfiprintf_r+0x220> 800a2a8: 89ab ldrh r3, [r5, #12] 800a2aa: 059a lsls r2, r3, #22 800a2ac: d402 bmi.n 800a2b4 <_vfiprintf_r+0x220> 800a2ae: 6da8 ldr r0, [r5, #88] ; 0x58 800a2b0: f7ff f94e bl 8009550 <__retarget_lock_release_recursive> 800a2b4: 89ab ldrh r3, [r5, #12] 800a2b6: 065b lsls r3, r3, #25 800a2b8: f53f af12 bmi.w 800a0e0 <_vfiprintf_r+0x4c> 800a2bc: 9809 ldr r0, [sp, #36] ; 0x24 800a2be: e711 b.n 800a0e4 <_vfiprintf_r+0x50> 800a2c0: ab03 add r3, sp, #12 800a2c2: 9300 str r3, [sp, #0] 800a2c4: 462a mov r2, r5 800a2c6: 4630 mov r0, r6 800a2c8: 4b08 ldr r3, [pc, #32] ; (800a2ec <_vfiprintf_r+0x258>) 800a2ca: a904 add r1, sp, #16 800a2cc: f7fd fe4c bl 8007f68 <_printf_i> 800a2d0: e7e4 b.n 800a29c <_vfiprintf_r+0x208> 800a2d2: bf00 nop 800a2d4: 0800b374 .word 0x0800b374 800a2d8: 0800b394 .word 0x0800b394 800a2dc: 0800b354 .word 0x0800b354 800a2e0: 0800b514 .word 0x0800b514 800a2e4: 0800b51e .word 0x0800b51e 800a2e8: 08007a31 .word 0x08007a31 800a2ec: 0800a06f .word 0x0800a06f 800a2f0: 0800b51a .word 0x0800b51a 0800a2f4 <_putc_r>: 800a2f4: b570 push {r4, r5, r6, lr} 800a2f6: 460d mov r5, r1 800a2f8: 4614 mov r4, r2 800a2fa: 4606 mov r6, r0 800a2fc: b118 cbz r0, 800a306 <_putc_r+0x12> 800a2fe: 6983 ldr r3, [r0, #24] 800a300: b90b cbnz r3, 800a306 <_putc_r+0x12> 800a302: f7ff f881 bl 8009408 <__sinit> 800a306: 4b1c ldr r3, [pc, #112] ; (800a378 <_putc_r+0x84>) 800a308: 429c cmp r4, r3 800a30a: d124 bne.n 800a356 <_putc_r+0x62> 800a30c: 6874 ldr r4, [r6, #4] 800a30e: 6e63 ldr r3, [r4, #100] ; 0x64 800a310: 07d8 lsls r0, r3, #31 800a312: d405 bmi.n 800a320 <_putc_r+0x2c> 800a314: 89a3 ldrh r3, [r4, #12] 800a316: 0599 lsls r1, r3, #22 800a318: d402 bmi.n 800a320 <_putc_r+0x2c> 800a31a: 6da0 ldr r0, [r4, #88] ; 0x58 800a31c: f7ff f917 bl 800954e <__retarget_lock_acquire_recursive> 800a320: 68a3 ldr r3, [r4, #8] 800a322: 3b01 subs r3, #1 800a324: 2b00 cmp r3, #0 800a326: 60a3 str r3, [r4, #8] 800a328: da05 bge.n 800a336 <_putc_r+0x42> 800a32a: 69a2 ldr r2, [r4, #24] 800a32c: 4293 cmp r3, r2 800a32e: db1c blt.n 800a36a <_putc_r+0x76> 800a330: b2eb uxtb r3, r5 800a332: 2b0a cmp r3, #10 800a334: d019 beq.n 800a36a <_putc_r+0x76> 800a336: 6823 ldr r3, [r4, #0] 800a338: 1c5a adds r2, r3, #1 800a33a: 6022 str r2, [r4, #0] 800a33c: 701d strb r5, [r3, #0] 800a33e: b2ed uxtb r5, r5 800a340: 6e63 ldr r3, [r4, #100] ; 0x64 800a342: 07da lsls r2, r3, #31 800a344: d405 bmi.n 800a352 <_putc_r+0x5e> 800a346: 89a3 ldrh r3, [r4, #12] 800a348: 059b lsls r3, r3, #22 800a34a: d402 bmi.n 800a352 <_putc_r+0x5e> 800a34c: 6da0 ldr r0, [r4, #88] ; 0x58 800a34e: f7ff f8ff bl 8009550 <__retarget_lock_release_recursive> 800a352: 4628 mov r0, r5 800a354: bd70 pop {r4, r5, r6, pc} 800a356: 4b09 ldr r3, [pc, #36] ; (800a37c <_putc_r+0x88>) 800a358: 429c cmp r4, r3 800a35a: d101 bne.n 800a360 <_putc_r+0x6c> 800a35c: 68b4 ldr r4, [r6, #8] 800a35e: e7d6 b.n 800a30e <_putc_r+0x1a> 800a360: 4b07 ldr r3, [pc, #28] ; (800a380 <_putc_r+0x8c>) 800a362: 429c cmp r4, r3 800a364: bf08 it eq 800a366: 68f4 ldreq r4, [r6, #12] 800a368: e7d1 b.n 800a30e <_putc_r+0x1a> 800a36a: 4629 mov r1, r5 800a36c: 4622 mov r2, r4 800a36e: 4630 mov r0, r6 800a370: f7fd fff2 bl 8008358 <__swbuf_r> 800a374: 4605 mov r5, r0 800a376: e7e3 b.n 800a340 <_putc_r+0x4c> 800a378: 0800b374 .word 0x0800b374 800a37c: 0800b394 .word 0x0800b394 800a380: 0800b354 .word 0x0800b354 0800a384 <__sread>: 800a384: b510 push {r4, lr} 800a386: 460c mov r4, r1 800a388: f9b1 100e ldrsh.w r1, [r1, #14] 800a38c: f000 f916 bl 800a5bc <_read_r> 800a390: 2800 cmp r0, #0 800a392: bfab itete ge 800a394: 6d63 ldrge r3, [r4, #84] ; 0x54 800a396: 89a3 ldrhlt r3, [r4, #12] 800a398: 181b addge r3, r3, r0 800a39a: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 800a39e: bfac ite ge 800a3a0: 6563 strge r3, [r4, #84] ; 0x54 800a3a2: 81a3 strhlt r3, [r4, #12] 800a3a4: bd10 pop {r4, pc} 0800a3a6 <__swrite>: 800a3a6: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800a3aa: 461f mov r7, r3 800a3ac: 898b ldrh r3, [r1, #12] 800a3ae: 4605 mov r5, r0 800a3b0: 05db lsls r3, r3, #23 800a3b2: 460c mov r4, r1 800a3b4: 4616 mov r6, r2 800a3b6: d505 bpl.n 800a3c4 <__swrite+0x1e> 800a3b8: 2302 movs r3, #2 800a3ba: 2200 movs r2, #0 800a3bc: f9b1 100e ldrsh.w r1, [r1, #14] 800a3c0: f000 f898 bl 800a4f4 <_lseek_r> 800a3c4: 89a3 ldrh r3, [r4, #12] 800a3c6: 4632 mov r2, r6 800a3c8: f423 5380 bic.w r3, r3, #4096 ; 0x1000 800a3cc: 81a3 strh r3, [r4, #12] 800a3ce: 4628 mov r0, r5 800a3d0: 463b mov r3, r7 800a3d2: f9b4 100e ldrsh.w r1, [r4, #14] 800a3d6: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800a3da: f000 b817 b.w 800a40c <_write_r> 0800a3de <__sseek>: 800a3de: b510 push {r4, lr} 800a3e0: 460c mov r4, r1 800a3e2: f9b1 100e ldrsh.w r1, [r1, #14] 800a3e6: f000 f885 bl 800a4f4 <_lseek_r> 800a3ea: 1c43 adds r3, r0, #1 800a3ec: 89a3 ldrh r3, [r4, #12] 800a3ee: bf15 itete ne 800a3f0: 6560 strne r0, [r4, #84] ; 0x54 800a3f2: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 800a3f6: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 800a3fa: 81a3 strheq r3, [r4, #12] 800a3fc: bf18 it ne 800a3fe: 81a3 strhne r3, [r4, #12] 800a400: bd10 pop {r4, pc} 0800a402 <__sclose>: 800a402: f9b1 100e ldrsh.w r1, [r1, #14] 800a406: f000 b831 b.w 800a46c <_close_r> ... 0800a40c <_write_r>: 800a40c: b538 push {r3, r4, r5, lr} 800a40e: 4604 mov r4, r0 800a410: 4608 mov r0, r1 800a412: 4611 mov r1, r2 800a414: 2200 movs r2, #0 800a416: 4d05 ldr r5, [pc, #20] ; (800a42c <_write_r+0x20>) 800a418: 602a str r2, [r5, #0] 800a41a: 461a mov r2, r3 800a41c: f7f6 fe9a bl 8001154 <_write> 800a420: 1c43 adds r3, r0, #1 800a422: d102 bne.n 800a42a <_write_r+0x1e> 800a424: 682b ldr r3, [r5, #0] 800a426: b103 cbz r3, 800a42a <_write_r+0x1e> 800a428: 6023 str r3, [r4, #0] 800a42a: bd38 pop {r3, r4, r5, pc} 800a42c: 20002544 .word 0x20002544 0800a430 <__assert_func>: 800a430: b51f push {r0, r1, r2, r3, r4, lr} 800a432: 4614 mov r4, r2 800a434: 461a mov r2, r3 800a436: 4b09 ldr r3, [pc, #36] ; (800a45c <__assert_func+0x2c>) 800a438: 4605 mov r5, r0 800a43a: 681b ldr r3, [r3, #0] 800a43c: 68d8 ldr r0, [r3, #12] 800a43e: b14c cbz r4, 800a454 <__assert_func+0x24> 800a440: 4b07 ldr r3, [pc, #28] ; (800a460 <__assert_func+0x30>) 800a442: e9cd 3401 strd r3, r4, [sp, #4] 800a446: 9100 str r1, [sp, #0] 800a448: 462b mov r3, r5 800a44a: 4906 ldr r1, [pc, #24] ; (800a464 <__assert_func+0x34>) 800a44c: f000 f81e bl 800a48c 800a450: f000 f8d3 bl 800a5fa 800a454: 4b04 ldr r3, [pc, #16] ; (800a468 <__assert_func+0x38>) 800a456: 461c mov r4, r3 800a458: e7f3 b.n 800a442 <__assert_func+0x12> 800a45a: bf00 nop 800a45c: 20000014 .word 0x20000014 800a460: 0800b525 .word 0x0800b525 800a464: 0800b532 .word 0x0800b532 800a468: 0800b560 .word 0x0800b560 0800a46c <_close_r>: 800a46c: b538 push {r3, r4, r5, lr} 800a46e: 2300 movs r3, #0 800a470: 4d05 ldr r5, [pc, #20] ; (800a488 <_close_r+0x1c>) 800a472: 4604 mov r4, r0 800a474: 4608 mov r0, r1 800a476: 602b str r3, [r5, #0] 800a478: f7f7 fa94 bl 80019a4 <_close> 800a47c: 1c43 adds r3, r0, #1 800a47e: d102 bne.n 800a486 <_close_r+0x1a> 800a480: 682b ldr r3, [r5, #0] 800a482: b103 cbz r3, 800a486 <_close_r+0x1a> 800a484: 6023 str r3, [r4, #0] 800a486: bd38 pop {r3, r4, r5, pc} 800a488: 20002544 .word 0x20002544 0800a48c : 800a48c: b40e push {r1, r2, r3} 800a48e: b503 push {r0, r1, lr} 800a490: 4601 mov r1, r0 800a492: ab03 add r3, sp, #12 800a494: 4805 ldr r0, [pc, #20] ; (800a4ac ) 800a496: f853 2b04 ldr.w r2, [r3], #4 800a49a: 6800 ldr r0, [r0, #0] 800a49c: 9301 str r3, [sp, #4] 800a49e: f7ff fdf9 bl 800a094 <_vfiprintf_r> 800a4a2: b002 add sp, #8 800a4a4: f85d eb04 ldr.w lr, [sp], #4 800a4a8: b003 add sp, #12 800a4aa: 4770 bx lr 800a4ac: 20000014 .word 0x20000014 0800a4b0 <_fstat_r>: 800a4b0: b538 push {r3, r4, r5, lr} 800a4b2: 2300 movs r3, #0 800a4b4: 4d06 ldr r5, [pc, #24] ; (800a4d0 <_fstat_r+0x20>) 800a4b6: 4604 mov r4, r0 800a4b8: 4608 mov r0, r1 800a4ba: 4611 mov r1, r2 800a4bc: 602b str r3, [r5, #0] 800a4be: f7f7 fa7c bl 80019ba <_fstat> 800a4c2: 1c43 adds r3, r0, #1 800a4c4: d102 bne.n 800a4cc <_fstat_r+0x1c> 800a4c6: 682b ldr r3, [r5, #0] 800a4c8: b103 cbz r3, 800a4cc <_fstat_r+0x1c> 800a4ca: 6023 str r3, [r4, #0] 800a4cc: bd38 pop {r3, r4, r5, pc} 800a4ce: bf00 nop 800a4d0: 20002544 .word 0x20002544 0800a4d4 <_isatty_r>: 800a4d4: b538 push {r3, r4, r5, lr} 800a4d6: 2300 movs r3, #0 800a4d8: 4d05 ldr r5, [pc, #20] ; (800a4f0 <_isatty_r+0x1c>) 800a4da: 4604 mov r4, r0 800a4dc: 4608 mov r0, r1 800a4de: 602b str r3, [r5, #0] 800a4e0: f7f7 fa7a bl 80019d8 <_isatty> 800a4e4: 1c43 adds r3, r0, #1 800a4e6: d102 bne.n 800a4ee <_isatty_r+0x1a> 800a4e8: 682b ldr r3, [r5, #0] 800a4ea: b103 cbz r3, 800a4ee <_isatty_r+0x1a> 800a4ec: 6023 str r3, [r4, #0] 800a4ee: bd38 pop {r3, r4, r5, pc} 800a4f0: 20002544 .word 0x20002544 0800a4f4 <_lseek_r>: 800a4f4: b538 push {r3, r4, r5, lr} 800a4f6: 4604 mov r4, r0 800a4f8: 4608 mov r0, r1 800a4fa: 4611 mov r1, r2 800a4fc: 2200 movs r2, #0 800a4fe: 4d05 ldr r5, [pc, #20] ; (800a514 <_lseek_r+0x20>) 800a500: 602a str r2, [r5, #0] 800a502: 461a mov r2, r3 800a504: f7f7 fa72 bl 80019ec <_lseek> 800a508: 1c43 adds r3, r0, #1 800a50a: d102 bne.n 800a512 <_lseek_r+0x1e> 800a50c: 682b ldr r3, [r5, #0] 800a50e: b103 cbz r3, 800a512 <_lseek_r+0x1e> 800a510: 6023 str r3, [r4, #0] 800a512: bd38 pop {r3, r4, r5, pc} 800a514: 20002544 .word 0x20002544 0800a518 <__ascii_mbtowc>: 800a518: b082 sub sp, #8 800a51a: b901 cbnz r1, 800a51e <__ascii_mbtowc+0x6> 800a51c: a901 add r1, sp, #4 800a51e: b142 cbz r2, 800a532 <__ascii_mbtowc+0x1a> 800a520: b14b cbz r3, 800a536 <__ascii_mbtowc+0x1e> 800a522: 7813 ldrb r3, [r2, #0] 800a524: 600b str r3, [r1, #0] 800a526: 7812 ldrb r2, [r2, #0] 800a528: 1e10 subs r0, r2, #0 800a52a: bf18 it ne 800a52c: 2001 movne r0, #1 800a52e: b002 add sp, #8 800a530: 4770 bx lr 800a532: 4610 mov r0, r2 800a534: e7fb b.n 800a52e <__ascii_mbtowc+0x16> 800a536: f06f 0001 mvn.w r0, #1 800a53a: e7f8 b.n 800a52e <__ascii_mbtowc+0x16> 0800a53c : 800a53c: 4288 cmp r0, r1 800a53e: b510 push {r4, lr} 800a540: eb01 0402 add.w r4, r1, r2 800a544: d902 bls.n 800a54c 800a546: 4284 cmp r4, r0 800a548: 4623 mov r3, r4 800a54a: d807 bhi.n 800a55c 800a54c: 1e43 subs r3, r0, #1 800a54e: 42a1 cmp r1, r4 800a550: d008 beq.n 800a564 800a552: f811 2b01 ldrb.w r2, [r1], #1 800a556: f803 2f01 strb.w r2, [r3, #1]! 800a55a: e7f8 b.n 800a54e 800a55c: 4601 mov r1, r0 800a55e: 4402 add r2, r0 800a560: 428a cmp r2, r1 800a562: d100 bne.n 800a566 800a564: bd10 pop {r4, pc} 800a566: f813 4d01 ldrb.w r4, [r3, #-1]! 800a56a: f802 4d01 strb.w r4, [r2, #-1]! 800a56e: e7f7 b.n 800a560 0800a570 <_realloc_r>: 800a570: b5f8 push {r3, r4, r5, r6, r7, lr} 800a572: 4607 mov r7, r0 800a574: 4614 mov r4, r2 800a576: 460e mov r6, r1 800a578: b921 cbnz r1, 800a584 <_realloc_r+0x14> 800a57a: 4611 mov r1, r2 800a57c: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} 800a580: f7fd b95e b.w 8007840 <_malloc_r> 800a584: b922 cbnz r2, 800a590 <_realloc_r+0x20> 800a586: f7fd f90f bl 80077a8 <_free_r> 800a58a: 4625 mov r5, r4 800a58c: 4628 mov r0, r5 800a58e: bdf8 pop {r3, r4, r5, r6, r7, pc} 800a590: f000 f83a bl 800a608 <_malloc_usable_size_r> 800a594: 42a0 cmp r0, r4 800a596: d20f bcs.n 800a5b8 <_realloc_r+0x48> 800a598: 4621 mov r1, r4 800a59a: 4638 mov r0, r7 800a59c: f7fd f950 bl 8007840 <_malloc_r> 800a5a0: 4605 mov r5, r0 800a5a2: 2800 cmp r0, #0 800a5a4: d0f2 beq.n 800a58c <_realloc_r+0x1c> 800a5a6: 4631 mov r1, r6 800a5a8: 4622 mov r2, r4 800a5aa: f7ff f845 bl 8009638 800a5ae: 4631 mov r1, r6 800a5b0: 4638 mov r0, r7 800a5b2: f7fd f8f9 bl 80077a8 <_free_r> 800a5b6: e7e9 b.n 800a58c <_realloc_r+0x1c> 800a5b8: 4635 mov r5, r6 800a5ba: e7e7 b.n 800a58c <_realloc_r+0x1c> 0800a5bc <_read_r>: 800a5bc: b538 push {r3, r4, r5, lr} 800a5be: 4604 mov r4, r0 800a5c0: 4608 mov r0, r1 800a5c2: 4611 mov r1, r2 800a5c4: 2200 movs r2, #0 800a5c6: 4d05 ldr r5, [pc, #20] ; (800a5dc <_read_r+0x20>) 800a5c8: 602a str r2, [r5, #0] 800a5ca: 461a mov r2, r3 800a5cc: f7f7 f9cd bl 800196a <_read> 800a5d0: 1c43 adds r3, r0, #1 800a5d2: d102 bne.n 800a5da <_read_r+0x1e> 800a5d4: 682b ldr r3, [r5, #0] 800a5d6: b103 cbz r3, 800a5da <_read_r+0x1e> 800a5d8: 6023 str r3, [r4, #0] 800a5da: bd38 pop {r3, r4, r5, pc} 800a5dc: 20002544 .word 0x20002544 0800a5e0 <__ascii_wctomb>: 800a5e0: 4603 mov r3, r0 800a5e2: 4608 mov r0, r1 800a5e4: b141 cbz r1, 800a5f8 <__ascii_wctomb+0x18> 800a5e6: 2aff cmp r2, #255 ; 0xff 800a5e8: d904 bls.n 800a5f4 <__ascii_wctomb+0x14> 800a5ea: 228a movs r2, #138 ; 0x8a 800a5ec: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 800a5f0: 601a str r2, [r3, #0] 800a5f2: 4770 bx lr 800a5f4: 2001 movs r0, #1 800a5f6: 700a strb r2, [r1, #0] 800a5f8: 4770 bx lr 0800a5fa : 800a5fa: 2006 movs r0, #6 800a5fc: b508 push {r3, lr} 800a5fe: f000 f833 bl 800a668 800a602: 2001 movs r0, #1 800a604: f7f7 f9a7 bl 8001956 <_exit> 0800a608 <_malloc_usable_size_r>: 800a608: f851 3c04 ldr.w r3, [r1, #-4] 800a60c: 1f18 subs r0, r3, #4 800a60e: 2b00 cmp r3, #0 800a610: bfbc itt lt 800a612: 580b ldrlt r3, [r1, r0] 800a614: 18c0 addlt r0, r0, r3 800a616: 4770 bx lr 0800a618 <_raise_r>: 800a618: 291f cmp r1, #31 800a61a: b538 push {r3, r4, r5, lr} 800a61c: 4604 mov r4, r0 800a61e: 460d mov r5, r1 800a620: d904 bls.n 800a62c <_raise_r+0x14> 800a622: 2316 movs r3, #22 800a624: 6003 str r3, [r0, #0] 800a626: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 800a62a: bd38 pop {r3, r4, r5, pc} 800a62c: 6c42 ldr r2, [r0, #68] ; 0x44 800a62e: b112 cbz r2, 800a636 <_raise_r+0x1e> 800a630: f852 3021 ldr.w r3, [r2, r1, lsl #2] 800a634: b94b cbnz r3, 800a64a <_raise_r+0x32> 800a636: 4620 mov r0, r4 800a638: f000 f830 bl 800a69c <_getpid_r> 800a63c: 462a mov r2, r5 800a63e: 4601 mov r1, r0 800a640: 4620 mov r0, r4 800a642: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800a646: f000 b817 b.w 800a678 <_kill_r> 800a64a: 2b01 cmp r3, #1 800a64c: d00a beq.n 800a664 <_raise_r+0x4c> 800a64e: 1c59 adds r1, r3, #1 800a650: d103 bne.n 800a65a <_raise_r+0x42> 800a652: 2316 movs r3, #22 800a654: 6003 str r3, [r0, #0] 800a656: 2001 movs r0, #1 800a658: e7e7 b.n 800a62a <_raise_r+0x12> 800a65a: 2400 movs r4, #0 800a65c: 4628 mov r0, r5 800a65e: f842 4025 str.w r4, [r2, r5, lsl #2] 800a662: 4798 blx r3 800a664: 2000 movs r0, #0 800a666: e7e0 b.n 800a62a <_raise_r+0x12> 0800a668 : 800a668: 4b02 ldr r3, [pc, #8] ; (800a674 ) 800a66a: 4601 mov r1, r0 800a66c: 6818 ldr r0, [r3, #0] 800a66e: f7ff bfd3 b.w 800a618 <_raise_r> 800a672: bf00 nop 800a674: 20000014 .word 0x20000014 0800a678 <_kill_r>: 800a678: b538 push {r3, r4, r5, lr} 800a67a: 2300 movs r3, #0 800a67c: 4d06 ldr r5, [pc, #24] ; (800a698 <_kill_r+0x20>) 800a67e: 4604 mov r4, r0 800a680: 4608 mov r0, r1 800a682: 4611 mov r1, r2 800a684: 602b str r3, [r5, #0] 800a686: f7f7 f956 bl 8001936 <_kill> 800a68a: 1c43 adds r3, r0, #1 800a68c: d102 bne.n 800a694 <_kill_r+0x1c> 800a68e: 682b ldr r3, [r5, #0] 800a690: b103 cbz r3, 800a694 <_kill_r+0x1c> 800a692: 6023 str r3, [r4, #0] 800a694: bd38 pop {r3, r4, r5, pc} 800a696: bf00 nop 800a698: 20002544 .word 0x20002544 0800a69c <_getpid_r>: 800a69c: f7f7 b944 b.w 8001928 <_getpid> 0800a6a0 <_init>: 800a6a0: b5f8 push {r3, r4, r5, r6, r7, lr} 800a6a2: bf00 nop 800a6a4: bcf8 pop {r3, r4, r5, r6, r7} 800a6a6: bc08 pop {r3} 800a6a8: 469e mov lr, r3 800a6aa: 4770 bx lr 0800a6ac <_fini>: 800a6ac: b5f8 push {r3, r4, r5, r6, r7, lr} 800a6ae: bf00 nop 800a6b0: bcf8 pop {r3, r4, r5, r6, r7} 800a6b2: bc08 pop {r3} 800a6b4: 469e mov lr, r3 800a6b6: 4770 bx lr