m3s.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00009db4 080001e8 080001e8 000101e8 2**3 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000ed4 08009fa0 08009fa0 00019fa0 2**3 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 0800ae74 0800ae74 000201d4 2**0 CONTENTS 4 .ARM 00000000 0800ae74 0800ae74 000201d4 2**0 CONTENTS 5 .preinit_array 00000000 0800ae74 0800ae74 000201d4 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 0800ae74 0800ae74 0001ae74 2**2 CONTENTS, ALLOC, LOAD, DATA 7 .fini_array 00000004 0800ae78 0800ae78 0001ae78 2**2 CONTENTS, ALLOC, LOAD, DATA 8 .data 000001d4 20000000 0800ae7c 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 0000248c 200001d4 0800b050 000201d4 2**2 ALLOC 10 ._user_heap_stack 00000c00 20002660 0800b050 00022660 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 000201d4 2**0 CONTENTS, READONLY 12 .comment 00000043 00000000 00000000 000201fd 2**0 CONTENTS, READONLY 13 .debug_info 00012aec 00000000 00000000 00020240 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_abbrev 0000375d 00000000 00000000 00032d2c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_aranges 00001390 00000000 00000000 00036490 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_rnglists 00000f2f 00000000 00000000 00037820 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_macro 0001dcbd 00000000 00000000 0003874f 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_line 0001a37a 00000000 00000000 0005640c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .debug_str 000a0af5 00000000 00000000 00070786 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 20 .debug_frame 000062d4 00000000 00000000 0011127c 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 00000047 00000000 00000000 00117550 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080001e8 <__do_global_dtors_aux>: 80001e8: b510 push {r4, lr} 80001ea: 4c05 ldr r4, [pc, #20] ; (8000200 <__do_global_dtors_aux+0x18>) 80001ec: 7823 ldrb r3, [r4, #0] 80001ee: b933 cbnz r3, 80001fe <__do_global_dtors_aux+0x16> 80001f0: 4b04 ldr r3, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x1c>) 80001f2: b113 cbz r3, 80001fa <__do_global_dtors_aux+0x12> 80001f4: 4804 ldr r0, [pc, #16] ; (8000208 <__do_global_dtors_aux+0x20>) 80001f6: f3af 8000 nop.w 80001fa: 2301 movs r3, #1 80001fc: 7023 strb r3, [r4, #0] 80001fe: bd10 pop {r4, pc} 8000200: 200001d4 .word 0x200001d4 8000204: 00000000 .word 0x00000000 8000208: 08009f84 .word 0x08009f84 0800020c : 800020c: b508 push {r3, lr} 800020e: 4b03 ldr r3, [pc, #12] ; (800021c ) 8000210: b11b cbz r3, 800021a 8000212: 4903 ldr r1, [pc, #12] ; (8000220 ) 8000214: 4803 ldr r0, [pc, #12] ; (8000224 ) 8000216: f3af 8000 nop.w 800021a: bd08 pop {r3, pc} 800021c: 00000000 .word 0x00000000 8000220: 200001d8 .word 0x200001d8 8000224: 08009f84 .word 0x08009f84 08000228 : 8000228: 4603 mov r3, r0 800022a: f813 2b01 ldrb.w r2, [r3], #1 800022e: 2a00 cmp r2, #0 8000230: d1fb bne.n 800022a 8000232: 1a18 subs r0, r3, r0 8000234: 3801 subs r0, #1 8000236: 4770 bx lr 08000238 <__aeabi_drsub>: 8000238: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000 800023c: e002 b.n 8000244 <__adddf3> 800023e: bf00 nop 08000240 <__aeabi_dsub>: 8000240: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000 08000244 <__adddf3>: 8000244: b530 push {r4, r5, lr} 8000246: ea4f 0441 mov.w r4, r1, lsl #1 800024a: ea4f 0543 mov.w r5, r3, lsl #1 800024e: ea94 0f05 teq r4, r5 8000252: bf08 it eq 8000254: ea90 0f02 teqeq r0, r2 8000258: bf1f itttt ne 800025a: ea54 0c00 orrsne.w ip, r4, r0 800025e: ea55 0c02 orrsne.w ip, r5, r2 8000262: ea7f 5c64 mvnsne.w ip, r4, asr #21 8000266: ea7f 5c65 mvnsne.w ip, r5, asr #21 800026a: f000 80e2 beq.w 8000432 <__adddf3+0x1ee> 800026e: ea4f 5454 mov.w r4, r4, lsr #21 8000272: ebd4 5555 rsbs r5, r4, r5, lsr #21 8000276: bfb8 it lt 8000278: 426d neglt r5, r5 800027a: dd0c ble.n 8000296 <__adddf3+0x52> 800027c: 442c add r4, r5 800027e: ea80 0202 eor.w r2, r0, r2 8000282: ea81 0303 eor.w r3, r1, r3 8000286: ea82 0000 eor.w r0, r2, r0 800028a: ea83 0101 eor.w r1, r3, r1 800028e: ea80 0202 eor.w r2, r0, r2 8000292: ea81 0303 eor.w r3, r1, r3 8000296: 2d36 cmp r5, #54 ; 0x36 8000298: bf88 it hi 800029a: bd30 pophi {r4, r5, pc} 800029c: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 80002a0: ea4f 3101 mov.w r1, r1, lsl #12 80002a4: f44f 1c80 mov.w ip, #1048576 ; 0x100000 80002a8: ea4c 3111 orr.w r1, ip, r1, lsr #12 80002ac: d002 beq.n 80002b4 <__adddf3+0x70> 80002ae: 4240 negs r0, r0 80002b0: eb61 0141 sbc.w r1, r1, r1, lsl #1 80002b4: f013 4f00 tst.w r3, #2147483648 ; 0x80000000 80002b8: ea4f 3303 mov.w r3, r3, lsl #12 80002bc: ea4c 3313 orr.w r3, ip, r3, lsr #12 80002c0: d002 beq.n 80002c8 <__adddf3+0x84> 80002c2: 4252 negs r2, r2 80002c4: eb63 0343 sbc.w r3, r3, r3, lsl #1 80002c8: ea94 0f05 teq r4, r5 80002cc: f000 80a7 beq.w 800041e <__adddf3+0x1da> 80002d0: f1a4 0401 sub.w r4, r4, #1 80002d4: f1d5 0e20 rsbs lr, r5, #32 80002d8: db0d blt.n 80002f6 <__adddf3+0xb2> 80002da: fa02 fc0e lsl.w ip, r2, lr 80002de: fa22 f205 lsr.w r2, r2, r5 80002e2: 1880 adds r0, r0, r2 80002e4: f141 0100 adc.w r1, r1, #0 80002e8: fa03 f20e lsl.w r2, r3, lr 80002ec: 1880 adds r0, r0, r2 80002ee: fa43 f305 asr.w r3, r3, r5 80002f2: 4159 adcs r1, r3 80002f4: e00e b.n 8000314 <__adddf3+0xd0> 80002f6: f1a5 0520 sub.w r5, r5, #32 80002fa: f10e 0e20 add.w lr, lr, #32 80002fe: 2a01 cmp r2, #1 8000300: fa03 fc0e lsl.w ip, r3, lr 8000304: bf28 it cs 8000306: f04c 0c02 orrcs.w ip, ip, #2 800030a: fa43 f305 asr.w r3, r3, r5 800030e: 18c0 adds r0, r0, r3 8000310: eb51 71e3 adcs.w r1, r1, r3, asr #31 8000314: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 8000318: d507 bpl.n 800032a <__adddf3+0xe6> 800031a: f04f 0e00 mov.w lr, #0 800031e: f1dc 0c00 rsbs ip, ip, #0 8000322: eb7e 0000 sbcs.w r0, lr, r0 8000326: eb6e 0101 sbc.w r1, lr, r1 800032a: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000 800032e: d31b bcc.n 8000368 <__adddf3+0x124> 8000330: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000 8000334: d30c bcc.n 8000350 <__adddf3+0x10c> 8000336: 0849 lsrs r1, r1, #1 8000338: ea5f 0030 movs.w r0, r0, rrx 800033c: ea4f 0c3c mov.w ip, ip, rrx 8000340: f104 0401 add.w r4, r4, #1 8000344: ea4f 5244 mov.w r2, r4, lsl #21 8000348: f512 0f80 cmn.w r2, #4194304 ; 0x400000 800034c: f080 809a bcs.w 8000484 <__adddf3+0x240> 8000350: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000 8000354: bf08 it eq 8000356: ea5f 0c50 movseq.w ip, r0, lsr #1 800035a: f150 0000 adcs.w r0, r0, #0 800035e: eb41 5104 adc.w r1, r1, r4, lsl #20 8000362: ea41 0105 orr.w r1, r1, r5 8000366: bd30 pop {r4, r5, pc} 8000368: ea5f 0c4c movs.w ip, ip, lsl #1 800036c: 4140 adcs r0, r0 800036e: eb41 0101 adc.w r1, r1, r1 8000372: 3c01 subs r4, #1 8000374: bf28 it cs 8000376: f5b1 1f80 cmpcs.w r1, #1048576 ; 0x100000 800037a: d2e9 bcs.n 8000350 <__adddf3+0x10c> 800037c: f091 0f00 teq r1, #0 8000380: bf04 itt eq 8000382: 4601 moveq r1, r0 8000384: 2000 moveq r0, #0 8000386: fab1 f381 clz r3, r1 800038a: bf08 it eq 800038c: 3320 addeq r3, #32 800038e: f1a3 030b sub.w r3, r3, #11 8000392: f1b3 0220 subs.w r2, r3, #32 8000396: da0c bge.n 80003b2 <__adddf3+0x16e> 8000398: 320c adds r2, #12 800039a: dd08 ble.n 80003ae <__adddf3+0x16a> 800039c: f102 0c14 add.w ip, r2, #20 80003a0: f1c2 020c rsb r2, r2, #12 80003a4: fa01 f00c lsl.w r0, r1, ip 80003a8: fa21 f102 lsr.w r1, r1, r2 80003ac: e00c b.n 80003c8 <__adddf3+0x184> 80003ae: f102 0214 add.w r2, r2, #20 80003b2: bfd8 it le 80003b4: f1c2 0c20 rsble ip, r2, #32 80003b8: fa01 f102 lsl.w r1, r1, r2 80003bc: fa20 fc0c lsr.w ip, r0, ip 80003c0: bfdc itt le 80003c2: ea41 010c orrle.w r1, r1, ip 80003c6: 4090 lslle r0, r2 80003c8: 1ae4 subs r4, r4, r3 80003ca: bfa2 ittt ge 80003cc: eb01 5104 addge.w r1, r1, r4, lsl #20 80003d0: 4329 orrge r1, r5 80003d2: bd30 popge {r4, r5, pc} 80003d4: ea6f 0404 mvn.w r4, r4 80003d8: 3c1f subs r4, #31 80003da: da1c bge.n 8000416 <__adddf3+0x1d2> 80003dc: 340c adds r4, #12 80003de: dc0e bgt.n 80003fe <__adddf3+0x1ba> 80003e0: f104 0414 add.w r4, r4, #20 80003e4: f1c4 0220 rsb r2, r4, #32 80003e8: fa20 f004 lsr.w r0, r0, r4 80003ec: fa01 f302 lsl.w r3, r1, r2 80003f0: ea40 0003 orr.w r0, r0, r3 80003f4: fa21 f304 lsr.w r3, r1, r4 80003f8: ea45 0103 orr.w r1, r5, r3 80003fc: bd30 pop {r4, r5, pc} 80003fe: f1c4 040c rsb r4, r4, #12 8000402: f1c4 0220 rsb r2, r4, #32 8000406: fa20 f002 lsr.w r0, r0, r2 800040a: fa01 f304 lsl.w r3, r1, r4 800040e: ea40 0003 orr.w r0, r0, r3 8000412: 4629 mov r1, r5 8000414: bd30 pop {r4, r5, pc} 8000416: fa21 f004 lsr.w r0, r1, r4 800041a: 4629 mov r1, r5 800041c: bd30 pop {r4, r5, pc} 800041e: f094 0f00 teq r4, #0 8000422: f483 1380 eor.w r3, r3, #1048576 ; 0x100000 8000426: bf06 itte eq 8000428: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000 800042c: 3401 addeq r4, #1 800042e: 3d01 subne r5, #1 8000430: e74e b.n 80002d0 <__adddf3+0x8c> 8000432: ea7f 5c64 mvns.w ip, r4, asr #21 8000436: bf18 it ne 8000438: ea7f 5c65 mvnsne.w ip, r5, asr #21 800043c: d029 beq.n 8000492 <__adddf3+0x24e> 800043e: ea94 0f05 teq r4, r5 8000442: bf08 it eq 8000444: ea90 0f02 teqeq r0, r2 8000448: d005 beq.n 8000456 <__adddf3+0x212> 800044a: ea54 0c00 orrs.w ip, r4, r0 800044e: bf04 itt eq 8000450: 4619 moveq r1, r3 8000452: 4610 moveq r0, r2 8000454: bd30 pop {r4, r5, pc} 8000456: ea91 0f03 teq r1, r3 800045a: bf1e ittt ne 800045c: 2100 movne r1, #0 800045e: 2000 movne r0, #0 8000460: bd30 popne {r4, r5, pc} 8000462: ea5f 5c54 movs.w ip, r4, lsr #21 8000466: d105 bne.n 8000474 <__adddf3+0x230> 8000468: 0040 lsls r0, r0, #1 800046a: 4149 adcs r1, r1 800046c: bf28 it cs 800046e: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000 8000472: bd30 pop {r4, r5, pc} 8000474: f514 0480 adds.w r4, r4, #4194304 ; 0x400000 8000478: bf3c itt cc 800047a: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000 800047e: bd30 popcc {r4, r5, pc} 8000480: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 8000484: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000 8000488: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 800048c: f04f 0000 mov.w r0, #0 8000490: bd30 pop {r4, r5, pc} 8000492: ea7f 5c64 mvns.w ip, r4, asr #21 8000496: bf1a itte ne 8000498: 4619 movne r1, r3 800049a: 4610 movne r0, r2 800049c: ea7f 5c65 mvnseq.w ip, r5, asr #21 80004a0: bf1c itt ne 80004a2: 460b movne r3, r1 80004a4: 4602 movne r2, r0 80004a6: ea50 3401 orrs.w r4, r0, r1, lsl #12 80004aa: bf06 itte eq 80004ac: ea52 3503 orrseq.w r5, r2, r3, lsl #12 80004b0: ea91 0f03 teqeq r1, r3 80004b4: f441 2100 orrne.w r1, r1, #524288 ; 0x80000 80004b8: bd30 pop {r4, r5, pc} 80004ba: bf00 nop 080004bc <__aeabi_ui2d>: 80004bc: f090 0f00 teq r0, #0 80004c0: bf04 itt eq 80004c2: 2100 moveq r1, #0 80004c4: 4770 bxeq lr 80004c6: b530 push {r4, r5, lr} 80004c8: f44f 6480 mov.w r4, #1024 ; 0x400 80004cc: f104 0432 add.w r4, r4, #50 ; 0x32 80004d0: f04f 0500 mov.w r5, #0 80004d4: f04f 0100 mov.w r1, #0 80004d8: e750 b.n 800037c <__adddf3+0x138> 80004da: bf00 nop 080004dc <__aeabi_i2d>: 80004dc: f090 0f00 teq r0, #0 80004e0: bf04 itt eq 80004e2: 2100 moveq r1, #0 80004e4: 4770 bxeq lr 80004e6: b530 push {r4, r5, lr} 80004e8: f44f 6480 mov.w r4, #1024 ; 0x400 80004ec: f104 0432 add.w r4, r4, #50 ; 0x32 80004f0: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000 80004f4: bf48 it mi 80004f6: 4240 negmi r0, r0 80004f8: f04f 0100 mov.w r1, #0 80004fc: e73e b.n 800037c <__adddf3+0x138> 80004fe: bf00 nop 08000500 <__aeabi_f2d>: 8000500: 0042 lsls r2, r0, #1 8000502: ea4f 01e2 mov.w r1, r2, asr #3 8000506: ea4f 0131 mov.w r1, r1, rrx 800050a: ea4f 7002 mov.w r0, r2, lsl #28 800050e: bf1f itttt ne 8000510: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000 8000514: f093 4f7f teqne r3, #4278190080 ; 0xff000000 8000518: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000 800051c: 4770 bxne lr 800051e: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000 8000522: bf08 it eq 8000524: 4770 bxeq lr 8000526: f093 4f7f teq r3, #4278190080 ; 0xff000000 800052a: bf04 itt eq 800052c: f441 2100 orreq.w r1, r1, #524288 ; 0x80000 8000530: 4770 bxeq lr 8000532: b530 push {r4, r5, lr} 8000534: f44f 7460 mov.w r4, #896 ; 0x380 8000538: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 800053c: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 8000540: e71c b.n 800037c <__adddf3+0x138> 8000542: bf00 nop 08000544 <__aeabi_ul2d>: 8000544: ea50 0201 orrs.w r2, r0, r1 8000548: bf08 it eq 800054a: 4770 bxeq lr 800054c: b530 push {r4, r5, lr} 800054e: f04f 0500 mov.w r5, #0 8000552: e00a b.n 800056a <__aeabi_l2d+0x16> 08000554 <__aeabi_l2d>: 8000554: ea50 0201 orrs.w r2, r0, r1 8000558: bf08 it eq 800055a: 4770 bxeq lr 800055c: b530 push {r4, r5, lr} 800055e: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000 8000562: d502 bpl.n 800056a <__aeabi_l2d+0x16> 8000564: 4240 negs r0, r0 8000566: eb61 0141 sbc.w r1, r1, r1, lsl #1 800056a: f44f 6480 mov.w r4, #1024 ; 0x400 800056e: f104 0432 add.w r4, r4, #50 ; 0x32 8000572: ea5f 5c91 movs.w ip, r1, lsr #22 8000576: f43f aed8 beq.w 800032a <__adddf3+0xe6> 800057a: f04f 0203 mov.w r2, #3 800057e: ea5f 0cdc movs.w ip, ip, lsr #3 8000582: bf18 it ne 8000584: 3203 addne r2, #3 8000586: ea5f 0cdc movs.w ip, ip, lsr #3 800058a: bf18 it ne 800058c: 3203 addne r2, #3 800058e: eb02 02dc add.w r2, r2, ip, lsr #3 8000592: f1c2 0320 rsb r3, r2, #32 8000596: fa00 fc03 lsl.w ip, r0, r3 800059a: fa20 f002 lsr.w r0, r0, r2 800059e: fa01 fe03 lsl.w lr, r1, r3 80005a2: ea40 000e orr.w r0, r0, lr 80005a6: fa21 f102 lsr.w r1, r1, r2 80005aa: 4414 add r4, r2 80005ac: e6bd b.n 800032a <__adddf3+0xe6> 80005ae: bf00 nop 080005b0 <__aeabi_dmul>: 80005b0: b570 push {r4, r5, r6, lr} 80005b2: f04f 0cff mov.w ip, #255 ; 0xff 80005b6: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 80005ba: ea1c 5411 ands.w r4, ip, r1, lsr #20 80005be: bf1d ittte ne 80005c0: ea1c 5513 andsne.w r5, ip, r3, lsr #20 80005c4: ea94 0f0c teqne r4, ip 80005c8: ea95 0f0c teqne r5, ip 80005cc: f000 f8de bleq 800078c <__aeabi_dmul+0x1dc> 80005d0: 442c add r4, r5 80005d2: ea81 0603 eor.w r6, r1, r3 80005d6: ea21 514c bic.w r1, r1, ip, lsl #21 80005da: ea23 534c bic.w r3, r3, ip, lsl #21 80005de: ea50 3501 orrs.w r5, r0, r1, lsl #12 80005e2: bf18 it ne 80005e4: ea52 3503 orrsne.w r5, r2, r3, lsl #12 80005e8: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 80005ec: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 80005f0: d038 beq.n 8000664 <__aeabi_dmul+0xb4> 80005f2: fba0 ce02 umull ip, lr, r0, r2 80005f6: f04f 0500 mov.w r5, #0 80005fa: fbe1 e502 umlal lr, r5, r1, r2 80005fe: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000 8000602: fbe0 e503 umlal lr, r5, r0, r3 8000606: f04f 0600 mov.w r6, #0 800060a: fbe1 5603 umlal r5, r6, r1, r3 800060e: f09c 0f00 teq ip, #0 8000612: bf18 it ne 8000614: f04e 0e01 orrne.w lr, lr, #1 8000618: f1a4 04ff sub.w r4, r4, #255 ; 0xff 800061c: f5b6 7f00 cmp.w r6, #512 ; 0x200 8000620: f564 7440 sbc.w r4, r4, #768 ; 0x300 8000624: d204 bcs.n 8000630 <__aeabi_dmul+0x80> 8000626: ea5f 0e4e movs.w lr, lr, lsl #1 800062a: 416d adcs r5, r5 800062c: eb46 0606 adc.w r6, r6, r6 8000630: ea42 21c6 orr.w r1, r2, r6, lsl #11 8000634: ea41 5155 orr.w r1, r1, r5, lsr #21 8000638: ea4f 20c5 mov.w r0, r5, lsl #11 800063c: ea40 505e orr.w r0, r0, lr, lsr #21 8000640: ea4f 2ece mov.w lr, lr, lsl #11 8000644: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd 8000648: bf88 it hi 800064a: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 800064e: d81e bhi.n 800068e <__aeabi_dmul+0xde> 8000650: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000 8000654: bf08 it eq 8000656: ea5f 0e50 movseq.w lr, r0, lsr #1 800065a: f150 0000 adcs.w r0, r0, #0 800065e: eb41 5104 adc.w r1, r1, r4, lsl #20 8000662: bd70 pop {r4, r5, r6, pc} 8000664: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000 8000668: ea46 0101 orr.w r1, r6, r1 800066c: ea40 0002 orr.w r0, r0, r2 8000670: ea81 0103 eor.w r1, r1, r3 8000674: ebb4 045c subs.w r4, r4, ip, lsr #1 8000678: bfc2 ittt gt 800067a: ebd4 050c rsbsgt r5, r4, ip 800067e: ea41 5104 orrgt.w r1, r1, r4, lsl #20 8000682: bd70 popgt {r4, r5, r6, pc} 8000684: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 8000688: f04f 0e00 mov.w lr, #0 800068c: 3c01 subs r4, #1 800068e: f300 80ab bgt.w 80007e8 <__aeabi_dmul+0x238> 8000692: f114 0f36 cmn.w r4, #54 ; 0x36 8000696: bfde ittt le 8000698: 2000 movle r0, #0 800069a: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000 800069e: bd70 pople {r4, r5, r6, pc} 80006a0: f1c4 0400 rsb r4, r4, #0 80006a4: 3c20 subs r4, #32 80006a6: da35 bge.n 8000714 <__aeabi_dmul+0x164> 80006a8: 340c adds r4, #12 80006aa: dc1b bgt.n 80006e4 <__aeabi_dmul+0x134> 80006ac: f104 0414 add.w r4, r4, #20 80006b0: f1c4 0520 rsb r5, r4, #32 80006b4: fa00 f305 lsl.w r3, r0, r5 80006b8: fa20 f004 lsr.w r0, r0, r4 80006bc: fa01 f205 lsl.w r2, r1, r5 80006c0: ea40 0002 orr.w r0, r0, r2 80006c4: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000 80006c8: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 80006cc: eb10 70d3 adds.w r0, r0, r3, lsr #31 80006d0: fa21 f604 lsr.w r6, r1, r4 80006d4: eb42 0106 adc.w r1, r2, r6 80006d8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80006dc: bf08 it eq 80006de: ea20 70d3 biceq.w r0, r0, r3, lsr #31 80006e2: bd70 pop {r4, r5, r6, pc} 80006e4: f1c4 040c rsb r4, r4, #12 80006e8: f1c4 0520 rsb r5, r4, #32 80006ec: fa00 f304 lsl.w r3, r0, r4 80006f0: fa20 f005 lsr.w r0, r0, r5 80006f4: fa01 f204 lsl.w r2, r1, r4 80006f8: ea40 0002 orr.w r0, r0, r2 80006fc: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 8000700: eb10 70d3 adds.w r0, r0, r3, lsr #31 8000704: f141 0100 adc.w r1, r1, #0 8000708: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 800070c: bf08 it eq 800070e: ea20 70d3 biceq.w r0, r0, r3, lsr #31 8000712: bd70 pop {r4, r5, r6, pc} 8000714: f1c4 0520 rsb r5, r4, #32 8000718: fa00 f205 lsl.w r2, r0, r5 800071c: ea4e 0e02 orr.w lr, lr, r2 8000720: fa20 f304 lsr.w r3, r0, r4 8000724: fa01 f205 lsl.w r2, r1, r5 8000728: ea43 0302 orr.w r3, r3, r2 800072c: fa21 f004 lsr.w r0, r1, r4 8000730: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 8000734: fa21 f204 lsr.w r2, r1, r4 8000738: ea20 0002 bic.w r0, r0, r2 800073c: eb00 70d3 add.w r0, r0, r3, lsr #31 8000740: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8000744: bf08 it eq 8000746: ea20 70d3 biceq.w r0, r0, r3, lsr #31 800074a: bd70 pop {r4, r5, r6, pc} 800074c: f094 0f00 teq r4, #0 8000750: d10f bne.n 8000772 <__aeabi_dmul+0x1c2> 8000752: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000 8000756: 0040 lsls r0, r0, #1 8000758: eb41 0101 adc.w r1, r1, r1 800075c: f411 1f80 tst.w r1, #1048576 ; 0x100000 8000760: bf08 it eq 8000762: 3c01 subeq r4, #1 8000764: d0f7 beq.n 8000756 <__aeabi_dmul+0x1a6> 8000766: ea41 0106 orr.w r1, r1, r6 800076a: f095 0f00 teq r5, #0 800076e: bf18 it ne 8000770: 4770 bxne lr 8000772: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000 8000776: 0052 lsls r2, r2, #1 8000778: eb43 0303 adc.w r3, r3, r3 800077c: f413 1f80 tst.w r3, #1048576 ; 0x100000 8000780: bf08 it eq 8000782: 3d01 subeq r5, #1 8000784: d0f7 beq.n 8000776 <__aeabi_dmul+0x1c6> 8000786: ea43 0306 orr.w r3, r3, r6 800078a: 4770 bx lr 800078c: ea94 0f0c teq r4, ip 8000790: ea0c 5513 and.w r5, ip, r3, lsr #20 8000794: bf18 it ne 8000796: ea95 0f0c teqne r5, ip 800079a: d00c beq.n 80007b6 <__aeabi_dmul+0x206> 800079c: ea50 0641 orrs.w r6, r0, r1, lsl #1 80007a0: bf18 it ne 80007a2: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80007a6: d1d1 bne.n 800074c <__aeabi_dmul+0x19c> 80007a8: ea81 0103 eor.w r1, r1, r3 80007ac: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 80007b0: f04f 0000 mov.w r0, #0 80007b4: bd70 pop {r4, r5, r6, pc} 80007b6: ea50 0641 orrs.w r6, r0, r1, lsl #1 80007ba: bf06 itte eq 80007bc: 4610 moveq r0, r2 80007be: 4619 moveq r1, r3 80007c0: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80007c4: d019 beq.n 80007fa <__aeabi_dmul+0x24a> 80007c6: ea94 0f0c teq r4, ip 80007ca: d102 bne.n 80007d2 <__aeabi_dmul+0x222> 80007cc: ea50 3601 orrs.w r6, r0, r1, lsl #12 80007d0: d113 bne.n 80007fa <__aeabi_dmul+0x24a> 80007d2: ea95 0f0c teq r5, ip 80007d6: d105 bne.n 80007e4 <__aeabi_dmul+0x234> 80007d8: ea52 3603 orrs.w r6, r2, r3, lsl #12 80007dc: bf1c itt ne 80007de: 4610 movne r0, r2 80007e0: 4619 movne r1, r3 80007e2: d10a bne.n 80007fa <__aeabi_dmul+0x24a> 80007e4: ea81 0103 eor.w r1, r1, r3 80007e8: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 80007ec: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 80007f0: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 80007f4: f04f 0000 mov.w r0, #0 80007f8: bd70 pop {r4, r5, r6, pc} 80007fa: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 80007fe: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000 8000802: bd70 pop {r4, r5, r6, pc} 08000804 <__aeabi_ddiv>: 8000804: b570 push {r4, r5, r6, lr} 8000806: f04f 0cff mov.w ip, #255 ; 0xff 800080a: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 800080e: ea1c 5411 ands.w r4, ip, r1, lsr #20 8000812: bf1d ittte ne 8000814: ea1c 5513 andsne.w r5, ip, r3, lsr #20 8000818: ea94 0f0c teqne r4, ip 800081c: ea95 0f0c teqne r5, ip 8000820: f000 f8a7 bleq 8000972 <__aeabi_ddiv+0x16e> 8000824: eba4 0405 sub.w r4, r4, r5 8000828: ea81 0e03 eor.w lr, r1, r3 800082c: ea52 3503 orrs.w r5, r2, r3, lsl #12 8000830: ea4f 3101 mov.w r1, r1, lsl #12 8000834: f000 8088 beq.w 8000948 <__aeabi_ddiv+0x144> 8000838: ea4f 3303 mov.w r3, r3, lsl #12 800083c: f04f 5580 mov.w r5, #268435456 ; 0x10000000 8000840: ea45 1313 orr.w r3, r5, r3, lsr #4 8000844: ea43 6312 orr.w r3, r3, r2, lsr #24 8000848: ea4f 2202 mov.w r2, r2, lsl #8 800084c: ea45 1511 orr.w r5, r5, r1, lsr #4 8000850: ea45 6510 orr.w r5, r5, r0, lsr #24 8000854: ea4f 2600 mov.w r6, r0, lsl #8 8000858: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000 800085c: 429d cmp r5, r3 800085e: bf08 it eq 8000860: 4296 cmpeq r6, r2 8000862: f144 04fd adc.w r4, r4, #253 ; 0xfd 8000866: f504 7440 add.w r4, r4, #768 ; 0x300 800086a: d202 bcs.n 8000872 <__aeabi_ddiv+0x6e> 800086c: 085b lsrs r3, r3, #1 800086e: ea4f 0232 mov.w r2, r2, rrx 8000872: 1ab6 subs r6, r6, r2 8000874: eb65 0503 sbc.w r5, r5, r3 8000878: 085b lsrs r3, r3, #1 800087a: ea4f 0232 mov.w r2, r2, rrx 800087e: f44f 1080 mov.w r0, #1048576 ; 0x100000 8000882: f44f 2c00 mov.w ip, #524288 ; 0x80000 8000886: ebb6 0e02 subs.w lr, r6, r2 800088a: eb75 0e03 sbcs.w lr, r5, r3 800088e: bf22 ittt cs 8000890: 1ab6 subcs r6, r6, r2 8000892: 4675 movcs r5, lr 8000894: ea40 000c orrcs.w r0, r0, ip 8000898: 085b lsrs r3, r3, #1 800089a: ea4f 0232 mov.w r2, r2, rrx 800089e: ebb6 0e02 subs.w lr, r6, r2 80008a2: eb75 0e03 sbcs.w lr, r5, r3 80008a6: bf22 ittt cs 80008a8: 1ab6 subcs r6, r6, r2 80008aa: 4675 movcs r5, lr 80008ac: ea40 005c orrcs.w r0, r0, ip, lsr #1 80008b0: 085b lsrs r3, r3, #1 80008b2: ea4f 0232 mov.w r2, r2, rrx 80008b6: ebb6 0e02 subs.w lr, r6, r2 80008ba: eb75 0e03 sbcs.w lr, r5, r3 80008be: bf22 ittt cs 80008c0: 1ab6 subcs r6, r6, r2 80008c2: 4675 movcs r5, lr 80008c4: ea40 009c orrcs.w r0, r0, ip, lsr #2 80008c8: 085b lsrs r3, r3, #1 80008ca: ea4f 0232 mov.w r2, r2, rrx 80008ce: ebb6 0e02 subs.w lr, r6, r2 80008d2: eb75 0e03 sbcs.w lr, r5, r3 80008d6: bf22 ittt cs 80008d8: 1ab6 subcs r6, r6, r2 80008da: 4675 movcs r5, lr 80008dc: ea40 00dc orrcs.w r0, r0, ip, lsr #3 80008e0: ea55 0e06 orrs.w lr, r5, r6 80008e4: d018 beq.n 8000918 <__aeabi_ddiv+0x114> 80008e6: ea4f 1505 mov.w r5, r5, lsl #4 80008ea: ea45 7516 orr.w r5, r5, r6, lsr #28 80008ee: ea4f 1606 mov.w r6, r6, lsl #4 80008f2: ea4f 03c3 mov.w r3, r3, lsl #3 80008f6: ea43 7352 orr.w r3, r3, r2, lsr #29 80008fa: ea4f 02c2 mov.w r2, r2, lsl #3 80008fe: ea5f 1c1c movs.w ip, ip, lsr #4 8000902: d1c0 bne.n 8000886 <__aeabi_ddiv+0x82> 8000904: f411 1f80 tst.w r1, #1048576 ; 0x100000 8000908: d10b bne.n 8000922 <__aeabi_ddiv+0x11e> 800090a: ea41 0100 orr.w r1, r1, r0 800090e: f04f 0000 mov.w r0, #0 8000912: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000 8000916: e7b6 b.n 8000886 <__aeabi_ddiv+0x82> 8000918: f411 1f80 tst.w r1, #1048576 ; 0x100000 800091c: bf04 itt eq 800091e: 4301 orreq r1, r0 8000920: 2000 moveq r0, #0 8000922: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd 8000926: bf88 it hi 8000928: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 800092c: f63f aeaf bhi.w 800068e <__aeabi_dmul+0xde> 8000930: ebb5 0c03 subs.w ip, r5, r3 8000934: bf04 itt eq 8000936: ebb6 0c02 subseq.w ip, r6, r2 800093a: ea5f 0c50 movseq.w ip, r0, lsr #1 800093e: f150 0000 adcs.w r0, r0, #0 8000942: eb41 5104 adc.w r1, r1, r4, lsl #20 8000946: bd70 pop {r4, r5, r6, pc} 8000948: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000 800094c: ea4e 3111 orr.w r1, lr, r1, lsr #12 8000950: eb14 045c adds.w r4, r4, ip, lsr #1 8000954: bfc2 ittt gt 8000956: ebd4 050c rsbsgt r5, r4, ip 800095a: ea41 5104 orrgt.w r1, r1, r4, lsl #20 800095e: bd70 popgt {r4, r5, r6, pc} 8000960: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 8000964: f04f 0e00 mov.w lr, #0 8000968: 3c01 subs r4, #1 800096a: e690 b.n 800068e <__aeabi_dmul+0xde> 800096c: ea45 0e06 orr.w lr, r5, r6 8000970: e68d b.n 800068e <__aeabi_dmul+0xde> 8000972: ea0c 5513 and.w r5, ip, r3, lsr #20 8000976: ea94 0f0c teq r4, ip 800097a: bf08 it eq 800097c: ea95 0f0c teqeq r5, ip 8000980: f43f af3b beq.w 80007fa <__aeabi_dmul+0x24a> 8000984: ea94 0f0c teq r4, ip 8000988: d10a bne.n 80009a0 <__aeabi_ddiv+0x19c> 800098a: ea50 3401 orrs.w r4, r0, r1, lsl #12 800098e: f47f af34 bne.w 80007fa <__aeabi_dmul+0x24a> 8000992: ea95 0f0c teq r5, ip 8000996: f47f af25 bne.w 80007e4 <__aeabi_dmul+0x234> 800099a: 4610 mov r0, r2 800099c: 4619 mov r1, r3 800099e: e72c b.n 80007fa <__aeabi_dmul+0x24a> 80009a0: ea95 0f0c teq r5, ip 80009a4: d106 bne.n 80009b4 <__aeabi_ddiv+0x1b0> 80009a6: ea52 3503 orrs.w r5, r2, r3, lsl #12 80009aa: f43f aefd beq.w 80007a8 <__aeabi_dmul+0x1f8> 80009ae: 4610 mov r0, r2 80009b0: 4619 mov r1, r3 80009b2: e722 b.n 80007fa <__aeabi_dmul+0x24a> 80009b4: ea50 0641 orrs.w r6, r0, r1, lsl #1 80009b8: bf18 it ne 80009ba: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80009be: f47f aec5 bne.w 800074c <__aeabi_dmul+0x19c> 80009c2: ea50 0441 orrs.w r4, r0, r1, lsl #1 80009c6: f47f af0d bne.w 80007e4 <__aeabi_dmul+0x234> 80009ca: ea52 0543 orrs.w r5, r2, r3, lsl #1 80009ce: f47f aeeb bne.w 80007a8 <__aeabi_dmul+0x1f8> 80009d2: e712 b.n 80007fa <__aeabi_dmul+0x24a> 080009d4 <__gedf2>: 80009d4: f04f 3cff mov.w ip, #4294967295 80009d8: e006 b.n 80009e8 <__cmpdf2+0x4> 80009da: bf00 nop 080009dc <__ledf2>: 80009dc: f04f 0c01 mov.w ip, #1 80009e0: e002 b.n 80009e8 <__cmpdf2+0x4> 80009e2: bf00 nop 080009e4 <__cmpdf2>: 80009e4: f04f 0c01 mov.w ip, #1 80009e8: f84d cd04 str.w ip, [sp, #-4]! 80009ec: ea4f 0c41 mov.w ip, r1, lsl #1 80009f0: ea7f 5c6c mvns.w ip, ip, asr #21 80009f4: ea4f 0c43 mov.w ip, r3, lsl #1 80009f8: bf18 it ne 80009fa: ea7f 5c6c mvnsne.w ip, ip, asr #21 80009fe: d01b beq.n 8000a38 <__cmpdf2+0x54> 8000a00: b001 add sp, #4 8000a02: ea50 0c41 orrs.w ip, r0, r1, lsl #1 8000a06: bf0c ite eq 8000a08: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 8000a0c: ea91 0f03 teqne r1, r3 8000a10: bf02 ittt eq 8000a12: ea90 0f02 teqeq r0, r2 8000a16: 2000 moveq r0, #0 8000a18: 4770 bxeq lr 8000a1a: f110 0f00 cmn.w r0, #0 8000a1e: ea91 0f03 teq r1, r3 8000a22: bf58 it pl 8000a24: 4299 cmppl r1, r3 8000a26: bf08 it eq 8000a28: 4290 cmpeq r0, r2 8000a2a: bf2c ite cs 8000a2c: 17d8 asrcs r0, r3, #31 8000a2e: ea6f 70e3 mvncc.w r0, r3, asr #31 8000a32: f040 0001 orr.w r0, r0, #1 8000a36: 4770 bx lr 8000a38: ea4f 0c41 mov.w ip, r1, lsl #1 8000a3c: ea7f 5c6c mvns.w ip, ip, asr #21 8000a40: d102 bne.n 8000a48 <__cmpdf2+0x64> 8000a42: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8000a46: d107 bne.n 8000a58 <__cmpdf2+0x74> 8000a48: ea4f 0c43 mov.w ip, r3, lsl #1 8000a4c: ea7f 5c6c mvns.w ip, ip, asr #21 8000a50: d1d6 bne.n 8000a00 <__cmpdf2+0x1c> 8000a52: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8000a56: d0d3 beq.n 8000a00 <__cmpdf2+0x1c> 8000a58: f85d 0b04 ldr.w r0, [sp], #4 8000a5c: 4770 bx lr 8000a5e: bf00 nop 08000a60 <__aeabi_cdrcmple>: 8000a60: 4684 mov ip, r0 8000a62: 4610 mov r0, r2 8000a64: 4662 mov r2, ip 8000a66: 468c mov ip, r1 8000a68: 4619 mov r1, r3 8000a6a: 4663 mov r3, ip 8000a6c: e000 b.n 8000a70 <__aeabi_cdcmpeq> 8000a6e: bf00 nop 08000a70 <__aeabi_cdcmpeq>: 8000a70: b501 push {r0, lr} 8000a72: f7ff ffb7 bl 80009e4 <__cmpdf2> 8000a76: 2800 cmp r0, #0 8000a78: bf48 it mi 8000a7a: f110 0f00 cmnmi.w r0, #0 8000a7e: bd01 pop {r0, pc} 08000a80 <__aeabi_dcmpeq>: 8000a80: f84d ed08 str.w lr, [sp, #-8]! 8000a84: f7ff fff4 bl 8000a70 <__aeabi_cdcmpeq> 8000a88: bf0c ite eq 8000a8a: 2001 moveq r0, #1 8000a8c: 2000 movne r0, #0 8000a8e: f85d fb08 ldr.w pc, [sp], #8 8000a92: bf00 nop 08000a94 <__aeabi_dcmplt>: 8000a94: f84d ed08 str.w lr, [sp, #-8]! 8000a98: f7ff ffea bl 8000a70 <__aeabi_cdcmpeq> 8000a9c: bf34 ite cc 8000a9e: 2001 movcc r0, #1 8000aa0: 2000 movcs r0, #0 8000aa2: f85d fb08 ldr.w pc, [sp], #8 8000aa6: bf00 nop 08000aa8 <__aeabi_dcmple>: 8000aa8: f84d ed08 str.w lr, [sp, #-8]! 8000aac: f7ff ffe0 bl 8000a70 <__aeabi_cdcmpeq> 8000ab0: bf94 ite ls 8000ab2: 2001 movls r0, #1 8000ab4: 2000 movhi r0, #0 8000ab6: f85d fb08 ldr.w pc, [sp], #8 8000aba: bf00 nop 08000abc <__aeabi_dcmpge>: 8000abc: f84d ed08 str.w lr, [sp, #-8]! 8000ac0: f7ff ffce bl 8000a60 <__aeabi_cdrcmple> 8000ac4: bf94 ite ls 8000ac6: 2001 movls r0, #1 8000ac8: 2000 movhi r0, #0 8000aca: f85d fb08 ldr.w pc, [sp], #8 8000ace: bf00 nop 08000ad0 <__aeabi_dcmpgt>: 8000ad0: f84d ed08 str.w lr, [sp, #-8]! 8000ad4: f7ff ffc4 bl 8000a60 <__aeabi_cdrcmple> 8000ad8: bf34 ite cc 8000ada: 2001 movcc r0, #1 8000adc: 2000 movcs r0, #0 8000ade: f85d fb08 ldr.w pc, [sp], #8 8000ae2: bf00 nop 08000ae4 <__aeabi_dcmpun>: 8000ae4: ea4f 0c41 mov.w ip, r1, lsl #1 8000ae8: ea7f 5c6c mvns.w ip, ip, asr #21 8000aec: d102 bne.n 8000af4 <__aeabi_dcmpun+0x10> 8000aee: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8000af2: d10a bne.n 8000b0a <__aeabi_dcmpun+0x26> 8000af4: ea4f 0c43 mov.w ip, r3, lsl #1 8000af8: ea7f 5c6c mvns.w ip, ip, asr #21 8000afc: d102 bne.n 8000b04 <__aeabi_dcmpun+0x20> 8000afe: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8000b02: d102 bne.n 8000b0a <__aeabi_dcmpun+0x26> 8000b04: f04f 0000 mov.w r0, #0 8000b08: 4770 bx lr 8000b0a: f04f 0001 mov.w r0, #1 8000b0e: 4770 bx lr 08000b10 <__aeabi_d2iz>: 8000b10: ea4f 0241 mov.w r2, r1, lsl #1 8000b14: f512 1200 adds.w r2, r2, #2097152 ; 0x200000 8000b18: d215 bcs.n 8000b46 <__aeabi_d2iz+0x36> 8000b1a: d511 bpl.n 8000b40 <__aeabi_d2iz+0x30> 8000b1c: f46f 7378 mvn.w r3, #992 ; 0x3e0 8000b20: ebb3 5262 subs.w r2, r3, r2, asr #21 8000b24: d912 bls.n 8000b4c <__aeabi_d2iz+0x3c> 8000b26: ea4f 23c1 mov.w r3, r1, lsl #11 8000b2a: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 8000b2e: ea43 5350 orr.w r3, r3, r0, lsr #21 8000b32: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 8000b36: fa23 f002 lsr.w r0, r3, r2 8000b3a: bf18 it ne 8000b3c: 4240 negne r0, r0 8000b3e: 4770 bx lr 8000b40: f04f 0000 mov.w r0, #0 8000b44: 4770 bx lr 8000b46: ea50 3001 orrs.w r0, r0, r1, lsl #12 8000b4a: d105 bne.n 8000b58 <__aeabi_d2iz+0x48> 8000b4c: f011 4000 ands.w r0, r1, #2147483648 ; 0x80000000 8000b50: bf08 it eq 8000b52: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000 8000b56: 4770 bx lr 8000b58: f04f 0000 mov.w r0, #0 8000b5c: 4770 bx lr 8000b5e: bf00 nop 08000b60 <__aeabi_d2f>: 8000b60: ea4f 0241 mov.w r2, r1, lsl #1 8000b64: f1b2 43e0 subs.w r3, r2, #1879048192 ; 0x70000000 8000b68: bf24 itt cs 8000b6a: f5b3 1c00 subscs.w ip, r3, #2097152 ; 0x200000 8000b6e: f1dc 5cfe rsbscs ip, ip, #532676608 ; 0x1fc00000 8000b72: d90d bls.n 8000b90 <__aeabi_d2f+0x30> 8000b74: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 8000b78: ea4f 02c0 mov.w r2, r0, lsl #3 8000b7c: ea4c 7050 orr.w r0, ip, r0, lsr #29 8000b80: f1b2 4f00 cmp.w r2, #2147483648 ; 0x80000000 8000b84: eb40 0083 adc.w r0, r0, r3, lsl #2 8000b88: bf08 it eq 8000b8a: f020 0001 biceq.w r0, r0, #1 8000b8e: 4770 bx lr 8000b90: f011 4f80 tst.w r1, #1073741824 ; 0x40000000 8000b94: d121 bne.n 8000bda <__aeabi_d2f+0x7a> 8000b96: f113 7238 adds.w r2, r3, #48234496 ; 0x2e00000 8000b9a: bfbc itt lt 8000b9c: f001 4000 andlt.w r0, r1, #2147483648 ; 0x80000000 8000ba0: 4770 bxlt lr 8000ba2: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 8000ba6: ea4f 5252 mov.w r2, r2, lsr #21 8000baa: f1c2 0218 rsb r2, r2, #24 8000bae: f1c2 0c20 rsb ip, r2, #32 8000bb2: fa10 f30c lsls.w r3, r0, ip 8000bb6: fa20 f002 lsr.w r0, r0, r2 8000bba: bf18 it ne 8000bbc: f040 0001 orrne.w r0, r0, #1 8000bc0: ea4f 23c1 mov.w r3, r1, lsl #11 8000bc4: ea4f 23d3 mov.w r3, r3, lsr #11 8000bc8: fa03 fc0c lsl.w ip, r3, ip 8000bcc: ea40 000c orr.w r0, r0, ip 8000bd0: fa23 f302 lsr.w r3, r3, r2 8000bd4: ea4f 0343 mov.w r3, r3, lsl #1 8000bd8: e7cc b.n 8000b74 <__aeabi_d2f+0x14> 8000bda: ea7f 5362 mvns.w r3, r2, asr #21 8000bde: d107 bne.n 8000bf0 <__aeabi_d2f+0x90> 8000be0: ea50 3301 orrs.w r3, r0, r1, lsl #12 8000be4: bf1e ittt ne 8000be6: f04f 40fe movne.w r0, #2130706432 ; 0x7f000000 8000bea: f440 0040 orrne.w r0, r0, #12582912 ; 0xc00000 8000bee: 4770 bxne lr 8000bf0: f001 4000 and.w r0, r1, #2147483648 ; 0x80000000 8000bf4: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8000bf8: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000bfc: 4770 bx lr 8000bfe: bf00 nop 08000c00 <__aeabi_frsub>: 8000c00: f080 4000 eor.w r0, r0, #2147483648 ; 0x80000000 8000c04: e002 b.n 8000c0c <__addsf3> 8000c06: bf00 nop 08000c08 <__aeabi_fsub>: 8000c08: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000 08000c0c <__addsf3>: 8000c0c: 0042 lsls r2, r0, #1 8000c0e: bf1f itttt ne 8000c10: ea5f 0341 movsne.w r3, r1, lsl #1 8000c14: ea92 0f03 teqne r2, r3 8000c18: ea7f 6c22 mvnsne.w ip, r2, asr #24 8000c1c: ea7f 6c23 mvnsne.w ip, r3, asr #24 8000c20: d06a beq.n 8000cf8 <__addsf3+0xec> 8000c22: ea4f 6212 mov.w r2, r2, lsr #24 8000c26: ebd2 6313 rsbs r3, r2, r3, lsr #24 8000c2a: bfc1 itttt gt 8000c2c: 18d2 addgt r2, r2, r3 8000c2e: 4041 eorgt r1, r0 8000c30: 4048 eorgt r0, r1 8000c32: 4041 eorgt r1, r0 8000c34: bfb8 it lt 8000c36: 425b neglt r3, r3 8000c38: 2b19 cmp r3, #25 8000c3a: bf88 it hi 8000c3c: 4770 bxhi lr 8000c3e: f010 4f00 tst.w r0, #2147483648 ; 0x80000000 8000c42: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000c46: f020 407f bic.w r0, r0, #4278190080 ; 0xff000000 8000c4a: bf18 it ne 8000c4c: 4240 negne r0, r0 8000c4e: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 8000c52: f441 0100 orr.w r1, r1, #8388608 ; 0x800000 8000c56: f021 417f bic.w r1, r1, #4278190080 ; 0xff000000 8000c5a: bf18 it ne 8000c5c: 4249 negne r1, r1 8000c5e: ea92 0f03 teq r2, r3 8000c62: d03f beq.n 8000ce4 <__addsf3+0xd8> 8000c64: f1a2 0201 sub.w r2, r2, #1 8000c68: fa41 fc03 asr.w ip, r1, r3 8000c6c: eb10 000c adds.w r0, r0, ip 8000c70: f1c3 0320 rsb r3, r3, #32 8000c74: fa01 f103 lsl.w r1, r1, r3 8000c78: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000 8000c7c: d502 bpl.n 8000c84 <__addsf3+0x78> 8000c7e: 4249 negs r1, r1 8000c80: eb60 0040 sbc.w r0, r0, r0, lsl #1 8000c84: f5b0 0f00 cmp.w r0, #8388608 ; 0x800000 8000c88: d313 bcc.n 8000cb2 <__addsf3+0xa6> 8000c8a: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 8000c8e: d306 bcc.n 8000c9e <__addsf3+0x92> 8000c90: 0840 lsrs r0, r0, #1 8000c92: ea4f 0131 mov.w r1, r1, rrx 8000c96: f102 0201 add.w r2, r2, #1 8000c9a: 2afe cmp r2, #254 ; 0xfe 8000c9c: d251 bcs.n 8000d42 <__addsf3+0x136> 8000c9e: f1b1 4f00 cmp.w r1, #2147483648 ; 0x80000000 8000ca2: eb40 50c2 adc.w r0, r0, r2, lsl #23 8000ca6: bf08 it eq 8000ca8: f020 0001 biceq.w r0, r0, #1 8000cac: ea40 0003 orr.w r0, r0, r3 8000cb0: 4770 bx lr 8000cb2: 0049 lsls r1, r1, #1 8000cb4: eb40 0000 adc.w r0, r0, r0 8000cb8: 3a01 subs r2, #1 8000cba: bf28 it cs 8000cbc: f5b0 0f00 cmpcs.w r0, #8388608 ; 0x800000 8000cc0: d2ed bcs.n 8000c9e <__addsf3+0x92> 8000cc2: fab0 fc80 clz ip, r0 8000cc6: f1ac 0c08 sub.w ip, ip, #8 8000cca: ebb2 020c subs.w r2, r2, ip 8000cce: fa00 f00c lsl.w r0, r0, ip 8000cd2: bfaa itet ge 8000cd4: eb00 50c2 addge.w r0, r0, r2, lsl #23 8000cd8: 4252 neglt r2, r2 8000cda: 4318 orrge r0, r3 8000cdc: bfbc itt lt 8000cde: 40d0 lsrlt r0, r2 8000ce0: 4318 orrlt r0, r3 8000ce2: 4770 bx lr 8000ce4: f092 0f00 teq r2, #0 8000ce8: f481 0100 eor.w r1, r1, #8388608 ; 0x800000 8000cec: bf06 itte eq 8000cee: f480 0000 eoreq.w r0, r0, #8388608 ; 0x800000 8000cf2: 3201 addeq r2, #1 8000cf4: 3b01 subne r3, #1 8000cf6: e7b5 b.n 8000c64 <__addsf3+0x58> 8000cf8: ea4f 0341 mov.w r3, r1, lsl #1 8000cfc: ea7f 6c22 mvns.w ip, r2, asr #24 8000d00: bf18 it ne 8000d02: ea7f 6c23 mvnsne.w ip, r3, asr #24 8000d06: d021 beq.n 8000d4c <__addsf3+0x140> 8000d08: ea92 0f03 teq r2, r3 8000d0c: d004 beq.n 8000d18 <__addsf3+0x10c> 8000d0e: f092 0f00 teq r2, #0 8000d12: bf08 it eq 8000d14: 4608 moveq r0, r1 8000d16: 4770 bx lr 8000d18: ea90 0f01 teq r0, r1 8000d1c: bf1c itt ne 8000d1e: 2000 movne r0, #0 8000d20: 4770 bxne lr 8000d22: f012 4f7f tst.w r2, #4278190080 ; 0xff000000 8000d26: d104 bne.n 8000d32 <__addsf3+0x126> 8000d28: 0040 lsls r0, r0, #1 8000d2a: bf28 it cs 8000d2c: f040 4000 orrcs.w r0, r0, #2147483648 ; 0x80000000 8000d30: 4770 bx lr 8000d32: f112 7200 adds.w r2, r2, #33554432 ; 0x2000000 8000d36: bf3c itt cc 8000d38: f500 0000 addcc.w r0, r0, #8388608 ; 0x800000 8000d3c: 4770 bxcc lr 8000d3e: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000 8000d42: f043 40fe orr.w r0, r3, #2130706432 ; 0x7f000000 8000d46: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000d4a: 4770 bx lr 8000d4c: ea7f 6222 mvns.w r2, r2, asr #24 8000d50: bf16 itet ne 8000d52: 4608 movne r0, r1 8000d54: ea7f 6323 mvnseq.w r3, r3, asr #24 8000d58: 4601 movne r1, r0 8000d5a: 0242 lsls r2, r0, #9 8000d5c: bf06 itte eq 8000d5e: ea5f 2341 movseq.w r3, r1, lsl #9 8000d62: ea90 0f01 teqeq r0, r1 8000d66: f440 0080 orrne.w r0, r0, #4194304 ; 0x400000 8000d6a: 4770 bx lr 08000d6c <__aeabi_ui2f>: 8000d6c: f04f 0300 mov.w r3, #0 8000d70: e004 b.n 8000d7c <__aeabi_i2f+0x8> 8000d72: bf00 nop 08000d74 <__aeabi_i2f>: 8000d74: f010 4300 ands.w r3, r0, #2147483648 ; 0x80000000 8000d78: bf48 it mi 8000d7a: 4240 negmi r0, r0 8000d7c: ea5f 0c00 movs.w ip, r0 8000d80: bf08 it eq 8000d82: 4770 bxeq lr 8000d84: f043 4396 orr.w r3, r3, #1258291200 ; 0x4b000000 8000d88: 4601 mov r1, r0 8000d8a: f04f 0000 mov.w r0, #0 8000d8e: e01c b.n 8000dca <__aeabi_l2f+0x2a> 08000d90 <__aeabi_ul2f>: 8000d90: ea50 0201 orrs.w r2, r0, r1 8000d94: bf08 it eq 8000d96: 4770 bxeq lr 8000d98: f04f 0300 mov.w r3, #0 8000d9c: e00a b.n 8000db4 <__aeabi_l2f+0x14> 8000d9e: bf00 nop 08000da0 <__aeabi_l2f>: 8000da0: ea50 0201 orrs.w r2, r0, r1 8000da4: bf08 it eq 8000da6: 4770 bxeq lr 8000da8: f011 4300 ands.w r3, r1, #2147483648 ; 0x80000000 8000dac: d502 bpl.n 8000db4 <__aeabi_l2f+0x14> 8000dae: 4240 negs r0, r0 8000db0: eb61 0141 sbc.w r1, r1, r1, lsl #1 8000db4: ea5f 0c01 movs.w ip, r1 8000db8: bf02 ittt eq 8000dba: 4684 moveq ip, r0 8000dbc: 4601 moveq r1, r0 8000dbe: 2000 moveq r0, #0 8000dc0: f043 43b6 orr.w r3, r3, #1526726656 ; 0x5b000000 8000dc4: bf08 it eq 8000dc6: f1a3 5380 subeq.w r3, r3, #268435456 ; 0x10000000 8000dca: f5a3 0300 sub.w r3, r3, #8388608 ; 0x800000 8000dce: fabc f28c clz r2, ip 8000dd2: 3a08 subs r2, #8 8000dd4: eba3 53c2 sub.w r3, r3, r2, lsl #23 8000dd8: db10 blt.n 8000dfc <__aeabi_l2f+0x5c> 8000dda: fa01 fc02 lsl.w ip, r1, r2 8000dde: 4463 add r3, ip 8000de0: fa00 fc02 lsl.w ip, r0, r2 8000de4: f1c2 0220 rsb r2, r2, #32 8000de8: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000 8000dec: fa20 f202 lsr.w r2, r0, r2 8000df0: eb43 0002 adc.w r0, r3, r2 8000df4: bf08 it eq 8000df6: f020 0001 biceq.w r0, r0, #1 8000dfa: 4770 bx lr 8000dfc: f102 0220 add.w r2, r2, #32 8000e00: fa01 fc02 lsl.w ip, r1, r2 8000e04: f1c2 0220 rsb r2, r2, #32 8000e08: ea50 004c orrs.w r0, r0, ip, lsl #1 8000e0c: fa21 f202 lsr.w r2, r1, r2 8000e10: eb43 0002 adc.w r0, r3, r2 8000e14: bf08 it eq 8000e16: ea20 70dc biceq.w r0, r0, ip, lsr #31 8000e1a: 4770 bx lr 08000e1c <__aeabi_fmul>: 8000e1c: f04f 0cff mov.w ip, #255 ; 0xff 8000e20: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8000e24: bf1e ittt ne 8000e26: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8000e2a: ea92 0f0c teqne r2, ip 8000e2e: ea93 0f0c teqne r3, ip 8000e32: d06f beq.n 8000f14 <__aeabi_fmul+0xf8> 8000e34: 441a add r2, r3 8000e36: ea80 0c01 eor.w ip, r0, r1 8000e3a: 0240 lsls r0, r0, #9 8000e3c: bf18 it ne 8000e3e: ea5f 2141 movsne.w r1, r1, lsl #9 8000e42: d01e beq.n 8000e82 <__aeabi_fmul+0x66> 8000e44: f04f 6300 mov.w r3, #134217728 ; 0x8000000 8000e48: ea43 1050 orr.w r0, r3, r0, lsr #5 8000e4c: ea43 1151 orr.w r1, r3, r1, lsr #5 8000e50: fba0 3101 umull r3, r1, r0, r1 8000e54: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000 8000e58: f5b1 0f00 cmp.w r1, #8388608 ; 0x800000 8000e5c: bf3e ittt cc 8000e5e: 0049 lslcc r1, r1, #1 8000e60: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 8000e64: 005b lslcc r3, r3, #1 8000e66: ea40 0001 orr.w r0, r0, r1 8000e6a: f162 027f sbc.w r2, r2, #127 ; 0x7f 8000e6e: 2afd cmp r2, #253 ; 0xfd 8000e70: d81d bhi.n 8000eae <__aeabi_fmul+0x92> 8000e72: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 8000e76: eb40 50c2 adc.w r0, r0, r2, lsl #23 8000e7a: bf08 it eq 8000e7c: f020 0001 biceq.w r0, r0, #1 8000e80: 4770 bx lr 8000e82: f090 0f00 teq r0, #0 8000e86: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000 8000e8a: bf08 it eq 8000e8c: 0249 lsleq r1, r1, #9 8000e8e: ea4c 2050 orr.w r0, ip, r0, lsr #9 8000e92: ea40 2051 orr.w r0, r0, r1, lsr #9 8000e96: 3a7f subs r2, #127 ; 0x7f 8000e98: bfc2 ittt gt 8000e9a: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff 8000e9e: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8000ea2: 4770 bxgt lr 8000ea4: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000ea8: f04f 0300 mov.w r3, #0 8000eac: 3a01 subs r2, #1 8000eae: dc5d bgt.n 8000f6c <__aeabi_fmul+0x150> 8000eb0: f112 0f19 cmn.w r2, #25 8000eb4: bfdc itt le 8000eb6: f000 4000 andle.w r0, r0, #2147483648 ; 0x80000000 8000eba: 4770 bxle lr 8000ebc: f1c2 0200 rsb r2, r2, #0 8000ec0: 0041 lsls r1, r0, #1 8000ec2: fa21 f102 lsr.w r1, r1, r2 8000ec6: f1c2 0220 rsb r2, r2, #32 8000eca: fa00 fc02 lsl.w ip, r0, r2 8000ece: ea5f 0031 movs.w r0, r1, rrx 8000ed2: f140 0000 adc.w r0, r0, #0 8000ed6: ea53 034c orrs.w r3, r3, ip, lsl #1 8000eda: bf08 it eq 8000edc: ea20 70dc biceq.w r0, r0, ip, lsr #31 8000ee0: 4770 bx lr 8000ee2: f092 0f00 teq r2, #0 8000ee6: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000 8000eea: bf02 ittt eq 8000eec: 0040 lsleq r0, r0, #1 8000eee: f410 0f00 tsteq.w r0, #8388608 ; 0x800000 8000ef2: 3a01 subeq r2, #1 8000ef4: d0f9 beq.n 8000eea <__aeabi_fmul+0xce> 8000ef6: ea40 000c orr.w r0, r0, ip 8000efa: f093 0f00 teq r3, #0 8000efe: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 8000f02: bf02 ittt eq 8000f04: 0049 lsleq r1, r1, #1 8000f06: f411 0f00 tsteq.w r1, #8388608 ; 0x800000 8000f0a: 3b01 subeq r3, #1 8000f0c: d0f9 beq.n 8000f02 <__aeabi_fmul+0xe6> 8000f0e: ea41 010c orr.w r1, r1, ip 8000f12: e78f b.n 8000e34 <__aeabi_fmul+0x18> 8000f14: ea0c 53d1 and.w r3, ip, r1, lsr #23 8000f18: ea92 0f0c teq r2, ip 8000f1c: bf18 it ne 8000f1e: ea93 0f0c teqne r3, ip 8000f22: d00a beq.n 8000f3a <__aeabi_fmul+0x11e> 8000f24: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000 8000f28: bf18 it ne 8000f2a: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000 8000f2e: d1d8 bne.n 8000ee2 <__aeabi_fmul+0xc6> 8000f30: ea80 0001 eor.w r0, r0, r1 8000f34: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 8000f38: 4770 bx lr 8000f3a: f090 0f00 teq r0, #0 8000f3e: bf17 itett ne 8000f40: f090 4f00 teqne r0, #2147483648 ; 0x80000000 8000f44: 4608 moveq r0, r1 8000f46: f091 0f00 teqne r1, #0 8000f4a: f091 4f00 teqne r1, #2147483648 ; 0x80000000 8000f4e: d014 beq.n 8000f7a <__aeabi_fmul+0x15e> 8000f50: ea92 0f0c teq r2, ip 8000f54: d101 bne.n 8000f5a <__aeabi_fmul+0x13e> 8000f56: 0242 lsls r2, r0, #9 8000f58: d10f bne.n 8000f7a <__aeabi_fmul+0x15e> 8000f5a: ea93 0f0c teq r3, ip 8000f5e: d103 bne.n 8000f68 <__aeabi_fmul+0x14c> 8000f60: 024b lsls r3, r1, #9 8000f62: bf18 it ne 8000f64: 4608 movne r0, r1 8000f66: d108 bne.n 8000f7a <__aeabi_fmul+0x15e> 8000f68: ea80 0001 eor.w r0, r0, r1 8000f6c: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 8000f70: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8000f74: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000f78: 4770 bx lr 8000f7a: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8000f7e: f440 0040 orr.w r0, r0, #12582912 ; 0xc00000 8000f82: 4770 bx lr 08000f84 <__aeabi_fdiv>: 8000f84: f04f 0cff mov.w ip, #255 ; 0xff 8000f88: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8000f8c: bf1e ittt ne 8000f8e: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8000f92: ea92 0f0c teqne r2, ip 8000f96: ea93 0f0c teqne r3, ip 8000f9a: d069 beq.n 8001070 <__aeabi_fdiv+0xec> 8000f9c: eba2 0203 sub.w r2, r2, r3 8000fa0: ea80 0c01 eor.w ip, r0, r1 8000fa4: 0249 lsls r1, r1, #9 8000fa6: ea4f 2040 mov.w r0, r0, lsl #9 8000faa: d037 beq.n 800101c <__aeabi_fdiv+0x98> 8000fac: f04f 5380 mov.w r3, #268435456 ; 0x10000000 8000fb0: ea43 1111 orr.w r1, r3, r1, lsr #4 8000fb4: ea43 1310 orr.w r3, r3, r0, lsr #4 8000fb8: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000 8000fbc: 428b cmp r3, r1 8000fbe: bf38 it cc 8000fc0: 005b lslcc r3, r3, #1 8000fc2: f142 027d adc.w r2, r2, #125 ; 0x7d 8000fc6: f44f 0c00 mov.w ip, #8388608 ; 0x800000 8000fca: 428b cmp r3, r1 8000fcc: bf24 itt cs 8000fce: 1a5b subcs r3, r3, r1 8000fd0: ea40 000c orrcs.w r0, r0, ip 8000fd4: ebb3 0f51 cmp.w r3, r1, lsr #1 8000fd8: bf24 itt cs 8000fda: eba3 0351 subcs.w r3, r3, r1, lsr #1 8000fde: ea40 005c orrcs.w r0, r0, ip, lsr #1 8000fe2: ebb3 0f91 cmp.w r3, r1, lsr #2 8000fe6: bf24 itt cs 8000fe8: eba3 0391 subcs.w r3, r3, r1, lsr #2 8000fec: ea40 009c orrcs.w r0, r0, ip, lsr #2 8000ff0: ebb3 0fd1 cmp.w r3, r1, lsr #3 8000ff4: bf24 itt cs 8000ff6: eba3 03d1 subcs.w r3, r3, r1, lsr #3 8000ffa: ea40 00dc orrcs.w r0, r0, ip, lsr #3 8000ffe: 011b lsls r3, r3, #4 8001000: bf18 it ne 8001002: ea5f 1c1c movsne.w ip, ip, lsr #4 8001006: d1e0 bne.n 8000fca <__aeabi_fdiv+0x46> 8001008: 2afd cmp r2, #253 ; 0xfd 800100a: f63f af50 bhi.w 8000eae <__aeabi_fmul+0x92> 800100e: 428b cmp r3, r1 8001010: eb40 50c2 adc.w r0, r0, r2, lsl #23 8001014: bf08 it eq 8001016: f020 0001 biceq.w r0, r0, #1 800101a: 4770 bx lr 800101c: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000 8001020: ea4c 2050 orr.w r0, ip, r0, lsr #9 8001024: 327f adds r2, #127 ; 0x7f 8001026: bfc2 ittt gt 8001028: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff 800102c: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8001030: 4770 bxgt lr 8001032: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8001036: f04f 0300 mov.w r3, #0 800103a: 3a01 subs r2, #1 800103c: e737 b.n 8000eae <__aeabi_fmul+0x92> 800103e: f092 0f00 teq r2, #0 8001042: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000 8001046: bf02 ittt eq 8001048: 0040 lsleq r0, r0, #1 800104a: f410 0f00 tsteq.w r0, #8388608 ; 0x800000 800104e: 3a01 subeq r2, #1 8001050: d0f9 beq.n 8001046 <__aeabi_fdiv+0xc2> 8001052: ea40 000c orr.w r0, r0, ip 8001056: f093 0f00 teq r3, #0 800105a: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 800105e: bf02 ittt eq 8001060: 0049 lsleq r1, r1, #1 8001062: f411 0f00 tsteq.w r1, #8388608 ; 0x800000 8001066: 3b01 subeq r3, #1 8001068: d0f9 beq.n 800105e <__aeabi_fdiv+0xda> 800106a: ea41 010c orr.w r1, r1, ip 800106e: e795 b.n 8000f9c <__aeabi_fdiv+0x18> 8001070: ea0c 53d1 and.w r3, ip, r1, lsr #23 8001074: ea92 0f0c teq r2, ip 8001078: d108 bne.n 800108c <__aeabi_fdiv+0x108> 800107a: 0242 lsls r2, r0, #9 800107c: f47f af7d bne.w 8000f7a <__aeabi_fmul+0x15e> 8001080: ea93 0f0c teq r3, ip 8001084: f47f af70 bne.w 8000f68 <__aeabi_fmul+0x14c> 8001088: 4608 mov r0, r1 800108a: e776 b.n 8000f7a <__aeabi_fmul+0x15e> 800108c: ea93 0f0c teq r3, ip 8001090: d104 bne.n 800109c <__aeabi_fdiv+0x118> 8001092: 024b lsls r3, r1, #9 8001094: f43f af4c beq.w 8000f30 <__aeabi_fmul+0x114> 8001098: 4608 mov r0, r1 800109a: e76e b.n 8000f7a <__aeabi_fmul+0x15e> 800109c: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000 80010a0: bf18 it ne 80010a2: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000 80010a6: d1ca bne.n 800103e <__aeabi_fdiv+0xba> 80010a8: f030 4200 bics.w r2, r0, #2147483648 ; 0x80000000 80010ac: f47f af5c bne.w 8000f68 <__aeabi_fmul+0x14c> 80010b0: f031 4300 bics.w r3, r1, #2147483648 ; 0x80000000 80010b4: f47f af3c bne.w 8000f30 <__aeabi_fmul+0x114> 80010b8: e75f b.n 8000f7a <__aeabi_fmul+0x15e> 80010ba: bf00 nop 080010bc <__aeabi_f2iz>: 80010bc: ea4f 0240 mov.w r2, r0, lsl #1 80010c0: f1b2 4ffe cmp.w r2, #2130706432 ; 0x7f000000 80010c4: d30f bcc.n 80010e6 <__aeabi_f2iz+0x2a> 80010c6: f04f 039e mov.w r3, #158 ; 0x9e 80010ca: ebb3 6212 subs.w r2, r3, r2, lsr #24 80010ce: d90d bls.n 80010ec <__aeabi_f2iz+0x30> 80010d0: ea4f 2300 mov.w r3, r0, lsl #8 80010d4: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 80010d8: f010 4f00 tst.w r0, #2147483648 ; 0x80000000 80010dc: fa23 f002 lsr.w r0, r3, r2 80010e0: bf18 it ne 80010e2: 4240 negne r0, r0 80010e4: 4770 bx lr 80010e6: f04f 0000 mov.w r0, #0 80010ea: 4770 bx lr 80010ec: f112 0f61 cmn.w r2, #97 ; 0x61 80010f0: d101 bne.n 80010f6 <__aeabi_f2iz+0x3a> 80010f2: 0242 lsls r2, r0, #9 80010f4: d105 bne.n 8001102 <__aeabi_f2iz+0x46> 80010f6: f010 4000 ands.w r0, r0, #2147483648 ; 0x80000000 80010fa: bf08 it eq 80010fc: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000 8001100: 4770 bx lr 8001102: f04f 0000 mov.w r0, #0 8001106: 4770 bx lr 08001108 <__aeabi_f2uiz>: 8001108: 0042 lsls r2, r0, #1 800110a: d20e bcs.n 800112a <__aeabi_f2uiz+0x22> 800110c: f1b2 4ffe cmp.w r2, #2130706432 ; 0x7f000000 8001110: d30b bcc.n 800112a <__aeabi_f2uiz+0x22> 8001112: f04f 039e mov.w r3, #158 ; 0x9e 8001116: ebb3 6212 subs.w r2, r3, r2, lsr #24 800111a: d409 bmi.n 8001130 <__aeabi_f2uiz+0x28> 800111c: ea4f 2300 mov.w r3, r0, lsl #8 8001120: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 8001124: fa23 f002 lsr.w r0, r3, r2 8001128: 4770 bx lr 800112a: f04f 0000 mov.w r0, #0 800112e: 4770 bx lr 8001130: f112 0f61 cmn.w r2, #97 ; 0x61 8001134: d101 bne.n 800113a <__aeabi_f2uiz+0x32> 8001136: 0242 lsls r2, r0, #9 8001138: d102 bne.n 8001140 <__aeabi_f2uiz+0x38> 800113a: f04f 30ff mov.w r0, #4294967295 800113e: 4770 bx lr 8001140: f04f 0000 mov.w r0, #0 8001144: 4770 bx lr 8001146: bf00 nop 08001148 : \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. \param [in] ch Character to transmit. \returns Character to transmit. */ __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) { 8001148: b480 push {r7} 800114a: b083 sub sp, #12 800114c: af00 add r7, sp, #0 800114e: 6078 str r0, [r7, #4] if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ 8001150: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000 8001154: f8d3 3e80 ldr.w r3, [r3, #3712] ; 0xe80 8001158: f003 0301 and.w r3, r3, #1 800115c: 2b00 cmp r3, #0 800115e: d013 beq.n 8001188 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ 8001160: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000 8001164: f8d3 3e00 ldr.w r3, [r3, #3584] ; 0xe00 8001168: f003 0301 and.w r3, r3, #1 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ 800116c: 2b00 cmp r3, #0 800116e: d00b beq.n 8001188 { while (ITM->PORT[0U].u32 == 0UL) 8001170: e000 b.n 8001174 { __NOP(); 8001172: bf00 nop while (ITM->PORT[0U].u32 == 0UL) 8001174: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000 8001178: 681b ldr r3, [r3, #0] 800117a: 2b00 cmp r3, #0 800117c: d0f9 beq.n 8001172 } ITM->PORT[0U].u8 = (uint8_t)ch; 800117e: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000 8001182: 687a ldr r2, [r7, #4] 8001184: b2d2 uxtb r2, r2 8001186: 701a strb r2, [r3, #0] } return (ch); 8001188: 687b ldr r3, [r7, #4] } 800118a: 4618 mov r0, r3 800118c: 370c adds r7, #12 800118e: 46bd mov sp, r7 8001190: bc80 pop {r7} 8001192: 4770 bx lr 08001194 <_write>: /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ int _write(int file , char *ptr,int len) { 8001194: b580 push {r7, lr} 8001196: b086 sub sp, #24 8001198: af00 add r7, sp, #0 800119a: 60f8 str r0, [r7, #12] 800119c: 60b9 str r1, [r7, #8] 800119e: 607a str r2, [r7, #4] int i = 0; 80011a0: 2300 movs r3, #0 80011a2: 617b str r3, [r7, #20] for(i = 0;i ITM_SendChar((*ptr++)); 80011aa: 68bb ldr r3, [r7, #8] 80011ac: 1c5a adds r2, r3, #1 80011ae: 60ba str r2, [r7, #8] 80011b0: 781b ldrb r3, [r3, #0] 80011b2: 4618 mov r0, r3 80011b4: f7ff ffc8 bl 8001148 for(i = 0;i return len; 80011c6: 687b ldr r3, [r7, #4] } 80011c8: 4618 mov r0, r3 80011ca: 3718 adds r7, #24 80011cc: 46bd mov sp, r7 80011ce: bd80 pop {r7, pc} 080011d0
: /** * @brief The application entry point. * @retval int */ int main(void) { 80011d0: b580 push {r7, lr} 80011d2: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 80011d4: f000 fd6a bl 8001cac /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 80011d8: f000 f80f bl 80011fa /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 80011dc: f000 f962 bl 80014a4 MX_FSMC_Init(); 80011e0: f000 fa5e bl 80016a0 MX_I2C2_Init(); 80011e4: f000 f84e bl 8001284 MX_TIM6_Init(); 80011e8: f000 f926 bl 8001438 MX_SPI1_Init(); 80011ec: f000 f878 bl 80012e0 MX_TIM4_Init(); 80011f0: f000 f8ac bl 800134c /* USER CODE BEGIN 2 */ main_app(); 80011f4: f005 fc82 bl 8006afc /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) 80011f8: e7fe b.n 80011f8 080011fa : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 80011fa: b580 push {r7, lr} 80011fc: b090 sub sp, #64 ; 0x40 80011fe: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8001200: f107 0318 add.w r3, r7, #24 8001204: 2228 movs r2, #40 ; 0x28 8001206: 2100 movs r1, #0 8001208: 4618 mov r0, r3 800120a: f006 ff1b bl 8008044 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 800120e: 1d3b adds r3, r7, #4 8001210: 2200 movs r2, #0 8001212: 601a str r2, [r3, #0] 8001214: 605a str r2, [r3, #4] 8001216: 609a str r2, [r3, #8] 8001218: 60da str r2, [r3, #12] 800121a: 611a str r2, [r3, #16] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 800121c: 2301 movs r3, #1 800121e: 61bb str r3, [r7, #24] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8001220: f44f 3380 mov.w r3, #65536 ; 0x10000 8001224: 61fb str r3, [r7, #28] RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 8001226: 2300 movs r3, #0 8001228: 623b str r3, [r7, #32] RCC_OscInitStruct.HSIState = RCC_HSI_ON; 800122a: 2301 movs r3, #1 800122c: 62bb str r3, [r7, #40] ; 0x28 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 800122e: 2302 movs r3, #2 8001230: 637b str r3, [r7, #52] ; 0x34 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 8001232: f44f 3380 mov.w r3, #65536 ; 0x10000 8001236: 63bb str r3, [r7, #56] ; 0x38 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 8001238: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000 800123c: 63fb str r3, [r7, #60] ; 0x3c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 800123e: f107 0318 add.w r3, r7, #24 8001242: 4618 mov r0, r3 8001244: f002 f88a bl 800335c 8001248: 4603 mov r3, r0 800124a: 2b00 cmp r3, #0 800124c: d001 beq.n 8001252 { Error_Handler(); 800124e: f000 fa8b bl 8001768 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001252: 230f movs r3, #15 8001254: 607b str r3, [r7, #4] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8001256: 2302 movs r3, #2 8001258: 60bb str r3, [r7, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800125a: 2300 movs r3, #0 800125c: 60fb str r3, [r7, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 800125e: f44f 6380 mov.w r3, #1024 ; 0x400 8001262: 613b str r3, [r7, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8001264: 2300 movs r3, #0 8001266: 617b str r3, [r7, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8001268: 1d3b adds r3, r7, #4 800126a: 2102 movs r1, #2 800126c: 4618 mov r0, r3 800126e: f002 faf7 bl 8003860 8001272: 4603 mov r3, r0 8001274: 2b00 cmp r3, #0 8001276: d001 beq.n 800127c { Error_Handler(); 8001278: f000 fa76 bl 8001768 } } 800127c: bf00 nop 800127e: 3740 adds r7, #64 ; 0x40 8001280: 46bd mov sp, r7 8001282: bd80 pop {r7, pc} 08001284 : * @brief I2C2 Initialization Function * @param None * @retval None */ static void MX_I2C2_Init(void) { 8001284: b580 push {r7, lr} 8001286: af00 add r7, sp, #0 /* USER CODE END I2C2_Init 0 */ /* USER CODE BEGIN I2C2_Init 1 */ /* USER CODE END I2C2_Init 1 */ hi2c2.Instance = I2C2; 8001288: 4b12 ldr r3, [pc, #72] ; (80012d4 ) 800128a: 4a13 ldr r2, [pc, #76] ; (80012d8 ) 800128c: 601a str r2, [r3, #0] hi2c2.Init.ClockSpeed = 100000; 800128e: 4b11 ldr r3, [pc, #68] ; (80012d4 ) 8001290: 4a12 ldr r2, [pc, #72] ; (80012dc ) 8001292: 605a str r2, [r3, #4] hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 8001294: 4b0f ldr r3, [pc, #60] ; (80012d4 ) 8001296: 2200 movs r2, #0 8001298: 609a str r2, [r3, #8] hi2c2.Init.OwnAddress1 = 0; 800129a: 4b0e ldr r3, [pc, #56] ; (80012d4 ) 800129c: 2200 movs r2, #0 800129e: 60da str r2, [r3, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 80012a0: 4b0c ldr r3, [pc, #48] ; (80012d4 ) 80012a2: f44f 4280 mov.w r2, #16384 ; 0x4000 80012a6: 611a str r2, [r3, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 80012a8: 4b0a ldr r3, [pc, #40] ; (80012d4 ) 80012aa: 2200 movs r2, #0 80012ac: 615a str r2, [r3, #20] hi2c2.Init.OwnAddress2 = 0; 80012ae: 4b09 ldr r3, [pc, #36] ; (80012d4 ) 80012b0: 2200 movs r2, #0 80012b2: 619a str r2, [r3, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 80012b4: 4b07 ldr r3, [pc, #28] ; (80012d4 ) 80012b6: 2200 movs r2, #0 80012b8: 61da str r2, [r3, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 80012ba: 4b06 ldr r3, [pc, #24] ; (80012d4 ) 80012bc: 2200 movs r2, #0 80012be: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) 80012c0: 4804 ldr r0, [pc, #16] ; (80012d4 ) 80012c2: f001 f84b bl 800235c 80012c6: 4603 mov r3, r0 80012c8: 2b00 cmp r3, #0 80012ca: d001 beq.n 80012d0 { Error_Handler(); 80012cc: f000 fa4c bl 8001768 } /* USER CODE BEGIN I2C2_Init 2 */ /* USER CODE END I2C2_Init 2 */ } 80012d0: bf00 nop 80012d2: bd80 pop {r7, pc} 80012d4: 200001f0 .word 0x200001f0 80012d8: 40005800 .word 0x40005800 80012dc: 000186a0 .word 0x000186a0 080012e0 : * @brief SPI1 Initialization Function * @param None * @retval None */ static void MX_SPI1_Init(void) { 80012e0: b580 push {r7, lr} 80012e2: af00 add r7, sp, #0 /* USER CODE BEGIN SPI1_Init 1 */ /* USER CODE END SPI1_Init 1 */ /* SPI1 parameter configuration*/ hspi1.Instance = SPI1; 80012e4: 4b17 ldr r3, [pc, #92] ; (8001344 ) 80012e6: 4a18 ldr r2, [pc, #96] ; (8001348 ) 80012e8: 601a str r2, [r3, #0] hspi1.Init.Mode = SPI_MODE_MASTER; 80012ea: 4b16 ldr r3, [pc, #88] ; (8001344 ) 80012ec: f44f 7282 mov.w r2, #260 ; 0x104 80012f0: 605a str r2, [r3, #4] hspi1.Init.Direction = SPI_DIRECTION_2LINES; 80012f2: 4b14 ldr r3, [pc, #80] ; (8001344 ) 80012f4: 2200 movs r2, #0 80012f6: 609a str r2, [r3, #8] hspi1.Init.DataSize = SPI_DATASIZE_8BIT; 80012f8: 4b12 ldr r3, [pc, #72] ; (8001344 ) 80012fa: 2200 movs r2, #0 80012fc: 60da str r2, [r3, #12] hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; 80012fe: 4b11 ldr r3, [pc, #68] ; (8001344 ) 8001300: 2200 movs r2, #0 8001302: 611a str r2, [r3, #16] hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; 8001304: 4b0f ldr r3, [pc, #60] ; (8001344 ) 8001306: 2200 movs r2, #0 8001308: 615a str r2, [r3, #20] hspi1.Init.NSS = SPI_NSS_SOFT; 800130a: 4b0e ldr r3, [pc, #56] ; (8001344 ) 800130c: f44f 7200 mov.w r2, #512 ; 0x200 8001310: 619a str r2, [r3, #24] hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; 8001312: 4b0c ldr r3, [pc, #48] ; (8001344 ) 8001314: 2208 movs r2, #8 8001316: 61da str r2, [r3, #28] hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; 8001318: 4b0a ldr r3, [pc, #40] ; (8001344 ) 800131a: 2200 movs r2, #0 800131c: 621a str r2, [r3, #32] hspi1.Init.TIMode = SPI_TIMODE_DISABLE; 800131e: 4b09 ldr r3, [pc, #36] ; (8001344 ) 8001320: 2200 movs r2, #0 8001322: 625a str r2, [r3, #36] ; 0x24 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 8001324: 4b07 ldr r3, [pc, #28] ; (8001344 ) 8001326: 2200 movs r2, #0 8001328: 629a str r2, [r3, #40] ; 0x28 hspi1.Init.CRCPolynomial = 10; 800132a: 4b06 ldr r3, [pc, #24] ; (8001344 ) 800132c: 220a movs r2, #10 800132e: 62da str r2, [r3, #44] ; 0x2c if (HAL_SPI_Init(&hspi1) != HAL_OK) 8001330: 4804 ldr r0, [pc, #16] ; (8001344 ) 8001332: f002 fc19 bl 8003b68 8001336: 4603 mov r3, r0 8001338: 2b00 cmp r3, #0 800133a: d001 beq.n 8001340 { Error_Handler(); 800133c: f000 fa14 bl 8001768 } /* USER CODE BEGIN SPI1_Init 2 */ /* USER CODE END SPI1_Init 2 */ } 8001340: bf00 nop 8001342: bd80 pop {r7, pc} 8001344: 20000244 .word 0x20000244 8001348: 40013000 .word 0x40013000 0800134c : * @brief TIM4 Initialization Function * @param None * @retval None */ static void MX_TIM4_Init(void) { 800134c: b580 push {r7, lr} 800134e: b08e sub sp, #56 ; 0x38 8001350: af00 add r7, sp, #0 /* USER CODE BEGIN TIM4_Init 0 */ /* USER CODE END TIM4_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 8001352: f107 0328 add.w r3, r7, #40 ; 0x28 8001356: 2200 movs r2, #0 8001358: 601a str r2, [r3, #0] 800135a: 605a str r2, [r3, #4] 800135c: 609a str r2, [r3, #8] 800135e: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8001360: f107 0320 add.w r3, r7, #32 8001364: 2200 movs r2, #0 8001366: 601a str r2, [r3, #0] 8001368: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 800136a: 1d3b adds r3, r7, #4 800136c: 2200 movs r2, #0 800136e: 601a str r2, [r3, #0] 8001370: 605a str r2, [r3, #4] 8001372: 609a str r2, [r3, #8] 8001374: 60da str r2, [r3, #12] 8001376: 611a str r2, [r3, #16] 8001378: 615a str r2, [r3, #20] 800137a: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM4_Init 1 */ /* USER CODE END TIM4_Init 1 */ htim4.Instance = TIM4; 800137c: 4b2c ldr r3, [pc, #176] ; (8001430 ) 800137e: 4a2d ldr r2, [pc, #180] ; (8001434 ) 8001380: 601a str r2, [r3, #0] htim4.Init.Prescaler = 0; 8001382: 4b2b ldr r3, [pc, #172] ; (8001430 ) 8001384: 2200 movs r2, #0 8001386: 605a str r2, [r3, #4] htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 8001388: 4b29 ldr r3, [pc, #164] ; (8001430 ) 800138a: 2200 movs r2, #0 800138c: 609a str r2, [r3, #8] htim4.Init.Period = 65535; 800138e: 4b28 ldr r3, [pc, #160] ; (8001430 ) 8001390: f64f 72ff movw r2, #65535 ; 0xffff 8001394: 60da str r2, [r3, #12] htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 8001396: 4b26 ldr r3, [pc, #152] ; (8001430 ) 8001398: 2200 movs r2, #0 800139a: 611a str r2, [r3, #16] htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 800139c: 4b24 ldr r3, [pc, #144] ; (8001430 ) 800139e: 2200 movs r2, #0 80013a0: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim4) != HAL_OK) 80013a2: 4823 ldr r0, [pc, #140] ; (8001430 ) 80013a4: f002 fcb1 bl 8003d0a 80013a8: 4603 mov r3, r0 80013aa: 2b00 cmp r3, #0 80013ac: d001 beq.n 80013b2 { Error_Handler(); 80013ae: f000 f9db bl 8001768 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 80013b2: f44f 5380 mov.w r3, #4096 ; 0x1000 80013b6: 62bb str r3, [r7, #40] ; 0x28 if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) 80013b8: f107 0328 add.w r3, r7, #40 ; 0x28 80013bc: 4619 mov r1, r3 80013be: 481c ldr r0, [pc, #112] ; (8001430 ) 80013c0: f002 fff8 bl 80043b4 80013c4: 4603 mov r3, r0 80013c6: 2b00 cmp r3, #0 80013c8: d001 beq.n 80013ce { Error_Handler(); 80013ca: f000 f9cd bl 8001768 } if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) 80013ce: 4818 ldr r0, [pc, #96] ; (8001430 ) 80013d0: f002 fd18 bl 8003e04 80013d4: 4603 mov r3, r0 80013d6: 2b00 cmp r3, #0 80013d8: d001 beq.n 80013de { Error_Handler(); 80013da: f000 f9c5 bl 8001768 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 80013de: 2300 movs r3, #0 80013e0: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 80013e2: 2300 movs r3, #0 80013e4: 627b str r3, [r7, #36] ; 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 80013e6: f107 0320 add.w r3, r7, #32 80013ea: 4619 mov r1, r3 80013ec: 4810 ldr r0, [pc, #64] ; (8001430 ) 80013ee: f003 fba9 bl 8004b44 80013f2: 4603 mov r3, r0 80013f4: 2b00 cmp r3, #0 80013f6: d001 beq.n 80013fc { Error_Handler(); 80013f8: f000 f9b6 bl 8001768 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 80013fc: 2360 movs r3, #96 ; 0x60 80013fe: 607b str r3, [r7, #4] sConfigOC.Pulse = 0; 8001400: 2300 movs r3, #0 8001402: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 8001404: 2300 movs r3, #0 8001406: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 8001408: 2300 movs r3, #0 800140a: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 800140c: 1d3b adds r3, r7, #4 800140e: 2208 movs r2, #8 8001410: 4619 mov r1, r3 8001412: 4807 ldr r0, [pc, #28] ; (8001430 ) 8001414: f002 ff10 bl 8004238 8001418: 4603 mov r3, r0 800141a: 2b00 cmp r3, #0 800141c: d001 beq.n 8001422 { Error_Handler(); 800141e: f000 f9a3 bl 8001768 } /* USER CODE BEGIN TIM4_Init 2 */ /* USER CODE END TIM4_Init 2 */ HAL_TIM_MspPostInit(&htim4); 8001422: 4803 ldr r0, [pc, #12] ; (8001430 ) 8001424: f000 faa4 bl 8001970 } 8001428: bf00 nop 800142a: 3738 adds r7, #56 ; 0x38 800142c: 46bd mov sp, r7 800142e: bd80 pop {r7, pc} 8001430: 2000029c .word 0x2000029c 8001434: 40000800 .word 0x40000800 08001438 : * @brief TIM6 Initialization Function * @param None * @retval None */ static void MX_TIM6_Init(void) { 8001438: b580 push {r7, lr} 800143a: b082 sub sp, #8 800143c: af00 add r7, sp, #0 /* USER CODE BEGIN TIM6_Init 0 */ /* USER CODE END TIM6_Init 0 */ TIM_MasterConfigTypeDef sMasterConfig = {0}; 800143e: 463b mov r3, r7 8001440: 2200 movs r2, #0 8001442: 601a str r2, [r3, #0] 8001444: 605a str r2, [r3, #4] /* USER CODE BEGIN TIM6_Init 1 */ /* USER CODE END TIM6_Init 1 */ htim6.Instance = TIM6; 8001446: 4b15 ldr r3, [pc, #84] ; (800149c ) 8001448: 4a15 ldr r2, [pc, #84] ; (80014a0 ) 800144a: 601a str r2, [r3, #0] htim6.Init.Prescaler = 72-1; 800144c: 4b13 ldr r3, [pc, #76] ; (800149c ) 800144e: 2247 movs r2, #71 ; 0x47 8001450: 605a str r2, [r3, #4] htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 8001452: 4b12 ldr r3, [pc, #72] ; (800149c ) 8001454: 2200 movs r2, #0 8001456: 609a str r2, [r3, #8] htim6.Init.Period = 10000-1; 8001458: 4b10 ldr r3, [pc, #64] ; (800149c ) 800145a: f242 720f movw r2, #9999 ; 0x270f 800145e: 60da str r2, [r3, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8001460: 4b0e ldr r3, [pc, #56] ; (800149c ) 8001462: 2200 movs r2, #0 8001464: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8001466: 480d ldr r0, [pc, #52] ; (800149c ) 8001468: f002 fc4f bl 8003d0a 800146c: 4603 mov r3, r0 800146e: 2b00 cmp r3, #0 8001470: d001 beq.n 8001476 { Error_Handler(); 8001472: f000 f979 bl 8001768 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8001476: 2300 movs r3, #0 8001478: 603b str r3, [r7, #0] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800147a: 2300 movs r3, #0 800147c: 607b str r3, [r7, #4] if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 800147e: 463b mov r3, r7 8001480: 4619 mov r1, r3 8001482: 4806 ldr r0, [pc, #24] ; (800149c ) 8001484: f003 fb5e bl 8004b44 8001488: 4603 mov r3, r0 800148a: 2b00 cmp r3, #0 800148c: d001 beq.n 8001492 { Error_Handler(); 800148e: f000 f96b bl 8001768 } /* USER CODE BEGIN TIM6_Init 2 */ /* USER CODE END TIM6_Init 2 */ } 8001492: bf00 nop 8001494: 3708 adds r7, #8 8001496: 46bd mov sp, r7 8001498: bd80 pop {r7, pc} 800149a: bf00 nop 800149c: 200002e4 .word 0x200002e4 80014a0: 40001000 .word 0x40001000 080014a4 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 80014a4: b580 push {r7, lr} 80014a6: b08a sub sp, #40 ; 0x28 80014a8: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80014aa: f107 0318 add.w r3, r7, #24 80014ae: 2200 movs r2, #0 80014b0: 601a str r2, [r3, #0] 80014b2: 605a str r2, [r3, #4] 80014b4: 609a str r2, [r3, #8] 80014b6: 60da str r2, [r3, #12] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); 80014b8: 4b74 ldr r3, [pc, #464] ; (800168c ) 80014ba: 699b ldr r3, [r3, #24] 80014bc: 4a73 ldr r2, [pc, #460] ; (800168c ) 80014be: f043 0340 orr.w r3, r3, #64 ; 0x40 80014c2: 6193 str r3, [r2, #24] 80014c4: 4b71 ldr r3, [pc, #452] ; (800168c ) 80014c6: 699b ldr r3, [r3, #24] 80014c8: f003 0340 and.w r3, r3, #64 ; 0x40 80014cc: 617b str r3, [r7, #20] 80014ce: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOF_CLK_ENABLE(); 80014d0: 4b6e ldr r3, [pc, #440] ; (800168c ) 80014d2: 699b ldr r3, [r3, #24] 80014d4: 4a6d ldr r2, [pc, #436] ; (800168c ) 80014d6: f043 0380 orr.w r3, r3, #128 ; 0x80 80014da: 6193 str r3, [r2, #24] 80014dc: 4b6b ldr r3, [pc, #428] ; (800168c ) 80014de: 699b ldr r3, [r3, #24] 80014e0: f003 0380 and.w r3, r3, #128 ; 0x80 80014e4: 613b str r3, [r7, #16] 80014e6: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 80014e8: 4b68 ldr r3, [pc, #416] ; (800168c ) 80014ea: 699b ldr r3, [r3, #24] 80014ec: 4a67 ldr r2, [pc, #412] ; (800168c ) 80014ee: f043 0304 orr.w r3, r3, #4 80014f2: 6193 str r3, [r2, #24] 80014f4: 4b65 ldr r3, [pc, #404] ; (800168c ) 80014f6: 699b ldr r3, [r3, #24] 80014f8: f003 0304 and.w r3, r3, #4 80014fc: 60fb str r3, [r7, #12] 80014fe: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOB_CLK_ENABLE(); 8001500: 4b62 ldr r3, [pc, #392] ; (800168c ) 8001502: 699b ldr r3, [r3, #24] 8001504: 4a61 ldr r2, [pc, #388] ; (800168c ) 8001506: f043 0308 orr.w r3, r3, #8 800150a: 6193 str r3, [r2, #24] 800150c: 4b5f ldr r3, [pc, #380] ; (800168c ) 800150e: 699b ldr r3, [r3, #24] 8001510: f003 0308 and.w r3, r3, #8 8001514: 60bb str r3, [r7, #8] 8001516: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOG_CLK_ENABLE(); 8001518: 4b5c ldr r3, [pc, #368] ; (800168c ) 800151a: 699b ldr r3, [r3, #24] 800151c: 4a5b ldr r2, [pc, #364] ; (800168c ) 800151e: f443 7380 orr.w r3, r3, #256 ; 0x100 8001522: 6193 str r3, [r2, #24] 8001524: 4b59 ldr r3, [pc, #356] ; (800168c ) 8001526: 699b ldr r3, [r3, #24] 8001528: f403 7380 and.w r3, r3, #256 ; 0x100 800152c: 607b str r3, [r7, #4] 800152e: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOD_CLK_ENABLE(); 8001530: 4b56 ldr r3, [pc, #344] ; (800168c ) 8001532: 699b ldr r3, [r3, #24] 8001534: 4a55 ldr r2, [pc, #340] ; (800168c ) 8001536: f043 0320 orr.w r3, r3, #32 800153a: 6193 str r3, [r2, #24] 800153c: 4b53 ldr r3, [pc, #332] ; (800168c ) 800153e: 699b ldr r3, [r3, #24] 8001540: f003 0320 and.w r3, r3, #32 8001544: 603b str r3, [r7, #0] 8001546: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(TDIN_GPIO_Port, TDIN_Pin, GPIO_PIN_SET); 8001548: 2201 movs r2, #1 800154a: f44f 7100 mov.w r1, #512 ; 0x200 800154e: 4850 ldr r0, [pc, #320] ; (8001690 ) 8001550: f000 feeb bl 800232a /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(RC522_CS_GPIO_Port, RC522_CS_Pin, GPIO_PIN_RESET); 8001554: 2200 movs r2, #0 8001556: 2110 movs r1, #16 8001558: 484e ldr r0, [pc, #312] ; (8001694 ) 800155a: f000 fee6 bl 800232a /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(LCD_BL_GPIO_Port, LCD_BL_Pin, GPIO_PIN_RESET); 800155e: 2200 movs r2, #0 8001560: 2101 movs r1, #1 8001562: 484d ldr r0, [pc, #308] ; (8001698 ) 8001564: f000 fee1 bl 800232a /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, TCLK_Pin|TCS_Pin|MAX_IRD_Pin|MAX_RD_Pin, GPIO_PIN_SET); 8001568: 2201 movs r2, #1 800156a: f245 0106 movw r1, #20486 ; 0x5006 800156e: 484a ldr r0, [pc, #296] ; (8001698 ) 8001570: f000 fedb bl 800232a /*Configure GPIO pins : KEY3_Pin KEY2_Pin KEY1_Pin */ GPIO_InitStruct.Pin = KEY3_Pin|KEY2_Pin|KEY1_Pin; 8001574: 231c movs r3, #28 8001576: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001578: 2300 movs r3, #0 800157a: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 800157c: 2301 movs r3, #1 800157e: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8001580: f107 0318 add.w r3, r7, #24 8001584: 4619 mov r1, r3 8001586: 4845 ldr r0, [pc, #276] ; (800169c ) 8001588: f000 fd24 bl 8001fd4 /*Configure GPIO pin : TDOUT_Pin */ GPIO_InitStruct.Pin = TDOUT_Pin; 800158c: f44f 7380 mov.w r3, #256 ; 0x100 8001590: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001592: 2300 movs r3, #0 8001594: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001596: 2300 movs r3, #0 8001598: 623b str r3, [r7, #32] HAL_GPIO_Init(TDOUT_GPIO_Port, &GPIO_InitStruct); 800159a: f107 0318 add.w r3, r7, #24 800159e: 4619 mov r1, r3 80015a0: 483b ldr r0, [pc, #236] ; (8001690 ) 80015a2: f000 fd17 bl 8001fd4 /*Configure GPIO pin : TDIN_Pin */ GPIO_InitStruct.Pin = TDIN_Pin; 80015a6: f44f 7300 mov.w r3, #512 ; 0x200 80015aa: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80015ac: 2301 movs r3, #1 80015ae: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 80015b0: 2300 movs r3, #0 80015b2: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80015b4: 2303 movs r3, #3 80015b6: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(TDIN_GPIO_Port, &GPIO_InitStruct); 80015b8: f107 0318 add.w r3, r7, #24 80015bc: 4619 mov r1, r3 80015be: 4834 ldr r0, [pc, #208] ; (8001690 ) 80015c0: f000 fd08 bl 8001fd4 /*Configure GPIO pin : TPEN_Pin */ GPIO_InitStruct.Pin = TPEN_Pin; 80015c4: f44f 6380 mov.w r3, #1024 ; 0x400 80015c8: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80015ca: 2300 movs r3, #0 80015cc: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 80015ce: 2301 movs r3, #1 80015d0: 623b str r3, [r7, #32] HAL_GPIO_Init(TPEN_GPIO_Port, &GPIO_InitStruct); 80015d2: f107 0318 add.w r3, r7, #24 80015d6: 4619 mov r1, r3 80015d8: 482d ldr r0, [pc, #180] ; (8001690 ) 80015da: f000 fcfb bl 8001fd4 /*Configure GPIO pin : KEY0_Pin */ GPIO_InitStruct.Pin = KEY0_Pin; 80015de: 2301 movs r3, #1 80015e0: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80015e2: 2300 movs r3, #0 80015e4: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 80015e6: 2300 movs r3, #0 80015e8: 623b str r3, [r7, #32] HAL_GPIO_Init(KEY0_GPIO_Port, &GPIO_InitStruct); 80015ea: f107 0318 add.w r3, r7, #24 80015ee: 4619 mov r1, r3 80015f0: 4828 ldr r0, [pc, #160] ; (8001694 ) 80015f2: f000 fcef bl 8001fd4 /*Configure GPIO pin : RC522_CS_Pin */ GPIO_InitStruct.Pin = RC522_CS_Pin; 80015f6: 2310 movs r3, #16 80015f8: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80015fa: 2301 movs r3, #1 80015fc: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 80015fe: 2300 movs r3, #0 8001600: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001602: 2302 movs r3, #2 8001604: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(RC522_CS_GPIO_Port, &GPIO_InitStruct); 8001606: f107 0318 add.w r3, r7, #24 800160a: 4619 mov r1, r3 800160c: 4821 ldr r0, [pc, #132] ; (8001694 ) 800160e: f000 fce1 bl 8001fd4 /*Configure GPIO pin : LCD_BL_Pin */ GPIO_InitStruct.Pin = LCD_BL_Pin; 8001612: 2301 movs r3, #1 8001614: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001616: 2301 movs r3, #1 8001618: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 800161a: 2300 movs r3, #0 800161c: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800161e: 2302 movs r3, #2 8001620: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(LCD_BL_GPIO_Port, &GPIO_InitStruct); 8001622: f107 0318 add.w r3, r7, #24 8001626: 4619 mov r1, r3 8001628: 481b ldr r0, [pc, #108] ; (8001698 ) 800162a: f000 fcd3 bl 8001fd4 /*Configure GPIO pins : TCLK_Pin TCS_Pin */ GPIO_InitStruct.Pin = TCLK_Pin|TCS_Pin; 800162e: 2306 movs r3, #6 8001630: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001632: 2301 movs r3, #1 8001634: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001636: 2300 movs r3, #0 8001638: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800163a: 2303 movs r3, #3 800163c: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800163e: f107 0318 add.w r3, r7, #24 8001642: 4619 mov r1, r3 8001644: 4814 ldr r0, [pc, #80] ; (8001698 ) 8001646: f000 fcc5 bl 8001fd4 /*Configure GPIO pins : MAX_IRD_Pin MAX_RD_Pin */ GPIO_InitStruct.Pin = MAX_IRD_Pin|MAX_RD_Pin; 800164a: f44f 43a0 mov.w r3, #20480 ; 0x5000 800164e: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001650: 2301 movs r3, #1 8001652: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 8001654: 2301 movs r3, #1 8001656: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001658: 2303 movs r3, #3 800165a: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800165c: f107 0318 add.w r3, r7, #24 8001660: 4619 mov r1, r3 8001662: 480d ldr r0, [pc, #52] ; (8001698 ) 8001664: f000 fcb6 bl 8001fd4 /*Configure GPIO pin : MAX_INT_Pin */ GPIO_InitStruct.Pin = MAX_INT_Pin; 8001668: f44f 5300 mov.w r3, #8192 ; 0x2000 800166c: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800166e: 2300 movs r3, #0 8001670: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 8001672: 2301 movs r3, #1 8001674: 623b str r3, [r7, #32] HAL_GPIO_Init(MAX_INT_GPIO_Port, &GPIO_InitStruct); 8001676: f107 0318 add.w r3, r7, #24 800167a: 4619 mov r1, r3 800167c: 4806 ldr r0, [pc, #24] ; (8001698 ) 800167e: f000 fca9 bl 8001fd4 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } 8001682: bf00 nop 8001684: 3728 adds r7, #40 ; 0x28 8001686: 46bd mov sp, r7 8001688: bd80 pop {r7, pc} 800168a: bf00 nop 800168c: 40021000 .word 0x40021000 8001690: 40011c00 .word 0x40011c00 8001694: 40010800 .word 0x40010800 8001698: 40010c00 .word 0x40010c00 800169c: 40011800 .word 0x40011800 080016a0 : /* FSMC initialization function */ static void MX_FSMC_Init(void) { 80016a0: b580 push {r7, lr} 80016a2: b088 sub sp, #32 80016a4: af00 add r7, sp, #0 /* USER CODE BEGIN FSMC_Init 0 */ /* USER CODE END FSMC_Init 0 */ FSMC_NORSRAM_TimingTypeDef Timing = {0}; 80016a6: 1d3b adds r3, r7, #4 80016a8: 2200 movs r2, #0 80016aa: 601a str r2, [r3, #0] 80016ac: 605a str r2, [r3, #4] 80016ae: 609a str r2, [r3, #8] 80016b0: 60da str r2, [r3, #12] 80016b2: 611a str r2, [r3, #16] 80016b4: 615a str r2, [r3, #20] 80016b6: 619a str r2, [r3, #24] /* USER CODE END FSMC_Init 1 */ /** Perform the SRAM1 memory initialization sequence */ hsram1.Instance = FSMC_NORSRAM_DEVICE; 80016b8: 4b28 ldr r3, [pc, #160] ; (800175c ) 80016ba: f04f 4220 mov.w r2, #2684354560 ; 0xa0000000 80016be: 601a str r2, [r3, #0] hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE; 80016c0: 4b26 ldr r3, [pc, #152] ; (800175c ) 80016c2: 4a27 ldr r2, [pc, #156] ; (8001760 ) 80016c4: 605a str r2, [r3, #4] /* hsram1.Init */ hsram1.Init.NSBank = FSMC_NORSRAM_BANK4; 80016c6: 4b25 ldr r3, [pc, #148] ; (800175c ) 80016c8: 2206 movs r2, #6 80016ca: 609a str r2, [r3, #8] hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE; 80016cc: 4b23 ldr r3, [pc, #140] ; (800175c ) 80016ce: 2200 movs r2, #0 80016d0: 60da str r2, [r3, #12] hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM; 80016d2: 4b22 ldr r3, [pc, #136] ; (800175c ) 80016d4: 2200 movs r2, #0 80016d6: 611a str r2, [r3, #16] hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16; 80016d8: 4b20 ldr r3, [pc, #128] ; (800175c ) 80016da: 2210 movs r2, #16 80016dc: 615a str r2, [r3, #20] hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE; 80016de: 4b1f ldr r3, [pc, #124] ; (800175c ) 80016e0: 2200 movs r2, #0 80016e2: 619a str r2, [r3, #24] hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW; 80016e4: 4b1d ldr r3, [pc, #116] ; (800175c ) 80016e6: 2200 movs r2, #0 80016e8: 61da str r2, [r3, #28] hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE; 80016ea: 4b1c ldr r3, [pc, #112] ; (800175c ) 80016ec: 2200 movs r2, #0 80016ee: 621a str r2, [r3, #32] hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS; 80016f0: 4b1a ldr r3, [pc, #104] ; (800175c ) 80016f2: 2200 movs r2, #0 80016f4: 625a str r2, [r3, #36] ; 0x24 hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE; 80016f6: 4b19 ldr r3, [pc, #100] ; (800175c ) 80016f8: f44f 5280 mov.w r2, #4096 ; 0x1000 80016fc: 629a str r2, [r3, #40] ; 0x28 hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE; 80016fe: 4b17 ldr r3, [pc, #92] ; (800175c ) 8001700: 2200 movs r2, #0 8001702: 62da str r2, [r3, #44] ; 0x2c hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE; 8001704: 4b15 ldr r3, [pc, #84] ; (800175c ) 8001706: 2200 movs r2, #0 8001708: 631a str r2, [r3, #48] ; 0x30 hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE; 800170a: 4b14 ldr r3, [pc, #80] ; (800175c ) 800170c: 2200 movs r2, #0 800170e: 635a str r2, [r3, #52] ; 0x34 hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE; 8001710: 4b12 ldr r3, [pc, #72] ; (800175c ) 8001712: 2200 movs r2, #0 8001714: 639a str r2, [r3, #56] ; 0x38 /* Timing */ Timing.AddressSetupTime = 0; 8001716: 2300 movs r3, #0 8001718: 607b str r3, [r7, #4] Timing.AddressHoldTime = 15; 800171a: 230f movs r3, #15 800171c: 60bb str r3, [r7, #8] Timing.DataSetupTime = 1; 800171e: 2301 movs r3, #1 8001720: 60fb str r3, [r7, #12] Timing.BusTurnAroundDuration = 0; 8001722: 2300 movs r3, #0 8001724: 613b str r3, [r7, #16] Timing.CLKDivision = 16; 8001726: 2310 movs r3, #16 8001728: 617b str r3, [r7, #20] Timing.DataLatency = 17; 800172a: 2311 movs r3, #17 800172c: 61bb str r3, [r7, #24] Timing.AccessMode = FSMC_ACCESS_MODE_A; 800172e: 2300 movs r3, #0 8001730: 61fb str r3, [r7, #28] /* ExtTiming */ if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK) 8001732: 1d3b adds r3, r7, #4 8001734: 2200 movs r2, #0 8001736: 4619 mov r1, r3 8001738: 4808 ldr r0, [pc, #32] ; (800175c ) 800173a: f002 fa99 bl 8003c70 800173e: 4603 mov r3, r0 8001740: 2b00 cmp r3, #0 8001742: d001 beq.n 8001748 { Error_Handler( ); 8001744: f000 f810 bl 8001768 } /** Disconnect NADV */ __HAL_AFIO_FSMCNADV_DISCONNECTED(); 8001748: 4b06 ldr r3, [pc, #24] ; (8001764 ) 800174a: 69db ldr r3, [r3, #28] 800174c: 4a05 ldr r2, [pc, #20] ; (8001764 ) 800174e: f443 6380 orr.w r3, r3, #1024 ; 0x400 8001752: 61d3 str r3, [r2, #28] /* USER CODE BEGIN FSMC_Init 2 */ /* USER CODE END FSMC_Init 2 */ } 8001754: bf00 nop 8001756: 3720 adds r7, #32 8001758: 46bd mov sp, r7 800175a: bd80 pop {r7, pc} 800175c: 2000032c .word 0x2000032c 8001760: a0000104 .word 0xa0000104 8001764: 40010000 .word 0x40010000 08001768 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8001768: b480 push {r7} 800176a: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 800176c: b672 cpsid i } 800176e: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8001770: e7fe b.n 8001770 ... 08001774 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8001774: b480 push {r7} 8001776: b085 sub sp, #20 8001778: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 800177a: 4b15 ldr r3, [pc, #84] ; (80017d0 ) 800177c: 699b ldr r3, [r3, #24] 800177e: 4a14 ldr r2, [pc, #80] ; (80017d0 ) 8001780: f043 0301 orr.w r3, r3, #1 8001784: 6193 str r3, [r2, #24] 8001786: 4b12 ldr r3, [pc, #72] ; (80017d0 ) 8001788: 699b ldr r3, [r3, #24] 800178a: f003 0301 and.w r3, r3, #1 800178e: 60bb str r3, [r7, #8] 8001790: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 8001792: 4b0f ldr r3, [pc, #60] ; (80017d0 ) 8001794: 69db ldr r3, [r3, #28] 8001796: 4a0e ldr r2, [pc, #56] ; (80017d0 ) 8001798: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 800179c: 61d3 str r3, [r2, #28] 800179e: 4b0c ldr r3, [pc, #48] ; (80017d0 ) 80017a0: 69db ldr r3, [r3, #28] 80017a2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 80017a6: 607b str r3, [r7, #4] 80017a8: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 80017aa: 4b0a ldr r3, [pc, #40] ; (80017d4 ) 80017ac: 685b ldr r3, [r3, #4] 80017ae: 60fb str r3, [r7, #12] 80017b0: 68fb ldr r3, [r7, #12] 80017b2: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 80017b6: 60fb str r3, [r7, #12] 80017b8: 68fb ldr r3, [r7, #12] 80017ba: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 80017be: 60fb str r3, [r7, #12] 80017c0: 4a04 ldr r2, [pc, #16] ; (80017d4 ) 80017c2: 68fb ldr r3, [r7, #12] 80017c4: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 80017c6: bf00 nop 80017c8: 3714 adds r7, #20 80017ca: 46bd mov sp, r7 80017cc: bc80 pop {r7} 80017ce: 4770 bx lr 80017d0: 40021000 .word 0x40021000 80017d4: 40010000 .word 0x40010000 080017d8 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 80017d8: b580 push {r7, lr} 80017da: b088 sub sp, #32 80017dc: af00 add r7, sp, #0 80017de: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 80017e0: f107 0310 add.w r3, r7, #16 80017e4: 2200 movs r2, #0 80017e6: 601a str r2, [r3, #0] 80017e8: 605a str r2, [r3, #4] 80017ea: 609a str r2, [r3, #8] 80017ec: 60da str r2, [r3, #12] if(hi2c->Instance==I2C2) 80017ee: 687b ldr r3, [r7, #4] 80017f0: 681b ldr r3, [r3, #0] 80017f2: 4a16 ldr r2, [pc, #88] ; (800184c ) 80017f4: 4293 cmp r3, r2 80017f6: d124 bne.n 8001842 { /* USER CODE BEGIN I2C2_MspInit 0 */ /* USER CODE END I2C2_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 80017f8: 4b15 ldr r3, [pc, #84] ; (8001850 ) 80017fa: 699b ldr r3, [r3, #24] 80017fc: 4a14 ldr r2, [pc, #80] ; (8001850 ) 80017fe: f043 0308 orr.w r3, r3, #8 8001802: 6193 str r3, [r2, #24] 8001804: 4b12 ldr r3, [pc, #72] ; (8001850 ) 8001806: 699b ldr r3, [r3, #24] 8001808: f003 0308 and.w r3, r3, #8 800180c: 60fb str r3, [r7, #12] 800180e: 68fb ldr r3, [r7, #12] /**I2C2 GPIO Configuration PB10 ------> I2C2_SCL PB11 ------> I2C2_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; 8001810: f44f 6340 mov.w r3, #3072 ; 0xc00 8001814: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 8001816: 2312 movs r3, #18 8001818: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800181a: 2303 movs r3, #3 800181c: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800181e: f107 0310 add.w r3, r7, #16 8001822: 4619 mov r1, r3 8001824: 480b ldr r0, [pc, #44] ; (8001854 ) 8001826: f000 fbd5 bl 8001fd4 /* Peripheral clock enable */ __HAL_RCC_I2C2_CLK_ENABLE(); 800182a: 4b09 ldr r3, [pc, #36] ; (8001850 ) 800182c: 69db ldr r3, [r3, #28] 800182e: 4a08 ldr r2, [pc, #32] ; (8001850 ) 8001830: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 8001834: 61d3 str r3, [r2, #28] 8001836: 4b06 ldr r3, [pc, #24] ; (8001850 ) 8001838: 69db ldr r3, [r3, #28] 800183a: f403 0380 and.w r3, r3, #4194304 ; 0x400000 800183e: 60bb str r3, [r7, #8] 8001840: 68bb ldr r3, [r7, #8] /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } 8001842: bf00 nop 8001844: 3720 adds r7, #32 8001846: 46bd mov sp, r7 8001848: bd80 pop {r7, pc} 800184a: bf00 nop 800184c: 40005800 .word 0x40005800 8001850: 40021000 .word 0x40021000 8001854: 40010c00 .word 0x40010c00 08001858 : * This function configures the hardware resources used in this example * @param hspi: SPI handle pointer * @retval None */ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) { 8001858: b580 push {r7, lr} 800185a: b088 sub sp, #32 800185c: af00 add r7, sp, #0 800185e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001860: f107 0310 add.w r3, r7, #16 8001864: 2200 movs r2, #0 8001866: 601a str r2, [r3, #0] 8001868: 605a str r2, [r3, #4] 800186a: 609a str r2, [r3, #8] 800186c: 60da str r2, [r3, #12] if(hspi->Instance==SPI1) 800186e: 687b ldr r3, [r7, #4] 8001870: 681b ldr r3, [r3, #0] 8001872: 4a1b ldr r2, [pc, #108] ; (80018e0 ) 8001874: 4293 cmp r3, r2 8001876: d12f bne.n 80018d8 { /* USER CODE BEGIN SPI1_MspInit 0 */ /* USER CODE END SPI1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_SPI1_CLK_ENABLE(); 8001878: 4b1a ldr r3, [pc, #104] ; (80018e4 ) 800187a: 699b ldr r3, [r3, #24] 800187c: 4a19 ldr r2, [pc, #100] ; (80018e4 ) 800187e: f443 5380 orr.w r3, r3, #4096 ; 0x1000 8001882: 6193 str r3, [r2, #24] 8001884: 4b17 ldr r3, [pc, #92] ; (80018e4 ) 8001886: 699b ldr r3, [r3, #24] 8001888: f403 5380 and.w r3, r3, #4096 ; 0x1000 800188c: 60fb str r3, [r7, #12] 800188e: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001890: 4b14 ldr r3, [pc, #80] ; (80018e4 ) 8001892: 699b ldr r3, [r3, #24] 8001894: 4a13 ldr r2, [pc, #76] ; (80018e4 ) 8001896: f043 0304 orr.w r3, r3, #4 800189a: 6193 str r3, [r2, #24] 800189c: 4b11 ldr r3, [pc, #68] ; (80018e4 ) 800189e: 699b ldr r3, [r3, #24] 80018a0: f003 0304 and.w r3, r3, #4 80018a4: 60bb str r3, [r7, #8] 80018a6: 68bb ldr r3, [r7, #8] /**SPI1 GPIO Configuration PA5 ------> SPI1_SCK PA6 ------> SPI1_MISO PA7 ------> SPI1_MOSI */ GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_7; 80018a8: 23a0 movs r3, #160 ; 0xa0 80018aa: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80018ac: 2302 movs r3, #2 80018ae: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80018b0: 2303 movs r3, #3 80018b2: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80018b4: f107 0310 add.w r3, r7, #16 80018b8: 4619 mov r1, r3 80018ba: 480b ldr r0, [pc, #44] ; (80018e8 ) 80018bc: f000 fb8a bl 8001fd4 GPIO_InitStruct.Pin = GPIO_PIN_6; 80018c0: 2340 movs r3, #64 ; 0x40 80018c2: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80018c4: 2300 movs r3, #0 80018c6: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 80018c8: 2300 movs r3, #0 80018ca: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80018cc: f107 0310 add.w r3, r7, #16 80018d0: 4619 mov r1, r3 80018d2: 4805 ldr r0, [pc, #20] ; (80018e8 ) 80018d4: f000 fb7e bl 8001fd4 /* USER CODE BEGIN SPI1_MspInit 1 */ /* USER CODE END SPI1_MspInit 1 */ } } 80018d8: bf00 nop 80018da: 3720 adds r7, #32 80018dc: 46bd mov sp, r7 80018de: bd80 pop {r7, pc} 80018e0: 40013000 .word 0x40013000 80018e4: 40021000 .word 0x40021000 80018e8: 40010800 .word 0x40010800 080018ec : * This function configures the hardware resources used in this example * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { 80018ec: b580 push {r7, lr} 80018ee: b084 sub sp, #16 80018f0: af00 add r7, sp, #0 80018f2: 6078 str r0, [r7, #4] if(htim_base->Instance==TIM4) 80018f4: 687b ldr r3, [r7, #4] 80018f6: 681b ldr r3, [r3, #0] 80018f8: 4a1a ldr r2, [pc, #104] ; (8001964 ) 80018fa: 4293 cmp r3, r2 80018fc: d114 bne.n 8001928 { /* USER CODE BEGIN TIM4_MspInit 0 */ /* USER CODE END TIM4_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM4_CLK_ENABLE(); 80018fe: 4b1a ldr r3, [pc, #104] ; (8001968 ) 8001900: 69db ldr r3, [r3, #28] 8001902: 4a19 ldr r2, [pc, #100] ; (8001968 ) 8001904: f043 0304 orr.w r3, r3, #4 8001908: 61d3 str r3, [r2, #28] 800190a: 4b17 ldr r3, [pc, #92] ; (8001968 ) 800190c: 69db ldr r3, [r3, #28] 800190e: f003 0304 and.w r3, r3, #4 8001912: 60fb str r3, [r7, #12] 8001914: 68fb ldr r3, [r7, #12] /* TIM4 interrupt Init */ HAL_NVIC_SetPriority(TIM4_IRQn, 0, 0); 8001916: 2200 movs r2, #0 8001918: 2100 movs r1, #0 800191a: 201e movs r0, #30 800191c: f000 fb23 bl 8001f66 HAL_NVIC_EnableIRQ(TIM4_IRQn); 8001920: 201e movs r0, #30 8001922: f000 fb3c bl 8001f9e /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 8001926: e018 b.n 800195a else if(htim_base->Instance==TIM6) 8001928: 687b ldr r3, [r7, #4] 800192a: 681b ldr r3, [r3, #0] 800192c: 4a0f ldr r2, [pc, #60] ; (800196c ) 800192e: 4293 cmp r3, r2 8001930: d113 bne.n 800195a __HAL_RCC_TIM6_CLK_ENABLE(); 8001932: 4b0d ldr r3, [pc, #52] ; (8001968 ) 8001934: 69db ldr r3, [r3, #28] 8001936: 4a0c ldr r2, [pc, #48] ; (8001968 ) 8001938: f043 0310 orr.w r3, r3, #16 800193c: 61d3 str r3, [r2, #28] 800193e: 4b0a ldr r3, [pc, #40] ; (8001968 ) 8001940: 69db ldr r3, [r3, #28] 8001942: f003 0310 and.w r3, r3, #16 8001946: 60bb str r3, [r7, #8] 8001948: 68bb ldr r3, [r7, #8] HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 800194a: 2200 movs r2, #0 800194c: 2100 movs r1, #0 800194e: 2036 movs r0, #54 ; 0x36 8001950: f000 fb09 bl 8001f66 HAL_NVIC_EnableIRQ(TIM6_IRQn); 8001954: 2036 movs r0, #54 ; 0x36 8001956: f000 fb22 bl 8001f9e } 800195a: bf00 nop 800195c: 3710 adds r7, #16 800195e: 46bd mov sp, r7 8001960: bd80 pop {r7, pc} 8001962: bf00 nop 8001964: 40000800 .word 0x40000800 8001968: 40021000 .word 0x40021000 800196c: 40001000 .word 0x40001000 08001970 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) { 8001970: b580 push {r7, lr} 8001972: b088 sub sp, #32 8001974: af00 add r7, sp, #0 8001976: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001978: f107 0310 add.w r3, r7, #16 800197c: 2200 movs r2, #0 800197e: 601a str r2, [r3, #0] 8001980: 605a str r2, [r3, #4] 8001982: 609a str r2, [r3, #8] 8001984: 60da str r2, [r3, #12] if(htim->Instance==TIM4) 8001986: 687b ldr r3, [r7, #4] 8001988: 681b ldr r3, [r3, #0] 800198a: 4a10 ldr r2, [pc, #64] ; (80019cc ) 800198c: 4293 cmp r3, r2 800198e: d118 bne.n 80019c2 { /* USER CODE BEGIN TIM4_MspPostInit 0 */ /* USER CODE END TIM4_MspPostInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 8001990: 4b0f ldr r3, [pc, #60] ; (80019d0 ) 8001992: 699b ldr r3, [r3, #24] 8001994: 4a0e ldr r2, [pc, #56] ; (80019d0 ) 8001996: f043 0308 orr.w r3, r3, #8 800199a: 6193 str r3, [r2, #24] 800199c: 4b0c ldr r3, [pc, #48] ; (80019d0 ) 800199e: 699b ldr r3, [r3, #24] 80019a0: f003 0308 and.w r3, r3, #8 80019a4: 60fb str r3, [r7, #12] 80019a6: 68fb ldr r3, [r7, #12] /**TIM4 GPIO Configuration PB8 ------> TIM4_CH3 */ GPIO_InitStruct.Pin = GPIO_PIN_8; 80019a8: f44f 7380 mov.w r3, #256 ; 0x100 80019ac: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80019ae: 2302 movs r3, #2 80019b0: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80019b2: 2302 movs r3, #2 80019b4: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80019b6: f107 0310 add.w r3, r7, #16 80019ba: 4619 mov r1, r3 80019bc: 4805 ldr r0, [pc, #20] ; (80019d4 ) 80019be: f000 fb09 bl 8001fd4 /* USER CODE BEGIN TIM4_MspPostInit 1 */ /* USER CODE END TIM4_MspPostInit 1 */ } } 80019c2: bf00 nop 80019c4: 3720 adds r7, #32 80019c6: 46bd mov sp, r7 80019c8: bd80 pop {r7, pc} 80019ca: bf00 nop 80019cc: 40000800 .word 0x40000800 80019d0: 40021000 .word 0x40021000 80019d4: 40010c00 .word 0x40010c00 080019d8 : } static uint32_t FSMC_Initialized = 0; static void HAL_FSMC_MspInit(void){ 80019d8: b580 push {r7, lr} 80019da: b086 sub sp, #24 80019dc: af00 add r7, sp, #0 /* USER CODE BEGIN FSMC_MspInit 0 */ /* USER CODE END FSMC_MspInit 0 */ GPIO_InitTypeDef GPIO_InitStruct ={0}; 80019de: f107 0308 add.w r3, r7, #8 80019e2: 2200 movs r2, #0 80019e4: 601a str r2, [r3, #0] 80019e6: 605a str r2, [r3, #4] 80019e8: 609a str r2, [r3, #8] 80019ea: 60da str r2, [r3, #12] if (FSMC_Initialized) { 80019ec: 4b1f ldr r3, [pc, #124] ; (8001a6c ) 80019ee: 681b ldr r3, [r3, #0] 80019f0: 2b00 cmp r3, #0 80019f2: d136 bne.n 8001a62 return; } FSMC_Initialized = 1; 80019f4: 4b1d ldr r3, [pc, #116] ; (8001a6c ) 80019f6: 2201 movs r2, #1 80019f8: 601a str r2, [r3, #0] /* Peripheral clock enable */ __HAL_RCC_FSMC_CLK_ENABLE(); 80019fa: 4b1d ldr r3, [pc, #116] ; (8001a70 ) 80019fc: 695b ldr r3, [r3, #20] 80019fe: 4a1c ldr r2, [pc, #112] ; (8001a70 ) 8001a00: f443 7380 orr.w r3, r3, #256 ; 0x100 8001a04: 6153 str r3, [r2, #20] 8001a06: 4b1a ldr r3, [pc, #104] ; (8001a70 ) 8001a08: 695b ldr r3, [r3, #20] 8001a0a: f403 7380 and.w r3, r3, #256 ; 0x100 8001a0e: 607b str r3, [r7, #4] 8001a10: 687b ldr r3, [r7, #4] PD1 ------> FSMC_D3 PD4 ------> FSMC_NOE PD5 ------> FSMC_NWE PG12 ------> FSMC_NE4 */ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_12; 8001a12: f241 0301 movw r3, #4097 ; 0x1001 8001a16: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001a18: 2302 movs r3, #2 8001a1a: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001a1c: 2303 movs r3, #3 8001a1e: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8001a20: f107 0308 add.w r3, r7, #8 8001a24: 4619 mov r1, r3 8001a26: 4813 ldr r0, [pc, #76] ; (8001a74 ) 8001a28: f000 fad4 bl 8001fd4 GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10 8001a2c: f64f 7380 movw r3, #65408 ; 0xff80 8001a30: 60bb str r3, [r7, #8] |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14 |GPIO_PIN_15; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001a32: 2302 movs r3, #2 8001a34: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001a36: 2303 movs r3, #3 8001a38: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8001a3a: f107 0308 add.w r3, r7, #8 8001a3e: 4619 mov r1, r3 8001a40: 480d ldr r0, [pc, #52] ; (8001a78 ) 8001a42: f000 fac7 bl 8001fd4 GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14 8001a46: f24c 7333 movw r3, #50995 ; 0xc733 8001a4a: 60bb str r3, [r7, #8] |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4 |GPIO_PIN_5; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001a4c: 2302 movs r3, #2 8001a4e: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001a50: 2303 movs r3, #3 8001a52: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8001a54: f107 0308 add.w r3, r7, #8 8001a58: 4619 mov r1, r3 8001a5a: 4808 ldr r0, [pc, #32] ; (8001a7c ) 8001a5c: f000 faba bl 8001fd4 8001a60: e000 b.n 8001a64 return; 8001a62: bf00 nop /* USER CODE BEGIN FSMC_MspInit 1 */ /* USER CODE END FSMC_MspInit 1 */ } 8001a64: 3718 adds r7, #24 8001a66: 46bd mov sp, r7 8001a68: bd80 pop {r7, pc} 8001a6a: bf00 nop 8001a6c: 20000374 .word 0x20000374 8001a70: 40021000 .word 0x40021000 8001a74: 40012000 .word 0x40012000 8001a78: 40011800 .word 0x40011800 8001a7c: 40011400 .word 0x40011400 08001a80 : void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){ 8001a80: b580 push {r7, lr} 8001a82: b082 sub sp, #8 8001a84: af00 add r7, sp, #0 8001a86: 6078 str r0, [r7, #4] /* USER CODE BEGIN SRAM_MspInit 0 */ /* USER CODE END SRAM_MspInit 0 */ HAL_FSMC_MspInit(); 8001a88: f7ff ffa6 bl 80019d8 /* USER CODE BEGIN SRAM_MspInit 1 */ /* USER CODE END SRAM_MspInit 1 */ } 8001a8c: bf00 nop 8001a8e: 3708 adds r7, #8 8001a90: 46bd mov sp, r7 8001a92: bd80 pop {r7, pc} 08001a94 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 8001a94: b480 push {r7} 8001a96: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8001a98: e7fe b.n 8001a98 08001a9a : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8001a9a: b480 push {r7} 8001a9c: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 8001a9e: e7fe b.n 8001a9e 08001aa0 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8001aa0: b480 push {r7} 8001aa2: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8001aa4: e7fe b.n 8001aa4 08001aa6 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8001aa6: b480 push {r7} 8001aa8: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 8001aaa: e7fe b.n 8001aaa 08001aac : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8001aac: b480 push {r7} 8001aae: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8001ab0: e7fe b.n 8001ab0 08001ab2 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 8001ab2: b480 push {r7} 8001ab4: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 8001ab6: bf00 nop 8001ab8: 46bd mov sp, r7 8001aba: bc80 pop {r7} 8001abc: 4770 bx lr 08001abe : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8001abe: b480 push {r7} 8001ac0: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 8001ac2: bf00 nop 8001ac4: 46bd mov sp, r7 8001ac6: bc80 pop {r7} 8001ac8: 4770 bx lr 08001aca : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8001aca: b480 push {r7} 8001acc: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 8001ace: bf00 nop 8001ad0: 46bd mov sp, r7 8001ad2: bc80 pop {r7} 8001ad4: 4770 bx lr 08001ad6 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 8001ad6: b580 push {r7, lr} 8001ad8: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8001ada: f000 f92d bl 8001d38 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 8001ade: bf00 nop 8001ae0: bd80 pop {r7, pc} ... 08001ae4 : /** * @brief This function handles TIM4 global interrupt. */ void TIM4_IRQHandler(void) { 8001ae4: b580 push {r7, lr} 8001ae6: af00 add r7, sp, #0 /* USER CODE BEGIN TIM4_IRQn 0 */ /* USER CODE END TIM4_IRQn 0 */ HAL_TIM_IRQHandler(&htim4); 8001ae8: 4802 ldr r0, [pc, #8] ; (8001af4 ) 8001aea: f002 fa9d bl 8004028 /* USER CODE BEGIN TIM4_IRQn 1 */ /* USER CODE END TIM4_IRQn 1 */ } 8001aee: bf00 nop 8001af0: bd80 pop {r7, pc} 8001af2: bf00 nop 8001af4: 2000029c .word 0x2000029c 08001af8 : /** * @brief This function handles TIM6 global interrupt. */ void TIM6_IRQHandler(void) { 8001af8: b580 push {r7, lr} 8001afa: af00 add r7, sp, #0 /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8001afc: 4802 ldr r0, [pc, #8] ; (8001b08 ) 8001afe: f002 fa93 bl 8004028 /* USER CODE BEGIN TIM6_IRQn 1 */ /* USER CODE END TIM6_IRQn 1 */ } 8001b02: bf00 nop 8001b04: bd80 pop {r7, pc} 8001b06: bf00 nop 8001b08: 200002e4 .word 0x200002e4 08001b0c <_getpid>: void initialise_monitor_handles() { } int _getpid(void) { 8001b0c: b480 push {r7} 8001b0e: af00 add r7, sp, #0 return 1; 8001b10: 2301 movs r3, #1 } 8001b12: 4618 mov r0, r3 8001b14: 46bd mov sp, r7 8001b16: bc80 pop {r7} 8001b18: 4770 bx lr 08001b1a <_kill>: int _kill(int pid, int sig) { 8001b1a: b580 push {r7, lr} 8001b1c: b082 sub sp, #8 8001b1e: af00 add r7, sp, #0 8001b20: 6078 str r0, [r7, #4] 8001b22: 6039 str r1, [r7, #0] errno = EINVAL; 8001b24: f006 faf0 bl 8008108 <__errno> 8001b28: 4603 mov r3, r0 8001b2a: 2216 movs r2, #22 8001b2c: 601a str r2, [r3, #0] return -1; 8001b2e: f04f 33ff mov.w r3, #4294967295 } 8001b32: 4618 mov r0, r3 8001b34: 3708 adds r7, #8 8001b36: 46bd mov sp, r7 8001b38: bd80 pop {r7, pc} 08001b3a <_exit>: void _exit (int status) { 8001b3a: b580 push {r7, lr} 8001b3c: b082 sub sp, #8 8001b3e: af00 add r7, sp, #0 8001b40: 6078 str r0, [r7, #4] _kill(status, -1); 8001b42: f04f 31ff mov.w r1, #4294967295 8001b46: 6878 ldr r0, [r7, #4] 8001b48: f7ff ffe7 bl 8001b1a <_kill> while (1) {} /* Make sure we hang here */ 8001b4c: e7fe b.n 8001b4c <_exit+0x12> 08001b4e <_read>: } __attribute__((weak)) int _read(int file, char *ptr, int len) { 8001b4e: b580 push {r7, lr} 8001b50: b086 sub sp, #24 8001b52: af00 add r7, sp, #0 8001b54: 60f8 str r0, [r7, #12] 8001b56: 60b9 str r1, [r7, #8] 8001b58: 607a str r2, [r7, #4] int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8001b5a: 2300 movs r3, #0 8001b5c: 617b str r3, [r7, #20] 8001b5e: e00a b.n 8001b76 <_read+0x28> { *ptr++ = __io_getchar(); 8001b60: f3af 8000 nop.w 8001b64: 4601 mov r1, r0 8001b66: 68bb ldr r3, [r7, #8] 8001b68: 1c5a adds r2, r3, #1 8001b6a: 60ba str r2, [r7, #8] 8001b6c: b2ca uxtb r2, r1 8001b6e: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) 8001b70: 697b ldr r3, [r7, #20] 8001b72: 3301 adds r3, #1 8001b74: 617b str r3, [r7, #20] 8001b76: 697a ldr r2, [r7, #20] 8001b78: 687b ldr r3, [r7, #4] 8001b7a: 429a cmp r2, r3 8001b7c: dbf0 blt.n 8001b60 <_read+0x12> } return len; 8001b7e: 687b ldr r3, [r7, #4] } 8001b80: 4618 mov r0, r3 8001b82: 3718 adds r7, #24 8001b84: 46bd mov sp, r7 8001b86: bd80 pop {r7, pc} 08001b88 <_close>: } return len; } int _close(int file) { 8001b88: b480 push {r7} 8001b8a: b083 sub sp, #12 8001b8c: af00 add r7, sp, #0 8001b8e: 6078 str r0, [r7, #4] return -1; 8001b90: f04f 33ff mov.w r3, #4294967295 } 8001b94: 4618 mov r0, r3 8001b96: 370c adds r7, #12 8001b98: 46bd mov sp, r7 8001b9a: bc80 pop {r7} 8001b9c: 4770 bx lr 08001b9e <_fstat>: int _fstat(int file, struct stat *st) { 8001b9e: b480 push {r7} 8001ba0: b083 sub sp, #12 8001ba2: af00 add r7, sp, #0 8001ba4: 6078 str r0, [r7, #4] 8001ba6: 6039 str r1, [r7, #0] st->st_mode = S_IFCHR; 8001ba8: 683b ldr r3, [r7, #0] 8001baa: f44f 5200 mov.w r2, #8192 ; 0x2000 8001bae: 605a str r2, [r3, #4] return 0; 8001bb0: 2300 movs r3, #0 } 8001bb2: 4618 mov r0, r3 8001bb4: 370c adds r7, #12 8001bb6: 46bd mov sp, r7 8001bb8: bc80 pop {r7} 8001bba: 4770 bx lr 08001bbc <_isatty>: int _isatty(int file) { 8001bbc: b480 push {r7} 8001bbe: b083 sub sp, #12 8001bc0: af00 add r7, sp, #0 8001bc2: 6078 str r0, [r7, #4] return 1; 8001bc4: 2301 movs r3, #1 } 8001bc6: 4618 mov r0, r3 8001bc8: 370c adds r7, #12 8001bca: 46bd mov sp, r7 8001bcc: bc80 pop {r7} 8001bce: 4770 bx lr 08001bd0 <_lseek>: int _lseek(int file, int ptr, int dir) { 8001bd0: b480 push {r7} 8001bd2: b085 sub sp, #20 8001bd4: af00 add r7, sp, #0 8001bd6: 60f8 str r0, [r7, #12] 8001bd8: 60b9 str r1, [r7, #8] 8001bda: 607a str r2, [r7, #4] return 0; 8001bdc: 2300 movs r3, #0 } 8001bde: 4618 mov r0, r3 8001be0: 3714 adds r7, #20 8001be2: 46bd mov sp, r7 8001be4: bc80 pop {r7} 8001be6: 4770 bx lr 08001be8 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 8001be8: b580 push {r7, lr} 8001bea: b086 sub sp, #24 8001bec: af00 add r7, sp, #0 8001bee: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 8001bf0: 4a14 ldr r2, [pc, #80] ; (8001c44 <_sbrk+0x5c>) 8001bf2: 4b15 ldr r3, [pc, #84] ; (8001c48 <_sbrk+0x60>) 8001bf4: 1ad3 subs r3, r2, r3 8001bf6: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 8001bf8: 697b ldr r3, [r7, #20] 8001bfa: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 8001bfc: 4b13 ldr r3, [pc, #76] ; (8001c4c <_sbrk+0x64>) 8001bfe: 681b ldr r3, [r3, #0] 8001c00: 2b00 cmp r3, #0 8001c02: d102 bne.n 8001c0a <_sbrk+0x22> { __sbrk_heap_end = &_end; 8001c04: 4b11 ldr r3, [pc, #68] ; (8001c4c <_sbrk+0x64>) 8001c06: 4a12 ldr r2, [pc, #72] ; (8001c50 <_sbrk+0x68>) 8001c08: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 8001c0a: 4b10 ldr r3, [pc, #64] ; (8001c4c <_sbrk+0x64>) 8001c0c: 681a ldr r2, [r3, #0] 8001c0e: 687b ldr r3, [r7, #4] 8001c10: 4413 add r3, r2 8001c12: 693a ldr r2, [r7, #16] 8001c14: 429a cmp r2, r3 8001c16: d207 bcs.n 8001c28 <_sbrk+0x40> { errno = ENOMEM; 8001c18: f006 fa76 bl 8008108 <__errno> 8001c1c: 4603 mov r3, r0 8001c1e: 220c movs r2, #12 8001c20: 601a str r2, [r3, #0] return (void *)-1; 8001c22: f04f 33ff mov.w r3, #4294967295 8001c26: e009 b.n 8001c3c <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 8001c28: 4b08 ldr r3, [pc, #32] ; (8001c4c <_sbrk+0x64>) 8001c2a: 681b ldr r3, [r3, #0] 8001c2c: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 8001c2e: 4b07 ldr r3, [pc, #28] ; (8001c4c <_sbrk+0x64>) 8001c30: 681a ldr r2, [r3, #0] 8001c32: 687b ldr r3, [r7, #4] 8001c34: 4413 add r3, r2 8001c36: 4a05 ldr r2, [pc, #20] ; (8001c4c <_sbrk+0x64>) 8001c38: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 8001c3a: 68fb ldr r3, [r7, #12] } 8001c3c: 4618 mov r0, r3 8001c3e: 3718 adds r7, #24 8001c40: 46bd mov sp, r7 8001c42: bd80 pop {r7, pc} 8001c44: 20010000 .word 0x20010000 8001c48: 00000800 .word 0x00000800 8001c4c: 20000378 .word 0x20000378 8001c50: 20002660 .word 0x20002660 08001c54 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 8001c54: b480 push {r7} 8001c56: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 8001c58: bf00 nop 8001c5a: 46bd mov sp, r7 8001c5c: bc80 pop {r7} 8001c5e: 4770 bx lr 08001c60 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 8001c60: 480c ldr r0, [pc, #48] ; (8001c94 ) ldr r1, =_edata 8001c62: 490d ldr r1, [pc, #52] ; (8001c98 ) ldr r2, =_sidata 8001c64: 4a0d ldr r2, [pc, #52] ; (8001c9c ) movs r3, #0 8001c66: 2300 movs r3, #0 b LoopCopyDataInit 8001c68: e002 b.n 8001c70 08001c6a : CopyDataInit: ldr r4, [r2, r3] 8001c6a: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 8001c6c: 50c4 str r4, [r0, r3] adds r3, r3, #4 8001c6e: 3304 adds r3, #4 08001c70 : LoopCopyDataInit: adds r4, r0, r3 8001c70: 18c4 adds r4, r0, r3 cmp r4, r1 8001c72: 428c cmp r4, r1 bcc CopyDataInit 8001c74: d3f9 bcc.n 8001c6a /* Zero fill the bss segment. */ ldr r2, =_sbss 8001c76: 4a0a ldr r2, [pc, #40] ; (8001ca0 ) ldr r4, =_ebss 8001c78: 4c0a ldr r4, [pc, #40] ; (8001ca4 ) movs r3, #0 8001c7a: 2300 movs r3, #0 b LoopFillZerobss 8001c7c: e001 b.n 8001c82 08001c7e : FillZerobss: str r3, [r2] 8001c7e: 6013 str r3, [r2, #0] adds r2, r2, #4 8001c80: 3204 adds r2, #4 08001c82 : LoopFillZerobss: cmp r2, r4 8001c82: 42a2 cmp r2, r4 bcc FillZerobss 8001c84: d3fb bcc.n 8001c7e /* Call the clock system intitialization function.*/ bl SystemInit 8001c86: f7ff ffe5 bl 8001c54 /* Call static constructors */ bl __libc_init_array 8001c8a: f006 fa43 bl 8008114 <__libc_init_array> /* Call the application's entry point.*/ bl main 8001c8e: f7ff fa9f bl 80011d0
bx lr 8001c92: 4770 bx lr ldr r0, =_sdata 8001c94: 20000000 .word 0x20000000 ldr r1, =_edata 8001c98: 200001d4 .word 0x200001d4 ldr r2, =_sidata 8001c9c: 0800ae7c .word 0x0800ae7c ldr r2, =_sbss 8001ca0: 200001d4 .word 0x200001d4 ldr r4, =_ebss 8001ca4: 20002660 .word 0x20002660 08001ca8 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8001ca8: e7fe b.n 8001ca8 ... 08001cac : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8001cac: b580 push {r7, lr} 8001cae: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8001cb0: 4b08 ldr r3, [pc, #32] ; (8001cd4 ) 8001cb2: 681b ldr r3, [r3, #0] 8001cb4: 4a07 ldr r2, [pc, #28] ; (8001cd4 ) 8001cb6: f043 0310 orr.w r3, r3, #16 8001cba: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8001cbc: 2003 movs r0, #3 8001cbe: f000 f947 bl 8001f50 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 8001cc2: 200f movs r0, #15 8001cc4: f000 f808 bl 8001cd8 /* Init the low level hardware */ HAL_MspInit(); 8001cc8: f7ff fd54 bl 8001774 /* Return function status */ return HAL_OK; 8001ccc: 2300 movs r3, #0 } 8001cce: 4618 mov r0, r3 8001cd0: bd80 pop {r7, pc} 8001cd2: bf00 nop 8001cd4: 40022000 .word 0x40022000 08001cd8 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8001cd8: b580 push {r7, lr} 8001cda: b082 sub sp, #8 8001cdc: af00 add r7, sp, #0 8001cde: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8001ce0: 4b12 ldr r3, [pc, #72] ; (8001d2c ) 8001ce2: 681a ldr r2, [r3, #0] 8001ce4: 4b12 ldr r3, [pc, #72] ; (8001d30 ) 8001ce6: 781b ldrb r3, [r3, #0] 8001ce8: 4619 mov r1, r3 8001cea: f44f 737a mov.w r3, #1000 ; 0x3e8 8001cee: fbb3 f3f1 udiv r3, r3, r1 8001cf2: fbb2 f3f3 udiv r3, r2, r3 8001cf6: 4618 mov r0, r3 8001cf8: f000 f95f bl 8001fba 8001cfc: 4603 mov r3, r0 8001cfe: 2b00 cmp r3, #0 8001d00: d001 beq.n 8001d06 { return HAL_ERROR; 8001d02: 2301 movs r3, #1 8001d04: e00e b.n 8001d24 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 8001d06: 687b ldr r3, [r7, #4] 8001d08: 2b0f cmp r3, #15 8001d0a: d80a bhi.n 8001d22 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8001d0c: 2200 movs r2, #0 8001d0e: 6879 ldr r1, [r7, #4] 8001d10: f04f 30ff mov.w r0, #4294967295 8001d14: f000 f927 bl 8001f66 uwTickPrio = TickPriority; 8001d18: 4a06 ldr r2, [pc, #24] ; (8001d34 ) 8001d1a: 687b ldr r3, [r7, #4] 8001d1c: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 8001d1e: 2300 movs r3, #0 8001d20: e000 b.n 8001d24 return HAL_ERROR; 8001d22: 2301 movs r3, #1 } 8001d24: 4618 mov r0, r3 8001d26: 3708 adds r7, #8 8001d28: 46bd mov sp, r7 8001d2a: bd80 pop {r7, pc} 8001d2c: 20000000 .word 0x20000000 8001d30: 20000008 .word 0x20000008 8001d34: 20000004 .word 0x20000004 08001d38 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8001d38: b480 push {r7} 8001d3a: af00 add r7, sp, #0 uwTick += uwTickFreq; 8001d3c: 4b05 ldr r3, [pc, #20] ; (8001d54 ) 8001d3e: 781b ldrb r3, [r3, #0] 8001d40: 461a mov r2, r3 8001d42: 4b05 ldr r3, [pc, #20] ; (8001d58 ) 8001d44: 681b ldr r3, [r3, #0] 8001d46: 4413 add r3, r2 8001d48: 4a03 ldr r2, [pc, #12] ; (8001d58 ) 8001d4a: 6013 str r3, [r2, #0] } 8001d4c: bf00 nop 8001d4e: 46bd mov sp, r7 8001d50: bc80 pop {r7} 8001d52: 4770 bx lr 8001d54: 20000008 .word 0x20000008 8001d58: 2000037c .word 0x2000037c 08001d5c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8001d5c: b480 push {r7} 8001d5e: af00 add r7, sp, #0 return uwTick; 8001d60: 4b02 ldr r3, [pc, #8] ; (8001d6c ) 8001d62: 681b ldr r3, [r3, #0] } 8001d64: 4618 mov r0, r3 8001d66: 46bd mov sp, r7 8001d68: bc80 pop {r7} 8001d6a: 4770 bx lr 8001d6c: 2000037c .word 0x2000037c 08001d70 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 8001d70: b580 push {r7, lr} 8001d72: b084 sub sp, #16 8001d74: af00 add r7, sp, #0 8001d76: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 8001d78: f7ff fff0 bl 8001d5c 8001d7c: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 8001d7e: 687b ldr r3, [r7, #4] 8001d80: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 8001d82: 68fb ldr r3, [r7, #12] 8001d84: f1b3 3fff cmp.w r3, #4294967295 8001d88: d005 beq.n 8001d96 { wait += (uint32_t)(uwTickFreq); 8001d8a: 4b0a ldr r3, [pc, #40] ; (8001db4 ) 8001d8c: 781b ldrb r3, [r3, #0] 8001d8e: 461a mov r2, r3 8001d90: 68fb ldr r3, [r7, #12] 8001d92: 4413 add r3, r2 8001d94: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 8001d96: bf00 nop 8001d98: f7ff ffe0 bl 8001d5c 8001d9c: 4602 mov r2, r0 8001d9e: 68bb ldr r3, [r7, #8] 8001da0: 1ad3 subs r3, r2, r3 8001da2: 68fa ldr r2, [r7, #12] 8001da4: 429a cmp r2, r3 8001da6: d8f7 bhi.n 8001d98 { } } 8001da8: bf00 nop 8001daa: bf00 nop 8001dac: 3710 adds r7, #16 8001dae: 46bd mov sp, r7 8001db0: bd80 pop {r7, pc} 8001db2: bf00 nop 8001db4: 20000008 .word 0x20000008 08001db8 <__NVIC_SetPriorityGrouping>: { 8001db8: b480 push {r7} 8001dba: b085 sub sp, #20 8001dbc: af00 add r7, sp, #0 8001dbe: 6078 str r0, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8001dc0: 687b ldr r3, [r7, #4] 8001dc2: f003 0307 and.w r3, r3, #7 8001dc6: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 8001dc8: 4b0c ldr r3, [pc, #48] ; (8001dfc <__NVIC_SetPriorityGrouping+0x44>) 8001dca: 68db ldr r3, [r3, #12] 8001dcc: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8001dce: 68ba ldr r2, [r7, #8] 8001dd0: f64f 03ff movw r3, #63743 ; 0xf8ff 8001dd4: 4013 ands r3, r2 8001dd6: 60bb str r3, [r7, #8] (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 8001dd8: 68fb ldr r3, [r7, #12] 8001dda: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8001ddc: 68bb ldr r3, [r7, #8] 8001dde: 4313 orrs r3, r2 reg_value = (reg_value | 8001de0: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 8001de4: f443 3300 orr.w r3, r3, #131072 ; 0x20000 8001de8: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 8001dea: 4a04 ldr r2, [pc, #16] ; (8001dfc <__NVIC_SetPriorityGrouping+0x44>) 8001dec: 68bb ldr r3, [r7, #8] 8001dee: 60d3 str r3, [r2, #12] } 8001df0: bf00 nop 8001df2: 3714 adds r7, #20 8001df4: 46bd mov sp, r7 8001df6: bc80 pop {r7} 8001df8: 4770 bx lr 8001dfa: bf00 nop 8001dfc: e000ed00 .word 0xe000ed00 08001e00 <__NVIC_GetPriorityGrouping>: { 8001e00: b480 push {r7} 8001e02: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8001e04: 4b04 ldr r3, [pc, #16] ; (8001e18 <__NVIC_GetPriorityGrouping+0x18>) 8001e06: 68db ldr r3, [r3, #12] 8001e08: 0a1b lsrs r3, r3, #8 8001e0a: f003 0307 and.w r3, r3, #7 } 8001e0e: 4618 mov r0, r3 8001e10: 46bd mov sp, r7 8001e12: bc80 pop {r7} 8001e14: 4770 bx lr 8001e16: bf00 nop 8001e18: e000ed00 .word 0xe000ed00 08001e1c <__NVIC_EnableIRQ>: { 8001e1c: b480 push {r7} 8001e1e: b083 sub sp, #12 8001e20: af00 add r7, sp, #0 8001e22: 4603 mov r3, r0 8001e24: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001e26: f997 3007 ldrsb.w r3, [r7, #7] 8001e2a: 2b00 cmp r3, #0 8001e2c: db0b blt.n 8001e46 <__NVIC_EnableIRQ+0x2a> NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8001e2e: 79fb ldrb r3, [r7, #7] 8001e30: f003 021f and.w r2, r3, #31 8001e34: 4906 ldr r1, [pc, #24] ; (8001e50 <__NVIC_EnableIRQ+0x34>) 8001e36: f997 3007 ldrsb.w r3, [r7, #7] 8001e3a: 095b lsrs r3, r3, #5 8001e3c: 2001 movs r0, #1 8001e3e: fa00 f202 lsl.w r2, r0, r2 8001e42: f841 2023 str.w r2, [r1, r3, lsl #2] } 8001e46: bf00 nop 8001e48: 370c adds r7, #12 8001e4a: 46bd mov sp, r7 8001e4c: bc80 pop {r7} 8001e4e: 4770 bx lr 8001e50: e000e100 .word 0xe000e100 08001e54 <__NVIC_SetPriority>: { 8001e54: b480 push {r7} 8001e56: b083 sub sp, #12 8001e58: af00 add r7, sp, #0 8001e5a: 4603 mov r3, r0 8001e5c: 6039 str r1, [r7, #0] 8001e5e: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001e60: f997 3007 ldrsb.w r3, [r7, #7] 8001e64: 2b00 cmp r3, #0 8001e66: db0a blt.n 8001e7e <__NVIC_SetPriority+0x2a> NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8001e68: 683b ldr r3, [r7, #0] 8001e6a: b2da uxtb r2, r3 8001e6c: 490c ldr r1, [pc, #48] ; (8001ea0 <__NVIC_SetPriority+0x4c>) 8001e6e: f997 3007 ldrsb.w r3, [r7, #7] 8001e72: 0112 lsls r2, r2, #4 8001e74: b2d2 uxtb r2, r2 8001e76: 440b add r3, r1 8001e78: f883 2300 strb.w r2, [r3, #768] ; 0x300 } 8001e7c: e00a b.n 8001e94 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8001e7e: 683b ldr r3, [r7, #0] 8001e80: b2da uxtb r2, r3 8001e82: 4908 ldr r1, [pc, #32] ; (8001ea4 <__NVIC_SetPriority+0x50>) 8001e84: 79fb ldrb r3, [r7, #7] 8001e86: f003 030f and.w r3, r3, #15 8001e8a: 3b04 subs r3, #4 8001e8c: 0112 lsls r2, r2, #4 8001e8e: b2d2 uxtb r2, r2 8001e90: 440b add r3, r1 8001e92: 761a strb r2, [r3, #24] } 8001e94: bf00 nop 8001e96: 370c adds r7, #12 8001e98: 46bd mov sp, r7 8001e9a: bc80 pop {r7} 8001e9c: 4770 bx lr 8001e9e: bf00 nop 8001ea0: e000e100 .word 0xe000e100 8001ea4: e000ed00 .word 0xe000ed00 08001ea8 : { 8001ea8: b480 push {r7} 8001eaa: b089 sub sp, #36 ; 0x24 8001eac: af00 add r7, sp, #0 8001eae: 60f8 str r0, [r7, #12] 8001eb0: 60b9 str r1, [r7, #8] 8001eb2: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8001eb4: 68fb ldr r3, [r7, #12] 8001eb6: f003 0307 and.w r3, r3, #7 8001eba: 61fb str r3, [r7, #28] PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8001ebc: 69fb ldr r3, [r7, #28] 8001ebe: f1c3 0307 rsb r3, r3, #7 8001ec2: 2b04 cmp r3, #4 8001ec4: bf28 it cs 8001ec6: 2304 movcs r3, #4 8001ec8: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8001eca: 69fb ldr r3, [r7, #28] 8001ecc: 3304 adds r3, #4 8001ece: 2b06 cmp r3, #6 8001ed0: d902 bls.n 8001ed8 8001ed2: 69fb ldr r3, [r7, #28] 8001ed4: 3b03 subs r3, #3 8001ed6: e000 b.n 8001eda 8001ed8: 2300 movs r3, #0 8001eda: 617b str r3, [r7, #20] ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8001edc: f04f 32ff mov.w r2, #4294967295 8001ee0: 69bb ldr r3, [r7, #24] 8001ee2: fa02 f303 lsl.w r3, r2, r3 8001ee6: 43da mvns r2, r3 8001ee8: 68bb ldr r3, [r7, #8] 8001eea: 401a ands r2, r3 8001eec: 697b ldr r3, [r7, #20] 8001eee: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8001ef0: f04f 31ff mov.w r1, #4294967295 8001ef4: 697b ldr r3, [r7, #20] 8001ef6: fa01 f303 lsl.w r3, r1, r3 8001efa: 43d9 mvns r1, r3 8001efc: 687b ldr r3, [r7, #4] 8001efe: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8001f00: 4313 orrs r3, r2 } 8001f02: 4618 mov r0, r3 8001f04: 3724 adds r7, #36 ; 0x24 8001f06: 46bd mov sp, r7 8001f08: bc80 pop {r7} 8001f0a: 4770 bx lr 08001f0c : { 8001f0c: b580 push {r7, lr} 8001f0e: b082 sub sp, #8 8001f10: af00 add r7, sp, #0 8001f12: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8001f14: 687b ldr r3, [r7, #4] 8001f16: 3b01 subs r3, #1 8001f18: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 8001f1c: d301 bcc.n 8001f22 return (1UL); /* Reload value impossible */ 8001f1e: 2301 movs r3, #1 8001f20: e00f b.n 8001f42 SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8001f22: 4a0a ldr r2, [pc, #40] ; (8001f4c ) 8001f24: 687b ldr r3, [r7, #4] 8001f26: 3b01 subs r3, #1 8001f28: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8001f2a: 210f movs r1, #15 8001f2c: f04f 30ff mov.w r0, #4294967295 8001f30: f7ff ff90 bl 8001e54 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8001f34: 4b05 ldr r3, [pc, #20] ; (8001f4c ) 8001f36: 2200 movs r2, #0 8001f38: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8001f3a: 4b04 ldr r3, [pc, #16] ; (8001f4c ) 8001f3c: 2207 movs r2, #7 8001f3e: 601a str r2, [r3, #0] return (0UL); /* Function successful */ 8001f40: 2300 movs r3, #0 } 8001f42: 4618 mov r0, r3 8001f44: 3708 adds r7, #8 8001f46: 46bd mov sp, r7 8001f48: bd80 pop {r7, pc} 8001f4a: bf00 nop 8001f4c: e000e010 .word 0xe000e010 08001f50 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8001f50: b580 push {r7, lr} 8001f52: b082 sub sp, #8 8001f54: af00 add r7, sp, #0 8001f56: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8001f58: 6878 ldr r0, [r7, #4] 8001f5a: f7ff ff2d bl 8001db8 <__NVIC_SetPriorityGrouping> } 8001f5e: bf00 nop 8001f60: 3708 adds r7, #8 8001f62: 46bd mov sp, r7 8001f64: bd80 pop {r7, pc} 08001f66 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8001f66: b580 push {r7, lr} 8001f68: b086 sub sp, #24 8001f6a: af00 add r7, sp, #0 8001f6c: 4603 mov r3, r0 8001f6e: 60b9 str r1, [r7, #8] 8001f70: 607a str r2, [r7, #4] 8001f72: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8001f74: 2300 movs r3, #0 8001f76: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8001f78: f7ff ff42 bl 8001e00 <__NVIC_GetPriorityGrouping> 8001f7c: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8001f7e: 687a ldr r2, [r7, #4] 8001f80: 68b9 ldr r1, [r7, #8] 8001f82: 6978 ldr r0, [r7, #20] 8001f84: f7ff ff90 bl 8001ea8 8001f88: 4602 mov r2, r0 8001f8a: f997 300f ldrsb.w r3, [r7, #15] 8001f8e: 4611 mov r1, r2 8001f90: 4618 mov r0, r3 8001f92: f7ff ff5f bl 8001e54 <__NVIC_SetPriority> } 8001f96: bf00 nop 8001f98: 3718 adds r7, #24 8001f9a: 46bd mov sp, r7 8001f9c: bd80 pop {r7, pc} 08001f9e : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 8001f9e: b580 push {r7, lr} 8001fa0: b082 sub sp, #8 8001fa2: af00 add r7, sp, #0 8001fa4: 4603 mov r3, r0 8001fa6: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 8001fa8: f997 3007 ldrsb.w r3, [r7, #7] 8001fac: 4618 mov r0, r3 8001fae: f7ff ff35 bl 8001e1c <__NVIC_EnableIRQ> } 8001fb2: bf00 nop 8001fb4: 3708 adds r7, #8 8001fb6: 46bd mov sp, r7 8001fb8: bd80 pop {r7, pc} 08001fba : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 8001fba: b580 push {r7, lr} 8001fbc: b082 sub sp, #8 8001fbe: af00 add r7, sp, #0 8001fc0: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 8001fc2: 6878 ldr r0, [r7, #4] 8001fc4: f7ff ffa2 bl 8001f0c 8001fc8: 4603 mov r3, r0 } 8001fca: 4618 mov r0, r3 8001fcc: 3708 adds r7, #8 8001fce: 46bd mov sp, r7 8001fd0: bd80 pop {r7, pc} ... 08001fd4 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8001fd4: b480 push {r7} 8001fd6: b08b sub sp, #44 ; 0x2c 8001fd8: af00 add r7, sp, #0 8001fda: 6078 str r0, [r7, #4] 8001fdc: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 8001fde: 2300 movs r3, #0 8001fe0: 627b str r3, [r7, #36] ; 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 8001fe2: 2300 movs r3, #0 8001fe4: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 8001fe6: e179 b.n 80022dc { /* Get the IO position */ ioposition = (0x01uL << position); 8001fe8: 2201 movs r2, #1 8001fea: 6a7b ldr r3, [r7, #36] ; 0x24 8001fec: fa02 f303 lsl.w r3, r2, r3 8001ff0: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8001ff2: 683b ldr r3, [r7, #0] 8001ff4: 681b ldr r3, [r3, #0] 8001ff6: 69fa ldr r2, [r7, #28] 8001ff8: 4013 ands r3, r2 8001ffa: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 8001ffc: 69ba ldr r2, [r7, #24] 8001ffe: 69fb ldr r3, [r7, #28] 8002000: 429a cmp r2, r3 8002002: f040 8168 bne.w 80022d6 { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 8002006: 683b ldr r3, [r7, #0] 8002008: 685b ldr r3, [r3, #4] 800200a: 4a96 ldr r2, [pc, #600] ; (8002264 ) 800200c: 4293 cmp r3, r2 800200e: d05e beq.n 80020ce 8002010: 4a94 ldr r2, [pc, #592] ; (8002264 ) 8002012: 4293 cmp r3, r2 8002014: d875 bhi.n 8002102 8002016: 4a94 ldr r2, [pc, #592] ; (8002268 ) 8002018: 4293 cmp r3, r2 800201a: d058 beq.n 80020ce 800201c: 4a92 ldr r2, [pc, #584] ; (8002268 ) 800201e: 4293 cmp r3, r2 8002020: d86f bhi.n 8002102 8002022: 4a92 ldr r2, [pc, #584] ; (800226c ) 8002024: 4293 cmp r3, r2 8002026: d052 beq.n 80020ce 8002028: 4a90 ldr r2, [pc, #576] ; (800226c ) 800202a: 4293 cmp r3, r2 800202c: d869 bhi.n 8002102 800202e: 4a90 ldr r2, [pc, #576] ; (8002270 ) 8002030: 4293 cmp r3, r2 8002032: d04c beq.n 80020ce 8002034: 4a8e ldr r2, [pc, #568] ; (8002270 ) 8002036: 4293 cmp r3, r2 8002038: d863 bhi.n 8002102 800203a: 4a8e ldr r2, [pc, #568] ; (8002274 ) 800203c: 4293 cmp r3, r2 800203e: d046 beq.n 80020ce 8002040: 4a8c ldr r2, [pc, #560] ; (8002274 ) 8002042: 4293 cmp r3, r2 8002044: d85d bhi.n 8002102 8002046: 2b12 cmp r3, #18 8002048: d82a bhi.n 80020a0 800204a: 2b12 cmp r3, #18 800204c: d859 bhi.n 8002102 800204e: a201 add r2, pc, #4 ; (adr r2, 8002054 ) 8002050: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8002054: 080020cf .word 0x080020cf 8002058: 080020a9 .word 0x080020a9 800205c: 080020bb .word 0x080020bb 8002060: 080020fd .word 0x080020fd 8002064: 08002103 .word 0x08002103 8002068: 08002103 .word 0x08002103 800206c: 08002103 .word 0x08002103 8002070: 08002103 .word 0x08002103 8002074: 08002103 .word 0x08002103 8002078: 08002103 .word 0x08002103 800207c: 08002103 .word 0x08002103 8002080: 08002103 .word 0x08002103 8002084: 08002103 .word 0x08002103 8002088: 08002103 .word 0x08002103 800208c: 08002103 .word 0x08002103 8002090: 08002103 .word 0x08002103 8002094: 08002103 .word 0x08002103 8002098: 080020b1 .word 0x080020b1 800209c: 080020c5 .word 0x080020c5 80020a0: 4a75 ldr r2, [pc, #468] ; (8002278 ) 80020a2: 4293 cmp r3, r2 80020a4: d013 beq.n 80020ce config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; 80020a6: e02c b.n 8002102 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 80020a8: 683b ldr r3, [r7, #0] 80020aa: 68db ldr r3, [r3, #12] 80020ac: 623b str r3, [r7, #32] break; 80020ae: e029 b.n 8002104 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 80020b0: 683b ldr r3, [r7, #0] 80020b2: 68db ldr r3, [r3, #12] 80020b4: 3304 adds r3, #4 80020b6: 623b str r3, [r7, #32] break; 80020b8: e024 b.n 8002104 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 80020ba: 683b ldr r3, [r7, #0] 80020bc: 68db ldr r3, [r3, #12] 80020be: 3308 adds r3, #8 80020c0: 623b str r3, [r7, #32] break; 80020c2: e01f b.n 8002104 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 80020c4: 683b ldr r3, [r7, #0] 80020c6: 68db ldr r3, [r3, #12] 80020c8: 330c adds r3, #12 80020ca: 623b str r3, [r7, #32] break; 80020cc: e01a b.n 8002104 if (GPIO_Init->Pull == GPIO_NOPULL) 80020ce: 683b ldr r3, [r7, #0] 80020d0: 689b ldr r3, [r3, #8] 80020d2: 2b00 cmp r3, #0 80020d4: d102 bne.n 80020dc config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 80020d6: 2304 movs r3, #4 80020d8: 623b str r3, [r7, #32] break; 80020da: e013 b.n 8002104 else if (GPIO_Init->Pull == GPIO_PULLUP) 80020dc: 683b ldr r3, [r7, #0] 80020de: 689b ldr r3, [r3, #8] 80020e0: 2b01 cmp r3, #1 80020e2: d105 bne.n 80020f0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80020e4: 2308 movs r3, #8 80020e6: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; 80020e8: 687b ldr r3, [r7, #4] 80020ea: 69fa ldr r2, [r7, #28] 80020ec: 611a str r2, [r3, #16] break; 80020ee: e009 b.n 8002104 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80020f0: 2308 movs r3, #8 80020f2: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; 80020f4: 687b ldr r3, [r7, #4] 80020f6: 69fa ldr r2, [r7, #28] 80020f8: 615a str r2, [r3, #20] break; 80020fa: e003 b.n 8002104 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 80020fc: 2300 movs r3, #0 80020fe: 623b str r3, [r7, #32] break; 8002100: e000 b.n 8002104 break; 8002102: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8002104: 69bb ldr r3, [r7, #24] 8002106: 2bff cmp r3, #255 ; 0xff 8002108: d801 bhi.n 800210e 800210a: 687b ldr r3, [r7, #4] 800210c: e001 b.n 8002112 800210e: 687b ldr r3, [r7, #4] 8002110: 3304 adds r3, #4 8002112: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); 8002114: 69bb ldr r3, [r7, #24] 8002116: 2bff cmp r3, #255 ; 0xff 8002118: d802 bhi.n 8002120 800211a: 6a7b ldr r3, [r7, #36] ; 0x24 800211c: 009b lsls r3, r3, #2 800211e: e002 b.n 8002126 8002120: 6a7b ldr r3, [r7, #36] ; 0x24 8002122: 3b08 subs r3, #8 8002124: 009b lsls r3, r3, #2 8002126: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8002128: 697b ldr r3, [r7, #20] 800212a: 681a ldr r2, [r3, #0] 800212c: 210f movs r1, #15 800212e: 693b ldr r3, [r7, #16] 8002130: fa01 f303 lsl.w r3, r1, r3 8002134: 43db mvns r3, r3 8002136: 401a ands r2, r3 8002138: 6a39 ldr r1, [r7, #32] 800213a: 693b ldr r3, [r7, #16] 800213c: fa01 f303 lsl.w r3, r1, r3 8002140: 431a orrs r2, r3 8002142: 697b ldr r3, [r7, #20] 8002144: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8002146: 683b ldr r3, [r7, #0] 8002148: 685b ldr r3, [r3, #4] 800214a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 800214e: 2b00 cmp r3, #0 8002150: f000 80c1 beq.w 80022d6 { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8002154: 4b49 ldr r3, [pc, #292] ; (800227c ) 8002156: 699b ldr r3, [r3, #24] 8002158: 4a48 ldr r2, [pc, #288] ; (800227c ) 800215a: f043 0301 orr.w r3, r3, #1 800215e: 6193 str r3, [r2, #24] 8002160: 4b46 ldr r3, [pc, #280] ; (800227c ) 8002162: 699b ldr r3, [r3, #24] 8002164: f003 0301 and.w r3, r3, #1 8002168: 60bb str r3, [r7, #8] 800216a: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; 800216c: 4a44 ldr r2, [pc, #272] ; (8002280 ) 800216e: 6a7b ldr r3, [r7, #36] ; 0x24 8002170: 089b lsrs r3, r3, #2 8002172: 3302 adds r3, #2 8002174: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8002178: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 800217a: 6a7b ldr r3, [r7, #36] ; 0x24 800217c: f003 0303 and.w r3, r3, #3 8002180: 009b lsls r3, r3, #2 8002182: 220f movs r2, #15 8002184: fa02 f303 lsl.w r3, r2, r3 8002188: 43db mvns r3, r3 800218a: 68fa ldr r2, [r7, #12] 800218c: 4013 ands r3, r2 800218e: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 8002190: 687b ldr r3, [r7, #4] 8002192: 4a3c ldr r2, [pc, #240] ; (8002284 ) 8002194: 4293 cmp r3, r2 8002196: d01f beq.n 80021d8 8002198: 687b ldr r3, [r7, #4] 800219a: 4a3b ldr r2, [pc, #236] ; (8002288 ) 800219c: 4293 cmp r3, r2 800219e: d019 beq.n 80021d4 80021a0: 687b ldr r3, [r7, #4] 80021a2: 4a3a ldr r2, [pc, #232] ; (800228c ) 80021a4: 4293 cmp r3, r2 80021a6: d013 beq.n 80021d0 80021a8: 687b ldr r3, [r7, #4] 80021aa: 4a39 ldr r2, [pc, #228] ; (8002290 ) 80021ac: 4293 cmp r3, r2 80021ae: d00d beq.n 80021cc 80021b0: 687b ldr r3, [r7, #4] 80021b2: 4a38 ldr r2, [pc, #224] ; (8002294 ) 80021b4: 4293 cmp r3, r2 80021b6: d007 beq.n 80021c8 80021b8: 687b ldr r3, [r7, #4] 80021ba: 4a37 ldr r2, [pc, #220] ; (8002298 ) 80021bc: 4293 cmp r3, r2 80021be: d101 bne.n 80021c4 80021c0: 2305 movs r3, #5 80021c2: e00a b.n 80021da 80021c4: 2306 movs r3, #6 80021c6: e008 b.n 80021da 80021c8: 2304 movs r3, #4 80021ca: e006 b.n 80021da 80021cc: 2303 movs r3, #3 80021ce: e004 b.n 80021da 80021d0: 2302 movs r3, #2 80021d2: e002 b.n 80021da 80021d4: 2301 movs r3, #1 80021d6: e000 b.n 80021da 80021d8: 2300 movs r3, #0 80021da: 6a7a ldr r2, [r7, #36] ; 0x24 80021dc: f002 0203 and.w r2, r2, #3 80021e0: 0092 lsls r2, r2, #2 80021e2: 4093 lsls r3, r2 80021e4: 68fa ldr r2, [r7, #12] 80021e6: 4313 orrs r3, r2 80021e8: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; 80021ea: 4925 ldr r1, [pc, #148] ; (8002280 ) 80021ec: 6a7b ldr r3, [r7, #36] ; 0x24 80021ee: 089b lsrs r3, r3, #2 80021f0: 3302 adds r3, #2 80021f2: 68fa ldr r2, [r7, #12] 80021f4: f841 2023 str.w r2, [r1, r3, lsl #2] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 80021f8: 683b ldr r3, [r7, #0] 80021fa: 685b ldr r3, [r3, #4] 80021fc: f403 3380 and.w r3, r3, #65536 ; 0x10000 8002200: 2b00 cmp r3, #0 8002202: d006 beq.n 8002212 { SET_BIT(EXTI->IMR, iocurrent); 8002204: 4b25 ldr r3, [pc, #148] ; (800229c ) 8002206: 681a ldr r2, [r3, #0] 8002208: 4924 ldr r1, [pc, #144] ; (800229c ) 800220a: 69bb ldr r3, [r7, #24] 800220c: 4313 orrs r3, r2 800220e: 600b str r3, [r1, #0] 8002210: e006 b.n 8002220 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8002212: 4b22 ldr r3, [pc, #136] ; (800229c ) 8002214: 681a ldr r2, [r3, #0] 8002216: 69bb ldr r3, [r7, #24] 8002218: 43db mvns r3, r3 800221a: 4920 ldr r1, [pc, #128] ; (800229c ) 800221c: 4013 ands r3, r2 800221e: 600b str r3, [r1, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8002220: 683b ldr r3, [r7, #0] 8002222: 685b ldr r3, [r3, #4] 8002224: f403 3300 and.w r3, r3, #131072 ; 0x20000 8002228: 2b00 cmp r3, #0 800222a: d006 beq.n 800223a { SET_BIT(EXTI->EMR, iocurrent); 800222c: 4b1b ldr r3, [pc, #108] ; (800229c ) 800222e: 685a ldr r2, [r3, #4] 8002230: 491a ldr r1, [pc, #104] ; (800229c ) 8002232: 69bb ldr r3, [r7, #24] 8002234: 4313 orrs r3, r2 8002236: 604b str r3, [r1, #4] 8002238: e006 b.n 8002248 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 800223a: 4b18 ldr r3, [pc, #96] ; (800229c ) 800223c: 685a ldr r2, [r3, #4] 800223e: 69bb ldr r3, [r7, #24] 8002240: 43db mvns r3, r3 8002242: 4916 ldr r1, [pc, #88] ; (800229c ) 8002244: 4013 ands r3, r2 8002246: 604b str r3, [r1, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8002248: 683b ldr r3, [r7, #0] 800224a: 685b ldr r3, [r3, #4] 800224c: f403 1380 and.w r3, r3, #1048576 ; 0x100000 8002250: 2b00 cmp r3, #0 8002252: d025 beq.n 80022a0 { SET_BIT(EXTI->RTSR, iocurrent); 8002254: 4b11 ldr r3, [pc, #68] ; (800229c ) 8002256: 689a ldr r2, [r3, #8] 8002258: 4910 ldr r1, [pc, #64] ; (800229c ) 800225a: 69bb ldr r3, [r7, #24] 800225c: 4313 orrs r3, r2 800225e: 608b str r3, [r1, #8] 8002260: e025 b.n 80022ae 8002262: bf00 nop 8002264: 10320000 .word 0x10320000 8002268: 10310000 .word 0x10310000 800226c: 10220000 .word 0x10220000 8002270: 10210000 .word 0x10210000 8002274: 10120000 .word 0x10120000 8002278: 10110000 .word 0x10110000 800227c: 40021000 .word 0x40021000 8002280: 40010000 .word 0x40010000 8002284: 40010800 .word 0x40010800 8002288: 40010c00 .word 0x40010c00 800228c: 40011000 .word 0x40011000 8002290: 40011400 .word 0x40011400 8002294: 40011800 .word 0x40011800 8002298: 40011c00 .word 0x40011c00 800229c: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 80022a0: 4b15 ldr r3, [pc, #84] ; (80022f8 ) 80022a2: 689a ldr r2, [r3, #8] 80022a4: 69bb ldr r3, [r7, #24] 80022a6: 43db mvns r3, r3 80022a8: 4913 ldr r1, [pc, #76] ; (80022f8 ) 80022aa: 4013 ands r3, r2 80022ac: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 80022ae: 683b ldr r3, [r7, #0] 80022b0: 685b ldr r3, [r3, #4] 80022b2: f403 1300 and.w r3, r3, #2097152 ; 0x200000 80022b6: 2b00 cmp r3, #0 80022b8: d006 beq.n 80022c8 { SET_BIT(EXTI->FTSR, iocurrent); 80022ba: 4b0f ldr r3, [pc, #60] ; (80022f8 ) 80022bc: 68da ldr r2, [r3, #12] 80022be: 490e ldr r1, [pc, #56] ; (80022f8 ) 80022c0: 69bb ldr r3, [r7, #24] 80022c2: 4313 orrs r3, r2 80022c4: 60cb str r3, [r1, #12] 80022c6: e006 b.n 80022d6 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 80022c8: 4b0b ldr r3, [pc, #44] ; (80022f8 ) 80022ca: 68da ldr r2, [r3, #12] 80022cc: 69bb ldr r3, [r7, #24] 80022ce: 43db mvns r3, r3 80022d0: 4909 ldr r1, [pc, #36] ; (80022f8 ) 80022d2: 4013 ands r3, r2 80022d4: 60cb str r3, [r1, #12] } } } position++; 80022d6: 6a7b ldr r3, [r7, #36] ; 0x24 80022d8: 3301 adds r3, #1 80022da: 627b str r3, [r7, #36] ; 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) 80022dc: 683b ldr r3, [r7, #0] 80022de: 681a ldr r2, [r3, #0] 80022e0: 6a7b ldr r3, [r7, #36] ; 0x24 80022e2: fa22 f303 lsr.w r3, r2, r3 80022e6: 2b00 cmp r3, #0 80022e8: f47f ae7e bne.w 8001fe8 } } 80022ec: bf00 nop 80022ee: bf00 nop 80022f0: 372c adds r7, #44 ; 0x2c 80022f2: 46bd mov sp, r7 80022f4: bc80 pop {r7} 80022f6: 4770 bx lr 80022f8: 40010400 .word 0x40010400 080022fc : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 80022fc: b480 push {r7} 80022fe: b085 sub sp, #20 8002300: af00 add r7, sp, #0 8002302: 6078 str r0, [r7, #4] 8002304: 460b mov r3, r1 8002306: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 8002308: 687b ldr r3, [r7, #4] 800230a: 689a ldr r2, [r3, #8] 800230c: 887b ldrh r3, [r7, #2] 800230e: 4013 ands r3, r2 8002310: 2b00 cmp r3, #0 8002312: d002 beq.n 800231a { bitstatus = GPIO_PIN_SET; 8002314: 2301 movs r3, #1 8002316: 73fb strb r3, [r7, #15] 8002318: e001 b.n 800231e } else { bitstatus = GPIO_PIN_RESET; 800231a: 2300 movs r3, #0 800231c: 73fb strb r3, [r7, #15] } return bitstatus; 800231e: 7bfb ldrb r3, [r7, #15] } 8002320: 4618 mov r0, r3 8002322: 3714 adds r7, #20 8002324: 46bd mov sp, r7 8002326: bc80 pop {r7} 8002328: 4770 bx lr 0800232a : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 800232a: b480 push {r7} 800232c: b083 sub sp, #12 800232e: af00 add r7, sp, #0 8002330: 6078 str r0, [r7, #4] 8002332: 460b mov r3, r1 8002334: 807b strh r3, [r7, #2] 8002336: 4613 mov r3, r2 8002338: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 800233a: 787b ldrb r3, [r7, #1] 800233c: 2b00 cmp r3, #0 800233e: d003 beq.n 8002348 { GPIOx->BSRR = GPIO_Pin; 8002340: 887a ldrh r2, [r7, #2] 8002342: 687b ldr r3, [r7, #4] 8002344: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } 8002346: e003 b.n 8002350 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 8002348: 887b ldrh r3, [r7, #2] 800234a: 041a lsls r2, r3, #16 800234c: 687b ldr r3, [r7, #4] 800234e: 611a str r2, [r3, #16] } 8002350: bf00 nop 8002352: 370c adds r7, #12 8002354: 46bd mov sp, r7 8002356: bc80 pop {r7} 8002358: 4770 bx lr ... 0800235c : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 800235c: b580 push {r7, lr} 800235e: b084 sub sp, #16 8002360: af00 add r7, sp, #0 8002362: 6078 str r0, [r7, #4] uint32_t freqrange; uint32_t pclk1; /* Check the I2C handle allocation */ if (hi2c == NULL) 8002364: 687b ldr r3, [r7, #4] 8002366: 2b00 cmp r3, #0 8002368: d101 bne.n 800236e { return HAL_ERROR; 800236a: 2301 movs r3, #1 800236c: e12b b.n 80025c6 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) 800236e: 687b ldr r3, [r7, #4] 8002370: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 8002374: b2db uxtb r3, r3 8002376: 2b00 cmp r3, #0 8002378: d106 bne.n 8002388 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 800237a: 687b ldr r3, [r7, #4] 800237c: 2200 movs r2, #0 800237e: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); 8002382: 6878 ldr r0, [r7, #4] 8002384: f7ff fa28 bl 80017d8 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; 8002388: 687b ldr r3, [r7, #4] 800238a: 2224 movs r2, #36 ; 0x24 800238c: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 8002390: 687b ldr r3, [r7, #4] 8002392: 681b ldr r3, [r3, #0] 8002394: 681a ldr r2, [r3, #0] 8002396: 687b ldr r3, [r7, #4] 8002398: 681b ldr r3, [r3, #0] 800239a: f022 0201 bic.w r2, r2, #1 800239e: 601a str r2, [r3, #0] /*Reset I2C*/ hi2c->Instance->CR1 |= I2C_CR1_SWRST; 80023a0: 687b ldr r3, [r7, #4] 80023a2: 681b ldr r3, [r3, #0] 80023a4: 681a ldr r2, [r3, #0] 80023a6: 687b ldr r3, [r7, #4] 80023a8: 681b ldr r3, [r3, #0] 80023aa: f442 4200 orr.w r2, r2, #32768 ; 0x8000 80023ae: 601a str r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_SWRST; 80023b0: 687b ldr r3, [r7, #4] 80023b2: 681b ldr r3, [r3, #0] 80023b4: 681a ldr r2, [r3, #0] 80023b6: 687b ldr r3, [r7, #4] 80023b8: 681b ldr r3, [r3, #0] 80023ba: f422 4200 bic.w r2, r2, #32768 ; 0x8000 80023be: 601a str r2, [r3, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); 80023c0: f001 fba0 bl 8003b04 80023c4: 60f8 str r0, [r7, #12] /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 80023c6: 687b ldr r3, [r7, #4] 80023c8: 685b ldr r3, [r3, #4] 80023ca: 4a81 ldr r2, [pc, #516] ; (80025d0 ) 80023cc: 4293 cmp r3, r2 80023ce: d807 bhi.n 80023e0 80023d0: 68fb ldr r3, [r7, #12] 80023d2: 4a80 ldr r2, [pc, #512] ; (80025d4 ) 80023d4: 4293 cmp r3, r2 80023d6: bf94 ite ls 80023d8: 2301 movls r3, #1 80023da: 2300 movhi r3, #0 80023dc: b2db uxtb r3, r3 80023de: e006 b.n 80023ee 80023e0: 68fb ldr r3, [r7, #12] 80023e2: 4a7d ldr r2, [pc, #500] ; (80025d8 ) 80023e4: 4293 cmp r3, r2 80023e6: bf94 ite ls 80023e8: 2301 movls r3, #1 80023ea: 2300 movhi r3, #0 80023ec: b2db uxtb r3, r3 80023ee: 2b00 cmp r3, #0 80023f0: d001 beq.n 80023f6 { return HAL_ERROR; 80023f2: 2301 movs r3, #1 80023f4: e0e7 b.n 80025c6 } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); 80023f6: 68fb ldr r3, [r7, #12] 80023f8: 4a78 ldr r2, [pc, #480] ; (80025dc ) 80023fa: fba2 2303 umull r2, r3, r2, r3 80023fe: 0c9b lsrs r3, r3, #18 8002400: 60bb str r3, [r7, #8] /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange); 8002402: 687b ldr r3, [r7, #4] 8002404: 681b ldr r3, [r3, #0] 8002406: 685b ldr r3, [r3, #4] 8002408: f023 013f bic.w r1, r3, #63 ; 0x3f 800240c: 687b ldr r3, [r7, #4] 800240e: 681b ldr r3, [r3, #0] 8002410: 68ba ldr r2, [r7, #8] 8002412: 430a orrs r2, r1 8002414: 605a str r2, [r3, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed)); 8002416: 687b ldr r3, [r7, #4] 8002418: 681b ldr r3, [r3, #0] 800241a: 6a1b ldr r3, [r3, #32] 800241c: f023 013f bic.w r1, r3, #63 ; 0x3f 8002420: 687b ldr r3, [r7, #4] 8002422: 685b ldr r3, [r3, #4] 8002424: 4a6a ldr r2, [pc, #424] ; (80025d0 ) 8002426: 4293 cmp r3, r2 8002428: d802 bhi.n 8002430 800242a: 68bb ldr r3, [r7, #8] 800242c: 3301 adds r3, #1 800242e: e009 b.n 8002444 8002430: 68bb ldr r3, [r7, #8] 8002432: f44f 7296 mov.w r2, #300 ; 0x12c 8002436: fb02 f303 mul.w r3, r2, r3 800243a: 4a69 ldr r2, [pc, #420] ; (80025e0 ) 800243c: fba2 2303 umull r2, r3, r2, r3 8002440: 099b lsrs r3, r3, #6 8002442: 3301 adds r3, #1 8002444: 687a ldr r2, [r7, #4] 8002446: 6812 ldr r2, [r2, #0] 8002448: 430b orrs r3, r1 800244a: 6213 str r3, [r2, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle)); 800244c: 687b ldr r3, [r7, #4] 800244e: 681b ldr r3, [r3, #0] 8002450: 69db ldr r3, [r3, #28] 8002452: f423 424f bic.w r2, r3, #52992 ; 0xcf00 8002456: f022 02ff bic.w r2, r2, #255 ; 0xff 800245a: 687b ldr r3, [r7, #4] 800245c: 685b ldr r3, [r3, #4] 800245e: 495c ldr r1, [pc, #368] ; (80025d0 ) 8002460: 428b cmp r3, r1 8002462: d819 bhi.n 8002498 8002464: 68fb ldr r3, [r7, #12] 8002466: 1e59 subs r1, r3, #1 8002468: 687b ldr r3, [r7, #4] 800246a: 685b ldr r3, [r3, #4] 800246c: 005b lsls r3, r3, #1 800246e: fbb1 f3f3 udiv r3, r1, r3 8002472: 1c59 adds r1, r3, #1 8002474: f640 73fc movw r3, #4092 ; 0xffc 8002478: 400b ands r3, r1 800247a: 2b00 cmp r3, #0 800247c: d00a beq.n 8002494 800247e: 68fb ldr r3, [r7, #12] 8002480: 1e59 subs r1, r3, #1 8002482: 687b ldr r3, [r7, #4] 8002484: 685b ldr r3, [r3, #4] 8002486: 005b lsls r3, r3, #1 8002488: fbb1 f3f3 udiv r3, r1, r3 800248c: 3301 adds r3, #1 800248e: f3c3 030b ubfx r3, r3, #0, #12 8002492: e051 b.n 8002538 8002494: 2304 movs r3, #4 8002496: e04f b.n 8002538 8002498: 687b ldr r3, [r7, #4] 800249a: 689b ldr r3, [r3, #8] 800249c: 2b00 cmp r3, #0 800249e: d111 bne.n 80024c4 80024a0: 68fb ldr r3, [r7, #12] 80024a2: 1e58 subs r0, r3, #1 80024a4: 687b ldr r3, [r7, #4] 80024a6: 6859 ldr r1, [r3, #4] 80024a8: 460b mov r3, r1 80024aa: 005b lsls r3, r3, #1 80024ac: 440b add r3, r1 80024ae: fbb0 f3f3 udiv r3, r0, r3 80024b2: 3301 adds r3, #1 80024b4: f3c3 030b ubfx r3, r3, #0, #12 80024b8: 2b00 cmp r3, #0 80024ba: bf0c ite eq 80024bc: 2301 moveq r3, #1 80024be: 2300 movne r3, #0 80024c0: b2db uxtb r3, r3 80024c2: e012 b.n 80024ea 80024c4: 68fb ldr r3, [r7, #12] 80024c6: 1e58 subs r0, r3, #1 80024c8: 687b ldr r3, [r7, #4] 80024ca: 6859 ldr r1, [r3, #4] 80024cc: 460b mov r3, r1 80024ce: 009b lsls r3, r3, #2 80024d0: 440b add r3, r1 80024d2: 0099 lsls r1, r3, #2 80024d4: 440b add r3, r1 80024d6: fbb0 f3f3 udiv r3, r0, r3 80024da: 3301 adds r3, #1 80024dc: f3c3 030b ubfx r3, r3, #0, #12 80024e0: 2b00 cmp r3, #0 80024e2: bf0c ite eq 80024e4: 2301 moveq r3, #1 80024e6: 2300 movne r3, #0 80024e8: b2db uxtb r3, r3 80024ea: 2b00 cmp r3, #0 80024ec: d001 beq.n 80024f2 80024ee: 2301 movs r3, #1 80024f0: e022 b.n 8002538 80024f2: 687b ldr r3, [r7, #4] 80024f4: 689b ldr r3, [r3, #8] 80024f6: 2b00 cmp r3, #0 80024f8: d10e bne.n 8002518 80024fa: 68fb ldr r3, [r7, #12] 80024fc: 1e58 subs r0, r3, #1 80024fe: 687b ldr r3, [r7, #4] 8002500: 6859 ldr r1, [r3, #4] 8002502: 460b mov r3, r1 8002504: 005b lsls r3, r3, #1 8002506: 440b add r3, r1 8002508: fbb0 f3f3 udiv r3, r0, r3 800250c: 3301 adds r3, #1 800250e: f3c3 030b ubfx r3, r3, #0, #12 8002512: f443 4300 orr.w r3, r3, #32768 ; 0x8000 8002516: e00f b.n 8002538 8002518: 68fb ldr r3, [r7, #12] 800251a: 1e58 subs r0, r3, #1 800251c: 687b ldr r3, [r7, #4] 800251e: 6859 ldr r1, [r3, #4] 8002520: 460b mov r3, r1 8002522: 009b lsls r3, r3, #2 8002524: 440b add r3, r1 8002526: 0099 lsls r1, r3, #2 8002528: 440b add r3, r1 800252a: fbb0 f3f3 udiv r3, r0, r3 800252e: 3301 adds r3, #1 8002530: f3c3 030b ubfx r3, r3, #0, #12 8002534: f443 4340 orr.w r3, r3, #49152 ; 0xc000 8002538: 6879 ldr r1, [r7, #4] 800253a: 6809 ldr r1, [r1, #0] 800253c: 4313 orrs r3, r2 800253e: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode)); 8002540: 687b ldr r3, [r7, #4] 8002542: 681b ldr r3, [r3, #0] 8002544: 681b ldr r3, [r3, #0] 8002546: f023 01c0 bic.w r1, r3, #192 ; 0xc0 800254a: 687b ldr r3, [r7, #4] 800254c: 69da ldr r2, [r3, #28] 800254e: 687b ldr r3, [r7, #4] 8002550: 6a1b ldr r3, [r3, #32] 8002552: 431a orrs r2, r3 8002554: 687b ldr r3, [r7, #4] 8002556: 681b ldr r3, [r3, #0] 8002558: 430a orrs r2, r1 800255a: 601a str r2, [r3, #0] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Configure I2Cx: Own Address1 and addressing mode */ MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1)); 800255c: 687b ldr r3, [r7, #4] 800255e: 681b ldr r3, [r3, #0] 8002560: 689b ldr r3, [r3, #8] 8002562: f423 4303 bic.w r3, r3, #33536 ; 0x8300 8002566: f023 03ff bic.w r3, r3, #255 ; 0xff 800256a: 687a ldr r2, [r7, #4] 800256c: 6911 ldr r1, [r2, #16] 800256e: 687a ldr r2, [r7, #4] 8002570: 68d2 ldr r2, [r2, #12] 8002572: 4311 orrs r1, r2 8002574: 687a ldr r2, [r7, #4] 8002576: 6812 ldr r2, [r2, #0] 8002578: 430b orrs r3, r1 800257a: 6093 str r3, [r2, #8] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Configure I2Cx: Dual mode and Own Address2 */ MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2)); 800257c: 687b ldr r3, [r7, #4] 800257e: 681b ldr r3, [r3, #0] 8002580: 68db ldr r3, [r3, #12] 8002582: f023 01ff bic.w r1, r3, #255 ; 0xff 8002586: 687b ldr r3, [r7, #4] 8002588: 695a ldr r2, [r3, #20] 800258a: 687b ldr r3, [r7, #4] 800258c: 699b ldr r3, [r3, #24] 800258e: 431a orrs r2, r3 8002590: 687b ldr r3, [r7, #4] 8002592: 681b ldr r3, [r3, #0] 8002594: 430a orrs r2, r1 8002596: 60da str r2, [r3, #12] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 8002598: 687b ldr r3, [r7, #4] 800259a: 681b ldr r3, [r3, #0] 800259c: 681a ldr r2, [r3, #0] 800259e: 687b ldr r3, [r7, #4] 80025a0: 681b ldr r3, [r3, #0] 80025a2: f042 0201 orr.w r2, r2, #1 80025a6: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 80025a8: 687b ldr r3, [r7, #4] 80025aa: 2200 movs r2, #0 80025ac: 641a str r2, [r3, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_READY; 80025ae: 687b ldr r3, [r7, #4] 80025b0: 2220 movs r2, #32 80025b2: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 80025b6: 687b ldr r3, [r7, #4] 80025b8: 2200 movs r2, #0 80025ba: 631a str r2, [r3, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 80025bc: 687b ldr r3, [r7, #4] 80025be: 2200 movs r2, #0 80025c0: f883 203e strb.w r2, [r3, #62] ; 0x3e return HAL_OK; 80025c4: 2300 movs r3, #0 } 80025c6: 4618 mov r0, r3 80025c8: 3710 adds r7, #16 80025ca: 46bd mov sp, r7 80025cc: bd80 pop {r7, pc} 80025ce: bf00 nop 80025d0: 000186a0 .word 0x000186a0 80025d4: 001e847f .word 0x001e847f 80025d8: 003d08ff .word 0x003d08ff 80025dc: 431bde83 .word 0x431bde83 80025e0: 10624dd3 .word 0x10624dd3 080025e4 : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 80025e4: b580 push {r7, lr} 80025e6: b088 sub sp, #32 80025e8: af02 add r7, sp, #8 80025ea: 60f8 str r0, [r7, #12] 80025ec: 4608 mov r0, r1 80025ee: 4611 mov r1, r2 80025f0: 461a mov r2, r3 80025f2: 4603 mov r3, r0 80025f4: 817b strh r3, [r7, #10] 80025f6: 460b mov r3, r1 80025f8: 813b strh r3, [r7, #8] 80025fa: 4613 mov r3, r2 80025fc: 80fb strh r3, [r7, #6] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); 80025fe: f7ff fbad bl 8001d5c 8002602: 6178 str r0, [r7, #20] /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 8002604: 68fb ldr r3, [r7, #12] 8002606: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 800260a: b2db uxtb r3, r3 800260c: 2b20 cmp r3, #32 800260e: f040 80d9 bne.w 80027c4 { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 8002612: 697b ldr r3, [r7, #20] 8002614: 9300 str r3, [sp, #0] 8002616: 2319 movs r3, #25 8002618: 2201 movs r2, #1 800261a: 496d ldr r1, [pc, #436] ; (80027d0 ) 800261c: 68f8 ldr r0, [r7, #12] 800261e: f000 fcc1 bl 8002fa4 8002622: 4603 mov r3, r0 8002624: 2b00 cmp r3, #0 8002626: d001 beq.n 800262c { return HAL_BUSY; 8002628: 2302 movs r3, #2 800262a: e0cc b.n 80027c6 } /* Process Locked */ __HAL_LOCK(hi2c); 800262c: 68fb ldr r3, [r7, #12] 800262e: f893 303c ldrb.w r3, [r3, #60] ; 0x3c 8002632: 2b01 cmp r3, #1 8002634: d101 bne.n 800263a 8002636: 2302 movs r3, #2 8002638: e0c5 b.n 80027c6 800263a: 68fb ldr r3, [r7, #12] 800263c: 2201 movs r2, #1 800263e: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8002642: 68fb ldr r3, [r7, #12] 8002644: 681b ldr r3, [r3, #0] 8002646: 681b ldr r3, [r3, #0] 8002648: f003 0301 and.w r3, r3, #1 800264c: 2b01 cmp r3, #1 800264e: d007 beq.n 8002660 { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 8002650: 68fb ldr r3, [r7, #12] 8002652: 681b ldr r3, [r3, #0] 8002654: 681a ldr r2, [r3, #0] 8002656: 68fb ldr r3, [r7, #12] 8002658: 681b ldr r3, [r3, #0] 800265a: f042 0201 orr.w r2, r2, #1 800265e: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); 8002660: 68fb ldr r3, [r7, #12] 8002662: 681b ldr r3, [r3, #0] 8002664: 681a ldr r2, [r3, #0] 8002666: 68fb ldr r3, [r7, #12] 8002668: 681b ldr r3, [r3, #0] 800266a: f422 6200 bic.w r2, r2, #2048 ; 0x800 800266e: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_TX; 8002670: 68fb ldr r3, [r7, #12] 8002672: 2221 movs r2, #33 ; 0x21 8002674: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 8002678: 68fb ldr r3, [r7, #12] 800267a: 2240 movs r2, #64 ; 0x40 800267c: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8002680: 68fb ldr r3, [r7, #12] 8002682: 2200 movs r2, #0 8002684: 641a str r2, [r3, #64] ; 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; 8002686: 68fb ldr r3, [r7, #12] 8002688: 6a3a ldr r2, [r7, #32] 800268a: 625a str r2, [r3, #36] ; 0x24 hi2c->XferCount = Size; 800268c: 68fb ldr r3, [r7, #12] 800268e: 8cba ldrh r2, [r7, #36] ; 0x24 8002690: 855a strh r2, [r3, #42] ; 0x2a hi2c->XferSize = hi2c->XferCount; 8002692: 68fb ldr r3, [r7, #12] 8002694: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002696: b29a uxth r2, r3 8002698: 68fb ldr r3, [r7, #12] 800269a: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 800269c: 68fb ldr r3, [r7, #12] 800269e: 4a4d ldr r2, [pc, #308] ; (80027d4 ) 80026a0: 62da str r2, [r3, #44] ; 0x2c /* Send Slave Address and Memory Address */ if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 80026a2: 88f8 ldrh r0, [r7, #6] 80026a4: 893a ldrh r2, [r7, #8] 80026a6: 8979 ldrh r1, [r7, #10] 80026a8: 697b ldr r3, [r7, #20] 80026aa: 9301 str r3, [sp, #4] 80026ac: 6abb ldr r3, [r7, #40] ; 0x28 80026ae: 9300 str r3, [sp, #0] 80026b0: 4603 mov r3, r0 80026b2: 68f8 ldr r0, [r7, #12] 80026b4: f000 faf8 bl 8002ca8 80026b8: 4603 mov r3, r0 80026ba: 2b00 cmp r3, #0 80026bc: d052 beq.n 8002764 { return HAL_ERROR; 80026be: 2301 movs r3, #1 80026c0: e081 b.n 80027c6 } while (hi2c->XferSize > 0U) { /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 80026c2: 697a ldr r2, [r7, #20] 80026c4: 6ab9 ldr r1, [r7, #40] ; 0x28 80026c6: 68f8 ldr r0, [r7, #12] 80026c8: f000 fd42 bl 8003150 80026cc: 4603 mov r3, r0 80026ce: 2b00 cmp r3, #0 80026d0: d00d beq.n 80026ee { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 80026d2: 68fb ldr r3, [r7, #12] 80026d4: 6c1b ldr r3, [r3, #64] ; 0x40 80026d6: 2b04 cmp r3, #4 80026d8: d107 bne.n 80026ea { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 80026da: 68fb ldr r3, [r7, #12] 80026dc: 681b ldr r3, [r3, #0] 80026de: 681a ldr r2, [r3, #0] 80026e0: 68fb ldr r3, [r7, #12] 80026e2: 681b ldr r3, [r3, #0] 80026e4: f442 7200 orr.w r2, r2, #512 ; 0x200 80026e8: 601a str r2, [r3, #0] } return HAL_ERROR; 80026ea: 2301 movs r3, #1 80026ec: e06b b.n 80027c6 } /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; 80026ee: 68fb ldr r3, [r7, #12] 80026f0: 6a5b ldr r3, [r3, #36] ; 0x24 80026f2: 781a ldrb r2, [r3, #0] 80026f4: 68fb ldr r3, [r7, #12] 80026f6: 681b ldr r3, [r3, #0] 80026f8: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 80026fa: 68fb ldr r3, [r7, #12] 80026fc: 6a5b ldr r3, [r3, #36] ; 0x24 80026fe: 1c5a adds r2, r3, #1 8002700: 68fb ldr r3, [r7, #12] 8002702: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002704: 68fb ldr r3, [r7, #12] 8002706: 8d1b ldrh r3, [r3, #40] ; 0x28 8002708: 3b01 subs r3, #1 800270a: b29a uxth r2, r3 800270c: 68fb ldr r3, [r7, #12] 800270e: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002710: 68fb ldr r3, [r7, #12] 8002712: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002714: b29b uxth r3, r3 8002716: 3b01 subs r3, #1 8002718: b29a uxth r2, r3 800271a: 68fb ldr r3, [r7, #12] 800271c: 855a strh r2, [r3, #42] ; 0x2a if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 800271e: 68fb ldr r3, [r7, #12] 8002720: 681b ldr r3, [r3, #0] 8002722: 695b ldr r3, [r3, #20] 8002724: f003 0304 and.w r3, r3, #4 8002728: 2b04 cmp r3, #4 800272a: d11b bne.n 8002764 800272c: 68fb ldr r3, [r7, #12] 800272e: 8d1b ldrh r3, [r3, #40] ; 0x28 8002730: 2b00 cmp r3, #0 8002732: d017 beq.n 8002764 { /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; 8002734: 68fb ldr r3, [r7, #12] 8002736: 6a5b ldr r3, [r3, #36] ; 0x24 8002738: 781a ldrb r2, [r3, #0] 800273a: 68fb ldr r3, [r7, #12] 800273c: 681b ldr r3, [r3, #0] 800273e: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002740: 68fb ldr r3, [r7, #12] 8002742: 6a5b ldr r3, [r3, #36] ; 0x24 8002744: 1c5a adds r2, r3, #1 8002746: 68fb ldr r3, [r7, #12] 8002748: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 800274a: 68fb ldr r3, [r7, #12] 800274c: 8d1b ldrh r3, [r3, #40] ; 0x28 800274e: 3b01 subs r3, #1 8002750: b29a uxth r2, r3 8002752: 68fb ldr r3, [r7, #12] 8002754: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002756: 68fb ldr r3, [r7, #12] 8002758: 8d5b ldrh r3, [r3, #42] ; 0x2a 800275a: b29b uxth r3, r3 800275c: 3b01 subs r3, #1 800275e: b29a uxth r2, r3 8002760: 68fb ldr r3, [r7, #12] 8002762: 855a strh r2, [r3, #42] ; 0x2a while (hi2c->XferSize > 0U) 8002764: 68fb ldr r3, [r7, #12] 8002766: 8d1b ldrh r3, [r3, #40] ; 0x28 8002768: 2b00 cmp r3, #0 800276a: d1aa bne.n 80026c2 } } /* Wait until BTF flag is set */ if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 800276c: 697a ldr r2, [r7, #20] 800276e: 6ab9 ldr r1, [r7, #40] ; 0x28 8002770: 68f8 ldr r0, [r7, #12] 8002772: f000 fd2e bl 80031d2 8002776: 4603 mov r3, r0 8002778: 2b00 cmp r3, #0 800277a: d00d beq.n 8002798 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 800277c: 68fb ldr r3, [r7, #12] 800277e: 6c1b ldr r3, [r3, #64] ; 0x40 8002780: 2b04 cmp r3, #4 8002782: d107 bne.n 8002794 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002784: 68fb ldr r3, [r7, #12] 8002786: 681b ldr r3, [r3, #0] 8002788: 681a ldr r2, [r3, #0] 800278a: 68fb ldr r3, [r7, #12] 800278c: 681b ldr r3, [r3, #0] 800278e: f442 7200 orr.w r2, r2, #512 ; 0x200 8002792: 601a str r2, [r3, #0] } return HAL_ERROR; 8002794: 2301 movs r3, #1 8002796: e016 b.n 80027c6 } /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002798: 68fb ldr r3, [r7, #12] 800279a: 681b ldr r3, [r3, #0] 800279c: 681a ldr r2, [r3, #0] 800279e: 68fb ldr r3, [r7, #12] 80027a0: 681b ldr r3, [r3, #0] 80027a2: f442 7200 orr.w r2, r2, #512 ; 0x200 80027a6: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 80027a8: 68fb ldr r3, [r7, #12] 80027aa: 2220 movs r2, #32 80027ac: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 80027b0: 68fb ldr r3, [r7, #12] 80027b2: 2200 movs r2, #0 80027b4: f883 203e strb.w r2, [r3, #62] ; 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); 80027b8: 68fb ldr r3, [r7, #12] 80027ba: 2200 movs r2, #0 80027bc: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; 80027c0: 2300 movs r3, #0 80027c2: e000 b.n 80027c6 } else { return HAL_BUSY; 80027c4: 2302 movs r3, #2 } } 80027c6: 4618 mov r0, r3 80027c8: 3718 adds r7, #24 80027ca: 46bd mov sp, r7 80027cc: bd80 pop {r7, pc} 80027ce: bf00 nop 80027d0: 00100002 .word 0x00100002 80027d4: ffff0000 .word 0xffff0000 080027d8 : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 80027d8: b580 push {r7, lr} 80027da: b08c sub sp, #48 ; 0x30 80027dc: af02 add r7, sp, #8 80027de: 60f8 str r0, [r7, #12] 80027e0: 4608 mov r0, r1 80027e2: 4611 mov r1, r2 80027e4: 461a mov r2, r3 80027e6: 4603 mov r3, r0 80027e8: 817b strh r3, [r7, #10] 80027ea: 460b mov r3, r1 80027ec: 813b strh r3, [r7, #8] 80027ee: 4613 mov r3, r2 80027f0: 80fb strh r3, [r7, #6] __IO uint32_t count = 0U; 80027f2: 2300 movs r3, #0 80027f4: 623b str r3, [r7, #32] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); 80027f6: f7ff fab1 bl 8001d5c 80027fa: 6278 str r0, [r7, #36] ; 0x24 /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 80027fc: 68fb ldr r3, [r7, #12] 80027fe: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 8002802: b2db uxtb r3, r3 8002804: 2b20 cmp r3, #32 8002806: f040 8244 bne.w 8002c92 { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 800280a: 6a7b ldr r3, [r7, #36] ; 0x24 800280c: 9300 str r3, [sp, #0] 800280e: 2319 movs r3, #25 8002810: 2201 movs r2, #1 8002812: 4982 ldr r1, [pc, #520] ; (8002a1c ) 8002814: 68f8 ldr r0, [r7, #12] 8002816: f000 fbc5 bl 8002fa4 800281a: 4603 mov r3, r0 800281c: 2b00 cmp r3, #0 800281e: d001 beq.n 8002824 { return HAL_BUSY; 8002820: 2302 movs r3, #2 8002822: e237 b.n 8002c94 } /* Process Locked */ __HAL_LOCK(hi2c); 8002824: 68fb ldr r3, [r7, #12] 8002826: f893 303c ldrb.w r3, [r3, #60] ; 0x3c 800282a: 2b01 cmp r3, #1 800282c: d101 bne.n 8002832 800282e: 2302 movs r3, #2 8002830: e230 b.n 8002c94 8002832: 68fb ldr r3, [r7, #12] 8002834: 2201 movs r2, #1 8002836: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 800283a: 68fb ldr r3, [r7, #12] 800283c: 681b ldr r3, [r3, #0] 800283e: 681b ldr r3, [r3, #0] 8002840: f003 0301 and.w r3, r3, #1 8002844: 2b01 cmp r3, #1 8002846: d007 beq.n 8002858 { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 8002848: 68fb ldr r3, [r7, #12] 800284a: 681b ldr r3, [r3, #0] 800284c: 681a ldr r2, [r3, #0] 800284e: 68fb ldr r3, [r7, #12] 8002850: 681b ldr r3, [r3, #0] 8002852: f042 0201 orr.w r2, r2, #1 8002856: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); 8002858: 68fb ldr r3, [r7, #12] 800285a: 681b ldr r3, [r3, #0] 800285c: 681a ldr r2, [r3, #0] 800285e: 68fb ldr r3, [r7, #12] 8002860: 681b ldr r3, [r3, #0] 8002862: f422 6200 bic.w r2, r2, #2048 ; 0x800 8002866: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_RX; 8002868: 68fb ldr r3, [r7, #12] 800286a: 2222 movs r2, #34 ; 0x22 800286c: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 8002870: 68fb ldr r3, [r7, #12] 8002872: 2240 movs r2, #64 ; 0x40 8002874: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8002878: 68fb ldr r3, [r7, #12] 800287a: 2200 movs r2, #0 800287c: 641a str r2, [r3, #64] ; 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; 800287e: 68fb ldr r3, [r7, #12] 8002880: 6b3a ldr r2, [r7, #48] ; 0x30 8002882: 625a str r2, [r3, #36] ; 0x24 hi2c->XferCount = Size; 8002884: 68fb ldr r3, [r7, #12] 8002886: 8eba ldrh r2, [r7, #52] ; 0x34 8002888: 855a strh r2, [r3, #42] ; 0x2a hi2c->XferSize = hi2c->XferCount; 800288a: 68fb ldr r3, [r7, #12] 800288c: 8d5b ldrh r3, [r3, #42] ; 0x2a 800288e: b29a uxth r2, r3 8002890: 68fb ldr r3, [r7, #12] 8002892: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8002894: 68fb ldr r3, [r7, #12] 8002896: 4a62 ldr r2, [pc, #392] ; (8002a20 ) 8002898: 62da str r2, [r3, #44] ; 0x2c /* Send Slave Address and Memory Address */ if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 800289a: 88f8 ldrh r0, [r7, #6] 800289c: 893a ldrh r2, [r7, #8] 800289e: 8979 ldrh r1, [r7, #10] 80028a0: 6a7b ldr r3, [r7, #36] ; 0x24 80028a2: 9301 str r3, [sp, #4] 80028a4: 6bbb ldr r3, [r7, #56] ; 0x38 80028a6: 9300 str r3, [sp, #0] 80028a8: 4603 mov r3, r0 80028aa: 68f8 ldr r0, [r7, #12] 80028ac: f000 fa92 bl 8002dd4 80028b0: 4603 mov r3, r0 80028b2: 2b00 cmp r3, #0 80028b4: d001 beq.n 80028ba { return HAL_ERROR; 80028b6: 2301 movs r3, #1 80028b8: e1ec b.n 8002c94 } if (hi2c->XferSize == 0U) 80028ba: 68fb ldr r3, [r7, #12] 80028bc: 8d1b ldrh r3, [r3, #40] ; 0x28 80028be: 2b00 cmp r3, #0 80028c0: d113 bne.n 80028ea { /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80028c2: 2300 movs r3, #0 80028c4: 61fb str r3, [r7, #28] 80028c6: 68fb ldr r3, [r7, #12] 80028c8: 681b ldr r3, [r3, #0] 80028ca: 695b ldr r3, [r3, #20] 80028cc: 61fb str r3, [r7, #28] 80028ce: 68fb ldr r3, [r7, #12] 80028d0: 681b ldr r3, [r3, #0] 80028d2: 699b ldr r3, [r3, #24] 80028d4: 61fb str r3, [r7, #28] 80028d6: 69fb ldr r3, [r7, #28] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 80028d8: 68fb ldr r3, [r7, #12] 80028da: 681b ldr r3, [r3, #0] 80028dc: 681a ldr r2, [r3, #0] 80028de: 68fb ldr r3, [r7, #12] 80028e0: 681b ldr r3, [r3, #0] 80028e2: f442 7200 orr.w r2, r2, #512 ; 0x200 80028e6: 601a str r2, [r3, #0] 80028e8: e1c0 b.n 8002c6c } else if (hi2c->XferSize == 1U) 80028ea: 68fb ldr r3, [r7, #12] 80028ec: 8d1b ldrh r3, [r3, #40] ; 0x28 80028ee: 2b01 cmp r3, #1 80028f0: d11e bne.n 8002930 { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 80028f2: 68fb ldr r3, [r7, #12] 80028f4: 681b ldr r3, [r3, #0] 80028f6: 681a ldr r2, [r3, #0] 80028f8: 68fb ldr r3, [r7, #12] 80028fa: 681b ldr r3, [r3, #0] 80028fc: f422 6280 bic.w r2, r2, #1024 ; 0x400 8002900: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); 8002902: b672 cpsid i } 8002904: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8002906: 2300 movs r3, #0 8002908: 61bb str r3, [r7, #24] 800290a: 68fb ldr r3, [r7, #12] 800290c: 681b ldr r3, [r3, #0] 800290e: 695b ldr r3, [r3, #20] 8002910: 61bb str r3, [r7, #24] 8002912: 68fb ldr r3, [r7, #12] 8002914: 681b ldr r3, [r3, #0] 8002916: 699b ldr r3, [r3, #24] 8002918: 61bb str r3, [r7, #24] 800291a: 69bb ldr r3, [r7, #24] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 800291c: 68fb ldr r3, [r7, #12] 800291e: 681b ldr r3, [r3, #0] 8002920: 681a ldr r2, [r3, #0] 8002922: 68fb ldr r3, [r7, #12] 8002924: 681b ldr r3, [r3, #0] 8002926: f442 7200 orr.w r2, r2, #512 ; 0x200 800292a: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); 800292c: b662 cpsie i } 800292e: e035 b.n 800299c /* Re-enable IRQs */ __enable_irq(); } else if (hi2c->XferSize == 2U) 8002930: 68fb ldr r3, [r7, #12] 8002932: 8d1b ldrh r3, [r3, #40] ; 0x28 8002934: 2b02 cmp r3, #2 8002936: d11e bne.n 8002976 { /* Enable Pos */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); 8002938: 68fb ldr r3, [r7, #12] 800293a: 681b ldr r3, [r3, #0] 800293c: 681a ldr r2, [r3, #0] 800293e: 68fb ldr r3, [r7, #12] 8002940: 681b ldr r3, [r3, #0] 8002942: f442 6200 orr.w r2, r2, #2048 ; 0x800 8002946: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); 8002948: b672 cpsid i } 800294a: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 800294c: 2300 movs r3, #0 800294e: 617b str r3, [r7, #20] 8002950: 68fb ldr r3, [r7, #12] 8002952: 681b ldr r3, [r3, #0] 8002954: 695b ldr r3, [r3, #20] 8002956: 617b str r3, [r7, #20] 8002958: 68fb ldr r3, [r7, #12] 800295a: 681b ldr r3, [r3, #0] 800295c: 699b ldr r3, [r3, #24] 800295e: 617b str r3, [r7, #20] 8002960: 697b ldr r3, [r7, #20] /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8002962: 68fb ldr r3, [r7, #12] 8002964: 681b ldr r3, [r3, #0] 8002966: 681a ldr r2, [r3, #0] 8002968: 68fb ldr r3, [r7, #12] 800296a: 681b ldr r3, [r3, #0] 800296c: f422 6280 bic.w r2, r2, #1024 ; 0x400 8002970: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); 8002972: b662 cpsie i } 8002974: e012 b.n 800299c __enable_irq(); } else { /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8002976: 68fb ldr r3, [r7, #12] 8002978: 681b ldr r3, [r3, #0] 800297a: 681a ldr r2, [r3, #0] 800297c: 68fb ldr r3, [r7, #12] 800297e: 681b ldr r3, [r3, #0] 8002980: f442 6280 orr.w r2, r2, #1024 ; 0x400 8002984: 601a str r2, [r3, #0] /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8002986: 2300 movs r3, #0 8002988: 613b str r3, [r7, #16] 800298a: 68fb ldr r3, [r7, #12] 800298c: 681b ldr r3, [r3, #0] 800298e: 695b ldr r3, [r3, #20] 8002990: 613b str r3, [r7, #16] 8002992: 68fb ldr r3, [r7, #12] 8002994: 681b ldr r3, [r3, #0] 8002996: 699b ldr r3, [r3, #24] 8002998: 613b str r3, [r7, #16] 800299a: 693b ldr r3, [r7, #16] } while (hi2c->XferSize > 0U) 800299c: e166 b.n 8002c6c { if (hi2c->XferSize <= 3U) 800299e: 68fb ldr r3, [r7, #12] 80029a0: 8d1b ldrh r3, [r3, #40] ; 0x28 80029a2: 2b03 cmp r3, #3 80029a4: f200 811f bhi.w 8002be6 { /* One byte */ if (hi2c->XferSize == 1U) 80029a8: 68fb ldr r3, [r7, #12] 80029aa: 8d1b ldrh r3, [r3, #40] ; 0x28 80029ac: 2b01 cmp r3, #1 80029ae: d123 bne.n 80029f8 { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 80029b0: 6a7a ldr r2, [r7, #36] ; 0x24 80029b2: 6bb9 ldr r1, [r7, #56] ; 0x38 80029b4: 68f8 ldr r0, [r7, #12] 80029b6: f000 fc4d bl 8003254 80029ba: 4603 mov r3, r0 80029bc: 2b00 cmp r3, #0 80029be: d001 beq.n 80029c4 { return HAL_ERROR; 80029c0: 2301 movs r3, #1 80029c2: e167 b.n 8002c94 } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 80029c4: 68fb ldr r3, [r7, #12] 80029c6: 681b ldr r3, [r3, #0] 80029c8: 691a ldr r2, [r3, #16] 80029ca: 68fb ldr r3, [r7, #12] 80029cc: 6a5b ldr r3, [r3, #36] ; 0x24 80029ce: b2d2 uxtb r2, r2 80029d0: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 80029d2: 68fb ldr r3, [r7, #12] 80029d4: 6a5b ldr r3, [r3, #36] ; 0x24 80029d6: 1c5a adds r2, r3, #1 80029d8: 68fb ldr r3, [r7, #12] 80029da: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 80029dc: 68fb ldr r3, [r7, #12] 80029de: 8d1b ldrh r3, [r3, #40] ; 0x28 80029e0: 3b01 subs r3, #1 80029e2: b29a uxth r2, r3 80029e4: 68fb ldr r3, [r7, #12] 80029e6: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 80029e8: 68fb ldr r3, [r7, #12] 80029ea: 8d5b ldrh r3, [r3, #42] ; 0x2a 80029ec: b29b uxth r3, r3 80029ee: 3b01 subs r3, #1 80029f0: b29a uxth r2, r3 80029f2: 68fb ldr r3, [r7, #12] 80029f4: 855a strh r2, [r3, #42] ; 0x2a 80029f6: e139 b.n 8002c6c } /* Two bytes */ else if (hi2c->XferSize == 2U) 80029f8: 68fb ldr r3, [r7, #12] 80029fa: 8d1b ldrh r3, [r3, #40] ; 0x28 80029fc: 2b02 cmp r3, #2 80029fe: d152 bne.n 8002aa6 { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8002a00: 6a7b ldr r3, [r7, #36] ; 0x24 8002a02: 9300 str r3, [sp, #0] 8002a04: 6bbb ldr r3, [r7, #56] ; 0x38 8002a06: 2200 movs r2, #0 8002a08: 4906 ldr r1, [pc, #24] ; (8002a24 ) 8002a0a: 68f8 ldr r0, [r7, #12] 8002a0c: f000 faca bl 8002fa4 8002a10: 4603 mov r3, r0 8002a12: 2b00 cmp r3, #0 8002a14: d008 beq.n 8002a28 { return HAL_ERROR; 8002a16: 2301 movs r3, #1 8002a18: e13c b.n 8002c94 8002a1a: bf00 nop 8002a1c: 00100002 .word 0x00100002 8002a20: ffff0000 .word 0xffff0000 8002a24: 00010004 .word 0x00010004 __ASM volatile ("cpsid i" : : : "memory"); 8002a28: b672 cpsid i } 8002a2a: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002a2c: 68fb ldr r3, [r7, #12] 8002a2e: 681b ldr r3, [r3, #0] 8002a30: 681a ldr r2, [r3, #0] 8002a32: 68fb ldr r3, [r7, #12] 8002a34: 681b ldr r3, [r3, #0] 8002a36: f442 7200 orr.w r2, r2, #512 ; 0x200 8002a3a: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002a3c: 68fb ldr r3, [r7, #12] 8002a3e: 681b ldr r3, [r3, #0] 8002a40: 691a ldr r2, [r3, #16] 8002a42: 68fb ldr r3, [r7, #12] 8002a44: 6a5b ldr r3, [r3, #36] ; 0x24 8002a46: b2d2 uxtb r2, r2 8002a48: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002a4a: 68fb ldr r3, [r7, #12] 8002a4c: 6a5b ldr r3, [r3, #36] ; 0x24 8002a4e: 1c5a adds r2, r3, #1 8002a50: 68fb ldr r3, [r7, #12] 8002a52: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002a54: 68fb ldr r3, [r7, #12] 8002a56: 8d1b ldrh r3, [r3, #40] ; 0x28 8002a58: 3b01 subs r3, #1 8002a5a: b29a uxth r2, r3 8002a5c: 68fb ldr r3, [r7, #12] 8002a5e: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002a60: 68fb ldr r3, [r7, #12] 8002a62: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002a64: b29b uxth r3, r3 8002a66: 3b01 subs r3, #1 8002a68: b29a uxth r2, r3 8002a6a: 68fb ldr r3, [r7, #12] 8002a6c: 855a strh r2, [r3, #42] ; 0x2a __ASM volatile ("cpsie i" : : : "memory"); 8002a6e: b662 cpsie i } 8002a70: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002a72: 68fb ldr r3, [r7, #12] 8002a74: 681b ldr r3, [r3, #0] 8002a76: 691a ldr r2, [r3, #16] 8002a78: 68fb ldr r3, [r7, #12] 8002a7a: 6a5b ldr r3, [r3, #36] ; 0x24 8002a7c: b2d2 uxtb r2, r2 8002a7e: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002a80: 68fb ldr r3, [r7, #12] 8002a82: 6a5b ldr r3, [r3, #36] ; 0x24 8002a84: 1c5a adds r2, r3, #1 8002a86: 68fb ldr r3, [r7, #12] 8002a88: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002a8a: 68fb ldr r3, [r7, #12] 8002a8c: 8d1b ldrh r3, [r3, #40] ; 0x28 8002a8e: 3b01 subs r3, #1 8002a90: b29a uxth r2, r3 8002a92: 68fb ldr r3, [r7, #12] 8002a94: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002a96: 68fb ldr r3, [r7, #12] 8002a98: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002a9a: b29b uxth r3, r3 8002a9c: 3b01 subs r3, #1 8002a9e: b29a uxth r2, r3 8002aa0: 68fb ldr r3, [r7, #12] 8002aa2: 855a strh r2, [r3, #42] ; 0x2a 8002aa4: e0e2 b.n 8002c6c } /* 3 Last bytes */ else { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8002aa6: 6a7b ldr r3, [r7, #36] ; 0x24 8002aa8: 9300 str r3, [sp, #0] 8002aaa: 6bbb ldr r3, [r7, #56] ; 0x38 8002aac: 2200 movs r2, #0 8002aae: 497b ldr r1, [pc, #492] ; (8002c9c ) 8002ab0: 68f8 ldr r0, [r7, #12] 8002ab2: f000 fa77 bl 8002fa4 8002ab6: 4603 mov r3, r0 8002ab8: 2b00 cmp r3, #0 8002aba: d001 beq.n 8002ac0 { return HAL_ERROR; 8002abc: 2301 movs r3, #1 8002abe: e0e9 b.n 8002c94 } /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8002ac0: 68fb ldr r3, [r7, #12] 8002ac2: 681b ldr r3, [r3, #0] 8002ac4: 681a ldr r2, [r3, #0] 8002ac6: 68fb ldr r3, [r7, #12] 8002ac8: 681b ldr r3, [r3, #0] 8002aca: f422 6280 bic.w r2, r2, #1024 ; 0x400 8002ace: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); 8002ad0: b672 cpsid i } 8002ad2: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002ad4: 68fb ldr r3, [r7, #12] 8002ad6: 681b ldr r3, [r3, #0] 8002ad8: 691a ldr r2, [r3, #16] 8002ada: 68fb ldr r3, [r7, #12] 8002adc: 6a5b ldr r3, [r3, #36] ; 0x24 8002ade: b2d2 uxtb r2, r2 8002ae0: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002ae2: 68fb ldr r3, [r7, #12] 8002ae4: 6a5b ldr r3, [r3, #36] ; 0x24 8002ae6: 1c5a adds r2, r3, #1 8002ae8: 68fb ldr r3, [r7, #12] 8002aea: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002aec: 68fb ldr r3, [r7, #12] 8002aee: 8d1b ldrh r3, [r3, #40] ; 0x28 8002af0: 3b01 subs r3, #1 8002af2: b29a uxth r2, r3 8002af4: 68fb ldr r3, [r7, #12] 8002af6: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002af8: 68fb ldr r3, [r7, #12] 8002afa: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002afc: b29b uxth r3, r3 8002afe: 3b01 subs r3, #1 8002b00: b29a uxth r2, r3 8002b02: 68fb ldr r3, [r7, #12] 8002b04: 855a strh r2, [r3, #42] ; 0x2a /* Wait until BTF flag is set */ count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U); 8002b06: 4b66 ldr r3, [pc, #408] ; (8002ca0 ) 8002b08: 681b ldr r3, [r3, #0] 8002b0a: 08db lsrs r3, r3, #3 8002b0c: 4a65 ldr r2, [pc, #404] ; (8002ca4 ) 8002b0e: fba2 2303 umull r2, r3, r2, r3 8002b12: 0a1a lsrs r2, r3, #8 8002b14: 4613 mov r3, r2 8002b16: 009b lsls r3, r3, #2 8002b18: 4413 add r3, r2 8002b1a: 00da lsls r2, r3, #3 8002b1c: 1ad3 subs r3, r2, r3 8002b1e: 623b str r3, [r7, #32] do { count--; 8002b20: 6a3b ldr r3, [r7, #32] 8002b22: 3b01 subs r3, #1 8002b24: 623b str r3, [r7, #32] if (count == 0U) 8002b26: 6a3b ldr r3, [r7, #32] 8002b28: 2b00 cmp r3, #0 8002b2a: d118 bne.n 8002b5e { hi2c->PreviousState = I2C_STATE_NONE; 8002b2c: 68fb ldr r3, [r7, #12] 8002b2e: 2200 movs r2, #0 8002b30: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8002b32: 68fb ldr r3, [r7, #12] 8002b34: 2220 movs r2, #32 8002b36: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002b3a: 68fb ldr r3, [r7, #12] 8002b3c: 2200 movs r2, #0 8002b3e: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8002b42: 68fb ldr r3, [r7, #12] 8002b44: 6c1b ldr r3, [r3, #64] ; 0x40 8002b46: f043 0220 orr.w r2, r3, #32 8002b4a: 68fb ldr r3, [r7, #12] 8002b4c: 641a str r2, [r3, #64] ; 0x40 __ASM volatile ("cpsie i" : : : "memory"); 8002b4e: b662 cpsie i } 8002b50: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002b52: 68fb ldr r3, [r7, #12] 8002b54: 2200 movs r2, #0 8002b56: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8002b5a: 2301 movs r3, #1 8002b5c: e09a b.n 8002c94 } } while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET); 8002b5e: 68fb ldr r3, [r7, #12] 8002b60: 681b ldr r3, [r3, #0] 8002b62: 695b ldr r3, [r3, #20] 8002b64: f003 0304 and.w r3, r3, #4 8002b68: 2b04 cmp r3, #4 8002b6a: d1d9 bne.n 8002b20 /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002b6c: 68fb ldr r3, [r7, #12] 8002b6e: 681b ldr r3, [r3, #0] 8002b70: 681a ldr r2, [r3, #0] 8002b72: 68fb ldr r3, [r7, #12] 8002b74: 681b ldr r3, [r3, #0] 8002b76: f442 7200 orr.w r2, r2, #512 ; 0x200 8002b7a: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002b7c: 68fb ldr r3, [r7, #12] 8002b7e: 681b ldr r3, [r3, #0] 8002b80: 691a ldr r2, [r3, #16] 8002b82: 68fb ldr r3, [r7, #12] 8002b84: 6a5b ldr r3, [r3, #36] ; 0x24 8002b86: b2d2 uxtb r2, r2 8002b88: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002b8a: 68fb ldr r3, [r7, #12] 8002b8c: 6a5b ldr r3, [r3, #36] ; 0x24 8002b8e: 1c5a adds r2, r3, #1 8002b90: 68fb ldr r3, [r7, #12] 8002b92: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002b94: 68fb ldr r3, [r7, #12] 8002b96: 8d1b ldrh r3, [r3, #40] ; 0x28 8002b98: 3b01 subs r3, #1 8002b9a: b29a uxth r2, r3 8002b9c: 68fb ldr r3, [r7, #12] 8002b9e: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002ba0: 68fb ldr r3, [r7, #12] 8002ba2: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002ba4: b29b uxth r3, r3 8002ba6: 3b01 subs r3, #1 8002ba8: b29a uxth r2, r3 8002baa: 68fb ldr r3, [r7, #12] 8002bac: 855a strh r2, [r3, #42] ; 0x2a __ASM volatile ("cpsie i" : : : "memory"); 8002bae: b662 cpsie i } 8002bb0: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002bb2: 68fb ldr r3, [r7, #12] 8002bb4: 681b ldr r3, [r3, #0] 8002bb6: 691a ldr r2, [r3, #16] 8002bb8: 68fb ldr r3, [r7, #12] 8002bba: 6a5b ldr r3, [r3, #36] ; 0x24 8002bbc: b2d2 uxtb r2, r2 8002bbe: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002bc0: 68fb ldr r3, [r7, #12] 8002bc2: 6a5b ldr r3, [r3, #36] ; 0x24 8002bc4: 1c5a adds r2, r3, #1 8002bc6: 68fb ldr r3, [r7, #12] 8002bc8: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002bca: 68fb ldr r3, [r7, #12] 8002bcc: 8d1b ldrh r3, [r3, #40] ; 0x28 8002bce: 3b01 subs r3, #1 8002bd0: b29a uxth r2, r3 8002bd2: 68fb ldr r3, [r7, #12] 8002bd4: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002bd6: 68fb ldr r3, [r7, #12] 8002bd8: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002bda: b29b uxth r3, r3 8002bdc: 3b01 subs r3, #1 8002bde: b29a uxth r2, r3 8002be0: 68fb ldr r3, [r7, #12] 8002be2: 855a strh r2, [r3, #42] ; 0x2a 8002be4: e042 b.n 8002c6c } } else { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8002be6: 6a7a ldr r2, [r7, #36] ; 0x24 8002be8: 6bb9 ldr r1, [r7, #56] ; 0x38 8002bea: 68f8 ldr r0, [r7, #12] 8002bec: f000 fb32 bl 8003254 8002bf0: 4603 mov r3, r0 8002bf2: 2b00 cmp r3, #0 8002bf4: d001 beq.n 8002bfa { return HAL_ERROR; 8002bf6: 2301 movs r3, #1 8002bf8: e04c b.n 8002c94 } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002bfa: 68fb ldr r3, [r7, #12] 8002bfc: 681b ldr r3, [r3, #0] 8002bfe: 691a ldr r2, [r3, #16] 8002c00: 68fb ldr r3, [r7, #12] 8002c02: 6a5b ldr r3, [r3, #36] ; 0x24 8002c04: b2d2 uxtb r2, r2 8002c06: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002c08: 68fb ldr r3, [r7, #12] 8002c0a: 6a5b ldr r3, [r3, #36] ; 0x24 8002c0c: 1c5a adds r2, r3, #1 8002c0e: 68fb ldr r3, [r7, #12] 8002c10: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002c12: 68fb ldr r3, [r7, #12] 8002c14: 8d1b ldrh r3, [r3, #40] ; 0x28 8002c16: 3b01 subs r3, #1 8002c18: b29a uxth r2, r3 8002c1a: 68fb ldr r3, [r7, #12] 8002c1c: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002c1e: 68fb ldr r3, [r7, #12] 8002c20: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002c22: b29b uxth r3, r3 8002c24: 3b01 subs r3, #1 8002c26: b29a uxth r2, r3 8002c28: 68fb ldr r3, [r7, #12] 8002c2a: 855a strh r2, [r3, #42] ; 0x2a if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 8002c2c: 68fb ldr r3, [r7, #12] 8002c2e: 681b ldr r3, [r3, #0] 8002c30: 695b ldr r3, [r3, #20] 8002c32: f003 0304 and.w r3, r3, #4 8002c36: 2b04 cmp r3, #4 8002c38: d118 bne.n 8002c6c { /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002c3a: 68fb ldr r3, [r7, #12] 8002c3c: 681b ldr r3, [r3, #0] 8002c3e: 691a ldr r2, [r3, #16] 8002c40: 68fb ldr r3, [r7, #12] 8002c42: 6a5b ldr r3, [r3, #36] ; 0x24 8002c44: b2d2 uxtb r2, r2 8002c46: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002c48: 68fb ldr r3, [r7, #12] 8002c4a: 6a5b ldr r3, [r3, #36] ; 0x24 8002c4c: 1c5a adds r2, r3, #1 8002c4e: 68fb ldr r3, [r7, #12] 8002c50: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002c52: 68fb ldr r3, [r7, #12] 8002c54: 8d1b ldrh r3, [r3, #40] ; 0x28 8002c56: 3b01 subs r3, #1 8002c58: b29a uxth r2, r3 8002c5a: 68fb ldr r3, [r7, #12] 8002c5c: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002c5e: 68fb ldr r3, [r7, #12] 8002c60: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002c62: b29b uxth r3, r3 8002c64: 3b01 subs r3, #1 8002c66: b29a uxth r2, r3 8002c68: 68fb ldr r3, [r7, #12] 8002c6a: 855a strh r2, [r3, #42] ; 0x2a while (hi2c->XferSize > 0U) 8002c6c: 68fb ldr r3, [r7, #12] 8002c6e: 8d1b ldrh r3, [r3, #40] ; 0x28 8002c70: 2b00 cmp r3, #0 8002c72: f47f ae94 bne.w 800299e } } } hi2c->State = HAL_I2C_STATE_READY; 8002c76: 68fb ldr r3, [r7, #12] 8002c78: 2220 movs r2, #32 8002c7a: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002c7e: 68fb ldr r3, [r7, #12] 8002c80: 2200 movs r2, #0 8002c82: f883 203e strb.w r2, [r3, #62] ; 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002c86: 68fb ldr r3, [r7, #12] 8002c88: 2200 movs r2, #0 8002c8a: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; 8002c8e: 2300 movs r3, #0 8002c90: e000 b.n 8002c94 } else { return HAL_BUSY; 8002c92: 2302 movs r3, #2 } } 8002c94: 4618 mov r0, r3 8002c96: 3728 adds r7, #40 ; 0x28 8002c98: 46bd mov sp, r7 8002c9a: bd80 pop {r7, pc} 8002c9c: 00010004 .word 0x00010004 8002ca0: 20000000 .word 0x20000000 8002ca4: 14f8b589 .word 0x14f8b589 08002ca8 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) { 8002ca8: b580 push {r7, lr} 8002caa: b088 sub sp, #32 8002cac: af02 add r7, sp, #8 8002cae: 60f8 str r0, [r7, #12] 8002cb0: 4608 mov r0, r1 8002cb2: 4611 mov r1, r2 8002cb4: 461a mov r2, r3 8002cb6: 4603 mov r3, r0 8002cb8: 817b strh r3, [r7, #10] 8002cba: 460b mov r3, r1 8002cbc: 813b strh r3, [r7, #8] 8002cbe: 4613 mov r3, r2 8002cc0: 80fb strh r3, [r7, #6] /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); 8002cc2: 68fb ldr r3, [r7, #12] 8002cc4: 681b ldr r3, [r3, #0] 8002cc6: 681a ldr r2, [r3, #0] 8002cc8: 68fb ldr r3, [r7, #12] 8002cca: 681b ldr r3, [r3, #0] 8002ccc: f442 7280 orr.w r2, r2, #256 ; 0x100 8002cd0: 601a str r2, [r3, #0] /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8002cd2: 6a7b ldr r3, [r7, #36] ; 0x24 8002cd4: 9300 str r3, [sp, #0] 8002cd6: 6a3b ldr r3, [r7, #32] 8002cd8: 2200 movs r2, #0 8002cda: f04f 1101 mov.w r1, #65537 ; 0x10001 8002cde: 68f8 ldr r0, [r7, #12] 8002ce0: f000 f960 bl 8002fa4 8002ce4: 4603 mov r3, r0 8002ce6: 2b00 cmp r3, #0 8002ce8: d00d beq.n 8002d06 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) 8002cea: 68fb ldr r3, [r7, #12] 8002cec: 681b ldr r3, [r3, #0] 8002cee: 681b ldr r3, [r3, #0] 8002cf0: f403 7380 and.w r3, r3, #256 ; 0x100 8002cf4: f5b3 7f80 cmp.w r3, #256 ; 0x100 8002cf8: d103 bne.n 8002d02 { hi2c->ErrorCode = HAL_I2C_WRONG_START; 8002cfa: 68fb ldr r3, [r7, #12] 8002cfc: f44f 7200 mov.w r2, #512 ; 0x200 8002d00: 641a str r2, [r3, #64] ; 0x40 } return HAL_TIMEOUT; 8002d02: 2303 movs r3, #3 8002d04: e05f b.n 8002dc6 } /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 8002d06: 897b ldrh r3, [r7, #10] 8002d08: b2db uxtb r3, r3 8002d0a: 461a mov r2, r3 8002d0c: 68fb ldr r3, [r7, #12] 8002d0e: 681b ldr r3, [r3, #0] 8002d10: f002 02fe and.w r2, r2, #254 ; 0xfe 8002d14: 611a str r2, [r3, #16] /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8002d16: 6a7b ldr r3, [r7, #36] ; 0x24 8002d18: 6a3a ldr r2, [r7, #32] 8002d1a: 492d ldr r1, [pc, #180] ; (8002dd0 ) 8002d1c: 68f8 ldr r0, [r7, #12] 8002d1e: f000 f998 bl 8003052 8002d22: 4603 mov r3, r0 8002d24: 2b00 cmp r3, #0 8002d26: d001 beq.n 8002d2c { return HAL_ERROR; 8002d28: 2301 movs r3, #1 8002d2a: e04c b.n 8002dc6 } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8002d2c: 2300 movs r3, #0 8002d2e: 617b str r3, [r7, #20] 8002d30: 68fb ldr r3, [r7, #12] 8002d32: 681b ldr r3, [r3, #0] 8002d34: 695b ldr r3, [r3, #20] 8002d36: 617b str r3, [r7, #20] 8002d38: 68fb ldr r3, [r7, #12] 8002d3a: 681b ldr r3, [r3, #0] 8002d3c: 699b ldr r3, [r3, #24] 8002d3e: 617b str r3, [r7, #20] 8002d40: 697b ldr r3, [r7, #20] /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002d42: 6a7a ldr r2, [r7, #36] ; 0x24 8002d44: 6a39 ldr r1, [r7, #32] 8002d46: 68f8 ldr r0, [r7, #12] 8002d48: f000 fa02 bl 8003150 8002d4c: 4603 mov r3, r0 8002d4e: 2b00 cmp r3, #0 8002d50: d00d beq.n 8002d6e { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002d52: 68fb ldr r3, [r7, #12] 8002d54: 6c1b ldr r3, [r3, #64] ; 0x40 8002d56: 2b04 cmp r3, #4 8002d58: d107 bne.n 8002d6a { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002d5a: 68fb ldr r3, [r7, #12] 8002d5c: 681b ldr r3, [r3, #0] 8002d5e: 681a ldr r2, [r3, #0] 8002d60: 68fb ldr r3, [r7, #12] 8002d62: 681b ldr r3, [r3, #0] 8002d64: f442 7200 orr.w r2, r2, #512 ; 0x200 8002d68: 601a str r2, [r3, #0] } return HAL_ERROR; 8002d6a: 2301 movs r3, #1 8002d6c: e02b b.n 8002dc6 } /* If Memory address size is 8Bit */ if (MemAddSize == I2C_MEMADD_SIZE_8BIT) 8002d6e: 88fb ldrh r3, [r7, #6] 8002d70: 2b01 cmp r3, #1 8002d72: d105 bne.n 8002d80 { /* Send Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8002d74: 893b ldrh r3, [r7, #8] 8002d76: b2da uxtb r2, r3 8002d78: 68fb ldr r3, [r7, #12] 8002d7a: 681b ldr r3, [r3, #0] 8002d7c: 611a str r2, [r3, #16] 8002d7e: e021 b.n 8002dc4 } /* If Memory address size is 16Bit */ else { /* Send MSB of Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 8002d80: 893b ldrh r3, [r7, #8] 8002d82: 0a1b lsrs r3, r3, #8 8002d84: b29b uxth r3, r3 8002d86: b2da uxtb r2, r3 8002d88: 68fb ldr r3, [r7, #12] 8002d8a: 681b ldr r3, [r3, #0] 8002d8c: 611a str r2, [r3, #16] /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002d8e: 6a7a ldr r2, [r7, #36] ; 0x24 8002d90: 6a39 ldr r1, [r7, #32] 8002d92: 68f8 ldr r0, [r7, #12] 8002d94: f000 f9dc bl 8003150 8002d98: 4603 mov r3, r0 8002d9a: 2b00 cmp r3, #0 8002d9c: d00d beq.n 8002dba { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002d9e: 68fb ldr r3, [r7, #12] 8002da0: 6c1b ldr r3, [r3, #64] ; 0x40 8002da2: 2b04 cmp r3, #4 8002da4: d107 bne.n 8002db6 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002da6: 68fb ldr r3, [r7, #12] 8002da8: 681b ldr r3, [r3, #0] 8002daa: 681a ldr r2, [r3, #0] 8002dac: 68fb ldr r3, [r7, #12] 8002dae: 681b ldr r3, [r3, #0] 8002db0: f442 7200 orr.w r2, r2, #512 ; 0x200 8002db4: 601a str r2, [r3, #0] } return HAL_ERROR; 8002db6: 2301 movs r3, #1 8002db8: e005 b.n 8002dc6 } /* Send LSB of Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8002dba: 893b ldrh r3, [r7, #8] 8002dbc: b2da uxtb r2, r3 8002dbe: 68fb ldr r3, [r7, #12] 8002dc0: 681b ldr r3, [r3, #0] 8002dc2: 611a str r2, [r3, #16] } return HAL_OK; 8002dc4: 2300 movs r3, #0 } 8002dc6: 4618 mov r0, r3 8002dc8: 3718 adds r7, #24 8002dca: 46bd mov sp, r7 8002dcc: bd80 pop {r7, pc} 8002dce: bf00 nop 8002dd0: 00010002 .word 0x00010002 08002dd4 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) { 8002dd4: b580 push {r7, lr} 8002dd6: b088 sub sp, #32 8002dd8: af02 add r7, sp, #8 8002dda: 60f8 str r0, [r7, #12] 8002ddc: 4608 mov r0, r1 8002dde: 4611 mov r1, r2 8002de0: 461a mov r2, r3 8002de2: 4603 mov r3, r0 8002de4: 817b strh r3, [r7, #10] 8002de6: 460b mov r3, r1 8002de8: 813b strh r3, [r7, #8] 8002dea: 4613 mov r3, r2 8002dec: 80fb strh r3, [r7, #6] /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8002dee: 68fb ldr r3, [r7, #12] 8002df0: 681b ldr r3, [r3, #0] 8002df2: 681a ldr r2, [r3, #0] 8002df4: 68fb ldr r3, [r7, #12] 8002df6: 681b ldr r3, [r3, #0] 8002df8: f442 6280 orr.w r2, r2, #1024 ; 0x400 8002dfc: 601a str r2, [r3, #0] /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); 8002dfe: 68fb ldr r3, [r7, #12] 8002e00: 681b ldr r3, [r3, #0] 8002e02: 681a ldr r2, [r3, #0] 8002e04: 68fb ldr r3, [r7, #12] 8002e06: 681b ldr r3, [r3, #0] 8002e08: f442 7280 orr.w r2, r2, #256 ; 0x100 8002e0c: 601a str r2, [r3, #0] /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8002e0e: 6a7b ldr r3, [r7, #36] ; 0x24 8002e10: 9300 str r3, [sp, #0] 8002e12: 6a3b ldr r3, [r7, #32] 8002e14: 2200 movs r2, #0 8002e16: f04f 1101 mov.w r1, #65537 ; 0x10001 8002e1a: 68f8 ldr r0, [r7, #12] 8002e1c: f000 f8c2 bl 8002fa4 8002e20: 4603 mov r3, r0 8002e22: 2b00 cmp r3, #0 8002e24: d00d beq.n 8002e42 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) 8002e26: 68fb ldr r3, [r7, #12] 8002e28: 681b ldr r3, [r3, #0] 8002e2a: 681b ldr r3, [r3, #0] 8002e2c: f403 7380 and.w r3, r3, #256 ; 0x100 8002e30: f5b3 7f80 cmp.w r3, #256 ; 0x100 8002e34: d103 bne.n 8002e3e { hi2c->ErrorCode = HAL_I2C_WRONG_START; 8002e36: 68fb ldr r3, [r7, #12] 8002e38: f44f 7200 mov.w r2, #512 ; 0x200 8002e3c: 641a str r2, [r3, #64] ; 0x40 } return HAL_TIMEOUT; 8002e3e: 2303 movs r3, #3 8002e40: e0aa b.n 8002f98 } /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 8002e42: 897b ldrh r3, [r7, #10] 8002e44: b2db uxtb r3, r3 8002e46: 461a mov r2, r3 8002e48: 68fb ldr r3, [r7, #12] 8002e4a: 681b ldr r3, [r3, #0] 8002e4c: f002 02fe and.w r2, r2, #254 ; 0xfe 8002e50: 611a str r2, [r3, #16] /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8002e52: 6a7b ldr r3, [r7, #36] ; 0x24 8002e54: 6a3a ldr r2, [r7, #32] 8002e56: 4952 ldr r1, [pc, #328] ; (8002fa0 ) 8002e58: 68f8 ldr r0, [r7, #12] 8002e5a: f000 f8fa bl 8003052 8002e5e: 4603 mov r3, r0 8002e60: 2b00 cmp r3, #0 8002e62: d001 beq.n 8002e68 { return HAL_ERROR; 8002e64: 2301 movs r3, #1 8002e66: e097 b.n 8002f98 } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8002e68: 2300 movs r3, #0 8002e6a: 617b str r3, [r7, #20] 8002e6c: 68fb ldr r3, [r7, #12] 8002e6e: 681b ldr r3, [r3, #0] 8002e70: 695b ldr r3, [r3, #20] 8002e72: 617b str r3, [r7, #20] 8002e74: 68fb ldr r3, [r7, #12] 8002e76: 681b ldr r3, [r3, #0] 8002e78: 699b ldr r3, [r3, #24] 8002e7a: 617b str r3, [r7, #20] 8002e7c: 697b ldr r3, [r7, #20] /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002e7e: 6a7a ldr r2, [r7, #36] ; 0x24 8002e80: 6a39 ldr r1, [r7, #32] 8002e82: 68f8 ldr r0, [r7, #12] 8002e84: f000 f964 bl 8003150 8002e88: 4603 mov r3, r0 8002e8a: 2b00 cmp r3, #0 8002e8c: d00d beq.n 8002eaa { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002e8e: 68fb ldr r3, [r7, #12] 8002e90: 6c1b ldr r3, [r3, #64] ; 0x40 8002e92: 2b04 cmp r3, #4 8002e94: d107 bne.n 8002ea6 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002e96: 68fb ldr r3, [r7, #12] 8002e98: 681b ldr r3, [r3, #0] 8002e9a: 681a ldr r2, [r3, #0] 8002e9c: 68fb ldr r3, [r7, #12] 8002e9e: 681b ldr r3, [r3, #0] 8002ea0: f442 7200 orr.w r2, r2, #512 ; 0x200 8002ea4: 601a str r2, [r3, #0] } return HAL_ERROR; 8002ea6: 2301 movs r3, #1 8002ea8: e076 b.n 8002f98 } /* If Memory address size is 8Bit */ if (MemAddSize == I2C_MEMADD_SIZE_8BIT) 8002eaa: 88fb ldrh r3, [r7, #6] 8002eac: 2b01 cmp r3, #1 8002eae: d105 bne.n 8002ebc { /* Send Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8002eb0: 893b ldrh r3, [r7, #8] 8002eb2: b2da uxtb r2, r3 8002eb4: 68fb ldr r3, [r7, #12] 8002eb6: 681b ldr r3, [r3, #0] 8002eb8: 611a str r2, [r3, #16] 8002eba: e021 b.n 8002f00 } /* If Memory address size is 16Bit */ else { /* Send MSB of Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 8002ebc: 893b ldrh r3, [r7, #8] 8002ebe: 0a1b lsrs r3, r3, #8 8002ec0: b29b uxth r3, r3 8002ec2: b2da uxtb r2, r3 8002ec4: 68fb ldr r3, [r7, #12] 8002ec6: 681b ldr r3, [r3, #0] 8002ec8: 611a str r2, [r3, #16] /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002eca: 6a7a ldr r2, [r7, #36] ; 0x24 8002ecc: 6a39 ldr r1, [r7, #32] 8002ece: 68f8 ldr r0, [r7, #12] 8002ed0: f000 f93e bl 8003150 8002ed4: 4603 mov r3, r0 8002ed6: 2b00 cmp r3, #0 8002ed8: d00d beq.n 8002ef6 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002eda: 68fb ldr r3, [r7, #12] 8002edc: 6c1b ldr r3, [r3, #64] ; 0x40 8002ede: 2b04 cmp r3, #4 8002ee0: d107 bne.n 8002ef2 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002ee2: 68fb ldr r3, [r7, #12] 8002ee4: 681b ldr r3, [r3, #0] 8002ee6: 681a ldr r2, [r3, #0] 8002ee8: 68fb ldr r3, [r7, #12] 8002eea: 681b ldr r3, [r3, #0] 8002eec: f442 7200 orr.w r2, r2, #512 ; 0x200 8002ef0: 601a str r2, [r3, #0] } return HAL_ERROR; 8002ef2: 2301 movs r3, #1 8002ef4: e050 b.n 8002f98 } /* Send LSB of Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8002ef6: 893b ldrh r3, [r7, #8] 8002ef8: b2da uxtb r2, r3 8002efa: 68fb ldr r3, [r7, #12] 8002efc: 681b ldr r3, [r3, #0] 8002efe: 611a str r2, [r3, #16] } /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002f00: 6a7a ldr r2, [r7, #36] ; 0x24 8002f02: 6a39 ldr r1, [r7, #32] 8002f04: 68f8 ldr r0, [r7, #12] 8002f06: f000 f923 bl 8003150 8002f0a: 4603 mov r3, r0 8002f0c: 2b00 cmp r3, #0 8002f0e: d00d beq.n 8002f2c { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002f10: 68fb ldr r3, [r7, #12] 8002f12: 6c1b ldr r3, [r3, #64] ; 0x40 8002f14: 2b04 cmp r3, #4 8002f16: d107 bne.n 8002f28 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002f18: 68fb ldr r3, [r7, #12] 8002f1a: 681b ldr r3, [r3, #0] 8002f1c: 681a ldr r2, [r3, #0] 8002f1e: 68fb ldr r3, [r7, #12] 8002f20: 681b ldr r3, [r3, #0] 8002f22: f442 7200 orr.w r2, r2, #512 ; 0x200 8002f26: 601a str r2, [r3, #0] } return HAL_ERROR; 8002f28: 2301 movs r3, #1 8002f2a: e035 b.n 8002f98 } /* Generate Restart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); 8002f2c: 68fb ldr r3, [r7, #12] 8002f2e: 681b ldr r3, [r3, #0] 8002f30: 681a ldr r2, [r3, #0] 8002f32: 68fb ldr r3, [r7, #12] 8002f34: 681b ldr r3, [r3, #0] 8002f36: f442 7280 orr.w r2, r2, #256 ; 0x100 8002f3a: 601a str r2, [r3, #0] /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8002f3c: 6a7b ldr r3, [r7, #36] ; 0x24 8002f3e: 9300 str r3, [sp, #0] 8002f40: 6a3b ldr r3, [r7, #32] 8002f42: 2200 movs r2, #0 8002f44: f04f 1101 mov.w r1, #65537 ; 0x10001 8002f48: 68f8 ldr r0, [r7, #12] 8002f4a: f000 f82b bl 8002fa4 8002f4e: 4603 mov r3, r0 8002f50: 2b00 cmp r3, #0 8002f52: d00d beq.n 8002f70 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) 8002f54: 68fb ldr r3, [r7, #12] 8002f56: 681b ldr r3, [r3, #0] 8002f58: 681b ldr r3, [r3, #0] 8002f5a: f403 7380 and.w r3, r3, #256 ; 0x100 8002f5e: f5b3 7f80 cmp.w r3, #256 ; 0x100 8002f62: d103 bne.n 8002f6c { hi2c->ErrorCode = HAL_I2C_WRONG_START; 8002f64: 68fb ldr r3, [r7, #12] 8002f66: f44f 7200 mov.w r2, #512 ; 0x200 8002f6a: 641a str r2, [r3, #64] ; 0x40 } return HAL_TIMEOUT; 8002f6c: 2303 movs r3, #3 8002f6e: e013 b.n 8002f98 } /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); 8002f70: 897b ldrh r3, [r7, #10] 8002f72: b2db uxtb r3, r3 8002f74: f043 0301 orr.w r3, r3, #1 8002f78: b2da uxtb r2, r3 8002f7a: 68fb ldr r3, [r7, #12] 8002f7c: 681b ldr r3, [r3, #0] 8002f7e: 611a str r2, [r3, #16] /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8002f80: 6a7b ldr r3, [r7, #36] ; 0x24 8002f82: 6a3a ldr r2, [r7, #32] 8002f84: 4906 ldr r1, [pc, #24] ; (8002fa0 ) 8002f86: 68f8 ldr r0, [r7, #12] 8002f88: f000 f863 bl 8003052 8002f8c: 4603 mov r3, r0 8002f8e: 2b00 cmp r3, #0 8002f90: d001 beq.n 8002f96 { return HAL_ERROR; 8002f92: 2301 movs r3, #1 8002f94: e000 b.n 8002f98 } return HAL_OK; 8002f96: 2300 movs r3, #0 } 8002f98: 4618 mov r0, r3 8002f9a: 3718 adds r7, #24 8002f9c: 46bd mov sp, r7 8002f9e: bd80 pop {r7, pc} 8002fa0: 00010002 .word 0x00010002 08002fa4 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) { 8002fa4: b580 push {r7, lr} 8002fa6: b084 sub sp, #16 8002fa8: af00 add r7, sp, #0 8002faa: 60f8 str r0, [r7, #12] 8002fac: 60b9 str r1, [r7, #8] 8002fae: 603b str r3, [r7, #0] 8002fb0: 4613 mov r3, r2 8002fb2: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) 8002fb4: e025 b.n 8003002 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8002fb6: 683b ldr r3, [r7, #0] 8002fb8: f1b3 3fff cmp.w r3, #4294967295 8002fbc: d021 beq.n 8003002 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8002fbe: f7fe fecd bl 8001d5c 8002fc2: 4602 mov r2, r0 8002fc4: 69bb ldr r3, [r7, #24] 8002fc6: 1ad3 subs r3, r2, r3 8002fc8: 683a ldr r2, [r7, #0] 8002fca: 429a cmp r2, r3 8002fcc: d302 bcc.n 8002fd4 8002fce: 683b ldr r3, [r7, #0] 8002fd0: 2b00 cmp r3, #0 8002fd2: d116 bne.n 8003002 { hi2c->PreviousState = I2C_STATE_NONE; 8002fd4: 68fb ldr r3, [r7, #12] 8002fd6: 2200 movs r2, #0 8002fd8: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8002fda: 68fb ldr r3, [r7, #12] 8002fdc: 2220 movs r2, #32 8002fde: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002fe2: 68fb ldr r3, [r7, #12] 8002fe4: 2200 movs r2, #0 8002fe6: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8002fea: 68fb ldr r3, [r7, #12] 8002fec: 6c1b ldr r3, [r3, #64] ; 0x40 8002fee: f043 0220 orr.w r2, r3, #32 8002ff2: 68fb ldr r3, [r7, #12] 8002ff4: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002ff6: 68fb ldr r3, [r7, #12] 8002ff8: 2200 movs r2, #0 8002ffa: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8002ffe: 2301 movs r3, #1 8003000: e023 b.n 800304a while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) 8003002: 68bb ldr r3, [r7, #8] 8003004: 0c1b lsrs r3, r3, #16 8003006: b2db uxtb r3, r3 8003008: 2b01 cmp r3, #1 800300a: d10d bne.n 8003028 800300c: 68fb ldr r3, [r7, #12] 800300e: 681b ldr r3, [r3, #0] 8003010: 695b ldr r3, [r3, #20] 8003012: 43da mvns r2, r3 8003014: 68bb ldr r3, [r7, #8] 8003016: 4013 ands r3, r2 8003018: b29b uxth r3, r3 800301a: 2b00 cmp r3, #0 800301c: bf0c ite eq 800301e: 2301 moveq r3, #1 8003020: 2300 movne r3, #0 8003022: b2db uxtb r3, r3 8003024: 461a mov r2, r3 8003026: e00c b.n 8003042 8003028: 68fb ldr r3, [r7, #12] 800302a: 681b ldr r3, [r3, #0] 800302c: 699b ldr r3, [r3, #24] 800302e: 43da mvns r2, r3 8003030: 68bb ldr r3, [r7, #8] 8003032: 4013 ands r3, r2 8003034: b29b uxth r3, r3 8003036: 2b00 cmp r3, #0 8003038: bf0c ite eq 800303a: 2301 moveq r3, #1 800303c: 2300 movne r3, #0 800303e: b2db uxtb r3, r3 8003040: 461a mov r2, r3 8003042: 79fb ldrb r3, [r7, #7] 8003044: 429a cmp r2, r3 8003046: d0b6 beq.n 8002fb6 } } } return HAL_OK; 8003048: 2300 movs r3, #0 } 800304a: 4618 mov r0, r3 800304c: 3710 adds r7, #16 800304e: 46bd mov sp, r7 8003050: bd80 pop {r7, pc} 08003052 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart) { 8003052: b580 push {r7, lr} 8003054: b084 sub sp, #16 8003056: af00 add r7, sp, #0 8003058: 60f8 str r0, [r7, #12] 800305a: 60b9 str r1, [r7, #8] 800305c: 607a str r2, [r7, #4] 800305e: 603b str r3, [r7, #0] while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) 8003060: e051 b.n 8003106 { if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 8003062: 68fb ldr r3, [r7, #12] 8003064: 681b ldr r3, [r3, #0] 8003066: 695b ldr r3, [r3, #20] 8003068: f403 6380 and.w r3, r3, #1024 ; 0x400 800306c: f5b3 6f80 cmp.w r3, #1024 ; 0x400 8003070: d123 bne.n 80030ba { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8003072: 68fb ldr r3, [r7, #12] 8003074: 681b ldr r3, [r3, #0] 8003076: 681a ldr r2, [r3, #0] 8003078: 68fb ldr r3, [r7, #12] 800307a: 681b ldr r3, [r3, #0] 800307c: f442 7200 orr.w r2, r2, #512 ; 0x200 8003080: 601a str r2, [r3, #0] /* Clear AF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 8003082: 68fb ldr r3, [r7, #12] 8003084: 681b ldr r3, [r3, #0] 8003086: f46f 6280 mvn.w r2, #1024 ; 0x400 800308a: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; 800308c: 68fb ldr r3, [r7, #12] 800308e: 2200 movs r2, #0 8003090: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8003092: 68fb ldr r3, [r7, #12] 8003094: 2220 movs r2, #32 8003096: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 800309a: 68fb ldr r3, [r7, #12] 800309c: 2200 movs r2, #0 800309e: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; 80030a2: 68fb ldr r3, [r7, #12] 80030a4: 6c1b ldr r3, [r3, #64] ; 0x40 80030a6: f043 0204 orr.w r2, r3, #4 80030aa: 68fb ldr r3, [r7, #12] 80030ac: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 80030ae: 68fb ldr r3, [r7, #12] 80030b0: 2200 movs r2, #0 80030b2: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 80030b6: 2301 movs r3, #1 80030b8: e046 b.n 8003148 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 80030ba: 687b ldr r3, [r7, #4] 80030bc: f1b3 3fff cmp.w r3, #4294967295 80030c0: d021 beq.n 8003106 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 80030c2: f7fe fe4b bl 8001d5c 80030c6: 4602 mov r2, r0 80030c8: 683b ldr r3, [r7, #0] 80030ca: 1ad3 subs r3, r2, r3 80030cc: 687a ldr r2, [r7, #4] 80030ce: 429a cmp r2, r3 80030d0: d302 bcc.n 80030d8 80030d2: 687b ldr r3, [r7, #4] 80030d4: 2b00 cmp r3, #0 80030d6: d116 bne.n 8003106 { hi2c->PreviousState = I2C_STATE_NONE; 80030d8: 68fb ldr r3, [r7, #12] 80030da: 2200 movs r2, #0 80030dc: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 80030de: 68fb ldr r3, [r7, #12] 80030e0: 2220 movs r2, #32 80030e2: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 80030e6: 68fb ldr r3, [r7, #12] 80030e8: 2200 movs r2, #0 80030ea: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 80030ee: 68fb ldr r3, [r7, #12] 80030f0: 6c1b ldr r3, [r3, #64] ; 0x40 80030f2: f043 0220 orr.w r2, r3, #32 80030f6: 68fb ldr r3, [r7, #12] 80030f8: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 80030fa: 68fb ldr r3, [r7, #12] 80030fc: 2200 movs r2, #0 80030fe: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8003102: 2301 movs r3, #1 8003104: e020 b.n 8003148 while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) 8003106: 68bb ldr r3, [r7, #8] 8003108: 0c1b lsrs r3, r3, #16 800310a: b2db uxtb r3, r3 800310c: 2b01 cmp r3, #1 800310e: d10c bne.n 800312a 8003110: 68fb ldr r3, [r7, #12] 8003112: 681b ldr r3, [r3, #0] 8003114: 695b ldr r3, [r3, #20] 8003116: 43da mvns r2, r3 8003118: 68bb ldr r3, [r7, #8] 800311a: 4013 ands r3, r2 800311c: b29b uxth r3, r3 800311e: 2b00 cmp r3, #0 8003120: bf14 ite ne 8003122: 2301 movne r3, #1 8003124: 2300 moveq r3, #0 8003126: b2db uxtb r3, r3 8003128: e00b b.n 8003142 800312a: 68fb ldr r3, [r7, #12] 800312c: 681b ldr r3, [r3, #0] 800312e: 699b ldr r3, [r3, #24] 8003130: 43da mvns r2, r3 8003132: 68bb ldr r3, [r7, #8] 8003134: 4013 ands r3, r2 8003136: b29b uxth r3, r3 8003138: 2b00 cmp r3, #0 800313a: bf14 ite ne 800313c: 2301 movne r3, #1 800313e: 2300 moveq r3, #0 8003140: b2db uxtb r3, r3 8003142: 2b00 cmp r3, #0 8003144: d18d bne.n 8003062 } } } return HAL_OK; 8003146: 2300 movs r3, #0 } 8003148: 4618 mov r0, r3 800314a: 3710 adds r7, #16 800314c: 46bd mov sp, r7 800314e: bd80 pop {r7, pc} 08003150 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8003150: b580 push {r7, lr} 8003152: b084 sub sp, #16 8003154: af00 add r7, sp, #0 8003156: 60f8 str r0, [r7, #12] 8003158: 60b9 str r1, [r7, #8] 800315a: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) 800315c: e02d b.n 80031ba { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 800315e: 68f8 ldr r0, [r7, #12] 8003160: f000 f8ce bl 8003300 8003164: 4603 mov r3, r0 8003166: 2b00 cmp r3, #0 8003168: d001 beq.n 800316e { return HAL_ERROR; 800316a: 2301 movs r3, #1 800316c: e02d b.n 80031ca } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 800316e: 68bb ldr r3, [r7, #8] 8003170: f1b3 3fff cmp.w r3, #4294967295 8003174: d021 beq.n 80031ba { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8003176: f7fe fdf1 bl 8001d5c 800317a: 4602 mov r2, r0 800317c: 687b ldr r3, [r7, #4] 800317e: 1ad3 subs r3, r2, r3 8003180: 68ba ldr r2, [r7, #8] 8003182: 429a cmp r2, r3 8003184: d302 bcc.n 800318c 8003186: 68bb ldr r3, [r7, #8] 8003188: 2b00 cmp r3, #0 800318a: d116 bne.n 80031ba { hi2c->PreviousState = I2C_STATE_NONE; 800318c: 68fb ldr r3, [r7, #12] 800318e: 2200 movs r2, #0 8003190: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8003192: 68fb ldr r3, [r7, #12] 8003194: 2220 movs r2, #32 8003196: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 800319a: 68fb ldr r3, [r7, #12] 800319c: 2200 movs r2, #0 800319e: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 80031a2: 68fb ldr r3, [r7, #12] 80031a4: 6c1b ldr r3, [r3, #64] ; 0x40 80031a6: f043 0220 orr.w r2, r3, #32 80031aa: 68fb ldr r3, [r7, #12] 80031ac: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 80031ae: 68fb ldr r3, [r7, #12] 80031b0: 2200 movs r2, #0 80031b2: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 80031b6: 2301 movs r3, #1 80031b8: e007 b.n 80031ca while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) 80031ba: 68fb ldr r3, [r7, #12] 80031bc: 681b ldr r3, [r3, #0] 80031be: 695b ldr r3, [r3, #20] 80031c0: f003 0380 and.w r3, r3, #128 ; 0x80 80031c4: 2b80 cmp r3, #128 ; 0x80 80031c6: d1ca bne.n 800315e } } } return HAL_OK; 80031c8: 2300 movs r3, #0 } 80031ca: 4618 mov r0, r3 80031cc: 3710 adds r7, #16 80031ce: 46bd mov sp, r7 80031d0: bd80 pop {r7, pc} 080031d2 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 80031d2: b580 push {r7, lr} 80031d4: b084 sub sp, #16 80031d6: af00 add r7, sp, #0 80031d8: 60f8 str r0, [r7, #12] 80031da: 60b9 str r1, [r7, #8] 80031dc: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) 80031de: e02d b.n 800323c { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 80031e0: 68f8 ldr r0, [r7, #12] 80031e2: f000 f88d bl 8003300 80031e6: 4603 mov r3, r0 80031e8: 2b00 cmp r3, #0 80031ea: d001 beq.n 80031f0 { return HAL_ERROR; 80031ec: 2301 movs r3, #1 80031ee: e02d b.n 800324c } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 80031f0: 68bb ldr r3, [r7, #8] 80031f2: f1b3 3fff cmp.w r3, #4294967295 80031f6: d021 beq.n 800323c { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 80031f8: f7fe fdb0 bl 8001d5c 80031fc: 4602 mov r2, r0 80031fe: 687b ldr r3, [r7, #4] 8003200: 1ad3 subs r3, r2, r3 8003202: 68ba ldr r2, [r7, #8] 8003204: 429a cmp r2, r3 8003206: d302 bcc.n 800320e 8003208: 68bb ldr r3, [r7, #8] 800320a: 2b00 cmp r3, #0 800320c: d116 bne.n 800323c { hi2c->PreviousState = I2C_STATE_NONE; 800320e: 68fb ldr r3, [r7, #12] 8003210: 2200 movs r2, #0 8003212: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8003214: 68fb ldr r3, [r7, #12] 8003216: 2220 movs r2, #32 8003218: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 800321c: 68fb ldr r3, [r7, #12] 800321e: 2200 movs r2, #0 8003220: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8003224: 68fb ldr r3, [r7, #12] 8003226: 6c1b ldr r3, [r3, #64] ; 0x40 8003228: f043 0220 orr.w r2, r3, #32 800322c: 68fb ldr r3, [r7, #12] 800322e: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003230: 68fb ldr r3, [r7, #12] 8003232: 2200 movs r2, #0 8003234: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8003238: 2301 movs r3, #1 800323a: e007 b.n 800324c while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) 800323c: 68fb ldr r3, [r7, #12] 800323e: 681b ldr r3, [r3, #0] 8003240: 695b ldr r3, [r3, #20] 8003242: f003 0304 and.w r3, r3, #4 8003246: 2b04 cmp r3, #4 8003248: d1ca bne.n 80031e0 } } } return HAL_OK; 800324a: 2300 movs r3, #0 } 800324c: 4618 mov r0, r3 800324e: 3710 adds r7, #16 8003250: 46bd mov sp, r7 8003252: bd80 pop {r7, pc} 08003254 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8003254: b580 push {r7, lr} 8003256: b084 sub sp, #16 8003258: af00 add r7, sp, #0 800325a: 60f8 str r0, [r7, #12] 800325c: 60b9 str r1, [r7, #8] 800325e: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) 8003260: e042 b.n 80032e8 { /* Check if a STOPF is detected */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) 8003262: 68fb ldr r3, [r7, #12] 8003264: 681b ldr r3, [r3, #0] 8003266: 695b ldr r3, [r3, #20] 8003268: f003 0310 and.w r3, r3, #16 800326c: 2b10 cmp r3, #16 800326e: d119 bne.n 80032a4 { /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 8003270: 68fb ldr r3, [r7, #12] 8003272: 681b ldr r3, [r3, #0] 8003274: f06f 0210 mvn.w r2, #16 8003278: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; 800327a: 68fb ldr r3, [r7, #12] 800327c: 2200 movs r2, #0 800327e: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8003280: 68fb ldr r3, [r7, #12] 8003282: 2220 movs r2, #32 8003284: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8003288: 68fb ldr r3, [r7, #12] 800328a: 2200 movs r2, #0 800328c: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_NONE; 8003290: 68fb ldr r3, [r7, #12] 8003292: 6c1a ldr r2, [r3, #64] ; 0x40 8003294: 68fb ldr r3, [r7, #12] 8003296: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003298: 68fb ldr r3, [r7, #12] 800329a: 2200 movs r2, #0 800329c: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 80032a0: 2301 movs r3, #1 80032a2: e029 b.n 80032f8 } /* Check for the Timeout */ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 80032a4: f7fe fd5a bl 8001d5c 80032a8: 4602 mov r2, r0 80032aa: 687b ldr r3, [r7, #4] 80032ac: 1ad3 subs r3, r2, r3 80032ae: 68ba ldr r2, [r7, #8] 80032b0: 429a cmp r2, r3 80032b2: d302 bcc.n 80032ba 80032b4: 68bb ldr r3, [r7, #8] 80032b6: 2b00 cmp r3, #0 80032b8: d116 bne.n 80032e8 { hi2c->PreviousState = I2C_STATE_NONE; 80032ba: 68fb ldr r3, [r7, #12] 80032bc: 2200 movs r2, #0 80032be: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 80032c0: 68fb ldr r3, [r7, #12] 80032c2: 2220 movs r2, #32 80032c4: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 80032c8: 68fb ldr r3, [r7, #12] 80032ca: 2200 movs r2, #0 80032cc: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 80032d0: 68fb ldr r3, [r7, #12] 80032d2: 6c1b ldr r3, [r3, #64] ; 0x40 80032d4: f043 0220 orr.w r2, r3, #32 80032d8: 68fb ldr r3, [r7, #12] 80032da: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 80032dc: 68fb ldr r3, [r7, #12] 80032de: 2200 movs r2, #0 80032e0: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 80032e4: 2301 movs r3, #1 80032e6: e007 b.n 80032f8 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) 80032e8: 68fb ldr r3, [r7, #12] 80032ea: 681b ldr r3, [r3, #0] 80032ec: 695b ldr r3, [r3, #20] 80032ee: f003 0340 and.w r3, r3, #64 ; 0x40 80032f2: 2b40 cmp r3, #64 ; 0x40 80032f4: d1b5 bne.n 8003262 } } return HAL_OK; 80032f6: 2300 movs r3, #0 } 80032f8: 4618 mov r0, r3 80032fa: 3710 adds r7, #16 80032fc: 46bd mov sp, r7 80032fe: bd80 pop {r7, pc} 08003300 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) { 8003300: b480 push {r7} 8003302: b083 sub sp, #12 8003304: af00 add r7, sp, #0 8003306: 6078 str r0, [r7, #4] if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 8003308: 687b ldr r3, [r7, #4] 800330a: 681b ldr r3, [r3, #0] 800330c: 695b ldr r3, [r3, #20] 800330e: f403 6380 and.w r3, r3, #1024 ; 0x400 8003312: f5b3 6f80 cmp.w r3, #1024 ; 0x400 8003316: d11b bne.n 8003350 { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 8003318: 687b ldr r3, [r7, #4] 800331a: 681b ldr r3, [r3, #0] 800331c: f46f 6280 mvn.w r2, #1024 ; 0x400 8003320: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; 8003322: 687b ldr r3, [r7, #4] 8003324: 2200 movs r2, #0 8003326: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8003328: 687b ldr r3, [r7, #4] 800332a: 2220 movs r2, #32 800332c: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8003330: 687b ldr r3, [r7, #4] 8003332: 2200 movs r2, #0 8003334: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; 8003338: 687b ldr r3, [r7, #4] 800333a: 6c1b ldr r3, [r3, #64] ; 0x40 800333c: f043 0204 orr.w r2, r3, #4 8003340: 687b ldr r3, [r7, #4] 8003342: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003344: 687b ldr r3, [r7, #4] 8003346: 2200 movs r2, #0 8003348: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 800334c: 2301 movs r3, #1 800334e: e000 b.n 8003352 } return HAL_OK; 8003350: 2300 movs r3, #0 } 8003352: 4618 mov r0, r3 8003354: 370c adds r7, #12 8003356: 46bd mov sp, r7 8003358: bc80 pop {r7} 800335a: 4770 bx lr 0800335c : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 800335c: b580 push {r7, lr} 800335e: b086 sub sp, #24 8003360: af00 add r7, sp, #0 8003362: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 8003364: 687b ldr r3, [r7, #4] 8003366: 2b00 cmp r3, #0 8003368: d101 bne.n 800336e { return HAL_ERROR; 800336a: 2301 movs r3, #1 800336c: e272 b.n 8003854 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 800336e: 687b ldr r3, [r7, #4] 8003370: 681b ldr r3, [r3, #0] 8003372: f003 0301 and.w r3, r3, #1 8003376: 2b00 cmp r3, #0 8003378: f000 8087 beq.w 800348a { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 800337c: 4b92 ldr r3, [pc, #584] ; (80035c8 ) 800337e: 685b ldr r3, [r3, #4] 8003380: f003 030c and.w r3, r3, #12 8003384: 2b04 cmp r3, #4 8003386: d00c beq.n 80033a2 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8003388: 4b8f ldr r3, [pc, #572] ; (80035c8 ) 800338a: 685b ldr r3, [r3, #4] 800338c: f003 030c and.w r3, r3, #12 8003390: 2b08 cmp r3, #8 8003392: d112 bne.n 80033ba 8003394: 4b8c ldr r3, [pc, #560] ; (80035c8 ) 8003396: 685b ldr r3, [r3, #4] 8003398: f403 3380 and.w r3, r3, #65536 ; 0x10000 800339c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 80033a0: d10b bne.n 80033ba { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 80033a2: 4b89 ldr r3, [pc, #548] ; (80035c8 ) 80033a4: 681b ldr r3, [r3, #0] 80033a6: f403 3300 and.w r3, r3, #131072 ; 0x20000 80033aa: 2b00 cmp r3, #0 80033ac: d06c beq.n 8003488 80033ae: 687b ldr r3, [r7, #4] 80033b0: 685b ldr r3, [r3, #4] 80033b2: 2b00 cmp r3, #0 80033b4: d168 bne.n 8003488 { return HAL_ERROR; 80033b6: 2301 movs r3, #1 80033b8: e24c b.n 8003854 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 80033ba: 687b ldr r3, [r7, #4] 80033bc: 685b ldr r3, [r3, #4] 80033be: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 80033c2: d106 bne.n 80033d2 80033c4: 4b80 ldr r3, [pc, #512] ; (80035c8 ) 80033c6: 681b ldr r3, [r3, #0] 80033c8: 4a7f ldr r2, [pc, #508] ; (80035c8 ) 80033ca: f443 3380 orr.w r3, r3, #65536 ; 0x10000 80033ce: 6013 str r3, [r2, #0] 80033d0: e02e b.n 8003430 80033d2: 687b ldr r3, [r7, #4] 80033d4: 685b ldr r3, [r3, #4] 80033d6: 2b00 cmp r3, #0 80033d8: d10c bne.n 80033f4 80033da: 4b7b ldr r3, [pc, #492] ; (80035c8 ) 80033dc: 681b ldr r3, [r3, #0] 80033de: 4a7a ldr r2, [pc, #488] ; (80035c8 ) 80033e0: f423 3380 bic.w r3, r3, #65536 ; 0x10000 80033e4: 6013 str r3, [r2, #0] 80033e6: 4b78 ldr r3, [pc, #480] ; (80035c8 ) 80033e8: 681b ldr r3, [r3, #0] 80033ea: 4a77 ldr r2, [pc, #476] ; (80035c8 ) 80033ec: f423 2380 bic.w r3, r3, #262144 ; 0x40000 80033f0: 6013 str r3, [r2, #0] 80033f2: e01d b.n 8003430 80033f4: 687b ldr r3, [r7, #4] 80033f6: 685b ldr r3, [r3, #4] 80033f8: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 80033fc: d10c bne.n 8003418 80033fe: 4b72 ldr r3, [pc, #456] ; (80035c8 ) 8003400: 681b ldr r3, [r3, #0] 8003402: 4a71 ldr r2, [pc, #452] ; (80035c8 ) 8003404: f443 2380 orr.w r3, r3, #262144 ; 0x40000 8003408: 6013 str r3, [r2, #0] 800340a: 4b6f ldr r3, [pc, #444] ; (80035c8 ) 800340c: 681b ldr r3, [r3, #0] 800340e: 4a6e ldr r2, [pc, #440] ; (80035c8 ) 8003410: f443 3380 orr.w r3, r3, #65536 ; 0x10000 8003414: 6013 str r3, [r2, #0] 8003416: e00b b.n 8003430 8003418: 4b6b ldr r3, [pc, #428] ; (80035c8 ) 800341a: 681b ldr r3, [r3, #0] 800341c: 4a6a ldr r2, [pc, #424] ; (80035c8 ) 800341e: f423 3380 bic.w r3, r3, #65536 ; 0x10000 8003422: 6013 str r3, [r2, #0] 8003424: 4b68 ldr r3, [pc, #416] ; (80035c8 ) 8003426: 681b ldr r3, [r3, #0] 8003428: 4a67 ldr r2, [pc, #412] ; (80035c8 ) 800342a: f423 2380 bic.w r3, r3, #262144 ; 0x40000 800342e: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 8003430: 687b ldr r3, [r7, #4] 8003432: 685b ldr r3, [r3, #4] 8003434: 2b00 cmp r3, #0 8003436: d013 beq.n 8003460 { /* Get Start Tick */ tickstart = HAL_GetTick(); 8003438: f7fe fc90 bl 8001d5c 800343c: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800343e: e008 b.n 8003452 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8003440: f7fe fc8c bl 8001d5c 8003444: 4602 mov r2, r0 8003446: 693b ldr r3, [r7, #16] 8003448: 1ad3 subs r3, r2, r3 800344a: 2b64 cmp r3, #100 ; 0x64 800344c: d901 bls.n 8003452 { return HAL_TIMEOUT; 800344e: 2303 movs r3, #3 8003450: e200 b.n 8003854 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8003452: 4b5d ldr r3, [pc, #372] ; (80035c8 ) 8003454: 681b ldr r3, [r3, #0] 8003456: f403 3300 and.w r3, r3, #131072 ; 0x20000 800345a: 2b00 cmp r3, #0 800345c: d0f0 beq.n 8003440 800345e: e014 b.n 800348a } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 8003460: f7fe fc7c bl 8001d5c 8003464: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8003466: e008 b.n 800347a { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8003468: f7fe fc78 bl 8001d5c 800346c: 4602 mov r2, r0 800346e: 693b ldr r3, [r7, #16] 8003470: 1ad3 subs r3, r2, r3 8003472: 2b64 cmp r3, #100 ; 0x64 8003474: d901 bls.n 800347a { return HAL_TIMEOUT; 8003476: 2303 movs r3, #3 8003478: e1ec b.n 8003854 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 800347a: 4b53 ldr r3, [pc, #332] ; (80035c8 ) 800347c: 681b ldr r3, [r3, #0] 800347e: f403 3300 and.w r3, r3, #131072 ; 0x20000 8003482: 2b00 cmp r3, #0 8003484: d1f0 bne.n 8003468 8003486: e000 b.n 800348a if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8003488: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 800348a: 687b ldr r3, [r7, #4] 800348c: 681b ldr r3, [r3, #0] 800348e: f003 0302 and.w r3, r3, #2 8003492: 2b00 cmp r3, #0 8003494: d063 beq.n 800355e /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8003496: 4b4c ldr r3, [pc, #304] ; (80035c8 ) 8003498: 685b ldr r3, [r3, #4] 800349a: f003 030c and.w r3, r3, #12 800349e: 2b00 cmp r3, #0 80034a0: d00b beq.n 80034ba || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 80034a2: 4b49 ldr r3, [pc, #292] ; (80035c8 ) 80034a4: 685b ldr r3, [r3, #4] 80034a6: f003 030c and.w r3, r3, #12 80034aa: 2b08 cmp r3, #8 80034ac: d11c bne.n 80034e8 80034ae: 4b46 ldr r3, [pc, #280] ; (80035c8 ) 80034b0: 685b ldr r3, [r3, #4] 80034b2: f403 3380 and.w r3, r3, #65536 ; 0x10000 80034b6: 2b00 cmp r3, #0 80034b8: d116 bne.n 80034e8 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80034ba: 4b43 ldr r3, [pc, #268] ; (80035c8 ) 80034bc: 681b ldr r3, [r3, #0] 80034be: f003 0302 and.w r3, r3, #2 80034c2: 2b00 cmp r3, #0 80034c4: d005 beq.n 80034d2 80034c6: 687b ldr r3, [r7, #4] 80034c8: 691b ldr r3, [r3, #16] 80034ca: 2b01 cmp r3, #1 80034cc: d001 beq.n 80034d2 { return HAL_ERROR; 80034ce: 2301 movs r3, #1 80034d0: e1c0 b.n 8003854 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80034d2: 4b3d ldr r3, [pc, #244] ; (80035c8 ) 80034d4: 681b ldr r3, [r3, #0] 80034d6: f023 02f8 bic.w r2, r3, #248 ; 0xf8 80034da: 687b ldr r3, [r7, #4] 80034dc: 695b ldr r3, [r3, #20] 80034de: 00db lsls r3, r3, #3 80034e0: 4939 ldr r1, [pc, #228] ; (80035c8 ) 80034e2: 4313 orrs r3, r2 80034e4: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80034e6: e03a b.n 800355e } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 80034e8: 687b ldr r3, [r7, #4] 80034ea: 691b ldr r3, [r3, #16] 80034ec: 2b00 cmp r3, #0 80034ee: d020 beq.n 8003532 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 80034f0: 4b36 ldr r3, [pc, #216] ; (80035cc ) 80034f2: 2201 movs r2, #1 80034f4: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80034f6: f7fe fc31 bl 8001d5c 80034fa: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80034fc: e008 b.n 8003510 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 80034fe: f7fe fc2d bl 8001d5c 8003502: 4602 mov r2, r0 8003504: 693b ldr r3, [r7, #16] 8003506: 1ad3 subs r3, r2, r3 8003508: 2b02 cmp r3, #2 800350a: d901 bls.n 8003510 { return HAL_TIMEOUT; 800350c: 2303 movs r3, #3 800350e: e1a1 b.n 8003854 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8003510: 4b2d ldr r3, [pc, #180] ; (80035c8 ) 8003512: 681b ldr r3, [r3, #0] 8003514: f003 0302 and.w r3, r3, #2 8003518: 2b00 cmp r3, #0 800351a: d0f0 beq.n 80034fe } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 800351c: 4b2a ldr r3, [pc, #168] ; (80035c8 ) 800351e: 681b ldr r3, [r3, #0] 8003520: f023 02f8 bic.w r2, r3, #248 ; 0xf8 8003524: 687b ldr r3, [r7, #4] 8003526: 695b ldr r3, [r3, #20] 8003528: 00db lsls r3, r3, #3 800352a: 4927 ldr r1, [pc, #156] ; (80035c8 ) 800352c: 4313 orrs r3, r2 800352e: 600b str r3, [r1, #0] 8003530: e015 b.n 800355e } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 8003532: 4b26 ldr r3, [pc, #152] ; (80035cc ) 8003534: 2200 movs r2, #0 8003536: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8003538: f7fe fc10 bl 8001d5c 800353c: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 800353e: e008 b.n 8003552 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8003540: f7fe fc0c bl 8001d5c 8003544: 4602 mov r2, r0 8003546: 693b ldr r3, [r7, #16] 8003548: 1ad3 subs r3, r2, r3 800354a: 2b02 cmp r3, #2 800354c: d901 bls.n 8003552 { return HAL_TIMEOUT; 800354e: 2303 movs r3, #3 8003550: e180 b.n 8003854 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8003552: 4b1d ldr r3, [pc, #116] ; (80035c8 ) 8003554: 681b ldr r3, [r3, #0] 8003556: f003 0302 and.w r3, r3, #2 800355a: 2b00 cmp r3, #0 800355c: d1f0 bne.n 8003540 } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 800355e: 687b ldr r3, [r7, #4] 8003560: 681b ldr r3, [r3, #0] 8003562: f003 0308 and.w r3, r3, #8 8003566: 2b00 cmp r3, #0 8003568: d03a beq.n 80035e0 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 800356a: 687b ldr r3, [r7, #4] 800356c: 699b ldr r3, [r3, #24] 800356e: 2b00 cmp r3, #0 8003570: d019 beq.n 80035a6 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 8003572: 4b17 ldr r3, [pc, #92] ; (80035d0 ) 8003574: 2201 movs r2, #1 8003576: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8003578: f7fe fbf0 bl 8001d5c 800357c: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 800357e: e008 b.n 8003592 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8003580: f7fe fbec bl 8001d5c 8003584: 4602 mov r2, r0 8003586: 693b ldr r3, [r7, #16] 8003588: 1ad3 subs r3, r2, r3 800358a: 2b02 cmp r3, #2 800358c: d901 bls.n 8003592 { return HAL_TIMEOUT; 800358e: 2303 movs r3, #3 8003590: e160 b.n 8003854 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8003592: 4b0d ldr r3, [pc, #52] ; (80035c8 ) 8003594: 6a5b ldr r3, [r3, #36] ; 0x24 8003596: f003 0302 and.w r3, r3, #2 800359a: 2b00 cmp r3, #0 800359c: d0f0 beq.n 8003580 } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); 800359e: 2001 movs r0, #1 80035a0: f000 fac4 bl 8003b2c 80035a4: e01c b.n 80035e0 } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 80035a6: 4b0a ldr r3, [pc, #40] ; (80035d0 ) 80035a8: 2200 movs r2, #0 80035aa: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80035ac: f7fe fbd6 bl 8001d5c 80035b0: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 80035b2: e00f b.n 80035d4 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 80035b4: f7fe fbd2 bl 8001d5c 80035b8: 4602 mov r2, r0 80035ba: 693b ldr r3, [r7, #16] 80035bc: 1ad3 subs r3, r2, r3 80035be: 2b02 cmp r3, #2 80035c0: d908 bls.n 80035d4 { return HAL_TIMEOUT; 80035c2: 2303 movs r3, #3 80035c4: e146 b.n 8003854 80035c6: bf00 nop 80035c8: 40021000 .word 0x40021000 80035cc: 42420000 .word 0x42420000 80035d0: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 80035d4: 4b92 ldr r3, [pc, #584] ; (8003820 ) 80035d6: 6a5b ldr r3, [r3, #36] ; 0x24 80035d8: f003 0302 and.w r3, r3, #2 80035dc: 2b00 cmp r3, #0 80035de: d1e9 bne.n 80035b4 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 80035e0: 687b ldr r3, [r7, #4] 80035e2: 681b ldr r3, [r3, #0] 80035e4: f003 0304 and.w r3, r3, #4 80035e8: 2b00 cmp r3, #0 80035ea: f000 80a6 beq.w 800373a { FlagStatus pwrclkchanged = RESET; 80035ee: 2300 movs r3, #0 80035f0: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 80035f2: 4b8b ldr r3, [pc, #556] ; (8003820 ) 80035f4: 69db ldr r3, [r3, #28] 80035f6: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 80035fa: 2b00 cmp r3, #0 80035fc: d10d bne.n 800361a { __HAL_RCC_PWR_CLK_ENABLE(); 80035fe: 4b88 ldr r3, [pc, #544] ; (8003820 ) 8003600: 69db ldr r3, [r3, #28] 8003602: 4a87 ldr r2, [pc, #540] ; (8003820 ) 8003604: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8003608: 61d3 str r3, [r2, #28] 800360a: 4b85 ldr r3, [pc, #532] ; (8003820 ) 800360c: 69db ldr r3, [r3, #28] 800360e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8003612: 60bb str r3, [r7, #8] 8003614: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8003616: 2301 movs r3, #1 8003618: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 800361a: 4b82 ldr r3, [pc, #520] ; (8003824 ) 800361c: 681b ldr r3, [r3, #0] 800361e: f403 7380 and.w r3, r3, #256 ; 0x100 8003622: 2b00 cmp r3, #0 8003624: d118 bne.n 8003658 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8003626: 4b7f ldr r3, [pc, #508] ; (8003824 ) 8003628: 681b ldr r3, [r3, #0] 800362a: 4a7e ldr r2, [pc, #504] ; (8003824 ) 800362c: f443 7380 orr.w r3, r3, #256 ; 0x100 8003630: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8003632: f7fe fb93 bl 8001d5c 8003636: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8003638: e008 b.n 800364c { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 800363a: f7fe fb8f bl 8001d5c 800363e: 4602 mov r2, r0 8003640: 693b ldr r3, [r7, #16] 8003642: 1ad3 subs r3, r2, r3 8003644: 2b64 cmp r3, #100 ; 0x64 8003646: d901 bls.n 800364c { return HAL_TIMEOUT; 8003648: 2303 movs r3, #3 800364a: e103 b.n 8003854 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 800364c: 4b75 ldr r3, [pc, #468] ; (8003824 ) 800364e: 681b ldr r3, [r3, #0] 8003650: f403 7380 and.w r3, r3, #256 ; 0x100 8003654: 2b00 cmp r3, #0 8003656: d0f0 beq.n 800363a } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8003658: 687b ldr r3, [r7, #4] 800365a: 68db ldr r3, [r3, #12] 800365c: 2b01 cmp r3, #1 800365e: d106 bne.n 800366e 8003660: 4b6f ldr r3, [pc, #444] ; (8003820 ) 8003662: 6a1b ldr r3, [r3, #32] 8003664: 4a6e ldr r2, [pc, #440] ; (8003820 ) 8003666: f043 0301 orr.w r3, r3, #1 800366a: 6213 str r3, [r2, #32] 800366c: e02d b.n 80036ca 800366e: 687b ldr r3, [r7, #4] 8003670: 68db ldr r3, [r3, #12] 8003672: 2b00 cmp r3, #0 8003674: d10c bne.n 8003690 8003676: 4b6a ldr r3, [pc, #424] ; (8003820 ) 8003678: 6a1b ldr r3, [r3, #32] 800367a: 4a69 ldr r2, [pc, #420] ; (8003820 ) 800367c: f023 0301 bic.w r3, r3, #1 8003680: 6213 str r3, [r2, #32] 8003682: 4b67 ldr r3, [pc, #412] ; (8003820 ) 8003684: 6a1b ldr r3, [r3, #32] 8003686: 4a66 ldr r2, [pc, #408] ; (8003820 ) 8003688: f023 0304 bic.w r3, r3, #4 800368c: 6213 str r3, [r2, #32] 800368e: e01c b.n 80036ca 8003690: 687b ldr r3, [r7, #4] 8003692: 68db ldr r3, [r3, #12] 8003694: 2b05 cmp r3, #5 8003696: d10c bne.n 80036b2 8003698: 4b61 ldr r3, [pc, #388] ; (8003820 ) 800369a: 6a1b ldr r3, [r3, #32] 800369c: 4a60 ldr r2, [pc, #384] ; (8003820 ) 800369e: f043 0304 orr.w r3, r3, #4 80036a2: 6213 str r3, [r2, #32] 80036a4: 4b5e ldr r3, [pc, #376] ; (8003820 ) 80036a6: 6a1b ldr r3, [r3, #32] 80036a8: 4a5d ldr r2, [pc, #372] ; (8003820 ) 80036aa: f043 0301 orr.w r3, r3, #1 80036ae: 6213 str r3, [r2, #32] 80036b0: e00b b.n 80036ca 80036b2: 4b5b ldr r3, [pc, #364] ; (8003820 ) 80036b4: 6a1b ldr r3, [r3, #32] 80036b6: 4a5a ldr r2, [pc, #360] ; (8003820 ) 80036b8: f023 0301 bic.w r3, r3, #1 80036bc: 6213 str r3, [r2, #32] 80036be: 4b58 ldr r3, [pc, #352] ; (8003820 ) 80036c0: 6a1b ldr r3, [r3, #32] 80036c2: 4a57 ldr r2, [pc, #348] ; (8003820 ) 80036c4: f023 0304 bic.w r3, r3, #4 80036c8: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 80036ca: 687b ldr r3, [r7, #4] 80036cc: 68db ldr r3, [r3, #12] 80036ce: 2b00 cmp r3, #0 80036d0: d015 beq.n 80036fe { /* Get Start Tick */ tickstart = HAL_GetTick(); 80036d2: f7fe fb43 bl 8001d5c 80036d6: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80036d8: e00a b.n 80036f0 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80036da: f7fe fb3f bl 8001d5c 80036de: 4602 mov r2, r0 80036e0: 693b ldr r3, [r7, #16] 80036e2: 1ad3 subs r3, r2, r3 80036e4: f241 3288 movw r2, #5000 ; 0x1388 80036e8: 4293 cmp r3, r2 80036ea: d901 bls.n 80036f0 { return HAL_TIMEOUT; 80036ec: 2303 movs r3, #3 80036ee: e0b1 b.n 8003854 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80036f0: 4b4b ldr r3, [pc, #300] ; (8003820 ) 80036f2: 6a1b ldr r3, [r3, #32] 80036f4: f003 0302 and.w r3, r3, #2 80036f8: 2b00 cmp r3, #0 80036fa: d0ee beq.n 80036da 80036fc: e014 b.n 8003728 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 80036fe: f7fe fb2d bl 8001d5c 8003702: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8003704: e00a b.n 800371c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8003706: f7fe fb29 bl 8001d5c 800370a: 4602 mov r2, r0 800370c: 693b ldr r3, [r7, #16] 800370e: 1ad3 subs r3, r2, r3 8003710: f241 3288 movw r2, #5000 ; 0x1388 8003714: 4293 cmp r3, r2 8003716: d901 bls.n 800371c { return HAL_TIMEOUT; 8003718: 2303 movs r3, #3 800371a: e09b b.n 8003854 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 800371c: 4b40 ldr r3, [pc, #256] ; (8003820 ) 800371e: 6a1b ldr r3, [r3, #32] 8003720: f003 0302 and.w r3, r3, #2 8003724: 2b00 cmp r3, #0 8003726: d1ee bne.n 8003706 } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8003728: 7dfb ldrb r3, [r7, #23] 800372a: 2b01 cmp r3, #1 800372c: d105 bne.n 800373a { __HAL_RCC_PWR_CLK_DISABLE(); 800372e: 4b3c ldr r3, [pc, #240] ; (8003820 ) 8003730: 69db ldr r3, [r3, #28] 8003732: 4a3b ldr r2, [pc, #236] ; (8003820 ) 8003734: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8003738: 61d3 str r3, [r2, #28] #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 800373a: 687b ldr r3, [r7, #4] 800373c: 69db ldr r3, [r3, #28] 800373e: 2b00 cmp r3, #0 8003740: f000 8087 beq.w 8003852 { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8003744: 4b36 ldr r3, [pc, #216] ; (8003820 ) 8003746: 685b ldr r3, [r3, #4] 8003748: f003 030c and.w r3, r3, #12 800374c: 2b08 cmp r3, #8 800374e: d061 beq.n 8003814 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8003750: 687b ldr r3, [r7, #4] 8003752: 69db ldr r3, [r3, #28] 8003754: 2b02 cmp r3, #2 8003756: d146 bne.n 80037e6 /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8003758: 4b33 ldr r3, [pc, #204] ; (8003828 ) 800375a: 2200 movs r2, #0 800375c: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 800375e: f7fe fafd bl 8001d5c 8003762: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8003764: e008 b.n 8003778 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8003766: f7fe faf9 bl 8001d5c 800376a: 4602 mov r2, r0 800376c: 693b ldr r3, [r7, #16] 800376e: 1ad3 subs r3, r2, r3 8003770: 2b02 cmp r3, #2 8003772: d901 bls.n 8003778 { return HAL_TIMEOUT; 8003774: 2303 movs r3, #3 8003776: e06d b.n 8003854 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8003778: 4b29 ldr r3, [pc, #164] ; (8003820 ) 800377a: 681b ldr r3, [r3, #0] 800377c: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 8003780: 2b00 cmp r3, #0 8003782: d1f0 bne.n 8003766 } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8003784: 687b ldr r3, [r7, #4] 8003786: 6a1b ldr r3, [r3, #32] 8003788: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 800378c: d108 bne.n 80037a0 /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 800378e: 4b24 ldr r3, [pc, #144] ; (8003820 ) 8003790: 685b ldr r3, [r3, #4] 8003792: f423 3200 bic.w r2, r3, #131072 ; 0x20000 8003796: 687b ldr r3, [r7, #4] 8003798: 689b ldr r3, [r3, #8] 800379a: 4921 ldr r1, [pc, #132] ; (8003820 ) 800379c: 4313 orrs r3, r2 800379e: 604b str r3, [r1, #4] } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 80037a0: 4b1f ldr r3, [pc, #124] ; (8003820 ) 80037a2: 685b ldr r3, [r3, #4] 80037a4: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000 80037a8: 687b ldr r3, [r7, #4] 80037aa: 6a19 ldr r1, [r3, #32] 80037ac: 687b ldr r3, [r7, #4] 80037ae: 6a5b ldr r3, [r3, #36] ; 0x24 80037b0: 430b orrs r3, r1 80037b2: 491b ldr r1, [pc, #108] ; (8003820 ) 80037b4: 4313 orrs r3, r2 80037b6: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 80037b8: 4b1b ldr r3, [pc, #108] ; (8003828 ) 80037ba: 2201 movs r2, #1 80037bc: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80037be: f7fe facd bl 8001d5c 80037c2: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80037c4: e008 b.n 80037d8 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 80037c6: f7fe fac9 bl 8001d5c 80037ca: 4602 mov r2, r0 80037cc: 693b ldr r3, [r7, #16] 80037ce: 1ad3 subs r3, r2, r3 80037d0: 2b02 cmp r3, #2 80037d2: d901 bls.n 80037d8 { return HAL_TIMEOUT; 80037d4: 2303 movs r3, #3 80037d6: e03d b.n 8003854 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80037d8: 4b11 ldr r3, [pc, #68] ; (8003820 ) 80037da: 681b ldr r3, [r3, #0] 80037dc: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 80037e0: 2b00 cmp r3, #0 80037e2: d0f0 beq.n 80037c6 80037e4: e035 b.n 8003852 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 80037e6: 4b10 ldr r3, [pc, #64] ; (8003828 ) 80037e8: 2200 movs r2, #0 80037ea: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80037ec: f7fe fab6 bl 8001d5c 80037f0: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80037f2: e008 b.n 8003806 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 80037f4: f7fe fab2 bl 8001d5c 80037f8: 4602 mov r2, r0 80037fa: 693b ldr r3, [r7, #16] 80037fc: 1ad3 subs r3, r2, r3 80037fe: 2b02 cmp r3, #2 8003800: d901 bls.n 8003806 { return HAL_TIMEOUT; 8003802: 2303 movs r3, #3 8003804: e026 b.n 8003854 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8003806: 4b06 ldr r3, [pc, #24] ; (8003820 ) 8003808: 681b ldr r3, [r3, #0] 800380a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 800380e: 2b00 cmp r3, #0 8003810: d1f0 bne.n 80037f4 8003812: e01e b.n 8003852 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 8003814: 687b ldr r3, [r7, #4] 8003816: 69db ldr r3, [r3, #28] 8003818: 2b01 cmp r3, #1 800381a: d107 bne.n 800382c { return HAL_ERROR; 800381c: 2301 movs r3, #1 800381e: e019 b.n 8003854 8003820: 40021000 .word 0x40021000 8003824: 40007000 .word 0x40007000 8003828: 42420060 .word 0x42420060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; 800382c: 4b0b ldr r3, [pc, #44] ; (800385c ) 800382e: 685b ldr r3, [r3, #4] 8003830: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8003832: 68fb ldr r3, [r7, #12] 8003834: f403 3280 and.w r2, r3, #65536 ; 0x10000 8003838: 687b ldr r3, [r7, #4] 800383a: 6a1b ldr r3, [r3, #32] 800383c: 429a cmp r2, r3 800383e: d106 bne.n 800384e (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) 8003840: 68fb ldr r3, [r7, #12] 8003842: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000 8003846: 687b ldr r3, [r7, #4] 8003848: 6a5b ldr r3, [r3, #36] ; 0x24 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 800384a: 429a cmp r2, r3 800384c: d001 beq.n 8003852 { return HAL_ERROR; 800384e: 2301 movs r3, #1 8003850: e000 b.n 8003854 } } } } return HAL_OK; 8003852: 2300 movs r3, #0 } 8003854: 4618 mov r0, r3 8003856: 3718 adds r7, #24 8003858: 46bd mov sp, r7 800385a: bd80 pop {r7, pc} 800385c: 40021000 .word 0x40021000 08003860 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 8003860: b580 push {r7, lr} 8003862: b084 sub sp, #16 8003864: af00 add r7, sp, #0 8003866: 6078 str r0, [r7, #4] 8003868: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 800386a: 687b ldr r3, [r7, #4] 800386c: 2b00 cmp r3, #0 800386e: d101 bne.n 8003874 { return HAL_ERROR; 8003870: 2301 movs r3, #1 8003872: e0d0 b.n 8003a16 must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 8003874: 4b6a ldr r3, [pc, #424] ; (8003a20 ) 8003876: 681b ldr r3, [r3, #0] 8003878: f003 0307 and.w r3, r3, #7 800387c: 683a ldr r2, [r7, #0] 800387e: 429a cmp r2, r3 8003880: d910 bls.n 80038a4 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 8003882: 4b67 ldr r3, [pc, #412] ; (8003a20 ) 8003884: 681b ldr r3, [r3, #0] 8003886: f023 0207 bic.w r2, r3, #7 800388a: 4965 ldr r1, [pc, #404] ; (8003a20 ) 800388c: 683b ldr r3, [r7, #0] 800388e: 4313 orrs r3, r2 8003890: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 8003892: 4b63 ldr r3, [pc, #396] ; (8003a20 ) 8003894: 681b ldr r3, [r3, #0] 8003896: f003 0307 and.w r3, r3, #7 800389a: 683a ldr r2, [r7, #0] 800389c: 429a cmp r2, r3 800389e: d001 beq.n 80038a4 { return HAL_ERROR; 80038a0: 2301 movs r3, #1 80038a2: e0b8 b.n 8003a16 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 80038a4: 687b ldr r3, [r7, #4] 80038a6: 681b ldr r3, [r3, #0] 80038a8: f003 0302 and.w r3, r3, #2 80038ac: 2b00 cmp r3, #0 80038ae: d020 beq.n 80038f2 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 80038b0: 687b ldr r3, [r7, #4] 80038b2: 681b ldr r3, [r3, #0] 80038b4: f003 0304 and.w r3, r3, #4 80038b8: 2b00 cmp r3, #0 80038ba: d005 beq.n 80038c8 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 80038bc: 4b59 ldr r3, [pc, #356] ; (8003a24 ) 80038be: 685b ldr r3, [r3, #4] 80038c0: 4a58 ldr r2, [pc, #352] ; (8003a24 ) 80038c2: f443 63e0 orr.w r3, r3, #1792 ; 0x700 80038c6: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 80038c8: 687b ldr r3, [r7, #4] 80038ca: 681b ldr r3, [r3, #0] 80038cc: f003 0308 and.w r3, r3, #8 80038d0: 2b00 cmp r3, #0 80038d2: d005 beq.n 80038e0 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 80038d4: 4b53 ldr r3, [pc, #332] ; (8003a24 ) 80038d6: 685b ldr r3, [r3, #4] 80038d8: 4a52 ldr r2, [pc, #328] ; (8003a24 ) 80038da: f443 5360 orr.w r3, r3, #14336 ; 0x3800 80038de: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 80038e0: 4b50 ldr r3, [pc, #320] ; (8003a24 ) 80038e2: 685b ldr r3, [r3, #4] 80038e4: f023 02f0 bic.w r2, r3, #240 ; 0xf0 80038e8: 687b ldr r3, [r7, #4] 80038ea: 689b ldr r3, [r3, #8] 80038ec: 494d ldr r1, [pc, #308] ; (8003a24 ) 80038ee: 4313 orrs r3, r2 80038f0: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 80038f2: 687b ldr r3, [r7, #4] 80038f4: 681b ldr r3, [r3, #0] 80038f6: f003 0301 and.w r3, r3, #1 80038fa: 2b00 cmp r3, #0 80038fc: d040 beq.n 8003980 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80038fe: 687b ldr r3, [r7, #4] 8003900: 685b ldr r3, [r3, #4] 8003902: 2b01 cmp r3, #1 8003904: d107 bne.n 8003916 { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8003906: 4b47 ldr r3, [pc, #284] ; (8003a24 ) 8003908: 681b ldr r3, [r3, #0] 800390a: f403 3300 and.w r3, r3, #131072 ; 0x20000 800390e: 2b00 cmp r3, #0 8003910: d115 bne.n 800393e { return HAL_ERROR; 8003912: 2301 movs r3, #1 8003914: e07f b.n 8003a16 } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8003916: 687b ldr r3, [r7, #4] 8003918: 685b ldr r3, [r3, #4] 800391a: 2b02 cmp r3, #2 800391c: d107 bne.n 800392e { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 800391e: 4b41 ldr r3, [pc, #260] ; (8003a24 ) 8003920: 681b ldr r3, [r3, #0] 8003922: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 8003926: 2b00 cmp r3, #0 8003928: d109 bne.n 800393e { return HAL_ERROR; 800392a: 2301 movs r3, #1 800392c: e073 b.n 8003a16 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 800392e: 4b3d ldr r3, [pc, #244] ; (8003a24 ) 8003930: 681b ldr r3, [r3, #0] 8003932: f003 0302 and.w r3, r3, #2 8003936: 2b00 cmp r3, #0 8003938: d101 bne.n 800393e { return HAL_ERROR; 800393a: 2301 movs r3, #1 800393c: e06b b.n 8003a16 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 800393e: 4b39 ldr r3, [pc, #228] ; (8003a24 ) 8003940: 685b ldr r3, [r3, #4] 8003942: f023 0203 bic.w r2, r3, #3 8003946: 687b ldr r3, [r7, #4] 8003948: 685b ldr r3, [r3, #4] 800394a: 4936 ldr r1, [pc, #216] ; (8003a24 ) 800394c: 4313 orrs r3, r2 800394e: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 8003950: f7fe fa04 bl 8001d5c 8003954: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8003956: e00a b.n 800396e { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8003958: f7fe fa00 bl 8001d5c 800395c: 4602 mov r2, r0 800395e: 68fb ldr r3, [r7, #12] 8003960: 1ad3 subs r3, r2, r3 8003962: f241 3288 movw r2, #5000 ; 0x1388 8003966: 4293 cmp r3, r2 8003968: d901 bls.n 800396e { return HAL_TIMEOUT; 800396a: 2303 movs r3, #3 800396c: e053 b.n 8003a16 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 800396e: 4b2d ldr r3, [pc, #180] ; (8003a24 ) 8003970: 685b ldr r3, [r3, #4] 8003972: f003 020c and.w r2, r3, #12 8003976: 687b ldr r3, [r7, #4] 8003978: 685b ldr r3, [r3, #4] 800397a: 009b lsls r3, r3, #2 800397c: 429a cmp r2, r3 800397e: d1eb bne.n 8003958 } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 8003980: 4b27 ldr r3, [pc, #156] ; (8003a20 ) 8003982: 681b ldr r3, [r3, #0] 8003984: f003 0307 and.w r3, r3, #7 8003988: 683a ldr r2, [r7, #0] 800398a: 429a cmp r2, r3 800398c: d210 bcs.n 80039b0 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 800398e: 4b24 ldr r3, [pc, #144] ; (8003a20 ) 8003990: 681b ldr r3, [r3, #0] 8003992: f023 0207 bic.w r2, r3, #7 8003996: 4922 ldr r1, [pc, #136] ; (8003a20 ) 8003998: 683b ldr r3, [r7, #0] 800399a: 4313 orrs r3, r2 800399c: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 800399e: 4b20 ldr r3, [pc, #128] ; (8003a20 ) 80039a0: 681b ldr r3, [r3, #0] 80039a2: f003 0307 and.w r3, r3, #7 80039a6: 683a ldr r2, [r7, #0] 80039a8: 429a cmp r2, r3 80039aa: d001 beq.n 80039b0 { return HAL_ERROR; 80039ac: 2301 movs r3, #1 80039ae: e032 b.n 8003a16 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 80039b0: 687b ldr r3, [r7, #4] 80039b2: 681b ldr r3, [r3, #0] 80039b4: f003 0304 and.w r3, r3, #4 80039b8: 2b00 cmp r3, #0 80039ba: d008 beq.n 80039ce { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 80039bc: 4b19 ldr r3, [pc, #100] ; (8003a24 ) 80039be: 685b ldr r3, [r3, #4] 80039c0: f423 62e0 bic.w r2, r3, #1792 ; 0x700 80039c4: 687b ldr r3, [r7, #4] 80039c6: 68db ldr r3, [r3, #12] 80039c8: 4916 ldr r1, [pc, #88] ; (8003a24 ) 80039ca: 4313 orrs r3, r2 80039cc: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 80039ce: 687b ldr r3, [r7, #4] 80039d0: 681b ldr r3, [r3, #0] 80039d2: f003 0308 and.w r3, r3, #8 80039d6: 2b00 cmp r3, #0 80039d8: d009 beq.n 80039ee { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 80039da: 4b12 ldr r3, [pc, #72] ; (8003a24 ) 80039dc: 685b ldr r3, [r3, #4] 80039de: f423 5260 bic.w r2, r3, #14336 ; 0x3800 80039e2: 687b ldr r3, [r7, #4] 80039e4: 691b ldr r3, [r3, #16] 80039e6: 00db lsls r3, r3, #3 80039e8: 490e ldr r1, [pc, #56] ; (8003a24 ) 80039ea: 4313 orrs r3, r2 80039ec: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 80039ee: f000 f821 bl 8003a34 80039f2: 4602 mov r2, r0 80039f4: 4b0b ldr r3, [pc, #44] ; (8003a24 ) 80039f6: 685b ldr r3, [r3, #4] 80039f8: 091b lsrs r3, r3, #4 80039fa: f003 030f and.w r3, r3, #15 80039fe: 490a ldr r1, [pc, #40] ; (8003a28 ) 8003a00: 5ccb ldrb r3, [r1, r3] 8003a02: fa22 f303 lsr.w r3, r2, r3 8003a06: 4a09 ldr r2, [pc, #36] ; (8003a2c ) 8003a08: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); 8003a0a: 4b09 ldr r3, [pc, #36] ; (8003a30 ) 8003a0c: 681b ldr r3, [r3, #0] 8003a0e: 4618 mov r0, r3 8003a10: f7fe f962 bl 8001cd8 return HAL_OK; 8003a14: 2300 movs r3, #0 } 8003a16: 4618 mov r0, r3 8003a18: 3710 adds r7, #16 8003a1a: 46bd mov sp, r7 8003a1c: bd80 pop {r7, pc} 8003a1e: bf00 nop 8003a20: 40022000 .word 0x40022000 8003a24: 40021000 .word 0x40021000 8003a28: 0800a084 .word 0x0800a084 8003a2c: 20000000 .word 0x20000000 8003a30: 20000004 .word 0x20000004 08003a34 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 8003a34: b490 push {r4, r7} 8003a36: b08a sub sp, #40 ; 0x28 8003a38: af00 add r7, sp, #0 #if defined(RCC_CFGR2_PREDIV1SRC) const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13}; const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; #else const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8003a3a: 4b29 ldr r3, [pc, #164] ; (8003ae0 ) 8003a3c: 1d3c adds r4, r7, #4 8003a3e: cb0f ldmia r3, {r0, r1, r2, r3} 8003a40: e884 000f stmia.w r4, {r0, r1, r2, r3} #if defined(RCC_CFGR2_PREDIV1) const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; #else const uint8_t aPredivFactorTable[2] = {1, 2}; 8003a44: f240 2301 movw r3, #513 ; 0x201 8003a48: 803b strh r3, [r7, #0] #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 8003a4a: 2300 movs r3, #0 8003a4c: 61fb str r3, [r7, #28] 8003a4e: 2300 movs r3, #0 8003a50: 61bb str r3, [r7, #24] 8003a52: 2300 movs r3, #0 8003a54: 627b str r3, [r7, #36] ; 0x24 8003a56: 2300 movs r3, #0 8003a58: 617b str r3, [r7, #20] uint32_t sysclockfreq = 0U; 8003a5a: 2300 movs r3, #0 8003a5c: 623b str r3, [r7, #32] #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; 8003a5e: 4b21 ldr r3, [pc, #132] ; (8003ae4 ) 8003a60: 685b ldr r3, [r3, #4] 8003a62: 61fb str r3, [r7, #28] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 8003a64: 69fb ldr r3, [r7, #28] 8003a66: f003 030c and.w r3, r3, #12 8003a6a: 2b04 cmp r3, #4 8003a6c: d002 beq.n 8003a74 8003a6e: 2b08 cmp r3, #8 8003a70: d003 beq.n 8003a7a 8003a72: e02b b.n 8003acc { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; 8003a74: 4b1c ldr r3, [pc, #112] ; (8003ae8 ) 8003a76: 623b str r3, [r7, #32] break; 8003a78: e02b b.n 8003ad2 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8003a7a: 69fb ldr r3, [r7, #28] 8003a7c: 0c9b lsrs r3, r3, #18 8003a7e: f003 030f and.w r3, r3, #15 8003a82: 3328 adds r3, #40 ; 0x28 8003a84: 443b add r3, r7 8003a86: f813 3c24 ldrb.w r3, [r3, #-36] 8003a8a: 617b str r3, [r7, #20] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8003a8c: 69fb ldr r3, [r7, #28] 8003a8e: f403 3380 and.w r3, r3, #65536 ; 0x10000 8003a92: 2b00 cmp r3, #0 8003a94: d012 beq.n 8003abc { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8003a96: 4b13 ldr r3, [pc, #76] ; (8003ae4 ) 8003a98: 685b ldr r3, [r3, #4] 8003a9a: 0c5b lsrs r3, r3, #17 8003a9c: f003 0301 and.w r3, r3, #1 8003aa0: 3328 adds r3, #40 ; 0x28 8003aa2: 443b add r3, r7 8003aa4: f813 3c28 ldrb.w r3, [r3, #-40] 8003aa8: 61bb str r3, [r7, #24] { pllclk = pllclk / 2; } #else /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8003aaa: 697b ldr r3, [r7, #20] 8003aac: 4a0e ldr r2, [pc, #56] ; (8003ae8 ) 8003aae: fb03 f202 mul.w r2, r3, r2 8003ab2: 69bb ldr r3, [r7, #24] 8003ab4: fbb2 f3f3 udiv r3, r2, r3 8003ab8: 627b str r3, [r7, #36] ; 0x24 8003aba: e004 b.n 8003ac6 #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8003abc: 697b ldr r3, [r7, #20] 8003abe: 4a0b ldr r2, [pc, #44] ; (8003aec ) 8003ac0: fb02 f303 mul.w r3, r2, r3 8003ac4: 627b str r3, [r7, #36] ; 0x24 } sysclockfreq = pllclk; 8003ac6: 6a7b ldr r3, [r7, #36] ; 0x24 8003ac8: 623b str r3, [r7, #32] break; 8003aca: e002 b.n 8003ad2 } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; 8003acc: 4b06 ldr r3, [pc, #24] ; (8003ae8 ) 8003ace: 623b str r3, [r7, #32] break; 8003ad0: bf00 nop } } return sysclockfreq; 8003ad2: 6a3b ldr r3, [r7, #32] } 8003ad4: 4618 mov r0, r3 8003ad6: 3728 adds r7, #40 ; 0x28 8003ad8: 46bd mov sp, r7 8003ada: bc90 pop {r4, r7} 8003adc: 4770 bx lr 8003ade: bf00 nop 8003ae0: 08009fa0 .word 0x08009fa0 8003ae4: 40021000 .word 0x40021000 8003ae8: 007a1200 .word 0x007a1200 8003aec: 003d0900 .word 0x003d0900 08003af0 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 8003af0: b480 push {r7} 8003af2: af00 add r7, sp, #0 return SystemCoreClock; 8003af4: 4b02 ldr r3, [pc, #8] ; (8003b00 ) 8003af6: 681b ldr r3, [r3, #0] } 8003af8: 4618 mov r0, r3 8003afa: 46bd mov sp, r7 8003afc: bc80 pop {r7} 8003afe: 4770 bx lr 8003b00: 20000000 .word 0x20000000 08003b04 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 8003b04: b580 push {r7, lr} 8003b06: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8003b08: f7ff fff2 bl 8003af0 8003b0c: 4602 mov r2, r0 8003b0e: 4b05 ldr r3, [pc, #20] ; (8003b24 ) 8003b10: 685b ldr r3, [r3, #4] 8003b12: 0a1b lsrs r3, r3, #8 8003b14: f003 0307 and.w r3, r3, #7 8003b18: 4903 ldr r1, [pc, #12] ; (8003b28 ) 8003b1a: 5ccb ldrb r3, [r1, r3] 8003b1c: fa22 f303 lsr.w r3, r2, r3 } 8003b20: 4618 mov r0, r3 8003b22: bd80 pop {r7, pc} 8003b24: 40021000 .word 0x40021000 8003b28: 0800a094 .word 0x0800a094 08003b2c : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { 8003b2c: b480 push {r7} 8003b2e: b085 sub sp, #20 8003b30: af00 add r7, sp, #0 8003b32: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8003b34: 4b0a ldr r3, [pc, #40] ; (8003b60 ) 8003b36: 681b ldr r3, [r3, #0] 8003b38: 4a0a ldr r2, [pc, #40] ; (8003b64 ) 8003b3a: fba2 2303 umull r2, r3, r2, r3 8003b3e: 0a5b lsrs r3, r3, #9 8003b40: 687a ldr r2, [r7, #4] 8003b42: fb02 f303 mul.w r3, r2, r3 8003b46: 60fb str r3, [r7, #12] do { __NOP(); 8003b48: bf00 nop } while (Delay --); 8003b4a: 68fb ldr r3, [r7, #12] 8003b4c: 1e5a subs r2, r3, #1 8003b4e: 60fa str r2, [r7, #12] 8003b50: 2b00 cmp r3, #0 8003b52: d1f9 bne.n 8003b48 } 8003b54: bf00 nop 8003b56: bf00 nop 8003b58: 3714 adds r7, #20 8003b5a: 46bd mov sp, r7 8003b5c: bc80 pop {r7} 8003b5e: 4770 bx lr 8003b60: 20000000 .word 0x20000000 8003b64: 10624dd3 .word 0x10624dd3 08003b68 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) { 8003b68: b580 push {r7, lr} 8003b6a: b082 sub sp, #8 8003b6c: af00 add r7, sp, #0 8003b6e: 6078 str r0, [r7, #4] /* Check the SPI handle allocation */ if (hspi == NULL) 8003b70: 687b ldr r3, [r7, #4] 8003b72: 2b00 cmp r3, #0 8003b74: d101 bne.n 8003b7a { return HAL_ERROR; 8003b76: 2301 movs r3, #1 8003b78: e076 b.n 8003c68 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); /* TI mode is not supported on this device. TIMode parameter is mandatory equal to SPI_TIMODE_DISABLE */ assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) 8003b7a: 687b ldr r3, [r7, #4] 8003b7c: 6a5b ldr r3, [r3, #36] ; 0x24 8003b7e: 2b00 cmp r3, #0 8003b80: d108 bne.n 8003b94 { assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); if (hspi->Init.Mode == SPI_MODE_MASTER) 8003b82: 687b ldr r3, [r7, #4] 8003b84: 685b ldr r3, [r3, #4] 8003b86: f5b3 7f82 cmp.w r3, #260 ; 0x104 8003b8a: d009 beq.n 8003ba0 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); } else { /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */ hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; 8003b8c: 687b ldr r3, [r7, #4] 8003b8e: 2200 movs r2, #0 8003b90: 61da str r2, [r3, #28] 8003b92: e005 b.n 8003ba0 else { assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); /* Force polarity and phase to TI protocaol requirements */ hspi->Init.CLKPolarity = SPI_POLARITY_LOW; 8003b94: 687b ldr r3, [r7, #4] 8003b96: 2200 movs r2, #0 8003b98: 611a str r2, [r3, #16] hspi->Init.CLKPhase = SPI_PHASE_1EDGE; 8003b9a: 687b ldr r3, [r7, #4] 8003b9c: 2200 movs r2, #0 8003b9e: 615a str r2, [r3, #20] if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) { assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); } #else hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 8003ba0: 687b ldr r3, [r7, #4] 8003ba2: 2200 movs r2, #0 8003ba4: 629a str r2, [r3, #40] ; 0x28 #endif /* USE_SPI_CRC */ if (hspi->State == HAL_SPI_STATE_RESET) 8003ba6: 687b ldr r3, [r7, #4] 8003ba8: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 8003bac: b2db uxtb r3, r3 8003bae: 2b00 cmp r3, #0 8003bb0: d106 bne.n 8003bc0 { /* Allocate lock resource and initialize it */ hspi->Lock = HAL_UNLOCKED; 8003bb2: 687b ldr r3, [r7, #4] 8003bb4: 2200 movs r2, #0 8003bb6: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Init the low level hardware : GPIO, CLOCK, NVIC... */ hspi->MspInitCallback(hspi); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_SPI_MspInit(hspi); 8003bba: 6878 ldr r0, [r7, #4] 8003bbc: f7fd fe4c bl 8001858 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } hspi->State = HAL_SPI_STATE_BUSY; 8003bc0: 687b ldr r3, [r7, #4] 8003bc2: 2202 movs r2, #2 8003bc4: f883 2051 strb.w r2, [r3, #81] ; 0x51 /* Disable the selected SPI peripheral */ __HAL_SPI_DISABLE(hspi); 8003bc8: 687b ldr r3, [r7, #4] 8003bca: 681b ldr r3, [r3, #0] 8003bcc: 681a ldr r2, [r3, #0] 8003bce: 687b ldr r3, [r7, #4] 8003bd0: 681b ldr r3, [r3, #0] 8003bd2: f022 0240 bic.w r2, r2, #64 ; 0x40 8003bd6: 601a str r2, [r3, #0] /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management, Communication speed, First bit and CRC calculation state */ WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) | 8003bd8: 687b ldr r3, [r7, #4] 8003bda: 685b ldr r3, [r3, #4] 8003bdc: f403 7282 and.w r2, r3, #260 ; 0x104 8003be0: 687b ldr r3, [r7, #4] 8003be2: 689b ldr r3, [r3, #8] 8003be4: f403 4304 and.w r3, r3, #33792 ; 0x8400 8003be8: 431a orrs r2, r3 8003bea: 687b ldr r3, [r7, #4] 8003bec: 68db ldr r3, [r3, #12] 8003bee: f403 6300 and.w r3, r3, #2048 ; 0x800 8003bf2: 431a orrs r2, r3 8003bf4: 687b ldr r3, [r7, #4] 8003bf6: 691b ldr r3, [r3, #16] 8003bf8: f003 0302 and.w r3, r3, #2 8003bfc: 431a orrs r2, r3 8003bfe: 687b ldr r3, [r7, #4] 8003c00: 695b ldr r3, [r3, #20] 8003c02: f003 0301 and.w r3, r3, #1 8003c06: 431a orrs r2, r3 8003c08: 687b ldr r3, [r7, #4] 8003c0a: 699b ldr r3, [r3, #24] 8003c0c: f403 7300 and.w r3, r3, #512 ; 0x200 8003c10: 431a orrs r2, r3 8003c12: 687b ldr r3, [r7, #4] 8003c14: 69db ldr r3, [r3, #28] 8003c16: f003 0338 and.w r3, r3, #56 ; 0x38 8003c1a: 431a orrs r2, r3 8003c1c: 687b ldr r3, [r7, #4] 8003c1e: 6a1b ldr r3, [r3, #32] 8003c20: f003 0380 and.w r3, r3, #128 ; 0x80 8003c24: ea42 0103 orr.w r1, r2, r3 8003c28: 687b ldr r3, [r7, #4] 8003c2a: 6a9b ldr r3, [r3, #40] ; 0x28 8003c2c: f403 5200 and.w r2, r3, #8192 ; 0x2000 8003c30: 687b ldr r3, [r7, #4] 8003c32: 681b ldr r3, [r3, #0] 8003c34: 430a orrs r2, r1 8003c36: 601a str r2, [r3, #0] (hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) | (hspi->Init.FirstBit & SPI_CR1_LSBFIRST) | (hspi->Init.CRCCalculation & SPI_CR1_CRCEN))); /* Configure : NSS management */ WRITE_REG(hspi->Instance->CR2, ((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE)); 8003c38: 687b ldr r3, [r7, #4] 8003c3a: 699b ldr r3, [r3, #24] 8003c3c: 0c1a lsrs r2, r3, #16 8003c3e: 687b ldr r3, [r7, #4] 8003c40: 681b ldr r3, [r3, #0] 8003c42: f002 0204 and.w r2, r2, #4 8003c46: 605a str r2, [r3, #4] } #endif /* USE_SPI_CRC */ #if defined(SPI_I2SCFGR_I2SMOD) /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); 8003c48: 687b ldr r3, [r7, #4] 8003c4a: 681b ldr r3, [r3, #0] 8003c4c: 69da ldr r2, [r3, #28] 8003c4e: 687b ldr r3, [r7, #4] 8003c50: 681b ldr r3, [r3, #0] 8003c52: f422 6200 bic.w r2, r2, #2048 ; 0x800 8003c56: 61da str r2, [r3, #28] #endif /* SPI_I2SCFGR_I2SMOD */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8003c58: 687b ldr r3, [r7, #4] 8003c5a: 2200 movs r2, #0 8003c5c: 655a str r2, [r3, #84] ; 0x54 hspi->State = HAL_SPI_STATE_READY; 8003c5e: 687b ldr r3, [r7, #4] 8003c60: 2201 movs r2, #1 8003c62: f883 2051 strb.w r2, [r3, #81] ; 0x51 return HAL_OK; 8003c66: 2300 movs r3, #0 } 8003c68: 4618 mov r0, r3 8003c6a: 3708 adds r7, #8 8003c6c: 46bd mov sp, r7 8003c6e: bd80 pop {r7, pc} 08003c70 : * @param ExtTiming Pointer to SRAM extended mode timing structure * @retval HAL status */ HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming) { 8003c70: b580 push {r7, lr} 8003c72: b084 sub sp, #16 8003c74: af00 add r7, sp, #0 8003c76: 60f8 str r0, [r7, #12] 8003c78: 60b9 str r1, [r7, #8] 8003c7a: 607a str r2, [r7, #4] /* Check the SRAM handle parameter */ if ((hsram == NULL) || (hsram->Init.BurstAccessMode == FSMC_BURST_ACCESS_MODE_ENABLE)) 8003c7c: 68fb ldr r3, [r7, #12] 8003c7e: 2b00 cmp r3, #0 8003c80: d004 beq.n 8003c8c 8003c82: 68fb ldr r3, [r7, #12] 8003c84: 699b ldr r3, [r3, #24] 8003c86: f5b3 7f80 cmp.w r3, #256 ; 0x100 8003c8a: d101 bne.n 8003c90 { return HAL_ERROR; 8003c8c: 2301 movs r3, #1 8003c8e: e038 b.n 8003d02 } if (hsram->State == HAL_SRAM_STATE_RESET) 8003c90: 68fb ldr r3, [r7, #12] 8003c92: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 8003c96: b2db uxtb r3, r3 8003c98: 2b00 cmp r3, #0 8003c9a: d106 bne.n 8003caa { /* Allocate lock resource and initialize it */ hsram->Lock = HAL_UNLOCKED; 8003c9c: 68fb ldr r3, [r7, #12] 8003c9e: 2200 movs r2, #0 8003ca0: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Init the low level hardware */ hsram->MspInitCallback(hsram); #else /* Initialize the low level hardware (MSP) */ HAL_SRAM_MspInit(hsram); 8003ca4: 68f8 ldr r0, [r7, #12] 8003ca6: f7fd feeb bl 8001a80 #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ } /* Initialize SRAM control Interface */ (void)FSMC_NORSRAM_Init(hsram->Instance, &(hsram->Init)); 8003caa: 68fb ldr r3, [r7, #12] 8003cac: 681a ldr r2, [r3, #0] 8003cae: 68fb ldr r3, [r7, #12] 8003cb0: 3308 adds r3, #8 8003cb2: 4619 mov r1, r3 8003cb4: 4610 mov r0, r2 8003cb6: f000 ffc3 bl 8004c40 /* Initialize SRAM timing Interface */ (void)FSMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank); 8003cba: 68fb ldr r3, [r7, #12] 8003cbc: 6818 ldr r0, [r3, #0] 8003cbe: 68fb ldr r3, [r7, #12] 8003cc0: 689b ldr r3, [r3, #8] 8003cc2: 461a mov r2, r3 8003cc4: 68b9 ldr r1, [r7, #8] 8003cc6: f001 f825 bl 8004d14 /* Initialize SRAM extended mode timing Interface */ (void)FSMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank, 8003cca: 68fb ldr r3, [r7, #12] 8003ccc: 6858 ldr r0, [r3, #4] 8003cce: 68fb ldr r3, [r7, #12] 8003cd0: 689a ldr r2, [r3, #8] 8003cd2: 68fb ldr r3, [r7, #12] 8003cd4: 6b1b ldr r3, [r3, #48] ; 0x30 8003cd6: 6879 ldr r1, [r7, #4] 8003cd8: f001 f850 bl 8004d7c hsram->Init.ExtendedMode); /* Enable the NORSRAM device */ __FSMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank); 8003cdc: 68fb ldr r3, [r7, #12] 8003cde: 681b ldr r3, [r3, #0] 8003ce0: 68fa ldr r2, [r7, #12] 8003ce2: 6892 ldr r2, [r2, #8] 8003ce4: f853 1022 ldr.w r1, [r3, r2, lsl #2] 8003ce8: 68fb ldr r3, [r7, #12] 8003cea: 681b ldr r3, [r3, #0] 8003cec: 68fa ldr r2, [r7, #12] 8003cee: 6892 ldr r2, [r2, #8] 8003cf0: f041 0101 orr.w r1, r1, #1 8003cf4: f843 1022 str.w r1, [r3, r2, lsl #2] /* Initialize the SRAM controller state */ hsram->State = HAL_SRAM_STATE_READY; 8003cf8: 68fb ldr r3, [r7, #12] 8003cfa: 2201 movs r2, #1 8003cfc: f883 2041 strb.w r2, [r3, #65] ; 0x41 return HAL_OK; 8003d00: 2300 movs r3, #0 } 8003d02: 4618 mov r0, r3 8003d04: 3710 adds r7, #16 8003d06: 46bd mov sp, r7 8003d08: bd80 pop {r7, pc} 08003d0a : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 8003d0a: b580 push {r7, lr} 8003d0c: b082 sub sp, #8 8003d0e: af00 add r7, sp, #0 8003d10: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8003d12: 687b ldr r3, [r7, #4] 8003d14: 2b00 cmp r3, #0 8003d16: d101 bne.n 8003d1c { return HAL_ERROR; 8003d18: 2301 movs r3, #1 8003d1a: e041 b.n 8003da0 assert_param(IS_TIM_INSTANCE(htim->Instance)); assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8003d1c: 687b ldr r3, [r7, #4] 8003d1e: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 8003d22: b2db uxtb r3, r3 8003d24: 2b00 cmp r3, #0 8003d26: d106 bne.n 8003d36 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8003d28: 687b ldr r3, [r7, #4] 8003d2a: 2200 movs r2, #0 8003d2c: f883 203c strb.w r2, [r3, #60] ; 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 8003d30: 6878 ldr r0, [r7, #4] 8003d32: f7fd fddb bl 80018ec #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8003d36: 687b ldr r3, [r7, #4] 8003d38: 2202 movs r2, #2 8003d3a: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8003d3e: 687b ldr r3, [r7, #4] 8003d40: 681a ldr r2, [r3, #0] 8003d42: 687b ldr r3, [r7, #4] 8003d44: 3304 adds r3, #4 8003d46: 4619 mov r1, r3 8003d48: 4610 mov r0, r2 8003d4a: f000 fc1b bl 8004584 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8003d4e: 687b ldr r3, [r7, #4] 8003d50: 2201 movs r2, #1 8003d52: f883 2046 strb.w r2, [r3, #70] ; 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8003d56: 687b ldr r3, [r7, #4] 8003d58: 2201 movs r2, #1 8003d5a: f883 203e strb.w r2, [r3, #62] ; 0x3e 8003d5e: 687b ldr r3, [r7, #4] 8003d60: 2201 movs r2, #1 8003d62: f883 203f strb.w r2, [r3, #63] ; 0x3f 8003d66: 687b ldr r3, [r7, #4] 8003d68: 2201 movs r2, #1 8003d6a: f883 2040 strb.w r2, [r3, #64] ; 0x40 8003d6e: 687b ldr r3, [r7, #4] 8003d70: 2201 movs r2, #1 8003d72: f883 2041 strb.w r2, [r3, #65] ; 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8003d76: 687b ldr r3, [r7, #4] 8003d78: 2201 movs r2, #1 8003d7a: f883 2042 strb.w r2, [r3, #66] ; 0x42 8003d7e: 687b ldr r3, [r7, #4] 8003d80: 2201 movs r2, #1 8003d82: f883 2043 strb.w r2, [r3, #67] ; 0x43 8003d86: 687b ldr r3, [r7, #4] 8003d88: 2201 movs r2, #1 8003d8a: f883 2044 strb.w r2, [r3, #68] ; 0x44 8003d8e: 687b ldr r3, [r7, #4] 8003d90: 2201 movs r2, #1 8003d92: f883 2045 strb.w r2, [r3, #69] ; 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8003d96: 687b ldr r3, [r7, #4] 8003d98: 2201 movs r2, #1 8003d9a: f883 203d strb.w r2, [r3, #61] ; 0x3d return HAL_OK; 8003d9e: 2300 movs r3, #0 } 8003da0: 4618 mov r0, r3 8003da2: 3708 adds r7, #8 8003da4: 46bd mov sp, r7 8003da6: bd80 pop {r7, pc} 08003da8 : * @brief Stops the TIM Base generation in interrupt mode. * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim) { 8003da8: b480 push {r7} 8003daa: b083 sub sp, #12 8003dac: af00 add r7, sp, #0 8003dae: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Disable the TIM Update interrupt */ __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE); 8003db0: 687b ldr r3, [r7, #4] 8003db2: 681b ldr r3, [r3, #0] 8003db4: 68da ldr r2, [r3, #12] 8003db6: 687b ldr r3, [r7, #4] 8003db8: 681b ldr r3, [r3, #0] 8003dba: f022 0201 bic.w r2, r2, #1 8003dbe: 60da str r2, [r3, #12] /* Disable the Peripheral */ __HAL_TIM_DISABLE(htim); 8003dc0: 687b ldr r3, [r7, #4] 8003dc2: 681b ldr r3, [r3, #0] 8003dc4: 6a1a ldr r2, [r3, #32] 8003dc6: f241 1311 movw r3, #4369 ; 0x1111 8003dca: 4013 ands r3, r2 8003dcc: 2b00 cmp r3, #0 8003dce: d10f bne.n 8003df0 8003dd0: 687b ldr r3, [r7, #4] 8003dd2: 681b ldr r3, [r3, #0] 8003dd4: 6a1a ldr r2, [r3, #32] 8003dd6: f240 4344 movw r3, #1092 ; 0x444 8003dda: 4013 ands r3, r2 8003ddc: 2b00 cmp r3, #0 8003dde: d107 bne.n 8003df0 8003de0: 687b ldr r3, [r7, #4] 8003de2: 681b ldr r3, [r3, #0] 8003de4: 681a ldr r2, [r3, #0] 8003de6: 687b ldr r3, [r7, #4] 8003de8: 681b ldr r3, [r3, #0] 8003dea: f022 0201 bic.w r2, r2, #1 8003dee: 601a str r2, [r3, #0] /* Set the TIM state */ htim->State = HAL_TIM_STATE_READY; 8003df0: 687b ldr r3, [r7, #4] 8003df2: 2201 movs r2, #1 8003df4: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Return function status */ return HAL_OK; 8003df8: 2300 movs r3, #0 } 8003dfa: 4618 mov r0, r3 8003dfc: 370c adds r7, #12 8003dfe: 46bd mov sp, r7 8003e00: bc80 pop {r7} 8003e02: 4770 bx lr 08003e04 : * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() * @param htim TIM PWM handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { 8003e04: b580 push {r7, lr} 8003e06: b082 sub sp, #8 8003e08: af00 add r7, sp, #0 8003e0a: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8003e0c: 687b ldr r3, [r7, #4] 8003e0e: 2b00 cmp r3, #0 8003e10: d101 bne.n 8003e16 { return HAL_ERROR; 8003e12: 2301 movs r3, #1 8003e14: e041 b.n 8003e9a assert_param(IS_TIM_INSTANCE(htim->Instance)); assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8003e16: 687b ldr r3, [r7, #4] 8003e18: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 8003e1c: b2db uxtb r3, r3 8003e1e: 2b00 cmp r3, #0 8003e20: d106 bne.n 8003e30 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8003e22: 687b ldr r3, [r7, #4] 8003e24: 2200 movs r2, #0 8003e26: f883 203c strb.w r2, [r3, #60] ; 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->PWM_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_PWM_MspInit(htim); 8003e2a: 6878 ldr r0, [r7, #4] 8003e2c: f000 f839 bl 8003ea2 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8003e30: 687b ldr r3, [r7, #4] 8003e32: 2202 movs r2, #2 8003e34: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Init the base time for the PWM */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8003e38: 687b ldr r3, [r7, #4] 8003e3a: 681a ldr r2, [r3, #0] 8003e3c: 687b ldr r3, [r7, #4] 8003e3e: 3304 adds r3, #4 8003e40: 4619 mov r1, r3 8003e42: 4610 mov r0, r2 8003e44: f000 fb9e bl 8004584 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8003e48: 687b ldr r3, [r7, #4] 8003e4a: 2201 movs r2, #1 8003e4c: f883 2046 strb.w r2, [r3, #70] ; 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8003e50: 687b ldr r3, [r7, #4] 8003e52: 2201 movs r2, #1 8003e54: f883 203e strb.w r2, [r3, #62] ; 0x3e 8003e58: 687b ldr r3, [r7, #4] 8003e5a: 2201 movs r2, #1 8003e5c: f883 203f strb.w r2, [r3, #63] ; 0x3f 8003e60: 687b ldr r3, [r7, #4] 8003e62: 2201 movs r2, #1 8003e64: f883 2040 strb.w r2, [r3, #64] ; 0x40 8003e68: 687b ldr r3, [r7, #4] 8003e6a: 2201 movs r2, #1 8003e6c: f883 2041 strb.w r2, [r3, #65] ; 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8003e70: 687b ldr r3, [r7, #4] 8003e72: 2201 movs r2, #1 8003e74: f883 2042 strb.w r2, [r3, #66] ; 0x42 8003e78: 687b ldr r3, [r7, #4] 8003e7a: 2201 movs r2, #1 8003e7c: f883 2043 strb.w r2, [r3, #67] ; 0x43 8003e80: 687b ldr r3, [r7, #4] 8003e82: 2201 movs r2, #1 8003e84: f883 2044 strb.w r2, [r3, #68] ; 0x44 8003e88: 687b ldr r3, [r7, #4] 8003e8a: 2201 movs r2, #1 8003e8c: f883 2045 strb.w r2, [r3, #69] ; 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8003e90: 687b ldr r3, [r7, #4] 8003e92: 2201 movs r2, #1 8003e94: f883 203d strb.w r2, [r3, #61] ; 0x3d return HAL_OK; 8003e98: 2300 movs r3, #0 } 8003e9a: 4618 mov r0, r3 8003e9c: 3708 adds r7, #8 8003e9e: 46bd mov sp, r7 8003ea0: bd80 pop {r7, pc} 08003ea2 : * @brief Initializes the TIM PWM MSP. * @param htim TIM PWM handle * @retval None */ __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) { 8003ea2: b480 push {r7} 8003ea4: b083 sub sp, #12 8003ea6: af00 add r7, sp, #0 8003ea8: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_MspInit could be implemented in the user file */ } 8003eaa: bf00 nop 8003eac: 370c adds r7, #12 8003eae: 46bd mov sp, r7 8003eb0: bc80 pop {r7} 8003eb2: 4770 bx lr 08003eb4 : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) { 8003eb4: b580 push {r7, lr} 8003eb6: b084 sub sp, #16 8003eb8: af00 add r7, sp, #0 8003eba: 6078 str r0, [r7, #4] 8003ebc: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Check the TIM channel state */ if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 8003ebe: 683b ldr r3, [r7, #0] 8003ec0: 2b00 cmp r3, #0 8003ec2: d109 bne.n 8003ed8 8003ec4: 687b ldr r3, [r7, #4] 8003ec6: f893 303e ldrb.w r3, [r3, #62] ; 0x3e 8003eca: b2db uxtb r3, r3 8003ecc: 2b01 cmp r3, #1 8003ece: bf14 ite ne 8003ed0: 2301 movne r3, #1 8003ed2: 2300 moveq r3, #0 8003ed4: b2db uxtb r3, r3 8003ed6: e022 b.n 8003f1e 8003ed8: 683b ldr r3, [r7, #0] 8003eda: 2b04 cmp r3, #4 8003edc: d109 bne.n 8003ef2 8003ede: 687b ldr r3, [r7, #4] 8003ee0: f893 303f ldrb.w r3, [r3, #63] ; 0x3f 8003ee4: b2db uxtb r3, r3 8003ee6: 2b01 cmp r3, #1 8003ee8: bf14 ite ne 8003eea: 2301 movne r3, #1 8003eec: 2300 moveq r3, #0 8003eee: b2db uxtb r3, r3 8003ef0: e015 b.n 8003f1e 8003ef2: 683b ldr r3, [r7, #0] 8003ef4: 2b08 cmp r3, #8 8003ef6: d109 bne.n 8003f0c 8003ef8: 687b ldr r3, [r7, #4] 8003efa: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 8003efe: b2db uxtb r3, r3 8003f00: 2b01 cmp r3, #1 8003f02: bf14 ite ne 8003f04: 2301 movne r3, #1 8003f06: 2300 moveq r3, #0 8003f08: b2db uxtb r3, r3 8003f0a: e008 b.n 8003f1e 8003f0c: 687b ldr r3, [r7, #4] 8003f0e: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 8003f12: b2db uxtb r3, r3 8003f14: 2b01 cmp r3, #1 8003f16: bf14 ite ne 8003f18: 2301 movne r3, #1 8003f1a: 2300 moveq r3, #0 8003f1c: b2db uxtb r3, r3 8003f1e: 2b00 cmp r3, #0 8003f20: d001 beq.n 8003f26 { return HAL_ERROR; 8003f22: 2301 movs r3, #1 8003f24: e072 b.n 800400c } /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 8003f26: 683b ldr r3, [r7, #0] 8003f28: 2b00 cmp r3, #0 8003f2a: d104 bne.n 8003f36 8003f2c: 687b ldr r3, [r7, #4] 8003f2e: 2202 movs r2, #2 8003f30: f883 203e strb.w r2, [r3, #62] ; 0x3e 8003f34: e013 b.n 8003f5e 8003f36: 683b ldr r3, [r7, #0] 8003f38: 2b04 cmp r3, #4 8003f3a: d104 bne.n 8003f46 8003f3c: 687b ldr r3, [r7, #4] 8003f3e: 2202 movs r2, #2 8003f40: f883 203f strb.w r2, [r3, #63] ; 0x3f 8003f44: e00b b.n 8003f5e 8003f46: 683b ldr r3, [r7, #0] 8003f48: 2b08 cmp r3, #8 8003f4a: d104 bne.n 8003f56 8003f4c: 687b ldr r3, [r7, #4] 8003f4e: 2202 movs r2, #2 8003f50: f883 2040 strb.w r2, [r3, #64] ; 0x40 8003f54: e003 b.n 8003f5e 8003f56: 687b ldr r3, [r7, #4] 8003f58: 2202 movs r2, #2 8003f5a: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Enable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); 8003f5e: 687b ldr r3, [r7, #4] 8003f60: 681b ldr r3, [r3, #0] 8003f62: 2201 movs r2, #1 8003f64: 6839 ldr r1, [r7, #0] 8003f66: 4618 mov r0, r3 8003f68: f000 fdc8 bl 8004afc if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8003f6c: 687b ldr r3, [r7, #4] 8003f6e: 681b ldr r3, [r3, #0] 8003f70: 4a28 ldr r2, [pc, #160] ; (8004014 ) 8003f72: 4293 cmp r3, r2 8003f74: d004 beq.n 8003f80 8003f76: 687b ldr r3, [r7, #4] 8003f78: 681b ldr r3, [r3, #0] 8003f7a: 4a27 ldr r2, [pc, #156] ; (8004018 ) 8003f7c: 4293 cmp r3, r2 8003f7e: d101 bne.n 8003f84 8003f80: 2301 movs r3, #1 8003f82: e000 b.n 8003f86 8003f84: 2300 movs r3, #0 8003f86: 2b00 cmp r3, #0 8003f88: d007 beq.n 8003f9a { /* Enable the main output */ __HAL_TIM_MOE_ENABLE(htim); 8003f8a: 687b ldr r3, [r7, #4] 8003f8c: 681b ldr r3, [r3, #0] 8003f8e: 6c5a ldr r2, [r3, #68] ; 0x44 8003f90: 687b ldr r3, [r7, #4] 8003f92: 681b ldr r3, [r3, #0] 8003f94: f442 4200 orr.w r2, r2, #32768 ; 0x8000 8003f98: 645a str r2, [r3, #68] ; 0x44 } /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8003f9a: 687b ldr r3, [r7, #4] 8003f9c: 681b ldr r3, [r3, #0] 8003f9e: 4a1d ldr r2, [pc, #116] ; (8004014 ) 8003fa0: 4293 cmp r3, r2 8003fa2: d018 beq.n 8003fd6 8003fa4: 687b ldr r3, [r7, #4] 8003fa6: 681b ldr r3, [r3, #0] 8003fa8: 4a1b ldr r2, [pc, #108] ; (8004018 ) 8003faa: 4293 cmp r3, r2 8003fac: d013 beq.n 8003fd6 8003fae: 687b ldr r3, [r7, #4] 8003fb0: 681b ldr r3, [r3, #0] 8003fb2: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 8003fb6: d00e beq.n 8003fd6 8003fb8: 687b ldr r3, [r7, #4] 8003fba: 681b ldr r3, [r3, #0] 8003fbc: 4a17 ldr r2, [pc, #92] ; (800401c ) 8003fbe: 4293 cmp r3, r2 8003fc0: d009 beq.n 8003fd6 8003fc2: 687b ldr r3, [r7, #4] 8003fc4: 681b ldr r3, [r3, #0] 8003fc6: 4a16 ldr r2, [pc, #88] ; (8004020 ) 8003fc8: 4293 cmp r3, r2 8003fca: d004 beq.n 8003fd6 8003fcc: 687b ldr r3, [r7, #4] 8003fce: 681b ldr r3, [r3, #0] 8003fd0: 4a14 ldr r2, [pc, #80] ; (8004024 ) 8003fd2: 4293 cmp r3, r2 8003fd4: d111 bne.n 8003ffa { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 8003fd6: 687b ldr r3, [r7, #4] 8003fd8: 681b ldr r3, [r3, #0] 8003fda: 689b ldr r3, [r3, #8] 8003fdc: f003 0307 and.w r3, r3, #7 8003fe0: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8003fe2: 68fb ldr r3, [r7, #12] 8003fe4: 2b06 cmp r3, #6 8003fe6: d010 beq.n 800400a { __HAL_TIM_ENABLE(htim); 8003fe8: 687b ldr r3, [r7, #4] 8003fea: 681b ldr r3, [r3, #0] 8003fec: 681a ldr r2, [r3, #0] 8003fee: 687b ldr r3, [r7, #4] 8003ff0: 681b ldr r3, [r3, #0] 8003ff2: f042 0201 orr.w r2, r2, #1 8003ff6: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8003ff8: e007 b.n 800400a } } else { __HAL_TIM_ENABLE(htim); 8003ffa: 687b ldr r3, [r7, #4] 8003ffc: 681b ldr r3, [r3, #0] 8003ffe: 681a ldr r2, [r3, #0] 8004000: 687b ldr r3, [r7, #4] 8004002: 681b ldr r3, [r3, #0] 8004004: f042 0201 orr.w r2, r2, #1 8004008: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; 800400a: 2300 movs r3, #0 } 800400c: 4618 mov r0, r3 800400e: 3710 adds r7, #16 8004010: 46bd mov sp, r7 8004012: bd80 pop {r7, pc} 8004014: 40012c00 .word 0x40012c00 8004018: 40013400 .word 0x40013400 800401c: 40000400 .word 0x40000400 8004020: 40000800 .word 0x40000800 8004024: 40000c00 .word 0x40000c00 08004028 : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { 8004028: b580 push {r7, lr} 800402a: b082 sub sp, #8 800402c: af00 add r7, sp, #0 800402e: 6078 str r0, [r7, #4] /* Capture compare 1 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8004030: 687b ldr r3, [r7, #4] 8004032: 681b ldr r3, [r3, #0] 8004034: 691b ldr r3, [r3, #16] 8004036: f003 0302 and.w r3, r3, #2 800403a: 2b02 cmp r3, #2 800403c: d122 bne.n 8004084 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) 800403e: 687b ldr r3, [r7, #4] 8004040: 681b ldr r3, [r3, #0] 8004042: 68db ldr r3, [r3, #12] 8004044: f003 0302 and.w r3, r3, #2 8004048: 2b02 cmp r3, #2 800404a: d11b bne.n 8004084 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 800404c: 687b ldr r3, [r7, #4] 800404e: 681b ldr r3, [r3, #0] 8004050: f06f 0202 mvn.w r2, #2 8004054: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8004056: 687b ldr r3, [r7, #4] 8004058: 2201 movs r2, #1 800405a: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 800405c: 687b ldr r3, [r7, #4] 800405e: 681b ldr r3, [r3, #0] 8004060: 699b ldr r3, [r3, #24] 8004062: f003 0303 and.w r3, r3, #3 8004066: 2b00 cmp r3, #0 8004068: d003 beq.n 8004072 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 800406a: 6878 ldr r0, [r7, #4] 800406c: f000 fa6f bl 800454e 8004070: e005 b.n 800407e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 8004072: 6878 ldr r0, [r7, #4] 8004074: f000 fa62 bl 800453c HAL_TIM_PWM_PulseFinishedCallback(htim); 8004078: 6878 ldr r0, [r7, #4] 800407a: f000 fa71 bl 8004560 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800407e: 687b ldr r3, [r7, #4] 8004080: 2200 movs r2, #0 8004082: 771a strb r2, [r3, #28] } } } /* Capture compare 2 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 8004084: 687b ldr r3, [r7, #4] 8004086: 681b ldr r3, [r3, #0] 8004088: 691b ldr r3, [r3, #16] 800408a: f003 0304 and.w r3, r3, #4 800408e: 2b04 cmp r3, #4 8004090: d122 bne.n 80040d8 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) 8004092: 687b ldr r3, [r7, #4] 8004094: 681b ldr r3, [r3, #0] 8004096: 68db ldr r3, [r3, #12] 8004098: f003 0304 and.w r3, r3, #4 800409c: 2b04 cmp r3, #4 800409e: d11b bne.n 80040d8 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 80040a0: 687b ldr r3, [r7, #4] 80040a2: 681b ldr r3, [r3, #0] 80040a4: f06f 0204 mvn.w r2, #4 80040a8: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 80040aa: 687b ldr r3, [r7, #4] 80040ac: 2202 movs r2, #2 80040ae: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 80040b0: 687b ldr r3, [r7, #4] 80040b2: 681b ldr r3, [r3, #0] 80040b4: 699b ldr r3, [r3, #24] 80040b6: f403 7340 and.w r3, r3, #768 ; 0x300 80040ba: 2b00 cmp r3, #0 80040bc: d003 beq.n 80040c6 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 80040be: 6878 ldr r0, [r7, #4] 80040c0: f000 fa45 bl 800454e 80040c4: e005 b.n 80040d2 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 80040c6: 6878 ldr r0, [r7, #4] 80040c8: f000 fa38 bl 800453c HAL_TIM_PWM_PulseFinishedCallback(htim); 80040cc: 6878 ldr r0, [r7, #4] 80040ce: f000 fa47 bl 8004560 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80040d2: 687b ldr r3, [r7, #4] 80040d4: 2200 movs r2, #0 80040d6: 771a strb r2, [r3, #28] } } /* Capture compare 3 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 80040d8: 687b ldr r3, [r7, #4] 80040da: 681b ldr r3, [r3, #0] 80040dc: 691b ldr r3, [r3, #16] 80040de: f003 0308 and.w r3, r3, #8 80040e2: 2b08 cmp r3, #8 80040e4: d122 bne.n 800412c { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) 80040e6: 687b ldr r3, [r7, #4] 80040e8: 681b ldr r3, [r3, #0] 80040ea: 68db ldr r3, [r3, #12] 80040ec: f003 0308 and.w r3, r3, #8 80040f0: 2b08 cmp r3, #8 80040f2: d11b bne.n 800412c { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 80040f4: 687b ldr r3, [r7, #4] 80040f6: 681b ldr r3, [r3, #0] 80040f8: f06f 0208 mvn.w r2, #8 80040fc: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 80040fe: 687b ldr r3, [r7, #4] 8004100: 2204 movs r2, #4 8004102: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8004104: 687b ldr r3, [r7, #4] 8004106: 681b ldr r3, [r3, #0] 8004108: 69db ldr r3, [r3, #28] 800410a: f003 0303 and.w r3, r3, #3 800410e: 2b00 cmp r3, #0 8004110: d003 beq.n 800411a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 8004112: 6878 ldr r0, [r7, #4] 8004114: f000 fa1b bl 800454e 8004118: e005 b.n 8004126 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 800411a: 6878 ldr r0, [r7, #4] 800411c: f000 fa0e bl 800453c HAL_TIM_PWM_PulseFinishedCallback(htim); 8004120: 6878 ldr r0, [r7, #4] 8004122: f000 fa1d bl 8004560 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004126: 687b ldr r3, [r7, #4] 8004128: 2200 movs r2, #0 800412a: 771a strb r2, [r3, #28] } } /* Capture compare 4 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 800412c: 687b ldr r3, [r7, #4] 800412e: 681b ldr r3, [r3, #0] 8004130: 691b ldr r3, [r3, #16] 8004132: f003 0310 and.w r3, r3, #16 8004136: 2b10 cmp r3, #16 8004138: d122 bne.n 8004180 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) 800413a: 687b ldr r3, [r7, #4] 800413c: 681b ldr r3, [r3, #0] 800413e: 68db ldr r3, [r3, #12] 8004140: f003 0310 and.w r3, r3, #16 8004144: 2b10 cmp r3, #16 8004146: d11b bne.n 8004180 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 8004148: 687b ldr r3, [r7, #4] 800414a: 681b ldr r3, [r3, #0] 800414c: f06f 0210 mvn.w r2, #16 8004150: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8004152: 687b ldr r3, [r7, #4] 8004154: 2208 movs r2, #8 8004156: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8004158: 687b ldr r3, [r7, #4] 800415a: 681b ldr r3, [r3, #0] 800415c: 69db ldr r3, [r3, #28] 800415e: f403 7340 and.w r3, r3, #768 ; 0x300 8004162: 2b00 cmp r3, #0 8004164: d003 beq.n 800416e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 8004166: 6878 ldr r0, [r7, #4] 8004168: f000 f9f1 bl 800454e 800416c: e005 b.n 800417a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 800416e: 6878 ldr r0, [r7, #4] 8004170: f000 f9e4 bl 800453c HAL_TIM_PWM_PulseFinishedCallback(htim); 8004174: 6878 ldr r0, [r7, #4] 8004176: f000 f9f3 bl 8004560 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800417a: 687b ldr r3, [r7, #4] 800417c: 2200 movs r2, #0 800417e: 771a strb r2, [r3, #28] } } /* TIM Update event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 8004180: 687b ldr r3, [r7, #4] 8004182: 681b ldr r3, [r3, #0] 8004184: 691b ldr r3, [r3, #16] 8004186: f003 0301 and.w r3, r3, #1 800418a: 2b01 cmp r3, #1 800418c: d10e bne.n 80041ac { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) 800418e: 687b ldr r3, [r7, #4] 8004190: 681b ldr r3, [r3, #0] 8004192: 68db ldr r3, [r3, #12] 8004194: f003 0301 and.w r3, r3, #1 8004198: 2b01 cmp r3, #1 800419a: d107 bne.n 80041ac { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 800419c: 687b ldr r3, [r7, #4] 800419e: 681b ldr r3, [r3, #0] 80041a0: f06f 0201 mvn.w r2, #1 80041a4: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); 80041a6: 6878 ldr r0, [r7, #4] 80041a8: f002 fc44 bl 8006a34 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 80041ac: 687b ldr r3, [r7, #4] 80041ae: 681b ldr r3, [r3, #0] 80041b0: 691b ldr r3, [r3, #16] 80041b2: f003 0380 and.w r3, r3, #128 ; 0x80 80041b6: 2b80 cmp r3, #128 ; 0x80 80041b8: d10e bne.n 80041d8 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) 80041ba: 687b ldr r3, [r7, #4] 80041bc: 681b ldr r3, [r3, #0] 80041be: 68db ldr r3, [r3, #12] 80041c0: f003 0380 and.w r3, r3, #128 ; 0x80 80041c4: 2b80 cmp r3, #128 ; 0x80 80041c6: d107 bne.n 80041d8 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 80041c8: 687b ldr r3, [r7, #4] 80041ca: 681b ldr r3, [r3, #0] 80041cc: f06f 0280 mvn.w r2, #128 ; 0x80 80041d0: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); 80041d2: 6878 ldr r0, [r7, #4] 80041d4: f000 fd2b bl 8004c2e #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 80041d8: 687b ldr r3, [r7, #4] 80041da: 681b ldr r3, [r3, #0] 80041dc: 691b ldr r3, [r3, #16] 80041de: f003 0340 and.w r3, r3, #64 ; 0x40 80041e2: 2b40 cmp r3, #64 ; 0x40 80041e4: d10e bne.n 8004204 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) 80041e6: 687b ldr r3, [r7, #4] 80041e8: 681b ldr r3, [r3, #0] 80041ea: 68db ldr r3, [r3, #12] 80041ec: f003 0340 and.w r3, r3, #64 ; 0x40 80041f0: 2b40 cmp r3, #64 ; 0x40 80041f2: d107 bne.n 8004204 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80041f4: 687b ldr r3, [r7, #4] 80041f6: 681b ldr r3, [r3, #0] 80041f8: f06f 0240 mvn.w r2, #64 ; 0x40 80041fc: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); 80041fe: 6878 ldr r0, [r7, #4] 8004200: f000 f9b7 bl 8004572 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 8004204: 687b ldr r3, [r7, #4] 8004206: 681b ldr r3, [r3, #0] 8004208: 691b ldr r3, [r3, #16] 800420a: f003 0320 and.w r3, r3, #32 800420e: 2b20 cmp r3, #32 8004210: d10e bne.n 8004230 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) 8004212: 687b ldr r3, [r7, #4] 8004214: 681b ldr r3, [r3, #0] 8004216: 68db ldr r3, [r3, #12] 8004218: f003 0320 and.w r3, r3, #32 800421c: 2b20 cmp r3, #32 800421e: d107 bne.n 8004230 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8004220: 687b ldr r3, [r7, #4] 8004222: 681b ldr r3, [r3, #0] 8004224: f06f 0220 mvn.w r2, #32 8004228: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); 800422a: 6878 ldr r0, [r7, #4] 800422c: f000 fcf6 bl 8004c1c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } 8004230: bf00 nop 8004232: 3708 adds r7, #8 8004234: 46bd mov sp, r7 8004236: bd80 pop {r7, pc} 08004238 : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { 8004238: b580 push {r7, lr} 800423a: b084 sub sp, #16 800423c: af00 add r7, sp, #0 800423e: 60f8 str r0, [r7, #12] 8004240: 60b9 str r1, [r7, #8] 8004242: 607a str r2, [r7, #4] assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); /* Process Locked */ __HAL_LOCK(htim); 8004244: 68fb ldr r3, [r7, #12] 8004246: f893 303c ldrb.w r3, [r3, #60] ; 0x3c 800424a: 2b01 cmp r3, #1 800424c: d101 bne.n 8004252 800424e: 2302 movs r3, #2 8004250: e0ac b.n 80043ac 8004252: 68fb ldr r3, [r7, #12] 8004254: 2201 movs r2, #1 8004256: f883 203c strb.w r2, [r3, #60] ; 0x3c switch (Channel) 800425a: 687b ldr r3, [r7, #4] 800425c: 2b0c cmp r3, #12 800425e: f200 809f bhi.w 80043a0 8004262: a201 add r2, pc, #4 ; (adr r2, 8004268 ) 8004264: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004268: 0800429d .word 0x0800429d 800426c: 080043a1 .word 0x080043a1 8004270: 080043a1 .word 0x080043a1 8004274: 080043a1 .word 0x080043a1 8004278: 080042dd .word 0x080042dd 800427c: 080043a1 .word 0x080043a1 8004280: 080043a1 .word 0x080043a1 8004284: 080043a1 .word 0x080043a1 8004288: 0800431f .word 0x0800431f 800428c: 080043a1 .word 0x080043a1 8004290: 080043a1 .word 0x080043a1 8004294: 080043a1 .word 0x080043a1 8004298: 0800435f .word 0x0800435f { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the Channel 1 in PWM mode */ TIM_OC1_SetConfig(htim->Instance, sConfig); 800429c: 68fb ldr r3, [r7, #12] 800429e: 681b ldr r3, [r3, #0] 80042a0: 68b9 ldr r1, [r7, #8] 80042a2: 4618 mov r0, r3 80042a4: f000 f9e8 bl 8004678 /* Set the Preload enable bit for channel1 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; 80042a8: 68fb ldr r3, [r7, #12] 80042aa: 681b ldr r3, [r3, #0] 80042ac: 699a ldr r2, [r3, #24] 80042ae: 68fb ldr r3, [r7, #12] 80042b0: 681b ldr r3, [r3, #0] 80042b2: f042 0208 orr.w r2, r2, #8 80042b6: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; 80042b8: 68fb ldr r3, [r7, #12] 80042ba: 681b ldr r3, [r3, #0] 80042bc: 699a ldr r2, [r3, #24] 80042be: 68fb ldr r3, [r7, #12] 80042c0: 681b ldr r3, [r3, #0] 80042c2: f022 0204 bic.w r2, r2, #4 80042c6: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode; 80042c8: 68fb ldr r3, [r7, #12] 80042ca: 681b ldr r3, [r3, #0] 80042cc: 6999 ldr r1, [r3, #24] 80042ce: 68bb ldr r3, [r7, #8] 80042d0: 691a ldr r2, [r3, #16] 80042d2: 68fb ldr r3, [r7, #12] 80042d4: 681b ldr r3, [r3, #0] 80042d6: 430a orrs r2, r1 80042d8: 619a str r2, [r3, #24] break; 80042da: e062 b.n 80043a2 { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the Channel 2 in PWM mode */ TIM_OC2_SetConfig(htim->Instance, sConfig); 80042dc: 68fb ldr r3, [r7, #12] 80042de: 681b ldr r3, [r3, #0] 80042e0: 68b9 ldr r1, [r7, #8] 80042e2: 4618 mov r0, r3 80042e4: f000 fa38 bl 8004758 /* Set the Preload enable bit for channel2 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; 80042e8: 68fb ldr r3, [r7, #12] 80042ea: 681b ldr r3, [r3, #0] 80042ec: 699a ldr r2, [r3, #24] 80042ee: 68fb ldr r3, [r7, #12] 80042f0: 681b ldr r3, [r3, #0] 80042f2: f442 6200 orr.w r2, r2, #2048 ; 0x800 80042f6: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; 80042f8: 68fb ldr r3, [r7, #12] 80042fa: 681b ldr r3, [r3, #0] 80042fc: 699a ldr r2, [r3, #24] 80042fe: 68fb ldr r3, [r7, #12] 8004300: 681b ldr r3, [r3, #0] 8004302: f422 6280 bic.w r2, r2, #1024 ; 0x400 8004306: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; 8004308: 68fb ldr r3, [r7, #12] 800430a: 681b ldr r3, [r3, #0] 800430c: 6999 ldr r1, [r3, #24] 800430e: 68bb ldr r3, [r7, #8] 8004310: 691b ldr r3, [r3, #16] 8004312: 021a lsls r2, r3, #8 8004314: 68fb ldr r3, [r7, #12] 8004316: 681b ldr r3, [r3, #0] 8004318: 430a orrs r2, r1 800431a: 619a str r2, [r3, #24] break; 800431c: e041 b.n 80043a2 { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the Channel 3 in PWM mode */ TIM_OC3_SetConfig(htim->Instance, sConfig); 800431e: 68fb ldr r3, [r7, #12] 8004320: 681b ldr r3, [r3, #0] 8004322: 68b9 ldr r1, [r7, #8] 8004324: 4618 mov r0, r3 8004326: f000 fa8b bl 8004840 /* Set the Preload enable bit for channel3 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; 800432a: 68fb ldr r3, [r7, #12] 800432c: 681b ldr r3, [r3, #0] 800432e: 69da ldr r2, [r3, #28] 8004330: 68fb ldr r3, [r7, #12] 8004332: 681b ldr r3, [r3, #0] 8004334: f042 0208 orr.w r2, r2, #8 8004338: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; 800433a: 68fb ldr r3, [r7, #12] 800433c: 681b ldr r3, [r3, #0] 800433e: 69da ldr r2, [r3, #28] 8004340: 68fb ldr r3, [r7, #12] 8004342: 681b ldr r3, [r3, #0] 8004344: f022 0204 bic.w r2, r2, #4 8004348: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode; 800434a: 68fb ldr r3, [r7, #12] 800434c: 681b ldr r3, [r3, #0] 800434e: 69d9 ldr r1, [r3, #28] 8004350: 68bb ldr r3, [r7, #8] 8004352: 691a ldr r2, [r3, #16] 8004354: 68fb ldr r3, [r7, #12] 8004356: 681b ldr r3, [r3, #0] 8004358: 430a orrs r2, r1 800435a: 61da str r2, [r3, #28] break; 800435c: e021 b.n 80043a2 { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the Channel 4 in PWM mode */ TIM_OC4_SetConfig(htim->Instance, sConfig); 800435e: 68fb ldr r3, [r7, #12] 8004360: 681b ldr r3, [r3, #0] 8004362: 68b9 ldr r1, [r7, #8] 8004364: 4618 mov r0, r3 8004366: f000 fadf bl 8004928 /* Set the Preload enable bit for channel4 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; 800436a: 68fb ldr r3, [r7, #12] 800436c: 681b ldr r3, [r3, #0] 800436e: 69da ldr r2, [r3, #28] 8004370: 68fb ldr r3, [r7, #12] 8004372: 681b ldr r3, [r3, #0] 8004374: f442 6200 orr.w r2, r2, #2048 ; 0x800 8004378: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; 800437a: 68fb ldr r3, [r7, #12] 800437c: 681b ldr r3, [r3, #0] 800437e: 69da ldr r2, [r3, #28] 8004380: 68fb ldr r3, [r7, #12] 8004382: 681b ldr r3, [r3, #0] 8004384: f422 6280 bic.w r2, r2, #1024 ; 0x400 8004388: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; 800438a: 68fb ldr r3, [r7, #12] 800438c: 681b ldr r3, [r3, #0] 800438e: 69d9 ldr r1, [r3, #28] 8004390: 68bb ldr r3, [r7, #8] 8004392: 691b ldr r3, [r3, #16] 8004394: 021a lsls r2, r3, #8 8004396: 68fb ldr r3, [r7, #12] 8004398: 681b ldr r3, [r3, #0] 800439a: 430a orrs r2, r1 800439c: 61da str r2, [r3, #28] break; 800439e: e000 b.n 80043a2 } default: break; 80043a0: bf00 nop } __HAL_UNLOCK(htim); 80043a2: 68fb ldr r3, [r7, #12] 80043a4: 2200 movs r2, #0 80043a6: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; 80043aa: 2300 movs r3, #0 } 80043ac: 4618 mov r0, r3 80043ae: 3710 adds r7, #16 80043b0: 46bd mov sp, r7 80043b2: bd80 pop {r7, pc} 080043b4 : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig) { 80043b4: b580 push {r7, lr} 80043b6: b084 sub sp, #16 80043b8: af00 add r7, sp, #0 80043ba: 6078 str r0, [r7, #4] 80043bc: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); 80043be: 687b ldr r3, [r7, #4] 80043c0: f893 303c ldrb.w r3, [r3, #60] ; 0x3c 80043c4: 2b01 cmp r3, #1 80043c6: d101 bne.n 80043cc 80043c8: 2302 movs r3, #2 80043ca: e0b3 b.n 8004534 80043cc: 687b ldr r3, [r7, #4] 80043ce: 2201 movs r2, #1 80043d0: f883 203c strb.w r2, [r3, #60] ; 0x3c htim->State = HAL_TIM_STATE_BUSY; 80043d4: 687b ldr r3, [r7, #4] 80043d6: 2202 movs r2, #2 80043d8: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; 80043dc: 687b ldr r3, [r7, #4] 80043de: 681b ldr r3, [r3, #0] 80043e0: 689b ldr r3, [r3, #8] 80043e2: 60fb str r3, [r7, #12] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); 80043e4: 68fb ldr r3, [r7, #12] 80043e6: f023 0377 bic.w r3, r3, #119 ; 0x77 80043ea: 60fb str r3, [r7, #12] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 80043ec: 68fb ldr r3, [r7, #12] 80043ee: f423 437f bic.w r3, r3, #65280 ; 0xff00 80043f2: 60fb str r3, [r7, #12] htim->Instance->SMCR = tmpsmcr; 80043f4: 687b ldr r3, [r7, #4] 80043f6: 681b ldr r3, [r3, #0] 80043f8: 68fa ldr r2, [r7, #12] 80043fa: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) 80043fc: 683b ldr r3, [r7, #0] 80043fe: 681b ldr r3, [r3, #0] 8004400: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 8004404: d03e beq.n 8004484 8004406: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 800440a: f200 8087 bhi.w 800451c 800440e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 8004412: f000 8085 beq.w 8004520 8004416: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 800441a: d87f bhi.n 800451c 800441c: 2b70 cmp r3, #112 ; 0x70 800441e: d01a beq.n 8004456 8004420: 2b70 cmp r3, #112 ; 0x70 8004422: d87b bhi.n 800451c 8004424: 2b60 cmp r3, #96 ; 0x60 8004426: d050 beq.n 80044ca 8004428: 2b60 cmp r3, #96 ; 0x60 800442a: d877 bhi.n 800451c 800442c: 2b50 cmp r3, #80 ; 0x50 800442e: d03c beq.n 80044aa 8004430: 2b50 cmp r3, #80 ; 0x50 8004432: d873 bhi.n 800451c 8004434: 2b40 cmp r3, #64 ; 0x40 8004436: d058 beq.n 80044ea 8004438: 2b40 cmp r3, #64 ; 0x40 800443a: d86f bhi.n 800451c 800443c: 2b30 cmp r3, #48 ; 0x30 800443e: d064 beq.n 800450a 8004440: 2b30 cmp r3, #48 ; 0x30 8004442: d86b bhi.n 800451c 8004444: 2b20 cmp r3, #32 8004446: d060 beq.n 800450a 8004448: 2b20 cmp r3, #32 800444a: d867 bhi.n 800451c 800444c: 2b00 cmp r3, #0 800444e: d05c beq.n 800450a 8004450: 2b10 cmp r3, #16 8004452: d05a beq.n 800450a TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); break; } default: break; 8004454: e062 b.n 800451c TIM_ETR_SetConfig(htim->Instance, 8004456: 687b ldr r3, [r7, #4] 8004458: 6818 ldr r0, [r3, #0] 800445a: 683b ldr r3, [r7, #0] 800445c: 6899 ldr r1, [r3, #8] 800445e: 683b ldr r3, [r7, #0] 8004460: 685a ldr r2, [r3, #4] 8004462: 683b ldr r3, [r7, #0] 8004464: 68db ldr r3, [r3, #12] 8004466: f000 fb2a bl 8004abe tmpsmcr = htim->Instance->SMCR; 800446a: 687b ldr r3, [r7, #4] 800446c: 681b ldr r3, [r3, #0] 800446e: 689b ldr r3, [r3, #8] 8004470: 60fb str r3, [r7, #12] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); 8004472: 68fb ldr r3, [r7, #12] 8004474: f043 0377 orr.w r3, r3, #119 ; 0x77 8004478: 60fb str r3, [r7, #12] htim->Instance->SMCR = tmpsmcr; 800447a: 687b ldr r3, [r7, #4] 800447c: 681b ldr r3, [r3, #0] 800447e: 68fa ldr r2, [r7, #12] 8004480: 609a str r2, [r3, #8] break; 8004482: e04e b.n 8004522 TIM_ETR_SetConfig(htim->Instance, 8004484: 687b ldr r3, [r7, #4] 8004486: 6818 ldr r0, [r3, #0] 8004488: 683b ldr r3, [r7, #0] 800448a: 6899 ldr r1, [r3, #8] 800448c: 683b ldr r3, [r7, #0] 800448e: 685a ldr r2, [r3, #4] 8004490: 683b ldr r3, [r7, #0] 8004492: 68db ldr r3, [r3, #12] 8004494: f000 fb13 bl 8004abe htim->Instance->SMCR |= TIM_SMCR_ECE; 8004498: 687b ldr r3, [r7, #4] 800449a: 681b ldr r3, [r3, #0] 800449c: 689a ldr r2, [r3, #8] 800449e: 687b ldr r3, [r7, #4] 80044a0: 681b ldr r3, [r3, #0] 80044a2: f442 4280 orr.w r2, r2, #16384 ; 0x4000 80044a6: 609a str r2, [r3, #8] break; 80044a8: e03b b.n 8004522 TIM_TI1_ConfigInputStage(htim->Instance, 80044aa: 687b ldr r3, [r7, #4] 80044ac: 6818 ldr r0, [r3, #0] 80044ae: 683b ldr r3, [r7, #0] 80044b0: 6859 ldr r1, [r3, #4] 80044b2: 683b ldr r3, [r7, #0] 80044b4: 68db ldr r3, [r3, #12] 80044b6: 461a mov r2, r3 80044b8: f000 fa8a bl 80049d0 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); 80044bc: 687b ldr r3, [r7, #4] 80044be: 681b ldr r3, [r3, #0] 80044c0: 2150 movs r1, #80 ; 0x50 80044c2: 4618 mov r0, r3 80044c4: f000 fae1 bl 8004a8a break; 80044c8: e02b b.n 8004522 TIM_TI2_ConfigInputStage(htim->Instance, 80044ca: 687b ldr r3, [r7, #4] 80044cc: 6818 ldr r0, [r3, #0] 80044ce: 683b ldr r3, [r7, #0] 80044d0: 6859 ldr r1, [r3, #4] 80044d2: 683b ldr r3, [r7, #0] 80044d4: 68db ldr r3, [r3, #12] 80044d6: 461a mov r2, r3 80044d8: f000 faa8 bl 8004a2c TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); 80044dc: 687b ldr r3, [r7, #4] 80044de: 681b ldr r3, [r3, #0] 80044e0: 2160 movs r1, #96 ; 0x60 80044e2: 4618 mov r0, r3 80044e4: f000 fad1 bl 8004a8a break; 80044e8: e01b b.n 8004522 TIM_TI1_ConfigInputStage(htim->Instance, 80044ea: 687b ldr r3, [r7, #4] 80044ec: 6818 ldr r0, [r3, #0] 80044ee: 683b ldr r3, [r7, #0] 80044f0: 6859 ldr r1, [r3, #4] 80044f2: 683b ldr r3, [r7, #0] 80044f4: 68db ldr r3, [r3, #12] 80044f6: 461a mov r2, r3 80044f8: f000 fa6a bl 80049d0 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); 80044fc: 687b ldr r3, [r7, #4] 80044fe: 681b ldr r3, [r3, #0] 8004500: 2140 movs r1, #64 ; 0x40 8004502: 4618 mov r0, r3 8004504: f000 fac1 bl 8004a8a break; 8004508: e00b b.n 8004522 TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); 800450a: 687b ldr r3, [r7, #4] 800450c: 681a ldr r2, [r3, #0] 800450e: 683b ldr r3, [r7, #0] 8004510: 681b ldr r3, [r3, #0] 8004512: 4619 mov r1, r3 8004514: 4610 mov r0, r2 8004516: f000 fab8 bl 8004a8a break; 800451a: e002 b.n 8004522 break; 800451c: bf00 nop 800451e: e000 b.n 8004522 break; 8004520: bf00 nop } htim->State = HAL_TIM_STATE_READY; 8004522: 687b ldr r3, [r7, #4] 8004524: 2201 movs r2, #1 8004526: f883 203d strb.w r2, [r3, #61] ; 0x3d __HAL_UNLOCK(htim); 800452a: 687b ldr r3, [r7, #4] 800452c: 2200 movs r2, #0 800452e: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; 8004532: 2300 movs r3, #0 } 8004534: 4618 mov r0, r3 8004536: 3710 adds r7, #16 8004538: 46bd mov sp, r7 800453a: bd80 pop {r7, pc} 0800453c : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { 800453c: b480 push {r7} 800453e: b083 sub sp, #12 8004540: af00 add r7, sp, #0 8004542: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } 8004544: bf00 nop 8004546: 370c adds r7, #12 8004548: 46bd mov sp, r7 800454a: bc80 pop {r7} 800454c: 4770 bx lr 0800454e : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { 800454e: b480 push {r7} 8004550: b083 sub sp, #12 8004552: af00 add r7, sp, #0 8004554: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } 8004556: bf00 nop 8004558: 370c adds r7, #12 800455a: 46bd mov sp, r7 800455c: bc80 pop {r7} 800455e: 4770 bx lr 08004560 : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { 8004560: b480 push {r7} 8004562: b083 sub sp, #12 8004564: af00 add r7, sp, #0 8004566: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } 8004568: bf00 nop 800456a: 370c adds r7, #12 800456c: 46bd mov sp, r7 800456e: bc80 pop {r7} 8004570: 4770 bx lr 08004572 : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { 8004572: b480 push {r7} 8004574: b083 sub sp, #12 8004576: af00 add r7, sp, #0 8004578: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } 800457a: bf00 nop 800457c: 370c adds r7, #12 800457e: 46bd mov sp, r7 8004580: bc80 pop {r7} 8004582: 4770 bx lr 08004584 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) { 8004584: b480 push {r7} 8004586: b085 sub sp, #20 8004588: af00 add r7, sp, #0 800458a: 6078 str r0, [r7, #4] 800458c: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 800458e: 687b ldr r3, [r7, #4] 8004590: 681b ldr r3, [r3, #0] 8004592: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8004594: 687b ldr r3, [r7, #4] 8004596: 4a33 ldr r2, [pc, #204] ; (8004664 ) 8004598: 4293 cmp r3, r2 800459a: d013 beq.n 80045c4 800459c: 687b ldr r3, [r7, #4] 800459e: 4a32 ldr r2, [pc, #200] ; (8004668 ) 80045a0: 4293 cmp r3, r2 80045a2: d00f beq.n 80045c4 80045a4: 687b ldr r3, [r7, #4] 80045a6: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 80045aa: d00b beq.n 80045c4 80045ac: 687b ldr r3, [r7, #4] 80045ae: 4a2f ldr r2, [pc, #188] ; (800466c ) 80045b0: 4293 cmp r3, r2 80045b2: d007 beq.n 80045c4 80045b4: 687b ldr r3, [r7, #4] 80045b6: 4a2e ldr r2, [pc, #184] ; (8004670 ) 80045b8: 4293 cmp r3, r2 80045ba: d003 beq.n 80045c4 80045bc: 687b ldr r3, [r7, #4] 80045be: 4a2d ldr r2, [pc, #180] ; (8004674 ) 80045c0: 4293 cmp r3, r2 80045c2: d108 bne.n 80045d6 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 80045c4: 68fb ldr r3, [r7, #12] 80045c6: f023 0370 bic.w r3, r3, #112 ; 0x70 80045ca: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 80045cc: 683b ldr r3, [r7, #0] 80045ce: 685b ldr r3, [r3, #4] 80045d0: 68fa ldr r2, [r7, #12] 80045d2: 4313 orrs r3, r2 80045d4: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 80045d6: 687b ldr r3, [r7, #4] 80045d8: 4a22 ldr r2, [pc, #136] ; (8004664 ) 80045da: 4293 cmp r3, r2 80045dc: d013 beq.n 8004606 80045de: 687b ldr r3, [r7, #4] 80045e0: 4a21 ldr r2, [pc, #132] ; (8004668 ) 80045e2: 4293 cmp r3, r2 80045e4: d00f beq.n 8004606 80045e6: 687b ldr r3, [r7, #4] 80045e8: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 80045ec: d00b beq.n 8004606 80045ee: 687b ldr r3, [r7, #4] 80045f0: 4a1e ldr r2, [pc, #120] ; (800466c ) 80045f2: 4293 cmp r3, r2 80045f4: d007 beq.n 8004606 80045f6: 687b ldr r3, [r7, #4] 80045f8: 4a1d ldr r2, [pc, #116] ; (8004670 ) 80045fa: 4293 cmp r3, r2 80045fc: d003 beq.n 8004606 80045fe: 687b ldr r3, [r7, #4] 8004600: 4a1c ldr r2, [pc, #112] ; (8004674 ) 8004602: 4293 cmp r3, r2 8004604: d108 bne.n 8004618 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 8004606: 68fb ldr r3, [r7, #12] 8004608: f423 7340 bic.w r3, r3, #768 ; 0x300 800460c: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 800460e: 683b ldr r3, [r7, #0] 8004610: 68db ldr r3, [r3, #12] 8004612: 68fa ldr r2, [r7, #12] 8004614: 4313 orrs r3, r2 8004616: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 8004618: 68fb ldr r3, [r7, #12] 800461a: f023 0280 bic.w r2, r3, #128 ; 0x80 800461e: 683b ldr r3, [r7, #0] 8004620: 695b ldr r3, [r3, #20] 8004622: 4313 orrs r3, r2 8004624: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; 8004626: 687b ldr r3, [r7, #4] 8004628: 68fa ldr r2, [r7, #12] 800462a: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 800462c: 683b ldr r3, [r7, #0] 800462e: 689a ldr r2, [r3, #8] 8004630: 687b ldr r3, [r7, #4] 8004632: 62da str r2, [r3, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 8004634: 683b ldr r3, [r7, #0] 8004636: 681a ldr r2, [r3, #0] 8004638: 687b ldr r3, [r7, #4] 800463a: 629a str r2, [r3, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 800463c: 687b ldr r3, [r7, #4] 800463e: 4a09 ldr r2, [pc, #36] ; (8004664 ) 8004640: 4293 cmp r3, r2 8004642: d003 beq.n 800464c 8004644: 687b ldr r3, [r7, #4] 8004646: 4a08 ldr r2, [pc, #32] ; (8004668 ) 8004648: 4293 cmp r3, r2 800464a: d103 bne.n 8004654 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 800464c: 683b ldr r3, [r7, #0] 800464e: 691a ldr r2, [r3, #16] 8004650: 687b ldr r3, [r7, #4] 8004652: 631a str r2, [r3, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 8004654: 687b ldr r3, [r7, #4] 8004656: 2201 movs r2, #1 8004658: 615a str r2, [r3, #20] } 800465a: bf00 nop 800465c: 3714 adds r7, #20 800465e: 46bd mov sp, r7 8004660: bc80 pop {r7} 8004662: 4770 bx lr 8004664: 40012c00 .word 0x40012c00 8004668: 40013400 .word 0x40013400 800466c: 40000400 .word 0x40000400 8004670: 40000800 .word 0x40000800 8004674: 40000c00 .word 0x40000c00 08004678 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) { 8004678: b480 push {r7} 800467a: b087 sub sp, #28 800467c: af00 add r7, sp, #0 800467e: 6078 str r0, [r7, #4] 8004680: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; 8004682: 687b ldr r3, [r7, #4] 8004684: 6a1b ldr r3, [r3, #32] 8004686: f023 0201 bic.w r2, r3, #1 800468a: 687b ldr r3, [r7, #4] 800468c: 621a str r2, [r3, #32] /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 800468e: 687b ldr r3, [r7, #4] 8004690: 6a1b ldr r3, [r3, #32] 8004692: 617b str r3, [r7, #20] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8004694: 687b ldr r3, [r7, #4] 8004696: 685b ldr r3, [r3, #4] 8004698: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 800469a: 687b ldr r3, [r7, #4] 800469c: 699b ldr r3, [r3, #24] 800469e: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; 80046a0: 68fb ldr r3, [r7, #12] 80046a2: f023 0370 bic.w r3, r3, #112 ; 0x70 80046a6: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC1S; 80046a8: 68fb ldr r3, [r7, #12] 80046aa: f023 0303 bic.w r3, r3, #3 80046ae: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 80046b0: 683b ldr r3, [r7, #0] 80046b2: 681b ldr r3, [r3, #0] 80046b4: 68fa ldr r2, [r7, #12] 80046b6: 4313 orrs r3, r2 80046b8: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; 80046ba: 697b ldr r3, [r7, #20] 80046bc: f023 0302 bic.w r3, r3, #2 80046c0: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; 80046c2: 683b ldr r3, [r7, #0] 80046c4: 689b ldr r3, [r3, #8] 80046c6: 697a ldr r2, [r7, #20] 80046c8: 4313 orrs r3, r2 80046ca: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) 80046cc: 687b ldr r3, [r7, #4] 80046ce: 4a20 ldr r2, [pc, #128] ; (8004750 ) 80046d0: 4293 cmp r3, r2 80046d2: d003 beq.n 80046dc 80046d4: 687b ldr r3, [r7, #4] 80046d6: 4a1f ldr r2, [pc, #124] ; (8004754 ) 80046d8: 4293 cmp r3, r2 80046da: d10c bne.n 80046f6 { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; 80046dc: 697b ldr r3, [r7, #20] 80046de: f023 0308 bic.w r3, r3, #8 80046e2: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; 80046e4: 683b ldr r3, [r7, #0] 80046e6: 68db ldr r3, [r3, #12] 80046e8: 697a ldr r2, [r7, #20] 80046ea: 4313 orrs r3, r2 80046ec: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC1NE; 80046ee: 697b ldr r3, [r7, #20] 80046f0: f023 0304 bic.w r3, r3, #4 80046f4: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 80046f6: 687b ldr r3, [r7, #4] 80046f8: 4a15 ldr r2, [pc, #84] ; (8004750 ) 80046fa: 4293 cmp r3, r2 80046fc: d003 beq.n 8004706 80046fe: 687b ldr r3, [r7, #4] 8004700: 4a14 ldr r2, [pc, #80] ; (8004754 ) 8004702: 4293 cmp r3, r2 8004704: d111 bne.n 800472a /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS1; 8004706: 693b ldr r3, [r7, #16] 8004708: f423 7380 bic.w r3, r3, #256 ; 0x100 800470c: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS1N; 800470e: 693b ldr r3, [r7, #16] 8004710: f423 7300 bic.w r3, r3, #512 ; 0x200 8004714: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; 8004716: 683b ldr r3, [r7, #0] 8004718: 695b ldr r3, [r3, #20] 800471a: 693a ldr r2, [r7, #16] 800471c: 4313 orrs r3, r2 800471e: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; 8004720: 683b ldr r3, [r7, #0] 8004722: 699b ldr r3, [r3, #24] 8004724: 693a ldr r2, [r7, #16] 8004726: 4313 orrs r3, r2 8004728: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 800472a: 687b ldr r3, [r7, #4] 800472c: 693a ldr r2, [r7, #16] 800472e: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 8004730: 687b ldr r3, [r7, #4] 8004732: 68fa ldr r2, [r7, #12] 8004734: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; 8004736: 683b ldr r3, [r7, #0] 8004738: 685a ldr r2, [r3, #4] 800473a: 687b ldr r3, [r7, #4] 800473c: 635a str r2, [r3, #52] ; 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 800473e: 687b ldr r3, [r7, #4] 8004740: 697a ldr r2, [r7, #20] 8004742: 621a str r2, [r3, #32] } 8004744: bf00 nop 8004746: 371c adds r7, #28 8004748: 46bd mov sp, r7 800474a: bc80 pop {r7} 800474c: 4770 bx lr 800474e: bf00 nop 8004750: 40012c00 .word 0x40012c00 8004754: 40013400 .word 0x40013400 08004758 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) { 8004758: b480 push {r7} 800475a: b087 sub sp, #28 800475c: af00 add r7, sp, #0 800475e: 6078 str r0, [r7, #4] 8004760: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 8004762: 687b ldr r3, [r7, #4] 8004764: 6a1b ldr r3, [r3, #32] 8004766: f023 0210 bic.w r2, r3, #16 800476a: 687b ldr r3, [r7, #4] 800476c: 621a str r2, [r3, #32] /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 800476e: 687b ldr r3, [r7, #4] 8004770: 6a1b ldr r3, [r3, #32] 8004772: 617b str r3, [r7, #20] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8004774: 687b ldr r3, [r7, #4] 8004776: 685b ldr r3, [r3, #4] 8004778: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 800477a: 687b ldr r3, [r7, #4] 800477c: 699b ldr r3, [r3, #24] 800477e: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR1_OC2M; 8004780: 68fb ldr r3, [r7, #12] 8004782: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 8004786: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC2S; 8004788: 68fb ldr r3, [r7, #12] 800478a: f423 7340 bic.w r3, r3, #768 ; 0x300 800478e: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8004790: 683b ldr r3, [r7, #0] 8004792: 681b ldr r3, [r3, #0] 8004794: 021b lsls r3, r3, #8 8004796: 68fa ldr r2, [r7, #12] 8004798: 4313 orrs r3, r2 800479a: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC2P; 800479c: 697b ldr r3, [r7, #20] 800479e: f023 0320 bic.w r3, r3, #32 80047a2: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 4U); 80047a4: 683b ldr r3, [r7, #0] 80047a6: 689b ldr r3, [r3, #8] 80047a8: 011b lsls r3, r3, #4 80047aa: 697a ldr r2, [r7, #20] 80047ac: 4313 orrs r3, r2 80047ae: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) 80047b0: 687b ldr r3, [r7, #4] 80047b2: 4a21 ldr r2, [pc, #132] ; (8004838 ) 80047b4: 4293 cmp r3, r2 80047b6: d003 beq.n 80047c0 80047b8: 687b ldr r3, [r7, #4] 80047ba: 4a20 ldr r2, [pc, #128] ; (800483c ) 80047bc: 4293 cmp r3, r2 80047be: d10d bne.n 80047dc { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; 80047c0: 697b ldr r3, [r7, #20] 80047c2: f023 0380 bic.w r3, r3, #128 ; 0x80 80047c6: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); 80047c8: 683b ldr r3, [r7, #0] 80047ca: 68db ldr r3, [r3, #12] 80047cc: 011b lsls r3, r3, #4 80047ce: 697a ldr r2, [r7, #20] 80047d0: 4313 orrs r3, r2 80047d2: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; 80047d4: 697b ldr r3, [r7, #20] 80047d6: f023 0340 bic.w r3, r3, #64 ; 0x40 80047da: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 80047dc: 687b ldr r3, [r7, #4] 80047de: 4a16 ldr r2, [pc, #88] ; (8004838 ) 80047e0: 4293 cmp r3, r2 80047e2: d003 beq.n 80047ec 80047e4: 687b ldr r3, [r7, #4] 80047e6: 4a15 ldr r2, [pc, #84] ; (800483c ) 80047e8: 4293 cmp r3, r2 80047ea: d113 bne.n 8004814 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS2; 80047ec: 693b ldr r3, [r7, #16] 80047ee: f423 6380 bic.w r3, r3, #1024 ; 0x400 80047f2: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS2N; 80047f4: 693b ldr r3, [r7, #16] 80047f6: f423 6300 bic.w r3, r3, #2048 ; 0x800 80047fa: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 2U); 80047fc: 683b ldr r3, [r7, #0] 80047fe: 695b ldr r3, [r3, #20] 8004800: 009b lsls r3, r3, #2 8004802: 693a ldr r2, [r7, #16] 8004804: 4313 orrs r3, r2 8004806: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 2U); 8004808: 683b ldr r3, [r7, #0] 800480a: 699b ldr r3, [r3, #24] 800480c: 009b lsls r3, r3, #2 800480e: 693a ldr r2, [r7, #16] 8004810: 4313 orrs r3, r2 8004812: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8004814: 687b ldr r3, [r7, #4] 8004816: 693a ldr r2, [r7, #16] 8004818: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 800481a: 687b ldr r3, [r7, #4] 800481c: 68fa ldr r2, [r7, #12] 800481e: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR2 = OC_Config->Pulse; 8004820: 683b ldr r3, [r7, #0] 8004822: 685a ldr r2, [r3, #4] 8004824: 687b ldr r3, [r7, #4] 8004826: 639a str r2, [r3, #56] ; 0x38 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8004828: 687b ldr r3, [r7, #4] 800482a: 697a ldr r2, [r7, #20] 800482c: 621a str r2, [r3, #32] } 800482e: bf00 nop 8004830: 371c adds r7, #28 8004832: 46bd mov sp, r7 8004834: bc80 pop {r7} 8004836: 4770 bx lr 8004838: 40012c00 .word 0x40012c00 800483c: 40013400 .word 0x40013400 08004840 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) { 8004840: b480 push {r7} 8004842: b087 sub sp, #28 8004844: af00 add r7, sp, #0 8004846: 6078 str r0, [r7, #4] 8004848: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; 800484a: 687b ldr r3, [r7, #4] 800484c: 6a1b ldr r3, [r3, #32] 800484e: f423 7280 bic.w r2, r3, #256 ; 0x100 8004852: 687b ldr r3, [r7, #4] 8004854: 621a str r2, [r3, #32] /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8004856: 687b ldr r3, [r7, #4] 8004858: 6a1b ldr r3, [r3, #32] 800485a: 617b str r3, [r7, #20] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 800485c: 687b ldr r3, [r7, #4] 800485e: 685b ldr r3, [r3, #4] 8004860: 613b str r3, [r7, #16] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 8004862: 687b ldr r3, [r7, #4] 8004864: 69db ldr r3, [r3, #28] 8004866: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; 8004868: 68fb ldr r3, [r7, #12] 800486a: f023 0370 bic.w r3, r3, #112 ; 0x70 800486e: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC3S; 8004870: 68fb ldr r3, [r7, #12] 8004872: f023 0303 bic.w r3, r3, #3 8004876: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 8004878: 683b ldr r3, [r7, #0] 800487a: 681b ldr r3, [r3, #0] 800487c: 68fa ldr r2, [r7, #12] 800487e: 4313 orrs r3, r2 8004880: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; 8004882: 697b ldr r3, [r7, #20] 8004884: f423 7300 bic.w r3, r3, #512 ; 0x200 8004888: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); 800488a: 683b ldr r3, [r7, #0] 800488c: 689b ldr r3, [r3, #8] 800488e: 021b lsls r3, r3, #8 8004890: 697a ldr r2, [r7, #20] 8004892: 4313 orrs r3, r2 8004894: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) 8004896: 687b ldr r3, [r7, #4] 8004898: 4a21 ldr r2, [pc, #132] ; (8004920 ) 800489a: 4293 cmp r3, r2 800489c: d003 beq.n 80048a6 800489e: 687b ldr r3, [r7, #4] 80048a0: 4a20 ldr r2, [pc, #128] ; (8004924 ) 80048a2: 4293 cmp r3, r2 80048a4: d10d bne.n 80048c2 { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; 80048a6: 697b ldr r3, [r7, #20] 80048a8: f423 6300 bic.w r3, r3, #2048 ; 0x800 80048ac: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); 80048ae: 683b ldr r3, [r7, #0] 80048b0: 68db ldr r3, [r3, #12] 80048b2: 021b lsls r3, r3, #8 80048b4: 697a ldr r2, [r7, #20] 80048b6: 4313 orrs r3, r2 80048b8: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; 80048ba: 697b ldr r3, [r7, #20] 80048bc: f423 6380 bic.w r3, r3, #1024 ; 0x400 80048c0: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 80048c2: 687b ldr r3, [r7, #4] 80048c4: 4a16 ldr r2, [pc, #88] ; (8004920 ) 80048c6: 4293 cmp r3, r2 80048c8: d003 beq.n 80048d2 80048ca: 687b ldr r3, [r7, #4] 80048cc: 4a15 ldr r2, [pc, #84] ; (8004924 ) 80048ce: 4293 cmp r3, r2 80048d0: d113 bne.n 80048fa /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; 80048d2: 693b ldr r3, [r7, #16] 80048d4: f423 5380 bic.w r3, r3, #4096 ; 0x1000 80048d8: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS3N; 80048da: 693b ldr r3, [r7, #16] 80048dc: f423 5300 bic.w r3, r3, #8192 ; 0x2000 80048e0: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); 80048e2: 683b ldr r3, [r7, #0] 80048e4: 695b ldr r3, [r3, #20] 80048e6: 011b lsls r3, r3, #4 80048e8: 693a ldr r2, [r7, #16] 80048ea: 4313 orrs r3, r2 80048ec: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); 80048ee: 683b ldr r3, [r7, #0] 80048f0: 699b ldr r3, [r3, #24] 80048f2: 011b lsls r3, r3, #4 80048f4: 693a ldr r2, [r7, #16] 80048f6: 4313 orrs r3, r2 80048f8: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80048fa: 687b ldr r3, [r7, #4] 80048fc: 693a ldr r2, [r7, #16] 80048fe: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8004900: 687b ldr r3, [r7, #4] 8004902: 68fa ldr r2, [r7, #12] 8004904: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; 8004906: 683b ldr r3, [r7, #0] 8004908: 685a ldr r2, [r3, #4] 800490a: 687b ldr r3, [r7, #4] 800490c: 63da str r2, [r3, #60] ; 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 800490e: 687b ldr r3, [r7, #4] 8004910: 697a ldr r2, [r7, #20] 8004912: 621a str r2, [r3, #32] } 8004914: bf00 nop 8004916: 371c adds r7, #28 8004918: 46bd mov sp, r7 800491a: bc80 pop {r7} 800491c: 4770 bx lr 800491e: bf00 nop 8004920: 40012c00 .word 0x40012c00 8004924: 40013400 .word 0x40013400 08004928 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) { 8004928: b480 push {r7} 800492a: b087 sub sp, #28 800492c: af00 add r7, sp, #0 800492e: 6078 str r0, [r7, #4] 8004930: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; 8004932: 687b ldr r3, [r7, #4] 8004934: 6a1b ldr r3, [r3, #32] 8004936: f423 5280 bic.w r2, r3, #4096 ; 0x1000 800493a: 687b ldr r3, [r7, #4] 800493c: 621a str r2, [r3, #32] /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 800493e: 687b ldr r3, [r7, #4] 8004940: 6a1b ldr r3, [r3, #32] 8004942: 613b str r3, [r7, #16] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8004944: 687b ldr r3, [r7, #4] 8004946: 685b ldr r3, [r3, #4] 8004948: 617b str r3, [r7, #20] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 800494a: 687b ldr r3, [r7, #4] 800494c: 69db ldr r3, [r3, #28] 800494e: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; 8004950: 68fb ldr r3, [r7, #12] 8004952: f423 43e0 bic.w r3, r3, #28672 ; 0x7000 8004956: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC4S; 8004958: 68fb ldr r3, [r7, #12] 800495a: f423 7340 bic.w r3, r3, #768 ; 0x300 800495e: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8004960: 683b ldr r3, [r7, #0] 8004962: 681b ldr r3, [r3, #0] 8004964: 021b lsls r3, r3, #8 8004966: 68fa ldr r2, [r7, #12] 8004968: 4313 orrs r3, r2 800496a: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; 800496c: 693b ldr r3, [r7, #16] 800496e: f423 5300 bic.w r3, r3, #8192 ; 0x2000 8004972: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); 8004974: 683b ldr r3, [r7, #0] 8004976: 689b ldr r3, [r3, #8] 8004978: 031b lsls r3, r3, #12 800497a: 693a ldr r2, [r7, #16] 800497c: 4313 orrs r3, r2 800497e: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) 8004980: 687b ldr r3, [r7, #4] 8004982: 4a11 ldr r2, [pc, #68] ; (80049c8 ) 8004984: 4293 cmp r3, r2 8004986: d003 beq.n 8004990 8004988: 687b ldr r3, [r7, #4] 800498a: 4a10 ldr r2, [pc, #64] ; (80049cc ) 800498c: 4293 cmp r3, r2 800498e: d109 bne.n 80049a4 { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; 8004990: 697b ldr r3, [r7, #20] 8004992: f423 4380 bic.w r3, r3, #16384 ; 0x4000 8004996: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); 8004998: 683b ldr r3, [r7, #0] 800499a: 695b ldr r3, [r3, #20] 800499c: 019b lsls r3, r3, #6 800499e: 697a ldr r2, [r7, #20] 80049a0: 4313 orrs r3, r2 80049a2: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80049a4: 687b ldr r3, [r7, #4] 80049a6: 697a ldr r2, [r7, #20] 80049a8: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 80049aa: 687b ldr r3, [r7, #4] 80049ac: 68fa ldr r2, [r7, #12] 80049ae: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; 80049b0: 683b ldr r3, [r7, #0] 80049b2: 685a ldr r2, [r3, #4] 80049b4: 687b ldr r3, [r7, #4] 80049b6: 641a str r2, [r3, #64] ; 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80049b8: 687b ldr r3, [r7, #4] 80049ba: 693a ldr r2, [r7, #16] 80049bc: 621a str r2, [r3, #32] } 80049be: bf00 nop 80049c0: 371c adds r7, #28 80049c2: 46bd mov sp, r7 80049c4: bc80 pop {r7} 80049c6: 4770 bx lr 80049c8: 40012c00 .word 0x40012c00 80049cc: 40013400 .word 0x40013400 080049d0 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 80049d0: b480 push {r7} 80049d2: b087 sub sp, #28 80049d4: af00 add r7, sp, #0 80049d6: 60f8 str r0, [r7, #12] 80049d8: 60b9 str r1, [r7, #8] 80049da: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; 80049dc: 68fb ldr r3, [r7, #12] 80049de: 6a1b ldr r3, [r3, #32] 80049e0: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; 80049e2: 68fb ldr r3, [r7, #12] 80049e4: 6a1b ldr r3, [r3, #32] 80049e6: f023 0201 bic.w r2, r3, #1 80049ea: 68fb ldr r3, [r7, #12] 80049ec: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 80049ee: 68fb ldr r3, [r7, #12] 80049f0: 699b ldr r3, [r3, #24] 80049f2: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; 80049f4: 693b ldr r3, [r7, #16] 80049f6: f023 03f0 bic.w r3, r3, #240 ; 0xf0 80049fa: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); 80049fc: 687b ldr r3, [r7, #4] 80049fe: 011b lsls r3, r3, #4 8004a00: 693a ldr r2, [r7, #16] 8004a02: 4313 orrs r3, r2 8004a04: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); 8004a06: 697b ldr r3, [r7, #20] 8004a08: f023 030a bic.w r3, r3, #10 8004a0c: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; 8004a0e: 697a ldr r2, [r7, #20] 8004a10: 68bb ldr r3, [r7, #8] 8004a12: 4313 orrs r3, r2 8004a14: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; 8004a16: 68fb ldr r3, [r7, #12] 8004a18: 693a ldr r2, [r7, #16] 8004a1a: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 8004a1c: 68fb ldr r3, [r7, #12] 8004a1e: 697a ldr r2, [r7, #20] 8004a20: 621a str r2, [r3, #32] } 8004a22: bf00 nop 8004a24: 371c adds r7, #28 8004a26: 46bd mov sp, r7 8004a28: bc80 pop {r7} 8004a2a: 4770 bx lr 08004a2c : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 8004a2c: b480 push {r7} 8004a2e: b087 sub sp, #28 8004a30: af00 add r7, sp, #0 8004a32: 60f8 str r0, [r7, #12] 8004a34: 60b9 str r1, [r7, #8] 8004a36: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 8004a38: 68fb ldr r3, [r7, #12] 8004a3a: 6a1b ldr r3, [r3, #32] 8004a3c: f023 0210 bic.w r2, r3, #16 8004a40: 68fb ldr r3, [r7, #12] 8004a42: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 8004a44: 68fb ldr r3, [r7, #12] 8004a46: 699b ldr r3, [r3, #24] 8004a48: 617b str r3, [r7, #20] tmpccer = TIMx->CCER; 8004a4a: 68fb ldr r3, [r7, #12] 8004a4c: 6a1b ldr r3, [r3, #32] 8004a4e: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; 8004a50: 697b ldr r3, [r7, #20] 8004a52: f423 4370 bic.w r3, r3, #61440 ; 0xf000 8004a56: 617b str r3, [r7, #20] tmpccmr1 |= (TIM_ICFilter << 12U); 8004a58: 687b ldr r3, [r7, #4] 8004a5a: 031b lsls r3, r3, #12 8004a5c: 697a ldr r2, [r7, #20] 8004a5e: 4313 orrs r3, r2 8004a60: 617b str r3, [r7, #20] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); 8004a62: 693b ldr r3, [r7, #16] 8004a64: f023 03a0 bic.w r3, r3, #160 ; 0xa0 8004a68: 613b str r3, [r7, #16] tmpccer |= (TIM_ICPolarity << 4U); 8004a6a: 68bb ldr r3, [r7, #8] 8004a6c: 011b lsls r3, r3, #4 8004a6e: 693a ldr r2, [r7, #16] 8004a70: 4313 orrs r3, r2 8004a72: 613b str r3, [r7, #16] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; 8004a74: 68fb ldr r3, [r7, #12] 8004a76: 697a ldr r2, [r7, #20] 8004a78: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 8004a7a: 68fb ldr r3, [r7, #12] 8004a7c: 693a ldr r2, [r7, #16] 8004a7e: 621a str r2, [r3, #32] } 8004a80: bf00 nop 8004a82: 371c adds r7, #28 8004a84: 46bd mov sp, r7 8004a86: bc80 pop {r7} 8004a88: 4770 bx lr 08004a8a : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { 8004a8a: b480 push {r7} 8004a8c: b085 sub sp, #20 8004a8e: af00 add r7, sp, #0 8004a90: 6078 str r0, [r7, #4] 8004a92: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; 8004a94: 687b ldr r3, [r7, #4] 8004a96: 689b ldr r3, [r3, #8] 8004a98: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; 8004a9a: 68fb ldr r3, [r7, #12] 8004a9c: f023 0370 bic.w r3, r3, #112 ; 0x70 8004aa0: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); 8004aa2: 683a ldr r2, [r7, #0] 8004aa4: 68fb ldr r3, [r7, #12] 8004aa6: 4313 orrs r3, r2 8004aa8: f043 0307 orr.w r3, r3, #7 8004aac: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 8004aae: 687b ldr r3, [r7, #4] 8004ab0: 68fa ldr r2, [r7, #12] 8004ab2: 609a str r2, [r3, #8] } 8004ab4: bf00 nop 8004ab6: 3714 adds r7, #20 8004ab8: 46bd mov sp, r7 8004aba: bc80 pop {r7} 8004abc: 4770 bx lr 08004abe : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { 8004abe: b480 push {r7} 8004ac0: b087 sub sp, #28 8004ac2: af00 add r7, sp, #0 8004ac4: 60f8 str r0, [r7, #12] 8004ac6: 60b9 str r1, [r7, #8] 8004ac8: 607a str r2, [r7, #4] 8004aca: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; 8004acc: 68fb ldr r3, [r7, #12] 8004ace: 689b ldr r3, [r3, #8] 8004ad0: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8004ad2: 697b ldr r3, [r7, #20] 8004ad4: f423 437f bic.w r3, r3, #65280 ; 0xff00 8004ad8: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); 8004ada: 683b ldr r3, [r7, #0] 8004adc: 021a lsls r2, r3, #8 8004ade: 687b ldr r3, [r7, #4] 8004ae0: 431a orrs r2, r3 8004ae2: 68bb ldr r3, [r7, #8] 8004ae4: 4313 orrs r3, r2 8004ae6: 697a ldr r2, [r7, #20] 8004ae8: 4313 orrs r3, r2 8004aea: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 8004aec: 68fb ldr r3, [r7, #12] 8004aee: 697a ldr r2, [r7, #20] 8004af0: 609a str r2, [r3, #8] } 8004af2: bf00 nop 8004af4: 371c adds r7, #28 8004af6: 46bd mov sp, r7 8004af8: bc80 pop {r7} 8004afa: 4770 bx lr 08004afc : * @param ChannelState specifies the TIM Channel CCxE bit new state. * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. * @retval None */ void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) { 8004afc: b480 push {r7} 8004afe: b087 sub sp, #28 8004b00: af00 add r7, sp, #0 8004b02: 60f8 str r0, [r7, #12] 8004b04: 60b9 str r1, [r7, #8] 8004b06: 607a str r2, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(TIMx)); assert_param(IS_TIM_CHANNELS(Channel)); tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ 8004b08: 68bb ldr r3, [r7, #8] 8004b0a: f003 031f and.w r3, r3, #31 8004b0e: 2201 movs r2, #1 8004b10: fa02 f303 lsl.w r3, r2, r3 8004b14: 617b str r3, [r7, #20] /* Reset the CCxE Bit */ TIMx->CCER &= ~tmp; 8004b16: 68fb ldr r3, [r7, #12] 8004b18: 6a1a ldr r2, [r3, #32] 8004b1a: 697b ldr r3, [r7, #20] 8004b1c: 43db mvns r3, r3 8004b1e: 401a ands r2, r3 8004b20: 68fb ldr r3, [r7, #12] 8004b22: 621a str r2, [r3, #32] /* Set or reset the CCxE Bit */ TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ 8004b24: 68fb ldr r3, [r7, #12] 8004b26: 6a1a ldr r2, [r3, #32] 8004b28: 68bb ldr r3, [r7, #8] 8004b2a: f003 031f and.w r3, r3, #31 8004b2e: 6879 ldr r1, [r7, #4] 8004b30: fa01 f303 lsl.w r3, r1, r3 8004b34: 431a orrs r2, r3 8004b36: 68fb ldr r3, [r7, #12] 8004b38: 621a str r2, [r3, #32] } 8004b3a: bf00 nop 8004b3c: 371c adds r7, #28 8004b3e: 46bd mov sp, r7 8004b40: bc80 pop {r7} 8004b42: 4770 bx lr 08004b44 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig) { 8004b44: b480 push {r7} 8004b46: b085 sub sp, #20 8004b48: af00 add r7, sp, #0 8004b4a: 6078 str r0, [r7, #4] 8004b4c: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 8004b4e: 687b ldr r3, [r7, #4] 8004b50: f893 303c ldrb.w r3, [r3, #60] ; 0x3c 8004b54: 2b01 cmp r3, #1 8004b56: d101 bne.n 8004b5c 8004b58: 2302 movs r3, #2 8004b5a: e050 b.n 8004bfe 8004b5c: 687b ldr r3, [r7, #4] 8004b5e: 2201 movs r2, #1 8004b60: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 8004b64: 687b ldr r3, [r7, #4] 8004b66: 2202 movs r2, #2 8004b68: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 8004b6c: 687b ldr r3, [r7, #4] 8004b6e: 681b ldr r3, [r3, #0] 8004b70: 685b ldr r3, [r3, #4] 8004b72: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 8004b74: 687b ldr r3, [r7, #4] 8004b76: 681b ldr r3, [r3, #0] 8004b78: 689b ldr r3, [r3, #8] 8004b7a: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 8004b7c: 68fb ldr r3, [r7, #12] 8004b7e: f023 0370 bic.w r3, r3, #112 ; 0x70 8004b82: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 8004b84: 683b ldr r3, [r7, #0] 8004b86: 681b ldr r3, [r3, #0] 8004b88: 68fa ldr r2, [r7, #12] 8004b8a: 4313 orrs r3, r2 8004b8c: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 8004b8e: 687b ldr r3, [r7, #4] 8004b90: 681b ldr r3, [r3, #0] 8004b92: 68fa ldr r2, [r7, #12] 8004b94: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8004b96: 687b ldr r3, [r7, #4] 8004b98: 681b ldr r3, [r3, #0] 8004b9a: 4a1b ldr r2, [pc, #108] ; (8004c08 ) 8004b9c: 4293 cmp r3, r2 8004b9e: d018 beq.n 8004bd2 8004ba0: 687b ldr r3, [r7, #4] 8004ba2: 681b ldr r3, [r3, #0] 8004ba4: 4a19 ldr r2, [pc, #100] ; (8004c0c ) 8004ba6: 4293 cmp r3, r2 8004ba8: d013 beq.n 8004bd2 8004baa: 687b ldr r3, [r7, #4] 8004bac: 681b ldr r3, [r3, #0] 8004bae: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 8004bb2: d00e beq.n 8004bd2 8004bb4: 687b ldr r3, [r7, #4] 8004bb6: 681b ldr r3, [r3, #0] 8004bb8: 4a15 ldr r2, [pc, #84] ; (8004c10 ) 8004bba: 4293 cmp r3, r2 8004bbc: d009 beq.n 8004bd2 8004bbe: 687b ldr r3, [r7, #4] 8004bc0: 681b ldr r3, [r3, #0] 8004bc2: 4a14 ldr r2, [pc, #80] ; (8004c14 ) 8004bc4: 4293 cmp r3, r2 8004bc6: d004 beq.n 8004bd2 8004bc8: 687b ldr r3, [r7, #4] 8004bca: 681b ldr r3, [r3, #0] 8004bcc: 4a12 ldr r2, [pc, #72] ; (8004c18 ) 8004bce: 4293 cmp r3, r2 8004bd0: d10c bne.n 8004bec { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 8004bd2: 68bb ldr r3, [r7, #8] 8004bd4: f023 0380 bic.w r3, r3, #128 ; 0x80 8004bd8: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 8004bda: 683b ldr r3, [r7, #0] 8004bdc: 685b ldr r3, [r3, #4] 8004bde: 68ba ldr r2, [r7, #8] 8004be0: 4313 orrs r3, r2 8004be2: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 8004be4: 687b ldr r3, [r7, #4] 8004be6: 681b ldr r3, [r3, #0] 8004be8: 68ba ldr r2, [r7, #8] 8004bea: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 8004bec: 687b ldr r3, [r7, #4] 8004bee: 2201 movs r2, #1 8004bf0: f883 203d strb.w r2, [r3, #61] ; 0x3d __HAL_UNLOCK(htim); 8004bf4: 687b ldr r3, [r7, #4] 8004bf6: 2200 movs r2, #0 8004bf8: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; 8004bfc: 2300 movs r3, #0 } 8004bfe: 4618 mov r0, r3 8004c00: 3714 adds r7, #20 8004c02: 46bd mov sp, r7 8004c04: bc80 pop {r7} 8004c06: 4770 bx lr 8004c08: 40012c00 .word 0x40012c00 8004c0c: 40013400 .word 0x40013400 8004c10: 40000400 .word 0x40000400 8004c14: 40000800 .word 0x40000800 8004c18: 40000c00 .word 0x40000c00 08004c1c : * @brief Hall commutation changed callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { 8004c1c: b480 push {r7} 8004c1e: b083 sub sp, #12 8004c20: af00 add r7, sp, #0 8004c22: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_CommutCallback could be implemented in the user file */ } 8004c24: bf00 nop 8004c26: 370c adds r7, #12 8004c28: 46bd mov sp, r7 8004c2a: bc80 pop {r7} 8004c2c: 4770 bx lr 08004c2e : * @brief Hall Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 8004c2e: b480 push {r7} 8004c30: b083 sub sp, #12 8004c32: af00 add r7, sp, #0 8004c34: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_BreakCallback could be implemented in the user file */ } 8004c36: bf00 nop 8004c38: 370c adds r7, #12 8004c3a: 46bd mov sp, r7 8004c3c: bc80 pop {r7} 8004c3e: 4770 bx lr 08004c40 : * @param Init Pointer to NORSRAM Initialization structure * @retval HAL status */ HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_InitTypeDef *Init) { 8004c40: b480 push {r7} 8004c42: b087 sub sp, #28 8004c44: af00 add r7, sp, #0 8004c46: 6078 str r0, [r7, #4] 8004c48: 6039 str r1, [r7, #0] assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait)); assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst)); assert_param(IS_FSMC_PAGESIZE(Init->PageSize)); /* Disable NORSRAM Device */ __FSMC_NORSRAM_DISABLE(Device, Init->NSBank); 8004c4a: 683b ldr r3, [r7, #0] 8004c4c: 681a ldr r2, [r3, #0] 8004c4e: 687b ldr r3, [r7, #4] 8004c50: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8004c54: 683a ldr r2, [r7, #0] 8004c56: 6812 ldr r2, [r2, #0] 8004c58: f023 0101 bic.w r1, r3, #1 8004c5c: 687b ldr r3, [r7, #4] 8004c5e: f843 1022 str.w r1, [r3, r2, lsl #2] /* Set NORSRAM device control parameters */ if (Init->MemoryType == FSMC_MEMORY_TYPE_NOR) 8004c62: 683b ldr r3, [r7, #0] 8004c64: 689b ldr r3, [r3, #8] 8004c66: 2b08 cmp r3, #8 8004c68: d102 bne.n 8004c70 { flashaccess = FSMC_NORSRAM_FLASH_ACCESS_ENABLE; 8004c6a: 2340 movs r3, #64 ; 0x40 8004c6c: 617b str r3, [r7, #20] 8004c6e: e001 b.n 8004c74 } else { flashaccess = FSMC_NORSRAM_FLASH_ACCESS_DISABLE; 8004c70: 2300 movs r3, #0 8004c72: 617b str r3, [r7, #20] } btcr_reg = (flashaccess | \ Init->DataAddressMux | \ 8004c74: 683b ldr r3, [r7, #0] 8004c76: 685a ldr r2, [r3, #4] btcr_reg = (flashaccess | \ 8004c78: 697b ldr r3, [r7, #20] 8004c7a: 431a orrs r2, r3 Init->MemoryType | \ 8004c7c: 683b ldr r3, [r7, #0] 8004c7e: 689b ldr r3, [r3, #8] Init->DataAddressMux | \ 8004c80: 431a orrs r2, r3 Init->MemoryDataWidth | \ 8004c82: 683b ldr r3, [r7, #0] 8004c84: 68db ldr r3, [r3, #12] Init->MemoryType | \ 8004c86: 431a orrs r2, r3 Init->BurstAccessMode | \ 8004c88: 683b ldr r3, [r7, #0] 8004c8a: 691b ldr r3, [r3, #16] Init->MemoryDataWidth | \ 8004c8c: 431a orrs r2, r3 Init->WaitSignalPolarity | \ 8004c8e: 683b ldr r3, [r7, #0] 8004c90: 695b ldr r3, [r3, #20] Init->BurstAccessMode | \ 8004c92: 431a orrs r2, r3 Init->WaitSignalActive | \ 8004c94: 683b ldr r3, [r7, #0] 8004c96: 69db ldr r3, [r3, #28] Init->WaitSignalPolarity | \ 8004c98: 431a orrs r2, r3 Init->WriteOperation | \ 8004c9a: 683b ldr r3, [r7, #0] 8004c9c: 6a1b ldr r3, [r3, #32] Init->WaitSignalActive | \ 8004c9e: 431a orrs r2, r3 Init->WaitSignal | \ 8004ca0: 683b ldr r3, [r7, #0] 8004ca2: 6a5b ldr r3, [r3, #36] ; 0x24 Init->WriteOperation | \ 8004ca4: 431a orrs r2, r3 Init->ExtendedMode | \ 8004ca6: 683b ldr r3, [r7, #0] 8004ca8: 6a9b ldr r3, [r3, #40] ; 0x28 Init->WaitSignal | \ 8004caa: 431a orrs r2, r3 Init->AsynchronousWait | \ 8004cac: 683b ldr r3, [r7, #0] 8004cae: 6adb ldr r3, [r3, #44] ; 0x2c Init->ExtendedMode | \ 8004cb0: 431a orrs r2, r3 Init->WriteBurst); 8004cb2: 683b ldr r3, [r7, #0] 8004cb4: 6b1b ldr r3, [r3, #48] ; 0x30 btcr_reg = (flashaccess | \ 8004cb6: 4313 orrs r3, r2 8004cb8: 613b str r3, [r7, #16] btcr_reg |= Init->WrapMode; 8004cba: 683b ldr r3, [r7, #0] 8004cbc: 699b ldr r3, [r3, #24] 8004cbe: 693a ldr r2, [r7, #16] 8004cc0: 4313 orrs r3, r2 8004cc2: 613b str r3, [r7, #16] btcr_reg |= Init->PageSize; 8004cc4: 683b ldr r3, [r7, #0] 8004cc6: 6b5b ldr r3, [r3, #52] ; 0x34 8004cc8: 693a ldr r2, [r7, #16] 8004cca: 4313 orrs r3, r2 8004ccc: 613b str r3, [r7, #16] mask = (FSMC_BCRx_MBKEN | 8004cce: 4b10 ldr r3, [pc, #64] ; (8004d10 ) 8004cd0: 60fb str r3, [r7, #12] FSMC_BCRx_WAITEN | FSMC_BCRx_EXTMOD | FSMC_BCRx_ASYNCWAIT | FSMC_BCRx_CBURSTRW); mask |= FSMC_BCRx_WRAPMOD; 8004cd2: 68fb ldr r3, [r7, #12] 8004cd4: f443 6380 orr.w r3, r3, #1024 ; 0x400 8004cd8: 60fb str r3, [r7, #12] mask |= 0x00070000U; /* CPSIZE to be defined in CMSIS file */ 8004cda: 68fb ldr r3, [r7, #12] 8004cdc: f443 23e0 orr.w r3, r3, #458752 ; 0x70000 8004ce0: 60fb str r3, [r7, #12] MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); 8004ce2: 683b ldr r3, [r7, #0] 8004ce4: 681a ldr r2, [r3, #0] 8004ce6: 687b ldr r3, [r7, #4] 8004ce8: f853 2022 ldr.w r2, [r3, r2, lsl #2] 8004cec: 68fb ldr r3, [r7, #12] 8004cee: 43db mvns r3, r3 8004cf0: ea02 0103 and.w r1, r2, r3 8004cf4: 683b ldr r3, [r7, #0] 8004cf6: 681a ldr r2, [r3, #0] 8004cf8: 693b ldr r3, [r7, #16] 8004cfa: 4319 orrs r1, r3 8004cfc: 687b ldr r3, [r7, #4] 8004cfe: f843 1022 str.w r1, [r3, r2, lsl #2] return HAL_OK; 8004d02: 2300 movs r3, #0 } 8004d04: 4618 mov r0, r3 8004d06: 371c adds r7, #28 8004d08: 46bd mov sp, r7 8004d0a: bc80 pop {r7} 8004d0c: 4770 bx lr 8004d0e: bf00 nop 8004d10: 0008fb7f .word 0x0008fb7f 08004d14 : * @param Bank NORSRAM bank number * @retval HAL status */ HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank) { 8004d14: b480 push {r7} 8004d16: b085 sub sp, #20 8004d18: af00 add r7, sp, #0 8004d1a: 60f8 str r0, [r7, #12] 8004d1c: 60b9 str r1, [r7, #8] 8004d1e: 607a str r2, [r7, #4] assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency)); assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode)); assert_param(IS_FSMC_NORSRAM_BANK(Bank)); /* Set FSMC_NORSRAM device timing parameters */ MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime | 8004d20: 687b ldr r3, [r7, #4] 8004d22: 1c5a adds r2, r3, #1 8004d24: 68fb ldr r3, [r7, #12] 8004d26: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8004d2a: f003 4140 and.w r1, r3, #3221225472 ; 0xc0000000 8004d2e: 68bb ldr r3, [r7, #8] 8004d30: 681a ldr r2, [r3, #0] 8004d32: 68bb ldr r3, [r7, #8] 8004d34: 685b ldr r3, [r3, #4] 8004d36: 011b lsls r3, r3, #4 8004d38: 431a orrs r2, r3 8004d3a: 68bb ldr r3, [r7, #8] 8004d3c: 689b ldr r3, [r3, #8] 8004d3e: 021b lsls r3, r3, #8 8004d40: 431a orrs r2, r3 8004d42: 68bb ldr r3, [r7, #8] 8004d44: 68db ldr r3, [r3, #12] 8004d46: 041b lsls r3, r3, #16 8004d48: 431a orrs r2, r3 8004d4a: 68bb ldr r3, [r7, #8] 8004d4c: 691b ldr r3, [r3, #16] 8004d4e: 3b01 subs r3, #1 8004d50: 051b lsls r3, r3, #20 8004d52: 431a orrs r2, r3 8004d54: 68bb ldr r3, [r7, #8] 8004d56: 695b ldr r3, [r3, #20] 8004d58: 3b02 subs r3, #2 8004d5a: 061b lsls r3, r3, #24 8004d5c: 431a orrs r2, r3 8004d5e: 68bb ldr r3, [r7, #8] 8004d60: 699b ldr r3, [r3, #24] 8004d62: 4313 orrs r3, r2 8004d64: 687a ldr r2, [r7, #4] 8004d66: 3201 adds r2, #1 8004d68: 4319 orrs r1, r3 8004d6a: 68fb ldr r3, [r7, #12] 8004d6c: f843 1022 str.w r1, [r3, r2, lsl #2] ((Timing->BusTurnAroundDuration) << FSMC_BTRx_BUSTURN_Pos) | (((Timing->CLKDivision) - 1U) << FSMC_BTRx_CLKDIV_Pos) | (((Timing->DataLatency) - 2U) << FSMC_BTRx_DATLAT_Pos) | (Timing->AccessMode))); return HAL_OK; 8004d70: 2300 movs r3, #0 } 8004d72: 4618 mov r0, r3 8004d74: 3714 adds r7, #20 8004d76: 46bd mov sp, r7 8004d78: bc80 pop {r7} 8004d7a: 4770 bx lr 08004d7c : * @retval HAL status */ HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode) { 8004d7c: b480 push {r7} 8004d7e: b085 sub sp, #20 8004d80: af00 add r7, sp, #0 8004d82: 60f8 str r0, [r7, #12] 8004d84: 60b9 str r1, [r7, #8] 8004d86: 607a str r2, [r7, #4] 8004d88: 603b str r3, [r7, #0] /* Check the parameters */ assert_param(IS_FSMC_EXTENDED_MODE(ExtendedMode)); /* Set NORSRAM device timing register for write configuration, if extended mode is used */ if (ExtendedMode == FSMC_EXTENDED_MODE_ENABLE) 8004d8a: 683b ldr r3, [r7, #0] 8004d8c: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 8004d90: d11d bne.n 8004dce assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode)); assert_param(IS_FSMC_NORSRAM_BANK(Bank)); /* Set NORSRAM device timing register for write configuration, if extended mode is used */ #if defined(FSMC_BWTRx_BUSTURN) MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime | 8004d92: 68fb ldr r3, [r7, #12] 8004d94: 687a ldr r2, [r7, #4] 8004d96: f853 2022 ldr.w r2, [r3, r2, lsl #2] 8004d9a: 4b13 ldr r3, [pc, #76] ; (8004de8 ) 8004d9c: 4013 ands r3, r2 8004d9e: 68ba ldr r2, [r7, #8] 8004da0: 6811 ldr r1, [r2, #0] 8004da2: 68ba ldr r2, [r7, #8] 8004da4: 6852 ldr r2, [r2, #4] 8004da6: 0112 lsls r2, r2, #4 8004da8: 4311 orrs r1, r2 8004daa: 68ba ldr r2, [r7, #8] 8004dac: 6892 ldr r2, [r2, #8] 8004dae: 0212 lsls r2, r2, #8 8004db0: 4311 orrs r1, r2 8004db2: 68ba ldr r2, [r7, #8] 8004db4: 6992 ldr r2, [r2, #24] 8004db6: 4311 orrs r1, r2 8004db8: 68ba ldr r2, [r7, #8] 8004dba: 68d2 ldr r2, [r2, #12] 8004dbc: 0412 lsls r2, r2, #16 8004dbe: 430a orrs r2, r1 8004dc0: ea43 0102 orr.w r1, r3, r2 8004dc4: 68fb ldr r3, [r7, #12] 8004dc6: 687a ldr r2, [r7, #4] 8004dc8: f843 1022 str.w r1, [r3, r2, lsl #2] 8004dcc: e005 b.n 8004dda (((Timing->DataLatency) - 2U) << FSMC_BWTRx_DATLAT_Pos))); #endif /* FSMC_BWTRx_BUSTURN */ } else { Device->BWTR[Bank] = 0x0FFFFFFFU; 8004dce: 68fb ldr r3, [r7, #12] 8004dd0: 687a ldr r2, [r7, #4] 8004dd2: f06f 4170 mvn.w r1, #4026531840 ; 0xf0000000 8004dd6: f843 1022 str.w r1, [r3, r2, lsl #2] } return HAL_OK; 8004dda: 2300 movs r3, #0 } 8004ddc: 4618 mov r0, r3 8004dde: 3714 adds r7, #20 8004de0: 46bd mov sp, r7 8004de2: bc80 pop {r7} 8004de4: 4770 bx lr 8004de6: bf00 nop 8004de8: cff00000 .word 0xcff00000 08004dec : _lcd_dev lcddev; //¹ÜÀíLCDÖØÒª²ÎÊý //**************************************************¼¸ÖÖ¿ìËÙ½Ó¿Ú //д¼Ä´æÆ÷º¯Êý //regval:¼Ä´æÆ÷Öµ void LCD_WR_REG(uint16_t regval) { 8004dec: b480 push {r7} 8004dee: b083 sub sp, #12 8004df0: af00 add r7, sp, #0 8004df2: 4603 mov r3, r0 8004df4: 80fb strh r3, [r7, #6] LCD_REG_ADDRESS=regval;//дÈëҪдµÄ¼Ä´æÆ÷ÐòºÅ 8004df6: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000 8004dfa: 88fb ldrh r3, [r7, #6] 8004dfc: 8013 strh r3, [r2, #0] } 8004dfe: bf00 nop 8004e00: 370c adds r7, #12 8004e02: 46bd mov sp, r7 8004e04: bc80 pop {r7} 8004e06: 4770 bx lr 08004e08 : //дLCDÊý¾Ý //data:ҪдÈëµÄÖµ void LCD_WR_DATA(uint16_t data) { 8004e08: b480 push {r7} 8004e0a: b083 sub sp, #12 8004e0c: af00 add r7, sp, #0 8004e0e: 4603 mov r3, r0 8004e10: 80fb strh r3, [r7, #6] LCD_DATA_ADDRESS=data; 8004e12: 4a04 ldr r2, [pc, #16] ; (8004e24 ) 8004e14: 88fb ldrh r3, [r7, #6] 8004e16: 8013 strh r3, [r2, #0] } 8004e18: bf00 nop 8004e1a: 370c adds r7, #12 8004e1c: 46bd mov sp, r7 8004e1e: bc80 pop {r7} 8004e20: 4770 bx lr 8004e22: bf00 nop 8004e24: 6c000800 .word 0x6c000800 08004e28 : } //д¼Ä´æÆ÷ //LCD_Reg:¼Ä´æÆ÷µØÖ· //LCD_RegValue:ҪдÈëµÄÊý¾Ý void LCD_WriteReg(uint16_t LCD_Reg, uint16_t LCD_RegValue) { 8004e28: b480 push {r7} 8004e2a: b083 sub sp, #12 8004e2c: af00 add r7, sp, #0 8004e2e: 4603 mov r3, r0 8004e30: 460a mov r2, r1 8004e32: 80fb strh r3, [r7, #6] 8004e34: 4613 mov r3, r2 8004e36: 80bb strh r3, [r7, #4] LCD_REG_ADDRESS = LCD_Reg; //дÈëҪдµÄ¼Ä´æÆ÷ÐòºÅ 8004e38: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000 8004e3c: 88fb ldrh r3, [r7, #6] 8004e3e: 8013 strh r3, [r2, #0] LCD_DATA_ADDRESS = LCD_RegValue;//дÈëÊý¾Ý 8004e40: 4a03 ldr r2, [pc, #12] ; (8004e50 ) 8004e42: 88bb ldrh r3, [r7, #4] 8004e44: 8013 strh r3, [r2, #0] } 8004e46: bf00 nop 8004e48: 370c adds r7, #12 8004e4a: 46bd mov sp, r7 8004e4c: bc80 pop {r7} 8004e4e: 4770 bx lr 8004e50: 6c000800 .word 0x6c000800 08004e54 : //¶Á¼Ä´æÆ÷ //LCD_Reg:¼Ä´æÆ÷µØÖ· //·µ»ØÖµ:¶Áµ½µÄÊý¾Ý uint16_t LCD_ReadReg(uint16_t LCD_Reg) { 8004e54: b480 push {r7} 8004e56: b083 sub sp, #12 8004e58: af00 add r7, sp, #0 8004e5a: 4603 mov r3, r0 8004e5c: 80fb strh r3, [r7, #6] LCD_REG_ADDRESS=LCD_Reg; //дÈëÒª¶ÁµÄ¼Ä´æÆ÷ÐòºÅ 8004e5e: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000 8004e62: 88fb ldrh r3, [r7, #6] 8004e64: 8013 strh r3, [r2, #0] //delay_us(5); return LCD_DATA_ADDRESS; //·µ»Ø¶Áµ½µÄÖµ 8004e66: 4b04 ldr r3, [pc, #16] ; (8004e78 ) 8004e68: 881b ldrh r3, [r3, #0] 8004e6a: b29b uxth r3, r3 } 8004e6c: 4618 mov r0, r3 8004e6e: 370c adds r7, #12 8004e70: 46bd mov sp, r7 8004e72: bc80 pop {r7} 8004e74: 4770 bx lr 8004e76: bf00 nop 8004e78: 6c000800 .word 0x6c000800 08004e7c : //×¢Òâ:ÆäËûº¯Êý¿ÉÄÜ»áÊܵ½´Ëº¯ÊýÉèÖõÄÓ°Ïì(ÓÈÆäÊÇ9341/6804ÕâÁ½¸öÆæÝâ), //ËùÒÔ,Ò»°ãÉèÖÃΪL2R_U2D¼´¿É,Èç¹ûÉèÖÃΪÆäËûɨÃ跽ʽ,¿ÉÄܵ¼ÖÂÏÔʾ²»Õý³£. //dir:0~7,´ú±í8¸ö·½Ïò(¾ßÌ嶨Òå¼ûlcd.h) //9320/9325/9328/4531/4535/1505/b505/8989/5408/9341/5310µÈICÒѾ­Êµ¼Ê²âÊÔ void LCD_Scan_Dir(uint8_t dir) { 8004e7c: b580 push {r7, lr} 8004e7e: b084 sub sp, #16 8004e80: af00 add r7, sp, #0 8004e82: 4603 mov r3, r0 8004e84: 71fb strb r3, [r7, #7] uint16_t regval=0; 8004e86: 2300 movs r3, #0 8004e88: 81fb strh r3, [r7, #14] uint8_t dirreg=0; 8004e8a: 2300 movs r3, #0 8004e8c: 737b strb r3, [r7, #13] uint16_t temp; if(lcddev.dir==1&&lcddev.id!=0X6804)//ºáÆÁʱ£¬¶Ô6804²»¸Ä±äɨÃè·½Ïò£¡ 8004e8e: 4ba8 ldr r3, [pc, #672] ; (8005130 ) 8004e90: 799b ldrb r3, [r3, #6] 8004e92: 2b01 cmp r3, #1 8004e94: d134 bne.n 8004f00 8004e96: 4ba6 ldr r3, [pc, #664] ; (8005130 ) 8004e98: 889b ldrh r3, [r3, #4] 8004e9a: f646 0204 movw r2, #26628 ; 0x6804 8004e9e: 4293 cmp r3, r2 8004ea0: d02e beq.n 8004f00 { switch(dir)//·½Ïòת»» 8004ea2: 79fb ldrb r3, [r7, #7] 8004ea4: 2b07 cmp r3, #7 8004ea6: d82b bhi.n 8004f00 8004ea8: a201 add r2, pc, #4 ; (adr r2, 8004eb0 ) 8004eaa: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004eae: bf00 nop 8004eb0: 08004ed1 .word 0x08004ed1 8004eb4: 08004ed7 .word 0x08004ed7 8004eb8: 08004edd .word 0x08004edd 8004ebc: 08004ee3 .word 0x08004ee3 8004ec0: 08004ee9 .word 0x08004ee9 8004ec4: 08004eef .word 0x08004eef 8004ec8: 08004ef5 .word 0x08004ef5 8004ecc: 08004efb .word 0x08004efb { case 0:dir=6;break; 8004ed0: 2306 movs r3, #6 8004ed2: 71fb strb r3, [r7, #7] 8004ed4: e014 b.n 8004f00 case 1:dir=7;break; 8004ed6: 2307 movs r3, #7 8004ed8: 71fb strb r3, [r7, #7] 8004eda: e011 b.n 8004f00 case 2:dir=4;break; 8004edc: 2304 movs r3, #4 8004ede: 71fb strb r3, [r7, #7] 8004ee0: e00e b.n 8004f00 case 3:dir=5;break; 8004ee2: 2305 movs r3, #5 8004ee4: 71fb strb r3, [r7, #7] 8004ee6: e00b b.n 8004f00 case 4:dir=1;break; 8004ee8: 2301 movs r3, #1 8004eea: 71fb strb r3, [r7, #7] 8004eec: e008 b.n 8004f00 case 5:dir=0;break; 8004eee: 2300 movs r3, #0 8004ef0: 71fb strb r3, [r7, #7] 8004ef2: e005 b.n 8004f00 case 6:dir=3;break; 8004ef4: 2303 movs r3, #3 8004ef6: 71fb strb r3, [r7, #7] 8004ef8: e002 b.n 8004f00 case 7:dir=2;break; 8004efa: 2302 movs r3, #2 8004efc: 71fb strb r3, [r7, #7] 8004efe: bf00 nop } } if(lcddev.id==0x9341||lcddev.id==0X6804||lcddev.id==0X5310)//9341/6804/5310,ºÜÌØÊâ 8004f00: 4b8b ldr r3, [pc, #556] ; (8005130 ) 8004f02: 889b ldrh r3, [r3, #4] 8004f04: f249 3241 movw r2, #37697 ; 0x9341 8004f08: 4293 cmp r3, r2 8004f0a: d00c beq.n 8004f26 8004f0c: 4b88 ldr r3, [pc, #544] ; (8005130 ) 8004f0e: 889b ldrh r3, [r3, #4] 8004f10: f646 0204 movw r2, #26628 ; 0x6804 8004f14: 4293 cmp r3, r2 8004f16: d006 beq.n 8004f26 8004f18: 4b85 ldr r3, [pc, #532] ; (8005130 ) 8004f1a: 889b ldrh r3, [r3, #4] 8004f1c: f245 3210 movw r2, #21264 ; 0x5310 8004f20: 4293 cmp r3, r2 8004f22: f040 80bc bne.w 800509e { switch(dir) 8004f26: 79fb ldrb r3, [r7, #7] 8004f28: 2b07 cmp r3, #7 8004f2a: d836 bhi.n 8004f9a 8004f2c: a201 add r2, pc, #4 ; (adr r2, 8004f34 ) 8004f2e: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004f32: bf00 nop 8004f34: 08004f9b .word 0x08004f9b 8004f38: 08004f55 .word 0x08004f55 8004f3c: 08004f5f .word 0x08004f5f 8004f40: 08004f69 .word 0x08004f69 8004f44: 08004f73 .word 0x08004f73 8004f48: 08004f7d .word 0x08004f7d 8004f4c: 08004f87 .word 0x08004f87 8004f50: 08004f91 .word 0x08004f91 { case L2R_U2D://´Ó×óµ½ÓÒ,´ÓÉϵ½Ï regval|=(0<<7)|(0<<6)|(0<<5); break; case L2R_D2U://´Ó×óµ½ÓÒ,´Óϵ½ÉÏ regval|=(1<<7)|(0<<6)|(0<<5); 8004f54: 89fb ldrh r3, [r7, #14] 8004f56: f043 0380 orr.w r3, r3, #128 ; 0x80 8004f5a: 81fb strh r3, [r7, #14] break; 8004f5c: e01d b.n 8004f9a case R2L_U2D://´ÓÓÒµ½×ó,´ÓÉϵ½Ï regval|=(0<<7)|(1<<6)|(0<<5); 8004f5e: 89fb ldrh r3, [r7, #14] 8004f60: f043 0340 orr.w r3, r3, #64 ; 0x40 8004f64: 81fb strh r3, [r7, #14] break; 8004f66: e018 b.n 8004f9a case R2L_D2U://´ÓÓÒµ½×ó,´Óϵ½ÉÏ regval|=(1<<7)|(1<<6)|(0<<5); 8004f68: 89fb ldrh r3, [r7, #14] 8004f6a: f043 03c0 orr.w r3, r3, #192 ; 0xc0 8004f6e: 81fb strh r3, [r7, #14] break; 8004f70: e013 b.n 8004f9a case U2D_L2R://´ÓÉϵ½ÏÂ,´Ó×óµ½ÓÒ regval|=(0<<7)|(0<<6)|(1<<5); 8004f72: 89fb ldrh r3, [r7, #14] 8004f74: f043 0320 orr.w r3, r3, #32 8004f78: 81fb strh r3, [r7, #14] break; 8004f7a: e00e b.n 8004f9a case U2D_R2L://´ÓÉϵ½ÏÂ,´ÓÓÒµ½×ó regval|=(0<<7)|(1<<6)|(1<<5); 8004f7c: 89fb ldrh r3, [r7, #14] 8004f7e: f043 0360 orr.w r3, r3, #96 ; 0x60 8004f82: 81fb strh r3, [r7, #14] break; 8004f84: e009 b.n 8004f9a case D2U_L2R://´Óϵ½ÉÏ,´Ó×óµ½ÓÒ regval|=(1<<7)|(0<<6)|(1<<5); 8004f86: 89fb ldrh r3, [r7, #14] 8004f88: f043 03a0 orr.w r3, r3, #160 ; 0xa0 8004f8c: 81fb strh r3, [r7, #14] break; 8004f8e: e004 b.n 8004f9a case D2U_R2L://´Óϵ½ÉÏ,´ÓÓÒµ½×ó regval|=(1<<7)|(1<<6)|(1<<5); 8004f90: 89fb ldrh r3, [r7, #14] 8004f92: f043 03e0 orr.w r3, r3, #224 ; 0xe0 8004f96: 81fb strh r3, [r7, #14] break; 8004f98: bf00 nop } dirreg=0X36; 8004f9a: 2336 movs r3, #54 ; 0x36 8004f9c: 737b strb r3, [r7, #13] if(lcddev.id!=0X5310)regval|=0X08;//5310²»ÐèÒªBGR 8004f9e: 4b64 ldr r3, [pc, #400] ; (8005130 ) 8004fa0: 889b ldrh r3, [r3, #4] 8004fa2: f245 3210 movw r2, #21264 ; 0x5310 8004fa6: 4293 cmp r3, r2 8004fa8: d003 beq.n 8004fb2 8004faa: 89fb ldrh r3, [r7, #14] 8004fac: f043 0308 orr.w r3, r3, #8 8004fb0: 81fb strh r3, [r7, #14] if(lcddev.id==0X6804)regval|=0x02;//6804µÄBIT6ºÍ9341µÄ·´ÁË 8004fb2: 4b5f ldr r3, [pc, #380] ; (8005130 ) 8004fb4: 889b ldrh r3, [r3, #4] 8004fb6: f646 0204 movw r2, #26628 ; 0x6804 8004fba: 4293 cmp r3, r2 8004fbc: d103 bne.n 8004fc6 8004fbe: 89fb ldrh r3, [r7, #14] 8004fc0: f043 0302 orr.w r3, r3, #2 8004fc4: 81fb strh r3, [r7, #14] LCD_WriteReg(dirreg,regval); 8004fc6: 7b7b ldrb r3, [r7, #13] 8004fc8: b29b uxth r3, r3 8004fca: 89fa ldrh r2, [r7, #14] 8004fcc: 4611 mov r1, r2 8004fce: 4618 mov r0, r3 8004fd0: f7ff ff2a bl 8004e28 if((regval&0X20)||lcddev.dir==1) 8004fd4: 89fb ldrh r3, [r7, #14] 8004fd6: f003 0320 and.w r3, r3, #32 8004fda: 2b00 cmp r3, #0 8004fdc: d103 bne.n 8004fe6 8004fde: 4b54 ldr r3, [pc, #336] ; (8005130 ) 8004fe0: 799b ldrb r3, [r3, #6] 8004fe2: 2b01 cmp r3, #1 8004fe4: d110 bne.n 8005008 { if(lcddev.width) 8004fe8: 881a ldrh r2, [r3, #0] 8004fea: 4b51 ldr r3, [pc, #324] ; (8005130 ) 8004fec: 885b ldrh r3, [r3, #2] 8004fee: 429a cmp r2, r3 8004ff0: d21a bcs.n 8005028 { temp=lcddev.width; 8004ff2: 4b4f ldr r3, [pc, #316] ; (8005130 ) 8004ff4: 881b ldrh r3, [r3, #0] 8004ff6: 817b strh r3, [r7, #10] lcddev.width=lcddev.height; 8004ff8: 4b4d ldr r3, [pc, #308] ; (8005130 ) 8004ffa: 885a ldrh r2, [r3, #2] 8004ffc: 4b4c ldr r3, [pc, #304] ; (8005130 ) 8004ffe: 801a strh r2, [r3, #0] lcddev.height=temp; 8005000: 4a4b ldr r2, [pc, #300] ; (8005130 ) 8005002: 897b ldrh r3, [r7, #10] 8005004: 8053 strh r3, [r2, #2] if(lcddev.width } }else { if(lcddev.width>lcddev.height)//½»»»X,Y 8005008: 4b49 ldr r3, [pc, #292] ; (8005130 ) 800500a: 881a ldrh r2, [r3, #0] 800500c: 4b48 ldr r3, [pc, #288] ; (8005130 ) 800500e: 885b ldrh r3, [r3, #2] 8005010: 429a cmp r2, r3 8005012: d909 bls.n 8005028 { temp=lcddev.width; 8005014: 4b46 ldr r3, [pc, #280] ; (8005130 ) 8005016: 881b ldrh r3, [r3, #0] 8005018: 817b strh r3, [r7, #10] lcddev.width=lcddev.height; 800501a: 4b45 ldr r3, [pc, #276] ; (8005130 ) 800501c: 885a ldrh r2, [r3, #2] 800501e: 4b44 ldr r3, [pc, #272] ; (8005130 ) 8005020: 801a strh r2, [r3, #0] lcddev.height=temp; 8005022: 4a43 ldr r2, [pc, #268] ; (8005130 ) 8005024: 897b ldrh r3, [r7, #10] 8005026: 8053 strh r3, [r2, #2] } } LCD_WR_REG(lcddev.setxcmd); 8005028: 4b41 ldr r3, [pc, #260] ; (8005130 ) 800502a: 7a1b ldrb r3, [r3, #8] 800502c: b29b uxth r3, r3 800502e: 4618 mov r0, r3 8005030: f7ff fedc bl 8004dec LCD_WR_DATA(0);LCD_WR_DATA(0); 8005034: 2000 movs r0, #0 8005036: f7ff fee7 bl 8004e08 800503a: 2000 movs r0, #0 800503c: f7ff fee4 bl 8004e08 LCD_WR_DATA((lcddev.width-1)>>8);LCD_WR_DATA((lcddev.width-1)&0XFF); 8005040: 4b3b ldr r3, [pc, #236] ; (8005130 ) 8005042: 881b ldrh r3, [r3, #0] 8005044: 3b01 subs r3, #1 8005046: 121b asrs r3, r3, #8 8005048: b29b uxth r3, r3 800504a: 4618 mov r0, r3 800504c: f7ff fedc bl 8004e08 8005050: 4b37 ldr r3, [pc, #220] ; (8005130 ) 8005052: 881b ldrh r3, [r3, #0] 8005054: 3b01 subs r3, #1 8005056: b29b uxth r3, r3 8005058: b2db uxtb r3, r3 800505a: b29b uxth r3, r3 800505c: 4618 mov r0, r3 800505e: f7ff fed3 bl 8004e08 LCD_WR_REG(lcddev.setycmd); 8005062: 4b33 ldr r3, [pc, #204] ; (8005130 ) 8005064: 7a5b ldrb r3, [r3, #9] 8005066: b29b uxth r3, r3 8005068: 4618 mov r0, r3 800506a: f7ff febf bl 8004dec LCD_WR_DATA(0);LCD_WR_DATA(0); 800506e: 2000 movs r0, #0 8005070: f7ff feca bl 8004e08 8005074: 2000 movs r0, #0 8005076: f7ff fec7 bl 8004e08 LCD_WR_DATA((lcddev.height-1)>>8);LCD_WR_DATA((lcddev.height-1)&0XFF); 800507a: 4b2d ldr r3, [pc, #180] ; (8005130 ) 800507c: 885b ldrh r3, [r3, #2] 800507e: 3b01 subs r3, #1 8005080: 121b asrs r3, r3, #8 8005082: b29b uxth r3, r3 8005084: 4618 mov r0, r3 8005086: f7ff febf bl 8004e08 800508a: 4b29 ldr r3, [pc, #164] ; (8005130 ) 800508c: 885b ldrh r3, [r3, #2] 800508e: 3b01 subs r3, #1 8005090: b29b uxth r3, r3 8005092: b2db uxtb r3, r3 8005094: b29b uxth r3, r3 8005096: 4618 mov r0, r3 8005098: f7ff feb6 bl 8004e08 800509c: e058 b.n 8005150 }else { switch(dir) 800509e: 79fb ldrb r3, [r7, #7] 80050a0: 2b07 cmp r3, #7 80050a2: d836 bhi.n 8005112 80050a4: a201 add r2, pc, #4 ; (adr r2, 80050ac ) 80050a6: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80050aa: bf00 nop 80050ac: 080050cd .word 0x080050cd 80050b0: 080050d7 .word 0x080050d7 80050b4: 080050e1 .word 0x080050e1 80050b8: 08005113 .word 0x08005113 80050bc: 080050eb .word 0x080050eb 80050c0: 080050f5 .word 0x080050f5 80050c4: 080050ff .word 0x080050ff 80050c8: 08005109 .word 0x08005109 { case L2R_U2D://´Ó×óµ½ÓÒ,´ÓÉϵ½Ï regval|=(1<<5)|(1<<4)|(0<<3); 80050cc: 89fb ldrh r3, [r7, #14] 80050ce: f043 0330 orr.w r3, r3, #48 ; 0x30 80050d2: 81fb strh r3, [r7, #14] break; 80050d4: e01d b.n 8005112 case L2R_D2U://´Ó×óµ½ÓÒ,´Óϵ½ÉÏ regval|=(0<<5)|(1<<4)|(0<<3); 80050d6: 89fb ldrh r3, [r7, #14] 80050d8: f043 0310 orr.w r3, r3, #16 80050dc: 81fb strh r3, [r7, #14] break; 80050de: e018 b.n 8005112 case R2L_U2D://´ÓÓÒµ½×ó,´ÓÉϵ½Ï regval|=(1<<5)|(0<<4)|(0<<3); 80050e0: 89fb ldrh r3, [r7, #14] 80050e2: f043 0320 orr.w r3, r3, #32 80050e6: 81fb strh r3, [r7, #14] break; 80050e8: e013 b.n 8005112 case R2L_D2U://´ÓÓÒµ½×ó,´Óϵ½ÉÏ regval|=(0<<5)|(0<<4)|(0<<3); break; case U2D_L2R://´ÓÉϵ½ÏÂ,´Ó×óµ½ÓÒ regval|=(1<<5)|(1<<4)|(1<<3); 80050ea: 89fb ldrh r3, [r7, #14] 80050ec: f043 0338 orr.w r3, r3, #56 ; 0x38 80050f0: 81fb strh r3, [r7, #14] break; 80050f2: e00e b.n 8005112 case U2D_R2L://´ÓÉϵ½ÏÂ,´ÓÓÒµ½×ó regval|=(1<<5)|(0<<4)|(1<<3); 80050f4: 89fb ldrh r3, [r7, #14] 80050f6: f043 0328 orr.w r3, r3, #40 ; 0x28 80050fa: 81fb strh r3, [r7, #14] break; 80050fc: e009 b.n 8005112 case D2U_L2R://´Óϵ½ÉÏ,´Ó×óµ½ÓÒ regval|=(0<<5)|(1<<4)|(1<<3); 80050fe: 89fb ldrh r3, [r7, #14] 8005100: f043 0318 orr.w r3, r3, #24 8005104: 81fb strh r3, [r7, #14] break; 8005106: e004 b.n 8005112 case D2U_R2L://´Óϵ½ÉÏ,´ÓÓÒµ½×ó regval|=(0<<5)|(0<<4)|(1<<3); 8005108: 89fb ldrh r3, [r7, #14] 800510a: f043 0308 orr.w r3, r3, #8 800510e: 81fb strh r3, [r7, #14] break; 8005110: bf00 nop } if(lcddev.id==0x8989)//8989 IC 8005112: 4b07 ldr r3, [pc, #28] ; (8005130 ) 8005114: 889b ldrh r3, [r3, #4] 8005116: f648 1289 movw r2, #35209 ; 0x8989 800511a: 4293 cmp r3, r2 800511c: d10a bne.n 8005134 { dirreg=0X11; 800511e: 2311 movs r3, #17 8005120: 737b strb r3, [r7, #13] regval|=0X6040; //65K 8005122: 89fb ldrh r3, [r7, #14] 8005124: f443 43c0 orr.w r3, r3, #24576 ; 0x6000 8005128: f043 0340 orr.w r3, r3, #64 ; 0x40 800512c: 81fb strh r3, [r7, #14] 800512e: e007 b.n 8005140 8005130: 20000380 .word 0x20000380 }else//ÆäËûÇý¶¯IC { dirreg=0X03; 8005134: 2303 movs r3, #3 8005136: 737b strb r3, [r7, #13] regval|=1<<12; 8005138: 89fb ldrh r3, [r7, #14] 800513a: f443 5380 orr.w r3, r3, #4096 ; 0x1000 800513e: 81fb strh r3, [r7, #14] } LCD_WriteReg(dirreg,regval); 8005140: 7b7b ldrb r3, [r7, #13] 8005142: b29b uxth r3, r3 8005144: 89fa ldrh r2, [r7, #14] 8005146: 4611 mov r1, r2 8005148: 4618 mov r0, r3 800514a: f7ff fe6d bl 8004e28 } } 800514e: bf00 nop 8005150: bf00 nop 8005152: 3710 adds r7, #16 8005154: 46bd mov sp, r7 8005156: bd80 pop {r7, pc} 08005158 : //ÉèÖÃLCDÏÔʾ·½Ïò //dir:0,ÊúÆÁ£»1,ºáÆÁ void LCD_Display_Dir(uint8_t dir) { 8005158: b580 push {r7, lr} 800515a: b082 sub sp, #8 800515c: af00 add r7, sp, #0 800515e: 4603 mov r3, r0 8005160: 71fb strb r3, [r7, #7] if(dir==0) //ÊúÆÁ 8005162: 79fb ldrb r3, [r7, #7] 8005164: 2b00 cmp r3, #0 8005166: d154 bne.n 8005212 { lcddev.dir=0; //ÊúÆÁ 8005168: 4b5d ldr r3, [pc, #372] ; (80052e0 ) 800516a: 2200 movs r2, #0 800516c: 719a strb r2, [r3, #6] lcddev.width=240; 800516e: 4b5c ldr r3, [pc, #368] ; (80052e0 ) 8005170: 22f0 movs r2, #240 ; 0xf0 8005172: 801a strh r2, [r3, #0] lcddev.height=320; 8005174: 4b5a ldr r3, [pc, #360] ; (80052e0 ) 8005176: f44f 72a0 mov.w r2, #320 ; 0x140 800517a: 805a strh r2, [r3, #2] if(lcddev.id==0X9341||lcddev.id==0X6804||lcddev.id==0X5310) 800517c: 4b58 ldr r3, [pc, #352] ; (80052e0 ) 800517e: 889b ldrh r3, [r3, #4] 8005180: f249 3241 movw r2, #37697 ; 0x9341 8005184: 4293 cmp r3, r2 8005186: d00b beq.n 80051a0 8005188: 4b55 ldr r3, [pc, #340] ; (80052e0 ) 800518a: 889b ldrh r3, [r3, #4] 800518c: f646 0204 movw r2, #26628 ; 0x6804 8005190: 4293 cmp r3, r2 8005192: d005 beq.n 80051a0 8005194: 4b52 ldr r3, [pc, #328] ; (80052e0 ) 8005196: 889b ldrh r3, [r3, #4] 8005198: f245 3210 movw r2, #21264 ; 0x5310 800519c: 4293 cmp r3, r2 800519e: d11e bne.n 80051de { lcddev.wramcmd=0X2C; 80051a0: 4b4f ldr r3, [pc, #316] ; (80052e0 ) 80051a2: 222c movs r2, #44 ; 0x2c 80051a4: 71da strb r2, [r3, #7] lcddev.setxcmd=0X2A; 80051a6: 4b4e ldr r3, [pc, #312] ; (80052e0 ) 80051a8: 222a movs r2, #42 ; 0x2a 80051aa: 721a strb r2, [r3, #8] lcddev.setycmd=0X2B; 80051ac: 4b4c ldr r3, [pc, #304] ; (80052e0 ) 80051ae: 222b movs r2, #43 ; 0x2b 80051b0: 725a strb r2, [r3, #9] if(lcddev.id==0X6804||lcddev.id==0X5310) 80051b2: 4b4b ldr r3, [pc, #300] ; (80052e0 ) 80051b4: 889b ldrh r3, [r3, #4] 80051b6: f646 0204 movw r2, #26628 ; 0x6804 80051ba: 4293 cmp r3, r2 80051bc: d006 beq.n 80051cc 80051be: 4b48 ldr r3, [pc, #288] ; (80052e0 ) 80051c0: 889b ldrh r3, [r3, #4] 80051c2: f245 3210 movw r2, #21264 ; 0x5310 80051c6: 4293 cmp r3, r2 80051c8: f040 8081 bne.w 80052ce { lcddev.width=320; 80051cc: 4b44 ldr r3, [pc, #272] ; (80052e0 ) 80051ce: f44f 72a0 mov.w r2, #320 ; 0x140 80051d2: 801a strh r2, [r3, #0] lcddev.height=480; 80051d4: 4b42 ldr r3, [pc, #264] ; (80052e0 ) 80051d6: f44f 72f0 mov.w r2, #480 ; 0x1e0 80051da: 805a strh r2, [r3, #2] if(lcddev.id==0X6804||lcddev.id==0X5310) 80051dc: e077 b.n 80052ce } }else if(lcddev.id==0X8989) 80051de: 4b40 ldr r3, [pc, #256] ; (80052e0 ) 80051e0: 889b ldrh r3, [r3, #4] 80051e2: f648 1289 movw r2, #35209 ; 0x8989 80051e6: 4293 cmp r3, r2 80051e8: d109 bne.n 80051fe { lcddev.wramcmd=R34; 80051ea: 4b3d ldr r3, [pc, #244] ; (80052e0 ) 80051ec: 2222 movs r2, #34 ; 0x22 80051ee: 71da strb r2, [r3, #7] lcddev.setxcmd=0X4E; 80051f0: 4b3b ldr r3, [pc, #236] ; (80052e0 ) 80051f2: 224e movs r2, #78 ; 0x4e 80051f4: 721a strb r2, [r3, #8] lcddev.setycmd=0X4F; 80051f6: 4b3a ldr r3, [pc, #232] ; (80052e0 ) 80051f8: 224f movs r2, #79 ; 0x4f 80051fa: 725a strb r2, [r3, #9] 80051fc: e068 b.n 80052d0 }else { lcddev.wramcmd=R34; 80051fe: 4b38 ldr r3, [pc, #224] ; (80052e0 ) 8005200: 2222 movs r2, #34 ; 0x22 8005202: 71da strb r2, [r3, #7] lcddev.setxcmd=R32; 8005204: 4b36 ldr r3, [pc, #216] ; (80052e0 ) 8005206: 2220 movs r2, #32 8005208: 721a strb r2, [r3, #8] lcddev.setycmd=R33; 800520a: 4b35 ldr r3, [pc, #212] ; (80052e0 ) 800520c: 2221 movs r2, #33 ; 0x21 800520e: 725a strb r2, [r3, #9] 8005210: e05e b.n 80052d0 } }else //ºáÆÁ { lcddev.dir=1; //ºáÆÁ 8005212: 4b33 ldr r3, [pc, #204] ; (80052e0 ) 8005214: 2201 movs r2, #1 8005216: 719a strb r2, [r3, #6] lcddev.width=320; 8005218: 4b31 ldr r3, [pc, #196] ; (80052e0 ) 800521a: f44f 72a0 mov.w r2, #320 ; 0x140 800521e: 801a strh r2, [r3, #0] lcddev.height=240; 8005220: 4b2f ldr r3, [pc, #188] ; (80052e0 ) 8005222: 22f0 movs r2, #240 ; 0xf0 8005224: 805a strh r2, [r3, #2] if(lcddev.id==0X9341||lcddev.id==0X5310) 8005226: 4b2e ldr r3, [pc, #184] ; (80052e0 ) 8005228: 889b ldrh r3, [r3, #4] 800522a: f249 3241 movw r2, #37697 ; 0x9341 800522e: 4293 cmp r3, r2 8005230: d005 beq.n 800523e 8005232: 4b2b ldr r3, [pc, #172] ; (80052e0 ) 8005234: 889b ldrh r3, [r3, #4] 8005236: f245 3210 movw r2, #21264 ; 0x5310 800523a: 4293 cmp r3, r2 800523c: d109 bne.n 8005252 { lcddev.wramcmd=0X2C; 800523e: 4b28 ldr r3, [pc, #160] ; (80052e0 ) 8005240: 222c movs r2, #44 ; 0x2c 8005242: 71da strb r2, [r3, #7] lcddev.setxcmd=0X2A; 8005244: 4b26 ldr r3, [pc, #152] ; (80052e0 ) 8005246: 222a movs r2, #42 ; 0x2a 8005248: 721a strb r2, [r3, #8] lcddev.setycmd=0X2B; 800524a: 4b25 ldr r3, [pc, #148] ; (80052e0 ) 800524c: 222b movs r2, #43 ; 0x2b 800524e: 725a strb r2, [r3, #9] 8005250: e028 b.n 80052a4 }else if(lcddev.id==0X6804) 8005252: 4b23 ldr r3, [pc, #140] ; (80052e0 ) 8005254: 889b ldrh r3, [r3, #4] 8005256: f646 0204 movw r2, #26628 ; 0x6804 800525a: 4293 cmp r3, r2 800525c: d109 bne.n 8005272 { lcddev.wramcmd=0X2C; 800525e: 4b20 ldr r3, [pc, #128] ; (80052e0 ) 8005260: 222c movs r2, #44 ; 0x2c 8005262: 71da strb r2, [r3, #7] lcddev.setxcmd=0X2B; 8005264: 4b1e ldr r3, [pc, #120] ; (80052e0 ) 8005266: 222b movs r2, #43 ; 0x2b 8005268: 721a strb r2, [r3, #8] lcddev.setycmd=0X2A; 800526a: 4b1d ldr r3, [pc, #116] ; (80052e0 ) 800526c: 222a movs r2, #42 ; 0x2a 800526e: 725a strb r2, [r3, #9] 8005270: e018 b.n 80052a4 }else if(lcddev.id==0X8989) 8005272: 4b1b ldr r3, [pc, #108] ; (80052e0 ) 8005274: 889b ldrh r3, [r3, #4] 8005276: f648 1289 movw r2, #35209 ; 0x8989 800527a: 4293 cmp r3, r2 800527c: d109 bne.n 8005292 { lcddev.wramcmd=R34; 800527e: 4b18 ldr r3, [pc, #96] ; (80052e0 ) 8005280: 2222 movs r2, #34 ; 0x22 8005282: 71da strb r2, [r3, #7] lcddev.setxcmd=0X4F; 8005284: 4b16 ldr r3, [pc, #88] ; (80052e0 ) 8005286: 224f movs r2, #79 ; 0x4f 8005288: 721a strb r2, [r3, #8] lcddev.setycmd=0X4E; 800528a: 4b15 ldr r3, [pc, #84] ; (80052e0 ) 800528c: 224e movs r2, #78 ; 0x4e 800528e: 725a strb r2, [r3, #9] 8005290: e008 b.n 80052a4 }else { lcddev.wramcmd=R34; 8005292: 4b13 ldr r3, [pc, #76] ; (80052e0 ) 8005294: 2222 movs r2, #34 ; 0x22 8005296: 71da strb r2, [r3, #7] lcddev.setxcmd=R33; 8005298: 4b11 ldr r3, [pc, #68] ; (80052e0 ) 800529a: 2221 movs r2, #33 ; 0x21 800529c: 721a strb r2, [r3, #8] lcddev.setycmd=R32; 800529e: 4b10 ldr r3, [pc, #64] ; (80052e0 ) 80052a0: 2220 movs r2, #32 80052a2: 725a strb r2, [r3, #9] } if(lcddev.id==0X6804||lcddev.id==0X5310) 80052a4: 4b0e ldr r3, [pc, #56] ; (80052e0 ) 80052a6: 889b ldrh r3, [r3, #4] 80052a8: f646 0204 movw r2, #26628 ; 0x6804 80052ac: 4293 cmp r3, r2 80052ae: d005 beq.n 80052bc 80052b0: 4b0b ldr r3, [pc, #44] ; (80052e0 ) 80052b2: 889b ldrh r3, [r3, #4] 80052b4: f245 3210 movw r2, #21264 ; 0x5310 80052b8: 4293 cmp r3, r2 80052ba: d109 bne.n 80052d0 { lcddev.width=480; 80052bc: 4b08 ldr r3, [pc, #32] ; (80052e0 ) 80052be: f44f 72f0 mov.w r2, #480 ; 0x1e0 80052c2: 801a strh r2, [r3, #0] lcddev.height=320; 80052c4: 4b06 ldr r3, [pc, #24] ; (80052e0 ) 80052c6: f44f 72a0 mov.w r2, #320 ; 0x140 80052ca: 805a strh r2, [r3, #2] 80052cc: e000 b.n 80052d0 if(lcddev.id==0X6804||lcddev.id==0X5310) 80052ce: bf00 nop } } LCD_Scan_Dir(DFT_SCAN_DIR); //ĬÈÏɨÃè·½Ïò 80052d0: 2000 movs r0, #0 80052d2: f7ff fdd3 bl 8004e7c } 80052d6: bf00 nop 80052d8: 3708 adds r7, #8 80052da: 46bd mov sp, r7 80052dc: bd80 pop {r7, pc} 80052de: bf00 nop 80052e0: 20000380 .word 0x20000380 080052e4 : //³õʼ»¯lcd //¸Ã³õʼ»¯º¯Êý¿ÉÒÔ³õʼ»¯¸÷ÖÖÒº¾§! void LCDx_Init(void) { 80052e4: b580 push {r7, lr} 80052e6: af00 add r7, sp, #0 HAL_Delay(50); // delay 50 ms 80052e8: 2032 movs r0, #50 ; 0x32 80052ea: f7fc fd41 bl 8001d70 LCD_WriteReg(0x0000,0x0001); 80052ee: 2101 movs r1, #1 80052f0: 2000 movs r0, #0 80052f2: f7ff fd99 bl 8004e28 HAL_Delay(50); // delay 50 ms 80052f6: 2032 movs r0, #50 ; 0x32 80052f8: f7fc fd3a bl 8001d70 lcddev.id = LCD_ReadReg(0x0000); 80052fc: 2000 movs r0, #0 80052fe: f7ff fda9 bl 8004e54 8005302: 4603 mov r3, r0 8005304: 461a mov r2, r3 8005306: 4b70 ldr r3, [pc, #448] ; (80054c8 ) 8005308: 809a strh r2, [r3, #4] LCD_WriteReg(0x00E5,0x78F0); 800530a: f647 01f0 movw r1, #30960 ; 0x78f0 800530e: 20e5 movs r0, #229 ; 0xe5 8005310: f7ff fd8a bl 8004e28 LCD_WriteReg(0x0001,0x0100); 8005314: f44f 7180 mov.w r1, #256 ; 0x100 8005318: 2001 movs r0, #1 800531a: f7ff fd85 bl 8004e28 LCD_WriteReg(0x0002,0x0700); 800531e: f44f 61e0 mov.w r1, #1792 ; 0x700 8005322: 2002 movs r0, #2 8005324: f7ff fd80 bl 8004e28 LCD_WriteReg(0x0003,0x1030); 8005328: f241 0130 movw r1, #4144 ; 0x1030 800532c: 2003 movs r0, #3 800532e: f7ff fd7b bl 8004e28 LCD_WriteReg(0x0004,0x0000); 8005332: 2100 movs r1, #0 8005334: 2004 movs r0, #4 8005336: f7ff fd77 bl 8004e28 LCD_WriteReg(0x0008,0x0202); 800533a: f240 2102 movw r1, #514 ; 0x202 800533e: 2008 movs r0, #8 8005340: f7ff fd72 bl 8004e28 LCD_WriteReg(0x0009,0x0000); 8005344: 2100 movs r1, #0 8005346: 2009 movs r0, #9 8005348: f7ff fd6e bl 8004e28 LCD_WriteReg(0x000A,0x0000); 800534c: 2100 movs r1, #0 800534e: 200a movs r0, #10 8005350: f7ff fd6a bl 8004e28 LCD_WriteReg(0x000C,0x0000); 8005354: 2100 movs r1, #0 8005356: 200c movs r0, #12 8005358: f7ff fd66 bl 8004e28 LCD_WriteReg(0x000D,0x0000); 800535c: 2100 movs r1, #0 800535e: 200d movs r0, #13 8005360: f7ff fd62 bl 8004e28 LCD_WriteReg(0x000F,0x0000); 8005364: 2100 movs r1, #0 8005366: 200f movs r0, #15 8005368: f7ff fd5e bl 8004e28 //power on sequence VGHVGL LCD_WriteReg(0x0010,0x0000); 800536c: 2100 movs r1, #0 800536e: 2010 movs r0, #16 8005370: f7ff fd5a bl 8004e28 LCD_WriteReg(0x0011,0x0007); 8005374: 2107 movs r1, #7 8005376: 2011 movs r0, #17 8005378: f7ff fd56 bl 8004e28 LCD_WriteReg(0x0012,0x0000); 800537c: 2100 movs r1, #0 800537e: 2012 movs r0, #18 8005380: f7ff fd52 bl 8004e28 LCD_WriteReg(0x0013,0x0000); 8005384: 2100 movs r1, #0 8005386: 2013 movs r0, #19 8005388: f7ff fd4e bl 8004e28 LCD_WriteReg(0x0007,0x0000); 800538c: 2100 movs r1, #0 800538e: 2007 movs r0, #7 8005390: f7ff fd4a bl 8004e28 //vgh LCD_WriteReg(0x0010,0x1690); 8005394: f241 6190 movw r1, #5776 ; 0x1690 8005398: 2010 movs r0, #16 800539a: f7ff fd45 bl 8004e28 LCD_WriteReg(0x0011,0x0227); 800539e: f240 2127 movw r1, #551 ; 0x227 80053a2: 2011 movs r0, #17 80053a4: f7ff fd40 bl 8004e28 //delayms(100); //vregiout LCD_WriteReg(0x0012,0x009D); //0x001b 80053a8: 219d movs r1, #157 ; 0x9d 80053aa: 2012 movs r0, #18 80053ac: f7ff fd3c bl 8004e28 //delayms(100); //vom amplitude LCD_WriteReg(0x0013,0x1900); 80053b0: f44f 51c8 mov.w r1, #6400 ; 0x1900 80053b4: 2013 movs r0, #19 80053b6: f7ff fd37 bl 8004e28 //delayms(100); //vom H LCD_WriteReg(0x0029,0x0025); 80053ba: 2125 movs r1, #37 ; 0x25 80053bc: 2029 movs r0, #41 ; 0x29 80053be: f7ff fd33 bl 8004e28 LCD_WriteReg(0x002B,0x000D); 80053c2: 210d movs r1, #13 80053c4: 202b movs r0, #43 ; 0x2b 80053c6: f7ff fd2f bl 8004e28 //gamma LCD_WriteReg(0x0030,0x0007); 80053ca: 2107 movs r1, #7 80053cc: 2030 movs r0, #48 ; 0x30 80053ce: f7ff fd2b bl 8004e28 LCD_WriteReg(0x0031,0x0303); 80053d2: f240 3103 movw r1, #771 ; 0x303 80053d6: 2031 movs r0, #49 ; 0x31 80053d8: f7ff fd26 bl 8004e28 LCD_WriteReg(0x0032,0x0003);// 0006 80053dc: 2103 movs r1, #3 80053de: 2032 movs r0, #50 ; 0x32 80053e0: f7ff fd22 bl 8004e28 LCD_WriteReg(0x0035,0x0206); 80053e4: f240 2106 movw r1, #518 ; 0x206 80053e8: 2035 movs r0, #53 ; 0x35 80053ea: f7ff fd1d bl 8004e28 LCD_WriteReg(0x0036,0x0008); 80053ee: 2108 movs r1, #8 80053f0: 2036 movs r0, #54 ; 0x36 80053f2: f7ff fd19 bl 8004e28 LCD_WriteReg(0x0037,0x0406); 80053f6: f240 4106 movw r1, #1030 ; 0x406 80053fa: 2037 movs r0, #55 ; 0x37 80053fc: f7ff fd14 bl 8004e28 LCD_WriteReg(0x0038,0x0304);//0200 8005400: f44f 7141 mov.w r1, #772 ; 0x304 8005404: 2038 movs r0, #56 ; 0x38 8005406: f7ff fd0f bl 8004e28 LCD_WriteReg(0x0039,0x0007); 800540a: 2107 movs r1, #7 800540c: 2039 movs r0, #57 ; 0x39 800540e: f7ff fd0b bl 8004e28 LCD_WriteReg(0x003C,0x0602);// 0504 8005412: f240 6102 movw r1, #1538 ; 0x602 8005416: 203c movs r0, #60 ; 0x3c 8005418: f7ff fd06 bl 8004e28 LCD_WriteReg(0x003D,0x0008); 800541c: 2108 movs r1, #8 800541e: 203d movs r0, #61 ; 0x3d 8005420: f7ff fd02 bl 8004e28 //ram LCD_WriteReg(0x0050,0x0000); 8005424: 2100 movs r1, #0 8005426: 2050 movs r0, #80 ; 0x50 8005428: f7ff fcfe bl 8004e28 LCD_WriteReg(0x0051,0x00EF); 800542c: 21ef movs r1, #239 ; 0xef 800542e: 2051 movs r0, #81 ; 0x51 8005430: f7ff fcfa bl 8004e28 LCD_WriteReg(0x0052,0x0000); 8005434: 2100 movs r1, #0 8005436: 2052 movs r0, #82 ; 0x52 8005438: f7ff fcf6 bl 8004e28 LCD_WriteReg(0x0053,0x013F); 800543c: f240 113f movw r1, #319 ; 0x13f 8005440: 2053 movs r0, #83 ; 0x53 8005442: f7ff fcf1 bl 8004e28 LCD_WriteReg(0x0060,0xA700); 8005446: f44f 4127 mov.w r1, #42752 ; 0xa700 800544a: 2060 movs r0, #96 ; 0x60 800544c: f7ff fcec bl 8004e28 LCD_WriteReg(0x0061,0x0001); 8005450: 2101 movs r1, #1 8005452: 2061 movs r0, #97 ; 0x61 8005454: f7ff fce8 bl 8004e28 LCD_WriteReg(0x006A,0x0000); 8005458: 2100 movs r1, #0 800545a: 206a movs r0, #106 ; 0x6a 800545c: f7ff fce4 bl 8004e28 // LCD_WriteReg(0x0080,0x0000); 8005460: 2100 movs r1, #0 8005462: 2080 movs r0, #128 ; 0x80 8005464: f7ff fce0 bl 8004e28 LCD_WriteReg(0x0081,0x0000); 8005468: 2100 movs r1, #0 800546a: 2081 movs r0, #129 ; 0x81 800546c: f7ff fcdc bl 8004e28 LCD_WriteReg(0x0082,0x0000); 8005470: 2100 movs r1, #0 8005472: 2082 movs r0, #130 ; 0x82 8005474: f7ff fcd8 bl 8004e28 LCD_WriteReg(0x0083,0x0000); 8005478: 2100 movs r1, #0 800547a: 2083 movs r0, #131 ; 0x83 800547c: f7ff fcd4 bl 8004e28 LCD_WriteReg(0x0084,0x0000); 8005480: 2100 movs r1, #0 8005482: 2084 movs r0, #132 ; 0x84 8005484: f7ff fcd0 bl 8004e28 LCD_WriteReg(0x0085,0x0000); 8005488: 2100 movs r1, #0 800548a: 2085 movs r0, #133 ; 0x85 800548c: f7ff fccc bl 8004e28 // LCD_WriteReg(0x0090,0x0010); 8005490: 2110 movs r1, #16 8005492: 2090 movs r0, #144 ; 0x90 8005494: f7ff fcc8 bl 8004e28 LCD_WriteReg(0x0092,0x0600); 8005498: f44f 61c0 mov.w r1, #1536 ; 0x600 800549c: 2092 movs r0, #146 ; 0x92 800549e: f7ff fcc3 bl 8004e28 LCD_WriteReg(0x0007,0x0133); 80054a2: f240 1133 movw r1, #307 ; 0x133 80054a6: 2007 movs r0, #7 80054a8: f7ff fcbe bl 8004e28 LCD_WriteReg(0x00,0x0022);// 80054ac: 2122 movs r1, #34 ; 0x22 80054ae: 2000 movs r0, #0 80054b0: f7ff fcba bl 8004e28 LCD_Display_Dir(1); //ĬÈÏΪhÆÁ 80054b4: 2001 movs r0, #1 80054b6: f7ff fe4f bl 8005158 LCD_BL(0); 80054ba: 2200 movs r2, #0 80054bc: 2101 movs r1, #1 80054be: 4803 ldr r0, [pc, #12] ; (80054cc ) 80054c0: f7fc ff33 bl 800232a } 80054c4: bf00 nop 80054c6: bd80 pop {r7, pc} 80054c8: 20000380 .word 0x20000380 80054cc: 40010c00 .word 0x40010c00 080054d0 : //***********************************************************´òµã ¶Áµã ʲôµÄ //ÉèÖùâ±êλÖà //Xpos:ºá×ø±ê //Ypos:×Ý×ø±ê void LCD_SetCursor(uint16_t Xpos, uint16_t Ypos) { 80054d0: b580 push {r7, lr} 80054d2: b082 sub sp, #8 80054d4: af00 add r7, sp, #0 80054d6: 4603 mov r3, r0 80054d8: 460a mov r2, r1 80054da: 80fb strh r3, [r7, #6] 80054dc: 4613 mov r3, r2 80054de: 80bb strh r3, [r7, #4] if(lcddev.id==0X9341||lcddev.id==0X5310) 80054e0: 4b42 ldr r3, [pc, #264] ; (80055ec ) 80054e2: 889b ldrh r3, [r3, #4] 80054e4: f249 3241 movw r2, #37697 ; 0x9341 80054e8: 4293 cmp r3, r2 80054ea: d005 beq.n 80054f8 80054ec: 4b3f ldr r3, [pc, #252] ; (80055ec ) 80054ee: 889b ldrh r3, [r3, #4] 80054f0: f245 3210 movw r2, #21264 ; 0x5310 80054f4: 4293 cmp r3, r2 80054f6: d124 bne.n 8005542 { LCD_WR_REG(lcddev.setxcmd); 80054f8: 4b3c ldr r3, [pc, #240] ; (80055ec ) 80054fa: 7a1b ldrb r3, [r3, #8] 80054fc: b29b uxth r3, r3 80054fe: 4618 mov r0, r3 8005500: f7ff fc74 bl 8004dec LCD_WR_DATA(Xpos>>8); 8005504: 88fb ldrh r3, [r7, #6] 8005506: 0a1b lsrs r3, r3, #8 8005508: b29b uxth r3, r3 800550a: 4618 mov r0, r3 800550c: f7ff fc7c bl 8004e08 LCD_WR_DATA(Xpos&0XFF); 8005510: 88fb ldrh r3, [r7, #6] 8005512: b2db uxtb r3, r3 8005514: b29b uxth r3, r3 8005516: 4618 mov r0, r3 8005518: f7ff fc76 bl 8004e08 LCD_WR_REG(lcddev.setycmd); 800551c: 4b33 ldr r3, [pc, #204] ; (80055ec ) 800551e: 7a5b ldrb r3, [r3, #9] 8005520: b29b uxth r3, r3 8005522: 4618 mov r0, r3 8005524: f7ff fc62 bl 8004dec LCD_WR_DATA(Ypos>>8); 8005528: 88bb ldrh r3, [r7, #4] 800552a: 0a1b lsrs r3, r3, #8 800552c: b29b uxth r3, r3 800552e: 4618 mov r0, r3 8005530: f7ff fc6a bl 8004e08 LCD_WR_DATA(Ypos&0XFF); 8005534: 88bb ldrh r3, [r7, #4] 8005536: b2db uxtb r3, r3 8005538: b29b uxth r3, r3 800553a: 4618 mov r0, r3 800553c: f7ff fc64 bl 8004e08 { if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//ºáÆÁÆäʵ¾ÍÊǵ÷תx,y×ø±ê LCD_WriteReg(lcddev.setxcmd, Xpos); LCD_WriteReg(lcddev.setycmd, Ypos); } } 8005540: e050 b.n 80055e4 }else if(lcddev.id==0X6804) 8005542: 4b2a ldr r3, [pc, #168] ; (80055ec ) 8005544: 889b ldrh r3, [r3, #4] 8005546: f646 0204 movw r2, #26628 ; 0x6804 800554a: 4293 cmp r3, r2 800554c: d12f bne.n 80055ae if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//ºáÆÁʱ´¦Àí 800554e: 4b27 ldr r3, [pc, #156] ; (80055ec ) 8005550: 799b ldrb r3, [r3, #6] 8005552: 2b01 cmp r3, #1 8005554: d106 bne.n 8005564 8005556: 4b25 ldr r3, [pc, #148] ; (80055ec ) 8005558: 881a ldrh r2, [r3, #0] 800555a: 88fb ldrh r3, [r7, #6] 800555c: 1ad3 subs r3, r2, r3 800555e: b29b uxth r3, r3 8005560: 3b01 subs r3, #1 8005562: 80fb strh r3, [r7, #6] LCD_WR_REG(lcddev.setxcmd); 8005564: 4b21 ldr r3, [pc, #132] ; (80055ec ) 8005566: 7a1b ldrb r3, [r3, #8] 8005568: b29b uxth r3, r3 800556a: 4618 mov r0, r3 800556c: f7ff fc3e bl 8004dec LCD_WR_DATA(Xpos>>8); 8005570: 88fb ldrh r3, [r7, #6] 8005572: 0a1b lsrs r3, r3, #8 8005574: b29b uxth r3, r3 8005576: 4618 mov r0, r3 8005578: f7ff fc46 bl 8004e08 LCD_WR_DATA(Xpos&0XFF); 800557c: 88fb ldrh r3, [r7, #6] 800557e: b2db uxtb r3, r3 8005580: b29b uxth r3, r3 8005582: 4618 mov r0, r3 8005584: f7ff fc40 bl 8004e08 LCD_WR_REG(lcddev.setycmd); 8005588: 4b18 ldr r3, [pc, #96] ; (80055ec ) 800558a: 7a5b ldrb r3, [r3, #9] 800558c: b29b uxth r3, r3 800558e: 4618 mov r0, r3 8005590: f7ff fc2c bl 8004dec LCD_WR_DATA(Ypos>>8); 8005594: 88bb ldrh r3, [r7, #4] 8005596: 0a1b lsrs r3, r3, #8 8005598: b29b uxth r3, r3 800559a: 4618 mov r0, r3 800559c: f7ff fc34 bl 8004e08 LCD_WR_DATA(Ypos&0XFF); 80055a0: 88bb ldrh r3, [r7, #4] 80055a2: b2db uxtb r3, r3 80055a4: b29b uxth r3, r3 80055a6: 4618 mov r0, r3 80055a8: f7ff fc2e bl 8004e08 } 80055ac: e01a b.n 80055e4 if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//ºáÆÁÆäʵ¾ÍÊǵ÷תx,y×ø±ê 80055ae: 4b0f ldr r3, [pc, #60] ; (80055ec ) 80055b0: 799b ldrb r3, [r3, #6] 80055b2: 2b01 cmp r3, #1 80055b4: d106 bne.n 80055c4 80055b6: 4b0d ldr r3, [pc, #52] ; (80055ec ) 80055b8: 881a ldrh r2, [r3, #0] 80055ba: 88fb ldrh r3, [r7, #6] 80055bc: 1ad3 subs r3, r2, r3 80055be: b29b uxth r3, r3 80055c0: 3b01 subs r3, #1 80055c2: 80fb strh r3, [r7, #6] LCD_WriteReg(lcddev.setxcmd, Xpos); 80055c4: 4b09 ldr r3, [pc, #36] ; (80055ec ) 80055c6: 7a1b ldrb r3, [r3, #8] 80055c8: b29b uxth r3, r3 80055ca: 88fa ldrh r2, [r7, #6] 80055cc: 4611 mov r1, r2 80055ce: 4618 mov r0, r3 80055d0: f7ff fc2a bl 8004e28 LCD_WriteReg(lcddev.setycmd, Ypos); 80055d4: 4b05 ldr r3, [pc, #20] ; (80055ec ) 80055d6: 7a5b ldrb r3, [r3, #9] 80055d8: b29b uxth r3, r3 80055da: 88ba ldrh r2, [r7, #4] 80055dc: 4611 mov r1, r2 80055de: 4618 mov r0, r3 80055e0: f7ff fc22 bl 8004e28 } 80055e4: bf00 nop 80055e6: 3708 adds r7, #8 80055e8: 46bd mov sp, r7 80055ea: bd80 pop {r7, pc} 80055ec: 20000380 .word 0x20000380 080055f0 : } //»­µã //x,y:×ø±ê //POINT_COLOR:´ËµãµÄÑÕÉ« void LCD_set_dot(uint16_t x,uint16_t y,uint16_t color) { 80055f0: b580 push {r7, lr} 80055f2: b082 sub sp, #8 80055f4: af00 add r7, sp, #0 80055f6: 4603 mov r3, r0 80055f8: 80fb strh r3, [r7, #6] 80055fa: 460b mov r3, r1 80055fc: 80bb strh r3, [r7, #4] 80055fe: 4613 mov r3, r2 8005600: 807b strh r3, [r7, #2] LCD_SetCursor(x,y); //ÉèÖùâ±êλÖà 8005602: 88ba ldrh r2, [r7, #4] 8005604: 88fb ldrh r3, [r7, #6] 8005606: 4611 mov r1, r2 8005608: 4618 mov r0, r3 800560a: f7ff ff61 bl 80054d0 LCD_REG_ADDRESS=lcddev.wramcmd; //¿ªÊ¼Ð´ÈëGRAM 800560e: 4b06 ldr r3, [pc, #24] ; (8005628 ) 8005610: 79da ldrb r2, [r3, #7] 8005612: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000 8005616: b292 uxth r2, r2 8005618: 801a strh r2, [r3, #0] LCD_DATA_ADDRESS=color; 800561a: 4a04 ldr r2, [pc, #16] ; (800562c ) 800561c: 887b ldrh r3, [r7, #2] 800561e: 8013 strh r3, [r2, #0] } 8005620: bf00 nop 8005622: 3708 adds r7, #8 8005624: 46bd mov sp, r7 8005626: bd80 pop {r7, pc} 8005628: 20000380 .word 0x20000380 800562c: 6c000800 .word 0x6c000800 08005630 : //ÇåÆÁº¯Êý //color:ÒªÇåÆÁµÄÌî³äÉ« void LCD_Clear(uint16_t color) { 8005630: b580 push {r7, lr} 8005632: b084 sub sp, #16 8005634: af00 add r7, sp, #0 8005636: 4603 mov r3, r0 8005638: 80fb strh r3, [r7, #6] uint32_t index=0; 800563a: 2300 movs r3, #0 800563c: 60fb str r3, [r7, #12] uint32_t totalpoint=lcddev.width; 800563e: 4b23 ldr r3, [pc, #140] ; (80056cc ) 8005640: 881b ldrh r3, [r3, #0] 8005642: 60bb str r3, [r7, #8] totalpoint*=lcddev.height; //µÃµ½×ܵãÊý 8005644: 4b21 ldr r3, [pc, #132] ; (80056cc ) 8005646: 885b ldrh r3, [r3, #2] 8005648: 461a mov r2, r3 800564a: 68bb ldr r3, [r7, #8] 800564c: fb02 f303 mul.w r3, r2, r3 8005650: 60bb str r3, [r7, #8] if((lcddev.id==0X6804)&&(lcddev.dir==1))//6804ºáÆÁµÄʱºòÌØÊâ´¦Àí 8005652: 4b1e ldr r3, [pc, #120] ; (80056cc ) 8005654: 889b ldrh r3, [r3, #4] 8005656: f646 0204 movw r2, #26628 ; 0x6804 800565a: 4293 cmp r3, r2 800565c: d11a bne.n 8005694 800565e: 4b1b ldr r3, [pc, #108] ; (80056cc ) 8005660: 799b ldrb r3, [r3, #6] 8005662: 2b01 cmp r3, #1 8005664: d116 bne.n 8005694 { lcddev.dir=0; 8005666: 4b19 ldr r3, [pc, #100] ; (80056cc ) 8005668: 2200 movs r2, #0 800566a: 719a strb r2, [r3, #6] lcddev.setxcmd=0X2A; 800566c: 4b17 ldr r3, [pc, #92] ; (80056cc ) 800566e: 222a movs r2, #42 ; 0x2a 8005670: 721a strb r2, [r3, #8] lcddev.setycmd=0X2B; 8005672: 4b16 ldr r3, [pc, #88] ; (80056cc ) 8005674: 222b movs r2, #43 ; 0x2b 8005676: 725a strb r2, [r3, #9] LCD_SetCursor(0x00,0x0000); //ÉèÖùâ±êλÖà 8005678: 2100 movs r1, #0 800567a: 2000 movs r0, #0 800567c: f7ff ff28 bl 80054d0 lcddev.dir=1; 8005680: 4b12 ldr r3, [pc, #72] ; (80056cc ) 8005682: 2201 movs r2, #1 8005684: 719a strb r2, [r3, #6] lcddev.setxcmd=0X2B; 8005686: 4b11 ldr r3, [pc, #68] ; (80056cc ) 8005688: 222b movs r2, #43 ; 0x2b 800568a: 721a strb r2, [r3, #8] lcddev.setycmd=0X2A; 800568c: 4b0f ldr r3, [pc, #60] ; (80056cc ) 800568e: 222a movs r2, #42 ; 0x2a 8005690: 725a strb r2, [r3, #9] 8005692: e003 b.n 800569c }else LCD_SetCursor(0x00,0x0000); //ÉèÖùâ±êλÖà 8005694: 2100 movs r1, #0 8005696: 2000 movs r0, #0 8005698: f7ff ff1a bl 80054d0 LCD_REG_ADDRESS=lcddev.wramcmd; //¿ªÊ¼Ð´ÈëGRAM 800569c: 4b0b ldr r3, [pc, #44] ; (80056cc ) 800569e: 79da ldrb r2, [r3, #7] 80056a0: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000 80056a4: b292 uxth r2, r2 80056a6: 801a strh r2, [r3, #0] for(index=0;index { LCD_DATA_ADDRESS=color; 80056ae: 4a08 ldr r2, [pc, #32] ; (80056d0 ) 80056b0: 88fb ldrh r3, [r7, #6] 80056b2: 8013 strh r3, [r2, #0] for(index=0;index } } 80056c2: bf00 nop 80056c4: bf00 nop 80056c6: 3710 adds r7, #16 80056c8: 46bd mov sp, r7 80056ca: bd80 pop {r7, pc} 80056cc: 20000380 .word 0x20000380 80056d0: 6c000800 .word 0x6c000800 080056d4 : //***********************************2D //»­Ïß //x1,y1:Æðµã×ø±ê //x2,y2:ÖÕµã×ø±ê void LCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2,uint16_t color) { 80056d4: b590 push {r4, r7, lr} 80056d6: b08d sub sp, #52 ; 0x34 80056d8: af00 add r7, sp, #0 80056da: 4604 mov r4, r0 80056dc: 4608 mov r0, r1 80056de: 4611 mov r1, r2 80056e0: 461a mov r2, r3 80056e2: 4623 mov r3, r4 80056e4: 80fb strh r3, [r7, #6] 80056e6: 4603 mov r3, r0 80056e8: 80bb strh r3, [r7, #4] 80056ea: 460b mov r3, r1 80056ec: 807b strh r3, [r7, #2] 80056ee: 4613 mov r3, r2 80056f0: 803b strh r3, [r7, #0] uint16_t t; int xerr=0,yerr=0,delta_x,delta_y,distance; 80056f2: 2300 movs r3, #0 80056f4: 62bb str r3, [r7, #40] ; 0x28 80056f6: 2300 movs r3, #0 80056f8: 627b str r3, [r7, #36] ; 0x24 int incx,incy,uRow,uCol; delta_x=x2-x1; //¼ÆËã×ø±êÔöÁ¿ 80056fa: 887a ldrh r2, [r7, #2] 80056fc: 88fb ldrh r3, [r7, #6] 80056fe: 1ad3 subs r3, r2, r3 8005700: 623b str r3, [r7, #32] delta_y=y2-y1; 8005702: 883a ldrh r2, [r7, #0] 8005704: 88bb ldrh r3, [r7, #4] 8005706: 1ad3 subs r3, r2, r3 8005708: 61fb str r3, [r7, #28] uRow=x1; 800570a: 88fb ldrh r3, [r7, #6] 800570c: 60fb str r3, [r7, #12] uCol=y1; 800570e: 88bb ldrh r3, [r7, #4] 8005710: 60bb str r3, [r7, #8] if(delta_x>0)incx=1; //ÉèÖõ¥²½·½Ïò 8005712: 6a3b ldr r3, [r7, #32] 8005714: 2b00 cmp r3, #0 8005716: dd02 ble.n 800571e 8005718: 2301 movs r3, #1 800571a: 617b str r3, [r7, #20] 800571c: e00b b.n 8005736 else if(delta_x==0)incx=0;//´¹Ö±Ïß 800571e: 6a3b ldr r3, [r7, #32] 8005720: 2b00 cmp r3, #0 8005722: d102 bne.n 800572a 8005724: 2300 movs r3, #0 8005726: 617b str r3, [r7, #20] 8005728: e005 b.n 8005736 else {incx=-1;delta_x=-delta_x;} 800572a: f04f 33ff mov.w r3, #4294967295 800572e: 617b str r3, [r7, #20] 8005730: 6a3b ldr r3, [r7, #32] 8005732: 425b negs r3, r3 8005734: 623b str r3, [r7, #32] if(delta_y>0)incy=1; 8005736: 69fb ldr r3, [r7, #28] 8005738: 2b00 cmp r3, #0 800573a: dd02 ble.n 8005742 800573c: 2301 movs r3, #1 800573e: 613b str r3, [r7, #16] 8005740: e00b b.n 800575a else if(delta_y==0)incy=0;//ˮƽÏß 8005742: 69fb ldr r3, [r7, #28] 8005744: 2b00 cmp r3, #0 8005746: d102 bne.n 800574e 8005748: 2300 movs r3, #0 800574a: 613b str r3, [r7, #16] 800574c: e005 b.n 800575a else{incy=-1;delta_y=-delta_y;} 800574e: f04f 33ff mov.w r3, #4294967295 8005752: 613b str r3, [r7, #16] 8005754: 69fb ldr r3, [r7, #28] 8005756: 425b negs r3, r3 8005758: 61fb str r3, [r7, #28] if( delta_x>delta_y)distance=delta_x; //Ñ¡È¡»ù±¾ÔöÁ¿×ø±êÖá 800575a: 6a3a ldr r2, [r7, #32] 800575c: 69fb ldr r3, [r7, #28] 800575e: 429a cmp r2, r3 8005760: dd02 ble.n 8005768 8005762: 6a3b ldr r3, [r7, #32] 8005764: 61bb str r3, [r7, #24] 8005766: e001 b.n 800576c else distance=delta_y; 8005768: 69fb ldr r3, [r7, #28] 800576a: 61bb str r3, [r7, #24] for(t=0;t<=distance+1;t++ )//»­ÏßÊä³ö 800576c: 2300 movs r3, #0 800576e: 85fb strh r3, [r7, #46] ; 0x2e 8005770: e02b b.n 80057ca { LCD_set_dot(uRow,uCol,color);//»­µã 8005772: 68fb ldr r3, [r7, #12] 8005774: b29b uxth r3, r3 8005776: 68ba ldr r2, [r7, #8] 8005778: b291 uxth r1, r2 800577a: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40 800577e: 4618 mov r0, r3 8005780: f7ff ff36 bl 80055f0 xerr+=delta_x ; 8005784: 6aba ldr r2, [r7, #40] ; 0x28 8005786: 6a3b ldr r3, [r7, #32] 8005788: 4413 add r3, r2 800578a: 62bb str r3, [r7, #40] ; 0x28 yerr+=delta_y ; 800578c: 6a7a ldr r2, [r7, #36] ; 0x24 800578e: 69fb ldr r3, [r7, #28] 8005790: 4413 add r3, r2 8005792: 627b str r3, [r7, #36] ; 0x24 if(xerr>distance) 8005794: 6aba ldr r2, [r7, #40] ; 0x28 8005796: 69bb ldr r3, [r7, #24] 8005798: 429a cmp r2, r3 800579a: dd07 ble.n 80057ac { xerr-=distance; 800579c: 6aba ldr r2, [r7, #40] ; 0x28 800579e: 69bb ldr r3, [r7, #24] 80057a0: 1ad3 subs r3, r2, r3 80057a2: 62bb str r3, [r7, #40] ; 0x28 uRow+=incx; 80057a4: 68fa ldr r2, [r7, #12] 80057a6: 697b ldr r3, [r7, #20] 80057a8: 4413 add r3, r2 80057aa: 60fb str r3, [r7, #12] } if(yerr>distance) 80057ac: 6a7a ldr r2, [r7, #36] ; 0x24 80057ae: 69bb ldr r3, [r7, #24] 80057b0: 429a cmp r2, r3 80057b2: dd07 ble.n 80057c4 { yerr-=distance; 80057b4: 6a7a ldr r2, [r7, #36] ; 0x24 80057b6: 69bb ldr r3, [r7, #24] 80057b8: 1ad3 subs r3, r2, r3 80057ba: 627b str r3, [r7, #36] ; 0x24 uCol+=incy; 80057bc: 68ba ldr r2, [r7, #8] 80057be: 693b ldr r3, [r7, #16] 80057c0: 4413 add r3, r2 80057c2: 60bb str r3, [r7, #8] for(t=0;t<=distance+1;t++ )//»­ÏßÊä³ö 80057c4: 8dfb ldrh r3, [r7, #46] ; 0x2e 80057c6: 3301 adds r3, #1 80057c8: 85fb strh r3, [r7, #46] ; 0x2e 80057ca: 8dfa ldrh r2, [r7, #46] ; 0x2e 80057cc: 69bb ldr r3, [r7, #24] 80057ce: 3301 adds r3, #1 80057d0: 429a cmp r2, r3 80057d2: ddce ble.n 8005772 } } } 80057d4: bf00 nop 80057d6: bf00 nop 80057d8: 3734 adds r7, #52 ; 0x34 80057da: 46bd mov sp, r7 80057dc: bd90 pop {r4, r7, pc} 080057de : //ÔÚÖ¸¶¨Î»Öû­Ò»¸öÖ¸¶¨´óСµÄÔ² //(x,y):ÖÐÐĵã //r :°ë¾¶ void Draw_Circle(uint16_t x0,uint16_t y0,uint16_t r,uint16_t color) { 80057de: b590 push {r4, r7, lr} 80057e0: b087 sub sp, #28 80057e2: af00 add r7, sp, #0 80057e4: 4604 mov r4, r0 80057e6: 4608 mov r0, r1 80057e8: 4611 mov r1, r2 80057ea: 461a mov r2, r3 80057ec: 4623 mov r3, r4 80057ee: 80fb strh r3, [r7, #6] 80057f0: 4603 mov r3, r0 80057f2: 80bb strh r3, [r7, #4] 80057f4: 460b mov r3, r1 80057f6: 807b strh r3, [r7, #2] 80057f8: 4613 mov r3, r2 80057fa: 803b strh r3, [r7, #0] int a,b; int di; a=0;b=r; 80057fc: 2300 movs r3, #0 80057fe: 617b str r3, [r7, #20] 8005800: 887b ldrh r3, [r7, #2] 8005802: 613b str r3, [r7, #16] di=3-(r<<1); //ÅжÏϸöµãλÖõıêÖ¾ 8005804: 887b ldrh r3, [r7, #2] 8005806: 005b lsls r3, r3, #1 8005808: f1c3 0303 rsb r3, r3, #3 800580c: 60fb str r3, [r7, #12] while(a<=b) 800580e: e087 b.n 8005920 { LCD_set_dot(x0+a,y0-b,color); //5 8005810: 697b ldr r3, [r7, #20] 8005812: b29a uxth r2, r3 8005814: 88fb ldrh r3, [r7, #6] 8005816: 4413 add r3, r2 8005818: b298 uxth r0, r3 800581a: 693b ldr r3, [r7, #16] 800581c: b29b uxth r3, r3 800581e: 88ba ldrh r2, [r7, #4] 8005820: 1ad3 subs r3, r2, r3 8005822: b29b uxth r3, r3 8005824: 883a ldrh r2, [r7, #0] 8005826: 4619 mov r1, r3 8005828: f7ff fee2 bl 80055f0 LCD_set_dot(x0+b,y0-a,color); //0 800582c: 693b ldr r3, [r7, #16] 800582e: b29a uxth r2, r3 8005830: 88fb ldrh r3, [r7, #6] 8005832: 4413 add r3, r2 8005834: b298 uxth r0, r3 8005836: 697b ldr r3, [r7, #20] 8005838: b29b uxth r3, r3 800583a: 88ba ldrh r2, [r7, #4] 800583c: 1ad3 subs r3, r2, r3 800583e: b29b uxth r3, r3 8005840: 883a ldrh r2, [r7, #0] 8005842: 4619 mov r1, r3 8005844: f7ff fed4 bl 80055f0 LCD_set_dot(x0+b,y0+a,color); //4 8005848: 693b ldr r3, [r7, #16] 800584a: b29a uxth r2, r3 800584c: 88fb ldrh r3, [r7, #6] 800584e: 4413 add r3, r2 8005850: b298 uxth r0, r3 8005852: 697b ldr r3, [r7, #20] 8005854: b29a uxth r2, r3 8005856: 88bb ldrh r3, [r7, #4] 8005858: 4413 add r3, r2 800585a: b29b uxth r3, r3 800585c: 883a ldrh r2, [r7, #0] 800585e: 4619 mov r1, r3 8005860: f7ff fec6 bl 80055f0 LCD_set_dot(x0+a,y0+b,color); //6 8005864: 697b ldr r3, [r7, #20] 8005866: b29a uxth r2, r3 8005868: 88fb ldrh r3, [r7, #6] 800586a: 4413 add r3, r2 800586c: b298 uxth r0, r3 800586e: 693b ldr r3, [r7, #16] 8005870: b29a uxth r2, r3 8005872: 88bb ldrh r3, [r7, #4] 8005874: 4413 add r3, r2 8005876: b29b uxth r3, r3 8005878: 883a ldrh r2, [r7, #0] 800587a: 4619 mov r1, r3 800587c: f7ff feb8 bl 80055f0 LCD_set_dot(x0-a,y0+b,color); //1 8005880: 697b ldr r3, [r7, #20] 8005882: b29b uxth r3, r3 8005884: 88fa ldrh r2, [r7, #6] 8005886: 1ad3 subs r3, r2, r3 8005888: b298 uxth r0, r3 800588a: 693b ldr r3, [r7, #16] 800588c: b29a uxth r2, r3 800588e: 88bb ldrh r3, [r7, #4] 8005890: 4413 add r3, r2 8005892: b29b uxth r3, r3 8005894: 883a ldrh r2, [r7, #0] 8005896: 4619 mov r1, r3 8005898: f7ff feaa bl 80055f0 LCD_set_dot(x0-b,y0+a,color); 800589c: 693b ldr r3, [r7, #16] 800589e: b29b uxth r3, r3 80058a0: 88fa ldrh r2, [r7, #6] 80058a2: 1ad3 subs r3, r2, r3 80058a4: b298 uxth r0, r3 80058a6: 697b ldr r3, [r7, #20] 80058a8: b29a uxth r2, r3 80058aa: 88bb ldrh r3, [r7, #4] 80058ac: 4413 add r3, r2 80058ae: b29b uxth r3, r3 80058b0: 883a ldrh r2, [r7, #0] 80058b2: 4619 mov r1, r3 80058b4: f7ff fe9c bl 80055f0 LCD_set_dot(x0-a,y0-b,color); //2 80058b8: 697b ldr r3, [r7, #20] 80058ba: b29b uxth r3, r3 80058bc: 88fa ldrh r2, [r7, #6] 80058be: 1ad3 subs r3, r2, r3 80058c0: b298 uxth r0, r3 80058c2: 693b ldr r3, [r7, #16] 80058c4: b29b uxth r3, r3 80058c6: 88ba ldrh r2, [r7, #4] 80058c8: 1ad3 subs r3, r2, r3 80058ca: b29b uxth r3, r3 80058cc: 883a ldrh r2, [r7, #0] 80058ce: 4619 mov r1, r3 80058d0: f7ff fe8e bl 80055f0 LCD_set_dot(x0-b,y0-a,color); //7 80058d4: 693b ldr r3, [r7, #16] 80058d6: b29b uxth r3, r3 80058d8: 88fa ldrh r2, [r7, #6] 80058da: 1ad3 subs r3, r2, r3 80058dc: b298 uxth r0, r3 80058de: 697b ldr r3, [r7, #20] 80058e0: b29b uxth r3, r3 80058e2: 88ba ldrh r2, [r7, #4] 80058e4: 1ad3 subs r3, r2, r3 80058e6: b29b uxth r3, r3 80058e8: 883a ldrh r2, [r7, #0] 80058ea: 4619 mov r1, r3 80058ec: f7ff fe80 bl 80055f0 a++; 80058f0: 697b ldr r3, [r7, #20] 80058f2: 3301 adds r3, #1 80058f4: 617b str r3, [r7, #20] //ʹÓÃBresenhamËã·¨»­Ô² if(di<0)di +=4*a+6; 80058f6: 68fb ldr r3, [r7, #12] 80058f8: 2b00 cmp r3, #0 80058fa: da06 bge.n 800590a 80058fc: 697b ldr r3, [r7, #20] 80058fe: 009b lsls r3, r3, #2 8005900: 3306 adds r3, #6 8005902: 68fa ldr r2, [r7, #12] 8005904: 4413 add r3, r2 8005906: 60fb str r3, [r7, #12] 8005908: e00a b.n 8005920 else { di+=10+4*(a-b); 800590a: 697a ldr r2, [r7, #20] 800590c: 693b ldr r3, [r7, #16] 800590e: 1ad3 subs r3, r2, r3 8005910: 009b lsls r3, r3, #2 8005912: 330a adds r3, #10 8005914: 68fa ldr r2, [r7, #12] 8005916: 4413 add r3, r2 8005918: 60fb str r3, [r7, #12] b--; 800591a: 693b ldr r3, [r7, #16] 800591c: 3b01 subs r3, #1 800591e: 613b str r3, [r7, #16] while(a<=b) 8005920: 697a ldr r2, [r7, #20] 8005922: 693b ldr r3, [r7, #16] 8005924: 429a cmp r2, r3 8005926: f77f af73 ble.w 8005810 } } } 800592a: bf00 nop 800592c: bf00 nop 800592e: 371c adds r7, #28 8005930: 46bd mov sp, r7 8005932: bd90 pop {r4, r7, pc} 08005934 : //num:ÒªÏÔʾµÄ×Ö·û:" "--->"~" //size:×ÖÌå´óС 12/16 //mode:µþ¼Ó·½Ê½(1)»¹ÊǷǵþ¼Ó·½Ê½(0) void LCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint16_t bg,uint16_t color) { 8005934: b590 push {r4, r7, lr} 8005936: b085 sub sp, #20 8005938: af00 add r7, sp, #0 800593a: 4604 mov r4, r0 800593c: 4608 mov r0, r1 800593e: 4611 mov r1, r2 8005940: 461a mov r2, r3 8005942: 4623 mov r3, r4 8005944: 80fb strh r3, [r7, #6] 8005946: 4603 mov r3, r0 8005948: 80bb strh r3, [r7, #4] 800594a: 460b mov r3, r1 800594c: 70fb strb r3, [r7, #3] 800594e: 4613 mov r3, r2 8005950: 70bb strb r3, [r7, #2] uint8_t temp,t1,t; uint16_t y0=y; 8005952: 88bb ldrh r3, [r7, #4] 8005954: 817b strh r3, [r7, #10] //ÉèÖô°¿Ú num=num-' ';//µÃµ½Æ«ÒƺóµÄÖµ 8005956: 78fb ldrb r3, [r7, #3] 8005958: 3b20 subs r3, #32 800595a: 70fb strb r3, [r7, #3] for(t=0;t { if(size==12){temp=asc2_1206[num][t];} //µ÷ÓÃ1206×ÖÌå 8005962: 78bb ldrb r3, [r7, #2] 8005964: 2b0c cmp r3, #12 8005966: d10b bne.n 8005980 8005968: 78fa ldrb r2, [r7, #3] 800596a: 7b79 ldrb r1, [r7, #13] 800596c: 482c ldr r0, [pc, #176] ; (8005a20 ) 800596e: 4613 mov r3, r2 8005970: 005b lsls r3, r3, #1 8005972: 4413 add r3, r2 8005974: 009b lsls r3, r3, #2 8005976: 4403 add r3, r0 8005978: 440b add r3, r1 800597a: 781b ldrb r3, [r3, #0] 800597c: 73fb strb r3, [r7, #15] 800597e: e007 b.n 8005990 else{ temp=asc2_1608[num][t]; } //µ÷ÓÃ1608×ÖÌå 8005980: 78fa ldrb r2, [r7, #3] 8005982: 7b7b ldrb r3, [r7, #13] 8005984: 4927 ldr r1, [pc, #156] ; (8005a24 ) 8005986: 0112 lsls r2, r2, #4 8005988: 440a add r2, r1 800598a: 4413 add r3, r2 800598c: 781b ldrb r3, [r3, #0] 800598e: 73fb strb r3, [r7, #15] for(t1=0;t1<8;t1++) 8005990: 2300 movs r3, #0 8005992: 73bb strb r3, [r7, #14] 8005994: e033 b.n 80059fe { if(temp&0x80){LCD_set_dot(x,y,color);}else{if(bg!=color){LCD_set_dot(x,y,bg);}} 8005996: f997 300f ldrsb.w r3, [r7, #15] 800599a: 2b00 cmp r3, #0 800599c: da06 bge.n 80059ac 800599e: 8cba ldrh r2, [r7, #36] ; 0x24 80059a0: 88b9 ldrh r1, [r7, #4] 80059a2: 88fb ldrh r3, [r7, #6] 80059a4: 4618 mov r0, r3 80059a6: f7ff fe23 bl 80055f0 80059aa: e009 b.n 80059c0 80059ac: 8c3a ldrh r2, [r7, #32] 80059ae: 8cbb ldrh r3, [r7, #36] ; 0x24 80059b0: 429a cmp r2, r3 80059b2: d005 beq.n 80059c0 80059b4: 8c3a ldrh r2, [r7, #32] 80059b6: 88b9 ldrh r1, [r7, #4] 80059b8: 88fb ldrh r3, [r7, #6] 80059ba: 4618 mov r0, r3 80059bc: f7ff fe18 bl 80055f0 temp<<=1; 80059c0: 7bfb ldrb r3, [r7, #15] 80059c2: 005b lsls r3, r3, #1 80059c4: 73fb strb r3, [r7, #15] y++; 80059c6: 88bb ldrh r3, [r7, #4] 80059c8: 3301 adds r3, #1 80059ca: 80bb strh r3, [r7, #4] if(x>=lcddev.width){return;}//³¬ÇøÓòÁË 80059cc: 4b16 ldr r3, [pc, #88] ; (8005a28 ) 80059ce: 881b ldrh r3, [r3, #0] 80059d0: 88fa ldrh r2, [r7, #6] 80059d2: 429a cmp r2, r3 80059d4: d220 bcs.n 8005a18 if((y-y0)==size) 80059d6: 88ba ldrh r2, [r7, #4] 80059d8: 897b ldrh r3, [r7, #10] 80059da: 1ad2 subs r2, r2, r3 80059dc: 78bb ldrb r3, [r7, #2] 80059de: 429a cmp r2, r3 80059e0: d10a bne.n 80059f8 { y=y0; 80059e2: 897b ldrh r3, [r7, #10] 80059e4: 80bb strh r3, [r7, #4] x++; 80059e6: 88fb ldrh r3, [r7, #6] 80059e8: 3301 adds r3, #1 80059ea: 80fb strh r3, [r7, #6] if(x>=lcddev.width){return;}//³¬ÇøÓòÁË 80059ec: 4b0e ldr r3, [pc, #56] ; (8005a28 ) 80059ee: 881b ldrh r3, [r3, #0] 80059f0: 88fa ldrh r2, [r7, #6] 80059f2: 429a cmp r2, r3 80059f4: d307 bcc.n 8005a06 80059f6: e010 b.n 8005a1a for(t1=0;t1<8;t1++) 80059f8: 7bbb ldrb r3, [r7, #14] 80059fa: 3301 adds r3, #1 80059fc: 73bb strb r3, [r7, #14] 80059fe: 7bbb ldrb r3, [r7, #14] 8005a00: 2b07 cmp r3, #7 8005a02: d9c8 bls.n 8005996 8005a04: e000 b.n 8005a08 break; 8005a06: bf00 nop for(t=0;t 8005a16: e000 b.n 8005a1a if(x>=lcddev.width){return;}//³¬ÇøÓòÁË 8005a18: bf00 nop } } } 8005a1a: 3714 adds r7, #20 8005a1c: 46bd mov sp, r7 8005a1e: bd90 pop {r4, r7, pc} 8005a20: 0800a09c .word 0x0800a09c 8005a24: 0800a510 .word 0x0800a510 8005a28: 20000380 .word 0x20000380 08005a2c : //width,height:ÇøÓò´óС //size:×ÖÌå´óС //*p:×Ö·û´®ÆðʼµØÖ· void LCD_ShowString(uint16_t x,uint16_t y,uint8_t *p,uint8_t size,uint16_t bg,uint16_t color) { 8005a2c: b590 push {r4, r7, lr} 8005a2e: b087 sub sp, #28 8005a30: af02 add r7, sp, #8 8005a32: 60ba str r2, [r7, #8] 8005a34: 461a mov r2, r3 8005a36: 4603 mov r3, r0 8005a38: 81fb strh r3, [r7, #14] 8005a3a: 460b mov r3, r1 8005a3c: 81bb strh r3, [r7, #12] 8005a3e: 4613 mov r3, r2 8005a40: 71fb strb r3, [r7, #7] while(*p!='\0') 8005a42: e026 b.n 8005a92 { if(x>=lcddev.width||*p=='\n') 8005a44: 4b17 ldr r3, [pc, #92] ; (8005aa4 ) 8005a46: 881b ldrh r3, [r3, #0] 8005a48: 89fa ldrh r2, [r7, #14] 8005a4a: 429a cmp r2, r3 8005a4c: d203 bcs.n 8005a56 8005a4e: 68bb ldr r3, [r7, #8] 8005a50: 781b ldrb r3, [r3, #0] 8005a52: 2b0a cmp r3, #10 8005a54: d107 bne.n 8005a66 { x=0; 8005a56: 2300 movs r3, #0 8005a58: 81fb strh r3, [r7, #14] y+=size; 8005a5a: 79fb ldrb r3, [r7, #7] 8005a5c: b29a uxth r2, r3 8005a5e: 89bb ldrh r3, [r7, #12] 8005a60: 4413 add r3, r2 8005a62: 81bb strh r3, [r7, #12] 8005a64: e012 b.n 8005a8c }else { LCD_ShowChar(x,y,*p,size,bg,color); 8005a66: 68bb ldr r3, [r7, #8] 8005a68: 781a ldrb r2, [r3, #0] 8005a6a: 79fc ldrb r4, [r7, #7] 8005a6c: 89b9 ldrh r1, [r7, #12] 8005a6e: 89f8 ldrh r0, [r7, #14] 8005a70: 8cbb ldrh r3, [r7, #36] ; 0x24 8005a72: 9301 str r3, [sp, #4] 8005a74: 8c3b ldrh r3, [r7, #32] 8005a76: 9300 str r3, [sp, #0] 8005a78: 4623 mov r3, r4 8005a7a: f7ff ff5b bl 8005934 x+=(size/2); 8005a7e: 79fb ldrb r3, [r7, #7] 8005a80: 085b lsrs r3, r3, #1 8005a82: b2db uxtb r3, r3 8005a84: b29a uxth r2, r3 8005a86: 89fb ldrh r3, [r7, #14] 8005a88: 4413 add r3, r2 8005a8a: 81fb strh r3, [r7, #14] } p++; 8005a8c: 68bb ldr r3, [r7, #8] 8005a8e: 3301 adds r3, #1 8005a90: 60bb str r3, [r7, #8] while(*p!='\0') 8005a92: 68bb ldr r3, [r7, #8] 8005a94: 781b ldrb r3, [r3, #0] 8005a96: 2b00 cmp r3, #0 8005a98: d1d4 bne.n 8005a44 } } 8005a9a: bf00 nop 8005a9c: bf00 nop 8005a9e: 3714 adds r7, #20 8005aa0: 46bd mov sp, r7 8005aa2: bd90 pop {r4, r7, pc} 8005aa4: 20000380 .word 0x20000380 08005aa8 : #include "buzzer.h" struct notes *notes; void play_ones(uint16_t freq,uint8_t dutya) { 8005aa8: b590 push {r4, r7, lr} 8005aaa: b083 sub sp, #12 8005aac: af00 add r7, sp, #0 8005aae: 4603 mov r3, r0 8005ab0: 460a mov r2, r1 8005ab2: 80fb strh r3, [r7, #6] 8005ab4: 4613 mov r3, r2 8005ab6: 717b strb r3, [r7, #5] //¼Ä´æÆ÷д·¨ ÐèÒª¸ù¾Ýµ¥Æ¬»úµÄʱÖÓÀ´Ð´¡£ TIM4->ARR = (uint32_t)((72000000/freq)-1);TIM4->CCR3 = (uint32_t)(((72000000/freq)-1)*((float)dutya/100)); 8005ab8: 88fb ldrh r3, [r7, #6] 8005aba: 4a14 ldr r2, [pc, #80] ; (8005b0c ) 8005abc: fb92 f3f3 sdiv r3, r2, r3 8005ac0: 1e5a subs r2, r3, #1 8005ac2: 4b13 ldr r3, [pc, #76] ; (8005b10 ) 8005ac4: 62da str r2, [r3, #44] ; 0x2c 8005ac6: 88fb ldrh r3, [r7, #6] 8005ac8: 4a10 ldr r2, [pc, #64] ; (8005b0c ) 8005aca: fb92 f3f3 sdiv r3, r2, r3 8005ace: 3b01 subs r3, #1 8005ad0: 4618 mov r0, r3 8005ad2: f7fb f94f bl 8000d74 <__aeabi_i2f> 8005ad6: 4604 mov r4, r0 8005ad8: 797b ldrb r3, [r7, #5] 8005ada: 4618 mov r0, r3 8005adc: f7fb f946 bl 8000d6c <__aeabi_ui2f> 8005ae0: 4603 mov r3, r0 8005ae2: 490c ldr r1, [pc, #48] ; (8005b14 ) 8005ae4: 4618 mov r0, r3 8005ae6: f7fb fa4d bl 8000f84 <__aeabi_fdiv> 8005aea: 4603 mov r3, r0 8005aec: 4619 mov r1, r3 8005aee: 4620 mov r0, r4 8005af0: f7fb f994 bl 8000e1c <__aeabi_fmul> 8005af4: 4603 mov r3, r0 8005af6: 4c06 ldr r4, [pc, #24] ; (8005b10 ) 8005af8: 4618 mov r0, r3 8005afa: f7fb fb05 bl 8001108 <__aeabi_f2uiz> 8005afe: 4603 mov r3, r0 8005b00: 63e3 str r3, [r4, #60] ; 0x3c } 8005b02: bf00 nop 8005b04: 370c adds r7, #12 8005b06: 46bd mov sp, r7 8005b08: bd90 pop {r4, r7, pc} 8005b0a: bf00 nop 8005b0c: 044aa200 .word 0x044aa200 8005b10: 40000800 .word 0x40000800 8005b14: 42c80000 .word 0x42c80000 08005b18 : } } void delhead() //ɾ³ýµÚÒ»¸öÒô·û Ò»°ãÓû§²»ÐèÒªµ÷Óà { 8005b18: b580 push {r7, lr} 8005b1a: b082 sub sp, #8 8005b1c: af00 add r7, sp, #0 if (notes == NULL) 8005b1e: 4b11 ldr r3, [pc, #68] ; (8005b64 ) 8005b20: 681b ldr r3, [r3, #0] 8005b22: 2b00 cmp r3, #0 8005b24: d019 beq.n 8005b5a { return; } if (notes->next_note == NULL) 8005b26: 4b0f ldr r3, [pc, #60] ; (8005b64 ) 8005b28: 681b ldr r3, [r3, #0] 8005b2a: 689b ldr r3, [r3, #8] 8005b2c: 2b00 cmp r3, #0 8005b2e: d108 bne.n 8005b42 { free(notes); 8005b30: 4b0c ldr r3, [pc, #48] ; (8005b64 ) 8005b32: 681b ldr r3, [r3, #0] 8005b34: 4618 mov r0, r3 8005b36: f001 fbb9 bl 80072ac notes = NULL; 8005b3a: 4b0a ldr r3, [pc, #40] ; (8005b64 ) 8005b3c: 2200 movs r2, #0 8005b3e: 601a str r2, [r3, #0] 8005b40: e00c b.n 8005b5c } else { struct notes *t = notes; 8005b42: 4b08 ldr r3, [pc, #32] ; (8005b64 ) 8005b44: 681b ldr r3, [r3, #0] 8005b46: 607b str r3, [r7, #4] notes = notes->next_note; 8005b48: 4b06 ldr r3, [pc, #24] ; (8005b64 ) 8005b4a: 681b ldr r3, [r3, #0] 8005b4c: 689b ldr r3, [r3, #8] 8005b4e: 4a05 ldr r2, [pc, #20] ; (8005b64 ) 8005b50: 6013 str r3, [r2, #0] free(t); 8005b52: 6878 ldr r0, [r7, #4] 8005b54: f001 fbaa bl 80072ac 8005b58: e000 b.n 8005b5c return; 8005b5a: bf00 nop } } 8005b5c: 3708 adds r7, #8 8005b5e: 46bd mov sp, r7 8005b60: bd80 pop {r7, pc} 8005b62: bf00 nop 8005b64: 2000038c .word 0x2000038c 08005b68 : char buzzer_play_server() //·ÅÔÚÖ÷Ñ­»· Ö»ÓÐÓÐÒô·ûÌí¼Ó½øÀ´¾Í»á²¥·Å£¬²¥·ÅÍê×Ô¶¯ÊÍ·Å { 8005b68: b580 push {r7, lr} 8005b6a: af00 add r7, sp, #0 static char busy_flag=0; static uint32_t play_delay; if(notes == NULL) 8005b6c: 4b18 ldr r3, [pc, #96] ; (8005bd0 ) 8005b6e: 681b ldr r3, [r3, #0] 8005b70: 2b00 cmp r3, #0 8005b72: d029 beq.n 8005bc8 { //play_ones(0,0); }else { if(busy_flag==0) 8005b74: 4b17 ldr r3, [pc, #92] ; (8005bd4 ) 8005b76: 781b ldrb r3, [r3, #0] 8005b78: 2b00 cmp r3, #0 8005b7a: d115 bne.n 8005ba8 { busy_flag=1; 8005b7c: 4b15 ldr r3, [pc, #84] ; (8005bd4 ) 8005b7e: 2201 movs r2, #1 8005b80: 701a strb r2, [r3, #0] play_delay=HAL_GetTick()+notes->deley; 8005b82: f7fc f8eb bl 8001d5c 8005b86: 4602 mov r2, r0 8005b88: 4b11 ldr r3, [pc, #68] ; (8005bd0 ) 8005b8a: 681b ldr r3, [r3, #0] 8005b8c: 889b ldrh r3, [r3, #4] 8005b8e: 4413 add r3, r2 8005b90: 4a11 ldr r2, [pc, #68] ; (8005bd8 ) 8005b92: 6013 str r3, [r2, #0] play_ones(notes->freq,notes->duty); 8005b94: 4b0e ldr r3, [pc, #56] ; (8005bd0 ) 8005b96: 681b ldr r3, [r3, #0] 8005b98: 881a ldrh r2, [r3, #0] 8005b9a: 4b0d ldr r3, [pc, #52] ; (8005bd0 ) 8005b9c: 681b ldr r3, [r3, #0] 8005b9e: 789b ldrb r3, [r3, #2] 8005ba0: 4619 mov r1, r3 8005ba2: 4610 mov r0, r2 8005ba4: f7ff ff80 bl 8005aa8 } if(busy_flag==1) 8005ba8: 4b0a ldr r3, [pc, #40] ; (8005bd4 ) 8005baa: 781b ldrb r3, [r3, #0] 8005bac: 2b01 cmp r3, #1 8005bae: d10b bne.n 8005bc8 { if(HAL_GetTick()>play_delay) 8005bb0: f7fc f8d4 bl 8001d5c 8005bb4: 4602 mov r2, r0 8005bb6: 4b08 ldr r3, [pc, #32] ; (8005bd8 ) 8005bb8: 681b ldr r3, [r3, #0] 8005bba: 429a cmp r2, r3 8005bbc: d904 bls.n 8005bc8 { busy_flag=0; 8005bbe: 4b05 ldr r3, [pc, #20] ; (8005bd4 ) 8005bc0: 2200 movs r2, #0 8005bc2: 701a strb r2, [r3, #0] delhead(); 8005bc4: f7ff ffa8 bl 8005b18 } } return busy_flag; 8005bc8: 4b02 ldr r3, [pc, #8] ; (8005bd4 ) 8005bca: 781b ldrb r3, [r3, #0] } 8005bcc: 4618 mov r0, r3 8005bce: bd80 pop {r7, pc} 8005bd0: 2000038c .word 0x2000038c 8005bd4: 20000390 .word 0x20000390 8005bd8: 20000394 .word 0x20000394 08005bdc : //ÒòΪeepromоƬµÄдÈëËÙ¶ÈÓÐÏÞ£¬Ã¿Ð´ÈëÒ»¸ö×Ö·û¶¼ÐèÒªµÈ´ýÒ»¶Îʱ¼ä²ÅÄÜÍê³ÉдÈë //Õû¸öϵͳ²»¿ÉÄܵÈËüÒ»¸öµÄ£¬´«Í³µÄ½â¾ö·½·¨¿ÉÒÔʹÓö¨Ê±Æ÷ÖжϻòÕ߶àÏ߳̿ª±Ù×ÓÈÎÎñÔÚºǫ́±£´æ£¬ //ÕâÀïµÄ½â¾ö·½·¨ÊÇʹÓÃ״̬»ú£¬Í¨¹ýÒ»¸öÁ´±í½«Òª±£´æµÄÊý¾Ý´®ÆðÀ´£¬ÔÙͨ¹ý״̬ѭ»·Ò»¸ö¸ö±£´æ£¬±£´æÑÓʱµÈÓÚÑ­»·ÓÃʱ¡£ eeprom_write_buff_info eeprom_write_buffer; //´´½¨Á´±í void EPPROM_SLOWWRITE_INIT() //³õʼ»¯Á´±í { 8005bdc: b480 push {r7} 8005bde: af00 add r7, sp, #0 eeprom_write_buffer.buff=NULL; 8005be0: 4b0a ldr r3, [pc, #40] ; (8005c0c ) 8005be2: 2200 movs r2, #0 8005be4: 601a str r2, [r3, #0] eeprom_write_buffer.end=NULL; 8005be6: 4b09 ldr r3, [pc, #36] ; (8005c0c ) 8005be8: 2200 movs r2, #0 8005bea: 609a str r2, [r3, #8] eeprom_write_buffer.head=NULL; 8005bec: 4b07 ldr r3, [pc, #28] ; (8005c0c ) 8005bee: 2200 movs r2, #0 8005bf0: 605a str r2, [r3, #4] eeprom_write_buffer.save_timeout=5; //±ÜÃâ״̬»úÑ­»·¹ý¿ìµ¼Öµı£´æʧ°Ü£¬Õâ¸öÊÇ×îÉÙÑÓʱ¡££¨¸Ð¾õû±ØҪдÔÚÕâÀ̫ÀË·Ñ¿Õ¼äÁË£© 8005bf2: 4b06 ldr r3, [pc, #24] ; (8005c0c ) 8005bf4: 2205 movs r2, #5 8005bf6: 741a strb r2, [r3, #16] eeprom_write_buffer.save_busy=0; //×îСÑÓʱÄÚΪæ״̬ 8005bf8: 4a04 ldr r2, [pc, #16] ; (8005c0c ) 8005bfa: 7c53 ldrb r3, [r2, #17] 8005bfc: f36f 0300 bfc r3, #0, #1 8005c00: 7453 strb r3, [r2, #17] } 8005c02: bf00 nop 8005c04: 46bd mov sp, r7 8005c06: bc80 pop {r7} 8005c08: 4770 bx lr 8005c0a: bf00 nop 8005c0c: 20000398 .word 0x20000398 08005c10 : //Ñ­»·±£´æ·þÎñ£¬¼ì²éÁ´±íÍ·ÊÇ·ñÓÐÊý¾ÝÊÇ·ñæ¡£ void EEPROM_SLOWWRITE_SERVER() { 8005c10: b580 push {r7, lr} 8005c12: b082 sub sp, #8 8005c14: af00 add r7, sp, #0 eeprom_write_buff *buff; char data; if(eeprom_write_buffer.save_busy) 8005c16: 4b20 ldr r3, [pc, #128] ; (8005c98 ) 8005c18: 7c5b ldrb r3, [r3, #17] 8005c1a: f003 0301 and.w r3, r3, #1 8005c1e: b2db uxtb r3, r3 8005c20: 2b00 cmp r3, #0 8005c22: d00c beq.n 8005c3e { if(HAL_GetTick()>eeprom_write_buffer.save_time) 8005c24: f7fc f89a bl 8001d5c 8005c28: 4602 mov r2, r0 8005c2a: 4b1b ldr r3, [pc, #108] ; (8005c98 ) 8005c2c: 68db ldr r3, [r3, #12] 8005c2e: 429a cmp r2, r3 8005c30: d92e bls.n 8005c90 { eeprom_write_buffer.save_busy=0; 8005c32: 4a19 ldr r2, [pc, #100] ; (8005c98 ) 8005c34: 7c53 ldrb r3, [r2, #17] 8005c36: f36f 0300 bfc r3, #0, #1 8005c3a: 7453 strb r3, [r2, #17] free(eeprom_write_buffer.head); eeprom_write_buffer.head=buff; } } } 8005c3c: e028 b.n 8005c90 if(eeprom_write_buffer.head!=NULL) 8005c3e: 4b16 ldr r3, [pc, #88] ; (8005c98 ) 8005c40: 685b ldr r3, [r3, #4] 8005c42: 2b00 cmp r3, #0 8005c44: d024 beq.n 8005c90 eeprom_write_buffer.save_busy=1; 8005c46: 4a14 ldr r2, [pc, #80] ; (8005c98 ) 8005c48: 7c53 ldrb r3, [r2, #17] 8005c4a: f043 0301 orr.w r3, r3, #1 8005c4e: 7453 strb r3, [r2, #17] eeprom_write_buffer.save_time=HAL_GetTick()+eeprom_write_buffer.save_timeout; 8005c50: f7fc f884 bl 8001d5c 8005c54: 4603 mov r3, r0 8005c56: 4a10 ldr r2, [pc, #64] ; (8005c98 ) 8005c58: 7c12 ldrb r2, [r2, #16] 8005c5a: 4413 add r3, r2 8005c5c: 4a0e ldr r2, [pc, #56] ; (8005c98 ) 8005c5e: 60d3 str r3, [r2, #12] buff=eeprom_write_buffer.head->next; 8005c60: 4b0d ldr r3, [pc, #52] ; (8005c98 ) 8005c62: 685b ldr r3, [r3, #4] 8005c64: 681b ldr r3, [r3, #0] 8005c66: 607b str r3, [r7, #4] data=eeprom_write_buffer.head->date; 8005c68: 4b0b ldr r3, [pc, #44] ; (8005c98 ) 8005c6a: 685b ldr r3, [r3, #4] 8005c6c: 799b ldrb r3, [r3, #6] 8005c6e: 70fb strb r3, [r7, #3] IIC_SAND_DATE(EEPROM_ADDRESS,eeprom_write_buffer.head->add,&data,1); 8005c70: 4b09 ldr r3, [pc, #36] ; (8005c98 ) 8005c72: 685b ldr r3, [r3, #4] 8005c74: 8899 ldrh r1, [r3, #4] 8005c76: 1cfa adds r2, r7, #3 8005c78: 2301 movs r3, #1 8005c7a: 20a0 movs r0, #160 ; 0xa0 8005c7c: f000 f866 bl 8005d4c free(eeprom_write_buffer.head); 8005c80: 4b05 ldr r3, [pc, #20] ; (8005c98 ) 8005c82: 685b ldr r3, [r3, #4] 8005c84: 4618 mov r0, r3 8005c86: f001 fb11 bl 80072ac eeprom_write_buffer.head=buff; 8005c8a: 4a03 ldr r2, [pc, #12] ; (8005c98 ) 8005c8c: 687b ldr r3, [r7, #4] 8005c8e: 6053 str r3, [r2, #4] } 8005c90: bf00 nop 8005c92: 3708 adds r7, #8 8005c94: 46bd mov sp, r7 8005c96: bd80 pop {r7, pc} 8005c98: 20000398 .word 0x20000398 08005c9c : //´Óeeprom¶ÁÈ¡Êý¾Ý void EEPROM_READ_BATY(uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG) { 8005c9c: b580 push {r7, lr} 8005c9e: b082 sub sp, #8 8005ca0: af00 add r7, sp, #0 8005ca2: 4603 mov r3, r0 8005ca4: 6039 str r1, [r7, #0] 8005ca6: 80fb strh r3, [r7, #6] 8005ca8: 4613 mov r3, r2 8005caa: 80bb strh r3, [r7, #4] IIC_READ_DATE(EEPROM_ADDRESS,IN_DEVICE_ADD,DATAS,LONG); 8005cac: 88bb ldrh r3, [r7, #4] 8005cae: 88f9 ldrh r1, [r7, #6] 8005cb0: 683a ldr r2, [r7, #0] 8005cb2: 20a0 movs r0, #160 ; 0xa0 8005cb4: f000 f868 bl 8005d88 } 8005cb8: bf00 nop 8005cba: 3708 adds r7, #8 8005cbc: 46bd mov sp, r7 8005cbe: bd80 pop {r7, pc} 08005cc0 : //ÏòeepromдÈëÊý¾Ý void EEPROM_WRITE_BATY(uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG) { 8005cc0: b580 push {r7, lr} 8005cc2: b086 sub sp, #24 8005cc4: af00 add r7, sp, #0 8005cc6: 4603 mov r3, r0 8005cc8: 6039 str r1, [r7, #0] 8005cca: 80fb strh r3, [r7, #6] 8005ccc: 4613 mov r3, r2 8005cce: 80bb strh r3, [r7, #4] //IIC_SAND_DATE(EEPROM_ADDRESS,IN_DEVICE_ADD,DATAS,LONG); uint16_t addoffset=0; 8005cd0: 2300 movs r3, #0 8005cd2: 82fb strh r3, [r7, #22] eeprom_write_buff *buff; eeprom_write_buff *buff2; while(LONG--) 8005cd4: e02d b.n 8005d32 { buff =(eeprom_write_buff*)malloc(sizeof(eeprom_write_buff)); 8005cd6: 2008 movs r0, #8 8005cd8: f001 fae0 bl 800729c 8005cdc: 4603 mov r3, r0 8005cde: 613b str r3, [r7, #16] if(buff!=NULL) 8005ce0: 693b ldr r3, [r7, #16] 8005ce2: 2b00 cmp r3, #0 8005ce4: d02b beq.n 8005d3e { buff->add=IN_DEVICE_ADD+addoffset; 8005ce6: 88fa ldrh r2, [r7, #6] 8005ce8: 8afb ldrh r3, [r7, #22] 8005cea: 4413 add r3, r2 8005cec: b29a uxth r2, r3 8005cee: 693b ldr r3, [r7, #16] 8005cf0: 809a strh r2, [r3, #4] buff->date=DATAS[addoffset]; 8005cf2: 8afb ldrh r3, [r7, #22] 8005cf4: 683a ldr r2, [r7, #0] 8005cf6: 4413 add r3, r2 8005cf8: 781a ldrb r2, [r3, #0] 8005cfa: 693b ldr r3, [r7, #16] 8005cfc: 719a strb r2, [r3, #6] buff->next=NULL; 8005cfe: 693b ldr r3, [r7, #16] 8005d00: 2200 movs r2, #0 8005d02: 601a str r2, [r3, #0] }else{return ;} if(eeprom_write_buffer.head==NULL) 8005d04: 4b10 ldr r3, [pc, #64] ; (8005d48 ) 8005d06: 685b ldr r3, [r3, #4] 8005d08: 2b00 cmp r3, #0 8005d0a: d106 bne.n 8005d1a { eeprom_write_buffer.head=buff; 8005d0c: 4a0e ldr r2, [pc, #56] ; (8005d48 ) 8005d0e: 693b ldr r3, [r7, #16] 8005d10: 6053 str r3, [r2, #4] eeprom_write_buffer.end=buff; 8005d12: 4a0d ldr r2, [pc, #52] ; (8005d48 ) 8005d14: 693b ldr r3, [r7, #16] 8005d16: 6093 str r3, [r2, #8] 8005d18: e008 b.n 8005d2c }else { buff2=eeprom_write_buffer.end; 8005d1a: 4b0b ldr r3, [pc, #44] ; (8005d48 ) 8005d1c: 689b ldr r3, [r3, #8] 8005d1e: 60fb str r3, [r7, #12] buff2->next=buff; 8005d20: 68fb ldr r3, [r7, #12] 8005d22: 693a ldr r2, [r7, #16] 8005d24: 601a str r2, [r3, #0] eeprom_write_buffer.end=buff; 8005d26: 4a08 ldr r2, [pc, #32] ; (8005d48 ) 8005d28: 693b ldr r3, [r7, #16] 8005d2a: 6093 str r3, [r2, #8] } addoffset++; 8005d2c: 8afb ldrh r3, [r7, #22] 8005d2e: 3301 adds r3, #1 8005d30: 82fb strh r3, [r7, #22] while(LONG--) 8005d32: 88bb ldrh r3, [r7, #4] 8005d34: 1e5a subs r2, r3, #1 8005d36: 80ba strh r2, [r7, #4] 8005d38: 2b00 cmp r3, #0 8005d3a: d1cc bne.n 8005cd6 8005d3c: e000 b.n 8005d40 }else{return ;} 8005d3e: bf00 nop } } 8005d40: 3718 adds r7, #24 8005d42: 46bd mov sp, r7 8005d44: bd80 pop {r7, pc} 8005d46: bf00 nop 8005d48: 20000398 .word 0x20000398 08005d4c : //iicÓ²¼þ½Ó¿Ú extern I2C_HandleTypeDef hi2c2; void IIC_SAND_DATE(uint16_t DEVICE_ADD,uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG) { 8005d4c: b580 push {r7, lr} 8005d4e: b088 sub sp, #32 8005d50: af04 add r7, sp, #16 8005d52: 60ba str r2, [r7, #8] 8005d54: 461a mov r2, r3 8005d56: 4603 mov r3, r0 8005d58: 81fb strh r3, [r7, #14] 8005d5a: 460b mov r3, r1 8005d5c: 81bb strh r3, [r7, #12] 8005d5e: 4613 mov r3, r2 8005d60: 80fb strh r3, [r7, #6] HAL_I2C_Mem_Write(&hi2c2,DEVICE_ADD,IN_DEVICE_ADD,I2C_MEMADD_SIZE_8BIT,DATAS,LONG,100); 8005d62: 89ba ldrh r2, [r7, #12] 8005d64: 89f9 ldrh r1, [r7, #14] 8005d66: 2364 movs r3, #100 ; 0x64 8005d68: 9302 str r3, [sp, #8] 8005d6a: 88fb ldrh r3, [r7, #6] 8005d6c: 9301 str r3, [sp, #4] 8005d6e: 68bb ldr r3, [r7, #8] 8005d70: 9300 str r3, [sp, #0] 8005d72: 2301 movs r3, #1 8005d74: 4803 ldr r0, [pc, #12] ; (8005d84 ) 8005d76: f7fc fc35 bl 80025e4 } 8005d7a: bf00 nop 8005d7c: 3710 adds r7, #16 8005d7e: 46bd mov sp, r7 8005d80: bd80 pop {r7, pc} 8005d82: bf00 nop 8005d84: 200001f0 .word 0x200001f0 08005d88 : void IIC_READ_DATE(uint16_t DEVICE_ADD,uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG) { 8005d88: b580 push {r7, lr} 8005d8a: b088 sub sp, #32 8005d8c: af04 add r7, sp, #16 8005d8e: 60ba str r2, [r7, #8] 8005d90: 461a mov r2, r3 8005d92: 4603 mov r3, r0 8005d94: 81fb strh r3, [r7, #14] 8005d96: 460b mov r3, r1 8005d98: 81bb strh r3, [r7, #12] 8005d9a: 4613 mov r3, r2 8005d9c: 80fb strh r3, [r7, #6] HAL_I2C_Mem_Read(&hi2c2,DEVICE_ADD,IN_DEVICE_ADD,I2C_MEMADD_SIZE_8BIT,DATAS,LONG,100); 8005d9e: 89ba ldrh r2, [r7, #12] 8005da0: 89f9 ldrh r1, [r7, #14] 8005da2: 2364 movs r3, #100 ; 0x64 8005da4: 9302 str r3, [sp, #8] 8005da6: 88fb ldrh r3, [r7, #6] 8005da8: 9301 str r3, [sp, #4] 8005daa: 68bb ldr r3, [r7, #8] 8005dac: 9300 str r3, [sp, #0] 8005dae: 2301 movs r3, #1 8005db0: 4803 ldr r0, [pc, #12] ; (8005dc0 ) 8005db2: f7fc fd11 bl 80027d8 } 8005db6: bf00 nop 8005db8: 3710 adds r7, #16 8005dba: 46bd mov sp, r7 8005dbc: bd80 pop {r7, pc} 8005dbe: bf00 nop 8005dc0: 200001f0 .word 0x200001f0 08005dc4 : #include "key.h" struct button k1,k2,k3; void GEI_BUTTON_CODE(struct button *bt,uint8_t in) { 8005dc4: b580 push {r7, lr} 8005dc6: b082 sub sp, #8 8005dc8: af00 add r7, sp, #0 8005dca: 6078 str r0, [r7, #4] 8005dcc: 460b mov r3, r1 8005dce: 70fb strb r3, [r7, #3] #define t 250 bt->code=0; 8005dd0: 687b ldr r3, [r7, #4] 8005dd2: 2200 movs r2, #0 8005dd4: 601a str r2, [r3, #0] if(in==0) 8005dd6: 78fb ldrb r3, [r7, #3] 8005dd8: 2b00 cmp r3, #0 8005dda: d138 bne.n 8005e4e { if(bt->lock==0) 8005ddc: 687b ldr r3, [r7, #4] 8005dde: 791b ldrb r3, [r3, #4] 8005de0: 2b00 cmp r3, #0 8005de2: d120 bne.n 8005e26 { if(HAL_GetTick()time+t) 8005de4: f7fb ffba bl 8001d5c 8005de8: 4602 mov r2, r0 8005dea: 687b ldr r3, [r7, #4] 8005dec: 689b ldr r3, [r3, #8] 8005dee: 33fa adds r3, #250 ; 0xfa 8005df0: 429a cmp r2, r3 8005df2: d20d bcs.n 8005e10 { bt->times++; 8005df4: 687b ldr r3, [r7, #4] 8005df6: 68db ldr r3, [r3, #12] 8005df8: 1c5a adds r2, r3, #1 8005dfa: 687b ldr r3, [r7, #4] 8005dfc: 60da str r2, [r3, #12] bt->time=HAL_GetTick(); 8005dfe: f7fb ffad bl 8001d5c 8005e02: 4602 mov r2, r0 8005e04: 687b ldr r3, [r7, #4] 8005e06: 609a str r2, [r3, #8] bt->lock=1; 8005e08: 687b ldr r3, [r7, #4] 8005e0a: 2201 movs r2, #1 8005e0c: 711a strb r2, [r3, #4] 8005e0e: e00a b.n 8005e26 }else { bt->times=1; 8005e10: 687b ldr r3, [r7, #4] 8005e12: 2201 movs r2, #1 8005e14: 60da str r2, [r3, #12] bt->time=HAL_GetTick(); 8005e16: f7fb ffa1 bl 8001d5c 8005e1a: 4602 mov r2, r0 8005e1c: 687b ldr r3, [r7, #4] 8005e1e: 609a str r2, [r3, #8] bt->lock=1; 8005e20: 687b ldr r3, [r7, #4] 8005e22: 2201 movs r2, #1 8005e24: 711a strb r2, [r3, #4] } } if(bt->lock==1) 8005e26: 687b ldr r3, [r7, #4] 8005e28: 791b ldrb r3, [r3, #4] 8005e2a: 2b01 cmp r3, #1 8005e2c: d10f bne.n 8005e4e { if(HAL_GetTick()>bt->time+t) 8005e2e: f7fb ff95 bl 8001d5c 8005e32: 4602 mov r2, r0 8005e34: 687b ldr r3, [r7, #4] 8005e36: 689b ldr r3, [r3, #8] 8005e38: 33fa adds r3, #250 ; 0xfa 8005e3a: 429a cmp r2, r3 8005e3c: d907 bls.n 8005e4e { bt->code=-1; 8005e3e: 687b ldr r3, [r7, #4] 8005e40: f04f 32ff mov.w r2, #4294967295 8005e44: 601a str r2, [r3, #0] bt->times=-1; 8005e46: 687b ldr r3, [r7, #4] 8005e48: f04f 32ff mov.w r2, #4294967295 8005e4c: 60da str r2, [r3, #12] } } } if(in==1) 8005e4e: 78fb ldrb r3, [r7, #3] 8005e50: 2b01 cmp r3, #1 8005e52: d10f bne.n 8005e74 { if(bt->lock==1) 8005e54: 687b ldr r3, [r7, #4] 8005e56: 791b ldrb r3, [r3, #4] 8005e58: 2b01 cmp r3, #1 8005e5a: d10b bne.n 8005e74 { if(bt->code==-1) 8005e5c: 687b ldr r3, [r7, #4] 8005e5e: 681b ldr r3, [r3, #0] 8005e60: f1b3 3fff cmp.w r3, #4294967295 8005e64: d003 beq.n 8005e6e { }else { bt->code=bt->times; 8005e66: 687b ldr r3, [r7, #4] 8005e68: 68da ldr r2, [r3, #12] 8005e6a: 687b ldr r3, [r7, #4] 8005e6c: 601a str r2, [r3, #0] } bt->lock=0; 8005e6e: 687b ldr r3, [r7, #4] 8005e70: 2200 movs r2, #0 8005e72: 711a strb r2, [r3, #4] } } } 8005e74: bf00 nop 8005e76: 3708 adds r7, #8 8005e78: 46bd mov sp, r7 8005e7a: bd80 pop {r7, pc} 08005e7c : //SPIдÊý¾Ý //Ïò´¥ÃþÆÁICдÈë1byteÊý¾Ý //num:ҪдÈëµÄÊý¾Ý void TP_Write_Byte(char num) { 8005e7c: b580 push {r7, lr} 8005e7e: b084 sub sp, #16 8005e80: af00 add r7, sp, #0 8005e82: 4603 mov r3, r0 8005e84: 71fb strb r3, [r7, #7] for(uint8_t count=0;count<8;count++) 8005e86: 2300 movs r3, #0 8005e88: 73fb strb r3, [r7, #15] 8005e8a: e020 b.n 8005ece { if(num&0x80){TDIN(1);} 8005e8c: f997 3007 ldrsb.w r3, [r7, #7] 8005e90: 2b00 cmp r3, #0 8005e92: da06 bge.n 8005ea2 8005e94: 2201 movs r2, #1 8005e96: f44f 7100 mov.w r1, #512 ; 0x200 8005e9a: 4811 ldr r0, [pc, #68] ; (8005ee0 ) 8005e9c: f7fc fa45 bl 800232a 8005ea0: e005 b.n 8005eae else {TDIN(0);} 8005ea2: 2200 movs r2, #0 8005ea4: f44f 7100 mov.w r1, #512 ; 0x200 8005ea8: 480d ldr r0, [pc, #52] ; (8005ee0 ) 8005eaa: f7fc fa3e bl 800232a num<<=1; 8005eae: 79fb ldrb r3, [r7, #7] 8005eb0: 005b lsls r3, r3, #1 8005eb2: 71fb strb r3, [r7, #7] TCLK(0); 8005eb4: 2200 movs r2, #0 8005eb6: 2102 movs r1, #2 8005eb8: 480a ldr r0, [pc, #40] ; (8005ee4 ) 8005eba: f7fc fa36 bl 800232a TCLK(1); //ÉÏÉýÑØÓÐЧ 8005ebe: 2201 movs r2, #1 8005ec0: 2102 movs r1, #2 8005ec2: 4808 ldr r0, [pc, #32] ; (8005ee4 ) 8005ec4: f7fc fa31 bl 800232a for(uint8_t count=0;count<8;count++) 8005ec8: 7bfb ldrb r3, [r7, #15] 8005eca: 3301 adds r3, #1 8005ecc: 73fb strb r3, [r7, #15] 8005ece: 7bfb ldrb r3, [r7, #15] 8005ed0: 2b07 cmp r3, #7 8005ed2: d9db bls.n 8005e8c } } 8005ed4: bf00 nop 8005ed6: bf00 nop 8005ed8: 3710 adds r7, #16 8005eda: 46bd mov sp, r7 8005edc: bd80 pop {r7, pc} 8005ede: bf00 nop 8005ee0: 40011c00 .word 0x40011c00 8005ee4: 40010c00 .word 0x40010c00 08005ee8 : //SPI¶ÁÊý¾Ý //´Ó´¥ÃþÆÁIC¶ÁÈ¡adcÖµ //CMD:Ö¸Áî //·µ»ØÖµ:¶Áµ½µÄÊý¾Ý uint16_t TP_Read_AD(char CMD) { 8005ee8: b580 push {r7, lr} 8005eea: b084 sub sp, #16 8005eec: af00 add r7, sp, #0 8005eee: 4603 mov r3, r0 8005ef0: 71fb strb r3, [r7, #7] uint16_t Num=0; 8005ef2: 2300 movs r3, #0 8005ef4: 81fb strh r3, [r7, #14] TCLK(0); //ÏÈÀ­µÍʱÖÓ 8005ef6: 2200 movs r2, #0 8005ef8: 2102 movs r1, #2 8005efa: 482b ldr r0, [pc, #172] ; (8005fa8 ) 8005efc: f7fc fa15 bl 800232a TDIN(0); //À­µÍÊý¾ÝÏß 8005f00: 2200 movs r2, #0 8005f02: f44f 7100 mov.w r1, #512 ; 0x200 8005f06: 4829 ldr r0, [pc, #164] ; (8005fac ) 8005f08: f7fc fa0f bl 800232a TCS(0); //Ñ¡Öд¥ÃþÆÁIC 8005f0c: 2200 movs r2, #0 8005f0e: 2104 movs r1, #4 8005f10: 4825 ldr r0, [pc, #148] ; (8005fa8 ) 8005f12: f7fc fa0a bl 800232a TP_Write_Byte(CMD);//·¢ËÍÃüÁî×Ö 8005f16: 79fb ldrb r3, [r7, #7] 8005f18: 4618 mov r0, r3 8005f1a: f7ff ffaf bl 8005e7c HAL_GetTick(); //ÉÔ΢ÑÓʱ£¬adת»»ÐèҪʱ¼ä 8005f1e: f7fb ff1d bl 8001d5c HAL_GetTick(); 8005f22: f7fb ff1b bl 8001d5c HAL_GetTick(); 8005f26: f7fb ff19 bl 8001d5c HAL_GetTick(); 8005f2a: f7fb ff17 bl 8001d5c HAL_GetTick(); 8005f2e: f7fb ff15 bl 8001d5c HAL_GetTick(); 8005f32: f7fb ff13 bl 8001d5c TCLK(1); //¸ø1¸öʱÖÓ£¬Çå³ýBUSY 8005f36: 2201 movs r2, #1 8005f38: 2102 movs r1, #2 8005f3a: 481b ldr r0, [pc, #108] ; (8005fa8 ) 8005f3c: f7fc f9f5 bl 800232a TCLK(0); 8005f40: 2200 movs r2, #0 8005f42: 2102 movs r1, #2 8005f44: 4818 ldr r0, [pc, #96] ; (8005fa8 ) 8005f46: f7fc f9f0 bl 800232a for(uint8_t count=0;count<16;count++)//¶Á³ö16λÊý¾Ý,Ö»Óиß12λÓÐЧ 8005f4a: 2300 movs r3, #0 8005f4c: 737b strb r3, [r7, #13] 8005f4e: e01a b.n 8005f86 { Num<<=1; 8005f50: 89fb ldrh r3, [r7, #14] 8005f52: 005b lsls r3, r3, #1 8005f54: 81fb strh r3, [r7, #14] TCLK(0); //ϽµÑØÓÐЧ 8005f56: 2200 movs r2, #0 8005f58: 2102 movs r1, #2 8005f5a: 4813 ldr r0, [pc, #76] ; (8005fa8 ) 8005f5c: f7fc f9e5 bl 800232a TCLK(1);; 8005f60: 2201 movs r2, #1 8005f62: 2102 movs r1, #2 8005f64: 4810 ldr r0, [pc, #64] ; (8005fa8 ) 8005f66: f7fc f9e0 bl 800232a if(TDOUT){Num++;} 8005f6a: f44f 7180 mov.w r1, #256 ; 0x100 8005f6e: 480f ldr r0, [pc, #60] ; (8005fac ) 8005f70: f7fc f9c4 bl 80022fc 8005f74: 4603 mov r3, r0 8005f76: 2b00 cmp r3, #0 8005f78: d002 beq.n 8005f80 8005f7a: 89fb ldrh r3, [r7, #14] 8005f7c: 3301 adds r3, #1 8005f7e: 81fb strh r3, [r7, #14] for(uint8_t count=0;count<16;count++)//¶Á³ö16λÊý¾Ý,Ö»Óиß12λÓÐЧ 8005f80: 7b7b ldrb r3, [r7, #13] 8005f82: 3301 adds r3, #1 8005f84: 737b strb r3, [r7, #13] 8005f86: 7b7b ldrb r3, [r7, #13] 8005f88: 2b0f cmp r3, #15 8005f8a: d9e1 bls.n 8005f50 } Num>>=4; //Ö»Óиß12λÓÐЧ. 8005f8c: 89fb ldrh r3, [r7, #14] 8005f8e: 091b lsrs r3, r3, #4 8005f90: 81fb strh r3, [r7, #14] TCS(1); //ÊÍ·ÅƬѡ 8005f92: 2201 movs r2, #1 8005f94: 2104 movs r1, #4 8005f96: 4804 ldr r0, [pc, #16] ; (8005fa8 ) 8005f98: f7fc f9c7 bl 800232a return(Num); 8005f9c: 89fb ldrh r3, [r7, #14] } 8005f9e: 4618 mov r0, r3 8005fa0: 3710 adds r7, #16 8005fa2: 46bd mov sp, r7 8005fa4: bd80 pop {r7, pc} 8005fa6: bf00 nop 8005fa8: 40010c00 .word 0x40010c00 8005fac: 40011c00 .word 0x40011c00 08005fb0 : //xy:Ö¸ÁCMD_RDX/CMD_RDY£© //·µ»ØÖµ:¶Áµ½µÄÊý¾Ý #define READ_TIMES 5 //¶ÁÈ¡´ÎÊý #define LOST_VAL 1 //¶ªÆúÖµ uint16_t TP_Read_XOY(uint8_t xy) { 8005fb0: b590 push {r4, r7, lr} 8005fb2: b089 sub sp, #36 ; 0x24 8005fb4: af00 add r7, sp, #0 8005fb6: 4603 mov r3, r0 8005fb8: 71fb strb r3, [r7, #7] uint16_t i, j; uint16_t buf[READ_TIMES]; uint16_t sum=0; 8005fba: 2300 movs r3, #0 8005fbc: 837b strh r3, [r7, #26] uint16_t temp; for(i=0;i 8005fc4: 8bfc ldrh r4, [r7, #30] 8005fc6: 79fb ldrb r3, [r7, #7] 8005fc8: 4618 mov r0, r3 8005fca: f7ff ff8d bl 8005ee8 8005fce: 4603 mov r3, r0 8005fd0: 461a mov r2, r3 8005fd2: 0063 lsls r3, r4, #1 8005fd4: 3320 adds r3, #32 8005fd6: 443b add r3, r7 8005fd8: f823 2c14 strh.w r2, [r3, #-20] 8005fdc: 8bfb ldrh r3, [r7, #30] 8005fde: 3301 adds r3, #1 8005fe0: 83fb strh r3, [r7, #30] 8005fe2: 8bfb ldrh r3, [r7, #30] 8005fe4: 2b04 cmp r3, #4 8005fe6: d9ed bls.n 8005fc4 for(i=0;i { for(j=i+1;j { if(buf[i]>buf[j])//ÉýÐòÅÅÁÐ 8005ff6: 8bfb ldrh r3, [r7, #30] 8005ff8: 005b lsls r3, r3, #1 8005ffa: 3320 adds r3, #32 8005ffc: 443b add r3, r7 8005ffe: f833 2c14 ldrh.w r2, [r3, #-20] 8006002: 8bbb ldrh r3, [r7, #28] 8006004: 005b lsls r3, r3, #1 8006006: 3320 adds r3, #32 8006008: 443b add r3, r7 800600a: f833 3c14 ldrh.w r3, [r3, #-20] 800600e: 429a cmp r2, r3 8006010: d91a bls.n 8006048 { temp=buf[i]; 8006012: 8bfb ldrh r3, [r7, #30] 8006014: 005b lsls r3, r3, #1 8006016: 3320 adds r3, #32 8006018: 443b add r3, r7 800601a: f833 3c14 ldrh.w r3, [r3, #-20] 800601e: 833b strh r3, [r7, #24] buf[i]=buf[j]; 8006020: 8bbb ldrh r3, [r7, #28] 8006022: 8bfa ldrh r2, [r7, #30] 8006024: 005b lsls r3, r3, #1 8006026: 3320 adds r3, #32 8006028: 443b add r3, r7 800602a: f833 1c14 ldrh.w r1, [r3, #-20] 800602e: 0053 lsls r3, r2, #1 8006030: 3320 adds r3, #32 8006032: 443b add r3, r7 8006034: 460a mov r2, r1 8006036: f823 2c14 strh.w r2, [r3, #-20] buf[j]=temp; 800603a: 8bbb ldrh r3, [r7, #28] 800603c: 005b lsls r3, r3, #1 800603e: 3320 adds r3, #32 8006040: 443b add r3, r7 8006042: 8b3a ldrh r2, [r7, #24] 8006044: f823 2c14 strh.w r2, [r3, #-20] for(j=i+1;j for(i=0;i } } } sum=0; 8006060: 2300 movs r3, #0 8006062: 837b strh r3, [r7, #26] for(i=LOST_VAL;i 800606a: 8bfb ldrh r3, [r7, #30] 800606c: 005b lsls r3, r3, #1 800606e: 3320 adds r3, #32 8006070: 443b add r3, r7 8006072: f833 2c14 ldrh.w r2, [r3, #-20] 8006076: 8b7b ldrh r3, [r7, #26] 8006078: 4413 add r3, r2 800607a: 837b strh r3, [r7, #26] 800607c: 8bfb ldrh r3, [r7, #30] 800607e: 3301 adds r3, #1 8006080: 83fb strh r3, [r7, #30] 8006082: 8bfb ldrh r3, [r7, #30] 8006084: 2b03 cmp r3, #3 8006086: d9f0 bls.n 800606a temp=sum/(READ_TIMES-2*LOST_VAL); 8006088: 8b7b ldrh r3, [r7, #26] 800608a: 4a05 ldr r2, [pc, #20] ; (80060a0 ) 800608c: fba2 2303 umull r2, r3, r2, r3 8006090: 085b lsrs r3, r3, #1 8006092: 833b strh r3, [r7, #24] return temp; 8006094: 8b3b ldrh r3, [r7, #24] } 8006096: 4618 mov r0, r3 8006098: 3724 adds r7, #36 ; 0x24 800609a: 46bd mov sp, r7 800609c: bd90 pop {r4, r7, pc} 800609e: bf00 nop 80060a0: aaaaaaab .word 0xaaaaaaab 080060a4 : //¶ÁÈ¡x,y×ø±ê //x,y:¶ÁÈ¡µ½µÄ×ø±êADCÖµ void TP_Read_XY_ADC(int16_t *x,int16_t *y) { 80060a4: b580 push {r7, lr} 80060a6: b084 sub sp, #16 80060a8: af00 add r7, sp, #0 80060aa: 6078 str r0, [r7, #4] 80060ac: 6039 str r1, [r7, #0] int16_t xtemp,ytemp; xtemp=TP_Read_XOY(CMD_RDX); 80060ae: 2090 movs r0, #144 ; 0x90 80060b0: f7ff ff7e bl 8005fb0 80060b4: 4603 mov r3, r0 80060b6: 81fb strh r3, [r7, #14] ytemp=TP_Read_XOY(CMD_RDY); 80060b8: 20d0 movs r0, #208 ; 0xd0 80060ba: f7ff ff79 bl 8005fb0 80060be: 4603 mov r3, r0 80060c0: 81bb strh r3, [r7, #12] *x=xtemp; 80060c2: 687b ldr r3, [r7, #4] 80060c4: 89fa ldrh r2, [r7, #14] 80060c6: 801a strh r2, [r3, #0] *y=ytemp; 80060c8: 683b ldr r3, [r7, #0] 80060ca: 89ba ldrh r2, [r7, #12] 80060cc: 801a strh r2, [r3, #0] } 80060ce: bf00 nop 80060d0: 3710 adds r7, #16 80060d2: 46bd mov sp, r7 80060d4: bd80 pop {r7, pc} 080060d6 : //¸Ãº¯ÊýÄÜ´ó´óÌá¸ß׼ȷ¶È //x,y:¶ÁÈ¡µ½µÄ×ø±êÖµ //·µ»ØÖµ:0,ʧ°Ü;1,³É¹¦¡£ #define ERR_RANGE 10 //Îó²î·¶Î§ uint8_t TP_Read_XY2(int16_t *x,int16_t *y) { 80060d6: b580 push {r7, lr} 80060d8: b084 sub sp, #16 80060da: af00 add r7, sp, #0 80060dc: 6078 str r0, [r7, #4] 80060de: 6039 str r1, [r7, #0] int16_t x1,y1; int16_t x2,y2; TP_Read_XY_ADC(&x1,&y1); 80060e0: f107 020c add.w r2, r7, #12 80060e4: f107 030e add.w r3, r7, #14 80060e8: 4611 mov r1, r2 80060ea: 4618 mov r0, r3 80060ec: f7ff ffda bl 80060a4 TP_Read_XY_ADC(&x2,&y2); 80060f0: f107 0208 add.w r2, r7, #8 80060f4: f107 030a add.w r3, r7, #10 80060f8: 4611 mov r1, r2 80060fa: 4618 mov r0, r3 80060fc: f7ff ffd2 bl 80060a4 if(((x2<=x1&&x1 800610c: f9b7 300a ldrsh.w r3, [r7, #10] 8006110: 3309 adds r3, #9 8006112: f9b7 200e ldrsh.w r2, [r7, #14] 8006116: 4293 cmp r3, r2 8006118: da0c bge.n 8006134 800611a: f9b7 200e ldrsh.w r2, [r7, #14] 800611e: f9b7 300a ldrsh.w r3, [r7, #10] 8006122: 429a cmp r2, r3 8006124: dc3a bgt.n 800619c 8006126: f9b7 300e ldrsh.w r3, [r7, #14] 800612a: 3309 adds r3, #9 800612c: f9b7 200a ldrsh.w r2, [r7, #10] 8006130: 4293 cmp r3, r2 8006132: db33 blt.n 800619c &&((y2<=y1&&y1 8006140: f9b7 3008 ldrsh.w r3, [r7, #8] 8006144: 3309 adds r3, #9 8006146: f9b7 200c ldrsh.w r2, [r7, #12] 800614a: 4293 cmp r3, r2 800614c: da0c bge.n 8006168 800614e: f9b7 200c ldrsh.w r2, [r7, #12] 8006152: f9b7 3008 ldrsh.w r3, [r7, #8] 8006156: 429a cmp r2, r3 8006158: dc20 bgt.n 800619c 800615a: f9b7 300c ldrsh.w r3, [r7, #12] 800615e: 3309 adds r3, #9 8006160: f9b7 2008 ldrsh.w r2, [r7, #8] 8006164: 4293 cmp r3, r2 8006166: db19 blt.n 800619c { *x=(x1+x2)/2; 8006168: f9b7 300e ldrsh.w r3, [r7, #14] 800616c: 461a mov r2, r3 800616e: f9b7 300a ldrsh.w r3, [r7, #10] 8006172: 4413 add r3, r2 8006174: 0fda lsrs r2, r3, #31 8006176: 4413 add r3, r2 8006178: 105b asrs r3, r3, #1 800617a: b21a sxth r2, r3 800617c: 687b ldr r3, [r7, #4] 800617e: 801a strh r2, [r3, #0] *y=(y1+y2)/2; 8006180: f9b7 300c ldrsh.w r3, [r7, #12] 8006184: 461a mov r2, r3 8006186: f9b7 3008 ldrsh.w r3, [r7, #8] 800618a: 4413 add r3, r2 800618c: 0fda lsrs r2, r3, #31 800618e: 4413 add r3, r2 8006190: 105b asrs r3, r3, #1 8006192: b21a sxth r2, r3 8006194: 683b ldr r3, [r7, #0] 8006196: 801a strh r2, [r3, #0] return 1; 8006198: 2301 movs r3, #1 800619a: e000 b.n 800619e }else return 0; 800619c: 2300 movs r3, #0 } 800619e: 4618 mov r0, r3 80061a0: 3710 adds r7, #16 80061a2: 46bd mov sp, r7 80061a4: bd80 pop {r7, pc} ... 080061a8 : touch_device t0;// t0 yyds~ touch_config tconfig; //´¥Ãþ¸üзþÎñ£¬×´Ì¬»úд·¨£¬Ñ­»·»ñÈ¡×ø±ê void TP_Server() { 80061a8: b598 push {r3, r4, r7, lr} 80061aa: af00 add r7, sp, #0 if(TPEN==0) //Èç¹ûÓд¥Ãþ 80061ac: f44f 6180 mov.w r1, #1024 ; 0x400 80061b0: 4835 ldr r0, [pc, #212] ; (8006288 ) 80061b2: f7fc f8a3 bl 80022fc 80061b6: 4603 mov r3, r0 80061b8: 2b00 cmp r3, #0 80061ba: d155 bne.n 8006268 { if(TP_Read_XY2(&t0.adc_x,&t0.adc_y)) 80061bc: 4933 ldr r1, [pc, #204] ; (800628c ) 80061be: 4834 ldr r0, [pc, #208] ; (8006290 ) 80061c0: f7ff ff89 bl 80060d6 80061c4: 4603 mov r3, r0 80061c6: 2b00 cmp r3, #0 80061c8: d043 beq.n 8006252 {//ÏȶÁÈ¡adÖµ t0.pix_x=(t0.adc_x/tconfig.x_acc)-tconfig.x_offset;//ת»»ÎªÏñËØ×ø±ê 80061ca: 4b31 ldr r3, [pc, #196] ; (8006290 ) 80061cc: 881b ldrh r3, [r3, #0] 80061ce: 4618 mov r0, r3 80061d0: f7fa fdd0 bl 8000d74 <__aeabi_i2f> 80061d4: 4602 mov r2, r0 80061d6: 4b2f ldr r3, [pc, #188] ; (8006294 ) 80061d8: 685b ldr r3, [r3, #4] 80061da: 4619 mov r1, r3 80061dc: 4610 mov r0, r2 80061de: f7fa fed1 bl 8000f84 <__aeabi_fdiv> 80061e2: 4603 mov r3, r0 80061e4: 461c mov r4, r3 80061e6: 4b2b ldr r3, [pc, #172] ; (8006294 ) 80061e8: 68db ldr r3, [r3, #12] 80061ea: 4618 mov r0, r3 80061ec: f7fa fdc2 bl 8000d74 <__aeabi_i2f> 80061f0: 4603 mov r3, r0 80061f2: 4619 mov r1, r3 80061f4: 4620 mov r0, r4 80061f6: f7fa fd07 bl 8000c08 <__aeabi_fsub> 80061fa: 4603 mov r3, r0 80061fc: 4618 mov r0, r3 80061fe: f7fa ff5d bl 80010bc <__aeabi_f2iz> 8006202: 4603 mov r3, r0 8006204: 4a22 ldr r2, [pc, #136] ; (8006290 ) 8006206: 6053 str r3, [r2, #4] t0.pix_y=(t0.adc_y/tconfig.y_acc)-tconfig.y_offset; 8006208: 4b21 ldr r3, [pc, #132] ; (8006290 ) 800620a: 885b ldrh r3, [r3, #2] 800620c: 4618 mov r0, r3 800620e: f7fa fdb1 bl 8000d74 <__aeabi_i2f> 8006212: 4602 mov r2, r0 8006214: 4b1f ldr r3, [pc, #124] ; (8006294 ) 8006216: 689b ldr r3, [r3, #8] 8006218: 4619 mov r1, r3 800621a: 4610 mov r0, r2 800621c: f7fa feb2 bl 8000f84 <__aeabi_fdiv> 8006220: 4603 mov r3, r0 8006222: 461c mov r4, r3 8006224: 4b1b ldr r3, [pc, #108] ; (8006294 ) 8006226: 691b ldr r3, [r3, #16] 8006228: 4618 mov r0, r3 800622a: f7fa fda3 bl 8000d74 <__aeabi_i2f> 800622e: 4603 mov r3, r0 8006230: 4619 mov r1, r3 8006232: 4620 mov r0, r4 8006234: f7fa fce8 bl 8000c08 <__aeabi_fsub> 8006238: 4603 mov r3, r0 800623a: 4618 mov r0, r3 800623c: f7fa ff3e bl 80010bc <__aeabi_f2iz> 8006240: 4603 mov r3, r0 8006242: 4a13 ldr r2, [pc, #76] ; (8006290 ) 8006244: 6093 str r3, [r2, #8] t0.d=1; 8006246: 4a12 ldr r2, [pc, #72] ; (8006290 ) 8006248: 7b13 ldrb r3, [r2, #12] 800624a: f043 0304 orr.w r3, r3, #4 800624e: 7313 strb r3, [r2, #12] 8006250: e004 b.n 800625c }else { t0.d=0; 8006252: 4a0f ldr r2, [pc, #60] ; (8006290 ) 8006254: 7b13 ldrb r3, [r2, #12] 8006256: f36f 0382 bfc r3, #2, #1 800625a: 7313 strb r3, [r2, #12] } t0.c=1; 800625c: 4a0c ldr r2, [pc, #48] ; (8006290 ) 800625e: 7b13 ldrb r3, [r2, #12] 8006260: f043 0302 orr.w r3, r3, #2 8006264: 7313 strb r3, [r2, #12] { t0.c=0; t0.pix_x=-1; t0.pix_y=-1; } } 8006266: e00c b.n 8006282 t0.c=0; 8006268: 4a09 ldr r2, [pc, #36] ; (8006290 ) 800626a: 7b13 ldrb r3, [r2, #12] 800626c: f36f 0341 bfc r3, #1, #1 8006270: 7313 strb r3, [r2, #12] t0.pix_x=-1; 8006272: 4b07 ldr r3, [pc, #28] ; (8006290 ) 8006274: f04f 32ff mov.w r2, #4294967295 8006278: 605a str r2, [r3, #4] t0.pix_y=-1; 800627a: 4b05 ldr r3, [pc, #20] ; (8006290 ) 800627c: f04f 32ff mov.w r2, #4294967295 8006280: 609a str r2, [r3, #8] } 8006282: bf00 nop 8006284: bd98 pop {r3, r4, r7, pc} 8006286: bf00 nop 8006288: 40011c00 .word 0x40011c00 800628c: 200003de .word 0x200003de 8006290: 200003dc .word 0x200003dc 8006294: 200003ec .word 0x200003ec 08006298 : return 0; } //У׼Ó㬻­Ò»¸öÄ¿±ê×ø±ê //r=×ø±ê°ë¾¶£¬ÏÔʾÌØЧÓà void TP_DrwaTrage(int x,int y,int r) { 8006298: b590 push {r4, r7, lr} 800629a: b087 sub sp, #28 800629c: af02 add r7, sp, #8 800629e: 60f8 str r0, [r7, #12] 80062a0: 60b9 str r1, [r7, #8] 80062a2: 607a str r2, [r7, #4] Draw_Circle(x,y,r+1,GRAY); 80062a4: 68fb ldr r3, [r7, #12] 80062a6: b298 uxth r0, r3 80062a8: 68bb ldr r3, [r7, #8] 80062aa: b299 uxth r1, r3 80062ac: 687b ldr r3, [r7, #4] 80062ae: b29b uxth r3, r3 80062b0: 3301 adds r3, #1 80062b2: b29a uxth r2, r3 80062b4: f248 4330 movw r3, #33840 ; 0x8430 80062b8: f7ff fa91 bl 80057de Draw_Circle(x,y,r,RED); 80062bc: 68fb ldr r3, [r7, #12] 80062be: b298 uxth r0, r3 80062c0: 68bb ldr r3, [r7, #8] 80062c2: b299 uxth r1, r3 80062c4: 687b ldr r3, [r7, #4] 80062c6: b29a uxth r2, r3 80062c8: f44f 4378 mov.w r3, #63488 ; 0xf800 80062cc: f7ff fa87 bl 80057de LCD_DrawLine(x,y,x+10,y,RED); 80062d0: 68fb ldr r3, [r7, #12] 80062d2: b298 uxth r0, r3 80062d4: 68bb ldr r3, [r7, #8] 80062d6: b299 uxth r1, r3 80062d8: 68fb ldr r3, [r7, #12] 80062da: b29b uxth r3, r3 80062dc: 330a adds r3, #10 80062de: b29a uxth r2, r3 80062e0: 68bb ldr r3, [r7, #8] 80062e2: b29b uxth r3, r3 80062e4: f44f 4478 mov.w r4, #63488 ; 0xf800 80062e8: 9400 str r4, [sp, #0] 80062ea: f7ff f9f3 bl 80056d4 LCD_DrawLine(x,y,x,y+10,RED); 80062ee: 68fb ldr r3, [r7, #12] 80062f0: b298 uxth r0, r3 80062f2: 68bb ldr r3, [r7, #8] 80062f4: b299 uxth r1, r3 80062f6: 68fb ldr r3, [r7, #12] 80062f8: b29a uxth r2, r3 80062fa: 68bb ldr r3, [r7, #8] 80062fc: b29b uxth r3, r3 80062fe: 330a adds r3, #10 8006300: b29b uxth r3, r3 8006302: f44f 4478 mov.w r4, #63488 ; 0xf800 8006306: 9400 str r4, [sp, #0] 8006308: f7ff f9e4 bl 80056d4 LCD_DrawLine(x,y,x-10,y,RED); 800630c: 68fb ldr r3, [r7, #12] 800630e: b298 uxth r0, r3 8006310: 68bb ldr r3, [r7, #8] 8006312: b299 uxth r1, r3 8006314: 68fb ldr r3, [r7, #12] 8006316: b29b uxth r3, r3 8006318: 3b0a subs r3, #10 800631a: b29a uxth r2, r3 800631c: 68bb ldr r3, [r7, #8] 800631e: b29b uxth r3, r3 8006320: f44f 4478 mov.w r4, #63488 ; 0xf800 8006324: 9400 str r4, [sp, #0] 8006326: f7ff f9d5 bl 80056d4 LCD_DrawLine(x,y,x,y-10,RED); 800632a: 68fb ldr r3, [r7, #12] 800632c: b298 uxth r0, r3 800632e: 68bb ldr r3, [r7, #8] 8006330: b299 uxth r1, r3 8006332: 68fb ldr r3, [r7, #12] 8006334: b29a uxth r2, r3 8006336: 68bb ldr r3, [r7, #8] 8006338: b29b uxth r3, r3 800633a: 3b0a subs r3, #10 800633c: b29b uxth r3, r3 800633e: f44f 4478 mov.w r4, #63488 ; 0xf800 8006342: 9400 str r4, [sp, #0] 8006344: f7ff f9c6 bl 80056d4 } 8006348: bf00 nop 800634a: 3714 adds r7, #20 800634c: 46bd mov sp, r7 800634e: bd90 pop {r4, r7, pc} 08006350 : //´¥ÃþÆÁУ׼ //mode У׼ģʽ£¬0 ±»¶¯Ð£×¼ £¬1 Ö÷¶¯Ð£×¼ void TP_adjustment(char mode) { 8006350: b5b0 push {r4, r5, r7, lr} 8006352: b0a6 sub sp, #152 ; 0x98 8006354: af02 add r7, sp, #8 8006356: 4603 mov r3, r0 8006358: 71fb strb r3, [r7, #7] //ÅжÏÊÇ·ñÐèҪУ׼£¬´Óeeprom»ñÈ¡Êý¾Ý EEPROM_READ_BATY(16,(char *)&tconfig,sizeof(touch_config)); 800635a: 2218 movs r2, #24 800635c: 4917 ldr r1, [pc, #92] ; (80063bc ) 800635e: 2010 movs r0, #16 8006360: f7ff fc9c bl 8005c9c if(tconfig.begin==0xab&&tconfig.end==0xcd&&mode==0) //ÅжÏУ׼±ê¼Ç 8006364: 4b15 ldr r3, [pc, #84] ; (80063bc ) 8006366: 781b ldrb r3, [r3, #0] 8006368: 2bab cmp r3, #171 ; 0xab 800636a: d107 bne.n 800637c 800636c: 4b13 ldr r3, [pc, #76] ; (80063bc ) 800636e: 7d1b ldrb r3, [r3, #20] 8006370: 2bcd cmp r3, #205 ; 0xcd 8006372: d103 bne.n 800637c 8006374: 79fb ldrb r3, [r7, #7] 8006376: 2b00 cmp r3, #0 8006378: f000 82b8 beq.w 80068ec { return; //ÒѾ­Ð£×¼¹ýÁË } //У׼·½·¨±È½Ï¼òµ¥£¬¶ÁÈ¡4¸ö×ø±ê¼ÆËãadÖµÓëÏñËصĹØϵ char str[64]; //ÓÃÓÚ×Ö·û´®Ìáʾ uint16_t y_adc,x_adc,step=0,r=10; //adc»º´æ£¬Ð£×¼²½Ö裬×ø±êµÄ°ë¾¶ 800637c: 2300 movs r3, #0 800637e: f8a7 308e strh.w r3, [r7, #142] ; 0x8e 8006382: 230a movs r3, #10 8006384: f8a7 308c strh.w r3, [r7, #140] ; 0x8c uint16_t y1,y2,y3,y4,x1,x2,x3,x4; //4¸öµã»º´æ int y5,x5,xd,xl,yd,yl; //ͨ¹ý4¸öµãËã³öxyµÄ³¤±ßºÍ¶Ì±ß float acc_x,acc_y; //Ëã³öµÄ¹Øϵ±¶ÂÊ int offset_x,offset_y; //Ëã³öµÄÆ«²î uint32_t wait=HAL_GetTick()+50000,ms100=0; //У׼ʱ¼ä£¬50Ãëû²Ù×÷¾Í×Ô¶¯Í˳ö 8006388: f7fb fce8 bl 8001d5c 800638c: 4603 mov r3, r0 800638e: f503 4343 add.w r3, r3, #49920 ; 0xc300 8006392: 3350 adds r3, #80 ; 0x50 8006394: 67bb str r3, [r7, #120] ; 0x78 8006396: 2300 movs r3, #0 8006398: 677b str r3, [r7, #116] ; 0x74 //ÏÔʾ×Ö·û´®Ìáʾ LCD_Clear(GRAY); 800639a: f248 4030 movw r0, #33840 ; 0x8430 800639e: f7ff f947 bl 8005630 LCD_ShowString(0,50,"Calibrate the touch screen",16,RED,RED); 80063a2: f44f 4378 mov.w r3, #63488 ; 0xf800 80063a6: 9301 str r3, [sp, #4] 80063a8: f44f 4378 mov.w r3, #63488 ; 0xf800 80063ac: 9300 str r3, [sp, #0] 80063ae: 2310 movs r3, #16 80063b0: 4a03 ldr r2, [pc, #12] ; (80063c0 ) 80063b2: 2132 movs r1, #50 ; 0x32 80063b4: 2000 movs r0, #0 80063b6: f7ff fb39 bl 8005a2c //TP_DrwaTrage(30,30,10); //¿ªÊ¼Ð£×¼ while(HAL_GetTick() 80063bc: 200003ec .word 0x200003ec 80063c0: 08009fb0 .word 0x08009fb0 { if(TPEN==0) //Èç¹ûÆÁÄ»±»°´Ï 80063c4: f44f 6180 mov.w r1, #1024 ; 0x400 80063c8: 48ce ldr r0, [pc, #824] ; (8006704 ) 80063ca: f7fb ff97 bl 80022fc 80063ce: 4603 mov r3, r0 80063d0: 2b00 cmp r3, #0 80063d2: d14c bne.n 800646e { wait=HAL_GetTick()+50000; //ÖØÖÃ50Ãë 80063d4: f7fb fcc2 bl 8001d5c 80063d8: 4603 mov r3, r0 80063da: f503 4343 add.w r3, r3, #49920 ; 0xc300 80063de: 3350 adds r3, #80 ; 0x50 80063e0: 67bb str r3, [r7, #120] ; 0x78 TP_Read_XY2(&x_adc,&y_adc); //¶ÁÈ¡xy adÖµ 80063e2: f107 020a add.w r2, r7, #10 80063e6: f107 0308 add.w r3, r7, #8 80063ea: 4611 mov r1, r2 80063ec: 4618 mov r0, r3 80063ee: f7ff fe72 bl 80060d6 //½«¶Áµ½µÄÖµÏÔʾ³öÀ´ sprintf(str,"ADC_X:%04d",x_adc); 80063f2: 893b ldrh r3, [r7, #8] 80063f4: 461a mov r2, r3 80063f6: f107 030c add.w r3, r7, #12 80063fa: 49c3 ldr r1, [pc, #780] ; (8006708 ) 80063fc: 4618 mov r0, r3 80063fe: f001 fd29 bl 8007e54 LCD_ShowString(100, 0, str, 16, RED, GRAY); 8006402: f107 020c add.w r2, r7, #12 8006406: f248 4330 movw r3, #33840 ; 0x8430 800640a: 9301 str r3, [sp, #4] 800640c: f44f 4378 mov.w r3, #63488 ; 0xf800 8006410: 9300 str r3, [sp, #0] 8006412: 2310 movs r3, #16 8006414: 2100 movs r1, #0 8006416: 2064 movs r0, #100 ; 0x64 8006418: f7ff fb08 bl 8005a2c sprintf(str,"ADC_Y:%04d",y_adc); 800641c: 897b ldrh r3, [r7, #10] 800641e: 461a mov r2, r3 8006420: f107 030c add.w r3, r7, #12 8006424: 49b9 ldr r1, [pc, #740] ; (800670c ) 8006426: 4618 mov r0, r3 8006428: f001 fd14 bl 8007e54 LCD_ShowString(100, 16, str, 16, RED, GRAY); 800642c: f107 020c add.w r2, r7, #12 8006430: f248 4330 movw r3, #33840 ; 0x8430 8006434: 9301 str r3, [sp, #4] 8006436: f44f 4378 mov.w r3, #63488 ; 0xf800 800643a: 9300 str r3, [sp, #0] 800643c: 2310 movs r3, #16 800643e: 2110 movs r1, #16 8006440: 2064 movs r0, #100 ; 0x64 8006442: f7ff faf3 bl 8005a2c //ÌØЧ£¬°ë¾¶¿ªÊ¼ÊÕËõ if(HAL_GetTick()>ms100) 8006446: f7fb fc89 bl 8001d5c 800644a: 4602 mov r2, r0 800644c: 6f7b ldr r3, [r7, #116] ; 0x74 800644e: 4293 cmp r3, r2 8006450: d20d bcs.n 800646e { ms100=HAL_GetTick()+100; 8006452: f7fb fc83 bl 8001d5c 8006456: 4603 mov r3, r0 8006458: 3364 adds r3, #100 ; 0x64 800645a: 677b str r3, [r7, #116] ; 0x74 if(r>0){r--;} 800645c: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006460: 2b00 cmp r3, #0 8006462: d004 beq.n 800646e 8006464: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006468: 3b01 subs r3, #1 800646a: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } //²½Öè0£¬½«µã»­ÔÚ£¨30£¬30£©´Ëʱ°ë¾¶Îª10 if(step==0) 800646e: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006472: 2b00 cmp r3, #0 8006474: d12b bne.n 80064ce { TP_DrwaTrage(30,30,r); 8006476: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 800647a: 461a mov r2, r3 800647c: 211e movs r1, #30 800647e: 201e movs r0, #30 8006480: f7ff ff0a bl 8006298 if(r==0)//µ±°ë¾¶ÊÕËõΪ0µÄʱºò 8006484: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006488: 2b00 cmp r3, #0 800648a: d120 bne.n 80064ce { //½øÈëÏÂÒ»¸ö²½Ö裬»º´æÕâ¸öµãµÄÖµ£¬ÏÔʾ³öÀ´ step+=1; 800648c: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006490: 3301 adds r3, #1 8006492: f8a7 308e strh.w r3, [r7, #142] ; 0x8e y1=y_adc; 8006496: 897b ldrh r3, [r7, #10] 8006498: f8a7 308a strh.w r3, [r7, #138] ; 0x8a x1=x_adc; 800649c: 893b ldrh r3, [r7, #8] 800649e: f8a7 3082 strh.w r3, [r7, #130] ; 0x82 sprintf(str,"point_1 x:%d y:%d",x1,y1); 80064a2: f8b7 2082 ldrh.w r2, [r7, #130] ; 0x82 80064a6: f8b7 308a ldrh.w r3, [r7, #138] ; 0x8a 80064aa: f107 000c add.w r0, r7, #12 80064ae: 4998 ldr r1, [pc, #608] ; (8006710 ) 80064b0: f001 fcd0 bl 8007e54 LCD_ShowString(0,66,str,16,RED,RED); 80064b4: f107 020c add.w r2, r7, #12 80064b8: f44f 4378 mov.w r3, #63488 ; 0xf800 80064bc: 9301 str r3, [sp, #4] 80064be: f44f 4378 mov.w r3, #63488 ; 0xf800 80064c2: 9300 str r3, [sp, #0] 80064c4: 2310 movs r3, #16 80064c6: 2142 movs r1, #66 ; 0x42 80064c8: 2000 movs r0, #0 80064ca: f7ff faaf bl 8005a2c } } //²½Öè1£¬µÈ´ýÆÁÄ»±»ËÉ¿ª£¬½øÈëÏÂÒ»¸ö²½Ö裬ÖØÖð뾶 if(step==1) 80064ce: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80064d2: 2b01 cmp r3, #1 80064d4: d10f bne.n 80064f6 { if(TPEN==1) 80064d6: f44f 6180 mov.w r1, #1024 ; 0x400 80064da: 488a ldr r0, [pc, #552] ; (8006704 ) 80064dc: f7fb ff0e bl 80022fc 80064e0: 4603 mov r3, r0 80064e2: 2b01 cmp r3, #1 80064e4: d107 bne.n 80064f6 { step+=1; 80064e6: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80064ea: 3301 adds r3, #1 80064ec: f8a7 308e strh.w r3, [r7, #142] ; 0x8e r=10; 80064f0: 230a movs r3, #10 80064f2: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } //ÏÂÃ漸¸ö²½ÖèºÍÉÏÃæÒ»Ñù if(step==2) 80064f6: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80064fa: 2b02 cmp r3, #2 80064fc: d12c bne.n 8006558 { TP_DrwaTrage(290,30,r); 80064fe: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006502: 461a mov r2, r3 8006504: 211e movs r1, #30 8006506: f44f 7091 mov.w r0, #290 ; 0x122 800650a: f7ff fec5 bl 8006298 if(r==0) 800650e: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006512: 2b00 cmp r3, #0 8006514: d120 bne.n 8006558 { step+=1; 8006516: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 800651a: 3301 adds r3, #1 800651c: f8a7 308e strh.w r3, [r7, #142] ; 0x8e y2=y_adc; 8006520: 897b ldrh r3, [r7, #10] 8006522: f8a7 3088 strh.w r3, [r7, #136] ; 0x88 x2=x_adc; 8006526: 893b ldrh r3, [r7, #8] 8006528: f8a7 3080 strh.w r3, [r7, #128] ; 0x80 sprintf(str,"point_2 x:%d y:%d",x2,y2); 800652c: f8b7 2080 ldrh.w r2, [r7, #128] ; 0x80 8006530: f8b7 3088 ldrh.w r3, [r7, #136] ; 0x88 8006534: f107 000c add.w r0, r7, #12 8006538: 4976 ldr r1, [pc, #472] ; (8006714 ) 800653a: f001 fc8b bl 8007e54 LCD_ShowString(0,66+16,str,16,RED,RED); 800653e: f107 020c add.w r2, r7, #12 8006542: f44f 4378 mov.w r3, #63488 ; 0xf800 8006546: 9301 str r3, [sp, #4] 8006548: f44f 4378 mov.w r3, #63488 ; 0xf800 800654c: 9300 str r3, [sp, #0] 800654e: 2310 movs r3, #16 8006550: 2152 movs r1, #82 ; 0x52 8006552: 2000 movs r0, #0 8006554: f7ff fa6a bl 8005a2c } } if(step==3) 8006558: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 800655c: 2b03 cmp r3, #3 800655e: d10f bne.n 8006580 { if(TPEN==1) 8006560: f44f 6180 mov.w r1, #1024 ; 0x400 8006564: 4867 ldr r0, [pc, #412] ; (8006704 ) 8006566: f7fb fec9 bl 80022fc 800656a: 4603 mov r3, r0 800656c: 2b01 cmp r3, #1 800656e: d107 bne.n 8006580 { step+=1; 8006570: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006574: 3301 adds r3, #1 8006576: f8a7 308e strh.w r3, [r7, #142] ; 0x8e r=10; 800657a: 230a movs r3, #10 800657c: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } if(step==4) 8006580: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006584: 2b04 cmp r3, #4 8006586: d12b bne.n 80065e0 { TP_DrwaTrage(30,210,r); 8006588: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 800658c: 461a mov r2, r3 800658e: 21d2 movs r1, #210 ; 0xd2 8006590: 201e movs r0, #30 8006592: f7ff fe81 bl 8006298 if(r==0) 8006596: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 800659a: 2b00 cmp r3, #0 800659c: d120 bne.n 80065e0 { step+=1; 800659e: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80065a2: 3301 adds r3, #1 80065a4: f8a7 308e strh.w r3, [r7, #142] ; 0x8e y3=y_adc; 80065a8: 897b ldrh r3, [r7, #10] 80065aa: f8a7 3086 strh.w r3, [r7, #134] ; 0x86 x3=x_adc; 80065ae: 893b ldrh r3, [r7, #8] 80065b0: f8a7 307e strh.w r3, [r7, #126] ; 0x7e sprintf(str,"point_3 x:%d y:%d",x3,y3); 80065b4: f8b7 207e ldrh.w r2, [r7, #126] ; 0x7e 80065b8: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86 80065bc: f107 000c add.w r0, r7, #12 80065c0: 4955 ldr r1, [pc, #340] ; (8006718 ) 80065c2: f001 fc47 bl 8007e54 LCD_ShowString(0,66+16+16,str,16,RED,RED); 80065c6: f107 020c add.w r2, r7, #12 80065ca: f44f 4378 mov.w r3, #63488 ; 0xf800 80065ce: 9301 str r3, [sp, #4] 80065d0: f44f 4378 mov.w r3, #63488 ; 0xf800 80065d4: 9300 str r3, [sp, #0] 80065d6: 2310 movs r3, #16 80065d8: 2162 movs r1, #98 ; 0x62 80065da: 2000 movs r0, #0 80065dc: f7ff fa26 bl 8005a2c } } if(step==5) 80065e0: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80065e4: 2b05 cmp r3, #5 80065e6: d10f bne.n 8006608 { if(TPEN==1) 80065e8: f44f 6180 mov.w r1, #1024 ; 0x400 80065ec: 4845 ldr r0, [pc, #276] ; (8006704 ) 80065ee: f7fb fe85 bl 80022fc 80065f2: 4603 mov r3, r0 80065f4: 2b01 cmp r3, #1 80065f6: d107 bne.n 8006608 { step+=1; 80065f8: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80065fc: 3301 adds r3, #1 80065fe: f8a7 308e strh.w r3, [r7, #142] ; 0x8e r=10; 8006602: 230a movs r3, #10 8006604: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } if(step==6) 8006608: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 800660c: 2b06 cmp r3, #6 800660e: d12c bne.n 800666a { TP_DrwaTrage(290,210,r); 8006610: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006614: 461a mov r2, r3 8006616: 21d2 movs r1, #210 ; 0xd2 8006618: f44f 7091 mov.w r0, #290 ; 0x122 800661c: f7ff fe3c bl 8006298 if(r==0) 8006620: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006624: 2b00 cmp r3, #0 8006626: d120 bne.n 800666a { step+=1; 8006628: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 800662c: 3301 adds r3, #1 800662e: f8a7 308e strh.w r3, [r7, #142] ; 0x8e y4=y_adc; 8006632: 897b ldrh r3, [r7, #10] 8006634: f8a7 3084 strh.w r3, [r7, #132] ; 0x84 x4=x_adc; 8006638: 893b ldrh r3, [r7, #8] 800663a: f8a7 307c strh.w r3, [r7, #124] ; 0x7c sprintf(str,"point_4 x:%d y:%d",x4,y4); 800663e: f8b7 207c ldrh.w r2, [r7, #124] ; 0x7c 8006642: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84 8006646: f107 000c add.w r0, r7, #12 800664a: 4934 ldr r1, [pc, #208] ; (800671c ) 800664c: f001 fc02 bl 8007e54 LCD_ShowString(0,66+16+16+16,str,16,RED,RED); 8006650: f107 020c add.w r2, r7, #12 8006654: f44f 4378 mov.w r3, #63488 ; 0xf800 8006658: 9301 str r3, [sp, #4] 800665a: f44f 4378 mov.w r3, #63488 ; 0xf800 800665e: 9300 str r3, [sp, #0] 8006660: 2310 movs r3, #16 8006662: 2172 movs r1, #114 ; 0x72 8006664: 2000 movs r0, #0 8006666: f7ff f9e1 bl 8005a2c } } if(step==7) 800666a: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 800666e: 2b07 cmp r3, #7 8006670: d10f bne.n 8006692 { if(TPEN==1) 8006672: f44f 6180 mov.w r1, #1024 ; 0x400 8006676: 4823 ldr r0, [pc, #140] ; (8006704 ) 8006678: f7fb fe40 bl 80022fc 800667c: 4603 mov r3, r0 800667e: 2b01 cmp r3, #1 8006680: d107 bne.n 8006692 { step+=1; 8006682: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006686: 3301 adds r3, #1 8006688: f8a7 308e strh.w r3, [r7, #142] ; 0x8e r=10; 800668c: 230a movs r3, #10 800668e: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } //µ±4¸öµã¶ÁÈ¡Í꣬¿ªÊ¼¼ÆËã¹Øϵ if(step==8) 8006692: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006696: 2b08 cmp r3, #8 8006698: f040 8120 bne.w 80068dc { //ÆäʵֻÐèÒªÁ½¸öµã¾ÍÄÜУ׼£¬Í¨¹ýȡƽ¾ùÖµ»ñµÃxyµÄ³¤±ßºÍ¶Ì±ß xd=((x1+x3)/2); 800669c: f8b7 2082 ldrh.w r2, [r7, #130] ; 0x82 80066a0: f8b7 307e ldrh.w r3, [r7, #126] ; 0x7e 80066a4: 4413 add r3, r2 80066a6: 0fda lsrs r2, r3, #31 80066a8: 4413 add r3, r2 80066aa: 105b asrs r3, r3, #1 80066ac: 673b str r3, [r7, #112] ; 0x70 xl=((x2+x4)/2); 80066ae: f8b7 2080 ldrh.w r2, [r7, #128] ; 0x80 80066b2: f8b7 307c ldrh.w r3, [r7, #124] ; 0x7c 80066b6: 4413 add r3, r2 80066b8: 0fda lsrs r2, r3, #31 80066ba: 4413 add r3, r2 80066bc: 105b asrs r3, r3, #1 80066be: 66fb str r3, [r7, #108] ; 0x6c yd=((y1+y2)/2); 80066c0: f8b7 208a ldrh.w r2, [r7, #138] ; 0x8a 80066c4: f8b7 3088 ldrh.w r3, [r7, #136] ; 0x88 80066c8: 4413 add r3, r2 80066ca: 0fda lsrs r2, r3, #31 80066cc: 4413 add r3, r2 80066ce: 105b asrs r3, r3, #1 80066d0: 66bb str r3, [r7, #104] ; 0x68 yl=((y3+y4)/2); 80066d2: f8b7 2086 ldrh.w r2, [r7, #134] ; 0x86 80066d6: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84 80066da: 4413 add r3, r2 80066dc: 0fda lsrs r2, r3, #31 80066de: 4413 add r3, r2 80066e0: 105b asrs r3, r3, #1 80066e2: 667b str r3, [r7, #100] ; 0x64 //³¤±ß¼õÈ¥¶Ì±ß¿ÉÒÔÔÙ»ñµÃÒ»¸öµã x5=xl-xd; 80066e4: 6efa ldr r2, [r7, #108] ; 0x6c 80066e6: 6f3b ldr r3, [r7, #112] ; 0x70 80066e8: 1ad3 subs r3, r2, r3 80066ea: 663b str r3, [r7, #96] ; 0x60 y5=yl-yd; 80066ec: 6e7a ldr r2, [r7, #100] ; 0x64 80066ee: 6ebb ldr r3, [r7, #104] ; 0x68 80066f0: 1ad3 subs r3, r2, r3 80066f2: 65fb str r3, [r7, #92] ; 0x5c //Õâ¸öµãÈç¹ûÊǸºÊý£¬¿Ï¶¨ÓÐ´í£¬¿ÉÄÜÊÇxy¸ã·´ÁË if(x5<0||y5<0) 80066f4: 6e3b ldr r3, [r7, #96] ; 0x60 80066f6: 2b00 cmp r3, #0 80066f8: db12 blt.n 8006720 80066fa: 6dfb ldr r3, [r7, #92] ; 0x5c 80066fc: 2b00 cmp r3, #0 80066fe: da23 bge.n 8006748 8006700: e00e b.n 8006720 8006702: bf00 nop 8006704: 40011c00 .word 0x40011c00 8006708: 08009fcc .word 0x08009fcc 800670c: 08009fd8 .word 0x08009fd8 8006710: 08009fe4 .word 0x08009fe4 8006714: 08009ff8 .word 0x08009ff8 8006718: 0800a00c .word 0x0800a00c 800671c: 0800a020 .word 0x0800a020 { //ÏÔʾerror sprintf(str,"ERROR"); 8006720: f107 030c add.w r3, r7, #12 8006724: 4973 ldr r1, [pc, #460] ; (80068f4 ) 8006726: 4618 mov r0, r3 8006728: f001 fb94 bl 8007e54 LCD_ShowString(0,66+16+16+16+16,str,16,RED, GRAY); 800672c: f107 020c add.w r2, r7, #12 8006730: f248 4330 movw r3, #33840 ; 0x8430 8006734: 9301 str r3, [sp, #4] 8006736: f44f 4378 mov.w r3, #63488 ; 0xf800 800673a: 9300 str r3, [sp, #0] 800673c: 2310 movs r3, #16 800673e: 2182 movs r1, #130 ; 0x82 8006740: 2000 movs r0, #0 8006742: f7ff f973 bl 8005a2c 8006746: e0bf b.n 80068c8 }else { //¼ÆËã¹Øϵ±¶ÂÊ //adµÄ³¤±ß¼õÈ¥¶Ì±ßÔÙ³ýȥʵ¼ÊÆÁÄ»ÏñËصij¤±ß¼õ¶Ì±ß£¨260=320-30-30£¬180=240-30-30£© acc_x=x5/260.0; 8006748: 6e38 ldr r0, [r7, #96] ; 0x60 800674a: f7f9 fec7 bl 80004dc <__aeabi_i2d> 800674e: f04f 0200 mov.w r2, #0 8006752: 4b69 ldr r3, [pc, #420] ; (80068f8 ) 8006754: f7fa f856 bl 8000804 <__aeabi_ddiv> 8006758: 4602 mov r2, r0 800675a: 460b mov r3, r1 800675c: 4610 mov r0, r2 800675e: 4619 mov r1, r3 8006760: f7fa f9fe bl 8000b60 <__aeabi_d2f> 8006764: 4603 mov r3, r0 8006766: 65bb str r3, [r7, #88] ; 0x58 acc_y=y5/180.0; 8006768: 6df8 ldr r0, [r7, #92] ; 0x5c 800676a: f7f9 feb7 bl 80004dc <__aeabi_i2d> 800676e: f04f 0200 mov.w r2, #0 8006772: 4b62 ldr r3, [pc, #392] ; (80068fc ) 8006774: f7fa f846 bl 8000804 <__aeabi_ddiv> 8006778: 4602 mov r2, r0 800677a: 460b mov r3, r1 800677c: 4610 mov r0, r2 800677e: 4619 mov r1, r3 8006780: f7fa f9ee bl 8000b60 <__aeabi_d2f> 8006784: 4603 mov r3, r0 8006786: 657b str r3, [r7, #84] ; 0x54 //ÑéÖ¤±¶ÂÊ£¬½«Êµ¼ÊÖµ¼õÈ¥ÑéÖ¤Öµ¾ÍµÈÓÚÎó²îÖµ£¬ÒòΪÓÐÁ½¸öµã£¬ËùÒÔ¼ÆËãÁËÁ½¸öÎó²îºóÇóÁËƽ¾ùÖµ offset_x=(((xd/acc_x)-30)+((xl/acc_x)-290))/2; 8006788: 6f38 ldr r0, [r7, #112] ; 0x70 800678a: f7fa faf3 bl 8000d74 <__aeabi_i2f> 800678e: 4603 mov r3, r0 8006790: 6db9 ldr r1, [r7, #88] ; 0x58 8006792: 4618 mov r0, r3 8006794: f7fa fbf6 bl 8000f84 <__aeabi_fdiv> 8006798: 4603 mov r3, r0 800679a: 4959 ldr r1, [pc, #356] ; (8006900 ) 800679c: 4618 mov r0, r3 800679e: f7fa fa33 bl 8000c08 <__aeabi_fsub> 80067a2: 4603 mov r3, r0 80067a4: 461c mov r4, r3 80067a6: 6ef8 ldr r0, [r7, #108] ; 0x6c 80067a8: f7fa fae4 bl 8000d74 <__aeabi_i2f> 80067ac: 4603 mov r3, r0 80067ae: 6db9 ldr r1, [r7, #88] ; 0x58 80067b0: 4618 mov r0, r3 80067b2: f7fa fbe7 bl 8000f84 <__aeabi_fdiv> 80067b6: 4603 mov r3, r0 80067b8: 4952 ldr r1, [pc, #328] ; (8006904 ) 80067ba: 4618 mov r0, r3 80067bc: f7fa fa24 bl 8000c08 <__aeabi_fsub> 80067c0: 4603 mov r3, r0 80067c2: 4619 mov r1, r3 80067c4: 4620 mov r0, r4 80067c6: f7fa fa21 bl 8000c0c <__addsf3> 80067ca: 4603 mov r3, r0 80067cc: f04f 4180 mov.w r1, #1073741824 ; 0x40000000 80067d0: 4618 mov r0, r3 80067d2: f7fa fbd7 bl 8000f84 <__aeabi_fdiv> 80067d6: 4603 mov r3, r0 80067d8: 4618 mov r0, r3 80067da: f7fa fc6f bl 80010bc <__aeabi_f2iz> 80067de: 4603 mov r3, r0 80067e0: 653b str r3, [r7, #80] ; 0x50 offset_y=(((yd/acc_y)-30)+((yl/acc_y)-210))/2; 80067e2: 6eb8 ldr r0, [r7, #104] ; 0x68 80067e4: f7fa fac6 bl 8000d74 <__aeabi_i2f> 80067e8: 4603 mov r3, r0 80067ea: 6d79 ldr r1, [r7, #84] ; 0x54 80067ec: 4618 mov r0, r3 80067ee: f7fa fbc9 bl 8000f84 <__aeabi_fdiv> 80067f2: 4603 mov r3, r0 80067f4: 4942 ldr r1, [pc, #264] ; (8006900 ) 80067f6: 4618 mov r0, r3 80067f8: f7fa fa06 bl 8000c08 <__aeabi_fsub> 80067fc: 4603 mov r3, r0 80067fe: 461c mov r4, r3 8006800: 6e78 ldr r0, [r7, #100] ; 0x64 8006802: f7fa fab7 bl 8000d74 <__aeabi_i2f> 8006806: 4603 mov r3, r0 8006808: 6d79 ldr r1, [r7, #84] ; 0x54 800680a: 4618 mov r0, r3 800680c: f7fa fbba bl 8000f84 <__aeabi_fdiv> 8006810: 4603 mov r3, r0 8006812: 493d ldr r1, [pc, #244] ; (8006908 ) 8006814: 4618 mov r0, r3 8006816: f7fa f9f7 bl 8000c08 <__aeabi_fsub> 800681a: 4603 mov r3, r0 800681c: 4619 mov r1, r3 800681e: 4620 mov r0, r4 8006820: f7fa f9f4 bl 8000c0c <__addsf3> 8006824: 4603 mov r3, r0 8006826: f04f 4180 mov.w r1, #1073741824 ; 0x40000000 800682a: 4618 mov r0, r3 800682c: f7fa fbaa bl 8000f84 <__aeabi_fdiv> 8006830: 4603 mov r3, r0 8006832: 4618 mov r0, r3 8006834: f7fa fc42 bl 80010bc <__aeabi_f2iz> 8006838: 4603 mov r3, r0 800683a: 64fb str r3, [r7, #76] ; 0x4c //±£´æ¼ÆËã½á¹û tconfig.x_acc=acc_x; 800683c: 4a33 ldr r2, [pc, #204] ; (800690c ) 800683e: 6dbb ldr r3, [r7, #88] ; 0x58 8006840: 6053 str r3, [r2, #4] tconfig.x_offset=offset_x; 8006842: 4a32 ldr r2, [pc, #200] ; (800690c ) 8006844: 6d3b ldr r3, [r7, #80] ; 0x50 8006846: 60d3 str r3, [r2, #12] tconfig.y_acc=acc_y; 8006848: 4a30 ldr r2, [pc, #192] ; (800690c ) 800684a: 6d7b ldr r3, [r7, #84] ; 0x54 800684c: 6093 str r3, [r2, #8] tconfig.y_offset=offset_y; 800684e: 4a2f ldr r2, [pc, #188] ; (800690c ) 8006850: 6cfb ldr r3, [r7, #76] ; 0x4c 8006852: 6113 str r3, [r2, #16] //eeprom¿é±ê¼Ç tconfig.begin=0xab; 8006854: 4b2d ldr r3, [pc, #180] ; (800690c ) 8006856: 22ab movs r2, #171 ; 0xab 8006858: 701a strb r2, [r3, #0] tconfig.end=0xcd; 800685a: 4b2c ldr r3, [pc, #176] ; (800690c ) 800685c: 22cd movs r2, #205 ; 0xcd 800685e: 751a strb r2, [r3, #20] //ÏÔʾ¼ÆËã½á¹û sprintf(str,"x_acc=%f y_acc=%f",acc_x,acc_y); 8006860: 6db8 ldr r0, [r7, #88] ; 0x58 8006862: f7f9 fe4d bl 8000500 <__aeabi_f2d> 8006866: 4604 mov r4, r0 8006868: 460d mov r5, r1 800686a: 6d78 ldr r0, [r7, #84] ; 0x54 800686c: f7f9 fe48 bl 8000500 <__aeabi_f2d> 8006870: 4602 mov r2, r0 8006872: 460b mov r3, r1 8006874: f107 000c add.w r0, r7, #12 8006878: e9cd 2300 strd r2, r3, [sp] 800687c: 4622 mov r2, r4 800687e: 462b mov r3, r5 8006880: 4923 ldr r1, [pc, #140] ; (8006910 ) 8006882: f001 fae7 bl 8007e54 LCD_ShowString(0,66+16+16+16+16,str,16,RED,RED); 8006886: f107 020c add.w r2, r7, #12 800688a: f44f 4378 mov.w r3, #63488 ; 0xf800 800688e: 9301 str r3, [sp, #4] 8006890: f44f 4378 mov.w r3, #63488 ; 0xf800 8006894: 9300 str r3, [sp, #0] 8006896: 2310 movs r3, #16 8006898: 2182 movs r1, #130 ; 0x82 800689a: 2000 movs r0, #0 800689c: f7ff f8c6 bl 8005a2c sprintf(str,"x_offset=%d y_offset=%d",offset_x,offset_y); 80068a0: f107 000c add.w r0, r7, #12 80068a4: 6cfb ldr r3, [r7, #76] ; 0x4c 80068a6: 6d3a ldr r2, [r7, #80] ; 0x50 80068a8: 491a ldr r1, [pc, #104] ; (8006914 ) 80068aa: f001 fad3 bl 8007e54 LCD_ShowString(0,66+16+16+16+16+16,str,16,RED,RED); 80068ae: f107 020c add.w r2, r7, #12 80068b2: f44f 4378 mov.w r3, #63488 ; 0xf800 80068b6: 9301 str r3, [sp, #4] 80068b8: f44f 4378 mov.w r3, #63488 ; 0xf800 80068bc: 9300 str r3, [sp, #0] 80068be: 2310 movs r3, #16 80068c0: 2192 movs r1, #146 ; 0x92 80068c2: 2000 movs r0, #0 80068c4: f7ff f8b2 bl 8005a2c } //½«½á¹û±£´æÆðÀ´ EEPROM_WRITE_BATY(16,(char *)&tconfig,sizeof(touch_config)); 80068c8: 2218 movs r2, #24 80068ca: 4910 ldr r1, [pc, #64] ; (800690c ) 80068cc: 2010 movs r0, #16 80068ce: f7ff f9f7 bl 8005cc0 HAL_Delay(1000); 80068d2: f44f 707a mov.w r0, #1000 ; 0x3e8 80068d6: f7fb fa4b bl 8001d70 return; 80068da: e008 b.n 80068ee while(HAL_GetTick() 80068e0: 4602 mov r2, r0 80068e2: 6fbb ldr r3, [r7, #120] ; 0x78 80068e4: 4293 cmp r3, r2 80068e6: f63f ad6d bhi.w 80063c4 80068ea: e000 b.n 80068ee return; //ÒѾ­Ð£×¼¹ýÁË 80068ec: bf00 nop } } } 80068ee: 3790 adds r7, #144 ; 0x90 80068f0: 46bd mov sp, r7 80068f2: bdb0 pop {r4, r5, r7, pc} 80068f4: 0800a034 .word 0x0800a034 80068f8: 40704000 .word 0x40704000 80068fc: 40668000 .word 0x40668000 8006900: 41f00000 .word 0x41f00000 8006904: 43910000 .word 0x43910000 8006908: 43520000 .word 0x43520000 800690c: 200003ec .word 0x200003ec 8006910: 0800a03c .word 0x0800a03c 8006914: 0800a050 .word 0x0800a050 08006918 : #include "APP_keyboard.h" window *keyboard_window; void APP_KEYBOARD_init(window *a_window) { 8006918: b480 push {r7} 800691a: b083 sub sp, #12 800691c: af00 add r7, sp, #0 800691e: 6078 str r0, [r7, #4] keyboard_window=a_window; 8006920: 4a03 ldr r2, [pc, #12] ; (8006930 ) 8006922: 687b ldr r3, [r7, #4] 8006924: 6013 str r3, [r2, #0] } 8006926: bf00 nop 8006928: 370c adds r7, #12 800692a: 46bd mov sp, r7 800692c: bc80 pop {r7} 800692e: 4770 bx lr 8006930: 20000404 .word 0x20000404 08006934 : IIC_SAND_DATE(MAX30102_Device_address,REG_LED2_PA,&a,1);// Choose value for ~ 10mA for LED2 a=0x7f; IIC_SAND_DATE(MAX30102_Device_address,REG_PILOT_PA,&a,1);// Choose value for ~ 25mA for Pilot LED } void max30102_read_fifo(void) { 8006934: b580 push {r7, lr} 8006936: b082 sub sp, #8 8006938: af00 add r7, sp, #0 uint16_t un_temp; fifo_red=0; 800693a: 4b3c ldr r3, [pc, #240] ; (8006a2c ) 800693c: 2200 movs r2, #0 800693e: 801a strh r2, [r3, #0] fifo_ir=0; 8006940: 4b3b ldr r3, [pc, #236] ; (8006a30 ) 8006942: 2200 movs r2, #0 8006944: 801a strh r2, [r3, #0] uint8_t ach_i2c_data[6]; //read and clear status register IIC_READ_DATE(MAX30102_Device_address,REG_INTR_STATUS_1,&ach_i2c_data,1); 8006946: 463a mov r2, r7 8006948: 2301 movs r3, #1 800694a: 2100 movs r1, #0 800694c: 20ae movs r0, #174 ; 0xae 800694e: f7ff fa1b bl 8005d88 IIC_READ_DATE(MAX30102_Device_address,REG_INTR_STATUS_2,&ach_i2c_data,1); 8006952: 463a mov r2, r7 8006954: 2301 movs r3, #1 8006956: 2101 movs r1, #1 8006958: 20ae movs r0, #174 ; 0xae 800695a: f7ff fa15 bl 8005d88 ach_i2c_data[0]=REG_FIFO_DATA; 800695e: 2307 movs r3, #7 8006960: 703b strb r3, [r7, #0] IIC_READ_DATE(MAX30102_Device_address,REG_FIFO_DATA,&ach_i2c_data,6); 8006962: 463a mov r2, r7 8006964: 2306 movs r3, #6 8006966: 2107 movs r1, #7 8006968: 20ae movs r0, #174 ; 0xae 800696a: f7ff fa0d bl 8005d88 un_temp=ach_i2c_data[0]; 800696e: 783b ldrb r3, [r7, #0] 8006970: 80fb strh r3, [r7, #6] un_temp<<=14; 8006972: 88fb ldrh r3, [r7, #6] 8006974: 039b lsls r3, r3, #14 8006976: 80fb strh r3, [r7, #6] fifo_red+=un_temp; 8006978: 4b2c ldr r3, [pc, #176] ; (8006a2c ) 800697a: 881a ldrh r2, [r3, #0] 800697c: 88fb ldrh r3, [r7, #6] 800697e: 4413 add r3, r2 8006980: b29a uxth r2, r3 8006982: 4b2a ldr r3, [pc, #168] ; (8006a2c ) 8006984: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[1]; 8006986: 787b ldrb r3, [r7, #1] 8006988: 80fb strh r3, [r7, #6] un_temp<<=6; 800698a: 88fb ldrh r3, [r7, #6] 800698c: 019b lsls r3, r3, #6 800698e: 80fb strh r3, [r7, #6] fifo_red+=un_temp; 8006990: 4b26 ldr r3, [pc, #152] ; (8006a2c ) 8006992: 881a ldrh r2, [r3, #0] 8006994: 88fb ldrh r3, [r7, #6] 8006996: 4413 add r3, r2 8006998: b29a uxth r2, r3 800699a: 4b24 ldr r3, [pc, #144] ; (8006a2c ) 800699c: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[2]; 800699e: 78bb ldrb r3, [r7, #2] 80069a0: 80fb strh r3, [r7, #6] un_temp>>=2; 80069a2: 88fb ldrh r3, [r7, #6] 80069a4: 089b lsrs r3, r3, #2 80069a6: 80fb strh r3, [r7, #6] fifo_red+=un_temp; 80069a8: 4b20 ldr r3, [pc, #128] ; (8006a2c ) 80069aa: 881a ldrh r2, [r3, #0] 80069ac: 88fb ldrh r3, [r7, #6] 80069ae: 4413 add r3, r2 80069b0: b29a uxth r2, r3 80069b2: 4b1e ldr r3, [pc, #120] ; (8006a2c ) 80069b4: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[3]; 80069b6: 78fb ldrb r3, [r7, #3] 80069b8: 80fb strh r3, [r7, #6] un_temp<<=14; 80069ba: 88fb ldrh r3, [r7, #6] 80069bc: 039b lsls r3, r3, #14 80069be: 80fb strh r3, [r7, #6] fifo_ir+=un_temp; 80069c0: 4b1b ldr r3, [pc, #108] ; (8006a30 ) 80069c2: 881a ldrh r2, [r3, #0] 80069c4: 88fb ldrh r3, [r7, #6] 80069c6: 4413 add r3, r2 80069c8: b29a uxth r2, r3 80069ca: 4b19 ldr r3, [pc, #100] ; (8006a30 ) 80069cc: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[4]; 80069ce: 793b ldrb r3, [r7, #4] 80069d0: 80fb strh r3, [r7, #6] un_temp<<=6; 80069d2: 88fb ldrh r3, [r7, #6] 80069d4: 019b lsls r3, r3, #6 80069d6: 80fb strh r3, [r7, #6] fifo_ir+=un_temp; 80069d8: 4b15 ldr r3, [pc, #84] ; (8006a30 ) 80069da: 881a ldrh r2, [r3, #0] 80069dc: 88fb ldrh r3, [r7, #6] 80069de: 4413 add r3, r2 80069e0: b29a uxth r2, r3 80069e2: 4b13 ldr r3, [pc, #76] ; (8006a30 ) 80069e4: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[5]; 80069e6: 797b ldrb r3, [r7, #5] 80069e8: 80fb strh r3, [r7, #6] un_temp>>=2; 80069ea: 88fb ldrh r3, [r7, #6] 80069ec: 089b lsrs r3, r3, #2 80069ee: 80fb strh r3, [r7, #6] fifo_ir+=un_temp; 80069f0: 4b0f ldr r3, [pc, #60] ; (8006a30 ) 80069f2: 881a ldrh r2, [r3, #0] 80069f4: 88fb ldrh r3, [r7, #6] 80069f6: 4413 add r3, r2 80069f8: b29a uxth r2, r3 80069fa: 4b0d ldr r3, [pc, #52] ; (8006a30 ) 80069fc: 801a strh r2, [r3, #0] if(fifo_ir<=10000) 80069fe: 4b0c ldr r3, [pc, #48] ; (8006a30 ) 8006a00: 881b ldrh r3, [r3, #0] 8006a02: f242 7210 movw r2, #10000 ; 0x2710 8006a06: 4293 cmp r3, r2 8006a08: d802 bhi.n 8006a10 { fifo_ir=0; 8006a0a: 4b09 ldr r3, [pc, #36] ; (8006a30 ) 8006a0c: 2200 movs r2, #0 8006a0e: 801a strh r2, [r3, #0] } if(fifo_red<=10000) 8006a10: 4b06 ldr r3, [pc, #24] ; (8006a2c ) 8006a12: 881b ldrh r3, [r3, #0] 8006a14: f242 7210 movw r2, #10000 ; 0x2710 8006a18: 4293 cmp r3, r2 8006a1a: d802 bhi.n 8006a22 { fifo_red=0; 8006a1c: 4b03 ldr r3, [pc, #12] ; (8006a2c ) 8006a1e: 2200 movs r2, #0 8006a20: 801a strh r2, [r3, #0] } } 8006a22: bf00 nop 8006a24: 3708 adds r7, #8 8006a26: 46bd mov sp, r7 8006a28: bd80 pop {r7, pc} 8006a2a: bf00 nop 8006a2c: 20000408 .word 0x20000408 8006a30: 2000040a .word 0x2000040a 08006a34 : } void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)//10us { 8006a34: b590 push {r4, r7, lr} 8006a36: b083 sub sp, #12 8006a38: af00 add r7, sp, #0 8006a3a: 6078 str r0, [r7, #4] if (htim == (&htim6)) 8006a3c: 687b ldr r3, [r7, #4] 8006a3e: 4a21 ldr r2, [pc, #132] ; (8006ac4 ) 8006a40: 4293 cmp r3, r2 8006a42: d13a bne.n 8006aba { max30102_read_fifo(); //read from MAX30102 FIFO2 8006a44: f7ff ff76 bl 8006934 //½«Êý¾ÝдÈëfftÊäÈë²¢Çå³ýÊä³ö s1[g_fft_index].real = fifo_red; 8006a48: 4b1f ldr r3, [pc, #124] ; (8006ac8 ) 8006a4a: 881b ldrh r3, [r3, #0] 8006a4c: 4a1f ldr r2, [pc, #124] ; (8006acc ) 8006a4e: 8812 ldrh r2, [r2, #0] 8006a50: 4614 mov r4, r2 8006a52: 4618 mov r0, r3 8006a54: f7fa f98a bl 8000d6c <__aeabi_ui2f> 8006a58: 4603 mov r3, r0 8006a5a: 4a1d ldr r2, [pc, #116] ; (8006ad0 ) 8006a5c: f842 3034 str.w r3, [r2, r4, lsl #3] s1[g_fft_index].imag= 0; 8006a60: 4b1a ldr r3, [pc, #104] ; (8006acc ) 8006a62: 881b ldrh r3, [r3, #0] 8006a64: 4a1a ldr r2, [pc, #104] ; (8006ad0 ) 8006a66: 00db lsls r3, r3, #3 8006a68: 4413 add r3, r2 8006a6a: f04f 0200 mov.w r2, #0 8006a6e: 605a str r2, [r3, #4] s2[g_fft_index].real = fifo_ir; 8006a70: 4b18 ldr r3, [pc, #96] ; (8006ad4 ) 8006a72: 881b ldrh r3, [r3, #0] 8006a74: 4a15 ldr r2, [pc, #84] ; (8006acc ) 8006a76: 8812 ldrh r2, [r2, #0] 8006a78: 4614 mov r4, r2 8006a7a: 4618 mov r0, r3 8006a7c: f7fa f976 bl 8000d6c <__aeabi_ui2f> 8006a80: 4603 mov r3, r0 8006a82: 4a15 ldr r2, [pc, #84] ; (8006ad8 ) 8006a84: f842 3034 str.w r3, [r2, r4, lsl #3] s2[g_fft_index].imag= 0; 8006a88: 4b10 ldr r3, [pc, #64] ; (8006acc ) 8006a8a: 881b ldrh r3, [r3, #0] 8006a8c: 4a12 ldr r2, [pc, #72] ; (8006ad8 ) 8006a8e: 00db lsls r3, r3, #3 8006a90: 4413 add r3, r2 8006a92: f04f 0200 mov.w r2, #0 8006a96: 605a str r2, [r3, #4] g_fft_index++; 8006a98: 4b0c ldr r3, [pc, #48] ; (8006acc ) 8006a9a: 881b ldrh r3, [r3, #0] 8006a9c: 3301 adds r3, #1 8006a9e: b29a uxth r2, r3 8006aa0: 4b0a ldr r3, [pc, #40] ; (8006acc ) 8006aa2: 801a strh r2, [r3, #0] if(g_fft_index>FFT_N) 8006aa4: 4b09 ldr r3, [pc, #36] ; (8006acc ) 8006aa6: 881b ldrh r3, [r3, #0] 8006aa8: f5b3 7f00 cmp.w r3, #512 ; 0x200 8006aac: d905 bls.n 8006aba { get_data_flag=1; 8006aae: 4b0b ldr r3, [pc, #44] ; (8006adc ) 8006ab0: 2201 movs r2, #1 8006ab2: 701a strb r2, [r3, #0] HAL_TIM_Base_Stop_IT(&htim6); 8006ab4: 4803 ldr r0, [pc, #12] ; (8006ac4 ) 8006ab6: f7fd f977 bl 8003da8 } } } 8006aba: bf00 nop 8006abc: 370c adds r7, #12 8006abe: 46bd mov sp, r7 8006ac0: bd90 pop {r4, r7, pc} 8006ac2: bf00 nop 8006ac4: 200002e4 .word 0x200002e4 8006ac8: 20000408 .word 0x20000408 8006acc: 2000250e .word 0x2000250e 8006ad0: 2000040c .word 0x2000040c 8006ad4: 2000040a .word 0x2000040a 8006ad8: 2000148c .word 0x2000148c 8006adc: 2000250c .word 0x2000250c 08006ae0 : #include "APP_colorcontrol.h" window *colorcontrol_window; void APP_COLORCONTROL_init(window *a_window) { 8006ae0: b480 push {r7} 8006ae2: b083 sub sp, #12 8006ae4: af00 add r7, sp, #0 8006ae6: 6078 str r0, [r7, #4] colorcontrol_window=a_window; 8006ae8: 4a03 ldr r2, [pc, #12] ; (8006af8 ) 8006aea: 687b ldr r3, [r7, #4] 8006aec: 6013 str r3, [r2, #0] } 8006aee: bf00 nop 8006af0: 370c adds r7, #12 8006af2: 46bd mov sp, r7 8006af4: bc80 pop {r7} 8006af6: 4770 bx lr 8006af8: 20002510 .word 0x20002510 08006afc : void main_app() { 8006afc: b580 push {r7, lr} 8006afe: b096 sub sp, #88 ; 0x58 8006b00: af04 add r7, sp, #16 HAL_TIM_PWM_Start(&htim4,TIM_CHANNEL_3);//Æô¶¯nͨµÀµÄpwm 8006b02: 2108 movs r1, #8 8006b04: 4837 ldr r0, [pc, #220] ; (8006be4 ) 8006b06: f7fd f9d5 bl 8003eb4 char str[64]; LCDx_Init(); 8006b0a: f7fe fbeb bl 80052e4 EPPROM_SLOWWRITE_INIT(); 8006b0e: f7ff f865 bl 8005bdc if(KEY1==0&&KEY3==0) 8006b12: 2110 movs r1, #16 8006b14: 4834 ldr r0, [pc, #208] ; (8006be8 ) 8006b16: f7fb fbf1 bl 80022fc 8006b1a: 4603 mov r3, r0 8006b1c: 2b00 cmp r3, #0 8006b1e: d10a bne.n 8006b36 8006b20: 2104 movs r1, #4 8006b22: 4831 ldr r0, [pc, #196] ; (8006be8 ) 8006b24: f7fb fbea bl 80022fc 8006b28: 4603 mov r3, r0 8006b2a: 2b00 cmp r3, #0 8006b2c: d103 bne.n 8006b36 { TP_adjustment(1); 8006b2e: 2001 movs r0, #1 8006b30: f7ff fc0e bl 8006350 8006b34: e002 b.n 8006b3c }else { TP_adjustment(0); 8006b36: 2000 movs r0, #0 8006b38: f7ff fc0a bl 8006350 } UI *ui=UI_Init(BLACK); 8006b3c: 2000 movs r0, #0 8006b3e: f000 f889 bl 8006c54 8006b42: 6478 str r0, [r7, #68] ; 0x44 //New_Window(ui,80,80,60,90,YELLOW,"YELLOW"); //New_Window(ui,120,90,70,60,MAGENTA,"MAGENTA"); //APP_morsecode_init(New_Window(ui,25,30,200,150,CYAN,"Morse code")); APP_COLORCONTROL_init(New_Window(ui,20,30,300,64,CYAN,"COLORCONTROL")); 8006b44: 4b29 ldr r3, [pc, #164] ; (8006bec ) 8006b46: 9302 str r3, [sp, #8] 8006b48: f647 73ff movw r3, #32767 ; 0x7fff 8006b4c: 9301 str r3, [sp, #4] 8006b4e: 2340 movs r3, #64 ; 0x40 8006b50: 9300 str r3, [sp, #0] 8006b52: f44f 7396 mov.w r3, #300 ; 0x12c 8006b56: 221e movs r2, #30 8006b58: 2114 movs r1, #20 8006b5a: 6c78 ldr r0, [r7, #68] ; 0x44 8006b5c: f000 f8ad bl 8006cba 8006b60: 4603 mov r3, r0 8006b62: 4618 mov r0, r3 8006b64: f7ff ffbc bl 8006ae0 APP_KEYBOARD_init(New_Window(ui,10,60,200,100,WHITE,"KEYBOARD")); 8006b68: 4b21 ldr r3, [pc, #132] ; (8006bf0 ) 8006b6a: 9302 str r3, [sp, #8] 8006b6c: f64f 73ff movw r3, #65535 ; 0xffff 8006b70: 9301 str r3, [sp, #4] 8006b72: 2364 movs r3, #100 ; 0x64 8006b74: 9300 str r3, [sp, #0] 8006b76: 23c8 movs r3, #200 ; 0xc8 8006b78: 223c movs r2, #60 ; 0x3c 8006b7a: 210a movs r1, #10 8006b7c: 6c78 ldr r0, [r7, #68] ; 0x44 8006b7e: f000 f89c bl 8006cba 8006b82: 4603 mov r3, r0 8006b84: 4618 mov r0, r3 8006b86: f7ff fec7 bl 8006918 ui->refresh_ui_flag=1; 8006b8a: 6c7a ldr r2, [r7, #68] ; 0x44 8006b8c: f892 3020 ldrb.w r3, [r2, #32] 8006b90: f043 0304 orr.w r3, r3, #4 8006b94: f882 3020 strb.w r3, [r2, #32] // ½»²æ±àÒë²âÊÔ //APP_blood_loop(); //APP_IDcard_loop(); //APP_morsecode_loop(); GEI_BUTTON_CODE(&k1,KEY1); 8006b98: 2110 movs r1, #16 8006b9a: 4813 ldr r0, [pc, #76] ; (8006be8 ) 8006b9c: f7fb fbae bl 80022fc 8006ba0: 4603 mov r3, r0 8006ba2: 4619 mov r1, r3 8006ba4: 4813 ldr r0, [pc, #76] ; (8006bf4 ) 8006ba6: f7ff f90d bl 8005dc4 GEI_BUTTON_CODE(&k2,KEY2); 8006baa: 2108 movs r1, #8 8006bac: 480e ldr r0, [pc, #56] ; (8006be8 ) 8006bae: f7fb fba5 bl 80022fc 8006bb2: 4603 mov r3, r0 8006bb4: 4619 mov r1, r3 8006bb6: 4810 ldr r0, [pc, #64] ; (8006bf8 ) 8006bb8: f7ff f904 bl 8005dc4 GEI_BUTTON_CODE(&k3,KEY3); 8006bbc: 2104 movs r1, #4 8006bbe: 480a ldr r0, [pc, #40] ; (8006be8 ) 8006bc0: f7fb fb9c bl 80022fc 8006bc4: 4603 mov r3, r0 8006bc6: 4619 mov r1, r3 8006bc8: 480c ldr r0, [pc, #48] ; (8006bfc ) 8006bca: f7ff f8fb bl 8005dc4 UI_Server(ui); 8006bce: 6c78 ldr r0, [r7, #68] ; 0x44 8006bd0: f000 fa66 bl 80070a0 TP_Server(); 8006bd4: f7ff fae8 bl 80061a8 EEPROM_SLOWWRITE_SERVER(); 8006bd8: f7ff f81a bl 8005c10 buzzer_play_server(); 8006bdc: f7fe ffc4 bl 8005b68 { 8006be0: e7da b.n 8006b98 8006be2: bf00 nop 8006be4: 2000029c .word 0x2000029c 8006be8: 40011800 .word 0x40011800 8006bec: 0800a068 .word 0x0800a068 8006bf0: 0800a078 .word 0x0800a078 8006bf4: 200003ac .word 0x200003ac 8006bf8: 200003bc .word 0x200003bc 8006bfc: 200003cc .word 0x200003cc 08006c00 : #include "touch.h" extern touch_device t0; //½Ó¿Ú //ÉèÖÃÆÁÄ»ÏñËØ×ø±ê void Inteface_SetCursor(uint16_t Xpos, uint16_t Ypos) { 8006c00: b580 push {r7, lr} 8006c02: b082 sub sp, #8 8006c04: af00 add r7, sp, #0 8006c06: 4603 mov r3, r0 8006c08: 460a mov r2, r1 8006c0a: 80fb strh r3, [r7, #6] 8006c0c: 4613 mov r3, r2 8006c0e: 80bb strh r3, [r7, #4] LCD_SetCursor(Xpos,Ypos); //ÉèÖùâ±êλÖà 8006c10: 88ba ldrh r2, [r7, #4] 8006c12: 88fb ldrh r3, [r7, #6] 8006c14: 4611 mov r1, r2 8006c16: 4618 mov r0, r3 8006c18: f7fe fc5a bl 80054d0 LCD_REG_ADDRESS=lcddev.wramcmd; //¿ªÊ¼Ð´ÈëGRAM 8006c1c: 4b04 ldr r3, [pc, #16] ; (8006c30 ) 8006c1e: 79da ldrb r2, [r3, #7] 8006c20: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000 8006c24: b292 uxth r2, r2 8006c26: 801a strh r2, [r3, #0] } 8006c28: bf00 nop 8006c2a: 3708 adds r7, #8 8006c2c: 46bd mov sp, r7 8006c2e: bd80 pop {r7, pc} 8006c30: 20000380 .word 0x20000380 08006c34 : //ÍùÏñËØ×ø±êдÈëÒ»¸öÑÕÉ« void Inteface_SetColor(uint16_t color) { 8006c34: b480 push {r7} 8006c36: b083 sub sp, #12 8006c38: af00 add r7, sp, #0 8006c3a: 4603 mov r3, r0 8006c3c: 80fb strh r3, [r7, #6] LCD_DATA_ADDRESS=color; 8006c3e: 4a04 ldr r2, [pc, #16] ; (8006c50 ) 8006c40: 88fb ldrh r3, [r7, #6] 8006c42: 8013 strh r3, [r2, #0] } 8006c44: bf00 nop 8006c46: 370c adds r7, #12 8006c48: 46bd mov sp, r7 8006c4a: bc80 pop {r7} 8006c4c: 4770 bx lr 8006c4e: bf00 nop 8006c50: 6c000800 .word 0x6c000800 08006c54 : //н¨Ò»¸öUI¶ÔÏó //µ±Ê±¶¼Ïë·¨ÊÇÀàËÆwindowsµÄ¶à×ÀÃ棬ÿ¸ö×ÀÃ涼ÄÜÓÐn¸ö´°¿Ú UI *UI_Init(COLOR_16 background) { 8006c54: b580 push {r7, lr} 8006c56: b084 sub sp, #16 8006c58: af00 add r7, sp, #0 8006c5a: 6078 str r0, [r7, #4] UI *ui; ui = (UI*)malloc(sizeof(UI)); 8006c5c: 2024 movs r0, #36 ; 0x24 8006c5e: f000 fb1d bl 800729c 8006c62: 4603 mov r3, r0 8006c64: 60fb str r3, [r7, #12] if(ui!=NULL) 8006c66: 68fb ldr r3, [r7, #12] 8006c68: 2b00 cmp r3, #0 8006c6a: d021 beq.n 8006cb0 { ui->x=0; 8006c6c: 68fb ldr r3, [r7, #12] 8006c6e: 2200 movs r2, #0 8006c70: 809a strh r2, [r3, #4] ui->y=0; 8006c72: 68fb ldr r3, [r7, #12] 8006c74: 2200 movs r2, #0 8006c76: 80da strh r2, [r3, #6] ui->high=240; 8006c78: 68fb ldr r3, [r7, #12] 8006c7a: 22f0 movs r2, #240 ; 0xf0 8006c7c: 815a strh r2, [r3, #10] ui->width=320; 8006c7e: 68fb ldr r3, [r7, #12] 8006c80: f44f 72a0 mov.w r2, #320 ; 0x140 8006c84: 811a strh r2, [r3, #8] ui->background=background; 8006c86: 68fb ldr r3, [r7, #12] 8006c88: 687a ldr r2, [r7, #4] 8006c8a: 601a str r2, [r3, #0] ui->windows=NULL; 8006c8c: 68fb ldr r3, [r7, #12] 8006c8e: 2200 movs r2, #0 8006c90: 60da str r2, [r3, #12] ui->last_windows=NULL; 8006c92: 68fb ldr r3, [r7, #12] 8006c94: 2200 movs r2, #0 8006c96: 611a str r2, [r3, #16] ui->refresh_ui_flag=1; 8006c98: 68fa ldr r2, [r7, #12] 8006c9a: f892 3020 ldrb.w r3, [r2, #32] 8006c9e: f043 0304 orr.w r3, r3, #4 8006ca2: f882 3020 strb.w r3, [r2, #32] ui->moveed_windwos=NULL; 8006ca6: 68fb ldr r3, [r7, #12] 8006ca8: 2200 movs r2, #0 8006caa: 615a str r2, [r3, #20] ui->touch->acc_y=0; } */ return ui; 8006cac: 68fb ldr r3, [r7, #12] 8006cae: e000 b.n 8006cb2 } return NULL; 8006cb0: 2300 movs r3, #0 } 8006cb2: 4618 mov r0, r3 8006cb4: 3710 adds r7, #16 8006cb6: 46bd mov sp, r7 8006cb8: bd80 pop {r7, pc} 08006cba : //н¨Ò»¸ö´°¿Ú //·µ»Ø´°¿ÚµÄÖ¸Õë //½«´°¿Ú¹ÒÔص½Ä³¸öui window *New_Window(UI *ui,uint16_t x,uint16_t y,uint16_t width,uint16_t high,COLOR_16 background,const char *title) { 8006cba: b580 push {r7, lr} 8006cbc: b088 sub sp, #32 8006cbe: af00 add r7, sp, #0 8006cc0: 60f8 str r0, [r7, #12] 8006cc2: 4608 mov r0, r1 8006cc4: 4611 mov r1, r2 8006cc6: 461a mov r2, r3 8006cc8: 4603 mov r3, r0 8006cca: 817b strh r3, [r7, #10] 8006ccc: 460b mov r3, r1 8006cce: 813b strh r3, [r7, #8] 8006cd0: 4613 mov r3, r2 8006cd2: 80fb strh r3, [r7, #6] window *temp_window; temp_window = (window*)malloc(sizeof(window)); 8006cd4: 201c movs r0, #28 8006cd6: f000 fae1 bl 800729c 8006cda: 4603 mov r3, r0 8006cdc: 617b str r3, [r7, #20] if(temp_window!=NULL) 8006cde: 697b ldr r3, [r7, #20] 8006ce0: 2b00 cmp r3, #0 8006ce2: d022 beq.n 8006d2a { temp_window->background=background; 8006ce4: 697b ldr r3, [r7, #20] 8006ce6: 6afa ldr r2, [r7, #44] ; 0x2c 8006ce8: 609a str r2, [r3, #8] temp_window->high=high; 8006cea: 697b ldr r3, [r7, #20] 8006cec: 8d3a ldrh r2, [r7, #40] ; 0x28 8006cee: 80da strh r2, [r3, #6] temp_window->width=width; 8006cf0: 697b ldr r3, [r7, #20] 8006cf2: 88fa ldrh r2, [r7, #6] 8006cf4: 809a strh r2, [r3, #4] temp_window->x=x; 8006cf6: 697b ldr r3, [r7, #20] 8006cf8: 897a ldrh r2, [r7, #10] 8006cfa: 801a strh r2, [r3, #0] temp_window->y=y; 8006cfc: 697b ldr r3, [r7, #20] 8006cfe: 893a ldrh r2, [r7, #8] 8006d00: 805a strh r2, [r3, #2] for(int a=0;a<16;a++) 8006d02: 2300 movs r3, #0 8006d04: 61fb str r3, [r7, #28] 8006d06: e00c b.n 8006d22 { temp_window->title[a]=title[a]; 8006d08: 69fb ldr r3, [r7, #28] 8006d0a: 6b3a ldr r2, [r7, #48] ; 0x30 8006d0c: 4413 add r3, r2 8006d0e: 7819 ldrb r1, [r3, #0] 8006d10: 697a ldr r2, [r7, #20] 8006d12: 69fb ldr r3, [r7, #28] 8006d14: 4413 add r3, r2 8006d16: 330c adds r3, #12 8006d18: 460a mov r2, r1 8006d1a: 701a strb r2, [r3, #0] for(int a=0;a<16;a++) 8006d1c: 69fb ldr r3, [r7, #28] 8006d1e: 3301 adds r3, #1 8006d20: 61fb str r3, [r7, #28] 8006d22: 69fb ldr r3, [r7, #28] 8006d24: 2b0f cmp r3, #15 8006d26: ddef ble.n 8006d08 8006d28: e001 b.n 8006d2e } }else{return NULL;} 8006d2a: 2300 movs r3, #0 8006d2c: e02a b.n 8006d84 windows_stack *temp_windows_stack; temp_windows_stack=ui->last_windows; 8006d2e: 68fb ldr r3, [r7, #12] 8006d30: 691b ldr r3, [r3, #16] 8006d32: 61bb str r3, [r7, #24] if(temp_windows_stack==NULL) 8006d34: 69bb ldr r3, [r7, #24] 8006d36: 2b00 cmp r3, #0 8006d38: d10b bne.n 8006d52 { temp_windows_stack=(windows_stack*)malloc(sizeof(windows_stack)); 8006d3a: 200c movs r0, #12 8006d3c: f000 faae bl 800729c 8006d40: 4603 mov r3, r0 8006d42: 61bb str r3, [r7, #24] temp_windows_stack->up=NULL; 8006d44: 69bb ldr r3, [r7, #24] 8006d46: 2200 movs r2, #0 8006d48: 601a str r2, [r3, #0] ui->windows=temp_windows_stack; 8006d4a: 68fb ldr r3, [r7, #12] 8006d4c: 69ba ldr r2, [r7, #24] 8006d4e: 60da str r2, [r3, #12] 8006d50: e00e b.n 8006d70 while(temp_windows_stack->next!=NULL) { temp_windows_stack=temp_windows_stack->next; } */ windows_stack *up=temp_windows_stack;//±¸·Ýµ±Ç°¶ÔÏóÖ¸Õë 8006d52: 69bb ldr r3, [r7, #24] 8006d54: 613b str r3, [r7, #16] temp_windows_stack->next=(windows_stack*)malloc(sizeof(windows_stack)); 8006d56: 200c movs r0, #12 8006d58: f000 faa0 bl 800729c 8006d5c: 4603 mov r3, r0 8006d5e: 461a mov r2, r3 8006d60: 69bb ldr r3, [r7, #24] 8006d62: 609a str r2, [r3, #8] temp_windows_stack=temp_windows_stack->next; 8006d64: 69bb ldr r3, [r7, #24] 8006d66: 689b ldr r3, [r3, #8] 8006d68: 61bb str r3, [r7, #24] temp_windows_stack->up=up; 8006d6a: 69bb ldr r3, [r7, #24] 8006d6c: 693a ldr r2, [r7, #16] 8006d6e: 601a str r2, [r3, #0] } temp_windows_stack->next=NULL; 8006d70: 69bb ldr r3, [r7, #24] 8006d72: 2200 movs r2, #0 8006d74: 609a str r2, [r3, #8] temp_windows_stack->window=temp_window; 8006d76: 69bb ldr r3, [r7, #24] 8006d78: 697a ldr r2, [r7, #20] 8006d7a: 605a str r2, [r3, #4] ui->last_windows=temp_windows_stack; 8006d7c: 68fb ldr r3, [r7, #12] 8006d7e: 69ba ldr r2, [r7, #24] 8006d80: 611a str r2, [r3, #16] return temp_window; 8006d82: 697b ldr r3, [r7, #20] } 8006d84: 4618 mov r0, r3 8006d86: 3720 adds r7, #32 8006d88: 46bd mov sp, r7 8006d8a: bd80 pop {r7, pc} 08006d8c : //¹Ø±Õij¸ö´°¿Ú //ͦÂé·³µÄ£¬³ýÁËÒªÊÍ·Å´°¿ÚÄڴ棬»¹ÒªÈ¥uiĨµô´°¿ÚµÄÖ¸Õë void Close_Windows_Stack(UI *ui,windows_stack *temp_windows_stack) { 8006d8c: b580 push {r7, lr} 8006d8e: b082 sub sp, #8 8006d90: af00 add r7, sp, #0 8006d92: 6078 str r0, [r7, #4] 8006d94: 6039 str r1, [r7, #0] if(temp_windows_stack==ui->windows) 8006d96: 687b ldr r3, [r7, #4] 8006d98: 68db ldr r3, [r3, #12] 8006d9a: 683a ldr r2, [r7, #0] 8006d9c: 429a cmp r2, r3 8006d9e: d113 bne.n 8006dc8 { if(temp_windows_stack->next!=NULL) 8006da0: 683b ldr r3, [r7, #0] 8006da2: 689b ldr r3, [r3, #8] 8006da4: 2b00 cmp r3, #0 8006da6: d008 beq.n 8006dba { ui->windows=temp_windows_stack->next; 8006da8: 683b ldr r3, [r7, #0] 8006daa: 689a ldr r2, [r3, #8] 8006dac: 687b ldr r3, [r7, #4] 8006dae: 60da str r2, [r3, #12] ui->windows->up=NULL; 8006db0: 687b ldr r3, [r7, #4] 8006db2: 68db ldr r3, [r3, #12] 8006db4: 2200 movs r2, #0 8006db6: 601a str r2, [r3, #0] 8006db8: e029 b.n 8006e0e }else { ui->windows=NULL; 8006dba: 687b ldr r3, [r7, #4] 8006dbc: 2200 movs r2, #0 8006dbe: 60da str r2, [r3, #12] ui->last_windows=NULL; 8006dc0: 687b ldr r3, [r7, #4] 8006dc2: 2200 movs r2, #0 8006dc4: 611a str r2, [r3, #16] 8006dc6: e022 b.n 8006e0e } }else if(temp_windows_stack==ui->last_windows) 8006dc8: 687b ldr r3, [r7, #4] 8006dca: 691b ldr r3, [r3, #16] 8006dcc: 683a ldr r2, [r7, #0] 8006dce: 429a cmp r2, r3 8006dd0: d113 bne.n 8006dfa { if(temp_windows_stack->up!=NULL) 8006dd2: 683b ldr r3, [r7, #0] 8006dd4: 681b ldr r3, [r3, #0] 8006dd6: 2b00 cmp r3, #0 8006dd8: d008 beq.n 8006dec { ui->last_windows=temp_windows_stack->up; 8006dda: 683b ldr r3, [r7, #0] 8006ddc: 681a ldr r2, [r3, #0] 8006dde: 687b ldr r3, [r7, #4] 8006de0: 611a str r2, [r3, #16] ui->last_windows->next=NULL; 8006de2: 687b ldr r3, [r7, #4] 8006de4: 691b ldr r3, [r3, #16] 8006de6: 2200 movs r2, #0 8006de8: 609a str r2, [r3, #8] 8006dea: e010 b.n 8006e0e }else { ui->windows=NULL; 8006dec: 687b ldr r3, [r7, #4] 8006dee: 2200 movs r2, #0 8006df0: 60da str r2, [r3, #12] ui->last_windows=NULL; 8006df2: 687b ldr r3, [r7, #4] 8006df4: 2200 movs r2, #0 8006df6: 611a str r2, [r3, #16] 8006df8: e009 b.n 8006e0e } }else { temp_windows_stack->up->next=temp_windows_stack->next; //È¡³öÕâ¸ö½Úµã °Ñ½ÚµãµÄÉÏϲ¹ÉÏÁ´½Ó 8006dfa: 683b ldr r3, [r7, #0] 8006dfc: 681b ldr r3, [r3, #0] 8006dfe: 683a ldr r2, [r7, #0] 8006e00: 6892 ldr r2, [r2, #8] 8006e02: 609a str r2, [r3, #8] temp_windows_stack->next->up=temp_windows_stack->up; 8006e04: 683b ldr r3, [r7, #0] 8006e06: 689b ldr r3, [r3, #8] 8006e08: 683a ldr r2, [r7, #0] 8006e0a: 6812 ldr r2, [r2, #0] 8006e0c: 601a str r2, [r3, #0] } free(temp_windows_stack->window); 8006e0e: 683b ldr r3, [r7, #0] 8006e10: 685b ldr r3, [r3, #4] 8006e12: 4618 mov r0, r3 8006e14: f000 fa4a bl 80072ac free(temp_windows_stack); 8006e18: 6838 ldr r0, [r7, #0] 8006e1a: f000 fa47 bl 80072ac } 8006e1e: bf00 nop 8006e20: 3708 adds r7, #8 8006e22: 46bd mov sp, r7 8006e24: bd80 pop {r7, pc} 08006e26 : temp_window->y=temp_window->y+acc_y; } //ÏÔʾһ¸ö´°¿Ú void Refresh_Window(UI *ui,window *temp_window) { 8006e26: b580 push {r7, lr} 8006e28: b088 sub sp, #32 8006e2a: af02 add r7, sp, #8 8006e2c: 6078 str r0, [r7, #4] 8006e2e: 6039 str r1, [r7, #0] //¿ªÊ¼»æÖÆ´°¿Ú//Ìî³ä´°¿Ú±³¾° int x,y; char z; for(uint16_t temp_y=0;temp_yhigh;temp_y++) 8006e30: 2300 movs r3, #0 8006e32: 82bb strh r3, [r7, #20] 8006e34: e063 b.n 8006efe { z=1; 8006e36: 2301 movs r3, #1 8006e38: 75fb strb r3, [r7, #23] for(uint16_t temp_i=0;temp_iwidth;temp_i++) 8006e3a: 2300 movs r3, #0 8006e3c: 827b strh r3, [r7, #18] 8006e3e: e056 b.n 8006eee { x=temp_window->x+temp_i; 8006e40: 683b ldr r3, [r7, #0] 8006e42: 881b ldrh r3, [r3, #0] 8006e44: 461a mov r2, r3 8006e46: 8a7b ldrh r3, [r7, #18] 8006e48: 4413 add r3, r2 8006e4a: 60fb str r3, [r7, #12] y=temp_window->y+temp_y; 8006e4c: 683b ldr r3, [r7, #0] 8006e4e: 885b ldrh r3, [r3, #2] 8006e50: 461a mov r2, r3 8006e52: 8abb ldrh r3, [r7, #20] 8006e54: 4413 add r3, r2 8006e56: 60bb str r3, [r7, #8] if(y>=ui->y&&z==1) 8006e58: 687b ldr r3, [r7, #4] 8006e5a: 88db ldrh r3, [r3, #6] 8006e5c: 461a mov r2, r3 8006e5e: 68bb ldr r3, [r7, #8] 8006e60: 4293 cmp r3, r2 8006e62: db0c blt.n 8006e7e 8006e64: 7dfb ldrb r3, [r7, #23] 8006e66: 2b01 cmp r3, #1 8006e68: d109 bne.n 8006e7e { Inteface_SetCursor(x,y); 8006e6a: 68fb ldr r3, [r7, #12] 8006e6c: b29b uxth r3, r3 8006e6e: 68ba ldr r2, [r7, #8] 8006e70: b292 uxth r2, r2 8006e72: 4611 mov r1, r2 8006e74: 4618 mov r0, r3 8006e76: f7ff fec3 bl 8006c00 z=0; 8006e7a: 2300 movs r3, #0 8006e7c: 75fb strb r3, [r7, #23] } if(x>=ui->x) 8006e7e: 687b ldr r3, [r7, #4] 8006e80: 889b ldrh r3, [r3, #4] 8006e82: 461a mov r2, r3 8006e84: 68fb ldr r3, [r7, #12] 8006e86: 4293 cmp r3, r2 8006e88: db2e blt.n 8006ee8 { if(temp_y<16) 8006e8a: 8abb ldrh r3, [r7, #20] 8006e8c: 2b0f cmp r3, #15 8006e8e: d80f bhi.n 8006eb0 { if(temp_i>temp_window->width-16) 8006e90: 683b ldr r3, [r7, #0] 8006e92: 889b ldrh r3, [r3, #4] 8006e94: f1a3 020f sub.w r2, r3, #15 8006e98: 8a7b ldrh r3, [r7, #18] 8006e9a: 429a cmp r2, r3 8006e9c: dc04 bgt.n 8006ea8 { Inteface_SetColor(RED); 8006e9e: f44f 4078 mov.w r0, #63488 ; 0xf800 8006ea2: f7ff fec7 bl 8006c34 8006ea6: e01f b.n 8006ee8 }else { Inteface_SetColor(BLUE); 8006ea8: 201f movs r0, #31 8006eaa: f7ff fec3 bl 8006c34 8006eae: e01b b.n 8006ee8 } }else { if(temp_i==0||temp_y==0||temp_i==temp_window->width-1||temp_y==temp_window->high-1) 8006eb0: 8a7b ldrh r3, [r7, #18] 8006eb2: 2b00 cmp r3, #0 8006eb4: d00e beq.n 8006ed4 8006eb6: 8abb ldrh r3, [r7, #20] 8006eb8: 2b00 cmp r3, #0 8006eba: d00b beq.n 8006ed4 8006ebc: 8a7a ldrh r2, [r7, #18] 8006ebe: 683b ldr r3, [r7, #0] 8006ec0: 889b ldrh r3, [r3, #4] 8006ec2: 3b01 subs r3, #1 8006ec4: 429a cmp r2, r3 8006ec6: d005 beq.n 8006ed4 8006ec8: 8aba ldrh r2, [r7, #20] 8006eca: 683b ldr r3, [r7, #0] 8006ecc: 88db ldrh r3, [r3, #6] 8006ece: 3b01 subs r3, #1 8006ed0: 429a cmp r2, r3 8006ed2: d103 bne.n 8006edc { Inteface_SetColor(BLUE); 8006ed4: 201f movs r0, #31 8006ed6: f7ff fead bl 8006c34 8006eda: e005 b.n 8006ee8 }else { Inteface_SetColor(temp_window->background); 8006edc: 683b ldr r3, [r7, #0] 8006ede: 689b ldr r3, [r3, #8] 8006ee0: b29b uxth r3, r3 8006ee2: 4618 mov r0, r3 8006ee4: f7ff fea6 bl 8006c34 for(uint16_t temp_i=0;temp_iwidth;temp_i++) 8006ee8: 8a7b ldrh r3, [r7, #18] 8006eea: 3301 adds r3, #1 8006eec: 827b strh r3, [r7, #18] 8006eee: 683b ldr r3, [r7, #0] 8006ef0: 889b ldrh r3, [r3, #4] 8006ef2: 8a7a ldrh r2, [r7, #18] 8006ef4: 429a cmp r2, r3 8006ef6: d3a3 bcc.n 8006e40 for(uint16_t temp_y=0;temp_yhigh;temp_y++) 8006ef8: 8abb ldrh r3, [r7, #20] 8006efa: 3301 adds r3, #1 8006efc: 82bb strh r3, [r7, #20] 8006efe: 683b ldr r3, [r7, #0] 8006f00: 88db ldrh r3, [r3, #6] 8006f02: 8aba ldrh r2, [r7, #20] 8006f04: 429a cmp r2, r3 8006f06: d396 bcc.n 8006e36 } } */ //ÏÔʾtitle LCD_ShowString(temp_window->x,temp_window->y,&temp_window->title,16,WHITE,WHITE); 8006f08: 683b ldr r3, [r7, #0] 8006f0a: 8818 ldrh r0, [r3, #0] 8006f0c: 683b ldr r3, [r7, #0] 8006f0e: 8859 ldrh r1, [r3, #2] 8006f10: 683b ldr r3, [r7, #0] 8006f12: f103 020c add.w r2, r3, #12 8006f16: f64f 73ff movw r3, #65535 ; 0xffff 8006f1a: 9301 str r3, [sp, #4] 8006f1c: f64f 73ff movw r3, #65535 ; 0xffff 8006f20: 9300 str r3, [sp, #0] 8006f22: 2310 movs r3, #16 8006f24: f7fe fd82 bl 8005a2c } 8006f28: bf00 nop 8006f2a: 3718 adds r7, #24 8006f2c: 46bd mov sp, r7 8006f2e: bd80 pop {r7, pc} 08006f30 : * ºÜ¿Éϧ ÐÁÐÁ¿à¿àдµÄ´úÂëÒª±»·ÅÆú * ÓÃË㷨ʵÏÖÕÚµ²¹Øϵ¼ÆËãÕæͦ´À * * */ void Refresh_UI(UI *ui) { 8006f30: b580 push {r7, lr} 8006f32: b086 sub sp, #24 8006f34: af00 add r7, sp, #0 8006f36: 6078 str r0, [r7, #4] int flag=0; 8006f38: 2300 movs r3, #0 8006f3a: 617b str r3, [r7, #20] uint16_t dot_y=0,dot_x=0; 8006f3c: 2300 movs r3, #0 8006f3e: 827b strh r3, [r7, #18] 8006f40: 2300 movs r3, #0 8006f42: 823b strh r3, [r7, #16] //»­±³¾° for(dot_y=ui->y;dot_yhigh;dot_y++) 8006f44: 687b ldr r3, [r7, #4] 8006f46: 88db ldrh r3, [r3, #6] 8006f48: 827b strh r3, [r7, #18] 8006f4a: e01a b.n 8006f82 { Inteface_SetCursor(dot_x,dot_y); 8006f4c: 8a7a ldrh r2, [r7, #18] 8006f4e: 8a3b ldrh r3, [r7, #16] 8006f50: 4611 mov r1, r2 8006f52: 4618 mov r0, r3 8006f54: f7ff fe54 bl 8006c00 for(dot_x=ui->x;dot_xwidth;dot_x++) 8006f58: 687b ldr r3, [r7, #4] 8006f5a: 889b ldrh r3, [r3, #4] 8006f5c: 823b strh r3, [r7, #16] 8006f5e: e008 b.n 8006f72 { Inteface_SetColor(ui->background); 8006f60: 687b ldr r3, [r7, #4] 8006f62: 681b ldr r3, [r3, #0] 8006f64: b29b uxth r3, r3 8006f66: 4618 mov r0, r3 8006f68: f7ff fe64 bl 8006c34 for(dot_x=ui->x;dot_xwidth;dot_x++) 8006f6c: 8a3b ldrh r3, [r7, #16] 8006f6e: 3301 adds r3, #1 8006f70: 823b strh r3, [r7, #16] 8006f72: 687b ldr r3, [r7, #4] 8006f74: 891b ldrh r3, [r3, #8] 8006f76: 8a3a ldrh r2, [r7, #16] 8006f78: 429a cmp r2, r3 8006f7a: d3f1 bcc.n 8006f60 for(dot_y=ui->y;dot_yhigh;dot_y++) 8006f7c: 8a7b ldrh r3, [r7, #18] 8006f7e: 3301 adds r3, #1 8006f80: 827b strh r3, [r7, #18] 8006f82: 687b ldr r3, [r7, #4] 8006f84: 895b ldrh r3, [r3, #10] 8006f86: 8a7a ldrh r2, [r7, #18] 8006f88: 429a cmp r2, r3 8006f8a: d3df bcc.n 8006f4c } } windows_stack *temp_windows_stack,*temp_windows_stack2; temp_windows_stack=ui->windows; 8006f8c: 687b ldr r3, [r7, #4] 8006f8e: 68db ldr r3, [r3, #12] 8006f90: 60fb str r3, [r7, #12] do { if(temp_windows_stack!=NULL) 8006f92: 68fb ldr r3, [r7, #12] 8006f94: 2b00 cmp r3, #0 8006f96: d00b beq.n 8006fb0 { flag=1; 8006f98: 2301 movs r3, #1 8006f9a: 617b str r3, [r7, #20] Refresh_Window(ui,temp_windows_stack->window); 8006f9c: 68fb ldr r3, [r7, #12] 8006f9e: 685b ldr r3, [r3, #4] 8006fa0: 4619 mov r1, r3 8006fa2: 6878 ldr r0, [r7, #4] 8006fa4: f7ff ff3f bl 8006e26 //»æÖÆÏÂÒ»¸ö´°¿Ú temp_windows_stack=temp_windows_stack->next; 8006fa8: 68fb ldr r3, [r7, #12] 8006faa: 689b ldr r3, [r3, #8] 8006fac: 60fb str r3, [r7, #12] 8006fae: e001 b.n 8006fb4 }else { flag=0; 8006fb0: 2300 movs r3, #0 8006fb2: 617b str r3, [r7, #20] } }while(flag); 8006fb4: 697b ldr r3, [r7, #20] 8006fb6: 2b00 cmp r3, #0 8006fb8: d1eb bne.n 8006f92 } } */ } 8006fba: bf00 nop 8006fbc: bf00 nop 8006fbe: 3718 adds r7, #24 8006fc0: 46bd mov sp, r7 8006fc2: bd80 pop {r7, pc} 08006fc4 : #define BODY 1 #define BAR 2 #define CLOSE 3 uint8_t Chack(window *this_window,int x,int y) { 8006fc4: b480 push {r7} 8006fc6: b087 sub sp, #28 8006fc8: af00 add r7, sp, #0 8006fca: 60f8 str r0, [r7, #12] 8006fcc: 60b9 str r1, [r7, #8] 8006fce: 607a str r2, [r7, #4] int a=0; 8006fd0: 2300 movs r3, #0 8006fd2: 617b str r3, [r7, #20] if(((x>=this_window->x)&&(x<(this_window->x+this_window->width)))&&((y>=this_window->y+16)&&(y<(this_window->y+this_window->high)))) 8006fd4: 68fb ldr r3, [r7, #12] 8006fd6: 881b ldrh r3, [r3, #0] 8006fd8: 461a mov r2, r3 8006fda: 68bb ldr r3, [r7, #8] 8006fdc: 4293 cmp r3, r2 8006fde: db19 blt.n 8007014 8006fe0: 68fb ldr r3, [r7, #12] 8006fe2: 881b ldrh r3, [r3, #0] 8006fe4: 461a mov r2, r3 8006fe6: 68fb ldr r3, [r7, #12] 8006fe8: 889b ldrh r3, [r3, #4] 8006fea: 4413 add r3, r2 8006fec: 68ba ldr r2, [r7, #8] 8006fee: 429a cmp r2, r3 8006ff0: da10 bge.n 8007014 8006ff2: 68fb ldr r3, [r7, #12] 8006ff4: 885b ldrh r3, [r3, #2] 8006ff6: 330f adds r3, #15 8006ff8: 687a ldr r2, [r7, #4] 8006ffa: 429a cmp r2, r3 8006ffc: dd0a ble.n 8007014 8006ffe: 68fb ldr r3, [r7, #12] 8007000: 885b ldrh r3, [r3, #2] 8007002: 461a mov r2, r3 8007004: 68fb ldr r3, [r7, #12] 8007006: 88db ldrh r3, [r3, #6] 8007008: 4413 add r3, r2 800700a: 687a ldr r2, [r7, #4] 800700c: 429a cmp r2, r3 800700e: da01 bge.n 8007014 { a=1; 8007010: 2301 movs r3, #1 8007012: 617b str r3, [r7, #20] } if(((x>=this_window->x)&&(x<(this_window->x+this_window->width-16)))&&((y>=this_window->y)&&(y<(this_window->y+16)))) 8007014: 68fb ldr r3, [r7, #12] 8007016: 881b ldrh r3, [r3, #0] 8007018: 461a mov r2, r3 800701a: 68bb ldr r3, [r7, #8] 800701c: 4293 cmp r3, r2 800701e: db17 blt.n 8007050 8007020: 68fb ldr r3, [r7, #12] 8007022: 881b ldrh r3, [r3, #0] 8007024: 461a mov r2, r3 8007026: 68fb ldr r3, [r7, #12] 8007028: 889b ldrh r3, [r3, #4] 800702a: 4413 add r3, r2 800702c: 3b10 subs r3, #16 800702e: 68ba ldr r2, [r7, #8] 8007030: 429a cmp r2, r3 8007032: da0d bge.n 8007050 8007034: 68fb ldr r3, [r7, #12] 8007036: 885b ldrh r3, [r3, #2] 8007038: 461a mov r2, r3 800703a: 687b ldr r3, [r7, #4] 800703c: 4293 cmp r3, r2 800703e: db07 blt.n 8007050 8007040: 68fb ldr r3, [r7, #12] 8007042: 885b ldrh r3, [r3, #2] 8007044: 330f adds r3, #15 8007046: 687a ldr r2, [r7, #4] 8007048: 429a cmp r2, r3 800704a: dc01 bgt.n 8007050 { a=2; 800704c: 2302 movs r3, #2 800704e: 617b str r3, [r7, #20] } if((x>=(this_window->x+this_window->width-16))&&(x<(this_window->x+this_window->width))&&((y>=this_window->y)&&(y<(this_window->y+16)))) 8007050: 68fb ldr r3, [r7, #12] 8007052: 881b ldrh r3, [r3, #0] 8007054: 461a mov r2, r3 8007056: 68fb ldr r3, [r7, #12] 8007058: 889b ldrh r3, [r3, #4] 800705a: 4413 add r3, r2 800705c: 3b10 subs r3, #16 800705e: 68ba ldr r2, [r7, #8] 8007060: 429a cmp r2, r3 8007062: db16 blt.n 8007092 8007064: 68fb ldr r3, [r7, #12] 8007066: 881b ldrh r3, [r3, #0] 8007068: 461a mov r2, r3 800706a: 68fb ldr r3, [r7, #12] 800706c: 889b ldrh r3, [r3, #4] 800706e: 4413 add r3, r2 8007070: 68ba ldr r2, [r7, #8] 8007072: 429a cmp r2, r3 8007074: da0d bge.n 8007092 8007076: 68fb ldr r3, [r7, #12] 8007078: 885b ldrh r3, [r3, #2] 800707a: 461a mov r2, r3 800707c: 687b ldr r3, [r7, #4] 800707e: 4293 cmp r3, r2 8007080: db07 blt.n 8007092 8007082: 68fb ldr r3, [r7, #12] 8007084: 885b ldrh r3, [r3, #2] 8007086: 330f adds r3, #15 8007088: 687a ldr r2, [r7, #4] 800708a: 429a cmp r2, r3 800708c: dc01 bgt.n 8007092 { a=3; 800708e: 2303 movs r3, #3 8007090: 617b str r3, [r7, #20] } return a; 8007092: 697b ldr r3, [r7, #20] 8007094: b2db uxtb r3, r3 } 8007096: 4618 mov r0, r3 8007098: 371c adds r7, #28 800709a: 46bd mov sp, r7 800709c: bc80 pop {r7} 800709e: 4770 bx lr 080070a0 : void UI_Server(UI *ui) { 80070a0: b580 push {r7, lr} 80070a2: b088 sub sp, #32 80070a4: af00 add r7, sp, #0 80070a6: 6078 str r0, [r7, #4] windows_stack *temp_windows_stack=NULL; 80070a8: 2300 movs r3, #0 80070aa: 61fb str r3, [r7, #28] window *temp_window; //touch_device *temp_touch=NULL; int flag=0; 80070ac: 2300 movs r3, #0 80070ae: 61bb str r3, [r7, #24] uint8_t hit_flag=0; 80070b0: 2300 movs r3, #0 80070b2: 75fb strb r3, [r7, #23] int t_x,t_y; //touch //temp_touch=ui->touch; if(t0.c)//TP_XY(&t_x, &t_y)) 80070b4: 4b78 ldr r3, [pc, #480] ; (8007298 ) 80070b6: 7b1b ldrb r3, [r3, #12] 80070b8: f003 0302 and.w r3, r3, #2 80070bc: b2db uxtb r3, r3 80070be: 2b00 cmp r3, #0 80070c0: f000 80be beq.w 8007240 { if(t0.d) 80070c4: 4b74 ldr r3, [pc, #464] ; (8007298 ) 80070c6: 7b1b ldrb r3, [r3, #12] 80070c8: f003 0304 and.w r3, r3, #4 80070cc: b2db uxtb r3, r3 80070ce: 2b00 cmp r3, #0 80070d0: f000 80cc beq.w 800726c { t_x=t0.pix_x; 80070d4: 4b70 ldr r3, [pc, #448] ; (8007298 ) 80070d6: 685b ldr r3, [r3, #4] 80070d8: 613b str r3, [r7, #16] t_y=t0.pix_y; 80070da: 4b6f ldr r3, [pc, #444] ; (8007298 ) 80070dc: 689b ldr r3, [r3, #8] 80070de: 60fb str r3, [r7, #12] temp_window=NULL; 80070e0: 2300 movs r3, #0 80070e2: 60bb str r3, [r7, #8] if(ui->moveed_windwos==NULL) 80070e4: 687b ldr r3, [r7, #4] 80070e6: 695b ldr r3, [r3, #20] 80070e8: 2b00 cmp r3, #0 80070ea: f040 808c bne.w 8007206 { if(ui->First_click_flag==0) 80070ee: 687b ldr r3, [r7, #4] 80070f0: f893 3020 ldrb.w r3, [r3, #32] 80070f4: f003 0302 and.w r3, r3, #2 80070f8: b2db uxtb r3, r3 80070fa: 2b00 cmp r3, #0 80070fc: f040 80b6 bne.w 800726c { ui->First_click_flag=1; 8007100: 687a ldr r2, [r7, #4] 8007102: f892 3020 ldrb.w r3, [r2, #32] 8007106: f043 0302 orr.w r3, r3, #2 800710a: f882 3020 strb.w r3, [r2, #32] temp_windows_stack=ui->last_windows; //»ñÈ¡uiÖÐ×îÇ°¶ËµÄ´°¿Ú ´ÓÇ°ÍùºóɨÃè 800710e: 687b ldr r3, [r7, #4] 8007110: 691b ldr r3, [r3, #16] 8007112: 61fb str r3, [r7, #28] do { if(temp_windows_stack!=NULL) //Èç¹ûÓд°¿Ú¾Í¿ªÊ¼É¨Ãè 8007114: 69fb ldr r3, [r7, #28] 8007116: 2b00 cmp r3, #0 8007118: d06f beq.n 80071fa { flag=1; //¼ì²éµ½Óд°¿Ú ÐèҪѭ»·Ò»´ÎÒÔ¼ì²éÊÇ·ñÓÐÏÂÒ»¸ö´°¿Ú 800711a: 2301 movs r3, #1 800711c: 61bb str r3, [r7, #24] // temp_window=temp_windows_stack->window; //È¡³öÕâ¸ö´°¿Ú 800711e: 69fb ldr r3, [r7, #28] 8007120: 685b ldr r3, [r3, #4] 8007122: 60bb str r3, [r7, #8] hit_flag=Chack(temp_window,t_x,t_y); //¼ì²é´¥ÃþÊÇ·ñÃüÖÐ Ö±½Ó·µ»ØÃüÖд°¿ÚµÄλÖà 8007124: 68fa ldr r2, [r7, #12] 8007126: 6939 ldr r1, [r7, #16] 8007128: 68b8 ldr r0, [r7, #8] 800712a: f7ff ff4b bl 8006fc4 800712e: 4603 mov r3, r0 8007130: 75fb strb r3, [r7, #23] if(hit_flag) // ÃüÖмÌÐø 8007132: 7dfb ldrb r3, [r7, #23] 8007134: 2b00 cmp r3, #0 8007136: d05c beq.n 80071f2 { if(temp_windows_stack!=ui->last_windows) //¼ì²éÊÇ·ñ×îÇ°¶ËµÄ´°¿Ú Èç¹û²»ÊǾͷÅ×îÇ°Ãæ 8007138: 687b ldr r3, [r7, #4] 800713a: 691b ldr r3, [r3, #16] 800713c: 69fa ldr r2, [r7, #28] 800713e: 429a cmp r2, r3 8007140: d02c beq.n 800719c { if(temp_windows_stack!=ui->windows) //¼ì²éÊÇ·ñ×îºó¶ËµÄ´°¿Ú ÒòΪÏÔʾÊÇ´Ó×îºó¶ËÍùÇ°ÏÔʾµÄ ËùÒÔuiÓÐ×îºó¶Ë´°¿ÚµÄÈë¿Ú 8007142: 687b ldr r3, [r7, #4] 8007144: 68db ldr r3, [r3, #12] 8007146: 69fa ldr r2, [r7, #28] 8007148: 429a cmp r2, r3 800714a: d00a beq.n 8007162 { temp_windows_stack->up->next=temp_windows_stack->next; //È¡³öÕâ¸ö½Úµã °Ñ½ÚµãµÄÉÏϲ¹ÉÏÁ´½Ó 800714c: 69fb ldr r3, [r7, #28] 800714e: 681b ldr r3, [r3, #0] 8007150: 69fa ldr r2, [r7, #28] 8007152: 6892 ldr r2, [r2, #8] 8007154: 609a str r2, [r3, #8] temp_windows_stack->next->up=temp_windows_stack->up; 8007156: 69fb ldr r3, [r7, #28] 8007158: 689b ldr r3, [r3, #8] 800715a: 69fa ldr r2, [r7, #28] 800715c: 6812 ldr r2, [r2, #0] 800715e: 601a str r2, [r3, #0] 8007160: e007 b.n 8007172 }else { ui->windows=temp_windows_stack->next; //Èç¹ûÊÇ×îºó¶ËµÄ´°¿Ú ÔòÈ¡³öÕâ¸ö½ÚµãºóÈë¿Ú¾Í±äÏÂÒ»¸ö½ÚµãÁË 8007162: 69fb ldr r3, [r7, #28] 8007164: 689a ldr r2, [r3, #8] 8007166: 687b ldr r3, [r7, #4] 8007168: 60da str r2, [r3, #12] ui->windows->up=NULL; //µ¹ÊýµÚ¶þ±ä×îºó¶Ë ÔÚ×ß¾ÍûÁË ËùÒÔÒªÇå¿ÕÖ¸Õë 800716a: 687b ldr r3, [r7, #4] 800716c: 68db ldr r3, [r3, #12] 800716e: 2200 movs r2, #0 8007170: 601a str r2, [r3, #0] } temp_windows_stack->next=NULL; //È¡³öµÄ½ÚµãÒª·ÅÔÚ×îÇ°¶Ë ËùÒÔ ÎÞ·¨ÔÙÍùÇ° Çå¿ÕÍùÇ°µÄÖ¸Õë 8007172: 69fb ldr r3, [r7, #28] 8007174: 2200 movs r2, #0 8007176: 609a str r2, [r3, #8] temp_windows_stack->up=ui->last_windows; //ÉÏÒ»¸öÖ¸Õë¾ÍÊÇÔ­À´µÄ×îºóÒ»¸ö 8007178: 687b ldr r3, [r7, #4] 800717a: 691a ldr r2, [r3, #16] 800717c: 69fb ldr r3, [r7, #28] 800717e: 601a str r2, [r3, #0] ui->last_windows->next=temp_windows_stack; //Ô­À´µÄ×îºóÒ»¸öÖ¸ÏòÏÖÔÚµÄ×îºóÒ»¸ö 8007180: 687b ldr r3, [r7, #4] 8007182: 691b ldr r3, [r3, #16] 8007184: 69fa ldr r2, [r7, #28] 8007186: 609a str r2, [r3, #8] ui->last_windows=temp_windows_stack; //¸üÐÂuiÖеÄ×îºóÒ»¸öµÄÈë¿Ú 8007188: 687b ldr r3, [r7, #4] 800718a: 69fa ldr r2, [r7, #28] 800718c: 611a str r2, [r3, #16] ui->refresh_ui_flag=1; //·¢ÉúÁ˱仯 Ë¢ÐÂuiµÄÏÔʾ 800718e: 687a ldr r2, [r7, #4] 8007190: f892 3020 ldrb.w r3, [r2, #32] 8007194: f043 0304 orr.w r3, r3, #4 8007198: f882 3020 strb.w r3, [r2, #32] } //¼ì²é±êÖд°¿ÚµÄʲôλÖà switch(hit_flag) 800719c: 7dfb ldrb r3, [r7, #23] 800719e: 2b03 cmp r3, #3 80071a0: d006 beq.n 80071b0 80071a2: 2b03 cmp r3, #3 80071a4: dc23 bgt.n 80071ee 80071a6: 2b01 cmp r3, #1 80071a8: d020 beq.n 80071ec 80071aa: 2b02 cmp r3, #2 80071ac: d00c beq.n 80071c8 80071ae: e01e b.n 80071ee { case CLOSE: Close_Windows_Stack(ui,temp_windows_stack); 80071b0: 69f9 ldr r1, [r7, #28] 80071b2: 6878 ldr r0, [r7, #4] 80071b4: f7ff fdea bl 8006d8c ui->refresh_ui_flag=1; //·¢ÉúÁ˱仯 Ë¢ÐÂuiµÄÏÔʾ 80071b8: 687a ldr r2, [r7, #4] 80071ba: f892 3020 ldrb.w r3, [r2, #32] 80071be: f043 0304 orr.w r3, r3, #4 80071c2: f882 3020 strb.w r3, [r2, #32] break; 80071c6: e012 b.n 80071ee case BAR: ui->moveed_windwos=temp_window; 80071c8: 687b ldr r3, [r7, #4] 80071ca: 68ba ldr r2, [r7, #8] 80071cc: 615a str r2, [r3, #20] ui->move_x=t_x-temp_window->x; 80071ce: 68bb ldr r3, [r7, #8] 80071d0: 881b ldrh r3, [r3, #0] 80071d2: 461a mov r2, r3 80071d4: 693b ldr r3, [r7, #16] 80071d6: 1a9a subs r2, r3, r2 80071d8: 687b ldr r3, [r7, #4] 80071da: 619a str r2, [r3, #24] ui->move_y=t_y-temp_window->y; 80071dc: 68bb ldr r3, [r7, #8] 80071de: 885b ldrh r3, [r3, #2] 80071e0: 461a mov r2, r3 80071e2: 68fb ldr r3, [r7, #12] 80071e4: 1a9a subs r2, r3, r2 80071e6: 687b ldr r3, [r7, #4] 80071e8: 61da str r2, [r3, #28] break; 80071ea: e000 b.n 80071ee case BODY: //ui->background=temp_windows_stack->window->background; //ui->refresh_ui_flag=1; break; 80071ec: bf00 nop } flag=0; //½áÊøɨÃè ·ÀÖ¹´©Í¸µ±Ç°´°¿Ú 80071ee: 2300 movs r3, #0 80071f0: 61bb str r3, [r7, #24] } temp_windows_stack=temp_windows_stack->up; //ÍùǰɨÃè 80071f2: 69fb ldr r3, [r7, #28] 80071f4: 681b ldr r3, [r3, #0] 80071f6: 61fb str r3, [r7, #28] 80071f8: e001 b.n 80071fe }else { flag=0; //Ò»¸ö´°¿Ú¶¼Ã»ÓÐ Ö±½Ó½áÊøÑ­»· 80071fa: 2300 movs r3, #0 80071fc: 61bb str r3, [r7, #24] } }while(flag); 80071fe: 69bb ldr r3, [r7, #24] 8007200: 2b00 cmp r3, #0 8007202: d187 bne.n 8007114 8007204: e032 b.n 800726c } }else { temp_window=ui->moveed_windwos; 8007206: 687b ldr r3, [r7, #4] 8007208: 695b ldr r3, [r3, #20] 800720a: 60bb str r3, [r7, #8] temp_window->x=(t_x-ui->move_x); 800720c: 693b ldr r3, [r7, #16] 800720e: b29a uxth r2, r3 8007210: 687b ldr r3, [r7, #4] 8007212: 699b ldr r3, [r3, #24] 8007214: b29b uxth r3, r3 8007216: 1ad3 subs r3, r2, r3 8007218: b29a uxth r2, r3 800721a: 68bb ldr r3, [r7, #8] 800721c: 801a strh r2, [r3, #0] temp_window->y=(t_y-ui->move_y); 800721e: 68fb ldr r3, [r7, #12] 8007220: b29a uxth r2, r3 8007222: 687b ldr r3, [r7, #4] 8007224: 69db ldr r3, [r3, #28] 8007226: b29b uxth r3, r3 8007228: 1ad3 subs r3, r2, r3 800722a: b29a uxth r2, r3 800722c: 68bb ldr r3, [r7, #8] 800722e: 805a strh r2, [r3, #2] ui->refresh_ui_flag=1; 8007230: 687a ldr r2, [r7, #4] 8007232: f892 3020 ldrb.w r3, [r2, #32] 8007236: f043 0304 orr.w r3, r3, #4 800723a: f882 3020 strb.w r3, [r2, #32] 800723e: e015 b.n 800726c }else { if(ui->First_click_flag==1) 8007240: 687b ldr r3, [r7, #4] 8007242: f893 3020 ldrb.w r3, [r3, #32] 8007246: f003 0302 and.w r3, r3, #2 800724a: b2db uxtb r3, r3 800724c: 2b00 cmp r3, #0 800724e: d006 beq.n 800725e { ui->First_click_flag=0; 8007250: 687a ldr r2, [r7, #4] 8007252: f892 3020 ldrb.w r3, [r2, #32] 8007256: f36f 0341 bfc r3, #1, #1 800725a: f882 3020 strb.w r3, [r2, #32] } if(ui->moveed_windwos!=NULL) 800725e: 687b ldr r3, [r7, #4] 8007260: 695b ldr r3, [r3, #20] 8007262: 2b00 cmp r3, #0 8007264: d002 beq.n 800726c { ui->moveed_windwos=NULL; 8007266: 687b ldr r3, [r7, #4] 8007268: 2200 movs r2, #0 800726a: 615a str r2, [r3, #20] } } //display if(ui->refresh_ui_flag==1) 800726c: 687b ldr r3, [r7, #4] 800726e: f893 3020 ldrb.w r3, [r3, #32] 8007272: f003 0304 and.w r3, r3, #4 8007276: b2db uxtb r3, r3 8007278: 2b00 cmp r3, #0 800727a: d009 beq.n 8007290 { ui->refresh_ui_flag=0; 800727c: 687a ldr r2, [r7, #4] 800727e: f892 3020 ldrb.w r3, [r2, #32] 8007282: f36f 0382 bfc r3, #2, #1 8007286: f882 3020 strb.w r3, [r2, #32] Refresh_UI(ui); 800728a: 6878 ldr r0, [r7, #4] 800728c: f7ff fe50 bl 8006f30 } } 8007290: bf00 nop 8007292: 3720 adds r7, #32 8007294: 46bd mov sp, r7 8007296: bd80 pop {r7, pc} 8007298: 200003dc .word 0x200003dc 0800729c : 800729c: 4b02 ldr r3, [pc, #8] ; (80072a8 ) 800729e: 4601 mov r1, r0 80072a0: 6818 ldr r0, [r3, #0] 80072a2: f000 b82b b.w 80072fc <_malloc_r> 80072a6: bf00 nop 80072a8: 20000064 .word 0x20000064 080072ac : 80072ac: 4b02 ldr r3, [pc, #8] ; (80072b8 ) 80072ae: 4601 mov r1, r0 80072b0: 6818 ldr r0, [r3, #0] 80072b2: f001 bdd1 b.w 8008e58 <_free_r> 80072b6: bf00 nop 80072b8: 20000064 .word 0x20000064 080072bc : 80072bc: b570 push {r4, r5, r6, lr} 80072be: 4e0e ldr r6, [pc, #56] ; (80072f8 ) 80072c0: 460c mov r4, r1 80072c2: 6831 ldr r1, [r6, #0] 80072c4: 4605 mov r5, r0 80072c6: b911 cbnz r1, 80072ce 80072c8: f000 fefc bl 80080c4 <_sbrk_r> 80072cc: 6030 str r0, [r6, #0] 80072ce: 4621 mov r1, r4 80072d0: 4628 mov r0, r5 80072d2: f000 fef7 bl 80080c4 <_sbrk_r> 80072d6: 1c43 adds r3, r0, #1 80072d8: d00a beq.n 80072f0 80072da: 1cc4 adds r4, r0, #3 80072dc: f024 0403 bic.w r4, r4, #3 80072e0: 42a0 cmp r0, r4 80072e2: d007 beq.n 80072f4 80072e4: 1a21 subs r1, r4, r0 80072e6: 4628 mov r0, r5 80072e8: f000 feec bl 80080c4 <_sbrk_r> 80072ec: 3001 adds r0, #1 80072ee: d101 bne.n 80072f4 80072f0: f04f 34ff mov.w r4, #4294967295 80072f4: 4620 mov r0, r4 80072f6: bd70 pop {r4, r5, r6, pc} 80072f8: 20002518 .word 0x20002518 080072fc <_malloc_r>: 80072fc: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8007300: 1ccd adds r5, r1, #3 8007302: f025 0503 bic.w r5, r5, #3 8007306: 3508 adds r5, #8 8007308: 2d0c cmp r5, #12 800730a: bf38 it cc 800730c: 250c movcc r5, #12 800730e: 2d00 cmp r5, #0 8007310: 4607 mov r7, r0 8007312: db01 blt.n 8007318 <_malloc_r+0x1c> 8007314: 42a9 cmp r1, r5 8007316: d905 bls.n 8007324 <_malloc_r+0x28> 8007318: 230c movs r3, #12 800731a: 2600 movs r6, #0 800731c: 603b str r3, [r7, #0] 800731e: 4630 mov r0, r6 8007320: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8007324: f8df 80d0 ldr.w r8, [pc, #208] ; 80073f8 <_malloc_r+0xfc> 8007328: f000 f868 bl 80073fc <__malloc_lock> 800732c: f8d8 3000 ldr.w r3, [r8] 8007330: 461c mov r4, r3 8007332: bb5c cbnz r4, 800738c <_malloc_r+0x90> 8007334: 4629 mov r1, r5 8007336: 4638 mov r0, r7 8007338: f7ff ffc0 bl 80072bc 800733c: 1c43 adds r3, r0, #1 800733e: 4604 mov r4, r0 8007340: d155 bne.n 80073ee <_malloc_r+0xf2> 8007342: f8d8 4000 ldr.w r4, [r8] 8007346: 4626 mov r6, r4 8007348: 2e00 cmp r6, #0 800734a: d145 bne.n 80073d8 <_malloc_r+0xdc> 800734c: 2c00 cmp r4, #0 800734e: d048 beq.n 80073e2 <_malloc_r+0xe6> 8007350: 6823 ldr r3, [r4, #0] 8007352: 4631 mov r1, r6 8007354: 4638 mov r0, r7 8007356: eb04 0903 add.w r9, r4, r3 800735a: f000 feb3 bl 80080c4 <_sbrk_r> 800735e: 4581 cmp r9, r0 8007360: d13f bne.n 80073e2 <_malloc_r+0xe6> 8007362: 6821 ldr r1, [r4, #0] 8007364: 4638 mov r0, r7 8007366: 1a6d subs r5, r5, r1 8007368: 4629 mov r1, r5 800736a: f7ff ffa7 bl 80072bc 800736e: 3001 adds r0, #1 8007370: d037 beq.n 80073e2 <_malloc_r+0xe6> 8007372: 6823 ldr r3, [r4, #0] 8007374: 442b add r3, r5 8007376: 6023 str r3, [r4, #0] 8007378: f8d8 3000 ldr.w r3, [r8] 800737c: 2b00 cmp r3, #0 800737e: d038 beq.n 80073f2 <_malloc_r+0xf6> 8007380: 685a ldr r2, [r3, #4] 8007382: 42a2 cmp r2, r4 8007384: d12b bne.n 80073de <_malloc_r+0xe2> 8007386: 2200 movs r2, #0 8007388: 605a str r2, [r3, #4] 800738a: e00f b.n 80073ac <_malloc_r+0xb0> 800738c: 6822 ldr r2, [r4, #0] 800738e: 1b52 subs r2, r2, r5 8007390: d41f bmi.n 80073d2 <_malloc_r+0xd6> 8007392: 2a0b cmp r2, #11 8007394: d917 bls.n 80073c6 <_malloc_r+0xca> 8007396: 1961 adds r1, r4, r5 8007398: 42a3 cmp r3, r4 800739a: 6025 str r5, [r4, #0] 800739c: bf18 it ne 800739e: 6059 strne r1, [r3, #4] 80073a0: 6863 ldr r3, [r4, #4] 80073a2: bf08 it eq 80073a4: f8c8 1000 streq.w r1, [r8] 80073a8: 5162 str r2, [r4, r5] 80073aa: 604b str r3, [r1, #4] 80073ac: 4638 mov r0, r7 80073ae: f104 060b add.w r6, r4, #11 80073b2: f000 f829 bl 8007408 <__malloc_unlock> 80073b6: f026 0607 bic.w r6, r6, #7 80073ba: 1d23 adds r3, r4, #4 80073bc: 1af2 subs r2, r6, r3 80073be: d0ae beq.n 800731e <_malloc_r+0x22> 80073c0: 1b9b subs r3, r3, r6 80073c2: 50a3 str r3, [r4, r2] 80073c4: e7ab b.n 800731e <_malloc_r+0x22> 80073c6: 42a3 cmp r3, r4 80073c8: 6862 ldr r2, [r4, #4] 80073ca: d1dd bne.n 8007388 <_malloc_r+0x8c> 80073cc: f8c8 2000 str.w r2, [r8] 80073d0: e7ec b.n 80073ac <_malloc_r+0xb0> 80073d2: 4623 mov r3, r4 80073d4: 6864 ldr r4, [r4, #4] 80073d6: e7ac b.n 8007332 <_malloc_r+0x36> 80073d8: 4634 mov r4, r6 80073da: 6876 ldr r6, [r6, #4] 80073dc: e7b4 b.n 8007348 <_malloc_r+0x4c> 80073de: 4613 mov r3, r2 80073e0: e7cc b.n 800737c <_malloc_r+0x80> 80073e2: 230c movs r3, #12 80073e4: 4638 mov r0, r7 80073e6: 603b str r3, [r7, #0] 80073e8: f000 f80e bl 8007408 <__malloc_unlock> 80073ec: e797 b.n 800731e <_malloc_r+0x22> 80073ee: 6025 str r5, [r4, #0] 80073f0: e7dc b.n 80073ac <_malloc_r+0xb0> 80073f2: 605b str r3, [r3, #4] 80073f4: deff udf #255 ; 0xff 80073f6: bf00 nop 80073f8: 20002514 .word 0x20002514 080073fc <__malloc_lock>: 80073fc: 4801 ldr r0, [pc, #4] ; (8007404 <__malloc_lock+0x8>) 80073fe: f000 beae b.w 800815e <__retarget_lock_acquire_recursive> 8007402: bf00 nop 8007404: 2000265c .word 0x2000265c 08007408 <__malloc_unlock>: 8007408: 4801 ldr r0, [pc, #4] ; (8007410 <__malloc_unlock+0x8>) 800740a: f000 bea9 b.w 8008160 <__retarget_lock_release_recursive> 800740e: bf00 nop 8007410: 2000265c .word 0x2000265c 08007414 <__cvt>: 8007414: 2b00 cmp r3, #0 8007416: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800741a: 461f mov r7, r3 800741c: bfbb ittet lt 800741e: f103 4300 addlt.w r3, r3, #2147483648 ; 0x80000000 8007422: 461f movlt r7, r3 8007424: 2300 movge r3, #0 8007426: 232d movlt r3, #45 ; 0x2d 8007428: b088 sub sp, #32 800742a: 4614 mov r4, r2 800742c: 9a12 ldr r2, [sp, #72] ; 0x48 800742e: 9d10 ldr r5, [sp, #64] ; 0x40 8007430: 7013 strb r3, [r2, #0] 8007432: 9b14 ldr r3, [sp, #80] ; 0x50 8007434: f8dd a04c ldr.w sl, [sp, #76] ; 0x4c 8007438: f023 0820 bic.w r8, r3, #32 800743c: f1b8 0f46 cmp.w r8, #70 ; 0x46 8007440: d005 beq.n 800744e <__cvt+0x3a> 8007442: f1b8 0f45 cmp.w r8, #69 ; 0x45 8007446: d100 bne.n 800744a <__cvt+0x36> 8007448: 3501 adds r5, #1 800744a: 2302 movs r3, #2 800744c: e000 b.n 8007450 <__cvt+0x3c> 800744e: 2303 movs r3, #3 8007450: aa07 add r2, sp, #28 8007452: 9204 str r2, [sp, #16] 8007454: aa06 add r2, sp, #24 8007456: e9cd a202 strd sl, r2, [sp, #8] 800745a: e9cd 3500 strd r3, r5, [sp] 800745e: 4622 mov r2, r4 8007460: 463b mov r3, r7 8007462: f000 ff15 bl 8008290 <_dtoa_r> 8007466: f1b8 0f47 cmp.w r8, #71 ; 0x47 800746a: 4606 mov r6, r0 800746c: d102 bne.n 8007474 <__cvt+0x60> 800746e: 9b11 ldr r3, [sp, #68] ; 0x44 8007470: 07db lsls r3, r3, #31 8007472: d522 bpl.n 80074ba <__cvt+0xa6> 8007474: f1b8 0f46 cmp.w r8, #70 ; 0x46 8007478: eb06 0905 add.w r9, r6, r5 800747c: d110 bne.n 80074a0 <__cvt+0x8c> 800747e: 7833 ldrb r3, [r6, #0] 8007480: 2b30 cmp r3, #48 ; 0x30 8007482: d10a bne.n 800749a <__cvt+0x86> 8007484: 2200 movs r2, #0 8007486: 2300 movs r3, #0 8007488: 4620 mov r0, r4 800748a: 4639 mov r1, r7 800748c: f7f9 faf8 bl 8000a80 <__aeabi_dcmpeq> 8007490: b918 cbnz r0, 800749a <__cvt+0x86> 8007492: f1c5 0501 rsb r5, r5, #1 8007496: f8ca 5000 str.w r5, [sl] 800749a: f8da 3000 ldr.w r3, [sl] 800749e: 4499 add r9, r3 80074a0: 2200 movs r2, #0 80074a2: 2300 movs r3, #0 80074a4: 4620 mov r0, r4 80074a6: 4639 mov r1, r7 80074a8: f7f9 faea bl 8000a80 <__aeabi_dcmpeq> 80074ac: b108 cbz r0, 80074b2 <__cvt+0x9e> 80074ae: f8cd 901c str.w r9, [sp, #28] 80074b2: 2230 movs r2, #48 ; 0x30 80074b4: 9b07 ldr r3, [sp, #28] 80074b6: 454b cmp r3, r9 80074b8: d307 bcc.n 80074ca <__cvt+0xb6> 80074ba: 4630 mov r0, r6 80074bc: 9b07 ldr r3, [sp, #28] 80074be: 9a15 ldr r2, [sp, #84] ; 0x54 80074c0: 1b9b subs r3, r3, r6 80074c2: 6013 str r3, [r2, #0] 80074c4: b008 add sp, #32 80074c6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80074ca: 1c59 adds r1, r3, #1 80074cc: 9107 str r1, [sp, #28] 80074ce: 701a strb r2, [r3, #0] 80074d0: e7f0 b.n 80074b4 <__cvt+0xa0> 080074d2 <__exponent>: 80074d2: 4603 mov r3, r0 80074d4: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 80074d6: 2900 cmp r1, #0 80074d8: f803 2b02 strb.w r2, [r3], #2 80074dc: bfb6 itet lt 80074de: 222d movlt r2, #45 ; 0x2d 80074e0: 222b movge r2, #43 ; 0x2b 80074e2: 4249 neglt r1, r1 80074e4: 2909 cmp r1, #9 80074e6: 7042 strb r2, [r0, #1] 80074e8: dd2a ble.n 8007540 <__exponent+0x6e> 80074ea: f10d 0207 add.w r2, sp, #7 80074ee: 4617 mov r7, r2 80074f0: 260a movs r6, #10 80074f2: fb91 f5f6 sdiv r5, r1, r6 80074f6: 4694 mov ip, r2 80074f8: fb06 1415 mls r4, r6, r5, r1 80074fc: 3430 adds r4, #48 ; 0x30 80074fe: f80c 4c01 strb.w r4, [ip, #-1] 8007502: 460c mov r4, r1 8007504: 2c63 cmp r4, #99 ; 0x63 8007506: 4629 mov r1, r5 8007508: f102 32ff add.w r2, r2, #4294967295 800750c: dcf1 bgt.n 80074f2 <__exponent+0x20> 800750e: 3130 adds r1, #48 ; 0x30 8007510: f1ac 0402 sub.w r4, ip, #2 8007514: f802 1c01 strb.w r1, [r2, #-1] 8007518: 4622 mov r2, r4 800751a: 1c41 adds r1, r0, #1 800751c: 42ba cmp r2, r7 800751e: d30a bcc.n 8007536 <__exponent+0x64> 8007520: f10d 0209 add.w r2, sp, #9 8007524: eba2 020c sub.w r2, r2, ip 8007528: 42bc cmp r4, r7 800752a: bf88 it hi 800752c: 2200 movhi r2, #0 800752e: 4413 add r3, r2 8007530: 1a18 subs r0, r3, r0 8007532: b003 add sp, #12 8007534: bdf0 pop {r4, r5, r6, r7, pc} 8007536: f812 5b01 ldrb.w r5, [r2], #1 800753a: f801 5f01 strb.w r5, [r1, #1]! 800753e: e7ed b.n 800751c <__exponent+0x4a> 8007540: 2330 movs r3, #48 ; 0x30 8007542: 3130 adds r1, #48 ; 0x30 8007544: 7083 strb r3, [r0, #2] 8007546: 70c1 strb r1, [r0, #3] 8007548: 1d03 adds r3, r0, #4 800754a: e7f1 b.n 8007530 <__exponent+0x5e> 0800754c <_printf_float>: 800754c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8007550: b091 sub sp, #68 ; 0x44 8007552: 460c mov r4, r1 8007554: f8dd 8068 ldr.w r8, [sp, #104] ; 0x68 8007558: 4616 mov r6, r2 800755a: 461f mov r7, r3 800755c: 4605 mov r5, r0 800755e: f000 fd79 bl 8008054 <_localeconv_r> 8007562: 6803 ldr r3, [r0, #0] 8007564: 4618 mov r0, r3 8007566: 9309 str r3, [sp, #36] ; 0x24 8007568: f7f8 fe5e bl 8000228 800756c: 2300 movs r3, #0 800756e: 930e str r3, [sp, #56] ; 0x38 8007570: f8d8 3000 ldr.w r3, [r8] 8007574: 900a str r0, [sp, #40] ; 0x28 8007576: 3307 adds r3, #7 8007578: f023 0307 bic.w r3, r3, #7 800757c: f103 0208 add.w r2, r3, #8 8007580: f894 9018 ldrb.w r9, [r4, #24] 8007584: f8d4 b000 ldr.w fp, [r4] 8007588: f8c8 2000 str.w r2, [r8] 800758c: e9d3 a800 ldrd sl, r8, [r3] 8007590: 4652 mov r2, sl 8007592: 4643 mov r3, r8 8007594: e9c4 2312 strd r2, r3, [r4, #72] ; 0x48 8007598: f028 4300 bic.w r3, r8, #2147483648 ; 0x80000000 800759c: 930b str r3, [sp, #44] ; 0x2c 800759e: f04f 32ff mov.w r2, #4294967295 80075a2: 4650 mov r0, sl 80075a4: 4b9c ldr r3, [pc, #624] ; (8007818 <_printf_float+0x2cc>) 80075a6: 990b ldr r1, [sp, #44] ; 0x2c 80075a8: f7f9 fa9c bl 8000ae4 <__aeabi_dcmpun> 80075ac: bb70 cbnz r0, 800760c <_printf_float+0xc0> 80075ae: f04f 32ff mov.w r2, #4294967295 80075b2: 4650 mov r0, sl 80075b4: 4b98 ldr r3, [pc, #608] ; (8007818 <_printf_float+0x2cc>) 80075b6: 990b ldr r1, [sp, #44] ; 0x2c 80075b8: f7f9 fa76 bl 8000aa8 <__aeabi_dcmple> 80075bc: bb30 cbnz r0, 800760c <_printf_float+0xc0> 80075be: 2200 movs r2, #0 80075c0: 2300 movs r3, #0 80075c2: 4650 mov r0, sl 80075c4: 4641 mov r1, r8 80075c6: f7f9 fa65 bl 8000a94 <__aeabi_dcmplt> 80075ca: b110 cbz r0, 80075d2 <_printf_float+0x86> 80075cc: 232d movs r3, #45 ; 0x2d 80075ce: f884 3043 strb.w r3, [r4, #67] ; 0x43 80075d2: 4a92 ldr r2, [pc, #584] ; (800781c <_printf_float+0x2d0>) 80075d4: 4b92 ldr r3, [pc, #584] ; (8007820 <_printf_float+0x2d4>) 80075d6: f1b9 0f47 cmp.w r9, #71 ; 0x47 80075da: bf94 ite ls 80075dc: 4690 movls r8, r2 80075de: 4698 movhi r8, r3 80075e0: 2303 movs r3, #3 80075e2: f04f 0a00 mov.w sl, #0 80075e6: 6123 str r3, [r4, #16] 80075e8: f02b 0304 bic.w r3, fp, #4 80075ec: 6023 str r3, [r4, #0] 80075ee: 4633 mov r3, r6 80075f0: 4621 mov r1, r4 80075f2: 4628 mov r0, r5 80075f4: 9700 str r7, [sp, #0] 80075f6: aa0f add r2, sp, #60 ; 0x3c 80075f8: f000 f9d6 bl 80079a8 <_printf_common> 80075fc: 3001 adds r0, #1 80075fe: f040 8090 bne.w 8007722 <_printf_float+0x1d6> 8007602: f04f 30ff mov.w r0, #4294967295 8007606: b011 add sp, #68 ; 0x44 8007608: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800760c: 4652 mov r2, sl 800760e: 4643 mov r3, r8 8007610: 4650 mov r0, sl 8007612: 4641 mov r1, r8 8007614: f7f9 fa66 bl 8000ae4 <__aeabi_dcmpun> 8007618: b148 cbz r0, 800762e <_printf_float+0xe2> 800761a: f1b8 0f00 cmp.w r8, #0 800761e: bfb8 it lt 8007620: 232d movlt r3, #45 ; 0x2d 8007622: 4a80 ldr r2, [pc, #512] ; (8007824 <_printf_float+0x2d8>) 8007624: bfb8 it lt 8007626: f884 3043 strblt.w r3, [r4, #67] ; 0x43 800762a: 4b7f ldr r3, [pc, #508] ; (8007828 <_printf_float+0x2dc>) 800762c: e7d3 b.n 80075d6 <_printf_float+0x8a> 800762e: 6863 ldr r3, [r4, #4] 8007630: f009 01df and.w r1, r9, #223 ; 0xdf 8007634: 1c5a adds r2, r3, #1 8007636: d142 bne.n 80076be <_printf_float+0x172> 8007638: 2306 movs r3, #6 800763a: 6063 str r3, [r4, #4] 800763c: 2200 movs r2, #0 800763e: 9206 str r2, [sp, #24] 8007640: aa0e add r2, sp, #56 ; 0x38 8007642: e9cd 9204 strd r9, r2, [sp, #16] 8007646: aa0d add r2, sp, #52 ; 0x34 8007648: f44b 6380 orr.w r3, fp, #1024 ; 0x400 800764c: 9203 str r2, [sp, #12] 800764e: f10d 0233 add.w r2, sp, #51 ; 0x33 8007652: e9cd 3201 strd r3, r2, [sp, #4] 8007656: 6023 str r3, [r4, #0] 8007658: 6863 ldr r3, [r4, #4] 800765a: 4652 mov r2, sl 800765c: 9300 str r3, [sp, #0] 800765e: 4628 mov r0, r5 8007660: 4643 mov r3, r8 8007662: 910b str r1, [sp, #44] ; 0x2c 8007664: f7ff fed6 bl 8007414 <__cvt> 8007668: 990b ldr r1, [sp, #44] ; 0x2c 800766a: 4680 mov r8, r0 800766c: 2947 cmp r1, #71 ; 0x47 800766e: 990d ldr r1, [sp, #52] ; 0x34 8007670: d108 bne.n 8007684 <_printf_float+0x138> 8007672: 1cc8 adds r0, r1, #3 8007674: db02 blt.n 800767c <_printf_float+0x130> 8007676: 6863 ldr r3, [r4, #4] 8007678: 4299 cmp r1, r3 800767a: dd40 ble.n 80076fe <_printf_float+0x1b2> 800767c: f1a9 0902 sub.w r9, r9, #2 8007680: fa5f f989 uxtb.w r9, r9 8007684: f1b9 0f65 cmp.w r9, #101 ; 0x65 8007688: d81f bhi.n 80076ca <_printf_float+0x17e> 800768a: 464a mov r2, r9 800768c: 3901 subs r1, #1 800768e: f104 0050 add.w r0, r4, #80 ; 0x50 8007692: 910d str r1, [sp, #52] ; 0x34 8007694: f7ff ff1d bl 80074d2 <__exponent> 8007698: 9a0e ldr r2, [sp, #56] ; 0x38 800769a: 4682 mov sl, r0 800769c: 1813 adds r3, r2, r0 800769e: 2a01 cmp r2, #1 80076a0: 6123 str r3, [r4, #16] 80076a2: dc02 bgt.n 80076aa <_printf_float+0x15e> 80076a4: 6822 ldr r2, [r4, #0] 80076a6: 07d2 lsls r2, r2, #31 80076a8: d501 bpl.n 80076ae <_printf_float+0x162> 80076aa: 3301 adds r3, #1 80076ac: 6123 str r3, [r4, #16] 80076ae: f89d 3033 ldrb.w r3, [sp, #51] ; 0x33 80076b2: 2b00 cmp r3, #0 80076b4: d09b beq.n 80075ee <_printf_float+0xa2> 80076b6: 232d movs r3, #45 ; 0x2d 80076b8: f884 3043 strb.w r3, [r4, #67] ; 0x43 80076bc: e797 b.n 80075ee <_printf_float+0xa2> 80076be: 2947 cmp r1, #71 ; 0x47 80076c0: d1bc bne.n 800763c <_printf_float+0xf0> 80076c2: 2b00 cmp r3, #0 80076c4: d1ba bne.n 800763c <_printf_float+0xf0> 80076c6: 2301 movs r3, #1 80076c8: e7b7 b.n 800763a <_printf_float+0xee> 80076ca: f1b9 0f66 cmp.w r9, #102 ; 0x66 80076ce: d118 bne.n 8007702 <_printf_float+0x1b6> 80076d0: 2900 cmp r1, #0 80076d2: 6863 ldr r3, [r4, #4] 80076d4: dd0b ble.n 80076ee <_printf_float+0x1a2> 80076d6: 6121 str r1, [r4, #16] 80076d8: b913 cbnz r3, 80076e0 <_printf_float+0x194> 80076da: 6822 ldr r2, [r4, #0] 80076dc: 07d0 lsls r0, r2, #31 80076de: d502 bpl.n 80076e6 <_printf_float+0x19a> 80076e0: 3301 adds r3, #1 80076e2: 440b add r3, r1 80076e4: 6123 str r3, [r4, #16] 80076e6: f04f 0a00 mov.w sl, #0 80076ea: 65a1 str r1, [r4, #88] ; 0x58 80076ec: e7df b.n 80076ae <_printf_float+0x162> 80076ee: b913 cbnz r3, 80076f6 <_printf_float+0x1aa> 80076f0: 6822 ldr r2, [r4, #0] 80076f2: 07d2 lsls r2, r2, #31 80076f4: d501 bpl.n 80076fa <_printf_float+0x1ae> 80076f6: 3302 adds r3, #2 80076f8: e7f4 b.n 80076e4 <_printf_float+0x198> 80076fa: 2301 movs r3, #1 80076fc: e7f2 b.n 80076e4 <_printf_float+0x198> 80076fe: f04f 0967 mov.w r9, #103 ; 0x67 8007702: 9b0e ldr r3, [sp, #56] ; 0x38 8007704: 4299 cmp r1, r3 8007706: db05 blt.n 8007714 <_printf_float+0x1c8> 8007708: 6823 ldr r3, [r4, #0] 800770a: 6121 str r1, [r4, #16] 800770c: 07d8 lsls r0, r3, #31 800770e: d5ea bpl.n 80076e6 <_printf_float+0x19a> 8007710: 1c4b adds r3, r1, #1 8007712: e7e7 b.n 80076e4 <_printf_float+0x198> 8007714: 2900 cmp r1, #0 8007716: bfcc ite gt 8007718: 2201 movgt r2, #1 800771a: f1c1 0202 rsble r2, r1, #2 800771e: 4413 add r3, r2 8007720: e7e0 b.n 80076e4 <_printf_float+0x198> 8007722: 6823 ldr r3, [r4, #0] 8007724: 055a lsls r2, r3, #21 8007726: d407 bmi.n 8007738 <_printf_float+0x1ec> 8007728: 6923 ldr r3, [r4, #16] 800772a: 4642 mov r2, r8 800772c: 4631 mov r1, r6 800772e: 4628 mov r0, r5 8007730: 47b8 blx r7 8007732: 3001 adds r0, #1 8007734: d12b bne.n 800778e <_printf_float+0x242> 8007736: e764 b.n 8007602 <_printf_float+0xb6> 8007738: f1b9 0f65 cmp.w r9, #101 ; 0x65 800773c: f240 80dd bls.w 80078fa <_printf_float+0x3ae> 8007740: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48 8007744: 2200 movs r2, #0 8007746: 2300 movs r3, #0 8007748: f7f9 f99a bl 8000a80 <__aeabi_dcmpeq> 800774c: 2800 cmp r0, #0 800774e: d033 beq.n 80077b8 <_printf_float+0x26c> 8007750: 2301 movs r3, #1 8007752: 4631 mov r1, r6 8007754: 4628 mov r0, r5 8007756: 4a35 ldr r2, [pc, #212] ; (800782c <_printf_float+0x2e0>) 8007758: 47b8 blx r7 800775a: 3001 adds r0, #1 800775c: f43f af51 beq.w 8007602 <_printf_float+0xb6> 8007760: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 8007764: 429a cmp r2, r3 8007766: db02 blt.n 800776e <_printf_float+0x222> 8007768: 6823 ldr r3, [r4, #0] 800776a: 07d8 lsls r0, r3, #31 800776c: d50f bpl.n 800778e <_printf_float+0x242> 800776e: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 8007772: 4631 mov r1, r6 8007774: 4628 mov r0, r5 8007776: 47b8 blx r7 8007778: 3001 adds r0, #1 800777a: f43f af42 beq.w 8007602 <_printf_float+0xb6> 800777e: f04f 0800 mov.w r8, #0 8007782: f104 091a add.w r9, r4, #26 8007786: 9b0e ldr r3, [sp, #56] ; 0x38 8007788: 3b01 subs r3, #1 800778a: 4543 cmp r3, r8 800778c: dc09 bgt.n 80077a2 <_printf_float+0x256> 800778e: 6823 ldr r3, [r4, #0] 8007790: 079b lsls r3, r3, #30 8007792: f100 8104 bmi.w 800799e <_printf_float+0x452> 8007796: 68e0 ldr r0, [r4, #12] 8007798: 9b0f ldr r3, [sp, #60] ; 0x3c 800779a: 4298 cmp r0, r3 800779c: bfb8 it lt 800779e: 4618 movlt r0, r3 80077a0: e731 b.n 8007606 <_printf_float+0xba> 80077a2: 2301 movs r3, #1 80077a4: 464a mov r2, r9 80077a6: 4631 mov r1, r6 80077a8: 4628 mov r0, r5 80077aa: 47b8 blx r7 80077ac: 3001 adds r0, #1 80077ae: f43f af28 beq.w 8007602 <_printf_float+0xb6> 80077b2: f108 0801 add.w r8, r8, #1 80077b6: e7e6 b.n 8007786 <_printf_float+0x23a> 80077b8: 9b0d ldr r3, [sp, #52] ; 0x34 80077ba: 2b00 cmp r3, #0 80077bc: dc38 bgt.n 8007830 <_printf_float+0x2e4> 80077be: 2301 movs r3, #1 80077c0: 4631 mov r1, r6 80077c2: 4628 mov r0, r5 80077c4: 4a19 ldr r2, [pc, #100] ; (800782c <_printf_float+0x2e0>) 80077c6: 47b8 blx r7 80077c8: 3001 adds r0, #1 80077ca: f43f af1a beq.w 8007602 <_printf_float+0xb6> 80077ce: e9dd 320d ldrd r3, r2, [sp, #52] ; 0x34 80077d2: 4313 orrs r3, r2 80077d4: d102 bne.n 80077dc <_printf_float+0x290> 80077d6: 6823 ldr r3, [r4, #0] 80077d8: 07d9 lsls r1, r3, #31 80077da: d5d8 bpl.n 800778e <_printf_float+0x242> 80077dc: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 80077e0: 4631 mov r1, r6 80077e2: 4628 mov r0, r5 80077e4: 47b8 blx r7 80077e6: 3001 adds r0, #1 80077e8: f43f af0b beq.w 8007602 <_printf_float+0xb6> 80077ec: f04f 0900 mov.w r9, #0 80077f0: f104 0a1a add.w sl, r4, #26 80077f4: 9b0d ldr r3, [sp, #52] ; 0x34 80077f6: 425b negs r3, r3 80077f8: 454b cmp r3, r9 80077fa: dc01 bgt.n 8007800 <_printf_float+0x2b4> 80077fc: 9b0e ldr r3, [sp, #56] ; 0x38 80077fe: e794 b.n 800772a <_printf_float+0x1de> 8007800: 2301 movs r3, #1 8007802: 4652 mov r2, sl 8007804: 4631 mov r1, r6 8007806: 4628 mov r0, r5 8007808: 47b8 blx r7 800780a: 3001 adds r0, #1 800780c: f43f aef9 beq.w 8007602 <_printf_float+0xb6> 8007810: f109 0901 add.w r9, r9, #1 8007814: e7ee b.n 80077f4 <_printf_float+0x2a8> 8007816: bf00 nop 8007818: 7fefffff .word 0x7fefffff 800781c: 0800ab00 .word 0x0800ab00 8007820: 0800ab04 .word 0x0800ab04 8007824: 0800ab08 .word 0x0800ab08 8007828: 0800ab0c .word 0x0800ab0c 800782c: 0800ab10 .word 0x0800ab10 8007830: 9a0e ldr r2, [sp, #56] ; 0x38 8007832: 6da3 ldr r3, [r4, #88] ; 0x58 8007834: 429a cmp r2, r3 8007836: bfa8 it ge 8007838: 461a movge r2, r3 800783a: 2a00 cmp r2, #0 800783c: 4691 mov r9, r2 800783e: dc37 bgt.n 80078b0 <_printf_float+0x364> 8007840: f04f 0b00 mov.w fp, #0 8007844: ea29 79e9 bic.w r9, r9, r9, asr #31 8007848: f104 021a add.w r2, r4, #26 800784c: f8d4 a058 ldr.w sl, [r4, #88] ; 0x58 8007850: ebaa 0309 sub.w r3, sl, r9 8007854: 455b cmp r3, fp 8007856: dc33 bgt.n 80078c0 <_printf_float+0x374> 8007858: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 800785c: 429a cmp r2, r3 800785e: db3b blt.n 80078d8 <_printf_float+0x38c> 8007860: 6823 ldr r3, [r4, #0] 8007862: 07da lsls r2, r3, #31 8007864: d438 bmi.n 80078d8 <_printf_float+0x38c> 8007866: e9dd 320d ldrd r3, r2, [sp, #52] ; 0x34 800786a: eba2 0903 sub.w r9, r2, r3 800786e: eba2 020a sub.w r2, r2, sl 8007872: 4591 cmp r9, r2 8007874: bfa8 it ge 8007876: 4691 movge r9, r2 8007878: f1b9 0f00 cmp.w r9, #0 800787c: dc34 bgt.n 80078e8 <_printf_float+0x39c> 800787e: f04f 0800 mov.w r8, #0 8007882: ea29 79e9 bic.w r9, r9, r9, asr #31 8007886: f104 0a1a add.w sl, r4, #26 800788a: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 800788e: 1a9b subs r3, r3, r2 8007890: eba3 0309 sub.w r3, r3, r9 8007894: 4543 cmp r3, r8 8007896: f77f af7a ble.w 800778e <_printf_float+0x242> 800789a: 2301 movs r3, #1 800789c: 4652 mov r2, sl 800789e: 4631 mov r1, r6 80078a0: 4628 mov r0, r5 80078a2: 47b8 blx r7 80078a4: 3001 adds r0, #1 80078a6: f43f aeac beq.w 8007602 <_printf_float+0xb6> 80078aa: f108 0801 add.w r8, r8, #1 80078ae: e7ec b.n 800788a <_printf_float+0x33e> 80078b0: 4613 mov r3, r2 80078b2: 4631 mov r1, r6 80078b4: 4642 mov r2, r8 80078b6: 4628 mov r0, r5 80078b8: 47b8 blx r7 80078ba: 3001 adds r0, #1 80078bc: d1c0 bne.n 8007840 <_printf_float+0x2f4> 80078be: e6a0 b.n 8007602 <_printf_float+0xb6> 80078c0: 2301 movs r3, #1 80078c2: 4631 mov r1, r6 80078c4: 4628 mov r0, r5 80078c6: 920b str r2, [sp, #44] ; 0x2c 80078c8: 47b8 blx r7 80078ca: 3001 adds r0, #1 80078cc: f43f ae99 beq.w 8007602 <_printf_float+0xb6> 80078d0: 9a0b ldr r2, [sp, #44] ; 0x2c 80078d2: f10b 0b01 add.w fp, fp, #1 80078d6: e7b9 b.n 800784c <_printf_float+0x300> 80078d8: 4631 mov r1, r6 80078da: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 80078de: 4628 mov r0, r5 80078e0: 47b8 blx r7 80078e2: 3001 adds r0, #1 80078e4: d1bf bne.n 8007866 <_printf_float+0x31a> 80078e6: e68c b.n 8007602 <_printf_float+0xb6> 80078e8: 464b mov r3, r9 80078ea: 4631 mov r1, r6 80078ec: 4628 mov r0, r5 80078ee: eb08 020a add.w r2, r8, sl 80078f2: 47b8 blx r7 80078f4: 3001 adds r0, #1 80078f6: d1c2 bne.n 800787e <_printf_float+0x332> 80078f8: e683 b.n 8007602 <_printf_float+0xb6> 80078fa: 9a0e ldr r2, [sp, #56] ; 0x38 80078fc: 2a01 cmp r2, #1 80078fe: dc01 bgt.n 8007904 <_printf_float+0x3b8> 8007900: 07db lsls r3, r3, #31 8007902: d539 bpl.n 8007978 <_printf_float+0x42c> 8007904: 2301 movs r3, #1 8007906: 4642 mov r2, r8 8007908: 4631 mov r1, r6 800790a: 4628 mov r0, r5 800790c: 47b8 blx r7 800790e: 3001 adds r0, #1 8007910: f43f ae77 beq.w 8007602 <_printf_float+0xb6> 8007914: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 8007918: 4631 mov r1, r6 800791a: 4628 mov r0, r5 800791c: 47b8 blx r7 800791e: 3001 adds r0, #1 8007920: f43f ae6f beq.w 8007602 <_printf_float+0xb6> 8007924: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48 8007928: 2200 movs r2, #0 800792a: 2300 movs r3, #0 800792c: f8dd 9038 ldr.w r9, [sp, #56] ; 0x38 8007930: f7f9 f8a6 bl 8000a80 <__aeabi_dcmpeq> 8007934: b9d8 cbnz r0, 800796e <_printf_float+0x422> 8007936: f109 33ff add.w r3, r9, #4294967295 800793a: f108 0201 add.w r2, r8, #1 800793e: 4631 mov r1, r6 8007940: 4628 mov r0, r5 8007942: 47b8 blx r7 8007944: 3001 adds r0, #1 8007946: d10e bne.n 8007966 <_printf_float+0x41a> 8007948: e65b b.n 8007602 <_printf_float+0xb6> 800794a: 2301 movs r3, #1 800794c: 464a mov r2, r9 800794e: 4631 mov r1, r6 8007950: 4628 mov r0, r5 8007952: 47b8 blx r7 8007954: 3001 adds r0, #1 8007956: f43f ae54 beq.w 8007602 <_printf_float+0xb6> 800795a: f108 0801 add.w r8, r8, #1 800795e: 9b0e ldr r3, [sp, #56] ; 0x38 8007960: 3b01 subs r3, #1 8007962: 4543 cmp r3, r8 8007964: dcf1 bgt.n 800794a <_printf_float+0x3fe> 8007966: 4653 mov r3, sl 8007968: f104 0250 add.w r2, r4, #80 ; 0x50 800796c: e6de b.n 800772c <_printf_float+0x1e0> 800796e: f04f 0800 mov.w r8, #0 8007972: f104 091a add.w r9, r4, #26 8007976: e7f2 b.n 800795e <_printf_float+0x412> 8007978: 2301 movs r3, #1 800797a: 4642 mov r2, r8 800797c: e7df b.n 800793e <_printf_float+0x3f2> 800797e: 2301 movs r3, #1 8007980: 464a mov r2, r9 8007982: 4631 mov r1, r6 8007984: 4628 mov r0, r5 8007986: 47b8 blx r7 8007988: 3001 adds r0, #1 800798a: f43f ae3a beq.w 8007602 <_printf_float+0xb6> 800798e: f108 0801 add.w r8, r8, #1 8007992: 68e3 ldr r3, [r4, #12] 8007994: 990f ldr r1, [sp, #60] ; 0x3c 8007996: 1a5b subs r3, r3, r1 8007998: 4543 cmp r3, r8 800799a: dcf0 bgt.n 800797e <_printf_float+0x432> 800799c: e6fb b.n 8007796 <_printf_float+0x24a> 800799e: f04f 0800 mov.w r8, #0 80079a2: f104 0919 add.w r9, r4, #25 80079a6: e7f4 b.n 8007992 <_printf_float+0x446> 080079a8 <_printf_common>: 80079a8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80079ac: 4616 mov r6, r2 80079ae: 4699 mov r9, r3 80079b0: 688a ldr r2, [r1, #8] 80079b2: 690b ldr r3, [r1, #16] 80079b4: 4607 mov r7, r0 80079b6: 4293 cmp r3, r2 80079b8: bfb8 it lt 80079ba: 4613 movlt r3, r2 80079bc: 6033 str r3, [r6, #0] 80079be: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 80079c2: 460c mov r4, r1 80079c4: f8dd 8020 ldr.w r8, [sp, #32] 80079c8: b10a cbz r2, 80079ce <_printf_common+0x26> 80079ca: 3301 adds r3, #1 80079cc: 6033 str r3, [r6, #0] 80079ce: 6823 ldr r3, [r4, #0] 80079d0: 0699 lsls r1, r3, #26 80079d2: bf42 ittt mi 80079d4: 6833 ldrmi r3, [r6, #0] 80079d6: 3302 addmi r3, #2 80079d8: 6033 strmi r3, [r6, #0] 80079da: 6825 ldr r5, [r4, #0] 80079dc: f015 0506 ands.w r5, r5, #6 80079e0: d106 bne.n 80079f0 <_printf_common+0x48> 80079e2: f104 0a19 add.w sl, r4, #25 80079e6: 68e3 ldr r3, [r4, #12] 80079e8: 6832 ldr r2, [r6, #0] 80079ea: 1a9b subs r3, r3, r2 80079ec: 42ab cmp r3, r5 80079ee: dc2b bgt.n 8007a48 <_printf_common+0xa0> 80079f0: f894 2043 ldrb.w r2, [r4, #67] ; 0x43 80079f4: 1e13 subs r3, r2, #0 80079f6: 6822 ldr r2, [r4, #0] 80079f8: bf18 it ne 80079fa: 2301 movne r3, #1 80079fc: 0692 lsls r2, r2, #26 80079fe: d430 bmi.n 8007a62 <_printf_common+0xba> 8007a00: 4649 mov r1, r9 8007a02: 4638 mov r0, r7 8007a04: f104 0243 add.w r2, r4, #67 ; 0x43 8007a08: 47c0 blx r8 8007a0a: 3001 adds r0, #1 8007a0c: d023 beq.n 8007a56 <_printf_common+0xae> 8007a0e: 6823 ldr r3, [r4, #0] 8007a10: 6922 ldr r2, [r4, #16] 8007a12: f003 0306 and.w r3, r3, #6 8007a16: 2b04 cmp r3, #4 8007a18: bf14 ite ne 8007a1a: 2500 movne r5, #0 8007a1c: 6833 ldreq r3, [r6, #0] 8007a1e: f04f 0600 mov.w r6, #0 8007a22: bf08 it eq 8007a24: 68e5 ldreq r5, [r4, #12] 8007a26: f104 041a add.w r4, r4, #26 8007a2a: bf08 it eq 8007a2c: 1aed subeq r5, r5, r3 8007a2e: f854 3c12 ldr.w r3, [r4, #-18] 8007a32: bf08 it eq 8007a34: ea25 75e5 biceq.w r5, r5, r5, asr #31 8007a38: 4293 cmp r3, r2 8007a3a: bfc4 itt gt 8007a3c: 1a9b subgt r3, r3, r2 8007a3e: 18ed addgt r5, r5, r3 8007a40: 42b5 cmp r5, r6 8007a42: d11a bne.n 8007a7a <_printf_common+0xd2> 8007a44: 2000 movs r0, #0 8007a46: e008 b.n 8007a5a <_printf_common+0xb2> 8007a48: 2301 movs r3, #1 8007a4a: 4652 mov r2, sl 8007a4c: 4649 mov r1, r9 8007a4e: 4638 mov r0, r7 8007a50: 47c0 blx r8 8007a52: 3001 adds r0, #1 8007a54: d103 bne.n 8007a5e <_printf_common+0xb6> 8007a56: f04f 30ff mov.w r0, #4294967295 8007a5a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8007a5e: 3501 adds r5, #1 8007a60: e7c1 b.n 80079e6 <_printf_common+0x3e> 8007a62: 2030 movs r0, #48 ; 0x30 8007a64: 18e1 adds r1, r4, r3 8007a66: f881 0043 strb.w r0, [r1, #67] ; 0x43 8007a6a: 1c5a adds r2, r3, #1 8007a6c: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8007a70: 4422 add r2, r4 8007a72: 3302 adds r3, #2 8007a74: f882 1043 strb.w r1, [r2, #67] ; 0x43 8007a78: e7c2 b.n 8007a00 <_printf_common+0x58> 8007a7a: 2301 movs r3, #1 8007a7c: 4622 mov r2, r4 8007a7e: 4649 mov r1, r9 8007a80: 4638 mov r0, r7 8007a82: 47c0 blx r8 8007a84: 3001 adds r0, #1 8007a86: d0e6 beq.n 8007a56 <_printf_common+0xae> 8007a88: 3601 adds r6, #1 8007a8a: e7d9 b.n 8007a40 <_printf_common+0x98> 08007a8c <_printf_i>: 8007a8c: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 8007a90: 7e0f ldrb r7, [r1, #24] 8007a92: 4691 mov r9, r2 8007a94: 2f78 cmp r7, #120 ; 0x78 8007a96: 4680 mov r8, r0 8007a98: 460c mov r4, r1 8007a9a: 469a mov sl, r3 8007a9c: 9d0c ldr r5, [sp, #48] ; 0x30 8007a9e: f101 0243 add.w r2, r1, #67 ; 0x43 8007aa2: d807 bhi.n 8007ab4 <_printf_i+0x28> 8007aa4: 2f62 cmp r7, #98 ; 0x62 8007aa6: d80a bhi.n 8007abe <_printf_i+0x32> 8007aa8: 2f00 cmp r7, #0 8007aaa: f000 80d5 beq.w 8007c58 <_printf_i+0x1cc> 8007aae: 2f58 cmp r7, #88 ; 0x58 8007ab0: f000 80c1 beq.w 8007c36 <_printf_i+0x1aa> 8007ab4: f104 0542 add.w r5, r4, #66 ; 0x42 8007ab8: f884 7042 strb.w r7, [r4, #66] ; 0x42 8007abc: e03a b.n 8007b34 <_printf_i+0xa8> 8007abe: f1a7 0363 sub.w r3, r7, #99 ; 0x63 8007ac2: 2b15 cmp r3, #21 8007ac4: d8f6 bhi.n 8007ab4 <_printf_i+0x28> 8007ac6: a101 add r1, pc, #4 ; (adr r1, 8007acc <_printf_i+0x40>) 8007ac8: f851 f023 ldr.w pc, [r1, r3, lsl #2] 8007acc: 08007b25 .word 0x08007b25 8007ad0: 08007b39 .word 0x08007b39 8007ad4: 08007ab5 .word 0x08007ab5 8007ad8: 08007ab5 .word 0x08007ab5 8007adc: 08007ab5 .word 0x08007ab5 8007ae0: 08007ab5 .word 0x08007ab5 8007ae4: 08007b39 .word 0x08007b39 8007ae8: 08007ab5 .word 0x08007ab5 8007aec: 08007ab5 .word 0x08007ab5 8007af0: 08007ab5 .word 0x08007ab5 8007af4: 08007ab5 .word 0x08007ab5 8007af8: 08007c3f .word 0x08007c3f 8007afc: 08007b65 .word 0x08007b65 8007b00: 08007bf9 .word 0x08007bf9 8007b04: 08007ab5 .word 0x08007ab5 8007b08: 08007ab5 .word 0x08007ab5 8007b0c: 08007c61 .word 0x08007c61 8007b10: 08007ab5 .word 0x08007ab5 8007b14: 08007b65 .word 0x08007b65 8007b18: 08007ab5 .word 0x08007ab5 8007b1c: 08007ab5 .word 0x08007ab5 8007b20: 08007c01 .word 0x08007c01 8007b24: 682b ldr r3, [r5, #0] 8007b26: 1d1a adds r2, r3, #4 8007b28: 681b ldr r3, [r3, #0] 8007b2a: 602a str r2, [r5, #0] 8007b2c: f104 0542 add.w r5, r4, #66 ; 0x42 8007b30: f884 3042 strb.w r3, [r4, #66] ; 0x42 8007b34: 2301 movs r3, #1 8007b36: e0a0 b.n 8007c7a <_printf_i+0x1ee> 8007b38: 6820 ldr r0, [r4, #0] 8007b3a: 682b ldr r3, [r5, #0] 8007b3c: 0607 lsls r7, r0, #24 8007b3e: f103 0104 add.w r1, r3, #4 8007b42: 6029 str r1, [r5, #0] 8007b44: d501 bpl.n 8007b4a <_printf_i+0xbe> 8007b46: 681e ldr r6, [r3, #0] 8007b48: e003 b.n 8007b52 <_printf_i+0xc6> 8007b4a: 0646 lsls r6, r0, #25 8007b4c: d5fb bpl.n 8007b46 <_printf_i+0xba> 8007b4e: f9b3 6000 ldrsh.w r6, [r3] 8007b52: 2e00 cmp r6, #0 8007b54: da03 bge.n 8007b5e <_printf_i+0xd2> 8007b56: 232d movs r3, #45 ; 0x2d 8007b58: 4276 negs r6, r6 8007b5a: f884 3043 strb.w r3, [r4, #67] ; 0x43 8007b5e: 230a movs r3, #10 8007b60: 4859 ldr r0, [pc, #356] ; (8007cc8 <_printf_i+0x23c>) 8007b62: e012 b.n 8007b8a <_printf_i+0xfe> 8007b64: 682b ldr r3, [r5, #0] 8007b66: 6820 ldr r0, [r4, #0] 8007b68: 1d19 adds r1, r3, #4 8007b6a: 6029 str r1, [r5, #0] 8007b6c: 0605 lsls r5, r0, #24 8007b6e: d501 bpl.n 8007b74 <_printf_i+0xe8> 8007b70: 681e ldr r6, [r3, #0] 8007b72: e002 b.n 8007b7a <_printf_i+0xee> 8007b74: 0641 lsls r1, r0, #25 8007b76: d5fb bpl.n 8007b70 <_printf_i+0xe4> 8007b78: 881e ldrh r6, [r3, #0] 8007b7a: 2f6f cmp r7, #111 ; 0x6f 8007b7c: bf0c ite eq 8007b7e: 2308 moveq r3, #8 8007b80: 230a movne r3, #10 8007b82: 4851 ldr r0, [pc, #324] ; (8007cc8 <_printf_i+0x23c>) 8007b84: 2100 movs r1, #0 8007b86: f884 1043 strb.w r1, [r4, #67] ; 0x43 8007b8a: 6865 ldr r5, [r4, #4] 8007b8c: 2d00 cmp r5, #0 8007b8e: bfa8 it ge 8007b90: 6821 ldrge r1, [r4, #0] 8007b92: 60a5 str r5, [r4, #8] 8007b94: bfa4 itt ge 8007b96: f021 0104 bicge.w r1, r1, #4 8007b9a: 6021 strge r1, [r4, #0] 8007b9c: b90e cbnz r6, 8007ba2 <_printf_i+0x116> 8007b9e: 2d00 cmp r5, #0 8007ba0: d04b beq.n 8007c3a <_printf_i+0x1ae> 8007ba2: 4615 mov r5, r2 8007ba4: fbb6 f1f3 udiv r1, r6, r3 8007ba8: fb03 6711 mls r7, r3, r1, r6 8007bac: 5dc7 ldrb r7, [r0, r7] 8007bae: f805 7d01 strb.w r7, [r5, #-1]! 8007bb2: 4637 mov r7, r6 8007bb4: 42bb cmp r3, r7 8007bb6: 460e mov r6, r1 8007bb8: d9f4 bls.n 8007ba4 <_printf_i+0x118> 8007bba: 2b08 cmp r3, #8 8007bbc: d10b bne.n 8007bd6 <_printf_i+0x14a> 8007bbe: 6823 ldr r3, [r4, #0] 8007bc0: 07de lsls r6, r3, #31 8007bc2: d508 bpl.n 8007bd6 <_printf_i+0x14a> 8007bc4: 6923 ldr r3, [r4, #16] 8007bc6: 6861 ldr r1, [r4, #4] 8007bc8: 4299 cmp r1, r3 8007bca: bfde ittt le 8007bcc: 2330 movle r3, #48 ; 0x30 8007bce: f805 3c01 strble.w r3, [r5, #-1] 8007bd2: f105 35ff addle.w r5, r5, #4294967295 8007bd6: 1b52 subs r2, r2, r5 8007bd8: 6122 str r2, [r4, #16] 8007bda: 464b mov r3, r9 8007bdc: 4621 mov r1, r4 8007bde: 4640 mov r0, r8 8007be0: f8cd a000 str.w sl, [sp] 8007be4: aa03 add r2, sp, #12 8007be6: f7ff fedf bl 80079a8 <_printf_common> 8007bea: 3001 adds r0, #1 8007bec: d14a bne.n 8007c84 <_printf_i+0x1f8> 8007bee: f04f 30ff mov.w r0, #4294967295 8007bf2: b004 add sp, #16 8007bf4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8007bf8: 6823 ldr r3, [r4, #0] 8007bfa: f043 0320 orr.w r3, r3, #32 8007bfe: 6023 str r3, [r4, #0] 8007c00: 2778 movs r7, #120 ; 0x78 8007c02: 4832 ldr r0, [pc, #200] ; (8007ccc <_printf_i+0x240>) 8007c04: f884 7045 strb.w r7, [r4, #69] ; 0x45 8007c08: 6823 ldr r3, [r4, #0] 8007c0a: 6829 ldr r1, [r5, #0] 8007c0c: 061f lsls r7, r3, #24 8007c0e: f851 6b04 ldr.w r6, [r1], #4 8007c12: d402 bmi.n 8007c1a <_printf_i+0x18e> 8007c14: 065f lsls r7, r3, #25 8007c16: bf48 it mi 8007c18: b2b6 uxthmi r6, r6 8007c1a: 07df lsls r7, r3, #31 8007c1c: bf48 it mi 8007c1e: f043 0320 orrmi.w r3, r3, #32 8007c22: 6029 str r1, [r5, #0] 8007c24: bf48 it mi 8007c26: 6023 strmi r3, [r4, #0] 8007c28: b91e cbnz r6, 8007c32 <_printf_i+0x1a6> 8007c2a: 6823 ldr r3, [r4, #0] 8007c2c: f023 0320 bic.w r3, r3, #32 8007c30: 6023 str r3, [r4, #0] 8007c32: 2310 movs r3, #16 8007c34: e7a6 b.n 8007b84 <_printf_i+0xf8> 8007c36: 4824 ldr r0, [pc, #144] ; (8007cc8 <_printf_i+0x23c>) 8007c38: e7e4 b.n 8007c04 <_printf_i+0x178> 8007c3a: 4615 mov r5, r2 8007c3c: e7bd b.n 8007bba <_printf_i+0x12e> 8007c3e: 682b ldr r3, [r5, #0] 8007c40: 6826 ldr r6, [r4, #0] 8007c42: 1d18 adds r0, r3, #4 8007c44: 6961 ldr r1, [r4, #20] 8007c46: 6028 str r0, [r5, #0] 8007c48: 0635 lsls r5, r6, #24 8007c4a: 681b ldr r3, [r3, #0] 8007c4c: d501 bpl.n 8007c52 <_printf_i+0x1c6> 8007c4e: 6019 str r1, [r3, #0] 8007c50: e002 b.n 8007c58 <_printf_i+0x1cc> 8007c52: 0670 lsls r0, r6, #25 8007c54: d5fb bpl.n 8007c4e <_printf_i+0x1c2> 8007c56: 8019 strh r1, [r3, #0] 8007c58: 2300 movs r3, #0 8007c5a: 4615 mov r5, r2 8007c5c: 6123 str r3, [r4, #16] 8007c5e: e7bc b.n 8007bda <_printf_i+0x14e> 8007c60: 682b ldr r3, [r5, #0] 8007c62: 2100 movs r1, #0 8007c64: 1d1a adds r2, r3, #4 8007c66: 602a str r2, [r5, #0] 8007c68: 681d ldr r5, [r3, #0] 8007c6a: 6862 ldr r2, [r4, #4] 8007c6c: 4628 mov r0, r5 8007c6e: f000 fa78 bl 8008162 8007c72: b108 cbz r0, 8007c78 <_printf_i+0x1ec> 8007c74: 1b40 subs r0, r0, r5 8007c76: 6060 str r0, [r4, #4] 8007c78: 6863 ldr r3, [r4, #4] 8007c7a: 6123 str r3, [r4, #16] 8007c7c: 2300 movs r3, #0 8007c7e: f884 3043 strb.w r3, [r4, #67] ; 0x43 8007c82: e7aa b.n 8007bda <_printf_i+0x14e> 8007c84: 462a mov r2, r5 8007c86: 4649 mov r1, r9 8007c88: 4640 mov r0, r8 8007c8a: 6923 ldr r3, [r4, #16] 8007c8c: 47d0 blx sl 8007c8e: 3001 adds r0, #1 8007c90: d0ad beq.n 8007bee <_printf_i+0x162> 8007c92: 6823 ldr r3, [r4, #0] 8007c94: 079b lsls r3, r3, #30 8007c96: d413 bmi.n 8007cc0 <_printf_i+0x234> 8007c98: 68e0 ldr r0, [r4, #12] 8007c9a: 9b03 ldr r3, [sp, #12] 8007c9c: 4298 cmp r0, r3 8007c9e: bfb8 it lt 8007ca0: 4618 movlt r0, r3 8007ca2: e7a6 b.n 8007bf2 <_printf_i+0x166> 8007ca4: 2301 movs r3, #1 8007ca6: 4632 mov r2, r6 8007ca8: 4649 mov r1, r9 8007caa: 4640 mov r0, r8 8007cac: 47d0 blx sl 8007cae: 3001 adds r0, #1 8007cb0: d09d beq.n 8007bee <_printf_i+0x162> 8007cb2: 3501 adds r5, #1 8007cb4: 68e3 ldr r3, [r4, #12] 8007cb6: 9903 ldr r1, [sp, #12] 8007cb8: 1a5b subs r3, r3, r1 8007cba: 42ab cmp r3, r5 8007cbc: dcf2 bgt.n 8007ca4 <_printf_i+0x218> 8007cbe: e7eb b.n 8007c98 <_printf_i+0x20c> 8007cc0: 2500 movs r5, #0 8007cc2: f104 0619 add.w r6, r4, #25 8007cc6: e7f5 b.n 8007cb4 <_printf_i+0x228> 8007cc8: 0800ab12 .word 0x0800ab12 8007ccc: 0800ab23 .word 0x0800ab23 08007cd0 : 8007cd0: 2300 movs r3, #0 8007cd2: b510 push {r4, lr} 8007cd4: 4604 mov r4, r0 8007cd6: e9c0 3300 strd r3, r3, [r0] 8007cda: e9c0 3304 strd r3, r3, [r0, #16] 8007cde: 6083 str r3, [r0, #8] 8007ce0: 8181 strh r1, [r0, #12] 8007ce2: 6643 str r3, [r0, #100] ; 0x64 8007ce4: 81c2 strh r2, [r0, #14] 8007ce6: 6183 str r3, [r0, #24] 8007ce8: 4619 mov r1, r3 8007cea: 2208 movs r2, #8 8007cec: 305c adds r0, #92 ; 0x5c 8007cee: f000 f9a9 bl 8008044 8007cf2: 4b0d ldr r3, [pc, #52] ; (8007d28 ) 8007cf4: 6224 str r4, [r4, #32] 8007cf6: 6263 str r3, [r4, #36] ; 0x24 8007cf8: 4b0c ldr r3, [pc, #48] ; (8007d2c ) 8007cfa: 62a3 str r3, [r4, #40] ; 0x28 8007cfc: 4b0c ldr r3, [pc, #48] ; (8007d30 ) 8007cfe: 62e3 str r3, [r4, #44] ; 0x2c 8007d00: 4b0c ldr r3, [pc, #48] ; (8007d34 ) 8007d02: 6323 str r3, [r4, #48] ; 0x30 8007d04: 4b0c ldr r3, [pc, #48] ; (8007d38 ) 8007d06: 429c cmp r4, r3 8007d08: d006 beq.n 8007d18 8007d0a: f103 0268 add.w r2, r3, #104 ; 0x68 8007d0e: 4294 cmp r4, r2 8007d10: d002 beq.n 8007d18 8007d12: 33d0 adds r3, #208 ; 0xd0 8007d14: 429c cmp r4, r3 8007d16: d105 bne.n 8007d24 8007d18: f104 0058 add.w r0, r4, #88 ; 0x58 8007d1c: e8bd 4010 ldmia.w sp!, {r4, lr} 8007d20: f000 ba1c b.w 800815c <__retarget_lock_init_recursive> 8007d24: bd10 pop {r4, pc} 8007d26: bf00 nop 8007d28: 08007e95 .word 0x08007e95 8007d2c: 08007eb7 .word 0x08007eb7 8007d30: 08007eef .word 0x08007eef 8007d34: 08007f13 .word 0x08007f13 8007d38: 2000251c .word 0x2000251c 08007d3c : 8007d3c: 4a02 ldr r2, [pc, #8] ; (8007d48 ) 8007d3e: 4903 ldr r1, [pc, #12] ; (8007d4c ) 8007d40: 4803 ldr r0, [pc, #12] ; (8007d50 ) 8007d42: f000 b869 b.w 8007e18 <_fwalk_sglue> 8007d46: bf00 nop 8007d48: 2000000c .word 0x2000000c 8007d4c: 08009c11 .word 0x08009c11 8007d50: 20000018 .word 0x20000018 08007d54 : 8007d54: 6841 ldr r1, [r0, #4] 8007d56: 4b0c ldr r3, [pc, #48] ; (8007d88 ) 8007d58: b510 push {r4, lr} 8007d5a: 4299 cmp r1, r3 8007d5c: 4604 mov r4, r0 8007d5e: d001 beq.n 8007d64 8007d60: f001 ff56 bl 8009c10 <_fflush_r> 8007d64: 68a1 ldr r1, [r4, #8] 8007d66: 4b09 ldr r3, [pc, #36] ; (8007d8c ) 8007d68: 4299 cmp r1, r3 8007d6a: d002 beq.n 8007d72 8007d6c: 4620 mov r0, r4 8007d6e: f001 ff4f bl 8009c10 <_fflush_r> 8007d72: 68e1 ldr r1, [r4, #12] 8007d74: 4b06 ldr r3, [pc, #24] ; (8007d90 ) 8007d76: 4299 cmp r1, r3 8007d78: d004 beq.n 8007d84 8007d7a: 4620 mov r0, r4 8007d7c: e8bd 4010 ldmia.w sp!, {r4, lr} 8007d80: f001 bf46 b.w 8009c10 <_fflush_r> 8007d84: bd10 pop {r4, pc} 8007d86: bf00 nop 8007d88: 2000251c .word 0x2000251c 8007d8c: 20002584 .word 0x20002584 8007d90: 200025ec .word 0x200025ec 08007d94 : 8007d94: b510 push {r4, lr} 8007d96: 4b0b ldr r3, [pc, #44] ; (8007dc4 ) 8007d98: 4c0b ldr r4, [pc, #44] ; (8007dc8 ) 8007d9a: 4a0c ldr r2, [pc, #48] ; (8007dcc ) 8007d9c: 4620 mov r0, r4 8007d9e: 601a str r2, [r3, #0] 8007da0: 2104 movs r1, #4 8007da2: 2200 movs r2, #0 8007da4: f7ff ff94 bl 8007cd0 8007da8: f104 0068 add.w r0, r4, #104 ; 0x68 8007dac: 2201 movs r2, #1 8007dae: 2109 movs r1, #9 8007db0: f7ff ff8e bl 8007cd0 8007db4: f104 00d0 add.w r0, r4, #208 ; 0xd0 8007db8: 2202 movs r2, #2 8007dba: e8bd 4010 ldmia.w sp!, {r4, lr} 8007dbe: 2112 movs r1, #18 8007dc0: f7ff bf86 b.w 8007cd0 8007dc4: 20002654 .word 0x20002654 8007dc8: 2000251c .word 0x2000251c 8007dcc: 08007d3d .word 0x08007d3d 08007dd0 <__sfp_lock_acquire>: 8007dd0: 4801 ldr r0, [pc, #4] ; (8007dd8 <__sfp_lock_acquire+0x8>) 8007dd2: f000 b9c4 b.w 800815e <__retarget_lock_acquire_recursive> 8007dd6: bf00 nop 8007dd8: 2000265d .word 0x2000265d 08007ddc <__sfp_lock_release>: 8007ddc: 4801 ldr r0, [pc, #4] ; (8007de4 <__sfp_lock_release+0x8>) 8007dde: f000 b9bf b.w 8008160 <__retarget_lock_release_recursive> 8007de2: bf00 nop 8007de4: 2000265d .word 0x2000265d 08007de8 <__sinit>: 8007de8: b510 push {r4, lr} 8007dea: 4604 mov r4, r0 8007dec: f7ff fff0 bl 8007dd0 <__sfp_lock_acquire> 8007df0: 6a23 ldr r3, [r4, #32] 8007df2: b11b cbz r3, 8007dfc <__sinit+0x14> 8007df4: e8bd 4010 ldmia.w sp!, {r4, lr} 8007df8: f7ff bff0 b.w 8007ddc <__sfp_lock_release> 8007dfc: 4b04 ldr r3, [pc, #16] ; (8007e10 <__sinit+0x28>) 8007dfe: 6223 str r3, [r4, #32] 8007e00: 4b04 ldr r3, [pc, #16] ; (8007e14 <__sinit+0x2c>) 8007e02: 681b ldr r3, [r3, #0] 8007e04: 2b00 cmp r3, #0 8007e06: d1f5 bne.n 8007df4 <__sinit+0xc> 8007e08: f7ff ffc4 bl 8007d94 8007e0c: e7f2 b.n 8007df4 <__sinit+0xc> 8007e0e: bf00 nop 8007e10: 08007d55 .word 0x08007d55 8007e14: 20002654 .word 0x20002654 08007e18 <_fwalk_sglue>: 8007e18: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8007e1c: 4607 mov r7, r0 8007e1e: 4688 mov r8, r1 8007e20: 4614 mov r4, r2 8007e22: 2600 movs r6, #0 8007e24: e9d4 9501 ldrd r9, r5, [r4, #4] 8007e28: f1b9 0901 subs.w r9, r9, #1 8007e2c: d505 bpl.n 8007e3a <_fwalk_sglue+0x22> 8007e2e: 6824 ldr r4, [r4, #0] 8007e30: 2c00 cmp r4, #0 8007e32: d1f7 bne.n 8007e24 <_fwalk_sglue+0xc> 8007e34: 4630 mov r0, r6 8007e36: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8007e3a: 89ab ldrh r3, [r5, #12] 8007e3c: 2b01 cmp r3, #1 8007e3e: d907 bls.n 8007e50 <_fwalk_sglue+0x38> 8007e40: f9b5 300e ldrsh.w r3, [r5, #14] 8007e44: 3301 adds r3, #1 8007e46: d003 beq.n 8007e50 <_fwalk_sglue+0x38> 8007e48: 4629 mov r1, r5 8007e4a: 4638 mov r0, r7 8007e4c: 47c0 blx r8 8007e4e: 4306 orrs r6, r0 8007e50: 3568 adds r5, #104 ; 0x68 8007e52: e7e9 b.n 8007e28 <_fwalk_sglue+0x10> 08007e54 : 8007e54: b40e push {r1, r2, r3} 8007e56: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000 8007e5a: b500 push {lr} 8007e5c: b09c sub sp, #112 ; 0x70 8007e5e: ab1d add r3, sp, #116 ; 0x74 8007e60: 9002 str r0, [sp, #8] 8007e62: 9006 str r0, [sp, #24] 8007e64: 9107 str r1, [sp, #28] 8007e66: 9104 str r1, [sp, #16] 8007e68: 4808 ldr r0, [pc, #32] ; (8007e8c ) 8007e6a: 4909 ldr r1, [pc, #36] ; (8007e90 ) 8007e6c: f853 2b04 ldr.w r2, [r3], #4 8007e70: 9105 str r1, [sp, #20] 8007e72: 6800 ldr r0, [r0, #0] 8007e74: a902 add r1, sp, #8 8007e76: 9301 str r3, [sp, #4] 8007e78: f001 fc08 bl 800968c <_svfiprintf_r> 8007e7c: 2200 movs r2, #0 8007e7e: 9b02 ldr r3, [sp, #8] 8007e80: 701a strb r2, [r3, #0] 8007e82: b01c add sp, #112 ; 0x70 8007e84: f85d eb04 ldr.w lr, [sp], #4 8007e88: b003 add sp, #12 8007e8a: 4770 bx lr 8007e8c: 20000064 .word 0x20000064 8007e90: ffff0208 .word 0xffff0208 08007e94 <__sread>: 8007e94: b510 push {r4, lr} 8007e96: 460c mov r4, r1 8007e98: f9b1 100e ldrsh.w r1, [r1, #14] 8007e9c: f000 f900 bl 80080a0 <_read_r> 8007ea0: 2800 cmp r0, #0 8007ea2: bfab itete ge 8007ea4: 6d63 ldrge r3, [r4, #84] ; 0x54 8007ea6: 89a3 ldrhlt r3, [r4, #12] 8007ea8: 181b addge r3, r3, r0 8007eaa: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 8007eae: bfac ite ge 8007eb0: 6563 strge r3, [r4, #84] ; 0x54 8007eb2: 81a3 strhlt r3, [r4, #12] 8007eb4: bd10 pop {r4, pc} 08007eb6 <__swrite>: 8007eb6: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8007eba: 461f mov r7, r3 8007ebc: 898b ldrh r3, [r1, #12] 8007ebe: 4605 mov r5, r0 8007ec0: 05db lsls r3, r3, #23 8007ec2: 460c mov r4, r1 8007ec4: 4616 mov r6, r2 8007ec6: d505 bpl.n 8007ed4 <__swrite+0x1e> 8007ec8: 2302 movs r3, #2 8007eca: 2200 movs r2, #0 8007ecc: f9b1 100e ldrsh.w r1, [r1, #14] 8007ed0: f000 f8d4 bl 800807c <_lseek_r> 8007ed4: 89a3 ldrh r3, [r4, #12] 8007ed6: 4632 mov r2, r6 8007ed8: f423 5380 bic.w r3, r3, #4096 ; 0x1000 8007edc: 81a3 strh r3, [r4, #12] 8007ede: 4628 mov r0, r5 8007ee0: 463b mov r3, r7 8007ee2: f9b4 100e ldrsh.w r1, [r4, #14] 8007ee6: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8007eea: f000 b8fb b.w 80080e4 <_write_r> 08007eee <__sseek>: 8007eee: b510 push {r4, lr} 8007ef0: 460c mov r4, r1 8007ef2: f9b1 100e ldrsh.w r1, [r1, #14] 8007ef6: f000 f8c1 bl 800807c <_lseek_r> 8007efa: 1c43 adds r3, r0, #1 8007efc: 89a3 ldrh r3, [r4, #12] 8007efe: bf15 itete ne 8007f00: 6560 strne r0, [r4, #84] ; 0x54 8007f02: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 8007f06: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 8007f0a: 81a3 strheq r3, [r4, #12] 8007f0c: bf18 it ne 8007f0e: 81a3 strhne r3, [r4, #12] 8007f10: bd10 pop {r4, pc} 08007f12 <__sclose>: 8007f12: f9b1 100e ldrsh.w r1, [r1, #14] 8007f16: f000 b8a1 b.w 800805c <_close_r> 08007f1a <__swbuf_r>: 8007f1a: b5f8 push {r3, r4, r5, r6, r7, lr} 8007f1c: 460e mov r6, r1 8007f1e: 4614 mov r4, r2 8007f20: 4605 mov r5, r0 8007f22: b118 cbz r0, 8007f2c <__swbuf_r+0x12> 8007f24: 6a03 ldr r3, [r0, #32] 8007f26: b90b cbnz r3, 8007f2c <__swbuf_r+0x12> 8007f28: f7ff ff5e bl 8007de8 <__sinit> 8007f2c: 69a3 ldr r3, [r4, #24] 8007f2e: 60a3 str r3, [r4, #8] 8007f30: 89a3 ldrh r3, [r4, #12] 8007f32: 071a lsls r2, r3, #28 8007f34: d525 bpl.n 8007f82 <__swbuf_r+0x68> 8007f36: 6923 ldr r3, [r4, #16] 8007f38: b31b cbz r3, 8007f82 <__swbuf_r+0x68> 8007f3a: 6823 ldr r3, [r4, #0] 8007f3c: 6922 ldr r2, [r4, #16] 8007f3e: b2f6 uxtb r6, r6 8007f40: 1a98 subs r0, r3, r2 8007f42: 6963 ldr r3, [r4, #20] 8007f44: 4637 mov r7, r6 8007f46: 4283 cmp r3, r0 8007f48: dc04 bgt.n 8007f54 <__swbuf_r+0x3a> 8007f4a: 4621 mov r1, r4 8007f4c: 4628 mov r0, r5 8007f4e: f001 fe5f bl 8009c10 <_fflush_r> 8007f52: b9e0 cbnz r0, 8007f8e <__swbuf_r+0x74> 8007f54: 68a3 ldr r3, [r4, #8] 8007f56: 3b01 subs r3, #1 8007f58: 60a3 str r3, [r4, #8] 8007f5a: 6823 ldr r3, [r4, #0] 8007f5c: 1c5a adds r2, r3, #1 8007f5e: 6022 str r2, [r4, #0] 8007f60: 701e strb r6, [r3, #0] 8007f62: 6962 ldr r2, [r4, #20] 8007f64: 1c43 adds r3, r0, #1 8007f66: 429a cmp r2, r3 8007f68: d004 beq.n 8007f74 <__swbuf_r+0x5a> 8007f6a: 89a3 ldrh r3, [r4, #12] 8007f6c: 07db lsls r3, r3, #31 8007f6e: d506 bpl.n 8007f7e <__swbuf_r+0x64> 8007f70: 2e0a cmp r6, #10 8007f72: d104 bne.n 8007f7e <__swbuf_r+0x64> 8007f74: 4621 mov r1, r4 8007f76: 4628 mov r0, r5 8007f78: f001 fe4a bl 8009c10 <_fflush_r> 8007f7c: b938 cbnz r0, 8007f8e <__swbuf_r+0x74> 8007f7e: 4638 mov r0, r7 8007f80: bdf8 pop {r3, r4, r5, r6, r7, pc} 8007f82: 4621 mov r1, r4 8007f84: 4628 mov r0, r5 8007f86: f000 f805 bl 8007f94 <__swsetup_r> 8007f8a: 2800 cmp r0, #0 8007f8c: d0d5 beq.n 8007f3a <__swbuf_r+0x20> 8007f8e: f04f 37ff mov.w r7, #4294967295 8007f92: e7f4 b.n 8007f7e <__swbuf_r+0x64> 08007f94 <__swsetup_r>: 8007f94: b538 push {r3, r4, r5, lr} 8007f96: 4b2a ldr r3, [pc, #168] ; (8008040 <__swsetup_r+0xac>) 8007f98: 4605 mov r5, r0 8007f9a: 6818 ldr r0, [r3, #0] 8007f9c: 460c mov r4, r1 8007f9e: b118 cbz r0, 8007fa8 <__swsetup_r+0x14> 8007fa0: 6a03 ldr r3, [r0, #32] 8007fa2: b90b cbnz r3, 8007fa8 <__swsetup_r+0x14> 8007fa4: f7ff ff20 bl 8007de8 <__sinit> 8007fa8: 89a3 ldrh r3, [r4, #12] 8007faa: f9b4 200c ldrsh.w r2, [r4, #12] 8007fae: 0718 lsls r0, r3, #28 8007fb0: d422 bmi.n 8007ff8 <__swsetup_r+0x64> 8007fb2: 06d9 lsls r1, r3, #27 8007fb4: d407 bmi.n 8007fc6 <__swsetup_r+0x32> 8007fb6: 2309 movs r3, #9 8007fb8: 602b str r3, [r5, #0] 8007fba: f042 0340 orr.w r3, r2, #64 ; 0x40 8007fbe: f04f 30ff mov.w r0, #4294967295 8007fc2: 81a3 strh r3, [r4, #12] 8007fc4: e034 b.n 8008030 <__swsetup_r+0x9c> 8007fc6: 0758 lsls r0, r3, #29 8007fc8: d512 bpl.n 8007ff0 <__swsetup_r+0x5c> 8007fca: 6b61 ldr r1, [r4, #52] ; 0x34 8007fcc: b141 cbz r1, 8007fe0 <__swsetup_r+0x4c> 8007fce: f104 0344 add.w r3, r4, #68 ; 0x44 8007fd2: 4299 cmp r1, r3 8007fd4: d002 beq.n 8007fdc <__swsetup_r+0x48> 8007fd6: 4628 mov r0, r5 8007fd8: f000 ff3e bl 8008e58 <_free_r> 8007fdc: 2300 movs r3, #0 8007fde: 6363 str r3, [r4, #52] ; 0x34 8007fe0: 89a3 ldrh r3, [r4, #12] 8007fe2: f023 0324 bic.w r3, r3, #36 ; 0x24 8007fe6: 81a3 strh r3, [r4, #12] 8007fe8: 2300 movs r3, #0 8007fea: 6063 str r3, [r4, #4] 8007fec: 6923 ldr r3, [r4, #16] 8007fee: 6023 str r3, [r4, #0] 8007ff0: 89a3 ldrh r3, [r4, #12] 8007ff2: f043 0308 orr.w r3, r3, #8 8007ff6: 81a3 strh r3, [r4, #12] 8007ff8: 6923 ldr r3, [r4, #16] 8007ffa: b94b cbnz r3, 8008010 <__swsetup_r+0x7c> 8007ffc: 89a3 ldrh r3, [r4, #12] 8007ffe: f403 7320 and.w r3, r3, #640 ; 0x280 8008002: f5b3 7f00 cmp.w r3, #512 ; 0x200 8008006: d003 beq.n 8008010 <__swsetup_r+0x7c> 8008008: 4621 mov r1, r4 800800a: 4628 mov r0, r5 800800c: f001 fe4d bl 8009caa <__smakebuf_r> 8008010: 89a0 ldrh r0, [r4, #12] 8008012: f9b4 200c ldrsh.w r2, [r4, #12] 8008016: f010 0301 ands.w r3, r0, #1 800801a: d00a beq.n 8008032 <__swsetup_r+0x9e> 800801c: 2300 movs r3, #0 800801e: 60a3 str r3, [r4, #8] 8008020: 6963 ldr r3, [r4, #20] 8008022: 425b negs r3, r3 8008024: 61a3 str r3, [r4, #24] 8008026: 6923 ldr r3, [r4, #16] 8008028: b943 cbnz r3, 800803c <__swsetup_r+0xa8> 800802a: f010 0080 ands.w r0, r0, #128 ; 0x80 800802e: d1c4 bne.n 8007fba <__swsetup_r+0x26> 8008030: bd38 pop {r3, r4, r5, pc} 8008032: 0781 lsls r1, r0, #30 8008034: bf58 it pl 8008036: 6963 ldrpl r3, [r4, #20] 8008038: 60a3 str r3, [r4, #8] 800803a: e7f4 b.n 8008026 <__swsetup_r+0x92> 800803c: 2000 movs r0, #0 800803e: e7f7 b.n 8008030 <__swsetup_r+0x9c> 8008040: 20000064 .word 0x20000064 08008044 : 8008044: 4603 mov r3, r0 8008046: 4402 add r2, r0 8008048: 4293 cmp r3, r2 800804a: d100 bne.n 800804e 800804c: 4770 bx lr 800804e: f803 1b01 strb.w r1, [r3], #1 8008052: e7f9 b.n 8008048 08008054 <_localeconv_r>: 8008054: 4800 ldr r0, [pc, #0] ; (8008058 <_localeconv_r+0x4>) 8008056: 4770 bx lr 8008058: 20000158 .word 0x20000158 0800805c <_close_r>: 800805c: b538 push {r3, r4, r5, lr} 800805e: 2300 movs r3, #0 8008060: 4d05 ldr r5, [pc, #20] ; (8008078 <_close_r+0x1c>) 8008062: 4604 mov r4, r0 8008064: 4608 mov r0, r1 8008066: 602b str r3, [r5, #0] 8008068: f7f9 fd8e bl 8001b88 <_close> 800806c: 1c43 adds r3, r0, #1 800806e: d102 bne.n 8008076 <_close_r+0x1a> 8008070: 682b ldr r3, [r5, #0] 8008072: b103 cbz r3, 8008076 <_close_r+0x1a> 8008074: 6023 str r3, [r4, #0] 8008076: bd38 pop {r3, r4, r5, pc} 8008078: 20002658 .word 0x20002658 0800807c <_lseek_r>: 800807c: b538 push {r3, r4, r5, lr} 800807e: 4604 mov r4, r0 8008080: 4608 mov r0, r1 8008082: 4611 mov r1, r2 8008084: 2200 movs r2, #0 8008086: 4d05 ldr r5, [pc, #20] ; (800809c <_lseek_r+0x20>) 8008088: 602a str r2, [r5, #0] 800808a: 461a mov r2, r3 800808c: f7f9 fda0 bl 8001bd0 <_lseek> 8008090: 1c43 adds r3, r0, #1 8008092: d102 bne.n 800809a <_lseek_r+0x1e> 8008094: 682b ldr r3, [r5, #0] 8008096: b103 cbz r3, 800809a <_lseek_r+0x1e> 8008098: 6023 str r3, [r4, #0] 800809a: bd38 pop {r3, r4, r5, pc} 800809c: 20002658 .word 0x20002658 080080a0 <_read_r>: 80080a0: b538 push {r3, r4, r5, lr} 80080a2: 4604 mov r4, r0 80080a4: 4608 mov r0, r1 80080a6: 4611 mov r1, r2 80080a8: 2200 movs r2, #0 80080aa: 4d05 ldr r5, [pc, #20] ; (80080c0 <_read_r+0x20>) 80080ac: 602a str r2, [r5, #0] 80080ae: 461a mov r2, r3 80080b0: f7f9 fd4d bl 8001b4e <_read> 80080b4: 1c43 adds r3, r0, #1 80080b6: d102 bne.n 80080be <_read_r+0x1e> 80080b8: 682b ldr r3, [r5, #0] 80080ba: b103 cbz r3, 80080be <_read_r+0x1e> 80080bc: 6023 str r3, [r4, #0] 80080be: bd38 pop {r3, r4, r5, pc} 80080c0: 20002658 .word 0x20002658 080080c4 <_sbrk_r>: 80080c4: b538 push {r3, r4, r5, lr} 80080c6: 2300 movs r3, #0 80080c8: 4d05 ldr r5, [pc, #20] ; (80080e0 <_sbrk_r+0x1c>) 80080ca: 4604 mov r4, r0 80080cc: 4608 mov r0, r1 80080ce: 602b str r3, [r5, #0] 80080d0: f7f9 fd8a bl 8001be8 <_sbrk> 80080d4: 1c43 adds r3, r0, #1 80080d6: d102 bne.n 80080de <_sbrk_r+0x1a> 80080d8: 682b ldr r3, [r5, #0] 80080da: b103 cbz r3, 80080de <_sbrk_r+0x1a> 80080dc: 6023 str r3, [r4, #0] 80080de: bd38 pop {r3, r4, r5, pc} 80080e0: 20002658 .word 0x20002658 080080e4 <_write_r>: 80080e4: b538 push {r3, r4, r5, lr} 80080e6: 4604 mov r4, r0 80080e8: 4608 mov r0, r1 80080ea: 4611 mov r1, r2 80080ec: 2200 movs r2, #0 80080ee: 4d05 ldr r5, [pc, #20] ; (8008104 <_write_r+0x20>) 80080f0: 602a str r2, [r5, #0] 80080f2: 461a mov r2, r3 80080f4: f7f9 f84e bl 8001194 <_write> 80080f8: 1c43 adds r3, r0, #1 80080fa: d102 bne.n 8008102 <_write_r+0x1e> 80080fc: 682b ldr r3, [r5, #0] 80080fe: b103 cbz r3, 8008102 <_write_r+0x1e> 8008100: 6023 str r3, [r4, #0] 8008102: bd38 pop {r3, r4, r5, pc} 8008104: 20002658 .word 0x20002658 08008108 <__errno>: 8008108: 4b01 ldr r3, [pc, #4] ; (8008110 <__errno+0x8>) 800810a: 6818 ldr r0, [r3, #0] 800810c: 4770 bx lr 800810e: bf00 nop 8008110: 20000064 .word 0x20000064 08008114 <__libc_init_array>: 8008114: b570 push {r4, r5, r6, lr} 8008116: 2600 movs r6, #0 8008118: 4d0c ldr r5, [pc, #48] ; (800814c <__libc_init_array+0x38>) 800811a: 4c0d ldr r4, [pc, #52] ; (8008150 <__libc_init_array+0x3c>) 800811c: 1b64 subs r4, r4, r5 800811e: 10a4 asrs r4, r4, #2 8008120: 42a6 cmp r6, r4 8008122: d109 bne.n 8008138 <__libc_init_array+0x24> 8008124: f001 ff2e bl 8009f84 <_init> 8008128: 2600 movs r6, #0 800812a: 4d0a ldr r5, [pc, #40] ; (8008154 <__libc_init_array+0x40>) 800812c: 4c0a ldr r4, [pc, #40] ; (8008158 <__libc_init_array+0x44>) 800812e: 1b64 subs r4, r4, r5 8008130: 10a4 asrs r4, r4, #2 8008132: 42a6 cmp r6, r4 8008134: d105 bne.n 8008142 <__libc_init_array+0x2e> 8008136: bd70 pop {r4, r5, r6, pc} 8008138: f855 3b04 ldr.w r3, [r5], #4 800813c: 4798 blx r3 800813e: 3601 adds r6, #1 8008140: e7ee b.n 8008120 <__libc_init_array+0xc> 8008142: f855 3b04 ldr.w r3, [r5], #4 8008146: 4798 blx r3 8008148: 3601 adds r6, #1 800814a: e7f2 b.n 8008132 <__libc_init_array+0x1e> 800814c: 0800ae74 .word 0x0800ae74 8008150: 0800ae74 .word 0x0800ae74 8008154: 0800ae74 .word 0x0800ae74 8008158: 0800ae78 .word 0x0800ae78 0800815c <__retarget_lock_init_recursive>: 800815c: 4770 bx lr 0800815e <__retarget_lock_acquire_recursive>: 800815e: 4770 bx lr 08008160 <__retarget_lock_release_recursive>: 8008160: 4770 bx lr 08008162 : 8008162: 4603 mov r3, r0 8008164: b510 push {r4, lr} 8008166: b2c9 uxtb r1, r1 8008168: 4402 add r2, r0 800816a: 4293 cmp r3, r2 800816c: 4618 mov r0, r3 800816e: d101 bne.n 8008174 8008170: 2000 movs r0, #0 8008172: e003 b.n 800817c 8008174: 7804 ldrb r4, [r0, #0] 8008176: 3301 adds r3, #1 8008178: 428c cmp r4, r1 800817a: d1f6 bne.n 800816a 800817c: bd10 pop {r4, pc} 0800817e : 800817e: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8008182: 6903 ldr r3, [r0, #16] 8008184: 690c ldr r4, [r1, #16] 8008186: 4607 mov r7, r0 8008188: 42a3 cmp r3, r4 800818a: db7f blt.n 800828c 800818c: 3c01 subs r4, #1 800818e: f100 0514 add.w r5, r0, #20 8008192: f101 0814 add.w r8, r1, #20 8008196: eb05 0384 add.w r3, r5, r4, lsl #2 800819a: 9301 str r3, [sp, #4] 800819c: f858 3024 ldr.w r3, [r8, r4, lsl #2] 80081a0: f855 2024 ldr.w r2, [r5, r4, lsl #2] 80081a4: 3301 adds r3, #1 80081a6: 429a cmp r2, r3 80081a8: fbb2 f6f3 udiv r6, r2, r3 80081ac: ea4f 0b84 mov.w fp, r4, lsl #2 80081b0: eb08 0984 add.w r9, r8, r4, lsl #2 80081b4: d331 bcc.n 800821a 80081b6: f04f 0e00 mov.w lr, #0 80081ba: 4640 mov r0, r8 80081bc: 46ac mov ip, r5 80081be: 46f2 mov sl, lr 80081c0: f850 2b04 ldr.w r2, [r0], #4 80081c4: b293 uxth r3, r2 80081c6: fb06 e303 mla r3, r6, r3, lr 80081ca: ea4f 4e12 mov.w lr, r2, lsr #16 80081ce: 0c1a lsrs r2, r3, #16 80081d0: b29b uxth r3, r3 80081d2: fb06 220e mla r2, r6, lr, r2 80081d6: ebaa 0303 sub.w r3, sl, r3 80081da: f8dc a000 ldr.w sl, [ip] 80081de: ea4f 4e12 mov.w lr, r2, lsr #16 80081e2: fa1f fa8a uxth.w sl, sl 80081e6: 4453 add r3, sl 80081e8: f8dc a000 ldr.w sl, [ip] 80081ec: b292 uxth r2, r2 80081ee: ebc2 421a rsb r2, r2, sl, lsr #16 80081f2: eb02 4223 add.w r2, r2, r3, asr #16 80081f6: b29b uxth r3, r3 80081f8: ea43 4302 orr.w r3, r3, r2, lsl #16 80081fc: 4581 cmp r9, r0 80081fe: ea4f 4a22 mov.w sl, r2, asr #16 8008202: f84c 3b04 str.w r3, [ip], #4 8008206: d2db bcs.n 80081c0 8008208: f855 300b ldr.w r3, [r5, fp] 800820c: b92b cbnz r3, 800821a 800820e: 9b01 ldr r3, [sp, #4] 8008210: 3b04 subs r3, #4 8008212: 429d cmp r5, r3 8008214: 461a mov r2, r3 8008216: d32d bcc.n 8008274 8008218: 613c str r4, [r7, #16] 800821a: 4638 mov r0, r7 800821c: f001 f8de bl 80093dc <__mcmp> 8008220: 2800 cmp r0, #0 8008222: db23 blt.n 800826c 8008224: 4629 mov r1, r5 8008226: 2000 movs r0, #0 8008228: 3601 adds r6, #1 800822a: f858 2b04 ldr.w r2, [r8], #4 800822e: f8d1 c000 ldr.w ip, [r1] 8008232: b293 uxth r3, r2 8008234: 1ac3 subs r3, r0, r3 8008236: 0c12 lsrs r2, r2, #16 8008238: fa1f f08c uxth.w r0, ip 800823c: 4403 add r3, r0 800823e: ebc2 421c rsb r2, r2, ip, lsr #16 8008242: eb02 4223 add.w r2, r2, r3, asr #16 8008246: b29b uxth r3, r3 8008248: ea43 4302 orr.w r3, r3, r2, lsl #16 800824c: 45c1 cmp r9, r8 800824e: ea4f 4022 mov.w r0, r2, asr #16 8008252: f841 3b04 str.w r3, [r1], #4 8008256: d2e8 bcs.n 800822a 8008258: f855 2024 ldr.w r2, [r5, r4, lsl #2] 800825c: eb05 0384 add.w r3, r5, r4, lsl #2 8008260: b922 cbnz r2, 800826c 8008262: 3b04 subs r3, #4 8008264: 429d cmp r5, r3 8008266: 461a mov r2, r3 8008268: d30a bcc.n 8008280 800826a: 613c str r4, [r7, #16] 800826c: 4630 mov r0, r6 800826e: b003 add sp, #12 8008270: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8008274: 6812 ldr r2, [r2, #0] 8008276: 3b04 subs r3, #4 8008278: 2a00 cmp r2, #0 800827a: d1cd bne.n 8008218 800827c: 3c01 subs r4, #1 800827e: e7c8 b.n 8008212 8008280: 6812 ldr r2, [r2, #0] 8008282: 3b04 subs r3, #4 8008284: 2a00 cmp r2, #0 8008286: d1f0 bne.n 800826a 8008288: 3c01 subs r4, #1 800828a: e7eb b.n 8008264 800828c: 2000 movs r0, #0 800828e: e7ee b.n 800826e 08008290 <_dtoa_r>: 8008290: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8008294: 4616 mov r6, r2 8008296: 461f mov r7, r3 8008298: 69c4 ldr r4, [r0, #28] 800829a: b099 sub sp, #100 ; 0x64 800829c: 4605 mov r5, r0 800829e: e9cd 6704 strd r6, r7, [sp, #16] 80082a2: f8dd 8094 ldr.w r8, [sp, #148] ; 0x94 80082a6: b974 cbnz r4, 80082c6 <_dtoa_r+0x36> 80082a8: 2010 movs r0, #16 80082aa: f7fe fff7 bl 800729c 80082ae: 4602 mov r2, r0 80082b0: 61e8 str r0, [r5, #28] 80082b2: b920 cbnz r0, 80082be <_dtoa_r+0x2e> 80082b4: 21ef movs r1, #239 ; 0xef 80082b6: 4bac ldr r3, [pc, #688] ; (8008568 <_dtoa_r+0x2d8>) 80082b8: 48ac ldr r0, [pc, #688] ; (800856c <_dtoa_r+0x2dc>) 80082ba: f001 fd7d bl 8009db8 <__assert_func> 80082be: e9c0 4401 strd r4, r4, [r0, #4] 80082c2: 6004 str r4, [r0, #0] 80082c4: 60c4 str r4, [r0, #12] 80082c6: 69eb ldr r3, [r5, #28] 80082c8: 6819 ldr r1, [r3, #0] 80082ca: b151 cbz r1, 80082e2 <_dtoa_r+0x52> 80082cc: 685a ldr r2, [r3, #4] 80082ce: 2301 movs r3, #1 80082d0: 4093 lsls r3, r2 80082d2: 604a str r2, [r1, #4] 80082d4: 608b str r3, [r1, #8] 80082d6: 4628 mov r0, r5 80082d8: f000 fe46 bl 8008f68 <_Bfree> 80082dc: 2200 movs r2, #0 80082de: 69eb ldr r3, [r5, #28] 80082e0: 601a str r2, [r3, #0] 80082e2: 1e3b subs r3, r7, #0 80082e4: bfaf iteee ge 80082e6: 2300 movge r3, #0 80082e8: 2201 movlt r2, #1 80082ea: f023 4300 biclt.w r3, r3, #2147483648 ; 0x80000000 80082ee: 9305 strlt r3, [sp, #20] 80082f0: bfa8 it ge 80082f2: f8c8 3000 strge.w r3, [r8] 80082f6: f8dd 9014 ldr.w r9, [sp, #20] 80082fa: 4b9d ldr r3, [pc, #628] ; (8008570 <_dtoa_r+0x2e0>) 80082fc: bfb8 it lt 80082fe: f8c8 2000 strlt.w r2, [r8] 8008302: ea33 0309 bics.w r3, r3, r9 8008306: d119 bne.n 800833c <_dtoa_r+0xac> 8008308: f242 730f movw r3, #9999 ; 0x270f 800830c: 9a24 ldr r2, [sp, #144] ; 0x90 800830e: 6013 str r3, [r2, #0] 8008310: f3c9 0313 ubfx r3, r9, #0, #20 8008314: 4333 orrs r3, r6 8008316: f000 8589 beq.w 8008e2c <_dtoa_r+0xb9c> 800831a: 9b26 ldr r3, [sp, #152] ; 0x98 800831c: b953 cbnz r3, 8008334 <_dtoa_r+0xa4> 800831e: 4b95 ldr r3, [pc, #596] ; (8008574 <_dtoa_r+0x2e4>) 8008320: e023 b.n 800836a <_dtoa_r+0xda> 8008322: 4b95 ldr r3, [pc, #596] ; (8008578 <_dtoa_r+0x2e8>) 8008324: 9303 str r3, [sp, #12] 8008326: 3308 adds r3, #8 8008328: 9a26 ldr r2, [sp, #152] ; 0x98 800832a: 6013 str r3, [r2, #0] 800832c: 9803 ldr r0, [sp, #12] 800832e: b019 add sp, #100 ; 0x64 8008330: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8008334: 4b8f ldr r3, [pc, #572] ; (8008574 <_dtoa_r+0x2e4>) 8008336: 9303 str r3, [sp, #12] 8008338: 3303 adds r3, #3 800833a: e7f5 b.n 8008328 <_dtoa_r+0x98> 800833c: e9dd 3404 ldrd r3, r4, [sp, #16] 8008340: e9cd 340c strd r3, r4, [sp, #48] ; 0x30 8008344: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 8008348: 2200 movs r2, #0 800834a: 2300 movs r3, #0 800834c: f7f8 fb98 bl 8000a80 <__aeabi_dcmpeq> 8008350: 4680 mov r8, r0 8008352: b160 cbz r0, 800836e <_dtoa_r+0xde> 8008354: 2301 movs r3, #1 8008356: 9a24 ldr r2, [sp, #144] ; 0x90 8008358: 6013 str r3, [r2, #0] 800835a: 9b26 ldr r3, [sp, #152] ; 0x98 800835c: 2b00 cmp r3, #0 800835e: f000 8562 beq.w 8008e26 <_dtoa_r+0xb96> 8008362: 4b86 ldr r3, [pc, #536] ; (800857c <_dtoa_r+0x2ec>) 8008364: 9a26 ldr r2, [sp, #152] ; 0x98 8008366: 6013 str r3, [r2, #0] 8008368: 3b01 subs r3, #1 800836a: 9303 str r3, [sp, #12] 800836c: e7de b.n 800832c <_dtoa_r+0x9c> 800836e: ab16 add r3, sp, #88 ; 0x58 8008370: 9301 str r3, [sp, #4] 8008372: ab17 add r3, sp, #92 ; 0x5c 8008374: 9300 str r3, [sp, #0] 8008376: 4628 mov r0, r5 8008378: e9dd 230c ldrd r2, r3, [sp, #48] ; 0x30 800837c: f001 f8d6 bl 800952c <__d2b> 8008380: f3c9 540a ubfx r4, r9, #20, #11 8008384: 4682 mov sl, r0 8008386: 2c00 cmp r4, #0 8008388: d07e beq.n 8008488 <_dtoa_r+0x1f8> 800838a: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 800838e: 9b0d ldr r3, [sp, #52] ; 0x34 8008390: f2a4 34ff subw r4, r4, #1023 ; 0x3ff 8008394: f3c3 0313 ubfx r3, r3, #0, #20 8008398: f043 537f orr.w r3, r3, #1069547520 ; 0x3fc00000 800839c: f443 1340 orr.w r3, r3, #3145728 ; 0x300000 80083a0: f8cd 804c str.w r8, [sp, #76] ; 0x4c 80083a4: 4619 mov r1, r3 80083a6: 2200 movs r2, #0 80083a8: 4b75 ldr r3, [pc, #468] ; (8008580 <_dtoa_r+0x2f0>) 80083aa: f7f7 ff49 bl 8000240 <__aeabi_dsub> 80083ae: a368 add r3, pc, #416 ; (adr r3, 8008550 <_dtoa_r+0x2c0>) 80083b0: e9d3 2300 ldrd r2, r3, [r3] 80083b4: f7f8 f8fc bl 80005b0 <__aeabi_dmul> 80083b8: a367 add r3, pc, #412 ; (adr r3, 8008558 <_dtoa_r+0x2c8>) 80083ba: e9d3 2300 ldrd r2, r3, [r3] 80083be: f7f7 ff41 bl 8000244 <__adddf3> 80083c2: 4606 mov r6, r0 80083c4: 4620 mov r0, r4 80083c6: 460f mov r7, r1 80083c8: f7f8 f888 bl 80004dc <__aeabi_i2d> 80083cc: a364 add r3, pc, #400 ; (adr r3, 8008560 <_dtoa_r+0x2d0>) 80083ce: e9d3 2300 ldrd r2, r3, [r3] 80083d2: f7f8 f8ed bl 80005b0 <__aeabi_dmul> 80083d6: 4602 mov r2, r0 80083d8: 460b mov r3, r1 80083da: 4630 mov r0, r6 80083dc: 4639 mov r1, r7 80083de: f7f7 ff31 bl 8000244 <__adddf3> 80083e2: 4606 mov r6, r0 80083e4: 460f mov r7, r1 80083e6: f7f8 fb93 bl 8000b10 <__aeabi_d2iz> 80083ea: 2200 movs r2, #0 80083ec: 4683 mov fp, r0 80083ee: 2300 movs r3, #0 80083f0: 4630 mov r0, r6 80083f2: 4639 mov r1, r7 80083f4: f7f8 fb4e bl 8000a94 <__aeabi_dcmplt> 80083f8: b148 cbz r0, 800840e <_dtoa_r+0x17e> 80083fa: 4658 mov r0, fp 80083fc: f7f8 f86e bl 80004dc <__aeabi_i2d> 8008400: 4632 mov r2, r6 8008402: 463b mov r3, r7 8008404: f7f8 fb3c bl 8000a80 <__aeabi_dcmpeq> 8008408: b908 cbnz r0, 800840e <_dtoa_r+0x17e> 800840a: f10b 3bff add.w fp, fp, #4294967295 800840e: f1bb 0f16 cmp.w fp, #22 8008412: d857 bhi.n 80084c4 <_dtoa_r+0x234> 8008414: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 8008418: 4b5a ldr r3, [pc, #360] ; (8008584 <_dtoa_r+0x2f4>) 800841a: eb03 03cb add.w r3, r3, fp, lsl #3 800841e: e9d3 2300 ldrd r2, r3, [r3] 8008422: f7f8 fb37 bl 8000a94 <__aeabi_dcmplt> 8008426: 2800 cmp r0, #0 8008428: d04e beq.n 80084c8 <_dtoa_r+0x238> 800842a: 2300 movs r3, #0 800842c: f10b 3bff add.w fp, fp, #4294967295 8008430: 930f str r3, [sp, #60] ; 0x3c 8008432: 9b16 ldr r3, [sp, #88] ; 0x58 8008434: 1b1b subs r3, r3, r4 8008436: 1e5a subs r2, r3, #1 8008438: bf46 itte mi 800843a: f1c3 0901 rsbmi r9, r3, #1 800843e: 2300 movmi r3, #0 8008440: f04f 0900 movpl.w r9, #0 8008444: 9209 str r2, [sp, #36] ; 0x24 8008446: bf48 it mi 8008448: 9309 strmi r3, [sp, #36] ; 0x24 800844a: f1bb 0f00 cmp.w fp, #0 800844e: db3d blt.n 80084cc <_dtoa_r+0x23c> 8008450: 9b09 ldr r3, [sp, #36] ; 0x24 8008452: f8cd b038 str.w fp, [sp, #56] ; 0x38 8008456: 445b add r3, fp 8008458: 9309 str r3, [sp, #36] ; 0x24 800845a: 2300 movs r3, #0 800845c: 930a str r3, [sp, #40] ; 0x28 800845e: 9b22 ldr r3, [sp, #136] ; 0x88 8008460: 2b09 cmp r3, #9 8008462: d867 bhi.n 8008534 <_dtoa_r+0x2a4> 8008464: 2b05 cmp r3, #5 8008466: bfc4 itt gt 8008468: 3b04 subgt r3, #4 800846a: 9322 strgt r3, [sp, #136] ; 0x88 800846c: 9b22 ldr r3, [sp, #136] ; 0x88 800846e: bfc8 it gt 8008470: 2400 movgt r4, #0 8008472: f1a3 0302 sub.w r3, r3, #2 8008476: bfd8 it le 8008478: 2401 movle r4, #1 800847a: 2b03 cmp r3, #3 800847c: f200 8086 bhi.w 800858c <_dtoa_r+0x2fc> 8008480: e8df f003 tbb [pc, r3] 8008484: 5637392c .word 0x5637392c 8008488: e9dd 4316 ldrd r4, r3, [sp, #88] ; 0x58 800848c: 441c add r4, r3 800848e: f204 4332 addw r3, r4, #1074 ; 0x432 8008492: 2b20 cmp r3, #32 8008494: bfc1 itttt gt 8008496: f1c3 0340 rsbgt r3, r3, #64 ; 0x40 800849a: fa09 f903 lslgt.w r9, r9, r3 800849e: f204 4312 addwgt r3, r4, #1042 ; 0x412 80084a2: fa26 f303 lsrgt.w r3, r6, r3 80084a6: bfd6 itet le 80084a8: f1c3 0320 rsble r3, r3, #32 80084ac: ea49 0003 orrgt.w r0, r9, r3 80084b0: fa06 f003 lslle.w r0, r6, r3 80084b4: f7f8 f802 bl 80004bc <__aeabi_ui2d> 80084b8: 2201 movs r2, #1 80084ba: f1a1 73f8 sub.w r3, r1, #32505856 ; 0x1f00000 80084be: 3c01 subs r4, #1 80084c0: 9213 str r2, [sp, #76] ; 0x4c 80084c2: e76f b.n 80083a4 <_dtoa_r+0x114> 80084c4: 2301 movs r3, #1 80084c6: e7b3 b.n 8008430 <_dtoa_r+0x1a0> 80084c8: 900f str r0, [sp, #60] ; 0x3c 80084ca: e7b2 b.n 8008432 <_dtoa_r+0x1a2> 80084cc: f1cb 0300 rsb r3, fp, #0 80084d0: 930a str r3, [sp, #40] ; 0x28 80084d2: 2300 movs r3, #0 80084d4: eba9 090b sub.w r9, r9, fp 80084d8: 930e str r3, [sp, #56] ; 0x38 80084da: e7c0 b.n 800845e <_dtoa_r+0x1ce> 80084dc: 2300 movs r3, #0 80084de: 930b str r3, [sp, #44] ; 0x2c 80084e0: 9b23 ldr r3, [sp, #140] ; 0x8c 80084e2: 2b00 cmp r3, #0 80084e4: dc55 bgt.n 8008592 <_dtoa_r+0x302> 80084e6: 2301 movs r3, #1 80084e8: 461a mov r2, r3 80084ea: 9306 str r3, [sp, #24] 80084ec: 9308 str r3, [sp, #32] 80084ee: 9223 str r2, [sp, #140] ; 0x8c 80084f0: e00b b.n 800850a <_dtoa_r+0x27a> 80084f2: 2301 movs r3, #1 80084f4: e7f3 b.n 80084de <_dtoa_r+0x24e> 80084f6: 2300 movs r3, #0 80084f8: 930b str r3, [sp, #44] ; 0x2c 80084fa: 9b23 ldr r3, [sp, #140] ; 0x8c 80084fc: 445b add r3, fp 80084fe: 9306 str r3, [sp, #24] 8008500: 3301 adds r3, #1 8008502: 2b01 cmp r3, #1 8008504: 9308 str r3, [sp, #32] 8008506: bfb8 it lt 8008508: 2301 movlt r3, #1 800850a: 2100 movs r1, #0 800850c: 2204 movs r2, #4 800850e: 69e8 ldr r0, [r5, #28] 8008510: f102 0614 add.w r6, r2, #20 8008514: 429e cmp r6, r3 8008516: d940 bls.n 800859a <_dtoa_r+0x30a> 8008518: 6041 str r1, [r0, #4] 800851a: 4628 mov r0, r5 800851c: f000 fce4 bl 8008ee8 <_Balloc> 8008520: 9003 str r0, [sp, #12] 8008522: 2800 cmp r0, #0 8008524: d13c bne.n 80085a0 <_dtoa_r+0x310> 8008526: 4602 mov r2, r0 8008528: f240 11af movw r1, #431 ; 0x1af 800852c: 4b16 ldr r3, [pc, #88] ; (8008588 <_dtoa_r+0x2f8>) 800852e: e6c3 b.n 80082b8 <_dtoa_r+0x28> 8008530: 2301 movs r3, #1 8008532: e7e1 b.n 80084f8 <_dtoa_r+0x268> 8008534: 2401 movs r4, #1 8008536: 2300 movs r3, #0 8008538: 940b str r4, [sp, #44] ; 0x2c 800853a: 9322 str r3, [sp, #136] ; 0x88 800853c: f04f 33ff mov.w r3, #4294967295 8008540: 2200 movs r2, #0 8008542: 9306 str r3, [sp, #24] 8008544: 9308 str r3, [sp, #32] 8008546: 2312 movs r3, #18 8008548: e7d1 b.n 80084ee <_dtoa_r+0x25e> 800854a: bf00 nop 800854c: f3af 8000 nop.w 8008550: 636f4361 .word 0x636f4361 8008554: 3fd287a7 .word 0x3fd287a7 8008558: 8b60c8b3 .word 0x8b60c8b3 800855c: 3fc68a28 .word 0x3fc68a28 8008560: 509f79fb .word 0x509f79fb 8008564: 3fd34413 .word 0x3fd34413 8008568: 0800ab41 .word 0x0800ab41 800856c: 0800ab58 .word 0x0800ab58 8008570: 7ff00000 .word 0x7ff00000 8008574: 0800ab3d .word 0x0800ab3d 8008578: 0800ab34 .word 0x0800ab34 800857c: 0800ab11 .word 0x0800ab11 8008580: 3ff80000 .word 0x3ff80000 8008584: 0800ac48 .word 0x0800ac48 8008588: 0800abb0 .word 0x0800abb0 800858c: 2301 movs r3, #1 800858e: 930b str r3, [sp, #44] ; 0x2c 8008590: e7d4 b.n 800853c <_dtoa_r+0x2ac> 8008592: 9b23 ldr r3, [sp, #140] ; 0x8c 8008594: 9306 str r3, [sp, #24] 8008596: 9308 str r3, [sp, #32] 8008598: e7b7 b.n 800850a <_dtoa_r+0x27a> 800859a: 3101 adds r1, #1 800859c: 0052 lsls r2, r2, #1 800859e: e7b7 b.n 8008510 <_dtoa_r+0x280> 80085a0: 69eb ldr r3, [r5, #28] 80085a2: 9a03 ldr r2, [sp, #12] 80085a4: 601a str r2, [r3, #0] 80085a6: 9b08 ldr r3, [sp, #32] 80085a8: 2b0e cmp r3, #14 80085aa: f200 80a8 bhi.w 80086fe <_dtoa_r+0x46e> 80085ae: 2c00 cmp r4, #0 80085b0: f000 80a5 beq.w 80086fe <_dtoa_r+0x46e> 80085b4: f1bb 0f00 cmp.w fp, #0 80085b8: dd34 ble.n 8008624 <_dtoa_r+0x394> 80085ba: 4b9a ldr r3, [pc, #616] ; (8008824 <_dtoa_r+0x594>) 80085bc: f00b 020f and.w r2, fp, #15 80085c0: eb03 03c2 add.w r3, r3, r2, lsl #3 80085c4: f41b 7f80 tst.w fp, #256 ; 0x100 80085c8: e9d3 3400 ldrd r3, r4, [r3] 80085cc: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40 80085d0: ea4f 142b mov.w r4, fp, asr #4 80085d4: d016 beq.n 8008604 <_dtoa_r+0x374> 80085d6: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 80085da: 4b93 ldr r3, [pc, #588] ; (8008828 <_dtoa_r+0x598>) 80085dc: 2703 movs r7, #3 80085de: e9d3 2308 ldrd r2, r3, [r3, #32] 80085e2: f7f8 f90f bl 8000804 <__aeabi_ddiv> 80085e6: e9cd 0104 strd r0, r1, [sp, #16] 80085ea: f004 040f and.w r4, r4, #15 80085ee: 4e8e ldr r6, [pc, #568] ; (8008828 <_dtoa_r+0x598>) 80085f0: b954 cbnz r4, 8008608 <_dtoa_r+0x378> 80085f2: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 80085f6: e9dd 0104 ldrd r0, r1, [sp, #16] 80085fa: f7f8 f903 bl 8000804 <__aeabi_ddiv> 80085fe: e9cd 0104 strd r0, r1, [sp, #16] 8008602: e029 b.n 8008658 <_dtoa_r+0x3c8> 8008604: 2702 movs r7, #2 8008606: e7f2 b.n 80085ee <_dtoa_r+0x35e> 8008608: 07e1 lsls r1, r4, #31 800860a: d508 bpl.n 800861e <_dtoa_r+0x38e> 800860c: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 8008610: e9d6 2300 ldrd r2, r3, [r6] 8008614: f7f7 ffcc bl 80005b0 <__aeabi_dmul> 8008618: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 800861c: 3701 adds r7, #1 800861e: 1064 asrs r4, r4, #1 8008620: 3608 adds r6, #8 8008622: e7e5 b.n 80085f0 <_dtoa_r+0x360> 8008624: f000 80a5 beq.w 8008772 <_dtoa_r+0x4e2> 8008628: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 800862c: f1cb 0400 rsb r4, fp, #0 8008630: 4b7c ldr r3, [pc, #496] ; (8008824 <_dtoa_r+0x594>) 8008632: f004 020f and.w r2, r4, #15 8008636: eb03 03c2 add.w r3, r3, r2, lsl #3 800863a: e9d3 2300 ldrd r2, r3, [r3] 800863e: f7f7 ffb7 bl 80005b0 <__aeabi_dmul> 8008642: 2702 movs r7, #2 8008644: 2300 movs r3, #0 8008646: e9cd 0104 strd r0, r1, [sp, #16] 800864a: 4e77 ldr r6, [pc, #476] ; (8008828 <_dtoa_r+0x598>) 800864c: 1124 asrs r4, r4, #4 800864e: 2c00 cmp r4, #0 8008650: f040 8084 bne.w 800875c <_dtoa_r+0x4cc> 8008654: 2b00 cmp r3, #0 8008656: d1d2 bne.n 80085fe <_dtoa_r+0x36e> 8008658: e9dd 3404 ldrd r3, r4, [sp, #16] 800865c: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40 8008660: 9b0f ldr r3, [sp, #60] ; 0x3c 8008662: 2b00 cmp r3, #0 8008664: f000 8087 beq.w 8008776 <_dtoa_r+0x4e6> 8008668: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 800866c: 2200 movs r2, #0 800866e: 4b6f ldr r3, [pc, #444] ; (800882c <_dtoa_r+0x59c>) 8008670: f7f8 fa10 bl 8000a94 <__aeabi_dcmplt> 8008674: 2800 cmp r0, #0 8008676: d07e beq.n 8008776 <_dtoa_r+0x4e6> 8008678: 9b08 ldr r3, [sp, #32] 800867a: 2b00 cmp r3, #0 800867c: d07b beq.n 8008776 <_dtoa_r+0x4e6> 800867e: 9b06 ldr r3, [sp, #24] 8008680: 2b00 cmp r3, #0 8008682: dd38 ble.n 80086f6 <_dtoa_r+0x466> 8008684: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 8008688: 2200 movs r2, #0 800868a: 4b69 ldr r3, [pc, #420] ; (8008830 <_dtoa_r+0x5a0>) 800868c: f7f7 ff90 bl 80005b0 <__aeabi_dmul> 8008690: e9cd 0104 strd r0, r1, [sp, #16] 8008694: 9c06 ldr r4, [sp, #24] 8008696: f10b 38ff add.w r8, fp, #4294967295 800869a: 3701 adds r7, #1 800869c: 4638 mov r0, r7 800869e: f7f7 ff1d bl 80004dc <__aeabi_i2d> 80086a2: e9dd 2304 ldrd r2, r3, [sp, #16] 80086a6: f7f7 ff83 bl 80005b0 <__aeabi_dmul> 80086aa: 2200 movs r2, #0 80086ac: 4b61 ldr r3, [pc, #388] ; (8008834 <_dtoa_r+0x5a4>) 80086ae: f7f7 fdc9 bl 8000244 <__adddf3> 80086b2: f1a1 7650 sub.w r6, r1, #54525952 ; 0x3400000 80086b6: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 80086ba: 9611 str r6, [sp, #68] ; 0x44 80086bc: 2c00 cmp r4, #0 80086be: d15d bne.n 800877c <_dtoa_r+0x4ec> 80086c0: e9dd 0104 ldrd r0, r1, [sp, #16] 80086c4: 2200 movs r2, #0 80086c6: 4b5c ldr r3, [pc, #368] ; (8008838 <_dtoa_r+0x5a8>) 80086c8: f7f7 fdba bl 8000240 <__aeabi_dsub> 80086cc: 4602 mov r2, r0 80086ce: 460b mov r3, r1 80086d0: e9cd 2304 strd r2, r3, [sp, #16] 80086d4: 4633 mov r3, r6 80086d6: 9a10 ldr r2, [sp, #64] ; 0x40 80086d8: f7f8 f9fa bl 8000ad0 <__aeabi_dcmpgt> 80086dc: 2800 cmp r0, #0 80086de: f040 8295 bne.w 8008c0c <_dtoa_r+0x97c> 80086e2: e9dd 0104 ldrd r0, r1, [sp, #16] 80086e6: 9a10 ldr r2, [sp, #64] ; 0x40 80086e8: f106 4300 add.w r3, r6, #2147483648 ; 0x80000000 80086ec: f7f8 f9d2 bl 8000a94 <__aeabi_dcmplt> 80086f0: 2800 cmp r0, #0 80086f2: f040 8289 bne.w 8008c08 <_dtoa_r+0x978> 80086f6: e9dd 340c ldrd r3, r4, [sp, #48] ; 0x30 80086fa: e9cd 3404 strd r3, r4, [sp, #16] 80086fe: 9b17 ldr r3, [sp, #92] ; 0x5c 8008700: 2b00 cmp r3, #0 8008702: f2c0 8151 blt.w 80089a8 <_dtoa_r+0x718> 8008706: f1bb 0f0e cmp.w fp, #14 800870a: f300 814d bgt.w 80089a8 <_dtoa_r+0x718> 800870e: 4b45 ldr r3, [pc, #276] ; (8008824 <_dtoa_r+0x594>) 8008710: eb03 03cb add.w r3, r3, fp, lsl #3 8008714: e9d3 3400 ldrd r3, r4, [r3] 8008718: e9cd 3406 strd r3, r4, [sp, #24] 800871c: 9b23 ldr r3, [sp, #140] ; 0x8c 800871e: 2b00 cmp r3, #0 8008720: f280 80da bge.w 80088d8 <_dtoa_r+0x648> 8008724: 9b08 ldr r3, [sp, #32] 8008726: 2b00 cmp r3, #0 8008728: f300 80d6 bgt.w 80088d8 <_dtoa_r+0x648> 800872c: f040 826b bne.w 8008c06 <_dtoa_r+0x976> 8008730: e9dd 0106 ldrd r0, r1, [sp, #24] 8008734: 2200 movs r2, #0 8008736: 4b40 ldr r3, [pc, #256] ; (8008838 <_dtoa_r+0x5a8>) 8008738: f7f7 ff3a bl 80005b0 <__aeabi_dmul> 800873c: e9dd 2304 ldrd r2, r3, [sp, #16] 8008740: f7f8 f9bc bl 8000abc <__aeabi_dcmpge> 8008744: 9c08 ldr r4, [sp, #32] 8008746: 4626 mov r6, r4 8008748: 2800 cmp r0, #0 800874a: f040 8241 bne.w 8008bd0 <_dtoa_r+0x940> 800874e: 2331 movs r3, #49 ; 0x31 8008750: 9f03 ldr r7, [sp, #12] 8008752: f10b 0b01 add.w fp, fp, #1 8008756: f807 3b01 strb.w r3, [r7], #1 800875a: e23d b.n 8008bd8 <_dtoa_r+0x948> 800875c: 07e2 lsls r2, r4, #31 800875e: d505 bpl.n 800876c <_dtoa_r+0x4dc> 8008760: e9d6 2300 ldrd r2, r3, [r6] 8008764: f7f7 ff24 bl 80005b0 <__aeabi_dmul> 8008768: 2301 movs r3, #1 800876a: 3701 adds r7, #1 800876c: 1064 asrs r4, r4, #1 800876e: 3608 adds r6, #8 8008770: e76d b.n 800864e <_dtoa_r+0x3be> 8008772: 2702 movs r7, #2 8008774: e770 b.n 8008658 <_dtoa_r+0x3c8> 8008776: 46d8 mov r8, fp 8008778: 9c08 ldr r4, [sp, #32] 800877a: e78f b.n 800869c <_dtoa_r+0x40c> 800877c: 9903 ldr r1, [sp, #12] 800877e: 4b29 ldr r3, [pc, #164] ; (8008824 <_dtoa_r+0x594>) 8008780: 4421 add r1, r4 8008782: 9112 str r1, [sp, #72] ; 0x48 8008784: 990b ldr r1, [sp, #44] ; 0x2c 8008786: eb03 03c4 add.w r3, r3, r4, lsl #3 800878a: e9dd 6710 ldrd r6, r7, [sp, #64] ; 0x40 800878e: e953 2302 ldrd r2, r3, [r3, #-8] 8008792: 2900 cmp r1, #0 8008794: d054 beq.n 8008840 <_dtoa_r+0x5b0> 8008796: 2000 movs r0, #0 8008798: 4928 ldr r1, [pc, #160] ; (800883c <_dtoa_r+0x5ac>) 800879a: f7f8 f833 bl 8000804 <__aeabi_ddiv> 800879e: 463b mov r3, r7 80087a0: 4632 mov r2, r6 80087a2: f7f7 fd4d bl 8000240 <__aeabi_dsub> 80087a6: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 80087aa: 9f03 ldr r7, [sp, #12] 80087ac: e9dd 0104 ldrd r0, r1, [sp, #16] 80087b0: f7f8 f9ae bl 8000b10 <__aeabi_d2iz> 80087b4: 4604 mov r4, r0 80087b6: f7f7 fe91 bl 80004dc <__aeabi_i2d> 80087ba: 4602 mov r2, r0 80087bc: 460b mov r3, r1 80087be: e9dd 0104 ldrd r0, r1, [sp, #16] 80087c2: f7f7 fd3d bl 8000240 <__aeabi_dsub> 80087c6: 4602 mov r2, r0 80087c8: 460b mov r3, r1 80087ca: 3430 adds r4, #48 ; 0x30 80087cc: e9cd 2304 strd r2, r3, [sp, #16] 80087d0: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 80087d4: f807 4b01 strb.w r4, [r7], #1 80087d8: f7f8 f95c bl 8000a94 <__aeabi_dcmplt> 80087dc: 2800 cmp r0, #0 80087de: d173 bne.n 80088c8 <_dtoa_r+0x638> 80087e0: e9dd 2304 ldrd r2, r3, [sp, #16] 80087e4: 2000 movs r0, #0 80087e6: 4911 ldr r1, [pc, #68] ; (800882c <_dtoa_r+0x59c>) 80087e8: f7f7 fd2a bl 8000240 <__aeabi_dsub> 80087ec: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 80087f0: f7f8 f950 bl 8000a94 <__aeabi_dcmplt> 80087f4: 2800 cmp r0, #0 80087f6: f040 80b6 bne.w 8008966 <_dtoa_r+0x6d6> 80087fa: 9b12 ldr r3, [sp, #72] ; 0x48 80087fc: 429f cmp r7, r3 80087fe: f43f af7a beq.w 80086f6 <_dtoa_r+0x466> 8008802: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 8008806: 2200 movs r2, #0 8008808: 4b09 ldr r3, [pc, #36] ; (8008830 <_dtoa_r+0x5a0>) 800880a: f7f7 fed1 bl 80005b0 <__aeabi_dmul> 800880e: 2200 movs r2, #0 8008810: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 8008814: e9dd 0104 ldrd r0, r1, [sp, #16] 8008818: 4b05 ldr r3, [pc, #20] ; (8008830 <_dtoa_r+0x5a0>) 800881a: f7f7 fec9 bl 80005b0 <__aeabi_dmul> 800881e: e9cd 0104 strd r0, r1, [sp, #16] 8008822: e7c3 b.n 80087ac <_dtoa_r+0x51c> 8008824: 0800ac48 .word 0x0800ac48 8008828: 0800ac20 .word 0x0800ac20 800882c: 3ff00000 .word 0x3ff00000 8008830: 40240000 .word 0x40240000 8008834: 401c0000 .word 0x401c0000 8008838: 40140000 .word 0x40140000 800883c: 3fe00000 .word 0x3fe00000 8008840: 4630 mov r0, r6 8008842: 4639 mov r1, r7 8008844: f7f7 feb4 bl 80005b0 <__aeabi_dmul> 8008848: 9b12 ldr r3, [sp, #72] ; 0x48 800884a: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 800884e: 9c03 ldr r4, [sp, #12] 8008850: 9314 str r3, [sp, #80] ; 0x50 8008852: e9dd 0104 ldrd r0, r1, [sp, #16] 8008856: f7f8 f95b bl 8000b10 <__aeabi_d2iz> 800885a: 9015 str r0, [sp, #84] ; 0x54 800885c: f7f7 fe3e bl 80004dc <__aeabi_i2d> 8008860: 4602 mov r2, r0 8008862: 460b mov r3, r1 8008864: e9dd 0104 ldrd r0, r1, [sp, #16] 8008868: f7f7 fcea bl 8000240 <__aeabi_dsub> 800886c: 9b15 ldr r3, [sp, #84] ; 0x54 800886e: 4606 mov r6, r0 8008870: 3330 adds r3, #48 ; 0x30 8008872: f804 3b01 strb.w r3, [r4], #1 8008876: 9b12 ldr r3, [sp, #72] ; 0x48 8008878: 460f mov r7, r1 800887a: 429c cmp r4, r3 800887c: f04f 0200 mov.w r2, #0 8008880: d124 bne.n 80088cc <_dtoa_r+0x63c> 8008882: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 8008886: 4baf ldr r3, [pc, #700] ; (8008b44 <_dtoa_r+0x8b4>) 8008888: f7f7 fcdc bl 8000244 <__adddf3> 800888c: 4602 mov r2, r0 800888e: 460b mov r3, r1 8008890: 4630 mov r0, r6 8008892: 4639 mov r1, r7 8008894: f7f8 f91c bl 8000ad0 <__aeabi_dcmpgt> 8008898: 2800 cmp r0, #0 800889a: d163 bne.n 8008964 <_dtoa_r+0x6d4> 800889c: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 80088a0: 2000 movs r0, #0 80088a2: 49a8 ldr r1, [pc, #672] ; (8008b44 <_dtoa_r+0x8b4>) 80088a4: f7f7 fccc bl 8000240 <__aeabi_dsub> 80088a8: 4602 mov r2, r0 80088aa: 460b mov r3, r1 80088ac: 4630 mov r0, r6 80088ae: 4639 mov r1, r7 80088b0: f7f8 f8f0 bl 8000a94 <__aeabi_dcmplt> 80088b4: 2800 cmp r0, #0 80088b6: f43f af1e beq.w 80086f6 <_dtoa_r+0x466> 80088ba: 9f14 ldr r7, [sp, #80] ; 0x50 80088bc: 1e7b subs r3, r7, #1 80088be: 9314 str r3, [sp, #80] ; 0x50 80088c0: f817 3c01 ldrb.w r3, [r7, #-1] 80088c4: 2b30 cmp r3, #48 ; 0x30 80088c6: d0f8 beq.n 80088ba <_dtoa_r+0x62a> 80088c8: 46c3 mov fp, r8 80088ca: e03b b.n 8008944 <_dtoa_r+0x6b4> 80088cc: 4b9e ldr r3, [pc, #632] ; (8008b48 <_dtoa_r+0x8b8>) 80088ce: f7f7 fe6f bl 80005b0 <__aeabi_dmul> 80088d2: e9cd 0104 strd r0, r1, [sp, #16] 80088d6: e7bc b.n 8008852 <_dtoa_r+0x5c2> 80088d8: 9f03 ldr r7, [sp, #12] 80088da: e9dd 8904 ldrd r8, r9, [sp, #16] 80088de: e9dd 2306 ldrd r2, r3, [sp, #24] 80088e2: 4640 mov r0, r8 80088e4: 4649 mov r1, r9 80088e6: f7f7 ff8d bl 8000804 <__aeabi_ddiv> 80088ea: f7f8 f911 bl 8000b10 <__aeabi_d2iz> 80088ee: 4604 mov r4, r0 80088f0: f7f7 fdf4 bl 80004dc <__aeabi_i2d> 80088f4: e9dd 2306 ldrd r2, r3, [sp, #24] 80088f8: f7f7 fe5a bl 80005b0 <__aeabi_dmul> 80088fc: 4602 mov r2, r0 80088fe: 460b mov r3, r1 8008900: 4640 mov r0, r8 8008902: 4649 mov r1, r9 8008904: f7f7 fc9c bl 8000240 <__aeabi_dsub> 8008908: f104 0630 add.w r6, r4, #48 ; 0x30 800890c: f807 6b01 strb.w r6, [r7], #1 8008910: 9e03 ldr r6, [sp, #12] 8008912: f8dd c020 ldr.w ip, [sp, #32] 8008916: 1bbe subs r6, r7, r6 8008918: 45b4 cmp ip, r6 800891a: 4602 mov r2, r0 800891c: 460b mov r3, r1 800891e: d136 bne.n 800898e <_dtoa_r+0x6fe> 8008920: f7f7 fc90 bl 8000244 <__adddf3> 8008924: e9dd 2306 ldrd r2, r3, [sp, #24] 8008928: 4680 mov r8, r0 800892a: 4689 mov r9, r1 800892c: f7f8 f8d0 bl 8000ad0 <__aeabi_dcmpgt> 8008930: bb58 cbnz r0, 800898a <_dtoa_r+0x6fa> 8008932: e9dd 2306 ldrd r2, r3, [sp, #24] 8008936: 4640 mov r0, r8 8008938: 4649 mov r1, r9 800893a: f7f8 f8a1 bl 8000a80 <__aeabi_dcmpeq> 800893e: b108 cbz r0, 8008944 <_dtoa_r+0x6b4> 8008940: 07e3 lsls r3, r4, #31 8008942: d422 bmi.n 800898a <_dtoa_r+0x6fa> 8008944: 4651 mov r1, sl 8008946: 4628 mov r0, r5 8008948: f000 fb0e bl 8008f68 <_Bfree> 800894c: 2300 movs r3, #0 800894e: 9a24 ldr r2, [sp, #144] ; 0x90 8008950: 703b strb r3, [r7, #0] 8008952: f10b 0301 add.w r3, fp, #1 8008956: 6013 str r3, [r2, #0] 8008958: 9b26 ldr r3, [sp, #152] ; 0x98 800895a: 2b00 cmp r3, #0 800895c: f43f ace6 beq.w 800832c <_dtoa_r+0x9c> 8008960: 601f str r7, [r3, #0] 8008962: e4e3 b.n 800832c <_dtoa_r+0x9c> 8008964: 4627 mov r7, r4 8008966: 463b mov r3, r7 8008968: 461f mov r7, r3 800896a: f813 2d01 ldrb.w r2, [r3, #-1]! 800896e: 2a39 cmp r2, #57 ; 0x39 8008970: d107 bne.n 8008982 <_dtoa_r+0x6f2> 8008972: 9a03 ldr r2, [sp, #12] 8008974: 429a cmp r2, r3 8008976: d1f7 bne.n 8008968 <_dtoa_r+0x6d8> 8008978: 2230 movs r2, #48 ; 0x30 800897a: 9903 ldr r1, [sp, #12] 800897c: f108 0801 add.w r8, r8, #1 8008980: 700a strb r2, [r1, #0] 8008982: 781a ldrb r2, [r3, #0] 8008984: 3201 adds r2, #1 8008986: 701a strb r2, [r3, #0] 8008988: e79e b.n 80088c8 <_dtoa_r+0x638> 800898a: 46d8 mov r8, fp 800898c: e7eb b.n 8008966 <_dtoa_r+0x6d6> 800898e: 2200 movs r2, #0 8008990: 4b6d ldr r3, [pc, #436] ; (8008b48 <_dtoa_r+0x8b8>) 8008992: f7f7 fe0d bl 80005b0 <__aeabi_dmul> 8008996: 2200 movs r2, #0 8008998: 2300 movs r3, #0 800899a: 4680 mov r8, r0 800899c: 4689 mov r9, r1 800899e: f7f8 f86f bl 8000a80 <__aeabi_dcmpeq> 80089a2: 2800 cmp r0, #0 80089a4: d09b beq.n 80088de <_dtoa_r+0x64e> 80089a6: e7cd b.n 8008944 <_dtoa_r+0x6b4> 80089a8: 9a0b ldr r2, [sp, #44] ; 0x2c 80089aa: 2a00 cmp r2, #0 80089ac: f000 80c4 beq.w 8008b38 <_dtoa_r+0x8a8> 80089b0: 9a22 ldr r2, [sp, #136] ; 0x88 80089b2: 2a01 cmp r2, #1 80089b4: f300 80a8 bgt.w 8008b08 <_dtoa_r+0x878> 80089b8: 9a13 ldr r2, [sp, #76] ; 0x4c 80089ba: 2a00 cmp r2, #0 80089bc: f000 80a0 beq.w 8008b00 <_dtoa_r+0x870> 80089c0: f203 4333 addw r3, r3, #1075 ; 0x433 80089c4: 464f mov r7, r9 80089c6: 9c0a ldr r4, [sp, #40] ; 0x28 80089c8: 9a09 ldr r2, [sp, #36] ; 0x24 80089ca: 2101 movs r1, #1 80089cc: 441a add r2, r3 80089ce: 4628 mov r0, r5 80089d0: 4499 add r9, r3 80089d2: 9209 str r2, [sp, #36] ; 0x24 80089d4: f000 fb7e bl 80090d4 <__i2b> 80089d8: 4606 mov r6, r0 80089da: b15f cbz r7, 80089f4 <_dtoa_r+0x764> 80089dc: 9b09 ldr r3, [sp, #36] ; 0x24 80089de: 2b00 cmp r3, #0 80089e0: dd08 ble.n 80089f4 <_dtoa_r+0x764> 80089e2: 42bb cmp r3, r7 80089e4: bfa8 it ge 80089e6: 463b movge r3, r7 80089e8: 9a09 ldr r2, [sp, #36] ; 0x24 80089ea: eba9 0903 sub.w r9, r9, r3 80089ee: 1aff subs r7, r7, r3 80089f0: 1ad3 subs r3, r2, r3 80089f2: 9309 str r3, [sp, #36] ; 0x24 80089f4: 9b0a ldr r3, [sp, #40] ; 0x28 80089f6: b1f3 cbz r3, 8008a36 <_dtoa_r+0x7a6> 80089f8: 9b0b ldr r3, [sp, #44] ; 0x2c 80089fa: 2b00 cmp r3, #0 80089fc: f000 80a0 beq.w 8008b40 <_dtoa_r+0x8b0> 8008a00: 2c00 cmp r4, #0 8008a02: dd10 ble.n 8008a26 <_dtoa_r+0x796> 8008a04: 4631 mov r1, r6 8008a06: 4622 mov r2, r4 8008a08: 4628 mov r0, r5 8008a0a: f000 fc21 bl 8009250 <__pow5mult> 8008a0e: 4652 mov r2, sl 8008a10: 4601 mov r1, r0 8008a12: 4606 mov r6, r0 8008a14: 4628 mov r0, r5 8008a16: f000 fb73 bl 8009100 <__multiply> 8008a1a: 4680 mov r8, r0 8008a1c: 4651 mov r1, sl 8008a1e: 4628 mov r0, r5 8008a20: f000 faa2 bl 8008f68 <_Bfree> 8008a24: 46c2 mov sl, r8 8008a26: 9b0a ldr r3, [sp, #40] ; 0x28 8008a28: 1b1a subs r2, r3, r4 8008a2a: d004 beq.n 8008a36 <_dtoa_r+0x7a6> 8008a2c: 4651 mov r1, sl 8008a2e: 4628 mov r0, r5 8008a30: f000 fc0e bl 8009250 <__pow5mult> 8008a34: 4682 mov sl, r0 8008a36: 2101 movs r1, #1 8008a38: 4628 mov r0, r5 8008a3a: f000 fb4b bl 80090d4 <__i2b> 8008a3e: 9b0e ldr r3, [sp, #56] ; 0x38 8008a40: 4604 mov r4, r0 8008a42: 2b00 cmp r3, #0 8008a44: f340 8082 ble.w 8008b4c <_dtoa_r+0x8bc> 8008a48: 461a mov r2, r3 8008a4a: 4601 mov r1, r0 8008a4c: 4628 mov r0, r5 8008a4e: f000 fbff bl 8009250 <__pow5mult> 8008a52: 9b22 ldr r3, [sp, #136] ; 0x88 8008a54: 4604 mov r4, r0 8008a56: 2b01 cmp r3, #1 8008a58: dd7b ble.n 8008b52 <_dtoa_r+0x8c2> 8008a5a: f04f 0800 mov.w r8, #0 8008a5e: 6923 ldr r3, [r4, #16] 8008a60: eb04 0383 add.w r3, r4, r3, lsl #2 8008a64: 6918 ldr r0, [r3, #16] 8008a66: f000 fae7 bl 8009038 <__hi0bits> 8008a6a: f1c0 0020 rsb r0, r0, #32 8008a6e: 9b09 ldr r3, [sp, #36] ; 0x24 8008a70: 4418 add r0, r3 8008a72: f010 001f ands.w r0, r0, #31 8008a76: f000 8092 beq.w 8008b9e <_dtoa_r+0x90e> 8008a7a: f1c0 0320 rsb r3, r0, #32 8008a7e: 2b04 cmp r3, #4 8008a80: f340 8085 ble.w 8008b8e <_dtoa_r+0x8fe> 8008a84: 9b09 ldr r3, [sp, #36] ; 0x24 8008a86: f1c0 001c rsb r0, r0, #28 8008a8a: 4403 add r3, r0 8008a8c: 4481 add r9, r0 8008a8e: 4407 add r7, r0 8008a90: 9309 str r3, [sp, #36] ; 0x24 8008a92: f1b9 0f00 cmp.w r9, #0 8008a96: dd05 ble.n 8008aa4 <_dtoa_r+0x814> 8008a98: 4651 mov r1, sl 8008a9a: 464a mov r2, r9 8008a9c: 4628 mov r0, r5 8008a9e: f000 fc31 bl 8009304 <__lshift> 8008aa2: 4682 mov sl, r0 8008aa4: 9b09 ldr r3, [sp, #36] ; 0x24 8008aa6: 2b00 cmp r3, #0 8008aa8: dd05 ble.n 8008ab6 <_dtoa_r+0x826> 8008aaa: 4621 mov r1, r4 8008aac: 461a mov r2, r3 8008aae: 4628 mov r0, r5 8008ab0: f000 fc28 bl 8009304 <__lshift> 8008ab4: 4604 mov r4, r0 8008ab6: 9b0f ldr r3, [sp, #60] ; 0x3c 8008ab8: 2b00 cmp r3, #0 8008aba: d072 beq.n 8008ba2 <_dtoa_r+0x912> 8008abc: 4621 mov r1, r4 8008abe: 4650 mov r0, sl 8008ac0: f000 fc8c bl 80093dc <__mcmp> 8008ac4: 2800 cmp r0, #0 8008ac6: da6c bge.n 8008ba2 <_dtoa_r+0x912> 8008ac8: 2300 movs r3, #0 8008aca: 4651 mov r1, sl 8008acc: 220a movs r2, #10 8008ace: 4628 mov r0, r5 8008ad0: f000 fa6c bl 8008fac <__multadd> 8008ad4: 9b0b ldr r3, [sp, #44] ; 0x2c 8008ad6: 4682 mov sl, r0 8008ad8: f10b 3bff add.w fp, fp, #4294967295 8008adc: 2b00 cmp r3, #0 8008ade: f000 81ac beq.w 8008e3a <_dtoa_r+0xbaa> 8008ae2: 2300 movs r3, #0 8008ae4: 4631 mov r1, r6 8008ae6: 220a movs r2, #10 8008ae8: 4628 mov r0, r5 8008aea: f000 fa5f bl 8008fac <__multadd> 8008aee: 9b06 ldr r3, [sp, #24] 8008af0: 4606 mov r6, r0 8008af2: 2b00 cmp r3, #0 8008af4: f300 8093 bgt.w 8008c1e <_dtoa_r+0x98e> 8008af8: 9b22 ldr r3, [sp, #136] ; 0x88 8008afa: 2b02 cmp r3, #2 8008afc: dc59 bgt.n 8008bb2 <_dtoa_r+0x922> 8008afe: e08e b.n 8008c1e <_dtoa_r+0x98e> 8008b00: 9b16 ldr r3, [sp, #88] ; 0x58 8008b02: f1c3 0336 rsb r3, r3, #54 ; 0x36 8008b06: e75d b.n 80089c4 <_dtoa_r+0x734> 8008b08: 9b08 ldr r3, [sp, #32] 8008b0a: 1e5c subs r4, r3, #1 8008b0c: 9b0a ldr r3, [sp, #40] ; 0x28 8008b0e: 42a3 cmp r3, r4 8008b10: bfbf itttt lt 8008b12: 9b0a ldrlt r3, [sp, #40] ; 0x28 8008b14: 9a0e ldrlt r2, [sp, #56] ; 0x38 8008b16: 1ae3 sublt r3, r4, r3 8008b18: 18d2 addlt r2, r2, r3 8008b1a: bfa8 it ge 8008b1c: 1b1c subge r4, r3, r4 8008b1e: 9b08 ldr r3, [sp, #32] 8008b20: bfbe ittt lt 8008b22: 940a strlt r4, [sp, #40] ; 0x28 8008b24: 920e strlt r2, [sp, #56] ; 0x38 8008b26: 2400 movlt r4, #0 8008b28: 2b00 cmp r3, #0 8008b2a: bfb5 itete lt 8008b2c: eba9 0703 sublt.w r7, r9, r3 8008b30: 464f movge r7, r9 8008b32: 2300 movlt r3, #0 8008b34: 9b08 ldrge r3, [sp, #32] 8008b36: e747 b.n 80089c8 <_dtoa_r+0x738> 8008b38: 464f mov r7, r9 8008b3a: 9c0a ldr r4, [sp, #40] ; 0x28 8008b3c: 9e0b ldr r6, [sp, #44] ; 0x2c 8008b3e: e74c b.n 80089da <_dtoa_r+0x74a> 8008b40: 9a0a ldr r2, [sp, #40] ; 0x28 8008b42: e773 b.n 8008a2c <_dtoa_r+0x79c> 8008b44: 3fe00000 .word 0x3fe00000 8008b48: 40240000 .word 0x40240000 8008b4c: 9b22 ldr r3, [sp, #136] ; 0x88 8008b4e: 2b01 cmp r3, #1 8008b50: dc18 bgt.n 8008b84 <_dtoa_r+0x8f4> 8008b52: 9b04 ldr r3, [sp, #16] 8008b54: b9b3 cbnz r3, 8008b84 <_dtoa_r+0x8f4> 8008b56: 9b05 ldr r3, [sp, #20] 8008b58: f3c3 0313 ubfx r3, r3, #0, #20 8008b5c: b993 cbnz r3, 8008b84 <_dtoa_r+0x8f4> 8008b5e: 9b05 ldr r3, [sp, #20] 8008b60: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 8008b64: 0d1b lsrs r3, r3, #20 8008b66: 051b lsls r3, r3, #20 8008b68: b17b cbz r3, 8008b8a <_dtoa_r+0x8fa> 8008b6a: f04f 0801 mov.w r8, #1 8008b6e: 9b09 ldr r3, [sp, #36] ; 0x24 8008b70: f109 0901 add.w r9, r9, #1 8008b74: 3301 adds r3, #1 8008b76: 9309 str r3, [sp, #36] ; 0x24 8008b78: 9b0e ldr r3, [sp, #56] ; 0x38 8008b7a: 2b00 cmp r3, #0 8008b7c: f47f af6f bne.w 8008a5e <_dtoa_r+0x7ce> 8008b80: 2001 movs r0, #1 8008b82: e774 b.n 8008a6e <_dtoa_r+0x7de> 8008b84: f04f 0800 mov.w r8, #0 8008b88: e7f6 b.n 8008b78 <_dtoa_r+0x8e8> 8008b8a: 4698 mov r8, r3 8008b8c: e7f4 b.n 8008b78 <_dtoa_r+0x8e8> 8008b8e: d080 beq.n 8008a92 <_dtoa_r+0x802> 8008b90: 9a09 ldr r2, [sp, #36] ; 0x24 8008b92: 331c adds r3, #28 8008b94: 441a add r2, r3 8008b96: 4499 add r9, r3 8008b98: 441f add r7, r3 8008b9a: 9209 str r2, [sp, #36] ; 0x24 8008b9c: e779 b.n 8008a92 <_dtoa_r+0x802> 8008b9e: 4603 mov r3, r0 8008ba0: e7f6 b.n 8008b90 <_dtoa_r+0x900> 8008ba2: 9b08 ldr r3, [sp, #32] 8008ba4: 2b00 cmp r3, #0 8008ba6: dc34 bgt.n 8008c12 <_dtoa_r+0x982> 8008ba8: 9b22 ldr r3, [sp, #136] ; 0x88 8008baa: 2b02 cmp r3, #2 8008bac: dd31 ble.n 8008c12 <_dtoa_r+0x982> 8008bae: 9b08 ldr r3, [sp, #32] 8008bb0: 9306 str r3, [sp, #24] 8008bb2: 9b06 ldr r3, [sp, #24] 8008bb4: b963 cbnz r3, 8008bd0 <_dtoa_r+0x940> 8008bb6: 4621 mov r1, r4 8008bb8: 2205 movs r2, #5 8008bba: 4628 mov r0, r5 8008bbc: f000 f9f6 bl 8008fac <__multadd> 8008bc0: 4601 mov r1, r0 8008bc2: 4604 mov r4, r0 8008bc4: 4650 mov r0, sl 8008bc6: f000 fc09 bl 80093dc <__mcmp> 8008bca: 2800 cmp r0, #0 8008bcc: f73f adbf bgt.w 800874e <_dtoa_r+0x4be> 8008bd0: 9b23 ldr r3, [sp, #140] ; 0x8c 8008bd2: 9f03 ldr r7, [sp, #12] 8008bd4: ea6f 0b03 mvn.w fp, r3 8008bd8: f04f 0800 mov.w r8, #0 8008bdc: 4621 mov r1, r4 8008bde: 4628 mov r0, r5 8008be0: f000 f9c2 bl 8008f68 <_Bfree> 8008be4: 2e00 cmp r6, #0 8008be6: f43f aead beq.w 8008944 <_dtoa_r+0x6b4> 8008bea: f1b8 0f00 cmp.w r8, #0 8008bee: d005 beq.n 8008bfc <_dtoa_r+0x96c> 8008bf0: 45b0 cmp r8, r6 8008bf2: d003 beq.n 8008bfc <_dtoa_r+0x96c> 8008bf4: 4641 mov r1, r8 8008bf6: 4628 mov r0, r5 8008bf8: f000 f9b6 bl 8008f68 <_Bfree> 8008bfc: 4631 mov r1, r6 8008bfe: 4628 mov r0, r5 8008c00: f000 f9b2 bl 8008f68 <_Bfree> 8008c04: e69e b.n 8008944 <_dtoa_r+0x6b4> 8008c06: 2400 movs r4, #0 8008c08: 4626 mov r6, r4 8008c0a: e7e1 b.n 8008bd0 <_dtoa_r+0x940> 8008c0c: 46c3 mov fp, r8 8008c0e: 4626 mov r6, r4 8008c10: e59d b.n 800874e <_dtoa_r+0x4be> 8008c12: 9b0b ldr r3, [sp, #44] ; 0x2c 8008c14: 2b00 cmp r3, #0 8008c16: f000 80c8 beq.w 8008daa <_dtoa_r+0xb1a> 8008c1a: 9b08 ldr r3, [sp, #32] 8008c1c: 9306 str r3, [sp, #24] 8008c1e: 2f00 cmp r7, #0 8008c20: dd05 ble.n 8008c2e <_dtoa_r+0x99e> 8008c22: 4631 mov r1, r6 8008c24: 463a mov r2, r7 8008c26: 4628 mov r0, r5 8008c28: f000 fb6c bl 8009304 <__lshift> 8008c2c: 4606 mov r6, r0 8008c2e: f1b8 0f00 cmp.w r8, #0 8008c32: d05b beq.n 8008cec <_dtoa_r+0xa5c> 8008c34: 4628 mov r0, r5 8008c36: 6871 ldr r1, [r6, #4] 8008c38: f000 f956 bl 8008ee8 <_Balloc> 8008c3c: 4607 mov r7, r0 8008c3e: b928 cbnz r0, 8008c4c <_dtoa_r+0x9bc> 8008c40: 4602 mov r2, r0 8008c42: f240 21ef movw r1, #751 ; 0x2ef 8008c46: 4b81 ldr r3, [pc, #516] ; (8008e4c <_dtoa_r+0xbbc>) 8008c48: f7ff bb36 b.w 80082b8 <_dtoa_r+0x28> 8008c4c: 6932 ldr r2, [r6, #16] 8008c4e: f106 010c add.w r1, r6, #12 8008c52: 3202 adds r2, #2 8008c54: 0092 lsls r2, r2, #2 8008c56: 300c adds r0, #12 8008c58: f001 f8a0 bl 8009d9c 8008c5c: 2201 movs r2, #1 8008c5e: 4639 mov r1, r7 8008c60: 4628 mov r0, r5 8008c62: f000 fb4f bl 8009304 <__lshift> 8008c66: 46b0 mov r8, r6 8008c68: 4606 mov r6, r0 8008c6a: 9b03 ldr r3, [sp, #12] 8008c6c: 9a03 ldr r2, [sp, #12] 8008c6e: 3301 adds r3, #1 8008c70: 9308 str r3, [sp, #32] 8008c72: 9b06 ldr r3, [sp, #24] 8008c74: 4413 add r3, r2 8008c76: 930b str r3, [sp, #44] ; 0x2c 8008c78: 9b04 ldr r3, [sp, #16] 8008c7a: f003 0301 and.w r3, r3, #1 8008c7e: 930a str r3, [sp, #40] ; 0x28 8008c80: 9b08 ldr r3, [sp, #32] 8008c82: 4621 mov r1, r4 8008c84: 3b01 subs r3, #1 8008c86: 4650 mov r0, sl 8008c88: 9304 str r3, [sp, #16] 8008c8a: f7ff fa78 bl 800817e 8008c8e: 4641 mov r1, r8 8008c90: 9006 str r0, [sp, #24] 8008c92: f100 0930 add.w r9, r0, #48 ; 0x30 8008c96: 4650 mov r0, sl 8008c98: f000 fba0 bl 80093dc <__mcmp> 8008c9c: 4632 mov r2, r6 8008c9e: 9009 str r0, [sp, #36] ; 0x24 8008ca0: 4621 mov r1, r4 8008ca2: 4628 mov r0, r5 8008ca4: f000 fbb6 bl 8009414 <__mdiff> 8008ca8: 68c2 ldr r2, [r0, #12] 8008caa: 4607 mov r7, r0 8008cac: bb02 cbnz r2, 8008cf0 <_dtoa_r+0xa60> 8008cae: 4601 mov r1, r0 8008cb0: 4650 mov r0, sl 8008cb2: f000 fb93 bl 80093dc <__mcmp> 8008cb6: 4602 mov r2, r0 8008cb8: 4639 mov r1, r7 8008cba: 4628 mov r0, r5 8008cbc: 920c str r2, [sp, #48] ; 0x30 8008cbe: f000 f953 bl 8008f68 <_Bfree> 8008cc2: 9b22 ldr r3, [sp, #136] ; 0x88 8008cc4: 9a0c ldr r2, [sp, #48] ; 0x30 8008cc6: 9f08 ldr r7, [sp, #32] 8008cc8: ea43 0102 orr.w r1, r3, r2 8008ccc: 9b0a ldr r3, [sp, #40] ; 0x28 8008cce: 4319 orrs r1, r3 8008cd0: d110 bne.n 8008cf4 <_dtoa_r+0xa64> 8008cd2: f1b9 0f39 cmp.w r9, #57 ; 0x39 8008cd6: d029 beq.n 8008d2c <_dtoa_r+0xa9c> 8008cd8: 9b09 ldr r3, [sp, #36] ; 0x24 8008cda: 2b00 cmp r3, #0 8008cdc: dd02 ble.n 8008ce4 <_dtoa_r+0xa54> 8008cde: 9b06 ldr r3, [sp, #24] 8008ce0: f103 0931 add.w r9, r3, #49 ; 0x31 8008ce4: 9b04 ldr r3, [sp, #16] 8008ce6: f883 9000 strb.w r9, [r3] 8008cea: e777 b.n 8008bdc <_dtoa_r+0x94c> 8008cec: 4630 mov r0, r6 8008cee: e7ba b.n 8008c66 <_dtoa_r+0x9d6> 8008cf0: 2201 movs r2, #1 8008cf2: e7e1 b.n 8008cb8 <_dtoa_r+0xa28> 8008cf4: 9b09 ldr r3, [sp, #36] ; 0x24 8008cf6: 2b00 cmp r3, #0 8008cf8: db04 blt.n 8008d04 <_dtoa_r+0xa74> 8008cfa: 9922 ldr r1, [sp, #136] ; 0x88 8008cfc: 430b orrs r3, r1 8008cfe: 990a ldr r1, [sp, #40] ; 0x28 8008d00: 430b orrs r3, r1 8008d02: d120 bne.n 8008d46 <_dtoa_r+0xab6> 8008d04: 2a00 cmp r2, #0 8008d06: dded ble.n 8008ce4 <_dtoa_r+0xa54> 8008d08: 4651 mov r1, sl 8008d0a: 2201 movs r2, #1 8008d0c: 4628 mov r0, r5 8008d0e: f000 faf9 bl 8009304 <__lshift> 8008d12: 4621 mov r1, r4 8008d14: 4682 mov sl, r0 8008d16: f000 fb61 bl 80093dc <__mcmp> 8008d1a: 2800 cmp r0, #0 8008d1c: dc03 bgt.n 8008d26 <_dtoa_r+0xa96> 8008d1e: d1e1 bne.n 8008ce4 <_dtoa_r+0xa54> 8008d20: f019 0f01 tst.w r9, #1 8008d24: d0de beq.n 8008ce4 <_dtoa_r+0xa54> 8008d26: f1b9 0f39 cmp.w r9, #57 ; 0x39 8008d2a: d1d8 bne.n 8008cde <_dtoa_r+0xa4e> 8008d2c: 2339 movs r3, #57 ; 0x39 8008d2e: 9a04 ldr r2, [sp, #16] 8008d30: 7013 strb r3, [r2, #0] 8008d32: 463b mov r3, r7 8008d34: 461f mov r7, r3 8008d36: f817 2c01 ldrb.w r2, [r7, #-1] 8008d3a: 3b01 subs r3, #1 8008d3c: 2a39 cmp r2, #57 ; 0x39 8008d3e: d06b beq.n 8008e18 <_dtoa_r+0xb88> 8008d40: 3201 adds r2, #1 8008d42: 701a strb r2, [r3, #0] 8008d44: e74a b.n 8008bdc <_dtoa_r+0x94c> 8008d46: 2a00 cmp r2, #0 8008d48: dd07 ble.n 8008d5a <_dtoa_r+0xaca> 8008d4a: f1b9 0f39 cmp.w r9, #57 ; 0x39 8008d4e: d0ed beq.n 8008d2c <_dtoa_r+0xa9c> 8008d50: 9a04 ldr r2, [sp, #16] 8008d52: f109 0301 add.w r3, r9, #1 8008d56: 7013 strb r3, [r2, #0] 8008d58: e740 b.n 8008bdc <_dtoa_r+0x94c> 8008d5a: 9b08 ldr r3, [sp, #32] 8008d5c: 9a0b ldr r2, [sp, #44] ; 0x2c 8008d5e: f803 9c01 strb.w r9, [r3, #-1] 8008d62: 4293 cmp r3, r2 8008d64: d042 beq.n 8008dec <_dtoa_r+0xb5c> 8008d66: 4651 mov r1, sl 8008d68: 2300 movs r3, #0 8008d6a: 220a movs r2, #10 8008d6c: 4628 mov r0, r5 8008d6e: f000 f91d bl 8008fac <__multadd> 8008d72: 45b0 cmp r8, r6 8008d74: 4682 mov sl, r0 8008d76: f04f 0300 mov.w r3, #0 8008d7a: f04f 020a mov.w r2, #10 8008d7e: 4641 mov r1, r8 8008d80: 4628 mov r0, r5 8008d82: d107 bne.n 8008d94 <_dtoa_r+0xb04> 8008d84: f000 f912 bl 8008fac <__multadd> 8008d88: 4680 mov r8, r0 8008d8a: 4606 mov r6, r0 8008d8c: 9b08 ldr r3, [sp, #32] 8008d8e: 3301 adds r3, #1 8008d90: 9308 str r3, [sp, #32] 8008d92: e775 b.n 8008c80 <_dtoa_r+0x9f0> 8008d94: f000 f90a bl 8008fac <__multadd> 8008d98: 4631 mov r1, r6 8008d9a: 4680 mov r8, r0 8008d9c: 2300 movs r3, #0 8008d9e: 220a movs r2, #10 8008da0: 4628 mov r0, r5 8008da2: f000 f903 bl 8008fac <__multadd> 8008da6: 4606 mov r6, r0 8008da8: e7f0 b.n 8008d8c <_dtoa_r+0xafc> 8008daa: 9b08 ldr r3, [sp, #32] 8008dac: 9306 str r3, [sp, #24] 8008dae: 9f03 ldr r7, [sp, #12] 8008db0: 4621 mov r1, r4 8008db2: 4650 mov r0, sl 8008db4: f7ff f9e3 bl 800817e 8008db8: 9b03 ldr r3, [sp, #12] 8008dba: f100 0930 add.w r9, r0, #48 ; 0x30 8008dbe: f807 9b01 strb.w r9, [r7], #1 8008dc2: 1afa subs r2, r7, r3 8008dc4: 9b06 ldr r3, [sp, #24] 8008dc6: 4293 cmp r3, r2 8008dc8: dd07 ble.n 8008dda <_dtoa_r+0xb4a> 8008dca: 4651 mov r1, sl 8008dcc: 2300 movs r3, #0 8008dce: 220a movs r2, #10 8008dd0: 4628 mov r0, r5 8008dd2: f000 f8eb bl 8008fac <__multadd> 8008dd6: 4682 mov sl, r0 8008dd8: e7ea b.n 8008db0 <_dtoa_r+0xb20> 8008dda: 9b06 ldr r3, [sp, #24] 8008ddc: f04f 0800 mov.w r8, #0 8008de0: 2b00 cmp r3, #0 8008de2: bfcc ite gt 8008de4: 461f movgt r7, r3 8008de6: 2701 movle r7, #1 8008de8: 9b03 ldr r3, [sp, #12] 8008dea: 441f add r7, r3 8008dec: 4651 mov r1, sl 8008dee: 2201 movs r2, #1 8008df0: 4628 mov r0, r5 8008df2: f000 fa87 bl 8009304 <__lshift> 8008df6: 4621 mov r1, r4 8008df8: 4682 mov sl, r0 8008dfa: f000 faef bl 80093dc <__mcmp> 8008dfe: 2800 cmp r0, #0 8008e00: dc97 bgt.n 8008d32 <_dtoa_r+0xaa2> 8008e02: d102 bne.n 8008e0a <_dtoa_r+0xb7a> 8008e04: f019 0f01 tst.w r9, #1 8008e08: d193 bne.n 8008d32 <_dtoa_r+0xaa2> 8008e0a: 463b mov r3, r7 8008e0c: 461f mov r7, r3 8008e0e: f813 2d01 ldrb.w r2, [r3, #-1]! 8008e12: 2a30 cmp r2, #48 ; 0x30 8008e14: d0fa beq.n 8008e0c <_dtoa_r+0xb7c> 8008e16: e6e1 b.n 8008bdc <_dtoa_r+0x94c> 8008e18: 9a03 ldr r2, [sp, #12] 8008e1a: 429a cmp r2, r3 8008e1c: d18a bne.n 8008d34 <_dtoa_r+0xaa4> 8008e1e: 2331 movs r3, #49 ; 0x31 8008e20: f10b 0b01 add.w fp, fp, #1 8008e24: e797 b.n 8008d56 <_dtoa_r+0xac6> 8008e26: 4b0a ldr r3, [pc, #40] ; (8008e50 <_dtoa_r+0xbc0>) 8008e28: f7ff ba9f b.w 800836a <_dtoa_r+0xda> 8008e2c: 9b26 ldr r3, [sp, #152] ; 0x98 8008e2e: 2b00 cmp r3, #0 8008e30: f47f aa77 bne.w 8008322 <_dtoa_r+0x92> 8008e34: 4b07 ldr r3, [pc, #28] ; (8008e54 <_dtoa_r+0xbc4>) 8008e36: f7ff ba98 b.w 800836a <_dtoa_r+0xda> 8008e3a: 9b06 ldr r3, [sp, #24] 8008e3c: 2b00 cmp r3, #0 8008e3e: dcb6 bgt.n 8008dae <_dtoa_r+0xb1e> 8008e40: 9b22 ldr r3, [sp, #136] ; 0x88 8008e42: 2b02 cmp r3, #2 8008e44: f73f aeb5 bgt.w 8008bb2 <_dtoa_r+0x922> 8008e48: e7b1 b.n 8008dae <_dtoa_r+0xb1e> 8008e4a: bf00 nop 8008e4c: 0800abb0 .word 0x0800abb0 8008e50: 0800ab10 .word 0x0800ab10 8008e54: 0800ab34 .word 0x0800ab34 08008e58 <_free_r>: 8008e58: b538 push {r3, r4, r5, lr} 8008e5a: 4605 mov r5, r0 8008e5c: 2900 cmp r1, #0 8008e5e: d040 beq.n 8008ee2 <_free_r+0x8a> 8008e60: f851 3c04 ldr.w r3, [r1, #-4] 8008e64: 1f0c subs r4, r1, #4 8008e66: 2b00 cmp r3, #0 8008e68: bfb8 it lt 8008e6a: 18e4 addlt r4, r4, r3 8008e6c: f7fe fac6 bl 80073fc <__malloc_lock> 8008e70: 4a1c ldr r2, [pc, #112] ; (8008ee4 <_free_r+0x8c>) 8008e72: 6813 ldr r3, [r2, #0] 8008e74: b933 cbnz r3, 8008e84 <_free_r+0x2c> 8008e76: 6063 str r3, [r4, #4] 8008e78: 6014 str r4, [r2, #0] 8008e7a: 4628 mov r0, r5 8008e7c: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8008e80: f7fe bac2 b.w 8007408 <__malloc_unlock> 8008e84: 42a3 cmp r3, r4 8008e86: d908 bls.n 8008e9a <_free_r+0x42> 8008e88: 6820 ldr r0, [r4, #0] 8008e8a: 1821 adds r1, r4, r0 8008e8c: 428b cmp r3, r1 8008e8e: bf01 itttt eq 8008e90: 6819 ldreq r1, [r3, #0] 8008e92: 685b ldreq r3, [r3, #4] 8008e94: 1809 addeq r1, r1, r0 8008e96: 6021 streq r1, [r4, #0] 8008e98: e7ed b.n 8008e76 <_free_r+0x1e> 8008e9a: 461a mov r2, r3 8008e9c: 685b ldr r3, [r3, #4] 8008e9e: b10b cbz r3, 8008ea4 <_free_r+0x4c> 8008ea0: 42a3 cmp r3, r4 8008ea2: d9fa bls.n 8008e9a <_free_r+0x42> 8008ea4: 6811 ldr r1, [r2, #0] 8008ea6: 1850 adds r0, r2, r1 8008ea8: 42a0 cmp r0, r4 8008eaa: d10b bne.n 8008ec4 <_free_r+0x6c> 8008eac: 6820 ldr r0, [r4, #0] 8008eae: 4401 add r1, r0 8008eb0: 1850 adds r0, r2, r1 8008eb2: 4283 cmp r3, r0 8008eb4: 6011 str r1, [r2, #0] 8008eb6: d1e0 bne.n 8008e7a <_free_r+0x22> 8008eb8: 6818 ldr r0, [r3, #0] 8008eba: 685b ldr r3, [r3, #4] 8008ebc: 4408 add r0, r1 8008ebe: 6010 str r0, [r2, #0] 8008ec0: 6053 str r3, [r2, #4] 8008ec2: e7da b.n 8008e7a <_free_r+0x22> 8008ec4: d902 bls.n 8008ecc <_free_r+0x74> 8008ec6: 230c movs r3, #12 8008ec8: 602b str r3, [r5, #0] 8008eca: e7d6 b.n 8008e7a <_free_r+0x22> 8008ecc: 6820 ldr r0, [r4, #0] 8008ece: 1821 adds r1, r4, r0 8008ed0: 428b cmp r3, r1 8008ed2: bf01 itttt eq 8008ed4: 6819 ldreq r1, [r3, #0] 8008ed6: 685b ldreq r3, [r3, #4] 8008ed8: 1809 addeq r1, r1, r0 8008eda: 6021 streq r1, [r4, #0] 8008edc: 6063 str r3, [r4, #4] 8008ede: 6054 str r4, [r2, #4] 8008ee0: e7cb b.n 8008e7a <_free_r+0x22> 8008ee2: bd38 pop {r3, r4, r5, pc} 8008ee4: 20002514 .word 0x20002514 08008ee8 <_Balloc>: 8008ee8: b570 push {r4, r5, r6, lr} 8008eea: 69c6 ldr r6, [r0, #28] 8008eec: 4604 mov r4, r0 8008eee: 460d mov r5, r1 8008ef0: b976 cbnz r6, 8008f10 <_Balloc+0x28> 8008ef2: 2010 movs r0, #16 8008ef4: f7fe f9d2 bl 800729c 8008ef8: 4602 mov r2, r0 8008efa: 61e0 str r0, [r4, #28] 8008efc: b920 cbnz r0, 8008f08 <_Balloc+0x20> 8008efe: 216b movs r1, #107 ; 0x6b 8008f00: 4b17 ldr r3, [pc, #92] ; (8008f60 <_Balloc+0x78>) 8008f02: 4818 ldr r0, [pc, #96] ; (8008f64 <_Balloc+0x7c>) 8008f04: f000 ff58 bl 8009db8 <__assert_func> 8008f08: e9c0 6601 strd r6, r6, [r0, #4] 8008f0c: 6006 str r6, [r0, #0] 8008f0e: 60c6 str r6, [r0, #12] 8008f10: 69e6 ldr r6, [r4, #28] 8008f12: 68f3 ldr r3, [r6, #12] 8008f14: b183 cbz r3, 8008f38 <_Balloc+0x50> 8008f16: 69e3 ldr r3, [r4, #28] 8008f18: 68db ldr r3, [r3, #12] 8008f1a: f853 0025 ldr.w r0, [r3, r5, lsl #2] 8008f1e: b9b8 cbnz r0, 8008f50 <_Balloc+0x68> 8008f20: 2101 movs r1, #1 8008f22: fa01 f605 lsl.w r6, r1, r5 8008f26: 1d72 adds r2, r6, #5 8008f28: 4620 mov r0, r4 8008f2a: 0092 lsls r2, r2, #2 8008f2c: f000 ff62 bl 8009df4 <_calloc_r> 8008f30: b160 cbz r0, 8008f4c <_Balloc+0x64> 8008f32: e9c0 5601 strd r5, r6, [r0, #4] 8008f36: e00e b.n 8008f56 <_Balloc+0x6e> 8008f38: 2221 movs r2, #33 ; 0x21 8008f3a: 2104 movs r1, #4 8008f3c: 4620 mov r0, r4 8008f3e: f000 ff59 bl 8009df4 <_calloc_r> 8008f42: 69e3 ldr r3, [r4, #28] 8008f44: 60f0 str r0, [r6, #12] 8008f46: 68db ldr r3, [r3, #12] 8008f48: 2b00 cmp r3, #0 8008f4a: d1e4 bne.n 8008f16 <_Balloc+0x2e> 8008f4c: 2000 movs r0, #0 8008f4e: bd70 pop {r4, r5, r6, pc} 8008f50: 6802 ldr r2, [r0, #0] 8008f52: f843 2025 str.w r2, [r3, r5, lsl #2] 8008f56: 2300 movs r3, #0 8008f58: e9c0 3303 strd r3, r3, [r0, #12] 8008f5c: e7f7 b.n 8008f4e <_Balloc+0x66> 8008f5e: bf00 nop 8008f60: 0800ab41 .word 0x0800ab41 8008f64: 0800abc1 .word 0x0800abc1 08008f68 <_Bfree>: 8008f68: b570 push {r4, r5, r6, lr} 8008f6a: 69c6 ldr r6, [r0, #28] 8008f6c: 4605 mov r5, r0 8008f6e: 460c mov r4, r1 8008f70: b976 cbnz r6, 8008f90 <_Bfree+0x28> 8008f72: 2010 movs r0, #16 8008f74: f7fe f992 bl 800729c 8008f78: 4602 mov r2, r0 8008f7a: 61e8 str r0, [r5, #28] 8008f7c: b920 cbnz r0, 8008f88 <_Bfree+0x20> 8008f7e: 218f movs r1, #143 ; 0x8f 8008f80: 4b08 ldr r3, [pc, #32] ; (8008fa4 <_Bfree+0x3c>) 8008f82: 4809 ldr r0, [pc, #36] ; (8008fa8 <_Bfree+0x40>) 8008f84: f000 ff18 bl 8009db8 <__assert_func> 8008f88: e9c0 6601 strd r6, r6, [r0, #4] 8008f8c: 6006 str r6, [r0, #0] 8008f8e: 60c6 str r6, [r0, #12] 8008f90: b13c cbz r4, 8008fa2 <_Bfree+0x3a> 8008f92: 69eb ldr r3, [r5, #28] 8008f94: 6862 ldr r2, [r4, #4] 8008f96: 68db ldr r3, [r3, #12] 8008f98: f853 1022 ldr.w r1, [r3, r2, lsl #2] 8008f9c: 6021 str r1, [r4, #0] 8008f9e: f843 4022 str.w r4, [r3, r2, lsl #2] 8008fa2: bd70 pop {r4, r5, r6, pc} 8008fa4: 0800ab41 .word 0x0800ab41 8008fa8: 0800abc1 .word 0x0800abc1 08008fac <__multadd>: 8008fac: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8008fb0: 4607 mov r7, r0 8008fb2: 460c mov r4, r1 8008fb4: 461e mov r6, r3 8008fb6: 2000 movs r0, #0 8008fb8: 690d ldr r5, [r1, #16] 8008fba: f101 0c14 add.w ip, r1, #20 8008fbe: f8dc 3000 ldr.w r3, [ip] 8008fc2: 3001 adds r0, #1 8008fc4: b299 uxth r1, r3 8008fc6: fb02 6101 mla r1, r2, r1, r6 8008fca: 0c1e lsrs r6, r3, #16 8008fcc: 0c0b lsrs r3, r1, #16 8008fce: fb02 3306 mla r3, r2, r6, r3 8008fd2: b289 uxth r1, r1 8008fd4: eb01 4103 add.w r1, r1, r3, lsl #16 8008fd8: 4285 cmp r5, r0 8008fda: ea4f 4613 mov.w r6, r3, lsr #16 8008fde: f84c 1b04 str.w r1, [ip], #4 8008fe2: dcec bgt.n 8008fbe <__multadd+0x12> 8008fe4: b30e cbz r6, 800902a <__multadd+0x7e> 8008fe6: 68a3 ldr r3, [r4, #8] 8008fe8: 42ab cmp r3, r5 8008fea: dc19 bgt.n 8009020 <__multadd+0x74> 8008fec: 6861 ldr r1, [r4, #4] 8008fee: 4638 mov r0, r7 8008ff0: 3101 adds r1, #1 8008ff2: f7ff ff79 bl 8008ee8 <_Balloc> 8008ff6: 4680 mov r8, r0 8008ff8: b928 cbnz r0, 8009006 <__multadd+0x5a> 8008ffa: 4602 mov r2, r0 8008ffc: 21ba movs r1, #186 ; 0xba 8008ffe: 4b0c ldr r3, [pc, #48] ; (8009030 <__multadd+0x84>) 8009000: 480c ldr r0, [pc, #48] ; (8009034 <__multadd+0x88>) 8009002: f000 fed9 bl 8009db8 <__assert_func> 8009006: 6922 ldr r2, [r4, #16] 8009008: f104 010c add.w r1, r4, #12 800900c: 3202 adds r2, #2 800900e: 0092 lsls r2, r2, #2 8009010: 300c adds r0, #12 8009012: f000 fec3 bl 8009d9c 8009016: 4621 mov r1, r4 8009018: 4638 mov r0, r7 800901a: f7ff ffa5 bl 8008f68 <_Bfree> 800901e: 4644 mov r4, r8 8009020: eb04 0385 add.w r3, r4, r5, lsl #2 8009024: 3501 adds r5, #1 8009026: 615e str r6, [r3, #20] 8009028: 6125 str r5, [r4, #16] 800902a: 4620 mov r0, r4 800902c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8009030: 0800abb0 .word 0x0800abb0 8009034: 0800abc1 .word 0x0800abc1 08009038 <__hi0bits>: 8009038: 0c02 lsrs r2, r0, #16 800903a: 0412 lsls r2, r2, #16 800903c: 4603 mov r3, r0 800903e: b9ca cbnz r2, 8009074 <__hi0bits+0x3c> 8009040: 0403 lsls r3, r0, #16 8009042: 2010 movs r0, #16 8009044: f013 4f7f tst.w r3, #4278190080 ; 0xff000000 8009048: bf04 itt eq 800904a: 021b lsleq r3, r3, #8 800904c: 3008 addeq r0, #8 800904e: f013 4f70 tst.w r3, #4026531840 ; 0xf0000000 8009052: bf04 itt eq 8009054: 011b lsleq r3, r3, #4 8009056: 3004 addeq r0, #4 8009058: f013 4f40 tst.w r3, #3221225472 ; 0xc0000000 800905c: bf04 itt eq 800905e: 009b lsleq r3, r3, #2 8009060: 3002 addeq r0, #2 8009062: 2b00 cmp r3, #0 8009064: db05 blt.n 8009072 <__hi0bits+0x3a> 8009066: f013 4f80 tst.w r3, #1073741824 ; 0x40000000 800906a: f100 0001 add.w r0, r0, #1 800906e: bf08 it eq 8009070: 2020 moveq r0, #32 8009072: 4770 bx lr 8009074: 2000 movs r0, #0 8009076: e7e5 b.n 8009044 <__hi0bits+0xc> 08009078 <__lo0bits>: 8009078: 6803 ldr r3, [r0, #0] 800907a: 4602 mov r2, r0 800907c: f013 0007 ands.w r0, r3, #7 8009080: d00b beq.n 800909a <__lo0bits+0x22> 8009082: 07d9 lsls r1, r3, #31 8009084: d421 bmi.n 80090ca <__lo0bits+0x52> 8009086: 0798 lsls r0, r3, #30 8009088: bf49 itett mi 800908a: 085b lsrmi r3, r3, #1 800908c: 089b lsrpl r3, r3, #2 800908e: 2001 movmi r0, #1 8009090: 6013 strmi r3, [r2, #0] 8009092: bf5c itt pl 8009094: 2002 movpl r0, #2 8009096: 6013 strpl r3, [r2, #0] 8009098: 4770 bx lr 800909a: b299 uxth r1, r3 800909c: b909 cbnz r1, 80090a2 <__lo0bits+0x2a> 800909e: 2010 movs r0, #16 80090a0: 0c1b lsrs r3, r3, #16 80090a2: b2d9 uxtb r1, r3 80090a4: b909 cbnz r1, 80090aa <__lo0bits+0x32> 80090a6: 3008 adds r0, #8 80090a8: 0a1b lsrs r3, r3, #8 80090aa: 0719 lsls r1, r3, #28 80090ac: bf04 itt eq 80090ae: 091b lsreq r3, r3, #4 80090b0: 3004 addeq r0, #4 80090b2: 0799 lsls r1, r3, #30 80090b4: bf04 itt eq 80090b6: 089b lsreq r3, r3, #2 80090b8: 3002 addeq r0, #2 80090ba: 07d9 lsls r1, r3, #31 80090bc: d403 bmi.n 80090c6 <__lo0bits+0x4e> 80090be: 085b lsrs r3, r3, #1 80090c0: f100 0001 add.w r0, r0, #1 80090c4: d003 beq.n 80090ce <__lo0bits+0x56> 80090c6: 6013 str r3, [r2, #0] 80090c8: 4770 bx lr 80090ca: 2000 movs r0, #0 80090cc: 4770 bx lr 80090ce: 2020 movs r0, #32 80090d0: 4770 bx lr ... 080090d4 <__i2b>: 80090d4: b510 push {r4, lr} 80090d6: 460c mov r4, r1 80090d8: 2101 movs r1, #1 80090da: f7ff ff05 bl 8008ee8 <_Balloc> 80090de: 4602 mov r2, r0 80090e0: b928 cbnz r0, 80090ee <__i2b+0x1a> 80090e2: f240 1145 movw r1, #325 ; 0x145 80090e6: 4b04 ldr r3, [pc, #16] ; (80090f8 <__i2b+0x24>) 80090e8: 4804 ldr r0, [pc, #16] ; (80090fc <__i2b+0x28>) 80090ea: f000 fe65 bl 8009db8 <__assert_func> 80090ee: 2301 movs r3, #1 80090f0: 6144 str r4, [r0, #20] 80090f2: 6103 str r3, [r0, #16] 80090f4: bd10 pop {r4, pc} 80090f6: bf00 nop 80090f8: 0800abb0 .word 0x0800abb0 80090fc: 0800abc1 .word 0x0800abc1 08009100 <__multiply>: 8009100: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8009104: 4691 mov r9, r2 8009106: 690a ldr r2, [r1, #16] 8009108: f8d9 3010 ldr.w r3, [r9, #16] 800910c: 460c mov r4, r1 800910e: 429a cmp r2, r3 8009110: bfbe ittt lt 8009112: 460b movlt r3, r1 8009114: 464c movlt r4, r9 8009116: 4699 movlt r9, r3 8009118: 6927 ldr r7, [r4, #16] 800911a: f8d9 a010 ldr.w sl, [r9, #16] 800911e: 68a3 ldr r3, [r4, #8] 8009120: 6861 ldr r1, [r4, #4] 8009122: eb07 060a add.w r6, r7, sl 8009126: 42b3 cmp r3, r6 8009128: b085 sub sp, #20 800912a: bfb8 it lt 800912c: 3101 addlt r1, #1 800912e: f7ff fedb bl 8008ee8 <_Balloc> 8009132: b930 cbnz r0, 8009142 <__multiply+0x42> 8009134: 4602 mov r2, r0 8009136: f44f 71b1 mov.w r1, #354 ; 0x162 800913a: 4b43 ldr r3, [pc, #268] ; (8009248 <__multiply+0x148>) 800913c: 4843 ldr r0, [pc, #268] ; (800924c <__multiply+0x14c>) 800913e: f000 fe3b bl 8009db8 <__assert_func> 8009142: f100 0514 add.w r5, r0, #20 8009146: 462b mov r3, r5 8009148: 2200 movs r2, #0 800914a: eb05 0886 add.w r8, r5, r6, lsl #2 800914e: 4543 cmp r3, r8 8009150: d321 bcc.n 8009196 <__multiply+0x96> 8009152: f104 0314 add.w r3, r4, #20 8009156: eb03 0787 add.w r7, r3, r7, lsl #2 800915a: f109 0314 add.w r3, r9, #20 800915e: eb03 028a add.w r2, r3, sl, lsl #2 8009162: 9202 str r2, [sp, #8] 8009164: 1b3a subs r2, r7, r4 8009166: 3a15 subs r2, #21 8009168: f022 0203 bic.w r2, r2, #3 800916c: 3204 adds r2, #4 800916e: f104 0115 add.w r1, r4, #21 8009172: 428f cmp r7, r1 8009174: bf38 it cc 8009176: 2204 movcc r2, #4 8009178: 9201 str r2, [sp, #4] 800917a: 9a02 ldr r2, [sp, #8] 800917c: 9303 str r3, [sp, #12] 800917e: 429a cmp r2, r3 8009180: d80c bhi.n 800919c <__multiply+0x9c> 8009182: 2e00 cmp r6, #0 8009184: dd03 ble.n 800918e <__multiply+0x8e> 8009186: f858 3d04 ldr.w r3, [r8, #-4]! 800918a: 2b00 cmp r3, #0 800918c: d05a beq.n 8009244 <__multiply+0x144> 800918e: 6106 str r6, [r0, #16] 8009190: b005 add sp, #20 8009192: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8009196: f843 2b04 str.w r2, [r3], #4 800919a: e7d8 b.n 800914e <__multiply+0x4e> 800919c: f8b3 a000 ldrh.w sl, [r3] 80091a0: f1ba 0f00 cmp.w sl, #0 80091a4: d023 beq.n 80091ee <__multiply+0xee> 80091a6: 46a9 mov r9, r5 80091a8: f04f 0c00 mov.w ip, #0 80091ac: f104 0e14 add.w lr, r4, #20 80091b0: f85e 2b04 ldr.w r2, [lr], #4 80091b4: f8d9 1000 ldr.w r1, [r9] 80091b8: fa1f fb82 uxth.w fp, r2 80091bc: b289 uxth r1, r1 80091be: fb0a 110b mla r1, sl, fp, r1 80091c2: 4461 add r1, ip 80091c4: f8d9 c000 ldr.w ip, [r9] 80091c8: 0c12 lsrs r2, r2, #16 80091ca: ea4f 4c1c mov.w ip, ip, lsr #16 80091ce: fb0a c202 mla r2, sl, r2, ip 80091d2: eb02 4211 add.w r2, r2, r1, lsr #16 80091d6: b289 uxth r1, r1 80091d8: ea41 4102 orr.w r1, r1, r2, lsl #16 80091dc: 4577 cmp r7, lr 80091de: ea4f 4c12 mov.w ip, r2, lsr #16 80091e2: f849 1b04 str.w r1, [r9], #4 80091e6: d8e3 bhi.n 80091b0 <__multiply+0xb0> 80091e8: 9a01 ldr r2, [sp, #4] 80091ea: f845 c002 str.w ip, [r5, r2] 80091ee: 9a03 ldr r2, [sp, #12] 80091f0: 3304 adds r3, #4 80091f2: f8b2 9002 ldrh.w r9, [r2, #2] 80091f6: f1b9 0f00 cmp.w r9, #0 80091fa: d021 beq.n 8009240 <__multiply+0x140> 80091fc: 46ae mov lr, r5 80091fe: f04f 0a00 mov.w sl, #0 8009202: 6829 ldr r1, [r5, #0] 8009204: f104 0c14 add.w ip, r4, #20 8009208: f8bc b000 ldrh.w fp, [ip] 800920c: f8be 2002 ldrh.w r2, [lr, #2] 8009210: b289 uxth r1, r1 8009212: fb09 220b mla r2, r9, fp, r2 8009216: 4452 add r2, sl 8009218: ea41 4102 orr.w r1, r1, r2, lsl #16 800921c: f84e 1b04 str.w r1, [lr], #4 8009220: f85c 1b04 ldr.w r1, [ip], #4 8009224: ea4f 4a11 mov.w sl, r1, lsr #16 8009228: f8be 1000 ldrh.w r1, [lr] 800922c: 4567 cmp r7, ip 800922e: fb09 110a mla r1, r9, sl, r1 8009232: eb01 4112 add.w r1, r1, r2, lsr #16 8009236: ea4f 4a11 mov.w sl, r1, lsr #16 800923a: d8e5 bhi.n 8009208 <__multiply+0x108> 800923c: 9a01 ldr r2, [sp, #4] 800923e: 50a9 str r1, [r5, r2] 8009240: 3504 adds r5, #4 8009242: e79a b.n 800917a <__multiply+0x7a> 8009244: 3e01 subs r6, #1 8009246: e79c b.n 8009182 <__multiply+0x82> 8009248: 0800abb0 .word 0x0800abb0 800924c: 0800abc1 .word 0x0800abc1 08009250 <__pow5mult>: 8009250: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8009254: 4615 mov r5, r2 8009256: f012 0203 ands.w r2, r2, #3 800925a: 4606 mov r6, r0 800925c: 460f mov r7, r1 800925e: d007 beq.n 8009270 <__pow5mult+0x20> 8009260: 4c25 ldr r4, [pc, #148] ; (80092f8 <__pow5mult+0xa8>) 8009262: 3a01 subs r2, #1 8009264: 2300 movs r3, #0 8009266: f854 2022 ldr.w r2, [r4, r2, lsl #2] 800926a: f7ff fe9f bl 8008fac <__multadd> 800926e: 4607 mov r7, r0 8009270: 10ad asrs r5, r5, #2 8009272: d03d beq.n 80092f0 <__pow5mult+0xa0> 8009274: 69f4 ldr r4, [r6, #28] 8009276: b97c cbnz r4, 8009298 <__pow5mult+0x48> 8009278: 2010 movs r0, #16 800927a: f7fe f80f bl 800729c 800927e: 4602 mov r2, r0 8009280: 61f0 str r0, [r6, #28] 8009282: b928 cbnz r0, 8009290 <__pow5mult+0x40> 8009284: f240 11b3 movw r1, #435 ; 0x1b3 8009288: 4b1c ldr r3, [pc, #112] ; (80092fc <__pow5mult+0xac>) 800928a: 481d ldr r0, [pc, #116] ; (8009300 <__pow5mult+0xb0>) 800928c: f000 fd94 bl 8009db8 <__assert_func> 8009290: e9c0 4401 strd r4, r4, [r0, #4] 8009294: 6004 str r4, [r0, #0] 8009296: 60c4 str r4, [r0, #12] 8009298: f8d6 801c ldr.w r8, [r6, #28] 800929c: f8d8 4008 ldr.w r4, [r8, #8] 80092a0: b94c cbnz r4, 80092b6 <__pow5mult+0x66> 80092a2: f240 2171 movw r1, #625 ; 0x271 80092a6: 4630 mov r0, r6 80092a8: f7ff ff14 bl 80090d4 <__i2b> 80092ac: 2300 movs r3, #0 80092ae: 4604 mov r4, r0 80092b0: f8c8 0008 str.w r0, [r8, #8] 80092b4: 6003 str r3, [r0, #0] 80092b6: f04f 0900 mov.w r9, #0 80092ba: 07eb lsls r3, r5, #31 80092bc: d50a bpl.n 80092d4 <__pow5mult+0x84> 80092be: 4639 mov r1, r7 80092c0: 4622 mov r2, r4 80092c2: 4630 mov r0, r6 80092c4: f7ff ff1c bl 8009100 <__multiply> 80092c8: 4680 mov r8, r0 80092ca: 4639 mov r1, r7 80092cc: 4630 mov r0, r6 80092ce: f7ff fe4b bl 8008f68 <_Bfree> 80092d2: 4647 mov r7, r8 80092d4: 106d asrs r5, r5, #1 80092d6: d00b beq.n 80092f0 <__pow5mult+0xa0> 80092d8: 6820 ldr r0, [r4, #0] 80092da: b938 cbnz r0, 80092ec <__pow5mult+0x9c> 80092dc: 4622 mov r2, r4 80092de: 4621 mov r1, r4 80092e0: 4630 mov r0, r6 80092e2: f7ff ff0d bl 8009100 <__multiply> 80092e6: 6020 str r0, [r4, #0] 80092e8: f8c0 9000 str.w r9, [r0] 80092ec: 4604 mov r4, r0 80092ee: e7e4 b.n 80092ba <__pow5mult+0x6a> 80092f0: 4638 mov r0, r7 80092f2: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 80092f6: bf00 nop 80092f8: 0800ad10 .word 0x0800ad10 80092fc: 0800ab41 .word 0x0800ab41 8009300: 0800abc1 .word 0x0800abc1 08009304 <__lshift>: 8009304: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8009308: 460c mov r4, r1 800930a: 4607 mov r7, r0 800930c: 4691 mov r9, r2 800930e: 6923 ldr r3, [r4, #16] 8009310: 6849 ldr r1, [r1, #4] 8009312: eb03 1862 add.w r8, r3, r2, asr #5 8009316: 68a3 ldr r3, [r4, #8] 8009318: ea4f 1a62 mov.w sl, r2, asr #5 800931c: f108 0601 add.w r6, r8, #1 8009320: 42b3 cmp r3, r6 8009322: db0b blt.n 800933c <__lshift+0x38> 8009324: 4638 mov r0, r7 8009326: f7ff fddf bl 8008ee8 <_Balloc> 800932a: 4605 mov r5, r0 800932c: b948 cbnz r0, 8009342 <__lshift+0x3e> 800932e: 4602 mov r2, r0 8009330: f44f 71ef mov.w r1, #478 ; 0x1de 8009334: 4b27 ldr r3, [pc, #156] ; (80093d4 <__lshift+0xd0>) 8009336: 4828 ldr r0, [pc, #160] ; (80093d8 <__lshift+0xd4>) 8009338: f000 fd3e bl 8009db8 <__assert_func> 800933c: 3101 adds r1, #1 800933e: 005b lsls r3, r3, #1 8009340: e7ee b.n 8009320 <__lshift+0x1c> 8009342: 2300 movs r3, #0 8009344: f100 0114 add.w r1, r0, #20 8009348: f100 0210 add.w r2, r0, #16 800934c: 4618 mov r0, r3 800934e: 4553 cmp r3, sl 8009350: db33 blt.n 80093ba <__lshift+0xb6> 8009352: 6920 ldr r0, [r4, #16] 8009354: ea2a 7aea bic.w sl, sl, sl, asr #31 8009358: f104 0314 add.w r3, r4, #20 800935c: f019 091f ands.w r9, r9, #31 8009360: eb01 018a add.w r1, r1, sl, lsl #2 8009364: eb03 0c80 add.w ip, r3, r0, lsl #2 8009368: d02b beq.n 80093c2 <__lshift+0xbe> 800936a: 468a mov sl, r1 800936c: 2200 movs r2, #0 800936e: f1c9 0e20 rsb lr, r9, #32 8009372: 6818 ldr r0, [r3, #0] 8009374: fa00 f009 lsl.w r0, r0, r9 8009378: 4310 orrs r0, r2 800937a: f84a 0b04 str.w r0, [sl], #4 800937e: f853 2b04 ldr.w r2, [r3], #4 8009382: 459c cmp ip, r3 8009384: fa22 f20e lsr.w r2, r2, lr 8009388: d8f3 bhi.n 8009372 <__lshift+0x6e> 800938a: ebac 0304 sub.w r3, ip, r4 800938e: 3b15 subs r3, #21 8009390: f023 0303 bic.w r3, r3, #3 8009394: 3304 adds r3, #4 8009396: f104 0015 add.w r0, r4, #21 800939a: 4584 cmp ip, r0 800939c: bf38 it cc 800939e: 2304 movcc r3, #4 80093a0: 50ca str r2, [r1, r3] 80093a2: b10a cbz r2, 80093a8 <__lshift+0xa4> 80093a4: f108 0602 add.w r6, r8, #2 80093a8: 3e01 subs r6, #1 80093aa: 4638 mov r0, r7 80093ac: 4621 mov r1, r4 80093ae: 612e str r6, [r5, #16] 80093b0: f7ff fdda bl 8008f68 <_Bfree> 80093b4: 4628 mov r0, r5 80093b6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80093ba: f842 0f04 str.w r0, [r2, #4]! 80093be: 3301 adds r3, #1 80093c0: e7c5 b.n 800934e <__lshift+0x4a> 80093c2: 3904 subs r1, #4 80093c4: f853 2b04 ldr.w r2, [r3], #4 80093c8: 459c cmp ip, r3 80093ca: f841 2f04 str.w r2, [r1, #4]! 80093ce: d8f9 bhi.n 80093c4 <__lshift+0xc0> 80093d0: e7ea b.n 80093a8 <__lshift+0xa4> 80093d2: bf00 nop 80093d4: 0800abb0 .word 0x0800abb0 80093d8: 0800abc1 .word 0x0800abc1 080093dc <__mcmp>: 80093dc: 4603 mov r3, r0 80093de: 690a ldr r2, [r1, #16] 80093e0: 6900 ldr r0, [r0, #16] 80093e2: b530 push {r4, r5, lr} 80093e4: 1a80 subs r0, r0, r2 80093e6: d10d bne.n 8009404 <__mcmp+0x28> 80093e8: 3314 adds r3, #20 80093ea: 3114 adds r1, #20 80093ec: eb03 0482 add.w r4, r3, r2, lsl #2 80093f0: eb01 0182 add.w r1, r1, r2, lsl #2 80093f4: f854 5d04 ldr.w r5, [r4, #-4]! 80093f8: f851 2d04 ldr.w r2, [r1, #-4]! 80093fc: 4295 cmp r5, r2 80093fe: d002 beq.n 8009406 <__mcmp+0x2a> 8009400: d304 bcc.n 800940c <__mcmp+0x30> 8009402: 2001 movs r0, #1 8009404: bd30 pop {r4, r5, pc} 8009406: 42a3 cmp r3, r4 8009408: d3f4 bcc.n 80093f4 <__mcmp+0x18> 800940a: e7fb b.n 8009404 <__mcmp+0x28> 800940c: f04f 30ff mov.w r0, #4294967295 8009410: e7f8 b.n 8009404 <__mcmp+0x28> ... 08009414 <__mdiff>: 8009414: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8009418: 460d mov r5, r1 800941a: 4607 mov r7, r0 800941c: 4611 mov r1, r2 800941e: 4628 mov r0, r5 8009420: 4614 mov r4, r2 8009422: f7ff ffdb bl 80093dc <__mcmp> 8009426: 1e06 subs r6, r0, #0 8009428: d111 bne.n 800944e <__mdiff+0x3a> 800942a: 4631 mov r1, r6 800942c: 4638 mov r0, r7 800942e: f7ff fd5b bl 8008ee8 <_Balloc> 8009432: 4602 mov r2, r0 8009434: b928 cbnz r0, 8009442 <__mdiff+0x2e> 8009436: f240 2137 movw r1, #567 ; 0x237 800943a: 4b3a ldr r3, [pc, #232] ; (8009524 <__mdiff+0x110>) 800943c: 483a ldr r0, [pc, #232] ; (8009528 <__mdiff+0x114>) 800943e: f000 fcbb bl 8009db8 <__assert_func> 8009442: 2301 movs r3, #1 8009444: e9c0 3604 strd r3, r6, [r0, #16] 8009448: 4610 mov r0, r2 800944a: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 800944e: bfa4 itt ge 8009450: 4623 movge r3, r4 8009452: 462c movge r4, r5 8009454: 4638 mov r0, r7 8009456: 6861 ldr r1, [r4, #4] 8009458: bfa6 itte ge 800945a: 461d movge r5, r3 800945c: 2600 movge r6, #0 800945e: 2601 movlt r6, #1 8009460: f7ff fd42 bl 8008ee8 <_Balloc> 8009464: 4602 mov r2, r0 8009466: b918 cbnz r0, 8009470 <__mdiff+0x5c> 8009468: f240 2145 movw r1, #581 ; 0x245 800946c: 4b2d ldr r3, [pc, #180] ; (8009524 <__mdiff+0x110>) 800946e: e7e5 b.n 800943c <__mdiff+0x28> 8009470: f102 0814 add.w r8, r2, #20 8009474: 46c2 mov sl, r8 8009476: f04f 0c00 mov.w ip, #0 800947a: 6927 ldr r7, [r4, #16] 800947c: 60c6 str r6, [r0, #12] 800947e: 692e ldr r6, [r5, #16] 8009480: f104 0014 add.w r0, r4, #20 8009484: f105 0914 add.w r9, r5, #20 8009488: eb00 0e87 add.w lr, r0, r7, lsl #2 800948c: eb09 0686 add.w r6, r9, r6, lsl #2 8009490: 3410 adds r4, #16 8009492: f854 bf04 ldr.w fp, [r4, #4]! 8009496: f859 3b04 ldr.w r3, [r9], #4 800949a: fa1f f18b uxth.w r1, fp 800949e: 4461 add r1, ip 80094a0: fa1f fc83 uxth.w ip, r3 80094a4: 0c1b lsrs r3, r3, #16 80094a6: eba1 010c sub.w r1, r1, ip 80094aa: ebc3 431b rsb r3, r3, fp, lsr #16 80094ae: eb03 4321 add.w r3, r3, r1, asr #16 80094b2: b289 uxth r1, r1 80094b4: ea41 4103 orr.w r1, r1, r3, lsl #16 80094b8: 454e cmp r6, r9 80094ba: ea4f 4c23 mov.w ip, r3, asr #16 80094be: f84a 1b04 str.w r1, [sl], #4 80094c2: d8e6 bhi.n 8009492 <__mdiff+0x7e> 80094c4: 1b73 subs r3, r6, r5 80094c6: 3b15 subs r3, #21 80094c8: f023 0303 bic.w r3, r3, #3 80094cc: 3515 adds r5, #21 80094ce: 3304 adds r3, #4 80094d0: 42ae cmp r6, r5 80094d2: bf38 it cc 80094d4: 2304 movcc r3, #4 80094d6: 4418 add r0, r3 80094d8: 4443 add r3, r8 80094da: 461e mov r6, r3 80094dc: 4605 mov r5, r0 80094de: 4575 cmp r5, lr 80094e0: d30e bcc.n 8009500 <__mdiff+0xec> 80094e2: f10e 0103 add.w r1, lr, #3 80094e6: 1a09 subs r1, r1, r0 80094e8: f021 0103 bic.w r1, r1, #3 80094ec: 3803 subs r0, #3 80094ee: 4586 cmp lr, r0 80094f0: bf38 it cc 80094f2: 2100 movcc r1, #0 80094f4: 440b add r3, r1 80094f6: f853 1d04 ldr.w r1, [r3, #-4]! 80094fa: b189 cbz r1, 8009520 <__mdiff+0x10c> 80094fc: 6117 str r7, [r2, #16] 80094fe: e7a3 b.n 8009448 <__mdiff+0x34> 8009500: f855 8b04 ldr.w r8, [r5], #4 8009504: fa1f f188 uxth.w r1, r8 8009508: 4461 add r1, ip 800950a: 140c asrs r4, r1, #16 800950c: eb04 4418 add.w r4, r4, r8, lsr #16 8009510: b289 uxth r1, r1 8009512: ea41 4104 orr.w r1, r1, r4, lsl #16 8009516: ea4f 4c24 mov.w ip, r4, asr #16 800951a: f846 1b04 str.w r1, [r6], #4 800951e: e7de b.n 80094de <__mdiff+0xca> 8009520: 3f01 subs r7, #1 8009522: e7e8 b.n 80094f6 <__mdiff+0xe2> 8009524: 0800abb0 .word 0x0800abb0 8009528: 0800abc1 .word 0x0800abc1 0800952c <__d2b>: 800952c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 800952e: 2101 movs r1, #1 8009530: 4617 mov r7, r2 8009532: 461c mov r4, r3 8009534: 9e08 ldr r6, [sp, #32] 8009536: f7ff fcd7 bl 8008ee8 <_Balloc> 800953a: 4605 mov r5, r0 800953c: b930 cbnz r0, 800954c <__d2b+0x20> 800953e: 4602 mov r2, r0 8009540: f240 310f movw r1, #783 ; 0x30f 8009544: 4b22 ldr r3, [pc, #136] ; (80095d0 <__d2b+0xa4>) 8009546: 4823 ldr r0, [pc, #140] ; (80095d4 <__d2b+0xa8>) 8009548: f000 fc36 bl 8009db8 <__assert_func> 800954c: f3c4 0313 ubfx r3, r4, #0, #20 8009550: f3c4 540a ubfx r4, r4, #20, #11 8009554: bb24 cbnz r4, 80095a0 <__d2b+0x74> 8009556: 2f00 cmp r7, #0 8009558: 9301 str r3, [sp, #4] 800955a: d026 beq.n 80095aa <__d2b+0x7e> 800955c: 4668 mov r0, sp 800955e: 9700 str r7, [sp, #0] 8009560: f7ff fd8a bl 8009078 <__lo0bits> 8009564: e9dd 1200 ldrd r1, r2, [sp] 8009568: b1e8 cbz r0, 80095a6 <__d2b+0x7a> 800956a: f1c0 0320 rsb r3, r0, #32 800956e: fa02 f303 lsl.w r3, r2, r3 8009572: 430b orrs r3, r1 8009574: 40c2 lsrs r2, r0 8009576: 616b str r3, [r5, #20] 8009578: 9201 str r2, [sp, #4] 800957a: 9b01 ldr r3, [sp, #4] 800957c: 2b00 cmp r3, #0 800957e: bf14 ite ne 8009580: 2102 movne r1, #2 8009582: 2101 moveq r1, #1 8009584: 61ab str r3, [r5, #24] 8009586: 6129 str r1, [r5, #16] 8009588: b1bc cbz r4, 80095ba <__d2b+0x8e> 800958a: f2a4 4433 subw r4, r4, #1075 ; 0x433 800958e: 4404 add r4, r0 8009590: 6034 str r4, [r6, #0] 8009592: f1c0 0035 rsb r0, r0, #53 ; 0x35 8009596: 9b09 ldr r3, [sp, #36] ; 0x24 8009598: 6018 str r0, [r3, #0] 800959a: 4628 mov r0, r5 800959c: b003 add sp, #12 800959e: bdf0 pop {r4, r5, r6, r7, pc} 80095a0: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 80095a4: e7d7 b.n 8009556 <__d2b+0x2a> 80095a6: 6169 str r1, [r5, #20] 80095a8: e7e7 b.n 800957a <__d2b+0x4e> 80095aa: a801 add r0, sp, #4 80095ac: f7ff fd64 bl 8009078 <__lo0bits> 80095b0: 9b01 ldr r3, [sp, #4] 80095b2: 2101 movs r1, #1 80095b4: 616b str r3, [r5, #20] 80095b6: 3020 adds r0, #32 80095b8: e7e5 b.n 8009586 <__d2b+0x5a> 80095ba: f2a0 4032 subw r0, r0, #1074 ; 0x432 80095be: eb05 0381 add.w r3, r5, r1, lsl #2 80095c2: 6030 str r0, [r6, #0] 80095c4: 6918 ldr r0, [r3, #16] 80095c6: f7ff fd37 bl 8009038 <__hi0bits> 80095ca: ebc0 1041 rsb r0, r0, r1, lsl #5 80095ce: e7e2 b.n 8009596 <__d2b+0x6a> 80095d0: 0800abb0 .word 0x0800abb0 80095d4: 0800abc1 .word 0x0800abc1 080095d8 <__ssputs_r>: 80095d8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80095dc: 461f mov r7, r3 80095de: 688e ldr r6, [r1, #8] 80095e0: 4682 mov sl, r0 80095e2: 42be cmp r6, r7 80095e4: 460c mov r4, r1 80095e6: 4690 mov r8, r2 80095e8: 680b ldr r3, [r1, #0] 80095ea: d82c bhi.n 8009646 <__ssputs_r+0x6e> 80095ec: 898a ldrh r2, [r1, #12] 80095ee: f412 6f90 tst.w r2, #1152 ; 0x480 80095f2: d026 beq.n 8009642 <__ssputs_r+0x6a> 80095f4: 6965 ldr r5, [r4, #20] 80095f6: 6909 ldr r1, [r1, #16] 80095f8: eb05 0545 add.w r5, r5, r5, lsl #1 80095fc: eba3 0901 sub.w r9, r3, r1 8009600: eb05 75d5 add.w r5, r5, r5, lsr #31 8009604: 1c7b adds r3, r7, #1 8009606: 444b add r3, r9 8009608: 106d asrs r5, r5, #1 800960a: 429d cmp r5, r3 800960c: bf38 it cc 800960e: 461d movcc r5, r3 8009610: 0553 lsls r3, r2, #21 8009612: d527 bpl.n 8009664 <__ssputs_r+0x8c> 8009614: 4629 mov r1, r5 8009616: f7fd fe71 bl 80072fc <_malloc_r> 800961a: 4606 mov r6, r0 800961c: b360 cbz r0, 8009678 <__ssputs_r+0xa0> 800961e: 464a mov r2, r9 8009620: 6921 ldr r1, [r4, #16] 8009622: f000 fbbb bl 8009d9c 8009626: 89a3 ldrh r3, [r4, #12] 8009628: f423 6390 bic.w r3, r3, #1152 ; 0x480 800962c: f043 0380 orr.w r3, r3, #128 ; 0x80 8009630: 81a3 strh r3, [r4, #12] 8009632: 6126 str r6, [r4, #16] 8009634: 444e add r6, r9 8009636: 6026 str r6, [r4, #0] 8009638: 463e mov r6, r7 800963a: 6165 str r5, [r4, #20] 800963c: eba5 0509 sub.w r5, r5, r9 8009640: 60a5 str r5, [r4, #8] 8009642: 42be cmp r6, r7 8009644: d900 bls.n 8009648 <__ssputs_r+0x70> 8009646: 463e mov r6, r7 8009648: 4632 mov r2, r6 800964a: 4641 mov r1, r8 800964c: 6820 ldr r0, [r4, #0] 800964e: f000 fb68 bl 8009d22 8009652: 2000 movs r0, #0 8009654: 68a3 ldr r3, [r4, #8] 8009656: 1b9b subs r3, r3, r6 8009658: 60a3 str r3, [r4, #8] 800965a: 6823 ldr r3, [r4, #0] 800965c: 4433 add r3, r6 800965e: 6023 str r3, [r4, #0] 8009660: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8009664: 462a mov r2, r5 8009666: f000 fbeb bl 8009e40 <_realloc_r> 800966a: 4606 mov r6, r0 800966c: 2800 cmp r0, #0 800966e: d1e0 bne.n 8009632 <__ssputs_r+0x5a> 8009670: 4650 mov r0, sl 8009672: 6921 ldr r1, [r4, #16] 8009674: f7ff fbf0 bl 8008e58 <_free_r> 8009678: 230c movs r3, #12 800967a: f8ca 3000 str.w r3, [sl] 800967e: 89a3 ldrh r3, [r4, #12] 8009680: f04f 30ff mov.w r0, #4294967295 8009684: f043 0340 orr.w r3, r3, #64 ; 0x40 8009688: 81a3 strh r3, [r4, #12] 800968a: e7e9 b.n 8009660 <__ssputs_r+0x88> 0800968c <_svfiprintf_r>: 800968c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8009690: 4698 mov r8, r3 8009692: 898b ldrh r3, [r1, #12] 8009694: 4607 mov r7, r0 8009696: 061b lsls r3, r3, #24 8009698: 460d mov r5, r1 800969a: 4614 mov r4, r2 800969c: b09d sub sp, #116 ; 0x74 800969e: d50e bpl.n 80096be <_svfiprintf_r+0x32> 80096a0: 690b ldr r3, [r1, #16] 80096a2: b963 cbnz r3, 80096be <_svfiprintf_r+0x32> 80096a4: 2140 movs r1, #64 ; 0x40 80096a6: f7fd fe29 bl 80072fc <_malloc_r> 80096aa: 6028 str r0, [r5, #0] 80096ac: 6128 str r0, [r5, #16] 80096ae: b920 cbnz r0, 80096ba <_svfiprintf_r+0x2e> 80096b0: 230c movs r3, #12 80096b2: 603b str r3, [r7, #0] 80096b4: f04f 30ff mov.w r0, #4294967295 80096b8: e0d0 b.n 800985c <_svfiprintf_r+0x1d0> 80096ba: 2340 movs r3, #64 ; 0x40 80096bc: 616b str r3, [r5, #20] 80096be: 2300 movs r3, #0 80096c0: 9309 str r3, [sp, #36] ; 0x24 80096c2: 2320 movs r3, #32 80096c4: f88d 3029 strb.w r3, [sp, #41] ; 0x29 80096c8: 2330 movs r3, #48 ; 0x30 80096ca: f04f 0901 mov.w r9, #1 80096ce: f8cd 800c str.w r8, [sp, #12] 80096d2: f8df 81a0 ldr.w r8, [pc, #416] ; 8009874 <_svfiprintf_r+0x1e8> 80096d6: f88d 302a strb.w r3, [sp, #42] ; 0x2a 80096da: 4623 mov r3, r4 80096dc: 469a mov sl, r3 80096de: f813 2b01 ldrb.w r2, [r3], #1 80096e2: b10a cbz r2, 80096e8 <_svfiprintf_r+0x5c> 80096e4: 2a25 cmp r2, #37 ; 0x25 80096e6: d1f9 bne.n 80096dc <_svfiprintf_r+0x50> 80096e8: ebba 0b04 subs.w fp, sl, r4 80096ec: d00b beq.n 8009706 <_svfiprintf_r+0x7a> 80096ee: 465b mov r3, fp 80096f0: 4622 mov r2, r4 80096f2: 4629 mov r1, r5 80096f4: 4638 mov r0, r7 80096f6: f7ff ff6f bl 80095d8 <__ssputs_r> 80096fa: 3001 adds r0, #1 80096fc: f000 80a9 beq.w 8009852 <_svfiprintf_r+0x1c6> 8009700: 9a09 ldr r2, [sp, #36] ; 0x24 8009702: 445a add r2, fp 8009704: 9209 str r2, [sp, #36] ; 0x24 8009706: f89a 3000 ldrb.w r3, [sl] 800970a: 2b00 cmp r3, #0 800970c: f000 80a1 beq.w 8009852 <_svfiprintf_r+0x1c6> 8009710: 2300 movs r3, #0 8009712: f04f 32ff mov.w r2, #4294967295 8009716: e9cd 2305 strd r2, r3, [sp, #20] 800971a: f10a 0a01 add.w sl, sl, #1 800971e: 9304 str r3, [sp, #16] 8009720: 9307 str r3, [sp, #28] 8009722: f88d 3053 strb.w r3, [sp, #83] ; 0x53 8009726: 931a str r3, [sp, #104] ; 0x68 8009728: 4654 mov r4, sl 800972a: 2205 movs r2, #5 800972c: f814 1b01 ldrb.w r1, [r4], #1 8009730: 4850 ldr r0, [pc, #320] ; (8009874 <_svfiprintf_r+0x1e8>) 8009732: f7fe fd16 bl 8008162 8009736: 9a04 ldr r2, [sp, #16] 8009738: b9d8 cbnz r0, 8009772 <_svfiprintf_r+0xe6> 800973a: 06d0 lsls r0, r2, #27 800973c: bf44 itt mi 800973e: 2320 movmi r3, #32 8009740: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 8009744: 0711 lsls r1, r2, #28 8009746: bf44 itt mi 8009748: 232b movmi r3, #43 ; 0x2b 800974a: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 800974e: f89a 3000 ldrb.w r3, [sl] 8009752: 2b2a cmp r3, #42 ; 0x2a 8009754: d015 beq.n 8009782 <_svfiprintf_r+0xf6> 8009756: 4654 mov r4, sl 8009758: 2000 movs r0, #0 800975a: f04f 0c0a mov.w ip, #10 800975e: 9a07 ldr r2, [sp, #28] 8009760: 4621 mov r1, r4 8009762: f811 3b01 ldrb.w r3, [r1], #1 8009766: 3b30 subs r3, #48 ; 0x30 8009768: 2b09 cmp r3, #9 800976a: d94d bls.n 8009808 <_svfiprintf_r+0x17c> 800976c: b1b0 cbz r0, 800979c <_svfiprintf_r+0x110> 800976e: 9207 str r2, [sp, #28] 8009770: e014 b.n 800979c <_svfiprintf_r+0x110> 8009772: eba0 0308 sub.w r3, r0, r8 8009776: fa09 f303 lsl.w r3, r9, r3 800977a: 4313 orrs r3, r2 800977c: 46a2 mov sl, r4 800977e: 9304 str r3, [sp, #16] 8009780: e7d2 b.n 8009728 <_svfiprintf_r+0x9c> 8009782: 9b03 ldr r3, [sp, #12] 8009784: 1d19 adds r1, r3, #4 8009786: 681b ldr r3, [r3, #0] 8009788: 9103 str r1, [sp, #12] 800978a: 2b00 cmp r3, #0 800978c: bfbb ittet lt 800978e: 425b neglt r3, r3 8009790: f042 0202 orrlt.w r2, r2, #2 8009794: 9307 strge r3, [sp, #28] 8009796: 9307 strlt r3, [sp, #28] 8009798: bfb8 it lt 800979a: 9204 strlt r2, [sp, #16] 800979c: 7823 ldrb r3, [r4, #0] 800979e: 2b2e cmp r3, #46 ; 0x2e 80097a0: d10c bne.n 80097bc <_svfiprintf_r+0x130> 80097a2: 7863 ldrb r3, [r4, #1] 80097a4: 2b2a cmp r3, #42 ; 0x2a 80097a6: d134 bne.n 8009812 <_svfiprintf_r+0x186> 80097a8: 9b03 ldr r3, [sp, #12] 80097aa: 3402 adds r4, #2 80097ac: 1d1a adds r2, r3, #4 80097ae: 681b ldr r3, [r3, #0] 80097b0: 9203 str r2, [sp, #12] 80097b2: 2b00 cmp r3, #0 80097b4: bfb8 it lt 80097b6: f04f 33ff movlt.w r3, #4294967295 80097ba: 9305 str r3, [sp, #20] 80097bc: f8df a0b8 ldr.w sl, [pc, #184] ; 8009878 <_svfiprintf_r+0x1ec> 80097c0: 2203 movs r2, #3 80097c2: 4650 mov r0, sl 80097c4: 7821 ldrb r1, [r4, #0] 80097c6: f7fe fccc bl 8008162 80097ca: b138 cbz r0, 80097dc <_svfiprintf_r+0x150> 80097cc: 2240 movs r2, #64 ; 0x40 80097ce: 9b04 ldr r3, [sp, #16] 80097d0: eba0 000a sub.w r0, r0, sl 80097d4: 4082 lsls r2, r0 80097d6: 4313 orrs r3, r2 80097d8: 3401 adds r4, #1 80097da: 9304 str r3, [sp, #16] 80097dc: f814 1b01 ldrb.w r1, [r4], #1 80097e0: 2206 movs r2, #6 80097e2: 4826 ldr r0, [pc, #152] ; (800987c <_svfiprintf_r+0x1f0>) 80097e4: f88d 1028 strb.w r1, [sp, #40] ; 0x28 80097e8: f7fe fcbb bl 8008162 80097ec: 2800 cmp r0, #0 80097ee: d038 beq.n 8009862 <_svfiprintf_r+0x1d6> 80097f0: 4b23 ldr r3, [pc, #140] ; (8009880 <_svfiprintf_r+0x1f4>) 80097f2: bb1b cbnz r3, 800983c <_svfiprintf_r+0x1b0> 80097f4: 9b03 ldr r3, [sp, #12] 80097f6: 3307 adds r3, #7 80097f8: f023 0307 bic.w r3, r3, #7 80097fc: 3308 adds r3, #8 80097fe: 9303 str r3, [sp, #12] 8009800: 9b09 ldr r3, [sp, #36] ; 0x24 8009802: 4433 add r3, r6 8009804: 9309 str r3, [sp, #36] ; 0x24 8009806: e768 b.n 80096da <_svfiprintf_r+0x4e> 8009808: 460c mov r4, r1 800980a: 2001 movs r0, #1 800980c: fb0c 3202 mla r2, ip, r2, r3 8009810: e7a6 b.n 8009760 <_svfiprintf_r+0xd4> 8009812: 2300 movs r3, #0 8009814: f04f 0c0a mov.w ip, #10 8009818: 4619 mov r1, r3 800981a: 3401 adds r4, #1 800981c: 9305 str r3, [sp, #20] 800981e: 4620 mov r0, r4 8009820: f810 2b01 ldrb.w r2, [r0], #1 8009824: 3a30 subs r2, #48 ; 0x30 8009826: 2a09 cmp r2, #9 8009828: d903 bls.n 8009832 <_svfiprintf_r+0x1a6> 800982a: 2b00 cmp r3, #0 800982c: d0c6 beq.n 80097bc <_svfiprintf_r+0x130> 800982e: 9105 str r1, [sp, #20] 8009830: e7c4 b.n 80097bc <_svfiprintf_r+0x130> 8009832: 4604 mov r4, r0 8009834: 2301 movs r3, #1 8009836: fb0c 2101 mla r1, ip, r1, r2 800983a: e7f0 b.n 800981e <_svfiprintf_r+0x192> 800983c: ab03 add r3, sp, #12 800983e: 9300 str r3, [sp, #0] 8009840: 462a mov r2, r5 8009842: 4638 mov r0, r7 8009844: 4b0f ldr r3, [pc, #60] ; (8009884 <_svfiprintf_r+0x1f8>) 8009846: a904 add r1, sp, #16 8009848: f7fd fe80 bl 800754c <_printf_float> 800984c: 1c42 adds r2, r0, #1 800984e: 4606 mov r6, r0 8009850: d1d6 bne.n 8009800 <_svfiprintf_r+0x174> 8009852: 89ab ldrh r3, [r5, #12] 8009854: 065b lsls r3, r3, #25 8009856: f53f af2d bmi.w 80096b4 <_svfiprintf_r+0x28> 800985a: 9809 ldr r0, [sp, #36] ; 0x24 800985c: b01d add sp, #116 ; 0x74 800985e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8009862: ab03 add r3, sp, #12 8009864: 9300 str r3, [sp, #0] 8009866: 462a mov r2, r5 8009868: 4638 mov r0, r7 800986a: 4b06 ldr r3, [pc, #24] ; (8009884 <_svfiprintf_r+0x1f8>) 800986c: a904 add r1, sp, #16 800986e: f7fe f90d bl 8007a8c <_printf_i> 8009872: e7eb b.n 800984c <_svfiprintf_r+0x1c0> 8009874: 0800ad1c .word 0x0800ad1c 8009878: 0800ad22 .word 0x0800ad22 800987c: 0800ad26 .word 0x0800ad26 8009880: 0800754d .word 0x0800754d 8009884: 080095d9 .word 0x080095d9 08009888 <__sfputc_r>: 8009888: 6893 ldr r3, [r2, #8] 800988a: b410 push {r4} 800988c: 3b01 subs r3, #1 800988e: 2b00 cmp r3, #0 8009890: 6093 str r3, [r2, #8] 8009892: da07 bge.n 80098a4 <__sfputc_r+0x1c> 8009894: 6994 ldr r4, [r2, #24] 8009896: 42a3 cmp r3, r4 8009898: db01 blt.n 800989e <__sfputc_r+0x16> 800989a: 290a cmp r1, #10 800989c: d102 bne.n 80098a4 <__sfputc_r+0x1c> 800989e: bc10 pop {r4} 80098a0: f7fe bb3b b.w 8007f1a <__swbuf_r> 80098a4: 6813 ldr r3, [r2, #0] 80098a6: 1c58 adds r0, r3, #1 80098a8: 6010 str r0, [r2, #0] 80098aa: 7019 strb r1, [r3, #0] 80098ac: 4608 mov r0, r1 80098ae: bc10 pop {r4} 80098b0: 4770 bx lr 080098b2 <__sfputs_r>: 80098b2: b5f8 push {r3, r4, r5, r6, r7, lr} 80098b4: 4606 mov r6, r0 80098b6: 460f mov r7, r1 80098b8: 4614 mov r4, r2 80098ba: 18d5 adds r5, r2, r3 80098bc: 42ac cmp r4, r5 80098be: d101 bne.n 80098c4 <__sfputs_r+0x12> 80098c0: 2000 movs r0, #0 80098c2: e007 b.n 80098d4 <__sfputs_r+0x22> 80098c4: 463a mov r2, r7 80098c6: 4630 mov r0, r6 80098c8: f814 1b01 ldrb.w r1, [r4], #1 80098cc: f7ff ffdc bl 8009888 <__sfputc_r> 80098d0: 1c43 adds r3, r0, #1 80098d2: d1f3 bne.n 80098bc <__sfputs_r+0xa> 80098d4: bdf8 pop {r3, r4, r5, r6, r7, pc} ... 080098d8 <_vfiprintf_r>: 80098d8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80098dc: 460d mov r5, r1 80098de: 4614 mov r4, r2 80098e0: 4698 mov r8, r3 80098e2: 4606 mov r6, r0 80098e4: b09d sub sp, #116 ; 0x74 80098e6: b118 cbz r0, 80098f0 <_vfiprintf_r+0x18> 80098e8: 6a03 ldr r3, [r0, #32] 80098ea: b90b cbnz r3, 80098f0 <_vfiprintf_r+0x18> 80098ec: f7fe fa7c bl 8007de8 <__sinit> 80098f0: 6e6b ldr r3, [r5, #100] ; 0x64 80098f2: 07d9 lsls r1, r3, #31 80098f4: d405 bmi.n 8009902 <_vfiprintf_r+0x2a> 80098f6: 89ab ldrh r3, [r5, #12] 80098f8: 059a lsls r2, r3, #22 80098fa: d402 bmi.n 8009902 <_vfiprintf_r+0x2a> 80098fc: 6da8 ldr r0, [r5, #88] ; 0x58 80098fe: f7fe fc2e bl 800815e <__retarget_lock_acquire_recursive> 8009902: 89ab ldrh r3, [r5, #12] 8009904: 071b lsls r3, r3, #28 8009906: d501 bpl.n 800990c <_vfiprintf_r+0x34> 8009908: 692b ldr r3, [r5, #16] 800990a: b99b cbnz r3, 8009934 <_vfiprintf_r+0x5c> 800990c: 4629 mov r1, r5 800990e: 4630 mov r0, r6 8009910: f7fe fb40 bl 8007f94 <__swsetup_r> 8009914: b170 cbz r0, 8009934 <_vfiprintf_r+0x5c> 8009916: 6e6b ldr r3, [r5, #100] ; 0x64 8009918: 07dc lsls r4, r3, #31 800991a: d504 bpl.n 8009926 <_vfiprintf_r+0x4e> 800991c: f04f 30ff mov.w r0, #4294967295 8009920: b01d add sp, #116 ; 0x74 8009922: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8009926: 89ab ldrh r3, [r5, #12] 8009928: 0598 lsls r0, r3, #22 800992a: d4f7 bmi.n 800991c <_vfiprintf_r+0x44> 800992c: 6da8 ldr r0, [r5, #88] ; 0x58 800992e: f7fe fc17 bl 8008160 <__retarget_lock_release_recursive> 8009932: e7f3 b.n 800991c <_vfiprintf_r+0x44> 8009934: 2300 movs r3, #0 8009936: 9309 str r3, [sp, #36] ; 0x24 8009938: 2320 movs r3, #32 800993a: f88d 3029 strb.w r3, [sp, #41] ; 0x29 800993e: 2330 movs r3, #48 ; 0x30 8009940: f04f 0901 mov.w r9, #1 8009944: f8cd 800c str.w r8, [sp, #12] 8009948: f8df 81ac ldr.w r8, [pc, #428] ; 8009af8 <_vfiprintf_r+0x220> 800994c: f88d 302a strb.w r3, [sp, #42] ; 0x2a 8009950: 4623 mov r3, r4 8009952: 469a mov sl, r3 8009954: f813 2b01 ldrb.w r2, [r3], #1 8009958: b10a cbz r2, 800995e <_vfiprintf_r+0x86> 800995a: 2a25 cmp r2, #37 ; 0x25 800995c: d1f9 bne.n 8009952 <_vfiprintf_r+0x7a> 800995e: ebba 0b04 subs.w fp, sl, r4 8009962: d00b beq.n 800997c <_vfiprintf_r+0xa4> 8009964: 465b mov r3, fp 8009966: 4622 mov r2, r4 8009968: 4629 mov r1, r5 800996a: 4630 mov r0, r6 800996c: f7ff ffa1 bl 80098b2 <__sfputs_r> 8009970: 3001 adds r0, #1 8009972: f000 80a9 beq.w 8009ac8 <_vfiprintf_r+0x1f0> 8009976: 9a09 ldr r2, [sp, #36] ; 0x24 8009978: 445a add r2, fp 800997a: 9209 str r2, [sp, #36] ; 0x24 800997c: f89a 3000 ldrb.w r3, [sl] 8009980: 2b00 cmp r3, #0 8009982: f000 80a1 beq.w 8009ac8 <_vfiprintf_r+0x1f0> 8009986: 2300 movs r3, #0 8009988: f04f 32ff mov.w r2, #4294967295 800998c: e9cd 2305 strd r2, r3, [sp, #20] 8009990: f10a 0a01 add.w sl, sl, #1 8009994: 9304 str r3, [sp, #16] 8009996: 9307 str r3, [sp, #28] 8009998: f88d 3053 strb.w r3, [sp, #83] ; 0x53 800999c: 931a str r3, [sp, #104] ; 0x68 800999e: 4654 mov r4, sl 80099a0: 2205 movs r2, #5 80099a2: f814 1b01 ldrb.w r1, [r4], #1 80099a6: 4854 ldr r0, [pc, #336] ; (8009af8 <_vfiprintf_r+0x220>) 80099a8: f7fe fbdb bl 8008162 80099ac: 9a04 ldr r2, [sp, #16] 80099ae: b9d8 cbnz r0, 80099e8 <_vfiprintf_r+0x110> 80099b0: 06d1 lsls r1, r2, #27 80099b2: bf44 itt mi 80099b4: 2320 movmi r3, #32 80099b6: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 80099ba: 0713 lsls r3, r2, #28 80099bc: bf44 itt mi 80099be: 232b movmi r3, #43 ; 0x2b 80099c0: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 80099c4: f89a 3000 ldrb.w r3, [sl] 80099c8: 2b2a cmp r3, #42 ; 0x2a 80099ca: d015 beq.n 80099f8 <_vfiprintf_r+0x120> 80099cc: 4654 mov r4, sl 80099ce: 2000 movs r0, #0 80099d0: f04f 0c0a mov.w ip, #10 80099d4: 9a07 ldr r2, [sp, #28] 80099d6: 4621 mov r1, r4 80099d8: f811 3b01 ldrb.w r3, [r1], #1 80099dc: 3b30 subs r3, #48 ; 0x30 80099de: 2b09 cmp r3, #9 80099e0: d94d bls.n 8009a7e <_vfiprintf_r+0x1a6> 80099e2: b1b0 cbz r0, 8009a12 <_vfiprintf_r+0x13a> 80099e4: 9207 str r2, [sp, #28] 80099e6: e014 b.n 8009a12 <_vfiprintf_r+0x13a> 80099e8: eba0 0308 sub.w r3, r0, r8 80099ec: fa09 f303 lsl.w r3, r9, r3 80099f0: 4313 orrs r3, r2 80099f2: 46a2 mov sl, r4 80099f4: 9304 str r3, [sp, #16] 80099f6: e7d2 b.n 800999e <_vfiprintf_r+0xc6> 80099f8: 9b03 ldr r3, [sp, #12] 80099fa: 1d19 adds r1, r3, #4 80099fc: 681b ldr r3, [r3, #0] 80099fe: 9103 str r1, [sp, #12] 8009a00: 2b00 cmp r3, #0 8009a02: bfbb ittet lt 8009a04: 425b neglt r3, r3 8009a06: f042 0202 orrlt.w r2, r2, #2 8009a0a: 9307 strge r3, [sp, #28] 8009a0c: 9307 strlt r3, [sp, #28] 8009a0e: bfb8 it lt 8009a10: 9204 strlt r2, [sp, #16] 8009a12: 7823 ldrb r3, [r4, #0] 8009a14: 2b2e cmp r3, #46 ; 0x2e 8009a16: d10c bne.n 8009a32 <_vfiprintf_r+0x15a> 8009a18: 7863 ldrb r3, [r4, #1] 8009a1a: 2b2a cmp r3, #42 ; 0x2a 8009a1c: d134 bne.n 8009a88 <_vfiprintf_r+0x1b0> 8009a1e: 9b03 ldr r3, [sp, #12] 8009a20: 3402 adds r4, #2 8009a22: 1d1a adds r2, r3, #4 8009a24: 681b ldr r3, [r3, #0] 8009a26: 9203 str r2, [sp, #12] 8009a28: 2b00 cmp r3, #0 8009a2a: bfb8 it lt 8009a2c: f04f 33ff movlt.w r3, #4294967295 8009a30: 9305 str r3, [sp, #20] 8009a32: f8df a0c8 ldr.w sl, [pc, #200] ; 8009afc <_vfiprintf_r+0x224> 8009a36: 2203 movs r2, #3 8009a38: 4650 mov r0, sl 8009a3a: 7821 ldrb r1, [r4, #0] 8009a3c: f7fe fb91 bl 8008162 8009a40: b138 cbz r0, 8009a52 <_vfiprintf_r+0x17a> 8009a42: 2240 movs r2, #64 ; 0x40 8009a44: 9b04 ldr r3, [sp, #16] 8009a46: eba0 000a sub.w r0, r0, sl 8009a4a: 4082 lsls r2, r0 8009a4c: 4313 orrs r3, r2 8009a4e: 3401 adds r4, #1 8009a50: 9304 str r3, [sp, #16] 8009a52: f814 1b01 ldrb.w r1, [r4], #1 8009a56: 2206 movs r2, #6 8009a58: 4829 ldr r0, [pc, #164] ; (8009b00 <_vfiprintf_r+0x228>) 8009a5a: f88d 1028 strb.w r1, [sp, #40] ; 0x28 8009a5e: f7fe fb80 bl 8008162 8009a62: 2800 cmp r0, #0 8009a64: d03f beq.n 8009ae6 <_vfiprintf_r+0x20e> 8009a66: 4b27 ldr r3, [pc, #156] ; (8009b04 <_vfiprintf_r+0x22c>) 8009a68: bb1b cbnz r3, 8009ab2 <_vfiprintf_r+0x1da> 8009a6a: 9b03 ldr r3, [sp, #12] 8009a6c: 3307 adds r3, #7 8009a6e: f023 0307 bic.w r3, r3, #7 8009a72: 3308 adds r3, #8 8009a74: 9303 str r3, [sp, #12] 8009a76: 9b09 ldr r3, [sp, #36] ; 0x24 8009a78: 443b add r3, r7 8009a7a: 9309 str r3, [sp, #36] ; 0x24 8009a7c: e768 b.n 8009950 <_vfiprintf_r+0x78> 8009a7e: 460c mov r4, r1 8009a80: 2001 movs r0, #1 8009a82: fb0c 3202 mla r2, ip, r2, r3 8009a86: e7a6 b.n 80099d6 <_vfiprintf_r+0xfe> 8009a88: 2300 movs r3, #0 8009a8a: f04f 0c0a mov.w ip, #10 8009a8e: 4619 mov r1, r3 8009a90: 3401 adds r4, #1 8009a92: 9305 str r3, [sp, #20] 8009a94: 4620 mov r0, r4 8009a96: f810 2b01 ldrb.w r2, [r0], #1 8009a9a: 3a30 subs r2, #48 ; 0x30 8009a9c: 2a09 cmp r2, #9 8009a9e: d903 bls.n 8009aa8 <_vfiprintf_r+0x1d0> 8009aa0: 2b00 cmp r3, #0 8009aa2: d0c6 beq.n 8009a32 <_vfiprintf_r+0x15a> 8009aa4: 9105 str r1, [sp, #20] 8009aa6: e7c4 b.n 8009a32 <_vfiprintf_r+0x15a> 8009aa8: 4604 mov r4, r0 8009aaa: 2301 movs r3, #1 8009aac: fb0c 2101 mla r1, ip, r1, r2 8009ab0: e7f0 b.n 8009a94 <_vfiprintf_r+0x1bc> 8009ab2: ab03 add r3, sp, #12 8009ab4: 9300 str r3, [sp, #0] 8009ab6: 462a mov r2, r5 8009ab8: 4630 mov r0, r6 8009aba: 4b13 ldr r3, [pc, #76] ; (8009b08 <_vfiprintf_r+0x230>) 8009abc: a904 add r1, sp, #16 8009abe: f7fd fd45 bl 800754c <_printf_float> 8009ac2: 4607 mov r7, r0 8009ac4: 1c78 adds r0, r7, #1 8009ac6: d1d6 bne.n 8009a76 <_vfiprintf_r+0x19e> 8009ac8: 6e6b ldr r3, [r5, #100] ; 0x64 8009aca: 07d9 lsls r1, r3, #31 8009acc: d405 bmi.n 8009ada <_vfiprintf_r+0x202> 8009ace: 89ab ldrh r3, [r5, #12] 8009ad0: 059a lsls r2, r3, #22 8009ad2: d402 bmi.n 8009ada <_vfiprintf_r+0x202> 8009ad4: 6da8 ldr r0, [r5, #88] ; 0x58 8009ad6: f7fe fb43 bl 8008160 <__retarget_lock_release_recursive> 8009ada: 89ab ldrh r3, [r5, #12] 8009adc: 065b lsls r3, r3, #25 8009ade: f53f af1d bmi.w 800991c <_vfiprintf_r+0x44> 8009ae2: 9809 ldr r0, [sp, #36] ; 0x24 8009ae4: e71c b.n 8009920 <_vfiprintf_r+0x48> 8009ae6: ab03 add r3, sp, #12 8009ae8: 9300 str r3, [sp, #0] 8009aea: 462a mov r2, r5 8009aec: 4630 mov r0, r6 8009aee: 4b06 ldr r3, [pc, #24] ; (8009b08 <_vfiprintf_r+0x230>) 8009af0: a904 add r1, sp, #16 8009af2: f7fd ffcb bl 8007a8c <_printf_i> 8009af6: e7e4 b.n 8009ac2 <_vfiprintf_r+0x1ea> 8009af8: 0800ad1c .word 0x0800ad1c 8009afc: 0800ad22 .word 0x0800ad22 8009b00: 0800ad26 .word 0x0800ad26 8009b04: 0800754d .word 0x0800754d 8009b08: 080098b3 .word 0x080098b3 08009b0c <__sflush_r>: 8009b0c: 898a ldrh r2, [r1, #12] 8009b0e: b5f8 push {r3, r4, r5, r6, r7, lr} 8009b10: 4605 mov r5, r0 8009b12: 0710 lsls r0, r2, #28 8009b14: 460c mov r4, r1 8009b16: d457 bmi.n 8009bc8 <__sflush_r+0xbc> 8009b18: 684b ldr r3, [r1, #4] 8009b1a: 2b00 cmp r3, #0 8009b1c: dc04 bgt.n 8009b28 <__sflush_r+0x1c> 8009b1e: 6c0b ldr r3, [r1, #64] ; 0x40 8009b20: 2b00 cmp r3, #0 8009b22: dc01 bgt.n 8009b28 <__sflush_r+0x1c> 8009b24: 2000 movs r0, #0 8009b26: bdf8 pop {r3, r4, r5, r6, r7, pc} 8009b28: 6ae6 ldr r6, [r4, #44] ; 0x2c 8009b2a: 2e00 cmp r6, #0 8009b2c: d0fa beq.n 8009b24 <__sflush_r+0x18> 8009b2e: 2300 movs r3, #0 8009b30: f412 5280 ands.w r2, r2, #4096 ; 0x1000 8009b34: 682f ldr r7, [r5, #0] 8009b36: 6a21 ldr r1, [r4, #32] 8009b38: 602b str r3, [r5, #0] 8009b3a: d032 beq.n 8009ba2 <__sflush_r+0x96> 8009b3c: 6d60 ldr r0, [r4, #84] ; 0x54 8009b3e: 89a3 ldrh r3, [r4, #12] 8009b40: 075a lsls r2, r3, #29 8009b42: d505 bpl.n 8009b50 <__sflush_r+0x44> 8009b44: 6863 ldr r3, [r4, #4] 8009b46: 1ac0 subs r0, r0, r3 8009b48: 6b63 ldr r3, [r4, #52] ; 0x34 8009b4a: b10b cbz r3, 8009b50 <__sflush_r+0x44> 8009b4c: 6c23 ldr r3, [r4, #64] ; 0x40 8009b4e: 1ac0 subs r0, r0, r3 8009b50: 2300 movs r3, #0 8009b52: 4602 mov r2, r0 8009b54: 6ae6 ldr r6, [r4, #44] ; 0x2c 8009b56: 4628 mov r0, r5 8009b58: 6a21 ldr r1, [r4, #32] 8009b5a: 47b0 blx r6 8009b5c: 1c43 adds r3, r0, #1 8009b5e: 89a3 ldrh r3, [r4, #12] 8009b60: d106 bne.n 8009b70 <__sflush_r+0x64> 8009b62: 6829 ldr r1, [r5, #0] 8009b64: 291d cmp r1, #29 8009b66: d82b bhi.n 8009bc0 <__sflush_r+0xb4> 8009b68: 4a28 ldr r2, [pc, #160] ; (8009c0c <__sflush_r+0x100>) 8009b6a: 410a asrs r2, r1 8009b6c: 07d6 lsls r6, r2, #31 8009b6e: d427 bmi.n 8009bc0 <__sflush_r+0xb4> 8009b70: 2200 movs r2, #0 8009b72: 6062 str r2, [r4, #4] 8009b74: 6922 ldr r2, [r4, #16] 8009b76: 04d9 lsls r1, r3, #19 8009b78: 6022 str r2, [r4, #0] 8009b7a: d504 bpl.n 8009b86 <__sflush_r+0x7a> 8009b7c: 1c42 adds r2, r0, #1 8009b7e: d101 bne.n 8009b84 <__sflush_r+0x78> 8009b80: 682b ldr r3, [r5, #0] 8009b82: b903 cbnz r3, 8009b86 <__sflush_r+0x7a> 8009b84: 6560 str r0, [r4, #84] ; 0x54 8009b86: 6b61 ldr r1, [r4, #52] ; 0x34 8009b88: 602f str r7, [r5, #0] 8009b8a: 2900 cmp r1, #0 8009b8c: d0ca beq.n 8009b24 <__sflush_r+0x18> 8009b8e: f104 0344 add.w r3, r4, #68 ; 0x44 8009b92: 4299 cmp r1, r3 8009b94: d002 beq.n 8009b9c <__sflush_r+0x90> 8009b96: 4628 mov r0, r5 8009b98: f7ff f95e bl 8008e58 <_free_r> 8009b9c: 2000 movs r0, #0 8009b9e: 6360 str r0, [r4, #52] ; 0x34 8009ba0: e7c1 b.n 8009b26 <__sflush_r+0x1a> 8009ba2: 2301 movs r3, #1 8009ba4: 4628 mov r0, r5 8009ba6: 47b0 blx r6 8009ba8: 1c41 adds r1, r0, #1 8009baa: d1c8 bne.n 8009b3e <__sflush_r+0x32> 8009bac: 682b ldr r3, [r5, #0] 8009bae: 2b00 cmp r3, #0 8009bb0: d0c5 beq.n 8009b3e <__sflush_r+0x32> 8009bb2: 2b1d cmp r3, #29 8009bb4: d001 beq.n 8009bba <__sflush_r+0xae> 8009bb6: 2b16 cmp r3, #22 8009bb8: d101 bne.n 8009bbe <__sflush_r+0xb2> 8009bba: 602f str r7, [r5, #0] 8009bbc: e7b2 b.n 8009b24 <__sflush_r+0x18> 8009bbe: 89a3 ldrh r3, [r4, #12] 8009bc0: f043 0340 orr.w r3, r3, #64 ; 0x40 8009bc4: 81a3 strh r3, [r4, #12] 8009bc6: e7ae b.n 8009b26 <__sflush_r+0x1a> 8009bc8: 690f ldr r7, [r1, #16] 8009bca: 2f00 cmp r7, #0 8009bcc: d0aa beq.n 8009b24 <__sflush_r+0x18> 8009bce: 0793 lsls r3, r2, #30 8009bd0: bf18 it ne 8009bd2: 2300 movne r3, #0 8009bd4: 680e ldr r6, [r1, #0] 8009bd6: bf08 it eq 8009bd8: 694b ldreq r3, [r1, #20] 8009bda: 1bf6 subs r6, r6, r7 8009bdc: 600f str r7, [r1, #0] 8009bde: 608b str r3, [r1, #8] 8009be0: 2e00 cmp r6, #0 8009be2: dd9f ble.n 8009b24 <__sflush_r+0x18> 8009be4: 4633 mov r3, r6 8009be6: 463a mov r2, r7 8009be8: 4628 mov r0, r5 8009bea: 6a21 ldr r1, [r4, #32] 8009bec: f8d4 c028 ldr.w ip, [r4, #40] ; 0x28 8009bf0: 47e0 blx ip 8009bf2: 2800 cmp r0, #0 8009bf4: dc06 bgt.n 8009c04 <__sflush_r+0xf8> 8009bf6: 89a3 ldrh r3, [r4, #12] 8009bf8: f04f 30ff mov.w r0, #4294967295 8009bfc: f043 0340 orr.w r3, r3, #64 ; 0x40 8009c00: 81a3 strh r3, [r4, #12] 8009c02: e790 b.n 8009b26 <__sflush_r+0x1a> 8009c04: 4407 add r7, r0 8009c06: 1a36 subs r6, r6, r0 8009c08: e7ea b.n 8009be0 <__sflush_r+0xd4> 8009c0a: bf00 nop 8009c0c: dfbffffe .word 0xdfbffffe 08009c10 <_fflush_r>: 8009c10: b538 push {r3, r4, r5, lr} 8009c12: 690b ldr r3, [r1, #16] 8009c14: 4605 mov r5, r0 8009c16: 460c mov r4, r1 8009c18: b913 cbnz r3, 8009c20 <_fflush_r+0x10> 8009c1a: 2500 movs r5, #0 8009c1c: 4628 mov r0, r5 8009c1e: bd38 pop {r3, r4, r5, pc} 8009c20: b118 cbz r0, 8009c2a <_fflush_r+0x1a> 8009c22: 6a03 ldr r3, [r0, #32] 8009c24: b90b cbnz r3, 8009c2a <_fflush_r+0x1a> 8009c26: f7fe f8df bl 8007de8 <__sinit> 8009c2a: f9b4 300c ldrsh.w r3, [r4, #12] 8009c2e: 2b00 cmp r3, #0 8009c30: d0f3 beq.n 8009c1a <_fflush_r+0xa> 8009c32: 6e62 ldr r2, [r4, #100] ; 0x64 8009c34: 07d0 lsls r0, r2, #31 8009c36: d404 bmi.n 8009c42 <_fflush_r+0x32> 8009c38: 0599 lsls r1, r3, #22 8009c3a: d402 bmi.n 8009c42 <_fflush_r+0x32> 8009c3c: 6da0 ldr r0, [r4, #88] ; 0x58 8009c3e: f7fe fa8e bl 800815e <__retarget_lock_acquire_recursive> 8009c42: 4628 mov r0, r5 8009c44: 4621 mov r1, r4 8009c46: f7ff ff61 bl 8009b0c <__sflush_r> 8009c4a: 6e63 ldr r3, [r4, #100] ; 0x64 8009c4c: 4605 mov r5, r0 8009c4e: 07da lsls r2, r3, #31 8009c50: d4e4 bmi.n 8009c1c <_fflush_r+0xc> 8009c52: 89a3 ldrh r3, [r4, #12] 8009c54: 059b lsls r3, r3, #22 8009c56: d4e1 bmi.n 8009c1c <_fflush_r+0xc> 8009c58: 6da0 ldr r0, [r4, #88] ; 0x58 8009c5a: f7fe fa81 bl 8008160 <__retarget_lock_release_recursive> 8009c5e: e7dd b.n 8009c1c <_fflush_r+0xc> 08009c60 <__swhatbuf_r>: 8009c60: b570 push {r4, r5, r6, lr} 8009c62: 460c mov r4, r1 8009c64: f9b1 100e ldrsh.w r1, [r1, #14] 8009c68: 4615 mov r5, r2 8009c6a: 2900 cmp r1, #0 8009c6c: 461e mov r6, r3 8009c6e: b096 sub sp, #88 ; 0x58 8009c70: da0c bge.n 8009c8c <__swhatbuf_r+0x2c> 8009c72: 89a3 ldrh r3, [r4, #12] 8009c74: 2100 movs r1, #0 8009c76: f013 0f80 tst.w r3, #128 ; 0x80 8009c7a: bf0c ite eq 8009c7c: f44f 6380 moveq.w r3, #1024 ; 0x400 8009c80: 2340 movne r3, #64 ; 0x40 8009c82: 2000 movs r0, #0 8009c84: 6031 str r1, [r6, #0] 8009c86: 602b str r3, [r5, #0] 8009c88: b016 add sp, #88 ; 0x58 8009c8a: bd70 pop {r4, r5, r6, pc} 8009c8c: 466a mov r2, sp 8009c8e: f000 f863 bl 8009d58 <_fstat_r> 8009c92: 2800 cmp r0, #0 8009c94: dbed blt.n 8009c72 <__swhatbuf_r+0x12> 8009c96: 9901 ldr r1, [sp, #4] 8009c98: f401 4170 and.w r1, r1, #61440 ; 0xf000 8009c9c: f5a1 5300 sub.w r3, r1, #8192 ; 0x2000 8009ca0: 4259 negs r1, r3 8009ca2: 4159 adcs r1, r3 8009ca4: f44f 6380 mov.w r3, #1024 ; 0x400 8009ca8: e7eb b.n 8009c82 <__swhatbuf_r+0x22> 08009caa <__smakebuf_r>: 8009caa: 898b ldrh r3, [r1, #12] 8009cac: b573 push {r0, r1, r4, r5, r6, lr} 8009cae: 079d lsls r5, r3, #30 8009cb0: 4606 mov r6, r0 8009cb2: 460c mov r4, r1 8009cb4: d507 bpl.n 8009cc6 <__smakebuf_r+0x1c> 8009cb6: f104 0347 add.w r3, r4, #71 ; 0x47 8009cba: 6023 str r3, [r4, #0] 8009cbc: 6123 str r3, [r4, #16] 8009cbe: 2301 movs r3, #1 8009cc0: 6163 str r3, [r4, #20] 8009cc2: b002 add sp, #8 8009cc4: bd70 pop {r4, r5, r6, pc} 8009cc6: 466a mov r2, sp 8009cc8: ab01 add r3, sp, #4 8009cca: f7ff ffc9 bl 8009c60 <__swhatbuf_r> 8009cce: 9900 ldr r1, [sp, #0] 8009cd0: 4605 mov r5, r0 8009cd2: 4630 mov r0, r6 8009cd4: f7fd fb12 bl 80072fc <_malloc_r> 8009cd8: b948 cbnz r0, 8009cee <__smakebuf_r+0x44> 8009cda: f9b4 300c ldrsh.w r3, [r4, #12] 8009cde: 059a lsls r2, r3, #22 8009ce0: d4ef bmi.n 8009cc2 <__smakebuf_r+0x18> 8009ce2: f023 0303 bic.w r3, r3, #3 8009ce6: f043 0302 orr.w r3, r3, #2 8009cea: 81a3 strh r3, [r4, #12] 8009cec: e7e3 b.n 8009cb6 <__smakebuf_r+0xc> 8009cee: 89a3 ldrh r3, [r4, #12] 8009cf0: 6020 str r0, [r4, #0] 8009cf2: f043 0380 orr.w r3, r3, #128 ; 0x80 8009cf6: 81a3 strh r3, [r4, #12] 8009cf8: 9b00 ldr r3, [sp, #0] 8009cfa: 6120 str r0, [r4, #16] 8009cfc: 6163 str r3, [r4, #20] 8009cfe: 9b01 ldr r3, [sp, #4] 8009d00: b15b cbz r3, 8009d1a <__smakebuf_r+0x70> 8009d02: 4630 mov r0, r6 8009d04: f9b4 100e ldrsh.w r1, [r4, #14] 8009d08: f000 f838 bl 8009d7c <_isatty_r> 8009d0c: b128 cbz r0, 8009d1a <__smakebuf_r+0x70> 8009d0e: 89a3 ldrh r3, [r4, #12] 8009d10: f023 0303 bic.w r3, r3, #3 8009d14: f043 0301 orr.w r3, r3, #1 8009d18: 81a3 strh r3, [r4, #12] 8009d1a: 89a3 ldrh r3, [r4, #12] 8009d1c: 431d orrs r5, r3 8009d1e: 81a5 strh r5, [r4, #12] 8009d20: e7cf b.n 8009cc2 <__smakebuf_r+0x18> 08009d22 : 8009d22: 4288 cmp r0, r1 8009d24: b510 push {r4, lr} 8009d26: eb01 0402 add.w r4, r1, r2 8009d2a: d902 bls.n 8009d32 8009d2c: 4284 cmp r4, r0 8009d2e: 4623 mov r3, r4 8009d30: d807 bhi.n 8009d42 8009d32: 1e43 subs r3, r0, #1 8009d34: 42a1 cmp r1, r4 8009d36: d008 beq.n 8009d4a 8009d38: f811 2b01 ldrb.w r2, [r1], #1 8009d3c: f803 2f01 strb.w r2, [r3, #1]! 8009d40: e7f8 b.n 8009d34 8009d42: 4601 mov r1, r0 8009d44: 4402 add r2, r0 8009d46: 428a cmp r2, r1 8009d48: d100 bne.n 8009d4c 8009d4a: bd10 pop {r4, pc} 8009d4c: f813 4d01 ldrb.w r4, [r3, #-1]! 8009d50: f802 4d01 strb.w r4, [r2, #-1]! 8009d54: e7f7 b.n 8009d46 ... 08009d58 <_fstat_r>: 8009d58: b538 push {r3, r4, r5, lr} 8009d5a: 2300 movs r3, #0 8009d5c: 4d06 ldr r5, [pc, #24] ; (8009d78 <_fstat_r+0x20>) 8009d5e: 4604 mov r4, r0 8009d60: 4608 mov r0, r1 8009d62: 4611 mov r1, r2 8009d64: 602b str r3, [r5, #0] 8009d66: f7f7 ff1a bl 8001b9e <_fstat> 8009d6a: 1c43 adds r3, r0, #1 8009d6c: d102 bne.n 8009d74 <_fstat_r+0x1c> 8009d6e: 682b ldr r3, [r5, #0] 8009d70: b103 cbz r3, 8009d74 <_fstat_r+0x1c> 8009d72: 6023 str r3, [r4, #0] 8009d74: bd38 pop {r3, r4, r5, pc} 8009d76: bf00 nop 8009d78: 20002658 .word 0x20002658 08009d7c <_isatty_r>: 8009d7c: b538 push {r3, r4, r5, lr} 8009d7e: 2300 movs r3, #0 8009d80: 4d05 ldr r5, [pc, #20] ; (8009d98 <_isatty_r+0x1c>) 8009d82: 4604 mov r4, r0 8009d84: 4608 mov r0, r1 8009d86: 602b str r3, [r5, #0] 8009d88: f7f7 ff18 bl 8001bbc <_isatty> 8009d8c: 1c43 adds r3, r0, #1 8009d8e: d102 bne.n 8009d96 <_isatty_r+0x1a> 8009d90: 682b ldr r3, [r5, #0] 8009d92: b103 cbz r3, 8009d96 <_isatty_r+0x1a> 8009d94: 6023 str r3, [r4, #0] 8009d96: bd38 pop {r3, r4, r5, pc} 8009d98: 20002658 .word 0x20002658 08009d9c : 8009d9c: 440a add r2, r1 8009d9e: 4291 cmp r1, r2 8009da0: f100 33ff add.w r3, r0, #4294967295 8009da4: d100 bne.n 8009da8 8009da6: 4770 bx lr 8009da8: b510 push {r4, lr} 8009daa: f811 4b01 ldrb.w r4, [r1], #1 8009dae: 4291 cmp r1, r2 8009db0: f803 4f01 strb.w r4, [r3, #1]! 8009db4: d1f9 bne.n 8009daa 8009db6: bd10 pop {r4, pc} 08009db8 <__assert_func>: 8009db8: b51f push {r0, r1, r2, r3, r4, lr} 8009dba: 4614 mov r4, r2 8009dbc: 461a mov r2, r3 8009dbe: 4b09 ldr r3, [pc, #36] ; (8009de4 <__assert_func+0x2c>) 8009dc0: 4605 mov r5, r0 8009dc2: 681b ldr r3, [r3, #0] 8009dc4: 68d8 ldr r0, [r3, #12] 8009dc6: b14c cbz r4, 8009ddc <__assert_func+0x24> 8009dc8: 4b07 ldr r3, [pc, #28] ; (8009de8 <__assert_func+0x30>) 8009dca: e9cd 3401 strd r3, r4, [sp, #4] 8009dce: 9100 str r1, [sp, #0] 8009dd0: 462b mov r3, r5 8009dd2: 4906 ldr r1, [pc, #24] ; (8009dec <__assert_func+0x34>) 8009dd4: f000 f870 bl 8009eb8 8009dd8: f000 f880 bl 8009edc 8009ddc: 4b04 ldr r3, [pc, #16] ; (8009df0 <__assert_func+0x38>) 8009dde: 461c mov r4, r3 8009de0: e7f3 b.n 8009dca <__assert_func+0x12> 8009de2: bf00 nop 8009de4: 20000064 .word 0x20000064 8009de8: 0800ad37 .word 0x0800ad37 8009dec: 0800ad44 .word 0x0800ad44 8009df0: 0800ad72 .word 0x0800ad72 08009df4 <_calloc_r>: 8009df4: b570 push {r4, r5, r6, lr} 8009df6: fba1 5402 umull r5, r4, r1, r2 8009dfa: b934 cbnz r4, 8009e0a <_calloc_r+0x16> 8009dfc: 4629 mov r1, r5 8009dfe: f7fd fa7d bl 80072fc <_malloc_r> 8009e02: 4606 mov r6, r0 8009e04: b928 cbnz r0, 8009e12 <_calloc_r+0x1e> 8009e06: 4630 mov r0, r6 8009e08: bd70 pop {r4, r5, r6, pc} 8009e0a: 220c movs r2, #12 8009e0c: 2600 movs r6, #0 8009e0e: 6002 str r2, [r0, #0] 8009e10: e7f9 b.n 8009e06 <_calloc_r+0x12> 8009e12: 462a mov r2, r5 8009e14: 4621 mov r1, r4 8009e16: f7fe f915 bl 8008044 8009e1a: e7f4 b.n 8009e06 <_calloc_r+0x12> 08009e1c <__ascii_mbtowc>: 8009e1c: b082 sub sp, #8 8009e1e: b901 cbnz r1, 8009e22 <__ascii_mbtowc+0x6> 8009e20: a901 add r1, sp, #4 8009e22: b142 cbz r2, 8009e36 <__ascii_mbtowc+0x1a> 8009e24: b14b cbz r3, 8009e3a <__ascii_mbtowc+0x1e> 8009e26: 7813 ldrb r3, [r2, #0] 8009e28: 600b str r3, [r1, #0] 8009e2a: 7812 ldrb r2, [r2, #0] 8009e2c: 1e10 subs r0, r2, #0 8009e2e: bf18 it ne 8009e30: 2001 movne r0, #1 8009e32: b002 add sp, #8 8009e34: 4770 bx lr 8009e36: 4610 mov r0, r2 8009e38: e7fb b.n 8009e32 <__ascii_mbtowc+0x16> 8009e3a: f06f 0001 mvn.w r0, #1 8009e3e: e7f8 b.n 8009e32 <__ascii_mbtowc+0x16> 08009e40 <_realloc_r>: 8009e40: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8009e44: 4680 mov r8, r0 8009e46: 4614 mov r4, r2 8009e48: 460e mov r6, r1 8009e4a: b921 cbnz r1, 8009e56 <_realloc_r+0x16> 8009e4c: 4611 mov r1, r2 8009e4e: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8009e52: f7fd ba53 b.w 80072fc <_malloc_r> 8009e56: b92a cbnz r2, 8009e64 <_realloc_r+0x24> 8009e58: f7fe fffe bl 8008e58 <_free_r> 8009e5c: 4625 mov r5, r4 8009e5e: 4628 mov r0, r5 8009e60: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8009e64: f000 f841 bl 8009eea <_malloc_usable_size_r> 8009e68: 4284 cmp r4, r0 8009e6a: 4607 mov r7, r0 8009e6c: d802 bhi.n 8009e74 <_realloc_r+0x34> 8009e6e: ebb4 0f50 cmp.w r4, r0, lsr #1 8009e72: d812 bhi.n 8009e9a <_realloc_r+0x5a> 8009e74: 4621 mov r1, r4 8009e76: 4640 mov r0, r8 8009e78: f7fd fa40 bl 80072fc <_malloc_r> 8009e7c: 4605 mov r5, r0 8009e7e: 2800 cmp r0, #0 8009e80: d0ed beq.n 8009e5e <_realloc_r+0x1e> 8009e82: 42bc cmp r4, r7 8009e84: 4622 mov r2, r4 8009e86: 4631 mov r1, r6 8009e88: bf28 it cs 8009e8a: 463a movcs r2, r7 8009e8c: f7ff ff86 bl 8009d9c 8009e90: 4631 mov r1, r6 8009e92: 4640 mov r0, r8 8009e94: f7fe ffe0 bl 8008e58 <_free_r> 8009e98: e7e1 b.n 8009e5e <_realloc_r+0x1e> 8009e9a: 4635 mov r5, r6 8009e9c: e7df b.n 8009e5e <_realloc_r+0x1e> 08009e9e <__ascii_wctomb>: 8009e9e: 4603 mov r3, r0 8009ea0: 4608 mov r0, r1 8009ea2: b141 cbz r1, 8009eb6 <__ascii_wctomb+0x18> 8009ea4: 2aff cmp r2, #255 ; 0xff 8009ea6: d904 bls.n 8009eb2 <__ascii_wctomb+0x14> 8009ea8: 228a movs r2, #138 ; 0x8a 8009eaa: f04f 30ff mov.w r0, #4294967295 8009eae: 601a str r2, [r3, #0] 8009eb0: 4770 bx lr 8009eb2: 2001 movs r0, #1 8009eb4: 700a strb r2, [r1, #0] 8009eb6: 4770 bx lr 08009eb8 : 8009eb8: b40e push {r1, r2, r3} 8009eba: b503 push {r0, r1, lr} 8009ebc: 4601 mov r1, r0 8009ebe: ab03 add r3, sp, #12 8009ec0: 4805 ldr r0, [pc, #20] ; (8009ed8 ) 8009ec2: f853 2b04 ldr.w r2, [r3], #4 8009ec6: 6800 ldr r0, [r0, #0] 8009ec8: 9301 str r3, [sp, #4] 8009eca: f7ff fd05 bl 80098d8 <_vfiprintf_r> 8009ece: b002 add sp, #8 8009ed0: f85d eb04 ldr.w lr, [sp], #4 8009ed4: b003 add sp, #12 8009ed6: 4770 bx lr 8009ed8: 20000064 .word 0x20000064 08009edc : 8009edc: 2006 movs r0, #6 8009ede: b508 push {r3, lr} 8009ee0: f000 f834 bl 8009f4c 8009ee4: 2001 movs r0, #1 8009ee6: f7f7 fe28 bl 8001b3a <_exit> 08009eea <_malloc_usable_size_r>: 8009eea: f851 3c04 ldr.w r3, [r1, #-4] 8009eee: 1f18 subs r0, r3, #4 8009ef0: 2b00 cmp r3, #0 8009ef2: bfbc itt lt 8009ef4: 580b ldrlt r3, [r1, r0] 8009ef6: 18c0 addlt r0, r0, r3 8009ef8: 4770 bx lr 08009efa <_raise_r>: 8009efa: 291f cmp r1, #31 8009efc: b538 push {r3, r4, r5, lr} 8009efe: 4604 mov r4, r0 8009f00: 460d mov r5, r1 8009f02: d904 bls.n 8009f0e <_raise_r+0x14> 8009f04: 2316 movs r3, #22 8009f06: 6003 str r3, [r0, #0] 8009f08: f04f 30ff mov.w r0, #4294967295 8009f0c: bd38 pop {r3, r4, r5, pc} 8009f0e: 6bc2 ldr r2, [r0, #60] ; 0x3c 8009f10: b112 cbz r2, 8009f18 <_raise_r+0x1e> 8009f12: f852 3021 ldr.w r3, [r2, r1, lsl #2] 8009f16: b94b cbnz r3, 8009f2c <_raise_r+0x32> 8009f18: 4620 mov r0, r4 8009f1a: f000 f831 bl 8009f80 <_getpid_r> 8009f1e: 462a mov r2, r5 8009f20: 4601 mov r1, r0 8009f22: 4620 mov r0, r4 8009f24: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8009f28: f000 b818 b.w 8009f5c <_kill_r> 8009f2c: 2b01 cmp r3, #1 8009f2e: d00a beq.n 8009f46 <_raise_r+0x4c> 8009f30: 1c59 adds r1, r3, #1 8009f32: d103 bne.n 8009f3c <_raise_r+0x42> 8009f34: 2316 movs r3, #22 8009f36: 6003 str r3, [r0, #0] 8009f38: 2001 movs r0, #1 8009f3a: e7e7 b.n 8009f0c <_raise_r+0x12> 8009f3c: 2400 movs r4, #0 8009f3e: 4628 mov r0, r5 8009f40: f842 4025 str.w r4, [r2, r5, lsl #2] 8009f44: 4798 blx r3 8009f46: 2000 movs r0, #0 8009f48: e7e0 b.n 8009f0c <_raise_r+0x12> ... 08009f4c : 8009f4c: 4b02 ldr r3, [pc, #8] ; (8009f58 ) 8009f4e: 4601 mov r1, r0 8009f50: 6818 ldr r0, [r3, #0] 8009f52: f7ff bfd2 b.w 8009efa <_raise_r> 8009f56: bf00 nop 8009f58: 20000064 .word 0x20000064 08009f5c <_kill_r>: 8009f5c: b538 push {r3, r4, r5, lr} 8009f5e: 2300 movs r3, #0 8009f60: 4d06 ldr r5, [pc, #24] ; (8009f7c <_kill_r+0x20>) 8009f62: 4604 mov r4, r0 8009f64: 4608 mov r0, r1 8009f66: 4611 mov r1, r2 8009f68: 602b str r3, [r5, #0] 8009f6a: f7f7 fdd6 bl 8001b1a <_kill> 8009f6e: 1c43 adds r3, r0, #1 8009f70: d102 bne.n 8009f78 <_kill_r+0x1c> 8009f72: 682b ldr r3, [r5, #0] 8009f74: b103 cbz r3, 8009f78 <_kill_r+0x1c> 8009f76: 6023 str r3, [r4, #0] 8009f78: bd38 pop {r3, r4, r5, pc} 8009f7a: bf00 nop 8009f7c: 20002658 .word 0x20002658 08009f80 <_getpid_r>: 8009f80: f7f7 bdc4 b.w 8001b0c <_getpid> 08009f84 <_init>: 8009f84: b5f8 push {r3, r4, r5, r6, r7, lr} 8009f86: bf00 nop 8009f88: bcf8 pop {r3, r4, r5, r6, r7} 8009f8a: bc08 pop {r3} 8009f8c: 469e mov lr, r3 8009f8e: 4770 bx lr 08009f90 <_fini>: 8009f90: b5f8 push {r3, r4, r5, r6, r7, lr} 8009f92: bf00 nop 8009f94: bcf8 pop {r3, r4, r5, r6, r7} 8009f96: bc08 pop {r3} 8009f98: 469e mov lr, r3 8009f9a: 4770 bx lr