: /** * @brief The application entry point. * @retval int */ int main(void) { 8001220: b580 push {r7, lr} 8001222: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 8001224: f000 fbf6 bl 8001a14 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8001228: f000 f80b bl 8001242 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 800122c: f000 f8b2 bl 8001394 MX_FSMC_Init(); 8001230: f000 f972 bl 8001518 MX_I2C2_Init(); 8001234: f000 f84a bl 80012cc MX_TIM6_Init(); 8001238: f000 f876 bl 8001328 /* USER CODE BEGIN 2 */ main_app(); 800123c: f005 fc6a bl 8006b14 /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) 8001240: e7fe b.n 8001240 08001242 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8001242: b580 push {r7, lr} 8001244: b090 sub sp, #64 ; 0x40 8001246: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8001248: f107 0318 add.w r3, r7, #24 800124c: 2228 movs r2, #40 ; 0x28 800124e: 2100 movs r1, #0 8001250: 4618 mov r0, r3 8001252: f005 ffc9 bl 80071e8 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8001256: 1d3b adds r3, r7, #4 8001258: 2200 movs r2, #0 800125a: 601a str r2, [r3, #0] 800125c: 605a str r2, [r3, #4] 800125e: 609a str r2, [r3, #8] 8001260: 60da str r2, [r3, #12] 8001262: 611a str r2, [r3, #16] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 8001264: 2301 movs r3, #1 8001266: 61bb str r3, [r7, #24] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8001268: f44f 3380 mov.w r3, #65536 ; 0x10000 800126c: 61fb str r3, [r7, #28] RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 800126e: 2300 movs r3, #0 8001270: 623b str r3, [r7, #32] RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8001272: 2301 movs r3, #1 8001274: 62bb str r3, [r7, #40] ; 0x28 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8001276: 2302 movs r3, #2 8001278: 637b str r3, [r7, #52] ; 0x34 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 800127a: f44f 3380 mov.w r3, #65536 ; 0x10000 800127e: 63bb str r3, [r7, #56] ; 0x38 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 8001280: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000 8001284: 63fb str r3, [r7, #60] ; 0x3c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001286: f107 0318 add.w r3, r7, #24 800128a: 4618 mov r0, r3 800128c: f001 ff1a bl 80030c4 8001290: 4603 mov r3, r0 8001292: 2b00 cmp r3, #0 8001294: d001 beq.n 800129a { Error_Handler(); 8001296: f000 f9a3 bl 80015e0 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 800129a: 230f movs r3, #15 800129c: 607b str r3, [r7, #4] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 800129e: 2302 movs r3, #2 80012a0: 60bb str r3, [r7, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 80012a2: 2300 movs r3, #0 80012a4: 60fb str r3, [r7, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 80012a6: f44f 6380 mov.w r3, #1024 ; 0x400 80012aa: 613b str r3, [r7, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 80012ac: 2300 movs r3, #0 80012ae: 617b str r3, [r7, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 80012b0: 1d3b adds r3, r7, #4 80012b2: 2102 movs r1, #2 80012b4: 4618 mov r0, r3 80012b6: f002 f985 bl 80035c4 80012ba: 4603 mov r3, r0 80012bc: 2b00 cmp r3, #0 80012be: d001 beq.n 80012c4 { Error_Handler(); 80012c0: f000 f98e bl 80015e0 } } 80012c4: bf00 nop 80012c6: 3740 adds r7, #64 ; 0x40 80012c8: 46bd mov sp, r7 80012ca: bd80 pop {r7, pc} 080012cc : * @brief I2C2 Initialization Function * @param None * @retval None */ static void MX_I2C2_Init(void) { 80012cc: b580 push {r7, lr} 80012ce: af00 add r7, sp, #0 /* USER CODE END I2C2_Init 0 */ /* USER CODE BEGIN I2C2_Init 1 */ /* USER CODE END I2C2_Init 1 */ hi2c2.Instance = I2C2; 80012d0: 4b12 ldr r3, [pc, #72] ; (800131c ) 80012d2: 4a13 ldr r2, [pc, #76] ; (8001320 ) 80012d4: 601a str r2, [r3, #0] hi2c2.Init.ClockSpeed = 100000; 80012d6: 4b11 ldr r3, [pc, #68] ; (800131c ) 80012d8: 4a12 ldr r2, [pc, #72] ; (8001324 ) 80012da: 605a str r2, [r3, #4] hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 80012dc: 4b0f ldr r3, [pc, #60] ; (800131c ) 80012de: 2200 movs r2, #0 80012e0: 609a str r2, [r3, #8] hi2c2.Init.OwnAddress1 = 0; 80012e2: 4b0e ldr r3, [pc, #56] ; (800131c ) 80012e4: 2200 movs r2, #0 80012e6: 60da str r2, [r3, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 80012e8: 4b0c ldr r3, [pc, #48] ; (800131c ) 80012ea: f44f 4280 mov.w r2, #16384 ; 0x4000 80012ee: 611a str r2, [r3, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 80012f0: 4b0a ldr r3, [pc, #40] ; (800131c ) 80012f2: 2200 movs r2, #0 80012f4: 615a str r2, [r3, #20] hi2c2.Init.OwnAddress2 = 0; 80012f6: 4b09 ldr r3, [pc, #36] ; (800131c ) 80012f8: 2200 movs r2, #0 80012fa: 619a str r2, [r3, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 80012fc: 4b07 ldr r3, [pc, #28] ; (800131c ) 80012fe: 2200 movs r2, #0 8001300: 61da str r2, [r3, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8001302: 4b06 ldr r3, [pc, #24] ; (800131c ) 8001304: 2200 movs r2, #0 8001306: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) 8001308: 4804 ldr r0, [pc, #16] ; (800131c ) 800130a: f000 fedb bl 80020c4 800130e: 4603 mov r3, r0 8001310: 2b00 cmp r3, #0 8001312: d001 beq.n 8001318 { Error_Handler(); 8001314: f000 f964 bl 80015e0 } /* USER CODE BEGIN I2C2_Init 2 */ /* USER CODE END I2C2_Init 2 */ } 8001318: bf00 nop 800131a: bd80 pop {r7, pc} 800131c: 20000218 .word 0x20000218 8001320: 40005800 .word 0x40005800 8001324: 000186a0 .word 0x000186a0 08001328 : * @brief TIM6 Initialization Function * @param None * @retval None */ static void MX_TIM6_Init(void) { 8001328: b580 push {r7, lr} 800132a: b082 sub sp, #8 800132c: af00 add r7, sp, #0 /* USER CODE BEGIN TIM6_Init 0 */ /* USER CODE END TIM6_Init 0 */ TIM_MasterConfigTypeDef sMasterConfig = {0}; 800132e: 463b mov r3, r7 8001330: 2200 movs r2, #0 8001332: 601a str r2, [r3, #0] 8001334: 605a str r2, [r3, #4] /* USER CODE BEGIN TIM6_Init 1 */ /* USER CODE END TIM6_Init 1 */ htim6.Instance = TIM6; 8001336: 4b15 ldr r3, [pc, #84] ; (800138c ) 8001338: 4a15 ldr r2, [pc, #84] ; (8001390 ) 800133a: 601a str r2, [r3, #0] htim6.Init.Prescaler = 72-1; 800133c: 4b13 ldr r3, [pc, #76] ; (800138c ) 800133e: 2247 movs r2, #71 ; 0x47 8001340: 605a str r2, [r3, #4] htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 8001342: 4b12 ldr r3, [pc, #72] ; (800138c ) 8001344: 2200 movs r2, #0 8001346: 609a str r2, [r3, #8] htim6.Init.Period = 10000-1; 8001348: 4b10 ldr r3, [pc, #64] ; (800138c ) 800134a: f242 720f movw r2, #9999 ; 0x270f 800134e: 60da str r2, [r3, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8001350: 4b0e ldr r3, [pc, #56] ; (800138c ) 8001352: 2200 movs r2, #0 8001354: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 8001356: 480d ldr r0, [pc, #52] ; (800138c ) 8001358: f002 fb07 bl 800396a 800135c: 4603 mov r3, r0 800135e: 2b00 cmp r3, #0 8001360: d001 beq.n 8001366 { Error_Handler(); 8001362: f000 f93d bl 80015e0 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8001366: 2300 movs r3, #0 8001368: 603b str r3, [r7, #0] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800136a: 2300 movs r3, #0 800136c: 607b str r3, [r7, #4] if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 800136e: 463b mov r3, r7 8001370: 4619 mov r1, r3 8001372: 4806 ldr r0, [pc, #24] ; (800138c ) 8001374: f002 fd7c bl 8003e70 8001378: 4603 mov r3, r0 800137a: 2b00 cmp r3, #0 800137c: d001 beq.n 8001382 { Error_Handler(); 800137e: f000 f92f bl 80015e0 } /* USER CODE BEGIN TIM6_Init 2 */ /* USER CODE END TIM6_Init 2 */ } 8001382: bf00 nop 8001384: 3708 adds r7, #8 8001386: 46bd mov sp, r7 8001388: bd80 pop {r7, pc} 800138a: bf00 nop 800138c: 200002b4 .word 0x200002b4 8001390: 40001000 .word 0x40001000 08001394 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 8001394: b580 push {r7, lr} 8001396: b08a sub sp, #40 ; 0x28 8001398: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800139a: f107 0318 add.w r3, r7, #24 800139e: 2200 movs r2, #0 80013a0: 601a str r2, [r3, #0] 80013a2: 605a str r2, [r3, #4] 80013a4: 609a str r2, [r3, #8] 80013a6: 60da str r2, [r3, #12] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOF_CLK_ENABLE(); 80013a8: 4b58 ldr r3, [pc, #352] ; (800150c ) 80013aa: 699b ldr r3, [r3, #24] 80013ac: 4a57 ldr r2, [pc, #348] ; (800150c ) 80013ae: f043 0380 orr.w r3, r3, #128 ; 0x80 80013b2: 6193 str r3, [r2, #24] 80013b4: 4b55 ldr r3, [pc, #340] ; (800150c ) 80013b6: 699b ldr r3, [r3, #24] 80013b8: f003 0380 and.w r3, r3, #128 ; 0x80 80013bc: 617b str r3, [r7, #20] 80013be: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOB_CLK_ENABLE(); 80013c0: 4b52 ldr r3, [pc, #328] ; (800150c ) 80013c2: 699b ldr r3, [r3, #24] 80013c4: 4a51 ldr r2, [pc, #324] ; (800150c ) 80013c6: f043 0308 orr.w r3, r3, #8 80013ca: 6193 str r3, [r2, #24] 80013cc: 4b4f ldr r3, [pc, #316] ; (800150c ) 80013ce: 699b ldr r3, [r3, #24] 80013d0: f003 0308 and.w r3, r3, #8 80013d4: 613b str r3, [r7, #16] 80013d6: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOG_CLK_ENABLE(); 80013d8: 4b4c ldr r3, [pc, #304] ; (800150c ) 80013da: 699b ldr r3, [r3, #24] 80013dc: 4a4b ldr r2, [pc, #300] ; (800150c ) 80013de: f443 7380 orr.w r3, r3, #256 ; 0x100 80013e2: 6193 str r3, [r2, #24] 80013e4: 4b49 ldr r3, [pc, #292] ; (800150c ) 80013e6: 699b ldr r3, [r3, #24] 80013e8: f403 7380 and.w r3, r3, #256 ; 0x100 80013ec: 60fb str r3, [r7, #12] 80013ee: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOE_CLK_ENABLE(); 80013f0: 4b46 ldr r3, [pc, #280] ; (800150c ) 80013f2: 699b ldr r3, [r3, #24] 80013f4: 4a45 ldr r2, [pc, #276] ; (800150c ) 80013f6: f043 0340 orr.w r3, r3, #64 ; 0x40 80013fa: 6193 str r3, [r2, #24] 80013fc: 4b43 ldr r3, [pc, #268] ; (800150c ) 80013fe: 699b ldr r3, [r3, #24] 8001400: f003 0340 and.w r3, r3, #64 ; 0x40 8001404: 60bb str r3, [r7, #8] 8001406: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOD_CLK_ENABLE(); 8001408: 4b40 ldr r3, [pc, #256] ; (800150c ) 800140a: 699b ldr r3, [r3, #24] 800140c: 4a3f ldr r2, [pc, #252] ; (800150c ) 800140e: f043 0320 orr.w r3, r3, #32 8001412: 6193 str r3, [r2, #24] 8001414: 4b3d ldr r3, [pc, #244] ; (800150c ) 8001416: 699b ldr r3, [r3, #24] 8001418: f003 0320 and.w r3, r3, #32 800141c: 607b str r3, [r7, #4] 800141e: 687b ldr r3, [r7, #4] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(TDIN_GPIO_Port, TDIN_Pin, GPIO_PIN_SET); 8001420: 2201 movs r2, #1 8001422: f44f 7100 mov.w r1, #512 ; 0x200 8001426: 483a ldr r0, [pc, #232] ; (8001510 ) 8001428: f000 fe33 bl 8002092 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(LCD_BL_GPIO_Port, LCD_BL_Pin, GPIO_PIN_RESET); 800142c: 2200 movs r2, #0 800142e: 2101 movs r1, #1 8001430: 4838 ldr r0, [pc, #224] ; (8001514 ) 8001432: f000 fe2e bl 8002092 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, TCLK_Pin|TCS_Pin|MAX_IRD_Pin|MAX_RD_Pin, GPIO_PIN_SET); 8001436: 2201 movs r2, #1 8001438: f245 0106 movw r1, #20486 ; 0x5006 800143c: 4835 ldr r0, [pc, #212] ; (8001514 ) 800143e: f000 fe28 bl 8002092 /*Configure GPIO pin : TDOUT_Pin */ GPIO_InitStruct.Pin = TDOUT_Pin; 8001442: f44f 7380 mov.w r3, #256 ; 0x100 8001446: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001448: 2300 movs r3, #0 800144a: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 800144c: 2300 movs r3, #0 800144e: 623b str r3, [r7, #32] HAL_GPIO_Init(TDOUT_GPIO_Port, &GPIO_InitStruct); 8001450: f107 0318 add.w r3, r7, #24 8001454: 4619 mov r1, r3 8001456: 482e ldr r0, [pc, #184] ; (8001510 ) 8001458: f000 fc70 bl 8001d3c /*Configure GPIO pin : TDIN_Pin */ GPIO_InitStruct.Pin = TDIN_Pin; 800145c: f44f 7300 mov.w r3, #512 ; 0x200 8001460: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001462: 2301 movs r3, #1 8001464: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001466: 2300 movs r3, #0 8001468: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800146a: 2303 movs r3, #3 800146c: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(TDIN_GPIO_Port, &GPIO_InitStruct); 800146e: f107 0318 add.w r3, r7, #24 8001472: 4619 mov r1, r3 8001474: 4826 ldr r0, [pc, #152] ; (8001510 ) 8001476: f000 fc61 bl 8001d3c /*Configure GPIO pin : TPEN_Pin */ GPIO_InitStruct.Pin = TPEN_Pin; 800147a: f44f 6380 mov.w r3, #1024 ; 0x400 800147e: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001480: 2300 movs r3, #0 8001482: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 8001484: 2301 movs r3, #1 8001486: 623b str r3, [r7, #32] HAL_GPIO_Init(TPEN_GPIO_Port, &GPIO_InitStruct); 8001488: f107 0318 add.w r3, r7, #24 800148c: 4619 mov r1, r3 800148e: 4820 ldr r0, [pc, #128] ; (8001510 ) 8001490: f000 fc54 bl 8001d3c /*Configure GPIO pin : LCD_BL_Pin */ GPIO_InitStruct.Pin = LCD_BL_Pin; 8001494: 2301 movs r3, #1 8001496: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001498: 2301 movs r3, #1 800149a: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 800149c: 2300 movs r3, #0 800149e: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80014a0: 2302 movs r3, #2 80014a2: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(LCD_BL_GPIO_Port, &GPIO_InitStruct); 80014a4: f107 0318 add.w r3, r7, #24 80014a8: 4619 mov r1, r3 80014aa: 481a ldr r0, [pc, #104] ; (8001514 ) 80014ac: f000 fc46 bl 8001d3c /*Configure GPIO pins : TCLK_Pin TCS_Pin */ GPIO_InitStruct.Pin = TCLK_Pin|TCS_Pin; 80014b0: 2306 movs r3, #6 80014b2: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80014b4: 2301 movs r3, #1 80014b6: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 80014b8: 2300 movs r3, #0 80014ba: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80014bc: 2303 movs r3, #3 80014be: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80014c0: f107 0318 add.w r3, r7, #24 80014c4: 4619 mov r1, r3 80014c6: 4813 ldr r0, [pc, #76] ; (8001514 ) 80014c8: f000 fc38 bl 8001d3c /*Configure GPIO pins : MAX_IRD_Pin MAX_RD_Pin */ GPIO_InitStruct.Pin = MAX_IRD_Pin|MAX_RD_Pin; 80014cc: f44f 43a0 mov.w r3, #20480 ; 0x5000 80014d0: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80014d2: 2301 movs r3, #1 80014d4: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 80014d6: 2301 movs r3, #1 80014d8: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80014da: 2303 movs r3, #3 80014dc: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80014de: f107 0318 add.w r3, r7, #24 80014e2: 4619 mov r1, r3 80014e4: 480b ldr r0, [pc, #44] ; (8001514 ) 80014e6: f000 fc29 bl 8001d3c /*Configure GPIO pin : MAX_INT_Pin */ GPIO_InitStruct.Pin = MAX_INT_Pin; 80014ea: f44f 5300 mov.w r3, #8192 ; 0x2000 80014ee: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80014f0: 2300 movs r3, #0 80014f2: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 80014f4: 2301 movs r3, #1 80014f6: 623b str r3, [r7, #32] HAL_GPIO_Init(MAX_INT_GPIO_Port, &GPIO_InitStruct); 80014f8: f107 0318 add.w r3, r7, #24 80014fc: 4619 mov r1, r3 80014fe: 4805 ldr r0, [pc, #20] ; (8001514 ) 8001500: f000 fc1c bl 8001d3c } 8001504: bf00 nop 8001506: 3728 adds r7, #40 ; 0x28 8001508: 46bd mov sp, r7 800150a: bd80 pop {r7, pc} 800150c: 40021000 .word 0x40021000 8001510: 40011c00 .word 0x40011c00 8001514: 40010c00 .word 0x40010c00 08001518 : /* FSMC initialization function */ static void MX_FSMC_Init(void) { 8001518: b580 push {r7, lr} 800151a: b088 sub sp, #32 800151c: af00 add r7, sp, #0 /* USER CODE BEGIN FSMC_Init 0 */ /* USER CODE END FSMC_Init 0 */ FSMC_NORSRAM_TimingTypeDef Timing = {0}; 800151e: 1d3b adds r3, r7, #4 8001520: 2200 movs r2, #0 8001522: 601a str r2, [r3, #0] 8001524: 605a str r2, [r3, #4] 8001526: 609a str r2, [r3, #8] 8001528: 60da str r2, [r3, #12] 800152a: 611a str r2, [r3, #16] 800152c: 615a str r2, [r3, #20] 800152e: 619a str r2, [r3, #24] /* USER CODE END FSMC_Init 1 */ /** Perform the SRAM1 memory initialization sequence */ hsram1.Instance = FSMC_NORSRAM_DEVICE; 8001530: 4b28 ldr r3, [pc, #160] ; (80015d4 ) 8001532: f04f 4220 mov.w r2, #2684354560 ; 0xa0000000 8001536: 601a str r2, [r3, #0] hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE; 8001538: 4b26 ldr r3, [pc, #152] ; (80015d4 ) 800153a: 4a27 ldr r2, [pc, #156] ; (80015d8 ) 800153c: 605a str r2, [r3, #4] /* hsram1.Init */ hsram1.Init.NSBank = FSMC_NORSRAM_BANK4; 800153e: 4b25 ldr r3, [pc, #148] ; (80015d4 ) 8001540: 2206 movs r2, #6 8001542: 609a str r2, [r3, #8] hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE; 8001544: 4b23 ldr r3, [pc, #140] ; (80015d4 ) 8001546: 2200 movs r2, #0 8001548: 60da str r2, [r3, #12] hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM; 800154a: 4b22 ldr r3, [pc, #136] ; (80015d4 ) 800154c: 2200 movs r2, #0 800154e: 611a str r2, [r3, #16] hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16; 8001550: 4b20 ldr r3, [pc, #128] ; (80015d4 ) 8001552: 2210 movs r2, #16 8001554: 615a str r2, [r3, #20] hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE; 8001556: 4b1f ldr r3, [pc, #124] ; (80015d4 ) 8001558: 2200 movs r2, #0 800155a: 619a str r2, [r3, #24] hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW; 800155c: 4b1d ldr r3, [pc, #116] ; (80015d4 ) 800155e: 2200 movs r2, #0 8001560: 61da str r2, [r3, #28] hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE; 8001562: 4b1c ldr r3, [pc, #112] ; (80015d4 ) 8001564: 2200 movs r2, #0 8001566: 621a str r2, [r3, #32] hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS; 8001568: 4b1a ldr r3, [pc, #104] ; (80015d4 ) 800156a: 2200 movs r2, #0 800156c: 625a str r2, [r3, #36] ; 0x24 hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE; 800156e: 4b19 ldr r3, [pc, #100] ; (80015d4 ) 8001570: f44f 5280 mov.w r2, #4096 ; 0x1000 8001574: 629a str r2, [r3, #40] ; 0x28 hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE; 8001576: 4b17 ldr r3, [pc, #92] ; (80015d4 ) 8001578: 2200 movs r2, #0 800157a: 62da str r2, [r3, #44] ; 0x2c hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE; 800157c: 4b15 ldr r3, [pc, #84] ; (80015d4 ) 800157e: 2200 movs r2, #0 8001580: 631a str r2, [r3, #48] ; 0x30 hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE; 8001582: 4b14 ldr r3, [pc, #80] ; (80015d4 ) 8001584: 2200 movs r2, #0 8001586: 635a str r2, [r3, #52] ; 0x34 hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE; 8001588: 4b12 ldr r3, [pc, #72] ; (80015d4 ) 800158a: 2200 movs r2, #0 800158c: 639a str r2, [r3, #56] ; 0x38 /* Timing */ Timing.AddressSetupTime = 0; 800158e: 2300 movs r3, #0 8001590: 607b str r3, [r7, #4] Timing.AddressHoldTime = 15; 8001592: 230f movs r3, #15 8001594: 60bb str r3, [r7, #8] Timing.DataSetupTime = 1; 8001596: 2301 movs r3, #1 8001598: 60fb str r3, [r7, #12] Timing.BusTurnAroundDuration = 0; 800159a: 2300 movs r3, #0 800159c: 613b str r3, [r7, #16] Timing.CLKDivision = 16; 800159e: 2310 movs r3, #16 80015a0: 617b str r3, [r7, #20] Timing.DataLatency = 17; 80015a2: 2311 movs r3, #17 80015a4: 61bb str r3, [r7, #24] Timing.AccessMode = FSMC_ACCESS_MODE_A; 80015a6: 2300 movs r3, #0 80015a8: 61fb str r3, [r7, #28] /* ExtTiming */ if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK) 80015aa: 1d3b adds r3, r7, #4 80015ac: 2200 movs r2, #0 80015ae: 4619 mov r1, r3 80015b0: 4808 ldr r0, [pc, #32] ; (80015d4 ) 80015b2: f002 f98d bl 80038d0 80015b6: 4603 mov r3, r0 80015b8: 2b00 cmp r3, #0 80015ba: d001 beq.n 80015c0 { Error_Handler( ); 80015bc: f000 f810 bl 80015e0 } /** Disconnect NADV */ __HAL_AFIO_FSMCNADV_DISCONNECTED(); 80015c0: 4b06 ldr r3, [pc, #24] ; (80015dc ) 80015c2: 69db ldr r3, [r3, #28] 80015c4: 4a05 ldr r2, [pc, #20] ; (80015dc ) 80015c6: f443 6380 orr.w r3, r3, #1024 ; 0x400 80015ca: 61d3 str r3, [r2, #28] /* USER CODE BEGIN FSMC_Init 2 */ /* USER CODE END FSMC_Init 2 */ } 80015cc: bf00 nop 80015ce: 3720 adds r7, #32 80015d0: 46bd mov sp, r7 80015d2: bd80 pop {r7, pc} 80015d4: 2000026c .word 0x2000026c 80015d8: a0000104 .word 0xa0000104 80015dc: 40010000 .word 0x40010000 080015e0 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 80015e0: b480 push {r7} 80015e2: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 80015e4: b672 cpsid i } 80015e6: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 80015e8: e7fe b.n 80015e8 ... 080015ec : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 80015ec: b480 push {r7} 80015ee: b085 sub sp, #20 80015f0: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 80015f2: 4b15 ldr r3, [pc, #84] ; (8001648 ) 80015f4: 699b ldr r3, [r3, #24] 80015f6: 4a14 ldr r2, [pc, #80] ; (8001648 ) 80015f8: f043 0301 orr.w r3, r3, #1 80015fc: 6193 str r3, [r2, #24] 80015fe: 4b12 ldr r3, [pc, #72] ; (8001648 ) 8001600: 699b ldr r3, [r3, #24] 8001602: f003 0301 and.w r3, r3, #1 8001606: 60bb str r3, [r7, #8] 8001608: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 800160a: 4b0f ldr r3, [pc, #60] ; (8001648 ) 800160c: 69db ldr r3, [r3, #28] 800160e: 4a0e ldr r2, [pc, #56] ; (8001648 ) 8001610: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8001614: 61d3 str r3, [r2, #28] 8001616: 4b0c ldr r3, [pc, #48] ; (8001648 ) 8001618: 69db ldr r3, [r3, #28] 800161a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 800161e: 607b str r3, [r7, #4] 8001620: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** DISABLE: JTAG-DP Disabled and SW-DP Disabled */ __HAL_AFIO_REMAP_SWJ_DISABLE(); 8001622: 4b0a ldr r3, [pc, #40] ; (800164c ) 8001624: 685b ldr r3, [r3, #4] 8001626: 60fb str r3, [r7, #12] 8001628: 68fb ldr r3, [r7, #12] 800162a: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 800162e: 60fb str r3, [r7, #12] 8001630: 68fb ldr r3, [r7, #12] 8001632: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 8001636: 60fb str r3, [r7, #12] 8001638: 4a04 ldr r2, [pc, #16] ; (800164c ) 800163a: 68fb ldr r3, [r7, #12] 800163c: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 800163e: bf00 nop 8001640: 3714 adds r7, #20 8001642: 46bd mov sp, r7 8001644: bc80 pop {r7} 8001646: 4770 bx lr 8001648: 40021000 .word 0x40021000 800164c: 40010000 .word 0x40010000 08001650 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 8001650: b580 push {r7, lr} 8001652: b088 sub sp, #32 8001654: af00 add r7, sp, #0 8001656: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001658: f107 0310 add.w r3, r7, #16 800165c: 2200 movs r2, #0 800165e: 601a str r2, [r3, #0] 8001660: 605a str r2, [r3, #4] 8001662: 609a str r2, [r3, #8] 8001664: 60da str r2, [r3, #12] if(hi2c->Instance==I2C2) 8001666: 687b ldr r3, [r7, #4] 8001668: 681b ldr r3, [r3, #0] 800166a: 4a16 ldr r2, [pc, #88] ; (80016c4 ) 800166c: 4293 cmp r3, r2 800166e: d124 bne.n 80016ba { /* USER CODE BEGIN I2C2_MspInit 0 */ /* USER CODE END I2C2_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 8001670: 4b15 ldr r3, [pc, #84] ; (80016c8 ) 8001672: 699b ldr r3, [r3, #24] 8001674: 4a14 ldr r2, [pc, #80] ; (80016c8 ) 8001676: f043 0308 orr.w r3, r3, #8 800167a: 6193 str r3, [r2, #24] 800167c: 4b12 ldr r3, [pc, #72] ; (80016c8 ) 800167e: 699b ldr r3, [r3, #24] 8001680: f003 0308 and.w r3, r3, #8 8001684: 60fb str r3, [r7, #12] 8001686: 68fb ldr r3, [r7, #12] /**I2C2 GPIO Configuration PB10 ------> I2C2_SCL PB11 ------> I2C2_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; 8001688: f44f 6340 mov.w r3, #3072 ; 0xc00 800168c: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 800168e: 2312 movs r3, #18 8001690: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001692: 2303 movs r3, #3 8001694: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001696: f107 0310 add.w r3, r7, #16 800169a: 4619 mov r1, r3 800169c: 480b ldr r0, [pc, #44] ; (80016cc ) 800169e: f000 fb4d bl 8001d3c /* Peripheral clock enable */ __HAL_RCC_I2C2_CLK_ENABLE(); 80016a2: 4b09 ldr r3, [pc, #36] ; (80016c8 ) 80016a4: 69db ldr r3, [r3, #28] 80016a6: 4a08 ldr r2, [pc, #32] ; (80016c8 ) 80016a8: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 80016ac: 61d3 str r3, [r2, #28] 80016ae: 4b06 ldr r3, [pc, #24] ; (80016c8 ) 80016b0: 69db ldr r3, [r3, #28] 80016b2: f403 0380 and.w r3, r3, #4194304 ; 0x400000 80016b6: 60bb str r3, [r7, #8] 80016b8: 68bb ldr r3, [r7, #8] /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } 80016ba: bf00 nop 80016bc: 3720 adds r7, #32 80016be: 46bd mov sp, r7 80016c0: bd80 pop {r7, pc} 80016c2: bf00 nop 80016c4: 40005800 .word 0x40005800 80016c8: 40021000 .word 0x40021000 80016cc: 40010c00 .word 0x40010c00 080016d0 : * This function configures the hardware resources used in this example * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { 80016d0: b580 push {r7, lr} 80016d2: b084 sub sp, #16 80016d4: af00 add r7, sp, #0 80016d6: 6078 str r0, [r7, #4] if(htim_base->Instance==TIM6) 80016d8: 687b ldr r3, [r7, #4] 80016da: 681b ldr r3, [r3, #0] 80016dc: 4a0d ldr r2, [pc, #52] ; (8001714 ) 80016de: 4293 cmp r3, r2 80016e0: d113 bne.n 800170a { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 80016e2: 4b0d ldr r3, [pc, #52] ; (8001718 ) 80016e4: 69db ldr r3, [r3, #28] 80016e6: 4a0c ldr r2, [pc, #48] ; (8001718 ) 80016e8: f043 0310 orr.w r3, r3, #16 80016ec: 61d3 str r3, [r2, #28] 80016ee: 4b0a ldr r3, [pc, #40] ; (8001718 ) 80016f0: 69db ldr r3, [r3, #28] 80016f2: f003 0310 and.w r3, r3, #16 80016f6: 60fb str r3, [r7, #12] 80016f8: 68fb ldr r3, [r7, #12] /* TIM6 interrupt Init */ HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 80016fa: 2200 movs r2, #0 80016fc: 2100 movs r1, #0 80016fe: 2036 movs r0, #54 ; 0x36 8001700: f000 fae5 bl 8001cce HAL_NVIC_EnableIRQ(TIM6_IRQn); 8001704: 2036 movs r0, #54 ; 0x36 8001706: f000 fafe bl 8001d06 /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 800170a: bf00 nop 800170c: 3710 adds r7, #16 800170e: 46bd mov sp, r7 8001710: bd80 pop {r7, pc} 8001712: bf00 nop 8001714: 40001000 .word 0x40001000 8001718: 40021000 .word 0x40021000 0800171c : } static uint32_t FSMC_Initialized = 0; static void HAL_FSMC_MspInit(void){ 800171c: b580 push {r7, lr} 800171e: b086 sub sp, #24 8001720: af00 add r7, sp, #0 /* USER CODE BEGIN FSMC_MspInit 0 */ /* USER CODE END FSMC_MspInit 0 */ GPIO_InitTypeDef GPIO_InitStruct ={0}; 8001722: f107 0308 add.w r3, r7, #8 8001726: 2200 movs r2, #0 8001728: 601a str r2, [r3, #0] 800172a: 605a str r2, [r3, #4] 800172c: 609a str r2, [r3, #8] 800172e: 60da str r2, [r3, #12] if (FSMC_Initialized) { 8001730: 4b1f ldr r3, [pc, #124] ; (80017b0 ) 8001732: 681b ldr r3, [r3, #0] 8001734: 2b00 cmp r3, #0 8001736: d136 bne.n 80017a6 return; } FSMC_Initialized = 1; 8001738: 4b1d ldr r3, [pc, #116] ; (80017b0 ) 800173a: 2201 movs r2, #1 800173c: 601a str r2, [r3, #0] /* Peripheral clock enable */ __HAL_RCC_FSMC_CLK_ENABLE(); 800173e: 4b1d ldr r3, [pc, #116] ; (80017b4 ) 8001740: 695b ldr r3, [r3, #20] 8001742: 4a1c ldr r2, [pc, #112] ; (80017b4 ) 8001744: f443 7380 orr.w r3, r3, #256 ; 0x100 8001748: 6153 str r3, [r2, #20] 800174a: 4b1a ldr r3, [pc, #104] ; (80017b4 ) 800174c: 695b ldr r3, [r3, #20] 800174e: f403 7380 and.w r3, r3, #256 ; 0x100 8001752: 607b str r3, [r7, #4] 8001754: 687b ldr r3, [r7, #4] PD1 ------> FSMC_D3 PD4 ------> FSMC_NOE PD5 ------> FSMC_NWE PG12 ------> FSMC_NE4 */ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_12; 8001756: f241 0301 movw r3, #4097 ; 0x1001 800175a: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800175c: 2302 movs r3, #2 800175e: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001760: 2303 movs r3, #3 8001762: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8001764: f107 0308 add.w r3, r7, #8 8001768: 4619 mov r1, r3 800176a: 4813 ldr r0, [pc, #76] ; (80017b8 ) 800176c: f000 fae6 bl 8001d3c GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10 8001770: f64f 7380 movw r3, #65408 ; 0xff80 8001774: 60bb str r3, [r7, #8] |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14 |GPIO_PIN_15; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001776: 2302 movs r3, #2 8001778: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800177a: 2303 movs r3, #3 800177c: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 800177e: f107 0308 add.w r3, r7, #8 8001782: 4619 mov r1, r3 8001784: 480d ldr r0, [pc, #52] ; (80017bc ) 8001786: f000 fad9 bl 8001d3c GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14 800178a: f24c 7333 movw r3, #50995 ; 0xc733 800178e: 60bb str r3, [r7, #8] |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4 |GPIO_PIN_5; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001790: 2302 movs r3, #2 8001792: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001794: 2303 movs r3, #3 8001796: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8001798: f107 0308 add.w r3, r7, #8 800179c: 4619 mov r1, r3 800179e: 4808 ldr r0, [pc, #32] ; (80017c0 ) 80017a0: f000 facc bl 8001d3c 80017a4: e000 b.n 80017a8 return; 80017a6: bf00 nop /* USER CODE BEGIN FSMC_MspInit 1 */ /* USER CODE END FSMC_MspInit 1 */ } 80017a8: 3718 adds r7, #24 80017aa: 46bd mov sp, r7 80017ac: bd80 pop {r7, pc} 80017ae: bf00 nop 80017b0: 200001fc .word 0x200001fc 80017b4: 40021000 .word 0x40021000 80017b8: 40012000 .word 0x40012000 80017bc: 40011800 .word 0x40011800 80017c0: 40011400 .word 0x40011400 080017c4 : void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){ 80017c4: b580 push {r7, lr} 80017c6: b082 sub sp, #8 80017c8: af00 add r7, sp, #0 80017ca: 6078 str r0, [r7, #4] /* USER CODE BEGIN SRAM_MspInit 0 */ /* USER CODE END SRAM_MspInit 0 */ HAL_FSMC_MspInit(); 80017cc: f7ff ffa6 bl 800171c /* USER CODE BEGIN SRAM_MspInit 1 */ /* USER CODE END SRAM_MspInit 1 */ } 80017d0: bf00 nop 80017d2: 3708 adds r7, #8 80017d4: 46bd mov sp, r7 80017d6: bd80 pop {r7, pc} 080017d8 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 80017d8: b480 push {r7} 80017da: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 80017dc: e7fe b.n 80017dc 080017de : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 80017de: b480 push {r7} 80017e0: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 80017e2: e7fe b.n 80017e2 080017e4 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 80017e4: b480 push {r7} 80017e6: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 80017e8: e7fe b.n 80017e8 080017ea : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 80017ea: b480 push {r7} 80017ec: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 80017ee: e7fe b.n 80017ee 080017f0 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 80017f0: b480 push {r7} 80017f2: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 80017f4: e7fe b.n 80017f4 080017f6 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 80017f6: b480 push {r7} 80017f8: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 80017fa: bf00 nop 80017fc: 46bd mov sp, r7 80017fe: bc80 pop {r7} 8001800: 4770 bx lr 08001802 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8001802: b480 push {r7} 8001804: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 8001806: bf00 nop 8001808: 46bd mov sp, r7 800180a: bc80 pop {r7} 800180c: 4770 bx lr 0800180e : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 800180e: b480 push {r7} 8001810: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 8001812: bf00 nop 8001814: 46bd mov sp, r7 8001816: bc80 pop {r7} 8001818: 4770 bx lr 0800181a : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 800181a: b580 push {r7, lr} 800181c: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 800181e: f000 f93f bl 8001aa0 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 8001822: bf00 nop 8001824: bd80 pop {r7, pc} ... 08001828 : /** * @brief This function handles TIM6 global interrupt. */ void TIM6_IRQHandler(void) { 8001828: b580 push {r7, lr} 800182a: af00 add r7, sp, #0 /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 800182c: 4802 ldr r0, [pc, #8] ; (8001838 ) 800182e: f002 f979 bl 8003b24 /* USER CODE BEGIN TIM6_IRQn 1 */ /* USER CODE END TIM6_IRQn 1 */ } 8001832: bf00 nop 8001834: bd80 pop {r7, pc} 8001836: bf00 nop 8001838: 200002b4 .word 0x200002b4 0800183c <_getpid>: void initialise_monitor_handles() { } int _getpid(void) { 800183c: b480 push {r7} 800183e: af00 add r7, sp, #0 return 1; 8001840: 2301 movs r3, #1 } 8001842: 4618 mov r0, r3 8001844: 46bd mov sp, r7 8001846: bc80 pop {r7} 8001848: 4770 bx lr 0800184a <_kill>: int _kill(int pid, int sig) { 800184a: b580 push {r7, lr} 800184c: b082 sub sp, #8 800184e: af00 add r7, sp, #0 8001850: 6078 str r0, [r7, #4] 8001852: 6039 str r1, [r7, #0] errno = EINVAL; 8001854: f005 fc8e bl 8007174 <__errno> 8001858: 4603 mov r3, r0 800185a: 2216 movs r2, #22 800185c: 601a str r2, [r3, #0] return -1; 800185e: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff } 8001862: 4618 mov r0, r3 8001864: 3708 adds r7, #8 8001866: 46bd mov sp, r7 8001868: bd80 pop {r7, pc} 0800186a <_exit>: void _exit (int status) { 800186a: b580 push {r7, lr} 800186c: b082 sub sp, #8 800186e: af00 add r7, sp, #0 8001870: 6078 str r0, [r7, #4] _kill(status, -1); 8001872: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff 8001876: 6878 ldr r0, [r7, #4] 8001878: f7ff ffe7 bl 800184a <_kill> while (1) {} /* Make sure we hang here */ 800187c: e7fe b.n 800187c <_exit+0x12> 0800187e <_read>: } __attribute__((weak)) int _read(int file, char *ptr, int len) { 800187e: b580 push {r7, lr} 8001880: b086 sub sp, #24 8001882: af00 add r7, sp, #0 8001884: 60f8 str r0, [r7, #12] 8001886: 60b9 str r1, [r7, #8] 8001888: 607a str r2, [r7, #4] int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 800188a: 2300 movs r3, #0 800188c: 617b str r3, [r7, #20] 800188e: e00a b.n 80018a6 <_read+0x28> { *ptr++ = __io_getchar(); 8001890: f3af 8000 nop.w 8001894: 4601 mov r1, r0 8001896: 68bb ldr r3, [r7, #8] 8001898: 1c5a adds r2, r3, #1 800189a: 60ba str r2, [r7, #8] 800189c: b2ca uxtb r2, r1 800189e: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) 80018a0: 697b ldr r3, [r7, #20] 80018a2: 3301 adds r3, #1 80018a4: 617b str r3, [r7, #20] 80018a6: 697a ldr r2, [r7, #20] 80018a8: 687b ldr r3, [r7, #4] 80018aa: 429a cmp r2, r3 80018ac: dbf0 blt.n 8001890 <_read+0x12> } return len; 80018ae: 687b ldr r3, [r7, #4] } 80018b0: 4618 mov r0, r3 80018b2: 3718 adds r7, #24 80018b4: 46bd mov sp, r7 80018b6: bd80 pop {r7, pc} 080018b8 <_write>: __attribute__((weak)) int _write(int file, char *ptr, int len) { 80018b8: b580 push {r7, lr} 80018ba: b086 sub sp, #24 80018bc: af00 add r7, sp, #0 80018be: 60f8 str r0, [r7, #12] 80018c0: 60b9 str r1, [r7, #8] 80018c2: 607a str r2, [r7, #4] int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 80018c4: 2300 movs r3, #0 80018c6: 617b str r3, [r7, #20] 80018c8: e009 b.n 80018de <_write+0x26> { __io_putchar(*ptr++); 80018ca: 68bb ldr r3, [r7, #8] 80018cc: 1c5a adds r2, r3, #1 80018ce: 60ba str r2, [r7, #8] 80018d0: 781b ldrb r3, [r3, #0] 80018d2: 4618 mov r0, r3 80018d4: f3af 8000 nop.w for (DataIdx = 0; DataIdx < len; DataIdx++) 80018d8: 697b ldr r3, [r7, #20] 80018da: 3301 adds r3, #1 80018dc: 617b str r3, [r7, #20] 80018de: 697a ldr r2, [r7, #20] 80018e0: 687b ldr r3, [r7, #4] 80018e2: 429a cmp r2, r3 80018e4: dbf1 blt.n 80018ca <_write+0x12> } return len; 80018e6: 687b ldr r3, [r7, #4] } 80018e8: 4618 mov r0, r3 80018ea: 3718 adds r7, #24 80018ec: 46bd mov sp, r7 80018ee: bd80 pop {r7, pc} 080018f0 <_close>: int _close(int file) { 80018f0: b480 push {r7} 80018f2: b083 sub sp, #12 80018f4: af00 add r7, sp, #0 80018f6: 6078 str r0, [r7, #4] return -1; 80018f8: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff } 80018fc: 4618 mov r0, r3 80018fe: 370c adds r7, #12 8001900: 46bd mov sp, r7 8001902: bc80 pop {r7} 8001904: 4770 bx lr 08001906 <_fstat>: int _fstat(int file, struct stat *st) { 8001906: b480 push {r7} 8001908: b083 sub sp, #12 800190a: af00 add r7, sp, #0 800190c: 6078 str r0, [r7, #4] 800190e: 6039 str r1, [r7, #0] st->st_mode = S_IFCHR; 8001910: 683b ldr r3, [r7, #0] 8001912: f44f 5200 mov.w r2, #8192 ; 0x2000 8001916: 605a str r2, [r3, #4] return 0; 8001918: 2300 movs r3, #0 } 800191a: 4618 mov r0, r3 800191c: 370c adds r7, #12 800191e: 46bd mov sp, r7 8001920: bc80 pop {r7} 8001922: 4770 bx lr 08001924 <_isatty>: int _isatty(int file) { 8001924: b480 push {r7} 8001926: b083 sub sp, #12 8001928: af00 add r7, sp, #0 800192a: 6078 str r0, [r7, #4] return 1; 800192c: 2301 movs r3, #1 } 800192e: 4618 mov r0, r3 8001930: 370c adds r7, #12 8001932: 46bd mov sp, r7 8001934: bc80 pop {r7} 8001936: 4770 bx lr 08001938 <_lseek>: int _lseek(int file, int ptr, int dir) { 8001938: b480 push {r7} 800193a: b085 sub sp, #20 800193c: af00 add r7, sp, #0 800193e: 60f8 str r0, [r7, #12] 8001940: 60b9 str r1, [r7, #8] 8001942: 607a str r2, [r7, #4] return 0; 8001944: 2300 movs r3, #0 } 8001946: 4618 mov r0, r3 8001948: 3714 adds r7, #20 800194a: 46bd mov sp, r7 800194c: bc80 pop {r7} 800194e: 4770 bx lr 08001950 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 8001950: b580 push {r7, lr} 8001952: b086 sub sp, #24 8001954: af00 add r7, sp, #0 8001956: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 8001958: 4a14 ldr r2, [pc, #80] ; (80019ac <_sbrk+0x5c>) 800195a: 4b15 ldr r3, [pc, #84] ; (80019b0 <_sbrk+0x60>) 800195c: 1ad3 subs r3, r2, r3 800195e: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 8001960: 697b ldr r3, [r7, #20] 8001962: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 8001964: 4b13 ldr r3, [pc, #76] ; (80019b4 <_sbrk+0x64>) 8001966: 681b ldr r3, [r3, #0] 8001968: 2b00 cmp r3, #0 800196a: d102 bne.n 8001972 <_sbrk+0x22> { __sbrk_heap_end = &_end; 800196c: 4b11 ldr r3, [pc, #68] ; (80019b4 <_sbrk+0x64>) 800196e: 4a12 ldr r2, [pc, #72] ; (80019b8 <_sbrk+0x68>) 8001970: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 8001972: 4b10 ldr r3, [pc, #64] ; (80019b4 <_sbrk+0x64>) 8001974: 681a ldr r2, [r3, #0] 8001976: 687b ldr r3, [r7, #4] 8001978: 4413 add r3, r2 800197a: 693a ldr r2, [r7, #16] 800197c: 429a cmp r2, r3 800197e: d207 bcs.n 8001990 <_sbrk+0x40> { errno = ENOMEM; 8001980: f005 fbf8 bl 8007174 <__errno> 8001984: 4603 mov r3, r0 8001986: 220c movs r2, #12 8001988: 601a str r2, [r3, #0] return (void *)-1; 800198a: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff 800198e: e009 b.n 80019a4 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 8001990: 4b08 ldr r3, [pc, #32] ; (80019b4 <_sbrk+0x64>) 8001992: 681b ldr r3, [r3, #0] 8001994: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 8001996: 4b07 ldr r3, [pc, #28] ; (80019b4 <_sbrk+0x64>) 8001998: 681a ldr r2, [r3, #0] 800199a: 687b ldr r3, [r7, #4] 800199c: 4413 add r3, r2 800199e: 4a05 ldr r2, [pc, #20] ; (80019b4 <_sbrk+0x64>) 80019a0: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 80019a2: 68fb ldr r3, [r7, #12] } 80019a4: 4618 mov r0, r3 80019a6: 3718 adds r7, #24 80019a8: 46bd mov sp, r7 80019aa: bd80 pop {r7, pc} 80019ac: 20010000 .word 0x20010000 80019b0: 00000800 .word 0x00000800 80019b4: 20000200 .word 0x20000200 80019b8: 200024b0 .word 0x200024b0 080019bc : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 80019bc: b480 push {r7} 80019be: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 80019c0: bf00 nop 80019c2: 46bd mov sp, r7 80019c4: bc80 pop {r7} 80019c6: 4770 bx lr 080019c8 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 80019c8: 480c ldr r0, [pc, #48] ; (80019fc ) ldr r1, =_edata 80019ca: 490d ldr r1, [pc, #52] ; (8001a00 ) ldr r2, =_sidata 80019cc: 4a0d ldr r2, [pc, #52] ; (8001a04 ) movs r3, #0 80019ce: 2300 movs r3, #0 b LoopCopyDataInit 80019d0: e002 b.n 80019d8 080019d2 : CopyDataInit: ldr r4, [r2, r3] 80019d2: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 80019d4: 50c4 str r4, [r0, r3] adds r3, r3, #4 80019d6: 3304 adds r3, #4 080019d8 : LoopCopyDataInit: adds r4, r0, r3 80019d8: 18c4 adds r4, r0, r3 cmp r4, r1 80019da: 428c cmp r4, r1 bcc CopyDataInit 80019dc: d3f9 bcc.n 80019d2 /* Zero fill the bss segment. */ ldr r2, =_sbss 80019de: 4a0a ldr r2, [pc, #40] ; (8001a08 ) ldr r4, =_ebss 80019e0: 4c0a ldr r4, [pc, #40] ; (8001a0c ) movs r3, #0 80019e2: 2300 movs r3, #0 b LoopFillZerobss 80019e4: e001 b.n 80019ea 080019e6 : FillZerobss: str r3, [r2] 80019e6: 6013 str r3, [r2, #0] adds r2, r2, #4 80019e8: 3204 adds r2, #4 080019ea : LoopFillZerobss: cmp r2, r4 80019ea: 42a2 cmp r2, r4 bcc FillZerobss 80019ec: d3fb bcc.n 80019e6 /* Call the clock system intitialization function.*/ bl SystemInit 80019ee: f7ff ffe5 bl 80019bc /* Call static constructors */ bl __libc_init_array 80019f2: f005 fbc5 bl 8007180 <__libc_init_array> /* Call the application's entry point.*/ bl main 80019f6: f7ff fc13 bl 8001220

bx lr 80019fa: 4770 bx lr ldr r0, =_sdata 80019fc: 20000000 .word 0x20000000 ldr r1, =_edata 8001a00: 200001e0 .word 0x200001e0 ldr r2, =_sidata 8001a04: 0800b2bc .word 0x0800b2bc ldr r2, =_sbss 8001a08: 200001e0 .word 0x200001e0 ldr r4, =_ebss 8001a0c: 200024ac .word 0x200024ac 08001a10 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8001a10: e7fe b.n 8001a10 ... 08001a14 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8001a14: b580 push {r7, lr} 8001a16: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8001a18: 4b08 ldr r3, [pc, #32] ; (8001a3c ) 8001a1a: 681b ldr r3, [r3, #0] 8001a1c: 4a07 ldr r2, [pc, #28] ; (8001a3c ) 8001a1e: f043 0310 orr.w r3, r3, #16 8001a22: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8001a24: 2003 movs r0, #3 8001a26: f000 f947 bl 8001cb8 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 8001a2a: 200f movs r0, #15 8001a2c: f000 f808 bl 8001a40 /* Init the low level hardware */ HAL_MspInit(); 8001a30: f7ff fddc bl 80015ec /* Return function status */ return HAL_OK; 8001a34: 2300 movs r3, #0 } 8001a36: 4618 mov r0, r3 8001a38: bd80 pop {r7, pc} 8001a3a: bf00 nop 8001a3c: 40022000 .word 0x40022000 08001a40 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8001a40: b580 push {r7, lr} 8001a42: b082 sub sp, #8 8001a44: af00 add r7, sp, #0 8001a46: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8001a48: 4b12 ldr r3, [pc, #72] ; (8001a94 ) 8001a4a: 681a ldr r2, [r3, #0] 8001a4c: 4b12 ldr r3, [pc, #72] ; (8001a98 ) 8001a4e: 781b ldrb r3, [r3, #0] 8001a50: 4619 mov r1, r3 8001a52: f44f 737a mov.w r3, #1000 ; 0x3e8 8001a56: fbb3 f3f1 udiv r3, r3, r1 8001a5a: fbb2 f3f3 udiv r3, r2, r3 8001a5e: 4618 mov r0, r3 8001a60: f000 f95f bl 8001d22 8001a64: 4603 mov r3, r0 8001a66: 2b00 cmp r3, #0 8001a68: d001 beq.n 8001a6e { return HAL_ERROR; 8001a6a: 2301 movs r3, #1 8001a6c: e00e b.n 8001a8c } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 8001a6e: 687b ldr r3, [r7, #4] 8001a70: 2b0f cmp r3, #15 8001a72: d80a bhi.n 8001a8a { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8001a74: 2200 movs r2, #0 8001a76: 6879 ldr r1, [r7, #4] 8001a78: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8001a7c: f000 f927 bl 8001cce uwTickPrio = TickPriority; 8001a80: 4a06 ldr r2, [pc, #24] ; (8001a9c ) 8001a82: 687b ldr r3, [r7, #4] 8001a84: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 8001a86: 2300 movs r3, #0 8001a88: e000 b.n 8001a8c return HAL_ERROR; 8001a8a: 2301 movs r3, #1 } 8001a8c: 4618 mov r0, r3 8001a8e: 3708 adds r7, #8 8001a90: 46bd mov sp, r7 8001a92: bd80 pop {r7, pc} 8001a94: 20000000 .word 0x20000000 8001a98: 20000008 .word 0x20000008 8001a9c: 20000004 .word 0x20000004 08001aa0 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8001aa0: b480 push {r7} 8001aa2: af00 add r7, sp, #0 uwTick += uwTickFreq; 8001aa4: 4b05 ldr r3, [pc, #20] ; (8001abc ) 8001aa6: 781b ldrb r3, [r3, #0] 8001aa8: 461a mov r2, r3 8001aaa: 4b05 ldr r3, [pc, #20] ; (8001ac0 ) 8001aac: 681b ldr r3, [r3, #0] 8001aae: 4413 add r3, r2 8001ab0: 4a03 ldr r2, [pc, #12] ; (8001ac0 ) 8001ab2: 6013 str r3, [r2, #0] } 8001ab4: bf00 nop 8001ab6: 46bd mov sp, r7 8001ab8: bc80 pop {r7} 8001aba: 4770 bx lr 8001abc: 20000008 .word 0x20000008 8001ac0: 200002fc .word 0x200002fc 08001ac4 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8001ac4: b480 push {r7} 8001ac6: af00 add r7, sp, #0 return uwTick; 8001ac8: 4b02 ldr r3, [pc, #8] ; (8001ad4 ) 8001aca: 681b ldr r3, [r3, #0] } 8001acc: 4618 mov r0, r3 8001ace: 46bd mov sp, r7 8001ad0: bc80 pop {r7} 8001ad2: 4770 bx lr 8001ad4: 200002fc .word 0x200002fc 08001ad8 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 8001ad8: b580 push {r7, lr} 8001ada: b084 sub sp, #16 8001adc: af00 add r7, sp, #0 8001ade: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 8001ae0: f7ff fff0 bl 8001ac4 8001ae4: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 8001ae6: 687b ldr r3, [r7, #4] 8001ae8: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 8001aea: 68fb ldr r3, [r7, #12] 8001aec: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8001af0: d005 beq.n 8001afe { wait += (uint32_t)(uwTickFreq); 8001af2: 4b0a ldr r3, [pc, #40] ; (8001b1c ) 8001af4: 781b ldrb r3, [r3, #0] 8001af6: 461a mov r2, r3 8001af8: 68fb ldr r3, [r7, #12] 8001afa: 4413 add r3, r2 8001afc: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 8001afe: bf00 nop 8001b00: f7ff ffe0 bl 8001ac4 8001b04: 4602 mov r2, r0 8001b06: 68bb ldr r3, [r7, #8] 8001b08: 1ad3 subs r3, r2, r3 8001b0a: 68fa ldr r2, [r7, #12] 8001b0c: 429a cmp r2, r3 8001b0e: d8f7 bhi.n 8001b00 { } } 8001b10: bf00 nop 8001b12: bf00 nop 8001b14: 3710 adds r7, #16 8001b16: 46bd mov sp, r7 8001b18: bd80 pop {r7, pc} 8001b1a: bf00 nop 8001b1c: 20000008 .word 0x20000008 08001b20 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8001b20: b480 push {r7} 8001b22: b085 sub sp, #20 8001b24: af00 add r7, sp, #0 8001b26: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8001b28: 687b ldr r3, [r7, #4] 8001b2a: f003 0307 and.w r3, r3, #7 8001b2e: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 8001b30: 4b0c ldr r3, [pc, #48] ; (8001b64 <__NVIC_SetPriorityGrouping+0x44>) 8001b32: 68db ldr r3, [r3, #12] 8001b34: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8001b36: 68ba ldr r2, [r7, #8] 8001b38: f64f 03ff movw r3, #63743 ; 0xf8ff 8001b3c: 4013 ands r3, r2 8001b3e: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 8001b40: 68fb ldr r3, [r7, #12] 8001b42: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8001b44: 68bb ldr r3, [r7, #8] 8001b46: 4313 orrs r3, r2 reg_value = (reg_value | 8001b48: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 8001b4c: f443 3300 orr.w r3, r3, #131072 ; 0x20000 8001b50: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 8001b52: 4a04 ldr r2, [pc, #16] ; (8001b64 <__NVIC_SetPriorityGrouping+0x44>) 8001b54: 68bb ldr r3, [r7, #8] 8001b56: 60d3 str r3, [r2, #12] } 8001b58: bf00 nop 8001b5a: 3714 adds r7, #20 8001b5c: 46bd mov sp, r7 8001b5e: bc80 pop {r7} 8001b60: 4770 bx lr 8001b62: bf00 nop 8001b64: e000ed00 .word 0xe000ed00 08001b68 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 8001b68: b480 push {r7} 8001b6a: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8001b6c: 4b04 ldr r3, [pc, #16] ; (8001b80 <__NVIC_GetPriorityGrouping+0x18>) 8001b6e: 68db ldr r3, [r3, #12] 8001b70: 0a1b lsrs r3, r3, #8 8001b72: f003 0307 and.w r3, r3, #7 } 8001b76: 4618 mov r0, r3 8001b78: 46bd mov sp, r7 8001b7a: bc80 pop {r7} 8001b7c: 4770 bx lr 8001b7e: bf00 nop 8001b80: e000ed00 .word 0xe000ed00 08001b84 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 8001b84: b480 push {r7} 8001b86: b083 sub sp, #12 8001b88: af00 add r7, sp, #0 8001b8a: 4603 mov r3, r0 8001b8c: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001b8e: f997 3007 ldrsb.w r3, [r7, #7] 8001b92: 2b00 cmp r3, #0 8001b94: db0b blt.n 8001bae <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8001b96: 79fb ldrb r3, [r7, #7] 8001b98: f003 021f and.w r2, r3, #31 8001b9c: 4906 ldr r1, [pc, #24] ; (8001bb8 <__NVIC_EnableIRQ+0x34>) 8001b9e: f997 3007 ldrsb.w r3, [r7, #7] 8001ba2: 095b lsrs r3, r3, #5 8001ba4: 2001 movs r0, #1 8001ba6: fa00 f202 lsl.w r2, r0, r2 8001baa: f841 2023 str.w r2, [r1, r3, lsl #2] } } 8001bae: bf00 nop 8001bb0: 370c adds r7, #12 8001bb2: 46bd mov sp, r7 8001bb4: bc80 pop {r7} 8001bb6: 4770 bx lr 8001bb8: e000e100 .word 0xe000e100 08001bbc <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 8001bbc: b480 push {r7} 8001bbe: b083 sub sp, #12 8001bc0: af00 add r7, sp, #0 8001bc2: 4603 mov r3, r0 8001bc4: 6039 str r1, [r7, #0] 8001bc6: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001bc8: f997 3007 ldrsb.w r3, [r7, #7] 8001bcc: 2b00 cmp r3, #0 8001bce: db0a blt.n 8001be6 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8001bd0: 683b ldr r3, [r7, #0] 8001bd2: b2da uxtb r2, r3 8001bd4: 490c ldr r1, [pc, #48] ; (8001c08 <__NVIC_SetPriority+0x4c>) 8001bd6: f997 3007 ldrsb.w r3, [r7, #7] 8001bda: 0112 lsls r2, r2, #4 8001bdc: b2d2 uxtb r2, r2 8001bde: 440b add r3, r1 8001be0: f883 2300 strb.w r2, [r3, #768] ; 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 8001be4: e00a b.n 8001bfc <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8001be6: 683b ldr r3, [r7, #0] 8001be8: b2da uxtb r2, r3 8001bea: 4908 ldr r1, [pc, #32] ; (8001c0c <__NVIC_SetPriority+0x50>) 8001bec: 79fb ldrb r3, [r7, #7] 8001bee: f003 030f and.w r3, r3, #15 8001bf2: 3b04 subs r3, #4 8001bf4: 0112 lsls r2, r2, #4 8001bf6: b2d2 uxtb r2, r2 8001bf8: 440b add r3, r1 8001bfa: 761a strb r2, [r3, #24] } 8001bfc: bf00 nop 8001bfe: 370c adds r7, #12 8001c00: 46bd mov sp, r7 8001c02: bc80 pop {r7} 8001c04: 4770 bx lr 8001c06: bf00 nop 8001c08: e000e100 .word 0xe000e100 8001c0c: e000ed00 .word 0xe000ed00 08001c10 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 8001c10: b480 push {r7} 8001c12: b089 sub sp, #36 ; 0x24 8001c14: af00 add r7, sp, #0 8001c16: 60f8 str r0, [r7, #12] 8001c18: 60b9 str r1, [r7, #8] 8001c1a: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8001c1c: 68fb ldr r3, [r7, #12] 8001c1e: f003 0307 and.w r3, r3, #7 8001c22: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8001c24: 69fb ldr r3, [r7, #28] 8001c26: f1c3 0307 rsb r3, r3, #7 8001c2a: 2b04 cmp r3, #4 8001c2c: bf28 it cs 8001c2e: 2304 movcs r3, #4 8001c30: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8001c32: 69fb ldr r3, [r7, #28] 8001c34: 3304 adds r3, #4 8001c36: 2b06 cmp r3, #6 8001c38: d902 bls.n 8001c40 8001c3a: 69fb ldr r3, [r7, #28] 8001c3c: 3b03 subs r3, #3 8001c3e: e000 b.n 8001c42 8001c40: 2300 movs r3, #0 8001c42: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8001c44: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 8001c48: 69bb ldr r3, [r7, #24] 8001c4a: fa02 f303 lsl.w r3, r2, r3 8001c4e: 43da mvns r2, r3 8001c50: 68bb ldr r3, [r7, #8] 8001c52: 401a ands r2, r3 8001c54: 697b ldr r3, [r7, #20] 8001c56: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8001c58: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff 8001c5c: 697b ldr r3, [r7, #20] 8001c5e: fa01 f303 lsl.w r3, r1, r3 8001c62: 43d9 mvns r1, r3 8001c64: 687b ldr r3, [r7, #4] 8001c66: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8001c68: 4313 orrs r3, r2 ); } 8001c6a: 4618 mov r0, r3 8001c6c: 3724 adds r7, #36 ; 0x24 8001c6e: 46bd mov sp, r7 8001c70: bc80 pop {r7} 8001c72: 4770 bx lr 08001c74 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8001c74: b580 push {r7, lr} 8001c76: b082 sub sp, #8 8001c78: af00 add r7, sp, #0 8001c7a: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8001c7c: 687b ldr r3, [r7, #4] 8001c7e: 3b01 subs r3, #1 8001c80: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 8001c84: d301 bcc.n 8001c8a { return (1UL); /* Reload value impossible */ 8001c86: 2301 movs r3, #1 8001c88: e00f b.n 8001caa } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8001c8a: 4a0a ldr r2, [pc, #40] ; (8001cb4 ) 8001c8c: 687b ldr r3, [r7, #4] 8001c8e: 3b01 subs r3, #1 8001c90: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8001c92: 210f movs r1, #15 8001c94: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8001c98: f7ff ff90 bl 8001bbc <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8001c9c: 4b05 ldr r3, [pc, #20] ; (8001cb4 ) 8001c9e: 2200 movs r2, #0 8001ca0: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8001ca2: 4b04 ldr r3, [pc, #16] ; (8001cb4 ) 8001ca4: 2207 movs r2, #7 8001ca6: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8001ca8: 2300 movs r3, #0 } 8001caa: 4618 mov r0, r3 8001cac: 3708 adds r7, #8 8001cae: 46bd mov sp, r7 8001cb0: bd80 pop {r7, pc} 8001cb2: bf00 nop 8001cb4: e000e010 .word 0xe000e010 08001cb8 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8001cb8: b580 push {r7, lr} 8001cba: b082 sub sp, #8 8001cbc: af00 add r7, sp, #0 8001cbe: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8001cc0: 6878 ldr r0, [r7, #4] 8001cc2: f7ff ff2d bl 8001b20 <__NVIC_SetPriorityGrouping> } 8001cc6: bf00 nop 8001cc8: 3708 adds r7, #8 8001cca: 46bd mov sp, r7 8001ccc: bd80 pop {r7, pc} 08001cce : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8001cce: b580 push {r7, lr} 8001cd0: b086 sub sp, #24 8001cd2: af00 add r7, sp, #0 8001cd4: 4603 mov r3, r0 8001cd6: 60b9 str r1, [r7, #8] 8001cd8: 607a str r2, [r7, #4] 8001cda: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8001cdc: 2300 movs r3, #0 8001cde: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8001ce0: f7ff ff42 bl 8001b68 <__NVIC_GetPriorityGrouping> 8001ce4: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8001ce6: 687a ldr r2, [r7, #4] 8001ce8: 68b9 ldr r1, [r7, #8] 8001cea: 6978 ldr r0, [r7, #20] 8001cec: f7ff ff90 bl 8001c10 8001cf0: 4602 mov r2, r0 8001cf2: f997 300f ldrsb.w r3, [r7, #15] 8001cf6: 4611 mov r1, r2 8001cf8: 4618 mov r0, r3 8001cfa: f7ff ff5f bl 8001bbc <__NVIC_SetPriority> } 8001cfe: bf00 nop 8001d00: 3718 adds r7, #24 8001d02: 46bd mov sp, r7 8001d04: bd80 pop {r7, pc} 08001d06 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 8001d06: b580 push {r7, lr} 8001d08: b082 sub sp, #8 8001d0a: af00 add r7, sp, #0 8001d0c: 4603 mov r3, r0 8001d0e: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 8001d10: f997 3007 ldrsb.w r3, [r7, #7] 8001d14: 4618 mov r0, r3 8001d16: f7ff ff35 bl 8001b84 <__NVIC_EnableIRQ> } 8001d1a: bf00 nop 8001d1c: 3708 adds r7, #8 8001d1e: 46bd mov sp, r7 8001d20: bd80 pop {r7, pc} 08001d22 : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 8001d22: b580 push {r7, lr} 8001d24: b082 sub sp, #8 8001d26: af00 add r7, sp, #0 8001d28: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 8001d2a: 6878 ldr r0, [r7, #4] 8001d2c: f7ff ffa2 bl 8001c74 8001d30: 4603 mov r3, r0 } 8001d32: 4618 mov r0, r3 8001d34: 3708 adds r7, #8 8001d36: 46bd mov sp, r7 8001d38: bd80 pop {r7, pc} ... 08001d3c : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8001d3c: b480 push {r7} 8001d3e: b08b sub sp, #44 ; 0x2c 8001d40: af00 add r7, sp, #0 8001d42: 6078 str r0, [r7, #4] 8001d44: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 8001d46: 2300 movs r3, #0 8001d48: 627b str r3, [r7, #36] ; 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 8001d4a: 2300 movs r3, #0 8001d4c: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 8001d4e: e179 b.n 8002044 { /* Get the IO position */ ioposition = (0x01uL << position); 8001d50: 2201 movs r2, #1 8001d52: 6a7b ldr r3, [r7, #36] ; 0x24 8001d54: fa02 f303 lsl.w r3, r2, r3 8001d58: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8001d5a: 683b ldr r3, [r7, #0] 8001d5c: 681b ldr r3, [r3, #0] 8001d5e: 69fa ldr r2, [r7, #28] 8001d60: 4013 ands r3, r2 8001d62: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 8001d64: 69ba ldr r2, [r7, #24] 8001d66: 69fb ldr r3, [r7, #28] 8001d68: 429a cmp r2, r3 8001d6a: f040 8168 bne.w 800203e { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 8001d6e: 683b ldr r3, [r7, #0] 8001d70: 685b ldr r3, [r3, #4] 8001d72: 4aa0 ldr r2, [pc, #640] ; (8001ff4 ) 8001d74: 4293 cmp r3, r2 8001d76: d05e beq.n 8001e36 8001d78: 4a9e ldr r2, [pc, #632] ; (8001ff4 ) 8001d7a: 4293 cmp r3, r2 8001d7c: d875 bhi.n 8001e6a 8001d7e: 4a9e ldr r2, [pc, #632] ; (8001ff8 ) 8001d80: 4293 cmp r3, r2 8001d82: d058 beq.n 8001e36 8001d84: 4a9c ldr r2, [pc, #624] ; (8001ff8 ) 8001d86: 4293 cmp r3, r2 8001d88: d86f bhi.n 8001e6a 8001d8a: 4a9c ldr r2, [pc, #624] ; (8001ffc ) 8001d8c: 4293 cmp r3, r2 8001d8e: d052 beq.n 8001e36 8001d90: 4a9a ldr r2, [pc, #616] ; (8001ffc ) 8001d92: 4293 cmp r3, r2 8001d94: d869 bhi.n 8001e6a 8001d96: 4a9a ldr r2, [pc, #616] ; (8002000 ) 8001d98: 4293 cmp r3, r2 8001d9a: d04c beq.n 8001e36 8001d9c: 4a98 ldr r2, [pc, #608] ; (8002000 ) 8001d9e: 4293 cmp r3, r2 8001da0: d863 bhi.n 8001e6a 8001da2: 4a98 ldr r2, [pc, #608] ; (8002004 ) 8001da4: 4293 cmp r3, r2 8001da6: d046 beq.n 8001e36 8001da8: 4a96 ldr r2, [pc, #600] ; (8002004 ) 8001daa: 4293 cmp r3, r2 8001dac: d85d bhi.n 8001e6a 8001dae: 2b12 cmp r3, #18 8001db0: d82a bhi.n 8001e08 8001db2: 2b12 cmp r3, #18 8001db4: d859 bhi.n 8001e6a 8001db6: a201 add r2, pc, #4 ; (adr r2, 8001dbc ) 8001db8: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8001dbc: 08001e37 .word 0x08001e37 8001dc0: 08001e11 .word 0x08001e11 8001dc4: 08001e23 .word 0x08001e23 8001dc8: 08001e65 .word 0x08001e65 8001dcc: 08001e6b .word 0x08001e6b 8001dd0: 08001e6b .word 0x08001e6b 8001dd4: 08001e6b .word 0x08001e6b 8001dd8: 08001e6b .word 0x08001e6b 8001ddc: 08001e6b .word 0x08001e6b 8001de0: 08001e6b .word 0x08001e6b 8001de4: 08001e6b .word 0x08001e6b 8001de8: 08001e6b .word 0x08001e6b 8001dec: 08001e6b .word 0x08001e6b 8001df0: 08001e6b .word 0x08001e6b 8001df4: 08001e6b .word 0x08001e6b 8001df8: 08001e6b .word 0x08001e6b 8001dfc: 08001e6b .word 0x08001e6b 8001e00: 08001e19 .word 0x08001e19 8001e04: 08001e2d .word 0x08001e2d 8001e08: 4a7f ldr r2, [pc, #508] ; (8002008 ) 8001e0a: 4293 cmp r3, r2 8001e0c: d013 beq.n 8001e36 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; 8001e0e: e02c b.n 8001e6a config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8001e10: 683b ldr r3, [r7, #0] 8001e12: 68db ldr r3, [r3, #12] 8001e14: 623b str r3, [r7, #32] break; 8001e16: e029 b.n 8001e6c config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8001e18: 683b ldr r3, [r7, #0] 8001e1a: 68db ldr r3, [r3, #12] 8001e1c: 3304 adds r3, #4 8001e1e: 623b str r3, [r7, #32] break; 8001e20: e024 b.n 8001e6c config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8001e22: 683b ldr r3, [r7, #0] 8001e24: 68db ldr r3, [r3, #12] 8001e26: 3308 adds r3, #8 8001e28: 623b str r3, [r7, #32] break; 8001e2a: e01f b.n 8001e6c config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8001e2c: 683b ldr r3, [r7, #0] 8001e2e: 68db ldr r3, [r3, #12] 8001e30: 330c adds r3, #12 8001e32: 623b str r3, [r7, #32] break; 8001e34: e01a b.n 8001e6c if (GPIO_Init->Pull == GPIO_NOPULL) 8001e36: 683b ldr r3, [r7, #0] 8001e38: 689b ldr r3, [r3, #8] 8001e3a: 2b00 cmp r3, #0 8001e3c: d102 bne.n 8001e44 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8001e3e: 2304 movs r3, #4 8001e40: 623b str r3, [r7, #32] break; 8001e42: e013 b.n 8001e6c else if (GPIO_Init->Pull == GPIO_PULLUP) 8001e44: 683b ldr r3, [r7, #0] 8001e46: 689b ldr r3, [r3, #8] 8001e48: 2b01 cmp r3, #1 8001e4a: d105 bne.n 8001e58 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8001e4c: 2308 movs r3, #8 8001e4e: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; 8001e50: 687b ldr r3, [r7, #4] 8001e52: 69fa ldr r2, [r7, #28] 8001e54: 611a str r2, [r3, #16] break; 8001e56: e009 b.n 8001e6c config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8001e58: 2308 movs r3, #8 8001e5a: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; 8001e5c: 687b ldr r3, [r7, #4] 8001e5e: 69fa ldr r2, [r7, #28] 8001e60: 615a str r2, [r3, #20] break; 8001e62: e003 b.n 8001e6c config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8001e64: 2300 movs r3, #0 8001e66: 623b str r3, [r7, #32] break; 8001e68: e000 b.n 8001e6c break; 8001e6a: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8001e6c: 69bb ldr r3, [r7, #24] 8001e6e: 2bff cmp r3, #255 ; 0xff 8001e70: d801 bhi.n 8001e76 8001e72: 687b ldr r3, [r7, #4] 8001e74: e001 b.n 8001e7a 8001e76: 687b ldr r3, [r7, #4] 8001e78: 3304 adds r3, #4 8001e7a: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); 8001e7c: 69bb ldr r3, [r7, #24] 8001e7e: 2bff cmp r3, #255 ; 0xff 8001e80: d802 bhi.n 8001e88 8001e82: 6a7b ldr r3, [r7, #36] ; 0x24 8001e84: 009b lsls r3, r3, #2 8001e86: e002 b.n 8001e8e 8001e88: 6a7b ldr r3, [r7, #36] ; 0x24 8001e8a: 3b08 subs r3, #8 8001e8c: 009b lsls r3, r3, #2 8001e8e: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8001e90: 697b ldr r3, [r7, #20] 8001e92: 681a ldr r2, [r3, #0] 8001e94: 210f movs r1, #15 8001e96: 693b ldr r3, [r7, #16] 8001e98: fa01 f303 lsl.w r3, r1, r3 8001e9c: 43db mvns r3, r3 8001e9e: 401a ands r2, r3 8001ea0: 6a39 ldr r1, [r7, #32] 8001ea2: 693b ldr r3, [r7, #16] 8001ea4: fa01 f303 lsl.w r3, r1, r3 8001ea8: 431a orrs r2, r3 8001eaa: 697b ldr r3, [r7, #20] 8001eac: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8001eae: 683b ldr r3, [r7, #0] 8001eb0: 685b ldr r3, [r3, #4] 8001eb2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8001eb6: 2b00 cmp r3, #0 8001eb8: f000 80c1 beq.w 800203e { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8001ebc: 4b53 ldr r3, [pc, #332] ; (800200c ) 8001ebe: 699b ldr r3, [r3, #24] 8001ec0: 4a52 ldr r2, [pc, #328] ; (800200c ) 8001ec2: f043 0301 orr.w r3, r3, #1 8001ec6: 6193 str r3, [r2, #24] 8001ec8: 4b50 ldr r3, [pc, #320] ; (800200c ) 8001eca: 699b ldr r3, [r3, #24] 8001ecc: f003 0301 and.w r3, r3, #1 8001ed0: 60bb str r3, [r7, #8] 8001ed2: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; 8001ed4: 4a4e ldr r2, [pc, #312] ; (8002010 ) 8001ed6: 6a7b ldr r3, [r7, #36] ; 0x24 8001ed8: 089b lsrs r3, r3, #2 8001eda: 3302 adds r3, #2 8001edc: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8001ee0: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 8001ee2: 6a7b ldr r3, [r7, #36] ; 0x24 8001ee4: f003 0303 and.w r3, r3, #3 8001ee8: 009b lsls r3, r3, #2 8001eea: 220f movs r2, #15 8001eec: fa02 f303 lsl.w r3, r2, r3 8001ef0: 43db mvns r3, r3 8001ef2: 68fa ldr r2, [r7, #12] 8001ef4: 4013 ands r3, r2 8001ef6: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 8001ef8: 687b ldr r3, [r7, #4] 8001efa: 4a46 ldr r2, [pc, #280] ; (8002014 ) 8001efc: 4293 cmp r3, r2 8001efe: d01f beq.n 8001f40 8001f00: 687b ldr r3, [r7, #4] 8001f02: 4a45 ldr r2, [pc, #276] ; (8002018 ) 8001f04: 4293 cmp r3, r2 8001f06: d019 beq.n 8001f3c 8001f08: 687b ldr r3, [r7, #4] 8001f0a: 4a44 ldr r2, [pc, #272] ; (800201c ) 8001f0c: 4293 cmp r3, r2 8001f0e: d013 beq.n 8001f38 8001f10: 687b ldr r3, [r7, #4] 8001f12: 4a43 ldr r2, [pc, #268] ; (8002020 ) 8001f14: 4293 cmp r3, r2 8001f16: d00d beq.n 8001f34 8001f18: 687b ldr r3, [r7, #4] 8001f1a: 4a42 ldr r2, [pc, #264] ; (8002024 ) 8001f1c: 4293 cmp r3, r2 8001f1e: d007 beq.n 8001f30 8001f20: 687b ldr r3, [r7, #4] 8001f22: 4a41 ldr r2, [pc, #260] ; (8002028 ) 8001f24: 4293 cmp r3, r2 8001f26: d101 bne.n 8001f2c 8001f28: 2305 movs r3, #5 8001f2a: e00a b.n 8001f42 8001f2c: 2306 movs r3, #6 8001f2e: e008 b.n 8001f42 8001f30: 2304 movs r3, #4 8001f32: e006 b.n 8001f42 8001f34: 2303 movs r3, #3 8001f36: e004 b.n 8001f42 8001f38: 2302 movs r3, #2 8001f3a: e002 b.n 8001f42 8001f3c: 2301 movs r3, #1 8001f3e: e000 b.n 8001f42 8001f40: 2300 movs r3, #0 8001f42: 6a7a ldr r2, [r7, #36] ; 0x24 8001f44: f002 0203 and.w r2, r2, #3 8001f48: 0092 lsls r2, r2, #2 8001f4a: 4093 lsls r3, r2 8001f4c: 68fa ldr r2, [r7, #12] 8001f4e: 4313 orrs r3, r2 8001f50: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; 8001f52: 492f ldr r1, [pc, #188] ; (8002010 ) 8001f54: 6a7b ldr r3, [r7, #36] ; 0x24 8001f56: 089b lsrs r3, r3, #2 8001f58: 3302 adds r3, #2 8001f5a: 68fa ldr r2, [r7, #12] 8001f5c: f841 2023 str.w r2, [r1, r3, lsl #2] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8001f60: 683b ldr r3, [r7, #0] 8001f62: 685b ldr r3, [r3, #4] 8001f64: f403 3380 and.w r3, r3, #65536 ; 0x10000 8001f68: 2b00 cmp r3, #0 8001f6a: d006 beq.n 8001f7a { SET_BIT(EXTI->IMR, iocurrent); 8001f6c: 4b2f ldr r3, [pc, #188] ; (800202c ) 8001f6e: 681a ldr r2, [r3, #0] 8001f70: 492e ldr r1, [pc, #184] ; (800202c ) 8001f72: 69bb ldr r3, [r7, #24] 8001f74: 4313 orrs r3, r2 8001f76: 600b str r3, [r1, #0] 8001f78: e006 b.n 8001f88 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8001f7a: 4b2c ldr r3, [pc, #176] ; (800202c ) 8001f7c: 681a ldr r2, [r3, #0] 8001f7e: 69bb ldr r3, [r7, #24] 8001f80: 43db mvns r3, r3 8001f82: 492a ldr r1, [pc, #168] ; (800202c ) 8001f84: 4013 ands r3, r2 8001f86: 600b str r3, [r1, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8001f88: 683b ldr r3, [r7, #0] 8001f8a: 685b ldr r3, [r3, #4] 8001f8c: f403 3300 and.w r3, r3, #131072 ; 0x20000 8001f90: 2b00 cmp r3, #0 8001f92: d006 beq.n 8001fa2 { SET_BIT(EXTI->EMR, iocurrent); 8001f94: 4b25 ldr r3, [pc, #148] ; (800202c ) 8001f96: 685a ldr r2, [r3, #4] 8001f98: 4924 ldr r1, [pc, #144] ; (800202c ) 8001f9a: 69bb ldr r3, [r7, #24] 8001f9c: 4313 orrs r3, r2 8001f9e: 604b str r3, [r1, #4] 8001fa0: e006 b.n 8001fb0 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8001fa2: 4b22 ldr r3, [pc, #136] ; (800202c ) 8001fa4: 685a ldr r2, [r3, #4] 8001fa6: 69bb ldr r3, [r7, #24] 8001fa8: 43db mvns r3, r3 8001faa: 4920 ldr r1, [pc, #128] ; (800202c ) 8001fac: 4013 ands r3, r2 8001fae: 604b str r3, [r1, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8001fb0: 683b ldr r3, [r7, #0] 8001fb2: 685b ldr r3, [r3, #4] 8001fb4: f403 1380 and.w r3, r3, #1048576 ; 0x100000 8001fb8: 2b00 cmp r3, #0 8001fba: d006 beq.n 8001fca { SET_BIT(EXTI->RTSR, iocurrent); 8001fbc: 4b1b ldr r3, [pc, #108] ; (800202c ) 8001fbe: 689a ldr r2, [r3, #8] 8001fc0: 491a ldr r1, [pc, #104] ; (800202c ) 8001fc2: 69bb ldr r3, [r7, #24] 8001fc4: 4313 orrs r3, r2 8001fc6: 608b str r3, [r1, #8] 8001fc8: e006 b.n 8001fd8 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8001fca: 4b18 ldr r3, [pc, #96] ; (800202c ) 8001fcc: 689a ldr r2, [r3, #8] 8001fce: 69bb ldr r3, [r7, #24] 8001fd0: 43db mvns r3, r3 8001fd2: 4916 ldr r1, [pc, #88] ; (800202c ) 8001fd4: 4013 ands r3, r2 8001fd6: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8001fd8: 683b ldr r3, [r7, #0] 8001fda: 685b ldr r3, [r3, #4] 8001fdc: f403 1300 and.w r3, r3, #2097152 ; 0x200000 8001fe0: 2b00 cmp r3, #0 8001fe2: d025 beq.n 8002030 { SET_BIT(EXTI->FTSR, iocurrent); 8001fe4: 4b11 ldr r3, [pc, #68] ; (800202c ) 8001fe6: 68da ldr r2, [r3, #12] 8001fe8: 4910 ldr r1, [pc, #64] ; (800202c ) 8001fea: 69bb ldr r3, [r7, #24] 8001fec: 4313 orrs r3, r2 8001fee: 60cb str r3, [r1, #12] 8001ff0: e025 b.n 800203e 8001ff2: bf00 nop 8001ff4: 10320000 .word 0x10320000 8001ff8: 10310000 .word 0x10310000 8001ffc: 10220000 .word 0x10220000 8002000: 10210000 .word 0x10210000 8002004: 10120000 .word 0x10120000 8002008: 10110000 .word 0x10110000 800200c: 40021000 .word 0x40021000 8002010: 40010000 .word 0x40010000 8002014: 40010800 .word 0x40010800 8002018: 40010c00 .word 0x40010c00 800201c: 40011000 .word 0x40011000 8002020: 40011400 .word 0x40011400 8002024: 40011800 .word 0x40011800 8002028: 40011c00 .word 0x40011c00 800202c: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8002030: 4b0b ldr r3, [pc, #44] ; (8002060 ) 8002032: 68da ldr r2, [r3, #12] 8002034: 69bb ldr r3, [r7, #24] 8002036: 43db mvns r3, r3 8002038: 4909 ldr r1, [pc, #36] ; (8002060 ) 800203a: 4013 ands r3, r2 800203c: 60cb str r3, [r1, #12] } } } position++; 800203e: 6a7b ldr r3, [r7, #36] ; 0x24 8002040: 3301 adds r3, #1 8002042: 627b str r3, [r7, #36] ; 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) 8002044: 683b ldr r3, [r7, #0] 8002046: 681a ldr r2, [r3, #0] 8002048: 6a7b ldr r3, [r7, #36] ; 0x24 800204a: fa22 f303 lsr.w r3, r2, r3 800204e: 2b00 cmp r3, #0 8002050: f47f ae7e bne.w 8001d50 } } 8002054: bf00 nop 8002056: bf00 nop 8002058: 372c adds r7, #44 ; 0x2c 800205a: 46bd mov sp, r7 800205c: bc80 pop {r7} 800205e: 4770 bx lr 8002060: 40010400 .word 0x40010400 08002064 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 8002064: b480 push {r7} 8002066: b085 sub sp, #20 8002068: af00 add r7, sp, #0 800206a: 6078 str r0, [r7, #4] 800206c: 460b mov r3, r1 800206e: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 8002070: 687b ldr r3, [r7, #4] 8002072: 689a ldr r2, [r3, #8] 8002074: 887b ldrh r3, [r7, #2] 8002076: 4013 ands r3, r2 8002078: 2b00 cmp r3, #0 800207a: d002 beq.n 8002082 { bitstatus = GPIO_PIN_SET; 800207c: 2301 movs r3, #1 800207e: 73fb strb r3, [r7, #15] 8002080: e001 b.n 8002086 } else { bitstatus = GPIO_PIN_RESET; 8002082: 2300 movs r3, #0 8002084: 73fb strb r3, [r7, #15] } return bitstatus; 8002086: 7bfb ldrb r3, [r7, #15] } 8002088: 4618 mov r0, r3 800208a: 3714 adds r7, #20 800208c: 46bd mov sp, r7 800208e: bc80 pop {r7} 8002090: 4770 bx lr 08002092 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 8002092: b480 push {r7} 8002094: b083 sub sp, #12 8002096: af00 add r7, sp, #0 8002098: 6078 str r0, [r7, #4] 800209a: 460b mov r3, r1 800209c: 807b strh r3, [r7, #2] 800209e: 4613 mov r3, r2 80020a0: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 80020a2: 787b ldrb r3, [r7, #1] 80020a4: 2b00 cmp r3, #0 80020a6: d003 beq.n 80020b0 { GPIOx->BSRR = GPIO_Pin; 80020a8: 887a ldrh r2, [r7, #2] 80020aa: 687b ldr r3, [r7, #4] 80020ac: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } 80020ae: e003 b.n 80020b8 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 80020b0: 887b ldrh r3, [r7, #2] 80020b2: 041a lsls r2, r3, #16 80020b4: 687b ldr r3, [r7, #4] 80020b6: 611a str r2, [r3, #16] } 80020b8: bf00 nop 80020ba: 370c adds r7, #12 80020bc: 46bd mov sp, r7 80020be: bc80 pop {r7} 80020c0: 4770 bx lr ... 080020c4 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 80020c4: b580 push {r7, lr} 80020c6: b084 sub sp, #16 80020c8: af00 add r7, sp, #0 80020ca: 6078 str r0, [r7, #4] uint32_t freqrange; uint32_t pclk1; /* Check the I2C handle allocation */ if (hi2c == NULL) 80020cc: 687b ldr r3, [r7, #4] 80020ce: 2b00 cmp r3, #0 80020d0: d101 bne.n 80020d6 { return HAL_ERROR; 80020d2: 2301 movs r3, #1 80020d4: e12b b.n 800232e assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) 80020d6: 687b ldr r3, [r7, #4] 80020d8: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 80020dc: b2db uxtb r3, r3 80020de: 2b00 cmp r3, #0 80020e0: d106 bne.n 80020f0 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 80020e2: 687b ldr r3, [r7, #4] 80020e4: 2200 movs r2, #0 80020e6: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); 80020ea: 6878 ldr r0, [r7, #4] 80020ec: f7ff fab0 bl 8001650 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; 80020f0: 687b ldr r3, [r7, #4] 80020f2: 2224 movs r2, #36 ; 0x24 80020f4: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 80020f8: 687b ldr r3, [r7, #4] 80020fa: 681b ldr r3, [r3, #0] 80020fc: 681a ldr r2, [r3, #0] 80020fe: 687b ldr r3, [r7, #4] 8002100: 681b ldr r3, [r3, #0] 8002102: f022 0201 bic.w r2, r2, #1 8002106: 601a str r2, [r3, #0] /*Reset I2C*/ hi2c->Instance->CR1 |= I2C_CR1_SWRST; 8002108: 687b ldr r3, [r7, #4] 800210a: 681b ldr r3, [r3, #0] 800210c: 681a ldr r2, [r3, #0] 800210e: 687b ldr r3, [r7, #4] 8002110: 681b ldr r3, [r3, #0] 8002112: f442 4200 orr.w r2, r2, #32768 ; 0x8000 8002116: 601a str r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_SWRST; 8002118: 687b ldr r3, [r7, #4] 800211a: 681b ldr r3, [r3, #0] 800211c: 681a ldr r2, [r3, #0] 800211e: 687b ldr r3, [r7, #4] 8002120: 681b ldr r3, [r3, #0] 8002122: f422 4200 bic.w r2, r2, #32768 ; 0x8000 8002126: 601a str r2, [r3, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); 8002128: f001 fba0 bl 800386c 800212c: 60f8 str r0, [r7, #12] /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 800212e: 687b ldr r3, [r7, #4] 8002130: 685b ldr r3, [r3, #4] 8002132: 4a81 ldr r2, [pc, #516] ; (8002338 ) 8002134: 4293 cmp r3, r2 8002136: d807 bhi.n 8002148 8002138: 68fb ldr r3, [r7, #12] 800213a: 4a80 ldr r2, [pc, #512] ; (800233c ) 800213c: 4293 cmp r3, r2 800213e: bf94 ite ls 8002140: 2301 movls r3, #1 8002142: 2300 movhi r3, #0 8002144: b2db uxtb r3, r3 8002146: e006 b.n 8002156 8002148: 68fb ldr r3, [r7, #12] 800214a: 4a7d ldr r2, [pc, #500] ; (8002340 ) 800214c: 4293 cmp r3, r2 800214e: bf94 ite ls 8002150: 2301 movls r3, #1 8002152: 2300 movhi r3, #0 8002154: b2db uxtb r3, r3 8002156: 2b00 cmp r3, #0 8002158: d001 beq.n 800215e { return HAL_ERROR; 800215a: 2301 movs r3, #1 800215c: e0e7 b.n 800232e } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); 800215e: 68fb ldr r3, [r7, #12] 8002160: 4a78 ldr r2, [pc, #480] ; (8002344 ) 8002162: fba2 2303 umull r2, r3, r2, r3 8002166: 0c9b lsrs r3, r3, #18 8002168: 60bb str r3, [r7, #8] /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange); 800216a: 687b ldr r3, [r7, #4] 800216c: 681b ldr r3, [r3, #0] 800216e: 685b ldr r3, [r3, #4] 8002170: f023 013f bic.w r1, r3, #63 ; 0x3f 8002174: 687b ldr r3, [r7, #4] 8002176: 681b ldr r3, [r3, #0] 8002178: 68ba ldr r2, [r7, #8] 800217a: 430a orrs r2, r1 800217c: 605a str r2, [r3, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed)); 800217e: 687b ldr r3, [r7, #4] 8002180: 681b ldr r3, [r3, #0] 8002182: 6a1b ldr r3, [r3, #32] 8002184: f023 013f bic.w r1, r3, #63 ; 0x3f 8002188: 687b ldr r3, [r7, #4] 800218a: 685b ldr r3, [r3, #4] 800218c: 4a6a ldr r2, [pc, #424] ; (8002338 ) 800218e: 4293 cmp r3, r2 8002190: d802 bhi.n 8002198 8002192: 68bb ldr r3, [r7, #8] 8002194: 3301 adds r3, #1 8002196: e009 b.n 80021ac 8002198: 68bb ldr r3, [r7, #8] 800219a: f44f 7296 mov.w r2, #300 ; 0x12c 800219e: fb02 f303 mul.w r3, r2, r3 80021a2: 4a69 ldr r2, [pc, #420] ; (8002348 ) 80021a4: fba2 2303 umull r2, r3, r2, r3 80021a8: 099b lsrs r3, r3, #6 80021aa: 3301 adds r3, #1 80021ac: 687a ldr r2, [r7, #4] 80021ae: 6812 ldr r2, [r2, #0] 80021b0: 430b orrs r3, r1 80021b2: 6213 str r3, [r2, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle)); 80021b4: 687b ldr r3, [r7, #4] 80021b6: 681b ldr r3, [r3, #0] 80021b8: 69db ldr r3, [r3, #28] 80021ba: f423 424f bic.w r2, r3, #52992 ; 0xcf00 80021be: f022 02ff bic.w r2, r2, #255 ; 0xff 80021c2: 687b ldr r3, [r7, #4] 80021c4: 685b ldr r3, [r3, #4] 80021c6: 495c ldr r1, [pc, #368] ; (8002338 ) 80021c8: 428b cmp r3, r1 80021ca: d819 bhi.n 8002200 80021cc: 68fb ldr r3, [r7, #12] 80021ce: 1e59 subs r1, r3, #1 80021d0: 687b ldr r3, [r7, #4] 80021d2: 685b ldr r3, [r3, #4] 80021d4: 005b lsls r3, r3, #1 80021d6: fbb1 f3f3 udiv r3, r1, r3 80021da: 1c59 adds r1, r3, #1 80021dc: f640 73fc movw r3, #4092 ; 0xffc 80021e0: 400b ands r3, r1 80021e2: 2b00 cmp r3, #0 80021e4: d00a beq.n 80021fc 80021e6: 68fb ldr r3, [r7, #12] 80021e8: 1e59 subs r1, r3, #1 80021ea: 687b ldr r3, [r7, #4] 80021ec: 685b ldr r3, [r3, #4] 80021ee: 005b lsls r3, r3, #1 80021f0: fbb1 f3f3 udiv r3, r1, r3 80021f4: 3301 adds r3, #1 80021f6: f3c3 030b ubfx r3, r3, #0, #12 80021fa: e051 b.n 80022a0 80021fc: 2304 movs r3, #4 80021fe: e04f b.n 80022a0 8002200: 687b ldr r3, [r7, #4] 8002202: 689b ldr r3, [r3, #8] 8002204: 2b00 cmp r3, #0 8002206: d111 bne.n 800222c 8002208: 68fb ldr r3, [r7, #12] 800220a: 1e58 subs r0, r3, #1 800220c: 687b ldr r3, [r7, #4] 800220e: 6859 ldr r1, [r3, #4] 8002210: 460b mov r3, r1 8002212: 005b lsls r3, r3, #1 8002214: 440b add r3, r1 8002216: fbb0 f3f3 udiv r3, r0, r3 800221a: 3301 adds r3, #1 800221c: f3c3 030b ubfx r3, r3, #0, #12 8002220: 2b00 cmp r3, #0 8002222: bf0c ite eq 8002224: 2301 moveq r3, #1 8002226: 2300 movne r3, #0 8002228: b2db uxtb r3, r3 800222a: e012 b.n 8002252 800222c: 68fb ldr r3, [r7, #12] 800222e: 1e58 subs r0, r3, #1 8002230: 687b ldr r3, [r7, #4] 8002232: 6859 ldr r1, [r3, #4] 8002234: 460b mov r3, r1 8002236: 009b lsls r3, r3, #2 8002238: 440b add r3, r1 800223a: 0099 lsls r1, r3, #2 800223c: 440b add r3, r1 800223e: fbb0 f3f3 udiv r3, r0, r3 8002242: 3301 adds r3, #1 8002244: f3c3 030b ubfx r3, r3, #0, #12 8002248: 2b00 cmp r3, #0 800224a: bf0c ite eq 800224c: 2301 moveq r3, #1 800224e: 2300 movne r3, #0 8002250: b2db uxtb r3, r3 8002252: 2b00 cmp r3, #0 8002254: d001 beq.n 800225a 8002256: 2301 movs r3, #1 8002258: e022 b.n 80022a0 800225a: 687b ldr r3, [r7, #4] 800225c: 689b ldr r3, [r3, #8] 800225e: 2b00 cmp r3, #0 8002260: d10e bne.n 8002280 8002262: 68fb ldr r3, [r7, #12] 8002264: 1e58 subs r0, r3, #1 8002266: 687b ldr r3, [r7, #4] 8002268: 6859 ldr r1, [r3, #4] 800226a: 460b mov r3, r1 800226c: 005b lsls r3, r3, #1 800226e: 440b add r3, r1 8002270: fbb0 f3f3 udiv r3, r0, r3 8002274: 3301 adds r3, #1 8002276: f3c3 030b ubfx r3, r3, #0, #12 800227a: f443 4300 orr.w r3, r3, #32768 ; 0x8000 800227e: e00f b.n 80022a0 8002280: 68fb ldr r3, [r7, #12] 8002282: 1e58 subs r0, r3, #1 8002284: 687b ldr r3, [r7, #4] 8002286: 6859 ldr r1, [r3, #4] 8002288: 460b mov r3, r1 800228a: 009b lsls r3, r3, #2 800228c: 440b add r3, r1 800228e: 0099 lsls r1, r3, #2 8002290: 440b add r3, r1 8002292: fbb0 f3f3 udiv r3, r0, r3 8002296: 3301 adds r3, #1 8002298: f3c3 030b ubfx r3, r3, #0, #12 800229c: f443 4340 orr.w r3, r3, #49152 ; 0xc000 80022a0: 6879 ldr r1, [r7, #4] 80022a2: 6809 ldr r1, [r1, #0] 80022a4: 4313 orrs r3, r2 80022a6: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode)); 80022a8: 687b ldr r3, [r7, #4] 80022aa: 681b ldr r3, [r3, #0] 80022ac: 681b ldr r3, [r3, #0] 80022ae: f023 01c0 bic.w r1, r3, #192 ; 0xc0 80022b2: 687b ldr r3, [r7, #4] 80022b4: 69da ldr r2, [r3, #28] 80022b6: 687b ldr r3, [r7, #4] 80022b8: 6a1b ldr r3, [r3, #32] 80022ba: 431a orrs r2, r3 80022bc: 687b ldr r3, [r7, #4] 80022be: 681b ldr r3, [r3, #0] 80022c0: 430a orrs r2, r1 80022c2: 601a str r2, [r3, #0] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Configure I2Cx: Own Address1 and addressing mode */ MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1)); 80022c4: 687b ldr r3, [r7, #4] 80022c6: 681b ldr r3, [r3, #0] 80022c8: 689b ldr r3, [r3, #8] 80022ca: f423 4303 bic.w r3, r3, #33536 ; 0x8300 80022ce: f023 03ff bic.w r3, r3, #255 ; 0xff 80022d2: 687a ldr r2, [r7, #4] 80022d4: 6911 ldr r1, [r2, #16] 80022d6: 687a ldr r2, [r7, #4] 80022d8: 68d2 ldr r2, [r2, #12] 80022da: 4311 orrs r1, r2 80022dc: 687a ldr r2, [r7, #4] 80022de: 6812 ldr r2, [r2, #0] 80022e0: 430b orrs r3, r1 80022e2: 6093 str r3, [r2, #8] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Configure I2Cx: Dual mode and Own Address2 */ MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2)); 80022e4: 687b ldr r3, [r7, #4] 80022e6: 681b ldr r3, [r3, #0] 80022e8: 68db ldr r3, [r3, #12] 80022ea: f023 01ff bic.w r1, r3, #255 ; 0xff 80022ee: 687b ldr r3, [r7, #4] 80022f0: 695a ldr r2, [r3, #20] 80022f2: 687b ldr r3, [r7, #4] 80022f4: 699b ldr r3, [r3, #24] 80022f6: 431a orrs r2, r3 80022f8: 687b ldr r3, [r7, #4] 80022fa: 681b ldr r3, [r3, #0] 80022fc: 430a orrs r2, r1 80022fe: 60da str r2, [r3, #12] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 8002300: 687b ldr r3, [r7, #4] 8002302: 681b ldr r3, [r3, #0] 8002304: 681a ldr r2, [r3, #0] 8002306: 687b ldr r3, [r7, #4] 8002308: 681b ldr r3, [r3, #0] 800230a: f042 0201 orr.w r2, r2, #1 800230e: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8002310: 687b ldr r3, [r7, #4] 8002312: 2200 movs r2, #0 8002314: 641a str r2, [r3, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_READY; 8002316: 687b ldr r3, [r7, #4] 8002318: 2220 movs r2, #32 800231a: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 800231e: 687b ldr r3, [r7, #4] 8002320: 2200 movs r2, #0 8002322: 631a str r2, [r3, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8002324: 687b ldr r3, [r7, #4] 8002326: 2200 movs r2, #0 8002328: f883 203e strb.w r2, [r3, #62] ; 0x3e return HAL_OK; 800232c: 2300 movs r3, #0 } 800232e: 4618 mov r0, r3 8002330: 3710 adds r7, #16 8002332: 46bd mov sp, r7 8002334: bd80 pop {r7, pc} 8002336: bf00 nop 8002338: 000186a0 .word 0x000186a0 800233c: 001e847f .word 0x001e847f 8002340: 003d08ff .word 0x003d08ff 8002344: 431bde83 .word 0x431bde83 8002348: 10624dd3 .word 0x10624dd3 0800234c : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 800234c: b580 push {r7, lr} 800234e: b088 sub sp, #32 8002350: af02 add r7, sp, #8 8002352: 60f8 str r0, [r7, #12] 8002354: 4608 mov r0, r1 8002356: 4611 mov r1, r2 8002358: 461a mov r2, r3 800235a: 4603 mov r3, r0 800235c: 817b strh r3, [r7, #10] 800235e: 460b mov r3, r1 8002360: 813b strh r3, [r7, #8] 8002362: 4613 mov r3, r2 8002364: 80fb strh r3, [r7, #6] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); 8002366: f7ff fbad bl 8001ac4 800236a: 6178 str r0, [r7, #20] /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 800236c: 68fb ldr r3, [r7, #12] 800236e: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 8002372: b2db uxtb r3, r3 8002374: 2b20 cmp r3, #32 8002376: f040 80d9 bne.w 800252c { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 800237a: 697b ldr r3, [r7, #20] 800237c: 9300 str r3, [sp, #0] 800237e: 2319 movs r3, #25 8002380: 2201 movs r2, #1 8002382: 496d ldr r1, [pc, #436] ; (8002538 ) 8002384: 68f8 ldr r0, [r7, #12] 8002386: f000 fcc1 bl 8002d0c 800238a: 4603 mov r3, r0 800238c: 2b00 cmp r3, #0 800238e: d001 beq.n 8002394 { return HAL_BUSY; 8002390: 2302 movs r3, #2 8002392: e0cc b.n 800252e } /* Process Locked */ __HAL_LOCK(hi2c); 8002394: 68fb ldr r3, [r7, #12] 8002396: f893 303c ldrb.w r3, [r3, #60] ; 0x3c 800239a: 2b01 cmp r3, #1 800239c: d101 bne.n 80023a2 800239e: 2302 movs r3, #2 80023a0: e0c5 b.n 800252e 80023a2: 68fb ldr r3, [r7, #12] 80023a4: 2201 movs r2, #1 80023a6: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 80023aa: 68fb ldr r3, [r7, #12] 80023ac: 681b ldr r3, [r3, #0] 80023ae: 681b ldr r3, [r3, #0] 80023b0: f003 0301 and.w r3, r3, #1 80023b4: 2b01 cmp r3, #1 80023b6: d007 beq.n 80023c8 { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 80023b8: 68fb ldr r3, [r7, #12] 80023ba: 681b ldr r3, [r3, #0] 80023bc: 681a ldr r2, [r3, #0] 80023be: 68fb ldr r3, [r7, #12] 80023c0: 681b ldr r3, [r3, #0] 80023c2: f042 0201 orr.w r2, r2, #1 80023c6: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); 80023c8: 68fb ldr r3, [r7, #12] 80023ca: 681b ldr r3, [r3, #0] 80023cc: 681a ldr r2, [r3, #0] 80023ce: 68fb ldr r3, [r7, #12] 80023d0: 681b ldr r3, [r3, #0] 80023d2: f422 6200 bic.w r2, r2, #2048 ; 0x800 80023d6: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_TX; 80023d8: 68fb ldr r3, [r7, #12] 80023da: 2221 movs r2, #33 ; 0x21 80023dc: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 80023e0: 68fb ldr r3, [r7, #12] 80023e2: 2240 movs r2, #64 ; 0x40 80023e4: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 80023e8: 68fb ldr r3, [r7, #12] 80023ea: 2200 movs r2, #0 80023ec: 641a str r2, [r3, #64] ; 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; 80023ee: 68fb ldr r3, [r7, #12] 80023f0: 6a3a ldr r2, [r7, #32] 80023f2: 625a str r2, [r3, #36] ; 0x24 hi2c->XferCount = Size; 80023f4: 68fb ldr r3, [r7, #12] 80023f6: 8cba ldrh r2, [r7, #36] ; 0x24 80023f8: 855a strh r2, [r3, #42] ; 0x2a hi2c->XferSize = hi2c->XferCount; 80023fa: 68fb ldr r3, [r7, #12] 80023fc: 8d5b ldrh r3, [r3, #42] ; 0x2a 80023fe: b29a uxth r2, r3 8002400: 68fb ldr r3, [r7, #12] 8002402: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8002404: 68fb ldr r3, [r7, #12] 8002406: 4a4d ldr r2, [pc, #308] ; (800253c ) 8002408: 62da str r2, [r3, #44] ; 0x2c /* Send Slave Address and Memory Address */ if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 800240a: 88f8 ldrh r0, [r7, #6] 800240c: 893a ldrh r2, [r7, #8] 800240e: 8979 ldrh r1, [r7, #10] 8002410: 697b ldr r3, [r7, #20] 8002412: 9301 str r3, [sp, #4] 8002414: 6abb ldr r3, [r7, #40] ; 0x28 8002416: 9300 str r3, [sp, #0] 8002418: 4603 mov r3, r0 800241a: 68f8 ldr r0, [r7, #12] 800241c: f000 faf8 bl 8002a10 8002420: 4603 mov r3, r0 8002422: 2b00 cmp r3, #0 8002424: d052 beq.n 80024cc { return HAL_ERROR; 8002426: 2301 movs r3, #1 8002428: e081 b.n 800252e } while (hi2c->XferSize > 0U) { /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 800242a: 697a ldr r2, [r7, #20] 800242c: 6ab9 ldr r1, [r7, #40] ; 0x28 800242e: 68f8 ldr r0, [r7, #12] 8002430: f000 fd42 bl 8002eb8 8002434: 4603 mov r3, r0 8002436: 2b00 cmp r3, #0 8002438: d00d beq.n 8002456 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 800243a: 68fb ldr r3, [r7, #12] 800243c: 6c1b ldr r3, [r3, #64] ; 0x40 800243e: 2b04 cmp r3, #4 8002440: d107 bne.n 8002452 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002442: 68fb ldr r3, [r7, #12] 8002444: 681b ldr r3, [r3, #0] 8002446: 681a ldr r2, [r3, #0] 8002448: 68fb ldr r3, [r7, #12] 800244a: 681b ldr r3, [r3, #0] 800244c: f442 7200 orr.w r2, r2, #512 ; 0x200 8002450: 601a str r2, [r3, #0] } return HAL_ERROR; 8002452: 2301 movs r3, #1 8002454: e06b b.n 800252e } /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; 8002456: 68fb ldr r3, [r7, #12] 8002458: 6a5b ldr r3, [r3, #36] ; 0x24 800245a: 781a ldrb r2, [r3, #0] 800245c: 68fb ldr r3, [r7, #12] 800245e: 681b ldr r3, [r3, #0] 8002460: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002462: 68fb ldr r3, [r7, #12] 8002464: 6a5b ldr r3, [r3, #36] ; 0x24 8002466: 1c5a adds r2, r3, #1 8002468: 68fb ldr r3, [r7, #12] 800246a: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 800246c: 68fb ldr r3, [r7, #12] 800246e: 8d1b ldrh r3, [r3, #40] ; 0x28 8002470: 3b01 subs r3, #1 8002472: b29a uxth r2, r3 8002474: 68fb ldr r3, [r7, #12] 8002476: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002478: 68fb ldr r3, [r7, #12] 800247a: 8d5b ldrh r3, [r3, #42] ; 0x2a 800247c: b29b uxth r3, r3 800247e: 3b01 subs r3, #1 8002480: b29a uxth r2, r3 8002482: 68fb ldr r3, [r7, #12] 8002484: 855a strh r2, [r3, #42] ; 0x2a if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 8002486: 68fb ldr r3, [r7, #12] 8002488: 681b ldr r3, [r3, #0] 800248a: 695b ldr r3, [r3, #20] 800248c: f003 0304 and.w r3, r3, #4 8002490: 2b04 cmp r3, #4 8002492: d11b bne.n 80024cc 8002494: 68fb ldr r3, [r7, #12] 8002496: 8d1b ldrh r3, [r3, #40] ; 0x28 8002498: 2b00 cmp r3, #0 800249a: d017 beq.n 80024cc { /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; 800249c: 68fb ldr r3, [r7, #12] 800249e: 6a5b ldr r3, [r3, #36] ; 0x24 80024a0: 781a ldrb r2, [r3, #0] 80024a2: 68fb ldr r3, [r7, #12] 80024a4: 681b ldr r3, [r3, #0] 80024a6: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 80024a8: 68fb ldr r3, [r7, #12] 80024aa: 6a5b ldr r3, [r3, #36] ; 0x24 80024ac: 1c5a adds r2, r3, #1 80024ae: 68fb ldr r3, [r7, #12] 80024b0: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 80024b2: 68fb ldr r3, [r7, #12] 80024b4: 8d1b ldrh r3, [r3, #40] ; 0x28 80024b6: 3b01 subs r3, #1 80024b8: b29a uxth r2, r3 80024ba: 68fb ldr r3, [r7, #12] 80024bc: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 80024be: 68fb ldr r3, [r7, #12] 80024c0: 8d5b ldrh r3, [r3, #42] ; 0x2a 80024c2: b29b uxth r3, r3 80024c4: 3b01 subs r3, #1 80024c6: b29a uxth r2, r3 80024c8: 68fb ldr r3, [r7, #12] 80024ca: 855a strh r2, [r3, #42] ; 0x2a while (hi2c->XferSize > 0U) 80024cc: 68fb ldr r3, [r7, #12] 80024ce: 8d1b ldrh r3, [r3, #40] ; 0x28 80024d0: 2b00 cmp r3, #0 80024d2: d1aa bne.n 800242a } } /* Wait until BTF flag is set */ if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 80024d4: 697a ldr r2, [r7, #20] 80024d6: 6ab9 ldr r1, [r7, #40] ; 0x28 80024d8: 68f8 ldr r0, [r7, #12] 80024da: f000 fd2e bl 8002f3a 80024de: 4603 mov r3, r0 80024e0: 2b00 cmp r3, #0 80024e2: d00d beq.n 8002500 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 80024e4: 68fb ldr r3, [r7, #12] 80024e6: 6c1b ldr r3, [r3, #64] ; 0x40 80024e8: 2b04 cmp r3, #4 80024ea: d107 bne.n 80024fc { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 80024ec: 68fb ldr r3, [r7, #12] 80024ee: 681b ldr r3, [r3, #0] 80024f0: 681a ldr r2, [r3, #0] 80024f2: 68fb ldr r3, [r7, #12] 80024f4: 681b ldr r3, [r3, #0] 80024f6: f442 7200 orr.w r2, r2, #512 ; 0x200 80024fa: 601a str r2, [r3, #0] } return HAL_ERROR; 80024fc: 2301 movs r3, #1 80024fe: e016 b.n 800252e } /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002500: 68fb ldr r3, [r7, #12] 8002502: 681b ldr r3, [r3, #0] 8002504: 681a ldr r2, [r3, #0] 8002506: 68fb ldr r3, [r7, #12] 8002508: 681b ldr r3, [r3, #0] 800250a: f442 7200 orr.w r2, r2, #512 ; 0x200 800250e: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 8002510: 68fb ldr r3, [r7, #12] 8002512: 2220 movs r2, #32 8002514: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002518: 68fb ldr r3, [r7, #12] 800251a: 2200 movs r2, #0 800251c: f883 203e strb.w r2, [r3, #62] ; 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002520: 68fb ldr r3, [r7, #12] 8002522: 2200 movs r2, #0 8002524: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; 8002528: 2300 movs r3, #0 800252a: e000 b.n 800252e } else { return HAL_BUSY; 800252c: 2302 movs r3, #2 } } 800252e: 4618 mov r0, r3 8002530: 3718 adds r7, #24 8002532: 46bd mov sp, r7 8002534: bd80 pop {r7, pc} 8002536: bf00 nop 8002538: 00100002 .word 0x00100002 800253c: ffff0000 .word 0xffff0000 08002540 : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8002540: b580 push {r7, lr} 8002542: b08c sub sp, #48 ; 0x30 8002544: af02 add r7, sp, #8 8002546: 60f8 str r0, [r7, #12] 8002548: 4608 mov r0, r1 800254a: 4611 mov r1, r2 800254c: 461a mov r2, r3 800254e: 4603 mov r3, r0 8002550: 817b strh r3, [r7, #10] 8002552: 460b mov r3, r1 8002554: 813b strh r3, [r7, #8] 8002556: 4613 mov r3, r2 8002558: 80fb strh r3, [r7, #6] __IO uint32_t count = 0U; 800255a: 2300 movs r3, #0 800255c: 623b str r3, [r7, #32] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); 800255e: f7ff fab1 bl 8001ac4 8002562: 6278 str r0, [r7, #36] ; 0x24 /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 8002564: 68fb ldr r3, [r7, #12] 8002566: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 800256a: b2db uxtb r3, r3 800256c: 2b20 cmp r3, #32 800256e: f040 8244 bne.w 80029fa { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 8002572: 6a7b ldr r3, [r7, #36] ; 0x24 8002574: 9300 str r3, [sp, #0] 8002576: 2319 movs r3, #25 8002578: 2201 movs r2, #1 800257a: 4982 ldr r1, [pc, #520] ; (8002784 ) 800257c: 68f8 ldr r0, [r7, #12] 800257e: f000 fbc5 bl 8002d0c 8002582: 4603 mov r3, r0 8002584: 2b00 cmp r3, #0 8002586: d001 beq.n 800258c { return HAL_BUSY; 8002588: 2302 movs r3, #2 800258a: e237 b.n 80029fc } /* Process Locked */ __HAL_LOCK(hi2c); 800258c: 68fb ldr r3, [r7, #12] 800258e: f893 303c ldrb.w r3, [r3, #60] ; 0x3c 8002592: 2b01 cmp r3, #1 8002594: d101 bne.n 800259a 8002596: 2302 movs r3, #2 8002598: e230 b.n 80029fc 800259a: 68fb ldr r3, [r7, #12] 800259c: 2201 movs r2, #1 800259e: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 80025a2: 68fb ldr r3, [r7, #12] 80025a4: 681b ldr r3, [r3, #0] 80025a6: 681b ldr r3, [r3, #0] 80025a8: f003 0301 and.w r3, r3, #1 80025ac: 2b01 cmp r3, #1 80025ae: d007 beq.n 80025c0 { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 80025b0: 68fb ldr r3, [r7, #12] 80025b2: 681b ldr r3, [r3, #0] 80025b4: 681a ldr r2, [r3, #0] 80025b6: 68fb ldr r3, [r7, #12] 80025b8: 681b ldr r3, [r3, #0] 80025ba: f042 0201 orr.w r2, r2, #1 80025be: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); 80025c0: 68fb ldr r3, [r7, #12] 80025c2: 681b ldr r3, [r3, #0] 80025c4: 681a ldr r2, [r3, #0] 80025c6: 68fb ldr r3, [r7, #12] 80025c8: 681b ldr r3, [r3, #0] 80025ca: f422 6200 bic.w r2, r2, #2048 ; 0x800 80025ce: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_RX; 80025d0: 68fb ldr r3, [r7, #12] 80025d2: 2222 movs r2, #34 ; 0x22 80025d4: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 80025d8: 68fb ldr r3, [r7, #12] 80025da: 2240 movs r2, #64 ; 0x40 80025dc: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 80025e0: 68fb ldr r3, [r7, #12] 80025e2: 2200 movs r2, #0 80025e4: 641a str r2, [r3, #64] ; 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; 80025e6: 68fb ldr r3, [r7, #12] 80025e8: 6b3a ldr r2, [r7, #48] ; 0x30 80025ea: 625a str r2, [r3, #36] ; 0x24 hi2c->XferCount = Size; 80025ec: 68fb ldr r3, [r7, #12] 80025ee: 8eba ldrh r2, [r7, #52] ; 0x34 80025f0: 855a strh r2, [r3, #42] ; 0x2a hi2c->XferSize = hi2c->XferCount; 80025f2: 68fb ldr r3, [r7, #12] 80025f4: 8d5b ldrh r3, [r3, #42] ; 0x2a 80025f6: b29a uxth r2, r3 80025f8: 68fb ldr r3, [r7, #12] 80025fa: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 80025fc: 68fb ldr r3, [r7, #12] 80025fe: 4a62 ldr r2, [pc, #392] ; (8002788 ) 8002600: 62da str r2, [r3, #44] ; 0x2c /* Send Slave Address and Memory Address */ if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8002602: 88f8 ldrh r0, [r7, #6] 8002604: 893a ldrh r2, [r7, #8] 8002606: 8979 ldrh r1, [r7, #10] 8002608: 6a7b ldr r3, [r7, #36] ; 0x24 800260a: 9301 str r3, [sp, #4] 800260c: 6bbb ldr r3, [r7, #56] ; 0x38 800260e: 9300 str r3, [sp, #0] 8002610: 4603 mov r3, r0 8002612: 68f8 ldr r0, [r7, #12] 8002614: f000 fa92 bl 8002b3c 8002618: 4603 mov r3, r0 800261a: 2b00 cmp r3, #0 800261c: d001 beq.n 8002622 { return HAL_ERROR; 800261e: 2301 movs r3, #1 8002620: e1ec b.n 80029fc } if (hi2c->XferSize == 0U) 8002622: 68fb ldr r3, [r7, #12] 8002624: 8d1b ldrh r3, [r3, #40] ; 0x28 8002626: 2b00 cmp r3, #0 8002628: d113 bne.n 8002652 { /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 800262a: 2300 movs r3, #0 800262c: 61fb str r3, [r7, #28] 800262e: 68fb ldr r3, [r7, #12] 8002630: 681b ldr r3, [r3, #0] 8002632: 695b ldr r3, [r3, #20] 8002634: 61fb str r3, [r7, #28] 8002636: 68fb ldr r3, [r7, #12] 8002638: 681b ldr r3, [r3, #0] 800263a: 699b ldr r3, [r3, #24] 800263c: 61fb str r3, [r7, #28] 800263e: 69fb ldr r3, [r7, #28] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002640: 68fb ldr r3, [r7, #12] 8002642: 681b ldr r3, [r3, #0] 8002644: 681a ldr r2, [r3, #0] 8002646: 68fb ldr r3, [r7, #12] 8002648: 681b ldr r3, [r3, #0] 800264a: f442 7200 orr.w r2, r2, #512 ; 0x200 800264e: 601a str r2, [r3, #0] 8002650: e1c0 b.n 80029d4