m3s.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e4 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000a1d8 080001e8 080001e8 000101e8 2**3 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000f5c 0800a3c0 0800a3c0 0001a3c0 2**3 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 0800b31c 0800b31c 000201e4 2**0 CONTENTS 4 .ARM 00000000 0800b31c 0800b31c 000201e4 2**0 CONTENTS 5 .preinit_array 00000000 0800b31c 0800b31c 000201e4 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 0800b31c 0800b31c 0001b31c 2**2 CONTENTS, ALLOC, LOAD, DATA 7 .fini_array 00000004 0800b320 0800b320 0001b320 2**2 CONTENTS, ALLOC, LOAD, DATA 8 .data 000001e4 20000000 0800b324 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 00002364 200001e4 0800b508 000201e4 2**2 ALLOC 10 ._user_heap_stack 00000c00 20002548 0800b508 00022548 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 000201e4 2**0 CONTENTS, READONLY 12 .debug_info 00015b3f 00000000 00000000 0002020d 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 000036de 00000000 00000000 00035d4c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 00001398 00000000 00000000 00039430 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_ranges 00001240 00000000 00000000 0003a7c8 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 0001d58c 00000000 00000000 0003ba08 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 00017e8e 00000000 00000000 00058f94 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 000a0fd6 00000000 00000000 00070e22 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000053 00000000 00000000 00111df8 2**0 CONTENTS, READONLY 20 .debug_frame 000063cc 00000000 00000000 00111e4c 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080001e8 <__do_global_dtors_aux>: 80001e8: b510 push {r4, lr} 80001ea: 4c05 ldr r4, [pc, #20] ; (8000200 <__do_global_dtors_aux+0x18>) 80001ec: 7823 ldrb r3, [r4, #0] 80001ee: b933 cbnz r3, 80001fe <__do_global_dtors_aux+0x16> 80001f0: 4b04 ldr r3, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x1c>) 80001f2: b113 cbz r3, 80001fa <__do_global_dtors_aux+0x12> 80001f4: 4804 ldr r0, [pc, #16] ; (8000208 <__do_global_dtors_aux+0x20>) 80001f6: f3af 8000 nop.w 80001fa: 2301 movs r3, #1 80001fc: 7023 strb r3, [r4, #0] 80001fe: bd10 pop {r4, pc} 8000200: 200001e4 .word 0x200001e4 8000204: 00000000 .word 0x00000000 8000208: 0800a3a8 .word 0x0800a3a8 0800020c : 800020c: b508 push {r3, lr} 800020e: 4b03 ldr r3, [pc, #12] ; (800021c ) 8000210: b11b cbz r3, 800021a 8000212: 4903 ldr r1, [pc, #12] ; (8000220 ) 8000214: 4803 ldr r0, [pc, #12] ; (8000224 ) 8000216: f3af 8000 nop.w 800021a: bd08 pop {r3, pc} 800021c: 00000000 .word 0x00000000 8000220: 200001e8 .word 0x200001e8 8000224: 0800a3a8 .word 0x0800a3a8 08000228 : 8000228: 4603 mov r3, r0 800022a: f813 2b01 ldrb.w r2, [r3], #1 800022e: 2a00 cmp r2, #0 8000230: d1fb bne.n 800022a 8000232: 1a18 subs r0, r3, r0 8000234: 3801 subs r0, #1 8000236: 4770 bx lr 08000238 <__aeabi_drsub>: 8000238: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000 800023c: e002 b.n 8000244 <__adddf3> 800023e: bf00 nop 08000240 <__aeabi_dsub>: 8000240: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000 08000244 <__adddf3>: 8000244: b530 push {r4, r5, lr} 8000246: ea4f 0441 mov.w r4, r1, lsl #1 800024a: ea4f 0543 mov.w r5, r3, lsl #1 800024e: ea94 0f05 teq r4, r5 8000252: bf08 it eq 8000254: ea90 0f02 teqeq r0, r2 8000258: bf1f itttt ne 800025a: ea54 0c00 orrsne.w ip, r4, r0 800025e: ea55 0c02 orrsne.w ip, r5, r2 8000262: ea7f 5c64 mvnsne.w ip, r4, asr #21 8000266: ea7f 5c65 mvnsne.w ip, r5, asr #21 800026a: f000 80e2 beq.w 8000432 <__adddf3+0x1ee> 800026e: ea4f 5454 mov.w r4, r4, lsr #21 8000272: ebd4 5555 rsbs r5, r4, r5, lsr #21 8000276: bfb8 it lt 8000278: 426d neglt r5, r5 800027a: dd0c ble.n 8000296 <__adddf3+0x52> 800027c: 442c add r4, r5 800027e: ea80 0202 eor.w r2, r0, r2 8000282: ea81 0303 eor.w r3, r1, r3 8000286: ea82 0000 eor.w r0, r2, r0 800028a: ea83 0101 eor.w r1, r3, r1 800028e: ea80 0202 eor.w r2, r0, r2 8000292: ea81 0303 eor.w r3, r1, r3 8000296: 2d36 cmp r5, #54 ; 0x36 8000298: bf88 it hi 800029a: bd30 pophi {r4, r5, pc} 800029c: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 80002a0: ea4f 3101 mov.w r1, r1, lsl #12 80002a4: f44f 1c80 mov.w ip, #1048576 ; 0x100000 80002a8: ea4c 3111 orr.w r1, ip, r1, lsr #12 80002ac: d002 beq.n 80002b4 <__adddf3+0x70> 80002ae: 4240 negs r0, r0 80002b0: eb61 0141 sbc.w r1, r1, r1, lsl #1 80002b4: f013 4f00 tst.w r3, #2147483648 ; 0x80000000 80002b8: ea4f 3303 mov.w r3, r3, lsl #12 80002bc: ea4c 3313 orr.w r3, ip, r3, lsr #12 80002c0: d002 beq.n 80002c8 <__adddf3+0x84> 80002c2: 4252 negs r2, r2 80002c4: eb63 0343 sbc.w r3, r3, r3, lsl #1 80002c8: ea94 0f05 teq r4, r5 80002cc: f000 80a7 beq.w 800041e <__adddf3+0x1da> 80002d0: f1a4 0401 sub.w r4, r4, #1 80002d4: f1d5 0e20 rsbs lr, r5, #32 80002d8: db0d blt.n 80002f6 <__adddf3+0xb2> 80002da: fa02 fc0e lsl.w ip, r2, lr 80002de: fa22 f205 lsr.w r2, r2, r5 80002e2: 1880 adds r0, r0, r2 80002e4: f141 0100 adc.w r1, r1, #0 80002e8: fa03 f20e lsl.w r2, r3, lr 80002ec: 1880 adds r0, r0, r2 80002ee: fa43 f305 asr.w r3, r3, r5 80002f2: 4159 adcs r1, r3 80002f4: e00e b.n 8000314 <__adddf3+0xd0> 80002f6: f1a5 0520 sub.w r5, r5, #32 80002fa: f10e 0e20 add.w lr, lr, #32 80002fe: 2a01 cmp r2, #1 8000300: fa03 fc0e lsl.w ip, r3, lr 8000304: bf28 it cs 8000306: f04c 0c02 orrcs.w ip, ip, #2 800030a: fa43 f305 asr.w r3, r3, r5 800030e: 18c0 adds r0, r0, r3 8000310: eb51 71e3 adcs.w r1, r1, r3, asr #31 8000314: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 8000318: d507 bpl.n 800032a <__adddf3+0xe6> 800031a: f04f 0e00 mov.w lr, #0 800031e: f1dc 0c00 rsbs ip, ip, #0 8000322: eb7e 0000 sbcs.w r0, lr, r0 8000326: eb6e 0101 sbc.w r1, lr, r1 800032a: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000 800032e: d31b bcc.n 8000368 <__adddf3+0x124> 8000330: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000 8000334: d30c bcc.n 8000350 <__adddf3+0x10c> 8000336: 0849 lsrs r1, r1, #1 8000338: ea5f 0030 movs.w r0, r0, rrx 800033c: ea4f 0c3c mov.w ip, ip, rrx 8000340: f104 0401 add.w r4, r4, #1 8000344: ea4f 5244 mov.w r2, r4, lsl #21 8000348: f512 0f80 cmn.w r2, #4194304 ; 0x400000 800034c: f080 809a bcs.w 8000484 <__adddf3+0x240> 8000350: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000 8000354: bf08 it eq 8000356: ea5f 0c50 movseq.w ip, r0, lsr #1 800035a: f150 0000 adcs.w r0, r0, #0 800035e: eb41 5104 adc.w r1, r1, r4, lsl #20 8000362: ea41 0105 orr.w r1, r1, r5 8000366: bd30 pop {r4, r5, pc} 8000368: ea5f 0c4c movs.w ip, ip, lsl #1 800036c: 4140 adcs r0, r0 800036e: eb41 0101 adc.w r1, r1, r1 8000372: 3c01 subs r4, #1 8000374: bf28 it cs 8000376: f5b1 1f80 cmpcs.w r1, #1048576 ; 0x100000 800037a: d2e9 bcs.n 8000350 <__adddf3+0x10c> 800037c: f091 0f00 teq r1, #0 8000380: bf04 itt eq 8000382: 4601 moveq r1, r0 8000384: 2000 moveq r0, #0 8000386: fab1 f381 clz r3, r1 800038a: bf08 it eq 800038c: 3320 addeq r3, #32 800038e: f1a3 030b sub.w r3, r3, #11 8000392: f1b3 0220 subs.w r2, r3, #32 8000396: da0c bge.n 80003b2 <__adddf3+0x16e> 8000398: 320c adds r2, #12 800039a: dd08 ble.n 80003ae <__adddf3+0x16a> 800039c: f102 0c14 add.w ip, r2, #20 80003a0: f1c2 020c rsb r2, r2, #12 80003a4: fa01 f00c lsl.w r0, r1, ip 80003a8: fa21 f102 lsr.w r1, r1, r2 80003ac: e00c b.n 80003c8 <__adddf3+0x184> 80003ae: f102 0214 add.w r2, r2, #20 80003b2: bfd8 it le 80003b4: f1c2 0c20 rsble ip, r2, #32 80003b8: fa01 f102 lsl.w r1, r1, r2 80003bc: fa20 fc0c lsr.w ip, r0, ip 80003c0: bfdc itt le 80003c2: ea41 010c orrle.w r1, r1, ip 80003c6: 4090 lslle r0, r2 80003c8: 1ae4 subs r4, r4, r3 80003ca: bfa2 ittt ge 80003cc: eb01 5104 addge.w r1, r1, r4, lsl #20 80003d0: 4329 orrge r1, r5 80003d2: bd30 popge {r4, r5, pc} 80003d4: ea6f 0404 mvn.w r4, r4 80003d8: 3c1f subs r4, #31 80003da: da1c bge.n 8000416 <__adddf3+0x1d2> 80003dc: 340c adds r4, #12 80003de: dc0e bgt.n 80003fe <__adddf3+0x1ba> 80003e0: f104 0414 add.w r4, r4, #20 80003e4: f1c4 0220 rsb r2, r4, #32 80003e8: fa20 f004 lsr.w r0, r0, r4 80003ec: fa01 f302 lsl.w r3, r1, r2 80003f0: ea40 0003 orr.w r0, r0, r3 80003f4: fa21 f304 lsr.w r3, r1, r4 80003f8: ea45 0103 orr.w r1, r5, r3 80003fc: bd30 pop {r4, r5, pc} 80003fe: f1c4 040c rsb r4, r4, #12 8000402: f1c4 0220 rsb r2, r4, #32 8000406: fa20 f002 lsr.w r0, r0, r2 800040a: fa01 f304 lsl.w r3, r1, r4 800040e: ea40 0003 orr.w r0, r0, r3 8000412: 4629 mov r1, r5 8000414: bd30 pop {r4, r5, pc} 8000416: fa21 f004 lsr.w r0, r1, r4 800041a: 4629 mov r1, r5 800041c: bd30 pop {r4, r5, pc} 800041e: f094 0f00 teq r4, #0 8000422: f483 1380 eor.w r3, r3, #1048576 ; 0x100000 8000426: bf06 itte eq 8000428: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000 800042c: 3401 addeq r4, #1 800042e: 3d01 subne r5, #1 8000430: e74e b.n 80002d0 <__adddf3+0x8c> 8000432: ea7f 5c64 mvns.w ip, r4, asr #21 8000436: bf18 it ne 8000438: ea7f 5c65 mvnsne.w ip, r5, asr #21 800043c: d029 beq.n 8000492 <__adddf3+0x24e> 800043e: ea94 0f05 teq r4, r5 8000442: bf08 it eq 8000444: ea90 0f02 teqeq r0, r2 8000448: d005 beq.n 8000456 <__adddf3+0x212> 800044a: ea54 0c00 orrs.w ip, r4, r0 800044e: bf04 itt eq 8000450: 4619 moveq r1, r3 8000452: 4610 moveq r0, r2 8000454: bd30 pop {r4, r5, pc} 8000456: ea91 0f03 teq r1, r3 800045a: bf1e ittt ne 800045c: 2100 movne r1, #0 800045e: 2000 movne r0, #0 8000460: bd30 popne {r4, r5, pc} 8000462: ea5f 5c54 movs.w ip, r4, lsr #21 8000466: d105 bne.n 8000474 <__adddf3+0x230> 8000468: 0040 lsls r0, r0, #1 800046a: 4149 adcs r1, r1 800046c: bf28 it cs 800046e: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000 8000472: bd30 pop {r4, r5, pc} 8000474: f514 0480 adds.w r4, r4, #4194304 ; 0x400000 8000478: bf3c itt cc 800047a: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000 800047e: bd30 popcc {r4, r5, pc} 8000480: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 8000484: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000 8000488: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 800048c: f04f 0000 mov.w r0, #0 8000490: bd30 pop {r4, r5, pc} 8000492: ea7f 5c64 mvns.w ip, r4, asr #21 8000496: bf1a itte ne 8000498: 4619 movne r1, r3 800049a: 4610 movne r0, r2 800049c: ea7f 5c65 mvnseq.w ip, r5, asr #21 80004a0: bf1c itt ne 80004a2: 460b movne r3, r1 80004a4: 4602 movne r2, r0 80004a6: ea50 3401 orrs.w r4, r0, r1, lsl #12 80004aa: bf06 itte eq 80004ac: ea52 3503 orrseq.w r5, r2, r3, lsl #12 80004b0: ea91 0f03 teqeq r1, r3 80004b4: f441 2100 orrne.w r1, r1, #524288 ; 0x80000 80004b8: bd30 pop {r4, r5, pc} 80004ba: bf00 nop 080004bc <__aeabi_ui2d>: 80004bc: f090 0f00 teq r0, #0 80004c0: bf04 itt eq 80004c2: 2100 moveq r1, #0 80004c4: 4770 bxeq lr 80004c6: b530 push {r4, r5, lr} 80004c8: f44f 6480 mov.w r4, #1024 ; 0x400 80004cc: f104 0432 add.w r4, r4, #50 ; 0x32 80004d0: f04f 0500 mov.w r5, #0 80004d4: f04f 0100 mov.w r1, #0 80004d8: e750 b.n 800037c <__adddf3+0x138> 80004da: bf00 nop 080004dc <__aeabi_i2d>: 80004dc: f090 0f00 teq r0, #0 80004e0: bf04 itt eq 80004e2: 2100 moveq r1, #0 80004e4: 4770 bxeq lr 80004e6: b530 push {r4, r5, lr} 80004e8: f44f 6480 mov.w r4, #1024 ; 0x400 80004ec: f104 0432 add.w r4, r4, #50 ; 0x32 80004f0: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000 80004f4: bf48 it mi 80004f6: 4240 negmi r0, r0 80004f8: f04f 0100 mov.w r1, #0 80004fc: e73e b.n 800037c <__adddf3+0x138> 80004fe: bf00 nop 08000500 <__aeabi_f2d>: 8000500: 0042 lsls r2, r0, #1 8000502: ea4f 01e2 mov.w r1, r2, asr #3 8000506: ea4f 0131 mov.w r1, r1, rrx 800050a: ea4f 7002 mov.w r0, r2, lsl #28 800050e: bf1f itttt ne 8000510: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000 8000514: f093 4f7f teqne r3, #4278190080 ; 0xff000000 8000518: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000 800051c: 4770 bxne lr 800051e: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000 8000522: bf08 it eq 8000524: 4770 bxeq lr 8000526: f093 4f7f teq r3, #4278190080 ; 0xff000000 800052a: bf04 itt eq 800052c: f441 2100 orreq.w r1, r1, #524288 ; 0x80000 8000530: 4770 bxeq lr 8000532: b530 push {r4, r5, lr} 8000534: f44f 7460 mov.w r4, #896 ; 0x380 8000538: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000 800053c: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 8000540: e71c b.n 800037c <__adddf3+0x138> 8000542: bf00 nop 08000544 <__aeabi_ul2d>: 8000544: ea50 0201 orrs.w r2, r0, r1 8000548: bf08 it eq 800054a: 4770 bxeq lr 800054c: b530 push {r4, r5, lr} 800054e: f04f 0500 mov.w r5, #0 8000552: e00a b.n 800056a <__aeabi_l2d+0x16> 08000554 <__aeabi_l2d>: 8000554: ea50 0201 orrs.w r2, r0, r1 8000558: bf08 it eq 800055a: 4770 bxeq lr 800055c: b530 push {r4, r5, lr} 800055e: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000 8000562: d502 bpl.n 800056a <__aeabi_l2d+0x16> 8000564: 4240 negs r0, r0 8000566: eb61 0141 sbc.w r1, r1, r1, lsl #1 800056a: f44f 6480 mov.w r4, #1024 ; 0x400 800056e: f104 0432 add.w r4, r4, #50 ; 0x32 8000572: ea5f 5c91 movs.w ip, r1, lsr #22 8000576: f43f aed8 beq.w 800032a <__adddf3+0xe6> 800057a: f04f 0203 mov.w r2, #3 800057e: ea5f 0cdc movs.w ip, ip, lsr #3 8000582: bf18 it ne 8000584: 3203 addne r2, #3 8000586: ea5f 0cdc movs.w ip, ip, lsr #3 800058a: bf18 it ne 800058c: 3203 addne r2, #3 800058e: eb02 02dc add.w r2, r2, ip, lsr #3 8000592: f1c2 0320 rsb r3, r2, #32 8000596: fa00 fc03 lsl.w ip, r0, r3 800059a: fa20 f002 lsr.w r0, r0, r2 800059e: fa01 fe03 lsl.w lr, r1, r3 80005a2: ea40 000e orr.w r0, r0, lr 80005a6: fa21 f102 lsr.w r1, r1, r2 80005aa: 4414 add r4, r2 80005ac: e6bd b.n 800032a <__adddf3+0xe6> 80005ae: bf00 nop 080005b0 <__aeabi_dmul>: 80005b0: b570 push {r4, r5, r6, lr} 80005b2: f04f 0cff mov.w ip, #255 ; 0xff 80005b6: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 80005ba: ea1c 5411 ands.w r4, ip, r1, lsr #20 80005be: bf1d ittte ne 80005c0: ea1c 5513 andsne.w r5, ip, r3, lsr #20 80005c4: ea94 0f0c teqne r4, ip 80005c8: ea95 0f0c teqne r5, ip 80005cc: f000 f8de bleq 800078c <__aeabi_dmul+0x1dc> 80005d0: 442c add r4, r5 80005d2: ea81 0603 eor.w r6, r1, r3 80005d6: ea21 514c bic.w r1, r1, ip, lsl #21 80005da: ea23 534c bic.w r3, r3, ip, lsl #21 80005de: ea50 3501 orrs.w r5, r0, r1, lsl #12 80005e2: bf18 it ne 80005e4: ea52 3503 orrsne.w r5, r2, r3, lsl #12 80005e8: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 80005ec: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 80005f0: d038 beq.n 8000664 <__aeabi_dmul+0xb4> 80005f2: fba0 ce02 umull ip, lr, r0, r2 80005f6: f04f 0500 mov.w r5, #0 80005fa: fbe1 e502 umlal lr, r5, r1, r2 80005fe: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000 8000602: fbe0 e503 umlal lr, r5, r0, r3 8000606: f04f 0600 mov.w r6, #0 800060a: fbe1 5603 umlal r5, r6, r1, r3 800060e: f09c 0f00 teq ip, #0 8000612: bf18 it ne 8000614: f04e 0e01 orrne.w lr, lr, #1 8000618: f1a4 04ff sub.w r4, r4, #255 ; 0xff 800061c: f5b6 7f00 cmp.w r6, #512 ; 0x200 8000620: f564 7440 sbc.w r4, r4, #768 ; 0x300 8000624: d204 bcs.n 8000630 <__aeabi_dmul+0x80> 8000626: ea5f 0e4e movs.w lr, lr, lsl #1 800062a: 416d adcs r5, r5 800062c: eb46 0606 adc.w r6, r6, r6 8000630: ea42 21c6 orr.w r1, r2, r6, lsl #11 8000634: ea41 5155 orr.w r1, r1, r5, lsr #21 8000638: ea4f 20c5 mov.w r0, r5, lsl #11 800063c: ea40 505e orr.w r0, r0, lr, lsr #21 8000640: ea4f 2ece mov.w lr, lr, lsl #11 8000644: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd 8000648: bf88 it hi 800064a: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 800064e: d81e bhi.n 800068e <__aeabi_dmul+0xde> 8000650: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000 8000654: bf08 it eq 8000656: ea5f 0e50 movseq.w lr, r0, lsr #1 800065a: f150 0000 adcs.w r0, r0, #0 800065e: eb41 5104 adc.w r1, r1, r4, lsl #20 8000662: bd70 pop {r4, r5, r6, pc} 8000664: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000 8000668: ea46 0101 orr.w r1, r6, r1 800066c: ea40 0002 orr.w r0, r0, r2 8000670: ea81 0103 eor.w r1, r1, r3 8000674: ebb4 045c subs.w r4, r4, ip, lsr #1 8000678: bfc2 ittt gt 800067a: ebd4 050c rsbsgt r5, r4, ip 800067e: ea41 5104 orrgt.w r1, r1, r4, lsl #20 8000682: bd70 popgt {r4, r5, r6, pc} 8000684: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 8000688: f04f 0e00 mov.w lr, #0 800068c: 3c01 subs r4, #1 800068e: f300 80ab bgt.w 80007e8 <__aeabi_dmul+0x238> 8000692: f114 0f36 cmn.w r4, #54 ; 0x36 8000696: bfde ittt le 8000698: 2000 movle r0, #0 800069a: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000 800069e: bd70 pople {r4, r5, r6, pc} 80006a0: f1c4 0400 rsb r4, r4, #0 80006a4: 3c20 subs r4, #32 80006a6: da35 bge.n 8000714 <__aeabi_dmul+0x164> 80006a8: 340c adds r4, #12 80006aa: dc1b bgt.n 80006e4 <__aeabi_dmul+0x134> 80006ac: f104 0414 add.w r4, r4, #20 80006b0: f1c4 0520 rsb r5, r4, #32 80006b4: fa00 f305 lsl.w r3, r0, r5 80006b8: fa20 f004 lsr.w r0, r0, r4 80006bc: fa01 f205 lsl.w r2, r1, r5 80006c0: ea40 0002 orr.w r0, r0, r2 80006c4: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000 80006c8: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000 80006cc: eb10 70d3 adds.w r0, r0, r3, lsr #31 80006d0: fa21 f604 lsr.w r6, r1, r4 80006d4: eb42 0106 adc.w r1, r2, r6 80006d8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80006dc: bf08 it eq 80006de: ea20 70d3 biceq.w r0, r0, r3, lsr #31 80006e2: bd70 pop {r4, r5, r6, pc} 80006e4: f1c4 040c rsb r4, r4, #12 80006e8: f1c4 0520 rsb r5, r4, #32 80006ec: fa00 f304 lsl.w r3, r0, r4 80006f0: fa20 f005 lsr.w r0, r0, r5 80006f4: fa01 f204 lsl.w r2, r1, r4 80006f8: ea40 0002 orr.w r0, r0, r2 80006fc: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 8000700: eb10 70d3 adds.w r0, r0, r3, lsr #31 8000704: f141 0100 adc.w r1, r1, #0 8000708: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 800070c: bf08 it eq 800070e: ea20 70d3 biceq.w r0, r0, r3, lsr #31 8000712: bd70 pop {r4, r5, r6, pc} 8000714: f1c4 0520 rsb r5, r4, #32 8000718: fa00 f205 lsl.w r2, r0, r5 800071c: ea4e 0e02 orr.w lr, lr, r2 8000720: fa20 f304 lsr.w r3, r0, r4 8000724: fa01 f205 lsl.w r2, r1, r5 8000728: ea43 0302 orr.w r3, r3, r2 800072c: fa21 f004 lsr.w r0, r1, r4 8000730: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 8000734: fa21 f204 lsr.w r2, r1, r4 8000738: ea20 0002 bic.w r0, r0, r2 800073c: eb00 70d3 add.w r0, r0, r3, lsr #31 8000740: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8000744: bf08 it eq 8000746: ea20 70d3 biceq.w r0, r0, r3, lsr #31 800074a: bd70 pop {r4, r5, r6, pc} 800074c: f094 0f00 teq r4, #0 8000750: d10f bne.n 8000772 <__aeabi_dmul+0x1c2> 8000752: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000 8000756: 0040 lsls r0, r0, #1 8000758: eb41 0101 adc.w r1, r1, r1 800075c: f411 1f80 tst.w r1, #1048576 ; 0x100000 8000760: bf08 it eq 8000762: 3c01 subeq r4, #1 8000764: d0f7 beq.n 8000756 <__aeabi_dmul+0x1a6> 8000766: ea41 0106 orr.w r1, r1, r6 800076a: f095 0f00 teq r5, #0 800076e: bf18 it ne 8000770: 4770 bxne lr 8000772: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000 8000776: 0052 lsls r2, r2, #1 8000778: eb43 0303 adc.w r3, r3, r3 800077c: f413 1f80 tst.w r3, #1048576 ; 0x100000 8000780: bf08 it eq 8000782: 3d01 subeq r5, #1 8000784: d0f7 beq.n 8000776 <__aeabi_dmul+0x1c6> 8000786: ea43 0306 orr.w r3, r3, r6 800078a: 4770 bx lr 800078c: ea94 0f0c teq r4, ip 8000790: ea0c 5513 and.w r5, ip, r3, lsr #20 8000794: bf18 it ne 8000796: ea95 0f0c teqne r5, ip 800079a: d00c beq.n 80007b6 <__aeabi_dmul+0x206> 800079c: ea50 0641 orrs.w r6, r0, r1, lsl #1 80007a0: bf18 it ne 80007a2: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80007a6: d1d1 bne.n 800074c <__aeabi_dmul+0x19c> 80007a8: ea81 0103 eor.w r1, r1, r3 80007ac: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 80007b0: f04f 0000 mov.w r0, #0 80007b4: bd70 pop {r4, r5, r6, pc} 80007b6: ea50 0641 orrs.w r6, r0, r1, lsl #1 80007ba: bf06 itte eq 80007bc: 4610 moveq r0, r2 80007be: 4619 moveq r1, r3 80007c0: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80007c4: d019 beq.n 80007fa <__aeabi_dmul+0x24a> 80007c6: ea94 0f0c teq r4, ip 80007ca: d102 bne.n 80007d2 <__aeabi_dmul+0x222> 80007cc: ea50 3601 orrs.w r6, r0, r1, lsl #12 80007d0: d113 bne.n 80007fa <__aeabi_dmul+0x24a> 80007d2: ea95 0f0c teq r5, ip 80007d6: d105 bne.n 80007e4 <__aeabi_dmul+0x234> 80007d8: ea52 3603 orrs.w r6, r2, r3, lsl #12 80007dc: bf1c itt ne 80007de: 4610 movne r0, r2 80007e0: 4619 movne r1, r3 80007e2: d10a bne.n 80007fa <__aeabi_dmul+0x24a> 80007e4: ea81 0103 eor.w r1, r1, r3 80007e8: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000 80007ec: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 80007f0: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000 80007f4: f04f 0000 mov.w r0, #0 80007f8: bd70 pop {r4, r5, r6, pc} 80007fa: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000 80007fe: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000 8000802: bd70 pop {r4, r5, r6, pc} 08000804 <__aeabi_ddiv>: 8000804: b570 push {r4, r5, r6, lr} 8000806: f04f 0cff mov.w ip, #255 ; 0xff 800080a: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700 800080e: ea1c 5411 ands.w r4, ip, r1, lsr #20 8000812: bf1d ittte ne 8000814: ea1c 5513 andsne.w r5, ip, r3, lsr #20 8000818: ea94 0f0c teqne r4, ip 800081c: ea95 0f0c teqne r5, ip 8000820: f000 f8a7 bleq 8000972 <__aeabi_ddiv+0x16e> 8000824: eba4 0405 sub.w r4, r4, r5 8000828: ea81 0e03 eor.w lr, r1, r3 800082c: ea52 3503 orrs.w r5, r2, r3, lsl #12 8000830: ea4f 3101 mov.w r1, r1, lsl #12 8000834: f000 8088 beq.w 8000948 <__aeabi_ddiv+0x144> 8000838: ea4f 3303 mov.w r3, r3, lsl #12 800083c: f04f 5580 mov.w r5, #268435456 ; 0x10000000 8000840: ea45 1313 orr.w r3, r5, r3, lsr #4 8000844: ea43 6312 orr.w r3, r3, r2, lsr #24 8000848: ea4f 2202 mov.w r2, r2, lsl #8 800084c: ea45 1511 orr.w r5, r5, r1, lsr #4 8000850: ea45 6510 orr.w r5, r5, r0, lsr #24 8000854: ea4f 2600 mov.w r6, r0, lsl #8 8000858: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000 800085c: 429d cmp r5, r3 800085e: bf08 it eq 8000860: 4296 cmpeq r6, r2 8000862: f144 04fd adc.w r4, r4, #253 ; 0xfd 8000866: f504 7440 add.w r4, r4, #768 ; 0x300 800086a: d202 bcs.n 8000872 <__aeabi_ddiv+0x6e> 800086c: 085b lsrs r3, r3, #1 800086e: ea4f 0232 mov.w r2, r2, rrx 8000872: 1ab6 subs r6, r6, r2 8000874: eb65 0503 sbc.w r5, r5, r3 8000878: 085b lsrs r3, r3, #1 800087a: ea4f 0232 mov.w r2, r2, rrx 800087e: f44f 1080 mov.w r0, #1048576 ; 0x100000 8000882: f44f 2c00 mov.w ip, #524288 ; 0x80000 8000886: ebb6 0e02 subs.w lr, r6, r2 800088a: eb75 0e03 sbcs.w lr, r5, r3 800088e: bf22 ittt cs 8000890: 1ab6 subcs r6, r6, r2 8000892: 4675 movcs r5, lr 8000894: ea40 000c orrcs.w r0, r0, ip 8000898: 085b lsrs r3, r3, #1 800089a: ea4f 0232 mov.w r2, r2, rrx 800089e: ebb6 0e02 subs.w lr, r6, r2 80008a2: eb75 0e03 sbcs.w lr, r5, r3 80008a6: bf22 ittt cs 80008a8: 1ab6 subcs r6, r6, r2 80008aa: 4675 movcs r5, lr 80008ac: ea40 005c orrcs.w r0, r0, ip, lsr #1 80008b0: 085b lsrs r3, r3, #1 80008b2: ea4f 0232 mov.w r2, r2, rrx 80008b6: ebb6 0e02 subs.w lr, r6, r2 80008ba: eb75 0e03 sbcs.w lr, r5, r3 80008be: bf22 ittt cs 80008c0: 1ab6 subcs r6, r6, r2 80008c2: 4675 movcs r5, lr 80008c4: ea40 009c orrcs.w r0, r0, ip, lsr #2 80008c8: 085b lsrs r3, r3, #1 80008ca: ea4f 0232 mov.w r2, r2, rrx 80008ce: ebb6 0e02 subs.w lr, r6, r2 80008d2: eb75 0e03 sbcs.w lr, r5, r3 80008d6: bf22 ittt cs 80008d8: 1ab6 subcs r6, r6, r2 80008da: 4675 movcs r5, lr 80008dc: ea40 00dc orrcs.w r0, r0, ip, lsr #3 80008e0: ea55 0e06 orrs.w lr, r5, r6 80008e4: d018 beq.n 8000918 <__aeabi_ddiv+0x114> 80008e6: ea4f 1505 mov.w r5, r5, lsl #4 80008ea: ea45 7516 orr.w r5, r5, r6, lsr #28 80008ee: ea4f 1606 mov.w r6, r6, lsl #4 80008f2: ea4f 03c3 mov.w r3, r3, lsl #3 80008f6: ea43 7352 orr.w r3, r3, r2, lsr #29 80008fa: ea4f 02c2 mov.w r2, r2, lsl #3 80008fe: ea5f 1c1c movs.w ip, ip, lsr #4 8000902: d1c0 bne.n 8000886 <__aeabi_ddiv+0x82> 8000904: f411 1f80 tst.w r1, #1048576 ; 0x100000 8000908: d10b bne.n 8000922 <__aeabi_ddiv+0x11e> 800090a: ea41 0100 orr.w r1, r1, r0 800090e: f04f 0000 mov.w r0, #0 8000912: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000 8000916: e7b6 b.n 8000886 <__aeabi_ddiv+0x82> 8000918: f411 1f80 tst.w r1, #1048576 ; 0x100000 800091c: bf04 itt eq 800091e: 4301 orreq r1, r0 8000920: 2000 moveq r0, #0 8000922: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd 8000926: bf88 it hi 8000928: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700 800092c: f63f aeaf bhi.w 800068e <__aeabi_dmul+0xde> 8000930: ebb5 0c03 subs.w ip, r5, r3 8000934: bf04 itt eq 8000936: ebb6 0c02 subseq.w ip, r6, r2 800093a: ea5f 0c50 movseq.w ip, r0, lsr #1 800093e: f150 0000 adcs.w r0, r0, #0 8000942: eb41 5104 adc.w r1, r1, r4, lsl #20 8000946: bd70 pop {r4, r5, r6, pc} 8000948: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000 800094c: ea4e 3111 orr.w r1, lr, r1, lsr #12 8000950: eb14 045c adds.w r4, r4, ip, lsr #1 8000954: bfc2 ittt gt 8000956: ebd4 050c rsbsgt r5, r4, ip 800095a: ea41 5104 orrgt.w r1, r1, r4, lsl #20 800095e: bd70 popgt {r4, r5, r6, pc} 8000960: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 8000964: f04f 0e00 mov.w lr, #0 8000968: 3c01 subs r4, #1 800096a: e690 b.n 800068e <__aeabi_dmul+0xde> 800096c: ea45 0e06 orr.w lr, r5, r6 8000970: e68d b.n 800068e <__aeabi_dmul+0xde> 8000972: ea0c 5513 and.w r5, ip, r3, lsr #20 8000976: ea94 0f0c teq r4, ip 800097a: bf08 it eq 800097c: ea95 0f0c teqeq r5, ip 8000980: f43f af3b beq.w 80007fa <__aeabi_dmul+0x24a> 8000984: ea94 0f0c teq r4, ip 8000988: d10a bne.n 80009a0 <__aeabi_ddiv+0x19c> 800098a: ea50 3401 orrs.w r4, r0, r1, lsl #12 800098e: f47f af34 bne.w 80007fa <__aeabi_dmul+0x24a> 8000992: ea95 0f0c teq r5, ip 8000996: f47f af25 bne.w 80007e4 <__aeabi_dmul+0x234> 800099a: 4610 mov r0, r2 800099c: 4619 mov r1, r3 800099e: e72c b.n 80007fa <__aeabi_dmul+0x24a> 80009a0: ea95 0f0c teq r5, ip 80009a4: d106 bne.n 80009b4 <__aeabi_ddiv+0x1b0> 80009a6: ea52 3503 orrs.w r5, r2, r3, lsl #12 80009aa: f43f aefd beq.w 80007a8 <__aeabi_dmul+0x1f8> 80009ae: 4610 mov r0, r2 80009b0: 4619 mov r1, r3 80009b2: e722 b.n 80007fa <__aeabi_dmul+0x24a> 80009b4: ea50 0641 orrs.w r6, r0, r1, lsl #1 80009b8: bf18 it ne 80009ba: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80009be: f47f aec5 bne.w 800074c <__aeabi_dmul+0x19c> 80009c2: ea50 0441 orrs.w r4, r0, r1, lsl #1 80009c6: f47f af0d bne.w 80007e4 <__aeabi_dmul+0x234> 80009ca: ea52 0543 orrs.w r5, r2, r3, lsl #1 80009ce: f47f aeeb bne.w 80007a8 <__aeabi_dmul+0x1f8> 80009d2: e712 b.n 80007fa <__aeabi_dmul+0x24a> 080009d4 <__gedf2>: 80009d4: f04f 3cff mov.w ip, #4294967295 ; 0xffffffff 80009d8: e006 b.n 80009e8 <__cmpdf2+0x4> 80009da: bf00 nop 080009dc <__ledf2>: 80009dc: f04f 0c01 mov.w ip, #1 80009e0: e002 b.n 80009e8 <__cmpdf2+0x4> 80009e2: bf00 nop 080009e4 <__cmpdf2>: 80009e4: f04f 0c01 mov.w ip, #1 80009e8: f84d cd04 str.w ip, [sp, #-4]! 80009ec: ea4f 0c41 mov.w ip, r1, lsl #1 80009f0: ea7f 5c6c mvns.w ip, ip, asr #21 80009f4: ea4f 0c43 mov.w ip, r3, lsl #1 80009f8: bf18 it ne 80009fa: ea7f 5c6c mvnsne.w ip, ip, asr #21 80009fe: d01b beq.n 8000a38 <__cmpdf2+0x54> 8000a00: b001 add sp, #4 8000a02: ea50 0c41 orrs.w ip, r0, r1, lsl #1 8000a06: bf0c ite eq 8000a08: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 8000a0c: ea91 0f03 teqne r1, r3 8000a10: bf02 ittt eq 8000a12: ea90 0f02 teqeq r0, r2 8000a16: 2000 moveq r0, #0 8000a18: 4770 bxeq lr 8000a1a: f110 0f00 cmn.w r0, #0 8000a1e: ea91 0f03 teq r1, r3 8000a22: bf58 it pl 8000a24: 4299 cmppl r1, r3 8000a26: bf08 it eq 8000a28: 4290 cmpeq r0, r2 8000a2a: bf2c ite cs 8000a2c: 17d8 asrcs r0, r3, #31 8000a2e: ea6f 70e3 mvncc.w r0, r3, asr #31 8000a32: f040 0001 orr.w r0, r0, #1 8000a36: 4770 bx lr 8000a38: ea4f 0c41 mov.w ip, r1, lsl #1 8000a3c: ea7f 5c6c mvns.w ip, ip, asr #21 8000a40: d102 bne.n 8000a48 <__cmpdf2+0x64> 8000a42: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8000a46: d107 bne.n 8000a58 <__cmpdf2+0x74> 8000a48: ea4f 0c43 mov.w ip, r3, lsl #1 8000a4c: ea7f 5c6c mvns.w ip, ip, asr #21 8000a50: d1d6 bne.n 8000a00 <__cmpdf2+0x1c> 8000a52: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8000a56: d0d3 beq.n 8000a00 <__cmpdf2+0x1c> 8000a58: f85d 0b04 ldr.w r0, [sp], #4 8000a5c: 4770 bx lr 8000a5e: bf00 nop 08000a60 <__aeabi_cdrcmple>: 8000a60: 4684 mov ip, r0 8000a62: 4610 mov r0, r2 8000a64: 4662 mov r2, ip 8000a66: 468c mov ip, r1 8000a68: 4619 mov r1, r3 8000a6a: 4663 mov r3, ip 8000a6c: e000 b.n 8000a70 <__aeabi_cdcmpeq> 8000a6e: bf00 nop 08000a70 <__aeabi_cdcmpeq>: 8000a70: b501 push {r0, lr} 8000a72: f7ff ffb7 bl 80009e4 <__cmpdf2> 8000a76: 2800 cmp r0, #0 8000a78: bf48 it mi 8000a7a: f110 0f00 cmnmi.w r0, #0 8000a7e: bd01 pop {r0, pc} 08000a80 <__aeabi_dcmpeq>: 8000a80: f84d ed08 str.w lr, [sp, #-8]! 8000a84: f7ff fff4 bl 8000a70 <__aeabi_cdcmpeq> 8000a88: bf0c ite eq 8000a8a: 2001 moveq r0, #1 8000a8c: 2000 movne r0, #0 8000a8e: f85d fb08 ldr.w pc, [sp], #8 8000a92: bf00 nop 08000a94 <__aeabi_dcmplt>: 8000a94: f84d ed08 str.w lr, [sp, #-8]! 8000a98: f7ff ffea bl 8000a70 <__aeabi_cdcmpeq> 8000a9c: bf34 ite cc 8000a9e: 2001 movcc r0, #1 8000aa0: 2000 movcs r0, #0 8000aa2: f85d fb08 ldr.w pc, [sp], #8 8000aa6: bf00 nop 08000aa8 <__aeabi_dcmple>: 8000aa8: f84d ed08 str.w lr, [sp, #-8]! 8000aac: f7ff ffe0 bl 8000a70 <__aeabi_cdcmpeq> 8000ab0: bf94 ite ls 8000ab2: 2001 movls r0, #1 8000ab4: 2000 movhi r0, #0 8000ab6: f85d fb08 ldr.w pc, [sp], #8 8000aba: bf00 nop 08000abc <__aeabi_dcmpge>: 8000abc: f84d ed08 str.w lr, [sp, #-8]! 8000ac0: f7ff ffce bl 8000a60 <__aeabi_cdrcmple> 8000ac4: bf94 ite ls 8000ac6: 2001 movls r0, #1 8000ac8: 2000 movhi r0, #0 8000aca: f85d fb08 ldr.w pc, [sp], #8 8000ace: bf00 nop 08000ad0 <__aeabi_dcmpgt>: 8000ad0: f84d ed08 str.w lr, [sp, #-8]! 8000ad4: f7ff ffc4 bl 8000a60 <__aeabi_cdrcmple> 8000ad8: bf34 ite cc 8000ada: 2001 movcc r0, #1 8000adc: 2000 movcs r0, #0 8000ade: f85d fb08 ldr.w pc, [sp], #8 8000ae2: bf00 nop 08000ae4 <__aeabi_dcmpun>: 8000ae4: ea4f 0c41 mov.w ip, r1, lsl #1 8000ae8: ea7f 5c6c mvns.w ip, ip, asr #21 8000aec: d102 bne.n 8000af4 <__aeabi_dcmpun+0x10> 8000aee: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8000af2: d10a bne.n 8000b0a <__aeabi_dcmpun+0x26> 8000af4: ea4f 0c43 mov.w ip, r3, lsl #1 8000af8: ea7f 5c6c mvns.w ip, ip, asr #21 8000afc: d102 bne.n 8000b04 <__aeabi_dcmpun+0x20> 8000afe: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8000b02: d102 bne.n 8000b0a <__aeabi_dcmpun+0x26> 8000b04: f04f 0000 mov.w r0, #0 8000b08: 4770 bx lr 8000b0a: f04f 0001 mov.w r0, #1 8000b0e: 4770 bx lr 08000b10 <__aeabi_d2iz>: 8000b10: ea4f 0241 mov.w r2, r1, lsl #1 8000b14: f512 1200 adds.w r2, r2, #2097152 ; 0x200000 8000b18: d215 bcs.n 8000b46 <__aeabi_d2iz+0x36> 8000b1a: d511 bpl.n 8000b40 <__aeabi_d2iz+0x30> 8000b1c: f46f 7378 mvn.w r3, #992 ; 0x3e0 8000b20: ebb3 5262 subs.w r2, r3, r2, asr #21 8000b24: d912 bls.n 8000b4c <__aeabi_d2iz+0x3c> 8000b26: ea4f 23c1 mov.w r3, r1, lsl #11 8000b2a: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 8000b2e: ea43 5350 orr.w r3, r3, r0, lsr #21 8000b32: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 8000b36: fa23 f002 lsr.w r0, r3, r2 8000b3a: bf18 it ne 8000b3c: 4240 negne r0, r0 8000b3e: 4770 bx lr 8000b40: f04f 0000 mov.w r0, #0 8000b44: 4770 bx lr 8000b46: ea50 3001 orrs.w r0, r0, r1, lsl #12 8000b4a: d105 bne.n 8000b58 <__aeabi_d2iz+0x48> 8000b4c: f011 4000 ands.w r0, r1, #2147483648 ; 0x80000000 8000b50: bf08 it eq 8000b52: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000 8000b56: 4770 bx lr 8000b58: f04f 0000 mov.w r0, #0 8000b5c: 4770 bx lr 8000b5e: bf00 nop 08000b60 <__aeabi_d2f>: 8000b60: ea4f 0241 mov.w r2, r1, lsl #1 8000b64: f1b2 43e0 subs.w r3, r2, #1879048192 ; 0x70000000 8000b68: bf24 itt cs 8000b6a: f5b3 1c00 subscs.w ip, r3, #2097152 ; 0x200000 8000b6e: f1dc 5cfe rsbscs ip, ip, #532676608 ; 0x1fc00000 8000b72: d90d bls.n 8000b90 <__aeabi_d2f+0x30> 8000b74: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 8000b78: ea4f 02c0 mov.w r2, r0, lsl #3 8000b7c: ea4c 7050 orr.w r0, ip, r0, lsr #29 8000b80: f1b2 4f00 cmp.w r2, #2147483648 ; 0x80000000 8000b84: eb40 0083 adc.w r0, r0, r3, lsl #2 8000b88: bf08 it eq 8000b8a: f020 0001 biceq.w r0, r0, #1 8000b8e: 4770 bx lr 8000b90: f011 4f80 tst.w r1, #1073741824 ; 0x40000000 8000b94: d121 bne.n 8000bda <__aeabi_d2f+0x7a> 8000b96: f113 7238 adds.w r2, r3, #48234496 ; 0x2e00000 8000b9a: bfbc itt lt 8000b9c: f001 4000 andlt.w r0, r1, #2147483648 ; 0x80000000 8000ba0: 4770 bxlt lr 8000ba2: f441 1180 orr.w r1, r1, #1048576 ; 0x100000 8000ba6: ea4f 5252 mov.w r2, r2, lsr #21 8000baa: f1c2 0218 rsb r2, r2, #24 8000bae: f1c2 0c20 rsb ip, r2, #32 8000bb2: fa10 f30c lsls.w r3, r0, ip 8000bb6: fa20 f002 lsr.w r0, r0, r2 8000bba: bf18 it ne 8000bbc: f040 0001 orrne.w r0, r0, #1 8000bc0: ea4f 23c1 mov.w r3, r1, lsl #11 8000bc4: ea4f 23d3 mov.w r3, r3, lsr #11 8000bc8: fa03 fc0c lsl.w ip, r3, ip 8000bcc: ea40 000c orr.w r0, r0, ip 8000bd0: fa23 f302 lsr.w r3, r3, r2 8000bd4: ea4f 0343 mov.w r3, r3, lsl #1 8000bd8: e7cc b.n 8000b74 <__aeabi_d2f+0x14> 8000bda: ea7f 5362 mvns.w r3, r2, asr #21 8000bde: d107 bne.n 8000bf0 <__aeabi_d2f+0x90> 8000be0: ea50 3301 orrs.w r3, r0, r1, lsl #12 8000be4: bf1e ittt ne 8000be6: f04f 40fe movne.w r0, #2130706432 ; 0x7f000000 8000bea: f440 0040 orrne.w r0, r0, #12582912 ; 0xc00000 8000bee: 4770 bxne lr 8000bf0: f001 4000 and.w r0, r1, #2147483648 ; 0x80000000 8000bf4: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8000bf8: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000bfc: 4770 bx lr 8000bfe: bf00 nop 08000c00 <__aeabi_frsub>: 8000c00: f080 4000 eor.w r0, r0, #2147483648 ; 0x80000000 8000c04: e002 b.n 8000c0c <__addsf3> 8000c06: bf00 nop 08000c08 <__aeabi_fsub>: 8000c08: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000 08000c0c <__addsf3>: 8000c0c: 0042 lsls r2, r0, #1 8000c0e: bf1f itttt ne 8000c10: ea5f 0341 movsne.w r3, r1, lsl #1 8000c14: ea92 0f03 teqne r2, r3 8000c18: ea7f 6c22 mvnsne.w ip, r2, asr #24 8000c1c: ea7f 6c23 mvnsne.w ip, r3, asr #24 8000c20: d06a beq.n 8000cf8 <__addsf3+0xec> 8000c22: ea4f 6212 mov.w r2, r2, lsr #24 8000c26: ebd2 6313 rsbs r3, r2, r3, lsr #24 8000c2a: bfc1 itttt gt 8000c2c: 18d2 addgt r2, r2, r3 8000c2e: 4041 eorgt r1, r0 8000c30: 4048 eorgt r0, r1 8000c32: 4041 eorgt r1, r0 8000c34: bfb8 it lt 8000c36: 425b neglt r3, r3 8000c38: 2b19 cmp r3, #25 8000c3a: bf88 it hi 8000c3c: 4770 bxhi lr 8000c3e: f010 4f00 tst.w r0, #2147483648 ; 0x80000000 8000c42: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000c46: f020 407f bic.w r0, r0, #4278190080 ; 0xff000000 8000c4a: bf18 it ne 8000c4c: 4240 negne r0, r0 8000c4e: f011 4f00 tst.w r1, #2147483648 ; 0x80000000 8000c52: f441 0100 orr.w r1, r1, #8388608 ; 0x800000 8000c56: f021 417f bic.w r1, r1, #4278190080 ; 0xff000000 8000c5a: bf18 it ne 8000c5c: 4249 negne r1, r1 8000c5e: ea92 0f03 teq r2, r3 8000c62: d03f beq.n 8000ce4 <__addsf3+0xd8> 8000c64: f1a2 0201 sub.w r2, r2, #1 8000c68: fa41 fc03 asr.w ip, r1, r3 8000c6c: eb10 000c adds.w r0, r0, ip 8000c70: f1c3 0320 rsb r3, r3, #32 8000c74: fa01 f103 lsl.w r1, r1, r3 8000c78: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000 8000c7c: d502 bpl.n 8000c84 <__addsf3+0x78> 8000c7e: 4249 negs r1, r1 8000c80: eb60 0040 sbc.w r0, r0, r0, lsl #1 8000c84: f5b0 0f00 cmp.w r0, #8388608 ; 0x800000 8000c88: d313 bcc.n 8000cb2 <__addsf3+0xa6> 8000c8a: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000 8000c8e: d306 bcc.n 8000c9e <__addsf3+0x92> 8000c90: 0840 lsrs r0, r0, #1 8000c92: ea4f 0131 mov.w r1, r1, rrx 8000c96: f102 0201 add.w r2, r2, #1 8000c9a: 2afe cmp r2, #254 ; 0xfe 8000c9c: d251 bcs.n 8000d42 <__addsf3+0x136> 8000c9e: f1b1 4f00 cmp.w r1, #2147483648 ; 0x80000000 8000ca2: eb40 50c2 adc.w r0, r0, r2, lsl #23 8000ca6: bf08 it eq 8000ca8: f020 0001 biceq.w r0, r0, #1 8000cac: ea40 0003 orr.w r0, r0, r3 8000cb0: 4770 bx lr 8000cb2: 0049 lsls r1, r1, #1 8000cb4: eb40 0000 adc.w r0, r0, r0 8000cb8: 3a01 subs r2, #1 8000cba: bf28 it cs 8000cbc: f5b0 0f00 cmpcs.w r0, #8388608 ; 0x800000 8000cc0: d2ed bcs.n 8000c9e <__addsf3+0x92> 8000cc2: fab0 fc80 clz ip, r0 8000cc6: f1ac 0c08 sub.w ip, ip, #8 8000cca: ebb2 020c subs.w r2, r2, ip 8000cce: fa00 f00c lsl.w r0, r0, ip 8000cd2: bfaa itet ge 8000cd4: eb00 50c2 addge.w r0, r0, r2, lsl #23 8000cd8: 4252 neglt r2, r2 8000cda: 4318 orrge r0, r3 8000cdc: bfbc itt lt 8000cde: 40d0 lsrlt r0, r2 8000ce0: 4318 orrlt r0, r3 8000ce2: 4770 bx lr 8000ce4: f092 0f00 teq r2, #0 8000ce8: f481 0100 eor.w r1, r1, #8388608 ; 0x800000 8000cec: bf06 itte eq 8000cee: f480 0000 eoreq.w r0, r0, #8388608 ; 0x800000 8000cf2: 3201 addeq r2, #1 8000cf4: 3b01 subne r3, #1 8000cf6: e7b5 b.n 8000c64 <__addsf3+0x58> 8000cf8: ea4f 0341 mov.w r3, r1, lsl #1 8000cfc: ea7f 6c22 mvns.w ip, r2, asr #24 8000d00: bf18 it ne 8000d02: ea7f 6c23 mvnsne.w ip, r3, asr #24 8000d06: d021 beq.n 8000d4c <__addsf3+0x140> 8000d08: ea92 0f03 teq r2, r3 8000d0c: d004 beq.n 8000d18 <__addsf3+0x10c> 8000d0e: f092 0f00 teq r2, #0 8000d12: bf08 it eq 8000d14: 4608 moveq r0, r1 8000d16: 4770 bx lr 8000d18: ea90 0f01 teq r0, r1 8000d1c: bf1c itt ne 8000d1e: 2000 movne r0, #0 8000d20: 4770 bxne lr 8000d22: f012 4f7f tst.w r2, #4278190080 ; 0xff000000 8000d26: d104 bne.n 8000d32 <__addsf3+0x126> 8000d28: 0040 lsls r0, r0, #1 8000d2a: bf28 it cs 8000d2c: f040 4000 orrcs.w r0, r0, #2147483648 ; 0x80000000 8000d30: 4770 bx lr 8000d32: f112 7200 adds.w r2, r2, #33554432 ; 0x2000000 8000d36: bf3c itt cc 8000d38: f500 0000 addcc.w r0, r0, #8388608 ; 0x800000 8000d3c: 4770 bxcc lr 8000d3e: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000 8000d42: f043 40fe orr.w r0, r3, #2130706432 ; 0x7f000000 8000d46: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000d4a: 4770 bx lr 8000d4c: ea7f 6222 mvns.w r2, r2, asr #24 8000d50: bf16 itet ne 8000d52: 4608 movne r0, r1 8000d54: ea7f 6323 mvnseq.w r3, r3, asr #24 8000d58: 4601 movne r1, r0 8000d5a: 0242 lsls r2, r0, #9 8000d5c: bf06 itte eq 8000d5e: ea5f 2341 movseq.w r3, r1, lsl #9 8000d62: ea90 0f01 teqeq r0, r1 8000d66: f440 0080 orrne.w r0, r0, #4194304 ; 0x400000 8000d6a: 4770 bx lr 08000d6c <__aeabi_ui2f>: 8000d6c: f04f 0300 mov.w r3, #0 8000d70: e004 b.n 8000d7c <__aeabi_i2f+0x8> 8000d72: bf00 nop 08000d74 <__aeabi_i2f>: 8000d74: f010 4300 ands.w r3, r0, #2147483648 ; 0x80000000 8000d78: bf48 it mi 8000d7a: 4240 negmi r0, r0 8000d7c: ea5f 0c00 movs.w ip, r0 8000d80: bf08 it eq 8000d82: 4770 bxeq lr 8000d84: f043 4396 orr.w r3, r3, #1258291200 ; 0x4b000000 8000d88: 4601 mov r1, r0 8000d8a: f04f 0000 mov.w r0, #0 8000d8e: e01c b.n 8000dca <__aeabi_l2f+0x2a> 08000d90 <__aeabi_ul2f>: 8000d90: ea50 0201 orrs.w r2, r0, r1 8000d94: bf08 it eq 8000d96: 4770 bxeq lr 8000d98: f04f 0300 mov.w r3, #0 8000d9c: e00a b.n 8000db4 <__aeabi_l2f+0x14> 8000d9e: bf00 nop 08000da0 <__aeabi_l2f>: 8000da0: ea50 0201 orrs.w r2, r0, r1 8000da4: bf08 it eq 8000da6: 4770 bxeq lr 8000da8: f011 4300 ands.w r3, r1, #2147483648 ; 0x80000000 8000dac: d502 bpl.n 8000db4 <__aeabi_l2f+0x14> 8000dae: 4240 negs r0, r0 8000db0: eb61 0141 sbc.w r1, r1, r1, lsl #1 8000db4: ea5f 0c01 movs.w ip, r1 8000db8: bf02 ittt eq 8000dba: 4684 moveq ip, r0 8000dbc: 4601 moveq r1, r0 8000dbe: 2000 moveq r0, #0 8000dc0: f043 43b6 orr.w r3, r3, #1526726656 ; 0x5b000000 8000dc4: bf08 it eq 8000dc6: f1a3 5380 subeq.w r3, r3, #268435456 ; 0x10000000 8000dca: f5a3 0300 sub.w r3, r3, #8388608 ; 0x800000 8000dce: fabc f28c clz r2, ip 8000dd2: 3a08 subs r2, #8 8000dd4: eba3 53c2 sub.w r3, r3, r2, lsl #23 8000dd8: db10 blt.n 8000dfc <__aeabi_l2f+0x5c> 8000dda: fa01 fc02 lsl.w ip, r1, r2 8000dde: 4463 add r3, ip 8000de0: fa00 fc02 lsl.w ip, r0, r2 8000de4: f1c2 0220 rsb r2, r2, #32 8000de8: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000 8000dec: fa20 f202 lsr.w r2, r0, r2 8000df0: eb43 0002 adc.w r0, r3, r2 8000df4: bf08 it eq 8000df6: f020 0001 biceq.w r0, r0, #1 8000dfa: 4770 bx lr 8000dfc: f102 0220 add.w r2, r2, #32 8000e00: fa01 fc02 lsl.w ip, r1, r2 8000e04: f1c2 0220 rsb r2, r2, #32 8000e08: ea50 004c orrs.w r0, r0, ip, lsl #1 8000e0c: fa21 f202 lsr.w r2, r1, r2 8000e10: eb43 0002 adc.w r0, r3, r2 8000e14: bf08 it eq 8000e16: ea20 70dc biceq.w r0, r0, ip, lsr #31 8000e1a: 4770 bx lr 08000e1c <__aeabi_fmul>: 8000e1c: f04f 0cff mov.w ip, #255 ; 0xff 8000e20: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8000e24: bf1e ittt ne 8000e26: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8000e2a: ea92 0f0c teqne r2, ip 8000e2e: ea93 0f0c teqne r3, ip 8000e32: d06f beq.n 8000f14 <__aeabi_fmul+0xf8> 8000e34: 441a add r2, r3 8000e36: ea80 0c01 eor.w ip, r0, r1 8000e3a: 0240 lsls r0, r0, #9 8000e3c: bf18 it ne 8000e3e: ea5f 2141 movsne.w r1, r1, lsl #9 8000e42: d01e beq.n 8000e82 <__aeabi_fmul+0x66> 8000e44: f04f 6300 mov.w r3, #134217728 ; 0x8000000 8000e48: ea43 1050 orr.w r0, r3, r0, lsr #5 8000e4c: ea43 1151 orr.w r1, r3, r1, lsr #5 8000e50: fba0 3101 umull r3, r1, r0, r1 8000e54: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000 8000e58: f5b1 0f00 cmp.w r1, #8388608 ; 0x800000 8000e5c: bf3e ittt cc 8000e5e: 0049 lslcc r1, r1, #1 8000e60: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 8000e64: 005b lslcc r3, r3, #1 8000e66: ea40 0001 orr.w r0, r0, r1 8000e6a: f162 027f sbc.w r2, r2, #127 ; 0x7f 8000e6e: 2afd cmp r2, #253 ; 0xfd 8000e70: d81d bhi.n 8000eae <__aeabi_fmul+0x92> 8000e72: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 8000e76: eb40 50c2 adc.w r0, r0, r2, lsl #23 8000e7a: bf08 it eq 8000e7c: f020 0001 biceq.w r0, r0, #1 8000e80: 4770 bx lr 8000e82: f090 0f00 teq r0, #0 8000e86: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000 8000e8a: bf08 it eq 8000e8c: 0249 lsleq r1, r1, #9 8000e8e: ea4c 2050 orr.w r0, ip, r0, lsr #9 8000e92: ea40 2051 orr.w r0, r0, r1, lsr #9 8000e96: 3a7f subs r2, #127 ; 0x7f 8000e98: bfc2 ittt gt 8000e9a: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff 8000e9e: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8000ea2: 4770 bxgt lr 8000ea4: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000ea8: f04f 0300 mov.w r3, #0 8000eac: 3a01 subs r2, #1 8000eae: dc5d bgt.n 8000f6c <__aeabi_fmul+0x150> 8000eb0: f112 0f19 cmn.w r2, #25 8000eb4: bfdc itt le 8000eb6: f000 4000 andle.w r0, r0, #2147483648 ; 0x80000000 8000eba: 4770 bxle lr 8000ebc: f1c2 0200 rsb r2, r2, #0 8000ec0: 0041 lsls r1, r0, #1 8000ec2: fa21 f102 lsr.w r1, r1, r2 8000ec6: f1c2 0220 rsb r2, r2, #32 8000eca: fa00 fc02 lsl.w ip, r0, r2 8000ece: ea5f 0031 movs.w r0, r1, rrx 8000ed2: f140 0000 adc.w r0, r0, #0 8000ed6: ea53 034c orrs.w r3, r3, ip, lsl #1 8000eda: bf08 it eq 8000edc: ea20 70dc biceq.w r0, r0, ip, lsr #31 8000ee0: 4770 bx lr 8000ee2: f092 0f00 teq r2, #0 8000ee6: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000 8000eea: bf02 ittt eq 8000eec: 0040 lsleq r0, r0, #1 8000eee: f410 0f00 tsteq.w r0, #8388608 ; 0x800000 8000ef2: 3a01 subeq r2, #1 8000ef4: d0f9 beq.n 8000eea <__aeabi_fmul+0xce> 8000ef6: ea40 000c orr.w r0, r0, ip 8000efa: f093 0f00 teq r3, #0 8000efe: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 8000f02: bf02 ittt eq 8000f04: 0049 lsleq r1, r1, #1 8000f06: f411 0f00 tsteq.w r1, #8388608 ; 0x800000 8000f0a: 3b01 subeq r3, #1 8000f0c: d0f9 beq.n 8000f02 <__aeabi_fmul+0xe6> 8000f0e: ea41 010c orr.w r1, r1, ip 8000f12: e78f b.n 8000e34 <__aeabi_fmul+0x18> 8000f14: ea0c 53d1 and.w r3, ip, r1, lsr #23 8000f18: ea92 0f0c teq r2, ip 8000f1c: bf18 it ne 8000f1e: ea93 0f0c teqne r3, ip 8000f22: d00a beq.n 8000f3a <__aeabi_fmul+0x11e> 8000f24: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000 8000f28: bf18 it ne 8000f2a: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000 8000f2e: d1d8 bne.n 8000ee2 <__aeabi_fmul+0xc6> 8000f30: ea80 0001 eor.w r0, r0, r1 8000f34: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 8000f38: 4770 bx lr 8000f3a: f090 0f00 teq r0, #0 8000f3e: bf17 itett ne 8000f40: f090 4f00 teqne r0, #2147483648 ; 0x80000000 8000f44: 4608 moveq r0, r1 8000f46: f091 0f00 teqne r1, #0 8000f4a: f091 4f00 teqne r1, #2147483648 ; 0x80000000 8000f4e: d014 beq.n 8000f7a <__aeabi_fmul+0x15e> 8000f50: ea92 0f0c teq r2, ip 8000f54: d101 bne.n 8000f5a <__aeabi_fmul+0x13e> 8000f56: 0242 lsls r2, r0, #9 8000f58: d10f bne.n 8000f7a <__aeabi_fmul+0x15e> 8000f5a: ea93 0f0c teq r3, ip 8000f5e: d103 bne.n 8000f68 <__aeabi_fmul+0x14c> 8000f60: 024b lsls r3, r1, #9 8000f62: bf18 it ne 8000f64: 4608 movne r0, r1 8000f66: d108 bne.n 8000f7a <__aeabi_fmul+0x15e> 8000f68: ea80 0001 eor.w r0, r0, r1 8000f6c: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000 8000f70: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8000f74: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8000f78: 4770 bx lr 8000f7a: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000 8000f7e: f440 0040 orr.w r0, r0, #12582912 ; 0xc00000 8000f82: 4770 bx lr 08000f84 <__aeabi_fdiv>: 8000f84: f04f 0cff mov.w ip, #255 ; 0xff 8000f88: ea1c 52d0 ands.w r2, ip, r0, lsr #23 8000f8c: bf1e ittt ne 8000f8e: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8000f92: ea92 0f0c teqne r2, ip 8000f96: ea93 0f0c teqne r3, ip 8000f9a: d069 beq.n 8001070 <__aeabi_fdiv+0xec> 8000f9c: eba2 0203 sub.w r2, r2, r3 8000fa0: ea80 0c01 eor.w ip, r0, r1 8000fa4: 0249 lsls r1, r1, #9 8000fa6: ea4f 2040 mov.w r0, r0, lsl #9 8000faa: d037 beq.n 800101c <__aeabi_fdiv+0x98> 8000fac: f04f 5380 mov.w r3, #268435456 ; 0x10000000 8000fb0: ea43 1111 orr.w r1, r3, r1, lsr #4 8000fb4: ea43 1310 orr.w r3, r3, r0, lsr #4 8000fb8: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000 8000fbc: 428b cmp r3, r1 8000fbe: bf38 it cc 8000fc0: 005b lslcc r3, r3, #1 8000fc2: f142 027d adc.w r2, r2, #125 ; 0x7d 8000fc6: f44f 0c00 mov.w ip, #8388608 ; 0x800000 8000fca: 428b cmp r3, r1 8000fcc: bf24 itt cs 8000fce: 1a5b subcs r3, r3, r1 8000fd0: ea40 000c orrcs.w r0, r0, ip 8000fd4: ebb3 0f51 cmp.w r3, r1, lsr #1 8000fd8: bf24 itt cs 8000fda: eba3 0351 subcs.w r3, r3, r1, lsr #1 8000fde: ea40 005c orrcs.w r0, r0, ip, lsr #1 8000fe2: ebb3 0f91 cmp.w r3, r1, lsr #2 8000fe6: bf24 itt cs 8000fe8: eba3 0391 subcs.w r3, r3, r1, lsr #2 8000fec: ea40 009c orrcs.w r0, r0, ip, lsr #2 8000ff0: ebb3 0fd1 cmp.w r3, r1, lsr #3 8000ff4: bf24 itt cs 8000ff6: eba3 03d1 subcs.w r3, r3, r1, lsr #3 8000ffa: ea40 00dc orrcs.w r0, r0, ip, lsr #3 8000ffe: 011b lsls r3, r3, #4 8001000: bf18 it ne 8001002: ea5f 1c1c movsne.w ip, ip, lsr #4 8001006: d1e0 bne.n 8000fca <__aeabi_fdiv+0x46> 8001008: 2afd cmp r2, #253 ; 0xfd 800100a: f63f af50 bhi.w 8000eae <__aeabi_fmul+0x92> 800100e: 428b cmp r3, r1 8001010: eb40 50c2 adc.w r0, r0, r2, lsl #23 8001014: bf08 it eq 8001016: f020 0001 biceq.w r0, r0, #1 800101a: 4770 bx lr 800101c: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000 8001020: ea4c 2050 orr.w r0, ip, r0, lsr #9 8001024: 327f adds r2, #127 ; 0x7f 8001026: bfc2 ittt gt 8001028: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff 800102c: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8001030: 4770 bxgt lr 8001032: f440 0000 orr.w r0, r0, #8388608 ; 0x800000 8001036: f04f 0300 mov.w r3, #0 800103a: 3a01 subs r2, #1 800103c: e737 b.n 8000eae <__aeabi_fmul+0x92> 800103e: f092 0f00 teq r2, #0 8001042: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000 8001046: bf02 ittt eq 8001048: 0040 lsleq r0, r0, #1 800104a: f410 0f00 tsteq.w r0, #8388608 ; 0x800000 800104e: 3a01 subeq r2, #1 8001050: d0f9 beq.n 8001046 <__aeabi_fdiv+0xc2> 8001052: ea40 000c orr.w r0, r0, ip 8001056: f093 0f00 teq r3, #0 800105a: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000 800105e: bf02 ittt eq 8001060: 0049 lsleq r1, r1, #1 8001062: f411 0f00 tsteq.w r1, #8388608 ; 0x800000 8001066: 3b01 subeq r3, #1 8001068: d0f9 beq.n 800105e <__aeabi_fdiv+0xda> 800106a: ea41 010c orr.w r1, r1, ip 800106e: e795 b.n 8000f9c <__aeabi_fdiv+0x18> 8001070: ea0c 53d1 and.w r3, ip, r1, lsr #23 8001074: ea92 0f0c teq r2, ip 8001078: d108 bne.n 800108c <__aeabi_fdiv+0x108> 800107a: 0242 lsls r2, r0, #9 800107c: f47f af7d bne.w 8000f7a <__aeabi_fmul+0x15e> 8001080: ea93 0f0c teq r3, ip 8001084: f47f af70 bne.w 8000f68 <__aeabi_fmul+0x14c> 8001088: 4608 mov r0, r1 800108a: e776 b.n 8000f7a <__aeabi_fmul+0x15e> 800108c: ea93 0f0c teq r3, ip 8001090: d104 bne.n 800109c <__aeabi_fdiv+0x118> 8001092: 024b lsls r3, r1, #9 8001094: f43f af4c beq.w 8000f30 <__aeabi_fmul+0x114> 8001098: 4608 mov r0, r1 800109a: e76e b.n 8000f7a <__aeabi_fmul+0x15e> 800109c: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000 80010a0: bf18 it ne 80010a2: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000 80010a6: d1ca bne.n 800103e <__aeabi_fdiv+0xba> 80010a8: f030 4200 bics.w r2, r0, #2147483648 ; 0x80000000 80010ac: f47f af5c bne.w 8000f68 <__aeabi_fmul+0x14c> 80010b0: f031 4300 bics.w r3, r1, #2147483648 ; 0x80000000 80010b4: f47f af3c bne.w 8000f30 <__aeabi_fmul+0x114> 80010b8: e75f b.n 8000f7a <__aeabi_fmul+0x15e> 80010ba: bf00 nop 080010bc <__aeabi_f2iz>: 80010bc: ea4f 0240 mov.w r2, r0, lsl #1 80010c0: f1b2 4ffe cmp.w r2, #2130706432 ; 0x7f000000 80010c4: d30f bcc.n 80010e6 <__aeabi_f2iz+0x2a> 80010c6: f04f 039e mov.w r3, #158 ; 0x9e 80010ca: ebb3 6212 subs.w r2, r3, r2, lsr #24 80010ce: d90d bls.n 80010ec <__aeabi_f2iz+0x30> 80010d0: ea4f 2300 mov.w r3, r0, lsl #8 80010d4: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000 80010d8: f010 4f00 tst.w r0, #2147483648 ; 0x80000000 80010dc: fa23 f002 lsr.w r0, r3, r2 80010e0: bf18 it ne 80010e2: 4240 negne r0, r0 80010e4: 4770 bx lr 80010e6: f04f 0000 mov.w r0, #0 80010ea: 4770 bx lr 80010ec: f112 0f61 cmn.w r2, #97 ; 0x61 80010f0: d101 bne.n 80010f6 <__aeabi_f2iz+0x3a> 80010f2: 0242 lsls r2, r0, #9 80010f4: d105 bne.n 8001102 <__aeabi_f2iz+0x46> 80010f6: f010 4000 ands.w r0, r0, #2147483648 ; 0x80000000 80010fa: bf08 it eq 80010fc: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000 8001100: 4770 bx lr 8001102: f04f 0000 mov.w r0, #0 8001106: 4770 bx lr 08001108
: /** * @brief The application entry point. * @retval int */ int main(void) { 8001108: b580 push {r7, lr} 800110a: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 800110c: f000 fcb4 bl 8001a78 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8001110: f000 f80d bl 800112e /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 8001114: f000 f8ea bl 80012ec MX_FSMC_Init(); 8001118: f000 f9e6 bl 80014e8 MX_I2C2_Init(); 800111c: f000 f84c bl 80011b8 MX_TIM6_Init(); 8001120: f000 f8ae bl 8001280 MX_SPI1_Init(); 8001124: f000 f876 bl 8001214 /* USER CODE BEGIN 2 */ main_app(); 8001128: f005 ff2e bl 8006f88 /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) 800112c: e7fe b.n 800112c 0800112e : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 800112e: b580 push {r7, lr} 8001130: b090 sub sp, #64 ; 0x40 8001132: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8001134: f107 0318 add.w r3, r7, #24 8001138: 2228 movs r2, #40 ; 0x28 800113a: 2100 movs r1, #0 800113c: 4618 mov r0, r3 800113e: f006 fa9b bl 8007678 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8001142: 1d3b adds r3, r7, #4 8001144: 2200 movs r2, #0 8001146: 601a str r2, [r3, #0] 8001148: 605a str r2, [r3, #4] 800114a: 609a str r2, [r3, #8] 800114c: 60da str r2, [r3, #12] 800114e: 611a str r2, [r3, #16] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 8001150: 2301 movs r3, #1 8001152: 61bb str r3, [r7, #24] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8001154: f44f 3380 mov.w r3, #65536 ; 0x10000 8001158: 61fb str r3, [r7, #28] RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 800115a: 2300 movs r3, #0 800115c: 623b str r3, [r7, #32] RCC_OscInitStruct.HSIState = RCC_HSI_ON; 800115e: 2301 movs r3, #1 8001160: 62bb str r3, [r7, #40] ; 0x28 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8001162: 2302 movs r3, #2 8001164: 637b str r3, [r7, #52] ; 0x34 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 8001166: f44f 3380 mov.w r3, #65536 ; 0x10000 800116a: 63bb str r3, [r7, #56] ; 0x38 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 800116c: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000 8001170: 63fb str r3, [r7, #60] ; 0x3c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001172: f107 0318 add.w r3, r7, #24 8001176: 4618 mov r0, r3 8001178: f001 ffd6 bl 8003128 800117c: 4603 mov r3, r0 800117e: 2b00 cmp r3, #0 8001180: d001 beq.n 8001186 { Error_Handler(); 8001182: f000 fa15 bl 80015b0 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001186: 230f movs r3, #15 8001188: 607b str r3, [r7, #4] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 800118a: 2302 movs r3, #2 800118c: 60bb str r3, [r7, #8] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800118e: 2300 movs r3, #0 8001190: 60fb str r3, [r7, #12] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8001192: f44f 6380 mov.w r3, #1024 ; 0x400 8001196: 613b str r3, [r7, #16] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8001198: 2300 movs r3, #0 800119a: 617b str r3, [r7, #20] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 800119c: 1d3b adds r3, r7, #4 800119e: 2102 movs r1, #2 80011a0: 4618 mov r0, r3 80011a2: f002 fa41 bl 8003628 80011a6: 4603 mov r3, r0 80011a8: 2b00 cmp r3, #0 80011aa: d001 beq.n 80011b0 { Error_Handler(); 80011ac: f000 fa00 bl 80015b0 } } 80011b0: bf00 nop 80011b2: 3740 adds r7, #64 ; 0x40 80011b4: 46bd mov sp, r7 80011b6: bd80 pop {r7, pc} 080011b8 : * @brief I2C2 Initialization Function * @param None * @retval None */ static void MX_I2C2_Init(void) { 80011b8: b580 push {r7, lr} 80011ba: af00 add r7, sp, #0 /* USER CODE END I2C2_Init 0 */ /* USER CODE BEGIN I2C2_Init 1 */ /* USER CODE END I2C2_Init 1 */ hi2c2.Instance = I2C2; 80011bc: 4b12 ldr r3, [pc, #72] ; (8001208 ) 80011be: 4a13 ldr r2, [pc, #76] ; (800120c ) 80011c0: 601a str r2, [r3, #0] hi2c2.Init.ClockSpeed = 100000; 80011c2: 4b11 ldr r3, [pc, #68] ; (8001208 ) 80011c4: 4a12 ldr r2, [pc, #72] ; (8001210 ) 80011c6: 605a str r2, [r3, #4] hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; 80011c8: 4b0f ldr r3, [pc, #60] ; (8001208 ) 80011ca: 2200 movs r2, #0 80011cc: 609a str r2, [r3, #8] hi2c2.Init.OwnAddress1 = 0; 80011ce: 4b0e ldr r3, [pc, #56] ; (8001208 ) 80011d0: 2200 movs r2, #0 80011d2: 60da str r2, [r3, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 80011d4: 4b0c ldr r3, [pc, #48] ; (8001208 ) 80011d6: f44f 4280 mov.w r2, #16384 ; 0x4000 80011da: 611a str r2, [r3, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 80011dc: 4b0a ldr r3, [pc, #40] ; (8001208 ) 80011de: 2200 movs r2, #0 80011e0: 615a str r2, [r3, #20] hi2c2.Init.OwnAddress2 = 0; 80011e2: 4b09 ldr r3, [pc, #36] ; (8001208 ) 80011e4: 2200 movs r2, #0 80011e6: 619a str r2, [r3, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 80011e8: 4b07 ldr r3, [pc, #28] ; (8001208 ) 80011ea: 2200 movs r2, #0 80011ec: 61da str r2, [r3, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 80011ee: 4b06 ldr r3, [pc, #24] ; (8001208 ) 80011f0: 2200 movs r2, #0 80011f2: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) 80011f4: 4804 ldr r0, [pc, #16] ; (8001208 ) 80011f6: f000 ff97 bl 8002128 80011fa: 4603 mov r3, r0 80011fc: 2b00 cmp r3, #0 80011fe: d001 beq.n 8001204 { Error_Handler(); 8001200: f000 f9d6 bl 80015b0 } /* USER CODE BEGIN I2C2_Init 2 */ /* USER CODE END I2C2_Init 2 */ } 8001204: bf00 nop 8001206: bd80 pop {r7, pc} 8001208: 20000214 .word 0x20000214 800120c: 40005800 .word 0x40005800 8001210: 000186a0 .word 0x000186a0 08001214 : * @brief SPI1 Initialization Function * @param None * @retval None */ static void MX_SPI1_Init(void) { 8001214: b580 push {r7, lr} 8001216: af00 add r7, sp, #0 /* USER CODE BEGIN SPI1_Init 1 */ /* USER CODE END SPI1_Init 1 */ /* SPI1 parameter configuration*/ hspi1.Instance = SPI1; 8001218: 4b17 ldr r3, [pc, #92] ; (8001278 ) 800121a: 4a18 ldr r2, [pc, #96] ; (800127c ) 800121c: 601a str r2, [r3, #0] hspi1.Init.Mode = SPI_MODE_MASTER; 800121e: 4b16 ldr r3, [pc, #88] ; (8001278 ) 8001220: f44f 7282 mov.w r2, #260 ; 0x104 8001224: 605a str r2, [r3, #4] hspi1.Init.Direction = SPI_DIRECTION_2LINES; 8001226: 4b14 ldr r3, [pc, #80] ; (8001278 ) 8001228: 2200 movs r2, #0 800122a: 609a str r2, [r3, #8] hspi1.Init.DataSize = SPI_DATASIZE_8BIT; 800122c: 4b12 ldr r3, [pc, #72] ; (8001278 ) 800122e: 2200 movs r2, #0 8001230: 60da str r2, [r3, #12] hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; 8001232: 4b11 ldr r3, [pc, #68] ; (8001278 ) 8001234: 2200 movs r2, #0 8001236: 611a str r2, [r3, #16] hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; 8001238: 4b0f ldr r3, [pc, #60] ; (8001278 ) 800123a: 2200 movs r2, #0 800123c: 615a str r2, [r3, #20] hspi1.Init.NSS = SPI_NSS_SOFT; 800123e: 4b0e ldr r3, [pc, #56] ; (8001278 ) 8001240: f44f 7200 mov.w r2, #512 ; 0x200 8001244: 619a str r2, [r3, #24] hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; 8001246: 4b0c ldr r3, [pc, #48] ; (8001278 ) 8001248: 2208 movs r2, #8 800124a: 61da str r2, [r3, #28] hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; 800124c: 4b0a ldr r3, [pc, #40] ; (8001278 ) 800124e: 2200 movs r2, #0 8001250: 621a str r2, [r3, #32] hspi1.Init.TIMode = SPI_TIMODE_DISABLE; 8001252: 4b09 ldr r3, [pc, #36] ; (8001278 ) 8001254: 2200 movs r2, #0 8001256: 625a str r2, [r3, #36] ; 0x24 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 8001258: 4b07 ldr r3, [pc, #28] ; (8001278 ) 800125a: 2200 movs r2, #0 800125c: 629a str r2, [r3, #40] ; 0x28 hspi1.Init.CRCPolynomial = 10; 800125e: 4b06 ldr r3, [pc, #24] ; (8001278 ) 8001260: 220a movs r2, #10 8001262: 62da str r2, [r3, #44] ; 0x2c if (HAL_SPI_Init(&hspi1) != HAL_OK) 8001264: 4804 ldr r0, [pc, #16] ; (8001278 ) 8001266: f002 fb65 bl 8003934 800126a: 4603 mov r3, r0 800126c: 2b00 cmp r3, #0 800126e: d001 beq.n 8001274 { Error_Handler(); 8001270: f000 f99e bl 80015b0 } /* USER CODE BEGIN SPI1_Init 2 */ /* USER CODE END SPI1_Init 2 */ } 8001274: bf00 nop 8001276: bd80 pop {r7, pc} 8001278: 200002f8 .word 0x200002f8 800127c: 40013000 .word 0x40013000 08001280 : * @brief TIM6 Initialization Function * @param None * @retval None */ static void MX_TIM6_Init(void) { 8001280: b580 push {r7, lr} 8001282: b082 sub sp, #8 8001284: af00 add r7, sp, #0 /* USER CODE BEGIN TIM6_Init 0 */ /* USER CODE END TIM6_Init 0 */ TIM_MasterConfigTypeDef sMasterConfig = {0}; 8001286: 463b mov r3, r7 8001288: 2200 movs r2, #0 800128a: 601a str r2, [r3, #0] 800128c: 605a str r2, [r3, #4] /* USER CODE BEGIN TIM6_Init 1 */ /* USER CODE END TIM6_Init 1 */ htim6.Instance = TIM6; 800128e: 4b15 ldr r3, [pc, #84] ; (80012e4 ) 8001290: 4a15 ldr r2, [pc, #84] ; (80012e8 ) 8001292: 601a str r2, [r3, #0] htim6.Init.Prescaler = 72-1; 8001294: 4b13 ldr r3, [pc, #76] ; (80012e4 ) 8001296: 2247 movs r2, #71 ; 0x47 8001298: 605a str r2, [r3, #4] htim6.Init.CounterMode = TIM_COUNTERMODE_UP; 800129a: 4b12 ldr r3, [pc, #72] ; (80012e4 ) 800129c: 2200 movs r2, #0 800129e: 609a str r2, [r3, #8] htim6.Init.Period = 10000-1; 80012a0: 4b10 ldr r3, [pc, #64] ; (80012e4 ) 80012a2: f242 720f movw r2, #9999 ; 0x270f 80012a6: 60da str r2, [r3, #12] htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 80012a8: 4b0e ldr r3, [pc, #56] ; (80012e4 ) 80012aa: 2200 movs r2, #0 80012ac: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim6) != HAL_OK) 80012ae: 480d ldr r0, [pc, #52] ; (80012e4 ) 80012b0: f003 f8f9 bl 80044a6 80012b4: 4603 mov r3, r0 80012b6: 2b00 cmp r3, #0 80012b8: d001 beq.n 80012be { Error_Handler(); 80012ba: f000 f979 bl 80015b0 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 80012be: 2300 movs r3, #0 80012c0: 603b str r3, [r7, #0] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 80012c2: 2300 movs r3, #0 80012c4: 607b str r3, [r7, #4] if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) 80012c6: 463b mov r3, r7 80012c8: 4619 mov r1, r3 80012ca: 4806 ldr r0, [pc, #24] ; (80012e4 ) 80012cc: f003 fb0e bl 80048ec 80012d0: 4603 mov r3, r0 80012d2: 2b00 cmp r3, #0 80012d4: d001 beq.n 80012da { Error_Handler(); 80012d6: f000 f96b bl 80015b0 } /* USER CODE BEGIN TIM6_Init 2 */ /* USER CODE END TIM6_Init 2 */ } 80012da: bf00 nop 80012dc: 3708 adds r7, #8 80012de: 46bd mov sp, r7 80012e0: bd80 pop {r7, pc} 80012e2: bf00 nop 80012e4: 200002b0 .word 0x200002b0 80012e8: 40001000 .word 0x40001000 080012ec : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 80012ec: b580 push {r7, lr} 80012ee: b08a sub sp, #40 ; 0x28 80012f0: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80012f2: f107 0318 add.w r3, r7, #24 80012f6: 2200 movs r2, #0 80012f8: 601a str r2, [r3, #0] 80012fa: 605a str r2, [r3, #4] 80012fc: 609a str r2, [r3, #8] 80012fe: 60da str r2, [r3, #12] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); 8001300: 4b74 ldr r3, [pc, #464] ; (80014d4 ) 8001302: 699b ldr r3, [r3, #24] 8001304: 4a73 ldr r2, [pc, #460] ; (80014d4 ) 8001306: f043 0340 orr.w r3, r3, #64 ; 0x40 800130a: 6193 str r3, [r2, #24] 800130c: 4b71 ldr r3, [pc, #452] ; (80014d4 ) 800130e: 699b ldr r3, [r3, #24] 8001310: f003 0340 and.w r3, r3, #64 ; 0x40 8001314: 617b str r3, [r7, #20] 8001316: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOF_CLK_ENABLE(); 8001318: 4b6e ldr r3, [pc, #440] ; (80014d4 ) 800131a: 699b ldr r3, [r3, #24] 800131c: 4a6d ldr r2, [pc, #436] ; (80014d4 ) 800131e: f043 0380 orr.w r3, r3, #128 ; 0x80 8001322: 6193 str r3, [r2, #24] 8001324: 4b6b ldr r3, [pc, #428] ; (80014d4 ) 8001326: 699b ldr r3, [r3, #24] 8001328: f003 0380 and.w r3, r3, #128 ; 0x80 800132c: 613b str r3, [r7, #16] 800132e: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001330: 4b68 ldr r3, [pc, #416] ; (80014d4 ) 8001332: 699b ldr r3, [r3, #24] 8001334: 4a67 ldr r2, [pc, #412] ; (80014d4 ) 8001336: f043 0304 orr.w r3, r3, #4 800133a: 6193 str r3, [r2, #24] 800133c: 4b65 ldr r3, [pc, #404] ; (80014d4 ) 800133e: 699b ldr r3, [r3, #24] 8001340: f003 0304 and.w r3, r3, #4 8001344: 60fb str r3, [r7, #12] 8001346: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOB_CLK_ENABLE(); 8001348: 4b62 ldr r3, [pc, #392] ; (80014d4 ) 800134a: 699b ldr r3, [r3, #24] 800134c: 4a61 ldr r2, [pc, #388] ; (80014d4 ) 800134e: f043 0308 orr.w r3, r3, #8 8001352: 6193 str r3, [r2, #24] 8001354: 4b5f ldr r3, [pc, #380] ; (80014d4 ) 8001356: 699b ldr r3, [r3, #24] 8001358: f003 0308 and.w r3, r3, #8 800135c: 60bb str r3, [r7, #8] 800135e: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOG_CLK_ENABLE(); 8001360: 4b5c ldr r3, [pc, #368] ; (80014d4 ) 8001362: 699b ldr r3, [r3, #24] 8001364: 4a5b ldr r2, [pc, #364] ; (80014d4 ) 8001366: f443 7380 orr.w r3, r3, #256 ; 0x100 800136a: 6193 str r3, [r2, #24] 800136c: 4b59 ldr r3, [pc, #356] ; (80014d4 ) 800136e: 699b ldr r3, [r3, #24] 8001370: f403 7380 and.w r3, r3, #256 ; 0x100 8001374: 607b str r3, [r7, #4] 8001376: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOD_CLK_ENABLE(); 8001378: 4b56 ldr r3, [pc, #344] ; (80014d4 ) 800137a: 699b ldr r3, [r3, #24] 800137c: 4a55 ldr r2, [pc, #340] ; (80014d4 ) 800137e: f043 0320 orr.w r3, r3, #32 8001382: 6193 str r3, [r2, #24] 8001384: 4b53 ldr r3, [pc, #332] ; (80014d4 ) 8001386: 699b ldr r3, [r3, #24] 8001388: f003 0320 and.w r3, r3, #32 800138c: 603b str r3, [r7, #0] 800138e: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(TDIN_GPIO_Port, TDIN_Pin, GPIO_PIN_SET); 8001390: 2201 movs r2, #1 8001392: f44f 7100 mov.w r1, #512 ; 0x200 8001396: 4850 ldr r0, [pc, #320] ; (80014d8 ) 8001398: f000 fead bl 80020f6 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(RC522_CS_GPIO_Port, RC522_CS_Pin, GPIO_PIN_RESET); 800139c: 2200 movs r2, #0 800139e: 2110 movs r1, #16 80013a0: 484e ldr r0, [pc, #312] ; (80014dc ) 80013a2: f000 fea8 bl 80020f6 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(LCD_BL_GPIO_Port, LCD_BL_Pin, GPIO_PIN_RESET); 80013a6: 2200 movs r2, #0 80013a8: 2101 movs r1, #1 80013aa: 484d ldr r0, [pc, #308] ; (80014e0 ) 80013ac: f000 fea3 bl 80020f6 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, TCLK_Pin|TCS_Pin|MAX_IRD_Pin|MAX_RD_Pin, GPIO_PIN_SET); 80013b0: 2201 movs r2, #1 80013b2: f245 0106 movw r1, #20486 ; 0x5006 80013b6: 484a ldr r0, [pc, #296] ; (80014e0 ) 80013b8: f000 fe9d bl 80020f6 /*Configure GPIO pins : KEY3_Pin KEY2_Pin KEY1_Pin */ GPIO_InitStruct.Pin = KEY3_Pin|KEY2_Pin|KEY1_Pin; 80013bc: 231c movs r3, #28 80013be: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80013c0: 2300 movs r3, #0 80013c2: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 80013c4: 2301 movs r3, #1 80013c6: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 80013c8: f107 0318 add.w r3, r7, #24 80013cc: 4619 mov r1, r3 80013ce: 4845 ldr r0, [pc, #276] ; (80014e4 ) 80013d0: f000 fce6 bl 8001da0 /*Configure GPIO pin : TDOUT_Pin */ GPIO_InitStruct.Pin = TDOUT_Pin; 80013d4: f44f 7380 mov.w r3, #256 ; 0x100 80013d8: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80013da: 2300 movs r3, #0 80013dc: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 80013de: 2300 movs r3, #0 80013e0: 623b str r3, [r7, #32] HAL_GPIO_Init(TDOUT_GPIO_Port, &GPIO_InitStruct); 80013e2: f107 0318 add.w r3, r7, #24 80013e6: 4619 mov r1, r3 80013e8: 483b ldr r0, [pc, #236] ; (80014d8 ) 80013ea: f000 fcd9 bl 8001da0 /*Configure GPIO pin : TDIN_Pin */ GPIO_InitStruct.Pin = TDIN_Pin; 80013ee: f44f 7300 mov.w r3, #512 ; 0x200 80013f2: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80013f4: 2301 movs r3, #1 80013f6: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 80013f8: 2300 movs r3, #0 80013fa: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80013fc: 2303 movs r3, #3 80013fe: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(TDIN_GPIO_Port, &GPIO_InitStruct); 8001400: f107 0318 add.w r3, r7, #24 8001404: 4619 mov r1, r3 8001406: 4834 ldr r0, [pc, #208] ; (80014d8 ) 8001408: f000 fcca bl 8001da0 /*Configure GPIO pin : TPEN_Pin */ GPIO_InitStruct.Pin = TPEN_Pin; 800140c: f44f 6380 mov.w r3, #1024 ; 0x400 8001410: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001412: 2300 movs r3, #0 8001414: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 8001416: 2301 movs r3, #1 8001418: 623b str r3, [r7, #32] HAL_GPIO_Init(TPEN_GPIO_Port, &GPIO_InitStruct); 800141a: f107 0318 add.w r3, r7, #24 800141e: 4619 mov r1, r3 8001420: 482d ldr r0, [pc, #180] ; (80014d8 ) 8001422: f000 fcbd bl 8001da0 /*Configure GPIO pin : KEY0_Pin */ GPIO_InitStruct.Pin = KEY0_Pin; 8001426: 2301 movs r3, #1 8001428: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800142a: 2300 movs r3, #0 800142c: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 800142e: 2300 movs r3, #0 8001430: 623b str r3, [r7, #32] HAL_GPIO_Init(KEY0_GPIO_Port, &GPIO_InitStruct); 8001432: f107 0318 add.w r3, r7, #24 8001436: 4619 mov r1, r3 8001438: 4828 ldr r0, [pc, #160] ; (80014dc ) 800143a: f000 fcb1 bl 8001da0 /*Configure GPIO pin : RC522_CS_Pin */ GPIO_InitStruct.Pin = RC522_CS_Pin; 800143e: 2310 movs r3, #16 8001440: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001442: 2301 movs r3, #1 8001444: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001446: 2300 movs r3, #0 8001448: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800144a: 2302 movs r3, #2 800144c: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(RC522_CS_GPIO_Port, &GPIO_InitStruct); 800144e: f107 0318 add.w r3, r7, #24 8001452: 4619 mov r1, r3 8001454: 4821 ldr r0, [pc, #132] ; (80014dc ) 8001456: f000 fca3 bl 8001da0 /*Configure GPIO pin : LCD_BL_Pin */ GPIO_InitStruct.Pin = LCD_BL_Pin; 800145a: 2301 movs r3, #1 800145c: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800145e: 2301 movs r3, #1 8001460: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001462: 2300 movs r3, #0 8001464: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001466: 2302 movs r3, #2 8001468: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(LCD_BL_GPIO_Port, &GPIO_InitStruct); 800146a: f107 0318 add.w r3, r7, #24 800146e: 4619 mov r1, r3 8001470: 481b ldr r0, [pc, #108] ; (80014e0 ) 8001472: f000 fc95 bl 8001da0 /*Configure GPIO pins : TCLK_Pin TCS_Pin */ GPIO_InitStruct.Pin = TCLK_Pin|TCS_Pin; 8001476: 2306 movs r3, #6 8001478: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800147a: 2301 movs r3, #1 800147c: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_NOPULL; 800147e: 2300 movs r3, #0 8001480: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001482: 2303 movs r3, #3 8001484: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001486: f107 0318 add.w r3, r7, #24 800148a: 4619 mov r1, r3 800148c: 4814 ldr r0, [pc, #80] ; (80014e0 ) 800148e: f000 fc87 bl 8001da0 /*Configure GPIO pins : MAX_IRD_Pin MAX_RD_Pin */ GPIO_InitStruct.Pin = MAX_IRD_Pin|MAX_RD_Pin; 8001492: f44f 43a0 mov.w r3, #20480 ; 0x5000 8001496: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001498: 2301 movs r3, #1 800149a: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 800149c: 2301 movs r3, #1 800149e: 623b str r3, [r7, #32] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80014a0: 2303 movs r3, #3 80014a2: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80014a4: f107 0318 add.w r3, r7, #24 80014a8: 4619 mov r1, r3 80014aa: 480d ldr r0, [pc, #52] ; (80014e0 ) 80014ac: f000 fc78 bl 8001da0 /*Configure GPIO pin : MAX_INT_Pin */ GPIO_InitStruct.Pin = MAX_INT_Pin; 80014b0: f44f 5300 mov.w r3, #8192 ; 0x2000 80014b4: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80014b6: 2300 movs r3, #0 80014b8: 61fb str r3, [r7, #28] GPIO_InitStruct.Pull = GPIO_PULLUP; 80014ba: 2301 movs r3, #1 80014bc: 623b str r3, [r7, #32] HAL_GPIO_Init(MAX_INT_GPIO_Port, &GPIO_InitStruct); 80014be: f107 0318 add.w r3, r7, #24 80014c2: 4619 mov r1, r3 80014c4: 4806 ldr r0, [pc, #24] ; (80014e0 ) 80014c6: f000 fc6b bl 8001da0 } 80014ca: bf00 nop 80014cc: 3728 adds r7, #40 ; 0x28 80014ce: 46bd mov sp, r7 80014d0: bd80 pop {r7, pc} 80014d2: bf00 nop 80014d4: 40021000 .word 0x40021000 80014d8: 40011c00 .word 0x40011c00 80014dc: 40010800 .word 0x40010800 80014e0: 40010c00 .word 0x40010c00 80014e4: 40011800 .word 0x40011800 080014e8 : /* FSMC initialization function */ static void MX_FSMC_Init(void) { 80014e8: b580 push {r7, lr} 80014ea: b088 sub sp, #32 80014ec: af00 add r7, sp, #0 /* USER CODE BEGIN FSMC_Init 0 */ /* USER CODE END FSMC_Init 0 */ FSMC_NORSRAM_TimingTypeDef Timing = {0}; 80014ee: 1d3b adds r3, r7, #4 80014f0: 2200 movs r2, #0 80014f2: 601a str r2, [r3, #0] 80014f4: 605a str r2, [r3, #4] 80014f6: 609a str r2, [r3, #8] 80014f8: 60da str r2, [r3, #12] 80014fa: 611a str r2, [r3, #16] 80014fc: 615a str r2, [r3, #20] 80014fe: 619a str r2, [r3, #24] /* USER CODE END FSMC_Init 1 */ /** Perform the SRAM1 memory initialization sequence */ hsram1.Instance = FSMC_NORSRAM_DEVICE; 8001500: 4b28 ldr r3, [pc, #160] ; (80015a4 ) 8001502: f04f 4220 mov.w r2, #2684354560 ; 0xa0000000 8001506: 601a str r2, [r3, #0] hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE; 8001508: 4b26 ldr r3, [pc, #152] ; (80015a4 ) 800150a: 4a27 ldr r2, [pc, #156] ; (80015a8 ) 800150c: 605a str r2, [r3, #4] /* hsram1.Init */ hsram1.Init.NSBank = FSMC_NORSRAM_BANK4; 800150e: 4b25 ldr r3, [pc, #148] ; (80015a4 ) 8001510: 2206 movs r2, #6 8001512: 609a str r2, [r3, #8] hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE; 8001514: 4b23 ldr r3, [pc, #140] ; (80015a4 ) 8001516: 2200 movs r2, #0 8001518: 60da str r2, [r3, #12] hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM; 800151a: 4b22 ldr r3, [pc, #136] ; (80015a4 ) 800151c: 2200 movs r2, #0 800151e: 611a str r2, [r3, #16] hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16; 8001520: 4b20 ldr r3, [pc, #128] ; (80015a4 ) 8001522: 2210 movs r2, #16 8001524: 615a str r2, [r3, #20] hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE; 8001526: 4b1f ldr r3, [pc, #124] ; (80015a4 ) 8001528: 2200 movs r2, #0 800152a: 619a str r2, [r3, #24] hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW; 800152c: 4b1d ldr r3, [pc, #116] ; (80015a4 ) 800152e: 2200 movs r2, #0 8001530: 61da str r2, [r3, #28] hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE; 8001532: 4b1c ldr r3, [pc, #112] ; (80015a4 ) 8001534: 2200 movs r2, #0 8001536: 621a str r2, [r3, #32] hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS; 8001538: 4b1a ldr r3, [pc, #104] ; (80015a4 ) 800153a: 2200 movs r2, #0 800153c: 625a str r2, [r3, #36] ; 0x24 hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE; 800153e: 4b19 ldr r3, [pc, #100] ; (80015a4 ) 8001540: f44f 5280 mov.w r2, #4096 ; 0x1000 8001544: 629a str r2, [r3, #40] ; 0x28 hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE; 8001546: 4b17 ldr r3, [pc, #92] ; (80015a4 ) 8001548: 2200 movs r2, #0 800154a: 62da str r2, [r3, #44] ; 0x2c hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE; 800154c: 4b15 ldr r3, [pc, #84] ; (80015a4 ) 800154e: 2200 movs r2, #0 8001550: 631a str r2, [r3, #48] ; 0x30 hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE; 8001552: 4b14 ldr r3, [pc, #80] ; (80015a4 ) 8001554: 2200 movs r2, #0 8001556: 635a str r2, [r3, #52] ; 0x34 hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE; 8001558: 4b12 ldr r3, [pc, #72] ; (80015a4 ) 800155a: 2200 movs r2, #0 800155c: 639a str r2, [r3, #56] ; 0x38 /* Timing */ Timing.AddressSetupTime = 0; 800155e: 2300 movs r3, #0 8001560: 607b str r3, [r7, #4] Timing.AddressHoldTime = 15; 8001562: 230f movs r3, #15 8001564: 60bb str r3, [r7, #8] Timing.DataSetupTime = 1; 8001566: 2301 movs r3, #1 8001568: 60fb str r3, [r7, #12] Timing.BusTurnAroundDuration = 0; 800156a: 2300 movs r3, #0 800156c: 613b str r3, [r7, #16] Timing.CLKDivision = 16; 800156e: 2310 movs r3, #16 8001570: 617b str r3, [r7, #20] Timing.DataLatency = 17; 8001572: 2311 movs r3, #17 8001574: 61bb str r3, [r7, #24] Timing.AccessMode = FSMC_ACCESS_MODE_A; 8001576: 2300 movs r3, #0 8001578: 61fb str r3, [r7, #28] /* ExtTiming */ if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK) 800157a: 1d3b adds r3, r7, #4 800157c: 2200 movs r2, #0 800157e: 4619 mov r1, r3 8001580: 4808 ldr r0, [pc, #32] ; (80015a4 ) 8001582: f002 ff43 bl 800440c 8001586: 4603 mov r3, r0 8001588: 2b00 cmp r3, #0 800158a: d001 beq.n 8001590 { Error_Handler( ); 800158c: f000 f810 bl 80015b0 } /** Disconnect NADV */ __HAL_AFIO_FSMCNADV_DISCONNECTED(); 8001590: 4b06 ldr r3, [pc, #24] ; (80015ac ) 8001592: 69db ldr r3, [r3, #28] 8001594: 4a05 ldr r2, [pc, #20] ; (80015ac ) 8001596: f443 6380 orr.w r3, r3, #1024 ; 0x400 800159a: 61d3 str r3, [r2, #28] /* USER CODE BEGIN FSMC_Init 2 */ /* USER CODE END FSMC_Init 2 */ } 800159c: bf00 nop 800159e: 3720 adds r7, #32 80015a0: 46bd mov sp, r7 80015a2: bd80 pop {r7, pc} 80015a4: 20000268 .word 0x20000268 80015a8: a0000104 .word 0xa0000104 80015ac: 40010000 .word 0x40010000 080015b0 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 80015b0: b480 push {r7} 80015b2: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 80015b4: b672 cpsid i } 80015b6: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 80015b8: e7fe b.n 80015b8 ... 080015bc : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 80015bc: b480 push {r7} 80015be: b085 sub sp, #20 80015c0: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 80015c2: 4b15 ldr r3, [pc, #84] ; (8001618 ) 80015c4: 699b ldr r3, [r3, #24] 80015c6: 4a14 ldr r2, [pc, #80] ; (8001618 ) 80015c8: f043 0301 orr.w r3, r3, #1 80015cc: 6193 str r3, [r2, #24] 80015ce: 4b12 ldr r3, [pc, #72] ; (8001618 ) 80015d0: 699b ldr r3, [r3, #24] 80015d2: f003 0301 and.w r3, r3, #1 80015d6: 60bb str r3, [r7, #8] 80015d8: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 80015da: 4b0f ldr r3, [pc, #60] ; (8001618 ) 80015dc: 69db ldr r3, [r3, #28] 80015de: 4a0e ldr r2, [pc, #56] ; (8001618 ) 80015e0: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 80015e4: 61d3 str r3, [r2, #28] 80015e6: 4b0c ldr r3, [pc, #48] ; (8001618 ) 80015e8: 69db ldr r3, [r3, #28] 80015ea: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 80015ee: 607b str r3, [r7, #4] 80015f0: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** DISABLE: JTAG-DP Disabled and SW-DP Disabled */ __HAL_AFIO_REMAP_SWJ_DISABLE(); 80015f2: 4b0a ldr r3, [pc, #40] ; (800161c ) 80015f4: 685b ldr r3, [r3, #4] 80015f6: 60fb str r3, [r7, #12] 80015f8: 68fb ldr r3, [r7, #12] 80015fa: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000 80015fe: 60fb str r3, [r7, #12] 8001600: 68fb ldr r3, [r7, #12] 8001602: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 8001606: 60fb str r3, [r7, #12] 8001608: 4a04 ldr r2, [pc, #16] ; (800161c ) 800160a: 68fb ldr r3, [r7, #12] 800160c: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 800160e: bf00 nop 8001610: 3714 adds r7, #20 8001612: 46bd mov sp, r7 8001614: bc80 pop {r7} 8001616: 4770 bx lr 8001618: 40021000 .word 0x40021000 800161c: 40010000 .word 0x40010000 08001620 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 8001620: b580 push {r7, lr} 8001622: b088 sub sp, #32 8001624: af00 add r7, sp, #0 8001626: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001628: f107 0310 add.w r3, r7, #16 800162c: 2200 movs r2, #0 800162e: 601a str r2, [r3, #0] 8001630: 605a str r2, [r3, #4] 8001632: 609a str r2, [r3, #8] 8001634: 60da str r2, [r3, #12] if(hi2c->Instance==I2C2) 8001636: 687b ldr r3, [r7, #4] 8001638: 681b ldr r3, [r3, #0] 800163a: 4a16 ldr r2, [pc, #88] ; (8001694 ) 800163c: 4293 cmp r3, r2 800163e: d124 bne.n 800168a { /* USER CODE BEGIN I2C2_MspInit 0 */ /* USER CODE END I2C2_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 8001640: 4b15 ldr r3, [pc, #84] ; (8001698 ) 8001642: 699b ldr r3, [r3, #24] 8001644: 4a14 ldr r2, [pc, #80] ; (8001698 ) 8001646: f043 0308 orr.w r3, r3, #8 800164a: 6193 str r3, [r2, #24] 800164c: 4b12 ldr r3, [pc, #72] ; (8001698 ) 800164e: 699b ldr r3, [r3, #24] 8001650: f003 0308 and.w r3, r3, #8 8001654: 60fb str r3, [r7, #12] 8001656: 68fb ldr r3, [r7, #12] /**I2C2 GPIO Configuration PB10 ------> I2C2_SCL PB11 ------> I2C2_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; 8001658: f44f 6340 mov.w r3, #3072 ; 0xc00 800165c: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 800165e: 2312 movs r3, #18 8001660: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001662: 2303 movs r3, #3 8001664: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001666: f107 0310 add.w r3, r7, #16 800166a: 4619 mov r1, r3 800166c: 480b ldr r0, [pc, #44] ; (800169c ) 800166e: f000 fb97 bl 8001da0 /* Peripheral clock enable */ __HAL_RCC_I2C2_CLK_ENABLE(); 8001672: 4b09 ldr r3, [pc, #36] ; (8001698 ) 8001674: 69db ldr r3, [r3, #28] 8001676: 4a08 ldr r2, [pc, #32] ; (8001698 ) 8001678: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 800167c: 61d3 str r3, [r2, #28] 800167e: 4b06 ldr r3, [pc, #24] ; (8001698 ) 8001680: 69db ldr r3, [r3, #28] 8001682: f403 0380 and.w r3, r3, #4194304 ; 0x400000 8001686: 60bb str r3, [r7, #8] 8001688: 68bb ldr r3, [r7, #8] /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } 800168a: bf00 nop 800168c: 3720 adds r7, #32 800168e: 46bd mov sp, r7 8001690: bd80 pop {r7, pc} 8001692: bf00 nop 8001694: 40005800 .word 0x40005800 8001698: 40021000 .word 0x40021000 800169c: 40010c00 .word 0x40010c00 080016a0 : * This function configures the hardware resources used in this example * @param hspi: SPI handle pointer * @retval None */ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) { 80016a0: b580 push {r7, lr} 80016a2: b088 sub sp, #32 80016a4: af00 add r7, sp, #0 80016a6: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 80016a8: f107 0310 add.w r3, r7, #16 80016ac: 2200 movs r2, #0 80016ae: 601a str r2, [r3, #0] 80016b0: 605a str r2, [r3, #4] 80016b2: 609a str r2, [r3, #8] 80016b4: 60da str r2, [r3, #12] if(hspi->Instance==SPI1) 80016b6: 687b ldr r3, [r7, #4] 80016b8: 681b ldr r3, [r3, #0] 80016ba: 4a1b ldr r2, [pc, #108] ; (8001728 ) 80016bc: 4293 cmp r3, r2 80016be: d12f bne.n 8001720 { /* USER CODE BEGIN SPI1_MspInit 0 */ /* USER CODE END SPI1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_SPI1_CLK_ENABLE(); 80016c0: 4b1a ldr r3, [pc, #104] ; (800172c ) 80016c2: 699b ldr r3, [r3, #24] 80016c4: 4a19 ldr r2, [pc, #100] ; (800172c ) 80016c6: f443 5380 orr.w r3, r3, #4096 ; 0x1000 80016ca: 6193 str r3, [r2, #24] 80016cc: 4b17 ldr r3, [pc, #92] ; (800172c ) 80016ce: 699b ldr r3, [r3, #24] 80016d0: f403 5380 and.w r3, r3, #4096 ; 0x1000 80016d4: 60fb str r3, [r7, #12] 80016d6: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 80016d8: 4b14 ldr r3, [pc, #80] ; (800172c ) 80016da: 699b ldr r3, [r3, #24] 80016dc: 4a13 ldr r2, [pc, #76] ; (800172c ) 80016de: f043 0304 orr.w r3, r3, #4 80016e2: 6193 str r3, [r2, #24] 80016e4: 4b11 ldr r3, [pc, #68] ; (800172c ) 80016e6: 699b ldr r3, [r3, #24] 80016e8: f003 0304 and.w r3, r3, #4 80016ec: 60bb str r3, [r7, #8] 80016ee: 68bb ldr r3, [r7, #8] /**SPI1 GPIO Configuration PA5 ------> SPI1_SCK PA6 ------> SPI1_MISO PA7 ------> SPI1_MOSI */ GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_7; 80016f0: 23a0 movs r3, #160 ; 0xa0 80016f2: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80016f4: 2302 movs r3, #2 80016f6: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80016f8: 2303 movs r3, #3 80016fa: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80016fc: f107 0310 add.w r3, r7, #16 8001700: 4619 mov r1, r3 8001702: 480b ldr r0, [pc, #44] ; (8001730 ) 8001704: f000 fb4c bl 8001da0 GPIO_InitStruct.Pin = GPIO_PIN_6; 8001708: 2340 movs r3, #64 ; 0x40 800170a: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800170c: 2300 movs r3, #0 800170e: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001710: 2300 movs r3, #0 8001712: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001714: f107 0310 add.w r3, r7, #16 8001718: 4619 mov r1, r3 800171a: 4805 ldr r0, [pc, #20] ; (8001730 ) 800171c: f000 fb40 bl 8001da0 /* USER CODE BEGIN SPI1_MspInit 1 */ /* USER CODE END SPI1_MspInit 1 */ } } 8001720: bf00 nop 8001722: 3720 adds r7, #32 8001724: 46bd mov sp, r7 8001726: bd80 pop {r7, pc} 8001728: 40013000 .word 0x40013000 800172c: 40021000 .word 0x40021000 8001730: 40010800 .word 0x40010800 08001734 : * This function configures the hardware resources used in this example * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { 8001734: b580 push {r7, lr} 8001736: b084 sub sp, #16 8001738: af00 add r7, sp, #0 800173a: 6078 str r0, [r7, #4] if(htim_base->Instance==TIM6) 800173c: 687b ldr r3, [r7, #4] 800173e: 681b ldr r3, [r3, #0] 8001740: 4a0d ldr r2, [pc, #52] ; (8001778 ) 8001742: 4293 cmp r3, r2 8001744: d113 bne.n 800176e { /* USER CODE BEGIN TIM6_MspInit 0 */ /* USER CODE END TIM6_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM6_CLK_ENABLE(); 8001746: 4b0d ldr r3, [pc, #52] ; (800177c ) 8001748: 69db ldr r3, [r3, #28] 800174a: 4a0c ldr r2, [pc, #48] ; (800177c ) 800174c: f043 0310 orr.w r3, r3, #16 8001750: 61d3 str r3, [r2, #28] 8001752: 4b0a ldr r3, [pc, #40] ; (800177c ) 8001754: 69db ldr r3, [r3, #28] 8001756: f003 0310 and.w r3, r3, #16 800175a: 60fb str r3, [r7, #12] 800175c: 68fb ldr r3, [r7, #12] /* TIM6 interrupt Init */ HAL_NVIC_SetPriority(TIM6_IRQn, 0, 0); 800175e: 2200 movs r2, #0 8001760: 2100 movs r1, #0 8001762: 2036 movs r0, #54 ; 0x36 8001764: f000 fae5 bl 8001d32 HAL_NVIC_EnableIRQ(TIM6_IRQn); 8001768: 2036 movs r0, #54 ; 0x36 800176a: f000 fafe bl 8001d6a /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ } } 800176e: bf00 nop 8001770: 3710 adds r7, #16 8001772: 46bd mov sp, r7 8001774: bd80 pop {r7, pc} 8001776: bf00 nop 8001778: 40001000 .word 0x40001000 800177c: 40021000 .word 0x40021000 08001780 : } static uint32_t FSMC_Initialized = 0; static void HAL_FSMC_MspInit(void){ 8001780: b580 push {r7, lr} 8001782: b086 sub sp, #24 8001784: af00 add r7, sp, #0 /* USER CODE BEGIN FSMC_MspInit 0 */ /* USER CODE END FSMC_MspInit 0 */ GPIO_InitTypeDef GPIO_InitStruct ={0}; 8001786: f107 0308 add.w r3, r7, #8 800178a: 2200 movs r2, #0 800178c: 601a str r2, [r3, #0] 800178e: 605a str r2, [r3, #4] 8001790: 609a str r2, [r3, #8] 8001792: 60da str r2, [r3, #12] if (FSMC_Initialized) { 8001794: 4b1f ldr r3, [pc, #124] ; (8001814 ) 8001796: 681b ldr r3, [r3, #0] 8001798: 2b00 cmp r3, #0 800179a: d136 bne.n 800180a return; } FSMC_Initialized = 1; 800179c: 4b1d ldr r3, [pc, #116] ; (8001814 ) 800179e: 2201 movs r2, #1 80017a0: 601a str r2, [r3, #0] /* Peripheral clock enable */ __HAL_RCC_FSMC_CLK_ENABLE(); 80017a2: 4b1d ldr r3, [pc, #116] ; (8001818 ) 80017a4: 695b ldr r3, [r3, #20] 80017a6: 4a1c ldr r2, [pc, #112] ; (8001818 ) 80017a8: f443 7380 orr.w r3, r3, #256 ; 0x100 80017ac: 6153 str r3, [r2, #20] 80017ae: 4b1a ldr r3, [pc, #104] ; (8001818 ) 80017b0: 695b ldr r3, [r3, #20] 80017b2: f403 7380 and.w r3, r3, #256 ; 0x100 80017b6: 607b str r3, [r7, #4] 80017b8: 687b ldr r3, [r7, #4] PD1 ------> FSMC_D3 PD4 ------> FSMC_NOE PD5 ------> FSMC_NWE PG12 ------> FSMC_NE4 */ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_12; 80017ba: f241 0301 movw r3, #4097 ; 0x1001 80017be: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80017c0: 2302 movs r3, #2 80017c2: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80017c4: 2303 movs r3, #3 80017c6: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 80017c8: f107 0308 add.w r3, r7, #8 80017cc: 4619 mov r1, r3 80017ce: 4813 ldr r0, [pc, #76] ; (800181c ) 80017d0: f000 fae6 bl 8001da0 GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10 80017d4: f64f 7380 movw r3, #65408 ; 0xff80 80017d8: 60bb str r3, [r7, #8] |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14 |GPIO_PIN_15; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80017da: 2302 movs r3, #2 80017dc: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80017de: 2303 movs r3, #3 80017e0: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 80017e2: f107 0308 add.w r3, r7, #8 80017e6: 4619 mov r1, r3 80017e8: 480d ldr r0, [pc, #52] ; (8001820 ) 80017ea: f000 fad9 bl 8001da0 GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14 80017ee: f24c 7333 movw r3, #50995 ; 0xc733 80017f2: 60bb str r3, [r7, #8] |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4 |GPIO_PIN_5; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80017f4: 2302 movs r3, #2 80017f6: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80017f8: 2303 movs r3, #3 80017fa: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 80017fc: f107 0308 add.w r3, r7, #8 8001800: 4619 mov r1, r3 8001802: 4808 ldr r0, [pc, #32] ; (8001824 ) 8001804: f000 facc bl 8001da0 8001808: e000 b.n 800180c return; 800180a: bf00 nop /* USER CODE BEGIN FSMC_MspInit 1 */ /* USER CODE END FSMC_MspInit 1 */ } 800180c: 3718 adds r7, #24 800180e: 46bd mov sp, r7 8001810: bd80 pop {r7, pc} 8001812: bf00 nop 8001814: 20000200 .word 0x20000200 8001818: 40021000 .word 0x40021000 800181c: 40012000 .word 0x40012000 8001820: 40011800 .word 0x40011800 8001824: 40011400 .word 0x40011400 08001828 : void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){ 8001828: b580 push {r7, lr} 800182a: b082 sub sp, #8 800182c: af00 add r7, sp, #0 800182e: 6078 str r0, [r7, #4] /* USER CODE BEGIN SRAM_MspInit 0 */ /* USER CODE END SRAM_MspInit 0 */ HAL_FSMC_MspInit(); 8001830: f7ff ffa6 bl 8001780 /* USER CODE BEGIN SRAM_MspInit 1 */ /* USER CODE END SRAM_MspInit 1 */ } 8001834: bf00 nop 8001836: 3708 adds r7, #8 8001838: 46bd mov sp, r7 800183a: bd80 pop {r7, pc} 0800183c : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 800183c: b480 push {r7} 800183e: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8001840: e7fe b.n 8001840 08001842 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8001842: b480 push {r7} 8001844: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 8001846: e7fe b.n 8001846 08001848 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8001848: b480 push {r7} 800184a: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 800184c: e7fe b.n 800184c 0800184e : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 800184e: b480 push {r7} 8001850: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 8001852: e7fe b.n 8001852 08001854 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8001854: b480 push {r7} 8001856: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8001858: e7fe b.n 8001858 0800185a : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 800185a: b480 push {r7} 800185c: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 800185e: bf00 nop 8001860: 46bd mov sp, r7 8001862: bc80 pop {r7} 8001864: 4770 bx lr 08001866 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8001866: b480 push {r7} 8001868: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 800186a: bf00 nop 800186c: 46bd mov sp, r7 800186e: bc80 pop {r7} 8001870: 4770 bx lr 08001872 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8001872: b480 push {r7} 8001874: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 8001876: bf00 nop 8001878: 46bd mov sp, r7 800187a: bc80 pop {r7} 800187c: 4770 bx lr 0800187e : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 800187e: b580 push {r7, lr} 8001880: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8001882: f000 f93f bl 8001b04 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 8001886: bf00 nop 8001888: bd80 pop {r7, pc} ... 0800188c : /** * @brief This function handles TIM6 global interrupt. */ void TIM6_IRQHandler(void) { 800188c: b580 push {r7, lr} 800188e: af00 add r7, sp, #0 /* USER CODE BEGIN TIM6_IRQn 0 */ /* USER CODE END TIM6_IRQn 0 */ HAL_TIM_IRQHandler(&htim6); 8001890: 4802 ldr r0, [pc, #8] ; (800189c ) 8001892: f002 fe85 bl 80045a0 /* USER CODE BEGIN TIM6_IRQn 1 */ /* USER CODE END TIM6_IRQn 1 */ } 8001896: bf00 nop 8001898: bd80 pop {r7, pc} 800189a: bf00 nop 800189c: 200002b0 .word 0x200002b0 080018a0 <_getpid>: void initialise_monitor_handles() { } int _getpid(void) { 80018a0: b480 push {r7} 80018a2: af00 add r7, sp, #0 return 1; 80018a4: 2301 movs r3, #1 } 80018a6: 4618 mov r0, r3 80018a8: 46bd mov sp, r7 80018aa: bc80 pop {r7} 80018ac: 4770 bx lr 080018ae <_kill>: int _kill(int pid, int sig) { 80018ae: b580 push {r7, lr} 80018b0: b082 sub sp, #8 80018b2: af00 add r7, sp, #0 80018b4: 6078 str r0, [r7, #4] 80018b6: 6039 str r1, [r7, #0] errno = EINVAL; 80018b8: f005 fea4 bl 8007604 <__errno> 80018bc: 4603 mov r3, r0 80018be: 2216 movs r2, #22 80018c0: 601a str r2, [r3, #0] return -1; 80018c2: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff } 80018c6: 4618 mov r0, r3 80018c8: 3708 adds r7, #8 80018ca: 46bd mov sp, r7 80018cc: bd80 pop {r7, pc} 080018ce <_exit>: void _exit (int status) { 80018ce: b580 push {r7, lr} 80018d0: b082 sub sp, #8 80018d2: af00 add r7, sp, #0 80018d4: 6078 str r0, [r7, #4] _kill(status, -1); 80018d6: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff 80018da: 6878 ldr r0, [r7, #4] 80018dc: f7ff ffe7 bl 80018ae <_kill> while (1) {} /* Make sure we hang here */ 80018e0: e7fe b.n 80018e0 <_exit+0x12> 080018e2 <_read>: } __attribute__((weak)) int _read(int file, char *ptr, int len) { 80018e2: b580 push {r7, lr} 80018e4: b086 sub sp, #24 80018e6: af00 add r7, sp, #0 80018e8: 60f8 str r0, [r7, #12] 80018ea: 60b9 str r1, [r7, #8] 80018ec: 607a str r2, [r7, #4] int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 80018ee: 2300 movs r3, #0 80018f0: 617b str r3, [r7, #20] 80018f2: e00a b.n 800190a <_read+0x28> { *ptr++ = __io_getchar(); 80018f4: f3af 8000 nop.w 80018f8: 4601 mov r1, r0 80018fa: 68bb ldr r3, [r7, #8] 80018fc: 1c5a adds r2, r3, #1 80018fe: 60ba str r2, [r7, #8] 8001900: b2ca uxtb r2, r1 8001902: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) 8001904: 697b ldr r3, [r7, #20] 8001906: 3301 adds r3, #1 8001908: 617b str r3, [r7, #20] 800190a: 697a ldr r2, [r7, #20] 800190c: 687b ldr r3, [r7, #4] 800190e: 429a cmp r2, r3 8001910: dbf0 blt.n 80018f4 <_read+0x12> } return len; 8001912: 687b ldr r3, [r7, #4] } 8001914: 4618 mov r0, r3 8001916: 3718 adds r7, #24 8001918: 46bd mov sp, r7 800191a: bd80 pop {r7, pc} 0800191c <_write>: __attribute__((weak)) int _write(int file, char *ptr, int len) { 800191c: b580 push {r7, lr} 800191e: b086 sub sp, #24 8001920: af00 add r7, sp, #0 8001922: 60f8 str r0, [r7, #12] 8001924: 60b9 str r1, [r7, #8] 8001926: 607a str r2, [r7, #4] int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8001928: 2300 movs r3, #0 800192a: 617b str r3, [r7, #20] 800192c: e009 b.n 8001942 <_write+0x26> { __io_putchar(*ptr++); 800192e: 68bb ldr r3, [r7, #8] 8001930: 1c5a adds r2, r3, #1 8001932: 60ba str r2, [r7, #8] 8001934: 781b ldrb r3, [r3, #0] 8001936: 4618 mov r0, r3 8001938: f3af 8000 nop.w for (DataIdx = 0; DataIdx < len; DataIdx++) 800193c: 697b ldr r3, [r7, #20] 800193e: 3301 adds r3, #1 8001940: 617b str r3, [r7, #20] 8001942: 697a ldr r2, [r7, #20] 8001944: 687b ldr r3, [r7, #4] 8001946: 429a cmp r2, r3 8001948: dbf1 blt.n 800192e <_write+0x12> } return len; 800194a: 687b ldr r3, [r7, #4] } 800194c: 4618 mov r0, r3 800194e: 3718 adds r7, #24 8001950: 46bd mov sp, r7 8001952: bd80 pop {r7, pc} 08001954 <_close>: int _close(int file) { 8001954: b480 push {r7} 8001956: b083 sub sp, #12 8001958: af00 add r7, sp, #0 800195a: 6078 str r0, [r7, #4] return -1; 800195c: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff } 8001960: 4618 mov r0, r3 8001962: 370c adds r7, #12 8001964: 46bd mov sp, r7 8001966: bc80 pop {r7} 8001968: 4770 bx lr 0800196a <_fstat>: int _fstat(int file, struct stat *st) { 800196a: b480 push {r7} 800196c: b083 sub sp, #12 800196e: af00 add r7, sp, #0 8001970: 6078 str r0, [r7, #4] 8001972: 6039 str r1, [r7, #0] st->st_mode = S_IFCHR; 8001974: 683b ldr r3, [r7, #0] 8001976: f44f 5200 mov.w r2, #8192 ; 0x2000 800197a: 605a str r2, [r3, #4] return 0; 800197c: 2300 movs r3, #0 } 800197e: 4618 mov r0, r3 8001980: 370c adds r7, #12 8001982: 46bd mov sp, r7 8001984: bc80 pop {r7} 8001986: 4770 bx lr 08001988 <_isatty>: int _isatty(int file) { 8001988: b480 push {r7} 800198a: b083 sub sp, #12 800198c: af00 add r7, sp, #0 800198e: 6078 str r0, [r7, #4] return 1; 8001990: 2301 movs r3, #1 } 8001992: 4618 mov r0, r3 8001994: 370c adds r7, #12 8001996: 46bd mov sp, r7 8001998: bc80 pop {r7} 800199a: 4770 bx lr 0800199c <_lseek>: int _lseek(int file, int ptr, int dir) { 800199c: b480 push {r7} 800199e: b085 sub sp, #20 80019a0: af00 add r7, sp, #0 80019a2: 60f8 str r0, [r7, #12] 80019a4: 60b9 str r1, [r7, #8] 80019a6: 607a str r2, [r7, #4] return 0; 80019a8: 2300 movs r3, #0 } 80019aa: 4618 mov r0, r3 80019ac: 3714 adds r7, #20 80019ae: 46bd mov sp, r7 80019b0: bc80 pop {r7} 80019b2: 4770 bx lr 080019b4 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 80019b4: b580 push {r7, lr} 80019b6: b086 sub sp, #24 80019b8: af00 add r7, sp, #0 80019ba: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 80019bc: 4a14 ldr r2, [pc, #80] ; (8001a10 <_sbrk+0x5c>) 80019be: 4b15 ldr r3, [pc, #84] ; (8001a14 <_sbrk+0x60>) 80019c0: 1ad3 subs r3, r2, r3 80019c2: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 80019c4: 697b ldr r3, [r7, #20] 80019c6: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 80019c8: 4b13 ldr r3, [pc, #76] ; (8001a18 <_sbrk+0x64>) 80019ca: 681b ldr r3, [r3, #0] 80019cc: 2b00 cmp r3, #0 80019ce: d102 bne.n 80019d6 <_sbrk+0x22> { __sbrk_heap_end = &_end; 80019d0: 4b11 ldr r3, [pc, #68] ; (8001a18 <_sbrk+0x64>) 80019d2: 4a12 ldr r2, [pc, #72] ; (8001a1c <_sbrk+0x68>) 80019d4: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 80019d6: 4b10 ldr r3, [pc, #64] ; (8001a18 <_sbrk+0x64>) 80019d8: 681a ldr r2, [r3, #0] 80019da: 687b ldr r3, [r7, #4] 80019dc: 4413 add r3, r2 80019de: 693a ldr r2, [r7, #16] 80019e0: 429a cmp r2, r3 80019e2: d207 bcs.n 80019f4 <_sbrk+0x40> { errno = ENOMEM; 80019e4: f005 fe0e bl 8007604 <__errno> 80019e8: 4603 mov r3, r0 80019ea: 220c movs r2, #12 80019ec: 601a str r2, [r3, #0] return (void *)-1; 80019ee: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff 80019f2: e009 b.n 8001a08 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 80019f4: 4b08 ldr r3, [pc, #32] ; (8001a18 <_sbrk+0x64>) 80019f6: 681b ldr r3, [r3, #0] 80019f8: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 80019fa: 4b07 ldr r3, [pc, #28] ; (8001a18 <_sbrk+0x64>) 80019fc: 681a ldr r2, [r3, #0] 80019fe: 687b ldr r3, [r7, #4] 8001a00: 4413 add r3, r2 8001a02: 4a05 ldr r2, [pc, #20] ; (8001a18 <_sbrk+0x64>) 8001a04: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 8001a06: 68fb ldr r3, [r7, #12] } 8001a08: 4618 mov r0, r3 8001a0a: 3718 adds r7, #24 8001a0c: 46bd mov sp, r7 8001a0e: bd80 pop {r7, pc} 8001a10: 20010000 .word 0x20010000 8001a14: 00000800 .word 0x00000800 8001a18: 20000204 .word 0x20000204 8001a1c: 20002548 .word 0x20002548 08001a20 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 8001a20: b480 push {r7} 8001a22: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 8001a24: bf00 nop 8001a26: 46bd mov sp, r7 8001a28: bc80 pop {r7} 8001a2a: 4770 bx lr 08001a2c : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 8001a2c: 480c ldr r0, [pc, #48] ; (8001a60 ) ldr r1, =_edata 8001a2e: 490d ldr r1, [pc, #52] ; (8001a64 ) ldr r2, =_sidata 8001a30: 4a0d ldr r2, [pc, #52] ; (8001a68 ) movs r3, #0 8001a32: 2300 movs r3, #0 b LoopCopyDataInit 8001a34: e002 b.n 8001a3c 08001a36 : CopyDataInit: ldr r4, [r2, r3] 8001a36: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 8001a38: 50c4 str r4, [r0, r3] adds r3, r3, #4 8001a3a: 3304 adds r3, #4 08001a3c : LoopCopyDataInit: adds r4, r0, r3 8001a3c: 18c4 adds r4, r0, r3 cmp r4, r1 8001a3e: 428c cmp r4, r1 bcc CopyDataInit 8001a40: d3f9 bcc.n 8001a36 /* Zero fill the bss segment. */ ldr r2, =_sbss 8001a42: 4a0a ldr r2, [pc, #40] ; (8001a6c ) ldr r4, =_ebss 8001a44: 4c0a ldr r4, [pc, #40] ; (8001a70 ) movs r3, #0 8001a46: 2300 movs r3, #0 b LoopFillZerobss 8001a48: e001 b.n 8001a4e 08001a4a : FillZerobss: str r3, [r2] 8001a4a: 6013 str r3, [r2, #0] adds r2, r2, #4 8001a4c: 3204 adds r2, #4 08001a4e : LoopFillZerobss: cmp r2, r4 8001a4e: 42a2 cmp r2, r4 bcc FillZerobss 8001a50: d3fb bcc.n 8001a4a /* Call the clock system intitialization function.*/ bl SystemInit 8001a52: f7ff ffe5 bl 8001a20 /* Call static constructors */ bl __libc_init_array 8001a56: f005 fddb bl 8007610 <__libc_init_array> /* Call the application's entry point.*/ bl main 8001a5a: f7ff fb55 bl 8001108
bx lr 8001a5e: 4770 bx lr ldr r0, =_sdata 8001a60: 20000000 .word 0x20000000 ldr r1, =_edata 8001a64: 200001e4 .word 0x200001e4 ldr r2, =_sidata 8001a68: 0800b324 .word 0x0800b324 ldr r2, =_sbss 8001a6c: 200001e4 .word 0x200001e4 ldr r4, =_ebss 8001a70: 20002548 .word 0x20002548 08001a74 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8001a74: e7fe b.n 8001a74 ... 08001a78 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8001a78: b580 push {r7, lr} 8001a7a: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8001a7c: 4b08 ldr r3, [pc, #32] ; (8001aa0 ) 8001a7e: 681b ldr r3, [r3, #0] 8001a80: 4a07 ldr r2, [pc, #28] ; (8001aa0 ) 8001a82: f043 0310 orr.w r3, r3, #16 8001a86: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8001a88: 2003 movs r0, #3 8001a8a: f000 f947 bl 8001d1c /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 8001a8e: 200f movs r0, #15 8001a90: f000 f808 bl 8001aa4 /* Init the low level hardware */ HAL_MspInit(); 8001a94: f7ff fd92 bl 80015bc /* Return function status */ return HAL_OK; 8001a98: 2300 movs r3, #0 } 8001a9a: 4618 mov r0, r3 8001a9c: bd80 pop {r7, pc} 8001a9e: bf00 nop 8001aa0: 40022000 .word 0x40022000 08001aa4 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8001aa4: b580 push {r7, lr} 8001aa6: b082 sub sp, #8 8001aa8: af00 add r7, sp, #0 8001aaa: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8001aac: 4b12 ldr r3, [pc, #72] ; (8001af8 ) 8001aae: 681a ldr r2, [r3, #0] 8001ab0: 4b12 ldr r3, [pc, #72] ; (8001afc ) 8001ab2: 781b ldrb r3, [r3, #0] 8001ab4: 4619 mov r1, r3 8001ab6: f44f 737a mov.w r3, #1000 ; 0x3e8 8001aba: fbb3 f3f1 udiv r3, r3, r1 8001abe: fbb2 f3f3 udiv r3, r2, r3 8001ac2: 4618 mov r0, r3 8001ac4: f000 f95f bl 8001d86 8001ac8: 4603 mov r3, r0 8001aca: 2b00 cmp r3, #0 8001acc: d001 beq.n 8001ad2 { return HAL_ERROR; 8001ace: 2301 movs r3, #1 8001ad0: e00e b.n 8001af0 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 8001ad2: 687b ldr r3, [r7, #4] 8001ad4: 2b0f cmp r3, #15 8001ad6: d80a bhi.n 8001aee { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8001ad8: 2200 movs r2, #0 8001ada: 6879 ldr r1, [r7, #4] 8001adc: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8001ae0: f000 f927 bl 8001d32 uwTickPrio = TickPriority; 8001ae4: 4a06 ldr r2, [pc, #24] ; (8001b00 ) 8001ae6: 687b ldr r3, [r7, #4] 8001ae8: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 8001aea: 2300 movs r3, #0 8001aec: e000 b.n 8001af0 return HAL_ERROR; 8001aee: 2301 movs r3, #1 } 8001af0: 4618 mov r0, r3 8001af2: 3708 adds r7, #8 8001af4: 46bd mov sp, r7 8001af6: bd80 pop {r7, pc} 8001af8: 20000000 .word 0x20000000 8001afc: 20000008 .word 0x20000008 8001b00: 20000004 .word 0x20000004 08001b04 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8001b04: b480 push {r7} 8001b06: af00 add r7, sp, #0 uwTick += uwTickFreq; 8001b08: 4b05 ldr r3, [pc, #20] ; (8001b20 ) 8001b0a: 781b ldrb r3, [r3, #0] 8001b0c: 461a mov r2, r3 8001b0e: 4b05 ldr r3, [pc, #20] ; (8001b24 ) 8001b10: 681b ldr r3, [r3, #0] 8001b12: 4413 add r3, r2 8001b14: 4a03 ldr r2, [pc, #12] ; (8001b24 ) 8001b16: 6013 str r3, [r2, #0] } 8001b18: bf00 nop 8001b1a: 46bd mov sp, r7 8001b1c: bc80 pop {r7} 8001b1e: 4770 bx lr 8001b20: 20000008 .word 0x20000008 8001b24: 20000350 .word 0x20000350 08001b28 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8001b28: b480 push {r7} 8001b2a: af00 add r7, sp, #0 return uwTick; 8001b2c: 4b02 ldr r3, [pc, #8] ; (8001b38 ) 8001b2e: 681b ldr r3, [r3, #0] } 8001b30: 4618 mov r0, r3 8001b32: 46bd mov sp, r7 8001b34: bc80 pop {r7} 8001b36: 4770 bx lr 8001b38: 20000350 .word 0x20000350 08001b3c : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 8001b3c: b580 push {r7, lr} 8001b3e: b084 sub sp, #16 8001b40: af00 add r7, sp, #0 8001b42: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 8001b44: f7ff fff0 bl 8001b28 8001b48: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 8001b4a: 687b ldr r3, [r7, #4] 8001b4c: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 8001b4e: 68fb ldr r3, [r7, #12] 8001b50: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8001b54: d005 beq.n 8001b62 { wait += (uint32_t)(uwTickFreq); 8001b56: 4b0a ldr r3, [pc, #40] ; (8001b80 ) 8001b58: 781b ldrb r3, [r3, #0] 8001b5a: 461a mov r2, r3 8001b5c: 68fb ldr r3, [r7, #12] 8001b5e: 4413 add r3, r2 8001b60: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 8001b62: bf00 nop 8001b64: f7ff ffe0 bl 8001b28 8001b68: 4602 mov r2, r0 8001b6a: 68bb ldr r3, [r7, #8] 8001b6c: 1ad3 subs r3, r2, r3 8001b6e: 68fa ldr r2, [r7, #12] 8001b70: 429a cmp r2, r3 8001b72: d8f7 bhi.n 8001b64 { } } 8001b74: bf00 nop 8001b76: bf00 nop 8001b78: 3710 adds r7, #16 8001b7a: 46bd mov sp, r7 8001b7c: bd80 pop {r7, pc} 8001b7e: bf00 nop 8001b80: 20000008 .word 0x20000008 08001b84 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8001b84: b480 push {r7} 8001b86: b085 sub sp, #20 8001b88: af00 add r7, sp, #0 8001b8a: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8001b8c: 687b ldr r3, [r7, #4] 8001b8e: f003 0307 and.w r3, r3, #7 8001b92: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 8001b94: 4b0c ldr r3, [pc, #48] ; (8001bc8 <__NVIC_SetPriorityGrouping+0x44>) 8001b96: 68db ldr r3, [r3, #12] 8001b98: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8001b9a: 68ba ldr r2, [r7, #8] 8001b9c: f64f 03ff movw r3, #63743 ; 0xf8ff 8001ba0: 4013 ands r3, r2 8001ba2: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 8001ba4: 68fb ldr r3, [r7, #12] 8001ba6: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8001ba8: 68bb ldr r3, [r7, #8] 8001baa: 4313 orrs r3, r2 reg_value = (reg_value | 8001bac: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 8001bb0: f443 3300 orr.w r3, r3, #131072 ; 0x20000 8001bb4: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 8001bb6: 4a04 ldr r2, [pc, #16] ; (8001bc8 <__NVIC_SetPriorityGrouping+0x44>) 8001bb8: 68bb ldr r3, [r7, #8] 8001bba: 60d3 str r3, [r2, #12] } 8001bbc: bf00 nop 8001bbe: 3714 adds r7, #20 8001bc0: 46bd mov sp, r7 8001bc2: bc80 pop {r7} 8001bc4: 4770 bx lr 8001bc6: bf00 nop 8001bc8: e000ed00 .word 0xe000ed00 08001bcc <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 8001bcc: b480 push {r7} 8001bce: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8001bd0: 4b04 ldr r3, [pc, #16] ; (8001be4 <__NVIC_GetPriorityGrouping+0x18>) 8001bd2: 68db ldr r3, [r3, #12] 8001bd4: 0a1b lsrs r3, r3, #8 8001bd6: f003 0307 and.w r3, r3, #7 } 8001bda: 4618 mov r0, r3 8001bdc: 46bd mov sp, r7 8001bde: bc80 pop {r7} 8001be0: 4770 bx lr 8001be2: bf00 nop 8001be4: e000ed00 .word 0xe000ed00 08001be8 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 8001be8: b480 push {r7} 8001bea: b083 sub sp, #12 8001bec: af00 add r7, sp, #0 8001bee: 4603 mov r3, r0 8001bf0: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001bf2: f997 3007 ldrsb.w r3, [r7, #7] 8001bf6: 2b00 cmp r3, #0 8001bf8: db0b blt.n 8001c12 <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8001bfa: 79fb ldrb r3, [r7, #7] 8001bfc: f003 021f and.w r2, r3, #31 8001c00: 4906 ldr r1, [pc, #24] ; (8001c1c <__NVIC_EnableIRQ+0x34>) 8001c02: f997 3007 ldrsb.w r3, [r7, #7] 8001c06: 095b lsrs r3, r3, #5 8001c08: 2001 movs r0, #1 8001c0a: fa00 f202 lsl.w r2, r0, r2 8001c0e: f841 2023 str.w r2, [r1, r3, lsl #2] } } 8001c12: bf00 nop 8001c14: 370c adds r7, #12 8001c16: 46bd mov sp, r7 8001c18: bc80 pop {r7} 8001c1a: 4770 bx lr 8001c1c: e000e100 .word 0xe000e100 08001c20 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 8001c20: b480 push {r7} 8001c22: b083 sub sp, #12 8001c24: af00 add r7, sp, #0 8001c26: 4603 mov r3, r0 8001c28: 6039 str r1, [r7, #0] 8001c2a: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001c2c: f997 3007 ldrsb.w r3, [r7, #7] 8001c30: 2b00 cmp r3, #0 8001c32: db0a blt.n 8001c4a <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8001c34: 683b ldr r3, [r7, #0] 8001c36: b2da uxtb r2, r3 8001c38: 490c ldr r1, [pc, #48] ; (8001c6c <__NVIC_SetPriority+0x4c>) 8001c3a: f997 3007 ldrsb.w r3, [r7, #7] 8001c3e: 0112 lsls r2, r2, #4 8001c40: b2d2 uxtb r2, r2 8001c42: 440b add r3, r1 8001c44: f883 2300 strb.w r2, [r3, #768] ; 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 8001c48: e00a b.n 8001c60 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8001c4a: 683b ldr r3, [r7, #0] 8001c4c: b2da uxtb r2, r3 8001c4e: 4908 ldr r1, [pc, #32] ; (8001c70 <__NVIC_SetPriority+0x50>) 8001c50: 79fb ldrb r3, [r7, #7] 8001c52: f003 030f and.w r3, r3, #15 8001c56: 3b04 subs r3, #4 8001c58: 0112 lsls r2, r2, #4 8001c5a: b2d2 uxtb r2, r2 8001c5c: 440b add r3, r1 8001c5e: 761a strb r2, [r3, #24] } 8001c60: bf00 nop 8001c62: 370c adds r7, #12 8001c64: 46bd mov sp, r7 8001c66: bc80 pop {r7} 8001c68: 4770 bx lr 8001c6a: bf00 nop 8001c6c: e000e100 .word 0xe000e100 8001c70: e000ed00 .word 0xe000ed00 08001c74 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 8001c74: b480 push {r7} 8001c76: b089 sub sp, #36 ; 0x24 8001c78: af00 add r7, sp, #0 8001c7a: 60f8 str r0, [r7, #12] 8001c7c: 60b9 str r1, [r7, #8] 8001c7e: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8001c80: 68fb ldr r3, [r7, #12] 8001c82: f003 0307 and.w r3, r3, #7 8001c86: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8001c88: 69fb ldr r3, [r7, #28] 8001c8a: f1c3 0307 rsb r3, r3, #7 8001c8e: 2b04 cmp r3, #4 8001c90: bf28 it cs 8001c92: 2304 movcs r3, #4 8001c94: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8001c96: 69fb ldr r3, [r7, #28] 8001c98: 3304 adds r3, #4 8001c9a: 2b06 cmp r3, #6 8001c9c: d902 bls.n 8001ca4 8001c9e: 69fb ldr r3, [r7, #28] 8001ca0: 3b03 subs r3, #3 8001ca2: e000 b.n 8001ca6 8001ca4: 2300 movs r3, #0 8001ca6: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8001ca8: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 8001cac: 69bb ldr r3, [r7, #24] 8001cae: fa02 f303 lsl.w r3, r2, r3 8001cb2: 43da mvns r2, r3 8001cb4: 68bb ldr r3, [r7, #8] 8001cb6: 401a ands r2, r3 8001cb8: 697b ldr r3, [r7, #20] 8001cba: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8001cbc: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff 8001cc0: 697b ldr r3, [r7, #20] 8001cc2: fa01 f303 lsl.w r3, r1, r3 8001cc6: 43d9 mvns r1, r3 8001cc8: 687b ldr r3, [r7, #4] 8001cca: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8001ccc: 4313 orrs r3, r2 ); } 8001cce: 4618 mov r0, r3 8001cd0: 3724 adds r7, #36 ; 0x24 8001cd2: 46bd mov sp, r7 8001cd4: bc80 pop {r7} 8001cd6: 4770 bx lr 08001cd8 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8001cd8: b580 push {r7, lr} 8001cda: b082 sub sp, #8 8001cdc: af00 add r7, sp, #0 8001cde: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8001ce0: 687b ldr r3, [r7, #4] 8001ce2: 3b01 subs r3, #1 8001ce4: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 8001ce8: d301 bcc.n 8001cee { return (1UL); /* Reload value impossible */ 8001cea: 2301 movs r3, #1 8001cec: e00f b.n 8001d0e } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8001cee: 4a0a ldr r2, [pc, #40] ; (8001d18 ) 8001cf0: 687b ldr r3, [r7, #4] 8001cf2: 3b01 subs r3, #1 8001cf4: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8001cf6: 210f movs r1, #15 8001cf8: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8001cfc: f7ff ff90 bl 8001c20 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8001d00: 4b05 ldr r3, [pc, #20] ; (8001d18 ) 8001d02: 2200 movs r2, #0 8001d04: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8001d06: 4b04 ldr r3, [pc, #16] ; (8001d18 ) 8001d08: 2207 movs r2, #7 8001d0a: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8001d0c: 2300 movs r3, #0 } 8001d0e: 4618 mov r0, r3 8001d10: 3708 adds r7, #8 8001d12: 46bd mov sp, r7 8001d14: bd80 pop {r7, pc} 8001d16: bf00 nop 8001d18: e000e010 .word 0xe000e010 08001d1c : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8001d1c: b580 push {r7, lr} 8001d1e: b082 sub sp, #8 8001d20: af00 add r7, sp, #0 8001d22: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8001d24: 6878 ldr r0, [r7, #4] 8001d26: f7ff ff2d bl 8001b84 <__NVIC_SetPriorityGrouping> } 8001d2a: bf00 nop 8001d2c: 3708 adds r7, #8 8001d2e: 46bd mov sp, r7 8001d30: bd80 pop {r7, pc} 08001d32 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8001d32: b580 push {r7, lr} 8001d34: b086 sub sp, #24 8001d36: af00 add r7, sp, #0 8001d38: 4603 mov r3, r0 8001d3a: 60b9 str r1, [r7, #8] 8001d3c: 607a str r2, [r7, #4] 8001d3e: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8001d40: 2300 movs r3, #0 8001d42: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8001d44: f7ff ff42 bl 8001bcc <__NVIC_GetPriorityGrouping> 8001d48: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8001d4a: 687a ldr r2, [r7, #4] 8001d4c: 68b9 ldr r1, [r7, #8] 8001d4e: 6978 ldr r0, [r7, #20] 8001d50: f7ff ff90 bl 8001c74 8001d54: 4602 mov r2, r0 8001d56: f997 300f ldrsb.w r3, [r7, #15] 8001d5a: 4611 mov r1, r2 8001d5c: 4618 mov r0, r3 8001d5e: f7ff ff5f bl 8001c20 <__NVIC_SetPriority> } 8001d62: bf00 nop 8001d64: 3718 adds r7, #24 8001d66: 46bd mov sp, r7 8001d68: bd80 pop {r7, pc} 08001d6a : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 8001d6a: b580 push {r7, lr} 8001d6c: b082 sub sp, #8 8001d6e: af00 add r7, sp, #0 8001d70: 4603 mov r3, r0 8001d72: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 8001d74: f997 3007 ldrsb.w r3, [r7, #7] 8001d78: 4618 mov r0, r3 8001d7a: f7ff ff35 bl 8001be8 <__NVIC_EnableIRQ> } 8001d7e: bf00 nop 8001d80: 3708 adds r7, #8 8001d82: 46bd mov sp, r7 8001d84: bd80 pop {r7, pc} 08001d86 : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 8001d86: b580 push {r7, lr} 8001d88: b082 sub sp, #8 8001d8a: af00 add r7, sp, #0 8001d8c: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 8001d8e: 6878 ldr r0, [r7, #4] 8001d90: f7ff ffa2 bl 8001cd8 8001d94: 4603 mov r3, r0 } 8001d96: 4618 mov r0, r3 8001d98: 3708 adds r7, #8 8001d9a: 46bd mov sp, r7 8001d9c: bd80 pop {r7, pc} ... 08001da0 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8001da0: b480 push {r7} 8001da2: b08b sub sp, #44 ; 0x2c 8001da4: af00 add r7, sp, #0 8001da6: 6078 str r0, [r7, #4] 8001da8: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 8001daa: 2300 movs r3, #0 8001dac: 627b str r3, [r7, #36] ; 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 8001dae: 2300 movs r3, #0 8001db0: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 8001db2: e179 b.n 80020a8 { /* Get the IO position */ ioposition = (0x01uL << position); 8001db4: 2201 movs r2, #1 8001db6: 6a7b ldr r3, [r7, #36] ; 0x24 8001db8: fa02 f303 lsl.w r3, r2, r3 8001dbc: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8001dbe: 683b ldr r3, [r7, #0] 8001dc0: 681b ldr r3, [r3, #0] 8001dc2: 69fa ldr r2, [r7, #28] 8001dc4: 4013 ands r3, r2 8001dc6: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 8001dc8: 69ba ldr r2, [r7, #24] 8001dca: 69fb ldr r3, [r7, #28] 8001dcc: 429a cmp r2, r3 8001dce: f040 8168 bne.w 80020a2 { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 8001dd2: 683b ldr r3, [r7, #0] 8001dd4: 685b ldr r3, [r3, #4] 8001dd6: 4aa0 ldr r2, [pc, #640] ; (8002058 ) 8001dd8: 4293 cmp r3, r2 8001dda: d05e beq.n 8001e9a 8001ddc: 4a9e ldr r2, [pc, #632] ; (8002058 ) 8001dde: 4293 cmp r3, r2 8001de0: d875 bhi.n 8001ece 8001de2: 4a9e ldr r2, [pc, #632] ; (800205c ) 8001de4: 4293 cmp r3, r2 8001de6: d058 beq.n 8001e9a 8001de8: 4a9c ldr r2, [pc, #624] ; (800205c ) 8001dea: 4293 cmp r3, r2 8001dec: d86f bhi.n 8001ece 8001dee: 4a9c ldr r2, [pc, #624] ; (8002060 ) 8001df0: 4293 cmp r3, r2 8001df2: d052 beq.n 8001e9a 8001df4: 4a9a ldr r2, [pc, #616] ; (8002060 ) 8001df6: 4293 cmp r3, r2 8001df8: d869 bhi.n 8001ece 8001dfa: 4a9a ldr r2, [pc, #616] ; (8002064 ) 8001dfc: 4293 cmp r3, r2 8001dfe: d04c beq.n 8001e9a 8001e00: 4a98 ldr r2, [pc, #608] ; (8002064 ) 8001e02: 4293 cmp r3, r2 8001e04: d863 bhi.n 8001ece 8001e06: 4a98 ldr r2, [pc, #608] ; (8002068 ) 8001e08: 4293 cmp r3, r2 8001e0a: d046 beq.n 8001e9a 8001e0c: 4a96 ldr r2, [pc, #600] ; (8002068 ) 8001e0e: 4293 cmp r3, r2 8001e10: d85d bhi.n 8001ece 8001e12: 2b12 cmp r3, #18 8001e14: d82a bhi.n 8001e6c 8001e16: 2b12 cmp r3, #18 8001e18: d859 bhi.n 8001ece 8001e1a: a201 add r2, pc, #4 ; (adr r2, 8001e20 ) 8001e1c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8001e20: 08001e9b .word 0x08001e9b 8001e24: 08001e75 .word 0x08001e75 8001e28: 08001e87 .word 0x08001e87 8001e2c: 08001ec9 .word 0x08001ec9 8001e30: 08001ecf .word 0x08001ecf 8001e34: 08001ecf .word 0x08001ecf 8001e38: 08001ecf .word 0x08001ecf 8001e3c: 08001ecf .word 0x08001ecf 8001e40: 08001ecf .word 0x08001ecf 8001e44: 08001ecf .word 0x08001ecf 8001e48: 08001ecf .word 0x08001ecf 8001e4c: 08001ecf .word 0x08001ecf 8001e50: 08001ecf .word 0x08001ecf 8001e54: 08001ecf .word 0x08001ecf 8001e58: 08001ecf .word 0x08001ecf 8001e5c: 08001ecf .word 0x08001ecf 8001e60: 08001ecf .word 0x08001ecf 8001e64: 08001e7d .word 0x08001e7d 8001e68: 08001e91 .word 0x08001e91 8001e6c: 4a7f ldr r2, [pc, #508] ; (800206c ) 8001e6e: 4293 cmp r3, r2 8001e70: d013 beq.n 8001e9a config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; 8001e72: e02c b.n 8001ece config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8001e74: 683b ldr r3, [r7, #0] 8001e76: 68db ldr r3, [r3, #12] 8001e78: 623b str r3, [r7, #32] break; 8001e7a: e029 b.n 8001ed0 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8001e7c: 683b ldr r3, [r7, #0] 8001e7e: 68db ldr r3, [r3, #12] 8001e80: 3304 adds r3, #4 8001e82: 623b str r3, [r7, #32] break; 8001e84: e024 b.n 8001ed0 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8001e86: 683b ldr r3, [r7, #0] 8001e88: 68db ldr r3, [r3, #12] 8001e8a: 3308 adds r3, #8 8001e8c: 623b str r3, [r7, #32] break; 8001e8e: e01f b.n 8001ed0 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8001e90: 683b ldr r3, [r7, #0] 8001e92: 68db ldr r3, [r3, #12] 8001e94: 330c adds r3, #12 8001e96: 623b str r3, [r7, #32] break; 8001e98: e01a b.n 8001ed0 if (GPIO_Init->Pull == GPIO_NOPULL) 8001e9a: 683b ldr r3, [r7, #0] 8001e9c: 689b ldr r3, [r3, #8] 8001e9e: 2b00 cmp r3, #0 8001ea0: d102 bne.n 8001ea8 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8001ea2: 2304 movs r3, #4 8001ea4: 623b str r3, [r7, #32] break; 8001ea6: e013 b.n 8001ed0 else if (GPIO_Init->Pull == GPIO_PULLUP) 8001ea8: 683b ldr r3, [r7, #0] 8001eaa: 689b ldr r3, [r3, #8] 8001eac: 2b01 cmp r3, #1 8001eae: d105 bne.n 8001ebc config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8001eb0: 2308 movs r3, #8 8001eb2: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; 8001eb4: 687b ldr r3, [r7, #4] 8001eb6: 69fa ldr r2, [r7, #28] 8001eb8: 611a str r2, [r3, #16] break; 8001eba: e009 b.n 8001ed0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8001ebc: 2308 movs r3, #8 8001ebe: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; 8001ec0: 687b ldr r3, [r7, #4] 8001ec2: 69fa ldr r2, [r7, #28] 8001ec4: 615a str r2, [r3, #20] break; 8001ec6: e003 b.n 8001ed0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8001ec8: 2300 movs r3, #0 8001eca: 623b str r3, [r7, #32] break; 8001ecc: e000 b.n 8001ed0 break; 8001ece: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8001ed0: 69bb ldr r3, [r7, #24] 8001ed2: 2bff cmp r3, #255 ; 0xff 8001ed4: d801 bhi.n 8001eda 8001ed6: 687b ldr r3, [r7, #4] 8001ed8: e001 b.n 8001ede 8001eda: 687b ldr r3, [r7, #4] 8001edc: 3304 adds r3, #4 8001ede: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); 8001ee0: 69bb ldr r3, [r7, #24] 8001ee2: 2bff cmp r3, #255 ; 0xff 8001ee4: d802 bhi.n 8001eec 8001ee6: 6a7b ldr r3, [r7, #36] ; 0x24 8001ee8: 009b lsls r3, r3, #2 8001eea: e002 b.n 8001ef2 8001eec: 6a7b ldr r3, [r7, #36] ; 0x24 8001eee: 3b08 subs r3, #8 8001ef0: 009b lsls r3, r3, #2 8001ef2: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8001ef4: 697b ldr r3, [r7, #20] 8001ef6: 681a ldr r2, [r3, #0] 8001ef8: 210f movs r1, #15 8001efa: 693b ldr r3, [r7, #16] 8001efc: fa01 f303 lsl.w r3, r1, r3 8001f00: 43db mvns r3, r3 8001f02: 401a ands r2, r3 8001f04: 6a39 ldr r1, [r7, #32] 8001f06: 693b ldr r3, [r7, #16] 8001f08: fa01 f303 lsl.w r3, r1, r3 8001f0c: 431a orrs r2, r3 8001f0e: 697b ldr r3, [r7, #20] 8001f10: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8001f12: 683b ldr r3, [r7, #0] 8001f14: 685b ldr r3, [r3, #4] 8001f16: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8001f1a: 2b00 cmp r3, #0 8001f1c: f000 80c1 beq.w 80020a2 { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8001f20: 4b53 ldr r3, [pc, #332] ; (8002070 ) 8001f22: 699b ldr r3, [r3, #24] 8001f24: 4a52 ldr r2, [pc, #328] ; (8002070 ) 8001f26: f043 0301 orr.w r3, r3, #1 8001f2a: 6193 str r3, [r2, #24] 8001f2c: 4b50 ldr r3, [pc, #320] ; (8002070 ) 8001f2e: 699b ldr r3, [r3, #24] 8001f30: f003 0301 and.w r3, r3, #1 8001f34: 60bb str r3, [r7, #8] 8001f36: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; 8001f38: 4a4e ldr r2, [pc, #312] ; (8002074 ) 8001f3a: 6a7b ldr r3, [r7, #36] ; 0x24 8001f3c: 089b lsrs r3, r3, #2 8001f3e: 3302 adds r3, #2 8001f40: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8001f44: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 8001f46: 6a7b ldr r3, [r7, #36] ; 0x24 8001f48: f003 0303 and.w r3, r3, #3 8001f4c: 009b lsls r3, r3, #2 8001f4e: 220f movs r2, #15 8001f50: fa02 f303 lsl.w r3, r2, r3 8001f54: 43db mvns r3, r3 8001f56: 68fa ldr r2, [r7, #12] 8001f58: 4013 ands r3, r2 8001f5a: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 8001f5c: 687b ldr r3, [r7, #4] 8001f5e: 4a46 ldr r2, [pc, #280] ; (8002078 ) 8001f60: 4293 cmp r3, r2 8001f62: d01f beq.n 8001fa4 8001f64: 687b ldr r3, [r7, #4] 8001f66: 4a45 ldr r2, [pc, #276] ; (800207c ) 8001f68: 4293 cmp r3, r2 8001f6a: d019 beq.n 8001fa0 8001f6c: 687b ldr r3, [r7, #4] 8001f6e: 4a44 ldr r2, [pc, #272] ; (8002080 ) 8001f70: 4293 cmp r3, r2 8001f72: d013 beq.n 8001f9c 8001f74: 687b ldr r3, [r7, #4] 8001f76: 4a43 ldr r2, [pc, #268] ; (8002084 ) 8001f78: 4293 cmp r3, r2 8001f7a: d00d beq.n 8001f98 8001f7c: 687b ldr r3, [r7, #4] 8001f7e: 4a42 ldr r2, [pc, #264] ; (8002088 ) 8001f80: 4293 cmp r3, r2 8001f82: d007 beq.n 8001f94 8001f84: 687b ldr r3, [r7, #4] 8001f86: 4a41 ldr r2, [pc, #260] ; (800208c ) 8001f88: 4293 cmp r3, r2 8001f8a: d101 bne.n 8001f90 8001f8c: 2305 movs r3, #5 8001f8e: e00a b.n 8001fa6 8001f90: 2306 movs r3, #6 8001f92: e008 b.n 8001fa6 8001f94: 2304 movs r3, #4 8001f96: e006 b.n 8001fa6 8001f98: 2303 movs r3, #3 8001f9a: e004 b.n 8001fa6 8001f9c: 2302 movs r3, #2 8001f9e: e002 b.n 8001fa6 8001fa0: 2301 movs r3, #1 8001fa2: e000 b.n 8001fa6 8001fa4: 2300 movs r3, #0 8001fa6: 6a7a ldr r2, [r7, #36] ; 0x24 8001fa8: f002 0203 and.w r2, r2, #3 8001fac: 0092 lsls r2, r2, #2 8001fae: 4093 lsls r3, r2 8001fb0: 68fa ldr r2, [r7, #12] 8001fb2: 4313 orrs r3, r2 8001fb4: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; 8001fb6: 492f ldr r1, [pc, #188] ; (8002074 ) 8001fb8: 6a7b ldr r3, [r7, #36] ; 0x24 8001fba: 089b lsrs r3, r3, #2 8001fbc: 3302 adds r3, #2 8001fbe: 68fa ldr r2, [r7, #12] 8001fc0: f841 2023 str.w r2, [r1, r3, lsl #2] /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8001fc4: 683b ldr r3, [r7, #0] 8001fc6: 685b ldr r3, [r3, #4] 8001fc8: f403 3380 and.w r3, r3, #65536 ; 0x10000 8001fcc: 2b00 cmp r3, #0 8001fce: d006 beq.n 8001fde { SET_BIT(EXTI->IMR, iocurrent); 8001fd0: 4b2f ldr r3, [pc, #188] ; (8002090 ) 8001fd2: 681a ldr r2, [r3, #0] 8001fd4: 492e ldr r1, [pc, #184] ; (8002090 ) 8001fd6: 69bb ldr r3, [r7, #24] 8001fd8: 4313 orrs r3, r2 8001fda: 600b str r3, [r1, #0] 8001fdc: e006 b.n 8001fec } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8001fde: 4b2c ldr r3, [pc, #176] ; (8002090 ) 8001fe0: 681a ldr r2, [r3, #0] 8001fe2: 69bb ldr r3, [r7, #24] 8001fe4: 43db mvns r3, r3 8001fe6: 492a ldr r1, [pc, #168] ; (8002090 ) 8001fe8: 4013 ands r3, r2 8001fea: 600b str r3, [r1, #0] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8001fec: 683b ldr r3, [r7, #0] 8001fee: 685b ldr r3, [r3, #4] 8001ff0: f403 3300 and.w r3, r3, #131072 ; 0x20000 8001ff4: 2b00 cmp r3, #0 8001ff6: d006 beq.n 8002006 { SET_BIT(EXTI->EMR, iocurrent); 8001ff8: 4b25 ldr r3, [pc, #148] ; (8002090 ) 8001ffa: 685a ldr r2, [r3, #4] 8001ffc: 4924 ldr r1, [pc, #144] ; (8002090 ) 8001ffe: 69bb ldr r3, [r7, #24] 8002000: 4313 orrs r3, r2 8002002: 604b str r3, [r1, #4] 8002004: e006 b.n 8002014 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8002006: 4b22 ldr r3, [pc, #136] ; (8002090 ) 8002008: 685a ldr r2, [r3, #4] 800200a: 69bb ldr r3, [r7, #24] 800200c: 43db mvns r3, r3 800200e: 4920 ldr r1, [pc, #128] ; (8002090 ) 8002010: 4013 ands r3, r2 8002012: 604b str r3, [r1, #4] } /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8002014: 683b ldr r3, [r7, #0] 8002016: 685b ldr r3, [r3, #4] 8002018: f403 1380 and.w r3, r3, #1048576 ; 0x100000 800201c: 2b00 cmp r3, #0 800201e: d006 beq.n 800202e { SET_BIT(EXTI->RTSR, iocurrent); 8002020: 4b1b ldr r3, [pc, #108] ; (8002090 ) 8002022: 689a ldr r2, [r3, #8] 8002024: 491a ldr r1, [pc, #104] ; (8002090 ) 8002026: 69bb ldr r3, [r7, #24] 8002028: 4313 orrs r3, r2 800202a: 608b str r3, [r1, #8] 800202c: e006 b.n 800203c } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 800202e: 4b18 ldr r3, [pc, #96] ; (8002090 ) 8002030: 689a ldr r2, [r3, #8] 8002032: 69bb ldr r3, [r7, #24] 8002034: 43db mvns r3, r3 8002036: 4916 ldr r1, [pc, #88] ; (8002090 ) 8002038: 4013 ands r3, r2 800203a: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 800203c: 683b ldr r3, [r7, #0] 800203e: 685b ldr r3, [r3, #4] 8002040: f403 1300 and.w r3, r3, #2097152 ; 0x200000 8002044: 2b00 cmp r3, #0 8002046: d025 beq.n 8002094 { SET_BIT(EXTI->FTSR, iocurrent); 8002048: 4b11 ldr r3, [pc, #68] ; (8002090 ) 800204a: 68da ldr r2, [r3, #12] 800204c: 4910 ldr r1, [pc, #64] ; (8002090 ) 800204e: 69bb ldr r3, [r7, #24] 8002050: 4313 orrs r3, r2 8002052: 60cb str r3, [r1, #12] 8002054: e025 b.n 80020a2 8002056: bf00 nop 8002058: 10320000 .word 0x10320000 800205c: 10310000 .word 0x10310000 8002060: 10220000 .word 0x10220000 8002064: 10210000 .word 0x10210000 8002068: 10120000 .word 0x10120000 800206c: 10110000 .word 0x10110000 8002070: 40021000 .word 0x40021000 8002074: 40010000 .word 0x40010000 8002078: 40010800 .word 0x40010800 800207c: 40010c00 .word 0x40010c00 8002080: 40011000 .word 0x40011000 8002084: 40011400 .word 0x40011400 8002088: 40011800 .word 0x40011800 800208c: 40011c00 .word 0x40011c00 8002090: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8002094: 4b0b ldr r3, [pc, #44] ; (80020c4 ) 8002096: 68da ldr r2, [r3, #12] 8002098: 69bb ldr r3, [r7, #24] 800209a: 43db mvns r3, r3 800209c: 4909 ldr r1, [pc, #36] ; (80020c4 ) 800209e: 4013 ands r3, r2 80020a0: 60cb str r3, [r1, #12] } } } position++; 80020a2: 6a7b ldr r3, [r7, #36] ; 0x24 80020a4: 3301 adds r3, #1 80020a6: 627b str r3, [r7, #36] ; 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) 80020a8: 683b ldr r3, [r7, #0] 80020aa: 681a ldr r2, [r3, #0] 80020ac: 6a7b ldr r3, [r7, #36] ; 0x24 80020ae: fa22 f303 lsr.w r3, r2, r3 80020b2: 2b00 cmp r3, #0 80020b4: f47f ae7e bne.w 8001db4 } } 80020b8: bf00 nop 80020ba: bf00 nop 80020bc: 372c adds r7, #44 ; 0x2c 80020be: 46bd mov sp, r7 80020c0: bc80 pop {r7} 80020c2: 4770 bx lr 80020c4: 40010400 .word 0x40010400 080020c8 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 80020c8: b480 push {r7} 80020ca: b085 sub sp, #20 80020cc: af00 add r7, sp, #0 80020ce: 6078 str r0, [r7, #4] 80020d0: 460b mov r3, r1 80020d2: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 80020d4: 687b ldr r3, [r7, #4] 80020d6: 689a ldr r2, [r3, #8] 80020d8: 887b ldrh r3, [r7, #2] 80020da: 4013 ands r3, r2 80020dc: 2b00 cmp r3, #0 80020de: d002 beq.n 80020e6 { bitstatus = GPIO_PIN_SET; 80020e0: 2301 movs r3, #1 80020e2: 73fb strb r3, [r7, #15] 80020e4: e001 b.n 80020ea } else { bitstatus = GPIO_PIN_RESET; 80020e6: 2300 movs r3, #0 80020e8: 73fb strb r3, [r7, #15] } return bitstatus; 80020ea: 7bfb ldrb r3, [r7, #15] } 80020ec: 4618 mov r0, r3 80020ee: 3714 adds r7, #20 80020f0: 46bd mov sp, r7 80020f2: bc80 pop {r7} 80020f4: 4770 bx lr 080020f6 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 80020f6: b480 push {r7} 80020f8: b083 sub sp, #12 80020fa: af00 add r7, sp, #0 80020fc: 6078 str r0, [r7, #4] 80020fe: 460b mov r3, r1 8002100: 807b strh r3, [r7, #2] 8002102: 4613 mov r3, r2 8002104: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8002106: 787b ldrb r3, [r7, #1] 8002108: 2b00 cmp r3, #0 800210a: d003 beq.n 8002114 { GPIOx->BSRR = GPIO_Pin; 800210c: 887a ldrh r2, [r7, #2] 800210e: 687b ldr r3, [r7, #4] 8002110: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } 8002112: e003 b.n 800211c GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 8002114: 887b ldrh r3, [r7, #2] 8002116: 041a lsls r2, r3, #16 8002118: 687b ldr r3, [r7, #4] 800211a: 611a str r2, [r3, #16] } 800211c: bf00 nop 800211e: 370c adds r7, #12 8002120: 46bd mov sp, r7 8002122: bc80 pop {r7} 8002124: 4770 bx lr ... 08002128 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 8002128: b580 push {r7, lr} 800212a: b084 sub sp, #16 800212c: af00 add r7, sp, #0 800212e: 6078 str r0, [r7, #4] uint32_t freqrange; uint32_t pclk1; /* Check the I2C handle allocation */ if (hi2c == NULL) 8002130: 687b ldr r3, [r7, #4] 8002132: 2b00 cmp r3, #0 8002134: d101 bne.n 800213a { return HAL_ERROR; 8002136: 2301 movs r3, #1 8002138: e12b b.n 8002392 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) 800213a: 687b ldr r3, [r7, #4] 800213c: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 8002140: b2db uxtb r3, r3 8002142: 2b00 cmp r3, #0 8002144: d106 bne.n 8002154 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 8002146: 687b ldr r3, [r7, #4] 8002148: 2200 movs r2, #0 800214a: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); 800214e: 6878 ldr r0, [r7, #4] 8002150: f7ff fa66 bl 8001620 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; 8002154: 687b ldr r3, [r7, #4] 8002156: 2224 movs r2, #36 ; 0x24 8002158: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 800215c: 687b ldr r3, [r7, #4] 800215e: 681b ldr r3, [r3, #0] 8002160: 681a ldr r2, [r3, #0] 8002162: 687b ldr r3, [r7, #4] 8002164: 681b ldr r3, [r3, #0] 8002166: f022 0201 bic.w r2, r2, #1 800216a: 601a str r2, [r3, #0] /*Reset I2C*/ hi2c->Instance->CR1 |= I2C_CR1_SWRST; 800216c: 687b ldr r3, [r7, #4] 800216e: 681b ldr r3, [r3, #0] 8002170: 681a ldr r2, [r3, #0] 8002172: 687b ldr r3, [r7, #4] 8002174: 681b ldr r3, [r3, #0] 8002176: f442 4200 orr.w r2, r2, #32768 ; 0x8000 800217a: 601a str r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_SWRST; 800217c: 687b ldr r3, [r7, #4] 800217e: 681b ldr r3, [r3, #0] 8002180: 681a ldr r2, [r3, #0] 8002182: 687b ldr r3, [r7, #4] 8002184: 681b ldr r3, [r3, #0] 8002186: f422 4200 bic.w r2, r2, #32768 ; 0x8000 800218a: 601a str r2, [r3, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); 800218c: f001 fba0 bl 80038d0 8002190: 60f8 str r0, [r7, #12] /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8002192: 687b ldr r3, [r7, #4] 8002194: 685b ldr r3, [r3, #4] 8002196: 4a81 ldr r2, [pc, #516] ; (800239c ) 8002198: 4293 cmp r3, r2 800219a: d807 bhi.n 80021ac 800219c: 68fb ldr r3, [r7, #12] 800219e: 4a80 ldr r2, [pc, #512] ; (80023a0 ) 80021a0: 4293 cmp r3, r2 80021a2: bf94 ite ls 80021a4: 2301 movls r3, #1 80021a6: 2300 movhi r3, #0 80021a8: b2db uxtb r3, r3 80021aa: e006 b.n 80021ba 80021ac: 68fb ldr r3, [r7, #12] 80021ae: 4a7d ldr r2, [pc, #500] ; (80023a4 ) 80021b0: 4293 cmp r3, r2 80021b2: bf94 ite ls 80021b4: 2301 movls r3, #1 80021b6: 2300 movhi r3, #0 80021b8: b2db uxtb r3, r3 80021ba: 2b00 cmp r3, #0 80021bc: d001 beq.n 80021c2 { return HAL_ERROR; 80021be: 2301 movs r3, #1 80021c0: e0e7 b.n 8002392 } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); 80021c2: 68fb ldr r3, [r7, #12] 80021c4: 4a78 ldr r2, [pc, #480] ; (80023a8 ) 80021c6: fba2 2303 umull r2, r3, r2, r3 80021ca: 0c9b lsrs r3, r3, #18 80021cc: 60bb str r3, [r7, #8] /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange); 80021ce: 687b ldr r3, [r7, #4] 80021d0: 681b ldr r3, [r3, #0] 80021d2: 685b ldr r3, [r3, #4] 80021d4: f023 013f bic.w r1, r3, #63 ; 0x3f 80021d8: 687b ldr r3, [r7, #4] 80021da: 681b ldr r3, [r3, #0] 80021dc: 68ba ldr r2, [r7, #8] 80021de: 430a orrs r2, r1 80021e0: 605a str r2, [r3, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed)); 80021e2: 687b ldr r3, [r7, #4] 80021e4: 681b ldr r3, [r3, #0] 80021e6: 6a1b ldr r3, [r3, #32] 80021e8: f023 013f bic.w r1, r3, #63 ; 0x3f 80021ec: 687b ldr r3, [r7, #4] 80021ee: 685b ldr r3, [r3, #4] 80021f0: 4a6a ldr r2, [pc, #424] ; (800239c ) 80021f2: 4293 cmp r3, r2 80021f4: d802 bhi.n 80021fc 80021f6: 68bb ldr r3, [r7, #8] 80021f8: 3301 adds r3, #1 80021fa: e009 b.n 8002210 80021fc: 68bb ldr r3, [r7, #8] 80021fe: f44f 7296 mov.w r2, #300 ; 0x12c 8002202: fb02 f303 mul.w r3, r2, r3 8002206: 4a69 ldr r2, [pc, #420] ; (80023ac ) 8002208: fba2 2303 umull r2, r3, r2, r3 800220c: 099b lsrs r3, r3, #6 800220e: 3301 adds r3, #1 8002210: 687a ldr r2, [r7, #4] 8002212: 6812 ldr r2, [r2, #0] 8002214: 430b orrs r3, r1 8002216: 6213 str r3, [r2, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle)); 8002218: 687b ldr r3, [r7, #4] 800221a: 681b ldr r3, [r3, #0] 800221c: 69db ldr r3, [r3, #28] 800221e: f423 424f bic.w r2, r3, #52992 ; 0xcf00 8002222: f022 02ff bic.w r2, r2, #255 ; 0xff 8002226: 687b ldr r3, [r7, #4] 8002228: 685b ldr r3, [r3, #4] 800222a: 495c ldr r1, [pc, #368] ; (800239c ) 800222c: 428b cmp r3, r1 800222e: d819 bhi.n 8002264 8002230: 68fb ldr r3, [r7, #12] 8002232: 1e59 subs r1, r3, #1 8002234: 687b ldr r3, [r7, #4] 8002236: 685b ldr r3, [r3, #4] 8002238: 005b lsls r3, r3, #1 800223a: fbb1 f3f3 udiv r3, r1, r3 800223e: 1c59 adds r1, r3, #1 8002240: f640 73fc movw r3, #4092 ; 0xffc 8002244: 400b ands r3, r1 8002246: 2b00 cmp r3, #0 8002248: d00a beq.n 8002260 800224a: 68fb ldr r3, [r7, #12] 800224c: 1e59 subs r1, r3, #1 800224e: 687b ldr r3, [r7, #4] 8002250: 685b ldr r3, [r3, #4] 8002252: 005b lsls r3, r3, #1 8002254: fbb1 f3f3 udiv r3, r1, r3 8002258: 3301 adds r3, #1 800225a: f3c3 030b ubfx r3, r3, #0, #12 800225e: e051 b.n 8002304 8002260: 2304 movs r3, #4 8002262: e04f b.n 8002304 8002264: 687b ldr r3, [r7, #4] 8002266: 689b ldr r3, [r3, #8] 8002268: 2b00 cmp r3, #0 800226a: d111 bne.n 8002290 800226c: 68fb ldr r3, [r7, #12] 800226e: 1e58 subs r0, r3, #1 8002270: 687b ldr r3, [r7, #4] 8002272: 6859 ldr r1, [r3, #4] 8002274: 460b mov r3, r1 8002276: 005b lsls r3, r3, #1 8002278: 440b add r3, r1 800227a: fbb0 f3f3 udiv r3, r0, r3 800227e: 3301 adds r3, #1 8002280: f3c3 030b ubfx r3, r3, #0, #12 8002284: 2b00 cmp r3, #0 8002286: bf0c ite eq 8002288: 2301 moveq r3, #1 800228a: 2300 movne r3, #0 800228c: b2db uxtb r3, r3 800228e: e012 b.n 80022b6 8002290: 68fb ldr r3, [r7, #12] 8002292: 1e58 subs r0, r3, #1 8002294: 687b ldr r3, [r7, #4] 8002296: 6859 ldr r1, [r3, #4] 8002298: 460b mov r3, r1 800229a: 009b lsls r3, r3, #2 800229c: 440b add r3, r1 800229e: 0099 lsls r1, r3, #2 80022a0: 440b add r3, r1 80022a2: fbb0 f3f3 udiv r3, r0, r3 80022a6: 3301 adds r3, #1 80022a8: f3c3 030b ubfx r3, r3, #0, #12 80022ac: 2b00 cmp r3, #0 80022ae: bf0c ite eq 80022b0: 2301 moveq r3, #1 80022b2: 2300 movne r3, #0 80022b4: b2db uxtb r3, r3 80022b6: 2b00 cmp r3, #0 80022b8: d001 beq.n 80022be 80022ba: 2301 movs r3, #1 80022bc: e022 b.n 8002304 80022be: 687b ldr r3, [r7, #4] 80022c0: 689b ldr r3, [r3, #8] 80022c2: 2b00 cmp r3, #0 80022c4: d10e bne.n 80022e4 80022c6: 68fb ldr r3, [r7, #12] 80022c8: 1e58 subs r0, r3, #1 80022ca: 687b ldr r3, [r7, #4] 80022cc: 6859 ldr r1, [r3, #4] 80022ce: 460b mov r3, r1 80022d0: 005b lsls r3, r3, #1 80022d2: 440b add r3, r1 80022d4: fbb0 f3f3 udiv r3, r0, r3 80022d8: 3301 adds r3, #1 80022da: f3c3 030b ubfx r3, r3, #0, #12 80022de: f443 4300 orr.w r3, r3, #32768 ; 0x8000 80022e2: e00f b.n 8002304 80022e4: 68fb ldr r3, [r7, #12] 80022e6: 1e58 subs r0, r3, #1 80022e8: 687b ldr r3, [r7, #4] 80022ea: 6859 ldr r1, [r3, #4] 80022ec: 460b mov r3, r1 80022ee: 009b lsls r3, r3, #2 80022f0: 440b add r3, r1 80022f2: 0099 lsls r1, r3, #2 80022f4: 440b add r3, r1 80022f6: fbb0 f3f3 udiv r3, r0, r3 80022fa: 3301 adds r3, #1 80022fc: f3c3 030b ubfx r3, r3, #0, #12 8002300: f443 4340 orr.w r3, r3, #49152 ; 0xc000 8002304: 6879 ldr r1, [r7, #4] 8002306: 6809 ldr r1, [r1, #0] 8002308: 4313 orrs r3, r2 800230a: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode)); 800230c: 687b ldr r3, [r7, #4] 800230e: 681b ldr r3, [r3, #0] 8002310: 681b ldr r3, [r3, #0] 8002312: f023 01c0 bic.w r1, r3, #192 ; 0xc0 8002316: 687b ldr r3, [r7, #4] 8002318: 69da ldr r2, [r3, #28] 800231a: 687b ldr r3, [r7, #4] 800231c: 6a1b ldr r3, [r3, #32] 800231e: 431a orrs r2, r3 8002320: 687b ldr r3, [r7, #4] 8002322: 681b ldr r3, [r3, #0] 8002324: 430a orrs r2, r1 8002326: 601a str r2, [r3, #0] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Configure I2Cx: Own Address1 and addressing mode */ MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1)); 8002328: 687b ldr r3, [r7, #4] 800232a: 681b ldr r3, [r3, #0] 800232c: 689b ldr r3, [r3, #8] 800232e: f423 4303 bic.w r3, r3, #33536 ; 0x8300 8002332: f023 03ff bic.w r3, r3, #255 ; 0xff 8002336: 687a ldr r2, [r7, #4] 8002338: 6911 ldr r1, [r2, #16] 800233a: 687a ldr r2, [r7, #4] 800233c: 68d2 ldr r2, [r2, #12] 800233e: 4311 orrs r1, r2 8002340: 687a ldr r2, [r7, #4] 8002342: 6812 ldr r2, [r2, #0] 8002344: 430b orrs r3, r1 8002346: 6093 str r3, [r2, #8] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Configure I2Cx: Dual mode and Own Address2 */ MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2)); 8002348: 687b ldr r3, [r7, #4] 800234a: 681b ldr r3, [r3, #0] 800234c: 68db ldr r3, [r3, #12] 800234e: f023 01ff bic.w r1, r3, #255 ; 0xff 8002352: 687b ldr r3, [r7, #4] 8002354: 695a ldr r2, [r3, #20] 8002356: 687b ldr r3, [r7, #4] 8002358: 699b ldr r3, [r3, #24] 800235a: 431a orrs r2, r3 800235c: 687b ldr r3, [r7, #4] 800235e: 681b ldr r3, [r3, #0] 8002360: 430a orrs r2, r1 8002362: 60da str r2, [r3, #12] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 8002364: 687b ldr r3, [r7, #4] 8002366: 681b ldr r3, [r3, #0] 8002368: 681a ldr r2, [r3, #0] 800236a: 687b ldr r3, [r7, #4] 800236c: 681b ldr r3, [r3, #0] 800236e: f042 0201 orr.w r2, r2, #1 8002372: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8002374: 687b ldr r3, [r7, #4] 8002376: 2200 movs r2, #0 8002378: 641a str r2, [r3, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_READY; 800237a: 687b ldr r3, [r7, #4] 800237c: 2220 movs r2, #32 800237e: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->PreviousState = I2C_STATE_NONE; 8002382: 687b ldr r3, [r7, #4] 8002384: 2200 movs r2, #0 8002386: 631a str r2, [r3, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8002388: 687b ldr r3, [r7, #4] 800238a: 2200 movs r2, #0 800238c: f883 203e strb.w r2, [r3, #62] ; 0x3e return HAL_OK; 8002390: 2300 movs r3, #0 } 8002392: 4618 mov r0, r3 8002394: 3710 adds r7, #16 8002396: 46bd mov sp, r7 8002398: bd80 pop {r7, pc} 800239a: bf00 nop 800239c: 000186a0 .word 0x000186a0 80023a0: 001e847f .word 0x001e847f 80023a4: 003d08ff .word 0x003d08ff 80023a8: 431bde83 .word 0x431bde83 80023ac: 10624dd3 .word 0x10624dd3 080023b0 : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 80023b0: b580 push {r7, lr} 80023b2: b088 sub sp, #32 80023b4: af02 add r7, sp, #8 80023b6: 60f8 str r0, [r7, #12] 80023b8: 4608 mov r0, r1 80023ba: 4611 mov r1, r2 80023bc: 461a mov r2, r3 80023be: 4603 mov r3, r0 80023c0: 817b strh r3, [r7, #10] 80023c2: 460b mov r3, r1 80023c4: 813b strh r3, [r7, #8] 80023c6: 4613 mov r3, r2 80023c8: 80fb strh r3, [r7, #6] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); 80023ca: f7ff fbad bl 8001b28 80023ce: 6178 str r0, [r7, #20] /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 80023d0: 68fb ldr r3, [r7, #12] 80023d2: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 80023d6: b2db uxtb r3, r3 80023d8: 2b20 cmp r3, #32 80023da: f040 80d9 bne.w 8002590 { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 80023de: 697b ldr r3, [r7, #20] 80023e0: 9300 str r3, [sp, #0] 80023e2: 2319 movs r3, #25 80023e4: 2201 movs r2, #1 80023e6: 496d ldr r1, [pc, #436] ; (800259c ) 80023e8: 68f8 ldr r0, [r7, #12] 80023ea: f000 fcc1 bl 8002d70 80023ee: 4603 mov r3, r0 80023f0: 2b00 cmp r3, #0 80023f2: d001 beq.n 80023f8 { return HAL_BUSY; 80023f4: 2302 movs r3, #2 80023f6: e0cc b.n 8002592 } /* Process Locked */ __HAL_LOCK(hi2c); 80023f8: 68fb ldr r3, [r7, #12] 80023fa: f893 303c ldrb.w r3, [r3, #60] ; 0x3c 80023fe: 2b01 cmp r3, #1 8002400: d101 bne.n 8002406 8002402: 2302 movs r3, #2 8002404: e0c5 b.n 8002592 8002406: 68fb ldr r3, [r7, #12] 8002408: 2201 movs r2, #1 800240a: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 800240e: 68fb ldr r3, [r7, #12] 8002410: 681b ldr r3, [r3, #0] 8002412: 681b ldr r3, [r3, #0] 8002414: f003 0301 and.w r3, r3, #1 8002418: 2b01 cmp r3, #1 800241a: d007 beq.n 800242c { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 800241c: 68fb ldr r3, [r7, #12] 800241e: 681b ldr r3, [r3, #0] 8002420: 681a ldr r2, [r3, #0] 8002422: 68fb ldr r3, [r7, #12] 8002424: 681b ldr r3, [r3, #0] 8002426: f042 0201 orr.w r2, r2, #1 800242a: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); 800242c: 68fb ldr r3, [r7, #12] 800242e: 681b ldr r3, [r3, #0] 8002430: 681a ldr r2, [r3, #0] 8002432: 68fb ldr r3, [r7, #12] 8002434: 681b ldr r3, [r3, #0] 8002436: f422 6200 bic.w r2, r2, #2048 ; 0x800 800243a: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_TX; 800243c: 68fb ldr r3, [r7, #12] 800243e: 2221 movs r2, #33 ; 0x21 8002440: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 8002444: 68fb ldr r3, [r7, #12] 8002446: 2240 movs r2, #64 ; 0x40 8002448: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 800244c: 68fb ldr r3, [r7, #12] 800244e: 2200 movs r2, #0 8002450: 641a str r2, [r3, #64] ; 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; 8002452: 68fb ldr r3, [r7, #12] 8002454: 6a3a ldr r2, [r7, #32] 8002456: 625a str r2, [r3, #36] ; 0x24 hi2c->XferCount = Size; 8002458: 68fb ldr r3, [r7, #12] 800245a: 8cba ldrh r2, [r7, #36] ; 0x24 800245c: 855a strh r2, [r3, #42] ; 0x2a hi2c->XferSize = hi2c->XferCount; 800245e: 68fb ldr r3, [r7, #12] 8002460: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002462: b29a uxth r2, r3 8002464: 68fb ldr r3, [r7, #12] 8002466: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8002468: 68fb ldr r3, [r7, #12] 800246a: 4a4d ldr r2, [pc, #308] ; (80025a0 ) 800246c: 62da str r2, [r3, #44] ; 0x2c /* Send Slave Address and Memory Address */ if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 800246e: 88f8 ldrh r0, [r7, #6] 8002470: 893a ldrh r2, [r7, #8] 8002472: 8979 ldrh r1, [r7, #10] 8002474: 697b ldr r3, [r7, #20] 8002476: 9301 str r3, [sp, #4] 8002478: 6abb ldr r3, [r7, #40] ; 0x28 800247a: 9300 str r3, [sp, #0] 800247c: 4603 mov r3, r0 800247e: 68f8 ldr r0, [r7, #12] 8002480: f000 faf8 bl 8002a74 8002484: 4603 mov r3, r0 8002486: 2b00 cmp r3, #0 8002488: d052 beq.n 8002530 { return HAL_ERROR; 800248a: 2301 movs r3, #1 800248c: e081 b.n 8002592 } while (hi2c->XferSize > 0U) { /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 800248e: 697a ldr r2, [r7, #20] 8002490: 6ab9 ldr r1, [r7, #40] ; 0x28 8002492: 68f8 ldr r0, [r7, #12] 8002494: f000 fd42 bl 8002f1c 8002498: 4603 mov r3, r0 800249a: 2b00 cmp r3, #0 800249c: d00d beq.n 80024ba { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 800249e: 68fb ldr r3, [r7, #12] 80024a0: 6c1b ldr r3, [r3, #64] ; 0x40 80024a2: 2b04 cmp r3, #4 80024a4: d107 bne.n 80024b6 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 80024a6: 68fb ldr r3, [r7, #12] 80024a8: 681b ldr r3, [r3, #0] 80024aa: 681a ldr r2, [r3, #0] 80024ac: 68fb ldr r3, [r7, #12] 80024ae: 681b ldr r3, [r3, #0] 80024b0: f442 7200 orr.w r2, r2, #512 ; 0x200 80024b4: 601a str r2, [r3, #0] } return HAL_ERROR; 80024b6: 2301 movs r3, #1 80024b8: e06b b.n 8002592 } /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; 80024ba: 68fb ldr r3, [r7, #12] 80024bc: 6a5b ldr r3, [r3, #36] ; 0x24 80024be: 781a ldrb r2, [r3, #0] 80024c0: 68fb ldr r3, [r7, #12] 80024c2: 681b ldr r3, [r3, #0] 80024c4: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 80024c6: 68fb ldr r3, [r7, #12] 80024c8: 6a5b ldr r3, [r3, #36] ; 0x24 80024ca: 1c5a adds r2, r3, #1 80024cc: 68fb ldr r3, [r7, #12] 80024ce: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 80024d0: 68fb ldr r3, [r7, #12] 80024d2: 8d1b ldrh r3, [r3, #40] ; 0x28 80024d4: 3b01 subs r3, #1 80024d6: b29a uxth r2, r3 80024d8: 68fb ldr r3, [r7, #12] 80024da: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 80024dc: 68fb ldr r3, [r7, #12] 80024de: 8d5b ldrh r3, [r3, #42] ; 0x2a 80024e0: b29b uxth r3, r3 80024e2: 3b01 subs r3, #1 80024e4: b29a uxth r2, r3 80024e6: 68fb ldr r3, [r7, #12] 80024e8: 855a strh r2, [r3, #42] ; 0x2a if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) 80024ea: 68fb ldr r3, [r7, #12] 80024ec: 681b ldr r3, [r3, #0] 80024ee: 695b ldr r3, [r3, #20] 80024f0: f003 0304 and.w r3, r3, #4 80024f4: 2b04 cmp r3, #4 80024f6: d11b bne.n 8002530 80024f8: 68fb ldr r3, [r7, #12] 80024fa: 8d1b ldrh r3, [r3, #40] ; 0x28 80024fc: 2b00 cmp r3, #0 80024fe: d017 beq.n 8002530 { /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; 8002500: 68fb ldr r3, [r7, #12] 8002502: 6a5b ldr r3, [r3, #36] ; 0x24 8002504: 781a ldrb r2, [r3, #0] 8002506: 68fb ldr r3, [r7, #12] 8002508: 681b ldr r3, [r3, #0] 800250a: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 800250c: 68fb ldr r3, [r7, #12] 800250e: 6a5b ldr r3, [r3, #36] ; 0x24 8002510: 1c5a adds r2, r3, #1 8002512: 68fb ldr r3, [r7, #12] 8002514: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002516: 68fb ldr r3, [r7, #12] 8002518: 8d1b ldrh r3, [r3, #40] ; 0x28 800251a: 3b01 subs r3, #1 800251c: b29a uxth r2, r3 800251e: 68fb ldr r3, [r7, #12] 8002520: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002522: 68fb ldr r3, [r7, #12] 8002524: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002526: b29b uxth r3, r3 8002528: 3b01 subs r3, #1 800252a: b29a uxth r2, r3 800252c: 68fb ldr r3, [r7, #12] 800252e: 855a strh r2, [r3, #42] ; 0x2a while (hi2c->XferSize > 0U) 8002530: 68fb ldr r3, [r7, #12] 8002532: 8d1b ldrh r3, [r3, #40] ; 0x28 8002534: 2b00 cmp r3, #0 8002536: d1aa bne.n 800248e } } /* Wait until BTF flag is set */ if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8002538: 697a ldr r2, [r7, #20] 800253a: 6ab9 ldr r1, [r7, #40] ; 0x28 800253c: 68f8 ldr r0, [r7, #12] 800253e: f000 fd2e bl 8002f9e 8002542: 4603 mov r3, r0 8002544: 2b00 cmp r3, #0 8002546: d00d beq.n 8002564 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002548: 68fb ldr r3, [r7, #12] 800254a: 6c1b ldr r3, [r3, #64] ; 0x40 800254c: 2b04 cmp r3, #4 800254e: d107 bne.n 8002560 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002550: 68fb ldr r3, [r7, #12] 8002552: 681b ldr r3, [r3, #0] 8002554: 681a ldr r2, [r3, #0] 8002556: 68fb ldr r3, [r7, #12] 8002558: 681b ldr r3, [r3, #0] 800255a: f442 7200 orr.w r2, r2, #512 ; 0x200 800255e: 601a str r2, [r3, #0] } return HAL_ERROR; 8002560: 2301 movs r3, #1 8002562: e016 b.n 8002592 } /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002564: 68fb ldr r3, [r7, #12] 8002566: 681b ldr r3, [r3, #0] 8002568: 681a ldr r2, [r3, #0] 800256a: 68fb ldr r3, [r7, #12] 800256c: 681b ldr r3, [r3, #0] 800256e: f442 7200 orr.w r2, r2, #512 ; 0x200 8002572: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 8002574: 68fb ldr r3, [r7, #12] 8002576: 2220 movs r2, #32 8002578: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 800257c: 68fb ldr r3, [r7, #12] 800257e: 2200 movs r2, #0 8002580: f883 203e strb.w r2, [r3, #62] ; 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002584: 68fb ldr r3, [r7, #12] 8002586: 2200 movs r2, #0 8002588: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; 800258c: 2300 movs r3, #0 800258e: e000 b.n 8002592 } else { return HAL_BUSY; 8002590: 2302 movs r3, #2 } } 8002592: 4618 mov r0, r3 8002594: 3718 adds r7, #24 8002596: 46bd mov sp, r7 8002598: bd80 pop {r7, pc} 800259a: bf00 nop 800259c: 00100002 .word 0x00100002 80025a0: ffff0000 .word 0xffff0000 080025a4 : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 80025a4: b580 push {r7, lr} 80025a6: b08c sub sp, #48 ; 0x30 80025a8: af02 add r7, sp, #8 80025aa: 60f8 str r0, [r7, #12] 80025ac: 4608 mov r0, r1 80025ae: 4611 mov r1, r2 80025b0: 461a mov r2, r3 80025b2: 4603 mov r3, r0 80025b4: 817b strh r3, [r7, #10] 80025b6: 460b mov r3, r1 80025b8: 813b strh r3, [r7, #8] 80025ba: 4613 mov r3, r2 80025bc: 80fb strh r3, [r7, #6] __IO uint32_t count = 0U; 80025be: 2300 movs r3, #0 80025c0: 623b str r3, [r7, #32] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); 80025c2: f7ff fab1 bl 8001b28 80025c6: 6278 str r0, [r7, #36] ; 0x24 /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 80025c8: 68fb ldr r3, [r7, #12] 80025ca: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 80025ce: b2db uxtb r3, r3 80025d0: 2b20 cmp r3, #32 80025d2: f040 8244 bne.w 8002a5e { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) 80025d6: 6a7b ldr r3, [r7, #36] ; 0x24 80025d8: 9300 str r3, [sp, #0] 80025da: 2319 movs r3, #25 80025dc: 2201 movs r2, #1 80025de: 4982 ldr r1, [pc, #520] ; (80027e8 ) 80025e0: 68f8 ldr r0, [r7, #12] 80025e2: f000 fbc5 bl 8002d70 80025e6: 4603 mov r3, r0 80025e8: 2b00 cmp r3, #0 80025ea: d001 beq.n 80025f0 { return HAL_BUSY; 80025ec: 2302 movs r3, #2 80025ee: e237 b.n 8002a60 } /* Process Locked */ __HAL_LOCK(hi2c); 80025f0: 68fb ldr r3, [r7, #12] 80025f2: f893 303c ldrb.w r3, [r3, #60] ; 0x3c 80025f6: 2b01 cmp r3, #1 80025f8: d101 bne.n 80025fe 80025fa: 2302 movs r3, #2 80025fc: e230 b.n 8002a60 80025fe: 68fb ldr r3, [r7, #12] 8002600: 2201 movs r2, #1 8002602: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) 8002606: 68fb ldr r3, [r7, #12] 8002608: 681b ldr r3, [r3, #0] 800260a: 681b ldr r3, [r3, #0] 800260c: f003 0301 and.w r3, r3, #1 8002610: 2b01 cmp r3, #1 8002612: d007 beq.n 8002624 { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 8002614: 68fb ldr r3, [r7, #12] 8002616: 681b ldr r3, [r3, #0] 8002618: 681a ldr r2, [r3, #0] 800261a: 68fb ldr r3, [r7, #12] 800261c: 681b ldr r3, [r3, #0] 800261e: f042 0201 orr.w r2, r2, #1 8002622: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); 8002624: 68fb ldr r3, [r7, #12] 8002626: 681b ldr r3, [r3, #0] 8002628: 681a ldr r2, [r3, #0] 800262a: 68fb ldr r3, [r7, #12] 800262c: 681b ldr r3, [r3, #0] 800262e: f422 6200 bic.w r2, r2, #2048 ; 0x800 8002632: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_RX; 8002634: 68fb ldr r3, [r7, #12] 8002636: 2222 movs r2, #34 ; 0x22 8002638: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_MEM; 800263c: 68fb ldr r3, [r7, #12] 800263e: 2240 movs r2, #64 ; 0x40 8002640: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8002644: 68fb ldr r3, [r7, #12] 8002646: 2200 movs r2, #0 8002648: 641a str r2, [r3, #64] ; 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; 800264a: 68fb ldr r3, [r7, #12] 800264c: 6b3a ldr r2, [r7, #48] ; 0x30 800264e: 625a str r2, [r3, #36] ; 0x24 hi2c->XferCount = Size; 8002650: 68fb ldr r3, [r7, #12] 8002652: 8eba ldrh r2, [r7, #52] ; 0x34 8002654: 855a strh r2, [r3, #42] ; 0x2a hi2c->XferSize = hi2c->XferCount; 8002656: 68fb ldr r3, [r7, #12] 8002658: 8d5b ldrh r3, [r3, #42] ; 0x2a 800265a: b29a uxth r2, r3 800265c: 68fb ldr r3, [r7, #12] 800265e: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8002660: 68fb ldr r3, [r7, #12] 8002662: 4a62 ldr r2, [pc, #392] ; (80027ec ) 8002664: 62da str r2, [r3, #44] ; 0x2c /* Send Slave Address and Memory Address */ if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8002666: 88f8 ldrh r0, [r7, #6] 8002668: 893a ldrh r2, [r7, #8] 800266a: 8979 ldrh r1, [r7, #10] 800266c: 6a7b ldr r3, [r7, #36] ; 0x24 800266e: 9301 str r3, [sp, #4] 8002670: 6bbb ldr r3, [r7, #56] ; 0x38 8002672: 9300 str r3, [sp, #0] 8002674: 4603 mov r3, r0 8002676: 68f8 ldr r0, [r7, #12] 8002678: f000 fa92 bl 8002ba0 800267c: 4603 mov r3, r0 800267e: 2b00 cmp r3, #0 8002680: d001 beq.n 8002686 { return HAL_ERROR; 8002682: 2301 movs r3, #1 8002684: e1ec b.n 8002a60 } if (hi2c->XferSize == 0U) 8002686: 68fb ldr r3, [r7, #12] 8002688: 8d1b ldrh r3, [r3, #40] ; 0x28 800268a: 2b00 cmp r3, #0 800268c: d113 bne.n 80026b6 { /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 800268e: 2300 movs r3, #0 8002690: 61fb str r3, [r7, #28] 8002692: 68fb ldr r3, [r7, #12] 8002694: 681b ldr r3, [r3, #0] 8002696: 695b ldr r3, [r3, #20] 8002698: 61fb str r3, [r7, #28] 800269a: 68fb ldr r3, [r7, #12] 800269c: 681b ldr r3, [r3, #0] 800269e: 699b ldr r3, [r3, #24] 80026a0: 61fb str r3, [r7, #28] 80026a2: 69fb ldr r3, [r7, #28] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 80026a4: 68fb ldr r3, [r7, #12] 80026a6: 681b ldr r3, [r3, #0] 80026a8: 681a ldr r2, [r3, #0] 80026aa: 68fb ldr r3, [r7, #12] 80026ac: 681b ldr r3, [r3, #0] 80026ae: f442 7200 orr.w r2, r2, #512 ; 0x200 80026b2: 601a str r2, [r3, #0] 80026b4: e1c0 b.n 8002a38 } else if (hi2c->XferSize == 1U) 80026b6: 68fb ldr r3, [r7, #12] 80026b8: 8d1b ldrh r3, [r3, #40] ; 0x28 80026ba: 2b01 cmp r3, #1 80026bc: d11e bne.n 80026fc { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 80026be: 68fb ldr r3, [r7, #12] 80026c0: 681b ldr r3, [r3, #0] 80026c2: 681a ldr r2, [r3, #0] 80026c4: 68fb ldr r3, [r7, #12] 80026c6: 681b ldr r3, [r3, #0] 80026c8: f422 6280 bic.w r2, r2, #1024 ; 0x400 80026cc: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); 80026ce: b672 cpsid i } 80026d0: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80026d2: 2300 movs r3, #0 80026d4: 61bb str r3, [r7, #24] 80026d6: 68fb ldr r3, [r7, #12] 80026d8: 681b ldr r3, [r3, #0] 80026da: 695b ldr r3, [r3, #20] 80026dc: 61bb str r3, [r7, #24] 80026de: 68fb ldr r3, [r7, #12] 80026e0: 681b ldr r3, [r3, #0] 80026e2: 699b ldr r3, [r3, #24] 80026e4: 61bb str r3, [r7, #24] 80026e6: 69bb ldr r3, [r7, #24] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 80026e8: 68fb ldr r3, [r7, #12] 80026ea: 681b ldr r3, [r3, #0] 80026ec: 681a ldr r2, [r3, #0] 80026ee: 68fb ldr r3, [r7, #12] 80026f0: 681b ldr r3, [r3, #0] 80026f2: f442 7200 orr.w r2, r2, #512 ; 0x200 80026f6: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); 80026f8: b662 cpsie i } 80026fa: e035 b.n 8002768 /* Re-enable IRQs */ __enable_irq(); } else if (hi2c->XferSize == 2U) 80026fc: 68fb ldr r3, [r7, #12] 80026fe: 8d1b ldrh r3, [r3, #40] ; 0x28 8002700: 2b02 cmp r3, #2 8002702: d11e bne.n 8002742 { /* Enable Pos */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); 8002704: 68fb ldr r3, [r7, #12] 8002706: 681b ldr r3, [r3, #0] 8002708: 681a ldr r2, [r3, #0] 800270a: 68fb ldr r3, [r7, #12] 800270c: 681b ldr r3, [r3, #0] 800270e: f442 6200 orr.w r2, r2, #2048 ; 0x800 8002712: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); 8002714: b672 cpsid i } 8002716: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8002718: 2300 movs r3, #0 800271a: 617b str r3, [r7, #20] 800271c: 68fb ldr r3, [r7, #12] 800271e: 681b ldr r3, [r3, #0] 8002720: 695b ldr r3, [r3, #20] 8002722: 617b str r3, [r7, #20] 8002724: 68fb ldr r3, [r7, #12] 8002726: 681b ldr r3, [r3, #0] 8002728: 699b ldr r3, [r3, #24] 800272a: 617b str r3, [r7, #20] 800272c: 697b ldr r3, [r7, #20] /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 800272e: 68fb ldr r3, [r7, #12] 8002730: 681b ldr r3, [r3, #0] 8002732: 681a ldr r2, [r3, #0] 8002734: 68fb ldr r3, [r7, #12] 8002736: 681b ldr r3, [r3, #0] 8002738: f422 6280 bic.w r2, r2, #1024 ; 0x400 800273c: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); 800273e: b662 cpsie i } 8002740: e012 b.n 8002768 __enable_irq(); } else { /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8002742: 68fb ldr r3, [r7, #12] 8002744: 681b ldr r3, [r3, #0] 8002746: 681a ldr r2, [r3, #0] 8002748: 68fb ldr r3, [r7, #12] 800274a: 681b ldr r3, [r3, #0] 800274c: f442 6280 orr.w r2, r2, #1024 ; 0x400 8002750: 601a str r2, [r3, #0] /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8002752: 2300 movs r3, #0 8002754: 613b str r3, [r7, #16] 8002756: 68fb ldr r3, [r7, #12] 8002758: 681b ldr r3, [r3, #0] 800275a: 695b ldr r3, [r3, #20] 800275c: 613b str r3, [r7, #16] 800275e: 68fb ldr r3, [r7, #12] 8002760: 681b ldr r3, [r3, #0] 8002762: 699b ldr r3, [r3, #24] 8002764: 613b str r3, [r7, #16] 8002766: 693b ldr r3, [r7, #16] } while (hi2c->XferSize > 0U) 8002768: e166 b.n 8002a38 { if (hi2c->XferSize <= 3U) 800276a: 68fb ldr r3, [r7, #12] 800276c: 8d1b ldrh r3, [r3, #40] ; 0x28 800276e: 2b03 cmp r3, #3 8002770: f200 811f bhi.w 80029b2 { /* One byte */ if (hi2c->XferSize == 1U) 8002774: 68fb ldr r3, [r7, #12] 8002776: 8d1b ldrh r3, [r3, #40] ; 0x28 8002778: 2b01 cmp r3, #1 800277a: d123 bne.n 80027c4 { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 800277c: 6a7a ldr r2, [r7, #36] ; 0x24 800277e: 6bb9 ldr r1, [r7, #56] ; 0x38 8002780: 68f8 ldr r0, [r7, #12] 8002782: f000 fc4d bl 8003020 8002786: 4603 mov r3, r0 8002788: 2b00 cmp r3, #0 800278a: d001 beq.n 8002790 { return HAL_ERROR; 800278c: 2301 movs r3, #1 800278e: e167 b.n 8002a60 } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002790: 68fb ldr r3, [r7, #12] 8002792: 681b ldr r3, [r3, #0] 8002794: 691a ldr r2, [r3, #16] 8002796: 68fb ldr r3, [r7, #12] 8002798: 6a5b ldr r3, [r3, #36] ; 0x24 800279a: b2d2 uxtb r2, r2 800279c: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 800279e: 68fb ldr r3, [r7, #12] 80027a0: 6a5b ldr r3, [r3, #36] ; 0x24 80027a2: 1c5a adds r2, r3, #1 80027a4: 68fb ldr r3, [r7, #12] 80027a6: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 80027a8: 68fb ldr r3, [r7, #12] 80027aa: 8d1b ldrh r3, [r3, #40] ; 0x28 80027ac: 3b01 subs r3, #1 80027ae: b29a uxth r2, r3 80027b0: 68fb ldr r3, [r7, #12] 80027b2: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 80027b4: 68fb ldr r3, [r7, #12] 80027b6: 8d5b ldrh r3, [r3, #42] ; 0x2a 80027b8: b29b uxth r3, r3 80027ba: 3b01 subs r3, #1 80027bc: b29a uxth r2, r3 80027be: 68fb ldr r3, [r7, #12] 80027c0: 855a strh r2, [r3, #42] ; 0x2a 80027c2: e139 b.n 8002a38 } /* Two bytes */ else if (hi2c->XferSize == 2U) 80027c4: 68fb ldr r3, [r7, #12] 80027c6: 8d1b ldrh r3, [r3, #40] ; 0x28 80027c8: 2b02 cmp r3, #2 80027ca: d152 bne.n 8002872 { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 80027cc: 6a7b ldr r3, [r7, #36] ; 0x24 80027ce: 9300 str r3, [sp, #0] 80027d0: 6bbb ldr r3, [r7, #56] ; 0x38 80027d2: 2200 movs r2, #0 80027d4: 4906 ldr r1, [pc, #24] ; (80027f0 ) 80027d6: 68f8 ldr r0, [r7, #12] 80027d8: f000 faca bl 8002d70 80027dc: 4603 mov r3, r0 80027de: 2b00 cmp r3, #0 80027e0: d008 beq.n 80027f4 { return HAL_ERROR; 80027e2: 2301 movs r3, #1 80027e4: e13c b.n 8002a60 80027e6: bf00 nop 80027e8: 00100002 .word 0x00100002 80027ec: ffff0000 .word 0xffff0000 80027f0: 00010004 .word 0x00010004 __ASM volatile ("cpsid i" : : : "memory"); 80027f4: b672 cpsid i } 80027f6: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 80027f8: 68fb ldr r3, [r7, #12] 80027fa: 681b ldr r3, [r3, #0] 80027fc: 681a ldr r2, [r3, #0] 80027fe: 68fb ldr r3, [r7, #12] 8002800: 681b ldr r3, [r3, #0] 8002802: f442 7200 orr.w r2, r2, #512 ; 0x200 8002806: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002808: 68fb ldr r3, [r7, #12] 800280a: 681b ldr r3, [r3, #0] 800280c: 691a ldr r2, [r3, #16] 800280e: 68fb ldr r3, [r7, #12] 8002810: 6a5b ldr r3, [r3, #36] ; 0x24 8002812: b2d2 uxtb r2, r2 8002814: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002816: 68fb ldr r3, [r7, #12] 8002818: 6a5b ldr r3, [r3, #36] ; 0x24 800281a: 1c5a adds r2, r3, #1 800281c: 68fb ldr r3, [r7, #12] 800281e: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002820: 68fb ldr r3, [r7, #12] 8002822: 8d1b ldrh r3, [r3, #40] ; 0x28 8002824: 3b01 subs r3, #1 8002826: b29a uxth r2, r3 8002828: 68fb ldr r3, [r7, #12] 800282a: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 800282c: 68fb ldr r3, [r7, #12] 800282e: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002830: b29b uxth r3, r3 8002832: 3b01 subs r3, #1 8002834: b29a uxth r2, r3 8002836: 68fb ldr r3, [r7, #12] 8002838: 855a strh r2, [r3, #42] ; 0x2a __ASM volatile ("cpsie i" : : : "memory"); 800283a: b662 cpsie i } 800283c: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 800283e: 68fb ldr r3, [r7, #12] 8002840: 681b ldr r3, [r3, #0] 8002842: 691a ldr r2, [r3, #16] 8002844: 68fb ldr r3, [r7, #12] 8002846: 6a5b ldr r3, [r3, #36] ; 0x24 8002848: b2d2 uxtb r2, r2 800284a: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 800284c: 68fb ldr r3, [r7, #12] 800284e: 6a5b ldr r3, [r3, #36] ; 0x24 8002850: 1c5a adds r2, r3, #1 8002852: 68fb ldr r3, [r7, #12] 8002854: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002856: 68fb ldr r3, [r7, #12] 8002858: 8d1b ldrh r3, [r3, #40] ; 0x28 800285a: 3b01 subs r3, #1 800285c: b29a uxth r2, r3 800285e: 68fb ldr r3, [r7, #12] 8002860: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002862: 68fb ldr r3, [r7, #12] 8002864: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002866: b29b uxth r3, r3 8002868: 3b01 subs r3, #1 800286a: b29a uxth r2, r3 800286c: 68fb ldr r3, [r7, #12] 800286e: 855a strh r2, [r3, #42] ; 0x2a 8002870: e0e2 b.n 8002a38 } /* 3 Last bytes */ else { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) 8002872: 6a7b ldr r3, [r7, #36] ; 0x24 8002874: 9300 str r3, [sp, #0] 8002876: 6bbb ldr r3, [r7, #56] ; 0x38 8002878: 2200 movs r2, #0 800287a: 497b ldr r1, [pc, #492] ; (8002a68 ) 800287c: 68f8 ldr r0, [r7, #12] 800287e: f000 fa77 bl 8002d70 8002882: 4603 mov r3, r0 8002884: 2b00 cmp r3, #0 8002886: d001 beq.n 800288c { return HAL_ERROR; 8002888: 2301 movs r3, #1 800288a: e0e9 b.n 8002a60 } /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 800288c: 68fb ldr r3, [r7, #12] 800288e: 681b ldr r3, [r3, #0] 8002890: 681a ldr r2, [r3, #0] 8002892: 68fb ldr r3, [r7, #12] 8002894: 681b ldr r3, [r3, #0] 8002896: f422 6280 bic.w r2, r2, #1024 ; 0x400 800289a: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); 800289c: b672 cpsid i } 800289e: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 80028a0: 68fb ldr r3, [r7, #12] 80028a2: 681b ldr r3, [r3, #0] 80028a4: 691a ldr r2, [r3, #16] 80028a6: 68fb ldr r3, [r7, #12] 80028a8: 6a5b ldr r3, [r3, #36] ; 0x24 80028aa: b2d2 uxtb r2, r2 80028ac: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 80028ae: 68fb ldr r3, [r7, #12] 80028b0: 6a5b ldr r3, [r3, #36] ; 0x24 80028b2: 1c5a adds r2, r3, #1 80028b4: 68fb ldr r3, [r7, #12] 80028b6: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 80028b8: 68fb ldr r3, [r7, #12] 80028ba: 8d1b ldrh r3, [r3, #40] ; 0x28 80028bc: 3b01 subs r3, #1 80028be: b29a uxth r2, r3 80028c0: 68fb ldr r3, [r7, #12] 80028c2: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 80028c4: 68fb ldr r3, [r7, #12] 80028c6: 8d5b ldrh r3, [r3, #42] ; 0x2a 80028c8: b29b uxth r3, r3 80028ca: 3b01 subs r3, #1 80028cc: b29a uxth r2, r3 80028ce: 68fb ldr r3, [r7, #12] 80028d0: 855a strh r2, [r3, #42] ; 0x2a /* Wait until BTF flag is set */ count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U); 80028d2: 4b66 ldr r3, [pc, #408] ; (8002a6c ) 80028d4: 681b ldr r3, [r3, #0] 80028d6: 08db lsrs r3, r3, #3 80028d8: 4a65 ldr r2, [pc, #404] ; (8002a70 ) 80028da: fba2 2303 umull r2, r3, r2, r3 80028de: 0a1a lsrs r2, r3, #8 80028e0: 4613 mov r3, r2 80028e2: 009b lsls r3, r3, #2 80028e4: 4413 add r3, r2 80028e6: 00da lsls r2, r3, #3 80028e8: 1ad3 subs r3, r2, r3 80028ea: 623b str r3, [r7, #32] do { count--; 80028ec: 6a3b ldr r3, [r7, #32] 80028ee: 3b01 subs r3, #1 80028f0: 623b str r3, [r7, #32] if (count == 0U) 80028f2: 6a3b ldr r3, [r7, #32] 80028f4: 2b00 cmp r3, #0 80028f6: d118 bne.n 800292a { hi2c->PreviousState = I2C_STATE_NONE; 80028f8: 68fb ldr r3, [r7, #12] 80028fa: 2200 movs r2, #0 80028fc: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 80028fe: 68fb ldr r3, [r7, #12] 8002900: 2220 movs r2, #32 8002902: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002906: 68fb ldr r3, [r7, #12] 8002908: 2200 movs r2, #0 800290a: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 800290e: 68fb ldr r3, [r7, #12] 8002910: 6c1b ldr r3, [r3, #64] ; 0x40 8002912: f043 0220 orr.w r2, r3, #32 8002916: 68fb ldr r3, [r7, #12] 8002918: 641a str r2, [r3, #64] ; 0x40 __ASM volatile ("cpsie i" : : : "memory"); 800291a: b662 cpsie i } 800291c: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Process Unlocked */ __HAL_UNLOCK(hi2c); 800291e: 68fb ldr r3, [r7, #12] 8002920: 2200 movs r2, #0 8002922: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8002926: 2301 movs r3, #1 8002928: e09a b.n 8002a60 } } while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET); 800292a: 68fb ldr r3, [r7, #12] 800292c: 681b ldr r3, [r3, #0] 800292e: 695b ldr r3, [r3, #20] 8002930: f003 0304 and.w r3, r3, #4 8002934: 2b04 cmp r3, #4 8002936: d1d9 bne.n 80028ec /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002938: 68fb ldr r3, [r7, #12] 800293a: 681b ldr r3, [r3, #0] 800293c: 681a ldr r2, [r3, #0] 800293e: 68fb ldr r3, [r7, #12] 8002940: 681b ldr r3, [r3, #0] 8002942: f442 7200 orr.w r2, r2, #512 ; 0x200 8002946: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002948: 68fb ldr r3, [r7, #12] 800294a: 681b ldr r3, [r3, #0] 800294c: 691a ldr r2, [r3, #16] 800294e: 68fb ldr r3, [r7, #12] 8002950: 6a5b ldr r3, [r3, #36] ; 0x24 8002952: b2d2 uxtb r2, r2 8002954: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002956: 68fb ldr r3, [r7, #12] 8002958: 6a5b ldr r3, [r3, #36] ; 0x24 800295a: 1c5a adds r2, r3, #1 800295c: 68fb ldr r3, [r7, #12] 800295e: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002960: 68fb ldr r3, [r7, #12] 8002962: 8d1b ldrh r3, [r3, #40] ; 0x28 8002964: 3b01 subs r3, #1 8002966: b29a uxth r2, r3 8002968: 68fb ldr r3, [r7, #12] 800296a: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 800296c: 68fb ldr r3, [r7, #12] 800296e: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002970: b29b uxth r3, r3 8002972: 3b01 subs r3, #1 8002974: b29a uxth r2, r3 8002976: 68fb ldr r3, [r7, #12] 8002978: 855a strh r2, [r3, #42] ; 0x2a __ASM volatile ("cpsie i" : : : "memory"); 800297a: b662 cpsie i } 800297c: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 800297e: 68fb ldr r3, [r7, #12] 8002980: 681b ldr r3, [r3, #0] 8002982: 691a ldr r2, [r3, #16] 8002984: 68fb ldr r3, [r7, #12] 8002986: 6a5b ldr r3, [r3, #36] ; 0x24 8002988: b2d2 uxtb r2, r2 800298a: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 800298c: 68fb ldr r3, [r7, #12] 800298e: 6a5b ldr r3, [r3, #36] ; 0x24 8002990: 1c5a adds r2, r3, #1 8002992: 68fb ldr r3, [r7, #12] 8002994: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002996: 68fb ldr r3, [r7, #12] 8002998: 8d1b ldrh r3, [r3, #40] ; 0x28 800299a: 3b01 subs r3, #1 800299c: b29a uxth r2, r3 800299e: 68fb ldr r3, [r7, #12] 80029a0: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 80029a2: 68fb ldr r3, [r7, #12] 80029a4: 8d5b ldrh r3, [r3, #42] ; 0x2a 80029a6: b29b uxth r3, r3 80029a8: 3b01 subs r3, #1 80029aa: b29a uxth r2, r3 80029ac: 68fb ldr r3, [r7, #12] 80029ae: 855a strh r2, [r3, #42] ; 0x2a 80029b0: e042 b.n 8002a38 } } else { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 80029b2: 6a7a ldr r2, [r7, #36] ; 0x24 80029b4: 6bb9 ldr r1, [r7, #56] ; 0x38 80029b6: 68f8 ldr r0, [r7, #12] 80029b8: f000 fb32 bl 8003020 80029bc: 4603 mov r3, r0 80029be: 2b00 cmp r3, #0 80029c0: d001 beq.n 80029c6 { return HAL_ERROR; 80029c2: 2301 movs r3, #1 80029c4: e04c b.n 8002a60 } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 80029c6: 68fb ldr r3, [r7, #12] 80029c8: 681b ldr r3, [r3, #0] 80029ca: 691a ldr r2, [r3, #16] 80029cc: 68fb ldr r3, [r7, #12] 80029ce: 6a5b ldr r3, [r3, #36] ; 0x24 80029d0: b2d2 uxtb r2, r2 80029d2: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 80029d4: 68fb ldr r3, [r7, #12] 80029d6: 6a5b ldr r3, [r3, #36] ; 0x24 80029d8: 1c5a adds r2, r3, #1 80029da: 68fb ldr r3, [r7, #12] 80029dc: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 80029de: 68fb ldr r3, [r7, #12] 80029e0: 8d1b ldrh r3, [r3, #40] ; 0x28 80029e2: 3b01 subs r3, #1 80029e4: b29a uxth r2, r3 80029e6: 68fb ldr r3, [r7, #12] 80029e8: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 80029ea: 68fb ldr r3, [r7, #12] 80029ec: 8d5b ldrh r3, [r3, #42] ; 0x2a 80029ee: b29b uxth r3, r3 80029f0: 3b01 subs r3, #1 80029f2: b29a uxth r2, r3 80029f4: 68fb ldr r3, [r7, #12] 80029f6: 855a strh r2, [r3, #42] ; 0x2a if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 80029f8: 68fb ldr r3, [r7, #12] 80029fa: 681b ldr r3, [r3, #0] 80029fc: 695b ldr r3, [r3, #20] 80029fe: f003 0304 and.w r3, r3, #4 8002a02: 2b04 cmp r3, #4 8002a04: d118 bne.n 8002a38 { /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8002a06: 68fb ldr r3, [r7, #12] 8002a08: 681b ldr r3, [r3, #0] 8002a0a: 691a ldr r2, [r3, #16] 8002a0c: 68fb ldr r3, [r7, #12] 8002a0e: 6a5b ldr r3, [r3, #36] ; 0x24 8002a10: b2d2 uxtb r2, r2 8002a12: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002a14: 68fb ldr r3, [r7, #12] 8002a16: 6a5b ldr r3, [r3, #36] ; 0x24 8002a18: 1c5a adds r2, r3, #1 8002a1a: 68fb ldr r3, [r7, #12] 8002a1c: 625a str r2, [r3, #36] ; 0x24 /* Update counter */ hi2c->XferSize--; 8002a1e: 68fb ldr r3, [r7, #12] 8002a20: 8d1b ldrh r3, [r3, #40] ; 0x28 8002a22: 3b01 subs r3, #1 8002a24: b29a uxth r2, r3 8002a26: 68fb ldr r3, [r7, #12] 8002a28: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; 8002a2a: 68fb ldr r3, [r7, #12] 8002a2c: 8d5b ldrh r3, [r3, #42] ; 0x2a 8002a2e: b29b uxth r3, r3 8002a30: 3b01 subs r3, #1 8002a32: b29a uxth r2, r3 8002a34: 68fb ldr r3, [r7, #12] 8002a36: 855a strh r2, [r3, #42] ; 0x2a while (hi2c->XferSize > 0U) 8002a38: 68fb ldr r3, [r7, #12] 8002a3a: 8d1b ldrh r3, [r3, #40] ; 0x28 8002a3c: 2b00 cmp r3, #0 8002a3e: f47f ae94 bne.w 800276a } } } hi2c->State = HAL_I2C_STATE_READY; 8002a42: 68fb ldr r3, [r7, #12] 8002a44: 2220 movs r2, #32 8002a46: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002a4a: 68fb ldr r3, [r7, #12] 8002a4c: 2200 movs r2, #0 8002a4e: f883 203e strb.w r2, [r3, #62] ; 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002a52: 68fb ldr r3, [r7, #12] 8002a54: 2200 movs r2, #0 8002a56: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; 8002a5a: 2300 movs r3, #0 8002a5c: e000 b.n 8002a60 } else { return HAL_BUSY; 8002a5e: 2302 movs r3, #2 } } 8002a60: 4618 mov r0, r3 8002a62: 3728 adds r7, #40 ; 0x28 8002a64: 46bd mov sp, r7 8002a66: bd80 pop {r7, pc} 8002a68: 00010004 .word 0x00010004 8002a6c: 20000000 .word 0x20000000 8002a70: 14f8b589 .word 0x14f8b589 08002a74 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) { 8002a74: b580 push {r7, lr} 8002a76: b088 sub sp, #32 8002a78: af02 add r7, sp, #8 8002a7a: 60f8 str r0, [r7, #12] 8002a7c: 4608 mov r0, r1 8002a7e: 4611 mov r1, r2 8002a80: 461a mov r2, r3 8002a82: 4603 mov r3, r0 8002a84: 817b strh r3, [r7, #10] 8002a86: 460b mov r3, r1 8002a88: 813b strh r3, [r7, #8] 8002a8a: 4613 mov r3, r2 8002a8c: 80fb strh r3, [r7, #6] /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); 8002a8e: 68fb ldr r3, [r7, #12] 8002a90: 681b ldr r3, [r3, #0] 8002a92: 681a ldr r2, [r3, #0] 8002a94: 68fb ldr r3, [r7, #12] 8002a96: 681b ldr r3, [r3, #0] 8002a98: f442 7280 orr.w r2, r2, #256 ; 0x100 8002a9c: 601a str r2, [r3, #0] /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8002a9e: 6a7b ldr r3, [r7, #36] ; 0x24 8002aa0: 9300 str r3, [sp, #0] 8002aa2: 6a3b ldr r3, [r7, #32] 8002aa4: 2200 movs r2, #0 8002aa6: f04f 1101 mov.w r1, #65537 ; 0x10001 8002aaa: 68f8 ldr r0, [r7, #12] 8002aac: f000 f960 bl 8002d70 8002ab0: 4603 mov r3, r0 8002ab2: 2b00 cmp r3, #0 8002ab4: d00d beq.n 8002ad2 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) 8002ab6: 68fb ldr r3, [r7, #12] 8002ab8: 681b ldr r3, [r3, #0] 8002aba: 681b ldr r3, [r3, #0] 8002abc: f403 7380 and.w r3, r3, #256 ; 0x100 8002ac0: f5b3 7f80 cmp.w r3, #256 ; 0x100 8002ac4: d103 bne.n 8002ace { hi2c->ErrorCode = HAL_I2C_WRONG_START; 8002ac6: 68fb ldr r3, [r7, #12] 8002ac8: f44f 7200 mov.w r2, #512 ; 0x200 8002acc: 641a str r2, [r3, #64] ; 0x40 } return HAL_TIMEOUT; 8002ace: 2303 movs r3, #3 8002ad0: e05f b.n 8002b92 } /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 8002ad2: 897b ldrh r3, [r7, #10] 8002ad4: b2db uxtb r3, r3 8002ad6: 461a mov r2, r3 8002ad8: 68fb ldr r3, [r7, #12] 8002ada: 681b ldr r3, [r3, #0] 8002adc: f002 02fe and.w r2, r2, #254 ; 0xfe 8002ae0: 611a str r2, [r3, #16] /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8002ae2: 6a7b ldr r3, [r7, #36] ; 0x24 8002ae4: 6a3a ldr r2, [r7, #32] 8002ae6: 492d ldr r1, [pc, #180] ; (8002b9c ) 8002ae8: 68f8 ldr r0, [r7, #12] 8002aea: f000 f998 bl 8002e1e 8002aee: 4603 mov r3, r0 8002af0: 2b00 cmp r3, #0 8002af2: d001 beq.n 8002af8 { return HAL_ERROR; 8002af4: 2301 movs r3, #1 8002af6: e04c b.n 8002b92 } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8002af8: 2300 movs r3, #0 8002afa: 617b str r3, [r7, #20] 8002afc: 68fb ldr r3, [r7, #12] 8002afe: 681b ldr r3, [r3, #0] 8002b00: 695b ldr r3, [r3, #20] 8002b02: 617b str r3, [r7, #20] 8002b04: 68fb ldr r3, [r7, #12] 8002b06: 681b ldr r3, [r3, #0] 8002b08: 699b ldr r3, [r3, #24] 8002b0a: 617b str r3, [r7, #20] 8002b0c: 697b ldr r3, [r7, #20] /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002b0e: 6a7a ldr r2, [r7, #36] ; 0x24 8002b10: 6a39 ldr r1, [r7, #32] 8002b12: 68f8 ldr r0, [r7, #12] 8002b14: f000 fa02 bl 8002f1c 8002b18: 4603 mov r3, r0 8002b1a: 2b00 cmp r3, #0 8002b1c: d00d beq.n 8002b3a { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002b1e: 68fb ldr r3, [r7, #12] 8002b20: 6c1b ldr r3, [r3, #64] ; 0x40 8002b22: 2b04 cmp r3, #4 8002b24: d107 bne.n 8002b36 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002b26: 68fb ldr r3, [r7, #12] 8002b28: 681b ldr r3, [r3, #0] 8002b2a: 681a ldr r2, [r3, #0] 8002b2c: 68fb ldr r3, [r7, #12] 8002b2e: 681b ldr r3, [r3, #0] 8002b30: f442 7200 orr.w r2, r2, #512 ; 0x200 8002b34: 601a str r2, [r3, #0] } return HAL_ERROR; 8002b36: 2301 movs r3, #1 8002b38: e02b b.n 8002b92 } /* If Memory address size is 8Bit */ if (MemAddSize == I2C_MEMADD_SIZE_8BIT) 8002b3a: 88fb ldrh r3, [r7, #6] 8002b3c: 2b01 cmp r3, #1 8002b3e: d105 bne.n 8002b4c { /* Send Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8002b40: 893b ldrh r3, [r7, #8] 8002b42: b2da uxtb r2, r3 8002b44: 68fb ldr r3, [r7, #12] 8002b46: 681b ldr r3, [r3, #0] 8002b48: 611a str r2, [r3, #16] 8002b4a: e021 b.n 8002b90 } /* If Memory address size is 16Bit */ else { /* Send MSB of Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 8002b4c: 893b ldrh r3, [r7, #8] 8002b4e: 0a1b lsrs r3, r3, #8 8002b50: b29b uxth r3, r3 8002b52: b2da uxtb r2, r3 8002b54: 68fb ldr r3, [r7, #12] 8002b56: 681b ldr r3, [r3, #0] 8002b58: 611a str r2, [r3, #16] /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002b5a: 6a7a ldr r2, [r7, #36] ; 0x24 8002b5c: 6a39 ldr r1, [r7, #32] 8002b5e: 68f8 ldr r0, [r7, #12] 8002b60: f000 f9dc bl 8002f1c 8002b64: 4603 mov r3, r0 8002b66: 2b00 cmp r3, #0 8002b68: d00d beq.n 8002b86 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002b6a: 68fb ldr r3, [r7, #12] 8002b6c: 6c1b ldr r3, [r3, #64] ; 0x40 8002b6e: 2b04 cmp r3, #4 8002b70: d107 bne.n 8002b82 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002b72: 68fb ldr r3, [r7, #12] 8002b74: 681b ldr r3, [r3, #0] 8002b76: 681a ldr r2, [r3, #0] 8002b78: 68fb ldr r3, [r7, #12] 8002b7a: 681b ldr r3, [r3, #0] 8002b7c: f442 7200 orr.w r2, r2, #512 ; 0x200 8002b80: 601a str r2, [r3, #0] } return HAL_ERROR; 8002b82: 2301 movs r3, #1 8002b84: e005 b.n 8002b92 } /* Send LSB of Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8002b86: 893b ldrh r3, [r7, #8] 8002b88: b2da uxtb r2, r3 8002b8a: 68fb ldr r3, [r7, #12] 8002b8c: 681b ldr r3, [r3, #0] 8002b8e: 611a str r2, [r3, #16] } return HAL_OK; 8002b90: 2300 movs r3, #0 } 8002b92: 4618 mov r0, r3 8002b94: 3718 adds r7, #24 8002b96: 46bd mov sp, r7 8002b98: bd80 pop {r7, pc} 8002b9a: bf00 nop 8002b9c: 00010002 .word 0x00010002 08002ba0 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) { 8002ba0: b580 push {r7, lr} 8002ba2: b088 sub sp, #32 8002ba4: af02 add r7, sp, #8 8002ba6: 60f8 str r0, [r7, #12] 8002ba8: 4608 mov r0, r1 8002baa: 4611 mov r1, r2 8002bac: 461a mov r2, r3 8002bae: 4603 mov r3, r0 8002bb0: 817b strh r3, [r7, #10] 8002bb2: 460b mov r3, r1 8002bb4: 813b strh r3, [r7, #8] 8002bb6: 4613 mov r3, r2 8002bb8: 80fb strh r3, [r7, #6] /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8002bba: 68fb ldr r3, [r7, #12] 8002bbc: 681b ldr r3, [r3, #0] 8002bbe: 681a ldr r2, [r3, #0] 8002bc0: 68fb ldr r3, [r7, #12] 8002bc2: 681b ldr r3, [r3, #0] 8002bc4: f442 6280 orr.w r2, r2, #1024 ; 0x400 8002bc8: 601a str r2, [r3, #0] /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); 8002bca: 68fb ldr r3, [r7, #12] 8002bcc: 681b ldr r3, [r3, #0] 8002bce: 681a ldr r2, [r3, #0] 8002bd0: 68fb ldr r3, [r7, #12] 8002bd2: 681b ldr r3, [r3, #0] 8002bd4: f442 7280 orr.w r2, r2, #256 ; 0x100 8002bd8: 601a str r2, [r3, #0] /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8002bda: 6a7b ldr r3, [r7, #36] ; 0x24 8002bdc: 9300 str r3, [sp, #0] 8002bde: 6a3b ldr r3, [r7, #32] 8002be0: 2200 movs r2, #0 8002be2: f04f 1101 mov.w r1, #65537 ; 0x10001 8002be6: 68f8 ldr r0, [r7, #12] 8002be8: f000 f8c2 bl 8002d70 8002bec: 4603 mov r3, r0 8002bee: 2b00 cmp r3, #0 8002bf0: d00d beq.n 8002c0e { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) 8002bf2: 68fb ldr r3, [r7, #12] 8002bf4: 681b ldr r3, [r3, #0] 8002bf6: 681b ldr r3, [r3, #0] 8002bf8: f403 7380 and.w r3, r3, #256 ; 0x100 8002bfc: f5b3 7f80 cmp.w r3, #256 ; 0x100 8002c00: d103 bne.n 8002c0a { hi2c->ErrorCode = HAL_I2C_WRONG_START; 8002c02: 68fb ldr r3, [r7, #12] 8002c04: f44f 7200 mov.w r2, #512 ; 0x200 8002c08: 641a str r2, [r3, #64] ; 0x40 } return HAL_TIMEOUT; 8002c0a: 2303 movs r3, #3 8002c0c: e0aa b.n 8002d64 } /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); 8002c0e: 897b ldrh r3, [r7, #10] 8002c10: b2db uxtb r3, r3 8002c12: 461a mov r2, r3 8002c14: 68fb ldr r3, [r7, #12] 8002c16: 681b ldr r3, [r3, #0] 8002c18: f002 02fe and.w r2, r2, #254 ; 0xfe 8002c1c: 611a str r2, [r3, #16] /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8002c1e: 6a7b ldr r3, [r7, #36] ; 0x24 8002c20: 6a3a ldr r2, [r7, #32] 8002c22: 4952 ldr r1, [pc, #328] ; (8002d6c ) 8002c24: 68f8 ldr r0, [r7, #12] 8002c26: f000 f8fa bl 8002e1e 8002c2a: 4603 mov r3, r0 8002c2c: 2b00 cmp r3, #0 8002c2e: d001 beq.n 8002c34 { return HAL_ERROR; 8002c30: 2301 movs r3, #1 8002c32: e097 b.n 8002d64 } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8002c34: 2300 movs r3, #0 8002c36: 617b str r3, [r7, #20] 8002c38: 68fb ldr r3, [r7, #12] 8002c3a: 681b ldr r3, [r3, #0] 8002c3c: 695b ldr r3, [r3, #20] 8002c3e: 617b str r3, [r7, #20] 8002c40: 68fb ldr r3, [r7, #12] 8002c42: 681b ldr r3, [r3, #0] 8002c44: 699b ldr r3, [r3, #24] 8002c46: 617b str r3, [r7, #20] 8002c48: 697b ldr r3, [r7, #20] /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002c4a: 6a7a ldr r2, [r7, #36] ; 0x24 8002c4c: 6a39 ldr r1, [r7, #32] 8002c4e: 68f8 ldr r0, [r7, #12] 8002c50: f000 f964 bl 8002f1c 8002c54: 4603 mov r3, r0 8002c56: 2b00 cmp r3, #0 8002c58: d00d beq.n 8002c76 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002c5a: 68fb ldr r3, [r7, #12] 8002c5c: 6c1b ldr r3, [r3, #64] ; 0x40 8002c5e: 2b04 cmp r3, #4 8002c60: d107 bne.n 8002c72 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002c62: 68fb ldr r3, [r7, #12] 8002c64: 681b ldr r3, [r3, #0] 8002c66: 681a ldr r2, [r3, #0] 8002c68: 68fb ldr r3, [r7, #12] 8002c6a: 681b ldr r3, [r3, #0] 8002c6c: f442 7200 orr.w r2, r2, #512 ; 0x200 8002c70: 601a str r2, [r3, #0] } return HAL_ERROR; 8002c72: 2301 movs r3, #1 8002c74: e076 b.n 8002d64 } /* If Memory address size is 8Bit */ if (MemAddSize == I2C_MEMADD_SIZE_8BIT) 8002c76: 88fb ldrh r3, [r7, #6] 8002c78: 2b01 cmp r3, #1 8002c7a: d105 bne.n 8002c88 { /* Send Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8002c7c: 893b ldrh r3, [r7, #8] 8002c7e: b2da uxtb r2, r3 8002c80: 68fb ldr r3, [r7, #12] 8002c82: 681b ldr r3, [r3, #0] 8002c84: 611a str r2, [r3, #16] 8002c86: e021 b.n 8002ccc } /* If Memory address size is 16Bit */ else { /* Send MSB of Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); 8002c88: 893b ldrh r3, [r7, #8] 8002c8a: 0a1b lsrs r3, r3, #8 8002c8c: b29b uxth r3, r3 8002c8e: b2da uxtb r2, r3 8002c90: 68fb ldr r3, [r7, #12] 8002c92: 681b ldr r3, [r3, #0] 8002c94: 611a str r2, [r3, #16] /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002c96: 6a7a ldr r2, [r7, #36] ; 0x24 8002c98: 6a39 ldr r1, [r7, #32] 8002c9a: 68f8 ldr r0, [r7, #12] 8002c9c: f000 f93e bl 8002f1c 8002ca0: 4603 mov r3, r0 8002ca2: 2b00 cmp r3, #0 8002ca4: d00d beq.n 8002cc2 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002ca6: 68fb ldr r3, [r7, #12] 8002ca8: 6c1b ldr r3, [r3, #64] ; 0x40 8002caa: 2b04 cmp r3, #4 8002cac: d107 bne.n 8002cbe { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002cae: 68fb ldr r3, [r7, #12] 8002cb0: 681b ldr r3, [r3, #0] 8002cb2: 681a ldr r2, [r3, #0] 8002cb4: 68fb ldr r3, [r7, #12] 8002cb6: 681b ldr r3, [r3, #0] 8002cb8: f442 7200 orr.w r2, r2, #512 ; 0x200 8002cbc: 601a str r2, [r3, #0] } return HAL_ERROR; 8002cbe: 2301 movs r3, #1 8002cc0: e050 b.n 8002d64 } /* Send LSB of Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); 8002cc2: 893b ldrh r3, [r7, #8] 8002cc4: b2da uxtb r2, r3 8002cc6: 68fb ldr r3, [r7, #12] 8002cc8: 681b ldr r3, [r3, #0] 8002cca: 611a str r2, [r3, #16] } /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002ccc: 6a7a ldr r2, [r7, #36] ; 0x24 8002cce: 6a39 ldr r1, [r7, #32] 8002cd0: 68f8 ldr r0, [r7, #12] 8002cd2: f000 f923 bl 8002f1c 8002cd6: 4603 mov r3, r0 8002cd8: 2b00 cmp r3, #0 8002cda: d00d beq.n 8002cf8 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) 8002cdc: 68fb ldr r3, [r7, #12] 8002cde: 6c1b ldr r3, [r3, #64] ; 0x40 8002ce0: 2b04 cmp r3, #4 8002ce2: d107 bne.n 8002cf4 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002ce4: 68fb ldr r3, [r7, #12] 8002ce6: 681b ldr r3, [r3, #0] 8002ce8: 681a ldr r2, [r3, #0] 8002cea: 68fb ldr r3, [r7, #12] 8002cec: 681b ldr r3, [r3, #0] 8002cee: f442 7200 orr.w r2, r2, #512 ; 0x200 8002cf2: 601a str r2, [r3, #0] } return HAL_ERROR; 8002cf4: 2301 movs r3, #1 8002cf6: e035 b.n 8002d64 } /* Generate Restart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); 8002cf8: 68fb ldr r3, [r7, #12] 8002cfa: 681b ldr r3, [r3, #0] 8002cfc: 681a ldr r2, [r3, #0] 8002cfe: 68fb ldr r3, [r7, #12] 8002d00: 681b ldr r3, [r3, #0] 8002d02: f442 7280 orr.w r2, r2, #256 ; 0x100 8002d06: 601a str r2, [r3, #0] /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) 8002d08: 6a7b ldr r3, [r7, #36] ; 0x24 8002d0a: 9300 str r3, [sp, #0] 8002d0c: 6a3b ldr r3, [r7, #32] 8002d0e: 2200 movs r2, #0 8002d10: f04f 1101 mov.w r1, #65537 ; 0x10001 8002d14: 68f8 ldr r0, [r7, #12] 8002d16: f000 f82b bl 8002d70 8002d1a: 4603 mov r3, r0 8002d1c: 2b00 cmp r3, #0 8002d1e: d00d beq.n 8002d3c { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) 8002d20: 68fb ldr r3, [r7, #12] 8002d22: 681b ldr r3, [r3, #0] 8002d24: 681b ldr r3, [r3, #0] 8002d26: f403 7380 and.w r3, r3, #256 ; 0x100 8002d2a: f5b3 7f80 cmp.w r3, #256 ; 0x100 8002d2e: d103 bne.n 8002d38 { hi2c->ErrorCode = HAL_I2C_WRONG_START; 8002d30: 68fb ldr r3, [r7, #12] 8002d32: f44f 7200 mov.w r2, #512 ; 0x200 8002d36: 641a str r2, [r3, #64] ; 0x40 } return HAL_TIMEOUT; 8002d38: 2303 movs r3, #3 8002d3a: e013 b.n 8002d64 } /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); 8002d3c: 897b ldrh r3, [r7, #10] 8002d3e: b2db uxtb r3, r3 8002d40: f043 0301 orr.w r3, r3, #1 8002d44: b2da uxtb r2, r3 8002d46: 68fb ldr r3, [r7, #12] 8002d48: 681b ldr r3, [r3, #0] 8002d4a: 611a str r2, [r3, #16] /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) 8002d4c: 6a7b ldr r3, [r7, #36] ; 0x24 8002d4e: 6a3a ldr r2, [r7, #32] 8002d50: 4906 ldr r1, [pc, #24] ; (8002d6c ) 8002d52: 68f8 ldr r0, [r7, #12] 8002d54: f000 f863 bl 8002e1e 8002d58: 4603 mov r3, r0 8002d5a: 2b00 cmp r3, #0 8002d5c: d001 beq.n 8002d62 { return HAL_ERROR; 8002d5e: 2301 movs r3, #1 8002d60: e000 b.n 8002d64 } return HAL_OK; 8002d62: 2300 movs r3, #0 } 8002d64: 4618 mov r0, r3 8002d66: 3718 adds r7, #24 8002d68: 46bd mov sp, r7 8002d6a: bd80 pop {r7, pc} 8002d6c: 00010002 .word 0x00010002 08002d70 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) { 8002d70: b580 push {r7, lr} 8002d72: b084 sub sp, #16 8002d74: af00 add r7, sp, #0 8002d76: 60f8 str r0, [r7, #12] 8002d78: 60b9 str r1, [r7, #8] 8002d7a: 603b str r3, [r7, #0] 8002d7c: 4613 mov r3, r2 8002d7e: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) 8002d80: e025 b.n 8002dce { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8002d82: 683b ldr r3, [r7, #0] 8002d84: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8002d88: d021 beq.n 8002dce { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8002d8a: f7fe fecd bl 8001b28 8002d8e: 4602 mov r2, r0 8002d90: 69bb ldr r3, [r7, #24] 8002d92: 1ad3 subs r3, r2, r3 8002d94: 683a ldr r2, [r7, #0] 8002d96: 429a cmp r2, r3 8002d98: d302 bcc.n 8002da0 8002d9a: 683b ldr r3, [r7, #0] 8002d9c: 2b00 cmp r3, #0 8002d9e: d116 bne.n 8002dce { hi2c->PreviousState = I2C_STATE_NONE; 8002da0: 68fb ldr r3, [r7, #12] 8002da2: 2200 movs r2, #0 8002da4: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8002da6: 68fb ldr r3, [r7, #12] 8002da8: 2220 movs r2, #32 8002daa: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002dae: 68fb ldr r3, [r7, #12] 8002db0: 2200 movs r2, #0 8002db2: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8002db6: 68fb ldr r3, [r7, #12] 8002db8: 6c1b ldr r3, [r3, #64] ; 0x40 8002dba: f043 0220 orr.w r2, r3, #32 8002dbe: 68fb ldr r3, [r7, #12] 8002dc0: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002dc2: 68fb ldr r3, [r7, #12] 8002dc4: 2200 movs r2, #0 8002dc6: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8002dca: 2301 movs r3, #1 8002dcc: e023 b.n 8002e16 while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) 8002dce: 68bb ldr r3, [r7, #8] 8002dd0: 0c1b lsrs r3, r3, #16 8002dd2: b2db uxtb r3, r3 8002dd4: 2b01 cmp r3, #1 8002dd6: d10d bne.n 8002df4 8002dd8: 68fb ldr r3, [r7, #12] 8002dda: 681b ldr r3, [r3, #0] 8002ddc: 695b ldr r3, [r3, #20] 8002dde: 43da mvns r2, r3 8002de0: 68bb ldr r3, [r7, #8] 8002de2: 4013 ands r3, r2 8002de4: b29b uxth r3, r3 8002de6: 2b00 cmp r3, #0 8002de8: bf0c ite eq 8002dea: 2301 moveq r3, #1 8002dec: 2300 movne r3, #0 8002dee: b2db uxtb r3, r3 8002df0: 461a mov r2, r3 8002df2: e00c b.n 8002e0e 8002df4: 68fb ldr r3, [r7, #12] 8002df6: 681b ldr r3, [r3, #0] 8002df8: 699b ldr r3, [r3, #24] 8002dfa: 43da mvns r2, r3 8002dfc: 68bb ldr r3, [r7, #8] 8002dfe: 4013 ands r3, r2 8002e00: b29b uxth r3, r3 8002e02: 2b00 cmp r3, #0 8002e04: bf0c ite eq 8002e06: 2301 moveq r3, #1 8002e08: 2300 movne r3, #0 8002e0a: b2db uxtb r3, r3 8002e0c: 461a mov r2, r3 8002e0e: 79fb ldrb r3, [r7, #7] 8002e10: 429a cmp r2, r3 8002e12: d0b6 beq.n 8002d82 } } } return HAL_OK; 8002e14: 2300 movs r3, #0 } 8002e16: 4618 mov r0, r3 8002e18: 3710 adds r7, #16 8002e1a: 46bd mov sp, r7 8002e1c: bd80 pop {r7, pc} 08002e1e : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart) { 8002e1e: b580 push {r7, lr} 8002e20: b084 sub sp, #16 8002e22: af00 add r7, sp, #0 8002e24: 60f8 str r0, [r7, #12] 8002e26: 60b9 str r1, [r7, #8] 8002e28: 607a str r2, [r7, #4] 8002e2a: 603b str r3, [r7, #0] while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) 8002e2c: e051 b.n 8002ed2 { if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 8002e2e: 68fb ldr r3, [r7, #12] 8002e30: 681b ldr r3, [r3, #0] 8002e32: 695b ldr r3, [r3, #20] 8002e34: f403 6380 and.w r3, r3, #1024 ; 0x400 8002e38: f5b3 6f80 cmp.w r3, #1024 ; 0x400 8002e3c: d123 bne.n 8002e86 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8002e3e: 68fb ldr r3, [r7, #12] 8002e40: 681b ldr r3, [r3, #0] 8002e42: 681a ldr r2, [r3, #0] 8002e44: 68fb ldr r3, [r7, #12] 8002e46: 681b ldr r3, [r3, #0] 8002e48: f442 7200 orr.w r2, r2, #512 ; 0x200 8002e4c: 601a str r2, [r3, #0] /* Clear AF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 8002e4e: 68fb ldr r3, [r7, #12] 8002e50: 681b ldr r3, [r3, #0] 8002e52: f46f 6280 mvn.w r2, #1024 ; 0x400 8002e56: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; 8002e58: 68fb ldr r3, [r7, #12] 8002e5a: 2200 movs r2, #0 8002e5c: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8002e5e: 68fb ldr r3, [r7, #12] 8002e60: 2220 movs r2, #32 8002e62: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002e66: 68fb ldr r3, [r7, #12] 8002e68: 2200 movs r2, #0 8002e6a: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; 8002e6e: 68fb ldr r3, [r7, #12] 8002e70: 6c1b ldr r3, [r3, #64] ; 0x40 8002e72: f043 0204 orr.w r2, r3, #4 8002e76: 68fb ldr r3, [r7, #12] 8002e78: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002e7a: 68fb ldr r3, [r7, #12] 8002e7c: 2200 movs r2, #0 8002e7e: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8002e82: 2301 movs r3, #1 8002e84: e046 b.n 8002f14 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8002e86: 687b ldr r3, [r7, #4] 8002e88: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8002e8c: d021 beq.n 8002ed2 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8002e8e: f7fe fe4b bl 8001b28 8002e92: 4602 mov r2, r0 8002e94: 683b ldr r3, [r7, #0] 8002e96: 1ad3 subs r3, r2, r3 8002e98: 687a ldr r2, [r7, #4] 8002e9a: 429a cmp r2, r3 8002e9c: d302 bcc.n 8002ea4 8002e9e: 687b ldr r3, [r7, #4] 8002ea0: 2b00 cmp r3, #0 8002ea2: d116 bne.n 8002ed2 { hi2c->PreviousState = I2C_STATE_NONE; 8002ea4: 68fb ldr r3, [r7, #12] 8002ea6: 2200 movs r2, #0 8002ea8: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8002eaa: 68fb ldr r3, [r7, #12] 8002eac: 2220 movs r2, #32 8002eae: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002eb2: 68fb ldr r3, [r7, #12] 8002eb4: 2200 movs r2, #0 8002eb6: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8002eba: 68fb ldr r3, [r7, #12] 8002ebc: 6c1b ldr r3, [r3, #64] ; 0x40 8002ebe: f043 0220 orr.w r2, r3, #32 8002ec2: 68fb ldr r3, [r7, #12] 8002ec4: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002ec6: 68fb ldr r3, [r7, #12] 8002ec8: 2200 movs r2, #0 8002eca: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8002ece: 2301 movs r3, #1 8002ed0: e020 b.n 8002f14 while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) 8002ed2: 68bb ldr r3, [r7, #8] 8002ed4: 0c1b lsrs r3, r3, #16 8002ed6: b2db uxtb r3, r3 8002ed8: 2b01 cmp r3, #1 8002eda: d10c bne.n 8002ef6 8002edc: 68fb ldr r3, [r7, #12] 8002ede: 681b ldr r3, [r3, #0] 8002ee0: 695b ldr r3, [r3, #20] 8002ee2: 43da mvns r2, r3 8002ee4: 68bb ldr r3, [r7, #8] 8002ee6: 4013 ands r3, r2 8002ee8: b29b uxth r3, r3 8002eea: 2b00 cmp r3, #0 8002eec: bf14 ite ne 8002eee: 2301 movne r3, #1 8002ef0: 2300 moveq r3, #0 8002ef2: b2db uxtb r3, r3 8002ef4: e00b b.n 8002f0e 8002ef6: 68fb ldr r3, [r7, #12] 8002ef8: 681b ldr r3, [r3, #0] 8002efa: 699b ldr r3, [r3, #24] 8002efc: 43da mvns r2, r3 8002efe: 68bb ldr r3, [r7, #8] 8002f00: 4013 ands r3, r2 8002f02: b29b uxth r3, r3 8002f04: 2b00 cmp r3, #0 8002f06: bf14 ite ne 8002f08: 2301 movne r3, #1 8002f0a: 2300 moveq r3, #0 8002f0c: b2db uxtb r3, r3 8002f0e: 2b00 cmp r3, #0 8002f10: d18d bne.n 8002e2e } } } return HAL_OK; 8002f12: 2300 movs r3, #0 } 8002f14: 4618 mov r0, r3 8002f16: 3710 adds r7, #16 8002f18: 46bd mov sp, r7 8002f1a: bd80 pop {r7, pc} 08002f1c : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8002f1c: b580 push {r7, lr} 8002f1e: b084 sub sp, #16 8002f20: af00 add r7, sp, #0 8002f22: 60f8 str r0, [r7, #12] 8002f24: 60b9 str r1, [r7, #8] 8002f26: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) 8002f28: e02d b.n 8002f86 { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 8002f2a: 68f8 ldr r0, [r7, #12] 8002f2c: f000 f8ce bl 80030cc 8002f30: 4603 mov r3, r0 8002f32: 2b00 cmp r3, #0 8002f34: d001 beq.n 8002f3a { return HAL_ERROR; 8002f36: 2301 movs r3, #1 8002f38: e02d b.n 8002f96 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8002f3a: 68bb ldr r3, [r7, #8] 8002f3c: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8002f40: d021 beq.n 8002f86 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8002f42: f7fe fdf1 bl 8001b28 8002f46: 4602 mov r2, r0 8002f48: 687b ldr r3, [r7, #4] 8002f4a: 1ad3 subs r3, r2, r3 8002f4c: 68ba ldr r2, [r7, #8] 8002f4e: 429a cmp r2, r3 8002f50: d302 bcc.n 8002f58 8002f52: 68bb ldr r3, [r7, #8] 8002f54: 2b00 cmp r3, #0 8002f56: d116 bne.n 8002f86 { hi2c->PreviousState = I2C_STATE_NONE; 8002f58: 68fb ldr r3, [r7, #12] 8002f5a: 2200 movs r2, #0 8002f5c: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8002f5e: 68fb ldr r3, [r7, #12] 8002f60: 2220 movs r2, #32 8002f62: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002f66: 68fb ldr r3, [r7, #12] 8002f68: 2200 movs r2, #0 8002f6a: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8002f6e: 68fb ldr r3, [r7, #12] 8002f70: 6c1b ldr r3, [r3, #64] ; 0x40 8002f72: f043 0220 orr.w r2, r3, #32 8002f76: 68fb ldr r3, [r7, #12] 8002f78: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002f7a: 68fb ldr r3, [r7, #12] 8002f7c: 2200 movs r2, #0 8002f7e: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8002f82: 2301 movs r3, #1 8002f84: e007 b.n 8002f96 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) 8002f86: 68fb ldr r3, [r7, #12] 8002f88: 681b ldr r3, [r3, #0] 8002f8a: 695b ldr r3, [r3, #20] 8002f8c: f003 0380 and.w r3, r3, #128 ; 0x80 8002f90: 2b80 cmp r3, #128 ; 0x80 8002f92: d1ca bne.n 8002f2a } } } return HAL_OK; 8002f94: 2300 movs r3, #0 } 8002f96: 4618 mov r0, r3 8002f98: 3710 adds r7, #16 8002f9a: 46bd mov sp, r7 8002f9c: bd80 pop {r7, pc} 08002f9e : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8002f9e: b580 push {r7, lr} 8002fa0: b084 sub sp, #16 8002fa2: af00 add r7, sp, #0 8002fa4: 60f8 str r0, [r7, #12] 8002fa6: 60b9 str r1, [r7, #8] 8002fa8: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) 8002faa: e02d b.n 8003008 { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) 8002fac: 68f8 ldr r0, [r7, #12] 8002fae: f000 f88d bl 80030cc 8002fb2: 4603 mov r3, r0 8002fb4: 2b00 cmp r3, #0 8002fb6: d001 beq.n 8002fbc { return HAL_ERROR; 8002fb8: 2301 movs r3, #1 8002fba: e02d b.n 8003018 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8002fbc: 68bb ldr r3, [r7, #8] 8002fbe: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8002fc2: d021 beq.n 8003008 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8002fc4: f7fe fdb0 bl 8001b28 8002fc8: 4602 mov r2, r0 8002fca: 687b ldr r3, [r7, #4] 8002fcc: 1ad3 subs r3, r2, r3 8002fce: 68ba ldr r2, [r7, #8] 8002fd0: 429a cmp r2, r3 8002fd2: d302 bcc.n 8002fda 8002fd4: 68bb ldr r3, [r7, #8] 8002fd6: 2b00 cmp r3, #0 8002fd8: d116 bne.n 8003008 { hi2c->PreviousState = I2C_STATE_NONE; 8002fda: 68fb ldr r3, [r7, #12] 8002fdc: 2200 movs r2, #0 8002fde: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 8002fe0: 68fb ldr r3, [r7, #12] 8002fe2: 2220 movs r2, #32 8002fe4: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8002fe8: 68fb ldr r3, [r7, #12] 8002fea: 2200 movs r2, #0 8002fec: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8002ff0: 68fb ldr r3, [r7, #12] 8002ff2: 6c1b ldr r3, [r3, #64] ; 0x40 8002ff4: f043 0220 orr.w r2, r3, #32 8002ff8: 68fb ldr r3, [r7, #12] 8002ffa: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002ffc: 68fb ldr r3, [r7, #12] 8002ffe: 2200 movs r2, #0 8003000: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8003004: 2301 movs r3, #1 8003006: e007 b.n 8003018 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) 8003008: 68fb ldr r3, [r7, #12] 800300a: 681b ldr r3, [r3, #0] 800300c: 695b ldr r3, [r3, #20] 800300e: f003 0304 and.w r3, r3, #4 8003012: 2b04 cmp r3, #4 8003014: d1ca bne.n 8002fac } } } return HAL_OK; 8003016: 2300 movs r3, #0 } 8003018: 4618 mov r0, r3 800301a: 3710 adds r7, #16 800301c: 46bd mov sp, r7 800301e: bd80 pop {r7, pc} 08003020 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8003020: b580 push {r7, lr} 8003022: b084 sub sp, #16 8003024: af00 add r7, sp, #0 8003026: 60f8 str r0, [r7, #12] 8003028: 60b9 str r1, [r7, #8] 800302a: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) 800302c: e042 b.n 80030b4 { /* Check if a STOPF is detected */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) 800302e: 68fb ldr r3, [r7, #12] 8003030: 681b ldr r3, [r3, #0] 8003032: 695b ldr r3, [r3, #20] 8003034: f003 0310 and.w r3, r3, #16 8003038: 2b10 cmp r3, #16 800303a: d119 bne.n 8003070 { /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 800303c: 68fb ldr r3, [r7, #12] 800303e: 681b ldr r3, [r3, #0] 8003040: f06f 0210 mvn.w r2, #16 8003044: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; 8003046: 68fb ldr r3, [r7, #12] 8003048: 2200 movs r2, #0 800304a: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 800304c: 68fb ldr r3, [r7, #12] 800304e: 2220 movs r2, #32 8003050: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8003054: 68fb ldr r3, [r7, #12] 8003056: 2200 movs r2, #0 8003058: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_NONE; 800305c: 68fb ldr r3, [r7, #12] 800305e: 6c1a ldr r2, [r3, #64] ; 0x40 8003060: 68fb ldr r3, [r7, #12] 8003062: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003064: 68fb ldr r3, [r7, #12] 8003066: 2200 movs r2, #0 8003068: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 800306c: 2301 movs r3, #1 800306e: e029 b.n 80030c4 } /* Check for the Timeout */ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8003070: f7fe fd5a bl 8001b28 8003074: 4602 mov r2, r0 8003076: 687b ldr r3, [r7, #4] 8003078: 1ad3 subs r3, r2, r3 800307a: 68ba ldr r2, [r7, #8] 800307c: 429a cmp r2, r3 800307e: d302 bcc.n 8003086 8003080: 68bb ldr r3, [r7, #8] 8003082: 2b00 cmp r3, #0 8003084: d116 bne.n 80030b4 { hi2c->PreviousState = I2C_STATE_NONE; 8003086: 68fb ldr r3, [r7, #12] 8003088: 2200 movs r2, #0 800308a: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 800308c: 68fb ldr r3, [r7, #12] 800308e: 2220 movs r2, #32 8003090: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8003094: 68fb ldr r3, [r7, #12] 8003096: 2200 movs r2, #0 8003098: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 800309c: 68fb ldr r3, [r7, #12] 800309e: 6c1b ldr r3, [r3, #64] ; 0x40 80030a0: f043 0220 orr.w r2, r3, #32 80030a4: 68fb ldr r3, [r7, #12] 80030a6: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 80030a8: 68fb ldr r3, [r7, #12] 80030aa: 2200 movs r2, #0 80030ac: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 80030b0: 2301 movs r3, #1 80030b2: e007 b.n 80030c4 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) 80030b4: 68fb ldr r3, [r7, #12] 80030b6: 681b ldr r3, [r3, #0] 80030b8: 695b ldr r3, [r3, #20] 80030ba: f003 0340 and.w r3, r3, #64 ; 0x40 80030be: 2b40 cmp r3, #64 ; 0x40 80030c0: d1b5 bne.n 800302e } } return HAL_OK; 80030c2: 2300 movs r3, #0 } 80030c4: 4618 mov r0, r3 80030c6: 3710 adds r7, #16 80030c8: 46bd mov sp, r7 80030ca: bd80 pop {r7, pc} 080030cc : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) { 80030cc: b480 push {r7} 80030ce: b083 sub sp, #12 80030d0: af00 add r7, sp, #0 80030d2: 6078 str r0, [r7, #4] if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) 80030d4: 687b ldr r3, [r7, #4] 80030d6: 681b ldr r3, [r3, #0] 80030d8: 695b ldr r3, [r3, #20] 80030da: f403 6380 and.w r3, r3, #1024 ; 0x400 80030de: f5b3 6f80 cmp.w r3, #1024 ; 0x400 80030e2: d11b bne.n 800311c { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 80030e4: 687b ldr r3, [r7, #4] 80030e6: 681b ldr r3, [r3, #0] 80030e8: f46f 6280 mvn.w r2, #1024 ; 0x400 80030ec: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; 80030ee: 687b ldr r3, [r7, #4] 80030f0: 2200 movs r2, #0 80030f2: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; 80030f4: 687b ldr r3, [r7, #4] 80030f6: 2220 movs r2, #32 80030f8: f883 203d strb.w r2, [r3, #61] ; 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 80030fc: 687b ldr r3, [r7, #4] 80030fe: 2200 movs r2, #0 8003100: f883 203e strb.w r2, [r3, #62] ; 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; 8003104: 687b ldr r3, [r7, #4] 8003106: 6c1b ldr r3, [r3, #64] ; 0x40 8003108: f043 0204 orr.w r2, r3, #4 800310c: 687b ldr r3, [r7, #4] 800310e: 641a str r2, [r3, #64] ; 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003110: 687b ldr r3, [r7, #4] 8003112: 2200 movs r2, #0 8003114: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_ERROR; 8003118: 2301 movs r3, #1 800311a: e000 b.n 800311e } return HAL_OK; 800311c: 2300 movs r3, #0 } 800311e: 4618 mov r0, r3 8003120: 370c adds r7, #12 8003122: 46bd mov sp, r7 8003124: bc80 pop {r7} 8003126: 4770 bx lr 08003128 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 8003128: b580 push {r7, lr} 800312a: b086 sub sp, #24 800312c: af00 add r7, sp, #0 800312e: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 8003130: 687b ldr r3, [r7, #4] 8003132: 2b00 cmp r3, #0 8003134: d101 bne.n 800313a { return HAL_ERROR; 8003136: 2301 movs r3, #1 8003138: e26c b.n 8003614 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 800313a: 687b ldr r3, [r7, #4] 800313c: 681b ldr r3, [r3, #0] 800313e: f003 0301 and.w r3, r3, #1 8003142: 2b00 cmp r3, #0 8003144: f000 8087 beq.w 8003256 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8003148: 4b92 ldr r3, [pc, #584] ; (8003394 ) 800314a: 685b ldr r3, [r3, #4] 800314c: f003 030c and.w r3, r3, #12 8003150: 2b04 cmp r3, #4 8003152: d00c beq.n 800316e || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8003154: 4b8f ldr r3, [pc, #572] ; (8003394 ) 8003156: 685b ldr r3, [r3, #4] 8003158: f003 030c and.w r3, r3, #12 800315c: 2b08 cmp r3, #8 800315e: d112 bne.n 8003186 8003160: 4b8c ldr r3, [pc, #560] ; (8003394 ) 8003162: 685b ldr r3, [r3, #4] 8003164: f403 3380 and.w r3, r3, #65536 ; 0x10000 8003168: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 800316c: d10b bne.n 8003186 { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 800316e: 4b89 ldr r3, [pc, #548] ; (8003394 ) 8003170: 681b ldr r3, [r3, #0] 8003172: f403 3300 and.w r3, r3, #131072 ; 0x20000 8003176: 2b00 cmp r3, #0 8003178: d06c beq.n 8003254 800317a: 687b ldr r3, [r7, #4] 800317c: 685b ldr r3, [r3, #4] 800317e: 2b00 cmp r3, #0 8003180: d168 bne.n 8003254 { return HAL_ERROR; 8003182: 2301 movs r3, #1 8003184: e246 b.n 8003614 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8003186: 687b ldr r3, [r7, #4] 8003188: 685b ldr r3, [r3, #4] 800318a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 800318e: d106 bne.n 800319e 8003190: 4b80 ldr r3, [pc, #512] ; (8003394 ) 8003192: 681b ldr r3, [r3, #0] 8003194: 4a7f ldr r2, [pc, #508] ; (8003394 ) 8003196: f443 3380 orr.w r3, r3, #65536 ; 0x10000 800319a: 6013 str r3, [r2, #0] 800319c: e02e b.n 80031fc 800319e: 687b ldr r3, [r7, #4] 80031a0: 685b ldr r3, [r3, #4] 80031a2: 2b00 cmp r3, #0 80031a4: d10c bne.n 80031c0 80031a6: 4b7b ldr r3, [pc, #492] ; (8003394 ) 80031a8: 681b ldr r3, [r3, #0] 80031aa: 4a7a ldr r2, [pc, #488] ; (8003394 ) 80031ac: f423 3380 bic.w r3, r3, #65536 ; 0x10000 80031b0: 6013 str r3, [r2, #0] 80031b2: 4b78 ldr r3, [pc, #480] ; (8003394 ) 80031b4: 681b ldr r3, [r3, #0] 80031b6: 4a77 ldr r2, [pc, #476] ; (8003394 ) 80031b8: f423 2380 bic.w r3, r3, #262144 ; 0x40000 80031bc: 6013 str r3, [r2, #0] 80031be: e01d b.n 80031fc 80031c0: 687b ldr r3, [r7, #4] 80031c2: 685b ldr r3, [r3, #4] 80031c4: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 80031c8: d10c bne.n 80031e4 80031ca: 4b72 ldr r3, [pc, #456] ; (8003394 ) 80031cc: 681b ldr r3, [r3, #0] 80031ce: 4a71 ldr r2, [pc, #452] ; (8003394 ) 80031d0: f443 2380 orr.w r3, r3, #262144 ; 0x40000 80031d4: 6013 str r3, [r2, #0] 80031d6: 4b6f ldr r3, [pc, #444] ; (8003394 ) 80031d8: 681b ldr r3, [r3, #0] 80031da: 4a6e ldr r2, [pc, #440] ; (8003394 ) 80031dc: f443 3380 orr.w r3, r3, #65536 ; 0x10000 80031e0: 6013 str r3, [r2, #0] 80031e2: e00b b.n 80031fc 80031e4: 4b6b ldr r3, [pc, #428] ; (8003394 ) 80031e6: 681b ldr r3, [r3, #0] 80031e8: 4a6a ldr r2, [pc, #424] ; (8003394 ) 80031ea: f423 3380 bic.w r3, r3, #65536 ; 0x10000 80031ee: 6013 str r3, [r2, #0] 80031f0: 4b68 ldr r3, [pc, #416] ; (8003394 ) 80031f2: 681b ldr r3, [r3, #0] 80031f4: 4a67 ldr r2, [pc, #412] ; (8003394 ) 80031f6: f423 2380 bic.w r3, r3, #262144 ; 0x40000 80031fa: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 80031fc: 687b ldr r3, [r7, #4] 80031fe: 685b ldr r3, [r3, #4] 8003200: 2b00 cmp r3, #0 8003202: d013 beq.n 800322c { /* Get Start Tick */ tickstart = HAL_GetTick(); 8003204: f7fe fc90 bl 8001b28 8003208: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800320a: e008 b.n 800321e { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 800320c: f7fe fc8c bl 8001b28 8003210: 4602 mov r2, r0 8003212: 693b ldr r3, [r7, #16] 8003214: 1ad3 subs r3, r2, r3 8003216: 2b64 cmp r3, #100 ; 0x64 8003218: d901 bls.n 800321e { return HAL_TIMEOUT; 800321a: 2303 movs r3, #3 800321c: e1fa b.n 8003614 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800321e: 4b5d ldr r3, [pc, #372] ; (8003394 ) 8003220: 681b ldr r3, [r3, #0] 8003222: f403 3300 and.w r3, r3, #131072 ; 0x20000 8003226: 2b00 cmp r3, #0 8003228: d0f0 beq.n 800320c 800322a: e014 b.n 8003256 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 800322c: f7fe fc7c bl 8001b28 8003230: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8003232: e008 b.n 8003246 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8003234: f7fe fc78 bl 8001b28 8003238: 4602 mov r2, r0 800323a: 693b ldr r3, [r7, #16] 800323c: 1ad3 subs r3, r2, r3 800323e: 2b64 cmp r3, #100 ; 0x64 8003240: d901 bls.n 8003246 { return HAL_TIMEOUT; 8003242: 2303 movs r3, #3 8003244: e1e6 b.n 8003614 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8003246: 4b53 ldr r3, [pc, #332] ; (8003394 ) 8003248: 681b ldr r3, [r3, #0] 800324a: f403 3300 and.w r3, r3, #131072 ; 0x20000 800324e: 2b00 cmp r3, #0 8003250: d1f0 bne.n 8003234 8003252: e000 b.n 8003256 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8003254: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8003256: 687b ldr r3, [r7, #4] 8003258: 681b ldr r3, [r3, #0] 800325a: f003 0302 and.w r3, r3, #2 800325e: 2b00 cmp r3, #0 8003260: d063 beq.n 800332a /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8003262: 4b4c ldr r3, [pc, #304] ; (8003394 ) 8003264: 685b ldr r3, [r3, #4] 8003266: f003 030c and.w r3, r3, #12 800326a: 2b00 cmp r3, #0 800326c: d00b beq.n 8003286 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 800326e: 4b49 ldr r3, [pc, #292] ; (8003394 ) 8003270: 685b ldr r3, [r3, #4] 8003272: f003 030c and.w r3, r3, #12 8003276: 2b08 cmp r3, #8 8003278: d11c bne.n 80032b4 800327a: 4b46 ldr r3, [pc, #280] ; (8003394 ) 800327c: 685b ldr r3, [r3, #4] 800327e: f403 3380 and.w r3, r3, #65536 ; 0x10000 8003282: 2b00 cmp r3, #0 8003284: d116 bne.n 80032b4 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8003286: 4b43 ldr r3, [pc, #268] ; (8003394 ) 8003288: 681b ldr r3, [r3, #0] 800328a: f003 0302 and.w r3, r3, #2 800328e: 2b00 cmp r3, #0 8003290: d005 beq.n 800329e 8003292: 687b ldr r3, [r7, #4] 8003294: 691b ldr r3, [r3, #16] 8003296: 2b01 cmp r3, #1 8003298: d001 beq.n 800329e { return HAL_ERROR; 800329a: 2301 movs r3, #1 800329c: e1ba b.n 8003614 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 800329e: 4b3d ldr r3, [pc, #244] ; (8003394 ) 80032a0: 681b ldr r3, [r3, #0] 80032a2: f023 02f8 bic.w r2, r3, #248 ; 0xf8 80032a6: 687b ldr r3, [r7, #4] 80032a8: 695b ldr r3, [r3, #20] 80032aa: 00db lsls r3, r3, #3 80032ac: 4939 ldr r1, [pc, #228] ; (8003394 ) 80032ae: 4313 orrs r3, r2 80032b0: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80032b2: e03a b.n 800332a } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 80032b4: 687b ldr r3, [r7, #4] 80032b6: 691b ldr r3, [r3, #16] 80032b8: 2b00 cmp r3, #0 80032ba: d020 beq.n 80032fe { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 80032bc: 4b36 ldr r3, [pc, #216] ; (8003398 ) 80032be: 2201 movs r2, #1 80032c0: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80032c2: f7fe fc31 bl 8001b28 80032c6: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80032c8: e008 b.n 80032dc { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 80032ca: f7fe fc2d bl 8001b28 80032ce: 4602 mov r2, r0 80032d0: 693b ldr r3, [r7, #16] 80032d2: 1ad3 subs r3, r2, r3 80032d4: 2b02 cmp r3, #2 80032d6: d901 bls.n 80032dc { return HAL_TIMEOUT; 80032d8: 2303 movs r3, #3 80032da: e19b b.n 8003614 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80032dc: 4b2d ldr r3, [pc, #180] ; (8003394 ) 80032de: 681b ldr r3, [r3, #0] 80032e0: f003 0302 and.w r3, r3, #2 80032e4: 2b00 cmp r3, #0 80032e6: d0f0 beq.n 80032ca } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80032e8: 4b2a ldr r3, [pc, #168] ; (8003394 ) 80032ea: 681b ldr r3, [r3, #0] 80032ec: f023 02f8 bic.w r2, r3, #248 ; 0xf8 80032f0: 687b ldr r3, [r7, #4] 80032f2: 695b ldr r3, [r3, #20] 80032f4: 00db lsls r3, r3, #3 80032f6: 4927 ldr r1, [pc, #156] ; (8003394 ) 80032f8: 4313 orrs r3, r2 80032fa: 600b str r3, [r1, #0] 80032fc: e015 b.n 800332a } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 80032fe: 4b26 ldr r3, [pc, #152] ; (8003398 ) 8003300: 2200 movs r2, #0 8003302: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8003304: f7fe fc10 bl 8001b28 8003308: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 800330a: e008 b.n 800331e { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 800330c: f7fe fc0c bl 8001b28 8003310: 4602 mov r2, r0 8003312: 693b ldr r3, [r7, #16] 8003314: 1ad3 subs r3, r2, r3 8003316: 2b02 cmp r3, #2 8003318: d901 bls.n 800331e { return HAL_TIMEOUT; 800331a: 2303 movs r3, #3 800331c: e17a b.n 8003614 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 800331e: 4b1d ldr r3, [pc, #116] ; (8003394 ) 8003320: 681b ldr r3, [r3, #0] 8003322: f003 0302 and.w r3, r3, #2 8003326: 2b00 cmp r3, #0 8003328: d1f0 bne.n 800330c } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 800332a: 687b ldr r3, [r7, #4] 800332c: 681b ldr r3, [r3, #0] 800332e: f003 0308 and.w r3, r3, #8 8003332: 2b00 cmp r3, #0 8003334: d03a beq.n 80033ac { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8003336: 687b ldr r3, [r7, #4] 8003338: 699b ldr r3, [r3, #24] 800333a: 2b00 cmp r3, #0 800333c: d019 beq.n 8003372 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 800333e: 4b17 ldr r3, [pc, #92] ; (800339c ) 8003340: 2201 movs r2, #1 8003342: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8003344: f7fe fbf0 bl 8001b28 8003348: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 800334a: e008 b.n 800335e { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 800334c: f7fe fbec bl 8001b28 8003350: 4602 mov r2, r0 8003352: 693b ldr r3, [r7, #16] 8003354: 1ad3 subs r3, r2, r3 8003356: 2b02 cmp r3, #2 8003358: d901 bls.n 800335e { return HAL_TIMEOUT; 800335a: 2303 movs r3, #3 800335c: e15a b.n 8003614 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 800335e: 4b0d ldr r3, [pc, #52] ; (8003394 ) 8003360: 6a5b ldr r3, [r3, #36] ; 0x24 8003362: f003 0302 and.w r3, r3, #2 8003366: 2b00 cmp r3, #0 8003368: d0f0 beq.n 800334c } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); 800336a: 2001 movs r0, #1 800336c: f000 fac4 bl 80038f8 8003370: e01c b.n 80033ac } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 8003372: 4b0a ldr r3, [pc, #40] ; (800339c ) 8003374: 2200 movs r2, #0 8003376: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8003378: f7fe fbd6 bl 8001b28 800337c: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 800337e: e00f b.n 80033a0 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8003380: f7fe fbd2 bl 8001b28 8003384: 4602 mov r2, r0 8003386: 693b ldr r3, [r7, #16] 8003388: 1ad3 subs r3, r2, r3 800338a: 2b02 cmp r3, #2 800338c: d908 bls.n 80033a0 { return HAL_TIMEOUT; 800338e: 2303 movs r3, #3 8003390: e140 b.n 8003614 8003392: bf00 nop 8003394: 40021000 .word 0x40021000 8003398: 42420000 .word 0x42420000 800339c: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 80033a0: 4b9e ldr r3, [pc, #632] ; (800361c ) 80033a2: 6a5b ldr r3, [r3, #36] ; 0x24 80033a4: f003 0302 and.w r3, r3, #2 80033a8: 2b00 cmp r3, #0 80033aa: d1e9 bne.n 8003380 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 80033ac: 687b ldr r3, [r7, #4] 80033ae: 681b ldr r3, [r3, #0] 80033b0: f003 0304 and.w r3, r3, #4 80033b4: 2b00 cmp r3, #0 80033b6: f000 80a6 beq.w 8003506 { FlagStatus pwrclkchanged = RESET; 80033ba: 2300 movs r3, #0 80033bc: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 80033be: 4b97 ldr r3, [pc, #604] ; (800361c ) 80033c0: 69db ldr r3, [r3, #28] 80033c2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 80033c6: 2b00 cmp r3, #0 80033c8: d10d bne.n 80033e6 { __HAL_RCC_PWR_CLK_ENABLE(); 80033ca: 4b94 ldr r3, [pc, #592] ; (800361c ) 80033cc: 69db ldr r3, [r3, #28] 80033ce: 4a93 ldr r2, [pc, #588] ; (800361c ) 80033d0: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 80033d4: 61d3 str r3, [r2, #28] 80033d6: 4b91 ldr r3, [pc, #580] ; (800361c ) 80033d8: 69db ldr r3, [r3, #28] 80033da: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 80033de: 60bb str r3, [r7, #8] 80033e0: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 80033e2: 2301 movs r3, #1 80033e4: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80033e6: 4b8e ldr r3, [pc, #568] ; (8003620 ) 80033e8: 681b ldr r3, [r3, #0] 80033ea: f403 7380 and.w r3, r3, #256 ; 0x100 80033ee: 2b00 cmp r3, #0 80033f0: d118 bne.n 8003424 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 80033f2: 4b8b ldr r3, [pc, #556] ; (8003620 ) 80033f4: 681b ldr r3, [r3, #0] 80033f6: 4a8a ldr r2, [pc, #552] ; (8003620 ) 80033f8: f443 7380 orr.w r3, r3, #256 ; 0x100 80033fc: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 80033fe: f7fe fb93 bl 8001b28 8003402: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8003404: e008 b.n 8003418 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8003406: f7fe fb8f bl 8001b28 800340a: 4602 mov r2, r0 800340c: 693b ldr r3, [r7, #16] 800340e: 1ad3 subs r3, r2, r3 8003410: 2b64 cmp r3, #100 ; 0x64 8003412: d901 bls.n 8003418 { return HAL_TIMEOUT; 8003414: 2303 movs r3, #3 8003416: e0fd b.n 8003614 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8003418: 4b81 ldr r3, [pc, #516] ; (8003620 ) 800341a: 681b ldr r3, [r3, #0] 800341c: f403 7380 and.w r3, r3, #256 ; 0x100 8003420: 2b00 cmp r3, #0 8003422: d0f0 beq.n 8003406 } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8003424: 687b ldr r3, [r7, #4] 8003426: 68db ldr r3, [r3, #12] 8003428: 2b01 cmp r3, #1 800342a: d106 bne.n 800343a 800342c: 4b7b ldr r3, [pc, #492] ; (800361c ) 800342e: 6a1b ldr r3, [r3, #32] 8003430: 4a7a ldr r2, [pc, #488] ; (800361c ) 8003432: f043 0301 orr.w r3, r3, #1 8003436: 6213 str r3, [r2, #32] 8003438: e02d b.n 8003496 800343a: 687b ldr r3, [r7, #4] 800343c: 68db ldr r3, [r3, #12] 800343e: 2b00 cmp r3, #0 8003440: d10c bne.n 800345c 8003442: 4b76 ldr r3, [pc, #472] ; (800361c ) 8003444: 6a1b ldr r3, [r3, #32] 8003446: 4a75 ldr r2, [pc, #468] ; (800361c ) 8003448: f023 0301 bic.w r3, r3, #1 800344c: 6213 str r3, [r2, #32] 800344e: 4b73 ldr r3, [pc, #460] ; (800361c ) 8003450: 6a1b ldr r3, [r3, #32] 8003452: 4a72 ldr r2, [pc, #456] ; (800361c ) 8003454: f023 0304 bic.w r3, r3, #4 8003458: 6213 str r3, [r2, #32] 800345a: e01c b.n 8003496 800345c: 687b ldr r3, [r7, #4] 800345e: 68db ldr r3, [r3, #12] 8003460: 2b05 cmp r3, #5 8003462: d10c bne.n 800347e 8003464: 4b6d ldr r3, [pc, #436] ; (800361c ) 8003466: 6a1b ldr r3, [r3, #32] 8003468: 4a6c ldr r2, [pc, #432] ; (800361c ) 800346a: f043 0304 orr.w r3, r3, #4 800346e: 6213 str r3, [r2, #32] 8003470: 4b6a ldr r3, [pc, #424] ; (800361c ) 8003472: 6a1b ldr r3, [r3, #32] 8003474: 4a69 ldr r2, [pc, #420] ; (800361c ) 8003476: f043 0301 orr.w r3, r3, #1 800347a: 6213 str r3, [r2, #32] 800347c: e00b b.n 8003496 800347e: 4b67 ldr r3, [pc, #412] ; (800361c ) 8003480: 6a1b ldr r3, [r3, #32] 8003482: 4a66 ldr r2, [pc, #408] ; (800361c ) 8003484: f023 0301 bic.w r3, r3, #1 8003488: 6213 str r3, [r2, #32] 800348a: 4b64 ldr r3, [pc, #400] ; (800361c ) 800348c: 6a1b ldr r3, [r3, #32] 800348e: 4a63 ldr r2, [pc, #396] ; (800361c ) 8003490: f023 0304 bic.w r3, r3, #4 8003494: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 8003496: 687b ldr r3, [r7, #4] 8003498: 68db ldr r3, [r3, #12] 800349a: 2b00 cmp r3, #0 800349c: d015 beq.n 80034ca { /* Get Start Tick */ tickstart = HAL_GetTick(); 800349e: f7fe fb43 bl 8001b28 80034a2: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80034a4: e00a b.n 80034bc { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80034a6: f7fe fb3f bl 8001b28 80034aa: 4602 mov r2, r0 80034ac: 693b ldr r3, [r7, #16] 80034ae: 1ad3 subs r3, r2, r3 80034b0: f241 3288 movw r2, #5000 ; 0x1388 80034b4: 4293 cmp r3, r2 80034b6: d901 bls.n 80034bc { return HAL_TIMEOUT; 80034b8: 2303 movs r3, #3 80034ba: e0ab b.n 8003614 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80034bc: 4b57 ldr r3, [pc, #348] ; (800361c ) 80034be: 6a1b ldr r3, [r3, #32] 80034c0: f003 0302 and.w r3, r3, #2 80034c4: 2b00 cmp r3, #0 80034c6: d0ee beq.n 80034a6 80034c8: e014 b.n 80034f4 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 80034ca: f7fe fb2d bl 8001b28 80034ce: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80034d0: e00a b.n 80034e8 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80034d2: f7fe fb29 bl 8001b28 80034d6: 4602 mov r2, r0 80034d8: 693b ldr r3, [r7, #16] 80034da: 1ad3 subs r3, r2, r3 80034dc: f241 3288 movw r2, #5000 ; 0x1388 80034e0: 4293 cmp r3, r2 80034e2: d901 bls.n 80034e8 { return HAL_TIMEOUT; 80034e4: 2303 movs r3, #3 80034e6: e095 b.n 8003614 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80034e8: 4b4c ldr r3, [pc, #304] ; (800361c ) 80034ea: 6a1b ldr r3, [r3, #32] 80034ec: f003 0302 and.w r3, r3, #2 80034f0: 2b00 cmp r3, #0 80034f2: d1ee bne.n 80034d2 } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 80034f4: 7dfb ldrb r3, [r7, #23] 80034f6: 2b01 cmp r3, #1 80034f8: d105 bne.n 8003506 { __HAL_RCC_PWR_CLK_DISABLE(); 80034fa: 4b48 ldr r3, [pc, #288] ; (800361c ) 80034fc: 69db ldr r3, [r3, #28] 80034fe: 4a47 ldr r2, [pc, #284] ; (800361c ) 8003500: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 8003504: 61d3 str r3, [r2, #28] #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8003506: 687b ldr r3, [r7, #4] 8003508: 69db ldr r3, [r3, #28] 800350a: 2b00 cmp r3, #0 800350c: f000 8081 beq.w 8003612 { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8003510: 4b42 ldr r3, [pc, #264] ; (800361c ) 8003512: 685b ldr r3, [r3, #4] 8003514: f003 030c and.w r3, r3, #12 8003518: 2b08 cmp r3, #8 800351a: d061 beq.n 80035e0 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 800351c: 687b ldr r3, [r7, #4] 800351e: 69db ldr r3, [r3, #28] 8003520: 2b02 cmp r3, #2 8003522: d146 bne.n 80035b2 /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8003524: 4b3f ldr r3, [pc, #252] ; (8003624 ) 8003526: 2200 movs r2, #0 8003528: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 800352a: f7fe fafd bl 8001b28 800352e: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8003530: e008 b.n 8003544 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8003532: f7fe faf9 bl 8001b28 8003536: 4602 mov r2, r0 8003538: 693b ldr r3, [r7, #16] 800353a: 1ad3 subs r3, r2, r3 800353c: 2b02 cmp r3, #2 800353e: d901 bls.n 8003544 { return HAL_TIMEOUT; 8003540: 2303 movs r3, #3 8003542: e067 b.n 8003614 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8003544: 4b35 ldr r3, [pc, #212] ; (800361c ) 8003546: 681b ldr r3, [r3, #0] 8003548: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 800354c: 2b00 cmp r3, #0 800354e: d1f0 bne.n 8003532 } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8003550: 687b ldr r3, [r7, #4] 8003552: 6a1b ldr r3, [r3, #32] 8003554: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8003558: d108 bne.n 800356c /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 800355a: 4b30 ldr r3, [pc, #192] ; (800361c ) 800355c: 685b ldr r3, [r3, #4] 800355e: f423 3200 bic.w r2, r3, #131072 ; 0x20000 8003562: 687b ldr r3, [r7, #4] 8003564: 689b ldr r3, [r3, #8] 8003566: 492d ldr r1, [pc, #180] ; (800361c ) 8003568: 4313 orrs r3, r2 800356a: 604b str r3, [r1, #4] } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 800356c: 4b2b ldr r3, [pc, #172] ; (800361c ) 800356e: 685b ldr r3, [r3, #4] 8003570: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000 8003574: 687b ldr r3, [r7, #4] 8003576: 6a19 ldr r1, [r3, #32] 8003578: 687b ldr r3, [r7, #4] 800357a: 6a5b ldr r3, [r3, #36] ; 0x24 800357c: 430b orrs r3, r1 800357e: 4927 ldr r1, [pc, #156] ; (800361c ) 8003580: 4313 orrs r3, r2 8003582: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8003584: 4b27 ldr r3, [pc, #156] ; (8003624 ) 8003586: 2201 movs r2, #1 8003588: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 800358a: f7fe facd bl 8001b28 800358e: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8003590: e008 b.n 80035a4 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8003592: f7fe fac9 bl 8001b28 8003596: 4602 mov r2, r0 8003598: 693b ldr r3, [r7, #16] 800359a: 1ad3 subs r3, r2, r3 800359c: 2b02 cmp r3, #2 800359e: d901 bls.n 80035a4 { return HAL_TIMEOUT; 80035a0: 2303 movs r3, #3 80035a2: e037 b.n 8003614 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80035a4: 4b1d ldr r3, [pc, #116] ; (800361c ) 80035a6: 681b ldr r3, [r3, #0] 80035a8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 80035ac: 2b00 cmp r3, #0 80035ae: d0f0 beq.n 8003592 80035b0: e02f b.n 8003612 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 80035b2: 4b1c ldr r3, [pc, #112] ; (8003624 ) 80035b4: 2200 movs r2, #0 80035b6: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80035b8: f7fe fab6 bl 8001b28 80035bc: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80035be: e008 b.n 80035d2 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 80035c0: f7fe fab2 bl 8001b28 80035c4: 4602 mov r2, r0 80035c6: 693b ldr r3, [r7, #16] 80035c8: 1ad3 subs r3, r2, r3 80035ca: 2b02 cmp r3, #2 80035cc: d901 bls.n 80035d2 { return HAL_TIMEOUT; 80035ce: 2303 movs r3, #3 80035d0: e020 b.n 8003614 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80035d2: 4b12 ldr r3, [pc, #72] ; (800361c ) 80035d4: 681b ldr r3, [r3, #0] 80035d6: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 80035da: 2b00 cmp r3, #0 80035dc: d1f0 bne.n 80035c0 80035de: e018 b.n 8003612 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 80035e0: 687b ldr r3, [r7, #4] 80035e2: 69db ldr r3, [r3, #28] 80035e4: 2b01 cmp r3, #1 80035e6: d101 bne.n 80035ec { return HAL_ERROR; 80035e8: 2301 movs r3, #1 80035ea: e013 b.n 8003614 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; 80035ec: 4b0b ldr r3, [pc, #44] ; (800361c ) 80035ee: 685b ldr r3, [r3, #4] 80035f0: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 80035f2: 68fb ldr r3, [r7, #12] 80035f4: f403 3280 and.w r2, r3, #65536 ; 0x10000 80035f8: 687b ldr r3, [r7, #4] 80035fa: 6a1b ldr r3, [r3, #32] 80035fc: 429a cmp r2, r3 80035fe: d106 bne.n 800360e (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) 8003600: 68fb ldr r3, [r7, #12] 8003602: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000 8003606: 687b ldr r3, [r7, #4] 8003608: 6a5b ldr r3, [r3, #36] ; 0x24 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 800360a: 429a cmp r2, r3 800360c: d001 beq.n 8003612 { return HAL_ERROR; 800360e: 2301 movs r3, #1 8003610: e000 b.n 8003614 } } } } return HAL_OK; 8003612: 2300 movs r3, #0 } 8003614: 4618 mov r0, r3 8003616: 3718 adds r7, #24 8003618: 46bd mov sp, r7 800361a: bd80 pop {r7, pc} 800361c: 40021000 .word 0x40021000 8003620: 40007000 .word 0x40007000 8003624: 42420060 .word 0x42420060 08003628 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 8003628: b580 push {r7, lr} 800362a: b084 sub sp, #16 800362c: af00 add r7, sp, #0 800362e: 6078 str r0, [r7, #4] 8003630: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 8003632: 687b ldr r3, [r7, #4] 8003634: 2b00 cmp r3, #0 8003636: d101 bne.n 800363c { return HAL_ERROR; 8003638: 2301 movs r3, #1 800363a: e0d0 b.n 80037de must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 800363c: 4b6a ldr r3, [pc, #424] ; (80037e8 ) 800363e: 681b ldr r3, [r3, #0] 8003640: f003 0307 and.w r3, r3, #7 8003644: 683a ldr r2, [r7, #0] 8003646: 429a cmp r2, r3 8003648: d910 bls.n 800366c { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 800364a: 4b67 ldr r3, [pc, #412] ; (80037e8 ) 800364c: 681b ldr r3, [r3, #0] 800364e: f023 0207 bic.w r2, r3, #7 8003652: 4965 ldr r1, [pc, #404] ; (80037e8 ) 8003654: 683b ldr r3, [r7, #0] 8003656: 4313 orrs r3, r2 8003658: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 800365a: 4b63 ldr r3, [pc, #396] ; (80037e8 ) 800365c: 681b ldr r3, [r3, #0] 800365e: f003 0307 and.w r3, r3, #7 8003662: 683a ldr r2, [r7, #0] 8003664: 429a cmp r2, r3 8003666: d001 beq.n 800366c { return HAL_ERROR; 8003668: 2301 movs r3, #1 800366a: e0b8 b.n 80037de } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 800366c: 687b ldr r3, [r7, #4] 800366e: 681b ldr r3, [r3, #0] 8003670: f003 0302 and.w r3, r3, #2 8003674: 2b00 cmp r3, #0 8003676: d020 beq.n 80036ba { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8003678: 687b ldr r3, [r7, #4] 800367a: 681b ldr r3, [r3, #0] 800367c: f003 0304 and.w r3, r3, #4 8003680: 2b00 cmp r3, #0 8003682: d005 beq.n 8003690 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8003684: 4b59 ldr r3, [pc, #356] ; (80037ec ) 8003686: 685b ldr r3, [r3, #4] 8003688: 4a58 ldr r2, [pc, #352] ; (80037ec ) 800368a: f443 63e0 orr.w r3, r3, #1792 ; 0x700 800368e: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8003690: 687b ldr r3, [r7, #4] 8003692: 681b ldr r3, [r3, #0] 8003694: f003 0308 and.w r3, r3, #8 8003698: 2b00 cmp r3, #0 800369a: d005 beq.n 80036a8 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 800369c: 4b53 ldr r3, [pc, #332] ; (80037ec ) 800369e: 685b ldr r3, [r3, #4] 80036a0: 4a52 ldr r2, [pc, #328] ; (80037ec ) 80036a2: f443 5360 orr.w r3, r3, #14336 ; 0x3800 80036a6: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 80036a8: 4b50 ldr r3, [pc, #320] ; (80037ec ) 80036aa: 685b ldr r3, [r3, #4] 80036ac: f023 02f0 bic.w r2, r3, #240 ; 0xf0 80036b0: 687b ldr r3, [r7, #4] 80036b2: 689b ldr r3, [r3, #8] 80036b4: 494d ldr r1, [pc, #308] ; (80037ec ) 80036b6: 4313 orrs r3, r2 80036b8: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 80036ba: 687b ldr r3, [r7, #4] 80036bc: 681b ldr r3, [r3, #0] 80036be: f003 0301 and.w r3, r3, #1 80036c2: 2b00 cmp r3, #0 80036c4: d040 beq.n 8003748 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80036c6: 687b ldr r3, [r7, #4] 80036c8: 685b ldr r3, [r3, #4] 80036ca: 2b01 cmp r3, #1 80036cc: d107 bne.n 80036de { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80036ce: 4b47 ldr r3, [pc, #284] ; (80037ec ) 80036d0: 681b ldr r3, [r3, #0] 80036d2: f403 3300 and.w r3, r3, #131072 ; 0x20000 80036d6: 2b00 cmp r3, #0 80036d8: d115 bne.n 8003706 { return HAL_ERROR; 80036da: 2301 movs r3, #1 80036dc: e07f b.n 80037de } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 80036de: 687b ldr r3, [r7, #4] 80036e0: 685b ldr r3, [r3, #4] 80036e2: 2b02 cmp r3, #2 80036e4: d107 bne.n 80036f6 { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80036e6: 4b41 ldr r3, [pc, #260] ; (80037ec ) 80036e8: 681b ldr r3, [r3, #0] 80036ea: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 80036ee: 2b00 cmp r3, #0 80036f0: d109 bne.n 8003706 { return HAL_ERROR; 80036f2: 2301 movs r3, #1 80036f4: e073 b.n 80037de } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80036f6: 4b3d ldr r3, [pc, #244] ; (80037ec ) 80036f8: 681b ldr r3, [r3, #0] 80036fa: f003 0302 and.w r3, r3, #2 80036fe: 2b00 cmp r3, #0 8003700: d101 bne.n 8003706 { return HAL_ERROR; 8003702: 2301 movs r3, #1 8003704: e06b b.n 80037de } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8003706: 4b39 ldr r3, [pc, #228] ; (80037ec ) 8003708: 685b ldr r3, [r3, #4] 800370a: f023 0203 bic.w r2, r3, #3 800370e: 687b ldr r3, [r7, #4] 8003710: 685b ldr r3, [r3, #4] 8003712: 4936 ldr r1, [pc, #216] ; (80037ec ) 8003714: 4313 orrs r3, r2 8003716: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 8003718: f7fe fa06 bl 8001b28 800371c: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 800371e: e00a b.n 8003736 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8003720: f7fe fa02 bl 8001b28 8003724: 4602 mov r2, r0 8003726: 68fb ldr r3, [r7, #12] 8003728: 1ad3 subs r3, r2, r3 800372a: f241 3288 movw r2, #5000 ; 0x1388 800372e: 4293 cmp r3, r2 8003730: d901 bls.n 8003736 { return HAL_TIMEOUT; 8003732: 2303 movs r3, #3 8003734: e053 b.n 80037de while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8003736: 4b2d ldr r3, [pc, #180] ; (80037ec ) 8003738: 685b ldr r3, [r3, #4] 800373a: f003 020c and.w r2, r3, #12 800373e: 687b ldr r3, [r7, #4] 8003740: 685b ldr r3, [r3, #4] 8003742: 009b lsls r3, r3, #2 8003744: 429a cmp r2, r3 8003746: d1eb bne.n 8003720 } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 8003748: 4b27 ldr r3, [pc, #156] ; (80037e8 ) 800374a: 681b ldr r3, [r3, #0] 800374c: f003 0307 and.w r3, r3, #7 8003750: 683a ldr r2, [r7, #0] 8003752: 429a cmp r2, r3 8003754: d210 bcs.n 8003778 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 8003756: 4b24 ldr r3, [pc, #144] ; (80037e8 ) 8003758: 681b ldr r3, [r3, #0] 800375a: f023 0207 bic.w r2, r3, #7 800375e: 4922 ldr r1, [pc, #136] ; (80037e8 ) 8003760: 683b ldr r3, [r7, #0] 8003762: 4313 orrs r3, r2 8003764: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 8003766: 4b20 ldr r3, [pc, #128] ; (80037e8 ) 8003768: 681b ldr r3, [r3, #0] 800376a: f003 0307 and.w r3, r3, #7 800376e: 683a ldr r2, [r7, #0] 8003770: 429a cmp r2, r3 8003772: d001 beq.n 8003778 { return HAL_ERROR; 8003774: 2301 movs r3, #1 8003776: e032 b.n 80037de } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8003778: 687b ldr r3, [r7, #4] 800377a: 681b ldr r3, [r3, #0] 800377c: f003 0304 and.w r3, r3, #4 8003780: 2b00 cmp r3, #0 8003782: d008 beq.n 8003796 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8003784: 4b19 ldr r3, [pc, #100] ; (80037ec ) 8003786: 685b ldr r3, [r3, #4] 8003788: f423 62e0 bic.w r2, r3, #1792 ; 0x700 800378c: 687b ldr r3, [r7, #4] 800378e: 68db ldr r3, [r3, #12] 8003790: 4916 ldr r1, [pc, #88] ; (80037ec ) 8003792: 4313 orrs r3, r2 8003794: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8003796: 687b ldr r3, [r7, #4] 8003798: 681b ldr r3, [r3, #0] 800379a: f003 0308 and.w r3, r3, #8 800379e: 2b00 cmp r3, #0 80037a0: d009 beq.n 80037b6 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 80037a2: 4b12 ldr r3, [pc, #72] ; (80037ec ) 80037a4: 685b ldr r3, [r3, #4] 80037a6: f423 5260 bic.w r2, r3, #14336 ; 0x3800 80037aa: 687b ldr r3, [r7, #4] 80037ac: 691b ldr r3, [r3, #16] 80037ae: 00db lsls r3, r3, #3 80037b0: 490e ldr r1, [pc, #56] ; (80037ec ) 80037b2: 4313 orrs r3, r2 80037b4: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 80037b6: f000 f821 bl 80037fc 80037ba: 4602 mov r2, r0 80037bc: 4b0b ldr r3, [pc, #44] ; (80037ec ) 80037be: 685b ldr r3, [r3, #4] 80037c0: 091b lsrs r3, r3, #4 80037c2: f003 030f and.w r3, r3, #15 80037c6: 490a ldr r1, [pc, #40] ; (80037f0 ) 80037c8: 5ccb ldrb r3, [r1, r3] 80037ca: fa22 f303 lsr.w r3, r2, r3 80037ce: 4a09 ldr r2, [pc, #36] ; (80037f4 ) 80037d0: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); 80037d2: 4b09 ldr r3, [pc, #36] ; (80037f8 ) 80037d4: 681b ldr r3, [r3, #0] 80037d6: 4618 mov r0, r3 80037d8: f7fe f964 bl 8001aa4 return HAL_OK; 80037dc: 2300 movs r3, #0 } 80037de: 4618 mov r0, r3 80037e0: 3710 adds r7, #16 80037e2: 46bd mov sp, r7 80037e4: bd80 pop {r7, pc} 80037e6: bf00 nop 80037e8: 40022000 .word 0x40022000 80037ec: 40021000 .word 0x40021000 80037f0: 0800a4bc .word 0x0800a4bc 80037f4: 20000000 .word 0x20000000 80037f8: 20000004 .word 0x20000004 080037fc : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 80037fc: b490 push {r4, r7} 80037fe: b08a sub sp, #40 ; 0x28 8003800: af00 add r7, sp, #0 #if defined(RCC_CFGR2_PREDIV1SRC) const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13}; const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; #else const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; 8003802: 4b2a ldr r3, [pc, #168] ; (80038ac ) 8003804: 1d3c adds r4, r7, #4 8003806: cb0f ldmia r3, {r0, r1, r2, r3} 8003808: e884 000f stmia.w r4, {r0, r1, r2, r3} #if defined(RCC_CFGR2_PREDIV1) const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; #else const uint8_t aPredivFactorTable[2] = {1, 2}; 800380c: f240 2301 movw r3, #513 ; 0x201 8003810: 803b strh r3, [r7, #0] #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 8003812: 2300 movs r3, #0 8003814: 61fb str r3, [r7, #28] 8003816: 2300 movs r3, #0 8003818: 61bb str r3, [r7, #24] 800381a: 2300 movs r3, #0 800381c: 627b str r3, [r7, #36] ; 0x24 800381e: 2300 movs r3, #0 8003820: 617b str r3, [r7, #20] uint32_t sysclockfreq = 0U; 8003822: 2300 movs r3, #0 8003824: 623b str r3, [r7, #32] #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; 8003826: 4b22 ldr r3, [pc, #136] ; (80038b0 ) 8003828: 685b ldr r3, [r3, #4] 800382a: 61fb str r3, [r7, #28] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 800382c: 69fb ldr r3, [r7, #28] 800382e: f003 030c and.w r3, r3, #12 8003832: 2b04 cmp r3, #4 8003834: d002 beq.n 800383c 8003836: 2b08 cmp r3, #8 8003838: d003 beq.n 8003842 800383a: e02d b.n 8003898 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; 800383c: 4b1d ldr r3, [pc, #116] ; (80038b4 ) 800383e: 623b str r3, [r7, #32] break; 8003840: e02d b.n 800389e } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8003842: 69fb ldr r3, [r7, #28] 8003844: 0c9b lsrs r3, r3, #18 8003846: f003 030f and.w r3, r3, #15 800384a: f107 0228 add.w r2, r7, #40 ; 0x28 800384e: 4413 add r3, r2 8003850: f813 3c24 ldrb.w r3, [r3, #-36] 8003854: 617b str r3, [r7, #20] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8003856: 69fb ldr r3, [r7, #28] 8003858: f403 3380 and.w r3, r3, #65536 ; 0x10000 800385c: 2b00 cmp r3, #0 800385e: d013 beq.n 8003888 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8003860: 4b13 ldr r3, [pc, #76] ; (80038b0 ) 8003862: 685b ldr r3, [r3, #4] 8003864: 0c5b lsrs r3, r3, #17 8003866: f003 0301 and.w r3, r3, #1 800386a: f107 0228 add.w r2, r7, #40 ; 0x28 800386e: 4413 add r3, r2 8003870: f813 3c28 ldrb.w r3, [r3, #-40] 8003874: 61bb str r3, [r7, #24] { pllclk = pllclk / 2; } #else /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8003876: 697b ldr r3, [r7, #20] 8003878: 4a0e ldr r2, [pc, #56] ; (80038b4 ) 800387a: fb02 f203 mul.w r2, r2, r3 800387e: 69bb ldr r3, [r7, #24] 8003880: fbb2 f3f3 udiv r3, r2, r3 8003884: 627b str r3, [r7, #36] ; 0x24 8003886: e004 b.n 8003892 #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8003888: 697b ldr r3, [r7, #20] 800388a: 4a0b ldr r2, [pc, #44] ; (80038b8 ) 800388c: fb02 f303 mul.w r3, r2, r3 8003890: 627b str r3, [r7, #36] ; 0x24 } sysclockfreq = pllclk; 8003892: 6a7b ldr r3, [r7, #36] ; 0x24 8003894: 623b str r3, [r7, #32] break; 8003896: e002 b.n 800389e } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; 8003898: 4b06 ldr r3, [pc, #24] ; (80038b4 ) 800389a: 623b str r3, [r7, #32] break; 800389c: bf00 nop } } return sysclockfreq; 800389e: 6a3b ldr r3, [r7, #32] } 80038a0: 4618 mov r0, r3 80038a2: 3728 adds r7, #40 ; 0x28 80038a4: 46bd mov sp, r7 80038a6: bc90 pop {r4, r7} 80038a8: 4770 bx lr 80038aa: bf00 nop 80038ac: 0800a3c0 .word 0x0800a3c0 80038b0: 40021000 .word 0x40021000 80038b4: 007a1200 .word 0x007a1200 80038b8: 003d0900 .word 0x003d0900 080038bc : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 80038bc: b480 push {r7} 80038be: af00 add r7, sp, #0 return SystemCoreClock; 80038c0: 4b02 ldr r3, [pc, #8] ; (80038cc ) 80038c2: 681b ldr r3, [r3, #0] } 80038c4: 4618 mov r0, r3 80038c6: 46bd mov sp, r7 80038c8: bc80 pop {r7} 80038ca: 4770 bx lr 80038cc: 20000000 .word 0x20000000 080038d0 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 80038d0: b580 push {r7, lr} 80038d2: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 80038d4: f7ff fff2 bl 80038bc 80038d8: 4602 mov r2, r0 80038da: 4b05 ldr r3, [pc, #20] ; (80038f0 ) 80038dc: 685b ldr r3, [r3, #4] 80038de: 0a1b lsrs r3, r3, #8 80038e0: f003 0307 and.w r3, r3, #7 80038e4: 4903 ldr r1, [pc, #12] ; (80038f4 ) 80038e6: 5ccb ldrb r3, [r1, r3] 80038e8: fa22 f303 lsr.w r3, r2, r3 } 80038ec: 4618 mov r0, r3 80038ee: bd80 pop {r7, pc} 80038f0: 40021000 .word 0x40021000 80038f4: 0800a4cc .word 0x0800a4cc 080038f8 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { 80038f8: b480 push {r7} 80038fa: b085 sub sp, #20 80038fc: af00 add r7, sp, #0 80038fe: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8003900: 4b0a ldr r3, [pc, #40] ; (800392c ) 8003902: 681b ldr r3, [r3, #0] 8003904: 4a0a ldr r2, [pc, #40] ; (8003930 ) 8003906: fba2 2303 umull r2, r3, r2, r3 800390a: 0a5b lsrs r3, r3, #9 800390c: 687a ldr r2, [r7, #4] 800390e: fb02 f303 mul.w r3, r2, r3 8003912: 60fb str r3, [r7, #12] do { __NOP(); 8003914: bf00 nop } while (Delay --); 8003916: 68fb ldr r3, [r7, #12] 8003918: 1e5a subs r2, r3, #1 800391a: 60fa str r2, [r7, #12] 800391c: 2b00 cmp r3, #0 800391e: d1f9 bne.n 8003914 } 8003920: bf00 nop 8003922: bf00 nop 8003924: 3714 adds r7, #20 8003926: 46bd mov sp, r7 8003928: bc80 pop {r7} 800392a: 4770 bx lr 800392c: 20000000 .word 0x20000000 8003930: 10624dd3 .word 0x10624dd3 08003934 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) { 8003934: b580 push {r7, lr} 8003936: b082 sub sp, #8 8003938: af00 add r7, sp, #0 800393a: 6078 str r0, [r7, #4] /* Check the SPI handle allocation */ if (hspi == NULL) 800393c: 687b ldr r3, [r7, #4] 800393e: 2b00 cmp r3, #0 8003940: d101 bne.n 8003946 { return HAL_ERROR; 8003942: 2301 movs r3, #1 8003944: e076 b.n 8003a34 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); /* TI mode is not supported on this device. TIMode parameter is mandatory equal to SPI_TIMODE_DISABLE */ assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) 8003946: 687b ldr r3, [r7, #4] 8003948: 6a5b ldr r3, [r3, #36] ; 0x24 800394a: 2b00 cmp r3, #0 800394c: d108 bne.n 8003960 { assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); if (hspi->Init.Mode == SPI_MODE_MASTER) 800394e: 687b ldr r3, [r7, #4] 8003950: 685b ldr r3, [r3, #4] 8003952: f5b3 7f82 cmp.w r3, #260 ; 0x104 8003956: d009 beq.n 800396c assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); } else { /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */ hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; 8003958: 687b ldr r3, [r7, #4] 800395a: 2200 movs r2, #0 800395c: 61da str r2, [r3, #28] 800395e: e005 b.n 800396c else { assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); /* Force polarity and phase to TI protocaol requirements */ hspi->Init.CLKPolarity = SPI_POLARITY_LOW; 8003960: 687b ldr r3, [r7, #4] 8003962: 2200 movs r2, #0 8003964: 611a str r2, [r3, #16] hspi->Init.CLKPhase = SPI_PHASE_1EDGE; 8003966: 687b ldr r3, [r7, #4] 8003968: 2200 movs r2, #0 800396a: 615a str r2, [r3, #20] if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) { assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); } #else hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 800396c: 687b ldr r3, [r7, #4] 800396e: 2200 movs r2, #0 8003970: 629a str r2, [r3, #40] ; 0x28 #endif /* USE_SPI_CRC */ if (hspi->State == HAL_SPI_STATE_RESET) 8003972: 687b ldr r3, [r7, #4] 8003974: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 8003978: b2db uxtb r3, r3 800397a: 2b00 cmp r3, #0 800397c: d106 bne.n 800398c { /* Allocate lock resource and initialize it */ hspi->Lock = HAL_UNLOCKED; 800397e: 687b ldr r3, [r7, #4] 8003980: 2200 movs r2, #0 8003982: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Init the low level hardware : GPIO, CLOCK, NVIC... */ hspi->MspInitCallback(hspi); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_SPI_MspInit(hspi); 8003986: 6878 ldr r0, [r7, #4] 8003988: f7fd fe8a bl 80016a0 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } hspi->State = HAL_SPI_STATE_BUSY; 800398c: 687b ldr r3, [r7, #4] 800398e: 2202 movs r2, #2 8003990: f883 2051 strb.w r2, [r3, #81] ; 0x51 /* Disable the selected SPI peripheral */ __HAL_SPI_DISABLE(hspi); 8003994: 687b ldr r3, [r7, #4] 8003996: 681b ldr r3, [r3, #0] 8003998: 681a ldr r2, [r3, #0] 800399a: 687b ldr r3, [r7, #4] 800399c: 681b ldr r3, [r3, #0] 800399e: f022 0240 bic.w r2, r2, #64 ; 0x40 80039a2: 601a str r2, [r3, #0] /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management, Communication speed, First bit and CRC calculation state */ WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) | 80039a4: 687b ldr r3, [r7, #4] 80039a6: 685b ldr r3, [r3, #4] 80039a8: f403 7282 and.w r2, r3, #260 ; 0x104 80039ac: 687b ldr r3, [r7, #4] 80039ae: 689b ldr r3, [r3, #8] 80039b0: f403 4304 and.w r3, r3, #33792 ; 0x8400 80039b4: 431a orrs r2, r3 80039b6: 687b ldr r3, [r7, #4] 80039b8: 68db ldr r3, [r3, #12] 80039ba: f403 6300 and.w r3, r3, #2048 ; 0x800 80039be: 431a orrs r2, r3 80039c0: 687b ldr r3, [r7, #4] 80039c2: 691b ldr r3, [r3, #16] 80039c4: f003 0302 and.w r3, r3, #2 80039c8: 431a orrs r2, r3 80039ca: 687b ldr r3, [r7, #4] 80039cc: 695b ldr r3, [r3, #20] 80039ce: f003 0301 and.w r3, r3, #1 80039d2: 431a orrs r2, r3 80039d4: 687b ldr r3, [r7, #4] 80039d6: 699b ldr r3, [r3, #24] 80039d8: f403 7300 and.w r3, r3, #512 ; 0x200 80039dc: 431a orrs r2, r3 80039de: 687b ldr r3, [r7, #4] 80039e0: 69db ldr r3, [r3, #28] 80039e2: f003 0338 and.w r3, r3, #56 ; 0x38 80039e6: 431a orrs r2, r3 80039e8: 687b ldr r3, [r7, #4] 80039ea: 6a1b ldr r3, [r3, #32] 80039ec: f003 0380 and.w r3, r3, #128 ; 0x80 80039f0: ea42 0103 orr.w r1, r2, r3 80039f4: 687b ldr r3, [r7, #4] 80039f6: 6a9b ldr r3, [r3, #40] ; 0x28 80039f8: f403 5200 and.w r2, r3, #8192 ; 0x2000 80039fc: 687b ldr r3, [r7, #4] 80039fe: 681b ldr r3, [r3, #0] 8003a00: 430a orrs r2, r1 8003a02: 601a str r2, [r3, #0] (hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) | (hspi->Init.FirstBit & SPI_CR1_LSBFIRST) | (hspi->Init.CRCCalculation & SPI_CR1_CRCEN))); /* Configure : NSS management */ WRITE_REG(hspi->Instance->CR2, ((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE)); 8003a04: 687b ldr r3, [r7, #4] 8003a06: 699b ldr r3, [r3, #24] 8003a08: 0c1a lsrs r2, r3, #16 8003a0a: 687b ldr r3, [r7, #4] 8003a0c: 681b ldr r3, [r3, #0] 8003a0e: f002 0204 and.w r2, r2, #4 8003a12: 605a str r2, [r3, #4] } #endif /* USE_SPI_CRC */ #if defined(SPI_I2SCFGR_I2SMOD) /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); 8003a14: 687b ldr r3, [r7, #4] 8003a16: 681b ldr r3, [r3, #0] 8003a18: 69da ldr r2, [r3, #28] 8003a1a: 687b ldr r3, [r7, #4] 8003a1c: 681b ldr r3, [r3, #0] 8003a1e: f422 6200 bic.w r2, r2, #2048 ; 0x800 8003a22: 61da str r2, [r3, #28] #endif /* SPI_I2SCFGR_I2SMOD */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8003a24: 687b ldr r3, [r7, #4] 8003a26: 2200 movs r2, #0 8003a28: 655a str r2, [r3, #84] ; 0x54 hspi->State = HAL_SPI_STATE_READY; 8003a2a: 687b ldr r3, [r7, #4] 8003a2c: 2201 movs r2, #1 8003a2e: f883 2051 strb.w r2, [r3, #81] ; 0x51 return HAL_OK; 8003a32: 2300 movs r3, #0 } 8003a34: 4618 mov r0, r3 8003a36: 3708 adds r7, #8 8003a38: 46bd mov sp, r7 8003a3a: bd80 pop {r7, pc} 08003a3c : * @param Size amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8003a3c: b580 push {r7, lr} 8003a3e: b088 sub sp, #32 8003a40: af00 add r7, sp, #0 8003a42: 60f8 str r0, [r7, #12] 8003a44: 60b9 str r1, [r7, #8] 8003a46: 603b str r3, [r7, #0] 8003a48: 4613 mov r3, r2 8003a4a: 80fb strh r3, [r7, #6] uint32_t tickstart; HAL_StatusTypeDef errorcode = HAL_OK; 8003a4c: 2300 movs r3, #0 8003a4e: 77fb strb r3, [r7, #31] /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); /* Process Locked */ __HAL_LOCK(hspi); 8003a50: 68fb ldr r3, [r7, #12] 8003a52: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 8003a56: 2b01 cmp r3, #1 8003a58: d101 bne.n 8003a5e 8003a5a: 2302 movs r3, #2 8003a5c: e126 b.n 8003cac 8003a5e: 68fb ldr r3, [r7, #12] 8003a60: 2201 movs r2, #1 8003a62: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 8003a66: f7fe f85f bl 8001b28 8003a6a: 61b8 str r0, [r7, #24] initial_TxXferCount = Size; 8003a6c: 88fb ldrh r3, [r7, #6] 8003a6e: 82fb strh r3, [r7, #22] if (hspi->State != HAL_SPI_STATE_READY) 8003a70: 68fb ldr r3, [r7, #12] 8003a72: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 8003a76: b2db uxtb r3, r3 8003a78: 2b01 cmp r3, #1 8003a7a: d002 beq.n 8003a82 { errorcode = HAL_BUSY; 8003a7c: 2302 movs r3, #2 8003a7e: 77fb strb r3, [r7, #31] goto error; 8003a80: e10b b.n 8003c9a } if ((pData == NULL) || (Size == 0U)) 8003a82: 68bb ldr r3, [r7, #8] 8003a84: 2b00 cmp r3, #0 8003a86: d002 beq.n 8003a8e 8003a88: 88fb ldrh r3, [r7, #6] 8003a8a: 2b00 cmp r3, #0 8003a8c: d102 bne.n 8003a94 { errorcode = HAL_ERROR; 8003a8e: 2301 movs r3, #1 8003a90: 77fb strb r3, [r7, #31] goto error; 8003a92: e102 b.n 8003c9a } /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_TX; 8003a94: 68fb ldr r3, [r7, #12] 8003a96: 2203 movs r2, #3 8003a98: f883 2051 strb.w r2, [r3, #81] ; 0x51 hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8003a9c: 68fb ldr r3, [r7, #12] 8003a9e: 2200 movs r2, #0 8003aa0: 655a str r2, [r3, #84] ; 0x54 hspi->pTxBuffPtr = (uint8_t *)pData; 8003aa2: 68fb ldr r3, [r7, #12] 8003aa4: 68ba ldr r2, [r7, #8] 8003aa6: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferSize = Size; 8003aa8: 68fb ldr r3, [r7, #12] 8003aaa: 88fa ldrh r2, [r7, #6] 8003aac: 869a strh r2, [r3, #52] ; 0x34 hspi->TxXferCount = Size; 8003aae: 68fb ldr r3, [r7, #12] 8003ab0: 88fa ldrh r2, [r7, #6] 8003ab2: 86da strh r2, [r3, #54] ; 0x36 /*Init field not used in handle to zero */ hspi->pRxBuffPtr = (uint8_t *)NULL; 8003ab4: 68fb ldr r3, [r7, #12] 8003ab6: 2200 movs r2, #0 8003ab8: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferSize = 0U; 8003aba: 68fb ldr r3, [r7, #12] 8003abc: 2200 movs r2, #0 8003abe: 879a strh r2, [r3, #60] ; 0x3c hspi->RxXferCount = 0U; 8003ac0: 68fb ldr r3, [r7, #12] 8003ac2: 2200 movs r2, #0 8003ac4: 87da strh r2, [r3, #62] ; 0x3e hspi->TxISR = NULL; 8003ac6: 68fb ldr r3, [r7, #12] 8003ac8: 2200 movs r2, #0 8003aca: 645a str r2, [r3, #68] ; 0x44 hspi->RxISR = NULL; 8003acc: 68fb ldr r3, [r7, #12] 8003ace: 2200 movs r2, #0 8003ad0: 641a str r2, [r3, #64] ; 0x40 /* Configure communication direction : 1Line */ if (hspi->Init.Direction == SPI_DIRECTION_1LINE) 8003ad2: 68fb ldr r3, [r7, #12] 8003ad4: 689b ldr r3, [r3, #8] 8003ad6: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 8003ada: d10f bne.n 8003afc { /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ __HAL_SPI_DISABLE(hspi); 8003adc: 68fb ldr r3, [r7, #12] 8003ade: 681b ldr r3, [r3, #0] 8003ae0: 681a ldr r2, [r3, #0] 8003ae2: 68fb ldr r3, [r7, #12] 8003ae4: 681b ldr r3, [r3, #0] 8003ae6: f022 0240 bic.w r2, r2, #64 ; 0x40 8003aea: 601a str r2, [r3, #0] SPI_1LINE_TX(hspi); 8003aec: 68fb ldr r3, [r7, #12] 8003aee: 681b ldr r3, [r3, #0] 8003af0: 681a ldr r2, [r3, #0] 8003af2: 68fb ldr r3, [r7, #12] 8003af4: 681b ldr r3, [r3, #0] 8003af6: f442 4280 orr.w r2, r2, #16384 ; 0x4000 8003afa: 601a str r2, [r3, #0] SPI_RESET_CRC(hspi); } #endif /* USE_SPI_CRC */ /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) 8003afc: 68fb ldr r3, [r7, #12] 8003afe: 681b ldr r3, [r3, #0] 8003b00: 681b ldr r3, [r3, #0] 8003b02: f003 0340 and.w r3, r3, #64 ; 0x40 8003b06: 2b40 cmp r3, #64 ; 0x40 8003b08: d007 beq.n 8003b1a { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); 8003b0a: 68fb ldr r3, [r7, #12] 8003b0c: 681b ldr r3, [r3, #0] 8003b0e: 681a ldr r2, [r3, #0] 8003b10: 68fb ldr r3, [r7, #12] 8003b12: 681b ldr r3, [r3, #0] 8003b14: f042 0240 orr.w r2, r2, #64 ; 0x40 8003b18: 601a str r2, [r3, #0] } /* Transmit data in 16 Bit mode */ if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) 8003b1a: 68fb ldr r3, [r7, #12] 8003b1c: 68db ldr r3, [r3, #12] 8003b1e: f5b3 6f00 cmp.w r3, #2048 ; 0x800 8003b22: d14b bne.n 8003bbc { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) 8003b24: 68fb ldr r3, [r7, #12] 8003b26: 685b ldr r3, [r3, #4] 8003b28: 2b00 cmp r3, #0 8003b2a: d002 beq.n 8003b32 8003b2c: 8afb ldrh r3, [r7, #22] 8003b2e: 2b01 cmp r3, #1 8003b30: d13e bne.n 8003bb0 { hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); 8003b32: 68fb ldr r3, [r7, #12] 8003b34: 6b1b ldr r3, [r3, #48] ; 0x30 8003b36: 881a ldrh r2, [r3, #0] 8003b38: 68fb ldr r3, [r7, #12] 8003b3a: 681b ldr r3, [r3, #0] 8003b3c: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 8003b3e: 68fb ldr r3, [r7, #12] 8003b40: 6b1b ldr r3, [r3, #48] ; 0x30 8003b42: 1c9a adds r2, r3, #2 8003b44: 68fb ldr r3, [r7, #12] 8003b46: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 8003b48: 68fb ldr r3, [r7, #12] 8003b4a: 8edb ldrh r3, [r3, #54] ; 0x36 8003b4c: b29b uxth r3, r3 8003b4e: 3b01 subs r3, #1 8003b50: b29a uxth r2, r3 8003b52: 68fb ldr r3, [r7, #12] 8003b54: 86da strh r2, [r3, #54] ; 0x36 } /* Transmit data in 16 Bit mode */ while (hspi->TxXferCount > 0U) 8003b56: e02b b.n 8003bb0 { /* Wait until TXE flag is set to send data */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) 8003b58: 68fb ldr r3, [r7, #12] 8003b5a: 681b ldr r3, [r3, #0] 8003b5c: 689b ldr r3, [r3, #8] 8003b5e: f003 0302 and.w r3, r3, #2 8003b62: 2b02 cmp r3, #2 8003b64: d112 bne.n 8003b8c { hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); 8003b66: 68fb ldr r3, [r7, #12] 8003b68: 6b1b ldr r3, [r3, #48] ; 0x30 8003b6a: 881a ldrh r2, [r3, #0] 8003b6c: 68fb ldr r3, [r7, #12] 8003b6e: 681b ldr r3, [r3, #0] 8003b70: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 8003b72: 68fb ldr r3, [r7, #12] 8003b74: 6b1b ldr r3, [r3, #48] ; 0x30 8003b76: 1c9a adds r2, r3, #2 8003b78: 68fb ldr r3, [r7, #12] 8003b7a: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 8003b7c: 68fb ldr r3, [r7, #12] 8003b7e: 8edb ldrh r3, [r3, #54] ; 0x36 8003b80: b29b uxth r3, r3 8003b82: 3b01 subs r3, #1 8003b84: b29a uxth r2, r3 8003b86: 68fb ldr r3, [r7, #12] 8003b88: 86da strh r2, [r3, #54] ; 0x36 8003b8a: e011 b.n 8003bb0 } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) 8003b8c: f7fd ffcc bl 8001b28 8003b90: 4602 mov r2, r0 8003b92: 69bb ldr r3, [r7, #24] 8003b94: 1ad3 subs r3, r2, r3 8003b96: 683a ldr r2, [r7, #0] 8003b98: 429a cmp r2, r3 8003b9a: d803 bhi.n 8003ba4 8003b9c: 683b ldr r3, [r7, #0] 8003b9e: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8003ba2: d102 bne.n 8003baa 8003ba4: 683b ldr r3, [r7, #0] 8003ba6: 2b00 cmp r3, #0 8003ba8: d102 bne.n 8003bb0 { errorcode = HAL_TIMEOUT; 8003baa: 2303 movs r3, #3 8003bac: 77fb strb r3, [r7, #31] goto error; 8003bae: e074 b.n 8003c9a while (hspi->TxXferCount > 0U) 8003bb0: 68fb ldr r3, [r7, #12] 8003bb2: 8edb ldrh r3, [r3, #54] ; 0x36 8003bb4: b29b uxth r3, r3 8003bb6: 2b00 cmp r3, #0 8003bb8: d1ce bne.n 8003b58 8003bba: e04c b.n 8003c56 } } /* Transmit data in 8 Bit mode */ else { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) 8003bbc: 68fb ldr r3, [r7, #12] 8003bbe: 685b ldr r3, [r3, #4] 8003bc0: 2b00 cmp r3, #0 8003bc2: d002 beq.n 8003bca 8003bc4: 8afb ldrh r3, [r7, #22] 8003bc6: 2b01 cmp r3, #1 8003bc8: d140 bne.n 8003c4c { *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); 8003bca: 68fb ldr r3, [r7, #12] 8003bcc: 6b1a ldr r2, [r3, #48] ; 0x30 8003bce: 68fb ldr r3, [r7, #12] 8003bd0: 681b ldr r3, [r3, #0] 8003bd2: 330c adds r3, #12 8003bd4: 7812 ldrb r2, [r2, #0] 8003bd6: 701a strb r2, [r3, #0] hspi->pTxBuffPtr += sizeof(uint8_t); 8003bd8: 68fb ldr r3, [r7, #12] 8003bda: 6b1b ldr r3, [r3, #48] ; 0x30 8003bdc: 1c5a adds r2, r3, #1 8003bde: 68fb ldr r3, [r7, #12] 8003be0: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 8003be2: 68fb ldr r3, [r7, #12] 8003be4: 8edb ldrh r3, [r3, #54] ; 0x36 8003be6: b29b uxth r3, r3 8003be8: 3b01 subs r3, #1 8003bea: b29a uxth r2, r3 8003bec: 68fb ldr r3, [r7, #12] 8003bee: 86da strh r2, [r3, #54] ; 0x36 } while (hspi->TxXferCount > 0U) 8003bf0: e02c b.n 8003c4c { /* Wait until TXE flag is set to send data */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) 8003bf2: 68fb ldr r3, [r7, #12] 8003bf4: 681b ldr r3, [r3, #0] 8003bf6: 689b ldr r3, [r3, #8] 8003bf8: f003 0302 and.w r3, r3, #2 8003bfc: 2b02 cmp r3, #2 8003bfe: d113 bne.n 8003c28 { *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); 8003c00: 68fb ldr r3, [r7, #12] 8003c02: 6b1a ldr r2, [r3, #48] ; 0x30 8003c04: 68fb ldr r3, [r7, #12] 8003c06: 681b ldr r3, [r3, #0] 8003c08: 330c adds r3, #12 8003c0a: 7812 ldrb r2, [r2, #0] 8003c0c: 701a strb r2, [r3, #0] hspi->pTxBuffPtr += sizeof(uint8_t); 8003c0e: 68fb ldr r3, [r7, #12] 8003c10: 6b1b ldr r3, [r3, #48] ; 0x30 8003c12: 1c5a adds r2, r3, #1 8003c14: 68fb ldr r3, [r7, #12] 8003c16: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 8003c18: 68fb ldr r3, [r7, #12] 8003c1a: 8edb ldrh r3, [r3, #54] ; 0x36 8003c1c: b29b uxth r3, r3 8003c1e: 3b01 subs r3, #1 8003c20: b29a uxth r2, r3 8003c22: 68fb ldr r3, [r7, #12] 8003c24: 86da strh r2, [r3, #54] ; 0x36 8003c26: e011 b.n 8003c4c } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) 8003c28: f7fd ff7e bl 8001b28 8003c2c: 4602 mov r2, r0 8003c2e: 69bb ldr r3, [r7, #24] 8003c30: 1ad3 subs r3, r2, r3 8003c32: 683a ldr r2, [r7, #0] 8003c34: 429a cmp r2, r3 8003c36: d803 bhi.n 8003c40 8003c38: 683b ldr r3, [r7, #0] 8003c3a: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8003c3e: d102 bne.n 8003c46 8003c40: 683b ldr r3, [r7, #0] 8003c42: 2b00 cmp r3, #0 8003c44: d102 bne.n 8003c4c { errorcode = HAL_TIMEOUT; 8003c46: 2303 movs r3, #3 8003c48: 77fb strb r3, [r7, #31] goto error; 8003c4a: e026 b.n 8003c9a while (hspi->TxXferCount > 0U) 8003c4c: 68fb ldr r3, [r7, #12] 8003c4e: 8edb ldrh r3, [r3, #54] ; 0x36 8003c50: b29b uxth r3, r3 8003c52: 2b00 cmp r3, #0 8003c54: d1cd bne.n 8003bf2 SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) 8003c56: 69ba ldr r2, [r7, #24] 8003c58: 6839 ldr r1, [r7, #0] 8003c5a: 68f8 ldr r0, [r7, #12] 8003c5c: f000 fbb8 bl 80043d0 8003c60: 4603 mov r3, r0 8003c62: 2b00 cmp r3, #0 8003c64: d002 beq.n 8003c6c { hspi->ErrorCode = HAL_SPI_ERROR_FLAG; 8003c66: 68fb ldr r3, [r7, #12] 8003c68: 2220 movs r2, #32 8003c6a: 655a str r2, [r3, #84] ; 0x54 } /* Clear overrun flag in 2 Lines communication mode because received is not read */ if (hspi->Init.Direction == SPI_DIRECTION_2LINES) 8003c6c: 68fb ldr r3, [r7, #12] 8003c6e: 689b ldr r3, [r3, #8] 8003c70: 2b00 cmp r3, #0 8003c72: d10a bne.n 8003c8a { __HAL_SPI_CLEAR_OVRFLAG(hspi); 8003c74: 2300 movs r3, #0 8003c76: 613b str r3, [r7, #16] 8003c78: 68fb ldr r3, [r7, #12] 8003c7a: 681b ldr r3, [r3, #0] 8003c7c: 68db ldr r3, [r3, #12] 8003c7e: 613b str r3, [r7, #16] 8003c80: 68fb ldr r3, [r7, #12] 8003c82: 681b ldr r3, [r3, #0] 8003c84: 689b ldr r3, [r3, #8] 8003c86: 613b str r3, [r7, #16] 8003c88: 693b ldr r3, [r7, #16] } if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) 8003c8a: 68fb ldr r3, [r7, #12] 8003c8c: 6d5b ldr r3, [r3, #84] ; 0x54 8003c8e: 2b00 cmp r3, #0 8003c90: d002 beq.n 8003c98 { errorcode = HAL_ERROR; 8003c92: 2301 movs r3, #1 8003c94: 77fb strb r3, [r7, #31] 8003c96: e000 b.n 8003c9a } error: 8003c98: bf00 nop hspi->State = HAL_SPI_STATE_READY; 8003c9a: 68fb ldr r3, [r7, #12] 8003c9c: 2201 movs r2, #1 8003c9e: f883 2051 strb.w r2, [r3, #81] ; 0x51 /* Process Unlocked */ __HAL_UNLOCK(hspi); 8003ca2: 68fb ldr r3, [r7, #12] 8003ca4: 2200 movs r2, #0 8003ca6: f883 2050 strb.w r2, [r3, #80] ; 0x50 return errorcode; 8003caa: 7ffb ldrb r3, [r7, #31] } 8003cac: 4618 mov r0, r3 8003cae: 3720 adds r7, #32 8003cb0: 46bd mov sp, r7 8003cb2: bd80 pop {r7, pc} 08003cb4 : * @param Size amount of data to be received * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8003cb4: b580 push {r7, lr} 8003cb6: b088 sub sp, #32 8003cb8: af02 add r7, sp, #8 8003cba: 60f8 str r0, [r7, #12] 8003cbc: 60b9 str r1, [r7, #8] 8003cbe: 603b str r3, [r7, #0] 8003cc0: 4613 mov r3, r2 8003cc2: 80fb strh r3, [r7, #6] #if (USE_SPI_CRC != 0U) __IO uint32_t tmpreg = 0U; #endif /* USE_SPI_CRC */ uint32_t tickstart; HAL_StatusTypeDef errorcode = HAL_OK; 8003cc4: 2300 movs r3, #0 8003cc6: 75fb strb r3, [r7, #23] if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES)) 8003cc8: 68fb ldr r3, [r7, #12] 8003cca: 685b ldr r3, [r3, #4] 8003ccc: f5b3 7f82 cmp.w r3, #260 ; 0x104 8003cd0: d112 bne.n 8003cf8 8003cd2: 68fb ldr r3, [r7, #12] 8003cd4: 689b ldr r3, [r3, #8] 8003cd6: 2b00 cmp r3, #0 8003cd8: d10e bne.n 8003cf8 { hspi->State = HAL_SPI_STATE_BUSY_RX; 8003cda: 68fb ldr r3, [r7, #12] 8003cdc: 2204 movs r2, #4 8003cde: f883 2051 strb.w r2, [r3, #81] ; 0x51 /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */ return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout); 8003ce2: 88fa ldrh r2, [r7, #6] 8003ce4: 683b ldr r3, [r7, #0] 8003ce6: 9300 str r3, [sp, #0] 8003ce8: 4613 mov r3, r2 8003cea: 68ba ldr r2, [r7, #8] 8003cec: 68b9 ldr r1, [r7, #8] 8003cee: 68f8 ldr r0, [r7, #12] 8003cf0: f000 f8f1 bl 8003ed6 8003cf4: 4603 mov r3, r0 8003cf6: e0ea b.n 8003ece } /* Process Locked */ __HAL_LOCK(hspi); 8003cf8: 68fb ldr r3, [r7, #12] 8003cfa: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 8003cfe: 2b01 cmp r3, #1 8003d00: d101 bne.n 8003d06 8003d02: 2302 movs r3, #2 8003d04: e0e3 b.n 8003ece 8003d06: 68fb ldr r3, [r7, #12] 8003d08: 2201 movs r2, #1 8003d0a: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 8003d0e: f7fd ff0b bl 8001b28 8003d12: 6138 str r0, [r7, #16] if (hspi->State != HAL_SPI_STATE_READY) 8003d14: 68fb ldr r3, [r7, #12] 8003d16: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 8003d1a: b2db uxtb r3, r3 8003d1c: 2b01 cmp r3, #1 8003d1e: d002 beq.n 8003d26 { errorcode = HAL_BUSY; 8003d20: 2302 movs r3, #2 8003d22: 75fb strb r3, [r7, #23] goto error; 8003d24: e0ca b.n 8003ebc } if ((pData == NULL) || (Size == 0U)) 8003d26: 68bb ldr r3, [r7, #8] 8003d28: 2b00 cmp r3, #0 8003d2a: d002 beq.n 8003d32 8003d2c: 88fb ldrh r3, [r7, #6] 8003d2e: 2b00 cmp r3, #0 8003d30: d102 bne.n 8003d38 { errorcode = HAL_ERROR; 8003d32: 2301 movs r3, #1 8003d34: 75fb strb r3, [r7, #23] goto error; 8003d36: e0c1 b.n 8003ebc } /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_RX; 8003d38: 68fb ldr r3, [r7, #12] 8003d3a: 2204 movs r2, #4 8003d3c: f883 2051 strb.w r2, [r3, #81] ; 0x51 hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8003d40: 68fb ldr r3, [r7, #12] 8003d42: 2200 movs r2, #0 8003d44: 655a str r2, [r3, #84] ; 0x54 hspi->pRxBuffPtr = (uint8_t *)pData; 8003d46: 68fb ldr r3, [r7, #12] 8003d48: 68ba ldr r2, [r7, #8] 8003d4a: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferSize = Size; 8003d4c: 68fb ldr r3, [r7, #12] 8003d4e: 88fa ldrh r2, [r7, #6] 8003d50: 879a strh r2, [r3, #60] ; 0x3c hspi->RxXferCount = Size; 8003d52: 68fb ldr r3, [r7, #12] 8003d54: 88fa ldrh r2, [r7, #6] 8003d56: 87da strh r2, [r3, #62] ; 0x3e /*Init field not used in handle to zero */ hspi->pTxBuffPtr = (uint8_t *)NULL; 8003d58: 68fb ldr r3, [r7, #12] 8003d5a: 2200 movs r2, #0 8003d5c: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferSize = 0U; 8003d5e: 68fb ldr r3, [r7, #12] 8003d60: 2200 movs r2, #0 8003d62: 869a strh r2, [r3, #52] ; 0x34 hspi->TxXferCount = 0U; 8003d64: 68fb ldr r3, [r7, #12] 8003d66: 2200 movs r2, #0 8003d68: 86da strh r2, [r3, #54] ; 0x36 hspi->RxISR = NULL; 8003d6a: 68fb ldr r3, [r7, #12] 8003d6c: 2200 movs r2, #0 8003d6e: 641a str r2, [r3, #64] ; 0x40 hspi->TxISR = NULL; 8003d70: 68fb ldr r3, [r7, #12] 8003d72: 2200 movs r2, #0 8003d74: 645a str r2, [r3, #68] ; 0x44 hspi->RxXferCount--; } #endif /* USE_SPI_CRC */ /* Configure communication direction: 1Line */ if (hspi->Init.Direction == SPI_DIRECTION_1LINE) 8003d76: 68fb ldr r3, [r7, #12] 8003d78: 689b ldr r3, [r3, #8] 8003d7a: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 8003d7e: d10f bne.n 8003da0 { /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ __HAL_SPI_DISABLE(hspi); 8003d80: 68fb ldr r3, [r7, #12] 8003d82: 681b ldr r3, [r3, #0] 8003d84: 681a ldr r2, [r3, #0] 8003d86: 68fb ldr r3, [r7, #12] 8003d88: 681b ldr r3, [r3, #0] 8003d8a: f022 0240 bic.w r2, r2, #64 ; 0x40 8003d8e: 601a str r2, [r3, #0] SPI_1LINE_RX(hspi); 8003d90: 68fb ldr r3, [r7, #12] 8003d92: 681b ldr r3, [r3, #0] 8003d94: 681a ldr r2, [r3, #0] 8003d96: 68fb ldr r3, [r7, #12] 8003d98: 681b ldr r3, [r3, #0] 8003d9a: f422 4280 bic.w r2, r2, #16384 ; 0x4000 8003d9e: 601a str r2, [r3, #0] } /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) 8003da0: 68fb ldr r3, [r7, #12] 8003da2: 681b ldr r3, [r3, #0] 8003da4: 681b ldr r3, [r3, #0] 8003da6: f003 0340 and.w r3, r3, #64 ; 0x40 8003daa: 2b40 cmp r3, #64 ; 0x40 8003dac: d007 beq.n 8003dbe { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); 8003dae: 68fb ldr r3, [r7, #12] 8003db0: 681b ldr r3, [r3, #0] 8003db2: 681a ldr r2, [r3, #0] 8003db4: 68fb ldr r3, [r7, #12] 8003db6: 681b ldr r3, [r3, #0] 8003db8: f042 0240 orr.w r2, r2, #64 ; 0x40 8003dbc: 601a str r2, [r3, #0] } /* Receive data in 8 Bit mode */ if (hspi->Init.DataSize == SPI_DATASIZE_8BIT) 8003dbe: 68fb ldr r3, [r7, #12] 8003dc0: 68db ldr r3, [r3, #12] 8003dc2: 2b00 cmp r3, #0 8003dc4: d162 bne.n 8003e8c { /* Transfer loop */ while (hspi->RxXferCount > 0U) 8003dc6: e02e b.n 8003e26 { /* Check the RXNE flag */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) 8003dc8: 68fb ldr r3, [r7, #12] 8003dca: 681b ldr r3, [r3, #0] 8003dcc: 689b ldr r3, [r3, #8] 8003dce: f003 0301 and.w r3, r3, #1 8003dd2: 2b01 cmp r3, #1 8003dd4: d115 bne.n 8003e02 { /* read the received data */ (* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; 8003dd6: 68fb ldr r3, [r7, #12] 8003dd8: 681b ldr r3, [r3, #0] 8003dda: f103 020c add.w r2, r3, #12 8003dde: 68fb ldr r3, [r7, #12] 8003de0: 6b9b ldr r3, [r3, #56] ; 0x38 8003de2: 7812 ldrb r2, [r2, #0] 8003de4: b2d2 uxtb r2, r2 8003de6: 701a strb r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint8_t); 8003de8: 68fb ldr r3, [r7, #12] 8003dea: 6b9b ldr r3, [r3, #56] ; 0x38 8003dec: 1c5a adds r2, r3, #1 8003dee: 68fb ldr r3, [r7, #12] 8003df0: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount--; 8003df2: 68fb ldr r3, [r7, #12] 8003df4: 8fdb ldrh r3, [r3, #62] ; 0x3e 8003df6: b29b uxth r3, r3 8003df8: 3b01 subs r3, #1 8003dfa: b29a uxth r2, r3 8003dfc: 68fb ldr r3, [r7, #12] 8003dfe: 87da strh r2, [r3, #62] ; 0x3e 8003e00: e011 b.n 8003e26 } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) 8003e02: f7fd fe91 bl 8001b28 8003e06: 4602 mov r2, r0 8003e08: 693b ldr r3, [r7, #16] 8003e0a: 1ad3 subs r3, r2, r3 8003e0c: 683a ldr r2, [r7, #0] 8003e0e: 429a cmp r2, r3 8003e10: d803 bhi.n 8003e1a 8003e12: 683b ldr r3, [r7, #0] 8003e14: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8003e18: d102 bne.n 8003e20 8003e1a: 683b ldr r3, [r7, #0] 8003e1c: 2b00 cmp r3, #0 8003e1e: d102 bne.n 8003e26 { errorcode = HAL_TIMEOUT; 8003e20: 2303 movs r3, #3 8003e22: 75fb strb r3, [r7, #23] goto error; 8003e24: e04a b.n 8003ebc while (hspi->RxXferCount > 0U) 8003e26: 68fb ldr r3, [r7, #12] 8003e28: 8fdb ldrh r3, [r3, #62] ; 0x3e 8003e2a: b29b uxth r3, r3 8003e2c: 2b00 cmp r3, #0 8003e2e: d1cb bne.n 8003dc8 8003e30: e031 b.n 8003e96 { /* Transfer loop */ while (hspi->RxXferCount > 0U) { /* Check the RXNE flag */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) 8003e32: 68fb ldr r3, [r7, #12] 8003e34: 681b ldr r3, [r3, #0] 8003e36: 689b ldr r3, [r3, #8] 8003e38: f003 0301 and.w r3, r3, #1 8003e3c: 2b01 cmp r3, #1 8003e3e: d113 bne.n 8003e68 { *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; 8003e40: 68fb ldr r3, [r7, #12] 8003e42: 681b ldr r3, [r3, #0] 8003e44: 68da ldr r2, [r3, #12] 8003e46: 68fb ldr r3, [r7, #12] 8003e48: 6b9b ldr r3, [r3, #56] ; 0x38 8003e4a: b292 uxth r2, r2 8003e4c: 801a strh r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint16_t); 8003e4e: 68fb ldr r3, [r7, #12] 8003e50: 6b9b ldr r3, [r3, #56] ; 0x38 8003e52: 1c9a adds r2, r3, #2 8003e54: 68fb ldr r3, [r7, #12] 8003e56: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount--; 8003e58: 68fb ldr r3, [r7, #12] 8003e5a: 8fdb ldrh r3, [r3, #62] ; 0x3e 8003e5c: b29b uxth r3, r3 8003e5e: 3b01 subs r3, #1 8003e60: b29a uxth r2, r3 8003e62: 68fb ldr r3, [r7, #12] 8003e64: 87da strh r2, [r3, #62] ; 0x3e 8003e66: e011 b.n 8003e8c } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) 8003e68: f7fd fe5e bl 8001b28 8003e6c: 4602 mov r2, r0 8003e6e: 693b ldr r3, [r7, #16] 8003e70: 1ad3 subs r3, r2, r3 8003e72: 683a ldr r2, [r7, #0] 8003e74: 429a cmp r2, r3 8003e76: d803 bhi.n 8003e80 8003e78: 683b ldr r3, [r7, #0] 8003e7a: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 8003e7e: d102 bne.n 8003e86 8003e80: 683b ldr r3, [r7, #0] 8003e82: 2b00 cmp r3, #0 8003e84: d102 bne.n 8003e8c { errorcode = HAL_TIMEOUT; 8003e86: 2303 movs r3, #3 8003e88: 75fb strb r3, [r7, #23] goto error; 8003e8a: e017 b.n 8003ebc while (hspi->RxXferCount > 0U) 8003e8c: 68fb ldr r3, [r7, #12] 8003e8e: 8fdb ldrh r3, [r3, #62] ; 0x3e 8003e90: b29b uxth r3, r3 8003e92: 2b00 cmp r3, #0 8003e94: d1cd bne.n 8003e32 UNUSED(tmpreg); } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK) 8003e96: 693a ldr r2, [r7, #16] 8003e98: 6839 ldr r1, [r7, #0] 8003e9a: 68f8 ldr r0, [r7, #12] 8003e9c: f000 fa46 bl 800432c 8003ea0: 4603 mov r3, r0 8003ea2: 2b00 cmp r3, #0 8003ea4: d002 beq.n 8003eac { hspi->ErrorCode = HAL_SPI_ERROR_FLAG; 8003ea6: 68fb ldr r3, [r7, #12] 8003ea8: 2220 movs r2, #32 8003eaa: 655a str r2, [r3, #84] ; 0x54 __HAL_SPI_CLEAR_CRCERRFLAG(hspi); } } #endif /* USE_SPI_CRC */ if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) 8003eac: 68fb ldr r3, [r7, #12] 8003eae: 6d5b ldr r3, [r3, #84] ; 0x54 8003eb0: 2b00 cmp r3, #0 8003eb2: d002 beq.n 8003eba { errorcode = HAL_ERROR; 8003eb4: 2301 movs r3, #1 8003eb6: 75fb strb r3, [r7, #23] 8003eb8: e000 b.n 8003ebc } error : 8003eba: bf00 nop hspi->State = HAL_SPI_STATE_READY; 8003ebc: 68fb ldr r3, [r7, #12] 8003ebe: 2201 movs r2, #1 8003ec0: f883 2051 strb.w r2, [r3, #81] ; 0x51 __HAL_UNLOCK(hspi); 8003ec4: 68fb ldr r3, [r7, #12] 8003ec6: 2200 movs r2, #0 8003ec8: f883 2050 strb.w r2, [r3, #80] ; 0x50 return errorcode; 8003ecc: 7dfb ldrb r3, [r7, #23] } 8003ece: 4618 mov r0, r3 8003ed0: 3718 adds r7, #24 8003ed2: 46bd mov sp, r7 8003ed4: bd80 pop {r7, pc} 08003ed6 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout) { 8003ed6: b580 push {r7, lr} 8003ed8: b08c sub sp, #48 ; 0x30 8003eda: af00 add r7, sp, #0 8003edc: 60f8 str r0, [r7, #12] 8003ede: 60b9 str r1, [r7, #8] 8003ee0: 607a str r2, [r7, #4] 8003ee2: 807b strh r3, [r7, #2] #if (USE_SPI_CRC != 0U) __IO uint32_t tmpreg = 0U; #endif /* USE_SPI_CRC */ /* Variable used to alternate Rx and Tx during transfer */ uint32_t txallowed = 1U; 8003ee4: 2301 movs r3, #1 8003ee6: 62fb str r3, [r7, #44] ; 0x2c HAL_StatusTypeDef errorcode = HAL_OK; 8003ee8: 2300 movs r3, #0 8003eea: f887 302b strb.w r3, [r7, #43] ; 0x2b /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); /* Process Locked */ __HAL_LOCK(hspi); 8003eee: 68fb ldr r3, [r7, #12] 8003ef0: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 8003ef4: 2b01 cmp r3, #1 8003ef6: d101 bne.n 8003efc 8003ef8: 2302 movs r3, #2 8003efa: e18a b.n 8004212 8003efc: 68fb ldr r3, [r7, #12] 8003efe: 2201 movs r2, #1 8003f00: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 8003f04: f7fd fe10 bl 8001b28 8003f08: 6278 str r0, [r7, #36] ; 0x24 /* Init temporary variables */ tmp_state = hspi->State; 8003f0a: 68fb ldr r3, [r7, #12] 8003f0c: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 8003f10: f887 3023 strb.w r3, [r7, #35] ; 0x23 tmp_mode = hspi->Init.Mode; 8003f14: 68fb ldr r3, [r7, #12] 8003f16: 685b ldr r3, [r3, #4] 8003f18: 61fb str r3, [r7, #28] initial_TxXferCount = Size; 8003f1a: 887b ldrh r3, [r7, #2] 8003f1c: 837b strh r3, [r7, #26] if (!((tmp_state == HAL_SPI_STATE_READY) || \ 8003f1e: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 8003f22: 2b01 cmp r3, #1 8003f24: d00f beq.n 8003f46 8003f26: 69fb ldr r3, [r7, #28] 8003f28: f5b3 7f82 cmp.w r3, #260 ; 0x104 8003f2c: d107 bne.n 8003f3e ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX)))) 8003f2e: 68fb ldr r3, [r7, #12] 8003f30: 689b ldr r3, [r3, #8] 8003f32: 2b00 cmp r3, #0 8003f34: d103 bne.n 8003f3e 8003f36: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 8003f3a: 2b04 cmp r3, #4 8003f3c: d003 beq.n 8003f46 { errorcode = HAL_BUSY; 8003f3e: 2302 movs r3, #2 8003f40: f887 302b strb.w r3, [r7, #43] ; 0x2b goto error; 8003f44: e15b b.n 80041fe } if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) 8003f46: 68bb ldr r3, [r7, #8] 8003f48: 2b00 cmp r3, #0 8003f4a: d005 beq.n 8003f58 8003f4c: 687b ldr r3, [r7, #4] 8003f4e: 2b00 cmp r3, #0 8003f50: d002 beq.n 8003f58 8003f52: 887b ldrh r3, [r7, #2] 8003f54: 2b00 cmp r3, #0 8003f56: d103 bne.n 8003f60 { errorcode = HAL_ERROR; 8003f58: 2301 movs r3, #1 8003f5a: f887 302b strb.w r3, [r7, #43] ; 0x2b goto error; 8003f5e: e14e b.n 80041fe } /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ if (hspi->State != HAL_SPI_STATE_BUSY_RX) 8003f60: 68fb ldr r3, [r7, #12] 8003f62: f893 3051 ldrb.w r3, [r3, #81] ; 0x51 8003f66: b2db uxtb r3, r3 8003f68: 2b04 cmp r3, #4 8003f6a: d003 beq.n 8003f74 { hspi->State = HAL_SPI_STATE_BUSY_TX_RX; 8003f6c: 68fb ldr r3, [r7, #12] 8003f6e: 2205 movs r2, #5 8003f70: f883 2051 strb.w r2, [r3, #81] ; 0x51 } /* Set the transaction information */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8003f74: 68fb ldr r3, [r7, #12] 8003f76: 2200 movs r2, #0 8003f78: 655a str r2, [r3, #84] ; 0x54 hspi->pRxBuffPtr = (uint8_t *)pRxData; 8003f7a: 68fb ldr r3, [r7, #12] 8003f7c: 687a ldr r2, [r7, #4] 8003f7e: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount = Size; 8003f80: 68fb ldr r3, [r7, #12] 8003f82: 887a ldrh r2, [r7, #2] 8003f84: 87da strh r2, [r3, #62] ; 0x3e hspi->RxXferSize = Size; 8003f86: 68fb ldr r3, [r7, #12] 8003f88: 887a ldrh r2, [r7, #2] 8003f8a: 879a strh r2, [r3, #60] ; 0x3c hspi->pTxBuffPtr = (uint8_t *)pTxData; 8003f8c: 68fb ldr r3, [r7, #12] 8003f8e: 68ba ldr r2, [r7, #8] 8003f90: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount = Size; 8003f92: 68fb ldr r3, [r7, #12] 8003f94: 887a ldrh r2, [r7, #2] 8003f96: 86da strh r2, [r3, #54] ; 0x36 hspi->TxXferSize = Size; 8003f98: 68fb ldr r3, [r7, #12] 8003f9a: 887a ldrh r2, [r7, #2] 8003f9c: 869a strh r2, [r3, #52] ; 0x34 /*Init field not used in handle to zero */ hspi->RxISR = NULL; 8003f9e: 68fb ldr r3, [r7, #12] 8003fa0: 2200 movs r2, #0 8003fa2: 641a str r2, [r3, #64] ; 0x40 hspi->TxISR = NULL; 8003fa4: 68fb ldr r3, [r7, #12] 8003fa6: 2200 movs r2, #0 8003fa8: 645a str r2, [r3, #68] ; 0x44 SPI_RESET_CRC(hspi); } #endif /* USE_SPI_CRC */ /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) 8003faa: 68fb ldr r3, [r7, #12] 8003fac: 681b ldr r3, [r3, #0] 8003fae: 681b ldr r3, [r3, #0] 8003fb0: f003 0340 and.w r3, r3, #64 ; 0x40 8003fb4: 2b40 cmp r3, #64 ; 0x40 8003fb6: d007 beq.n 8003fc8 { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); 8003fb8: 68fb ldr r3, [r7, #12] 8003fba: 681b ldr r3, [r3, #0] 8003fbc: 681a ldr r2, [r3, #0] 8003fbe: 68fb ldr r3, [r7, #12] 8003fc0: 681b ldr r3, [r3, #0] 8003fc2: f042 0240 orr.w r2, r2, #64 ; 0x40 8003fc6: 601a str r2, [r3, #0] } /* Transmit and Receive data in 16 Bit mode */ if (hspi->Init.DataSize == SPI_DATASIZE_16BIT) 8003fc8: 68fb ldr r3, [r7, #12] 8003fca: 68db ldr r3, [r3, #12] 8003fcc: f5b3 6f00 cmp.w r3, #2048 ; 0x800 8003fd0: d178 bne.n 80040c4 { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) 8003fd2: 68fb ldr r3, [r7, #12] 8003fd4: 685b ldr r3, [r3, #4] 8003fd6: 2b00 cmp r3, #0 8003fd8: d002 beq.n 8003fe0 8003fda: 8b7b ldrh r3, [r7, #26] 8003fdc: 2b01 cmp r3, #1 8003fde: d166 bne.n 80040ae { hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); 8003fe0: 68fb ldr r3, [r7, #12] 8003fe2: 6b1b ldr r3, [r3, #48] ; 0x30 8003fe4: 881a ldrh r2, [r3, #0] 8003fe6: 68fb ldr r3, [r7, #12] 8003fe8: 681b ldr r3, [r3, #0] 8003fea: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 8003fec: 68fb ldr r3, [r7, #12] 8003fee: 6b1b ldr r3, [r3, #48] ; 0x30 8003ff0: 1c9a adds r2, r3, #2 8003ff2: 68fb ldr r3, [r7, #12] 8003ff4: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 8003ff6: 68fb ldr r3, [r7, #12] 8003ff8: 8edb ldrh r3, [r3, #54] ; 0x36 8003ffa: b29b uxth r3, r3 8003ffc: 3b01 subs r3, #1 8003ffe: b29a uxth r2, r3 8004000: 68fb ldr r3, [r7, #12] 8004002: 86da strh r2, [r3, #54] ; 0x36 } while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) 8004004: e053 b.n 80040ae { /* Check TXE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) 8004006: 68fb ldr r3, [r7, #12] 8004008: 681b ldr r3, [r3, #0] 800400a: 689b ldr r3, [r3, #8] 800400c: f003 0302 and.w r3, r3, #2 8004010: 2b02 cmp r3, #2 8004012: d11b bne.n 800404c 8004014: 68fb ldr r3, [r7, #12] 8004016: 8edb ldrh r3, [r3, #54] ; 0x36 8004018: b29b uxth r3, r3 800401a: 2b00 cmp r3, #0 800401c: d016 beq.n 800404c 800401e: 6afb ldr r3, [r7, #44] ; 0x2c 8004020: 2b01 cmp r3, #1 8004022: d113 bne.n 800404c { hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr); 8004024: 68fb ldr r3, [r7, #12] 8004026: 6b1b ldr r3, [r3, #48] ; 0x30 8004028: 881a ldrh r2, [r3, #0] 800402a: 68fb ldr r3, [r7, #12] 800402c: 681b ldr r3, [r3, #0] 800402e: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 8004030: 68fb ldr r3, [r7, #12] 8004032: 6b1b ldr r3, [r3, #48] ; 0x30 8004034: 1c9a adds r2, r3, #2 8004036: 68fb ldr r3, [r7, #12] 8004038: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 800403a: 68fb ldr r3, [r7, #12] 800403c: 8edb ldrh r3, [r3, #54] ; 0x36 800403e: b29b uxth r3, r3 8004040: 3b01 subs r3, #1 8004042: b29a uxth r2, r3 8004044: 68fb ldr r3, [r7, #12] 8004046: 86da strh r2, [r3, #54] ; 0x36 /* Next Data is a reception (Rx). Tx not allowed */ txallowed = 0U; 8004048: 2300 movs r3, #0 800404a: 62fb str r3, [r7, #44] ; 0x2c } #endif /* USE_SPI_CRC */ } /* Check RXNE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) 800404c: 68fb ldr r3, [r7, #12] 800404e: 681b ldr r3, [r3, #0] 8004050: 689b ldr r3, [r3, #8] 8004052: f003 0301 and.w r3, r3, #1 8004056: 2b01 cmp r3, #1 8004058: d119 bne.n 800408e 800405a: 68fb ldr r3, [r7, #12] 800405c: 8fdb ldrh r3, [r3, #62] ; 0x3e 800405e: b29b uxth r3, r3 8004060: 2b00 cmp r3, #0 8004062: d014 beq.n 800408e { *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; 8004064: 68fb ldr r3, [r7, #12] 8004066: 681b ldr r3, [r3, #0] 8004068: 68da ldr r2, [r3, #12] 800406a: 68fb ldr r3, [r7, #12] 800406c: 6b9b ldr r3, [r3, #56] ; 0x38 800406e: b292 uxth r2, r2 8004070: 801a strh r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint16_t); 8004072: 68fb ldr r3, [r7, #12] 8004074: 6b9b ldr r3, [r3, #56] ; 0x38 8004076: 1c9a adds r2, r3, #2 8004078: 68fb ldr r3, [r7, #12] 800407a: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount--; 800407c: 68fb ldr r3, [r7, #12] 800407e: 8fdb ldrh r3, [r3, #62] ; 0x3e 8004080: b29b uxth r3, r3 8004082: 3b01 subs r3, #1 8004084: b29a uxth r2, r3 8004086: 68fb ldr r3, [r7, #12] 8004088: 87da strh r2, [r3, #62] ; 0x3e /* Next Data is a Transmission (Tx). Tx is allowed */ txallowed = 1U; 800408a: 2301 movs r3, #1 800408c: 62fb str r3, [r7, #44] ; 0x2c } if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) 800408e: f7fd fd4b bl 8001b28 8004092: 4602 mov r2, r0 8004094: 6a7b ldr r3, [r7, #36] ; 0x24 8004096: 1ad3 subs r3, r2, r3 8004098: 6bba ldr r2, [r7, #56] ; 0x38 800409a: 429a cmp r2, r3 800409c: d807 bhi.n 80040ae 800409e: 6bbb ldr r3, [r7, #56] ; 0x38 80040a0: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 80040a4: d003 beq.n 80040ae { errorcode = HAL_TIMEOUT; 80040a6: 2303 movs r3, #3 80040a8: f887 302b strb.w r3, [r7, #43] ; 0x2b goto error; 80040ac: e0a7 b.n 80041fe while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) 80040ae: 68fb ldr r3, [r7, #12] 80040b0: 8edb ldrh r3, [r3, #54] ; 0x36 80040b2: b29b uxth r3, r3 80040b4: 2b00 cmp r3, #0 80040b6: d1a6 bne.n 8004006 80040b8: 68fb ldr r3, [r7, #12] 80040ba: 8fdb ldrh r3, [r3, #62] ; 0x3e 80040bc: b29b uxth r3, r3 80040be: 2b00 cmp r3, #0 80040c0: d1a1 bne.n 8004006 80040c2: e07c b.n 80041be } } /* Transmit and Receive data in 8 Bit mode */ else { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) 80040c4: 68fb ldr r3, [r7, #12] 80040c6: 685b ldr r3, [r3, #4] 80040c8: 2b00 cmp r3, #0 80040ca: d002 beq.n 80040d2 80040cc: 8b7b ldrh r3, [r7, #26] 80040ce: 2b01 cmp r3, #1 80040d0: d16b bne.n 80041aa { *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr); 80040d2: 68fb ldr r3, [r7, #12] 80040d4: 6b1a ldr r2, [r3, #48] ; 0x30 80040d6: 68fb ldr r3, [r7, #12] 80040d8: 681b ldr r3, [r3, #0] 80040da: 330c adds r3, #12 80040dc: 7812 ldrb r2, [r2, #0] 80040de: 701a strb r2, [r3, #0] hspi->pTxBuffPtr += sizeof(uint8_t); 80040e0: 68fb ldr r3, [r7, #12] 80040e2: 6b1b ldr r3, [r3, #48] ; 0x30 80040e4: 1c5a adds r2, r3, #1 80040e6: 68fb ldr r3, [r7, #12] 80040e8: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 80040ea: 68fb ldr r3, [r7, #12] 80040ec: 8edb ldrh r3, [r3, #54] ; 0x36 80040ee: b29b uxth r3, r3 80040f0: 3b01 subs r3, #1 80040f2: b29a uxth r2, r3 80040f4: 68fb ldr r3, [r7, #12] 80040f6: 86da strh r2, [r3, #54] ; 0x36 } while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) 80040f8: e057 b.n 80041aa { /* Check TXE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) 80040fa: 68fb ldr r3, [r7, #12] 80040fc: 681b ldr r3, [r3, #0] 80040fe: 689b ldr r3, [r3, #8] 8004100: f003 0302 and.w r3, r3, #2 8004104: 2b02 cmp r3, #2 8004106: d11c bne.n 8004142 8004108: 68fb ldr r3, [r7, #12] 800410a: 8edb ldrh r3, [r3, #54] ; 0x36 800410c: b29b uxth r3, r3 800410e: 2b00 cmp r3, #0 8004110: d017 beq.n 8004142 8004112: 6afb ldr r3, [r7, #44] ; 0x2c 8004114: 2b01 cmp r3, #1 8004116: d114 bne.n 8004142 { *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr); 8004118: 68fb ldr r3, [r7, #12] 800411a: 6b1a ldr r2, [r3, #48] ; 0x30 800411c: 68fb ldr r3, [r7, #12] 800411e: 681b ldr r3, [r3, #0] 8004120: 330c adds r3, #12 8004122: 7812 ldrb r2, [r2, #0] 8004124: 701a strb r2, [r3, #0] hspi->pTxBuffPtr++; 8004126: 68fb ldr r3, [r7, #12] 8004128: 6b1b ldr r3, [r3, #48] ; 0x30 800412a: 1c5a adds r2, r3, #1 800412c: 68fb ldr r3, [r7, #12] 800412e: 631a str r2, [r3, #48] ; 0x30 hspi->TxXferCount--; 8004130: 68fb ldr r3, [r7, #12] 8004132: 8edb ldrh r3, [r3, #54] ; 0x36 8004134: b29b uxth r3, r3 8004136: 3b01 subs r3, #1 8004138: b29a uxth r2, r3 800413a: 68fb ldr r3, [r7, #12] 800413c: 86da strh r2, [r3, #54] ; 0x36 /* Next Data is a reception (Rx). Tx not allowed */ txallowed = 0U; 800413e: 2300 movs r3, #0 8004140: 62fb str r3, [r7, #44] ; 0x2c } #endif /* USE_SPI_CRC */ } /* Wait until RXNE flag is reset */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) 8004142: 68fb ldr r3, [r7, #12] 8004144: 681b ldr r3, [r3, #0] 8004146: 689b ldr r3, [r3, #8] 8004148: f003 0301 and.w r3, r3, #1 800414c: 2b01 cmp r3, #1 800414e: d119 bne.n 8004184 8004150: 68fb ldr r3, [r7, #12] 8004152: 8fdb ldrh r3, [r3, #62] ; 0x3e 8004154: b29b uxth r3, r3 8004156: 2b00 cmp r3, #0 8004158: d014 beq.n 8004184 { (*(uint8_t *)hspi->pRxBuffPtr) = hspi->Instance->DR; 800415a: 68fb ldr r3, [r7, #12] 800415c: 681b ldr r3, [r3, #0] 800415e: 68da ldr r2, [r3, #12] 8004160: 68fb ldr r3, [r7, #12] 8004162: 6b9b ldr r3, [r3, #56] ; 0x38 8004164: b2d2 uxtb r2, r2 8004166: 701a strb r2, [r3, #0] hspi->pRxBuffPtr++; 8004168: 68fb ldr r3, [r7, #12] 800416a: 6b9b ldr r3, [r3, #56] ; 0x38 800416c: 1c5a adds r2, r3, #1 800416e: 68fb ldr r3, [r7, #12] 8004170: 639a str r2, [r3, #56] ; 0x38 hspi->RxXferCount--; 8004172: 68fb ldr r3, [r7, #12] 8004174: 8fdb ldrh r3, [r3, #62] ; 0x3e 8004176: b29b uxth r3, r3 8004178: 3b01 subs r3, #1 800417a: b29a uxth r2, r3 800417c: 68fb ldr r3, [r7, #12] 800417e: 87da strh r2, [r3, #62] ; 0x3e /* Next Data is a Transmission (Tx). Tx is allowed */ txallowed = 1U; 8004180: 2301 movs r3, #1 8004182: 62fb str r3, [r7, #44] ; 0x2c } if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U)) 8004184: f7fd fcd0 bl 8001b28 8004188: 4602 mov r2, r0 800418a: 6a7b ldr r3, [r7, #36] ; 0x24 800418c: 1ad3 subs r3, r2, r3 800418e: 6bba ldr r2, [r7, #56] ; 0x38 8004190: 429a cmp r2, r3 8004192: d803 bhi.n 800419c 8004194: 6bbb ldr r3, [r7, #56] ; 0x38 8004196: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 800419a: d102 bne.n 80041a2 800419c: 6bbb ldr r3, [r7, #56] ; 0x38 800419e: 2b00 cmp r3, #0 80041a0: d103 bne.n 80041aa { errorcode = HAL_TIMEOUT; 80041a2: 2303 movs r3, #3 80041a4: f887 302b strb.w r3, [r7, #43] ; 0x2b goto error; 80041a8: e029 b.n 80041fe while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) 80041aa: 68fb ldr r3, [r7, #12] 80041ac: 8edb ldrh r3, [r3, #54] ; 0x36 80041ae: b29b uxth r3, r3 80041b0: 2b00 cmp r3, #0 80041b2: d1a2 bne.n 80040fa 80041b4: 68fb ldr r3, [r7, #12] 80041b6: 8fdb ldrh r3, [r3, #62] ; 0x3e 80041b8: b29b uxth r3, r3 80041ba: 2b00 cmp r3, #0 80041bc: d19d bne.n 80040fa } } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) 80041be: 6a7a ldr r2, [r7, #36] ; 0x24 80041c0: 6bb9 ldr r1, [r7, #56] ; 0x38 80041c2: 68f8 ldr r0, [r7, #12] 80041c4: f000 f904 bl 80043d0 80041c8: 4603 mov r3, r0 80041ca: 2b00 cmp r3, #0 80041cc: d006 beq.n 80041dc { errorcode = HAL_ERROR; 80041ce: 2301 movs r3, #1 80041d0: f887 302b strb.w r3, [r7, #43] ; 0x2b hspi->ErrorCode = HAL_SPI_ERROR_FLAG; 80041d4: 68fb ldr r3, [r7, #12] 80041d6: 2220 movs r2, #32 80041d8: 655a str r2, [r3, #84] ; 0x54 goto error; 80041da: e010 b.n 80041fe } /* Clear overrun flag in 2 Lines communication mode because received is not read */ if (hspi->Init.Direction == SPI_DIRECTION_2LINES) 80041dc: 68fb ldr r3, [r7, #12] 80041de: 689b ldr r3, [r3, #8] 80041e0: 2b00 cmp r3, #0 80041e2: d10b bne.n 80041fc { __HAL_SPI_CLEAR_OVRFLAG(hspi); 80041e4: 2300 movs r3, #0 80041e6: 617b str r3, [r7, #20] 80041e8: 68fb ldr r3, [r7, #12] 80041ea: 681b ldr r3, [r3, #0] 80041ec: 68db ldr r3, [r3, #12] 80041ee: 617b str r3, [r7, #20] 80041f0: 68fb ldr r3, [r7, #12] 80041f2: 681b ldr r3, [r3, #0] 80041f4: 689b ldr r3, [r3, #8] 80041f6: 617b str r3, [r7, #20] 80041f8: 697b ldr r3, [r7, #20] 80041fa: e000 b.n 80041fe } error : 80041fc: bf00 nop hspi->State = HAL_SPI_STATE_READY; 80041fe: 68fb ldr r3, [r7, #12] 8004200: 2201 movs r2, #1 8004202: f883 2051 strb.w r2, [r3, #81] ; 0x51 __HAL_UNLOCK(hspi); 8004206: 68fb ldr r3, [r7, #12] 8004208: 2200 movs r2, #0 800420a: f883 2050 strb.w r2, [r3, #80] ; 0x50 return errorcode; 800420e: f897 302b ldrb.w r3, [r7, #43] ; 0x2b } 8004212: 4618 mov r0, r3 8004214: 3730 adds r7, #48 ; 0x30 8004216: 46bd mov sp, r7 8004218: bd80 pop {r7, pc} ... 0800421c : * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State, uint32_t Timeout, uint32_t Tickstart) { 800421c: b580 push {r7, lr} 800421e: b088 sub sp, #32 8004220: af00 add r7, sp, #0 8004222: 60f8 str r0, [r7, #12] 8004224: 60b9 str r1, [r7, #8] 8004226: 603b str r3, [r7, #0] 8004228: 4613 mov r3, r2 800422a: 71fb strb r3, [r7, #7] __IO uint32_t count; uint32_t tmp_timeout; uint32_t tmp_tickstart; /* Adjust Timeout value in case of end of transfer */ tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); 800422c: f7fd fc7c bl 8001b28 8004230: 4602 mov r2, r0 8004232: 6abb ldr r3, [r7, #40] ; 0x28 8004234: 1a9b subs r3, r3, r2 8004236: 683a ldr r2, [r7, #0] 8004238: 4413 add r3, r2 800423a: 61fb str r3, [r7, #28] tmp_tickstart = HAL_GetTick(); 800423c: f7fd fc74 bl 8001b28 8004240: 61b8 str r0, [r7, #24] /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U); 8004242: 4b39 ldr r3, [pc, #228] ; (8004328 ) 8004244: 681b ldr r3, [r3, #0] 8004246: 015b lsls r3, r3, #5 8004248: 0d1b lsrs r3, r3, #20 800424a: 69fa ldr r2, [r7, #28] 800424c: fb02 f303 mul.w r3, r2, r3 8004250: 617b str r3, [r7, #20] while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) 8004252: e054 b.n 80042fe { if (Timeout != HAL_MAX_DELAY) 8004254: 683b ldr r3, [r7, #0] 8004256: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff 800425a: d050 beq.n 80042fe { if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) 800425c: f7fd fc64 bl 8001b28 8004260: 4602 mov r2, r0 8004262: 69bb ldr r3, [r7, #24] 8004264: 1ad3 subs r3, r2, r3 8004266: 69fa ldr r2, [r7, #28] 8004268: 429a cmp r2, r3 800426a: d902 bls.n 8004272 800426c: 69fb ldr r3, [r7, #28] 800426e: 2b00 cmp r3, #0 8004270: d13d bne.n 80042ee /* Disable the SPI and reset the CRC: the CRC value should be cleared on both master and slave sides in order to resynchronize the master and slave for their respective CRC calculation */ /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); 8004272: 68fb ldr r3, [r7, #12] 8004274: 681b ldr r3, [r3, #0] 8004276: 685a ldr r2, [r3, #4] 8004278: 68fb ldr r3, [r7, #12] 800427a: 681b ldr r3, [r3, #0] 800427c: f022 02e0 bic.w r2, r2, #224 ; 0xe0 8004280: 605a str r2, [r3, #4] if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) 8004282: 68fb ldr r3, [r7, #12] 8004284: 685b ldr r3, [r3, #4] 8004286: f5b3 7f82 cmp.w r3, #260 ; 0x104 800428a: d111 bne.n 80042b0 800428c: 68fb ldr r3, [r7, #12] 800428e: 689b ldr r3, [r3, #8] 8004290: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 8004294: d004 beq.n 80042a0 || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) 8004296: 68fb ldr r3, [r7, #12] 8004298: 689b ldr r3, [r3, #8] 800429a: f5b3 6f80 cmp.w r3, #1024 ; 0x400 800429e: d107 bne.n 80042b0 { /* Disable SPI peripheral */ __HAL_SPI_DISABLE(hspi); 80042a0: 68fb ldr r3, [r7, #12] 80042a2: 681b ldr r3, [r3, #0] 80042a4: 681a ldr r2, [r3, #0] 80042a6: 68fb ldr r3, [r7, #12] 80042a8: 681b ldr r3, [r3, #0] 80042aa: f022 0240 bic.w r2, r2, #64 ; 0x40 80042ae: 601a str r2, [r3, #0] } /* Reset CRC Calculation */ if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) 80042b0: 68fb ldr r3, [r7, #12] 80042b2: 6a9b ldr r3, [r3, #40] ; 0x28 80042b4: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 80042b8: d10f bne.n 80042da { SPI_RESET_CRC(hspi); 80042ba: 68fb ldr r3, [r7, #12] 80042bc: 681b ldr r3, [r3, #0] 80042be: 681a ldr r2, [r3, #0] 80042c0: 68fb ldr r3, [r7, #12] 80042c2: 681b ldr r3, [r3, #0] 80042c4: f422 5200 bic.w r2, r2, #8192 ; 0x2000 80042c8: 601a str r2, [r3, #0] 80042ca: 68fb ldr r3, [r7, #12] 80042cc: 681b ldr r3, [r3, #0] 80042ce: 681a ldr r2, [r3, #0] 80042d0: 68fb ldr r3, [r7, #12] 80042d2: 681b ldr r3, [r3, #0] 80042d4: f442 5200 orr.w r2, r2, #8192 ; 0x2000 80042d8: 601a str r2, [r3, #0] } hspi->State = HAL_SPI_STATE_READY; 80042da: 68fb ldr r3, [r7, #12] 80042dc: 2201 movs r2, #1 80042de: f883 2051 strb.w r2, [r3, #81] ; 0x51 /* Process Unlocked */ __HAL_UNLOCK(hspi); 80042e2: 68fb ldr r3, [r7, #12] 80042e4: 2200 movs r2, #0 80042e6: f883 2050 strb.w r2, [r3, #80] ; 0x50 return HAL_TIMEOUT; 80042ea: 2303 movs r3, #3 80042ec: e017 b.n 800431e } /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */ if(count == 0U) 80042ee: 697b ldr r3, [r7, #20] 80042f0: 2b00 cmp r3, #0 80042f2: d101 bne.n 80042f8 { tmp_timeout = 0U; 80042f4: 2300 movs r3, #0 80042f6: 61fb str r3, [r7, #28] } count--; 80042f8: 697b ldr r3, [r7, #20] 80042fa: 3b01 subs r3, #1 80042fc: 617b str r3, [r7, #20] while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) 80042fe: 68fb ldr r3, [r7, #12] 8004300: 681b ldr r3, [r3, #0] 8004302: 689a ldr r2, [r3, #8] 8004304: 68bb ldr r3, [r7, #8] 8004306: 4013 ands r3, r2 8004308: 68ba ldr r2, [r7, #8] 800430a: 429a cmp r2, r3 800430c: bf0c ite eq 800430e: 2301 moveq r3, #1 8004310: 2300 movne r3, #0 8004312: b2db uxtb r3, r3 8004314: 461a mov r2, r3 8004316: 79fb ldrb r3, [r7, #7] 8004318: 429a cmp r2, r3 800431a: d19b bne.n 8004254 } } return HAL_OK; 800431c: 2300 movs r3, #0 } 800431e: 4618 mov r0, r3 8004320: 3720 adds r7, #32 8004322: 46bd mov sp, r7 8004324: bd80 pop {r7, pc} 8004326: bf00 nop 8004328: 20000000 .word 0x20000000 0800432c : * @param Timeout Timeout duration * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { 800432c: b580 push {r7, lr} 800432e: b086 sub sp, #24 8004330: af02 add r7, sp, #8 8004332: 60f8 str r0, [r7, #12] 8004334: 60b9 str r1, [r7, #8] 8004336: 607a str r2, [r7, #4] if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) 8004338: 68fb ldr r3, [r7, #12] 800433a: 685b ldr r3, [r3, #4] 800433c: f5b3 7f82 cmp.w r3, #260 ; 0x104 8004340: d111 bne.n 8004366 8004342: 68fb ldr r3, [r7, #12] 8004344: 689b ldr r3, [r3, #8] 8004346: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 800434a: d004 beq.n 8004356 || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) 800434c: 68fb ldr r3, [r7, #12] 800434e: 689b ldr r3, [r3, #8] 8004350: f5b3 6f80 cmp.w r3, #1024 ; 0x400 8004354: d107 bne.n 8004366 { /* Disable SPI peripheral */ __HAL_SPI_DISABLE(hspi); 8004356: 68fb ldr r3, [r7, #12] 8004358: 681b ldr r3, [r3, #0] 800435a: 681a ldr r2, [r3, #0] 800435c: 68fb ldr r3, [r7, #12] 800435e: 681b ldr r3, [r3, #0] 8004360: f022 0240 bic.w r2, r2, #64 ; 0x40 8004364: 601a str r2, [r3, #0] } if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)) 8004366: 68fb ldr r3, [r7, #12] 8004368: 685b ldr r3, [r3, #4] 800436a: f5b3 7f82 cmp.w r3, #260 ; 0x104 800436e: d117 bne.n 80043a0 8004370: 68fb ldr r3, [r7, #12] 8004372: 689b ldr r3, [r3, #8] 8004374: f5b3 6f80 cmp.w r3, #1024 ; 0x400 8004378: d112 bne.n 80043a0 { /* Wait the RXNE reset */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout, Tickstart) != HAL_OK) 800437a: 687b ldr r3, [r7, #4] 800437c: 9300 str r3, [sp, #0] 800437e: 68bb ldr r3, [r7, #8] 8004380: 2200 movs r2, #0 8004382: 2101 movs r1, #1 8004384: 68f8 ldr r0, [r7, #12] 8004386: f7ff ff49 bl 800421c 800438a: 4603 mov r3, r0 800438c: 2b00 cmp r3, #0 800438e: d01a beq.n 80043c6 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); 8004390: 68fb ldr r3, [r7, #12] 8004392: 6d5b ldr r3, [r3, #84] ; 0x54 8004394: f043 0220 orr.w r2, r3, #32 8004398: 68fb ldr r3, [r7, #12] 800439a: 655a str r2, [r3, #84] ; 0x54 return HAL_TIMEOUT; 800439c: 2303 movs r3, #3 800439e: e013 b.n 80043c8 } } else { /* Control the BSY flag */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) 80043a0: 687b ldr r3, [r7, #4] 80043a2: 9300 str r3, [sp, #0] 80043a4: 68bb ldr r3, [r7, #8] 80043a6: 2200 movs r2, #0 80043a8: 2180 movs r1, #128 ; 0x80 80043aa: 68f8 ldr r0, [r7, #12] 80043ac: f7ff ff36 bl 800421c 80043b0: 4603 mov r3, r0 80043b2: 2b00 cmp r3, #0 80043b4: d007 beq.n 80043c6 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); 80043b6: 68fb ldr r3, [r7, #12] 80043b8: 6d5b ldr r3, [r3, #84] ; 0x54 80043ba: f043 0220 orr.w r2, r3, #32 80043be: 68fb ldr r3, [r7, #12] 80043c0: 655a str r2, [r3, #84] ; 0x54 return HAL_TIMEOUT; 80043c2: 2303 movs r3, #3 80043c4: e000 b.n 80043c8 } } return HAL_OK; 80043c6: 2300 movs r3, #0 } 80043c8: 4618 mov r0, r3 80043ca: 3710 adds r7, #16 80043cc: 46bd mov sp, r7 80043ce: bd80 pop {r7, pc} 080043d0 : * @param Timeout Timeout duration * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { 80043d0: b580 push {r7, lr} 80043d2: b086 sub sp, #24 80043d4: af02 add r7, sp, #8 80043d6: 60f8 str r0, [r7, #12] 80043d8: 60b9 str r1, [r7, #8] 80043da: 607a str r2, [r7, #4] /* Control the BSY flag */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) 80043dc: 687b ldr r3, [r7, #4] 80043de: 9300 str r3, [sp, #0] 80043e0: 68bb ldr r3, [r7, #8] 80043e2: 2200 movs r2, #0 80043e4: 2180 movs r1, #128 ; 0x80 80043e6: 68f8 ldr r0, [r7, #12] 80043e8: f7ff ff18 bl 800421c 80043ec: 4603 mov r3, r0 80043ee: 2b00 cmp r3, #0 80043f0: d007 beq.n 8004402 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); 80043f2: 68fb ldr r3, [r7, #12] 80043f4: 6d5b ldr r3, [r3, #84] ; 0x54 80043f6: f043 0220 orr.w r2, r3, #32 80043fa: 68fb ldr r3, [r7, #12] 80043fc: 655a str r2, [r3, #84] ; 0x54 return HAL_TIMEOUT; 80043fe: 2303 movs r3, #3 8004400: e000 b.n 8004404 } return HAL_OK; 8004402: 2300 movs r3, #0 } 8004404: 4618 mov r0, r3 8004406: 3710 adds r7, #16 8004408: 46bd mov sp, r7 800440a: bd80 pop {r7, pc} 0800440c : * @param ExtTiming Pointer to SRAM extended mode timing structure * @retval HAL status */ HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming) { 800440c: b580 push {r7, lr} 800440e: b084 sub sp, #16 8004410: af00 add r7, sp, #0 8004412: 60f8 str r0, [r7, #12] 8004414: 60b9 str r1, [r7, #8] 8004416: 607a str r2, [r7, #4] /* Check the SRAM handle parameter */ if ((hsram == NULL) || (hsram->Init.BurstAccessMode == FSMC_BURST_ACCESS_MODE_ENABLE)) 8004418: 68fb ldr r3, [r7, #12] 800441a: 2b00 cmp r3, #0 800441c: d004 beq.n 8004428 800441e: 68fb ldr r3, [r7, #12] 8004420: 699b ldr r3, [r3, #24] 8004422: f5b3 7f80 cmp.w r3, #256 ; 0x100 8004426: d101 bne.n 800442c { return HAL_ERROR; 8004428: 2301 movs r3, #1 800442a: e038 b.n 800449e } if (hsram->State == HAL_SRAM_STATE_RESET) 800442c: 68fb ldr r3, [r7, #12] 800442e: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 8004432: b2db uxtb r3, r3 8004434: 2b00 cmp r3, #0 8004436: d106 bne.n 8004446 { /* Allocate lock resource and initialize it */ hsram->Lock = HAL_UNLOCKED; 8004438: 68fb ldr r3, [r7, #12] 800443a: 2200 movs r2, #0 800443c: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Init the low level hardware */ hsram->MspInitCallback(hsram); #else /* Initialize the low level hardware (MSP) */ HAL_SRAM_MspInit(hsram); 8004440: 68f8 ldr r0, [r7, #12] 8004442: f7fd f9f1 bl 8001828 #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ } /* Initialize SRAM control Interface */ (void)FSMC_NORSRAM_Init(hsram->Instance, &(hsram->Init)); 8004446: 68fb ldr r3, [r7, #12] 8004448: 681a ldr r2, [r3, #0] 800444a: 68fb ldr r3, [r7, #12] 800444c: 3308 adds r3, #8 800444e: 4619 mov r1, r3 8004450: 4610 mov r0, r2 8004452: f000 fac9 bl 80049e8 /* Initialize SRAM timing Interface */ (void)FSMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank); 8004456: 68fb ldr r3, [r7, #12] 8004458: 6818 ldr r0, [r3, #0] 800445a: 68fb ldr r3, [r7, #12] 800445c: 689b ldr r3, [r3, #8] 800445e: 461a mov r2, r3 8004460: 68b9 ldr r1, [r7, #8] 8004462: f000 fb2b bl 8004abc /* Initialize SRAM extended mode timing Interface */ (void)FSMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank, 8004466: 68fb ldr r3, [r7, #12] 8004468: 6858 ldr r0, [r3, #4] 800446a: 68fb ldr r3, [r7, #12] 800446c: 689a ldr r2, [r3, #8] 800446e: 68fb ldr r3, [r7, #12] 8004470: 6b1b ldr r3, [r3, #48] ; 0x30 8004472: 6879 ldr r1, [r7, #4] 8004474: f000 fb56 bl 8004b24 hsram->Init.ExtendedMode); /* Enable the NORSRAM device */ __FSMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank); 8004478: 68fb ldr r3, [r7, #12] 800447a: 681b ldr r3, [r3, #0] 800447c: 68fa ldr r2, [r7, #12] 800447e: 6892 ldr r2, [r2, #8] 8004480: f853 1022 ldr.w r1, [r3, r2, lsl #2] 8004484: 68fb ldr r3, [r7, #12] 8004486: 681b ldr r3, [r3, #0] 8004488: 68fa ldr r2, [r7, #12] 800448a: 6892 ldr r2, [r2, #8] 800448c: f041 0101 orr.w r1, r1, #1 8004490: f843 1022 str.w r1, [r3, r2, lsl #2] /* Initialize the SRAM controller state */ hsram->State = HAL_SRAM_STATE_READY; 8004494: 68fb ldr r3, [r7, #12] 8004496: 2201 movs r2, #1 8004498: f883 2041 strb.w r2, [r3, #65] ; 0x41 return HAL_OK; 800449c: 2300 movs r3, #0 } 800449e: 4618 mov r0, r3 80044a0: 3710 adds r7, #16 80044a2: 46bd mov sp, r7 80044a4: bd80 pop {r7, pc} 080044a6 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 80044a6: b580 push {r7, lr} 80044a8: b082 sub sp, #8 80044aa: af00 add r7, sp, #0 80044ac: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 80044ae: 687b ldr r3, [r7, #4] 80044b0: 2b00 cmp r3, #0 80044b2: d101 bne.n 80044b8 { return HAL_ERROR; 80044b4: 2301 movs r3, #1 80044b6: e041 b.n 800453c assert_param(IS_TIM_INSTANCE(htim->Instance)); assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 80044b8: 687b ldr r3, [r7, #4] 80044ba: f893 303d ldrb.w r3, [r3, #61] ; 0x3d 80044be: b2db uxtb r3, r3 80044c0: 2b00 cmp r3, #0 80044c2: d106 bne.n 80044d2 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 80044c4: 687b ldr r3, [r7, #4] 80044c6: 2200 movs r2, #0 80044c8: f883 203c strb.w r2, [r3, #60] ; 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 80044cc: 6878 ldr r0, [r7, #4] 80044ce: f7fd f931 bl 8001734 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 80044d2: 687b ldr r3, [r7, #4] 80044d4: 2202 movs r2, #2 80044d6: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 80044da: 687b ldr r3, [r7, #4] 80044dc: 681a ldr r2, [r3, #0] 80044de: 687b ldr r3, [r7, #4] 80044e0: 3304 adds r3, #4 80044e2: 4619 mov r1, r3 80044e4: 4610 mov r0, r2 80044e6: f000 f987 bl 80047f8 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 80044ea: 687b ldr r3, [r7, #4] 80044ec: 2201 movs r2, #1 80044ee: f883 2046 strb.w r2, [r3, #70] ; 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 80044f2: 687b ldr r3, [r7, #4] 80044f4: 2201 movs r2, #1 80044f6: f883 203e strb.w r2, [r3, #62] ; 0x3e 80044fa: 687b ldr r3, [r7, #4] 80044fc: 2201 movs r2, #1 80044fe: f883 203f strb.w r2, [r3, #63] ; 0x3f 8004502: 687b ldr r3, [r7, #4] 8004504: 2201 movs r2, #1 8004506: f883 2040 strb.w r2, [r3, #64] ; 0x40 800450a: 687b ldr r3, [r7, #4] 800450c: 2201 movs r2, #1 800450e: f883 2041 strb.w r2, [r3, #65] ; 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8004512: 687b ldr r3, [r7, #4] 8004514: 2201 movs r2, #1 8004516: f883 2042 strb.w r2, [r3, #66] ; 0x42 800451a: 687b ldr r3, [r7, #4] 800451c: 2201 movs r2, #1 800451e: f883 2043 strb.w r2, [r3, #67] ; 0x43 8004522: 687b ldr r3, [r7, #4] 8004524: 2201 movs r2, #1 8004526: f883 2044 strb.w r2, [r3, #68] ; 0x44 800452a: 687b ldr r3, [r7, #4] 800452c: 2201 movs r2, #1 800452e: f883 2045 strb.w r2, [r3, #69] ; 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8004532: 687b ldr r3, [r7, #4] 8004534: 2201 movs r2, #1 8004536: f883 203d strb.w r2, [r3, #61] ; 0x3d return HAL_OK; 800453a: 2300 movs r3, #0 } 800453c: 4618 mov r0, r3 800453e: 3708 adds r7, #8 8004540: 46bd mov sp, r7 8004542: bd80 pop {r7, pc} 08004544 : * @brief Stops the TIM Base generation in interrupt mode. * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim) { 8004544: b480 push {r7} 8004546: b083 sub sp, #12 8004548: af00 add r7, sp, #0 800454a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Disable the TIM Update interrupt */ __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE); 800454c: 687b ldr r3, [r7, #4] 800454e: 681b ldr r3, [r3, #0] 8004550: 68da ldr r2, [r3, #12] 8004552: 687b ldr r3, [r7, #4] 8004554: 681b ldr r3, [r3, #0] 8004556: f022 0201 bic.w r2, r2, #1 800455a: 60da str r2, [r3, #12] /* Disable the Peripheral */ __HAL_TIM_DISABLE(htim); 800455c: 687b ldr r3, [r7, #4] 800455e: 681b ldr r3, [r3, #0] 8004560: 6a1a ldr r2, [r3, #32] 8004562: f241 1311 movw r3, #4369 ; 0x1111 8004566: 4013 ands r3, r2 8004568: 2b00 cmp r3, #0 800456a: d10f bne.n 800458c 800456c: 687b ldr r3, [r7, #4] 800456e: 681b ldr r3, [r3, #0] 8004570: 6a1a ldr r2, [r3, #32] 8004572: f240 4344 movw r3, #1092 ; 0x444 8004576: 4013 ands r3, r2 8004578: 2b00 cmp r3, #0 800457a: d107 bne.n 800458c 800457c: 687b ldr r3, [r7, #4] 800457e: 681b ldr r3, [r3, #0] 8004580: 681a ldr r2, [r3, #0] 8004582: 687b ldr r3, [r7, #4] 8004584: 681b ldr r3, [r3, #0] 8004586: f022 0201 bic.w r2, r2, #1 800458a: 601a str r2, [r3, #0] /* Set the TIM state */ htim->State = HAL_TIM_STATE_READY; 800458c: 687b ldr r3, [r7, #4] 800458e: 2201 movs r2, #1 8004590: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Return function status */ return HAL_OK; 8004594: 2300 movs r3, #0 } 8004596: 4618 mov r0, r3 8004598: 370c adds r7, #12 800459a: 46bd mov sp, r7 800459c: bc80 pop {r7} 800459e: 4770 bx lr 080045a0 : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { 80045a0: b580 push {r7, lr} 80045a2: b082 sub sp, #8 80045a4: af00 add r7, sp, #0 80045a6: 6078 str r0, [r7, #4] /* Capture compare 1 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 80045a8: 687b ldr r3, [r7, #4] 80045aa: 681b ldr r3, [r3, #0] 80045ac: 691b ldr r3, [r3, #16] 80045ae: f003 0302 and.w r3, r3, #2 80045b2: 2b02 cmp r3, #2 80045b4: d122 bne.n 80045fc { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) 80045b6: 687b ldr r3, [r7, #4] 80045b8: 681b ldr r3, [r3, #0] 80045ba: 68db ldr r3, [r3, #12] 80045bc: f003 0302 and.w r3, r3, #2 80045c0: 2b02 cmp r3, #2 80045c2: d11b bne.n 80045fc { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 80045c4: 687b ldr r3, [r7, #4] 80045c6: 681b ldr r3, [r3, #0] 80045c8: f06f 0202 mvn.w r2, #2 80045cc: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80045ce: 687b ldr r3, [r7, #4] 80045d0: 2201 movs r2, #1 80045d2: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 80045d4: 687b ldr r3, [r7, #4] 80045d6: 681b ldr r3, [r3, #0] 80045d8: 699b ldr r3, [r3, #24] 80045da: f003 0303 and.w r3, r3, #3 80045de: 2b00 cmp r3, #0 80045e0: d003 beq.n 80045ea { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 80045e2: 6878 ldr r0, [r7, #4] 80045e4: f000 f8ed bl 80047c2 80045e8: e005 b.n 80045f6 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 80045ea: 6878 ldr r0, [r7, #4] 80045ec: f000 f8e0 bl 80047b0 HAL_TIM_PWM_PulseFinishedCallback(htim); 80045f0: 6878 ldr r0, [r7, #4] 80045f2: f000 f8ef bl 80047d4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80045f6: 687b ldr r3, [r7, #4] 80045f8: 2200 movs r2, #0 80045fa: 771a strb r2, [r3, #28] } } } /* Capture compare 2 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 80045fc: 687b ldr r3, [r7, #4] 80045fe: 681b ldr r3, [r3, #0] 8004600: 691b ldr r3, [r3, #16] 8004602: f003 0304 and.w r3, r3, #4 8004606: 2b04 cmp r3, #4 8004608: d122 bne.n 8004650 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) 800460a: 687b ldr r3, [r7, #4] 800460c: 681b ldr r3, [r3, #0] 800460e: 68db ldr r3, [r3, #12] 8004610: f003 0304 and.w r3, r3, #4 8004614: 2b04 cmp r3, #4 8004616: d11b bne.n 8004650 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 8004618: 687b ldr r3, [r7, #4] 800461a: 681b ldr r3, [r3, #0] 800461c: f06f 0204 mvn.w r2, #4 8004620: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8004622: 687b ldr r3, [r7, #4] 8004624: 2202 movs r2, #2 8004626: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8004628: 687b ldr r3, [r7, #4] 800462a: 681b ldr r3, [r3, #0] 800462c: 699b ldr r3, [r3, #24] 800462e: f403 7340 and.w r3, r3, #768 ; 0x300 8004632: 2b00 cmp r3, #0 8004634: d003 beq.n 800463e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 8004636: 6878 ldr r0, [r7, #4] 8004638: f000 f8c3 bl 80047c2 800463c: e005 b.n 800464a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 800463e: 6878 ldr r0, [r7, #4] 8004640: f000 f8b6 bl 80047b0 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004644: 6878 ldr r0, [r7, #4] 8004646: f000 f8c5 bl 80047d4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800464a: 687b ldr r3, [r7, #4] 800464c: 2200 movs r2, #0 800464e: 771a strb r2, [r3, #28] } } /* Capture compare 3 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 8004650: 687b ldr r3, [r7, #4] 8004652: 681b ldr r3, [r3, #0] 8004654: 691b ldr r3, [r3, #16] 8004656: f003 0308 and.w r3, r3, #8 800465a: 2b08 cmp r3, #8 800465c: d122 bne.n 80046a4 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) 800465e: 687b ldr r3, [r7, #4] 8004660: 681b ldr r3, [r3, #0] 8004662: 68db ldr r3, [r3, #12] 8004664: f003 0308 and.w r3, r3, #8 8004668: 2b08 cmp r3, #8 800466a: d11b bne.n 80046a4 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 800466c: 687b ldr r3, [r7, #4] 800466e: 681b ldr r3, [r3, #0] 8004670: f06f 0208 mvn.w r2, #8 8004674: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8004676: 687b ldr r3, [r7, #4] 8004678: 2204 movs r2, #4 800467a: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 800467c: 687b ldr r3, [r7, #4] 800467e: 681b ldr r3, [r3, #0] 8004680: 69db ldr r3, [r3, #28] 8004682: f003 0303 and.w r3, r3, #3 8004686: 2b00 cmp r3, #0 8004688: d003 beq.n 8004692 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 800468a: 6878 ldr r0, [r7, #4] 800468c: f000 f899 bl 80047c2 8004690: e005 b.n 800469e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 8004692: 6878 ldr r0, [r7, #4] 8004694: f000 f88c bl 80047b0 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004698: 6878 ldr r0, [r7, #4] 800469a: f000 f89b bl 80047d4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800469e: 687b ldr r3, [r7, #4] 80046a0: 2200 movs r2, #0 80046a2: 771a strb r2, [r3, #28] } } /* Capture compare 4 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 80046a4: 687b ldr r3, [r7, #4] 80046a6: 681b ldr r3, [r3, #0] 80046a8: 691b ldr r3, [r3, #16] 80046aa: f003 0310 and.w r3, r3, #16 80046ae: 2b10 cmp r3, #16 80046b0: d122 bne.n 80046f8 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) 80046b2: 687b ldr r3, [r7, #4] 80046b4: 681b ldr r3, [r3, #0] 80046b6: 68db ldr r3, [r3, #12] 80046b8: f003 0310 and.w r3, r3, #16 80046bc: 2b10 cmp r3, #16 80046be: d11b bne.n 80046f8 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 80046c0: 687b ldr r3, [r7, #4] 80046c2: 681b ldr r3, [r3, #0] 80046c4: f06f 0210 mvn.w r2, #16 80046c8: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 80046ca: 687b ldr r3, [r7, #4] 80046cc: 2208 movs r2, #8 80046ce: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 80046d0: 687b ldr r3, [r7, #4] 80046d2: 681b ldr r3, [r3, #0] 80046d4: 69db ldr r3, [r3, #28] 80046d6: f403 7340 and.w r3, r3, #768 ; 0x300 80046da: 2b00 cmp r3, #0 80046dc: d003 beq.n 80046e6 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 80046de: 6878 ldr r0, [r7, #4] 80046e0: f000 f86f bl 80047c2 80046e4: e005 b.n 80046f2 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 80046e6: 6878 ldr r0, [r7, #4] 80046e8: f000 f862 bl 80047b0 HAL_TIM_PWM_PulseFinishedCallback(htim); 80046ec: 6878 ldr r0, [r7, #4] 80046ee: f000 f871 bl 80047d4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80046f2: 687b ldr r3, [r7, #4] 80046f4: 2200 movs r2, #0 80046f6: 771a strb r2, [r3, #28] } } /* TIM Update event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 80046f8: 687b ldr r3, [r7, #4] 80046fa: 681b ldr r3, [r3, #0] 80046fc: 691b ldr r3, [r3, #16] 80046fe: f003 0301 and.w r3, r3, #1 8004702: 2b01 cmp r3, #1 8004704: d10e bne.n 8004724 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) 8004706: 687b ldr r3, [r7, #4] 8004708: 681b ldr r3, [r3, #0] 800470a: 68db ldr r3, [r3, #12] 800470c: f003 0301 and.w r3, r3, #1 8004710: 2b01 cmp r3, #1 8004712: d107 bne.n 8004724 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 8004714: 687b ldr r3, [r7, #4] 8004716: 681b ldr r3, [r3, #0] 8004718: f06f 0201 mvn.w r2, #1 800471c: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); 800471e: 6878 ldr r0, [r7, #4] 8004720: f002 fbdc bl 8006edc #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 8004724: 687b ldr r3, [r7, #4] 8004726: 681b ldr r3, [r3, #0] 8004728: 691b ldr r3, [r3, #16] 800472a: f003 0380 and.w r3, r3, #128 ; 0x80 800472e: 2b80 cmp r3, #128 ; 0x80 8004730: d10e bne.n 8004750 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) 8004732: 687b ldr r3, [r7, #4] 8004734: 681b ldr r3, [r3, #0] 8004736: 68db ldr r3, [r3, #12] 8004738: f003 0380 and.w r3, r3, #128 ; 0x80 800473c: 2b80 cmp r3, #128 ; 0x80 800473e: d107 bne.n 8004750 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 8004740: 687b ldr r3, [r7, #4] 8004742: 681b ldr r3, [r3, #0] 8004744: f06f 0280 mvn.w r2, #128 ; 0x80 8004748: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); 800474a: 6878 ldr r0, [r7, #4] 800474c: f000 f943 bl 80049d6 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 8004750: 687b ldr r3, [r7, #4] 8004752: 681b ldr r3, [r3, #0] 8004754: 691b ldr r3, [r3, #16] 8004756: f003 0340 and.w r3, r3, #64 ; 0x40 800475a: 2b40 cmp r3, #64 ; 0x40 800475c: d10e bne.n 800477c { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) 800475e: 687b ldr r3, [r7, #4] 8004760: 681b ldr r3, [r3, #0] 8004762: 68db ldr r3, [r3, #12] 8004764: f003 0340 and.w r3, r3, #64 ; 0x40 8004768: 2b40 cmp r3, #64 ; 0x40 800476a: d107 bne.n 800477c { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 800476c: 687b ldr r3, [r7, #4] 800476e: 681b ldr r3, [r3, #0] 8004770: f06f 0240 mvn.w r2, #64 ; 0x40 8004774: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); 8004776: 6878 ldr r0, [r7, #4] 8004778: f000 f835 bl 80047e6 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 800477c: 687b ldr r3, [r7, #4] 800477e: 681b ldr r3, [r3, #0] 8004780: 691b ldr r3, [r3, #16] 8004782: f003 0320 and.w r3, r3, #32 8004786: 2b20 cmp r3, #32 8004788: d10e bne.n 80047a8 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) 800478a: 687b ldr r3, [r7, #4] 800478c: 681b ldr r3, [r3, #0] 800478e: 68db ldr r3, [r3, #12] 8004790: f003 0320 and.w r3, r3, #32 8004794: 2b20 cmp r3, #32 8004796: d107 bne.n 80047a8 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8004798: 687b ldr r3, [r7, #4] 800479a: 681b ldr r3, [r3, #0] 800479c: f06f 0220 mvn.w r2, #32 80047a0: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); 80047a2: 6878 ldr r0, [r7, #4] 80047a4: f000 f90e bl 80049c4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } 80047a8: bf00 nop 80047aa: 3708 adds r7, #8 80047ac: 46bd mov sp, r7 80047ae: bd80 pop {r7, pc} 080047b0 : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { 80047b0: b480 push {r7} 80047b2: b083 sub sp, #12 80047b4: af00 add r7, sp, #0 80047b6: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } 80047b8: bf00 nop 80047ba: 370c adds r7, #12 80047bc: 46bd mov sp, r7 80047be: bc80 pop {r7} 80047c0: 4770 bx lr 080047c2 : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { 80047c2: b480 push {r7} 80047c4: b083 sub sp, #12 80047c6: af00 add r7, sp, #0 80047c8: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } 80047ca: bf00 nop 80047cc: 370c adds r7, #12 80047ce: 46bd mov sp, r7 80047d0: bc80 pop {r7} 80047d2: 4770 bx lr 080047d4 : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { 80047d4: b480 push {r7} 80047d6: b083 sub sp, #12 80047d8: af00 add r7, sp, #0 80047da: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } 80047dc: bf00 nop 80047de: 370c adds r7, #12 80047e0: 46bd mov sp, r7 80047e2: bc80 pop {r7} 80047e4: 4770 bx lr 080047e6 : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { 80047e6: b480 push {r7} 80047e8: b083 sub sp, #12 80047ea: af00 add r7, sp, #0 80047ec: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } 80047ee: bf00 nop 80047f0: 370c adds r7, #12 80047f2: 46bd mov sp, r7 80047f4: bc80 pop {r7} 80047f6: 4770 bx lr 080047f8 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) { 80047f8: b480 push {r7} 80047fa: b085 sub sp, #20 80047fc: af00 add r7, sp, #0 80047fe: 6078 str r0, [r7, #4] 8004800: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 8004802: 687b ldr r3, [r7, #4] 8004804: 681b ldr r3, [r3, #0] 8004806: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8004808: 687b ldr r3, [r7, #4] 800480a: 4a33 ldr r2, [pc, #204] ; (80048d8 ) 800480c: 4293 cmp r3, r2 800480e: d013 beq.n 8004838 8004810: 687b ldr r3, [r7, #4] 8004812: 4a32 ldr r2, [pc, #200] ; (80048dc ) 8004814: 4293 cmp r3, r2 8004816: d00f beq.n 8004838 8004818: 687b ldr r3, [r7, #4] 800481a: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 800481e: d00b beq.n 8004838 8004820: 687b ldr r3, [r7, #4] 8004822: 4a2f ldr r2, [pc, #188] ; (80048e0 ) 8004824: 4293 cmp r3, r2 8004826: d007 beq.n 8004838 8004828: 687b ldr r3, [r7, #4] 800482a: 4a2e ldr r2, [pc, #184] ; (80048e4 ) 800482c: 4293 cmp r3, r2 800482e: d003 beq.n 8004838 8004830: 687b ldr r3, [r7, #4] 8004832: 4a2d ldr r2, [pc, #180] ; (80048e8 ) 8004834: 4293 cmp r3, r2 8004836: d108 bne.n 800484a { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8004838: 68fb ldr r3, [r7, #12] 800483a: f023 0370 bic.w r3, r3, #112 ; 0x70 800483e: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 8004840: 683b ldr r3, [r7, #0] 8004842: 685b ldr r3, [r3, #4] 8004844: 68fa ldr r2, [r7, #12] 8004846: 4313 orrs r3, r2 8004848: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 800484a: 687b ldr r3, [r7, #4] 800484c: 4a22 ldr r2, [pc, #136] ; (80048d8 ) 800484e: 4293 cmp r3, r2 8004850: d013 beq.n 800487a 8004852: 687b ldr r3, [r7, #4] 8004854: 4a21 ldr r2, [pc, #132] ; (80048dc ) 8004856: 4293 cmp r3, r2 8004858: d00f beq.n 800487a 800485a: 687b ldr r3, [r7, #4] 800485c: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 8004860: d00b beq.n 800487a 8004862: 687b ldr r3, [r7, #4] 8004864: 4a1e ldr r2, [pc, #120] ; (80048e0 ) 8004866: 4293 cmp r3, r2 8004868: d007 beq.n 800487a 800486a: 687b ldr r3, [r7, #4] 800486c: 4a1d ldr r2, [pc, #116] ; (80048e4 ) 800486e: 4293 cmp r3, r2 8004870: d003 beq.n 800487a 8004872: 687b ldr r3, [r7, #4] 8004874: 4a1c ldr r2, [pc, #112] ; (80048e8 ) 8004876: 4293 cmp r3, r2 8004878: d108 bne.n 800488c { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 800487a: 68fb ldr r3, [r7, #12] 800487c: f423 7340 bic.w r3, r3, #768 ; 0x300 8004880: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 8004882: 683b ldr r3, [r7, #0] 8004884: 68db ldr r3, [r3, #12] 8004886: 68fa ldr r2, [r7, #12] 8004888: 4313 orrs r3, r2 800488a: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 800488c: 68fb ldr r3, [r7, #12] 800488e: f023 0280 bic.w r2, r3, #128 ; 0x80 8004892: 683b ldr r3, [r7, #0] 8004894: 695b ldr r3, [r3, #20] 8004896: 4313 orrs r3, r2 8004898: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; 800489a: 687b ldr r3, [r7, #4] 800489c: 68fa ldr r2, [r7, #12] 800489e: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 80048a0: 683b ldr r3, [r7, #0] 80048a2: 689a ldr r2, [r3, #8] 80048a4: 687b ldr r3, [r7, #4] 80048a6: 62da str r2, [r3, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 80048a8: 683b ldr r3, [r7, #0] 80048aa: 681a ldr r2, [r3, #0] 80048ac: 687b ldr r3, [r7, #4] 80048ae: 629a str r2, [r3, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 80048b0: 687b ldr r3, [r7, #4] 80048b2: 4a09 ldr r2, [pc, #36] ; (80048d8 ) 80048b4: 4293 cmp r3, r2 80048b6: d003 beq.n 80048c0 80048b8: 687b ldr r3, [r7, #4] 80048ba: 4a08 ldr r2, [pc, #32] ; (80048dc ) 80048bc: 4293 cmp r3, r2 80048be: d103 bne.n 80048c8 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 80048c0: 683b ldr r3, [r7, #0] 80048c2: 691a ldr r2, [r3, #16] 80048c4: 687b ldr r3, [r7, #4] 80048c6: 631a str r2, [r3, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 80048c8: 687b ldr r3, [r7, #4] 80048ca: 2201 movs r2, #1 80048cc: 615a str r2, [r3, #20] } 80048ce: bf00 nop 80048d0: 3714 adds r7, #20 80048d2: 46bd mov sp, r7 80048d4: bc80 pop {r7} 80048d6: 4770 bx lr 80048d8: 40012c00 .word 0x40012c00 80048dc: 40013400 .word 0x40013400 80048e0: 40000400 .word 0x40000400 80048e4: 40000800 .word 0x40000800 80048e8: 40000c00 .word 0x40000c00 080048ec : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig) { 80048ec: b480 push {r7} 80048ee: b085 sub sp, #20 80048f0: af00 add r7, sp, #0 80048f2: 6078 str r0, [r7, #4] 80048f4: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 80048f6: 687b ldr r3, [r7, #4] 80048f8: f893 303c ldrb.w r3, [r3, #60] ; 0x3c 80048fc: 2b01 cmp r3, #1 80048fe: d101 bne.n 8004904 8004900: 2302 movs r3, #2 8004902: e050 b.n 80049a6 8004904: 687b ldr r3, [r7, #4] 8004906: 2201 movs r2, #1 8004908: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 800490c: 687b ldr r3, [r7, #4] 800490e: 2202 movs r2, #2 8004910: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 8004914: 687b ldr r3, [r7, #4] 8004916: 681b ldr r3, [r3, #0] 8004918: 685b ldr r3, [r3, #4] 800491a: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 800491c: 687b ldr r3, [r7, #4] 800491e: 681b ldr r3, [r3, #0] 8004920: 689b ldr r3, [r3, #8] 8004922: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 8004924: 68fb ldr r3, [r7, #12] 8004926: f023 0370 bic.w r3, r3, #112 ; 0x70 800492a: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 800492c: 683b ldr r3, [r7, #0] 800492e: 681b ldr r3, [r3, #0] 8004930: 68fa ldr r2, [r7, #12] 8004932: 4313 orrs r3, r2 8004934: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 8004936: 687b ldr r3, [r7, #4] 8004938: 681b ldr r3, [r3, #0] 800493a: 68fa ldr r2, [r7, #12] 800493c: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 800493e: 687b ldr r3, [r7, #4] 8004940: 681b ldr r3, [r3, #0] 8004942: 4a1b ldr r2, [pc, #108] ; (80049b0 ) 8004944: 4293 cmp r3, r2 8004946: d018 beq.n 800497a 8004948: 687b ldr r3, [r7, #4] 800494a: 681b ldr r3, [r3, #0] 800494c: 4a19 ldr r2, [pc, #100] ; (80049b4 ) 800494e: 4293 cmp r3, r2 8004950: d013 beq.n 800497a 8004952: 687b ldr r3, [r7, #4] 8004954: 681b ldr r3, [r3, #0] 8004956: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 800495a: d00e beq.n 800497a 800495c: 687b ldr r3, [r7, #4] 800495e: 681b ldr r3, [r3, #0] 8004960: 4a15 ldr r2, [pc, #84] ; (80049b8 ) 8004962: 4293 cmp r3, r2 8004964: d009 beq.n 800497a 8004966: 687b ldr r3, [r7, #4] 8004968: 681b ldr r3, [r3, #0] 800496a: 4a14 ldr r2, [pc, #80] ; (80049bc ) 800496c: 4293 cmp r3, r2 800496e: d004 beq.n 800497a 8004970: 687b ldr r3, [r7, #4] 8004972: 681b ldr r3, [r3, #0] 8004974: 4a12 ldr r2, [pc, #72] ; (80049c0 ) 8004976: 4293 cmp r3, r2 8004978: d10c bne.n 8004994 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 800497a: 68bb ldr r3, [r7, #8] 800497c: f023 0380 bic.w r3, r3, #128 ; 0x80 8004980: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 8004982: 683b ldr r3, [r7, #0] 8004984: 685b ldr r3, [r3, #4] 8004986: 68ba ldr r2, [r7, #8] 8004988: 4313 orrs r3, r2 800498a: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 800498c: 687b ldr r3, [r7, #4] 800498e: 681b ldr r3, [r3, #0] 8004990: 68ba ldr r2, [r7, #8] 8004992: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 8004994: 687b ldr r3, [r7, #4] 8004996: 2201 movs r2, #1 8004998: f883 203d strb.w r2, [r3, #61] ; 0x3d __HAL_UNLOCK(htim); 800499c: 687b ldr r3, [r7, #4] 800499e: 2200 movs r2, #0 80049a0: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; 80049a4: 2300 movs r3, #0 } 80049a6: 4618 mov r0, r3 80049a8: 3714 adds r7, #20 80049aa: 46bd mov sp, r7 80049ac: bc80 pop {r7} 80049ae: 4770 bx lr 80049b0: 40012c00 .word 0x40012c00 80049b4: 40013400 .word 0x40013400 80049b8: 40000400 .word 0x40000400 80049bc: 40000800 .word 0x40000800 80049c0: 40000c00 .word 0x40000c00 080049c4 : * @brief Hall commutation changed callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { 80049c4: b480 push {r7} 80049c6: b083 sub sp, #12 80049c8: af00 add r7, sp, #0 80049ca: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_CommutCallback could be implemented in the user file */ } 80049cc: bf00 nop 80049ce: 370c adds r7, #12 80049d0: 46bd mov sp, r7 80049d2: bc80 pop {r7} 80049d4: 4770 bx lr 080049d6 : * @brief Hall Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 80049d6: b480 push {r7} 80049d8: b083 sub sp, #12 80049da: af00 add r7, sp, #0 80049dc: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_BreakCallback could be implemented in the user file */ } 80049de: bf00 nop 80049e0: 370c adds r7, #12 80049e2: 46bd mov sp, r7 80049e4: bc80 pop {r7} 80049e6: 4770 bx lr 080049e8 : * @param Init Pointer to NORSRAM Initialization structure * @retval HAL status */ HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_InitTypeDef *Init) { 80049e8: b480 push {r7} 80049ea: b087 sub sp, #28 80049ec: af00 add r7, sp, #0 80049ee: 6078 str r0, [r7, #4] 80049f0: 6039 str r1, [r7, #0] assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait)); assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst)); assert_param(IS_FSMC_PAGESIZE(Init->PageSize)); /* Disable NORSRAM Device */ __FSMC_NORSRAM_DISABLE(Device, Init->NSBank); 80049f2: 683b ldr r3, [r7, #0] 80049f4: 681a ldr r2, [r3, #0] 80049f6: 687b ldr r3, [r7, #4] 80049f8: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80049fc: 683a ldr r2, [r7, #0] 80049fe: 6812 ldr r2, [r2, #0] 8004a00: f023 0101 bic.w r1, r3, #1 8004a04: 687b ldr r3, [r7, #4] 8004a06: f843 1022 str.w r1, [r3, r2, lsl #2] /* Set NORSRAM device control parameters */ if (Init->MemoryType == FSMC_MEMORY_TYPE_NOR) 8004a0a: 683b ldr r3, [r7, #0] 8004a0c: 689b ldr r3, [r3, #8] 8004a0e: 2b08 cmp r3, #8 8004a10: d102 bne.n 8004a18 { flashaccess = FSMC_NORSRAM_FLASH_ACCESS_ENABLE; 8004a12: 2340 movs r3, #64 ; 0x40 8004a14: 617b str r3, [r7, #20] 8004a16: e001 b.n 8004a1c } else { flashaccess = FSMC_NORSRAM_FLASH_ACCESS_DISABLE; 8004a18: 2300 movs r3, #0 8004a1a: 617b str r3, [r7, #20] } btcr_reg = (flashaccess | \ Init->DataAddressMux | \ 8004a1c: 683b ldr r3, [r7, #0] 8004a1e: 685a ldr r2, [r3, #4] btcr_reg = (flashaccess | \ 8004a20: 697b ldr r3, [r7, #20] 8004a22: 431a orrs r2, r3 Init->MemoryType | \ 8004a24: 683b ldr r3, [r7, #0] 8004a26: 689b ldr r3, [r3, #8] Init->DataAddressMux | \ 8004a28: 431a orrs r2, r3 Init->MemoryDataWidth | \ 8004a2a: 683b ldr r3, [r7, #0] 8004a2c: 68db ldr r3, [r3, #12] Init->MemoryType | \ 8004a2e: 431a orrs r2, r3 Init->BurstAccessMode | \ 8004a30: 683b ldr r3, [r7, #0] 8004a32: 691b ldr r3, [r3, #16] Init->MemoryDataWidth | \ 8004a34: 431a orrs r2, r3 Init->WaitSignalPolarity | \ 8004a36: 683b ldr r3, [r7, #0] 8004a38: 695b ldr r3, [r3, #20] Init->BurstAccessMode | \ 8004a3a: 431a orrs r2, r3 Init->WaitSignalActive | \ 8004a3c: 683b ldr r3, [r7, #0] 8004a3e: 69db ldr r3, [r3, #28] Init->WaitSignalPolarity | \ 8004a40: 431a orrs r2, r3 Init->WriteOperation | \ 8004a42: 683b ldr r3, [r7, #0] 8004a44: 6a1b ldr r3, [r3, #32] Init->WaitSignalActive | \ 8004a46: 431a orrs r2, r3 Init->WaitSignal | \ 8004a48: 683b ldr r3, [r7, #0] 8004a4a: 6a5b ldr r3, [r3, #36] ; 0x24 Init->WriteOperation | \ 8004a4c: 431a orrs r2, r3 Init->ExtendedMode | \ 8004a4e: 683b ldr r3, [r7, #0] 8004a50: 6a9b ldr r3, [r3, #40] ; 0x28 Init->WaitSignal | \ 8004a52: 431a orrs r2, r3 Init->AsynchronousWait | \ 8004a54: 683b ldr r3, [r7, #0] 8004a56: 6adb ldr r3, [r3, #44] ; 0x2c Init->ExtendedMode | \ 8004a58: 431a orrs r2, r3 Init->WriteBurst); 8004a5a: 683b ldr r3, [r7, #0] 8004a5c: 6b1b ldr r3, [r3, #48] ; 0x30 btcr_reg = (flashaccess | \ 8004a5e: 4313 orrs r3, r2 8004a60: 613b str r3, [r7, #16] btcr_reg |= Init->WrapMode; 8004a62: 683b ldr r3, [r7, #0] 8004a64: 699b ldr r3, [r3, #24] 8004a66: 693a ldr r2, [r7, #16] 8004a68: 4313 orrs r3, r2 8004a6a: 613b str r3, [r7, #16] btcr_reg |= Init->PageSize; 8004a6c: 683b ldr r3, [r7, #0] 8004a6e: 6b5b ldr r3, [r3, #52] ; 0x34 8004a70: 693a ldr r2, [r7, #16] 8004a72: 4313 orrs r3, r2 8004a74: 613b str r3, [r7, #16] mask = (FSMC_BCRx_MBKEN | 8004a76: 4b10 ldr r3, [pc, #64] ; (8004ab8 ) 8004a78: 60fb str r3, [r7, #12] FSMC_BCRx_WAITEN | FSMC_BCRx_EXTMOD | FSMC_BCRx_ASYNCWAIT | FSMC_BCRx_CBURSTRW); mask |= FSMC_BCRx_WRAPMOD; 8004a7a: 68fb ldr r3, [r7, #12] 8004a7c: f443 6380 orr.w r3, r3, #1024 ; 0x400 8004a80: 60fb str r3, [r7, #12] mask |= 0x00070000U; /* CPSIZE to be defined in CMSIS file */ 8004a82: 68fb ldr r3, [r7, #12] 8004a84: f443 23e0 orr.w r3, r3, #458752 ; 0x70000 8004a88: 60fb str r3, [r7, #12] MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); 8004a8a: 683b ldr r3, [r7, #0] 8004a8c: 681a ldr r2, [r3, #0] 8004a8e: 687b ldr r3, [r7, #4] 8004a90: f853 2022 ldr.w r2, [r3, r2, lsl #2] 8004a94: 68fb ldr r3, [r7, #12] 8004a96: 43db mvns r3, r3 8004a98: ea02 0103 and.w r1, r2, r3 8004a9c: 683b ldr r3, [r7, #0] 8004a9e: 681a ldr r2, [r3, #0] 8004aa0: 693b ldr r3, [r7, #16] 8004aa2: 4319 orrs r1, r3 8004aa4: 687b ldr r3, [r7, #4] 8004aa6: f843 1022 str.w r1, [r3, r2, lsl #2] return HAL_OK; 8004aaa: 2300 movs r3, #0 } 8004aac: 4618 mov r0, r3 8004aae: 371c adds r7, #28 8004ab0: 46bd mov sp, r7 8004ab2: bc80 pop {r7} 8004ab4: 4770 bx lr 8004ab6: bf00 nop 8004ab8: 0008fb7f .word 0x0008fb7f 08004abc : * @param Bank NORSRAM bank number * @retval HAL status */ HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank) { 8004abc: b480 push {r7} 8004abe: b085 sub sp, #20 8004ac0: af00 add r7, sp, #0 8004ac2: 60f8 str r0, [r7, #12] 8004ac4: 60b9 str r1, [r7, #8] 8004ac6: 607a str r2, [r7, #4] assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency)); assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode)); assert_param(IS_FSMC_NORSRAM_BANK(Bank)); /* Set FSMC_NORSRAM device timing parameters */ MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime | 8004ac8: 687b ldr r3, [r7, #4] 8004aca: 1c5a adds r2, r3, #1 8004acc: 68fb ldr r3, [r7, #12] 8004ace: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8004ad2: f003 4140 and.w r1, r3, #3221225472 ; 0xc0000000 8004ad6: 68bb ldr r3, [r7, #8] 8004ad8: 681a ldr r2, [r3, #0] 8004ada: 68bb ldr r3, [r7, #8] 8004adc: 685b ldr r3, [r3, #4] 8004ade: 011b lsls r3, r3, #4 8004ae0: 431a orrs r2, r3 8004ae2: 68bb ldr r3, [r7, #8] 8004ae4: 689b ldr r3, [r3, #8] 8004ae6: 021b lsls r3, r3, #8 8004ae8: 431a orrs r2, r3 8004aea: 68bb ldr r3, [r7, #8] 8004aec: 68db ldr r3, [r3, #12] 8004aee: 041b lsls r3, r3, #16 8004af0: 431a orrs r2, r3 8004af2: 68bb ldr r3, [r7, #8] 8004af4: 691b ldr r3, [r3, #16] 8004af6: 3b01 subs r3, #1 8004af8: 051b lsls r3, r3, #20 8004afa: 431a orrs r2, r3 8004afc: 68bb ldr r3, [r7, #8] 8004afe: 695b ldr r3, [r3, #20] 8004b00: 3b02 subs r3, #2 8004b02: 061b lsls r3, r3, #24 8004b04: 431a orrs r2, r3 8004b06: 68bb ldr r3, [r7, #8] 8004b08: 699b ldr r3, [r3, #24] 8004b0a: 4313 orrs r3, r2 8004b0c: 687a ldr r2, [r7, #4] 8004b0e: 3201 adds r2, #1 8004b10: 4319 orrs r1, r3 8004b12: 68fb ldr r3, [r7, #12] 8004b14: f843 1022 str.w r1, [r3, r2, lsl #2] ((Timing->BusTurnAroundDuration) << FSMC_BTRx_BUSTURN_Pos) | (((Timing->CLKDivision) - 1U) << FSMC_BTRx_CLKDIV_Pos) | (((Timing->DataLatency) - 2U) << FSMC_BTRx_DATLAT_Pos) | (Timing->AccessMode))); return HAL_OK; 8004b18: 2300 movs r3, #0 } 8004b1a: 4618 mov r0, r3 8004b1c: 3714 adds r7, #20 8004b1e: 46bd mov sp, r7 8004b20: bc80 pop {r7} 8004b22: 4770 bx lr 08004b24 : * @retval HAL status */ HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode) { 8004b24: b480 push {r7} 8004b26: b085 sub sp, #20 8004b28: af00 add r7, sp, #0 8004b2a: 60f8 str r0, [r7, #12] 8004b2c: 60b9 str r1, [r7, #8] 8004b2e: 607a str r2, [r7, #4] 8004b30: 603b str r3, [r7, #0] /* Check the parameters */ assert_param(IS_FSMC_EXTENDED_MODE(ExtendedMode)); /* Set NORSRAM device timing register for write configuration, if extended mode is used */ if (ExtendedMode == FSMC_EXTENDED_MODE_ENABLE) 8004b32: 683b ldr r3, [r7, #0] 8004b34: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 8004b38: d11d bne.n 8004b76 assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode)); assert_param(IS_FSMC_NORSRAM_BANK(Bank)); /* Set NORSRAM device timing register for write configuration, if extended mode is used */ #if defined(FSMC_BWTRx_BUSTURN) MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime | 8004b3a: 68fb ldr r3, [r7, #12] 8004b3c: 687a ldr r2, [r7, #4] 8004b3e: f853 2022 ldr.w r2, [r3, r2, lsl #2] 8004b42: 4b13 ldr r3, [pc, #76] ; (8004b90 ) 8004b44: 4013 ands r3, r2 8004b46: 68ba ldr r2, [r7, #8] 8004b48: 6811 ldr r1, [r2, #0] 8004b4a: 68ba ldr r2, [r7, #8] 8004b4c: 6852 ldr r2, [r2, #4] 8004b4e: 0112 lsls r2, r2, #4 8004b50: 4311 orrs r1, r2 8004b52: 68ba ldr r2, [r7, #8] 8004b54: 6892 ldr r2, [r2, #8] 8004b56: 0212 lsls r2, r2, #8 8004b58: 4311 orrs r1, r2 8004b5a: 68ba ldr r2, [r7, #8] 8004b5c: 6992 ldr r2, [r2, #24] 8004b5e: 4311 orrs r1, r2 8004b60: 68ba ldr r2, [r7, #8] 8004b62: 68d2 ldr r2, [r2, #12] 8004b64: 0412 lsls r2, r2, #16 8004b66: 430a orrs r2, r1 8004b68: ea43 0102 orr.w r1, r3, r2 8004b6c: 68fb ldr r3, [r7, #12] 8004b6e: 687a ldr r2, [r7, #4] 8004b70: f843 1022 str.w r1, [r3, r2, lsl #2] 8004b74: e005 b.n 8004b82 (((Timing->DataLatency) - 2U) << FSMC_BWTRx_DATLAT_Pos))); #endif /* FSMC_BWTRx_BUSTURN */ } else { Device->BWTR[Bank] = 0x0FFFFFFFU; 8004b76: 68fb ldr r3, [r7, #12] 8004b78: 687a ldr r2, [r7, #4] 8004b7a: f06f 4170 mvn.w r1, #4026531840 ; 0xf0000000 8004b7e: f843 1022 str.w r1, [r3, r2, lsl #2] } return HAL_OK; 8004b82: 2300 movs r3, #0 } 8004b84: 4618 mov r0, r3 8004b86: 3714 adds r7, #20 8004b88: 46bd mov sp, r7 8004b8a: bc80 pop {r7} 8004b8c: 4770 bx lr 8004b8e: bf00 nop 8004b90: cff00000 .word 0xcff00000 08004b94 : _lcd_dev lcddev; //¹ÜÀíLCDÖØÒª²ÎÊý //**************************************************¼¸ÖÖ¿ìËÙ½Ó¿Ú //д¼Ä´æÆ÷º¯Êý //regval:¼Ä´æÆ÷Öµ void LCD_WR_REG(uint16_t regval) { 8004b94: b480 push {r7} 8004b96: b083 sub sp, #12 8004b98: af00 add r7, sp, #0 8004b9a: 4603 mov r3, r0 8004b9c: 80fb strh r3, [r7, #6] LCD_REG_ADDRESS=regval;//дÈëҪдµÄ¼Ä´æÆ÷ÐòºÅ 8004b9e: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000 8004ba2: 88fb ldrh r3, [r7, #6] 8004ba4: 8013 strh r3, [r2, #0] } 8004ba6: bf00 nop 8004ba8: 370c adds r7, #12 8004baa: 46bd mov sp, r7 8004bac: bc80 pop {r7} 8004bae: 4770 bx lr 08004bb0 : //дLCDÊý¾Ý //data:ҪдÈëµÄÖµ void LCD_WR_DATA(uint16_t data) { 8004bb0: b480 push {r7} 8004bb2: b083 sub sp, #12 8004bb4: af00 add r7, sp, #0 8004bb6: 4603 mov r3, r0 8004bb8: 80fb strh r3, [r7, #6] LCD_DATA_ADDRESS=data; 8004bba: 4a04 ldr r2, [pc, #16] ; (8004bcc ) 8004bbc: 88fb ldrh r3, [r7, #6] 8004bbe: 8013 strh r3, [r2, #0] } 8004bc0: bf00 nop 8004bc2: 370c adds r7, #12 8004bc4: 46bd mov sp, r7 8004bc6: bc80 pop {r7} 8004bc8: 4770 bx lr 8004bca: bf00 nop 8004bcc: 6c000800 .word 0x6c000800 08004bd0 : } //д¼Ä´æÆ÷ //LCD_Reg:¼Ä´æÆ÷µØÖ· //LCD_RegValue:ҪдÈëµÄÊý¾Ý void LCD_WriteReg(uint16_t LCD_Reg, uint16_t LCD_RegValue) { 8004bd0: b480 push {r7} 8004bd2: b083 sub sp, #12 8004bd4: af00 add r7, sp, #0 8004bd6: 4603 mov r3, r0 8004bd8: 460a mov r2, r1 8004bda: 80fb strh r3, [r7, #6] 8004bdc: 4613 mov r3, r2 8004bde: 80bb strh r3, [r7, #4] LCD_REG_ADDRESS = LCD_Reg; //дÈëҪдµÄ¼Ä´æÆ÷ÐòºÅ 8004be0: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000 8004be4: 88fb ldrh r3, [r7, #6] 8004be6: 8013 strh r3, [r2, #0] LCD_DATA_ADDRESS = LCD_RegValue;//дÈëÊý¾Ý 8004be8: 4a03 ldr r2, [pc, #12] ; (8004bf8 ) 8004bea: 88bb ldrh r3, [r7, #4] 8004bec: 8013 strh r3, [r2, #0] } 8004bee: bf00 nop 8004bf0: 370c adds r7, #12 8004bf2: 46bd mov sp, r7 8004bf4: bc80 pop {r7} 8004bf6: 4770 bx lr 8004bf8: 6c000800 .word 0x6c000800 08004bfc : //¶Á¼Ä´æÆ÷ //LCD_Reg:¼Ä´æÆ÷µØÖ· //·µ»ØÖµ:¶Áµ½µÄÊý¾Ý uint16_t LCD_ReadReg(uint16_t LCD_Reg) { 8004bfc: b480 push {r7} 8004bfe: b083 sub sp, #12 8004c00: af00 add r7, sp, #0 8004c02: 4603 mov r3, r0 8004c04: 80fb strh r3, [r7, #6] LCD_REG_ADDRESS=LCD_Reg; //дÈëÒª¶ÁµÄ¼Ä´æÆ÷ÐòºÅ 8004c06: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000 8004c0a: 88fb ldrh r3, [r7, #6] 8004c0c: 8013 strh r3, [r2, #0] //delay_us(5); return LCD_DATA_ADDRESS; //·µ»Ø¶Áµ½µÄÖµ 8004c0e: 4b04 ldr r3, [pc, #16] ; (8004c20 ) 8004c10: 881b ldrh r3, [r3, #0] 8004c12: b29b uxth r3, r3 } 8004c14: 4618 mov r0, r3 8004c16: 370c adds r7, #12 8004c18: 46bd mov sp, r7 8004c1a: bc80 pop {r7} 8004c1c: 4770 bx lr 8004c1e: bf00 nop 8004c20: 6c000800 .word 0x6c000800 08004c24 : //×¢Òâ:ÆäËûº¯Êý¿ÉÄÜ»áÊܵ½´Ëº¯ÊýÉèÖõÄÓ°Ïì(ÓÈÆäÊÇ9341/6804ÕâÁ½¸öÆæÝâ), //ËùÒÔ,Ò»°ãÉèÖÃΪL2R_U2D¼´¿É,Èç¹ûÉèÖÃΪÆäËûɨÃ跽ʽ,¿ÉÄܵ¼ÖÂÏÔʾ²»Õý³£. //dir:0~7,´ú±í8¸ö·½Ïò(¾ßÌ嶨Òå¼ûlcd.h) //9320/9325/9328/4531/4535/1505/b505/8989/5408/9341/5310µÈICÒѾ­Êµ¼Ê²âÊÔ void LCD_Scan_Dir(uint8_t dir) { 8004c24: b580 push {r7, lr} 8004c26: b084 sub sp, #16 8004c28: af00 add r7, sp, #0 8004c2a: 4603 mov r3, r0 8004c2c: 71fb strb r3, [r7, #7] uint16_t regval=0; 8004c2e: 2300 movs r3, #0 8004c30: 81fb strh r3, [r7, #14] uint8_t dirreg=0; 8004c32: 2300 movs r3, #0 8004c34: 737b strb r3, [r7, #13] uint16_t temp; if(lcddev.dir==1&&lcddev.id!=0X6804)//ºáÆÁʱ£¬¶Ô6804²»¸Ä±äɨÃè·½Ïò£¡ 8004c36: 4ba8 ldr r3, [pc, #672] ; (8004ed8 ) 8004c38: 799b ldrb r3, [r3, #6] 8004c3a: 2b01 cmp r3, #1 8004c3c: d134 bne.n 8004ca8 8004c3e: 4ba6 ldr r3, [pc, #664] ; (8004ed8 ) 8004c40: 889b ldrh r3, [r3, #4] 8004c42: f646 0204 movw r2, #26628 ; 0x6804 8004c46: 4293 cmp r3, r2 8004c48: d02e beq.n 8004ca8 { switch(dir)//·½Ïòת»» 8004c4a: 79fb ldrb r3, [r7, #7] 8004c4c: 2b07 cmp r3, #7 8004c4e: d82c bhi.n 8004caa 8004c50: a201 add r2, pc, #4 ; (adr r2, 8004c58 ) 8004c52: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004c56: bf00 nop 8004c58: 08004c79 .word 0x08004c79 8004c5c: 08004c7f .word 0x08004c7f 8004c60: 08004c85 .word 0x08004c85 8004c64: 08004c8b .word 0x08004c8b 8004c68: 08004c91 .word 0x08004c91 8004c6c: 08004c97 .word 0x08004c97 8004c70: 08004c9d .word 0x08004c9d 8004c74: 08004ca3 .word 0x08004ca3 { case 0:dir=6;break; 8004c78: 2306 movs r3, #6 8004c7a: 71fb strb r3, [r7, #7] 8004c7c: e015 b.n 8004caa case 1:dir=7;break; 8004c7e: 2307 movs r3, #7 8004c80: 71fb strb r3, [r7, #7] 8004c82: e012 b.n 8004caa case 2:dir=4;break; 8004c84: 2304 movs r3, #4 8004c86: 71fb strb r3, [r7, #7] 8004c88: e00f b.n 8004caa case 3:dir=5;break; 8004c8a: 2305 movs r3, #5 8004c8c: 71fb strb r3, [r7, #7] 8004c8e: e00c b.n 8004caa case 4:dir=1;break; 8004c90: 2301 movs r3, #1 8004c92: 71fb strb r3, [r7, #7] 8004c94: e009 b.n 8004caa case 5:dir=0;break; 8004c96: 2300 movs r3, #0 8004c98: 71fb strb r3, [r7, #7] 8004c9a: e006 b.n 8004caa case 6:dir=3;break; 8004c9c: 2303 movs r3, #3 8004c9e: 71fb strb r3, [r7, #7] 8004ca0: e003 b.n 8004caa case 7:dir=2;break; 8004ca2: 2302 movs r3, #2 8004ca4: 71fb strb r3, [r7, #7] 8004ca6: e000 b.n 8004caa } } 8004ca8: bf00 nop if(lcddev.id==0x9341||lcddev.id==0X6804||lcddev.id==0X5310)//9341/6804/5310,ºÜÌØÊâ 8004caa: 4b8b ldr r3, [pc, #556] ; (8004ed8 ) 8004cac: 889b ldrh r3, [r3, #4] 8004cae: f249 3241 movw r2, #37697 ; 0x9341 8004cb2: 4293 cmp r3, r2 8004cb4: d00c beq.n 8004cd0 8004cb6: 4b88 ldr r3, [pc, #544] ; (8004ed8 ) 8004cb8: 889b ldrh r3, [r3, #4] 8004cba: f646 0204 movw r2, #26628 ; 0x6804 8004cbe: 4293 cmp r3, r2 8004cc0: d006 beq.n 8004cd0 8004cc2: 4b85 ldr r3, [pc, #532] ; (8004ed8 ) 8004cc4: 889b ldrh r3, [r3, #4] 8004cc6: f245 3210 movw r2, #21264 ; 0x5310 8004cca: 4293 cmp r3, r2 8004ccc: f040 80bb bne.w 8004e46 { switch(dir) 8004cd0: 79fb ldrb r3, [r7, #7] 8004cd2: 2b07 cmp r3, #7 8004cd4: d835 bhi.n 8004d42 8004cd6: a201 add r2, pc, #4 ; (adr r2, 8004cdc ) 8004cd8: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004cdc: 08004d43 .word 0x08004d43 8004ce0: 08004cfd .word 0x08004cfd 8004ce4: 08004d07 .word 0x08004d07 8004ce8: 08004d11 .word 0x08004d11 8004cec: 08004d1b .word 0x08004d1b 8004cf0: 08004d25 .word 0x08004d25 8004cf4: 08004d2f .word 0x08004d2f 8004cf8: 08004d39 .word 0x08004d39 { case L2R_U2D://´Ó×óµ½ÓÒ,´ÓÉϵ½Ï regval|=(0<<7)|(0<<6)|(0<<5); break; case L2R_D2U://´Ó×óµ½ÓÒ,´Óϵ½ÉÏ regval|=(1<<7)|(0<<6)|(0<<5); 8004cfc: 89fb ldrh r3, [r7, #14] 8004cfe: f043 0380 orr.w r3, r3, #128 ; 0x80 8004d02: 81fb strh r3, [r7, #14] break; 8004d04: e01d b.n 8004d42 case R2L_U2D://´ÓÓÒµ½×ó,´ÓÉϵ½Ï regval|=(0<<7)|(1<<6)|(0<<5); 8004d06: 89fb ldrh r3, [r7, #14] 8004d08: f043 0340 orr.w r3, r3, #64 ; 0x40 8004d0c: 81fb strh r3, [r7, #14] break; 8004d0e: e018 b.n 8004d42 case R2L_D2U://´ÓÓÒµ½×ó,´Óϵ½ÉÏ regval|=(1<<7)|(1<<6)|(0<<5); 8004d10: 89fb ldrh r3, [r7, #14] 8004d12: f043 03c0 orr.w r3, r3, #192 ; 0xc0 8004d16: 81fb strh r3, [r7, #14] break; 8004d18: e013 b.n 8004d42 case U2D_L2R://´ÓÉϵ½ÏÂ,´Ó×óµ½ÓÒ regval|=(0<<7)|(0<<6)|(1<<5); 8004d1a: 89fb ldrh r3, [r7, #14] 8004d1c: f043 0320 orr.w r3, r3, #32 8004d20: 81fb strh r3, [r7, #14] break; 8004d22: e00e b.n 8004d42 case U2D_R2L://´ÓÉϵ½ÏÂ,´ÓÓÒµ½×ó regval|=(0<<7)|(1<<6)|(1<<5); 8004d24: 89fb ldrh r3, [r7, #14] 8004d26: f043 0360 orr.w r3, r3, #96 ; 0x60 8004d2a: 81fb strh r3, [r7, #14] break; 8004d2c: e009 b.n 8004d42 case D2U_L2R://´Óϵ½ÉÏ,´Ó×óµ½ÓÒ regval|=(1<<7)|(0<<6)|(1<<5); 8004d2e: 89fb ldrh r3, [r7, #14] 8004d30: f043 03a0 orr.w r3, r3, #160 ; 0xa0 8004d34: 81fb strh r3, [r7, #14] break; 8004d36: e004 b.n 8004d42 case D2U_R2L://´Óϵ½ÉÏ,´ÓÓÒµ½×ó regval|=(1<<7)|(1<<6)|(1<<5); 8004d38: 89fb ldrh r3, [r7, #14] 8004d3a: f043 03e0 orr.w r3, r3, #224 ; 0xe0 8004d3e: 81fb strh r3, [r7, #14] break; 8004d40: bf00 nop } dirreg=0X36; 8004d42: 2336 movs r3, #54 ; 0x36 8004d44: 737b strb r3, [r7, #13] if(lcddev.id!=0X5310)regval|=0X08;//5310²»ÐèÒªBGR 8004d46: 4b64 ldr r3, [pc, #400] ; (8004ed8 ) 8004d48: 889b ldrh r3, [r3, #4] 8004d4a: f245 3210 movw r2, #21264 ; 0x5310 8004d4e: 4293 cmp r3, r2 8004d50: d003 beq.n 8004d5a 8004d52: 89fb ldrh r3, [r7, #14] 8004d54: f043 0308 orr.w r3, r3, #8 8004d58: 81fb strh r3, [r7, #14] if(lcddev.id==0X6804)regval|=0x02;//6804µÄBIT6ºÍ9341µÄ·´ÁË 8004d5a: 4b5f ldr r3, [pc, #380] ; (8004ed8 ) 8004d5c: 889b ldrh r3, [r3, #4] 8004d5e: f646 0204 movw r2, #26628 ; 0x6804 8004d62: 4293 cmp r3, r2 8004d64: d103 bne.n 8004d6e 8004d66: 89fb ldrh r3, [r7, #14] 8004d68: f043 0302 orr.w r3, r3, #2 8004d6c: 81fb strh r3, [r7, #14] LCD_WriteReg(dirreg,regval); 8004d6e: 7b7b ldrb r3, [r7, #13] 8004d70: b29b uxth r3, r3 8004d72: 89fa ldrh r2, [r7, #14] 8004d74: 4611 mov r1, r2 8004d76: 4618 mov r0, r3 8004d78: f7ff ff2a bl 8004bd0 if((regval&0X20)||lcddev.dir==1) 8004d7c: 89fb ldrh r3, [r7, #14] 8004d7e: f003 0320 and.w r3, r3, #32 8004d82: 2b00 cmp r3, #0 8004d84: d103 bne.n 8004d8e 8004d86: 4b54 ldr r3, [pc, #336] ; (8004ed8 ) 8004d88: 799b ldrb r3, [r3, #6] 8004d8a: 2b01 cmp r3, #1 8004d8c: d110 bne.n 8004db0 { if(lcddev.width) 8004d90: 881a ldrh r2, [r3, #0] 8004d92: 4b51 ldr r3, [pc, #324] ; (8004ed8 ) 8004d94: 885b ldrh r3, [r3, #2] 8004d96: 429a cmp r2, r3 8004d98: d21a bcs.n 8004dd0 { temp=lcddev.width; 8004d9a: 4b4f ldr r3, [pc, #316] ; (8004ed8 ) 8004d9c: 881b ldrh r3, [r3, #0] 8004d9e: 817b strh r3, [r7, #10] lcddev.width=lcddev.height; 8004da0: 4b4d ldr r3, [pc, #308] ; (8004ed8 ) 8004da2: 885a ldrh r2, [r3, #2] 8004da4: 4b4c ldr r3, [pc, #304] ; (8004ed8 ) 8004da6: 801a strh r2, [r3, #0] lcddev.height=temp; 8004da8: 4a4b ldr r2, [pc, #300] ; (8004ed8 ) 8004daa: 897b ldrh r3, [r7, #10] 8004dac: 8053 strh r3, [r2, #2] if(lcddev.width } }else { if(lcddev.width>lcddev.height)//½»»»X,Y 8004db0: 4b49 ldr r3, [pc, #292] ; (8004ed8 ) 8004db2: 881a ldrh r2, [r3, #0] 8004db4: 4b48 ldr r3, [pc, #288] ; (8004ed8 ) 8004db6: 885b ldrh r3, [r3, #2] 8004db8: 429a cmp r2, r3 8004dba: d909 bls.n 8004dd0 { temp=lcddev.width; 8004dbc: 4b46 ldr r3, [pc, #280] ; (8004ed8 ) 8004dbe: 881b ldrh r3, [r3, #0] 8004dc0: 817b strh r3, [r7, #10] lcddev.width=lcddev.height; 8004dc2: 4b45 ldr r3, [pc, #276] ; (8004ed8 ) 8004dc4: 885a ldrh r2, [r3, #2] 8004dc6: 4b44 ldr r3, [pc, #272] ; (8004ed8 ) 8004dc8: 801a strh r2, [r3, #0] lcddev.height=temp; 8004dca: 4a43 ldr r2, [pc, #268] ; (8004ed8 ) 8004dcc: 897b ldrh r3, [r7, #10] 8004dce: 8053 strh r3, [r2, #2] } } LCD_WR_REG(lcddev.setxcmd); 8004dd0: 4b41 ldr r3, [pc, #260] ; (8004ed8 ) 8004dd2: 7a1b ldrb r3, [r3, #8] 8004dd4: b29b uxth r3, r3 8004dd6: 4618 mov r0, r3 8004dd8: f7ff fedc bl 8004b94 LCD_WR_DATA(0);LCD_WR_DATA(0); 8004ddc: 2000 movs r0, #0 8004dde: f7ff fee7 bl 8004bb0 8004de2: 2000 movs r0, #0 8004de4: f7ff fee4 bl 8004bb0 LCD_WR_DATA((lcddev.width-1)>>8);LCD_WR_DATA((lcddev.width-1)&0XFF); 8004de8: 4b3b ldr r3, [pc, #236] ; (8004ed8 ) 8004dea: 881b ldrh r3, [r3, #0] 8004dec: 3b01 subs r3, #1 8004dee: 121b asrs r3, r3, #8 8004df0: b29b uxth r3, r3 8004df2: 4618 mov r0, r3 8004df4: f7ff fedc bl 8004bb0 8004df8: 4b37 ldr r3, [pc, #220] ; (8004ed8 ) 8004dfa: 881b ldrh r3, [r3, #0] 8004dfc: 3b01 subs r3, #1 8004dfe: b29b uxth r3, r3 8004e00: b2db uxtb r3, r3 8004e02: b29b uxth r3, r3 8004e04: 4618 mov r0, r3 8004e06: f7ff fed3 bl 8004bb0 LCD_WR_REG(lcddev.setycmd); 8004e0a: 4b33 ldr r3, [pc, #204] ; (8004ed8 ) 8004e0c: 7a5b ldrb r3, [r3, #9] 8004e0e: b29b uxth r3, r3 8004e10: 4618 mov r0, r3 8004e12: f7ff febf bl 8004b94 LCD_WR_DATA(0);LCD_WR_DATA(0); 8004e16: 2000 movs r0, #0 8004e18: f7ff feca bl 8004bb0 8004e1c: 2000 movs r0, #0 8004e1e: f7ff fec7 bl 8004bb0 LCD_WR_DATA((lcddev.height-1)>>8);LCD_WR_DATA((lcddev.height-1)&0XFF); 8004e22: 4b2d ldr r3, [pc, #180] ; (8004ed8 ) 8004e24: 885b ldrh r3, [r3, #2] 8004e26: 3b01 subs r3, #1 8004e28: 121b asrs r3, r3, #8 8004e2a: b29b uxth r3, r3 8004e2c: 4618 mov r0, r3 8004e2e: f7ff febf bl 8004bb0 8004e32: 4b29 ldr r3, [pc, #164] ; (8004ed8 ) 8004e34: 885b ldrh r3, [r3, #2] 8004e36: 3b01 subs r3, #1 8004e38: b29b uxth r3, r3 8004e3a: b2db uxtb r3, r3 8004e3c: b29b uxth r3, r3 8004e3e: 4618 mov r0, r3 8004e40: f7ff feb6 bl 8004bb0 8004e44: e058 b.n 8004ef8 }else { switch(dir) 8004e46: 79fb ldrb r3, [r7, #7] 8004e48: 2b07 cmp r3, #7 8004e4a: d836 bhi.n 8004eba 8004e4c: a201 add r2, pc, #4 ; (adr r2, 8004e54 ) 8004e4e: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004e52: bf00 nop 8004e54: 08004e75 .word 0x08004e75 8004e58: 08004e7f .word 0x08004e7f 8004e5c: 08004e89 .word 0x08004e89 8004e60: 08004ebb .word 0x08004ebb 8004e64: 08004e93 .word 0x08004e93 8004e68: 08004e9d .word 0x08004e9d 8004e6c: 08004ea7 .word 0x08004ea7 8004e70: 08004eb1 .word 0x08004eb1 { case L2R_U2D://´Ó×óµ½ÓÒ,´ÓÉϵ½Ï regval|=(1<<5)|(1<<4)|(0<<3); 8004e74: 89fb ldrh r3, [r7, #14] 8004e76: f043 0330 orr.w r3, r3, #48 ; 0x30 8004e7a: 81fb strh r3, [r7, #14] break; 8004e7c: e01d b.n 8004eba case L2R_D2U://´Ó×óµ½ÓÒ,´Óϵ½ÉÏ regval|=(0<<5)|(1<<4)|(0<<3); 8004e7e: 89fb ldrh r3, [r7, #14] 8004e80: f043 0310 orr.w r3, r3, #16 8004e84: 81fb strh r3, [r7, #14] break; 8004e86: e018 b.n 8004eba case R2L_U2D://´ÓÓÒµ½×ó,´ÓÉϵ½Ï regval|=(1<<5)|(0<<4)|(0<<3); 8004e88: 89fb ldrh r3, [r7, #14] 8004e8a: f043 0320 orr.w r3, r3, #32 8004e8e: 81fb strh r3, [r7, #14] break; 8004e90: e013 b.n 8004eba case R2L_D2U://´ÓÓÒµ½×ó,´Óϵ½ÉÏ regval|=(0<<5)|(0<<4)|(0<<3); break; case U2D_L2R://´ÓÉϵ½ÏÂ,´Ó×óµ½ÓÒ regval|=(1<<5)|(1<<4)|(1<<3); 8004e92: 89fb ldrh r3, [r7, #14] 8004e94: f043 0338 orr.w r3, r3, #56 ; 0x38 8004e98: 81fb strh r3, [r7, #14] break; 8004e9a: e00e b.n 8004eba case U2D_R2L://´ÓÉϵ½ÏÂ,´ÓÓÒµ½×ó regval|=(1<<5)|(0<<4)|(1<<3); 8004e9c: 89fb ldrh r3, [r7, #14] 8004e9e: f043 0328 orr.w r3, r3, #40 ; 0x28 8004ea2: 81fb strh r3, [r7, #14] break; 8004ea4: e009 b.n 8004eba case D2U_L2R://´Óϵ½ÉÏ,´Ó×óµ½ÓÒ regval|=(0<<5)|(1<<4)|(1<<3); 8004ea6: 89fb ldrh r3, [r7, #14] 8004ea8: f043 0318 orr.w r3, r3, #24 8004eac: 81fb strh r3, [r7, #14] break; 8004eae: e004 b.n 8004eba case D2U_R2L://´Óϵ½ÉÏ,´ÓÓÒµ½×ó regval|=(0<<5)|(0<<4)|(1<<3); 8004eb0: 89fb ldrh r3, [r7, #14] 8004eb2: f043 0308 orr.w r3, r3, #8 8004eb6: 81fb strh r3, [r7, #14] break; 8004eb8: bf00 nop } if(lcddev.id==0x8989)//8989 IC 8004eba: 4b07 ldr r3, [pc, #28] ; (8004ed8 ) 8004ebc: 889b ldrh r3, [r3, #4] 8004ebe: f648 1289 movw r2, #35209 ; 0x8989 8004ec2: 4293 cmp r3, r2 8004ec4: d10a bne.n 8004edc { dirreg=0X11; 8004ec6: 2311 movs r3, #17 8004ec8: 737b strb r3, [r7, #13] regval|=0X6040; //65K 8004eca: 89fb ldrh r3, [r7, #14] 8004ecc: f443 43c0 orr.w r3, r3, #24576 ; 0x6000 8004ed0: f043 0340 orr.w r3, r3, #64 ; 0x40 8004ed4: 81fb strh r3, [r7, #14] 8004ed6: e007 b.n 8004ee8 8004ed8: 20000354 .word 0x20000354 }else//ÆäËûÇý¶¯IC { dirreg=0X03; 8004edc: 2303 movs r3, #3 8004ede: 737b strb r3, [r7, #13] regval|=1<<12; 8004ee0: 89fb ldrh r3, [r7, #14] 8004ee2: f443 5380 orr.w r3, r3, #4096 ; 0x1000 8004ee6: 81fb strh r3, [r7, #14] } LCD_WriteReg(dirreg,regval); 8004ee8: 7b7b ldrb r3, [r7, #13] 8004eea: b29b uxth r3, r3 8004eec: 89fa ldrh r2, [r7, #14] 8004eee: 4611 mov r1, r2 8004ef0: 4618 mov r0, r3 8004ef2: f7ff fe6d bl 8004bd0 } } 8004ef6: bf00 nop 8004ef8: bf00 nop 8004efa: 3710 adds r7, #16 8004efc: 46bd mov sp, r7 8004efe: bd80 pop {r7, pc} 08004f00 : //ÉèÖÃLCDÏÔʾ·½Ïò //dir:0,ÊúÆÁ£»1,ºáÆÁ void LCD_Display_Dir(uint8_t dir) { 8004f00: b580 push {r7, lr} 8004f02: b082 sub sp, #8 8004f04: af00 add r7, sp, #0 8004f06: 4603 mov r3, r0 8004f08: 71fb strb r3, [r7, #7] if(dir==0) //ÊúÆÁ 8004f0a: 79fb ldrb r3, [r7, #7] 8004f0c: 2b00 cmp r3, #0 8004f0e: d154 bne.n 8004fba { lcddev.dir=0; //ÊúÆÁ 8004f10: 4b5d ldr r3, [pc, #372] ; (8005088 ) 8004f12: 2200 movs r2, #0 8004f14: 719a strb r2, [r3, #6] lcddev.width=240; 8004f16: 4b5c ldr r3, [pc, #368] ; (8005088 ) 8004f18: 22f0 movs r2, #240 ; 0xf0 8004f1a: 801a strh r2, [r3, #0] lcddev.height=320; 8004f1c: 4b5a ldr r3, [pc, #360] ; (8005088 ) 8004f1e: f44f 72a0 mov.w r2, #320 ; 0x140 8004f22: 805a strh r2, [r3, #2] if(lcddev.id==0X9341||lcddev.id==0X6804||lcddev.id==0X5310) 8004f24: 4b58 ldr r3, [pc, #352] ; (8005088 ) 8004f26: 889b ldrh r3, [r3, #4] 8004f28: f249 3241 movw r2, #37697 ; 0x9341 8004f2c: 4293 cmp r3, r2 8004f2e: d00b beq.n 8004f48 8004f30: 4b55 ldr r3, [pc, #340] ; (8005088 ) 8004f32: 889b ldrh r3, [r3, #4] 8004f34: f646 0204 movw r2, #26628 ; 0x6804 8004f38: 4293 cmp r3, r2 8004f3a: d005 beq.n 8004f48 8004f3c: 4b52 ldr r3, [pc, #328] ; (8005088 ) 8004f3e: 889b ldrh r3, [r3, #4] 8004f40: f245 3210 movw r2, #21264 ; 0x5310 8004f44: 4293 cmp r3, r2 8004f46: d11e bne.n 8004f86 { lcddev.wramcmd=0X2C; 8004f48: 4b4f ldr r3, [pc, #316] ; (8005088 ) 8004f4a: 222c movs r2, #44 ; 0x2c 8004f4c: 71da strb r2, [r3, #7] lcddev.setxcmd=0X2A; 8004f4e: 4b4e ldr r3, [pc, #312] ; (8005088 ) 8004f50: 222a movs r2, #42 ; 0x2a 8004f52: 721a strb r2, [r3, #8] lcddev.setycmd=0X2B; 8004f54: 4b4c ldr r3, [pc, #304] ; (8005088 ) 8004f56: 222b movs r2, #43 ; 0x2b 8004f58: 725a strb r2, [r3, #9] if(lcddev.id==0X6804||lcddev.id==0X5310) 8004f5a: 4b4b ldr r3, [pc, #300] ; (8005088 ) 8004f5c: 889b ldrh r3, [r3, #4] 8004f5e: f646 0204 movw r2, #26628 ; 0x6804 8004f62: 4293 cmp r3, r2 8004f64: d006 beq.n 8004f74 8004f66: 4b48 ldr r3, [pc, #288] ; (8005088 ) 8004f68: 889b ldrh r3, [r3, #4] 8004f6a: f245 3210 movw r2, #21264 ; 0x5310 8004f6e: 4293 cmp r3, r2 8004f70: f040 8081 bne.w 8005076 { lcddev.width=320; 8004f74: 4b44 ldr r3, [pc, #272] ; (8005088 ) 8004f76: f44f 72a0 mov.w r2, #320 ; 0x140 8004f7a: 801a strh r2, [r3, #0] lcddev.height=480; 8004f7c: 4b42 ldr r3, [pc, #264] ; (8005088 ) 8004f7e: f44f 72f0 mov.w r2, #480 ; 0x1e0 8004f82: 805a strh r2, [r3, #2] if(lcddev.id==0X6804||lcddev.id==0X5310) 8004f84: e077 b.n 8005076 } }else if(lcddev.id==0X8989) 8004f86: 4b40 ldr r3, [pc, #256] ; (8005088 ) 8004f88: 889b ldrh r3, [r3, #4] 8004f8a: f648 1289 movw r2, #35209 ; 0x8989 8004f8e: 4293 cmp r3, r2 8004f90: d109 bne.n 8004fa6 { lcddev.wramcmd=R34; 8004f92: 4b3d ldr r3, [pc, #244] ; (8005088 ) 8004f94: 2222 movs r2, #34 ; 0x22 8004f96: 71da strb r2, [r3, #7] lcddev.setxcmd=0X4E; 8004f98: 4b3b ldr r3, [pc, #236] ; (8005088 ) 8004f9a: 224e movs r2, #78 ; 0x4e 8004f9c: 721a strb r2, [r3, #8] lcddev.setycmd=0X4F; 8004f9e: 4b3a ldr r3, [pc, #232] ; (8005088 ) 8004fa0: 224f movs r2, #79 ; 0x4f 8004fa2: 725a strb r2, [r3, #9] 8004fa4: e068 b.n 8005078 }else { lcddev.wramcmd=R34; 8004fa6: 4b38 ldr r3, [pc, #224] ; (8005088 ) 8004fa8: 2222 movs r2, #34 ; 0x22 8004faa: 71da strb r2, [r3, #7] lcddev.setxcmd=R32; 8004fac: 4b36 ldr r3, [pc, #216] ; (8005088 ) 8004fae: 2220 movs r2, #32 8004fb0: 721a strb r2, [r3, #8] lcddev.setycmd=R33; 8004fb2: 4b35 ldr r3, [pc, #212] ; (8005088 ) 8004fb4: 2221 movs r2, #33 ; 0x21 8004fb6: 725a strb r2, [r3, #9] 8004fb8: e05e b.n 8005078 } }else //ºáÆÁ { lcddev.dir=1; //ºáÆÁ 8004fba: 4b33 ldr r3, [pc, #204] ; (8005088 ) 8004fbc: 2201 movs r2, #1 8004fbe: 719a strb r2, [r3, #6] lcddev.width=320; 8004fc0: 4b31 ldr r3, [pc, #196] ; (8005088 ) 8004fc2: f44f 72a0 mov.w r2, #320 ; 0x140 8004fc6: 801a strh r2, [r3, #0] lcddev.height=240; 8004fc8: 4b2f ldr r3, [pc, #188] ; (8005088 ) 8004fca: 22f0 movs r2, #240 ; 0xf0 8004fcc: 805a strh r2, [r3, #2] if(lcddev.id==0X9341||lcddev.id==0X5310) 8004fce: 4b2e ldr r3, [pc, #184] ; (8005088 ) 8004fd0: 889b ldrh r3, [r3, #4] 8004fd2: f249 3241 movw r2, #37697 ; 0x9341 8004fd6: 4293 cmp r3, r2 8004fd8: d005 beq.n 8004fe6 8004fda: 4b2b ldr r3, [pc, #172] ; (8005088 ) 8004fdc: 889b ldrh r3, [r3, #4] 8004fde: f245 3210 movw r2, #21264 ; 0x5310 8004fe2: 4293 cmp r3, r2 8004fe4: d109 bne.n 8004ffa { lcddev.wramcmd=0X2C; 8004fe6: 4b28 ldr r3, [pc, #160] ; (8005088 ) 8004fe8: 222c movs r2, #44 ; 0x2c 8004fea: 71da strb r2, [r3, #7] lcddev.setxcmd=0X2A; 8004fec: 4b26 ldr r3, [pc, #152] ; (8005088 ) 8004fee: 222a movs r2, #42 ; 0x2a 8004ff0: 721a strb r2, [r3, #8] lcddev.setycmd=0X2B; 8004ff2: 4b25 ldr r3, [pc, #148] ; (8005088 ) 8004ff4: 222b movs r2, #43 ; 0x2b 8004ff6: 725a strb r2, [r3, #9] 8004ff8: e028 b.n 800504c }else if(lcddev.id==0X6804) 8004ffa: 4b23 ldr r3, [pc, #140] ; (8005088 ) 8004ffc: 889b ldrh r3, [r3, #4] 8004ffe: f646 0204 movw r2, #26628 ; 0x6804 8005002: 4293 cmp r3, r2 8005004: d109 bne.n 800501a { lcddev.wramcmd=0X2C; 8005006: 4b20 ldr r3, [pc, #128] ; (8005088 ) 8005008: 222c movs r2, #44 ; 0x2c 800500a: 71da strb r2, [r3, #7] lcddev.setxcmd=0X2B; 800500c: 4b1e ldr r3, [pc, #120] ; (8005088 ) 800500e: 222b movs r2, #43 ; 0x2b 8005010: 721a strb r2, [r3, #8] lcddev.setycmd=0X2A; 8005012: 4b1d ldr r3, [pc, #116] ; (8005088 ) 8005014: 222a movs r2, #42 ; 0x2a 8005016: 725a strb r2, [r3, #9] 8005018: e018 b.n 800504c }else if(lcddev.id==0X8989) 800501a: 4b1b ldr r3, [pc, #108] ; (8005088 ) 800501c: 889b ldrh r3, [r3, #4] 800501e: f648 1289 movw r2, #35209 ; 0x8989 8005022: 4293 cmp r3, r2 8005024: d109 bne.n 800503a { lcddev.wramcmd=R34; 8005026: 4b18 ldr r3, [pc, #96] ; (8005088 ) 8005028: 2222 movs r2, #34 ; 0x22 800502a: 71da strb r2, [r3, #7] lcddev.setxcmd=0X4F; 800502c: 4b16 ldr r3, [pc, #88] ; (8005088 ) 800502e: 224f movs r2, #79 ; 0x4f 8005030: 721a strb r2, [r3, #8] lcddev.setycmd=0X4E; 8005032: 4b15 ldr r3, [pc, #84] ; (8005088 ) 8005034: 224e movs r2, #78 ; 0x4e 8005036: 725a strb r2, [r3, #9] 8005038: e008 b.n 800504c }else { lcddev.wramcmd=R34; 800503a: 4b13 ldr r3, [pc, #76] ; (8005088 ) 800503c: 2222 movs r2, #34 ; 0x22 800503e: 71da strb r2, [r3, #7] lcddev.setxcmd=R33; 8005040: 4b11 ldr r3, [pc, #68] ; (8005088 ) 8005042: 2221 movs r2, #33 ; 0x21 8005044: 721a strb r2, [r3, #8] lcddev.setycmd=R32; 8005046: 4b10 ldr r3, [pc, #64] ; (8005088 ) 8005048: 2220 movs r2, #32 800504a: 725a strb r2, [r3, #9] } if(lcddev.id==0X6804||lcddev.id==0X5310) 800504c: 4b0e ldr r3, [pc, #56] ; (8005088 ) 800504e: 889b ldrh r3, [r3, #4] 8005050: f646 0204 movw r2, #26628 ; 0x6804 8005054: 4293 cmp r3, r2 8005056: d005 beq.n 8005064 8005058: 4b0b ldr r3, [pc, #44] ; (8005088 ) 800505a: 889b ldrh r3, [r3, #4] 800505c: f245 3210 movw r2, #21264 ; 0x5310 8005060: 4293 cmp r3, r2 8005062: d109 bne.n 8005078 { lcddev.width=480; 8005064: 4b08 ldr r3, [pc, #32] ; (8005088 ) 8005066: f44f 72f0 mov.w r2, #480 ; 0x1e0 800506a: 801a strh r2, [r3, #0] lcddev.height=320; 800506c: 4b06 ldr r3, [pc, #24] ; (8005088 ) 800506e: f44f 72a0 mov.w r2, #320 ; 0x140 8005072: 805a strh r2, [r3, #2] 8005074: e000 b.n 8005078 if(lcddev.id==0X6804||lcddev.id==0X5310) 8005076: bf00 nop } } LCD_Scan_Dir(DFT_SCAN_DIR); //ĬÈÏɨÃè·½Ïò 8005078: 2000 movs r0, #0 800507a: f7ff fdd3 bl 8004c24 } 800507e: bf00 nop 8005080: 3708 adds r7, #8 8005082: 46bd mov sp, r7 8005084: bd80 pop {r7, pc} 8005086: bf00 nop 8005088: 20000354 .word 0x20000354 0800508c : //³õʼ»¯lcd //¸Ã³õʼ»¯º¯Êý¿ÉÒÔ³õʼ»¯¸÷ÖÖÒº¾§! void LCDx_Init(void) { 800508c: b580 push {r7, lr} 800508e: af00 add r7, sp, #0 HAL_Delay(50); // delay 50 ms 8005090: 2032 movs r0, #50 ; 0x32 8005092: f7fc fd53 bl 8001b3c LCD_WriteReg(0x0000,0x0001); 8005096: 2101 movs r1, #1 8005098: 2000 movs r0, #0 800509a: f7ff fd99 bl 8004bd0 HAL_Delay(50); // delay 50 ms 800509e: 2032 movs r0, #50 ; 0x32 80050a0: f7fc fd4c bl 8001b3c lcddev.id = LCD_ReadReg(0x0000); 80050a4: 2000 movs r0, #0 80050a6: f7ff fda9 bl 8004bfc 80050aa: 4603 mov r3, r0 80050ac: 461a mov r2, r3 80050ae: 4b70 ldr r3, [pc, #448] ; (8005270 ) 80050b0: 809a strh r2, [r3, #4] LCD_WriteReg(0x00E5,0x78F0); 80050b2: f647 01f0 movw r1, #30960 ; 0x78f0 80050b6: 20e5 movs r0, #229 ; 0xe5 80050b8: f7ff fd8a bl 8004bd0 LCD_WriteReg(0x0001,0x0100); 80050bc: f44f 7180 mov.w r1, #256 ; 0x100 80050c0: 2001 movs r0, #1 80050c2: f7ff fd85 bl 8004bd0 LCD_WriteReg(0x0002,0x0700); 80050c6: f44f 61e0 mov.w r1, #1792 ; 0x700 80050ca: 2002 movs r0, #2 80050cc: f7ff fd80 bl 8004bd0 LCD_WriteReg(0x0003,0x1030); 80050d0: f241 0130 movw r1, #4144 ; 0x1030 80050d4: 2003 movs r0, #3 80050d6: f7ff fd7b bl 8004bd0 LCD_WriteReg(0x0004,0x0000); 80050da: 2100 movs r1, #0 80050dc: 2004 movs r0, #4 80050de: f7ff fd77 bl 8004bd0 LCD_WriteReg(0x0008,0x0202); 80050e2: f240 2102 movw r1, #514 ; 0x202 80050e6: 2008 movs r0, #8 80050e8: f7ff fd72 bl 8004bd0 LCD_WriteReg(0x0009,0x0000); 80050ec: 2100 movs r1, #0 80050ee: 2009 movs r0, #9 80050f0: f7ff fd6e bl 8004bd0 LCD_WriteReg(0x000A,0x0000); 80050f4: 2100 movs r1, #0 80050f6: 200a movs r0, #10 80050f8: f7ff fd6a bl 8004bd0 LCD_WriteReg(0x000C,0x0000); 80050fc: 2100 movs r1, #0 80050fe: 200c movs r0, #12 8005100: f7ff fd66 bl 8004bd0 LCD_WriteReg(0x000D,0x0000); 8005104: 2100 movs r1, #0 8005106: 200d movs r0, #13 8005108: f7ff fd62 bl 8004bd0 LCD_WriteReg(0x000F,0x0000); 800510c: 2100 movs r1, #0 800510e: 200f movs r0, #15 8005110: f7ff fd5e bl 8004bd0 //power on sequence VGHVGL LCD_WriteReg(0x0010,0x0000); 8005114: 2100 movs r1, #0 8005116: 2010 movs r0, #16 8005118: f7ff fd5a bl 8004bd0 LCD_WriteReg(0x0011,0x0007); 800511c: 2107 movs r1, #7 800511e: 2011 movs r0, #17 8005120: f7ff fd56 bl 8004bd0 LCD_WriteReg(0x0012,0x0000); 8005124: 2100 movs r1, #0 8005126: 2012 movs r0, #18 8005128: f7ff fd52 bl 8004bd0 LCD_WriteReg(0x0013,0x0000); 800512c: 2100 movs r1, #0 800512e: 2013 movs r0, #19 8005130: f7ff fd4e bl 8004bd0 LCD_WriteReg(0x0007,0x0000); 8005134: 2100 movs r1, #0 8005136: 2007 movs r0, #7 8005138: f7ff fd4a bl 8004bd0 //vgh LCD_WriteReg(0x0010,0x1690); 800513c: f241 6190 movw r1, #5776 ; 0x1690 8005140: 2010 movs r0, #16 8005142: f7ff fd45 bl 8004bd0 LCD_WriteReg(0x0011,0x0227); 8005146: f240 2127 movw r1, #551 ; 0x227 800514a: 2011 movs r0, #17 800514c: f7ff fd40 bl 8004bd0 //delayms(100); //vregiout LCD_WriteReg(0x0012,0x009D); //0x001b 8005150: 219d movs r1, #157 ; 0x9d 8005152: 2012 movs r0, #18 8005154: f7ff fd3c bl 8004bd0 //delayms(100); //vom amplitude LCD_WriteReg(0x0013,0x1900); 8005158: f44f 51c8 mov.w r1, #6400 ; 0x1900 800515c: 2013 movs r0, #19 800515e: f7ff fd37 bl 8004bd0 //delayms(100); //vom H LCD_WriteReg(0x0029,0x0025); 8005162: 2125 movs r1, #37 ; 0x25 8005164: 2029 movs r0, #41 ; 0x29 8005166: f7ff fd33 bl 8004bd0 LCD_WriteReg(0x002B,0x000D); 800516a: 210d movs r1, #13 800516c: 202b movs r0, #43 ; 0x2b 800516e: f7ff fd2f bl 8004bd0 //gamma LCD_WriteReg(0x0030,0x0007); 8005172: 2107 movs r1, #7 8005174: 2030 movs r0, #48 ; 0x30 8005176: f7ff fd2b bl 8004bd0 LCD_WriteReg(0x0031,0x0303); 800517a: f240 3103 movw r1, #771 ; 0x303 800517e: 2031 movs r0, #49 ; 0x31 8005180: f7ff fd26 bl 8004bd0 LCD_WriteReg(0x0032,0x0003);// 0006 8005184: 2103 movs r1, #3 8005186: 2032 movs r0, #50 ; 0x32 8005188: f7ff fd22 bl 8004bd0 LCD_WriteReg(0x0035,0x0206); 800518c: f240 2106 movw r1, #518 ; 0x206 8005190: 2035 movs r0, #53 ; 0x35 8005192: f7ff fd1d bl 8004bd0 LCD_WriteReg(0x0036,0x0008); 8005196: 2108 movs r1, #8 8005198: 2036 movs r0, #54 ; 0x36 800519a: f7ff fd19 bl 8004bd0 LCD_WriteReg(0x0037,0x0406); 800519e: f240 4106 movw r1, #1030 ; 0x406 80051a2: 2037 movs r0, #55 ; 0x37 80051a4: f7ff fd14 bl 8004bd0 LCD_WriteReg(0x0038,0x0304);//0200 80051a8: f44f 7141 mov.w r1, #772 ; 0x304 80051ac: 2038 movs r0, #56 ; 0x38 80051ae: f7ff fd0f bl 8004bd0 LCD_WriteReg(0x0039,0x0007); 80051b2: 2107 movs r1, #7 80051b4: 2039 movs r0, #57 ; 0x39 80051b6: f7ff fd0b bl 8004bd0 LCD_WriteReg(0x003C,0x0602);// 0504 80051ba: f240 6102 movw r1, #1538 ; 0x602 80051be: 203c movs r0, #60 ; 0x3c 80051c0: f7ff fd06 bl 8004bd0 LCD_WriteReg(0x003D,0x0008); 80051c4: 2108 movs r1, #8 80051c6: 203d movs r0, #61 ; 0x3d 80051c8: f7ff fd02 bl 8004bd0 //ram LCD_WriteReg(0x0050,0x0000); 80051cc: 2100 movs r1, #0 80051ce: 2050 movs r0, #80 ; 0x50 80051d0: f7ff fcfe bl 8004bd0 LCD_WriteReg(0x0051,0x00EF); 80051d4: 21ef movs r1, #239 ; 0xef 80051d6: 2051 movs r0, #81 ; 0x51 80051d8: f7ff fcfa bl 8004bd0 LCD_WriteReg(0x0052,0x0000); 80051dc: 2100 movs r1, #0 80051de: 2052 movs r0, #82 ; 0x52 80051e0: f7ff fcf6 bl 8004bd0 LCD_WriteReg(0x0053,0x013F); 80051e4: f240 113f movw r1, #319 ; 0x13f 80051e8: 2053 movs r0, #83 ; 0x53 80051ea: f7ff fcf1 bl 8004bd0 LCD_WriteReg(0x0060,0xA700); 80051ee: f44f 4127 mov.w r1, #42752 ; 0xa700 80051f2: 2060 movs r0, #96 ; 0x60 80051f4: f7ff fcec bl 8004bd0 LCD_WriteReg(0x0061,0x0001); 80051f8: 2101 movs r1, #1 80051fa: 2061 movs r0, #97 ; 0x61 80051fc: f7ff fce8 bl 8004bd0 LCD_WriteReg(0x006A,0x0000); 8005200: 2100 movs r1, #0 8005202: 206a movs r0, #106 ; 0x6a 8005204: f7ff fce4 bl 8004bd0 // LCD_WriteReg(0x0080,0x0000); 8005208: 2100 movs r1, #0 800520a: 2080 movs r0, #128 ; 0x80 800520c: f7ff fce0 bl 8004bd0 LCD_WriteReg(0x0081,0x0000); 8005210: 2100 movs r1, #0 8005212: 2081 movs r0, #129 ; 0x81 8005214: f7ff fcdc bl 8004bd0 LCD_WriteReg(0x0082,0x0000); 8005218: 2100 movs r1, #0 800521a: 2082 movs r0, #130 ; 0x82 800521c: f7ff fcd8 bl 8004bd0 LCD_WriteReg(0x0083,0x0000); 8005220: 2100 movs r1, #0 8005222: 2083 movs r0, #131 ; 0x83 8005224: f7ff fcd4 bl 8004bd0 LCD_WriteReg(0x0084,0x0000); 8005228: 2100 movs r1, #0 800522a: 2084 movs r0, #132 ; 0x84 800522c: f7ff fcd0 bl 8004bd0 LCD_WriteReg(0x0085,0x0000); 8005230: 2100 movs r1, #0 8005232: 2085 movs r0, #133 ; 0x85 8005234: f7ff fccc bl 8004bd0 // LCD_WriteReg(0x0090,0x0010); 8005238: 2110 movs r1, #16 800523a: 2090 movs r0, #144 ; 0x90 800523c: f7ff fcc8 bl 8004bd0 LCD_WriteReg(0x0092,0x0600); 8005240: f44f 61c0 mov.w r1, #1536 ; 0x600 8005244: 2092 movs r0, #146 ; 0x92 8005246: f7ff fcc3 bl 8004bd0 LCD_WriteReg(0x0007,0x0133); 800524a: f240 1133 movw r1, #307 ; 0x133 800524e: 2007 movs r0, #7 8005250: f7ff fcbe bl 8004bd0 LCD_WriteReg(0x00,0x0022);// 8005254: 2122 movs r1, #34 ; 0x22 8005256: 2000 movs r0, #0 8005258: f7ff fcba bl 8004bd0 LCD_Display_Dir(1); //ĬÈÏΪhÆÁ 800525c: 2001 movs r0, #1 800525e: f7ff fe4f bl 8004f00 LCD_BL(0); 8005262: 2200 movs r2, #0 8005264: 2101 movs r1, #1 8005266: 4803 ldr r0, [pc, #12] ; (8005274 ) 8005268: f7fc ff45 bl 80020f6 } 800526c: bf00 nop 800526e: bd80 pop {r7, pc} 8005270: 20000354 .word 0x20000354 8005274: 40010c00 .word 0x40010c00 08005278 : //***********************************************************´òµã ¶Áµã ʲôµÄ //ÉèÖùâ±êλÖà //Xpos:ºá×ø±ê //Ypos:×Ý×ø±ê void LCD_SetCursor(uint16_t Xpos, uint16_t Ypos) { 8005278: b580 push {r7, lr} 800527a: b082 sub sp, #8 800527c: af00 add r7, sp, #0 800527e: 4603 mov r3, r0 8005280: 460a mov r2, r1 8005282: 80fb strh r3, [r7, #6] 8005284: 4613 mov r3, r2 8005286: 80bb strh r3, [r7, #4] if(lcddev.id==0X9341||lcddev.id==0X5310) 8005288: 4b42 ldr r3, [pc, #264] ; (8005394 ) 800528a: 889b ldrh r3, [r3, #4] 800528c: f249 3241 movw r2, #37697 ; 0x9341 8005290: 4293 cmp r3, r2 8005292: d005 beq.n 80052a0 8005294: 4b3f ldr r3, [pc, #252] ; (8005394 ) 8005296: 889b ldrh r3, [r3, #4] 8005298: f245 3210 movw r2, #21264 ; 0x5310 800529c: 4293 cmp r3, r2 800529e: d124 bne.n 80052ea { LCD_WR_REG(lcddev.setxcmd); 80052a0: 4b3c ldr r3, [pc, #240] ; (8005394 ) 80052a2: 7a1b ldrb r3, [r3, #8] 80052a4: b29b uxth r3, r3 80052a6: 4618 mov r0, r3 80052a8: f7ff fc74 bl 8004b94 LCD_WR_DATA(Xpos>>8); 80052ac: 88fb ldrh r3, [r7, #6] 80052ae: 0a1b lsrs r3, r3, #8 80052b0: b29b uxth r3, r3 80052b2: 4618 mov r0, r3 80052b4: f7ff fc7c bl 8004bb0 LCD_WR_DATA(Xpos&0XFF); 80052b8: 88fb ldrh r3, [r7, #6] 80052ba: b2db uxtb r3, r3 80052bc: b29b uxth r3, r3 80052be: 4618 mov r0, r3 80052c0: f7ff fc76 bl 8004bb0 LCD_WR_REG(lcddev.setycmd); 80052c4: 4b33 ldr r3, [pc, #204] ; (8005394 ) 80052c6: 7a5b ldrb r3, [r3, #9] 80052c8: b29b uxth r3, r3 80052ca: 4618 mov r0, r3 80052cc: f7ff fc62 bl 8004b94 LCD_WR_DATA(Ypos>>8); 80052d0: 88bb ldrh r3, [r7, #4] 80052d2: 0a1b lsrs r3, r3, #8 80052d4: b29b uxth r3, r3 80052d6: 4618 mov r0, r3 80052d8: f7ff fc6a bl 8004bb0 LCD_WR_DATA(Ypos&0XFF); 80052dc: 88bb ldrh r3, [r7, #4] 80052de: b2db uxtb r3, r3 80052e0: b29b uxth r3, r3 80052e2: 4618 mov r0, r3 80052e4: f7ff fc64 bl 8004bb0 { if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//ºáÆÁÆäʵ¾ÍÊǵ÷תx,y×ø±ê LCD_WriteReg(lcddev.setxcmd, Xpos); LCD_WriteReg(lcddev.setycmd, Ypos); } } 80052e8: e050 b.n 800538c }else if(lcddev.id==0X6804) 80052ea: 4b2a ldr r3, [pc, #168] ; (8005394 ) 80052ec: 889b ldrh r3, [r3, #4] 80052ee: f646 0204 movw r2, #26628 ; 0x6804 80052f2: 4293 cmp r3, r2 80052f4: d12f bne.n 8005356 if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//ºáÆÁʱ´¦Àí 80052f6: 4b27 ldr r3, [pc, #156] ; (8005394 ) 80052f8: 799b ldrb r3, [r3, #6] 80052fa: 2b01 cmp r3, #1 80052fc: d106 bne.n 800530c 80052fe: 4b25 ldr r3, [pc, #148] ; (8005394 ) 8005300: 881a ldrh r2, [r3, #0] 8005302: 88fb ldrh r3, [r7, #6] 8005304: 1ad3 subs r3, r2, r3 8005306: b29b uxth r3, r3 8005308: 3b01 subs r3, #1 800530a: 80fb strh r3, [r7, #6] LCD_WR_REG(lcddev.setxcmd); 800530c: 4b21 ldr r3, [pc, #132] ; (8005394 ) 800530e: 7a1b ldrb r3, [r3, #8] 8005310: b29b uxth r3, r3 8005312: 4618 mov r0, r3 8005314: f7ff fc3e bl 8004b94 LCD_WR_DATA(Xpos>>8); 8005318: 88fb ldrh r3, [r7, #6] 800531a: 0a1b lsrs r3, r3, #8 800531c: b29b uxth r3, r3 800531e: 4618 mov r0, r3 8005320: f7ff fc46 bl 8004bb0 LCD_WR_DATA(Xpos&0XFF); 8005324: 88fb ldrh r3, [r7, #6] 8005326: b2db uxtb r3, r3 8005328: b29b uxth r3, r3 800532a: 4618 mov r0, r3 800532c: f7ff fc40 bl 8004bb0 LCD_WR_REG(lcddev.setycmd); 8005330: 4b18 ldr r3, [pc, #96] ; (8005394 ) 8005332: 7a5b ldrb r3, [r3, #9] 8005334: b29b uxth r3, r3 8005336: 4618 mov r0, r3 8005338: f7ff fc2c bl 8004b94 LCD_WR_DATA(Ypos>>8); 800533c: 88bb ldrh r3, [r7, #4] 800533e: 0a1b lsrs r3, r3, #8 8005340: b29b uxth r3, r3 8005342: 4618 mov r0, r3 8005344: f7ff fc34 bl 8004bb0 LCD_WR_DATA(Ypos&0XFF); 8005348: 88bb ldrh r3, [r7, #4] 800534a: b2db uxtb r3, r3 800534c: b29b uxth r3, r3 800534e: 4618 mov r0, r3 8005350: f7ff fc2e bl 8004bb0 } 8005354: e01a b.n 800538c if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//ºáÆÁÆäʵ¾ÍÊǵ÷תx,y×ø±ê 8005356: 4b0f ldr r3, [pc, #60] ; (8005394 ) 8005358: 799b ldrb r3, [r3, #6] 800535a: 2b01 cmp r3, #1 800535c: d106 bne.n 800536c 800535e: 4b0d ldr r3, [pc, #52] ; (8005394 ) 8005360: 881a ldrh r2, [r3, #0] 8005362: 88fb ldrh r3, [r7, #6] 8005364: 1ad3 subs r3, r2, r3 8005366: b29b uxth r3, r3 8005368: 3b01 subs r3, #1 800536a: 80fb strh r3, [r7, #6] LCD_WriteReg(lcddev.setxcmd, Xpos); 800536c: 4b09 ldr r3, [pc, #36] ; (8005394 ) 800536e: 7a1b ldrb r3, [r3, #8] 8005370: b29b uxth r3, r3 8005372: 88fa ldrh r2, [r7, #6] 8005374: 4611 mov r1, r2 8005376: 4618 mov r0, r3 8005378: f7ff fc2a bl 8004bd0 LCD_WriteReg(lcddev.setycmd, Ypos); 800537c: 4b05 ldr r3, [pc, #20] ; (8005394 ) 800537e: 7a5b ldrb r3, [r3, #9] 8005380: b29b uxth r3, r3 8005382: 88ba ldrh r2, [r7, #4] 8005384: 4611 mov r1, r2 8005386: 4618 mov r0, r3 8005388: f7ff fc22 bl 8004bd0 } 800538c: bf00 nop 800538e: 3708 adds r7, #8 8005390: 46bd mov sp, r7 8005392: bd80 pop {r7, pc} 8005394: 20000354 .word 0x20000354 08005398 : } //»­µã //x,y:×ø±ê //POINT_COLOR:´ËµãµÄÑÕÉ« void LCD_set_dot(uint16_t x,uint16_t y,uint16_t color) { 8005398: b580 push {r7, lr} 800539a: b082 sub sp, #8 800539c: af00 add r7, sp, #0 800539e: 4603 mov r3, r0 80053a0: 80fb strh r3, [r7, #6] 80053a2: 460b mov r3, r1 80053a4: 80bb strh r3, [r7, #4] 80053a6: 4613 mov r3, r2 80053a8: 807b strh r3, [r7, #2] LCD_SetCursor(x,y); //ÉèÖùâ±êλÖà 80053aa: 88ba ldrh r2, [r7, #4] 80053ac: 88fb ldrh r3, [r7, #6] 80053ae: 4611 mov r1, r2 80053b0: 4618 mov r0, r3 80053b2: f7ff ff61 bl 8005278 LCD_REG_ADDRESS=lcddev.wramcmd; //¿ªÊ¼Ð´ÈëGRAM 80053b6: 4b06 ldr r3, [pc, #24] ; (80053d0 ) 80053b8: 79da ldrb r2, [r3, #7] 80053ba: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000 80053be: b292 uxth r2, r2 80053c0: 801a strh r2, [r3, #0] LCD_DATA_ADDRESS=color; 80053c2: 4a04 ldr r2, [pc, #16] ; (80053d4 ) 80053c4: 887b ldrh r3, [r7, #2] 80053c6: 8013 strh r3, [r2, #0] } 80053c8: bf00 nop 80053ca: 3708 adds r7, #8 80053cc: 46bd mov sp, r7 80053ce: bd80 pop {r7, pc} 80053d0: 20000354 .word 0x20000354 80053d4: 6c000800 .word 0x6c000800 080053d8 : //ÇåÆÁº¯Êý //color:ÒªÇåÆÁµÄÌî³äÉ« void LCD_Clear(uint16_t color) { 80053d8: b580 push {r7, lr} 80053da: b084 sub sp, #16 80053dc: af00 add r7, sp, #0 80053de: 4603 mov r3, r0 80053e0: 80fb strh r3, [r7, #6] uint32_t index=0; 80053e2: 2300 movs r3, #0 80053e4: 60fb str r3, [r7, #12] uint32_t totalpoint=lcddev.width; 80053e6: 4b23 ldr r3, [pc, #140] ; (8005474 ) 80053e8: 881b ldrh r3, [r3, #0] 80053ea: 60bb str r3, [r7, #8] totalpoint*=lcddev.height; //µÃµ½×ܵãÊý 80053ec: 4b21 ldr r3, [pc, #132] ; (8005474 ) 80053ee: 885b ldrh r3, [r3, #2] 80053f0: 461a mov r2, r3 80053f2: 68bb ldr r3, [r7, #8] 80053f4: fb02 f303 mul.w r3, r2, r3 80053f8: 60bb str r3, [r7, #8] if((lcddev.id==0X6804)&&(lcddev.dir==1))//6804ºáÆÁµÄʱºòÌØÊâ´¦Àí 80053fa: 4b1e ldr r3, [pc, #120] ; (8005474 ) 80053fc: 889b ldrh r3, [r3, #4] 80053fe: f646 0204 movw r2, #26628 ; 0x6804 8005402: 4293 cmp r3, r2 8005404: d11a bne.n 800543c 8005406: 4b1b ldr r3, [pc, #108] ; (8005474 ) 8005408: 799b ldrb r3, [r3, #6] 800540a: 2b01 cmp r3, #1 800540c: d116 bne.n 800543c { lcddev.dir=0; 800540e: 4b19 ldr r3, [pc, #100] ; (8005474 ) 8005410: 2200 movs r2, #0 8005412: 719a strb r2, [r3, #6] lcddev.setxcmd=0X2A; 8005414: 4b17 ldr r3, [pc, #92] ; (8005474 ) 8005416: 222a movs r2, #42 ; 0x2a 8005418: 721a strb r2, [r3, #8] lcddev.setycmd=0X2B; 800541a: 4b16 ldr r3, [pc, #88] ; (8005474 ) 800541c: 222b movs r2, #43 ; 0x2b 800541e: 725a strb r2, [r3, #9] LCD_SetCursor(0x00,0x0000); //ÉèÖùâ±êλÖà 8005420: 2100 movs r1, #0 8005422: 2000 movs r0, #0 8005424: f7ff ff28 bl 8005278 lcddev.dir=1; 8005428: 4b12 ldr r3, [pc, #72] ; (8005474 ) 800542a: 2201 movs r2, #1 800542c: 719a strb r2, [r3, #6] lcddev.setxcmd=0X2B; 800542e: 4b11 ldr r3, [pc, #68] ; (8005474 ) 8005430: 222b movs r2, #43 ; 0x2b 8005432: 721a strb r2, [r3, #8] lcddev.setycmd=0X2A; 8005434: 4b0f ldr r3, [pc, #60] ; (8005474 ) 8005436: 222a movs r2, #42 ; 0x2a 8005438: 725a strb r2, [r3, #9] 800543a: e003 b.n 8005444 }else LCD_SetCursor(0x00,0x0000); //ÉèÖùâ±êλÖà 800543c: 2100 movs r1, #0 800543e: 2000 movs r0, #0 8005440: f7ff ff1a bl 8005278 LCD_REG_ADDRESS=lcddev.wramcmd; //¿ªÊ¼Ð´ÈëGRAM 8005444: 4b0b ldr r3, [pc, #44] ; (8005474 ) 8005446: 79da ldrb r2, [r3, #7] 8005448: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000 800544c: b292 uxth r2, r2 800544e: 801a strh r2, [r3, #0] for(index=0;index { LCD_DATA_ADDRESS=color; 8005456: 4a08 ldr r2, [pc, #32] ; (8005478 ) 8005458: 88fb ldrh r3, [r7, #6] 800545a: 8013 strh r3, [r2, #0] for(index=0;index } } 800546a: bf00 nop 800546c: bf00 nop 800546e: 3710 adds r7, #16 8005470: 46bd mov sp, r7 8005472: bd80 pop {r7, pc} 8005474: 20000354 .word 0x20000354 8005478: 6c000800 .word 0x6c000800 0800547c : //***********************************2D //»­Ïß //x1,y1:Æðµã×ø±ê //x2,y2:ÖÕµã×ø±ê void LCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2,uint16_t color) { 800547c: b590 push {r4, r7, lr} 800547e: b08d sub sp, #52 ; 0x34 8005480: af00 add r7, sp, #0 8005482: 4604 mov r4, r0 8005484: 4608 mov r0, r1 8005486: 4611 mov r1, r2 8005488: 461a mov r2, r3 800548a: 4623 mov r3, r4 800548c: 80fb strh r3, [r7, #6] 800548e: 4603 mov r3, r0 8005490: 80bb strh r3, [r7, #4] 8005492: 460b mov r3, r1 8005494: 807b strh r3, [r7, #2] 8005496: 4613 mov r3, r2 8005498: 803b strh r3, [r7, #0] uint16_t t; int xerr=0,yerr=0,delta_x,delta_y,distance; 800549a: 2300 movs r3, #0 800549c: 62bb str r3, [r7, #40] ; 0x28 800549e: 2300 movs r3, #0 80054a0: 627b str r3, [r7, #36] ; 0x24 int incx,incy,uRow,uCol; delta_x=x2-x1; //¼ÆËã×ø±êÔöÁ¿ 80054a2: 887a ldrh r2, [r7, #2] 80054a4: 88fb ldrh r3, [r7, #6] 80054a6: 1ad3 subs r3, r2, r3 80054a8: 623b str r3, [r7, #32] delta_y=y2-y1; 80054aa: 883a ldrh r2, [r7, #0] 80054ac: 88bb ldrh r3, [r7, #4] 80054ae: 1ad3 subs r3, r2, r3 80054b0: 61fb str r3, [r7, #28] uRow=x1; 80054b2: 88fb ldrh r3, [r7, #6] 80054b4: 60fb str r3, [r7, #12] uCol=y1; 80054b6: 88bb ldrh r3, [r7, #4] 80054b8: 60bb str r3, [r7, #8] if(delta_x>0)incx=1; //ÉèÖõ¥²½·½Ïò 80054ba: 6a3b ldr r3, [r7, #32] 80054bc: 2b00 cmp r3, #0 80054be: dd02 ble.n 80054c6 80054c0: 2301 movs r3, #1 80054c2: 617b str r3, [r7, #20] 80054c4: e00b b.n 80054de else if(delta_x==0)incx=0;//´¹Ö±Ïß 80054c6: 6a3b ldr r3, [r7, #32] 80054c8: 2b00 cmp r3, #0 80054ca: d102 bne.n 80054d2 80054cc: 2300 movs r3, #0 80054ce: 617b str r3, [r7, #20] 80054d0: e005 b.n 80054de else {incx=-1;delta_x=-delta_x;} 80054d2: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff 80054d6: 617b str r3, [r7, #20] 80054d8: 6a3b ldr r3, [r7, #32] 80054da: 425b negs r3, r3 80054dc: 623b str r3, [r7, #32] if(delta_y>0)incy=1; 80054de: 69fb ldr r3, [r7, #28] 80054e0: 2b00 cmp r3, #0 80054e2: dd02 ble.n 80054ea 80054e4: 2301 movs r3, #1 80054e6: 613b str r3, [r7, #16] 80054e8: e00b b.n 8005502 else if(delta_y==0)incy=0;//ˮƽÏß 80054ea: 69fb ldr r3, [r7, #28] 80054ec: 2b00 cmp r3, #0 80054ee: d102 bne.n 80054f6 80054f0: 2300 movs r3, #0 80054f2: 613b str r3, [r7, #16] 80054f4: e005 b.n 8005502 else{incy=-1;delta_y=-delta_y;} 80054f6: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff 80054fa: 613b str r3, [r7, #16] 80054fc: 69fb ldr r3, [r7, #28] 80054fe: 425b negs r3, r3 8005500: 61fb str r3, [r7, #28] if( delta_x>delta_y)distance=delta_x; //Ñ¡È¡»ù±¾ÔöÁ¿×ø±êÖá 8005502: 6a3a ldr r2, [r7, #32] 8005504: 69fb ldr r3, [r7, #28] 8005506: 429a cmp r2, r3 8005508: dd02 ble.n 8005510 800550a: 6a3b ldr r3, [r7, #32] 800550c: 61bb str r3, [r7, #24] 800550e: e001 b.n 8005514 else distance=delta_y; 8005510: 69fb ldr r3, [r7, #28] 8005512: 61bb str r3, [r7, #24] for(t=0;t<=distance+1;t++ )//»­ÏßÊä³ö 8005514: 2300 movs r3, #0 8005516: 85fb strh r3, [r7, #46] ; 0x2e 8005518: e02b b.n 8005572 { LCD_set_dot(uRow,uCol,color);//»­µã 800551a: 68fb ldr r3, [r7, #12] 800551c: b29b uxth r3, r3 800551e: 68ba ldr r2, [r7, #8] 8005520: b291 uxth r1, r2 8005522: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40 8005526: 4618 mov r0, r3 8005528: f7ff ff36 bl 8005398 xerr+=delta_x ; 800552c: 6aba ldr r2, [r7, #40] ; 0x28 800552e: 6a3b ldr r3, [r7, #32] 8005530: 4413 add r3, r2 8005532: 62bb str r3, [r7, #40] ; 0x28 yerr+=delta_y ; 8005534: 6a7a ldr r2, [r7, #36] ; 0x24 8005536: 69fb ldr r3, [r7, #28] 8005538: 4413 add r3, r2 800553a: 627b str r3, [r7, #36] ; 0x24 if(xerr>distance) 800553c: 6aba ldr r2, [r7, #40] ; 0x28 800553e: 69bb ldr r3, [r7, #24] 8005540: 429a cmp r2, r3 8005542: dd07 ble.n 8005554 { xerr-=distance; 8005544: 6aba ldr r2, [r7, #40] ; 0x28 8005546: 69bb ldr r3, [r7, #24] 8005548: 1ad3 subs r3, r2, r3 800554a: 62bb str r3, [r7, #40] ; 0x28 uRow+=incx; 800554c: 68fa ldr r2, [r7, #12] 800554e: 697b ldr r3, [r7, #20] 8005550: 4413 add r3, r2 8005552: 60fb str r3, [r7, #12] } if(yerr>distance) 8005554: 6a7a ldr r2, [r7, #36] ; 0x24 8005556: 69bb ldr r3, [r7, #24] 8005558: 429a cmp r2, r3 800555a: dd07 ble.n 800556c { yerr-=distance; 800555c: 6a7a ldr r2, [r7, #36] ; 0x24 800555e: 69bb ldr r3, [r7, #24] 8005560: 1ad3 subs r3, r2, r3 8005562: 627b str r3, [r7, #36] ; 0x24 uCol+=incy; 8005564: 68ba ldr r2, [r7, #8] 8005566: 693b ldr r3, [r7, #16] 8005568: 4413 add r3, r2 800556a: 60bb str r3, [r7, #8] for(t=0;t<=distance+1;t++ )//»­ÏßÊä³ö 800556c: 8dfb ldrh r3, [r7, #46] ; 0x2e 800556e: 3301 adds r3, #1 8005570: 85fb strh r3, [r7, #46] ; 0x2e 8005572: 8dfa ldrh r2, [r7, #46] ; 0x2e 8005574: 69bb ldr r3, [r7, #24] 8005576: 3301 adds r3, #1 8005578: 429a cmp r2, r3 800557a: ddce ble.n 800551a } } } 800557c: bf00 nop 800557e: bf00 nop 8005580: 3734 adds r7, #52 ; 0x34 8005582: 46bd mov sp, r7 8005584: bd90 pop {r4, r7, pc} 08005586 : //ÔÚÖ¸¶¨Î»Öû­Ò»¸öÖ¸¶¨´óСµÄÔ² //(x,y):ÖÐÐĵã //r :°ë¾¶ void Draw_Circle(uint16_t x0,uint16_t y0,uint16_t r,uint16_t color) { 8005586: b590 push {r4, r7, lr} 8005588: b087 sub sp, #28 800558a: af00 add r7, sp, #0 800558c: 4604 mov r4, r0 800558e: 4608 mov r0, r1 8005590: 4611 mov r1, r2 8005592: 461a mov r2, r3 8005594: 4623 mov r3, r4 8005596: 80fb strh r3, [r7, #6] 8005598: 4603 mov r3, r0 800559a: 80bb strh r3, [r7, #4] 800559c: 460b mov r3, r1 800559e: 807b strh r3, [r7, #2] 80055a0: 4613 mov r3, r2 80055a2: 803b strh r3, [r7, #0] int a,b; int di; a=0;b=r; 80055a4: 2300 movs r3, #0 80055a6: 617b str r3, [r7, #20] 80055a8: 887b ldrh r3, [r7, #2] 80055aa: 613b str r3, [r7, #16] di=3-(r<<1); //ÅжÏϸöµãλÖõıêÖ¾ 80055ac: 887b ldrh r3, [r7, #2] 80055ae: 005b lsls r3, r3, #1 80055b0: f1c3 0303 rsb r3, r3, #3 80055b4: 60fb str r3, [r7, #12] while(a<=b) 80055b6: e087 b.n 80056c8 { LCD_set_dot(x0+a,y0-b,color); //5 80055b8: 697b ldr r3, [r7, #20] 80055ba: b29a uxth r2, r3 80055bc: 88fb ldrh r3, [r7, #6] 80055be: 4413 add r3, r2 80055c0: b298 uxth r0, r3 80055c2: 693b ldr r3, [r7, #16] 80055c4: b29b uxth r3, r3 80055c6: 88ba ldrh r2, [r7, #4] 80055c8: 1ad3 subs r3, r2, r3 80055ca: b29b uxth r3, r3 80055cc: 883a ldrh r2, [r7, #0] 80055ce: 4619 mov r1, r3 80055d0: f7ff fee2 bl 8005398 LCD_set_dot(x0+b,y0-a,color); //0 80055d4: 693b ldr r3, [r7, #16] 80055d6: b29a uxth r2, r3 80055d8: 88fb ldrh r3, [r7, #6] 80055da: 4413 add r3, r2 80055dc: b298 uxth r0, r3 80055de: 697b ldr r3, [r7, #20] 80055e0: b29b uxth r3, r3 80055e2: 88ba ldrh r2, [r7, #4] 80055e4: 1ad3 subs r3, r2, r3 80055e6: b29b uxth r3, r3 80055e8: 883a ldrh r2, [r7, #0] 80055ea: 4619 mov r1, r3 80055ec: f7ff fed4 bl 8005398 LCD_set_dot(x0+b,y0+a,color); //4 80055f0: 693b ldr r3, [r7, #16] 80055f2: b29a uxth r2, r3 80055f4: 88fb ldrh r3, [r7, #6] 80055f6: 4413 add r3, r2 80055f8: b298 uxth r0, r3 80055fa: 697b ldr r3, [r7, #20] 80055fc: b29a uxth r2, r3 80055fe: 88bb ldrh r3, [r7, #4] 8005600: 4413 add r3, r2 8005602: b29b uxth r3, r3 8005604: 883a ldrh r2, [r7, #0] 8005606: 4619 mov r1, r3 8005608: f7ff fec6 bl 8005398 LCD_set_dot(x0+a,y0+b,color); //6 800560c: 697b ldr r3, [r7, #20] 800560e: b29a uxth r2, r3 8005610: 88fb ldrh r3, [r7, #6] 8005612: 4413 add r3, r2 8005614: b298 uxth r0, r3 8005616: 693b ldr r3, [r7, #16] 8005618: b29a uxth r2, r3 800561a: 88bb ldrh r3, [r7, #4] 800561c: 4413 add r3, r2 800561e: b29b uxth r3, r3 8005620: 883a ldrh r2, [r7, #0] 8005622: 4619 mov r1, r3 8005624: f7ff feb8 bl 8005398 LCD_set_dot(x0-a,y0+b,color); //1 8005628: 697b ldr r3, [r7, #20] 800562a: b29b uxth r3, r3 800562c: 88fa ldrh r2, [r7, #6] 800562e: 1ad3 subs r3, r2, r3 8005630: b298 uxth r0, r3 8005632: 693b ldr r3, [r7, #16] 8005634: b29a uxth r2, r3 8005636: 88bb ldrh r3, [r7, #4] 8005638: 4413 add r3, r2 800563a: b29b uxth r3, r3 800563c: 883a ldrh r2, [r7, #0] 800563e: 4619 mov r1, r3 8005640: f7ff feaa bl 8005398 LCD_set_dot(x0-b,y0+a,color); 8005644: 693b ldr r3, [r7, #16] 8005646: b29b uxth r3, r3 8005648: 88fa ldrh r2, [r7, #6] 800564a: 1ad3 subs r3, r2, r3 800564c: b298 uxth r0, r3 800564e: 697b ldr r3, [r7, #20] 8005650: b29a uxth r2, r3 8005652: 88bb ldrh r3, [r7, #4] 8005654: 4413 add r3, r2 8005656: b29b uxth r3, r3 8005658: 883a ldrh r2, [r7, #0] 800565a: 4619 mov r1, r3 800565c: f7ff fe9c bl 8005398 LCD_set_dot(x0-a,y0-b,color); //2 8005660: 697b ldr r3, [r7, #20] 8005662: b29b uxth r3, r3 8005664: 88fa ldrh r2, [r7, #6] 8005666: 1ad3 subs r3, r2, r3 8005668: b298 uxth r0, r3 800566a: 693b ldr r3, [r7, #16] 800566c: b29b uxth r3, r3 800566e: 88ba ldrh r2, [r7, #4] 8005670: 1ad3 subs r3, r2, r3 8005672: b29b uxth r3, r3 8005674: 883a ldrh r2, [r7, #0] 8005676: 4619 mov r1, r3 8005678: f7ff fe8e bl 8005398 LCD_set_dot(x0-b,y0-a,color); //7 800567c: 693b ldr r3, [r7, #16] 800567e: b29b uxth r3, r3 8005680: 88fa ldrh r2, [r7, #6] 8005682: 1ad3 subs r3, r2, r3 8005684: b298 uxth r0, r3 8005686: 697b ldr r3, [r7, #20] 8005688: b29b uxth r3, r3 800568a: 88ba ldrh r2, [r7, #4] 800568c: 1ad3 subs r3, r2, r3 800568e: b29b uxth r3, r3 8005690: 883a ldrh r2, [r7, #0] 8005692: 4619 mov r1, r3 8005694: f7ff fe80 bl 8005398 a++; 8005698: 697b ldr r3, [r7, #20] 800569a: 3301 adds r3, #1 800569c: 617b str r3, [r7, #20] //ʹÓÃBresenhamËã·¨»­Ô² if(di<0)di +=4*a+6; 800569e: 68fb ldr r3, [r7, #12] 80056a0: 2b00 cmp r3, #0 80056a2: da06 bge.n 80056b2 80056a4: 697b ldr r3, [r7, #20] 80056a6: 009b lsls r3, r3, #2 80056a8: 3306 adds r3, #6 80056aa: 68fa ldr r2, [r7, #12] 80056ac: 4413 add r3, r2 80056ae: 60fb str r3, [r7, #12] 80056b0: e00a b.n 80056c8 else { di+=10+4*(a-b); 80056b2: 697a ldr r2, [r7, #20] 80056b4: 693b ldr r3, [r7, #16] 80056b6: 1ad3 subs r3, r2, r3 80056b8: 009b lsls r3, r3, #2 80056ba: 330a adds r3, #10 80056bc: 68fa ldr r2, [r7, #12] 80056be: 4413 add r3, r2 80056c0: 60fb str r3, [r7, #12] b--; 80056c2: 693b ldr r3, [r7, #16] 80056c4: 3b01 subs r3, #1 80056c6: 613b str r3, [r7, #16] while(a<=b) 80056c8: 697a ldr r2, [r7, #20] 80056ca: 693b ldr r3, [r7, #16] 80056cc: 429a cmp r2, r3 80056ce: f77f af73 ble.w 80055b8 } } } 80056d2: bf00 nop 80056d4: bf00 nop 80056d6: 371c adds r7, #28 80056d8: 46bd mov sp, r7 80056da: bd90 pop {r4, r7, pc} 080056dc : //num:ÒªÏÔʾµÄ×Ö·û:" "--->"~" //size:×ÖÌå´óС 12/16 //mode:µþ¼Ó·½Ê½(1)»¹ÊǷǵþ¼Ó·½Ê½(0) void LCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint16_t bg,uint16_t color) { 80056dc: b590 push {r4, r7, lr} 80056de: b085 sub sp, #20 80056e0: af00 add r7, sp, #0 80056e2: 4604 mov r4, r0 80056e4: 4608 mov r0, r1 80056e6: 4611 mov r1, r2 80056e8: 461a mov r2, r3 80056ea: 4623 mov r3, r4 80056ec: 80fb strh r3, [r7, #6] 80056ee: 4603 mov r3, r0 80056f0: 80bb strh r3, [r7, #4] 80056f2: 460b mov r3, r1 80056f4: 70fb strb r3, [r7, #3] 80056f6: 4613 mov r3, r2 80056f8: 70bb strb r3, [r7, #2] uint8_t temp,t1,t; uint16_t y0=y; 80056fa: 88bb ldrh r3, [r7, #4] 80056fc: 817b strh r3, [r7, #10] //ÉèÖô°¿Ú num=num-' ';//µÃµ½Æ«ÒƺóµÄÖµ 80056fe: 78fb ldrb r3, [r7, #3] 8005700: 3b20 subs r3, #32 8005702: 70fb strb r3, [r7, #3] for(t=0;t { if(size==12){temp=asc2_1206[num][t];} //µ÷ÓÃ1206×ÖÌå 800570a: 78bb ldrb r3, [r7, #2] 800570c: 2b0c cmp r3, #12 800570e: d10b bne.n 8005728 8005710: 78fa ldrb r2, [r7, #3] 8005712: 7b79 ldrb r1, [r7, #13] 8005714: 482c ldr r0, [pc, #176] ; (80057c8 ) 8005716: 4613 mov r3, r2 8005718: 005b lsls r3, r3, #1 800571a: 4413 add r3, r2 800571c: 009b lsls r3, r3, #2 800571e: 4403 add r3, r0 8005720: 440b add r3, r1 8005722: 781b ldrb r3, [r3, #0] 8005724: 73fb strb r3, [r7, #15] 8005726: e007 b.n 8005738 else{ temp=asc2_1608[num][t]; } //µ÷ÓÃ1608×ÖÌå 8005728: 78fa ldrb r2, [r7, #3] 800572a: 7b7b ldrb r3, [r7, #13] 800572c: 4927 ldr r1, [pc, #156] ; (80057cc ) 800572e: 0112 lsls r2, r2, #4 8005730: 440a add r2, r1 8005732: 4413 add r3, r2 8005734: 781b ldrb r3, [r3, #0] 8005736: 73fb strb r3, [r7, #15] for(t1=0;t1<8;t1++) 8005738: 2300 movs r3, #0 800573a: 73bb strb r3, [r7, #14] 800573c: e033 b.n 80057a6 { if(temp&0x80){LCD_set_dot(x,y,color);}else{if(bg!=color){LCD_set_dot(x,y,bg);}} 800573e: f997 300f ldrsb.w r3, [r7, #15] 8005742: 2b00 cmp r3, #0 8005744: da06 bge.n 8005754 8005746: 8cba ldrh r2, [r7, #36] ; 0x24 8005748: 88b9 ldrh r1, [r7, #4] 800574a: 88fb ldrh r3, [r7, #6] 800574c: 4618 mov r0, r3 800574e: f7ff fe23 bl 8005398 8005752: e009 b.n 8005768 8005754: 8c3a ldrh r2, [r7, #32] 8005756: 8cbb ldrh r3, [r7, #36] ; 0x24 8005758: 429a cmp r2, r3 800575a: d005 beq.n 8005768 800575c: 8c3a ldrh r2, [r7, #32] 800575e: 88b9 ldrh r1, [r7, #4] 8005760: 88fb ldrh r3, [r7, #6] 8005762: 4618 mov r0, r3 8005764: f7ff fe18 bl 8005398 temp<<=1; 8005768: 7bfb ldrb r3, [r7, #15] 800576a: 005b lsls r3, r3, #1 800576c: 73fb strb r3, [r7, #15] y++; 800576e: 88bb ldrh r3, [r7, #4] 8005770: 3301 adds r3, #1 8005772: 80bb strh r3, [r7, #4] if(x>=lcddev.width){return;}//³¬ÇøÓòÁË 8005774: 4b16 ldr r3, [pc, #88] ; (80057d0 ) 8005776: 881b ldrh r3, [r3, #0] 8005778: 88fa ldrh r2, [r7, #6] 800577a: 429a cmp r2, r3 800577c: d220 bcs.n 80057c0 if((y-y0)==size) 800577e: 88ba ldrh r2, [r7, #4] 8005780: 897b ldrh r3, [r7, #10] 8005782: 1ad2 subs r2, r2, r3 8005784: 78bb ldrb r3, [r7, #2] 8005786: 429a cmp r2, r3 8005788: d10a bne.n 80057a0 { y=y0; 800578a: 897b ldrh r3, [r7, #10] 800578c: 80bb strh r3, [r7, #4] x++; 800578e: 88fb ldrh r3, [r7, #6] 8005790: 3301 adds r3, #1 8005792: 80fb strh r3, [r7, #6] if(x>=lcddev.width){return;}//³¬ÇøÓòÁË 8005794: 4b0e ldr r3, [pc, #56] ; (80057d0 ) 8005796: 881b ldrh r3, [r3, #0] 8005798: 88fa ldrh r2, [r7, #6] 800579a: 429a cmp r2, r3 800579c: d307 bcc.n 80057ae 800579e: e010 b.n 80057c2 for(t1=0;t1<8;t1++) 80057a0: 7bbb ldrb r3, [r7, #14] 80057a2: 3301 adds r3, #1 80057a4: 73bb strb r3, [r7, #14] 80057a6: 7bbb ldrb r3, [r7, #14] 80057a8: 2b07 cmp r3, #7 80057aa: d9c8 bls.n 800573e 80057ac: e000 b.n 80057b0 break; 80057ae: bf00 nop for(t=0;t 80057be: e000 b.n 80057c2 if(x>=lcddev.width){return;}//³¬ÇøÓòÁË 80057c0: bf00 nop } } } 80057c2: 3714 adds r7, #20 80057c4: 46bd mov sp, r7 80057c6: bd90 pop {r4, r7, pc} 80057c8: 0800a4d4 .word 0x0800a4d4 80057cc: 0800a948 .word 0x0800a948 80057d0: 20000354 .word 0x20000354 080057d4 : //width,height:ÇøÓò´óС //size:×ÖÌå´óС //*p:×Ö·û´®ÆðʼµØÖ· void LCD_ShowString(uint16_t x,uint16_t y,uint8_t *p,uint8_t size,uint16_t bg,uint16_t color) { 80057d4: b590 push {r4, r7, lr} 80057d6: b087 sub sp, #28 80057d8: af02 add r7, sp, #8 80057da: 60ba str r2, [r7, #8] 80057dc: 461a mov r2, r3 80057de: 4603 mov r3, r0 80057e0: 81fb strh r3, [r7, #14] 80057e2: 460b mov r3, r1 80057e4: 81bb strh r3, [r7, #12] 80057e6: 4613 mov r3, r2 80057e8: 71fb strb r3, [r7, #7] while(*p!='\0') 80057ea: e026 b.n 800583a { if(x>=lcddev.width||*p=='\n') 80057ec: 4b17 ldr r3, [pc, #92] ; (800584c ) 80057ee: 881b ldrh r3, [r3, #0] 80057f0: 89fa ldrh r2, [r7, #14] 80057f2: 429a cmp r2, r3 80057f4: d203 bcs.n 80057fe 80057f6: 68bb ldr r3, [r7, #8] 80057f8: 781b ldrb r3, [r3, #0] 80057fa: 2b0a cmp r3, #10 80057fc: d107 bne.n 800580e { x=0; 80057fe: 2300 movs r3, #0 8005800: 81fb strh r3, [r7, #14] y+=size; 8005802: 79fb ldrb r3, [r7, #7] 8005804: b29a uxth r2, r3 8005806: 89bb ldrh r3, [r7, #12] 8005808: 4413 add r3, r2 800580a: 81bb strh r3, [r7, #12] 800580c: e012 b.n 8005834 }else { LCD_ShowChar(x,y,*p,size,bg,color); 800580e: 68bb ldr r3, [r7, #8] 8005810: 781a ldrb r2, [r3, #0] 8005812: 79fc ldrb r4, [r7, #7] 8005814: 89b9 ldrh r1, [r7, #12] 8005816: 89f8 ldrh r0, [r7, #14] 8005818: 8cbb ldrh r3, [r7, #36] ; 0x24 800581a: 9301 str r3, [sp, #4] 800581c: 8c3b ldrh r3, [r7, #32] 800581e: 9300 str r3, [sp, #0] 8005820: 4623 mov r3, r4 8005822: f7ff ff5b bl 80056dc x+=(size/2); 8005826: 79fb ldrb r3, [r7, #7] 8005828: 085b lsrs r3, r3, #1 800582a: b2db uxtb r3, r3 800582c: b29a uxth r2, r3 800582e: 89fb ldrh r3, [r7, #14] 8005830: 4413 add r3, r2 8005832: 81fb strh r3, [r7, #14] } p++; 8005834: 68bb ldr r3, [r7, #8] 8005836: 3301 adds r3, #1 8005838: 60bb str r3, [r7, #8] while(*p!='\0') 800583a: 68bb ldr r3, [r7, #8] 800583c: 781b ldrb r3, [r3, #0] 800583e: 2b00 cmp r3, #0 8005840: d1d4 bne.n 80057ec } } 8005842: bf00 nop 8005844: bf00 nop 8005846: 3714 adds r7, #20 8005848: 46bd mov sp, r7 800584a: bd90 pop {r4, r7, pc} 800584c: 20000354 .word 0x20000354 08005850 : //ÒòΪeepromоƬµÄдÈëËÙ¶ÈÓÐÏÞ£¬Ã¿Ð´ÈëÒ»¸ö×Ö·û¶¼ÐèÒªµÈ´ýÒ»¶Îʱ¼ä²ÅÄÜÍê³ÉдÈë //Õû¸öϵͳ²»¿ÉÄܵÈËüÒ»¸öµÄ£¬´«Í³µÄ½â¾ö·½·¨¿ÉÒÔʹÓö¨Ê±Æ÷ÖжϻòÕ߶àÏ߳̿ª±Ù×ÓÈÎÎñÔÚºǫ́±£´æ£¬ //ÕâÀïµÄ½â¾ö·½·¨ÊÇʹÓÃ״̬»ú£¬Í¨¹ýÒ»¸öÁ´±í½«Òª±£´æµÄÊý¾Ý´®ÆðÀ´£¬ÔÙͨ¹ý״̬ѭ»·Ò»¸ö¸ö±£´æ£¬±£´æÑÓʱµÈÓÚÑ­»·ÓÃʱ¡£ eeprom_write_buff_info eeprom_write_buffer; //´´½¨Á´±í void EPPROM_SLOWWRITE_INIT() //³õʼ»¯Á´±í { 8005850: b480 push {r7} 8005852: af00 add r7, sp, #0 eeprom_write_buffer.buff=NULL; 8005854: 4b0a ldr r3, [pc, #40] ; (8005880 ) 8005856: 2200 movs r2, #0 8005858: 601a str r2, [r3, #0] eeprom_write_buffer.end=NULL; 800585a: 4b09 ldr r3, [pc, #36] ; (8005880 ) 800585c: 2200 movs r2, #0 800585e: 609a str r2, [r3, #8] eeprom_write_buffer.head=NULL; 8005860: 4b07 ldr r3, [pc, #28] ; (8005880 ) 8005862: 2200 movs r2, #0 8005864: 605a str r2, [r3, #4] eeprom_write_buffer.save_timeout=5; //±ÜÃâ״̬»úÑ­»·¹ý¿ìµ¼Öµı£´æʧ°Ü£¬Õâ¸öÊÇ×îÉÙÑÓʱ¡££¨¸Ð¾õû±ØҪдÔÚÕâÀ̫ÀË·Ñ¿Õ¼äÁË£© 8005866: 4b06 ldr r3, [pc, #24] ; (8005880 ) 8005868: 2205 movs r2, #5 800586a: 741a strb r2, [r3, #16] eeprom_write_buffer.save_busy=0; //×îСÑÓʱÄÚΪæ״̬ 800586c: 4a04 ldr r2, [pc, #16] ; (8005880 ) 800586e: 7c53 ldrb r3, [r2, #17] 8005870: f36f 0300 bfc r3, #0, #1 8005874: 7453 strb r3, [r2, #17] } 8005876: bf00 nop 8005878: 46bd mov sp, r7 800587a: bc80 pop {r7} 800587c: 4770 bx lr 800587e: bf00 nop 8005880: 20000360 .word 0x20000360 08005884 : //Ñ­»·±£´æ·þÎñ£¬¼ì²éÁ´±íÍ·ÊÇ·ñÓÐÊý¾ÝÊÇ·ñæ¡£ void EEPROM_SLOWWRITE_SERVER() { 8005884: b580 push {r7, lr} 8005886: b082 sub sp, #8 8005888: af00 add r7, sp, #0 eeprom_write_buff *buff; char data; if(eeprom_write_buffer.save_busy) 800588a: 4b20 ldr r3, [pc, #128] ; (800590c ) 800588c: 7c5b ldrb r3, [r3, #17] 800588e: f003 0301 and.w r3, r3, #1 8005892: b2db uxtb r3, r3 8005894: 2b00 cmp r3, #0 8005896: d00c beq.n 80058b2 { if(HAL_GetTick()>eeprom_write_buffer.save_time) 8005898: f7fc f946 bl 8001b28 800589c: 4602 mov r2, r0 800589e: 4b1b ldr r3, [pc, #108] ; (800590c ) 80058a0: 68db ldr r3, [r3, #12] 80058a2: 429a cmp r2, r3 80058a4: d92e bls.n 8005904 { eeprom_write_buffer.save_busy=0; 80058a6: 4a19 ldr r2, [pc, #100] ; (800590c ) 80058a8: 7c53 ldrb r3, [r2, #17] 80058aa: f36f 0300 bfc r3, #0, #1 80058ae: 7453 strb r3, [r2, #17] free(eeprom_write_buffer.head); eeprom_write_buffer.head=buff; } } } 80058b0: e028 b.n 8005904 if(eeprom_write_buffer.head!=NULL) 80058b2: 4b16 ldr r3, [pc, #88] ; (800590c ) 80058b4: 685b ldr r3, [r3, #4] 80058b6: 2b00 cmp r3, #0 80058b8: d024 beq.n 8005904 eeprom_write_buffer.save_busy=1; 80058ba: 4a14 ldr r2, [pc, #80] ; (800590c ) 80058bc: 7c53 ldrb r3, [r2, #17] 80058be: f043 0301 orr.w r3, r3, #1 80058c2: 7453 strb r3, [r2, #17] eeprom_write_buffer.save_time=HAL_GetTick()+eeprom_write_buffer.save_timeout; 80058c4: f7fc f930 bl 8001b28 80058c8: 4603 mov r3, r0 80058ca: 4a10 ldr r2, [pc, #64] ; (800590c ) 80058cc: 7c12 ldrb r2, [r2, #16] 80058ce: 4413 add r3, r2 80058d0: 4a0e ldr r2, [pc, #56] ; (800590c ) 80058d2: 60d3 str r3, [r2, #12] buff=eeprom_write_buffer.head->next; 80058d4: 4b0d ldr r3, [pc, #52] ; (800590c ) 80058d6: 685b ldr r3, [r3, #4] 80058d8: 681b ldr r3, [r3, #0] 80058da: 607b str r3, [r7, #4] data=eeprom_write_buffer.head->date; 80058dc: 4b0b ldr r3, [pc, #44] ; (800590c ) 80058de: 685b ldr r3, [r3, #4] 80058e0: 799b ldrb r3, [r3, #6] 80058e2: 70fb strb r3, [r7, #3] IIC_SAND_DATE(EEPROM_ADDRESS,eeprom_write_buffer.head->add,&data,1); 80058e4: 4b09 ldr r3, [pc, #36] ; (800590c ) 80058e6: 685b ldr r3, [r3, #4] 80058e8: 8899 ldrh r1, [r3, #4] 80058ea: 1cfa adds r2, r7, #3 80058ec: 2301 movs r3, #1 80058ee: 20a0 movs r0, #160 ; 0xa0 80058f0: f000 f866 bl 80059c0 free(eeprom_write_buffer.head); 80058f4: 4b05 ldr r3, [pc, #20] ; (800590c ) 80058f6: 685b ldr r3, [r3, #4] 80058f8: 4618 mov r0, r3 80058fa: f001 feb5 bl 8007668 eeprom_write_buffer.head=buff; 80058fe: 4a03 ldr r2, [pc, #12] ; (800590c ) 8005900: 687b ldr r3, [r7, #4] 8005902: 6053 str r3, [r2, #4] } 8005904: bf00 nop 8005906: 3708 adds r7, #8 8005908: 46bd mov sp, r7 800590a: bd80 pop {r7, pc} 800590c: 20000360 .word 0x20000360 08005910 : //´Óeeprom¶ÁÈ¡Êý¾Ý void EEPROM_READ_BATY(uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG) { 8005910: b580 push {r7, lr} 8005912: b082 sub sp, #8 8005914: af00 add r7, sp, #0 8005916: 4603 mov r3, r0 8005918: 6039 str r1, [r7, #0] 800591a: 80fb strh r3, [r7, #6] 800591c: 4613 mov r3, r2 800591e: 80bb strh r3, [r7, #4] IIC_READ_DATE(EEPROM_ADDRESS,IN_DEVICE_ADD,DATAS,LONG); 8005920: 88bb ldrh r3, [r7, #4] 8005922: 88f9 ldrh r1, [r7, #6] 8005924: 683a ldr r2, [r7, #0] 8005926: 20a0 movs r0, #160 ; 0xa0 8005928: f000 f868 bl 80059fc } 800592c: bf00 nop 800592e: 3708 adds r7, #8 8005930: 46bd mov sp, r7 8005932: bd80 pop {r7, pc} 08005934 : //ÏòeepromдÈëÊý¾Ý void EEPROM_WRITE_BATY(uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG) { 8005934: b580 push {r7, lr} 8005936: b086 sub sp, #24 8005938: af00 add r7, sp, #0 800593a: 4603 mov r3, r0 800593c: 6039 str r1, [r7, #0] 800593e: 80fb strh r3, [r7, #6] 8005940: 4613 mov r3, r2 8005942: 80bb strh r3, [r7, #4] //IIC_SAND_DATE(EEPROM_ADDRESS,IN_DEVICE_ADD,DATAS,LONG); uint16_t addoffset=0; 8005944: 2300 movs r3, #0 8005946: 82fb strh r3, [r7, #22] eeprom_write_buff *buff; eeprom_write_buff *buff2; while(LONG--) 8005948: e02d b.n 80059a6 { buff =(eeprom_write_buff*)malloc(sizeof(eeprom_write_buff)); 800594a: 2008 movs r0, #8 800594c: f001 fe84 bl 8007658 8005950: 4603 mov r3, r0 8005952: 613b str r3, [r7, #16] if(buff!=NULL) 8005954: 693b ldr r3, [r7, #16] 8005956: 2b00 cmp r3, #0 8005958: d02b beq.n 80059b2 { buff->add=IN_DEVICE_ADD+addoffset; 800595a: 88fa ldrh r2, [r7, #6] 800595c: 8afb ldrh r3, [r7, #22] 800595e: 4413 add r3, r2 8005960: b29a uxth r2, r3 8005962: 693b ldr r3, [r7, #16] 8005964: 809a strh r2, [r3, #4] buff->date=DATAS[addoffset]; 8005966: 8afb ldrh r3, [r7, #22] 8005968: 683a ldr r2, [r7, #0] 800596a: 4413 add r3, r2 800596c: 781a ldrb r2, [r3, #0] 800596e: 693b ldr r3, [r7, #16] 8005970: 719a strb r2, [r3, #6] buff->next=NULL; 8005972: 693b ldr r3, [r7, #16] 8005974: 2200 movs r2, #0 8005976: 601a str r2, [r3, #0] }else{return ;} if(eeprom_write_buffer.head==NULL) 8005978: 4b10 ldr r3, [pc, #64] ; (80059bc ) 800597a: 685b ldr r3, [r3, #4] 800597c: 2b00 cmp r3, #0 800597e: d106 bne.n 800598e { eeprom_write_buffer.head=buff; 8005980: 4a0e ldr r2, [pc, #56] ; (80059bc ) 8005982: 693b ldr r3, [r7, #16] 8005984: 6053 str r3, [r2, #4] eeprom_write_buffer.end=buff; 8005986: 4a0d ldr r2, [pc, #52] ; (80059bc ) 8005988: 693b ldr r3, [r7, #16] 800598a: 6093 str r3, [r2, #8] 800598c: e008 b.n 80059a0 }else { buff2=eeprom_write_buffer.end; 800598e: 4b0b ldr r3, [pc, #44] ; (80059bc ) 8005990: 689b ldr r3, [r3, #8] 8005992: 60fb str r3, [r7, #12] buff2->next=buff; 8005994: 68fb ldr r3, [r7, #12] 8005996: 693a ldr r2, [r7, #16] 8005998: 601a str r2, [r3, #0] eeprom_write_buffer.end=buff; 800599a: 4a08 ldr r2, [pc, #32] ; (80059bc ) 800599c: 693b ldr r3, [r7, #16] 800599e: 6093 str r3, [r2, #8] } addoffset++; 80059a0: 8afb ldrh r3, [r7, #22] 80059a2: 3301 adds r3, #1 80059a4: 82fb strh r3, [r7, #22] while(LONG--) 80059a6: 88bb ldrh r3, [r7, #4] 80059a8: 1e5a subs r2, r3, #1 80059aa: 80ba strh r2, [r7, #4] 80059ac: 2b00 cmp r3, #0 80059ae: d1cc bne.n 800594a 80059b0: e000 b.n 80059b4 }else{return ;} 80059b2: bf00 nop } } 80059b4: 3718 adds r7, #24 80059b6: 46bd mov sp, r7 80059b8: bd80 pop {r7, pc} 80059ba: bf00 nop 80059bc: 20000360 .word 0x20000360 080059c0 : //iicÓ²¼þ½Ó¿Ú extern I2C_HandleTypeDef hi2c2; void IIC_SAND_DATE(uint16_t DEVICE_ADD,uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG) { 80059c0: b580 push {r7, lr} 80059c2: b088 sub sp, #32 80059c4: af04 add r7, sp, #16 80059c6: 60ba str r2, [r7, #8] 80059c8: 461a mov r2, r3 80059ca: 4603 mov r3, r0 80059cc: 81fb strh r3, [r7, #14] 80059ce: 460b mov r3, r1 80059d0: 81bb strh r3, [r7, #12] 80059d2: 4613 mov r3, r2 80059d4: 80fb strh r3, [r7, #6] HAL_I2C_Mem_Write(&hi2c2,DEVICE_ADD,IN_DEVICE_ADD,I2C_MEMADD_SIZE_8BIT,DATAS,LONG,100); 80059d6: 89ba ldrh r2, [r7, #12] 80059d8: 89f9 ldrh r1, [r7, #14] 80059da: 2364 movs r3, #100 ; 0x64 80059dc: 9302 str r3, [sp, #8] 80059de: 88fb ldrh r3, [r7, #6] 80059e0: 9301 str r3, [sp, #4] 80059e2: 68bb ldr r3, [r7, #8] 80059e4: 9300 str r3, [sp, #0] 80059e6: 2301 movs r3, #1 80059e8: 4803 ldr r0, [pc, #12] ; (80059f8 ) 80059ea: f7fc fce1 bl 80023b0 } 80059ee: bf00 nop 80059f0: 3710 adds r7, #16 80059f2: 46bd mov sp, r7 80059f4: bd80 pop {r7, pc} 80059f6: bf00 nop 80059f8: 20000214 .word 0x20000214 080059fc : void IIC_READ_DATE(uint16_t DEVICE_ADD,uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG) { 80059fc: b580 push {r7, lr} 80059fe: b088 sub sp, #32 8005a00: af04 add r7, sp, #16 8005a02: 60ba str r2, [r7, #8] 8005a04: 461a mov r2, r3 8005a06: 4603 mov r3, r0 8005a08: 81fb strh r3, [r7, #14] 8005a0a: 460b mov r3, r1 8005a0c: 81bb strh r3, [r7, #12] 8005a0e: 4613 mov r3, r2 8005a10: 80fb strh r3, [r7, #6] HAL_I2C_Mem_Read(&hi2c2,DEVICE_ADD,IN_DEVICE_ADD,I2C_MEMADD_SIZE_8BIT,DATAS,LONG,100); 8005a12: 89ba ldrh r2, [r7, #12] 8005a14: 89f9 ldrh r1, [r7, #14] 8005a16: 2364 movs r3, #100 ; 0x64 8005a18: 9302 str r3, [sp, #8] 8005a1a: 88fb ldrh r3, [r7, #6] 8005a1c: 9301 str r3, [sp, #4] 8005a1e: 68bb ldr r3, [r7, #8] 8005a20: 9300 str r3, [sp, #0] 8005a22: 2301 movs r3, #1 8005a24: 4803 ldr r0, [pc, #12] ; (8005a34 ) 8005a26: f7fc fdbd bl 80025a4 } 8005a2a: bf00 nop 8005a2c: 3710 adds r7, #16 8005a2e: 46bd mov sp, r7 8005a30: bd80 pop {r7, pc} 8005a32: bf00 nop 8005a34: 20000214 .word 0x20000214 08005a38 : * ÊäÈë £ºucAddress£¬¼Ä´æÆ÷µØÖ· * ·µ»Ø : ¼Ä´æÆ÷µÄµ±Ç°Öµ * µ÷Óà £ºÄÚ²¿µ÷Óà */ uint8_t ReadRawRC ( uint8_t ucAddress ) { 8005a38: b580 push {r7, lr} 8005a3a: b084 sub sp, #16 8005a3c: af00 add r7, sp, #0 8005a3e: 4603 mov r3, r0 8005a40: 71fb strb r3, [r7, #7] uint8_t ucAddr, ucReturn; ucAddr = ( ( ucAddress << 1 ) & 0x7E ) | 0x80; 8005a42: 79fb ldrb r3, [r7, #7] 8005a44: 005b lsls r3, r3, #1 8005a46: b25b sxtb r3, r3 8005a48: f003 037e and.w r3, r3, #126 ; 0x7e 8005a4c: b25b sxtb r3, r3 8005a4e: f063 037f orn r3, r3, #127 ; 0x7f 8005a52: b25b sxtb r3, r3 8005a54: b2db uxtb r3, r3 8005a56: 73fb strb r3, [r7, #15] HAL_GPIO_WritePin(RC522_CS_GPIO_Port, RC522_CS_Pin, 0); 8005a58: 2200 movs r2, #0 8005a5a: 2110 movs r1, #16 8005a5c: 480d ldr r0, [pc, #52] ; (8005a94 ) 8005a5e: f7fc fb4a bl 80020f6 HAL_SPI_Transmit(&hspi1,&ucAddr,1,100); 8005a62: f107 010f add.w r1, r7, #15 8005a66: 2364 movs r3, #100 ; 0x64 8005a68: 2201 movs r2, #1 8005a6a: 480b ldr r0, [pc, #44] ; (8005a98 ) 8005a6c: f7fd ffe6 bl 8003a3c HAL_SPI_Receive(&hspi1,&ucReturn,1,100); 8005a70: f107 010e add.w r1, r7, #14 8005a74: 2364 movs r3, #100 ; 0x64 8005a76: 2201 movs r2, #1 8005a78: 4807 ldr r0, [pc, #28] ; (8005a98 ) 8005a7a: f7fe f91b bl 8003cb4 HAL_GPIO_WritePin(RC522_CS_GPIO_Port, RC522_CS_Pin, 1); 8005a7e: 2201 movs r2, #1 8005a80: 2110 movs r1, #16 8005a82: 4804 ldr r0, [pc, #16] ; (8005a94 ) 8005a84: f7fc fb37 bl 80020f6 return ucReturn; 8005a88: 7bbb ldrb r3, [r7, #14] } 8005a8a: 4618 mov r0, r3 8005a8c: 3710 adds r7, #16 8005a8e: 46bd mov sp, r7 8005a90: bd80 pop {r7, pc} 8005a92: bf00 nop 8005a94: 40010800 .word 0x40010800 8005a98: 200002f8 .word 0x200002f8 08005a9c : * ucValue£¬Ð´Èë¼Ä´æÆ÷µÄÖµ * ·µ»Ø : ÎÞ * µ÷Óà £ºÄÚ²¿µ÷Óà */ void WriteRawRC ( uint8_t ucAddress, uint8_t ucValue ) { 8005a9c: b580 push {r7, lr} 8005a9e: b084 sub sp, #16 8005aa0: af00 add r7, sp, #0 8005aa2: 4603 mov r3, r0 8005aa4: 460a mov r2, r1 8005aa6: 71fb strb r3, [r7, #7] 8005aa8: 4613 mov r3, r2 8005aaa: 71bb strb r3, [r7, #6] uint8_t ucAddr; ucAddr = ( ucAddress << 1 ) & 0x7E; 8005aac: 79fb ldrb r3, [r7, #7] 8005aae: 005b lsls r3, r3, #1 8005ab0: b2db uxtb r3, r3 8005ab2: f003 037e and.w r3, r3, #126 ; 0x7e 8005ab6: b2db uxtb r3, r3 8005ab8: 73fb strb r3, [r7, #15] HAL_GPIO_WritePin(RC522_CS_GPIO_Port, RC522_CS_Pin, 0); 8005aba: 2200 movs r2, #0 8005abc: 2110 movs r1, #16 8005abe: 480c ldr r0, [pc, #48] ; (8005af0 ) 8005ac0: f7fc fb19 bl 80020f6 HAL_SPI_Transmit(&hspi1,&ucAddr,1,100); 8005ac4: f107 010f add.w r1, r7, #15 8005ac8: 2364 movs r3, #100 ; 0x64 8005aca: 2201 movs r2, #1 8005acc: 4809 ldr r0, [pc, #36] ; (8005af4 ) 8005ace: f7fd ffb5 bl 8003a3c HAL_SPI_Transmit(&hspi1,&ucValue,1,100); 8005ad2: 1db9 adds r1, r7, #6 8005ad4: 2364 movs r3, #100 ; 0x64 8005ad6: 2201 movs r2, #1 8005ad8: 4806 ldr r0, [pc, #24] ; (8005af4 ) 8005ada: f7fd ffaf bl 8003a3c HAL_GPIO_WritePin(RC522_CS_GPIO_Port, RC522_CS_Pin, 1); 8005ade: 2201 movs r2, #1 8005ae0: 2110 movs r1, #16 8005ae2: 4803 ldr r0, [pc, #12] ; (8005af0 ) 8005ae4: f7fc fb07 bl 80020f6 } 8005ae8: bf00 nop 8005aea: 3710 adds r7, #16 8005aec: 46bd mov sp, r7 8005aee: bd80 pop {r7, pc} 8005af0: 40010800 .word 0x40010800 8005af4: 200002f8 .word 0x200002f8 08005af8 : * ucMask£¬ÖÃλֵ * ·µ»Ø : ÎÞ * µ÷Óà £ºÄÚ²¿µ÷Óà */ void SetBitMask ( uint8_t ucReg, uint8_t ucMask ) { 8005af8: b580 push {r7, lr} 8005afa: b084 sub sp, #16 8005afc: af00 add r7, sp, #0 8005afe: 4603 mov r3, r0 8005b00: 460a mov r2, r1 8005b02: 71fb strb r3, [r7, #7] 8005b04: 4613 mov r3, r2 8005b06: 71bb strb r3, [r7, #6] uint8_t ucTemp; ucTemp = ReadRawRC ( ucReg ); 8005b08: 79fb ldrb r3, [r7, #7] 8005b0a: 4618 mov r0, r3 8005b0c: f7ff ff94 bl 8005a38 8005b10: 4603 mov r3, r0 8005b12: 73fb strb r3, [r7, #15] WriteRawRC ( ucReg, ucTemp | ucMask ); // set bit mask 8005b14: 7bfa ldrb r2, [r7, #15] 8005b16: 79bb ldrb r3, [r7, #6] 8005b18: 4313 orrs r3, r2 8005b1a: b2da uxtb r2, r3 8005b1c: 79fb ldrb r3, [r7, #7] 8005b1e: 4611 mov r1, r2 8005b20: 4618 mov r0, r3 8005b22: f7ff ffbb bl 8005a9c } 8005b26: bf00 nop 8005b28: 3710 adds r7, #16 8005b2a: 46bd mov sp, r7 8005b2c: bd80 pop {r7, pc} 08005b2e : * ucMask£¬Çåλֵ * ·µ»Ø : ÎÞ * µ÷Óà £ºÄÚ²¿µ÷Óà */ void ClearBitMask ( uint8_t ucReg, uint8_t ucMask ) { 8005b2e: b580 push {r7, lr} 8005b30: b084 sub sp, #16 8005b32: af00 add r7, sp, #0 8005b34: 4603 mov r3, r0 8005b36: 460a mov r2, r1 8005b38: 71fb strb r3, [r7, #7] 8005b3a: 4613 mov r3, r2 8005b3c: 71bb strb r3, [r7, #6] uint8_t ucTemp; ucTemp = ReadRawRC ( ucReg ); 8005b3e: 79fb ldrb r3, [r7, #7] 8005b40: 4618 mov r0, r3 8005b42: f7ff ff79 bl 8005a38 8005b46: 4603 mov r3, r0 8005b48: 73fb strb r3, [r7, #15] WriteRawRC ( ucReg, ucTemp & ( ~ ucMask) ); // clear bit mask 8005b4a: f997 3006 ldrsb.w r3, [r7, #6] 8005b4e: 43db mvns r3, r3 8005b50: b25a sxtb r2, r3 8005b52: f997 300f ldrsb.w r3, [r7, #15] 8005b56: 4013 ands r3, r2 8005b58: b25b sxtb r3, r3 8005b5a: b2da uxtb r2, r3 8005b5c: 79fb ldrb r3, [r7, #7] 8005b5e: 4611 mov r1, r2 8005b60: 4618 mov r0, r3 8005b62: f7ff ff9b bl 8005a9c } 8005b66: bf00 nop 8005b68: 3710 adds r7, #16 8005b6a: 46bd mov sp, r7 8005b6c: bd80 pop {r7, pc} 08005b6e : * ÊäÈë £ºÎÞ * ·µ»Ø : ÎÞ * µ÷Óà £ºÄÚ²¿µ÷Óà */ void PcdAntennaOn ( void ) { 8005b6e: b580 push {r7, lr} 8005b70: b082 sub sp, #8 8005b72: af00 add r7, sp, #0 uint8_t uc; uc = ReadRawRC ( TxControlReg ); 8005b74: 2014 movs r0, #20 8005b76: f7ff ff5f bl 8005a38 8005b7a: 4603 mov r3, r0 8005b7c: 71fb strb r3, [r7, #7] if ( ! ( uc & 0x03 ) ) 8005b7e: 79fb ldrb r3, [r7, #7] 8005b80: f003 0303 and.w r3, r3, #3 8005b84: 2b00 cmp r3, #0 8005b86: d103 bne.n 8005b90 { SetBitMask(TxControlReg, 0x03); 8005b88: 2103 movs r1, #3 8005b8a: 2014 movs r0, #20 8005b8c: f7ff ffb4 bl 8005af8 } } 8005b90: bf00 nop 8005b92: 3708 adds r7, #8 8005b94: 46bd mov sp, r7 8005b96: bd80 pop {r7, pc} 08005b98 : * ÊäÈë £ºÎÞ * ·µ»Ø : ÎÞ * µ÷Óà £ºÍⲿµ÷Óà */ void PcdReset ( void ) { 8005b98: b580 push {r7, lr} 8005b9a: af00 add r7, sp, #0 HAL_Delay(1); 8005b9c: 2001 movs r0, #1 8005b9e: f7fb ffcd bl 8001b3c WriteRawRC ( CommandReg, 0x0f ); 8005ba2: 210f movs r1, #15 8005ba4: 2001 movs r0, #1 8005ba6: f7ff ff79 bl 8005a9c while ( ReadRawRC ( CommandReg ) & 0x10 ); 8005baa: bf00 nop 8005bac: 2001 movs r0, #1 8005bae: f7ff ff43 bl 8005a38 8005bb2: 4603 mov r3, r0 8005bb4: f003 0310 and.w r3, r3, #16 8005bb8: 2b00 cmp r3, #0 8005bba: d1f7 bne.n 8005bac HAL_Delay(1); 8005bbc: 2001 movs r0, #1 8005bbe: f7fb ffbd bl 8001b3c WriteRawRC ( ModeReg, 0x3D ); //¶¨Òå·¢ËͺͽÓÊÕ³£ÓÃģʽ ºÍMifare¿¨Í¨Ñ¶£¬CRC³õʼֵ0x6363 8005bc2: 213d movs r1, #61 ; 0x3d 8005bc4: 2011 movs r0, #17 8005bc6: f7ff ff69 bl 8005a9c WriteRawRC ( TReloadRegL, 30 ); //16λ¶¨Ê±Æ÷µÍλ 8005bca: 211e movs r1, #30 8005bcc: 202d movs r0, #45 ; 0x2d 8005bce: f7ff ff65 bl 8005a9c WriteRawRC ( TReloadRegH, 0 ); //16λ¶¨Ê±Æ÷¸ßλ 8005bd2: 2100 movs r1, #0 8005bd4: 202c movs r0, #44 ; 0x2c 8005bd6: f7ff ff61 bl 8005a9c WriteRawRC ( TModeReg, 0x8D ); //¶¨ÒåÄÚ²¿¶¨Ê±Æ÷µÄÉèÖà 8005bda: 218d movs r1, #141 ; 0x8d 8005bdc: 202a movs r0, #42 ; 0x2a 8005bde: f7ff ff5d bl 8005a9c WriteRawRC ( TPrescalerReg, 0x3E ); //ÉèÖö¨Ê±Æ÷·ÖƵϵÊý 8005be2: 213e movs r1, #62 ; 0x3e 8005be4: 202b movs r0, #43 ; 0x2b 8005be6: f7ff ff59 bl 8005a9c WriteRawRC ( TxAutoReg, 0x40 ); //µ÷ÖÆ·¢ËÍÐźÅΪ100%ASK 8005bea: 2140 movs r1, #64 ; 0x40 8005bec: 2015 movs r0, #21 8005bee: f7ff ff55 bl 8005a9c } 8005bf2: bf00 nop 8005bf4: bd80 pop {r7, pc} 08005bf6 : * ÊäÈë £ºucType£¬¹¤×÷·½Ê½ * ·µ»Ø : ÎÞ * µ÷Óà £ºÍⲿµ÷Óà */ void M500PcdConfigISOType ( uint8_t ucType ) { 8005bf6: b580 push {r7, lr} 8005bf8: b082 sub sp, #8 8005bfa: af00 add r7, sp, #0 8005bfc: 4603 mov r3, r0 8005bfe: 71fb strb r3, [r7, #7] if ( ucType == 'A') //ISO14443_A 8005c00: 79fb ldrb r3, [r7, #7] 8005c02: 2b41 cmp r3, #65 ; 0x41 8005c04: d124 bne.n 8005c50 { ClearBitMask ( Status2Reg, 0x08 ); 8005c06: 2108 movs r1, #8 8005c08: 2008 movs r0, #8 8005c0a: f7ff ff90 bl 8005b2e WriteRawRC ( ModeReg, 0x3D );//3F 8005c0e: 213d movs r1, #61 ; 0x3d 8005c10: 2011 movs r0, #17 8005c12: f7ff ff43 bl 8005a9c WriteRawRC ( RxSelReg, 0x86 );//84 8005c16: 2186 movs r1, #134 ; 0x86 8005c18: 2017 movs r0, #23 8005c1a: f7ff ff3f bl 8005a9c WriteRawRC( RFCfgReg, 0x7F ); //4F 8005c1e: 217f movs r1, #127 ; 0x7f 8005c20: 2026 movs r0, #38 ; 0x26 8005c22: f7ff ff3b bl 8005a9c WriteRawRC( TReloadRegL, 30 );//tmoLength);// TReloadVal = 'h6a =tmoLength(dec) 8005c26: 211e movs r1, #30 8005c28: 202d movs r0, #45 ; 0x2d 8005c2a: f7ff ff37 bl 8005a9c WriteRawRC ( TReloadRegH, 0 ); 8005c2e: 2100 movs r1, #0 8005c30: 202c movs r0, #44 ; 0x2c 8005c32: f7ff ff33 bl 8005a9c WriteRawRC ( TModeReg, 0x8D ); 8005c36: 218d movs r1, #141 ; 0x8d 8005c38: 202a movs r0, #42 ; 0x2a 8005c3a: f7ff ff2f bl 8005a9c WriteRawRC ( TPrescalerReg, 0x3E ); 8005c3e: 213e movs r1, #62 ; 0x3e 8005c40: 202b movs r0, #43 ; 0x2b 8005c42: f7ff ff2b bl 8005a9c HAL_Delay(1); 8005c46: 2001 movs r0, #1 8005c48: f7fb ff78 bl 8001b3c PcdAntennaOn ();//¿ªÌìÏß 8005c4c: f7ff ff8f bl 8005b6e } } 8005c50: bf00 nop 8005c52: 3708 adds r7, #8 8005c54: 46bd mov sp, r7 8005c56: bd80 pop {r7, pc} 08005c58 : * ·µ»Ø : ״ֵ̬ * = MI_OK£¬³É¹¦ * µ÷Óà £ºÄÚ²¿µ÷Óà */ char PcdComMF522 ( uint8_t ucCommand, uint8_t * pInData, uint8_t ucInLenByte, uint8_t * pOutData, uint32_t * pOutLenBit ) { 8005c58: b590 push {r4, r7, lr} 8005c5a: b089 sub sp, #36 ; 0x24 8005c5c: af00 add r7, sp, #0 8005c5e: 60b9 str r1, [r7, #8] 8005c60: 607b str r3, [r7, #4] 8005c62: 4603 mov r3, r0 8005c64: 73fb strb r3, [r7, #15] 8005c66: 4613 mov r3, r2 8005c68: 73bb strb r3, [r7, #14] char cStatus = MI_ERR; 8005c6a: 2302 movs r3, #2 8005c6c: 77fb strb r3, [r7, #31] uint8_t ucIrqEn = 0x00; 8005c6e: 2300 movs r3, #0 8005c70: 77bb strb r3, [r7, #30] uint8_t ucWaitFor = 0x00; 8005c72: 2300 movs r3, #0 8005c74: 777b strb r3, [r7, #29] uint8_t ucLastBits; uint8_t ucN; uint32_t ul; switch ( ucCommand ) 8005c76: 7bfb ldrb r3, [r7, #15] 8005c78: 2b0c cmp r3, #12 8005c7a: d006 beq.n 8005c8a 8005c7c: 2b0e cmp r3, #14 8005c7e: d109 bne.n 8005c94 { case PCD_AUTHENT: //MifareÈÏÖ¤ ucIrqEn = 0x12; //ÔÊÐí´íÎóÖжÏÇëÇóErrIEn ÔÊÐí¿ÕÏÐÖжÏIdleIEn 8005c80: 2312 movs r3, #18 8005c82: 77bb strb r3, [r7, #30] ucWaitFor = 0x10; //ÈÏ֤Ѱ¿¨µÈ´ýʱºò ²éѯ¿ÕÏÐÖжϱê־λ 8005c84: 2310 movs r3, #16 8005c86: 777b strb r3, [r7, #29] break; 8005c88: e005 b.n 8005c96 case PCD_TRANSCEIVE: //½ÓÊÕ·¢ËÍ ·¢ËͽÓÊÕ ucIrqEn = 0x77; //ÔÊÐíTxIEn RxIEn IdleIEn LoAlertIEn ErrIEn TimerIEn 8005c8a: 2377 movs r3, #119 ; 0x77 8005c8c: 77bb strb r3, [r7, #30] ucWaitFor = 0x30; //Ñ°¿¨µÈ´ýʱºò ²éѯ½ÓÊÕÖжϱê־λÓë ¿ÕÏÐÖжϱê־λ 8005c8e: 2330 movs r3, #48 ; 0x30 8005c90: 777b strb r3, [r7, #29] break; 8005c92: e000 b.n 8005c96 default: break; 8005c94: bf00 nop } WriteRawRC ( ComIEnReg, ucIrqEn | 0x80 ); //IRqInvÖÃλ¹Ü½ÅIRQÓëStatus1RegµÄIRqλµÄÖµÏà·´ 8005c96: 7fbb ldrb r3, [r7, #30] 8005c98: f063 037f orn r3, r3, #127 ; 0x7f 8005c9c: b2db uxtb r3, r3 8005c9e: 4619 mov r1, r3 8005ca0: 2002 movs r0, #2 8005ca2: f7ff fefb bl 8005a9c ClearBitMask ( ComIrqReg, 0x80 ); //Set1¸ÃλÇåÁãʱ£¬CommIRqRegµÄÆÁ±ÎλÇåÁã 8005ca6: 2180 movs r1, #128 ; 0x80 8005ca8: 2004 movs r0, #4 8005caa: f7ff ff40 bl 8005b2e WriteRawRC ( CommandReg, PCD_IDLE ); //д¿ÕÏÐÃüÁî 8005cae: 2100 movs r1, #0 8005cb0: 2001 movs r0, #1 8005cb2: f7ff fef3 bl 8005a9c SetBitMask ( FIFOLevelReg, 0x80 ); //ÖÃλFlushBufferÇå³ýÄÚ²¿FIFOµÄ¶ÁºÍдָÕëÒÔ¼°ErrRegµÄBufferOvfl±ê־λ±»Çå³ý 8005cb6: 2180 movs r1, #128 ; 0x80 8005cb8: 200a movs r0, #10 8005cba: f7ff ff1d bl 8005af8 for ( ul = 0; ul < ucInLenByte; ul ++ ) 8005cbe: 2300 movs r3, #0 8005cc0: 61bb str r3, [r7, #24] 8005cc2: e00a b.n 8005cda { WriteRawRC ( FIFODataReg, pInData [ ul ] ); //дÊý¾Ý½øFIFOdata 8005cc4: 68ba ldr r2, [r7, #8] 8005cc6: 69bb ldr r3, [r7, #24] 8005cc8: 4413 add r3, r2 8005cca: 781b ldrb r3, [r3, #0] 8005ccc: 4619 mov r1, r3 8005cce: 2009 movs r0, #9 8005cd0: f7ff fee4 bl 8005a9c for ( ul = 0; ul < ucInLenByte; ul ++ ) 8005cd4: 69bb ldr r3, [r7, #24] 8005cd6: 3301 adds r3, #1 8005cd8: 61bb str r3, [r7, #24] 8005cda: 7bbb ldrb r3, [r7, #14] 8005cdc: 69ba ldr r2, [r7, #24] 8005cde: 429a cmp r2, r3 8005ce0: d3f0 bcc.n 8005cc4 } WriteRawRC ( CommandReg, ucCommand ); //дÃüÁî 8005ce2: 7bfb ldrb r3, [r7, #15] 8005ce4: 4619 mov r1, r3 8005ce6: 2001 movs r0, #1 8005ce8: f7ff fed8 bl 8005a9c if ( ucCommand == PCD_TRANSCEIVE ) 8005cec: 7bfb ldrb r3, [r7, #15] 8005cee: 2b0c cmp r3, #12 8005cf0: d103 bne.n 8005cfa { SetBitMask(BitFramingReg,0x80); //StartSendÖÃλÆô¶¯Êý¾Ý·¢ËÍ ¸ÃλÓëÊÕ·¢ÃüÁîʹÓÃʱ²ÅÓÐЧ 8005cf2: 2180 movs r1, #128 ; 0x80 8005cf4: 200d movs r0, #13 8005cf6: f7ff feff bl 8005af8 } ul = 1000;//¸ù¾ÝʱÖÓƵÂʵ÷Õû£¬²Ù×÷M1¿¨×î´óµÈ´ýʱ¼ä25ms 8005cfa: f44f 737a mov.w r3, #1000 ; 0x3e8 8005cfe: 61bb str r3, [r7, #24] do //ÈÏÖ¤ ÓëÑ°¿¨µÈ´ýʱ¼ä { ucN = ReadRawRC ( ComIrqReg ); //²éѯʼþÖÐ¶Ï 8005d00: 2004 movs r0, #4 8005d02: f7ff fe99 bl 8005a38 8005d06: 4603 mov r3, r0 8005d08: 773b strb r3, [r7, #28] ul --; 8005d0a: 69bb ldr r3, [r7, #24] 8005d0c: 3b01 subs r3, #1 8005d0e: 61bb str r3, [r7, #24] } while ( ( ul != 0 ) && ( ! ( ucN & 0x01 ) ) && ( ! ( ucN & ucWaitFor ) ) ); //Í˳öÌõ¼þi=0,¶¨Ê±Æ÷Öжϣ¬Óëд¿ÕÏÐÃüÁî 8005d10: 69bb ldr r3, [r7, #24] 8005d12: 2b00 cmp r3, #0 8005d14: d00a beq.n 8005d2c 8005d16: 7f3b ldrb r3, [r7, #28] 8005d18: f003 0301 and.w r3, r3, #1 8005d1c: 2b00 cmp r3, #0 8005d1e: d105 bne.n 8005d2c 8005d20: 7f3a ldrb r2, [r7, #28] 8005d22: 7f7b ldrb r3, [r7, #29] 8005d24: 4013 ands r3, r2 8005d26: b2db uxtb r3, r3 8005d28: 2b00 cmp r3, #0 8005d2a: d0e9 beq.n 8005d00 ClearBitMask ( BitFramingReg, 0x80 ); //ÇåÀíÔÊÐíStartSendλ 8005d2c: 2180 movs r1, #128 ; 0x80 8005d2e: 200d movs r0, #13 8005d30: f7ff fefd bl 8005b2e if ( ul != 0 ) 8005d34: 69bb ldr r3, [r7, #24] 8005d36: 2b00 cmp r3, #0 8005d38: d052 beq.n 8005de0 { if ( ! (( ReadRawRC ( ErrorReg ) & 0x1B )) ) //¶Á´íÎó±êÖ¾¼Ä´æÆ÷BufferOfI CollErr ParityErr ProtocolErr 8005d3a: 2006 movs r0, #6 8005d3c: f7ff fe7c bl 8005a38 8005d40: 4603 mov r3, r0 8005d42: f003 031b and.w r3, r3, #27 8005d46: 2b00 cmp r3, #0 8005d48: d148 bne.n 8005ddc { cStatus = MI_OK; 8005d4a: 2300 movs r3, #0 8005d4c: 77fb strb r3, [r7, #31] if ( ucN & ucIrqEn & 0x01 ) //ÊÇ·ñ·¢Éú¶¨Ê±Æ÷ÖÐ¶Ï 8005d4e: 7f3a ldrb r2, [r7, #28] 8005d50: 7fbb ldrb r3, [r7, #30] 8005d52: 4013 ands r3, r2 8005d54: b2db uxtb r3, r3 8005d56: f003 0301 and.w r3, r3, #1 8005d5a: 2b00 cmp r3, #0 8005d5c: d001 beq.n 8005d62 { cStatus = MI_NOTAGERR; 8005d5e: 2301 movs r3, #1 8005d60: 77fb strb r3, [r7, #31] } if ( ucCommand == PCD_TRANSCEIVE ) 8005d62: 7bfb ldrb r3, [r7, #15] 8005d64: 2b0c cmp r3, #12 8005d66: d13b bne.n 8005de0 { ucN = ReadRawRC ( FIFOLevelReg ); //¶ÁFIFOÖб£´æµÄ×Ö½ÚÊý 8005d68: 200a movs r0, #10 8005d6a: f7ff fe65 bl 8005a38 8005d6e: 4603 mov r3, r0 8005d70: 773b strb r3, [r7, #28] ucLastBits = ReadRawRC ( ControlReg ) & 0x07; //×îºó½ÓÊÕµ½µÃ×Ö½ÚµÄÓÐЧλÊý 8005d72: 200c movs r0, #12 8005d74: f7ff fe60 bl 8005a38 8005d78: 4603 mov r3, r0 8005d7a: f003 0307 and.w r3, r3, #7 8005d7e: 75fb strb r3, [r7, #23] if ( ucLastBits ) 8005d80: 7dfb ldrb r3, [r7, #23] 8005d82: 2b00 cmp r3, #0 8005d84: d008 beq.n 8005d98 { * pOutLenBit = ( ucN - 1 ) * 8 + ucLastBits; //N¸ö×Ö½ÚÊý¼õÈ¥1£¨×îºóÒ»¸ö×Ö½Ú£©+×îºóһλµÄλÊý ¶ÁÈ¡µ½µÄÊý¾Ý×ÜλÊý 8005d86: 7f3b ldrb r3, [r7, #28] 8005d88: 3b01 subs r3, #1 8005d8a: 00da lsls r2, r3, #3 8005d8c: 7dfb ldrb r3, [r7, #23] 8005d8e: 4413 add r3, r2 8005d90: 461a mov r2, r3 8005d92: 6b3b ldr r3, [r7, #48] ; 0x30 8005d94: 601a str r2, [r3, #0] 8005d96: e004 b.n 8005da2 } else { * pOutLenBit = ucN * 8; //×îºó½ÓÊÕµ½µÄ×Ö½ÚÕû¸ö×Ö½ÚÓÐЧ 8005d98: 7f3b ldrb r3, [r7, #28] 8005d9a: 00db lsls r3, r3, #3 8005d9c: 461a mov r2, r3 8005d9e: 6b3b ldr r3, [r7, #48] ; 0x30 8005da0: 601a str r2, [r3, #0] } if ( ucN == 0 ) 8005da2: 7f3b ldrb r3, [r7, #28] 8005da4: 2b00 cmp r3, #0 8005da6: d101 bne.n 8005dac { ucN = 1; 8005da8: 2301 movs r3, #1 8005daa: 773b strb r3, [r7, #28] } if ( ucN > MAXRLEN ) 8005dac: 7f3b ldrb r3, [r7, #28] 8005dae: 2b12 cmp r3, #18 8005db0: d901 bls.n 8005db6 { ucN = MAXRLEN; 8005db2: 2312 movs r3, #18 8005db4: 773b strb r3, [r7, #28] } for ( ul = 0; ul < ucN; ul ++ ) 8005db6: 2300 movs r3, #0 8005db8: 61bb str r3, [r7, #24] 8005dba: e00a b.n 8005dd2 { pOutData [ ul ] = ReadRawRC ( FIFODataReg ); 8005dbc: 687a ldr r2, [r7, #4] 8005dbe: 69bb ldr r3, [r7, #24] 8005dc0: 18d4 adds r4, r2, r3 8005dc2: 2009 movs r0, #9 8005dc4: f7ff fe38 bl 8005a38 8005dc8: 4603 mov r3, r0 8005dca: 7023 strb r3, [r4, #0] for ( ul = 0; ul < ucN; ul ++ ) 8005dcc: 69bb ldr r3, [r7, #24] 8005dce: 3301 adds r3, #1 8005dd0: 61bb str r3, [r7, #24] 8005dd2: 7f3b ldrb r3, [r7, #28] 8005dd4: 69ba ldr r2, [r7, #24] 8005dd6: 429a cmp r2, r3 8005dd8: d3f0 bcc.n 8005dbc 8005dda: e001 b.n 8005de0 } } else { cStatus = MI_ERR; 8005ddc: 2302 movs r3, #2 8005dde: 77fb strb r3, [r7, #31] } } SetBitMask ( ControlReg, 0x80 ); // stop timer now 8005de0: 2180 movs r1, #128 ; 0x80 8005de2: 200c movs r0, #12 8005de4: f7ff fe88 bl 8005af8 WriteRawRC ( CommandReg, PCD_IDLE ); 8005de8: 2100 movs r1, #0 8005dea: 2001 movs r0, #1 8005dec: f7ff fe56 bl 8005a9c return cStatus; 8005df0: 7ffb ldrb r3, [r7, #31] } 8005df2: 4618 mov r0, r3 8005df4: 3724 adds r7, #36 ; 0x24 8005df6: 46bd mov sp, r7 8005df8: bd90 pop {r4, r7, pc} 08005dfa : * ·µ»Ø : ״ֵ̬ * = MI_OK£¬³É¹¦ * µ÷Óà £ºÍⲿµ÷Óà */ char PcdRequest ( uint8_t ucReq_code, uint8_t * pTagType ) { 8005dfa: b580 push {r7, lr} 8005dfc: b08a sub sp, #40 ; 0x28 8005dfe: af02 add r7, sp, #8 8005e00: 4603 mov r3, r0 8005e02: 6039 str r1, [r7, #0] 8005e04: 71fb strb r3, [r7, #7] char cStatus; uint8_t ucComMF522Buf [ MAXRLEN ]; uint32_t ulLen; ClearBitMask ( Status2Reg, 0x08 ); //ÇåÀíָʾMIFARECyptolµ¥Ôª½ÓͨÒÔ¼°ËùÓп¨µÄÊý¾ÝͨÐű»¼ÓÃܵÄÇé¿ö 8005e06: 2108 movs r1, #8 8005e08: 2008 movs r0, #8 8005e0a: f7ff fe90 bl 8005b2e WriteRawRC ( BitFramingReg, 0x07 ); // ·¢Ë͵Ä×îºóÒ»¸ö×Ö½ÚµÄ Æßλ 8005e0e: 2107 movs r1, #7 8005e10: 200d movs r0, #13 8005e12: f7ff fe43 bl 8005a9c SetBitMask ( TxControlReg, 0x03 ); //TX1,TX2¹Ü½ÅµÄÊä³öÐźŴ«µÝ¾­·¢Ë͵÷ÖƵÄ13.56µÄÄÜÁ¿Ôز¨ÐźŠ8005e16: 2103 movs r1, #3 8005e18: 2014 movs r0, #20 8005e1a: f7ff fe6d bl 8005af8 ucComMF522Buf [ 0 ] = ucReq_code; //´æÈë ¿¨Æ¬ÃüÁî×Ö 8005e1e: 79fb ldrb r3, [r7, #7] 8005e20: 733b strb r3, [r7, #12] cStatus = PcdComMF522 ( PCD_TRANSCEIVE, ucComMF522Buf, 1, ucComMF522Buf, & ulLen ); //Ñ°¿¨ 8005e22: f107 020c add.w r2, r7, #12 8005e26: f107 010c add.w r1, r7, #12 8005e2a: f107 0308 add.w r3, r7, #8 8005e2e: 9300 str r3, [sp, #0] 8005e30: 4613 mov r3, r2 8005e32: 2201 movs r2, #1 8005e34: 200c movs r0, #12 8005e36: f7ff ff0f bl 8005c58 8005e3a: 4603 mov r3, r0 8005e3c: 77fb strb r3, [r7, #31] if ( ( cStatus == MI_OK ) && ( ulLen == 0x10 ) ) //Ñ°¿¨³É¹¦·µ»Ø¿¨ÀàÐÍ 8005e3e: 7ffb ldrb r3, [r7, #31] 8005e40: 2b00 cmp r3, #0 8005e42: d10a bne.n 8005e5a 8005e44: 68bb ldr r3, [r7, #8] 8005e46: 2b10 cmp r3, #16 8005e48: d107 bne.n 8005e5a { * pTagType = ucComMF522Buf [ 0 ]; 8005e4a: 7b3a ldrb r2, [r7, #12] 8005e4c: 683b ldr r3, [r7, #0] 8005e4e: 701a strb r2, [r3, #0] * ( pTagType + 1 ) = ucComMF522Buf [ 1 ]; 8005e50: 683b ldr r3, [r7, #0] 8005e52: 3301 adds r3, #1 8005e54: 7b7a ldrb r2, [r7, #13] 8005e56: 701a strb r2, [r3, #0] 8005e58: e001 b.n 8005e5e } else { cStatus = MI_ERR; 8005e5a: 2302 movs r3, #2 8005e5c: 77fb strb r3, [r7, #31] } return cStatus; 8005e5e: 7ffb ldrb r3, [r7, #31] } 8005e60: 4618 mov r0, r3 8005e62: 3720 adds r7, #32 8005e64: 46bd mov sp, r7 8005e66: bd80 pop {r7, pc} 08005e68 : * ·µ»Ø : ״ֵ̬ * = MI_OK£¬³É¹¦ * µ÷Óà £ºÍⲿµ÷Óà */ char PcdAnticoll ( uint8_t * pSnr ) { 8005e68: b580 push {r7, lr} 8005e6a: b08c sub sp, #48 ; 0x30 8005e6c: af02 add r7, sp, #8 8005e6e: 6078 str r0, [r7, #4] char cStatus; uint8_t uc, ucSnr_check = 0; 8005e70: 2300 movs r3, #0 8005e72: f887 3025 strb.w r3, [r7, #37] ; 0x25 uint8_t ucComMF522Buf [ MAXRLEN ]; uint32_t ulLen; ClearBitMask ( Status2Reg, 0x08 ); //ÇåMFCryptol Onλ Ö»Óгɹ¦Ö´ÐÐMFAuthentÃüÁîºó£¬¸Ãλ²ÅÄÜÖÃλ 8005e76: 2108 movs r1, #8 8005e78: 2008 movs r0, #8 8005e7a: f7ff fe58 bl 8005b2e WriteRawRC ( BitFramingReg, 0x00); //ÇåÀí¼Ä´æÆ÷ Í£Ö¹ÊÕ·¢ 8005e7e: 2100 movs r1, #0 8005e80: 200d movs r0, #13 8005e82: f7ff fe0b bl 8005a9c ClearBitMask ( CollReg, 0x80 ); //ÇåValuesAfterCollËùÓнÓÊÕµÄλÔÚ³åÍ»ºó±»Çå³ý 8005e86: 2180 movs r1, #128 ; 0x80 8005e88: 200e movs r0, #14 8005e8a: f7ff fe50 bl 8005b2e ucComMF522Buf [ 0 ] = 0x93; //¿¨Æ¬·À³åÍ»ÃüÁî 8005e8e: 2393 movs r3, #147 ; 0x93 8005e90: 743b strb r3, [r7, #16] ucComMF522Buf [ 1 ] = 0x20; 8005e92: 2320 movs r3, #32 8005e94: 747b strb r3, [r7, #17] cStatus = PcdComMF522 ( PCD_TRANSCEIVE, ucComMF522Buf, 2, ucComMF522Buf, & ulLen);//Ó뿨ƬͨÐÅ 8005e96: f107 0210 add.w r2, r7, #16 8005e9a: f107 0110 add.w r1, r7, #16 8005e9e: f107 030c add.w r3, r7, #12 8005ea2: 9300 str r3, [sp, #0] 8005ea4: 4613 mov r3, r2 8005ea6: 2202 movs r2, #2 8005ea8: 200c movs r0, #12 8005eaa: f7ff fed5 bl 8005c58 8005eae: 4603 mov r3, r0 8005eb0: f887 3027 strb.w r3, [r7, #39] ; 0x27 if ( cStatus == MI_OK) //ͨÐųɹ¦ 8005eb4: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 8005eb8: 2b00 cmp r3, #0 8005eba: d132 bne.n 8005f22 { for ( uc = 0; uc < 4; uc ++ ) 8005ebc: 2300 movs r3, #0 8005ebe: f887 3026 strb.w r3, [r7, #38] ; 0x26 8005ec2: e01c b.n 8005efe { * ( pSnr + uc ) = ucComMF522Buf [ uc ]; //¶Á³öUID 8005ec4: f897 2026 ldrb.w r2, [r7, #38] ; 0x26 8005ec8: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8005ecc: 6879 ldr r1, [r7, #4] 8005ece: 440b add r3, r1 8005ed0: f107 0128 add.w r1, r7, #40 ; 0x28 8005ed4: 440a add r2, r1 8005ed6: f812 2c18 ldrb.w r2, [r2, #-24] 8005eda: 701a strb r2, [r3, #0] ucSnr_check ^= ucComMF522Buf [ uc ]; 8005edc: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8005ee0: f107 0228 add.w r2, r7, #40 ; 0x28 8005ee4: 4413 add r3, r2 8005ee6: f813 2c18 ldrb.w r2, [r3, #-24] 8005eea: f897 3025 ldrb.w r3, [r7, #37] ; 0x25 8005eee: 4053 eors r3, r2 8005ef0: f887 3025 strb.w r3, [r7, #37] ; 0x25 for ( uc = 0; uc < 4; uc ++ ) 8005ef4: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8005ef8: 3301 adds r3, #1 8005efa: f887 3026 strb.w r3, [r7, #38] ; 0x26 8005efe: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8005f02: 2b03 cmp r3, #3 8005f04: d9de bls.n 8005ec4 } if ( ucSnr_check != ucComMF522Buf [ uc ] ) 8005f06: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8005f0a: f107 0228 add.w r2, r7, #40 ; 0x28 8005f0e: 4413 add r3, r2 8005f10: f813 3c18 ldrb.w r3, [r3, #-24] 8005f14: f897 2025 ldrb.w r2, [r7, #37] ; 0x25 8005f18: 429a cmp r2, r3 8005f1a: d002 beq.n 8005f22 { cStatus = MI_ERR; 8005f1c: 2302 movs r3, #2 8005f1e: f887 3027 strb.w r3, [r7, #39] ; 0x27 } } SetBitMask ( CollReg, 0x80 ); 8005f22: 2180 movs r1, #128 ; 0x80 8005f24: 200e movs r0, #14 8005f26: f7ff fde7 bl 8005af8 return cStatus; 8005f2a: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 } 8005f2e: 4618 mov r0, r3 8005f30: 3728 adds r7, #40 ; 0x28 8005f32: 46bd mov sp, r7 8005f34: bd80 pop {r7, pc} 08005f36 : * pOutData£¬´æ·Å¼ÆËã½á¹û´æ·ÅµÄÊ×µØÖ· * ·µ»Ø : ÎÞ * µ÷Óà £ºÄÚ²¿µ÷Óà */ void CalulateCRC ( uint8_t * pIndata, uint8_t ucLen, uint8_t * pOutData ) { 8005f36: b590 push {r4, r7, lr} 8005f38: b087 sub sp, #28 8005f3a: af00 add r7, sp, #0 8005f3c: 60f8 str r0, [r7, #12] 8005f3e: 460b mov r3, r1 8005f40: 607a str r2, [r7, #4] 8005f42: 72fb strb r3, [r7, #11] uint8_t uc, ucN; ClearBitMask(DivIrqReg,0x04); 8005f44: 2104 movs r1, #4 8005f46: 2005 movs r0, #5 8005f48: f7ff fdf1 bl 8005b2e WriteRawRC(CommandReg,PCD_IDLE); 8005f4c: 2100 movs r1, #0 8005f4e: 2001 movs r0, #1 8005f50: f7ff fda4 bl 8005a9c SetBitMask(FIFOLevelReg,0x80); 8005f54: 2180 movs r1, #128 ; 0x80 8005f56: 200a movs r0, #10 8005f58: f7ff fdce bl 8005af8 for ( uc = 0; uc < ucLen; uc ++) 8005f5c: 2300 movs r3, #0 8005f5e: 75fb strb r3, [r7, #23] 8005f60: e00a b.n 8005f78 { WriteRawRC ( FIFODataReg, * ( pIndata + uc ) ); 8005f62: 7dfb ldrb r3, [r7, #23] 8005f64: 68fa ldr r2, [r7, #12] 8005f66: 4413 add r3, r2 8005f68: 781b ldrb r3, [r3, #0] 8005f6a: 4619 mov r1, r3 8005f6c: 2009 movs r0, #9 8005f6e: f7ff fd95 bl 8005a9c for ( uc = 0; uc < ucLen; uc ++) 8005f72: 7dfb ldrb r3, [r7, #23] 8005f74: 3301 adds r3, #1 8005f76: 75fb strb r3, [r7, #23] 8005f78: 7dfa ldrb r2, [r7, #23] 8005f7a: 7afb ldrb r3, [r7, #11] 8005f7c: 429a cmp r2, r3 8005f7e: d3f0 bcc.n 8005f62 } WriteRawRC ( CommandReg, PCD_CALCCRC ); 8005f80: 2103 movs r1, #3 8005f82: 2001 movs r0, #1 8005f84: f7ff fd8a bl 8005a9c uc = 0xFF; 8005f88: 23ff movs r3, #255 ; 0xff 8005f8a: 75fb strb r3, [r7, #23] do { ucN = ReadRawRC ( DivIrqReg ); 8005f8c: 2005 movs r0, #5 8005f8e: f7ff fd53 bl 8005a38 8005f92: 4603 mov r3, r0 8005f94: 75bb strb r3, [r7, #22] uc --; 8005f96: 7dfb ldrb r3, [r7, #23] 8005f98: 3b01 subs r3, #1 8005f9a: 75fb strb r3, [r7, #23] } while ( ( uc != 0 ) && ! ( ucN & 0x04 ) ); 8005f9c: 7dfb ldrb r3, [r7, #23] 8005f9e: 2b00 cmp r3, #0 8005fa0: d004 beq.n 8005fac 8005fa2: 7dbb ldrb r3, [r7, #22] 8005fa4: f003 0304 and.w r3, r3, #4 8005fa8: 2b00 cmp r3, #0 8005faa: d0ef beq.n 8005f8c pOutData [ 0 ] = ReadRawRC ( CRCResultRegL ); 8005fac: 2022 movs r0, #34 ; 0x22 8005fae: f7ff fd43 bl 8005a38 8005fb2: 4603 mov r3, r0 8005fb4: 461a mov r2, r3 8005fb6: 687b ldr r3, [r7, #4] 8005fb8: 701a strb r2, [r3, #0] pOutData [ 1 ] = ReadRawRC ( CRCResultRegM ); 8005fba: 687b ldr r3, [r7, #4] 8005fbc: 1c5c adds r4, r3, #1 8005fbe: 2021 movs r0, #33 ; 0x21 8005fc0: f7ff fd3a bl 8005a38 8005fc4: 4603 mov r3, r0 8005fc6: 7023 strb r3, [r4, #0] } 8005fc8: bf00 nop 8005fca: 371c adds r7, #28 8005fcc: 46bd mov sp, r7 8005fce: bd90 pop {r4, r7, pc} 08005fd0 : * ·µ»Ø : ״ֵ̬ * = MI_OK£¬³É¹¦ * µ÷Óà £ºÍⲿµ÷Óà */ char PcdSelect ( uint8_t * pSnr ) { 8005fd0: b580 push {r7, lr} 8005fd2: b08a sub sp, #40 ; 0x28 8005fd4: af02 add r7, sp, #8 8005fd6: 6078 str r0, [r7, #4] char ucN; uint8_t uc; uint8_t ucComMF522Buf [ MAXRLEN ]; uint32_t ulLen; ucComMF522Buf [ 0 ] = PICC_ANTICOLL1; 8005fd8: 2393 movs r3, #147 ; 0x93 8005fda: 733b strb r3, [r7, #12] ucComMF522Buf [ 1 ] = 0x70; 8005fdc: 2370 movs r3, #112 ; 0x70 8005fde: 737b strb r3, [r7, #13] ucComMF522Buf [ 6 ] = 0; 8005fe0: 2300 movs r3, #0 8005fe2: 74bb strb r3, [r7, #18] for ( uc = 0; uc < 4; uc ++ ) 8005fe4: 2300 movs r3, #0 8005fe6: 77bb strb r3, [r7, #30] 8005fe8: e015 b.n 8006016 { ucComMF522Buf [ uc + 2 ] = * ( pSnr + uc ); 8005fea: 7fbb ldrb r3, [r7, #30] 8005fec: 687a ldr r2, [r7, #4] 8005fee: 441a add r2, r3 8005ff0: 7fbb ldrb r3, [r7, #30] 8005ff2: 3302 adds r3, #2 8005ff4: 7812 ldrb r2, [r2, #0] 8005ff6: f107 0120 add.w r1, r7, #32 8005ffa: 440b add r3, r1 8005ffc: f803 2c14 strb.w r2, [r3, #-20] ucComMF522Buf [ 6 ] ^= * ( pSnr + uc ); 8006000: 7cba ldrb r2, [r7, #18] 8006002: 7fbb ldrb r3, [r7, #30] 8006004: 6879 ldr r1, [r7, #4] 8006006: 440b add r3, r1 8006008: 781b ldrb r3, [r3, #0] 800600a: 4053 eors r3, r2 800600c: b2db uxtb r3, r3 800600e: 74bb strb r3, [r7, #18] for ( uc = 0; uc < 4; uc ++ ) 8006010: 7fbb ldrb r3, [r7, #30] 8006012: 3301 adds r3, #1 8006014: 77bb strb r3, [r7, #30] 8006016: 7fbb ldrb r3, [r7, #30] 8006018: 2b03 cmp r3, #3 800601a: d9e6 bls.n 8005fea } CalulateCRC ( ucComMF522Buf, 7, & ucComMF522Buf [ 7 ] ); 800601c: f107 030c add.w r3, r7, #12 8006020: 1dda adds r2, r3, #7 8006022: f107 030c add.w r3, r7, #12 8006026: 2107 movs r1, #7 8006028: 4618 mov r0, r3 800602a: f7ff ff84 bl 8005f36 ClearBitMask ( Status2Reg, 0x08 ); 800602e: 2108 movs r1, #8 8006030: 2008 movs r0, #8 8006032: f7ff fd7c bl 8005b2e ucN = PcdComMF522 ( PCD_TRANSCEIVE, ucComMF522Buf, 9, ucComMF522Buf, & ulLen ); 8006036: f107 020c add.w r2, r7, #12 800603a: f107 010c add.w r1, r7, #12 800603e: f107 0308 add.w r3, r7, #8 8006042: 9300 str r3, [sp, #0] 8006044: 4613 mov r3, r2 8006046: 2209 movs r2, #9 8006048: 200c movs r0, #12 800604a: f7ff fe05 bl 8005c58 800604e: 4603 mov r3, r0 8006050: 77fb strb r3, [r7, #31] if ( ( ucN == MI_OK ) && ( ulLen == 0x18 ) ) 8006052: 7ffb ldrb r3, [r7, #31] 8006054: 2b00 cmp r3, #0 8006056: d105 bne.n 8006064 8006058: 68bb ldr r3, [r7, #8] 800605a: 2b18 cmp r3, #24 800605c: d102 bne.n 8006064 { ucN = MI_OK; 800605e: 2300 movs r3, #0 8006060: 77fb strb r3, [r7, #31] 8006062: e001 b.n 8006068 } else { ucN = MI_ERR; 8006064: 2302 movs r3, #2 8006066: 77fb strb r3, [r7, #31] } return ucN; 8006068: 7ffb ldrb r3, [r7, #31] } 800606a: 4618 mov r0, r3 800606c: 3720 adds r7, #32 800606e: 46bd mov sp, r7 8006070: bd80 pop {r7, pc} 08006072 : * ·µ»Ø : ״ֵ̬ * = MI_OK£¬³É¹¦ * µ÷Óà £ºÍⲿµ÷Óà */ char PcdAuthState ( uint8_t ucAuth_mode, uint8_t ucAddr, char * pKey, uint8_t * pSnr ) { 8006072: b580 push {r7, lr} 8006074: b08c sub sp, #48 ; 0x30 8006076: af02 add r7, sp, #8 8006078: 60ba str r2, [r7, #8] 800607a: 607b str r3, [r7, #4] 800607c: 4603 mov r3, r0 800607e: 73fb strb r3, [r7, #15] 8006080: 460b mov r3, r1 8006082: 73bb strb r3, [r7, #14] char cStatus; uint8_t uc, ucComMF522Buf [ MAXRLEN ]; uint32_t ulLen; ucComMF522Buf [ 0 ] = ucAuth_mode; 8006084: 7bfb ldrb r3, [r7, #15] 8006086: 753b strb r3, [r7, #20] ucComMF522Buf [ 1 ] = ucAddr; 8006088: 7bbb ldrb r3, [r7, #14] 800608a: 757b strb r3, [r7, #21] for ( uc = 0; uc < 6; uc ++ ) 800608c: 2300 movs r3, #0 800608e: f887 3026 strb.w r3, [r7, #38] ; 0x26 8006092: e011 b.n 80060b8 { ucComMF522Buf [ uc + 2 ] = * ( pKey + uc ); 8006094: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 8006098: 68ba ldr r2, [r7, #8] 800609a: 441a add r2, r3 800609c: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 80060a0: 3302 adds r3, #2 80060a2: 7812 ldrb r2, [r2, #0] 80060a4: f107 0128 add.w r1, r7, #40 ; 0x28 80060a8: 440b add r3, r1 80060aa: f803 2c14 strb.w r2, [r3, #-20] for ( uc = 0; uc < 6; uc ++ ) 80060ae: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 80060b2: 3301 adds r3, #1 80060b4: f887 3026 strb.w r3, [r7, #38] ; 0x26 80060b8: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 80060bc: 2b05 cmp r3, #5 80060be: d9e9 bls.n 8006094 } for ( uc = 0; uc < 6; uc ++ ) 80060c0: 2300 movs r3, #0 80060c2: f887 3026 strb.w r3, [r7, #38] ; 0x26 80060c6: e011 b.n 80060ec { ucComMF522Buf [ uc + 8 ] = * ( pSnr + uc ); 80060c8: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 80060cc: 687a ldr r2, [r7, #4] 80060ce: 441a add r2, r3 80060d0: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 80060d4: 3308 adds r3, #8 80060d6: 7812 ldrb r2, [r2, #0] 80060d8: f107 0128 add.w r1, r7, #40 ; 0x28 80060dc: 440b add r3, r1 80060de: f803 2c14 strb.w r2, [r3, #-20] for ( uc = 0; uc < 6; uc ++ ) 80060e2: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 80060e6: 3301 adds r3, #1 80060e8: f887 3026 strb.w r3, [r7, #38] ; 0x26 80060ec: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 80060f0: 2b05 cmp r3, #5 80060f2: d9e9 bls.n 80060c8 } cStatus = PcdComMF522 ( PCD_AUTHENT, ucComMF522Buf, 12, ucComMF522Buf, & ulLen ); 80060f4: f107 0214 add.w r2, r7, #20 80060f8: f107 0114 add.w r1, r7, #20 80060fc: f107 0310 add.w r3, r7, #16 8006100: 9300 str r3, [sp, #0] 8006102: 4613 mov r3, r2 8006104: 220c movs r2, #12 8006106: 200e movs r0, #14 8006108: f7ff fda6 bl 8005c58 800610c: 4603 mov r3, r0 800610e: f887 3027 strb.w r3, [r7, #39] ; 0x27 if ( ( cStatus != MI_OK ) || ( ! ( ReadRawRC ( Status2Reg ) & 0x08 ) ) ) 8006112: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 8006116: 2b00 cmp r3, #0 8006118: d107 bne.n 800612a 800611a: 2008 movs r0, #8 800611c: f7ff fc8c bl 8005a38 8006120: 4603 mov r3, r0 8006122: f003 0308 and.w r3, r3, #8 8006126: 2b00 cmp r3, #0 8006128: d102 bne.n 8006130 { // if(cStatus != MI_OK) // printf("666") ; // else // printf("888"); cStatus = MI_ERR; 800612a: 2302 movs r3, #2 800612c: f887 3027 strb.w r3, [r7, #39] ; 0x27 } return cStatus; 8006130: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 } 8006134: 4618 mov r0, r3 8006136: 3728 adds r7, #40 ; 0x28 8006138: 46bd mov sp, r7 800613a: bd80 pop {r7, pc} 0800613c : PcdHalt (); } void RC522_Init ( void ) { 800613c: b580 push {r7, lr} 800613e: af00 add r7, sp, #0 PcdReset (); 8006140: f7ff fd2a bl 8005b98 M500PcdConfigISOType ( 'A' );//ÉèÖù¤×÷·½Ê½ 8006144: 2041 movs r0, #65 ; 0x41 8006146: f7ff fd56 bl 8005bf6 } 800614a: bf00 nop 800614c: bd80 pop {r7, pc} ... 08006150 : //SPIдÊý¾Ý //Ïò´¥ÃþÆÁICдÈë1byteÊý¾Ý //num:ҪдÈëµÄÊý¾Ý void TP_Write_Byte(char num) { 8006150: b580 push {r7, lr} 8006152: b084 sub sp, #16 8006154: af00 add r7, sp, #0 8006156: 4603 mov r3, r0 8006158: 71fb strb r3, [r7, #7] for(uint8_t count=0;count<8;count++) 800615a: 2300 movs r3, #0 800615c: 73fb strb r3, [r7, #15] 800615e: e020 b.n 80061a2 { if(num&0x80){TDIN(1);} 8006160: f997 3007 ldrsb.w r3, [r7, #7] 8006164: 2b00 cmp r3, #0 8006166: da06 bge.n 8006176 8006168: 2201 movs r2, #1 800616a: f44f 7100 mov.w r1, #512 ; 0x200 800616e: 4811 ldr r0, [pc, #68] ; (80061b4 ) 8006170: f7fb ffc1 bl 80020f6 8006174: e005 b.n 8006182 else {TDIN(0);} 8006176: 2200 movs r2, #0 8006178: f44f 7100 mov.w r1, #512 ; 0x200 800617c: 480d ldr r0, [pc, #52] ; (80061b4 ) 800617e: f7fb ffba bl 80020f6 num<<=1; 8006182: 79fb ldrb r3, [r7, #7] 8006184: 005b lsls r3, r3, #1 8006186: 71fb strb r3, [r7, #7] TCLK(0); 8006188: 2200 movs r2, #0 800618a: 2102 movs r1, #2 800618c: 480a ldr r0, [pc, #40] ; (80061b8 ) 800618e: f7fb ffb2 bl 80020f6 TCLK(1); //ÉÏÉýÑØÓÐЧ 8006192: 2201 movs r2, #1 8006194: 2102 movs r1, #2 8006196: 4808 ldr r0, [pc, #32] ; (80061b8 ) 8006198: f7fb ffad bl 80020f6 for(uint8_t count=0;count<8;count++) 800619c: 7bfb ldrb r3, [r7, #15] 800619e: 3301 adds r3, #1 80061a0: 73fb strb r3, [r7, #15] 80061a2: 7bfb ldrb r3, [r7, #15] 80061a4: 2b07 cmp r3, #7 80061a6: d9db bls.n 8006160 } } 80061a8: bf00 nop 80061aa: bf00 nop 80061ac: 3710 adds r7, #16 80061ae: 46bd mov sp, r7 80061b0: bd80 pop {r7, pc} 80061b2: bf00 nop 80061b4: 40011c00 .word 0x40011c00 80061b8: 40010c00 .word 0x40010c00 080061bc : //SPI¶ÁÊý¾Ý //´Ó´¥ÃþÆÁIC¶ÁÈ¡adcÖµ //CMD:Ö¸Áî //·µ»ØÖµ:¶Áµ½µÄÊý¾Ý uint16_t TP_Read_AD(char CMD) { 80061bc: b580 push {r7, lr} 80061be: b084 sub sp, #16 80061c0: af00 add r7, sp, #0 80061c2: 4603 mov r3, r0 80061c4: 71fb strb r3, [r7, #7] uint16_t Num=0; 80061c6: 2300 movs r3, #0 80061c8: 81fb strh r3, [r7, #14] TCLK(0); //ÏÈÀ­µÍʱÖÓ 80061ca: 2200 movs r2, #0 80061cc: 2102 movs r1, #2 80061ce: 482b ldr r0, [pc, #172] ; (800627c ) 80061d0: f7fb ff91 bl 80020f6 TDIN(0); //À­µÍÊý¾ÝÏß 80061d4: 2200 movs r2, #0 80061d6: f44f 7100 mov.w r1, #512 ; 0x200 80061da: 4829 ldr r0, [pc, #164] ; (8006280 ) 80061dc: f7fb ff8b bl 80020f6 TCS(0); //Ñ¡Öд¥ÃþÆÁIC 80061e0: 2200 movs r2, #0 80061e2: 2104 movs r1, #4 80061e4: 4825 ldr r0, [pc, #148] ; (800627c ) 80061e6: f7fb ff86 bl 80020f6 TP_Write_Byte(CMD);//·¢ËÍÃüÁî×Ö 80061ea: 79fb ldrb r3, [r7, #7] 80061ec: 4618 mov r0, r3 80061ee: f7ff ffaf bl 8006150 HAL_GetTick(); //ÉÔ΢ÑÓʱ£¬adת»»ÐèҪʱ¼ä 80061f2: f7fb fc99 bl 8001b28 HAL_GetTick(); 80061f6: f7fb fc97 bl 8001b28 HAL_GetTick(); 80061fa: f7fb fc95 bl 8001b28 HAL_GetTick(); 80061fe: f7fb fc93 bl 8001b28 HAL_GetTick(); 8006202: f7fb fc91 bl 8001b28 HAL_GetTick(); 8006206: f7fb fc8f bl 8001b28 TCLK(1); //¸ø1¸öʱÖÓ£¬Çå³ýBUSY 800620a: 2201 movs r2, #1 800620c: 2102 movs r1, #2 800620e: 481b ldr r0, [pc, #108] ; (800627c ) 8006210: f7fb ff71 bl 80020f6 TCLK(0); 8006214: 2200 movs r2, #0 8006216: 2102 movs r1, #2 8006218: 4818 ldr r0, [pc, #96] ; (800627c ) 800621a: f7fb ff6c bl 80020f6 for(uint8_t count=0;count<16;count++)//¶Á³ö16λÊý¾Ý,Ö»Óиß12λÓÐЧ 800621e: 2300 movs r3, #0 8006220: 737b strb r3, [r7, #13] 8006222: e01a b.n 800625a { Num<<=1; 8006224: 89fb ldrh r3, [r7, #14] 8006226: 005b lsls r3, r3, #1 8006228: 81fb strh r3, [r7, #14] TCLK(0); //ϽµÑØÓÐЧ 800622a: 2200 movs r2, #0 800622c: 2102 movs r1, #2 800622e: 4813 ldr r0, [pc, #76] ; (800627c ) 8006230: f7fb ff61 bl 80020f6 TCLK(1);; 8006234: 2201 movs r2, #1 8006236: 2102 movs r1, #2 8006238: 4810 ldr r0, [pc, #64] ; (800627c ) 800623a: f7fb ff5c bl 80020f6 if(TDOUT){Num++;} 800623e: f44f 7180 mov.w r1, #256 ; 0x100 8006242: 480f ldr r0, [pc, #60] ; (8006280 ) 8006244: f7fb ff40 bl 80020c8 8006248: 4603 mov r3, r0 800624a: 2b00 cmp r3, #0 800624c: d002 beq.n 8006254 800624e: 89fb ldrh r3, [r7, #14] 8006250: 3301 adds r3, #1 8006252: 81fb strh r3, [r7, #14] for(uint8_t count=0;count<16;count++)//¶Á³ö16λÊý¾Ý,Ö»Óиß12λÓÐЧ 8006254: 7b7b ldrb r3, [r7, #13] 8006256: 3301 adds r3, #1 8006258: 737b strb r3, [r7, #13] 800625a: 7b7b ldrb r3, [r7, #13] 800625c: 2b0f cmp r3, #15 800625e: d9e1 bls.n 8006224 } Num>>=4; //Ö»Óиß12λÓÐЧ. 8006260: 89fb ldrh r3, [r7, #14] 8006262: 091b lsrs r3, r3, #4 8006264: 81fb strh r3, [r7, #14] TCS(1); //ÊÍ·ÅƬѡ 8006266: 2201 movs r2, #1 8006268: 2104 movs r1, #4 800626a: 4804 ldr r0, [pc, #16] ; (800627c ) 800626c: f7fb ff43 bl 80020f6 return(Num); 8006270: 89fb ldrh r3, [r7, #14] } 8006272: 4618 mov r0, r3 8006274: 3710 adds r7, #16 8006276: 46bd mov sp, r7 8006278: bd80 pop {r7, pc} 800627a: bf00 nop 800627c: 40010c00 .word 0x40010c00 8006280: 40011c00 .word 0x40011c00 08006284 : //xy:Ö¸ÁCMD_RDX/CMD_RDY£© //·µ»ØÖµ:¶Áµ½µÄÊý¾Ý #define READ_TIMES 5 //¶ÁÈ¡´ÎÊý #define LOST_VAL 1 //¶ªÆúÖµ uint16_t TP_Read_XOY(uint8_t xy) { 8006284: b590 push {r4, r7, lr} 8006286: b089 sub sp, #36 ; 0x24 8006288: af00 add r7, sp, #0 800628a: 4603 mov r3, r0 800628c: 71fb strb r3, [r7, #7] uint16_t i, j; uint16_t buf[READ_TIMES]; uint16_t sum=0; 800628e: 2300 movs r3, #0 8006290: 837b strh r3, [r7, #26] uint16_t temp; for(i=0;i 8006298: 8bfc ldrh r4, [r7, #30] 800629a: 79fb ldrb r3, [r7, #7] 800629c: 4618 mov r0, r3 800629e: f7ff ff8d bl 80061bc 80062a2: 4603 mov r3, r0 80062a4: 461a mov r2, r3 80062a6: 0063 lsls r3, r4, #1 80062a8: f107 0120 add.w r1, r7, #32 80062ac: 440b add r3, r1 80062ae: f823 2c14 strh.w r2, [r3, #-20] 80062b2: 8bfb ldrh r3, [r7, #30] 80062b4: 3301 adds r3, #1 80062b6: 83fb strh r3, [r7, #30] 80062b8: 8bfb ldrh r3, [r7, #30] 80062ba: 2b04 cmp r3, #4 80062bc: d9ec bls.n 8006298 for(i=0;i { for(j=i+1;j { if(buf[i]>buf[j])//ÉýÐòÅÅÁÐ 80062cc: 8bfb ldrh r3, [r7, #30] 80062ce: 005b lsls r3, r3, #1 80062d0: f107 0220 add.w r2, r7, #32 80062d4: 4413 add r3, r2 80062d6: f833 2c14 ldrh.w r2, [r3, #-20] 80062da: 8bbb ldrh r3, [r7, #28] 80062dc: 005b lsls r3, r3, #1 80062de: f107 0120 add.w r1, r7, #32 80062e2: 440b add r3, r1 80062e4: f833 3c14 ldrh.w r3, [r3, #-20] 80062e8: 429a cmp r2, r3 80062ea: d91e bls.n 800632a { temp=buf[i]; 80062ec: 8bfb ldrh r3, [r7, #30] 80062ee: 005b lsls r3, r3, #1 80062f0: f107 0220 add.w r2, r7, #32 80062f4: 4413 add r3, r2 80062f6: f833 3c14 ldrh.w r3, [r3, #-20] 80062fa: 833b strh r3, [r7, #24] buf[i]=buf[j]; 80062fc: 8bbb ldrh r3, [r7, #28] 80062fe: 8bfa ldrh r2, [r7, #30] 8006300: 005b lsls r3, r3, #1 8006302: f107 0120 add.w r1, r7, #32 8006306: 440b add r3, r1 8006308: f833 1c14 ldrh.w r1, [r3, #-20] 800630c: 0053 lsls r3, r2, #1 800630e: f107 0220 add.w r2, r7, #32 8006312: 4413 add r3, r2 8006314: 460a mov r2, r1 8006316: f823 2c14 strh.w r2, [r3, #-20] buf[j]=temp; 800631a: 8bbb ldrh r3, [r7, #28] 800631c: 005b lsls r3, r3, #1 800631e: f107 0220 add.w r2, r7, #32 8006322: 4413 add r3, r2 8006324: 8b3a ldrh r2, [r7, #24] 8006326: f823 2c14 strh.w r2, [r3, #-20] for(j=i+1;j for(i=0;i } } } sum=0; 8006342: 2300 movs r3, #0 8006344: 837b strh r3, [r7, #26] for(i=LOST_VAL;i 800634c: 8bfb ldrh r3, [r7, #30] 800634e: 005b lsls r3, r3, #1 8006350: f107 0220 add.w r2, r7, #32 8006354: 4413 add r3, r2 8006356: f833 2c14 ldrh.w r2, [r3, #-20] 800635a: 8b7b ldrh r3, [r7, #26] 800635c: 4413 add r3, r2 800635e: 837b strh r3, [r7, #26] 8006360: 8bfb ldrh r3, [r7, #30] 8006362: 3301 adds r3, #1 8006364: 83fb strh r3, [r7, #30] 8006366: 8bfb ldrh r3, [r7, #30] 8006368: 2b03 cmp r3, #3 800636a: d9ef bls.n 800634c temp=sum/(READ_TIMES-2*LOST_VAL); 800636c: 8b7b ldrh r3, [r7, #26] 800636e: 4a05 ldr r2, [pc, #20] ; (8006384 ) 8006370: fba2 2303 umull r2, r3, r2, r3 8006374: 085b lsrs r3, r3, #1 8006376: 833b strh r3, [r7, #24] return temp; 8006378: 8b3b ldrh r3, [r7, #24] } 800637a: 4618 mov r0, r3 800637c: 3724 adds r7, #36 ; 0x24 800637e: 46bd mov sp, r7 8006380: bd90 pop {r4, r7, pc} 8006382: bf00 nop 8006384: aaaaaaab .word 0xaaaaaaab 08006388 : //¶ÁÈ¡x,y×ø±ê //x,y:¶ÁÈ¡µ½µÄ×ø±êADCÖµ void TP_Read_XY_ADC(int16_t *x,int16_t *y) { 8006388: b580 push {r7, lr} 800638a: b084 sub sp, #16 800638c: af00 add r7, sp, #0 800638e: 6078 str r0, [r7, #4] 8006390: 6039 str r1, [r7, #0] int16_t xtemp,ytemp; xtemp=TP_Read_XOY(CMD_RDX); 8006392: 2090 movs r0, #144 ; 0x90 8006394: f7ff ff76 bl 8006284 8006398: 4603 mov r3, r0 800639a: 81fb strh r3, [r7, #14] ytemp=TP_Read_XOY(CMD_RDY); 800639c: 20d0 movs r0, #208 ; 0xd0 800639e: f7ff ff71 bl 8006284 80063a2: 4603 mov r3, r0 80063a4: 81bb strh r3, [r7, #12] *x=xtemp; 80063a6: 687b ldr r3, [r7, #4] 80063a8: 89fa ldrh r2, [r7, #14] 80063aa: 801a strh r2, [r3, #0] *y=ytemp; 80063ac: 683b ldr r3, [r7, #0] 80063ae: 89ba ldrh r2, [r7, #12] 80063b0: 801a strh r2, [r3, #0] } 80063b2: bf00 nop 80063b4: 3710 adds r7, #16 80063b6: 46bd mov sp, r7 80063b8: bd80 pop {r7, pc} 080063ba : //¸Ãº¯ÊýÄÜ´ó´óÌá¸ß׼ȷ¶È //x,y:¶ÁÈ¡µ½µÄ×ø±êÖµ //·µ»ØÖµ:0,ʧ°Ü;1,³É¹¦¡£ #define ERR_RANGE 10 //Îó²î·¶Î§ uint8_t TP_Read_XY2(int16_t *x,int16_t *y) { 80063ba: b580 push {r7, lr} 80063bc: b084 sub sp, #16 80063be: af00 add r7, sp, #0 80063c0: 6078 str r0, [r7, #4] 80063c2: 6039 str r1, [r7, #0] int16_t x1,y1; int16_t x2,y2; TP_Read_XY_ADC(&x1,&y1); 80063c4: f107 020c add.w r2, r7, #12 80063c8: f107 030e add.w r3, r7, #14 80063cc: 4611 mov r1, r2 80063ce: 4618 mov r0, r3 80063d0: f7ff ffda bl 8006388 TP_Read_XY_ADC(&x2,&y2); 80063d4: f107 0208 add.w r2, r7, #8 80063d8: f107 030a add.w r3, r7, #10 80063dc: 4611 mov r1, r2 80063de: 4618 mov r0, r3 80063e0: f7ff ffd2 bl 8006388 if(((x2<=x1&&x1 80063f0: f9b7 300a ldrsh.w r3, [r7, #10] 80063f4: 3309 adds r3, #9 80063f6: f9b7 200e ldrsh.w r2, [r7, #14] 80063fa: 4293 cmp r3, r2 80063fc: da0c bge.n 8006418 80063fe: f9b7 200e ldrsh.w r2, [r7, #14] 8006402: f9b7 300a ldrsh.w r3, [r7, #10] 8006406: 429a cmp r2, r3 8006408: dc3a bgt.n 8006480 800640a: f9b7 300e ldrsh.w r3, [r7, #14] 800640e: 3309 adds r3, #9 8006410: f9b7 200a ldrsh.w r2, [r7, #10] 8006414: 4293 cmp r3, r2 8006416: db33 blt.n 8006480 &&((y2<=y1&&y1 8006424: f9b7 3008 ldrsh.w r3, [r7, #8] 8006428: 3309 adds r3, #9 800642a: f9b7 200c ldrsh.w r2, [r7, #12] 800642e: 4293 cmp r3, r2 8006430: da0c bge.n 800644c 8006432: f9b7 200c ldrsh.w r2, [r7, #12] 8006436: f9b7 3008 ldrsh.w r3, [r7, #8] 800643a: 429a cmp r2, r3 800643c: dc20 bgt.n 8006480 800643e: f9b7 300c ldrsh.w r3, [r7, #12] 8006442: 3309 adds r3, #9 8006444: f9b7 2008 ldrsh.w r2, [r7, #8] 8006448: 4293 cmp r3, r2 800644a: db19 blt.n 8006480 { *x=(x1+x2)/2; 800644c: f9b7 300e ldrsh.w r3, [r7, #14] 8006450: 461a mov r2, r3 8006452: f9b7 300a ldrsh.w r3, [r7, #10] 8006456: 4413 add r3, r2 8006458: 0fda lsrs r2, r3, #31 800645a: 4413 add r3, r2 800645c: 105b asrs r3, r3, #1 800645e: b21a sxth r2, r3 8006460: 687b ldr r3, [r7, #4] 8006462: 801a strh r2, [r3, #0] *y=(y1+y2)/2; 8006464: f9b7 300c ldrsh.w r3, [r7, #12] 8006468: 461a mov r2, r3 800646a: f9b7 3008 ldrsh.w r3, [r7, #8] 800646e: 4413 add r3, r2 8006470: 0fda lsrs r2, r3, #31 8006472: 4413 add r3, r2 8006474: 105b asrs r3, r3, #1 8006476: b21a sxth r2, r3 8006478: 683b ldr r3, [r7, #0] 800647a: 801a strh r2, [r3, #0] return 1; 800647c: 2301 movs r3, #1 800647e: e000 b.n 8006482 }else return 0; 8006480: 2300 movs r3, #0 } 8006482: 4618 mov r0, r3 8006484: 3710 adds r7, #16 8006486: 46bd mov sp, r7 8006488: bd80 pop {r7, pc} ... 0800648c : touch_device t0;// t0 yyds~ touch_config tconfig; //´¥Ãþ¸üзþÎñ£¬×´Ì¬»úд·¨£¬Ñ­»·»ñÈ¡×ø±ê void TP_Server() { 800648c: b598 push {r3, r4, r7, lr} 800648e: af00 add r7, sp, #0 if(TPEN==0) //Èç¹ûÓд¥Ãþ 8006490: f44f 6180 mov.w r1, #1024 ; 0x400 8006494: 4835 ldr r0, [pc, #212] ; (800656c ) 8006496: f7fb fe17 bl 80020c8 800649a: 4603 mov r3, r0 800649c: 2b00 cmp r3, #0 800649e: d155 bne.n 800654c { if(TP_Read_XY2(&t0.adc_x,&t0.adc_y)) 80064a0: 4933 ldr r1, [pc, #204] ; (8006570 ) 80064a2: 4834 ldr r0, [pc, #208] ; (8006574 ) 80064a4: f7ff ff89 bl 80063ba 80064a8: 4603 mov r3, r0 80064aa: 2b00 cmp r3, #0 80064ac: d043 beq.n 8006536 {//ÏȶÁÈ¡adÖµ t0.pix_x=(t0.adc_x/tconfig.x_acc)-tconfig.x_offset;//ת»»ÎªÏñËØ×ø±ê 80064ae: 4b31 ldr r3, [pc, #196] ; (8006574 ) 80064b0: 881b ldrh r3, [r3, #0] 80064b2: 4618 mov r0, r3 80064b4: f7fa fc5e bl 8000d74 <__aeabi_i2f> 80064b8: 4602 mov r2, r0 80064ba: 4b2f ldr r3, [pc, #188] ; (8006578 ) 80064bc: 685b ldr r3, [r3, #4] 80064be: 4619 mov r1, r3 80064c0: 4610 mov r0, r2 80064c2: f7fa fd5f bl 8000f84 <__aeabi_fdiv> 80064c6: 4603 mov r3, r0 80064c8: 461c mov r4, r3 80064ca: 4b2b ldr r3, [pc, #172] ; (8006578 ) 80064cc: 68db ldr r3, [r3, #12] 80064ce: 4618 mov r0, r3 80064d0: f7fa fc50 bl 8000d74 <__aeabi_i2f> 80064d4: 4603 mov r3, r0 80064d6: 4619 mov r1, r3 80064d8: 4620 mov r0, r4 80064da: f7fa fb95 bl 8000c08 <__aeabi_fsub> 80064de: 4603 mov r3, r0 80064e0: 4618 mov r0, r3 80064e2: f7fa fdeb bl 80010bc <__aeabi_f2iz> 80064e6: 4603 mov r3, r0 80064e8: 4a22 ldr r2, [pc, #136] ; (8006574 ) 80064ea: 6053 str r3, [r2, #4] t0.pix_y=(t0.adc_y/tconfig.y_acc)-tconfig.y_offset; 80064ec: 4b21 ldr r3, [pc, #132] ; (8006574 ) 80064ee: 885b ldrh r3, [r3, #2] 80064f0: 4618 mov r0, r3 80064f2: f7fa fc3f bl 8000d74 <__aeabi_i2f> 80064f6: 4602 mov r2, r0 80064f8: 4b1f ldr r3, [pc, #124] ; (8006578 ) 80064fa: 689b ldr r3, [r3, #8] 80064fc: 4619 mov r1, r3 80064fe: 4610 mov r0, r2 8006500: f7fa fd40 bl 8000f84 <__aeabi_fdiv> 8006504: 4603 mov r3, r0 8006506: 461c mov r4, r3 8006508: 4b1b ldr r3, [pc, #108] ; (8006578 ) 800650a: 691b ldr r3, [r3, #16] 800650c: 4618 mov r0, r3 800650e: f7fa fc31 bl 8000d74 <__aeabi_i2f> 8006512: 4603 mov r3, r0 8006514: 4619 mov r1, r3 8006516: 4620 mov r0, r4 8006518: f7fa fb76 bl 8000c08 <__aeabi_fsub> 800651c: 4603 mov r3, r0 800651e: 4618 mov r0, r3 8006520: f7fa fdcc bl 80010bc <__aeabi_f2iz> 8006524: 4603 mov r3, r0 8006526: 4a13 ldr r2, [pc, #76] ; (8006574 ) 8006528: 6093 str r3, [r2, #8] t0.d=1; 800652a: 4a12 ldr r2, [pc, #72] ; (8006574 ) 800652c: 7b13 ldrb r3, [r2, #12] 800652e: f043 0304 orr.w r3, r3, #4 8006532: 7313 strb r3, [r2, #12] 8006534: e004 b.n 8006540 }else { t0.d=0; 8006536: 4a0f ldr r2, [pc, #60] ; (8006574 ) 8006538: 7b13 ldrb r3, [r2, #12] 800653a: f36f 0382 bfc r3, #2, #1 800653e: 7313 strb r3, [r2, #12] } t0.c=1; 8006540: 4a0c ldr r2, [pc, #48] ; (8006574 ) 8006542: 7b13 ldrb r3, [r2, #12] 8006544: f043 0302 orr.w r3, r3, #2 8006548: 7313 strb r3, [r2, #12] { t0.c=0; t0.pix_x=-1; t0.pix_y=-1; } } 800654a: e00c b.n 8006566 t0.c=0; 800654c: 4a09 ldr r2, [pc, #36] ; (8006574 ) 800654e: 7b13 ldrb r3, [r2, #12] 8006550: f36f 0341 bfc r3, #1, #1 8006554: 7313 strb r3, [r2, #12] t0.pix_x=-1; 8006556: 4b07 ldr r3, [pc, #28] ; (8006574 ) 8006558: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 800655c: 605a str r2, [r3, #4] t0.pix_y=-1; 800655e: 4b05 ldr r3, [pc, #20] ; (8006574 ) 8006560: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 8006564: 609a str r2, [r3, #8] } 8006566: bf00 nop 8006568: bd98 pop {r3, r4, r7, pc} 800656a: bf00 nop 800656c: 40011c00 .word 0x40011c00 8006570: 2000038e .word 0x2000038e 8006574: 2000038c .word 0x2000038c 8006578: 20000374 .word 0x20000374 0800657c : return 0; } //У׼Ó㬻­Ò»¸öÄ¿±ê×ø±ê //r=×ø±ê°ë¾¶£¬ÏÔʾÌØЧÓà void TP_DrwaTrage(int x,int y,int r) { 800657c: b590 push {r4, r7, lr} 800657e: b087 sub sp, #28 8006580: af02 add r7, sp, #8 8006582: 60f8 str r0, [r7, #12] 8006584: 60b9 str r1, [r7, #8] 8006586: 607a str r2, [r7, #4] Draw_Circle(x,y,r+1,GRAY); 8006588: 68fb ldr r3, [r7, #12] 800658a: b298 uxth r0, r3 800658c: 68bb ldr r3, [r7, #8] 800658e: b299 uxth r1, r3 8006590: 687b ldr r3, [r7, #4] 8006592: b29b uxth r3, r3 8006594: 3301 adds r3, #1 8006596: b29a uxth r2, r3 8006598: f248 4330 movw r3, #33840 ; 0x8430 800659c: f7fe fff3 bl 8005586 Draw_Circle(x,y,r,RED); 80065a0: 68fb ldr r3, [r7, #12] 80065a2: b298 uxth r0, r3 80065a4: 68bb ldr r3, [r7, #8] 80065a6: b299 uxth r1, r3 80065a8: 687b ldr r3, [r7, #4] 80065aa: b29a uxth r2, r3 80065ac: f44f 4378 mov.w r3, #63488 ; 0xf800 80065b0: f7fe ffe9 bl 8005586 LCD_DrawLine(x,y,x+10,y,RED); 80065b4: 68fb ldr r3, [r7, #12] 80065b6: b298 uxth r0, r3 80065b8: 68bb ldr r3, [r7, #8] 80065ba: b299 uxth r1, r3 80065bc: 68fb ldr r3, [r7, #12] 80065be: b29b uxth r3, r3 80065c0: 330a adds r3, #10 80065c2: b29a uxth r2, r3 80065c4: 68bb ldr r3, [r7, #8] 80065c6: b29b uxth r3, r3 80065c8: f44f 4478 mov.w r4, #63488 ; 0xf800 80065cc: 9400 str r4, [sp, #0] 80065ce: f7fe ff55 bl 800547c LCD_DrawLine(x,y,x,y+10,RED); 80065d2: 68fb ldr r3, [r7, #12] 80065d4: b298 uxth r0, r3 80065d6: 68bb ldr r3, [r7, #8] 80065d8: b299 uxth r1, r3 80065da: 68fb ldr r3, [r7, #12] 80065dc: b29a uxth r2, r3 80065de: 68bb ldr r3, [r7, #8] 80065e0: b29b uxth r3, r3 80065e2: 330a adds r3, #10 80065e4: b29b uxth r3, r3 80065e6: f44f 4478 mov.w r4, #63488 ; 0xf800 80065ea: 9400 str r4, [sp, #0] 80065ec: f7fe ff46 bl 800547c LCD_DrawLine(x,y,x-10,y,RED); 80065f0: 68fb ldr r3, [r7, #12] 80065f2: b298 uxth r0, r3 80065f4: 68bb ldr r3, [r7, #8] 80065f6: b299 uxth r1, r3 80065f8: 68fb ldr r3, [r7, #12] 80065fa: b29b uxth r3, r3 80065fc: 3b0a subs r3, #10 80065fe: b29a uxth r2, r3 8006600: 68bb ldr r3, [r7, #8] 8006602: b29b uxth r3, r3 8006604: f44f 4478 mov.w r4, #63488 ; 0xf800 8006608: 9400 str r4, [sp, #0] 800660a: f7fe ff37 bl 800547c LCD_DrawLine(x,y,x,y-10,RED); 800660e: 68fb ldr r3, [r7, #12] 8006610: b298 uxth r0, r3 8006612: 68bb ldr r3, [r7, #8] 8006614: b299 uxth r1, r3 8006616: 68fb ldr r3, [r7, #12] 8006618: b29a uxth r2, r3 800661a: 68bb ldr r3, [r7, #8] 800661c: b29b uxth r3, r3 800661e: 3b0a subs r3, #10 8006620: b29b uxth r3, r3 8006622: f44f 4478 mov.w r4, #63488 ; 0xf800 8006626: 9400 str r4, [sp, #0] 8006628: f7fe ff28 bl 800547c } 800662c: bf00 nop 800662e: 3714 adds r7, #20 8006630: 46bd mov sp, r7 8006632: bd90 pop {r4, r7, pc} 08006634 : //´¥ÃþÆÁУ׼ //mode У׼ģʽ£¬0 ±»¶¯Ð£×¼ £¬1 Ö÷¶¯Ð£×¼ void TP_adjustment(char mode) { 8006634: b5b0 push {r4, r5, r7, lr} 8006636: b0a6 sub sp, #152 ; 0x98 8006638: af02 add r7, sp, #8 800663a: 4603 mov r3, r0 800663c: 71fb strb r3, [r7, #7] //ÅжÏÊÇ·ñÐèҪУ׼£¬´Óeeprom»ñÈ¡Êý¾Ý EEPROM_READ_BATY(16,(char *)&tconfig,sizeof(touch_config)); 800663e: 2218 movs r2, #24 8006640: 4917 ldr r1, [pc, #92] ; (80066a0 ) 8006642: 2010 movs r0, #16 8006644: f7ff f964 bl 8005910 if(tconfig.begin==0xab&&tconfig.end==0xcd&&mode==0) //ÅжÏУ׼±ê¼Ç 8006648: 4b15 ldr r3, [pc, #84] ; (80066a0 ) 800664a: 781b ldrb r3, [r3, #0] 800664c: 2bab cmp r3, #171 ; 0xab 800664e: d107 bne.n 8006660 8006650: 4b13 ldr r3, [pc, #76] ; (80066a0 ) 8006652: 7d1b ldrb r3, [r3, #20] 8006654: 2bcd cmp r3, #205 ; 0xcd 8006656: d103 bne.n 8006660 8006658: 79fb ldrb r3, [r7, #7] 800665a: 2b00 cmp r3, #0 800665c: f000 82b8 beq.w 8006bd0 { return; //ÒѾ­Ð£×¼¹ýÁË } //У׼·½·¨±È½Ï¼òµ¥£¬¶ÁÈ¡4¸ö×ø±ê¼ÆËãadÖµÓëÏñËصĹØϵ char str[64]; //ÓÃÓÚ×Ö·û´®Ìáʾ uint16_t y_adc,x_adc,step=0,r=10; //adc»º´æ£¬Ð£×¼²½Ö裬×ø±êµÄ°ë¾¶ 8006660: 2300 movs r3, #0 8006662: f8a7 308e strh.w r3, [r7, #142] ; 0x8e 8006666: 230a movs r3, #10 8006668: f8a7 308c strh.w r3, [r7, #140] ; 0x8c uint16_t y1,y2,y3,y4,x1,x2,x3,x4; //4¸öµã»º´æ int y5,x5,xd,xl,yd,yl; //ͨ¹ý4¸öµãËã³öxyµÄ³¤±ßºÍ¶Ì±ß float acc_x,acc_y; //Ëã³öµÄ¹Øϵ±¶ÂÊ int offset_x,offset_y; //Ëã³öµÄÆ«²î uint32_t wait=HAL_GetTick()+50000,ms100=0; //У׼ʱ¼ä£¬50Ãëû²Ù×÷¾Í×Ô¶¯Í˳ö 800666c: f7fb fa5c bl 8001b28 8006670: 4603 mov r3, r0 8006672: f503 4343 add.w r3, r3, #49920 ; 0xc300 8006676: 3350 adds r3, #80 ; 0x50 8006678: 67bb str r3, [r7, #120] ; 0x78 800667a: 2300 movs r3, #0 800667c: 677b str r3, [r7, #116] ; 0x74 //ÏÔʾ×Ö·û´®Ìáʾ LCD_Clear(GRAY); 800667e: f248 4030 movw r0, #33840 ; 0x8430 8006682: f7fe fea9 bl 80053d8 LCD_ShowString(0,50,"Calibrate the touch screen",16,RED,RED); 8006686: f44f 4378 mov.w r3, #63488 ; 0xf800 800668a: 9301 str r3, [sp, #4] 800668c: f44f 4378 mov.w r3, #63488 ; 0xf800 8006690: 9300 str r3, [sp, #0] 8006692: 2310 movs r3, #16 8006694: 4a03 ldr r2, [pc, #12] ; (80066a4 ) 8006696: 2132 movs r1, #50 ; 0x32 8006698: 2000 movs r0, #0 800669a: f7ff f89b bl 80057d4 //TP_DrwaTrage(30,30,10); //¿ªÊ¼Ð£×¼ while(HAL_GetTick() 80066a0: 20000374 .word 0x20000374 80066a4: 0800a3d0 .word 0x0800a3d0 { if(TPEN==0) //Èç¹ûÆÁÄ»±»°´Ï 80066a8: f44f 6180 mov.w r1, #1024 ; 0x400 80066ac: 48d7 ldr r0, [pc, #860] ; (8006a0c ) 80066ae: f7fb fd0b bl 80020c8 80066b2: 4603 mov r3, r0 80066b4: 2b00 cmp r3, #0 80066b6: d14c bne.n 8006752 { wait=HAL_GetTick()+50000; //ÖØÖÃ50Ãë 80066b8: f7fb fa36 bl 8001b28 80066bc: 4603 mov r3, r0 80066be: f503 4343 add.w r3, r3, #49920 ; 0xc300 80066c2: 3350 adds r3, #80 ; 0x50 80066c4: 67bb str r3, [r7, #120] ; 0x78 TP_Read_XY2(&x_adc,&y_adc); //¶ÁÈ¡xy adÖµ 80066c6: f107 020a add.w r2, r7, #10 80066ca: f107 0308 add.w r3, r7, #8 80066ce: 4611 mov r1, r2 80066d0: 4618 mov r0, r3 80066d2: f7ff fe72 bl 80063ba //½«¶Áµ½µÄÖµÏÔʾ³öÀ´ sprintf(str,"ADC_X:%04d",x_adc); 80066d6: 893b ldrh r3, [r7, #8] 80066d8: 461a mov r2, r3 80066da: f107 030c add.w r3, r7, #12 80066de: 49cc ldr r1, [pc, #816] ; (8006a10 ) 80066e0: 4618 mov r0, r3 80066e2: f001 fce7 bl 80080b4 LCD_ShowString(100, 0, str, 16, RED, GRAY); 80066e6: f107 020c add.w r2, r7, #12 80066ea: f248 4330 movw r3, #33840 ; 0x8430 80066ee: 9301 str r3, [sp, #4] 80066f0: f44f 4378 mov.w r3, #63488 ; 0xf800 80066f4: 9300 str r3, [sp, #0] 80066f6: 2310 movs r3, #16 80066f8: 2100 movs r1, #0 80066fa: 2064 movs r0, #100 ; 0x64 80066fc: f7ff f86a bl 80057d4 sprintf(str,"ADC_Y:%04d",y_adc); 8006700: 897b ldrh r3, [r7, #10] 8006702: 461a mov r2, r3 8006704: f107 030c add.w r3, r7, #12 8006708: 49c2 ldr r1, [pc, #776] ; (8006a14 ) 800670a: 4618 mov r0, r3 800670c: f001 fcd2 bl 80080b4 LCD_ShowString(100, 16, str, 16, RED, GRAY); 8006710: f107 020c add.w r2, r7, #12 8006714: f248 4330 movw r3, #33840 ; 0x8430 8006718: 9301 str r3, [sp, #4] 800671a: f44f 4378 mov.w r3, #63488 ; 0xf800 800671e: 9300 str r3, [sp, #0] 8006720: 2310 movs r3, #16 8006722: 2110 movs r1, #16 8006724: 2064 movs r0, #100 ; 0x64 8006726: f7ff f855 bl 80057d4 //ÌØЧ£¬°ë¾¶¿ªÊ¼ÊÕËõ if(HAL_GetTick()>ms100) 800672a: f7fb f9fd bl 8001b28 800672e: 4602 mov r2, r0 8006730: 6f7b ldr r3, [r7, #116] ; 0x74 8006732: 4293 cmp r3, r2 8006734: d20d bcs.n 8006752 { ms100=HAL_GetTick()+100; 8006736: f7fb f9f7 bl 8001b28 800673a: 4603 mov r3, r0 800673c: 3364 adds r3, #100 ; 0x64 800673e: 677b str r3, [r7, #116] ; 0x74 if(r>0){r--;} 8006740: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006744: 2b00 cmp r3, #0 8006746: d004 beq.n 8006752 8006748: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 800674c: 3b01 subs r3, #1 800674e: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } //²½Öè0£¬½«µã»­ÔÚ£¨30£¬30£©´Ëʱ°ë¾¶Îª10 if(step==0) 8006752: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006756: 2b00 cmp r3, #0 8006758: d12b bne.n 80067b2 { TP_DrwaTrage(30,30,r); 800675a: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 800675e: 461a mov r2, r3 8006760: 211e movs r1, #30 8006762: 201e movs r0, #30 8006764: f7ff ff0a bl 800657c if(r==0)//µ±°ë¾¶ÊÕËõΪ0µÄʱºò 8006768: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 800676c: 2b00 cmp r3, #0 800676e: d120 bne.n 80067b2 { //½øÈëÏÂÒ»¸ö²½Ö裬»º´æÕâ¸öµãµÄÖµ£¬ÏÔʾ³öÀ´ step+=1; 8006770: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006774: 3301 adds r3, #1 8006776: f8a7 308e strh.w r3, [r7, #142] ; 0x8e y1=y_adc; 800677a: 897b ldrh r3, [r7, #10] 800677c: f8a7 308a strh.w r3, [r7, #138] ; 0x8a x1=x_adc; 8006780: 893b ldrh r3, [r7, #8] 8006782: f8a7 3082 strh.w r3, [r7, #130] ; 0x82 sprintf(str,"point_1 x:%d y:%d",x1,y1); 8006786: f8b7 2082 ldrh.w r2, [r7, #130] ; 0x82 800678a: f8b7 308a ldrh.w r3, [r7, #138] ; 0x8a 800678e: f107 000c add.w r0, r7, #12 8006792: 49a1 ldr r1, [pc, #644] ; (8006a18 ) 8006794: f001 fc8e bl 80080b4 LCD_ShowString(0,66,str,16,RED,RED); 8006798: f107 020c add.w r2, r7, #12 800679c: f44f 4378 mov.w r3, #63488 ; 0xf800 80067a0: 9301 str r3, [sp, #4] 80067a2: f44f 4378 mov.w r3, #63488 ; 0xf800 80067a6: 9300 str r3, [sp, #0] 80067a8: 2310 movs r3, #16 80067aa: 2142 movs r1, #66 ; 0x42 80067ac: 2000 movs r0, #0 80067ae: f7ff f811 bl 80057d4 } } //²½Öè1£¬µÈ´ýÆÁÄ»±»ËÉ¿ª£¬½øÈëÏÂÒ»¸ö²½Ö裬ÖØÖð뾶 if(step==1) 80067b2: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80067b6: 2b01 cmp r3, #1 80067b8: d10f bne.n 80067da { if(TPEN==1) 80067ba: f44f 6180 mov.w r1, #1024 ; 0x400 80067be: 4893 ldr r0, [pc, #588] ; (8006a0c ) 80067c0: f7fb fc82 bl 80020c8 80067c4: 4603 mov r3, r0 80067c6: 2b01 cmp r3, #1 80067c8: d107 bne.n 80067da { step+=1; 80067ca: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80067ce: 3301 adds r3, #1 80067d0: f8a7 308e strh.w r3, [r7, #142] ; 0x8e r=10; 80067d4: 230a movs r3, #10 80067d6: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } //ÏÂÃ漸¸ö²½ÖèºÍÉÏÃæÒ»Ñù if(step==2) 80067da: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80067de: 2b02 cmp r3, #2 80067e0: d12c bne.n 800683c { TP_DrwaTrage(290,30,r); 80067e2: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 80067e6: 461a mov r2, r3 80067e8: 211e movs r1, #30 80067ea: f44f 7091 mov.w r0, #290 ; 0x122 80067ee: f7ff fec5 bl 800657c if(r==0) 80067f2: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 80067f6: 2b00 cmp r3, #0 80067f8: d120 bne.n 800683c { step+=1; 80067fa: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80067fe: 3301 adds r3, #1 8006800: f8a7 308e strh.w r3, [r7, #142] ; 0x8e y2=y_adc; 8006804: 897b ldrh r3, [r7, #10] 8006806: f8a7 3088 strh.w r3, [r7, #136] ; 0x88 x2=x_adc; 800680a: 893b ldrh r3, [r7, #8] 800680c: f8a7 3080 strh.w r3, [r7, #128] ; 0x80 sprintf(str,"point_2 x:%d y:%d",x2,y2); 8006810: f8b7 2080 ldrh.w r2, [r7, #128] ; 0x80 8006814: f8b7 3088 ldrh.w r3, [r7, #136] ; 0x88 8006818: f107 000c add.w r0, r7, #12 800681c: 497f ldr r1, [pc, #508] ; (8006a1c ) 800681e: f001 fc49 bl 80080b4 LCD_ShowString(0,66+16,str,16,RED,RED); 8006822: f107 020c add.w r2, r7, #12 8006826: f44f 4378 mov.w r3, #63488 ; 0xf800 800682a: 9301 str r3, [sp, #4] 800682c: f44f 4378 mov.w r3, #63488 ; 0xf800 8006830: 9300 str r3, [sp, #0] 8006832: 2310 movs r3, #16 8006834: 2152 movs r1, #82 ; 0x52 8006836: 2000 movs r0, #0 8006838: f7fe ffcc bl 80057d4 } } if(step==3) 800683c: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006840: 2b03 cmp r3, #3 8006842: d10f bne.n 8006864 { if(TPEN==1) 8006844: f44f 6180 mov.w r1, #1024 ; 0x400 8006848: 4870 ldr r0, [pc, #448] ; (8006a0c ) 800684a: f7fb fc3d bl 80020c8 800684e: 4603 mov r3, r0 8006850: 2b01 cmp r3, #1 8006852: d107 bne.n 8006864 { step+=1; 8006854: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006858: 3301 adds r3, #1 800685a: f8a7 308e strh.w r3, [r7, #142] ; 0x8e r=10; 800685e: 230a movs r3, #10 8006860: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } if(step==4) 8006864: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006868: 2b04 cmp r3, #4 800686a: d12b bne.n 80068c4 { TP_DrwaTrage(30,210,r); 800686c: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006870: 461a mov r2, r3 8006872: 21d2 movs r1, #210 ; 0xd2 8006874: 201e movs r0, #30 8006876: f7ff fe81 bl 800657c if(r==0) 800687a: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 800687e: 2b00 cmp r3, #0 8006880: d120 bne.n 80068c4 { step+=1; 8006882: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006886: 3301 adds r3, #1 8006888: f8a7 308e strh.w r3, [r7, #142] ; 0x8e y3=y_adc; 800688c: 897b ldrh r3, [r7, #10] 800688e: f8a7 3086 strh.w r3, [r7, #134] ; 0x86 x3=x_adc; 8006892: 893b ldrh r3, [r7, #8] 8006894: f8a7 307e strh.w r3, [r7, #126] ; 0x7e sprintf(str,"point_3 x:%d y:%d",x3,y3); 8006898: f8b7 207e ldrh.w r2, [r7, #126] ; 0x7e 800689c: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86 80068a0: f107 000c add.w r0, r7, #12 80068a4: 495e ldr r1, [pc, #376] ; (8006a20 ) 80068a6: f001 fc05 bl 80080b4 LCD_ShowString(0,66+16+16,str,16,RED,RED); 80068aa: f107 020c add.w r2, r7, #12 80068ae: f44f 4378 mov.w r3, #63488 ; 0xf800 80068b2: 9301 str r3, [sp, #4] 80068b4: f44f 4378 mov.w r3, #63488 ; 0xf800 80068b8: 9300 str r3, [sp, #0] 80068ba: 2310 movs r3, #16 80068bc: 2162 movs r1, #98 ; 0x62 80068be: 2000 movs r0, #0 80068c0: f7fe ff88 bl 80057d4 } } if(step==5) 80068c4: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80068c8: 2b05 cmp r3, #5 80068ca: d10f bne.n 80068ec { if(TPEN==1) 80068cc: f44f 6180 mov.w r1, #1024 ; 0x400 80068d0: 484e ldr r0, [pc, #312] ; (8006a0c ) 80068d2: f7fb fbf9 bl 80020c8 80068d6: 4603 mov r3, r0 80068d8: 2b01 cmp r3, #1 80068da: d107 bne.n 80068ec { step+=1; 80068dc: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80068e0: 3301 adds r3, #1 80068e2: f8a7 308e strh.w r3, [r7, #142] ; 0x8e r=10; 80068e6: 230a movs r3, #10 80068e8: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } if(step==6) 80068ec: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 80068f0: 2b06 cmp r3, #6 80068f2: d12c bne.n 800694e { TP_DrwaTrage(290,210,r); 80068f4: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 80068f8: 461a mov r2, r3 80068fa: 21d2 movs r1, #210 ; 0xd2 80068fc: f44f 7091 mov.w r0, #290 ; 0x122 8006900: f7ff fe3c bl 800657c if(r==0) 8006904: f8b7 308c ldrh.w r3, [r7, #140] ; 0x8c 8006908: 2b00 cmp r3, #0 800690a: d120 bne.n 800694e { step+=1; 800690c: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006910: 3301 adds r3, #1 8006912: f8a7 308e strh.w r3, [r7, #142] ; 0x8e y4=y_adc; 8006916: 897b ldrh r3, [r7, #10] 8006918: f8a7 3084 strh.w r3, [r7, #132] ; 0x84 x4=x_adc; 800691c: 893b ldrh r3, [r7, #8] 800691e: f8a7 307c strh.w r3, [r7, #124] ; 0x7c sprintf(str,"point_4 x:%d y:%d",x4,y4); 8006922: f8b7 207c ldrh.w r2, [r7, #124] ; 0x7c 8006926: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84 800692a: f107 000c add.w r0, r7, #12 800692e: 493d ldr r1, [pc, #244] ; (8006a24 ) 8006930: f001 fbc0 bl 80080b4 LCD_ShowString(0,66+16+16+16,str,16,RED,RED); 8006934: f107 020c add.w r2, r7, #12 8006938: f44f 4378 mov.w r3, #63488 ; 0xf800 800693c: 9301 str r3, [sp, #4] 800693e: f44f 4378 mov.w r3, #63488 ; 0xf800 8006942: 9300 str r3, [sp, #0] 8006944: 2310 movs r3, #16 8006946: 2172 movs r1, #114 ; 0x72 8006948: 2000 movs r0, #0 800694a: f7fe ff43 bl 80057d4 } } if(step==7) 800694e: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 8006952: 2b07 cmp r3, #7 8006954: d10f bne.n 8006976 { if(TPEN==1) 8006956: f44f 6180 mov.w r1, #1024 ; 0x400 800695a: 482c ldr r0, [pc, #176] ; (8006a0c ) 800695c: f7fb fbb4 bl 80020c8 8006960: 4603 mov r3, r0 8006962: 2b01 cmp r3, #1 8006964: d107 bne.n 8006976 { step+=1; 8006966: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 800696a: 3301 adds r3, #1 800696c: f8a7 308e strh.w r3, [r7, #142] ; 0x8e r=10; 8006970: 230a movs r3, #10 8006972: f8a7 308c strh.w r3, [r7, #140] ; 0x8c } } //µ±4¸öµã¶ÁÈ¡Í꣬¿ªÊ¼¼ÆËã¹Øϵ if(step==8) 8006976: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e 800697a: 2b08 cmp r3, #8 800697c: f040 8120 bne.w 8006bc0 { //ÆäʵֻÐèÒªÁ½¸öµã¾ÍÄÜУ׼£¬Í¨¹ýȡƽ¾ùÖµ»ñµÃxyµÄ³¤±ßºÍ¶Ì±ß xd=((x1+x3)/2); 8006980: f8b7 2082 ldrh.w r2, [r7, #130] ; 0x82 8006984: f8b7 307e ldrh.w r3, [r7, #126] ; 0x7e 8006988: 4413 add r3, r2 800698a: 0fda lsrs r2, r3, #31 800698c: 4413 add r3, r2 800698e: 105b asrs r3, r3, #1 8006990: 673b str r3, [r7, #112] ; 0x70 xl=((x2+x4)/2); 8006992: f8b7 2080 ldrh.w r2, [r7, #128] ; 0x80 8006996: f8b7 307c ldrh.w r3, [r7, #124] ; 0x7c 800699a: 4413 add r3, r2 800699c: 0fda lsrs r2, r3, #31 800699e: 4413 add r3, r2 80069a0: 105b asrs r3, r3, #1 80069a2: 66fb str r3, [r7, #108] ; 0x6c yd=((y1+y2)/2); 80069a4: f8b7 208a ldrh.w r2, [r7, #138] ; 0x8a 80069a8: f8b7 3088 ldrh.w r3, [r7, #136] ; 0x88 80069ac: 4413 add r3, r2 80069ae: 0fda lsrs r2, r3, #31 80069b0: 4413 add r3, r2 80069b2: 105b asrs r3, r3, #1 80069b4: 66bb str r3, [r7, #104] ; 0x68 yl=((y3+y4)/2); 80069b6: f8b7 2086 ldrh.w r2, [r7, #134] ; 0x86 80069ba: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84 80069be: 4413 add r3, r2 80069c0: 0fda lsrs r2, r3, #31 80069c2: 4413 add r3, r2 80069c4: 105b asrs r3, r3, #1 80069c6: 667b str r3, [r7, #100] ; 0x64 //³¤±ß¼õÈ¥¶Ì±ß¿ÉÒÔÔÙ»ñµÃÒ»¸öµã x5=xl-xd; 80069c8: 6efa ldr r2, [r7, #108] ; 0x6c 80069ca: 6f3b ldr r3, [r7, #112] ; 0x70 80069cc: 1ad3 subs r3, r2, r3 80069ce: 663b str r3, [r7, #96] ; 0x60 y5=yl-yd; 80069d0: 6e7a ldr r2, [r7, #100] ; 0x64 80069d2: 6ebb ldr r3, [r7, #104] ; 0x68 80069d4: 1ad3 subs r3, r2, r3 80069d6: 65fb str r3, [r7, #92] ; 0x5c //Õâ¸öµãÈç¹ûÊǸºÊý£¬¿Ï¶¨ÓÐ´í£¬¿ÉÄÜÊÇxy¸ã·´ÁË if(x5<0||y5<0) 80069d8: 6e3b ldr r3, [r7, #96] ; 0x60 80069da: 2b00 cmp r3, #0 80069dc: db02 blt.n 80069e4 80069de: 6dfb ldr r3, [r7, #92] ; 0x5c 80069e0: 2b00 cmp r3, #0 80069e2: da23 bge.n 8006a2c { //ÏÔʾerror sprintf(str,"ERROR"); 80069e4: f107 030c add.w r3, r7, #12 80069e8: 490f ldr r1, [pc, #60] ; (8006a28 ) 80069ea: 4618 mov r0, r3 80069ec: f001 fb62 bl 80080b4 LCD_ShowString(0,66+16+16+16+16,str,16,RED, GRAY); 80069f0: f107 020c add.w r2, r7, #12 80069f4: f248 4330 movw r3, #33840 ; 0x8430 80069f8: 9301 str r3, [sp, #4] 80069fa: f44f 4378 mov.w r3, #63488 ; 0xf800 80069fe: 9300 str r3, [sp, #0] 8006a00: 2310 movs r3, #16 8006a02: 2182 movs r1, #130 ; 0x82 8006a04: 2000 movs r0, #0 8006a06: f7fe fee5 bl 80057d4 { 8006a0a: e0cf b.n 8006bac 8006a0c: 40011c00 .word 0x40011c00 8006a10: 0800a3ec .word 0x0800a3ec 8006a14: 0800a3f8 .word 0x0800a3f8 8006a18: 0800a404 .word 0x0800a404 8006a1c: 0800a418 .word 0x0800a418 8006a20: 0800a42c .word 0x0800a42c 8006a24: 0800a440 .word 0x0800a440 8006a28: 0800a454 .word 0x0800a454 }else { //¼ÆËã¹Øϵ±¶ÂÊ //adµÄ³¤±ß¼õÈ¥¶Ì±ßÔÙ³ýȥʵ¼ÊÆÁÄ»ÏñËصij¤±ß¼õ¶Ì±ß£¨260=320-30-30£¬180=240-30-30£© acc_x=x5/260.0; 8006a2c: 6e38 ldr r0, [r7, #96] ; 0x60 8006a2e: f7f9 fd55 bl 80004dc <__aeabi_i2d> 8006a32: f04f 0200 mov.w r2, #0 8006a36: 4b68 ldr r3, [pc, #416] ; (8006bd8 ) 8006a38: f7f9 fee4 bl 8000804 <__aeabi_ddiv> 8006a3c: 4602 mov r2, r0 8006a3e: 460b mov r3, r1 8006a40: 4610 mov r0, r2 8006a42: 4619 mov r1, r3 8006a44: f7fa f88c bl 8000b60 <__aeabi_d2f> 8006a48: 4603 mov r3, r0 8006a4a: 65bb str r3, [r7, #88] ; 0x58 acc_y=y5/180.0; 8006a4c: 6df8 ldr r0, [r7, #92] ; 0x5c 8006a4e: f7f9 fd45 bl 80004dc <__aeabi_i2d> 8006a52: f04f 0200 mov.w r2, #0 8006a56: 4b61 ldr r3, [pc, #388] ; (8006bdc ) 8006a58: f7f9 fed4 bl 8000804 <__aeabi_ddiv> 8006a5c: 4602 mov r2, r0 8006a5e: 460b mov r3, r1 8006a60: 4610 mov r0, r2 8006a62: 4619 mov r1, r3 8006a64: f7fa f87c bl 8000b60 <__aeabi_d2f> 8006a68: 4603 mov r3, r0 8006a6a: 657b str r3, [r7, #84] ; 0x54 //ÑéÖ¤±¶ÂÊ£¬½«Êµ¼ÊÖµ¼õÈ¥ÑéÖ¤Öµ¾ÍµÈÓÚÎó²îÖµ£¬ÒòΪÓÐÁ½¸öµã£¬ËùÒÔ¼ÆËãÁËÁ½¸öÎó²îºóÇóÁËƽ¾ùÖµ offset_x=(((xd/acc_x)-30)+((xl/acc_x)-290))/2; 8006a6c: 6f38 ldr r0, [r7, #112] ; 0x70 8006a6e: f7fa f981 bl 8000d74 <__aeabi_i2f> 8006a72: 4603 mov r3, r0 8006a74: 6db9 ldr r1, [r7, #88] ; 0x58 8006a76: 4618 mov r0, r3 8006a78: f7fa fa84 bl 8000f84 <__aeabi_fdiv> 8006a7c: 4603 mov r3, r0 8006a7e: 4958 ldr r1, [pc, #352] ; (8006be0 ) 8006a80: 4618 mov r0, r3 8006a82: f7fa f8c1 bl 8000c08 <__aeabi_fsub> 8006a86: 4603 mov r3, r0 8006a88: 461c mov r4, r3 8006a8a: 6ef8 ldr r0, [r7, #108] ; 0x6c 8006a8c: f7fa f972 bl 8000d74 <__aeabi_i2f> 8006a90: 4603 mov r3, r0 8006a92: 6db9 ldr r1, [r7, #88] ; 0x58 8006a94: 4618 mov r0, r3 8006a96: f7fa fa75 bl 8000f84 <__aeabi_fdiv> 8006a9a: 4603 mov r3, r0 8006a9c: 4951 ldr r1, [pc, #324] ; (8006be4 ) 8006a9e: 4618 mov r0, r3 8006aa0: f7fa f8b2 bl 8000c08 <__aeabi_fsub> 8006aa4: 4603 mov r3, r0 8006aa6: 4619 mov r1, r3 8006aa8: 4620 mov r0, r4 8006aaa: f7fa f8af bl 8000c0c <__addsf3> 8006aae: 4603 mov r3, r0 8006ab0: f04f 4180 mov.w r1, #1073741824 ; 0x40000000 8006ab4: 4618 mov r0, r3 8006ab6: f7fa fa65 bl 8000f84 <__aeabi_fdiv> 8006aba: 4603 mov r3, r0 8006abc: 4618 mov r0, r3 8006abe: f7fa fafd bl 80010bc <__aeabi_f2iz> 8006ac2: 4603 mov r3, r0 8006ac4: 653b str r3, [r7, #80] ; 0x50 offset_y=(((yd/acc_y)-30)+((yl/acc_y)-210))/2; 8006ac6: 6eb8 ldr r0, [r7, #104] ; 0x68 8006ac8: f7fa f954 bl 8000d74 <__aeabi_i2f> 8006acc: 4603 mov r3, r0 8006ace: 6d79 ldr r1, [r7, #84] ; 0x54 8006ad0: 4618 mov r0, r3 8006ad2: f7fa fa57 bl 8000f84 <__aeabi_fdiv> 8006ad6: 4603 mov r3, r0 8006ad8: 4941 ldr r1, [pc, #260] ; (8006be0 ) 8006ada: 4618 mov r0, r3 8006adc: f7fa f894 bl 8000c08 <__aeabi_fsub> 8006ae0: 4603 mov r3, r0 8006ae2: 461c mov r4, r3 8006ae4: 6e78 ldr r0, [r7, #100] ; 0x64 8006ae6: f7fa f945 bl 8000d74 <__aeabi_i2f> 8006aea: 4603 mov r3, r0 8006aec: 6d79 ldr r1, [r7, #84] ; 0x54 8006aee: 4618 mov r0, r3 8006af0: f7fa fa48 bl 8000f84 <__aeabi_fdiv> 8006af4: 4603 mov r3, r0 8006af6: 493c ldr r1, [pc, #240] ; (8006be8 ) 8006af8: 4618 mov r0, r3 8006afa: f7fa f885 bl 8000c08 <__aeabi_fsub> 8006afe: 4603 mov r3, r0 8006b00: 4619 mov r1, r3 8006b02: 4620 mov r0, r4 8006b04: f7fa f882 bl 8000c0c <__addsf3> 8006b08: 4603 mov r3, r0 8006b0a: f04f 4180 mov.w r1, #1073741824 ; 0x40000000 8006b0e: 4618 mov r0, r3 8006b10: f7fa fa38 bl 8000f84 <__aeabi_fdiv> 8006b14: 4603 mov r3, r0 8006b16: 4618 mov r0, r3 8006b18: f7fa fad0 bl 80010bc <__aeabi_f2iz> 8006b1c: 4603 mov r3, r0 8006b1e: 64fb str r3, [r7, #76] ; 0x4c //±£´æ¼ÆËã½á¹û tconfig.x_acc=acc_x; 8006b20: 4a32 ldr r2, [pc, #200] ; (8006bec ) 8006b22: 6dbb ldr r3, [r7, #88] ; 0x58 8006b24: 6053 str r3, [r2, #4] tconfig.x_offset=offset_x; 8006b26: 4a31 ldr r2, [pc, #196] ; (8006bec ) 8006b28: 6d3b ldr r3, [r7, #80] ; 0x50 8006b2a: 60d3 str r3, [r2, #12] tconfig.y_acc=acc_y; 8006b2c: 4a2f ldr r2, [pc, #188] ; (8006bec ) 8006b2e: 6d7b ldr r3, [r7, #84] ; 0x54 8006b30: 6093 str r3, [r2, #8] tconfig.y_offset=offset_y; 8006b32: 4a2e ldr r2, [pc, #184] ; (8006bec ) 8006b34: 6cfb ldr r3, [r7, #76] ; 0x4c 8006b36: 6113 str r3, [r2, #16] //eeprom¿é±ê¼Ç tconfig.begin=0xab; 8006b38: 4b2c ldr r3, [pc, #176] ; (8006bec ) 8006b3a: 22ab movs r2, #171 ; 0xab 8006b3c: 701a strb r2, [r3, #0] tconfig.end=0xcd; 8006b3e: 4b2b ldr r3, [pc, #172] ; (8006bec ) 8006b40: 22cd movs r2, #205 ; 0xcd 8006b42: 751a strb r2, [r3, #20] //ÏÔʾ¼ÆËã½á¹û sprintf(str,"x_acc=%f y_acc=%f",acc_x,acc_y); 8006b44: 6db8 ldr r0, [r7, #88] ; 0x58 8006b46: f7f9 fcdb bl 8000500 <__aeabi_f2d> 8006b4a: 4604 mov r4, r0 8006b4c: 460d mov r5, r1 8006b4e: 6d78 ldr r0, [r7, #84] ; 0x54 8006b50: f7f9 fcd6 bl 8000500 <__aeabi_f2d> 8006b54: 4602 mov r2, r0 8006b56: 460b mov r3, r1 8006b58: f107 000c add.w r0, r7, #12 8006b5c: e9cd 2300 strd r2, r3, [sp] 8006b60: 4622 mov r2, r4 8006b62: 462b mov r3, r5 8006b64: 4922 ldr r1, [pc, #136] ; (8006bf0 ) 8006b66: f001 faa5 bl 80080b4 LCD_ShowString(0,66+16+16+16+16,str,16,RED,RED); 8006b6a: f107 020c add.w r2, r7, #12 8006b6e: f44f 4378 mov.w r3, #63488 ; 0xf800 8006b72: 9301 str r3, [sp, #4] 8006b74: f44f 4378 mov.w r3, #63488 ; 0xf800 8006b78: 9300 str r3, [sp, #0] 8006b7a: 2310 movs r3, #16 8006b7c: 2182 movs r1, #130 ; 0x82 8006b7e: 2000 movs r0, #0 8006b80: f7fe fe28 bl 80057d4 sprintf(str,"x_offset=%d y_offset=%d",offset_x,offset_y); 8006b84: f107 000c add.w r0, r7, #12 8006b88: 6cfb ldr r3, [r7, #76] ; 0x4c 8006b8a: 6d3a ldr r2, [r7, #80] ; 0x50 8006b8c: 4919 ldr r1, [pc, #100] ; (8006bf4 ) 8006b8e: f001 fa91 bl 80080b4 LCD_ShowString(0,66+16+16+16+16+16,str,16,RED,RED); 8006b92: f107 020c add.w r2, r7, #12 8006b96: f44f 4378 mov.w r3, #63488 ; 0xf800 8006b9a: 9301 str r3, [sp, #4] 8006b9c: f44f 4378 mov.w r3, #63488 ; 0xf800 8006ba0: 9300 str r3, [sp, #0] 8006ba2: 2310 movs r3, #16 8006ba4: 2192 movs r1, #146 ; 0x92 8006ba6: 2000 movs r0, #0 8006ba8: f7fe fe14 bl 80057d4 } //½«½á¹û±£´æÆðÀ´ EEPROM_WRITE_BATY(16,(char *)&tconfig,sizeof(touch_config)); 8006bac: 2218 movs r2, #24 8006bae: 490f ldr r1, [pc, #60] ; (8006bec ) 8006bb0: 2010 movs r0, #16 8006bb2: f7fe febf bl 8005934 HAL_Delay(1000); 8006bb6: f44f 707a mov.w r0, #1000 ; 0x3e8 8006bba: f7fa ffbf bl 8001b3c return; 8006bbe: e008 b.n 8006bd2 while(HAL_GetTick() 8006bc4: 4602 mov r2, r0 8006bc6: 6fbb ldr r3, [r7, #120] ; 0x78 8006bc8: 4293 cmp r3, r2 8006bca: f63f ad6d bhi.w 80066a8 8006bce: e000 b.n 8006bd2 return; //ÒѾ­Ð£×¼¹ýÁË 8006bd0: bf00 nop } } } 8006bd2: 3790 adds r7, #144 ; 0x90 8006bd4: 46bd mov sp, r7 8006bd6: bdb0 pop {r4, r5, r7, pc} 8006bd8: 40704000 .word 0x40704000 8006bdc: 40668000 .word 0x40668000 8006be0: 41f00000 .word 0x41f00000 8006be4: 43910000 .word 0x43910000 8006be8: 43520000 .word 0x43520000 8006bec: 20000374 .word 0x20000374 8006bf0: 0800a45c .word 0x0800a45c 8006bf4: 0800a470 .word 0x0800a470 08006bf8 : window *idcard_window; char idcard_str[32]; void APP_IDcard_init(window *a_window) { 8006bf8: b580 push {r7, lr} 8006bfa: b082 sub sp, #8 8006bfc: af00 add r7, sp, #0 8006bfe: 6078 str r0, [r7, #4] idcard_window=a_window; 8006c00: 4a04 ldr r2, [pc, #16] ; (8006c14 ) 8006c02: 687b ldr r3, [r7, #4] 8006c04: 6013 str r3, [r2, #0] RC522_Init(); 8006c06: f7ff fa99 bl 800613c } 8006c0a: bf00 nop 8006c0c: 3708 adds r7, #8 8006c0e: 46bd mov sp, r7 8006c10: bd80 pop {r7, pc} 8006c12: bf00 nop 8006c14: 200003d0 .word 0x200003d0 08006c18 : uint32_t card_number_D=0; char fundcard,PA,sele,checkkey; void APP_IDcard_loop() { 8006c18: b580 push {r7, lr} 8006c1a: b082 sub sp, #8 8006c1c: af02 add r7, sp, #8 fundcard = PcdRequest(PICC_REQALL,CT); 8006c1e: 4961 ldr r1, [pc, #388] ; (8006da4 ) 8006c20: 2052 movs r0, #82 ; 0x52 8006c22: f7ff f8ea bl 8005dfa 8006c26: 4603 mov r3, r0 8006c28: 461a mov r2, r3 8006c2a: 4b5f ldr r3, [pc, #380] ; (8006da8 ) 8006c2c: 701a strb r2, [r3, #0] if(fundcard==MI_OK) 8006c2e: 4b5e ldr r3, [pc, #376] ; (8006da8 ) 8006c30: 781b ldrb r3, [r3, #0] 8006c32: 2b00 cmp r3, #0 8006c34: f040 80b2 bne.w 8006d9c { status=MI_ERR; 8006c38: 4b5c ldr r3, [pc, #368] ; (8006dac ) 8006c3a: 2202 movs r2, #2 8006c3c: 701a strb r2, [r3, #0] PA = PcdAnticoll(SN); 8006c3e: 485c ldr r0, [pc, #368] ; (8006db0 ) 8006c40: f7ff f912 bl 8005e68 8006c44: 4603 mov r3, r0 8006c46: 461a mov r2, r3 8006c48: 4b5a ldr r3, [pc, #360] ; (8006db4 ) 8006c4a: 701a strb r2, [r3, #0] if(PA==MI_OK) 8006c4c: 4b59 ldr r3, [pc, #356] ; (8006db4 ) 8006c4e: 781b ldrb r3, [r3, #0] 8006c50: 2b00 cmp r3, #0 8006c52: f040 80a3 bne.w 8006d9c { sprintf(idcard_str,"CardId:%X%X",CT[0],CT[1]); 8006c56: 4b53 ldr r3, [pc, #332] ; (8006da4 ) 8006c58: 781b ldrb r3, [r3, #0] 8006c5a: 461a mov r2, r3 8006c5c: 4b51 ldr r3, [pc, #324] ; (8006da4 ) 8006c5e: 785b ldrb r3, [r3, #1] 8006c60: 4955 ldr r1, [pc, #340] ; (8006db8 ) 8006c62: 4856 ldr r0, [pc, #344] ; (8006dbc ) 8006c64: f001 fa26 bl 80080b4 LCD_ShowString(idcard_window->x, idcard_window->y+16, idcard_str, 16, GREEN, RED); 8006c68: 4b55 ldr r3, [pc, #340] ; (8006dc0 ) 8006c6a: 681b ldr r3, [r3, #0] 8006c6c: 8818 ldrh r0, [r3, #0] 8006c6e: 4b54 ldr r3, [pc, #336] ; (8006dc0 ) 8006c70: 681b ldr r3, [r3, #0] 8006c72: 885b ldrh r3, [r3, #2] 8006c74: 3310 adds r3, #16 8006c76: b299 uxth r1, r3 8006c78: f44f 4378 mov.w r3, #63488 ; 0xf800 8006c7c: 9301 str r3, [sp, #4] 8006c7e: f44f 63fc mov.w r3, #2016 ; 0x7e0 8006c82: 9300 str r3, [sp, #0] 8006c84: 2310 movs r3, #16 8006c86: 4a4d ldr r2, [pc, #308] ; (8006dbc ) 8006c88: f7fe fda4 bl 80057d4 sprintf(idcard_str,"CardId:%X%X%X%X",SN[0],SN[1],SN[2],SN[3]); 8006c8c: 4b48 ldr r3, [pc, #288] ; (8006db0 ) 8006c8e: 781b ldrb r3, [r3, #0] 8006c90: 4619 mov r1, r3 8006c92: 4b47 ldr r3, [pc, #284] ; (8006db0 ) 8006c94: 785b ldrb r3, [r3, #1] 8006c96: 4618 mov r0, r3 8006c98: 4b45 ldr r3, [pc, #276] ; (8006db0 ) 8006c9a: 789b ldrb r3, [r3, #2] 8006c9c: 461a mov r2, r3 8006c9e: 4b44 ldr r3, [pc, #272] ; (8006db0 ) 8006ca0: 78db ldrb r3, [r3, #3] 8006ca2: 9301 str r3, [sp, #4] 8006ca4: 9200 str r2, [sp, #0] 8006ca6: 4603 mov r3, r0 8006ca8: 460a mov r2, r1 8006caa: 4946 ldr r1, [pc, #280] ; (8006dc4 ) 8006cac: 4843 ldr r0, [pc, #268] ; (8006dbc ) 8006cae: f001 fa01 bl 80080b4 LCD_ShowString(idcard_window->x, idcard_window->y+32, idcard_str, 16, GREEN, RED); 8006cb2: 4b43 ldr r3, [pc, #268] ; (8006dc0 ) 8006cb4: 681b ldr r3, [r3, #0] 8006cb6: 8818 ldrh r0, [r3, #0] 8006cb8: 4b41 ldr r3, [pc, #260] ; (8006dc0 ) 8006cba: 681b ldr r3, [r3, #0] 8006cbc: 885b ldrh r3, [r3, #2] 8006cbe: 3320 adds r3, #32 8006cc0: b299 uxth r1, r3 8006cc2: f44f 4378 mov.w r3, #63488 ; 0xf800 8006cc6: 9301 str r3, [sp, #4] 8006cc8: f44f 63fc mov.w r3, #2016 ; 0x7e0 8006ccc: 9300 str r3, [sp, #0] 8006cce: 2310 movs r3, #16 8006cd0: 4a3a ldr r2, [pc, #232] ; (8006dbc ) 8006cd2: f7fe fd7f bl 80057d4 sele=PcdSelect(SN); 8006cd6: 4836 ldr r0, [pc, #216] ; (8006db0 ) 8006cd8: f7ff f97a bl 8005fd0 8006cdc: 4603 mov r3, r0 8006cde: b2da uxtb r2, r3 8006ce0: 4b39 ldr r3, [pc, #228] ; (8006dc8 ) 8006ce2: 701a strb r2, [r3, #0] if(sele==MI_OK) 8006ce4: 4b38 ldr r3, [pc, #224] ; (8006dc8 ) 8006ce6: 781b ldrb r3, [r3, #0] 8006ce8: 2b00 cmp r3, #0 8006cea: d157 bne.n 8006d9c { LCD_ShowString(idcard_window->x, idcard_window->y+48, "SELE OK", 16, GREEN, RED); 8006cec: 4b34 ldr r3, [pc, #208] ; (8006dc0 ) 8006cee: 681b ldr r3, [r3, #0] 8006cf0: 8818 ldrh r0, [r3, #0] 8006cf2: 4b33 ldr r3, [pc, #204] ; (8006dc0 ) 8006cf4: 681b ldr r3, [r3, #0] 8006cf6: 885b ldrh r3, [r3, #2] 8006cf8: 3330 adds r3, #48 ; 0x30 8006cfa: b299 uxth r1, r3 8006cfc: f44f 4378 mov.w r3, #63488 ; 0xf800 8006d00: 9301 str r3, [sp, #4] 8006d02: f44f 63fc mov.w r3, #2016 ; 0x7e0 8006d06: 9300 str r3, [sp, #0] 8006d08: 2310 movs r3, #16 8006d0a: 4a30 ldr r2, [pc, #192] ; (8006dcc ) 8006d0c: f7fe fd62 bl 80057d4 checkkey=MI_ERR; 8006d10: 4b2f ldr r3, [pc, #188] ; (8006dd0 ) 8006d12: 2202 movs r2, #2 8006d14: 701a strb r2, [r3, #0] checkkey=PcdAuthState(0x61,0,KEY,SN); 8006d16: 4b26 ldr r3, [pc, #152] ; (8006db0 ) 8006d18: 4a2e ldr r2, [pc, #184] ; (8006dd4 ) 8006d1a: 2100 movs r1, #0 8006d1c: 2061 movs r0, #97 ; 0x61 8006d1e: f7ff f9a8 bl 8006072 8006d22: 4603 mov r3, r0 8006d24: 461a mov r2, r3 8006d26: 4b2a ldr r3, [pc, #168] ; (8006dd0 ) 8006d28: 701a strb r2, [r3, #0] if(checkkey==MI_OK) 8006d2a: 4b29 ldr r3, [pc, #164] ; (8006dd0 ) 8006d2c: 781b ldrb r3, [r3, #0] 8006d2e: 2b00 cmp r3, #0 8006d30: d111 bne.n 8006d56 { LCD_ShowString(idcard_window->x, idcard_window->y+48+16, "KEY OK", 16, GREEN, RED); 8006d32: 4b23 ldr r3, [pc, #140] ; (8006dc0 ) 8006d34: 681b ldr r3, [r3, #0] 8006d36: 8818 ldrh r0, [r3, #0] 8006d38: 4b21 ldr r3, [pc, #132] ; (8006dc0 ) 8006d3a: 681b ldr r3, [r3, #0] 8006d3c: 885b ldrh r3, [r3, #2] 8006d3e: 3340 adds r3, #64 ; 0x40 8006d40: b299 uxth r1, r3 8006d42: f44f 4378 mov.w r3, #63488 ; 0xf800 8006d46: 9301 str r3, [sp, #4] 8006d48: f44f 63fc mov.w r3, #2016 ; 0x7e0 8006d4c: 9300 str r3, [sp, #0] 8006d4e: 2310 movs r3, #16 8006d50: 4a21 ldr r2, [pc, #132] ; (8006dd8 ) 8006d52: f7fe fd3f bl 80057d4 //PcdRead(0,RFID); } checkkey=MI_ERR; 8006d56: 4b1e ldr r3, [pc, #120] ; (8006dd0 ) 8006d58: 2202 movs r2, #2 8006d5a: 701a strb r2, [r3, #0] checkkey=PcdAuthState(0x61,32,KEY,SN); 8006d5c: 4b14 ldr r3, [pc, #80] ; (8006db0 ) 8006d5e: 4a1d ldr r2, [pc, #116] ; (8006dd4 ) 8006d60: 2120 movs r1, #32 8006d62: 2061 movs r0, #97 ; 0x61 8006d64: f7ff f985 bl 8006072 8006d68: 4603 mov r3, r0 8006d6a: 461a mov r2, r3 8006d6c: 4b18 ldr r3, [pc, #96] ; (8006dd0 ) 8006d6e: 701a strb r2, [r3, #0] if(checkkey==MI_OK) 8006d70: 4b17 ldr r3, [pc, #92] ; (8006dd0 ) 8006d72: 781b ldrb r3, [r3, #0] 8006d74: 2b00 cmp r3, #0 8006d76: d111 bne.n 8006d9c { LCD_ShowString(idcard_window->x, idcard_window->y+48+32, "KEY OK", 16, GREEN, RED); 8006d78: 4b11 ldr r3, [pc, #68] ; (8006dc0 ) 8006d7a: 681b ldr r3, [r3, #0] 8006d7c: 8818 ldrh r0, [r3, #0] 8006d7e: 4b10 ldr r3, [pc, #64] ; (8006dc0 ) 8006d80: 681b ldr r3, [r3, #0] 8006d82: 885b ldrh r3, [r3, #2] 8006d84: 3350 adds r3, #80 ; 0x50 8006d86: b299 uxth r1, r3 8006d88: f44f 4378 mov.w r3, #63488 ; 0xf800 8006d8c: 9301 str r3, [sp, #4] 8006d8e: f44f 63fc mov.w r3, #2016 ; 0x7e0 8006d92: 9300 str r3, [sp, #0] 8006d94: 2310 movs r3, #16 8006d96: 4a10 ldr r2, [pc, #64] ; (8006dd8 ) 8006d98: f7fe fd1c bl 80057d4 sprintf(idcard_str,"%x%x%x%x%x%x%x%x%x%x%x%x%x%x%x%x",RFID[0],RFID[1],RFID[2],RFID[3],RFID[4],RFID[5],RFID[6],RFID[7],RFID[8],RFID[9],RFID[10],RFID[11],RFID[12],RFID[13],RFID[14],RFID[15]); LCD_ShowString(idcard_window->x, idcard_window->y+32, idcard_str, 16, GREEN, RED); } */ } 8006d9c: bf00 nop 8006d9e: 46bd mov sp, r7 8006da0: bd80 pop {r7, pc} 8006da2: bf00 nop 8006da4: 200003d8 .word 0x200003d8 8006da8: 200003e0 .word 0x200003e0 8006dac: 200003e2 .word 0x200003e2 8006db0: 200003dc .word 0x200003dc 8006db4: 200003ac .word 0x200003ac 8006db8: 0800a488 .word 0x0800a488 8006dbc: 200003b0 .word 0x200003b0 8006dc0: 200003d0 .word 0x200003d0 8006dc4: 0800a494 .word 0x0800a494 8006dc8: 200003e1 .word 0x200003e1 8006dcc: 0800a4a4 .word 0x0800a4a4 8006dd0: 200003d4 .word 0x200003d4 8006dd4: 2000000c .word 0x2000000c 8006dd8: 0800a4ac .word 0x0800a4ac 08006ddc : IIC_SAND_DATE(MAX30102_Device_address,REG_LED2_PA,&a,1);// Choose value for ~ 10mA for LED2 a=0x7f; IIC_SAND_DATE(MAX30102_Device_address,REG_PILOT_PA,&a,1);// Choose value for ~ 25mA for Pilot LED } void max30102_read_fifo(void) { 8006ddc: b580 push {r7, lr} 8006dde: b082 sub sp, #8 8006de0: af00 add r7, sp, #0 uint16_t un_temp; fifo_red=0; 8006de2: 4b3c ldr r3, [pc, #240] ; (8006ed4 ) 8006de4: 2200 movs r2, #0 8006de6: 801a strh r2, [r3, #0] fifo_ir=0; 8006de8: 4b3b ldr r3, [pc, #236] ; (8006ed8 ) 8006dea: 2200 movs r2, #0 8006dec: 801a strh r2, [r3, #0] uint8_t ach_i2c_data[6]; //read and clear status register IIC_READ_DATE(MAX30102_Device_address,REG_INTR_STATUS_1,&ach_i2c_data,1); 8006dee: 463a mov r2, r7 8006df0: 2301 movs r3, #1 8006df2: 2100 movs r1, #0 8006df4: 20ae movs r0, #174 ; 0xae 8006df6: f7fe fe01 bl 80059fc IIC_READ_DATE(MAX30102_Device_address,REG_INTR_STATUS_2,&ach_i2c_data,1); 8006dfa: 463a mov r2, r7 8006dfc: 2301 movs r3, #1 8006dfe: 2101 movs r1, #1 8006e00: 20ae movs r0, #174 ; 0xae 8006e02: f7fe fdfb bl 80059fc ach_i2c_data[0]=REG_FIFO_DATA; 8006e06: 2307 movs r3, #7 8006e08: 703b strb r3, [r7, #0] IIC_READ_DATE(MAX30102_Device_address,REG_FIFO_DATA,&ach_i2c_data,6); 8006e0a: 463a mov r2, r7 8006e0c: 2306 movs r3, #6 8006e0e: 2107 movs r1, #7 8006e10: 20ae movs r0, #174 ; 0xae 8006e12: f7fe fdf3 bl 80059fc un_temp=ach_i2c_data[0]; 8006e16: 783b ldrb r3, [r7, #0] 8006e18: 80fb strh r3, [r7, #6] un_temp<<=14; 8006e1a: 88fb ldrh r3, [r7, #6] 8006e1c: 039b lsls r3, r3, #14 8006e1e: 80fb strh r3, [r7, #6] fifo_red+=un_temp; 8006e20: 4b2c ldr r3, [pc, #176] ; (8006ed4 ) 8006e22: 881a ldrh r2, [r3, #0] 8006e24: 88fb ldrh r3, [r7, #6] 8006e26: 4413 add r3, r2 8006e28: b29a uxth r2, r3 8006e2a: 4b2a ldr r3, [pc, #168] ; (8006ed4 ) 8006e2c: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[1]; 8006e2e: 787b ldrb r3, [r7, #1] 8006e30: 80fb strh r3, [r7, #6] un_temp<<=6; 8006e32: 88fb ldrh r3, [r7, #6] 8006e34: 019b lsls r3, r3, #6 8006e36: 80fb strh r3, [r7, #6] fifo_red+=un_temp; 8006e38: 4b26 ldr r3, [pc, #152] ; (8006ed4 ) 8006e3a: 881a ldrh r2, [r3, #0] 8006e3c: 88fb ldrh r3, [r7, #6] 8006e3e: 4413 add r3, r2 8006e40: b29a uxth r2, r3 8006e42: 4b24 ldr r3, [pc, #144] ; (8006ed4 ) 8006e44: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[2]; 8006e46: 78bb ldrb r3, [r7, #2] 8006e48: 80fb strh r3, [r7, #6] un_temp>>=2; 8006e4a: 88fb ldrh r3, [r7, #6] 8006e4c: 089b lsrs r3, r3, #2 8006e4e: 80fb strh r3, [r7, #6] fifo_red+=un_temp; 8006e50: 4b20 ldr r3, [pc, #128] ; (8006ed4 ) 8006e52: 881a ldrh r2, [r3, #0] 8006e54: 88fb ldrh r3, [r7, #6] 8006e56: 4413 add r3, r2 8006e58: b29a uxth r2, r3 8006e5a: 4b1e ldr r3, [pc, #120] ; (8006ed4 ) 8006e5c: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[3]; 8006e5e: 78fb ldrb r3, [r7, #3] 8006e60: 80fb strh r3, [r7, #6] un_temp<<=14; 8006e62: 88fb ldrh r3, [r7, #6] 8006e64: 039b lsls r3, r3, #14 8006e66: 80fb strh r3, [r7, #6] fifo_ir+=un_temp; 8006e68: 4b1b ldr r3, [pc, #108] ; (8006ed8 ) 8006e6a: 881a ldrh r2, [r3, #0] 8006e6c: 88fb ldrh r3, [r7, #6] 8006e6e: 4413 add r3, r2 8006e70: b29a uxth r2, r3 8006e72: 4b19 ldr r3, [pc, #100] ; (8006ed8 ) 8006e74: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[4]; 8006e76: 793b ldrb r3, [r7, #4] 8006e78: 80fb strh r3, [r7, #6] un_temp<<=6; 8006e7a: 88fb ldrh r3, [r7, #6] 8006e7c: 019b lsls r3, r3, #6 8006e7e: 80fb strh r3, [r7, #6] fifo_ir+=un_temp; 8006e80: 4b15 ldr r3, [pc, #84] ; (8006ed8 ) 8006e82: 881a ldrh r2, [r3, #0] 8006e84: 88fb ldrh r3, [r7, #6] 8006e86: 4413 add r3, r2 8006e88: b29a uxth r2, r3 8006e8a: 4b13 ldr r3, [pc, #76] ; (8006ed8 ) 8006e8c: 801a strh r2, [r3, #0] un_temp=ach_i2c_data[5]; 8006e8e: 797b ldrb r3, [r7, #5] 8006e90: 80fb strh r3, [r7, #6] un_temp>>=2; 8006e92: 88fb ldrh r3, [r7, #6] 8006e94: 089b lsrs r3, r3, #2 8006e96: 80fb strh r3, [r7, #6] fifo_ir+=un_temp; 8006e98: 4b0f ldr r3, [pc, #60] ; (8006ed8 ) 8006e9a: 881a ldrh r2, [r3, #0] 8006e9c: 88fb ldrh r3, [r7, #6] 8006e9e: 4413 add r3, r2 8006ea0: b29a uxth r2, r3 8006ea2: 4b0d ldr r3, [pc, #52] ; (8006ed8 ) 8006ea4: 801a strh r2, [r3, #0] if(fifo_ir<=10000) 8006ea6: 4b0c ldr r3, [pc, #48] ; (8006ed8 ) 8006ea8: 881b ldrh r3, [r3, #0] 8006eaa: f242 7210 movw r2, #10000 ; 0x2710 8006eae: 4293 cmp r3, r2 8006eb0: d802 bhi.n 8006eb8 { fifo_ir=0; 8006eb2: 4b09 ldr r3, [pc, #36] ; (8006ed8 ) 8006eb4: 2200 movs r2, #0 8006eb6: 801a strh r2, [r3, #0] } if(fifo_red<=10000) 8006eb8: 4b06 ldr r3, [pc, #24] ; (8006ed4 ) 8006eba: 881b ldrh r3, [r3, #0] 8006ebc: f242 7210 movw r2, #10000 ; 0x2710 8006ec0: 4293 cmp r3, r2 8006ec2: d802 bhi.n 8006eca { fifo_red=0; 8006ec4: 4b03 ldr r3, [pc, #12] ; (8006ed4 ) 8006ec6: 2200 movs r2, #0 8006ec8: 801a strh r2, [r3, #0] } } 8006eca: bf00 nop 8006ecc: 3708 adds r7, #8 8006ece: 46bd mov sp, r7 8006ed0: bd80 pop {r7, pc} 8006ed2: bf00 nop 8006ed4: 20002534 .word 0x20002534 8006ed8: 20000424 .word 0x20000424 08006edc : } void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)//10us { 8006edc: b590 push {r4, r7, lr} 8006ede: b083 sub sp, #12 8006ee0: af00 add r7, sp, #0 8006ee2: 6078 str r0, [r7, #4] if (htim == (&htim6)) 8006ee4: 687b ldr r3, [r7, #4] 8006ee6: 4a21 ldr r2, [pc, #132] ; (8006f6c ) 8006ee8: 4293 cmp r3, r2 8006eea: d13a bne.n 8006f62 { max30102_read_fifo(); //read from MAX30102 FIFO2 8006eec: f7ff ff76 bl 8006ddc //½«Êý¾ÝдÈëfftÊäÈë²¢Çå³ýÊä³ö s1[g_fft_index].real = fifo_red; 8006ef0: 4b1f ldr r3, [pc, #124] ; (8006f70 ) 8006ef2: 881b ldrh r3, [r3, #0] 8006ef4: 4a1f ldr r2, [pc, #124] ; (8006f74 ) 8006ef6: 8812 ldrh r2, [r2, #0] 8006ef8: 4614 mov r4, r2 8006efa: 4618 mov r0, r3 8006efc: f7f9 ff36 bl 8000d6c <__aeabi_ui2f> 8006f00: 4603 mov r3, r0 8006f02: 4a1d ldr r2, [pc, #116] ; (8006f78 ) 8006f04: f842 3034 str.w r3, [r2, r4, lsl #3] s1[g_fft_index].imag= 0; 8006f08: 4b1a ldr r3, [pc, #104] ; (8006f74 ) 8006f0a: 881b ldrh r3, [r3, #0] 8006f0c: 4a1a ldr r2, [pc, #104] ; (8006f78 ) 8006f0e: 00db lsls r3, r3, #3 8006f10: 4413 add r3, r2 8006f12: f04f 0200 mov.w r2, #0 8006f16: 605a str r2, [r3, #4] s2[g_fft_index].real = fifo_ir; 8006f18: 4b18 ldr r3, [pc, #96] ; (8006f7c ) 8006f1a: 881b ldrh r3, [r3, #0] 8006f1c: 4a15 ldr r2, [pc, #84] ; (8006f74 ) 8006f1e: 8812 ldrh r2, [r2, #0] 8006f20: 4614 mov r4, r2 8006f22: 4618 mov r0, r3 8006f24: f7f9 ff22 bl 8000d6c <__aeabi_ui2f> 8006f28: 4603 mov r3, r0 8006f2a: 4a15 ldr r2, [pc, #84] ; (8006f80 ) 8006f2c: f842 3034 str.w r3, [r2, r4, lsl #3] s2[g_fft_index].imag= 0; 8006f30: 4b10 ldr r3, [pc, #64] ; (8006f74 ) 8006f32: 881b ldrh r3, [r3, #0] 8006f34: 4a12 ldr r2, [pc, #72] ; (8006f80 ) 8006f36: 00db lsls r3, r3, #3 8006f38: 4413 add r3, r2 8006f3a: f04f 0200 mov.w r2, #0 8006f3e: 605a str r2, [r3, #4] g_fft_index++; 8006f40: 4b0c ldr r3, [pc, #48] ; (8006f74 ) 8006f42: 881b ldrh r3, [r3, #0] 8006f44: 3301 adds r3, #1 8006f46: b29a uxth r2, r3 8006f48: 4b0a ldr r3, [pc, #40] ; (8006f74 ) 8006f4a: 801a strh r2, [r3, #0] if(g_fft_index>FFT_N) 8006f4c: 4b09 ldr r3, [pc, #36] ; (8006f74 ) 8006f4e: 881b ldrh r3, [r3, #0] 8006f50: f5b3 7f00 cmp.w r3, #512 ; 0x200 8006f54: d905 bls.n 8006f62 { get_data_flag=1; 8006f56: 4b0b ldr r3, [pc, #44] ; (8006f84 ) 8006f58: 2201 movs r2, #1 8006f5a: 701a strb r2, [r3, #0] HAL_TIM_Base_Stop_IT(&htim6); 8006f5c: 4803 ldr r0, [pc, #12] ; (8006f6c ) 8006f5e: f7fd faf1 bl 8004544 } } } 8006f62: bf00 nop 8006f64: 370c adds r7, #12 8006f66: 46bd mov sp, r7 8006f68: bd90 pop {r4, r7, pc} 8006f6a: bf00 nop 8006f6c: 200002b0 .word 0x200002b0 8006f70: 20002534 .word 0x20002534 8006f74: 2000020a .word 0x2000020a 8006f78: 2000042c .word 0x2000042c 8006f7c: 20000424 .word 0x20000424 8006f80: 200014ac .word 0x200014ac 8006f84: 20000208 .word 0x20000208 08006f88 : extern touch_device t0; task run_loop;//Ö÷Ñ­»·×´Ì¬»ú void main_app() { 8006f88: b580 push {r7, lr} 8006f8a: b096 sub sp, #88 ; 0x58 8006f8c: af04 add r7, sp, #16 char str[64]; LCDx_Init(); 8006f8e: f7fe f87d bl 800508c EPPROM_SLOWWRITE_INIT(); 8006f92: f7fe fc5d bl 8005850 if(HAL_GPIO_ReadPin(KEY3_GPIO_Port, KEY3_Pin)==0) 8006f96: 2104 movs r1, #4 8006f98: 4819 ldr r0, [pc, #100] ; (8007000 ) 8006f9a: f7fb f895 bl 80020c8 8006f9e: 4603 mov r3, r0 8006fa0: 2b00 cmp r3, #0 8006fa2: d103 bne.n 8006fac { TP_adjustment(1); 8006fa4: 2001 movs r0, #1 8006fa6: f7ff fb45 bl 8006634 8006faa: e002 b.n 8006fb2 }else { TP_adjustment(0); 8006fac: 2000 movs r0, #0 8006fae: f7ff fb41 bl 8006634 } UI *ui=UI_Init(BLACK); 8006fb2: 2000 movs r0, #0 8006fb4: f000 f852 bl 800705c 8006fb8: 6478 str r0, [r7, #68] ; 0x44 //APP_blood_init(New_Window(ui,10,10,128,128,WHITE,"MAX30102")); APP_IDcard_init(New_Window(ui,25,30,150,100,GREEN,"IDcard")); 8006fba: 4b12 ldr r3, [pc, #72] ; (8007004 ) 8006fbc: 9302 str r3, [sp, #8] 8006fbe: f44f 63fc mov.w r3, #2016 ; 0x7e0 8006fc2: 9301 str r3, [sp, #4] 8006fc4: 2364 movs r3, #100 ; 0x64 8006fc6: 9300 str r3, [sp, #0] 8006fc8: 2396 movs r3, #150 ; 0x96 8006fca: 221e movs r2, #30 8006fcc: 2119 movs r1, #25 8006fce: 6c78 ldr r0, [r7, #68] ; 0x44 8006fd0: f000 f877 bl 80070c2 8006fd4: 4603 mov r3, r0 8006fd6: 4618 mov r0, r3 8006fd8: f7ff fe0e bl 8006bf8 //New_Window(ui,80,80,60,90,YELLOW,"YELLOW"); //New_Window(ui,120,90,70,60,MAGENTA,"MAGENTA"); ui->refresh_ui_flag=1; 8006fdc: 6c7a ldr r2, [r7, #68] ; 0x44 8006fde: f892 3020 ldrb.w r3, [r2, #32] 8006fe2: f043 0304 orr.w r3, r3, #4 8006fe6: f882 3020 strb.w r3, [r2, #32] */ // ½»²æ±àÒë²âÊÔ //APP_blood_loop(); APP_IDcard_loop(); 8006fea: f7ff fe15 bl 8006c18 UI_Server(ui); 8006fee: 6c78 ldr r0, [r7, #68] ; 0x44 8006ff0: f000 fa0e bl 8007410 TP_Server(); 8006ff4: f7ff fa4a bl 800648c EEPROM_SLOWWRITE_SERVER(); 8006ff8: f7fe fc44 bl 8005884 { 8006ffc: e7f5 b.n 8006fea 8006ffe: bf00 nop 8007000: 40011800 .word 0x40011800 8007004: 0800a4b4 .word 0x0800a4b4 08007008 : #include "touch.h" extern touch_device t0; //½Ó¿Ú //ÉèÖÃÆÁÄ»ÏñËØ×ø±ê void Inteface_SetCursor(uint16_t Xpos, uint16_t Ypos) { 8007008: b580 push {r7, lr} 800700a: b082 sub sp, #8 800700c: af00 add r7, sp, #0 800700e: 4603 mov r3, r0 8007010: 460a mov r2, r1 8007012: 80fb strh r3, [r7, #6] 8007014: 4613 mov r3, r2 8007016: 80bb strh r3, [r7, #4] LCD_SetCursor(Xpos,Ypos); //ÉèÖùâ±êλÖà 8007018: 88ba ldrh r2, [r7, #4] 800701a: 88fb ldrh r3, [r7, #6] 800701c: 4611 mov r1, r2 800701e: 4618 mov r0, r3 8007020: f7fe f92a bl 8005278 LCD_REG_ADDRESS=lcddev.wramcmd; //¿ªÊ¼Ð´ÈëGRAM 8007024: 4b04 ldr r3, [pc, #16] ; (8007038 ) 8007026: 79da ldrb r2, [r3, #7] 8007028: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000 800702c: b292 uxth r2, r2 800702e: 801a strh r2, [r3, #0] } 8007030: bf00 nop 8007032: 3708 adds r7, #8 8007034: 46bd mov sp, r7 8007036: bd80 pop {r7, pc} 8007038: 20000354 .word 0x20000354 0800703c : //ÍùÏñËØ×ø±êдÈëÒ»¸öÑÕÉ« void Inteface_SetColor(uint16_t color) { 800703c: b480 push {r7} 800703e: b083 sub sp, #12 8007040: af00 add r7, sp, #0 8007042: 4603 mov r3, r0 8007044: 80fb strh r3, [r7, #6] LCD_DATA_ADDRESS=color; 8007046: 4a04 ldr r2, [pc, #16] ; (8007058 ) 8007048: 88fb ldrh r3, [r7, #6] 800704a: 8013 strh r3, [r2, #0] } 800704c: bf00 nop 800704e: 370c adds r7, #12 8007050: 46bd mov sp, r7 8007052: bc80 pop {r7} 8007054: 4770 bx lr 8007056: bf00 nop 8007058: 6c000800 .word 0x6c000800 0800705c : //н¨Ò»¸öUI¶ÔÏó //µ±Ê±¶¼Ïë·¨ÊÇÀàËÆwindowsµÄ¶à×ÀÃ棬ÿ¸ö×ÀÃ涼ÄÜÓÐn¸ö´°¿Ú UI *UI_Init(COLOR_16 background) { 800705c: b580 push {r7, lr} 800705e: b084 sub sp, #16 8007060: af00 add r7, sp, #0 8007062: 6078 str r0, [r7, #4] UI *ui; ui = (UI*)malloc(sizeof(UI)); 8007064: 2024 movs r0, #36 ; 0x24 8007066: f000 faf7 bl 8007658 800706a: 4603 mov r3, r0 800706c: 60fb str r3, [r7, #12] if(ui!=NULL) 800706e: 68fb ldr r3, [r7, #12] 8007070: 2b00 cmp r3, #0 8007072: d021 beq.n 80070b8 { ui->x=0; 8007074: 68fb ldr r3, [r7, #12] 8007076: 2200 movs r2, #0 8007078: 809a strh r2, [r3, #4] ui->y=0; 800707a: 68fb ldr r3, [r7, #12] 800707c: 2200 movs r2, #0 800707e: 80da strh r2, [r3, #6] ui->high=240; 8007080: 68fb ldr r3, [r7, #12] 8007082: 22f0 movs r2, #240 ; 0xf0 8007084: 815a strh r2, [r3, #10] ui->width=320; 8007086: 68fb ldr r3, [r7, #12] 8007088: f44f 72a0 mov.w r2, #320 ; 0x140 800708c: 811a strh r2, [r3, #8] ui->background=background; 800708e: 68fb ldr r3, [r7, #12] 8007090: 687a ldr r2, [r7, #4] 8007092: 601a str r2, [r3, #0] ui->windows=NULL; 8007094: 68fb ldr r3, [r7, #12] 8007096: 2200 movs r2, #0 8007098: 60da str r2, [r3, #12] ui->last_windows=NULL; 800709a: 68fb ldr r3, [r7, #12] 800709c: 2200 movs r2, #0 800709e: 611a str r2, [r3, #16] ui->refresh_ui_flag=1; 80070a0: 68fa ldr r2, [r7, #12] 80070a2: f892 3020 ldrb.w r3, [r2, #32] 80070a6: f043 0304 orr.w r3, r3, #4 80070aa: f882 3020 strb.w r3, [r2, #32] ui->moveed_windwos=NULL; 80070ae: 68fb ldr r3, [r7, #12] 80070b0: 2200 movs r2, #0 80070b2: 615a str r2, [r3, #20] ui->touch->acc_y=0; } */ return ui; 80070b4: 68fb ldr r3, [r7, #12] 80070b6: e000 b.n 80070ba } return NULL; 80070b8: 2300 movs r3, #0 } 80070ba: 4618 mov r0, r3 80070bc: 3710 adds r7, #16 80070be: 46bd mov sp, r7 80070c0: bd80 pop {r7, pc} 080070c2 : //н¨Ò»¸ö´°¿Ú //·µ»Ø´°¿ÚµÄÖ¸Õë //½«´°¿Ú¹ÒÔص½Ä³¸öui window *New_Window(UI *ui,uint16_t x,uint16_t y,uint16_t width,uint16_t high,COLOR_16 background,const char *title) { 80070c2: b580 push {r7, lr} 80070c4: b088 sub sp, #32 80070c6: af00 add r7, sp, #0 80070c8: 60f8 str r0, [r7, #12] 80070ca: 4608 mov r0, r1 80070cc: 4611 mov r1, r2 80070ce: 461a mov r2, r3 80070d0: 4603 mov r3, r0 80070d2: 817b strh r3, [r7, #10] 80070d4: 460b mov r3, r1 80070d6: 813b strh r3, [r7, #8] 80070d8: 4613 mov r3, r2 80070da: 80fb strh r3, [r7, #6] window *temp_window; temp_window = (window*)malloc(sizeof(window)); 80070dc: 201c movs r0, #28 80070de: f000 fabb bl 8007658 80070e2: 4603 mov r3, r0 80070e4: 617b str r3, [r7, #20] if(temp_window!=NULL) 80070e6: 697b ldr r3, [r7, #20] 80070e8: 2b00 cmp r3, #0 80070ea: d022 beq.n 8007132 { temp_window->background=background; 80070ec: 697b ldr r3, [r7, #20] 80070ee: 6afa ldr r2, [r7, #44] ; 0x2c 80070f0: 609a str r2, [r3, #8] temp_window->high=high; 80070f2: 697b ldr r3, [r7, #20] 80070f4: 8d3a ldrh r2, [r7, #40] ; 0x28 80070f6: 80da strh r2, [r3, #6] temp_window->width=width; 80070f8: 697b ldr r3, [r7, #20] 80070fa: 88fa ldrh r2, [r7, #6] 80070fc: 809a strh r2, [r3, #4] temp_window->x=x; 80070fe: 697b ldr r3, [r7, #20] 8007100: 897a ldrh r2, [r7, #10] 8007102: 801a strh r2, [r3, #0] temp_window->y=y; 8007104: 697b ldr r3, [r7, #20] 8007106: 893a ldrh r2, [r7, #8] 8007108: 805a strh r2, [r3, #2] for(int a=0;a<16;a++) 800710a: 2300 movs r3, #0 800710c: 61fb str r3, [r7, #28] 800710e: e00c b.n 800712a { temp_window->title[a]=title[a]; 8007110: 69fb ldr r3, [r7, #28] 8007112: 6b3a ldr r2, [r7, #48] ; 0x30 8007114: 4413 add r3, r2 8007116: 7819 ldrb r1, [r3, #0] 8007118: 697a ldr r2, [r7, #20] 800711a: 69fb ldr r3, [r7, #28] 800711c: 4413 add r3, r2 800711e: 330c adds r3, #12 8007120: 460a mov r2, r1 8007122: 701a strb r2, [r3, #0] for(int a=0;a<16;a++) 8007124: 69fb ldr r3, [r7, #28] 8007126: 3301 adds r3, #1 8007128: 61fb str r3, [r7, #28] 800712a: 69fb ldr r3, [r7, #28] 800712c: 2b0f cmp r3, #15 800712e: ddef ble.n 8007110 8007130: e001 b.n 8007136 } }else{return NULL;} 8007132: 2300 movs r3, #0 8007134: e02a b.n 800718c windows_stack *temp_windows_stack; temp_windows_stack=ui->last_windows; 8007136: 68fb ldr r3, [r7, #12] 8007138: 691b ldr r3, [r3, #16] 800713a: 61bb str r3, [r7, #24] if(temp_windows_stack==NULL) 800713c: 69bb ldr r3, [r7, #24] 800713e: 2b00 cmp r3, #0 8007140: d10b bne.n 800715a { temp_windows_stack=(windows_stack*)malloc(sizeof(windows_stack)); 8007142: 200c movs r0, #12 8007144: f000 fa88 bl 8007658 8007148: 4603 mov r3, r0 800714a: 61bb str r3, [r7, #24] temp_windows_stack->up=NULL; 800714c: 69bb ldr r3, [r7, #24] 800714e: 2200 movs r2, #0 8007150: 601a str r2, [r3, #0] ui->windows=temp_windows_stack; 8007152: 68fb ldr r3, [r7, #12] 8007154: 69ba ldr r2, [r7, #24] 8007156: 60da str r2, [r3, #12] 8007158: e00e b.n 8007178 while(temp_windows_stack->next!=NULL) { temp_windows_stack=temp_windows_stack->next; } */ windows_stack *up=temp_windows_stack;//±¸·Ýµ±Ç°¶ÔÏóÖ¸Õë 800715a: 69bb ldr r3, [r7, #24] 800715c: 613b str r3, [r7, #16] temp_windows_stack->next=(windows_stack*)malloc(sizeof(windows_stack)); 800715e: 200c movs r0, #12 8007160: f000 fa7a bl 8007658 8007164: 4603 mov r3, r0 8007166: 461a mov r2, r3 8007168: 69bb ldr r3, [r7, #24] 800716a: 609a str r2, [r3, #8] temp_windows_stack=temp_windows_stack->next; 800716c: 69bb ldr r3, [r7, #24] 800716e: 689b ldr r3, [r3, #8] 8007170: 61bb str r3, [r7, #24] temp_windows_stack->up=up; 8007172: 69bb ldr r3, [r7, #24] 8007174: 693a ldr r2, [r7, #16] 8007176: 601a str r2, [r3, #0] } temp_windows_stack->next=NULL; 8007178: 69bb ldr r3, [r7, #24] 800717a: 2200 movs r2, #0 800717c: 609a str r2, [r3, #8] temp_windows_stack->window=temp_window; 800717e: 69bb ldr r3, [r7, #24] 8007180: 697a ldr r2, [r7, #20] 8007182: 605a str r2, [r3, #4] ui->last_windows=temp_windows_stack; 8007184: 68fb ldr r3, [r7, #12] 8007186: 69ba ldr r2, [r7, #24] 8007188: 611a str r2, [r3, #16] return temp_window; 800718a: 697b ldr r3, [r7, #20] } 800718c: 4618 mov r0, r3 800718e: 3720 adds r7, #32 8007190: 46bd mov sp, r7 8007192: bd80 pop {r7, pc} 08007194 : temp_window->y=temp_window->y+acc_y; } //ÏÔʾһ¸ö´°¿Ú void Refresh_Window(UI *ui,window *temp_window) { 8007194: b580 push {r7, lr} 8007196: b088 sub sp, #32 8007198: af02 add r7, sp, #8 800719a: 6078 str r0, [r7, #4] 800719c: 6039 str r1, [r7, #0] //¿ªÊ¼»æÖÆ´°¿Ú//Ìî³ä´°¿Ú±³¾° int x,y; char z; for(uint16_t temp_y=0;temp_yhigh;temp_y++) 800719e: 2300 movs r3, #0 80071a0: 82bb strh r3, [r7, #20] 80071a2: e063 b.n 800726c { z=1; 80071a4: 2301 movs r3, #1 80071a6: 75fb strb r3, [r7, #23] for(uint16_t temp_i=0;temp_iwidth;temp_i++) 80071a8: 2300 movs r3, #0 80071aa: 827b strh r3, [r7, #18] 80071ac: e056 b.n 800725c { x=temp_window->x+temp_i; 80071ae: 683b ldr r3, [r7, #0] 80071b0: 881b ldrh r3, [r3, #0] 80071b2: 461a mov r2, r3 80071b4: 8a7b ldrh r3, [r7, #18] 80071b6: 4413 add r3, r2 80071b8: 60fb str r3, [r7, #12] y=temp_window->y+temp_y; 80071ba: 683b ldr r3, [r7, #0] 80071bc: 885b ldrh r3, [r3, #2] 80071be: 461a mov r2, r3 80071c0: 8abb ldrh r3, [r7, #20] 80071c2: 4413 add r3, r2 80071c4: 60bb str r3, [r7, #8] if(y>=ui->y&&z==1) 80071c6: 687b ldr r3, [r7, #4] 80071c8: 88db ldrh r3, [r3, #6] 80071ca: 461a mov r2, r3 80071cc: 68bb ldr r3, [r7, #8] 80071ce: 4293 cmp r3, r2 80071d0: db0c blt.n 80071ec 80071d2: 7dfb ldrb r3, [r7, #23] 80071d4: 2b01 cmp r3, #1 80071d6: d109 bne.n 80071ec { Inteface_SetCursor(x,y); 80071d8: 68fb ldr r3, [r7, #12] 80071da: b29b uxth r3, r3 80071dc: 68ba ldr r2, [r7, #8] 80071de: b292 uxth r2, r2 80071e0: 4611 mov r1, r2 80071e2: 4618 mov r0, r3 80071e4: f7ff ff10 bl 8007008 z=0; 80071e8: 2300 movs r3, #0 80071ea: 75fb strb r3, [r7, #23] } if(x>=ui->x) 80071ec: 687b ldr r3, [r7, #4] 80071ee: 889b ldrh r3, [r3, #4] 80071f0: 461a mov r2, r3 80071f2: 68fb ldr r3, [r7, #12] 80071f4: 4293 cmp r3, r2 80071f6: db2e blt.n 8007256 { if(temp_y<16) 80071f8: 8abb ldrh r3, [r7, #20] 80071fa: 2b0f cmp r3, #15 80071fc: d80f bhi.n 800721e { if(temp_i>temp_window->width-16) 80071fe: 683b ldr r3, [r7, #0] 8007200: 889b ldrh r3, [r3, #4] 8007202: f1a3 020f sub.w r2, r3, #15 8007206: 8a7b ldrh r3, [r7, #18] 8007208: 429a cmp r2, r3 800720a: dc04 bgt.n 8007216 { Inteface_SetColor(RED); 800720c: f44f 4078 mov.w r0, #63488 ; 0xf800 8007210: f7ff ff14 bl 800703c 8007214: e01f b.n 8007256 }else { Inteface_SetColor(BLUE); 8007216: 201f movs r0, #31 8007218: f7ff ff10 bl 800703c 800721c: e01b b.n 8007256 } }else { if(temp_i==0||temp_y==0||temp_i==temp_window->width-1||temp_y==temp_window->high-1) 800721e: 8a7b ldrh r3, [r7, #18] 8007220: 2b00 cmp r3, #0 8007222: d00e beq.n 8007242 8007224: 8abb ldrh r3, [r7, #20] 8007226: 2b00 cmp r3, #0 8007228: d00b beq.n 8007242 800722a: 8a7a ldrh r2, [r7, #18] 800722c: 683b ldr r3, [r7, #0] 800722e: 889b ldrh r3, [r3, #4] 8007230: 3b01 subs r3, #1 8007232: 429a cmp r2, r3 8007234: d005 beq.n 8007242 8007236: 8aba ldrh r2, [r7, #20] 8007238: 683b ldr r3, [r7, #0] 800723a: 88db ldrh r3, [r3, #6] 800723c: 3b01 subs r3, #1 800723e: 429a cmp r2, r3 8007240: d103 bne.n 800724a { Inteface_SetColor(BLUE); 8007242: 201f movs r0, #31 8007244: f7ff fefa bl 800703c 8007248: e005 b.n 8007256 }else { Inteface_SetColor(temp_window->background); 800724a: 683b ldr r3, [r7, #0] 800724c: 689b ldr r3, [r3, #8] 800724e: b29b uxth r3, r3 8007250: 4618 mov r0, r3 8007252: f7ff fef3 bl 800703c for(uint16_t temp_i=0;temp_iwidth;temp_i++) 8007256: 8a7b ldrh r3, [r7, #18] 8007258: 3301 adds r3, #1 800725a: 827b strh r3, [r7, #18] 800725c: 683b ldr r3, [r7, #0] 800725e: 889b ldrh r3, [r3, #4] 8007260: 8a7a ldrh r2, [r7, #18] 8007262: 429a cmp r2, r3 8007264: d3a3 bcc.n 80071ae for(uint16_t temp_y=0;temp_yhigh;temp_y++) 8007266: 8abb ldrh r3, [r7, #20] 8007268: 3301 adds r3, #1 800726a: 82bb strh r3, [r7, #20] 800726c: 683b ldr r3, [r7, #0] 800726e: 88db ldrh r3, [r3, #6] 8007270: 8aba ldrh r2, [r7, #20] 8007272: 429a cmp r2, r3 8007274: d396 bcc.n 80071a4 } } */ //ÏÔʾtitle LCD_ShowString(temp_window->x,temp_window->y,&temp_window->title,16,WHITE,WHITE); 8007276: 683b ldr r3, [r7, #0] 8007278: 8818 ldrh r0, [r3, #0] 800727a: 683b ldr r3, [r7, #0] 800727c: 8859 ldrh r1, [r3, #2] 800727e: 683b ldr r3, [r7, #0] 8007280: f103 020c add.w r2, r3, #12 8007284: f64f 73ff movw r3, #65535 ; 0xffff 8007288: 9301 str r3, [sp, #4] 800728a: f64f 73ff movw r3, #65535 ; 0xffff 800728e: 9300 str r3, [sp, #0] 8007290: 2310 movs r3, #16 8007292: f7fe fa9f bl 80057d4 } 8007296: bf00 nop 8007298: 3718 adds r7, #24 800729a: 46bd mov sp, r7 800729c: bd80 pop {r7, pc} 0800729e : * ºÜ¿Éϧ ÐÁÐÁ¿à¿àдµÄ´úÂëÒª±»·ÅÆú * ÓÃË㷨ʵÏÖÕÚµ²¹Øϵ¼ÆËãÕæͦ´À * * */ void Refresh_UI(UI *ui) { 800729e: b580 push {r7, lr} 80072a0: b086 sub sp, #24 80072a2: af00 add r7, sp, #0 80072a4: 6078 str r0, [r7, #4] int flag=0; 80072a6: 2300 movs r3, #0 80072a8: 617b str r3, [r7, #20] uint16_t dot_y=0,dot_x=0; 80072aa: 2300 movs r3, #0 80072ac: 827b strh r3, [r7, #18] 80072ae: 2300 movs r3, #0 80072b0: 823b strh r3, [r7, #16] //»­±³¾° for(dot_y=ui->y;dot_yhigh;dot_y++) 80072b2: 687b ldr r3, [r7, #4] 80072b4: 88db ldrh r3, [r3, #6] 80072b6: 827b strh r3, [r7, #18] 80072b8: e01a b.n 80072f0 { Inteface_SetCursor(dot_x,dot_y); 80072ba: 8a7a ldrh r2, [r7, #18] 80072bc: 8a3b ldrh r3, [r7, #16] 80072be: 4611 mov r1, r2 80072c0: 4618 mov r0, r3 80072c2: f7ff fea1 bl 8007008 for(dot_x=ui->x;dot_xwidth;dot_x++) 80072c6: 687b ldr r3, [r7, #4] 80072c8: 889b ldrh r3, [r3, #4] 80072ca: 823b strh r3, [r7, #16] 80072cc: e008 b.n 80072e0 { Inteface_SetColor(ui->background); 80072ce: 687b ldr r3, [r7, #4] 80072d0: 681b ldr r3, [r3, #0] 80072d2: b29b uxth r3, r3 80072d4: 4618 mov r0, r3 80072d6: f7ff feb1 bl 800703c for(dot_x=ui->x;dot_xwidth;dot_x++) 80072da: 8a3b ldrh r3, [r7, #16] 80072dc: 3301 adds r3, #1 80072de: 823b strh r3, [r7, #16] 80072e0: 687b ldr r3, [r7, #4] 80072e2: 891b ldrh r3, [r3, #8] 80072e4: 8a3a ldrh r2, [r7, #16] 80072e6: 429a cmp r2, r3 80072e8: d3f1 bcc.n 80072ce for(dot_y=ui->y;dot_yhigh;dot_y++) 80072ea: 8a7b ldrh r3, [r7, #18] 80072ec: 3301 adds r3, #1 80072ee: 827b strh r3, [r7, #18] 80072f0: 687b ldr r3, [r7, #4] 80072f2: 895b ldrh r3, [r3, #10] 80072f4: 8a7a ldrh r2, [r7, #18] 80072f6: 429a cmp r2, r3 80072f8: d3df bcc.n 80072ba } } windows_stack *temp_windows_stack,*temp_windows_stack2; temp_windows_stack=ui->windows; 80072fa: 687b ldr r3, [r7, #4] 80072fc: 68db ldr r3, [r3, #12] 80072fe: 60fb str r3, [r7, #12] do { if(temp_windows_stack!=NULL) 8007300: 68fb ldr r3, [r7, #12] 8007302: 2b00 cmp r3, #0 8007304: d00b beq.n 800731e { flag=1; 8007306: 2301 movs r3, #1 8007308: 617b str r3, [r7, #20] Refresh_Window(ui,temp_windows_stack->window); 800730a: 68fb ldr r3, [r7, #12] 800730c: 685b ldr r3, [r3, #4] 800730e: 4619 mov r1, r3 8007310: 6878 ldr r0, [r7, #4] 8007312: f7ff ff3f bl 8007194 //»æÖÆÏÂÒ»¸ö´°¿Ú temp_windows_stack=temp_windows_stack->next; 8007316: 68fb ldr r3, [r7, #12] 8007318: 689b ldr r3, [r3, #8] 800731a: 60fb str r3, [r7, #12] 800731c: e001 b.n 8007322 }else { flag=0; 800731e: 2300 movs r3, #0 8007320: 617b str r3, [r7, #20] } }while(flag); 8007322: 697b ldr r3, [r7, #20] 8007324: 2b00 cmp r3, #0 8007326: d1eb bne.n 8007300 } } */ } 8007328: bf00 nop 800732a: bf00 nop 800732c: 3718 adds r7, #24 800732e: 46bd mov sp, r7 8007330: bd80 pop {r7, pc} 08007332 : #define BODY 1 #define BAR 2 #define CLOSE 3 uint8_t Chack(window *this_window,int x,int y) { 8007332: b480 push {r7} 8007334: b087 sub sp, #28 8007336: af00 add r7, sp, #0 8007338: 60f8 str r0, [r7, #12] 800733a: 60b9 str r1, [r7, #8] 800733c: 607a str r2, [r7, #4] int a=0; 800733e: 2300 movs r3, #0 8007340: 617b str r3, [r7, #20] if(((x>=this_window->x)&&(x<(this_window->x+this_window->width)))&&((y>=this_window->y+16)&&(y<(this_window->y+this_window->high)))) 8007342: 68fb ldr r3, [r7, #12] 8007344: 881b ldrh r3, [r3, #0] 8007346: 461a mov r2, r3 8007348: 68bb ldr r3, [r7, #8] 800734a: 4293 cmp r3, r2 800734c: db19 blt.n 8007382 800734e: 68fb ldr r3, [r7, #12] 8007350: 881b ldrh r3, [r3, #0] 8007352: 461a mov r2, r3 8007354: 68fb ldr r3, [r7, #12] 8007356: 889b ldrh r3, [r3, #4] 8007358: 4413 add r3, r2 800735a: 68ba ldr r2, [r7, #8] 800735c: 429a cmp r2, r3 800735e: da10 bge.n 8007382 8007360: 68fb ldr r3, [r7, #12] 8007362: 885b ldrh r3, [r3, #2] 8007364: 330f adds r3, #15 8007366: 687a ldr r2, [r7, #4] 8007368: 429a cmp r2, r3 800736a: dd0a ble.n 8007382 800736c: 68fb ldr r3, [r7, #12] 800736e: 885b ldrh r3, [r3, #2] 8007370: 461a mov r2, r3 8007372: 68fb ldr r3, [r7, #12] 8007374: 88db ldrh r3, [r3, #6] 8007376: 4413 add r3, r2 8007378: 687a ldr r2, [r7, #4] 800737a: 429a cmp r2, r3 800737c: da01 bge.n 8007382 { a=1; 800737e: 2301 movs r3, #1 8007380: 617b str r3, [r7, #20] } if(((x>=this_window->x)&&(x<(this_window->x+this_window->width-16)))&&((y>=this_window->y)&&(y<(this_window->y+16)))) 8007382: 68fb ldr r3, [r7, #12] 8007384: 881b ldrh r3, [r3, #0] 8007386: 461a mov r2, r3 8007388: 68bb ldr r3, [r7, #8] 800738a: 4293 cmp r3, r2 800738c: db17 blt.n 80073be 800738e: 68fb ldr r3, [r7, #12] 8007390: 881b ldrh r3, [r3, #0] 8007392: 461a mov r2, r3 8007394: 68fb ldr r3, [r7, #12] 8007396: 889b ldrh r3, [r3, #4] 8007398: 4413 add r3, r2 800739a: 3b10 subs r3, #16 800739c: 68ba ldr r2, [r7, #8] 800739e: 429a cmp r2, r3 80073a0: da0d bge.n 80073be 80073a2: 68fb ldr r3, [r7, #12] 80073a4: 885b ldrh r3, [r3, #2] 80073a6: 461a mov r2, r3 80073a8: 687b ldr r3, [r7, #4] 80073aa: 4293 cmp r3, r2 80073ac: db07 blt.n 80073be 80073ae: 68fb ldr r3, [r7, #12] 80073b0: 885b ldrh r3, [r3, #2] 80073b2: 330f adds r3, #15 80073b4: 687a ldr r2, [r7, #4] 80073b6: 429a cmp r2, r3 80073b8: dc01 bgt.n 80073be { a=2; 80073ba: 2302 movs r3, #2 80073bc: 617b str r3, [r7, #20] } if((x>=(this_window->x+this_window->width-16))&&(x<(this_window->x+this_window->width))&&((y>=this_window->y)&&(y<(this_window->y+16)))) 80073be: 68fb ldr r3, [r7, #12] 80073c0: 881b ldrh r3, [r3, #0] 80073c2: 461a mov r2, r3 80073c4: 68fb ldr r3, [r7, #12] 80073c6: 889b ldrh r3, [r3, #4] 80073c8: 4413 add r3, r2 80073ca: 3b10 subs r3, #16 80073cc: 68ba ldr r2, [r7, #8] 80073ce: 429a cmp r2, r3 80073d0: db16 blt.n 8007400 80073d2: 68fb ldr r3, [r7, #12] 80073d4: 881b ldrh r3, [r3, #0] 80073d6: 461a mov r2, r3 80073d8: 68fb ldr r3, [r7, #12] 80073da: 889b ldrh r3, [r3, #4] 80073dc: 4413 add r3, r2 80073de: 68ba ldr r2, [r7, #8] 80073e0: 429a cmp r2, r3 80073e2: da0d bge.n 8007400 80073e4: 68fb ldr r3, [r7, #12] 80073e6: 885b ldrh r3, [r3, #2] 80073e8: 461a mov r2, r3 80073ea: 687b ldr r3, [r7, #4] 80073ec: 4293 cmp r3, r2 80073ee: db07 blt.n 8007400 80073f0: 68fb ldr r3, [r7, #12] 80073f2: 885b ldrh r3, [r3, #2] 80073f4: 330f adds r3, #15 80073f6: 687a ldr r2, [r7, #4] 80073f8: 429a cmp r2, r3 80073fa: dc01 bgt.n 8007400 { a=3; 80073fc: 2303 movs r3, #3 80073fe: 617b str r3, [r7, #20] } return a; 8007400: 697b ldr r3, [r7, #20] 8007402: b2db uxtb r3, r3 } 8007404: 4618 mov r0, r3 8007406: 371c adds r7, #28 8007408: 46bd mov sp, r7 800740a: bc80 pop {r7} 800740c: 4770 bx lr ... 08007410 : void UI_Server(UI *ui) { 8007410: b580 push {r7, lr} 8007412: b088 sub sp, #32 8007414: af00 add r7, sp, #0 8007416: 6078 str r0, [r7, #4] windows_stack *temp_windows_stack=NULL; 8007418: 2300 movs r3, #0 800741a: 61fb str r3, [r7, #28] window *temp_window; //touch_device *temp_touch=NULL; int flag=0; 800741c: 2300 movs r3, #0 800741e: 61bb str r3, [r7, #24] uint8_t hit_flag=0; 8007420: 2300 movs r3, #0 8007422: 75fb strb r3, [r7, #23] int t_x,t_y; //touch //temp_touch=ui->touch; if(t0.c)//TP_XY(&t_x, &t_y)) 8007424: 4b76 ldr r3, [pc, #472] ; (8007600 ) 8007426: 7b1b ldrb r3, [r3, #12] 8007428: f003 0302 and.w r3, r3, #2 800742c: b2db uxtb r3, r3 800742e: 2b00 cmp r3, #0 8007430: f000 80ba beq.w 80075a8 { if(t0.d) 8007434: 4b72 ldr r3, [pc, #456] ; (8007600 ) 8007436: 7b1b ldrb r3, [r3, #12] 8007438: f003 0304 and.w r3, r3, #4 800743c: b2db uxtb r3, r3 800743e: 2b00 cmp r3, #0 8007440: f000 80c8 beq.w 80075d4 { t_x=t0.pix_x; 8007444: 4b6e ldr r3, [pc, #440] ; (8007600 ) 8007446: 685b ldr r3, [r3, #4] 8007448: 613b str r3, [r7, #16] t_y=t0.pix_y; 800744a: 4b6d ldr r3, [pc, #436] ; (8007600 ) 800744c: 689b ldr r3, [r3, #8] 800744e: 60fb str r3, [r7, #12] temp_window=NULL; 8007450: 2300 movs r3, #0 8007452: 60bb str r3, [r7, #8] if(ui->moveed_windwos==NULL) 8007454: 687b ldr r3, [r7, #4] 8007456: 695b ldr r3, [r3, #20] 8007458: 2b00 cmp r3, #0 800745a: f040 8088 bne.w 800756e { if(ui->First_click_flag==0) 800745e: 687b ldr r3, [r7, #4] 8007460: f893 3020 ldrb.w r3, [r3, #32] 8007464: f003 0302 and.w r3, r3, #2 8007468: b2db uxtb r3, r3 800746a: 2b00 cmp r3, #0 800746c: f040 80b2 bne.w 80075d4 { ui->First_click_flag=1; 8007470: 687a ldr r2, [r7, #4] 8007472: f892 3020 ldrb.w r3, [r2, #32] 8007476: f043 0302 orr.w r3, r3, #2 800747a: f882 3020 strb.w r3, [r2, #32] temp_windows_stack=ui->last_windows; //»ñÈ¡uiÖÐ×îÇ°¶ËµÄ´°¿Ú ´ÓÇ°ÍùºóɨÃè 800747e: 687b ldr r3, [r7, #4] 8007480: 691b ldr r3, [r3, #16] 8007482: 61fb str r3, [r7, #28] do { if(temp_windows_stack!=NULL) //Èç¹ûÓд°¿Ú¾Í¿ªÊ¼É¨Ãè 8007484: 69fb ldr r3, [r7, #28] 8007486: 2b00 cmp r3, #0 8007488: d06b beq.n 8007562 { flag=1; //¼ì²éµ½Óд°¿Ú ÐèҪѭ»·Ò»´ÎÒÔ¼ì²éÊÇ·ñÓÐÏÂÒ»¸ö´°¿Ú 800748a: 2301 movs r3, #1 800748c: 61bb str r3, [r7, #24] // temp_window=temp_windows_stack->window; //È¡³öÕâ¸ö´°¿Ú 800748e: 69fb ldr r3, [r7, #28] 8007490: 685b ldr r3, [r3, #4] 8007492: 60bb str r3, [r7, #8] hit_flag=Chack(temp_window,t_x,t_y); //¼ì²é´¥ÃþÊÇ·ñÃüÖÐ Ö±½Ó·µ»ØÃüÖд°¿ÚµÄλÖà 8007494: 68fa ldr r2, [r7, #12] 8007496: 6939 ldr r1, [r7, #16] 8007498: 68b8 ldr r0, [r7, #8] 800749a: f7ff ff4a bl 8007332 800749e: 4603 mov r3, r0 80074a0: 75fb strb r3, [r7, #23] if(hit_flag) // ÃüÖмÌÐø 80074a2: 7dfb ldrb r3, [r7, #23] 80074a4: 2b00 cmp r3, #0 80074a6: d058 beq.n 800755a { if(temp_windows_stack!=ui->last_windows) //¼ì²éÊÇ·ñ×îÇ°¶ËµÄ´°¿Ú Èç¹û²»ÊǾͷÅ×îÇ°Ãæ 80074a8: 687b ldr r3, [r7, #4] 80074aa: 691b ldr r3, [r3, #16] 80074ac: 69fa ldr r2, [r7, #28] 80074ae: 429a cmp r2, r3 80074b0: d02c beq.n 800750c { if(temp_windows_stack!=ui->windows) //¼ì²éÊÇ·ñ×îºó¶ËµÄ´°¿Ú ÒòΪÏÔʾÊÇ´Ó×îºó¶ËÍùÇ°ÏÔʾµÄ ËùÒÔuiÓÐ×îºó¶Ë´°¿ÚµÄÈë¿Ú 80074b2: 687b ldr r3, [r7, #4] 80074b4: 68db ldr r3, [r3, #12] 80074b6: 69fa ldr r2, [r7, #28] 80074b8: 429a cmp r2, r3 80074ba: d00a beq.n 80074d2 { temp_windows_stack->up->next=temp_windows_stack->next; //È¡³öÕâ¸ö½Úµã °Ñ½ÚµãµÄÉÏϲ¹ÉÏÁ´½Ó 80074bc: 69fb ldr r3, [r7, #28] 80074be: 681b ldr r3, [r3, #0] 80074c0: 69fa ldr r2, [r7, #28] 80074c2: 6892 ldr r2, [r2, #8] 80074c4: 609a str r2, [r3, #8] temp_windows_stack->next->up=temp_windows_stack->up; 80074c6: 69fb ldr r3, [r7, #28] 80074c8: 689b ldr r3, [r3, #8] 80074ca: 69fa ldr r2, [r7, #28] 80074cc: 6812 ldr r2, [r2, #0] 80074ce: 601a str r2, [r3, #0] 80074d0: e007 b.n 80074e2 }else { ui->windows=temp_windows_stack->next; //Èç¹ûÊÇ×îºó¶ËµÄ´°¿Ú ÔòÈ¡³öÕâ¸ö½ÚµãºóÈë¿Ú¾Í±äÏÂÒ»¸ö½ÚµãÁË 80074d2: 69fb ldr r3, [r7, #28] 80074d4: 689a ldr r2, [r3, #8] 80074d6: 687b ldr r3, [r7, #4] 80074d8: 60da str r2, [r3, #12] ui->windows->up=NULL; //µ¹ÊýµÚ¶þ±ä×îºó¶Ë ÔÚ×ß¾ÍûÁË ËùÒÔÒªÇå¿ÕÖ¸Õë 80074da: 687b ldr r3, [r7, #4] 80074dc: 68db ldr r3, [r3, #12] 80074de: 2200 movs r2, #0 80074e0: 601a str r2, [r3, #0] } temp_windows_stack->next=NULL; //È¡³öµÄ½ÚµãÒª·ÅÔÚ×îÇ°¶Ë ËùÒÔ ÎÞ·¨ÔÙÍùÇ° Çå¿ÕÍùÇ°µÄÖ¸Õë 80074e2: 69fb ldr r3, [r7, #28] 80074e4: 2200 movs r2, #0 80074e6: 609a str r2, [r3, #8] temp_windows_stack->up=ui->last_windows; //ÉÏÒ»¸öÖ¸Õë¾ÍÊÇÔ­À´µÄ×îºóÒ»¸ö 80074e8: 687b ldr r3, [r7, #4] 80074ea: 691a ldr r2, [r3, #16] 80074ec: 69fb ldr r3, [r7, #28] 80074ee: 601a str r2, [r3, #0] ui->last_windows->next=temp_windows_stack; //Ô­À´µÄ×îºóÒ»¸öÖ¸ÏòÏÖÔÚµÄ×îºóÒ»¸ö 80074f0: 687b ldr r3, [r7, #4] 80074f2: 691b ldr r3, [r3, #16] 80074f4: 69fa ldr r2, [r7, #28] 80074f6: 609a str r2, [r3, #8] ui->last_windows=temp_windows_stack; //¸üÐÂuiÖеÄ×îºóÒ»¸öµÄÈë¿Ú 80074f8: 687b ldr r3, [r7, #4] 80074fa: 69fa ldr r2, [r7, #28] 80074fc: 611a str r2, [r3, #16] ui->refresh_ui_flag=1; //·¢ÉúÁ˱仯 Ë¢ÐÂuiµÄÏÔʾ 80074fe: 687a ldr r2, [r7, #4] 8007500: f892 3020 ldrb.w r3, [r2, #32] 8007504: f043 0304 orr.w r3, r3, #4 8007508: f882 3020 strb.w r3, [r2, #32] } //¼ì²é±êÖд°¿ÚµÄʲôλÖà switch(hit_flag) 800750c: 7dfb ldrb r3, [r7, #23] 800750e: 2b03 cmp r3, #3 8007510: d006 beq.n 8007520 8007512: 2b03 cmp r3, #3 8007514: dc1f bgt.n 8007556 8007516: 2b01 cmp r3, #1 8007518: d01c beq.n 8007554 800751a: 2b02 cmp r3, #2 800751c: d008 beq.n 8007530 800751e: e01a b.n 8007556 { case CLOSE: //Close_Windows_Stack(ui,temp_windows_stack); ui->refresh_ui_flag=1; //·¢ÉúÁ˱仯 Ë¢ÐÂuiµÄÏÔʾ 8007520: 687a ldr r2, [r7, #4] 8007522: f892 3020 ldrb.w r3, [r2, #32] 8007526: f043 0304 orr.w r3, r3, #4 800752a: f882 3020 strb.w r3, [r2, #32] break; 800752e: e012 b.n 8007556 case BAR: ui->moveed_windwos=temp_window; 8007530: 687b ldr r3, [r7, #4] 8007532: 68ba ldr r2, [r7, #8] 8007534: 615a str r2, [r3, #20] ui->move_x=t_x-temp_window->x; 8007536: 68bb ldr r3, [r7, #8] 8007538: 881b ldrh r3, [r3, #0] 800753a: 461a mov r2, r3 800753c: 693b ldr r3, [r7, #16] 800753e: 1a9a subs r2, r3, r2 8007540: 687b ldr r3, [r7, #4] 8007542: 619a str r2, [r3, #24] ui->move_y=t_y-temp_window->y; 8007544: 68bb ldr r3, [r7, #8] 8007546: 885b ldrh r3, [r3, #2] 8007548: 461a mov r2, r3 800754a: 68fb ldr r3, [r7, #12] 800754c: 1a9a subs r2, r3, r2 800754e: 687b ldr r3, [r7, #4] 8007550: 61da str r2, [r3, #28] break; 8007552: e000 b.n 8007556 case BODY: //ui->background=temp_windows_stack->window->background; //ui->refresh_ui_flag=1; break; 8007554: bf00 nop } flag=0; //½áÊøɨÃè ·ÀÖ¹´©Í¸µ±Ç°´°¿Ú 8007556: 2300 movs r3, #0 8007558: 61bb str r3, [r7, #24] } temp_windows_stack=temp_windows_stack->up; //ÍùǰɨÃè 800755a: 69fb ldr r3, [r7, #28] 800755c: 681b ldr r3, [r3, #0] 800755e: 61fb str r3, [r7, #28] 8007560: e001 b.n 8007566 }else { flag=0; //Ò»¸ö´°¿Ú¶¼Ã»ÓÐ Ö±½Ó½áÊøÑ­»· 8007562: 2300 movs r3, #0 8007564: 61bb str r3, [r7, #24] } }while(flag); 8007566: 69bb ldr r3, [r7, #24] 8007568: 2b00 cmp r3, #0 800756a: d18b bne.n 8007484 800756c: e032 b.n 80075d4 } }else { temp_window=ui->moveed_windwos; 800756e: 687b ldr r3, [r7, #4] 8007570: 695b ldr r3, [r3, #20] 8007572: 60bb str r3, [r7, #8] temp_window->x=t_x-ui->move_x; 8007574: 693b ldr r3, [r7, #16] 8007576: b29a uxth r2, r3 8007578: 687b ldr r3, [r7, #4] 800757a: 699b ldr r3, [r3, #24] 800757c: b29b uxth r3, r3 800757e: 1ad3 subs r3, r2, r3 8007580: b29a uxth r2, r3 8007582: 68bb ldr r3, [r7, #8] 8007584: 801a strh r2, [r3, #0] temp_window->y=t_y-ui->move_y; 8007586: 68fb ldr r3, [r7, #12] 8007588: b29a uxth r2, r3 800758a: 687b ldr r3, [r7, #4] 800758c: 69db ldr r3, [r3, #28] 800758e: b29b uxth r3, r3 8007590: 1ad3 subs r3, r2, r3 8007592: b29a uxth r2, r3 8007594: 68bb ldr r3, [r7, #8] 8007596: 805a strh r2, [r3, #2] ui->refresh_ui_flag=1; 8007598: 687a ldr r2, [r7, #4] 800759a: f892 3020 ldrb.w r3, [r2, #32] 800759e: f043 0304 orr.w r3, r3, #4 80075a2: f882 3020 strb.w r3, [r2, #32] 80075a6: e015 b.n 80075d4 }else { if(ui->First_click_flag==1) 80075a8: 687b ldr r3, [r7, #4] 80075aa: f893 3020 ldrb.w r3, [r3, #32] 80075ae: f003 0302 and.w r3, r3, #2 80075b2: b2db uxtb r3, r3 80075b4: 2b00 cmp r3, #0 80075b6: d006 beq.n 80075c6 { ui->First_click_flag=0; 80075b8: 687a ldr r2, [r7, #4] 80075ba: f892 3020 ldrb.w r3, [r2, #32] 80075be: f36f 0341 bfc r3, #1, #1 80075c2: f882 3020 strb.w r3, [r2, #32] } if(ui->moveed_windwos!=NULL) 80075c6: 687b ldr r3, [r7, #4] 80075c8: 695b ldr r3, [r3, #20] 80075ca: 2b00 cmp r3, #0 80075cc: d002 beq.n 80075d4 { ui->moveed_windwos=NULL; 80075ce: 687b ldr r3, [r7, #4] 80075d0: 2200 movs r2, #0 80075d2: 615a str r2, [r3, #20] } } //display if(ui->refresh_ui_flag==1) 80075d4: 687b ldr r3, [r7, #4] 80075d6: f893 3020 ldrb.w r3, [r3, #32] 80075da: f003 0304 and.w r3, r3, #4 80075de: b2db uxtb r3, r3 80075e0: 2b00 cmp r3, #0 80075e2: d009 beq.n 80075f8 { ui->refresh_ui_flag=0; 80075e4: 687a ldr r2, [r7, #4] 80075e6: f892 3020 ldrb.w r3, [r2, #32] 80075ea: f36f 0382 bfc r3, #2, #1 80075ee: f882 3020 strb.w r3, [r2, #32] Refresh_UI(ui); 80075f2: 6878 ldr r0, [r7, #4] 80075f4: f7ff fe53 bl 800729e } } 80075f8: bf00 nop 80075fa: 3720 adds r7, #32 80075fc: 46bd mov sp, r7 80075fe: bd80 pop {r7, pc} 8007600: 2000038c .word 0x2000038c 08007604 <__errno>: 8007604: 4b01 ldr r3, [pc, #4] ; (800760c <__errno+0x8>) 8007606: 6818 ldr r0, [r3, #0] 8007608: 4770 bx lr 800760a: bf00 nop 800760c: 20000014 .word 0x20000014 08007610 <__libc_init_array>: 8007610: b570 push {r4, r5, r6, lr} 8007612: 2600 movs r6, #0 8007614: 4d0c ldr r5, [pc, #48] ; (8007648 <__libc_init_array+0x38>) 8007616: 4c0d ldr r4, [pc, #52] ; (800764c <__libc_init_array+0x3c>) 8007618: 1b64 subs r4, r4, r5 800761a: 10a4 asrs r4, r4, #2 800761c: 42a6 cmp r6, r4 800761e: d109 bne.n 8007634 <__libc_init_array+0x24> 8007620: f002 fec2 bl 800a3a8 <_init> 8007624: 2600 movs r6, #0 8007626: 4d0a ldr r5, [pc, #40] ; (8007650 <__libc_init_array+0x40>) 8007628: 4c0a ldr r4, [pc, #40] ; (8007654 <__libc_init_array+0x44>) 800762a: 1b64 subs r4, r4, r5 800762c: 10a4 asrs r4, r4, #2 800762e: 42a6 cmp r6, r4 8007630: d105 bne.n 800763e <__libc_init_array+0x2e> 8007632: bd70 pop {r4, r5, r6, pc} 8007634: f855 3b04 ldr.w r3, [r5], #4 8007638: 4798 blx r3 800763a: 3601 adds r6, #1 800763c: e7ee b.n 800761c <__libc_init_array+0xc> 800763e: f855 3b04 ldr.w r3, [r5], #4 8007642: 4798 blx r3 8007644: 3601 adds r6, #1 8007646: e7f2 b.n 800762e <__libc_init_array+0x1e> 8007648: 0800b31c .word 0x0800b31c 800764c: 0800b31c .word 0x0800b31c 8007650: 0800b31c .word 0x0800b31c 8007654: 0800b320 .word 0x0800b320 08007658 : 8007658: 4b02 ldr r3, [pc, #8] ; (8007664 ) 800765a: 4601 mov r1, r0 800765c: 6818 ldr r0, [r3, #0] 800765e: f000 b85f b.w 8007720 <_malloc_r> 8007662: bf00 nop 8007664: 20000014 .word 0x20000014 08007668 : 8007668: 4b02 ldr r3, [pc, #8] ; (8007674 ) 800766a: 4601 mov r1, r0 800766c: 6818 ldr r0, [r3, #0] 800766e: f000 b80b b.w 8007688 <_free_r> 8007672: bf00 nop 8007674: 20000014 .word 0x20000014 08007678 : 8007678: 4603 mov r3, r0 800767a: 4402 add r2, r0 800767c: 4293 cmp r3, r2 800767e: d100 bne.n 8007682 8007680: 4770 bx lr 8007682: f803 1b01 strb.w r1, [r3], #1 8007686: e7f9 b.n 800767c 08007688 <_free_r>: 8007688: b538 push {r3, r4, r5, lr} 800768a: 4605 mov r5, r0 800768c: 2900 cmp r1, #0 800768e: d043 beq.n 8007718 <_free_r+0x90> 8007690: f851 3c04 ldr.w r3, [r1, #-4] 8007694: 1f0c subs r4, r1, #4 8007696: 2b00 cmp r3, #0 8007698: bfb8 it lt 800769a: 18e4 addlt r4, r4, r3 800769c: f001 fbc6 bl 8008e2c <__malloc_lock> 80076a0: 4a1e ldr r2, [pc, #120] ; (800771c <_free_r+0x94>) 80076a2: 6813 ldr r3, [r2, #0] 80076a4: 4610 mov r0, r2 80076a6: b933 cbnz r3, 80076b6 <_free_r+0x2e> 80076a8: 6063 str r3, [r4, #4] 80076aa: 6014 str r4, [r2, #0] 80076ac: 4628 mov r0, r5 80076ae: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80076b2: f001 bbc1 b.w 8008e38 <__malloc_unlock> 80076b6: 42a3 cmp r3, r4 80076b8: d90a bls.n 80076d0 <_free_r+0x48> 80076ba: 6821 ldr r1, [r4, #0] 80076bc: 1862 adds r2, r4, r1 80076be: 4293 cmp r3, r2 80076c0: bf01 itttt eq 80076c2: 681a ldreq r2, [r3, #0] 80076c4: 685b ldreq r3, [r3, #4] 80076c6: 1852 addeq r2, r2, r1 80076c8: 6022 streq r2, [r4, #0] 80076ca: 6063 str r3, [r4, #4] 80076cc: 6004 str r4, [r0, #0] 80076ce: e7ed b.n 80076ac <_free_r+0x24> 80076d0: 461a mov r2, r3 80076d2: 685b ldr r3, [r3, #4] 80076d4: b10b cbz r3, 80076da <_free_r+0x52> 80076d6: 42a3 cmp r3, r4 80076d8: d9fa bls.n 80076d0 <_free_r+0x48> 80076da: 6811 ldr r1, [r2, #0] 80076dc: 1850 adds r0, r2, r1 80076de: 42a0 cmp r0, r4 80076e0: d10b bne.n 80076fa <_free_r+0x72> 80076e2: 6820 ldr r0, [r4, #0] 80076e4: 4401 add r1, r0 80076e6: 1850 adds r0, r2, r1 80076e8: 4283 cmp r3, r0 80076ea: 6011 str r1, [r2, #0] 80076ec: d1de bne.n 80076ac <_free_r+0x24> 80076ee: 6818 ldr r0, [r3, #0] 80076f0: 685b ldr r3, [r3, #4] 80076f2: 4401 add r1, r0 80076f4: 6011 str r1, [r2, #0] 80076f6: 6053 str r3, [r2, #4] 80076f8: e7d8 b.n 80076ac <_free_r+0x24> 80076fa: d902 bls.n 8007702 <_free_r+0x7a> 80076fc: 230c movs r3, #12 80076fe: 602b str r3, [r5, #0] 8007700: e7d4 b.n 80076ac <_free_r+0x24> 8007702: 6820 ldr r0, [r4, #0] 8007704: 1821 adds r1, r4, r0 8007706: 428b cmp r3, r1 8007708: bf01 itttt eq 800770a: 6819 ldreq r1, [r3, #0] 800770c: 685b ldreq r3, [r3, #4] 800770e: 1809 addeq r1, r1, r0 8007710: 6021 streq r1, [r4, #0] 8007712: 6063 str r3, [r4, #4] 8007714: 6054 str r4, [r2, #4] 8007716: e7c9 b.n 80076ac <_free_r+0x24> 8007718: bd38 pop {r3, r4, r5, pc} 800771a: bf00 nop 800771c: 2000020c .word 0x2000020c 08007720 <_malloc_r>: 8007720: b5f8 push {r3, r4, r5, r6, r7, lr} 8007722: 1ccd adds r5, r1, #3 8007724: f025 0503 bic.w r5, r5, #3 8007728: 3508 adds r5, #8 800772a: 2d0c cmp r5, #12 800772c: bf38 it cc 800772e: 250c movcc r5, #12 8007730: 2d00 cmp r5, #0 8007732: 4606 mov r6, r0 8007734: db01 blt.n 800773a <_malloc_r+0x1a> 8007736: 42a9 cmp r1, r5 8007738: d903 bls.n 8007742 <_malloc_r+0x22> 800773a: 230c movs r3, #12 800773c: 6033 str r3, [r6, #0] 800773e: 2000 movs r0, #0 8007740: bdf8 pop {r3, r4, r5, r6, r7, pc} 8007742: f001 fb73 bl 8008e2c <__malloc_lock> 8007746: 4921 ldr r1, [pc, #132] ; (80077cc <_malloc_r+0xac>) 8007748: 680a ldr r2, [r1, #0] 800774a: 4614 mov r4, r2 800774c: b99c cbnz r4, 8007776 <_malloc_r+0x56> 800774e: 4f20 ldr r7, [pc, #128] ; (80077d0 <_malloc_r+0xb0>) 8007750: 683b ldr r3, [r7, #0] 8007752: b923 cbnz r3, 800775e <_malloc_r+0x3e> 8007754: 4621 mov r1, r4 8007756: 4630 mov r0, r6 8007758: f000 fc9c bl 8008094 <_sbrk_r> 800775c: 6038 str r0, [r7, #0] 800775e: 4629 mov r1, r5 8007760: 4630 mov r0, r6 8007762: f000 fc97 bl 8008094 <_sbrk_r> 8007766: 1c43 adds r3, r0, #1 8007768: d123 bne.n 80077b2 <_malloc_r+0x92> 800776a: 230c movs r3, #12 800776c: 4630 mov r0, r6 800776e: 6033 str r3, [r6, #0] 8007770: f001 fb62 bl 8008e38 <__malloc_unlock> 8007774: e7e3 b.n 800773e <_malloc_r+0x1e> 8007776: 6823 ldr r3, [r4, #0] 8007778: 1b5b subs r3, r3, r5 800777a: d417 bmi.n 80077ac <_malloc_r+0x8c> 800777c: 2b0b cmp r3, #11 800777e: d903 bls.n 8007788 <_malloc_r+0x68> 8007780: 6023 str r3, [r4, #0] 8007782: 441c add r4, r3 8007784: 6025 str r5, [r4, #0] 8007786: e004 b.n 8007792 <_malloc_r+0x72> 8007788: 6863 ldr r3, [r4, #4] 800778a: 42a2 cmp r2, r4 800778c: bf0c ite eq 800778e: 600b streq r3, [r1, #0] 8007790: 6053 strne r3, [r2, #4] 8007792: 4630 mov r0, r6 8007794: f001 fb50 bl 8008e38 <__malloc_unlock> 8007798: f104 000b add.w r0, r4, #11 800779c: 1d23 adds r3, r4, #4 800779e: f020 0007 bic.w r0, r0, #7 80077a2: 1ac2 subs r2, r0, r3 80077a4: d0cc beq.n 8007740 <_malloc_r+0x20> 80077a6: 1a1b subs r3, r3, r0 80077a8: 50a3 str r3, [r4, r2] 80077aa: e7c9 b.n 8007740 <_malloc_r+0x20> 80077ac: 4622 mov r2, r4 80077ae: 6864 ldr r4, [r4, #4] 80077b0: e7cc b.n 800774c <_malloc_r+0x2c> 80077b2: 1cc4 adds r4, r0, #3 80077b4: f024 0403 bic.w r4, r4, #3 80077b8: 42a0 cmp r0, r4 80077ba: d0e3 beq.n 8007784 <_malloc_r+0x64> 80077bc: 1a21 subs r1, r4, r0 80077be: 4630 mov r0, r6 80077c0: f000 fc68 bl 8008094 <_sbrk_r> 80077c4: 3001 adds r0, #1 80077c6: d1dd bne.n 8007784 <_malloc_r+0x64> 80077c8: e7cf b.n 800776a <_malloc_r+0x4a> 80077ca: bf00 nop 80077cc: 2000020c .word 0x2000020c 80077d0: 20000210 .word 0x20000210 080077d4 <__cvt>: 80077d4: 2b00 cmp r3, #0 80077d6: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 80077da: 461f mov r7, r3 80077dc: bfbb ittet lt 80077de: f103 4300 addlt.w r3, r3, #2147483648 ; 0x80000000 80077e2: 461f movlt r7, r3 80077e4: 2300 movge r3, #0 80077e6: 232d movlt r3, #45 ; 0x2d 80077e8: b088 sub sp, #32 80077ea: 4614 mov r4, r2 80077ec: 9a12 ldr r2, [sp, #72] ; 0x48 80077ee: 9d10 ldr r5, [sp, #64] ; 0x40 80077f0: 7013 strb r3, [r2, #0] 80077f2: 9b14 ldr r3, [sp, #80] ; 0x50 80077f4: f8dd a04c ldr.w sl, [sp, #76] ; 0x4c 80077f8: f023 0820 bic.w r8, r3, #32 80077fc: f1b8 0f46 cmp.w r8, #70 ; 0x46 8007800: d005 beq.n 800780e <__cvt+0x3a> 8007802: f1b8 0f45 cmp.w r8, #69 ; 0x45 8007806: d100 bne.n 800780a <__cvt+0x36> 8007808: 3501 adds r5, #1 800780a: 2302 movs r3, #2 800780c: e000 b.n 8007810 <__cvt+0x3c> 800780e: 2303 movs r3, #3 8007810: aa07 add r2, sp, #28 8007812: 9204 str r2, [sp, #16] 8007814: aa06 add r2, sp, #24 8007816: e9cd a202 strd sl, r2, [sp, #8] 800781a: e9cd 3500 strd r3, r5, [sp] 800781e: 4622 mov r2, r4 8007820: 463b mov r3, r7 8007822: f000 fcf5 bl 8008210 <_dtoa_r> 8007826: f1b8 0f47 cmp.w r8, #71 ; 0x47 800782a: 4606 mov r6, r0 800782c: d102 bne.n 8007834 <__cvt+0x60> 800782e: 9b11 ldr r3, [sp, #68] ; 0x44 8007830: 07db lsls r3, r3, #31 8007832: d522 bpl.n 800787a <__cvt+0xa6> 8007834: f1b8 0f46 cmp.w r8, #70 ; 0x46 8007838: eb06 0905 add.w r9, r6, r5 800783c: d110 bne.n 8007860 <__cvt+0x8c> 800783e: 7833 ldrb r3, [r6, #0] 8007840: 2b30 cmp r3, #48 ; 0x30 8007842: d10a bne.n 800785a <__cvt+0x86> 8007844: 2200 movs r2, #0 8007846: 2300 movs r3, #0 8007848: 4620 mov r0, r4 800784a: 4639 mov r1, r7 800784c: f7f9 f918 bl 8000a80 <__aeabi_dcmpeq> 8007850: b918 cbnz r0, 800785a <__cvt+0x86> 8007852: f1c5 0501 rsb r5, r5, #1 8007856: f8ca 5000 str.w r5, [sl] 800785a: f8da 3000 ldr.w r3, [sl] 800785e: 4499 add r9, r3 8007860: 2200 movs r2, #0 8007862: 2300 movs r3, #0 8007864: 4620 mov r0, r4 8007866: 4639 mov r1, r7 8007868: f7f9 f90a bl 8000a80 <__aeabi_dcmpeq> 800786c: b108 cbz r0, 8007872 <__cvt+0x9e> 800786e: f8cd 901c str.w r9, [sp, #28] 8007872: 2230 movs r2, #48 ; 0x30 8007874: 9b07 ldr r3, [sp, #28] 8007876: 454b cmp r3, r9 8007878: d307 bcc.n 800788a <__cvt+0xb6> 800787a: 4630 mov r0, r6 800787c: 9b07 ldr r3, [sp, #28] 800787e: 9a15 ldr r2, [sp, #84] ; 0x54 8007880: 1b9b subs r3, r3, r6 8007882: 6013 str r3, [r2, #0] 8007884: b008 add sp, #32 8007886: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800788a: 1c59 adds r1, r3, #1 800788c: 9107 str r1, [sp, #28] 800788e: 701a strb r2, [r3, #0] 8007890: e7f0 b.n 8007874 <__cvt+0xa0> 08007892 <__exponent>: 8007892: 4603 mov r3, r0 8007894: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 8007896: 2900 cmp r1, #0 8007898: f803 2b02 strb.w r2, [r3], #2 800789c: bfb6 itet lt 800789e: 222d movlt r2, #45 ; 0x2d 80078a0: 222b movge r2, #43 ; 0x2b 80078a2: 4249 neglt r1, r1 80078a4: 2909 cmp r1, #9 80078a6: 7042 strb r2, [r0, #1] 80078a8: dd2b ble.n 8007902 <__exponent+0x70> 80078aa: f10d 0407 add.w r4, sp, #7 80078ae: 46a4 mov ip, r4 80078b0: 270a movs r7, #10 80078b2: fb91 f6f7 sdiv r6, r1, r7 80078b6: 460a mov r2, r1 80078b8: 46a6 mov lr, r4 80078ba: fb07 1516 mls r5, r7, r6, r1 80078be: 2a63 cmp r2, #99 ; 0x63 80078c0: f105 0530 add.w r5, r5, #48 ; 0x30 80078c4: 4631 mov r1, r6 80078c6: f104 34ff add.w r4, r4, #4294967295 ; 0xffffffff 80078ca: f80e 5c01 strb.w r5, [lr, #-1] 80078ce: dcf0 bgt.n 80078b2 <__exponent+0x20> 80078d0: 3130 adds r1, #48 ; 0x30 80078d2: f1ae 0502 sub.w r5, lr, #2 80078d6: f804 1c01 strb.w r1, [r4, #-1] 80078da: 4629 mov r1, r5 80078dc: 1c44 adds r4, r0, #1 80078de: 4561 cmp r1, ip 80078e0: d30a bcc.n 80078f8 <__exponent+0x66> 80078e2: f10d 0209 add.w r2, sp, #9 80078e6: eba2 020e sub.w r2, r2, lr 80078ea: 4565 cmp r5, ip 80078ec: bf88 it hi 80078ee: 2200 movhi r2, #0 80078f0: 4413 add r3, r2 80078f2: 1a18 subs r0, r3, r0 80078f4: b003 add sp, #12 80078f6: bdf0 pop {r4, r5, r6, r7, pc} 80078f8: f811 2b01 ldrb.w r2, [r1], #1 80078fc: f804 2f01 strb.w r2, [r4, #1]! 8007900: e7ed b.n 80078de <__exponent+0x4c> 8007902: 2330 movs r3, #48 ; 0x30 8007904: 3130 adds r1, #48 ; 0x30 8007906: 7083 strb r3, [r0, #2] 8007908: 70c1 strb r1, [r0, #3] 800790a: 1d03 adds r3, r0, #4 800790c: e7f1 b.n 80078f2 <__exponent+0x60> ... 08007910 <_printf_float>: 8007910: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8007914: b091 sub sp, #68 ; 0x44 8007916: 460c mov r4, r1 8007918: f8dd 8068 ldr.w r8, [sp, #104] ; 0x68 800791c: 4616 mov r6, r2 800791e: 461f mov r7, r3 8007920: 4605 mov r5, r0 8007922: f001 fa63 bl 8008dec <_localeconv_r> 8007926: 6803 ldr r3, [r0, #0] 8007928: 4618 mov r0, r3 800792a: 9309 str r3, [sp, #36] ; 0x24 800792c: f7f8 fc7c bl 8000228 8007930: 2300 movs r3, #0 8007932: 930e str r3, [sp, #56] ; 0x38 8007934: f8d8 3000 ldr.w r3, [r8] 8007938: 900a str r0, [sp, #40] ; 0x28 800793a: 3307 adds r3, #7 800793c: f023 0307 bic.w r3, r3, #7 8007940: f103 0208 add.w r2, r3, #8 8007944: f894 9018 ldrb.w r9, [r4, #24] 8007948: f8d4 b000 ldr.w fp, [r4] 800794c: f8c8 2000 str.w r2, [r8] 8007950: e9d3 2300 ldrd r2, r3, [r3] 8007954: e9c4 2312 strd r2, r3, [r4, #72] ; 0x48 8007958: e9d4 8a12 ldrd r8, sl, [r4, #72] ; 0x48 800795c: f02a 4300 bic.w r3, sl, #2147483648 ; 0x80000000 8007960: 930b str r3, [sp, #44] ; 0x2c 8007962: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 8007966: 4640 mov r0, r8 8007968: 4b9c ldr r3, [pc, #624] ; (8007bdc <_printf_float+0x2cc>) 800796a: 990b ldr r1, [sp, #44] ; 0x2c 800796c: f7f9 f8ba bl 8000ae4 <__aeabi_dcmpun> 8007970: bb70 cbnz r0, 80079d0 <_printf_float+0xc0> 8007972: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 8007976: 4640 mov r0, r8 8007978: 4b98 ldr r3, [pc, #608] ; (8007bdc <_printf_float+0x2cc>) 800797a: 990b ldr r1, [sp, #44] ; 0x2c 800797c: f7f9 f894 bl 8000aa8 <__aeabi_dcmple> 8007980: bb30 cbnz r0, 80079d0 <_printf_float+0xc0> 8007982: 2200 movs r2, #0 8007984: 2300 movs r3, #0 8007986: 4640 mov r0, r8 8007988: 4651 mov r1, sl 800798a: f7f9 f883 bl 8000a94 <__aeabi_dcmplt> 800798e: b110 cbz r0, 8007996 <_printf_float+0x86> 8007990: 232d movs r3, #45 ; 0x2d 8007992: f884 3043 strb.w r3, [r4, #67] ; 0x43 8007996: 4b92 ldr r3, [pc, #584] ; (8007be0 <_printf_float+0x2d0>) 8007998: 4892 ldr r0, [pc, #584] ; (8007be4 <_printf_float+0x2d4>) 800799a: f1b9 0f47 cmp.w r9, #71 ; 0x47 800799e: bf94 ite ls 80079a0: 4698 movls r8, r3 80079a2: 4680 movhi r8, r0 80079a4: 2303 movs r3, #3 80079a6: f04f 0a00 mov.w sl, #0 80079aa: 6123 str r3, [r4, #16] 80079ac: f02b 0304 bic.w r3, fp, #4 80079b0: 6023 str r3, [r4, #0] 80079b2: 4633 mov r3, r6 80079b4: 4621 mov r1, r4 80079b6: 4628 mov r0, r5 80079b8: 9700 str r7, [sp, #0] 80079ba: aa0f add r2, sp, #60 ; 0x3c 80079bc: f000 f9d4 bl 8007d68 <_printf_common> 80079c0: 3001 adds r0, #1 80079c2: f040 8090 bne.w 8007ae6 <_printf_float+0x1d6> 80079c6: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 80079ca: b011 add sp, #68 ; 0x44 80079cc: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80079d0: 4642 mov r2, r8 80079d2: 4653 mov r3, sl 80079d4: 4640 mov r0, r8 80079d6: 4651 mov r1, sl 80079d8: f7f9 f884 bl 8000ae4 <__aeabi_dcmpun> 80079dc: b148 cbz r0, 80079f2 <_printf_float+0xe2> 80079de: f1ba 0f00 cmp.w sl, #0 80079e2: bfb8 it lt 80079e4: 232d movlt r3, #45 ; 0x2d 80079e6: 4880 ldr r0, [pc, #512] ; (8007be8 <_printf_float+0x2d8>) 80079e8: bfb8 it lt 80079ea: f884 3043 strblt.w r3, [r4, #67] ; 0x43 80079ee: 4b7f ldr r3, [pc, #508] ; (8007bec <_printf_float+0x2dc>) 80079f0: e7d3 b.n 800799a <_printf_float+0x8a> 80079f2: 6863 ldr r3, [r4, #4] 80079f4: f009 01df and.w r1, r9, #223 ; 0xdf 80079f8: 1c5a adds r2, r3, #1 80079fa: d142 bne.n 8007a82 <_printf_float+0x172> 80079fc: 2306 movs r3, #6 80079fe: 6063 str r3, [r4, #4] 8007a00: 2200 movs r2, #0 8007a02: 9206 str r2, [sp, #24] 8007a04: aa0e add r2, sp, #56 ; 0x38 8007a06: e9cd 9204 strd r9, r2, [sp, #16] 8007a0a: aa0d add r2, sp, #52 ; 0x34 8007a0c: f44b 6380 orr.w r3, fp, #1024 ; 0x400 8007a10: 9203 str r2, [sp, #12] 8007a12: f10d 0233 add.w r2, sp, #51 ; 0x33 8007a16: e9cd 3201 strd r3, r2, [sp, #4] 8007a1a: 6023 str r3, [r4, #0] 8007a1c: 6863 ldr r3, [r4, #4] 8007a1e: 4642 mov r2, r8 8007a20: 9300 str r3, [sp, #0] 8007a22: 4628 mov r0, r5 8007a24: 4653 mov r3, sl 8007a26: 910b str r1, [sp, #44] ; 0x2c 8007a28: f7ff fed4 bl 80077d4 <__cvt> 8007a2c: 990b ldr r1, [sp, #44] ; 0x2c 8007a2e: 4680 mov r8, r0 8007a30: 2947 cmp r1, #71 ; 0x47 8007a32: 990d ldr r1, [sp, #52] ; 0x34 8007a34: d108 bne.n 8007a48 <_printf_float+0x138> 8007a36: 1cc8 adds r0, r1, #3 8007a38: db02 blt.n 8007a40 <_printf_float+0x130> 8007a3a: 6863 ldr r3, [r4, #4] 8007a3c: 4299 cmp r1, r3 8007a3e: dd40 ble.n 8007ac2 <_printf_float+0x1b2> 8007a40: f1a9 0902 sub.w r9, r9, #2 8007a44: fa5f f989 uxtb.w r9, r9 8007a48: f1b9 0f65 cmp.w r9, #101 ; 0x65 8007a4c: d81f bhi.n 8007a8e <_printf_float+0x17e> 8007a4e: 464a mov r2, r9 8007a50: 3901 subs r1, #1 8007a52: f104 0050 add.w r0, r4, #80 ; 0x50 8007a56: 910d str r1, [sp, #52] ; 0x34 8007a58: f7ff ff1b bl 8007892 <__exponent> 8007a5c: 9a0e ldr r2, [sp, #56] ; 0x38 8007a5e: 4682 mov sl, r0 8007a60: 1813 adds r3, r2, r0 8007a62: 2a01 cmp r2, #1 8007a64: 6123 str r3, [r4, #16] 8007a66: dc02 bgt.n 8007a6e <_printf_float+0x15e> 8007a68: 6822 ldr r2, [r4, #0] 8007a6a: 07d2 lsls r2, r2, #31 8007a6c: d501 bpl.n 8007a72 <_printf_float+0x162> 8007a6e: 3301 adds r3, #1 8007a70: 6123 str r3, [r4, #16] 8007a72: f89d 3033 ldrb.w r3, [sp, #51] ; 0x33 8007a76: 2b00 cmp r3, #0 8007a78: d09b beq.n 80079b2 <_printf_float+0xa2> 8007a7a: 232d movs r3, #45 ; 0x2d 8007a7c: f884 3043 strb.w r3, [r4, #67] ; 0x43 8007a80: e797 b.n 80079b2 <_printf_float+0xa2> 8007a82: 2947 cmp r1, #71 ; 0x47 8007a84: d1bc bne.n 8007a00 <_printf_float+0xf0> 8007a86: 2b00 cmp r3, #0 8007a88: d1ba bne.n 8007a00 <_printf_float+0xf0> 8007a8a: 2301 movs r3, #1 8007a8c: e7b7 b.n 80079fe <_printf_float+0xee> 8007a8e: f1b9 0f66 cmp.w r9, #102 ; 0x66 8007a92: d118 bne.n 8007ac6 <_printf_float+0x1b6> 8007a94: 2900 cmp r1, #0 8007a96: 6863 ldr r3, [r4, #4] 8007a98: dd0b ble.n 8007ab2 <_printf_float+0x1a2> 8007a9a: 6121 str r1, [r4, #16] 8007a9c: b913 cbnz r3, 8007aa4 <_printf_float+0x194> 8007a9e: 6822 ldr r2, [r4, #0] 8007aa0: 07d0 lsls r0, r2, #31 8007aa2: d502 bpl.n 8007aaa <_printf_float+0x19a> 8007aa4: 3301 adds r3, #1 8007aa6: 440b add r3, r1 8007aa8: 6123 str r3, [r4, #16] 8007aaa: f04f 0a00 mov.w sl, #0 8007aae: 65a1 str r1, [r4, #88] ; 0x58 8007ab0: e7df b.n 8007a72 <_printf_float+0x162> 8007ab2: b913 cbnz r3, 8007aba <_printf_float+0x1aa> 8007ab4: 6822 ldr r2, [r4, #0] 8007ab6: 07d2 lsls r2, r2, #31 8007ab8: d501 bpl.n 8007abe <_printf_float+0x1ae> 8007aba: 3302 adds r3, #2 8007abc: e7f4 b.n 8007aa8 <_printf_float+0x198> 8007abe: 2301 movs r3, #1 8007ac0: e7f2 b.n 8007aa8 <_printf_float+0x198> 8007ac2: f04f 0967 mov.w r9, #103 ; 0x67 8007ac6: 9b0e ldr r3, [sp, #56] ; 0x38 8007ac8: 4299 cmp r1, r3 8007aca: db05 blt.n 8007ad8 <_printf_float+0x1c8> 8007acc: 6823 ldr r3, [r4, #0] 8007ace: 6121 str r1, [r4, #16] 8007ad0: 07d8 lsls r0, r3, #31 8007ad2: d5ea bpl.n 8007aaa <_printf_float+0x19a> 8007ad4: 1c4b adds r3, r1, #1 8007ad6: e7e7 b.n 8007aa8 <_printf_float+0x198> 8007ad8: 2900 cmp r1, #0 8007ada: bfcc ite gt 8007adc: 2201 movgt r2, #1 8007ade: f1c1 0202 rsble r2, r1, #2 8007ae2: 4413 add r3, r2 8007ae4: e7e0 b.n 8007aa8 <_printf_float+0x198> 8007ae6: 6823 ldr r3, [r4, #0] 8007ae8: 055a lsls r2, r3, #21 8007aea: d407 bmi.n 8007afc <_printf_float+0x1ec> 8007aec: 6923 ldr r3, [r4, #16] 8007aee: 4642 mov r2, r8 8007af0: 4631 mov r1, r6 8007af2: 4628 mov r0, r5 8007af4: 47b8 blx r7 8007af6: 3001 adds r0, #1 8007af8: d12b bne.n 8007b52 <_printf_float+0x242> 8007afa: e764 b.n 80079c6 <_printf_float+0xb6> 8007afc: f1b9 0f65 cmp.w r9, #101 ; 0x65 8007b00: f240 80dd bls.w 8007cbe <_printf_float+0x3ae> 8007b04: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48 8007b08: 2200 movs r2, #0 8007b0a: 2300 movs r3, #0 8007b0c: f7f8 ffb8 bl 8000a80 <__aeabi_dcmpeq> 8007b10: 2800 cmp r0, #0 8007b12: d033 beq.n 8007b7c <_printf_float+0x26c> 8007b14: 2301 movs r3, #1 8007b16: 4631 mov r1, r6 8007b18: 4628 mov r0, r5 8007b1a: 4a35 ldr r2, [pc, #212] ; (8007bf0 <_printf_float+0x2e0>) 8007b1c: 47b8 blx r7 8007b1e: 3001 adds r0, #1 8007b20: f43f af51 beq.w 80079c6 <_printf_float+0xb6> 8007b24: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 8007b28: 429a cmp r2, r3 8007b2a: db02 blt.n 8007b32 <_printf_float+0x222> 8007b2c: 6823 ldr r3, [r4, #0] 8007b2e: 07d8 lsls r0, r3, #31 8007b30: d50f bpl.n 8007b52 <_printf_float+0x242> 8007b32: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 8007b36: 4631 mov r1, r6 8007b38: 4628 mov r0, r5 8007b3a: 47b8 blx r7 8007b3c: 3001 adds r0, #1 8007b3e: f43f af42 beq.w 80079c6 <_printf_float+0xb6> 8007b42: f04f 0800 mov.w r8, #0 8007b46: f104 091a add.w r9, r4, #26 8007b4a: 9b0e ldr r3, [sp, #56] ; 0x38 8007b4c: 3b01 subs r3, #1 8007b4e: 4543 cmp r3, r8 8007b50: dc09 bgt.n 8007b66 <_printf_float+0x256> 8007b52: 6823 ldr r3, [r4, #0] 8007b54: 079b lsls r3, r3, #30 8007b56: f100 8102 bmi.w 8007d5e <_printf_float+0x44e> 8007b5a: 68e0 ldr r0, [r4, #12] 8007b5c: 9b0f ldr r3, [sp, #60] ; 0x3c 8007b5e: 4298 cmp r0, r3 8007b60: bfb8 it lt 8007b62: 4618 movlt r0, r3 8007b64: e731 b.n 80079ca <_printf_float+0xba> 8007b66: 2301 movs r3, #1 8007b68: 464a mov r2, r9 8007b6a: 4631 mov r1, r6 8007b6c: 4628 mov r0, r5 8007b6e: 47b8 blx r7 8007b70: 3001 adds r0, #1 8007b72: f43f af28 beq.w 80079c6 <_printf_float+0xb6> 8007b76: f108 0801 add.w r8, r8, #1 8007b7a: e7e6 b.n 8007b4a <_printf_float+0x23a> 8007b7c: 9b0d ldr r3, [sp, #52] ; 0x34 8007b7e: 2b00 cmp r3, #0 8007b80: dc38 bgt.n 8007bf4 <_printf_float+0x2e4> 8007b82: 2301 movs r3, #1 8007b84: 4631 mov r1, r6 8007b86: 4628 mov r0, r5 8007b88: 4a19 ldr r2, [pc, #100] ; (8007bf0 <_printf_float+0x2e0>) 8007b8a: 47b8 blx r7 8007b8c: 3001 adds r0, #1 8007b8e: f43f af1a beq.w 80079c6 <_printf_float+0xb6> 8007b92: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 8007b96: 4313 orrs r3, r2 8007b98: d102 bne.n 8007ba0 <_printf_float+0x290> 8007b9a: 6823 ldr r3, [r4, #0] 8007b9c: 07d9 lsls r1, r3, #31 8007b9e: d5d8 bpl.n 8007b52 <_printf_float+0x242> 8007ba0: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 8007ba4: 4631 mov r1, r6 8007ba6: 4628 mov r0, r5 8007ba8: 47b8 blx r7 8007baa: 3001 adds r0, #1 8007bac: f43f af0b beq.w 80079c6 <_printf_float+0xb6> 8007bb0: f04f 0900 mov.w r9, #0 8007bb4: f104 0a1a add.w sl, r4, #26 8007bb8: 9b0d ldr r3, [sp, #52] ; 0x34 8007bba: 425b negs r3, r3 8007bbc: 454b cmp r3, r9 8007bbe: dc01 bgt.n 8007bc4 <_printf_float+0x2b4> 8007bc0: 9b0e ldr r3, [sp, #56] ; 0x38 8007bc2: e794 b.n 8007aee <_printf_float+0x1de> 8007bc4: 2301 movs r3, #1 8007bc6: 4652 mov r2, sl 8007bc8: 4631 mov r1, r6 8007bca: 4628 mov r0, r5 8007bcc: 47b8 blx r7 8007bce: 3001 adds r0, #1 8007bd0: f43f aef9 beq.w 80079c6 <_printf_float+0xb6> 8007bd4: f109 0901 add.w r9, r9, #1 8007bd8: e7ee b.n 8007bb8 <_printf_float+0x2a8> 8007bda: bf00 nop 8007bdc: 7fefffff .word 0x7fefffff 8007be0: 0800af3c .word 0x0800af3c 8007be4: 0800af40 .word 0x0800af40 8007be8: 0800af48 .word 0x0800af48 8007bec: 0800af44 .word 0x0800af44 8007bf0: 0800af4c .word 0x0800af4c 8007bf4: 9a0e ldr r2, [sp, #56] ; 0x38 8007bf6: 6da3 ldr r3, [r4, #88] ; 0x58 8007bf8: 429a cmp r2, r3 8007bfa: bfa8 it ge 8007bfc: 461a movge r2, r3 8007bfe: 2a00 cmp r2, #0 8007c00: 4691 mov r9, r2 8007c02: dc37 bgt.n 8007c74 <_printf_float+0x364> 8007c04: f04f 0b00 mov.w fp, #0 8007c08: ea29 79e9 bic.w r9, r9, r9, asr #31 8007c0c: f104 021a add.w r2, r4, #26 8007c10: f8d4 a058 ldr.w sl, [r4, #88] ; 0x58 8007c14: ebaa 0309 sub.w r3, sl, r9 8007c18: 455b cmp r3, fp 8007c1a: dc33 bgt.n 8007c84 <_printf_float+0x374> 8007c1c: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 8007c20: 429a cmp r2, r3 8007c22: db3b blt.n 8007c9c <_printf_float+0x38c> 8007c24: 6823 ldr r3, [r4, #0] 8007c26: 07da lsls r2, r3, #31 8007c28: d438 bmi.n 8007c9c <_printf_float+0x38c> 8007c2a: 9a0e ldr r2, [sp, #56] ; 0x38 8007c2c: 990d ldr r1, [sp, #52] ; 0x34 8007c2e: eba2 030a sub.w r3, r2, sl 8007c32: eba2 0901 sub.w r9, r2, r1 8007c36: 4599 cmp r9, r3 8007c38: bfa8 it ge 8007c3a: 4699 movge r9, r3 8007c3c: f1b9 0f00 cmp.w r9, #0 8007c40: dc34 bgt.n 8007cac <_printf_float+0x39c> 8007c42: f04f 0800 mov.w r8, #0 8007c46: ea29 79e9 bic.w r9, r9, r9, asr #31 8007c4a: f104 0a1a add.w sl, r4, #26 8007c4e: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34 8007c52: 1a9b subs r3, r3, r2 8007c54: eba3 0309 sub.w r3, r3, r9 8007c58: 4543 cmp r3, r8 8007c5a: f77f af7a ble.w 8007b52 <_printf_float+0x242> 8007c5e: 2301 movs r3, #1 8007c60: 4652 mov r2, sl 8007c62: 4631 mov r1, r6 8007c64: 4628 mov r0, r5 8007c66: 47b8 blx r7 8007c68: 3001 adds r0, #1 8007c6a: f43f aeac beq.w 80079c6 <_printf_float+0xb6> 8007c6e: f108 0801 add.w r8, r8, #1 8007c72: e7ec b.n 8007c4e <_printf_float+0x33e> 8007c74: 4613 mov r3, r2 8007c76: 4631 mov r1, r6 8007c78: 4642 mov r2, r8 8007c7a: 4628 mov r0, r5 8007c7c: 47b8 blx r7 8007c7e: 3001 adds r0, #1 8007c80: d1c0 bne.n 8007c04 <_printf_float+0x2f4> 8007c82: e6a0 b.n 80079c6 <_printf_float+0xb6> 8007c84: 2301 movs r3, #1 8007c86: 4631 mov r1, r6 8007c88: 4628 mov r0, r5 8007c8a: 920b str r2, [sp, #44] ; 0x2c 8007c8c: 47b8 blx r7 8007c8e: 3001 adds r0, #1 8007c90: f43f ae99 beq.w 80079c6 <_printf_float+0xb6> 8007c94: 9a0b ldr r2, [sp, #44] ; 0x2c 8007c96: f10b 0b01 add.w fp, fp, #1 8007c9a: e7b9 b.n 8007c10 <_printf_float+0x300> 8007c9c: 4631 mov r1, r6 8007c9e: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 8007ca2: 4628 mov r0, r5 8007ca4: 47b8 blx r7 8007ca6: 3001 adds r0, #1 8007ca8: d1bf bne.n 8007c2a <_printf_float+0x31a> 8007caa: e68c b.n 80079c6 <_printf_float+0xb6> 8007cac: 464b mov r3, r9 8007cae: 4631 mov r1, r6 8007cb0: 4628 mov r0, r5 8007cb2: eb08 020a add.w r2, r8, sl 8007cb6: 47b8 blx r7 8007cb8: 3001 adds r0, #1 8007cba: d1c2 bne.n 8007c42 <_printf_float+0x332> 8007cbc: e683 b.n 80079c6 <_printf_float+0xb6> 8007cbe: 9a0e ldr r2, [sp, #56] ; 0x38 8007cc0: 2a01 cmp r2, #1 8007cc2: dc01 bgt.n 8007cc8 <_printf_float+0x3b8> 8007cc4: 07db lsls r3, r3, #31 8007cc6: d537 bpl.n 8007d38 <_printf_float+0x428> 8007cc8: 2301 movs r3, #1 8007cca: 4642 mov r2, r8 8007ccc: 4631 mov r1, r6 8007cce: 4628 mov r0, r5 8007cd0: 47b8 blx r7 8007cd2: 3001 adds r0, #1 8007cd4: f43f ae77 beq.w 80079c6 <_printf_float+0xb6> 8007cd8: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24 8007cdc: 4631 mov r1, r6 8007cde: 4628 mov r0, r5 8007ce0: 47b8 blx r7 8007ce2: 3001 adds r0, #1 8007ce4: f43f ae6f beq.w 80079c6 <_printf_float+0xb6> 8007ce8: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48 8007cec: 2200 movs r2, #0 8007cee: 2300 movs r3, #0 8007cf0: f7f8 fec6 bl 8000a80 <__aeabi_dcmpeq> 8007cf4: b9d8 cbnz r0, 8007d2e <_printf_float+0x41e> 8007cf6: 9b0e ldr r3, [sp, #56] ; 0x38 8007cf8: f108 0201 add.w r2, r8, #1 8007cfc: 3b01 subs r3, #1 8007cfe: 4631 mov r1, r6 8007d00: 4628 mov r0, r5 8007d02: 47b8 blx r7 8007d04: 3001 adds r0, #1 8007d06: d10e bne.n 8007d26 <_printf_float+0x416> 8007d08: e65d b.n 80079c6 <_printf_float+0xb6> 8007d0a: 2301 movs r3, #1 8007d0c: 464a mov r2, r9 8007d0e: 4631 mov r1, r6 8007d10: 4628 mov r0, r5 8007d12: 47b8 blx r7 8007d14: 3001 adds r0, #1 8007d16: f43f ae56 beq.w 80079c6 <_printf_float+0xb6> 8007d1a: f108 0801 add.w r8, r8, #1 8007d1e: 9b0e ldr r3, [sp, #56] ; 0x38 8007d20: 3b01 subs r3, #1 8007d22: 4543 cmp r3, r8 8007d24: dcf1 bgt.n 8007d0a <_printf_float+0x3fa> 8007d26: 4653 mov r3, sl 8007d28: f104 0250 add.w r2, r4, #80 ; 0x50 8007d2c: e6e0 b.n 8007af0 <_printf_float+0x1e0> 8007d2e: f04f 0800 mov.w r8, #0 8007d32: f104 091a add.w r9, r4, #26 8007d36: e7f2 b.n 8007d1e <_printf_float+0x40e> 8007d38: 2301 movs r3, #1 8007d3a: 4642 mov r2, r8 8007d3c: e7df b.n 8007cfe <_printf_float+0x3ee> 8007d3e: 2301 movs r3, #1 8007d40: 464a mov r2, r9 8007d42: 4631 mov r1, r6 8007d44: 4628 mov r0, r5 8007d46: 47b8 blx r7 8007d48: 3001 adds r0, #1 8007d4a: f43f ae3c beq.w 80079c6 <_printf_float+0xb6> 8007d4e: f108 0801 add.w r8, r8, #1 8007d52: 68e3 ldr r3, [r4, #12] 8007d54: 990f ldr r1, [sp, #60] ; 0x3c 8007d56: 1a5b subs r3, r3, r1 8007d58: 4543 cmp r3, r8 8007d5a: dcf0 bgt.n 8007d3e <_printf_float+0x42e> 8007d5c: e6fd b.n 8007b5a <_printf_float+0x24a> 8007d5e: f04f 0800 mov.w r8, #0 8007d62: f104 0919 add.w r9, r4, #25 8007d66: e7f4 b.n 8007d52 <_printf_float+0x442> 08007d68 <_printf_common>: 8007d68: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8007d6c: 4616 mov r6, r2 8007d6e: 4699 mov r9, r3 8007d70: 688a ldr r2, [r1, #8] 8007d72: 690b ldr r3, [r1, #16] 8007d74: 4607 mov r7, r0 8007d76: 4293 cmp r3, r2 8007d78: bfb8 it lt 8007d7a: 4613 movlt r3, r2 8007d7c: 6033 str r3, [r6, #0] 8007d7e: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 8007d82: 460c mov r4, r1 8007d84: f8dd 8020 ldr.w r8, [sp, #32] 8007d88: b10a cbz r2, 8007d8e <_printf_common+0x26> 8007d8a: 3301 adds r3, #1 8007d8c: 6033 str r3, [r6, #0] 8007d8e: 6823 ldr r3, [r4, #0] 8007d90: 0699 lsls r1, r3, #26 8007d92: bf42 ittt mi 8007d94: 6833 ldrmi r3, [r6, #0] 8007d96: 3302 addmi r3, #2 8007d98: 6033 strmi r3, [r6, #0] 8007d9a: 6825 ldr r5, [r4, #0] 8007d9c: f015 0506 ands.w r5, r5, #6 8007da0: d106 bne.n 8007db0 <_printf_common+0x48> 8007da2: f104 0a19 add.w sl, r4, #25 8007da6: 68e3 ldr r3, [r4, #12] 8007da8: 6832 ldr r2, [r6, #0] 8007daa: 1a9b subs r3, r3, r2 8007dac: 42ab cmp r3, r5 8007dae: dc28 bgt.n 8007e02 <_printf_common+0x9a> 8007db0: f894 2043 ldrb.w r2, [r4, #67] ; 0x43 8007db4: 1e13 subs r3, r2, #0 8007db6: 6822 ldr r2, [r4, #0] 8007db8: bf18 it ne 8007dba: 2301 movne r3, #1 8007dbc: 0692 lsls r2, r2, #26 8007dbe: d42d bmi.n 8007e1c <_printf_common+0xb4> 8007dc0: 4649 mov r1, r9 8007dc2: 4638 mov r0, r7 8007dc4: f104 0243 add.w r2, r4, #67 ; 0x43 8007dc8: 47c0 blx r8 8007dca: 3001 adds r0, #1 8007dcc: d020 beq.n 8007e10 <_printf_common+0xa8> 8007dce: 6823 ldr r3, [r4, #0] 8007dd0: 68e5 ldr r5, [r4, #12] 8007dd2: f003 0306 and.w r3, r3, #6 8007dd6: 2b04 cmp r3, #4 8007dd8: bf18 it ne 8007dda: 2500 movne r5, #0 8007ddc: 6832 ldr r2, [r6, #0] 8007dde: f04f 0600 mov.w r6, #0 8007de2: 68a3 ldr r3, [r4, #8] 8007de4: bf08 it eq 8007de6: 1aad subeq r5, r5, r2 8007de8: 6922 ldr r2, [r4, #16] 8007dea: bf08 it eq 8007dec: ea25 75e5 biceq.w r5, r5, r5, asr #31 8007df0: 4293 cmp r3, r2 8007df2: bfc4 itt gt 8007df4: 1a9b subgt r3, r3, r2 8007df6: 18ed addgt r5, r5, r3 8007df8: 341a adds r4, #26 8007dfa: 42b5 cmp r5, r6 8007dfc: d11a bne.n 8007e34 <_printf_common+0xcc> 8007dfe: 2000 movs r0, #0 8007e00: e008 b.n 8007e14 <_printf_common+0xac> 8007e02: 2301 movs r3, #1 8007e04: 4652 mov r2, sl 8007e06: 4649 mov r1, r9 8007e08: 4638 mov r0, r7 8007e0a: 47c0 blx r8 8007e0c: 3001 adds r0, #1 8007e0e: d103 bne.n 8007e18 <_printf_common+0xb0> 8007e10: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8007e14: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8007e18: 3501 adds r5, #1 8007e1a: e7c4 b.n 8007da6 <_printf_common+0x3e> 8007e1c: 2030 movs r0, #48 ; 0x30 8007e1e: 18e1 adds r1, r4, r3 8007e20: f881 0043 strb.w r0, [r1, #67] ; 0x43 8007e24: 1c5a adds r2, r3, #1 8007e26: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 8007e2a: 4422 add r2, r4 8007e2c: 3302 adds r3, #2 8007e2e: f882 1043 strb.w r1, [r2, #67] ; 0x43 8007e32: e7c5 b.n 8007dc0 <_printf_common+0x58> 8007e34: 2301 movs r3, #1 8007e36: 4622 mov r2, r4 8007e38: 4649 mov r1, r9 8007e3a: 4638 mov r0, r7 8007e3c: 47c0 blx r8 8007e3e: 3001 adds r0, #1 8007e40: d0e6 beq.n 8007e10 <_printf_common+0xa8> 8007e42: 3601 adds r6, #1 8007e44: e7d9 b.n 8007dfa <_printf_common+0x92> ... 08007e48 <_printf_i>: 8007e48: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 8007e4c: 460c mov r4, r1 8007e4e: 7e27 ldrb r7, [r4, #24] 8007e50: 4691 mov r9, r2 8007e52: 2f78 cmp r7, #120 ; 0x78 8007e54: 4680 mov r8, r0 8007e56: 469a mov sl, r3 8007e58: 990c ldr r1, [sp, #48] ; 0x30 8007e5a: f104 0243 add.w r2, r4, #67 ; 0x43 8007e5e: d807 bhi.n 8007e70 <_printf_i+0x28> 8007e60: 2f62 cmp r7, #98 ; 0x62 8007e62: d80a bhi.n 8007e7a <_printf_i+0x32> 8007e64: 2f00 cmp r7, #0 8007e66: f000 80d9 beq.w 800801c <_printf_i+0x1d4> 8007e6a: 2f58 cmp r7, #88 ; 0x58 8007e6c: f000 80a4 beq.w 8007fb8 <_printf_i+0x170> 8007e70: f104 0642 add.w r6, r4, #66 ; 0x42 8007e74: f884 7042 strb.w r7, [r4, #66] ; 0x42 8007e78: e03a b.n 8007ef0 <_printf_i+0xa8> 8007e7a: f1a7 0363 sub.w r3, r7, #99 ; 0x63 8007e7e: 2b15 cmp r3, #21 8007e80: d8f6 bhi.n 8007e70 <_printf_i+0x28> 8007e82: a001 add r0, pc, #4 ; (adr r0, 8007e88 <_printf_i+0x40>) 8007e84: f850 f023 ldr.w pc, [r0, r3, lsl #2] 8007e88: 08007ee1 .word 0x08007ee1 8007e8c: 08007ef5 .word 0x08007ef5 8007e90: 08007e71 .word 0x08007e71 8007e94: 08007e71 .word 0x08007e71 8007e98: 08007e71 .word 0x08007e71 8007e9c: 08007e71 .word 0x08007e71 8007ea0: 08007ef5 .word 0x08007ef5 8007ea4: 08007e71 .word 0x08007e71 8007ea8: 08007e71 .word 0x08007e71 8007eac: 08007e71 .word 0x08007e71 8007eb0: 08007e71 .word 0x08007e71 8007eb4: 08008003 .word 0x08008003 8007eb8: 08007f25 .word 0x08007f25 8007ebc: 08007fe5 .word 0x08007fe5 8007ec0: 08007e71 .word 0x08007e71 8007ec4: 08007e71 .word 0x08007e71 8007ec8: 08008025 .word 0x08008025 8007ecc: 08007e71 .word 0x08007e71 8007ed0: 08007f25 .word 0x08007f25 8007ed4: 08007e71 .word 0x08007e71 8007ed8: 08007e71 .word 0x08007e71 8007edc: 08007fed .word 0x08007fed 8007ee0: 680b ldr r3, [r1, #0] 8007ee2: f104 0642 add.w r6, r4, #66 ; 0x42 8007ee6: 1d1a adds r2, r3, #4 8007ee8: 681b ldr r3, [r3, #0] 8007eea: 600a str r2, [r1, #0] 8007eec: f884 3042 strb.w r3, [r4, #66] ; 0x42 8007ef0: 2301 movs r3, #1 8007ef2: e0a4 b.n 800803e <_printf_i+0x1f6> 8007ef4: 6825 ldr r5, [r4, #0] 8007ef6: 6808 ldr r0, [r1, #0] 8007ef8: 062e lsls r6, r5, #24 8007efa: f100 0304 add.w r3, r0, #4 8007efe: d50a bpl.n 8007f16 <_printf_i+0xce> 8007f00: 6805 ldr r5, [r0, #0] 8007f02: 600b str r3, [r1, #0] 8007f04: 2d00 cmp r5, #0 8007f06: da03 bge.n 8007f10 <_printf_i+0xc8> 8007f08: 232d movs r3, #45 ; 0x2d 8007f0a: 426d negs r5, r5 8007f0c: f884 3043 strb.w r3, [r4, #67] ; 0x43 8007f10: 230a movs r3, #10 8007f12: 485e ldr r0, [pc, #376] ; (800808c <_printf_i+0x244>) 8007f14: e019 b.n 8007f4a <_printf_i+0x102> 8007f16: f015 0f40 tst.w r5, #64 ; 0x40 8007f1a: 6805 ldr r5, [r0, #0] 8007f1c: 600b str r3, [r1, #0] 8007f1e: bf18 it ne 8007f20: b22d sxthne r5, r5 8007f22: e7ef b.n 8007f04 <_printf_i+0xbc> 8007f24: 680b ldr r3, [r1, #0] 8007f26: 6825 ldr r5, [r4, #0] 8007f28: 1d18 adds r0, r3, #4 8007f2a: 6008 str r0, [r1, #0] 8007f2c: 0628 lsls r0, r5, #24 8007f2e: d501 bpl.n 8007f34 <_printf_i+0xec> 8007f30: 681d ldr r5, [r3, #0] 8007f32: e002 b.n 8007f3a <_printf_i+0xf2> 8007f34: 0669 lsls r1, r5, #25 8007f36: d5fb bpl.n 8007f30 <_printf_i+0xe8> 8007f38: 881d ldrh r5, [r3, #0] 8007f3a: 2f6f cmp r7, #111 ; 0x6f 8007f3c: bf0c ite eq 8007f3e: 2308 moveq r3, #8 8007f40: 230a movne r3, #10 8007f42: 4852 ldr r0, [pc, #328] ; (800808c <_printf_i+0x244>) 8007f44: 2100 movs r1, #0 8007f46: f884 1043 strb.w r1, [r4, #67] ; 0x43 8007f4a: 6866 ldr r6, [r4, #4] 8007f4c: 2e00 cmp r6, #0 8007f4e: bfa8 it ge 8007f50: 6821 ldrge r1, [r4, #0] 8007f52: 60a6 str r6, [r4, #8] 8007f54: bfa4 itt ge 8007f56: f021 0104 bicge.w r1, r1, #4 8007f5a: 6021 strge r1, [r4, #0] 8007f5c: b90d cbnz r5, 8007f62 <_printf_i+0x11a> 8007f5e: 2e00 cmp r6, #0 8007f60: d04d beq.n 8007ffe <_printf_i+0x1b6> 8007f62: 4616 mov r6, r2 8007f64: fbb5 f1f3 udiv r1, r5, r3 8007f68: fb03 5711 mls r7, r3, r1, r5 8007f6c: 5dc7 ldrb r7, [r0, r7] 8007f6e: f806 7d01 strb.w r7, [r6, #-1]! 8007f72: 462f mov r7, r5 8007f74: 42bb cmp r3, r7 8007f76: 460d mov r5, r1 8007f78: d9f4 bls.n 8007f64 <_printf_i+0x11c> 8007f7a: 2b08 cmp r3, #8 8007f7c: d10b bne.n 8007f96 <_printf_i+0x14e> 8007f7e: 6823 ldr r3, [r4, #0] 8007f80: 07df lsls r7, r3, #31 8007f82: d508 bpl.n 8007f96 <_printf_i+0x14e> 8007f84: 6923 ldr r3, [r4, #16] 8007f86: 6861 ldr r1, [r4, #4] 8007f88: 4299 cmp r1, r3 8007f8a: bfde ittt le 8007f8c: 2330 movle r3, #48 ; 0x30 8007f8e: f806 3c01 strble.w r3, [r6, #-1] 8007f92: f106 36ff addle.w r6, r6, #4294967295 ; 0xffffffff 8007f96: 1b92 subs r2, r2, r6 8007f98: 6122 str r2, [r4, #16] 8007f9a: 464b mov r3, r9 8007f9c: 4621 mov r1, r4 8007f9e: 4640 mov r0, r8 8007fa0: f8cd a000 str.w sl, [sp] 8007fa4: aa03 add r2, sp, #12 8007fa6: f7ff fedf bl 8007d68 <_printf_common> 8007faa: 3001 adds r0, #1 8007fac: d14c bne.n 8008048 <_printf_i+0x200> 8007fae: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8007fb2: b004 add sp, #16 8007fb4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8007fb8: 4834 ldr r0, [pc, #208] ; (800808c <_printf_i+0x244>) 8007fba: f884 7045 strb.w r7, [r4, #69] ; 0x45 8007fbe: 680e ldr r6, [r1, #0] 8007fc0: 6823 ldr r3, [r4, #0] 8007fc2: f856 5b04 ldr.w r5, [r6], #4 8007fc6: 061f lsls r7, r3, #24 8007fc8: 600e str r6, [r1, #0] 8007fca: d514 bpl.n 8007ff6 <_printf_i+0x1ae> 8007fcc: 07d9 lsls r1, r3, #31 8007fce: bf44 itt mi 8007fd0: f043 0320 orrmi.w r3, r3, #32 8007fd4: 6023 strmi r3, [r4, #0] 8007fd6: b91d cbnz r5, 8007fe0 <_printf_i+0x198> 8007fd8: 6823 ldr r3, [r4, #0] 8007fda: f023 0320 bic.w r3, r3, #32 8007fde: 6023 str r3, [r4, #0] 8007fe0: 2310 movs r3, #16 8007fe2: e7af b.n 8007f44 <_printf_i+0xfc> 8007fe4: 6823 ldr r3, [r4, #0] 8007fe6: f043 0320 orr.w r3, r3, #32 8007fea: 6023 str r3, [r4, #0] 8007fec: 2378 movs r3, #120 ; 0x78 8007fee: 4828 ldr r0, [pc, #160] ; (8008090 <_printf_i+0x248>) 8007ff0: f884 3045 strb.w r3, [r4, #69] ; 0x45 8007ff4: e7e3 b.n 8007fbe <_printf_i+0x176> 8007ff6: 065e lsls r6, r3, #25 8007ff8: bf48 it mi 8007ffa: b2ad uxthmi r5, r5 8007ffc: e7e6 b.n 8007fcc <_printf_i+0x184> 8007ffe: 4616 mov r6, r2 8008000: e7bb b.n 8007f7a <_printf_i+0x132> 8008002: 680b ldr r3, [r1, #0] 8008004: 6826 ldr r6, [r4, #0] 8008006: 1d1d adds r5, r3, #4 8008008: 6960 ldr r0, [r4, #20] 800800a: 600d str r5, [r1, #0] 800800c: 0635 lsls r5, r6, #24 800800e: 681b ldr r3, [r3, #0] 8008010: d501 bpl.n 8008016 <_printf_i+0x1ce> 8008012: 6018 str r0, [r3, #0] 8008014: e002 b.n 800801c <_printf_i+0x1d4> 8008016: 0671 lsls r1, r6, #25 8008018: d5fb bpl.n 8008012 <_printf_i+0x1ca> 800801a: 8018 strh r0, [r3, #0] 800801c: 2300 movs r3, #0 800801e: 4616 mov r6, r2 8008020: 6123 str r3, [r4, #16] 8008022: e7ba b.n 8007f9a <_printf_i+0x152> 8008024: 680b ldr r3, [r1, #0] 8008026: 1d1a adds r2, r3, #4 8008028: 600a str r2, [r1, #0] 800802a: 681e ldr r6, [r3, #0] 800802c: 2100 movs r1, #0 800802e: 4630 mov r0, r6 8008030: 6862 ldr r2, [r4, #4] 8008032: f000 fedf bl 8008df4 8008036: b108 cbz r0, 800803c <_printf_i+0x1f4> 8008038: 1b80 subs r0, r0, r6 800803a: 6060 str r0, [r4, #4] 800803c: 6863 ldr r3, [r4, #4] 800803e: 6123 str r3, [r4, #16] 8008040: 2300 movs r3, #0 8008042: f884 3043 strb.w r3, [r4, #67] ; 0x43 8008046: e7a8 b.n 8007f9a <_printf_i+0x152> 8008048: 4632 mov r2, r6 800804a: 4649 mov r1, r9 800804c: 4640 mov r0, r8 800804e: 6923 ldr r3, [r4, #16] 8008050: 47d0 blx sl 8008052: 3001 adds r0, #1 8008054: d0ab beq.n 8007fae <_printf_i+0x166> 8008056: 6823 ldr r3, [r4, #0] 8008058: 079b lsls r3, r3, #30 800805a: d413 bmi.n 8008084 <_printf_i+0x23c> 800805c: 68e0 ldr r0, [r4, #12] 800805e: 9b03 ldr r3, [sp, #12] 8008060: 4298 cmp r0, r3 8008062: bfb8 it lt 8008064: 4618 movlt r0, r3 8008066: e7a4 b.n 8007fb2 <_printf_i+0x16a> 8008068: 2301 movs r3, #1 800806a: 4632 mov r2, r6 800806c: 4649 mov r1, r9 800806e: 4640 mov r0, r8 8008070: 47d0 blx sl 8008072: 3001 adds r0, #1 8008074: d09b beq.n 8007fae <_printf_i+0x166> 8008076: 3501 adds r5, #1 8008078: 68e3 ldr r3, [r4, #12] 800807a: 9903 ldr r1, [sp, #12] 800807c: 1a5b subs r3, r3, r1 800807e: 42ab cmp r3, r5 8008080: dcf2 bgt.n 8008068 <_printf_i+0x220> 8008082: e7eb b.n 800805c <_printf_i+0x214> 8008084: 2500 movs r5, #0 8008086: f104 0619 add.w r6, r4, #25 800808a: e7f5 b.n 8008078 <_printf_i+0x230> 800808c: 0800af4e .word 0x0800af4e 8008090: 0800af5f .word 0x0800af5f 08008094 <_sbrk_r>: 8008094: b538 push {r3, r4, r5, lr} 8008096: 2300 movs r3, #0 8008098: 4d05 ldr r5, [pc, #20] ; (80080b0 <_sbrk_r+0x1c>) 800809a: 4604 mov r4, r0 800809c: 4608 mov r0, r1 800809e: 602b str r3, [r5, #0] 80080a0: f7f9 fc88 bl 80019b4 <_sbrk> 80080a4: 1c43 adds r3, r0, #1 80080a6: d102 bne.n 80080ae <_sbrk_r+0x1a> 80080a8: 682b ldr r3, [r5, #0] 80080aa: b103 cbz r3, 80080ae <_sbrk_r+0x1a> 80080ac: 6023 str r3, [r4, #0] 80080ae: bd38 pop {r3, r4, r5, pc} 80080b0: 20002538 .word 0x20002538 080080b4 : 80080b4: b40e push {r1, r2, r3} 80080b6: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000 80080ba: b500 push {lr} 80080bc: b09c sub sp, #112 ; 0x70 80080be: ab1d add r3, sp, #116 ; 0x74 80080c0: 9002 str r0, [sp, #8] 80080c2: 9006 str r0, [sp, #24] 80080c4: 9107 str r1, [sp, #28] 80080c6: 9104 str r1, [sp, #16] 80080c8: 4808 ldr r0, [pc, #32] ; (80080ec ) 80080ca: 4909 ldr r1, [pc, #36] ; (80080f0 ) 80080cc: f853 2b04 ldr.w r2, [r3], #4 80080d0: 9105 str r1, [sp, #20] 80080d2: 6800 ldr r0, [r0, #0] 80080d4: a902 add r1, sp, #8 80080d6: 9301 str r3, [sp, #4] 80080d8: f001 faa0 bl 800961c <_svfiprintf_r> 80080dc: 2200 movs r2, #0 80080de: 9b02 ldr r3, [sp, #8] 80080e0: 701a strb r2, [r3, #0] 80080e2: b01c add sp, #112 ; 0x70 80080e4: f85d eb04 ldr.w lr, [sp], #4 80080e8: b003 add sp, #12 80080ea: 4770 bx lr 80080ec: 20000014 .word 0x20000014 80080f0: ffff0208 .word 0xffff0208 080080f4 : 80080f4: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 80080f8: 6903 ldr r3, [r0, #16] 80080fa: 690c ldr r4, [r1, #16] 80080fc: 4607 mov r7, r0 80080fe: 42a3 cmp r3, r4 8008100: f2c0 8083 blt.w 800820a 8008104: 3c01 subs r4, #1 8008106: f100 0514 add.w r5, r0, #20 800810a: f101 0814 add.w r8, r1, #20 800810e: eb05 0384 add.w r3, r5, r4, lsl #2 8008112: 9301 str r3, [sp, #4] 8008114: f858 3024 ldr.w r3, [r8, r4, lsl #2] 8008118: f855 2024 ldr.w r2, [r5, r4, lsl #2] 800811c: 3301 adds r3, #1 800811e: 429a cmp r2, r3 8008120: fbb2 f6f3 udiv r6, r2, r3 8008124: ea4f 0b84 mov.w fp, r4, lsl #2 8008128: eb08 0984 add.w r9, r8, r4, lsl #2 800812c: d332 bcc.n 8008194 800812e: f04f 0e00 mov.w lr, #0 8008132: 4640 mov r0, r8 8008134: 46ac mov ip, r5 8008136: 46f2 mov sl, lr 8008138: f850 2b04 ldr.w r2, [r0], #4 800813c: b293 uxth r3, r2 800813e: fb06 e303 mla r3, r6, r3, lr 8008142: 0c12 lsrs r2, r2, #16 8008144: ea4f 4e13 mov.w lr, r3, lsr #16 8008148: fb06 e202 mla r2, r6, r2, lr 800814c: b29b uxth r3, r3 800814e: ebaa 0303 sub.w r3, sl, r3 8008152: f8dc a000 ldr.w sl, [ip] 8008156: ea4f 4e12 mov.w lr, r2, lsr #16 800815a: fa1f fa8a uxth.w sl, sl 800815e: 4453 add r3, sl 8008160: fa1f fa82 uxth.w sl, r2 8008164: f8dc 2000 ldr.w r2, [ip] 8008168: 4581 cmp r9, r0 800816a: ebca 4212 rsb r2, sl, r2, lsr #16 800816e: eb02 4223 add.w r2, r2, r3, asr #16 8008172: b29b uxth r3, r3 8008174: ea43 4302 orr.w r3, r3, r2, lsl #16 8008178: ea4f 4a22 mov.w sl, r2, asr #16 800817c: f84c 3b04 str.w r3, [ip], #4 8008180: d2da bcs.n 8008138 8008182: f855 300b ldr.w r3, [r5, fp] 8008186: b92b cbnz r3, 8008194 8008188: 9b01 ldr r3, [sp, #4] 800818a: 3b04 subs r3, #4 800818c: 429d cmp r5, r3 800818e: 461a mov r2, r3 8008190: d32f bcc.n 80081f2 8008192: 613c str r4, [r7, #16] 8008194: 4638 mov r0, r7 8008196: f001 f8cf bl 8009338 <__mcmp> 800819a: 2800 cmp r0, #0 800819c: db25 blt.n 80081ea 800819e: 4628 mov r0, r5 80081a0: f04f 0c00 mov.w ip, #0 80081a4: 3601 adds r6, #1 80081a6: f858 1b04 ldr.w r1, [r8], #4 80081aa: f8d0 e000 ldr.w lr, [r0] 80081ae: b28b uxth r3, r1 80081b0: ebac 0303 sub.w r3, ip, r3 80081b4: fa1f f28e uxth.w r2, lr 80081b8: 4413 add r3, r2 80081ba: 0c0a lsrs r2, r1, #16 80081bc: ebc2 421e rsb r2, r2, lr, lsr #16 80081c0: eb02 4223 add.w r2, r2, r3, asr #16 80081c4: b29b uxth r3, r3 80081c6: ea43 4302 orr.w r3, r3, r2, lsl #16 80081ca: 45c1 cmp r9, r8 80081cc: ea4f 4c22 mov.w ip, r2, asr #16 80081d0: f840 3b04 str.w r3, [r0], #4 80081d4: d2e7 bcs.n 80081a6 80081d6: f855 2024 ldr.w r2, [r5, r4, lsl #2] 80081da: eb05 0384 add.w r3, r5, r4, lsl #2 80081de: b922 cbnz r2, 80081ea 80081e0: 3b04 subs r3, #4 80081e2: 429d cmp r5, r3 80081e4: 461a mov r2, r3 80081e6: d30a bcc.n 80081fe 80081e8: 613c str r4, [r7, #16] 80081ea: 4630 mov r0, r6 80081ec: b003 add sp, #12 80081ee: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80081f2: 6812 ldr r2, [r2, #0] 80081f4: 3b04 subs r3, #4 80081f6: 2a00 cmp r2, #0 80081f8: d1cb bne.n 8008192 80081fa: 3c01 subs r4, #1 80081fc: e7c6 b.n 800818c 80081fe: 6812 ldr r2, [r2, #0] 8008200: 3b04 subs r3, #4 8008202: 2a00 cmp r2, #0 8008204: d1f0 bne.n 80081e8 8008206: 3c01 subs r4, #1 8008208: e7eb b.n 80081e2 800820a: 2000 movs r0, #0 800820c: e7ee b.n 80081ec ... 08008210 <_dtoa_r>: 8008210: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8008214: 4616 mov r6, r2 8008216: 461f mov r7, r3 8008218: 6a44 ldr r4, [r0, #36] ; 0x24 800821a: b099 sub sp, #100 ; 0x64 800821c: 4605 mov r5, r0 800821e: e9cd 6704 strd r6, r7, [sp, #16] 8008222: f8dd 8094 ldr.w r8, [sp, #148] ; 0x94 8008226: b974 cbnz r4, 8008246 <_dtoa_r+0x36> 8008228: 2010 movs r0, #16 800822a: f7ff fa15 bl 8007658 800822e: 4602 mov r2, r0 8008230: 6268 str r0, [r5, #36] ; 0x24 8008232: b920 cbnz r0, 800823e <_dtoa_r+0x2e> 8008234: 21ea movs r1, #234 ; 0xea 8008236: 4bae ldr r3, [pc, #696] ; (80084f0 <_dtoa_r+0x2e0>) 8008238: 48ae ldr r0, [pc, #696] ; (80084f4 <_dtoa_r+0x2e4>) 800823a: f001 faef bl 800981c <__assert_func> 800823e: e9c0 4401 strd r4, r4, [r0, #4] 8008242: 6004 str r4, [r0, #0] 8008244: 60c4 str r4, [r0, #12] 8008246: 6a6b ldr r3, [r5, #36] ; 0x24 8008248: 6819 ldr r1, [r3, #0] 800824a: b151 cbz r1, 8008262 <_dtoa_r+0x52> 800824c: 685a ldr r2, [r3, #4] 800824e: 2301 movs r3, #1 8008250: 4093 lsls r3, r2 8008252: 604a str r2, [r1, #4] 8008254: 608b str r3, [r1, #8] 8008256: 4628 mov r0, r5 8008258: f000 fe34 bl 8008ec4 <_Bfree> 800825c: 2200 movs r2, #0 800825e: 6a6b ldr r3, [r5, #36] ; 0x24 8008260: 601a str r2, [r3, #0] 8008262: 1e3b subs r3, r7, #0 8008264: bfaf iteee ge 8008266: 2300 movge r3, #0 8008268: 2201 movlt r2, #1 800826a: f023 4300 biclt.w r3, r3, #2147483648 ; 0x80000000 800826e: 9305 strlt r3, [sp, #20] 8008270: bfa8 it ge 8008272: f8c8 3000 strge.w r3, [r8] 8008276: f8dd 9014 ldr.w r9, [sp, #20] 800827a: 4b9f ldr r3, [pc, #636] ; (80084f8 <_dtoa_r+0x2e8>) 800827c: bfb8 it lt 800827e: f8c8 2000 strlt.w r2, [r8] 8008282: ea33 0309 bics.w r3, r3, r9 8008286: d119 bne.n 80082bc <_dtoa_r+0xac> 8008288: f242 730f movw r3, #9999 ; 0x270f 800828c: 9a24 ldr r2, [sp, #144] ; 0x90 800828e: 6013 str r3, [r2, #0] 8008290: f3c9 0313 ubfx r3, r9, #0, #20 8008294: 4333 orrs r3, r6 8008296: f000 8580 beq.w 8008d9a <_dtoa_r+0xb8a> 800829a: 9b26 ldr r3, [sp, #152] ; 0x98 800829c: b953 cbnz r3, 80082b4 <_dtoa_r+0xa4> 800829e: 4b97 ldr r3, [pc, #604] ; (80084fc <_dtoa_r+0x2ec>) 80082a0: e022 b.n 80082e8 <_dtoa_r+0xd8> 80082a2: 4b97 ldr r3, [pc, #604] ; (8008500 <_dtoa_r+0x2f0>) 80082a4: 9308 str r3, [sp, #32] 80082a6: 3308 adds r3, #8 80082a8: 9a26 ldr r2, [sp, #152] ; 0x98 80082aa: 6013 str r3, [r2, #0] 80082ac: 9808 ldr r0, [sp, #32] 80082ae: b019 add sp, #100 ; 0x64 80082b0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80082b4: 4b91 ldr r3, [pc, #580] ; (80084fc <_dtoa_r+0x2ec>) 80082b6: 9308 str r3, [sp, #32] 80082b8: 3303 adds r3, #3 80082ba: e7f5 b.n 80082a8 <_dtoa_r+0x98> 80082bc: e9dd 3404 ldrd r3, r4, [sp, #16] 80082c0: e9cd 340c strd r3, r4, [sp, #48] ; 0x30 80082c4: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 80082c8: 2200 movs r2, #0 80082ca: 2300 movs r3, #0 80082cc: f7f8 fbd8 bl 8000a80 <__aeabi_dcmpeq> 80082d0: 4680 mov r8, r0 80082d2: b158 cbz r0, 80082ec <_dtoa_r+0xdc> 80082d4: 2301 movs r3, #1 80082d6: 9a24 ldr r2, [sp, #144] ; 0x90 80082d8: 6013 str r3, [r2, #0] 80082da: 9b26 ldr r3, [sp, #152] ; 0x98 80082dc: 2b00 cmp r3, #0 80082de: f000 8559 beq.w 8008d94 <_dtoa_r+0xb84> 80082e2: 4888 ldr r0, [pc, #544] ; (8008504 <_dtoa_r+0x2f4>) 80082e4: 6018 str r0, [r3, #0] 80082e6: 1e43 subs r3, r0, #1 80082e8: 9308 str r3, [sp, #32] 80082ea: e7df b.n 80082ac <_dtoa_r+0x9c> 80082ec: ab16 add r3, sp, #88 ; 0x58 80082ee: 9301 str r3, [sp, #4] 80082f0: ab17 add r3, sp, #92 ; 0x5c 80082f2: 9300 str r3, [sp, #0] 80082f4: 4628 mov r0, r5 80082f6: e9dd 230c ldrd r2, r3, [sp, #48] ; 0x30 80082fa: f001 f8c9 bl 8009490 <__d2b> 80082fe: f3c9 540a ubfx r4, r9, #20, #11 8008302: 4682 mov sl, r0 8008304: 2c00 cmp r4, #0 8008306: d07e beq.n 8008406 <_dtoa_r+0x1f6> 8008308: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 800830c: 9b0d ldr r3, [sp, #52] ; 0x34 800830e: f2a4 34ff subw r4, r4, #1023 ; 0x3ff 8008312: f3c3 0313 ubfx r3, r3, #0, #20 8008316: f043 517f orr.w r1, r3, #1069547520 ; 0x3fc00000 800831a: f441 1140 orr.w r1, r1, #3145728 ; 0x300000 800831e: f8cd 804c str.w r8, [sp, #76] ; 0x4c 8008322: 2200 movs r2, #0 8008324: 4b78 ldr r3, [pc, #480] ; (8008508 <_dtoa_r+0x2f8>) 8008326: f7f7 ff8b bl 8000240 <__aeabi_dsub> 800832a: a36b add r3, pc, #428 ; (adr r3, 80084d8 <_dtoa_r+0x2c8>) 800832c: e9d3 2300 ldrd r2, r3, [r3] 8008330: f7f8 f93e bl 80005b0 <__aeabi_dmul> 8008334: a36a add r3, pc, #424 ; (adr r3, 80084e0 <_dtoa_r+0x2d0>) 8008336: e9d3 2300 ldrd r2, r3, [r3] 800833a: f7f7 ff83 bl 8000244 <__adddf3> 800833e: 4606 mov r6, r0 8008340: 4620 mov r0, r4 8008342: 460f mov r7, r1 8008344: f7f8 f8ca bl 80004dc <__aeabi_i2d> 8008348: a367 add r3, pc, #412 ; (adr r3, 80084e8 <_dtoa_r+0x2d8>) 800834a: e9d3 2300 ldrd r2, r3, [r3] 800834e: f7f8 f92f bl 80005b0 <__aeabi_dmul> 8008352: 4602 mov r2, r0 8008354: 460b mov r3, r1 8008356: 4630 mov r0, r6 8008358: 4639 mov r1, r7 800835a: f7f7 ff73 bl 8000244 <__adddf3> 800835e: 4606 mov r6, r0 8008360: 460f mov r7, r1 8008362: f7f8 fbd5 bl 8000b10 <__aeabi_d2iz> 8008366: 2200 movs r2, #0 8008368: 4681 mov r9, r0 800836a: 2300 movs r3, #0 800836c: 4630 mov r0, r6 800836e: 4639 mov r1, r7 8008370: f7f8 fb90 bl 8000a94 <__aeabi_dcmplt> 8008374: b148 cbz r0, 800838a <_dtoa_r+0x17a> 8008376: 4648 mov r0, r9 8008378: f7f8 f8b0 bl 80004dc <__aeabi_i2d> 800837c: 4632 mov r2, r6 800837e: 463b mov r3, r7 8008380: f7f8 fb7e bl 8000a80 <__aeabi_dcmpeq> 8008384: b908 cbnz r0, 800838a <_dtoa_r+0x17a> 8008386: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff 800838a: f1b9 0f16 cmp.w r9, #22 800838e: d857 bhi.n 8008440 <_dtoa_r+0x230> 8008390: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 8008394: 4b5d ldr r3, [pc, #372] ; (800850c <_dtoa_r+0x2fc>) 8008396: eb03 03c9 add.w r3, r3, r9, lsl #3 800839a: e9d3 2300 ldrd r2, r3, [r3] 800839e: f7f8 fb79 bl 8000a94 <__aeabi_dcmplt> 80083a2: 2800 cmp r0, #0 80083a4: d04e beq.n 8008444 <_dtoa_r+0x234> 80083a6: 2300 movs r3, #0 80083a8: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff 80083ac: 930f str r3, [sp, #60] ; 0x3c 80083ae: 9b16 ldr r3, [sp, #88] ; 0x58 80083b0: 1b1c subs r4, r3, r4 80083b2: 1e63 subs r3, r4, #1 80083b4: 9309 str r3, [sp, #36] ; 0x24 80083b6: bf49 itett mi 80083b8: f1c4 0301 rsbmi r3, r4, #1 80083bc: 2300 movpl r3, #0 80083be: 9306 strmi r3, [sp, #24] 80083c0: 2300 movmi r3, #0 80083c2: bf54 ite pl 80083c4: 9306 strpl r3, [sp, #24] 80083c6: 9309 strmi r3, [sp, #36] ; 0x24 80083c8: f1b9 0f00 cmp.w r9, #0 80083cc: db3c blt.n 8008448 <_dtoa_r+0x238> 80083ce: 9b09 ldr r3, [sp, #36] ; 0x24 80083d0: f8cd 9038 str.w r9, [sp, #56] ; 0x38 80083d4: 444b add r3, r9 80083d6: 9309 str r3, [sp, #36] ; 0x24 80083d8: 2300 movs r3, #0 80083da: 930a str r3, [sp, #40] ; 0x28 80083dc: 9b22 ldr r3, [sp, #136] ; 0x88 80083de: 2b09 cmp r3, #9 80083e0: d86c bhi.n 80084bc <_dtoa_r+0x2ac> 80083e2: 2b05 cmp r3, #5 80083e4: bfc4 itt gt 80083e6: 3b04 subgt r3, #4 80083e8: 9322 strgt r3, [sp, #136] ; 0x88 80083ea: 9b22 ldr r3, [sp, #136] ; 0x88 80083ec: bfc8 it gt 80083ee: 2400 movgt r4, #0 80083f0: f1a3 0302 sub.w r3, r3, #2 80083f4: bfd8 it le 80083f6: 2401 movle r4, #1 80083f8: 2b03 cmp r3, #3 80083fa: f200 808b bhi.w 8008514 <_dtoa_r+0x304> 80083fe: e8df f003 tbb [pc, r3] 8008402: 4f2d .short 0x4f2d 8008404: 5b4d .short 0x5b4d 8008406: e9dd 4316 ldrd r4, r3, [sp, #88] ; 0x58 800840a: 441c add r4, r3 800840c: f204 4332 addw r3, r4, #1074 ; 0x432 8008410: 2b20 cmp r3, #32 8008412: bfc3 ittte gt 8008414: f1c3 0340 rsbgt r3, r3, #64 ; 0x40 8008418: f204 4012 addwgt r0, r4, #1042 ; 0x412 800841c: fa09 f303 lslgt.w r3, r9, r3 8008420: f1c3 0320 rsble r3, r3, #32 8008424: bfc6 itte gt 8008426: fa26 f000 lsrgt.w r0, r6, r0 800842a: 4318 orrgt r0, r3 800842c: fa06 f003 lslle.w r0, r6, r3 8008430: f7f8 f844 bl 80004bc <__aeabi_ui2d> 8008434: 2301 movs r3, #1 8008436: f1a1 71f8 sub.w r1, r1, #32505856 ; 0x1f00000 800843a: 3c01 subs r4, #1 800843c: 9313 str r3, [sp, #76] ; 0x4c 800843e: e770 b.n 8008322 <_dtoa_r+0x112> 8008440: 2301 movs r3, #1 8008442: e7b3 b.n 80083ac <_dtoa_r+0x19c> 8008444: 900f str r0, [sp, #60] ; 0x3c 8008446: e7b2 b.n 80083ae <_dtoa_r+0x19e> 8008448: 9b06 ldr r3, [sp, #24] 800844a: eba3 0309 sub.w r3, r3, r9 800844e: 9306 str r3, [sp, #24] 8008450: f1c9 0300 rsb r3, r9, #0 8008454: 930a str r3, [sp, #40] ; 0x28 8008456: 2300 movs r3, #0 8008458: 930e str r3, [sp, #56] ; 0x38 800845a: e7bf b.n 80083dc <_dtoa_r+0x1cc> 800845c: 2300 movs r3, #0 800845e: 930b str r3, [sp, #44] ; 0x2c 8008460: 9b23 ldr r3, [sp, #140] ; 0x8c 8008462: 2b00 cmp r3, #0 8008464: dc59 bgt.n 800851a <_dtoa_r+0x30a> 8008466: f04f 0b01 mov.w fp, #1 800846a: 465b mov r3, fp 800846c: f8cd b008 str.w fp, [sp, #8] 8008470: f8cd b08c str.w fp, [sp, #140] ; 0x8c 8008474: 2200 movs r2, #0 8008476: 6a68 ldr r0, [r5, #36] ; 0x24 8008478: 6042 str r2, [r0, #4] 800847a: 2204 movs r2, #4 800847c: f102 0614 add.w r6, r2, #20 8008480: 429e cmp r6, r3 8008482: 6841 ldr r1, [r0, #4] 8008484: d94f bls.n 8008526 <_dtoa_r+0x316> 8008486: 4628 mov r0, r5 8008488: f000 fcdc bl 8008e44 <_Balloc> 800848c: 9008 str r0, [sp, #32] 800848e: 2800 cmp r0, #0 8008490: d14d bne.n 800852e <_dtoa_r+0x31e> 8008492: 4602 mov r2, r0 8008494: f44f 71d5 mov.w r1, #426 ; 0x1aa 8008498: 4b1d ldr r3, [pc, #116] ; (8008510 <_dtoa_r+0x300>) 800849a: e6cd b.n 8008238 <_dtoa_r+0x28> 800849c: 2301 movs r3, #1 800849e: e7de b.n 800845e <_dtoa_r+0x24e> 80084a0: 2300 movs r3, #0 80084a2: 930b str r3, [sp, #44] ; 0x2c 80084a4: 9b23 ldr r3, [sp, #140] ; 0x8c 80084a6: eb09 0b03 add.w fp, r9, r3 80084aa: f10b 0301 add.w r3, fp, #1 80084ae: 2b01 cmp r3, #1 80084b0: 9302 str r3, [sp, #8] 80084b2: bfb8 it lt 80084b4: 2301 movlt r3, #1 80084b6: e7dd b.n 8008474 <_dtoa_r+0x264> 80084b8: 2301 movs r3, #1 80084ba: e7f2 b.n 80084a2 <_dtoa_r+0x292> 80084bc: 2401 movs r4, #1 80084be: 2300 movs r3, #0 80084c0: 940b str r4, [sp, #44] ; 0x2c 80084c2: 9322 str r3, [sp, #136] ; 0x88 80084c4: f04f 3bff mov.w fp, #4294967295 ; 0xffffffff 80084c8: 2200 movs r2, #0 80084ca: 2312 movs r3, #18 80084cc: f8cd b008 str.w fp, [sp, #8] 80084d0: 9223 str r2, [sp, #140] ; 0x8c 80084d2: e7cf b.n 8008474 <_dtoa_r+0x264> 80084d4: f3af 8000 nop.w 80084d8: 636f4361 .word 0x636f4361 80084dc: 3fd287a7 .word 0x3fd287a7 80084e0: 8b60c8b3 .word 0x8b60c8b3 80084e4: 3fc68a28 .word 0x3fc68a28 80084e8: 509f79fb .word 0x509f79fb 80084ec: 3fd34413 .word 0x3fd34413 80084f0: 0800af7d .word 0x0800af7d 80084f4: 0800af94 .word 0x0800af94 80084f8: 7ff00000 .word 0x7ff00000 80084fc: 0800af79 .word 0x0800af79 8008500: 0800af70 .word 0x0800af70 8008504: 0800af4d .word 0x0800af4d 8008508: 3ff80000 .word 0x3ff80000 800850c: 0800b090 .word 0x0800b090 8008510: 0800aff3 .word 0x0800aff3 8008514: 2301 movs r3, #1 8008516: 930b str r3, [sp, #44] ; 0x2c 8008518: e7d4 b.n 80084c4 <_dtoa_r+0x2b4> 800851a: f8dd b08c ldr.w fp, [sp, #140] ; 0x8c 800851e: 465b mov r3, fp 8008520: f8cd b008 str.w fp, [sp, #8] 8008524: e7a6 b.n 8008474 <_dtoa_r+0x264> 8008526: 3101 adds r1, #1 8008528: 6041 str r1, [r0, #4] 800852a: 0052 lsls r2, r2, #1 800852c: e7a6 b.n 800847c <_dtoa_r+0x26c> 800852e: 6a6b ldr r3, [r5, #36] ; 0x24 8008530: 9a08 ldr r2, [sp, #32] 8008532: 601a str r2, [r3, #0] 8008534: 9b02 ldr r3, [sp, #8] 8008536: 2b0e cmp r3, #14 8008538: f200 80a8 bhi.w 800868c <_dtoa_r+0x47c> 800853c: 2c00 cmp r4, #0 800853e: f000 80a5 beq.w 800868c <_dtoa_r+0x47c> 8008542: f1b9 0f00 cmp.w r9, #0 8008546: dd34 ble.n 80085b2 <_dtoa_r+0x3a2> 8008548: 4a9a ldr r2, [pc, #616] ; (80087b4 <_dtoa_r+0x5a4>) 800854a: f009 030f and.w r3, r9, #15 800854e: eb02 03c3 add.w r3, r2, r3, lsl #3 8008552: f419 7f80 tst.w r9, #256 ; 0x100 8008556: e9d3 3400 ldrd r3, r4, [r3] 800855a: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40 800855e: ea4f 1429 mov.w r4, r9, asr #4 8008562: d016 beq.n 8008592 <_dtoa_r+0x382> 8008564: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 8008568: 4b93 ldr r3, [pc, #588] ; (80087b8 <_dtoa_r+0x5a8>) 800856a: 2703 movs r7, #3 800856c: e9d3 2308 ldrd r2, r3, [r3, #32] 8008570: f7f8 f948 bl 8000804 <__aeabi_ddiv> 8008574: e9cd 0104 strd r0, r1, [sp, #16] 8008578: f004 040f and.w r4, r4, #15 800857c: 4e8e ldr r6, [pc, #568] ; (80087b8 <_dtoa_r+0x5a8>) 800857e: b954 cbnz r4, 8008596 <_dtoa_r+0x386> 8008580: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 8008584: e9dd 0104 ldrd r0, r1, [sp, #16] 8008588: f7f8 f93c bl 8000804 <__aeabi_ddiv> 800858c: e9cd 0104 strd r0, r1, [sp, #16] 8008590: e029 b.n 80085e6 <_dtoa_r+0x3d6> 8008592: 2702 movs r7, #2 8008594: e7f2 b.n 800857c <_dtoa_r+0x36c> 8008596: 07e1 lsls r1, r4, #31 8008598: d508 bpl.n 80085ac <_dtoa_r+0x39c> 800859a: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 800859e: e9d6 2300 ldrd r2, r3, [r6] 80085a2: f7f8 f805 bl 80005b0 <__aeabi_dmul> 80085a6: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 80085aa: 3701 adds r7, #1 80085ac: 1064 asrs r4, r4, #1 80085ae: 3608 adds r6, #8 80085b0: e7e5 b.n 800857e <_dtoa_r+0x36e> 80085b2: f000 80a5 beq.w 8008700 <_dtoa_r+0x4f0> 80085b6: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30 80085ba: f1c9 0400 rsb r4, r9, #0 80085be: 4b7d ldr r3, [pc, #500] ; (80087b4 <_dtoa_r+0x5a4>) 80085c0: f004 020f and.w r2, r4, #15 80085c4: eb03 03c2 add.w r3, r3, r2, lsl #3 80085c8: e9d3 2300 ldrd r2, r3, [r3] 80085cc: f7f7 fff0 bl 80005b0 <__aeabi_dmul> 80085d0: 2702 movs r7, #2 80085d2: 2300 movs r3, #0 80085d4: e9cd 0104 strd r0, r1, [sp, #16] 80085d8: 4e77 ldr r6, [pc, #476] ; (80087b8 <_dtoa_r+0x5a8>) 80085da: 1124 asrs r4, r4, #4 80085dc: 2c00 cmp r4, #0 80085de: f040 8084 bne.w 80086ea <_dtoa_r+0x4da> 80085e2: 2b00 cmp r3, #0 80085e4: d1d2 bne.n 800858c <_dtoa_r+0x37c> 80085e6: 9b0f ldr r3, [sp, #60] ; 0x3c 80085e8: 2b00 cmp r3, #0 80085ea: f000 808b beq.w 8008704 <_dtoa_r+0x4f4> 80085ee: e9dd 3404 ldrd r3, r4, [sp, #16] 80085f2: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40 80085f6: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 80085fa: 2200 movs r2, #0 80085fc: 4b6f ldr r3, [pc, #444] ; (80087bc <_dtoa_r+0x5ac>) 80085fe: f7f8 fa49 bl 8000a94 <__aeabi_dcmplt> 8008602: 2800 cmp r0, #0 8008604: d07e beq.n 8008704 <_dtoa_r+0x4f4> 8008606: 9b02 ldr r3, [sp, #8] 8008608: 2b00 cmp r3, #0 800860a: d07b beq.n 8008704 <_dtoa_r+0x4f4> 800860c: f1bb 0f00 cmp.w fp, #0 8008610: dd38 ble.n 8008684 <_dtoa_r+0x474> 8008612: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 8008616: 2200 movs r2, #0 8008618: 4b69 ldr r3, [pc, #420] ; (80087c0 <_dtoa_r+0x5b0>) 800861a: f7f7 ffc9 bl 80005b0 <__aeabi_dmul> 800861e: 465c mov r4, fp 8008620: e9cd 0104 strd r0, r1, [sp, #16] 8008624: f109 38ff add.w r8, r9, #4294967295 ; 0xffffffff 8008628: 3701 adds r7, #1 800862a: 4638 mov r0, r7 800862c: f7f7 ff56 bl 80004dc <__aeabi_i2d> 8008630: e9dd 2304 ldrd r2, r3, [sp, #16] 8008634: f7f7 ffbc bl 80005b0 <__aeabi_dmul> 8008638: 2200 movs r2, #0 800863a: 4b62 ldr r3, [pc, #392] ; (80087c4 <_dtoa_r+0x5b4>) 800863c: f7f7 fe02 bl 8000244 <__adddf3> 8008640: f1a1 7650 sub.w r6, r1, #54525952 ; 0x3400000 8008644: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 8008648: 9611 str r6, [sp, #68] ; 0x44 800864a: 2c00 cmp r4, #0 800864c: d15d bne.n 800870a <_dtoa_r+0x4fa> 800864e: e9dd 0104 ldrd r0, r1, [sp, #16] 8008652: 2200 movs r2, #0 8008654: 4b5c ldr r3, [pc, #368] ; (80087c8 <_dtoa_r+0x5b8>) 8008656: f7f7 fdf3 bl 8000240 <__aeabi_dsub> 800865a: 4602 mov r2, r0 800865c: 460b mov r3, r1 800865e: e9cd 2304 strd r2, r3, [sp, #16] 8008662: 4633 mov r3, r6 8008664: 9a10 ldr r2, [sp, #64] ; 0x40 8008666: f7f8 fa33 bl 8000ad0 <__aeabi_dcmpgt> 800866a: 2800 cmp r0, #0 800866c: f040 829e bne.w 8008bac <_dtoa_r+0x99c> 8008670: e9dd 0104 ldrd r0, r1, [sp, #16] 8008674: 9a10 ldr r2, [sp, #64] ; 0x40 8008676: f106 4300 add.w r3, r6, #2147483648 ; 0x80000000 800867a: f7f8 fa0b bl 8000a94 <__aeabi_dcmplt> 800867e: 2800 cmp r0, #0 8008680: f040 8292 bne.w 8008ba8 <_dtoa_r+0x998> 8008684: e9dd 340c ldrd r3, r4, [sp, #48] ; 0x30 8008688: e9cd 3404 strd r3, r4, [sp, #16] 800868c: 9b17 ldr r3, [sp, #92] ; 0x5c 800868e: 2b00 cmp r3, #0 8008690: f2c0 8153 blt.w 800893a <_dtoa_r+0x72a> 8008694: f1b9 0f0e cmp.w r9, #14 8008698: f300 814f bgt.w 800893a <_dtoa_r+0x72a> 800869c: 4b45 ldr r3, [pc, #276] ; (80087b4 <_dtoa_r+0x5a4>) 800869e: eb03 03c9 add.w r3, r3, r9, lsl #3 80086a2: e9d3 3400 ldrd r3, r4, [r3] 80086a6: e9cd 3406 strd r3, r4, [sp, #24] 80086aa: 9b23 ldr r3, [sp, #140] ; 0x8c 80086ac: 2b00 cmp r3, #0 80086ae: f280 80db bge.w 8008868 <_dtoa_r+0x658> 80086b2: 9b02 ldr r3, [sp, #8] 80086b4: 2b00 cmp r3, #0 80086b6: f300 80d7 bgt.w 8008868 <_dtoa_r+0x658> 80086ba: f040 8274 bne.w 8008ba6 <_dtoa_r+0x996> 80086be: e9dd 0106 ldrd r0, r1, [sp, #24] 80086c2: 2200 movs r2, #0 80086c4: 4b40 ldr r3, [pc, #256] ; (80087c8 <_dtoa_r+0x5b8>) 80086c6: f7f7 ff73 bl 80005b0 <__aeabi_dmul> 80086ca: e9dd 2304 ldrd r2, r3, [sp, #16] 80086ce: f7f8 f9f5 bl 8000abc <__aeabi_dcmpge> 80086d2: 9c02 ldr r4, [sp, #8] 80086d4: 4626 mov r6, r4 80086d6: 2800 cmp r0, #0 80086d8: f040 824a bne.w 8008b70 <_dtoa_r+0x960> 80086dc: 2331 movs r3, #49 ; 0x31 80086de: 9f08 ldr r7, [sp, #32] 80086e0: f109 0901 add.w r9, r9, #1 80086e4: f807 3b01 strb.w r3, [r7], #1 80086e8: e246 b.n 8008b78 <_dtoa_r+0x968> 80086ea: 07e2 lsls r2, r4, #31 80086ec: d505 bpl.n 80086fa <_dtoa_r+0x4ea> 80086ee: e9d6 2300 ldrd r2, r3, [r6] 80086f2: f7f7 ff5d bl 80005b0 <__aeabi_dmul> 80086f6: 2301 movs r3, #1 80086f8: 3701 adds r7, #1 80086fa: 1064 asrs r4, r4, #1 80086fc: 3608 adds r6, #8 80086fe: e76d b.n 80085dc <_dtoa_r+0x3cc> 8008700: 2702 movs r7, #2 8008702: e770 b.n 80085e6 <_dtoa_r+0x3d6> 8008704: 46c8 mov r8, r9 8008706: 9c02 ldr r4, [sp, #8] 8008708: e78f b.n 800862a <_dtoa_r+0x41a> 800870a: 9908 ldr r1, [sp, #32] 800870c: 4b29 ldr r3, [pc, #164] ; (80087b4 <_dtoa_r+0x5a4>) 800870e: 4421 add r1, r4 8008710: 9112 str r1, [sp, #72] ; 0x48 8008712: 990b ldr r1, [sp, #44] ; 0x2c 8008714: eb03 03c4 add.w r3, r3, r4, lsl #3 8008718: e9dd 6710 ldrd r6, r7, [sp, #64] ; 0x40 800871c: e953 2302 ldrd r2, r3, [r3, #-8] 8008720: 2900 cmp r1, #0 8008722: d055 beq.n 80087d0 <_dtoa_r+0x5c0> 8008724: 2000 movs r0, #0 8008726: 4929 ldr r1, [pc, #164] ; (80087cc <_dtoa_r+0x5bc>) 8008728: f7f8 f86c bl 8000804 <__aeabi_ddiv> 800872c: 463b mov r3, r7 800872e: 4632 mov r2, r6 8008730: f7f7 fd86 bl 8000240 <__aeabi_dsub> 8008734: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 8008738: 9f08 ldr r7, [sp, #32] 800873a: e9dd 0104 ldrd r0, r1, [sp, #16] 800873e: f7f8 f9e7 bl 8000b10 <__aeabi_d2iz> 8008742: 4604 mov r4, r0 8008744: f7f7 feca bl 80004dc <__aeabi_i2d> 8008748: 4602 mov r2, r0 800874a: 460b mov r3, r1 800874c: e9dd 0104 ldrd r0, r1, [sp, #16] 8008750: f7f7 fd76 bl 8000240 <__aeabi_dsub> 8008754: 4602 mov r2, r0 8008756: 460b mov r3, r1 8008758: 3430 adds r4, #48 ; 0x30 800875a: e9cd 2304 strd r2, r3, [sp, #16] 800875e: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 8008762: f807 4b01 strb.w r4, [r7], #1 8008766: f7f8 f995 bl 8000a94 <__aeabi_dcmplt> 800876a: 2800 cmp r0, #0 800876c: d174 bne.n 8008858 <_dtoa_r+0x648> 800876e: e9dd 2304 ldrd r2, r3, [sp, #16] 8008772: 2000 movs r0, #0 8008774: 4911 ldr r1, [pc, #68] ; (80087bc <_dtoa_r+0x5ac>) 8008776: f7f7 fd63 bl 8000240 <__aeabi_dsub> 800877a: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 800877e: f7f8 f989 bl 8000a94 <__aeabi_dcmplt> 8008782: 2800 cmp r0, #0 8008784: f040 80b6 bne.w 80088f4 <_dtoa_r+0x6e4> 8008788: 9b12 ldr r3, [sp, #72] ; 0x48 800878a: 429f cmp r7, r3 800878c: f43f af7a beq.w 8008684 <_dtoa_r+0x474> 8008790: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 8008794: 2200 movs r2, #0 8008796: 4b0a ldr r3, [pc, #40] ; (80087c0 <_dtoa_r+0x5b0>) 8008798: f7f7 ff0a bl 80005b0 <__aeabi_dmul> 800879c: 2200 movs r2, #0 800879e: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 80087a2: e9dd 0104 ldrd r0, r1, [sp, #16] 80087a6: 4b06 ldr r3, [pc, #24] ; (80087c0 <_dtoa_r+0x5b0>) 80087a8: f7f7 ff02 bl 80005b0 <__aeabi_dmul> 80087ac: e9cd 0104 strd r0, r1, [sp, #16] 80087b0: e7c3 b.n 800873a <_dtoa_r+0x52a> 80087b2: bf00 nop 80087b4: 0800b090 .word 0x0800b090 80087b8: 0800b068 .word 0x0800b068 80087bc: 3ff00000 .word 0x3ff00000 80087c0: 40240000 .word 0x40240000 80087c4: 401c0000 .word 0x401c0000 80087c8: 40140000 .word 0x40140000 80087cc: 3fe00000 .word 0x3fe00000 80087d0: 4630 mov r0, r6 80087d2: 4639 mov r1, r7 80087d4: f7f7 feec bl 80005b0 <__aeabi_dmul> 80087d8: 9b12 ldr r3, [sp, #72] ; 0x48 80087da: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40 80087de: 9c08 ldr r4, [sp, #32] 80087e0: 9314 str r3, [sp, #80] ; 0x50 80087e2: e9dd 0104 ldrd r0, r1, [sp, #16] 80087e6: f7f8 f993 bl 8000b10 <__aeabi_d2iz> 80087ea: 9015 str r0, [sp, #84] ; 0x54 80087ec: f7f7 fe76 bl 80004dc <__aeabi_i2d> 80087f0: 4602 mov r2, r0 80087f2: 460b mov r3, r1 80087f4: e9dd 0104 ldrd r0, r1, [sp, #16] 80087f8: f7f7 fd22 bl 8000240 <__aeabi_dsub> 80087fc: 9b15 ldr r3, [sp, #84] ; 0x54 80087fe: 4606 mov r6, r0 8008800: 3330 adds r3, #48 ; 0x30 8008802: f804 3b01 strb.w r3, [r4], #1 8008806: 9b12 ldr r3, [sp, #72] ; 0x48 8008808: 460f mov r7, r1 800880a: 429c cmp r4, r3 800880c: f04f 0200 mov.w r2, #0 8008810: d124 bne.n 800885c <_dtoa_r+0x64c> 8008812: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40 8008816: 4bb3 ldr r3, [pc, #716] ; (8008ae4 <_dtoa_r+0x8d4>) 8008818: f7f7 fd14 bl 8000244 <__adddf3> 800881c: 4602 mov r2, r0 800881e: 460b mov r3, r1 8008820: 4630 mov r0, r6 8008822: 4639 mov r1, r7 8008824: f7f8 f954 bl 8000ad0 <__aeabi_dcmpgt> 8008828: 2800 cmp r0, #0 800882a: d162 bne.n 80088f2 <_dtoa_r+0x6e2> 800882c: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40 8008830: 2000 movs r0, #0 8008832: 49ac ldr r1, [pc, #688] ; (8008ae4 <_dtoa_r+0x8d4>) 8008834: f7f7 fd04 bl 8000240 <__aeabi_dsub> 8008838: 4602 mov r2, r0 800883a: 460b mov r3, r1 800883c: 4630 mov r0, r6 800883e: 4639 mov r1, r7 8008840: f7f8 f928 bl 8000a94 <__aeabi_dcmplt> 8008844: 2800 cmp r0, #0 8008846: f43f af1d beq.w 8008684 <_dtoa_r+0x474> 800884a: 9f14 ldr r7, [sp, #80] ; 0x50 800884c: 1e7b subs r3, r7, #1 800884e: 9314 str r3, [sp, #80] ; 0x50 8008850: f817 3c01 ldrb.w r3, [r7, #-1] 8008854: 2b30 cmp r3, #48 ; 0x30 8008856: d0f8 beq.n 800884a <_dtoa_r+0x63a> 8008858: 46c1 mov r9, r8 800885a: e03a b.n 80088d2 <_dtoa_r+0x6c2> 800885c: 4ba2 ldr r3, [pc, #648] ; (8008ae8 <_dtoa_r+0x8d8>) 800885e: f7f7 fea7 bl 80005b0 <__aeabi_dmul> 8008862: e9cd 0104 strd r0, r1, [sp, #16] 8008866: e7bc b.n 80087e2 <_dtoa_r+0x5d2> 8008868: 9f08 ldr r7, [sp, #32] 800886a: e9dd 2306 ldrd r2, r3, [sp, #24] 800886e: e9dd 0104 ldrd r0, r1, [sp, #16] 8008872: f7f7 ffc7 bl 8000804 <__aeabi_ddiv> 8008876: f7f8 f94b bl 8000b10 <__aeabi_d2iz> 800887a: 4604 mov r4, r0 800887c: f7f7 fe2e bl 80004dc <__aeabi_i2d> 8008880: e9dd 2306 ldrd r2, r3, [sp, #24] 8008884: f7f7 fe94 bl 80005b0 <__aeabi_dmul> 8008888: f104 0630 add.w r6, r4, #48 ; 0x30 800888c: 460b mov r3, r1 800888e: 4602 mov r2, r0 8008890: e9dd 0104 ldrd r0, r1, [sp, #16] 8008894: f7f7 fcd4 bl 8000240 <__aeabi_dsub> 8008898: f807 6b01 strb.w r6, [r7], #1 800889c: 9e08 ldr r6, [sp, #32] 800889e: 9b02 ldr r3, [sp, #8] 80088a0: 1bbe subs r6, r7, r6 80088a2: 42b3 cmp r3, r6 80088a4: d13a bne.n 800891c <_dtoa_r+0x70c> 80088a6: 4602 mov r2, r0 80088a8: 460b mov r3, r1 80088aa: f7f7 fccb bl 8000244 <__adddf3> 80088ae: 4602 mov r2, r0 80088b0: 460b mov r3, r1 80088b2: e9cd 2302 strd r2, r3, [sp, #8] 80088b6: e9dd 2306 ldrd r2, r3, [sp, #24] 80088ba: f7f8 f909 bl 8000ad0 <__aeabi_dcmpgt> 80088be: bb58 cbnz r0, 8008918 <_dtoa_r+0x708> 80088c0: e9dd 2306 ldrd r2, r3, [sp, #24] 80088c4: e9dd 0102 ldrd r0, r1, [sp, #8] 80088c8: f7f8 f8da bl 8000a80 <__aeabi_dcmpeq> 80088cc: b108 cbz r0, 80088d2 <_dtoa_r+0x6c2> 80088ce: 07e1 lsls r1, r4, #31 80088d0: d422 bmi.n 8008918 <_dtoa_r+0x708> 80088d2: 4628 mov r0, r5 80088d4: 4651 mov r1, sl 80088d6: f000 faf5 bl 8008ec4 <_Bfree> 80088da: 2300 movs r3, #0 80088dc: 703b strb r3, [r7, #0] 80088de: 9b24 ldr r3, [sp, #144] ; 0x90 80088e0: f109 0001 add.w r0, r9, #1 80088e4: 6018 str r0, [r3, #0] 80088e6: 9b26 ldr r3, [sp, #152] ; 0x98 80088e8: 2b00 cmp r3, #0 80088ea: f43f acdf beq.w 80082ac <_dtoa_r+0x9c> 80088ee: 601f str r7, [r3, #0] 80088f0: e4dc b.n 80082ac <_dtoa_r+0x9c> 80088f2: 4627 mov r7, r4 80088f4: 463b mov r3, r7 80088f6: 461f mov r7, r3 80088f8: f813 2d01 ldrb.w r2, [r3, #-1]! 80088fc: 2a39 cmp r2, #57 ; 0x39 80088fe: d107 bne.n 8008910 <_dtoa_r+0x700> 8008900: 9a08 ldr r2, [sp, #32] 8008902: 429a cmp r2, r3 8008904: d1f7 bne.n 80088f6 <_dtoa_r+0x6e6> 8008906: 2230 movs r2, #48 ; 0x30 8008908: 9908 ldr r1, [sp, #32] 800890a: f108 0801 add.w r8, r8, #1 800890e: 700a strb r2, [r1, #0] 8008910: 781a ldrb r2, [r3, #0] 8008912: 3201 adds r2, #1 8008914: 701a strb r2, [r3, #0] 8008916: e79f b.n 8008858 <_dtoa_r+0x648> 8008918: 46c8 mov r8, r9 800891a: e7eb b.n 80088f4 <_dtoa_r+0x6e4> 800891c: 2200 movs r2, #0 800891e: 4b72 ldr r3, [pc, #456] ; (8008ae8 <_dtoa_r+0x8d8>) 8008920: f7f7 fe46 bl 80005b0 <__aeabi_dmul> 8008924: 4602 mov r2, r0 8008926: 460b mov r3, r1 8008928: e9cd 2304 strd r2, r3, [sp, #16] 800892c: 2200 movs r2, #0 800892e: 2300 movs r3, #0 8008930: f7f8 f8a6 bl 8000a80 <__aeabi_dcmpeq> 8008934: 2800 cmp r0, #0 8008936: d098 beq.n 800886a <_dtoa_r+0x65a> 8008938: e7cb b.n 80088d2 <_dtoa_r+0x6c2> 800893a: 9a0b ldr r2, [sp, #44] ; 0x2c 800893c: 2a00 cmp r2, #0 800893e: f000 80cd beq.w 8008adc <_dtoa_r+0x8cc> 8008942: 9a22 ldr r2, [sp, #136] ; 0x88 8008944: 2a01 cmp r2, #1 8008946: f300 80af bgt.w 8008aa8 <_dtoa_r+0x898> 800894a: 9a13 ldr r2, [sp, #76] ; 0x4c 800894c: 2a00 cmp r2, #0 800894e: f000 80a7 beq.w 8008aa0 <_dtoa_r+0x890> 8008952: f203 4333 addw r3, r3, #1075 ; 0x433 8008956: 9c0a ldr r4, [sp, #40] ; 0x28 8008958: 9f06 ldr r7, [sp, #24] 800895a: 9a06 ldr r2, [sp, #24] 800895c: 2101 movs r1, #1 800895e: 441a add r2, r3 8008960: 9206 str r2, [sp, #24] 8008962: 9a09 ldr r2, [sp, #36] ; 0x24 8008964: 4628 mov r0, r5 8008966: 441a add r2, r3 8008968: 9209 str r2, [sp, #36] ; 0x24 800896a: f000 fb65 bl 8009038 <__i2b> 800896e: 4606 mov r6, r0 8008970: 2f00 cmp r7, #0 8008972: dd0c ble.n 800898e <_dtoa_r+0x77e> 8008974: 9b09 ldr r3, [sp, #36] ; 0x24 8008976: 2b00 cmp r3, #0 8008978: dd09 ble.n 800898e <_dtoa_r+0x77e> 800897a: 42bb cmp r3, r7 800897c: bfa8 it ge 800897e: 463b movge r3, r7 8008980: 9a06 ldr r2, [sp, #24] 8008982: 1aff subs r7, r7, r3 8008984: 1ad2 subs r2, r2, r3 8008986: 9206 str r2, [sp, #24] 8008988: 9a09 ldr r2, [sp, #36] ; 0x24 800898a: 1ad3 subs r3, r2, r3 800898c: 9309 str r3, [sp, #36] ; 0x24 800898e: 9b0a ldr r3, [sp, #40] ; 0x28 8008990: b1f3 cbz r3, 80089d0 <_dtoa_r+0x7c0> 8008992: 9b0b ldr r3, [sp, #44] ; 0x2c 8008994: 2b00 cmp r3, #0 8008996: f000 80a9 beq.w 8008aec <_dtoa_r+0x8dc> 800899a: 2c00 cmp r4, #0 800899c: dd10 ble.n 80089c0 <_dtoa_r+0x7b0> 800899e: 4631 mov r1, r6 80089a0: 4622 mov r2, r4 80089a2: 4628 mov r0, r5 80089a4: f000 fc02 bl 80091ac <__pow5mult> 80089a8: 4652 mov r2, sl 80089aa: 4601 mov r1, r0 80089ac: 4606 mov r6, r0 80089ae: 4628 mov r0, r5 80089b0: f000 fb58 bl 8009064 <__multiply> 80089b4: 4680 mov r8, r0 80089b6: 4651 mov r1, sl 80089b8: 4628 mov r0, r5 80089ba: f000 fa83 bl 8008ec4 <_Bfree> 80089be: 46c2 mov sl, r8 80089c0: 9b0a ldr r3, [sp, #40] ; 0x28 80089c2: 1b1a subs r2, r3, r4 80089c4: d004 beq.n 80089d0 <_dtoa_r+0x7c0> 80089c6: 4651 mov r1, sl 80089c8: 4628 mov r0, r5 80089ca: f000 fbef bl 80091ac <__pow5mult> 80089ce: 4682 mov sl, r0 80089d0: 2101 movs r1, #1 80089d2: 4628 mov r0, r5 80089d4: f000 fb30 bl 8009038 <__i2b> 80089d8: 9b0e ldr r3, [sp, #56] ; 0x38 80089da: 4604 mov r4, r0 80089dc: 2b00 cmp r3, #0 80089de: f340 8087 ble.w 8008af0 <_dtoa_r+0x8e0> 80089e2: 461a mov r2, r3 80089e4: 4601 mov r1, r0 80089e6: 4628 mov r0, r5 80089e8: f000 fbe0 bl 80091ac <__pow5mult> 80089ec: 9b22 ldr r3, [sp, #136] ; 0x88 80089ee: 4604 mov r4, r0 80089f0: 2b01 cmp r3, #1 80089f2: f340 8080 ble.w 8008af6 <_dtoa_r+0x8e6> 80089f6: f04f 0800 mov.w r8, #0 80089fa: 6923 ldr r3, [r4, #16] 80089fc: eb04 0383 add.w r3, r4, r3, lsl #2 8008a00: 6918 ldr r0, [r3, #16] 8008a02: f000 facb bl 8008f9c <__hi0bits> 8008a06: f1c0 0020 rsb r0, r0, #32 8008a0a: 9b09 ldr r3, [sp, #36] ; 0x24 8008a0c: 4418 add r0, r3 8008a0e: f010 001f ands.w r0, r0, #31 8008a12: f000 8092 beq.w 8008b3a <_dtoa_r+0x92a> 8008a16: f1c0 0320 rsb r3, r0, #32 8008a1a: 2b04 cmp r3, #4 8008a1c: f340 808a ble.w 8008b34 <_dtoa_r+0x924> 8008a20: f1c0 001c rsb r0, r0, #28 8008a24: 9b06 ldr r3, [sp, #24] 8008a26: 4407 add r7, r0 8008a28: 4403 add r3, r0 8008a2a: 9306 str r3, [sp, #24] 8008a2c: 9b09 ldr r3, [sp, #36] ; 0x24 8008a2e: 4403 add r3, r0 8008a30: 9309 str r3, [sp, #36] ; 0x24 8008a32: 9b06 ldr r3, [sp, #24] 8008a34: 2b00 cmp r3, #0 8008a36: dd05 ble.n 8008a44 <_dtoa_r+0x834> 8008a38: 4651 mov r1, sl 8008a3a: 461a mov r2, r3 8008a3c: 4628 mov r0, r5 8008a3e: f000 fc0f bl 8009260 <__lshift> 8008a42: 4682 mov sl, r0 8008a44: 9b09 ldr r3, [sp, #36] ; 0x24 8008a46: 2b00 cmp r3, #0 8008a48: dd05 ble.n 8008a56 <_dtoa_r+0x846> 8008a4a: 4621 mov r1, r4 8008a4c: 461a mov r2, r3 8008a4e: 4628 mov r0, r5 8008a50: f000 fc06 bl 8009260 <__lshift> 8008a54: 4604 mov r4, r0 8008a56: 9b0f ldr r3, [sp, #60] ; 0x3c 8008a58: 2b00 cmp r3, #0 8008a5a: d070 beq.n 8008b3e <_dtoa_r+0x92e> 8008a5c: 4621 mov r1, r4 8008a5e: 4650 mov r0, sl 8008a60: f000 fc6a bl 8009338 <__mcmp> 8008a64: 2800 cmp r0, #0 8008a66: da6a bge.n 8008b3e <_dtoa_r+0x92e> 8008a68: 2300 movs r3, #0 8008a6a: 4651 mov r1, sl 8008a6c: 220a movs r2, #10 8008a6e: 4628 mov r0, r5 8008a70: f000 fa4a bl 8008f08 <__multadd> 8008a74: 9b0b ldr r3, [sp, #44] ; 0x2c 8008a76: 4682 mov sl, r0 8008a78: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff 8008a7c: 2b00 cmp r3, #0 8008a7e: f000 8193 beq.w 8008da8 <_dtoa_r+0xb98> 8008a82: 4631 mov r1, r6 8008a84: 2300 movs r3, #0 8008a86: 220a movs r2, #10 8008a88: 4628 mov r0, r5 8008a8a: f000 fa3d bl 8008f08 <__multadd> 8008a8e: f1bb 0f00 cmp.w fp, #0 8008a92: 4606 mov r6, r0 8008a94: f300 8093 bgt.w 8008bbe <_dtoa_r+0x9ae> 8008a98: 9b22 ldr r3, [sp, #136] ; 0x88 8008a9a: 2b02 cmp r3, #2 8008a9c: dc57 bgt.n 8008b4e <_dtoa_r+0x93e> 8008a9e: e08e b.n 8008bbe <_dtoa_r+0x9ae> 8008aa0: 9b16 ldr r3, [sp, #88] ; 0x58 8008aa2: f1c3 0336 rsb r3, r3, #54 ; 0x36 8008aa6: e756 b.n 8008956 <_dtoa_r+0x746> 8008aa8: 9b02 ldr r3, [sp, #8] 8008aaa: 1e5c subs r4, r3, #1 8008aac: 9b0a ldr r3, [sp, #40] ; 0x28 8008aae: 42a3 cmp r3, r4 8008ab0: bfb7 itett lt 8008ab2: 9b0a ldrlt r3, [sp, #40] ; 0x28 8008ab4: 1b1c subge r4, r3, r4 8008ab6: 1ae2 sublt r2, r4, r3 8008ab8: 9b0e ldrlt r3, [sp, #56] ; 0x38 8008aba: bfbe ittt lt 8008abc: 940a strlt r4, [sp, #40] ; 0x28 8008abe: 189b addlt r3, r3, r2 8008ac0: 930e strlt r3, [sp, #56] ; 0x38 8008ac2: 9b02 ldr r3, [sp, #8] 8008ac4: bfb8 it lt 8008ac6: 2400 movlt r4, #0 8008ac8: 2b00 cmp r3, #0 8008aca: bfbb ittet lt 8008acc: 9b06 ldrlt r3, [sp, #24] 8008ace: 9a02 ldrlt r2, [sp, #8] 8008ad0: 9f06 ldrge r7, [sp, #24] 8008ad2: 1a9f sublt r7, r3, r2 8008ad4: bfac ite ge 8008ad6: 9b02 ldrge r3, [sp, #8] 8008ad8: 2300 movlt r3, #0 8008ada: e73e b.n 800895a <_dtoa_r+0x74a> 8008adc: 9c0a ldr r4, [sp, #40] ; 0x28 8008ade: 9f06 ldr r7, [sp, #24] 8008ae0: 9e0b ldr r6, [sp, #44] ; 0x2c 8008ae2: e745 b.n 8008970 <_dtoa_r+0x760> 8008ae4: 3fe00000 .word 0x3fe00000 8008ae8: 40240000 .word 0x40240000 8008aec: 9a0a ldr r2, [sp, #40] ; 0x28 8008aee: e76a b.n 80089c6 <_dtoa_r+0x7b6> 8008af0: 9b22 ldr r3, [sp, #136] ; 0x88 8008af2: 2b01 cmp r3, #1 8008af4: dc19 bgt.n 8008b2a <_dtoa_r+0x91a> 8008af6: 9b04 ldr r3, [sp, #16] 8008af8: b9bb cbnz r3, 8008b2a <_dtoa_r+0x91a> 8008afa: 9b05 ldr r3, [sp, #20] 8008afc: f3c3 0313 ubfx r3, r3, #0, #20 8008b00: b99b cbnz r3, 8008b2a <_dtoa_r+0x91a> 8008b02: 9b05 ldr r3, [sp, #20] 8008b04: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000 8008b08: 0d1b lsrs r3, r3, #20 8008b0a: 051b lsls r3, r3, #20 8008b0c: b183 cbz r3, 8008b30 <_dtoa_r+0x920> 8008b0e: f04f 0801 mov.w r8, #1 8008b12: 9b06 ldr r3, [sp, #24] 8008b14: 3301 adds r3, #1 8008b16: 9306 str r3, [sp, #24] 8008b18: 9b09 ldr r3, [sp, #36] ; 0x24 8008b1a: 3301 adds r3, #1 8008b1c: 9309 str r3, [sp, #36] ; 0x24 8008b1e: 9b0e ldr r3, [sp, #56] ; 0x38 8008b20: 2b00 cmp r3, #0 8008b22: f47f af6a bne.w 80089fa <_dtoa_r+0x7ea> 8008b26: 2001 movs r0, #1 8008b28: e76f b.n 8008a0a <_dtoa_r+0x7fa> 8008b2a: f04f 0800 mov.w r8, #0 8008b2e: e7f6 b.n 8008b1e <_dtoa_r+0x90e> 8008b30: 4698 mov r8, r3 8008b32: e7f4 b.n 8008b1e <_dtoa_r+0x90e> 8008b34: f43f af7d beq.w 8008a32 <_dtoa_r+0x822> 8008b38: 4618 mov r0, r3 8008b3a: 301c adds r0, #28 8008b3c: e772 b.n 8008a24 <_dtoa_r+0x814> 8008b3e: 9b02 ldr r3, [sp, #8] 8008b40: 2b00 cmp r3, #0 8008b42: dc36 bgt.n 8008bb2 <_dtoa_r+0x9a2> 8008b44: 9b22 ldr r3, [sp, #136] ; 0x88 8008b46: 2b02 cmp r3, #2 8008b48: dd33 ble.n 8008bb2 <_dtoa_r+0x9a2> 8008b4a: f8dd b008 ldr.w fp, [sp, #8] 8008b4e: f1bb 0f00 cmp.w fp, #0 8008b52: d10d bne.n 8008b70 <_dtoa_r+0x960> 8008b54: 4621 mov r1, r4 8008b56: 465b mov r3, fp 8008b58: 2205 movs r2, #5 8008b5a: 4628 mov r0, r5 8008b5c: f000 f9d4 bl 8008f08 <__multadd> 8008b60: 4601 mov r1, r0 8008b62: 4604 mov r4, r0 8008b64: 4650 mov r0, sl 8008b66: f000 fbe7 bl 8009338 <__mcmp> 8008b6a: 2800 cmp r0, #0 8008b6c: f73f adb6 bgt.w 80086dc <_dtoa_r+0x4cc> 8008b70: 9b23 ldr r3, [sp, #140] ; 0x8c 8008b72: 9f08 ldr r7, [sp, #32] 8008b74: ea6f 0903 mvn.w r9, r3 8008b78: f04f 0800 mov.w r8, #0 8008b7c: 4621 mov r1, r4 8008b7e: 4628 mov r0, r5 8008b80: f000 f9a0 bl 8008ec4 <_Bfree> 8008b84: 2e00 cmp r6, #0 8008b86: f43f aea4 beq.w 80088d2 <_dtoa_r+0x6c2> 8008b8a: f1b8 0f00 cmp.w r8, #0 8008b8e: d005 beq.n 8008b9c <_dtoa_r+0x98c> 8008b90: 45b0 cmp r8, r6 8008b92: d003 beq.n 8008b9c <_dtoa_r+0x98c> 8008b94: 4641 mov r1, r8 8008b96: 4628 mov r0, r5 8008b98: f000 f994 bl 8008ec4 <_Bfree> 8008b9c: 4631 mov r1, r6 8008b9e: 4628 mov r0, r5 8008ba0: f000 f990 bl 8008ec4 <_Bfree> 8008ba4: e695 b.n 80088d2 <_dtoa_r+0x6c2> 8008ba6: 2400 movs r4, #0 8008ba8: 4626 mov r6, r4 8008baa: e7e1 b.n 8008b70 <_dtoa_r+0x960> 8008bac: 46c1 mov r9, r8 8008bae: 4626 mov r6, r4 8008bb0: e594 b.n 80086dc <_dtoa_r+0x4cc> 8008bb2: 9b0b ldr r3, [sp, #44] ; 0x2c 8008bb4: f8dd b008 ldr.w fp, [sp, #8] 8008bb8: 2b00 cmp r3, #0 8008bba: f000 80fc beq.w 8008db6 <_dtoa_r+0xba6> 8008bbe: 2f00 cmp r7, #0 8008bc0: dd05 ble.n 8008bce <_dtoa_r+0x9be> 8008bc2: 4631 mov r1, r6 8008bc4: 463a mov r2, r7 8008bc6: 4628 mov r0, r5 8008bc8: f000 fb4a bl 8009260 <__lshift> 8008bcc: 4606 mov r6, r0 8008bce: f1b8 0f00 cmp.w r8, #0 8008bd2: d05c beq.n 8008c8e <_dtoa_r+0xa7e> 8008bd4: 4628 mov r0, r5 8008bd6: 6871 ldr r1, [r6, #4] 8008bd8: f000 f934 bl 8008e44 <_Balloc> 8008bdc: 4607 mov r7, r0 8008bde: b928 cbnz r0, 8008bec <_dtoa_r+0x9dc> 8008be0: 4602 mov r2, r0 8008be2: f240 21ea movw r1, #746 ; 0x2ea 8008be6: 4b7e ldr r3, [pc, #504] ; (8008de0 <_dtoa_r+0xbd0>) 8008be8: f7ff bb26 b.w 8008238 <_dtoa_r+0x28> 8008bec: 6932 ldr r2, [r6, #16] 8008bee: f106 010c add.w r1, r6, #12 8008bf2: 3202 adds r2, #2 8008bf4: 0092 lsls r2, r2, #2 8008bf6: 300c adds r0, #12 8008bf8: f000 f90a bl 8008e10 8008bfc: 2201 movs r2, #1 8008bfe: 4639 mov r1, r7 8008c00: 4628 mov r0, r5 8008c02: f000 fb2d bl 8009260 <__lshift> 8008c06: 46b0 mov r8, r6 8008c08: 4606 mov r6, r0 8008c0a: 9b08 ldr r3, [sp, #32] 8008c0c: 3301 adds r3, #1 8008c0e: 9302 str r3, [sp, #8] 8008c10: 9b08 ldr r3, [sp, #32] 8008c12: 445b add r3, fp 8008c14: 930a str r3, [sp, #40] ; 0x28 8008c16: 9b04 ldr r3, [sp, #16] 8008c18: f003 0301 and.w r3, r3, #1 8008c1c: 9309 str r3, [sp, #36] ; 0x24 8008c1e: 9b02 ldr r3, [sp, #8] 8008c20: 4621 mov r1, r4 8008c22: 4650 mov r0, sl 8008c24: f103 3bff add.w fp, r3, #4294967295 ; 0xffffffff 8008c28: f7ff fa64 bl 80080f4 8008c2c: 4603 mov r3, r0 8008c2e: 4641 mov r1, r8 8008c30: 3330 adds r3, #48 ; 0x30 8008c32: 9004 str r0, [sp, #16] 8008c34: 4650 mov r0, sl 8008c36: 930b str r3, [sp, #44] ; 0x2c 8008c38: f000 fb7e bl 8009338 <__mcmp> 8008c3c: 4632 mov r2, r6 8008c3e: 9006 str r0, [sp, #24] 8008c40: 4621 mov r1, r4 8008c42: 4628 mov r0, r5 8008c44: f000 fb94 bl 8009370 <__mdiff> 8008c48: 68c2 ldr r2, [r0, #12] 8008c4a: 4607 mov r7, r0 8008c4c: 9b0b ldr r3, [sp, #44] ; 0x2c 8008c4e: bb02 cbnz r2, 8008c92 <_dtoa_r+0xa82> 8008c50: 4601 mov r1, r0 8008c52: 4650 mov r0, sl 8008c54: f000 fb70 bl 8009338 <__mcmp> 8008c58: 4602 mov r2, r0 8008c5a: 9b0b ldr r3, [sp, #44] ; 0x2c 8008c5c: 4639 mov r1, r7 8008c5e: 4628 mov r0, r5 8008c60: e9cd 320b strd r3, r2, [sp, #44] ; 0x2c 8008c64: f000 f92e bl 8008ec4 <_Bfree> 8008c68: 9b22 ldr r3, [sp, #136] ; 0x88 8008c6a: 9a0c ldr r2, [sp, #48] ; 0x30 8008c6c: 9f02 ldr r7, [sp, #8] 8008c6e: ea43 0102 orr.w r1, r3, r2 8008c72: 9b09 ldr r3, [sp, #36] ; 0x24 8008c74: 430b orrs r3, r1 8008c76: 9b0b ldr r3, [sp, #44] ; 0x2c 8008c78: d10d bne.n 8008c96 <_dtoa_r+0xa86> 8008c7a: 2b39 cmp r3, #57 ; 0x39 8008c7c: d027 beq.n 8008cce <_dtoa_r+0xabe> 8008c7e: 9a06 ldr r2, [sp, #24] 8008c80: 2a00 cmp r2, #0 8008c82: dd01 ble.n 8008c88 <_dtoa_r+0xa78> 8008c84: 9b04 ldr r3, [sp, #16] 8008c86: 3331 adds r3, #49 ; 0x31 8008c88: f88b 3000 strb.w r3, [fp] 8008c8c: e776 b.n 8008b7c <_dtoa_r+0x96c> 8008c8e: 4630 mov r0, r6 8008c90: e7b9 b.n 8008c06 <_dtoa_r+0x9f6> 8008c92: 2201 movs r2, #1 8008c94: e7e2 b.n 8008c5c <_dtoa_r+0xa4c> 8008c96: 9906 ldr r1, [sp, #24] 8008c98: 2900 cmp r1, #0 8008c9a: db04 blt.n 8008ca6 <_dtoa_r+0xa96> 8008c9c: 9822 ldr r0, [sp, #136] ; 0x88 8008c9e: 4301 orrs r1, r0 8008ca0: 9809 ldr r0, [sp, #36] ; 0x24 8008ca2: 4301 orrs r1, r0 8008ca4: d120 bne.n 8008ce8 <_dtoa_r+0xad8> 8008ca6: 2a00 cmp r2, #0 8008ca8: ddee ble.n 8008c88 <_dtoa_r+0xa78> 8008caa: 4651 mov r1, sl 8008cac: 2201 movs r2, #1 8008cae: 4628 mov r0, r5 8008cb0: 9302 str r3, [sp, #8] 8008cb2: f000 fad5 bl 8009260 <__lshift> 8008cb6: 4621 mov r1, r4 8008cb8: 4682 mov sl, r0 8008cba: f000 fb3d bl 8009338 <__mcmp> 8008cbe: 2800 cmp r0, #0 8008cc0: 9b02 ldr r3, [sp, #8] 8008cc2: dc02 bgt.n 8008cca <_dtoa_r+0xaba> 8008cc4: d1e0 bne.n 8008c88 <_dtoa_r+0xa78> 8008cc6: 07da lsls r2, r3, #31 8008cc8: d5de bpl.n 8008c88 <_dtoa_r+0xa78> 8008cca: 2b39 cmp r3, #57 ; 0x39 8008ccc: d1da bne.n 8008c84 <_dtoa_r+0xa74> 8008cce: 2339 movs r3, #57 ; 0x39 8008cd0: f88b 3000 strb.w r3, [fp] 8008cd4: 463b mov r3, r7 8008cd6: 461f mov r7, r3 8008cd8: f817 2c01 ldrb.w r2, [r7, #-1] 8008cdc: 3b01 subs r3, #1 8008cde: 2a39 cmp r2, #57 ; 0x39 8008ce0: d050 beq.n 8008d84 <_dtoa_r+0xb74> 8008ce2: 3201 adds r2, #1 8008ce4: 701a strb r2, [r3, #0] 8008ce6: e749 b.n 8008b7c <_dtoa_r+0x96c> 8008ce8: 2a00 cmp r2, #0 8008cea: dd03 ble.n 8008cf4 <_dtoa_r+0xae4> 8008cec: 2b39 cmp r3, #57 ; 0x39 8008cee: d0ee beq.n 8008cce <_dtoa_r+0xabe> 8008cf0: 3301 adds r3, #1 8008cf2: e7c9 b.n 8008c88 <_dtoa_r+0xa78> 8008cf4: 9a02 ldr r2, [sp, #8] 8008cf6: 990a ldr r1, [sp, #40] ; 0x28 8008cf8: f802 3c01 strb.w r3, [r2, #-1] 8008cfc: 428a cmp r2, r1 8008cfe: d02a beq.n 8008d56 <_dtoa_r+0xb46> 8008d00: 4651 mov r1, sl 8008d02: 2300 movs r3, #0 8008d04: 220a movs r2, #10 8008d06: 4628 mov r0, r5 8008d08: f000 f8fe bl 8008f08 <__multadd> 8008d0c: 45b0 cmp r8, r6 8008d0e: 4682 mov sl, r0 8008d10: f04f 0300 mov.w r3, #0 8008d14: f04f 020a mov.w r2, #10 8008d18: 4641 mov r1, r8 8008d1a: 4628 mov r0, r5 8008d1c: d107 bne.n 8008d2e <_dtoa_r+0xb1e> 8008d1e: f000 f8f3 bl 8008f08 <__multadd> 8008d22: 4680 mov r8, r0 8008d24: 4606 mov r6, r0 8008d26: 9b02 ldr r3, [sp, #8] 8008d28: 3301 adds r3, #1 8008d2a: 9302 str r3, [sp, #8] 8008d2c: e777 b.n 8008c1e <_dtoa_r+0xa0e> 8008d2e: f000 f8eb bl 8008f08 <__multadd> 8008d32: 4631 mov r1, r6 8008d34: 4680 mov r8, r0 8008d36: 2300 movs r3, #0 8008d38: 220a movs r2, #10 8008d3a: 4628 mov r0, r5 8008d3c: f000 f8e4 bl 8008f08 <__multadd> 8008d40: 4606 mov r6, r0 8008d42: e7f0 b.n 8008d26 <_dtoa_r+0xb16> 8008d44: f1bb 0f00 cmp.w fp, #0 8008d48: bfcc ite gt 8008d4a: 465f movgt r7, fp 8008d4c: 2701 movle r7, #1 8008d4e: f04f 0800 mov.w r8, #0 8008d52: 9a08 ldr r2, [sp, #32] 8008d54: 4417 add r7, r2 8008d56: 4651 mov r1, sl 8008d58: 2201 movs r2, #1 8008d5a: 4628 mov r0, r5 8008d5c: 9302 str r3, [sp, #8] 8008d5e: f000 fa7f bl 8009260 <__lshift> 8008d62: 4621 mov r1, r4 8008d64: 4682 mov sl, r0 8008d66: f000 fae7 bl 8009338 <__mcmp> 8008d6a: 2800 cmp r0, #0 8008d6c: dcb2 bgt.n 8008cd4 <_dtoa_r+0xac4> 8008d6e: d102 bne.n 8008d76 <_dtoa_r+0xb66> 8008d70: 9b02 ldr r3, [sp, #8] 8008d72: 07db lsls r3, r3, #31 8008d74: d4ae bmi.n 8008cd4 <_dtoa_r+0xac4> 8008d76: 463b mov r3, r7 8008d78: 461f mov r7, r3 8008d7a: f813 2d01 ldrb.w r2, [r3, #-1]! 8008d7e: 2a30 cmp r2, #48 ; 0x30 8008d80: d0fa beq.n 8008d78 <_dtoa_r+0xb68> 8008d82: e6fb b.n 8008b7c <_dtoa_r+0x96c> 8008d84: 9a08 ldr r2, [sp, #32] 8008d86: 429a cmp r2, r3 8008d88: d1a5 bne.n 8008cd6 <_dtoa_r+0xac6> 8008d8a: 2331 movs r3, #49 ; 0x31 8008d8c: f109 0901 add.w r9, r9, #1 8008d90: 7013 strb r3, [r2, #0] 8008d92: e6f3 b.n 8008b7c <_dtoa_r+0x96c> 8008d94: 4b13 ldr r3, [pc, #76] ; (8008de4 <_dtoa_r+0xbd4>) 8008d96: f7ff baa7 b.w 80082e8 <_dtoa_r+0xd8> 8008d9a: 9b26 ldr r3, [sp, #152] ; 0x98 8008d9c: 2b00 cmp r3, #0 8008d9e: f47f aa80 bne.w 80082a2 <_dtoa_r+0x92> 8008da2: 4b11 ldr r3, [pc, #68] ; (8008de8 <_dtoa_r+0xbd8>) 8008da4: f7ff baa0 b.w 80082e8 <_dtoa_r+0xd8> 8008da8: f1bb 0f00 cmp.w fp, #0 8008dac: dc03 bgt.n 8008db6 <_dtoa_r+0xba6> 8008dae: 9b22 ldr r3, [sp, #136] ; 0x88 8008db0: 2b02 cmp r3, #2 8008db2: f73f aecc bgt.w 8008b4e <_dtoa_r+0x93e> 8008db6: 9f08 ldr r7, [sp, #32] 8008db8: 4621 mov r1, r4 8008dba: 4650 mov r0, sl 8008dbc: f7ff f99a bl 80080f4 8008dc0: 9a08 ldr r2, [sp, #32] 8008dc2: f100 0330 add.w r3, r0, #48 ; 0x30 8008dc6: f807 3b01 strb.w r3, [r7], #1 8008dca: 1aba subs r2, r7, r2 8008dcc: 4593 cmp fp, r2 8008dce: ddb9 ble.n 8008d44 <_dtoa_r+0xb34> 8008dd0: 4651 mov r1, sl 8008dd2: 2300 movs r3, #0 8008dd4: 220a movs r2, #10 8008dd6: 4628 mov r0, r5 8008dd8: f000 f896 bl 8008f08 <__multadd> 8008ddc: 4682 mov sl, r0 8008dde: e7eb b.n 8008db8 <_dtoa_r+0xba8> 8008de0: 0800aff3 .word 0x0800aff3 8008de4: 0800af4c .word 0x0800af4c 8008de8: 0800af70 .word 0x0800af70 08008dec <_localeconv_r>: 8008dec: 4800 ldr r0, [pc, #0] ; (8008df0 <_localeconv_r+0x4>) 8008dee: 4770 bx lr 8008df0: 20000168 .word 0x20000168 08008df4 : 8008df4: 4603 mov r3, r0 8008df6: b510 push {r4, lr} 8008df8: b2c9 uxtb r1, r1 8008dfa: 4402 add r2, r0 8008dfc: 4293 cmp r3, r2 8008dfe: 4618 mov r0, r3 8008e00: d101 bne.n 8008e06 8008e02: 2000 movs r0, #0 8008e04: e003 b.n 8008e0e 8008e06: 7804 ldrb r4, [r0, #0] 8008e08: 3301 adds r3, #1 8008e0a: 428c cmp r4, r1 8008e0c: d1f6 bne.n 8008dfc 8008e0e: bd10 pop {r4, pc} 08008e10 : 8008e10: 440a add r2, r1 8008e12: 4291 cmp r1, r2 8008e14: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff 8008e18: d100 bne.n 8008e1c 8008e1a: 4770 bx lr 8008e1c: b510 push {r4, lr} 8008e1e: f811 4b01 ldrb.w r4, [r1], #1 8008e22: 4291 cmp r1, r2 8008e24: f803 4f01 strb.w r4, [r3, #1]! 8008e28: d1f9 bne.n 8008e1e 8008e2a: bd10 pop {r4, pc} 08008e2c <__malloc_lock>: 8008e2c: 4801 ldr r0, [pc, #4] ; (8008e34 <__malloc_lock+0x8>) 8008e2e: f000 bd26 b.w 800987e <__retarget_lock_acquire_recursive> 8008e32: bf00 nop 8008e34: 20002540 .word 0x20002540 08008e38 <__malloc_unlock>: 8008e38: 4801 ldr r0, [pc, #4] ; (8008e40 <__malloc_unlock+0x8>) 8008e3a: f000 bd21 b.w 8009880 <__retarget_lock_release_recursive> 8008e3e: bf00 nop 8008e40: 20002540 .word 0x20002540 08008e44 <_Balloc>: 8008e44: b570 push {r4, r5, r6, lr} 8008e46: 6a46 ldr r6, [r0, #36] ; 0x24 8008e48: 4604 mov r4, r0 8008e4a: 460d mov r5, r1 8008e4c: b976 cbnz r6, 8008e6c <_Balloc+0x28> 8008e4e: 2010 movs r0, #16 8008e50: f7fe fc02 bl 8007658 8008e54: 4602 mov r2, r0 8008e56: 6260 str r0, [r4, #36] ; 0x24 8008e58: b920 cbnz r0, 8008e64 <_Balloc+0x20> 8008e5a: 2166 movs r1, #102 ; 0x66 8008e5c: 4b17 ldr r3, [pc, #92] ; (8008ebc <_Balloc+0x78>) 8008e5e: 4818 ldr r0, [pc, #96] ; (8008ec0 <_Balloc+0x7c>) 8008e60: f000 fcdc bl 800981c <__assert_func> 8008e64: e9c0 6601 strd r6, r6, [r0, #4] 8008e68: 6006 str r6, [r0, #0] 8008e6a: 60c6 str r6, [r0, #12] 8008e6c: 6a66 ldr r6, [r4, #36] ; 0x24 8008e6e: 68f3 ldr r3, [r6, #12] 8008e70: b183 cbz r3, 8008e94 <_Balloc+0x50> 8008e72: 6a63 ldr r3, [r4, #36] ; 0x24 8008e74: 68db ldr r3, [r3, #12] 8008e76: f853 0025 ldr.w r0, [r3, r5, lsl #2] 8008e7a: b9b8 cbnz r0, 8008eac <_Balloc+0x68> 8008e7c: 2101 movs r1, #1 8008e7e: fa01 f605 lsl.w r6, r1, r5 8008e82: 1d72 adds r2, r6, #5 8008e84: 4620 mov r0, r4 8008e86: 0092 lsls r2, r2, #2 8008e88: f000 fb5e bl 8009548 <_calloc_r> 8008e8c: b160 cbz r0, 8008ea8 <_Balloc+0x64> 8008e8e: e9c0 5601 strd r5, r6, [r0, #4] 8008e92: e00e b.n 8008eb2 <_Balloc+0x6e> 8008e94: 2221 movs r2, #33 ; 0x21 8008e96: 2104 movs r1, #4 8008e98: 4620 mov r0, r4 8008e9a: f000 fb55 bl 8009548 <_calloc_r> 8008e9e: 6a63 ldr r3, [r4, #36] ; 0x24 8008ea0: 60f0 str r0, [r6, #12] 8008ea2: 68db ldr r3, [r3, #12] 8008ea4: 2b00 cmp r3, #0 8008ea6: d1e4 bne.n 8008e72 <_Balloc+0x2e> 8008ea8: 2000 movs r0, #0 8008eaa: bd70 pop {r4, r5, r6, pc} 8008eac: 6802 ldr r2, [r0, #0] 8008eae: f843 2025 str.w r2, [r3, r5, lsl #2] 8008eb2: 2300 movs r3, #0 8008eb4: e9c0 3303 strd r3, r3, [r0, #12] 8008eb8: e7f7 b.n 8008eaa <_Balloc+0x66> 8008eba: bf00 nop 8008ebc: 0800af7d .word 0x0800af7d 8008ec0: 0800b004 .word 0x0800b004 08008ec4 <_Bfree>: 8008ec4: b570 push {r4, r5, r6, lr} 8008ec6: 6a46 ldr r6, [r0, #36] ; 0x24 8008ec8: 4605 mov r5, r0 8008eca: 460c mov r4, r1 8008ecc: b976 cbnz r6, 8008eec <_Bfree+0x28> 8008ece: 2010 movs r0, #16 8008ed0: f7fe fbc2 bl 8007658 8008ed4: 4602 mov r2, r0 8008ed6: 6268 str r0, [r5, #36] ; 0x24 8008ed8: b920 cbnz r0, 8008ee4 <_Bfree+0x20> 8008eda: 218a movs r1, #138 ; 0x8a 8008edc: 4b08 ldr r3, [pc, #32] ; (8008f00 <_Bfree+0x3c>) 8008ede: 4809 ldr r0, [pc, #36] ; (8008f04 <_Bfree+0x40>) 8008ee0: f000 fc9c bl 800981c <__assert_func> 8008ee4: e9c0 6601 strd r6, r6, [r0, #4] 8008ee8: 6006 str r6, [r0, #0] 8008eea: 60c6 str r6, [r0, #12] 8008eec: b13c cbz r4, 8008efe <_Bfree+0x3a> 8008eee: 6a6b ldr r3, [r5, #36] ; 0x24 8008ef0: 6862 ldr r2, [r4, #4] 8008ef2: 68db ldr r3, [r3, #12] 8008ef4: f853 1022 ldr.w r1, [r3, r2, lsl #2] 8008ef8: 6021 str r1, [r4, #0] 8008efa: f843 4022 str.w r4, [r3, r2, lsl #2] 8008efe: bd70 pop {r4, r5, r6, pc} 8008f00: 0800af7d .word 0x0800af7d 8008f04: 0800b004 .word 0x0800b004 08008f08 <__multadd>: 8008f08: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8008f0c: 4698 mov r8, r3 8008f0e: 460c mov r4, r1 8008f10: 2300 movs r3, #0 8008f12: 690e ldr r6, [r1, #16] 8008f14: 4607 mov r7, r0 8008f16: f101 0014 add.w r0, r1, #20 8008f1a: 6805 ldr r5, [r0, #0] 8008f1c: 3301 adds r3, #1 8008f1e: b2a9 uxth r1, r5 8008f20: fb02 8101 mla r1, r2, r1, r8 8008f24: 0c2d lsrs r5, r5, #16 8008f26: ea4f 4c11 mov.w ip, r1, lsr #16 8008f2a: fb02 c505 mla r5, r2, r5, ip 8008f2e: b289 uxth r1, r1 8008f30: eb01 4105 add.w r1, r1, r5, lsl #16 8008f34: 429e cmp r6, r3 8008f36: ea4f 4815 mov.w r8, r5, lsr #16 8008f3a: f840 1b04 str.w r1, [r0], #4 8008f3e: dcec bgt.n 8008f1a <__multadd+0x12> 8008f40: f1b8 0f00 cmp.w r8, #0 8008f44: d022 beq.n 8008f8c <__multadd+0x84> 8008f46: 68a3 ldr r3, [r4, #8] 8008f48: 42b3 cmp r3, r6 8008f4a: dc19 bgt.n 8008f80 <__multadd+0x78> 8008f4c: 6861 ldr r1, [r4, #4] 8008f4e: 4638 mov r0, r7 8008f50: 3101 adds r1, #1 8008f52: f7ff ff77 bl 8008e44 <_Balloc> 8008f56: 4605 mov r5, r0 8008f58: b928 cbnz r0, 8008f66 <__multadd+0x5e> 8008f5a: 4602 mov r2, r0 8008f5c: 21b5 movs r1, #181 ; 0xb5 8008f5e: 4b0d ldr r3, [pc, #52] ; (8008f94 <__multadd+0x8c>) 8008f60: 480d ldr r0, [pc, #52] ; (8008f98 <__multadd+0x90>) 8008f62: f000 fc5b bl 800981c <__assert_func> 8008f66: 6922 ldr r2, [r4, #16] 8008f68: f104 010c add.w r1, r4, #12 8008f6c: 3202 adds r2, #2 8008f6e: 0092 lsls r2, r2, #2 8008f70: 300c adds r0, #12 8008f72: f7ff ff4d bl 8008e10 8008f76: 4621 mov r1, r4 8008f78: 4638 mov r0, r7 8008f7a: f7ff ffa3 bl 8008ec4 <_Bfree> 8008f7e: 462c mov r4, r5 8008f80: eb04 0386 add.w r3, r4, r6, lsl #2 8008f84: 3601 adds r6, #1 8008f86: f8c3 8014 str.w r8, [r3, #20] 8008f8a: 6126 str r6, [r4, #16] 8008f8c: 4620 mov r0, r4 8008f8e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8008f92: bf00 nop 8008f94: 0800aff3 .word 0x0800aff3 8008f98: 0800b004 .word 0x0800b004 08008f9c <__hi0bits>: 8008f9c: 0c02 lsrs r2, r0, #16 8008f9e: 0412 lsls r2, r2, #16 8008fa0: 4603 mov r3, r0 8008fa2: b9ca cbnz r2, 8008fd8 <__hi0bits+0x3c> 8008fa4: 0403 lsls r3, r0, #16 8008fa6: 2010 movs r0, #16 8008fa8: f013 4f7f tst.w r3, #4278190080 ; 0xff000000 8008fac: bf04 itt eq 8008fae: 021b lsleq r3, r3, #8 8008fb0: 3008 addeq r0, #8 8008fb2: f013 4f70 tst.w r3, #4026531840 ; 0xf0000000 8008fb6: bf04 itt eq 8008fb8: 011b lsleq r3, r3, #4 8008fba: 3004 addeq r0, #4 8008fbc: f013 4f40 tst.w r3, #3221225472 ; 0xc0000000 8008fc0: bf04 itt eq 8008fc2: 009b lsleq r3, r3, #2 8008fc4: 3002 addeq r0, #2 8008fc6: 2b00 cmp r3, #0 8008fc8: db05 blt.n 8008fd6 <__hi0bits+0x3a> 8008fca: f013 4f80 tst.w r3, #1073741824 ; 0x40000000 8008fce: f100 0001 add.w r0, r0, #1 8008fd2: bf08 it eq 8008fd4: 2020 moveq r0, #32 8008fd6: 4770 bx lr 8008fd8: 2000 movs r0, #0 8008fda: e7e5 b.n 8008fa8 <__hi0bits+0xc> 08008fdc <__lo0bits>: 8008fdc: 6803 ldr r3, [r0, #0] 8008fde: 4602 mov r2, r0 8008fe0: f013 0007 ands.w r0, r3, #7 8008fe4: d00b beq.n 8008ffe <__lo0bits+0x22> 8008fe6: 07d9 lsls r1, r3, #31 8008fe8: d422 bmi.n 8009030 <__lo0bits+0x54> 8008fea: 0798 lsls r0, r3, #30 8008fec: bf49 itett mi 8008fee: 085b lsrmi r3, r3, #1 8008ff0: 089b lsrpl r3, r3, #2 8008ff2: 2001 movmi r0, #1 8008ff4: 6013 strmi r3, [r2, #0] 8008ff6: bf5c itt pl 8008ff8: 2002 movpl r0, #2 8008ffa: 6013 strpl r3, [r2, #0] 8008ffc: 4770 bx lr 8008ffe: b299 uxth r1, r3 8009000: b909 cbnz r1, 8009006 <__lo0bits+0x2a> 8009002: 2010 movs r0, #16 8009004: 0c1b lsrs r3, r3, #16 8009006: f013 0fff tst.w r3, #255 ; 0xff 800900a: bf04 itt eq 800900c: 0a1b lsreq r3, r3, #8 800900e: 3008 addeq r0, #8 8009010: 0719 lsls r1, r3, #28 8009012: bf04 itt eq 8009014: 091b lsreq r3, r3, #4 8009016: 3004 addeq r0, #4 8009018: 0799 lsls r1, r3, #30 800901a: bf04 itt eq 800901c: 089b lsreq r3, r3, #2 800901e: 3002 addeq r0, #2 8009020: 07d9 lsls r1, r3, #31 8009022: d403 bmi.n 800902c <__lo0bits+0x50> 8009024: 085b lsrs r3, r3, #1 8009026: f100 0001 add.w r0, r0, #1 800902a: d003 beq.n 8009034 <__lo0bits+0x58> 800902c: 6013 str r3, [r2, #0] 800902e: 4770 bx lr 8009030: 2000 movs r0, #0 8009032: 4770 bx lr 8009034: 2020 movs r0, #32 8009036: 4770 bx lr 08009038 <__i2b>: 8009038: b510 push {r4, lr} 800903a: 460c mov r4, r1 800903c: 2101 movs r1, #1 800903e: f7ff ff01 bl 8008e44 <_Balloc> 8009042: 4602 mov r2, r0 8009044: b928 cbnz r0, 8009052 <__i2b+0x1a> 8009046: f44f 71a0 mov.w r1, #320 ; 0x140 800904a: 4b04 ldr r3, [pc, #16] ; (800905c <__i2b+0x24>) 800904c: 4804 ldr r0, [pc, #16] ; (8009060 <__i2b+0x28>) 800904e: f000 fbe5 bl 800981c <__assert_func> 8009052: 2301 movs r3, #1 8009054: 6144 str r4, [r0, #20] 8009056: 6103 str r3, [r0, #16] 8009058: bd10 pop {r4, pc} 800905a: bf00 nop 800905c: 0800aff3 .word 0x0800aff3 8009060: 0800b004 .word 0x0800b004 08009064 <__multiply>: 8009064: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8009068: 4614 mov r4, r2 800906a: 690a ldr r2, [r1, #16] 800906c: 6923 ldr r3, [r4, #16] 800906e: 460d mov r5, r1 8009070: 429a cmp r2, r3 8009072: bfbe ittt lt 8009074: 460b movlt r3, r1 8009076: 4625 movlt r5, r4 8009078: 461c movlt r4, r3 800907a: f8d5 a010 ldr.w sl, [r5, #16] 800907e: f8d4 9010 ldr.w r9, [r4, #16] 8009082: 68ab ldr r3, [r5, #8] 8009084: 6869 ldr r1, [r5, #4] 8009086: eb0a 0709 add.w r7, sl, r9 800908a: 42bb cmp r3, r7 800908c: b085 sub sp, #20 800908e: bfb8 it lt 8009090: 3101 addlt r1, #1 8009092: f7ff fed7 bl 8008e44 <_Balloc> 8009096: b930 cbnz r0, 80090a6 <__multiply+0x42> 8009098: 4602 mov r2, r0 800909a: f240 115d movw r1, #349 ; 0x15d 800909e: 4b41 ldr r3, [pc, #260] ; (80091a4 <__multiply+0x140>) 80090a0: 4841 ldr r0, [pc, #260] ; (80091a8 <__multiply+0x144>) 80090a2: f000 fbbb bl 800981c <__assert_func> 80090a6: f100 0614 add.w r6, r0, #20 80090aa: 4633 mov r3, r6 80090ac: 2200 movs r2, #0 80090ae: eb06 0887 add.w r8, r6, r7, lsl #2 80090b2: 4543 cmp r3, r8 80090b4: d31e bcc.n 80090f4 <__multiply+0x90> 80090b6: f105 0c14 add.w ip, r5, #20 80090ba: f104 0314 add.w r3, r4, #20 80090be: eb0c 0c8a add.w ip, ip, sl, lsl #2 80090c2: eb03 0289 add.w r2, r3, r9, lsl #2 80090c6: 9202 str r2, [sp, #8] 80090c8: ebac 0205 sub.w r2, ip, r5 80090cc: 3a15 subs r2, #21 80090ce: f022 0203 bic.w r2, r2, #3 80090d2: 3204 adds r2, #4 80090d4: f105 0115 add.w r1, r5, #21 80090d8: 458c cmp ip, r1 80090da: bf38 it cc 80090dc: 2204 movcc r2, #4 80090de: 9201 str r2, [sp, #4] 80090e0: 9a02 ldr r2, [sp, #8] 80090e2: 9303 str r3, [sp, #12] 80090e4: 429a cmp r2, r3 80090e6: d808 bhi.n 80090fa <__multiply+0x96> 80090e8: 2f00 cmp r7, #0 80090ea: dc55 bgt.n 8009198 <__multiply+0x134> 80090ec: 6107 str r7, [r0, #16] 80090ee: b005 add sp, #20 80090f0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80090f4: f843 2b04 str.w r2, [r3], #4 80090f8: e7db b.n 80090b2 <__multiply+0x4e> 80090fa: f8b3 a000 ldrh.w sl, [r3] 80090fe: f1ba 0f00 cmp.w sl, #0 8009102: d020 beq.n 8009146 <__multiply+0xe2> 8009104: 46b1 mov r9, r6 8009106: 2200 movs r2, #0 8009108: f105 0e14 add.w lr, r5, #20 800910c: f85e 4b04 ldr.w r4, [lr], #4 8009110: f8d9 b000 ldr.w fp, [r9] 8009114: b2a1 uxth r1, r4 8009116: fa1f fb8b uxth.w fp, fp 800911a: fb0a b101 mla r1, sl, r1, fp 800911e: 4411 add r1, r2 8009120: f8d9 2000 ldr.w r2, [r9] 8009124: 0c24 lsrs r4, r4, #16 8009126: 0c12 lsrs r2, r2, #16 8009128: fb0a 2404 mla r4, sl, r4, r2 800912c: eb04 4411 add.w r4, r4, r1, lsr #16 8009130: b289 uxth r1, r1 8009132: ea41 4104 orr.w r1, r1, r4, lsl #16 8009136: 45f4 cmp ip, lr 8009138: ea4f 4214 mov.w r2, r4, lsr #16 800913c: f849 1b04 str.w r1, [r9], #4 8009140: d8e4 bhi.n 800910c <__multiply+0xa8> 8009142: 9901 ldr r1, [sp, #4] 8009144: 5072 str r2, [r6, r1] 8009146: 9a03 ldr r2, [sp, #12] 8009148: 3304 adds r3, #4 800914a: f8b2 9002 ldrh.w r9, [r2, #2] 800914e: f1b9 0f00 cmp.w r9, #0 8009152: d01f beq.n 8009194 <__multiply+0x130> 8009154: 46b6 mov lr, r6 8009156: f04f 0a00 mov.w sl, #0 800915a: 6834 ldr r4, [r6, #0] 800915c: f105 0114 add.w r1, r5, #20 8009160: 880a ldrh r2, [r1, #0] 8009162: f8be b002 ldrh.w fp, [lr, #2] 8009166: b2a4 uxth r4, r4 8009168: fb09 b202 mla r2, r9, r2, fp 800916c: 4492 add sl, r2 800916e: ea44 440a orr.w r4, r4, sl, lsl #16 8009172: f84e 4b04 str.w r4, [lr], #4 8009176: f851 4b04 ldr.w r4, [r1], #4 800917a: f8be 2000 ldrh.w r2, [lr] 800917e: 0c24 lsrs r4, r4, #16 8009180: fb09 2404 mla r4, r9, r4, r2 8009184: 458c cmp ip, r1 8009186: eb04 441a add.w r4, r4, sl, lsr #16 800918a: ea4f 4a14 mov.w sl, r4, lsr #16 800918e: d8e7 bhi.n 8009160 <__multiply+0xfc> 8009190: 9a01 ldr r2, [sp, #4] 8009192: 50b4 str r4, [r6, r2] 8009194: 3604 adds r6, #4 8009196: e7a3 b.n 80090e0 <__multiply+0x7c> 8009198: f858 3d04 ldr.w r3, [r8, #-4]! 800919c: 2b00 cmp r3, #0 800919e: d1a5 bne.n 80090ec <__multiply+0x88> 80091a0: 3f01 subs r7, #1 80091a2: e7a1 b.n 80090e8 <__multiply+0x84> 80091a4: 0800aff3 .word 0x0800aff3 80091a8: 0800b004 .word 0x0800b004 080091ac <__pow5mult>: 80091ac: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 80091b0: 4615 mov r5, r2 80091b2: f012 0203 ands.w r2, r2, #3 80091b6: 4606 mov r6, r0 80091b8: 460f mov r7, r1 80091ba: d007 beq.n 80091cc <__pow5mult+0x20> 80091bc: 4c25 ldr r4, [pc, #148] ; (8009254 <__pow5mult+0xa8>) 80091be: 3a01 subs r2, #1 80091c0: 2300 movs r3, #0 80091c2: f854 2022 ldr.w r2, [r4, r2, lsl #2] 80091c6: f7ff fe9f bl 8008f08 <__multadd> 80091ca: 4607 mov r7, r0 80091cc: 10ad asrs r5, r5, #2 80091ce: d03d beq.n 800924c <__pow5mult+0xa0> 80091d0: 6a74 ldr r4, [r6, #36] ; 0x24 80091d2: b97c cbnz r4, 80091f4 <__pow5mult+0x48> 80091d4: 2010 movs r0, #16 80091d6: f7fe fa3f bl 8007658 80091da: 4602 mov r2, r0 80091dc: 6270 str r0, [r6, #36] ; 0x24 80091de: b928 cbnz r0, 80091ec <__pow5mult+0x40> 80091e0: f44f 71d7 mov.w r1, #430 ; 0x1ae 80091e4: 4b1c ldr r3, [pc, #112] ; (8009258 <__pow5mult+0xac>) 80091e6: 481d ldr r0, [pc, #116] ; (800925c <__pow5mult+0xb0>) 80091e8: f000 fb18 bl 800981c <__assert_func> 80091ec: e9c0 4401 strd r4, r4, [r0, #4] 80091f0: 6004 str r4, [r0, #0] 80091f2: 60c4 str r4, [r0, #12] 80091f4: f8d6 8024 ldr.w r8, [r6, #36] ; 0x24 80091f8: f8d8 4008 ldr.w r4, [r8, #8] 80091fc: b94c cbnz r4, 8009212 <__pow5mult+0x66> 80091fe: f240 2171 movw r1, #625 ; 0x271 8009202: 4630 mov r0, r6 8009204: f7ff ff18 bl 8009038 <__i2b> 8009208: 2300 movs r3, #0 800920a: 4604 mov r4, r0 800920c: f8c8 0008 str.w r0, [r8, #8] 8009210: 6003 str r3, [r0, #0] 8009212: f04f 0900 mov.w r9, #0 8009216: 07eb lsls r3, r5, #31 8009218: d50a bpl.n 8009230 <__pow5mult+0x84> 800921a: 4639 mov r1, r7 800921c: 4622 mov r2, r4 800921e: 4630 mov r0, r6 8009220: f7ff ff20 bl 8009064 <__multiply> 8009224: 4680 mov r8, r0 8009226: 4639 mov r1, r7 8009228: 4630 mov r0, r6 800922a: f7ff fe4b bl 8008ec4 <_Bfree> 800922e: 4647 mov r7, r8 8009230: 106d asrs r5, r5, #1 8009232: d00b beq.n 800924c <__pow5mult+0xa0> 8009234: 6820 ldr r0, [r4, #0] 8009236: b938 cbnz r0, 8009248 <__pow5mult+0x9c> 8009238: 4622 mov r2, r4 800923a: 4621 mov r1, r4 800923c: 4630 mov r0, r6 800923e: f7ff ff11 bl 8009064 <__multiply> 8009242: 6020 str r0, [r4, #0] 8009244: f8c0 9000 str.w r9, [r0] 8009248: 4604 mov r4, r0 800924a: e7e4 b.n 8009216 <__pow5mult+0x6a> 800924c: 4638 mov r0, r7 800924e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8009252: bf00 nop 8009254: 0800b158 .word 0x0800b158 8009258: 0800af7d .word 0x0800af7d 800925c: 0800b004 .word 0x0800b004 08009260 <__lshift>: 8009260: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8009264: 460c mov r4, r1 8009266: 4607 mov r7, r0 8009268: 4691 mov r9, r2 800926a: 6923 ldr r3, [r4, #16] 800926c: 6849 ldr r1, [r1, #4] 800926e: eb03 1862 add.w r8, r3, r2, asr #5 8009272: 68a3 ldr r3, [r4, #8] 8009274: ea4f 1a62 mov.w sl, r2, asr #5 8009278: f108 0601 add.w r6, r8, #1 800927c: 42b3 cmp r3, r6 800927e: db0b blt.n 8009298 <__lshift+0x38> 8009280: 4638 mov r0, r7 8009282: f7ff fddf bl 8008e44 <_Balloc> 8009286: 4605 mov r5, r0 8009288: b948 cbnz r0, 800929e <__lshift+0x3e> 800928a: 4602 mov r2, r0 800928c: f240 11d9 movw r1, #473 ; 0x1d9 8009290: 4b27 ldr r3, [pc, #156] ; (8009330 <__lshift+0xd0>) 8009292: 4828 ldr r0, [pc, #160] ; (8009334 <__lshift+0xd4>) 8009294: f000 fac2 bl 800981c <__assert_func> 8009298: 3101 adds r1, #1 800929a: 005b lsls r3, r3, #1 800929c: e7ee b.n 800927c <__lshift+0x1c> 800929e: 2300 movs r3, #0 80092a0: f100 0114 add.w r1, r0, #20 80092a4: f100 0210 add.w r2, r0, #16 80092a8: 4618 mov r0, r3 80092aa: 4553 cmp r3, sl 80092ac: db33 blt.n 8009316 <__lshift+0xb6> 80092ae: 6920 ldr r0, [r4, #16] 80092b0: ea2a 7aea bic.w sl, sl, sl, asr #31 80092b4: f104 0314 add.w r3, r4, #20 80092b8: f019 091f ands.w r9, r9, #31 80092bc: eb01 018a add.w r1, r1, sl, lsl #2 80092c0: eb03 0c80 add.w ip, r3, r0, lsl #2 80092c4: d02b beq.n 800931e <__lshift+0xbe> 80092c6: 468a mov sl, r1 80092c8: 2200 movs r2, #0 80092ca: f1c9 0e20 rsb lr, r9, #32 80092ce: 6818 ldr r0, [r3, #0] 80092d0: fa00 f009 lsl.w r0, r0, r9 80092d4: 4302 orrs r2, r0 80092d6: f84a 2b04 str.w r2, [sl], #4 80092da: f853 2b04 ldr.w r2, [r3], #4 80092de: 459c cmp ip, r3 80092e0: fa22 f20e lsr.w r2, r2, lr 80092e4: d8f3 bhi.n 80092ce <__lshift+0x6e> 80092e6: ebac 0304 sub.w r3, ip, r4 80092ea: 3b15 subs r3, #21 80092ec: f023 0303 bic.w r3, r3, #3 80092f0: 3304 adds r3, #4 80092f2: f104 0015 add.w r0, r4, #21 80092f6: 4584 cmp ip, r0 80092f8: bf38 it cc 80092fa: 2304 movcc r3, #4 80092fc: 50ca str r2, [r1, r3] 80092fe: b10a cbz r2, 8009304 <__lshift+0xa4> 8009300: f108 0602 add.w r6, r8, #2 8009304: 3e01 subs r6, #1 8009306: 4638 mov r0, r7 8009308: 4621 mov r1, r4 800930a: 612e str r6, [r5, #16] 800930c: f7ff fdda bl 8008ec4 <_Bfree> 8009310: 4628 mov r0, r5 8009312: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8009316: f842 0f04 str.w r0, [r2, #4]! 800931a: 3301 adds r3, #1 800931c: e7c5 b.n 80092aa <__lshift+0x4a> 800931e: 3904 subs r1, #4 8009320: f853 2b04 ldr.w r2, [r3], #4 8009324: 459c cmp ip, r3 8009326: f841 2f04 str.w r2, [r1, #4]! 800932a: d8f9 bhi.n 8009320 <__lshift+0xc0> 800932c: e7ea b.n 8009304 <__lshift+0xa4> 800932e: bf00 nop 8009330: 0800aff3 .word 0x0800aff3 8009334: 0800b004 .word 0x0800b004 08009338 <__mcmp>: 8009338: 4603 mov r3, r0 800933a: 690a ldr r2, [r1, #16] 800933c: 6900 ldr r0, [r0, #16] 800933e: b530 push {r4, r5, lr} 8009340: 1a80 subs r0, r0, r2 8009342: d10d bne.n 8009360 <__mcmp+0x28> 8009344: 3314 adds r3, #20 8009346: 3114 adds r1, #20 8009348: eb03 0482 add.w r4, r3, r2, lsl #2 800934c: eb01 0182 add.w r1, r1, r2, lsl #2 8009350: f854 5d04 ldr.w r5, [r4, #-4]! 8009354: f851 2d04 ldr.w r2, [r1, #-4]! 8009358: 4295 cmp r5, r2 800935a: d002 beq.n 8009362 <__mcmp+0x2a> 800935c: d304 bcc.n 8009368 <__mcmp+0x30> 800935e: 2001 movs r0, #1 8009360: bd30 pop {r4, r5, pc} 8009362: 42a3 cmp r3, r4 8009364: d3f4 bcc.n 8009350 <__mcmp+0x18> 8009366: e7fb b.n 8009360 <__mcmp+0x28> 8009368: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 800936c: e7f8 b.n 8009360 <__mcmp+0x28> ... 08009370 <__mdiff>: 8009370: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8009374: 460c mov r4, r1 8009376: 4606 mov r6, r0 8009378: 4611 mov r1, r2 800937a: 4620 mov r0, r4 800937c: 4692 mov sl, r2 800937e: f7ff ffdb bl 8009338 <__mcmp> 8009382: 1e05 subs r5, r0, #0 8009384: d111 bne.n 80093aa <__mdiff+0x3a> 8009386: 4629 mov r1, r5 8009388: 4630 mov r0, r6 800938a: f7ff fd5b bl 8008e44 <_Balloc> 800938e: 4602 mov r2, r0 8009390: b928 cbnz r0, 800939e <__mdiff+0x2e> 8009392: f240 2132 movw r1, #562 ; 0x232 8009396: 4b3c ldr r3, [pc, #240] ; (8009488 <__mdiff+0x118>) 8009398: 483c ldr r0, [pc, #240] ; (800948c <__mdiff+0x11c>) 800939a: f000 fa3f bl 800981c <__assert_func> 800939e: 2301 movs r3, #1 80093a0: e9c0 3504 strd r3, r5, [r0, #16] 80093a4: 4610 mov r0, r2 80093a6: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 80093aa: bfa4 itt ge 80093ac: 4653 movge r3, sl 80093ae: 46a2 movge sl, r4 80093b0: 4630 mov r0, r6 80093b2: f8da 1004 ldr.w r1, [sl, #4] 80093b6: bfa6 itte ge 80093b8: 461c movge r4, r3 80093ba: 2500 movge r5, #0 80093bc: 2501 movlt r5, #1 80093be: f7ff fd41 bl 8008e44 <_Balloc> 80093c2: 4602 mov r2, r0 80093c4: b918 cbnz r0, 80093ce <__mdiff+0x5e> 80093c6: f44f 7110 mov.w r1, #576 ; 0x240 80093ca: 4b2f ldr r3, [pc, #188] ; (8009488 <__mdiff+0x118>) 80093cc: e7e4 b.n 8009398 <__mdiff+0x28> 80093ce: f100 0814 add.w r8, r0, #20 80093d2: f8da 7010 ldr.w r7, [sl, #16] 80093d6: 60c5 str r5, [r0, #12] 80093d8: f04f 0c00 mov.w ip, #0 80093dc: f10a 0514 add.w r5, sl, #20 80093e0: f10a 0010 add.w r0, sl, #16 80093e4: 46c2 mov sl, r8 80093e6: 6926 ldr r6, [r4, #16] 80093e8: f104 0914 add.w r9, r4, #20 80093ec: eb05 0e87 add.w lr, r5, r7, lsl #2 80093f0: eb09 0686 add.w r6, r9, r6, lsl #2 80093f4: f850 bf04 ldr.w fp, [r0, #4]! 80093f8: f859 3b04 ldr.w r3, [r9], #4 80093fc: fa1f f18b uxth.w r1, fp 8009400: 4461 add r1, ip 8009402: fa1f fc83 uxth.w ip, r3 8009406: 0c1b lsrs r3, r3, #16 8009408: eba1 010c sub.w r1, r1, ip 800940c: ebc3 431b rsb r3, r3, fp, lsr #16 8009410: eb03 4321 add.w r3, r3, r1, asr #16 8009414: b289 uxth r1, r1 8009416: ea4f 4c23 mov.w ip, r3, asr #16 800941a: 454e cmp r6, r9 800941c: ea41 4303 orr.w r3, r1, r3, lsl #16 8009420: f84a 3b04 str.w r3, [sl], #4 8009424: d8e6 bhi.n 80093f4 <__mdiff+0x84> 8009426: 1b33 subs r3, r6, r4 8009428: 3b15 subs r3, #21 800942a: f023 0303 bic.w r3, r3, #3 800942e: 3415 adds r4, #21 8009430: 3304 adds r3, #4 8009432: 42a6 cmp r6, r4 8009434: bf38 it cc 8009436: 2304 movcc r3, #4 8009438: 441d add r5, r3 800943a: 4443 add r3, r8 800943c: 461e mov r6, r3 800943e: 462c mov r4, r5 8009440: 4574 cmp r4, lr 8009442: d30e bcc.n 8009462 <__mdiff+0xf2> 8009444: f10e 0103 add.w r1, lr, #3 8009448: 1b49 subs r1, r1, r5 800944a: f021 0103 bic.w r1, r1, #3 800944e: 3d03 subs r5, #3 8009450: 45ae cmp lr, r5 8009452: bf38 it cc 8009454: 2100 movcc r1, #0 8009456: 4419 add r1, r3 8009458: f851 3d04 ldr.w r3, [r1, #-4]! 800945c: b18b cbz r3, 8009482 <__mdiff+0x112> 800945e: 6117 str r7, [r2, #16] 8009460: e7a0 b.n 80093a4 <__mdiff+0x34> 8009462: f854 8b04 ldr.w r8, [r4], #4 8009466: fa1f f188 uxth.w r1, r8 800946a: 4461 add r1, ip 800946c: 1408 asrs r0, r1, #16 800946e: eb00 4018 add.w r0, r0, r8, lsr #16 8009472: b289 uxth r1, r1 8009474: ea41 4100 orr.w r1, r1, r0, lsl #16 8009478: ea4f 4c20 mov.w ip, r0, asr #16 800947c: f846 1b04 str.w r1, [r6], #4 8009480: e7de b.n 8009440 <__mdiff+0xd0> 8009482: 3f01 subs r7, #1 8009484: e7e8 b.n 8009458 <__mdiff+0xe8> 8009486: bf00 nop 8009488: 0800aff3 .word 0x0800aff3 800948c: 0800b004 .word 0x0800b004 08009490 <__d2b>: 8009490: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr} 8009494: 2101 movs r1, #1 8009496: e9dd 7608 ldrd r7, r6, [sp, #32] 800949a: 4690 mov r8, r2 800949c: 461d mov r5, r3 800949e: f7ff fcd1 bl 8008e44 <_Balloc> 80094a2: 4604 mov r4, r0 80094a4: b930 cbnz r0, 80094b4 <__d2b+0x24> 80094a6: 4602 mov r2, r0 80094a8: f240 310a movw r1, #778 ; 0x30a 80094ac: 4b24 ldr r3, [pc, #144] ; (8009540 <__d2b+0xb0>) 80094ae: 4825 ldr r0, [pc, #148] ; (8009544 <__d2b+0xb4>) 80094b0: f000 f9b4 bl 800981c <__assert_func> 80094b4: f3c5 0313 ubfx r3, r5, #0, #20 80094b8: f3c5 550a ubfx r5, r5, #20, #11 80094bc: bb2d cbnz r5, 800950a <__d2b+0x7a> 80094be: 9301 str r3, [sp, #4] 80094c0: f1b8 0300 subs.w r3, r8, #0 80094c4: d026 beq.n 8009514 <__d2b+0x84> 80094c6: 4668 mov r0, sp 80094c8: 9300 str r3, [sp, #0] 80094ca: f7ff fd87 bl 8008fdc <__lo0bits> 80094ce: 9900 ldr r1, [sp, #0] 80094d0: b1f0 cbz r0, 8009510 <__d2b+0x80> 80094d2: 9a01 ldr r2, [sp, #4] 80094d4: f1c0 0320 rsb r3, r0, #32 80094d8: fa02 f303 lsl.w r3, r2, r3 80094dc: 430b orrs r3, r1 80094de: 40c2 lsrs r2, r0 80094e0: 6163 str r3, [r4, #20] 80094e2: 9201 str r2, [sp, #4] 80094e4: 9b01 ldr r3, [sp, #4] 80094e6: 2b00 cmp r3, #0 80094e8: bf14 ite ne 80094ea: 2102 movne r1, #2 80094ec: 2101 moveq r1, #1 80094ee: 61a3 str r3, [r4, #24] 80094f0: 6121 str r1, [r4, #16] 80094f2: b1c5 cbz r5, 8009526 <__d2b+0x96> 80094f4: f2a5 4533 subw r5, r5, #1075 ; 0x433 80094f8: 4405 add r5, r0 80094fa: f1c0 0035 rsb r0, r0, #53 ; 0x35 80094fe: 603d str r5, [r7, #0] 8009500: 6030 str r0, [r6, #0] 8009502: 4620 mov r0, r4 8009504: b002 add sp, #8 8009506: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800950a: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 800950e: e7d6 b.n 80094be <__d2b+0x2e> 8009510: 6161 str r1, [r4, #20] 8009512: e7e7 b.n 80094e4 <__d2b+0x54> 8009514: a801 add r0, sp, #4 8009516: f7ff fd61 bl 8008fdc <__lo0bits> 800951a: 2101 movs r1, #1 800951c: 9b01 ldr r3, [sp, #4] 800951e: 6121 str r1, [r4, #16] 8009520: 6163 str r3, [r4, #20] 8009522: 3020 adds r0, #32 8009524: e7e5 b.n 80094f2 <__d2b+0x62> 8009526: eb04 0381 add.w r3, r4, r1, lsl #2 800952a: f2a0 4032 subw r0, r0, #1074 ; 0x432 800952e: 6038 str r0, [r7, #0] 8009530: 6918 ldr r0, [r3, #16] 8009532: f7ff fd33 bl 8008f9c <__hi0bits> 8009536: ebc0 1141 rsb r1, r0, r1, lsl #5 800953a: 6031 str r1, [r6, #0] 800953c: e7e1 b.n 8009502 <__d2b+0x72> 800953e: bf00 nop 8009540: 0800aff3 .word 0x0800aff3 8009544: 0800b004 .word 0x0800b004 08009548 <_calloc_r>: 8009548: b538 push {r3, r4, r5, lr} 800954a: fb02 f501 mul.w r5, r2, r1 800954e: 4629 mov r1, r5 8009550: f7fe f8e6 bl 8007720 <_malloc_r> 8009554: 4604 mov r4, r0 8009556: b118 cbz r0, 8009560 <_calloc_r+0x18> 8009558: 462a mov r2, r5 800955a: 2100 movs r1, #0 800955c: f7fe f88c bl 8007678 8009560: 4620 mov r0, r4 8009562: bd38 pop {r3, r4, r5, pc} 08009564 <__ssputs_r>: 8009564: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8009568: 688e ldr r6, [r1, #8] 800956a: 4682 mov sl, r0 800956c: 429e cmp r6, r3 800956e: 460c mov r4, r1 8009570: 4690 mov r8, r2 8009572: 461f mov r7, r3 8009574: d838 bhi.n 80095e8 <__ssputs_r+0x84> 8009576: 898a ldrh r2, [r1, #12] 8009578: f412 6f90 tst.w r2, #1152 ; 0x480 800957c: d032 beq.n 80095e4 <__ssputs_r+0x80> 800957e: 6825 ldr r5, [r4, #0] 8009580: 6909 ldr r1, [r1, #16] 8009582: 3301 adds r3, #1 8009584: eba5 0901 sub.w r9, r5, r1 8009588: 6965 ldr r5, [r4, #20] 800958a: 444b add r3, r9 800958c: eb05 0545 add.w r5, r5, r5, lsl #1 8009590: eb05 75d5 add.w r5, r5, r5, lsr #31 8009594: 106d asrs r5, r5, #1 8009596: 429d cmp r5, r3 8009598: bf38 it cc 800959a: 461d movcc r5, r3 800959c: 0553 lsls r3, r2, #21 800959e: d531 bpl.n 8009604 <__ssputs_r+0xa0> 80095a0: 4629 mov r1, r5 80095a2: f7fe f8bd bl 8007720 <_malloc_r> 80095a6: 4606 mov r6, r0 80095a8: b950 cbnz r0, 80095c0 <__ssputs_r+0x5c> 80095aa: 230c movs r3, #12 80095ac: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 80095b0: f8ca 3000 str.w r3, [sl] 80095b4: 89a3 ldrh r3, [r4, #12] 80095b6: f043 0340 orr.w r3, r3, #64 ; 0x40 80095ba: 81a3 strh r3, [r4, #12] 80095bc: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80095c0: 464a mov r2, r9 80095c2: 6921 ldr r1, [r4, #16] 80095c4: f7ff fc24 bl 8008e10 80095c8: 89a3 ldrh r3, [r4, #12] 80095ca: f423 6390 bic.w r3, r3, #1152 ; 0x480 80095ce: f043 0380 orr.w r3, r3, #128 ; 0x80 80095d2: 81a3 strh r3, [r4, #12] 80095d4: 6126 str r6, [r4, #16] 80095d6: 444e add r6, r9 80095d8: 6026 str r6, [r4, #0] 80095da: 463e mov r6, r7 80095dc: 6165 str r5, [r4, #20] 80095de: eba5 0509 sub.w r5, r5, r9 80095e2: 60a5 str r5, [r4, #8] 80095e4: 42be cmp r6, r7 80095e6: d900 bls.n 80095ea <__ssputs_r+0x86> 80095e8: 463e mov r6, r7 80095ea: 4632 mov r2, r6 80095ec: 4641 mov r1, r8 80095ee: 6820 ldr r0, [r4, #0] 80095f0: f000 f959 bl 80098a6 80095f4: 68a3 ldr r3, [r4, #8] 80095f6: 6822 ldr r2, [r4, #0] 80095f8: 1b9b subs r3, r3, r6 80095fa: 4432 add r2, r6 80095fc: 2000 movs r0, #0 80095fe: 60a3 str r3, [r4, #8] 8009600: 6022 str r2, [r4, #0] 8009602: e7db b.n 80095bc <__ssputs_r+0x58> 8009604: 462a mov r2, r5 8009606: f000 f968 bl 80098da <_realloc_r> 800960a: 4606 mov r6, r0 800960c: 2800 cmp r0, #0 800960e: d1e1 bne.n 80095d4 <__ssputs_r+0x70> 8009610: 4650 mov r0, sl 8009612: 6921 ldr r1, [r4, #16] 8009614: f7fe f838 bl 8007688 <_free_r> 8009618: e7c7 b.n 80095aa <__ssputs_r+0x46> ... 0800961c <_svfiprintf_r>: 800961c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8009620: 4698 mov r8, r3 8009622: 898b ldrh r3, [r1, #12] 8009624: 4607 mov r7, r0 8009626: 061b lsls r3, r3, #24 8009628: 460d mov r5, r1 800962a: 4614 mov r4, r2 800962c: b09d sub sp, #116 ; 0x74 800962e: d50e bpl.n 800964e <_svfiprintf_r+0x32> 8009630: 690b ldr r3, [r1, #16] 8009632: b963 cbnz r3, 800964e <_svfiprintf_r+0x32> 8009634: 2140 movs r1, #64 ; 0x40 8009636: f7fe f873 bl 8007720 <_malloc_r> 800963a: 6028 str r0, [r5, #0] 800963c: 6128 str r0, [r5, #16] 800963e: b920 cbnz r0, 800964a <_svfiprintf_r+0x2e> 8009640: 230c movs r3, #12 8009642: 603b str r3, [r7, #0] 8009644: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8009648: e0d1 b.n 80097ee <_svfiprintf_r+0x1d2> 800964a: 2340 movs r3, #64 ; 0x40 800964c: 616b str r3, [r5, #20] 800964e: 2300 movs r3, #0 8009650: 9309 str r3, [sp, #36] ; 0x24 8009652: 2320 movs r3, #32 8009654: f88d 3029 strb.w r3, [sp, #41] ; 0x29 8009658: 2330 movs r3, #48 ; 0x30 800965a: f04f 0901 mov.w r9, #1 800965e: f8cd 800c str.w r8, [sp, #12] 8009662: f8df 81a4 ldr.w r8, [pc, #420] ; 8009808 <_svfiprintf_r+0x1ec> 8009666: f88d 302a strb.w r3, [sp, #42] ; 0x2a 800966a: 4623 mov r3, r4 800966c: 469a mov sl, r3 800966e: f813 2b01 ldrb.w r2, [r3], #1 8009672: b10a cbz r2, 8009678 <_svfiprintf_r+0x5c> 8009674: 2a25 cmp r2, #37 ; 0x25 8009676: d1f9 bne.n 800966c <_svfiprintf_r+0x50> 8009678: ebba 0b04 subs.w fp, sl, r4 800967c: d00b beq.n 8009696 <_svfiprintf_r+0x7a> 800967e: 465b mov r3, fp 8009680: 4622 mov r2, r4 8009682: 4629 mov r1, r5 8009684: 4638 mov r0, r7 8009686: f7ff ff6d bl 8009564 <__ssputs_r> 800968a: 3001 adds r0, #1 800968c: f000 80aa beq.w 80097e4 <_svfiprintf_r+0x1c8> 8009690: 9a09 ldr r2, [sp, #36] ; 0x24 8009692: 445a add r2, fp 8009694: 9209 str r2, [sp, #36] ; 0x24 8009696: f89a 3000 ldrb.w r3, [sl] 800969a: 2b00 cmp r3, #0 800969c: f000 80a2 beq.w 80097e4 <_svfiprintf_r+0x1c8> 80096a0: 2300 movs r3, #0 80096a2: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 80096a6: e9cd 2305 strd r2, r3, [sp, #20] 80096aa: f10a 0a01 add.w sl, sl, #1 80096ae: 9304 str r3, [sp, #16] 80096b0: 9307 str r3, [sp, #28] 80096b2: f88d 3053 strb.w r3, [sp, #83] ; 0x53 80096b6: 931a str r3, [sp, #104] ; 0x68 80096b8: 4654 mov r4, sl 80096ba: 2205 movs r2, #5 80096bc: f814 1b01 ldrb.w r1, [r4], #1 80096c0: 4851 ldr r0, [pc, #324] ; (8009808 <_svfiprintf_r+0x1ec>) 80096c2: f7ff fb97 bl 8008df4 80096c6: 9a04 ldr r2, [sp, #16] 80096c8: b9d8 cbnz r0, 8009702 <_svfiprintf_r+0xe6> 80096ca: 06d0 lsls r0, r2, #27 80096cc: bf44 itt mi 80096ce: 2320 movmi r3, #32 80096d0: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 80096d4: 0711 lsls r1, r2, #28 80096d6: bf44 itt mi 80096d8: 232b movmi r3, #43 ; 0x2b 80096da: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 80096de: f89a 3000 ldrb.w r3, [sl] 80096e2: 2b2a cmp r3, #42 ; 0x2a 80096e4: d015 beq.n 8009712 <_svfiprintf_r+0xf6> 80096e6: 4654 mov r4, sl 80096e8: 2000 movs r0, #0 80096ea: f04f 0c0a mov.w ip, #10 80096ee: 9a07 ldr r2, [sp, #28] 80096f0: 4621 mov r1, r4 80096f2: f811 3b01 ldrb.w r3, [r1], #1 80096f6: 3b30 subs r3, #48 ; 0x30 80096f8: 2b09 cmp r3, #9 80096fa: d94e bls.n 800979a <_svfiprintf_r+0x17e> 80096fc: b1b0 cbz r0, 800972c <_svfiprintf_r+0x110> 80096fe: 9207 str r2, [sp, #28] 8009700: e014 b.n 800972c <_svfiprintf_r+0x110> 8009702: eba0 0308 sub.w r3, r0, r8 8009706: fa09 f303 lsl.w r3, r9, r3 800970a: 4313 orrs r3, r2 800970c: 46a2 mov sl, r4 800970e: 9304 str r3, [sp, #16] 8009710: e7d2 b.n 80096b8 <_svfiprintf_r+0x9c> 8009712: 9b03 ldr r3, [sp, #12] 8009714: 1d19 adds r1, r3, #4 8009716: 681b ldr r3, [r3, #0] 8009718: 9103 str r1, [sp, #12] 800971a: 2b00 cmp r3, #0 800971c: bfbb ittet lt 800971e: 425b neglt r3, r3 8009720: f042 0202 orrlt.w r2, r2, #2 8009724: 9307 strge r3, [sp, #28] 8009726: 9307 strlt r3, [sp, #28] 8009728: bfb8 it lt 800972a: 9204 strlt r2, [sp, #16] 800972c: 7823 ldrb r3, [r4, #0] 800972e: 2b2e cmp r3, #46 ; 0x2e 8009730: d10c bne.n 800974c <_svfiprintf_r+0x130> 8009732: 7863 ldrb r3, [r4, #1] 8009734: 2b2a cmp r3, #42 ; 0x2a 8009736: d135 bne.n 80097a4 <_svfiprintf_r+0x188> 8009738: 9b03 ldr r3, [sp, #12] 800973a: 3402 adds r4, #2 800973c: 1d1a adds r2, r3, #4 800973e: 681b ldr r3, [r3, #0] 8009740: 9203 str r2, [sp, #12] 8009742: 2b00 cmp r3, #0 8009744: bfb8 it lt 8009746: f04f 33ff movlt.w r3, #4294967295 ; 0xffffffff 800974a: 9305 str r3, [sp, #20] 800974c: f8df a0c8 ldr.w sl, [pc, #200] ; 8009818 <_svfiprintf_r+0x1fc> 8009750: 2203 movs r2, #3 8009752: 4650 mov r0, sl 8009754: 7821 ldrb r1, [r4, #0] 8009756: f7ff fb4d bl 8008df4 800975a: b140 cbz r0, 800976e <_svfiprintf_r+0x152> 800975c: 2340 movs r3, #64 ; 0x40 800975e: eba0 000a sub.w r0, r0, sl 8009762: fa03 f000 lsl.w r0, r3, r0 8009766: 9b04 ldr r3, [sp, #16] 8009768: 3401 adds r4, #1 800976a: 4303 orrs r3, r0 800976c: 9304 str r3, [sp, #16] 800976e: f814 1b01 ldrb.w r1, [r4], #1 8009772: 2206 movs r2, #6 8009774: 4825 ldr r0, [pc, #148] ; (800980c <_svfiprintf_r+0x1f0>) 8009776: f88d 1028 strb.w r1, [sp, #40] ; 0x28 800977a: f7ff fb3b bl 8008df4 800977e: 2800 cmp r0, #0 8009780: d038 beq.n 80097f4 <_svfiprintf_r+0x1d8> 8009782: 4b23 ldr r3, [pc, #140] ; (8009810 <_svfiprintf_r+0x1f4>) 8009784: bb1b cbnz r3, 80097ce <_svfiprintf_r+0x1b2> 8009786: 9b03 ldr r3, [sp, #12] 8009788: 3307 adds r3, #7 800978a: f023 0307 bic.w r3, r3, #7 800978e: 3308 adds r3, #8 8009790: 9303 str r3, [sp, #12] 8009792: 9b09 ldr r3, [sp, #36] ; 0x24 8009794: 4433 add r3, r6 8009796: 9309 str r3, [sp, #36] ; 0x24 8009798: e767 b.n 800966a <_svfiprintf_r+0x4e> 800979a: 460c mov r4, r1 800979c: 2001 movs r0, #1 800979e: fb0c 3202 mla r2, ip, r2, r3 80097a2: e7a5 b.n 80096f0 <_svfiprintf_r+0xd4> 80097a4: 2300 movs r3, #0 80097a6: f04f 0c0a mov.w ip, #10 80097aa: 4619 mov r1, r3 80097ac: 3401 adds r4, #1 80097ae: 9305 str r3, [sp, #20] 80097b0: 4620 mov r0, r4 80097b2: f810 2b01 ldrb.w r2, [r0], #1 80097b6: 3a30 subs r2, #48 ; 0x30 80097b8: 2a09 cmp r2, #9 80097ba: d903 bls.n 80097c4 <_svfiprintf_r+0x1a8> 80097bc: 2b00 cmp r3, #0 80097be: d0c5 beq.n 800974c <_svfiprintf_r+0x130> 80097c0: 9105 str r1, [sp, #20] 80097c2: e7c3 b.n 800974c <_svfiprintf_r+0x130> 80097c4: 4604 mov r4, r0 80097c6: 2301 movs r3, #1 80097c8: fb0c 2101 mla r1, ip, r1, r2 80097cc: e7f0 b.n 80097b0 <_svfiprintf_r+0x194> 80097ce: ab03 add r3, sp, #12 80097d0: 9300 str r3, [sp, #0] 80097d2: 462a mov r2, r5 80097d4: 4638 mov r0, r7 80097d6: 4b0f ldr r3, [pc, #60] ; (8009814 <_svfiprintf_r+0x1f8>) 80097d8: a904 add r1, sp, #16 80097da: f7fe f899 bl 8007910 <_printf_float> 80097de: 1c42 adds r2, r0, #1 80097e0: 4606 mov r6, r0 80097e2: d1d6 bne.n 8009792 <_svfiprintf_r+0x176> 80097e4: 89ab ldrh r3, [r5, #12] 80097e6: 065b lsls r3, r3, #25 80097e8: f53f af2c bmi.w 8009644 <_svfiprintf_r+0x28> 80097ec: 9809 ldr r0, [sp, #36] ; 0x24 80097ee: b01d add sp, #116 ; 0x74 80097f0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80097f4: ab03 add r3, sp, #12 80097f6: 9300 str r3, [sp, #0] 80097f8: 462a mov r2, r5 80097fa: 4638 mov r0, r7 80097fc: 4b05 ldr r3, [pc, #20] ; (8009814 <_svfiprintf_r+0x1f8>) 80097fe: a904 add r1, sp, #16 8009800: f7fe fb22 bl 8007e48 <_printf_i> 8009804: e7eb b.n 80097de <_svfiprintf_r+0x1c2> 8009806: bf00 nop 8009808: 0800b164 .word 0x0800b164 800980c: 0800b16e .word 0x0800b16e 8009810: 08007911 .word 0x08007911 8009814: 08009565 .word 0x08009565 8009818: 0800b16a .word 0x0800b16a 0800981c <__assert_func>: 800981c: b51f push {r0, r1, r2, r3, r4, lr} 800981e: 4614 mov r4, r2 8009820: 461a mov r2, r3 8009822: 4b09 ldr r3, [pc, #36] ; (8009848 <__assert_func+0x2c>) 8009824: 4605 mov r5, r0 8009826: 681b ldr r3, [r3, #0] 8009828: 68d8 ldr r0, [r3, #12] 800982a: b14c cbz r4, 8009840 <__assert_func+0x24> 800982c: 4b07 ldr r3, [pc, #28] ; (800984c <__assert_func+0x30>) 800982e: e9cd 3401 strd r3, r4, [sp, #4] 8009832: 9100 str r1, [sp, #0] 8009834: 462b mov r3, r5 8009836: 4906 ldr r1, [pc, #24] ; (8009850 <__assert_func+0x34>) 8009838: f000 f80e bl 8009858 800983c: f000 fa98 bl 8009d70 8009840: 4b04 ldr r3, [pc, #16] ; (8009854 <__assert_func+0x38>) 8009842: 461c mov r4, r3 8009844: e7f3 b.n 800982e <__assert_func+0x12> 8009846: bf00 nop 8009848: 20000014 .word 0x20000014 800984c: 0800b175 .word 0x0800b175 8009850: 0800b182 .word 0x0800b182 8009854: 0800b1b0 .word 0x0800b1b0 08009858 : 8009858: b40e push {r1, r2, r3} 800985a: b503 push {r0, r1, lr} 800985c: 4601 mov r1, r0 800985e: ab03 add r3, sp, #12 8009860: 4805 ldr r0, [pc, #20] ; (8009878 ) 8009862: f853 2b04 ldr.w r2, [r3], #4 8009866: 6800 ldr r0, [r0, #0] 8009868: 9301 str r3, [sp, #4] 800986a: f000 f883 bl 8009974 <_vfiprintf_r> 800986e: b002 add sp, #8 8009870: f85d eb04 ldr.w lr, [sp], #4 8009874: b003 add sp, #12 8009876: 4770 bx lr 8009878: 20000014 .word 0x20000014 0800987c <__retarget_lock_init_recursive>: 800987c: 4770 bx lr 0800987e <__retarget_lock_acquire_recursive>: 800987e: 4770 bx lr 08009880 <__retarget_lock_release_recursive>: 8009880: 4770 bx lr 08009882 <__ascii_mbtowc>: 8009882: b082 sub sp, #8 8009884: b901 cbnz r1, 8009888 <__ascii_mbtowc+0x6> 8009886: a901 add r1, sp, #4 8009888: b142 cbz r2, 800989c <__ascii_mbtowc+0x1a> 800988a: b14b cbz r3, 80098a0 <__ascii_mbtowc+0x1e> 800988c: 7813 ldrb r3, [r2, #0] 800988e: 600b str r3, [r1, #0] 8009890: 7812 ldrb r2, [r2, #0] 8009892: 1e10 subs r0, r2, #0 8009894: bf18 it ne 8009896: 2001 movne r0, #1 8009898: b002 add sp, #8 800989a: 4770 bx lr 800989c: 4610 mov r0, r2 800989e: e7fb b.n 8009898 <__ascii_mbtowc+0x16> 80098a0: f06f 0001 mvn.w r0, #1 80098a4: e7f8 b.n 8009898 <__ascii_mbtowc+0x16> 080098a6 : 80098a6: 4288 cmp r0, r1 80098a8: b510 push {r4, lr} 80098aa: eb01 0402 add.w r4, r1, r2 80098ae: d902 bls.n 80098b6 80098b0: 4284 cmp r4, r0 80098b2: 4623 mov r3, r4 80098b4: d807 bhi.n 80098c6 80098b6: 1e43 subs r3, r0, #1 80098b8: 42a1 cmp r1, r4 80098ba: d008 beq.n 80098ce 80098bc: f811 2b01 ldrb.w r2, [r1], #1 80098c0: f803 2f01 strb.w r2, [r3, #1]! 80098c4: e7f8 b.n 80098b8 80098c6: 4601 mov r1, r0 80098c8: 4402 add r2, r0 80098ca: 428a cmp r2, r1 80098cc: d100 bne.n 80098d0 80098ce: bd10 pop {r4, pc} 80098d0: f813 4d01 ldrb.w r4, [r3, #-1]! 80098d4: f802 4d01 strb.w r4, [r2, #-1]! 80098d8: e7f7 b.n 80098ca 080098da <_realloc_r>: 80098da: b5f8 push {r3, r4, r5, r6, r7, lr} 80098dc: 4607 mov r7, r0 80098de: 4614 mov r4, r2 80098e0: 460e mov r6, r1 80098e2: b921 cbnz r1, 80098ee <_realloc_r+0x14> 80098e4: 4611 mov r1, r2 80098e6: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} 80098ea: f7fd bf19 b.w 8007720 <_malloc_r> 80098ee: b922 cbnz r2, 80098fa <_realloc_r+0x20> 80098f0: f7fd feca bl 8007688 <_free_r> 80098f4: 4625 mov r5, r4 80098f6: 4628 mov r0, r5 80098f8: bdf8 pop {r3, r4, r5, r6, r7, pc} 80098fa: f000 fc5d bl 800a1b8 <_malloc_usable_size_r> 80098fe: 42a0 cmp r0, r4 8009900: d20f bcs.n 8009922 <_realloc_r+0x48> 8009902: 4621 mov r1, r4 8009904: 4638 mov r0, r7 8009906: f7fd ff0b bl 8007720 <_malloc_r> 800990a: 4605 mov r5, r0 800990c: 2800 cmp r0, #0 800990e: d0f2 beq.n 80098f6 <_realloc_r+0x1c> 8009910: 4631 mov r1, r6 8009912: 4622 mov r2, r4 8009914: f7ff fa7c bl 8008e10 8009918: 4631 mov r1, r6 800991a: 4638 mov r0, r7 800991c: f7fd feb4 bl 8007688 <_free_r> 8009920: e7e9 b.n 80098f6 <_realloc_r+0x1c> 8009922: 4635 mov r5, r6 8009924: e7e7 b.n 80098f6 <_realloc_r+0x1c> 08009926 <__sfputc_r>: 8009926: 6893 ldr r3, [r2, #8] 8009928: b410 push {r4} 800992a: 3b01 subs r3, #1 800992c: 2b00 cmp r3, #0 800992e: 6093 str r3, [r2, #8] 8009930: da07 bge.n 8009942 <__sfputc_r+0x1c> 8009932: 6994 ldr r4, [r2, #24] 8009934: 42a3 cmp r3, r4 8009936: db01 blt.n 800993c <__sfputc_r+0x16> 8009938: 290a cmp r1, #10 800993a: d102 bne.n 8009942 <__sfputc_r+0x1c> 800993c: bc10 pop {r4} 800993e: f000 b949 b.w 8009bd4 <__swbuf_r> 8009942: 6813 ldr r3, [r2, #0] 8009944: 1c58 adds r0, r3, #1 8009946: 6010 str r0, [r2, #0] 8009948: 7019 strb r1, [r3, #0] 800994a: 4608 mov r0, r1 800994c: bc10 pop {r4} 800994e: 4770 bx lr 08009950 <__sfputs_r>: 8009950: b5f8 push {r3, r4, r5, r6, r7, lr} 8009952: 4606 mov r6, r0 8009954: 460f mov r7, r1 8009956: 4614 mov r4, r2 8009958: 18d5 adds r5, r2, r3 800995a: 42ac cmp r4, r5 800995c: d101 bne.n 8009962 <__sfputs_r+0x12> 800995e: 2000 movs r0, #0 8009960: e007 b.n 8009972 <__sfputs_r+0x22> 8009962: 463a mov r2, r7 8009964: 4630 mov r0, r6 8009966: f814 1b01 ldrb.w r1, [r4], #1 800996a: f7ff ffdc bl 8009926 <__sfputc_r> 800996e: 1c43 adds r3, r0, #1 8009970: d1f3 bne.n 800995a <__sfputs_r+0xa> 8009972: bdf8 pop {r3, r4, r5, r6, r7, pc} 08009974 <_vfiprintf_r>: 8009974: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8009978: 460d mov r5, r1 800997a: 4614 mov r4, r2 800997c: 4698 mov r8, r3 800997e: 4606 mov r6, r0 8009980: b09d sub sp, #116 ; 0x74 8009982: b118 cbz r0, 800998c <_vfiprintf_r+0x18> 8009984: 6983 ldr r3, [r0, #24] 8009986: b90b cbnz r3, 800998c <_vfiprintf_r+0x18> 8009988: f000 fb14 bl 8009fb4 <__sinit> 800998c: 4b89 ldr r3, [pc, #548] ; (8009bb4 <_vfiprintf_r+0x240>) 800998e: 429d cmp r5, r3 8009990: d11b bne.n 80099ca <_vfiprintf_r+0x56> 8009992: 6875 ldr r5, [r6, #4] 8009994: 6e6b ldr r3, [r5, #100] ; 0x64 8009996: 07d9 lsls r1, r3, #31 8009998: d405 bmi.n 80099a6 <_vfiprintf_r+0x32> 800999a: 89ab ldrh r3, [r5, #12] 800999c: 059a lsls r2, r3, #22 800999e: d402 bmi.n 80099a6 <_vfiprintf_r+0x32> 80099a0: 6da8 ldr r0, [r5, #88] ; 0x58 80099a2: f7ff ff6c bl 800987e <__retarget_lock_acquire_recursive> 80099a6: 89ab ldrh r3, [r5, #12] 80099a8: 071b lsls r3, r3, #28 80099aa: d501 bpl.n 80099b0 <_vfiprintf_r+0x3c> 80099ac: 692b ldr r3, [r5, #16] 80099ae: b9eb cbnz r3, 80099ec <_vfiprintf_r+0x78> 80099b0: 4629 mov r1, r5 80099b2: 4630 mov r0, r6 80099b4: f000 f96e bl 8009c94 <__swsetup_r> 80099b8: b1c0 cbz r0, 80099ec <_vfiprintf_r+0x78> 80099ba: 6e6b ldr r3, [r5, #100] ; 0x64 80099bc: 07dc lsls r4, r3, #31 80099be: d50e bpl.n 80099de <_vfiprintf_r+0x6a> 80099c0: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 80099c4: b01d add sp, #116 ; 0x74 80099c6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80099ca: 4b7b ldr r3, [pc, #492] ; (8009bb8 <_vfiprintf_r+0x244>) 80099cc: 429d cmp r5, r3 80099ce: d101 bne.n 80099d4 <_vfiprintf_r+0x60> 80099d0: 68b5 ldr r5, [r6, #8] 80099d2: e7df b.n 8009994 <_vfiprintf_r+0x20> 80099d4: 4b79 ldr r3, [pc, #484] ; (8009bbc <_vfiprintf_r+0x248>) 80099d6: 429d cmp r5, r3 80099d8: bf08 it eq 80099da: 68f5 ldreq r5, [r6, #12] 80099dc: e7da b.n 8009994 <_vfiprintf_r+0x20> 80099de: 89ab ldrh r3, [r5, #12] 80099e0: 0598 lsls r0, r3, #22 80099e2: d4ed bmi.n 80099c0 <_vfiprintf_r+0x4c> 80099e4: 6da8 ldr r0, [r5, #88] ; 0x58 80099e6: f7ff ff4b bl 8009880 <__retarget_lock_release_recursive> 80099ea: e7e9 b.n 80099c0 <_vfiprintf_r+0x4c> 80099ec: 2300 movs r3, #0 80099ee: 9309 str r3, [sp, #36] ; 0x24 80099f0: 2320 movs r3, #32 80099f2: f88d 3029 strb.w r3, [sp, #41] ; 0x29 80099f6: 2330 movs r3, #48 ; 0x30 80099f8: f04f 0901 mov.w r9, #1 80099fc: f8cd 800c str.w r8, [sp, #12] 8009a00: f8df 81bc ldr.w r8, [pc, #444] ; 8009bc0 <_vfiprintf_r+0x24c> 8009a04: f88d 302a strb.w r3, [sp, #42] ; 0x2a 8009a08: 4623 mov r3, r4 8009a0a: 469a mov sl, r3 8009a0c: f813 2b01 ldrb.w r2, [r3], #1 8009a10: b10a cbz r2, 8009a16 <_vfiprintf_r+0xa2> 8009a12: 2a25 cmp r2, #37 ; 0x25 8009a14: d1f9 bne.n 8009a0a <_vfiprintf_r+0x96> 8009a16: ebba 0b04 subs.w fp, sl, r4 8009a1a: d00b beq.n 8009a34 <_vfiprintf_r+0xc0> 8009a1c: 465b mov r3, fp 8009a1e: 4622 mov r2, r4 8009a20: 4629 mov r1, r5 8009a22: 4630 mov r0, r6 8009a24: f7ff ff94 bl 8009950 <__sfputs_r> 8009a28: 3001 adds r0, #1 8009a2a: f000 80aa beq.w 8009b82 <_vfiprintf_r+0x20e> 8009a2e: 9a09 ldr r2, [sp, #36] ; 0x24 8009a30: 445a add r2, fp 8009a32: 9209 str r2, [sp, #36] ; 0x24 8009a34: f89a 3000 ldrb.w r3, [sl] 8009a38: 2b00 cmp r3, #0 8009a3a: f000 80a2 beq.w 8009b82 <_vfiprintf_r+0x20e> 8009a3e: 2300 movs r3, #0 8009a40: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff 8009a44: e9cd 2305 strd r2, r3, [sp, #20] 8009a48: f10a 0a01 add.w sl, sl, #1 8009a4c: 9304 str r3, [sp, #16] 8009a4e: 9307 str r3, [sp, #28] 8009a50: f88d 3053 strb.w r3, [sp, #83] ; 0x53 8009a54: 931a str r3, [sp, #104] ; 0x68 8009a56: 4654 mov r4, sl 8009a58: 2205 movs r2, #5 8009a5a: f814 1b01 ldrb.w r1, [r4], #1 8009a5e: 4858 ldr r0, [pc, #352] ; (8009bc0 <_vfiprintf_r+0x24c>) 8009a60: f7ff f9c8 bl 8008df4 8009a64: 9a04 ldr r2, [sp, #16] 8009a66: b9d8 cbnz r0, 8009aa0 <_vfiprintf_r+0x12c> 8009a68: 06d1 lsls r1, r2, #27 8009a6a: bf44 itt mi 8009a6c: 2320 movmi r3, #32 8009a6e: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 8009a72: 0713 lsls r3, r2, #28 8009a74: bf44 itt mi 8009a76: 232b movmi r3, #43 ; 0x2b 8009a78: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 8009a7c: f89a 3000 ldrb.w r3, [sl] 8009a80: 2b2a cmp r3, #42 ; 0x2a 8009a82: d015 beq.n 8009ab0 <_vfiprintf_r+0x13c> 8009a84: 4654 mov r4, sl 8009a86: 2000 movs r0, #0 8009a88: f04f 0c0a mov.w ip, #10 8009a8c: 9a07 ldr r2, [sp, #28] 8009a8e: 4621 mov r1, r4 8009a90: f811 3b01 ldrb.w r3, [r1], #1 8009a94: 3b30 subs r3, #48 ; 0x30 8009a96: 2b09 cmp r3, #9 8009a98: d94e bls.n 8009b38 <_vfiprintf_r+0x1c4> 8009a9a: b1b0 cbz r0, 8009aca <_vfiprintf_r+0x156> 8009a9c: 9207 str r2, [sp, #28] 8009a9e: e014 b.n 8009aca <_vfiprintf_r+0x156> 8009aa0: eba0 0308 sub.w r3, r0, r8 8009aa4: fa09 f303 lsl.w r3, r9, r3 8009aa8: 4313 orrs r3, r2 8009aaa: 46a2 mov sl, r4 8009aac: 9304 str r3, [sp, #16] 8009aae: e7d2 b.n 8009a56 <_vfiprintf_r+0xe2> 8009ab0: 9b03 ldr r3, [sp, #12] 8009ab2: 1d19 adds r1, r3, #4 8009ab4: 681b ldr r3, [r3, #0] 8009ab6: 9103 str r1, [sp, #12] 8009ab8: 2b00 cmp r3, #0 8009aba: bfbb ittet lt 8009abc: 425b neglt r3, r3 8009abe: f042 0202 orrlt.w r2, r2, #2 8009ac2: 9307 strge r3, [sp, #28] 8009ac4: 9307 strlt r3, [sp, #28] 8009ac6: bfb8 it lt 8009ac8: 9204 strlt r2, [sp, #16] 8009aca: 7823 ldrb r3, [r4, #0] 8009acc: 2b2e cmp r3, #46 ; 0x2e 8009ace: d10c bne.n 8009aea <_vfiprintf_r+0x176> 8009ad0: 7863 ldrb r3, [r4, #1] 8009ad2: 2b2a cmp r3, #42 ; 0x2a 8009ad4: d135 bne.n 8009b42 <_vfiprintf_r+0x1ce> 8009ad6: 9b03 ldr r3, [sp, #12] 8009ad8: 3402 adds r4, #2 8009ada: 1d1a adds r2, r3, #4 8009adc: 681b ldr r3, [r3, #0] 8009ade: 9203 str r2, [sp, #12] 8009ae0: 2b00 cmp r3, #0 8009ae2: bfb8 it lt 8009ae4: f04f 33ff movlt.w r3, #4294967295 ; 0xffffffff 8009ae8: 9305 str r3, [sp, #20] 8009aea: f8df a0e4 ldr.w sl, [pc, #228] ; 8009bd0 <_vfiprintf_r+0x25c> 8009aee: 2203 movs r2, #3 8009af0: 4650 mov r0, sl 8009af2: 7821 ldrb r1, [r4, #0] 8009af4: f7ff f97e bl 8008df4 8009af8: b140 cbz r0, 8009b0c <_vfiprintf_r+0x198> 8009afa: 2340 movs r3, #64 ; 0x40 8009afc: eba0 000a sub.w r0, r0, sl 8009b00: fa03 f000 lsl.w r0, r3, r0 8009b04: 9b04 ldr r3, [sp, #16] 8009b06: 3401 adds r4, #1 8009b08: 4303 orrs r3, r0 8009b0a: 9304 str r3, [sp, #16] 8009b0c: f814 1b01 ldrb.w r1, [r4], #1 8009b10: 2206 movs r2, #6 8009b12: 482c ldr r0, [pc, #176] ; (8009bc4 <_vfiprintf_r+0x250>) 8009b14: f88d 1028 strb.w r1, [sp, #40] ; 0x28 8009b18: f7ff f96c bl 8008df4 8009b1c: 2800 cmp r0, #0 8009b1e: d03f beq.n 8009ba0 <_vfiprintf_r+0x22c> 8009b20: 4b29 ldr r3, [pc, #164] ; (8009bc8 <_vfiprintf_r+0x254>) 8009b22: bb1b cbnz r3, 8009b6c <_vfiprintf_r+0x1f8> 8009b24: 9b03 ldr r3, [sp, #12] 8009b26: 3307 adds r3, #7 8009b28: f023 0307 bic.w r3, r3, #7 8009b2c: 3308 adds r3, #8 8009b2e: 9303 str r3, [sp, #12] 8009b30: 9b09 ldr r3, [sp, #36] ; 0x24 8009b32: 443b add r3, r7 8009b34: 9309 str r3, [sp, #36] ; 0x24 8009b36: e767 b.n 8009a08 <_vfiprintf_r+0x94> 8009b38: 460c mov r4, r1 8009b3a: 2001 movs r0, #1 8009b3c: fb0c 3202 mla r2, ip, r2, r3 8009b40: e7a5 b.n 8009a8e <_vfiprintf_r+0x11a> 8009b42: 2300 movs r3, #0 8009b44: f04f 0c0a mov.w ip, #10 8009b48: 4619 mov r1, r3 8009b4a: 3401 adds r4, #1 8009b4c: 9305 str r3, [sp, #20] 8009b4e: 4620 mov r0, r4 8009b50: f810 2b01 ldrb.w r2, [r0], #1 8009b54: 3a30 subs r2, #48 ; 0x30 8009b56: 2a09 cmp r2, #9 8009b58: d903 bls.n 8009b62 <_vfiprintf_r+0x1ee> 8009b5a: 2b00 cmp r3, #0 8009b5c: d0c5 beq.n 8009aea <_vfiprintf_r+0x176> 8009b5e: 9105 str r1, [sp, #20] 8009b60: e7c3 b.n 8009aea <_vfiprintf_r+0x176> 8009b62: 4604 mov r4, r0 8009b64: 2301 movs r3, #1 8009b66: fb0c 2101 mla r1, ip, r1, r2 8009b6a: e7f0 b.n 8009b4e <_vfiprintf_r+0x1da> 8009b6c: ab03 add r3, sp, #12 8009b6e: 9300 str r3, [sp, #0] 8009b70: 462a mov r2, r5 8009b72: 4630 mov r0, r6 8009b74: 4b15 ldr r3, [pc, #84] ; (8009bcc <_vfiprintf_r+0x258>) 8009b76: a904 add r1, sp, #16 8009b78: f7fd feca bl 8007910 <_printf_float> 8009b7c: 4607 mov r7, r0 8009b7e: 1c78 adds r0, r7, #1 8009b80: d1d6 bne.n 8009b30 <_vfiprintf_r+0x1bc> 8009b82: 6e6b ldr r3, [r5, #100] ; 0x64 8009b84: 07d9 lsls r1, r3, #31 8009b86: d405 bmi.n 8009b94 <_vfiprintf_r+0x220> 8009b88: 89ab ldrh r3, [r5, #12] 8009b8a: 059a lsls r2, r3, #22 8009b8c: d402 bmi.n 8009b94 <_vfiprintf_r+0x220> 8009b8e: 6da8 ldr r0, [r5, #88] ; 0x58 8009b90: f7ff fe76 bl 8009880 <__retarget_lock_release_recursive> 8009b94: 89ab ldrh r3, [r5, #12] 8009b96: 065b lsls r3, r3, #25 8009b98: f53f af12 bmi.w 80099c0 <_vfiprintf_r+0x4c> 8009b9c: 9809 ldr r0, [sp, #36] ; 0x24 8009b9e: e711 b.n 80099c4 <_vfiprintf_r+0x50> 8009ba0: ab03 add r3, sp, #12 8009ba2: 9300 str r3, [sp, #0] 8009ba4: 462a mov r2, r5 8009ba6: 4630 mov r0, r6 8009ba8: 4b08 ldr r3, [pc, #32] ; (8009bcc <_vfiprintf_r+0x258>) 8009baa: a904 add r1, sp, #16 8009bac: f7fe f94c bl 8007e48 <_printf_i> 8009bb0: e7e4 b.n 8009b7c <_vfiprintf_r+0x208> 8009bb2: bf00 nop 8009bb4: 0800b2dc .word 0x0800b2dc 8009bb8: 0800b2fc .word 0x0800b2fc 8009bbc: 0800b2bc .word 0x0800b2bc 8009bc0: 0800b164 .word 0x0800b164 8009bc4: 0800b16e .word 0x0800b16e 8009bc8: 08007911 .word 0x08007911 8009bcc: 08009951 .word 0x08009951 8009bd0: 0800b16a .word 0x0800b16a 08009bd4 <__swbuf_r>: 8009bd4: b5f8 push {r3, r4, r5, r6, r7, lr} 8009bd6: 460e mov r6, r1 8009bd8: 4614 mov r4, r2 8009bda: 4605 mov r5, r0 8009bdc: b118 cbz r0, 8009be6 <__swbuf_r+0x12> 8009bde: 6983 ldr r3, [r0, #24] 8009be0: b90b cbnz r3, 8009be6 <__swbuf_r+0x12> 8009be2: f000 f9e7 bl 8009fb4 <__sinit> 8009be6: 4b21 ldr r3, [pc, #132] ; (8009c6c <__swbuf_r+0x98>) 8009be8: 429c cmp r4, r3 8009bea: d12b bne.n 8009c44 <__swbuf_r+0x70> 8009bec: 686c ldr r4, [r5, #4] 8009bee: 69a3 ldr r3, [r4, #24] 8009bf0: 60a3 str r3, [r4, #8] 8009bf2: 89a3 ldrh r3, [r4, #12] 8009bf4: 071a lsls r2, r3, #28 8009bf6: d52f bpl.n 8009c58 <__swbuf_r+0x84> 8009bf8: 6923 ldr r3, [r4, #16] 8009bfa: b36b cbz r3, 8009c58 <__swbuf_r+0x84> 8009bfc: 6923 ldr r3, [r4, #16] 8009bfe: 6820 ldr r0, [r4, #0] 8009c00: b2f6 uxtb r6, r6 8009c02: 1ac0 subs r0, r0, r3 8009c04: 6963 ldr r3, [r4, #20] 8009c06: 4637 mov r7, r6 8009c08: 4283 cmp r3, r0 8009c0a: dc04 bgt.n 8009c16 <__swbuf_r+0x42> 8009c0c: 4621 mov r1, r4 8009c0e: 4628 mov r0, r5 8009c10: f000 f93c bl 8009e8c <_fflush_r> 8009c14: bb30 cbnz r0, 8009c64 <__swbuf_r+0x90> 8009c16: 68a3 ldr r3, [r4, #8] 8009c18: 3001 adds r0, #1 8009c1a: 3b01 subs r3, #1 8009c1c: 60a3 str r3, [r4, #8] 8009c1e: 6823 ldr r3, [r4, #0] 8009c20: 1c5a adds r2, r3, #1 8009c22: 6022 str r2, [r4, #0] 8009c24: 701e strb r6, [r3, #0] 8009c26: 6963 ldr r3, [r4, #20] 8009c28: 4283 cmp r3, r0 8009c2a: d004 beq.n 8009c36 <__swbuf_r+0x62> 8009c2c: 89a3 ldrh r3, [r4, #12] 8009c2e: 07db lsls r3, r3, #31 8009c30: d506 bpl.n 8009c40 <__swbuf_r+0x6c> 8009c32: 2e0a cmp r6, #10 8009c34: d104 bne.n 8009c40 <__swbuf_r+0x6c> 8009c36: 4621 mov r1, r4 8009c38: 4628 mov r0, r5 8009c3a: f000 f927 bl 8009e8c <_fflush_r> 8009c3e: b988 cbnz r0, 8009c64 <__swbuf_r+0x90> 8009c40: 4638 mov r0, r7 8009c42: bdf8 pop {r3, r4, r5, r6, r7, pc} 8009c44: 4b0a ldr r3, [pc, #40] ; (8009c70 <__swbuf_r+0x9c>) 8009c46: 429c cmp r4, r3 8009c48: d101 bne.n 8009c4e <__swbuf_r+0x7a> 8009c4a: 68ac ldr r4, [r5, #8] 8009c4c: e7cf b.n 8009bee <__swbuf_r+0x1a> 8009c4e: 4b09 ldr r3, [pc, #36] ; (8009c74 <__swbuf_r+0xa0>) 8009c50: 429c cmp r4, r3 8009c52: bf08 it eq 8009c54: 68ec ldreq r4, [r5, #12] 8009c56: e7ca b.n 8009bee <__swbuf_r+0x1a> 8009c58: 4621 mov r1, r4 8009c5a: 4628 mov r0, r5 8009c5c: f000 f81a bl 8009c94 <__swsetup_r> 8009c60: 2800 cmp r0, #0 8009c62: d0cb beq.n 8009bfc <__swbuf_r+0x28> 8009c64: f04f 37ff mov.w r7, #4294967295 ; 0xffffffff 8009c68: e7ea b.n 8009c40 <__swbuf_r+0x6c> 8009c6a: bf00 nop 8009c6c: 0800b2dc .word 0x0800b2dc 8009c70: 0800b2fc .word 0x0800b2fc 8009c74: 0800b2bc .word 0x0800b2bc 08009c78 <__ascii_wctomb>: 8009c78: 4603 mov r3, r0 8009c7a: 4608 mov r0, r1 8009c7c: b141 cbz r1, 8009c90 <__ascii_wctomb+0x18> 8009c7e: 2aff cmp r2, #255 ; 0xff 8009c80: d904 bls.n 8009c8c <__ascii_wctomb+0x14> 8009c82: 228a movs r2, #138 ; 0x8a 8009c84: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8009c88: 601a str r2, [r3, #0] 8009c8a: 4770 bx lr 8009c8c: 2001 movs r0, #1 8009c8e: 700a strb r2, [r1, #0] 8009c90: 4770 bx lr ... 08009c94 <__swsetup_r>: 8009c94: 4b32 ldr r3, [pc, #200] ; (8009d60 <__swsetup_r+0xcc>) 8009c96: b570 push {r4, r5, r6, lr} 8009c98: 681d ldr r5, [r3, #0] 8009c9a: 4606 mov r6, r0 8009c9c: 460c mov r4, r1 8009c9e: b125 cbz r5, 8009caa <__swsetup_r+0x16> 8009ca0: 69ab ldr r3, [r5, #24] 8009ca2: b913 cbnz r3, 8009caa <__swsetup_r+0x16> 8009ca4: 4628 mov r0, r5 8009ca6: f000 f985 bl 8009fb4 <__sinit> 8009caa: 4b2e ldr r3, [pc, #184] ; (8009d64 <__swsetup_r+0xd0>) 8009cac: 429c cmp r4, r3 8009cae: d10f bne.n 8009cd0 <__swsetup_r+0x3c> 8009cb0: 686c ldr r4, [r5, #4] 8009cb2: 89a3 ldrh r3, [r4, #12] 8009cb4: f9b4 200c ldrsh.w r2, [r4, #12] 8009cb8: 0719 lsls r1, r3, #28 8009cba: d42c bmi.n 8009d16 <__swsetup_r+0x82> 8009cbc: 06dd lsls r5, r3, #27 8009cbe: d411 bmi.n 8009ce4 <__swsetup_r+0x50> 8009cc0: 2309 movs r3, #9 8009cc2: 6033 str r3, [r6, #0] 8009cc4: f042 0340 orr.w r3, r2, #64 ; 0x40 8009cc8: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8009ccc: 81a3 strh r3, [r4, #12] 8009cce: e03e b.n 8009d4e <__swsetup_r+0xba> 8009cd0: 4b25 ldr r3, [pc, #148] ; (8009d68 <__swsetup_r+0xd4>) 8009cd2: 429c cmp r4, r3 8009cd4: d101 bne.n 8009cda <__swsetup_r+0x46> 8009cd6: 68ac ldr r4, [r5, #8] 8009cd8: e7eb b.n 8009cb2 <__swsetup_r+0x1e> 8009cda: 4b24 ldr r3, [pc, #144] ; (8009d6c <__swsetup_r+0xd8>) 8009cdc: 429c cmp r4, r3 8009cde: bf08 it eq 8009ce0: 68ec ldreq r4, [r5, #12] 8009ce2: e7e6 b.n 8009cb2 <__swsetup_r+0x1e> 8009ce4: 0758 lsls r0, r3, #29 8009ce6: d512 bpl.n 8009d0e <__swsetup_r+0x7a> 8009ce8: 6b61 ldr r1, [r4, #52] ; 0x34 8009cea: b141 cbz r1, 8009cfe <__swsetup_r+0x6a> 8009cec: f104 0344 add.w r3, r4, #68 ; 0x44 8009cf0: 4299 cmp r1, r3 8009cf2: d002 beq.n 8009cfa <__swsetup_r+0x66> 8009cf4: 4630 mov r0, r6 8009cf6: f7fd fcc7 bl 8007688 <_free_r> 8009cfa: 2300 movs r3, #0 8009cfc: 6363 str r3, [r4, #52] ; 0x34 8009cfe: 89a3 ldrh r3, [r4, #12] 8009d00: f023 0324 bic.w r3, r3, #36 ; 0x24 8009d04: 81a3 strh r3, [r4, #12] 8009d06: 2300 movs r3, #0 8009d08: 6063 str r3, [r4, #4] 8009d0a: 6923 ldr r3, [r4, #16] 8009d0c: 6023 str r3, [r4, #0] 8009d0e: 89a3 ldrh r3, [r4, #12] 8009d10: f043 0308 orr.w r3, r3, #8 8009d14: 81a3 strh r3, [r4, #12] 8009d16: 6923 ldr r3, [r4, #16] 8009d18: b94b cbnz r3, 8009d2e <__swsetup_r+0x9a> 8009d1a: 89a3 ldrh r3, [r4, #12] 8009d1c: f403 7320 and.w r3, r3, #640 ; 0x280 8009d20: f5b3 7f00 cmp.w r3, #512 ; 0x200 8009d24: d003 beq.n 8009d2e <__swsetup_r+0x9a> 8009d26: 4621 mov r1, r4 8009d28: 4630 mov r0, r6 8009d2a: f000 fa05 bl 800a138 <__smakebuf_r> 8009d2e: 89a0 ldrh r0, [r4, #12] 8009d30: f9b4 200c ldrsh.w r2, [r4, #12] 8009d34: f010 0301 ands.w r3, r0, #1 8009d38: d00a beq.n 8009d50 <__swsetup_r+0xbc> 8009d3a: 2300 movs r3, #0 8009d3c: 60a3 str r3, [r4, #8] 8009d3e: 6963 ldr r3, [r4, #20] 8009d40: 425b negs r3, r3 8009d42: 61a3 str r3, [r4, #24] 8009d44: 6923 ldr r3, [r4, #16] 8009d46: b943 cbnz r3, 8009d5a <__swsetup_r+0xc6> 8009d48: f010 0080 ands.w r0, r0, #128 ; 0x80 8009d4c: d1ba bne.n 8009cc4 <__swsetup_r+0x30> 8009d4e: bd70 pop {r4, r5, r6, pc} 8009d50: 0781 lsls r1, r0, #30 8009d52: bf58 it pl 8009d54: 6963 ldrpl r3, [r4, #20] 8009d56: 60a3 str r3, [r4, #8] 8009d58: e7f4 b.n 8009d44 <__swsetup_r+0xb0> 8009d5a: 2000 movs r0, #0 8009d5c: e7f7 b.n 8009d4e <__swsetup_r+0xba> 8009d5e: bf00 nop 8009d60: 20000014 .word 0x20000014 8009d64: 0800b2dc .word 0x0800b2dc 8009d68: 0800b2fc .word 0x0800b2fc 8009d6c: 0800b2bc .word 0x0800b2bc 08009d70 : 8009d70: 2006 movs r0, #6 8009d72: b508 push {r3, lr} 8009d74: f000 fa50 bl 800a218 8009d78: 2001 movs r0, #1 8009d7a: f7f7 fda8 bl 80018ce <_exit> ... 08009d80 <__sflush_r>: 8009d80: 898a ldrh r2, [r1, #12] 8009d82: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8009d86: 4605 mov r5, r0 8009d88: 0710 lsls r0, r2, #28 8009d8a: 460c mov r4, r1 8009d8c: d458 bmi.n 8009e40 <__sflush_r+0xc0> 8009d8e: 684b ldr r3, [r1, #4] 8009d90: 2b00 cmp r3, #0 8009d92: dc05 bgt.n 8009da0 <__sflush_r+0x20> 8009d94: 6c0b ldr r3, [r1, #64] ; 0x40 8009d96: 2b00 cmp r3, #0 8009d98: dc02 bgt.n 8009da0 <__sflush_r+0x20> 8009d9a: 2000 movs r0, #0 8009d9c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8009da0: 6ae6 ldr r6, [r4, #44] ; 0x2c 8009da2: 2e00 cmp r6, #0 8009da4: d0f9 beq.n 8009d9a <__sflush_r+0x1a> 8009da6: 2300 movs r3, #0 8009da8: f412 5280 ands.w r2, r2, #4096 ; 0x1000 8009dac: 682f ldr r7, [r5, #0] 8009dae: 602b str r3, [r5, #0] 8009db0: d032 beq.n 8009e18 <__sflush_r+0x98> 8009db2: 6d60 ldr r0, [r4, #84] ; 0x54 8009db4: 89a3 ldrh r3, [r4, #12] 8009db6: 075a lsls r2, r3, #29 8009db8: d505 bpl.n 8009dc6 <__sflush_r+0x46> 8009dba: 6863 ldr r3, [r4, #4] 8009dbc: 1ac0 subs r0, r0, r3 8009dbe: 6b63 ldr r3, [r4, #52] ; 0x34 8009dc0: b10b cbz r3, 8009dc6 <__sflush_r+0x46> 8009dc2: 6c23 ldr r3, [r4, #64] ; 0x40 8009dc4: 1ac0 subs r0, r0, r3 8009dc6: 2300 movs r3, #0 8009dc8: 4602 mov r2, r0 8009dca: 6ae6 ldr r6, [r4, #44] ; 0x2c 8009dcc: 4628 mov r0, r5 8009dce: 6a21 ldr r1, [r4, #32] 8009dd0: 47b0 blx r6 8009dd2: 1c43 adds r3, r0, #1 8009dd4: 89a3 ldrh r3, [r4, #12] 8009dd6: d106 bne.n 8009de6 <__sflush_r+0x66> 8009dd8: 6829 ldr r1, [r5, #0] 8009dda: 291d cmp r1, #29 8009ddc: d82c bhi.n 8009e38 <__sflush_r+0xb8> 8009dde: 4a2a ldr r2, [pc, #168] ; (8009e88 <__sflush_r+0x108>) 8009de0: 40ca lsrs r2, r1 8009de2: 07d6 lsls r6, r2, #31 8009de4: d528 bpl.n 8009e38 <__sflush_r+0xb8> 8009de6: 2200 movs r2, #0 8009de8: 6062 str r2, [r4, #4] 8009dea: 6922 ldr r2, [r4, #16] 8009dec: 04d9 lsls r1, r3, #19 8009dee: 6022 str r2, [r4, #0] 8009df0: d504 bpl.n 8009dfc <__sflush_r+0x7c> 8009df2: 1c42 adds r2, r0, #1 8009df4: d101 bne.n 8009dfa <__sflush_r+0x7a> 8009df6: 682b ldr r3, [r5, #0] 8009df8: b903 cbnz r3, 8009dfc <__sflush_r+0x7c> 8009dfa: 6560 str r0, [r4, #84] ; 0x54 8009dfc: 6b61 ldr r1, [r4, #52] ; 0x34 8009dfe: 602f str r7, [r5, #0] 8009e00: 2900 cmp r1, #0 8009e02: d0ca beq.n 8009d9a <__sflush_r+0x1a> 8009e04: f104 0344 add.w r3, r4, #68 ; 0x44 8009e08: 4299 cmp r1, r3 8009e0a: d002 beq.n 8009e12 <__sflush_r+0x92> 8009e0c: 4628 mov r0, r5 8009e0e: f7fd fc3b bl 8007688 <_free_r> 8009e12: 2000 movs r0, #0 8009e14: 6360 str r0, [r4, #52] ; 0x34 8009e16: e7c1 b.n 8009d9c <__sflush_r+0x1c> 8009e18: 6a21 ldr r1, [r4, #32] 8009e1a: 2301 movs r3, #1 8009e1c: 4628 mov r0, r5 8009e1e: 47b0 blx r6 8009e20: 1c41 adds r1, r0, #1 8009e22: d1c7 bne.n 8009db4 <__sflush_r+0x34> 8009e24: 682b ldr r3, [r5, #0] 8009e26: 2b00 cmp r3, #0 8009e28: d0c4 beq.n 8009db4 <__sflush_r+0x34> 8009e2a: 2b1d cmp r3, #29 8009e2c: d001 beq.n 8009e32 <__sflush_r+0xb2> 8009e2e: 2b16 cmp r3, #22 8009e30: d101 bne.n 8009e36 <__sflush_r+0xb6> 8009e32: 602f str r7, [r5, #0] 8009e34: e7b1 b.n 8009d9a <__sflush_r+0x1a> 8009e36: 89a3 ldrh r3, [r4, #12] 8009e38: f043 0340 orr.w r3, r3, #64 ; 0x40 8009e3c: 81a3 strh r3, [r4, #12] 8009e3e: e7ad b.n 8009d9c <__sflush_r+0x1c> 8009e40: 690f ldr r7, [r1, #16] 8009e42: 2f00 cmp r7, #0 8009e44: d0a9 beq.n 8009d9a <__sflush_r+0x1a> 8009e46: 0793 lsls r3, r2, #30 8009e48: bf18 it ne 8009e4a: 2300 movne r3, #0 8009e4c: 680e ldr r6, [r1, #0] 8009e4e: bf08 it eq 8009e50: 694b ldreq r3, [r1, #20] 8009e52: eba6 0807 sub.w r8, r6, r7 8009e56: 600f str r7, [r1, #0] 8009e58: 608b str r3, [r1, #8] 8009e5a: f1b8 0f00 cmp.w r8, #0 8009e5e: dd9c ble.n 8009d9a <__sflush_r+0x1a> 8009e60: 4643 mov r3, r8 8009e62: 463a mov r2, r7 8009e64: 4628 mov r0, r5 8009e66: 6a21 ldr r1, [r4, #32] 8009e68: 6aa6 ldr r6, [r4, #40] ; 0x28 8009e6a: 47b0 blx r6 8009e6c: 2800 cmp r0, #0 8009e6e: dc06 bgt.n 8009e7e <__sflush_r+0xfe> 8009e70: 89a3 ldrh r3, [r4, #12] 8009e72: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 8009e76: f043 0340 orr.w r3, r3, #64 ; 0x40 8009e7a: 81a3 strh r3, [r4, #12] 8009e7c: e78e b.n 8009d9c <__sflush_r+0x1c> 8009e7e: 4407 add r7, r0 8009e80: eba8 0800 sub.w r8, r8, r0 8009e84: e7e9 b.n 8009e5a <__sflush_r+0xda> 8009e86: bf00 nop 8009e88: 20400001 .word 0x20400001 08009e8c <_fflush_r>: 8009e8c: b538 push {r3, r4, r5, lr} 8009e8e: 690b ldr r3, [r1, #16] 8009e90: 4605 mov r5, r0 8009e92: 460c mov r4, r1 8009e94: b913 cbnz r3, 8009e9c <_fflush_r+0x10> 8009e96: 2500 movs r5, #0 8009e98: 4628 mov r0, r5 8009e9a: bd38 pop {r3, r4, r5, pc} 8009e9c: b118 cbz r0, 8009ea6 <_fflush_r+0x1a> 8009e9e: 6983 ldr r3, [r0, #24] 8009ea0: b90b cbnz r3, 8009ea6 <_fflush_r+0x1a> 8009ea2: f000 f887 bl 8009fb4 <__sinit> 8009ea6: 4b14 ldr r3, [pc, #80] ; (8009ef8 <_fflush_r+0x6c>) 8009ea8: 429c cmp r4, r3 8009eaa: d11b bne.n 8009ee4 <_fflush_r+0x58> 8009eac: 686c ldr r4, [r5, #4] 8009eae: f9b4 300c ldrsh.w r3, [r4, #12] 8009eb2: 2b00 cmp r3, #0 8009eb4: d0ef beq.n 8009e96 <_fflush_r+0xa> 8009eb6: 6e62 ldr r2, [r4, #100] ; 0x64 8009eb8: 07d0 lsls r0, r2, #31 8009eba: d404 bmi.n 8009ec6 <_fflush_r+0x3a> 8009ebc: 0599 lsls r1, r3, #22 8009ebe: d402 bmi.n 8009ec6 <_fflush_r+0x3a> 8009ec0: 6da0 ldr r0, [r4, #88] ; 0x58 8009ec2: f7ff fcdc bl 800987e <__retarget_lock_acquire_recursive> 8009ec6: 4628 mov r0, r5 8009ec8: 4621 mov r1, r4 8009eca: f7ff ff59 bl 8009d80 <__sflush_r> 8009ece: 6e63 ldr r3, [r4, #100] ; 0x64 8009ed0: 4605 mov r5, r0 8009ed2: 07da lsls r2, r3, #31 8009ed4: d4e0 bmi.n 8009e98 <_fflush_r+0xc> 8009ed6: 89a3 ldrh r3, [r4, #12] 8009ed8: 059b lsls r3, r3, #22 8009eda: d4dd bmi.n 8009e98 <_fflush_r+0xc> 8009edc: 6da0 ldr r0, [r4, #88] ; 0x58 8009ede: f7ff fccf bl 8009880 <__retarget_lock_release_recursive> 8009ee2: e7d9 b.n 8009e98 <_fflush_r+0xc> 8009ee4: 4b05 ldr r3, [pc, #20] ; (8009efc <_fflush_r+0x70>) 8009ee6: 429c cmp r4, r3 8009ee8: d101 bne.n 8009eee <_fflush_r+0x62> 8009eea: 68ac ldr r4, [r5, #8] 8009eec: e7df b.n 8009eae <_fflush_r+0x22> 8009eee: 4b04 ldr r3, [pc, #16] ; (8009f00 <_fflush_r+0x74>) 8009ef0: 429c cmp r4, r3 8009ef2: bf08 it eq 8009ef4: 68ec ldreq r4, [r5, #12] 8009ef6: e7da b.n 8009eae <_fflush_r+0x22> 8009ef8: 0800b2dc .word 0x0800b2dc 8009efc: 0800b2fc .word 0x0800b2fc 8009f00: 0800b2bc .word 0x0800b2bc 08009f04 : 8009f04: 2300 movs r3, #0 8009f06: b510 push {r4, lr} 8009f08: 4604 mov r4, r0 8009f0a: e9c0 3300 strd r3, r3, [r0] 8009f0e: e9c0 3304 strd r3, r3, [r0, #16] 8009f12: 6083 str r3, [r0, #8] 8009f14: 8181 strh r1, [r0, #12] 8009f16: 6643 str r3, [r0, #100] ; 0x64 8009f18: 81c2 strh r2, [r0, #14] 8009f1a: 6183 str r3, [r0, #24] 8009f1c: 4619 mov r1, r3 8009f1e: 2208 movs r2, #8 8009f20: 305c adds r0, #92 ; 0x5c 8009f22: f7fd fba9 bl 8007678 8009f26: 4b05 ldr r3, [pc, #20] ; (8009f3c ) 8009f28: 6224 str r4, [r4, #32] 8009f2a: 6263 str r3, [r4, #36] ; 0x24 8009f2c: 4b04 ldr r3, [pc, #16] ; (8009f40 ) 8009f2e: 62a3 str r3, [r4, #40] ; 0x28 8009f30: 4b04 ldr r3, [pc, #16] ; (8009f44 ) 8009f32: 62e3 str r3, [r4, #44] ; 0x2c 8009f34: 4b04 ldr r3, [pc, #16] ; (8009f48 ) 8009f36: 6323 str r3, [r4, #48] ; 0x30 8009f38: bd10 pop {r4, pc} 8009f3a: bf00 nop 8009f3c: 0800a251 .word 0x0800a251 8009f40: 0800a273 .word 0x0800a273 8009f44: 0800a2ab .word 0x0800a2ab 8009f48: 0800a2cf .word 0x0800a2cf 08009f4c <_cleanup_r>: 8009f4c: 4901 ldr r1, [pc, #4] ; (8009f54 <_cleanup_r+0x8>) 8009f4e: f000 b8af b.w 800a0b0 <_fwalk_reent> 8009f52: bf00 nop 8009f54: 08009e8d .word 0x08009e8d 08009f58 <__sfmoreglue>: 8009f58: b570 push {r4, r5, r6, lr} 8009f5a: 2568 movs r5, #104 ; 0x68 8009f5c: 1e4a subs r2, r1, #1 8009f5e: 4355 muls r5, r2 8009f60: 460e mov r6, r1 8009f62: f105 0174 add.w r1, r5, #116 ; 0x74 8009f66: f7fd fbdb bl 8007720 <_malloc_r> 8009f6a: 4604 mov r4, r0 8009f6c: b140 cbz r0, 8009f80 <__sfmoreglue+0x28> 8009f6e: 2100 movs r1, #0 8009f70: e9c0 1600 strd r1, r6, [r0] 8009f74: 300c adds r0, #12 8009f76: 60a0 str r0, [r4, #8] 8009f78: f105 0268 add.w r2, r5, #104 ; 0x68 8009f7c: f7fd fb7c bl 8007678 8009f80: 4620 mov r0, r4 8009f82: bd70 pop {r4, r5, r6, pc} 08009f84 <__sfp_lock_acquire>: 8009f84: 4801 ldr r0, [pc, #4] ; (8009f8c <__sfp_lock_acquire+0x8>) 8009f86: f7ff bc7a b.w 800987e <__retarget_lock_acquire_recursive> 8009f8a: bf00 nop 8009f8c: 20002544 .word 0x20002544 08009f90 <__sfp_lock_release>: 8009f90: 4801 ldr r0, [pc, #4] ; (8009f98 <__sfp_lock_release+0x8>) 8009f92: f7ff bc75 b.w 8009880 <__retarget_lock_release_recursive> 8009f96: bf00 nop 8009f98: 20002544 .word 0x20002544 08009f9c <__sinit_lock_acquire>: 8009f9c: 4801 ldr r0, [pc, #4] ; (8009fa4 <__sinit_lock_acquire+0x8>) 8009f9e: f7ff bc6e b.w 800987e <__retarget_lock_acquire_recursive> 8009fa2: bf00 nop 8009fa4: 2000253f .word 0x2000253f 08009fa8 <__sinit_lock_release>: 8009fa8: 4801 ldr r0, [pc, #4] ; (8009fb0 <__sinit_lock_release+0x8>) 8009faa: f7ff bc69 b.w 8009880 <__retarget_lock_release_recursive> 8009fae: bf00 nop 8009fb0: 2000253f .word 0x2000253f 08009fb4 <__sinit>: 8009fb4: b510 push {r4, lr} 8009fb6: 4604 mov r4, r0 8009fb8: f7ff fff0 bl 8009f9c <__sinit_lock_acquire> 8009fbc: 69a3 ldr r3, [r4, #24] 8009fbe: b11b cbz r3, 8009fc8 <__sinit+0x14> 8009fc0: e8bd 4010 ldmia.w sp!, {r4, lr} 8009fc4: f7ff bff0 b.w 8009fa8 <__sinit_lock_release> 8009fc8: e9c4 3312 strd r3, r3, [r4, #72] ; 0x48 8009fcc: 6523 str r3, [r4, #80] ; 0x50 8009fce: 4b13 ldr r3, [pc, #76] ; (800a01c <__sinit+0x68>) 8009fd0: 4a13 ldr r2, [pc, #76] ; (800a020 <__sinit+0x6c>) 8009fd2: 681b ldr r3, [r3, #0] 8009fd4: 62a2 str r2, [r4, #40] ; 0x28 8009fd6: 42a3 cmp r3, r4 8009fd8: bf08 it eq 8009fda: 2301 moveq r3, #1 8009fdc: 4620 mov r0, r4 8009fde: bf08 it eq 8009fe0: 61a3 streq r3, [r4, #24] 8009fe2: f000 f81f bl 800a024 <__sfp> 8009fe6: 6060 str r0, [r4, #4] 8009fe8: 4620 mov r0, r4 8009fea: f000 f81b bl 800a024 <__sfp> 8009fee: 60a0 str r0, [r4, #8] 8009ff0: 4620 mov r0, r4 8009ff2: f000 f817 bl 800a024 <__sfp> 8009ff6: 2200 movs r2, #0 8009ff8: 2104 movs r1, #4 8009ffa: 60e0 str r0, [r4, #12] 8009ffc: 6860 ldr r0, [r4, #4] 8009ffe: f7ff ff81 bl 8009f04 800a002: 2201 movs r2, #1 800a004: 2109 movs r1, #9 800a006: 68a0 ldr r0, [r4, #8] 800a008: f7ff ff7c bl 8009f04 800a00c: 2202 movs r2, #2 800a00e: 2112 movs r1, #18 800a010: 68e0 ldr r0, [r4, #12] 800a012: f7ff ff77 bl 8009f04 800a016: 2301 movs r3, #1 800a018: 61a3 str r3, [r4, #24] 800a01a: e7d1 b.n 8009fc0 <__sinit+0xc> 800a01c: 0800af38 .word 0x0800af38 800a020: 08009f4d .word 0x08009f4d 0800a024 <__sfp>: 800a024: b5f8 push {r3, r4, r5, r6, r7, lr} 800a026: 4607 mov r7, r0 800a028: f7ff ffac bl 8009f84 <__sfp_lock_acquire> 800a02c: 4b1e ldr r3, [pc, #120] ; (800a0a8 <__sfp+0x84>) 800a02e: 681e ldr r6, [r3, #0] 800a030: 69b3 ldr r3, [r6, #24] 800a032: b913 cbnz r3, 800a03a <__sfp+0x16> 800a034: 4630 mov r0, r6 800a036: f7ff ffbd bl 8009fb4 <__sinit> 800a03a: 3648 adds r6, #72 ; 0x48 800a03c: e9d6 3401 ldrd r3, r4, [r6, #4] 800a040: 3b01 subs r3, #1 800a042: d503 bpl.n 800a04c <__sfp+0x28> 800a044: 6833 ldr r3, [r6, #0] 800a046: b30b cbz r3, 800a08c <__sfp+0x68> 800a048: 6836 ldr r6, [r6, #0] 800a04a: e7f7 b.n 800a03c <__sfp+0x18> 800a04c: f9b4 500c ldrsh.w r5, [r4, #12] 800a050: b9d5 cbnz r5, 800a088 <__sfp+0x64> 800a052: 4b16 ldr r3, [pc, #88] ; (800a0ac <__sfp+0x88>) 800a054: f104 0058 add.w r0, r4, #88 ; 0x58 800a058: 60e3 str r3, [r4, #12] 800a05a: 6665 str r5, [r4, #100] ; 0x64 800a05c: f7ff fc0e bl 800987c <__retarget_lock_init_recursive> 800a060: f7ff ff96 bl 8009f90 <__sfp_lock_release> 800a064: 2208 movs r2, #8 800a066: 4629 mov r1, r5 800a068: e9c4 5501 strd r5, r5, [r4, #4] 800a06c: e9c4 5504 strd r5, r5, [r4, #16] 800a070: 6025 str r5, [r4, #0] 800a072: 61a5 str r5, [r4, #24] 800a074: f104 005c add.w r0, r4, #92 ; 0x5c 800a078: f7fd fafe bl 8007678 800a07c: e9c4 550d strd r5, r5, [r4, #52] ; 0x34 800a080: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48 800a084: 4620 mov r0, r4 800a086: bdf8 pop {r3, r4, r5, r6, r7, pc} 800a088: 3468 adds r4, #104 ; 0x68 800a08a: e7d9 b.n 800a040 <__sfp+0x1c> 800a08c: 2104 movs r1, #4 800a08e: 4638 mov r0, r7 800a090: f7ff ff62 bl 8009f58 <__sfmoreglue> 800a094: 4604 mov r4, r0 800a096: 6030 str r0, [r6, #0] 800a098: 2800 cmp r0, #0 800a09a: d1d5 bne.n 800a048 <__sfp+0x24> 800a09c: f7ff ff78 bl 8009f90 <__sfp_lock_release> 800a0a0: 230c movs r3, #12 800a0a2: 603b str r3, [r7, #0] 800a0a4: e7ee b.n 800a084 <__sfp+0x60> 800a0a6: bf00 nop 800a0a8: 0800af38 .word 0x0800af38 800a0ac: ffff0001 .word 0xffff0001 0800a0b0 <_fwalk_reent>: 800a0b0: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800a0b4: 4606 mov r6, r0 800a0b6: 4688 mov r8, r1 800a0b8: 2700 movs r7, #0 800a0ba: f100 0448 add.w r4, r0, #72 ; 0x48 800a0be: e9d4 9501 ldrd r9, r5, [r4, #4] 800a0c2: f1b9 0901 subs.w r9, r9, #1 800a0c6: d505 bpl.n 800a0d4 <_fwalk_reent+0x24> 800a0c8: 6824 ldr r4, [r4, #0] 800a0ca: 2c00 cmp r4, #0 800a0cc: d1f7 bne.n 800a0be <_fwalk_reent+0xe> 800a0ce: 4638 mov r0, r7 800a0d0: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800a0d4: 89ab ldrh r3, [r5, #12] 800a0d6: 2b01 cmp r3, #1 800a0d8: d907 bls.n 800a0ea <_fwalk_reent+0x3a> 800a0da: f9b5 300e ldrsh.w r3, [r5, #14] 800a0de: 3301 adds r3, #1 800a0e0: d003 beq.n 800a0ea <_fwalk_reent+0x3a> 800a0e2: 4629 mov r1, r5 800a0e4: 4630 mov r0, r6 800a0e6: 47c0 blx r8 800a0e8: 4307 orrs r7, r0 800a0ea: 3568 adds r5, #104 ; 0x68 800a0ec: e7e9 b.n 800a0c2 <_fwalk_reent+0x12> 0800a0ee <__swhatbuf_r>: 800a0ee: b570 push {r4, r5, r6, lr} 800a0f0: 460e mov r6, r1 800a0f2: f9b1 100e ldrsh.w r1, [r1, #14] 800a0f6: 4614 mov r4, r2 800a0f8: 2900 cmp r1, #0 800a0fa: 461d mov r5, r3 800a0fc: b096 sub sp, #88 ; 0x58 800a0fe: da07 bge.n 800a110 <__swhatbuf_r+0x22> 800a100: 2300 movs r3, #0 800a102: 602b str r3, [r5, #0] 800a104: 89b3 ldrh r3, [r6, #12] 800a106: 061a lsls r2, r3, #24 800a108: d410 bmi.n 800a12c <__swhatbuf_r+0x3e> 800a10a: f44f 6380 mov.w r3, #1024 ; 0x400 800a10e: e00e b.n 800a12e <__swhatbuf_r+0x40> 800a110: 466a mov r2, sp 800a112: f000 f903 bl 800a31c <_fstat_r> 800a116: 2800 cmp r0, #0 800a118: dbf2 blt.n 800a100 <__swhatbuf_r+0x12> 800a11a: 9a01 ldr r2, [sp, #4] 800a11c: f402 4270 and.w r2, r2, #61440 ; 0xf000 800a120: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 800a124: 425a negs r2, r3 800a126: 415a adcs r2, r3 800a128: 602a str r2, [r5, #0] 800a12a: e7ee b.n 800a10a <__swhatbuf_r+0x1c> 800a12c: 2340 movs r3, #64 ; 0x40 800a12e: 2000 movs r0, #0 800a130: 6023 str r3, [r4, #0] 800a132: b016 add sp, #88 ; 0x58 800a134: bd70 pop {r4, r5, r6, pc} ... 0800a138 <__smakebuf_r>: 800a138: 898b ldrh r3, [r1, #12] 800a13a: b573 push {r0, r1, r4, r5, r6, lr} 800a13c: 079d lsls r5, r3, #30 800a13e: 4606 mov r6, r0 800a140: 460c mov r4, r1 800a142: d507 bpl.n 800a154 <__smakebuf_r+0x1c> 800a144: f104 0347 add.w r3, r4, #71 ; 0x47 800a148: 6023 str r3, [r4, #0] 800a14a: 6123 str r3, [r4, #16] 800a14c: 2301 movs r3, #1 800a14e: 6163 str r3, [r4, #20] 800a150: b002 add sp, #8 800a152: bd70 pop {r4, r5, r6, pc} 800a154: 466a mov r2, sp 800a156: ab01 add r3, sp, #4 800a158: f7ff ffc9 bl 800a0ee <__swhatbuf_r> 800a15c: 9900 ldr r1, [sp, #0] 800a15e: 4605 mov r5, r0 800a160: 4630 mov r0, r6 800a162: f7fd fadd bl 8007720 <_malloc_r> 800a166: b948 cbnz r0, 800a17c <__smakebuf_r+0x44> 800a168: f9b4 300c ldrsh.w r3, [r4, #12] 800a16c: 059a lsls r2, r3, #22 800a16e: d4ef bmi.n 800a150 <__smakebuf_r+0x18> 800a170: f023 0303 bic.w r3, r3, #3 800a174: f043 0302 orr.w r3, r3, #2 800a178: 81a3 strh r3, [r4, #12] 800a17a: e7e3 b.n 800a144 <__smakebuf_r+0xc> 800a17c: 4b0d ldr r3, [pc, #52] ; (800a1b4 <__smakebuf_r+0x7c>) 800a17e: 62b3 str r3, [r6, #40] ; 0x28 800a180: 89a3 ldrh r3, [r4, #12] 800a182: 6020 str r0, [r4, #0] 800a184: f043 0380 orr.w r3, r3, #128 ; 0x80 800a188: 81a3 strh r3, [r4, #12] 800a18a: 9b00 ldr r3, [sp, #0] 800a18c: 6120 str r0, [r4, #16] 800a18e: 6163 str r3, [r4, #20] 800a190: 9b01 ldr r3, [sp, #4] 800a192: b15b cbz r3, 800a1ac <__smakebuf_r+0x74> 800a194: 4630 mov r0, r6 800a196: f9b4 100e ldrsh.w r1, [r4, #14] 800a19a: f000 f8d1 bl 800a340 <_isatty_r> 800a19e: b128 cbz r0, 800a1ac <__smakebuf_r+0x74> 800a1a0: 89a3 ldrh r3, [r4, #12] 800a1a2: f023 0303 bic.w r3, r3, #3 800a1a6: f043 0301 orr.w r3, r3, #1 800a1aa: 81a3 strh r3, [r4, #12] 800a1ac: 89a0 ldrh r0, [r4, #12] 800a1ae: 4305 orrs r5, r0 800a1b0: 81a5 strh r5, [r4, #12] 800a1b2: e7cd b.n 800a150 <__smakebuf_r+0x18> 800a1b4: 08009f4d .word 0x08009f4d 0800a1b8 <_malloc_usable_size_r>: 800a1b8: f851 3c04 ldr.w r3, [r1, #-4] 800a1bc: 1f18 subs r0, r3, #4 800a1be: 2b00 cmp r3, #0 800a1c0: bfbc itt lt 800a1c2: 580b ldrlt r3, [r1, r0] 800a1c4: 18c0 addlt r0, r0, r3 800a1c6: 4770 bx lr 0800a1c8 <_raise_r>: 800a1c8: 291f cmp r1, #31 800a1ca: b538 push {r3, r4, r5, lr} 800a1cc: 4604 mov r4, r0 800a1ce: 460d mov r5, r1 800a1d0: d904 bls.n 800a1dc <_raise_r+0x14> 800a1d2: 2316 movs r3, #22 800a1d4: 6003 str r3, [r0, #0] 800a1d6: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff 800a1da: bd38 pop {r3, r4, r5, pc} 800a1dc: 6c42 ldr r2, [r0, #68] ; 0x44 800a1de: b112 cbz r2, 800a1e6 <_raise_r+0x1e> 800a1e0: f852 3021 ldr.w r3, [r2, r1, lsl #2] 800a1e4: b94b cbnz r3, 800a1fa <_raise_r+0x32> 800a1e6: 4620 mov r0, r4 800a1e8: f000 f830 bl 800a24c <_getpid_r> 800a1ec: 462a mov r2, r5 800a1ee: 4601 mov r1, r0 800a1f0: 4620 mov r0, r4 800a1f2: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800a1f6: f000 b817 b.w 800a228 <_kill_r> 800a1fa: 2b01 cmp r3, #1 800a1fc: d00a beq.n 800a214 <_raise_r+0x4c> 800a1fe: 1c59 adds r1, r3, #1 800a200: d103 bne.n 800a20a <_raise_r+0x42> 800a202: 2316 movs r3, #22 800a204: 6003 str r3, [r0, #0] 800a206: 2001 movs r0, #1 800a208: e7e7 b.n 800a1da <_raise_r+0x12> 800a20a: 2400 movs r4, #0 800a20c: 4628 mov r0, r5 800a20e: f842 4025 str.w r4, [r2, r5, lsl #2] 800a212: 4798 blx r3 800a214: 2000 movs r0, #0 800a216: e7e0 b.n 800a1da <_raise_r+0x12> 0800a218 : 800a218: 4b02 ldr r3, [pc, #8] ; (800a224 ) 800a21a: 4601 mov r1, r0 800a21c: 6818 ldr r0, [r3, #0] 800a21e: f7ff bfd3 b.w 800a1c8 <_raise_r> 800a222: bf00 nop 800a224: 20000014 .word 0x20000014 0800a228 <_kill_r>: 800a228: b538 push {r3, r4, r5, lr} 800a22a: 2300 movs r3, #0 800a22c: 4d06 ldr r5, [pc, #24] ; (800a248 <_kill_r+0x20>) 800a22e: 4604 mov r4, r0 800a230: 4608 mov r0, r1 800a232: 4611 mov r1, r2 800a234: 602b str r3, [r5, #0] 800a236: f7f7 fb3a bl 80018ae <_kill> 800a23a: 1c43 adds r3, r0, #1 800a23c: d102 bne.n 800a244 <_kill_r+0x1c> 800a23e: 682b ldr r3, [r5, #0] 800a240: b103 cbz r3, 800a244 <_kill_r+0x1c> 800a242: 6023 str r3, [r4, #0] 800a244: bd38 pop {r3, r4, r5, pc} 800a246: bf00 nop 800a248: 20002538 .word 0x20002538 0800a24c <_getpid_r>: 800a24c: f7f7 bb28 b.w 80018a0 <_getpid> 0800a250 <__sread>: 800a250: b510 push {r4, lr} 800a252: 460c mov r4, r1 800a254: f9b1 100e ldrsh.w r1, [r1, #14] 800a258: f000 f894 bl 800a384 <_read_r> 800a25c: 2800 cmp r0, #0 800a25e: bfab itete ge 800a260: 6d63 ldrge r3, [r4, #84] ; 0x54 800a262: 89a3 ldrhlt r3, [r4, #12] 800a264: 181b addge r3, r3, r0 800a266: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 800a26a: bfac ite ge 800a26c: 6563 strge r3, [r4, #84] ; 0x54 800a26e: 81a3 strhlt r3, [r4, #12] 800a270: bd10 pop {r4, pc} 0800a272 <__swrite>: 800a272: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800a276: 461f mov r7, r3 800a278: 898b ldrh r3, [r1, #12] 800a27a: 4605 mov r5, r0 800a27c: 05db lsls r3, r3, #23 800a27e: 460c mov r4, r1 800a280: 4616 mov r6, r2 800a282: d505 bpl.n 800a290 <__swrite+0x1e> 800a284: 2302 movs r3, #2 800a286: 2200 movs r2, #0 800a288: f9b1 100e ldrsh.w r1, [r1, #14] 800a28c: f000 f868 bl 800a360 <_lseek_r> 800a290: 89a3 ldrh r3, [r4, #12] 800a292: 4632 mov r2, r6 800a294: f423 5380 bic.w r3, r3, #4096 ; 0x1000 800a298: 81a3 strh r3, [r4, #12] 800a29a: 4628 mov r0, r5 800a29c: 463b mov r3, r7 800a29e: f9b4 100e ldrsh.w r1, [r4, #14] 800a2a2: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800a2a6: f000 b817 b.w 800a2d8 <_write_r> 0800a2aa <__sseek>: 800a2aa: b510 push {r4, lr} 800a2ac: 460c mov r4, r1 800a2ae: f9b1 100e ldrsh.w r1, [r1, #14] 800a2b2: f000 f855 bl 800a360 <_lseek_r> 800a2b6: 1c43 adds r3, r0, #1 800a2b8: 89a3 ldrh r3, [r4, #12] 800a2ba: bf15 itete ne 800a2bc: 6560 strne r0, [r4, #84] ; 0x54 800a2be: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 800a2c2: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 800a2c6: 81a3 strheq r3, [r4, #12] 800a2c8: bf18 it ne 800a2ca: 81a3 strhne r3, [r4, #12] 800a2cc: bd10 pop {r4, pc} 0800a2ce <__sclose>: 800a2ce: f9b1 100e ldrsh.w r1, [r1, #14] 800a2d2: f000 b813 b.w 800a2fc <_close_r> ... 0800a2d8 <_write_r>: 800a2d8: b538 push {r3, r4, r5, lr} 800a2da: 4604 mov r4, r0 800a2dc: 4608 mov r0, r1 800a2de: 4611 mov r1, r2 800a2e0: 2200 movs r2, #0 800a2e2: 4d05 ldr r5, [pc, #20] ; (800a2f8 <_write_r+0x20>) 800a2e4: 602a str r2, [r5, #0] 800a2e6: 461a mov r2, r3 800a2e8: f7f7 fb18 bl 800191c <_write> 800a2ec: 1c43 adds r3, r0, #1 800a2ee: d102 bne.n 800a2f6 <_write_r+0x1e> 800a2f0: 682b ldr r3, [r5, #0] 800a2f2: b103 cbz r3, 800a2f6 <_write_r+0x1e> 800a2f4: 6023 str r3, [r4, #0] 800a2f6: bd38 pop {r3, r4, r5, pc} 800a2f8: 20002538 .word 0x20002538 0800a2fc <_close_r>: 800a2fc: b538 push {r3, r4, r5, lr} 800a2fe: 2300 movs r3, #0 800a300: 4d05 ldr r5, [pc, #20] ; (800a318 <_close_r+0x1c>) 800a302: 4604 mov r4, r0 800a304: 4608 mov r0, r1 800a306: 602b str r3, [r5, #0] 800a308: f7f7 fb24 bl 8001954 <_close> 800a30c: 1c43 adds r3, r0, #1 800a30e: d102 bne.n 800a316 <_close_r+0x1a> 800a310: 682b ldr r3, [r5, #0] 800a312: b103 cbz r3, 800a316 <_close_r+0x1a> 800a314: 6023 str r3, [r4, #0] 800a316: bd38 pop {r3, r4, r5, pc} 800a318: 20002538 .word 0x20002538 0800a31c <_fstat_r>: 800a31c: b538 push {r3, r4, r5, lr} 800a31e: 2300 movs r3, #0 800a320: 4d06 ldr r5, [pc, #24] ; (800a33c <_fstat_r+0x20>) 800a322: 4604 mov r4, r0 800a324: 4608 mov r0, r1 800a326: 4611 mov r1, r2 800a328: 602b str r3, [r5, #0] 800a32a: f7f7 fb1e bl 800196a <_fstat> 800a32e: 1c43 adds r3, r0, #1 800a330: d102 bne.n 800a338 <_fstat_r+0x1c> 800a332: 682b ldr r3, [r5, #0] 800a334: b103 cbz r3, 800a338 <_fstat_r+0x1c> 800a336: 6023 str r3, [r4, #0] 800a338: bd38 pop {r3, r4, r5, pc} 800a33a: bf00 nop 800a33c: 20002538 .word 0x20002538 0800a340 <_isatty_r>: 800a340: b538 push {r3, r4, r5, lr} 800a342: 2300 movs r3, #0 800a344: 4d05 ldr r5, [pc, #20] ; (800a35c <_isatty_r+0x1c>) 800a346: 4604 mov r4, r0 800a348: 4608 mov r0, r1 800a34a: 602b str r3, [r5, #0] 800a34c: f7f7 fb1c bl 8001988 <_isatty> 800a350: 1c43 adds r3, r0, #1 800a352: d102 bne.n 800a35a <_isatty_r+0x1a> 800a354: 682b ldr r3, [r5, #0] 800a356: b103 cbz r3, 800a35a <_isatty_r+0x1a> 800a358: 6023 str r3, [r4, #0] 800a35a: bd38 pop {r3, r4, r5, pc} 800a35c: 20002538 .word 0x20002538 0800a360 <_lseek_r>: 800a360: b538 push {r3, r4, r5, lr} 800a362: 4604 mov r4, r0 800a364: 4608 mov r0, r1 800a366: 4611 mov r1, r2 800a368: 2200 movs r2, #0 800a36a: 4d05 ldr r5, [pc, #20] ; (800a380 <_lseek_r+0x20>) 800a36c: 602a str r2, [r5, #0] 800a36e: 461a mov r2, r3 800a370: f7f7 fb14 bl 800199c <_lseek> 800a374: 1c43 adds r3, r0, #1 800a376: d102 bne.n 800a37e <_lseek_r+0x1e> 800a378: 682b ldr r3, [r5, #0] 800a37a: b103 cbz r3, 800a37e <_lseek_r+0x1e> 800a37c: 6023 str r3, [r4, #0] 800a37e: bd38 pop {r3, r4, r5, pc} 800a380: 20002538 .word 0x20002538 0800a384 <_read_r>: 800a384: b538 push {r3, r4, r5, lr} 800a386: 4604 mov r4, r0 800a388: 4608 mov r0, r1 800a38a: 4611 mov r1, r2 800a38c: 2200 movs r2, #0 800a38e: 4d05 ldr r5, [pc, #20] ; (800a3a4 <_read_r+0x20>) 800a390: 602a str r2, [r5, #0] 800a392: 461a mov r2, r3 800a394: f7f7 faa5 bl 80018e2 <_read> 800a398: 1c43 adds r3, r0, #1 800a39a: d102 bne.n 800a3a2 <_read_r+0x1e> 800a39c: 682b ldr r3, [r5, #0] 800a39e: b103 cbz r3, 800a3a2 <_read_r+0x1e> 800a3a0: 6023 str r3, [r4, #0] 800a3a2: bd38 pop {r3, r4, r5, pc} 800a3a4: 20002538 .word 0x20002538 0800a3a8 <_init>: 800a3a8: b5f8 push {r3, r4, r5, r6, r7, lr} 800a3aa: bf00 nop 800a3ac: bcf8 pop {r3, r4, r5, r6, r7} 800a3ae: bc08 pop {r3} 800a3b0: 469e mov lr, r3 800a3b2: 4770 bx lr 0800a3b4 <_fini>: 800a3b4: b5f8 push {r3, r4, r5, r6, r7, lr} 800a3b6: bf00 nop 800a3b8: bcf8 pop {r3, r4, r5, r6, r7} 800a3ba: bc08 pop {r3} 800a3bc: 469e mov lr, r3 800a3be: 4770 bx lr