17629 lines
652 KiB
Plaintext
17629 lines
652 KiB
Plaintext
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m3s.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .isr_vector 000001e4 08000000 08000000 00010000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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1 .text 000080e8 080001e8 080001e8 000101e8 2**3
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 00000f44 080082d0 080082d0 000182d0 2**3
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .ARM.extab 00000000 08009214 08009214 000201dc 2**0
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CONTENTS
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4 .ARM 00000000 08009214 08009214 000201dc 2**0
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CONTENTS
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5 .preinit_array 00000000 08009214 08009214 000201dc 2**0
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CONTENTS, ALLOC, LOAD, DATA
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6 .init_array 00000004 08009214 08009214 00019214 2**2
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CONTENTS, ALLOC, LOAD, DATA
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7 .fini_array 00000004 08009218 08009218 00019218 2**2
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CONTENTS, ALLOC, LOAD, DATA
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8 .data 000001dc 20000000 0800921c 00020000 2**2
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CONTENTS, ALLOC, LOAD, DATA
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9 .bss 00000124 200001dc 080093f8 000201dc 2**2
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ALLOC
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10 ._user_heap_stack 00000600 20000300 080093f8 00020300 2**0
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ALLOC
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11 .ARM.attributes 00000029 00000000 00000000 000201dc 2**0
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CONTENTS, READONLY
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12 .debug_info 0000c1f6 00000000 00000000 00020205 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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13 .debug_abbrev 00002461 00000000 00000000 0002c3fb 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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14 .debug_aranges 00000ab8 00000000 00000000 0002e860 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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15 .debug_ranges 000009d0 00000000 00000000 0002f318 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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16 .debug_macro 0001b17b 00000000 00000000 0002fce8 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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17 .debug_line 0000dd9b 00000000 00000000 0004ae63 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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18 .debug_str 00095b47 00000000 00000000 00058bfe 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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19 .comment 00000053 00000000 00000000 000ee745 2**0
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CONTENTS, READONLY
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20 .debug_frame 00003cac 00000000 00000000 000ee798 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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Disassembly of section .text:
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080001e8 <__do_global_dtors_aux>:
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80001e8: b510 push {r4, lr}
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80001ea: 4c05 ldr r4, [pc, #20] ; (8000200 <__do_global_dtors_aux+0x18>)
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80001ec: 7823 ldrb r3, [r4, #0]
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80001ee: b933 cbnz r3, 80001fe <__do_global_dtors_aux+0x16>
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80001f0: 4b04 ldr r3, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x1c>)
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80001f2: b113 cbz r3, 80001fa <__do_global_dtors_aux+0x12>
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80001f4: 4804 ldr r0, [pc, #16] ; (8000208 <__do_global_dtors_aux+0x20>)
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80001f6: f3af 8000 nop.w
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80001fa: 2301 movs r3, #1
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80001fc: 7023 strb r3, [r4, #0]
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80001fe: bd10 pop {r4, pc}
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8000200: 200001dc .word 0x200001dc
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8000204: 00000000 .word 0x00000000
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8000208: 080082b8 .word 0x080082b8
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0800020c <frame_dummy>:
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800020c: b508 push {r3, lr}
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800020e: 4b03 ldr r3, [pc, #12] ; (800021c <frame_dummy+0x10>)
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8000210: b11b cbz r3, 800021a <frame_dummy+0xe>
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8000212: 4903 ldr r1, [pc, #12] ; (8000220 <frame_dummy+0x14>)
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8000214: 4803 ldr r0, [pc, #12] ; (8000224 <frame_dummy+0x18>)
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8000216: f3af 8000 nop.w
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800021a: bd08 pop {r3, pc}
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800021c: 00000000 .word 0x00000000
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8000220: 200001e0 .word 0x200001e0
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8000224: 080082b8 .word 0x080082b8
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08000228 <strlen>:
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8000228: 4603 mov r3, r0
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800022a: f813 2b01 ldrb.w r2, [r3], #1
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800022e: 2a00 cmp r2, #0
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8000230: d1fb bne.n 800022a <strlen+0x2>
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8000232: 1a18 subs r0, r3, r0
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8000234: 3801 subs r0, #1
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8000236: 4770 bx lr
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08000238 <__aeabi_drsub>:
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8000238: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000
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800023c: e002 b.n 8000244 <__adddf3>
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800023e: bf00 nop
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08000240 <__aeabi_dsub>:
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8000240: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000
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08000244 <__adddf3>:
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8000244: b530 push {r4, r5, lr}
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8000246: ea4f 0441 mov.w r4, r1, lsl #1
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800024a: ea4f 0543 mov.w r5, r3, lsl #1
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800024e: ea94 0f05 teq r4, r5
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8000252: bf08 it eq
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8000254: ea90 0f02 teqeq r0, r2
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8000258: bf1f itttt ne
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800025a: ea54 0c00 orrsne.w ip, r4, r0
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800025e: ea55 0c02 orrsne.w ip, r5, r2
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8000262: ea7f 5c64 mvnsne.w ip, r4, asr #21
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8000266: ea7f 5c65 mvnsne.w ip, r5, asr #21
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800026a: f000 80e2 beq.w 8000432 <__adddf3+0x1ee>
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800026e: ea4f 5454 mov.w r4, r4, lsr #21
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8000272: ebd4 5555 rsbs r5, r4, r5, lsr #21
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8000276: bfb8 it lt
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8000278: 426d neglt r5, r5
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800027a: dd0c ble.n 8000296 <__adddf3+0x52>
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800027c: 442c add r4, r5
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800027e: ea80 0202 eor.w r2, r0, r2
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8000282: ea81 0303 eor.w r3, r1, r3
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8000286: ea82 0000 eor.w r0, r2, r0
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800028a: ea83 0101 eor.w r1, r3, r1
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800028e: ea80 0202 eor.w r2, r0, r2
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8000292: ea81 0303 eor.w r3, r1, r3
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8000296: 2d36 cmp r5, #54 ; 0x36
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8000298: bf88 it hi
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800029a: bd30 pophi {r4, r5, pc}
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800029c: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
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80002a0: ea4f 3101 mov.w r1, r1, lsl #12
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80002a4: f44f 1c80 mov.w ip, #1048576 ; 0x100000
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80002a8: ea4c 3111 orr.w r1, ip, r1, lsr #12
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80002ac: d002 beq.n 80002b4 <__adddf3+0x70>
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80002ae: 4240 negs r0, r0
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80002b0: eb61 0141 sbc.w r1, r1, r1, lsl #1
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80002b4: f013 4f00 tst.w r3, #2147483648 ; 0x80000000
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80002b8: ea4f 3303 mov.w r3, r3, lsl #12
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80002bc: ea4c 3313 orr.w r3, ip, r3, lsr #12
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80002c0: d002 beq.n 80002c8 <__adddf3+0x84>
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80002c2: 4252 negs r2, r2
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80002c4: eb63 0343 sbc.w r3, r3, r3, lsl #1
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80002c8: ea94 0f05 teq r4, r5
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80002cc: f000 80a7 beq.w 800041e <__adddf3+0x1da>
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80002d0: f1a4 0401 sub.w r4, r4, #1
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80002d4: f1d5 0e20 rsbs lr, r5, #32
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80002d8: db0d blt.n 80002f6 <__adddf3+0xb2>
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80002da: fa02 fc0e lsl.w ip, r2, lr
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80002de: fa22 f205 lsr.w r2, r2, r5
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80002e2: 1880 adds r0, r0, r2
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80002e4: f141 0100 adc.w r1, r1, #0
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80002e8: fa03 f20e lsl.w r2, r3, lr
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80002ec: 1880 adds r0, r0, r2
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80002ee: fa43 f305 asr.w r3, r3, r5
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80002f2: 4159 adcs r1, r3
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80002f4: e00e b.n 8000314 <__adddf3+0xd0>
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80002f6: f1a5 0520 sub.w r5, r5, #32
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80002fa: f10e 0e20 add.w lr, lr, #32
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80002fe: 2a01 cmp r2, #1
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8000300: fa03 fc0e lsl.w ip, r3, lr
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8000304: bf28 it cs
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8000306: f04c 0c02 orrcs.w ip, ip, #2
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800030a: fa43 f305 asr.w r3, r3, r5
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800030e: 18c0 adds r0, r0, r3
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8000310: eb51 71e3 adcs.w r1, r1, r3, asr #31
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8000314: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
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8000318: d507 bpl.n 800032a <__adddf3+0xe6>
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800031a: f04f 0e00 mov.w lr, #0
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800031e: f1dc 0c00 rsbs ip, ip, #0
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8000322: eb7e 0000 sbcs.w r0, lr, r0
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8000326: eb6e 0101 sbc.w r1, lr, r1
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800032a: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000
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800032e: d31b bcc.n 8000368 <__adddf3+0x124>
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8000330: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000
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8000334: d30c bcc.n 8000350 <__adddf3+0x10c>
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8000336: 0849 lsrs r1, r1, #1
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8000338: ea5f 0030 movs.w r0, r0, rrx
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800033c: ea4f 0c3c mov.w ip, ip, rrx
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8000340: f104 0401 add.w r4, r4, #1
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8000344: ea4f 5244 mov.w r2, r4, lsl #21
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8000348: f512 0f80 cmn.w r2, #4194304 ; 0x400000
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800034c: f080 809a bcs.w 8000484 <__adddf3+0x240>
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8000350: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000
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8000354: bf08 it eq
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8000356: ea5f 0c50 movseq.w ip, r0, lsr #1
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800035a: f150 0000 adcs.w r0, r0, #0
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800035e: eb41 5104 adc.w r1, r1, r4, lsl #20
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8000362: ea41 0105 orr.w r1, r1, r5
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8000366: bd30 pop {r4, r5, pc}
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8000368: ea5f 0c4c movs.w ip, ip, lsl #1
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800036c: 4140 adcs r0, r0
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800036e: eb41 0101 adc.w r1, r1, r1
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8000372: 3c01 subs r4, #1
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8000374: bf28 it cs
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8000376: f5b1 1f80 cmpcs.w r1, #1048576 ; 0x100000
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800037a: d2e9 bcs.n 8000350 <__adddf3+0x10c>
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800037c: f091 0f00 teq r1, #0
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8000380: bf04 itt eq
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8000382: 4601 moveq r1, r0
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8000384: 2000 moveq r0, #0
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8000386: fab1 f381 clz r3, r1
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800038a: bf08 it eq
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800038c: 3320 addeq r3, #32
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800038e: f1a3 030b sub.w r3, r3, #11
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8000392: f1b3 0220 subs.w r2, r3, #32
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8000396: da0c bge.n 80003b2 <__adddf3+0x16e>
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8000398: 320c adds r2, #12
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800039a: dd08 ble.n 80003ae <__adddf3+0x16a>
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800039c: f102 0c14 add.w ip, r2, #20
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80003a0: f1c2 020c rsb r2, r2, #12
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80003a4: fa01 f00c lsl.w r0, r1, ip
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80003a8: fa21 f102 lsr.w r1, r1, r2
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80003ac: e00c b.n 80003c8 <__adddf3+0x184>
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80003ae: f102 0214 add.w r2, r2, #20
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80003b2: bfd8 it le
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80003b4: f1c2 0c20 rsble ip, r2, #32
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80003b8: fa01 f102 lsl.w r1, r1, r2
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80003bc: fa20 fc0c lsr.w ip, r0, ip
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80003c0: bfdc itt le
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80003c2: ea41 010c orrle.w r1, r1, ip
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80003c6: 4090 lslle r0, r2
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80003c8: 1ae4 subs r4, r4, r3
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80003ca: bfa2 ittt ge
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80003cc: eb01 5104 addge.w r1, r1, r4, lsl #20
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80003d0: 4329 orrge r1, r5
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80003d2: bd30 popge {r4, r5, pc}
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80003d4: ea6f 0404 mvn.w r4, r4
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80003d8: 3c1f subs r4, #31
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80003da: da1c bge.n 8000416 <__adddf3+0x1d2>
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80003dc: 340c adds r4, #12
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80003de: dc0e bgt.n 80003fe <__adddf3+0x1ba>
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80003e0: f104 0414 add.w r4, r4, #20
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80003e4: f1c4 0220 rsb r2, r4, #32
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80003e8: fa20 f004 lsr.w r0, r0, r4
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80003ec: fa01 f302 lsl.w r3, r1, r2
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80003f0: ea40 0003 orr.w r0, r0, r3
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80003f4: fa21 f304 lsr.w r3, r1, r4
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80003f8: ea45 0103 orr.w r1, r5, r3
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80003fc: bd30 pop {r4, r5, pc}
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80003fe: f1c4 040c rsb r4, r4, #12
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8000402: f1c4 0220 rsb r2, r4, #32
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8000406: fa20 f002 lsr.w r0, r0, r2
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800040a: fa01 f304 lsl.w r3, r1, r4
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800040e: ea40 0003 orr.w r0, r0, r3
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8000412: 4629 mov r1, r5
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8000414: bd30 pop {r4, r5, pc}
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8000416: fa21 f004 lsr.w r0, r1, r4
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800041a: 4629 mov r1, r5
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800041c: bd30 pop {r4, r5, pc}
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800041e: f094 0f00 teq r4, #0
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8000422: f483 1380 eor.w r3, r3, #1048576 ; 0x100000
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8000426: bf06 itte eq
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8000428: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000
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800042c: 3401 addeq r4, #1
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800042e: 3d01 subne r5, #1
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8000430: e74e b.n 80002d0 <__adddf3+0x8c>
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8000432: ea7f 5c64 mvns.w ip, r4, asr #21
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8000436: bf18 it ne
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8000438: ea7f 5c65 mvnsne.w ip, r5, asr #21
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800043c: d029 beq.n 8000492 <__adddf3+0x24e>
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800043e: ea94 0f05 teq r4, r5
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8000442: bf08 it eq
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8000444: ea90 0f02 teqeq r0, r2
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8000448: d005 beq.n 8000456 <__adddf3+0x212>
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800044a: ea54 0c00 orrs.w ip, r4, r0
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800044e: bf04 itt eq
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8000450: 4619 moveq r1, r3
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8000452: 4610 moveq r0, r2
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8000454: bd30 pop {r4, r5, pc}
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8000456: ea91 0f03 teq r1, r3
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800045a: bf1e ittt ne
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800045c: 2100 movne r1, #0
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800045e: 2000 movne r0, #0
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8000460: bd30 popne {r4, r5, pc}
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8000462: ea5f 5c54 movs.w ip, r4, lsr #21
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8000466: d105 bne.n 8000474 <__adddf3+0x230>
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8000468: 0040 lsls r0, r0, #1
|
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800046a: 4149 adcs r1, r1
|
||
800046c: bf28 it cs
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||
800046e: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000
|
||
8000472: bd30 pop {r4, r5, pc}
|
||
8000474: f514 0480 adds.w r4, r4, #4194304 ; 0x400000
|
||
8000478: bf3c itt cc
|
||
800047a: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000
|
||
800047e: bd30 popcc {r4, r5, pc}
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||
8000480: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
|
||
8000484: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000
|
||
8000488: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
|
||
800048c: f04f 0000 mov.w r0, #0
|
||
8000490: bd30 pop {r4, r5, pc}
|
||
8000492: ea7f 5c64 mvns.w ip, r4, asr #21
|
||
8000496: bf1a itte ne
|
||
8000498: 4619 movne r1, r3
|
||
800049a: 4610 movne r0, r2
|
||
800049c: ea7f 5c65 mvnseq.w ip, r5, asr #21
|
||
80004a0: bf1c itt ne
|
||
80004a2: 460b movne r3, r1
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||
80004a4: 4602 movne r2, r0
|
||
80004a6: ea50 3401 orrs.w r4, r0, r1, lsl #12
|
||
80004aa: bf06 itte eq
|
||
80004ac: ea52 3503 orrseq.w r5, r2, r3, lsl #12
|
||
80004b0: ea91 0f03 teqeq r1, r3
|
||
80004b4: f441 2100 orrne.w r1, r1, #524288 ; 0x80000
|
||
80004b8: bd30 pop {r4, r5, pc}
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||
80004ba: bf00 nop
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||
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||
080004bc <__aeabi_ui2d>:
|
||
80004bc: f090 0f00 teq r0, #0
|
||
80004c0: bf04 itt eq
|
||
80004c2: 2100 moveq r1, #0
|
||
80004c4: 4770 bxeq lr
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||
80004c6: b530 push {r4, r5, lr}
|
||
80004c8: f44f 6480 mov.w r4, #1024 ; 0x400
|
||
80004cc: f104 0432 add.w r4, r4, #50 ; 0x32
|
||
80004d0: f04f 0500 mov.w r5, #0
|
||
80004d4: f04f 0100 mov.w r1, #0
|
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80004d8: e750 b.n 800037c <__adddf3+0x138>
|
||
80004da: bf00 nop
|
||
|
||
080004dc <__aeabi_i2d>:
|
||
80004dc: f090 0f00 teq r0, #0
|
||
80004e0: bf04 itt eq
|
||
80004e2: 2100 moveq r1, #0
|
||
80004e4: 4770 bxeq lr
|
||
80004e6: b530 push {r4, r5, lr}
|
||
80004e8: f44f 6480 mov.w r4, #1024 ; 0x400
|
||
80004ec: f104 0432 add.w r4, r4, #50 ; 0x32
|
||
80004f0: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000
|
||
80004f4: bf48 it mi
|
||
80004f6: 4240 negmi r0, r0
|
||
80004f8: f04f 0100 mov.w r1, #0
|
||
80004fc: e73e b.n 800037c <__adddf3+0x138>
|
||
80004fe: bf00 nop
|
||
|
||
08000500 <__aeabi_f2d>:
|
||
8000500: 0042 lsls r2, r0, #1
|
||
8000502: ea4f 01e2 mov.w r1, r2, asr #3
|
||
8000506: ea4f 0131 mov.w r1, r1, rrx
|
||
800050a: ea4f 7002 mov.w r0, r2, lsl #28
|
||
800050e: bf1f itttt ne
|
||
8000510: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000
|
||
8000514: f093 4f7f teqne r3, #4278190080 ; 0xff000000
|
||
8000518: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000
|
||
800051c: 4770 bxne lr
|
||
800051e: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000
|
||
8000522: bf08 it eq
|
||
8000524: 4770 bxeq lr
|
||
8000526: f093 4f7f teq r3, #4278190080 ; 0xff000000
|
||
800052a: bf04 itt eq
|
||
800052c: f441 2100 orreq.w r1, r1, #524288 ; 0x80000
|
||
8000530: 4770 bxeq lr
|
||
8000532: b530 push {r4, r5, lr}
|
||
8000534: f44f 7460 mov.w r4, #896 ; 0x380
|
||
8000538: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
|
||
800053c: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
|
||
8000540: e71c b.n 800037c <__adddf3+0x138>
|
||
8000542: bf00 nop
|
||
|
||
08000544 <__aeabi_ul2d>:
|
||
8000544: ea50 0201 orrs.w r2, r0, r1
|
||
8000548: bf08 it eq
|
||
800054a: 4770 bxeq lr
|
||
800054c: b530 push {r4, r5, lr}
|
||
800054e: f04f 0500 mov.w r5, #0
|
||
8000552: e00a b.n 800056a <__aeabi_l2d+0x16>
|
||
|
||
08000554 <__aeabi_l2d>:
|
||
8000554: ea50 0201 orrs.w r2, r0, r1
|
||
8000558: bf08 it eq
|
||
800055a: 4770 bxeq lr
|
||
800055c: b530 push {r4, r5, lr}
|
||
800055e: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000
|
||
8000562: d502 bpl.n 800056a <__aeabi_l2d+0x16>
|
||
8000564: 4240 negs r0, r0
|
||
8000566: eb61 0141 sbc.w r1, r1, r1, lsl #1
|
||
800056a: f44f 6480 mov.w r4, #1024 ; 0x400
|
||
800056e: f104 0432 add.w r4, r4, #50 ; 0x32
|
||
8000572: ea5f 5c91 movs.w ip, r1, lsr #22
|
||
8000576: f43f aed8 beq.w 800032a <__adddf3+0xe6>
|
||
800057a: f04f 0203 mov.w r2, #3
|
||
800057e: ea5f 0cdc movs.w ip, ip, lsr #3
|
||
8000582: bf18 it ne
|
||
8000584: 3203 addne r2, #3
|
||
8000586: ea5f 0cdc movs.w ip, ip, lsr #3
|
||
800058a: bf18 it ne
|
||
800058c: 3203 addne r2, #3
|
||
800058e: eb02 02dc add.w r2, r2, ip, lsr #3
|
||
8000592: f1c2 0320 rsb r3, r2, #32
|
||
8000596: fa00 fc03 lsl.w ip, r0, r3
|
||
800059a: fa20 f002 lsr.w r0, r0, r2
|
||
800059e: fa01 fe03 lsl.w lr, r1, r3
|
||
80005a2: ea40 000e orr.w r0, r0, lr
|
||
80005a6: fa21 f102 lsr.w r1, r1, r2
|
||
80005aa: 4414 add r4, r2
|
||
80005ac: e6bd b.n 800032a <__adddf3+0xe6>
|
||
80005ae: bf00 nop
|
||
|
||
080005b0 <__aeabi_dmul>:
|
||
80005b0: b570 push {r4, r5, r6, lr}
|
||
80005b2: f04f 0cff mov.w ip, #255 ; 0xff
|
||
80005b6: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
|
||
80005ba: ea1c 5411 ands.w r4, ip, r1, lsr #20
|
||
80005be: bf1d ittte ne
|
||
80005c0: ea1c 5513 andsne.w r5, ip, r3, lsr #20
|
||
80005c4: ea94 0f0c teqne r4, ip
|
||
80005c8: ea95 0f0c teqne r5, ip
|
||
80005cc: f000 f8de bleq 800078c <__aeabi_dmul+0x1dc>
|
||
80005d0: 442c add r4, r5
|
||
80005d2: ea81 0603 eor.w r6, r1, r3
|
||
80005d6: ea21 514c bic.w r1, r1, ip, lsl #21
|
||
80005da: ea23 534c bic.w r3, r3, ip, lsl #21
|
||
80005de: ea50 3501 orrs.w r5, r0, r1, lsl #12
|
||
80005e2: bf18 it ne
|
||
80005e4: ea52 3503 orrsne.w r5, r2, r3, lsl #12
|
||
80005e8: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
80005ec: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
|
||
80005f0: d038 beq.n 8000664 <__aeabi_dmul+0xb4>
|
||
80005f2: fba0 ce02 umull ip, lr, r0, r2
|
||
80005f6: f04f 0500 mov.w r5, #0
|
||
80005fa: fbe1 e502 umlal lr, r5, r1, r2
|
||
80005fe: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000
|
||
8000602: fbe0 e503 umlal lr, r5, r0, r3
|
||
8000606: f04f 0600 mov.w r6, #0
|
||
800060a: fbe1 5603 umlal r5, r6, r1, r3
|
||
800060e: f09c 0f00 teq ip, #0
|
||
8000612: bf18 it ne
|
||
8000614: f04e 0e01 orrne.w lr, lr, #1
|
||
8000618: f1a4 04ff sub.w r4, r4, #255 ; 0xff
|
||
800061c: f5b6 7f00 cmp.w r6, #512 ; 0x200
|
||
8000620: f564 7440 sbc.w r4, r4, #768 ; 0x300
|
||
8000624: d204 bcs.n 8000630 <__aeabi_dmul+0x80>
|
||
8000626: ea5f 0e4e movs.w lr, lr, lsl #1
|
||
800062a: 416d adcs r5, r5
|
||
800062c: eb46 0606 adc.w r6, r6, r6
|
||
8000630: ea42 21c6 orr.w r1, r2, r6, lsl #11
|
||
8000634: ea41 5155 orr.w r1, r1, r5, lsr #21
|
||
8000638: ea4f 20c5 mov.w r0, r5, lsl #11
|
||
800063c: ea40 505e orr.w r0, r0, lr, lsr #21
|
||
8000640: ea4f 2ece mov.w lr, lr, lsl #11
|
||
8000644: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
|
||
8000648: bf88 it hi
|
||
800064a: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
|
||
800064e: d81e bhi.n 800068e <__aeabi_dmul+0xde>
|
||
8000650: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000
|
||
8000654: bf08 it eq
|
||
8000656: ea5f 0e50 movseq.w lr, r0, lsr #1
|
||
800065a: f150 0000 adcs.w r0, r0, #0
|
||
800065e: eb41 5104 adc.w r1, r1, r4, lsl #20
|
||
8000662: bd70 pop {r4, r5, r6, pc}
|
||
8000664: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000
|
||
8000668: ea46 0101 orr.w r1, r6, r1
|
||
800066c: ea40 0002 orr.w r0, r0, r2
|
||
8000670: ea81 0103 eor.w r1, r1, r3
|
||
8000674: ebb4 045c subs.w r4, r4, ip, lsr #1
|
||
8000678: bfc2 ittt gt
|
||
800067a: ebd4 050c rsbsgt r5, r4, ip
|
||
800067e: ea41 5104 orrgt.w r1, r1, r4, lsl #20
|
||
8000682: bd70 popgt {r4, r5, r6, pc}
|
||
8000684: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
8000688: f04f 0e00 mov.w lr, #0
|
||
800068c: 3c01 subs r4, #1
|
||
800068e: f300 80ab bgt.w 80007e8 <__aeabi_dmul+0x238>
|
||
8000692: f114 0f36 cmn.w r4, #54 ; 0x36
|
||
8000696: bfde ittt le
|
||
8000698: 2000 movle r0, #0
|
||
800069a: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000
|
||
800069e: bd70 pople {r4, r5, r6, pc}
|
||
80006a0: f1c4 0400 rsb r4, r4, #0
|
||
80006a4: 3c20 subs r4, #32
|
||
80006a6: da35 bge.n 8000714 <__aeabi_dmul+0x164>
|
||
80006a8: 340c adds r4, #12
|
||
80006aa: dc1b bgt.n 80006e4 <__aeabi_dmul+0x134>
|
||
80006ac: f104 0414 add.w r4, r4, #20
|
||
80006b0: f1c4 0520 rsb r5, r4, #32
|
||
80006b4: fa00 f305 lsl.w r3, r0, r5
|
||
80006b8: fa20 f004 lsr.w r0, r0, r4
|
||
80006bc: fa01 f205 lsl.w r2, r1, r5
|
||
80006c0: ea40 0002 orr.w r0, r0, r2
|
||
80006c4: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000
|
||
80006c8: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
|
||
80006cc: eb10 70d3 adds.w r0, r0, r3, lsr #31
|
||
80006d0: fa21 f604 lsr.w r6, r1, r4
|
||
80006d4: eb42 0106 adc.w r1, r2, r6
|
||
80006d8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
||
80006dc: bf08 it eq
|
||
80006de: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
||
80006e2: bd70 pop {r4, r5, r6, pc}
|
||
80006e4: f1c4 040c rsb r4, r4, #12
|
||
80006e8: f1c4 0520 rsb r5, r4, #32
|
||
80006ec: fa00 f304 lsl.w r3, r0, r4
|
||
80006f0: fa20 f005 lsr.w r0, r0, r5
|
||
80006f4: fa01 f204 lsl.w r2, r1, r4
|
||
80006f8: ea40 0002 orr.w r0, r0, r2
|
||
80006fc: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
8000700: eb10 70d3 adds.w r0, r0, r3, lsr #31
|
||
8000704: f141 0100 adc.w r1, r1, #0
|
||
8000708: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
||
800070c: bf08 it eq
|
||
800070e: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
||
8000712: bd70 pop {r4, r5, r6, pc}
|
||
8000714: f1c4 0520 rsb r5, r4, #32
|
||
8000718: fa00 f205 lsl.w r2, r0, r5
|
||
800071c: ea4e 0e02 orr.w lr, lr, r2
|
||
8000720: fa20 f304 lsr.w r3, r0, r4
|
||
8000724: fa01 f205 lsl.w r2, r1, r5
|
||
8000728: ea43 0302 orr.w r3, r3, r2
|
||
800072c: fa21 f004 lsr.w r0, r1, r4
|
||
8000730: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
8000734: fa21 f204 lsr.w r2, r1, r4
|
||
8000738: ea20 0002 bic.w r0, r0, r2
|
||
800073c: eb00 70d3 add.w r0, r0, r3, lsr #31
|
||
8000740: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
||
8000744: bf08 it eq
|
||
8000746: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
||
800074a: bd70 pop {r4, r5, r6, pc}
|
||
800074c: f094 0f00 teq r4, #0
|
||
8000750: d10f bne.n 8000772 <__aeabi_dmul+0x1c2>
|
||
8000752: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000
|
||
8000756: 0040 lsls r0, r0, #1
|
||
8000758: eb41 0101 adc.w r1, r1, r1
|
||
800075c: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
||
8000760: bf08 it eq
|
||
8000762: 3c01 subeq r4, #1
|
||
8000764: d0f7 beq.n 8000756 <__aeabi_dmul+0x1a6>
|
||
8000766: ea41 0106 orr.w r1, r1, r6
|
||
800076a: f095 0f00 teq r5, #0
|
||
800076e: bf18 it ne
|
||
8000770: 4770 bxne lr
|
||
8000772: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000
|
||
8000776: 0052 lsls r2, r2, #1
|
||
8000778: eb43 0303 adc.w r3, r3, r3
|
||
800077c: f413 1f80 tst.w r3, #1048576 ; 0x100000
|
||
8000780: bf08 it eq
|
||
8000782: 3d01 subeq r5, #1
|
||
8000784: d0f7 beq.n 8000776 <__aeabi_dmul+0x1c6>
|
||
8000786: ea43 0306 orr.w r3, r3, r6
|
||
800078a: 4770 bx lr
|
||
800078c: ea94 0f0c teq r4, ip
|
||
8000790: ea0c 5513 and.w r5, ip, r3, lsr #20
|
||
8000794: bf18 it ne
|
||
8000796: ea95 0f0c teqne r5, ip
|
||
800079a: d00c beq.n 80007b6 <__aeabi_dmul+0x206>
|
||
800079c: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
||
80007a0: bf18 it ne
|
||
80007a2: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
||
80007a6: d1d1 bne.n 800074c <__aeabi_dmul+0x19c>
|
||
80007a8: ea81 0103 eor.w r1, r1, r3
|
||
80007ac: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
80007b0: f04f 0000 mov.w r0, #0
|
||
80007b4: bd70 pop {r4, r5, r6, pc}
|
||
80007b6: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
||
80007ba: bf06 itte eq
|
||
80007bc: 4610 moveq r0, r2
|
||
80007be: 4619 moveq r1, r3
|
||
80007c0: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
||
80007c4: d019 beq.n 80007fa <__aeabi_dmul+0x24a>
|
||
80007c6: ea94 0f0c teq r4, ip
|
||
80007ca: d102 bne.n 80007d2 <__aeabi_dmul+0x222>
|
||
80007cc: ea50 3601 orrs.w r6, r0, r1, lsl #12
|
||
80007d0: d113 bne.n 80007fa <__aeabi_dmul+0x24a>
|
||
80007d2: ea95 0f0c teq r5, ip
|
||
80007d6: d105 bne.n 80007e4 <__aeabi_dmul+0x234>
|
||
80007d8: ea52 3603 orrs.w r6, r2, r3, lsl #12
|
||
80007dc: bf1c itt ne
|
||
80007de: 4610 movne r0, r2
|
||
80007e0: 4619 movne r1, r3
|
||
80007e2: d10a bne.n 80007fa <__aeabi_dmul+0x24a>
|
||
80007e4: ea81 0103 eor.w r1, r1, r3
|
||
80007e8: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
80007ec: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
|
||
80007f0: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
|
||
80007f4: f04f 0000 mov.w r0, #0
|
||
80007f8: bd70 pop {r4, r5, r6, pc}
|
||
80007fa: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
|
||
80007fe: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000
|
||
8000802: bd70 pop {r4, r5, r6, pc}
|
||
|
||
08000804 <__aeabi_ddiv>:
|
||
8000804: b570 push {r4, r5, r6, lr}
|
||
8000806: f04f 0cff mov.w ip, #255 ; 0xff
|
||
800080a: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
|
||
800080e: ea1c 5411 ands.w r4, ip, r1, lsr #20
|
||
8000812: bf1d ittte ne
|
||
8000814: ea1c 5513 andsne.w r5, ip, r3, lsr #20
|
||
8000818: ea94 0f0c teqne r4, ip
|
||
800081c: ea95 0f0c teqne r5, ip
|
||
8000820: f000 f8a7 bleq 8000972 <__aeabi_ddiv+0x16e>
|
||
8000824: eba4 0405 sub.w r4, r4, r5
|
||
8000828: ea81 0e03 eor.w lr, r1, r3
|
||
800082c: ea52 3503 orrs.w r5, r2, r3, lsl #12
|
||
8000830: ea4f 3101 mov.w r1, r1, lsl #12
|
||
8000834: f000 8088 beq.w 8000948 <__aeabi_ddiv+0x144>
|
||
8000838: ea4f 3303 mov.w r3, r3, lsl #12
|
||
800083c: f04f 5580 mov.w r5, #268435456 ; 0x10000000
|
||
8000840: ea45 1313 orr.w r3, r5, r3, lsr #4
|
||
8000844: ea43 6312 orr.w r3, r3, r2, lsr #24
|
||
8000848: ea4f 2202 mov.w r2, r2, lsl #8
|
||
800084c: ea45 1511 orr.w r5, r5, r1, lsr #4
|
||
8000850: ea45 6510 orr.w r5, r5, r0, lsr #24
|
||
8000854: ea4f 2600 mov.w r6, r0, lsl #8
|
||
8000858: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000
|
||
800085c: 429d cmp r5, r3
|
||
800085e: bf08 it eq
|
||
8000860: 4296 cmpeq r6, r2
|
||
8000862: f144 04fd adc.w r4, r4, #253 ; 0xfd
|
||
8000866: f504 7440 add.w r4, r4, #768 ; 0x300
|
||
800086a: d202 bcs.n 8000872 <__aeabi_ddiv+0x6e>
|
||
800086c: 085b lsrs r3, r3, #1
|
||
800086e: ea4f 0232 mov.w r2, r2, rrx
|
||
8000872: 1ab6 subs r6, r6, r2
|
||
8000874: eb65 0503 sbc.w r5, r5, r3
|
||
8000878: 085b lsrs r3, r3, #1
|
||
800087a: ea4f 0232 mov.w r2, r2, rrx
|
||
800087e: f44f 1080 mov.w r0, #1048576 ; 0x100000
|
||
8000882: f44f 2c00 mov.w ip, #524288 ; 0x80000
|
||
8000886: ebb6 0e02 subs.w lr, r6, r2
|
||
800088a: eb75 0e03 sbcs.w lr, r5, r3
|
||
800088e: bf22 ittt cs
|
||
8000890: 1ab6 subcs r6, r6, r2
|
||
8000892: 4675 movcs r5, lr
|
||
8000894: ea40 000c orrcs.w r0, r0, ip
|
||
8000898: 085b lsrs r3, r3, #1
|
||
800089a: ea4f 0232 mov.w r2, r2, rrx
|
||
800089e: ebb6 0e02 subs.w lr, r6, r2
|
||
80008a2: eb75 0e03 sbcs.w lr, r5, r3
|
||
80008a6: bf22 ittt cs
|
||
80008a8: 1ab6 subcs r6, r6, r2
|
||
80008aa: 4675 movcs r5, lr
|
||
80008ac: ea40 005c orrcs.w r0, r0, ip, lsr #1
|
||
80008b0: 085b lsrs r3, r3, #1
|
||
80008b2: ea4f 0232 mov.w r2, r2, rrx
|
||
80008b6: ebb6 0e02 subs.w lr, r6, r2
|
||
80008ba: eb75 0e03 sbcs.w lr, r5, r3
|
||
80008be: bf22 ittt cs
|
||
80008c0: 1ab6 subcs r6, r6, r2
|
||
80008c2: 4675 movcs r5, lr
|
||
80008c4: ea40 009c orrcs.w r0, r0, ip, lsr #2
|
||
80008c8: 085b lsrs r3, r3, #1
|
||
80008ca: ea4f 0232 mov.w r2, r2, rrx
|
||
80008ce: ebb6 0e02 subs.w lr, r6, r2
|
||
80008d2: eb75 0e03 sbcs.w lr, r5, r3
|
||
80008d6: bf22 ittt cs
|
||
80008d8: 1ab6 subcs r6, r6, r2
|
||
80008da: 4675 movcs r5, lr
|
||
80008dc: ea40 00dc orrcs.w r0, r0, ip, lsr #3
|
||
80008e0: ea55 0e06 orrs.w lr, r5, r6
|
||
80008e4: d018 beq.n 8000918 <__aeabi_ddiv+0x114>
|
||
80008e6: ea4f 1505 mov.w r5, r5, lsl #4
|
||
80008ea: ea45 7516 orr.w r5, r5, r6, lsr #28
|
||
80008ee: ea4f 1606 mov.w r6, r6, lsl #4
|
||
80008f2: ea4f 03c3 mov.w r3, r3, lsl #3
|
||
80008f6: ea43 7352 orr.w r3, r3, r2, lsr #29
|
||
80008fa: ea4f 02c2 mov.w r2, r2, lsl #3
|
||
80008fe: ea5f 1c1c movs.w ip, ip, lsr #4
|
||
8000902: d1c0 bne.n 8000886 <__aeabi_ddiv+0x82>
|
||
8000904: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
||
8000908: d10b bne.n 8000922 <__aeabi_ddiv+0x11e>
|
||
800090a: ea41 0100 orr.w r1, r1, r0
|
||
800090e: f04f 0000 mov.w r0, #0
|
||
8000912: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000
|
||
8000916: e7b6 b.n 8000886 <__aeabi_ddiv+0x82>
|
||
8000918: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
||
800091c: bf04 itt eq
|
||
800091e: 4301 orreq r1, r0
|
||
8000920: 2000 moveq r0, #0
|
||
8000922: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
|
||
8000926: bf88 it hi
|
||
8000928: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
|
||
800092c: f63f aeaf bhi.w 800068e <__aeabi_dmul+0xde>
|
||
8000930: ebb5 0c03 subs.w ip, r5, r3
|
||
8000934: bf04 itt eq
|
||
8000936: ebb6 0c02 subseq.w ip, r6, r2
|
||
800093a: ea5f 0c50 movseq.w ip, r0, lsr #1
|
||
800093e: f150 0000 adcs.w r0, r0, #0
|
||
8000942: eb41 5104 adc.w r1, r1, r4, lsl #20
|
||
8000946: bd70 pop {r4, r5, r6, pc}
|
||
8000948: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000
|
||
800094c: ea4e 3111 orr.w r1, lr, r1, lsr #12
|
||
8000950: eb14 045c adds.w r4, r4, ip, lsr #1
|
||
8000954: bfc2 ittt gt
|
||
8000956: ebd4 050c rsbsgt r5, r4, ip
|
||
800095a: ea41 5104 orrgt.w r1, r1, r4, lsl #20
|
||
800095e: bd70 popgt {r4, r5, r6, pc}
|
||
8000960: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
8000964: f04f 0e00 mov.w lr, #0
|
||
8000968: 3c01 subs r4, #1
|
||
800096a: e690 b.n 800068e <__aeabi_dmul+0xde>
|
||
800096c: ea45 0e06 orr.w lr, r5, r6
|
||
8000970: e68d b.n 800068e <__aeabi_dmul+0xde>
|
||
8000972: ea0c 5513 and.w r5, ip, r3, lsr #20
|
||
8000976: ea94 0f0c teq r4, ip
|
||
800097a: bf08 it eq
|
||
800097c: ea95 0f0c teqeq r5, ip
|
||
8000980: f43f af3b beq.w 80007fa <__aeabi_dmul+0x24a>
|
||
8000984: ea94 0f0c teq r4, ip
|
||
8000988: d10a bne.n 80009a0 <__aeabi_ddiv+0x19c>
|
||
800098a: ea50 3401 orrs.w r4, r0, r1, lsl #12
|
||
800098e: f47f af34 bne.w 80007fa <__aeabi_dmul+0x24a>
|
||
8000992: ea95 0f0c teq r5, ip
|
||
8000996: f47f af25 bne.w 80007e4 <__aeabi_dmul+0x234>
|
||
800099a: 4610 mov r0, r2
|
||
800099c: 4619 mov r1, r3
|
||
800099e: e72c b.n 80007fa <__aeabi_dmul+0x24a>
|
||
80009a0: ea95 0f0c teq r5, ip
|
||
80009a4: d106 bne.n 80009b4 <__aeabi_ddiv+0x1b0>
|
||
80009a6: ea52 3503 orrs.w r5, r2, r3, lsl #12
|
||
80009aa: f43f aefd beq.w 80007a8 <__aeabi_dmul+0x1f8>
|
||
80009ae: 4610 mov r0, r2
|
||
80009b0: 4619 mov r1, r3
|
||
80009b2: e722 b.n 80007fa <__aeabi_dmul+0x24a>
|
||
80009b4: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
||
80009b8: bf18 it ne
|
||
80009ba: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
||
80009be: f47f aec5 bne.w 800074c <__aeabi_dmul+0x19c>
|
||
80009c2: ea50 0441 orrs.w r4, r0, r1, lsl #1
|
||
80009c6: f47f af0d bne.w 80007e4 <__aeabi_dmul+0x234>
|
||
80009ca: ea52 0543 orrs.w r5, r2, r3, lsl #1
|
||
80009ce: f47f aeeb bne.w 80007a8 <__aeabi_dmul+0x1f8>
|
||
80009d2: e712 b.n 80007fa <__aeabi_dmul+0x24a>
|
||
|
||
080009d4 <__gedf2>:
|
||
80009d4: f04f 3cff mov.w ip, #4294967295 ; 0xffffffff
|
||
80009d8: e006 b.n 80009e8 <__cmpdf2+0x4>
|
||
80009da: bf00 nop
|
||
|
||
080009dc <__ledf2>:
|
||
80009dc: f04f 0c01 mov.w ip, #1
|
||
80009e0: e002 b.n 80009e8 <__cmpdf2+0x4>
|
||
80009e2: bf00 nop
|
||
|
||
080009e4 <__cmpdf2>:
|
||
80009e4: f04f 0c01 mov.w ip, #1
|
||
80009e8: f84d cd04 str.w ip, [sp, #-4]!
|
||
80009ec: ea4f 0c41 mov.w ip, r1, lsl #1
|
||
80009f0: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
80009f4: ea4f 0c43 mov.w ip, r3, lsl #1
|
||
80009f8: bf18 it ne
|
||
80009fa: ea7f 5c6c mvnsne.w ip, ip, asr #21
|
||
80009fe: d01b beq.n 8000a38 <__cmpdf2+0x54>
|
||
8000a00: b001 add sp, #4
|
||
8000a02: ea50 0c41 orrs.w ip, r0, r1, lsl #1
|
||
8000a06: bf0c ite eq
|
||
8000a08: ea52 0c43 orrseq.w ip, r2, r3, lsl #1
|
||
8000a0c: ea91 0f03 teqne r1, r3
|
||
8000a10: bf02 ittt eq
|
||
8000a12: ea90 0f02 teqeq r0, r2
|
||
8000a16: 2000 moveq r0, #0
|
||
8000a18: 4770 bxeq lr
|
||
8000a1a: f110 0f00 cmn.w r0, #0
|
||
8000a1e: ea91 0f03 teq r1, r3
|
||
8000a22: bf58 it pl
|
||
8000a24: 4299 cmppl r1, r3
|
||
8000a26: bf08 it eq
|
||
8000a28: 4290 cmpeq r0, r2
|
||
8000a2a: bf2c ite cs
|
||
8000a2c: 17d8 asrcs r0, r3, #31
|
||
8000a2e: ea6f 70e3 mvncc.w r0, r3, asr #31
|
||
8000a32: f040 0001 orr.w r0, r0, #1
|
||
8000a36: 4770 bx lr
|
||
8000a38: ea4f 0c41 mov.w ip, r1, lsl #1
|
||
8000a3c: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000a40: d102 bne.n 8000a48 <__cmpdf2+0x64>
|
||
8000a42: ea50 3c01 orrs.w ip, r0, r1, lsl #12
|
||
8000a46: d107 bne.n 8000a58 <__cmpdf2+0x74>
|
||
8000a48: ea4f 0c43 mov.w ip, r3, lsl #1
|
||
8000a4c: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000a50: d1d6 bne.n 8000a00 <__cmpdf2+0x1c>
|
||
8000a52: ea52 3c03 orrs.w ip, r2, r3, lsl #12
|
||
8000a56: d0d3 beq.n 8000a00 <__cmpdf2+0x1c>
|
||
8000a58: f85d 0b04 ldr.w r0, [sp], #4
|
||
8000a5c: 4770 bx lr
|
||
8000a5e: bf00 nop
|
||
|
||
08000a60 <__aeabi_cdrcmple>:
|
||
8000a60: 4684 mov ip, r0
|
||
8000a62: 4610 mov r0, r2
|
||
8000a64: 4662 mov r2, ip
|
||
8000a66: 468c mov ip, r1
|
||
8000a68: 4619 mov r1, r3
|
||
8000a6a: 4663 mov r3, ip
|
||
8000a6c: e000 b.n 8000a70 <__aeabi_cdcmpeq>
|
||
8000a6e: bf00 nop
|
||
|
||
08000a70 <__aeabi_cdcmpeq>:
|
||
8000a70: b501 push {r0, lr}
|
||
8000a72: f7ff ffb7 bl 80009e4 <__cmpdf2>
|
||
8000a76: 2800 cmp r0, #0
|
||
8000a78: bf48 it mi
|
||
8000a7a: f110 0f00 cmnmi.w r0, #0
|
||
8000a7e: bd01 pop {r0, pc}
|
||
|
||
08000a80 <__aeabi_dcmpeq>:
|
||
8000a80: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000a84: f7ff fff4 bl 8000a70 <__aeabi_cdcmpeq>
|
||
8000a88: bf0c ite eq
|
||
8000a8a: 2001 moveq r0, #1
|
||
8000a8c: 2000 movne r0, #0
|
||
8000a8e: f85d fb08 ldr.w pc, [sp], #8
|
||
8000a92: bf00 nop
|
||
|
||
08000a94 <__aeabi_dcmplt>:
|
||
8000a94: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000a98: f7ff ffea bl 8000a70 <__aeabi_cdcmpeq>
|
||
8000a9c: bf34 ite cc
|
||
8000a9e: 2001 movcc r0, #1
|
||
8000aa0: 2000 movcs r0, #0
|
||
8000aa2: f85d fb08 ldr.w pc, [sp], #8
|
||
8000aa6: bf00 nop
|
||
|
||
08000aa8 <__aeabi_dcmple>:
|
||
8000aa8: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000aac: f7ff ffe0 bl 8000a70 <__aeabi_cdcmpeq>
|
||
8000ab0: bf94 ite ls
|
||
8000ab2: 2001 movls r0, #1
|
||
8000ab4: 2000 movhi r0, #0
|
||
8000ab6: f85d fb08 ldr.w pc, [sp], #8
|
||
8000aba: bf00 nop
|
||
|
||
08000abc <__aeabi_dcmpge>:
|
||
8000abc: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000ac0: f7ff ffce bl 8000a60 <__aeabi_cdrcmple>
|
||
8000ac4: bf94 ite ls
|
||
8000ac6: 2001 movls r0, #1
|
||
8000ac8: 2000 movhi r0, #0
|
||
8000aca: f85d fb08 ldr.w pc, [sp], #8
|
||
8000ace: bf00 nop
|
||
|
||
08000ad0 <__aeabi_dcmpgt>:
|
||
8000ad0: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000ad4: f7ff ffc4 bl 8000a60 <__aeabi_cdrcmple>
|
||
8000ad8: bf34 ite cc
|
||
8000ada: 2001 movcc r0, #1
|
||
8000adc: 2000 movcs r0, #0
|
||
8000ade: f85d fb08 ldr.w pc, [sp], #8
|
||
8000ae2: bf00 nop
|
||
|
||
08000ae4 <__aeabi_dcmpun>:
|
||
8000ae4: ea4f 0c41 mov.w ip, r1, lsl #1
|
||
8000ae8: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000aec: d102 bne.n 8000af4 <__aeabi_dcmpun+0x10>
|
||
8000aee: ea50 3c01 orrs.w ip, r0, r1, lsl #12
|
||
8000af2: d10a bne.n 8000b0a <__aeabi_dcmpun+0x26>
|
||
8000af4: ea4f 0c43 mov.w ip, r3, lsl #1
|
||
8000af8: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000afc: d102 bne.n 8000b04 <__aeabi_dcmpun+0x20>
|
||
8000afe: ea52 3c03 orrs.w ip, r2, r3, lsl #12
|
||
8000b02: d102 bne.n 8000b0a <__aeabi_dcmpun+0x26>
|
||
8000b04: f04f 0000 mov.w r0, #0
|
||
8000b08: 4770 bx lr
|
||
8000b0a: f04f 0001 mov.w r0, #1
|
||
8000b0e: 4770 bx lr
|
||
|
||
08000b10 <__aeabi_d2iz>:
|
||
8000b10: ea4f 0241 mov.w r2, r1, lsl #1
|
||
8000b14: f512 1200 adds.w r2, r2, #2097152 ; 0x200000
|
||
8000b18: d215 bcs.n 8000b46 <__aeabi_d2iz+0x36>
|
||
8000b1a: d511 bpl.n 8000b40 <__aeabi_d2iz+0x30>
|
||
8000b1c: f46f 7378 mvn.w r3, #992 ; 0x3e0
|
||
8000b20: ebb3 5262 subs.w r2, r3, r2, asr #21
|
||
8000b24: d912 bls.n 8000b4c <__aeabi_d2iz+0x3c>
|
||
8000b26: ea4f 23c1 mov.w r3, r1, lsl #11
|
||
8000b2a: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
||
8000b2e: ea43 5350 orr.w r3, r3, r0, lsr #21
|
||
8000b32: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
|
||
8000b36: fa23 f002 lsr.w r0, r3, r2
|
||
8000b3a: bf18 it ne
|
||
8000b3c: 4240 negne r0, r0
|
||
8000b3e: 4770 bx lr
|
||
8000b40: f04f 0000 mov.w r0, #0
|
||
8000b44: 4770 bx lr
|
||
8000b46: ea50 3001 orrs.w r0, r0, r1, lsl #12
|
||
8000b4a: d105 bne.n 8000b58 <__aeabi_d2iz+0x48>
|
||
8000b4c: f011 4000 ands.w r0, r1, #2147483648 ; 0x80000000
|
||
8000b50: bf08 it eq
|
||
8000b52: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000
|
||
8000b56: 4770 bx lr
|
||
8000b58: f04f 0000 mov.w r0, #0
|
||
8000b5c: 4770 bx lr
|
||
8000b5e: bf00 nop
|
||
|
||
08000b60 <__aeabi_d2f>:
|
||
8000b60: ea4f 0241 mov.w r2, r1, lsl #1
|
||
8000b64: f1b2 43e0 subs.w r3, r2, #1879048192 ; 0x70000000
|
||
8000b68: bf24 itt cs
|
||
8000b6a: f5b3 1c00 subscs.w ip, r3, #2097152 ; 0x200000
|
||
8000b6e: f1dc 5cfe rsbscs ip, ip, #532676608 ; 0x1fc00000
|
||
8000b72: d90d bls.n 8000b90 <__aeabi_d2f+0x30>
|
||
8000b74: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
||
8000b78: ea4f 02c0 mov.w r2, r0, lsl #3
|
||
8000b7c: ea4c 7050 orr.w r0, ip, r0, lsr #29
|
||
8000b80: f1b2 4f00 cmp.w r2, #2147483648 ; 0x80000000
|
||
8000b84: eb40 0083 adc.w r0, r0, r3, lsl #2
|
||
8000b88: bf08 it eq
|
||
8000b8a: f020 0001 biceq.w r0, r0, #1
|
||
8000b8e: 4770 bx lr
|
||
8000b90: f011 4f80 tst.w r1, #1073741824 ; 0x40000000
|
||
8000b94: d121 bne.n 8000bda <__aeabi_d2f+0x7a>
|
||
8000b96: f113 7238 adds.w r2, r3, #48234496 ; 0x2e00000
|
||
8000b9a: bfbc itt lt
|
||
8000b9c: f001 4000 andlt.w r0, r1, #2147483648 ; 0x80000000
|
||
8000ba0: 4770 bxlt lr
|
||
8000ba2: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
8000ba6: ea4f 5252 mov.w r2, r2, lsr #21
|
||
8000baa: f1c2 0218 rsb r2, r2, #24
|
||
8000bae: f1c2 0c20 rsb ip, r2, #32
|
||
8000bb2: fa10 f30c lsls.w r3, r0, ip
|
||
8000bb6: fa20 f002 lsr.w r0, r0, r2
|
||
8000bba: bf18 it ne
|
||
8000bbc: f040 0001 orrne.w r0, r0, #1
|
||
8000bc0: ea4f 23c1 mov.w r3, r1, lsl #11
|
||
8000bc4: ea4f 23d3 mov.w r3, r3, lsr #11
|
||
8000bc8: fa03 fc0c lsl.w ip, r3, ip
|
||
8000bcc: ea40 000c orr.w r0, r0, ip
|
||
8000bd0: fa23 f302 lsr.w r3, r3, r2
|
||
8000bd4: ea4f 0343 mov.w r3, r3, lsl #1
|
||
8000bd8: e7cc b.n 8000b74 <__aeabi_d2f+0x14>
|
||
8000bda: ea7f 5362 mvns.w r3, r2, asr #21
|
||
8000bde: d107 bne.n 8000bf0 <__aeabi_d2f+0x90>
|
||
8000be0: ea50 3301 orrs.w r3, r0, r1, lsl #12
|
||
8000be4: bf1e ittt ne
|
||
8000be6: f04f 40fe movne.w r0, #2130706432 ; 0x7f000000
|
||
8000bea: f440 0040 orrne.w r0, r0, #12582912 ; 0xc00000
|
||
8000bee: 4770 bxne lr
|
||
8000bf0: f001 4000 and.w r0, r1, #2147483648 ; 0x80000000
|
||
8000bf4: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
||
8000bf8: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000bfc: 4770 bx lr
|
||
8000bfe: bf00 nop
|
||
|
||
08000c00 <__aeabi_frsub>:
|
||
8000c00: f080 4000 eor.w r0, r0, #2147483648 ; 0x80000000
|
||
8000c04: e002 b.n 8000c0c <__addsf3>
|
||
8000c06: bf00 nop
|
||
|
||
08000c08 <__aeabi_fsub>:
|
||
8000c08: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000
|
||
|
||
08000c0c <__addsf3>:
|
||
8000c0c: 0042 lsls r2, r0, #1
|
||
8000c0e: bf1f itttt ne
|
||
8000c10: ea5f 0341 movsne.w r3, r1, lsl #1
|
||
8000c14: ea92 0f03 teqne r2, r3
|
||
8000c18: ea7f 6c22 mvnsne.w ip, r2, asr #24
|
||
8000c1c: ea7f 6c23 mvnsne.w ip, r3, asr #24
|
||
8000c20: d06a beq.n 8000cf8 <__addsf3+0xec>
|
||
8000c22: ea4f 6212 mov.w r2, r2, lsr #24
|
||
8000c26: ebd2 6313 rsbs r3, r2, r3, lsr #24
|
||
8000c2a: bfc1 itttt gt
|
||
8000c2c: 18d2 addgt r2, r2, r3
|
||
8000c2e: 4041 eorgt r1, r0
|
||
8000c30: 4048 eorgt r0, r1
|
||
8000c32: 4041 eorgt r1, r0
|
||
8000c34: bfb8 it lt
|
||
8000c36: 425b neglt r3, r3
|
||
8000c38: 2b19 cmp r3, #25
|
||
8000c3a: bf88 it hi
|
||
8000c3c: 4770 bxhi lr
|
||
8000c3e: f010 4f00 tst.w r0, #2147483648 ; 0x80000000
|
||
8000c42: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000c46: f020 407f bic.w r0, r0, #4278190080 ; 0xff000000
|
||
8000c4a: bf18 it ne
|
||
8000c4c: 4240 negne r0, r0
|
||
8000c4e: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
|
||
8000c52: f441 0100 orr.w r1, r1, #8388608 ; 0x800000
|
||
8000c56: f021 417f bic.w r1, r1, #4278190080 ; 0xff000000
|
||
8000c5a: bf18 it ne
|
||
8000c5c: 4249 negne r1, r1
|
||
8000c5e: ea92 0f03 teq r2, r3
|
||
8000c62: d03f beq.n 8000ce4 <__addsf3+0xd8>
|
||
8000c64: f1a2 0201 sub.w r2, r2, #1
|
||
8000c68: fa41 fc03 asr.w ip, r1, r3
|
||
8000c6c: eb10 000c adds.w r0, r0, ip
|
||
8000c70: f1c3 0320 rsb r3, r3, #32
|
||
8000c74: fa01 f103 lsl.w r1, r1, r3
|
||
8000c78: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000
|
||
8000c7c: d502 bpl.n 8000c84 <__addsf3+0x78>
|
||
8000c7e: 4249 negs r1, r1
|
||
8000c80: eb60 0040 sbc.w r0, r0, r0, lsl #1
|
||
8000c84: f5b0 0f00 cmp.w r0, #8388608 ; 0x800000
|
||
8000c88: d313 bcc.n 8000cb2 <__addsf3+0xa6>
|
||
8000c8a: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000
|
||
8000c8e: d306 bcc.n 8000c9e <__addsf3+0x92>
|
||
8000c90: 0840 lsrs r0, r0, #1
|
||
8000c92: ea4f 0131 mov.w r1, r1, rrx
|
||
8000c96: f102 0201 add.w r2, r2, #1
|
||
8000c9a: 2afe cmp r2, #254 ; 0xfe
|
||
8000c9c: d251 bcs.n 8000d42 <__addsf3+0x136>
|
||
8000c9e: f1b1 4f00 cmp.w r1, #2147483648 ; 0x80000000
|
||
8000ca2: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
||
8000ca6: bf08 it eq
|
||
8000ca8: f020 0001 biceq.w r0, r0, #1
|
||
8000cac: ea40 0003 orr.w r0, r0, r3
|
||
8000cb0: 4770 bx lr
|
||
8000cb2: 0049 lsls r1, r1, #1
|
||
8000cb4: eb40 0000 adc.w r0, r0, r0
|
||
8000cb8: 3a01 subs r2, #1
|
||
8000cba: bf28 it cs
|
||
8000cbc: f5b0 0f00 cmpcs.w r0, #8388608 ; 0x800000
|
||
8000cc0: d2ed bcs.n 8000c9e <__addsf3+0x92>
|
||
8000cc2: fab0 fc80 clz ip, r0
|
||
8000cc6: f1ac 0c08 sub.w ip, ip, #8
|
||
8000cca: ebb2 020c subs.w r2, r2, ip
|
||
8000cce: fa00 f00c lsl.w r0, r0, ip
|
||
8000cd2: bfaa itet ge
|
||
8000cd4: eb00 50c2 addge.w r0, r0, r2, lsl #23
|
||
8000cd8: 4252 neglt r2, r2
|
||
8000cda: 4318 orrge r0, r3
|
||
8000cdc: bfbc itt lt
|
||
8000cde: 40d0 lsrlt r0, r2
|
||
8000ce0: 4318 orrlt r0, r3
|
||
8000ce2: 4770 bx lr
|
||
8000ce4: f092 0f00 teq r2, #0
|
||
8000ce8: f481 0100 eor.w r1, r1, #8388608 ; 0x800000
|
||
8000cec: bf06 itte eq
|
||
8000cee: f480 0000 eoreq.w r0, r0, #8388608 ; 0x800000
|
||
8000cf2: 3201 addeq r2, #1
|
||
8000cf4: 3b01 subne r3, #1
|
||
8000cf6: e7b5 b.n 8000c64 <__addsf3+0x58>
|
||
8000cf8: ea4f 0341 mov.w r3, r1, lsl #1
|
||
8000cfc: ea7f 6c22 mvns.w ip, r2, asr #24
|
||
8000d00: bf18 it ne
|
||
8000d02: ea7f 6c23 mvnsne.w ip, r3, asr #24
|
||
8000d06: d021 beq.n 8000d4c <__addsf3+0x140>
|
||
8000d08: ea92 0f03 teq r2, r3
|
||
8000d0c: d004 beq.n 8000d18 <__addsf3+0x10c>
|
||
8000d0e: f092 0f00 teq r2, #0
|
||
8000d12: bf08 it eq
|
||
8000d14: 4608 moveq r0, r1
|
||
8000d16: 4770 bx lr
|
||
8000d18: ea90 0f01 teq r0, r1
|
||
8000d1c: bf1c itt ne
|
||
8000d1e: 2000 movne r0, #0
|
||
8000d20: 4770 bxne lr
|
||
8000d22: f012 4f7f tst.w r2, #4278190080 ; 0xff000000
|
||
8000d26: d104 bne.n 8000d32 <__addsf3+0x126>
|
||
8000d28: 0040 lsls r0, r0, #1
|
||
8000d2a: bf28 it cs
|
||
8000d2c: f040 4000 orrcs.w r0, r0, #2147483648 ; 0x80000000
|
||
8000d30: 4770 bx lr
|
||
8000d32: f112 7200 adds.w r2, r2, #33554432 ; 0x2000000
|
||
8000d36: bf3c itt cc
|
||
8000d38: f500 0000 addcc.w r0, r0, #8388608 ; 0x800000
|
||
8000d3c: 4770 bxcc lr
|
||
8000d3e: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000
|
||
8000d42: f043 40fe orr.w r0, r3, #2130706432 ; 0x7f000000
|
||
8000d46: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000d4a: 4770 bx lr
|
||
8000d4c: ea7f 6222 mvns.w r2, r2, asr #24
|
||
8000d50: bf16 itet ne
|
||
8000d52: 4608 movne r0, r1
|
||
8000d54: ea7f 6323 mvnseq.w r3, r3, asr #24
|
||
8000d58: 4601 movne r1, r0
|
||
8000d5a: 0242 lsls r2, r0, #9
|
||
8000d5c: bf06 itte eq
|
||
8000d5e: ea5f 2341 movseq.w r3, r1, lsl #9
|
||
8000d62: ea90 0f01 teqeq r0, r1
|
||
8000d66: f440 0080 orrne.w r0, r0, #4194304 ; 0x400000
|
||
8000d6a: 4770 bx lr
|
||
|
||
08000d6c <__aeabi_ui2f>:
|
||
8000d6c: f04f 0300 mov.w r3, #0
|
||
8000d70: e004 b.n 8000d7c <__aeabi_i2f+0x8>
|
||
8000d72: bf00 nop
|
||
|
||
08000d74 <__aeabi_i2f>:
|
||
8000d74: f010 4300 ands.w r3, r0, #2147483648 ; 0x80000000
|
||
8000d78: bf48 it mi
|
||
8000d7a: 4240 negmi r0, r0
|
||
8000d7c: ea5f 0c00 movs.w ip, r0
|
||
8000d80: bf08 it eq
|
||
8000d82: 4770 bxeq lr
|
||
8000d84: f043 4396 orr.w r3, r3, #1258291200 ; 0x4b000000
|
||
8000d88: 4601 mov r1, r0
|
||
8000d8a: f04f 0000 mov.w r0, #0
|
||
8000d8e: e01c b.n 8000dca <__aeabi_l2f+0x2a>
|
||
|
||
08000d90 <__aeabi_ul2f>:
|
||
8000d90: ea50 0201 orrs.w r2, r0, r1
|
||
8000d94: bf08 it eq
|
||
8000d96: 4770 bxeq lr
|
||
8000d98: f04f 0300 mov.w r3, #0
|
||
8000d9c: e00a b.n 8000db4 <__aeabi_l2f+0x14>
|
||
8000d9e: bf00 nop
|
||
|
||
08000da0 <__aeabi_l2f>:
|
||
8000da0: ea50 0201 orrs.w r2, r0, r1
|
||
8000da4: bf08 it eq
|
||
8000da6: 4770 bxeq lr
|
||
8000da8: f011 4300 ands.w r3, r1, #2147483648 ; 0x80000000
|
||
8000dac: d502 bpl.n 8000db4 <__aeabi_l2f+0x14>
|
||
8000dae: 4240 negs r0, r0
|
||
8000db0: eb61 0141 sbc.w r1, r1, r1, lsl #1
|
||
8000db4: ea5f 0c01 movs.w ip, r1
|
||
8000db8: bf02 ittt eq
|
||
8000dba: 4684 moveq ip, r0
|
||
8000dbc: 4601 moveq r1, r0
|
||
8000dbe: 2000 moveq r0, #0
|
||
8000dc0: f043 43b6 orr.w r3, r3, #1526726656 ; 0x5b000000
|
||
8000dc4: bf08 it eq
|
||
8000dc6: f1a3 5380 subeq.w r3, r3, #268435456 ; 0x10000000
|
||
8000dca: f5a3 0300 sub.w r3, r3, #8388608 ; 0x800000
|
||
8000dce: fabc f28c clz r2, ip
|
||
8000dd2: 3a08 subs r2, #8
|
||
8000dd4: eba3 53c2 sub.w r3, r3, r2, lsl #23
|
||
8000dd8: db10 blt.n 8000dfc <__aeabi_l2f+0x5c>
|
||
8000dda: fa01 fc02 lsl.w ip, r1, r2
|
||
8000dde: 4463 add r3, ip
|
||
8000de0: fa00 fc02 lsl.w ip, r0, r2
|
||
8000de4: f1c2 0220 rsb r2, r2, #32
|
||
8000de8: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000
|
||
8000dec: fa20 f202 lsr.w r2, r0, r2
|
||
8000df0: eb43 0002 adc.w r0, r3, r2
|
||
8000df4: bf08 it eq
|
||
8000df6: f020 0001 biceq.w r0, r0, #1
|
||
8000dfa: 4770 bx lr
|
||
8000dfc: f102 0220 add.w r2, r2, #32
|
||
8000e00: fa01 fc02 lsl.w ip, r1, r2
|
||
8000e04: f1c2 0220 rsb r2, r2, #32
|
||
8000e08: ea50 004c orrs.w r0, r0, ip, lsl #1
|
||
8000e0c: fa21 f202 lsr.w r2, r1, r2
|
||
8000e10: eb43 0002 adc.w r0, r3, r2
|
||
8000e14: bf08 it eq
|
||
8000e16: ea20 70dc biceq.w r0, r0, ip, lsr #31
|
||
8000e1a: 4770 bx lr
|
||
|
||
08000e1c <__aeabi_fmul>:
|
||
8000e1c: f04f 0cff mov.w ip, #255 ; 0xff
|
||
8000e20: ea1c 52d0 ands.w r2, ip, r0, lsr #23
|
||
8000e24: bf1e ittt ne
|
||
8000e26: ea1c 53d1 andsne.w r3, ip, r1, lsr #23
|
||
8000e2a: ea92 0f0c teqne r2, ip
|
||
8000e2e: ea93 0f0c teqne r3, ip
|
||
8000e32: d06f beq.n 8000f14 <__aeabi_fmul+0xf8>
|
||
8000e34: 441a add r2, r3
|
||
8000e36: ea80 0c01 eor.w ip, r0, r1
|
||
8000e3a: 0240 lsls r0, r0, #9
|
||
8000e3c: bf18 it ne
|
||
8000e3e: ea5f 2141 movsne.w r1, r1, lsl #9
|
||
8000e42: d01e beq.n 8000e82 <__aeabi_fmul+0x66>
|
||
8000e44: f04f 6300 mov.w r3, #134217728 ; 0x8000000
|
||
8000e48: ea43 1050 orr.w r0, r3, r0, lsr #5
|
||
8000e4c: ea43 1151 orr.w r1, r3, r1, lsr #5
|
||
8000e50: fba0 3101 umull r3, r1, r0, r1
|
||
8000e54: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000
|
||
8000e58: f5b1 0f00 cmp.w r1, #8388608 ; 0x800000
|
||
8000e5c: bf3e ittt cc
|
||
8000e5e: 0049 lslcc r1, r1, #1
|
||
8000e60: ea41 71d3 orrcc.w r1, r1, r3, lsr #31
|
||
8000e64: 005b lslcc r3, r3, #1
|
||
8000e66: ea40 0001 orr.w r0, r0, r1
|
||
8000e6a: f162 027f sbc.w r2, r2, #127 ; 0x7f
|
||
8000e6e: 2afd cmp r2, #253 ; 0xfd
|
||
8000e70: d81d bhi.n 8000eae <__aeabi_fmul+0x92>
|
||
8000e72: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000
|
||
8000e76: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
||
8000e7a: bf08 it eq
|
||
8000e7c: f020 0001 biceq.w r0, r0, #1
|
||
8000e80: 4770 bx lr
|
||
8000e82: f090 0f00 teq r0, #0
|
||
8000e86: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000
|
||
8000e8a: bf08 it eq
|
||
8000e8c: 0249 lsleq r1, r1, #9
|
||
8000e8e: ea4c 2050 orr.w r0, ip, r0, lsr #9
|
||
8000e92: ea40 2051 orr.w r0, r0, r1, lsr #9
|
||
8000e96: 3a7f subs r2, #127 ; 0x7f
|
||
8000e98: bfc2 ittt gt
|
||
8000e9a: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff
|
||
8000e9e: ea40 50c2 orrgt.w r0, r0, r2, lsl #23
|
||
8000ea2: 4770 bxgt lr
|
||
8000ea4: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000ea8: f04f 0300 mov.w r3, #0
|
||
8000eac: 3a01 subs r2, #1
|
||
8000eae: dc5d bgt.n 8000f6c <__aeabi_fmul+0x150>
|
||
8000eb0: f112 0f19 cmn.w r2, #25
|
||
8000eb4: bfdc itt le
|
||
8000eb6: f000 4000 andle.w r0, r0, #2147483648 ; 0x80000000
|
||
8000eba: 4770 bxle lr
|
||
8000ebc: f1c2 0200 rsb r2, r2, #0
|
||
8000ec0: 0041 lsls r1, r0, #1
|
||
8000ec2: fa21 f102 lsr.w r1, r1, r2
|
||
8000ec6: f1c2 0220 rsb r2, r2, #32
|
||
8000eca: fa00 fc02 lsl.w ip, r0, r2
|
||
8000ece: ea5f 0031 movs.w r0, r1, rrx
|
||
8000ed2: f140 0000 adc.w r0, r0, #0
|
||
8000ed6: ea53 034c orrs.w r3, r3, ip, lsl #1
|
||
8000eda: bf08 it eq
|
||
8000edc: ea20 70dc biceq.w r0, r0, ip, lsr #31
|
||
8000ee0: 4770 bx lr
|
||
8000ee2: f092 0f00 teq r2, #0
|
||
8000ee6: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000
|
||
8000eea: bf02 ittt eq
|
||
8000eec: 0040 lsleq r0, r0, #1
|
||
8000eee: f410 0f00 tsteq.w r0, #8388608 ; 0x800000
|
||
8000ef2: 3a01 subeq r2, #1
|
||
8000ef4: d0f9 beq.n 8000eea <__aeabi_fmul+0xce>
|
||
8000ef6: ea40 000c orr.w r0, r0, ip
|
||
8000efa: f093 0f00 teq r3, #0
|
||
8000efe: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
||
8000f02: bf02 ittt eq
|
||
8000f04: 0049 lsleq r1, r1, #1
|
||
8000f06: f411 0f00 tsteq.w r1, #8388608 ; 0x800000
|
||
8000f0a: 3b01 subeq r3, #1
|
||
8000f0c: d0f9 beq.n 8000f02 <__aeabi_fmul+0xe6>
|
||
8000f0e: ea41 010c orr.w r1, r1, ip
|
||
8000f12: e78f b.n 8000e34 <__aeabi_fmul+0x18>
|
||
8000f14: ea0c 53d1 and.w r3, ip, r1, lsr #23
|
||
8000f18: ea92 0f0c teq r2, ip
|
||
8000f1c: bf18 it ne
|
||
8000f1e: ea93 0f0c teqne r3, ip
|
||
8000f22: d00a beq.n 8000f3a <__aeabi_fmul+0x11e>
|
||
8000f24: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000
|
||
8000f28: bf18 it ne
|
||
8000f2a: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000
|
||
8000f2e: d1d8 bne.n 8000ee2 <__aeabi_fmul+0xc6>
|
||
8000f30: ea80 0001 eor.w r0, r0, r1
|
||
8000f34: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000
|
||
8000f38: 4770 bx lr
|
||
8000f3a: f090 0f00 teq r0, #0
|
||
8000f3e: bf17 itett ne
|
||
8000f40: f090 4f00 teqne r0, #2147483648 ; 0x80000000
|
||
8000f44: 4608 moveq r0, r1
|
||
8000f46: f091 0f00 teqne r1, #0
|
||
8000f4a: f091 4f00 teqne r1, #2147483648 ; 0x80000000
|
||
8000f4e: d014 beq.n 8000f7a <__aeabi_fmul+0x15e>
|
||
8000f50: ea92 0f0c teq r2, ip
|
||
8000f54: d101 bne.n 8000f5a <__aeabi_fmul+0x13e>
|
||
8000f56: 0242 lsls r2, r0, #9
|
||
8000f58: d10f bne.n 8000f7a <__aeabi_fmul+0x15e>
|
||
8000f5a: ea93 0f0c teq r3, ip
|
||
8000f5e: d103 bne.n 8000f68 <__aeabi_fmul+0x14c>
|
||
8000f60: 024b lsls r3, r1, #9
|
||
8000f62: bf18 it ne
|
||
8000f64: 4608 movne r0, r1
|
||
8000f66: d108 bne.n 8000f7a <__aeabi_fmul+0x15e>
|
||
8000f68: ea80 0001 eor.w r0, r0, r1
|
||
8000f6c: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000
|
||
8000f70: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
||
8000f74: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000f78: 4770 bx lr
|
||
8000f7a: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
||
8000f7e: f440 0040 orr.w r0, r0, #12582912 ; 0xc00000
|
||
8000f82: 4770 bx lr
|
||
|
||
08000f84 <__aeabi_fdiv>:
|
||
8000f84: f04f 0cff mov.w ip, #255 ; 0xff
|
||
8000f88: ea1c 52d0 ands.w r2, ip, r0, lsr #23
|
||
8000f8c: bf1e ittt ne
|
||
8000f8e: ea1c 53d1 andsne.w r3, ip, r1, lsr #23
|
||
8000f92: ea92 0f0c teqne r2, ip
|
||
8000f96: ea93 0f0c teqne r3, ip
|
||
8000f9a: d069 beq.n 8001070 <__aeabi_fdiv+0xec>
|
||
8000f9c: eba2 0203 sub.w r2, r2, r3
|
||
8000fa0: ea80 0c01 eor.w ip, r0, r1
|
||
8000fa4: 0249 lsls r1, r1, #9
|
||
8000fa6: ea4f 2040 mov.w r0, r0, lsl #9
|
||
8000faa: d037 beq.n 800101c <__aeabi_fdiv+0x98>
|
||
8000fac: f04f 5380 mov.w r3, #268435456 ; 0x10000000
|
||
8000fb0: ea43 1111 orr.w r1, r3, r1, lsr #4
|
||
8000fb4: ea43 1310 orr.w r3, r3, r0, lsr #4
|
||
8000fb8: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000
|
||
8000fbc: 428b cmp r3, r1
|
||
8000fbe: bf38 it cc
|
||
8000fc0: 005b lslcc r3, r3, #1
|
||
8000fc2: f142 027d adc.w r2, r2, #125 ; 0x7d
|
||
8000fc6: f44f 0c00 mov.w ip, #8388608 ; 0x800000
|
||
8000fca: 428b cmp r3, r1
|
||
8000fcc: bf24 itt cs
|
||
8000fce: 1a5b subcs r3, r3, r1
|
||
8000fd0: ea40 000c orrcs.w r0, r0, ip
|
||
8000fd4: ebb3 0f51 cmp.w r3, r1, lsr #1
|
||
8000fd8: bf24 itt cs
|
||
8000fda: eba3 0351 subcs.w r3, r3, r1, lsr #1
|
||
8000fde: ea40 005c orrcs.w r0, r0, ip, lsr #1
|
||
8000fe2: ebb3 0f91 cmp.w r3, r1, lsr #2
|
||
8000fe6: bf24 itt cs
|
||
8000fe8: eba3 0391 subcs.w r3, r3, r1, lsr #2
|
||
8000fec: ea40 009c orrcs.w r0, r0, ip, lsr #2
|
||
8000ff0: ebb3 0fd1 cmp.w r3, r1, lsr #3
|
||
8000ff4: bf24 itt cs
|
||
8000ff6: eba3 03d1 subcs.w r3, r3, r1, lsr #3
|
||
8000ffa: ea40 00dc orrcs.w r0, r0, ip, lsr #3
|
||
8000ffe: 011b lsls r3, r3, #4
|
||
8001000: bf18 it ne
|
||
8001002: ea5f 1c1c movsne.w ip, ip, lsr #4
|
||
8001006: d1e0 bne.n 8000fca <__aeabi_fdiv+0x46>
|
||
8001008: 2afd cmp r2, #253 ; 0xfd
|
||
800100a: f63f af50 bhi.w 8000eae <__aeabi_fmul+0x92>
|
||
800100e: 428b cmp r3, r1
|
||
8001010: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
||
8001014: bf08 it eq
|
||
8001016: f020 0001 biceq.w r0, r0, #1
|
||
800101a: 4770 bx lr
|
||
800101c: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000
|
||
8001020: ea4c 2050 orr.w r0, ip, r0, lsr #9
|
||
8001024: 327f adds r2, #127 ; 0x7f
|
||
8001026: bfc2 ittt gt
|
||
8001028: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff
|
||
800102c: ea40 50c2 orrgt.w r0, r0, r2, lsl #23
|
||
8001030: 4770 bxgt lr
|
||
8001032: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8001036: f04f 0300 mov.w r3, #0
|
||
800103a: 3a01 subs r2, #1
|
||
800103c: e737 b.n 8000eae <__aeabi_fmul+0x92>
|
||
800103e: f092 0f00 teq r2, #0
|
||
8001042: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000
|
||
8001046: bf02 ittt eq
|
||
8001048: 0040 lsleq r0, r0, #1
|
||
800104a: f410 0f00 tsteq.w r0, #8388608 ; 0x800000
|
||
800104e: 3a01 subeq r2, #1
|
||
8001050: d0f9 beq.n 8001046 <__aeabi_fdiv+0xc2>
|
||
8001052: ea40 000c orr.w r0, r0, ip
|
||
8001056: f093 0f00 teq r3, #0
|
||
800105a: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
||
800105e: bf02 ittt eq
|
||
8001060: 0049 lsleq r1, r1, #1
|
||
8001062: f411 0f00 tsteq.w r1, #8388608 ; 0x800000
|
||
8001066: 3b01 subeq r3, #1
|
||
8001068: d0f9 beq.n 800105e <__aeabi_fdiv+0xda>
|
||
800106a: ea41 010c orr.w r1, r1, ip
|
||
800106e: e795 b.n 8000f9c <__aeabi_fdiv+0x18>
|
||
8001070: ea0c 53d1 and.w r3, ip, r1, lsr #23
|
||
8001074: ea92 0f0c teq r2, ip
|
||
8001078: d108 bne.n 800108c <__aeabi_fdiv+0x108>
|
||
800107a: 0242 lsls r2, r0, #9
|
||
800107c: f47f af7d bne.w 8000f7a <__aeabi_fmul+0x15e>
|
||
8001080: ea93 0f0c teq r3, ip
|
||
8001084: f47f af70 bne.w 8000f68 <__aeabi_fmul+0x14c>
|
||
8001088: 4608 mov r0, r1
|
||
800108a: e776 b.n 8000f7a <__aeabi_fmul+0x15e>
|
||
800108c: ea93 0f0c teq r3, ip
|
||
8001090: d104 bne.n 800109c <__aeabi_fdiv+0x118>
|
||
8001092: 024b lsls r3, r1, #9
|
||
8001094: f43f af4c beq.w 8000f30 <__aeabi_fmul+0x114>
|
||
8001098: 4608 mov r0, r1
|
||
800109a: e76e b.n 8000f7a <__aeabi_fmul+0x15e>
|
||
800109c: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000
|
||
80010a0: bf18 it ne
|
||
80010a2: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000
|
||
80010a6: d1ca bne.n 800103e <__aeabi_fdiv+0xba>
|
||
80010a8: f030 4200 bics.w r2, r0, #2147483648 ; 0x80000000
|
||
80010ac: f47f af5c bne.w 8000f68 <__aeabi_fmul+0x14c>
|
||
80010b0: f031 4300 bics.w r3, r1, #2147483648 ; 0x80000000
|
||
80010b4: f47f af3c bne.w 8000f30 <__aeabi_fmul+0x114>
|
||
80010b8: e75f b.n 8000f7a <__aeabi_fmul+0x15e>
|
||
80010ba: bf00 nop
|
||
|
||
080010bc <__aeabi_f2iz>:
|
||
80010bc: ea4f 0240 mov.w r2, r0, lsl #1
|
||
80010c0: f1b2 4ffe cmp.w r2, #2130706432 ; 0x7f000000
|
||
80010c4: d30f bcc.n 80010e6 <__aeabi_f2iz+0x2a>
|
||
80010c6: f04f 039e mov.w r3, #158 ; 0x9e
|
||
80010ca: ebb3 6212 subs.w r2, r3, r2, lsr #24
|
||
80010ce: d90d bls.n 80010ec <__aeabi_f2iz+0x30>
|
||
80010d0: ea4f 2300 mov.w r3, r0, lsl #8
|
||
80010d4: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
||
80010d8: f010 4f00 tst.w r0, #2147483648 ; 0x80000000
|
||
80010dc: fa23 f002 lsr.w r0, r3, r2
|
||
80010e0: bf18 it ne
|
||
80010e2: 4240 negne r0, r0
|
||
80010e4: 4770 bx lr
|
||
80010e6: f04f 0000 mov.w r0, #0
|
||
80010ea: 4770 bx lr
|
||
80010ec: f112 0f61 cmn.w r2, #97 ; 0x61
|
||
80010f0: d101 bne.n 80010f6 <__aeabi_f2iz+0x3a>
|
||
80010f2: 0242 lsls r2, r0, #9
|
||
80010f4: d105 bne.n 8001102 <__aeabi_f2iz+0x46>
|
||
80010f6: f010 4000 ands.w r0, r0, #2147483648 ; 0x80000000
|
||
80010fa: bf08 it eq
|
||
80010fc: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000
|
||
8001100: 4770 bx lr
|
||
8001102: f04f 0000 mov.w r0, #0
|
||
8001106: 4770 bx lr
|
||
|
||
08001108 <main>:
|
||
/**
|
||
* @brief The application entry point.
|
||
* @retval int
|
||
*/
|
||
int main(void)
|
||
{
|
||
8001108: b580 push {r7, lr}
|
||
800110a: af00 add r7, sp, #0
|
||
/* USER CODE END 1 */
|
||
|
||
/* MCU Configuration--------------------------------------------------------*/
|
||
|
||
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
||
HAL_Init();
|
||
800110c: f000 fb64 bl 80017d8 <HAL_Init>
|
||
/* USER CODE BEGIN Init */
|
||
|
||
/* USER CODE END Init */
|
||
|
||
/* Configure the system clock */
|
||
SystemClock_Config();
|
||
8001110: f000 f809 bl 8001126 <SystemClock_Config>
|
||
/* USER CODE BEGIN SysInit */
|
||
|
||
/* USER CODE END SysInit */
|
||
|
||
/* Initialize all configured peripherals */
|
||
MX_GPIO_Init();
|
||
8001114: f000 f87a bl 800120c <MX_GPIO_Init>
|
||
MX_FSMC_Init();
|
||
8001118: f000 f910 bl 800133c <MX_FSMC_Init>
|
||
MX_I2C2_Init();
|
||
800111c: f000 f848 bl 80011b0 <MX_I2C2_Init>
|
||
/* USER CODE BEGIN 2 */
|
||
main_app();
|
||
8001120: f004 f81e bl 8005160 <main_app>
|
||
/* USER CODE END 2 */
|
||
|
||
/* Infinite loop */
|
||
/* USER CODE BEGIN WHILE */
|
||
while (1)
|
||
8001124: e7fe b.n 8001124 <main+0x1c>
|
||
|
||
08001126 <SystemClock_Config>:
|
||
/**
|
||
* @brief System Clock Configuration
|
||
* @retval None
|
||
*/
|
||
void SystemClock_Config(void)
|
||
{
|
||
8001126: b580 push {r7, lr}
|
||
8001128: b090 sub sp, #64 ; 0x40
|
||
800112a: af00 add r7, sp, #0
|
||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||
800112c: f107 0318 add.w r3, r7, #24
|
||
8001130: 2228 movs r2, #40 ; 0x28
|
||
8001132: 2100 movs r1, #0
|
||
8001134: 4618 mov r0, r3
|
||
8001136: f004 fa25 bl 8005584 <memset>
|
||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||
800113a: 1d3b adds r3, r7, #4
|
||
800113c: 2200 movs r2, #0
|
||
800113e: 601a str r2, [r3, #0]
|
||
8001140: 605a str r2, [r3, #4]
|
||
8001142: 609a str r2, [r3, #8]
|
||
8001144: 60da str r2, [r3, #12]
|
||
8001146: 611a str r2, [r3, #16]
|
||
|
||
/** Initializes the RCC Oscillators according to the specified parameters
|
||
* in the RCC_OscInitTypeDef structure.
|
||
*/
|
||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||
8001148: 2301 movs r3, #1
|
||
800114a: 61bb str r3, [r7, #24]
|
||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||
800114c: f44f 3380 mov.w r3, #65536 ; 0x10000
|
||
8001150: 61fb str r3, [r7, #28]
|
||
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
|
||
8001152: 2300 movs r3, #0
|
||
8001154: 623b str r3, [r7, #32]
|
||
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||
8001156: 2301 movs r3, #1
|
||
8001158: 62bb str r3, [r7, #40] ; 0x28
|
||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||
800115a: 2302 movs r3, #2
|
||
800115c: 637b str r3, [r7, #52] ; 0x34
|
||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||
800115e: f44f 3380 mov.w r3, #65536 ; 0x10000
|
||
8001162: 63bb str r3, [r7, #56] ; 0x38
|
||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
|
||
8001164: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
|
||
8001168: 63fb str r3, [r7, #60] ; 0x3c
|
||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||
800116a: f107 0318 add.w r3, r7, #24
|
||
800116e: 4618 mov r0, r3
|
||
8001170: f001 fe60 bl 8002e34 <HAL_RCC_OscConfig>
|
||
8001174: 4603 mov r3, r0
|
||
8001176: 2b00 cmp r3, #0
|
||
8001178: d001 beq.n 800117e <SystemClock_Config+0x58>
|
||
{
|
||
Error_Handler();
|
||
800117a: f000 f943 bl 8001404 <Error_Handler>
|
||
}
|
||
/** Initializes the CPU, AHB and APB buses clocks
|
||
*/
|
||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||
800117e: 230f movs r3, #15
|
||
8001180: 607b str r3, [r7, #4]
|
||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||
8001182: 2302 movs r3, #2
|
||
8001184: 60bb str r3, [r7, #8]
|
||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||
8001186: 2300 movs r3, #0
|
||
8001188: 60fb str r3, [r7, #12]
|
||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
||
800118a: f44f 6380 mov.w r3, #1024 ; 0x400
|
||
800118e: 613b str r3, [r7, #16]
|
||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||
8001190: 2300 movs r3, #0
|
||
8001192: 617b str r3, [r7, #20]
|
||
|
||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
|
||
8001194: 1d3b adds r3, r7, #4
|
||
8001196: 2102 movs r1, #2
|
||
8001198: 4618 mov r0, r3
|
||
800119a: f002 f8cb bl 8003334 <HAL_RCC_ClockConfig>
|
||
800119e: 4603 mov r3, r0
|
||
80011a0: 2b00 cmp r3, #0
|
||
80011a2: d001 beq.n 80011a8 <SystemClock_Config+0x82>
|
||
{
|
||
Error_Handler();
|
||
80011a4: f000 f92e bl 8001404 <Error_Handler>
|
||
}
|
||
}
|
||
80011a8: bf00 nop
|
||
80011aa: 3740 adds r7, #64 ; 0x40
|
||
80011ac: 46bd mov sp, r7
|
||
80011ae: bd80 pop {r7, pc}
|
||
|
||
080011b0 <MX_I2C2_Init>:
|
||
* @brief I2C2 Initialization Function
|
||
* @param None
|
||
* @retval None
|
||
*/
|
||
static void MX_I2C2_Init(void)
|
||
{
|
||
80011b0: b580 push {r7, lr}
|
||
80011b2: af00 add r7, sp, #0
|
||
/* USER CODE END I2C2_Init 0 */
|
||
|
||
/* USER CODE BEGIN I2C2_Init 1 */
|
||
|
||
/* USER CODE END I2C2_Init 1 */
|
||
hi2c2.Instance = I2C2;
|
||
80011b4: 4b12 ldr r3, [pc, #72] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011b6: 4a13 ldr r2, [pc, #76] ; (8001204 <MX_I2C2_Init+0x54>)
|
||
80011b8: 601a str r2, [r3, #0]
|
||
hi2c2.Init.ClockSpeed = 100000;
|
||
80011ba: 4b11 ldr r3, [pc, #68] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011bc: 4a12 ldr r2, [pc, #72] ; (8001208 <MX_I2C2_Init+0x58>)
|
||
80011be: 605a str r2, [r3, #4]
|
||
hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
|
||
80011c0: 4b0f ldr r3, [pc, #60] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011c2: 2200 movs r2, #0
|
||
80011c4: 609a str r2, [r3, #8]
|
||
hi2c2.Init.OwnAddress1 = 0;
|
||
80011c6: 4b0e ldr r3, [pc, #56] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011c8: 2200 movs r2, #0
|
||
80011ca: 60da str r2, [r3, #12]
|
||
hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
||
80011cc: 4b0c ldr r3, [pc, #48] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011ce: f44f 4280 mov.w r2, #16384 ; 0x4000
|
||
80011d2: 611a str r2, [r3, #16]
|
||
hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
|
||
80011d4: 4b0a ldr r3, [pc, #40] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011d6: 2200 movs r2, #0
|
||
80011d8: 615a str r2, [r3, #20]
|
||
hi2c2.Init.OwnAddress2 = 0;
|
||
80011da: 4b09 ldr r3, [pc, #36] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011dc: 2200 movs r2, #0
|
||
80011de: 619a str r2, [r3, #24]
|
||
hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
|
||
80011e0: 4b07 ldr r3, [pc, #28] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011e2: 2200 movs r2, #0
|
||
80011e4: 61da str r2, [r3, #28]
|
||
hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
||
80011e6: 4b06 ldr r3, [pc, #24] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011e8: 2200 movs r2, #0
|
||
80011ea: 621a str r2, [r3, #32]
|
||
if (HAL_I2C_Init(&hi2c2) != HAL_OK)
|
||
80011ec: 4804 ldr r0, [pc, #16] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011ee: f000 fe21 bl 8001e34 <HAL_I2C_Init>
|
||
80011f2: 4603 mov r3, r0
|
||
80011f4: 2b00 cmp r3, #0
|
||
80011f6: d001 beq.n 80011fc <MX_I2C2_Init+0x4c>
|
||
{
|
||
Error_Handler();
|
||
80011f8: f000 f904 bl 8001404 <Error_Handler>
|
||
}
|
||
/* USER CODE BEGIN I2C2_Init 2 */
|
||
|
||
/* USER CODE END I2C2_Init 2 */
|
||
|
||
}
|
||
80011fc: bf00 nop
|
||
80011fe: bd80 pop {r7, pc}
|
||
8001200: 20000208 .word 0x20000208
|
||
8001204: 40005800 .word 0x40005800
|
||
8001208: 000186a0 .word 0x000186a0
|
||
|
||
0800120c <MX_GPIO_Init>:
|
||
* @brief GPIO Initialization Function
|
||
* @param None
|
||
* @retval None
|
||
*/
|
||
static void MX_GPIO_Init(void)
|
||
{
|
||
800120c: b580 push {r7, lr}
|
||
800120e: b08a sub sp, #40 ; 0x28
|
||
8001210: af00 add r7, sp, #0
|
||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||
8001212: f107 0318 add.w r3, r7, #24
|
||
8001216: 2200 movs r2, #0
|
||
8001218: 601a str r2, [r3, #0]
|
||
800121a: 605a str r2, [r3, #4]
|
||
800121c: 609a str r2, [r3, #8]
|
||
800121e: 60da str r2, [r3, #12]
|
||
|
||
/* GPIO Ports Clock Enable */
|
||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||
8001220: 4b43 ldr r3, [pc, #268] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
8001222: 699b ldr r3, [r3, #24]
|
||
8001224: 4a42 ldr r2, [pc, #264] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
8001226: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
800122a: 6193 str r3, [r2, #24]
|
||
800122c: 4b40 ldr r3, [pc, #256] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
800122e: 699b ldr r3, [r3, #24]
|
||
8001230: f003 0380 and.w r3, r3, #128 ; 0x80
|
||
8001234: 617b str r3, [r7, #20]
|
||
8001236: 697b ldr r3, [r7, #20]
|
||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||
8001238: 4b3d ldr r3, [pc, #244] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
800123a: 699b ldr r3, [r3, #24]
|
||
800123c: 4a3c ldr r2, [pc, #240] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
800123e: f043 0308 orr.w r3, r3, #8
|
||
8001242: 6193 str r3, [r2, #24]
|
||
8001244: 4b3a ldr r3, [pc, #232] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
8001246: 699b ldr r3, [r3, #24]
|
||
8001248: f003 0308 and.w r3, r3, #8
|
||
800124c: 613b str r3, [r7, #16]
|
||
800124e: 693b ldr r3, [r7, #16]
|
||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||
8001250: 4b37 ldr r3, [pc, #220] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
8001252: 699b ldr r3, [r3, #24]
|
||
8001254: 4a36 ldr r2, [pc, #216] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
8001256: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
800125a: 6193 str r3, [r2, #24]
|
||
800125c: 4b34 ldr r3, [pc, #208] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
800125e: 699b ldr r3, [r3, #24]
|
||
8001260: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8001264: 60fb str r3, [r7, #12]
|
||
8001266: 68fb ldr r3, [r7, #12]
|
||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||
8001268: 4b31 ldr r3, [pc, #196] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
800126a: 699b ldr r3, [r3, #24]
|
||
800126c: 4a30 ldr r2, [pc, #192] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
800126e: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8001272: 6193 str r3, [r2, #24]
|
||
8001274: 4b2e ldr r3, [pc, #184] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
8001276: 699b ldr r3, [r3, #24]
|
||
8001278: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
800127c: 60bb str r3, [r7, #8]
|
||
800127e: 68bb ldr r3, [r7, #8]
|
||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||
8001280: 4b2b ldr r3, [pc, #172] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
8001282: 699b ldr r3, [r3, #24]
|
||
8001284: 4a2a ldr r2, [pc, #168] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
8001286: f043 0320 orr.w r3, r3, #32
|
||
800128a: 6193 str r3, [r2, #24]
|
||
800128c: 4b28 ldr r3, [pc, #160] ; (8001330 <MX_GPIO_Init+0x124>)
|
||
800128e: 699b ldr r3, [r3, #24]
|
||
8001290: f003 0320 and.w r3, r3, #32
|
||
8001294: 607b str r3, [r7, #4]
|
||
8001296: 687b ldr r3, [r7, #4]
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(TDIN_GPIO_Port, TDIN_Pin, GPIO_PIN_SET);
|
||
8001298: 2201 movs r2, #1
|
||
800129a: f44f 7100 mov.w r1, #512 ; 0x200
|
||
800129e: 4825 ldr r0, [pc, #148] ; (8001334 <MX_GPIO_Init+0x128>)
|
||
80012a0: f000 fdaf bl 8001e02 <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(LCD_BL_GPIO_Port, LCD_BL_Pin, GPIO_PIN_RESET);
|
||
80012a4: 2200 movs r2, #0
|
||
80012a6: 2101 movs r1, #1
|
||
80012a8: 4823 ldr r0, [pc, #140] ; (8001338 <MX_GPIO_Init+0x12c>)
|
||
80012aa: f000 fdaa bl 8001e02 <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(GPIOB, TCLK_Pin|TCS_Pin, GPIO_PIN_SET);
|
||
80012ae: 2201 movs r2, #1
|
||
80012b0: 2106 movs r1, #6
|
||
80012b2: 4821 ldr r0, [pc, #132] ; (8001338 <MX_GPIO_Init+0x12c>)
|
||
80012b4: f000 fda5 bl 8001e02 <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pins : TDOUT_Pin TPEN_Pin */
|
||
GPIO_InitStruct.Pin = TDOUT_Pin|TPEN_Pin;
|
||
80012b8: f44f 63a0 mov.w r3, #1280 ; 0x500
|
||
80012bc: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||
80012be: 2300 movs r3, #0
|
||
80012c0: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
80012c2: 2300 movs r3, #0
|
||
80012c4: 623b str r3, [r7, #32]
|
||
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
|
||
80012c6: f107 0318 add.w r3, r7, #24
|
||
80012ca: 4619 mov r1, r3
|
||
80012cc: 4819 ldr r0, [pc, #100] ; (8001334 <MX_GPIO_Init+0x128>)
|
||
80012ce: f000 fbed bl 8001aac <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : TDIN_Pin */
|
||
GPIO_InitStruct.Pin = TDIN_Pin;
|
||
80012d2: f44f 7300 mov.w r3, #512 ; 0x200
|
||
80012d6: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
80012d8: 2301 movs r3, #1
|
||
80012da: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
80012dc: 2300 movs r3, #0
|
||
80012de: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
80012e0: 2303 movs r3, #3
|
||
80012e2: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(TDIN_GPIO_Port, &GPIO_InitStruct);
|
||
80012e4: f107 0318 add.w r3, r7, #24
|
||
80012e8: 4619 mov r1, r3
|
||
80012ea: 4812 ldr r0, [pc, #72] ; (8001334 <MX_GPIO_Init+0x128>)
|
||
80012ec: f000 fbde bl 8001aac <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : LCD_BL_Pin */
|
||
GPIO_InitStruct.Pin = LCD_BL_Pin;
|
||
80012f0: 2301 movs r3, #1
|
||
80012f2: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
80012f4: 2301 movs r3, #1
|
||
80012f6: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
80012f8: 2300 movs r3, #0
|
||
80012fa: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||
80012fc: 2302 movs r3, #2
|
||
80012fe: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(LCD_BL_GPIO_Port, &GPIO_InitStruct);
|
||
8001300: f107 0318 add.w r3, r7, #24
|
||
8001304: 4619 mov r1, r3
|
||
8001306: 480c ldr r0, [pc, #48] ; (8001338 <MX_GPIO_Init+0x12c>)
|
||
8001308: f000 fbd0 bl 8001aac <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pins : TCLK_Pin TCS_Pin */
|
||
GPIO_InitStruct.Pin = TCLK_Pin|TCS_Pin;
|
||
800130c: 2306 movs r3, #6
|
||
800130e: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
8001310: 2301 movs r3, #1
|
||
8001312: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
8001314: 2300 movs r3, #0
|
||
8001316: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8001318: 2303 movs r3, #3
|
||
800131a: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
800131c: f107 0318 add.w r3, r7, #24
|
||
8001320: 4619 mov r1, r3
|
||
8001322: 4805 ldr r0, [pc, #20] ; (8001338 <MX_GPIO_Init+0x12c>)
|
||
8001324: f000 fbc2 bl 8001aac <HAL_GPIO_Init>
|
||
|
||
}
|
||
8001328: bf00 nop
|
||
800132a: 3728 adds r7, #40 ; 0x28
|
||
800132c: 46bd mov sp, r7
|
||
800132e: bd80 pop {r7, pc}
|
||
8001330: 40021000 .word 0x40021000
|
||
8001334: 40011c00 .word 0x40011c00
|
||
8001338: 40010c00 .word 0x40010c00
|
||
|
||
0800133c <MX_FSMC_Init>:
|
||
|
||
/* FSMC initialization function */
|
||
static void MX_FSMC_Init(void)
|
||
{
|
||
800133c: b580 push {r7, lr}
|
||
800133e: b088 sub sp, #32
|
||
8001340: af00 add r7, sp, #0
|
||
|
||
/* USER CODE BEGIN FSMC_Init 0 */
|
||
|
||
/* USER CODE END FSMC_Init 0 */
|
||
|
||
FSMC_NORSRAM_TimingTypeDef Timing = {0};
|
||
8001342: 1d3b adds r3, r7, #4
|
||
8001344: 2200 movs r2, #0
|
||
8001346: 601a str r2, [r3, #0]
|
||
8001348: 605a str r2, [r3, #4]
|
||
800134a: 609a str r2, [r3, #8]
|
||
800134c: 60da str r2, [r3, #12]
|
||
800134e: 611a str r2, [r3, #16]
|
||
8001350: 615a str r2, [r3, #20]
|
||
8001352: 619a str r2, [r3, #24]
|
||
|
||
/* USER CODE END FSMC_Init 1 */
|
||
|
||
/** Perform the SRAM1 memory initialization sequence
|
||
*/
|
||
hsram1.Instance = FSMC_NORSRAM_DEVICE;
|
||
8001354: 4b28 ldr r3, [pc, #160] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
8001356: f04f 4220 mov.w r2, #2684354560 ; 0xa0000000
|
||
800135a: 601a str r2, [r3, #0]
|
||
hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
|
||
800135c: 4b26 ldr r3, [pc, #152] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
800135e: 4a27 ldr r2, [pc, #156] ; (80013fc <MX_FSMC_Init+0xc0>)
|
||
8001360: 605a str r2, [r3, #4]
|
||
/* hsram1.Init */
|
||
hsram1.Init.NSBank = FSMC_NORSRAM_BANK4;
|
||
8001362: 4b25 ldr r3, [pc, #148] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
8001364: 2206 movs r2, #6
|
||
8001366: 609a str r2, [r3, #8]
|
||
hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
|
||
8001368: 4b23 ldr r3, [pc, #140] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
800136a: 2200 movs r2, #0
|
||
800136c: 60da str r2, [r3, #12]
|
||
hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
|
||
800136e: 4b22 ldr r3, [pc, #136] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
8001370: 2200 movs r2, #0
|
||
8001372: 611a str r2, [r3, #16]
|
||
hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
|
||
8001374: 4b20 ldr r3, [pc, #128] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
8001376: 2210 movs r2, #16
|
||
8001378: 615a str r2, [r3, #20]
|
||
hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
|
||
800137a: 4b1f ldr r3, [pc, #124] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
800137c: 2200 movs r2, #0
|
||
800137e: 619a str r2, [r3, #24]
|
||
hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
|
||
8001380: 4b1d ldr r3, [pc, #116] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
8001382: 2200 movs r2, #0
|
||
8001384: 61da str r2, [r3, #28]
|
||
hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
|
||
8001386: 4b1c ldr r3, [pc, #112] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
8001388: 2200 movs r2, #0
|
||
800138a: 621a str r2, [r3, #32]
|
||
hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
|
||
800138c: 4b1a ldr r3, [pc, #104] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
800138e: 2200 movs r2, #0
|
||
8001390: 625a str r2, [r3, #36] ; 0x24
|
||
hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
|
||
8001392: 4b19 ldr r3, [pc, #100] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
8001394: f44f 5280 mov.w r2, #4096 ; 0x1000
|
||
8001398: 629a str r2, [r3, #40] ; 0x28
|
||
hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
|
||
800139a: 4b17 ldr r3, [pc, #92] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
800139c: 2200 movs r2, #0
|
||
800139e: 62da str r2, [r3, #44] ; 0x2c
|
||
hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
|
||
80013a0: 4b15 ldr r3, [pc, #84] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
80013a2: 2200 movs r2, #0
|
||
80013a4: 631a str r2, [r3, #48] ; 0x30
|
||
hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
|
||
80013a6: 4b14 ldr r3, [pc, #80] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
80013a8: 2200 movs r2, #0
|
||
80013aa: 635a str r2, [r3, #52] ; 0x34
|
||
hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
|
||
80013ac: 4b12 ldr r3, [pc, #72] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
80013ae: 2200 movs r2, #0
|
||
80013b0: 639a str r2, [r3, #56] ; 0x38
|
||
/* Timing */
|
||
Timing.AddressSetupTime = 0;
|
||
80013b2: 2300 movs r3, #0
|
||
80013b4: 607b str r3, [r7, #4]
|
||
Timing.AddressHoldTime = 15;
|
||
80013b6: 230f movs r3, #15
|
||
80013b8: 60bb str r3, [r7, #8]
|
||
Timing.DataSetupTime = 1;
|
||
80013ba: 2301 movs r3, #1
|
||
80013bc: 60fb str r3, [r7, #12]
|
||
Timing.BusTurnAroundDuration = 0;
|
||
80013be: 2300 movs r3, #0
|
||
80013c0: 613b str r3, [r7, #16]
|
||
Timing.CLKDivision = 16;
|
||
80013c2: 2310 movs r3, #16
|
||
80013c4: 617b str r3, [r7, #20]
|
||
Timing.DataLatency = 17;
|
||
80013c6: 2311 movs r3, #17
|
||
80013c8: 61bb str r3, [r7, #24]
|
||
Timing.AccessMode = FSMC_ACCESS_MODE_A;
|
||
80013ca: 2300 movs r3, #0
|
||
80013cc: 61fb str r3, [r7, #28]
|
||
/* ExtTiming */
|
||
|
||
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
|
||
80013ce: 1d3b adds r3, r7, #4
|
||
80013d0: 2200 movs r2, #0
|
||
80013d2: 4619 mov r1, r3
|
||
80013d4: 4808 ldr r0, [pc, #32] ; (80013f8 <MX_FSMC_Init+0xbc>)
|
||
80013d6: f002 f933 bl 8003640 <HAL_SRAM_Init>
|
||
80013da: 4603 mov r3, r0
|
||
80013dc: 2b00 cmp r3, #0
|
||
80013de: d001 beq.n 80013e4 <MX_FSMC_Init+0xa8>
|
||
{
|
||
Error_Handler( );
|
||
80013e0: f000 f810 bl 8001404 <Error_Handler>
|
||
}
|
||
|
||
/** Disconnect NADV
|
||
*/
|
||
|
||
__HAL_AFIO_FSMCNADV_DISCONNECTED();
|
||
80013e4: 4b06 ldr r3, [pc, #24] ; (8001400 <MX_FSMC_Init+0xc4>)
|
||
80013e6: 69db ldr r3, [r3, #28]
|
||
80013e8: 4a05 ldr r2, [pc, #20] ; (8001400 <MX_FSMC_Init+0xc4>)
|
||
80013ea: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
||
80013ee: 61d3 str r3, [r2, #28]
|
||
|
||
/* USER CODE BEGIN FSMC_Init 2 */
|
||
|
||
/* USER CODE END FSMC_Init 2 */
|
||
}
|
||
80013f0: bf00 nop
|
||
80013f2: 3720 adds r7, #32
|
||
80013f4: 46bd mov sp, r7
|
||
80013f6: bd80 pop {r7, pc}
|
||
80013f8: 2000025c .word 0x2000025c
|
||
80013fc: a0000104 .word 0xa0000104
|
||
8001400: 40010000 .word 0x40010000
|
||
|
||
08001404 <Error_Handler>:
|
||
/**
|
||
* @brief This function is executed in case of error occurrence.
|
||
* @retval None
|
||
*/
|
||
void Error_Handler(void)
|
||
{
|
||
8001404: b480 push {r7}
|
||
8001406: af00 add r7, sp, #0
|
||
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
||
Can only be executed in Privileged modes.
|
||
*/
|
||
__STATIC_FORCEINLINE void __disable_irq(void)
|
||
{
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
8001408: b672 cpsid i
|
||
}
|
||
800140a: bf00 nop
|
||
/* USER CODE BEGIN Error_Handler_Debug */
|
||
/* User can add his own implementation to report the HAL error return state */
|
||
__disable_irq();
|
||
while (1)
|
||
800140c: e7fe b.n 800140c <Error_Handler+0x8>
|
||
...
|
||
|
||
08001410 <HAL_MspInit>:
|
||
/* USER CODE END 0 */
|
||
/**
|
||
* Initializes the Global MSP.
|
||
*/
|
||
void HAL_MspInit(void)
|
||
{
|
||
8001410: b480 push {r7}
|
||
8001412: b085 sub sp, #20
|
||
8001414: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN MspInit 0 */
|
||
|
||
/* USER CODE END MspInit 0 */
|
||
|
||
__HAL_RCC_AFIO_CLK_ENABLE();
|
||
8001416: 4b15 ldr r3, [pc, #84] ; (800146c <HAL_MspInit+0x5c>)
|
||
8001418: 699b ldr r3, [r3, #24]
|
||
800141a: 4a14 ldr r2, [pc, #80] ; (800146c <HAL_MspInit+0x5c>)
|
||
800141c: f043 0301 orr.w r3, r3, #1
|
||
8001420: 6193 str r3, [r2, #24]
|
||
8001422: 4b12 ldr r3, [pc, #72] ; (800146c <HAL_MspInit+0x5c>)
|
||
8001424: 699b ldr r3, [r3, #24]
|
||
8001426: f003 0301 and.w r3, r3, #1
|
||
800142a: 60bb str r3, [r7, #8]
|
||
800142c: 68bb ldr r3, [r7, #8]
|
||
__HAL_RCC_PWR_CLK_ENABLE();
|
||
800142e: 4b0f ldr r3, [pc, #60] ; (800146c <HAL_MspInit+0x5c>)
|
||
8001430: 69db ldr r3, [r3, #28]
|
||
8001432: 4a0e ldr r2, [pc, #56] ; (800146c <HAL_MspInit+0x5c>)
|
||
8001434: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
||
8001438: 61d3 str r3, [r2, #28]
|
||
800143a: 4b0c ldr r3, [pc, #48] ; (800146c <HAL_MspInit+0x5c>)
|
||
800143c: 69db ldr r3, [r3, #28]
|
||
800143e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
8001442: 607b str r3, [r7, #4]
|
||
8001444: 687b ldr r3, [r7, #4]
|
||
|
||
/* System interrupt init*/
|
||
|
||
/** DISABLE: JTAG-DP Disabled and SW-DP Disabled
|
||
*/
|
||
__HAL_AFIO_REMAP_SWJ_DISABLE();
|
||
8001446: 4b0a ldr r3, [pc, #40] ; (8001470 <HAL_MspInit+0x60>)
|
||
8001448: 685b ldr r3, [r3, #4]
|
||
800144a: 60fb str r3, [r7, #12]
|
||
800144c: 68fb ldr r3, [r7, #12]
|
||
800144e: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
|
||
8001452: 60fb str r3, [r7, #12]
|
||
8001454: 68fb ldr r3, [r7, #12]
|
||
8001456: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000
|
||
800145a: 60fb str r3, [r7, #12]
|
||
800145c: 4a04 ldr r2, [pc, #16] ; (8001470 <HAL_MspInit+0x60>)
|
||
800145e: 68fb ldr r3, [r7, #12]
|
||
8001460: 6053 str r3, [r2, #4]
|
||
|
||
/* USER CODE BEGIN MspInit 1 */
|
||
|
||
/* USER CODE END MspInit 1 */
|
||
}
|
||
8001462: bf00 nop
|
||
8001464: 3714 adds r7, #20
|
||
8001466: 46bd mov sp, r7
|
||
8001468: bc80 pop {r7}
|
||
800146a: 4770 bx lr
|
||
800146c: 40021000 .word 0x40021000
|
||
8001470: 40010000 .word 0x40010000
|
||
|
||
08001474 <HAL_I2C_MspInit>:
|
||
* This function configures the hardware resources used in this example
|
||
* @param hi2c: I2C handle pointer
|
||
* @retval None
|
||
*/
|
||
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
|
||
{
|
||
8001474: b580 push {r7, lr}
|
||
8001476: b088 sub sp, #32
|
||
8001478: af00 add r7, sp, #0
|
||
800147a: 6078 str r0, [r7, #4]
|
||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||
800147c: f107 0310 add.w r3, r7, #16
|
||
8001480: 2200 movs r2, #0
|
||
8001482: 601a str r2, [r3, #0]
|
||
8001484: 605a str r2, [r3, #4]
|
||
8001486: 609a str r2, [r3, #8]
|
||
8001488: 60da str r2, [r3, #12]
|
||
if(hi2c->Instance==I2C2)
|
||
800148a: 687b ldr r3, [r7, #4]
|
||
800148c: 681b ldr r3, [r3, #0]
|
||
800148e: 4a16 ldr r2, [pc, #88] ; (80014e8 <HAL_I2C_MspInit+0x74>)
|
||
8001490: 4293 cmp r3, r2
|
||
8001492: d124 bne.n 80014de <HAL_I2C_MspInit+0x6a>
|
||
{
|
||
/* USER CODE BEGIN I2C2_MspInit 0 */
|
||
|
||
/* USER CODE END I2C2_MspInit 0 */
|
||
|
||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||
8001494: 4b15 ldr r3, [pc, #84] ; (80014ec <HAL_I2C_MspInit+0x78>)
|
||
8001496: 699b ldr r3, [r3, #24]
|
||
8001498: 4a14 ldr r2, [pc, #80] ; (80014ec <HAL_I2C_MspInit+0x78>)
|
||
800149a: f043 0308 orr.w r3, r3, #8
|
||
800149e: 6193 str r3, [r2, #24]
|
||
80014a0: 4b12 ldr r3, [pc, #72] ; (80014ec <HAL_I2C_MspInit+0x78>)
|
||
80014a2: 699b ldr r3, [r3, #24]
|
||
80014a4: f003 0308 and.w r3, r3, #8
|
||
80014a8: 60fb str r3, [r7, #12]
|
||
80014aa: 68fb ldr r3, [r7, #12]
|
||
/**I2C2 GPIO Configuration
|
||
PB10 ------> I2C2_SCL
|
||
PB11 ------> I2C2_SDA
|
||
*/
|
||
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
|
||
80014ac: f44f 6340 mov.w r3, #3072 ; 0xc00
|
||
80014b0: 613b str r3, [r7, #16]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
|
||
80014b2: 2312 movs r3, #18
|
||
80014b4: 617b str r3, [r7, #20]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
80014b6: 2303 movs r3, #3
|
||
80014b8: 61fb str r3, [r7, #28]
|
||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
80014ba: f107 0310 add.w r3, r7, #16
|
||
80014be: 4619 mov r1, r3
|
||
80014c0: 480b ldr r0, [pc, #44] ; (80014f0 <HAL_I2C_MspInit+0x7c>)
|
||
80014c2: f000 faf3 bl 8001aac <HAL_GPIO_Init>
|
||
|
||
/* Peripheral clock enable */
|
||
__HAL_RCC_I2C2_CLK_ENABLE();
|
||
80014c6: 4b09 ldr r3, [pc, #36] ; (80014ec <HAL_I2C_MspInit+0x78>)
|
||
80014c8: 69db ldr r3, [r3, #28]
|
||
80014ca: 4a08 ldr r2, [pc, #32] ; (80014ec <HAL_I2C_MspInit+0x78>)
|
||
80014cc: f443 0380 orr.w r3, r3, #4194304 ; 0x400000
|
||
80014d0: 61d3 str r3, [r2, #28]
|
||
80014d2: 4b06 ldr r3, [pc, #24] ; (80014ec <HAL_I2C_MspInit+0x78>)
|
||
80014d4: 69db ldr r3, [r3, #28]
|
||
80014d6: f403 0380 and.w r3, r3, #4194304 ; 0x400000
|
||
80014da: 60bb str r3, [r7, #8]
|
||
80014dc: 68bb ldr r3, [r7, #8]
|
||
/* USER CODE BEGIN I2C2_MspInit 1 */
|
||
|
||
/* USER CODE END I2C2_MspInit 1 */
|
||
}
|
||
|
||
}
|
||
80014de: bf00 nop
|
||
80014e0: 3720 adds r7, #32
|
||
80014e2: 46bd mov sp, r7
|
||
80014e4: bd80 pop {r7, pc}
|
||
80014e6: bf00 nop
|
||
80014e8: 40005800 .word 0x40005800
|
||
80014ec: 40021000 .word 0x40021000
|
||
80014f0: 40010c00 .word 0x40010c00
|
||
|
||
080014f4 <HAL_FSMC_MspInit>:
|
||
|
||
}
|
||
|
||
static uint32_t FSMC_Initialized = 0;
|
||
|
||
static void HAL_FSMC_MspInit(void){
|
||
80014f4: b580 push {r7, lr}
|
||
80014f6: b086 sub sp, #24
|
||
80014f8: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN FSMC_MspInit 0 */
|
||
|
||
/* USER CODE END FSMC_MspInit 0 */
|
||
GPIO_InitTypeDef GPIO_InitStruct ={0};
|
||
80014fa: f107 0308 add.w r3, r7, #8
|
||
80014fe: 2200 movs r2, #0
|
||
8001500: 601a str r2, [r3, #0]
|
||
8001502: 605a str r2, [r3, #4]
|
||
8001504: 609a str r2, [r3, #8]
|
||
8001506: 60da str r2, [r3, #12]
|
||
if (FSMC_Initialized) {
|
||
8001508: 4b1f ldr r3, [pc, #124] ; (8001588 <HAL_FSMC_MspInit+0x94>)
|
||
800150a: 681b ldr r3, [r3, #0]
|
||
800150c: 2b00 cmp r3, #0
|
||
800150e: d136 bne.n 800157e <HAL_FSMC_MspInit+0x8a>
|
||
return;
|
||
}
|
||
FSMC_Initialized = 1;
|
||
8001510: 4b1d ldr r3, [pc, #116] ; (8001588 <HAL_FSMC_MspInit+0x94>)
|
||
8001512: 2201 movs r2, #1
|
||
8001514: 601a str r2, [r3, #0]
|
||
|
||
/* Peripheral clock enable */
|
||
__HAL_RCC_FSMC_CLK_ENABLE();
|
||
8001516: 4b1d ldr r3, [pc, #116] ; (800158c <HAL_FSMC_MspInit+0x98>)
|
||
8001518: 695b ldr r3, [r3, #20]
|
||
800151a: 4a1c ldr r2, [pc, #112] ; (800158c <HAL_FSMC_MspInit+0x98>)
|
||
800151c: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
8001520: 6153 str r3, [r2, #20]
|
||
8001522: 4b1a ldr r3, [pc, #104] ; (800158c <HAL_FSMC_MspInit+0x98>)
|
||
8001524: 695b ldr r3, [r3, #20]
|
||
8001526: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
800152a: 607b str r3, [r7, #4]
|
||
800152c: 687b ldr r3, [r7, #4]
|
||
PD1 ------> FSMC_D3
|
||
PD4 ------> FSMC_NOE
|
||
PD5 ------> FSMC_NWE
|
||
PG12 ------> FSMC_NE4
|
||
*/
|
||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_12;
|
||
800152e: f241 0301 movw r3, #4097 ; 0x1001
|
||
8001532: 60bb str r3, [r7, #8]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
8001534: 2302 movs r3, #2
|
||
8001536: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8001538: 2303 movs r3, #3
|
||
800153a: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||
800153c: f107 0308 add.w r3, r7, #8
|
||
8001540: 4619 mov r1, r3
|
||
8001542: 4813 ldr r0, [pc, #76] ; (8001590 <HAL_FSMC_MspInit+0x9c>)
|
||
8001544: f000 fab2 bl 8001aac <HAL_GPIO_Init>
|
||
|
||
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
|
||
8001548: f64f 7380 movw r3, #65408 ; 0xff80
|
||
800154c: 60bb str r3, [r7, #8]
|
||
|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
|
||
|GPIO_PIN_15;
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
800154e: 2302 movs r3, #2
|
||
8001550: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8001552: 2303 movs r3, #3
|
||
8001554: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||
8001556: f107 0308 add.w r3, r7, #8
|
||
800155a: 4619 mov r1, r3
|
||
800155c: 480d ldr r0, [pc, #52] ; (8001594 <HAL_FSMC_MspInit+0xa0>)
|
||
800155e: f000 faa5 bl 8001aac <HAL_GPIO_Init>
|
||
|
||
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
|
||
8001562: f24c 7333 movw r3, #50995 ; 0xc733
|
||
8001566: 60bb str r3, [r7, #8]
|
||
|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4
|
||
|GPIO_PIN_5;
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
8001568: 2302 movs r3, #2
|
||
800156a: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
800156c: 2303 movs r3, #3
|
||
800156e: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||
8001570: f107 0308 add.w r3, r7, #8
|
||
8001574: 4619 mov r1, r3
|
||
8001576: 4808 ldr r0, [pc, #32] ; (8001598 <HAL_FSMC_MspInit+0xa4>)
|
||
8001578: f000 fa98 bl 8001aac <HAL_GPIO_Init>
|
||
800157c: e000 b.n 8001580 <HAL_FSMC_MspInit+0x8c>
|
||
return;
|
||
800157e: bf00 nop
|
||
|
||
/* USER CODE BEGIN FSMC_MspInit 1 */
|
||
|
||
/* USER CODE END FSMC_MspInit 1 */
|
||
}
|
||
8001580: 3718 adds r7, #24
|
||
8001582: 46bd mov sp, r7
|
||
8001584: bd80 pop {r7, pc}
|
||
8001586: bf00 nop
|
||
8001588: 200001f8 .word 0x200001f8
|
||
800158c: 40021000 .word 0x40021000
|
||
8001590: 40012000 .word 0x40012000
|
||
8001594: 40011800 .word 0x40011800
|
||
8001598: 40011400 .word 0x40011400
|
||
|
||
0800159c <HAL_SRAM_MspInit>:
|
||
|
||
void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){
|
||
800159c: b580 push {r7, lr}
|
||
800159e: b082 sub sp, #8
|
||
80015a0: af00 add r7, sp, #0
|
||
80015a2: 6078 str r0, [r7, #4]
|
||
/* USER CODE BEGIN SRAM_MspInit 0 */
|
||
|
||
/* USER CODE END SRAM_MspInit 0 */
|
||
HAL_FSMC_MspInit();
|
||
80015a4: f7ff ffa6 bl 80014f4 <HAL_FSMC_MspInit>
|
||
/* USER CODE BEGIN SRAM_MspInit 1 */
|
||
|
||
/* USER CODE END SRAM_MspInit 1 */
|
||
}
|
||
80015a8: bf00 nop
|
||
80015aa: 3708 adds r7, #8
|
||
80015ac: 46bd mov sp, r7
|
||
80015ae: bd80 pop {r7, pc}
|
||
|
||
080015b0 <NMI_Handler>:
|
||
/******************************************************************************/
|
||
/**
|
||
* @brief This function handles Non maskable interrupt.
|
||
*/
|
||
void NMI_Handler(void)
|
||
{
|
||
80015b0: b480 push {r7}
|
||
80015b2: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||
|
||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||
while (1)
|
||
80015b4: e7fe b.n 80015b4 <NMI_Handler+0x4>
|
||
|
||
080015b6 <HardFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Hard fault interrupt.
|
||
*/
|
||
void HardFault_Handler(void)
|
||
{
|
||
80015b6: b480 push {r7}
|
||
80015b8: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||
|
||
/* USER CODE END HardFault_IRQn 0 */
|
||
while (1)
|
||
80015ba: e7fe b.n 80015ba <HardFault_Handler+0x4>
|
||
|
||
080015bc <MemManage_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Memory management fault.
|
||
*/
|
||
void MemManage_Handler(void)
|
||
{
|
||
80015bc: b480 push {r7}
|
||
80015be: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||
|
||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||
while (1)
|
||
80015c0: e7fe b.n 80015c0 <MemManage_Handler+0x4>
|
||
|
||
080015c2 <BusFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Prefetch fault, memory access fault.
|
||
*/
|
||
void BusFault_Handler(void)
|
||
{
|
||
80015c2: b480 push {r7}
|
||
80015c4: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||
|
||
/* USER CODE END BusFault_IRQn 0 */
|
||
while (1)
|
||
80015c6: e7fe b.n 80015c6 <BusFault_Handler+0x4>
|
||
|
||
080015c8 <UsageFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Undefined instruction or illegal state.
|
||
*/
|
||
void UsageFault_Handler(void)
|
||
{
|
||
80015c8: b480 push {r7}
|
||
80015ca: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||
|
||
/* USER CODE END UsageFault_IRQn 0 */
|
||
while (1)
|
||
80015cc: e7fe b.n 80015cc <UsageFault_Handler+0x4>
|
||
|
||
080015ce <SVC_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles System service call via SWI instruction.
|
||
*/
|
||
void SVC_Handler(void)
|
||
{
|
||
80015ce: b480 push {r7}
|
||
80015d0: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END SVCall_IRQn 0 */
|
||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||
|
||
/* USER CODE END SVCall_IRQn 1 */
|
||
}
|
||
80015d2: bf00 nop
|
||
80015d4: 46bd mov sp, r7
|
||
80015d6: bc80 pop {r7}
|
||
80015d8: 4770 bx lr
|
||
|
||
080015da <DebugMon_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Debug monitor.
|
||
*/
|
||
void DebugMon_Handler(void)
|
||
{
|
||
80015da: b480 push {r7}
|
||
80015dc: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||
|
||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||
}
|
||
80015de: bf00 nop
|
||
80015e0: 46bd mov sp, r7
|
||
80015e2: bc80 pop {r7}
|
||
80015e4: 4770 bx lr
|
||
|
||
080015e6 <PendSV_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Pendable request for system service.
|
||
*/
|
||
void PendSV_Handler(void)
|
||
{
|
||
80015e6: b480 push {r7}
|
||
80015e8: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END PendSV_IRQn 0 */
|
||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||
|
||
/* USER CODE END PendSV_IRQn 1 */
|
||
}
|
||
80015ea: bf00 nop
|
||
80015ec: 46bd mov sp, r7
|
||
80015ee: bc80 pop {r7}
|
||
80015f0: 4770 bx lr
|
||
|
||
080015f2 <SysTick_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles System tick timer.
|
||
*/
|
||
void SysTick_Handler(void)
|
||
{
|
||
80015f2: b580 push {r7, lr}
|
||
80015f4: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||
|
||
/* USER CODE END SysTick_IRQn 0 */
|
||
HAL_IncTick();
|
||
80015f6: f000 f935 bl 8001864 <HAL_IncTick>
|
||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||
|
||
/* USER CODE END SysTick_IRQn 1 */
|
||
}
|
||
80015fa: bf00 nop
|
||
80015fc: bd80 pop {r7, pc}
|
||
|
||
080015fe <_getpid>:
|
||
void initialise_monitor_handles()
|
||
{
|
||
}
|
||
|
||
int _getpid(void)
|
||
{
|
||
80015fe: b480 push {r7}
|
||
8001600: af00 add r7, sp, #0
|
||
return 1;
|
||
8001602: 2301 movs r3, #1
|
||
}
|
||
8001604: 4618 mov r0, r3
|
||
8001606: 46bd mov sp, r7
|
||
8001608: bc80 pop {r7}
|
||
800160a: 4770 bx lr
|
||
|
||
0800160c <_kill>:
|
||
|
||
int _kill(int pid, int sig)
|
||
{
|
||
800160c: b580 push {r7, lr}
|
||
800160e: b082 sub sp, #8
|
||
8001610: af00 add r7, sp, #0
|
||
8001612: 6078 str r0, [r7, #4]
|
||
8001614: 6039 str r1, [r7, #0]
|
||
errno = EINVAL;
|
||
8001616: f003 ff7b bl 8005510 <__errno>
|
||
800161a: 4603 mov r3, r0
|
||
800161c: 2216 movs r2, #22
|
||
800161e: 601a str r2, [r3, #0]
|
||
return -1;
|
||
8001620: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
}
|
||
8001624: 4618 mov r0, r3
|
||
8001626: 3708 adds r7, #8
|
||
8001628: 46bd mov sp, r7
|
||
800162a: bd80 pop {r7, pc}
|
||
|
||
0800162c <_exit>:
|
||
|
||
void _exit (int status)
|
||
{
|
||
800162c: b580 push {r7, lr}
|
||
800162e: b082 sub sp, #8
|
||
8001630: af00 add r7, sp, #0
|
||
8001632: 6078 str r0, [r7, #4]
|
||
_kill(status, -1);
|
||
8001634: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
|
||
8001638: 6878 ldr r0, [r7, #4]
|
||
800163a: f7ff ffe7 bl 800160c <_kill>
|
||
while (1) {} /* Make sure we hang here */
|
||
800163e: e7fe b.n 800163e <_exit+0x12>
|
||
|
||
08001640 <_read>:
|
||
}
|
||
|
||
__attribute__((weak)) int _read(int file, char *ptr, int len)
|
||
{
|
||
8001640: b580 push {r7, lr}
|
||
8001642: b086 sub sp, #24
|
||
8001644: af00 add r7, sp, #0
|
||
8001646: 60f8 str r0, [r7, #12]
|
||
8001648: 60b9 str r1, [r7, #8]
|
||
800164a: 607a str r2, [r7, #4]
|
||
int DataIdx;
|
||
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
800164c: 2300 movs r3, #0
|
||
800164e: 617b str r3, [r7, #20]
|
||
8001650: e00a b.n 8001668 <_read+0x28>
|
||
{
|
||
*ptr++ = __io_getchar();
|
||
8001652: f3af 8000 nop.w
|
||
8001656: 4601 mov r1, r0
|
||
8001658: 68bb ldr r3, [r7, #8]
|
||
800165a: 1c5a adds r2, r3, #1
|
||
800165c: 60ba str r2, [r7, #8]
|
||
800165e: b2ca uxtb r2, r1
|
||
8001660: 701a strb r2, [r3, #0]
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
8001662: 697b ldr r3, [r7, #20]
|
||
8001664: 3301 adds r3, #1
|
||
8001666: 617b str r3, [r7, #20]
|
||
8001668: 697a ldr r2, [r7, #20]
|
||
800166a: 687b ldr r3, [r7, #4]
|
||
800166c: 429a cmp r2, r3
|
||
800166e: dbf0 blt.n 8001652 <_read+0x12>
|
||
}
|
||
|
||
return len;
|
||
8001670: 687b ldr r3, [r7, #4]
|
||
}
|
||
8001672: 4618 mov r0, r3
|
||
8001674: 3718 adds r7, #24
|
||
8001676: 46bd mov sp, r7
|
||
8001678: bd80 pop {r7, pc}
|
||
|
||
0800167a <_write>:
|
||
|
||
__attribute__((weak)) int _write(int file, char *ptr, int len)
|
||
{
|
||
800167a: b580 push {r7, lr}
|
||
800167c: b086 sub sp, #24
|
||
800167e: af00 add r7, sp, #0
|
||
8001680: 60f8 str r0, [r7, #12]
|
||
8001682: 60b9 str r1, [r7, #8]
|
||
8001684: 607a str r2, [r7, #4]
|
||
int DataIdx;
|
||
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
8001686: 2300 movs r3, #0
|
||
8001688: 617b str r3, [r7, #20]
|
||
800168a: e009 b.n 80016a0 <_write+0x26>
|
||
{
|
||
__io_putchar(*ptr++);
|
||
800168c: 68bb ldr r3, [r7, #8]
|
||
800168e: 1c5a adds r2, r3, #1
|
||
8001690: 60ba str r2, [r7, #8]
|
||
8001692: 781b ldrb r3, [r3, #0]
|
||
8001694: 4618 mov r0, r3
|
||
8001696: f3af 8000 nop.w
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
800169a: 697b ldr r3, [r7, #20]
|
||
800169c: 3301 adds r3, #1
|
||
800169e: 617b str r3, [r7, #20]
|
||
80016a0: 697a ldr r2, [r7, #20]
|
||
80016a2: 687b ldr r3, [r7, #4]
|
||
80016a4: 429a cmp r2, r3
|
||
80016a6: dbf1 blt.n 800168c <_write+0x12>
|
||
}
|
||
return len;
|
||
80016a8: 687b ldr r3, [r7, #4]
|
||
}
|
||
80016aa: 4618 mov r0, r3
|
||
80016ac: 3718 adds r7, #24
|
||
80016ae: 46bd mov sp, r7
|
||
80016b0: bd80 pop {r7, pc}
|
||
|
||
080016b2 <_close>:
|
||
|
||
int _close(int file)
|
||
{
|
||
80016b2: b480 push {r7}
|
||
80016b4: b083 sub sp, #12
|
||
80016b6: af00 add r7, sp, #0
|
||
80016b8: 6078 str r0, [r7, #4]
|
||
return -1;
|
||
80016ba: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
}
|
||
80016be: 4618 mov r0, r3
|
||
80016c0: 370c adds r7, #12
|
||
80016c2: 46bd mov sp, r7
|
||
80016c4: bc80 pop {r7}
|
||
80016c6: 4770 bx lr
|
||
|
||
080016c8 <_fstat>:
|
||
|
||
|
||
int _fstat(int file, struct stat *st)
|
||
{
|
||
80016c8: b480 push {r7}
|
||
80016ca: b083 sub sp, #12
|
||
80016cc: af00 add r7, sp, #0
|
||
80016ce: 6078 str r0, [r7, #4]
|
||
80016d0: 6039 str r1, [r7, #0]
|
||
st->st_mode = S_IFCHR;
|
||
80016d2: 683b ldr r3, [r7, #0]
|
||
80016d4: f44f 5200 mov.w r2, #8192 ; 0x2000
|
||
80016d8: 605a str r2, [r3, #4]
|
||
return 0;
|
||
80016da: 2300 movs r3, #0
|
||
}
|
||
80016dc: 4618 mov r0, r3
|
||
80016de: 370c adds r7, #12
|
||
80016e0: 46bd mov sp, r7
|
||
80016e2: bc80 pop {r7}
|
||
80016e4: 4770 bx lr
|
||
|
||
080016e6 <_isatty>:
|
||
|
||
int _isatty(int file)
|
||
{
|
||
80016e6: b480 push {r7}
|
||
80016e8: b083 sub sp, #12
|
||
80016ea: af00 add r7, sp, #0
|
||
80016ec: 6078 str r0, [r7, #4]
|
||
return 1;
|
||
80016ee: 2301 movs r3, #1
|
||
}
|
||
80016f0: 4618 mov r0, r3
|
||
80016f2: 370c adds r7, #12
|
||
80016f4: 46bd mov sp, r7
|
||
80016f6: bc80 pop {r7}
|
||
80016f8: 4770 bx lr
|
||
|
||
080016fa <_lseek>:
|
||
|
||
int _lseek(int file, int ptr, int dir)
|
||
{
|
||
80016fa: b480 push {r7}
|
||
80016fc: b085 sub sp, #20
|
||
80016fe: af00 add r7, sp, #0
|
||
8001700: 60f8 str r0, [r7, #12]
|
||
8001702: 60b9 str r1, [r7, #8]
|
||
8001704: 607a str r2, [r7, #4]
|
||
return 0;
|
||
8001706: 2300 movs r3, #0
|
||
}
|
||
8001708: 4618 mov r0, r3
|
||
800170a: 3714 adds r7, #20
|
||
800170c: 46bd mov sp, r7
|
||
800170e: bc80 pop {r7}
|
||
8001710: 4770 bx lr
|
||
...
|
||
|
||
08001714 <_sbrk>:
|
||
*
|
||
* @param incr Memory size
|
||
* @return Pointer to allocated memory
|
||
*/
|
||
void *_sbrk(ptrdiff_t incr)
|
||
{
|
||
8001714: b580 push {r7, lr}
|
||
8001716: b086 sub sp, #24
|
||
8001718: af00 add r7, sp, #0
|
||
800171a: 6078 str r0, [r7, #4]
|
||
extern uint8_t _end; /* Symbol defined in the linker script */
|
||
extern uint8_t _estack; /* Symbol defined in the linker script */
|
||
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
||
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
||
800171c: 4a14 ldr r2, [pc, #80] ; (8001770 <_sbrk+0x5c>)
|
||
800171e: 4b15 ldr r3, [pc, #84] ; (8001774 <_sbrk+0x60>)
|
||
8001720: 1ad3 subs r3, r2, r3
|
||
8001722: 617b str r3, [r7, #20]
|
||
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||
8001724: 697b ldr r3, [r7, #20]
|
||
8001726: 613b str r3, [r7, #16]
|
||
uint8_t *prev_heap_end;
|
||
|
||
/* Initialize heap end at first call */
|
||
if (NULL == __sbrk_heap_end)
|
||
8001728: 4b13 ldr r3, [pc, #76] ; (8001778 <_sbrk+0x64>)
|
||
800172a: 681b ldr r3, [r3, #0]
|
||
800172c: 2b00 cmp r3, #0
|
||
800172e: d102 bne.n 8001736 <_sbrk+0x22>
|
||
{
|
||
__sbrk_heap_end = &_end;
|
||
8001730: 4b11 ldr r3, [pc, #68] ; (8001778 <_sbrk+0x64>)
|
||
8001732: 4a12 ldr r2, [pc, #72] ; (800177c <_sbrk+0x68>)
|
||
8001734: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Protect heap from growing into the reserved MSP stack */
|
||
if (__sbrk_heap_end + incr > max_heap)
|
||
8001736: 4b10 ldr r3, [pc, #64] ; (8001778 <_sbrk+0x64>)
|
||
8001738: 681a ldr r2, [r3, #0]
|
||
800173a: 687b ldr r3, [r7, #4]
|
||
800173c: 4413 add r3, r2
|
||
800173e: 693a ldr r2, [r7, #16]
|
||
8001740: 429a cmp r2, r3
|
||
8001742: d207 bcs.n 8001754 <_sbrk+0x40>
|
||
{
|
||
errno = ENOMEM;
|
||
8001744: f003 fee4 bl 8005510 <__errno>
|
||
8001748: 4603 mov r3, r0
|
||
800174a: 220c movs r2, #12
|
||
800174c: 601a str r2, [r3, #0]
|
||
return (void *)-1;
|
||
800174e: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
8001752: e009 b.n 8001768 <_sbrk+0x54>
|
||
}
|
||
|
||
prev_heap_end = __sbrk_heap_end;
|
||
8001754: 4b08 ldr r3, [pc, #32] ; (8001778 <_sbrk+0x64>)
|
||
8001756: 681b ldr r3, [r3, #0]
|
||
8001758: 60fb str r3, [r7, #12]
|
||
__sbrk_heap_end += incr;
|
||
800175a: 4b07 ldr r3, [pc, #28] ; (8001778 <_sbrk+0x64>)
|
||
800175c: 681a ldr r2, [r3, #0]
|
||
800175e: 687b ldr r3, [r7, #4]
|
||
8001760: 4413 add r3, r2
|
||
8001762: 4a05 ldr r2, [pc, #20] ; (8001778 <_sbrk+0x64>)
|
||
8001764: 6013 str r3, [r2, #0]
|
||
|
||
return (void *)prev_heap_end;
|
||
8001766: 68fb ldr r3, [r7, #12]
|
||
}
|
||
8001768: 4618 mov r0, r3
|
||
800176a: 3718 adds r7, #24
|
||
800176c: 46bd mov sp, r7
|
||
800176e: bd80 pop {r7, pc}
|
||
8001770: 20010000 .word 0x20010000
|
||
8001774: 00000400 .word 0x00000400
|
||
8001778: 200001fc .word 0x200001fc
|
||
800177c: 20000300 .word 0x20000300
|
||
|
||
08001780 <SystemInit>:
|
||
* @note This function should be used only after reset.
|
||
* @param None
|
||
* @retval None
|
||
*/
|
||
void SystemInit (void)
|
||
{
|
||
8001780: b480 push {r7}
|
||
8001782: af00 add r7, sp, #0
|
||
|
||
/* Configure the Vector Table location -------------------------------------*/
|
||
#if defined(USER_VECT_TAB_ADDRESS)
|
||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
|
||
#endif /* USER_VECT_TAB_ADDRESS */
|
||
}
|
||
8001784: bf00 nop
|
||
8001786: 46bd mov sp, r7
|
||
8001788: bc80 pop {r7}
|
||
800178a: 4770 bx lr
|
||
|
||
0800178c <Reset_Handler>:
|
||
.weak Reset_Handler
|
||
.type Reset_Handler, %function
|
||
Reset_Handler:
|
||
|
||
/* Copy the data segment initializers from flash to SRAM */
|
||
ldr r0, =_sdata
|
||
800178c: 480c ldr r0, [pc, #48] ; (80017c0 <LoopFillZerobss+0x12>)
|
||
ldr r1, =_edata
|
||
800178e: 490d ldr r1, [pc, #52] ; (80017c4 <LoopFillZerobss+0x16>)
|
||
ldr r2, =_sidata
|
||
8001790: 4a0d ldr r2, [pc, #52] ; (80017c8 <LoopFillZerobss+0x1a>)
|
||
movs r3, #0
|
||
8001792: 2300 movs r3, #0
|
||
b LoopCopyDataInit
|
||
8001794: e002 b.n 800179c <LoopCopyDataInit>
|
||
|
||
08001796 <CopyDataInit>:
|
||
|
||
CopyDataInit:
|
||
ldr r4, [r2, r3]
|
||
8001796: 58d4 ldr r4, [r2, r3]
|
||
str r4, [r0, r3]
|
||
8001798: 50c4 str r4, [r0, r3]
|
||
adds r3, r3, #4
|
||
800179a: 3304 adds r3, #4
|
||
|
||
0800179c <LoopCopyDataInit>:
|
||
|
||
LoopCopyDataInit:
|
||
adds r4, r0, r3
|
||
800179c: 18c4 adds r4, r0, r3
|
||
cmp r4, r1
|
||
800179e: 428c cmp r4, r1
|
||
bcc CopyDataInit
|
||
80017a0: d3f9 bcc.n 8001796 <CopyDataInit>
|
||
|
||
/* Zero fill the bss segment. */
|
||
ldr r2, =_sbss
|
||
80017a2: 4a0a ldr r2, [pc, #40] ; (80017cc <LoopFillZerobss+0x1e>)
|
||
ldr r4, =_ebss
|
||
80017a4: 4c0a ldr r4, [pc, #40] ; (80017d0 <LoopFillZerobss+0x22>)
|
||
movs r3, #0
|
||
80017a6: 2300 movs r3, #0
|
||
b LoopFillZerobss
|
||
80017a8: e001 b.n 80017ae <LoopFillZerobss>
|
||
|
||
080017aa <FillZerobss>:
|
||
|
||
FillZerobss:
|
||
str r3, [r2]
|
||
80017aa: 6013 str r3, [r2, #0]
|
||
adds r2, r2, #4
|
||
80017ac: 3204 adds r2, #4
|
||
|
||
080017ae <LoopFillZerobss>:
|
||
|
||
LoopFillZerobss:
|
||
cmp r2, r4
|
||
80017ae: 42a2 cmp r2, r4
|
||
bcc FillZerobss
|
||
80017b0: d3fb bcc.n 80017aa <FillZerobss>
|
||
|
||
/* Call the clock system intitialization function.*/
|
||
bl SystemInit
|
||
80017b2: f7ff ffe5 bl 8001780 <SystemInit>
|
||
/* Call static constructors */
|
||
bl __libc_init_array
|
||
80017b6: f003 feb1 bl 800551c <__libc_init_array>
|
||
/* Call the application's entry point.*/
|
||
bl main
|
||
80017ba: f7ff fca5 bl 8001108 <main>
|
||
bx lr
|
||
80017be: 4770 bx lr
|
||
ldr r0, =_sdata
|
||
80017c0: 20000000 .word 0x20000000
|
||
ldr r1, =_edata
|
||
80017c4: 200001dc .word 0x200001dc
|
||
ldr r2, =_sidata
|
||
80017c8: 0800921c .word 0x0800921c
|
||
ldr r2, =_sbss
|
||
80017cc: 200001dc .word 0x200001dc
|
||
ldr r4, =_ebss
|
||
80017d0: 20000300 .word 0x20000300
|
||
|
||
080017d4 <ADC1_2_IRQHandler>:
|
||
* @retval : None
|
||
*/
|
||
.section .text.Default_Handler,"ax",%progbits
|
||
Default_Handler:
|
||
Infinite_Loop:
|
||
b Infinite_Loop
|
||
80017d4: e7fe b.n 80017d4 <ADC1_2_IRQHandler>
|
||
...
|
||
|
||
080017d8 <HAL_Init>:
|
||
* need to ensure that the SysTick time base is always set to 1 millisecond
|
||
* to have correct HAL operation.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_Init(void)
|
||
{
|
||
80017d8: b580 push {r7, lr}
|
||
80017da: af00 add r7, sp, #0
|
||
defined(STM32F102x6) || defined(STM32F102xB) || \
|
||
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
|
||
defined(STM32F105xC) || defined(STM32F107xC)
|
||
|
||
/* Prefetch buffer is not available on value line devices */
|
||
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
||
80017dc: 4b08 ldr r3, [pc, #32] ; (8001800 <HAL_Init+0x28>)
|
||
80017de: 681b ldr r3, [r3, #0]
|
||
80017e0: 4a07 ldr r2, [pc, #28] ; (8001800 <HAL_Init+0x28>)
|
||
80017e2: f043 0310 orr.w r3, r3, #16
|
||
80017e6: 6013 str r3, [r2, #0]
|
||
#endif
|
||
#endif /* PREFETCH_ENABLE */
|
||
|
||
/* Set Interrupt Group Priority */
|
||
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
||
80017e8: 2003 movs r0, #3
|
||
80017ea: f000 f92b bl 8001a44 <HAL_NVIC_SetPriorityGrouping>
|
||
|
||
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
|
||
HAL_InitTick(TICK_INT_PRIORITY);
|
||
80017ee: 200f movs r0, #15
|
||
80017f0: f000 f808 bl 8001804 <HAL_InitTick>
|
||
|
||
/* Init the low level hardware */
|
||
HAL_MspInit();
|
||
80017f4: f7ff fe0c bl 8001410 <HAL_MspInit>
|
||
|
||
/* Return function status */
|
||
return HAL_OK;
|
||
80017f8: 2300 movs r3, #0
|
||
}
|
||
80017fa: 4618 mov r0, r3
|
||
80017fc: bd80 pop {r7, pc}
|
||
80017fe: bf00 nop
|
||
8001800: 40022000 .word 0x40022000
|
||
|
||
08001804 <HAL_InitTick>:
|
||
* implementation in user file.
|
||
* @param TickPriority Tick interrupt priority.
|
||
* @retval HAL status
|
||
*/
|
||
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
||
{
|
||
8001804: b580 push {r7, lr}
|
||
8001806: b082 sub sp, #8
|
||
8001808: af00 add r7, sp, #0
|
||
800180a: 6078 str r0, [r7, #4]
|
||
/* Configure the SysTick to have interrupt in 1ms time basis*/
|
||
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
|
||
800180c: 4b12 ldr r3, [pc, #72] ; (8001858 <HAL_InitTick+0x54>)
|
||
800180e: 681a ldr r2, [r3, #0]
|
||
8001810: 4b12 ldr r3, [pc, #72] ; (800185c <HAL_InitTick+0x58>)
|
||
8001812: 781b ldrb r3, [r3, #0]
|
||
8001814: 4619 mov r1, r3
|
||
8001816: f44f 737a mov.w r3, #1000 ; 0x3e8
|
||
800181a: fbb3 f3f1 udiv r3, r3, r1
|
||
800181e: fbb2 f3f3 udiv r3, r2, r3
|
||
8001822: 4618 mov r0, r3
|
||
8001824: f000 f935 bl 8001a92 <HAL_SYSTICK_Config>
|
||
8001828: 4603 mov r3, r0
|
||
800182a: 2b00 cmp r3, #0
|
||
800182c: d001 beq.n 8001832 <HAL_InitTick+0x2e>
|
||
{
|
||
return HAL_ERROR;
|
||
800182e: 2301 movs r3, #1
|
||
8001830: e00e b.n 8001850 <HAL_InitTick+0x4c>
|
||
}
|
||
|
||
/* Configure the SysTick IRQ priority */
|
||
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
||
8001832: 687b ldr r3, [r7, #4]
|
||
8001834: 2b0f cmp r3, #15
|
||
8001836: d80a bhi.n 800184e <HAL_InitTick+0x4a>
|
||
{
|
||
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
||
8001838: 2200 movs r2, #0
|
||
800183a: 6879 ldr r1, [r7, #4]
|
||
800183c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8001840: f000 f90b bl 8001a5a <HAL_NVIC_SetPriority>
|
||
uwTickPrio = TickPriority;
|
||
8001844: 4a06 ldr r2, [pc, #24] ; (8001860 <HAL_InitTick+0x5c>)
|
||
8001846: 687b ldr r3, [r7, #4]
|
||
8001848: 6013 str r3, [r2, #0]
|
||
{
|
||
return HAL_ERROR;
|
||
}
|
||
|
||
/* Return function status */
|
||
return HAL_OK;
|
||
800184a: 2300 movs r3, #0
|
||
800184c: e000 b.n 8001850 <HAL_InitTick+0x4c>
|
||
return HAL_ERROR;
|
||
800184e: 2301 movs r3, #1
|
||
}
|
||
8001850: 4618 mov r0, r3
|
||
8001852: 3708 adds r7, #8
|
||
8001854: 46bd mov sp, r7
|
||
8001856: bd80 pop {r7, pc}
|
||
8001858: 20000000 .word 0x20000000
|
||
800185c: 20000008 .word 0x20000008
|
||
8001860: 20000004 .word 0x20000004
|
||
|
||
08001864 <HAL_IncTick>:
|
||
* @note This function is declared as __weak to be overwritten in case of other
|
||
* implementations in user file.
|
||
* @retval None
|
||
*/
|
||
__weak void HAL_IncTick(void)
|
||
{
|
||
8001864: b480 push {r7}
|
||
8001866: af00 add r7, sp, #0
|
||
uwTick += uwTickFreq;
|
||
8001868: 4b05 ldr r3, [pc, #20] ; (8001880 <HAL_IncTick+0x1c>)
|
||
800186a: 781b ldrb r3, [r3, #0]
|
||
800186c: 461a mov r2, r3
|
||
800186e: 4b05 ldr r3, [pc, #20] ; (8001884 <HAL_IncTick+0x20>)
|
||
8001870: 681b ldr r3, [r3, #0]
|
||
8001872: 4413 add r3, r2
|
||
8001874: 4a03 ldr r2, [pc, #12] ; (8001884 <HAL_IncTick+0x20>)
|
||
8001876: 6013 str r3, [r2, #0]
|
||
}
|
||
8001878: bf00 nop
|
||
800187a: 46bd mov sp, r7
|
||
800187c: bc80 pop {r7}
|
||
800187e: 4770 bx lr
|
||
8001880: 20000008 .word 0x20000008
|
||
8001884: 200002a4 .word 0x200002a4
|
||
|
||
08001888 <HAL_GetTick>:
|
||
* @note This function is declared as __weak to be overwritten in case of other
|
||
* implementations in user file.
|
||
* @retval tick value
|
||
*/
|
||
__weak uint32_t HAL_GetTick(void)
|
||
{
|
||
8001888: b480 push {r7}
|
||
800188a: af00 add r7, sp, #0
|
||
return uwTick;
|
||
800188c: 4b02 ldr r3, [pc, #8] ; (8001898 <HAL_GetTick+0x10>)
|
||
800188e: 681b ldr r3, [r3, #0]
|
||
}
|
||
8001890: 4618 mov r0, r3
|
||
8001892: 46bd mov sp, r7
|
||
8001894: bc80 pop {r7}
|
||
8001896: 4770 bx lr
|
||
8001898: 200002a4 .word 0x200002a4
|
||
|
||
0800189c <HAL_Delay>:
|
||
* implementations in user file.
|
||
* @param Delay specifies the delay time length, in milliseconds.
|
||
* @retval None
|
||
*/
|
||
__weak void HAL_Delay(uint32_t Delay)
|
||
{
|
||
800189c: b580 push {r7, lr}
|
||
800189e: b084 sub sp, #16
|
||
80018a0: af00 add r7, sp, #0
|
||
80018a2: 6078 str r0, [r7, #4]
|
||
uint32_t tickstart = HAL_GetTick();
|
||
80018a4: f7ff fff0 bl 8001888 <HAL_GetTick>
|
||
80018a8: 60b8 str r0, [r7, #8]
|
||
uint32_t wait = Delay;
|
||
80018aa: 687b ldr r3, [r7, #4]
|
||
80018ac: 60fb str r3, [r7, #12]
|
||
|
||
/* Add a freq to guarantee minimum wait */
|
||
if (wait < HAL_MAX_DELAY)
|
||
80018ae: 68fb ldr r3, [r7, #12]
|
||
80018b0: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
80018b4: d005 beq.n 80018c2 <HAL_Delay+0x26>
|
||
{
|
||
wait += (uint32_t)(uwTickFreq);
|
||
80018b6: 4b0a ldr r3, [pc, #40] ; (80018e0 <HAL_Delay+0x44>)
|
||
80018b8: 781b ldrb r3, [r3, #0]
|
||
80018ba: 461a mov r2, r3
|
||
80018bc: 68fb ldr r3, [r7, #12]
|
||
80018be: 4413 add r3, r2
|
||
80018c0: 60fb str r3, [r7, #12]
|
||
}
|
||
|
||
while ((HAL_GetTick() - tickstart) < wait)
|
||
80018c2: bf00 nop
|
||
80018c4: f7ff ffe0 bl 8001888 <HAL_GetTick>
|
||
80018c8: 4602 mov r2, r0
|
||
80018ca: 68bb ldr r3, [r7, #8]
|
||
80018cc: 1ad3 subs r3, r2, r3
|
||
80018ce: 68fa ldr r2, [r7, #12]
|
||
80018d0: 429a cmp r2, r3
|
||
80018d2: d8f7 bhi.n 80018c4 <HAL_Delay+0x28>
|
||
{
|
||
}
|
||
}
|
||
80018d4: bf00 nop
|
||
80018d6: bf00 nop
|
||
80018d8: 3710 adds r7, #16
|
||
80018da: 46bd mov sp, r7
|
||
80018dc: bd80 pop {r7, pc}
|
||
80018de: bf00 nop
|
||
80018e0: 20000008 .word 0x20000008
|
||
|
||
080018e4 <__NVIC_SetPriorityGrouping>:
|
||
In case of a conflict between priority grouping and available
|
||
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
|
||
\param [in] PriorityGroup Priority grouping field.
|
||
*/
|
||
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
||
{
|
||
80018e4: b480 push {r7}
|
||
80018e6: b085 sub sp, #20
|
||
80018e8: af00 add r7, sp, #0
|
||
80018ea: 6078 str r0, [r7, #4]
|
||
uint32_t reg_value;
|
||
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
||
80018ec: 687b ldr r3, [r7, #4]
|
||
80018ee: f003 0307 and.w r3, r3, #7
|
||
80018f2: 60fb str r3, [r7, #12]
|
||
|
||
reg_value = SCB->AIRCR; /* read old register configuration */
|
||
80018f4: 4b0c ldr r3, [pc, #48] ; (8001928 <__NVIC_SetPriorityGrouping+0x44>)
|
||
80018f6: 68db ldr r3, [r3, #12]
|
||
80018f8: 60bb str r3, [r7, #8]
|
||
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
|
||
80018fa: 68ba ldr r2, [r7, #8]
|
||
80018fc: f64f 03ff movw r3, #63743 ; 0xf8ff
|
||
8001900: 4013 ands r3, r2
|
||
8001902: 60bb str r3, [r7, #8]
|
||
reg_value = (reg_value |
|
||
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
|
||
8001904: 68fb ldr r3, [r7, #12]
|
||
8001906: 021a lsls r2, r3, #8
|
||
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||
8001908: 68bb ldr r3, [r7, #8]
|
||
800190a: 4313 orrs r3, r2
|
||
reg_value = (reg_value |
|
||
800190c: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
|
||
8001910: f443 3300 orr.w r3, r3, #131072 ; 0x20000
|
||
8001914: 60bb str r3, [r7, #8]
|
||
SCB->AIRCR = reg_value;
|
||
8001916: 4a04 ldr r2, [pc, #16] ; (8001928 <__NVIC_SetPriorityGrouping+0x44>)
|
||
8001918: 68bb ldr r3, [r7, #8]
|
||
800191a: 60d3 str r3, [r2, #12]
|
||
}
|
||
800191c: bf00 nop
|
||
800191e: 3714 adds r7, #20
|
||
8001920: 46bd mov sp, r7
|
||
8001922: bc80 pop {r7}
|
||
8001924: 4770 bx lr
|
||
8001926: bf00 nop
|
||
8001928: e000ed00 .word 0xe000ed00
|
||
|
||
0800192c <__NVIC_GetPriorityGrouping>:
|
||
\brief Get Priority Grouping
|
||
\details Reads the priority grouping field from the NVIC Interrupt Controller.
|
||
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
|
||
*/
|
||
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
|
||
{
|
||
800192c: b480 push {r7}
|
||
800192e: af00 add r7, sp, #0
|
||
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
|
||
8001930: 4b04 ldr r3, [pc, #16] ; (8001944 <__NVIC_GetPriorityGrouping+0x18>)
|
||
8001932: 68db ldr r3, [r3, #12]
|
||
8001934: 0a1b lsrs r3, r3, #8
|
||
8001936: f003 0307 and.w r3, r3, #7
|
||
}
|
||
800193a: 4618 mov r0, r3
|
||
800193c: 46bd mov sp, r7
|
||
800193e: bc80 pop {r7}
|
||
8001940: 4770 bx lr
|
||
8001942: bf00 nop
|
||
8001944: e000ed00 .word 0xe000ed00
|
||
|
||
08001948 <__NVIC_SetPriority>:
|
||
\param [in] IRQn Interrupt number.
|
||
\param [in] priority Priority to set.
|
||
\note The priority cannot be set for every processor exception.
|
||
*/
|
||
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
||
{
|
||
8001948: b480 push {r7}
|
||
800194a: b083 sub sp, #12
|
||
800194c: af00 add r7, sp, #0
|
||
800194e: 4603 mov r3, r0
|
||
8001950: 6039 str r1, [r7, #0]
|
||
8001952: 71fb strb r3, [r7, #7]
|
||
if ((int32_t)(IRQn) >= 0)
|
||
8001954: f997 3007 ldrsb.w r3, [r7, #7]
|
||
8001958: 2b00 cmp r3, #0
|
||
800195a: db0a blt.n 8001972 <__NVIC_SetPriority+0x2a>
|
||
{
|
||
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
800195c: 683b ldr r3, [r7, #0]
|
||
800195e: b2da uxtb r2, r3
|
||
8001960: 490c ldr r1, [pc, #48] ; (8001994 <__NVIC_SetPriority+0x4c>)
|
||
8001962: f997 3007 ldrsb.w r3, [r7, #7]
|
||
8001966: 0112 lsls r2, r2, #4
|
||
8001968: b2d2 uxtb r2, r2
|
||
800196a: 440b add r3, r1
|
||
800196c: f883 2300 strb.w r2, [r3, #768] ; 0x300
|
||
}
|
||
else
|
||
{
|
||
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
}
|
||
}
|
||
8001970: e00a b.n 8001988 <__NVIC_SetPriority+0x40>
|
||
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
8001972: 683b ldr r3, [r7, #0]
|
||
8001974: b2da uxtb r2, r3
|
||
8001976: 4908 ldr r1, [pc, #32] ; (8001998 <__NVIC_SetPriority+0x50>)
|
||
8001978: 79fb ldrb r3, [r7, #7]
|
||
800197a: f003 030f and.w r3, r3, #15
|
||
800197e: 3b04 subs r3, #4
|
||
8001980: 0112 lsls r2, r2, #4
|
||
8001982: b2d2 uxtb r2, r2
|
||
8001984: 440b add r3, r1
|
||
8001986: 761a strb r2, [r3, #24]
|
||
}
|
||
8001988: bf00 nop
|
||
800198a: 370c adds r7, #12
|
||
800198c: 46bd mov sp, r7
|
||
800198e: bc80 pop {r7}
|
||
8001990: 4770 bx lr
|
||
8001992: bf00 nop
|
||
8001994: e000e100 .word 0xe000e100
|
||
8001998: e000ed00 .word 0xe000ed00
|
||
|
||
0800199c <NVIC_EncodePriority>:
|
||
\param [in] PreemptPriority Preemptive priority value (starting from 0).
|
||
\param [in] SubPriority Subpriority value (starting from 0).
|
||
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
|
||
*/
|
||
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
|
||
{
|
||
800199c: b480 push {r7}
|
||
800199e: b089 sub sp, #36 ; 0x24
|
||
80019a0: af00 add r7, sp, #0
|
||
80019a2: 60f8 str r0, [r7, #12]
|
||
80019a4: 60b9 str r1, [r7, #8]
|
||
80019a6: 607a str r2, [r7, #4]
|
||
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
||
80019a8: 68fb ldr r3, [r7, #12]
|
||
80019aa: f003 0307 and.w r3, r3, #7
|
||
80019ae: 61fb str r3, [r7, #28]
|
||
uint32_t PreemptPriorityBits;
|
||
uint32_t SubPriorityBits;
|
||
|
||
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
|
||
80019b0: 69fb ldr r3, [r7, #28]
|
||
80019b2: f1c3 0307 rsb r3, r3, #7
|
||
80019b6: 2b04 cmp r3, #4
|
||
80019b8: bf28 it cs
|
||
80019ba: 2304 movcs r3, #4
|
||
80019bc: 61bb str r3, [r7, #24]
|
||
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
|
||
80019be: 69fb ldr r3, [r7, #28]
|
||
80019c0: 3304 adds r3, #4
|
||
80019c2: 2b06 cmp r3, #6
|
||
80019c4: d902 bls.n 80019cc <NVIC_EncodePriority+0x30>
|
||
80019c6: 69fb ldr r3, [r7, #28]
|
||
80019c8: 3b03 subs r3, #3
|
||
80019ca: e000 b.n 80019ce <NVIC_EncodePriority+0x32>
|
||
80019cc: 2300 movs r3, #0
|
||
80019ce: 617b str r3, [r7, #20]
|
||
|
||
return (
|
||
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
||
80019d0: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
80019d4: 69bb ldr r3, [r7, #24]
|
||
80019d6: fa02 f303 lsl.w r3, r2, r3
|
||
80019da: 43da mvns r2, r3
|
||
80019dc: 68bb ldr r3, [r7, #8]
|
||
80019de: 401a ands r2, r3
|
||
80019e0: 697b ldr r3, [r7, #20]
|
||
80019e2: 409a lsls r2, r3
|
||
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
|
||
80019e4: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
|
||
80019e8: 697b ldr r3, [r7, #20]
|
||
80019ea: fa01 f303 lsl.w r3, r1, r3
|
||
80019ee: 43d9 mvns r1, r3
|
||
80019f0: 687b ldr r3, [r7, #4]
|
||
80019f2: 400b ands r3, r1
|
||
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
||
80019f4: 4313 orrs r3, r2
|
||
);
|
||
}
|
||
80019f6: 4618 mov r0, r3
|
||
80019f8: 3724 adds r7, #36 ; 0x24
|
||
80019fa: 46bd mov sp, r7
|
||
80019fc: bc80 pop {r7}
|
||
80019fe: 4770 bx lr
|
||
|
||
08001a00 <SysTick_Config>:
|
||
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
||
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
||
must contain a vendor-specific implementation of this function.
|
||
*/
|
||
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
||
{
|
||
8001a00: b580 push {r7, lr}
|
||
8001a02: b082 sub sp, #8
|
||
8001a04: af00 add r7, sp, #0
|
||
8001a06: 6078 str r0, [r7, #4]
|
||
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
||
8001a08: 687b ldr r3, [r7, #4]
|
||
8001a0a: 3b01 subs r3, #1
|
||
8001a0c: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
|
||
8001a10: d301 bcc.n 8001a16 <SysTick_Config+0x16>
|
||
{
|
||
return (1UL); /* Reload value impossible */
|
||
8001a12: 2301 movs r3, #1
|
||
8001a14: e00f b.n 8001a36 <SysTick_Config+0x36>
|
||
}
|
||
|
||
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
||
8001a16: 4a0a ldr r2, [pc, #40] ; (8001a40 <SysTick_Config+0x40>)
|
||
8001a18: 687b ldr r3, [r7, #4]
|
||
8001a1a: 3b01 subs r3, #1
|
||
8001a1c: 6053 str r3, [r2, #4]
|
||
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
||
8001a1e: 210f movs r1, #15
|
||
8001a20: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8001a24: f7ff ff90 bl 8001948 <__NVIC_SetPriority>
|
||
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
||
8001a28: 4b05 ldr r3, [pc, #20] ; (8001a40 <SysTick_Config+0x40>)
|
||
8001a2a: 2200 movs r2, #0
|
||
8001a2c: 609a str r2, [r3, #8]
|
||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
||
8001a2e: 4b04 ldr r3, [pc, #16] ; (8001a40 <SysTick_Config+0x40>)
|
||
8001a30: 2207 movs r2, #7
|
||
8001a32: 601a str r2, [r3, #0]
|
||
SysTick_CTRL_TICKINT_Msk |
|
||
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
||
return (0UL); /* Function successful */
|
||
8001a34: 2300 movs r3, #0
|
||
}
|
||
8001a36: 4618 mov r0, r3
|
||
8001a38: 3708 adds r7, #8
|
||
8001a3a: 46bd mov sp, r7
|
||
8001a3c: bd80 pop {r7, pc}
|
||
8001a3e: bf00 nop
|
||
8001a40: e000e010 .word 0xe000e010
|
||
|
||
08001a44 <HAL_NVIC_SetPriorityGrouping>:
|
||
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
|
||
* The pending IRQ priority will be managed only by the subpriority.
|
||
* @retval None
|
||
*/
|
||
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
||
{
|
||
8001a44: b580 push {r7, lr}
|
||
8001a46: b082 sub sp, #8
|
||
8001a48: af00 add r7, sp, #0
|
||
8001a4a: 6078 str r0, [r7, #4]
|
||
/* Check the parameters */
|
||
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
|
||
|
||
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
|
||
NVIC_SetPriorityGrouping(PriorityGroup);
|
||
8001a4c: 6878 ldr r0, [r7, #4]
|
||
8001a4e: f7ff ff49 bl 80018e4 <__NVIC_SetPriorityGrouping>
|
||
}
|
||
8001a52: bf00 nop
|
||
8001a54: 3708 adds r7, #8
|
||
8001a56: 46bd mov sp, r7
|
||
8001a58: bd80 pop {r7, pc}
|
||
|
||
08001a5a <HAL_NVIC_SetPriority>:
|
||
* This parameter can be a value between 0 and 15
|
||
* A lower priority value indicates a higher priority.
|
||
* @retval None
|
||
*/
|
||
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
||
{
|
||
8001a5a: b580 push {r7, lr}
|
||
8001a5c: b086 sub sp, #24
|
||
8001a5e: af00 add r7, sp, #0
|
||
8001a60: 4603 mov r3, r0
|
||
8001a62: 60b9 str r1, [r7, #8]
|
||
8001a64: 607a str r2, [r7, #4]
|
||
8001a66: 73fb strb r3, [r7, #15]
|
||
uint32_t prioritygroup = 0x00U;
|
||
8001a68: 2300 movs r3, #0
|
||
8001a6a: 617b str r3, [r7, #20]
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
|
||
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
||
|
||
prioritygroup = NVIC_GetPriorityGrouping();
|
||
8001a6c: f7ff ff5e bl 800192c <__NVIC_GetPriorityGrouping>
|
||
8001a70: 6178 str r0, [r7, #20]
|
||
|
||
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
|
||
8001a72: 687a ldr r2, [r7, #4]
|
||
8001a74: 68b9 ldr r1, [r7, #8]
|
||
8001a76: 6978 ldr r0, [r7, #20]
|
||
8001a78: f7ff ff90 bl 800199c <NVIC_EncodePriority>
|
||
8001a7c: 4602 mov r2, r0
|
||
8001a7e: f997 300f ldrsb.w r3, [r7, #15]
|
||
8001a82: 4611 mov r1, r2
|
||
8001a84: 4618 mov r0, r3
|
||
8001a86: f7ff ff5f bl 8001948 <__NVIC_SetPriority>
|
||
}
|
||
8001a8a: bf00 nop
|
||
8001a8c: 3718 adds r7, #24
|
||
8001a8e: 46bd mov sp, r7
|
||
8001a90: bd80 pop {r7, pc}
|
||
|
||
08001a92 <HAL_SYSTICK_Config>:
|
||
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
|
||
* @retval status: - 0 Function succeeded.
|
||
* - 1 Function failed.
|
||
*/
|
||
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
||
{
|
||
8001a92: b580 push {r7, lr}
|
||
8001a94: b082 sub sp, #8
|
||
8001a96: af00 add r7, sp, #0
|
||
8001a98: 6078 str r0, [r7, #4]
|
||
return SysTick_Config(TicksNumb);
|
||
8001a9a: 6878 ldr r0, [r7, #4]
|
||
8001a9c: f7ff ffb0 bl 8001a00 <SysTick_Config>
|
||
8001aa0: 4603 mov r3, r0
|
||
}
|
||
8001aa2: 4618 mov r0, r3
|
||
8001aa4: 3708 adds r7, #8
|
||
8001aa6: 46bd mov sp, r7
|
||
8001aa8: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08001aac <HAL_GPIO_Init>:
|
||
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
|
||
* the configuration information for the specified GPIO peripheral.
|
||
* @retval None
|
||
*/
|
||
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
||
{
|
||
8001aac: b480 push {r7}
|
||
8001aae: b08b sub sp, #44 ; 0x2c
|
||
8001ab0: af00 add r7, sp, #0
|
||
8001ab2: 6078 str r0, [r7, #4]
|
||
8001ab4: 6039 str r1, [r7, #0]
|
||
uint32_t position = 0x00u;
|
||
8001ab6: 2300 movs r3, #0
|
||
8001ab8: 627b str r3, [r7, #36] ; 0x24
|
||
uint32_t ioposition;
|
||
uint32_t iocurrent;
|
||
uint32_t temp;
|
||
uint32_t config = 0x00u;
|
||
8001aba: 2300 movs r3, #0
|
||
8001abc: 623b str r3, [r7, #32]
|
||
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
||
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
|
||
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
|
||
|
||
/* Configure the port pins */
|
||
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
||
8001abe: e179 b.n 8001db4 <HAL_GPIO_Init+0x308>
|
||
{
|
||
/* Get the IO position */
|
||
ioposition = (0x01uL << position);
|
||
8001ac0: 2201 movs r2, #1
|
||
8001ac2: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001ac4: fa02 f303 lsl.w r3, r2, r3
|
||
8001ac8: 61fb str r3, [r7, #28]
|
||
|
||
/* Get the current IO position */
|
||
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
|
||
8001aca: 683b ldr r3, [r7, #0]
|
||
8001acc: 681b ldr r3, [r3, #0]
|
||
8001ace: 69fa ldr r2, [r7, #28]
|
||
8001ad0: 4013 ands r3, r2
|
||
8001ad2: 61bb str r3, [r7, #24]
|
||
|
||
if (iocurrent == ioposition)
|
||
8001ad4: 69ba ldr r2, [r7, #24]
|
||
8001ad6: 69fb ldr r3, [r7, #28]
|
||
8001ad8: 429a cmp r2, r3
|
||
8001ada: f040 8168 bne.w 8001dae <HAL_GPIO_Init+0x302>
|
||
{
|
||
/* Check the Alternate function parameters */
|
||
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
|
||
|
||
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
|
||
switch (GPIO_Init->Mode)
|
||
8001ade: 683b ldr r3, [r7, #0]
|
||
8001ae0: 685b ldr r3, [r3, #4]
|
||
8001ae2: 4aa0 ldr r2, [pc, #640] ; (8001d64 <HAL_GPIO_Init+0x2b8>)
|
||
8001ae4: 4293 cmp r3, r2
|
||
8001ae6: d05e beq.n 8001ba6 <HAL_GPIO_Init+0xfa>
|
||
8001ae8: 4a9e ldr r2, [pc, #632] ; (8001d64 <HAL_GPIO_Init+0x2b8>)
|
||
8001aea: 4293 cmp r3, r2
|
||
8001aec: d875 bhi.n 8001bda <HAL_GPIO_Init+0x12e>
|
||
8001aee: 4a9e ldr r2, [pc, #632] ; (8001d68 <HAL_GPIO_Init+0x2bc>)
|
||
8001af0: 4293 cmp r3, r2
|
||
8001af2: d058 beq.n 8001ba6 <HAL_GPIO_Init+0xfa>
|
||
8001af4: 4a9c ldr r2, [pc, #624] ; (8001d68 <HAL_GPIO_Init+0x2bc>)
|
||
8001af6: 4293 cmp r3, r2
|
||
8001af8: d86f bhi.n 8001bda <HAL_GPIO_Init+0x12e>
|
||
8001afa: 4a9c ldr r2, [pc, #624] ; (8001d6c <HAL_GPIO_Init+0x2c0>)
|
||
8001afc: 4293 cmp r3, r2
|
||
8001afe: d052 beq.n 8001ba6 <HAL_GPIO_Init+0xfa>
|
||
8001b00: 4a9a ldr r2, [pc, #616] ; (8001d6c <HAL_GPIO_Init+0x2c0>)
|
||
8001b02: 4293 cmp r3, r2
|
||
8001b04: d869 bhi.n 8001bda <HAL_GPIO_Init+0x12e>
|
||
8001b06: 4a9a ldr r2, [pc, #616] ; (8001d70 <HAL_GPIO_Init+0x2c4>)
|
||
8001b08: 4293 cmp r3, r2
|
||
8001b0a: d04c beq.n 8001ba6 <HAL_GPIO_Init+0xfa>
|
||
8001b0c: 4a98 ldr r2, [pc, #608] ; (8001d70 <HAL_GPIO_Init+0x2c4>)
|
||
8001b0e: 4293 cmp r3, r2
|
||
8001b10: d863 bhi.n 8001bda <HAL_GPIO_Init+0x12e>
|
||
8001b12: 4a98 ldr r2, [pc, #608] ; (8001d74 <HAL_GPIO_Init+0x2c8>)
|
||
8001b14: 4293 cmp r3, r2
|
||
8001b16: d046 beq.n 8001ba6 <HAL_GPIO_Init+0xfa>
|
||
8001b18: 4a96 ldr r2, [pc, #600] ; (8001d74 <HAL_GPIO_Init+0x2c8>)
|
||
8001b1a: 4293 cmp r3, r2
|
||
8001b1c: d85d bhi.n 8001bda <HAL_GPIO_Init+0x12e>
|
||
8001b1e: 2b12 cmp r3, #18
|
||
8001b20: d82a bhi.n 8001b78 <HAL_GPIO_Init+0xcc>
|
||
8001b22: 2b12 cmp r3, #18
|
||
8001b24: d859 bhi.n 8001bda <HAL_GPIO_Init+0x12e>
|
||
8001b26: a201 add r2, pc, #4 ; (adr r2, 8001b2c <HAL_GPIO_Init+0x80>)
|
||
8001b28: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
8001b2c: 08001ba7 .word 0x08001ba7
|
||
8001b30: 08001b81 .word 0x08001b81
|
||
8001b34: 08001b93 .word 0x08001b93
|
||
8001b38: 08001bd5 .word 0x08001bd5
|
||
8001b3c: 08001bdb .word 0x08001bdb
|
||
8001b40: 08001bdb .word 0x08001bdb
|
||
8001b44: 08001bdb .word 0x08001bdb
|
||
8001b48: 08001bdb .word 0x08001bdb
|
||
8001b4c: 08001bdb .word 0x08001bdb
|
||
8001b50: 08001bdb .word 0x08001bdb
|
||
8001b54: 08001bdb .word 0x08001bdb
|
||
8001b58: 08001bdb .word 0x08001bdb
|
||
8001b5c: 08001bdb .word 0x08001bdb
|
||
8001b60: 08001bdb .word 0x08001bdb
|
||
8001b64: 08001bdb .word 0x08001bdb
|
||
8001b68: 08001bdb .word 0x08001bdb
|
||
8001b6c: 08001bdb .word 0x08001bdb
|
||
8001b70: 08001b89 .word 0x08001b89
|
||
8001b74: 08001b9d .word 0x08001b9d
|
||
8001b78: 4a7f ldr r2, [pc, #508] ; (8001d78 <HAL_GPIO_Init+0x2cc>)
|
||
8001b7a: 4293 cmp r3, r2
|
||
8001b7c: d013 beq.n 8001ba6 <HAL_GPIO_Init+0xfa>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
||
break;
|
||
|
||
/* Parameters are checked with assert_param */
|
||
default:
|
||
break;
|
||
8001b7e: e02c b.n 8001bda <HAL_GPIO_Init+0x12e>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
|
||
8001b80: 683b ldr r3, [r7, #0]
|
||
8001b82: 68db ldr r3, [r3, #12]
|
||
8001b84: 623b str r3, [r7, #32]
|
||
break;
|
||
8001b86: e029 b.n 8001bdc <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
|
||
8001b88: 683b ldr r3, [r7, #0]
|
||
8001b8a: 68db ldr r3, [r3, #12]
|
||
8001b8c: 3304 adds r3, #4
|
||
8001b8e: 623b str r3, [r7, #32]
|
||
break;
|
||
8001b90: e024 b.n 8001bdc <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
|
||
8001b92: 683b ldr r3, [r7, #0]
|
||
8001b94: 68db ldr r3, [r3, #12]
|
||
8001b96: 3308 adds r3, #8
|
||
8001b98: 623b str r3, [r7, #32]
|
||
break;
|
||
8001b9a: e01f b.n 8001bdc <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
|
||
8001b9c: 683b ldr r3, [r7, #0]
|
||
8001b9e: 68db ldr r3, [r3, #12]
|
||
8001ba0: 330c adds r3, #12
|
||
8001ba2: 623b str r3, [r7, #32]
|
||
break;
|
||
8001ba4: e01a b.n 8001bdc <HAL_GPIO_Init+0x130>
|
||
if (GPIO_Init->Pull == GPIO_NOPULL)
|
||
8001ba6: 683b ldr r3, [r7, #0]
|
||
8001ba8: 689b ldr r3, [r3, #8]
|
||
8001baa: 2b00 cmp r3, #0
|
||
8001bac: d102 bne.n 8001bb4 <HAL_GPIO_Init+0x108>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
|
||
8001bae: 2304 movs r3, #4
|
||
8001bb0: 623b str r3, [r7, #32]
|
||
break;
|
||
8001bb2: e013 b.n 8001bdc <HAL_GPIO_Init+0x130>
|
||
else if (GPIO_Init->Pull == GPIO_PULLUP)
|
||
8001bb4: 683b ldr r3, [r7, #0]
|
||
8001bb6: 689b ldr r3, [r3, #8]
|
||
8001bb8: 2b01 cmp r3, #1
|
||
8001bba: d105 bne.n 8001bc8 <HAL_GPIO_Init+0x11c>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
||
8001bbc: 2308 movs r3, #8
|
||
8001bbe: 623b str r3, [r7, #32]
|
||
GPIOx->BSRR = ioposition;
|
||
8001bc0: 687b ldr r3, [r7, #4]
|
||
8001bc2: 69fa ldr r2, [r7, #28]
|
||
8001bc4: 611a str r2, [r3, #16]
|
||
break;
|
||
8001bc6: e009 b.n 8001bdc <HAL_GPIO_Init+0x130>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
||
8001bc8: 2308 movs r3, #8
|
||
8001bca: 623b str r3, [r7, #32]
|
||
GPIOx->BRR = ioposition;
|
||
8001bcc: 687b ldr r3, [r7, #4]
|
||
8001bce: 69fa ldr r2, [r7, #28]
|
||
8001bd0: 615a str r2, [r3, #20]
|
||
break;
|
||
8001bd2: e003 b.n 8001bdc <HAL_GPIO_Init+0x130>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
||
8001bd4: 2300 movs r3, #0
|
||
8001bd6: 623b str r3, [r7, #32]
|
||
break;
|
||
8001bd8: e000 b.n 8001bdc <HAL_GPIO_Init+0x130>
|
||
break;
|
||
8001bda: bf00 nop
|
||
}
|
||
|
||
/* Check if the current bit belongs to first half or last half of the pin count number
|
||
in order to address CRH or CRL register*/
|
||
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
|
||
8001bdc: 69bb ldr r3, [r7, #24]
|
||
8001bde: 2bff cmp r3, #255 ; 0xff
|
||
8001be0: d801 bhi.n 8001be6 <HAL_GPIO_Init+0x13a>
|
||
8001be2: 687b ldr r3, [r7, #4]
|
||
8001be4: e001 b.n 8001bea <HAL_GPIO_Init+0x13e>
|
||
8001be6: 687b ldr r3, [r7, #4]
|
||
8001be8: 3304 adds r3, #4
|
||
8001bea: 617b str r3, [r7, #20]
|
||
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
|
||
8001bec: 69bb ldr r3, [r7, #24]
|
||
8001bee: 2bff cmp r3, #255 ; 0xff
|
||
8001bf0: d802 bhi.n 8001bf8 <HAL_GPIO_Init+0x14c>
|
||
8001bf2: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001bf4: 009b lsls r3, r3, #2
|
||
8001bf6: e002 b.n 8001bfe <HAL_GPIO_Init+0x152>
|
||
8001bf8: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001bfa: 3b08 subs r3, #8
|
||
8001bfc: 009b lsls r3, r3, #2
|
||
8001bfe: 613b str r3, [r7, #16]
|
||
|
||
/* Apply the new configuration of the pin to the register */
|
||
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
|
||
8001c00: 697b ldr r3, [r7, #20]
|
||
8001c02: 681a ldr r2, [r3, #0]
|
||
8001c04: 210f movs r1, #15
|
||
8001c06: 693b ldr r3, [r7, #16]
|
||
8001c08: fa01 f303 lsl.w r3, r1, r3
|
||
8001c0c: 43db mvns r3, r3
|
||
8001c0e: 401a ands r2, r3
|
||
8001c10: 6a39 ldr r1, [r7, #32]
|
||
8001c12: 693b ldr r3, [r7, #16]
|
||
8001c14: fa01 f303 lsl.w r3, r1, r3
|
||
8001c18: 431a orrs r2, r3
|
||
8001c1a: 697b ldr r3, [r7, #20]
|
||
8001c1c: 601a str r2, [r3, #0]
|
||
|
||
/*--------------------- EXTI Mode Configuration ------------------------*/
|
||
/* Configure the External Interrupt or event for the current IO */
|
||
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
|
||
8001c1e: 683b ldr r3, [r7, #0]
|
||
8001c20: 685b ldr r3, [r3, #4]
|
||
8001c22: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
8001c26: 2b00 cmp r3, #0
|
||
8001c28: f000 80c1 beq.w 8001dae <HAL_GPIO_Init+0x302>
|
||
{
|
||
/* Enable AFIO Clock */
|
||
__HAL_RCC_AFIO_CLK_ENABLE();
|
||
8001c2c: 4b53 ldr r3, [pc, #332] ; (8001d7c <HAL_GPIO_Init+0x2d0>)
|
||
8001c2e: 699b ldr r3, [r3, #24]
|
||
8001c30: 4a52 ldr r2, [pc, #328] ; (8001d7c <HAL_GPIO_Init+0x2d0>)
|
||
8001c32: f043 0301 orr.w r3, r3, #1
|
||
8001c36: 6193 str r3, [r2, #24]
|
||
8001c38: 4b50 ldr r3, [pc, #320] ; (8001d7c <HAL_GPIO_Init+0x2d0>)
|
||
8001c3a: 699b ldr r3, [r3, #24]
|
||
8001c3c: f003 0301 and.w r3, r3, #1
|
||
8001c40: 60bb str r3, [r7, #8]
|
||
8001c42: 68bb ldr r3, [r7, #8]
|
||
temp = AFIO->EXTICR[position >> 2u];
|
||
8001c44: 4a4e ldr r2, [pc, #312] ; (8001d80 <HAL_GPIO_Init+0x2d4>)
|
||
8001c46: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001c48: 089b lsrs r3, r3, #2
|
||
8001c4a: 3302 adds r3, #2
|
||
8001c4c: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
||
8001c50: 60fb str r3, [r7, #12]
|
||
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
|
||
8001c52: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001c54: f003 0303 and.w r3, r3, #3
|
||
8001c58: 009b lsls r3, r3, #2
|
||
8001c5a: 220f movs r2, #15
|
||
8001c5c: fa02 f303 lsl.w r3, r2, r3
|
||
8001c60: 43db mvns r3, r3
|
||
8001c62: 68fa ldr r2, [r7, #12]
|
||
8001c64: 4013 ands r3, r2
|
||
8001c66: 60fb str r3, [r7, #12]
|
||
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
|
||
8001c68: 687b ldr r3, [r7, #4]
|
||
8001c6a: 4a46 ldr r2, [pc, #280] ; (8001d84 <HAL_GPIO_Init+0x2d8>)
|
||
8001c6c: 4293 cmp r3, r2
|
||
8001c6e: d01f beq.n 8001cb0 <HAL_GPIO_Init+0x204>
|
||
8001c70: 687b ldr r3, [r7, #4]
|
||
8001c72: 4a45 ldr r2, [pc, #276] ; (8001d88 <HAL_GPIO_Init+0x2dc>)
|
||
8001c74: 4293 cmp r3, r2
|
||
8001c76: d019 beq.n 8001cac <HAL_GPIO_Init+0x200>
|
||
8001c78: 687b ldr r3, [r7, #4]
|
||
8001c7a: 4a44 ldr r2, [pc, #272] ; (8001d8c <HAL_GPIO_Init+0x2e0>)
|
||
8001c7c: 4293 cmp r3, r2
|
||
8001c7e: d013 beq.n 8001ca8 <HAL_GPIO_Init+0x1fc>
|
||
8001c80: 687b ldr r3, [r7, #4]
|
||
8001c82: 4a43 ldr r2, [pc, #268] ; (8001d90 <HAL_GPIO_Init+0x2e4>)
|
||
8001c84: 4293 cmp r3, r2
|
||
8001c86: d00d beq.n 8001ca4 <HAL_GPIO_Init+0x1f8>
|
||
8001c88: 687b ldr r3, [r7, #4]
|
||
8001c8a: 4a42 ldr r2, [pc, #264] ; (8001d94 <HAL_GPIO_Init+0x2e8>)
|
||
8001c8c: 4293 cmp r3, r2
|
||
8001c8e: d007 beq.n 8001ca0 <HAL_GPIO_Init+0x1f4>
|
||
8001c90: 687b ldr r3, [r7, #4]
|
||
8001c92: 4a41 ldr r2, [pc, #260] ; (8001d98 <HAL_GPIO_Init+0x2ec>)
|
||
8001c94: 4293 cmp r3, r2
|
||
8001c96: d101 bne.n 8001c9c <HAL_GPIO_Init+0x1f0>
|
||
8001c98: 2305 movs r3, #5
|
||
8001c9a: e00a b.n 8001cb2 <HAL_GPIO_Init+0x206>
|
||
8001c9c: 2306 movs r3, #6
|
||
8001c9e: e008 b.n 8001cb2 <HAL_GPIO_Init+0x206>
|
||
8001ca0: 2304 movs r3, #4
|
||
8001ca2: e006 b.n 8001cb2 <HAL_GPIO_Init+0x206>
|
||
8001ca4: 2303 movs r3, #3
|
||
8001ca6: e004 b.n 8001cb2 <HAL_GPIO_Init+0x206>
|
||
8001ca8: 2302 movs r3, #2
|
||
8001caa: e002 b.n 8001cb2 <HAL_GPIO_Init+0x206>
|
||
8001cac: 2301 movs r3, #1
|
||
8001cae: e000 b.n 8001cb2 <HAL_GPIO_Init+0x206>
|
||
8001cb0: 2300 movs r3, #0
|
||
8001cb2: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8001cb4: f002 0203 and.w r2, r2, #3
|
||
8001cb8: 0092 lsls r2, r2, #2
|
||
8001cba: 4093 lsls r3, r2
|
||
8001cbc: 68fa ldr r2, [r7, #12]
|
||
8001cbe: 4313 orrs r3, r2
|
||
8001cc0: 60fb str r3, [r7, #12]
|
||
AFIO->EXTICR[position >> 2u] = temp;
|
||
8001cc2: 492f ldr r1, [pc, #188] ; (8001d80 <HAL_GPIO_Init+0x2d4>)
|
||
8001cc4: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001cc6: 089b lsrs r3, r3, #2
|
||
8001cc8: 3302 adds r3, #2
|
||
8001cca: 68fa ldr r2, [r7, #12]
|
||
8001ccc: f841 2023 str.w r2, [r1, r3, lsl #2]
|
||
|
||
|
||
/* Configure the interrupt mask */
|
||
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
|
||
8001cd0: 683b ldr r3, [r7, #0]
|
||
8001cd2: 685b ldr r3, [r3, #4]
|
||
8001cd4: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8001cd8: 2b00 cmp r3, #0
|
||
8001cda: d006 beq.n 8001cea <HAL_GPIO_Init+0x23e>
|
||
{
|
||
SET_BIT(EXTI->IMR, iocurrent);
|
||
8001cdc: 4b2f ldr r3, [pc, #188] ; (8001d9c <HAL_GPIO_Init+0x2f0>)
|
||
8001cde: 681a ldr r2, [r3, #0]
|
||
8001ce0: 492e ldr r1, [pc, #184] ; (8001d9c <HAL_GPIO_Init+0x2f0>)
|
||
8001ce2: 69bb ldr r3, [r7, #24]
|
||
8001ce4: 4313 orrs r3, r2
|
||
8001ce6: 600b str r3, [r1, #0]
|
||
8001ce8: e006 b.n 8001cf8 <HAL_GPIO_Init+0x24c>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->IMR, iocurrent);
|
||
8001cea: 4b2c ldr r3, [pc, #176] ; (8001d9c <HAL_GPIO_Init+0x2f0>)
|
||
8001cec: 681a ldr r2, [r3, #0]
|
||
8001cee: 69bb ldr r3, [r7, #24]
|
||
8001cf0: 43db mvns r3, r3
|
||
8001cf2: 492a ldr r1, [pc, #168] ; (8001d9c <HAL_GPIO_Init+0x2f0>)
|
||
8001cf4: 4013 ands r3, r2
|
||
8001cf6: 600b str r3, [r1, #0]
|
||
}
|
||
|
||
/* Configure the event mask */
|
||
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
|
||
8001cf8: 683b ldr r3, [r7, #0]
|
||
8001cfa: 685b ldr r3, [r3, #4]
|
||
8001cfc: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8001d00: 2b00 cmp r3, #0
|
||
8001d02: d006 beq.n 8001d12 <HAL_GPIO_Init+0x266>
|
||
{
|
||
SET_BIT(EXTI->EMR, iocurrent);
|
||
8001d04: 4b25 ldr r3, [pc, #148] ; (8001d9c <HAL_GPIO_Init+0x2f0>)
|
||
8001d06: 685a ldr r2, [r3, #4]
|
||
8001d08: 4924 ldr r1, [pc, #144] ; (8001d9c <HAL_GPIO_Init+0x2f0>)
|
||
8001d0a: 69bb ldr r3, [r7, #24]
|
||
8001d0c: 4313 orrs r3, r2
|
||
8001d0e: 604b str r3, [r1, #4]
|
||
8001d10: e006 b.n 8001d20 <HAL_GPIO_Init+0x274>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->EMR, iocurrent);
|
||
8001d12: 4b22 ldr r3, [pc, #136] ; (8001d9c <HAL_GPIO_Init+0x2f0>)
|
||
8001d14: 685a ldr r2, [r3, #4]
|
||
8001d16: 69bb ldr r3, [r7, #24]
|
||
8001d18: 43db mvns r3, r3
|
||
8001d1a: 4920 ldr r1, [pc, #128] ; (8001d9c <HAL_GPIO_Init+0x2f0>)
|
||
8001d1c: 4013 ands r3, r2
|
||
8001d1e: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Enable or disable the rising trigger */
|
||
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
|
||
8001d20: 683b ldr r3, [r7, #0]
|
||
8001d22: 685b ldr r3, [r3, #4]
|
||
8001d24: f403 1380 and.w r3, r3, #1048576 ; 0x100000
|
||
8001d28: 2b00 cmp r3, #0
|
||
8001d2a: d006 beq.n 8001d3a <HAL_GPIO_Init+0x28e>
|
||
{
|
||
SET_BIT(EXTI->RTSR, iocurrent);
|
||
8001d2c: 4b1b ldr r3, [pc, #108] ; (8001d9c <HAL_GPIO_Init+0x2f0>)
|
||
8001d2e: 689a ldr r2, [r3, #8]
|
||
8001d30: 491a ldr r1, [pc, #104] ; (8001d9c <HAL_GPIO_Init+0x2f0>)
|
||
8001d32: 69bb ldr r3, [r7, #24]
|
||
8001d34: 4313 orrs r3, r2
|
||
8001d36: 608b str r3, [r1, #8]
|
||
8001d38: e006 b.n 8001d48 <HAL_GPIO_Init+0x29c>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->RTSR, iocurrent);
|
||
8001d3a: 4b18 ldr r3, [pc, #96] ; (8001d9c <HAL_GPIO_Init+0x2f0>)
|
||
8001d3c: 689a ldr r2, [r3, #8]
|
||
8001d3e: 69bb ldr r3, [r7, #24]
|
||
8001d40: 43db mvns r3, r3
|
||
8001d42: 4916 ldr r1, [pc, #88] ; (8001d9c <HAL_GPIO_Init+0x2f0>)
|
||
8001d44: 4013 ands r3, r2
|
||
8001d46: 608b str r3, [r1, #8]
|
||
}
|
||
|
||
/* Enable or disable the falling trigger */
|
||
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
|
||
8001d48: 683b ldr r3, [r7, #0]
|
||
8001d4a: 685b ldr r3, [r3, #4]
|
||
8001d4c: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
||
8001d50: 2b00 cmp r3, #0
|
||
8001d52: d025 beq.n 8001da0 <HAL_GPIO_Init+0x2f4>
|
||
{
|
||
SET_BIT(EXTI->FTSR, iocurrent);
|
||
8001d54: 4b11 ldr r3, [pc, #68] ; (8001d9c <HAL_GPIO_Init+0x2f0>)
|
||
8001d56: 68da ldr r2, [r3, #12]
|
||
8001d58: 4910 ldr r1, [pc, #64] ; (8001d9c <HAL_GPIO_Init+0x2f0>)
|
||
8001d5a: 69bb ldr r3, [r7, #24]
|
||
8001d5c: 4313 orrs r3, r2
|
||
8001d5e: 60cb str r3, [r1, #12]
|
||
8001d60: e025 b.n 8001dae <HAL_GPIO_Init+0x302>
|
||
8001d62: bf00 nop
|
||
8001d64: 10320000 .word 0x10320000
|
||
8001d68: 10310000 .word 0x10310000
|
||
8001d6c: 10220000 .word 0x10220000
|
||
8001d70: 10210000 .word 0x10210000
|
||
8001d74: 10120000 .word 0x10120000
|
||
8001d78: 10110000 .word 0x10110000
|
||
8001d7c: 40021000 .word 0x40021000
|
||
8001d80: 40010000 .word 0x40010000
|
||
8001d84: 40010800 .word 0x40010800
|
||
8001d88: 40010c00 .word 0x40010c00
|
||
8001d8c: 40011000 .word 0x40011000
|
||
8001d90: 40011400 .word 0x40011400
|
||
8001d94: 40011800 .word 0x40011800
|
||
8001d98: 40011c00 .word 0x40011c00
|
||
8001d9c: 40010400 .word 0x40010400
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->FTSR, iocurrent);
|
||
8001da0: 4b0b ldr r3, [pc, #44] ; (8001dd0 <HAL_GPIO_Init+0x324>)
|
||
8001da2: 68da ldr r2, [r3, #12]
|
||
8001da4: 69bb ldr r3, [r7, #24]
|
||
8001da6: 43db mvns r3, r3
|
||
8001da8: 4909 ldr r1, [pc, #36] ; (8001dd0 <HAL_GPIO_Init+0x324>)
|
||
8001daa: 4013 ands r3, r2
|
||
8001dac: 60cb str r3, [r1, #12]
|
||
}
|
||
}
|
||
}
|
||
|
||
position++;
|
||
8001dae: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001db0: 3301 adds r3, #1
|
||
8001db2: 627b str r3, [r7, #36] ; 0x24
|
||
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
||
8001db4: 683b ldr r3, [r7, #0]
|
||
8001db6: 681a ldr r2, [r3, #0]
|
||
8001db8: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001dba: fa22 f303 lsr.w r3, r2, r3
|
||
8001dbe: 2b00 cmp r3, #0
|
||
8001dc0: f47f ae7e bne.w 8001ac0 <HAL_GPIO_Init+0x14>
|
||
}
|
||
}
|
||
8001dc4: bf00 nop
|
||
8001dc6: bf00 nop
|
||
8001dc8: 372c adds r7, #44 ; 0x2c
|
||
8001dca: 46bd mov sp, r7
|
||
8001dcc: bc80 pop {r7}
|
||
8001dce: 4770 bx lr
|
||
8001dd0: 40010400 .word 0x40010400
|
||
|
||
08001dd4 <HAL_GPIO_ReadPin>:
|
||
* @param GPIO_Pin: specifies the port bit to read.
|
||
* This parameter can be GPIO_PIN_x where x can be (0..15).
|
||
* @retval The input port pin value.
|
||
*/
|
||
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
|
||
{
|
||
8001dd4: b480 push {r7}
|
||
8001dd6: b085 sub sp, #20
|
||
8001dd8: af00 add r7, sp, #0
|
||
8001dda: 6078 str r0, [r7, #4]
|
||
8001ddc: 460b mov r3, r1
|
||
8001dde: 807b strh r3, [r7, #2]
|
||
GPIO_PinState bitstatus;
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||
|
||
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
|
||
8001de0: 687b ldr r3, [r7, #4]
|
||
8001de2: 689a ldr r2, [r3, #8]
|
||
8001de4: 887b ldrh r3, [r7, #2]
|
||
8001de6: 4013 ands r3, r2
|
||
8001de8: 2b00 cmp r3, #0
|
||
8001dea: d002 beq.n 8001df2 <HAL_GPIO_ReadPin+0x1e>
|
||
{
|
||
bitstatus = GPIO_PIN_SET;
|
||
8001dec: 2301 movs r3, #1
|
||
8001dee: 73fb strb r3, [r7, #15]
|
||
8001df0: e001 b.n 8001df6 <HAL_GPIO_ReadPin+0x22>
|
||
}
|
||
else
|
||
{
|
||
bitstatus = GPIO_PIN_RESET;
|
||
8001df2: 2300 movs r3, #0
|
||
8001df4: 73fb strb r3, [r7, #15]
|
||
}
|
||
return bitstatus;
|
||
8001df6: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
8001df8: 4618 mov r0, r3
|
||
8001dfa: 3714 adds r7, #20
|
||
8001dfc: 46bd mov sp, r7
|
||
8001dfe: bc80 pop {r7}
|
||
8001e00: 4770 bx lr
|
||
|
||
08001e02 <HAL_GPIO_WritePin>:
|
||
* @arg GPIO_PIN_RESET: to clear the port pin
|
||
* @arg GPIO_PIN_SET: to set the port pin
|
||
* @retval None
|
||
*/
|
||
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
|
||
{
|
||
8001e02: b480 push {r7}
|
||
8001e04: b083 sub sp, #12
|
||
8001e06: af00 add r7, sp, #0
|
||
8001e08: 6078 str r0, [r7, #4]
|
||
8001e0a: 460b mov r3, r1
|
||
8001e0c: 807b strh r3, [r7, #2]
|
||
8001e0e: 4613 mov r3, r2
|
||
8001e10: 707b strb r3, [r7, #1]
|
||
/* Check the parameters */
|
||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||
assert_param(IS_GPIO_PIN_ACTION(PinState));
|
||
|
||
if (PinState != GPIO_PIN_RESET)
|
||
8001e12: 787b ldrb r3, [r7, #1]
|
||
8001e14: 2b00 cmp r3, #0
|
||
8001e16: d003 beq.n 8001e20 <HAL_GPIO_WritePin+0x1e>
|
||
{
|
||
GPIOx->BSRR = GPIO_Pin;
|
||
8001e18: 887a ldrh r2, [r7, #2]
|
||
8001e1a: 687b ldr r3, [r7, #4]
|
||
8001e1c: 611a str r2, [r3, #16]
|
||
}
|
||
else
|
||
{
|
||
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
||
}
|
||
}
|
||
8001e1e: e003 b.n 8001e28 <HAL_GPIO_WritePin+0x26>
|
||
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
||
8001e20: 887b ldrh r3, [r7, #2]
|
||
8001e22: 041a lsls r2, r3, #16
|
||
8001e24: 687b ldr r3, [r7, #4]
|
||
8001e26: 611a str r2, [r3, #16]
|
||
}
|
||
8001e28: bf00 nop
|
||
8001e2a: 370c adds r7, #12
|
||
8001e2c: 46bd mov sp, r7
|
||
8001e2e: bc80 pop {r7}
|
||
8001e30: 4770 bx lr
|
||
...
|
||
|
||
08001e34 <HAL_I2C_Init>:
|
||
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
||
* the configuration information for the specified I2C.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
|
||
{
|
||
8001e34: b580 push {r7, lr}
|
||
8001e36: b084 sub sp, #16
|
||
8001e38: af00 add r7, sp, #0
|
||
8001e3a: 6078 str r0, [r7, #4]
|
||
uint32_t freqrange;
|
||
uint32_t pclk1;
|
||
|
||
/* Check the I2C handle allocation */
|
||
if (hi2c == NULL)
|
||
8001e3c: 687b ldr r3, [r7, #4]
|
||
8001e3e: 2b00 cmp r3, #0
|
||
8001e40: d101 bne.n 8001e46 <HAL_I2C_Init+0x12>
|
||
{
|
||
return HAL_ERROR;
|
||
8001e42: 2301 movs r3, #1
|
||
8001e44: e12b b.n 800209e <HAL_I2C_Init+0x26a>
|
||
assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
|
||
assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
|
||
assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
|
||
assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
|
||
|
||
if (hi2c->State == HAL_I2C_STATE_RESET)
|
||
8001e46: 687b ldr r3, [r7, #4]
|
||
8001e48: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
||
8001e4c: b2db uxtb r3, r3
|
||
8001e4e: 2b00 cmp r3, #0
|
||
8001e50: d106 bne.n 8001e60 <HAL_I2C_Init+0x2c>
|
||
{
|
||
/* Allocate lock resource and initialize it */
|
||
hi2c->Lock = HAL_UNLOCKED;
|
||
8001e52: 687b ldr r3, [r7, #4]
|
||
8001e54: 2200 movs r2, #0
|
||
8001e56: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
/* Init the low level hardware : GPIO, CLOCK, NVIC */
|
||
hi2c->MspInitCallback(hi2c);
|
||
#else
|
||
/* Init the low level hardware : GPIO, CLOCK, NVIC */
|
||
HAL_I2C_MspInit(hi2c);
|
||
8001e5a: 6878 ldr r0, [r7, #4]
|
||
8001e5c: f7ff fb0a bl 8001474 <HAL_I2C_MspInit>
|
||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||
}
|
||
|
||
hi2c->State = HAL_I2C_STATE_BUSY;
|
||
8001e60: 687b ldr r3, [r7, #4]
|
||
8001e62: 2224 movs r2, #36 ; 0x24
|
||
8001e64: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
|
||
/* Disable the selected I2C peripheral */
|
||
__HAL_I2C_DISABLE(hi2c);
|
||
8001e68: 687b ldr r3, [r7, #4]
|
||
8001e6a: 681b ldr r3, [r3, #0]
|
||
8001e6c: 681a ldr r2, [r3, #0]
|
||
8001e6e: 687b ldr r3, [r7, #4]
|
||
8001e70: 681b ldr r3, [r3, #0]
|
||
8001e72: f022 0201 bic.w r2, r2, #1
|
||
8001e76: 601a str r2, [r3, #0]
|
||
|
||
/*Reset I2C*/
|
||
hi2c->Instance->CR1 |= I2C_CR1_SWRST;
|
||
8001e78: 687b ldr r3, [r7, #4]
|
||
8001e7a: 681b ldr r3, [r3, #0]
|
||
8001e7c: 681a ldr r2, [r3, #0]
|
||
8001e7e: 687b ldr r3, [r7, #4]
|
||
8001e80: 681b ldr r3, [r3, #0]
|
||
8001e82: f442 4200 orr.w r2, r2, #32768 ; 0x8000
|
||
8001e86: 601a str r2, [r3, #0]
|
||
hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
|
||
8001e88: 687b ldr r3, [r7, #4]
|
||
8001e8a: 681b ldr r3, [r3, #0]
|
||
8001e8c: 681a ldr r2, [r3, #0]
|
||
8001e8e: 687b ldr r3, [r7, #4]
|
||
8001e90: 681b ldr r3, [r3, #0]
|
||
8001e92: f422 4200 bic.w r2, r2, #32768 ; 0x8000
|
||
8001e96: 601a str r2, [r3, #0]
|
||
|
||
/* Get PCLK1 frequency */
|
||
pclk1 = HAL_RCC_GetPCLK1Freq();
|
||
8001e98: f001 fba0 bl 80035dc <HAL_RCC_GetPCLK1Freq>
|
||
8001e9c: 60f8 str r0, [r7, #12]
|
||
|
||
/* Check the minimum allowed PCLK1 frequency */
|
||
if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
|
||
8001e9e: 687b ldr r3, [r7, #4]
|
||
8001ea0: 685b ldr r3, [r3, #4]
|
||
8001ea2: 4a81 ldr r2, [pc, #516] ; (80020a8 <HAL_I2C_Init+0x274>)
|
||
8001ea4: 4293 cmp r3, r2
|
||
8001ea6: d807 bhi.n 8001eb8 <HAL_I2C_Init+0x84>
|
||
8001ea8: 68fb ldr r3, [r7, #12]
|
||
8001eaa: 4a80 ldr r2, [pc, #512] ; (80020ac <HAL_I2C_Init+0x278>)
|
||
8001eac: 4293 cmp r3, r2
|
||
8001eae: bf94 ite ls
|
||
8001eb0: 2301 movls r3, #1
|
||
8001eb2: 2300 movhi r3, #0
|
||
8001eb4: b2db uxtb r3, r3
|
||
8001eb6: e006 b.n 8001ec6 <HAL_I2C_Init+0x92>
|
||
8001eb8: 68fb ldr r3, [r7, #12]
|
||
8001eba: 4a7d ldr r2, [pc, #500] ; (80020b0 <HAL_I2C_Init+0x27c>)
|
||
8001ebc: 4293 cmp r3, r2
|
||
8001ebe: bf94 ite ls
|
||
8001ec0: 2301 movls r3, #1
|
||
8001ec2: 2300 movhi r3, #0
|
||
8001ec4: b2db uxtb r3, r3
|
||
8001ec6: 2b00 cmp r3, #0
|
||
8001ec8: d001 beq.n 8001ece <HAL_I2C_Init+0x9a>
|
||
{
|
||
return HAL_ERROR;
|
||
8001eca: 2301 movs r3, #1
|
||
8001ecc: e0e7 b.n 800209e <HAL_I2C_Init+0x26a>
|
||
}
|
||
|
||
/* Calculate frequency range */
|
||
freqrange = I2C_FREQRANGE(pclk1);
|
||
8001ece: 68fb ldr r3, [r7, #12]
|
||
8001ed0: 4a78 ldr r2, [pc, #480] ; (80020b4 <HAL_I2C_Init+0x280>)
|
||
8001ed2: fba2 2303 umull r2, r3, r2, r3
|
||
8001ed6: 0c9b lsrs r3, r3, #18
|
||
8001ed8: 60bb str r3, [r7, #8]
|
||
|
||
/*---------------------------- I2Cx CR2 Configuration ----------------------*/
|
||
/* Configure I2Cx: Frequency range */
|
||
MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
|
||
8001eda: 687b ldr r3, [r7, #4]
|
||
8001edc: 681b ldr r3, [r3, #0]
|
||
8001ede: 685b ldr r3, [r3, #4]
|
||
8001ee0: f023 013f bic.w r1, r3, #63 ; 0x3f
|
||
8001ee4: 687b ldr r3, [r7, #4]
|
||
8001ee6: 681b ldr r3, [r3, #0]
|
||
8001ee8: 68ba ldr r2, [r7, #8]
|
||
8001eea: 430a orrs r2, r1
|
||
8001eec: 605a str r2, [r3, #4]
|
||
|
||
/*---------------------------- I2Cx TRISE Configuration --------------------*/
|
||
/* Configure I2Cx: Rise Time */
|
||
MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
|
||
8001eee: 687b ldr r3, [r7, #4]
|
||
8001ef0: 681b ldr r3, [r3, #0]
|
||
8001ef2: 6a1b ldr r3, [r3, #32]
|
||
8001ef4: f023 013f bic.w r1, r3, #63 ; 0x3f
|
||
8001ef8: 687b ldr r3, [r7, #4]
|
||
8001efa: 685b ldr r3, [r3, #4]
|
||
8001efc: 4a6a ldr r2, [pc, #424] ; (80020a8 <HAL_I2C_Init+0x274>)
|
||
8001efe: 4293 cmp r3, r2
|
||
8001f00: d802 bhi.n 8001f08 <HAL_I2C_Init+0xd4>
|
||
8001f02: 68bb ldr r3, [r7, #8]
|
||
8001f04: 3301 adds r3, #1
|
||
8001f06: e009 b.n 8001f1c <HAL_I2C_Init+0xe8>
|
||
8001f08: 68bb ldr r3, [r7, #8]
|
||
8001f0a: f44f 7296 mov.w r2, #300 ; 0x12c
|
||
8001f0e: fb02 f303 mul.w r3, r2, r3
|
||
8001f12: 4a69 ldr r2, [pc, #420] ; (80020b8 <HAL_I2C_Init+0x284>)
|
||
8001f14: fba2 2303 umull r2, r3, r2, r3
|
||
8001f18: 099b lsrs r3, r3, #6
|
||
8001f1a: 3301 adds r3, #1
|
||
8001f1c: 687a ldr r2, [r7, #4]
|
||
8001f1e: 6812 ldr r2, [r2, #0]
|
||
8001f20: 430b orrs r3, r1
|
||
8001f22: 6213 str r3, [r2, #32]
|
||
|
||
/*---------------------------- I2Cx CCR Configuration ----------------------*/
|
||
/* Configure I2Cx: Speed */
|
||
MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
|
||
8001f24: 687b ldr r3, [r7, #4]
|
||
8001f26: 681b ldr r3, [r3, #0]
|
||
8001f28: 69db ldr r3, [r3, #28]
|
||
8001f2a: f423 424f bic.w r2, r3, #52992 ; 0xcf00
|
||
8001f2e: f022 02ff bic.w r2, r2, #255 ; 0xff
|
||
8001f32: 687b ldr r3, [r7, #4]
|
||
8001f34: 685b ldr r3, [r3, #4]
|
||
8001f36: 495c ldr r1, [pc, #368] ; (80020a8 <HAL_I2C_Init+0x274>)
|
||
8001f38: 428b cmp r3, r1
|
||
8001f3a: d819 bhi.n 8001f70 <HAL_I2C_Init+0x13c>
|
||
8001f3c: 68fb ldr r3, [r7, #12]
|
||
8001f3e: 1e59 subs r1, r3, #1
|
||
8001f40: 687b ldr r3, [r7, #4]
|
||
8001f42: 685b ldr r3, [r3, #4]
|
||
8001f44: 005b lsls r3, r3, #1
|
||
8001f46: fbb1 f3f3 udiv r3, r1, r3
|
||
8001f4a: 1c59 adds r1, r3, #1
|
||
8001f4c: f640 73fc movw r3, #4092 ; 0xffc
|
||
8001f50: 400b ands r3, r1
|
||
8001f52: 2b00 cmp r3, #0
|
||
8001f54: d00a beq.n 8001f6c <HAL_I2C_Init+0x138>
|
||
8001f56: 68fb ldr r3, [r7, #12]
|
||
8001f58: 1e59 subs r1, r3, #1
|
||
8001f5a: 687b ldr r3, [r7, #4]
|
||
8001f5c: 685b ldr r3, [r3, #4]
|
||
8001f5e: 005b lsls r3, r3, #1
|
||
8001f60: fbb1 f3f3 udiv r3, r1, r3
|
||
8001f64: 3301 adds r3, #1
|
||
8001f66: f3c3 030b ubfx r3, r3, #0, #12
|
||
8001f6a: e051 b.n 8002010 <HAL_I2C_Init+0x1dc>
|
||
8001f6c: 2304 movs r3, #4
|
||
8001f6e: e04f b.n 8002010 <HAL_I2C_Init+0x1dc>
|
||
8001f70: 687b ldr r3, [r7, #4]
|
||
8001f72: 689b ldr r3, [r3, #8]
|
||
8001f74: 2b00 cmp r3, #0
|
||
8001f76: d111 bne.n 8001f9c <HAL_I2C_Init+0x168>
|
||
8001f78: 68fb ldr r3, [r7, #12]
|
||
8001f7a: 1e58 subs r0, r3, #1
|
||
8001f7c: 687b ldr r3, [r7, #4]
|
||
8001f7e: 6859 ldr r1, [r3, #4]
|
||
8001f80: 460b mov r3, r1
|
||
8001f82: 005b lsls r3, r3, #1
|
||
8001f84: 440b add r3, r1
|
||
8001f86: fbb0 f3f3 udiv r3, r0, r3
|
||
8001f8a: 3301 adds r3, #1
|
||
8001f8c: f3c3 030b ubfx r3, r3, #0, #12
|
||
8001f90: 2b00 cmp r3, #0
|
||
8001f92: bf0c ite eq
|
||
8001f94: 2301 moveq r3, #1
|
||
8001f96: 2300 movne r3, #0
|
||
8001f98: b2db uxtb r3, r3
|
||
8001f9a: e012 b.n 8001fc2 <HAL_I2C_Init+0x18e>
|
||
8001f9c: 68fb ldr r3, [r7, #12]
|
||
8001f9e: 1e58 subs r0, r3, #1
|
||
8001fa0: 687b ldr r3, [r7, #4]
|
||
8001fa2: 6859 ldr r1, [r3, #4]
|
||
8001fa4: 460b mov r3, r1
|
||
8001fa6: 009b lsls r3, r3, #2
|
||
8001fa8: 440b add r3, r1
|
||
8001faa: 0099 lsls r1, r3, #2
|
||
8001fac: 440b add r3, r1
|
||
8001fae: fbb0 f3f3 udiv r3, r0, r3
|
||
8001fb2: 3301 adds r3, #1
|
||
8001fb4: f3c3 030b ubfx r3, r3, #0, #12
|
||
8001fb8: 2b00 cmp r3, #0
|
||
8001fba: bf0c ite eq
|
||
8001fbc: 2301 moveq r3, #1
|
||
8001fbe: 2300 movne r3, #0
|
||
8001fc0: b2db uxtb r3, r3
|
||
8001fc2: 2b00 cmp r3, #0
|
||
8001fc4: d001 beq.n 8001fca <HAL_I2C_Init+0x196>
|
||
8001fc6: 2301 movs r3, #1
|
||
8001fc8: e022 b.n 8002010 <HAL_I2C_Init+0x1dc>
|
||
8001fca: 687b ldr r3, [r7, #4]
|
||
8001fcc: 689b ldr r3, [r3, #8]
|
||
8001fce: 2b00 cmp r3, #0
|
||
8001fd0: d10e bne.n 8001ff0 <HAL_I2C_Init+0x1bc>
|
||
8001fd2: 68fb ldr r3, [r7, #12]
|
||
8001fd4: 1e58 subs r0, r3, #1
|
||
8001fd6: 687b ldr r3, [r7, #4]
|
||
8001fd8: 6859 ldr r1, [r3, #4]
|
||
8001fda: 460b mov r3, r1
|
||
8001fdc: 005b lsls r3, r3, #1
|
||
8001fde: 440b add r3, r1
|
||
8001fe0: fbb0 f3f3 udiv r3, r0, r3
|
||
8001fe4: 3301 adds r3, #1
|
||
8001fe6: f3c3 030b ubfx r3, r3, #0, #12
|
||
8001fea: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
||
8001fee: e00f b.n 8002010 <HAL_I2C_Init+0x1dc>
|
||
8001ff0: 68fb ldr r3, [r7, #12]
|
||
8001ff2: 1e58 subs r0, r3, #1
|
||
8001ff4: 687b ldr r3, [r7, #4]
|
||
8001ff6: 6859 ldr r1, [r3, #4]
|
||
8001ff8: 460b mov r3, r1
|
||
8001ffa: 009b lsls r3, r3, #2
|
||
8001ffc: 440b add r3, r1
|
||
8001ffe: 0099 lsls r1, r3, #2
|
||
8002000: 440b add r3, r1
|
||
8002002: fbb0 f3f3 udiv r3, r0, r3
|
||
8002006: 3301 adds r3, #1
|
||
8002008: f3c3 030b ubfx r3, r3, #0, #12
|
||
800200c: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
||
8002010: 6879 ldr r1, [r7, #4]
|
||
8002012: 6809 ldr r1, [r1, #0]
|
||
8002014: 4313 orrs r3, r2
|
||
8002016: 61cb str r3, [r1, #28]
|
||
|
||
/*---------------------------- I2Cx CR1 Configuration ----------------------*/
|
||
/* Configure I2Cx: Generalcall and NoStretch mode */
|
||
MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
|
||
8002018: 687b ldr r3, [r7, #4]
|
||
800201a: 681b ldr r3, [r3, #0]
|
||
800201c: 681b ldr r3, [r3, #0]
|
||
800201e: f023 01c0 bic.w r1, r3, #192 ; 0xc0
|
||
8002022: 687b ldr r3, [r7, #4]
|
||
8002024: 69da ldr r2, [r3, #28]
|
||
8002026: 687b ldr r3, [r7, #4]
|
||
8002028: 6a1b ldr r3, [r3, #32]
|
||
800202a: 431a orrs r2, r3
|
||
800202c: 687b ldr r3, [r7, #4]
|
||
800202e: 681b ldr r3, [r3, #0]
|
||
8002030: 430a orrs r2, r1
|
||
8002032: 601a str r2, [r3, #0]
|
||
|
||
/*---------------------------- I2Cx OAR1 Configuration ---------------------*/
|
||
/* Configure I2Cx: Own Address1 and addressing mode */
|
||
MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
|
||
8002034: 687b ldr r3, [r7, #4]
|
||
8002036: 681b ldr r3, [r3, #0]
|
||
8002038: 689b ldr r3, [r3, #8]
|
||
800203a: f423 4303 bic.w r3, r3, #33536 ; 0x8300
|
||
800203e: f023 03ff bic.w r3, r3, #255 ; 0xff
|
||
8002042: 687a ldr r2, [r7, #4]
|
||
8002044: 6911 ldr r1, [r2, #16]
|
||
8002046: 687a ldr r2, [r7, #4]
|
||
8002048: 68d2 ldr r2, [r2, #12]
|
||
800204a: 4311 orrs r1, r2
|
||
800204c: 687a ldr r2, [r7, #4]
|
||
800204e: 6812 ldr r2, [r2, #0]
|
||
8002050: 430b orrs r3, r1
|
||
8002052: 6093 str r3, [r2, #8]
|
||
|
||
/*---------------------------- I2Cx OAR2 Configuration ---------------------*/
|
||
/* Configure I2Cx: Dual mode and Own Address2 */
|
||
MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
|
||
8002054: 687b ldr r3, [r7, #4]
|
||
8002056: 681b ldr r3, [r3, #0]
|
||
8002058: 68db ldr r3, [r3, #12]
|
||
800205a: f023 01ff bic.w r1, r3, #255 ; 0xff
|
||
800205e: 687b ldr r3, [r7, #4]
|
||
8002060: 695a ldr r2, [r3, #20]
|
||
8002062: 687b ldr r3, [r7, #4]
|
||
8002064: 699b ldr r3, [r3, #24]
|
||
8002066: 431a orrs r2, r3
|
||
8002068: 687b ldr r3, [r7, #4]
|
||
800206a: 681b ldr r3, [r3, #0]
|
||
800206c: 430a orrs r2, r1
|
||
800206e: 60da str r2, [r3, #12]
|
||
|
||
/* Enable the selected I2C peripheral */
|
||
__HAL_I2C_ENABLE(hi2c);
|
||
8002070: 687b ldr r3, [r7, #4]
|
||
8002072: 681b ldr r3, [r3, #0]
|
||
8002074: 681a ldr r2, [r3, #0]
|
||
8002076: 687b ldr r3, [r7, #4]
|
||
8002078: 681b ldr r3, [r3, #0]
|
||
800207a: f042 0201 orr.w r2, r2, #1
|
||
800207e: 601a str r2, [r3, #0]
|
||
|
||
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
||
8002080: 687b ldr r3, [r7, #4]
|
||
8002082: 2200 movs r2, #0
|
||
8002084: 641a str r2, [r3, #64] ; 0x40
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002086: 687b ldr r3, [r7, #4]
|
||
8002088: 2220 movs r2, #32
|
||
800208a: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
800208e: 687b ldr r3, [r7, #4]
|
||
8002090: 2200 movs r2, #0
|
||
8002092: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002094: 687b ldr r3, [r7, #4]
|
||
8002096: 2200 movs r2, #0
|
||
8002098: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
|
||
return HAL_OK;
|
||
800209c: 2300 movs r3, #0
|
||
}
|
||
800209e: 4618 mov r0, r3
|
||
80020a0: 3710 adds r7, #16
|
||
80020a2: 46bd mov sp, r7
|
||
80020a4: bd80 pop {r7, pc}
|
||
80020a6: bf00 nop
|
||
80020a8: 000186a0 .word 0x000186a0
|
||
80020ac: 001e847f .word 0x001e847f
|
||
80020b0: 003d08ff .word 0x003d08ff
|
||
80020b4: 431bde83 .word 0x431bde83
|
||
80020b8: 10624dd3 .word 0x10624dd3
|
||
|
||
080020bc <HAL_I2C_Mem_Write>:
|
||
* @param Size Amount of data to be sent
|
||
* @param Timeout Timeout duration
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
||
{
|
||
80020bc: b580 push {r7, lr}
|
||
80020be: b088 sub sp, #32
|
||
80020c0: af02 add r7, sp, #8
|
||
80020c2: 60f8 str r0, [r7, #12]
|
||
80020c4: 4608 mov r0, r1
|
||
80020c6: 4611 mov r1, r2
|
||
80020c8: 461a mov r2, r3
|
||
80020ca: 4603 mov r3, r0
|
||
80020cc: 817b strh r3, [r7, #10]
|
||
80020ce: 460b mov r3, r1
|
||
80020d0: 813b strh r3, [r7, #8]
|
||
80020d2: 4613 mov r3, r2
|
||
80020d4: 80fb strh r3, [r7, #6]
|
||
/* Init tickstart for timeout management*/
|
||
uint32_t tickstart = HAL_GetTick();
|
||
80020d6: f7ff fbd7 bl 8001888 <HAL_GetTick>
|
||
80020da: 6178 str r0, [r7, #20]
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
|
||
|
||
if (hi2c->State == HAL_I2C_STATE_READY)
|
||
80020dc: 68fb ldr r3, [r7, #12]
|
||
80020de: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
||
80020e2: b2db uxtb r3, r3
|
||
80020e4: 2b20 cmp r3, #32
|
||
80020e6: f040 80d9 bne.w 800229c <HAL_I2C_Mem_Write+0x1e0>
|
||
{
|
||
/* Wait until BUSY flag is reset */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
|
||
80020ea: 697b ldr r3, [r7, #20]
|
||
80020ec: 9300 str r3, [sp, #0]
|
||
80020ee: 2319 movs r3, #25
|
||
80020f0: 2201 movs r2, #1
|
||
80020f2: 496d ldr r1, [pc, #436] ; (80022a8 <HAL_I2C_Mem_Write+0x1ec>)
|
||
80020f4: 68f8 ldr r0, [r7, #12]
|
||
80020f6: f000 fcc1 bl 8002a7c <I2C_WaitOnFlagUntilTimeout>
|
||
80020fa: 4603 mov r3, r0
|
||
80020fc: 2b00 cmp r3, #0
|
||
80020fe: d001 beq.n 8002104 <HAL_I2C_Mem_Write+0x48>
|
||
{
|
||
return HAL_BUSY;
|
||
8002100: 2302 movs r3, #2
|
||
8002102: e0cc b.n 800229e <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
|
||
/* Process Locked */
|
||
__HAL_LOCK(hi2c);
|
||
8002104: 68fb ldr r3, [r7, #12]
|
||
8002106: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
|
||
800210a: 2b01 cmp r3, #1
|
||
800210c: d101 bne.n 8002112 <HAL_I2C_Mem_Write+0x56>
|
||
800210e: 2302 movs r3, #2
|
||
8002110: e0c5 b.n 800229e <HAL_I2C_Mem_Write+0x1e2>
|
||
8002112: 68fb ldr r3, [r7, #12]
|
||
8002114: 2201 movs r2, #1
|
||
8002116: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
/* Check if the I2C is already enabled */
|
||
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
|
||
800211a: 68fb ldr r3, [r7, #12]
|
||
800211c: 681b ldr r3, [r3, #0]
|
||
800211e: 681b ldr r3, [r3, #0]
|
||
8002120: f003 0301 and.w r3, r3, #1
|
||
8002124: 2b01 cmp r3, #1
|
||
8002126: d007 beq.n 8002138 <HAL_I2C_Mem_Write+0x7c>
|
||
{
|
||
/* Enable I2C peripheral */
|
||
__HAL_I2C_ENABLE(hi2c);
|
||
8002128: 68fb ldr r3, [r7, #12]
|
||
800212a: 681b ldr r3, [r3, #0]
|
||
800212c: 681a ldr r2, [r3, #0]
|
||
800212e: 68fb ldr r3, [r7, #12]
|
||
8002130: 681b ldr r3, [r3, #0]
|
||
8002132: f042 0201 orr.w r2, r2, #1
|
||
8002136: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Disable Pos */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
||
8002138: 68fb ldr r3, [r7, #12]
|
||
800213a: 681b ldr r3, [r3, #0]
|
||
800213c: 681a ldr r2, [r3, #0]
|
||
800213e: 68fb ldr r3, [r7, #12]
|
||
8002140: 681b ldr r3, [r3, #0]
|
||
8002142: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
||
8002146: 601a str r2, [r3, #0]
|
||
|
||
hi2c->State = HAL_I2C_STATE_BUSY_TX;
|
||
8002148: 68fb ldr r3, [r7, #12]
|
||
800214a: 2221 movs r2, #33 ; 0x21
|
||
800214c: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_MEM;
|
||
8002150: 68fb ldr r3, [r7, #12]
|
||
8002152: 2240 movs r2, #64 ; 0x40
|
||
8002154: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
||
8002158: 68fb ldr r3, [r7, #12]
|
||
800215a: 2200 movs r2, #0
|
||
800215c: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Prepare transfer parameters */
|
||
hi2c->pBuffPtr = pData;
|
||
800215e: 68fb ldr r3, [r7, #12]
|
||
8002160: 6a3a ldr r2, [r7, #32]
|
||
8002162: 625a str r2, [r3, #36] ; 0x24
|
||
hi2c->XferCount = Size;
|
||
8002164: 68fb ldr r3, [r7, #12]
|
||
8002166: 8cba ldrh r2, [r7, #36] ; 0x24
|
||
8002168: 855a strh r2, [r3, #42] ; 0x2a
|
||
hi2c->XferSize = hi2c->XferCount;
|
||
800216a: 68fb ldr r3, [r7, #12]
|
||
800216c: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
800216e: b29a uxth r2, r3
|
||
8002170: 68fb ldr r3, [r7, #12]
|
||
8002172: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
|
||
8002174: 68fb ldr r3, [r7, #12]
|
||
8002176: 4a4d ldr r2, [pc, #308] ; (80022ac <HAL_I2C_Mem_Write+0x1f0>)
|
||
8002178: 62da str r2, [r3, #44] ; 0x2c
|
||
|
||
/* Send Slave Address and Memory Address */
|
||
if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
|
||
800217a: 88f8 ldrh r0, [r7, #6]
|
||
800217c: 893a ldrh r2, [r7, #8]
|
||
800217e: 8979 ldrh r1, [r7, #10]
|
||
8002180: 697b ldr r3, [r7, #20]
|
||
8002182: 9301 str r3, [sp, #4]
|
||
8002184: 6abb ldr r3, [r7, #40] ; 0x28
|
||
8002186: 9300 str r3, [sp, #0]
|
||
8002188: 4603 mov r3, r0
|
||
800218a: 68f8 ldr r0, [r7, #12]
|
||
800218c: f000 faf8 bl 8002780 <I2C_RequestMemoryWrite>
|
||
8002190: 4603 mov r3, r0
|
||
8002192: 2b00 cmp r3, #0
|
||
8002194: d052 beq.n 800223c <HAL_I2C_Mem_Write+0x180>
|
||
{
|
||
return HAL_ERROR;
|
||
8002196: 2301 movs r3, #1
|
||
8002198: e081 b.n 800229e <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
|
||
while (hi2c->XferSize > 0U)
|
||
{
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
||
800219a: 697a ldr r2, [r7, #20]
|
||
800219c: 6ab9 ldr r1, [r7, #40] ; 0x28
|
||
800219e: 68f8 ldr r0, [r7, #12]
|
||
80021a0: f000 fd42 bl 8002c28 <I2C_WaitOnTXEFlagUntilTimeout>
|
||
80021a4: 4603 mov r3, r0
|
||
80021a6: 2b00 cmp r3, #0
|
||
80021a8: d00d beq.n 80021c6 <HAL_I2C_Mem_Write+0x10a>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
80021aa: 68fb ldr r3, [r7, #12]
|
||
80021ac: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
80021ae: 2b04 cmp r3, #4
|
||
80021b0: d107 bne.n 80021c2 <HAL_I2C_Mem_Write+0x106>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
80021b2: 68fb ldr r3, [r7, #12]
|
||
80021b4: 681b ldr r3, [r3, #0]
|
||
80021b6: 681a ldr r2, [r3, #0]
|
||
80021b8: 68fb ldr r3, [r7, #12]
|
||
80021ba: 681b ldr r3, [r3, #0]
|
||
80021bc: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
80021c0: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
80021c2: 2301 movs r3, #1
|
||
80021c4: e06b b.n 800229e <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
|
||
/* Write data to DR */
|
||
hi2c->Instance->DR = *hi2c->pBuffPtr;
|
||
80021c6: 68fb ldr r3, [r7, #12]
|
||
80021c8: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80021ca: 781a ldrb r2, [r3, #0]
|
||
80021cc: 68fb ldr r3, [r7, #12]
|
||
80021ce: 681b ldr r3, [r3, #0]
|
||
80021d0: 611a str r2, [r3, #16]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
80021d2: 68fb ldr r3, [r7, #12]
|
||
80021d4: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80021d6: 1c5a adds r2, r3, #1
|
||
80021d8: 68fb ldr r3, [r7, #12]
|
||
80021da: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
80021dc: 68fb ldr r3, [r7, #12]
|
||
80021de: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80021e0: 3b01 subs r3, #1
|
||
80021e2: b29a uxth r2, r3
|
||
80021e4: 68fb ldr r3, [r7, #12]
|
||
80021e6: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
80021e8: 68fb ldr r3, [r7, #12]
|
||
80021ea: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
80021ec: b29b uxth r3, r3
|
||
80021ee: 3b01 subs r3, #1
|
||
80021f0: b29a uxth r2, r3
|
||
80021f2: 68fb ldr r3, [r7, #12]
|
||
80021f4: 855a strh r2, [r3, #42] ; 0x2a
|
||
|
||
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
|
||
80021f6: 68fb ldr r3, [r7, #12]
|
||
80021f8: 681b ldr r3, [r3, #0]
|
||
80021fa: 695b ldr r3, [r3, #20]
|
||
80021fc: f003 0304 and.w r3, r3, #4
|
||
8002200: 2b04 cmp r3, #4
|
||
8002202: d11b bne.n 800223c <HAL_I2C_Mem_Write+0x180>
|
||
8002204: 68fb ldr r3, [r7, #12]
|
||
8002206: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002208: 2b00 cmp r3, #0
|
||
800220a: d017 beq.n 800223c <HAL_I2C_Mem_Write+0x180>
|
||
{
|
||
/* Write data to DR */
|
||
hi2c->Instance->DR = *hi2c->pBuffPtr;
|
||
800220c: 68fb ldr r3, [r7, #12]
|
||
800220e: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002210: 781a ldrb r2, [r3, #0]
|
||
8002212: 68fb ldr r3, [r7, #12]
|
||
8002214: 681b ldr r3, [r3, #0]
|
||
8002216: 611a str r2, [r3, #16]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
8002218: 68fb ldr r3, [r7, #12]
|
||
800221a: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800221c: 1c5a adds r2, r3, #1
|
||
800221e: 68fb ldr r3, [r7, #12]
|
||
8002220: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
8002222: 68fb ldr r3, [r7, #12]
|
||
8002224: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002226: 3b01 subs r3, #1
|
||
8002228: b29a uxth r2, r3
|
||
800222a: 68fb ldr r3, [r7, #12]
|
||
800222c: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
800222e: 68fb ldr r3, [r7, #12]
|
||
8002230: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002232: b29b uxth r3, r3
|
||
8002234: 3b01 subs r3, #1
|
||
8002236: b29a uxth r2, r3
|
||
8002238: 68fb ldr r3, [r7, #12]
|
||
800223a: 855a strh r2, [r3, #42] ; 0x2a
|
||
while (hi2c->XferSize > 0U)
|
||
800223c: 68fb ldr r3, [r7, #12]
|
||
800223e: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002240: 2b00 cmp r3, #0
|
||
8002242: d1aa bne.n 800219a <HAL_I2C_Mem_Write+0xde>
|
||
}
|
||
}
|
||
|
||
/* Wait until BTF flag is set */
|
||
if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
||
8002244: 697a ldr r2, [r7, #20]
|
||
8002246: 6ab9 ldr r1, [r7, #40] ; 0x28
|
||
8002248: 68f8 ldr r0, [r7, #12]
|
||
800224a: f000 fd2e bl 8002caa <I2C_WaitOnBTFFlagUntilTimeout>
|
||
800224e: 4603 mov r3, r0
|
||
8002250: 2b00 cmp r3, #0
|
||
8002252: d00d beq.n 8002270 <HAL_I2C_Mem_Write+0x1b4>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
8002254: 68fb ldr r3, [r7, #12]
|
||
8002256: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002258: 2b04 cmp r3, #4
|
||
800225a: d107 bne.n 800226c <HAL_I2C_Mem_Write+0x1b0>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
800225c: 68fb ldr r3, [r7, #12]
|
||
800225e: 681b ldr r3, [r3, #0]
|
||
8002260: 681a ldr r2, [r3, #0]
|
||
8002262: 68fb ldr r3, [r7, #12]
|
||
8002264: 681b ldr r3, [r3, #0]
|
||
8002266: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
800226a: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
800226c: 2301 movs r3, #1
|
||
800226e: e016 b.n 800229e <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002270: 68fb ldr r3, [r7, #12]
|
||
8002272: 681b ldr r3, [r3, #0]
|
||
8002274: 681a ldr r2, [r3, #0]
|
||
8002276: 68fb ldr r3, [r7, #12]
|
||
8002278: 681b ldr r3, [r3, #0]
|
||
800227a: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
800227e: 601a str r2, [r3, #0]
|
||
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002280: 68fb ldr r3, [r7, #12]
|
||
8002282: 2220 movs r2, #32
|
||
8002284: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002288: 68fb ldr r3, [r7, #12]
|
||
800228a: 2200 movs r2, #0
|
||
800228c: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002290: 68fb ldr r3, [r7, #12]
|
||
8002292: 2200 movs r2, #0
|
||
8002294: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_OK;
|
||
8002298: 2300 movs r3, #0
|
||
800229a: e000 b.n 800229e <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
else
|
||
{
|
||
return HAL_BUSY;
|
||
800229c: 2302 movs r3, #2
|
||
}
|
||
}
|
||
800229e: 4618 mov r0, r3
|
||
80022a0: 3718 adds r7, #24
|
||
80022a2: 46bd mov sp, r7
|
||
80022a4: bd80 pop {r7, pc}
|
||
80022a6: bf00 nop
|
||
80022a8: 00100002 .word 0x00100002
|
||
80022ac: ffff0000 .word 0xffff0000
|
||
|
||
080022b0 <HAL_I2C_Mem_Read>:
|
||
* @param Size Amount of data to be sent
|
||
* @param Timeout Timeout duration
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
||
{
|
||
80022b0: b580 push {r7, lr}
|
||
80022b2: b08c sub sp, #48 ; 0x30
|
||
80022b4: af02 add r7, sp, #8
|
||
80022b6: 60f8 str r0, [r7, #12]
|
||
80022b8: 4608 mov r0, r1
|
||
80022ba: 4611 mov r1, r2
|
||
80022bc: 461a mov r2, r3
|
||
80022be: 4603 mov r3, r0
|
||
80022c0: 817b strh r3, [r7, #10]
|
||
80022c2: 460b mov r3, r1
|
||
80022c4: 813b strh r3, [r7, #8]
|
||
80022c6: 4613 mov r3, r2
|
||
80022c8: 80fb strh r3, [r7, #6]
|
||
__IO uint32_t count = 0U;
|
||
80022ca: 2300 movs r3, #0
|
||
80022cc: 623b str r3, [r7, #32]
|
||
|
||
/* Init tickstart for timeout management*/
|
||
uint32_t tickstart = HAL_GetTick();
|
||
80022ce: f7ff fadb bl 8001888 <HAL_GetTick>
|
||
80022d2: 6278 str r0, [r7, #36] ; 0x24
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
|
||
|
||
if (hi2c->State == HAL_I2C_STATE_READY)
|
||
80022d4: 68fb ldr r3, [r7, #12]
|
||
80022d6: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
||
80022da: b2db uxtb r3, r3
|
||
80022dc: 2b20 cmp r3, #32
|
||
80022de: f040 8244 bne.w 800276a <HAL_I2C_Mem_Read+0x4ba>
|
||
{
|
||
/* Wait until BUSY flag is reset */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
|
||
80022e2: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80022e4: 9300 str r3, [sp, #0]
|
||
80022e6: 2319 movs r3, #25
|
||
80022e8: 2201 movs r2, #1
|
||
80022ea: 4982 ldr r1, [pc, #520] ; (80024f4 <HAL_I2C_Mem_Read+0x244>)
|
||
80022ec: 68f8 ldr r0, [r7, #12]
|
||
80022ee: f000 fbc5 bl 8002a7c <I2C_WaitOnFlagUntilTimeout>
|
||
80022f2: 4603 mov r3, r0
|
||
80022f4: 2b00 cmp r3, #0
|
||
80022f6: d001 beq.n 80022fc <HAL_I2C_Mem_Read+0x4c>
|
||
{
|
||
return HAL_BUSY;
|
||
80022f8: 2302 movs r3, #2
|
||
80022fa: e237 b.n 800276c <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
/* Process Locked */
|
||
__HAL_LOCK(hi2c);
|
||
80022fc: 68fb ldr r3, [r7, #12]
|
||
80022fe: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
|
||
8002302: 2b01 cmp r3, #1
|
||
8002304: d101 bne.n 800230a <HAL_I2C_Mem_Read+0x5a>
|
||
8002306: 2302 movs r3, #2
|
||
8002308: e230 b.n 800276c <HAL_I2C_Mem_Read+0x4bc>
|
||
800230a: 68fb ldr r3, [r7, #12]
|
||
800230c: 2201 movs r2, #1
|
||
800230e: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
/* Check if the I2C is already enabled */
|
||
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
|
||
8002312: 68fb ldr r3, [r7, #12]
|
||
8002314: 681b ldr r3, [r3, #0]
|
||
8002316: 681b ldr r3, [r3, #0]
|
||
8002318: f003 0301 and.w r3, r3, #1
|
||
800231c: 2b01 cmp r3, #1
|
||
800231e: d007 beq.n 8002330 <HAL_I2C_Mem_Read+0x80>
|
||
{
|
||
/* Enable I2C peripheral */
|
||
__HAL_I2C_ENABLE(hi2c);
|
||
8002320: 68fb ldr r3, [r7, #12]
|
||
8002322: 681b ldr r3, [r3, #0]
|
||
8002324: 681a ldr r2, [r3, #0]
|
||
8002326: 68fb ldr r3, [r7, #12]
|
||
8002328: 681b ldr r3, [r3, #0]
|
||
800232a: f042 0201 orr.w r2, r2, #1
|
||
800232e: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Disable Pos */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
||
8002330: 68fb ldr r3, [r7, #12]
|
||
8002332: 681b ldr r3, [r3, #0]
|
||
8002334: 681a ldr r2, [r3, #0]
|
||
8002336: 68fb ldr r3, [r7, #12]
|
||
8002338: 681b ldr r3, [r3, #0]
|
||
800233a: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
||
800233e: 601a str r2, [r3, #0]
|
||
|
||
hi2c->State = HAL_I2C_STATE_BUSY_RX;
|
||
8002340: 68fb ldr r3, [r7, #12]
|
||
8002342: 2222 movs r2, #34 ; 0x22
|
||
8002344: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_MEM;
|
||
8002348: 68fb ldr r3, [r7, #12]
|
||
800234a: 2240 movs r2, #64 ; 0x40
|
||
800234c: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
||
8002350: 68fb ldr r3, [r7, #12]
|
||
8002352: 2200 movs r2, #0
|
||
8002354: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Prepare transfer parameters */
|
||
hi2c->pBuffPtr = pData;
|
||
8002356: 68fb ldr r3, [r7, #12]
|
||
8002358: 6b3a ldr r2, [r7, #48] ; 0x30
|
||
800235a: 625a str r2, [r3, #36] ; 0x24
|
||
hi2c->XferCount = Size;
|
||
800235c: 68fb ldr r3, [r7, #12]
|
||
800235e: 8eba ldrh r2, [r7, #52] ; 0x34
|
||
8002360: 855a strh r2, [r3, #42] ; 0x2a
|
||
hi2c->XferSize = hi2c->XferCount;
|
||
8002362: 68fb ldr r3, [r7, #12]
|
||
8002364: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002366: b29a uxth r2, r3
|
||
8002368: 68fb ldr r3, [r7, #12]
|
||
800236a: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
|
||
800236c: 68fb ldr r3, [r7, #12]
|
||
800236e: 4a62 ldr r2, [pc, #392] ; (80024f8 <HAL_I2C_Mem_Read+0x248>)
|
||
8002370: 62da str r2, [r3, #44] ; 0x2c
|
||
|
||
/* Send Slave Address and Memory Address */
|
||
if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
|
||
8002372: 88f8 ldrh r0, [r7, #6]
|
||
8002374: 893a ldrh r2, [r7, #8]
|
||
8002376: 8979 ldrh r1, [r7, #10]
|
||
8002378: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
800237a: 9301 str r3, [sp, #4]
|
||
800237c: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
800237e: 9300 str r3, [sp, #0]
|
||
8002380: 4603 mov r3, r0
|
||
8002382: 68f8 ldr r0, [r7, #12]
|
||
8002384: f000 fa92 bl 80028ac <I2C_RequestMemoryRead>
|
||
8002388: 4603 mov r3, r0
|
||
800238a: 2b00 cmp r3, #0
|
||
800238c: d001 beq.n 8002392 <HAL_I2C_Mem_Read+0xe2>
|
||
{
|
||
return HAL_ERROR;
|
||
800238e: 2301 movs r3, #1
|
||
8002390: e1ec b.n 800276c <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
if (hi2c->XferSize == 0U)
|
||
8002392: 68fb ldr r3, [r7, #12]
|
||
8002394: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002396: 2b00 cmp r3, #0
|
||
8002398: d113 bne.n 80023c2 <HAL_I2C_Mem_Read+0x112>
|
||
{
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
800239a: 2300 movs r3, #0
|
||
800239c: 61fb str r3, [r7, #28]
|
||
800239e: 68fb ldr r3, [r7, #12]
|
||
80023a0: 681b ldr r3, [r3, #0]
|
||
80023a2: 695b ldr r3, [r3, #20]
|
||
80023a4: 61fb str r3, [r7, #28]
|
||
80023a6: 68fb ldr r3, [r7, #12]
|
||
80023a8: 681b ldr r3, [r3, #0]
|
||
80023aa: 699b ldr r3, [r3, #24]
|
||
80023ac: 61fb str r3, [r7, #28]
|
||
80023ae: 69fb ldr r3, [r7, #28]
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
80023b0: 68fb ldr r3, [r7, #12]
|
||
80023b2: 681b ldr r3, [r3, #0]
|
||
80023b4: 681a ldr r2, [r3, #0]
|
||
80023b6: 68fb ldr r3, [r7, #12]
|
||
80023b8: 681b ldr r3, [r3, #0]
|
||
80023ba: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
80023be: 601a str r2, [r3, #0]
|
||
80023c0: e1c0 b.n 8002744 <HAL_I2C_Mem_Read+0x494>
|
||
}
|
||
else if (hi2c->XferSize == 1U)
|
||
80023c2: 68fb ldr r3, [r7, #12]
|
||
80023c4: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80023c6: 2b01 cmp r3, #1
|
||
80023c8: d11e bne.n 8002408 <HAL_I2C_Mem_Read+0x158>
|
||
{
|
||
/* Disable Acknowledge */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
80023ca: 68fb ldr r3, [r7, #12]
|
||
80023cc: 681b ldr r3, [r3, #0]
|
||
80023ce: 681a ldr r2, [r3, #0]
|
||
80023d0: 68fb ldr r3, [r7, #12]
|
||
80023d2: 681b ldr r3, [r3, #0]
|
||
80023d4: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
||
80023d8: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
80023da: b672 cpsid i
|
||
}
|
||
80023dc: bf00 nop
|
||
/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
|
||
software sequence must complete before the current byte end of transfer */
|
||
__disable_irq();
|
||
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
80023de: 2300 movs r3, #0
|
||
80023e0: 61bb str r3, [r7, #24]
|
||
80023e2: 68fb ldr r3, [r7, #12]
|
||
80023e4: 681b ldr r3, [r3, #0]
|
||
80023e6: 695b ldr r3, [r3, #20]
|
||
80023e8: 61bb str r3, [r7, #24]
|
||
80023ea: 68fb ldr r3, [r7, #12]
|
||
80023ec: 681b ldr r3, [r3, #0]
|
||
80023ee: 699b ldr r3, [r3, #24]
|
||
80023f0: 61bb str r3, [r7, #24]
|
||
80023f2: 69bb ldr r3, [r7, #24]
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
80023f4: 68fb ldr r3, [r7, #12]
|
||
80023f6: 681b ldr r3, [r3, #0]
|
||
80023f8: 681a ldr r2, [r3, #0]
|
||
80023fa: 68fb ldr r3, [r7, #12]
|
||
80023fc: 681b ldr r3, [r3, #0]
|
||
80023fe: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002402: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
8002404: b662 cpsie i
|
||
}
|
||
8002406: e035 b.n 8002474 <HAL_I2C_Mem_Read+0x1c4>
|
||
|
||
/* Re-enable IRQs */
|
||
__enable_irq();
|
||
}
|
||
else if (hi2c->XferSize == 2U)
|
||
8002408: 68fb ldr r3, [r7, #12]
|
||
800240a: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
800240c: 2b02 cmp r3, #2
|
||
800240e: d11e bne.n 800244e <HAL_I2C_Mem_Read+0x19e>
|
||
{
|
||
/* Enable Pos */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
||
8002410: 68fb ldr r3, [r7, #12]
|
||
8002412: 681b ldr r3, [r3, #0]
|
||
8002414: 681a ldr r2, [r3, #0]
|
||
8002416: 68fb ldr r3, [r7, #12]
|
||
8002418: 681b ldr r3, [r3, #0]
|
||
800241a: f442 6200 orr.w r2, r2, #2048 ; 0x800
|
||
800241e: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
8002420: b672 cpsid i
|
||
}
|
||
8002422: bf00 nop
|
||
/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
|
||
software sequence must complete before the current byte end of transfer */
|
||
__disable_irq();
|
||
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
8002424: 2300 movs r3, #0
|
||
8002426: 617b str r3, [r7, #20]
|
||
8002428: 68fb ldr r3, [r7, #12]
|
||
800242a: 681b ldr r3, [r3, #0]
|
||
800242c: 695b ldr r3, [r3, #20]
|
||
800242e: 617b str r3, [r7, #20]
|
||
8002430: 68fb ldr r3, [r7, #12]
|
||
8002432: 681b ldr r3, [r3, #0]
|
||
8002434: 699b ldr r3, [r3, #24]
|
||
8002436: 617b str r3, [r7, #20]
|
||
8002438: 697b ldr r3, [r7, #20]
|
||
|
||
/* Disable Acknowledge */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
800243a: 68fb ldr r3, [r7, #12]
|
||
800243c: 681b ldr r3, [r3, #0]
|
||
800243e: 681a ldr r2, [r3, #0]
|
||
8002440: 68fb ldr r3, [r7, #12]
|
||
8002442: 681b ldr r3, [r3, #0]
|
||
8002444: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
||
8002448: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
800244a: b662 cpsie i
|
||
}
|
||
800244c: e012 b.n 8002474 <HAL_I2C_Mem_Read+0x1c4>
|
||
__enable_irq();
|
||
}
|
||
else
|
||
{
|
||
/* Enable Acknowledge */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
800244e: 68fb ldr r3, [r7, #12]
|
||
8002450: 681b ldr r3, [r3, #0]
|
||
8002452: 681a ldr r2, [r3, #0]
|
||
8002454: 68fb ldr r3, [r7, #12]
|
||
8002456: 681b ldr r3, [r3, #0]
|
||
8002458: f442 6280 orr.w r2, r2, #1024 ; 0x400
|
||
800245c: 601a str r2, [r3, #0]
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
800245e: 2300 movs r3, #0
|
||
8002460: 613b str r3, [r7, #16]
|
||
8002462: 68fb ldr r3, [r7, #12]
|
||
8002464: 681b ldr r3, [r3, #0]
|
||
8002466: 695b ldr r3, [r3, #20]
|
||
8002468: 613b str r3, [r7, #16]
|
||
800246a: 68fb ldr r3, [r7, #12]
|
||
800246c: 681b ldr r3, [r3, #0]
|
||
800246e: 699b ldr r3, [r3, #24]
|
||
8002470: 613b str r3, [r7, #16]
|
||
8002472: 693b ldr r3, [r7, #16]
|
||
}
|
||
|
||
while (hi2c->XferSize > 0U)
|
||
8002474: e166 b.n 8002744 <HAL_I2C_Mem_Read+0x494>
|
||
{
|
||
if (hi2c->XferSize <= 3U)
|
||
8002476: 68fb ldr r3, [r7, #12]
|
||
8002478: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
800247a: 2b03 cmp r3, #3
|
||
800247c: f200 811f bhi.w 80026be <HAL_I2C_Mem_Read+0x40e>
|
||
{
|
||
/* One byte */
|
||
if (hi2c->XferSize == 1U)
|
||
8002480: 68fb ldr r3, [r7, #12]
|
||
8002482: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002484: 2b01 cmp r3, #1
|
||
8002486: d123 bne.n 80024d0 <HAL_I2C_Mem_Read+0x220>
|
||
{
|
||
/* Wait until RXNE flag is set */
|
||
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
||
8002488: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
800248a: 6bb9 ldr r1, [r7, #56] ; 0x38
|
||
800248c: 68f8 ldr r0, [r7, #12]
|
||
800248e: f000 fc4d bl 8002d2c <I2C_WaitOnRXNEFlagUntilTimeout>
|
||
8002492: 4603 mov r3, r0
|
||
8002494: 2b00 cmp r3, #0
|
||
8002496: d001 beq.n 800249c <HAL_I2C_Mem_Read+0x1ec>
|
||
{
|
||
return HAL_ERROR;
|
||
8002498: 2301 movs r3, #1
|
||
800249a: e167 b.n 800276c <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
800249c: 68fb ldr r3, [r7, #12]
|
||
800249e: 681b ldr r3, [r3, #0]
|
||
80024a0: 691a ldr r2, [r3, #16]
|
||
80024a2: 68fb ldr r3, [r7, #12]
|
||
80024a4: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80024a6: b2d2 uxtb r2, r2
|
||
80024a8: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
80024aa: 68fb ldr r3, [r7, #12]
|
||
80024ac: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80024ae: 1c5a adds r2, r3, #1
|
||
80024b0: 68fb ldr r3, [r7, #12]
|
||
80024b2: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
80024b4: 68fb ldr r3, [r7, #12]
|
||
80024b6: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80024b8: 3b01 subs r3, #1
|
||
80024ba: b29a uxth r2, r3
|
||
80024bc: 68fb ldr r3, [r7, #12]
|
||
80024be: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
80024c0: 68fb ldr r3, [r7, #12]
|
||
80024c2: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
80024c4: b29b uxth r3, r3
|
||
80024c6: 3b01 subs r3, #1
|
||
80024c8: b29a uxth r2, r3
|
||
80024ca: 68fb ldr r3, [r7, #12]
|
||
80024cc: 855a strh r2, [r3, #42] ; 0x2a
|
||
80024ce: e139 b.n 8002744 <HAL_I2C_Mem_Read+0x494>
|
||
}
|
||
/* Two bytes */
|
||
else if (hi2c->XferSize == 2U)
|
||
80024d0: 68fb ldr r3, [r7, #12]
|
||
80024d2: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80024d4: 2b02 cmp r3, #2
|
||
80024d6: d152 bne.n 800257e <HAL_I2C_Mem_Read+0x2ce>
|
||
{
|
||
/* Wait until BTF flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
||
80024d8: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80024da: 9300 str r3, [sp, #0]
|
||
80024dc: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
80024de: 2200 movs r2, #0
|
||
80024e0: 4906 ldr r1, [pc, #24] ; (80024fc <HAL_I2C_Mem_Read+0x24c>)
|
||
80024e2: 68f8 ldr r0, [r7, #12]
|
||
80024e4: f000 faca bl 8002a7c <I2C_WaitOnFlagUntilTimeout>
|
||
80024e8: 4603 mov r3, r0
|
||
80024ea: 2b00 cmp r3, #0
|
||
80024ec: d008 beq.n 8002500 <HAL_I2C_Mem_Read+0x250>
|
||
{
|
||
return HAL_ERROR;
|
||
80024ee: 2301 movs r3, #1
|
||
80024f0: e13c b.n 800276c <HAL_I2C_Mem_Read+0x4bc>
|
||
80024f2: bf00 nop
|
||
80024f4: 00100002 .word 0x00100002
|
||
80024f8: ffff0000 .word 0xffff0000
|
||
80024fc: 00010004 .word 0x00010004
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
8002500: b672 cpsid i
|
||
}
|
||
8002502: bf00 nop
|
||
/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
|
||
software sequence must complete before the current byte end of transfer */
|
||
__disable_irq();
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002504: 68fb ldr r3, [r7, #12]
|
||
8002506: 681b ldr r3, [r3, #0]
|
||
8002508: 681a ldr r2, [r3, #0]
|
||
800250a: 68fb ldr r3, [r7, #12]
|
||
800250c: 681b ldr r3, [r3, #0]
|
||
800250e: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002512: 601a str r2, [r3, #0]
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
8002514: 68fb ldr r3, [r7, #12]
|
||
8002516: 681b ldr r3, [r3, #0]
|
||
8002518: 691a ldr r2, [r3, #16]
|
||
800251a: 68fb ldr r3, [r7, #12]
|
||
800251c: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800251e: b2d2 uxtb r2, r2
|
||
8002520: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
8002522: 68fb ldr r3, [r7, #12]
|
||
8002524: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002526: 1c5a adds r2, r3, #1
|
||
8002528: 68fb ldr r3, [r7, #12]
|
||
800252a: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
800252c: 68fb ldr r3, [r7, #12]
|
||
800252e: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002530: 3b01 subs r3, #1
|
||
8002532: b29a uxth r2, r3
|
||
8002534: 68fb ldr r3, [r7, #12]
|
||
8002536: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
8002538: 68fb ldr r3, [r7, #12]
|
||
800253a: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
800253c: b29b uxth r3, r3
|
||
800253e: 3b01 subs r3, #1
|
||
8002540: b29a uxth r2, r3
|
||
8002542: 68fb ldr r3, [r7, #12]
|
||
8002544: 855a strh r2, [r3, #42] ; 0x2a
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
8002546: b662 cpsie i
|
||
}
|
||
8002548: bf00 nop
|
||
|
||
/* Re-enable IRQs */
|
||
__enable_irq();
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
800254a: 68fb ldr r3, [r7, #12]
|
||
800254c: 681b ldr r3, [r3, #0]
|
||
800254e: 691a ldr r2, [r3, #16]
|
||
8002550: 68fb ldr r3, [r7, #12]
|
||
8002552: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002554: b2d2 uxtb r2, r2
|
||
8002556: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
8002558: 68fb ldr r3, [r7, #12]
|
||
800255a: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800255c: 1c5a adds r2, r3, #1
|
||
800255e: 68fb ldr r3, [r7, #12]
|
||
8002560: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
8002562: 68fb ldr r3, [r7, #12]
|
||
8002564: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002566: 3b01 subs r3, #1
|
||
8002568: b29a uxth r2, r3
|
||
800256a: 68fb ldr r3, [r7, #12]
|
||
800256c: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
800256e: 68fb ldr r3, [r7, #12]
|
||
8002570: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002572: b29b uxth r3, r3
|
||
8002574: 3b01 subs r3, #1
|
||
8002576: b29a uxth r2, r3
|
||
8002578: 68fb ldr r3, [r7, #12]
|
||
800257a: 855a strh r2, [r3, #42] ; 0x2a
|
||
800257c: e0e2 b.n 8002744 <HAL_I2C_Mem_Read+0x494>
|
||
}
|
||
/* 3 Last bytes */
|
||
else
|
||
{
|
||
/* Wait until BTF flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
||
800257e: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002580: 9300 str r3, [sp, #0]
|
||
8002582: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8002584: 2200 movs r2, #0
|
||
8002586: 497b ldr r1, [pc, #492] ; (8002774 <HAL_I2C_Mem_Read+0x4c4>)
|
||
8002588: 68f8 ldr r0, [r7, #12]
|
||
800258a: f000 fa77 bl 8002a7c <I2C_WaitOnFlagUntilTimeout>
|
||
800258e: 4603 mov r3, r0
|
||
8002590: 2b00 cmp r3, #0
|
||
8002592: d001 beq.n 8002598 <HAL_I2C_Mem_Read+0x2e8>
|
||
{
|
||
return HAL_ERROR;
|
||
8002594: 2301 movs r3, #1
|
||
8002596: e0e9 b.n 800276c <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
/* Disable Acknowledge */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
8002598: 68fb ldr r3, [r7, #12]
|
||
800259a: 681b ldr r3, [r3, #0]
|
||
800259c: 681a ldr r2, [r3, #0]
|
||
800259e: 68fb ldr r3, [r7, #12]
|
||
80025a0: 681b ldr r3, [r3, #0]
|
||
80025a2: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
||
80025a6: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
80025a8: b672 cpsid i
|
||
}
|
||
80025aa: bf00 nop
|
||
/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
|
||
software sequence must complete before the current byte end of transfer */
|
||
__disable_irq();
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
80025ac: 68fb ldr r3, [r7, #12]
|
||
80025ae: 681b ldr r3, [r3, #0]
|
||
80025b0: 691a ldr r2, [r3, #16]
|
||
80025b2: 68fb ldr r3, [r7, #12]
|
||
80025b4: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80025b6: b2d2 uxtb r2, r2
|
||
80025b8: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
80025ba: 68fb ldr r3, [r7, #12]
|
||
80025bc: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80025be: 1c5a adds r2, r3, #1
|
||
80025c0: 68fb ldr r3, [r7, #12]
|
||
80025c2: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
80025c4: 68fb ldr r3, [r7, #12]
|
||
80025c6: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80025c8: 3b01 subs r3, #1
|
||
80025ca: b29a uxth r2, r3
|
||
80025cc: 68fb ldr r3, [r7, #12]
|
||
80025ce: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
80025d0: 68fb ldr r3, [r7, #12]
|
||
80025d2: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
80025d4: b29b uxth r3, r3
|
||
80025d6: 3b01 subs r3, #1
|
||
80025d8: b29a uxth r2, r3
|
||
80025da: 68fb ldr r3, [r7, #12]
|
||
80025dc: 855a strh r2, [r3, #42] ; 0x2a
|
||
|
||
/* Wait until BTF flag is set */
|
||
count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U);
|
||
80025de: 4b66 ldr r3, [pc, #408] ; (8002778 <HAL_I2C_Mem_Read+0x4c8>)
|
||
80025e0: 681b ldr r3, [r3, #0]
|
||
80025e2: 08db lsrs r3, r3, #3
|
||
80025e4: 4a65 ldr r2, [pc, #404] ; (800277c <HAL_I2C_Mem_Read+0x4cc>)
|
||
80025e6: fba2 2303 umull r2, r3, r2, r3
|
||
80025ea: 0a1a lsrs r2, r3, #8
|
||
80025ec: 4613 mov r3, r2
|
||
80025ee: 009b lsls r3, r3, #2
|
||
80025f0: 4413 add r3, r2
|
||
80025f2: 00da lsls r2, r3, #3
|
||
80025f4: 1ad3 subs r3, r2, r3
|
||
80025f6: 623b str r3, [r7, #32]
|
||
do
|
||
{
|
||
count--;
|
||
80025f8: 6a3b ldr r3, [r7, #32]
|
||
80025fa: 3b01 subs r3, #1
|
||
80025fc: 623b str r3, [r7, #32]
|
||
if (count == 0U)
|
||
80025fe: 6a3b ldr r3, [r7, #32]
|
||
8002600: 2b00 cmp r3, #0
|
||
8002602: d118 bne.n 8002636 <HAL_I2C_Mem_Read+0x386>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002604: 68fb ldr r3, [r7, #12]
|
||
8002606: 2200 movs r2, #0
|
||
8002608: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
800260a: 68fb ldr r3, [r7, #12]
|
||
800260c: 2220 movs r2, #32
|
||
800260e: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002612: 68fb ldr r3, [r7, #12]
|
||
8002614: 2200 movs r2, #0
|
||
8002616: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
800261a: 68fb ldr r3, [r7, #12]
|
||
800261c: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
800261e: f043 0220 orr.w r2, r3, #32
|
||
8002622: 68fb ldr r3, [r7, #12]
|
||
8002624: 641a str r2, [r3, #64] ; 0x40
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
8002626: b662 cpsie i
|
||
}
|
||
8002628: bf00 nop
|
||
|
||
/* Re-enable IRQs */
|
||
__enable_irq();
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
800262a: 68fb ldr r3, [r7, #12]
|
||
800262c: 2200 movs r2, #0
|
||
800262e: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002632: 2301 movs r3, #1
|
||
8002634: e09a b.n 800276c <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
}
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET);
|
||
8002636: 68fb ldr r3, [r7, #12]
|
||
8002638: 681b ldr r3, [r3, #0]
|
||
800263a: 695b ldr r3, [r3, #20]
|
||
800263c: f003 0304 and.w r3, r3, #4
|
||
8002640: 2b04 cmp r3, #4
|
||
8002642: d1d9 bne.n 80025f8 <HAL_I2C_Mem_Read+0x348>
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002644: 68fb ldr r3, [r7, #12]
|
||
8002646: 681b ldr r3, [r3, #0]
|
||
8002648: 681a ldr r2, [r3, #0]
|
||
800264a: 68fb ldr r3, [r7, #12]
|
||
800264c: 681b ldr r3, [r3, #0]
|
||
800264e: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002652: 601a str r2, [r3, #0]
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
8002654: 68fb ldr r3, [r7, #12]
|
||
8002656: 681b ldr r3, [r3, #0]
|
||
8002658: 691a ldr r2, [r3, #16]
|
||
800265a: 68fb ldr r3, [r7, #12]
|
||
800265c: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800265e: b2d2 uxtb r2, r2
|
||
8002660: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
8002662: 68fb ldr r3, [r7, #12]
|
||
8002664: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002666: 1c5a adds r2, r3, #1
|
||
8002668: 68fb ldr r3, [r7, #12]
|
||
800266a: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
800266c: 68fb ldr r3, [r7, #12]
|
||
800266e: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002670: 3b01 subs r3, #1
|
||
8002672: b29a uxth r2, r3
|
||
8002674: 68fb ldr r3, [r7, #12]
|
||
8002676: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
8002678: 68fb ldr r3, [r7, #12]
|
||
800267a: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
800267c: b29b uxth r3, r3
|
||
800267e: 3b01 subs r3, #1
|
||
8002680: b29a uxth r2, r3
|
||
8002682: 68fb ldr r3, [r7, #12]
|
||
8002684: 855a strh r2, [r3, #42] ; 0x2a
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
8002686: b662 cpsie i
|
||
}
|
||
8002688: bf00 nop
|
||
|
||
/* Re-enable IRQs */
|
||
__enable_irq();
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
800268a: 68fb ldr r3, [r7, #12]
|
||
800268c: 681b ldr r3, [r3, #0]
|
||
800268e: 691a ldr r2, [r3, #16]
|
||
8002690: 68fb ldr r3, [r7, #12]
|
||
8002692: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002694: b2d2 uxtb r2, r2
|
||
8002696: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
8002698: 68fb ldr r3, [r7, #12]
|
||
800269a: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800269c: 1c5a adds r2, r3, #1
|
||
800269e: 68fb ldr r3, [r7, #12]
|
||
80026a0: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
80026a2: 68fb ldr r3, [r7, #12]
|
||
80026a4: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80026a6: 3b01 subs r3, #1
|
||
80026a8: b29a uxth r2, r3
|
||
80026aa: 68fb ldr r3, [r7, #12]
|
||
80026ac: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
80026ae: 68fb ldr r3, [r7, #12]
|
||
80026b0: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
80026b2: b29b uxth r3, r3
|
||
80026b4: 3b01 subs r3, #1
|
||
80026b6: b29a uxth r2, r3
|
||
80026b8: 68fb ldr r3, [r7, #12]
|
||
80026ba: 855a strh r2, [r3, #42] ; 0x2a
|
||
80026bc: e042 b.n 8002744 <HAL_I2C_Mem_Read+0x494>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Wait until RXNE flag is set */
|
||
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
||
80026be: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
80026c0: 6bb9 ldr r1, [r7, #56] ; 0x38
|
||
80026c2: 68f8 ldr r0, [r7, #12]
|
||
80026c4: f000 fb32 bl 8002d2c <I2C_WaitOnRXNEFlagUntilTimeout>
|
||
80026c8: 4603 mov r3, r0
|
||
80026ca: 2b00 cmp r3, #0
|
||
80026cc: d001 beq.n 80026d2 <HAL_I2C_Mem_Read+0x422>
|
||
{
|
||
return HAL_ERROR;
|
||
80026ce: 2301 movs r3, #1
|
||
80026d0: e04c b.n 800276c <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
80026d2: 68fb ldr r3, [r7, #12]
|
||
80026d4: 681b ldr r3, [r3, #0]
|
||
80026d6: 691a ldr r2, [r3, #16]
|
||
80026d8: 68fb ldr r3, [r7, #12]
|
||
80026da: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80026dc: b2d2 uxtb r2, r2
|
||
80026de: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
80026e0: 68fb ldr r3, [r7, #12]
|
||
80026e2: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80026e4: 1c5a adds r2, r3, #1
|
||
80026e6: 68fb ldr r3, [r7, #12]
|
||
80026e8: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
80026ea: 68fb ldr r3, [r7, #12]
|
||
80026ec: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80026ee: 3b01 subs r3, #1
|
||
80026f0: b29a uxth r2, r3
|
||
80026f2: 68fb ldr r3, [r7, #12]
|
||
80026f4: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
80026f6: 68fb ldr r3, [r7, #12]
|
||
80026f8: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
80026fa: b29b uxth r3, r3
|
||
80026fc: 3b01 subs r3, #1
|
||
80026fe: b29a uxth r2, r3
|
||
8002700: 68fb ldr r3, [r7, #12]
|
||
8002702: 855a strh r2, [r3, #42] ; 0x2a
|
||
|
||
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
|
||
8002704: 68fb ldr r3, [r7, #12]
|
||
8002706: 681b ldr r3, [r3, #0]
|
||
8002708: 695b ldr r3, [r3, #20]
|
||
800270a: f003 0304 and.w r3, r3, #4
|
||
800270e: 2b04 cmp r3, #4
|
||
8002710: d118 bne.n 8002744 <HAL_I2C_Mem_Read+0x494>
|
||
{
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
8002712: 68fb ldr r3, [r7, #12]
|
||
8002714: 681b ldr r3, [r3, #0]
|
||
8002716: 691a ldr r2, [r3, #16]
|
||
8002718: 68fb ldr r3, [r7, #12]
|
||
800271a: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800271c: b2d2 uxtb r2, r2
|
||
800271e: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
8002720: 68fb ldr r3, [r7, #12]
|
||
8002722: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002724: 1c5a adds r2, r3, #1
|
||
8002726: 68fb ldr r3, [r7, #12]
|
||
8002728: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
800272a: 68fb ldr r3, [r7, #12]
|
||
800272c: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
800272e: 3b01 subs r3, #1
|
||
8002730: b29a uxth r2, r3
|
||
8002732: 68fb ldr r3, [r7, #12]
|
||
8002734: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
8002736: 68fb ldr r3, [r7, #12]
|
||
8002738: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
800273a: b29b uxth r3, r3
|
||
800273c: 3b01 subs r3, #1
|
||
800273e: b29a uxth r2, r3
|
||
8002740: 68fb ldr r3, [r7, #12]
|
||
8002742: 855a strh r2, [r3, #42] ; 0x2a
|
||
while (hi2c->XferSize > 0U)
|
||
8002744: 68fb ldr r3, [r7, #12]
|
||
8002746: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002748: 2b00 cmp r3, #0
|
||
800274a: f47f ae94 bne.w 8002476 <HAL_I2C_Mem_Read+0x1c6>
|
||
}
|
||
}
|
||
}
|
||
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
800274e: 68fb ldr r3, [r7, #12]
|
||
8002750: 2220 movs r2, #32
|
||
8002752: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002756: 68fb ldr r3, [r7, #12]
|
||
8002758: 2200 movs r2, #0
|
||
800275a: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
800275e: 68fb ldr r3, [r7, #12]
|
||
8002760: 2200 movs r2, #0
|
||
8002762: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_OK;
|
||
8002766: 2300 movs r3, #0
|
||
8002768: e000 b.n 800276c <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
else
|
||
{
|
||
return HAL_BUSY;
|
||
800276a: 2302 movs r3, #2
|
||
}
|
||
}
|
||
800276c: 4618 mov r0, r3
|
||
800276e: 3728 adds r7, #40 ; 0x28
|
||
8002770: 46bd mov sp, r7
|
||
8002772: bd80 pop {r7, pc}
|
||
8002774: 00010004 .word 0x00010004
|
||
8002778: 20000000 .word 0x20000000
|
||
800277c: 14f8b589 .word 0x14f8b589
|
||
|
||
08002780 <I2C_RequestMemoryWrite>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002780: b580 push {r7, lr}
|
||
8002782: b088 sub sp, #32
|
||
8002784: af02 add r7, sp, #8
|
||
8002786: 60f8 str r0, [r7, #12]
|
||
8002788: 4608 mov r0, r1
|
||
800278a: 4611 mov r1, r2
|
||
800278c: 461a mov r2, r3
|
||
800278e: 4603 mov r3, r0
|
||
8002790: 817b strh r3, [r7, #10]
|
||
8002792: 460b mov r3, r1
|
||
8002794: 813b strh r3, [r7, #8]
|
||
8002796: 4613 mov r3, r2
|
||
8002798: 80fb strh r3, [r7, #6]
|
||
/* Generate Start */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
||
800279a: 68fb ldr r3, [r7, #12]
|
||
800279c: 681b ldr r3, [r3, #0]
|
||
800279e: 681a ldr r2, [r3, #0]
|
||
80027a0: 68fb ldr r3, [r7, #12]
|
||
80027a2: 681b ldr r3, [r3, #0]
|
||
80027a4: f442 7280 orr.w r2, r2, #256 ; 0x100
|
||
80027a8: 601a str r2, [r3, #0]
|
||
|
||
/* Wait until SB flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
||
80027aa: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80027ac: 9300 str r3, [sp, #0]
|
||
80027ae: 6a3b ldr r3, [r7, #32]
|
||
80027b0: 2200 movs r2, #0
|
||
80027b2: f04f 1101 mov.w r1, #65537 ; 0x10001
|
||
80027b6: 68f8 ldr r0, [r7, #12]
|
||
80027b8: f000 f960 bl 8002a7c <I2C_WaitOnFlagUntilTimeout>
|
||
80027bc: 4603 mov r3, r0
|
||
80027be: 2b00 cmp r3, #0
|
||
80027c0: d00d beq.n 80027de <I2C_RequestMemoryWrite+0x5e>
|
||
{
|
||
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
||
80027c2: 68fb ldr r3, [r7, #12]
|
||
80027c4: 681b ldr r3, [r3, #0]
|
||
80027c6: 681b ldr r3, [r3, #0]
|
||
80027c8: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
80027cc: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
80027d0: d103 bne.n 80027da <I2C_RequestMemoryWrite+0x5a>
|
||
{
|
||
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
||
80027d2: 68fb ldr r3, [r7, #12]
|
||
80027d4: f44f 7200 mov.w r2, #512 ; 0x200
|
||
80027d8: 641a str r2, [r3, #64] ; 0x40
|
||
}
|
||
return HAL_TIMEOUT;
|
||
80027da: 2303 movs r3, #3
|
||
80027dc: e05f b.n 800289e <I2C_RequestMemoryWrite+0x11e>
|
||
}
|
||
|
||
/* Send slave address */
|
||
hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
|
||
80027de: 897b ldrh r3, [r7, #10]
|
||
80027e0: b2db uxtb r3, r3
|
||
80027e2: 461a mov r2, r3
|
||
80027e4: 68fb ldr r3, [r7, #12]
|
||
80027e6: 681b ldr r3, [r3, #0]
|
||
80027e8: f002 02fe and.w r2, r2, #254 ; 0xfe
|
||
80027ec: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until ADDR flag is set */
|
||
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
||
80027ee: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80027f0: 6a3a ldr r2, [r7, #32]
|
||
80027f2: 492d ldr r1, [pc, #180] ; (80028a8 <I2C_RequestMemoryWrite+0x128>)
|
||
80027f4: 68f8 ldr r0, [r7, #12]
|
||
80027f6: f000 f998 bl 8002b2a <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
||
80027fa: 4603 mov r3, r0
|
||
80027fc: 2b00 cmp r3, #0
|
||
80027fe: d001 beq.n 8002804 <I2C_RequestMemoryWrite+0x84>
|
||
{
|
||
return HAL_ERROR;
|
||
8002800: 2301 movs r3, #1
|
||
8002802: e04c b.n 800289e <I2C_RequestMemoryWrite+0x11e>
|
||
}
|
||
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
8002804: 2300 movs r3, #0
|
||
8002806: 617b str r3, [r7, #20]
|
||
8002808: 68fb ldr r3, [r7, #12]
|
||
800280a: 681b ldr r3, [r3, #0]
|
||
800280c: 695b ldr r3, [r3, #20]
|
||
800280e: 617b str r3, [r7, #20]
|
||
8002810: 68fb ldr r3, [r7, #12]
|
||
8002812: 681b ldr r3, [r3, #0]
|
||
8002814: 699b ldr r3, [r3, #24]
|
||
8002816: 617b str r3, [r7, #20]
|
||
8002818: 697b ldr r3, [r7, #20]
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
800281a: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
800281c: 6a39 ldr r1, [r7, #32]
|
||
800281e: 68f8 ldr r0, [r7, #12]
|
||
8002820: f000 fa02 bl 8002c28 <I2C_WaitOnTXEFlagUntilTimeout>
|
||
8002824: 4603 mov r3, r0
|
||
8002826: 2b00 cmp r3, #0
|
||
8002828: d00d beq.n 8002846 <I2C_RequestMemoryWrite+0xc6>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
800282a: 68fb ldr r3, [r7, #12]
|
||
800282c: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
800282e: 2b04 cmp r3, #4
|
||
8002830: d107 bne.n 8002842 <I2C_RequestMemoryWrite+0xc2>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002832: 68fb ldr r3, [r7, #12]
|
||
8002834: 681b ldr r3, [r3, #0]
|
||
8002836: 681a ldr r2, [r3, #0]
|
||
8002838: 68fb ldr r3, [r7, #12]
|
||
800283a: 681b ldr r3, [r3, #0]
|
||
800283c: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002840: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
8002842: 2301 movs r3, #1
|
||
8002844: e02b b.n 800289e <I2C_RequestMemoryWrite+0x11e>
|
||
}
|
||
|
||
/* If Memory address size is 8Bit */
|
||
if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
|
||
8002846: 88fb ldrh r3, [r7, #6]
|
||
8002848: 2b01 cmp r3, #1
|
||
800284a: d105 bne.n 8002858 <I2C_RequestMemoryWrite+0xd8>
|
||
{
|
||
/* Send Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
||
800284c: 893b ldrh r3, [r7, #8]
|
||
800284e: b2da uxtb r2, r3
|
||
8002850: 68fb ldr r3, [r7, #12]
|
||
8002852: 681b ldr r3, [r3, #0]
|
||
8002854: 611a str r2, [r3, #16]
|
||
8002856: e021 b.n 800289c <I2C_RequestMemoryWrite+0x11c>
|
||
}
|
||
/* If Memory address size is 16Bit */
|
||
else
|
||
{
|
||
/* Send MSB of Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
|
||
8002858: 893b ldrh r3, [r7, #8]
|
||
800285a: 0a1b lsrs r3, r3, #8
|
||
800285c: b29b uxth r3, r3
|
||
800285e: b2da uxtb r2, r3
|
||
8002860: 68fb ldr r3, [r7, #12]
|
||
8002862: 681b ldr r3, [r3, #0]
|
||
8002864: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
8002866: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8002868: 6a39 ldr r1, [r7, #32]
|
||
800286a: 68f8 ldr r0, [r7, #12]
|
||
800286c: f000 f9dc bl 8002c28 <I2C_WaitOnTXEFlagUntilTimeout>
|
||
8002870: 4603 mov r3, r0
|
||
8002872: 2b00 cmp r3, #0
|
||
8002874: d00d beq.n 8002892 <I2C_RequestMemoryWrite+0x112>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
8002876: 68fb ldr r3, [r7, #12]
|
||
8002878: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
800287a: 2b04 cmp r3, #4
|
||
800287c: d107 bne.n 800288e <I2C_RequestMemoryWrite+0x10e>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
800287e: 68fb ldr r3, [r7, #12]
|
||
8002880: 681b ldr r3, [r3, #0]
|
||
8002882: 681a ldr r2, [r3, #0]
|
||
8002884: 68fb ldr r3, [r7, #12]
|
||
8002886: 681b ldr r3, [r3, #0]
|
||
8002888: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
800288c: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
800288e: 2301 movs r3, #1
|
||
8002890: e005 b.n 800289e <I2C_RequestMemoryWrite+0x11e>
|
||
}
|
||
|
||
/* Send LSB of Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
||
8002892: 893b ldrh r3, [r7, #8]
|
||
8002894: b2da uxtb r2, r3
|
||
8002896: 68fb ldr r3, [r7, #12]
|
||
8002898: 681b ldr r3, [r3, #0]
|
||
800289a: 611a str r2, [r3, #16]
|
||
}
|
||
|
||
return HAL_OK;
|
||
800289c: 2300 movs r3, #0
|
||
}
|
||
800289e: 4618 mov r0, r3
|
||
80028a0: 3718 adds r7, #24
|
||
80028a2: 46bd mov sp, r7
|
||
80028a4: bd80 pop {r7, pc}
|
||
80028a6: bf00 nop
|
||
80028a8: 00010002 .word 0x00010002
|
||
|
||
080028ac <I2C_RequestMemoryRead>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
80028ac: b580 push {r7, lr}
|
||
80028ae: b088 sub sp, #32
|
||
80028b0: af02 add r7, sp, #8
|
||
80028b2: 60f8 str r0, [r7, #12]
|
||
80028b4: 4608 mov r0, r1
|
||
80028b6: 4611 mov r1, r2
|
||
80028b8: 461a mov r2, r3
|
||
80028ba: 4603 mov r3, r0
|
||
80028bc: 817b strh r3, [r7, #10]
|
||
80028be: 460b mov r3, r1
|
||
80028c0: 813b strh r3, [r7, #8]
|
||
80028c2: 4613 mov r3, r2
|
||
80028c4: 80fb strh r3, [r7, #6]
|
||
/* Enable Acknowledge */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
80028c6: 68fb ldr r3, [r7, #12]
|
||
80028c8: 681b ldr r3, [r3, #0]
|
||
80028ca: 681a ldr r2, [r3, #0]
|
||
80028cc: 68fb ldr r3, [r7, #12]
|
||
80028ce: 681b ldr r3, [r3, #0]
|
||
80028d0: f442 6280 orr.w r2, r2, #1024 ; 0x400
|
||
80028d4: 601a str r2, [r3, #0]
|
||
|
||
/* Generate Start */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
||
80028d6: 68fb ldr r3, [r7, #12]
|
||
80028d8: 681b ldr r3, [r3, #0]
|
||
80028da: 681a ldr r2, [r3, #0]
|
||
80028dc: 68fb ldr r3, [r7, #12]
|
||
80028de: 681b ldr r3, [r3, #0]
|
||
80028e0: f442 7280 orr.w r2, r2, #256 ; 0x100
|
||
80028e4: 601a str r2, [r3, #0]
|
||
|
||
/* Wait until SB flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
||
80028e6: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80028e8: 9300 str r3, [sp, #0]
|
||
80028ea: 6a3b ldr r3, [r7, #32]
|
||
80028ec: 2200 movs r2, #0
|
||
80028ee: f04f 1101 mov.w r1, #65537 ; 0x10001
|
||
80028f2: 68f8 ldr r0, [r7, #12]
|
||
80028f4: f000 f8c2 bl 8002a7c <I2C_WaitOnFlagUntilTimeout>
|
||
80028f8: 4603 mov r3, r0
|
||
80028fa: 2b00 cmp r3, #0
|
||
80028fc: d00d beq.n 800291a <I2C_RequestMemoryRead+0x6e>
|
||
{
|
||
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
||
80028fe: 68fb ldr r3, [r7, #12]
|
||
8002900: 681b ldr r3, [r3, #0]
|
||
8002902: 681b ldr r3, [r3, #0]
|
||
8002904: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8002908: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
800290c: d103 bne.n 8002916 <I2C_RequestMemoryRead+0x6a>
|
||
{
|
||
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
||
800290e: 68fb ldr r3, [r7, #12]
|
||
8002910: f44f 7200 mov.w r2, #512 ; 0x200
|
||
8002914: 641a str r2, [r3, #64] ; 0x40
|
||
}
|
||
return HAL_TIMEOUT;
|
||
8002916: 2303 movs r3, #3
|
||
8002918: e0aa b.n 8002a70 <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Send slave address */
|
||
hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
|
||
800291a: 897b ldrh r3, [r7, #10]
|
||
800291c: b2db uxtb r3, r3
|
||
800291e: 461a mov r2, r3
|
||
8002920: 68fb ldr r3, [r7, #12]
|
||
8002922: 681b ldr r3, [r3, #0]
|
||
8002924: f002 02fe and.w r2, r2, #254 ; 0xfe
|
||
8002928: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until ADDR flag is set */
|
||
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
||
800292a: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
800292c: 6a3a ldr r2, [r7, #32]
|
||
800292e: 4952 ldr r1, [pc, #328] ; (8002a78 <I2C_RequestMemoryRead+0x1cc>)
|
||
8002930: 68f8 ldr r0, [r7, #12]
|
||
8002932: f000 f8fa bl 8002b2a <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
||
8002936: 4603 mov r3, r0
|
||
8002938: 2b00 cmp r3, #0
|
||
800293a: d001 beq.n 8002940 <I2C_RequestMemoryRead+0x94>
|
||
{
|
||
return HAL_ERROR;
|
||
800293c: 2301 movs r3, #1
|
||
800293e: e097 b.n 8002a70 <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
8002940: 2300 movs r3, #0
|
||
8002942: 617b str r3, [r7, #20]
|
||
8002944: 68fb ldr r3, [r7, #12]
|
||
8002946: 681b ldr r3, [r3, #0]
|
||
8002948: 695b ldr r3, [r3, #20]
|
||
800294a: 617b str r3, [r7, #20]
|
||
800294c: 68fb ldr r3, [r7, #12]
|
||
800294e: 681b ldr r3, [r3, #0]
|
||
8002950: 699b ldr r3, [r3, #24]
|
||
8002952: 617b str r3, [r7, #20]
|
||
8002954: 697b ldr r3, [r7, #20]
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
8002956: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8002958: 6a39 ldr r1, [r7, #32]
|
||
800295a: 68f8 ldr r0, [r7, #12]
|
||
800295c: f000 f964 bl 8002c28 <I2C_WaitOnTXEFlagUntilTimeout>
|
||
8002960: 4603 mov r3, r0
|
||
8002962: 2b00 cmp r3, #0
|
||
8002964: d00d beq.n 8002982 <I2C_RequestMemoryRead+0xd6>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
8002966: 68fb ldr r3, [r7, #12]
|
||
8002968: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
800296a: 2b04 cmp r3, #4
|
||
800296c: d107 bne.n 800297e <I2C_RequestMemoryRead+0xd2>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
800296e: 68fb ldr r3, [r7, #12]
|
||
8002970: 681b ldr r3, [r3, #0]
|
||
8002972: 681a ldr r2, [r3, #0]
|
||
8002974: 68fb ldr r3, [r7, #12]
|
||
8002976: 681b ldr r3, [r3, #0]
|
||
8002978: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
800297c: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
800297e: 2301 movs r3, #1
|
||
8002980: e076 b.n 8002a70 <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* If Memory address size is 8Bit */
|
||
if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
|
||
8002982: 88fb ldrh r3, [r7, #6]
|
||
8002984: 2b01 cmp r3, #1
|
||
8002986: d105 bne.n 8002994 <I2C_RequestMemoryRead+0xe8>
|
||
{
|
||
/* Send Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
||
8002988: 893b ldrh r3, [r7, #8]
|
||
800298a: b2da uxtb r2, r3
|
||
800298c: 68fb ldr r3, [r7, #12]
|
||
800298e: 681b ldr r3, [r3, #0]
|
||
8002990: 611a str r2, [r3, #16]
|
||
8002992: e021 b.n 80029d8 <I2C_RequestMemoryRead+0x12c>
|
||
}
|
||
/* If Memory address size is 16Bit */
|
||
else
|
||
{
|
||
/* Send MSB of Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
|
||
8002994: 893b ldrh r3, [r7, #8]
|
||
8002996: 0a1b lsrs r3, r3, #8
|
||
8002998: b29b uxth r3, r3
|
||
800299a: b2da uxtb r2, r3
|
||
800299c: 68fb ldr r3, [r7, #12]
|
||
800299e: 681b ldr r3, [r3, #0]
|
||
80029a0: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
80029a2: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
80029a4: 6a39 ldr r1, [r7, #32]
|
||
80029a6: 68f8 ldr r0, [r7, #12]
|
||
80029a8: f000 f93e bl 8002c28 <I2C_WaitOnTXEFlagUntilTimeout>
|
||
80029ac: 4603 mov r3, r0
|
||
80029ae: 2b00 cmp r3, #0
|
||
80029b0: d00d beq.n 80029ce <I2C_RequestMemoryRead+0x122>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
80029b2: 68fb ldr r3, [r7, #12]
|
||
80029b4: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
80029b6: 2b04 cmp r3, #4
|
||
80029b8: d107 bne.n 80029ca <I2C_RequestMemoryRead+0x11e>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
80029ba: 68fb ldr r3, [r7, #12]
|
||
80029bc: 681b ldr r3, [r3, #0]
|
||
80029be: 681a ldr r2, [r3, #0]
|
||
80029c0: 68fb ldr r3, [r7, #12]
|
||
80029c2: 681b ldr r3, [r3, #0]
|
||
80029c4: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
80029c8: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
80029ca: 2301 movs r3, #1
|
||
80029cc: e050 b.n 8002a70 <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Send LSB of Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
||
80029ce: 893b ldrh r3, [r7, #8]
|
||
80029d0: b2da uxtb r2, r3
|
||
80029d2: 68fb ldr r3, [r7, #12]
|
||
80029d4: 681b ldr r3, [r3, #0]
|
||
80029d6: 611a str r2, [r3, #16]
|
||
}
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
80029d8: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
80029da: 6a39 ldr r1, [r7, #32]
|
||
80029dc: 68f8 ldr r0, [r7, #12]
|
||
80029de: f000 f923 bl 8002c28 <I2C_WaitOnTXEFlagUntilTimeout>
|
||
80029e2: 4603 mov r3, r0
|
||
80029e4: 2b00 cmp r3, #0
|
||
80029e6: d00d beq.n 8002a04 <I2C_RequestMemoryRead+0x158>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
80029e8: 68fb ldr r3, [r7, #12]
|
||
80029ea: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
80029ec: 2b04 cmp r3, #4
|
||
80029ee: d107 bne.n 8002a00 <I2C_RequestMemoryRead+0x154>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
80029f0: 68fb ldr r3, [r7, #12]
|
||
80029f2: 681b ldr r3, [r3, #0]
|
||
80029f4: 681a ldr r2, [r3, #0]
|
||
80029f6: 68fb ldr r3, [r7, #12]
|
||
80029f8: 681b ldr r3, [r3, #0]
|
||
80029fa: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
80029fe: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
8002a00: 2301 movs r3, #1
|
||
8002a02: e035 b.n 8002a70 <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Generate Restart */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
||
8002a04: 68fb ldr r3, [r7, #12]
|
||
8002a06: 681b ldr r3, [r3, #0]
|
||
8002a08: 681a ldr r2, [r3, #0]
|
||
8002a0a: 68fb ldr r3, [r7, #12]
|
||
8002a0c: 681b ldr r3, [r3, #0]
|
||
8002a0e: f442 7280 orr.w r2, r2, #256 ; 0x100
|
||
8002a12: 601a str r2, [r3, #0]
|
||
|
||
/* Wait until SB flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
||
8002a14: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002a16: 9300 str r3, [sp, #0]
|
||
8002a18: 6a3b ldr r3, [r7, #32]
|
||
8002a1a: 2200 movs r2, #0
|
||
8002a1c: f04f 1101 mov.w r1, #65537 ; 0x10001
|
||
8002a20: 68f8 ldr r0, [r7, #12]
|
||
8002a22: f000 f82b bl 8002a7c <I2C_WaitOnFlagUntilTimeout>
|
||
8002a26: 4603 mov r3, r0
|
||
8002a28: 2b00 cmp r3, #0
|
||
8002a2a: d00d beq.n 8002a48 <I2C_RequestMemoryRead+0x19c>
|
||
{
|
||
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
||
8002a2c: 68fb ldr r3, [r7, #12]
|
||
8002a2e: 681b ldr r3, [r3, #0]
|
||
8002a30: 681b ldr r3, [r3, #0]
|
||
8002a32: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8002a36: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
8002a3a: d103 bne.n 8002a44 <I2C_RequestMemoryRead+0x198>
|
||
{
|
||
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
||
8002a3c: 68fb ldr r3, [r7, #12]
|
||
8002a3e: f44f 7200 mov.w r2, #512 ; 0x200
|
||
8002a42: 641a str r2, [r3, #64] ; 0x40
|
||
}
|
||
return HAL_TIMEOUT;
|
||
8002a44: 2303 movs r3, #3
|
||
8002a46: e013 b.n 8002a70 <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Send slave address */
|
||
hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
|
||
8002a48: 897b ldrh r3, [r7, #10]
|
||
8002a4a: b2db uxtb r3, r3
|
||
8002a4c: f043 0301 orr.w r3, r3, #1
|
||
8002a50: b2da uxtb r2, r3
|
||
8002a52: 68fb ldr r3, [r7, #12]
|
||
8002a54: 681b ldr r3, [r3, #0]
|
||
8002a56: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until ADDR flag is set */
|
||
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
||
8002a58: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002a5a: 6a3a ldr r2, [r7, #32]
|
||
8002a5c: 4906 ldr r1, [pc, #24] ; (8002a78 <I2C_RequestMemoryRead+0x1cc>)
|
||
8002a5e: 68f8 ldr r0, [r7, #12]
|
||
8002a60: f000 f863 bl 8002b2a <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
||
8002a64: 4603 mov r3, r0
|
||
8002a66: 2b00 cmp r3, #0
|
||
8002a68: d001 beq.n 8002a6e <I2C_RequestMemoryRead+0x1c2>
|
||
{
|
||
return HAL_ERROR;
|
||
8002a6a: 2301 movs r3, #1
|
||
8002a6c: e000 b.n 8002a70 <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
return HAL_OK;
|
||
8002a6e: 2300 movs r3, #0
|
||
}
|
||
8002a70: 4618 mov r0, r3
|
||
8002a72: 3718 adds r7, #24
|
||
8002a74: 46bd mov sp, r7
|
||
8002a76: bd80 pop {r7, pc}
|
||
8002a78: 00010002 .word 0x00010002
|
||
|
||
08002a7c <I2C_WaitOnFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002a7c: b580 push {r7, lr}
|
||
8002a7e: b084 sub sp, #16
|
||
8002a80: af00 add r7, sp, #0
|
||
8002a82: 60f8 str r0, [r7, #12]
|
||
8002a84: 60b9 str r1, [r7, #8]
|
||
8002a86: 603b str r3, [r7, #0]
|
||
8002a88: 4613 mov r3, r2
|
||
8002a8a: 71fb strb r3, [r7, #7]
|
||
/* Wait until flag is set */
|
||
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
||
8002a8c: e025 b.n 8002ada <I2C_WaitOnFlagUntilTimeout+0x5e>
|
||
{
|
||
/* Check for the Timeout */
|
||
if (Timeout != HAL_MAX_DELAY)
|
||
8002a8e: 683b ldr r3, [r7, #0]
|
||
8002a90: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
8002a94: d021 beq.n 8002ada <I2C_WaitOnFlagUntilTimeout+0x5e>
|
||
{
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002a96: f7fe fef7 bl 8001888 <HAL_GetTick>
|
||
8002a9a: 4602 mov r2, r0
|
||
8002a9c: 69bb ldr r3, [r7, #24]
|
||
8002a9e: 1ad3 subs r3, r2, r3
|
||
8002aa0: 683a ldr r2, [r7, #0]
|
||
8002aa2: 429a cmp r2, r3
|
||
8002aa4: d302 bcc.n 8002aac <I2C_WaitOnFlagUntilTimeout+0x30>
|
||
8002aa6: 683b ldr r3, [r7, #0]
|
||
8002aa8: 2b00 cmp r3, #0
|
||
8002aaa: d116 bne.n 8002ada <I2C_WaitOnFlagUntilTimeout+0x5e>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002aac: 68fb ldr r3, [r7, #12]
|
||
8002aae: 2200 movs r2, #0
|
||
8002ab0: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002ab2: 68fb ldr r3, [r7, #12]
|
||
8002ab4: 2220 movs r2, #32
|
||
8002ab6: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002aba: 68fb ldr r3, [r7, #12]
|
||
8002abc: 2200 movs r2, #0
|
||
8002abe: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002ac2: 68fb ldr r3, [r7, #12]
|
||
8002ac4: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002ac6: f043 0220 orr.w r2, r3, #32
|
||
8002aca: 68fb ldr r3, [r7, #12]
|
||
8002acc: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002ace: 68fb ldr r3, [r7, #12]
|
||
8002ad0: 2200 movs r2, #0
|
||
8002ad2: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002ad6: 2301 movs r3, #1
|
||
8002ad8: e023 b.n 8002b22 <I2C_WaitOnFlagUntilTimeout+0xa6>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
||
8002ada: 68bb ldr r3, [r7, #8]
|
||
8002adc: 0c1b lsrs r3, r3, #16
|
||
8002ade: b2db uxtb r3, r3
|
||
8002ae0: 2b01 cmp r3, #1
|
||
8002ae2: d10d bne.n 8002b00 <I2C_WaitOnFlagUntilTimeout+0x84>
|
||
8002ae4: 68fb ldr r3, [r7, #12]
|
||
8002ae6: 681b ldr r3, [r3, #0]
|
||
8002ae8: 695b ldr r3, [r3, #20]
|
||
8002aea: 43da mvns r2, r3
|
||
8002aec: 68bb ldr r3, [r7, #8]
|
||
8002aee: 4013 ands r3, r2
|
||
8002af0: b29b uxth r3, r3
|
||
8002af2: 2b00 cmp r3, #0
|
||
8002af4: bf0c ite eq
|
||
8002af6: 2301 moveq r3, #1
|
||
8002af8: 2300 movne r3, #0
|
||
8002afa: b2db uxtb r3, r3
|
||
8002afc: 461a mov r2, r3
|
||
8002afe: e00c b.n 8002b1a <I2C_WaitOnFlagUntilTimeout+0x9e>
|
||
8002b00: 68fb ldr r3, [r7, #12]
|
||
8002b02: 681b ldr r3, [r3, #0]
|
||
8002b04: 699b ldr r3, [r3, #24]
|
||
8002b06: 43da mvns r2, r3
|
||
8002b08: 68bb ldr r3, [r7, #8]
|
||
8002b0a: 4013 ands r3, r2
|
||
8002b0c: b29b uxth r3, r3
|
||
8002b0e: 2b00 cmp r3, #0
|
||
8002b10: bf0c ite eq
|
||
8002b12: 2301 moveq r3, #1
|
||
8002b14: 2300 movne r3, #0
|
||
8002b16: b2db uxtb r3, r3
|
||
8002b18: 461a mov r2, r3
|
||
8002b1a: 79fb ldrb r3, [r7, #7]
|
||
8002b1c: 429a cmp r2, r3
|
||
8002b1e: d0b6 beq.n 8002a8e <I2C_WaitOnFlagUntilTimeout+0x12>
|
||
}
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002b20: 2300 movs r3, #0
|
||
}
|
||
8002b22: 4618 mov r0, r3
|
||
8002b24: 3710 adds r7, #16
|
||
8002b26: 46bd mov sp, r7
|
||
8002b28: bd80 pop {r7, pc}
|
||
|
||
08002b2a <I2C_WaitOnMasterAddressFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002b2a: b580 push {r7, lr}
|
||
8002b2c: b084 sub sp, #16
|
||
8002b2e: af00 add r7, sp, #0
|
||
8002b30: 60f8 str r0, [r7, #12]
|
||
8002b32: 60b9 str r1, [r7, #8]
|
||
8002b34: 607a str r2, [r7, #4]
|
||
8002b36: 603b str r3, [r7, #0]
|
||
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
|
||
8002b38: e051 b.n 8002bde <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
|
||
{
|
||
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
|
||
8002b3a: 68fb ldr r3, [r7, #12]
|
||
8002b3c: 681b ldr r3, [r3, #0]
|
||
8002b3e: 695b ldr r3, [r3, #20]
|
||
8002b40: f403 6380 and.w r3, r3, #1024 ; 0x400
|
||
8002b44: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
||
8002b48: d123 bne.n 8002b92 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x68>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002b4a: 68fb ldr r3, [r7, #12]
|
||
8002b4c: 681b ldr r3, [r3, #0]
|
||
8002b4e: 681a ldr r2, [r3, #0]
|
||
8002b50: 68fb ldr r3, [r7, #12]
|
||
8002b52: 681b ldr r3, [r3, #0]
|
||
8002b54: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002b58: 601a str r2, [r3, #0]
|
||
|
||
/* Clear AF Flag */
|
||
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
||
8002b5a: 68fb ldr r3, [r7, #12]
|
||
8002b5c: 681b ldr r3, [r3, #0]
|
||
8002b5e: f46f 6280 mvn.w r2, #1024 ; 0x400
|
||
8002b62: 615a str r2, [r3, #20]
|
||
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002b64: 68fb ldr r3, [r7, #12]
|
||
8002b66: 2200 movs r2, #0
|
||
8002b68: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002b6a: 68fb ldr r3, [r7, #12]
|
||
8002b6c: 2220 movs r2, #32
|
||
8002b6e: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002b72: 68fb ldr r3, [r7, #12]
|
||
8002b74: 2200 movs r2, #0
|
||
8002b76: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
|
||
8002b7a: 68fb ldr r3, [r7, #12]
|
||
8002b7c: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002b7e: f043 0204 orr.w r2, r3, #4
|
||
8002b82: 68fb ldr r3, [r7, #12]
|
||
8002b84: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002b86: 68fb ldr r3, [r7, #12]
|
||
8002b88: 2200 movs r2, #0
|
||
8002b8a: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002b8e: 2301 movs r3, #1
|
||
8002b90: e046 b.n 8002c20 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf6>
|
||
}
|
||
|
||
/* Check for the Timeout */
|
||
if (Timeout != HAL_MAX_DELAY)
|
||
8002b92: 687b ldr r3, [r7, #4]
|
||
8002b94: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
8002b98: d021 beq.n 8002bde <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
|
||
{
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002b9a: f7fe fe75 bl 8001888 <HAL_GetTick>
|
||
8002b9e: 4602 mov r2, r0
|
||
8002ba0: 683b ldr r3, [r7, #0]
|
||
8002ba2: 1ad3 subs r3, r2, r3
|
||
8002ba4: 687a ldr r2, [r7, #4]
|
||
8002ba6: 429a cmp r2, r3
|
||
8002ba8: d302 bcc.n 8002bb0 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x86>
|
||
8002baa: 687b ldr r3, [r7, #4]
|
||
8002bac: 2b00 cmp r3, #0
|
||
8002bae: d116 bne.n 8002bde <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002bb0: 68fb ldr r3, [r7, #12]
|
||
8002bb2: 2200 movs r2, #0
|
||
8002bb4: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002bb6: 68fb ldr r3, [r7, #12]
|
||
8002bb8: 2220 movs r2, #32
|
||
8002bba: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002bbe: 68fb ldr r3, [r7, #12]
|
||
8002bc0: 2200 movs r2, #0
|
||
8002bc2: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002bc6: 68fb ldr r3, [r7, #12]
|
||
8002bc8: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002bca: f043 0220 orr.w r2, r3, #32
|
||
8002bce: 68fb ldr r3, [r7, #12]
|
||
8002bd0: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002bd2: 68fb ldr r3, [r7, #12]
|
||
8002bd4: 2200 movs r2, #0
|
||
8002bd6: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002bda: 2301 movs r3, #1
|
||
8002bdc: e020 b.n 8002c20 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf6>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
|
||
8002bde: 68bb ldr r3, [r7, #8]
|
||
8002be0: 0c1b lsrs r3, r3, #16
|
||
8002be2: b2db uxtb r3, r3
|
||
8002be4: 2b01 cmp r3, #1
|
||
8002be6: d10c bne.n 8002c02 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xd8>
|
||
8002be8: 68fb ldr r3, [r7, #12]
|
||
8002bea: 681b ldr r3, [r3, #0]
|
||
8002bec: 695b ldr r3, [r3, #20]
|
||
8002bee: 43da mvns r2, r3
|
||
8002bf0: 68bb ldr r3, [r7, #8]
|
||
8002bf2: 4013 ands r3, r2
|
||
8002bf4: b29b uxth r3, r3
|
||
8002bf6: 2b00 cmp r3, #0
|
||
8002bf8: bf14 ite ne
|
||
8002bfa: 2301 movne r3, #1
|
||
8002bfc: 2300 moveq r3, #0
|
||
8002bfe: b2db uxtb r3, r3
|
||
8002c00: e00b b.n 8002c1a <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf0>
|
||
8002c02: 68fb ldr r3, [r7, #12]
|
||
8002c04: 681b ldr r3, [r3, #0]
|
||
8002c06: 699b ldr r3, [r3, #24]
|
||
8002c08: 43da mvns r2, r3
|
||
8002c0a: 68bb ldr r3, [r7, #8]
|
||
8002c0c: 4013 ands r3, r2
|
||
8002c0e: b29b uxth r3, r3
|
||
8002c10: 2b00 cmp r3, #0
|
||
8002c12: bf14 ite ne
|
||
8002c14: 2301 movne r3, #1
|
||
8002c16: 2300 moveq r3, #0
|
||
8002c18: b2db uxtb r3, r3
|
||
8002c1a: 2b00 cmp r3, #0
|
||
8002c1c: d18d bne.n 8002b3a <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
|
||
}
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002c1e: 2300 movs r3, #0
|
||
}
|
||
8002c20: 4618 mov r0, r3
|
||
8002c22: 3710 adds r7, #16
|
||
8002c24: 46bd mov sp, r7
|
||
8002c26: bd80 pop {r7, pc}
|
||
|
||
08002c28 <I2C_WaitOnTXEFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002c28: b580 push {r7, lr}
|
||
8002c2a: b084 sub sp, #16
|
||
8002c2c: af00 add r7, sp, #0
|
||
8002c2e: 60f8 str r0, [r7, #12]
|
||
8002c30: 60b9 str r1, [r7, #8]
|
||
8002c32: 607a str r2, [r7, #4]
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
|
||
8002c34: e02d b.n 8002c92 <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
|
||
{
|
||
/* Check if a NACK is detected */
|
||
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
|
||
8002c36: 68f8 ldr r0, [r7, #12]
|
||
8002c38: f000 f8ce bl 8002dd8 <I2C_IsAcknowledgeFailed>
|
||
8002c3c: 4603 mov r3, r0
|
||
8002c3e: 2b00 cmp r3, #0
|
||
8002c40: d001 beq.n 8002c46 <I2C_WaitOnTXEFlagUntilTimeout+0x1e>
|
||
{
|
||
return HAL_ERROR;
|
||
8002c42: 2301 movs r3, #1
|
||
8002c44: e02d b.n 8002ca2 <I2C_WaitOnTXEFlagUntilTimeout+0x7a>
|
||
}
|
||
|
||
/* Check for the Timeout */
|
||
if (Timeout != HAL_MAX_DELAY)
|
||
8002c46: 68bb ldr r3, [r7, #8]
|
||
8002c48: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
8002c4c: d021 beq.n 8002c92 <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
|
||
{
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002c4e: f7fe fe1b bl 8001888 <HAL_GetTick>
|
||
8002c52: 4602 mov r2, r0
|
||
8002c54: 687b ldr r3, [r7, #4]
|
||
8002c56: 1ad3 subs r3, r2, r3
|
||
8002c58: 68ba ldr r2, [r7, #8]
|
||
8002c5a: 429a cmp r2, r3
|
||
8002c5c: d302 bcc.n 8002c64 <I2C_WaitOnTXEFlagUntilTimeout+0x3c>
|
||
8002c5e: 68bb ldr r3, [r7, #8]
|
||
8002c60: 2b00 cmp r3, #0
|
||
8002c62: d116 bne.n 8002c92 <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002c64: 68fb ldr r3, [r7, #12]
|
||
8002c66: 2200 movs r2, #0
|
||
8002c68: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002c6a: 68fb ldr r3, [r7, #12]
|
||
8002c6c: 2220 movs r2, #32
|
||
8002c6e: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002c72: 68fb ldr r3, [r7, #12]
|
||
8002c74: 2200 movs r2, #0
|
||
8002c76: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002c7a: 68fb ldr r3, [r7, #12]
|
||
8002c7c: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002c7e: f043 0220 orr.w r2, r3, #32
|
||
8002c82: 68fb ldr r3, [r7, #12]
|
||
8002c84: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002c86: 68fb ldr r3, [r7, #12]
|
||
8002c88: 2200 movs r2, #0
|
||
8002c8a: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002c8e: 2301 movs r3, #1
|
||
8002c90: e007 b.n 8002ca2 <I2C_WaitOnTXEFlagUntilTimeout+0x7a>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
|
||
8002c92: 68fb ldr r3, [r7, #12]
|
||
8002c94: 681b ldr r3, [r3, #0]
|
||
8002c96: 695b ldr r3, [r3, #20]
|
||
8002c98: f003 0380 and.w r3, r3, #128 ; 0x80
|
||
8002c9c: 2b80 cmp r3, #128 ; 0x80
|
||
8002c9e: d1ca bne.n 8002c36 <I2C_WaitOnTXEFlagUntilTimeout+0xe>
|
||
}
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002ca0: 2300 movs r3, #0
|
||
}
|
||
8002ca2: 4618 mov r0, r3
|
||
8002ca4: 3710 adds r7, #16
|
||
8002ca6: 46bd mov sp, r7
|
||
8002ca8: bd80 pop {r7, pc}
|
||
|
||
08002caa <I2C_WaitOnBTFFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002caa: b580 push {r7, lr}
|
||
8002cac: b084 sub sp, #16
|
||
8002cae: af00 add r7, sp, #0
|
||
8002cb0: 60f8 str r0, [r7, #12]
|
||
8002cb2: 60b9 str r1, [r7, #8]
|
||
8002cb4: 607a str r2, [r7, #4]
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
|
||
8002cb6: e02d b.n 8002d14 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
|
||
{
|
||
/* Check if a NACK is detected */
|
||
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
|
||
8002cb8: 68f8 ldr r0, [r7, #12]
|
||
8002cba: f000 f88d bl 8002dd8 <I2C_IsAcknowledgeFailed>
|
||
8002cbe: 4603 mov r3, r0
|
||
8002cc0: 2b00 cmp r3, #0
|
||
8002cc2: d001 beq.n 8002cc8 <I2C_WaitOnBTFFlagUntilTimeout+0x1e>
|
||
{
|
||
return HAL_ERROR;
|
||
8002cc4: 2301 movs r3, #1
|
||
8002cc6: e02d b.n 8002d24 <I2C_WaitOnBTFFlagUntilTimeout+0x7a>
|
||
}
|
||
|
||
/* Check for the Timeout */
|
||
if (Timeout != HAL_MAX_DELAY)
|
||
8002cc8: 68bb ldr r3, [r7, #8]
|
||
8002cca: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
8002cce: d021 beq.n 8002d14 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
|
||
{
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002cd0: f7fe fdda bl 8001888 <HAL_GetTick>
|
||
8002cd4: 4602 mov r2, r0
|
||
8002cd6: 687b ldr r3, [r7, #4]
|
||
8002cd8: 1ad3 subs r3, r2, r3
|
||
8002cda: 68ba ldr r2, [r7, #8]
|
||
8002cdc: 429a cmp r2, r3
|
||
8002cde: d302 bcc.n 8002ce6 <I2C_WaitOnBTFFlagUntilTimeout+0x3c>
|
||
8002ce0: 68bb ldr r3, [r7, #8]
|
||
8002ce2: 2b00 cmp r3, #0
|
||
8002ce4: d116 bne.n 8002d14 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002ce6: 68fb ldr r3, [r7, #12]
|
||
8002ce8: 2200 movs r2, #0
|
||
8002cea: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002cec: 68fb ldr r3, [r7, #12]
|
||
8002cee: 2220 movs r2, #32
|
||
8002cf0: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002cf4: 68fb ldr r3, [r7, #12]
|
||
8002cf6: 2200 movs r2, #0
|
||
8002cf8: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002cfc: 68fb ldr r3, [r7, #12]
|
||
8002cfe: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002d00: f043 0220 orr.w r2, r3, #32
|
||
8002d04: 68fb ldr r3, [r7, #12]
|
||
8002d06: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002d08: 68fb ldr r3, [r7, #12]
|
||
8002d0a: 2200 movs r2, #0
|
||
8002d0c: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002d10: 2301 movs r3, #1
|
||
8002d12: e007 b.n 8002d24 <I2C_WaitOnBTFFlagUntilTimeout+0x7a>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
|
||
8002d14: 68fb ldr r3, [r7, #12]
|
||
8002d16: 681b ldr r3, [r3, #0]
|
||
8002d18: 695b ldr r3, [r3, #20]
|
||
8002d1a: f003 0304 and.w r3, r3, #4
|
||
8002d1e: 2b04 cmp r3, #4
|
||
8002d20: d1ca bne.n 8002cb8 <I2C_WaitOnBTFFlagUntilTimeout+0xe>
|
||
}
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002d22: 2300 movs r3, #0
|
||
}
|
||
8002d24: 4618 mov r0, r3
|
||
8002d26: 3710 adds r7, #16
|
||
8002d28: 46bd mov sp, r7
|
||
8002d2a: bd80 pop {r7, pc}
|
||
|
||
08002d2c <I2C_WaitOnRXNEFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002d2c: b580 push {r7, lr}
|
||
8002d2e: b084 sub sp, #16
|
||
8002d30: af00 add r7, sp, #0
|
||
8002d32: 60f8 str r0, [r7, #12]
|
||
8002d34: 60b9 str r1, [r7, #8]
|
||
8002d36: 607a str r2, [r7, #4]
|
||
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
|
||
8002d38: e042 b.n 8002dc0 <I2C_WaitOnRXNEFlagUntilTimeout+0x94>
|
||
{
|
||
/* Check if a STOPF is detected */
|
||
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
|
||
8002d3a: 68fb ldr r3, [r7, #12]
|
||
8002d3c: 681b ldr r3, [r3, #0]
|
||
8002d3e: 695b ldr r3, [r3, #20]
|
||
8002d40: f003 0310 and.w r3, r3, #16
|
||
8002d44: 2b10 cmp r3, #16
|
||
8002d46: d119 bne.n 8002d7c <I2C_WaitOnRXNEFlagUntilTimeout+0x50>
|
||
{
|
||
/* Clear STOP Flag */
|
||
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
|
||
8002d48: 68fb ldr r3, [r7, #12]
|
||
8002d4a: 681b ldr r3, [r3, #0]
|
||
8002d4c: f06f 0210 mvn.w r2, #16
|
||
8002d50: 615a str r2, [r3, #20]
|
||
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002d52: 68fb ldr r3, [r7, #12]
|
||
8002d54: 2200 movs r2, #0
|
||
8002d56: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002d58: 68fb ldr r3, [r7, #12]
|
||
8002d5a: 2220 movs r2, #32
|
||
8002d5c: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002d60: 68fb ldr r3, [r7, #12]
|
||
8002d62: 2200 movs r2, #0
|
||
8002d64: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_NONE;
|
||
8002d68: 68fb ldr r3, [r7, #12]
|
||
8002d6a: 6c1a ldr r2, [r3, #64] ; 0x40
|
||
8002d6c: 68fb ldr r3, [r7, #12]
|
||
8002d6e: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002d70: 68fb ldr r3, [r7, #12]
|
||
8002d72: 2200 movs r2, #0
|
||
8002d74: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002d78: 2301 movs r3, #1
|
||
8002d7a: e029 b.n 8002dd0 <I2C_WaitOnRXNEFlagUntilTimeout+0xa4>
|
||
}
|
||
|
||
/* Check for the Timeout */
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002d7c: f7fe fd84 bl 8001888 <HAL_GetTick>
|
||
8002d80: 4602 mov r2, r0
|
||
8002d82: 687b ldr r3, [r7, #4]
|
||
8002d84: 1ad3 subs r3, r2, r3
|
||
8002d86: 68ba ldr r2, [r7, #8]
|
||
8002d88: 429a cmp r2, r3
|
||
8002d8a: d302 bcc.n 8002d92 <I2C_WaitOnRXNEFlagUntilTimeout+0x66>
|
||
8002d8c: 68bb ldr r3, [r7, #8]
|
||
8002d8e: 2b00 cmp r3, #0
|
||
8002d90: d116 bne.n 8002dc0 <I2C_WaitOnRXNEFlagUntilTimeout+0x94>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002d92: 68fb ldr r3, [r7, #12]
|
||
8002d94: 2200 movs r2, #0
|
||
8002d96: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002d98: 68fb ldr r3, [r7, #12]
|
||
8002d9a: 2220 movs r2, #32
|
||
8002d9c: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002da0: 68fb ldr r3, [r7, #12]
|
||
8002da2: 2200 movs r2, #0
|
||
8002da4: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002da8: 68fb ldr r3, [r7, #12]
|
||
8002daa: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002dac: f043 0220 orr.w r2, r3, #32
|
||
8002db0: 68fb ldr r3, [r7, #12]
|
||
8002db2: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002db4: 68fb ldr r3, [r7, #12]
|
||
8002db6: 2200 movs r2, #0
|
||
8002db8: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002dbc: 2301 movs r3, #1
|
||
8002dbe: e007 b.n 8002dd0 <I2C_WaitOnRXNEFlagUntilTimeout+0xa4>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
|
||
8002dc0: 68fb ldr r3, [r7, #12]
|
||
8002dc2: 681b ldr r3, [r3, #0]
|
||
8002dc4: 695b ldr r3, [r3, #20]
|
||
8002dc6: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
8002dca: 2b40 cmp r3, #64 ; 0x40
|
||
8002dcc: d1b5 bne.n 8002d3a <I2C_WaitOnRXNEFlagUntilTimeout+0xe>
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002dce: 2300 movs r3, #0
|
||
}
|
||
8002dd0: 4618 mov r0, r3
|
||
8002dd2: 3710 adds r7, #16
|
||
8002dd4: 46bd mov sp, r7
|
||
8002dd6: bd80 pop {r7, pc}
|
||
|
||
08002dd8 <I2C_IsAcknowledgeFailed>:
|
||
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
||
* the configuration information for the specified I2C.
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
|
||
{
|
||
8002dd8: b480 push {r7}
|
||
8002dda: b083 sub sp, #12
|
||
8002ddc: af00 add r7, sp, #0
|
||
8002dde: 6078 str r0, [r7, #4]
|
||
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
|
||
8002de0: 687b ldr r3, [r7, #4]
|
||
8002de2: 681b ldr r3, [r3, #0]
|
||
8002de4: 695b ldr r3, [r3, #20]
|
||
8002de6: f403 6380 and.w r3, r3, #1024 ; 0x400
|
||
8002dea: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
||
8002dee: d11b bne.n 8002e28 <I2C_IsAcknowledgeFailed+0x50>
|
||
{
|
||
/* Clear NACKF Flag */
|
||
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
||
8002df0: 687b ldr r3, [r7, #4]
|
||
8002df2: 681b ldr r3, [r3, #0]
|
||
8002df4: f46f 6280 mvn.w r2, #1024 ; 0x400
|
||
8002df8: 615a str r2, [r3, #20]
|
||
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002dfa: 687b ldr r3, [r7, #4]
|
||
8002dfc: 2200 movs r2, #0
|
||
8002dfe: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002e00: 687b ldr r3, [r7, #4]
|
||
8002e02: 2220 movs r2, #32
|
||
8002e04: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002e08: 687b ldr r3, [r7, #4]
|
||
8002e0a: 2200 movs r2, #0
|
||
8002e0c: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
|
||
8002e10: 687b ldr r3, [r7, #4]
|
||
8002e12: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002e14: f043 0204 orr.w r2, r3, #4
|
||
8002e18: 687b ldr r3, [r7, #4]
|
||
8002e1a: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002e1c: 687b ldr r3, [r7, #4]
|
||
8002e1e: 2200 movs r2, #0
|
||
8002e20: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002e24: 2301 movs r3, #1
|
||
8002e26: e000 b.n 8002e2a <I2C_IsAcknowledgeFailed+0x52>
|
||
}
|
||
return HAL_OK;
|
||
8002e28: 2300 movs r3, #0
|
||
}
|
||
8002e2a: 4618 mov r0, r3
|
||
8002e2c: 370c adds r7, #12
|
||
8002e2e: 46bd mov sp, r7
|
||
8002e30: bc80 pop {r7}
|
||
8002e32: 4770 bx lr
|
||
|
||
08002e34 <HAL_RCC_OscConfig>:
|
||
* supported by this macro. User should request a transition to HSE Off
|
||
* first and then HSE On or HSE Bypass.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
||
{
|
||
8002e34: b580 push {r7, lr}
|
||
8002e36: b086 sub sp, #24
|
||
8002e38: af00 add r7, sp, #0
|
||
8002e3a: 6078 str r0, [r7, #4]
|
||
uint32_t tickstart;
|
||
uint32_t pll_config;
|
||
|
||
/* Check Null pointer */
|
||
if (RCC_OscInitStruct == NULL)
|
||
8002e3c: 687b ldr r3, [r7, #4]
|
||
8002e3e: 2b00 cmp r3, #0
|
||
8002e40: d101 bne.n 8002e46 <HAL_RCC_OscConfig+0x12>
|
||
{
|
||
return HAL_ERROR;
|
||
8002e42: 2301 movs r3, #1
|
||
8002e44: e26c b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
||
|
||
/*------------------------------- HSE Configuration ------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
||
8002e46: 687b ldr r3, [r7, #4]
|
||
8002e48: 681b ldr r3, [r3, #0]
|
||
8002e4a: f003 0301 and.w r3, r3, #1
|
||
8002e4e: 2b00 cmp r3, #0
|
||
8002e50: f000 8087 beq.w 8002f62 <HAL_RCC_OscConfig+0x12e>
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
|
||
|
||
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
|
||
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
|
||
8002e54: 4b92 ldr r3, [pc, #584] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002e56: 685b ldr r3, [r3, #4]
|
||
8002e58: f003 030c and.w r3, r3, #12
|
||
8002e5c: 2b04 cmp r3, #4
|
||
8002e5e: d00c beq.n 8002e7a <HAL_RCC_OscConfig+0x46>
|
||
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
|
||
8002e60: 4b8f ldr r3, [pc, #572] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002e62: 685b ldr r3, [r3, #4]
|
||
8002e64: f003 030c and.w r3, r3, #12
|
||
8002e68: 2b08 cmp r3, #8
|
||
8002e6a: d112 bne.n 8002e92 <HAL_RCC_OscConfig+0x5e>
|
||
8002e6c: 4b8c ldr r3, [pc, #560] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002e6e: 685b ldr r3, [r3, #4]
|
||
8002e70: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8002e74: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8002e78: d10b bne.n 8002e92 <HAL_RCC_OscConfig+0x5e>
|
||
{
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
||
8002e7a: 4b89 ldr r3, [pc, #548] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002e7c: 681b ldr r3, [r3, #0]
|
||
8002e7e: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8002e82: 2b00 cmp r3, #0
|
||
8002e84: d06c beq.n 8002f60 <HAL_RCC_OscConfig+0x12c>
|
||
8002e86: 687b ldr r3, [r7, #4]
|
||
8002e88: 685b ldr r3, [r3, #4]
|
||
8002e8a: 2b00 cmp r3, #0
|
||
8002e8c: d168 bne.n 8002f60 <HAL_RCC_OscConfig+0x12c>
|
||
{
|
||
return HAL_ERROR;
|
||
8002e8e: 2301 movs r3, #1
|
||
8002e90: e246 b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Set the new HSE configuration ---------------------------------------*/
|
||
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
||
8002e92: 687b ldr r3, [r7, #4]
|
||
8002e94: 685b ldr r3, [r3, #4]
|
||
8002e96: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8002e9a: d106 bne.n 8002eaa <HAL_RCC_OscConfig+0x76>
|
||
8002e9c: 4b80 ldr r3, [pc, #512] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002e9e: 681b ldr r3, [r3, #0]
|
||
8002ea0: 4a7f ldr r2, [pc, #508] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002ea2: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
||
8002ea6: 6013 str r3, [r2, #0]
|
||
8002ea8: e02e b.n 8002f08 <HAL_RCC_OscConfig+0xd4>
|
||
8002eaa: 687b ldr r3, [r7, #4]
|
||
8002eac: 685b ldr r3, [r3, #4]
|
||
8002eae: 2b00 cmp r3, #0
|
||
8002eb0: d10c bne.n 8002ecc <HAL_RCC_OscConfig+0x98>
|
||
8002eb2: 4b7b ldr r3, [pc, #492] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002eb4: 681b ldr r3, [r3, #0]
|
||
8002eb6: 4a7a ldr r2, [pc, #488] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002eb8: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
||
8002ebc: 6013 str r3, [r2, #0]
|
||
8002ebe: 4b78 ldr r3, [pc, #480] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002ec0: 681b ldr r3, [r3, #0]
|
||
8002ec2: 4a77 ldr r2, [pc, #476] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002ec4: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
||
8002ec8: 6013 str r3, [r2, #0]
|
||
8002eca: e01d b.n 8002f08 <HAL_RCC_OscConfig+0xd4>
|
||
8002ecc: 687b ldr r3, [r7, #4]
|
||
8002ece: 685b ldr r3, [r3, #4]
|
||
8002ed0: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
|
||
8002ed4: d10c bne.n 8002ef0 <HAL_RCC_OscConfig+0xbc>
|
||
8002ed6: 4b72 ldr r3, [pc, #456] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002ed8: 681b ldr r3, [r3, #0]
|
||
8002eda: 4a71 ldr r2, [pc, #452] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002edc: f443 2380 orr.w r3, r3, #262144 ; 0x40000
|
||
8002ee0: 6013 str r3, [r2, #0]
|
||
8002ee2: 4b6f ldr r3, [pc, #444] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002ee4: 681b ldr r3, [r3, #0]
|
||
8002ee6: 4a6e ldr r2, [pc, #440] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002ee8: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
||
8002eec: 6013 str r3, [r2, #0]
|
||
8002eee: e00b b.n 8002f08 <HAL_RCC_OscConfig+0xd4>
|
||
8002ef0: 4b6b ldr r3, [pc, #428] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002ef2: 681b ldr r3, [r3, #0]
|
||
8002ef4: 4a6a ldr r2, [pc, #424] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002ef6: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
||
8002efa: 6013 str r3, [r2, #0]
|
||
8002efc: 4b68 ldr r3, [pc, #416] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002efe: 681b ldr r3, [r3, #0]
|
||
8002f00: 4a67 ldr r2, [pc, #412] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f02: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
||
8002f06: 6013 str r3, [r2, #0]
|
||
|
||
|
||
/* Check the HSE State */
|
||
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
|
||
8002f08: 687b ldr r3, [r7, #4]
|
||
8002f0a: 685b ldr r3, [r3, #4]
|
||
8002f0c: 2b00 cmp r3, #0
|
||
8002f0e: d013 beq.n 8002f38 <HAL_RCC_OscConfig+0x104>
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8002f10: f7fe fcba bl 8001888 <HAL_GetTick>
|
||
8002f14: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSE is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
8002f16: e008 b.n 8002f2a <HAL_RCC_OscConfig+0xf6>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
||
8002f18: f7fe fcb6 bl 8001888 <HAL_GetTick>
|
||
8002f1c: 4602 mov r2, r0
|
||
8002f1e: 693b ldr r3, [r7, #16]
|
||
8002f20: 1ad3 subs r3, r2, r3
|
||
8002f22: 2b64 cmp r3, #100 ; 0x64
|
||
8002f24: d901 bls.n 8002f2a <HAL_RCC_OscConfig+0xf6>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8002f26: 2303 movs r3, #3
|
||
8002f28: e1fa b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
8002f2a: 4b5d ldr r3, [pc, #372] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f2c: 681b ldr r3, [r3, #0]
|
||
8002f2e: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8002f32: 2b00 cmp r3, #0
|
||
8002f34: d0f0 beq.n 8002f18 <HAL_RCC_OscConfig+0xe4>
|
||
8002f36: e014 b.n 8002f62 <HAL_RCC_OscConfig+0x12e>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8002f38: f7fe fca6 bl 8001888 <HAL_GetTick>
|
||
8002f3c: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSE is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
||
8002f3e: e008 b.n 8002f52 <HAL_RCC_OscConfig+0x11e>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
||
8002f40: f7fe fca2 bl 8001888 <HAL_GetTick>
|
||
8002f44: 4602 mov r2, r0
|
||
8002f46: 693b ldr r3, [r7, #16]
|
||
8002f48: 1ad3 subs r3, r2, r3
|
||
8002f4a: 2b64 cmp r3, #100 ; 0x64
|
||
8002f4c: d901 bls.n 8002f52 <HAL_RCC_OscConfig+0x11e>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8002f4e: 2303 movs r3, #3
|
||
8002f50: e1e6 b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
||
8002f52: 4b53 ldr r3, [pc, #332] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f54: 681b ldr r3, [r3, #0]
|
||
8002f56: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8002f5a: 2b00 cmp r3, #0
|
||
8002f5c: d1f0 bne.n 8002f40 <HAL_RCC_OscConfig+0x10c>
|
||
8002f5e: e000 b.n 8002f62 <HAL_RCC_OscConfig+0x12e>
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
||
8002f60: bf00 nop
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*----------------------------- HSI Configuration --------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
|
||
8002f62: 687b ldr r3, [r7, #4]
|
||
8002f64: 681b ldr r3, [r3, #0]
|
||
8002f66: f003 0302 and.w r3, r3, #2
|
||
8002f6a: 2b00 cmp r3, #0
|
||
8002f6c: d063 beq.n 8003036 <HAL_RCC_OscConfig+0x202>
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
|
||
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
|
||
|
||
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
|
||
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
|
||
8002f6e: 4b4c ldr r3, [pc, #304] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f70: 685b ldr r3, [r3, #4]
|
||
8002f72: f003 030c and.w r3, r3, #12
|
||
8002f76: 2b00 cmp r3, #0
|
||
8002f78: d00b beq.n 8002f92 <HAL_RCC_OscConfig+0x15e>
|
||
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
|
||
8002f7a: 4b49 ldr r3, [pc, #292] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f7c: 685b ldr r3, [r3, #4]
|
||
8002f7e: f003 030c and.w r3, r3, #12
|
||
8002f82: 2b08 cmp r3, #8
|
||
8002f84: d11c bne.n 8002fc0 <HAL_RCC_OscConfig+0x18c>
|
||
8002f86: 4b46 ldr r3, [pc, #280] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f88: 685b ldr r3, [r3, #4]
|
||
8002f8a: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8002f8e: 2b00 cmp r3, #0
|
||
8002f90: d116 bne.n 8002fc0 <HAL_RCC_OscConfig+0x18c>
|
||
{
|
||
/* When HSI is used as system clock it will not disabled */
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
||
8002f92: 4b43 ldr r3, [pc, #268] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f94: 681b ldr r3, [r3, #0]
|
||
8002f96: f003 0302 and.w r3, r3, #2
|
||
8002f9a: 2b00 cmp r3, #0
|
||
8002f9c: d005 beq.n 8002faa <HAL_RCC_OscConfig+0x176>
|
||
8002f9e: 687b ldr r3, [r7, #4]
|
||
8002fa0: 691b ldr r3, [r3, #16]
|
||
8002fa2: 2b01 cmp r3, #1
|
||
8002fa4: d001 beq.n 8002faa <HAL_RCC_OscConfig+0x176>
|
||
{
|
||
return HAL_ERROR;
|
||
8002fa6: 2301 movs r3, #1
|
||
8002fa8: e1ba b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
/* Otherwise, just the calibration is allowed */
|
||
else
|
||
{
|
||
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
||
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
||
8002faa: 4b3d ldr r3, [pc, #244] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002fac: 681b ldr r3, [r3, #0]
|
||
8002fae: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
||
8002fb2: 687b ldr r3, [r7, #4]
|
||
8002fb4: 695b ldr r3, [r3, #20]
|
||
8002fb6: 00db lsls r3, r3, #3
|
||
8002fb8: 4939 ldr r1, [pc, #228] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002fba: 4313 orrs r3, r2
|
||
8002fbc: 600b str r3, [r1, #0]
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
||
8002fbe: e03a b.n 8003036 <HAL_RCC_OscConfig+0x202>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Check the HSI State */
|
||
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
|
||
8002fc0: 687b ldr r3, [r7, #4]
|
||
8002fc2: 691b ldr r3, [r3, #16]
|
||
8002fc4: 2b00 cmp r3, #0
|
||
8002fc6: d020 beq.n 800300a <HAL_RCC_OscConfig+0x1d6>
|
||
{
|
||
/* Enable the Internal High Speed oscillator (HSI). */
|
||
__HAL_RCC_HSI_ENABLE();
|
||
8002fc8: 4b36 ldr r3, [pc, #216] ; (80030a4 <HAL_RCC_OscConfig+0x270>)
|
||
8002fca: 2201 movs r2, #1
|
||
8002fcc: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8002fce: f7fe fc5b bl 8001888 <HAL_GetTick>
|
||
8002fd2: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSI is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8002fd4: e008 b.n 8002fe8 <HAL_RCC_OscConfig+0x1b4>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
||
8002fd6: f7fe fc57 bl 8001888 <HAL_GetTick>
|
||
8002fda: 4602 mov r2, r0
|
||
8002fdc: 693b ldr r3, [r7, #16]
|
||
8002fde: 1ad3 subs r3, r2, r3
|
||
8002fe0: 2b02 cmp r3, #2
|
||
8002fe2: d901 bls.n 8002fe8 <HAL_RCC_OscConfig+0x1b4>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8002fe4: 2303 movs r3, #3
|
||
8002fe6: e19b b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8002fe8: 4b2d ldr r3, [pc, #180] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002fea: 681b ldr r3, [r3, #0]
|
||
8002fec: f003 0302 and.w r3, r3, #2
|
||
8002ff0: 2b00 cmp r3, #0
|
||
8002ff2: d0f0 beq.n 8002fd6 <HAL_RCC_OscConfig+0x1a2>
|
||
}
|
||
}
|
||
|
||
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
||
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
||
8002ff4: 4b2a ldr r3, [pc, #168] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8002ff6: 681b ldr r3, [r3, #0]
|
||
8002ff8: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
||
8002ffc: 687b ldr r3, [r7, #4]
|
||
8002ffe: 695b ldr r3, [r3, #20]
|
||
8003000: 00db lsls r3, r3, #3
|
||
8003002: 4927 ldr r1, [pc, #156] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
8003004: 4313 orrs r3, r2
|
||
8003006: 600b str r3, [r1, #0]
|
||
8003008: e015 b.n 8003036 <HAL_RCC_OscConfig+0x202>
|
||
}
|
||
else
|
||
{
|
||
/* Disable the Internal High Speed oscillator (HSI). */
|
||
__HAL_RCC_HSI_DISABLE();
|
||
800300a: 4b26 ldr r3, [pc, #152] ; (80030a4 <HAL_RCC_OscConfig+0x270>)
|
||
800300c: 2200 movs r2, #0
|
||
800300e: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8003010: f7fe fc3a bl 8001888 <HAL_GetTick>
|
||
8003014: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSI is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
||
8003016: e008 b.n 800302a <HAL_RCC_OscConfig+0x1f6>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
||
8003018: f7fe fc36 bl 8001888 <HAL_GetTick>
|
||
800301c: 4602 mov r2, r0
|
||
800301e: 693b ldr r3, [r7, #16]
|
||
8003020: 1ad3 subs r3, r2, r3
|
||
8003022: 2b02 cmp r3, #2
|
||
8003024: d901 bls.n 800302a <HAL_RCC_OscConfig+0x1f6>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8003026: 2303 movs r3, #3
|
||
8003028: e17a b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
||
800302a: 4b1d ldr r3, [pc, #116] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
800302c: 681b ldr r3, [r3, #0]
|
||
800302e: f003 0302 and.w r3, r3, #2
|
||
8003032: 2b00 cmp r3, #0
|
||
8003034: d1f0 bne.n 8003018 <HAL_RCC_OscConfig+0x1e4>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*------------------------------ LSI Configuration -------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
|
||
8003036: 687b ldr r3, [r7, #4]
|
||
8003038: 681b ldr r3, [r3, #0]
|
||
800303a: f003 0308 and.w r3, r3, #8
|
||
800303e: 2b00 cmp r3, #0
|
||
8003040: d03a beq.n 80030b8 <HAL_RCC_OscConfig+0x284>
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
|
||
|
||
/* Check the LSI State */
|
||
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
|
||
8003042: 687b ldr r3, [r7, #4]
|
||
8003044: 699b ldr r3, [r3, #24]
|
||
8003046: 2b00 cmp r3, #0
|
||
8003048: d019 beq.n 800307e <HAL_RCC_OscConfig+0x24a>
|
||
{
|
||
/* Enable the Internal Low Speed oscillator (LSI). */
|
||
__HAL_RCC_LSI_ENABLE();
|
||
800304a: 4b17 ldr r3, [pc, #92] ; (80030a8 <HAL_RCC_OscConfig+0x274>)
|
||
800304c: 2201 movs r2, #1
|
||
800304e: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8003050: f7fe fc1a bl 8001888 <HAL_GetTick>
|
||
8003054: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSI is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
||
8003056: e008 b.n 800306a <HAL_RCC_OscConfig+0x236>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
||
8003058: f7fe fc16 bl 8001888 <HAL_GetTick>
|
||
800305c: 4602 mov r2, r0
|
||
800305e: 693b ldr r3, [r7, #16]
|
||
8003060: 1ad3 subs r3, r2, r3
|
||
8003062: 2b02 cmp r3, #2
|
||
8003064: d901 bls.n 800306a <HAL_RCC_OscConfig+0x236>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8003066: 2303 movs r3, #3
|
||
8003068: e15a b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
||
800306a: 4b0d ldr r3, [pc, #52] ; (80030a0 <HAL_RCC_OscConfig+0x26c>)
|
||
800306c: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800306e: f003 0302 and.w r3, r3, #2
|
||
8003072: 2b00 cmp r3, #0
|
||
8003074: d0f0 beq.n 8003058 <HAL_RCC_OscConfig+0x224>
|
||
}
|
||
}
|
||
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
|
||
should be added.*/
|
||
RCC_Delay(1);
|
||
8003076: 2001 movs r0, #1
|
||
8003078: f000 fac4 bl 8003604 <RCC_Delay>
|
||
800307c: e01c b.n 80030b8 <HAL_RCC_OscConfig+0x284>
|
||
}
|
||
else
|
||
{
|
||
/* Disable the Internal Low Speed oscillator (LSI). */
|
||
__HAL_RCC_LSI_DISABLE();
|
||
800307e: 4b0a ldr r3, [pc, #40] ; (80030a8 <HAL_RCC_OscConfig+0x274>)
|
||
8003080: 2200 movs r2, #0
|
||
8003082: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8003084: f7fe fc00 bl 8001888 <HAL_GetTick>
|
||
8003088: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSI is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
||
800308a: e00f b.n 80030ac <HAL_RCC_OscConfig+0x278>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
||
800308c: f7fe fbfc bl 8001888 <HAL_GetTick>
|
||
8003090: 4602 mov r2, r0
|
||
8003092: 693b ldr r3, [r7, #16]
|
||
8003094: 1ad3 subs r3, r2, r3
|
||
8003096: 2b02 cmp r3, #2
|
||
8003098: d908 bls.n 80030ac <HAL_RCC_OscConfig+0x278>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800309a: 2303 movs r3, #3
|
||
800309c: e140 b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
800309e: bf00 nop
|
||
80030a0: 40021000 .word 0x40021000
|
||
80030a4: 42420000 .word 0x42420000
|
||
80030a8: 42420480 .word 0x42420480
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
||
80030ac: 4b9e ldr r3, [pc, #632] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
80030ae: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80030b0: f003 0302 and.w r3, r3, #2
|
||
80030b4: 2b00 cmp r3, #0
|
||
80030b6: d1e9 bne.n 800308c <HAL_RCC_OscConfig+0x258>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*------------------------------ LSE Configuration -------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
|
||
80030b8: 687b ldr r3, [r7, #4]
|
||
80030ba: 681b ldr r3, [r3, #0]
|
||
80030bc: f003 0304 and.w r3, r3, #4
|
||
80030c0: 2b00 cmp r3, #0
|
||
80030c2: f000 80a6 beq.w 8003212 <HAL_RCC_OscConfig+0x3de>
|
||
{
|
||
FlagStatus pwrclkchanged = RESET;
|
||
80030c6: 2300 movs r3, #0
|
||
80030c8: 75fb strb r3, [r7, #23]
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
|
||
|
||
/* Update LSE configuration in Backup Domain control register */
|
||
/* Requires to enable write access to Backup Domain of necessary */
|
||
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
|
||
80030ca: 4b97 ldr r3, [pc, #604] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
80030cc: 69db ldr r3, [r3, #28]
|
||
80030ce: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
80030d2: 2b00 cmp r3, #0
|
||
80030d4: d10d bne.n 80030f2 <HAL_RCC_OscConfig+0x2be>
|
||
{
|
||
__HAL_RCC_PWR_CLK_ENABLE();
|
||
80030d6: 4b94 ldr r3, [pc, #592] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
80030d8: 69db ldr r3, [r3, #28]
|
||
80030da: 4a93 ldr r2, [pc, #588] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
80030dc: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
||
80030e0: 61d3 str r3, [r2, #28]
|
||
80030e2: 4b91 ldr r3, [pc, #580] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
80030e4: 69db ldr r3, [r3, #28]
|
||
80030e6: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
80030ea: 60bb str r3, [r7, #8]
|
||
80030ec: 68bb ldr r3, [r7, #8]
|
||
pwrclkchanged = SET;
|
||
80030ee: 2301 movs r3, #1
|
||
80030f0: 75fb strb r3, [r7, #23]
|
||
}
|
||
|
||
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
80030f2: 4b8e ldr r3, [pc, #568] ; (800332c <HAL_RCC_OscConfig+0x4f8>)
|
||
80030f4: 681b ldr r3, [r3, #0]
|
||
80030f6: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
80030fa: 2b00 cmp r3, #0
|
||
80030fc: d118 bne.n 8003130 <HAL_RCC_OscConfig+0x2fc>
|
||
{
|
||
/* Enable write access to Backup domain */
|
||
SET_BIT(PWR->CR, PWR_CR_DBP);
|
||
80030fe: 4b8b ldr r3, [pc, #556] ; (800332c <HAL_RCC_OscConfig+0x4f8>)
|
||
8003100: 681b ldr r3, [r3, #0]
|
||
8003102: 4a8a ldr r2, [pc, #552] ; (800332c <HAL_RCC_OscConfig+0x4f8>)
|
||
8003104: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
8003108: 6013 str r3, [r2, #0]
|
||
|
||
/* Wait for Backup domain Write protection disable */
|
||
tickstart = HAL_GetTick();
|
||
800310a: f7fe fbbd bl 8001888 <HAL_GetTick>
|
||
800310e: 6138 str r0, [r7, #16]
|
||
|
||
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
8003110: e008 b.n 8003124 <HAL_RCC_OscConfig+0x2f0>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
||
8003112: f7fe fbb9 bl 8001888 <HAL_GetTick>
|
||
8003116: 4602 mov r2, r0
|
||
8003118: 693b ldr r3, [r7, #16]
|
||
800311a: 1ad3 subs r3, r2, r3
|
||
800311c: 2b64 cmp r3, #100 ; 0x64
|
||
800311e: d901 bls.n 8003124 <HAL_RCC_OscConfig+0x2f0>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8003120: 2303 movs r3, #3
|
||
8003122: e0fd b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
8003124: 4b81 ldr r3, [pc, #516] ; (800332c <HAL_RCC_OscConfig+0x4f8>)
|
||
8003126: 681b ldr r3, [r3, #0]
|
||
8003128: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
800312c: 2b00 cmp r3, #0
|
||
800312e: d0f0 beq.n 8003112 <HAL_RCC_OscConfig+0x2de>
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Set the new LSE configuration -----------------------------------------*/
|
||
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
||
8003130: 687b ldr r3, [r7, #4]
|
||
8003132: 68db ldr r3, [r3, #12]
|
||
8003134: 2b01 cmp r3, #1
|
||
8003136: d106 bne.n 8003146 <HAL_RCC_OscConfig+0x312>
|
||
8003138: 4b7b ldr r3, [pc, #492] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
800313a: 6a1b ldr r3, [r3, #32]
|
||
800313c: 4a7a ldr r2, [pc, #488] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
800313e: f043 0301 orr.w r3, r3, #1
|
||
8003142: 6213 str r3, [r2, #32]
|
||
8003144: e02d b.n 80031a2 <HAL_RCC_OscConfig+0x36e>
|
||
8003146: 687b ldr r3, [r7, #4]
|
||
8003148: 68db ldr r3, [r3, #12]
|
||
800314a: 2b00 cmp r3, #0
|
||
800314c: d10c bne.n 8003168 <HAL_RCC_OscConfig+0x334>
|
||
800314e: 4b76 ldr r3, [pc, #472] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003150: 6a1b ldr r3, [r3, #32]
|
||
8003152: 4a75 ldr r2, [pc, #468] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003154: f023 0301 bic.w r3, r3, #1
|
||
8003158: 6213 str r3, [r2, #32]
|
||
800315a: 4b73 ldr r3, [pc, #460] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
800315c: 6a1b ldr r3, [r3, #32]
|
||
800315e: 4a72 ldr r2, [pc, #456] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003160: f023 0304 bic.w r3, r3, #4
|
||
8003164: 6213 str r3, [r2, #32]
|
||
8003166: e01c b.n 80031a2 <HAL_RCC_OscConfig+0x36e>
|
||
8003168: 687b ldr r3, [r7, #4]
|
||
800316a: 68db ldr r3, [r3, #12]
|
||
800316c: 2b05 cmp r3, #5
|
||
800316e: d10c bne.n 800318a <HAL_RCC_OscConfig+0x356>
|
||
8003170: 4b6d ldr r3, [pc, #436] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003172: 6a1b ldr r3, [r3, #32]
|
||
8003174: 4a6c ldr r2, [pc, #432] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003176: f043 0304 orr.w r3, r3, #4
|
||
800317a: 6213 str r3, [r2, #32]
|
||
800317c: 4b6a ldr r3, [pc, #424] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
800317e: 6a1b ldr r3, [r3, #32]
|
||
8003180: 4a69 ldr r2, [pc, #420] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003182: f043 0301 orr.w r3, r3, #1
|
||
8003186: 6213 str r3, [r2, #32]
|
||
8003188: e00b b.n 80031a2 <HAL_RCC_OscConfig+0x36e>
|
||
800318a: 4b67 ldr r3, [pc, #412] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
800318c: 6a1b ldr r3, [r3, #32]
|
||
800318e: 4a66 ldr r2, [pc, #408] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003190: f023 0301 bic.w r3, r3, #1
|
||
8003194: 6213 str r3, [r2, #32]
|
||
8003196: 4b64 ldr r3, [pc, #400] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003198: 6a1b ldr r3, [r3, #32]
|
||
800319a: 4a63 ldr r2, [pc, #396] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
800319c: f023 0304 bic.w r3, r3, #4
|
||
80031a0: 6213 str r3, [r2, #32]
|
||
/* Check the LSE State */
|
||
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
|
||
80031a2: 687b ldr r3, [r7, #4]
|
||
80031a4: 68db ldr r3, [r3, #12]
|
||
80031a6: 2b00 cmp r3, #0
|
||
80031a8: d015 beq.n 80031d6 <HAL_RCC_OscConfig+0x3a2>
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80031aa: f7fe fb6d bl 8001888 <HAL_GetTick>
|
||
80031ae: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSE is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
||
80031b0: e00a b.n 80031c8 <HAL_RCC_OscConfig+0x394>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
||
80031b2: f7fe fb69 bl 8001888 <HAL_GetTick>
|
||
80031b6: 4602 mov r2, r0
|
||
80031b8: 693b ldr r3, [r7, #16]
|
||
80031ba: 1ad3 subs r3, r2, r3
|
||
80031bc: f241 3288 movw r2, #5000 ; 0x1388
|
||
80031c0: 4293 cmp r3, r2
|
||
80031c2: d901 bls.n 80031c8 <HAL_RCC_OscConfig+0x394>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80031c4: 2303 movs r3, #3
|
||
80031c6: e0ab b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
||
80031c8: 4b57 ldr r3, [pc, #348] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
80031ca: 6a1b ldr r3, [r3, #32]
|
||
80031cc: f003 0302 and.w r3, r3, #2
|
||
80031d0: 2b00 cmp r3, #0
|
||
80031d2: d0ee beq.n 80031b2 <HAL_RCC_OscConfig+0x37e>
|
||
80031d4: e014 b.n 8003200 <HAL_RCC_OscConfig+0x3cc>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80031d6: f7fe fb57 bl 8001888 <HAL_GetTick>
|
||
80031da: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSE is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
||
80031dc: e00a b.n 80031f4 <HAL_RCC_OscConfig+0x3c0>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
||
80031de: f7fe fb53 bl 8001888 <HAL_GetTick>
|
||
80031e2: 4602 mov r2, r0
|
||
80031e4: 693b ldr r3, [r7, #16]
|
||
80031e6: 1ad3 subs r3, r2, r3
|
||
80031e8: f241 3288 movw r2, #5000 ; 0x1388
|
||
80031ec: 4293 cmp r3, r2
|
||
80031ee: d901 bls.n 80031f4 <HAL_RCC_OscConfig+0x3c0>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80031f0: 2303 movs r3, #3
|
||
80031f2: e095 b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
||
80031f4: 4b4c ldr r3, [pc, #304] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
80031f6: 6a1b ldr r3, [r3, #32]
|
||
80031f8: f003 0302 and.w r3, r3, #2
|
||
80031fc: 2b00 cmp r3, #0
|
||
80031fe: d1ee bne.n 80031de <HAL_RCC_OscConfig+0x3aa>
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Require to disable power clock if necessary */
|
||
if (pwrclkchanged == SET)
|
||
8003200: 7dfb ldrb r3, [r7, #23]
|
||
8003202: 2b01 cmp r3, #1
|
||
8003204: d105 bne.n 8003212 <HAL_RCC_OscConfig+0x3de>
|
||
{
|
||
__HAL_RCC_PWR_CLK_DISABLE();
|
||
8003206: 4b48 ldr r3, [pc, #288] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003208: 69db ldr r3, [r3, #28]
|
||
800320a: 4a47 ldr r2, [pc, #284] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
800320c: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
|
||
8003210: 61d3 str r3, [r2, #28]
|
||
|
||
#endif /* RCC_CR_PLL2ON */
|
||
/*-------------------------------- PLL Configuration -----------------------*/
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
|
||
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
|
||
8003212: 687b ldr r3, [r7, #4]
|
||
8003214: 69db ldr r3, [r3, #28]
|
||
8003216: 2b00 cmp r3, #0
|
||
8003218: f000 8081 beq.w 800331e <HAL_RCC_OscConfig+0x4ea>
|
||
{
|
||
/* Check if the PLL is used as system clock or not */
|
||
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
|
||
800321c: 4b42 ldr r3, [pc, #264] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
800321e: 685b ldr r3, [r3, #4]
|
||
8003220: f003 030c and.w r3, r3, #12
|
||
8003224: 2b08 cmp r3, #8
|
||
8003226: d061 beq.n 80032ec <HAL_RCC_OscConfig+0x4b8>
|
||
{
|
||
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
|
||
8003228: 687b ldr r3, [r7, #4]
|
||
800322a: 69db ldr r3, [r3, #28]
|
||
800322c: 2b02 cmp r3, #2
|
||
800322e: d146 bne.n 80032be <HAL_RCC_OscConfig+0x48a>
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
|
||
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
|
||
|
||
/* Disable the main PLL. */
|
||
__HAL_RCC_PLL_DISABLE();
|
||
8003230: 4b3f ldr r3, [pc, #252] ; (8003330 <HAL_RCC_OscConfig+0x4fc>)
|
||
8003232: 2200 movs r2, #0
|
||
8003234: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8003236: f7fe fb27 bl 8001888 <HAL_GetTick>
|
||
800323a: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
800323c: e008 b.n 8003250 <HAL_RCC_OscConfig+0x41c>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
800323e: f7fe fb23 bl 8001888 <HAL_GetTick>
|
||
8003242: 4602 mov r2, r0
|
||
8003244: 693b ldr r3, [r7, #16]
|
||
8003246: 1ad3 subs r3, r2, r3
|
||
8003248: 2b02 cmp r3, #2
|
||
800324a: d901 bls.n 8003250 <HAL_RCC_OscConfig+0x41c>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800324c: 2303 movs r3, #3
|
||
800324e: e067 b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
8003250: 4b35 ldr r3, [pc, #212] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003252: 681b ldr r3, [r3, #0]
|
||
8003254: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
8003258: 2b00 cmp r3, #0
|
||
800325a: d1f0 bne.n 800323e <HAL_RCC_OscConfig+0x40a>
|
||
}
|
||
}
|
||
|
||
/* Configure the HSE prediv factor --------------------------------*/
|
||
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
|
||
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
|
||
800325c: 687b ldr r3, [r7, #4]
|
||
800325e: 6a1b ldr r3, [r3, #32]
|
||
8003260: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8003264: d108 bne.n 8003278 <HAL_RCC_OscConfig+0x444>
|
||
/* Set PREDIV1 source */
|
||
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
|
||
#endif /* RCC_CFGR2_PREDIV1SRC */
|
||
|
||
/* Set PREDIV1 Value */
|
||
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
|
||
8003266: 4b30 ldr r3, [pc, #192] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003268: 685b ldr r3, [r3, #4]
|
||
800326a: f423 3200 bic.w r2, r3, #131072 ; 0x20000
|
||
800326e: 687b ldr r3, [r7, #4]
|
||
8003270: 689b ldr r3, [r3, #8]
|
||
8003272: 492d ldr r1, [pc, #180] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003274: 4313 orrs r3, r2
|
||
8003276: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Configure the main PLL clock source and multiplication factors. */
|
||
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
|
||
8003278: 4b2b ldr r3, [pc, #172] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
800327a: 685b ldr r3, [r3, #4]
|
||
800327c: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000
|
||
8003280: 687b ldr r3, [r7, #4]
|
||
8003282: 6a19 ldr r1, [r3, #32]
|
||
8003284: 687b ldr r3, [r7, #4]
|
||
8003286: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8003288: 430b orrs r3, r1
|
||
800328a: 4927 ldr r1, [pc, #156] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
800328c: 4313 orrs r3, r2
|
||
800328e: 604b str r3, [r1, #4]
|
||
RCC_OscInitStruct->PLL.PLLMUL);
|
||
/* Enable the main PLL. */
|
||
__HAL_RCC_PLL_ENABLE();
|
||
8003290: 4b27 ldr r3, [pc, #156] ; (8003330 <HAL_RCC_OscConfig+0x4fc>)
|
||
8003292: 2201 movs r2, #1
|
||
8003294: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8003296: f7fe faf7 bl 8001888 <HAL_GetTick>
|
||
800329a: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
800329c: e008 b.n 80032b0 <HAL_RCC_OscConfig+0x47c>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
800329e: f7fe faf3 bl 8001888 <HAL_GetTick>
|
||
80032a2: 4602 mov r2, r0
|
||
80032a4: 693b ldr r3, [r7, #16]
|
||
80032a6: 1ad3 subs r3, r2, r3
|
||
80032a8: 2b02 cmp r3, #2
|
||
80032aa: d901 bls.n 80032b0 <HAL_RCC_OscConfig+0x47c>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80032ac: 2303 movs r3, #3
|
||
80032ae: e037 b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
80032b0: 4b1d ldr r3, [pc, #116] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
80032b2: 681b ldr r3, [r3, #0]
|
||
80032b4: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
80032b8: 2b00 cmp r3, #0
|
||
80032ba: d0f0 beq.n 800329e <HAL_RCC_OscConfig+0x46a>
|
||
80032bc: e02f b.n 800331e <HAL_RCC_OscConfig+0x4ea>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Disable the main PLL. */
|
||
__HAL_RCC_PLL_DISABLE();
|
||
80032be: 4b1c ldr r3, [pc, #112] ; (8003330 <HAL_RCC_OscConfig+0x4fc>)
|
||
80032c0: 2200 movs r2, #0
|
||
80032c2: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80032c4: f7fe fae0 bl 8001888 <HAL_GetTick>
|
||
80032c8: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
80032ca: e008 b.n 80032de <HAL_RCC_OscConfig+0x4aa>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
80032cc: f7fe fadc bl 8001888 <HAL_GetTick>
|
||
80032d0: 4602 mov r2, r0
|
||
80032d2: 693b ldr r3, [r7, #16]
|
||
80032d4: 1ad3 subs r3, r2, r3
|
||
80032d6: 2b02 cmp r3, #2
|
||
80032d8: d901 bls.n 80032de <HAL_RCC_OscConfig+0x4aa>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80032da: 2303 movs r3, #3
|
||
80032dc: e020 b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
80032de: 4b12 ldr r3, [pc, #72] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
80032e0: 681b ldr r3, [r3, #0]
|
||
80032e2: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
80032e6: 2b00 cmp r3, #0
|
||
80032e8: d1f0 bne.n 80032cc <HAL_RCC_OscConfig+0x498>
|
||
80032ea: e018 b.n 800331e <HAL_RCC_OscConfig+0x4ea>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Check if there is a request to disable the PLL used as System clock source */
|
||
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
|
||
80032ec: 687b ldr r3, [r7, #4]
|
||
80032ee: 69db ldr r3, [r3, #28]
|
||
80032f0: 2b01 cmp r3, #1
|
||
80032f2: d101 bne.n 80032f8 <HAL_RCC_OscConfig+0x4c4>
|
||
{
|
||
return HAL_ERROR;
|
||
80032f4: 2301 movs r3, #1
|
||
80032f6: e013 b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
else
|
||
{
|
||
/* Do not return HAL_ERROR if request repeats the current configuration */
|
||
pll_config = RCC->CFGR;
|
||
80032f8: 4b0b ldr r3, [pc, #44] ; (8003328 <HAL_RCC_OscConfig+0x4f4>)
|
||
80032fa: 685b ldr r3, [r3, #4]
|
||
80032fc: 60fb str r3, [r7, #12]
|
||
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
||
80032fe: 68fb ldr r3, [r7, #12]
|
||
8003300: f403 3280 and.w r2, r3, #65536 ; 0x10000
|
||
8003304: 687b ldr r3, [r7, #4]
|
||
8003306: 6a1b ldr r3, [r3, #32]
|
||
8003308: 429a cmp r2, r3
|
||
800330a: d106 bne.n 800331a <HAL_RCC_OscConfig+0x4e6>
|
||
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
|
||
800330c: 68fb ldr r3, [r7, #12]
|
||
800330e: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000
|
||
8003312: 687b ldr r3, [r7, #4]
|
||
8003314: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
||
8003316: 429a cmp r2, r3
|
||
8003318: d001 beq.n 800331e <HAL_RCC_OscConfig+0x4ea>
|
||
{
|
||
return HAL_ERROR;
|
||
800331a: 2301 movs r3, #1
|
||
800331c: e000 b.n 8003320 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
return HAL_OK;
|
||
800331e: 2300 movs r3, #0
|
||
}
|
||
8003320: 4618 mov r0, r3
|
||
8003322: 3718 adds r7, #24
|
||
8003324: 46bd mov sp, r7
|
||
8003326: bd80 pop {r7, pc}
|
||
8003328: 40021000 .word 0x40021000
|
||
800332c: 40007000 .word 0x40007000
|
||
8003330: 42420060 .word 0x42420060
|
||
|
||
08003334 <HAL_RCC_ClockConfig>:
|
||
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
|
||
* currently used as system clock source.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
|
||
{
|
||
8003334: b580 push {r7, lr}
|
||
8003336: b084 sub sp, #16
|
||
8003338: af00 add r7, sp, #0
|
||
800333a: 6078 str r0, [r7, #4]
|
||
800333c: 6039 str r1, [r7, #0]
|
||
uint32_t tickstart;
|
||
|
||
/* Check Null pointer */
|
||
if (RCC_ClkInitStruct == NULL)
|
||
800333e: 687b ldr r3, [r7, #4]
|
||
8003340: 2b00 cmp r3, #0
|
||
8003342: d101 bne.n 8003348 <HAL_RCC_ClockConfig+0x14>
|
||
{
|
||
return HAL_ERROR;
|
||
8003344: 2301 movs r3, #1
|
||
8003346: e0d0 b.n 80034ea <HAL_RCC_ClockConfig+0x1b6>
|
||
must be correctly programmed according to the frequency of the CPU clock
|
||
(HCLK) of the device. */
|
||
|
||
#if defined(FLASH_ACR_LATENCY)
|
||
/* Increasing the number of wait states because of higher CPU frequency */
|
||
if (FLatency > __HAL_FLASH_GET_LATENCY())
|
||
8003348: 4b6a ldr r3, [pc, #424] ; (80034f4 <HAL_RCC_ClockConfig+0x1c0>)
|
||
800334a: 681b ldr r3, [r3, #0]
|
||
800334c: f003 0307 and.w r3, r3, #7
|
||
8003350: 683a ldr r2, [r7, #0]
|
||
8003352: 429a cmp r2, r3
|
||
8003354: d910 bls.n 8003378 <HAL_RCC_ClockConfig+0x44>
|
||
{
|
||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||
__HAL_FLASH_SET_LATENCY(FLatency);
|
||
8003356: 4b67 ldr r3, [pc, #412] ; (80034f4 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8003358: 681b ldr r3, [r3, #0]
|
||
800335a: f023 0207 bic.w r2, r3, #7
|
||
800335e: 4965 ldr r1, [pc, #404] ; (80034f4 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8003360: 683b ldr r3, [r7, #0]
|
||
8003362: 4313 orrs r3, r2
|
||
8003364: 600b str r3, [r1, #0]
|
||
|
||
/* Check that the new number of wait states is taken into account to access the Flash
|
||
memory by reading the FLASH_ACR register */
|
||
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
||
8003366: 4b63 ldr r3, [pc, #396] ; (80034f4 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8003368: 681b ldr r3, [r3, #0]
|
||
800336a: f003 0307 and.w r3, r3, #7
|
||
800336e: 683a ldr r2, [r7, #0]
|
||
8003370: 429a cmp r2, r3
|
||
8003372: d001 beq.n 8003378 <HAL_RCC_ClockConfig+0x44>
|
||
{
|
||
return HAL_ERROR;
|
||
8003374: 2301 movs r3, #1
|
||
8003376: e0b8 b.n 80034ea <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
|
||
#endif /* FLASH_ACR_LATENCY */
|
||
/*-------------------------- HCLK Configuration --------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
|
||
8003378: 687b ldr r3, [r7, #4]
|
||
800337a: 681b ldr r3, [r3, #0]
|
||
800337c: f003 0302 and.w r3, r3, #2
|
||
8003380: 2b00 cmp r3, #0
|
||
8003382: d020 beq.n 80033c6 <HAL_RCC_ClockConfig+0x92>
|
||
{
|
||
/* Set the highest APBx dividers in order to ensure that we do not go through
|
||
a non-spec phase whatever we decrease or increase HCLK. */
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
||
8003384: 687b ldr r3, [r7, #4]
|
||
8003386: 681b ldr r3, [r3, #0]
|
||
8003388: f003 0304 and.w r3, r3, #4
|
||
800338c: 2b00 cmp r3, #0
|
||
800338e: d005 beq.n 800339c <HAL_RCC_ClockConfig+0x68>
|
||
{
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
|
||
8003390: 4b59 ldr r3, [pc, #356] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003392: 685b ldr r3, [r3, #4]
|
||
8003394: 4a58 ldr r2, [pc, #352] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003396: f443 63e0 orr.w r3, r3, #1792 ; 0x700
|
||
800339a: 6053 str r3, [r2, #4]
|
||
}
|
||
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
||
800339c: 687b ldr r3, [r7, #4]
|
||
800339e: 681b ldr r3, [r3, #0]
|
||
80033a0: f003 0308 and.w r3, r3, #8
|
||
80033a4: 2b00 cmp r3, #0
|
||
80033a6: d005 beq.n 80033b4 <HAL_RCC_ClockConfig+0x80>
|
||
{
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
|
||
80033a8: 4b53 ldr r3, [pc, #332] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033aa: 685b ldr r3, [r3, #4]
|
||
80033ac: 4a52 ldr r2, [pc, #328] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033ae: f443 5360 orr.w r3, r3, #14336 ; 0x3800
|
||
80033b2: 6053 str r3, [r2, #4]
|
||
}
|
||
|
||
/* Set the new HCLK clock divider */
|
||
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
|
||
80033b4: 4b50 ldr r3, [pc, #320] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033b6: 685b ldr r3, [r3, #4]
|
||
80033b8: f023 02f0 bic.w r2, r3, #240 ; 0xf0
|
||
80033bc: 687b ldr r3, [r7, #4]
|
||
80033be: 689b ldr r3, [r3, #8]
|
||
80033c0: 494d ldr r1, [pc, #308] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033c2: 4313 orrs r3, r2
|
||
80033c4: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/*------------------------- SYSCLK Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
|
||
80033c6: 687b ldr r3, [r7, #4]
|
||
80033c8: 681b ldr r3, [r3, #0]
|
||
80033ca: f003 0301 and.w r3, r3, #1
|
||
80033ce: 2b00 cmp r3, #0
|
||
80033d0: d040 beq.n 8003454 <HAL_RCC_ClockConfig+0x120>
|
||
{
|
||
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
|
||
|
||
/* HSE is selected as System Clock Source */
|
||
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
|
||
80033d2: 687b ldr r3, [r7, #4]
|
||
80033d4: 685b ldr r3, [r3, #4]
|
||
80033d6: 2b01 cmp r3, #1
|
||
80033d8: d107 bne.n 80033ea <HAL_RCC_ClockConfig+0xb6>
|
||
{
|
||
/* Check the HSE ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
80033da: 4b47 ldr r3, [pc, #284] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033dc: 681b ldr r3, [r3, #0]
|
||
80033de: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
80033e2: 2b00 cmp r3, #0
|
||
80033e4: d115 bne.n 8003412 <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
80033e6: 2301 movs r3, #1
|
||
80033e8: e07f b.n 80034ea <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
/* PLL is selected as System Clock Source */
|
||
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
|
||
80033ea: 687b ldr r3, [r7, #4]
|
||
80033ec: 685b ldr r3, [r3, #4]
|
||
80033ee: 2b02 cmp r3, #2
|
||
80033f0: d107 bne.n 8003402 <HAL_RCC_ClockConfig+0xce>
|
||
{
|
||
/* Check the PLL ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
80033f2: 4b41 ldr r3, [pc, #260] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033f4: 681b ldr r3, [r3, #0]
|
||
80033f6: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
80033fa: 2b00 cmp r3, #0
|
||
80033fc: d109 bne.n 8003412 <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
80033fe: 2301 movs r3, #1
|
||
8003400: e073 b.n 80034ea <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
/* HSI is selected as System Clock Source */
|
||
else
|
||
{
|
||
/* Check the HSI ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8003402: 4b3d ldr r3, [pc, #244] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003404: 681b ldr r3, [r3, #0]
|
||
8003406: f003 0302 and.w r3, r3, #2
|
||
800340a: 2b00 cmp r3, #0
|
||
800340c: d101 bne.n 8003412 <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
800340e: 2301 movs r3, #1
|
||
8003410: e06b b.n 80034ea <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
|
||
8003412: 4b39 ldr r3, [pc, #228] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003414: 685b ldr r3, [r3, #4]
|
||
8003416: f023 0203 bic.w r2, r3, #3
|
||
800341a: 687b ldr r3, [r7, #4]
|
||
800341c: 685b ldr r3, [r3, #4]
|
||
800341e: 4936 ldr r1, [pc, #216] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003420: 4313 orrs r3, r2
|
||
8003422: 604b str r3, [r1, #4]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8003424: f7fe fa30 bl 8001888 <HAL_GetTick>
|
||
8003428: 60f8 str r0, [r7, #12]
|
||
|
||
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
||
800342a: e00a b.n 8003442 <HAL_RCC_ClockConfig+0x10e>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
|
||
800342c: f7fe fa2c bl 8001888 <HAL_GetTick>
|
||
8003430: 4602 mov r2, r0
|
||
8003432: 68fb ldr r3, [r7, #12]
|
||
8003434: 1ad3 subs r3, r2, r3
|
||
8003436: f241 3288 movw r2, #5000 ; 0x1388
|
||
800343a: 4293 cmp r3, r2
|
||
800343c: d901 bls.n 8003442 <HAL_RCC_ClockConfig+0x10e>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800343e: 2303 movs r3, #3
|
||
8003440: e053 b.n 80034ea <HAL_RCC_ClockConfig+0x1b6>
|
||
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
||
8003442: 4b2d ldr r3, [pc, #180] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003444: 685b ldr r3, [r3, #4]
|
||
8003446: f003 020c and.w r2, r3, #12
|
||
800344a: 687b ldr r3, [r7, #4]
|
||
800344c: 685b ldr r3, [r3, #4]
|
||
800344e: 009b lsls r3, r3, #2
|
||
8003450: 429a cmp r2, r3
|
||
8003452: d1eb bne.n 800342c <HAL_RCC_ClockConfig+0xf8>
|
||
}
|
||
}
|
||
|
||
#if defined(FLASH_ACR_LATENCY)
|
||
/* Decreasing the number of wait states because of lower CPU frequency */
|
||
if (FLatency < __HAL_FLASH_GET_LATENCY())
|
||
8003454: 4b27 ldr r3, [pc, #156] ; (80034f4 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8003456: 681b ldr r3, [r3, #0]
|
||
8003458: f003 0307 and.w r3, r3, #7
|
||
800345c: 683a ldr r2, [r7, #0]
|
||
800345e: 429a cmp r2, r3
|
||
8003460: d210 bcs.n 8003484 <HAL_RCC_ClockConfig+0x150>
|
||
{
|
||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||
__HAL_FLASH_SET_LATENCY(FLatency);
|
||
8003462: 4b24 ldr r3, [pc, #144] ; (80034f4 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8003464: 681b ldr r3, [r3, #0]
|
||
8003466: f023 0207 bic.w r2, r3, #7
|
||
800346a: 4922 ldr r1, [pc, #136] ; (80034f4 <HAL_RCC_ClockConfig+0x1c0>)
|
||
800346c: 683b ldr r3, [r7, #0]
|
||
800346e: 4313 orrs r3, r2
|
||
8003470: 600b str r3, [r1, #0]
|
||
|
||
/* Check that the new number of wait states is taken into account to access the Flash
|
||
memory by reading the FLASH_ACR register */
|
||
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
||
8003472: 4b20 ldr r3, [pc, #128] ; (80034f4 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8003474: 681b ldr r3, [r3, #0]
|
||
8003476: f003 0307 and.w r3, r3, #7
|
||
800347a: 683a ldr r2, [r7, #0]
|
||
800347c: 429a cmp r2, r3
|
||
800347e: d001 beq.n 8003484 <HAL_RCC_ClockConfig+0x150>
|
||
{
|
||
return HAL_ERROR;
|
||
8003480: 2301 movs r3, #1
|
||
8003482: e032 b.n 80034ea <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
#endif /* FLASH_ACR_LATENCY */
|
||
|
||
/*-------------------------- PCLK1 Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
||
8003484: 687b ldr r3, [r7, #4]
|
||
8003486: 681b ldr r3, [r3, #0]
|
||
8003488: f003 0304 and.w r3, r3, #4
|
||
800348c: 2b00 cmp r3, #0
|
||
800348e: d008 beq.n 80034a2 <HAL_RCC_ClockConfig+0x16e>
|
||
{
|
||
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
|
||
8003490: 4b19 ldr r3, [pc, #100] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003492: 685b ldr r3, [r3, #4]
|
||
8003494: f423 62e0 bic.w r2, r3, #1792 ; 0x700
|
||
8003498: 687b ldr r3, [r7, #4]
|
||
800349a: 68db ldr r3, [r3, #12]
|
||
800349c: 4916 ldr r1, [pc, #88] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
800349e: 4313 orrs r3, r2
|
||
80034a0: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/*-------------------------- PCLK2 Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
||
80034a2: 687b ldr r3, [r7, #4]
|
||
80034a4: 681b ldr r3, [r3, #0]
|
||
80034a6: f003 0308 and.w r3, r3, #8
|
||
80034aa: 2b00 cmp r3, #0
|
||
80034ac: d009 beq.n 80034c2 <HAL_RCC_ClockConfig+0x18e>
|
||
{
|
||
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
|
||
80034ae: 4b12 ldr r3, [pc, #72] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80034b0: 685b ldr r3, [r3, #4]
|
||
80034b2: f423 5260 bic.w r2, r3, #14336 ; 0x3800
|
||
80034b6: 687b ldr r3, [r7, #4]
|
||
80034b8: 691b ldr r3, [r3, #16]
|
||
80034ba: 00db lsls r3, r3, #3
|
||
80034bc: 490e ldr r1, [pc, #56] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80034be: 4313 orrs r3, r2
|
||
80034c0: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Update the SystemCoreClock global variable */
|
||
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
|
||
80034c2: f000 f821 bl 8003508 <HAL_RCC_GetSysClockFreq>
|
||
80034c6: 4602 mov r2, r0
|
||
80034c8: 4b0b ldr r3, [pc, #44] ; (80034f8 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80034ca: 685b ldr r3, [r3, #4]
|
||
80034cc: 091b lsrs r3, r3, #4
|
||
80034ce: f003 030f and.w r3, r3, #15
|
||
80034d2: 490a ldr r1, [pc, #40] ; (80034fc <HAL_RCC_ClockConfig+0x1c8>)
|
||
80034d4: 5ccb ldrb r3, [r1, r3]
|
||
80034d6: fa22 f303 lsr.w r3, r2, r3
|
||
80034da: 4a09 ldr r2, [pc, #36] ; (8003500 <HAL_RCC_ClockConfig+0x1cc>)
|
||
80034dc: 6013 str r3, [r2, #0]
|
||
|
||
/* Configure the source of time base considering new system clocks settings*/
|
||
HAL_InitTick(uwTickPrio);
|
||
80034de: 4b09 ldr r3, [pc, #36] ; (8003504 <HAL_RCC_ClockConfig+0x1d0>)
|
||
80034e0: 681b ldr r3, [r3, #0]
|
||
80034e2: 4618 mov r0, r3
|
||
80034e4: f7fe f98e bl 8001804 <HAL_InitTick>
|
||
|
||
return HAL_OK;
|
||
80034e8: 2300 movs r3, #0
|
||
}
|
||
80034ea: 4618 mov r0, r3
|
||
80034ec: 3710 adds r7, #16
|
||
80034ee: 46bd mov sp, r7
|
||
80034f0: bd80 pop {r7, pc}
|
||
80034f2: bf00 nop
|
||
80034f4: 40022000 .word 0x40022000
|
||
80034f8: 40021000 .word 0x40021000
|
||
80034fc: 080083b8 .word 0x080083b8
|
||
8003500: 20000000 .word 0x20000000
|
||
8003504: 20000004 .word 0x20000004
|
||
|
||
08003508 <HAL_RCC_GetSysClockFreq>:
|
||
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
|
||
*
|
||
* @retval SYSCLK frequency
|
||
*/
|
||
uint32_t HAL_RCC_GetSysClockFreq(void)
|
||
{
|
||
8003508: b490 push {r4, r7}
|
||
800350a: b08a sub sp, #40 ; 0x28
|
||
800350c: af00 add r7, sp, #0
|
||
#if defined(RCC_CFGR2_PREDIV1SRC)
|
||
const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13};
|
||
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
||
#else
|
||
const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
|
||
800350e: 4b2a ldr r3, [pc, #168] ; (80035b8 <HAL_RCC_GetSysClockFreq+0xb0>)
|
||
8003510: 1d3c adds r4, r7, #4
|
||
8003512: cb0f ldmia r3, {r0, r1, r2, r3}
|
||
8003514: e884 000f stmia.w r4, {r0, r1, r2, r3}
|
||
#if defined(RCC_CFGR2_PREDIV1)
|
||
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
||
#else
|
||
const uint8_t aPredivFactorTable[2] = {1, 2};
|
||
8003518: f240 2301 movw r3, #513 ; 0x201
|
||
800351c: 803b strh r3, [r7, #0]
|
||
#endif /*RCC_CFGR2_PREDIV1*/
|
||
|
||
#endif
|
||
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
|
||
800351e: 2300 movs r3, #0
|
||
8003520: 61fb str r3, [r7, #28]
|
||
8003522: 2300 movs r3, #0
|
||
8003524: 61bb str r3, [r7, #24]
|
||
8003526: 2300 movs r3, #0
|
||
8003528: 627b str r3, [r7, #36] ; 0x24
|
||
800352a: 2300 movs r3, #0
|
||
800352c: 617b str r3, [r7, #20]
|
||
uint32_t sysclockfreq = 0U;
|
||
800352e: 2300 movs r3, #0
|
||
8003530: 623b str r3, [r7, #32]
|
||
#if defined(RCC_CFGR2_PREDIV1SRC)
|
||
uint32_t prediv2 = 0U, pll2mul = 0U;
|
||
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
||
|
||
tmpreg = RCC->CFGR;
|
||
8003532: 4b22 ldr r3, [pc, #136] ; (80035bc <HAL_RCC_GetSysClockFreq+0xb4>)
|
||
8003534: 685b ldr r3, [r3, #4]
|
||
8003536: 61fb str r3, [r7, #28]
|
||
|
||
/* Get SYSCLK source -------------------------------------------------------*/
|
||
switch (tmpreg & RCC_CFGR_SWS)
|
||
8003538: 69fb ldr r3, [r7, #28]
|
||
800353a: f003 030c and.w r3, r3, #12
|
||
800353e: 2b04 cmp r3, #4
|
||
8003540: d002 beq.n 8003548 <HAL_RCC_GetSysClockFreq+0x40>
|
||
8003542: 2b08 cmp r3, #8
|
||
8003544: d003 beq.n 800354e <HAL_RCC_GetSysClockFreq+0x46>
|
||
8003546: e02d b.n 80035a4 <HAL_RCC_GetSysClockFreq+0x9c>
|
||
{
|
||
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
|
||
{
|
||
sysclockfreq = HSE_VALUE;
|
||
8003548: 4b1d ldr r3, [pc, #116] ; (80035c0 <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
800354a: 623b str r3, [r7, #32]
|
||
break;
|
||
800354c: e02d b.n 80035aa <HAL_RCC_GetSysClockFreq+0xa2>
|
||
}
|
||
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
|
||
{
|
||
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
|
||
800354e: 69fb ldr r3, [r7, #28]
|
||
8003550: 0c9b lsrs r3, r3, #18
|
||
8003552: f003 030f and.w r3, r3, #15
|
||
8003556: f107 0228 add.w r2, r7, #40 ; 0x28
|
||
800355a: 4413 add r3, r2
|
||
800355c: f813 3c24 ldrb.w r3, [r3, #-36]
|
||
8003560: 617b str r3, [r7, #20]
|
||
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
|
||
8003562: 69fb ldr r3, [r7, #28]
|
||
8003564: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8003568: 2b00 cmp r3, #0
|
||
800356a: d013 beq.n 8003594 <HAL_RCC_GetSysClockFreq+0x8c>
|
||
{
|
||
#if defined(RCC_CFGR2_PREDIV1)
|
||
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
|
||
#else
|
||
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
|
||
800356c: 4b13 ldr r3, [pc, #76] ; (80035bc <HAL_RCC_GetSysClockFreq+0xb4>)
|
||
800356e: 685b ldr r3, [r3, #4]
|
||
8003570: 0c5b lsrs r3, r3, #17
|
||
8003572: f003 0301 and.w r3, r3, #1
|
||
8003576: f107 0228 add.w r2, r7, #40 ; 0x28
|
||
800357a: 4413 add r3, r2
|
||
800357c: f813 3c28 ldrb.w r3, [r3, #-40]
|
||
8003580: 61bb str r3, [r7, #24]
|
||
{
|
||
pllclk = pllclk / 2;
|
||
}
|
||
#else
|
||
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
|
||
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
|
||
8003582: 697b ldr r3, [r7, #20]
|
||
8003584: 4a0e ldr r2, [pc, #56] ; (80035c0 <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
8003586: fb02 f203 mul.w r2, r2, r3
|
||
800358a: 69bb ldr r3, [r7, #24]
|
||
800358c: fbb2 f3f3 udiv r3, r2, r3
|
||
8003590: 627b str r3, [r7, #36] ; 0x24
|
||
8003592: e004 b.n 800359e <HAL_RCC_GetSysClockFreq+0x96>
|
||
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
||
}
|
||
else
|
||
{
|
||
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
|
||
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
|
||
8003594: 697b ldr r3, [r7, #20]
|
||
8003596: 4a0b ldr r2, [pc, #44] ; (80035c4 <HAL_RCC_GetSysClockFreq+0xbc>)
|
||
8003598: fb02 f303 mul.w r3, r2, r3
|
||
800359c: 627b str r3, [r7, #36] ; 0x24
|
||
}
|
||
sysclockfreq = pllclk;
|
||
800359e: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80035a0: 623b str r3, [r7, #32]
|
||
break;
|
||
80035a2: e002 b.n 80035aa <HAL_RCC_GetSysClockFreq+0xa2>
|
||
}
|
||
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
|
||
default: /* HSI used as system clock */
|
||
{
|
||
sysclockfreq = HSI_VALUE;
|
||
80035a4: 4b06 ldr r3, [pc, #24] ; (80035c0 <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
80035a6: 623b str r3, [r7, #32]
|
||
break;
|
||
80035a8: bf00 nop
|
||
}
|
||
}
|
||
return sysclockfreq;
|
||
80035aa: 6a3b ldr r3, [r7, #32]
|
||
}
|
||
80035ac: 4618 mov r0, r3
|
||
80035ae: 3728 adds r7, #40 ; 0x28
|
||
80035b0: 46bd mov sp, r7
|
||
80035b2: bc90 pop {r4, r7}
|
||
80035b4: 4770 bx lr
|
||
80035b6: bf00 nop
|
||
80035b8: 080082d0 .word 0x080082d0
|
||
80035bc: 40021000 .word 0x40021000
|
||
80035c0: 007a1200 .word 0x007a1200
|
||
80035c4: 003d0900 .word 0x003d0900
|
||
|
||
080035c8 <HAL_RCC_GetHCLKFreq>:
|
||
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
|
||
* and updated within this function
|
||
* @retval HCLK frequency
|
||
*/
|
||
uint32_t HAL_RCC_GetHCLKFreq(void)
|
||
{
|
||
80035c8: b480 push {r7}
|
||
80035ca: af00 add r7, sp, #0
|
||
return SystemCoreClock;
|
||
80035cc: 4b02 ldr r3, [pc, #8] ; (80035d8 <HAL_RCC_GetHCLKFreq+0x10>)
|
||
80035ce: 681b ldr r3, [r3, #0]
|
||
}
|
||
80035d0: 4618 mov r0, r3
|
||
80035d2: 46bd mov sp, r7
|
||
80035d4: bc80 pop {r7}
|
||
80035d6: 4770 bx lr
|
||
80035d8: 20000000 .word 0x20000000
|
||
|
||
080035dc <HAL_RCC_GetPCLK1Freq>:
|
||
* @note Each time PCLK1 changes, this function must be called to update the
|
||
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
|
||
* @retval PCLK1 frequency
|
||
*/
|
||
uint32_t HAL_RCC_GetPCLK1Freq(void)
|
||
{
|
||
80035dc: b580 push {r7, lr}
|
||
80035de: af00 add r7, sp, #0
|
||
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
|
||
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
|
||
80035e0: f7ff fff2 bl 80035c8 <HAL_RCC_GetHCLKFreq>
|
||
80035e4: 4602 mov r2, r0
|
||
80035e6: 4b05 ldr r3, [pc, #20] ; (80035fc <HAL_RCC_GetPCLK1Freq+0x20>)
|
||
80035e8: 685b ldr r3, [r3, #4]
|
||
80035ea: 0a1b lsrs r3, r3, #8
|
||
80035ec: f003 0307 and.w r3, r3, #7
|
||
80035f0: 4903 ldr r1, [pc, #12] ; (8003600 <HAL_RCC_GetPCLK1Freq+0x24>)
|
||
80035f2: 5ccb ldrb r3, [r1, r3]
|
||
80035f4: fa22 f303 lsr.w r3, r2, r3
|
||
}
|
||
80035f8: 4618 mov r0, r3
|
||
80035fa: bd80 pop {r7, pc}
|
||
80035fc: 40021000 .word 0x40021000
|
||
8003600: 080083c8 .word 0x080083c8
|
||
|
||
08003604 <RCC_Delay>:
|
||
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
|
||
* @param mdelay: specifies the delay time length, in milliseconds.
|
||
* @retval None
|
||
*/
|
||
static void RCC_Delay(uint32_t mdelay)
|
||
{
|
||
8003604: b480 push {r7}
|
||
8003606: b085 sub sp, #20
|
||
8003608: af00 add r7, sp, #0
|
||
800360a: 6078 str r0, [r7, #4]
|
||
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
|
||
800360c: 4b0a ldr r3, [pc, #40] ; (8003638 <RCC_Delay+0x34>)
|
||
800360e: 681b ldr r3, [r3, #0]
|
||
8003610: 4a0a ldr r2, [pc, #40] ; (800363c <RCC_Delay+0x38>)
|
||
8003612: fba2 2303 umull r2, r3, r2, r3
|
||
8003616: 0a5b lsrs r3, r3, #9
|
||
8003618: 687a ldr r2, [r7, #4]
|
||
800361a: fb02 f303 mul.w r3, r2, r3
|
||
800361e: 60fb str r3, [r7, #12]
|
||
do
|
||
{
|
||
__NOP();
|
||
8003620: bf00 nop
|
||
}
|
||
while (Delay --);
|
||
8003622: 68fb ldr r3, [r7, #12]
|
||
8003624: 1e5a subs r2, r3, #1
|
||
8003626: 60fa str r2, [r7, #12]
|
||
8003628: 2b00 cmp r3, #0
|
||
800362a: d1f9 bne.n 8003620 <RCC_Delay+0x1c>
|
||
}
|
||
800362c: bf00 nop
|
||
800362e: bf00 nop
|
||
8003630: 3714 adds r7, #20
|
||
8003632: 46bd mov sp, r7
|
||
8003634: bc80 pop {r7}
|
||
8003636: 4770 bx lr
|
||
8003638: 20000000 .word 0x20000000
|
||
800363c: 10624dd3 .word 0x10624dd3
|
||
|
||
08003640 <HAL_SRAM_Init>:
|
||
* @param ExtTiming Pointer to SRAM extended mode timing structure
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing,
|
||
FSMC_NORSRAM_TimingTypeDef *ExtTiming)
|
||
{
|
||
8003640: b580 push {r7, lr}
|
||
8003642: b084 sub sp, #16
|
||
8003644: af00 add r7, sp, #0
|
||
8003646: 60f8 str r0, [r7, #12]
|
||
8003648: 60b9 str r1, [r7, #8]
|
||
800364a: 607a str r2, [r7, #4]
|
||
/* Check the SRAM handle parameter */
|
||
if ((hsram == NULL) || (hsram->Init.BurstAccessMode == FSMC_BURST_ACCESS_MODE_ENABLE))
|
||
800364c: 68fb ldr r3, [r7, #12]
|
||
800364e: 2b00 cmp r3, #0
|
||
8003650: d004 beq.n 800365c <HAL_SRAM_Init+0x1c>
|
||
8003652: 68fb ldr r3, [r7, #12]
|
||
8003654: 699b ldr r3, [r3, #24]
|
||
8003656: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
800365a: d101 bne.n 8003660 <HAL_SRAM_Init+0x20>
|
||
{
|
||
return HAL_ERROR;
|
||
800365c: 2301 movs r3, #1
|
||
800365e: e038 b.n 80036d2 <HAL_SRAM_Init+0x92>
|
||
}
|
||
|
||
if (hsram->State == HAL_SRAM_STATE_RESET)
|
||
8003660: 68fb ldr r3, [r7, #12]
|
||
8003662: f893 3041 ldrb.w r3, [r3, #65] ; 0x41
|
||
8003666: b2db uxtb r3, r3
|
||
8003668: 2b00 cmp r3, #0
|
||
800366a: d106 bne.n 800367a <HAL_SRAM_Init+0x3a>
|
||
{
|
||
/* Allocate lock resource and initialize it */
|
||
hsram->Lock = HAL_UNLOCKED;
|
||
800366c: 68fb ldr r3, [r7, #12]
|
||
800366e: 2200 movs r2, #0
|
||
8003670: f883 2040 strb.w r2, [r3, #64] ; 0x40
|
||
|
||
/* Init the low level hardware */
|
||
hsram->MspInitCallback(hsram);
|
||
#else
|
||
/* Initialize the low level hardware (MSP) */
|
||
HAL_SRAM_MspInit(hsram);
|
||
8003674: 68f8 ldr r0, [r7, #12]
|
||
8003676: f7fd ff91 bl 800159c <HAL_SRAM_MspInit>
|
||
#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */
|
||
}
|
||
|
||
/* Initialize SRAM control Interface */
|
||
(void)FSMC_NORSRAM_Init(hsram->Instance, &(hsram->Init));
|
||
800367a: 68fb ldr r3, [r7, #12]
|
||
800367c: 681a ldr r2, [r3, #0]
|
||
800367e: 68fb ldr r3, [r7, #12]
|
||
8003680: 3308 adds r3, #8
|
||
8003682: 4619 mov r1, r3
|
||
8003684: 4610 mov r0, r2
|
||
8003686: f000 f829 bl 80036dc <FSMC_NORSRAM_Init>
|
||
|
||
/* Initialize SRAM timing Interface */
|
||
(void)FSMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank);
|
||
800368a: 68fb ldr r3, [r7, #12]
|
||
800368c: 6818 ldr r0, [r3, #0]
|
||
800368e: 68fb ldr r3, [r7, #12]
|
||
8003690: 689b ldr r3, [r3, #8]
|
||
8003692: 461a mov r2, r3
|
||
8003694: 68b9 ldr r1, [r7, #8]
|
||
8003696: f000 f88b bl 80037b0 <FSMC_NORSRAM_Timing_Init>
|
||
|
||
/* Initialize SRAM extended mode timing Interface */
|
||
(void)FSMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank,
|
||
800369a: 68fb ldr r3, [r7, #12]
|
||
800369c: 6858 ldr r0, [r3, #4]
|
||
800369e: 68fb ldr r3, [r7, #12]
|
||
80036a0: 689a ldr r2, [r3, #8]
|
||
80036a2: 68fb ldr r3, [r7, #12]
|
||
80036a4: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
80036a6: 6879 ldr r1, [r7, #4]
|
||
80036a8: f000 f8b6 bl 8003818 <FSMC_NORSRAM_Extended_Timing_Init>
|
||
hsram->Init.ExtendedMode);
|
||
|
||
/* Enable the NORSRAM device */
|
||
__FSMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
|
||
80036ac: 68fb ldr r3, [r7, #12]
|
||
80036ae: 681b ldr r3, [r3, #0]
|
||
80036b0: 68fa ldr r2, [r7, #12]
|
||
80036b2: 6892 ldr r2, [r2, #8]
|
||
80036b4: f853 1022 ldr.w r1, [r3, r2, lsl #2]
|
||
80036b8: 68fb ldr r3, [r7, #12]
|
||
80036ba: 681b ldr r3, [r3, #0]
|
||
80036bc: 68fa ldr r2, [r7, #12]
|
||
80036be: 6892 ldr r2, [r2, #8]
|
||
80036c0: f041 0101 orr.w r1, r1, #1
|
||
80036c4: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
/* Initialize the SRAM controller state */
|
||
hsram->State = HAL_SRAM_STATE_READY;
|
||
80036c8: 68fb ldr r3, [r7, #12]
|
||
80036ca: 2201 movs r2, #1
|
||
80036cc: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
||
|
||
return HAL_OK;
|
||
80036d0: 2300 movs r3, #0
|
||
}
|
||
80036d2: 4618 mov r0, r3
|
||
80036d4: 3710 adds r7, #16
|
||
80036d6: 46bd mov sp, r7
|
||
80036d8: bd80 pop {r7, pc}
|
||
...
|
||
|
||
080036dc <FSMC_NORSRAM_Init>:
|
||
* @param Init Pointer to NORSRAM Initialization structure
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device,
|
||
FSMC_NORSRAM_InitTypeDef *Init)
|
||
{
|
||
80036dc: b480 push {r7}
|
||
80036de: b087 sub sp, #28
|
||
80036e0: af00 add r7, sp, #0
|
||
80036e2: 6078 str r0, [r7, #4]
|
||
80036e4: 6039 str r1, [r7, #0]
|
||
assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait));
|
||
assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst));
|
||
assert_param(IS_FSMC_PAGESIZE(Init->PageSize));
|
||
|
||
/* Disable NORSRAM Device */
|
||
__FSMC_NORSRAM_DISABLE(Device, Init->NSBank);
|
||
80036e6: 683b ldr r3, [r7, #0]
|
||
80036e8: 681a ldr r2, [r3, #0]
|
||
80036ea: 687b ldr r3, [r7, #4]
|
||
80036ec: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
||
80036f0: 683a ldr r2, [r7, #0]
|
||
80036f2: 6812 ldr r2, [r2, #0]
|
||
80036f4: f023 0101 bic.w r1, r3, #1
|
||
80036f8: 687b ldr r3, [r7, #4]
|
||
80036fa: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
/* Set NORSRAM device control parameters */
|
||
if (Init->MemoryType == FSMC_MEMORY_TYPE_NOR)
|
||
80036fe: 683b ldr r3, [r7, #0]
|
||
8003700: 689b ldr r3, [r3, #8]
|
||
8003702: 2b08 cmp r3, #8
|
||
8003704: d102 bne.n 800370c <FSMC_NORSRAM_Init+0x30>
|
||
{
|
||
flashaccess = FSMC_NORSRAM_FLASH_ACCESS_ENABLE;
|
||
8003706: 2340 movs r3, #64 ; 0x40
|
||
8003708: 617b str r3, [r7, #20]
|
||
800370a: e001 b.n 8003710 <FSMC_NORSRAM_Init+0x34>
|
||
}
|
||
else
|
||
{
|
||
flashaccess = FSMC_NORSRAM_FLASH_ACCESS_DISABLE;
|
||
800370c: 2300 movs r3, #0
|
||
800370e: 617b str r3, [r7, #20]
|
||
}
|
||
|
||
btcr_reg = (flashaccess | \
|
||
Init->DataAddressMux | \
|
||
8003710: 683b ldr r3, [r7, #0]
|
||
8003712: 685a ldr r2, [r3, #4]
|
||
btcr_reg = (flashaccess | \
|
||
8003714: 697b ldr r3, [r7, #20]
|
||
8003716: 431a orrs r2, r3
|
||
Init->MemoryType | \
|
||
8003718: 683b ldr r3, [r7, #0]
|
||
800371a: 689b ldr r3, [r3, #8]
|
||
Init->DataAddressMux | \
|
||
800371c: 431a orrs r2, r3
|
||
Init->MemoryDataWidth | \
|
||
800371e: 683b ldr r3, [r7, #0]
|
||
8003720: 68db ldr r3, [r3, #12]
|
||
Init->MemoryType | \
|
||
8003722: 431a orrs r2, r3
|
||
Init->BurstAccessMode | \
|
||
8003724: 683b ldr r3, [r7, #0]
|
||
8003726: 691b ldr r3, [r3, #16]
|
||
Init->MemoryDataWidth | \
|
||
8003728: 431a orrs r2, r3
|
||
Init->WaitSignalPolarity | \
|
||
800372a: 683b ldr r3, [r7, #0]
|
||
800372c: 695b ldr r3, [r3, #20]
|
||
Init->BurstAccessMode | \
|
||
800372e: 431a orrs r2, r3
|
||
Init->WaitSignalActive | \
|
||
8003730: 683b ldr r3, [r7, #0]
|
||
8003732: 69db ldr r3, [r3, #28]
|
||
Init->WaitSignalPolarity | \
|
||
8003734: 431a orrs r2, r3
|
||
Init->WriteOperation | \
|
||
8003736: 683b ldr r3, [r7, #0]
|
||
8003738: 6a1b ldr r3, [r3, #32]
|
||
Init->WaitSignalActive | \
|
||
800373a: 431a orrs r2, r3
|
||
Init->WaitSignal | \
|
||
800373c: 683b ldr r3, [r7, #0]
|
||
800373e: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
Init->WriteOperation | \
|
||
8003740: 431a orrs r2, r3
|
||
Init->ExtendedMode | \
|
||
8003742: 683b ldr r3, [r7, #0]
|
||
8003744: 6a9b ldr r3, [r3, #40] ; 0x28
|
||
Init->WaitSignal | \
|
||
8003746: 431a orrs r2, r3
|
||
Init->AsynchronousWait | \
|
||
8003748: 683b ldr r3, [r7, #0]
|
||
800374a: 6adb ldr r3, [r3, #44] ; 0x2c
|
||
Init->ExtendedMode | \
|
||
800374c: 431a orrs r2, r3
|
||
Init->WriteBurst);
|
||
800374e: 683b ldr r3, [r7, #0]
|
||
8003750: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
btcr_reg = (flashaccess | \
|
||
8003752: 4313 orrs r3, r2
|
||
8003754: 613b str r3, [r7, #16]
|
||
|
||
btcr_reg |= Init->WrapMode;
|
||
8003756: 683b ldr r3, [r7, #0]
|
||
8003758: 699b ldr r3, [r3, #24]
|
||
800375a: 693a ldr r2, [r7, #16]
|
||
800375c: 4313 orrs r3, r2
|
||
800375e: 613b str r3, [r7, #16]
|
||
btcr_reg |= Init->PageSize;
|
||
8003760: 683b ldr r3, [r7, #0]
|
||
8003762: 6b5b ldr r3, [r3, #52] ; 0x34
|
||
8003764: 693a ldr r2, [r7, #16]
|
||
8003766: 4313 orrs r3, r2
|
||
8003768: 613b str r3, [r7, #16]
|
||
|
||
mask = (FSMC_BCRx_MBKEN |
|
||
800376a: 4b10 ldr r3, [pc, #64] ; (80037ac <FSMC_NORSRAM_Init+0xd0>)
|
||
800376c: 60fb str r3, [r7, #12]
|
||
FSMC_BCRx_WAITEN |
|
||
FSMC_BCRx_EXTMOD |
|
||
FSMC_BCRx_ASYNCWAIT |
|
||
FSMC_BCRx_CBURSTRW);
|
||
|
||
mask |= FSMC_BCRx_WRAPMOD;
|
||
800376e: 68fb ldr r3, [r7, #12]
|
||
8003770: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
||
8003774: 60fb str r3, [r7, #12]
|
||
mask |= 0x00070000U; /* CPSIZE to be defined in CMSIS file */
|
||
8003776: 68fb ldr r3, [r7, #12]
|
||
8003778: f443 23e0 orr.w r3, r3, #458752 ; 0x70000
|
||
800377c: 60fb str r3, [r7, #12]
|
||
|
||
MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg);
|
||
800377e: 683b ldr r3, [r7, #0]
|
||
8003780: 681a ldr r2, [r3, #0]
|
||
8003782: 687b ldr r3, [r7, #4]
|
||
8003784: f853 2022 ldr.w r2, [r3, r2, lsl #2]
|
||
8003788: 68fb ldr r3, [r7, #12]
|
||
800378a: 43db mvns r3, r3
|
||
800378c: ea02 0103 and.w r1, r2, r3
|
||
8003790: 683b ldr r3, [r7, #0]
|
||
8003792: 681a ldr r2, [r3, #0]
|
||
8003794: 693b ldr r3, [r7, #16]
|
||
8003796: 4319 orrs r1, r3
|
||
8003798: 687b ldr r3, [r7, #4]
|
||
800379a: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
|
||
return HAL_OK;
|
||
800379e: 2300 movs r3, #0
|
||
}
|
||
80037a0: 4618 mov r0, r3
|
||
80037a2: 371c adds r7, #28
|
||
80037a4: 46bd mov sp, r7
|
||
80037a6: bc80 pop {r7}
|
||
80037a8: 4770 bx lr
|
||
80037aa: bf00 nop
|
||
80037ac: 0008fb7f .word 0x0008fb7f
|
||
|
||
080037b0 <FSMC_NORSRAM_Timing_Init>:
|
||
* @param Bank NORSRAM bank number
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device,
|
||
FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)
|
||
{
|
||
80037b0: b480 push {r7}
|
||
80037b2: b085 sub sp, #20
|
||
80037b4: af00 add r7, sp, #0
|
||
80037b6: 60f8 str r0, [r7, #12]
|
||
80037b8: 60b9 str r1, [r7, #8]
|
||
80037ba: 607a str r2, [r7, #4]
|
||
assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency));
|
||
assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
|
||
assert_param(IS_FSMC_NORSRAM_BANK(Bank));
|
||
|
||
/* Set FSMC_NORSRAM device timing parameters */
|
||
MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime |
|
||
80037bc: 687b ldr r3, [r7, #4]
|
||
80037be: 1c5a adds r2, r3, #1
|
||
80037c0: 68fb ldr r3, [r7, #12]
|
||
80037c2: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
||
80037c6: f003 4140 and.w r1, r3, #3221225472 ; 0xc0000000
|
||
80037ca: 68bb ldr r3, [r7, #8]
|
||
80037cc: 681a ldr r2, [r3, #0]
|
||
80037ce: 68bb ldr r3, [r7, #8]
|
||
80037d0: 685b ldr r3, [r3, #4]
|
||
80037d2: 011b lsls r3, r3, #4
|
||
80037d4: 431a orrs r2, r3
|
||
80037d6: 68bb ldr r3, [r7, #8]
|
||
80037d8: 689b ldr r3, [r3, #8]
|
||
80037da: 021b lsls r3, r3, #8
|
||
80037dc: 431a orrs r2, r3
|
||
80037de: 68bb ldr r3, [r7, #8]
|
||
80037e0: 68db ldr r3, [r3, #12]
|
||
80037e2: 041b lsls r3, r3, #16
|
||
80037e4: 431a orrs r2, r3
|
||
80037e6: 68bb ldr r3, [r7, #8]
|
||
80037e8: 691b ldr r3, [r3, #16]
|
||
80037ea: 3b01 subs r3, #1
|
||
80037ec: 051b lsls r3, r3, #20
|
||
80037ee: 431a orrs r2, r3
|
||
80037f0: 68bb ldr r3, [r7, #8]
|
||
80037f2: 695b ldr r3, [r3, #20]
|
||
80037f4: 3b02 subs r3, #2
|
||
80037f6: 061b lsls r3, r3, #24
|
||
80037f8: 431a orrs r2, r3
|
||
80037fa: 68bb ldr r3, [r7, #8]
|
||
80037fc: 699b ldr r3, [r3, #24]
|
||
80037fe: 4313 orrs r3, r2
|
||
8003800: 687a ldr r2, [r7, #4]
|
||
8003802: 3201 adds r2, #1
|
||
8003804: 4319 orrs r1, r3
|
||
8003806: 68fb ldr r3, [r7, #12]
|
||
8003808: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
((Timing->BusTurnAroundDuration) << FSMC_BTRx_BUSTURN_Pos) |
|
||
(((Timing->CLKDivision) - 1U) << FSMC_BTRx_CLKDIV_Pos) |
|
||
(((Timing->DataLatency) - 2U) << FSMC_BTRx_DATLAT_Pos) |
|
||
(Timing->AccessMode)));
|
||
|
||
return HAL_OK;
|
||
800380c: 2300 movs r3, #0
|
||
}
|
||
800380e: 4618 mov r0, r3
|
||
8003810: 3714 adds r7, #20
|
||
8003812: 46bd mov sp, r7
|
||
8003814: bc80 pop {r7}
|
||
8003816: 4770 bx lr
|
||
|
||
08003818 <FSMC_NORSRAM_Extended_Timing_Init>:
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device,
|
||
FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank,
|
||
uint32_t ExtendedMode)
|
||
{
|
||
8003818: b480 push {r7}
|
||
800381a: b085 sub sp, #20
|
||
800381c: af00 add r7, sp, #0
|
||
800381e: 60f8 str r0, [r7, #12]
|
||
8003820: 60b9 str r1, [r7, #8]
|
||
8003822: 607a str r2, [r7, #4]
|
||
8003824: 603b str r3, [r7, #0]
|
||
/* Check the parameters */
|
||
assert_param(IS_FSMC_EXTENDED_MODE(ExtendedMode));
|
||
|
||
/* Set NORSRAM device timing register for write configuration, if extended mode is used */
|
||
if (ExtendedMode == FSMC_EXTENDED_MODE_ENABLE)
|
||
8003826: 683b ldr r3, [r7, #0]
|
||
8003828: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
|
||
800382c: d11d bne.n 800386a <FSMC_NORSRAM_Extended_Timing_Init+0x52>
|
||
assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
|
||
assert_param(IS_FSMC_NORSRAM_BANK(Bank));
|
||
|
||
/* Set NORSRAM device timing register for write configuration, if extended mode is used */
|
||
#if defined(FSMC_BWTRx_BUSTURN)
|
||
MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime |
|
||
800382e: 68fb ldr r3, [r7, #12]
|
||
8003830: 687a ldr r2, [r7, #4]
|
||
8003832: f853 2022 ldr.w r2, [r3, r2, lsl #2]
|
||
8003836: 4b13 ldr r3, [pc, #76] ; (8003884 <FSMC_NORSRAM_Extended_Timing_Init+0x6c>)
|
||
8003838: 4013 ands r3, r2
|
||
800383a: 68ba ldr r2, [r7, #8]
|
||
800383c: 6811 ldr r1, [r2, #0]
|
||
800383e: 68ba ldr r2, [r7, #8]
|
||
8003840: 6852 ldr r2, [r2, #4]
|
||
8003842: 0112 lsls r2, r2, #4
|
||
8003844: 4311 orrs r1, r2
|
||
8003846: 68ba ldr r2, [r7, #8]
|
||
8003848: 6892 ldr r2, [r2, #8]
|
||
800384a: 0212 lsls r2, r2, #8
|
||
800384c: 4311 orrs r1, r2
|
||
800384e: 68ba ldr r2, [r7, #8]
|
||
8003850: 6992 ldr r2, [r2, #24]
|
||
8003852: 4311 orrs r1, r2
|
||
8003854: 68ba ldr r2, [r7, #8]
|
||
8003856: 68d2 ldr r2, [r2, #12]
|
||
8003858: 0412 lsls r2, r2, #16
|
||
800385a: 430a orrs r2, r1
|
||
800385c: ea43 0102 orr.w r1, r3, r2
|
||
8003860: 68fb ldr r3, [r7, #12]
|
||
8003862: 687a ldr r2, [r7, #4]
|
||
8003864: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
8003868: e005 b.n 8003876 <FSMC_NORSRAM_Extended_Timing_Init+0x5e>
|
||
(((Timing->DataLatency) - 2U) << FSMC_BWTRx_DATLAT_Pos)));
|
||
#endif /* FSMC_BWTRx_BUSTURN */
|
||
}
|
||
else
|
||
{
|
||
Device->BWTR[Bank] = 0x0FFFFFFFU;
|
||
800386a: 68fb ldr r3, [r7, #12]
|
||
800386c: 687a ldr r2, [r7, #4]
|
||
800386e: f06f 4170 mvn.w r1, #4026531840 ; 0xf0000000
|
||
8003872: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
}
|
||
|
||
return HAL_OK;
|
||
8003876: 2300 movs r3, #0
|
||
}
|
||
8003878: 4618 mov r0, r3
|
||
800387a: 3714 adds r7, #20
|
||
800387c: 46bd mov sp, r7
|
||
800387e: bc80 pop {r7}
|
||
8003880: 4770 bx lr
|
||
8003882: bf00 nop
|
||
8003884: cff00000 .word 0xcff00000
|
||
|
||
08003888 <LCD_WR_REG>:
|
||
_lcd_dev lcddev; //����LCD��Ҫ����
|
||
//**************************************************���ֿ��ٽӿ�
|
||
//д�Ĵ�������
|
||
//regval:�Ĵ���ֵ
|
||
void LCD_WR_REG(uint16_t regval)
|
||
{
|
||
8003888: b480 push {r7}
|
||
800388a: b083 sub sp, #12
|
||
800388c: af00 add r7, sp, #0
|
||
800388e: 4603 mov r3, r0
|
||
8003890: 80fb strh r3, [r7, #6]
|
||
LCD_REG_ADDRESS=regval;//д��Ҫд�ļĴ�������
|
||
8003892: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
8003896: 88fb ldrh r3, [r7, #6]
|
||
8003898: 8013 strh r3, [r2, #0]
|
||
}
|
||
800389a: bf00 nop
|
||
800389c: 370c adds r7, #12
|
||
800389e: 46bd mov sp, r7
|
||
80038a0: bc80 pop {r7}
|
||
80038a2: 4770 bx lr
|
||
|
||
080038a4 <LCD_WR_DATA>:
|
||
//дLCD����
|
||
//data:Ҫд����ֵ
|
||
void LCD_WR_DATA(uint16_t data)
|
||
{
|
||
80038a4: b480 push {r7}
|
||
80038a6: b083 sub sp, #12
|
||
80038a8: af00 add r7, sp, #0
|
||
80038aa: 4603 mov r3, r0
|
||
80038ac: 80fb strh r3, [r7, #6]
|
||
LCD_DATA_ADDRESS=data;
|
||
80038ae: 4a04 ldr r2, [pc, #16] ; (80038c0 <LCD_WR_DATA+0x1c>)
|
||
80038b0: 88fb ldrh r3, [r7, #6]
|
||
80038b2: 8013 strh r3, [r2, #0]
|
||
}
|
||
80038b4: bf00 nop
|
||
80038b6: 370c adds r7, #12
|
||
80038b8: 46bd mov sp, r7
|
||
80038ba: bc80 pop {r7}
|
||
80038bc: 4770 bx lr
|
||
80038be: bf00 nop
|
||
80038c0: 6c000800 .word 0x6c000800
|
||
|
||
080038c4 <LCD_WriteReg>:
|
||
}
|
||
//д�Ĵ���
|
||
//LCD_Reg:�Ĵ�����ַ
|
||
//LCD_RegValue:Ҫд��������
|
||
void LCD_WriteReg(uint16_t LCD_Reg, uint16_t LCD_RegValue)
|
||
{
|
||
80038c4: b480 push {r7}
|
||
80038c6: b083 sub sp, #12
|
||
80038c8: af00 add r7, sp, #0
|
||
80038ca: 4603 mov r3, r0
|
||
80038cc: 460a mov r2, r1
|
||
80038ce: 80fb strh r3, [r7, #6]
|
||
80038d0: 4613 mov r3, r2
|
||
80038d2: 80bb strh r3, [r7, #4]
|
||
LCD_REG_ADDRESS = LCD_Reg; //д��Ҫд�ļĴ�������
|
||
80038d4: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
80038d8: 88fb ldrh r3, [r7, #6]
|
||
80038da: 8013 strh r3, [r2, #0]
|
||
LCD_DATA_ADDRESS = LCD_RegValue;//�����
|
||
80038dc: 4a03 ldr r2, [pc, #12] ; (80038ec <LCD_WriteReg+0x28>)
|
||
80038de: 88bb ldrh r3, [r7, #4]
|
||
80038e0: 8013 strh r3, [r2, #0]
|
||
}
|
||
80038e2: bf00 nop
|
||
80038e4: 370c adds r7, #12
|
||
80038e6: 46bd mov sp, r7
|
||
80038e8: bc80 pop {r7}
|
||
80038ea: 4770 bx lr
|
||
80038ec: 6c000800 .word 0x6c000800
|
||
|
||
080038f0 <LCD_ReadReg>:
|
||
//���Ĵ���
|
||
//LCD_Reg:�Ĵ�����ַ
|
||
//����ֵ:����������
|
||
uint16_t LCD_ReadReg(uint16_t LCD_Reg)
|
||
{
|
||
80038f0: b480 push {r7}
|
||
80038f2: b083 sub sp, #12
|
||
80038f4: af00 add r7, sp, #0
|
||
80038f6: 4603 mov r3, r0
|
||
80038f8: 80fb strh r3, [r7, #6]
|
||
LCD_REG_ADDRESS=LCD_Reg; //д��Ҫ���ļĴ�������
|
||
80038fa: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
80038fe: 88fb ldrh r3, [r7, #6]
|
||
8003900: 8013 strh r3, [r2, #0]
|
||
//delay_us(5);
|
||
return LCD_DATA_ADDRESS; //���ض�����ֵ
|
||
8003902: 4b04 ldr r3, [pc, #16] ; (8003914 <LCD_ReadReg+0x24>)
|
||
8003904: 881b ldrh r3, [r3, #0]
|
||
8003906: b29b uxth r3, r3
|
||
}
|
||
8003908: 4618 mov r0, r3
|
||
800390a: 370c adds r7, #12
|
||
800390c: 46bd mov sp, r7
|
||
800390e: bc80 pop {r7}
|
||
8003910: 4770 bx lr
|
||
8003912: bf00 nop
|
||
8003914: 6c000800 .word 0x6c000800
|
||
|
||
08003918 <LCD_Scan_Dir>:
|
||
//ע��:�����������ܻ��ܵ��˺������õ�Ӱ��(������9341/6804����������),
|
||
//����,һ������ΪL2R_U2D����,��������Ϊ����ɨ�跽ʽ,���ܵ�����ʾ������.
|
||
//dir:0~7,����8������(���嶨����lcd.h)
|
||
//9320/9325/9328/4531/4535/1505/b505/8989/5408/9341/5310��IC�Ѿ�ʵ�ʲ���
|
||
void LCD_Scan_Dir(uint8_t dir)
|
||
{
|
||
8003918: b580 push {r7, lr}
|
||
800391a: b084 sub sp, #16
|
||
800391c: af00 add r7, sp, #0
|
||
800391e: 4603 mov r3, r0
|
||
8003920: 71fb strb r3, [r7, #7]
|
||
uint16_t regval=0;
|
||
8003922: 2300 movs r3, #0
|
||
8003924: 81fb strh r3, [r7, #14]
|
||
uint8_t dirreg=0;
|
||
8003926: 2300 movs r3, #0
|
||
8003928: 737b strb r3, [r7, #13]
|
||
uint16_t temp;
|
||
if(lcddev.dir==1&&lcddev.id!=0X6804)//����ʱ����6804���ı�ɨ�跽����
|
||
800392a: 4ba8 ldr r3, [pc, #672] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
800392c: 799b ldrb r3, [r3, #6]
|
||
800392e: 2b01 cmp r3, #1
|
||
8003930: d134 bne.n 800399c <LCD_Scan_Dir+0x84>
|
||
8003932: 4ba6 ldr r3, [pc, #664] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003934: 889b ldrh r3, [r3, #4]
|
||
8003936: f646 0204 movw r2, #26628 ; 0x6804
|
||
800393a: 4293 cmp r3, r2
|
||
800393c: d02e beq.n 800399c <LCD_Scan_Dir+0x84>
|
||
{
|
||
switch(dir)//����ת��
|
||
800393e: 79fb ldrb r3, [r7, #7]
|
||
8003940: 2b07 cmp r3, #7
|
||
8003942: d82c bhi.n 800399e <LCD_Scan_Dir+0x86>
|
||
8003944: a201 add r2, pc, #4 ; (adr r2, 800394c <LCD_Scan_Dir+0x34>)
|
||
8003946: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
800394a: bf00 nop
|
||
800394c: 0800396d .word 0x0800396d
|
||
8003950: 08003973 .word 0x08003973
|
||
8003954: 08003979 .word 0x08003979
|
||
8003958: 0800397f .word 0x0800397f
|
||
800395c: 08003985 .word 0x08003985
|
||
8003960: 0800398b .word 0x0800398b
|
||
8003964: 08003991 .word 0x08003991
|
||
8003968: 08003997 .word 0x08003997
|
||
{
|
||
case 0:dir=6;break;
|
||
800396c: 2306 movs r3, #6
|
||
800396e: 71fb strb r3, [r7, #7]
|
||
8003970: e015 b.n 800399e <LCD_Scan_Dir+0x86>
|
||
case 1:dir=7;break;
|
||
8003972: 2307 movs r3, #7
|
||
8003974: 71fb strb r3, [r7, #7]
|
||
8003976: e012 b.n 800399e <LCD_Scan_Dir+0x86>
|
||
case 2:dir=4;break;
|
||
8003978: 2304 movs r3, #4
|
||
800397a: 71fb strb r3, [r7, #7]
|
||
800397c: e00f b.n 800399e <LCD_Scan_Dir+0x86>
|
||
case 3:dir=5;break;
|
||
800397e: 2305 movs r3, #5
|
||
8003980: 71fb strb r3, [r7, #7]
|
||
8003982: e00c b.n 800399e <LCD_Scan_Dir+0x86>
|
||
case 4:dir=1;break;
|
||
8003984: 2301 movs r3, #1
|
||
8003986: 71fb strb r3, [r7, #7]
|
||
8003988: e009 b.n 800399e <LCD_Scan_Dir+0x86>
|
||
case 5:dir=0;break;
|
||
800398a: 2300 movs r3, #0
|
||
800398c: 71fb strb r3, [r7, #7]
|
||
800398e: e006 b.n 800399e <LCD_Scan_Dir+0x86>
|
||
case 6:dir=3;break;
|
||
8003990: 2303 movs r3, #3
|
||
8003992: 71fb strb r3, [r7, #7]
|
||
8003994: e003 b.n 800399e <LCD_Scan_Dir+0x86>
|
||
case 7:dir=2;break;
|
||
8003996: 2302 movs r3, #2
|
||
8003998: 71fb strb r3, [r7, #7]
|
||
800399a: e000 b.n 800399e <LCD_Scan_Dir+0x86>
|
||
}
|
||
}
|
||
800399c: bf00 nop
|
||
if(lcddev.id==0x9341||lcddev.id==0X6804||lcddev.id==0X5310)//9341/6804/5310,������
|
||
800399e: 4b8b ldr r3, [pc, #556] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
80039a0: 889b ldrh r3, [r3, #4]
|
||
80039a2: f249 3241 movw r2, #37697 ; 0x9341
|
||
80039a6: 4293 cmp r3, r2
|
||
80039a8: d00c beq.n 80039c4 <LCD_Scan_Dir+0xac>
|
||
80039aa: 4b88 ldr r3, [pc, #544] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
80039ac: 889b ldrh r3, [r3, #4]
|
||
80039ae: f646 0204 movw r2, #26628 ; 0x6804
|
||
80039b2: 4293 cmp r3, r2
|
||
80039b4: d006 beq.n 80039c4 <LCD_Scan_Dir+0xac>
|
||
80039b6: 4b85 ldr r3, [pc, #532] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
80039b8: 889b ldrh r3, [r3, #4]
|
||
80039ba: f245 3210 movw r2, #21264 ; 0x5310
|
||
80039be: 4293 cmp r3, r2
|
||
80039c0: f040 80bb bne.w 8003b3a <LCD_Scan_Dir+0x222>
|
||
{
|
||
switch(dir)
|
||
80039c4: 79fb ldrb r3, [r7, #7]
|
||
80039c6: 2b07 cmp r3, #7
|
||
80039c8: d835 bhi.n 8003a36 <LCD_Scan_Dir+0x11e>
|
||
80039ca: a201 add r2, pc, #4 ; (adr r2, 80039d0 <LCD_Scan_Dir+0xb8>)
|
||
80039cc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
80039d0: 08003a37 .word 0x08003a37
|
||
80039d4: 080039f1 .word 0x080039f1
|
||
80039d8: 080039fb .word 0x080039fb
|
||
80039dc: 08003a05 .word 0x08003a05
|
||
80039e0: 08003a0f .word 0x08003a0f
|
||
80039e4: 08003a19 .word 0x08003a19
|
||
80039e8: 08003a23 .word 0x08003a23
|
||
80039ec: 08003a2d .word 0x08003a2d
|
||
{
|
||
case L2R_U2D://��������,���ϵ���
|
||
regval|=(0<<7)|(0<<6)|(0<<5);
|
||
break;
|
||
case L2R_D2U://��������,���µ���
|
||
regval|=(1<<7)|(0<<6)|(0<<5);
|
||
80039f0: 89fb ldrh r3, [r7, #14]
|
||
80039f2: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
80039f6: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80039f8: e01d b.n 8003a36 <LCD_Scan_Dir+0x11e>
|
||
case R2L_U2D://���ҵ���,���ϵ���
|
||
regval|=(0<<7)|(1<<6)|(0<<5);
|
||
80039fa: 89fb ldrh r3, [r7, #14]
|
||
80039fc: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8003a00: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a02: e018 b.n 8003a36 <LCD_Scan_Dir+0x11e>
|
||
case R2L_D2U://���ҵ���,���µ���
|
||
regval|=(1<<7)|(1<<6)|(0<<5);
|
||
8003a04: 89fb ldrh r3, [r7, #14]
|
||
8003a06: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
||
8003a0a: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a0c: e013 b.n 8003a36 <LCD_Scan_Dir+0x11e>
|
||
case U2D_L2R://���ϵ���,��������
|
||
regval|=(0<<7)|(0<<6)|(1<<5);
|
||
8003a0e: 89fb ldrh r3, [r7, #14]
|
||
8003a10: f043 0320 orr.w r3, r3, #32
|
||
8003a14: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a16: e00e b.n 8003a36 <LCD_Scan_Dir+0x11e>
|
||
case U2D_R2L://���ϵ���,���ҵ���
|
||
regval|=(0<<7)|(1<<6)|(1<<5);
|
||
8003a18: 89fb ldrh r3, [r7, #14]
|
||
8003a1a: f043 0360 orr.w r3, r3, #96 ; 0x60
|
||
8003a1e: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a20: e009 b.n 8003a36 <LCD_Scan_Dir+0x11e>
|
||
case D2U_L2R://���µ���,��������
|
||
regval|=(1<<7)|(0<<6)|(1<<5);
|
||
8003a22: 89fb ldrh r3, [r7, #14]
|
||
8003a24: f043 03a0 orr.w r3, r3, #160 ; 0xa0
|
||
8003a28: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a2a: e004 b.n 8003a36 <LCD_Scan_Dir+0x11e>
|
||
case D2U_R2L://���µ���,���ҵ���
|
||
regval|=(1<<7)|(1<<6)|(1<<5);
|
||
8003a2c: 89fb ldrh r3, [r7, #14]
|
||
8003a2e: f043 03e0 orr.w r3, r3, #224 ; 0xe0
|
||
8003a32: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a34: bf00 nop
|
||
}
|
||
dirreg=0X36;
|
||
8003a36: 2336 movs r3, #54 ; 0x36
|
||
8003a38: 737b strb r3, [r7, #13]
|
||
if(lcddev.id!=0X5310)regval|=0X08;//5310����ҪBGR
|
||
8003a3a: 4b64 ldr r3, [pc, #400] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003a3c: 889b ldrh r3, [r3, #4]
|
||
8003a3e: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003a42: 4293 cmp r3, r2
|
||
8003a44: d003 beq.n 8003a4e <LCD_Scan_Dir+0x136>
|
||
8003a46: 89fb ldrh r3, [r7, #14]
|
||
8003a48: f043 0308 orr.w r3, r3, #8
|
||
8003a4c: 81fb strh r3, [r7, #14]
|
||
if(lcddev.id==0X6804)regval|=0x02;//6804��BIT6��9341�ķ���
|
||
8003a4e: 4b5f ldr r3, [pc, #380] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003a50: 889b ldrh r3, [r3, #4]
|
||
8003a52: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003a56: 4293 cmp r3, r2
|
||
8003a58: d103 bne.n 8003a62 <LCD_Scan_Dir+0x14a>
|
||
8003a5a: 89fb ldrh r3, [r7, #14]
|
||
8003a5c: f043 0302 orr.w r3, r3, #2
|
||
8003a60: 81fb strh r3, [r7, #14]
|
||
LCD_WriteReg(dirreg,regval);
|
||
8003a62: 7b7b ldrb r3, [r7, #13]
|
||
8003a64: b29b uxth r3, r3
|
||
8003a66: 89fa ldrh r2, [r7, #14]
|
||
8003a68: 4611 mov r1, r2
|
||
8003a6a: 4618 mov r0, r3
|
||
8003a6c: f7ff ff2a bl 80038c4 <LCD_WriteReg>
|
||
if((regval&0X20)||lcddev.dir==1)
|
||
8003a70: 89fb ldrh r3, [r7, #14]
|
||
8003a72: f003 0320 and.w r3, r3, #32
|
||
8003a76: 2b00 cmp r3, #0
|
||
8003a78: d103 bne.n 8003a82 <LCD_Scan_Dir+0x16a>
|
||
8003a7a: 4b54 ldr r3, [pc, #336] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003a7c: 799b ldrb r3, [r3, #6]
|
||
8003a7e: 2b01 cmp r3, #1
|
||
8003a80: d110 bne.n 8003aa4 <LCD_Scan_Dir+0x18c>
|
||
{
|
||
if(lcddev.width<lcddev.height)//����X,Y
|
||
8003a82: 4b52 ldr r3, [pc, #328] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003a84: 881a ldrh r2, [r3, #0]
|
||
8003a86: 4b51 ldr r3, [pc, #324] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003a88: 885b ldrh r3, [r3, #2]
|
||
8003a8a: 429a cmp r2, r3
|
||
8003a8c: d21a bcs.n 8003ac4 <LCD_Scan_Dir+0x1ac>
|
||
{
|
||
temp=lcddev.width;
|
||
8003a8e: 4b4f ldr r3, [pc, #316] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003a90: 881b ldrh r3, [r3, #0]
|
||
8003a92: 817b strh r3, [r7, #10]
|
||
lcddev.width=lcddev.height;
|
||
8003a94: 4b4d ldr r3, [pc, #308] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003a96: 885a ldrh r2, [r3, #2]
|
||
8003a98: 4b4c ldr r3, [pc, #304] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003a9a: 801a strh r2, [r3, #0]
|
||
lcddev.height=temp;
|
||
8003a9c: 4a4b ldr r2, [pc, #300] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003a9e: 897b ldrh r3, [r7, #10]
|
||
8003aa0: 8053 strh r3, [r2, #2]
|
||
if(lcddev.width<lcddev.height)//����X,Y
|
||
8003aa2: e00f b.n 8003ac4 <LCD_Scan_Dir+0x1ac>
|
||
}
|
||
}else
|
||
{
|
||
if(lcddev.width>lcddev.height)//����X,Y
|
||
8003aa4: 4b49 ldr r3, [pc, #292] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003aa6: 881a ldrh r2, [r3, #0]
|
||
8003aa8: 4b48 ldr r3, [pc, #288] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003aaa: 885b ldrh r3, [r3, #2]
|
||
8003aac: 429a cmp r2, r3
|
||
8003aae: d909 bls.n 8003ac4 <LCD_Scan_Dir+0x1ac>
|
||
{
|
||
temp=lcddev.width;
|
||
8003ab0: 4b46 ldr r3, [pc, #280] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003ab2: 881b ldrh r3, [r3, #0]
|
||
8003ab4: 817b strh r3, [r7, #10]
|
||
lcddev.width=lcddev.height;
|
||
8003ab6: 4b45 ldr r3, [pc, #276] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003ab8: 885a ldrh r2, [r3, #2]
|
||
8003aba: 4b44 ldr r3, [pc, #272] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003abc: 801a strh r2, [r3, #0]
|
||
lcddev.height=temp;
|
||
8003abe: 4a43 ldr r2, [pc, #268] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003ac0: 897b ldrh r3, [r7, #10]
|
||
8003ac2: 8053 strh r3, [r2, #2]
|
||
}
|
||
}
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
8003ac4: 4b41 ldr r3, [pc, #260] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003ac6: 7a1b ldrb r3, [r3, #8]
|
||
8003ac8: b29b uxth r3, r3
|
||
8003aca: 4618 mov r0, r3
|
||
8003acc: f7ff fedc bl 8003888 <LCD_WR_REG>
|
||
LCD_WR_DATA(0);LCD_WR_DATA(0);
|
||
8003ad0: 2000 movs r0, #0
|
||
8003ad2: f7ff fee7 bl 80038a4 <LCD_WR_DATA>
|
||
8003ad6: 2000 movs r0, #0
|
||
8003ad8: f7ff fee4 bl 80038a4 <LCD_WR_DATA>
|
||
LCD_WR_DATA((lcddev.width-1)>>8);LCD_WR_DATA((lcddev.width-1)&0XFF);
|
||
8003adc: 4b3b ldr r3, [pc, #236] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003ade: 881b ldrh r3, [r3, #0]
|
||
8003ae0: 3b01 subs r3, #1
|
||
8003ae2: 121b asrs r3, r3, #8
|
||
8003ae4: b29b uxth r3, r3
|
||
8003ae6: 4618 mov r0, r3
|
||
8003ae8: f7ff fedc bl 80038a4 <LCD_WR_DATA>
|
||
8003aec: 4b37 ldr r3, [pc, #220] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003aee: 881b ldrh r3, [r3, #0]
|
||
8003af0: 3b01 subs r3, #1
|
||
8003af2: b29b uxth r3, r3
|
||
8003af4: b2db uxtb r3, r3
|
||
8003af6: b29b uxth r3, r3
|
||
8003af8: 4618 mov r0, r3
|
||
8003afa: f7ff fed3 bl 80038a4 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8003afe: 4b33 ldr r3, [pc, #204] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003b00: 7a5b ldrb r3, [r3, #9]
|
||
8003b02: b29b uxth r3, r3
|
||
8003b04: 4618 mov r0, r3
|
||
8003b06: f7ff febf bl 8003888 <LCD_WR_REG>
|
||
LCD_WR_DATA(0);LCD_WR_DATA(0);
|
||
8003b0a: 2000 movs r0, #0
|
||
8003b0c: f7ff feca bl 80038a4 <LCD_WR_DATA>
|
||
8003b10: 2000 movs r0, #0
|
||
8003b12: f7ff fec7 bl 80038a4 <LCD_WR_DATA>
|
||
LCD_WR_DATA((lcddev.height-1)>>8);LCD_WR_DATA((lcddev.height-1)&0XFF);
|
||
8003b16: 4b2d ldr r3, [pc, #180] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003b18: 885b ldrh r3, [r3, #2]
|
||
8003b1a: 3b01 subs r3, #1
|
||
8003b1c: 121b asrs r3, r3, #8
|
||
8003b1e: b29b uxth r3, r3
|
||
8003b20: 4618 mov r0, r3
|
||
8003b22: f7ff febf bl 80038a4 <LCD_WR_DATA>
|
||
8003b26: 4b29 ldr r3, [pc, #164] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003b28: 885b ldrh r3, [r3, #2]
|
||
8003b2a: 3b01 subs r3, #1
|
||
8003b2c: b29b uxth r3, r3
|
||
8003b2e: b2db uxtb r3, r3
|
||
8003b30: b29b uxth r3, r3
|
||
8003b32: 4618 mov r0, r3
|
||
8003b34: f7ff feb6 bl 80038a4 <LCD_WR_DATA>
|
||
8003b38: e058 b.n 8003bec <LCD_Scan_Dir+0x2d4>
|
||
}else
|
||
{
|
||
switch(dir)
|
||
8003b3a: 79fb ldrb r3, [r7, #7]
|
||
8003b3c: 2b07 cmp r3, #7
|
||
8003b3e: d836 bhi.n 8003bae <LCD_Scan_Dir+0x296>
|
||
8003b40: a201 add r2, pc, #4 ; (adr r2, 8003b48 <LCD_Scan_Dir+0x230>)
|
||
8003b42: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
8003b46: bf00 nop
|
||
8003b48: 08003b69 .word 0x08003b69
|
||
8003b4c: 08003b73 .word 0x08003b73
|
||
8003b50: 08003b7d .word 0x08003b7d
|
||
8003b54: 08003baf .word 0x08003baf
|
||
8003b58: 08003b87 .word 0x08003b87
|
||
8003b5c: 08003b91 .word 0x08003b91
|
||
8003b60: 08003b9b .word 0x08003b9b
|
||
8003b64: 08003ba5 .word 0x08003ba5
|
||
{
|
||
case L2R_U2D://��������,���ϵ���
|
||
regval|=(1<<5)|(1<<4)|(0<<3);
|
||
8003b68: 89fb ldrh r3, [r7, #14]
|
||
8003b6a: f043 0330 orr.w r3, r3, #48 ; 0x30
|
||
8003b6e: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003b70: e01d b.n 8003bae <LCD_Scan_Dir+0x296>
|
||
case L2R_D2U://��������,���µ���
|
||
regval|=(0<<5)|(1<<4)|(0<<3);
|
||
8003b72: 89fb ldrh r3, [r7, #14]
|
||
8003b74: f043 0310 orr.w r3, r3, #16
|
||
8003b78: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003b7a: e018 b.n 8003bae <LCD_Scan_Dir+0x296>
|
||
case R2L_U2D://���ҵ���,���ϵ���
|
||
regval|=(1<<5)|(0<<4)|(0<<3);
|
||
8003b7c: 89fb ldrh r3, [r7, #14]
|
||
8003b7e: f043 0320 orr.w r3, r3, #32
|
||
8003b82: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003b84: e013 b.n 8003bae <LCD_Scan_Dir+0x296>
|
||
case R2L_D2U://���ҵ���,���µ���
|
||
regval|=(0<<5)|(0<<4)|(0<<3);
|
||
break;
|
||
case U2D_L2R://���ϵ���,��������
|
||
regval|=(1<<5)|(1<<4)|(1<<3);
|
||
8003b86: 89fb ldrh r3, [r7, #14]
|
||
8003b88: f043 0338 orr.w r3, r3, #56 ; 0x38
|
||
8003b8c: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003b8e: e00e b.n 8003bae <LCD_Scan_Dir+0x296>
|
||
case U2D_R2L://���ϵ���,���ҵ���
|
||
regval|=(1<<5)|(0<<4)|(1<<3);
|
||
8003b90: 89fb ldrh r3, [r7, #14]
|
||
8003b92: f043 0328 orr.w r3, r3, #40 ; 0x28
|
||
8003b96: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003b98: e009 b.n 8003bae <LCD_Scan_Dir+0x296>
|
||
case D2U_L2R://���µ���,��������
|
||
regval|=(0<<5)|(1<<4)|(1<<3);
|
||
8003b9a: 89fb ldrh r3, [r7, #14]
|
||
8003b9c: f043 0318 orr.w r3, r3, #24
|
||
8003ba0: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003ba2: e004 b.n 8003bae <LCD_Scan_Dir+0x296>
|
||
case D2U_R2L://���µ���,���ҵ���
|
||
regval|=(0<<5)|(0<<4)|(1<<3);
|
||
8003ba4: 89fb ldrh r3, [r7, #14]
|
||
8003ba6: f043 0308 orr.w r3, r3, #8
|
||
8003baa: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003bac: bf00 nop
|
||
}
|
||
if(lcddev.id==0x8989)//8989 IC
|
||
8003bae: 4b07 ldr r3, [pc, #28] ; (8003bcc <LCD_Scan_Dir+0x2b4>)
|
||
8003bb0: 889b ldrh r3, [r3, #4]
|
||
8003bb2: f648 1289 movw r2, #35209 ; 0x8989
|
||
8003bb6: 4293 cmp r3, r2
|
||
8003bb8: d10a bne.n 8003bd0 <LCD_Scan_Dir+0x2b8>
|
||
{
|
||
dirreg=0X11;
|
||
8003bba: 2311 movs r3, #17
|
||
8003bbc: 737b strb r3, [r7, #13]
|
||
regval|=0X6040; //65K
|
||
8003bbe: 89fb ldrh r3, [r7, #14]
|
||
8003bc0: f443 43c0 orr.w r3, r3, #24576 ; 0x6000
|
||
8003bc4: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8003bc8: 81fb strh r3, [r7, #14]
|
||
8003bca: e007 b.n 8003bdc <LCD_Scan_Dir+0x2c4>
|
||
8003bcc: 200002a8 .word 0x200002a8
|
||
}else//��������IC
|
||
{
|
||
dirreg=0X03;
|
||
8003bd0: 2303 movs r3, #3
|
||
8003bd2: 737b strb r3, [r7, #13]
|
||
regval|=1<<12;
|
||
8003bd4: 89fb ldrh r3, [r7, #14]
|
||
8003bd6: f443 5380 orr.w r3, r3, #4096 ; 0x1000
|
||
8003bda: 81fb strh r3, [r7, #14]
|
||
}
|
||
LCD_WriteReg(dirreg,regval);
|
||
8003bdc: 7b7b ldrb r3, [r7, #13]
|
||
8003bde: b29b uxth r3, r3
|
||
8003be0: 89fa ldrh r2, [r7, #14]
|
||
8003be2: 4611 mov r1, r2
|
||
8003be4: 4618 mov r0, r3
|
||
8003be6: f7ff fe6d bl 80038c4 <LCD_WriteReg>
|
||
}
|
||
}
|
||
8003bea: bf00 nop
|
||
8003bec: bf00 nop
|
||
8003bee: 3710 adds r7, #16
|
||
8003bf0: 46bd mov sp, r7
|
||
8003bf2: bd80 pop {r7, pc}
|
||
|
||
08003bf4 <LCD_Display_Dir>:
|
||
//����LCD��ʾ����
|
||
//dir:0,������1,����
|
||
void LCD_Display_Dir(uint8_t dir)
|
||
{
|
||
8003bf4: b580 push {r7, lr}
|
||
8003bf6: b082 sub sp, #8
|
||
8003bf8: af00 add r7, sp, #0
|
||
8003bfa: 4603 mov r3, r0
|
||
8003bfc: 71fb strb r3, [r7, #7]
|
||
if(dir==0) //����
|
||
8003bfe: 79fb ldrb r3, [r7, #7]
|
||
8003c00: 2b00 cmp r3, #0
|
||
8003c02: d154 bne.n 8003cae <LCD_Display_Dir+0xba>
|
||
{
|
||
lcddev.dir=0; //����
|
||
8003c04: 4b5d ldr r3, [pc, #372] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c06: 2200 movs r2, #0
|
||
8003c08: 719a strb r2, [r3, #6]
|
||
lcddev.width=240;
|
||
8003c0a: 4b5c ldr r3, [pc, #368] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c0c: 22f0 movs r2, #240 ; 0xf0
|
||
8003c0e: 801a strh r2, [r3, #0]
|
||
lcddev.height=320;
|
||
8003c10: 4b5a ldr r3, [pc, #360] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c12: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8003c16: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X9341||lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003c18: 4b58 ldr r3, [pc, #352] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c1a: 889b ldrh r3, [r3, #4]
|
||
8003c1c: f249 3241 movw r2, #37697 ; 0x9341
|
||
8003c20: 4293 cmp r3, r2
|
||
8003c22: d00b beq.n 8003c3c <LCD_Display_Dir+0x48>
|
||
8003c24: 4b55 ldr r3, [pc, #340] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c26: 889b ldrh r3, [r3, #4]
|
||
8003c28: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003c2c: 4293 cmp r3, r2
|
||
8003c2e: d005 beq.n 8003c3c <LCD_Display_Dir+0x48>
|
||
8003c30: 4b52 ldr r3, [pc, #328] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c32: 889b ldrh r3, [r3, #4]
|
||
8003c34: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003c38: 4293 cmp r3, r2
|
||
8003c3a: d11e bne.n 8003c7a <LCD_Display_Dir+0x86>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
8003c3c: 4b4f ldr r3, [pc, #316] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c3e: 222c movs r2, #44 ; 0x2c
|
||
8003c40: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2A;
|
||
8003c42: 4b4e ldr r3, [pc, #312] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c44: 222a movs r2, #42 ; 0x2a
|
||
8003c46: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
8003c48: 4b4c ldr r3, [pc, #304] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c4a: 222b movs r2, #43 ; 0x2b
|
||
8003c4c: 725a strb r2, [r3, #9]
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003c4e: 4b4b ldr r3, [pc, #300] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c50: 889b ldrh r3, [r3, #4]
|
||
8003c52: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003c56: 4293 cmp r3, r2
|
||
8003c58: d006 beq.n 8003c68 <LCD_Display_Dir+0x74>
|
||
8003c5a: 4b48 ldr r3, [pc, #288] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c5c: 889b ldrh r3, [r3, #4]
|
||
8003c5e: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003c62: 4293 cmp r3, r2
|
||
8003c64: f040 8081 bne.w 8003d6a <LCD_Display_Dir+0x176>
|
||
{
|
||
lcddev.width=320;
|
||
8003c68: 4b44 ldr r3, [pc, #272] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c6a: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8003c6e: 801a strh r2, [r3, #0]
|
||
lcddev.height=480;
|
||
8003c70: 4b42 ldr r3, [pc, #264] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c72: f44f 72f0 mov.w r2, #480 ; 0x1e0
|
||
8003c76: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003c78: e077 b.n 8003d6a <LCD_Display_Dir+0x176>
|
||
}
|
||
}else if(lcddev.id==0X8989)
|
||
8003c7a: 4b40 ldr r3, [pc, #256] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c7c: 889b ldrh r3, [r3, #4]
|
||
8003c7e: f648 1289 movw r2, #35209 ; 0x8989
|
||
8003c82: 4293 cmp r3, r2
|
||
8003c84: d109 bne.n 8003c9a <LCD_Display_Dir+0xa6>
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8003c86: 4b3d ldr r3, [pc, #244] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c88: 2222 movs r2, #34 ; 0x22
|
||
8003c8a: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X4E;
|
||
8003c8c: 4b3b ldr r3, [pc, #236] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c8e: 224e movs r2, #78 ; 0x4e
|
||
8003c90: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X4F;
|
||
8003c92: 4b3a ldr r3, [pc, #232] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c94: 224f movs r2, #79 ; 0x4f
|
||
8003c96: 725a strb r2, [r3, #9]
|
||
8003c98: e068 b.n 8003d6c <LCD_Display_Dir+0x178>
|
||
}else
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8003c9a: 4b38 ldr r3, [pc, #224] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003c9c: 2222 movs r2, #34 ; 0x22
|
||
8003c9e: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=R32;
|
||
8003ca0: 4b36 ldr r3, [pc, #216] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003ca2: 2220 movs r2, #32
|
||
8003ca4: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=R33;
|
||
8003ca6: 4b35 ldr r3, [pc, #212] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003ca8: 2221 movs r2, #33 ; 0x21
|
||
8003caa: 725a strb r2, [r3, #9]
|
||
8003cac: e05e b.n 8003d6c <LCD_Display_Dir+0x178>
|
||
}
|
||
}else //����
|
||
{
|
||
lcddev.dir=1; //����
|
||
8003cae: 4b33 ldr r3, [pc, #204] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003cb0: 2201 movs r2, #1
|
||
8003cb2: 719a strb r2, [r3, #6]
|
||
lcddev.width=320;
|
||
8003cb4: 4b31 ldr r3, [pc, #196] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003cb6: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8003cba: 801a strh r2, [r3, #0]
|
||
lcddev.height=240;
|
||
8003cbc: 4b2f ldr r3, [pc, #188] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003cbe: 22f0 movs r2, #240 ; 0xf0
|
||
8003cc0: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X9341||lcddev.id==0X5310)
|
||
8003cc2: 4b2e ldr r3, [pc, #184] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003cc4: 889b ldrh r3, [r3, #4]
|
||
8003cc6: f249 3241 movw r2, #37697 ; 0x9341
|
||
8003cca: 4293 cmp r3, r2
|
||
8003ccc: d005 beq.n 8003cda <LCD_Display_Dir+0xe6>
|
||
8003cce: 4b2b ldr r3, [pc, #172] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003cd0: 889b ldrh r3, [r3, #4]
|
||
8003cd2: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003cd6: 4293 cmp r3, r2
|
||
8003cd8: d109 bne.n 8003cee <LCD_Display_Dir+0xfa>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
8003cda: 4b28 ldr r3, [pc, #160] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003cdc: 222c movs r2, #44 ; 0x2c
|
||
8003cde: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2A;
|
||
8003ce0: 4b26 ldr r3, [pc, #152] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003ce2: 222a movs r2, #42 ; 0x2a
|
||
8003ce4: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
8003ce6: 4b25 ldr r3, [pc, #148] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003ce8: 222b movs r2, #43 ; 0x2b
|
||
8003cea: 725a strb r2, [r3, #9]
|
||
8003cec: e028 b.n 8003d40 <LCD_Display_Dir+0x14c>
|
||
}else if(lcddev.id==0X6804)
|
||
8003cee: 4b23 ldr r3, [pc, #140] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003cf0: 889b ldrh r3, [r3, #4]
|
||
8003cf2: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003cf6: 4293 cmp r3, r2
|
||
8003cf8: d109 bne.n 8003d0e <LCD_Display_Dir+0x11a>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
8003cfa: 4b20 ldr r3, [pc, #128] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003cfc: 222c movs r2, #44 ; 0x2c
|
||
8003cfe: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2B;
|
||
8003d00: 4b1e ldr r3, [pc, #120] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003d02: 222b movs r2, #43 ; 0x2b
|
||
8003d04: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2A;
|
||
8003d06: 4b1d ldr r3, [pc, #116] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003d08: 222a movs r2, #42 ; 0x2a
|
||
8003d0a: 725a strb r2, [r3, #9]
|
||
8003d0c: e018 b.n 8003d40 <LCD_Display_Dir+0x14c>
|
||
}else if(lcddev.id==0X8989)
|
||
8003d0e: 4b1b ldr r3, [pc, #108] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003d10: 889b ldrh r3, [r3, #4]
|
||
8003d12: f648 1289 movw r2, #35209 ; 0x8989
|
||
8003d16: 4293 cmp r3, r2
|
||
8003d18: d109 bne.n 8003d2e <LCD_Display_Dir+0x13a>
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8003d1a: 4b18 ldr r3, [pc, #96] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003d1c: 2222 movs r2, #34 ; 0x22
|
||
8003d1e: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X4F;
|
||
8003d20: 4b16 ldr r3, [pc, #88] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003d22: 224f movs r2, #79 ; 0x4f
|
||
8003d24: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X4E;
|
||
8003d26: 4b15 ldr r3, [pc, #84] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003d28: 224e movs r2, #78 ; 0x4e
|
||
8003d2a: 725a strb r2, [r3, #9]
|
||
8003d2c: e008 b.n 8003d40 <LCD_Display_Dir+0x14c>
|
||
}else
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8003d2e: 4b13 ldr r3, [pc, #76] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003d30: 2222 movs r2, #34 ; 0x22
|
||
8003d32: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=R33;
|
||
8003d34: 4b11 ldr r3, [pc, #68] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003d36: 2221 movs r2, #33 ; 0x21
|
||
8003d38: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=R32;
|
||
8003d3a: 4b10 ldr r3, [pc, #64] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003d3c: 2220 movs r2, #32
|
||
8003d3e: 725a strb r2, [r3, #9]
|
||
}
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003d40: 4b0e ldr r3, [pc, #56] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003d42: 889b ldrh r3, [r3, #4]
|
||
8003d44: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003d48: 4293 cmp r3, r2
|
||
8003d4a: d005 beq.n 8003d58 <LCD_Display_Dir+0x164>
|
||
8003d4c: 4b0b ldr r3, [pc, #44] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003d4e: 889b ldrh r3, [r3, #4]
|
||
8003d50: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003d54: 4293 cmp r3, r2
|
||
8003d56: d109 bne.n 8003d6c <LCD_Display_Dir+0x178>
|
||
{
|
||
lcddev.width=480;
|
||
8003d58: 4b08 ldr r3, [pc, #32] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003d5a: f44f 72f0 mov.w r2, #480 ; 0x1e0
|
||
8003d5e: 801a strh r2, [r3, #0]
|
||
lcddev.height=320;
|
||
8003d60: 4b06 ldr r3, [pc, #24] ; (8003d7c <LCD_Display_Dir+0x188>)
|
||
8003d62: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8003d66: 805a strh r2, [r3, #2]
|
||
8003d68: e000 b.n 8003d6c <LCD_Display_Dir+0x178>
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003d6a: bf00 nop
|
||
}
|
||
}
|
||
LCD_Scan_Dir(DFT_SCAN_DIR); //Ĭ��ɨ�跽��
|
||
8003d6c: 2000 movs r0, #0
|
||
8003d6e: f7ff fdd3 bl 8003918 <LCD_Scan_Dir>
|
||
}
|
||
8003d72: bf00 nop
|
||
8003d74: 3708 adds r7, #8
|
||
8003d76: 46bd mov sp, r7
|
||
8003d78: bd80 pop {r7, pc}
|
||
8003d7a: bf00 nop
|
||
8003d7c: 200002a8 .word 0x200002a8
|
||
|
||
08003d80 <LCDx_Init>:
|
||
|
||
//��ʼ��lcd
|
||
//�ó�ʼ���������Գ�ʼ������Һ��!
|
||
void LCDx_Init(void)
|
||
{
|
||
8003d80: b580 push {r7, lr}
|
||
8003d82: af00 add r7, sp, #0
|
||
|
||
|
||
HAL_Delay(50); // delay 50 ms
|
||
8003d84: 2032 movs r0, #50 ; 0x32
|
||
8003d86: f7fd fd89 bl 800189c <HAL_Delay>
|
||
LCD_WriteReg(0x0000,0x0001);
|
||
8003d8a: 2101 movs r1, #1
|
||
8003d8c: 2000 movs r0, #0
|
||
8003d8e: f7ff fd99 bl 80038c4 <LCD_WriteReg>
|
||
HAL_Delay(50); // delay 50 ms
|
||
8003d92: 2032 movs r0, #50 ; 0x32
|
||
8003d94: f7fd fd82 bl 800189c <HAL_Delay>
|
||
lcddev.id = LCD_ReadReg(0x0000);
|
||
8003d98: 2000 movs r0, #0
|
||
8003d9a: f7ff fda9 bl 80038f0 <LCD_ReadReg>
|
||
8003d9e: 4603 mov r3, r0
|
||
8003da0: 461a mov r2, r3
|
||
8003da2: 4b70 ldr r3, [pc, #448] ; (8003f64 <LCDx_Init+0x1e4>)
|
||
8003da4: 809a strh r2, [r3, #4]
|
||
|
||
|
||
LCD_WriteReg(0x00E5,0x78F0);
|
||
8003da6: f647 01f0 movw r1, #30960 ; 0x78f0
|
||
8003daa: 20e5 movs r0, #229 ; 0xe5
|
||
8003dac: f7ff fd8a bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0001,0x0100);
|
||
8003db0: f44f 7180 mov.w r1, #256 ; 0x100
|
||
8003db4: 2001 movs r0, #1
|
||
8003db6: f7ff fd85 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0002,0x0700);
|
||
8003dba: f44f 61e0 mov.w r1, #1792 ; 0x700
|
||
8003dbe: 2002 movs r0, #2
|
||
8003dc0: f7ff fd80 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0003,0x1030);
|
||
8003dc4: f241 0130 movw r1, #4144 ; 0x1030
|
||
8003dc8: 2003 movs r0, #3
|
||
8003dca: f7ff fd7b bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0004,0x0000);
|
||
8003dce: 2100 movs r1, #0
|
||
8003dd0: 2004 movs r0, #4
|
||
8003dd2: f7ff fd77 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0008,0x0202);
|
||
8003dd6: f240 2102 movw r1, #514 ; 0x202
|
||
8003dda: 2008 movs r0, #8
|
||
8003ddc: f7ff fd72 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0009,0x0000);
|
||
8003de0: 2100 movs r1, #0
|
||
8003de2: 2009 movs r0, #9
|
||
8003de4: f7ff fd6e bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000A,0x0000);
|
||
8003de8: 2100 movs r1, #0
|
||
8003dea: 200a movs r0, #10
|
||
8003dec: f7ff fd6a bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000C,0x0000);
|
||
8003df0: 2100 movs r1, #0
|
||
8003df2: 200c movs r0, #12
|
||
8003df4: f7ff fd66 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000D,0x0000);
|
||
8003df8: 2100 movs r1, #0
|
||
8003dfa: 200d movs r0, #13
|
||
8003dfc: f7ff fd62 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000F,0x0000);
|
||
8003e00: 2100 movs r1, #0
|
||
8003e02: 200f movs r0, #15
|
||
8003e04: f7ff fd5e bl 80038c4 <LCD_WriteReg>
|
||
//power on sequence VGHVGL
|
||
LCD_WriteReg(0x0010,0x0000);
|
||
8003e08: 2100 movs r1, #0
|
||
8003e0a: 2010 movs r0, #16
|
||
8003e0c: f7ff fd5a bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0011,0x0007);
|
||
8003e10: 2107 movs r1, #7
|
||
8003e12: 2011 movs r0, #17
|
||
8003e14: f7ff fd56 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0012,0x0000);
|
||
8003e18: 2100 movs r1, #0
|
||
8003e1a: 2012 movs r0, #18
|
||
8003e1c: f7ff fd52 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0013,0x0000);
|
||
8003e20: 2100 movs r1, #0
|
||
8003e22: 2013 movs r0, #19
|
||
8003e24: f7ff fd4e bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0007,0x0000);
|
||
8003e28: 2100 movs r1, #0
|
||
8003e2a: 2007 movs r0, #7
|
||
8003e2c: f7ff fd4a bl 80038c4 <LCD_WriteReg>
|
||
//vgh
|
||
LCD_WriteReg(0x0010,0x1690);
|
||
8003e30: f241 6190 movw r1, #5776 ; 0x1690
|
||
8003e34: 2010 movs r0, #16
|
||
8003e36: f7ff fd45 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0011,0x0227);
|
||
8003e3a: f240 2127 movw r1, #551 ; 0x227
|
||
8003e3e: 2011 movs r0, #17
|
||
8003e40: f7ff fd40 bl 80038c4 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vregiout
|
||
LCD_WriteReg(0x0012,0x009D); //0x001b
|
||
8003e44: 219d movs r1, #157 ; 0x9d
|
||
8003e46: 2012 movs r0, #18
|
||
8003e48: f7ff fd3c bl 80038c4 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vom amplitude
|
||
LCD_WriteReg(0x0013,0x1900);
|
||
8003e4c: f44f 51c8 mov.w r1, #6400 ; 0x1900
|
||
8003e50: 2013 movs r0, #19
|
||
8003e52: f7ff fd37 bl 80038c4 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vom H
|
||
LCD_WriteReg(0x0029,0x0025);
|
||
8003e56: 2125 movs r1, #37 ; 0x25
|
||
8003e58: 2029 movs r0, #41 ; 0x29
|
||
8003e5a: f7ff fd33 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x002B,0x000D);
|
||
8003e5e: 210d movs r1, #13
|
||
8003e60: 202b movs r0, #43 ; 0x2b
|
||
8003e62: f7ff fd2f bl 80038c4 <LCD_WriteReg>
|
||
//gamma
|
||
LCD_WriteReg(0x0030,0x0007);
|
||
8003e66: 2107 movs r1, #7
|
||
8003e68: 2030 movs r0, #48 ; 0x30
|
||
8003e6a: f7ff fd2b bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0031,0x0303);
|
||
8003e6e: f240 3103 movw r1, #771 ; 0x303
|
||
8003e72: 2031 movs r0, #49 ; 0x31
|
||
8003e74: f7ff fd26 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0032,0x0003);// 0006
|
||
8003e78: 2103 movs r1, #3
|
||
8003e7a: 2032 movs r0, #50 ; 0x32
|
||
8003e7c: f7ff fd22 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0035,0x0206);
|
||
8003e80: f240 2106 movw r1, #518 ; 0x206
|
||
8003e84: 2035 movs r0, #53 ; 0x35
|
||
8003e86: f7ff fd1d bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0036,0x0008);
|
||
8003e8a: 2108 movs r1, #8
|
||
8003e8c: 2036 movs r0, #54 ; 0x36
|
||
8003e8e: f7ff fd19 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0037,0x0406);
|
||
8003e92: f240 4106 movw r1, #1030 ; 0x406
|
||
8003e96: 2037 movs r0, #55 ; 0x37
|
||
8003e98: f7ff fd14 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0038,0x0304);//0200
|
||
8003e9c: f44f 7141 mov.w r1, #772 ; 0x304
|
||
8003ea0: 2038 movs r0, #56 ; 0x38
|
||
8003ea2: f7ff fd0f bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0039,0x0007);
|
||
8003ea6: 2107 movs r1, #7
|
||
8003ea8: 2039 movs r0, #57 ; 0x39
|
||
8003eaa: f7ff fd0b bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x003C,0x0602);// 0504
|
||
8003eae: f240 6102 movw r1, #1538 ; 0x602
|
||
8003eb2: 203c movs r0, #60 ; 0x3c
|
||
8003eb4: f7ff fd06 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x003D,0x0008);
|
||
8003eb8: 2108 movs r1, #8
|
||
8003eba: 203d movs r0, #61 ; 0x3d
|
||
8003ebc: f7ff fd02 bl 80038c4 <LCD_WriteReg>
|
||
//ram
|
||
LCD_WriteReg(0x0050,0x0000);
|
||
8003ec0: 2100 movs r1, #0
|
||
8003ec2: 2050 movs r0, #80 ; 0x50
|
||
8003ec4: f7ff fcfe bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0051,0x00EF);
|
||
8003ec8: 21ef movs r1, #239 ; 0xef
|
||
8003eca: 2051 movs r0, #81 ; 0x51
|
||
8003ecc: f7ff fcfa bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0052,0x0000);
|
||
8003ed0: 2100 movs r1, #0
|
||
8003ed2: 2052 movs r0, #82 ; 0x52
|
||
8003ed4: f7ff fcf6 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0053,0x013F);
|
||
8003ed8: f240 113f movw r1, #319 ; 0x13f
|
||
8003edc: 2053 movs r0, #83 ; 0x53
|
||
8003ede: f7ff fcf1 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0060,0xA700);
|
||
8003ee2: f44f 4127 mov.w r1, #42752 ; 0xa700
|
||
8003ee6: 2060 movs r0, #96 ; 0x60
|
||
8003ee8: f7ff fcec bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0061,0x0001);
|
||
8003eec: 2101 movs r1, #1
|
||
8003eee: 2061 movs r0, #97 ; 0x61
|
||
8003ef0: f7ff fce8 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x006A,0x0000);
|
||
8003ef4: 2100 movs r1, #0
|
||
8003ef6: 206a movs r0, #106 ; 0x6a
|
||
8003ef8: f7ff fce4 bl 80038c4 <LCD_WriteReg>
|
||
//
|
||
LCD_WriteReg(0x0080,0x0000);
|
||
8003efc: 2100 movs r1, #0
|
||
8003efe: 2080 movs r0, #128 ; 0x80
|
||
8003f00: f7ff fce0 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0081,0x0000);
|
||
8003f04: 2100 movs r1, #0
|
||
8003f06: 2081 movs r0, #129 ; 0x81
|
||
8003f08: f7ff fcdc bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0082,0x0000);
|
||
8003f0c: 2100 movs r1, #0
|
||
8003f0e: 2082 movs r0, #130 ; 0x82
|
||
8003f10: f7ff fcd8 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0083,0x0000);
|
||
8003f14: 2100 movs r1, #0
|
||
8003f16: 2083 movs r0, #131 ; 0x83
|
||
8003f18: f7ff fcd4 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0084,0x0000);
|
||
8003f1c: 2100 movs r1, #0
|
||
8003f1e: 2084 movs r0, #132 ; 0x84
|
||
8003f20: f7ff fcd0 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0085,0x0000);
|
||
8003f24: 2100 movs r1, #0
|
||
8003f26: 2085 movs r0, #133 ; 0x85
|
||
8003f28: f7ff fccc bl 80038c4 <LCD_WriteReg>
|
||
//
|
||
LCD_WriteReg(0x0090,0x0010);
|
||
8003f2c: 2110 movs r1, #16
|
||
8003f2e: 2090 movs r0, #144 ; 0x90
|
||
8003f30: f7ff fcc8 bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0092,0x0600);
|
||
8003f34: f44f 61c0 mov.w r1, #1536 ; 0x600
|
||
8003f38: 2092 movs r0, #146 ; 0x92
|
||
8003f3a: f7ff fcc3 bl 80038c4 <LCD_WriteReg>
|
||
|
||
LCD_WriteReg(0x0007,0x0133);
|
||
8003f3e: f240 1133 movw r1, #307 ; 0x133
|
||
8003f42: 2007 movs r0, #7
|
||
8003f44: f7ff fcbe bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(0x00,0x0022);//
|
||
8003f48: 2122 movs r1, #34 ; 0x22
|
||
8003f4a: 2000 movs r0, #0
|
||
8003f4c: f7ff fcba bl 80038c4 <LCD_WriteReg>
|
||
|
||
|
||
LCD_Display_Dir(1); //Ĭ��Ϊh��
|
||
8003f50: 2001 movs r0, #1
|
||
8003f52: f7ff fe4f bl 8003bf4 <LCD_Display_Dir>
|
||
|
||
LCD_BL(0);
|
||
8003f56: 2200 movs r2, #0
|
||
8003f58: 2101 movs r1, #1
|
||
8003f5a: 4803 ldr r0, [pc, #12] ; (8003f68 <LCDx_Init+0x1e8>)
|
||
8003f5c: f7fd ff51 bl 8001e02 <HAL_GPIO_WritePin>
|
||
|
||
}
|
||
8003f60: bf00 nop
|
||
8003f62: bd80 pop {r7, pc}
|
||
8003f64: 200002a8 .word 0x200002a8
|
||
8003f68: 40010c00 .word 0x40010c00
|
||
|
||
08003f6c <LCD_SetCursor>:
|
||
//***********************************************************���� ���� ʲô��
|
||
//���ù���λ��
|
||
//Xpos:������
|
||
//Ypos:������
|
||
void LCD_SetCursor(uint16_t Xpos, uint16_t Ypos)
|
||
{
|
||
8003f6c: b580 push {r7, lr}
|
||
8003f6e: b082 sub sp, #8
|
||
8003f70: af00 add r7, sp, #0
|
||
8003f72: 4603 mov r3, r0
|
||
8003f74: 460a mov r2, r1
|
||
8003f76: 80fb strh r3, [r7, #6]
|
||
8003f78: 4613 mov r3, r2
|
||
8003f7a: 80bb strh r3, [r7, #4]
|
||
if(lcddev.id==0X9341||lcddev.id==0X5310)
|
||
8003f7c: 4b42 ldr r3, [pc, #264] ; (8004088 <LCD_SetCursor+0x11c>)
|
||
8003f7e: 889b ldrh r3, [r3, #4]
|
||
8003f80: f249 3241 movw r2, #37697 ; 0x9341
|
||
8003f84: 4293 cmp r3, r2
|
||
8003f86: d005 beq.n 8003f94 <LCD_SetCursor+0x28>
|
||
8003f88: 4b3f ldr r3, [pc, #252] ; (8004088 <LCD_SetCursor+0x11c>)
|
||
8003f8a: 889b ldrh r3, [r3, #4]
|
||
8003f8c: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003f90: 4293 cmp r3, r2
|
||
8003f92: d124 bne.n 8003fde <LCD_SetCursor+0x72>
|
||
{
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
8003f94: 4b3c ldr r3, [pc, #240] ; (8004088 <LCD_SetCursor+0x11c>)
|
||
8003f96: 7a1b ldrb r3, [r3, #8]
|
||
8003f98: b29b uxth r3, r3
|
||
8003f9a: 4618 mov r0, r3
|
||
8003f9c: f7ff fc74 bl 8003888 <LCD_WR_REG>
|
||
LCD_WR_DATA(Xpos>>8);
|
||
8003fa0: 88fb ldrh r3, [r7, #6]
|
||
8003fa2: 0a1b lsrs r3, r3, #8
|
||
8003fa4: b29b uxth r3, r3
|
||
8003fa6: 4618 mov r0, r3
|
||
8003fa8: f7ff fc7c bl 80038a4 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Xpos&0XFF);
|
||
8003fac: 88fb ldrh r3, [r7, #6]
|
||
8003fae: b2db uxtb r3, r3
|
||
8003fb0: b29b uxth r3, r3
|
||
8003fb2: 4618 mov r0, r3
|
||
8003fb4: f7ff fc76 bl 80038a4 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8003fb8: 4b33 ldr r3, [pc, #204] ; (8004088 <LCD_SetCursor+0x11c>)
|
||
8003fba: 7a5b ldrb r3, [r3, #9]
|
||
8003fbc: b29b uxth r3, r3
|
||
8003fbe: 4618 mov r0, r3
|
||
8003fc0: f7ff fc62 bl 8003888 <LCD_WR_REG>
|
||
LCD_WR_DATA(Ypos>>8);
|
||
8003fc4: 88bb ldrh r3, [r7, #4]
|
||
8003fc6: 0a1b lsrs r3, r3, #8
|
||
8003fc8: b29b uxth r3, r3
|
||
8003fca: 4618 mov r0, r3
|
||
8003fcc: f7ff fc6a bl 80038a4 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Ypos&0XFF);
|
||
8003fd0: 88bb ldrh r3, [r7, #4]
|
||
8003fd2: b2db uxtb r3, r3
|
||
8003fd4: b29b uxth r3, r3
|
||
8003fd6: 4618 mov r0, r3
|
||
8003fd8: f7ff fc64 bl 80038a4 <LCD_WR_DATA>
|
||
{
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//������ʵ���ǵ�תx,y����
|
||
LCD_WriteReg(lcddev.setxcmd, Xpos);
|
||
LCD_WriteReg(lcddev.setycmd, Ypos);
|
||
}
|
||
}
|
||
8003fdc: e050 b.n 8004080 <LCD_SetCursor+0x114>
|
||
}else if(lcddev.id==0X6804)
|
||
8003fde: 4b2a ldr r3, [pc, #168] ; (8004088 <LCD_SetCursor+0x11c>)
|
||
8003fe0: 889b ldrh r3, [r3, #4]
|
||
8003fe2: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003fe6: 4293 cmp r3, r2
|
||
8003fe8: d12f bne.n 800404a <LCD_SetCursor+0xde>
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//����ʱ����
|
||
8003fea: 4b27 ldr r3, [pc, #156] ; (8004088 <LCD_SetCursor+0x11c>)
|
||
8003fec: 799b ldrb r3, [r3, #6]
|
||
8003fee: 2b01 cmp r3, #1
|
||
8003ff0: d106 bne.n 8004000 <LCD_SetCursor+0x94>
|
||
8003ff2: 4b25 ldr r3, [pc, #148] ; (8004088 <LCD_SetCursor+0x11c>)
|
||
8003ff4: 881a ldrh r2, [r3, #0]
|
||
8003ff6: 88fb ldrh r3, [r7, #6]
|
||
8003ff8: 1ad3 subs r3, r2, r3
|
||
8003ffa: b29b uxth r3, r3
|
||
8003ffc: 3b01 subs r3, #1
|
||
8003ffe: 80fb strh r3, [r7, #6]
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
8004000: 4b21 ldr r3, [pc, #132] ; (8004088 <LCD_SetCursor+0x11c>)
|
||
8004002: 7a1b ldrb r3, [r3, #8]
|
||
8004004: b29b uxth r3, r3
|
||
8004006: 4618 mov r0, r3
|
||
8004008: f7ff fc3e bl 8003888 <LCD_WR_REG>
|
||
LCD_WR_DATA(Xpos>>8);
|
||
800400c: 88fb ldrh r3, [r7, #6]
|
||
800400e: 0a1b lsrs r3, r3, #8
|
||
8004010: b29b uxth r3, r3
|
||
8004012: 4618 mov r0, r3
|
||
8004014: f7ff fc46 bl 80038a4 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Xpos&0XFF);
|
||
8004018: 88fb ldrh r3, [r7, #6]
|
||
800401a: b2db uxtb r3, r3
|
||
800401c: b29b uxth r3, r3
|
||
800401e: 4618 mov r0, r3
|
||
8004020: f7ff fc40 bl 80038a4 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8004024: 4b18 ldr r3, [pc, #96] ; (8004088 <LCD_SetCursor+0x11c>)
|
||
8004026: 7a5b ldrb r3, [r3, #9]
|
||
8004028: b29b uxth r3, r3
|
||
800402a: 4618 mov r0, r3
|
||
800402c: f7ff fc2c bl 8003888 <LCD_WR_REG>
|
||
LCD_WR_DATA(Ypos>>8);
|
||
8004030: 88bb ldrh r3, [r7, #4]
|
||
8004032: 0a1b lsrs r3, r3, #8
|
||
8004034: b29b uxth r3, r3
|
||
8004036: 4618 mov r0, r3
|
||
8004038: f7ff fc34 bl 80038a4 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Ypos&0XFF);
|
||
800403c: 88bb ldrh r3, [r7, #4]
|
||
800403e: b2db uxtb r3, r3
|
||
8004040: b29b uxth r3, r3
|
||
8004042: 4618 mov r0, r3
|
||
8004044: f7ff fc2e bl 80038a4 <LCD_WR_DATA>
|
||
}
|
||
8004048: e01a b.n 8004080 <LCD_SetCursor+0x114>
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//������ʵ���ǵ�תx,y����
|
||
800404a: 4b0f ldr r3, [pc, #60] ; (8004088 <LCD_SetCursor+0x11c>)
|
||
800404c: 799b ldrb r3, [r3, #6]
|
||
800404e: 2b01 cmp r3, #1
|
||
8004050: d106 bne.n 8004060 <LCD_SetCursor+0xf4>
|
||
8004052: 4b0d ldr r3, [pc, #52] ; (8004088 <LCD_SetCursor+0x11c>)
|
||
8004054: 881a ldrh r2, [r3, #0]
|
||
8004056: 88fb ldrh r3, [r7, #6]
|
||
8004058: 1ad3 subs r3, r2, r3
|
||
800405a: b29b uxth r3, r3
|
||
800405c: 3b01 subs r3, #1
|
||
800405e: 80fb strh r3, [r7, #6]
|
||
LCD_WriteReg(lcddev.setxcmd, Xpos);
|
||
8004060: 4b09 ldr r3, [pc, #36] ; (8004088 <LCD_SetCursor+0x11c>)
|
||
8004062: 7a1b ldrb r3, [r3, #8]
|
||
8004064: b29b uxth r3, r3
|
||
8004066: 88fa ldrh r2, [r7, #6]
|
||
8004068: 4611 mov r1, r2
|
||
800406a: 4618 mov r0, r3
|
||
800406c: f7ff fc2a bl 80038c4 <LCD_WriteReg>
|
||
LCD_WriteReg(lcddev.setycmd, Ypos);
|
||
8004070: 4b05 ldr r3, [pc, #20] ; (8004088 <LCD_SetCursor+0x11c>)
|
||
8004072: 7a5b ldrb r3, [r3, #9]
|
||
8004074: b29b uxth r3, r3
|
||
8004076: 88ba ldrh r2, [r7, #4]
|
||
8004078: 4611 mov r1, r2
|
||
800407a: 4618 mov r0, r3
|
||
800407c: f7ff fc22 bl 80038c4 <LCD_WriteReg>
|
||
}
|
||
8004080: bf00 nop
|
||
8004082: 3708 adds r7, #8
|
||
8004084: 46bd mov sp, r7
|
||
8004086: bd80 pop {r7, pc}
|
||
8004088: 200002a8 .word 0x200002a8
|
||
|
||
0800408c <LCD_set_dot>:
|
||
}
|
||
//����
|
||
//x,y:����
|
||
//POINT_COLOR:�˵�����ɫ
|
||
void LCD_set_dot(uint16_t x,uint16_t y,uint16_t color)
|
||
{
|
||
800408c: b580 push {r7, lr}
|
||
800408e: b082 sub sp, #8
|
||
8004090: af00 add r7, sp, #0
|
||
8004092: 4603 mov r3, r0
|
||
8004094: 80fb strh r3, [r7, #6]
|
||
8004096: 460b mov r3, r1
|
||
8004098: 80bb strh r3, [r7, #4]
|
||
800409a: 4613 mov r3, r2
|
||
800409c: 807b strh r3, [r7, #2]
|
||
LCD_SetCursor(x,y); //���ù���λ��
|
||
800409e: 88ba ldrh r2, [r7, #4]
|
||
80040a0: 88fb ldrh r3, [r7, #6]
|
||
80040a2: 4611 mov r1, r2
|
||
80040a4: 4618 mov r0, r3
|
||
80040a6: f7ff ff61 bl 8003f6c <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
80040aa: 4b06 ldr r3, [pc, #24] ; (80040c4 <LCD_set_dot+0x38>)
|
||
80040ac: 79da ldrb r2, [r3, #7]
|
||
80040ae: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
80040b2: b292 uxth r2, r2
|
||
80040b4: 801a strh r2, [r3, #0]
|
||
LCD_DATA_ADDRESS=color;
|
||
80040b6: 4a04 ldr r2, [pc, #16] ; (80040c8 <LCD_set_dot+0x3c>)
|
||
80040b8: 887b ldrh r3, [r7, #2]
|
||
80040ba: 8013 strh r3, [r2, #0]
|
||
}
|
||
80040bc: bf00 nop
|
||
80040be: 3708 adds r7, #8
|
||
80040c0: 46bd mov sp, r7
|
||
80040c2: bd80 pop {r7, pc}
|
||
80040c4: 200002a8 .word 0x200002a8
|
||
80040c8: 6c000800 .word 0x6c000800
|
||
|
||
080040cc <LCD_Clear>:
|
||
|
||
//��������
|
||
//color:Ҫ����������ɫ
|
||
void LCD_Clear(uint16_t color)
|
||
{
|
||
80040cc: b580 push {r7, lr}
|
||
80040ce: b084 sub sp, #16
|
||
80040d0: af00 add r7, sp, #0
|
||
80040d2: 4603 mov r3, r0
|
||
80040d4: 80fb strh r3, [r7, #6]
|
||
uint32_t index=0;
|
||
80040d6: 2300 movs r3, #0
|
||
80040d8: 60fb str r3, [r7, #12]
|
||
uint32_t totalpoint=lcddev.width;
|
||
80040da: 4b23 ldr r3, [pc, #140] ; (8004168 <LCD_Clear+0x9c>)
|
||
80040dc: 881b ldrh r3, [r3, #0]
|
||
80040de: 60bb str r3, [r7, #8]
|
||
totalpoint*=lcddev.height; //�õ��ܵ���
|
||
80040e0: 4b21 ldr r3, [pc, #132] ; (8004168 <LCD_Clear+0x9c>)
|
||
80040e2: 885b ldrh r3, [r3, #2]
|
||
80040e4: 461a mov r2, r3
|
||
80040e6: 68bb ldr r3, [r7, #8]
|
||
80040e8: fb02 f303 mul.w r3, r2, r3
|
||
80040ec: 60bb str r3, [r7, #8]
|
||
if((lcddev.id==0X6804)&&(lcddev.dir==1))//6804������ʱ�������
|
||
80040ee: 4b1e ldr r3, [pc, #120] ; (8004168 <LCD_Clear+0x9c>)
|
||
80040f0: 889b ldrh r3, [r3, #4]
|
||
80040f2: f646 0204 movw r2, #26628 ; 0x6804
|
||
80040f6: 4293 cmp r3, r2
|
||
80040f8: d11a bne.n 8004130 <LCD_Clear+0x64>
|
||
80040fa: 4b1b ldr r3, [pc, #108] ; (8004168 <LCD_Clear+0x9c>)
|
||
80040fc: 799b ldrb r3, [r3, #6]
|
||
80040fe: 2b01 cmp r3, #1
|
||
8004100: d116 bne.n 8004130 <LCD_Clear+0x64>
|
||
{
|
||
lcddev.dir=0;
|
||
8004102: 4b19 ldr r3, [pc, #100] ; (8004168 <LCD_Clear+0x9c>)
|
||
8004104: 2200 movs r2, #0
|
||
8004106: 719a strb r2, [r3, #6]
|
||
lcddev.setxcmd=0X2A;
|
||
8004108: 4b17 ldr r3, [pc, #92] ; (8004168 <LCD_Clear+0x9c>)
|
||
800410a: 222a movs r2, #42 ; 0x2a
|
||
800410c: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
800410e: 4b16 ldr r3, [pc, #88] ; (8004168 <LCD_Clear+0x9c>)
|
||
8004110: 222b movs r2, #43 ; 0x2b
|
||
8004112: 725a strb r2, [r3, #9]
|
||
LCD_SetCursor(0x00,0x0000); //���ù���λ��
|
||
8004114: 2100 movs r1, #0
|
||
8004116: 2000 movs r0, #0
|
||
8004118: f7ff ff28 bl 8003f6c <LCD_SetCursor>
|
||
lcddev.dir=1;
|
||
800411c: 4b12 ldr r3, [pc, #72] ; (8004168 <LCD_Clear+0x9c>)
|
||
800411e: 2201 movs r2, #1
|
||
8004120: 719a strb r2, [r3, #6]
|
||
lcddev.setxcmd=0X2B;
|
||
8004122: 4b11 ldr r3, [pc, #68] ; (8004168 <LCD_Clear+0x9c>)
|
||
8004124: 222b movs r2, #43 ; 0x2b
|
||
8004126: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2A;
|
||
8004128: 4b0f ldr r3, [pc, #60] ; (8004168 <LCD_Clear+0x9c>)
|
||
800412a: 222a movs r2, #42 ; 0x2a
|
||
800412c: 725a strb r2, [r3, #9]
|
||
800412e: e003 b.n 8004138 <LCD_Clear+0x6c>
|
||
}else LCD_SetCursor(0x00,0x0000); //���ù���λ��
|
||
8004130: 2100 movs r1, #0
|
||
8004132: 2000 movs r0, #0
|
||
8004134: f7ff ff1a bl 8003f6c <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
8004138: 4b0b ldr r3, [pc, #44] ; (8004168 <LCD_Clear+0x9c>)
|
||
800413a: 79da ldrb r2, [r3, #7]
|
||
800413c: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
8004140: b292 uxth r2, r2
|
||
8004142: 801a strh r2, [r3, #0]
|
||
for(index=0;index<totalpoint;index++)
|
||
8004144: 2300 movs r3, #0
|
||
8004146: 60fb str r3, [r7, #12]
|
||
8004148: e005 b.n 8004156 <LCD_Clear+0x8a>
|
||
{
|
||
LCD_DATA_ADDRESS=color;
|
||
800414a: 4a08 ldr r2, [pc, #32] ; (800416c <LCD_Clear+0xa0>)
|
||
800414c: 88fb ldrh r3, [r7, #6]
|
||
800414e: 8013 strh r3, [r2, #0]
|
||
for(index=0;index<totalpoint;index++)
|
||
8004150: 68fb ldr r3, [r7, #12]
|
||
8004152: 3301 adds r3, #1
|
||
8004154: 60fb str r3, [r7, #12]
|
||
8004156: 68fa ldr r2, [r7, #12]
|
||
8004158: 68bb ldr r3, [r7, #8]
|
||
800415a: 429a cmp r2, r3
|
||
800415c: d3f5 bcc.n 800414a <LCD_Clear+0x7e>
|
||
}
|
||
}
|
||
800415e: bf00 nop
|
||
8004160: bf00 nop
|
||
8004162: 3710 adds r7, #16
|
||
8004164: 46bd mov sp, r7
|
||
8004166: bd80 pop {r7, pc}
|
||
8004168: 200002a8 .word 0x200002a8
|
||
800416c: 6c000800 .word 0x6c000800
|
||
|
||
08004170 <LCD_DrawLine>:
|
||
//***********************************2D
|
||
//����
|
||
//x1,y1:��������
|
||
//x2,y2:�յ�����
|
||
void LCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2,uint16_t color)
|
||
{
|
||
8004170: b590 push {r4, r7, lr}
|
||
8004172: b08d sub sp, #52 ; 0x34
|
||
8004174: af00 add r7, sp, #0
|
||
8004176: 4604 mov r4, r0
|
||
8004178: 4608 mov r0, r1
|
||
800417a: 4611 mov r1, r2
|
||
800417c: 461a mov r2, r3
|
||
800417e: 4623 mov r3, r4
|
||
8004180: 80fb strh r3, [r7, #6]
|
||
8004182: 4603 mov r3, r0
|
||
8004184: 80bb strh r3, [r7, #4]
|
||
8004186: 460b mov r3, r1
|
||
8004188: 807b strh r3, [r7, #2]
|
||
800418a: 4613 mov r3, r2
|
||
800418c: 803b strh r3, [r7, #0]
|
||
uint16_t t;
|
||
int xerr=0,yerr=0,delta_x,delta_y,distance;
|
||
800418e: 2300 movs r3, #0
|
||
8004190: 62bb str r3, [r7, #40] ; 0x28
|
||
8004192: 2300 movs r3, #0
|
||
8004194: 627b str r3, [r7, #36] ; 0x24
|
||
int incx,incy,uRow,uCol;
|
||
delta_x=x2-x1; //������������
|
||
8004196: 887a ldrh r2, [r7, #2]
|
||
8004198: 88fb ldrh r3, [r7, #6]
|
||
800419a: 1ad3 subs r3, r2, r3
|
||
800419c: 623b str r3, [r7, #32]
|
||
delta_y=y2-y1;
|
||
800419e: 883a ldrh r2, [r7, #0]
|
||
80041a0: 88bb ldrh r3, [r7, #4]
|
||
80041a2: 1ad3 subs r3, r2, r3
|
||
80041a4: 61fb str r3, [r7, #28]
|
||
uRow=x1;
|
||
80041a6: 88fb ldrh r3, [r7, #6]
|
||
80041a8: 60fb str r3, [r7, #12]
|
||
uCol=y1;
|
||
80041aa: 88bb ldrh r3, [r7, #4]
|
||
80041ac: 60bb str r3, [r7, #8]
|
||
if(delta_x>0)incx=1; //���õ�������
|
||
80041ae: 6a3b ldr r3, [r7, #32]
|
||
80041b0: 2b00 cmp r3, #0
|
||
80041b2: dd02 ble.n 80041ba <LCD_DrawLine+0x4a>
|
||
80041b4: 2301 movs r3, #1
|
||
80041b6: 617b str r3, [r7, #20]
|
||
80041b8: e00b b.n 80041d2 <LCD_DrawLine+0x62>
|
||
else if(delta_x==0)incx=0;//��ֱ��
|
||
80041ba: 6a3b ldr r3, [r7, #32]
|
||
80041bc: 2b00 cmp r3, #0
|
||
80041be: d102 bne.n 80041c6 <LCD_DrawLine+0x56>
|
||
80041c0: 2300 movs r3, #0
|
||
80041c2: 617b str r3, [r7, #20]
|
||
80041c4: e005 b.n 80041d2 <LCD_DrawLine+0x62>
|
||
else {incx=-1;delta_x=-delta_x;}
|
||
80041c6: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
80041ca: 617b str r3, [r7, #20]
|
||
80041cc: 6a3b ldr r3, [r7, #32]
|
||
80041ce: 425b negs r3, r3
|
||
80041d0: 623b str r3, [r7, #32]
|
||
if(delta_y>0)incy=1;
|
||
80041d2: 69fb ldr r3, [r7, #28]
|
||
80041d4: 2b00 cmp r3, #0
|
||
80041d6: dd02 ble.n 80041de <LCD_DrawLine+0x6e>
|
||
80041d8: 2301 movs r3, #1
|
||
80041da: 613b str r3, [r7, #16]
|
||
80041dc: e00b b.n 80041f6 <LCD_DrawLine+0x86>
|
||
else if(delta_y==0)incy=0;//ˮƽ��
|
||
80041de: 69fb ldr r3, [r7, #28]
|
||
80041e0: 2b00 cmp r3, #0
|
||
80041e2: d102 bne.n 80041ea <LCD_DrawLine+0x7a>
|
||
80041e4: 2300 movs r3, #0
|
||
80041e6: 613b str r3, [r7, #16]
|
||
80041e8: e005 b.n 80041f6 <LCD_DrawLine+0x86>
|
||
else{incy=-1;delta_y=-delta_y;}
|
||
80041ea: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
80041ee: 613b str r3, [r7, #16]
|
||
80041f0: 69fb ldr r3, [r7, #28]
|
||
80041f2: 425b negs r3, r3
|
||
80041f4: 61fb str r3, [r7, #28]
|
||
if( delta_x>delta_y)distance=delta_x; //ѡȡ��������������
|
||
80041f6: 6a3a ldr r2, [r7, #32]
|
||
80041f8: 69fb ldr r3, [r7, #28]
|
||
80041fa: 429a cmp r2, r3
|
||
80041fc: dd02 ble.n 8004204 <LCD_DrawLine+0x94>
|
||
80041fe: 6a3b ldr r3, [r7, #32]
|
||
8004200: 61bb str r3, [r7, #24]
|
||
8004202: e001 b.n 8004208 <LCD_DrawLine+0x98>
|
||
else distance=delta_y;
|
||
8004204: 69fb ldr r3, [r7, #28]
|
||
8004206: 61bb str r3, [r7, #24]
|
||
for(t=0;t<=distance+1;t++ )//��������
|
||
8004208: 2300 movs r3, #0
|
||
800420a: 85fb strh r3, [r7, #46] ; 0x2e
|
||
800420c: e02b b.n 8004266 <LCD_DrawLine+0xf6>
|
||
{
|
||
LCD_set_dot(uRow,uCol,color);//����
|
||
800420e: 68fb ldr r3, [r7, #12]
|
||
8004210: b29b uxth r3, r3
|
||
8004212: 68ba ldr r2, [r7, #8]
|
||
8004214: b291 uxth r1, r2
|
||
8004216: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40
|
||
800421a: 4618 mov r0, r3
|
||
800421c: f7ff ff36 bl 800408c <LCD_set_dot>
|
||
xerr+=delta_x ;
|
||
8004220: 6aba ldr r2, [r7, #40] ; 0x28
|
||
8004222: 6a3b ldr r3, [r7, #32]
|
||
8004224: 4413 add r3, r2
|
||
8004226: 62bb str r3, [r7, #40] ; 0x28
|
||
yerr+=delta_y ;
|
||
8004228: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
800422a: 69fb ldr r3, [r7, #28]
|
||
800422c: 4413 add r3, r2
|
||
800422e: 627b str r3, [r7, #36] ; 0x24
|
||
if(xerr>distance)
|
||
8004230: 6aba ldr r2, [r7, #40] ; 0x28
|
||
8004232: 69bb ldr r3, [r7, #24]
|
||
8004234: 429a cmp r2, r3
|
||
8004236: dd07 ble.n 8004248 <LCD_DrawLine+0xd8>
|
||
{
|
||
xerr-=distance;
|
||
8004238: 6aba ldr r2, [r7, #40] ; 0x28
|
||
800423a: 69bb ldr r3, [r7, #24]
|
||
800423c: 1ad3 subs r3, r2, r3
|
||
800423e: 62bb str r3, [r7, #40] ; 0x28
|
||
uRow+=incx;
|
||
8004240: 68fa ldr r2, [r7, #12]
|
||
8004242: 697b ldr r3, [r7, #20]
|
||
8004244: 4413 add r3, r2
|
||
8004246: 60fb str r3, [r7, #12]
|
||
}
|
||
if(yerr>distance)
|
||
8004248: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
800424a: 69bb ldr r3, [r7, #24]
|
||
800424c: 429a cmp r2, r3
|
||
800424e: dd07 ble.n 8004260 <LCD_DrawLine+0xf0>
|
||
{
|
||
yerr-=distance;
|
||
8004250: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8004252: 69bb ldr r3, [r7, #24]
|
||
8004254: 1ad3 subs r3, r2, r3
|
||
8004256: 627b str r3, [r7, #36] ; 0x24
|
||
uCol+=incy;
|
||
8004258: 68ba ldr r2, [r7, #8]
|
||
800425a: 693b ldr r3, [r7, #16]
|
||
800425c: 4413 add r3, r2
|
||
800425e: 60bb str r3, [r7, #8]
|
||
for(t=0;t<=distance+1;t++ )//��������
|
||
8004260: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
||
8004262: 3301 adds r3, #1
|
||
8004264: 85fb strh r3, [r7, #46] ; 0x2e
|
||
8004266: 8dfa ldrh r2, [r7, #46] ; 0x2e
|
||
8004268: 69bb ldr r3, [r7, #24]
|
||
800426a: 3301 adds r3, #1
|
||
800426c: 429a cmp r2, r3
|
||
800426e: ddce ble.n 800420e <LCD_DrawLine+0x9e>
|
||
}
|
||
}
|
||
}
|
||
8004270: bf00 nop
|
||
8004272: bf00 nop
|
||
8004274: 3734 adds r7, #52 ; 0x34
|
||
8004276: 46bd mov sp, r7
|
||
8004278: bd90 pop {r4, r7, pc}
|
||
|
||
0800427a <Draw_Circle>:
|
||
|
||
//��ָ��λ�û�һ��ָ����С��Բ
|
||
//(x,y):���ĵ�
|
||
//r :�뾶
|
||
void Draw_Circle(uint16_t x0,uint16_t y0,uint16_t r,uint16_t color)
|
||
{
|
||
800427a: b590 push {r4, r7, lr}
|
||
800427c: b087 sub sp, #28
|
||
800427e: af00 add r7, sp, #0
|
||
8004280: 4604 mov r4, r0
|
||
8004282: 4608 mov r0, r1
|
||
8004284: 4611 mov r1, r2
|
||
8004286: 461a mov r2, r3
|
||
8004288: 4623 mov r3, r4
|
||
800428a: 80fb strh r3, [r7, #6]
|
||
800428c: 4603 mov r3, r0
|
||
800428e: 80bb strh r3, [r7, #4]
|
||
8004290: 460b mov r3, r1
|
||
8004292: 807b strh r3, [r7, #2]
|
||
8004294: 4613 mov r3, r2
|
||
8004296: 803b strh r3, [r7, #0]
|
||
int a,b;
|
||
int di;
|
||
a=0;b=r;
|
||
8004298: 2300 movs r3, #0
|
||
800429a: 617b str r3, [r7, #20]
|
||
800429c: 887b ldrh r3, [r7, #2]
|
||
800429e: 613b str r3, [r7, #16]
|
||
di=3-(r<<1); //�ж��¸���λ�õı�־
|
||
80042a0: 887b ldrh r3, [r7, #2]
|
||
80042a2: 005b lsls r3, r3, #1
|
||
80042a4: f1c3 0303 rsb r3, r3, #3
|
||
80042a8: 60fb str r3, [r7, #12]
|
||
while(a<=b)
|
||
80042aa: e087 b.n 80043bc <Draw_Circle+0x142>
|
||
{
|
||
LCD_set_dot(x0+a,y0-b,color); //5
|
||
80042ac: 697b ldr r3, [r7, #20]
|
||
80042ae: b29a uxth r2, r3
|
||
80042b0: 88fb ldrh r3, [r7, #6]
|
||
80042b2: 4413 add r3, r2
|
||
80042b4: b298 uxth r0, r3
|
||
80042b6: 693b ldr r3, [r7, #16]
|
||
80042b8: b29b uxth r3, r3
|
||
80042ba: 88ba ldrh r2, [r7, #4]
|
||
80042bc: 1ad3 subs r3, r2, r3
|
||
80042be: b29b uxth r3, r3
|
||
80042c0: 883a ldrh r2, [r7, #0]
|
||
80042c2: 4619 mov r1, r3
|
||
80042c4: f7ff fee2 bl 800408c <LCD_set_dot>
|
||
LCD_set_dot(x0+b,y0-a,color); //0
|
||
80042c8: 693b ldr r3, [r7, #16]
|
||
80042ca: b29a uxth r2, r3
|
||
80042cc: 88fb ldrh r3, [r7, #6]
|
||
80042ce: 4413 add r3, r2
|
||
80042d0: b298 uxth r0, r3
|
||
80042d2: 697b ldr r3, [r7, #20]
|
||
80042d4: b29b uxth r3, r3
|
||
80042d6: 88ba ldrh r2, [r7, #4]
|
||
80042d8: 1ad3 subs r3, r2, r3
|
||
80042da: b29b uxth r3, r3
|
||
80042dc: 883a ldrh r2, [r7, #0]
|
||
80042de: 4619 mov r1, r3
|
||
80042e0: f7ff fed4 bl 800408c <LCD_set_dot>
|
||
LCD_set_dot(x0+b,y0+a,color); //4
|
||
80042e4: 693b ldr r3, [r7, #16]
|
||
80042e6: b29a uxth r2, r3
|
||
80042e8: 88fb ldrh r3, [r7, #6]
|
||
80042ea: 4413 add r3, r2
|
||
80042ec: b298 uxth r0, r3
|
||
80042ee: 697b ldr r3, [r7, #20]
|
||
80042f0: b29a uxth r2, r3
|
||
80042f2: 88bb ldrh r3, [r7, #4]
|
||
80042f4: 4413 add r3, r2
|
||
80042f6: b29b uxth r3, r3
|
||
80042f8: 883a ldrh r2, [r7, #0]
|
||
80042fa: 4619 mov r1, r3
|
||
80042fc: f7ff fec6 bl 800408c <LCD_set_dot>
|
||
LCD_set_dot(x0+a,y0+b,color); //6
|
||
8004300: 697b ldr r3, [r7, #20]
|
||
8004302: b29a uxth r2, r3
|
||
8004304: 88fb ldrh r3, [r7, #6]
|
||
8004306: 4413 add r3, r2
|
||
8004308: b298 uxth r0, r3
|
||
800430a: 693b ldr r3, [r7, #16]
|
||
800430c: b29a uxth r2, r3
|
||
800430e: 88bb ldrh r3, [r7, #4]
|
||
8004310: 4413 add r3, r2
|
||
8004312: b29b uxth r3, r3
|
||
8004314: 883a ldrh r2, [r7, #0]
|
||
8004316: 4619 mov r1, r3
|
||
8004318: f7ff feb8 bl 800408c <LCD_set_dot>
|
||
LCD_set_dot(x0-a,y0+b,color); //1
|
||
800431c: 697b ldr r3, [r7, #20]
|
||
800431e: b29b uxth r3, r3
|
||
8004320: 88fa ldrh r2, [r7, #6]
|
||
8004322: 1ad3 subs r3, r2, r3
|
||
8004324: b298 uxth r0, r3
|
||
8004326: 693b ldr r3, [r7, #16]
|
||
8004328: b29a uxth r2, r3
|
||
800432a: 88bb ldrh r3, [r7, #4]
|
||
800432c: 4413 add r3, r2
|
||
800432e: b29b uxth r3, r3
|
||
8004330: 883a ldrh r2, [r7, #0]
|
||
8004332: 4619 mov r1, r3
|
||
8004334: f7ff feaa bl 800408c <LCD_set_dot>
|
||
LCD_set_dot(x0-b,y0+a,color);
|
||
8004338: 693b ldr r3, [r7, #16]
|
||
800433a: b29b uxth r3, r3
|
||
800433c: 88fa ldrh r2, [r7, #6]
|
||
800433e: 1ad3 subs r3, r2, r3
|
||
8004340: b298 uxth r0, r3
|
||
8004342: 697b ldr r3, [r7, #20]
|
||
8004344: b29a uxth r2, r3
|
||
8004346: 88bb ldrh r3, [r7, #4]
|
||
8004348: 4413 add r3, r2
|
||
800434a: b29b uxth r3, r3
|
||
800434c: 883a ldrh r2, [r7, #0]
|
||
800434e: 4619 mov r1, r3
|
||
8004350: f7ff fe9c bl 800408c <LCD_set_dot>
|
||
LCD_set_dot(x0-a,y0-b,color); //2
|
||
8004354: 697b ldr r3, [r7, #20]
|
||
8004356: b29b uxth r3, r3
|
||
8004358: 88fa ldrh r2, [r7, #6]
|
||
800435a: 1ad3 subs r3, r2, r3
|
||
800435c: b298 uxth r0, r3
|
||
800435e: 693b ldr r3, [r7, #16]
|
||
8004360: b29b uxth r3, r3
|
||
8004362: 88ba ldrh r2, [r7, #4]
|
||
8004364: 1ad3 subs r3, r2, r3
|
||
8004366: b29b uxth r3, r3
|
||
8004368: 883a ldrh r2, [r7, #0]
|
||
800436a: 4619 mov r1, r3
|
||
800436c: f7ff fe8e bl 800408c <LCD_set_dot>
|
||
LCD_set_dot(x0-b,y0-a,color); //7
|
||
8004370: 693b ldr r3, [r7, #16]
|
||
8004372: b29b uxth r3, r3
|
||
8004374: 88fa ldrh r2, [r7, #6]
|
||
8004376: 1ad3 subs r3, r2, r3
|
||
8004378: b298 uxth r0, r3
|
||
800437a: 697b ldr r3, [r7, #20]
|
||
800437c: b29b uxth r3, r3
|
||
800437e: 88ba ldrh r2, [r7, #4]
|
||
8004380: 1ad3 subs r3, r2, r3
|
||
8004382: b29b uxth r3, r3
|
||
8004384: 883a ldrh r2, [r7, #0]
|
||
8004386: 4619 mov r1, r3
|
||
8004388: f7ff fe80 bl 800408c <LCD_set_dot>
|
||
a++;
|
||
800438c: 697b ldr r3, [r7, #20]
|
||
800438e: 3301 adds r3, #1
|
||
8004390: 617b str r3, [r7, #20]
|
||
//ʹ��Bresenham�㷨��Բ
|
||
if(di<0)di +=4*a+6;
|
||
8004392: 68fb ldr r3, [r7, #12]
|
||
8004394: 2b00 cmp r3, #0
|
||
8004396: da06 bge.n 80043a6 <Draw_Circle+0x12c>
|
||
8004398: 697b ldr r3, [r7, #20]
|
||
800439a: 009b lsls r3, r3, #2
|
||
800439c: 3306 adds r3, #6
|
||
800439e: 68fa ldr r2, [r7, #12]
|
||
80043a0: 4413 add r3, r2
|
||
80043a2: 60fb str r3, [r7, #12]
|
||
80043a4: e00a b.n 80043bc <Draw_Circle+0x142>
|
||
else
|
||
{
|
||
di+=10+4*(a-b);
|
||
80043a6: 697a ldr r2, [r7, #20]
|
||
80043a8: 693b ldr r3, [r7, #16]
|
||
80043aa: 1ad3 subs r3, r2, r3
|
||
80043ac: 009b lsls r3, r3, #2
|
||
80043ae: 330a adds r3, #10
|
||
80043b0: 68fa ldr r2, [r7, #12]
|
||
80043b2: 4413 add r3, r2
|
||
80043b4: 60fb str r3, [r7, #12]
|
||
b--;
|
||
80043b6: 693b ldr r3, [r7, #16]
|
||
80043b8: 3b01 subs r3, #1
|
||
80043ba: 613b str r3, [r7, #16]
|
||
while(a<=b)
|
||
80043bc: 697a ldr r2, [r7, #20]
|
||
80043be: 693b ldr r3, [r7, #16]
|
||
80043c0: 429a cmp r2, r3
|
||
80043c2: f77f af73 ble.w 80042ac <Draw_Circle+0x32>
|
||
}
|
||
}
|
||
}
|
||
80043c6: bf00 nop
|
||
80043c8: bf00 nop
|
||
80043ca: 371c adds r7, #28
|
||
80043cc: 46bd mov sp, r7
|
||
80043ce: bd90 pop {r4, r7, pc}
|
||
|
||
080043d0 <LCD_ShowChar>:
|
||
//num:Ҫ��ʾ���ַ�:" "--->"~"
|
||
//size:������С 12/16
|
||
//mode:���ӷ�ʽ(1)���Ƿǵ��ӷ�ʽ(0)
|
||
|
||
void LCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint16_t bg,uint16_t color)
|
||
{
|
||
80043d0: b590 push {r4, r7, lr}
|
||
80043d2: b085 sub sp, #20
|
||
80043d4: af00 add r7, sp, #0
|
||
80043d6: 4604 mov r4, r0
|
||
80043d8: 4608 mov r0, r1
|
||
80043da: 4611 mov r1, r2
|
||
80043dc: 461a mov r2, r3
|
||
80043de: 4623 mov r3, r4
|
||
80043e0: 80fb strh r3, [r7, #6]
|
||
80043e2: 4603 mov r3, r0
|
||
80043e4: 80bb strh r3, [r7, #4]
|
||
80043e6: 460b mov r3, r1
|
||
80043e8: 70fb strb r3, [r7, #3]
|
||
80043ea: 4613 mov r3, r2
|
||
80043ec: 70bb strb r3, [r7, #2]
|
||
uint8_t temp,t1,t;
|
||
uint16_t y0=y;
|
||
80043ee: 88bb ldrh r3, [r7, #4]
|
||
80043f0: 817b strh r3, [r7, #10]
|
||
|
||
//����
|
||
num=num-' ';//�õ�ƫ�ƺ���ֵ
|
||
80043f2: 78fb ldrb r3, [r7, #3]
|
||
80043f4: 3b20 subs r3, #32
|
||
80043f6: 70fb strb r3, [r7, #3]
|
||
|
||
for(t=0;t<size;t++)
|
||
80043f8: 2300 movs r3, #0
|
||
80043fa: 737b strb r3, [r7, #13]
|
||
80043fc: e055 b.n 80044aa <LCD_ShowChar+0xda>
|
||
{
|
||
if(size==12){temp=asc2_1206[num][t];} //����1206����
|
||
80043fe: 78bb ldrb r3, [r7, #2]
|
||
8004400: 2b0c cmp r3, #12
|
||
8004402: d10b bne.n 800441c <LCD_ShowChar+0x4c>
|
||
8004404: 78fa ldrb r2, [r7, #3]
|
||
8004406: 7b79 ldrb r1, [r7, #13]
|
||
8004408: 482c ldr r0, [pc, #176] ; (80044bc <LCD_ShowChar+0xec>)
|
||
800440a: 4613 mov r3, r2
|
||
800440c: 005b lsls r3, r3, #1
|
||
800440e: 4413 add r3, r2
|
||
8004410: 009b lsls r3, r3, #2
|
||
8004412: 4403 add r3, r0
|
||
8004414: 440b add r3, r1
|
||
8004416: 781b ldrb r3, [r3, #0]
|
||
8004418: 73fb strb r3, [r7, #15]
|
||
800441a: e007 b.n 800442c <LCD_ShowChar+0x5c>
|
||
else{ temp=asc2_1608[num][t]; } //����1608����
|
||
800441c: 78fa ldrb r2, [r7, #3]
|
||
800441e: 7b7b ldrb r3, [r7, #13]
|
||
8004420: 4927 ldr r1, [pc, #156] ; (80044c0 <LCD_ShowChar+0xf0>)
|
||
8004422: 0112 lsls r2, r2, #4
|
||
8004424: 440a add r2, r1
|
||
8004426: 4413 add r3, r2
|
||
8004428: 781b ldrb r3, [r3, #0]
|
||
800442a: 73fb strb r3, [r7, #15]
|
||
for(t1=0;t1<8;t1++)
|
||
800442c: 2300 movs r3, #0
|
||
800442e: 73bb strb r3, [r7, #14]
|
||
8004430: e033 b.n 800449a <LCD_ShowChar+0xca>
|
||
{
|
||
if(temp&0x80){LCD_set_dot(x,y,color);}else{if(bg!=color){LCD_set_dot(x,y,bg);}}
|
||
8004432: f997 300f ldrsb.w r3, [r7, #15]
|
||
8004436: 2b00 cmp r3, #0
|
||
8004438: da06 bge.n 8004448 <LCD_ShowChar+0x78>
|
||
800443a: 8cba ldrh r2, [r7, #36] ; 0x24
|
||
800443c: 88b9 ldrh r1, [r7, #4]
|
||
800443e: 88fb ldrh r3, [r7, #6]
|
||
8004440: 4618 mov r0, r3
|
||
8004442: f7ff fe23 bl 800408c <LCD_set_dot>
|
||
8004446: e009 b.n 800445c <LCD_ShowChar+0x8c>
|
||
8004448: 8c3a ldrh r2, [r7, #32]
|
||
800444a: 8cbb ldrh r3, [r7, #36] ; 0x24
|
||
800444c: 429a cmp r2, r3
|
||
800444e: d005 beq.n 800445c <LCD_ShowChar+0x8c>
|
||
8004450: 8c3a ldrh r2, [r7, #32]
|
||
8004452: 88b9 ldrh r1, [r7, #4]
|
||
8004454: 88fb ldrh r3, [r7, #6]
|
||
8004456: 4618 mov r0, r3
|
||
8004458: f7ff fe18 bl 800408c <LCD_set_dot>
|
||
temp<<=1;
|
||
800445c: 7bfb ldrb r3, [r7, #15]
|
||
800445e: 005b lsls r3, r3, #1
|
||
8004460: 73fb strb r3, [r7, #15]
|
||
y++;
|
||
8004462: 88bb ldrh r3, [r7, #4]
|
||
8004464: 3301 adds r3, #1
|
||
8004466: 80bb strh r3, [r7, #4]
|
||
if(x>=lcddev.width){return;}//��������
|
||
8004468: 4b16 ldr r3, [pc, #88] ; (80044c4 <LCD_ShowChar+0xf4>)
|
||
800446a: 881b ldrh r3, [r3, #0]
|
||
800446c: 88fa ldrh r2, [r7, #6]
|
||
800446e: 429a cmp r2, r3
|
||
8004470: d220 bcs.n 80044b4 <LCD_ShowChar+0xe4>
|
||
if((y-y0)==size)
|
||
8004472: 88ba ldrh r2, [r7, #4]
|
||
8004474: 897b ldrh r3, [r7, #10]
|
||
8004476: 1ad2 subs r2, r2, r3
|
||
8004478: 78bb ldrb r3, [r7, #2]
|
||
800447a: 429a cmp r2, r3
|
||
800447c: d10a bne.n 8004494 <LCD_ShowChar+0xc4>
|
||
{
|
||
y=y0;
|
||
800447e: 897b ldrh r3, [r7, #10]
|
||
8004480: 80bb strh r3, [r7, #4]
|
||
x++;
|
||
8004482: 88fb ldrh r3, [r7, #6]
|
||
8004484: 3301 adds r3, #1
|
||
8004486: 80fb strh r3, [r7, #6]
|
||
if(x>=lcddev.width){return;}//��������
|
||
8004488: 4b0e ldr r3, [pc, #56] ; (80044c4 <LCD_ShowChar+0xf4>)
|
||
800448a: 881b ldrh r3, [r3, #0]
|
||
800448c: 88fa ldrh r2, [r7, #6]
|
||
800448e: 429a cmp r2, r3
|
||
8004490: d307 bcc.n 80044a2 <LCD_ShowChar+0xd2>
|
||
8004492: e010 b.n 80044b6 <LCD_ShowChar+0xe6>
|
||
for(t1=0;t1<8;t1++)
|
||
8004494: 7bbb ldrb r3, [r7, #14]
|
||
8004496: 3301 adds r3, #1
|
||
8004498: 73bb strb r3, [r7, #14]
|
||
800449a: 7bbb ldrb r3, [r7, #14]
|
||
800449c: 2b07 cmp r3, #7
|
||
800449e: d9c8 bls.n 8004432 <LCD_ShowChar+0x62>
|
||
80044a0: e000 b.n 80044a4 <LCD_ShowChar+0xd4>
|
||
break;
|
||
80044a2: bf00 nop
|
||
for(t=0;t<size;t++)
|
||
80044a4: 7b7b ldrb r3, [r7, #13]
|
||
80044a6: 3301 adds r3, #1
|
||
80044a8: 737b strb r3, [r7, #13]
|
||
80044aa: 7b7a ldrb r2, [r7, #13]
|
||
80044ac: 78bb ldrb r3, [r7, #2]
|
||
80044ae: 429a cmp r2, r3
|
||
80044b0: d3a5 bcc.n 80043fe <LCD_ShowChar+0x2e>
|
||
80044b2: e000 b.n 80044b6 <LCD_ShowChar+0xe6>
|
||
if(x>=lcddev.width){return;}//��������
|
||
80044b4: bf00 nop
|
||
}
|
||
}
|
||
|
||
|
||
|
||
}
|
||
80044b6: 3714 adds r7, #20
|
||
80044b8: 46bd mov sp, r7
|
||
80044ba: bd90 pop {r4, r7, pc}
|
||
80044bc: 080083d0 .word 0x080083d0
|
||
80044c0: 08008844 .word 0x08008844
|
||
80044c4: 200002a8 .word 0x200002a8
|
||
|
||
080044c8 <LCD_ShowString>:
|
||
//width,height:������С
|
||
//size:������С
|
||
//*p:�ַ�����ʼ��ַ
|
||
|
||
void LCD_ShowString(uint16_t x,uint16_t y,uint8_t *p,uint8_t size,uint16_t bg,uint16_t color)
|
||
{
|
||
80044c8: b590 push {r4, r7, lr}
|
||
80044ca: b087 sub sp, #28
|
||
80044cc: af02 add r7, sp, #8
|
||
80044ce: 60ba str r2, [r7, #8]
|
||
80044d0: 461a mov r2, r3
|
||
80044d2: 4603 mov r3, r0
|
||
80044d4: 81fb strh r3, [r7, #14]
|
||
80044d6: 460b mov r3, r1
|
||
80044d8: 81bb strh r3, [r7, #12]
|
||
80044da: 4613 mov r3, r2
|
||
80044dc: 71fb strb r3, [r7, #7]
|
||
while(*p!='\0')
|
||
80044de: e026 b.n 800452e <LCD_ShowString+0x66>
|
||
{
|
||
|
||
if(x>=lcddev.width||*p=='\n')
|
||
80044e0: 4b17 ldr r3, [pc, #92] ; (8004540 <LCD_ShowString+0x78>)
|
||
80044e2: 881b ldrh r3, [r3, #0]
|
||
80044e4: 89fa ldrh r2, [r7, #14]
|
||
80044e6: 429a cmp r2, r3
|
||
80044e8: d203 bcs.n 80044f2 <LCD_ShowString+0x2a>
|
||
80044ea: 68bb ldr r3, [r7, #8]
|
||
80044ec: 781b ldrb r3, [r3, #0]
|
||
80044ee: 2b0a cmp r3, #10
|
||
80044f0: d107 bne.n 8004502 <LCD_ShowString+0x3a>
|
||
{
|
||
x=0;
|
||
80044f2: 2300 movs r3, #0
|
||
80044f4: 81fb strh r3, [r7, #14]
|
||
y+=size;
|
||
80044f6: 79fb ldrb r3, [r7, #7]
|
||
80044f8: b29a uxth r2, r3
|
||
80044fa: 89bb ldrh r3, [r7, #12]
|
||
80044fc: 4413 add r3, r2
|
||
80044fe: 81bb strh r3, [r7, #12]
|
||
8004500: e012 b.n 8004528 <LCD_ShowString+0x60>
|
||
}else
|
||
{
|
||
LCD_ShowChar(x,y,*p,size,bg,color);
|
||
8004502: 68bb ldr r3, [r7, #8]
|
||
8004504: 781a ldrb r2, [r3, #0]
|
||
8004506: 79fc ldrb r4, [r7, #7]
|
||
8004508: 89b9 ldrh r1, [r7, #12]
|
||
800450a: 89f8 ldrh r0, [r7, #14]
|
||
800450c: 8cbb ldrh r3, [r7, #36] ; 0x24
|
||
800450e: 9301 str r3, [sp, #4]
|
||
8004510: 8c3b ldrh r3, [r7, #32]
|
||
8004512: 9300 str r3, [sp, #0]
|
||
8004514: 4623 mov r3, r4
|
||
8004516: f7ff ff5b bl 80043d0 <LCD_ShowChar>
|
||
x+=(size/2);
|
||
800451a: 79fb ldrb r3, [r7, #7]
|
||
800451c: 085b lsrs r3, r3, #1
|
||
800451e: b2db uxtb r3, r3
|
||
8004520: b29a uxth r2, r3
|
||
8004522: 89fb ldrh r3, [r7, #14]
|
||
8004524: 4413 add r3, r2
|
||
8004526: 81fb strh r3, [r7, #14]
|
||
}
|
||
p++;
|
||
8004528: 68bb ldr r3, [r7, #8]
|
||
800452a: 3301 adds r3, #1
|
||
800452c: 60bb str r3, [r7, #8]
|
||
while(*p!='\0')
|
||
800452e: 68bb ldr r3, [r7, #8]
|
||
8004530: 781b ldrb r3, [r3, #0]
|
||
8004532: 2b00 cmp r3, #0
|
||
8004534: d1d4 bne.n 80044e0 <LCD_ShowString+0x18>
|
||
|
||
}
|
||
}
|
||
8004536: bf00 nop
|
||
8004538: bf00 nop
|
||
800453a: 3714 adds r7, #20
|
||
800453c: 46bd mov sp, r7
|
||
800453e: bd90 pop {r4, r7, pc}
|
||
8004540: 200002a8 .word 0x200002a8
|
||
|
||
08004544 <IIC_SAND_DATE>:
|
||
|
||
//iicӲ���ӿ�
|
||
extern I2C_HandleTypeDef hi2c2;
|
||
|
||
void IIC_SAND_DATE(uint16_t DEVICE_ADD,uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG)
|
||
{
|
||
8004544: b580 push {r7, lr}
|
||
8004546: b088 sub sp, #32
|
||
8004548: af04 add r7, sp, #16
|
||
800454a: 60ba str r2, [r7, #8]
|
||
800454c: 461a mov r2, r3
|
||
800454e: 4603 mov r3, r0
|
||
8004550: 81fb strh r3, [r7, #14]
|
||
8004552: 460b mov r3, r1
|
||
8004554: 81bb strh r3, [r7, #12]
|
||
8004556: 4613 mov r3, r2
|
||
8004558: 80fb strh r3, [r7, #6]
|
||
HAL_I2C_Mem_Write(&hi2c2,DEVICE_ADD,IN_DEVICE_ADD,I2C_MEMADD_SIZE_8BIT,DATAS,LONG,100);
|
||
800455a: 89ba ldrh r2, [r7, #12]
|
||
800455c: 89f9 ldrh r1, [r7, #14]
|
||
800455e: 2364 movs r3, #100 ; 0x64
|
||
8004560: 9302 str r3, [sp, #8]
|
||
8004562: 88fb ldrh r3, [r7, #6]
|
||
8004564: 9301 str r3, [sp, #4]
|
||
8004566: 68bb ldr r3, [r7, #8]
|
||
8004568: 9300 str r3, [sp, #0]
|
||
800456a: 2301 movs r3, #1
|
||
800456c: 4803 ldr r0, [pc, #12] ; (800457c <IIC_SAND_DATE+0x38>)
|
||
800456e: f7fd fda5 bl 80020bc <HAL_I2C_Mem_Write>
|
||
}
|
||
8004572: bf00 nop
|
||
8004574: 3710 adds r7, #16
|
||
8004576: 46bd mov sp, r7
|
||
8004578: bd80 pop {r7, pc}
|
||
800457a: bf00 nop
|
||
800457c: 20000208 .word 0x20000208
|
||
|
||
08004580 <IIC_READ_DATE>:
|
||
|
||
void IIC_READ_DATE(uint16_t DEVICE_ADD,uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG)
|
||
{
|
||
8004580: b580 push {r7, lr}
|
||
8004582: b088 sub sp, #32
|
||
8004584: af04 add r7, sp, #16
|
||
8004586: 60ba str r2, [r7, #8]
|
||
8004588: 461a mov r2, r3
|
||
800458a: 4603 mov r3, r0
|
||
800458c: 81fb strh r3, [r7, #14]
|
||
800458e: 460b mov r3, r1
|
||
8004590: 81bb strh r3, [r7, #12]
|
||
8004592: 4613 mov r3, r2
|
||
8004594: 80fb strh r3, [r7, #6]
|
||
HAL_I2C_Mem_Read(&hi2c2,DEVICE_ADD,IN_DEVICE_ADD,I2C_MEMADD_SIZE_8BIT,DATAS,LONG,100);
|
||
8004596: 89ba ldrh r2, [r7, #12]
|
||
8004598: 89f9 ldrh r1, [r7, #14]
|
||
800459a: 2364 movs r3, #100 ; 0x64
|
||
800459c: 9302 str r3, [sp, #8]
|
||
800459e: 88fb ldrh r3, [r7, #6]
|
||
80045a0: 9301 str r3, [sp, #4]
|
||
80045a2: 68bb ldr r3, [r7, #8]
|
||
80045a4: 9300 str r3, [sp, #0]
|
||
80045a6: 2301 movs r3, #1
|
||
80045a8: 4803 ldr r0, [pc, #12] ; (80045b8 <IIC_READ_DATE+0x38>)
|
||
80045aa: f7fd fe81 bl 80022b0 <HAL_I2C_Mem_Read>
|
||
}
|
||
80045ae: bf00 nop
|
||
80045b0: 3710 adds r7, #16
|
||
80045b2: 46bd mov sp, r7
|
||
80045b4: bd80 pop {r7, pc}
|
||
80045b6: bf00 nop
|
||
80045b8: 20000208 .word 0x20000208
|
||
|
||
080045bc <EPPROM_SLOWWRITE_INIT>:
|
||
//��ΪeepromоƬ��д���ٶ����ޣ�ÿд��һ���ַ�����Ҫ�ȴ�һ��ʱ����������д��
|
||
//����ϵͳ�����ܵ���һ���ģ���ͳ�Ľ�����������ʹ�ö�ʱ���жϻ��߶��߳̿����������ں�̨���棬
|
||
//�����Ľ���������ʹ��״̬����ͨ��һ��������Ҫ���������ݴ���������ͨ��״̬ѭ��һ�������棬������ʱ����ѭ����ʱ��
|
||
eeprom_write_buff_info eeprom_write_buffer; //��������
|
||
void EPPROM_SLOWWRITE_INIT() //��ʼ������
|
||
{
|
||
80045bc: b480 push {r7}
|
||
80045be: af00 add r7, sp, #0
|
||
eeprom_write_buffer.buff=NULL;
|
||
80045c0: 4b0a ldr r3, [pc, #40] ; (80045ec <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
80045c2: 2200 movs r2, #0
|
||
80045c4: 601a str r2, [r3, #0]
|
||
eeprom_write_buffer.end=NULL;
|
||
80045c6: 4b09 ldr r3, [pc, #36] ; (80045ec <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
80045c8: 2200 movs r2, #0
|
||
80045ca: 609a str r2, [r3, #8]
|
||
eeprom_write_buffer.head=NULL;
|
||
80045cc: 4b07 ldr r3, [pc, #28] ; (80045ec <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
80045ce: 2200 movs r2, #0
|
||
80045d0: 605a str r2, [r3, #4]
|
||
eeprom_write_buffer.save_timeout=5; //����״̬��ѭ�����쵼�µı���ʧ�ܣ�������������ʱ�����о�û��Ҫд�����̫�˷ѿռ��ˣ�
|
||
80045d2: 4b06 ldr r3, [pc, #24] ; (80045ec <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
80045d4: 2205 movs r2, #5
|
||
80045d6: 741a strb r2, [r3, #16]
|
||
eeprom_write_buffer.save_busy=0; //��С��ʱ��Ϊæ״̬
|
||
80045d8: 4a04 ldr r2, [pc, #16] ; (80045ec <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
80045da: 7c53 ldrb r3, [r2, #17]
|
||
80045dc: f36f 0300 bfc r3, #0, #1
|
||
80045e0: 7453 strb r3, [r2, #17]
|
||
}
|
||
80045e2: bf00 nop
|
||
80045e4: 46bd mov sp, r7
|
||
80045e6: bc80 pop {r7}
|
||
80045e8: 4770 bx lr
|
||
80045ea: bf00 nop
|
||
80045ec: 200002b4 .word 0x200002b4
|
||
|
||
080045f0 <EEPROM_SLOWWRITE_SERVER>:
|
||
|
||
//ѭ����������������ͷ�Ƿ��������Ƿ�æ��
|
||
void EEPROM_SLOWWRITE_SERVER()
|
||
{
|
||
80045f0: b580 push {r7, lr}
|
||
80045f2: b082 sub sp, #8
|
||
80045f4: af00 add r7, sp, #0
|
||
eeprom_write_buff *buff;
|
||
char data;
|
||
if(eeprom_write_buffer.save_busy)
|
||
80045f6: 4b20 ldr r3, [pc, #128] ; (8004678 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
80045f8: 7c5b ldrb r3, [r3, #17]
|
||
80045fa: f003 0301 and.w r3, r3, #1
|
||
80045fe: b2db uxtb r3, r3
|
||
8004600: 2b00 cmp r3, #0
|
||
8004602: d00c beq.n 800461e <EEPROM_SLOWWRITE_SERVER+0x2e>
|
||
{
|
||
if(HAL_GetTick()>eeprom_write_buffer.save_time)
|
||
8004604: f7fd f940 bl 8001888 <HAL_GetTick>
|
||
8004608: 4602 mov r2, r0
|
||
800460a: 4b1b ldr r3, [pc, #108] ; (8004678 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
800460c: 68db ldr r3, [r3, #12]
|
||
800460e: 429a cmp r2, r3
|
||
8004610: d92e bls.n 8004670 <EEPROM_SLOWWRITE_SERVER+0x80>
|
||
{
|
||
eeprom_write_buffer.save_busy=0;
|
||
8004612: 4a19 ldr r2, [pc, #100] ; (8004678 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004614: 7c53 ldrb r3, [r2, #17]
|
||
8004616: f36f 0300 bfc r3, #0, #1
|
||
800461a: 7453 strb r3, [r2, #17]
|
||
free(eeprom_write_buffer.head);
|
||
eeprom_write_buffer.head=buff;
|
||
}
|
||
|
||
}
|
||
}
|
||
800461c: e028 b.n 8004670 <EEPROM_SLOWWRITE_SERVER+0x80>
|
||
if(eeprom_write_buffer.head!=NULL)
|
||
800461e: 4b16 ldr r3, [pc, #88] ; (8004678 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004620: 685b ldr r3, [r3, #4]
|
||
8004622: 2b00 cmp r3, #0
|
||
8004624: d024 beq.n 8004670 <EEPROM_SLOWWRITE_SERVER+0x80>
|
||
eeprom_write_buffer.save_busy=1;
|
||
8004626: 4a14 ldr r2, [pc, #80] ; (8004678 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004628: 7c53 ldrb r3, [r2, #17]
|
||
800462a: f043 0301 orr.w r3, r3, #1
|
||
800462e: 7453 strb r3, [r2, #17]
|
||
eeprom_write_buffer.save_time=HAL_GetTick()+eeprom_write_buffer.save_timeout;
|
||
8004630: f7fd f92a bl 8001888 <HAL_GetTick>
|
||
8004634: 4603 mov r3, r0
|
||
8004636: 4a10 ldr r2, [pc, #64] ; (8004678 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004638: 7c12 ldrb r2, [r2, #16]
|
||
800463a: 4413 add r3, r2
|
||
800463c: 4a0e ldr r2, [pc, #56] ; (8004678 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
800463e: 60d3 str r3, [r2, #12]
|
||
buff=eeprom_write_buffer.head->next;
|
||
8004640: 4b0d ldr r3, [pc, #52] ; (8004678 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004642: 685b ldr r3, [r3, #4]
|
||
8004644: 681b ldr r3, [r3, #0]
|
||
8004646: 607b str r3, [r7, #4]
|
||
data=eeprom_write_buffer.head->date;
|
||
8004648: 4b0b ldr r3, [pc, #44] ; (8004678 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
800464a: 685b ldr r3, [r3, #4]
|
||
800464c: 799b ldrb r3, [r3, #6]
|
||
800464e: 70fb strb r3, [r7, #3]
|
||
IIC_SAND_DATE(EEPROM_ADDRESS,eeprom_write_buffer.head->add,&data,1);
|
||
8004650: 4b09 ldr r3, [pc, #36] ; (8004678 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004652: 685b ldr r3, [r3, #4]
|
||
8004654: 8899 ldrh r1, [r3, #4]
|
||
8004656: 1cfa adds r2, r7, #3
|
||
8004658: 2301 movs r3, #1
|
||
800465a: 20a0 movs r0, #160 ; 0xa0
|
||
800465c: f7ff ff72 bl 8004544 <IIC_SAND_DATE>
|
||
free(eeprom_write_buffer.head);
|
||
8004660: 4b05 ldr r3, [pc, #20] ; (8004678 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004662: 685b ldr r3, [r3, #4]
|
||
8004664: 4618 mov r0, r3
|
||
8004666: f000 ff85 bl 8005574 <free>
|
||
eeprom_write_buffer.head=buff;
|
||
800466a: 4a03 ldr r2, [pc, #12] ; (8004678 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
800466c: 687b ldr r3, [r7, #4]
|
||
800466e: 6053 str r3, [r2, #4]
|
||
}
|
||
8004670: bf00 nop
|
||
8004672: 3708 adds r7, #8
|
||
8004674: 46bd mov sp, r7
|
||
8004676: bd80 pop {r7, pc}
|
||
8004678: 200002b4 .word 0x200002b4
|
||
|
||
0800467c <EEPROM_READ_BATY>:
|
||
|
||
//��eeprom��ȡ����
|
||
void EEPROM_READ_BATY(uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG)
|
||
{
|
||
800467c: b580 push {r7, lr}
|
||
800467e: b082 sub sp, #8
|
||
8004680: af00 add r7, sp, #0
|
||
8004682: 4603 mov r3, r0
|
||
8004684: 6039 str r1, [r7, #0]
|
||
8004686: 80fb strh r3, [r7, #6]
|
||
8004688: 4613 mov r3, r2
|
||
800468a: 80bb strh r3, [r7, #4]
|
||
IIC_READ_DATE(EEPROM_ADDRESS,IN_DEVICE_ADD,DATAS,LONG);
|
||
800468c: 88bb ldrh r3, [r7, #4]
|
||
800468e: 88f9 ldrh r1, [r7, #6]
|
||
8004690: 683a ldr r2, [r7, #0]
|
||
8004692: 20a0 movs r0, #160 ; 0xa0
|
||
8004694: f7ff ff74 bl 8004580 <IIC_READ_DATE>
|
||
}
|
||
8004698: bf00 nop
|
||
800469a: 3708 adds r7, #8
|
||
800469c: 46bd mov sp, r7
|
||
800469e: bd80 pop {r7, pc}
|
||
|
||
080046a0 <EEPROM_WRITE_BATY>:
|
||
//��eeprom�����
|
||
void EEPROM_WRITE_BATY(uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG)
|
||
{
|
||
80046a0: b580 push {r7, lr}
|
||
80046a2: b086 sub sp, #24
|
||
80046a4: af00 add r7, sp, #0
|
||
80046a6: 4603 mov r3, r0
|
||
80046a8: 6039 str r1, [r7, #0]
|
||
80046aa: 80fb strh r3, [r7, #6]
|
||
80046ac: 4613 mov r3, r2
|
||
80046ae: 80bb strh r3, [r7, #4]
|
||
//IIC_SAND_DATE(EEPROM_ADDRESS,IN_DEVICE_ADD,DATAS,LONG);
|
||
uint16_t addoffset=0;
|
||
80046b0: 2300 movs r3, #0
|
||
80046b2: 82fb strh r3, [r7, #22]
|
||
|
||
|
||
eeprom_write_buff *buff;
|
||
eeprom_write_buff *buff2;
|
||
while(LONG--)
|
||
80046b4: e02d b.n 8004712 <EEPROM_WRITE_BATY+0x72>
|
||
{
|
||
buff =(eeprom_write_buff*)malloc(sizeof(eeprom_write_buff));
|
||
80046b6: 2008 movs r0, #8
|
||
80046b8: f000 ff54 bl 8005564 <malloc>
|
||
80046bc: 4603 mov r3, r0
|
||
80046be: 613b str r3, [r7, #16]
|
||
if(buff!=NULL)
|
||
80046c0: 693b ldr r3, [r7, #16]
|
||
80046c2: 2b00 cmp r3, #0
|
||
80046c4: d02b beq.n 800471e <EEPROM_WRITE_BATY+0x7e>
|
||
{
|
||
buff->add=IN_DEVICE_ADD+addoffset;
|
||
80046c6: 88fa ldrh r2, [r7, #6]
|
||
80046c8: 8afb ldrh r3, [r7, #22]
|
||
80046ca: 4413 add r3, r2
|
||
80046cc: b29a uxth r2, r3
|
||
80046ce: 693b ldr r3, [r7, #16]
|
||
80046d0: 809a strh r2, [r3, #4]
|
||
buff->date=DATAS[addoffset];
|
||
80046d2: 8afb ldrh r3, [r7, #22]
|
||
80046d4: 683a ldr r2, [r7, #0]
|
||
80046d6: 4413 add r3, r2
|
||
80046d8: 781a ldrb r2, [r3, #0]
|
||
80046da: 693b ldr r3, [r7, #16]
|
||
80046dc: 719a strb r2, [r3, #6]
|
||
buff->next=NULL;
|
||
80046de: 693b ldr r3, [r7, #16]
|
||
80046e0: 2200 movs r2, #0
|
||
80046e2: 601a str r2, [r3, #0]
|
||
}else{return ;}
|
||
if(eeprom_write_buffer.head==NULL)
|
||
80046e4: 4b10 ldr r3, [pc, #64] ; (8004728 <EEPROM_WRITE_BATY+0x88>)
|
||
80046e6: 685b ldr r3, [r3, #4]
|
||
80046e8: 2b00 cmp r3, #0
|
||
80046ea: d106 bne.n 80046fa <EEPROM_WRITE_BATY+0x5a>
|
||
{
|
||
eeprom_write_buffer.head=buff;
|
||
80046ec: 4a0e ldr r2, [pc, #56] ; (8004728 <EEPROM_WRITE_BATY+0x88>)
|
||
80046ee: 693b ldr r3, [r7, #16]
|
||
80046f0: 6053 str r3, [r2, #4]
|
||
eeprom_write_buffer.end=buff;
|
||
80046f2: 4a0d ldr r2, [pc, #52] ; (8004728 <EEPROM_WRITE_BATY+0x88>)
|
||
80046f4: 693b ldr r3, [r7, #16]
|
||
80046f6: 6093 str r3, [r2, #8]
|
||
80046f8: e008 b.n 800470c <EEPROM_WRITE_BATY+0x6c>
|
||
}else
|
||
{
|
||
buff2=eeprom_write_buffer.end;
|
||
80046fa: 4b0b ldr r3, [pc, #44] ; (8004728 <EEPROM_WRITE_BATY+0x88>)
|
||
80046fc: 689b ldr r3, [r3, #8]
|
||
80046fe: 60fb str r3, [r7, #12]
|
||
buff2->next=buff;
|
||
8004700: 68fb ldr r3, [r7, #12]
|
||
8004702: 693a ldr r2, [r7, #16]
|
||
8004704: 601a str r2, [r3, #0]
|
||
eeprom_write_buffer.end=buff;
|
||
8004706: 4a08 ldr r2, [pc, #32] ; (8004728 <EEPROM_WRITE_BATY+0x88>)
|
||
8004708: 693b ldr r3, [r7, #16]
|
||
800470a: 6093 str r3, [r2, #8]
|
||
}
|
||
addoffset++;
|
||
800470c: 8afb ldrh r3, [r7, #22]
|
||
800470e: 3301 adds r3, #1
|
||
8004710: 82fb strh r3, [r7, #22]
|
||
while(LONG--)
|
||
8004712: 88bb ldrh r3, [r7, #4]
|
||
8004714: 1e5a subs r2, r3, #1
|
||
8004716: 80ba strh r2, [r7, #4]
|
||
8004718: 2b00 cmp r3, #0
|
||
800471a: d1cc bne.n 80046b6 <EEPROM_WRITE_BATY+0x16>
|
||
800471c: e000 b.n 8004720 <EEPROM_WRITE_BATY+0x80>
|
||
}else{return ;}
|
||
800471e: bf00 nop
|
||
}
|
||
|
||
}
|
||
8004720: 3718 adds r7, #24
|
||
8004722: 46bd mov sp, r7
|
||
8004724: bd80 pop {r7, pc}
|
||
8004726: bf00 nop
|
||
8004728: 200002b4 .word 0x200002b4
|
||
|
||
0800472c <TP_Write_Byte>:
|
||
|
||
//SPI���
|
||
//��������IC�1byte����
|
||
//num:Ҫд��������
|
||
void TP_Write_Byte(char num)
|
||
{
|
||
800472c: b580 push {r7, lr}
|
||
800472e: b084 sub sp, #16
|
||
8004730: af00 add r7, sp, #0
|
||
8004732: 4603 mov r3, r0
|
||
8004734: 71fb strb r3, [r7, #7]
|
||
for(uint8_t count=0;count<8;count++)
|
||
8004736: 2300 movs r3, #0
|
||
8004738: 73fb strb r3, [r7, #15]
|
||
800473a: e020 b.n 800477e <TP_Write_Byte+0x52>
|
||
{
|
||
if(num&0x80){TDIN(1);}
|
||
800473c: f997 3007 ldrsb.w r3, [r7, #7]
|
||
8004740: 2b00 cmp r3, #0
|
||
8004742: da06 bge.n 8004752 <TP_Write_Byte+0x26>
|
||
8004744: 2201 movs r2, #1
|
||
8004746: f44f 7100 mov.w r1, #512 ; 0x200
|
||
800474a: 4811 ldr r0, [pc, #68] ; (8004790 <TP_Write_Byte+0x64>)
|
||
800474c: f7fd fb59 bl 8001e02 <HAL_GPIO_WritePin>
|
||
8004750: e005 b.n 800475e <TP_Write_Byte+0x32>
|
||
else {TDIN(0);}
|
||
8004752: 2200 movs r2, #0
|
||
8004754: f44f 7100 mov.w r1, #512 ; 0x200
|
||
8004758: 480d ldr r0, [pc, #52] ; (8004790 <TP_Write_Byte+0x64>)
|
||
800475a: f7fd fb52 bl 8001e02 <HAL_GPIO_WritePin>
|
||
num<<=1;
|
||
800475e: 79fb ldrb r3, [r7, #7]
|
||
8004760: 005b lsls r3, r3, #1
|
||
8004762: 71fb strb r3, [r7, #7]
|
||
TCLK(0);
|
||
8004764: 2200 movs r2, #0
|
||
8004766: 2102 movs r1, #2
|
||
8004768: 480a ldr r0, [pc, #40] ; (8004794 <TP_Write_Byte+0x68>)
|
||
800476a: f7fd fb4a bl 8001e02 <HAL_GPIO_WritePin>
|
||
TCLK(1); //��������Ч
|
||
800476e: 2201 movs r2, #1
|
||
8004770: 2102 movs r1, #2
|
||
8004772: 4808 ldr r0, [pc, #32] ; (8004794 <TP_Write_Byte+0x68>)
|
||
8004774: f7fd fb45 bl 8001e02 <HAL_GPIO_WritePin>
|
||
for(uint8_t count=0;count<8;count++)
|
||
8004778: 7bfb ldrb r3, [r7, #15]
|
||
800477a: 3301 adds r3, #1
|
||
800477c: 73fb strb r3, [r7, #15]
|
||
800477e: 7bfb ldrb r3, [r7, #15]
|
||
8004780: 2b07 cmp r3, #7
|
||
8004782: d9db bls.n 800473c <TP_Write_Byte+0x10>
|
||
}
|
||
}
|
||
8004784: bf00 nop
|
||
8004786: bf00 nop
|
||
8004788: 3710 adds r7, #16
|
||
800478a: 46bd mov sp, r7
|
||
800478c: bd80 pop {r7, pc}
|
||
800478e: bf00 nop
|
||
8004790: 40011c00 .word 0x40011c00
|
||
8004794: 40010c00 .word 0x40010c00
|
||
|
||
08004798 <TP_Read_AD>:
|
||
//SPI������
|
||
//�Ӵ�����IC��ȡadcֵ
|
||
//CMD:ָ��
|
||
//����ֵ:����������
|
||
uint16_t TP_Read_AD(char CMD)
|
||
{
|
||
8004798: b580 push {r7, lr}
|
||
800479a: b084 sub sp, #16
|
||
800479c: af00 add r7, sp, #0
|
||
800479e: 4603 mov r3, r0
|
||
80047a0: 71fb strb r3, [r7, #7]
|
||
uint16_t Num=0;
|
||
80047a2: 2300 movs r3, #0
|
||
80047a4: 81fb strh r3, [r7, #14]
|
||
TCLK(0); //������ʱ��
|
||
80047a6: 2200 movs r2, #0
|
||
80047a8: 2102 movs r1, #2
|
||
80047aa: 482b ldr r0, [pc, #172] ; (8004858 <TP_Read_AD+0xc0>)
|
||
80047ac: f7fd fb29 bl 8001e02 <HAL_GPIO_WritePin>
|
||
TDIN(0); //����������
|
||
80047b0: 2200 movs r2, #0
|
||
80047b2: f44f 7100 mov.w r1, #512 ; 0x200
|
||
80047b6: 4829 ldr r0, [pc, #164] ; (800485c <TP_Read_AD+0xc4>)
|
||
80047b8: f7fd fb23 bl 8001e02 <HAL_GPIO_WritePin>
|
||
TCS(0); //ѡ�д�����IC
|
||
80047bc: 2200 movs r2, #0
|
||
80047be: 2104 movs r1, #4
|
||
80047c0: 4825 ldr r0, [pc, #148] ; (8004858 <TP_Read_AD+0xc0>)
|
||
80047c2: f7fd fb1e bl 8001e02 <HAL_GPIO_WritePin>
|
||
TP_Write_Byte(CMD);//����������
|
||
80047c6: 79fb ldrb r3, [r7, #7]
|
||
80047c8: 4618 mov r0, r3
|
||
80047ca: f7ff ffaf bl 800472c <TP_Write_Byte>
|
||
HAL_GetTick();
|
||
80047ce: f7fd f85b bl 8001888 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80047d2: f7fd f859 bl 8001888 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80047d6: f7fd f857 bl 8001888 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80047da: f7fd f855 bl 8001888 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80047de: f7fd f853 bl 8001888 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80047e2: f7fd f851 bl 8001888 <HAL_GetTick>
|
||
TCLK(1); //��1��ʱ�ӣ�����BUSY
|
||
80047e6: 2201 movs r2, #1
|
||
80047e8: 2102 movs r1, #2
|
||
80047ea: 481b ldr r0, [pc, #108] ; (8004858 <TP_Read_AD+0xc0>)
|
||
80047ec: f7fd fb09 bl 8001e02 <HAL_GPIO_WritePin>
|
||
TCLK(0);
|
||
80047f0: 2200 movs r2, #0
|
||
80047f2: 2102 movs r1, #2
|
||
80047f4: 4818 ldr r0, [pc, #96] ; (8004858 <TP_Read_AD+0xc0>)
|
||
80047f6: f7fd fb04 bl 8001e02 <HAL_GPIO_WritePin>
|
||
for(uint8_t count=0;count<16;count++)//����16λ����,ֻ�и�12λ��Ч
|
||
80047fa: 2300 movs r3, #0
|
||
80047fc: 737b strb r3, [r7, #13]
|
||
80047fe: e01a b.n 8004836 <TP_Read_AD+0x9e>
|
||
{
|
||
Num<<=1;
|
||
8004800: 89fb ldrh r3, [r7, #14]
|
||
8004802: 005b lsls r3, r3, #1
|
||
8004804: 81fb strh r3, [r7, #14]
|
||
TCLK(0); //�½�����Ч
|
||
8004806: 2200 movs r2, #0
|
||
8004808: 2102 movs r1, #2
|
||
800480a: 4813 ldr r0, [pc, #76] ; (8004858 <TP_Read_AD+0xc0>)
|
||
800480c: f7fd faf9 bl 8001e02 <HAL_GPIO_WritePin>
|
||
TCLK(1);;
|
||
8004810: 2201 movs r2, #1
|
||
8004812: 2102 movs r1, #2
|
||
8004814: 4810 ldr r0, [pc, #64] ; (8004858 <TP_Read_AD+0xc0>)
|
||
8004816: f7fd faf4 bl 8001e02 <HAL_GPIO_WritePin>
|
||
if(TDOUT){Num++;}
|
||
800481a: f44f 7180 mov.w r1, #256 ; 0x100
|
||
800481e: 480f ldr r0, [pc, #60] ; (800485c <TP_Read_AD+0xc4>)
|
||
8004820: f7fd fad8 bl 8001dd4 <HAL_GPIO_ReadPin>
|
||
8004824: 4603 mov r3, r0
|
||
8004826: 2b00 cmp r3, #0
|
||
8004828: d002 beq.n 8004830 <TP_Read_AD+0x98>
|
||
800482a: 89fb ldrh r3, [r7, #14]
|
||
800482c: 3301 adds r3, #1
|
||
800482e: 81fb strh r3, [r7, #14]
|
||
for(uint8_t count=0;count<16;count++)//����16λ����,ֻ�и�12λ��Ч
|
||
8004830: 7b7b ldrb r3, [r7, #13]
|
||
8004832: 3301 adds r3, #1
|
||
8004834: 737b strb r3, [r7, #13]
|
||
8004836: 7b7b ldrb r3, [r7, #13]
|
||
8004838: 2b0f cmp r3, #15
|
||
800483a: d9e1 bls.n 8004800 <TP_Read_AD+0x68>
|
||
}
|
||
Num>>=4; //ֻ�и�12λ��Ч.
|
||
800483c: 89fb ldrh r3, [r7, #14]
|
||
800483e: 091b lsrs r3, r3, #4
|
||
8004840: 81fb strh r3, [r7, #14]
|
||
TCS(1); //�ͷ�Ƭѡ
|
||
8004842: 2201 movs r2, #1
|
||
8004844: 2104 movs r1, #4
|
||
8004846: 4804 ldr r0, [pc, #16] ; (8004858 <TP_Read_AD+0xc0>)
|
||
8004848: f7fd fadb bl 8001e02 <HAL_GPIO_WritePin>
|
||
return(Num);
|
||
800484c: 89fb ldrh r3, [r7, #14]
|
||
}
|
||
800484e: 4618 mov r0, r3
|
||
8004850: 3710 adds r7, #16
|
||
8004852: 46bd mov sp, r7
|
||
8004854: bd80 pop {r7, pc}
|
||
8004856: bf00 nop
|
||
8004858: 40010c00 .word 0x40010c00
|
||
800485c: 40011c00 .word 0x40011c00
|
||
|
||
08004860 <TP_Read_XOY>:
|
||
//xy:ָ�CMD_RDX/CMD_RDY��
|
||
//����ֵ:����������
|
||
#define READ_TIMES 5 //��ȡ����
|
||
#define LOST_VAL 1 //����ֵ
|
||
uint16_t TP_Read_XOY(uint8_t xy)
|
||
{
|
||
8004860: b590 push {r4, r7, lr}
|
||
8004862: b089 sub sp, #36 ; 0x24
|
||
8004864: af00 add r7, sp, #0
|
||
8004866: 4603 mov r3, r0
|
||
8004868: 71fb strb r3, [r7, #7]
|
||
uint16_t i, j;
|
||
uint16_t buf[READ_TIMES];
|
||
uint16_t sum=0;
|
||
800486a: 2300 movs r3, #0
|
||
800486c: 837b strh r3, [r7, #26]
|
||
uint16_t temp;
|
||
for(i=0;i<READ_TIMES;i++)buf[i]=TP_Read_AD(xy);
|
||
800486e: 2300 movs r3, #0
|
||
8004870: 83fb strh r3, [r7, #30]
|
||
8004872: e00f b.n 8004894 <TP_Read_XOY+0x34>
|
||
8004874: 8bfc ldrh r4, [r7, #30]
|
||
8004876: 79fb ldrb r3, [r7, #7]
|
||
8004878: 4618 mov r0, r3
|
||
800487a: f7ff ff8d bl 8004798 <TP_Read_AD>
|
||
800487e: 4603 mov r3, r0
|
||
8004880: 461a mov r2, r3
|
||
8004882: 0063 lsls r3, r4, #1
|
||
8004884: f107 0120 add.w r1, r7, #32
|
||
8004888: 440b add r3, r1
|
||
800488a: f823 2c14 strh.w r2, [r3, #-20]
|
||
800488e: 8bfb ldrh r3, [r7, #30]
|
||
8004890: 3301 adds r3, #1
|
||
8004892: 83fb strh r3, [r7, #30]
|
||
8004894: 8bfb ldrh r3, [r7, #30]
|
||
8004896: 2b04 cmp r3, #4
|
||
8004898: d9ec bls.n 8004874 <TP_Read_XOY+0x14>
|
||
for(i=0;i<READ_TIMES-1; i++)//����
|
||
800489a: 2300 movs r3, #0
|
||
800489c: 83fb strh r3, [r7, #30]
|
||
800489e: e03b b.n 8004918 <TP_Read_XOY+0xb8>
|
||
{
|
||
for(j=i+1;j<READ_TIMES;j++)
|
||
80048a0: 8bfb ldrh r3, [r7, #30]
|
||
80048a2: 3301 adds r3, #1
|
||
80048a4: 83bb strh r3, [r7, #28]
|
||
80048a6: e031 b.n 800490c <TP_Read_XOY+0xac>
|
||
{
|
||
if(buf[i]>buf[j])//��������
|
||
80048a8: 8bfb ldrh r3, [r7, #30]
|
||
80048aa: 005b lsls r3, r3, #1
|
||
80048ac: f107 0220 add.w r2, r7, #32
|
||
80048b0: 4413 add r3, r2
|
||
80048b2: f833 2c14 ldrh.w r2, [r3, #-20]
|
||
80048b6: 8bbb ldrh r3, [r7, #28]
|
||
80048b8: 005b lsls r3, r3, #1
|
||
80048ba: f107 0120 add.w r1, r7, #32
|
||
80048be: 440b add r3, r1
|
||
80048c0: f833 3c14 ldrh.w r3, [r3, #-20]
|
||
80048c4: 429a cmp r2, r3
|
||
80048c6: d91e bls.n 8004906 <TP_Read_XOY+0xa6>
|
||
{
|
||
temp=buf[i];
|
||
80048c8: 8bfb ldrh r3, [r7, #30]
|
||
80048ca: 005b lsls r3, r3, #1
|
||
80048cc: f107 0220 add.w r2, r7, #32
|
||
80048d0: 4413 add r3, r2
|
||
80048d2: f833 3c14 ldrh.w r3, [r3, #-20]
|
||
80048d6: 833b strh r3, [r7, #24]
|
||
buf[i]=buf[j];
|
||
80048d8: 8bbb ldrh r3, [r7, #28]
|
||
80048da: 8bfa ldrh r2, [r7, #30]
|
||
80048dc: 005b lsls r3, r3, #1
|
||
80048de: f107 0120 add.w r1, r7, #32
|
||
80048e2: 440b add r3, r1
|
||
80048e4: f833 1c14 ldrh.w r1, [r3, #-20]
|
||
80048e8: 0053 lsls r3, r2, #1
|
||
80048ea: f107 0220 add.w r2, r7, #32
|
||
80048ee: 4413 add r3, r2
|
||
80048f0: 460a mov r2, r1
|
||
80048f2: f823 2c14 strh.w r2, [r3, #-20]
|
||
buf[j]=temp;
|
||
80048f6: 8bbb ldrh r3, [r7, #28]
|
||
80048f8: 005b lsls r3, r3, #1
|
||
80048fa: f107 0220 add.w r2, r7, #32
|
||
80048fe: 4413 add r3, r2
|
||
8004900: 8b3a ldrh r2, [r7, #24]
|
||
8004902: f823 2c14 strh.w r2, [r3, #-20]
|
||
for(j=i+1;j<READ_TIMES;j++)
|
||
8004906: 8bbb ldrh r3, [r7, #28]
|
||
8004908: 3301 adds r3, #1
|
||
800490a: 83bb strh r3, [r7, #28]
|
||
800490c: 8bbb ldrh r3, [r7, #28]
|
||
800490e: 2b04 cmp r3, #4
|
||
8004910: d9ca bls.n 80048a8 <TP_Read_XOY+0x48>
|
||
for(i=0;i<READ_TIMES-1; i++)//����
|
||
8004912: 8bfb ldrh r3, [r7, #30]
|
||
8004914: 3301 adds r3, #1
|
||
8004916: 83fb strh r3, [r7, #30]
|
||
8004918: 8bfb ldrh r3, [r7, #30]
|
||
800491a: 2b03 cmp r3, #3
|
||
800491c: d9c0 bls.n 80048a0 <TP_Read_XOY+0x40>
|
||
}
|
||
}
|
||
}
|
||
sum=0;
|
||
800491e: 2300 movs r3, #0
|
||
8004920: 837b strh r3, [r7, #26]
|
||
for(i=LOST_VAL;i<READ_TIMES-LOST_VAL;i++)sum+=buf[i];
|
||
8004922: 2301 movs r3, #1
|
||
8004924: 83fb strh r3, [r7, #30]
|
||
8004926: e00c b.n 8004942 <TP_Read_XOY+0xe2>
|
||
8004928: 8bfb ldrh r3, [r7, #30]
|
||
800492a: 005b lsls r3, r3, #1
|
||
800492c: f107 0220 add.w r2, r7, #32
|
||
8004930: 4413 add r3, r2
|
||
8004932: f833 2c14 ldrh.w r2, [r3, #-20]
|
||
8004936: 8b7b ldrh r3, [r7, #26]
|
||
8004938: 4413 add r3, r2
|
||
800493a: 837b strh r3, [r7, #26]
|
||
800493c: 8bfb ldrh r3, [r7, #30]
|
||
800493e: 3301 adds r3, #1
|
||
8004940: 83fb strh r3, [r7, #30]
|
||
8004942: 8bfb ldrh r3, [r7, #30]
|
||
8004944: 2b03 cmp r3, #3
|
||
8004946: d9ef bls.n 8004928 <TP_Read_XOY+0xc8>
|
||
temp=sum/(READ_TIMES-2*LOST_VAL);
|
||
8004948: 8b7b ldrh r3, [r7, #26]
|
||
800494a: 4a05 ldr r2, [pc, #20] ; (8004960 <TP_Read_XOY+0x100>)
|
||
800494c: fba2 2303 umull r2, r3, r2, r3
|
||
8004950: 085b lsrs r3, r3, #1
|
||
8004952: 833b strh r3, [r7, #24]
|
||
return temp;
|
||
8004954: 8b3b ldrh r3, [r7, #24]
|
||
}
|
||
8004956: 4618 mov r0, r3
|
||
8004958: 3724 adds r7, #36 ; 0x24
|
||
800495a: 46bd mov sp, r7
|
||
800495c: bd90 pop {r4, r7, pc}
|
||
800495e: bf00 nop
|
||
8004960: aaaaaaab .word 0xaaaaaaab
|
||
|
||
08004964 <TP_Read_XY_ADC>:
|
||
|
||
//��ȡx,y����
|
||
//x,y:��ȡ��������ADCֵ
|
||
void TP_Read_XY_ADC(int16_t *x,int16_t *y)
|
||
{
|
||
8004964: b580 push {r7, lr}
|
||
8004966: b084 sub sp, #16
|
||
8004968: af00 add r7, sp, #0
|
||
800496a: 6078 str r0, [r7, #4]
|
||
800496c: 6039 str r1, [r7, #0]
|
||
int16_t xtemp,ytemp;
|
||
xtemp=TP_Read_XOY(CMD_RDX);
|
||
800496e: 2090 movs r0, #144 ; 0x90
|
||
8004970: f7ff ff76 bl 8004860 <TP_Read_XOY>
|
||
8004974: 4603 mov r3, r0
|
||
8004976: 81fb strh r3, [r7, #14]
|
||
ytemp=TP_Read_XOY(CMD_RDY);
|
||
8004978: 20d0 movs r0, #208 ; 0xd0
|
||
800497a: f7ff ff71 bl 8004860 <TP_Read_XOY>
|
||
800497e: 4603 mov r3, r0
|
||
8004980: 81bb strh r3, [r7, #12]
|
||
*x=xtemp;
|
||
8004982: 687b ldr r3, [r7, #4]
|
||
8004984: 89fa ldrh r2, [r7, #14]
|
||
8004986: 801a strh r2, [r3, #0]
|
||
*y=ytemp;
|
||
8004988: 683b ldr r3, [r7, #0]
|
||
800498a: 89ba ldrh r2, [r7, #12]
|
||
800498c: 801a strh r2, [r3, #0]
|
||
}
|
||
800498e: bf00 nop
|
||
8004990: 3710 adds r7, #16
|
||
8004992: 46bd mov sp, r7
|
||
8004994: bd80 pop {r7, pc}
|
||
|
||
08004996 <TP_Read_XY2>:
|
||
//�ú����ܴ�������ȷ��
|
||
//x,y:��ȡ��������ֵ
|
||
//����ֵ:0,ʧ��;1,�ɹ���
|
||
#define ERR_RANGE 10 //���Χ
|
||
uint8_t TP_Read_XY2(int16_t *x,int16_t *y)
|
||
{
|
||
8004996: b580 push {r7, lr}
|
||
8004998: b084 sub sp, #16
|
||
800499a: af00 add r7, sp, #0
|
||
800499c: 6078 str r0, [r7, #4]
|
||
800499e: 6039 str r1, [r7, #0]
|
||
int16_t x1,y1;
|
||
int16_t x2,y2;
|
||
|
||
TP_Read_XY_ADC(&x1,&y1);
|
||
80049a0: f107 020c add.w r2, r7, #12
|
||
80049a4: f107 030e add.w r3, r7, #14
|
||
80049a8: 4611 mov r1, r2
|
||
80049aa: 4618 mov r0, r3
|
||
80049ac: f7ff ffda bl 8004964 <TP_Read_XY_ADC>
|
||
|
||
TP_Read_XY_ADC(&x2,&y2);
|
||
80049b0: f107 0208 add.w r2, r7, #8
|
||
80049b4: f107 030a add.w r3, r7, #10
|
||
80049b8: 4611 mov r1, r2
|
||
80049ba: 4618 mov r0, r3
|
||
80049bc: f7ff ffd2 bl 8004964 <TP_Read_XY_ADC>
|
||
|
||
if(((x2<=x1&&x1<x2+ERR_RANGE)||(x1<=x2&&x2<x1+ERR_RANGE))//ǰ�����β�����+-50��
|
||
80049c0: f9b7 200a ldrsh.w r2, [r7, #10]
|
||
80049c4: f9b7 300e ldrsh.w r3, [r7, #14]
|
||
80049c8: 429a cmp r2, r3
|
||
80049ca: dc06 bgt.n 80049da <TP_Read_XY2+0x44>
|
||
80049cc: f9b7 300a ldrsh.w r3, [r7, #10]
|
||
80049d0: 3309 adds r3, #9
|
||
80049d2: f9b7 200e ldrsh.w r2, [r7, #14]
|
||
80049d6: 4293 cmp r3, r2
|
||
80049d8: da0c bge.n 80049f4 <TP_Read_XY2+0x5e>
|
||
80049da: f9b7 200e ldrsh.w r2, [r7, #14]
|
||
80049de: f9b7 300a ldrsh.w r3, [r7, #10]
|
||
80049e2: 429a cmp r2, r3
|
||
80049e4: dc3a bgt.n 8004a5c <TP_Read_XY2+0xc6>
|
||
80049e6: f9b7 300e ldrsh.w r3, [r7, #14]
|
||
80049ea: 3309 adds r3, #9
|
||
80049ec: f9b7 200a ldrsh.w r2, [r7, #10]
|
||
80049f0: 4293 cmp r3, r2
|
||
80049f2: db33 blt.n 8004a5c <TP_Read_XY2+0xc6>
|
||
&&((y2<=y1&&y1<y2+ERR_RANGE)||(y1<=y2&&y2<y1+ERR_RANGE)))
|
||
80049f4: f9b7 2008 ldrsh.w r2, [r7, #8]
|
||
80049f8: f9b7 300c ldrsh.w r3, [r7, #12]
|
||
80049fc: 429a cmp r2, r3
|
||
80049fe: dc06 bgt.n 8004a0e <TP_Read_XY2+0x78>
|
||
8004a00: f9b7 3008 ldrsh.w r3, [r7, #8]
|
||
8004a04: 3309 adds r3, #9
|
||
8004a06: f9b7 200c ldrsh.w r2, [r7, #12]
|
||
8004a0a: 4293 cmp r3, r2
|
||
8004a0c: da0c bge.n 8004a28 <TP_Read_XY2+0x92>
|
||
8004a0e: f9b7 200c ldrsh.w r2, [r7, #12]
|
||
8004a12: f9b7 3008 ldrsh.w r3, [r7, #8]
|
||
8004a16: 429a cmp r2, r3
|
||
8004a18: dc20 bgt.n 8004a5c <TP_Read_XY2+0xc6>
|
||
8004a1a: f9b7 300c ldrsh.w r3, [r7, #12]
|
||
8004a1e: 3309 adds r3, #9
|
||
8004a20: f9b7 2008 ldrsh.w r2, [r7, #8]
|
||
8004a24: 4293 cmp r3, r2
|
||
8004a26: db19 blt.n 8004a5c <TP_Read_XY2+0xc6>
|
||
{
|
||
*x=(x1+x2)/2;
|
||
8004a28: f9b7 300e ldrsh.w r3, [r7, #14]
|
||
8004a2c: 461a mov r2, r3
|
||
8004a2e: f9b7 300a ldrsh.w r3, [r7, #10]
|
||
8004a32: 4413 add r3, r2
|
||
8004a34: 0fda lsrs r2, r3, #31
|
||
8004a36: 4413 add r3, r2
|
||
8004a38: 105b asrs r3, r3, #1
|
||
8004a3a: b21a sxth r2, r3
|
||
8004a3c: 687b ldr r3, [r7, #4]
|
||
8004a3e: 801a strh r2, [r3, #0]
|
||
*y=(y1+y2)/2;
|
||
8004a40: f9b7 300c ldrsh.w r3, [r7, #12]
|
||
8004a44: 461a mov r2, r3
|
||
8004a46: f9b7 3008 ldrsh.w r3, [r7, #8]
|
||
8004a4a: 4413 add r3, r2
|
||
8004a4c: 0fda lsrs r2, r3, #31
|
||
8004a4e: 4413 add r3, r2
|
||
8004a50: 105b asrs r3, r3, #1
|
||
8004a52: b21a sxth r2, r3
|
||
8004a54: 683b ldr r3, [r7, #0]
|
||
8004a56: 801a strh r2, [r3, #0]
|
||
return 1;
|
||
8004a58: 2301 movs r3, #1
|
||
8004a5a: e000 b.n 8004a5e <TP_Read_XY2+0xc8>
|
||
}else return 0;
|
||
8004a5c: 2300 movs r3, #0
|
||
}
|
||
8004a5e: 4618 mov r0, r3
|
||
8004a60: 3710 adds r7, #16
|
||
8004a62: 46bd mov sp, r7
|
||
8004a64: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08004a68 <TP_Server>:
|
||
touch_device t0;// t0 yyds~
|
||
touch_config tconfig;
|
||
//�������·���
|
||
void TP_Server()
|
||
{
|
||
8004a68: b598 push {r3, r4, r7, lr}
|
||
8004a6a: af00 add r7, sp, #0
|
||
if(TPEN==0)
|
||
8004a6c: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004a70: 4824 ldr r0, [pc, #144] ; (8004b04 <TP_Server+0x9c>)
|
||
8004a72: f7fd f9af bl 8001dd4 <HAL_GPIO_ReadPin>
|
||
8004a76: 4603 mov r3, r0
|
||
8004a78: 2b00 cmp r3, #0
|
||
8004a7a: d141 bne.n 8004b00 <TP_Server+0x98>
|
||
{
|
||
TP_Read_XY2(&t0.adc_x,&t0.adc_y);
|
||
8004a7c: 4922 ldr r1, [pc, #136] ; (8004b08 <TP_Server+0xa0>)
|
||
8004a7e: 4823 ldr r0, [pc, #140] ; (8004b0c <TP_Server+0xa4>)
|
||
8004a80: f7ff ff89 bl 8004996 <TP_Read_XY2>
|
||
t0.pix_x=(t0.adc_x/tconfig.x_acc)-tconfig.x_offset;
|
||
8004a84: 4b21 ldr r3, [pc, #132] ; (8004b0c <TP_Server+0xa4>)
|
||
8004a86: 881b ldrh r3, [r3, #0]
|
||
8004a88: 4618 mov r0, r3
|
||
8004a8a: f7fc f973 bl 8000d74 <__aeabi_i2f>
|
||
8004a8e: 4602 mov r2, r0
|
||
8004a90: 4b1f ldr r3, [pc, #124] ; (8004b10 <TP_Server+0xa8>)
|
||
8004a92: 685b ldr r3, [r3, #4]
|
||
8004a94: 4619 mov r1, r3
|
||
8004a96: 4610 mov r0, r2
|
||
8004a98: f7fc fa74 bl 8000f84 <__aeabi_fdiv>
|
||
8004a9c: 4603 mov r3, r0
|
||
8004a9e: 461c mov r4, r3
|
||
8004aa0: 4b1b ldr r3, [pc, #108] ; (8004b10 <TP_Server+0xa8>)
|
||
8004aa2: 68db ldr r3, [r3, #12]
|
||
8004aa4: 4618 mov r0, r3
|
||
8004aa6: f7fc f965 bl 8000d74 <__aeabi_i2f>
|
||
8004aaa: 4603 mov r3, r0
|
||
8004aac: 4619 mov r1, r3
|
||
8004aae: 4620 mov r0, r4
|
||
8004ab0: f7fc f8aa bl 8000c08 <__aeabi_fsub>
|
||
8004ab4: 4603 mov r3, r0
|
||
8004ab6: 4618 mov r0, r3
|
||
8004ab8: f7fc fb00 bl 80010bc <__aeabi_f2iz>
|
||
8004abc: 4603 mov r3, r0
|
||
8004abe: 4a13 ldr r2, [pc, #76] ; (8004b0c <TP_Server+0xa4>)
|
||
8004ac0: 6053 str r3, [r2, #4]
|
||
t0.pix_y=(t0.adc_y/tconfig.y_acc)-tconfig.y_offset;
|
||
8004ac2: 4b12 ldr r3, [pc, #72] ; (8004b0c <TP_Server+0xa4>)
|
||
8004ac4: 885b ldrh r3, [r3, #2]
|
||
8004ac6: 4618 mov r0, r3
|
||
8004ac8: f7fc f954 bl 8000d74 <__aeabi_i2f>
|
||
8004acc: 4602 mov r2, r0
|
||
8004ace: 4b10 ldr r3, [pc, #64] ; (8004b10 <TP_Server+0xa8>)
|
||
8004ad0: 689b ldr r3, [r3, #8]
|
||
8004ad2: 4619 mov r1, r3
|
||
8004ad4: 4610 mov r0, r2
|
||
8004ad6: f7fc fa55 bl 8000f84 <__aeabi_fdiv>
|
||
8004ada: 4603 mov r3, r0
|
||
8004adc: 461c mov r4, r3
|
||
8004ade: 4b0c ldr r3, [pc, #48] ; (8004b10 <TP_Server+0xa8>)
|
||
8004ae0: 691b ldr r3, [r3, #16]
|
||
8004ae2: 4618 mov r0, r3
|
||
8004ae4: f7fc f946 bl 8000d74 <__aeabi_i2f>
|
||
8004ae8: 4603 mov r3, r0
|
||
8004aea: 4619 mov r1, r3
|
||
8004aec: 4620 mov r0, r4
|
||
8004aee: f7fc f88b bl 8000c08 <__aeabi_fsub>
|
||
8004af2: 4603 mov r3, r0
|
||
8004af4: 4618 mov r0, r3
|
||
8004af6: f7fc fae1 bl 80010bc <__aeabi_f2iz>
|
||
8004afa: 4603 mov r3, r0
|
||
8004afc: 4a03 ldr r2, [pc, #12] ; (8004b0c <TP_Server+0xa4>)
|
||
8004afe: 6093 str r3, [r2, #8]
|
||
|
||
}
|
||
}
|
||
8004b00: bf00 nop
|
||
8004b02: bd98 pop {r3, r4, r7, pc}
|
||
8004b04: 40011c00 .word 0x40011c00
|
||
8004b08: 200002e2 .word 0x200002e2
|
||
8004b0c: 200002e0 .word 0x200002e0
|
||
8004b10: 200002c8 .word 0x200002c8
|
||
|
||
08004b14 <TP_DrwaTrage>:
|
||
|
||
void TP_DrwaTrage(int x,int y,int r)
|
||
{
|
||
8004b14: b590 push {r4, r7, lr}
|
||
8004b16: b087 sub sp, #28
|
||
8004b18: af02 add r7, sp, #8
|
||
8004b1a: 60f8 str r0, [r7, #12]
|
||
8004b1c: 60b9 str r1, [r7, #8]
|
||
8004b1e: 607a str r2, [r7, #4]
|
||
Draw_Circle(x,y,r+1,GRAY);
|
||
8004b20: 68fb ldr r3, [r7, #12]
|
||
8004b22: b298 uxth r0, r3
|
||
8004b24: 68bb ldr r3, [r7, #8]
|
||
8004b26: b299 uxth r1, r3
|
||
8004b28: 687b ldr r3, [r7, #4]
|
||
8004b2a: b29b uxth r3, r3
|
||
8004b2c: 3301 adds r3, #1
|
||
8004b2e: b29a uxth r2, r3
|
||
8004b30: f248 4330 movw r3, #33840 ; 0x8430
|
||
8004b34: f7ff fba1 bl 800427a <Draw_Circle>
|
||
Draw_Circle(x,y,r,RED);
|
||
8004b38: 68fb ldr r3, [r7, #12]
|
||
8004b3a: b298 uxth r0, r3
|
||
8004b3c: 68bb ldr r3, [r7, #8]
|
||
8004b3e: b299 uxth r1, r3
|
||
8004b40: 687b ldr r3, [r7, #4]
|
||
8004b42: b29a uxth r2, r3
|
||
8004b44: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004b48: f7ff fb97 bl 800427a <Draw_Circle>
|
||
LCD_DrawLine(x,y,x+10,y,RED);
|
||
8004b4c: 68fb ldr r3, [r7, #12]
|
||
8004b4e: b298 uxth r0, r3
|
||
8004b50: 68bb ldr r3, [r7, #8]
|
||
8004b52: b299 uxth r1, r3
|
||
8004b54: 68fb ldr r3, [r7, #12]
|
||
8004b56: b29b uxth r3, r3
|
||
8004b58: 330a adds r3, #10
|
||
8004b5a: b29a uxth r2, r3
|
||
8004b5c: 68bb ldr r3, [r7, #8]
|
||
8004b5e: b29b uxth r3, r3
|
||
8004b60: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
8004b64: 9400 str r4, [sp, #0]
|
||
8004b66: f7ff fb03 bl 8004170 <LCD_DrawLine>
|
||
LCD_DrawLine(x,y,x,y+10,RED);
|
||
8004b6a: 68fb ldr r3, [r7, #12]
|
||
8004b6c: b298 uxth r0, r3
|
||
8004b6e: 68bb ldr r3, [r7, #8]
|
||
8004b70: b299 uxth r1, r3
|
||
8004b72: 68fb ldr r3, [r7, #12]
|
||
8004b74: b29a uxth r2, r3
|
||
8004b76: 68bb ldr r3, [r7, #8]
|
||
8004b78: b29b uxth r3, r3
|
||
8004b7a: 330a adds r3, #10
|
||
8004b7c: b29b uxth r3, r3
|
||
8004b7e: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
8004b82: 9400 str r4, [sp, #0]
|
||
8004b84: f7ff faf4 bl 8004170 <LCD_DrawLine>
|
||
LCD_DrawLine(x,y,x-10,y,RED);
|
||
8004b88: 68fb ldr r3, [r7, #12]
|
||
8004b8a: b298 uxth r0, r3
|
||
8004b8c: 68bb ldr r3, [r7, #8]
|
||
8004b8e: b299 uxth r1, r3
|
||
8004b90: 68fb ldr r3, [r7, #12]
|
||
8004b92: b29b uxth r3, r3
|
||
8004b94: 3b0a subs r3, #10
|
||
8004b96: b29a uxth r2, r3
|
||
8004b98: 68bb ldr r3, [r7, #8]
|
||
8004b9a: b29b uxth r3, r3
|
||
8004b9c: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
8004ba0: 9400 str r4, [sp, #0]
|
||
8004ba2: f7ff fae5 bl 8004170 <LCD_DrawLine>
|
||
LCD_DrawLine(x,y,x,y-10,RED);
|
||
8004ba6: 68fb ldr r3, [r7, #12]
|
||
8004ba8: b298 uxth r0, r3
|
||
8004baa: 68bb ldr r3, [r7, #8]
|
||
8004bac: b299 uxth r1, r3
|
||
8004bae: 68fb ldr r3, [r7, #12]
|
||
8004bb0: b29a uxth r2, r3
|
||
8004bb2: 68bb ldr r3, [r7, #8]
|
||
8004bb4: b29b uxth r3, r3
|
||
8004bb6: 3b0a subs r3, #10
|
||
8004bb8: b29b uxth r3, r3
|
||
8004bba: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
8004bbe: 9400 str r4, [sp, #0]
|
||
8004bc0: f7ff fad6 bl 8004170 <LCD_DrawLine>
|
||
}
|
||
8004bc4: bf00 nop
|
||
8004bc6: 3714 adds r7, #20
|
||
8004bc8: 46bd mov sp, r7
|
||
8004bca: bd90 pop {r4, r7, pc}
|
||
|
||
08004bcc <TP_adjustment>:
|
||
|
||
void TP_adjustment()
|
||
{
|
||
8004bcc: b5b0 push {r4, r5, r7, lr}
|
||
8004bce: b0a4 sub sp, #144 ; 0x90
|
||
8004bd0: af02 add r7, sp, #8
|
||
//�ж��Ƿ���ҪУ����eeprom��ȡ����
|
||
EEPROM_READ_BATY(16,(char *)&tconfig,sizeof(touch_config));
|
||
8004bd2: 2218 movs r2, #24
|
||
8004bd4: 4916 ldr r1, [pc, #88] ; (8004c30 <TP_adjustment+0x64>)
|
||
8004bd6: 2010 movs r0, #16
|
||
8004bd8: f7ff fd50 bl 800467c <EEPROM_READ_BATY>
|
||
if(tconfig.begin==0xab&&tconfig.end==0xcd)
|
||
8004bdc: 4b14 ldr r3, [pc, #80] ; (8004c30 <TP_adjustment+0x64>)
|
||
8004bde: 781b ldrb r3, [r3, #0]
|
||
8004be0: 2bab cmp r3, #171 ; 0xab
|
||
8004be2: d104 bne.n 8004bee <TP_adjustment+0x22>
|
||
8004be4: 4b12 ldr r3, [pc, #72] ; (8004c30 <TP_adjustment+0x64>)
|
||
8004be6: 7d1b ldrb r3, [r3, #20]
|
||
8004be8: 2bcd cmp r3, #205 ; 0xcd
|
||
8004bea: f000 82a5 beq.w 8005138 <TP_adjustment+0x56c>
|
||
{
|
||
return;
|
||
}
|
||
|
||
char str[64];
|
||
uint16_t y_adc,x_adc,step=0,r=10;
|
||
8004bee: 2300 movs r3, #0
|
||
8004bf0: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
8004bf4: 230a movs r3, #10
|
||
8004bf6: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
uint16_t y1,y2,y3,y4,x1,x2,x3,x4;
|
||
int y5,x5,xd,xl,yd,yl;
|
||
float acc_x,acc_y;
|
||
int offset_x,offset_y;
|
||
uint32_t wait=HAL_GetTick()+50000,ms100=0;
|
||
8004bfa: f7fc fe45 bl 8001888 <HAL_GetTick>
|
||
8004bfe: 4603 mov r3, r0
|
||
8004c00: f503 4343 add.w r3, r3, #49920 ; 0xc300
|
||
8004c04: 3350 adds r3, #80 ; 0x50
|
||
8004c06: 673b str r3, [r7, #112] ; 0x70
|
||
8004c08: 2300 movs r3, #0
|
||
8004c0a: 66fb str r3, [r7, #108] ; 0x6c
|
||
LCD_Clear(GRAY);
|
||
8004c0c: f248 4030 movw r0, #33840 ; 0x8430
|
||
8004c10: f7ff fa5c bl 80040cc <LCD_Clear>
|
||
LCD_ShowString(0,50,"Calibrate the touch screen",16,RED,RED);
|
||
8004c14: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004c18: 9301 str r3, [sp, #4]
|
||
8004c1a: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004c1e: 9300 str r3, [sp, #0]
|
||
8004c20: 2310 movs r3, #16
|
||
8004c22: 4a04 ldr r2, [pc, #16] ; (8004c34 <TP_adjustment+0x68>)
|
||
8004c24: 2132 movs r1, #50 ; 0x32
|
||
8004c26: 2000 movs r0, #0
|
||
8004c28: f7ff fc4e bl 80044c8 <LCD_ShowString>
|
||
//TP_DrwaTrage(30,30,10);
|
||
while(HAL_GetTick()<wait)
|
||
8004c2c: e27c b.n 8005128 <TP_adjustment+0x55c>
|
||
8004c2e: bf00 nop
|
||
8004c30: 200002c8 .word 0x200002c8
|
||
8004c34: 080082e0 .word 0x080082e0
|
||
{
|
||
if(TPEN==0)
|
||
8004c38: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004c3c: 48cf ldr r0, [pc, #828] ; (8004f7c <TP_adjustment+0x3b0>)
|
||
8004c3e: f7fd f8c9 bl 8001dd4 <HAL_GPIO_ReadPin>
|
||
8004c42: 4603 mov r3, r0
|
||
8004c44: 2b00 cmp r3, #0
|
||
8004c46: d146 bne.n 8004cd6 <TP_adjustment+0x10a>
|
||
{
|
||
wait=HAL_GetTick()+50000;
|
||
8004c48: f7fc fe1e bl 8001888 <HAL_GetTick>
|
||
8004c4c: 4603 mov r3, r0
|
||
8004c4e: f503 4343 add.w r3, r3, #49920 ; 0xc300
|
||
8004c52: 3350 adds r3, #80 ; 0x50
|
||
8004c54: 673b str r3, [r7, #112] ; 0x70
|
||
|
||
TP_Read_XY2(&x_adc,&y_adc);
|
||
8004c56: 1cba adds r2, r7, #2
|
||
8004c58: 463b mov r3, r7
|
||
8004c5a: 4611 mov r1, r2
|
||
8004c5c: 4618 mov r0, r3
|
||
8004c5e: f7ff fe9a bl 8004996 <TP_Read_XY2>
|
||
sprintf(str,"ADC_X:%04d",x_adc);
|
||
8004c62: 883b ldrh r3, [r7, #0]
|
||
8004c64: 461a mov r2, r3
|
||
8004c66: 1d3b adds r3, r7, #4
|
||
8004c68: 49c5 ldr r1, [pc, #788] ; (8004f80 <TP_adjustment+0x3b4>)
|
||
8004c6a: 4618 mov r0, r3
|
||
8004c6c: f001 f9a8 bl 8005fc0 <siprintf>
|
||
LCD_ShowString(100, 0, str, 16, RED, GRAY);
|
||
8004c70: 1d3a adds r2, r7, #4
|
||
8004c72: f248 4330 movw r3, #33840 ; 0x8430
|
||
8004c76: 9301 str r3, [sp, #4]
|
||
8004c78: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004c7c: 9300 str r3, [sp, #0]
|
||
8004c7e: 2310 movs r3, #16
|
||
8004c80: 2100 movs r1, #0
|
||
8004c82: 2064 movs r0, #100 ; 0x64
|
||
8004c84: f7ff fc20 bl 80044c8 <LCD_ShowString>
|
||
sprintf(str,"ADC_Y:%04d",y_adc);
|
||
8004c88: 887b ldrh r3, [r7, #2]
|
||
8004c8a: 461a mov r2, r3
|
||
8004c8c: 1d3b adds r3, r7, #4
|
||
8004c8e: 49bd ldr r1, [pc, #756] ; (8004f84 <TP_adjustment+0x3b8>)
|
||
8004c90: 4618 mov r0, r3
|
||
8004c92: f001 f995 bl 8005fc0 <siprintf>
|
||
LCD_ShowString(100, 16, str, 16, RED, GRAY);
|
||
8004c96: 1d3a adds r2, r7, #4
|
||
8004c98: f248 4330 movw r3, #33840 ; 0x8430
|
||
8004c9c: 9301 str r3, [sp, #4]
|
||
8004c9e: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004ca2: 9300 str r3, [sp, #0]
|
||
8004ca4: 2310 movs r3, #16
|
||
8004ca6: 2110 movs r1, #16
|
||
8004ca8: 2064 movs r0, #100 ; 0x64
|
||
8004caa: f7ff fc0d bl 80044c8 <LCD_ShowString>
|
||
|
||
if(HAL_GetTick()>ms100)
|
||
8004cae: f7fc fdeb bl 8001888 <HAL_GetTick>
|
||
8004cb2: 4602 mov r2, r0
|
||
8004cb4: 6efb ldr r3, [r7, #108] ; 0x6c
|
||
8004cb6: 4293 cmp r3, r2
|
||
8004cb8: d20d bcs.n 8004cd6 <TP_adjustment+0x10a>
|
||
{
|
||
ms100=HAL_GetTick()+100;
|
||
8004cba: f7fc fde5 bl 8001888 <HAL_GetTick>
|
||
8004cbe: 4603 mov r3, r0
|
||
8004cc0: 3364 adds r3, #100 ; 0x64
|
||
8004cc2: 66fb str r3, [r7, #108] ; 0x6c
|
||
if(r>0){r--;}
|
||
8004cc4: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004cc8: 2b00 cmp r3, #0
|
||
8004cca: d004 beq.n 8004cd6 <TP_adjustment+0x10a>
|
||
8004ccc: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004cd0: 3b01 subs r3, #1
|
||
8004cd2: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
}
|
||
|
||
if(step==0)
|
||
8004cd6: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004cda: 2b00 cmp r3, #0
|
||
8004cdc: d129 bne.n 8004d32 <TP_adjustment+0x166>
|
||
{
|
||
TP_DrwaTrage(30,30,r);
|
||
8004cde: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004ce2: 461a mov r2, r3
|
||
8004ce4: 211e movs r1, #30
|
||
8004ce6: 201e movs r0, #30
|
||
8004ce8: f7ff ff14 bl 8004b14 <TP_DrwaTrage>
|
||
if(r==0)
|
||
8004cec: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004cf0: 2b00 cmp r3, #0
|
||
8004cf2: d11e bne.n 8004d32 <TP_adjustment+0x166>
|
||
{
|
||
step+=1;
|
||
8004cf4: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004cf8: 3301 adds r3, #1
|
||
8004cfa: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y1=y_adc;
|
||
8004cfe: 887b ldrh r3, [r7, #2]
|
||
8004d00: f8a7 3082 strh.w r3, [r7, #130] ; 0x82
|
||
x1=x_adc;
|
||
8004d04: 883b ldrh r3, [r7, #0]
|
||
8004d06: f8a7 307a strh.w r3, [r7, #122] ; 0x7a
|
||
sprintf(str,"point_1 x:%d y:%d",x1,y1);
|
||
8004d0a: f8b7 207a ldrh.w r2, [r7, #122] ; 0x7a
|
||
8004d0e: f8b7 3082 ldrh.w r3, [r7, #130] ; 0x82
|
||
8004d12: 1d38 adds r0, r7, #4
|
||
8004d14: 499c ldr r1, [pc, #624] ; (8004f88 <TP_adjustment+0x3bc>)
|
||
8004d16: f001 f953 bl 8005fc0 <siprintf>
|
||
LCD_ShowString(0,66,str,16,RED,RED);
|
||
8004d1a: 1d3a adds r2, r7, #4
|
||
8004d1c: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004d20: 9301 str r3, [sp, #4]
|
||
8004d22: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004d26: 9300 str r3, [sp, #0]
|
||
8004d28: 2310 movs r3, #16
|
||
8004d2a: 2142 movs r1, #66 ; 0x42
|
||
8004d2c: 2000 movs r0, #0
|
||
8004d2e: f7ff fbcb bl 80044c8 <LCD_ShowString>
|
||
}
|
||
}
|
||
if(step==1)
|
||
8004d32: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004d36: 2b01 cmp r3, #1
|
||
8004d38: d10f bne.n 8004d5a <TP_adjustment+0x18e>
|
||
{
|
||
if(TPEN==1)
|
||
8004d3a: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004d3e: 488f ldr r0, [pc, #572] ; (8004f7c <TP_adjustment+0x3b0>)
|
||
8004d40: f7fd f848 bl 8001dd4 <HAL_GPIO_ReadPin>
|
||
8004d44: 4603 mov r3, r0
|
||
8004d46: 2b01 cmp r3, #1
|
||
8004d48: d107 bne.n 8004d5a <TP_adjustment+0x18e>
|
||
{
|
||
step+=1;
|
||
8004d4a: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004d4e: 3301 adds r3, #1
|
||
8004d50: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8004d54: 230a movs r3, #10
|
||
8004d56: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
|
||
}
|
||
if(step==2)
|
||
8004d5a: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004d5e: 2b02 cmp r3, #2
|
||
8004d60: d12a bne.n 8004db8 <TP_adjustment+0x1ec>
|
||
{
|
||
TP_DrwaTrage(290,30,r);
|
||
8004d62: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004d66: 461a mov r2, r3
|
||
8004d68: 211e movs r1, #30
|
||
8004d6a: f44f 7091 mov.w r0, #290 ; 0x122
|
||
8004d6e: f7ff fed1 bl 8004b14 <TP_DrwaTrage>
|
||
if(r==0)
|
||
8004d72: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004d76: 2b00 cmp r3, #0
|
||
8004d78: d11e bne.n 8004db8 <TP_adjustment+0x1ec>
|
||
{
|
||
step+=1;
|
||
8004d7a: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004d7e: 3301 adds r3, #1
|
||
8004d80: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y2=y_adc;
|
||
8004d84: 887b ldrh r3, [r7, #2]
|
||
8004d86: f8a7 3080 strh.w r3, [r7, #128] ; 0x80
|
||
x2=x_adc;
|
||
8004d8a: 883b ldrh r3, [r7, #0]
|
||
8004d8c: f8a7 3078 strh.w r3, [r7, #120] ; 0x78
|
||
sprintf(str,"point_2 x:%d y:%d",x2,y2);
|
||
8004d90: f8b7 2078 ldrh.w r2, [r7, #120] ; 0x78
|
||
8004d94: f8b7 3080 ldrh.w r3, [r7, #128] ; 0x80
|
||
8004d98: 1d38 adds r0, r7, #4
|
||
8004d9a: 497c ldr r1, [pc, #496] ; (8004f8c <TP_adjustment+0x3c0>)
|
||
8004d9c: f001 f910 bl 8005fc0 <siprintf>
|
||
LCD_ShowString(0,66+16,str,16,RED,RED);
|
||
8004da0: 1d3a adds r2, r7, #4
|
||
8004da2: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004da6: 9301 str r3, [sp, #4]
|
||
8004da8: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004dac: 9300 str r3, [sp, #0]
|
||
8004dae: 2310 movs r3, #16
|
||
8004db0: 2152 movs r1, #82 ; 0x52
|
||
8004db2: 2000 movs r0, #0
|
||
8004db4: f7ff fb88 bl 80044c8 <LCD_ShowString>
|
||
}
|
||
}
|
||
if(step==3)
|
||
8004db8: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004dbc: 2b03 cmp r3, #3
|
||
8004dbe: d10f bne.n 8004de0 <TP_adjustment+0x214>
|
||
{
|
||
if(TPEN==1)
|
||
8004dc0: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004dc4: 486d ldr r0, [pc, #436] ; (8004f7c <TP_adjustment+0x3b0>)
|
||
8004dc6: f7fd f805 bl 8001dd4 <HAL_GPIO_ReadPin>
|
||
8004dca: 4603 mov r3, r0
|
||
8004dcc: 2b01 cmp r3, #1
|
||
8004dce: d107 bne.n 8004de0 <TP_adjustment+0x214>
|
||
{
|
||
step+=1;
|
||
8004dd0: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004dd4: 3301 adds r3, #1
|
||
8004dd6: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8004dda: 230a movs r3, #10
|
||
8004ddc: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
|
||
}
|
||
if(step==4)
|
||
8004de0: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004de4: 2b04 cmp r3, #4
|
||
8004de6: d129 bne.n 8004e3c <TP_adjustment+0x270>
|
||
{
|
||
TP_DrwaTrage(30,210,r);
|
||
8004de8: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004dec: 461a mov r2, r3
|
||
8004dee: 21d2 movs r1, #210 ; 0xd2
|
||
8004df0: 201e movs r0, #30
|
||
8004df2: f7ff fe8f bl 8004b14 <TP_DrwaTrage>
|
||
if(r==0)
|
||
8004df6: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004dfa: 2b00 cmp r3, #0
|
||
8004dfc: d11e bne.n 8004e3c <TP_adjustment+0x270>
|
||
{
|
||
step+=1;
|
||
8004dfe: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004e02: 3301 adds r3, #1
|
||
8004e04: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y3=y_adc;
|
||
8004e08: 887b ldrh r3, [r7, #2]
|
||
8004e0a: f8a7 307e strh.w r3, [r7, #126] ; 0x7e
|
||
x3=x_adc;
|
||
8004e0e: 883b ldrh r3, [r7, #0]
|
||
8004e10: f8a7 3076 strh.w r3, [r7, #118] ; 0x76
|
||
sprintf(str,"point_3 x:%d y:%d",x3,y3);
|
||
8004e14: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76
|
||
8004e18: f8b7 307e ldrh.w r3, [r7, #126] ; 0x7e
|
||
8004e1c: 1d38 adds r0, r7, #4
|
||
8004e1e: 495c ldr r1, [pc, #368] ; (8004f90 <TP_adjustment+0x3c4>)
|
||
8004e20: f001 f8ce bl 8005fc0 <siprintf>
|
||
LCD_ShowString(0,66+16+16,str,16,RED,RED);
|
||
8004e24: 1d3a adds r2, r7, #4
|
||
8004e26: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004e2a: 9301 str r3, [sp, #4]
|
||
8004e2c: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004e30: 9300 str r3, [sp, #0]
|
||
8004e32: 2310 movs r3, #16
|
||
8004e34: 2162 movs r1, #98 ; 0x62
|
||
8004e36: 2000 movs r0, #0
|
||
8004e38: f7ff fb46 bl 80044c8 <LCD_ShowString>
|
||
}
|
||
}
|
||
if(step==5)
|
||
8004e3c: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004e40: 2b05 cmp r3, #5
|
||
8004e42: d10f bne.n 8004e64 <TP_adjustment+0x298>
|
||
{
|
||
if(TPEN==1)
|
||
8004e44: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004e48: 484c ldr r0, [pc, #304] ; (8004f7c <TP_adjustment+0x3b0>)
|
||
8004e4a: f7fc ffc3 bl 8001dd4 <HAL_GPIO_ReadPin>
|
||
8004e4e: 4603 mov r3, r0
|
||
8004e50: 2b01 cmp r3, #1
|
||
8004e52: d107 bne.n 8004e64 <TP_adjustment+0x298>
|
||
{
|
||
step+=1;
|
||
8004e54: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004e58: 3301 adds r3, #1
|
||
8004e5a: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8004e5e: 230a movs r3, #10
|
||
8004e60: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
|
||
}
|
||
if(step==6)
|
||
8004e64: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004e68: 2b06 cmp r3, #6
|
||
8004e6a: d12a bne.n 8004ec2 <TP_adjustment+0x2f6>
|
||
{
|
||
TP_DrwaTrage(290,210,r);
|
||
8004e6c: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004e70: 461a mov r2, r3
|
||
8004e72: 21d2 movs r1, #210 ; 0xd2
|
||
8004e74: f44f 7091 mov.w r0, #290 ; 0x122
|
||
8004e78: f7ff fe4c bl 8004b14 <TP_DrwaTrage>
|
||
if(r==0)
|
||
8004e7c: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004e80: 2b00 cmp r3, #0
|
||
8004e82: d11e bne.n 8004ec2 <TP_adjustment+0x2f6>
|
||
{
|
||
step+=1;
|
||
8004e84: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004e88: 3301 adds r3, #1
|
||
8004e8a: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y4=y_adc;
|
||
8004e8e: 887b ldrh r3, [r7, #2]
|
||
8004e90: f8a7 307c strh.w r3, [r7, #124] ; 0x7c
|
||
x4=x_adc;
|
||
8004e94: 883b ldrh r3, [r7, #0]
|
||
8004e96: f8a7 3074 strh.w r3, [r7, #116] ; 0x74
|
||
sprintf(str,"point_4 x:%d y:%d",x4,y4);
|
||
8004e9a: f8b7 2074 ldrh.w r2, [r7, #116] ; 0x74
|
||
8004e9e: f8b7 307c ldrh.w r3, [r7, #124] ; 0x7c
|
||
8004ea2: 1d38 adds r0, r7, #4
|
||
8004ea4: 493b ldr r1, [pc, #236] ; (8004f94 <TP_adjustment+0x3c8>)
|
||
8004ea6: f001 f88b bl 8005fc0 <siprintf>
|
||
LCD_ShowString(0,66+16+16+16,str,16,RED,RED);
|
||
8004eaa: 1d3a adds r2, r7, #4
|
||
8004eac: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004eb0: 9301 str r3, [sp, #4]
|
||
8004eb2: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004eb6: 9300 str r3, [sp, #0]
|
||
8004eb8: 2310 movs r3, #16
|
||
8004eba: 2172 movs r1, #114 ; 0x72
|
||
8004ebc: 2000 movs r0, #0
|
||
8004ebe: f7ff fb03 bl 80044c8 <LCD_ShowString>
|
||
}
|
||
}
|
||
if(step==7)
|
||
8004ec2: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004ec6: 2b07 cmp r3, #7
|
||
8004ec8: d10f bne.n 8004eea <TP_adjustment+0x31e>
|
||
{
|
||
if(TPEN==1)
|
||
8004eca: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004ece: 482b ldr r0, [pc, #172] ; (8004f7c <TP_adjustment+0x3b0>)
|
||
8004ed0: f7fc ff80 bl 8001dd4 <HAL_GPIO_ReadPin>
|
||
8004ed4: 4603 mov r3, r0
|
||
8004ed6: 2b01 cmp r3, #1
|
||
8004ed8: d107 bne.n 8004eea <TP_adjustment+0x31e>
|
||
{
|
||
step+=1;
|
||
8004eda: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004ede: 3301 adds r3, #1
|
||
8004ee0: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8004ee4: 230a movs r3, #10
|
||
8004ee6: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
}
|
||
if(step==8)
|
||
8004eea: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004eee: 2b08 cmp r3, #8
|
||
8004ef0: f040 811a bne.w 8005128 <TP_adjustment+0x55c>
|
||
{
|
||
xd=((x1+x3)/2);
|
||
8004ef4: f8b7 207a ldrh.w r2, [r7, #122] ; 0x7a
|
||
8004ef8: f8b7 3076 ldrh.w r3, [r7, #118] ; 0x76
|
||
8004efc: 4413 add r3, r2
|
||
8004efe: 0fda lsrs r2, r3, #31
|
||
8004f00: 4413 add r3, r2
|
||
8004f02: 105b asrs r3, r3, #1
|
||
8004f04: 66bb str r3, [r7, #104] ; 0x68
|
||
xl=((x2+x4)/2);
|
||
8004f06: f8b7 2078 ldrh.w r2, [r7, #120] ; 0x78
|
||
8004f0a: f8b7 3074 ldrh.w r3, [r7, #116] ; 0x74
|
||
8004f0e: 4413 add r3, r2
|
||
8004f10: 0fda lsrs r2, r3, #31
|
||
8004f12: 4413 add r3, r2
|
||
8004f14: 105b asrs r3, r3, #1
|
||
8004f16: 667b str r3, [r7, #100] ; 0x64
|
||
yd=((y1+y2)/2);
|
||
8004f18: f8b7 2082 ldrh.w r2, [r7, #130] ; 0x82
|
||
8004f1c: f8b7 3080 ldrh.w r3, [r7, #128] ; 0x80
|
||
8004f20: 4413 add r3, r2
|
||
8004f22: 0fda lsrs r2, r3, #31
|
||
8004f24: 4413 add r3, r2
|
||
8004f26: 105b asrs r3, r3, #1
|
||
8004f28: 663b str r3, [r7, #96] ; 0x60
|
||
yl=((y3+y4)/2);
|
||
8004f2a: f8b7 207e ldrh.w r2, [r7, #126] ; 0x7e
|
||
8004f2e: f8b7 307c ldrh.w r3, [r7, #124] ; 0x7c
|
||
8004f32: 4413 add r3, r2
|
||
8004f34: 0fda lsrs r2, r3, #31
|
||
8004f36: 4413 add r3, r2
|
||
8004f38: 105b asrs r3, r3, #1
|
||
8004f3a: 65fb str r3, [r7, #92] ; 0x5c
|
||
x5=xl-xd;
|
||
8004f3c: 6e7a ldr r2, [r7, #100] ; 0x64
|
||
8004f3e: 6ebb ldr r3, [r7, #104] ; 0x68
|
||
8004f40: 1ad3 subs r3, r2, r3
|
||
8004f42: 65bb str r3, [r7, #88] ; 0x58
|
||
y5=yl-yd;
|
||
8004f44: 6dfa ldr r2, [r7, #92] ; 0x5c
|
||
8004f46: 6e3b ldr r3, [r7, #96] ; 0x60
|
||
8004f48: 1ad3 subs r3, r2, r3
|
||
8004f4a: 657b str r3, [r7, #84] ; 0x54
|
||
if(x5<0||y5<0)
|
||
8004f4c: 6dbb ldr r3, [r7, #88] ; 0x58
|
||
8004f4e: 2b00 cmp r3, #0
|
||
8004f50: db02 blt.n 8004f58 <TP_adjustment+0x38c>
|
||
8004f52: 6d7b ldr r3, [r7, #84] ; 0x54
|
||
8004f54: 2b00 cmp r3, #0
|
||
8004f56: da21 bge.n 8004f9c <TP_adjustment+0x3d0>
|
||
{
|
||
sprintf(str,"ERROR");
|
||
8004f58: 1d3b adds r3, r7, #4
|
||
8004f5a: 490f ldr r1, [pc, #60] ; (8004f98 <TP_adjustment+0x3cc>)
|
||
8004f5c: 4618 mov r0, r3
|
||
8004f5e: f001 f82f bl 8005fc0 <siprintf>
|
||
LCD_ShowString(0,66+16+16+16+16,str,16,RED, GRAY);
|
||
8004f62: 1d3a adds r2, r7, #4
|
||
8004f64: f248 4330 movw r3, #33840 ; 0x8430
|
||
8004f68: 9301 str r3, [sp, #4]
|
||
8004f6a: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004f6e: 9300 str r3, [sp, #0]
|
||
8004f70: 2310 movs r3, #16
|
||
8004f72: 2182 movs r1, #130 ; 0x82
|
||
8004f74: 2000 movs r0, #0
|
||
8004f76: f7ff faa7 bl 80044c8 <LCD_ShowString>
|
||
{
|
||
8004f7a: e0cb b.n 8005114 <TP_adjustment+0x548>
|
||
8004f7c: 40011c00 .word 0x40011c00
|
||
8004f80: 080082fc .word 0x080082fc
|
||
8004f84: 08008308 .word 0x08008308
|
||
8004f88: 08008314 .word 0x08008314
|
||
8004f8c: 08008328 .word 0x08008328
|
||
8004f90: 0800833c .word 0x0800833c
|
||
8004f94: 08008350 .word 0x08008350
|
||
8004f98: 08008364 .word 0x08008364
|
||
}else
|
||
{
|
||
acc_x=x5/260.0;
|
||
8004f9c: 6db8 ldr r0, [r7, #88] ; 0x58
|
||
8004f9e: f7fb fa9d bl 80004dc <__aeabi_i2d>
|
||
8004fa2: f04f 0200 mov.w r2, #0
|
||
8004fa6: 4b66 ldr r3, [pc, #408] ; (8005140 <TP_adjustment+0x574>)
|
||
8004fa8: f7fb fc2c bl 8000804 <__aeabi_ddiv>
|
||
8004fac: 4602 mov r2, r0
|
||
8004fae: 460b mov r3, r1
|
||
8004fb0: 4610 mov r0, r2
|
||
8004fb2: 4619 mov r1, r3
|
||
8004fb4: f7fb fdd4 bl 8000b60 <__aeabi_d2f>
|
||
8004fb8: 4603 mov r3, r0
|
||
8004fba: 653b str r3, [r7, #80] ; 0x50
|
||
acc_y=y5/180.0;
|
||
8004fbc: 6d78 ldr r0, [r7, #84] ; 0x54
|
||
8004fbe: f7fb fa8d bl 80004dc <__aeabi_i2d>
|
||
8004fc2: f04f 0200 mov.w r2, #0
|
||
8004fc6: 4b5f ldr r3, [pc, #380] ; (8005144 <TP_adjustment+0x578>)
|
||
8004fc8: f7fb fc1c bl 8000804 <__aeabi_ddiv>
|
||
8004fcc: 4602 mov r2, r0
|
||
8004fce: 460b mov r3, r1
|
||
8004fd0: 4610 mov r0, r2
|
||
8004fd2: 4619 mov r1, r3
|
||
8004fd4: f7fb fdc4 bl 8000b60 <__aeabi_d2f>
|
||
8004fd8: 4603 mov r3, r0
|
||
8004fda: 64fb str r3, [r7, #76] ; 0x4c
|
||
|
||
offset_x=(((xd/acc_x)-30)+((xl/acc_x)-290))/2;
|
||
8004fdc: 6eb8 ldr r0, [r7, #104] ; 0x68
|
||
8004fde: f7fb fec9 bl 8000d74 <__aeabi_i2f>
|
||
8004fe2: 4603 mov r3, r0
|
||
8004fe4: 6d39 ldr r1, [r7, #80] ; 0x50
|
||
8004fe6: 4618 mov r0, r3
|
||
8004fe8: f7fb ffcc bl 8000f84 <__aeabi_fdiv>
|
||
8004fec: 4603 mov r3, r0
|
||
8004fee: 4956 ldr r1, [pc, #344] ; (8005148 <TP_adjustment+0x57c>)
|
||
8004ff0: 4618 mov r0, r3
|
||
8004ff2: f7fb fe09 bl 8000c08 <__aeabi_fsub>
|
||
8004ff6: 4603 mov r3, r0
|
||
8004ff8: 461c mov r4, r3
|
||
8004ffa: 6e78 ldr r0, [r7, #100] ; 0x64
|
||
8004ffc: f7fb feba bl 8000d74 <__aeabi_i2f>
|
||
8005000: 4603 mov r3, r0
|
||
8005002: 6d39 ldr r1, [r7, #80] ; 0x50
|
||
8005004: 4618 mov r0, r3
|
||
8005006: f7fb ffbd bl 8000f84 <__aeabi_fdiv>
|
||
800500a: 4603 mov r3, r0
|
||
800500c: 494f ldr r1, [pc, #316] ; (800514c <TP_adjustment+0x580>)
|
||
800500e: 4618 mov r0, r3
|
||
8005010: f7fb fdfa bl 8000c08 <__aeabi_fsub>
|
||
8005014: 4603 mov r3, r0
|
||
8005016: 4619 mov r1, r3
|
||
8005018: 4620 mov r0, r4
|
||
800501a: f7fb fdf7 bl 8000c0c <__addsf3>
|
||
800501e: 4603 mov r3, r0
|
||
8005020: f04f 4180 mov.w r1, #1073741824 ; 0x40000000
|
||
8005024: 4618 mov r0, r3
|
||
8005026: f7fb ffad bl 8000f84 <__aeabi_fdiv>
|
||
800502a: 4603 mov r3, r0
|
||
800502c: 4618 mov r0, r3
|
||
800502e: f7fc f845 bl 80010bc <__aeabi_f2iz>
|
||
8005032: 4603 mov r3, r0
|
||
8005034: 64bb str r3, [r7, #72] ; 0x48
|
||
offset_y=(((yd/acc_y)-30)+((yl/acc_y)-210))/2;
|
||
8005036: 6e38 ldr r0, [r7, #96] ; 0x60
|
||
8005038: f7fb fe9c bl 8000d74 <__aeabi_i2f>
|
||
800503c: 4603 mov r3, r0
|
||
800503e: 6cf9 ldr r1, [r7, #76] ; 0x4c
|
||
8005040: 4618 mov r0, r3
|
||
8005042: f7fb ff9f bl 8000f84 <__aeabi_fdiv>
|
||
8005046: 4603 mov r3, r0
|
||
8005048: 493f ldr r1, [pc, #252] ; (8005148 <TP_adjustment+0x57c>)
|
||
800504a: 4618 mov r0, r3
|
||
800504c: f7fb fddc bl 8000c08 <__aeabi_fsub>
|
||
8005050: 4603 mov r3, r0
|
||
8005052: 461c mov r4, r3
|
||
8005054: 6df8 ldr r0, [r7, #92] ; 0x5c
|
||
8005056: f7fb fe8d bl 8000d74 <__aeabi_i2f>
|
||
800505a: 4603 mov r3, r0
|
||
800505c: 6cf9 ldr r1, [r7, #76] ; 0x4c
|
||
800505e: 4618 mov r0, r3
|
||
8005060: f7fb ff90 bl 8000f84 <__aeabi_fdiv>
|
||
8005064: 4603 mov r3, r0
|
||
8005066: 493a ldr r1, [pc, #232] ; (8005150 <TP_adjustment+0x584>)
|
||
8005068: 4618 mov r0, r3
|
||
800506a: f7fb fdcd bl 8000c08 <__aeabi_fsub>
|
||
800506e: 4603 mov r3, r0
|
||
8005070: 4619 mov r1, r3
|
||
8005072: 4620 mov r0, r4
|
||
8005074: f7fb fdca bl 8000c0c <__addsf3>
|
||
8005078: 4603 mov r3, r0
|
||
800507a: f04f 4180 mov.w r1, #1073741824 ; 0x40000000
|
||
800507e: 4618 mov r0, r3
|
||
8005080: f7fb ff80 bl 8000f84 <__aeabi_fdiv>
|
||
8005084: 4603 mov r3, r0
|
||
8005086: 4618 mov r0, r3
|
||
8005088: f7fc f818 bl 80010bc <__aeabi_f2iz>
|
||
800508c: 4603 mov r3, r0
|
||
800508e: 647b str r3, [r7, #68] ; 0x44
|
||
|
||
tconfig.x_acc=acc_x;
|
||
8005090: 4a30 ldr r2, [pc, #192] ; (8005154 <TP_adjustment+0x588>)
|
||
8005092: 6d3b ldr r3, [r7, #80] ; 0x50
|
||
8005094: 6053 str r3, [r2, #4]
|
||
tconfig.x_offset=offset_x;
|
||
8005096: 4a2f ldr r2, [pc, #188] ; (8005154 <TP_adjustment+0x588>)
|
||
8005098: 6cbb ldr r3, [r7, #72] ; 0x48
|
||
800509a: 60d3 str r3, [r2, #12]
|
||
tconfig.y_acc=acc_y;
|
||
800509c: 4a2d ldr r2, [pc, #180] ; (8005154 <TP_adjustment+0x588>)
|
||
800509e: 6cfb ldr r3, [r7, #76] ; 0x4c
|
||
80050a0: 6093 str r3, [r2, #8]
|
||
tconfig.y_offset=offset_y;
|
||
80050a2: 4a2c ldr r2, [pc, #176] ; (8005154 <TP_adjustment+0x588>)
|
||
80050a4: 6c7b ldr r3, [r7, #68] ; 0x44
|
||
80050a6: 6113 str r3, [r2, #16]
|
||
|
||
tconfig.begin=0xab;
|
||
80050a8: 4b2a ldr r3, [pc, #168] ; (8005154 <TP_adjustment+0x588>)
|
||
80050aa: 22ab movs r2, #171 ; 0xab
|
||
80050ac: 701a strb r2, [r3, #0]
|
||
tconfig.end=0xcd;
|
||
80050ae: 4b29 ldr r3, [pc, #164] ; (8005154 <TP_adjustment+0x588>)
|
||
80050b0: 22cd movs r2, #205 ; 0xcd
|
||
80050b2: 751a strb r2, [r3, #20]
|
||
|
||
|
||
sprintf(str,"x_acc=%f y_acc=%f",acc_x,acc_y);
|
||
80050b4: 6d38 ldr r0, [r7, #80] ; 0x50
|
||
80050b6: f7fb fa23 bl 8000500 <__aeabi_f2d>
|
||
80050ba: 4604 mov r4, r0
|
||
80050bc: 460d mov r5, r1
|
||
80050be: 6cf8 ldr r0, [r7, #76] ; 0x4c
|
||
80050c0: f7fb fa1e bl 8000500 <__aeabi_f2d>
|
||
80050c4: 4602 mov r2, r0
|
||
80050c6: 460b mov r3, r1
|
||
80050c8: 1d38 adds r0, r7, #4
|
||
80050ca: e9cd 2300 strd r2, r3, [sp]
|
||
80050ce: 4622 mov r2, r4
|
||
80050d0: 462b mov r3, r5
|
||
80050d2: 4921 ldr r1, [pc, #132] ; (8005158 <TP_adjustment+0x58c>)
|
||
80050d4: f000 ff74 bl 8005fc0 <siprintf>
|
||
LCD_ShowString(0,66+16+16+16+16,str,16,RED,RED);
|
||
80050d8: 1d3a adds r2, r7, #4
|
||
80050da: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
80050de: 9301 str r3, [sp, #4]
|
||
80050e0: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
80050e4: 9300 str r3, [sp, #0]
|
||
80050e6: 2310 movs r3, #16
|
||
80050e8: 2182 movs r1, #130 ; 0x82
|
||
80050ea: 2000 movs r0, #0
|
||
80050ec: f7ff f9ec bl 80044c8 <LCD_ShowString>
|
||
sprintf(str,"x_offset=%d y_offset=%d",offset_x,offset_y);
|
||
80050f0: 1d38 adds r0, r7, #4
|
||
80050f2: 6c7b ldr r3, [r7, #68] ; 0x44
|
||
80050f4: 6cba ldr r2, [r7, #72] ; 0x48
|
||
80050f6: 4919 ldr r1, [pc, #100] ; (800515c <TP_adjustment+0x590>)
|
||
80050f8: f000 ff62 bl 8005fc0 <siprintf>
|
||
LCD_ShowString(0,66+16+16+16+16+16,str,16,RED,RED);
|
||
80050fc: 1d3a adds r2, r7, #4
|
||
80050fe: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8005102: 9301 str r3, [sp, #4]
|
||
8005104: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8005108: 9300 str r3, [sp, #0]
|
||
800510a: 2310 movs r3, #16
|
||
800510c: 2192 movs r1, #146 ; 0x92
|
||
800510e: 2000 movs r0, #0
|
||
8005110: f7ff f9da bl 80044c8 <LCD_ShowString>
|
||
|
||
}
|
||
EEPROM_WRITE_BATY(16,(char *)&tconfig,sizeof(touch_config));
|
||
8005114: 2218 movs r2, #24
|
||
8005116: 490f ldr r1, [pc, #60] ; (8005154 <TP_adjustment+0x588>)
|
||
8005118: 2010 movs r0, #16
|
||
800511a: f7ff fac1 bl 80046a0 <EEPROM_WRITE_BATY>
|
||
HAL_Delay(1000);
|
||
800511e: f44f 707a mov.w r0, #1000 ; 0x3e8
|
||
8005122: f7fc fbbb bl 800189c <HAL_Delay>
|
||
return;
|
||
8005126: e008 b.n 800513a <TP_adjustment+0x56e>
|
||
while(HAL_GetTick()<wait)
|
||
8005128: f7fc fbae bl 8001888 <HAL_GetTick>
|
||
800512c: 4602 mov r2, r0
|
||
800512e: 6f3b ldr r3, [r7, #112] ; 0x70
|
||
8005130: 4293 cmp r3, r2
|
||
8005132: f63f ad81 bhi.w 8004c38 <TP_adjustment+0x6c>
|
||
8005136: e000 b.n 800513a <TP_adjustment+0x56e>
|
||
return;
|
||
8005138: bf00 nop
|
||
|
||
}
|
||
}
|
||
|
||
}
|
||
800513a: 3788 adds r7, #136 ; 0x88
|
||
800513c: 46bd mov sp, r7
|
||
800513e: bdb0 pop {r4, r5, r7, pc}
|
||
8005140: 40704000 .word 0x40704000
|
||
8005144: 40668000 .word 0x40668000
|
||
8005148: 41f00000 .word 0x41f00000
|
||
800514c: 43910000 .word 0x43910000
|
||
8005150: 43520000 .word 0x43520000
|
||
8005154: 200002c8 .word 0x200002c8
|
||
8005158: 0800836c .word 0x0800836c
|
||
800515c: 08008380 .word 0x08008380
|
||
|
||
08005160 <main_app>:
|
||
extern touch_device t0;
|
||
|
||
task run_loop;//��ѭ��״̬��
|
||
|
||
void main_app()
|
||
{
|
||
8005160: b580 push {r7, lr}
|
||
8005162: b086 sub sp, #24
|
||
8005164: af04 add r7, sp, #16
|
||
LCDx_Init();
|
||
8005166: f7fe fe0b bl 8003d80 <LCDx_Init>
|
||
EPPROM_SLOWWRITE_INIT();
|
||
800516a: f7ff fa27 bl 80045bc <EPPROM_SLOWWRITE_INIT>
|
||
|
||
TP_adjustment();
|
||
800516e: f7ff fd2d bl 8004bcc <TP_adjustment>
|
||
|
||
|
||
UI *ui=UI_Init(BLACK);
|
||
8005172: 2000 movs r0, #0
|
||
8005174: f000 f886 bl 8005284 <UI_Init>
|
||
8005178: 6078 str r0, [r7, #4]
|
||
|
||
New_Window(ui,10,10,100,100,WHITE,"WHITE");
|
||
800517a: 4b28 ldr r3, [pc, #160] ; (800521c <main_app+0xbc>)
|
||
800517c: 9302 str r3, [sp, #8]
|
||
800517e: f64f 73ff movw r3, #65535 ; 0xffff
|
||
8005182: 9301 str r3, [sp, #4]
|
||
8005184: 2364 movs r3, #100 ; 0x64
|
||
8005186: 9300 str r3, [sp, #0]
|
||
8005188: 2364 movs r3, #100 ; 0x64
|
||
800518a: 220a movs r2, #10
|
||
800518c: 210a movs r1, #10
|
||
800518e: 6878 ldr r0, [r7, #4]
|
||
8005190: f000 f897 bl 80052c2 <New_Window>
|
||
New_Window(ui,25,30,150,100,GREEN,"GREEN");
|
||
8005194: 4b22 ldr r3, [pc, #136] ; (8005220 <main_app+0xc0>)
|
||
8005196: 9302 str r3, [sp, #8]
|
||
8005198: f44f 63fc mov.w r3, #2016 ; 0x7e0
|
||
800519c: 9301 str r3, [sp, #4]
|
||
800519e: 2364 movs r3, #100 ; 0x64
|
||
80051a0: 9300 str r3, [sp, #0]
|
||
80051a2: 2396 movs r3, #150 ; 0x96
|
||
80051a4: 221e movs r2, #30
|
||
80051a6: 2119 movs r1, #25
|
||
80051a8: 6878 ldr r0, [r7, #4]
|
||
80051aa: f000 f88a bl 80052c2 <New_Window>
|
||
New_Window(ui,80,80,60,90,YELLOW,"YELLOW");
|
||
80051ae: 4b1d ldr r3, [pc, #116] ; (8005224 <main_app+0xc4>)
|
||
80051b0: 9302 str r3, [sp, #8]
|
||
80051b2: f64f 73e0 movw r3, #65504 ; 0xffe0
|
||
80051b6: 9301 str r3, [sp, #4]
|
||
80051b8: 235a movs r3, #90 ; 0x5a
|
||
80051ba: 9300 str r3, [sp, #0]
|
||
80051bc: 233c movs r3, #60 ; 0x3c
|
||
80051be: 2250 movs r2, #80 ; 0x50
|
||
80051c0: 2150 movs r1, #80 ; 0x50
|
||
80051c2: 6878 ldr r0, [r7, #4]
|
||
80051c4: f000 f87d bl 80052c2 <New_Window>
|
||
New_Window(ui,120,90,70,60,MAGENTA,"MAGENTA");
|
||
80051c8: 4b17 ldr r3, [pc, #92] ; (8005228 <main_app+0xc8>)
|
||
80051ca: 9302 str r3, [sp, #8]
|
||
80051cc: f64f 031f movw r3, #63519 ; 0xf81f
|
||
80051d0: 9301 str r3, [sp, #4]
|
||
80051d2: 233c movs r3, #60 ; 0x3c
|
||
80051d4: 9300 str r3, [sp, #0]
|
||
80051d6: 2346 movs r3, #70 ; 0x46
|
||
80051d8: 225a movs r2, #90 ; 0x5a
|
||
80051da: 2178 movs r1, #120 ; 0x78
|
||
80051dc: 6878 ldr r0, [r7, #4]
|
||
80051de: f000 f870 bl 80052c2 <New_Window>
|
||
|
||
ui->refresh_ui_flag=1;
|
||
80051e2: 687b ldr r3, [r7, #4]
|
||
80051e4: 2201 movs r2, #1
|
||
80051e6: 731a strb r2, [r3, #12]
|
||
|
||
while(1)
|
||
{
|
||
LCD_set_dot(t0.pix_x, t0.pix_y, RED);
|
||
80051e8: 4b10 ldr r3, [pc, #64] ; (800522c <main_app+0xcc>)
|
||
80051ea: 685b ldr r3, [r3, #4]
|
||
80051ec: b29b uxth r3, r3
|
||
80051ee: 4a0f ldr r2, [pc, #60] ; (800522c <main_app+0xcc>)
|
||
80051f0: 6892 ldr r2, [r2, #8]
|
||
80051f2: b291 uxth r1, r2
|
||
80051f4: f44f 4278 mov.w r2, #63488 ; 0xf800
|
||
80051f8: 4618 mov r0, r3
|
||
80051fa: f7fe ff47 bl 800408c <LCD_set_dot>
|
||
{
|
||
|
||
|
||
}
|
||
*/
|
||
if(ui->refresh_ui_flag==1)
|
||
80051fe: 687b ldr r3, [r7, #4]
|
||
8005200: 7b1b ldrb r3, [r3, #12]
|
||
8005202: 2b01 cmp r3, #1
|
||
8005204: d105 bne.n 8005212 <main_app+0xb2>
|
||
{
|
||
ui->refresh_ui_flag=0;
|
||
8005206: 687b ldr r3, [r7, #4]
|
||
8005208: 2200 movs r2, #0
|
||
800520a: 731a strb r2, [r3, #12]
|
||
Refresh_UI(ui);
|
||
800520c: 6878 ldr r0, [r7, #4]
|
||
800520e: f000 f8c1 bl 8005394 <Refresh_UI>
|
||
|
||
}
|
||
TP_Server();
|
||
8005212: f7ff fc29 bl 8004a68 <TP_Server>
|
||
EEPROM_SLOWWRITE_SERVER();
|
||
8005216: f7ff f9eb bl 80045f0 <EEPROM_SLOWWRITE_SERVER>
|
||
LCD_set_dot(t0.pix_x, t0.pix_y, RED);
|
||
800521a: e7e5 b.n 80051e8 <main_app+0x88>
|
||
800521c: 08008398 .word 0x08008398
|
||
8005220: 080083a0 .word 0x080083a0
|
||
8005224: 080083a8 .word 0x080083a8
|
||
8005228: 080083b0 .word 0x080083b0
|
||
800522c: 200002e0 .word 0x200002e0
|
||
|
||
08005230 <Inteface_SetCursor>:
|
||
*/
|
||
|
||
#include "windows.h"
|
||
|
||
void Inteface_SetCursor(uint16_t Xpos, uint16_t Ypos)
|
||
{
|
||
8005230: b580 push {r7, lr}
|
||
8005232: b082 sub sp, #8
|
||
8005234: af00 add r7, sp, #0
|
||
8005236: 4603 mov r3, r0
|
||
8005238: 460a mov r2, r1
|
||
800523a: 80fb strh r3, [r7, #6]
|
||
800523c: 4613 mov r3, r2
|
||
800523e: 80bb strh r3, [r7, #4]
|
||
LCD_SetCursor(Xpos,Ypos); //���ù���λ��
|
||
8005240: 88ba ldrh r2, [r7, #4]
|
||
8005242: 88fb ldrh r3, [r7, #6]
|
||
8005244: 4611 mov r1, r2
|
||
8005246: 4618 mov r0, r3
|
||
8005248: f7fe fe90 bl 8003f6c <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
800524c: 4b04 ldr r3, [pc, #16] ; (8005260 <Inteface_SetCursor+0x30>)
|
||
800524e: 79da ldrb r2, [r3, #7]
|
||
8005250: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
8005254: b292 uxth r2, r2
|
||
8005256: 801a strh r2, [r3, #0]
|
||
}
|
||
8005258: bf00 nop
|
||
800525a: 3708 adds r7, #8
|
||
800525c: 46bd mov sp, r7
|
||
800525e: bd80 pop {r7, pc}
|
||
8005260: 200002a8 .word 0x200002a8
|
||
|
||
08005264 <Inteface_SetColor>:
|
||
void Inteface_SetColor(uint16_t color)
|
||
{
|
||
8005264: b480 push {r7}
|
||
8005266: b083 sub sp, #12
|
||
8005268: af00 add r7, sp, #0
|
||
800526a: 4603 mov r3, r0
|
||
800526c: 80fb strh r3, [r7, #6]
|
||
LCD_DATA_ADDRESS=color;
|
||
800526e: 4a04 ldr r2, [pc, #16] ; (8005280 <Inteface_SetColor+0x1c>)
|
||
8005270: 88fb ldrh r3, [r7, #6]
|
||
8005272: 8013 strh r3, [r2, #0]
|
||
}
|
||
8005274: bf00 nop
|
||
8005276: 370c adds r7, #12
|
||
8005278: 46bd mov sp, r7
|
||
800527a: bc80 pop {r7}
|
||
800527c: 4770 bx lr
|
||
800527e: bf00 nop
|
||
8005280: 6c000800 .word 0x6c000800
|
||
|
||
08005284 <UI_Init>:
|
||
|
||
UI *UI_Init(COLOR_16 background)
|
||
{
|
||
8005284: b580 push {r7, lr}
|
||
8005286: b084 sub sp, #16
|
||
8005288: af00 add r7, sp, #0
|
||
800528a: 6078 str r0, [r7, #4]
|
||
UI *ui;
|
||
ui = (UI*)malloc(sizeof(UI));
|
||
800528c: 2010 movs r0, #16
|
||
800528e: f000 f969 bl 8005564 <malloc>
|
||
8005292: 4603 mov r3, r0
|
||
8005294: 60fb str r3, [r7, #12]
|
||
if(ui!=NULL)
|
||
8005296: 68fb ldr r3, [r7, #12]
|
||
8005298: 2b00 cmp r3, #0
|
||
800529a: d00d beq.n 80052b8 <UI_Init+0x34>
|
||
{
|
||
ui->background=background;
|
||
800529c: 68fb ldr r3, [r7, #12]
|
||
800529e: 687a ldr r2, [r7, #4]
|
||
80052a0: 601a str r2, [r3, #0]
|
||
ui->windows=NULL;
|
||
80052a2: 68fb ldr r3, [r7, #12]
|
||
80052a4: 2200 movs r2, #0
|
||
80052a6: 605a str r2, [r3, #4]
|
||
ui->last_windows=NULL;
|
||
80052a8: 68fb ldr r3, [r7, #12]
|
||
80052aa: 2200 movs r2, #0
|
||
80052ac: 609a str r2, [r3, #8]
|
||
ui->refresh_ui_flag=1;
|
||
80052ae: 68fb ldr r3, [r7, #12]
|
||
80052b0: 2201 movs r2, #1
|
||
80052b2: 731a strb r2, [r3, #12]
|
||
ui->touch->acc_y=0;
|
||
|
||
}
|
||
*/
|
||
|
||
return ui;
|
||
80052b4: 68fb ldr r3, [r7, #12]
|
||
80052b6: e000 b.n 80052ba <UI_Init+0x36>
|
||
}
|
||
return NULL;
|
||
80052b8: 2300 movs r3, #0
|
||
|
||
}
|
||
80052ba: 4618 mov r0, r3
|
||
80052bc: 3710 adds r7, #16
|
||
80052be: 46bd mov sp, r7
|
||
80052c0: bd80 pop {r7, pc}
|
||
|
||
080052c2 <New_Window>:
|
||
|
||
window *New_Window(UI *ui,uint16_t x,uint16_t y,uint16_t width,uint16_t high,COLOR_16 background,const char *title)
|
||
{
|
||
80052c2: b580 push {r7, lr}
|
||
80052c4: b088 sub sp, #32
|
||
80052c6: af00 add r7, sp, #0
|
||
80052c8: 60f8 str r0, [r7, #12]
|
||
80052ca: 4608 mov r0, r1
|
||
80052cc: 4611 mov r1, r2
|
||
80052ce: 461a mov r2, r3
|
||
80052d0: 4603 mov r3, r0
|
||
80052d2: 817b strh r3, [r7, #10]
|
||
80052d4: 460b mov r3, r1
|
||
80052d6: 813b strh r3, [r7, #8]
|
||
80052d8: 4613 mov r3, r2
|
||
80052da: 80fb strh r3, [r7, #6]
|
||
window *temp_window;
|
||
temp_window = (window*)malloc(sizeof(window));
|
||
80052dc: 201c movs r0, #28
|
||
80052de: f000 f941 bl 8005564 <malloc>
|
||
80052e2: 4603 mov r3, r0
|
||
80052e4: 617b str r3, [r7, #20]
|
||
if(temp_window!=NULL)
|
||
80052e6: 697b ldr r3, [r7, #20]
|
||
80052e8: 2b00 cmp r3, #0
|
||
80052ea: d022 beq.n 8005332 <New_Window+0x70>
|
||
{
|
||
temp_window->background=background;
|
||
80052ec: 697b ldr r3, [r7, #20]
|
||
80052ee: 6afa ldr r2, [r7, #44] ; 0x2c
|
||
80052f0: 609a str r2, [r3, #8]
|
||
temp_window->high=high;
|
||
80052f2: 697b ldr r3, [r7, #20]
|
||
80052f4: 8d3a ldrh r2, [r7, #40] ; 0x28
|
||
80052f6: 80da strh r2, [r3, #6]
|
||
temp_window->width=width;
|
||
80052f8: 697b ldr r3, [r7, #20]
|
||
80052fa: 88fa ldrh r2, [r7, #6]
|
||
80052fc: 809a strh r2, [r3, #4]
|
||
temp_window->x=x;
|
||
80052fe: 697b ldr r3, [r7, #20]
|
||
8005300: 897a ldrh r2, [r7, #10]
|
||
8005302: 801a strh r2, [r3, #0]
|
||
temp_window->y=y;
|
||
8005304: 697b ldr r3, [r7, #20]
|
||
8005306: 893a ldrh r2, [r7, #8]
|
||
8005308: 805a strh r2, [r3, #2]
|
||
for(int a=0;a<16;a++)
|
||
800530a: 2300 movs r3, #0
|
||
800530c: 61fb str r3, [r7, #28]
|
||
800530e: e00c b.n 800532a <New_Window+0x68>
|
||
{
|
||
temp_window->title[a]=title[a];
|
||
8005310: 69fb ldr r3, [r7, #28]
|
||
8005312: 6b3a ldr r2, [r7, #48] ; 0x30
|
||
8005314: 4413 add r3, r2
|
||
8005316: 7819 ldrb r1, [r3, #0]
|
||
8005318: 697a ldr r2, [r7, #20]
|
||
800531a: 69fb ldr r3, [r7, #28]
|
||
800531c: 4413 add r3, r2
|
||
800531e: 330c adds r3, #12
|
||
8005320: 460a mov r2, r1
|
||
8005322: 701a strb r2, [r3, #0]
|
||
for(int a=0;a<16;a++)
|
||
8005324: 69fb ldr r3, [r7, #28]
|
||
8005326: 3301 adds r3, #1
|
||
8005328: 61fb str r3, [r7, #28]
|
||
800532a: 69fb ldr r3, [r7, #28]
|
||
800532c: 2b0f cmp r3, #15
|
||
800532e: ddef ble.n 8005310 <New_Window+0x4e>
|
||
8005330: e001 b.n 8005336 <New_Window+0x74>
|
||
}
|
||
}else{return NULL;}
|
||
8005332: 2300 movs r3, #0
|
||
8005334: e02a b.n 800538c <New_Window+0xca>
|
||
|
||
windows_stack *temp_windows_stack;
|
||
temp_windows_stack=ui->last_windows;
|
||
8005336: 68fb ldr r3, [r7, #12]
|
||
8005338: 689b ldr r3, [r3, #8]
|
||
800533a: 61bb str r3, [r7, #24]
|
||
if(temp_windows_stack==NULL)
|
||
800533c: 69bb ldr r3, [r7, #24]
|
||
800533e: 2b00 cmp r3, #0
|
||
8005340: d10b bne.n 800535a <New_Window+0x98>
|
||
{
|
||
temp_windows_stack=(windows_stack*)malloc(sizeof(windows_stack));
|
||
8005342: 200c movs r0, #12
|
||
8005344: f000 f90e bl 8005564 <malloc>
|
||
8005348: 4603 mov r3, r0
|
||
800534a: 61bb str r3, [r7, #24]
|
||
temp_windows_stack->up=NULL;
|
||
800534c: 69bb ldr r3, [r7, #24]
|
||
800534e: 2200 movs r2, #0
|
||
8005350: 601a str r2, [r3, #0]
|
||
ui->windows=temp_windows_stack;
|
||
8005352: 68fb ldr r3, [r7, #12]
|
||
8005354: 69ba ldr r2, [r7, #24]
|
||
8005356: 605a str r2, [r3, #4]
|
||
8005358: e00e b.n 8005378 <New_Window+0xb6>
|
||
while(temp_windows_stack->next!=NULL)
|
||
{
|
||
temp_windows_stack=temp_windows_stack->next;
|
||
}
|
||
*/
|
||
windows_stack *up=temp_windows_stack;//���ݵ�ǰ����ָ��
|
||
800535a: 69bb ldr r3, [r7, #24]
|
||
800535c: 613b str r3, [r7, #16]
|
||
temp_windows_stack->next=(windows_stack*)malloc(sizeof(windows_stack));
|
||
800535e: 200c movs r0, #12
|
||
8005360: f000 f900 bl 8005564 <malloc>
|
||
8005364: 4603 mov r3, r0
|
||
8005366: 461a mov r2, r3
|
||
8005368: 69bb ldr r3, [r7, #24]
|
||
800536a: 609a str r2, [r3, #8]
|
||
temp_windows_stack=temp_windows_stack->next;
|
||
800536c: 69bb ldr r3, [r7, #24]
|
||
800536e: 689b ldr r3, [r3, #8]
|
||
8005370: 61bb str r3, [r7, #24]
|
||
temp_windows_stack->up=up;
|
||
8005372: 69bb ldr r3, [r7, #24]
|
||
8005374: 693a ldr r2, [r7, #16]
|
||
8005376: 601a str r2, [r3, #0]
|
||
}
|
||
temp_windows_stack->next=NULL;
|
||
8005378: 69bb ldr r3, [r7, #24]
|
||
800537a: 2200 movs r2, #0
|
||
800537c: 609a str r2, [r3, #8]
|
||
temp_windows_stack->window=temp_window;
|
||
800537e: 69bb ldr r3, [r7, #24]
|
||
8005380: 697a ldr r2, [r7, #20]
|
||
8005382: 605a str r2, [r3, #4]
|
||
|
||
ui->last_windows=temp_windows_stack;
|
||
8005384: 68fb ldr r3, [r7, #12]
|
||
8005386: 69ba ldr r2, [r7, #24]
|
||
8005388: 609a str r2, [r3, #8]
|
||
|
||
return temp_window;
|
||
800538a: 697b ldr r3, [r7, #20]
|
||
|
||
}
|
||
800538c: 4618 mov r0, r3
|
||
800538e: 3720 adds r7, #32
|
||
8005390: 46bd mov sp, r7
|
||
8005392: bd80 pop {r7, pc}
|
||
|
||
08005394 <Refresh_UI>:
|
||
* �ܿ�ϧ ��������д�Ĵ���Ҫ������
|
||
* ���㷨ʵ���ڵ���ϵ������ͦ��
|
||
*
|
||
* */
|
||
void Refresh_UI(UI *ui)
|
||
{
|
||
8005394: b580 push {r7, lr}
|
||
8005396: b08a sub sp, #40 ; 0x28
|
||
8005398: af02 add r7, sp, #8
|
||
800539a: 6078 str r0, [r7, #4]
|
||
int flag=0;
|
||
800539c: 2300 movs r3, #0
|
||
800539e: 61fb str r3, [r7, #28]
|
||
uint16_t dot_y=0,dot_x=0;
|
||
80053a0: 2300 movs r3, #0
|
||
80053a2: 837b strh r3, [r7, #26]
|
||
80053a4: 2300 movs r3, #0
|
||
80053a6: 833b strh r3, [r7, #24]
|
||
|
||
//������
|
||
|
||
for(dot_y=0;dot_y<240;dot_y++)
|
||
80053a8: 2300 movs r3, #0
|
||
80053aa: 837b strh r3, [r7, #26]
|
||
80053ac: e018 b.n 80053e0 <Refresh_UI+0x4c>
|
||
{
|
||
Inteface_SetCursor(dot_x,dot_y);
|
||
80053ae: 8b7a ldrh r2, [r7, #26]
|
||
80053b0: 8b3b ldrh r3, [r7, #24]
|
||
80053b2: 4611 mov r1, r2
|
||
80053b4: 4618 mov r0, r3
|
||
80053b6: f7ff ff3b bl 8005230 <Inteface_SetCursor>
|
||
for(dot_x=0;dot_x<320;dot_x++)
|
||
80053ba: 2300 movs r3, #0
|
||
80053bc: 833b strh r3, [r7, #24]
|
||
80053be: e008 b.n 80053d2 <Refresh_UI+0x3e>
|
||
{
|
||
Inteface_SetColor(ui->background);
|
||
80053c0: 687b ldr r3, [r7, #4]
|
||
80053c2: 681b ldr r3, [r3, #0]
|
||
80053c4: b29b uxth r3, r3
|
||
80053c6: 4618 mov r0, r3
|
||
80053c8: f7ff ff4c bl 8005264 <Inteface_SetColor>
|
||
for(dot_x=0;dot_x<320;dot_x++)
|
||
80053cc: 8b3b ldrh r3, [r7, #24]
|
||
80053ce: 3301 adds r3, #1
|
||
80053d0: 833b strh r3, [r7, #24]
|
||
80053d2: 8b3b ldrh r3, [r7, #24]
|
||
80053d4: f5b3 7fa0 cmp.w r3, #320 ; 0x140
|
||
80053d8: d3f2 bcc.n 80053c0 <Refresh_UI+0x2c>
|
||
for(dot_y=0;dot_y<240;dot_y++)
|
||
80053da: 8b7b ldrh r3, [r7, #26]
|
||
80053dc: 3301 adds r3, #1
|
||
80053de: 837b strh r3, [r7, #26]
|
||
80053e0: 8b7b ldrh r3, [r7, #26]
|
||
80053e2: 2bef cmp r3, #239 ; 0xef
|
||
80053e4: d9e3 bls.n 80053ae <Refresh_UI+0x1a>
|
||
}
|
||
|
||
|
||
window *temp_window;
|
||
windows_stack *temp_windows_stack,*temp_windows_stack2;
|
||
temp_windows_stack=ui->windows;
|
||
80053e6: 687b ldr r3, [r7, #4]
|
||
80053e8: 685b ldr r3, [r3, #4]
|
||
80053ea: 617b str r3, [r7, #20]
|
||
do
|
||
{
|
||
if(temp_windows_stack!=NULL)
|
||
80053ec: 697b ldr r3, [r7, #20]
|
||
80053ee: 2b00 cmp r3, #0
|
||
80053f0: f000 8082 beq.w 80054f8 <Refresh_UI+0x164>
|
||
{
|
||
flag=1;
|
||
80053f4: 2301 movs r3, #1
|
||
80053f6: 61fb str r3, [r7, #28]
|
||
|
||
//
|
||
temp_window=temp_windows_stack->window;//ȡ�����ڵ���Դ����
|
||
80053f8: 697b ldr r3, [r7, #20]
|
||
80053fa: 685b ldr r3, [r3, #4]
|
||
80053fc: 60bb str r3, [r7, #8]
|
||
//��ʼ���ƴ���//���䴰�ڱ���
|
||
for(uint16_t temp_y=0;temp_y<temp_window->high;temp_y++)
|
||
80053fe: 2300 movs r3, #0
|
||
8005400: 827b strh r3, [r7, #18]
|
||
8005402: e033 b.n 800546c <Refresh_UI+0xd8>
|
||
{
|
||
Inteface_SetCursor(temp_window->x,temp_window->y+temp_y);
|
||
8005404: 68bb ldr r3, [r7, #8]
|
||
8005406: 8818 ldrh r0, [r3, #0]
|
||
8005408: 68bb ldr r3, [r7, #8]
|
||
800540a: 885a ldrh r2, [r3, #2]
|
||
800540c: 8a7b ldrh r3, [r7, #18]
|
||
800540e: 4413 add r3, r2
|
||
8005410: b29b uxth r3, r3
|
||
8005412: 4619 mov r1, r3
|
||
8005414: f7ff ff0c bl 8005230 <Inteface_SetCursor>
|
||
for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
|
||
8005418: 2300 movs r3, #0
|
||
800541a: 823b strh r3, [r7, #16]
|
||
800541c: e01e b.n 800545c <Refresh_UI+0xc8>
|
||
{
|
||
if(temp_i==0||temp_y==0||temp_i==temp_window->width-1||temp_y==temp_window->high-1)
|
||
800541e: 8a3b ldrh r3, [r7, #16]
|
||
8005420: 2b00 cmp r3, #0
|
||
8005422: d00e beq.n 8005442 <Refresh_UI+0xae>
|
||
8005424: 8a7b ldrh r3, [r7, #18]
|
||
8005426: 2b00 cmp r3, #0
|
||
8005428: d00b beq.n 8005442 <Refresh_UI+0xae>
|
||
800542a: 8a3a ldrh r2, [r7, #16]
|
||
800542c: 68bb ldr r3, [r7, #8]
|
||
800542e: 889b ldrh r3, [r3, #4]
|
||
8005430: 3b01 subs r3, #1
|
||
8005432: 429a cmp r2, r3
|
||
8005434: d005 beq.n 8005442 <Refresh_UI+0xae>
|
||
8005436: 8a7a ldrh r2, [r7, #18]
|
||
8005438: 68bb ldr r3, [r7, #8]
|
||
800543a: 88db ldrh r3, [r3, #6]
|
||
800543c: 3b01 subs r3, #1
|
||
800543e: 429a cmp r2, r3
|
||
8005440: d103 bne.n 800544a <Refresh_UI+0xb6>
|
||
{
|
||
Inteface_SetColor(BLUE);
|
||
8005442: 201f movs r0, #31
|
||
8005444: f7ff ff0e bl 8005264 <Inteface_SetColor>
|
||
8005448: e005 b.n 8005456 <Refresh_UI+0xc2>
|
||
}else
|
||
{
|
||
Inteface_SetColor(temp_window->background);
|
||
800544a: 68bb ldr r3, [r7, #8]
|
||
800544c: 689b ldr r3, [r3, #8]
|
||
800544e: b29b uxth r3, r3
|
||
8005450: 4618 mov r0, r3
|
||
8005452: f7ff ff07 bl 8005264 <Inteface_SetColor>
|
||
for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
|
||
8005456: 8a3b ldrh r3, [r7, #16]
|
||
8005458: 3301 adds r3, #1
|
||
800545a: 823b strh r3, [r7, #16]
|
||
800545c: 68bb ldr r3, [r7, #8]
|
||
800545e: 889b ldrh r3, [r3, #4]
|
||
8005460: 8a3a ldrh r2, [r7, #16]
|
||
8005462: 429a cmp r2, r3
|
||
8005464: d3db bcc.n 800541e <Refresh_UI+0x8a>
|
||
for(uint16_t temp_y=0;temp_y<temp_window->high;temp_y++)
|
||
8005466: 8a7b ldrh r3, [r7, #18]
|
||
8005468: 3301 adds r3, #1
|
||
800546a: 827b strh r3, [r7, #18]
|
||
800546c: 68bb ldr r3, [r7, #8]
|
||
800546e: 88db ldrh r3, [r3, #6]
|
||
8005470: 8a7a ldrh r2, [r7, #18]
|
||
8005472: 429a cmp r2, r3
|
||
8005474: d3c6 bcc.n 8005404 <Refresh_UI+0x70>
|
||
}
|
||
|
||
}
|
||
}
|
||
//����bar
|
||
for(uint16_t temp_y=0;temp_y<16;temp_y++)
|
||
8005476: 2300 movs r3, #0
|
||
8005478: 81fb strh r3, [r7, #14]
|
||
800547a: e026 b.n 80054ca <Refresh_UI+0x136>
|
||
{
|
||
Inteface_SetCursor(temp_window->x,temp_window->y+temp_y);
|
||
800547c: 68bb ldr r3, [r7, #8]
|
||
800547e: 8818 ldrh r0, [r3, #0]
|
||
8005480: 68bb ldr r3, [r7, #8]
|
||
8005482: 885a ldrh r2, [r3, #2]
|
||
8005484: 89fb ldrh r3, [r7, #14]
|
||
8005486: 4413 add r3, r2
|
||
8005488: b29b uxth r3, r3
|
||
800548a: 4619 mov r1, r3
|
||
800548c: f7ff fed0 bl 8005230 <Inteface_SetCursor>
|
||
for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
|
||
8005490: 2300 movs r3, #0
|
||
8005492: 81bb strh r3, [r7, #12]
|
||
8005494: e011 b.n 80054ba <Refresh_UI+0x126>
|
||
{
|
||
if(temp_i>temp_window->width-16)
|
||
8005496: 68bb ldr r3, [r7, #8]
|
||
8005498: 889b ldrh r3, [r3, #4]
|
||
800549a: f1a3 020f sub.w r2, r3, #15
|
||
800549e: 89bb ldrh r3, [r7, #12]
|
||
80054a0: 429a cmp r2, r3
|
||
80054a2: dc04 bgt.n 80054ae <Refresh_UI+0x11a>
|
||
{
|
||
Inteface_SetColor(RED);
|
||
80054a4: f44f 4078 mov.w r0, #63488 ; 0xf800
|
||
80054a8: f7ff fedc bl 8005264 <Inteface_SetColor>
|
||
80054ac: e002 b.n 80054b4 <Refresh_UI+0x120>
|
||
}else
|
||
{
|
||
Inteface_SetColor(BLUE);
|
||
80054ae: 201f movs r0, #31
|
||
80054b0: f7ff fed8 bl 8005264 <Inteface_SetColor>
|
||
for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
|
||
80054b4: 89bb ldrh r3, [r7, #12]
|
||
80054b6: 3301 adds r3, #1
|
||
80054b8: 81bb strh r3, [r7, #12]
|
||
80054ba: 68bb ldr r3, [r7, #8]
|
||
80054bc: 889b ldrh r3, [r3, #4]
|
||
80054be: 89ba ldrh r2, [r7, #12]
|
||
80054c0: 429a cmp r2, r3
|
||
80054c2: d3e8 bcc.n 8005496 <Refresh_UI+0x102>
|
||
for(uint16_t temp_y=0;temp_y<16;temp_y++)
|
||
80054c4: 89fb ldrh r3, [r7, #14]
|
||
80054c6: 3301 adds r3, #1
|
||
80054c8: 81fb strh r3, [r7, #14]
|
||
80054ca: 89fb ldrh r3, [r7, #14]
|
||
80054cc: 2b0f cmp r3, #15
|
||
80054ce: d9d5 bls.n 800547c <Refresh_UI+0xe8>
|
||
}
|
||
|
||
}
|
||
}
|
||
//��ʾtitle
|
||
LCD_ShowString(temp_window->x,temp_window->y,&temp_window->title,16,WHITE,WHITE);
|
||
80054d0: 68bb ldr r3, [r7, #8]
|
||
80054d2: 8818 ldrh r0, [r3, #0]
|
||
80054d4: 68bb ldr r3, [r7, #8]
|
||
80054d6: 8859 ldrh r1, [r3, #2]
|
||
80054d8: 68bb ldr r3, [r7, #8]
|
||
80054da: f103 020c add.w r2, r3, #12
|
||
80054de: f64f 73ff movw r3, #65535 ; 0xffff
|
||
80054e2: 9301 str r3, [sp, #4]
|
||
80054e4: f64f 73ff movw r3, #65535 ; 0xffff
|
||
80054e8: 9300 str r3, [sp, #0]
|
||
80054ea: 2310 movs r3, #16
|
||
80054ec: f7fe ffec bl 80044c8 <LCD_ShowString>
|
||
|
||
|
||
|
||
|
||
//������һ������
|
||
temp_windows_stack=temp_windows_stack->next;
|
||
80054f0: 697b ldr r3, [r7, #20]
|
||
80054f2: 689b ldr r3, [r3, #8]
|
||
80054f4: 617b str r3, [r7, #20]
|
||
80054f6: e001 b.n 80054fc <Refresh_UI+0x168>
|
||
}else
|
||
{
|
||
flag=0;
|
||
80054f8: 2300 movs r3, #0
|
||
80054fa: 61fb str r3, [r7, #28]
|
||
}
|
||
|
||
}while(flag);
|
||
80054fc: 69fb ldr r3, [r7, #28]
|
||
80054fe: 2b00 cmp r3, #0
|
||
8005500: f47f af74 bne.w 80053ec <Refresh_UI+0x58>
|
||
}
|
||
|
||
}
|
||
*/
|
||
|
||
}
|
||
8005504: bf00 nop
|
||
8005506: bf00 nop
|
||
8005508: 3720 adds r7, #32
|
||
800550a: 46bd mov sp, r7
|
||
800550c: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08005510 <__errno>:
|
||
8005510: 4b01 ldr r3, [pc, #4] ; (8005518 <__errno+0x8>)
|
||
8005512: 6818 ldr r0, [r3, #0]
|
||
8005514: 4770 bx lr
|
||
8005516: bf00 nop
|
||
8005518: 2000000c .word 0x2000000c
|
||
|
||
0800551c <__libc_init_array>:
|
||
800551c: b570 push {r4, r5, r6, lr}
|
||
800551e: 2600 movs r6, #0
|
||
8005520: 4d0c ldr r5, [pc, #48] ; (8005554 <__libc_init_array+0x38>)
|
||
8005522: 4c0d ldr r4, [pc, #52] ; (8005558 <__libc_init_array+0x3c>)
|
||
8005524: 1b64 subs r4, r4, r5
|
||
8005526: 10a4 asrs r4, r4, #2
|
||
8005528: 42a6 cmp r6, r4
|
||
800552a: d109 bne.n 8005540 <__libc_init_array+0x24>
|
||
800552c: f002 fec4 bl 80082b8 <_init>
|
||
8005530: 2600 movs r6, #0
|
||
8005532: 4d0a ldr r5, [pc, #40] ; (800555c <__libc_init_array+0x40>)
|
||
8005534: 4c0a ldr r4, [pc, #40] ; (8005560 <__libc_init_array+0x44>)
|
||
8005536: 1b64 subs r4, r4, r5
|
||
8005538: 10a4 asrs r4, r4, #2
|
||
800553a: 42a6 cmp r6, r4
|
||
800553c: d105 bne.n 800554a <__libc_init_array+0x2e>
|
||
800553e: bd70 pop {r4, r5, r6, pc}
|
||
8005540: f855 3b04 ldr.w r3, [r5], #4
|
||
8005544: 4798 blx r3
|
||
8005546: 3601 adds r6, #1
|
||
8005548: e7ee b.n 8005528 <__libc_init_array+0xc>
|
||
800554a: f855 3b04 ldr.w r3, [r5], #4
|
||
800554e: 4798 blx r3
|
||
8005550: 3601 adds r6, #1
|
||
8005552: e7f2 b.n 800553a <__libc_init_array+0x1e>
|
||
8005554: 08009214 .word 0x08009214
|
||
8005558: 08009214 .word 0x08009214
|
||
800555c: 08009214 .word 0x08009214
|
||
8005560: 08009218 .word 0x08009218
|
||
|
||
08005564 <malloc>:
|
||
8005564: 4b02 ldr r3, [pc, #8] ; (8005570 <malloc+0xc>)
|
||
8005566: 4601 mov r1, r0
|
||
8005568: 6818 ldr r0, [r3, #0]
|
||
800556a: f000 b85f b.w 800562c <_malloc_r>
|
||
800556e: bf00 nop
|
||
8005570: 2000000c .word 0x2000000c
|
||
|
||
08005574 <free>:
|
||
8005574: 4b02 ldr r3, [pc, #8] ; (8005580 <free+0xc>)
|
||
8005576: 4601 mov r1, r0
|
||
8005578: 6818 ldr r0, [r3, #0]
|
||
800557a: f000 b80b b.w 8005594 <_free_r>
|
||
800557e: bf00 nop
|
||
8005580: 2000000c .word 0x2000000c
|
||
|
||
08005584 <memset>:
|
||
8005584: 4603 mov r3, r0
|
||
8005586: 4402 add r2, r0
|
||
8005588: 4293 cmp r3, r2
|
||
800558a: d100 bne.n 800558e <memset+0xa>
|
||
800558c: 4770 bx lr
|
||
800558e: f803 1b01 strb.w r1, [r3], #1
|
||
8005592: e7f9 b.n 8005588 <memset+0x4>
|
||
|
||
08005594 <_free_r>:
|
||
8005594: b538 push {r3, r4, r5, lr}
|
||
8005596: 4605 mov r5, r0
|
||
8005598: 2900 cmp r1, #0
|
||
800559a: d043 beq.n 8005624 <_free_r+0x90>
|
||
800559c: f851 3c04 ldr.w r3, [r1, #-4]
|
||
80055a0: 1f0c subs r4, r1, #4
|
||
80055a2: 2b00 cmp r3, #0
|
||
80055a4: bfb8 it lt
|
||
80055a6: 18e4 addlt r4, r4, r3
|
||
80055a8: f001 fbc8 bl 8006d3c <__malloc_lock>
|
||
80055ac: 4a1e ldr r2, [pc, #120] ; (8005628 <_free_r+0x94>)
|
||
80055ae: 6813 ldr r3, [r2, #0]
|
||
80055b0: 4610 mov r0, r2
|
||
80055b2: b933 cbnz r3, 80055c2 <_free_r+0x2e>
|
||
80055b4: 6063 str r3, [r4, #4]
|
||
80055b6: 6014 str r4, [r2, #0]
|
||
80055b8: 4628 mov r0, r5
|
||
80055ba: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
||
80055be: f001 bbc3 b.w 8006d48 <__malloc_unlock>
|
||
80055c2: 42a3 cmp r3, r4
|
||
80055c4: d90a bls.n 80055dc <_free_r+0x48>
|
||
80055c6: 6821 ldr r1, [r4, #0]
|
||
80055c8: 1862 adds r2, r4, r1
|
||
80055ca: 4293 cmp r3, r2
|
||
80055cc: bf01 itttt eq
|
||
80055ce: 681a ldreq r2, [r3, #0]
|
||
80055d0: 685b ldreq r3, [r3, #4]
|
||
80055d2: 1852 addeq r2, r2, r1
|
||
80055d4: 6022 streq r2, [r4, #0]
|
||
80055d6: 6063 str r3, [r4, #4]
|
||
80055d8: 6004 str r4, [r0, #0]
|
||
80055da: e7ed b.n 80055b8 <_free_r+0x24>
|
||
80055dc: 461a mov r2, r3
|
||
80055de: 685b ldr r3, [r3, #4]
|
||
80055e0: b10b cbz r3, 80055e6 <_free_r+0x52>
|
||
80055e2: 42a3 cmp r3, r4
|
||
80055e4: d9fa bls.n 80055dc <_free_r+0x48>
|
||
80055e6: 6811 ldr r1, [r2, #0]
|
||
80055e8: 1850 adds r0, r2, r1
|
||
80055ea: 42a0 cmp r0, r4
|
||
80055ec: d10b bne.n 8005606 <_free_r+0x72>
|
||
80055ee: 6820 ldr r0, [r4, #0]
|
||
80055f0: 4401 add r1, r0
|
||
80055f2: 1850 adds r0, r2, r1
|
||
80055f4: 4283 cmp r3, r0
|
||
80055f6: 6011 str r1, [r2, #0]
|
||
80055f8: d1de bne.n 80055b8 <_free_r+0x24>
|
||
80055fa: 6818 ldr r0, [r3, #0]
|
||
80055fc: 685b ldr r3, [r3, #4]
|
||
80055fe: 4401 add r1, r0
|
||
8005600: 6011 str r1, [r2, #0]
|
||
8005602: 6053 str r3, [r2, #4]
|
||
8005604: e7d8 b.n 80055b8 <_free_r+0x24>
|
||
8005606: d902 bls.n 800560e <_free_r+0x7a>
|
||
8005608: 230c movs r3, #12
|
||
800560a: 602b str r3, [r5, #0]
|
||
800560c: e7d4 b.n 80055b8 <_free_r+0x24>
|
||
800560e: 6820 ldr r0, [r4, #0]
|
||
8005610: 1821 adds r1, r4, r0
|
||
8005612: 428b cmp r3, r1
|
||
8005614: bf01 itttt eq
|
||
8005616: 6819 ldreq r1, [r3, #0]
|
||
8005618: 685b ldreq r3, [r3, #4]
|
||
800561a: 1809 addeq r1, r1, r0
|
||
800561c: 6021 streq r1, [r4, #0]
|
||
800561e: 6063 str r3, [r4, #4]
|
||
8005620: 6054 str r4, [r2, #4]
|
||
8005622: e7c9 b.n 80055b8 <_free_r+0x24>
|
||
8005624: bd38 pop {r3, r4, r5, pc}
|
||
8005626: bf00 nop
|
||
8005628: 20000200 .word 0x20000200
|
||
|
||
0800562c <_malloc_r>:
|
||
800562c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
800562e: 1ccd adds r5, r1, #3
|
||
8005630: f025 0503 bic.w r5, r5, #3
|
||
8005634: 3508 adds r5, #8
|
||
8005636: 2d0c cmp r5, #12
|
||
8005638: bf38 it cc
|
||
800563a: 250c movcc r5, #12
|
||
800563c: 2d00 cmp r5, #0
|
||
800563e: 4606 mov r6, r0
|
||
8005640: db01 blt.n 8005646 <_malloc_r+0x1a>
|
||
8005642: 42a9 cmp r1, r5
|
||
8005644: d903 bls.n 800564e <_malloc_r+0x22>
|
||
8005646: 230c movs r3, #12
|
||
8005648: 6033 str r3, [r6, #0]
|
||
800564a: 2000 movs r0, #0
|
||
800564c: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
800564e: f001 fb75 bl 8006d3c <__malloc_lock>
|
||
8005652: 4921 ldr r1, [pc, #132] ; (80056d8 <_malloc_r+0xac>)
|
||
8005654: 680a ldr r2, [r1, #0]
|
||
8005656: 4614 mov r4, r2
|
||
8005658: b99c cbnz r4, 8005682 <_malloc_r+0x56>
|
||
800565a: 4f20 ldr r7, [pc, #128] ; (80056dc <_malloc_r+0xb0>)
|
||
800565c: 683b ldr r3, [r7, #0]
|
||
800565e: b923 cbnz r3, 800566a <_malloc_r+0x3e>
|
||
8005660: 4621 mov r1, r4
|
||
8005662: 4630 mov r0, r6
|
||
8005664: f000 fc9c bl 8005fa0 <_sbrk_r>
|
||
8005668: 6038 str r0, [r7, #0]
|
||
800566a: 4629 mov r1, r5
|
||
800566c: 4630 mov r0, r6
|
||
800566e: f000 fc97 bl 8005fa0 <_sbrk_r>
|
||
8005672: 1c43 adds r3, r0, #1
|
||
8005674: d123 bne.n 80056be <_malloc_r+0x92>
|
||
8005676: 230c movs r3, #12
|
||
8005678: 4630 mov r0, r6
|
||
800567a: 6033 str r3, [r6, #0]
|
||
800567c: f001 fb64 bl 8006d48 <__malloc_unlock>
|
||
8005680: e7e3 b.n 800564a <_malloc_r+0x1e>
|
||
8005682: 6823 ldr r3, [r4, #0]
|
||
8005684: 1b5b subs r3, r3, r5
|
||
8005686: d417 bmi.n 80056b8 <_malloc_r+0x8c>
|
||
8005688: 2b0b cmp r3, #11
|
||
800568a: d903 bls.n 8005694 <_malloc_r+0x68>
|
||
800568c: 6023 str r3, [r4, #0]
|
||
800568e: 441c add r4, r3
|
||
8005690: 6025 str r5, [r4, #0]
|
||
8005692: e004 b.n 800569e <_malloc_r+0x72>
|
||
8005694: 6863 ldr r3, [r4, #4]
|
||
8005696: 42a2 cmp r2, r4
|
||
8005698: bf0c ite eq
|
||
800569a: 600b streq r3, [r1, #0]
|
||
800569c: 6053 strne r3, [r2, #4]
|
||
800569e: 4630 mov r0, r6
|
||
80056a0: f001 fb52 bl 8006d48 <__malloc_unlock>
|
||
80056a4: f104 000b add.w r0, r4, #11
|
||
80056a8: 1d23 adds r3, r4, #4
|
||
80056aa: f020 0007 bic.w r0, r0, #7
|
||
80056ae: 1ac2 subs r2, r0, r3
|
||
80056b0: d0cc beq.n 800564c <_malloc_r+0x20>
|
||
80056b2: 1a1b subs r3, r3, r0
|
||
80056b4: 50a3 str r3, [r4, r2]
|
||
80056b6: e7c9 b.n 800564c <_malloc_r+0x20>
|
||
80056b8: 4622 mov r2, r4
|
||
80056ba: 6864 ldr r4, [r4, #4]
|
||
80056bc: e7cc b.n 8005658 <_malloc_r+0x2c>
|
||
80056be: 1cc4 adds r4, r0, #3
|
||
80056c0: f024 0403 bic.w r4, r4, #3
|
||
80056c4: 42a0 cmp r0, r4
|
||
80056c6: d0e3 beq.n 8005690 <_malloc_r+0x64>
|
||
80056c8: 1a21 subs r1, r4, r0
|
||
80056ca: 4630 mov r0, r6
|
||
80056cc: f000 fc68 bl 8005fa0 <_sbrk_r>
|
||
80056d0: 3001 adds r0, #1
|
||
80056d2: d1dd bne.n 8005690 <_malloc_r+0x64>
|
||
80056d4: e7cf b.n 8005676 <_malloc_r+0x4a>
|
||
80056d6: bf00 nop
|
||
80056d8: 20000200 .word 0x20000200
|
||
80056dc: 20000204 .word 0x20000204
|
||
|
||
080056e0 <__cvt>:
|
||
80056e0: 2b00 cmp r3, #0
|
||
80056e2: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
80056e6: 461f mov r7, r3
|
||
80056e8: bfbb ittet lt
|
||
80056ea: f103 4300 addlt.w r3, r3, #2147483648 ; 0x80000000
|
||
80056ee: 461f movlt r7, r3
|
||
80056f0: 2300 movge r3, #0
|
||
80056f2: 232d movlt r3, #45 ; 0x2d
|
||
80056f4: b088 sub sp, #32
|
||
80056f6: 4614 mov r4, r2
|
||
80056f8: 9a12 ldr r2, [sp, #72] ; 0x48
|
||
80056fa: 9d10 ldr r5, [sp, #64] ; 0x40
|
||
80056fc: 7013 strb r3, [r2, #0]
|
||
80056fe: 9b14 ldr r3, [sp, #80] ; 0x50
|
||
8005700: f8dd a04c ldr.w sl, [sp, #76] ; 0x4c
|
||
8005704: f023 0820 bic.w r8, r3, #32
|
||
8005708: f1b8 0f46 cmp.w r8, #70 ; 0x46
|
||
800570c: d005 beq.n 800571a <__cvt+0x3a>
|
||
800570e: f1b8 0f45 cmp.w r8, #69 ; 0x45
|
||
8005712: d100 bne.n 8005716 <__cvt+0x36>
|
||
8005714: 3501 adds r5, #1
|
||
8005716: 2302 movs r3, #2
|
||
8005718: e000 b.n 800571c <__cvt+0x3c>
|
||
800571a: 2303 movs r3, #3
|
||
800571c: aa07 add r2, sp, #28
|
||
800571e: 9204 str r2, [sp, #16]
|
||
8005720: aa06 add r2, sp, #24
|
||
8005722: e9cd a202 strd sl, r2, [sp, #8]
|
||
8005726: e9cd 3500 strd r3, r5, [sp]
|
||
800572a: 4622 mov r2, r4
|
||
800572c: 463b mov r3, r7
|
||
800572e: f000 fcf7 bl 8006120 <_dtoa_r>
|
||
8005732: f1b8 0f47 cmp.w r8, #71 ; 0x47
|
||
8005736: 4606 mov r6, r0
|
||
8005738: d102 bne.n 8005740 <__cvt+0x60>
|
||
800573a: 9b11 ldr r3, [sp, #68] ; 0x44
|
||
800573c: 07db lsls r3, r3, #31
|
||
800573e: d522 bpl.n 8005786 <__cvt+0xa6>
|
||
8005740: f1b8 0f46 cmp.w r8, #70 ; 0x46
|
||
8005744: eb06 0905 add.w r9, r6, r5
|
||
8005748: d110 bne.n 800576c <__cvt+0x8c>
|
||
800574a: 7833 ldrb r3, [r6, #0]
|
||
800574c: 2b30 cmp r3, #48 ; 0x30
|
||
800574e: d10a bne.n 8005766 <__cvt+0x86>
|
||
8005750: 2200 movs r2, #0
|
||
8005752: 2300 movs r3, #0
|
||
8005754: 4620 mov r0, r4
|
||
8005756: 4639 mov r1, r7
|
||
8005758: f7fb f992 bl 8000a80 <__aeabi_dcmpeq>
|
||
800575c: b918 cbnz r0, 8005766 <__cvt+0x86>
|
||
800575e: f1c5 0501 rsb r5, r5, #1
|
||
8005762: f8ca 5000 str.w r5, [sl]
|
||
8005766: f8da 3000 ldr.w r3, [sl]
|
||
800576a: 4499 add r9, r3
|
||
800576c: 2200 movs r2, #0
|
||
800576e: 2300 movs r3, #0
|
||
8005770: 4620 mov r0, r4
|
||
8005772: 4639 mov r1, r7
|
||
8005774: f7fb f984 bl 8000a80 <__aeabi_dcmpeq>
|
||
8005778: b108 cbz r0, 800577e <__cvt+0x9e>
|
||
800577a: f8cd 901c str.w r9, [sp, #28]
|
||
800577e: 2230 movs r2, #48 ; 0x30
|
||
8005780: 9b07 ldr r3, [sp, #28]
|
||
8005782: 454b cmp r3, r9
|
||
8005784: d307 bcc.n 8005796 <__cvt+0xb6>
|
||
8005786: 4630 mov r0, r6
|
||
8005788: 9b07 ldr r3, [sp, #28]
|
||
800578a: 9a15 ldr r2, [sp, #84] ; 0x54
|
||
800578c: 1b9b subs r3, r3, r6
|
||
800578e: 6013 str r3, [r2, #0]
|
||
8005790: b008 add sp, #32
|
||
8005792: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8005796: 1c59 adds r1, r3, #1
|
||
8005798: 9107 str r1, [sp, #28]
|
||
800579a: 701a strb r2, [r3, #0]
|
||
800579c: e7f0 b.n 8005780 <__cvt+0xa0>
|
||
|
||
0800579e <__exponent>:
|
||
800579e: 4603 mov r3, r0
|
||
80057a0: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr}
|
||
80057a2: 2900 cmp r1, #0
|
||
80057a4: f803 2b02 strb.w r2, [r3], #2
|
||
80057a8: bfb6 itet lt
|
||
80057aa: 222d movlt r2, #45 ; 0x2d
|
||
80057ac: 222b movge r2, #43 ; 0x2b
|
||
80057ae: 4249 neglt r1, r1
|
||
80057b0: 2909 cmp r1, #9
|
||
80057b2: 7042 strb r2, [r0, #1]
|
||
80057b4: dd2b ble.n 800580e <__exponent+0x70>
|
||
80057b6: f10d 0407 add.w r4, sp, #7
|
||
80057ba: 46a4 mov ip, r4
|
||
80057bc: 270a movs r7, #10
|
||
80057be: fb91 f6f7 sdiv r6, r1, r7
|
||
80057c2: 460a mov r2, r1
|
||
80057c4: 46a6 mov lr, r4
|
||
80057c6: fb07 1516 mls r5, r7, r6, r1
|
||
80057ca: 2a63 cmp r2, #99 ; 0x63
|
||
80057cc: f105 0530 add.w r5, r5, #48 ; 0x30
|
||
80057d0: 4631 mov r1, r6
|
||
80057d2: f104 34ff add.w r4, r4, #4294967295 ; 0xffffffff
|
||
80057d6: f80e 5c01 strb.w r5, [lr, #-1]
|
||
80057da: dcf0 bgt.n 80057be <__exponent+0x20>
|
||
80057dc: 3130 adds r1, #48 ; 0x30
|
||
80057de: f1ae 0502 sub.w r5, lr, #2
|
||
80057e2: f804 1c01 strb.w r1, [r4, #-1]
|
||
80057e6: 4629 mov r1, r5
|
||
80057e8: 1c44 adds r4, r0, #1
|
||
80057ea: 4561 cmp r1, ip
|
||
80057ec: d30a bcc.n 8005804 <__exponent+0x66>
|
||
80057ee: f10d 0209 add.w r2, sp, #9
|
||
80057f2: eba2 020e sub.w r2, r2, lr
|
||
80057f6: 4565 cmp r5, ip
|
||
80057f8: bf88 it hi
|
||
80057fa: 2200 movhi r2, #0
|
||
80057fc: 4413 add r3, r2
|
||
80057fe: 1a18 subs r0, r3, r0
|
||
8005800: b003 add sp, #12
|
||
8005802: bdf0 pop {r4, r5, r6, r7, pc}
|
||
8005804: f811 2b01 ldrb.w r2, [r1], #1
|
||
8005808: f804 2f01 strb.w r2, [r4, #1]!
|
||
800580c: e7ed b.n 80057ea <__exponent+0x4c>
|
||
800580e: 2330 movs r3, #48 ; 0x30
|
||
8005810: 3130 adds r1, #48 ; 0x30
|
||
8005812: 7083 strb r3, [r0, #2]
|
||
8005814: 70c1 strb r1, [r0, #3]
|
||
8005816: 1d03 adds r3, r0, #4
|
||
8005818: e7f1 b.n 80057fe <__exponent+0x60>
|
||
...
|
||
|
||
0800581c <_printf_float>:
|
||
800581c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8005820: b091 sub sp, #68 ; 0x44
|
||
8005822: 460c mov r4, r1
|
||
8005824: f8dd 8068 ldr.w r8, [sp, #104] ; 0x68
|
||
8005828: 4616 mov r6, r2
|
||
800582a: 461f mov r7, r3
|
||
800582c: 4605 mov r5, r0
|
||
800582e: f001 fa65 bl 8006cfc <_localeconv_r>
|
||
8005832: 6803 ldr r3, [r0, #0]
|
||
8005834: 4618 mov r0, r3
|
||
8005836: 9309 str r3, [sp, #36] ; 0x24
|
||
8005838: f7fa fcf6 bl 8000228 <strlen>
|
||
800583c: 2300 movs r3, #0
|
||
800583e: 930e str r3, [sp, #56] ; 0x38
|
||
8005840: f8d8 3000 ldr.w r3, [r8]
|
||
8005844: 900a str r0, [sp, #40] ; 0x28
|
||
8005846: 3307 adds r3, #7
|
||
8005848: f023 0307 bic.w r3, r3, #7
|
||
800584c: f103 0208 add.w r2, r3, #8
|
||
8005850: f894 9018 ldrb.w r9, [r4, #24]
|
||
8005854: f8d4 b000 ldr.w fp, [r4]
|
||
8005858: f8c8 2000 str.w r2, [r8]
|
||
800585c: e9d3 2300 ldrd r2, r3, [r3]
|
||
8005860: e9c4 2312 strd r2, r3, [r4, #72] ; 0x48
|
||
8005864: e9d4 8a12 ldrd r8, sl, [r4, #72] ; 0x48
|
||
8005868: f02a 4300 bic.w r3, sl, #2147483648 ; 0x80000000
|
||
800586c: 930b str r3, [sp, #44] ; 0x2c
|
||
800586e: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8005872: 4640 mov r0, r8
|
||
8005874: 4b9c ldr r3, [pc, #624] ; (8005ae8 <_printf_float+0x2cc>)
|
||
8005876: 990b ldr r1, [sp, #44] ; 0x2c
|
||
8005878: f7fb f934 bl 8000ae4 <__aeabi_dcmpun>
|
||
800587c: bb70 cbnz r0, 80058dc <_printf_float+0xc0>
|
||
800587e: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8005882: 4640 mov r0, r8
|
||
8005884: 4b98 ldr r3, [pc, #608] ; (8005ae8 <_printf_float+0x2cc>)
|
||
8005886: 990b ldr r1, [sp, #44] ; 0x2c
|
||
8005888: f7fb f90e bl 8000aa8 <__aeabi_dcmple>
|
||
800588c: bb30 cbnz r0, 80058dc <_printf_float+0xc0>
|
||
800588e: 2200 movs r2, #0
|
||
8005890: 2300 movs r3, #0
|
||
8005892: 4640 mov r0, r8
|
||
8005894: 4651 mov r1, sl
|
||
8005896: f7fb f8fd bl 8000a94 <__aeabi_dcmplt>
|
||
800589a: b110 cbz r0, 80058a2 <_printf_float+0x86>
|
||
800589c: 232d movs r3, #45 ; 0x2d
|
||
800589e: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
80058a2: 4b92 ldr r3, [pc, #584] ; (8005aec <_printf_float+0x2d0>)
|
||
80058a4: 4892 ldr r0, [pc, #584] ; (8005af0 <_printf_float+0x2d4>)
|
||
80058a6: f1b9 0f47 cmp.w r9, #71 ; 0x47
|
||
80058aa: bf94 ite ls
|
||
80058ac: 4698 movls r8, r3
|
||
80058ae: 4680 movhi r8, r0
|
||
80058b0: 2303 movs r3, #3
|
||
80058b2: f04f 0a00 mov.w sl, #0
|
||
80058b6: 6123 str r3, [r4, #16]
|
||
80058b8: f02b 0304 bic.w r3, fp, #4
|
||
80058bc: 6023 str r3, [r4, #0]
|
||
80058be: 4633 mov r3, r6
|
||
80058c0: 4621 mov r1, r4
|
||
80058c2: 4628 mov r0, r5
|
||
80058c4: 9700 str r7, [sp, #0]
|
||
80058c6: aa0f add r2, sp, #60 ; 0x3c
|
||
80058c8: f000 f9d4 bl 8005c74 <_printf_common>
|
||
80058cc: 3001 adds r0, #1
|
||
80058ce: f040 8090 bne.w 80059f2 <_printf_float+0x1d6>
|
||
80058d2: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
80058d6: b011 add sp, #68 ; 0x44
|
||
80058d8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
80058dc: 4642 mov r2, r8
|
||
80058de: 4653 mov r3, sl
|
||
80058e0: 4640 mov r0, r8
|
||
80058e2: 4651 mov r1, sl
|
||
80058e4: f7fb f8fe bl 8000ae4 <__aeabi_dcmpun>
|
||
80058e8: b148 cbz r0, 80058fe <_printf_float+0xe2>
|
||
80058ea: f1ba 0f00 cmp.w sl, #0
|
||
80058ee: bfb8 it lt
|
||
80058f0: 232d movlt r3, #45 ; 0x2d
|
||
80058f2: 4880 ldr r0, [pc, #512] ; (8005af4 <_printf_float+0x2d8>)
|
||
80058f4: bfb8 it lt
|
||
80058f6: f884 3043 strblt.w r3, [r4, #67] ; 0x43
|
||
80058fa: 4b7f ldr r3, [pc, #508] ; (8005af8 <_printf_float+0x2dc>)
|
||
80058fc: e7d3 b.n 80058a6 <_printf_float+0x8a>
|
||
80058fe: 6863 ldr r3, [r4, #4]
|
||
8005900: f009 01df and.w r1, r9, #223 ; 0xdf
|
||
8005904: 1c5a adds r2, r3, #1
|
||
8005906: d142 bne.n 800598e <_printf_float+0x172>
|
||
8005908: 2306 movs r3, #6
|
||
800590a: 6063 str r3, [r4, #4]
|
||
800590c: 2200 movs r2, #0
|
||
800590e: 9206 str r2, [sp, #24]
|
||
8005910: aa0e add r2, sp, #56 ; 0x38
|
||
8005912: e9cd 9204 strd r9, r2, [sp, #16]
|
||
8005916: aa0d add r2, sp, #52 ; 0x34
|
||
8005918: f44b 6380 orr.w r3, fp, #1024 ; 0x400
|
||
800591c: 9203 str r2, [sp, #12]
|
||
800591e: f10d 0233 add.w r2, sp, #51 ; 0x33
|
||
8005922: e9cd 3201 strd r3, r2, [sp, #4]
|
||
8005926: 6023 str r3, [r4, #0]
|
||
8005928: 6863 ldr r3, [r4, #4]
|
||
800592a: 4642 mov r2, r8
|
||
800592c: 9300 str r3, [sp, #0]
|
||
800592e: 4628 mov r0, r5
|
||
8005930: 4653 mov r3, sl
|
||
8005932: 910b str r1, [sp, #44] ; 0x2c
|
||
8005934: f7ff fed4 bl 80056e0 <__cvt>
|
||
8005938: 990b ldr r1, [sp, #44] ; 0x2c
|
||
800593a: 4680 mov r8, r0
|
||
800593c: 2947 cmp r1, #71 ; 0x47
|
||
800593e: 990d ldr r1, [sp, #52] ; 0x34
|
||
8005940: d108 bne.n 8005954 <_printf_float+0x138>
|
||
8005942: 1cc8 adds r0, r1, #3
|
||
8005944: db02 blt.n 800594c <_printf_float+0x130>
|
||
8005946: 6863 ldr r3, [r4, #4]
|
||
8005948: 4299 cmp r1, r3
|
||
800594a: dd40 ble.n 80059ce <_printf_float+0x1b2>
|
||
800594c: f1a9 0902 sub.w r9, r9, #2
|
||
8005950: fa5f f989 uxtb.w r9, r9
|
||
8005954: f1b9 0f65 cmp.w r9, #101 ; 0x65
|
||
8005958: d81f bhi.n 800599a <_printf_float+0x17e>
|
||
800595a: 464a mov r2, r9
|
||
800595c: 3901 subs r1, #1
|
||
800595e: f104 0050 add.w r0, r4, #80 ; 0x50
|
||
8005962: 910d str r1, [sp, #52] ; 0x34
|
||
8005964: f7ff ff1b bl 800579e <__exponent>
|
||
8005968: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
800596a: 4682 mov sl, r0
|
||
800596c: 1813 adds r3, r2, r0
|
||
800596e: 2a01 cmp r2, #1
|
||
8005970: 6123 str r3, [r4, #16]
|
||
8005972: dc02 bgt.n 800597a <_printf_float+0x15e>
|
||
8005974: 6822 ldr r2, [r4, #0]
|
||
8005976: 07d2 lsls r2, r2, #31
|
||
8005978: d501 bpl.n 800597e <_printf_float+0x162>
|
||
800597a: 3301 adds r3, #1
|
||
800597c: 6123 str r3, [r4, #16]
|
||
800597e: f89d 3033 ldrb.w r3, [sp, #51] ; 0x33
|
||
8005982: 2b00 cmp r3, #0
|
||
8005984: d09b beq.n 80058be <_printf_float+0xa2>
|
||
8005986: 232d movs r3, #45 ; 0x2d
|
||
8005988: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
800598c: e797 b.n 80058be <_printf_float+0xa2>
|
||
800598e: 2947 cmp r1, #71 ; 0x47
|
||
8005990: d1bc bne.n 800590c <_printf_float+0xf0>
|
||
8005992: 2b00 cmp r3, #0
|
||
8005994: d1ba bne.n 800590c <_printf_float+0xf0>
|
||
8005996: 2301 movs r3, #1
|
||
8005998: e7b7 b.n 800590a <_printf_float+0xee>
|
||
800599a: f1b9 0f66 cmp.w r9, #102 ; 0x66
|
||
800599e: d118 bne.n 80059d2 <_printf_float+0x1b6>
|
||
80059a0: 2900 cmp r1, #0
|
||
80059a2: 6863 ldr r3, [r4, #4]
|
||
80059a4: dd0b ble.n 80059be <_printf_float+0x1a2>
|
||
80059a6: 6121 str r1, [r4, #16]
|
||
80059a8: b913 cbnz r3, 80059b0 <_printf_float+0x194>
|
||
80059aa: 6822 ldr r2, [r4, #0]
|
||
80059ac: 07d0 lsls r0, r2, #31
|
||
80059ae: d502 bpl.n 80059b6 <_printf_float+0x19a>
|
||
80059b0: 3301 adds r3, #1
|
||
80059b2: 440b add r3, r1
|
||
80059b4: 6123 str r3, [r4, #16]
|
||
80059b6: f04f 0a00 mov.w sl, #0
|
||
80059ba: 65a1 str r1, [r4, #88] ; 0x58
|
||
80059bc: e7df b.n 800597e <_printf_float+0x162>
|
||
80059be: b913 cbnz r3, 80059c6 <_printf_float+0x1aa>
|
||
80059c0: 6822 ldr r2, [r4, #0]
|
||
80059c2: 07d2 lsls r2, r2, #31
|
||
80059c4: d501 bpl.n 80059ca <_printf_float+0x1ae>
|
||
80059c6: 3302 adds r3, #2
|
||
80059c8: e7f4 b.n 80059b4 <_printf_float+0x198>
|
||
80059ca: 2301 movs r3, #1
|
||
80059cc: e7f2 b.n 80059b4 <_printf_float+0x198>
|
||
80059ce: f04f 0967 mov.w r9, #103 ; 0x67
|
||
80059d2: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
80059d4: 4299 cmp r1, r3
|
||
80059d6: db05 blt.n 80059e4 <_printf_float+0x1c8>
|
||
80059d8: 6823 ldr r3, [r4, #0]
|
||
80059da: 6121 str r1, [r4, #16]
|
||
80059dc: 07d8 lsls r0, r3, #31
|
||
80059de: d5ea bpl.n 80059b6 <_printf_float+0x19a>
|
||
80059e0: 1c4b adds r3, r1, #1
|
||
80059e2: e7e7 b.n 80059b4 <_printf_float+0x198>
|
||
80059e4: 2900 cmp r1, #0
|
||
80059e6: bfcc ite gt
|
||
80059e8: 2201 movgt r2, #1
|
||
80059ea: f1c1 0202 rsble r2, r1, #2
|
||
80059ee: 4413 add r3, r2
|
||
80059f0: e7e0 b.n 80059b4 <_printf_float+0x198>
|
||
80059f2: 6823 ldr r3, [r4, #0]
|
||
80059f4: 055a lsls r2, r3, #21
|
||
80059f6: d407 bmi.n 8005a08 <_printf_float+0x1ec>
|
||
80059f8: 6923 ldr r3, [r4, #16]
|
||
80059fa: 4642 mov r2, r8
|
||
80059fc: 4631 mov r1, r6
|
||
80059fe: 4628 mov r0, r5
|
||
8005a00: 47b8 blx r7
|
||
8005a02: 3001 adds r0, #1
|
||
8005a04: d12b bne.n 8005a5e <_printf_float+0x242>
|
||
8005a06: e764 b.n 80058d2 <_printf_float+0xb6>
|
||
8005a08: f1b9 0f65 cmp.w r9, #101 ; 0x65
|
||
8005a0c: f240 80dd bls.w 8005bca <_printf_float+0x3ae>
|
||
8005a10: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48
|
||
8005a14: 2200 movs r2, #0
|
||
8005a16: 2300 movs r3, #0
|
||
8005a18: f7fb f832 bl 8000a80 <__aeabi_dcmpeq>
|
||
8005a1c: 2800 cmp r0, #0
|
||
8005a1e: d033 beq.n 8005a88 <_printf_float+0x26c>
|
||
8005a20: 2301 movs r3, #1
|
||
8005a22: 4631 mov r1, r6
|
||
8005a24: 4628 mov r0, r5
|
||
8005a26: 4a35 ldr r2, [pc, #212] ; (8005afc <_printf_float+0x2e0>)
|
||
8005a28: 47b8 blx r7
|
||
8005a2a: 3001 adds r0, #1
|
||
8005a2c: f43f af51 beq.w 80058d2 <_printf_float+0xb6>
|
||
8005a30: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
8005a34: 429a cmp r2, r3
|
||
8005a36: db02 blt.n 8005a3e <_printf_float+0x222>
|
||
8005a38: 6823 ldr r3, [r4, #0]
|
||
8005a3a: 07d8 lsls r0, r3, #31
|
||
8005a3c: d50f bpl.n 8005a5e <_printf_float+0x242>
|
||
8005a3e: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
8005a42: 4631 mov r1, r6
|
||
8005a44: 4628 mov r0, r5
|
||
8005a46: 47b8 blx r7
|
||
8005a48: 3001 adds r0, #1
|
||
8005a4a: f43f af42 beq.w 80058d2 <_printf_float+0xb6>
|
||
8005a4e: f04f 0800 mov.w r8, #0
|
||
8005a52: f104 091a add.w r9, r4, #26
|
||
8005a56: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8005a58: 3b01 subs r3, #1
|
||
8005a5a: 4543 cmp r3, r8
|
||
8005a5c: dc09 bgt.n 8005a72 <_printf_float+0x256>
|
||
8005a5e: 6823 ldr r3, [r4, #0]
|
||
8005a60: 079b lsls r3, r3, #30
|
||
8005a62: f100 8102 bmi.w 8005c6a <_printf_float+0x44e>
|
||
8005a66: 68e0 ldr r0, [r4, #12]
|
||
8005a68: 9b0f ldr r3, [sp, #60] ; 0x3c
|
||
8005a6a: 4298 cmp r0, r3
|
||
8005a6c: bfb8 it lt
|
||
8005a6e: 4618 movlt r0, r3
|
||
8005a70: e731 b.n 80058d6 <_printf_float+0xba>
|
||
8005a72: 2301 movs r3, #1
|
||
8005a74: 464a mov r2, r9
|
||
8005a76: 4631 mov r1, r6
|
||
8005a78: 4628 mov r0, r5
|
||
8005a7a: 47b8 blx r7
|
||
8005a7c: 3001 adds r0, #1
|
||
8005a7e: f43f af28 beq.w 80058d2 <_printf_float+0xb6>
|
||
8005a82: f108 0801 add.w r8, r8, #1
|
||
8005a86: e7e6 b.n 8005a56 <_printf_float+0x23a>
|
||
8005a88: 9b0d ldr r3, [sp, #52] ; 0x34
|
||
8005a8a: 2b00 cmp r3, #0
|
||
8005a8c: dc38 bgt.n 8005b00 <_printf_float+0x2e4>
|
||
8005a8e: 2301 movs r3, #1
|
||
8005a90: 4631 mov r1, r6
|
||
8005a92: 4628 mov r0, r5
|
||
8005a94: 4a19 ldr r2, [pc, #100] ; (8005afc <_printf_float+0x2e0>)
|
||
8005a96: 47b8 blx r7
|
||
8005a98: 3001 adds r0, #1
|
||
8005a9a: f43f af1a beq.w 80058d2 <_printf_float+0xb6>
|
||
8005a9e: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
8005aa2: 4313 orrs r3, r2
|
||
8005aa4: d102 bne.n 8005aac <_printf_float+0x290>
|
||
8005aa6: 6823 ldr r3, [r4, #0]
|
||
8005aa8: 07d9 lsls r1, r3, #31
|
||
8005aaa: d5d8 bpl.n 8005a5e <_printf_float+0x242>
|
||
8005aac: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
8005ab0: 4631 mov r1, r6
|
||
8005ab2: 4628 mov r0, r5
|
||
8005ab4: 47b8 blx r7
|
||
8005ab6: 3001 adds r0, #1
|
||
8005ab8: f43f af0b beq.w 80058d2 <_printf_float+0xb6>
|
||
8005abc: f04f 0900 mov.w r9, #0
|
||
8005ac0: f104 0a1a add.w sl, r4, #26
|
||
8005ac4: 9b0d ldr r3, [sp, #52] ; 0x34
|
||
8005ac6: 425b negs r3, r3
|
||
8005ac8: 454b cmp r3, r9
|
||
8005aca: dc01 bgt.n 8005ad0 <_printf_float+0x2b4>
|
||
8005acc: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8005ace: e794 b.n 80059fa <_printf_float+0x1de>
|
||
8005ad0: 2301 movs r3, #1
|
||
8005ad2: 4652 mov r2, sl
|
||
8005ad4: 4631 mov r1, r6
|
||
8005ad6: 4628 mov r0, r5
|
||
8005ad8: 47b8 blx r7
|
||
8005ada: 3001 adds r0, #1
|
||
8005adc: f43f aef9 beq.w 80058d2 <_printf_float+0xb6>
|
||
8005ae0: f109 0901 add.w r9, r9, #1
|
||
8005ae4: e7ee b.n 8005ac4 <_printf_float+0x2a8>
|
||
8005ae6: bf00 nop
|
||
8005ae8: 7fefffff .word 0x7fefffff
|
||
8005aec: 08008e38 .word 0x08008e38
|
||
8005af0: 08008e3c .word 0x08008e3c
|
||
8005af4: 08008e44 .word 0x08008e44
|
||
8005af8: 08008e40 .word 0x08008e40
|
||
8005afc: 08008e48 .word 0x08008e48
|
||
8005b00: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
8005b02: 6da3 ldr r3, [r4, #88] ; 0x58
|
||
8005b04: 429a cmp r2, r3
|
||
8005b06: bfa8 it ge
|
||
8005b08: 461a movge r2, r3
|
||
8005b0a: 2a00 cmp r2, #0
|
||
8005b0c: 4691 mov r9, r2
|
||
8005b0e: dc37 bgt.n 8005b80 <_printf_float+0x364>
|
||
8005b10: f04f 0b00 mov.w fp, #0
|
||
8005b14: ea29 79e9 bic.w r9, r9, r9, asr #31
|
||
8005b18: f104 021a add.w r2, r4, #26
|
||
8005b1c: f8d4 a058 ldr.w sl, [r4, #88] ; 0x58
|
||
8005b20: ebaa 0309 sub.w r3, sl, r9
|
||
8005b24: 455b cmp r3, fp
|
||
8005b26: dc33 bgt.n 8005b90 <_printf_float+0x374>
|
||
8005b28: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
8005b2c: 429a cmp r2, r3
|
||
8005b2e: db3b blt.n 8005ba8 <_printf_float+0x38c>
|
||
8005b30: 6823 ldr r3, [r4, #0]
|
||
8005b32: 07da lsls r2, r3, #31
|
||
8005b34: d438 bmi.n 8005ba8 <_printf_float+0x38c>
|
||
8005b36: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
8005b38: 990d ldr r1, [sp, #52] ; 0x34
|
||
8005b3a: eba2 030a sub.w r3, r2, sl
|
||
8005b3e: eba2 0901 sub.w r9, r2, r1
|
||
8005b42: 4599 cmp r9, r3
|
||
8005b44: bfa8 it ge
|
||
8005b46: 4699 movge r9, r3
|
||
8005b48: f1b9 0f00 cmp.w r9, #0
|
||
8005b4c: dc34 bgt.n 8005bb8 <_printf_float+0x39c>
|
||
8005b4e: f04f 0800 mov.w r8, #0
|
||
8005b52: ea29 79e9 bic.w r9, r9, r9, asr #31
|
||
8005b56: f104 0a1a add.w sl, r4, #26
|
||
8005b5a: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
8005b5e: 1a9b subs r3, r3, r2
|
||
8005b60: eba3 0309 sub.w r3, r3, r9
|
||
8005b64: 4543 cmp r3, r8
|
||
8005b66: f77f af7a ble.w 8005a5e <_printf_float+0x242>
|
||
8005b6a: 2301 movs r3, #1
|
||
8005b6c: 4652 mov r2, sl
|
||
8005b6e: 4631 mov r1, r6
|
||
8005b70: 4628 mov r0, r5
|
||
8005b72: 47b8 blx r7
|
||
8005b74: 3001 adds r0, #1
|
||
8005b76: f43f aeac beq.w 80058d2 <_printf_float+0xb6>
|
||
8005b7a: f108 0801 add.w r8, r8, #1
|
||
8005b7e: e7ec b.n 8005b5a <_printf_float+0x33e>
|
||
8005b80: 4613 mov r3, r2
|
||
8005b82: 4631 mov r1, r6
|
||
8005b84: 4642 mov r2, r8
|
||
8005b86: 4628 mov r0, r5
|
||
8005b88: 47b8 blx r7
|
||
8005b8a: 3001 adds r0, #1
|
||
8005b8c: d1c0 bne.n 8005b10 <_printf_float+0x2f4>
|
||
8005b8e: e6a0 b.n 80058d2 <_printf_float+0xb6>
|
||
8005b90: 2301 movs r3, #1
|
||
8005b92: 4631 mov r1, r6
|
||
8005b94: 4628 mov r0, r5
|
||
8005b96: 920b str r2, [sp, #44] ; 0x2c
|
||
8005b98: 47b8 blx r7
|
||
8005b9a: 3001 adds r0, #1
|
||
8005b9c: f43f ae99 beq.w 80058d2 <_printf_float+0xb6>
|
||
8005ba0: 9a0b ldr r2, [sp, #44] ; 0x2c
|
||
8005ba2: f10b 0b01 add.w fp, fp, #1
|
||
8005ba6: e7b9 b.n 8005b1c <_printf_float+0x300>
|
||
8005ba8: 4631 mov r1, r6
|
||
8005baa: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
8005bae: 4628 mov r0, r5
|
||
8005bb0: 47b8 blx r7
|
||
8005bb2: 3001 adds r0, #1
|
||
8005bb4: d1bf bne.n 8005b36 <_printf_float+0x31a>
|
||
8005bb6: e68c b.n 80058d2 <_printf_float+0xb6>
|
||
8005bb8: 464b mov r3, r9
|
||
8005bba: 4631 mov r1, r6
|
||
8005bbc: 4628 mov r0, r5
|
||
8005bbe: eb08 020a add.w r2, r8, sl
|
||
8005bc2: 47b8 blx r7
|
||
8005bc4: 3001 adds r0, #1
|
||
8005bc6: d1c2 bne.n 8005b4e <_printf_float+0x332>
|
||
8005bc8: e683 b.n 80058d2 <_printf_float+0xb6>
|
||
8005bca: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
8005bcc: 2a01 cmp r2, #1
|
||
8005bce: dc01 bgt.n 8005bd4 <_printf_float+0x3b8>
|
||
8005bd0: 07db lsls r3, r3, #31
|
||
8005bd2: d537 bpl.n 8005c44 <_printf_float+0x428>
|
||
8005bd4: 2301 movs r3, #1
|
||
8005bd6: 4642 mov r2, r8
|
||
8005bd8: 4631 mov r1, r6
|
||
8005bda: 4628 mov r0, r5
|
||
8005bdc: 47b8 blx r7
|
||
8005bde: 3001 adds r0, #1
|
||
8005be0: f43f ae77 beq.w 80058d2 <_printf_float+0xb6>
|
||
8005be4: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
8005be8: 4631 mov r1, r6
|
||
8005bea: 4628 mov r0, r5
|
||
8005bec: 47b8 blx r7
|
||
8005bee: 3001 adds r0, #1
|
||
8005bf0: f43f ae6f beq.w 80058d2 <_printf_float+0xb6>
|
||
8005bf4: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48
|
||
8005bf8: 2200 movs r2, #0
|
||
8005bfa: 2300 movs r3, #0
|
||
8005bfc: f7fa ff40 bl 8000a80 <__aeabi_dcmpeq>
|
||
8005c00: b9d8 cbnz r0, 8005c3a <_printf_float+0x41e>
|
||
8005c02: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8005c04: f108 0201 add.w r2, r8, #1
|
||
8005c08: 3b01 subs r3, #1
|
||
8005c0a: 4631 mov r1, r6
|
||
8005c0c: 4628 mov r0, r5
|
||
8005c0e: 47b8 blx r7
|
||
8005c10: 3001 adds r0, #1
|
||
8005c12: d10e bne.n 8005c32 <_printf_float+0x416>
|
||
8005c14: e65d b.n 80058d2 <_printf_float+0xb6>
|
||
8005c16: 2301 movs r3, #1
|
||
8005c18: 464a mov r2, r9
|
||
8005c1a: 4631 mov r1, r6
|
||
8005c1c: 4628 mov r0, r5
|
||
8005c1e: 47b8 blx r7
|
||
8005c20: 3001 adds r0, #1
|
||
8005c22: f43f ae56 beq.w 80058d2 <_printf_float+0xb6>
|
||
8005c26: f108 0801 add.w r8, r8, #1
|
||
8005c2a: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8005c2c: 3b01 subs r3, #1
|
||
8005c2e: 4543 cmp r3, r8
|
||
8005c30: dcf1 bgt.n 8005c16 <_printf_float+0x3fa>
|
||
8005c32: 4653 mov r3, sl
|
||
8005c34: f104 0250 add.w r2, r4, #80 ; 0x50
|
||
8005c38: e6e0 b.n 80059fc <_printf_float+0x1e0>
|
||
8005c3a: f04f 0800 mov.w r8, #0
|
||
8005c3e: f104 091a add.w r9, r4, #26
|
||
8005c42: e7f2 b.n 8005c2a <_printf_float+0x40e>
|
||
8005c44: 2301 movs r3, #1
|
||
8005c46: 4642 mov r2, r8
|
||
8005c48: e7df b.n 8005c0a <_printf_float+0x3ee>
|
||
8005c4a: 2301 movs r3, #1
|
||
8005c4c: 464a mov r2, r9
|
||
8005c4e: 4631 mov r1, r6
|
||
8005c50: 4628 mov r0, r5
|
||
8005c52: 47b8 blx r7
|
||
8005c54: 3001 adds r0, #1
|
||
8005c56: f43f ae3c beq.w 80058d2 <_printf_float+0xb6>
|
||
8005c5a: f108 0801 add.w r8, r8, #1
|
||
8005c5e: 68e3 ldr r3, [r4, #12]
|
||
8005c60: 990f ldr r1, [sp, #60] ; 0x3c
|
||
8005c62: 1a5b subs r3, r3, r1
|
||
8005c64: 4543 cmp r3, r8
|
||
8005c66: dcf0 bgt.n 8005c4a <_printf_float+0x42e>
|
||
8005c68: e6fd b.n 8005a66 <_printf_float+0x24a>
|
||
8005c6a: f04f 0800 mov.w r8, #0
|
||
8005c6e: f104 0919 add.w r9, r4, #25
|
||
8005c72: e7f4 b.n 8005c5e <_printf_float+0x442>
|
||
|
||
08005c74 <_printf_common>:
|
||
8005c74: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8005c78: 4616 mov r6, r2
|
||
8005c7a: 4699 mov r9, r3
|
||
8005c7c: 688a ldr r2, [r1, #8]
|
||
8005c7e: 690b ldr r3, [r1, #16]
|
||
8005c80: 4607 mov r7, r0
|
||
8005c82: 4293 cmp r3, r2
|
||
8005c84: bfb8 it lt
|
||
8005c86: 4613 movlt r3, r2
|
||
8005c88: 6033 str r3, [r6, #0]
|
||
8005c8a: f891 2043 ldrb.w r2, [r1, #67] ; 0x43
|
||
8005c8e: 460c mov r4, r1
|
||
8005c90: f8dd 8020 ldr.w r8, [sp, #32]
|
||
8005c94: b10a cbz r2, 8005c9a <_printf_common+0x26>
|
||
8005c96: 3301 adds r3, #1
|
||
8005c98: 6033 str r3, [r6, #0]
|
||
8005c9a: 6823 ldr r3, [r4, #0]
|
||
8005c9c: 0699 lsls r1, r3, #26
|
||
8005c9e: bf42 ittt mi
|
||
8005ca0: 6833 ldrmi r3, [r6, #0]
|
||
8005ca2: 3302 addmi r3, #2
|
||
8005ca4: 6033 strmi r3, [r6, #0]
|
||
8005ca6: 6825 ldr r5, [r4, #0]
|
||
8005ca8: f015 0506 ands.w r5, r5, #6
|
||
8005cac: d106 bne.n 8005cbc <_printf_common+0x48>
|
||
8005cae: f104 0a19 add.w sl, r4, #25
|
||
8005cb2: 68e3 ldr r3, [r4, #12]
|
||
8005cb4: 6832 ldr r2, [r6, #0]
|
||
8005cb6: 1a9b subs r3, r3, r2
|
||
8005cb8: 42ab cmp r3, r5
|
||
8005cba: dc28 bgt.n 8005d0e <_printf_common+0x9a>
|
||
8005cbc: f894 2043 ldrb.w r2, [r4, #67] ; 0x43
|
||
8005cc0: 1e13 subs r3, r2, #0
|
||
8005cc2: 6822 ldr r2, [r4, #0]
|
||
8005cc4: bf18 it ne
|
||
8005cc6: 2301 movne r3, #1
|
||
8005cc8: 0692 lsls r2, r2, #26
|
||
8005cca: d42d bmi.n 8005d28 <_printf_common+0xb4>
|
||
8005ccc: 4649 mov r1, r9
|
||
8005cce: 4638 mov r0, r7
|
||
8005cd0: f104 0243 add.w r2, r4, #67 ; 0x43
|
||
8005cd4: 47c0 blx r8
|
||
8005cd6: 3001 adds r0, #1
|
||
8005cd8: d020 beq.n 8005d1c <_printf_common+0xa8>
|
||
8005cda: 6823 ldr r3, [r4, #0]
|
||
8005cdc: 68e5 ldr r5, [r4, #12]
|
||
8005cde: f003 0306 and.w r3, r3, #6
|
||
8005ce2: 2b04 cmp r3, #4
|
||
8005ce4: bf18 it ne
|
||
8005ce6: 2500 movne r5, #0
|
||
8005ce8: 6832 ldr r2, [r6, #0]
|
||
8005cea: f04f 0600 mov.w r6, #0
|
||
8005cee: 68a3 ldr r3, [r4, #8]
|
||
8005cf0: bf08 it eq
|
||
8005cf2: 1aad subeq r5, r5, r2
|
||
8005cf4: 6922 ldr r2, [r4, #16]
|
||
8005cf6: bf08 it eq
|
||
8005cf8: ea25 75e5 biceq.w r5, r5, r5, asr #31
|
||
8005cfc: 4293 cmp r3, r2
|
||
8005cfe: bfc4 itt gt
|
||
8005d00: 1a9b subgt r3, r3, r2
|
||
8005d02: 18ed addgt r5, r5, r3
|
||
8005d04: 341a adds r4, #26
|
||
8005d06: 42b5 cmp r5, r6
|
||
8005d08: d11a bne.n 8005d40 <_printf_common+0xcc>
|
||
8005d0a: 2000 movs r0, #0
|
||
8005d0c: e008 b.n 8005d20 <_printf_common+0xac>
|
||
8005d0e: 2301 movs r3, #1
|
||
8005d10: 4652 mov r2, sl
|
||
8005d12: 4649 mov r1, r9
|
||
8005d14: 4638 mov r0, r7
|
||
8005d16: 47c0 blx r8
|
||
8005d18: 3001 adds r0, #1
|
||
8005d1a: d103 bne.n 8005d24 <_printf_common+0xb0>
|
||
8005d1c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8005d20: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8005d24: 3501 adds r5, #1
|
||
8005d26: e7c4 b.n 8005cb2 <_printf_common+0x3e>
|
||
8005d28: 2030 movs r0, #48 ; 0x30
|
||
8005d2a: 18e1 adds r1, r4, r3
|
||
8005d2c: f881 0043 strb.w r0, [r1, #67] ; 0x43
|
||
8005d30: 1c5a adds r2, r3, #1
|
||
8005d32: f894 1045 ldrb.w r1, [r4, #69] ; 0x45
|
||
8005d36: 4422 add r2, r4
|
||
8005d38: 3302 adds r3, #2
|
||
8005d3a: f882 1043 strb.w r1, [r2, #67] ; 0x43
|
||
8005d3e: e7c5 b.n 8005ccc <_printf_common+0x58>
|
||
8005d40: 2301 movs r3, #1
|
||
8005d42: 4622 mov r2, r4
|
||
8005d44: 4649 mov r1, r9
|
||
8005d46: 4638 mov r0, r7
|
||
8005d48: 47c0 blx r8
|
||
8005d4a: 3001 adds r0, #1
|
||
8005d4c: d0e6 beq.n 8005d1c <_printf_common+0xa8>
|
||
8005d4e: 3601 adds r6, #1
|
||
8005d50: e7d9 b.n 8005d06 <_printf_common+0x92>
|
||
...
|
||
|
||
08005d54 <_printf_i>:
|
||
8005d54: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8005d58: 460c mov r4, r1
|
||
8005d5a: 7e27 ldrb r7, [r4, #24]
|
||
8005d5c: 4691 mov r9, r2
|
||
8005d5e: 2f78 cmp r7, #120 ; 0x78
|
||
8005d60: 4680 mov r8, r0
|
||
8005d62: 469a mov sl, r3
|
||
8005d64: 990c ldr r1, [sp, #48] ; 0x30
|
||
8005d66: f104 0243 add.w r2, r4, #67 ; 0x43
|
||
8005d6a: d807 bhi.n 8005d7c <_printf_i+0x28>
|
||
8005d6c: 2f62 cmp r7, #98 ; 0x62
|
||
8005d6e: d80a bhi.n 8005d86 <_printf_i+0x32>
|
||
8005d70: 2f00 cmp r7, #0
|
||
8005d72: f000 80d9 beq.w 8005f28 <_printf_i+0x1d4>
|
||
8005d76: 2f58 cmp r7, #88 ; 0x58
|
||
8005d78: f000 80a4 beq.w 8005ec4 <_printf_i+0x170>
|
||
8005d7c: f104 0642 add.w r6, r4, #66 ; 0x42
|
||
8005d80: f884 7042 strb.w r7, [r4, #66] ; 0x42
|
||
8005d84: e03a b.n 8005dfc <_printf_i+0xa8>
|
||
8005d86: f1a7 0363 sub.w r3, r7, #99 ; 0x63
|
||
8005d8a: 2b15 cmp r3, #21
|
||
8005d8c: d8f6 bhi.n 8005d7c <_printf_i+0x28>
|
||
8005d8e: a001 add r0, pc, #4 ; (adr r0, 8005d94 <_printf_i+0x40>)
|
||
8005d90: f850 f023 ldr.w pc, [r0, r3, lsl #2]
|
||
8005d94: 08005ded .word 0x08005ded
|
||
8005d98: 08005e01 .word 0x08005e01
|
||
8005d9c: 08005d7d .word 0x08005d7d
|
||
8005da0: 08005d7d .word 0x08005d7d
|
||
8005da4: 08005d7d .word 0x08005d7d
|
||
8005da8: 08005d7d .word 0x08005d7d
|
||
8005dac: 08005e01 .word 0x08005e01
|
||
8005db0: 08005d7d .word 0x08005d7d
|
||
8005db4: 08005d7d .word 0x08005d7d
|
||
8005db8: 08005d7d .word 0x08005d7d
|
||
8005dbc: 08005d7d .word 0x08005d7d
|
||
8005dc0: 08005f0f .word 0x08005f0f
|
||
8005dc4: 08005e31 .word 0x08005e31
|
||
8005dc8: 08005ef1 .word 0x08005ef1
|
||
8005dcc: 08005d7d .word 0x08005d7d
|
||
8005dd0: 08005d7d .word 0x08005d7d
|
||
8005dd4: 08005f31 .word 0x08005f31
|
||
8005dd8: 08005d7d .word 0x08005d7d
|
||
8005ddc: 08005e31 .word 0x08005e31
|
||
8005de0: 08005d7d .word 0x08005d7d
|
||
8005de4: 08005d7d .word 0x08005d7d
|
||
8005de8: 08005ef9 .word 0x08005ef9
|
||
8005dec: 680b ldr r3, [r1, #0]
|
||
8005dee: f104 0642 add.w r6, r4, #66 ; 0x42
|
||
8005df2: 1d1a adds r2, r3, #4
|
||
8005df4: 681b ldr r3, [r3, #0]
|
||
8005df6: 600a str r2, [r1, #0]
|
||
8005df8: f884 3042 strb.w r3, [r4, #66] ; 0x42
|
||
8005dfc: 2301 movs r3, #1
|
||
8005dfe: e0a4 b.n 8005f4a <_printf_i+0x1f6>
|
||
8005e00: 6825 ldr r5, [r4, #0]
|
||
8005e02: 6808 ldr r0, [r1, #0]
|
||
8005e04: 062e lsls r6, r5, #24
|
||
8005e06: f100 0304 add.w r3, r0, #4
|
||
8005e0a: d50a bpl.n 8005e22 <_printf_i+0xce>
|
||
8005e0c: 6805 ldr r5, [r0, #0]
|
||
8005e0e: 600b str r3, [r1, #0]
|
||
8005e10: 2d00 cmp r5, #0
|
||
8005e12: da03 bge.n 8005e1c <_printf_i+0xc8>
|
||
8005e14: 232d movs r3, #45 ; 0x2d
|
||
8005e16: 426d negs r5, r5
|
||
8005e18: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
8005e1c: 230a movs r3, #10
|
||
8005e1e: 485e ldr r0, [pc, #376] ; (8005f98 <_printf_i+0x244>)
|
||
8005e20: e019 b.n 8005e56 <_printf_i+0x102>
|
||
8005e22: f015 0f40 tst.w r5, #64 ; 0x40
|
||
8005e26: 6805 ldr r5, [r0, #0]
|
||
8005e28: 600b str r3, [r1, #0]
|
||
8005e2a: bf18 it ne
|
||
8005e2c: b22d sxthne r5, r5
|
||
8005e2e: e7ef b.n 8005e10 <_printf_i+0xbc>
|
||
8005e30: 680b ldr r3, [r1, #0]
|
||
8005e32: 6825 ldr r5, [r4, #0]
|
||
8005e34: 1d18 adds r0, r3, #4
|
||
8005e36: 6008 str r0, [r1, #0]
|
||
8005e38: 0628 lsls r0, r5, #24
|
||
8005e3a: d501 bpl.n 8005e40 <_printf_i+0xec>
|
||
8005e3c: 681d ldr r5, [r3, #0]
|
||
8005e3e: e002 b.n 8005e46 <_printf_i+0xf2>
|
||
8005e40: 0669 lsls r1, r5, #25
|
||
8005e42: d5fb bpl.n 8005e3c <_printf_i+0xe8>
|
||
8005e44: 881d ldrh r5, [r3, #0]
|
||
8005e46: 2f6f cmp r7, #111 ; 0x6f
|
||
8005e48: bf0c ite eq
|
||
8005e4a: 2308 moveq r3, #8
|
||
8005e4c: 230a movne r3, #10
|
||
8005e4e: 4852 ldr r0, [pc, #328] ; (8005f98 <_printf_i+0x244>)
|
||
8005e50: 2100 movs r1, #0
|
||
8005e52: f884 1043 strb.w r1, [r4, #67] ; 0x43
|
||
8005e56: 6866 ldr r6, [r4, #4]
|
||
8005e58: 2e00 cmp r6, #0
|
||
8005e5a: bfa8 it ge
|
||
8005e5c: 6821 ldrge r1, [r4, #0]
|
||
8005e5e: 60a6 str r6, [r4, #8]
|
||
8005e60: bfa4 itt ge
|
||
8005e62: f021 0104 bicge.w r1, r1, #4
|
||
8005e66: 6021 strge r1, [r4, #0]
|
||
8005e68: b90d cbnz r5, 8005e6e <_printf_i+0x11a>
|
||
8005e6a: 2e00 cmp r6, #0
|
||
8005e6c: d04d beq.n 8005f0a <_printf_i+0x1b6>
|
||
8005e6e: 4616 mov r6, r2
|
||
8005e70: fbb5 f1f3 udiv r1, r5, r3
|
||
8005e74: fb03 5711 mls r7, r3, r1, r5
|
||
8005e78: 5dc7 ldrb r7, [r0, r7]
|
||
8005e7a: f806 7d01 strb.w r7, [r6, #-1]!
|
||
8005e7e: 462f mov r7, r5
|
||
8005e80: 42bb cmp r3, r7
|
||
8005e82: 460d mov r5, r1
|
||
8005e84: d9f4 bls.n 8005e70 <_printf_i+0x11c>
|
||
8005e86: 2b08 cmp r3, #8
|
||
8005e88: d10b bne.n 8005ea2 <_printf_i+0x14e>
|
||
8005e8a: 6823 ldr r3, [r4, #0]
|
||
8005e8c: 07df lsls r7, r3, #31
|
||
8005e8e: d508 bpl.n 8005ea2 <_printf_i+0x14e>
|
||
8005e90: 6923 ldr r3, [r4, #16]
|
||
8005e92: 6861 ldr r1, [r4, #4]
|
||
8005e94: 4299 cmp r1, r3
|
||
8005e96: bfde ittt le
|
||
8005e98: 2330 movle r3, #48 ; 0x30
|
||
8005e9a: f806 3c01 strble.w r3, [r6, #-1]
|
||
8005e9e: f106 36ff addle.w r6, r6, #4294967295 ; 0xffffffff
|
||
8005ea2: 1b92 subs r2, r2, r6
|
||
8005ea4: 6122 str r2, [r4, #16]
|
||
8005ea6: 464b mov r3, r9
|
||
8005ea8: 4621 mov r1, r4
|
||
8005eaa: 4640 mov r0, r8
|
||
8005eac: f8cd a000 str.w sl, [sp]
|
||
8005eb0: aa03 add r2, sp, #12
|
||
8005eb2: f7ff fedf bl 8005c74 <_printf_common>
|
||
8005eb6: 3001 adds r0, #1
|
||
8005eb8: d14c bne.n 8005f54 <_printf_i+0x200>
|
||
8005eba: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8005ebe: b004 add sp, #16
|
||
8005ec0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8005ec4: 4834 ldr r0, [pc, #208] ; (8005f98 <_printf_i+0x244>)
|
||
8005ec6: f884 7045 strb.w r7, [r4, #69] ; 0x45
|
||
8005eca: 680e ldr r6, [r1, #0]
|
||
8005ecc: 6823 ldr r3, [r4, #0]
|
||
8005ece: f856 5b04 ldr.w r5, [r6], #4
|
||
8005ed2: 061f lsls r7, r3, #24
|
||
8005ed4: 600e str r6, [r1, #0]
|
||
8005ed6: d514 bpl.n 8005f02 <_printf_i+0x1ae>
|
||
8005ed8: 07d9 lsls r1, r3, #31
|
||
8005eda: bf44 itt mi
|
||
8005edc: f043 0320 orrmi.w r3, r3, #32
|
||
8005ee0: 6023 strmi r3, [r4, #0]
|
||
8005ee2: b91d cbnz r5, 8005eec <_printf_i+0x198>
|
||
8005ee4: 6823 ldr r3, [r4, #0]
|
||
8005ee6: f023 0320 bic.w r3, r3, #32
|
||
8005eea: 6023 str r3, [r4, #0]
|
||
8005eec: 2310 movs r3, #16
|
||
8005eee: e7af b.n 8005e50 <_printf_i+0xfc>
|
||
8005ef0: 6823 ldr r3, [r4, #0]
|
||
8005ef2: f043 0320 orr.w r3, r3, #32
|
||
8005ef6: 6023 str r3, [r4, #0]
|
||
8005ef8: 2378 movs r3, #120 ; 0x78
|
||
8005efa: 4828 ldr r0, [pc, #160] ; (8005f9c <_printf_i+0x248>)
|
||
8005efc: f884 3045 strb.w r3, [r4, #69] ; 0x45
|
||
8005f00: e7e3 b.n 8005eca <_printf_i+0x176>
|
||
8005f02: 065e lsls r6, r3, #25
|
||
8005f04: bf48 it mi
|
||
8005f06: b2ad uxthmi r5, r5
|
||
8005f08: e7e6 b.n 8005ed8 <_printf_i+0x184>
|
||
8005f0a: 4616 mov r6, r2
|
||
8005f0c: e7bb b.n 8005e86 <_printf_i+0x132>
|
||
8005f0e: 680b ldr r3, [r1, #0]
|
||
8005f10: 6826 ldr r6, [r4, #0]
|
||
8005f12: 1d1d adds r5, r3, #4
|
||
8005f14: 6960 ldr r0, [r4, #20]
|
||
8005f16: 600d str r5, [r1, #0]
|
||
8005f18: 0635 lsls r5, r6, #24
|
||
8005f1a: 681b ldr r3, [r3, #0]
|
||
8005f1c: d501 bpl.n 8005f22 <_printf_i+0x1ce>
|
||
8005f1e: 6018 str r0, [r3, #0]
|
||
8005f20: e002 b.n 8005f28 <_printf_i+0x1d4>
|
||
8005f22: 0671 lsls r1, r6, #25
|
||
8005f24: d5fb bpl.n 8005f1e <_printf_i+0x1ca>
|
||
8005f26: 8018 strh r0, [r3, #0]
|
||
8005f28: 2300 movs r3, #0
|
||
8005f2a: 4616 mov r6, r2
|
||
8005f2c: 6123 str r3, [r4, #16]
|
||
8005f2e: e7ba b.n 8005ea6 <_printf_i+0x152>
|
||
8005f30: 680b ldr r3, [r1, #0]
|
||
8005f32: 1d1a adds r2, r3, #4
|
||
8005f34: 600a str r2, [r1, #0]
|
||
8005f36: 681e ldr r6, [r3, #0]
|
||
8005f38: 2100 movs r1, #0
|
||
8005f3a: 4630 mov r0, r6
|
||
8005f3c: 6862 ldr r2, [r4, #4]
|
||
8005f3e: f000 fee1 bl 8006d04 <memchr>
|
||
8005f42: b108 cbz r0, 8005f48 <_printf_i+0x1f4>
|
||
8005f44: 1b80 subs r0, r0, r6
|
||
8005f46: 6060 str r0, [r4, #4]
|
||
8005f48: 6863 ldr r3, [r4, #4]
|
||
8005f4a: 6123 str r3, [r4, #16]
|
||
8005f4c: 2300 movs r3, #0
|
||
8005f4e: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
8005f52: e7a8 b.n 8005ea6 <_printf_i+0x152>
|
||
8005f54: 4632 mov r2, r6
|
||
8005f56: 4649 mov r1, r9
|
||
8005f58: 4640 mov r0, r8
|
||
8005f5a: 6923 ldr r3, [r4, #16]
|
||
8005f5c: 47d0 blx sl
|
||
8005f5e: 3001 adds r0, #1
|
||
8005f60: d0ab beq.n 8005eba <_printf_i+0x166>
|
||
8005f62: 6823 ldr r3, [r4, #0]
|
||
8005f64: 079b lsls r3, r3, #30
|
||
8005f66: d413 bmi.n 8005f90 <_printf_i+0x23c>
|
||
8005f68: 68e0 ldr r0, [r4, #12]
|
||
8005f6a: 9b03 ldr r3, [sp, #12]
|
||
8005f6c: 4298 cmp r0, r3
|
||
8005f6e: bfb8 it lt
|
||
8005f70: 4618 movlt r0, r3
|
||
8005f72: e7a4 b.n 8005ebe <_printf_i+0x16a>
|
||
8005f74: 2301 movs r3, #1
|
||
8005f76: 4632 mov r2, r6
|
||
8005f78: 4649 mov r1, r9
|
||
8005f7a: 4640 mov r0, r8
|
||
8005f7c: 47d0 blx sl
|
||
8005f7e: 3001 adds r0, #1
|
||
8005f80: d09b beq.n 8005eba <_printf_i+0x166>
|
||
8005f82: 3501 adds r5, #1
|
||
8005f84: 68e3 ldr r3, [r4, #12]
|
||
8005f86: 9903 ldr r1, [sp, #12]
|
||
8005f88: 1a5b subs r3, r3, r1
|
||
8005f8a: 42ab cmp r3, r5
|
||
8005f8c: dcf2 bgt.n 8005f74 <_printf_i+0x220>
|
||
8005f8e: e7eb b.n 8005f68 <_printf_i+0x214>
|
||
8005f90: 2500 movs r5, #0
|
||
8005f92: f104 0619 add.w r6, r4, #25
|
||
8005f96: e7f5 b.n 8005f84 <_printf_i+0x230>
|
||
8005f98: 08008e4a .word 0x08008e4a
|
||
8005f9c: 08008e5b .word 0x08008e5b
|
||
|
||
08005fa0 <_sbrk_r>:
|
||
8005fa0: b538 push {r3, r4, r5, lr}
|
||
8005fa2: 2300 movs r3, #0
|
||
8005fa4: 4d05 ldr r5, [pc, #20] ; (8005fbc <_sbrk_r+0x1c>)
|
||
8005fa6: 4604 mov r4, r0
|
||
8005fa8: 4608 mov r0, r1
|
||
8005faa: 602b str r3, [r5, #0]
|
||
8005fac: f7fb fbb2 bl 8001714 <_sbrk>
|
||
8005fb0: 1c43 adds r3, r0, #1
|
||
8005fb2: d102 bne.n 8005fba <_sbrk_r+0x1a>
|
||
8005fb4: 682b ldr r3, [r5, #0]
|
||
8005fb6: b103 cbz r3, 8005fba <_sbrk_r+0x1a>
|
||
8005fb8: 6023 str r3, [r4, #0]
|
||
8005fba: bd38 pop {r3, r4, r5, pc}
|
||
8005fbc: 200002f0 .word 0x200002f0
|
||
|
||
08005fc0 <siprintf>:
|
||
8005fc0: b40e push {r1, r2, r3}
|
||
8005fc2: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000
|
||
8005fc6: b500 push {lr}
|
||
8005fc8: b09c sub sp, #112 ; 0x70
|
||
8005fca: ab1d add r3, sp, #116 ; 0x74
|
||
8005fcc: 9002 str r0, [sp, #8]
|
||
8005fce: 9006 str r0, [sp, #24]
|
||
8005fd0: 9107 str r1, [sp, #28]
|
||
8005fd2: 9104 str r1, [sp, #16]
|
||
8005fd4: 4808 ldr r0, [pc, #32] ; (8005ff8 <siprintf+0x38>)
|
||
8005fd6: 4909 ldr r1, [pc, #36] ; (8005ffc <siprintf+0x3c>)
|
||
8005fd8: f853 2b04 ldr.w r2, [r3], #4
|
||
8005fdc: 9105 str r1, [sp, #20]
|
||
8005fde: 6800 ldr r0, [r0, #0]
|
||
8005fe0: a902 add r1, sp, #8
|
||
8005fe2: 9301 str r3, [sp, #4]
|
||
8005fe4: f001 faa2 bl 800752c <_svfiprintf_r>
|
||
8005fe8: 2200 movs r2, #0
|
||
8005fea: 9b02 ldr r3, [sp, #8]
|
||
8005fec: 701a strb r2, [r3, #0]
|
||
8005fee: b01c add sp, #112 ; 0x70
|
||
8005ff0: f85d eb04 ldr.w lr, [sp], #4
|
||
8005ff4: b003 add sp, #12
|
||
8005ff6: 4770 bx lr
|
||
8005ff8: 2000000c .word 0x2000000c
|
||
8005ffc: ffff0208 .word 0xffff0208
|
||
|
||
08006000 <quorem>:
|
||
8006000: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8006004: 6903 ldr r3, [r0, #16]
|
||
8006006: 690c ldr r4, [r1, #16]
|
||
8006008: 4607 mov r7, r0
|
||
800600a: 42a3 cmp r3, r4
|
||
800600c: f2c0 8083 blt.w 8006116 <quorem+0x116>
|
||
8006010: 3c01 subs r4, #1
|
||
8006012: f100 0514 add.w r5, r0, #20
|
||
8006016: f101 0814 add.w r8, r1, #20
|
||
800601a: eb05 0384 add.w r3, r5, r4, lsl #2
|
||
800601e: 9301 str r3, [sp, #4]
|
||
8006020: f858 3024 ldr.w r3, [r8, r4, lsl #2]
|
||
8006024: f855 2024 ldr.w r2, [r5, r4, lsl #2]
|
||
8006028: 3301 adds r3, #1
|
||
800602a: 429a cmp r2, r3
|
||
800602c: fbb2 f6f3 udiv r6, r2, r3
|
||
8006030: ea4f 0b84 mov.w fp, r4, lsl #2
|
||
8006034: eb08 0984 add.w r9, r8, r4, lsl #2
|
||
8006038: d332 bcc.n 80060a0 <quorem+0xa0>
|
||
800603a: f04f 0e00 mov.w lr, #0
|
||
800603e: 4640 mov r0, r8
|
||
8006040: 46ac mov ip, r5
|
||
8006042: 46f2 mov sl, lr
|
||
8006044: f850 2b04 ldr.w r2, [r0], #4
|
||
8006048: b293 uxth r3, r2
|
||
800604a: fb06 e303 mla r3, r6, r3, lr
|
||
800604e: 0c12 lsrs r2, r2, #16
|
||
8006050: ea4f 4e13 mov.w lr, r3, lsr #16
|
||
8006054: fb06 e202 mla r2, r6, r2, lr
|
||
8006058: b29b uxth r3, r3
|
||
800605a: ebaa 0303 sub.w r3, sl, r3
|
||
800605e: f8dc a000 ldr.w sl, [ip]
|
||
8006062: ea4f 4e12 mov.w lr, r2, lsr #16
|
||
8006066: fa1f fa8a uxth.w sl, sl
|
||
800606a: 4453 add r3, sl
|
||
800606c: fa1f fa82 uxth.w sl, r2
|
||
8006070: f8dc 2000 ldr.w r2, [ip]
|
||
8006074: 4581 cmp r9, r0
|
||
8006076: ebca 4212 rsb r2, sl, r2, lsr #16
|
||
800607a: eb02 4223 add.w r2, r2, r3, asr #16
|
||
800607e: b29b uxth r3, r3
|
||
8006080: ea43 4302 orr.w r3, r3, r2, lsl #16
|
||
8006084: ea4f 4a22 mov.w sl, r2, asr #16
|
||
8006088: f84c 3b04 str.w r3, [ip], #4
|
||
800608c: d2da bcs.n 8006044 <quorem+0x44>
|
||
800608e: f855 300b ldr.w r3, [r5, fp]
|
||
8006092: b92b cbnz r3, 80060a0 <quorem+0xa0>
|
||
8006094: 9b01 ldr r3, [sp, #4]
|
||
8006096: 3b04 subs r3, #4
|
||
8006098: 429d cmp r5, r3
|
||
800609a: 461a mov r2, r3
|
||
800609c: d32f bcc.n 80060fe <quorem+0xfe>
|
||
800609e: 613c str r4, [r7, #16]
|
||
80060a0: 4638 mov r0, r7
|
||
80060a2: f001 f8d1 bl 8007248 <__mcmp>
|
||
80060a6: 2800 cmp r0, #0
|
||
80060a8: db25 blt.n 80060f6 <quorem+0xf6>
|
||
80060aa: 4628 mov r0, r5
|
||
80060ac: f04f 0c00 mov.w ip, #0
|
||
80060b0: 3601 adds r6, #1
|
||
80060b2: f858 1b04 ldr.w r1, [r8], #4
|
||
80060b6: f8d0 e000 ldr.w lr, [r0]
|
||
80060ba: b28b uxth r3, r1
|
||
80060bc: ebac 0303 sub.w r3, ip, r3
|
||
80060c0: fa1f f28e uxth.w r2, lr
|
||
80060c4: 4413 add r3, r2
|
||
80060c6: 0c0a lsrs r2, r1, #16
|
||
80060c8: ebc2 421e rsb r2, r2, lr, lsr #16
|
||
80060cc: eb02 4223 add.w r2, r2, r3, asr #16
|
||
80060d0: b29b uxth r3, r3
|
||
80060d2: ea43 4302 orr.w r3, r3, r2, lsl #16
|
||
80060d6: 45c1 cmp r9, r8
|
||
80060d8: ea4f 4c22 mov.w ip, r2, asr #16
|
||
80060dc: f840 3b04 str.w r3, [r0], #4
|
||
80060e0: d2e7 bcs.n 80060b2 <quorem+0xb2>
|
||
80060e2: f855 2024 ldr.w r2, [r5, r4, lsl #2]
|
||
80060e6: eb05 0384 add.w r3, r5, r4, lsl #2
|
||
80060ea: b922 cbnz r2, 80060f6 <quorem+0xf6>
|
||
80060ec: 3b04 subs r3, #4
|
||
80060ee: 429d cmp r5, r3
|
||
80060f0: 461a mov r2, r3
|
||
80060f2: d30a bcc.n 800610a <quorem+0x10a>
|
||
80060f4: 613c str r4, [r7, #16]
|
||
80060f6: 4630 mov r0, r6
|
||
80060f8: b003 add sp, #12
|
||
80060fa: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
80060fe: 6812 ldr r2, [r2, #0]
|
||
8006100: 3b04 subs r3, #4
|
||
8006102: 2a00 cmp r2, #0
|
||
8006104: d1cb bne.n 800609e <quorem+0x9e>
|
||
8006106: 3c01 subs r4, #1
|
||
8006108: e7c6 b.n 8006098 <quorem+0x98>
|
||
800610a: 6812 ldr r2, [r2, #0]
|
||
800610c: 3b04 subs r3, #4
|
||
800610e: 2a00 cmp r2, #0
|
||
8006110: d1f0 bne.n 80060f4 <quorem+0xf4>
|
||
8006112: 3c01 subs r4, #1
|
||
8006114: e7eb b.n 80060ee <quorem+0xee>
|
||
8006116: 2000 movs r0, #0
|
||
8006118: e7ee b.n 80060f8 <quorem+0xf8>
|
||
800611a: 0000 movs r0, r0
|
||
800611c: 0000 movs r0, r0
|
||
...
|
||
|
||
08006120 <_dtoa_r>:
|
||
8006120: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8006124: 4616 mov r6, r2
|
||
8006126: 461f mov r7, r3
|
||
8006128: 6a44 ldr r4, [r0, #36] ; 0x24
|
||
800612a: b099 sub sp, #100 ; 0x64
|
||
800612c: 4605 mov r5, r0
|
||
800612e: e9cd 6704 strd r6, r7, [sp, #16]
|
||
8006132: f8dd 8094 ldr.w r8, [sp, #148] ; 0x94
|
||
8006136: b974 cbnz r4, 8006156 <_dtoa_r+0x36>
|
||
8006138: 2010 movs r0, #16
|
||
800613a: f7ff fa13 bl 8005564 <malloc>
|
||
800613e: 4602 mov r2, r0
|
||
8006140: 6268 str r0, [r5, #36] ; 0x24
|
||
8006142: b920 cbnz r0, 800614e <_dtoa_r+0x2e>
|
||
8006144: 21ea movs r1, #234 ; 0xea
|
||
8006146: 4bae ldr r3, [pc, #696] ; (8006400 <_dtoa_r+0x2e0>)
|
||
8006148: 48ae ldr r0, [pc, #696] ; (8006404 <_dtoa_r+0x2e4>)
|
||
800614a: f001 faef bl 800772c <__assert_func>
|
||
800614e: e9c0 4401 strd r4, r4, [r0, #4]
|
||
8006152: 6004 str r4, [r0, #0]
|
||
8006154: 60c4 str r4, [r0, #12]
|
||
8006156: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
8006158: 6819 ldr r1, [r3, #0]
|
||
800615a: b151 cbz r1, 8006172 <_dtoa_r+0x52>
|
||
800615c: 685a ldr r2, [r3, #4]
|
||
800615e: 2301 movs r3, #1
|
||
8006160: 4093 lsls r3, r2
|
||
8006162: 604a str r2, [r1, #4]
|
||
8006164: 608b str r3, [r1, #8]
|
||
8006166: 4628 mov r0, r5
|
||
8006168: f000 fe34 bl 8006dd4 <_Bfree>
|
||
800616c: 2200 movs r2, #0
|
||
800616e: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
8006170: 601a str r2, [r3, #0]
|
||
8006172: 1e3b subs r3, r7, #0
|
||
8006174: bfaf iteee ge
|
||
8006176: 2300 movge r3, #0
|
||
8006178: 2201 movlt r2, #1
|
||
800617a: f023 4300 biclt.w r3, r3, #2147483648 ; 0x80000000
|
||
800617e: 9305 strlt r3, [sp, #20]
|
||
8006180: bfa8 it ge
|
||
8006182: f8c8 3000 strge.w r3, [r8]
|
||
8006186: f8dd 9014 ldr.w r9, [sp, #20]
|
||
800618a: 4b9f ldr r3, [pc, #636] ; (8006408 <_dtoa_r+0x2e8>)
|
||
800618c: bfb8 it lt
|
||
800618e: f8c8 2000 strlt.w r2, [r8]
|
||
8006192: ea33 0309 bics.w r3, r3, r9
|
||
8006196: d119 bne.n 80061cc <_dtoa_r+0xac>
|
||
8006198: f242 730f movw r3, #9999 ; 0x270f
|
||
800619c: 9a24 ldr r2, [sp, #144] ; 0x90
|
||
800619e: 6013 str r3, [r2, #0]
|
||
80061a0: f3c9 0313 ubfx r3, r9, #0, #20
|
||
80061a4: 4333 orrs r3, r6
|
||
80061a6: f000 8580 beq.w 8006caa <_dtoa_r+0xb8a>
|
||
80061aa: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
80061ac: b953 cbnz r3, 80061c4 <_dtoa_r+0xa4>
|
||
80061ae: 4b97 ldr r3, [pc, #604] ; (800640c <_dtoa_r+0x2ec>)
|
||
80061b0: e022 b.n 80061f8 <_dtoa_r+0xd8>
|
||
80061b2: 4b97 ldr r3, [pc, #604] ; (8006410 <_dtoa_r+0x2f0>)
|
||
80061b4: 9308 str r3, [sp, #32]
|
||
80061b6: 3308 adds r3, #8
|
||
80061b8: 9a26 ldr r2, [sp, #152] ; 0x98
|
||
80061ba: 6013 str r3, [r2, #0]
|
||
80061bc: 9808 ldr r0, [sp, #32]
|
||
80061be: b019 add sp, #100 ; 0x64
|
||
80061c0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
80061c4: 4b91 ldr r3, [pc, #580] ; (800640c <_dtoa_r+0x2ec>)
|
||
80061c6: 9308 str r3, [sp, #32]
|
||
80061c8: 3303 adds r3, #3
|
||
80061ca: e7f5 b.n 80061b8 <_dtoa_r+0x98>
|
||
80061cc: e9dd 3404 ldrd r3, r4, [sp, #16]
|
||
80061d0: e9cd 340c strd r3, r4, [sp, #48] ; 0x30
|
||
80061d4: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
80061d8: 2200 movs r2, #0
|
||
80061da: 2300 movs r3, #0
|
||
80061dc: f7fa fc50 bl 8000a80 <__aeabi_dcmpeq>
|
||
80061e0: 4680 mov r8, r0
|
||
80061e2: b158 cbz r0, 80061fc <_dtoa_r+0xdc>
|
||
80061e4: 2301 movs r3, #1
|
||
80061e6: 9a24 ldr r2, [sp, #144] ; 0x90
|
||
80061e8: 6013 str r3, [r2, #0]
|
||
80061ea: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
80061ec: 2b00 cmp r3, #0
|
||
80061ee: f000 8559 beq.w 8006ca4 <_dtoa_r+0xb84>
|
||
80061f2: 4888 ldr r0, [pc, #544] ; (8006414 <_dtoa_r+0x2f4>)
|
||
80061f4: 6018 str r0, [r3, #0]
|
||
80061f6: 1e43 subs r3, r0, #1
|
||
80061f8: 9308 str r3, [sp, #32]
|
||
80061fa: e7df b.n 80061bc <_dtoa_r+0x9c>
|
||
80061fc: ab16 add r3, sp, #88 ; 0x58
|
||
80061fe: 9301 str r3, [sp, #4]
|
||
8006200: ab17 add r3, sp, #92 ; 0x5c
|
||
8006202: 9300 str r3, [sp, #0]
|
||
8006204: 4628 mov r0, r5
|
||
8006206: e9dd 230c ldrd r2, r3, [sp, #48] ; 0x30
|
||
800620a: f001 f8c9 bl 80073a0 <__d2b>
|
||
800620e: f3c9 540a ubfx r4, r9, #20, #11
|
||
8006212: 4682 mov sl, r0
|
||
8006214: 2c00 cmp r4, #0
|
||
8006216: d07e beq.n 8006316 <_dtoa_r+0x1f6>
|
||
8006218: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
800621c: 9b0d ldr r3, [sp, #52] ; 0x34
|
||
800621e: f2a4 34ff subw r4, r4, #1023 ; 0x3ff
|
||
8006222: f3c3 0313 ubfx r3, r3, #0, #20
|
||
8006226: f043 517f orr.w r1, r3, #1069547520 ; 0x3fc00000
|
||
800622a: f441 1140 orr.w r1, r1, #3145728 ; 0x300000
|
||
800622e: f8cd 804c str.w r8, [sp, #76] ; 0x4c
|
||
8006232: 2200 movs r2, #0
|
||
8006234: 4b78 ldr r3, [pc, #480] ; (8006418 <_dtoa_r+0x2f8>)
|
||
8006236: f7fa f803 bl 8000240 <__aeabi_dsub>
|
||
800623a: a36b add r3, pc, #428 ; (adr r3, 80063e8 <_dtoa_r+0x2c8>)
|
||
800623c: e9d3 2300 ldrd r2, r3, [r3]
|
||
8006240: f7fa f9b6 bl 80005b0 <__aeabi_dmul>
|
||
8006244: a36a add r3, pc, #424 ; (adr r3, 80063f0 <_dtoa_r+0x2d0>)
|
||
8006246: e9d3 2300 ldrd r2, r3, [r3]
|
||
800624a: f7f9 fffb bl 8000244 <__adddf3>
|
||
800624e: 4606 mov r6, r0
|
||
8006250: 4620 mov r0, r4
|
||
8006252: 460f mov r7, r1
|
||
8006254: f7fa f942 bl 80004dc <__aeabi_i2d>
|
||
8006258: a367 add r3, pc, #412 ; (adr r3, 80063f8 <_dtoa_r+0x2d8>)
|
||
800625a: e9d3 2300 ldrd r2, r3, [r3]
|
||
800625e: f7fa f9a7 bl 80005b0 <__aeabi_dmul>
|
||
8006262: 4602 mov r2, r0
|
||
8006264: 460b mov r3, r1
|
||
8006266: 4630 mov r0, r6
|
||
8006268: 4639 mov r1, r7
|
||
800626a: f7f9 ffeb bl 8000244 <__adddf3>
|
||
800626e: 4606 mov r6, r0
|
||
8006270: 460f mov r7, r1
|
||
8006272: f7fa fc4d bl 8000b10 <__aeabi_d2iz>
|
||
8006276: 2200 movs r2, #0
|
||
8006278: 4681 mov r9, r0
|
||
800627a: 2300 movs r3, #0
|
||
800627c: 4630 mov r0, r6
|
||
800627e: 4639 mov r1, r7
|
||
8006280: f7fa fc08 bl 8000a94 <__aeabi_dcmplt>
|
||
8006284: b148 cbz r0, 800629a <_dtoa_r+0x17a>
|
||
8006286: 4648 mov r0, r9
|
||
8006288: f7fa f928 bl 80004dc <__aeabi_i2d>
|
||
800628c: 4632 mov r2, r6
|
||
800628e: 463b mov r3, r7
|
||
8006290: f7fa fbf6 bl 8000a80 <__aeabi_dcmpeq>
|
||
8006294: b908 cbnz r0, 800629a <_dtoa_r+0x17a>
|
||
8006296: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff
|
||
800629a: f1b9 0f16 cmp.w r9, #22
|
||
800629e: d857 bhi.n 8006350 <_dtoa_r+0x230>
|
||
80062a0: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
80062a4: 4b5d ldr r3, [pc, #372] ; (800641c <_dtoa_r+0x2fc>)
|
||
80062a6: eb03 03c9 add.w r3, r3, r9, lsl #3
|
||
80062aa: e9d3 2300 ldrd r2, r3, [r3]
|
||
80062ae: f7fa fbf1 bl 8000a94 <__aeabi_dcmplt>
|
||
80062b2: 2800 cmp r0, #0
|
||
80062b4: d04e beq.n 8006354 <_dtoa_r+0x234>
|
||
80062b6: 2300 movs r3, #0
|
||
80062b8: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff
|
||
80062bc: 930f str r3, [sp, #60] ; 0x3c
|
||
80062be: 9b16 ldr r3, [sp, #88] ; 0x58
|
||
80062c0: 1b1c subs r4, r3, r4
|
||
80062c2: 1e63 subs r3, r4, #1
|
||
80062c4: 9309 str r3, [sp, #36] ; 0x24
|
||
80062c6: bf49 itett mi
|
||
80062c8: f1c4 0301 rsbmi r3, r4, #1
|
||
80062cc: 2300 movpl r3, #0
|
||
80062ce: 9306 strmi r3, [sp, #24]
|
||
80062d0: 2300 movmi r3, #0
|
||
80062d2: bf54 ite pl
|
||
80062d4: 9306 strpl r3, [sp, #24]
|
||
80062d6: 9309 strmi r3, [sp, #36] ; 0x24
|
||
80062d8: f1b9 0f00 cmp.w r9, #0
|
||
80062dc: db3c blt.n 8006358 <_dtoa_r+0x238>
|
||
80062de: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
80062e0: f8cd 9038 str.w r9, [sp, #56] ; 0x38
|
||
80062e4: 444b add r3, r9
|
||
80062e6: 9309 str r3, [sp, #36] ; 0x24
|
||
80062e8: 2300 movs r3, #0
|
||
80062ea: 930a str r3, [sp, #40] ; 0x28
|
||
80062ec: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
80062ee: 2b09 cmp r3, #9
|
||
80062f0: d86c bhi.n 80063cc <_dtoa_r+0x2ac>
|
||
80062f2: 2b05 cmp r3, #5
|
||
80062f4: bfc4 itt gt
|
||
80062f6: 3b04 subgt r3, #4
|
||
80062f8: 9322 strgt r3, [sp, #136] ; 0x88
|
||
80062fa: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
80062fc: bfc8 it gt
|
||
80062fe: 2400 movgt r4, #0
|
||
8006300: f1a3 0302 sub.w r3, r3, #2
|
||
8006304: bfd8 it le
|
||
8006306: 2401 movle r4, #1
|
||
8006308: 2b03 cmp r3, #3
|
||
800630a: f200 808b bhi.w 8006424 <_dtoa_r+0x304>
|
||
800630e: e8df f003 tbb [pc, r3]
|
||
8006312: 4f2d .short 0x4f2d
|
||
8006314: 5b4d .short 0x5b4d
|
||
8006316: e9dd 4316 ldrd r4, r3, [sp, #88] ; 0x58
|
||
800631a: 441c add r4, r3
|
||
800631c: f204 4332 addw r3, r4, #1074 ; 0x432
|
||
8006320: 2b20 cmp r3, #32
|
||
8006322: bfc3 ittte gt
|
||
8006324: f1c3 0340 rsbgt r3, r3, #64 ; 0x40
|
||
8006328: f204 4012 addwgt r0, r4, #1042 ; 0x412
|
||
800632c: fa09 f303 lslgt.w r3, r9, r3
|
||
8006330: f1c3 0320 rsble r3, r3, #32
|
||
8006334: bfc6 itte gt
|
||
8006336: fa26 f000 lsrgt.w r0, r6, r0
|
||
800633a: 4318 orrgt r0, r3
|
||
800633c: fa06 f003 lslle.w r0, r6, r3
|
||
8006340: f7fa f8bc bl 80004bc <__aeabi_ui2d>
|
||
8006344: 2301 movs r3, #1
|
||
8006346: f1a1 71f8 sub.w r1, r1, #32505856 ; 0x1f00000
|
||
800634a: 3c01 subs r4, #1
|
||
800634c: 9313 str r3, [sp, #76] ; 0x4c
|
||
800634e: e770 b.n 8006232 <_dtoa_r+0x112>
|
||
8006350: 2301 movs r3, #1
|
||
8006352: e7b3 b.n 80062bc <_dtoa_r+0x19c>
|
||
8006354: 900f str r0, [sp, #60] ; 0x3c
|
||
8006356: e7b2 b.n 80062be <_dtoa_r+0x19e>
|
||
8006358: 9b06 ldr r3, [sp, #24]
|
||
800635a: eba3 0309 sub.w r3, r3, r9
|
||
800635e: 9306 str r3, [sp, #24]
|
||
8006360: f1c9 0300 rsb r3, r9, #0
|
||
8006364: 930a str r3, [sp, #40] ; 0x28
|
||
8006366: 2300 movs r3, #0
|
||
8006368: 930e str r3, [sp, #56] ; 0x38
|
||
800636a: e7bf b.n 80062ec <_dtoa_r+0x1cc>
|
||
800636c: 2300 movs r3, #0
|
||
800636e: 930b str r3, [sp, #44] ; 0x2c
|
||
8006370: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
8006372: 2b00 cmp r3, #0
|
||
8006374: dc59 bgt.n 800642a <_dtoa_r+0x30a>
|
||
8006376: f04f 0b01 mov.w fp, #1
|
||
800637a: 465b mov r3, fp
|
||
800637c: f8cd b008 str.w fp, [sp, #8]
|
||
8006380: f8cd b08c str.w fp, [sp, #140] ; 0x8c
|
||
8006384: 2200 movs r2, #0
|
||
8006386: 6a68 ldr r0, [r5, #36] ; 0x24
|
||
8006388: 6042 str r2, [r0, #4]
|
||
800638a: 2204 movs r2, #4
|
||
800638c: f102 0614 add.w r6, r2, #20
|
||
8006390: 429e cmp r6, r3
|
||
8006392: 6841 ldr r1, [r0, #4]
|
||
8006394: d94f bls.n 8006436 <_dtoa_r+0x316>
|
||
8006396: 4628 mov r0, r5
|
||
8006398: f000 fcdc bl 8006d54 <_Balloc>
|
||
800639c: 9008 str r0, [sp, #32]
|
||
800639e: 2800 cmp r0, #0
|
||
80063a0: d14d bne.n 800643e <_dtoa_r+0x31e>
|
||
80063a2: 4602 mov r2, r0
|
||
80063a4: f44f 71d5 mov.w r1, #426 ; 0x1aa
|
||
80063a8: 4b1d ldr r3, [pc, #116] ; (8006420 <_dtoa_r+0x300>)
|
||
80063aa: e6cd b.n 8006148 <_dtoa_r+0x28>
|
||
80063ac: 2301 movs r3, #1
|
||
80063ae: e7de b.n 800636e <_dtoa_r+0x24e>
|
||
80063b0: 2300 movs r3, #0
|
||
80063b2: 930b str r3, [sp, #44] ; 0x2c
|
||
80063b4: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
80063b6: eb09 0b03 add.w fp, r9, r3
|
||
80063ba: f10b 0301 add.w r3, fp, #1
|
||
80063be: 2b01 cmp r3, #1
|
||
80063c0: 9302 str r3, [sp, #8]
|
||
80063c2: bfb8 it lt
|
||
80063c4: 2301 movlt r3, #1
|
||
80063c6: e7dd b.n 8006384 <_dtoa_r+0x264>
|
||
80063c8: 2301 movs r3, #1
|
||
80063ca: e7f2 b.n 80063b2 <_dtoa_r+0x292>
|
||
80063cc: 2401 movs r4, #1
|
||
80063ce: 2300 movs r3, #0
|
||
80063d0: 940b str r4, [sp, #44] ; 0x2c
|
||
80063d2: 9322 str r3, [sp, #136] ; 0x88
|
||
80063d4: f04f 3bff mov.w fp, #4294967295 ; 0xffffffff
|
||
80063d8: 2200 movs r2, #0
|
||
80063da: 2312 movs r3, #18
|
||
80063dc: f8cd b008 str.w fp, [sp, #8]
|
||
80063e0: 9223 str r2, [sp, #140] ; 0x8c
|
||
80063e2: e7cf b.n 8006384 <_dtoa_r+0x264>
|
||
80063e4: f3af 8000 nop.w
|
||
80063e8: 636f4361 .word 0x636f4361
|
||
80063ec: 3fd287a7 .word 0x3fd287a7
|
||
80063f0: 8b60c8b3 .word 0x8b60c8b3
|
||
80063f4: 3fc68a28 .word 0x3fc68a28
|
||
80063f8: 509f79fb .word 0x509f79fb
|
||
80063fc: 3fd34413 .word 0x3fd34413
|
||
8006400: 08008e79 .word 0x08008e79
|
||
8006404: 08008e90 .word 0x08008e90
|
||
8006408: 7ff00000 .word 0x7ff00000
|
||
800640c: 08008e75 .word 0x08008e75
|
||
8006410: 08008e6c .word 0x08008e6c
|
||
8006414: 08008e49 .word 0x08008e49
|
||
8006418: 3ff80000 .word 0x3ff80000
|
||
800641c: 08008f88 .word 0x08008f88
|
||
8006420: 08008eef .word 0x08008eef
|
||
8006424: 2301 movs r3, #1
|
||
8006426: 930b str r3, [sp, #44] ; 0x2c
|
||
8006428: e7d4 b.n 80063d4 <_dtoa_r+0x2b4>
|
||
800642a: f8dd b08c ldr.w fp, [sp, #140] ; 0x8c
|
||
800642e: 465b mov r3, fp
|
||
8006430: f8cd b008 str.w fp, [sp, #8]
|
||
8006434: e7a6 b.n 8006384 <_dtoa_r+0x264>
|
||
8006436: 3101 adds r1, #1
|
||
8006438: 6041 str r1, [r0, #4]
|
||
800643a: 0052 lsls r2, r2, #1
|
||
800643c: e7a6 b.n 800638c <_dtoa_r+0x26c>
|
||
800643e: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
8006440: 9a08 ldr r2, [sp, #32]
|
||
8006442: 601a str r2, [r3, #0]
|
||
8006444: 9b02 ldr r3, [sp, #8]
|
||
8006446: 2b0e cmp r3, #14
|
||
8006448: f200 80a8 bhi.w 800659c <_dtoa_r+0x47c>
|
||
800644c: 2c00 cmp r4, #0
|
||
800644e: f000 80a5 beq.w 800659c <_dtoa_r+0x47c>
|
||
8006452: f1b9 0f00 cmp.w r9, #0
|
||
8006456: dd34 ble.n 80064c2 <_dtoa_r+0x3a2>
|
||
8006458: 4a9a ldr r2, [pc, #616] ; (80066c4 <_dtoa_r+0x5a4>)
|
||
800645a: f009 030f and.w r3, r9, #15
|
||
800645e: eb02 03c3 add.w r3, r2, r3, lsl #3
|
||
8006462: f419 7f80 tst.w r9, #256 ; 0x100
|
||
8006466: e9d3 3400 ldrd r3, r4, [r3]
|
||
800646a: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40
|
||
800646e: ea4f 1429 mov.w r4, r9, asr #4
|
||
8006472: d016 beq.n 80064a2 <_dtoa_r+0x382>
|
||
8006474: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
8006478: 4b93 ldr r3, [pc, #588] ; (80066c8 <_dtoa_r+0x5a8>)
|
||
800647a: 2703 movs r7, #3
|
||
800647c: e9d3 2308 ldrd r2, r3, [r3, #32]
|
||
8006480: f7fa f9c0 bl 8000804 <__aeabi_ddiv>
|
||
8006484: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8006488: f004 040f and.w r4, r4, #15
|
||
800648c: 4e8e ldr r6, [pc, #568] ; (80066c8 <_dtoa_r+0x5a8>)
|
||
800648e: b954 cbnz r4, 80064a6 <_dtoa_r+0x386>
|
||
8006490: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
8006494: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006498: f7fa f9b4 bl 8000804 <__aeabi_ddiv>
|
||
800649c: e9cd 0104 strd r0, r1, [sp, #16]
|
||
80064a0: e029 b.n 80064f6 <_dtoa_r+0x3d6>
|
||
80064a2: 2702 movs r7, #2
|
||
80064a4: e7f2 b.n 800648c <_dtoa_r+0x36c>
|
||
80064a6: 07e1 lsls r1, r4, #31
|
||
80064a8: d508 bpl.n 80064bc <_dtoa_r+0x39c>
|
||
80064aa: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
80064ae: e9d6 2300 ldrd r2, r3, [r6]
|
||
80064b2: f7fa f87d bl 80005b0 <__aeabi_dmul>
|
||
80064b6: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
80064ba: 3701 adds r7, #1
|
||
80064bc: 1064 asrs r4, r4, #1
|
||
80064be: 3608 adds r6, #8
|
||
80064c0: e7e5 b.n 800648e <_dtoa_r+0x36e>
|
||
80064c2: f000 80a5 beq.w 8006610 <_dtoa_r+0x4f0>
|
||
80064c6: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
80064ca: f1c9 0400 rsb r4, r9, #0
|
||
80064ce: 4b7d ldr r3, [pc, #500] ; (80066c4 <_dtoa_r+0x5a4>)
|
||
80064d0: f004 020f and.w r2, r4, #15
|
||
80064d4: eb03 03c2 add.w r3, r3, r2, lsl #3
|
||
80064d8: e9d3 2300 ldrd r2, r3, [r3]
|
||
80064dc: f7fa f868 bl 80005b0 <__aeabi_dmul>
|
||
80064e0: 2702 movs r7, #2
|
||
80064e2: 2300 movs r3, #0
|
||
80064e4: e9cd 0104 strd r0, r1, [sp, #16]
|
||
80064e8: 4e77 ldr r6, [pc, #476] ; (80066c8 <_dtoa_r+0x5a8>)
|
||
80064ea: 1124 asrs r4, r4, #4
|
||
80064ec: 2c00 cmp r4, #0
|
||
80064ee: f040 8084 bne.w 80065fa <_dtoa_r+0x4da>
|
||
80064f2: 2b00 cmp r3, #0
|
||
80064f4: d1d2 bne.n 800649c <_dtoa_r+0x37c>
|
||
80064f6: 9b0f ldr r3, [sp, #60] ; 0x3c
|
||
80064f8: 2b00 cmp r3, #0
|
||
80064fa: f000 808b beq.w 8006614 <_dtoa_r+0x4f4>
|
||
80064fe: e9dd 3404 ldrd r3, r4, [sp, #16]
|
||
8006502: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40
|
||
8006506: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
800650a: 2200 movs r2, #0
|
||
800650c: 4b6f ldr r3, [pc, #444] ; (80066cc <_dtoa_r+0x5ac>)
|
||
800650e: f7fa fac1 bl 8000a94 <__aeabi_dcmplt>
|
||
8006512: 2800 cmp r0, #0
|
||
8006514: d07e beq.n 8006614 <_dtoa_r+0x4f4>
|
||
8006516: 9b02 ldr r3, [sp, #8]
|
||
8006518: 2b00 cmp r3, #0
|
||
800651a: d07b beq.n 8006614 <_dtoa_r+0x4f4>
|
||
800651c: f1bb 0f00 cmp.w fp, #0
|
||
8006520: dd38 ble.n 8006594 <_dtoa_r+0x474>
|
||
8006522: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
8006526: 2200 movs r2, #0
|
||
8006528: 4b69 ldr r3, [pc, #420] ; (80066d0 <_dtoa_r+0x5b0>)
|
||
800652a: f7fa f841 bl 80005b0 <__aeabi_dmul>
|
||
800652e: 465c mov r4, fp
|
||
8006530: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8006534: f109 38ff add.w r8, r9, #4294967295 ; 0xffffffff
|
||
8006538: 3701 adds r7, #1
|
||
800653a: 4638 mov r0, r7
|
||
800653c: f7f9 ffce bl 80004dc <__aeabi_i2d>
|
||
8006540: e9dd 2304 ldrd r2, r3, [sp, #16]
|
||
8006544: f7fa f834 bl 80005b0 <__aeabi_dmul>
|
||
8006548: 2200 movs r2, #0
|
||
800654a: 4b62 ldr r3, [pc, #392] ; (80066d4 <_dtoa_r+0x5b4>)
|
||
800654c: f7f9 fe7a bl 8000244 <__adddf3>
|
||
8006550: f1a1 7650 sub.w r6, r1, #54525952 ; 0x3400000
|
||
8006554: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
8006558: 9611 str r6, [sp, #68] ; 0x44
|
||
800655a: 2c00 cmp r4, #0
|
||
800655c: d15d bne.n 800661a <_dtoa_r+0x4fa>
|
||
800655e: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006562: 2200 movs r2, #0
|
||
8006564: 4b5c ldr r3, [pc, #368] ; (80066d8 <_dtoa_r+0x5b8>)
|
||
8006566: f7f9 fe6b bl 8000240 <__aeabi_dsub>
|
||
800656a: 4602 mov r2, r0
|
||
800656c: 460b mov r3, r1
|
||
800656e: e9cd 2304 strd r2, r3, [sp, #16]
|
||
8006572: 4633 mov r3, r6
|
||
8006574: 9a10 ldr r2, [sp, #64] ; 0x40
|
||
8006576: f7fa faab bl 8000ad0 <__aeabi_dcmpgt>
|
||
800657a: 2800 cmp r0, #0
|
||
800657c: f040 829e bne.w 8006abc <_dtoa_r+0x99c>
|
||
8006580: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006584: 9a10 ldr r2, [sp, #64] ; 0x40
|
||
8006586: f106 4300 add.w r3, r6, #2147483648 ; 0x80000000
|
||
800658a: f7fa fa83 bl 8000a94 <__aeabi_dcmplt>
|
||
800658e: 2800 cmp r0, #0
|
||
8006590: f040 8292 bne.w 8006ab8 <_dtoa_r+0x998>
|
||
8006594: e9dd 340c ldrd r3, r4, [sp, #48] ; 0x30
|
||
8006598: e9cd 3404 strd r3, r4, [sp, #16]
|
||
800659c: 9b17 ldr r3, [sp, #92] ; 0x5c
|
||
800659e: 2b00 cmp r3, #0
|
||
80065a0: f2c0 8153 blt.w 800684a <_dtoa_r+0x72a>
|
||
80065a4: f1b9 0f0e cmp.w r9, #14
|
||
80065a8: f300 814f bgt.w 800684a <_dtoa_r+0x72a>
|
||
80065ac: 4b45 ldr r3, [pc, #276] ; (80066c4 <_dtoa_r+0x5a4>)
|
||
80065ae: eb03 03c9 add.w r3, r3, r9, lsl #3
|
||
80065b2: e9d3 3400 ldrd r3, r4, [r3]
|
||
80065b6: e9cd 3406 strd r3, r4, [sp, #24]
|
||
80065ba: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
80065bc: 2b00 cmp r3, #0
|
||
80065be: f280 80db bge.w 8006778 <_dtoa_r+0x658>
|
||
80065c2: 9b02 ldr r3, [sp, #8]
|
||
80065c4: 2b00 cmp r3, #0
|
||
80065c6: f300 80d7 bgt.w 8006778 <_dtoa_r+0x658>
|
||
80065ca: f040 8274 bne.w 8006ab6 <_dtoa_r+0x996>
|
||
80065ce: e9dd 0106 ldrd r0, r1, [sp, #24]
|
||
80065d2: 2200 movs r2, #0
|
||
80065d4: 4b40 ldr r3, [pc, #256] ; (80066d8 <_dtoa_r+0x5b8>)
|
||
80065d6: f7f9 ffeb bl 80005b0 <__aeabi_dmul>
|
||
80065da: e9dd 2304 ldrd r2, r3, [sp, #16]
|
||
80065de: f7fa fa6d bl 8000abc <__aeabi_dcmpge>
|
||
80065e2: 9c02 ldr r4, [sp, #8]
|
||
80065e4: 4626 mov r6, r4
|
||
80065e6: 2800 cmp r0, #0
|
||
80065e8: f040 824a bne.w 8006a80 <_dtoa_r+0x960>
|
||
80065ec: 2331 movs r3, #49 ; 0x31
|
||
80065ee: 9f08 ldr r7, [sp, #32]
|
||
80065f0: f109 0901 add.w r9, r9, #1
|
||
80065f4: f807 3b01 strb.w r3, [r7], #1
|
||
80065f8: e246 b.n 8006a88 <_dtoa_r+0x968>
|
||
80065fa: 07e2 lsls r2, r4, #31
|
||
80065fc: d505 bpl.n 800660a <_dtoa_r+0x4ea>
|
||
80065fe: e9d6 2300 ldrd r2, r3, [r6]
|
||
8006602: f7f9 ffd5 bl 80005b0 <__aeabi_dmul>
|
||
8006606: 2301 movs r3, #1
|
||
8006608: 3701 adds r7, #1
|
||
800660a: 1064 asrs r4, r4, #1
|
||
800660c: 3608 adds r6, #8
|
||
800660e: e76d b.n 80064ec <_dtoa_r+0x3cc>
|
||
8006610: 2702 movs r7, #2
|
||
8006612: e770 b.n 80064f6 <_dtoa_r+0x3d6>
|
||
8006614: 46c8 mov r8, r9
|
||
8006616: 9c02 ldr r4, [sp, #8]
|
||
8006618: e78f b.n 800653a <_dtoa_r+0x41a>
|
||
800661a: 9908 ldr r1, [sp, #32]
|
||
800661c: 4b29 ldr r3, [pc, #164] ; (80066c4 <_dtoa_r+0x5a4>)
|
||
800661e: 4421 add r1, r4
|
||
8006620: 9112 str r1, [sp, #72] ; 0x48
|
||
8006622: 990b ldr r1, [sp, #44] ; 0x2c
|
||
8006624: eb03 03c4 add.w r3, r3, r4, lsl #3
|
||
8006628: e9dd 6710 ldrd r6, r7, [sp, #64] ; 0x40
|
||
800662c: e953 2302 ldrd r2, r3, [r3, #-8]
|
||
8006630: 2900 cmp r1, #0
|
||
8006632: d055 beq.n 80066e0 <_dtoa_r+0x5c0>
|
||
8006634: 2000 movs r0, #0
|
||
8006636: 4929 ldr r1, [pc, #164] ; (80066dc <_dtoa_r+0x5bc>)
|
||
8006638: f7fa f8e4 bl 8000804 <__aeabi_ddiv>
|
||
800663c: 463b mov r3, r7
|
||
800663e: 4632 mov r2, r6
|
||
8006640: f7f9 fdfe bl 8000240 <__aeabi_dsub>
|
||
8006644: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
8006648: 9f08 ldr r7, [sp, #32]
|
||
800664a: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
800664e: f7fa fa5f bl 8000b10 <__aeabi_d2iz>
|
||
8006652: 4604 mov r4, r0
|
||
8006654: f7f9 ff42 bl 80004dc <__aeabi_i2d>
|
||
8006658: 4602 mov r2, r0
|
||
800665a: 460b mov r3, r1
|
||
800665c: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006660: f7f9 fdee bl 8000240 <__aeabi_dsub>
|
||
8006664: 4602 mov r2, r0
|
||
8006666: 460b mov r3, r1
|
||
8006668: 3430 adds r4, #48 ; 0x30
|
||
800666a: e9cd 2304 strd r2, r3, [sp, #16]
|
||
800666e: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
8006672: f807 4b01 strb.w r4, [r7], #1
|
||
8006676: f7fa fa0d bl 8000a94 <__aeabi_dcmplt>
|
||
800667a: 2800 cmp r0, #0
|
||
800667c: d174 bne.n 8006768 <_dtoa_r+0x648>
|
||
800667e: e9dd 2304 ldrd r2, r3, [sp, #16]
|
||
8006682: 2000 movs r0, #0
|
||
8006684: 4911 ldr r1, [pc, #68] ; (80066cc <_dtoa_r+0x5ac>)
|
||
8006686: f7f9 fddb bl 8000240 <__aeabi_dsub>
|
||
800668a: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
800668e: f7fa fa01 bl 8000a94 <__aeabi_dcmplt>
|
||
8006692: 2800 cmp r0, #0
|
||
8006694: f040 80b6 bne.w 8006804 <_dtoa_r+0x6e4>
|
||
8006698: 9b12 ldr r3, [sp, #72] ; 0x48
|
||
800669a: 429f cmp r7, r3
|
||
800669c: f43f af7a beq.w 8006594 <_dtoa_r+0x474>
|
||
80066a0: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
80066a4: 2200 movs r2, #0
|
||
80066a6: 4b0a ldr r3, [pc, #40] ; (80066d0 <_dtoa_r+0x5b0>)
|
||
80066a8: f7f9 ff82 bl 80005b0 <__aeabi_dmul>
|
||
80066ac: 2200 movs r2, #0
|
||
80066ae: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
80066b2: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
80066b6: 4b06 ldr r3, [pc, #24] ; (80066d0 <_dtoa_r+0x5b0>)
|
||
80066b8: f7f9 ff7a bl 80005b0 <__aeabi_dmul>
|
||
80066bc: e9cd 0104 strd r0, r1, [sp, #16]
|
||
80066c0: e7c3 b.n 800664a <_dtoa_r+0x52a>
|
||
80066c2: bf00 nop
|
||
80066c4: 08008f88 .word 0x08008f88
|
||
80066c8: 08008f60 .word 0x08008f60
|
||
80066cc: 3ff00000 .word 0x3ff00000
|
||
80066d0: 40240000 .word 0x40240000
|
||
80066d4: 401c0000 .word 0x401c0000
|
||
80066d8: 40140000 .word 0x40140000
|
||
80066dc: 3fe00000 .word 0x3fe00000
|
||
80066e0: 4630 mov r0, r6
|
||
80066e2: 4639 mov r1, r7
|
||
80066e4: f7f9 ff64 bl 80005b0 <__aeabi_dmul>
|
||
80066e8: 9b12 ldr r3, [sp, #72] ; 0x48
|
||
80066ea: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
80066ee: 9c08 ldr r4, [sp, #32]
|
||
80066f0: 9314 str r3, [sp, #80] ; 0x50
|
||
80066f2: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
80066f6: f7fa fa0b bl 8000b10 <__aeabi_d2iz>
|
||
80066fa: 9015 str r0, [sp, #84] ; 0x54
|
||
80066fc: f7f9 feee bl 80004dc <__aeabi_i2d>
|
||
8006700: 4602 mov r2, r0
|
||
8006702: 460b mov r3, r1
|
||
8006704: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006708: f7f9 fd9a bl 8000240 <__aeabi_dsub>
|
||
800670c: 9b15 ldr r3, [sp, #84] ; 0x54
|
||
800670e: 4606 mov r6, r0
|
||
8006710: 3330 adds r3, #48 ; 0x30
|
||
8006712: f804 3b01 strb.w r3, [r4], #1
|
||
8006716: 9b12 ldr r3, [sp, #72] ; 0x48
|
||
8006718: 460f mov r7, r1
|
||
800671a: 429c cmp r4, r3
|
||
800671c: f04f 0200 mov.w r2, #0
|
||
8006720: d124 bne.n 800676c <_dtoa_r+0x64c>
|
||
8006722: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
8006726: 4bb3 ldr r3, [pc, #716] ; (80069f4 <_dtoa_r+0x8d4>)
|
||
8006728: f7f9 fd8c bl 8000244 <__adddf3>
|
||
800672c: 4602 mov r2, r0
|
||
800672e: 460b mov r3, r1
|
||
8006730: 4630 mov r0, r6
|
||
8006732: 4639 mov r1, r7
|
||
8006734: f7fa f9cc bl 8000ad0 <__aeabi_dcmpgt>
|
||
8006738: 2800 cmp r0, #0
|
||
800673a: d162 bne.n 8006802 <_dtoa_r+0x6e2>
|
||
800673c: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
8006740: 2000 movs r0, #0
|
||
8006742: 49ac ldr r1, [pc, #688] ; (80069f4 <_dtoa_r+0x8d4>)
|
||
8006744: f7f9 fd7c bl 8000240 <__aeabi_dsub>
|
||
8006748: 4602 mov r2, r0
|
||
800674a: 460b mov r3, r1
|
||
800674c: 4630 mov r0, r6
|
||
800674e: 4639 mov r1, r7
|
||
8006750: f7fa f9a0 bl 8000a94 <__aeabi_dcmplt>
|
||
8006754: 2800 cmp r0, #0
|
||
8006756: f43f af1d beq.w 8006594 <_dtoa_r+0x474>
|
||
800675a: 9f14 ldr r7, [sp, #80] ; 0x50
|
||
800675c: 1e7b subs r3, r7, #1
|
||
800675e: 9314 str r3, [sp, #80] ; 0x50
|
||
8006760: f817 3c01 ldrb.w r3, [r7, #-1]
|
||
8006764: 2b30 cmp r3, #48 ; 0x30
|
||
8006766: d0f8 beq.n 800675a <_dtoa_r+0x63a>
|
||
8006768: 46c1 mov r9, r8
|
||
800676a: e03a b.n 80067e2 <_dtoa_r+0x6c2>
|
||
800676c: 4ba2 ldr r3, [pc, #648] ; (80069f8 <_dtoa_r+0x8d8>)
|
||
800676e: f7f9 ff1f bl 80005b0 <__aeabi_dmul>
|
||
8006772: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8006776: e7bc b.n 80066f2 <_dtoa_r+0x5d2>
|
||
8006778: 9f08 ldr r7, [sp, #32]
|
||
800677a: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
800677e: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006782: f7fa f83f bl 8000804 <__aeabi_ddiv>
|
||
8006786: f7fa f9c3 bl 8000b10 <__aeabi_d2iz>
|
||
800678a: 4604 mov r4, r0
|
||
800678c: f7f9 fea6 bl 80004dc <__aeabi_i2d>
|
||
8006790: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
8006794: f7f9 ff0c bl 80005b0 <__aeabi_dmul>
|
||
8006798: f104 0630 add.w r6, r4, #48 ; 0x30
|
||
800679c: 460b mov r3, r1
|
||
800679e: 4602 mov r2, r0
|
||
80067a0: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
80067a4: f7f9 fd4c bl 8000240 <__aeabi_dsub>
|
||
80067a8: f807 6b01 strb.w r6, [r7], #1
|
||
80067ac: 9e08 ldr r6, [sp, #32]
|
||
80067ae: 9b02 ldr r3, [sp, #8]
|
||
80067b0: 1bbe subs r6, r7, r6
|
||
80067b2: 42b3 cmp r3, r6
|
||
80067b4: d13a bne.n 800682c <_dtoa_r+0x70c>
|
||
80067b6: 4602 mov r2, r0
|
||
80067b8: 460b mov r3, r1
|
||
80067ba: f7f9 fd43 bl 8000244 <__adddf3>
|
||
80067be: 4602 mov r2, r0
|
||
80067c0: 460b mov r3, r1
|
||
80067c2: e9cd 2302 strd r2, r3, [sp, #8]
|
||
80067c6: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
80067ca: f7fa f981 bl 8000ad0 <__aeabi_dcmpgt>
|
||
80067ce: bb58 cbnz r0, 8006828 <_dtoa_r+0x708>
|
||
80067d0: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
80067d4: e9dd 0102 ldrd r0, r1, [sp, #8]
|
||
80067d8: f7fa f952 bl 8000a80 <__aeabi_dcmpeq>
|
||
80067dc: b108 cbz r0, 80067e2 <_dtoa_r+0x6c2>
|
||
80067de: 07e1 lsls r1, r4, #31
|
||
80067e0: d422 bmi.n 8006828 <_dtoa_r+0x708>
|
||
80067e2: 4628 mov r0, r5
|
||
80067e4: 4651 mov r1, sl
|
||
80067e6: f000 faf5 bl 8006dd4 <_Bfree>
|
||
80067ea: 2300 movs r3, #0
|
||
80067ec: 703b strb r3, [r7, #0]
|
||
80067ee: 9b24 ldr r3, [sp, #144] ; 0x90
|
||
80067f0: f109 0001 add.w r0, r9, #1
|
||
80067f4: 6018 str r0, [r3, #0]
|
||
80067f6: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
80067f8: 2b00 cmp r3, #0
|
||
80067fa: f43f acdf beq.w 80061bc <_dtoa_r+0x9c>
|
||
80067fe: 601f str r7, [r3, #0]
|
||
8006800: e4dc b.n 80061bc <_dtoa_r+0x9c>
|
||
8006802: 4627 mov r7, r4
|
||
8006804: 463b mov r3, r7
|
||
8006806: 461f mov r7, r3
|
||
8006808: f813 2d01 ldrb.w r2, [r3, #-1]!
|
||
800680c: 2a39 cmp r2, #57 ; 0x39
|
||
800680e: d107 bne.n 8006820 <_dtoa_r+0x700>
|
||
8006810: 9a08 ldr r2, [sp, #32]
|
||
8006812: 429a cmp r2, r3
|
||
8006814: d1f7 bne.n 8006806 <_dtoa_r+0x6e6>
|
||
8006816: 2230 movs r2, #48 ; 0x30
|
||
8006818: 9908 ldr r1, [sp, #32]
|
||
800681a: f108 0801 add.w r8, r8, #1
|
||
800681e: 700a strb r2, [r1, #0]
|
||
8006820: 781a ldrb r2, [r3, #0]
|
||
8006822: 3201 adds r2, #1
|
||
8006824: 701a strb r2, [r3, #0]
|
||
8006826: e79f b.n 8006768 <_dtoa_r+0x648>
|
||
8006828: 46c8 mov r8, r9
|
||
800682a: e7eb b.n 8006804 <_dtoa_r+0x6e4>
|
||
800682c: 2200 movs r2, #0
|
||
800682e: 4b72 ldr r3, [pc, #456] ; (80069f8 <_dtoa_r+0x8d8>)
|
||
8006830: f7f9 febe bl 80005b0 <__aeabi_dmul>
|
||
8006834: 4602 mov r2, r0
|
||
8006836: 460b mov r3, r1
|
||
8006838: e9cd 2304 strd r2, r3, [sp, #16]
|
||
800683c: 2200 movs r2, #0
|
||
800683e: 2300 movs r3, #0
|
||
8006840: f7fa f91e bl 8000a80 <__aeabi_dcmpeq>
|
||
8006844: 2800 cmp r0, #0
|
||
8006846: d098 beq.n 800677a <_dtoa_r+0x65a>
|
||
8006848: e7cb b.n 80067e2 <_dtoa_r+0x6c2>
|
||
800684a: 9a0b ldr r2, [sp, #44] ; 0x2c
|
||
800684c: 2a00 cmp r2, #0
|
||
800684e: f000 80cd beq.w 80069ec <_dtoa_r+0x8cc>
|
||
8006852: 9a22 ldr r2, [sp, #136] ; 0x88
|
||
8006854: 2a01 cmp r2, #1
|
||
8006856: f300 80af bgt.w 80069b8 <_dtoa_r+0x898>
|
||
800685a: 9a13 ldr r2, [sp, #76] ; 0x4c
|
||
800685c: 2a00 cmp r2, #0
|
||
800685e: f000 80a7 beq.w 80069b0 <_dtoa_r+0x890>
|
||
8006862: f203 4333 addw r3, r3, #1075 ; 0x433
|
||
8006866: 9c0a ldr r4, [sp, #40] ; 0x28
|
||
8006868: 9f06 ldr r7, [sp, #24]
|
||
800686a: 9a06 ldr r2, [sp, #24]
|
||
800686c: 2101 movs r1, #1
|
||
800686e: 441a add r2, r3
|
||
8006870: 9206 str r2, [sp, #24]
|
||
8006872: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
8006874: 4628 mov r0, r5
|
||
8006876: 441a add r2, r3
|
||
8006878: 9209 str r2, [sp, #36] ; 0x24
|
||
800687a: f000 fb65 bl 8006f48 <__i2b>
|
||
800687e: 4606 mov r6, r0
|
||
8006880: 2f00 cmp r7, #0
|
||
8006882: dd0c ble.n 800689e <_dtoa_r+0x77e>
|
||
8006884: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006886: 2b00 cmp r3, #0
|
||
8006888: dd09 ble.n 800689e <_dtoa_r+0x77e>
|
||
800688a: 42bb cmp r3, r7
|
||
800688c: bfa8 it ge
|
||
800688e: 463b movge r3, r7
|
||
8006890: 9a06 ldr r2, [sp, #24]
|
||
8006892: 1aff subs r7, r7, r3
|
||
8006894: 1ad2 subs r2, r2, r3
|
||
8006896: 9206 str r2, [sp, #24]
|
||
8006898: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
800689a: 1ad3 subs r3, r2, r3
|
||
800689c: 9309 str r3, [sp, #36] ; 0x24
|
||
800689e: 9b0a ldr r3, [sp, #40] ; 0x28
|
||
80068a0: b1f3 cbz r3, 80068e0 <_dtoa_r+0x7c0>
|
||
80068a2: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
80068a4: 2b00 cmp r3, #0
|
||
80068a6: f000 80a9 beq.w 80069fc <_dtoa_r+0x8dc>
|
||
80068aa: 2c00 cmp r4, #0
|
||
80068ac: dd10 ble.n 80068d0 <_dtoa_r+0x7b0>
|
||
80068ae: 4631 mov r1, r6
|
||
80068b0: 4622 mov r2, r4
|
||
80068b2: 4628 mov r0, r5
|
||
80068b4: f000 fc02 bl 80070bc <__pow5mult>
|
||
80068b8: 4652 mov r2, sl
|
||
80068ba: 4601 mov r1, r0
|
||
80068bc: 4606 mov r6, r0
|
||
80068be: 4628 mov r0, r5
|
||
80068c0: f000 fb58 bl 8006f74 <__multiply>
|
||
80068c4: 4680 mov r8, r0
|
||
80068c6: 4651 mov r1, sl
|
||
80068c8: 4628 mov r0, r5
|
||
80068ca: f000 fa83 bl 8006dd4 <_Bfree>
|
||
80068ce: 46c2 mov sl, r8
|
||
80068d0: 9b0a ldr r3, [sp, #40] ; 0x28
|
||
80068d2: 1b1a subs r2, r3, r4
|
||
80068d4: d004 beq.n 80068e0 <_dtoa_r+0x7c0>
|
||
80068d6: 4651 mov r1, sl
|
||
80068d8: 4628 mov r0, r5
|
||
80068da: f000 fbef bl 80070bc <__pow5mult>
|
||
80068de: 4682 mov sl, r0
|
||
80068e0: 2101 movs r1, #1
|
||
80068e2: 4628 mov r0, r5
|
||
80068e4: f000 fb30 bl 8006f48 <__i2b>
|
||
80068e8: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
80068ea: 4604 mov r4, r0
|
||
80068ec: 2b00 cmp r3, #0
|
||
80068ee: f340 8087 ble.w 8006a00 <_dtoa_r+0x8e0>
|
||
80068f2: 461a mov r2, r3
|
||
80068f4: 4601 mov r1, r0
|
||
80068f6: 4628 mov r0, r5
|
||
80068f8: f000 fbe0 bl 80070bc <__pow5mult>
|
||
80068fc: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
80068fe: 4604 mov r4, r0
|
||
8006900: 2b01 cmp r3, #1
|
||
8006902: f340 8080 ble.w 8006a06 <_dtoa_r+0x8e6>
|
||
8006906: f04f 0800 mov.w r8, #0
|
||
800690a: 6923 ldr r3, [r4, #16]
|
||
800690c: eb04 0383 add.w r3, r4, r3, lsl #2
|
||
8006910: 6918 ldr r0, [r3, #16]
|
||
8006912: f000 facb bl 8006eac <__hi0bits>
|
||
8006916: f1c0 0020 rsb r0, r0, #32
|
||
800691a: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
800691c: 4418 add r0, r3
|
||
800691e: f010 001f ands.w r0, r0, #31
|
||
8006922: f000 8092 beq.w 8006a4a <_dtoa_r+0x92a>
|
||
8006926: f1c0 0320 rsb r3, r0, #32
|
||
800692a: 2b04 cmp r3, #4
|
||
800692c: f340 808a ble.w 8006a44 <_dtoa_r+0x924>
|
||
8006930: f1c0 001c rsb r0, r0, #28
|
||
8006934: 9b06 ldr r3, [sp, #24]
|
||
8006936: 4407 add r7, r0
|
||
8006938: 4403 add r3, r0
|
||
800693a: 9306 str r3, [sp, #24]
|
||
800693c: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
800693e: 4403 add r3, r0
|
||
8006940: 9309 str r3, [sp, #36] ; 0x24
|
||
8006942: 9b06 ldr r3, [sp, #24]
|
||
8006944: 2b00 cmp r3, #0
|
||
8006946: dd05 ble.n 8006954 <_dtoa_r+0x834>
|
||
8006948: 4651 mov r1, sl
|
||
800694a: 461a mov r2, r3
|
||
800694c: 4628 mov r0, r5
|
||
800694e: f000 fc0f bl 8007170 <__lshift>
|
||
8006952: 4682 mov sl, r0
|
||
8006954: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006956: 2b00 cmp r3, #0
|
||
8006958: dd05 ble.n 8006966 <_dtoa_r+0x846>
|
||
800695a: 4621 mov r1, r4
|
||
800695c: 461a mov r2, r3
|
||
800695e: 4628 mov r0, r5
|
||
8006960: f000 fc06 bl 8007170 <__lshift>
|
||
8006964: 4604 mov r4, r0
|
||
8006966: 9b0f ldr r3, [sp, #60] ; 0x3c
|
||
8006968: 2b00 cmp r3, #0
|
||
800696a: d070 beq.n 8006a4e <_dtoa_r+0x92e>
|
||
800696c: 4621 mov r1, r4
|
||
800696e: 4650 mov r0, sl
|
||
8006970: f000 fc6a bl 8007248 <__mcmp>
|
||
8006974: 2800 cmp r0, #0
|
||
8006976: da6a bge.n 8006a4e <_dtoa_r+0x92e>
|
||
8006978: 2300 movs r3, #0
|
||
800697a: 4651 mov r1, sl
|
||
800697c: 220a movs r2, #10
|
||
800697e: 4628 mov r0, r5
|
||
8006980: f000 fa4a bl 8006e18 <__multadd>
|
||
8006984: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8006986: 4682 mov sl, r0
|
||
8006988: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff
|
||
800698c: 2b00 cmp r3, #0
|
||
800698e: f000 8193 beq.w 8006cb8 <_dtoa_r+0xb98>
|
||
8006992: 4631 mov r1, r6
|
||
8006994: 2300 movs r3, #0
|
||
8006996: 220a movs r2, #10
|
||
8006998: 4628 mov r0, r5
|
||
800699a: f000 fa3d bl 8006e18 <__multadd>
|
||
800699e: f1bb 0f00 cmp.w fp, #0
|
||
80069a2: 4606 mov r6, r0
|
||
80069a4: f300 8093 bgt.w 8006ace <_dtoa_r+0x9ae>
|
||
80069a8: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
80069aa: 2b02 cmp r3, #2
|
||
80069ac: dc57 bgt.n 8006a5e <_dtoa_r+0x93e>
|
||
80069ae: e08e b.n 8006ace <_dtoa_r+0x9ae>
|
||
80069b0: 9b16 ldr r3, [sp, #88] ; 0x58
|
||
80069b2: f1c3 0336 rsb r3, r3, #54 ; 0x36
|
||
80069b6: e756 b.n 8006866 <_dtoa_r+0x746>
|
||
80069b8: 9b02 ldr r3, [sp, #8]
|
||
80069ba: 1e5c subs r4, r3, #1
|
||
80069bc: 9b0a ldr r3, [sp, #40] ; 0x28
|
||
80069be: 42a3 cmp r3, r4
|
||
80069c0: bfb7 itett lt
|
||
80069c2: 9b0a ldrlt r3, [sp, #40] ; 0x28
|
||
80069c4: 1b1c subge r4, r3, r4
|
||
80069c6: 1ae2 sublt r2, r4, r3
|
||
80069c8: 9b0e ldrlt r3, [sp, #56] ; 0x38
|
||
80069ca: bfbe ittt lt
|
||
80069cc: 940a strlt r4, [sp, #40] ; 0x28
|
||
80069ce: 189b addlt r3, r3, r2
|
||
80069d0: 930e strlt r3, [sp, #56] ; 0x38
|
||
80069d2: 9b02 ldr r3, [sp, #8]
|
||
80069d4: bfb8 it lt
|
||
80069d6: 2400 movlt r4, #0
|
||
80069d8: 2b00 cmp r3, #0
|
||
80069da: bfbb ittet lt
|
||
80069dc: 9b06 ldrlt r3, [sp, #24]
|
||
80069de: 9a02 ldrlt r2, [sp, #8]
|
||
80069e0: 9f06 ldrge r7, [sp, #24]
|
||
80069e2: 1a9f sublt r7, r3, r2
|
||
80069e4: bfac ite ge
|
||
80069e6: 9b02 ldrge r3, [sp, #8]
|
||
80069e8: 2300 movlt r3, #0
|
||
80069ea: e73e b.n 800686a <_dtoa_r+0x74a>
|
||
80069ec: 9c0a ldr r4, [sp, #40] ; 0x28
|
||
80069ee: 9f06 ldr r7, [sp, #24]
|
||
80069f0: 9e0b ldr r6, [sp, #44] ; 0x2c
|
||
80069f2: e745 b.n 8006880 <_dtoa_r+0x760>
|
||
80069f4: 3fe00000 .word 0x3fe00000
|
||
80069f8: 40240000 .word 0x40240000
|
||
80069fc: 9a0a ldr r2, [sp, #40] ; 0x28
|
||
80069fe: e76a b.n 80068d6 <_dtoa_r+0x7b6>
|
||
8006a00: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8006a02: 2b01 cmp r3, #1
|
||
8006a04: dc19 bgt.n 8006a3a <_dtoa_r+0x91a>
|
||
8006a06: 9b04 ldr r3, [sp, #16]
|
||
8006a08: b9bb cbnz r3, 8006a3a <_dtoa_r+0x91a>
|
||
8006a0a: 9b05 ldr r3, [sp, #20]
|
||
8006a0c: f3c3 0313 ubfx r3, r3, #0, #20
|
||
8006a10: b99b cbnz r3, 8006a3a <_dtoa_r+0x91a>
|
||
8006a12: 9b05 ldr r3, [sp, #20]
|
||
8006a14: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
|
||
8006a18: 0d1b lsrs r3, r3, #20
|
||
8006a1a: 051b lsls r3, r3, #20
|
||
8006a1c: b183 cbz r3, 8006a40 <_dtoa_r+0x920>
|
||
8006a1e: f04f 0801 mov.w r8, #1
|
||
8006a22: 9b06 ldr r3, [sp, #24]
|
||
8006a24: 3301 adds r3, #1
|
||
8006a26: 9306 str r3, [sp, #24]
|
||
8006a28: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006a2a: 3301 adds r3, #1
|
||
8006a2c: 9309 str r3, [sp, #36] ; 0x24
|
||
8006a2e: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8006a30: 2b00 cmp r3, #0
|
||
8006a32: f47f af6a bne.w 800690a <_dtoa_r+0x7ea>
|
||
8006a36: 2001 movs r0, #1
|
||
8006a38: e76f b.n 800691a <_dtoa_r+0x7fa>
|
||
8006a3a: f04f 0800 mov.w r8, #0
|
||
8006a3e: e7f6 b.n 8006a2e <_dtoa_r+0x90e>
|
||
8006a40: 4698 mov r8, r3
|
||
8006a42: e7f4 b.n 8006a2e <_dtoa_r+0x90e>
|
||
8006a44: f43f af7d beq.w 8006942 <_dtoa_r+0x822>
|
||
8006a48: 4618 mov r0, r3
|
||
8006a4a: 301c adds r0, #28
|
||
8006a4c: e772 b.n 8006934 <_dtoa_r+0x814>
|
||
8006a4e: 9b02 ldr r3, [sp, #8]
|
||
8006a50: 2b00 cmp r3, #0
|
||
8006a52: dc36 bgt.n 8006ac2 <_dtoa_r+0x9a2>
|
||
8006a54: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8006a56: 2b02 cmp r3, #2
|
||
8006a58: dd33 ble.n 8006ac2 <_dtoa_r+0x9a2>
|
||
8006a5a: f8dd b008 ldr.w fp, [sp, #8]
|
||
8006a5e: f1bb 0f00 cmp.w fp, #0
|
||
8006a62: d10d bne.n 8006a80 <_dtoa_r+0x960>
|
||
8006a64: 4621 mov r1, r4
|
||
8006a66: 465b mov r3, fp
|
||
8006a68: 2205 movs r2, #5
|
||
8006a6a: 4628 mov r0, r5
|
||
8006a6c: f000 f9d4 bl 8006e18 <__multadd>
|
||
8006a70: 4601 mov r1, r0
|
||
8006a72: 4604 mov r4, r0
|
||
8006a74: 4650 mov r0, sl
|
||
8006a76: f000 fbe7 bl 8007248 <__mcmp>
|
||
8006a7a: 2800 cmp r0, #0
|
||
8006a7c: f73f adb6 bgt.w 80065ec <_dtoa_r+0x4cc>
|
||
8006a80: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
8006a82: 9f08 ldr r7, [sp, #32]
|
||
8006a84: ea6f 0903 mvn.w r9, r3
|
||
8006a88: f04f 0800 mov.w r8, #0
|
||
8006a8c: 4621 mov r1, r4
|
||
8006a8e: 4628 mov r0, r5
|
||
8006a90: f000 f9a0 bl 8006dd4 <_Bfree>
|
||
8006a94: 2e00 cmp r6, #0
|
||
8006a96: f43f aea4 beq.w 80067e2 <_dtoa_r+0x6c2>
|
||
8006a9a: f1b8 0f00 cmp.w r8, #0
|
||
8006a9e: d005 beq.n 8006aac <_dtoa_r+0x98c>
|
||
8006aa0: 45b0 cmp r8, r6
|
||
8006aa2: d003 beq.n 8006aac <_dtoa_r+0x98c>
|
||
8006aa4: 4641 mov r1, r8
|
||
8006aa6: 4628 mov r0, r5
|
||
8006aa8: f000 f994 bl 8006dd4 <_Bfree>
|
||
8006aac: 4631 mov r1, r6
|
||
8006aae: 4628 mov r0, r5
|
||
8006ab0: f000 f990 bl 8006dd4 <_Bfree>
|
||
8006ab4: e695 b.n 80067e2 <_dtoa_r+0x6c2>
|
||
8006ab6: 2400 movs r4, #0
|
||
8006ab8: 4626 mov r6, r4
|
||
8006aba: e7e1 b.n 8006a80 <_dtoa_r+0x960>
|
||
8006abc: 46c1 mov r9, r8
|
||
8006abe: 4626 mov r6, r4
|
||
8006ac0: e594 b.n 80065ec <_dtoa_r+0x4cc>
|
||
8006ac2: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8006ac4: f8dd b008 ldr.w fp, [sp, #8]
|
||
8006ac8: 2b00 cmp r3, #0
|
||
8006aca: f000 80fc beq.w 8006cc6 <_dtoa_r+0xba6>
|
||
8006ace: 2f00 cmp r7, #0
|
||
8006ad0: dd05 ble.n 8006ade <_dtoa_r+0x9be>
|
||
8006ad2: 4631 mov r1, r6
|
||
8006ad4: 463a mov r2, r7
|
||
8006ad6: 4628 mov r0, r5
|
||
8006ad8: f000 fb4a bl 8007170 <__lshift>
|
||
8006adc: 4606 mov r6, r0
|
||
8006ade: f1b8 0f00 cmp.w r8, #0
|
||
8006ae2: d05c beq.n 8006b9e <_dtoa_r+0xa7e>
|
||
8006ae4: 4628 mov r0, r5
|
||
8006ae6: 6871 ldr r1, [r6, #4]
|
||
8006ae8: f000 f934 bl 8006d54 <_Balloc>
|
||
8006aec: 4607 mov r7, r0
|
||
8006aee: b928 cbnz r0, 8006afc <_dtoa_r+0x9dc>
|
||
8006af0: 4602 mov r2, r0
|
||
8006af2: f240 21ea movw r1, #746 ; 0x2ea
|
||
8006af6: 4b7e ldr r3, [pc, #504] ; (8006cf0 <_dtoa_r+0xbd0>)
|
||
8006af8: f7ff bb26 b.w 8006148 <_dtoa_r+0x28>
|
||
8006afc: 6932 ldr r2, [r6, #16]
|
||
8006afe: f106 010c add.w r1, r6, #12
|
||
8006b02: 3202 adds r2, #2
|
||
8006b04: 0092 lsls r2, r2, #2
|
||
8006b06: 300c adds r0, #12
|
||
8006b08: f000 f90a bl 8006d20 <memcpy>
|
||
8006b0c: 2201 movs r2, #1
|
||
8006b0e: 4639 mov r1, r7
|
||
8006b10: 4628 mov r0, r5
|
||
8006b12: f000 fb2d bl 8007170 <__lshift>
|
||
8006b16: 46b0 mov r8, r6
|
||
8006b18: 4606 mov r6, r0
|
||
8006b1a: 9b08 ldr r3, [sp, #32]
|
||
8006b1c: 3301 adds r3, #1
|
||
8006b1e: 9302 str r3, [sp, #8]
|
||
8006b20: 9b08 ldr r3, [sp, #32]
|
||
8006b22: 445b add r3, fp
|
||
8006b24: 930a str r3, [sp, #40] ; 0x28
|
||
8006b26: 9b04 ldr r3, [sp, #16]
|
||
8006b28: f003 0301 and.w r3, r3, #1
|
||
8006b2c: 9309 str r3, [sp, #36] ; 0x24
|
||
8006b2e: 9b02 ldr r3, [sp, #8]
|
||
8006b30: 4621 mov r1, r4
|
||
8006b32: 4650 mov r0, sl
|
||
8006b34: f103 3bff add.w fp, r3, #4294967295 ; 0xffffffff
|
||
8006b38: f7ff fa62 bl 8006000 <quorem>
|
||
8006b3c: 4603 mov r3, r0
|
||
8006b3e: 4641 mov r1, r8
|
||
8006b40: 3330 adds r3, #48 ; 0x30
|
||
8006b42: 9004 str r0, [sp, #16]
|
||
8006b44: 4650 mov r0, sl
|
||
8006b46: 930b str r3, [sp, #44] ; 0x2c
|
||
8006b48: f000 fb7e bl 8007248 <__mcmp>
|
||
8006b4c: 4632 mov r2, r6
|
||
8006b4e: 9006 str r0, [sp, #24]
|
||
8006b50: 4621 mov r1, r4
|
||
8006b52: 4628 mov r0, r5
|
||
8006b54: f000 fb94 bl 8007280 <__mdiff>
|
||
8006b58: 68c2 ldr r2, [r0, #12]
|
||
8006b5a: 4607 mov r7, r0
|
||
8006b5c: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8006b5e: bb02 cbnz r2, 8006ba2 <_dtoa_r+0xa82>
|
||
8006b60: 4601 mov r1, r0
|
||
8006b62: 4650 mov r0, sl
|
||
8006b64: f000 fb70 bl 8007248 <__mcmp>
|
||
8006b68: 4602 mov r2, r0
|
||
8006b6a: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8006b6c: 4639 mov r1, r7
|
||
8006b6e: 4628 mov r0, r5
|
||
8006b70: e9cd 320b strd r3, r2, [sp, #44] ; 0x2c
|
||
8006b74: f000 f92e bl 8006dd4 <_Bfree>
|
||
8006b78: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8006b7a: 9a0c ldr r2, [sp, #48] ; 0x30
|
||
8006b7c: 9f02 ldr r7, [sp, #8]
|
||
8006b7e: ea43 0102 orr.w r1, r3, r2
|
||
8006b82: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006b84: 430b orrs r3, r1
|
||
8006b86: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8006b88: d10d bne.n 8006ba6 <_dtoa_r+0xa86>
|
||
8006b8a: 2b39 cmp r3, #57 ; 0x39
|
||
8006b8c: d027 beq.n 8006bde <_dtoa_r+0xabe>
|
||
8006b8e: 9a06 ldr r2, [sp, #24]
|
||
8006b90: 2a00 cmp r2, #0
|
||
8006b92: dd01 ble.n 8006b98 <_dtoa_r+0xa78>
|
||
8006b94: 9b04 ldr r3, [sp, #16]
|
||
8006b96: 3331 adds r3, #49 ; 0x31
|
||
8006b98: f88b 3000 strb.w r3, [fp]
|
||
8006b9c: e776 b.n 8006a8c <_dtoa_r+0x96c>
|
||
8006b9e: 4630 mov r0, r6
|
||
8006ba0: e7b9 b.n 8006b16 <_dtoa_r+0x9f6>
|
||
8006ba2: 2201 movs r2, #1
|
||
8006ba4: e7e2 b.n 8006b6c <_dtoa_r+0xa4c>
|
||
8006ba6: 9906 ldr r1, [sp, #24]
|
||
8006ba8: 2900 cmp r1, #0
|
||
8006baa: db04 blt.n 8006bb6 <_dtoa_r+0xa96>
|
||
8006bac: 9822 ldr r0, [sp, #136] ; 0x88
|
||
8006bae: 4301 orrs r1, r0
|
||
8006bb0: 9809 ldr r0, [sp, #36] ; 0x24
|
||
8006bb2: 4301 orrs r1, r0
|
||
8006bb4: d120 bne.n 8006bf8 <_dtoa_r+0xad8>
|
||
8006bb6: 2a00 cmp r2, #0
|
||
8006bb8: ddee ble.n 8006b98 <_dtoa_r+0xa78>
|
||
8006bba: 4651 mov r1, sl
|
||
8006bbc: 2201 movs r2, #1
|
||
8006bbe: 4628 mov r0, r5
|
||
8006bc0: 9302 str r3, [sp, #8]
|
||
8006bc2: f000 fad5 bl 8007170 <__lshift>
|
||
8006bc6: 4621 mov r1, r4
|
||
8006bc8: 4682 mov sl, r0
|
||
8006bca: f000 fb3d bl 8007248 <__mcmp>
|
||
8006bce: 2800 cmp r0, #0
|
||
8006bd0: 9b02 ldr r3, [sp, #8]
|
||
8006bd2: dc02 bgt.n 8006bda <_dtoa_r+0xaba>
|
||
8006bd4: d1e0 bne.n 8006b98 <_dtoa_r+0xa78>
|
||
8006bd6: 07da lsls r2, r3, #31
|
||
8006bd8: d5de bpl.n 8006b98 <_dtoa_r+0xa78>
|
||
8006bda: 2b39 cmp r3, #57 ; 0x39
|
||
8006bdc: d1da bne.n 8006b94 <_dtoa_r+0xa74>
|
||
8006bde: 2339 movs r3, #57 ; 0x39
|
||
8006be0: f88b 3000 strb.w r3, [fp]
|
||
8006be4: 463b mov r3, r7
|
||
8006be6: 461f mov r7, r3
|
||
8006be8: f817 2c01 ldrb.w r2, [r7, #-1]
|
||
8006bec: 3b01 subs r3, #1
|
||
8006bee: 2a39 cmp r2, #57 ; 0x39
|
||
8006bf0: d050 beq.n 8006c94 <_dtoa_r+0xb74>
|
||
8006bf2: 3201 adds r2, #1
|
||
8006bf4: 701a strb r2, [r3, #0]
|
||
8006bf6: e749 b.n 8006a8c <_dtoa_r+0x96c>
|
||
8006bf8: 2a00 cmp r2, #0
|
||
8006bfa: dd03 ble.n 8006c04 <_dtoa_r+0xae4>
|
||
8006bfc: 2b39 cmp r3, #57 ; 0x39
|
||
8006bfe: d0ee beq.n 8006bde <_dtoa_r+0xabe>
|
||
8006c00: 3301 adds r3, #1
|
||
8006c02: e7c9 b.n 8006b98 <_dtoa_r+0xa78>
|
||
8006c04: 9a02 ldr r2, [sp, #8]
|
||
8006c06: 990a ldr r1, [sp, #40] ; 0x28
|
||
8006c08: f802 3c01 strb.w r3, [r2, #-1]
|
||
8006c0c: 428a cmp r2, r1
|
||
8006c0e: d02a beq.n 8006c66 <_dtoa_r+0xb46>
|
||
8006c10: 4651 mov r1, sl
|
||
8006c12: 2300 movs r3, #0
|
||
8006c14: 220a movs r2, #10
|
||
8006c16: 4628 mov r0, r5
|
||
8006c18: f000 f8fe bl 8006e18 <__multadd>
|
||
8006c1c: 45b0 cmp r8, r6
|
||
8006c1e: 4682 mov sl, r0
|
||
8006c20: f04f 0300 mov.w r3, #0
|
||
8006c24: f04f 020a mov.w r2, #10
|
||
8006c28: 4641 mov r1, r8
|
||
8006c2a: 4628 mov r0, r5
|
||
8006c2c: d107 bne.n 8006c3e <_dtoa_r+0xb1e>
|
||
8006c2e: f000 f8f3 bl 8006e18 <__multadd>
|
||
8006c32: 4680 mov r8, r0
|
||
8006c34: 4606 mov r6, r0
|
||
8006c36: 9b02 ldr r3, [sp, #8]
|
||
8006c38: 3301 adds r3, #1
|
||
8006c3a: 9302 str r3, [sp, #8]
|
||
8006c3c: e777 b.n 8006b2e <_dtoa_r+0xa0e>
|
||
8006c3e: f000 f8eb bl 8006e18 <__multadd>
|
||
8006c42: 4631 mov r1, r6
|
||
8006c44: 4680 mov r8, r0
|
||
8006c46: 2300 movs r3, #0
|
||
8006c48: 220a movs r2, #10
|
||
8006c4a: 4628 mov r0, r5
|
||
8006c4c: f000 f8e4 bl 8006e18 <__multadd>
|
||
8006c50: 4606 mov r6, r0
|
||
8006c52: e7f0 b.n 8006c36 <_dtoa_r+0xb16>
|
||
8006c54: f1bb 0f00 cmp.w fp, #0
|
||
8006c58: bfcc ite gt
|
||
8006c5a: 465f movgt r7, fp
|
||
8006c5c: 2701 movle r7, #1
|
||
8006c5e: f04f 0800 mov.w r8, #0
|
||
8006c62: 9a08 ldr r2, [sp, #32]
|
||
8006c64: 4417 add r7, r2
|
||
8006c66: 4651 mov r1, sl
|
||
8006c68: 2201 movs r2, #1
|
||
8006c6a: 4628 mov r0, r5
|
||
8006c6c: 9302 str r3, [sp, #8]
|
||
8006c6e: f000 fa7f bl 8007170 <__lshift>
|
||
8006c72: 4621 mov r1, r4
|
||
8006c74: 4682 mov sl, r0
|
||
8006c76: f000 fae7 bl 8007248 <__mcmp>
|
||
8006c7a: 2800 cmp r0, #0
|
||
8006c7c: dcb2 bgt.n 8006be4 <_dtoa_r+0xac4>
|
||
8006c7e: d102 bne.n 8006c86 <_dtoa_r+0xb66>
|
||
8006c80: 9b02 ldr r3, [sp, #8]
|
||
8006c82: 07db lsls r3, r3, #31
|
||
8006c84: d4ae bmi.n 8006be4 <_dtoa_r+0xac4>
|
||
8006c86: 463b mov r3, r7
|
||
8006c88: 461f mov r7, r3
|
||
8006c8a: f813 2d01 ldrb.w r2, [r3, #-1]!
|
||
8006c8e: 2a30 cmp r2, #48 ; 0x30
|
||
8006c90: d0fa beq.n 8006c88 <_dtoa_r+0xb68>
|
||
8006c92: e6fb b.n 8006a8c <_dtoa_r+0x96c>
|
||
8006c94: 9a08 ldr r2, [sp, #32]
|
||
8006c96: 429a cmp r2, r3
|
||
8006c98: d1a5 bne.n 8006be6 <_dtoa_r+0xac6>
|
||
8006c9a: 2331 movs r3, #49 ; 0x31
|
||
8006c9c: f109 0901 add.w r9, r9, #1
|
||
8006ca0: 7013 strb r3, [r2, #0]
|
||
8006ca2: e6f3 b.n 8006a8c <_dtoa_r+0x96c>
|
||
8006ca4: 4b13 ldr r3, [pc, #76] ; (8006cf4 <_dtoa_r+0xbd4>)
|
||
8006ca6: f7ff baa7 b.w 80061f8 <_dtoa_r+0xd8>
|
||
8006caa: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
8006cac: 2b00 cmp r3, #0
|
||
8006cae: f47f aa80 bne.w 80061b2 <_dtoa_r+0x92>
|
||
8006cb2: 4b11 ldr r3, [pc, #68] ; (8006cf8 <_dtoa_r+0xbd8>)
|
||
8006cb4: f7ff baa0 b.w 80061f8 <_dtoa_r+0xd8>
|
||
8006cb8: f1bb 0f00 cmp.w fp, #0
|
||
8006cbc: dc03 bgt.n 8006cc6 <_dtoa_r+0xba6>
|
||
8006cbe: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8006cc0: 2b02 cmp r3, #2
|
||
8006cc2: f73f aecc bgt.w 8006a5e <_dtoa_r+0x93e>
|
||
8006cc6: 9f08 ldr r7, [sp, #32]
|
||
8006cc8: 4621 mov r1, r4
|
||
8006cca: 4650 mov r0, sl
|
||
8006ccc: f7ff f998 bl 8006000 <quorem>
|
||
8006cd0: 9a08 ldr r2, [sp, #32]
|
||
8006cd2: f100 0330 add.w r3, r0, #48 ; 0x30
|
||
8006cd6: f807 3b01 strb.w r3, [r7], #1
|
||
8006cda: 1aba subs r2, r7, r2
|
||
8006cdc: 4593 cmp fp, r2
|
||
8006cde: ddb9 ble.n 8006c54 <_dtoa_r+0xb34>
|
||
8006ce0: 4651 mov r1, sl
|
||
8006ce2: 2300 movs r3, #0
|
||
8006ce4: 220a movs r2, #10
|
||
8006ce6: 4628 mov r0, r5
|
||
8006ce8: f000 f896 bl 8006e18 <__multadd>
|
||
8006cec: 4682 mov sl, r0
|
||
8006cee: e7eb b.n 8006cc8 <_dtoa_r+0xba8>
|
||
8006cf0: 08008eef .word 0x08008eef
|
||
8006cf4: 08008e48 .word 0x08008e48
|
||
8006cf8: 08008e6c .word 0x08008e6c
|
||
|
||
08006cfc <_localeconv_r>:
|
||
8006cfc: 4800 ldr r0, [pc, #0] ; (8006d00 <_localeconv_r+0x4>)
|
||
8006cfe: 4770 bx lr
|
||
8006d00: 20000160 .word 0x20000160
|
||
|
||
08006d04 <memchr>:
|
||
8006d04: 4603 mov r3, r0
|
||
8006d06: b510 push {r4, lr}
|
||
8006d08: b2c9 uxtb r1, r1
|
||
8006d0a: 4402 add r2, r0
|
||
8006d0c: 4293 cmp r3, r2
|
||
8006d0e: 4618 mov r0, r3
|
||
8006d10: d101 bne.n 8006d16 <memchr+0x12>
|
||
8006d12: 2000 movs r0, #0
|
||
8006d14: e003 b.n 8006d1e <memchr+0x1a>
|
||
8006d16: 7804 ldrb r4, [r0, #0]
|
||
8006d18: 3301 adds r3, #1
|
||
8006d1a: 428c cmp r4, r1
|
||
8006d1c: d1f6 bne.n 8006d0c <memchr+0x8>
|
||
8006d1e: bd10 pop {r4, pc}
|
||
|
||
08006d20 <memcpy>:
|
||
8006d20: 440a add r2, r1
|
||
8006d22: 4291 cmp r1, r2
|
||
8006d24: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff
|
||
8006d28: d100 bne.n 8006d2c <memcpy+0xc>
|
||
8006d2a: 4770 bx lr
|
||
8006d2c: b510 push {r4, lr}
|
||
8006d2e: f811 4b01 ldrb.w r4, [r1], #1
|
||
8006d32: 4291 cmp r1, r2
|
||
8006d34: f803 4f01 strb.w r4, [r3, #1]!
|
||
8006d38: d1f9 bne.n 8006d2e <memcpy+0xe>
|
||
8006d3a: bd10 pop {r4, pc}
|
||
|
||
08006d3c <__malloc_lock>:
|
||
8006d3c: 4801 ldr r0, [pc, #4] ; (8006d44 <__malloc_lock+0x8>)
|
||
8006d3e: f000 bd26 b.w 800778e <__retarget_lock_acquire_recursive>
|
||
8006d42: bf00 nop
|
||
8006d44: 200002f8 .word 0x200002f8
|
||
|
||
08006d48 <__malloc_unlock>:
|
||
8006d48: 4801 ldr r0, [pc, #4] ; (8006d50 <__malloc_unlock+0x8>)
|
||
8006d4a: f000 bd21 b.w 8007790 <__retarget_lock_release_recursive>
|
||
8006d4e: bf00 nop
|
||
8006d50: 200002f8 .word 0x200002f8
|
||
|
||
08006d54 <_Balloc>:
|
||
8006d54: b570 push {r4, r5, r6, lr}
|
||
8006d56: 6a46 ldr r6, [r0, #36] ; 0x24
|
||
8006d58: 4604 mov r4, r0
|
||
8006d5a: 460d mov r5, r1
|
||
8006d5c: b976 cbnz r6, 8006d7c <_Balloc+0x28>
|
||
8006d5e: 2010 movs r0, #16
|
||
8006d60: f7fe fc00 bl 8005564 <malloc>
|
||
8006d64: 4602 mov r2, r0
|
||
8006d66: 6260 str r0, [r4, #36] ; 0x24
|
||
8006d68: b920 cbnz r0, 8006d74 <_Balloc+0x20>
|
||
8006d6a: 2166 movs r1, #102 ; 0x66
|
||
8006d6c: 4b17 ldr r3, [pc, #92] ; (8006dcc <_Balloc+0x78>)
|
||
8006d6e: 4818 ldr r0, [pc, #96] ; (8006dd0 <_Balloc+0x7c>)
|
||
8006d70: f000 fcdc bl 800772c <__assert_func>
|
||
8006d74: e9c0 6601 strd r6, r6, [r0, #4]
|
||
8006d78: 6006 str r6, [r0, #0]
|
||
8006d7a: 60c6 str r6, [r0, #12]
|
||
8006d7c: 6a66 ldr r6, [r4, #36] ; 0x24
|
||
8006d7e: 68f3 ldr r3, [r6, #12]
|
||
8006d80: b183 cbz r3, 8006da4 <_Balloc+0x50>
|
||
8006d82: 6a63 ldr r3, [r4, #36] ; 0x24
|
||
8006d84: 68db ldr r3, [r3, #12]
|
||
8006d86: f853 0025 ldr.w r0, [r3, r5, lsl #2]
|
||
8006d8a: b9b8 cbnz r0, 8006dbc <_Balloc+0x68>
|
||
8006d8c: 2101 movs r1, #1
|
||
8006d8e: fa01 f605 lsl.w r6, r1, r5
|
||
8006d92: 1d72 adds r2, r6, #5
|
||
8006d94: 4620 mov r0, r4
|
||
8006d96: 0092 lsls r2, r2, #2
|
||
8006d98: f000 fb5e bl 8007458 <_calloc_r>
|
||
8006d9c: b160 cbz r0, 8006db8 <_Balloc+0x64>
|
||
8006d9e: e9c0 5601 strd r5, r6, [r0, #4]
|
||
8006da2: e00e b.n 8006dc2 <_Balloc+0x6e>
|
||
8006da4: 2221 movs r2, #33 ; 0x21
|
||
8006da6: 2104 movs r1, #4
|
||
8006da8: 4620 mov r0, r4
|
||
8006daa: f000 fb55 bl 8007458 <_calloc_r>
|
||
8006dae: 6a63 ldr r3, [r4, #36] ; 0x24
|
||
8006db0: 60f0 str r0, [r6, #12]
|
||
8006db2: 68db ldr r3, [r3, #12]
|
||
8006db4: 2b00 cmp r3, #0
|
||
8006db6: d1e4 bne.n 8006d82 <_Balloc+0x2e>
|
||
8006db8: 2000 movs r0, #0
|
||
8006dba: bd70 pop {r4, r5, r6, pc}
|
||
8006dbc: 6802 ldr r2, [r0, #0]
|
||
8006dbe: f843 2025 str.w r2, [r3, r5, lsl #2]
|
||
8006dc2: 2300 movs r3, #0
|
||
8006dc4: e9c0 3303 strd r3, r3, [r0, #12]
|
||
8006dc8: e7f7 b.n 8006dba <_Balloc+0x66>
|
||
8006dca: bf00 nop
|
||
8006dcc: 08008e79 .word 0x08008e79
|
||
8006dd0: 08008f00 .word 0x08008f00
|
||
|
||
08006dd4 <_Bfree>:
|
||
8006dd4: b570 push {r4, r5, r6, lr}
|
||
8006dd6: 6a46 ldr r6, [r0, #36] ; 0x24
|
||
8006dd8: 4605 mov r5, r0
|
||
8006dda: 460c mov r4, r1
|
||
8006ddc: b976 cbnz r6, 8006dfc <_Bfree+0x28>
|
||
8006dde: 2010 movs r0, #16
|
||
8006de0: f7fe fbc0 bl 8005564 <malloc>
|
||
8006de4: 4602 mov r2, r0
|
||
8006de6: 6268 str r0, [r5, #36] ; 0x24
|
||
8006de8: b920 cbnz r0, 8006df4 <_Bfree+0x20>
|
||
8006dea: 218a movs r1, #138 ; 0x8a
|
||
8006dec: 4b08 ldr r3, [pc, #32] ; (8006e10 <_Bfree+0x3c>)
|
||
8006dee: 4809 ldr r0, [pc, #36] ; (8006e14 <_Bfree+0x40>)
|
||
8006df0: f000 fc9c bl 800772c <__assert_func>
|
||
8006df4: e9c0 6601 strd r6, r6, [r0, #4]
|
||
8006df8: 6006 str r6, [r0, #0]
|
||
8006dfa: 60c6 str r6, [r0, #12]
|
||
8006dfc: b13c cbz r4, 8006e0e <_Bfree+0x3a>
|
||
8006dfe: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
8006e00: 6862 ldr r2, [r4, #4]
|
||
8006e02: 68db ldr r3, [r3, #12]
|
||
8006e04: f853 1022 ldr.w r1, [r3, r2, lsl #2]
|
||
8006e08: 6021 str r1, [r4, #0]
|
||
8006e0a: f843 4022 str.w r4, [r3, r2, lsl #2]
|
||
8006e0e: bd70 pop {r4, r5, r6, pc}
|
||
8006e10: 08008e79 .word 0x08008e79
|
||
8006e14: 08008f00 .word 0x08008f00
|
||
|
||
08006e18 <__multadd>:
|
||
8006e18: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||
8006e1c: 4698 mov r8, r3
|
||
8006e1e: 460c mov r4, r1
|
||
8006e20: 2300 movs r3, #0
|
||
8006e22: 690e ldr r6, [r1, #16]
|
||
8006e24: 4607 mov r7, r0
|
||
8006e26: f101 0014 add.w r0, r1, #20
|
||
8006e2a: 6805 ldr r5, [r0, #0]
|
||
8006e2c: 3301 adds r3, #1
|
||
8006e2e: b2a9 uxth r1, r5
|
||
8006e30: fb02 8101 mla r1, r2, r1, r8
|
||
8006e34: 0c2d lsrs r5, r5, #16
|
||
8006e36: ea4f 4c11 mov.w ip, r1, lsr #16
|
||
8006e3a: fb02 c505 mla r5, r2, r5, ip
|
||
8006e3e: b289 uxth r1, r1
|
||
8006e40: eb01 4105 add.w r1, r1, r5, lsl #16
|
||
8006e44: 429e cmp r6, r3
|
||
8006e46: ea4f 4815 mov.w r8, r5, lsr #16
|
||
8006e4a: f840 1b04 str.w r1, [r0], #4
|
||
8006e4e: dcec bgt.n 8006e2a <__multadd+0x12>
|
||
8006e50: f1b8 0f00 cmp.w r8, #0
|
||
8006e54: d022 beq.n 8006e9c <__multadd+0x84>
|
||
8006e56: 68a3 ldr r3, [r4, #8]
|
||
8006e58: 42b3 cmp r3, r6
|
||
8006e5a: dc19 bgt.n 8006e90 <__multadd+0x78>
|
||
8006e5c: 6861 ldr r1, [r4, #4]
|
||
8006e5e: 4638 mov r0, r7
|
||
8006e60: 3101 adds r1, #1
|
||
8006e62: f7ff ff77 bl 8006d54 <_Balloc>
|
||
8006e66: 4605 mov r5, r0
|
||
8006e68: b928 cbnz r0, 8006e76 <__multadd+0x5e>
|
||
8006e6a: 4602 mov r2, r0
|
||
8006e6c: 21b5 movs r1, #181 ; 0xb5
|
||
8006e6e: 4b0d ldr r3, [pc, #52] ; (8006ea4 <__multadd+0x8c>)
|
||
8006e70: 480d ldr r0, [pc, #52] ; (8006ea8 <__multadd+0x90>)
|
||
8006e72: f000 fc5b bl 800772c <__assert_func>
|
||
8006e76: 6922 ldr r2, [r4, #16]
|
||
8006e78: f104 010c add.w r1, r4, #12
|
||
8006e7c: 3202 adds r2, #2
|
||
8006e7e: 0092 lsls r2, r2, #2
|
||
8006e80: 300c adds r0, #12
|
||
8006e82: f7ff ff4d bl 8006d20 <memcpy>
|
||
8006e86: 4621 mov r1, r4
|
||
8006e88: 4638 mov r0, r7
|
||
8006e8a: f7ff ffa3 bl 8006dd4 <_Bfree>
|
||
8006e8e: 462c mov r4, r5
|
||
8006e90: eb04 0386 add.w r3, r4, r6, lsl #2
|
||
8006e94: 3601 adds r6, #1
|
||
8006e96: f8c3 8014 str.w r8, [r3, #20]
|
||
8006e9a: 6126 str r6, [r4, #16]
|
||
8006e9c: 4620 mov r0, r4
|
||
8006e9e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
||
8006ea2: bf00 nop
|
||
8006ea4: 08008eef .word 0x08008eef
|
||
8006ea8: 08008f00 .word 0x08008f00
|
||
|
||
08006eac <__hi0bits>:
|
||
8006eac: 0c02 lsrs r2, r0, #16
|
||
8006eae: 0412 lsls r2, r2, #16
|
||
8006eb0: 4603 mov r3, r0
|
||
8006eb2: b9ca cbnz r2, 8006ee8 <__hi0bits+0x3c>
|
||
8006eb4: 0403 lsls r3, r0, #16
|
||
8006eb6: 2010 movs r0, #16
|
||
8006eb8: f013 4f7f tst.w r3, #4278190080 ; 0xff000000
|
||
8006ebc: bf04 itt eq
|
||
8006ebe: 021b lsleq r3, r3, #8
|
||
8006ec0: 3008 addeq r0, #8
|
||
8006ec2: f013 4f70 tst.w r3, #4026531840 ; 0xf0000000
|
||
8006ec6: bf04 itt eq
|
||
8006ec8: 011b lsleq r3, r3, #4
|
||
8006eca: 3004 addeq r0, #4
|
||
8006ecc: f013 4f40 tst.w r3, #3221225472 ; 0xc0000000
|
||
8006ed0: bf04 itt eq
|
||
8006ed2: 009b lsleq r3, r3, #2
|
||
8006ed4: 3002 addeq r0, #2
|
||
8006ed6: 2b00 cmp r3, #0
|
||
8006ed8: db05 blt.n 8006ee6 <__hi0bits+0x3a>
|
||
8006eda: f013 4f80 tst.w r3, #1073741824 ; 0x40000000
|
||
8006ede: f100 0001 add.w r0, r0, #1
|
||
8006ee2: bf08 it eq
|
||
8006ee4: 2020 moveq r0, #32
|
||
8006ee6: 4770 bx lr
|
||
8006ee8: 2000 movs r0, #0
|
||
8006eea: e7e5 b.n 8006eb8 <__hi0bits+0xc>
|
||
|
||
08006eec <__lo0bits>:
|
||
8006eec: 6803 ldr r3, [r0, #0]
|
||
8006eee: 4602 mov r2, r0
|
||
8006ef0: f013 0007 ands.w r0, r3, #7
|
||
8006ef4: d00b beq.n 8006f0e <__lo0bits+0x22>
|
||
8006ef6: 07d9 lsls r1, r3, #31
|
||
8006ef8: d422 bmi.n 8006f40 <__lo0bits+0x54>
|
||
8006efa: 0798 lsls r0, r3, #30
|
||
8006efc: bf49 itett mi
|
||
8006efe: 085b lsrmi r3, r3, #1
|
||
8006f00: 089b lsrpl r3, r3, #2
|
||
8006f02: 2001 movmi r0, #1
|
||
8006f04: 6013 strmi r3, [r2, #0]
|
||
8006f06: bf5c itt pl
|
||
8006f08: 2002 movpl r0, #2
|
||
8006f0a: 6013 strpl r3, [r2, #0]
|
||
8006f0c: 4770 bx lr
|
||
8006f0e: b299 uxth r1, r3
|
||
8006f10: b909 cbnz r1, 8006f16 <__lo0bits+0x2a>
|
||
8006f12: 2010 movs r0, #16
|
||
8006f14: 0c1b lsrs r3, r3, #16
|
||
8006f16: f013 0fff tst.w r3, #255 ; 0xff
|
||
8006f1a: bf04 itt eq
|
||
8006f1c: 0a1b lsreq r3, r3, #8
|
||
8006f1e: 3008 addeq r0, #8
|
||
8006f20: 0719 lsls r1, r3, #28
|
||
8006f22: bf04 itt eq
|
||
8006f24: 091b lsreq r3, r3, #4
|
||
8006f26: 3004 addeq r0, #4
|
||
8006f28: 0799 lsls r1, r3, #30
|
||
8006f2a: bf04 itt eq
|
||
8006f2c: 089b lsreq r3, r3, #2
|
||
8006f2e: 3002 addeq r0, #2
|
||
8006f30: 07d9 lsls r1, r3, #31
|
||
8006f32: d403 bmi.n 8006f3c <__lo0bits+0x50>
|
||
8006f34: 085b lsrs r3, r3, #1
|
||
8006f36: f100 0001 add.w r0, r0, #1
|
||
8006f3a: d003 beq.n 8006f44 <__lo0bits+0x58>
|
||
8006f3c: 6013 str r3, [r2, #0]
|
||
8006f3e: 4770 bx lr
|
||
8006f40: 2000 movs r0, #0
|
||
8006f42: 4770 bx lr
|
||
8006f44: 2020 movs r0, #32
|
||
8006f46: 4770 bx lr
|
||
|
||
08006f48 <__i2b>:
|
||
8006f48: b510 push {r4, lr}
|
||
8006f4a: 460c mov r4, r1
|
||
8006f4c: 2101 movs r1, #1
|
||
8006f4e: f7ff ff01 bl 8006d54 <_Balloc>
|
||
8006f52: 4602 mov r2, r0
|
||
8006f54: b928 cbnz r0, 8006f62 <__i2b+0x1a>
|
||
8006f56: f44f 71a0 mov.w r1, #320 ; 0x140
|
||
8006f5a: 4b04 ldr r3, [pc, #16] ; (8006f6c <__i2b+0x24>)
|
||
8006f5c: 4804 ldr r0, [pc, #16] ; (8006f70 <__i2b+0x28>)
|
||
8006f5e: f000 fbe5 bl 800772c <__assert_func>
|
||
8006f62: 2301 movs r3, #1
|
||
8006f64: 6144 str r4, [r0, #20]
|
||
8006f66: 6103 str r3, [r0, #16]
|
||
8006f68: bd10 pop {r4, pc}
|
||
8006f6a: bf00 nop
|
||
8006f6c: 08008eef .word 0x08008eef
|
||
8006f70: 08008f00 .word 0x08008f00
|
||
|
||
08006f74 <__multiply>:
|
||
8006f74: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8006f78: 4614 mov r4, r2
|
||
8006f7a: 690a ldr r2, [r1, #16]
|
||
8006f7c: 6923 ldr r3, [r4, #16]
|
||
8006f7e: 460d mov r5, r1
|
||
8006f80: 429a cmp r2, r3
|
||
8006f82: bfbe ittt lt
|
||
8006f84: 460b movlt r3, r1
|
||
8006f86: 4625 movlt r5, r4
|
||
8006f88: 461c movlt r4, r3
|
||
8006f8a: f8d5 a010 ldr.w sl, [r5, #16]
|
||
8006f8e: f8d4 9010 ldr.w r9, [r4, #16]
|
||
8006f92: 68ab ldr r3, [r5, #8]
|
||
8006f94: 6869 ldr r1, [r5, #4]
|
||
8006f96: eb0a 0709 add.w r7, sl, r9
|
||
8006f9a: 42bb cmp r3, r7
|
||
8006f9c: b085 sub sp, #20
|
||
8006f9e: bfb8 it lt
|
||
8006fa0: 3101 addlt r1, #1
|
||
8006fa2: f7ff fed7 bl 8006d54 <_Balloc>
|
||
8006fa6: b930 cbnz r0, 8006fb6 <__multiply+0x42>
|
||
8006fa8: 4602 mov r2, r0
|
||
8006faa: f240 115d movw r1, #349 ; 0x15d
|
||
8006fae: 4b41 ldr r3, [pc, #260] ; (80070b4 <__multiply+0x140>)
|
||
8006fb0: 4841 ldr r0, [pc, #260] ; (80070b8 <__multiply+0x144>)
|
||
8006fb2: f000 fbbb bl 800772c <__assert_func>
|
||
8006fb6: f100 0614 add.w r6, r0, #20
|
||
8006fba: 4633 mov r3, r6
|
||
8006fbc: 2200 movs r2, #0
|
||
8006fbe: eb06 0887 add.w r8, r6, r7, lsl #2
|
||
8006fc2: 4543 cmp r3, r8
|
||
8006fc4: d31e bcc.n 8007004 <__multiply+0x90>
|
||
8006fc6: f105 0c14 add.w ip, r5, #20
|
||
8006fca: f104 0314 add.w r3, r4, #20
|
||
8006fce: eb0c 0c8a add.w ip, ip, sl, lsl #2
|
||
8006fd2: eb03 0289 add.w r2, r3, r9, lsl #2
|
||
8006fd6: 9202 str r2, [sp, #8]
|
||
8006fd8: ebac 0205 sub.w r2, ip, r5
|
||
8006fdc: 3a15 subs r2, #21
|
||
8006fde: f022 0203 bic.w r2, r2, #3
|
||
8006fe2: 3204 adds r2, #4
|
||
8006fe4: f105 0115 add.w r1, r5, #21
|
||
8006fe8: 458c cmp ip, r1
|
||
8006fea: bf38 it cc
|
||
8006fec: 2204 movcc r2, #4
|
||
8006fee: 9201 str r2, [sp, #4]
|
||
8006ff0: 9a02 ldr r2, [sp, #8]
|
||
8006ff2: 9303 str r3, [sp, #12]
|
||
8006ff4: 429a cmp r2, r3
|
||
8006ff6: d808 bhi.n 800700a <__multiply+0x96>
|
||
8006ff8: 2f00 cmp r7, #0
|
||
8006ffa: dc55 bgt.n 80070a8 <__multiply+0x134>
|
||
8006ffc: 6107 str r7, [r0, #16]
|
||
8006ffe: b005 add sp, #20
|
||
8007000: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8007004: f843 2b04 str.w r2, [r3], #4
|
||
8007008: e7db b.n 8006fc2 <__multiply+0x4e>
|
||
800700a: f8b3 a000 ldrh.w sl, [r3]
|
||
800700e: f1ba 0f00 cmp.w sl, #0
|
||
8007012: d020 beq.n 8007056 <__multiply+0xe2>
|
||
8007014: 46b1 mov r9, r6
|
||
8007016: 2200 movs r2, #0
|
||
8007018: f105 0e14 add.w lr, r5, #20
|
||
800701c: f85e 4b04 ldr.w r4, [lr], #4
|
||
8007020: f8d9 b000 ldr.w fp, [r9]
|
||
8007024: b2a1 uxth r1, r4
|
||
8007026: fa1f fb8b uxth.w fp, fp
|
||
800702a: fb0a b101 mla r1, sl, r1, fp
|
||
800702e: 4411 add r1, r2
|
||
8007030: f8d9 2000 ldr.w r2, [r9]
|
||
8007034: 0c24 lsrs r4, r4, #16
|
||
8007036: 0c12 lsrs r2, r2, #16
|
||
8007038: fb0a 2404 mla r4, sl, r4, r2
|
||
800703c: eb04 4411 add.w r4, r4, r1, lsr #16
|
||
8007040: b289 uxth r1, r1
|
||
8007042: ea41 4104 orr.w r1, r1, r4, lsl #16
|
||
8007046: 45f4 cmp ip, lr
|
||
8007048: ea4f 4214 mov.w r2, r4, lsr #16
|
||
800704c: f849 1b04 str.w r1, [r9], #4
|
||
8007050: d8e4 bhi.n 800701c <__multiply+0xa8>
|
||
8007052: 9901 ldr r1, [sp, #4]
|
||
8007054: 5072 str r2, [r6, r1]
|
||
8007056: 9a03 ldr r2, [sp, #12]
|
||
8007058: 3304 adds r3, #4
|
||
800705a: f8b2 9002 ldrh.w r9, [r2, #2]
|
||
800705e: f1b9 0f00 cmp.w r9, #0
|
||
8007062: d01f beq.n 80070a4 <__multiply+0x130>
|
||
8007064: 46b6 mov lr, r6
|
||
8007066: f04f 0a00 mov.w sl, #0
|
||
800706a: 6834 ldr r4, [r6, #0]
|
||
800706c: f105 0114 add.w r1, r5, #20
|
||
8007070: 880a ldrh r2, [r1, #0]
|
||
8007072: f8be b002 ldrh.w fp, [lr, #2]
|
||
8007076: b2a4 uxth r4, r4
|
||
8007078: fb09 b202 mla r2, r9, r2, fp
|
||
800707c: 4492 add sl, r2
|
||
800707e: ea44 440a orr.w r4, r4, sl, lsl #16
|
||
8007082: f84e 4b04 str.w r4, [lr], #4
|
||
8007086: f851 4b04 ldr.w r4, [r1], #4
|
||
800708a: f8be 2000 ldrh.w r2, [lr]
|
||
800708e: 0c24 lsrs r4, r4, #16
|
||
8007090: fb09 2404 mla r4, r9, r4, r2
|
||
8007094: 458c cmp ip, r1
|
||
8007096: eb04 441a add.w r4, r4, sl, lsr #16
|
||
800709a: ea4f 4a14 mov.w sl, r4, lsr #16
|
||
800709e: d8e7 bhi.n 8007070 <__multiply+0xfc>
|
||
80070a0: 9a01 ldr r2, [sp, #4]
|
||
80070a2: 50b4 str r4, [r6, r2]
|
||
80070a4: 3604 adds r6, #4
|
||
80070a6: e7a3 b.n 8006ff0 <__multiply+0x7c>
|
||
80070a8: f858 3d04 ldr.w r3, [r8, #-4]!
|
||
80070ac: 2b00 cmp r3, #0
|
||
80070ae: d1a5 bne.n 8006ffc <__multiply+0x88>
|
||
80070b0: 3f01 subs r7, #1
|
||
80070b2: e7a1 b.n 8006ff8 <__multiply+0x84>
|
||
80070b4: 08008eef .word 0x08008eef
|
||
80070b8: 08008f00 .word 0x08008f00
|
||
|
||
080070bc <__pow5mult>:
|
||
80070bc: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
||
80070c0: 4615 mov r5, r2
|
||
80070c2: f012 0203 ands.w r2, r2, #3
|
||
80070c6: 4606 mov r6, r0
|
||
80070c8: 460f mov r7, r1
|
||
80070ca: d007 beq.n 80070dc <__pow5mult+0x20>
|
||
80070cc: 4c25 ldr r4, [pc, #148] ; (8007164 <__pow5mult+0xa8>)
|
||
80070ce: 3a01 subs r2, #1
|
||
80070d0: 2300 movs r3, #0
|
||
80070d2: f854 2022 ldr.w r2, [r4, r2, lsl #2]
|
||
80070d6: f7ff fe9f bl 8006e18 <__multadd>
|
||
80070da: 4607 mov r7, r0
|
||
80070dc: 10ad asrs r5, r5, #2
|
||
80070de: d03d beq.n 800715c <__pow5mult+0xa0>
|
||
80070e0: 6a74 ldr r4, [r6, #36] ; 0x24
|
||
80070e2: b97c cbnz r4, 8007104 <__pow5mult+0x48>
|
||
80070e4: 2010 movs r0, #16
|
||
80070e6: f7fe fa3d bl 8005564 <malloc>
|
||
80070ea: 4602 mov r2, r0
|
||
80070ec: 6270 str r0, [r6, #36] ; 0x24
|
||
80070ee: b928 cbnz r0, 80070fc <__pow5mult+0x40>
|
||
80070f0: f44f 71d7 mov.w r1, #430 ; 0x1ae
|
||
80070f4: 4b1c ldr r3, [pc, #112] ; (8007168 <__pow5mult+0xac>)
|
||
80070f6: 481d ldr r0, [pc, #116] ; (800716c <__pow5mult+0xb0>)
|
||
80070f8: f000 fb18 bl 800772c <__assert_func>
|
||
80070fc: e9c0 4401 strd r4, r4, [r0, #4]
|
||
8007100: 6004 str r4, [r0, #0]
|
||
8007102: 60c4 str r4, [r0, #12]
|
||
8007104: f8d6 8024 ldr.w r8, [r6, #36] ; 0x24
|
||
8007108: f8d8 4008 ldr.w r4, [r8, #8]
|
||
800710c: b94c cbnz r4, 8007122 <__pow5mult+0x66>
|
||
800710e: f240 2171 movw r1, #625 ; 0x271
|
||
8007112: 4630 mov r0, r6
|
||
8007114: f7ff ff18 bl 8006f48 <__i2b>
|
||
8007118: 2300 movs r3, #0
|
||
800711a: 4604 mov r4, r0
|
||
800711c: f8c8 0008 str.w r0, [r8, #8]
|
||
8007120: 6003 str r3, [r0, #0]
|
||
8007122: f04f 0900 mov.w r9, #0
|
||
8007126: 07eb lsls r3, r5, #31
|
||
8007128: d50a bpl.n 8007140 <__pow5mult+0x84>
|
||
800712a: 4639 mov r1, r7
|
||
800712c: 4622 mov r2, r4
|
||
800712e: 4630 mov r0, r6
|
||
8007130: f7ff ff20 bl 8006f74 <__multiply>
|
||
8007134: 4680 mov r8, r0
|
||
8007136: 4639 mov r1, r7
|
||
8007138: 4630 mov r0, r6
|
||
800713a: f7ff fe4b bl 8006dd4 <_Bfree>
|
||
800713e: 4647 mov r7, r8
|
||
8007140: 106d asrs r5, r5, #1
|
||
8007142: d00b beq.n 800715c <__pow5mult+0xa0>
|
||
8007144: 6820 ldr r0, [r4, #0]
|
||
8007146: b938 cbnz r0, 8007158 <__pow5mult+0x9c>
|
||
8007148: 4622 mov r2, r4
|
||
800714a: 4621 mov r1, r4
|
||
800714c: 4630 mov r0, r6
|
||
800714e: f7ff ff11 bl 8006f74 <__multiply>
|
||
8007152: 6020 str r0, [r4, #0]
|
||
8007154: f8c0 9000 str.w r9, [r0]
|
||
8007158: 4604 mov r4, r0
|
||
800715a: e7e4 b.n 8007126 <__pow5mult+0x6a>
|
||
800715c: 4638 mov r0, r7
|
||
800715e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
||
8007162: bf00 nop
|
||
8007164: 08009050 .word 0x08009050
|
||
8007168: 08008e79 .word 0x08008e79
|
||
800716c: 08008f00 .word 0x08008f00
|
||
|
||
08007170 <__lshift>:
|
||
8007170: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8007174: 460c mov r4, r1
|
||
8007176: 4607 mov r7, r0
|
||
8007178: 4691 mov r9, r2
|
||
800717a: 6923 ldr r3, [r4, #16]
|
||
800717c: 6849 ldr r1, [r1, #4]
|
||
800717e: eb03 1862 add.w r8, r3, r2, asr #5
|
||
8007182: 68a3 ldr r3, [r4, #8]
|
||
8007184: ea4f 1a62 mov.w sl, r2, asr #5
|
||
8007188: f108 0601 add.w r6, r8, #1
|
||
800718c: 42b3 cmp r3, r6
|
||
800718e: db0b blt.n 80071a8 <__lshift+0x38>
|
||
8007190: 4638 mov r0, r7
|
||
8007192: f7ff fddf bl 8006d54 <_Balloc>
|
||
8007196: 4605 mov r5, r0
|
||
8007198: b948 cbnz r0, 80071ae <__lshift+0x3e>
|
||
800719a: 4602 mov r2, r0
|
||
800719c: f240 11d9 movw r1, #473 ; 0x1d9
|
||
80071a0: 4b27 ldr r3, [pc, #156] ; (8007240 <__lshift+0xd0>)
|
||
80071a2: 4828 ldr r0, [pc, #160] ; (8007244 <__lshift+0xd4>)
|
||
80071a4: f000 fac2 bl 800772c <__assert_func>
|
||
80071a8: 3101 adds r1, #1
|
||
80071aa: 005b lsls r3, r3, #1
|
||
80071ac: e7ee b.n 800718c <__lshift+0x1c>
|
||
80071ae: 2300 movs r3, #0
|
||
80071b0: f100 0114 add.w r1, r0, #20
|
||
80071b4: f100 0210 add.w r2, r0, #16
|
||
80071b8: 4618 mov r0, r3
|
||
80071ba: 4553 cmp r3, sl
|
||
80071bc: db33 blt.n 8007226 <__lshift+0xb6>
|
||
80071be: 6920 ldr r0, [r4, #16]
|
||
80071c0: ea2a 7aea bic.w sl, sl, sl, asr #31
|
||
80071c4: f104 0314 add.w r3, r4, #20
|
||
80071c8: f019 091f ands.w r9, r9, #31
|
||
80071cc: eb01 018a add.w r1, r1, sl, lsl #2
|
||
80071d0: eb03 0c80 add.w ip, r3, r0, lsl #2
|
||
80071d4: d02b beq.n 800722e <__lshift+0xbe>
|
||
80071d6: 468a mov sl, r1
|
||
80071d8: 2200 movs r2, #0
|
||
80071da: f1c9 0e20 rsb lr, r9, #32
|
||
80071de: 6818 ldr r0, [r3, #0]
|
||
80071e0: fa00 f009 lsl.w r0, r0, r9
|
||
80071e4: 4302 orrs r2, r0
|
||
80071e6: f84a 2b04 str.w r2, [sl], #4
|
||
80071ea: f853 2b04 ldr.w r2, [r3], #4
|
||
80071ee: 459c cmp ip, r3
|
||
80071f0: fa22 f20e lsr.w r2, r2, lr
|
||
80071f4: d8f3 bhi.n 80071de <__lshift+0x6e>
|
||
80071f6: ebac 0304 sub.w r3, ip, r4
|
||
80071fa: 3b15 subs r3, #21
|
||
80071fc: f023 0303 bic.w r3, r3, #3
|
||
8007200: 3304 adds r3, #4
|
||
8007202: f104 0015 add.w r0, r4, #21
|
||
8007206: 4584 cmp ip, r0
|
||
8007208: bf38 it cc
|
||
800720a: 2304 movcc r3, #4
|
||
800720c: 50ca str r2, [r1, r3]
|
||
800720e: b10a cbz r2, 8007214 <__lshift+0xa4>
|
||
8007210: f108 0602 add.w r6, r8, #2
|
||
8007214: 3e01 subs r6, #1
|
||
8007216: 4638 mov r0, r7
|
||
8007218: 4621 mov r1, r4
|
||
800721a: 612e str r6, [r5, #16]
|
||
800721c: f7ff fdda bl 8006dd4 <_Bfree>
|
||
8007220: 4628 mov r0, r5
|
||
8007222: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8007226: f842 0f04 str.w r0, [r2, #4]!
|
||
800722a: 3301 adds r3, #1
|
||
800722c: e7c5 b.n 80071ba <__lshift+0x4a>
|
||
800722e: 3904 subs r1, #4
|
||
8007230: f853 2b04 ldr.w r2, [r3], #4
|
||
8007234: 459c cmp ip, r3
|
||
8007236: f841 2f04 str.w r2, [r1, #4]!
|
||
800723a: d8f9 bhi.n 8007230 <__lshift+0xc0>
|
||
800723c: e7ea b.n 8007214 <__lshift+0xa4>
|
||
800723e: bf00 nop
|
||
8007240: 08008eef .word 0x08008eef
|
||
8007244: 08008f00 .word 0x08008f00
|
||
|
||
08007248 <__mcmp>:
|
||
8007248: 4603 mov r3, r0
|
||
800724a: 690a ldr r2, [r1, #16]
|
||
800724c: 6900 ldr r0, [r0, #16]
|
||
800724e: b530 push {r4, r5, lr}
|
||
8007250: 1a80 subs r0, r0, r2
|
||
8007252: d10d bne.n 8007270 <__mcmp+0x28>
|
||
8007254: 3314 adds r3, #20
|
||
8007256: 3114 adds r1, #20
|
||
8007258: eb03 0482 add.w r4, r3, r2, lsl #2
|
||
800725c: eb01 0182 add.w r1, r1, r2, lsl #2
|
||
8007260: f854 5d04 ldr.w r5, [r4, #-4]!
|
||
8007264: f851 2d04 ldr.w r2, [r1, #-4]!
|
||
8007268: 4295 cmp r5, r2
|
||
800726a: d002 beq.n 8007272 <__mcmp+0x2a>
|
||
800726c: d304 bcc.n 8007278 <__mcmp+0x30>
|
||
800726e: 2001 movs r0, #1
|
||
8007270: bd30 pop {r4, r5, pc}
|
||
8007272: 42a3 cmp r3, r4
|
||
8007274: d3f4 bcc.n 8007260 <__mcmp+0x18>
|
||
8007276: e7fb b.n 8007270 <__mcmp+0x28>
|
||
8007278: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
800727c: e7f8 b.n 8007270 <__mcmp+0x28>
|
||
...
|
||
|
||
08007280 <__mdiff>:
|
||
8007280: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8007284: 460c mov r4, r1
|
||
8007286: 4606 mov r6, r0
|
||
8007288: 4611 mov r1, r2
|
||
800728a: 4620 mov r0, r4
|
||
800728c: 4692 mov sl, r2
|
||
800728e: f7ff ffdb bl 8007248 <__mcmp>
|
||
8007292: 1e05 subs r5, r0, #0
|
||
8007294: d111 bne.n 80072ba <__mdiff+0x3a>
|
||
8007296: 4629 mov r1, r5
|
||
8007298: 4630 mov r0, r6
|
||
800729a: f7ff fd5b bl 8006d54 <_Balloc>
|
||
800729e: 4602 mov r2, r0
|
||
80072a0: b928 cbnz r0, 80072ae <__mdiff+0x2e>
|
||
80072a2: f240 2132 movw r1, #562 ; 0x232
|
||
80072a6: 4b3c ldr r3, [pc, #240] ; (8007398 <__mdiff+0x118>)
|
||
80072a8: 483c ldr r0, [pc, #240] ; (800739c <__mdiff+0x11c>)
|
||
80072aa: f000 fa3f bl 800772c <__assert_func>
|
||
80072ae: 2301 movs r3, #1
|
||
80072b0: e9c0 3504 strd r3, r5, [r0, #16]
|
||
80072b4: 4610 mov r0, r2
|
||
80072b6: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
80072ba: bfa4 itt ge
|
||
80072bc: 4653 movge r3, sl
|
||
80072be: 46a2 movge sl, r4
|
||
80072c0: 4630 mov r0, r6
|
||
80072c2: f8da 1004 ldr.w r1, [sl, #4]
|
||
80072c6: bfa6 itte ge
|
||
80072c8: 461c movge r4, r3
|
||
80072ca: 2500 movge r5, #0
|
||
80072cc: 2501 movlt r5, #1
|
||
80072ce: f7ff fd41 bl 8006d54 <_Balloc>
|
||
80072d2: 4602 mov r2, r0
|
||
80072d4: b918 cbnz r0, 80072de <__mdiff+0x5e>
|
||
80072d6: f44f 7110 mov.w r1, #576 ; 0x240
|
||
80072da: 4b2f ldr r3, [pc, #188] ; (8007398 <__mdiff+0x118>)
|
||
80072dc: e7e4 b.n 80072a8 <__mdiff+0x28>
|
||
80072de: f100 0814 add.w r8, r0, #20
|
||
80072e2: f8da 7010 ldr.w r7, [sl, #16]
|
||
80072e6: 60c5 str r5, [r0, #12]
|
||
80072e8: f04f 0c00 mov.w ip, #0
|
||
80072ec: f10a 0514 add.w r5, sl, #20
|
||
80072f0: f10a 0010 add.w r0, sl, #16
|
||
80072f4: 46c2 mov sl, r8
|
||
80072f6: 6926 ldr r6, [r4, #16]
|
||
80072f8: f104 0914 add.w r9, r4, #20
|
||
80072fc: eb05 0e87 add.w lr, r5, r7, lsl #2
|
||
8007300: eb09 0686 add.w r6, r9, r6, lsl #2
|
||
8007304: f850 bf04 ldr.w fp, [r0, #4]!
|
||
8007308: f859 3b04 ldr.w r3, [r9], #4
|
||
800730c: fa1f f18b uxth.w r1, fp
|
||
8007310: 4461 add r1, ip
|
||
8007312: fa1f fc83 uxth.w ip, r3
|
||
8007316: 0c1b lsrs r3, r3, #16
|
||
8007318: eba1 010c sub.w r1, r1, ip
|
||
800731c: ebc3 431b rsb r3, r3, fp, lsr #16
|
||
8007320: eb03 4321 add.w r3, r3, r1, asr #16
|
||
8007324: b289 uxth r1, r1
|
||
8007326: ea4f 4c23 mov.w ip, r3, asr #16
|
||
800732a: 454e cmp r6, r9
|
||
800732c: ea41 4303 orr.w r3, r1, r3, lsl #16
|
||
8007330: f84a 3b04 str.w r3, [sl], #4
|
||
8007334: d8e6 bhi.n 8007304 <__mdiff+0x84>
|
||
8007336: 1b33 subs r3, r6, r4
|
||
8007338: 3b15 subs r3, #21
|
||
800733a: f023 0303 bic.w r3, r3, #3
|
||
800733e: 3415 adds r4, #21
|
||
8007340: 3304 adds r3, #4
|
||
8007342: 42a6 cmp r6, r4
|
||
8007344: bf38 it cc
|
||
8007346: 2304 movcc r3, #4
|
||
8007348: 441d add r5, r3
|
||
800734a: 4443 add r3, r8
|
||
800734c: 461e mov r6, r3
|
||
800734e: 462c mov r4, r5
|
||
8007350: 4574 cmp r4, lr
|
||
8007352: d30e bcc.n 8007372 <__mdiff+0xf2>
|
||
8007354: f10e 0103 add.w r1, lr, #3
|
||
8007358: 1b49 subs r1, r1, r5
|
||
800735a: f021 0103 bic.w r1, r1, #3
|
||
800735e: 3d03 subs r5, #3
|
||
8007360: 45ae cmp lr, r5
|
||
8007362: bf38 it cc
|
||
8007364: 2100 movcc r1, #0
|
||
8007366: 4419 add r1, r3
|
||
8007368: f851 3d04 ldr.w r3, [r1, #-4]!
|
||
800736c: b18b cbz r3, 8007392 <__mdiff+0x112>
|
||
800736e: 6117 str r7, [r2, #16]
|
||
8007370: e7a0 b.n 80072b4 <__mdiff+0x34>
|
||
8007372: f854 8b04 ldr.w r8, [r4], #4
|
||
8007376: fa1f f188 uxth.w r1, r8
|
||
800737a: 4461 add r1, ip
|
||
800737c: 1408 asrs r0, r1, #16
|
||
800737e: eb00 4018 add.w r0, r0, r8, lsr #16
|
||
8007382: b289 uxth r1, r1
|
||
8007384: ea41 4100 orr.w r1, r1, r0, lsl #16
|
||
8007388: ea4f 4c20 mov.w ip, r0, asr #16
|
||
800738c: f846 1b04 str.w r1, [r6], #4
|
||
8007390: e7de b.n 8007350 <__mdiff+0xd0>
|
||
8007392: 3f01 subs r7, #1
|
||
8007394: e7e8 b.n 8007368 <__mdiff+0xe8>
|
||
8007396: bf00 nop
|
||
8007398: 08008eef .word 0x08008eef
|
||
800739c: 08008f00 .word 0x08008f00
|
||
|
||
080073a0 <__d2b>:
|
||
80073a0: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
|
||
80073a4: 2101 movs r1, #1
|
||
80073a6: e9dd 7608 ldrd r7, r6, [sp, #32]
|
||
80073aa: 4690 mov r8, r2
|
||
80073ac: 461d mov r5, r3
|
||
80073ae: f7ff fcd1 bl 8006d54 <_Balloc>
|
||
80073b2: 4604 mov r4, r0
|
||
80073b4: b930 cbnz r0, 80073c4 <__d2b+0x24>
|
||
80073b6: 4602 mov r2, r0
|
||
80073b8: f240 310a movw r1, #778 ; 0x30a
|
||
80073bc: 4b24 ldr r3, [pc, #144] ; (8007450 <__d2b+0xb0>)
|
||
80073be: 4825 ldr r0, [pc, #148] ; (8007454 <__d2b+0xb4>)
|
||
80073c0: f000 f9b4 bl 800772c <__assert_func>
|
||
80073c4: f3c5 0313 ubfx r3, r5, #0, #20
|
||
80073c8: f3c5 550a ubfx r5, r5, #20, #11
|
||
80073cc: bb2d cbnz r5, 800741a <__d2b+0x7a>
|
||
80073ce: 9301 str r3, [sp, #4]
|
||
80073d0: f1b8 0300 subs.w r3, r8, #0
|
||
80073d4: d026 beq.n 8007424 <__d2b+0x84>
|
||
80073d6: 4668 mov r0, sp
|
||
80073d8: 9300 str r3, [sp, #0]
|
||
80073da: f7ff fd87 bl 8006eec <__lo0bits>
|
||
80073de: 9900 ldr r1, [sp, #0]
|
||
80073e0: b1f0 cbz r0, 8007420 <__d2b+0x80>
|
||
80073e2: 9a01 ldr r2, [sp, #4]
|
||
80073e4: f1c0 0320 rsb r3, r0, #32
|
||
80073e8: fa02 f303 lsl.w r3, r2, r3
|
||
80073ec: 430b orrs r3, r1
|
||
80073ee: 40c2 lsrs r2, r0
|
||
80073f0: 6163 str r3, [r4, #20]
|
||
80073f2: 9201 str r2, [sp, #4]
|
||
80073f4: 9b01 ldr r3, [sp, #4]
|
||
80073f6: 2b00 cmp r3, #0
|
||
80073f8: bf14 ite ne
|
||
80073fa: 2102 movne r1, #2
|
||
80073fc: 2101 moveq r1, #1
|
||
80073fe: 61a3 str r3, [r4, #24]
|
||
8007400: 6121 str r1, [r4, #16]
|
||
8007402: b1c5 cbz r5, 8007436 <__d2b+0x96>
|
||
8007404: f2a5 4533 subw r5, r5, #1075 ; 0x433
|
||
8007408: 4405 add r5, r0
|
||
800740a: f1c0 0035 rsb r0, r0, #53 ; 0x35
|
||
800740e: 603d str r5, [r7, #0]
|
||
8007410: 6030 str r0, [r6, #0]
|
||
8007412: 4620 mov r0, r4
|
||
8007414: b002 add sp, #8
|
||
8007416: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
||
800741a: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
|
||
800741e: e7d6 b.n 80073ce <__d2b+0x2e>
|
||
8007420: 6161 str r1, [r4, #20]
|
||
8007422: e7e7 b.n 80073f4 <__d2b+0x54>
|
||
8007424: a801 add r0, sp, #4
|
||
8007426: f7ff fd61 bl 8006eec <__lo0bits>
|
||
800742a: 2101 movs r1, #1
|
||
800742c: 9b01 ldr r3, [sp, #4]
|
||
800742e: 6121 str r1, [r4, #16]
|
||
8007430: 6163 str r3, [r4, #20]
|
||
8007432: 3020 adds r0, #32
|
||
8007434: e7e5 b.n 8007402 <__d2b+0x62>
|
||
8007436: eb04 0381 add.w r3, r4, r1, lsl #2
|
||
800743a: f2a0 4032 subw r0, r0, #1074 ; 0x432
|
||
800743e: 6038 str r0, [r7, #0]
|
||
8007440: 6918 ldr r0, [r3, #16]
|
||
8007442: f7ff fd33 bl 8006eac <__hi0bits>
|
||
8007446: ebc0 1141 rsb r1, r0, r1, lsl #5
|
||
800744a: 6031 str r1, [r6, #0]
|
||
800744c: e7e1 b.n 8007412 <__d2b+0x72>
|
||
800744e: bf00 nop
|
||
8007450: 08008eef .word 0x08008eef
|
||
8007454: 08008f00 .word 0x08008f00
|
||
|
||
08007458 <_calloc_r>:
|
||
8007458: b538 push {r3, r4, r5, lr}
|
||
800745a: fb02 f501 mul.w r5, r2, r1
|
||
800745e: 4629 mov r1, r5
|
||
8007460: f7fe f8e4 bl 800562c <_malloc_r>
|
||
8007464: 4604 mov r4, r0
|
||
8007466: b118 cbz r0, 8007470 <_calloc_r+0x18>
|
||
8007468: 462a mov r2, r5
|
||
800746a: 2100 movs r1, #0
|
||
800746c: f7fe f88a bl 8005584 <memset>
|
||
8007470: 4620 mov r0, r4
|
||
8007472: bd38 pop {r3, r4, r5, pc}
|
||
|
||
08007474 <__ssputs_r>:
|
||
8007474: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8007478: 688e ldr r6, [r1, #8]
|
||
800747a: 4682 mov sl, r0
|
||
800747c: 429e cmp r6, r3
|
||
800747e: 460c mov r4, r1
|
||
8007480: 4690 mov r8, r2
|
||
8007482: 461f mov r7, r3
|
||
8007484: d838 bhi.n 80074f8 <__ssputs_r+0x84>
|
||
8007486: 898a ldrh r2, [r1, #12]
|
||
8007488: f412 6f90 tst.w r2, #1152 ; 0x480
|
||
800748c: d032 beq.n 80074f4 <__ssputs_r+0x80>
|
||
800748e: 6825 ldr r5, [r4, #0]
|
||
8007490: 6909 ldr r1, [r1, #16]
|
||
8007492: 3301 adds r3, #1
|
||
8007494: eba5 0901 sub.w r9, r5, r1
|
||
8007498: 6965 ldr r5, [r4, #20]
|
||
800749a: 444b add r3, r9
|
||
800749c: eb05 0545 add.w r5, r5, r5, lsl #1
|
||
80074a0: eb05 75d5 add.w r5, r5, r5, lsr #31
|
||
80074a4: 106d asrs r5, r5, #1
|
||
80074a6: 429d cmp r5, r3
|
||
80074a8: bf38 it cc
|
||
80074aa: 461d movcc r5, r3
|
||
80074ac: 0553 lsls r3, r2, #21
|
||
80074ae: d531 bpl.n 8007514 <__ssputs_r+0xa0>
|
||
80074b0: 4629 mov r1, r5
|
||
80074b2: f7fe f8bb bl 800562c <_malloc_r>
|
||
80074b6: 4606 mov r6, r0
|
||
80074b8: b950 cbnz r0, 80074d0 <__ssputs_r+0x5c>
|
||
80074ba: 230c movs r3, #12
|
||
80074bc: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
80074c0: f8ca 3000 str.w r3, [sl]
|
||
80074c4: 89a3 ldrh r3, [r4, #12]
|
||
80074c6: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
80074ca: 81a3 strh r3, [r4, #12]
|
||
80074cc: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
80074d0: 464a mov r2, r9
|
||
80074d2: 6921 ldr r1, [r4, #16]
|
||
80074d4: f7ff fc24 bl 8006d20 <memcpy>
|
||
80074d8: 89a3 ldrh r3, [r4, #12]
|
||
80074da: f423 6390 bic.w r3, r3, #1152 ; 0x480
|
||
80074de: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
80074e2: 81a3 strh r3, [r4, #12]
|
||
80074e4: 6126 str r6, [r4, #16]
|
||
80074e6: 444e add r6, r9
|
||
80074e8: 6026 str r6, [r4, #0]
|
||
80074ea: 463e mov r6, r7
|
||
80074ec: 6165 str r5, [r4, #20]
|
||
80074ee: eba5 0509 sub.w r5, r5, r9
|
||
80074f2: 60a5 str r5, [r4, #8]
|
||
80074f4: 42be cmp r6, r7
|
||
80074f6: d900 bls.n 80074fa <__ssputs_r+0x86>
|
||
80074f8: 463e mov r6, r7
|
||
80074fa: 4632 mov r2, r6
|
||
80074fc: 4641 mov r1, r8
|
||
80074fe: 6820 ldr r0, [r4, #0]
|
||
8007500: f000 f959 bl 80077b6 <memmove>
|
||
8007504: 68a3 ldr r3, [r4, #8]
|
||
8007506: 6822 ldr r2, [r4, #0]
|
||
8007508: 1b9b subs r3, r3, r6
|
||
800750a: 4432 add r2, r6
|
||
800750c: 2000 movs r0, #0
|
||
800750e: 60a3 str r3, [r4, #8]
|
||
8007510: 6022 str r2, [r4, #0]
|
||
8007512: e7db b.n 80074cc <__ssputs_r+0x58>
|
||
8007514: 462a mov r2, r5
|
||
8007516: f000 f968 bl 80077ea <_realloc_r>
|
||
800751a: 4606 mov r6, r0
|
||
800751c: 2800 cmp r0, #0
|
||
800751e: d1e1 bne.n 80074e4 <__ssputs_r+0x70>
|
||
8007520: 4650 mov r0, sl
|
||
8007522: 6921 ldr r1, [r4, #16]
|
||
8007524: f7fe f836 bl 8005594 <_free_r>
|
||
8007528: e7c7 b.n 80074ba <__ssputs_r+0x46>
|
||
...
|
||
|
||
0800752c <_svfiprintf_r>:
|
||
800752c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8007530: 4698 mov r8, r3
|
||
8007532: 898b ldrh r3, [r1, #12]
|
||
8007534: 4607 mov r7, r0
|
||
8007536: 061b lsls r3, r3, #24
|
||
8007538: 460d mov r5, r1
|
||
800753a: 4614 mov r4, r2
|
||
800753c: b09d sub sp, #116 ; 0x74
|
||
800753e: d50e bpl.n 800755e <_svfiprintf_r+0x32>
|
||
8007540: 690b ldr r3, [r1, #16]
|
||
8007542: b963 cbnz r3, 800755e <_svfiprintf_r+0x32>
|
||
8007544: 2140 movs r1, #64 ; 0x40
|
||
8007546: f7fe f871 bl 800562c <_malloc_r>
|
||
800754a: 6028 str r0, [r5, #0]
|
||
800754c: 6128 str r0, [r5, #16]
|
||
800754e: b920 cbnz r0, 800755a <_svfiprintf_r+0x2e>
|
||
8007550: 230c movs r3, #12
|
||
8007552: 603b str r3, [r7, #0]
|
||
8007554: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8007558: e0d1 b.n 80076fe <_svfiprintf_r+0x1d2>
|
||
800755a: 2340 movs r3, #64 ; 0x40
|
||
800755c: 616b str r3, [r5, #20]
|
||
800755e: 2300 movs r3, #0
|
||
8007560: 9309 str r3, [sp, #36] ; 0x24
|
||
8007562: 2320 movs r3, #32
|
||
8007564: f88d 3029 strb.w r3, [sp, #41] ; 0x29
|
||
8007568: 2330 movs r3, #48 ; 0x30
|
||
800756a: f04f 0901 mov.w r9, #1
|
||
800756e: f8cd 800c str.w r8, [sp, #12]
|
||
8007572: f8df 81a4 ldr.w r8, [pc, #420] ; 8007718 <_svfiprintf_r+0x1ec>
|
||
8007576: f88d 302a strb.w r3, [sp, #42] ; 0x2a
|
||
800757a: 4623 mov r3, r4
|
||
800757c: 469a mov sl, r3
|
||
800757e: f813 2b01 ldrb.w r2, [r3], #1
|
||
8007582: b10a cbz r2, 8007588 <_svfiprintf_r+0x5c>
|
||
8007584: 2a25 cmp r2, #37 ; 0x25
|
||
8007586: d1f9 bne.n 800757c <_svfiprintf_r+0x50>
|
||
8007588: ebba 0b04 subs.w fp, sl, r4
|
||
800758c: d00b beq.n 80075a6 <_svfiprintf_r+0x7a>
|
||
800758e: 465b mov r3, fp
|
||
8007590: 4622 mov r2, r4
|
||
8007592: 4629 mov r1, r5
|
||
8007594: 4638 mov r0, r7
|
||
8007596: f7ff ff6d bl 8007474 <__ssputs_r>
|
||
800759a: 3001 adds r0, #1
|
||
800759c: f000 80aa beq.w 80076f4 <_svfiprintf_r+0x1c8>
|
||
80075a0: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
80075a2: 445a add r2, fp
|
||
80075a4: 9209 str r2, [sp, #36] ; 0x24
|
||
80075a6: f89a 3000 ldrb.w r3, [sl]
|
||
80075aa: 2b00 cmp r3, #0
|
||
80075ac: f000 80a2 beq.w 80076f4 <_svfiprintf_r+0x1c8>
|
||
80075b0: 2300 movs r3, #0
|
||
80075b2: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
80075b6: e9cd 2305 strd r2, r3, [sp, #20]
|
||
80075ba: f10a 0a01 add.w sl, sl, #1
|
||
80075be: 9304 str r3, [sp, #16]
|
||
80075c0: 9307 str r3, [sp, #28]
|
||
80075c2: f88d 3053 strb.w r3, [sp, #83] ; 0x53
|
||
80075c6: 931a str r3, [sp, #104] ; 0x68
|
||
80075c8: 4654 mov r4, sl
|
||
80075ca: 2205 movs r2, #5
|
||
80075cc: f814 1b01 ldrb.w r1, [r4], #1
|
||
80075d0: 4851 ldr r0, [pc, #324] ; (8007718 <_svfiprintf_r+0x1ec>)
|
||
80075d2: f7ff fb97 bl 8006d04 <memchr>
|
||
80075d6: 9a04 ldr r2, [sp, #16]
|
||
80075d8: b9d8 cbnz r0, 8007612 <_svfiprintf_r+0xe6>
|
||
80075da: 06d0 lsls r0, r2, #27
|
||
80075dc: bf44 itt mi
|
||
80075de: 2320 movmi r3, #32
|
||
80075e0: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
80075e4: 0711 lsls r1, r2, #28
|
||
80075e6: bf44 itt mi
|
||
80075e8: 232b movmi r3, #43 ; 0x2b
|
||
80075ea: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
80075ee: f89a 3000 ldrb.w r3, [sl]
|
||
80075f2: 2b2a cmp r3, #42 ; 0x2a
|
||
80075f4: d015 beq.n 8007622 <_svfiprintf_r+0xf6>
|
||
80075f6: 4654 mov r4, sl
|
||
80075f8: 2000 movs r0, #0
|
||
80075fa: f04f 0c0a mov.w ip, #10
|
||
80075fe: 9a07 ldr r2, [sp, #28]
|
||
8007600: 4621 mov r1, r4
|
||
8007602: f811 3b01 ldrb.w r3, [r1], #1
|
||
8007606: 3b30 subs r3, #48 ; 0x30
|
||
8007608: 2b09 cmp r3, #9
|
||
800760a: d94e bls.n 80076aa <_svfiprintf_r+0x17e>
|
||
800760c: b1b0 cbz r0, 800763c <_svfiprintf_r+0x110>
|
||
800760e: 9207 str r2, [sp, #28]
|
||
8007610: e014 b.n 800763c <_svfiprintf_r+0x110>
|
||
8007612: eba0 0308 sub.w r3, r0, r8
|
||
8007616: fa09 f303 lsl.w r3, r9, r3
|
||
800761a: 4313 orrs r3, r2
|
||
800761c: 46a2 mov sl, r4
|
||
800761e: 9304 str r3, [sp, #16]
|
||
8007620: e7d2 b.n 80075c8 <_svfiprintf_r+0x9c>
|
||
8007622: 9b03 ldr r3, [sp, #12]
|
||
8007624: 1d19 adds r1, r3, #4
|
||
8007626: 681b ldr r3, [r3, #0]
|
||
8007628: 9103 str r1, [sp, #12]
|
||
800762a: 2b00 cmp r3, #0
|
||
800762c: bfbb ittet lt
|
||
800762e: 425b neglt r3, r3
|
||
8007630: f042 0202 orrlt.w r2, r2, #2
|
||
8007634: 9307 strge r3, [sp, #28]
|
||
8007636: 9307 strlt r3, [sp, #28]
|
||
8007638: bfb8 it lt
|
||
800763a: 9204 strlt r2, [sp, #16]
|
||
800763c: 7823 ldrb r3, [r4, #0]
|
||
800763e: 2b2e cmp r3, #46 ; 0x2e
|
||
8007640: d10c bne.n 800765c <_svfiprintf_r+0x130>
|
||
8007642: 7863 ldrb r3, [r4, #1]
|
||
8007644: 2b2a cmp r3, #42 ; 0x2a
|
||
8007646: d135 bne.n 80076b4 <_svfiprintf_r+0x188>
|
||
8007648: 9b03 ldr r3, [sp, #12]
|
||
800764a: 3402 adds r4, #2
|
||
800764c: 1d1a adds r2, r3, #4
|
||
800764e: 681b ldr r3, [r3, #0]
|
||
8007650: 9203 str r2, [sp, #12]
|
||
8007652: 2b00 cmp r3, #0
|
||
8007654: bfb8 it lt
|
||
8007656: f04f 33ff movlt.w r3, #4294967295 ; 0xffffffff
|
||
800765a: 9305 str r3, [sp, #20]
|
||
800765c: f8df a0c8 ldr.w sl, [pc, #200] ; 8007728 <_svfiprintf_r+0x1fc>
|
||
8007660: 2203 movs r2, #3
|
||
8007662: 4650 mov r0, sl
|
||
8007664: 7821 ldrb r1, [r4, #0]
|
||
8007666: f7ff fb4d bl 8006d04 <memchr>
|
||
800766a: b140 cbz r0, 800767e <_svfiprintf_r+0x152>
|
||
800766c: 2340 movs r3, #64 ; 0x40
|
||
800766e: eba0 000a sub.w r0, r0, sl
|
||
8007672: fa03 f000 lsl.w r0, r3, r0
|
||
8007676: 9b04 ldr r3, [sp, #16]
|
||
8007678: 3401 adds r4, #1
|
||
800767a: 4303 orrs r3, r0
|
||
800767c: 9304 str r3, [sp, #16]
|
||
800767e: f814 1b01 ldrb.w r1, [r4], #1
|
||
8007682: 2206 movs r2, #6
|
||
8007684: 4825 ldr r0, [pc, #148] ; (800771c <_svfiprintf_r+0x1f0>)
|
||
8007686: f88d 1028 strb.w r1, [sp, #40] ; 0x28
|
||
800768a: f7ff fb3b bl 8006d04 <memchr>
|
||
800768e: 2800 cmp r0, #0
|
||
8007690: d038 beq.n 8007704 <_svfiprintf_r+0x1d8>
|
||
8007692: 4b23 ldr r3, [pc, #140] ; (8007720 <_svfiprintf_r+0x1f4>)
|
||
8007694: bb1b cbnz r3, 80076de <_svfiprintf_r+0x1b2>
|
||
8007696: 9b03 ldr r3, [sp, #12]
|
||
8007698: 3307 adds r3, #7
|
||
800769a: f023 0307 bic.w r3, r3, #7
|
||
800769e: 3308 adds r3, #8
|
||
80076a0: 9303 str r3, [sp, #12]
|
||
80076a2: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
80076a4: 4433 add r3, r6
|
||
80076a6: 9309 str r3, [sp, #36] ; 0x24
|
||
80076a8: e767 b.n 800757a <_svfiprintf_r+0x4e>
|
||
80076aa: 460c mov r4, r1
|
||
80076ac: 2001 movs r0, #1
|
||
80076ae: fb0c 3202 mla r2, ip, r2, r3
|
||
80076b2: e7a5 b.n 8007600 <_svfiprintf_r+0xd4>
|
||
80076b4: 2300 movs r3, #0
|
||
80076b6: f04f 0c0a mov.w ip, #10
|
||
80076ba: 4619 mov r1, r3
|
||
80076bc: 3401 adds r4, #1
|
||
80076be: 9305 str r3, [sp, #20]
|
||
80076c0: 4620 mov r0, r4
|
||
80076c2: f810 2b01 ldrb.w r2, [r0], #1
|
||
80076c6: 3a30 subs r2, #48 ; 0x30
|
||
80076c8: 2a09 cmp r2, #9
|
||
80076ca: d903 bls.n 80076d4 <_svfiprintf_r+0x1a8>
|
||
80076cc: 2b00 cmp r3, #0
|
||
80076ce: d0c5 beq.n 800765c <_svfiprintf_r+0x130>
|
||
80076d0: 9105 str r1, [sp, #20]
|
||
80076d2: e7c3 b.n 800765c <_svfiprintf_r+0x130>
|
||
80076d4: 4604 mov r4, r0
|
||
80076d6: 2301 movs r3, #1
|
||
80076d8: fb0c 2101 mla r1, ip, r1, r2
|
||
80076dc: e7f0 b.n 80076c0 <_svfiprintf_r+0x194>
|
||
80076de: ab03 add r3, sp, #12
|
||
80076e0: 9300 str r3, [sp, #0]
|
||
80076e2: 462a mov r2, r5
|
||
80076e4: 4638 mov r0, r7
|
||
80076e6: 4b0f ldr r3, [pc, #60] ; (8007724 <_svfiprintf_r+0x1f8>)
|
||
80076e8: a904 add r1, sp, #16
|
||
80076ea: f7fe f897 bl 800581c <_printf_float>
|
||
80076ee: 1c42 adds r2, r0, #1
|
||
80076f0: 4606 mov r6, r0
|
||
80076f2: d1d6 bne.n 80076a2 <_svfiprintf_r+0x176>
|
||
80076f4: 89ab ldrh r3, [r5, #12]
|
||
80076f6: 065b lsls r3, r3, #25
|
||
80076f8: f53f af2c bmi.w 8007554 <_svfiprintf_r+0x28>
|
||
80076fc: 9809 ldr r0, [sp, #36] ; 0x24
|
||
80076fe: b01d add sp, #116 ; 0x74
|
||
8007700: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8007704: ab03 add r3, sp, #12
|
||
8007706: 9300 str r3, [sp, #0]
|
||
8007708: 462a mov r2, r5
|
||
800770a: 4638 mov r0, r7
|
||
800770c: 4b05 ldr r3, [pc, #20] ; (8007724 <_svfiprintf_r+0x1f8>)
|
||
800770e: a904 add r1, sp, #16
|
||
8007710: f7fe fb20 bl 8005d54 <_printf_i>
|
||
8007714: e7eb b.n 80076ee <_svfiprintf_r+0x1c2>
|
||
8007716: bf00 nop
|
||
8007718: 0800905c .word 0x0800905c
|
||
800771c: 08009066 .word 0x08009066
|
||
8007720: 0800581d .word 0x0800581d
|
||
8007724: 08007475 .word 0x08007475
|
||
8007728: 08009062 .word 0x08009062
|
||
|
||
0800772c <__assert_func>:
|
||
800772c: b51f push {r0, r1, r2, r3, r4, lr}
|
||
800772e: 4614 mov r4, r2
|
||
8007730: 461a mov r2, r3
|
||
8007732: 4b09 ldr r3, [pc, #36] ; (8007758 <__assert_func+0x2c>)
|
||
8007734: 4605 mov r5, r0
|
||
8007736: 681b ldr r3, [r3, #0]
|
||
8007738: 68d8 ldr r0, [r3, #12]
|
||
800773a: b14c cbz r4, 8007750 <__assert_func+0x24>
|
||
800773c: 4b07 ldr r3, [pc, #28] ; (800775c <__assert_func+0x30>)
|
||
800773e: e9cd 3401 strd r3, r4, [sp, #4]
|
||
8007742: 9100 str r1, [sp, #0]
|
||
8007744: 462b mov r3, r5
|
||
8007746: 4906 ldr r1, [pc, #24] ; (8007760 <__assert_func+0x34>)
|
||
8007748: f000 f80e bl 8007768 <fiprintf>
|
||
800774c: f000 fa98 bl 8007c80 <abort>
|
||
8007750: 4b04 ldr r3, [pc, #16] ; (8007764 <__assert_func+0x38>)
|
||
8007752: 461c mov r4, r3
|
||
8007754: e7f3 b.n 800773e <__assert_func+0x12>
|
||
8007756: bf00 nop
|
||
8007758: 2000000c .word 0x2000000c
|
||
800775c: 0800906d .word 0x0800906d
|
||
8007760: 0800907a .word 0x0800907a
|
||
8007764: 080090a8 .word 0x080090a8
|
||
|
||
08007768 <fiprintf>:
|
||
8007768: b40e push {r1, r2, r3}
|
||
800776a: b503 push {r0, r1, lr}
|
||
800776c: 4601 mov r1, r0
|
||
800776e: ab03 add r3, sp, #12
|
||
8007770: 4805 ldr r0, [pc, #20] ; (8007788 <fiprintf+0x20>)
|
||
8007772: f853 2b04 ldr.w r2, [r3], #4
|
||
8007776: 6800 ldr r0, [r0, #0]
|
||
8007778: 9301 str r3, [sp, #4]
|
||
800777a: f000 f883 bl 8007884 <_vfiprintf_r>
|
||
800777e: b002 add sp, #8
|
||
8007780: f85d eb04 ldr.w lr, [sp], #4
|
||
8007784: b003 add sp, #12
|
||
8007786: 4770 bx lr
|
||
8007788: 2000000c .word 0x2000000c
|
||
|
||
0800778c <__retarget_lock_init_recursive>:
|
||
800778c: 4770 bx lr
|
||
|
||
0800778e <__retarget_lock_acquire_recursive>:
|
||
800778e: 4770 bx lr
|
||
|
||
08007790 <__retarget_lock_release_recursive>:
|
||
8007790: 4770 bx lr
|
||
|
||
08007792 <__ascii_mbtowc>:
|
||
8007792: b082 sub sp, #8
|
||
8007794: b901 cbnz r1, 8007798 <__ascii_mbtowc+0x6>
|
||
8007796: a901 add r1, sp, #4
|
||
8007798: b142 cbz r2, 80077ac <__ascii_mbtowc+0x1a>
|
||
800779a: b14b cbz r3, 80077b0 <__ascii_mbtowc+0x1e>
|
||
800779c: 7813 ldrb r3, [r2, #0]
|
||
800779e: 600b str r3, [r1, #0]
|
||
80077a0: 7812 ldrb r2, [r2, #0]
|
||
80077a2: 1e10 subs r0, r2, #0
|
||
80077a4: bf18 it ne
|
||
80077a6: 2001 movne r0, #1
|
||
80077a8: b002 add sp, #8
|
||
80077aa: 4770 bx lr
|
||
80077ac: 4610 mov r0, r2
|
||
80077ae: e7fb b.n 80077a8 <__ascii_mbtowc+0x16>
|
||
80077b0: f06f 0001 mvn.w r0, #1
|
||
80077b4: e7f8 b.n 80077a8 <__ascii_mbtowc+0x16>
|
||
|
||
080077b6 <memmove>:
|
||
80077b6: 4288 cmp r0, r1
|
||
80077b8: b510 push {r4, lr}
|
||
80077ba: eb01 0402 add.w r4, r1, r2
|
||
80077be: d902 bls.n 80077c6 <memmove+0x10>
|
||
80077c0: 4284 cmp r4, r0
|
||
80077c2: 4623 mov r3, r4
|
||
80077c4: d807 bhi.n 80077d6 <memmove+0x20>
|
||
80077c6: 1e43 subs r3, r0, #1
|
||
80077c8: 42a1 cmp r1, r4
|
||
80077ca: d008 beq.n 80077de <memmove+0x28>
|
||
80077cc: f811 2b01 ldrb.w r2, [r1], #1
|
||
80077d0: f803 2f01 strb.w r2, [r3, #1]!
|
||
80077d4: e7f8 b.n 80077c8 <memmove+0x12>
|
||
80077d6: 4601 mov r1, r0
|
||
80077d8: 4402 add r2, r0
|
||
80077da: 428a cmp r2, r1
|
||
80077dc: d100 bne.n 80077e0 <memmove+0x2a>
|
||
80077de: bd10 pop {r4, pc}
|
||
80077e0: f813 4d01 ldrb.w r4, [r3, #-1]!
|
||
80077e4: f802 4d01 strb.w r4, [r2, #-1]!
|
||
80077e8: e7f7 b.n 80077da <memmove+0x24>
|
||
|
||
080077ea <_realloc_r>:
|
||
80077ea: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
80077ec: 4607 mov r7, r0
|
||
80077ee: 4614 mov r4, r2
|
||
80077f0: 460e mov r6, r1
|
||
80077f2: b921 cbnz r1, 80077fe <_realloc_r+0x14>
|
||
80077f4: 4611 mov r1, r2
|
||
80077f6: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr}
|
||
80077fa: f7fd bf17 b.w 800562c <_malloc_r>
|
||
80077fe: b922 cbnz r2, 800780a <_realloc_r+0x20>
|
||
8007800: f7fd fec8 bl 8005594 <_free_r>
|
||
8007804: 4625 mov r5, r4
|
||
8007806: 4628 mov r0, r5
|
||
8007808: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
800780a: f000 fc5d bl 80080c8 <_malloc_usable_size_r>
|
||
800780e: 42a0 cmp r0, r4
|
||
8007810: d20f bcs.n 8007832 <_realloc_r+0x48>
|
||
8007812: 4621 mov r1, r4
|
||
8007814: 4638 mov r0, r7
|
||
8007816: f7fd ff09 bl 800562c <_malloc_r>
|
||
800781a: 4605 mov r5, r0
|
||
800781c: 2800 cmp r0, #0
|
||
800781e: d0f2 beq.n 8007806 <_realloc_r+0x1c>
|
||
8007820: 4631 mov r1, r6
|
||
8007822: 4622 mov r2, r4
|
||
8007824: f7ff fa7c bl 8006d20 <memcpy>
|
||
8007828: 4631 mov r1, r6
|
||
800782a: 4638 mov r0, r7
|
||
800782c: f7fd feb2 bl 8005594 <_free_r>
|
||
8007830: e7e9 b.n 8007806 <_realloc_r+0x1c>
|
||
8007832: 4635 mov r5, r6
|
||
8007834: e7e7 b.n 8007806 <_realloc_r+0x1c>
|
||
|
||
08007836 <__sfputc_r>:
|
||
8007836: 6893 ldr r3, [r2, #8]
|
||
8007838: b410 push {r4}
|
||
800783a: 3b01 subs r3, #1
|
||
800783c: 2b00 cmp r3, #0
|
||
800783e: 6093 str r3, [r2, #8]
|
||
8007840: da07 bge.n 8007852 <__sfputc_r+0x1c>
|
||
8007842: 6994 ldr r4, [r2, #24]
|
||
8007844: 42a3 cmp r3, r4
|
||
8007846: db01 blt.n 800784c <__sfputc_r+0x16>
|
||
8007848: 290a cmp r1, #10
|
||
800784a: d102 bne.n 8007852 <__sfputc_r+0x1c>
|
||
800784c: bc10 pop {r4}
|
||
800784e: f000 b949 b.w 8007ae4 <__swbuf_r>
|
||
8007852: 6813 ldr r3, [r2, #0]
|
||
8007854: 1c58 adds r0, r3, #1
|
||
8007856: 6010 str r0, [r2, #0]
|
||
8007858: 7019 strb r1, [r3, #0]
|
||
800785a: 4608 mov r0, r1
|
||
800785c: bc10 pop {r4}
|
||
800785e: 4770 bx lr
|
||
|
||
08007860 <__sfputs_r>:
|
||
8007860: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8007862: 4606 mov r6, r0
|
||
8007864: 460f mov r7, r1
|
||
8007866: 4614 mov r4, r2
|
||
8007868: 18d5 adds r5, r2, r3
|
||
800786a: 42ac cmp r4, r5
|
||
800786c: d101 bne.n 8007872 <__sfputs_r+0x12>
|
||
800786e: 2000 movs r0, #0
|
||
8007870: e007 b.n 8007882 <__sfputs_r+0x22>
|
||
8007872: 463a mov r2, r7
|
||
8007874: 4630 mov r0, r6
|
||
8007876: f814 1b01 ldrb.w r1, [r4], #1
|
||
800787a: f7ff ffdc bl 8007836 <__sfputc_r>
|
||
800787e: 1c43 adds r3, r0, #1
|
||
8007880: d1f3 bne.n 800786a <__sfputs_r+0xa>
|
||
8007882: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
|
||
08007884 <_vfiprintf_r>:
|
||
8007884: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8007888: 460d mov r5, r1
|
||
800788a: 4614 mov r4, r2
|
||
800788c: 4698 mov r8, r3
|
||
800788e: 4606 mov r6, r0
|
||
8007890: b09d sub sp, #116 ; 0x74
|
||
8007892: b118 cbz r0, 800789c <_vfiprintf_r+0x18>
|
||
8007894: 6983 ldr r3, [r0, #24]
|
||
8007896: b90b cbnz r3, 800789c <_vfiprintf_r+0x18>
|
||
8007898: f000 fb14 bl 8007ec4 <__sinit>
|
||
800789c: 4b89 ldr r3, [pc, #548] ; (8007ac4 <_vfiprintf_r+0x240>)
|
||
800789e: 429d cmp r5, r3
|
||
80078a0: d11b bne.n 80078da <_vfiprintf_r+0x56>
|
||
80078a2: 6875 ldr r5, [r6, #4]
|
||
80078a4: 6e6b ldr r3, [r5, #100] ; 0x64
|
||
80078a6: 07d9 lsls r1, r3, #31
|
||
80078a8: d405 bmi.n 80078b6 <_vfiprintf_r+0x32>
|
||
80078aa: 89ab ldrh r3, [r5, #12]
|
||
80078ac: 059a lsls r2, r3, #22
|
||
80078ae: d402 bmi.n 80078b6 <_vfiprintf_r+0x32>
|
||
80078b0: 6da8 ldr r0, [r5, #88] ; 0x58
|
||
80078b2: f7ff ff6c bl 800778e <__retarget_lock_acquire_recursive>
|
||
80078b6: 89ab ldrh r3, [r5, #12]
|
||
80078b8: 071b lsls r3, r3, #28
|
||
80078ba: d501 bpl.n 80078c0 <_vfiprintf_r+0x3c>
|
||
80078bc: 692b ldr r3, [r5, #16]
|
||
80078be: b9eb cbnz r3, 80078fc <_vfiprintf_r+0x78>
|
||
80078c0: 4629 mov r1, r5
|
||
80078c2: 4630 mov r0, r6
|
||
80078c4: f000 f96e bl 8007ba4 <__swsetup_r>
|
||
80078c8: b1c0 cbz r0, 80078fc <_vfiprintf_r+0x78>
|
||
80078ca: 6e6b ldr r3, [r5, #100] ; 0x64
|
||
80078cc: 07dc lsls r4, r3, #31
|
||
80078ce: d50e bpl.n 80078ee <_vfiprintf_r+0x6a>
|
||
80078d0: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
80078d4: b01d add sp, #116 ; 0x74
|
||
80078d6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
80078da: 4b7b ldr r3, [pc, #492] ; (8007ac8 <_vfiprintf_r+0x244>)
|
||
80078dc: 429d cmp r5, r3
|
||
80078de: d101 bne.n 80078e4 <_vfiprintf_r+0x60>
|
||
80078e0: 68b5 ldr r5, [r6, #8]
|
||
80078e2: e7df b.n 80078a4 <_vfiprintf_r+0x20>
|
||
80078e4: 4b79 ldr r3, [pc, #484] ; (8007acc <_vfiprintf_r+0x248>)
|
||
80078e6: 429d cmp r5, r3
|
||
80078e8: bf08 it eq
|
||
80078ea: 68f5 ldreq r5, [r6, #12]
|
||
80078ec: e7da b.n 80078a4 <_vfiprintf_r+0x20>
|
||
80078ee: 89ab ldrh r3, [r5, #12]
|
||
80078f0: 0598 lsls r0, r3, #22
|
||
80078f2: d4ed bmi.n 80078d0 <_vfiprintf_r+0x4c>
|
||
80078f4: 6da8 ldr r0, [r5, #88] ; 0x58
|
||
80078f6: f7ff ff4b bl 8007790 <__retarget_lock_release_recursive>
|
||
80078fa: e7e9 b.n 80078d0 <_vfiprintf_r+0x4c>
|
||
80078fc: 2300 movs r3, #0
|
||
80078fe: 9309 str r3, [sp, #36] ; 0x24
|
||
8007900: 2320 movs r3, #32
|
||
8007902: f88d 3029 strb.w r3, [sp, #41] ; 0x29
|
||
8007906: 2330 movs r3, #48 ; 0x30
|
||
8007908: f04f 0901 mov.w r9, #1
|
||
800790c: f8cd 800c str.w r8, [sp, #12]
|
||
8007910: f8df 81bc ldr.w r8, [pc, #444] ; 8007ad0 <_vfiprintf_r+0x24c>
|
||
8007914: f88d 302a strb.w r3, [sp, #42] ; 0x2a
|
||
8007918: 4623 mov r3, r4
|
||
800791a: 469a mov sl, r3
|
||
800791c: f813 2b01 ldrb.w r2, [r3], #1
|
||
8007920: b10a cbz r2, 8007926 <_vfiprintf_r+0xa2>
|
||
8007922: 2a25 cmp r2, #37 ; 0x25
|
||
8007924: d1f9 bne.n 800791a <_vfiprintf_r+0x96>
|
||
8007926: ebba 0b04 subs.w fp, sl, r4
|
||
800792a: d00b beq.n 8007944 <_vfiprintf_r+0xc0>
|
||
800792c: 465b mov r3, fp
|
||
800792e: 4622 mov r2, r4
|
||
8007930: 4629 mov r1, r5
|
||
8007932: 4630 mov r0, r6
|
||
8007934: f7ff ff94 bl 8007860 <__sfputs_r>
|
||
8007938: 3001 adds r0, #1
|
||
800793a: f000 80aa beq.w 8007a92 <_vfiprintf_r+0x20e>
|
||
800793e: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
8007940: 445a add r2, fp
|
||
8007942: 9209 str r2, [sp, #36] ; 0x24
|
||
8007944: f89a 3000 ldrb.w r3, [sl]
|
||
8007948: 2b00 cmp r3, #0
|
||
800794a: f000 80a2 beq.w 8007a92 <_vfiprintf_r+0x20e>
|
||
800794e: 2300 movs r3, #0
|
||
8007950: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8007954: e9cd 2305 strd r2, r3, [sp, #20]
|
||
8007958: f10a 0a01 add.w sl, sl, #1
|
||
800795c: 9304 str r3, [sp, #16]
|
||
800795e: 9307 str r3, [sp, #28]
|
||
8007960: f88d 3053 strb.w r3, [sp, #83] ; 0x53
|
||
8007964: 931a str r3, [sp, #104] ; 0x68
|
||
8007966: 4654 mov r4, sl
|
||
8007968: 2205 movs r2, #5
|
||
800796a: f814 1b01 ldrb.w r1, [r4], #1
|
||
800796e: 4858 ldr r0, [pc, #352] ; (8007ad0 <_vfiprintf_r+0x24c>)
|
||
8007970: f7ff f9c8 bl 8006d04 <memchr>
|
||
8007974: 9a04 ldr r2, [sp, #16]
|
||
8007976: b9d8 cbnz r0, 80079b0 <_vfiprintf_r+0x12c>
|
||
8007978: 06d1 lsls r1, r2, #27
|
||
800797a: bf44 itt mi
|
||
800797c: 2320 movmi r3, #32
|
||
800797e: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
8007982: 0713 lsls r3, r2, #28
|
||
8007984: bf44 itt mi
|
||
8007986: 232b movmi r3, #43 ; 0x2b
|
||
8007988: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
800798c: f89a 3000 ldrb.w r3, [sl]
|
||
8007990: 2b2a cmp r3, #42 ; 0x2a
|
||
8007992: d015 beq.n 80079c0 <_vfiprintf_r+0x13c>
|
||
8007994: 4654 mov r4, sl
|
||
8007996: 2000 movs r0, #0
|
||
8007998: f04f 0c0a mov.w ip, #10
|
||
800799c: 9a07 ldr r2, [sp, #28]
|
||
800799e: 4621 mov r1, r4
|
||
80079a0: f811 3b01 ldrb.w r3, [r1], #1
|
||
80079a4: 3b30 subs r3, #48 ; 0x30
|
||
80079a6: 2b09 cmp r3, #9
|
||
80079a8: d94e bls.n 8007a48 <_vfiprintf_r+0x1c4>
|
||
80079aa: b1b0 cbz r0, 80079da <_vfiprintf_r+0x156>
|
||
80079ac: 9207 str r2, [sp, #28]
|
||
80079ae: e014 b.n 80079da <_vfiprintf_r+0x156>
|
||
80079b0: eba0 0308 sub.w r3, r0, r8
|
||
80079b4: fa09 f303 lsl.w r3, r9, r3
|
||
80079b8: 4313 orrs r3, r2
|
||
80079ba: 46a2 mov sl, r4
|
||
80079bc: 9304 str r3, [sp, #16]
|
||
80079be: e7d2 b.n 8007966 <_vfiprintf_r+0xe2>
|
||
80079c0: 9b03 ldr r3, [sp, #12]
|
||
80079c2: 1d19 adds r1, r3, #4
|
||
80079c4: 681b ldr r3, [r3, #0]
|
||
80079c6: 9103 str r1, [sp, #12]
|
||
80079c8: 2b00 cmp r3, #0
|
||
80079ca: bfbb ittet lt
|
||
80079cc: 425b neglt r3, r3
|
||
80079ce: f042 0202 orrlt.w r2, r2, #2
|
||
80079d2: 9307 strge r3, [sp, #28]
|
||
80079d4: 9307 strlt r3, [sp, #28]
|
||
80079d6: bfb8 it lt
|
||
80079d8: 9204 strlt r2, [sp, #16]
|
||
80079da: 7823 ldrb r3, [r4, #0]
|
||
80079dc: 2b2e cmp r3, #46 ; 0x2e
|
||
80079de: d10c bne.n 80079fa <_vfiprintf_r+0x176>
|
||
80079e0: 7863 ldrb r3, [r4, #1]
|
||
80079e2: 2b2a cmp r3, #42 ; 0x2a
|
||
80079e4: d135 bne.n 8007a52 <_vfiprintf_r+0x1ce>
|
||
80079e6: 9b03 ldr r3, [sp, #12]
|
||
80079e8: 3402 adds r4, #2
|
||
80079ea: 1d1a adds r2, r3, #4
|
||
80079ec: 681b ldr r3, [r3, #0]
|
||
80079ee: 9203 str r2, [sp, #12]
|
||
80079f0: 2b00 cmp r3, #0
|
||
80079f2: bfb8 it lt
|
||
80079f4: f04f 33ff movlt.w r3, #4294967295 ; 0xffffffff
|
||
80079f8: 9305 str r3, [sp, #20]
|
||
80079fa: f8df a0e4 ldr.w sl, [pc, #228] ; 8007ae0 <_vfiprintf_r+0x25c>
|
||
80079fe: 2203 movs r2, #3
|
||
8007a00: 4650 mov r0, sl
|
||
8007a02: 7821 ldrb r1, [r4, #0]
|
||
8007a04: f7ff f97e bl 8006d04 <memchr>
|
||
8007a08: b140 cbz r0, 8007a1c <_vfiprintf_r+0x198>
|
||
8007a0a: 2340 movs r3, #64 ; 0x40
|
||
8007a0c: eba0 000a sub.w r0, r0, sl
|
||
8007a10: fa03 f000 lsl.w r0, r3, r0
|
||
8007a14: 9b04 ldr r3, [sp, #16]
|
||
8007a16: 3401 adds r4, #1
|
||
8007a18: 4303 orrs r3, r0
|
||
8007a1a: 9304 str r3, [sp, #16]
|
||
8007a1c: f814 1b01 ldrb.w r1, [r4], #1
|
||
8007a20: 2206 movs r2, #6
|
||
8007a22: 482c ldr r0, [pc, #176] ; (8007ad4 <_vfiprintf_r+0x250>)
|
||
8007a24: f88d 1028 strb.w r1, [sp, #40] ; 0x28
|
||
8007a28: f7ff f96c bl 8006d04 <memchr>
|
||
8007a2c: 2800 cmp r0, #0
|
||
8007a2e: d03f beq.n 8007ab0 <_vfiprintf_r+0x22c>
|
||
8007a30: 4b29 ldr r3, [pc, #164] ; (8007ad8 <_vfiprintf_r+0x254>)
|
||
8007a32: bb1b cbnz r3, 8007a7c <_vfiprintf_r+0x1f8>
|
||
8007a34: 9b03 ldr r3, [sp, #12]
|
||
8007a36: 3307 adds r3, #7
|
||
8007a38: f023 0307 bic.w r3, r3, #7
|
||
8007a3c: 3308 adds r3, #8
|
||
8007a3e: 9303 str r3, [sp, #12]
|
||
8007a40: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8007a42: 443b add r3, r7
|
||
8007a44: 9309 str r3, [sp, #36] ; 0x24
|
||
8007a46: e767 b.n 8007918 <_vfiprintf_r+0x94>
|
||
8007a48: 460c mov r4, r1
|
||
8007a4a: 2001 movs r0, #1
|
||
8007a4c: fb0c 3202 mla r2, ip, r2, r3
|
||
8007a50: e7a5 b.n 800799e <_vfiprintf_r+0x11a>
|
||
8007a52: 2300 movs r3, #0
|
||
8007a54: f04f 0c0a mov.w ip, #10
|
||
8007a58: 4619 mov r1, r3
|
||
8007a5a: 3401 adds r4, #1
|
||
8007a5c: 9305 str r3, [sp, #20]
|
||
8007a5e: 4620 mov r0, r4
|
||
8007a60: f810 2b01 ldrb.w r2, [r0], #1
|
||
8007a64: 3a30 subs r2, #48 ; 0x30
|
||
8007a66: 2a09 cmp r2, #9
|
||
8007a68: d903 bls.n 8007a72 <_vfiprintf_r+0x1ee>
|
||
8007a6a: 2b00 cmp r3, #0
|
||
8007a6c: d0c5 beq.n 80079fa <_vfiprintf_r+0x176>
|
||
8007a6e: 9105 str r1, [sp, #20]
|
||
8007a70: e7c3 b.n 80079fa <_vfiprintf_r+0x176>
|
||
8007a72: 4604 mov r4, r0
|
||
8007a74: 2301 movs r3, #1
|
||
8007a76: fb0c 2101 mla r1, ip, r1, r2
|
||
8007a7a: e7f0 b.n 8007a5e <_vfiprintf_r+0x1da>
|
||
8007a7c: ab03 add r3, sp, #12
|
||
8007a7e: 9300 str r3, [sp, #0]
|
||
8007a80: 462a mov r2, r5
|
||
8007a82: 4630 mov r0, r6
|
||
8007a84: 4b15 ldr r3, [pc, #84] ; (8007adc <_vfiprintf_r+0x258>)
|
||
8007a86: a904 add r1, sp, #16
|
||
8007a88: f7fd fec8 bl 800581c <_printf_float>
|
||
8007a8c: 4607 mov r7, r0
|
||
8007a8e: 1c78 adds r0, r7, #1
|
||
8007a90: d1d6 bne.n 8007a40 <_vfiprintf_r+0x1bc>
|
||
8007a92: 6e6b ldr r3, [r5, #100] ; 0x64
|
||
8007a94: 07d9 lsls r1, r3, #31
|
||
8007a96: d405 bmi.n 8007aa4 <_vfiprintf_r+0x220>
|
||
8007a98: 89ab ldrh r3, [r5, #12]
|
||
8007a9a: 059a lsls r2, r3, #22
|
||
8007a9c: d402 bmi.n 8007aa4 <_vfiprintf_r+0x220>
|
||
8007a9e: 6da8 ldr r0, [r5, #88] ; 0x58
|
||
8007aa0: f7ff fe76 bl 8007790 <__retarget_lock_release_recursive>
|
||
8007aa4: 89ab ldrh r3, [r5, #12]
|
||
8007aa6: 065b lsls r3, r3, #25
|
||
8007aa8: f53f af12 bmi.w 80078d0 <_vfiprintf_r+0x4c>
|
||
8007aac: 9809 ldr r0, [sp, #36] ; 0x24
|
||
8007aae: e711 b.n 80078d4 <_vfiprintf_r+0x50>
|
||
8007ab0: ab03 add r3, sp, #12
|
||
8007ab2: 9300 str r3, [sp, #0]
|
||
8007ab4: 462a mov r2, r5
|
||
8007ab6: 4630 mov r0, r6
|
||
8007ab8: 4b08 ldr r3, [pc, #32] ; (8007adc <_vfiprintf_r+0x258>)
|
||
8007aba: a904 add r1, sp, #16
|
||
8007abc: f7fe f94a bl 8005d54 <_printf_i>
|
||
8007ac0: e7e4 b.n 8007a8c <_vfiprintf_r+0x208>
|
||
8007ac2: bf00 nop
|
||
8007ac4: 080091d4 .word 0x080091d4
|
||
8007ac8: 080091f4 .word 0x080091f4
|
||
8007acc: 080091b4 .word 0x080091b4
|
||
8007ad0: 0800905c .word 0x0800905c
|
||
8007ad4: 08009066 .word 0x08009066
|
||
8007ad8: 0800581d .word 0x0800581d
|
||
8007adc: 08007861 .word 0x08007861
|
||
8007ae0: 08009062 .word 0x08009062
|
||
|
||
08007ae4 <__swbuf_r>:
|
||
8007ae4: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8007ae6: 460e mov r6, r1
|
||
8007ae8: 4614 mov r4, r2
|
||
8007aea: 4605 mov r5, r0
|
||
8007aec: b118 cbz r0, 8007af6 <__swbuf_r+0x12>
|
||
8007aee: 6983 ldr r3, [r0, #24]
|
||
8007af0: b90b cbnz r3, 8007af6 <__swbuf_r+0x12>
|
||
8007af2: f000 f9e7 bl 8007ec4 <__sinit>
|
||
8007af6: 4b21 ldr r3, [pc, #132] ; (8007b7c <__swbuf_r+0x98>)
|
||
8007af8: 429c cmp r4, r3
|
||
8007afa: d12b bne.n 8007b54 <__swbuf_r+0x70>
|
||
8007afc: 686c ldr r4, [r5, #4]
|
||
8007afe: 69a3 ldr r3, [r4, #24]
|
||
8007b00: 60a3 str r3, [r4, #8]
|
||
8007b02: 89a3 ldrh r3, [r4, #12]
|
||
8007b04: 071a lsls r2, r3, #28
|
||
8007b06: d52f bpl.n 8007b68 <__swbuf_r+0x84>
|
||
8007b08: 6923 ldr r3, [r4, #16]
|
||
8007b0a: b36b cbz r3, 8007b68 <__swbuf_r+0x84>
|
||
8007b0c: 6923 ldr r3, [r4, #16]
|
||
8007b0e: 6820 ldr r0, [r4, #0]
|
||
8007b10: b2f6 uxtb r6, r6
|
||
8007b12: 1ac0 subs r0, r0, r3
|
||
8007b14: 6963 ldr r3, [r4, #20]
|
||
8007b16: 4637 mov r7, r6
|
||
8007b18: 4283 cmp r3, r0
|
||
8007b1a: dc04 bgt.n 8007b26 <__swbuf_r+0x42>
|
||
8007b1c: 4621 mov r1, r4
|
||
8007b1e: 4628 mov r0, r5
|
||
8007b20: f000 f93c bl 8007d9c <_fflush_r>
|
||
8007b24: bb30 cbnz r0, 8007b74 <__swbuf_r+0x90>
|
||
8007b26: 68a3 ldr r3, [r4, #8]
|
||
8007b28: 3001 adds r0, #1
|
||
8007b2a: 3b01 subs r3, #1
|
||
8007b2c: 60a3 str r3, [r4, #8]
|
||
8007b2e: 6823 ldr r3, [r4, #0]
|
||
8007b30: 1c5a adds r2, r3, #1
|
||
8007b32: 6022 str r2, [r4, #0]
|
||
8007b34: 701e strb r6, [r3, #0]
|
||
8007b36: 6963 ldr r3, [r4, #20]
|
||
8007b38: 4283 cmp r3, r0
|
||
8007b3a: d004 beq.n 8007b46 <__swbuf_r+0x62>
|
||
8007b3c: 89a3 ldrh r3, [r4, #12]
|
||
8007b3e: 07db lsls r3, r3, #31
|
||
8007b40: d506 bpl.n 8007b50 <__swbuf_r+0x6c>
|
||
8007b42: 2e0a cmp r6, #10
|
||
8007b44: d104 bne.n 8007b50 <__swbuf_r+0x6c>
|
||
8007b46: 4621 mov r1, r4
|
||
8007b48: 4628 mov r0, r5
|
||
8007b4a: f000 f927 bl 8007d9c <_fflush_r>
|
||
8007b4e: b988 cbnz r0, 8007b74 <__swbuf_r+0x90>
|
||
8007b50: 4638 mov r0, r7
|
||
8007b52: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
8007b54: 4b0a ldr r3, [pc, #40] ; (8007b80 <__swbuf_r+0x9c>)
|
||
8007b56: 429c cmp r4, r3
|
||
8007b58: d101 bne.n 8007b5e <__swbuf_r+0x7a>
|
||
8007b5a: 68ac ldr r4, [r5, #8]
|
||
8007b5c: e7cf b.n 8007afe <__swbuf_r+0x1a>
|
||
8007b5e: 4b09 ldr r3, [pc, #36] ; (8007b84 <__swbuf_r+0xa0>)
|
||
8007b60: 429c cmp r4, r3
|
||
8007b62: bf08 it eq
|
||
8007b64: 68ec ldreq r4, [r5, #12]
|
||
8007b66: e7ca b.n 8007afe <__swbuf_r+0x1a>
|
||
8007b68: 4621 mov r1, r4
|
||
8007b6a: 4628 mov r0, r5
|
||
8007b6c: f000 f81a bl 8007ba4 <__swsetup_r>
|
||
8007b70: 2800 cmp r0, #0
|
||
8007b72: d0cb beq.n 8007b0c <__swbuf_r+0x28>
|
||
8007b74: f04f 37ff mov.w r7, #4294967295 ; 0xffffffff
|
||
8007b78: e7ea b.n 8007b50 <__swbuf_r+0x6c>
|
||
8007b7a: bf00 nop
|
||
8007b7c: 080091d4 .word 0x080091d4
|
||
8007b80: 080091f4 .word 0x080091f4
|
||
8007b84: 080091b4 .word 0x080091b4
|
||
|
||
08007b88 <__ascii_wctomb>:
|
||
8007b88: 4603 mov r3, r0
|
||
8007b8a: 4608 mov r0, r1
|
||
8007b8c: b141 cbz r1, 8007ba0 <__ascii_wctomb+0x18>
|
||
8007b8e: 2aff cmp r2, #255 ; 0xff
|
||
8007b90: d904 bls.n 8007b9c <__ascii_wctomb+0x14>
|
||
8007b92: 228a movs r2, #138 ; 0x8a
|
||
8007b94: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8007b98: 601a str r2, [r3, #0]
|
||
8007b9a: 4770 bx lr
|
||
8007b9c: 2001 movs r0, #1
|
||
8007b9e: 700a strb r2, [r1, #0]
|
||
8007ba0: 4770 bx lr
|
||
...
|
||
|
||
08007ba4 <__swsetup_r>:
|
||
8007ba4: 4b32 ldr r3, [pc, #200] ; (8007c70 <__swsetup_r+0xcc>)
|
||
8007ba6: b570 push {r4, r5, r6, lr}
|
||
8007ba8: 681d ldr r5, [r3, #0]
|
||
8007baa: 4606 mov r6, r0
|
||
8007bac: 460c mov r4, r1
|
||
8007bae: b125 cbz r5, 8007bba <__swsetup_r+0x16>
|
||
8007bb0: 69ab ldr r3, [r5, #24]
|
||
8007bb2: b913 cbnz r3, 8007bba <__swsetup_r+0x16>
|
||
8007bb4: 4628 mov r0, r5
|
||
8007bb6: f000 f985 bl 8007ec4 <__sinit>
|
||
8007bba: 4b2e ldr r3, [pc, #184] ; (8007c74 <__swsetup_r+0xd0>)
|
||
8007bbc: 429c cmp r4, r3
|
||
8007bbe: d10f bne.n 8007be0 <__swsetup_r+0x3c>
|
||
8007bc0: 686c ldr r4, [r5, #4]
|
||
8007bc2: 89a3 ldrh r3, [r4, #12]
|
||
8007bc4: f9b4 200c ldrsh.w r2, [r4, #12]
|
||
8007bc8: 0719 lsls r1, r3, #28
|
||
8007bca: d42c bmi.n 8007c26 <__swsetup_r+0x82>
|
||
8007bcc: 06dd lsls r5, r3, #27
|
||
8007bce: d411 bmi.n 8007bf4 <__swsetup_r+0x50>
|
||
8007bd0: 2309 movs r3, #9
|
||
8007bd2: 6033 str r3, [r6, #0]
|
||
8007bd4: f042 0340 orr.w r3, r2, #64 ; 0x40
|
||
8007bd8: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8007bdc: 81a3 strh r3, [r4, #12]
|
||
8007bde: e03e b.n 8007c5e <__swsetup_r+0xba>
|
||
8007be0: 4b25 ldr r3, [pc, #148] ; (8007c78 <__swsetup_r+0xd4>)
|
||
8007be2: 429c cmp r4, r3
|
||
8007be4: d101 bne.n 8007bea <__swsetup_r+0x46>
|
||
8007be6: 68ac ldr r4, [r5, #8]
|
||
8007be8: e7eb b.n 8007bc2 <__swsetup_r+0x1e>
|
||
8007bea: 4b24 ldr r3, [pc, #144] ; (8007c7c <__swsetup_r+0xd8>)
|
||
8007bec: 429c cmp r4, r3
|
||
8007bee: bf08 it eq
|
||
8007bf0: 68ec ldreq r4, [r5, #12]
|
||
8007bf2: e7e6 b.n 8007bc2 <__swsetup_r+0x1e>
|
||
8007bf4: 0758 lsls r0, r3, #29
|
||
8007bf6: d512 bpl.n 8007c1e <__swsetup_r+0x7a>
|
||
8007bf8: 6b61 ldr r1, [r4, #52] ; 0x34
|
||
8007bfa: b141 cbz r1, 8007c0e <__swsetup_r+0x6a>
|
||
8007bfc: f104 0344 add.w r3, r4, #68 ; 0x44
|
||
8007c00: 4299 cmp r1, r3
|
||
8007c02: d002 beq.n 8007c0a <__swsetup_r+0x66>
|
||
8007c04: 4630 mov r0, r6
|
||
8007c06: f7fd fcc5 bl 8005594 <_free_r>
|
||
8007c0a: 2300 movs r3, #0
|
||
8007c0c: 6363 str r3, [r4, #52] ; 0x34
|
||
8007c0e: 89a3 ldrh r3, [r4, #12]
|
||
8007c10: f023 0324 bic.w r3, r3, #36 ; 0x24
|
||
8007c14: 81a3 strh r3, [r4, #12]
|
||
8007c16: 2300 movs r3, #0
|
||
8007c18: 6063 str r3, [r4, #4]
|
||
8007c1a: 6923 ldr r3, [r4, #16]
|
||
8007c1c: 6023 str r3, [r4, #0]
|
||
8007c1e: 89a3 ldrh r3, [r4, #12]
|
||
8007c20: f043 0308 orr.w r3, r3, #8
|
||
8007c24: 81a3 strh r3, [r4, #12]
|
||
8007c26: 6923 ldr r3, [r4, #16]
|
||
8007c28: b94b cbnz r3, 8007c3e <__swsetup_r+0x9a>
|
||
8007c2a: 89a3 ldrh r3, [r4, #12]
|
||
8007c2c: f403 7320 and.w r3, r3, #640 ; 0x280
|
||
8007c30: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
||
8007c34: d003 beq.n 8007c3e <__swsetup_r+0x9a>
|
||
8007c36: 4621 mov r1, r4
|
||
8007c38: 4630 mov r0, r6
|
||
8007c3a: f000 fa05 bl 8008048 <__smakebuf_r>
|
||
8007c3e: 89a0 ldrh r0, [r4, #12]
|
||
8007c40: f9b4 200c ldrsh.w r2, [r4, #12]
|
||
8007c44: f010 0301 ands.w r3, r0, #1
|
||
8007c48: d00a beq.n 8007c60 <__swsetup_r+0xbc>
|
||
8007c4a: 2300 movs r3, #0
|
||
8007c4c: 60a3 str r3, [r4, #8]
|
||
8007c4e: 6963 ldr r3, [r4, #20]
|
||
8007c50: 425b negs r3, r3
|
||
8007c52: 61a3 str r3, [r4, #24]
|
||
8007c54: 6923 ldr r3, [r4, #16]
|
||
8007c56: b943 cbnz r3, 8007c6a <__swsetup_r+0xc6>
|
||
8007c58: f010 0080 ands.w r0, r0, #128 ; 0x80
|
||
8007c5c: d1ba bne.n 8007bd4 <__swsetup_r+0x30>
|
||
8007c5e: bd70 pop {r4, r5, r6, pc}
|
||
8007c60: 0781 lsls r1, r0, #30
|
||
8007c62: bf58 it pl
|
||
8007c64: 6963 ldrpl r3, [r4, #20]
|
||
8007c66: 60a3 str r3, [r4, #8]
|
||
8007c68: e7f4 b.n 8007c54 <__swsetup_r+0xb0>
|
||
8007c6a: 2000 movs r0, #0
|
||
8007c6c: e7f7 b.n 8007c5e <__swsetup_r+0xba>
|
||
8007c6e: bf00 nop
|
||
8007c70: 2000000c .word 0x2000000c
|
||
8007c74: 080091d4 .word 0x080091d4
|
||
8007c78: 080091f4 .word 0x080091f4
|
||
8007c7c: 080091b4 .word 0x080091b4
|
||
|
||
08007c80 <abort>:
|
||
8007c80: 2006 movs r0, #6
|
||
8007c82: b508 push {r3, lr}
|
||
8007c84: f000 fa50 bl 8008128 <raise>
|
||
8007c88: 2001 movs r0, #1
|
||
8007c8a: f7f9 fccf bl 800162c <_exit>
|
||
...
|
||
|
||
08007c90 <__sflush_r>:
|
||
8007c90: 898a ldrh r2, [r1, #12]
|
||
8007c92: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||
8007c96: 4605 mov r5, r0
|
||
8007c98: 0710 lsls r0, r2, #28
|
||
8007c9a: 460c mov r4, r1
|
||
8007c9c: d458 bmi.n 8007d50 <__sflush_r+0xc0>
|
||
8007c9e: 684b ldr r3, [r1, #4]
|
||
8007ca0: 2b00 cmp r3, #0
|
||
8007ca2: dc05 bgt.n 8007cb0 <__sflush_r+0x20>
|
||
8007ca4: 6c0b ldr r3, [r1, #64] ; 0x40
|
||
8007ca6: 2b00 cmp r3, #0
|
||
8007ca8: dc02 bgt.n 8007cb0 <__sflush_r+0x20>
|
||
8007caa: 2000 movs r0, #0
|
||
8007cac: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
||
8007cb0: 6ae6 ldr r6, [r4, #44] ; 0x2c
|
||
8007cb2: 2e00 cmp r6, #0
|
||
8007cb4: d0f9 beq.n 8007caa <__sflush_r+0x1a>
|
||
8007cb6: 2300 movs r3, #0
|
||
8007cb8: f412 5280 ands.w r2, r2, #4096 ; 0x1000
|
||
8007cbc: 682f ldr r7, [r5, #0]
|
||
8007cbe: 602b str r3, [r5, #0]
|
||
8007cc0: d032 beq.n 8007d28 <__sflush_r+0x98>
|
||
8007cc2: 6d60 ldr r0, [r4, #84] ; 0x54
|
||
8007cc4: 89a3 ldrh r3, [r4, #12]
|
||
8007cc6: 075a lsls r2, r3, #29
|
||
8007cc8: d505 bpl.n 8007cd6 <__sflush_r+0x46>
|
||
8007cca: 6863 ldr r3, [r4, #4]
|
||
8007ccc: 1ac0 subs r0, r0, r3
|
||
8007cce: 6b63 ldr r3, [r4, #52] ; 0x34
|
||
8007cd0: b10b cbz r3, 8007cd6 <__sflush_r+0x46>
|
||
8007cd2: 6c23 ldr r3, [r4, #64] ; 0x40
|
||
8007cd4: 1ac0 subs r0, r0, r3
|
||
8007cd6: 2300 movs r3, #0
|
||
8007cd8: 4602 mov r2, r0
|
||
8007cda: 6ae6 ldr r6, [r4, #44] ; 0x2c
|
||
8007cdc: 4628 mov r0, r5
|
||
8007cde: 6a21 ldr r1, [r4, #32]
|
||
8007ce0: 47b0 blx r6
|
||
8007ce2: 1c43 adds r3, r0, #1
|
||
8007ce4: 89a3 ldrh r3, [r4, #12]
|
||
8007ce6: d106 bne.n 8007cf6 <__sflush_r+0x66>
|
||
8007ce8: 6829 ldr r1, [r5, #0]
|
||
8007cea: 291d cmp r1, #29
|
||
8007cec: d82c bhi.n 8007d48 <__sflush_r+0xb8>
|
||
8007cee: 4a2a ldr r2, [pc, #168] ; (8007d98 <__sflush_r+0x108>)
|
||
8007cf0: 40ca lsrs r2, r1
|
||
8007cf2: 07d6 lsls r6, r2, #31
|
||
8007cf4: d528 bpl.n 8007d48 <__sflush_r+0xb8>
|
||
8007cf6: 2200 movs r2, #0
|
||
8007cf8: 6062 str r2, [r4, #4]
|
||
8007cfa: 6922 ldr r2, [r4, #16]
|
||
8007cfc: 04d9 lsls r1, r3, #19
|
||
8007cfe: 6022 str r2, [r4, #0]
|
||
8007d00: d504 bpl.n 8007d0c <__sflush_r+0x7c>
|
||
8007d02: 1c42 adds r2, r0, #1
|
||
8007d04: d101 bne.n 8007d0a <__sflush_r+0x7a>
|
||
8007d06: 682b ldr r3, [r5, #0]
|
||
8007d08: b903 cbnz r3, 8007d0c <__sflush_r+0x7c>
|
||
8007d0a: 6560 str r0, [r4, #84] ; 0x54
|
||
8007d0c: 6b61 ldr r1, [r4, #52] ; 0x34
|
||
8007d0e: 602f str r7, [r5, #0]
|
||
8007d10: 2900 cmp r1, #0
|
||
8007d12: d0ca beq.n 8007caa <__sflush_r+0x1a>
|
||
8007d14: f104 0344 add.w r3, r4, #68 ; 0x44
|
||
8007d18: 4299 cmp r1, r3
|
||
8007d1a: d002 beq.n 8007d22 <__sflush_r+0x92>
|
||
8007d1c: 4628 mov r0, r5
|
||
8007d1e: f7fd fc39 bl 8005594 <_free_r>
|
||
8007d22: 2000 movs r0, #0
|
||
8007d24: 6360 str r0, [r4, #52] ; 0x34
|
||
8007d26: e7c1 b.n 8007cac <__sflush_r+0x1c>
|
||
8007d28: 6a21 ldr r1, [r4, #32]
|
||
8007d2a: 2301 movs r3, #1
|
||
8007d2c: 4628 mov r0, r5
|
||
8007d2e: 47b0 blx r6
|
||
8007d30: 1c41 adds r1, r0, #1
|
||
8007d32: d1c7 bne.n 8007cc4 <__sflush_r+0x34>
|
||
8007d34: 682b ldr r3, [r5, #0]
|
||
8007d36: 2b00 cmp r3, #0
|
||
8007d38: d0c4 beq.n 8007cc4 <__sflush_r+0x34>
|
||
8007d3a: 2b1d cmp r3, #29
|
||
8007d3c: d001 beq.n 8007d42 <__sflush_r+0xb2>
|
||
8007d3e: 2b16 cmp r3, #22
|
||
8007d40: d101 bne.n 8007d46 <__sflush_r+0xb6>
|
||
8007d42: 602f str r7, [r5, #0]
|
||
8007d44: e7b1 b.n 8007caa <__sflush_r+0x1a>
|
||
8007d46: 89a3 ldrh r3, [r4, #12]
|
||
8007d48: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8007d4c: 81a3 strh r3, [r4, #12]
|
||
8007d4e: e7ad b.n 8007cac <__sflush_r+0x1c>
|
||
8007d50: 690f ldr r7, [r1, #16]
|
||
8007d52: 2f00 cmp r7, #0
|
||
8007d54: d0a9 beq.n 8007caa <__sflush_r+0x1a>
|
||
8007d56: 0793 lsls r3, r2, #30
|
||
8007d58: bf18 it ne
|
||
8007d5a: 2300 movne r3, #0
|
||
8007d5c: 680e ldr r6, [r1, #0]
|
||
8007d5e: bf08 it eq
|
||
8007d60: 694b ldreq r3, [r1, #20]
|
||
8007d62: eba6 0807 sub.w r8, r6, r7
|
||
8007d66: 600f str r7, [r1, #0]
|
||
8007d68: 608b str r3, [r1, #8]
|
||
8007d6a: f1b8 0f00 cmp.w r8, #0
|
||
8007d6e: dd9c ble.n 8007caa <__sflush_r+0x1a>
|
||
8007d70: 4643 mov r3, r8
|
||
8007d72: 463a mov r2, r7
|
||
8007d74: 4628 mov r0, r5
|
||
8007d76: 6a21 ldr r1, [r4, #32]
|
||
8007d78: 6aa6 ldr r6, [r4, #40] ; 0x28
|
||
8007d7a: 47b0 blx r6
|
||
8007d7c: 2800 cmp r0, #0
|
||
8007d7e: dc06 bgt.n 8007d8e <__sflush_r+0xfe>
|
||
8007d80: 89a3 ldrh r3, [r4, #12]
|
||
8007d82: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8007d86: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8007d8a: 81a3 strh r3, [r4, #12]
|
||
8007d8c: e78e b.n 8007cac <__sflush_r+0x1c>
|
||
8007d8e: 4407 add r7, r0
|
||
8007d90: eba8 0800 sub.w r8, r8, r0
|
||
8007d94: e7e9 b.n 8007d6a <__sflush_r+0xda>
|
||
8007d96: bf00 nop
|
||
8007d98: 20400001 .word 0x20400001
|
||
|
||
08007d9c <_fflush_r>:
|
||
8007d9c: b538 push {r3, r4, r5, lr}
|
||
8007d9e: 690b ldr r3, [r1, #16]
|
||
8007da0: 4605 mov r5, r0
|
||
8007da2: 460c mov r4, r1
|
||
8007da4: b913 cbnz r3, 8007dac <_fflush_r+0x10>
|
||
8007da6: 2500 movs r5, #0
|
||
8007da8: 4628 mov r0, r5
|
||
8007daa: bd38 pop {r3, r4, r5, pc}
|
||
8007dac: b118 cbz r0, 8007db6 <_fflush_r+0x1a>
|
||
8007dae: 6983 ldr r3, [r0, #24]
|
||
8007db0: b90b cbnz r3, 8007db6 <_fflush_r+0x1a>
|
||
8007db2: f000 f887 bl 8007ec4 <__sinit>
|
||
8007db6: 4b14 ldr r3, [pc, #80] ; (8007e08 <_fflush_r+0x6c>)
|
||
8007db8: 429c cmp r4, r3
|
||
8007dba: d11b bne.n 8007df4 <_fflush_r+0x58>
|
||
8007dbc: 686c ldr r4, [r5, #4]
|
||
8007dbe: f9b4 300c ldrsh.w r3, [r4, #12]
|
||
8007dc2: 2b00 cmp r3, #0
|
||
8007dc4: d0ef beq.n 8007da6 <_fflush_r+0xa>
|
||
8007dc6: 6e62 ldr r2, [r4, #100] ; 0x64
|
||
8007dc8: 07d0 lsls r0, r2, #31
|
||
8007dca: d404 bmi.n 8007dd6 <_fflush_r+0x3a>
|
||
8007dcc: 0599 lsls r1, r3, #22
|
||
8007dce: d402 bmi.n 8007dd6 <_fflush_r+0x3a>
|
||
8007dd0: 6da0 ldr r0, [r4, #88] ; 0x58
|
||
8007dd2: f7ff fcdc bl 800778e <__retarget_lock_acquire_recursive>
|
||
8007dd6: 4628 mov r0, r5
|
||
8007dd8: 4621 mov r1, r4
|
||
8007dda: f7ff ff59 bl 8007c90 <__sflush_r>
|
||
8007dde: 6e63 ldr r3, [r4, #100] ; 0x64
|
||
8007de0: 4605 mov r5, r0
|
||
8007de2: 07da lsls r2, r3, #31
|
||
8007de4: d4e0 bmi.n 8007da8 <_fflush_r+0xc>
|
||
8007de6: 89a3 ldrh r3, [r4, #12]
|
||
8007de8: 059b lsls r3, r3, #22
|
||
8007dea: d4dd bmi.n 8007da8 <_fflush_r+0xc>
|
||
8007dec: 6da0 ldr r0, [r4, #88] ; 0x58
|
||
8007dee: f7ff fccf bl 8007790 <__retarget_lock_release_recursive>
|
||
8007df2: e7d9 b.n 8007da8 <_fflush_r+0xc>
|
||
8007df4: 4b05 ldr r3, [pc, #20] ; (8007e0c <_fflush_r+0x70>)
|
||
8007df6: 429c cmp r4, r3
|
||
8007df8: d101 bne.n 8007dfe <_fflush_r+0x62>
|
||
8007dfa: 68ac ldr r4, [r5, #8]
|
||
8007dfc: e7df b.n 8007dbe <_fflush_r+0x22>
|
||
8007dfe: 4b04 ldr r3, [pc, #16] ; (8007e10 <_fflush_r+0x74>)
|
||
8007e00: 429c cmp r4, r3
|
||
8007e02: bf08 it eq
|
||
8007e04: 68ec ldreq r4, [r5, #12]
|
||
8007e06: e7da b.n 8007dbe <_fflush_r+0x22>
|
||
8007e08: 080091d4 .word 0x080091d4
|
||
8007e0c: 080091f4 .word 0x080091f4
|
||
8007e10: 080091b4 .word 0x080091b4
|
||
|
||
08007e14 <std>:
|
||
8007e14: 2300 movs r3, #0
|
||
8007e16: b510 push {r4, lr}
|
||
8007e18: 4604 mov r4, r0
|
||
8007e1a: e9c0 3300 strd r3, r3, [r0]
|
||
8007e1e: e9c0 3304 strd r3, r3, [r0, #16]
|
||
8007e22: 6083 str r3, [r0, #8]
|
||
8007e24: 8181 strh r1, [r0, #12]
|
||
8007e26: 6643 str r3, [r0, #100] ; 0x64
|
||
8007e28: 81c2 strh r2, [r0, #14]
|
||
8007e2a: 6183 str r3, [r0, #24]
|
||
8007e2c: 4619 mov r1, r3
|
||
8007e2e: 2208 movs r2, #8
|
||
8007e30: 305c adds r0, #92 ; 0x5c
|
||
8007e32: f7fd fba7 bl 8005584 <memset>
|
||
8007e36: 4b05 ldr r3, [pc, #20] ; (8007e4c <std+0x38>)
|
||
8007e38: 6224 str r4, [r4, #32]
|
||
8007e3a: 6263 str r3, [r4, #36] ; 0x24
|
||
8007e3c: 4b04 ldr r3, [pc, #16] ; (8007e50 <std+0x3c>)
|
||
8007e3e: 62a3 str r3, [r4, #40] ; 0x28
|
||
8007e40: 4b04 ldr r3, [pc, #16] ; (8007e54 <std+0x40>)
|
||
8007e42: 62e3 str r3, [r4, #44] ; 0x2c
|
||
8007e44: 4b04 ldr r3, [pc, #16] ; (8007e58 <std+0x44>)
|
||
8007e46: 6323 str r3, [r4, #48] ; 0x30
|
||
8007e48: bd10 pop {r4, pc}
|
||
8007e4a: bf00 nop
|
||
8007e4c: 08008161 .word 0x08008161
|
||
8007e50: 08008183 .word 0x08008183
|
||
8007e54: 080081bb .word 0x080081bb
|
||
8007e58: 080081df .word 0x080081df
|
||
|
||
08007e5c <_cleanup_r>:
|
||
8007e5c: 4901 ldr r1, [pc, #4] ; (8007e64 <_cleanup_r+0x8>)
|
||
8007e5e: f000 b8af b.w 8007fc0 <_fwalk_reent>
|
||
8007e62: bf00 nop
|
||
8007e64: 08007d9d .word 0x08007d9d
|
||
|
||
08007e68 <__sfmoreglue>:
|
||
8007e68: b570 push {r4, r5, r6, lr}
|
||
8007e6a: 2568 movs r5, #104 ; 0x68
|
||
8007e6c: 1e4a subs r2, r1, #1
|
||
8007e6e: 4355 muls r5, r2
|
||
8007e70: 460e mov r6, r1
|
||
8007e72: f105 0174 add.w r1, r5, #116 ; 0x74
|
||
8007e76: f7fd fbd9 bl 800562c <_malloc_r>
|
||
8007e7a: 4604 mov r4, r0
|
||
8007e7c: b140 cbz r0, 8007e90 <__sfmoreglue+0x28>
|
||
8007e7e: 2100 movs r1, #0
|
||
8007e80: e9c0 1600 strd r1, r6, [r0]
|
||
8007e84: 300c adds r0, #12
|
||
8007e86: 60a0 str r0, [r4, #8]
|
||
8007e88: f105 0268 add.w r2, r5, #104 ; 0x68
|
||
8007e8c: f7fd fb7a bl 8005584 <memset>
|
||
8007e90: 4620 mov r0, r4
|
||
8007e92: bd70 pop {r4, r5, r6, pc}
|
||
|
||
08007e94 <__sfp_lock_acquire>:
|
||
8007e94: 4801 ldr r0, [pc, #4] ; (8007e9c <__sfp_lock_acquire+0x8>)
|
||
8007e96: f7ff bc7a b.w 800778e <__retarget_lock_acquire_recursive>
|
||
8007e9a: bf00 nop
|
||
8007e9c: 200002fc .word 0x200002fc
|
||
|
||
08007ea0 <__sfp_lock_release>:
|
||
8007ea0: 4801 ldr r0, [pc, #4] ; (8007ea8 <__sfp_lock_release+0x8>)
|
||
8007ea2: f7ff bc75 b.w 8007790 <__retarget_lock_release_recursive>
|
||
8007ea6: bf00 nop
|
||
8007ea8: 200002fc .word 0x200002fc
|
||
|
||
08007eac <__sinit_lock_acquire>:
|
||
8007eac: 4801 ldr r0, [pc, #4] ; (8007eb4 <__sinit_lock_acquire+0x8>)
|
||
8007eae: f7ff bc6e b.w 800778e <__retarget_lock_acquire_recursive>
|
||
8007eb2: bf00 nop
|
||
8007eb4: 200002f7 .word 0x200002f7
|
||
|
||
08007eb8 <__sinit_lock_release>:
|
||
8007eb8: 4801 ldr r0, [pc, #4] ; (8007ec0 <__sinit_lock_release+0x8>)
|
||
8007eba: f7ff bc69 b.w 8007790 <__retarget_lock_release_recursive>
|
||
8007ebe: bf00 nop
|
||
8007ec0: 200002f7 .word 0x200002f7
|
||
|
||
08007ec4 <__sinit>:
|
||
8007ec4: b510 push {r4, lr}
|
||
8007ec6: 4604 mov r4, r0
|
||
8007ec8: f7ff fff0 bl 8007eac <__sinit_lock_acquire>
|
||
8007ecc: 69a3 ldr r3, [r4, #24]
|
||
8007ece: b11b cbz r3, 8007ed8 <__sinit+0x14>
|
||
8007ed0: e8bd 4010 ldmia.w sp!, {r4, lr}
|
||
8007ed4: f7ff bff0 b.w 8007eb8 <__sinit_lock_release>
|
||
8007ed8: e9c4 3312 strd r3, r3, [r4, #72] ; 0x48
|
||
8007edc: 6523 str r3, [r4, #80] ; 0x50
|
||
8007ede: 4b13 ldr r3, [pc, #76] ; (8007f2c <__sinit+0x68>)
|
||
8007ee0: 4a13 ldr r2, [pc, #76] ; (8007f30 <__sinit+0x6c>)
|
||
8007ee2: 681b ldr r3, [r3, #0]
|
||
8007ee4: 62a2 str r2, [r4, #40] ; 0x28
|
||
8007ee6: 42a3 cmp r3, r4
|
||
8007ee8: bf08 it eq
|
||
8007eea: 2301 moveq r3, #1
|
||
8007eec: 4620 mov r0, r4
|
||
8007eee: bf08 it eq
|
||
8007ef0: 61a3 streq r3, [r4, #24]
|
||
8007ef2: f000 f81f bl 8007f34 <__sfp>
|
||
8007ef6: 6060 str r0, [r4, #4]
|
||
8007ef8: 4620 mov r0, r4
|
||
8007efa: f000 f81b bl 8007f34 <__sfp>
|
||
8007efe: 60a0 str r0, [r4, #8]
|
||
8007f00: 4620 mov r0, r4
|
||
8007f02: f000 f817 bl 8007f34 <__sfp>
|
||
8007f06: 2200 movs r2, #0
|
||
8007f08: 2104 movs r1, #4
|
||
8007f0a: 60e0 str r0, [r4, #12]
|
||
8007f0c: 6860 ldr r0, [r4, #4]
|
||
8007f0e: f7ff ff81 bl 8007e14 <std>
|
||
8007f12: 2201 movs r2, #1
|
||
8007f14: 2109 movs r1, #9
|
||
8007f16: 68a0 ldr r0, [r4, #8]
|
||
8007f18: f7ff ff7c bl 8007e14 <std>
|
||
8007f1c: 2202 movs r2, #2
|
||
8007f1e: 2112 movs r1, #18
|
||
8007f20: 68e0 ldr r0, [r4, #12]
|
||
8007f22: f7ff ff77 bl 8007e14 <std>
|
||
8007f26: 2301 movs r3, #1
|
||
8007f28: 61a3 str r3, [r4, #24]
|
||
8007f2a: e7d1 b.n 8007ed0 <__sinit+0xc>
|
||
8007f2c: 08008e34 .word 0x08008e34
|
||
8007f30: 08007e5d .word 0x08007e5d
|
||
|
||
08007f34 <__sfp>:
|
||
8007f34: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8007f36: 4607 mov r7, r0
|
||
8007f38: f7ff ffac bl 8007e94 <__sfp_lock_acquire>
|
||
8007f3c: 4b1e ldr r3, [pc, #120] ; (8007fb8 <__sfp+0x84>)
|
||
8007f3e: 681e ldr r6, [r3, #0]
|
||
8007f40: 69b3 ldr r3, [r6, #24]
|
||
8007f42: b913 cbnz r3, 8007f4a <__sfp+0x16>
|
||
8007f44: 4630 mov r0, r6
|
||
8007f46: f7ff ffbd bl 8007ec4 <__sinit>
|
||
8007f4a: 3648 adds r6, #72 ; 0x48
|
||
8007f4c: e9d6 3401 ldrd r3, r4, [r6, #4]
|
||
8007f50: 3b01 subs r3, #1
|
||
8007f52: d503 bpl.n 8007f5c <__sfp+0x28>
|
||
8007f54: 6833 ldr r3, [r6, #0]
|
||
8007f56: b30b cbz r3, 8007f9c <__sfp+0x68>
|
||
8007f58: 6836 ldr r6, [r6, #0]
|
||
8007f5a: e7f7 b.n 8007f4c <__sfp+0x18>
|
||
8007f5c: f9b4 500c ldrsh.w r5, [r4, #12]
|
||
8007f60: b9d5 cbnz r5, 8007f98 <__sfp+0x64>
|
||
8007f62: 4b16 ldr r3, [pc, #88] ; (8007fbc <__sfp+0x88>)
|
||
8007f64: f104 0058 add.w r0, r4, #88 ; 0x58
|
||
8007f68: 60e3 str r3, [r4, #12]
|
||
8007f6a: 6665 str r5, [r4, #100] ; 0x64
|
||
8007f6c: f7ff fc0e bl 800778c <__retarget_lock_init_recursive>
|
||
8007f70: f7ff ff96 bl 8007ea0 <__sfp_lock_release>
|
||
8007f74: 2208 movs r2, #8
|
||
8007f76: 4629 mov r1, r5
|
||
8007f78: e9c4 5501 strd r5, r5, [r4, #4]
|
||
8007f7c: e9c4 5504 strd r5, r5, [r4, #16]
|
||
8007f80: 6025 str r5, [r4, #0]
|
||
8007f82: 61a5 str r5, [r4, #24]
|
||
8007f84: f104 005c add.w r0, r4, #92 ; 0x5c
|
||
8007f88: f7fd fafc bl 8005584 <memset>
|
||
8007f8c: e9c4 550d strd r5, r5, [r4, #52] ; 0x34
|
||
8007f90: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48
|
||
8007f94: 4620 mov r0, r4
|
||
8007f96: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
8007f98: 3468 adds r4, #104 ; 0x68
|
||
8007f9a: e7d9 b.n 8007f50 <__sfp+0x1c>
|
||
8007f9c: 2104 movs r1, #4
|
||
8007f9e: 4638 mov r0, r7
|
||
8007fa0: f7ff ff62 bl 8007e68 <__sfmoreglue>
|
||
8007fa4: 4604 mov r4, r0
|
||
8007fa6: 6030 str r0, [r6, #0]
|
||
8007fa8: 2800 cmp r0, #0
|
||
8007faa: d1d5 bne.n 8007f58 <__sfp+0x24>
|
||
8007fac: f7ff ff78 bl 8007ea0 <__sfp_lock_release>
|
||
8007fb0: 230c movs r3, #12
|
||
8007fb2: 603b str r3, [r7, #0]
|
||
8007fb4: e7ee b.n 8007f94 <__sfp+0x60>
|
||
8007fb6: bf00 nop
|
||
8007fb8: 08008e34 .word 0x08008e34
|
||
8007fbc: ffff0001 .word 0xffff0001
|
||
|
||
08007fc0 <_fwalk_reent>:
|
||
8007fc0: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
||
8007fc4: 4606 mov r6, r0
|
||
8007fc6: 4688 mov r8, r1
|
||
8007fc8: 2700 movs r7, #0
|
||
8007fca: f100 0448 add.w r4, r0, #72 ; 0x48
|
||
8007fce: e9d4 9501 ldrd r9, r5, [r4, #4]
|
||
8007fd2: f1b9 0901 subs.w r9, r9, #1
|
||
8007fd6: d505 bpl.n 8007fe4 <_fwalk_reent+0x24>
|
||
8007fd8: 6824 ldr r4, [r4, #0]
|
||
8007fda: 2c00 cmp r4, #0
|
||
8007fdc: d1f7 bne.n 8007fce <_fwalk_reent+0xe>
|
||
8007fde: 4638 mov r0, r7
|
||
8007fe0: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
||
8007fe4: 89ab ldrh r3, [r5, #12]
|
||
8007fe6: 2b01 cmp r3, #1
|
||
8007fe8: d907 bls.n 8007ffa <_fwalk_reent+0x3a>
|
||
8007fea: f9b5 300e ldrsh.w r3, [r5, #14]
|
||
8007fee: 3301 adds r3, #1
|
||
8007ff0: d003 beq.n 8007ffa <_fwalk_reent+0x3a>
|
||
8007ff2: 4629 mov r1, r5
|
||
8007ff4: 4630 mov r0, r6
|
||
8007ff6: 47c0 blx r8
|
||
8007ff8: 4307 orrs r7, r0
|
||
8007ffa: 3568 adds r5, #104 ; 0x68
|
||
8007ffc: e7e9 b.n 8007fd2 <_fwalk_reent+0x12>
|
||
|
||
08007ffe <__swhatbuf_r>:
|
||
8007ffe: b570 push {r4, r5, r6, lr}
|
||
8008000: 460e mov r6, r1
|
||
8008002: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
8008006: 4614 mov r4, r2
|
||
8008008: 2900 cmp r1, #0
|
||
800800a: 461d mov r5, r3
|
||
800800c: b096 sub sp, #88 ; 0x58
|
||
800800e: da07 bge.n 8008020 <__swhatbuf_r+0x22>
|
||
8008010: 2300 movs r3, #0
|
||
8008012: 602b str r3, [r5, #0]
|
||
8008014: 89b3 ldrh r3, [r6, #12]
|
||
8008016: 061a lsls r2, r3, #24
|
||
8008018: d410 bmi.n 800803c <__swhatbuf_r+0x3e>
|
||
800801a: f44f 6380 mov.w r3, #1024 ; 0x400
|
||
800801e: e00e b.n 800803e <__swhatbuf_r+0x40>
|
||
8008020: 466a mov r2, sp
|
||
8008022: f000 f903 bl 800822c <_fstat_r>
|
||
8008026: 2800 cmp r0, #0
|
||
8008028: dbf2 blt.n 8008010 <__swhatbuf_r+0x12>
|
||
800802a: 9a01 ldr r2, [sp, #4]
|
||
800802c: f402 4270 and.w r2, r2, #61440 ; 0xf000
|
||
8008030: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000
|
||
8008034: 425a negs r2, r3
|
||
8008036: 415a adcs r2, r3
|
||
8008038: 602a str r2, [r5, #0]
|
||
800803a: e7ee b.n 800801a <__swhatbuf_r+0x1c>
|
||
800803c: 2340 movs r3, #64 ; 0x40
|
||
800803e: 2000 movs r0, #0
|
||
8008040: 6023 str r3, [r4, #0]
|
||
8008042: b016 add sp, #88 ; 0x58
|
||
8008044: bd70 pop {r4, r5, r6, pc}
|
||
...
|
||
|
||
08008048 <__smakebuf_r>:
|
||
8008048: 898b ldrh r3, [r1, #12]
|
||
800804a: b573 push {r0, r1, r4, r5, r6, lr}
|
||
800804c: 079d lsls r5, r3, #30
|
||
800804e: 4606 mov r6, r0
|
||
8008050: 460c mov r4, r1
|
||
8008052: d507 bpl.n 8008064 <__smakebuf_r+0x1c>
|
||
8008054: f104 0347 add.w r3, r4, #71 ; 0x47
|
||
8008058: 6023 str r3, [r4, #0]
|
||
800805a: 6123 str r3, [r4, #16]
|
||
800805c: 2301 movs r3, #1
|
||
800805e: 6163 str r3, [r4, #20]
|
||
8008060: b002 add sp, #8
|
||
8008062: bd70 pop {r4, r5, r6, pc}
|
||
8008064: 466a mov r2, sp
|
||
8008066: ab01 add r3, sp, #4
|
||
8008068: f7ff ffc9 bl 8007ffe <__swhatbuf_r>
|
||
800806c: 9900 ldr r1, [sp, #0]
|
||
800806e: 4605 mov r5, r0
|
||
8008070: 4630 mov r0, r6
|
||
8008072: f7fd fadb bl 800562c <_malloc_r>
|
||
8008076: b948 cbnz r0, 800808c <__smakebuf_r+0x44>
|
||
8008078: f9b4 300c ldrsh.w r3, [r4, #12]
|
||
800807c: 059a lsls r2, r3, #22
|
||
800807e: d4ef bmi.n 8008060 <__smakebuf_r+0x18>
|
||
8008080: f023 0303 bic.w r3, r3, #3
|
||
8008084: f043 0302 orr.w r3, r3, #2
|
||
8008088: 81a3 strh r3, [r4, #12]
|
||
800808a: e7e3 b.n 8008054 <__smakebuf_r+0xc>
|
||
800808c: 4b0d ldr r3, [pc, #52] ; (80080c4 <__smakebuf_r+0x7c>)
|
||
800808e: 62b3 str r3, [r6, #40] ; 0x28
|
||
8008090: 89a3 ldrh r3, [r4, #12]
|
||
8008092: 6020 str r0, [r4, #0]
|
||
8008094: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
8008098: 81a3 strh r3, [r4, #12]
|
||
800809a: 9b00 ldr r3, [sp, #0]
|
||
800809c: 6120 str r0, [r4, #16]
|
||
800809e: 6163 str r3, [r4, #20]
|
||
80080a0: 9b01 ldr r3, [sp, #4]
|
||
80080a2: b15b cbz r3, 80080bc <__smakebuf_r+0x74>
|
||
80080a4: 4630 mov r0, r6
|
||
80080a6: f9b4 100e ldrsh.w r1, [r4, #14]
|
||
80080aa: f000 f8d1 bl 8008250 <_isatty_r>
|
||
80080ae: b128 cbz r0, 80080bc <__smakebuf_r+0x74>
|
||
80080b0: 89a3 ldrh r3, [r4, #12]
|
||
80080b2: f023 0303 bic.w r3, r3, #3
|
||
80080b6: f043 0301 orr.w r3, r3, #1
|
||
80080ba: 81a3 strh r3, [r4, #12]
|
||
80080bc: 89a0 ldrh r0, [r4, #12]
|
||
80080be: 4305 orrs r5, r0
|
||
80080c0: 81a5 strh r5, [r4, #12]
|
||
80080c2: e7cd b.n 8008060 <__smakebuf_r+0x18>
|
||
80080c4: 08007e5d .word 0x08007e5d
|
||
|
||
080080c8 <_malloc_usable_size_r>:
|
||
80080c8: f851 3c04 ldr.w r3, [r1, #-4]
|
||
80080cc: 1f18 subs r0, r3, #4
|
||
80080ce: 2b00 cmp r3, #0
|
||
80080d0: bfbc itt lt
|
||
80080d2: 580b ldrlt r3, [r1, r0]
|
||
80080d4: 18c0 addlt r0, r0, r3
|
||
80080d6: 4770 bx lr
|
||
|
||
080080d8 <_raise_r>:
|
||
80080d8: 291f cmp r1, #31
|
||
80080da: b538 push {r3, r4, r5, lr}
|
||
80080dc: 4604 mov r4, r0
|
||
80080de: 460d mov r5, r1
|
||
80080e0: d904 bls.n 80080ec <_raise_r+0x14>
|
||
80080e2: 2316 movs r3, #22
|
||
80080e4: 6003 str r3, [r0, #0]
|
||
80080e6: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
80080ea: bd38 pop {r3, r4, r5, pc}
|
||
80080ec: 6c42 ldr r2, [r0, #68] ; 0x44
|
||
80080ee: b112 cbz r2, 80080f6 <_raise_r+0x1e>
|
||
80080f0: f852 3021 ldr.w r3, [r2, r1, lsl #2]
|
||
80080f4: b94b cbnz r3, 800810a <_raise_r+0x32>
|
||
80080f6: 4620 mov r0, r4
|
||
80080f8: f000 f830 bl 800815c <_getpid_r>
|
||
80080fc: 462a mov r2, r5
|
||
80080fe: 4601 mov r1, r0
|
||
8008100: 4620 mov r0, r4
|
||
8008102: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
||
8008106: f000 b817 b.w 8008138 <_kill_r>
|
||
800810a: 2b01 cmp r3, #1
|
||
800810c: d00a beq.n 8008124 <_raise_r+0x4c>
|
||
800810e: 1c59 adds r1, r3, #1
|
||
8008110: d103 bne.n 800811a <_raise_r+0x42>
|
||
8008112: 2316 movs r3, #22
|
||
8008114: 6003 str r3, [r0, #0]
|
||
8008116: 2001 movs r0, #1
|
||
8008118: e7e7 b.n 80080ea <_raise_r+0x12>
|
||
800811a: 2400 movs r4, #0
|
||
800811c: 4628 mov r0, r5
|
||
800811e: f842 4025 str.w r4, [r2, r5, lsl #2]
|
||
8008122: 4798 blx r3
|
||
8008124: 2000 movs r0, #0
|
||
8008126: e7e0 b.n 80080ea <_raise_r+0x12>
|
||
|
||
08008128 <raise>:
|
||
8008128: 4b02 ldr r3, [pc, #8] ; (8008134 <raise+0xc>)
|
||
800812a: 4601 mov r1, r0
|
||
800812c: 6818 ldr r0, [r3, #0]
|
||
800812e: f7ff bfd3 b.w 80080d8 <_raise_r>
|
||
8008132: bf00 nop
|
||
8008134: 2000000c .word 0x2000000c
|
||
|
||
08008138 <_kill_r>:
|
||
8008138: b538 push {r3, r4, r5, lr}
|
||
800813a: 2300 movs r3, #0
|
||
800813c: 4d06 ldr r5, [pc, #24] ; (8008158 <_kill_r+0x20>)
|
||
800813e: 4604 mov r4, r0
|
||
8008140: 4608 mov r0, r1
|
||
8008142: 4611 mov r1, r2
|
||
8008144: 602b str r3, [r5, #0]
|
||
8008146: f7f9 fa61 bl 800160c <_kill>
|
||
800814a: 1c43 adds r3, r0, #1
|
||
800814c: d102 bne.n 8008154 <_kill_r+0x1c>
|
||
800814e: 682b ldr r3, [r5, #0]
|
||
8008150: b103 cbz r3, 8008154 <_kill_r+0x1c>
|
||
8008152: 6023 str r3, [r4, #0]
|
||
8008154: bd38 pop {r3, r4, r5, pc}
|
||
8008156: bf00 nop
|
||
8008158: 200002f0 .word 0x200002f0
|
||
|
||
0800815c <_getpid_r>:
|
||
800815c: f7f9 ba4f b.w 80015fe <_getpid>
|
||
|
||
08008160 <__sread>:
|
||
8008160: b510 push {r4, lr}
|
||
8008162: 460c mov r4, r1
|
||
8008164: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
8008168: f000 f894 bl 8008294 <_read_r>
|
||
800816c: 2800 cmp r0, #0
|
||
800816e: bfab itete ge
|
||
8008170: 6d63 ldrge r3, [r4, #84] ; 0x54
|
||
8008172: 89a3 ldrhlt r3, [r4, #12]
|
||
8008174: 181b addge r3, r3, r0
|
||
8008176: f423 5380 biclt.w r3, r3, #4096 ; 0x1000
|
||
800817a: bfac ite ge
|
||
800817c: 6563 strge r3, [r4, #84] ; 0x54
|
||
800817e: 81a3 strhlt r3, [r4, #12]
|
||
8008180: bd10 pop {r4, pc}
|
||
|
||
08008182 <__swrite>:
|
||
8008182: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||
8008186: 461f mov r7, r3
|
||
8008188: 898b ldrh r3, [r1, #12]
|
||
800818a: 4605 mov r5, r0
|
||
800818c: 05db lsls r3, r3, #23
|
||
800818e: 460c mov r4, r1
|
||
8008190: 4616 mov r6, r2
|
||
8008192: d505 bpl.n 80081a0 <__swrite+0x1e>
|
||
8008194: 2302 movs r3, #2
|
||
8008196: 2200 movs r2, #0
|
||
8008198: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
800819c: f000 f868 bl 8008270 <_lseek_r>
|
||
80081a0: 89a3 ldrh r3, [r4, #12]
|
||
80081a2: 4632 mov r2, r6
|
||
80081a4: f423 5380 bic.w r3, r3, #4096 ; 0x1000
|
||
80081a8: 81a3 strh r3, [r4, #12]
|
||
80081aa: 4628 mov r0, r5
|
||
80081ac: 463b mov r3, r7
|
||
80081ae: f9b4 100e ldrsh.w r1, [r4, #14]
|
||
80081b2: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
|
||
80081b6: f000 b817 b.w 80081e8 <_write_r>
|
||
|
||
080081ba <__sseek>:
|
||
80081ba: b510 push {r4, lr}
|
||
80081bc: 460c mov r4, r1
|
||
80081be: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
80081c2: f000 f855 bl 8008270 <_lseek_r>
|
||
80081c6: 1c43 adds r3, r0, #1
|
||
80081c8: 89a3 ldrh r3, [r4, #12]
|
||
80081ca: bf15 itete ne
|
||
80081cc: 6560 strne r0, [r4, #84] ; 0x54
|
||
80081ce: f423 5380 biceq.w r3, r3, #4096 ; 0x1000
|
||
80081d2: f443 5380 orrne.w r3, r3, #4096 ; 0x1000
|
||
80081d6: 81a3 strheq r3, [r4, #12]
|
||
80081d8: bf18 it ne
|
||
80081da: 81a3 strhne r3, [r4, #12]
|
||
80081dc: bd10 pop {r4, pc}
|
||
|
||
080081de <__sclose>:
|
||
80081de: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
80081e2: f000 b813 b.w 800820c <_close_r>
|
||
...
|
||
|
||
080081e8 <_write_r>:
|
||
80081e8: b538 push {r3, r4, r5, lr}
|
||
80081ea: 4604 mov r4, r0
|
||
80081ec: 4608 mov r0, r1
|
||
80081ee: 4611 mov r1, r2
|
||
80081f0: 2200 movs r2, #0
|
||
80081f2: 4d05 ldr r5, [pc, #20] ; (8008208 <_write_r+0x20>)
|
||
80081f4: 602a str r2, [r5, #0]
|
||
80081f6: 461a mov r2, r3
|
||
80081f8: f7f9 fa3f bl 800167a <_write>
|
||
80081fc: 1c43 adds r3, r0, #1
|
||
80081fe: d102 bne.n 8008206 <_write_r+0x1e>
|
||
8008200: 682b ldr r3, [r5, #0]
|
||
8008202: b103 cbz r3, 8008206 <_write_r+0x1e>
|
||
8008204: 6023 str r3, [r4, #0]
|
||
8008206: bd38 pop {r3, r4, r5, pc}
|
||
8008208: 200002f0 .word 0x200002f0
|
||
|
||
0800820c <_close_r>:
|
||
800820c: b538 push {r3, r4, r5, lr}
|
||
800820e: 2300 movs r3, #0
|
||
8008210: 4d05 ldr r5, [pc, #20] ; (8008228 <_close_r+0x1c>)
|
||
8008212: 4604 mov r4, r0
|
||
8008214: 4608 mov r0, r1
|
||
8008216: 602b str r3, [r5, #0]
|
||
8008218: f7f9 fa4b bl 80016b2 <_close>
|
||
800821c: 1c43 adds r3, r0, #1
|
||
800821e: d102 bne.n 8008226 <_close_r+0x1a>
|
||
8008220: 682b ldr r3, [r5, #0]
|
||
8008222: b103 cbz r3, 8008226 <_close_r+0x1a>
|
||
8008224: 6023 str r3, [r4, #0]
|
||
8008226: bd38 pop {r3, r4, r5, pc}
|
||
8008228: 200002f0 .word 0x200002f0
|
||
|
||
0800822c <_fstat_r>:
|
||
800822c: b538 push {r3, r4, r5, lr}
|
||
800822e: 2300 movs r3, #0
|
||
8008230: 4d06 ldr r5, [pc, #24] ; (800824c <_fstat_r+0x20>)
|
||
8008232: 4604 mov r4, r0
|
||
8008234: 4608 mov r0, r1
|
||
8008236: 4611 mov r1, r2
|
||
8008238: 602b str r3, [r5, #0]
|
||
800823a: f7f9 fa45 bl 80016c8 <_fstat>
|
||
800823e: 1c43 adds r3, r0, #1
|
||
8008240: d102 bne.n 8008248 <_fstat_r+0x1c>
|
||
8008242: 682b ldr r3, [r5, #0]
|
||
8008244: b103 cbz r3, 8008248 <_fstat_r+0x1c>
|
||
8008246: 6023 str r3, [r4, #0]
|
||
8008248: bd38 pop {r3, r4, r5, pc}
|
||
800824a: bf00 nop
|
||
800824c: 200002f0 .word 0x200002f0
|
||
|
||
08008250 <_isatty_r>:
|
||
8008250: b538 push {r3, r4, r5, lr}
|
||
8008252: 2300 movs r3, #0
|
||
8008254: 4d05 ldr r5, [pc, #20] ; (800826c <_isatty_r+0x1c>)
|
||
8008256: 4604 mov r4, r0
|
||
8008258: 4608 mov r0, r1
|
||
800825a: 602b str r3, [r5, #0]
|
||
800825c: f7f9 fa43 bl 80016e6 <_isatty>
|
||
8008260: 1c43 adds r3, r0, #1
|
||
8008262: d102 bne.n 800826a <_isatty_r+0x1a>
|
||
8008264: 682b ldr r3, [r5, #0]
|
||
8008266: b103 cbz r3, 800826a <_isatty_r+0x1a>
|
||
8008268: 6023 str r3, [r4, #0]
|
||
800826a: bd38 pop {r3, r4, r5, pc}
|
||
800826c: 200002f0 .word 0x200002f0
|
||
|
||
08008270 <_lseek_r>:
|
||
8008270: b538 push {r3, r4, r5, lr}
|
||
8008272: 4604 mov r4, r0
|
||
8008274: 4608 mov r0, r1
|
||
8008276: 4611 mov r1, r2
|
||
8008278: 2200 movs r2, #0
|
||
800827a: 4d05 ldr r5, [pc, #20] ; (8008290 <_lseek_r+0x20>)
|
||
800827c: 602a str r2, [r5, #0]
|
||
800827e: 461a mov r2, r3
|
||
8008280: f7f9 fa3b bl 80016fa <_lseek>
|
||
8008284: 1c43 adds r3, r0, #1
|
||
8008286: d102 bne.n 800828e <_lseek_r+0x1e>
|
||
8008288: 682b ldr r3, [r5, #0]
|
||
800828a: b103 cbz r3, 800828e <_lseek_r+0x1e>
|
||
800828c: 6023 str r3, [r4, #0]
|
||
800828e: bd38 pop {r3, r4, r5, pc}
|
||
8008290: 200002f0 .word 0x200002f0
|
||
|
||
08008294 <_read_r>:
|
||
8008294: b538 push {r3, r4, r5, lr}
|
||
8008296: 4604 mov r4, r0
|
||
8008298: 4608 mov r0, r1
|
||
800829a: 4611 mov r1, r2
|
||
800829c: 2200 movs r2, #0
|
||
800829e: 4d05 ldr r5, [pc, #20] ; (80082b4 <_read_r+0x20>)
|
||
80082a0: 602a str r2, [r5, #0]
|
||
80082a2: 461a mov r2, r3
|
||
80082a4: f7f9 f9cc bl 8001640 <_read>
|
||
80082a8: 1c43 adds r3, r0, #1
|
||
80082aa: d102 bne.n 80082b2 <_read_r+0x1e>
|
||
80082ac: 682b ldr r3, [r5, #0]
|
||
80082ae: b103 cbz r3, 80082b2 <_read_r+0x1e>
|
||
80082b0: 6023 str r3, [r4, #0]
|
||
80082b2: bd38 pop {r3, r4, r5, pc}
|
||
80082b4: 200002f0 .word 0x200002f0
|
||
|
||
080082b8 <_init>:
|
||
80082b8: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
80082ba: bf00 nop
|
||
80082bc: bcf8 pop {r3, r4, r5, r6, r7}
|
||
80082be: bc08 pop {r3}
|
||
80082c0: 469e mov lr, r3
|
||
80082c2: 4770 bx lr
|
||
|
||
080082c4 <_fini>:
|
||
80082c4: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
80082c6: bf00 nop
|
||
80082c8: bcf8 pop {r3, r4, r5, r6, r7}
|
||
80082ca: bc08 pop {r3}
|
||
80082cc: 469e mov lr, r3
|
||
80082ce: 4770 bx lr
|