Update Heltec Tracker v2 to version KCT8103L. (#9822)
* Update Heltec Tracker v2 to version KCT8103L. * Fixed the issue of inaccurate comments. --------- Co-authored-by: Ben Meadors <benmmeadors@gmail.com>
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@@ -65,12 +65,12 @@
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// Pin mapping:
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// CPS (pin 5) -> SX1262 DIO2: TX/RX path select (automatic via SX126X_DIO2_AS_RF_SWITCH)
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// CSD (pin 4) -> GPIO2: Chip enable (HIGH=on, LOW=shutdown)
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// CTX (pin 6) -> GPIO5: Switch between Receive LNA Mode and Receive Bypass Mode. (HIGH=bypass PA, LOW=LNA)
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// CTX (pin 6) -> GPIO5: Switch between Receive LNA Mode and Receive Bypass Mode. (HIGH=RX bypass, LOW=RX LNA)
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// VCC0/VCC1 -> Vfem via U3 LDO, controlled by GPIO7
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// KCT8103L FEM: TX/RX path switching is handled by DIO2 -> CPS pin (via SX126X_DIO2_AS_RF_SWITCH)
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#define LORA_KCT8103L_PA_CSD 2 // CSD - KCT8103L chip enable (HIGH=on)
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#define LORA_KCT8103L_PA_CTX 5 // CTX - Switch between Receive LNA Mode and Receive Bypass Mode. (HIGH=bypass PA, LOW=LNA)
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#define LORA_KCT8103L_PA_CTX 5 // CTX - Switch between Receive LNA Mode and Receive Bypass Mode. (HIGH=RX bypass, LOW=RX LNA)
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#if HAS_TFT
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#define USE_TFTDISPLAY 1
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@@ -13,8 +13,8 @@
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static const uint8_t TX = 43;
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static const uint8_t RX = 44;
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static const uint8_t SDA = 5;
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static const uint8_t SCL = 6;
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static const uint8_t SDA = 6;
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static const uint8_t SCL = 17;
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static const uint8_t SS = 8;
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static const uint8_t MOSI = 10;
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@@ -73,29 +73,22 @@
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#define SX126X_DIO2_AS_RF_SWITCH
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#define SX126X_DIO3_TCXO_VOLTAGE 1.8
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// ---- GC1109 RF FRONT END CONFIGURATION ----
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// The Heltec Wireless Tracker V2 uses a GC1109 FEM chip with integrated PA and LNA
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// RF path: SX1262 -> GC1109 PA -> Pi attenuator -> Antenna
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// Measured net TX gain (non-linear due to PA compression):
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// +11dB at 0-15dBm input (e.g., 10dBm in -> 21dBm out)
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// +10dB at 16-17dBm input
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// +9dB at 18-19dBm input
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// +7dB at 21dBm input (e.g., 21dBm in -> 28dBm out max)
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// Control logic (from GC1109 datasheet):
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// ---- KCT8103L RF FRONT END CONFIGURATION ----
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// The heltec_wireless_tracker_v2 uses a KCT8103L FEM chip with integrated PA and LNA
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// RF path: SX1262 -> Pi attenuator -> KCT8103L PA -> Antenna
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// Control logic (from KCT8103L datasheet):
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// Transmit PA: CSD=1, CTX=1, CPS=1
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// Receive LNA: CSD=1, CTX=0, CPS=X (21dB gain, 1.9dB NF)
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// Receive bypass: CSD=1, CTX=1, CPS=0
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// Shutdown: CSD=0, CTX=X, CPS=X
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// Receive LNA: CSD=1, CTX=0, CPS=X (17dB gain, 2dB NF)
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// Transmit bypass: CSD=1, CTX=1, CPS=0 (~1dB loss, no PA)
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// Transmit PA: CSD=1, CTX=1, CPS=1 (full PA enabled)
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// Pin mapping:
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// CTX (pin 6) -> SX1262 DIO2: TX/RX path select (automatic via SX126X_DIO2_AS_RF_SWITCH)
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// CPS (pin 5) -> SX1262 DIO2: TX/RX path select (automatic via SX126X_DIO2_AS_RF_SWITCH)
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// CSD (pin 4) -> GPIO4: Chip enable (HIGH=on, LOW=shutdown)
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// CPS (pin 5) -> GPIO46: PA mode select (HIGH=full PA, LOW=bypass)
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// CTX (pin 6) -> GPIO5: Switch between Receive LNA Mode and Receive Bypass Mode. (HIGH=RX bypass, LOW=RX LNA)
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// VCC0/VCC1 -> Vfem via U3 LDO, controlled by GPIO7
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#define USE_GC1109_PA
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#define LORA_PA_POWER 7 // VFEM_Ctrl - GC1109 LDO power enable
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#define LORA_GC1109_PA_EN 4 // CSD - GC1109 chip enable (HIGH=on)
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#define LORA_GC1109_PA_TX_EN 46 // CPS - GC1109 PA mode (HIGH=full PA, LOW=bypass)
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// KCT8103L FEM: TX/RX path switching is handled by DIO2 -> CPS pin (via SX126X_DIO2_AS_RF_SWITCH)
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// GC1109 FEM: TX/RX path switching is handled by DIO2 -> CTX pin (via SX126X_DIO2_AS_RF_SWITCH)
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// GPIO46 is CPS (PA mode), not TX control - setTransmitEnable() handles it in SX126xInterface.cpp
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// Do NOT use SX126X_TXEN/RXEN as that would cause double-control of GPIO46
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#define USE_KCT8103L_PA
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#define LORA_PA_POWER 7 // VFEM_Ctrl - KCT8103L LDO power enable
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#define LORA_KCT8103L_PA_CSD 4 // CSD - KCT8103L chip enable (HIGH=on)
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#define LORA_KCT8103L_PA_CTX 5 // CTX - Switch between Receive LNA Mode and Receive Bypass Mode. (HIGH=RX bypass, LOW=RX LNA)
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