Multi gpiochip support for native environment (#5743)

* For each GPIO PIN, allow to specify gpiochip and line

* Added support for LLCC68 in native env.

* Removed one if by employing &&

* Fix for log, as std::string and not const char*

* Remove CH341 flag, enabling it for all LoRa chips

* Provide a default example

---------

Co-authored-by: Ben Meadors <benmmeadors@gmail.com>
Co-authored-by: Jonathan Bennett <jbennett@incomsystems.biz>
This commit is contained in:
Patrick Siegl
2025-01-12 13:40:25 -06:00
committed by GitHub
co-authored by GitHub Ben Meadors Jonathan Bennett
parent 0cf4a2951a
commit 70296b47bc
7 changed files with 237 additions and 229 deletions
+43 -2
View File
@@ -23,6 +23,47 @@ Lora:
# Busy: 20
# Reset: 18
### The Radxa Zero 3E/W employs multiple gpio chips.
### Each gpio pin must be unique, but can be assigned to a specific gpio chip and line.
### In case solely a no. is given, the default gpio chip and pin == line will be employed.
###
# Module: sx1262 # Radxa Zero 3E/W + Ebyte E22-900M30S
# DIO2_AS_RF_SWITCH: true
# DIO3_TCXO_VOLTAGE: 1.8
# CS: # NSS PIN_24 -> chip 4, line 22
# pin: 24
# gpiochip: 4
# line: 22
# SCK: # SCK PIN_23 -> chip 4, line 18
# pin: 23
# gpiochip: 4
# line: 18
# Busy: # BUSY PIN_29 -> chip 3!, line 11
# pin: 29
# gpiochip: 3
# line: 11
# MOSI: # MOSI PIN_19 -> chip 4, line 19
# pin: 19
# gpiochip: 4
# line: 19
# MISO: # MISO PIN_21 -> chip 4, line 21
# pin: 21
# gpiochip: 4
# line: 21
# Reset: # NRST PIN_27 -> chip 4, line 10
# pin: 27
# gpiochip: 4
# line: 10
# IRQ: # DIO1 PIN_28 -> chip 4, line 11
# pin: 28
# gpiochip: 4
# line: 11
# RXen: # RXEN PIN_22 -> chip 3!, line 17
# pin: 22
# gpiochip: 3
# line: 17
# TXen: RADIOLIB_NC # TXEN no PIN, no line, fallback to default gpio chip
# Module: sx1268 # SX1268-based modules, tested with Ebyte E22 400M33S
# CS: 21
# IRQ: 16
@@ -39,7 +80,7 @@ Lora:
# spiSpeed: 2000000
### Set gpio chip to use in /dev/. Defaults to 0.
### Set default/fallback gpio chip to use in /dev/. Defaults to 0.
### Notably the Raspberry Pi 5 puts the GPIO header on gpiochip4
# gpiochip: 4
@@ -147,4 +188,4 @@ General:
MaxMessageQueue: 100
ConfigDirectory: /etc/meshtasticd/config.d/
# MACAddress: AA:BB:CC:DD:EE:FF
# MACAddressSource: eth0
# MACAddressSource: eth0