From 839cf554b7fe0d81c0f4579c2492d806ab7aaf11 Mon Sep 17 00:00:00 2001 From: Austin Date: Fri, 10 Apr 2026 12:21:23 -0400 Subject: [PATCH] meshtasticd: Add configs for ebyte-ecb41-pge (mPWRD-OS) (#10086) These configs were generated programatically by Opus 4.6. See: https://github.com/vidplace7/meshtasticd-40pin Tested with MeshAdv-Pi, other pinmaps are untested but should work. --- .../lora-ecb41-pge-MeshAdv-900M30S.yaml | 39 +++++++++++++++++++ .../lora-ecb41-pge-MeshAdv-Mini-900M22S.yaml | 33 ++++++++++++++++ .../lora-ecb41-pge-RAK6421-13300-slot1.yaml | 38 ++++++++++++++++++ .../lora-ecb41-pge-RAK6421-13300-slot2.yaml | 36 +++++++++++++++++ .../lora-ecb41-pge-RAK6421-13302-slot1.yaml | 39 +++++++++++++++++++ .../lora-ecb41-pge-RAK6421-13302-slot2.yaml | 37 ++++++++++++++++++ .../lora-ecb41-pge-waveshare-sxxx.yaml | 30 ++++++++++++++ 7 files changed, 252 insertions(+) create mode 100644 bin/config.d/lora-ecb41-pge-MeshAdv-900M30S.yaml create mode 100644 bin/config.d/lora-ecb41-pge-MeshAdv-Mini-900M22S.yaml create mode 100644 bin/config.d/lora-ecb41-pge-RAK6421-13300-slot1.yaml create mode 100644 bin/config.d/lora-ecb41-pge-RAK6421-13300-slot2.yaml create mode 100644 bin/config.d/lora-ecb41-pge-RAK6421-13302-slot1.yaml create mode 100644 bin/config.d/lora-ecb41-pge-RAK6421-13302-slot2.yaml create mode 100644 bin/config.d/lora-ecb41-pge-waveshare-sxxx.yaml diff --git a/bin/config.d/lora-ecb41-pge-MeshAdv-900M30S.yaml b/bin/config.d/lora-ecb41-pge-MeshAdv-900M30S.yaml new file mode 100644 index 000000000..25fd5e359 --- /dev/null +++ b/bin/config.d/lora-ecb41-pge-MeshAdv-900M30S.yaml @@ -0,0 +1,39 @@ +# MeshAdv-Pi E22-900M30S +# https://github.com/chrismyers2000/MeshAdv-Pi-Hat +Meta: + name: MeshAdv-Pi E22-900M30S + support: community + compatible: + - ebyte-ecb41-pge # Armbian + +Lora: + Module: sx1262 + CS: # GPIO0_A1 (physical 40) + pin: 1 + gpiochip: 0 + line: 1 + IRQ: # GPIO0_A3 (physical 36) + pin: 3 + gpiochip: 0 + line: 3 + Busy: # GPIO0_A0 (physical 38) + pin: 0 + gpiochip: 0 + line: 0 + Reset: # GPIO0_B4 (physical 12) + pin: 12 + gpiochip: 0 + line: 12 + TXen: # GPIO1_D1 (physical 33) + pin: 57 + gpiochip: 1 + line: 25 + RXen: # GPIO1_B3 (physical 32) + pin: 43 + gpiochip: 1 + line: 11 + DIO3_TCXO_VOLTAGE: true + # Only for E22-900M33S: + # Limit the output power to 8 dBm + # SX126X_MAX_POWER: 8 + spidev: spidev0.0 diff --git a/bin/config.d/lora-ecb41-pge-MeshAdv-Mini-900M22S.yaml b/bin/config.d/lora-ecb41-pge-MeshAdv-Mini-900M22S.yaml new file mode 100644 index 000000000..e1f385312 --- /dev/null +++ b/bin/config.d/lora-ecb41-pge-MeshAdv-Mini-900M22S.yaml @@ -0,0 +1,33 @@ +# MeshAdv Mini E22-900M22S +# https://github.com/chrismyers2000/MeshAdv-Mini +Meta: + name: MeshAdv Mini E22-900M22S + support: community + compatible: + - ebyte-ecb41-pge # Armbian + +Lora: + Module: sx1262 # Ebyte E22-900M22S + CS: # GPIO0_B6 (physical 24, SPI1_CSN0) + pin: 14 + gpiochip: 0 + line: 14 + IRQ: # GPIO0_A3 (physical 36) + pin: 3 + gpiochip: 0 + line: 3 + Busy: # GPIO0_A0 (physical 38) + pin: 0 + gpiochip: 0 + line: 0 + Reset: # GPIO1_C3 (physical 18) + pin: 51 + gpiochip: 1 + line: 19 + RXen: # GPIO1_B3 (physical 32) + pin: 43 + gpiochip: 1 + line: 11 + DIO2_AS_RF_SWITCH: true + DIO3_TCXO_VOLTAGE: true + spidev: spidev0.0 diff --git a/bin/config.d/lora-ecb41-pge-RAK6421-13300-slot1.yaml b/bin/config.d/lora-ecb41-pge-RAK6421-13300-slot1.yaml new file mode 100644 index 000000000..8782876ac --- /dev/null +++ b/bin/config.d/lora-ecb41-pge-RAK6421-13300-slot1.yaml @@ -0,0 +1,38 @@ +Meta: + name: RAK6421 + RAK13300 Slot 1 + support: community # Promote when tested + compatible: + - ebyte-ecb41-pge # Armbian + +Lora: + Module: sx1262 + IRQ: # GPIO0_A5 (IO6, physical 15) + pin: 5 + gpiochip: 0 + line: 5 + Reset: # GPIO0_A3 (IO4, physical 36) + pin: 3 + gpiochip: 0 + line: 3 + Busy: # GPIO1_C3 (IO5, physical 18) + pin: 51 + gpiochip: 1 + line: 19 + # Ant_sw: # GPIO1_C2 (IO3, physical 16) + # pin: 50 + # gpiochip: 1 + # line: 18 + Enable_Pins: + - pin: 43 # GPIO1_B3 (physical 32) + gpiochip: 1 + line: 11 + - pin: 57 # GPIO1_D1 (physical 33) + gpiochip: 1 + line: 25 + DIO3_TCXO_VOLTAGE: true + DIO2_AS_RF_SWITCH: true + spidev: spidev0.0 + # CS: # GPIO0_B6 (SPI1_CSN0, physical 24) + # pin: 14 + # gpiochip: 0 + # line: 14 diff --git a/bin/config.d/lora-ecb41-pge-RAK6421-13300-slot2.yaml b/bin/config.d/lora-ecb41-pge-RAK6421-13300-slot2.yaml new file mode 100644 index 000000000..e0ef946d9 --- /dev/null +++ b/bin/config.d/lora-ecb41-pge-RAK6421-13300-slot2.yaml @@ -0,0 +1,36 @@ +Meta: + name: RAK6421 + RAK13300 Slot 2 + support: community # Promote when tested + compatible: + - ebyte-ecb41-pge # Armbian + +Lora: + Module: sx1262 + IRQ: # GPIO0_B4 (IO6, physical 12) + pin: 12 + gpiochip: 0 + line: 12 + Reset: # GPIO1_C3 (IO4, physical 18) + pin: 51 + gpiochip: 1 + line: 19 + Busy: # GPIO0_B3 (IO5, physical 35) + pin: 11 + gpiochip: 0 + line: 11 + # Ant_sw: # GPIO1_C2 (IO3, physical 16) + # pin: 50 + # gpiochip: 1 + # line: 18 + Enable_Pins: + - pin: 2 # GPIO0_A2 (physical 37) + gpiochip: 0 + line: 2 + - pin: 50 # GPIO1_C2 (physical 16) + gpiochip: 1 + line: 18 + spidev: spidev0.1 + # CS: # GPIO0_A7 (SPI1_CSN1, physical 26) + # pin: 7 + # gpiochip: 0 + # line: 7 diff --git a/bin/config.d/lora-ecb41-pge-RAK6421-13302-slot1.yaml b/bin/config.d/lora-ecb41-pge-RAK6421-13302-slot1.yaml new file mode 100644 index 000000000..374be8e35 --- /dev/null +++ b/bin/config.d/lora-ecb41-pge-RAK6421-13302-slot1.yaml @@ -0,0 +1,39 @@ +Meta: + name: RAK6421 + RAK13302 Slot 1 + support: community # Promote when tested + compatible: + - ebyte-ecb41-pge # Armbian + +Lora: + Module: sx1262 + IRQ: # GPIO0_A5 (IO6, physical 15) + pin: 5 + gpiochip: 0 + line: 5 + Reset: # GPIO0_A3 (IO4, physical 36) + pin: 3 + gpiochip: 0 + line: 3 + Busy: # GPIO1_C3 (IO5, physical 18) + pin: 51 + gpiochip: 1 + line: 19 + # Ant_sw: # GPIO1_C2 (IO3, physical 16) + # pin: 50 + # gpiochip: 1 + # line: 18 + Enable_Pins: + - pin: 43 # GPIO1_B3 (physical 32) + gpiochip: 1 + line: 11 + - pin: 57 # GPIO1_D1 (physical 33) + gpiochip: 1 + line: 25 + DIO3_TCXO_VOLTAGE: true + DIO2_AS_RF_SWITCH: true + spidev: spidev0.0 + # CS: # GPIO0_B6 (SPI1_CSN0, physical 24) + # pin: 14 + # gpiochip: 0 + # line: 14 + TX_GAIN_LORA: [9, 9, 10, 11, 9, 8, 9, 10, 10, 10, 11, 12, 12, 12, 12, 12, 12, 12, 12, 10, 9, 8] diff --git a/bin/config.d/lora-ecb41-pge-RAK6421-13302-slot2.yaml b/bin/config.d/lora-ecb41-pge-RAK6421-13302-slot2.yaml new file mode 100644 index 000000000..5548bc5c7 --- /dev/null +++ b/bin/config.d/lora-ecb41-pge-RAK6421-13302-slot2.yaml @@ -0,0 +1,37 @@ +Meta: + name: RAK6421 + RAK13302 Slot 2 + support: community # Promote when tested + compatible: + - ebyte-ecb41-pge # Armbian + +Lora: + Module: sx1262 + IRQ: # GPIO0_B4 (IO6, physical 12) + pin: 12 + gpiochip: 0 + line: 12 + Reset: # GPIO1_C3 (IO4, physical 18) + pin: 51 + gpiochip: 1 + line: 19 + Busy: # GPIO0_B3 (IO5, physical 35) + pin: 11 + gpiochip: 0 + line: 11 + # Ant_sw: # GPIO1_C2 (IO3, physical 16) + # pin: 50 + # gpiochip: 1 + # line: 18 + Enable_Pins: + - pin: 2 # GPIO0_A2 (physical 37) + gpiochip: 0 + line: 2 + - pin: 50 # GPIO1_C2 (physical 16) + gpiochip: 1 + line: 18 + spidev: spidev0.1 + # CS: # GPIO0_A7 (SPI1_CSN1, physical 26) + # pin: 7 + # gpiochip: 0 + # line: 7 + TX_GAIN_LORA: [9, 9, 10, 11, 9, 8, 9, 10, 10, 10, 11, 12, 12, 12, 12, 12, 12, 12, 12, 10, 9, 8] diff --git a/bin/config.d/lora-ecb41-pge-waveshare-sxxx.yaml b/bin/config.d/lora-ecb41-pge-waveshare-sxxx.yaml new file mode 100644 index 000000000..1253d3e31 --- /dev/null +++ b/bin/config.d/lora-ecb41-pge-waveshare-sxxx.yaml @@ -0,0 +1,30 @@ +Meta: + name: Waveshare SX1262 + support: deprecated + compatible: + - ebyte-ecb41-pge # Armbian + +Lora: + Module: sx1262 # Waveshare SX126X XXXM + DIO2_AS_RF_SWITCH: true + CS: # GPIO0_A1 (physical 40) + pin: 1 + gpiochip: 0 + line: 1 + IRQ: # GPIO0_A3 (physical 36) + pin: 3 + gpiochip: 0 + line: 3 + Busy: # GPIO0_A0 (physical 38) + pin: 0 + gpiochip: 0 + line: 0 + Reset: # GPIO0_B4 (physical 12) + pin: 12 + gpiochip: 0 + line: 12 + SX126X_ANT_SW: # GPIO1_B2 (physical 31) + pin: 42 + gpiochip: 1 + line: 10 + spidev: spidev0.0