一发射就重启

This commit is contained in:
2026-07-19 21:55:33 +08:00
parent 3fe6d65c90
commit 896d4a3f93
4 changed files with 56 additions and 9 deletions
@@ -2,11 +2,11 @@
[env:moonshine_NRF52_node] [env:moonshine_NRF52_node]
extends = nrf52840_base extends = nrf52840_base
board = adafruit_feather_nrf52840 board = adafruit_feather_nrf52840
board_build.ldscript = src/platform/nrf52/nrf52840_s140_v7.ld
build_flags = ${nrf52840_base.build_flags} build_flags = ${nrf52840_base.build_flags}
-I variants/nrf52840/diy/moonshine_NRF52 -I variants/nrf52840/diy/moonshine_NRF52
-D PRIVATE_HW -D PRIVATE_HW
-D USE_SEGGER -D USE_SEGGER
-D CONFIG_GPIO_AS_PINRESET
-D MESHTASTIC_EXCLUDE_I2C=1 -D MESHTASTIC_EXCLUDE_I2C=1
-D MESHTASTIC_EXCLUDE_ENVIRONMENTAL_SENSOR=1 -D MESHTASTIC_EXCLUDE_ENVIRONMENTAL_SENSOR=1
-D MESHTASTIC_EXCLUDE_INPUTBROKER=1 -D MESHTASTIC_EXCLUDE_INPUTBROKER=1
@@ -8,9 +8,11 @@ DIY Meshtastic node variant based on the RF-BM-ND05 nRF52840 module.
- **LF clock**: internal RC (`USE_LFRC`) - RF-BM-ND05 has no 32.768 kHz crystal; using - **LF clock**: internal RC (`USE_LFRC`) - RF-BM-ND05 has no 32.768 kHz crystal; using
`USE_LFXO` without a crystal makes SoftDevice hang in `RTC1_IRQHandler` waiting `USE_LFXO` without a crystal makes SoftDevice hang in `RTC1_IRQHandler` waiting
for LFCLK, causing LED-stuck-on and silent BLE failure. for LFCLK, causing LED-stuck-on and silent BLE failure.
- **LoRa**: E22-400M33S (SX1268 + 33dBm PA, 2W, 433MHz) - `SX126X_MAX_POWER=8`, - **LoRa**: E22-400M33S (SX1268 + 33dBm PA, 2W, 433MHz) - `SX126X_MAX_POWER=2`,
`TX_GAIN_LORA=25` required (22dBm default overdrives PA to ~47dBm, causing current `TX_GAIN_LORA=25`, `SX126X_PA_RAMP_US=0x07` (3400us ramp). PA has no enable pin
spikes and system reset even at low tx_power settings) and draws high transient current on TX; default 22dBm/200us-ramp causes BOD reset.
POFCON disabled in `variant_nrf52LoopHook()` to prevent POFWARN -> lfs_assert
-> reboot chain.
- **GPS**: u-blox (no EN pin) - **GPS**: u-blox (no EN pin)
- **Battery ADC**: 0.5 voltage divider (equal resistors) - **Battery ADC**: 0.5 voltage divider (equal resistors)
@@ -22,6 +22,13 @@
#include "nrf.h" #include "nrf.h"
#include "wiring_constants.h" #include "wiring_constants.h"
#include "wiring_digital.h" #include "wiring_digital.h"
#include "SEGGER_RTT.h"
extern "C" {
#include "nrf_soc.h"
}
static bool pofcon_disabled = false;
const uint32_t g_ADigitalPinMap[] = { const uint32_t g_ADigitalPinMap[] = {
// P0 // P0
@@ -32,7 +39,22 @@ const uint32_t g_ADigitalPinMap[] = {
void initVariant() void initVariant()
{ {
// No dedicated 3V3 enable pin on this board // Configure P0.18 as RESET pin (UICR->PSELRESET).
// nrf52_recover (ERASEALL) clears UICR to 0xFFFFFFFF, disabling reset.
// SystemInit() should do this via CONFIG_GPIO_AS_PINRESET, but that code path
// is not compiled in by the Adafruit core. Write UICR directly here - this
// runs before SoftDevice is enabled, so NVMC is accessible.
if ((NRF_UICR->PSELRESET[0] != 18) || (NRF_UICR->PSELRESET[1] != 18)) {
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {}
NRF_UICR->PSELRESET[0] = 18;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {}
NRF_UICR->PSELRESET[1] = 18;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {}
NVIC_SystemReset(); // Reboot to apply PSELRESET (hardware reconfigures P0.18)
}
} }
void variant_shutdown() void variant_shutdown()
@@ -41,3 +63,24 @@ void variant_shutdown()
nrf_gpio_pin_sense_t sense = NRF_GPIO_PIN_SENSE_LOW; // Configure SENSE signal on low edge nrf_gpio_pin_sense_t sense = NRF_GPIO_PIN_SENSE_LOW; // Configure SENSE signal on low edge
nrf_gpio_cfg_sense_set(BUTTON_PIN, sense); // Apply SENSE to wake up the device from the deep sleep nrf_gpio_cfg_sense_set(BUTTON_PIN, sense); // Apply SENSE to wake up the device from the deep sleep
} }
void variant_nrf52LoopHook(void)
{
// Debug: toggle P0.11 to confirm this hook is called
static bool initialized = false;
if (!initialized) {
nrf_gpio_cfg_output(11);
initialized = true;
}
nrf_gpio_pin_toggle(11);
// Disable POFCON via SoftDevice API - direct NRF_POWER->POFCON writes are
// ignored once SoftDevice is enabled. E22-400M33S TX causes transient VDD
// drops that trigger POFWARN -> lfs_assert -> NVIC_SystemReset.
static uint32_t retry_count = 0;
if (retry_count < 3) {
uint32_t ret = sd_power_pof_enable(0);
SEGGER_RTT_printf(0, "variant_loop: ret=%d POFCON=0x%x\r\n", ret, NRF_POWER->POFCON);
retry_count++;
}
}
@@ -114,11 +114,14 @@ MOONSHINE NRF52 PIN ASSIGNMENT (RF-BM-ND05)
#define USE_SX1268 // E22-400M33S uses SX1268 (433MHz) #define USE_SX1268 // E22-400M33S uses SX1268 (433MHz)
// E22-400M33S: 33dBm/2W module with ~25dB PA gain // E22-400M33S: 33dBm/2W module with ~25dB PA gain
// SX1268 outputs 8dBm -> PA -> 33dBm (2W) // SX1268 outputs 2dBm -> PA -> 27dBm (~500mW), reduced PA current to avoid BOD reset
// 22dBm default would overdrive PA to ~47dBm, causing current spikes and system reset // 22dBm default would overdrive PA to ~47dBm, causing current spikes and system reset
#define SX126X_MAX_POWER 8 #define SX126X_MAX_POWER 2
#define TX_GAIN_LORA 25 #define TX_GAIN_LORA 25
// PA ramp time: 3400us (default 200us), reduce transient current spikes during TX
#define SX126X_PA_RAMP_US 0x07
// SX126X CONFIG // SX126X CONFIG
#define SX126X_CS (0 + 29) // P0.29 FIXME - we really should define LORA_CS instead #define SX126X_CS (0 + 29) // P0.29 FIXME - we really should define LORA_CS instead
#define SX126X_DIO1 (0 + 21) // P0.21 IRQ #define SX126X_DIO1 (0 + 21) // P0.21 IRQ
@@ -126,8 +129,7 @@ MOONSHINE NRF52 PIN ASSIGNMENT (RF-BM-ND05)
// so it needs connecting externally if it is used in this way // so it needs connecting externally if it is used in this way
#define SX126X_BUSY (0 + 22) // P0.22 #define SX126X_BUSY (0 + 22) // P0.22
#define SX126X_RESET (0 + 23) // P0.23 #define SX126X_RESET (0 + 23) // P0.23
#define SX126X_RXEN (0 + 11) // P0.11 #define SX126X_TXEN RADIOLIB_NC // DIO2 controls TXEN directly; RXEN left floating (module default)
#define SX126X_TXEN RADIOLIB_NC // Assuming that DIO2 is connected to TXEN pin. If not, TXEN must be connected.
#define SX126X_DIO3_TCXO_VOLTAGE 1.8 #define SX126X_DIO3_TCXO_VOLTAGE 1.8
#define TCXO_OPTIONAL // make it so that the firmware can try both TCXO and XTAL #define TCXO_OPTIONAL // make it so that the firmware can try both TCXO and XTAL