I thought git would be smart enough to understand all the whitespace changes but even with all the flags I know to make it ignore theses it still blows up if there are identical changes on both sides.
I have a solution but it require creating a new commit at the merge base for each conflicting PR and merging it into develop.
I don't think blowing up all PRs is worth for now, maybe if we can coordinate this for V3 let's say.
This reverts commit 0d11331d18.
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@@ -133,9 +133,8 @@ External serial flash WP25R1635FZUIL0
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#define SX126X_CS (0 + 24) // FIXME - we really should define LORA_CS instead
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#define SX126X_DIO1 (0 + 20)
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// Note DIO2 is attached internally to the module to an analog switch for TX/RX switching
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#define SX1262_DIO3 \
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(0 + 21) // This is used as an *output* from the sx1262 and connected internally to power the tcxo, do not drive from
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// the main
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#define SX1262_DIO3 \
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(0 + 21) // This is used as an *output* from the sx1262 and connected internally to power the tcxo, do not drive from the main
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// CPU?
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#define SX126X_BUSY (0 + 17)
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#define SX126X_RESET (0 + 25)
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@@ -143,8 +142,8 @@ External serial flash WP25R1635FZUIL0
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#define SX126X_DIO2_AS_RF_SWITCH
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#define SX126X_DIO3_TCXO_VOLTAGE 1.8
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#define TCXO_OPTIONAL
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// Internally the TTGO module hooks the SX1262-DIO2 in to control the TX/RX switch (which is the default for the
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// sx1262interface code)
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// Internally the TTGO module hooks the SX1262-DIO2 in to control the TX/RX switch (which is the default for the sx1262interface
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// code)
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// #define LORA_DISABLE_SENDING // Define this to disable transmission for testing (power testing etc...)
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@@ -166,7 +165,8 @@ External serial flash WP25R1635FZUIL0
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#define PIN_POWER_EN (0 + 12)
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// #define PIN_POWER_EN1 (0 + 13)
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#define PIN_SPI1_MISO (32 + 7) // FIXME not really needed, but for now the SPI code requires something to be defined, pick an used GPIO
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#define PIN_SPI1_MISO \
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(32 + 7) // FIXME not really needed, but for now the SPI code requires something to be defined, pick an used GPIO
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#define PIN_SPI1_MOSI PIN_EINK_MOSI
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#define PIN_SPI1_SCK PIN_EINK_SCLK
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