#include /* * Zephyr device tree overlay — Nordic nRF54L15-DK + EBYTE E22-900M30S (SX1262) * * P1 GPIO bank runs at 1.8V VDDIO (LP domain) — NOT compatible with SX1262 * which needs VIH ≥ 2.31V (0.7 × 3.3V). All E22 signals therefore use P2, * which is in the HP domain (3.0V VDDIO), via SPIM00. * * SPIM00 (HP domain, 3.0V) replaces SPIM20 (LP domain, 1.8V). * Default pinctrl from cpuapp_common.dtsi already maps SPIM00 to P2 pins: * MISO = P2.04, MOSI = P2.02, SCK = P2.01 * * The on-board MX25R64 NOR flash was attached to SPIM00; it is not used by * Meshtastic (LittleFS lives in internal RRAM), so we delete its DTS node to * free the bus and P2.05 (its CS pin) for our use. * * Physical wiring (all P2, HP domain): * E22 MISO → P2.04 (SPIM00 MISO) * E22 NSS → P2.05 (freed from MX25R64 CS, RadioLib GPIO) * E22 DIO1 → P2.06 (IRQ — interrupt capable via gpiote30) * E22 BUSY → P2.03 (GPIO input) * E22 RST → P2.00 (GPIO output) * E22 RXEN → P2.07 (held HIGH via ANT_SW; replaces LED2 on DK) * E22 MOSI → P2.02 (SPIM00 MOSI) * E22 SCK → P2.01 (SPIM00 SCK) * * Pin numbering convention: P0.n = n, P1.n = 16+n, P2.n = 32+n. */ /* Disable uart20 — no longer needed for LoRa (P1 domain abandoned). */ &uart20 { status = "disabled"; }; /* Disable uart30 to free P0.00–P0.03 from the uart30_default pinctrl (which * also reserves P0.03 as UART30 CTS). The peripheral instance 30 is shared * with i2c30/spi30 — only one of {UARTE30, TWIM30, SPIM30} can be enabled at * a time. We pick TWIM30 (i2c30) for sensors (SHT40 / INA3221 / SE050 on the * custom PCB; BMP280 / INA228 on the DK for bring-up). Console stays on RTT * via CONFIG_RTT_CONSOLE=y. */ &uart30 { status = "disabled"; }; /* I2C bus via TWIM30 (HP domain, 3.0 V), SDA=P0.03 / SCL=P0.04. * P0.03 was the UART30 CTS; freed by disabling uart30 above. * P0.04 was button SW3 on the DK; deleted below. The pad still routes to * the SW3 button on the board — DO NOT press SW3 during I2C use, it will * short SCL to GND mid-transaction. * 400 kHz is the highest standard rate supported by all three target sensors * (BMP280, INA228, SE050). External 4.7 kΩ pull-ups required on both lines. */ &pinctrl { i2c30_default: i2c30_default { group1 { psels = , ; bias-pull-up; }; }; i2c30_sleep: i2c30_sleep { group1 { psels = , ; low-power-enable; }; }; }; &i2c30 { status = "okay"; clock-frequency = ; /* 400 kHz */ pinctrl-0 = <&i2c30_default>; pinctrl-1 = <&i2c30_sleep>; pinctrl-names = "default", "sleep"; }; / { buttons { /* button1 (P1.09) and button2 (P1.08) no longer repurposed — * E22 now uses P2. button3 (P0.04) is now I2C SCL — its node * must be removed before the i2c30 pinctrl can claim the pad. */ /delete-node/ button_1; /delete-node/ button_2; /delete-node/ button_3; }; aliases { /delete-property/ sw1; /delete-property/ sw2; /delete-property/ sw3; }; }; /* * Override SPIM00 to remove the MX25R64 NOR flash child. * The SPIM00 peripheral itself stays enabled (status = "okay" from * cpuapp_common.dtsi) with its existing pinctrl (P2.01/P2.02/P2.04). * RadioLib drives CS (P2.05) as a plain GPIO — no hardware CS needed. */ &spi00 { /delete-node/ mx25r6435f@0; }; /* * Grow storage_partition from 36 KB to 700 KB by reclaiming slot1_partition. * slot1 (image-1) is the MCUboot secondary slot for dual-bank OTA, which we * don't use (flashing is direct via J-Link). With only 9 blocks (36 KB / 4 KB) * LittleFS ran out of space during COW writes of config.proto. * New layout: storage_partition spans 0xb6000..0x165000 (700 KB, ~175 blocks). */ /delete-node/ &slot1_partition; &storage_partition { reg = <0xb6000 0xaf000>; };