Jonathan BennettandGitHub
fd8ba4fa4e
* Chop down tft-related loooong ifdefs chains * Fix accidental sweep-up of portduino into screen #ifdef refactor
95 lines
3.3 KiB
C
95 lines
3.3 KiB
C
#define LED_POWER 18
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#define _VARIANT_HELTEC_WIRELESS_TRACKER
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// I2C
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#define I2C_SDA SDA
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#define I2C_SCL SCL
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// ST7735S TFT LCD
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#define HAS_SPI_TFT 1
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#define ST7735S 1 // there are different (sub-)versions of ST7735
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#define ST7735_CS 38
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#define ST7735_RS 40 // DC
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#define ST7735_SDA 42 // MOSI
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#define ST7735_SCK 41
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#define ST7735_RESET 39
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#define ST7735_MISO -1
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#define ST7735_BUSY -1
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#define TFT_BL 21
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#define ST7735_SPI_HOST SPI3_HOST
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#define SPI_FREQUENCY 40000000
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#define SPI_READ_FREQUENCY 16000000
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#define SCREEN_ROTATE
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#define TFT_HEIGHT DISPLAY_WIDTH
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#define TFT_WIDTH DISPLAY_HEIGHT
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#define TFT_OFFSET_X 24
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#define TFT_OFFSET_Y 0
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#define TFT_INVERT false
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#define SCREEN_TRANSITION_FRAMERATE 3 // fps
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#define DISPLAY_FORCE_SMALL_FONTS
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#define USE_TFTDISPLAY 1
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#define VEXT_ENABLE 3 // active HIGH - powers the GPS, GPS LNA and OLED
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#define VEXT_ON_VALUE HIGH
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#define BUTTON_PIN 0
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#define BATTERY_PIN 1 // A battery voltage measurement pin, voltage divider connected here to measure battery voltage
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#define ADC_CHANNEL ADC_CHANNEL_0
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#define ADC_ATTENUATION ADC_ATTEN_DB_2_5 // lower dB for high resistance voltage divider
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#define ADC_MULTIPLIER 4.9 * 1.045
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#define ADC_CTRL 2 // active HIGH, powers the voltage divider.
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#define ADC_USE_PULLUP // Use internal pullup/pulldown instead of actively driving the output
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#undef GPS_RX_PIN
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#undef GPS_TX_PIN
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#define GPS_RX_PIN 33
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#define GPS_TX_PIN 34
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#define PIN_GPS_RESET 35
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#define PIN_GPS_PPS 36
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// #define PIN_GPS_EN 3 // Uncomment to power off the GPS with triple-click on Tracker v2, though we'll also lose the
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// display.
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#define GPS_RESET_MODE LOW
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#define GPS_UC6580
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#define GPS_BAUDRATE 115200
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#define USE_SX1262
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#define LORA_DIO0 -1 // a No connect on the SX1262 module
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#define LORA_RESET 12
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#define LORA_DIO1 14 // SX1262 IRQ
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#define LORA_DIO2 13 // SX1262 BUSY
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#define LORA_DIO3 // Not connected on PCB, but internally on the TTGO SX1262, if DIO3 is high the TCXO is enabled
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#define LORA_SCK 9
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#define LORA_MISO 11
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#define LORA_MOSI 10
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#define LORA_CS 8
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#define SX126X_CS LORA_CS
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#define SX126X_DIO1 LORA_DIO1
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#define SX126X_BUSY LORA_DIO2
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#define SX126X_RESET LORA_RESET
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#define SX126X_DIO2_AS_RF_SWITCH
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#define SX126X_DIO3_TCXO_VOLTAGE 1.8
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// ---- KCT8103L RF FRONT END CONFIGURATION ----
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// The heltec_wireless_tracker_v2 uses a KCT8103L FEM chip with integrated PA and LNA
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// RF path: SX1262 -> Pi attenuator -> KCT8103L PA -> Antenna
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// Control logic (from KCT8103L datasheet):
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// Transmit PA: CSD=1, CTX=1, CPS=1
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// Receive LNA: CSD=1, CTX=0, CPS=X (21dB gain, 1.9dB NF)
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// Receive bypass: CSD=1, CTX=1, CPS=0
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// Shutdown: CSD=0, CTX=X, CPS=X
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// Pin mapping:
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// CPS (pin 5) -> SX1262 DIO2: TX/RX path select (automatic via SX126X_DIO2_AS_RF_SWITCH)
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// CSD (pin 4) -> GPIO4: Chip enable (HIGH=on, LOW=shutdown)
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// CTX (pin 6) -> GPIO5: Switch between Receive LNA Mode and Receive Bypass Mode. (HIGH=RX bypass, LOW=RX LNA)
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// VCC0/VCC1 -> Vfem via U3 LDO, controlled by GPIO7
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// KCT8103L FEM: TX/RX path switching is handled by DIO2 -> CPS pin (via SX126X_DIO2_AS_RF_SWITCH)
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#define USE_KCT8103L_PA
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#define LORA_PA_POWER 7 // VFEM_Ctrl - KCT8103L LDO power enable
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#define LORA_KCT8103L_PA_CSD 4 // CSD - KCT8103L chip enable (HIGH=on)
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#define LORA_KCT8103L_PA_CTX 5 // CTX - Switch between Receive LNA Mode and Receive Bypass Mode. (HIGH=RX bypass, LOW=RX LNA)
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