Ben MeadorsandGitHub
829ff80a09
- t5s3-epaper: the board's 3.3V octal (AP_3v3) PSRAM is unreliable at the qio_opi
default of 80MHz (Total PSRAM reads 0, display dead / boot-loop); clock it at 40MHz.
- EInkParallelDisplay: skip EInk init and no-op display ops when the PSRAM framebuffer
is unavailable, so the node boots headless instead of hard-faulting on a NULL buffer.
- src/platform/esp32: weak software __atomic_*_{1,2,4} so esp32s3 links on toolchains
(e.g. macOS) that lack the sized libcalls GCC emits under -mdisable-hardware-atomics.
112 lines
10 KiB
C
112 lines
10 KiB
C
// Weak software __atomic_*_{1,2,4} for ESP32-S2/S3. -mdisable-hardware-atomics makes
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// GCC emit these libcalls, but the precompiled libnewlib ships only the _8 variants and
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// some toolchains' libgcc ships none, so S3 links fail on macOS. Weak = a real libgcc
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// definition wins with no clash. Spinlock/critical-section like IDF's stdatomic.c.
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#include "sdkconfig.h"
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#if defined(CONFIG_IDF_TARGET_ESP32S3) || defined(CONFIG_IDF_TARGET_ESP32S2)
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#include <stdbool.h>
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#include <stdint.h>
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#include "freertos/FreeRTOS.h"
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// These names are GCC builtins; declaring them trips -Wbuiltin-declaration-mismatch
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// (uint32_t vs GCC's unsigned int, same ABI). Suppressed as IDF's stdatomic.c does.
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#pragma GCC diagnostic ignored "-Wbuiltin-declaration-mismatch"
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static portMUX_TYPE s_swatomic_mux = portMUX_INITIALIZER_UNLOCKED;
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#define SWATOMIC_ENTER() portENTER_CRITICAL_SAFE(&s_swatomic_mux)
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#define SWATOMIC_EXIT() portEXIT_CRITICAL_SAFE(&s_swatomic_mux)
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// load / store / exchange / compare_exchange for one width.
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#define GEN_SWATOMIC_CORE(N, TYPE) \
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__attribute__((weak, used)) TYPE __atomic_load_##N(const volatile void *ptr, int memorder) \
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{ \
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(void)memorder; \
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SWATOMIC_ENTER(); \
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TYPE ret = *(const volatile TYPE *)ptr; \
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SWATOMIC_EXIT(); \
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return ret; \
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} \
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__attribute__((weak, used)) void __atomic_store_##N(volatile void *ptr, TYPE val, int memorder) \
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{ \
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(void)memorder; \
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SWATOMIC_ENTER(); \
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*(volatile TYPE *)ptr = val; \
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SWATOMIC_EXIT(); \
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} \
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__attribute__((weak, used)) TYPE __atomic_exchange_##N(volatile void *ptr, TYPE val, int memorder) \
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{ \
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(void)memorder; \
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SWATOMIC_ENTER(); \
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TYPE old = *(volatile TYPE *)ptr; \
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*(volatile TYPE *)ptr = val; \
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SWATOMIC_EXIT(); \
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return old; \
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} \
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__attribute__((weak, used)) bool __atomic_compare_exchange_##N(volatile void *ptr, void *expected, TYPE desired, \
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bool is_weak, int success, int failure) \
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{ \
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(void)is_weak; \
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(void)success; \
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(void)failure; \
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bool ok; \
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SWATOMIC_ENTER(); \
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TYPE cur = *(volatile TYPE *)ptr; \
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if (cur == *(TYPE *)expected) { \
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*(volatile TYPE *)ptr = desired; \
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ok = true; \
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} else { \
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*(TYPE *)expected = cur; \
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ok = false; \
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} \
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SWATOMIC_EXIT(); \
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return ok; \
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}
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// A read-modify-write pair: fetch_<name> returns the old value, <name>_fetch the
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// new. EXPR is evaluated over `old` and `val`.
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#define GEN_SWATOMIC_RMW(N, TYPE, NAME, EXPR) \
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__attribute__((weak, used)) TYPE __atomic_fetch_##NAME##_##N(volatile void *ptr, TYPE val, int memorder) \
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{ \
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(void)memorder; \
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SWATOMIC_ENTER(); \
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TYPE old = *(volatile TYPE *)ptr; \
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*(volatile TYPE *)ptr = (TYPE)(EXPR); \
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SWATOMIC_EXIT(); \
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return old; \
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} \
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__attribute__((weak, used)) TYPE __atomic_##NAME##_fetch_##N(volatile void *ptr, TYPE val, int memorder) \
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{ \
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(void)memorder; \
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SWATOMIC_ENTER(); \
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TYPE old = *(volatile TYPE *)ptr; \
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TYPE nv = (TYPE)(EXPR); \
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*(volatile TYPE *)ptr = nv; \
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SWATOMIC_EXIT(); \
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return nv; \
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}
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#define GEN_SWATOMIC_ALL(N, TYPE) \
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GEN_SWATOMIC_CORE(N, TYPE) \
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GEN_SWATOMIC_RMW(N, TYPE, add, old + val) \
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GEN_SWATOMIC_RMW(N, TYPE, sub, old - val) \
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GEN_SWATOMIC_RMW(N, TYPE, and, old &val) \
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GEN_SWATOMIC_RMW(N, TYPE, or, old | val) \
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GEN_SWATOMIC_RMW(N, TYPE, xor, old ^ val) \
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GEN_SWATOMIC_RMW(N, TYPE, nand, ~(old & val))
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GEN_SWATOMIC_ALL(1, uint8_t)
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GEN_SWATOMIC_ALL(2, uint16_t)
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GEN_SWATOMIC_ALL(4, uint32_t)
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#else
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// Keep this a non-empty translation unit on targets that inline hardware atomics.
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typedef int swatomic_translation_unit_not_empty;
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#endif // CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32S2
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