diff --git a/.DS_Store b/.DS_Store
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index 0000000..d132777
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diff --git a/Morse_code_PCB/#auto_saved_files# b/Morse_code_PCB/#auto_saved_files#
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diff --git a/Morse_code_PCB/Morse_code_PCB.kicad_sch b/Morse_code_PCB/Morse_code_PCB.kicad_sch
index 751511b..2787384 100644
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(effects (font (size 1.27 1.27)) (justify left) hide)
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(effects (font (size 1.27 1.27)) (justify left) hide)
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(effects (font (size 1.27 1.27)) (justify left) hide)
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(effects (font (size 1.27 1.27)) (justify left) hide)
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(effects (font (size 1.27 1.27)) (justify right) hide)
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(effects (font (size 1.27 1.27)) (justify left) hide)
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- (effects (font (size 1.27 1.27)) (justify right) hide)
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+ (effects (font (size 1.27 1.27)) (justify left))
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+ (effects (font (size 1.27 1.27)) (justify left) hide)
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(global_label "USB_VCC" (shape input) (at 58.42 72.39 0) (fields_autoplaced)
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(effects (font (size 1.27 1.27)) (justify left) hide)
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+ (global_label "SW_D" (shape input) (at 86.36 222.25 180) (fields_autoplaced)
+ (effects (font (size 1.27 1.27)) (justify right))
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+ (property "插入图纸页参考" "${INTERSHEET_REFS}" (id 0) (at 79.0483 222.1706 0)
+ (effects (font (size 1.27 1.27)) (justify right) hide)
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(effects (font (size 1.27 1.27)) (justify left) hide)
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+ (effects (font (size 1.27 1.27)) (justify right))
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(effects (font (size 1.27 1.27)) (justify left))
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(pin "1" (uuid acccc70d-8fb6-4dee-b56e-8b8aec809c42))
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- (symbol (lib_id "MCU_ST_STM32F1:STM32F103C8Tx") (at 210.82 93.98 0) (unit 1)
+ (symbol (lib_id "MCU_ST_STM32F1:STM32F103C8Tx") (at 223.52 119.38 0) (unit 1)
(in_bom yes) (on_board yes) (fields_autoplaced)
(uuid 0677197f-925d-49ae-b672-407868493e87)
- (property "Reference" "U7" (id 0) (at 215.3794 132.08 0)
+ (property "Reference" "U7" (id 0) (at 228.0794 157.48 0)
(effects (font (size 1.27 1.27)) (justify left))
)
- (property "Value" "STM32F103C8Tx" (id 1) (at 215.3794 134.62 0)
+ (property "Value" "STM32F103C8Tx" (id 1) (at 228.0794 160.02 0)
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)
- (property "Footprint" "Package_QFP:LQFP-48_7x7mm_P0.5mm" (id 2) (at 195.58 129.54 0)
+ (property "Footprint" "Package_QFP:LQFP-48_7x7mm_P0.5mm" (id 2) (at 208.28 154.94 0)
(effects (font (size 1.27 1.27)) (justify right) hide)
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- (property "Datasheet" "http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/CD00161566.pdf" (id 3) (at 210.82 93.98 0)
+ (property "Datasheet" "http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/CD00161566.pdf" (id 3) (at 223.52 119.38 0)
(effects (font (size 1.27 1.27)) hide)
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(pin "1" (uuid ec7cf9c2-f528-4dbf-a2b9-a3aa0ddc963d))
@@ -3599,6 +3864,22 @@
(pin "2" (uuid 2def88eb-e989-4e96-be6b-8ce0957d36e3))
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+ (symbol (lib_id "power:GND") (at 218.44 160.02 0) (unit 1)
+ (in_bom yes) (on_board yes) (fields_autoplaced)
+ (uuid 21b46c85-84d4-482d-92fa-d9b0df09e6b9)
+ (property "Reference" "#PWR?" (id 0) (at 218.44 166.37 0)
+ (effects (font (size 1.27 1.27)) hide)
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+ (property "Value" "GND" (id 1) (at 218.44 165.1 0))
+ (property "Footprint" "" (id 2) (at 218.44 160.02 0)
+ (effects (font (size 1.27 1.27)) hide)
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+ (property "Datasheet" "" (id 3) (at 218.44 160.02 0)
+ (effects (font (size 1.27 1.27)) hide)
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+ (pin "1" (uuid 5973006c-1575-433e-b44a-e42e4975722a))
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(symbol (lib_id "Device:R") (at 377.825 73.025 270) (unit 1)
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@@ -3614,6 +3895,21 @@
(pin "2" (uuid d185cdde-569e-4a9e-8e2e-d7e8e72c62a0))
)
+ (symbol (lib_id "Device:R") (at 179.07 72.39 90) (unit 1)
+ (in_bom yes) (on_board yes)
+ (uuid 28dce972-fafd-4ac8-b8d0-ff3e3e001c2c)
+ (property "Reference" "R?" (id 0) (at 179.07 69.85 90))
+ (property "Value" "1K" (id 1) (at 179.07 72.39 90))
+ (property "Footprint" "Resistor_SMD:R_0603_1608Metric" (id 2) (at 179.07 74.168 90)
+ (effects (font (size 1.27 1.27)) hide)
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+ (property "Datasheet" "~" (id 3) (at 179.07 72.39 0)
+ (effects (font (size 1.27 1.27)) hide)
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+ (pin "1" (uuid c606cbaa-3cc1-428d-be6e-5dae3475d025))
+ (pin "2" (uuid 096da53b-d94e-4019-aaf6-54b420629486))
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(symbol (lib_id "Device:C") (at 58.42 87.63 0) (unit 1)
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(pin "2" (uuid fd73e918-297c-4282-b487-d15f9d6a2924))
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- (symbol (lib_id "Device:Crystal") (at 162.56 77.47 0) (unit 1)
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(uuid 313df197-02c6-46f5-9c77-acf80bf7847c)
- (property "Reference" "Y2" (id 0) (at 162.56 69.85 0))
- (property "Value" "32.768k" (id 1) (at 162.56 72.39 0))
- (property "Footprint" "Crystal:Crystal_SMD_3215-2Pin_3.2x1.5mm" (id 2) (at 162.56 77.47 0)
+ (property "Reference" "Y2" (id 0) (at 184.15 104.1399 90)
+ (effects (font (size 1.27 1.27)) (justify right))
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+ (property "Value" "32.768k" (id 1) (at 184.15 106.6799 90)
+ (effects (font (size 1.27 1.27)) (justify right))
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+ (property "Footprint" "Crystal:Crystal_SMD_3215-2Pin_3.2x1.5mm" (id 2) (at 180.34 105.41 0)
(effects (font (size 1.27 1.27)) hide)
)
- (property "Datasheet" "~" (id 3) (at 162.56 77.47 0)
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(effects (font (size 1.27 1.27)) hide)
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(pin "1" (uuid 2e2726d3-9ce0-408f-8e09-4809b99caffc))
(pin "2" (uuid 13532bc6-c9ee-429f-a43c-c5ef87eb9989))
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+ (symbol (lib_id "power:VCC") (at 223.52 72.39 0) (unit 1)
+ (in_bom yes) (on_board yes) (fields_autoplaced)
+ (uuid 31a7b109-39f1-4f47-8fd2-02735ea338cd)
+ (property "Reference" "#PWR?" (id 0) (at 223.52 76.2 0)
+ (effects (font (size 1.27 1.27)) hide)
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+ (property "Value" "VCC" (id 1) (at 223.52 67.31 0))
+ (property "Footprint" "" (id 2) (at 223.52 72.39 0)
+ (effects (font (size 1.27 1.27)) hide)
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+ (property "Datasheet" "" (id 3) (at 223.52 72.39 0)
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(symbol (lib_id "Device:R") (at 44.45 125.095 0) (unit 1)
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@@ -3663,6 +3979,21 @@
(pin "2" (uuid bd9f9752-0b62-4b31-8aac-daddbf637836))
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+ (symbol (lib_id "Device:R") (at 193.04 67.31 90) (unit 1)
+ (in_bom yes) (on_board yes)
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+ (property "Reference" "R?" (id 0) (at 193.04 64.77 90))
+ (property "Value" "10K" (id 1) (at 193.04 67.31 90))
+ (property "Footprint" "Resistor_SMD:R_0603_1608Metric" (id 2) (at 193.04 69.088 90)
+ (effects (font (size 1.27 1.27)) hide)
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+ (pin "2" (uuid 4dd3db10-7909-4199-8da7-f2742fcfd170))
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(pin "9" (uuid a29f8df0-3fae-4edf-8d9c-bd5a875b13e3))
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- (symbol (lib_id "power:VCC") (at 82.55 216.535 90) (unit 1)
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(uuid 4bc53345-25fe-427a-a648-514d97b80f54)
- (property "Reference" "#PWR0121" (id 0) (at 86.36 216.535 0)
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- (property "Value" "VCC" (id 1) (at 78.74 216.535 0))
- (property "Footprint" "" (id 2) (at 82.55 216.535 0)
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(effects (font (size 1.27 1.27)) hide)
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- (property "Datasheet" "" (id 3) (at 82.55 216.535 0)
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(pin "1" (uuid da9b6201-f0ad-4d2a-a816-43004f342313))
@@ -3862,6 +4193,21 @@
(pin "1" (uuid 86d0ebd6-3f72-4457-9c26-bbd62913d687))
)
+ (symbol (lib_id "Device:C") (at 171.45 82.55 90) (unit 1)
+ (in_bom yes) (on_board yes) (fields_autoplaced)
+ (uuid 5bdd29cb-8f55-4095-af05-9d35ec92d17e)
+ (property "Reference" "C?" (id 0) (at 171.45 74.93 90))
+ (property "Value" "C" (id 1) (at 171.45 77.47 90))
+ (property "Footprint" "Capacitor_SMD:C_0402_1005Metric_Pad0.74x0.62mm_HandSolder" (id 2) (at 175.26 81.5848 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "~" (id 3) (at 171.45 82.55 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (pin "1" (uuid 577b8a16-4a9c-4a68-b5b6-edd8faac8397))
+ (pin "2" (uuid 4736816d-9361-4383-9d46-9f67b0c0e530))
+ )
+
(symbol (lib_id "Device:R") (at 53.34 43.18 0) (unit 1)
(in_bom yes) (on_board yes)
(uuid 5bf4db13-f95c-4510-aa5f-610b83763fd1)
@@ -3907,6 +4253,21 @@
(pin "S1" (uuid 6551c37f-9afc-4b25-9b2a-c1739b8edf17))
)
+ (symbol (lib_id "Device:C") (at 171.45 109.22 90) (unit 1)
+ (in_bom yes) (on_board yes) (fields_autoplaced)
+ (uuid 5c64e8e8-6c2d-483f-aafc-e21e16486282)
+ (property "Reference" "C?" (id 0) (at 171.45 101.6 90))
+ (property "Value" "C" (id 1) (at 171.45 104.14 90))
+ (property "Footprint" "Capacitor_SMD:C_0402_1005Metric_Pad0.74x0.62mm_HandSolder" (id 2) (at 175.26 108.2548 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "~" (id 3) (at 171.45 109.22 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (pin "1" (uuid 92f759df-e7f5-4cd6-b760-c1a61545e330))
+ (pin "2" (uuid 7080766e-5700-4a31-bc1e-1d239e4d43bf))
+ )
+
(symbol (lib_id "Device:C") (at 48.26 25.4 0) (unit 1)
(in_bom yes) (on_board yes)
(uuid 5dd32f3d-960d-444f-be85-96d5b718d202)
@@ -3941,6 +4302,22 @@
(pin "2" (uuid 5a2af9e3-ad5e-40ea-88cf-da84e56dc935))
)
+ (symbol (lib_id "power:GND") (at 167.64 90.17 0) (unit 1)
+ (in_bom yes) (on_board yes) (fields_autoplaced)
+ (uuid 6c2104bd-3782-49e7-96e0-61c450efbfb5)
+ (property "Reference" "#PWR?" (id 0) (at 167.64 96.52 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Value" "GND" (id 1) (at 167.64 95.25 0))
+ (property "Footprint" "" (id 2) (at 167.64 90.17 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "" (id 3) (at 167.64 90.17 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (pin "1" (uuid b21f0a26-b6ea-4430-b555-e9039bcd3621))
+ )
+
(symbol (lib_id "Device:C") (at 106.68 184.15 90) (unit 1)
(in_bom yes) (on_board yes)
(uuid 6c5bad07-6597-499a-bbb1-65b5ba4a8e58)
@@ -4047,19 +4424,15 @@
(pin "2" (uuid f1435094-ccf9-47e9-8c84-0c9c44a8f781))
)
- (symbol (lib_id "Device:Battery_Cell") (at 132.08 63.5 0) (unit 1)
+ (symbol (lib_id "Device:Battery_Cell") (at 212.09 77.47 270) (unit 1)
(in_bom yes) (on_board yes) (fields_autoplaced)
(uuid 88d8a17c-0ee1-405b-b7c6-a4e8fee4260e)
- (property "Reference" "BT1" (id 0) (at 135.89 60.1979 0)
- (effects (font (size 1.27 1.27)) (justify left))
- )
- (property "Value" "Battery_Cell" (id 1) (at 135.89 62.7379 0)
- (effects (font (size 1.27 1.27)) (justify left))
- )
- (property "Footprint" "MY:BAT_BC501SM" (id 2) (at 132.08 61.976 90)
+ (property "Reference" "BT1" (id 0) (at 214.122 69.85 90))
+ (property "Value" "Battery_Cell" (id 1) (at 214.122 72.39 90))
+ (property "Footprint" "MY:BAT_BC501SM" (id 2) (at 213.614 77.47 90)
(effects (font (size 1.27 1.27)) hide)
)
- (property "Datasheet" "~" (id 3) (at 132.08 61.976 90)
+ (property "Datasheet" "~" (id 3) (at 213.614 77.47 90)
(effects (font (size 1.27 1.27)) hide)
)
(pin "1" (uuid 074d674d-f1d9-4325-a99c-eab01091a621))
@@ -4115,17 +4488,17 @@
(pin "2" (uuid e990d4aa-3652-4433-98b4-deb8fc5b6e36))
)
- (symbol (lib_id "power:GND") (at 82.55 219.075 270) (unit 1)
+ (symbol (lib_id "power:GND") (at 86.36 219.71 270) (unit 1)
(in_bom yes) (on_board yes)
(uuid 8db05113-bb5d-40cb-916f-5b0147562482)
- (property "Reference" "#PWR0120" (id 0) (at 76.2 219.075 0)
+ (property "Reference" "#PWR0120" (id 0) (at 80.01 219.71 0)
(effects (font (size 1.27 1.27)) hide)
)
- (property "Value" "GND" (id 1) (at 78.74 219.075 0))
- (property "Footprint" "" (id 2) (at 82.55 219.075 0)
+ (property "Value" "GND" (id 1) (at 82.55 219.71 0))
+ (property "Footprint" "" (id 2) (at 86.36 219.71 0)
(effects (font (size 1.27 1.27)) hide)
)
- (property "Datasheet" "" (id 3) (at 82.55 219.075 0)
+ (property "Datasheet" "" (id 3) (at 86.36 219.71 0)
(effects (font (size 1.27 1.27)) hide)
)
(pin "1" (uuid 37299e3d-49ce-49aa-8376-30d30c6526f0))
@@ -4151,6 +4524,25 @@
(pin "3" (uuid 1c358b91-989a-4038-b556-b071732a4666))
)
+ (symbol (lib_id "Device:L") (at 228.6 77.47 0) (unit 1)
+ (in_bom yes) (on_board yes) (fields_autoplaced)
+ (uuid 94979294-58f1-45cf-861c-a1d9abf6b6a1)
+ (property "Reference" "L?" (id 0) (at 229.87 76.1999 0)
+ (effects (font (size 1.27 1.27)) (justify left))
+ )
+ (property "Value" "100mH" (id 1) (at 229.87 78.7399 0)
+ (effects (font (size 1.27 1.27)) (justify left))
+ )
+ (property "Footprint" "Inductor_SMD:L_0805_2012Metric" (id 2) (at 228.6 77.47 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "~" (id 3) (at 228.6 77.47 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (pin "1" (uuid 76738b70-d94d-403d-be39-f81f271a0f9e))
+ (pin "2" (uuid 44ae20d5-0f5f-4320-a4a9-c28977b525c4))
+ )
+
(symbol (lib_id "Device:Buzzer") (at 361.315 85.09 0) (unit 1)
(in_bom yes) (on_board yes) (fields_autoplaced)
(uuid 972eb069-8d6d-41f6-83d3-1d7e45627208)
@@ -4170,15 +4562,19 @@
(pin "2" (uuid 52bf5f1e-b0b0-45c5-a9cc-30fb48e7f10a))
)
- (symbol (lib_id "Device:Crystal") (at 162.56 63.5 0) (unit 1)
+ (symbol (lib_id "Device:Crystal") (at 177.8 86.36 90) (unit 1)
(in_bom yes) (on_board yes) (fields_autoplaced)
(uuid 98a4e67b-a902-425f-8239-d37d3d9798fa)
- (property "Reference" "Y1" (id 0) (at 162.56 55.88 0))
- (property "Value" "8M" (id 1) (at 162.56 58.42 0))
- (property "Footprint" "Crystal:Crystal_SMD_5032-2Pin_5.0x3.2mm" (id 2) (at 162.56 63.5 0)
+ (property "Reference" "Y1" (id 0) (at 181.61 85.0899 90)
+ (effects (font (size 1.27 1.27)) (justify right))
+ )
+ (property "Value" "8M" (id 1) (at 181.61 87.6299 90)
+ (effects (font (size 1.27 1.27)) (justify right))
+ )
+ (property "Footprint" "Crystal:Crystal_SMD_5032-2Pin_5.0x3.2mm" (id 2) (at 177.8 86.36 0)
(effects (font (size 1.27 1.27)) hide)
)
- (property "Datasheet" "~" (id 3) (at 162.56 63.5 0)
+ (property "Datasheet" "~" (id 3) (at 177.8 86.36 0)
(effects (font (size 1.27 1.27)) hide)
)
(pin "1" (uuid 3d8dee54-b40e-4a44-bf51-bf7310c37e8d))
@@ -4221,19 +4617,19 @@
(pin "2" (uuid ccdd9ea8-b569-48e4-b835-17b0f4e8725c))
)
- (symbol (lib_id "Connector:Conn_01x04_Female") (at 87.63 219.075 0) (unit 1)
+ (symbol (lib_id "Connector:Conn_01x04_Female") (at 91.44 219.71 0) (unit 1)
(in_bom yes) (on_board yes) (fields_autoplaced)
(uuid 9f9d9ec1-f12a-47cb-a033-e6a9e0eb276a)
- (property "Reference" "J5" (id 0) (at 89.535 219.0749 0)
+ (property "Reference" "J5" (id 0) (at 93.345 219.7099 0)
(effects (font (size 1.27 1.27)) (justify left))
)
- (property "Value" "Conn_01x04_Female" (id 1) (at 89.535 221.6149 0)
+ (property "Value" "Conn_01x04_Female" (id 1) (at 93.345 222.2499 0)
(effects (font (size 1.27 1.27)) (justify left))
)
- (property "Footprint" "MY:SIP-4" (id 2) (at 87.63 219.075 0)
+ (property "Footprint" "MY:SIP-4" (id 2) (at 91.44 219.71 0)
(effects (font (size 1.27 1.27)) hide)
)
- (property "Datasheet" "~" (id 3) (at 87.63 219.075 0)
+ (property "Datasheet" "~" (id 3) (at 91.44 219.71 0)
(effects (font (size 1.27 1.27)) hide)
)
(pin "1" (uuid 56620332-4506-4e68-83be-ce8c73e73020))
@@ -4416,6 +4812,25 @@
(pin "2" (uuid 4e6d461c-37d8-4efc-9476-aa998097df97))
)
+ (symbol (lib_id "Device:C") (at 182.88 67.31 270) (unit 1)
+ (in_bom yes) (on_board yes)
+ (uuid b5b14a72-6174-4e0d-a89b-0052cd50bb4f)
+ (property "Reference" "C?" (id 0) (at 185.42 63.5 0)
+ (effects (font (size 1.27 1.27)) (justify left))
+ )
+ (property "Value" "100nF" (id 1) (at 180.34 60.96 0)
+ (effects (font (size 1.27 1.27)) (justify left))
+ )
+ (property "Footprint" "Capacitor_SMD:C_0805_2012Metric" (id 2) (at 179.07 68.2752 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "~" (id 3) (at 182.88 67.31 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (pin "1" (uuid efdb53e3-c9e8-4424-a42e-08939df4df75))
+ (pin "2" (uuid 4407ceea-5fa9-4b32-8991-89270e209011))
+ )
+
(symbol (lib_id "Transistor_FET:AO3400A") (at 356.235 96.52 0) (unit 1)
(in_bom yes) (on_board yes)
(uuid b68ef65c-4e1d-4f1f-b670-988ac039a2a1)
@@ -4516,6 +4931,68 @@
(pin "2" (uuid 96bcdb1f-b8e7-420f-8c77-538b93ac3005))
)
+ (symbol (lib_id "Device:C") (at 171.45 90.17 90) (unit 1)
+ (in_bom yes) (on_board yes) (fields_autoplaced)
+ (uuid c46704c8-86a9-4f34-9da9-6591a57c007e)
+ (property "Reference" "C?" (id 0) (at 171.45 82.55 90))
+ (property "Value" "C" (id 1) (at 171.45 85.09 90))
+ (property "Footprint" "Capacitor_SMD:C_0402_1005Metric_Pad0.74x0.62mm_HandSolder" (id 2) (at 175.26 89.2048 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "~" (id 3) (at 171.45 90.17 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (pin "1" (uuid d34d1a16-2950-4e7a-9c8a-737eb401685e))
+ (pin "2" (uuid 11267c1f-ff31-4e53-a2c6-2c0fa744aecd))
+ )
+
+ (symbol (lib_id "Device:C") (at 171.45 101.6 90) (unit 1)
+ (in_bom yes) (on_board yes) (fields_autoplaced)
+ (uuid c5449947-3eb6-438a-a259-9adb710c7987)
+ (property "Reference" "C?" (id 0) (at 171.45 93.98 90))
+ (property "Value" "" (id 1) (at 171.45 96.52 90))
+ (property "Footprint" "" (id 2) (at 175.26 100.6348 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "~" (id 3) (at 171.45 101.6 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (pin "1" (uuid 6558fe1b-a3c8-432c-ad80-f285a01e900f))
+ (pin "2" (uuid 5492858d-1b8c-4f1a-b061-e929f40eed8a))
+ )
+
+ (symbol (lib_id "power:GND") (at 209.55 77.47 0) (unit 1)
+ (in_bom yes) (on_board yes) (fields_autoplaced)
+ (uuid c690254c-97ba-4bfd-b863-b129e5802ed6)
+ (property "Reference" "#PWR?" (id 0) (at 209.55 83.82 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Value" "GND" (id 1) (at 209.55 82.55 0))
+ (property "Footprint" "" (id 2) (at 209.55 77.47 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "" (id 3) (at 209.55 77.47 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (pin "1" (uuid 33c90149-01e7-46be-8bc9-c4ecd9b8e441))
+ )
+
+ (symbol (lib_id "power:GND") (at 167.64 109.22 0) (unit 1)
+ (in_bom yes) (on_board yes) (fields_autoplaced)
+ (uuid c7754a4b-140d-4713-bf5f-ab94041f5ca0)
+ (property "Reference" "#PWR?" (id 0) (at 167.64 115.57 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Value" "GND" (id 1) (at 167.64 114.3 0))
+ (property "Footprint" "" (id 2) (at 167.64 109.22 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "" (id 3) (at 167.64 109.22 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (pin "1" (uuid 7d75aabb-9894-4f8e-97bf-be569486f7f7))
+ )
+
(symbol (lib_id "Device:R") (at 336.55 96.52 270) (unit 1)
(in_bom yes) (on_board yes)
(uuid cba80511-2d97-4527-bf5e-8b6b0c65757a)
@@ -4622,6 +5099,25 @@
(pin "1" (uuid e1a000aa-8d42-4458-93e8-e8b2601b676c))
)
+ (symbol (lib_id "Device:R") (at 194.31 72.39 270) (unit 1)
+ (in_bom yes) (on_board yes)
+ (uuid d7341a7c-138e-4958-94b9-6d075160a22d)
+ (property "Reference" "R?" (id 0) (at 191.77 70.485 90)
+ (effects (font (size 1.27 1.27)) (justify left))
+ )
+ (property "Value" "*R0" (id 1) (at 192.405 72.39 90)
+ (effects (font (size 1.27 1.27)) (justify left))
+ )
+ (property "Footprint" "Resistor_SMD:R_0402_1005Metric" (id 2) (at 194.31 70.612 90)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "~" (id 3) (at 194.31 72.39 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (pin "1" (uuid 046aab5e-6009-4b2e-9cba-d64e2266d3bb))
+ (pin "2" (uuid f0c13791-a261-407d-83e9-659f086500f8))
+ )
+
(symbol (lib_id "power:GND") (at 99.06 121.285 0) (unit 1)
(in_bom yes) (on_board yes) (fields_autoplaced)
(uuid da1096a4-0ecd-4b01-971c-7656c87afcbb)
@@ -4638,6 +5134,22 @@
(pin "1" (uuid 6d3a73ef-068e-4292-a054-cbaed3828f93))
)
+ (symbol (lib_id "power:VCC") (at 204.47 67.31 270) (unit 1)
+ (in_bom yes) (on_board yes) (fields_autoplaced)
+ (uuid dbbb0b2d-141b-41dd-98e7-2878d6220dd6)
+ (property "Reference" "#PWR?" (id 0) (at 200.66 67.31 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Value" "VCC" (id 1) (at 209.55 67.31 0))
+ (property "Footprint" "" (id 2) (at 204.47 67.31 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "" (id 3) (at 204.47 67.31 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (pin "1" (uuid 11bf8f4a-c5cf-4a42-874b-3401818e2bc1))
+ )
+
(symbol (lib_id "power:GND") (at 29.845 93.345 0) (unit 1)
(in_bom yes) (on_board yes)
(uuid dcda9a2f-c22c-4de1-98d4-d2ede815dbff)
@@ -4670,6 +5182,22 @@
(pin "3" (uuid 02d00e64-f36d-496e-920c-b627c093fcb9))
)
+ (symbol (lib_id "power:GND") (at 151.13 72.39 270) (unit 1)
+ (in_bom yes) (on_board yes) (fields_autoplaced)
+ (uuid e61f0717-555b-4c31-8df3-116be7b94d4e)
+ (property "Reference" "#PWR?" (id 0) (at 144.78 72.39 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Value" "GND" (id 1) (at 146.05 72.39 0))
+ (property "Footprint" "" (id 2) (at 151.13 72.39 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (property "Datasheet" "" (id 3) (at 151.13 72.39 0)
+ (effects (font (size 1.27 1.27)) hide)
+ )
+ (pin "1" (uuid 5cc186bb-f909-4d34-80dd-bf9d1d174240))
+ )
+
(symbol (lib_id "Device:C") (at 70.485 87.63 0) (unit 1)
(in_bom yes) (on_board yes)
(uuid e7e0052c-3e13-4581-99c7-2bd19cd19294)
@@ -4916,6 +5444,27 @@
(path "/4bc53345-25fe-427a-a648-514d97b80f54"
(reference "#PWR0121") (unit 1) (value "VCC") (footprint "")
)
+ (path "/21b46c85-84d4-482d-92fa-d9b0df09e6b9"
+ (reference "#PWR?") (unit 1) (value "GND") (footprint "")
+ )
+ (path "/31a7b109-39f1-4f47-8fd2-02735ea338cd"
+ (reference "#PWR?") (unit 1) (value "VCC") (footprint "")
+ )
+ (path "/6c2104bd-3782-49e7-96e0-61c450efbfb5"
+ (reference "#PWR?") (unit 1) (value "GND") (footprint "")
+ )
+ (path "/c690254c-97ba-4bfd-b863-b129e5802ed6"
+ (reference "#PWR?") (unit 1) (value "GND") (footprint "")
+ )
+ (path "/c7754a4b-140d-4713-bf5f-ab94041f5ca0"
+ (reference "#PWR?") (unit 1) (value "GND") (footprint "")
+ )
+ (path "/dbbb0b2d-141b-41dd-98e7-2878d6220dd6"
+ (reference "#PWR?") (unit 1) (value "VCC") (footprint "")
+ )
+ (path "/e61f0717-555b-4c31-8df3-116be7b94d4e"
+ (reference "#PWR?") (unit 1) (value "GND") (footprint "")
+ )
(path "/88d8a17c-0ee1-405b-b7c6-a4e8fee4260e"
(reference "BT1") (unit 1) (value "Battery_Cell") (footprint "MY:BAT_BC501SM")
)
@@ -4961,6 +5510,21 @@
(path "/6c5bad07-6597-499a-bbb1-65b5ba4a8e58"
(reference "C13") (unit 1) (value "10uF") (footprint "Capacitor_SMD:C_1206_3216Metric")
)
+ (path "/5bdd29cb-8f55-4095-af05-9d35ec92d17e"
+ (reference "C?") (unit 1) (value "C") (footprint "Capacitor_SMD:C_0402_1005Metric_Pad0.74x0.62mm_HandSolder")
+ )
+ (path "/5c64e8e8-6c2d-483f-aafc-e21e16486282"
+ (reference "C?") (unit 1) (value "C") (footprint "Capacitor_SMD:C_0402_1005Metric_Pad0.74x0.62mm_HandSolder")
+ )
+ (path "/b5b14a72-6174-4e0d-a89b-0052cd50bb4f"
+ (reference "C?") (unit 1) (value "100nF") (footprint "Capacitor_SMD:C_0805_2012Metric")
+ )
+ (path "/c46704c8-86a9-4f34-9da9-6591a57c007e"
+ (reference "C?") (unit 1) (value "C") (footprint "Capacitor_SMD:C_0402_1005Metric_Pad0.74x0.62mm_HandSolder")
+ )
+ (path "/c5449947-3eb6-438a-a259-9adb710c7987"
+ (reference "C?") (unit 1) (value "C") (footprint "Capacitor_SMD:C_0402_1005Metric_Pad0.74x0.62mm_HandSolder")
+ )
(path "/ba50dcc8-5bbd-4264-91b9-75a161f252c6"
(reference "D1") (unit 1) (value "1N4148WT") (footprint "Diode_SMD:D_SOD-523")
)
@@ -4997,6 +5561,9 @@
(path "/a6e73968-bfeb-49ba-b5d0-6a71117f7ee3"
(reference "L1") (unit 1) (value "100mH") (footprint "Inductor_SMD:L_0805_2012Metric")
)
+ (path "/94979294-58f1-45cf-861c-a1d9abf6b6a1"
+ (reference "L?") (unit 1) (value "100mH") (footprint "Inductor_SMD:L_0805_2012Metric")
+ )
(path "/fcb41881-c9cb-478a-9b39-b27b7306d1ef"
(reference "Q1") (unit 1) (value "AO3400A") (footprint "Package_TO_SOT_SMD:SOT-23")
)
@@ -5081,6 +5648,15 @@
(path "/ea5be27d-cc3f-4f0f-8258-28a6b9a5c4e9"
(reference "R24") (unit 1) (value "510") (footprint "Resistor_SMD:R_0603_1608Metric")
)
+ (path "/28dce972-fafd-4ac8-b8d0-ff3e3e001c2c"
+ (reference "R?") (unit 1) (value "1K") (footprint "Resistor_SMD:R_0603_1608Metric")
+ )
+ (path "/33ada24f-a0d9-4b83-b4c9-3e94e63b878f"
+ (reference "R?") (unit 1) (value "10K") (footprint "Resistor_SMD:R_0603_1608Metric")
+ )
+ (path "/d7341a7c-138e-4958-94b9-6d075160a22d"
+ (reference "R?") (unit 1) (value "*R0") (footprint "Resistor_SMD:R_0402_1005Metric")
+ )
(path "/14f2ae6e-5c6f-4b04-a137-aaaffc15e481"
(reference "SW1") (unit 1) (value "RotaryEncoder_Switch") (footprint "MY:EC11")
)
diff --git a/stm32f103/.cproject b/stm32f103/.cproject
new file mode 100644
index 0000000..475c449
--- /dev/null
+++ b/stm32f103/.cproject
@@ -0,0 +1,170 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/stm32f103/.mxproject b/stm32f103/.mxproject
new file mode 100644
index 0000000..46f6018
--- /dev/null
+++ b/stm32f103/.mxproject
@@ -0,0 +1,25 @@
+[PreviousLibFiles]
+LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_armv8mbl.h;
+
+[PreviousUsedCubeIDEFiles]
+SourceFiles=Core/Src/main.c;Core/Src/stm32f1xx_it.c;Core/Src/stm32f1xx_hal_msp.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Core/Src/system_stm32f1xx.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Core/Src/system_stm32f1xx.c;;;
+HeaderPath=Drivers/STM32F1xx_HAL_Driver/Inc;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32F1xx/Include;Drivers/CMSIS/Include;Core/Inc;
+CDefines=USE_HAL_DRIVER;STM32F103xB;USE_HAL_DRIVER;USE_HAL_DRIVER;
+
+[PreviousGenFiles]
+AdvancedFolderStructure=true
+HeaderFileListSize=3
+HeaderFiles#0=/Users/wuwenfeng/Documents/morse_code_trainer/stm32f103/Core/Inc/stm32f1xx_it.h
+HeaderFiles#1=/Users/wuwenfeng/Documents/morse_code_trainer/stm32f103/Core/Inc/stm32f1xx_hal_conf.h
+HeaderFiles#2=/Users/wuwenfeng/Documents/morse_code_trainer/stm32f103/Core/Inc/main.h
+HeaderFolderListSize=1
+HeaderPath#0=/Users/wuwenfeng/Documents/morse_code_trainer/stm32f103/Core/Inc
+HeaderFiles=;
+SourceFileListSize=3
+SourceFiles#0=/Users/wuwenfeng/Documents/morse_code_trainer/stm32f103/Core/Src/stm32f1xx_it.c
+SourceFiles#1=/Users/wuwenfeng/Documents/morse_code_trainer/stm32f103/Core/Src/stm32f1xx_hal_msp.c
+SourceFiles#2=/Users/wuwenfeng/Documents/morse_code_trainer/stm32f103/Core/Src/main.c
+SourceFolderListSize=1
+SourcePath#0=/Users/wuwenfeng/Documents/morse_code_trainer/stm32f103/Core/Src
+SourceFiles=;
+
diff --git a/stm32f103/.project b/stm32f103/.project
new file mode 100644
index 0000000..e07da81
--- /dev/null
+++ b/stm32f103/.project
@@ -0,0 +1,32 @@
+
+
+ stm32f103
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature
+ com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
diff --git a/stm32f103/.settings/language.settings.xml b/stm32f103/.settings/language.settings.xml
new file mode 100644
index 0000000..ee34a60
--- /dev/null
+++ b/stm32f103/.settings/language.settings.xml
@@ -0,0 +1,27 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/stm32f103/.settings/stm32cubeide.project.prefs b/stm32f103/.settings/stm32cubeide.project.prefs
new file mode 100644
index 0000000..83ac0de
--- /dev/null
+++ b/stm32f103/.settings/stm32cubeide.project.prefs
@@ -0,0 +1,4 @@
+66BE74F758C12D739921AEA421D593D3=1
+8DF89ED150041C4CBC7CB9A9CAA90856=979A1C77DA7C159653BD18E6A0BB4227
+DC22A860405A8BF2F2C095E5B6529F12=979A1C77DA7C159653BD18E6A0BB4227
+eclipse.preferences.version=1
diff --git a/stm32f103/Core/Inc/main.h b/stm32f103/Core/Inc/main.h
new file mode 100644
index 0000000..f79fdef
--- /dev/null
+++ b/stm32f103/Core/Inc/main.h
@@ -0,0 +1,71 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.h
+ * @brief : Header for main.c file.
+ * This file contains the common defines of the application.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2022 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2022 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2022 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2022 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2022 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/stm32f103/Core/Src/sysmem.c b/stm32f103/Core/Src/sysmem.c
new file mode 100644
index 0000000..d7cc52c
--- /dev/null
+++ b/stm32f103/Core/Src/sysmem.c
@@ -0,0 +1,80 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/stm32f103/Core/Src/system_stm32f1xx.c b/stm32f103/Core/Src/system_stm32f1xx.c
new file mode 100644
index 0000000..052bec6
--- /dev/null
+++ b/stm32f103/Core/Src/system_stm32f1xx.c
@@ -0,0 +1,408 @@
+/**
+ ******************************************************************************
+ * @file system_stm32f1xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
+ *
+ * 1. This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
+ * factors, AHB/APBx prescalers and Flash settings).
+ * This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32f1xx_xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * 2. After each device reset the HSI (8 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
+ * the product used), refer to "HSE_VALUE".
+ * When HSE is used as system clock source, directly or through PLL, and you
+ * are using different crystal you have to adapt the HSE value to your own
+ * configuration.
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved. © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved. :
+ 8000130: b508 push {r3, lr}
+ 8000132: 4b03 ldr r3, [pc, #12] ; (8000140 )
+ 8000134: b11b cbz r3, 800013e
+ 8000136: 4903 ldr r1, [pc, #12] ; (8000144 )
+ 8000138: 4803 ldr r0, [pc, #12] ; (8000148 )
+ 800013a: f3af 8000 nop.w
+ 800013e: bd08 pop {r3, pc}
+ 8000140: 00000000 .word 0x00000000
+ 8000144: 20000010 .word 0x20000010
+ 8000148: 08000e10 .word 0x08000e10
+
+0800014c :
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ 800014c: b580 push {r7, lr}
+ 800014e: af00 add r7, sp, #0
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+ 8000150: f000 f904 bl 800035c
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+ 8000154: f000 f803 bl 800015e
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ 8000158: f000 f846 bl 80001e8
+
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ 800015c: e7fe b.n 800015c
+
+0800015e :
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ 800015e: b580 push {r7, lr}
+ 8000160: b090 sub sp, #64 ; 0x40
+ 8000162: af00 add r7, sp, #0
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ 8000164: f107 0318 add.w r3, r7, #24
+ 8000168: 2228 movs r2, #40 ; 0x28
+ 800016a: 2100 movs r1, #0
+ 800016c: 4618 mov r0, r3
+ 800016e: f000 fe47 bl 8000e00
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ 8000172: 1d3b adds r3, r7, #4
+ 8000174: 2200 movs r2, #0
+ 8000176: 601a str r2, [r3, #0]
+ 8000178: 605a str r2, [r3, #4]
+ 800017a: 609a str r2, [r3, #8]
+ 800017c: 60da str r2, [r3, #12]
+ 800017e: 611a str r2, [r3, #16]
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ 8000180: 2301 movs r3, #1
+ 8000182: 61bb str r3, [r7, #24]
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ 8000184: f44f 3380 mov.w r3, #65536 ; 0x10000
+ 8000188: 61fb str r3, [r7, #28]
+ RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
+ 800018a: 2300 movs r3, #0
+ 800018c: 623b str r3, [r7, #32]
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ 800018e: 2301 movs r3, #1
+ 8000190: 62bb str r3, [r7, #40] ; 0x28
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ 8000192: 2302 movs r3, #2
+ 8000194: 637b str r3, [r7, #52] ; 0x34
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ 8000196: f44f 3380 mov.w r3, #65536 ; 0x10000
+ 800019a: 63bb str r3, [r7, #56] ; 0x38
+ RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
+ 800019c: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
+ 80001a0: 63fb str r3, [r7, #60] ; 0x3c
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ 80001a2: f107 0318 add.w r3, r7, #24
+ 80001a6: 4618 mov r0, r3
+ 80001a8: f000 fa1e bl 80005e8
+ 80001ac: 4603 mov r3, r0
+ 80001ae: 2b00 cmp r3, #0
+ 80001b0: d001 beq.n 80001b6
+ {
+ Error_Handler();
+ 80001b2: f000 f847 bl 8000244
+ }
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ 80001b6: 230f movs r3, #15
+ 80001b8: 607b str r3, [r7, #4]
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ 80001ba: 2302 movs r3, #2
+ 80001bc: 60bb str r3, [r7, #8]
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ 80001be: 2300 movs r3, #0
+ 80001c0: 60fb str r3, [r7, #12]
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+ 80001c2: f44f 6380 mov.w r3, #1024 ; 0x400
+ 80001c6: 613b str r3, [r7, #16]
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ 80001c8: 2300 movs r3, #0
+ 80001ca: 617b str r3, [r7, #20]
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+ 80001cc: 1d3b adds r3, r7, #4
+ 80001ce: 2102 movs r1, #2
+ 80001d0: 4618 mov r0, r3
+ 80001d2: f000 fc89 bl 8000ae8
+ 80001d6: 4603 mov r3, r0
+ 80001d8: 2b00 cmp r3, #0
+ 80001da: d001 beq.n 80001e0
+ {
+ Error_Handler();
+ 80001dc: f000 f832 bl 8000244
+ }
+}
+ 80001e0: bf00 nop
+ 80001e2: 3740 adds r7, #64 ; 0x40
+ 80001e4: 46bd mov sp, r7
+ 80001e6: bd80 pop {r7, pc}
+
+080001e8 :
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_GPIO_Init(void)
+{
+ 80001e8: b480 push {r7}
+ 80001ea: b085 sub sp, #20
+ 80001ec: af00 add r7, sp, #0
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ 80001ee: 4b14 ldr r3, [pc, #80] ; (8000240 )
+ 80001f0: 699b ldr r3, [r3, #24]
+ 80001f2: 4a13 ldr r2, [pc, #76] ; (8000240 )
+ 80001f4: f043 0310 orr.w r3, r3, #16
+ 80001f8: 6193 str r3, [r2, #24]
+ 80001fa: 4b11 ldr r3, [pc, #68] ; (8000240 )
+ 80001fc: 699b ldr r3, [r3, #24]
+ 80001fe: f003 0310 and.w r3, r3, #16
+ 8000202: 60fb str r3, [r7, #12]
+ 8000204: 68fb ldr r3, [r7, #12]
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+ 8000206: 4b0e ldr r3, [pc, #56] ; (8000240 )
+ 8000208: 699b ldr r3, [r3, #24]
+ 800020a: 4a0d ldr r2, [pc, #52] ; (8000240 )
+ 800020c: f043 0320 orr.w r3, r3, #32
+ 8000210: 6193 str r3, [r2, #24]
+ 8000212: 4b0b ldr r3, [pc, #44] ; (8000240 )
+ 8000214: 699b ldr r3, [r3, #24]
+ 8000216: f003 0320 and.w r3, r3, #32
+ 800021a: 60bb str r3, [r7, #8]
+ 800021c: 68bb ldr r3, [r7, #8]
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ 800021e: 4b08 ldr r3, [pc, #32] ; (8000240 )
+ 8000220: 699b ldr r3, [r3, #24]
+ 8000222: 4a07 ldr r2, [pc, #28] ; (8000240 )
+ 8000224: f043 0304 orr.w r3, r3, #4
+ 8000228: 6193 str r3, [r2, #24]
+ 800022a: 4b05 ldr r3, [pc, #20] ; (8000240 )
+ 800022c: 699b ldr r3, [r3, #24]
+ 800022e: f003 0304 and.w r3, r3, #4
+ 8000232: 607b str r3, [r7, #4]
+ 8000234: 687b ldr r3, [r7, #4]
+
+}
+ 8000236: bf00 nop
+ 8000238: 3714 adds r7, #20
+ 800023a: 46bd mov sp, r7
+ 800023c: bc80 pop {r7}
+ 800023e: 4770 bx lr
+ 8000240: 40021000 .word 0x40021000
+
+08000244 :
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ 8000244: b480 push {r7}
+ 8000246: af00 add r7, sp, #0
+ \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+ Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __disable_irq(void)
+{
+ __ASM volatile ("cpsid i" : : : "memory");
+ 8000248: b672 cpsid i
+}
+ 800024a: bf00 nop
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+ __disable_irq();
+ while (1)
+ 800024c: e7fe b.n 800024c
+ ...
+
+08000250 :
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ 8000250: b480 push {r7}
+ 8000252: b085 sub sp, #20
+ 8000254: af00 add r7, sp, #0
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_AFIO_CLK_ENABLE();
+ 8000256: 4b15 ldr r3, [pc, #84] ; (80002ac )
+ 8000258: 699b ldr r3, [r3, #24]
+ 800025a: 4a14 ldr r2, [pc, #80] ; (80002ac )
+ 800025c: f043 0301 orr.w r3, r3, #1
+ 8000260: 6193 str r3, [r2, #24]
+ 8000262: 4b12 ldr r3, [pc, #72] ; (80002ac )
+ 8000264: 699b ldr r3, [r3, #24]
+ 8000266: f003 0301 and.w r3, r3, #1
+ 800026a: 60bb str r3, [r7, #8]
+ 800026c: 68bb ldr r3, [r7, #8]
+ __HAL_RCC_PWR_CLK_ENABLE();
+ 800026e: 4b0f ldr r3, [pc, #60] ; (80002ac )
+ 8000270: 69db ldr r3, [r3, #28]
+ 8000272: 4a0e ldr r2, [pc, #56] ; (80002ac )
+ 8000274: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 8000278: 61d3 str r3, [r2, #28]
+ 800027a: 4b0c ldr r3, [pc, #48] ; (80002ac )
+ 800027c: 69db ldr r3, [r3, #28]
+ 800027e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 8000282: 607b str r3, [r7, #4]
+ 8000284: 687b ldr r3, [r7, #4]
+
+ /* System interrupt init*/
+
+ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
+ */
+ __HAL_AFIO_REMAP_SWJ_NOJTAG();
+ 8000286: 4b0a ldr r3, [pc, #40] ; (80002b0 )
+ 8000288: 685b ldr r3, [r3, #4]
+ 800028a: 60fb str r3, [r7, #12]
+ 800028c: 68fb ldr r3, [r7, #12]
+ 800028e: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
+ 8000292: 60fb str r3, [r7, #12]
+ 8000294: 68fb ldr r3, [r7, #12]
+ 8000296: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000
+ 800029a: 60fb str r3, [r7, #12]
+ 800029c: 4a04 ldr r2, [pc, #16] ; (80002b0 )
+ 800029e: 68fb ldr r3, [r7, #12]
+ 80002a0: 6053 str r3, [r2, #4]
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+ 80002a2: bf00 nop
+ 80002a4: 3714 adds r7, #20
+ 80002a6: 46bd mov sp, r7
+ 80002a8: bc80 pop {r7}
+ 80002aa: 4770 bx lr
+ 80002ac: 40021000 .word 0x40021000
+ 80002b0: 40010000 .word 0x40010000
+
+080002b4 :
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ 80002b4: b480 push {r7}
+ 80002b6: af00 add r7, sp, #0
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+ while (1)
+ 80002b8: e7fe b.n 80002b8
+
+080002ba :
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ 80002ba: b480 push {r7}
+ 80002bc: af00 add r7, sp, #0
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ 80002be: e7fe b.n 80002be
+
+080002c0 :
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ 80002c0: b480 push {r7}
+ 80002c2: af00 add r7, sp, #0
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ 80002c4: e7fe b.n 80002c4
+
+080002c6 :
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ 80002c6: b480 push {r7}
+ 80002c8: af00 add r7, sp, #0
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ 80002ca: e7fe b.n 80002ca
+
+080002cc :
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ 80002cc: b480 push {r7}
+ 80002ce: af00 add r7, sp, #0
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ 80002d0: e7fe b.n 80002d0
+
+080002d2 :
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ 80002d2: b480 push {r7}
+ 80002d4: af00 add r7, sp, #0
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+ 80002d6: bf00 nop
+ 80002d8: 46bd mov sp, r7
+ 80002da: bc80 pop {r7}
+ 80002dc: 4770 bx lr
+
+080002de :
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ 80002de: b480 push {r7}
+ 80002e0: af00 add r7, sp, #0
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+ 80002e2: bf00 nop
+ 80002e4: 46bd mov sp, r7
+ 80002e6: bc80 pop {r7}
+ 80002e8: 4770 bx lr
+
+080002ea :
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ 80002ea: b480 push {r7}
+ 80002ec: af00 add r7, sp, #0
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+ 80002ee: bf00 nop
+ 80002f0: 46bd mov sp, r7
+ 80002f2: bc80 pop {r7}
+ 80002f4: 4770 bx lr
+
+080002f6 :
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ 80002f6: b580 push {r7, lr}
+ 80002f8: af00 add r7, sp, #0
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ 80002fa: f000 f875 bl 80003e8
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+ 80002fe: bf00 nop
+ 8000300: bd80 pop {r7, pc}
+
+08000302 :
+ * @note This function should be used only after reset.
+ * @param None
+ * @retval None
+ */
+void SystemInit (void)
+{
+ 8000302: b480 push {r7}
+ 8000304: af00 add r7, sp, #0
+
+ /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+ SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
+#endif /* USER_VECT_TAB_ADDRESS */
+}
+ 8000306: bf00 nop
+ 8000308: 46bd mov sp, r7
+ 800030a: bc80 pop {r7}
+ 800030c: 4770 bx lr
+ ...
+
+08000310 :
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ 8000310: 480c ldr r0, [pc, #48] ; (8000344 )
+ ldr r1, =_edata
+ 8000312: 490d ldr r1, [pc, #52] ; (8000348 )
+ ldr r2, =_sidata
+ 8000314: 4a0d ldr r2, [pc, #52] ; (800034c )
+ movs r3, #0
+ 8000316: 2300 movs r3, #0
+ b LoopCopyDataInit
+ 8000318: e002 b.n 8000320
+
+0800031a :
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ 800031a: 58d4 ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ 800031c: 50c4 str r4, [r0, r3]
+ adds r3, r3, #4
+ 800031e: 3304 adds r3, #4
+
+08000320 :
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ 8000320: 18c4 adds r4, r0, r3
+ cmp r4, r1
+ 8000322: 428c cmp r4, r1
+ bcc CopyDataInit
+ 8000324: d3f9 bcc.n 800031a
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ 8000326: 4a0a ldr r2, [pc, #40] ; (8000350 )
+ ldr r4, =_ebss
+ 8000328: 4c0a ldr r4, [pc, #40] ; (8000354 )
+ movs r3, #0
+ 800032a: 2300 movs r3, #0
+ b LoopFillZerobss
+ 800032c: e001 b.n 8000332
+
+0800032e :
+
+FillZerobss:
+ str r3, [r2]
+ 800032e: 6013 str r3, [r2, #0]
+ adds r2, r2, #4
+ 8000330: 3204 adds r2, #4
+
+08000332 :
+
+LoopFillZerobss:
+ cmp r2, r4
+ 8000332: 42a2 cmp r2, r4
+ bcc FillZerobss
+ 8000334: d3fb bcc.n 800032e
+
+/* Call the clock system intitialization function.*/
+ bl SystemInit
+ 8000336: f7ff ffe4 bl 8000302
+/* Call static constructors */
+ bl __libc_init_array
+ 800033a: f000 fd3d bl 8000db8 <__libc_init_array>
+/* Call the application's entry point.*/
+ bl main
+ 800033e: f7ff ff05 bl 800014c
+ bx lr
+ 8000342: 4770 bx lr
+ ldr r0, =_sdata
+ 8000344: 20000000 .word 0x20000000
+ ldr r1, =_edata
+ 8000348: 2000000c .word 0x2000000c
+ ldr r2, =_sidata
+ 800034c: 08000e50 .word 0x08000e50
+ ldr r2, =_sbss
+ 8000350: 2000000c .word 0x2000000c
+ ldr r4, =_ebss
+ 8000354: 2000002c .word 0x2000002c
+
+08000358 :
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ 8000358: e7fe b.n 8000358
+ ...
+
+0800035c :
+ * need to ensure that the SysTick time base is always set to 1 millisecond
+ * to have correct HAL operation.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_Init(void)
+{
+ 800035c: b580 push {r7, lr}
+ 800035e: af00 add r7, sp, #0
+ defined(STM32F102x6) || defined(STM32F102xB) || \
+ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
+ defined(STM32F105xC) || defined(STM32F107xC)
+
+ /* Prefetch buffer is not available on value line devices */
+ __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
+ 8000360: 4b08 ldr r3, [pc, #32] ; (8000384 )
+ 8000362: 681b ldr r3, [r3, #0]
+ 8000364: 4a07 ldr r2, [pc, #28] ; (8000384 )
+ 8000366: f043 0310 orr.w r3, r3, #16
+ 800036a: 6013 str r3, [r2, #0]
+#endif
+#endif /* PREFETCH_ENABLE */
+
+ /* Set Interrupt Group Priority */
+ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
+ 800036c: 2003 movs r0, #3
+ 800036e: f000 f907 bl 8000580
+
+ /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
+ HAL_InitTick(TICK_INT_PRIORITY);
+ 8000372: 200f movs r0, #15
+ 8000374: f000 f808 bl 8000388
+
+ /* Init the low level hardware */
+ HAL_MspInit();
+ 8000378: f7ff ff6a bl 8000250
+
+ /* Return function status */
+ return HAL_OK;
+ 800037c: 2300 movs r3, #0
+}
+ 800037e: 4618 mov r0, r3
+ 8000380: bd80 pop {r7, pc}
+ 8000382: bf00 nop
+ 8000384: 40022000 .word 0x40022000
+
+08000388 :
+ * implementation in user file.
+ * @param TickPriority Tick interrupt priority.
+ * @retval HAL status
+ */
+__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ 8000388: b580 push {r7, lr}
+ 800038a: b082 sub sp, #8
+ 800038c: af00 add r7, sp, #0
+ 800038e: 6078 str r0, [r7, #4]
+ /* Configure the SysTick to have interrupt in 1ms time basis*/
+ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
+ 8000390: 4b12 ldr r3, [pc, #72] ; (80003dc )
+ 8000392: 681a ldr r2, [r3, #0]
+ 8000394: 4b12 ldr r3, [pc, #72] ; (80003e0 )
+ 8000396: 781b ldrb r3, [r3, #0]
+ 8000398: 4619 mov r1, r3
+ 800039a: f44f 737a mov.w r3, #1000 ; 0x3e8
+ 800039e: fbb3 f3f1 udiv r3, r3, r1
+ 80003a2: fbb2 f3f3 udiv r3, r2, r3
+ 80003a6: 4618 mov r0, r3
+ 80003a8: f000 f911 bl 80005ce
+ 80003ac: 4603 mov r3, r0
+ 80003ae: 2b00 cmp r3, #0
+ 80003b0: d001 beq.n 80003b6
+ {
+ return HAL_ERROR;
+ 80003b2: 2301 movs r3, #1
+ 80003b4: e00e b.n 80003d4
+ }
+
+ /* Configure the SysTick IRQ priority */
+ if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ 80003b6: 687b ldr r3, [r7, #4]
+ 80003b8: 2b0f cmp r3, #15
+ 80003ba: d80a bhi.n 80003d2
+ {
+ HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
+ 80003bc: 2200 movs r2, #0
+ 80003be: 6879 ldr r1, [r7, #4]
+ 80003c0: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
+ 80003c4: f000 f8e7 bl 8000596
+ uwTickPrio = TickPriority;
+ 80003c8: 4a06 ldr r2, [pc, #24] ; (80003e4 )
+ 80003ca: 687b ldr r3, [r7, #4]
+ 80003cc: 6013 str r3, [r2, #0]
+ {
+ return HAL_ERROR;
+ }
+
+ /* Return function status */
+ return HAL_OK;
+ 80003ce: 2300 movs r3, #0
+ 80003d0: e000 b.n 80003d4
+ return HAL_ERROR;
+ 80003d2: 2301 movs r3, #1
+}
+ 80003d4: 4618 mov r0, r3
+ 80003d6: 3708 adds r7, #8
+ 80003d8: 46bd mov sp, r7
+ 80003da: bd80 pop {r7, pc}
+ 80003dc: 20000000 .word 0x20000000
+ 80003e0: 20000008 .word 0x20000008
+ 80003e4: 20000004 .word 0x20000004
+
+080003e8 :
+ * @note This function is declared as __weak to be overwritten in case of other
+ * implementations in user file.
+ * @retval None
+ */
+__weak void HAL_IncTick(void)
+{
+ 80003e8: b480 push {r7}
+ 80003ea: af00 add r7, sp, #0
+ uwTick += uwTickFreq;
+ 80003ec: 4b05 ldr r3, [pc, #20] ; (8000404 )
+ 80003ee: 781b ldrb r3, [r3, #0]
+ 80003f0: 461a mov r2, r3
+ 80003f2: 4b05 ldr r3, [pc, #20] ; (8000408 )
+ 80003f4: 681b ldr r3, [r3, #0]
+ 80003f6: 4413 add r3, r2
+ 80003f8: 4a03 ldr r2, [pc, #12] ; (8000408 )
+ 80003fa: 6013 str r3, [r2, #0]
+}
+ 80003fc: bf00 nop
+ 80003fe: 46bd mov sp, r7
+ 8000400: bc80 pop {r7}
+ 8000402: 4770 bx lr
+ 8000404: 20000008 .word 0x20000008
+ 8000408: 20000028 .word 0x20000028
+
+0800040c :
+ * @note This function is declared as __weak to be overwritten in case of other
+ * implementations in user file.
+ * @retval tick value
+ */
+__weak uint32_t HAL_GetTick(void)
+{
+ 800040c: b480 push {r7}
+ 800040e: af00 add r7, sp, #0
+ return uwTick;
+ 8000410: 4b02 ldr r3, [pc, #8] ; (800041c )
+ 8000412: 681b ldr r3, [r3, #0]
+}
+ 8000414: 4618 mov r0, r3
+ 8000416: 46bd mov sp, r7
+ 8000418: bc80 pop {r7}
+ 800041a: 4770 bx lr
+ 800041c: 20000028 .word 0x20000028
+
+08000420 <__NVIC_SetPriorityGrouping>:
+ In case of a conflict between priority grouping and available
+ priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+ \param [in] PriorityGroup Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ 8000420: b480 push {r7}
+ 8000422: b085 sub sp, #20
+ 8000424: af00 add r7, sp, #0
+ 8000426: 6078 str r0, [r7, #4]
+ uint32_t reg_value;
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+ 8000428: 687b ldr r3, [r7, #4]
+ 800042a: f003 0307 and.w r3, r3, #7
+ 800042e: 60fb str r3, [r7, #12]
+
+ reg_value = SCB->AIRCR; /* read old register configuration */
+ 8000430: 4b0c ldr r3, [pc, #48] ; (8000464 <__NVIC_SetPriorityGrouping+0x44>)
+ 8000432: 68db ldr r3, [r3, #12]
+ 8000434: 60bb str r3, [r7, #8]
+ reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
+ 8000436: 68ba ldr r2, [r7, #8]
+ 8000438: f64f 03ff movw r3, #63743 ; 0xf8ff
+ 800043c: 4013 ands r3, r2
+ 800043e: 60bb str r3, [r7, #8]
+ reg_value = (reg_value |
+ ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
+ 8000440: 68fb ldr r3, [r7, #12]
+ 8000442: 021a lsls r2, r3, #8
+ ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ 8000444: 68bb ldr r3, [r7, #8]
+ 8000446: 4313 orrs r3, r2
+ reg_value = (reg_value |
+ 8000448: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
+ 800044c: f443 3300 orr.w r3, r3, #131072 ; 0x20000
+ 8000450: 60bb str r3, [r7, #8]
+ SCB->AIRCR = reg_value;
+ 8000452: 4a04 ldr r2, [pc, #16] ; (8000464 <__NVIC_SetPriorityGrouping+0x44>)
+ 8000454: 68bb ldr r3, [r7, #8]
+ 8000456: 60d3 str r3, [r2, #12]
+}
+ 8000458: bf00 nop
+ 800045a: 3714 adds r7, #20
+ 800045c: 46bd mov sp, r7
+ 800045e: bc80 pop {r7}
+ 8000460: 4770 bx lr
+ 8000462: bf00 nop
+ 8000464: e000ed00 .word 0xe000ed00
+
+08000468 <__NVIC_GetPriorityGrouping>:
+ \brief Get Priority Grouping
+ \details Reads the priority grouping field from the NVIC Interrupt Controller.
+ \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+ 8000468: b480 push {r7}
+ 800046a: af00 add r7, sp, #0
+ return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+ 800046c: 4b04 ldr r3, [pc, #16] ; (8000480 <__NVIC_GetPriorityGrouping+0x18>)
+ 800046e: 68db ldr r3, [r3, #12]
+ 8000470: 0a1b lsrs r3, r3, #8
+ 8000472: f003 0307 and.w r3, r3, #7
+}
+ 8000476: 4618 mov r0, r3
+ 8000478: 46bd mov sp, r7
+ 800047a: bc80 pop {r7}
+ 800047c: 4770 bx lr
+ 800047e: bf00 nop
+ 8000480: e000ed00 .word 0xe000ed00
+
+08000484 <__NVIC_SetPriority>:
+ \param [in] IRQn Interrupt number.
+ \param [in] priority Priority to set.
+ \note The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+ 8000484: b480 push {r7}
+ 8000486: b083 sub sp, #12
+ 8000488: af00 add r7, sp, #0
+ 800048a: 4603 mov r3, r0
+ 800048c: 6039 str r1, [r7, #0]
+ 800048e: 71fb strb r3, [r7, #7]
+ if ((int32_t)(IRQn) >= 0)
+ 8000490: f997 3007 ldrsb.w r3, [r7, #7]
+ 8000494: 2b00 cmp r3, #0
+ 8000496: db0a blt.n 80004ae <__NVIC_SetPriority+0x2a>
+ {
+ NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ 8000498: 683b ldr r3, [r7, #0]
+ 800049a: b2da uxtb r2, r3
+ 800049c: 490c ldr r1, [pc, #48] ; (80004d0 <__NVIC_SetPriority+0x4c>)
+ 800049e: f997 3007 ldrsb.w r3, [r7, #7]
+ 80004a2: 0112 lsls r2, r2, #4
+ 80004a4: b2d2 uxtb r2, r2
+ 80004a6: 440b add r3, r1
+ 80004a8: f883 2300 strb.w r2, [r3, #768] ; 0x300
+ }
+ else
+ {
+ SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ }
+}
+ 80004ac: e00a b.n 80004c4 <__NVIC_SetPriority+0x40>
+ SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ 80004ae: 683b ldr r3, [r7, #0]
+ 80004b0: b2da uxtb r2, r3
+ 80004b2: 4908 ldr r1, [pc, #32] ; (80004d4 <__NVIC_SetPriority+0x50>)
+ 80004b4: 79fb ldrb r3, [r7, #7]
+ 80004b6: f003 030f and.w r3, r3, #15
+ 80004ba: 3b04 subs r3, #4
+ 80004bc: 0112 lsls r2, r2, #4
+ 80004be: b2d2 uxtb r2, r2
+ 80004c0: 440b add r3, r1
+ 80004c2: 761a strb r2, [r3, #24]
+}
+ 80004c4: bf00 nop
+ 80004c6: 370c adds r7, #12
+ 80004c8: 46bd mov sp, r7
+ 80004ca: bc80 pop {r7}
+ 80004cc: 4770 bx lr
+ 80004ce: bf00 nop
+ 80004d0: e000e100 .word 0xe000e100
+ 80004d4: e000ed00 .word 0xe000ed00
+
+080004d8 :
+ \param [in] PreemptPriority Preemptive priority value (starting from 0).
+ \param [in] SubPriority Subpriority value (starting from 0).
+ \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ 80004d8: b480 push {r7}
+ 80004da: b089 sub sp, #36 ; 0x24
+ 80004dc: af00 add r7, sp, #0
+ 80004de: 60f8 str r0, [r7, #12]
+ 80004e0: 60b9 str r1, [r7, #8]
+ 80004e2: 607a str r2, [r7, #4]
+ uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
+ 80004e4: 68fb ldr r3, [r7, #12]
+ 80004e6: f003 0307 and.w r3, r3, #7
+ 80004ea: 61fb str r3, [r7, #28]
+ uint32_t PreemptPriorityBits;
+ uint32_t SubPriorityBits;
+
+ PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+ 80004ec: 69fb ldr r3, [r7, #28]
+ 80004ee: f1c3 0307 rsb r3, r3, #7
+ 80004f2: 2b04 cmp r3, #4
+ 80004f4: bf28 it cs
+ 80004f6: 2304 movcs r3, #4
+ 80004f8: 61bb str r3, [r7, #24]
+ SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+ 80004fa: 69fb ldr r3, [r7, #28]
+ 80004fc: 3304 adds r3, #4
+ 80004fe: 2b06 cmp r3, #6
+ 8000500: d902 bls.n 8000508
+ 8000502: 69fb ldr r3, [r7, #28]
+ 8000504: 3b03 subs r3, #3
+ 8000506: e000 b.n 800050a
+ 8000508: 2300 movs r3, #0
+ 800050a: 617b str r3, [r7, #20]
+
+ return (
+ ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ 800050c: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
+ 8000510: 69bb ldr r3, [r7, #24]
+ 8000512: fa02 f303 lsl.w r3, r2, r3
+ 8000516: 43da mvns r2, r3
+ 8000518: 68bb ldr r3, [r7, #8]
+ 800051a: 401a ands r2, r3
+ 800051c: 697b ldr r3, [r7, #20]
+ 800051e: 409a lsls r2, r3
+ ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
+ 8000520: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
+ 8000524: 697b ldr r3, [r7, #20]
+ 8000526: fa01 f303 lsl.w r3, r1, r3
+ 800052a: 43d9 mvns r1, r3
+ 800052c: 687b ldr r3, [r7, #4]
+ 800052e: 400b ands r3, r1
+ ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ 8000530: 4313 orrs r3, r2
+ );
+}
+ 8000532: 4618 mov r0, r3
+ 8000534: 3724 adds r7, #36 ; 0x24
+ 8000536: 46bd mov sp, r7
+ 8000538: bc80 pop {r7}
+ 800053a: 4770 bx lr
+
+0800053c :
+ \note When the variable __Vendor_SysTickConfig is set to 1, then the
+ function SysTick_Config is not included. In this case, the file device .h
+ {
+ return (1UL); /* Reload value impossible */
+ 800054e: 2301 movs r3, #1
+ 8000550: e00f b.n 8000572
+ }
+
+ SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
+ 8000552: 4a0a ldr r2, [pc, #40] ; (800057c )
+ 8000554: 687b ldr r3, [r7, #4]
+ 8000556: 3b01 subs r3, #1
+ 8000558: 6053 str r3, [r2, #4]
+ NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+ 800055a: 210f movs r1, #15
+ 800055c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
+ 8000560: f7ff ff90 bl 8000484 <__NVIC_SetPriority>
+ SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
+ 8000564: 4b05 ldr r3, [pc, #20] ; (800057c )
+ 8000566: 2200 movs r2, #0
+ 8000568: 609a str r2, [r3, #8]
+ SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
+ 800056a: 4b04 ldr r3, [pc, #16] ; (800057c )
+ 800056c: 2207 movs r2, #7
+ 800056e: 601a str r2, [r3, #0]
+ SysTick_CTRL_TICKINT_Msk |
+ SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
+ return (0UL); /* Function successful */
+ 8000570: 2300 movs r3, #0
+}
+ 8000572: 4618 mov r0, r3
+ 8000574: 3708 adds r7, #8
+ 8000576: 46bd mov sp, r7
+ 8000578: bd80 pop {r7, pc}
+ 800057a: bf00 nop
+ 800057c: e000e010 .word 0xe000e010
+
+08000580 :
+ * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
+ * The pending IRQ priority will be managed only by the subpriority.
+ * @retval None
+ */
+void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ 8000580: b580 push {r7, lr}
+ 8000582: b082 sub sp, #8
+ 8000584: af00 add r7, sp, #0
+ 8000586: 6078 str r0, [r7, #4]
+ /* Check the parameters */
+ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
+
+ /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
+ NVIC_SetPriorityGrouping(PriorityGroup);
+ 8000588: 6878 ldr r0, [r7, #4]
+ 800058a: f7ff ff49 bl 8000420 <__NVIC_SetPriorityGrouping>
+}
+ 800058e: bf00 nop
+ 8000590: 3708 adds r7, #8
+ 8000592: 46bd mov sp, r7
+ 8000594: bd80 pop {r7, pc}
+
+08000596 :
+ * This parameter can be a value between 0 and 15
+ * A lower priority value indicates a higher priority.
+ * @retval None
+ */
+void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ 8000596: b580 push {r7, lr}
+ 8000598: b086 sub sp, #24
+ 800059a: af00 add r7, sp, #0
+ 800059c: 4603 mov r3, r0
+ 800059e: 60b9 str r1, [r7, #8]
+ 80005a0: 607a str r2, [r7, #4]
+ 80005a2: 73fb strb r3, [r7, #15]
+ uint32_t prioritygroup = 0x00U;
+ 80005a4: 2300 movs r3, #0
+ 80005a6: 617b str r3, [r7, #20]
+
+ /* Check the parameters */
+ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
+ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
+
+ prioritygroup = NVIC_GetPriorityGrouping();
+ 80005a8: f7ff ff5e bl 8000468 <__NVIC_GetPriorityGrouping>
+ 80005ac: 6178 str r0, [r7, #20]
+
+ NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
+ 80005ae: 687a ldr r2, [r7, #4]
+ 80005b0: 68b9 ldr r1, [r7, #8]
+ 80005b2: 6978 ldr r0, [r7, #20]
+ 80005b4: f7ff ff90 bl 80004d8
+ 80005b8: 4602 mov r2, r0
+ 80005ba: f997 300f ldrsb.w r3, [r7, #15]
+ 80005be: 4611 mov r1, r2
+ 80005c0: 4618 mov r0, r3
+ 80005c2: f7ff ff5f bl 8000484 <__NVIC_SetPriority>
+}
+ 80005c6: bf00 nop
+ 80005c8: 3718 adds r7, #24
+ 80005ca: 46bd mov sp, r7
+ 80005cc: bd80 pop {r7, pc}
+
+080005ce :
+ * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
+ * @retval status: - 0 Function succeeded.
+ * - 1 Function failed.
+ */
+uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
+{
+ 80005ce: b580 push {r7, lr}
+ 80005d0: b082 sub sp, #8
+ 80005d2: af00 add r7, sp, #0
+ 80005d4: 6078 str r0, [r7, #4]
+ return SysTick_Config(TicksNumb);
+ 80005d6: 6878 ldr r0, [r7, #4]
+ 80005d8: f7ff ffb0 bl 800053c
+ 80005dc: 4603 mov r3, r0
+}
+ 80005de: 4618 mov r0, r3
+ 80005e0: 3708 adds r7, #8
+ 80005e2: 46bd mov sp, r7
+ 80005e4: bd80 pop {r7, pc}
+ ...
+
+080005e8 :
+ * supported by this macro. User should request a transition to HSE Off
+ * first and then HSE On or HSE Bypass.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
+{
+ 80005e8: b580 push {r7, lr}
+ 80005ea: b086 sub sp, #24
+ 80005ec: af00 add r7, sp, #0
+ 80005ee: 6078 str r0, [r7, #4]
+ uint32_t tickstart;
+ uint32_t pll_config;
+
+ /* Check Null pointer */
+ if (RCC_OscInitStruct == NULL)
+ 80005f0: 687b ldr r3, [r7, #4]
+ 80005f2: 2b00 cmp r3, #0
+ 80005f4: d101 bne.n 80005fa
+ {
+ return HAL_ERROR;
+ 80005f6: 2301 movs r3, #1
+ 80005f8: e26c b.n 8000ad4
+
+ /* Check the parameters */
+ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
+
+ /*------------------------------- HSE Configuration ------------------------*/
+ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
+ 80005fa: 687b ldr r3, [r7, #4]
+ 80005fc: 681b ldr r3, [r3, #0]
+ 80005fe: f003 0301 and.w r3, r3, #1
+ 8000602: 2b00 cmp r3, #0
+ 8000604: f000 8087 beq.w 8000716
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
+
+ /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
+ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
+ 8000608: 4b92 ldr r3, [pc, #584] ; (8000854 )
+ 800060a: 685b ldr r3, [r3, #4]
+ 800060c: f003 030c and.w r3, r3, #12
+ 8000610: 2b04 cmp r3, #4
+ 8000612: d00c beq.n 800062e
+ || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
+ 8000614: 4b8f ldr r3, [pc, #572] ; (8000854 )
+ 8000616: 685b ldr r3, [r3, #4]
+ 8000618: f003 030c and.w r3, r3, #12
+ 800061c: 2b08 cmp r3, #8
+ 800061e: d112 bne.n 8000646
+ 8000620: 4b8c ldr r3, [pc, #560] ; (8000854 )
+ 8000622: 685b ldr r3, [r3, #4]
+ 8000624: f403 3380 and.w r3, r3, #65536 ; 0x10000
+ 8000628: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
+ 800062c: d10b bne.n 8000646
+ {
+ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
+ 800062e: 4b89 ldr r3, [pc, #548] ; (8000854 )
+ 8000630: 681b ldr r3, [r3, #0]
+ 8000632: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 8000636: 2b00 cmp r3, #0
+ 8000638: d06c beq.n 8000714
+ 800063a: 687b ldr r3, [r7, #4]
+ 800063c: 685b ldr r3, [r3, #4]
+ 800063e: 2b00 cmp r3, #0
+ 8000640: d168 bne.n 8000714
+ {
+ return HAL_ERROR;
+ 8000642: 2301 movs r3, #1
+ 8000644: e246 b.n 8000ad4
+ }
+ }
+ else
+ {
+ /* Set the new HSE configuration ---------------------------------------*/
+ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
+ 8000646: 687b ldr r3, [r7, #4]
+ 8000648: 685b ldr r3, [r3, #4]
+ 800064a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
+ 800064e: d106 bne.n 800065e
+ 8000650: 4b80 ldr r3, [pc, #512] ; (8000854 )
+ 8000652: 681b ldr r3, [r3, #0]
+ 8000654: 4a7f ldr r2, [pc, #508] ; (8000854 )
+ 8000656: f443 3380 orr.w r3, r3, #65536 ; 0x10000
+ 800065a: 6013 str r3, [r2, #0]
+ 800065c: e02e b.n 80006bc
+ 800065e: 687b ldr r3, [r7, #4]
+ 8000660: 685b ldr r3, [r3, #4]
+ 8000662: 2b00 cmp r3, #0
+ 8000664: d10c bne.n 8000680
+ 8000666: 4b7b ldr r3, [pc, #492] ; (8000854 )
+ 8000668: 681b ldr r3, [r3, #0]
+ 800066a: 4a7a ldr r2, [pc, #488] ; (8000854 )
+ 800066c: f423 3380 bic.w r3, r3, #65536 ; 0x10000
+ 8000670: 6013 str r3, [r2, #0]
+ 8000672: 4b78 ldr r3, [pc, #480] ; (8000854 )
+ 8000674: 681b ldr r3, [r3, #0]
+ 8000676: 4a77 ldr r2, [pc, #476] ; (8000854 )
+ 8000678: f423 2380 bic.w r3, r3, #262144 ; 0x40000
+ 800067c: 6013 str r3, [r2, #0]
+ 800067e: e01d b.n 80006bc
+ 8000680: 687b ldr r3, [r7, #4]
+ 8000682: 685b ldr r3, [r3, #4]
+ 8000684: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
+ 8000688: d10c bne.n 80006a4
+ 800068a: 4b72 ldr r3, [pc, #456] ; (8000854 )
+ 800068c: 681b ldr r3, [r3, #0]
+ 800068e: 4a71 ldr r2, [pc, #452] ; (8000854 )
+ 8000690: f443 2380 orr.w r3, r3, #262144 ; 0x40000
+ 8000694: 6013 str r3, [r2, #0]
+ 8000696: 4b6f ldr r3, [pc, #444] ; (8000854 )
+ 8000698: 681b ldr r3, [r3, #0]
+ 800069a: 4a6e ldr r2, [pc, #440] ; (8000854 )
+ 800069c: f443 3380 orr.w r3, r3, #65536 ; 0x10000
+ 80006a0: 6013 str r3, [r2, #0]
+ 80006a2: e00b b.n 80006bc
+ 80006a4: 4b6b ldr r3, [pc, #428] ; (8000854 )
+ 80006a6: 681b ldr r3, [r3, #0]
+ 80006a8: 4a6a ldr r2, [pc, #424] ; (8000854 )
+ 80006aa: f423 3380 bic.w r3, r3, #65536 ; 0x10000
+ 80006ae: 6013 str r3, [r2, #0]
+ 80006b0: 4b68 ldr r3, [pc, #416] ; (8000854 )
+ 80006b2: 681b ldr r3, [r3, #0]
+ 80006b4: 4a67 ldr r2, [pc, #412] ; (8000854 )
+ 80006b6: f423 2380 bic.w r3, r3, #262144 ; 0x40000
+ 80006ba: 6013 str r3, [r2, #0]
+
+
+ /* Check the HSE State */
+ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
+ 80006bc: 687b ldr r3, [r7, #4]
+ 80006be: 685b ldr r3, [r3, #4]
+ 80006c0: 2b00 cmp r3, #0
+ 80006c2: d013 beq.n 80006ec
+ {
+ /* Get Start Tick */
+ tickstart = HAL_GetTick();
+ 80006c4: f7ff fea2 bl 800040c
+ 80006c8: 6138 str r0, [r7, #16]
+
+ /* Wait till HSE is ready */
+ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+ 80006ca: e008 b.n 80006de
+ {
+ if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
+ 80006cc: f7ff fe9e bl 800040c
+ 80006d0: 4602 mov r2, r0
+ 80006d2: 693b ldr r3, [r7, #16]
+ 80006d4: 1ad3 subs r3, r2, r3
+ 80006d6: 2b64 cmp r3, #100 ; 0x64
+ 80006d8: d901 bls.n 80006de
+ {
+ return HAL_TIMEOUT;
+ 80006da: 2303 movs r3, #3
+ 80006dc: e1fa b.n 8000ad4
+ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+ 80006de: 4b5d ldr r3, [pc, #372] ; (8000854 )
+ 80006e0: 681b ldr r3, [r3, #0]
+ 80006e2: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 80006e6: 2b00 cmp r3, #0
+ 80006e8: d0f0 beq.n 80006cc
+ 80006ea: e014 b.n 8000716
+ }
+ }
+ else
+ {
+ /* Get Start Tick */
+ tickstart = HAL_GetTick();
+ 80006ec: f7ff fe8e bl 800040c
+ 80006f0: 6138 str r0, [r7, #16]
+
+ /* Wait till HSE is disabled */
+ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
+ 80006f2: e008 b.n 8000706
+ {
+ if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
+ 80006f4: f7ff fe8a bl 800040c
+ 80006f8: 4602 mov r2, r0
+ 80006fa: 693b ldr r3, [r7, #16]
+ 80006fc: 1ad3 subs r3, r2, r3
+ 80006fe: 2b64 cmp r3, #100 ; 0x64
+ 8000700: d901 bls.n 8000706
+ {
+ return HAL_TIMEOUT;
+ 8000702: 2303 movs r3, #3
+ 8000704: e1e6 b.n 8000ad4
+ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
+ 8000706: 4b53 ldr r3, [pc, #332] ; (8000854 )
+ 8000708: 681b ldr r3, [r3, #0]
+ 800070a: f403 3300 and.w r3, r3, #131072 ; 0x20000
+ 800070e: 2b00 cmp r3, #0
+ 8000710: d1f0 bne.n 80006f4
+ 8000712: e000 b.n 8000716
+ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
+ 8000714: bf00 nop
+ }
+ }
+ }
+ }
+ /*----------------------------- HSI Configuration --------------------------*/
+ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
+ 8000716: 687b ldr r3, [r7, #4]
+ 8000718: 681b ldr r3, [r3, #0]
+ 800071a: f003 0302 and.w r3, r3, #2
+ 800071e: 2b00 cmp r3, #0
+ 8000720: d063 beq.n 80007ea
+ /* Check the parameters */
+ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
+ assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
+
+ /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
+ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
+ 8000722: 4b4c ldr r3, [pc, #304] ; (8000854 )
+ 8000724: 685b ldr r3, [r3, #4]
+ 8000726: f003 030c and.w r3, r3, #12
+ 800072a: 2b00 cmp r3, #0
+ 800072c: d00b beq.n 8000746
+ || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
+ 800072e: 4b49 ldr r3, [pc, #292] ; (8000854 )
+ 8000730: 685b ldr r3, [r3, #4]
+ 8000732: f003 030c and.w r3, r3, #12
+ 8000736: 2b08 cmp r3, #8
+ 8000738: d11c bne.n 8000774
+ 800073a: 4b46 ldr r3, [pc, #280] ; (8000854 )
+ 800073c: 685b ldr r3, [r3, #4]
+ 800073e: f403 3380 and.w r3, r3, #65536 ; 0x10000
+ 8000742: 2b00 cmp r3, #0
+ 8000744: d116 bne.n 8000774
+ {
+ /* When HSI is used as system clock it will not disabled */
+ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
+ 8000746: 4b43 ldr r3, [pc, #268] ; (8000854 )
+ 8000748: 681b ldr r3, [r3, #0]
+ 800074a: f003 0302 and.w r3, r3, #2
+ 800074e: 2b00 cmp r3, #0
+ 8000750: d005 beq.n 800075e
+ 8000752: 687b ldr r3, [r7, #4]
+ 8000754: 691b ldr r3, [r3, #16]
+ 8000756: 2b01 cmp r3, #1
+ 8000758: d001 beq.n 800075e
+ {
+ return HAL_ERROR;
+ 800075a: 2301 movs r3, #1
+ 800075c: e1ba b.n 8000ad4
+ }
+ /* Otherwise, just the calibration is allowed */
+ else
+ {
+ /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
+ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
+ 800075e: 4b3d ldr r3, [pc, #244] ; (8000854 )
+ 8000760: 681b ldr r3, [r3, #0]
+ 8000762: f023 02f8 bic.w r2, r3, #248 ; 0xf8
+ 8000766: 687b ldr r3, [r7, #4]
+ 8000768: 695b ldr r3, [r3, #20]
+ 800076a: 00db lsls r3, r3, #3
+ 800076c: 4939 ldr r1, [pc, #228] ; (8000854 )
+ 800076e: 4313 orrs r3, r2
+ 8000770: 600b str r3, [r1, #0]
+ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
+ 8000772: e03a b.n 80007ea
+ }
+ }
+ else
+ {
+ /* Check the HSI State */
+ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
+ 8000774: 687b ldr r3, [r7, #4]
+ 8000776: 691b ldr r3, [r3, #16]
+ 8000778: 2b00 cmp r3, #0
+ 800077a: d020 beq.n 80007be
+ {
+ /* Enable the Internal High Speed oscillator (HSI). */
+ __HAL_RCC_HSI_ENABLE();
+ 800077c: 4b36 ldr r3, [pc, #216] ; (8000858 )
+ 800077e: 2201 movs r2, #1
+ 8000780: 601a str r2, [r3, #0]
+
+ /* Get Start Tick */
+ tickstart = HAL_GetTick();
+ 8000782: f7ff fe43 bl 800040c
+ 8000786: 6138 str r0, [r7, #16]
+
+ /* Wait till HSI is ready */
+ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+ 8000788: e008 b.n 800079c
+ {
+ if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
+ 800078a: f7ff fe3f bl 800040c
+ 800078e: 4602 mov r2, r0
+ 8000790: 693b ldr r3, [r7, #16]
+ 8000792: 1ad3 subs r3, r2, r3
+ 8000794: 2b02 cmp r3, #2
+ 8000796: d901 bls.n 800079c
+ {
+ return HAL_TIMEOUT;
+ 8000798: 2303 movs r3, #3
+ 800079a: e19b b.n 8000ad4
+ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+ 800079c: 4b2d ldr r3, [pc, #180] ; (8000854 )
+ 800079e: 681b ldr r3, [r3, #0]
+ 80007a0: f003 0302 and.w r3, r3, #2
+ 80007a4: 2b00 cmp r3, #0
+ 80007a6: d0f0 beq.n 800078a
+ }
+ }
+
+ /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
+ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
+ 80007a8: 4b2a ldr r3, [pc, #168] ; (8000854 )
+ 80007aa: 681b ldr r3, [r3, #0]
+ 80007ac: f023 02f8 bic.w r2, r3, #248 ; 0xf8
+ 80007b0: 687b ldr r3, [r7, #4]
+ 80007b2: 695b ldr r3, [r3, #20]
+ 80007b4: 00db lsls r3, r3, #3
+ 80007b6: 4927 ldr r1, [pc, #156] ; (8000854 )
+ 80007b8: 4313 orrs r3, r2
+ 80007ba: 600b str r3, [r1, #0]
+ 80007bc: e015 b.n 80007ea
+ }
+ else
+ {
+ /* Disable the Internal High Speed oscillator (HSI). */
+ __HAL_RCC_HSI_DISABLE();
+ 80007be: 4b26 ldr r3, [pc, #152] ; (8000858 )
+ 80007c0: 2200 movs r2, #0
+ 80007c2: 601a str r2, [r3, #0]
+
+ /* Get Start Tick */
+ tickstart = HAL_GetTick();
+ 80007c4: f7ff fe22 bl 800040c
+ 80007c8: 6138 str r0, [r7, #16]
+
+ /* Wait till HSI is disabled */
+ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
+ 80007ca: e008 b.n 80007de
+ {
+ if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
+ 80007cc: f7ff fe1e bl 800040c
+ 80007d0: 4602 mov r2, r0
+ 80007d2: 693b ldr r3, [r7, #16]
+ 80007d4: 1ad3 subs r3, r2, r3
+ 80007d6: 2b02 cmp r3, #2
+ 80007d8: d901 bls.n 80007de
+ {
+ return HAL_TIMEOUT;
+ 80007da: 2303 movs r3, #3
+ 80007dc: e17a b.n 8000ad4
+ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
+ 80007de: 4b1d ldr r3, [pc, #116] ; (8000854 )
+ 80007e0: 681b ldr r3, [r3, #0]
+ 80007e2: f003 0302 and.w r3, r3, #2
+ 80007e6: 2b00 cmp r3, #0
+ 80007e8: d1f0 bne.n 80007cc
+ }
+ }
+ }
+ }
+ /*------------------------------ LSI Configuration -------------------------*/
+ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
+ 80007ea: 687b ldr r3, [r7, #4]
+ 80007ec: 681b ldr r3, [r3, #0]
+ 80007ee: f003 0308 and.w r3, r3, #8
+ 80007f2: 2b00 cmp r3, #0
+ 80007f4: d03a beq.n 800086c
+ {
+ /* Check the parameters */
+ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
+
+ /* Check the LSI State */
+ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
+ 80007f6: 687b ldr r3, [r7, #4]
+ 80007f8: 699b ldr r3, [r3, #24]
+ 80007fa: 2b00 cmp r3, #0
+ 80007fc: d019 beq.n 8000832
+ {
+ /* Enable the Internal Low Speed oscillator (LSI). */
+ __HAL_RCC_LSI_ENABLE();
+ 80007fe: 4b17 ldr r3, [pc, #92] ; (800085c )
+ 8000800: 2201 movs r2, #1
+ 8000802: 601a str r2, [r3, #0]
+
+ /* Get Start Tick */
+ tickstart = HAL_GetTick();
+ 8000804: f7ff fe02 bl 800040c
+ 8000808: 6138 str r0, [r7, #16]
+
+ /* Wait till LSI is ready */
+ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
+ 800080a: e008 b.n 800081e
+ {
+ if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
+ 800080c: f7ff fdfe bl 800040c
+ 8000810: 4602 mov r2, r0
+ 8000812: 693b ldr r3, [r7, #16]
+ 8000814: 1ad3 subs r3, r2, r3
+ 8000816: 2b02 cmp r3, #2
+ 8000818: d901 bls.n 800081e
+ {
+ return HAL_TIMEOUT;
+ 800081a: 2303 movs r3, #3
+ 800081c: e15a b.n 8000ad4
+ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
+ 800081e: 4b0d ldr r3, [pc, #52] ; (8000854 )
+ 8000820: 6a5b ldr r3, [r3, #36] ; 0x24
+ 8000822: f003 0302 and.w r3, r3, #2
+ 8000826: 2b00 cmp r3, #0
+ 8000828: d0f0 beq.n 800080c
+ }
+ }
+ /* To have a fully stabilized clock in the specified range, a software delay of 1ms
+ should be added.*/
+ RCC_Delay(1);
+ 800082a: 2001 movs r0, #1
+ 800082c: f000 faa6 bl 8000d7c
+ 8000830: e01c b.n 800086c
+ }
+ else
+ {
+ /* Disable the Internal Low Speed oscillator (LSI). */
+ __HAL_RCC_LSI_DISABLE();
+ 8000832: 4b0a ldr r3, [pc, #40] ; (800085c )
+ 8000834: 2200 movs r2, #0
+ 8000836: 601a str r2, [r3, #0]
+
+ /* Get Start Tick */
+ tickstart = HAL_GetTick();
+ 8000838: f7ff fde8 bl 800040c
+ 800083c: 6138 str r0, [r7, #16]
+
+ /* Wait till LSI is disabled */
+ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
+ 800083e: e00f b.n 8000860
+ {
+ if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
+ 8000840: f7ff fde4 bl 800040c
+ 8000844: 4602 mov r2, r0
+ 8000846: 693b ldr r3, [r7, #16]
+ 8000848: 1ad3 subs r3, r2, r3
+ 800084a: 2b02 cmp r3, #2
+ 800084c: d908 bls.n 8000860
+ {
+ return HAL_TIMEOUT;
+ 800084e: 2303 movs r3, #3
+ 8000850: e140 b.n 8000ad4
+ 8000852: bf00 nop
+ 8000854: 40021000 .word 0x40021000
+ 8000858: 42420000 .word 0x42420000
+ 800085c: 42420480 .word 0x42420480
+ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
+ 8000860: 4b9e ldr r3, [pc, #632] ; (8000adc )
+ 8000862: 6a5b ldr r3, [r3, #36] ; 0x24
+ 8000864: f003 0302 and.w r3, r3, #2
+ 8000868: 2b00 cmp r3, #0
+ 800086a: d1e9 bne.n 8000840
+ }
+ }
+ }
+ }
+ /*------------------------------ LSE Configuration -------------------------*/
+ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
+ 800086c: 687b ldr r3, [r7, #4]
+ 800086e: 681b ldr r3, [r3, #0]
+ 8000870: f003 0304 and.w r3, r3, #4
+ 8000874: 2b00 cmp r3, #0
+ 8000876: f000 80a6 beq.w 80009c6
+ {
+ FlagStatus pwrclkchanged = RESET;
+ 800087a: 2300 movs r3, #0
+ 800087c: 75fb strb r3, [r7, #23]
+ /* Check the parameters */
+ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
+
+ /* Update LSE configuration in Backup Domain control register */
+ /* Requires to enable write access to Backup Domain of necessary */
+ if (__HAL_RCC_PWR_IS_CLK_DISABLED())
+ 800087e: 4b97 ldr r3, [pc, #604] ; (8000adc )
+ 8000880: 69db ldr r3, [r3, #28]
+ 8000882: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 8000886: 2b00 cmp r3, #0
+ 8000888: d10d bne.n 80008a6
+ {
+ __HAL_RCC_PWR_CLK_ENABLE();
+ 800088a: 4b94 ldr r3, [pc, #592] ; (8000adc )
+ 800088c: 69db ldr r3, [r3, #28]
+ 800088e: 4a93 ldr r2, [pc, #588] ; (8000adc )
+ 8000890: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 8000894: 61d3 str r3, [r2, #28]
+ 8000896: 4b91 ldr r3, [pc, #580] ; (8000adc )
+ 8000898: 69db ldr r3, [r3, #28]
+ 800089a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 800089e: 60bb str r3, [r7, #8]
+ 80008a0: 68bb ldr r3, [r7, #8]
+ pwrclkchanged = SET;
+ 80008a2: 2301 movs r3, #1
+ 80008a4: 75fb strb r3, [r7, #23]
+ }
+
+ if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
+ 80008a6: 4b8e ldr r3, [pc, #568] ; (8000ae0 )
+ 80008a8: 681b ldr r3, [r3, #0]
+ 80008aa: f403 7380 and.w r3, r3, #256 ; 0x100
+ 80008ae: 2b00 cmp r3, #0
+ 80008b0: d118 bne.n 80008e4
+ {
+ /* Enable write access to Backup domain */
+ SET_BIT(PWR->CR, PWR_CR_DBP);
+ 80008b2: 4b8b ldr r3, [pc, #556] ; (8000ae0 )
+ 80008b4: 681b ldr r3, [r3, #0]
+ 80008b6: 4a8a ldr r2, [pc, #552] ; (8000ae0 )
+ 80008b8: f443 7380 orr.w r3, r3, #256 ; 0x100
+ 80008bc: 6013 str r3, [r2, #0]
+
+ /* Wait for Backup domain Write protection disable */
+ tickstart = HAL_GetTick();
+ 80008be: f7ff fda5 bl 800040c
+ 80008c2: 6138 str r0, [r7, #16]
+
+ while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
+ 80008c4: e008 b.n 80008d8
+ {
+ if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
+ 80008c6: f7ff fda1 bl 800040c
+ 80008ca: 4602 mov r2, r0
+ 80008cc: 693b ldr r3, [r7, #16]
+ 80008ce: 1ad3 subs r3, r2, r3
+ 80008d0: 2b64 cmp r3, #100 ; 0x64
+ 80008d2: d901 bls.n 80008d8
+ {
+ return HAL_TIMEOUT;
+ 80008d4: 2303 movs r3, #3
+ 80008d6: e0fd b.n 8000ad4
+ while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
+ 80008d8: 4b81 ldr r3, [pc, #516] ; (8000ae0 )
+ 80008da: 681b ldr r3, [r3, #0]
+ 80008dc: f403 7380 and.w r3, r3, #256 ; 0x100
+ 80008e0: 2b00 cmp r3, #0
+ 80008e2: d0f0 beq.n 80008c6
+ }
+ }
+ }
+
+ /* Set the new LSE configuration -----------------------------------------*/
+ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
+ 80008e4: 687b ldr r3, [r7, #4]
+ 80008e6: 68db ldr r3, [r3, #12]
+ 80008e8: 2b01 cmp r3, #1
+ 80008ea: d106 bne.n 80008fa
+ 80008ec: 4b7b ldr r3, [pc, #492] ; (8000adc )
+ 80008ee: 6a1b ldr r3, [r3, #32]
+ 80008f0: 4a7a ldr r2, [pc, #488] ; (8000adc )
+ 80008f2: f043 0301 orr.w r3, r3, #1
+ 80008f6: 6213 str r3, [r2, #32]
+ 80008f8: e02d b.n 8000956
+ 80008fa: 687b ldr r3, [r7, #4]
+ 80008fc: 68db ldr r3, [r3, #12]
+ 80008fe: 2b00 cmp r3, #0
+ 8000900: d10c bne.n 800091c
+ 8000902: 4b76 ldr r3, [pc, #472] ; (8000adc )
+ 8000904: 6a1b ldr r3, [r3, #32]
+ 8000906: 4a75 ldr r2, [pc, #468] ; (8000adc )
+ 8000908: f023 0301 bic.w r3, r3, #1
+ 800090c: 6213 str r3, [r2, #32]
+ 800090e: 4b73 ldr r3, [pc, #460] ; (8000adc )
+ 8000910: 6a1b ldr r3, [r3, #32]
+ 8000912: 4a72 ldr r2, [pc, #456] ; (8000adc )
+ 8000914: f023 0304 bic.w r3, r3, #4
+ 8000918: 6213 str r3, [r2, #32]
+ 800091a: e01c b.n 8000956
+ 800091c: 687b ldr r3, [r7, #4]
+ 800091e: 68db ldr r3, [r3, #12]
+ 8000920: 2b05 cmp r3, #5
+ 8000922: d10c bne.n 800093e
+ 8000924: 4b6d ldr r3, [pc, #436] ; (8000adc )
+ 8000926: 6a1b ldr r3, [r3, #32]
+ 8000928: 4a6c ldr r2, [pc, #432] ; (8000adc