Files
morse_code_trainer/stm32f103/Debug/stm32f103.list
T
kevin fbd21ac0e1 Updata PCB
Signed-off-by: kevin <kevin@lmve.net>
2022-04-09 20:53:17 +08:00

20235 lines
727 KiB
Plaintext

stm32f103.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 0000010c 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 00007ec0 0800010c 0800010c 0001010c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 000000d8 08007fcc 08007fcc 00017fcc 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 080080a4 080080a4 000200dc 2**0
CONTENTS
4 .ARM 00000000 080080a4 080080a4 000200dc 2**0
CONTENTS
5 .preinit_array 00000000 080080a4 080080a4 000200dc 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 080080a4 080080a4 000180a4 2**2
CONTENTS, ALLOC, LOAD, DATA
7 .fini_array 00000004 080080a8 080080a8 000180a8 2**2
CONTENTS, ALLOC, LOAD, DATA
8 .data 000000dc 20000000 080080ac 00020000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 00000db8 200000dc 08008188 000200dc 2**2
ALLOC
10 ._user_heap_stack 00000604 20000e94 08008188 00020e94 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 000200dc 2**0
CONTENTS, READONLY
12 .debug_info 00017791 00000000 00000000 00020105 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 00003424 00000000 00000000 00037896 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 00001080 00000000 00000000 0003acc0 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_ranges 00000f60 00000000 00000000 0003bd40 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001aad7 00000000 00000000 0003cca0 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 00015028 00000000 00000000 00057777 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 0008e9a3 00000000 00000000 0006c79f 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000053 00000000 00000000 000fb142 2**0
CONTENTS, READONLY
20 .debug_frame 000043a8 00000000 00000000 000fb198 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
0800010c <__do_global_dtors_aux>:
800010c: b510 push {r4, lr}
800010e: 4c05 ldr r4, [pc, #20] ; (8000124 <__do_global_dtors_aux+0x18>)
8000110: 7823 ldrb r3, [r4, #0]
8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
8000114: 4b04 ldr r3, [pc, #16] ; (8000128 <__do_global_dtors_aux+0x1c>)
8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
8000118: 4804 ldr r0, [pc, #16] ; (800012c <__do_global_dtors_aux+0x20>)
800011a: f3af 8000 nop.w
800011e: 2301 movs r3, #1
8000120: 7023 strb r3, [r4, #0]
8000122: bd10 pop {r4, pc}
8000124: 200000dc .word 0x200000dc
8000128: 00000000 .word 0x00000000
800012c: 08007fb4 .word 0x08007fb4
08000130 <frame_dummy>:
8000130: b508 push {r3, lr}
8000132: 4b03 ldr r3, [pc, #12] ; (8000140 <frame_dummy+0x10>)
8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
8000136: 4903 ldr r1, [pc, #12] ; (8000144 <frame_dummy+0x14>)
8000138: 4803 ldr r0, [pc, #12] ; (8000148 <frame_dummy+0x18>)
800013a: f3af 8000 nop.w
800013e: bd08 pop {r3, pc}
8000140: 00000000 .word 0x00000000
8000144: 200000e0 .word 0x200000e0
8000148: 08007fb4 .word 0x08007fb4
0800014c <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
800014c: b580 push {r7, lr}
800014e: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8000150: f000 faaa bl 80006a8 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8000154: f000 f80b bl 800016e <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8000158: f000 f8fc bl 8000354 <MX_GPIO_Init>
MX_ADC1_Init();
800015c: f000 f864 bl 8000228 <MX_ADC1_Init>
MX_I2C1_Init();
8000160: f000 f8a0 bl 80002a4 <MX_I2C1_Init>
MX_USART1_UART_Init();
8000164: f000 f8cc bl 8000300 <MX_USART1_UART_Init>
MX_USB_DEVICE_Init();
8000168: f007 fb00 bl 800776c <MX_USB_DEVICE_Init>
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
800016c: e7fe b.n 800016c <main+0x20>
0800016e <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
800016e: b580 push {r7, lr}
8000170: b094 sub sp, #80 ; 0x50
8000172: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8000174: f107 0328 add.w r3, r7, #40 ; 0x28
8000178: 2228 movs r2, #40 ; 0x28
800017a: 2100 movs r1, #0
800017c: 4618 mov r0, r3
800017e: f007 ff11 bl 8007fa4 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
8000182: f107 0314 add.w r3, r7, #20
8000186: 2200 movs r2, #0
8000188: 601a str r2, [r3, #0]
800018a: 605a str r2, [r3, #4]
800018c: 609a str r2, [r3, #8]
800018e: 60da str r2, [r3, #12]
8000190: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
8000192: 1d3b adds r3, r7, #4
8000194: 2200 movs r2, #0
8000196: 601a str r2, [r3, #0]
8000198: 605a str r2, [r3, #4]
800019a: 609a str r2, [r3, #8]
800019c: 60da str r2, [r3, #12]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
800019e: 2301 movs r3, #1
80001a0: 62bb str r3, [r7, #40] ; 0x28
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
80001a2: f44f 3380 mov.w r3, #65536 ; 0x10000
80001a6: 62fb str r3, [r7, #44] ; 0x2c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
80001a8: 2300 movs r3, #0
80001aa: 633b str r3, [r7, #48] ; 0x30
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
80001ac: 2301 movs r3, #1
80001ae: 63bb str r3, [r7, #56] ; 0x38
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
80001b0: 2302 movs r3, #2
80001b2: 647b str r3, [r7, #68] ; 0x44
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
80001b4: f44f 3380 mov.w r3, #65536 ; 0x10000
80001b8: 64bb str r3, [r7, #72] ; 0x48
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
80001ba: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
80001be: 64fb str r3, [r7, #76] ; 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
80001c0: f107 0328 add.w r3, r7, #40 ; 0x28
80001c4: 4618 mov r0, r3
80001c6: f002 fd69 bl 8002c9c <HAL_RCC_OscConfig>
80001ca: 4603 mov r3, r0
80001cc: 2b00 cmp r3, #0
80001ce: d001 beq.n 80001d4 <SystemClock_Config+0x66>
{
Error_Handler();
80001d0: f000 f90e bl 80003f0 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
80001d4: 230f movs r3, #15
80001d6: 617b str r3, [r7, #20]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
80001d8: 2302 movs r3, #2
80001da: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
80001dc: 2300 movs r3, #0
80001de: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
80001e0: f44f 6380 mov.w r3, #1024 ; 0x400
80001e4: 623b str r3, [r7, #32]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
80001e6: 2300 movs r3, #0
80001e8: 627b str r3, [r7, #36] ; 0x24
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
80001ea: f107 0314 add.w r3, r7, #20
80001ee: 2102 movs r1, #2
80001f0: 4618 mov r0, r3
80001f2: f002 ffd3 bl 800319c <HAL_RCC_ClockConfig>
80001f6: 4603 mov r3, r0
80001f8: 2b00 cmp r3, #0
80001fa: d001 beq.n 8000200 <SystemClock_Config+0x92>
{
Error_Handler();
80001fc: f000 f8f8 bl 80003f0 <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
8000200: 2312 movs r3, #18
8000202: 607b str r3, [r7, #4]
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
8000204: f44f 4300 mov.w r3, #32768 ; 0x8000
8000208: 60fb str r3, [r7, #12]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
800020a: 2300 movs r3, #0
800020c: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
800020e: 1d3b adds r3, r7, #4
8000210: 4618 mov r0, r3
8000212: f003 f95d bl 80034d0 <HAL_RCCEx_PeriphCLKConfig>
8000216: 4603 mov r3, r0
8000218: 2b00 cmp r3, #0
800021a: d001 beq.n 8000220 <SystemClock_Config+0xb2>
{
Error_Handler();
800021c: f000 f8e8 bl 80003f0 <Error_Handler>
}
}
8000220: bf00 nop
8000222: 3750 adds r7, #80 ; 0x50
8000224: 46bd mov sp, r7
8000226: bd80 pop {r7, pc}
08000228 <MX_ADC1_Init>:
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void)
{
8000228: b580 push {r7, lr}
800022a: b084 sub sp, #16
800022c: af00 add r7, sp, #0
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
800022e: 1d3b adds r3, r7, #4
8000230: 2200 movs r2, #0
8000232: 601a str r2, [r3, #0]
8000234: 605a str r2, [r3, #4]
8000236: 609a str r2, [r3, #8]
/* USER CODE BEGIN ADC1_Init 1 */
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
8000238: 4b18 ldr r3, [pc, #96] ; (800029c <MX_ADC1_Init+0x74>)
800023a: 4a19 ldr r2, [pc, #100] ; (80002a0 <MX_ADC1_Init+0x78>)
800023c: 601a str r2, [r3, #0]
hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
800023e: 4b17 ldr r3, [pc, #92] ; (800029c <MX_ADC1_Init+0x74>)
8000240: 2200 movs r2, #0
8000242: 609a str r2, [r3, #8]
hadc1.Init.ContinuousConvMode = DISABLE;
8000244: 4b15 ldr r3, [pc, #84] ; (800029c <MX_ADC1_Init+0x74>)
8000246: 2200 movs r2, #0
8000248: 731a strb r2, [r3, #12]
hadc1.Init.DiscontinuousConvMode = DISABLE;
800024a: 4b14 ldr r3, [pc, #80] ; (800029c <MX_ADC1_Init+0x74>)
800024c: 2200 movs r2, #0
800024e: 751a strb r2, [r3, #20]
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
8000250: 4b12 ldr r3, [pc, #72] ; (800029c <MX_ADC1_Init+0x74>)
8000252: f44f 2260 mov.w r2, #917504 ; 0xe0000
8000256: 61da str r2, [r3, #28]
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
8000258: 4b10 ldr r3, [pc, #64] ; (800029c <MX_ADC1_Init+0x74>)
800025a: 2200 movs r2, #0
800025c: 605a str r2, [r3, #4]
hadc1.Init.NbrOfConversion = 1;
800025e: 4b0f ldr r3, [pc, #60] ; (800029c <MX_ADC1_Init+0x74>)
8000260: 2201 movs r2, #1
8000262: 611a str r2, [r3, #16]
if (HAL_ADC_Init(&hadc1) != HAL_OK)
8000264: 480d ldr r0, [pc, #52] ; (800029c <MX_ADC1_Init+0x74>)
8000266: f000 faa5 bl 80007b4 <HAL_ADC_Init>
800026a: 4603 mov r3, r0
800026c: 2b00 cmp r3, #0
800026e: d001 beq.n 8000274 <MX_ADC1_Init+0x4c>
{
Error_Handler();
8000270: f000 f8be bl 80003f0 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_0;
8000274: 2300 movs r3, #0
8000276: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_1;
8000278: 2301 movs r3, #1
800027a: 60bb str r3, [r7, #8]
sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
800027c: 2300 movs r3, #0
800027e: 60fb str r3, [r7, #12]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8000280: 1d3b adds r3, r7, #4
8000282: 4619 mov r1, r3
8000284: 4805 ldr r0, [pc, #20] ; (800029c <MX_ADC1_Init+0x74>)
8000286: f000 fb6d bl 8000964 <HAL_ADC_ConfigChannel>
800028a: 4603 mov r3, r0
800028c: 2b00 cmp r3, #0
800028e: d001 beq.n 8000294 <MX_ADC1_Init+0x6c>
{
Error_Handler();
8000290: f000 f8ae bl 80003f0 <Error_Handler>
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
8000294: bf00 nop
8000296: 3710 adds r7, #16
8000298: 46bd mov sp, r7
800029a: bd80 pop {r7, pc}
800029c: 2000066c .word 0x2000066c
80002a0: 40012400 .word 0x40012400
080002a4 <MX_I2C1_Init>:
* @brief I2C1 Initialization Function
* @param None
* @retval None
*/
static void MX_I2C1_Init(void)
{
80002a4: b580 push {r7, lr}
80002a6: af00 add r7, sp, #0
/* USER CODE END I2C1_Init 0 */
/* USER CODE BEGIN I2C1_Init 1 */
/* USER CODE END I2C1_Init 1 */
hi2c1.Instance = I2C1;
80002a8: 4b12 ldr r3, [pc, #72] ; (80002f4 <MX_I2C1_Init+0x50>)
80002aa: 4a13 ldr r2, [pc, #76] ; (80002f8 <MX_I2C1_Init+0x54>)
80002ac: 601a str r2, [r3, #0]
hi2c1.Init.ClockSpeed = 100000;
80002ae: 4b11 ldr r3, [pc, #68] ; (80002f4 <MX_I2C1_Init+0x50>)
80002b0: 4a12 ldr r2, [pc, #72] ; (80002fc <MX_I2C1_Init+0x58>)
80002b2: 605a str r2, [r3, #4]
hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
80002b4: 4b0f ldr r3, [pc, #60] ; (80002f4 <MX_I2C1_Init+0x50>)
80002b6: 2200 movs r2, #0
80002b8: 609a str r2, [r3, #8]
hi2c1.Init.OwnAddress1 = 0;
80002ba: 4b0e ldr r3, [pc, #56] ; (80002f4 <MX_I2C1_Init+0x50>)
80002bc: 2200 movs r2, #0
80002be: 60da str r2, [r3, #12]
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
80002c0: 4b0c ldr r3, [pc, #48] ; (80002f4 <MX_I2C1_Init+0x50>)
80002c2: f44f 4280 mov.w r2, #16384 ; 0x4000
80002c6: 611a str r2, [r3, #16]
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
80002c8: 4b0a ldr r3, [pc, #40] ; (80002f4 <MX_I2C1_Init+0x50>)
80002ca: 2200 movs r2, #0
80002cc: 615a str r2, [r3, #20]
hi2c1.Init.OwnAddress2 = 0;
80002ce: 4b09 ldr r3, [pc, #36] ; (80002f4 <MX_I2C1_Init+0x50>)
80002d0: 2200 movs r2, #0
80002d2: 619a str r2, [r3, #24]
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
80002d4: 4b07 ldr r3, [pc, #28] ; (80002f4 <MX_I2C1_Init+0x50>)
80002d6: 2200 movs r2, #0
80002d8: 61da str r2, [r3, #28]
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
80002da: 4b06 ldr r3, [pc, #24] ; (80002f4 <MX_I2C1_Init+0x50>)
80002dc: 2200 movs r2, #0
80002de: 621a str r2, [r3, #32]
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
80002e0: 4804 ldr r0, [pc, #16] ; (80002f4 <MX_I2C1_Init+0x50>)
80002e2: f000 ff0b bl 80010fc <HAL_I2C_Init>
80002e6: 4603 mov r3, r0
80002e8: 2b00 cmp r3, #0
80002ea: d001 beq.n 80002f0 <MX_I2C1_Init+0x4c>
{
Error_Handler();
80002ec: f000 f880 bl 80003f0 <Error_Handler>
}
/* USER CODE BEGIN I2C1_Init 2 */
/* USER CODE END I2C1_Init 2 */
}
80002f0: bf00 nop
80002f2: bd80 pop {r7, pc}
80002f4: 20000618 .word 0x20000618
80002f8: 40005400 .word 0x40005400
80002fc: 000186a0 .word 0x000186a0
08000300 <MX_USART1_UART_Init>:
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
8000300: b580 push {r7, lr}
8000302: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
8000304: 4b11 ldr r3, [pc, #68] ; (800034c <MX_USART1_UART_Init+0x4c>)
8000306: 4a12 ldr r2, [pc, #72] ; (8000350 <MX_USART1_UART_Init+0x50>)
8000308: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 115200;
800030a: 4b10 ldr r3, [pc, #64] ; (800034c <MX_USART1_UART_Init+0x4c>)
800030c: f44f 32e1 mov.w r2, #115200 ; 0x1c200
8000310: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
8000312: 4b0e ldr r3, [pc, #56] ; (800034c <MX_USART1_UART_Init+0x4c>)
8000314: 2200 movs r2, #0
8000316: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
8000318: 4b0c ldr r3, [pc, #48] ; (800034c <MX_USART1_UART_Init+0x4c>)
800031a: 2200 movs r2, #0
800031c: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
800031e: 4b0b ldr r3, [pc, #44] ; (800034c <MX_USART1_UART_Init+0x4c>)
8000320: 2200 movs r2, #0
8000322: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
8000324: 4b09 ldr r3, [pc, #36] ; (800034c <MX_USART1_UART_Init+0x4c>)
8000326: 220c movs r2, #12
8000328: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
800032a: 4b08 ldr r3, [pc, #32] ; (800034c <MX_USART1_UART_Init+0x4c>)
800032c: 2200 movs r2, #0
800032e: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
8000330: 4b06 ldr r3, [pc, #24] ; (800034c <MX_USART1_UART_Init+0x4c>)
8000332: 2200 movs r2, #0
8000334: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart1) != HAL_OK)
8000336: 4805 ldr r0, [pc, #20] ; (800034c <MX_USART1_UART_Init+0x4c>)
8000338: f003 f980 bl 800363c <HAL_UART_Init>
800033c: 4603 mov r3, r0
800033e: 2b00 cmp r3, #0
8000340: d001 beq.n 8000346 <MX_USART1_UART_Init+0x46>
{
Error_Handler();
8000342: f000 f855 bl 80003f0 <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
8000346: bf00 nop
8000348: bd80 pop {r7, pc}
800034a: bf00 nop
800034c: 2000069c .word 0x2000069c
8000350: 40013800 .word 0x40013800
08000354 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
8000354: b580 push {r7, lr}
8000356: b088 sub sp, #32
8000358: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
800035a: f107 0310 add.w r3, r7, #16
800035e: 2200 movs r2, #0
8000360: 601a str r2, [r3, #0]
8000362: 605a str r2, [r3, #4]
8000364: 609a str r2, [r3, #8]
8000366: 60da str r2, [r3, #12]
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
8000368: 4b1f ldr r3, [pc, #124] ; (80003e8 <MX_GPIO_Init+0x94>)
800036a: 699b ldr r3, [r3, #24]
800036c: 4a1e ldr r2, [pc, #120] ; (80003e8 <MX_GPIO_Init+0x94>)
800036e: f043 0310 orr.w r3, r3, #16
8000372: 6193 str r3, [r2, #24]
8000374: 4b1c ldr r3, [pc, #112] ; (80003e8 <MX_GPIO_Init+0x94>)
8000376: 699b ldr r3, [r3, #24]
8000378: f003 0310 and.w r3, r3, #16
800037c: 60fb str r3, [r7, #12]
800037e: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOD_CLK_ENABLE();
8000380: 4b19 ldr r3, [pc, #100] ; (80003e8 <MX_GPIO_Init+0x94>)
8000382: 699b ldr r3, [r3, #24]
8000384: 4a18 ldr r2, [pc, #96] ; (80003e8 <MX_GPIO_Init+0x94>)
8000386: f043 0320 orr.w r3, r3, #32
800038a: 6193 str r3, [r2, #24]
800038c: 4b16 ldr r3, [pc, #88] ; (80003e8 <MX_GPIO_Init+0x94>)
800038e: 699b ldr r3, [r3, #24]
8000390: f003 0320 and.w r3, r3, #32
8000394: 60bb str r3, [r7, #8]
8000396: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
8000398: 4b13 ldr r3, [pc, #76] ; (80003e8 <MX_GPIO_Init+0x94>)
800039a: 699b ldr r3, [r3, #24]
800039c: 4a12 ldr r2, [pc, #72] ; (80003e8 <MX_GPIO_Init+0x94>)
800039e: f043 0304 orr.w r3, r3, #4
80003a2: 6193 str r3, [r2, #24]
80003a4: 4b10 ldr r3, [pc, #64] ; (80003e8 <MX_GPIO_Init+0x94>)
80003a6: 699b ldr r3, [r3, #24]
80003a8: f003 0304 and.w r3, r3, #4
80003ac: 607b str r3, [r7, #4]
80003ae: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
80003b0: 4b0d ldr r3, [pc, #52] ; (80003e8 <MX_GPIO_Init+0x94>)
80003b2: 699b ldr r3, [r3, #24]
80003b4: 4a0c ldr r2, [pc, #48] ; (80003e8 <MX_GPIO_Init+0x94>)
80003b6: f043 0308 orr.w r3, r3, #8
80003ba: 6193 str r3, [r2, #24]
80003bc: 4b0a ldr r3, [pc, #40] ; (80003e8 <MX_GPIO_Init+0x94>)
80003be: 699b ldr r3, [r3, #24]
80003c0: f003 0308 and.w r3, r3, #8
80003c4: 603b str r3, [r7, #0]
80003c6: 683b ldr r3, [r7, #0]
/*Configure GPIO pin : PA1 */
GPIO_InitStruct.Pin = GPIO_PIN_1;
80003c8: 2302 movs r3, #2
80003ca: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
80003cc: 2300 movs r3, #0
80003ce: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80003d0: 2300 movs r3, #0
80003d2: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80003d4: f107 0310 add.w r3, r7, #16
80003d8: 4619 mov r1, r3
80003da: 4804 ldr r0, [pc, #16] ; (80003ec <MX_GPIO_Init+0x98>)
80003dc: f000 fd0a bl 8000df4 <HAL_GPIO_Init>
}
80003e0: bf00 nop
80003e2: 3720 adds r7, #32
80003e4: 46bd mov sp, r7
80003e6: bd80 pop {r7, pc}
80003e8: 40021000 .word 0x40021000
80003ec: 40010800 .word 0x40010800
080003f0 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
80003f0: b480 push {r7}
80003f2: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
80003f4: b672 cpsid i
}
80003f6: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
80003f8: e7fe b.n 80003f8 <Error_Handler+0x8>
...
080003fc <HAL_MspInit>:
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
80003fc: b480 push {r7}
80003fe: b085 sub sp, #20
8000400: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
8000402: 4b15 ldr r3, [pc, #84] ; (8000458 <HAL_MspInit+0x5c>)
8000404: 699b ldr r3, [r3, #24]
8000406: 4a14 ldr r2, [pc, #80] ; (8000458 <HAL_MspInit+0x5c>)
8000408: f043 0301 orr.w r3, r3, #1
800040c: 6193 str r3, [r2, #24]
800040e: 4b12 ldr r3, [pc, #72] ; (8000458 <HAL_MspInit+0x5c>)
8000410: 699b ldr r3, [r3, #24]
8000412: f003 0301 and.w r3, r3, #1
8000416: 60bb str r3, [r7, #8]
8000418: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
800041a: 4b0f ldr r3, [pc, #60] ; (8000458 <HAL_MspInit+0x5c>)
800041c: 69db ldr r3, [r3, #28]
800041e: 4a0e ldr r2, [pc, #56] ; (8000458 <HAL_MspInit+0x5c>)
8000420: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8000424: 61d3 str r3, [r2, #28]
8000426: 4b0c ldr r3, [pc, #48] ; (8000458 <HAL_MspInit+0x5c>)
8000428: 69db ldr r3, [r3, #28]
800042a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
800042e: 607b str r3, [r7, #4]
8000430: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG();
8000432: 4b0a ldr r3, [pc, #40] ; (800045c <HAL_MspInit+0x60>)
8000434: 685b ldr r3, [r3, #4]
8000436: 60fb str r3, [r7, #12]
8000438: 68fb ldr r3, [r7, #12]
800043a: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
800043e: 60fb str r3, [r7, #12]
8000440: 68fb ldr r3, [r7, #12]
8000442: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000
8000446: 60fb str r3, [r7, #12]
8000448: 4a04 ldr r2, [pc, #16] ; (800045c <HAL_MspInit+0x60>)
800044a: 68fb ldr r3, [r7, #12]
800044c: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
800044e: bf00 nop
8000450: 3714 adds r7, #20
8000452: 46bd mov sp, r7
8000454: bc80 pop {r7}
8000456: 4770 bx lr
8000458: 40021000 .word 0x40021000
800045c: 40010000 .word 0x40010000
08000460 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
8000460: b580 push {r7, lr}
8000462: b088 sub sp, #32
8000464: af00 add r7, sp, #0
8000466: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000468: f107 0310 add.w r3, r7, #16
800046c: 2200 movs r2, #0
800046e: 601a str r2, [r3, #0]
8000470: 605a str r2, [r3, #4]
8000472: 609a str r2, [r3, #8]
8000474: 60da str r2, [r3, #12]
if(hadc->Instance==ADC1)
8000476: 687b ldr r3, [r7, #4]
8000478: 681b ldr r3, [r3, #0]
800047a: 4a14 ldr r2, [pc, #80] ; (80004cc <HAL_ADC_MspInit+0x6c>)
800047c: 4293 cmp r3, r2
800047e: d121 bne.n 80004c4 <HAL_ADC_MspInit+0x64>
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
8000480: 4b13 ldr r3, [pc, #76] ; (80004d0 <HAL_ADC_MspInit+0x70>)
8000482: 699b ldr r3, [r3, #24]
8000484: 4a12 ldr r2, [pc, #72] ; (80004d0 <HAL_ADC_MspInit+0x70>)
8000486: f443 7300 orr.w r3, r3, #512 ; 0x200
800048a: 6193 str r3, [r2, #24]
800048c: 4b10 ldr r3, [pc, #64] ; (80004d0 <HAL_ADC_MspInit+0x70>)
800048e: 699b ldr r3, [r3, #24]
8000490: f403 7300 and.w r3, r3, #512 ; 0x200
8000494: 60fb str r3, [r7, #12]
8000496: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
8000498: 4b0d ldr r3, [pc, #52] ; (80004d0 <HAL_ADC_MspInit+0x70>)
800049a: 699b ldr r3, [r3, #24]
800049c: 4a0c ldr r2, [pc, #48] ; (80004d0 <HAL_ADC_MspInit+0x70>)
800049e: f043 0304 orr.w r3, r3, #4
80004a2: 6193 str r3, [r2, #24]
80004a4: 4b0a ldr r3, [pc, #40] ; (80004d0 <HAL_ADC_MspInit+0x70>)
80004a6: 699b ldr r3, [r3, #24]
80004a8: f003 0304 and.w r3, r3, #4
80004ac: 60bb str r3, [r7, #8]
80004ae: 68bb ldr r3, [r7, #8]
/**ADC1 GPIO Configuration
PA0-WKUP ------> ADC1_IN0
*/
GPIO_InitStruct.Pin = GPIO_PIN_0;
80004b0: 2301 movs r3, #1
80004b2: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
80004b4: 2303 movs r3, #3
80004b6: 617b str r3, [r7, #20]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80004b8: f107 0310 add.w r3, r7, #16
80004bc: 4619 mov r1, r3
80004be: 4805 ldr r0, [pc, #20] ; (80004d4 <HAL_ADC_MspInit+0x74>)
80004c0: f000 fc98 bl 8000df4 <HAL_GPIO_Init>
/* USER CODE BEGIN ADC1_MspInit 1 */
/* USER CODE END ADC1_MspInit 1 */
}
}
80004c4: bf00 nop
80004c6: 3720 adds r7, #32
80004c8: 46bd mov sp, r7
80004ca: bd80 pop {r7, pc}
80004cc: 40012400 .word 0x40012400
80004d0: 40021000 .word 0x40021000
80004d4: 40010800 .word 0x40010800
080004d8 <HAL_I2C_MspInit>:
* This function configures the hardware resources used in this example
* @param hi2c: I2C handle pointer
* @retval None
*/
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
{
80004d8: b580 push {r7, lr}
80004da: b088 sub sp, #32
80004dc: af00 add r7, sp, #0
80004de: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
80004e0: f107 0310 add.w r3, r7, #16
80004e4: 2200 movs r2, #0
80004e6: 601a str r2, [r3, #0]
80004e8: 605a str r2, [r3, #4]
80004ea: 609a str r2, [r3, #8]
80004ec: 60da str r2, [r3, #12]
if(hi2c->Instance==I2C1)
80004ee: 687b ldr r3, [r7, #4]
80004f0: 681b ldr r3, [r3, #0]
80004f2: 4a15 ldr r2, [pc, #84] ; (8000548 <HAL_I2C_MspInit+0x70>)
80004f4: 4293 cmp r3, r2
80004f6: d123 bne.n 8000540 <HAL_I2C_MspInit+0x68>
{
/* USER CODE BEGIN I2C1_MspInit 0 */
/* USER CODE END I2C1_MspInit 0 */
__HAL_RCC_GPIOB_CLK_ENABLE();
80004f8: 4b14 ldr r3, [pc, #80] ; (800054c <HAL_I2C_MspInit+0x74>)
80004fa: 699b ldr r3, [r3, #24]
80004fc: 4a13 ldr r2, [pc, #76] ; (800054c <HAL_I2C_MspInit+0x74>)
80004fe: f043 0308 orr.w r3, r3, #8
8000502: 6193 str r3, [r2, #24]
8000504: 4b11 ldr r3, [pc, #68] ; (800054c <HAL_I2C_MspInit+0x74>)
8000506: 699b ldr r3, [r3, #24]
8000508: f003 0308 and.w r3, r3, #8
800050c: 60fb str r3, [r7, #12]
800050e: 68fb ldr r3, [r7, #12]
/**I2C1 GPIO Configuration
PB6 ------> I2C1_SCL
PB7 ------> I2C1_SDA
*/
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
8000510: 23c0 movs r3, #192 ; 0xc0
8000512: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
8000514: 2312 movs r3, #18
8000516: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8000518: 2303 movs r3, #3
800051a: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
800051c: f107 0310 add.w r3, r7, #16
8000520: 4619 mov r1, r3
8000522: 480b ldr r0, [pc, #44] ; (8000550 <HAL_I2C_MspInit+0x78>)
8000524: f000 fc66 bl 8000df4 <HAL_GPIO_Init>
/* Peripheral clock enable */
__HAL_RCC_I2C1_CLK_ENABLE();
8000528: 4b08 ldr r3, [pc, #32] ; (800054c <HAL_I2C_MspInit+0x74>)
800052a: 69db ldr r3, [r3, #28]
800052c: 4a07 ldr r2, [pc, #28] ; (800054c <HAL_I2C_MspInit+0x74>)
800052e: f443 1300 orr.w r3, r3, #2097152 ; 0x200000
8000532: 61d3 str r3, [r2, #28]
8000534: 4b05 ldr r3, [pc, #20] ; (800054c <HAL_I2C_MspInit+0x74>)
8000536: 69db ldr r3, [r3, #28]
8000538: f403 1300 and.w r3, r3, #2097152 ; 0x200000
800053c: 60bb str r3, [r7, #8]
800053e: 68bb ldr r3, [r7, #8]
/* USER CODE BEGIN I2C1_MspInit 1 */
/* USER CODE END I2C1_MspInit 1 */
}
}
8000540: bf00 nop
8000542: 3720 adds r7, #32
8000544: 46bd mov sp, r7
8000546: bd80 pop {r7, pc}
8000548: 40005400 .word 0x40005400
800054c: 40021000 .word 0x40021000
8000550: 40010c00 .word 0x40010c00
08000554 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
8000554: b580 push {r7, lr}
8000556: b088 sub sp, #32
8000558: af00 add r7, sp, #0
800055a: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
800055c: f107 0310 add.w r3, r7, #16
8000560: 2200 movs r2, #0
8000562: 601a str r2, [r3, #0]
8000564: 605a str r2, [r3, #4]
8000566: 609a str r2, [r3, #8]
8000568: 60da str r2, [r3, #12]
if(huart->Instance==USART1)
800056a: 687b ldr r3, [r7, #4]
800056c: 681b ldr r3, [r3, #0]
800056e: 4a1c ldr r2, [pc, #112] ; (80005e0 <HAL_UART_MspInit+0x8c>)
8000570: 4293 cmp r3, r2
8000572: d131 bne.n 80005d8 <HAL_UART_MspInit+0x84>
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
8000574: 4b1b ldr r3, [pc, #108] ; (80005e4 <HAL_UART_MspInit+0x90>)
8000576: 699b ldr r3, [r3, #24]
8000578: 4a1a ldr r2, [pc, #104] ; (80005e4 <HAL_UART_MspInit+0x90>)
800057a: f443 4380 orr.w r3, r3, #16384 ; 0x4000
800057e: 6193 str r3, [r2, #24]
8000580: 4b18 ldr r3, [pc, #96] ; (80005e4 <HAL_UART_MspInit+0x90>)
8000582: 699b ldr r3, [r3, #24]
8000584: f403 4380 and.w r3, r3, #16384 ; 0x4000
8000588: 60fb str r3, [r7, #12]
800058a: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
800058c: 4b15 ldr r3, [pc, #84] ; (80005e4 <HAL_UART_MspInit+0x90>)
800058e: 699b ldr r3, [r3, #24]
8000590: 4a14 ldr r2, [pc, #80] ; (80005e4 <HAL_UART_MspInit+0x90>)
8000592: f043 0304 orr.w r3, r3, #4
8000596: 6193 str r3, [r2, #24]
8000598: 4b12 ldr r3, [pc, #72] ; (80005e4 <HAL_UART_MspInit+0x90>)
800059a: 699b ldr r3, [r3, #24]
800059c: f003 0304 and.w r3, r3, #4
80005a0: 60bb str r3, [r7, #8]
80005a2: 68bb ldr r3, [r7, #8]
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
80005a4: f44f 7300 mov.w r3, #512 ; 0x200
80005a8: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80005aa: 2302 movs r3, #2
80005ac: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
80005ae: 2303 movs r3, #3
80005b0: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80005b2: f107 0310 add.w r3, r7, #16
80005b6: 4619 mov r1, r3
80005b8: 480b ldr r0, [pc, #44] ; (80005e8 <HAL_UART_MspInit+0x94>)
80005ba: f000 fc1b bl 8000df4 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_10;
80005be: f44f 6380 mov.w r3, #1024 ; 0x400
80005c2: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
80005c4: 2300 movs r3, #0
80005c6: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80005c8: 2300 movs r3, #0
80005ca: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80005cc: f107 0310 add.w r3, r7, #16
80005d0: 4619 mov r1, r3
80005d2: 4805 ldr r0, [pc, #20] ; (80005e8 <HAL_UART_MspInit+0x94>)
80005d4: f000 fc0e bl 8000df4 <HAL_GPIO_Init>
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
}
}
80005d8: bf00 nop
80005da: 3720 adds r7, #32
80005dc: 46bd mov sp, r7
80005de: bd80 pop {r7, pc}
80005e0: 40013800 .word 0x40013800
80005e4: 40021000 .word 0x40021000
80005e8: 40010800 .word 0x40010800
080005ec <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
80005ec: b480 push {r7}
80005ee: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
80005f0: e7fe b.n 80005f0 <NMI_Handler+0x4>
080005f2 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
80005f2: b480 push {r7}
80005f4: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
80005f6: e7fe b.n 80005f6 <HardFault_Handler+0x4>
080005f8 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
80005f8: b480 push {r7}
80005fa: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
80005fc: e7fe b.n 80005fc <MemManage_Handler+0x4>
080005fe <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
80005fe: b480 push {r7}
8000600: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8000602: e7fe b.n 8000602 <BusFault_Handler+0x4>
08000604 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8000604: b480 push {r7}
8000606: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
8000608: e7fe b.n 8000608 <UsageFault_Handler+0x4>
0800060a <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
800060a: b480 push {r7}
800060c: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
800060e: bf00 nop
8000610: 46bd mov sp, r7
8000612: bc80 pop {r7}
8000614: 4770 bx lr
08000616 <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
8000616: b480 push {r7}
8000618: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
800061a: bf00 nop
800061c: 46bd mov sp, r7
800061e: bc80 pop {r7}
8000620: 4770 bx lr
08000622 <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8000622: b480 push {r7}
8000624: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8000626: bf00 nop
8000628: 46bd mov sp, r7
800062a: bc80 pop {r7}
800062c: 4770 bx lr
0800062e <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
800062e: b580 push {r7, lr}
8000630: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8000632: f000 f87f bl 8000734 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
8000636: bf00 nop
8000638: bd80 pop {r7, pc}
...
0800063c <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
800063c: b580 push {r7, lr}
800063e: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
8000640: 4802 ldr r0, [pc, #8] ; (800064c <USB_LP_CAN1_RX0_IRQHandler+0x10>)
8000642: f000 fff6 bl 8001632 <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
8000646: bf00 nop
8000648: bd80 pop {r7, pc}
800064a: bf00 nop
800064c: 20000ba8 .word 0x20000ba8
08000650 <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
8000650: b480 push {r7}
8000652: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
8000654: bf00 nop
8000656: 46bd mov sp, r7
8000658: bc80 pop {r7}
800065a: 4770 bx lr
0800065c <Reset_Handler>:
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
800065c: 480c ldr r0, [pc, #48] ; (8000690 <LoopFillZerobss+0x12>)
ldr r1, =_edata
800065e: 490d ldr r1, [pc, #52] ; (8000694 <LoopFillZerobss+0x16>)
ldr r2, =_sidata
8000660: 4a0d ldr r2, [pc, #52] ; (8000698 <LoopFillZerobss+0x1a>)
movs r3, #0
8000662: 2300 movs r3, #0
b LoopCopyDataInit
8000664: e002 b.n 800066c <LoopCopyDataInit>
08000666 <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
8000666: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
8000668: 50c4 str r4, [r0, r3]
adds r3, r3, #4
800066a: 3304 adds r3, #4
0800066c <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
800066c: 18c4 adds r4, r0, r3
cmp r4, r1
800066e: 428c cmp r4, r1
bcc CopyDataInit
8000670: d3f9 bcc.n 8000666 <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
8000672: 4a0a ldr r2, [pc, #40] ; (800069c <LoopFillZerobss+0x1e>)
ldr r4, =_ebss
8000674: 4c0a ldr r4, [pc, #40] ; (80006a0 <LoopFillZerobss+0x22>)
movs r3, #0
8000676: 2300 movs r3, #0
b LoopFillZerobss
8000678: e001 b.n 800067e <LoopFillZerobss>
0800067a <FillZerobss>:
FillZerobss:
str r3, [r2]
800067a: 6013 str r3, [r2, #0]
adds r2, r2, #4
800067c: 3204 adds r2, #4
0800067e <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
800067e: 42a2 cmp r2, r4
bcc FillZerobss
8000680: d3fb bcc.n 800067a <FillZerobss>
/* Call the clock system intitialization function.*/
bl SystemInit
8000682: f7ff ffe5 bl 8000650 <SystemInit>
/* Call static constructors */
bl __libc_init_array
8000686: f007 fc69 bl 8007f5c <__libc_init_array>
/* Call the application's entry point.*/
bl main
800068a: f7ff fd5f bl 800014c <main>
bx lr
800068e: 4770 bx lr
ldr r0, =_sdata
8000690: 20000000 .word 0x20000000
ldr r1, =_edata
8000694: 200000dc .word 0x200000dc
ldr r2, =_sidata
8000698: 080080ac .word 0x080080ac
ldr r2, =_sbss
800069c: 200000dc .word 0x200000dc
ldr r4, =_ebss
80006a0: 20000e94 .word 0x20000e94
080006a4 <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
80006a4: e7fe b.n 80006a4 <ADC1_2_IRQHandler>
...
080006a8 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
80006a8: b580 push {r7, lr}
80006aa: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
80006ac: 4b08 ldr r3, [pc, #32] ; (80006d0 <HAL_Init+0x28>)
80006ae: 681b ldr r3, [r3, #0]
80006b0: 4a07 ldr r2, [pc, #28] ; (80006d0 <HAL_Init+0x28>)
80006b2: f043 0310 orr.w r3, r3, #16
80006b6: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
80006b8: 2003 movs r0, #3
80006ba: f000 fb59 bl 8000d70 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
80006be: 200f movs r0, #15
80006c0: f000 f808 bl 80006d4 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
80006c4: f7ff fe9a bl 80003fc <HAL_MspInit>
/* Return function status */
return HAL_OK;
80006c8: 2300 movs r3, #0
}
80006ca: 4618 mov r0, r3
80006cc: bd80 pop {r7, pc}
80006ce: bf00 nop
80006d0: 40022000 .word 0x40022000
080006d4 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
80006d4: b580 push {r7, lr}
80006d6: b082 sub sp, #8
80006d8: af00 add r7, sp, #0
80006da: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
80006dc: 4b12 ldr r3, [pc, #72] ; (8000728 <HAL_InitTick+0x54>)
80006de: 681a ldr r2, [r3, #0]
80006e0: 4b12 ldr r3, [pc, #72] ; (800072c <HAL_InitTick+0x58>)
80006e2: 781b ldrb r3, [r3, #0]
80006e4: 4619 mov r1, r3
80006e6: f44f 737a mov.w r3, #1000 ; 0x3e8
80006ea: fbb3 f3f1 udiv r3, r3, r1
80006ee: fbb2 f3f3 udiv r3, r2, r3
80006f2: 4618 mov r0, r3
80006f4: f000 fb71 bl 8000dda <HAL_SYSTICK_Config>
80006f8: 4603 mov r3, r0
80006fa: 2b00 cmp r3, #0
80006fc: d001 beq.n 8000702 <HAL_InitTick+0x2e>
{
return HAL_ERROR;
80006fe: 2301 movs r3, #1
8000700: e00e b.n 8000720 <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8000702: 687b ldr r3, [r7, #4]
8000704: 2b0f cmp r3, #15
8000706: d80a bhi.n 800071e <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8000708: 2200 movs r2, #0
800070a: 6879 ldr r1, [r7, #4]
800070c: f04f 30ff mov.w r0, #4294967295
8000710: f000 fb39 bl 8000d86 <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8000714: 4a06 ldr r2, [pc, #24] ; (8000730 <HAL_InitTick+0x5c>)
8000716: 687b ldr r3, [r7, #4]
8000718: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
800071a: 2300 movs r3, #0
800071c: e000 b.n 8000720 <HAL_InitTick+0x4c>
return HAL_ERROR;
800071e: 2301 movs r3, #1
}
8000720: 4618 mov r0, r3
8000722: 3708 adds r7, #8
8000724: 46bd mov sp, r7
8000726: bd80 pop {r7, pc}
8000728: 20000000 .word 0x20000000
800072c: 20000008 .word 0x20000008
8000730: 20000004 .word 0x20000004
08000734 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8000734: b480 push {r7}
8000736: af00 add r7, sp, #0
uwTick += uwTickFreq;
8000738: 4b05 ldr r3, [pc, #20] ; (8000750 <HAL_IncTick+0x1c>)
800073a: 781b ldrb r3, [r3, #0]
800073c: 461a mov r2, r3
800073e: 4b05 ldr r3, [pc, #20] ; (8000754 <HAL_IncTick+0x20>)
8000740: 681b ldr r3, [r3, #0]
8000742: 4413 add r3, r2
8000744: 4a03 ldr r2, [pc, #12] ; (8000754 <HAL_IncTick+0x20>)
8000746: 6013 str r3, [r2, #0]
}
8000748: bf00 nop
800074a: 46bd mov sp, r7
800074c: bc80 pop {r7}
800074e: 4770 bx lr
8000750: 20000008 .word 0x20000008
8000754: 200006e0 .word 0x200006e0
08000758 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8000758: b480 push {r7}
800075a: af00 add r7, sp, #0
return uwTick;
800075c: 4b02 ldr r3, [pc, #8] ; (8000768 <HAL_GetTick+0x10>)
800075e: 681b ldr r3, [r3, #0]
}
8000760: 4618 mov r0, r3
8000762: 46bd mov sp, r7
8000764: bc80 pop {r7}
8000766: 4770 bx lr
8000768: 200006e0 .word 0x200006e0
0800076c <HAL_Delay>:
* implementations in user file.
* @param Delay specifies the delay time length, in milliseconds.
* @retval None
*/
__weak void HAL_Delay(uint32_t Delay)
{
800076c: b580 push {r7, lr}
800076e: b084 sub sp, #16
8000770: af00 add r7, sp, #0
8000772: 6078 str r0, [r7, #4]
uint32_t tickstart = HAL_GetTick();
8000774: f7ff fff0 bl 8000758 <HAL_GetTick>
8000778: 60b8 str r0, [r7, #8]
uint32_t wait = Delay;
800077a: 687b ldr r3, [r7, #4]
800077c: 60fb str r3, [r7, #12]
/* Add a freq to guarantee minimum wait */
if (wait < HAL_MAX_DELAY)
800077e: 68fb ldr r3, [r7, #12]
8000780: f1b3 3fff cmp.w r3, #4294967295
8000784: d005 beq.n 8000792 <HAL_Delay+0x26>
{
wait += (uint32_t)(uwTickFreq);
8000786: 4b0a ldr r3, [pc, #40] ; (80007b0 <HAL_Delay+0x44>)
8000788: 781b ldrb r3, [r3, #0]
800078a: 461a mov r2, r3
800078c: 68fb ldr r3, [r7, #12]
800078e: 4413 add r3, r2
8000790: 60fb str r3, [r7, #12]
}
while ((HAL_GetTick() - tickstart) < wait)
8000792: bf00 nop
8000794: f7ff ffe0 bl 8000758 <HAL_GetTick>
8000798: 4602 mov r2, r0
800079a: 68bb ldr r3, [r7, #8]
800079c: 1ad3 subs r3, r2, r3
800079e: 68fa ldr r2, [r7, #12]
80007a0: 429a cmp r2, r3
80007a2: d8f7 bhi.n 8000794 <HAL_Delay+0x28>
{
}
}
80007a4: bf00 nop
80007a6: bf00 nop
80007a8: 3710 adds r7, #16
80007aa: 46bd mov sp, r7
80007ac: bd80 pop {r7, pc}
80007ae: bf00 nop
80007b0: 20000008 .word 0x20000008
080007b4 <HAL_ADC_Init>:
* of structure "ADC_InitTypeDef".
* @param hadc: ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
80007b4: b580 push {r7, lr}
80007b6: b086 sub sp, #24
80007b8: af00 add r7, sp, #0
80007ba: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
80007bc: 2300 movs r3, #0
80007be: 75fb strb r3, [r7, #23]
uint32_t tmp_cr1 = 0U;
80007c0: 2300 movs r3, #0
80007c2: 613b str r3, [r7, #16]
uint32_t tmp_cr2 = 0U;
80007c4: 2300 movs r3, #0
80007c6: 60bb str r3, [r7, #8]
uint32_t tmp_sqr1 = 0U;
80007c8: 2300 movs r3, #0
80007ca: 60fb str r3, [r7, #12]
/* Check ADC handle */
if(hadc == NULL)
80007cc: 687b ldr r3, [r7, #4]
80007ce: 2b00 cmp r3, #0
80007d0: d101 bne.n 80007d6 <HAL_ADC_Init+0x22>
{
return HAL_ERROR;
80007d2: 2301 movs r3, #1
80007d4: e0be b.n 8000954 <HAL_ADC_Init+0x1a0>
assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
80007d6: 687b ldr r3, [r7, #4]
80007d8: 689b ldr r3, [r3, #8]
80007da: 2b00 cmp r3, #0
/* Refer to header of this file for more details on clock enabling */
/* procedure. */
/* Actions performed only if ADC is coming from state reset: */
/* - Initialization of ADC MSP */
if (hadc->State == HAL_ADC_STATE_RESET)
80007dc: 687b ldr r3, [r7, #4]
80007de: 6a9b ldr r3, [r3, #40] ; 0x28
80007e0: 2b00 cmp r3, #0
80007e2: d109 bne.n 80007f8 <HAL_ADC_Init+0x44>
{
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
80007e4: 687b ldr r3, [r7, #4]
80007e6: 2200 movs r2, #0
80007e8: 62da str r2, [r3, #44] ; 0x2c
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
80007ea: 687b ldr r3, [r7, #4]
80007ec: 2200 movs r2, #0
80007ee: f883 2024 strb.w r2, [r3, #36] ; 0x24
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
80007f2: 6878 ldr r0, [r7, #4]
80007f4: f7ff fe34 bl 8000460 <HAL_ADC_MspInit>
/* Stop potential conversion on going, on regular and injected groups */
/* Disable ADC peripheral */
/* Note: In case of ADC already enabled, precaution to not launch an */
/* unwanted conversion while modifying register CR2 by writing 1 to */
/* bit ADON. */
tmp_hal_status = ADC_ConversionStop_Disable(hadc);
80007f8: 6878 ldr r0, [r7, #4]
80007fa: f000 f9ab bl 8000b54 <ADC_ConversionStop_Disable>
80007fe: 4603 mov r3, r0
8000800: 75fb strb r3, [r7, #23]
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
8000802: 687b ldr r3, [r7, #4]
8000804: 6a9b ldr r3, [r3, #40] ; 0x28
8000806: f003 0310 and.w r3, r3, #16
800080a: 2b00 cmp r3, #0
800080c: f040 8099 bne.w 8000942 <HAL_ADC_Init+0x18e>
8000810: 7dfb ldrb r3, [r7, #23]
8000812: 2b00 cmp r3, #0
8000814: f040 8095 bne.w 8000942 <HAL_ADC_Init+0x18e>
(tmp_hal_status == HAL_OK) )
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
8000818: 687b ldr r3, [r7, #4]
800081a: 6a9b ldr r3, [r3, #40] ; 0x28
800081c: f423 5388 bic.w r3, r3, #4352 ; 0x1100
8000820: f023 0302 bic.w r3, r3, #2
8000824: f043 0202 orr.w r2, r3, #2
8000828: 687b ldr r3, [r7, #4]
800082a: 629a str r2, [r3, #40] ; 0x28
/* - continuous conversion mode */
/* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */
/* HAL_ADC_Start_xxx functions because if set in this function, */
/* a conversion on injected group would start a conversion also on */
/* regular group after ADC enabling. */
tmp_cr2 |= (hadc->Init.DataAlign |
800082c: 687b ldr r3, [r7, #4]
800082e: 685a ldr r2, [r3, #4]
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8000830: 687b ldr r3, [r7, #4]
8000832: 69db ldr r3, [r3, #28]
tmp_cr2 |= (hadc->Init.DataAlign |
8000834: 431a orrs r2, r3
ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) );
8000836: 687b ldr r3, [r7, #4]
8000838: 7b1b ldrb r3, [r3, #12]
800083a: 005b lsls r3, r3, #1
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
800083c: 4313 orrs r3, r2
tmp_cr2 |= (hadc->Init.DataAlign |
800083e: 68ba ldr r2, [r7, #8]
8000840: 4313 orrs r3, r2
8000842: 60bb str r3, [r7, #8]
/* Configuration of ADC: */
/* - scan mode */
/* - discontinuous mode disable/enable */
/* - discontinuous mode number of conversions */
tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
8000844: 687b ldr r3, [r7, #4]
8000846: 689b ldr r3, [r3, #8]
8000848: f5b3 7f80 cmp.w r3, #256 ; 0x100
800084c: d003 beq.n 8000856 <HAL_ADC_Init+0xa2>
800084e: 687b ldr r3, [r7, #4]
8000850: 689b ldr r3, [r3, #8]
8000852: 2b01 cmp r3, #1
8000854: d102 bne.n 800085c <HAL_ADC_Init+0xa8>
8000856: f44f 7380 mov.w r3, #256 ; 0x100
800085a: e000 b.n 800085e <HAL_ADC_Init+0xaa>
800085c: 2300 movs r3, #0
800085e: 693a ldr r2, [r7, #16]
8000860: 4313 orrs r3, r2
8000862: 613b str r3, [r7, #16]
/* Enable discontinuous mode only if continuous mode is disabled */
/* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */
/* discontinuous is set anyway, but will have no effect on ADC HW. */
if (hadc->Init.DiscontinuousConvMode == ENABLE)
8000864: 687b ldr r3, [r7, #4]
8000866: 7d1b ldrb r3, [r3, #20]
8000868: 2b01 cmp r3, #1
800086a: d119 bne.n 80008a0 <HAL_ADC_Init+0xec>
{
if (hadc->Init.ContinuousConvMode == DISABLE)
800086c: 687b ldr r3, [r7, #4]
800086e: 7b1b ldrb r3, [r3, #12]
8000870: 2b00 cmp r3, #0
8000872: d109 bne.n 8000888 <HAL_ADC_Init+0xd4>
{
/* Enable the selected ADC regular discontinuous mode */
/* Set the number of channels to be converted in discontinuous mode */
SET_BIT(tmp_cr1, ADC_CR1_DISCEN |
8000874: 687b ldr r3, [r7, #4]
8000876: 699b ldr r3, [r3, #24]
8000878: 3b01 subs r3, #1
800087a: 035a lsls r2, r3, #13
800087c: 693b ldr r3, [r7, #16]
800087e: 4313 orrs r3, r2
8000880: f443 6300 orr.w r3, r3, #2048 ; 0x800
8000884: 613b str r3, [r7, #16]
8000886: e00b b.n 80008a0 <HAL_ADC_Init+0xec>
{
/* ADC regular group settings continuous and sequencer discontinuous*/
/* cannot be enabled simultaneously. */
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8000888: 687b ldr r3, [r7, #4]
800088a: 6a9b ldr r3, [r3, #40] ; 0x28
800088c: f043 0220 orr.w r2, r3, #32
8000890: 687b ldr r3, [r7, #4]
8000892: 629a str r2, [r3, #40] ; 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8000894: 687b ldr r3, [r7, #4]
8000896: 6adb ldr r3, [r3, #44] ; 0x2c
8000898: f043 0201 orr.w r2, r3, #1
800089c: 687b ldr r3, [r7, #4]
800089e: 62da str r2, [r3, #44] ; 0x2c
}
}
/* Update ADC configuration register CR1 with previous settings */
MODIFY_REG(hadc->Instance->CR1,
80008a0: 687b ldr r3, [r7, #4]
80008a2: 681b ldr r3, [r3, #0]
80008a4: 685b ldr r3, [r3, #4]
80008a6: f423 4169 bic.w r1, r3, #59648 ; 0xe900
80008aa: 687b ldr r3, [r7, #4]
80008ac: 681b ldr r3, [r3, #0]
80008ae: 693a ldr r2, [r7, #16]
80008b0: 430a orrs r2, r1
80008b2: 605a str r2, [r3, #4]
ADC_CR1_DISCEN |
ADC_CR1_DISCNUM ,
tmp_cr1 );
/* Update ADC configuration register CR2 with previous settings */
MODIFY_REG(hadc->Instance->CR2,
80008b4: 687b ldr r3, [r7, #4]
80008b6: 681b ldr r3, [r3, #0]
80008b8: 689a ldr r2, [r3, #8]
80008ba: 4b28 ldr r3, [pc, #160] ; (800095c <HAL_ADC_Init+0x1a8>)
80008bc: 4013 ands r3, r2
80008be: 687a ldr r2, [r7, #4]
80008c0: 6812 ldr r2, [r2, #0]
80008c2: 68b9 ldr r1, [r7, #8]
80008c4: 430b orrs r3, r1
80008c6: 6093 str r3, [r2, #8]
/* Note: Scan mode is present by hardware on this device and, if */
/* disabled, discards automatically nb of conversions. Anyway, nb of */
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, regular channels sequence length is set to */
/* parameter "NbrOfConversion" */
if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
80008c8: 687b ldr r3, [r7, #4]
80008ca: 689b ldr r3, [r3, #8]
80008cc: f5b3 7f80 cmp.w r3, #256 ; 0x100
80008d0: d003 beq.n 80008da <HAL_ADC_Init+0x126>
80008d2: 687b ldr r3, [r7, #4]
80008d4: 689b ldr r3, [r3, #8]
80008d6: 2b01 cmp r3, #1
80008d8: d104 bne.n 80008e4 <HAL_ADC_Init+0x130>
{
tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
80008da: 687b ldr r3, [r7, #4]
80008dc: 691b ldr r3, [r3, #16]
80008de: 3b01 subs r3, #1
80008e0: 051b lsls r3, r3, #20
80008e2: 60fb str r3, [r7, #12]
}
MODIFY_REG(hadc->Instance->SQR1,
80008e4: 687b ldr r3, [r7, #4]
80008e6: 681b ldr r3, [r3, #0]
80008e8: 6adb ldr r3, [r3, #44] ; 0x2c
80008ea: f423 0170 bic.w r1, r3, #15728640 ; 0xf00000
80008ee: 687b ldr r3, [r7, #4]
80008f0: 681b ldr r3, [r3, #0]
80008f2: 68fa ldr r2, [r7, #12]
80008f4: 430a orrs r2, r1
80008f6: 62da str r2, [r3, #44] ; 0x2c
/* ensure of no potential problem of ADC core IP clocking. */
/* Check through register CR2 (excluding bits set in other functions: */
/* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */
/* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */
/* measurement path bit (TSVREFE). */
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
80008f8: 687b ldr r3, [r7, #4]
80008fa: 681b ldr r3, [r3, #0]
80008fc: 689a ldr r2, [r3, #8]
80008fe: 4b18 ldr r3, [pc, #96] ; (8000960 <HAL_ADC_Init+0x1ac>)
8000900: 4013 ands r3, r2
8000902: 68ba ldr r2, [r7, #8]
8000904: 429a cmp r2, r3
8000906: d10b bne.n 8000920 <HAL_ADC_Init+0x16c>
ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
ADC_CR2_TSVREFE ))
== tmp_cr2)
{
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
8000908: 687b ldr r3, [r7, #4]
800090a: 2200 movs r2, #0
800090c: 62da str r2, [r3, #44] ; 0x2c
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
800090e: 687b ldr r3, [r7, #4]
8000910: 6a9b ldr r3, [r3, #40] ; 0x28
8000912: f023 0303 bic.w r3, r3, #3
8000916: f043 0201 orr.w r2, r3, #1
800091a: 687b ldr r3, [r7, #4]
800091c: 629a str r2, [r3, #40] ; 0x28
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
800091e: e018 b.n 8000952 <HAL_ADC_Init+0x19e>
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
8000920: 687b ldr r3, [r7, #4]
8000922: 6a9b ldr r3, [r3, #40] ; 0x28
8000924: f023 0312 bic.w r3, r3, #18
8000928: f043 0210 orr.w r2, r3, #16
800092c: 687b ldr r3, [r7, #4]
800092e: 629a str r2, [r3, #40] ; 0x28
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8000930: 687b ldr r3, [r7, #4]
8000932: 6adb ldr r3, [r3, #44] ; 0x2c
8000934: f043 0201 orr.w r2, r3, #1
8000938: 687b ldr r3, [r7, #4]
800093a: 62da str r2, [r3, #44] ; 0x2c
tmp_hal_status = HAL_ERROR;
800093c: 2301 movs r3, #1
800093e: 75fb strb r3, [r7, #23]
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8000940: e007 b.n 8000952 <HAL_ADC_Init+0x19e>
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8000942: 687b ldr r3, [r7, #4]
8000944: 6a9b ldr r3, [r3, #40] ; 0x28
8000946: f043 0210 orr.w r2, r3, #16
800094a: 687b ldr r3, [r7, #4]
800094c: 629a str r2, [r3, #40] ; 0x28
tmp_hal_status = HAL_ERROR;
800094e: 2301 movs r3, #1
8000950: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
8000952: 7dfb ldrb r3, [r7, #23]
}
8000954: 4618 mov r0, r3
8000956: 3718 adds r7, #24
8000958: 46bd mov sp, r7
800095a: bd80 pop {r7, pc}
800095c: ffe1f7fd .word 0xffe1f7fd
8000960: ff1f0efe .word 0xff1f0efe
08000964 <HAL_ADC_ConfigChannel>:
* @param hadc: ADC handle
* @param sConfig: Structure of ADC channel for regular group.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
8000964: b480 push {r7}
8000966: b085 sub sp, #20
8000968: af00 add r7, sp, #0
800096a: 6078 str r0, [r7, #4]
800096c: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
800096e: 2300 movs r3, #0
8000970: 73fb strb r3, [r7, #15]
__IO uint32_t wait_loop_index = 0U;
8000972: 2300 movs r3, #0
8000974: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
8000976: 687b ldr r3, [r7, #4]
8000978: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
800097c: 2b01 cmp r3, #1
800097e: d101 bne.n 8000984 <HAL_ADC_ConfigChannel+0x20>
8000980: 2302 movs r3, #2
8000982: e0dc b.n 8000b3e <HAL_ADC_ConfigChannel+0x1da>
8000984: 687b ldr r3, [r7, #4]
8000986: 2201 movs r2, #1
8000988: f883 2024 strb.w r2, [r3, #36] ; 0x24
/* Regular sequence configuration */
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
800098c: 683b ldr r3, [r7, #0]
800098e: 685b ldr r3, [r3, #4]
8000990: 2b06 cmp r3, #6
8000992: d81c bhi.n 80009ce <HAL_ADC_ConfigChannel+0x6a>
{
MODIFY_REG(hadc->Instance->SQR3 ,
8000994: 687b ldr r3, [r7, #4]
8000996: 681b ldr r3, [r3, #0]
8000998: 6b59 ldr r1, [r3, #52] ; 0x34
800099a: 683b ldr r3, [r7, #0]
800099c: 685a ldr r2, [r3, #4]
800099e: 4613 mov r3, r2
80009a0: 009b lsls r3, r3, #2
80009a2: 4413 add r3, r2
80009a4: 3b05 subs r3, #5
80009a6: 221f movs r2, #31
80009a8: fa02 f303 lsl.w r3, r2, r3
80009ac: 43db mvns r3, r3
80009ae: 4019 ands r1, r3
80009b0: 683b ldr r3, [r7, #0]
80009b2: 6818 ldr r0, [r3, #0]
80009b4: 683b ldr r3, [r7, #0]
80009b6: 685a ldr r2, [r3, #4]
80009b8: 4613 mov r3, r2
80009ba: 009b lsls r3, r3, #2
80009bc: 4413 add r3, r2
80009be: 3b05 subs r3, #5
80009c0: fa00 f203 lsl.w r2, r0, r3
80009c4: 687b ldr r3, [r7, #4]
80009c6: 681b ldr r3, [r3, #0]
80009c8: 430a orrs r2, r1
80009ca: 635a str r2, [r3, #52] ; 0x34
80009cc: e03c b.n 8000a48 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) ,
ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
80009ce: 683b ldr r3, [r7, #0]
80009d0: 685b ldr r3, [r3, #4]
80009d2: 2b0c cmp r3, #12
80009d4: d81c bhi.n 8000a10 <HAL_ADC_ConfigChannel+0xac>
{
MODIFY_REG(hadc->Instance->SQR2 ,
80009d6: 687b ldr r3, [r7, #4]
80009d8: 681b ldr r3, [r3, #0]
80009da: 6b19 ldr r1, [r3, #48] ; 0x30
80009dc: 683b ldr r3, [r7, #0]
80009de: 685a ldr r2, [r3, #4]
80009e0: 4613 mov r3, r2
80009e2: 009b lsls r3, r3, #2
80009e4: 4413 add r3, r2
80009e6: 3b23 subs r3, #35 ; 0x23
80009e8: 221f movs r2, #31
80009ea: fa02 f303 lsl.w r3, r2, r3
80009ee: 43db mvns r3, r3
80009f0: 4019 ands r1, r3
80009f2: 683b ldr r3, [r7, #0]
80009f4: 6818 ldr r0, [r3, #0]
80009f6: 683b ldr r3, [r7, #0]
80009f8: 685a ldr r2, [r3, #4]
80009fa: 4613 mov r3, r2
80009fc: 009b lsls r3, r3, #2
80009fe: 4413 add r3, r2
8000a00: 3b23 subs r3, #35 ; 0x23
8000a02: fa00 f203 lsl.w r2, r0, r3
8000a06: 687b ldr r3, [r7, #4]
8000a08: 681b ldr r3, [r3, #0]
8000a0a: 430a orrs r2, r1
8000a0c: 631a str r2, [r3, #48] ; 0x30
8000a0e: e01b b.n 8000a48 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 13 to 16 */
else
{
MODIFY_REG(hadc->Instance->SQR1 ,
8000a10: 687b ldr r3, [r7, #4]
8000a12: 681b ldr r3, [r3, #0]
8000a14: 6ad9 ldr r1, [r3, #44] ; 0x2c
8000a16: 683b ldr r3, [r7, #0]
8000a18: 685a ldr r2, [r3, #4]
8000a1a: 4613 mov r3, r2
8000a1c: 009b lsls r3, r3, #2
8000a1e: 4413 add r3, r2
8000a20: 3b41 subs r3, #65 ; 0x41
8000a22: 221f movs r2, #31
8000a24: fa02 f303 lsl.w r3, r2, r3
8000a28: 43db mvns r3, r3
8000a2a: 4019 ands r1, r3
8000a2c: 683b ldr r3, [r7, #0]
8000a2e: 6818 ldr r0, [r3, #0]
8000a30: 683b ldr r3, [r7, #0]
8000a32: 685a ldr r2, [r3, #4]
8000a34: 4613 mov r3, r2
8000a36: 009b lsls r3, r3, #2
8000a38: 4413 add r3, r2
8000a3a: 3b41 subs r3, #65 ; 0x41
8000a3c: fa00 f203 lsl.w r2, r0, r3
8000a40: 687b ldr r3, [r7, #4]
8000a42: 681b ldr r3, [r3, #0]
8000a44: 430a orrs r2, r1
8000a46: 62da str r2, [r3, #44] ; 0x2c
}
/* Channel sampling time configuration */
/* For channels 10 to 17 */
if (sConfig->Channel >= ADC_CHANNEL_10)
8000a48: 683b ldr r3, [r7, #0]
8000a4a: 681b ldr r3, [r3, #0]
8000a4c: 2b09 cmp r3, #9
8000a4e: d91c bls.n 8000a8a <HAL_ADC_ConfigChannel+0x126>
{
MODIFY_REG(hadc->Instance->SMPR1 ,
8000a50: 687b ldr r3, [r7, #4]
8000a52: 681b ldr r3, [r3, #0]
8000a54: 68d9 ldr r1, [r3, #12]
8000a56: 683b ldr r3, [r7, #0]
8000a58: 681a ldr r2, [r3, #0]
8000a5a: 4613 mov r3, r2
8000a5c: 005b lsls r3, r3, #1
8000a5e: 4413 add r3, r2
8000a60: 3b1e subs r3, #30
8000a62: 2207 movs r2, #7
8000a64: fa02 f303 lsl.w r3, r2, r3
8000a68: 43db mvns r3, r3
8000a6a: 4019 ands r1, r3
8000a6c: 683b ldr r3, [r7, #0]
8000a6e: 6898 ldr r0, [r3, #8]
8000a70: 683b ldr r3, [r7, #0]
8000a72: 681a ldr r2, [r3, #0]
8000a74: 4613 mov r3, r2
8000a76: 005b lsls r3, r3, #1
8000a78: 4413 add r3, r2
8000a7a: 3b1e subs r3, #30
8000a7c: fa00 f203 lsl.w r2, r0, r3
8000a80: 687b ldr r3, [r7, #4]
8000a82: 681b ldr r3, [r3, #0]
8000a84: 430a orrs r2, r1
8000a86: 60da str r2, [r3, #12]
8000a88: e019 b.n 8000abe <HAL_ADC_ConfigChannel+0x15a>
ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) ,
ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
}
else /* For channels 0 to 9 */
{
MODIFY_REG(hadc->Instance->SMPR2 ,
8000a8a: 687b ldr r3, [r7, #4]
8000a8c: 681b ldr r3, [r3, #0]
8000a8e: 6919 ldr r1, [r3, #16]
8000a90: 683b ldr r3, [r7, #0]
8000a92: 681a ldr r2, [r3, #0]
8000a94: 4613 mov r3, r2
8000a96: 005b lsls r3, r3, #1
8000a98: 4413 add r3, r2
8000a9a: 2207 movs r2, #7
8000a9c: fa02 f303 lsl.w r3, r2, r3
8000aa0: 43db mvns r3, r3
8000aa2: 4019 ands r1, r3
8000aa4: 683b ldr r3, [r7, #0]
8000aa6: 6898 ldr r0, [r3, #8]
8000aa8: 683b ldr r3, [r7, #0]
8000aaa: 681a ldr r2, [r3, #0]
8000aac: 4613 mov r3, r2
8000aae: 005b lsls r3, r3, #1
8000ab0: 4413 add r3, r2
8000ab2: fa00 f203 lsl.w r2, r0, r3
8000ab6: 687b ldr r3, [r7, #4]
8000ab8: 681b ldr r3, [r3, #0]
8000aba: 430a orrs r2, r1
8000abc: 611a str r2, [r3, #16]
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
}
/* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
/* and VREFINT measurement path. */
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
8000abe: 683b ldr r3, [r7, #0]
8000ac0: 681b ldr r3, [r3, #0]
8000ac2: 2b10 cmp r3, #16
8000ac4: d003 beq.n 8000ace <HAL_ADC_ConfigChannel+0x16a>
(sConfig->Channel == ADC_CHANNEL_VREFINT) )
8000ac6: 683b ldr r3, [r7, #0]
8000ac8: 681b ldr r3, [r3, #0]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
8000aca: 2b11 cmp r3, #17
8000acc: d132 bne.n 8000b34 <HAL_ADC_ConfigChannel+0x1d0>
{
/* For STM32F1 devices with several ADC: Only ADC1 can access internal */
/* measurement channels (VrefInt/TempSensor). If these channels are */
/* intended to be set on other ADC instances, an error is reported. */
if (hadc->Instance == ADC1)
8000ace: 687b ldr r3, [r7, #4]
8000ad0: 681b ldr r3, [r3, #0]
8000ad2: 4a1d ldr r2, [pc, #116] ; (8000b48 <HAL_ADC_ConfigChannel+0x1e4>)
8000ad4: 4293 cmp r3, r2
8000ad6: d125 bne.n 8000b24 <HAL_ADC_ConfigChannel+0x1c0>
{
if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
8000ad8: 687b ldr r3, [r7, #4]
8000ada: 681b ldr r3, [r3, #0]
8000adc: 689b ldr r3, [r3, #8]
8000ade: f403 0300 and.w r3, r3, #8388608 ; 0x800000
8000ae2: 2b00 cmp r3, #0
8000ae4: d126 bne.n 8000b34 <HAL_ADC_ConfigChannel+0x1d0>
{
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
8000ae6: 687b ldr r3, [r7, #4]
8000ae8: 681b ldr r3, [r3, #0]
8000aea: 689a ldr r2, [r3, #8]
8000aec: 687b ldr r3, [r7, #4]
8000aee: 681b ldr r3, [r3, #0]
8000af0: f442 0200 orr.w r2, r2, #8388608 ; 0x800000
8000af4: 609a str r2, [r3, #8]
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
8000af6: 683b ldr r3, [r7, #0]
8000af8: 681b ldr r3, [r3, #0]
8000afa: 2b10 cmp r3, #16
8000afc: d11a bne.n 8000b34 <HAL_ADC_ConfigChannel+0x1d0>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
8000afe: 4b13 ldr r3, [pc, #76] ; (8000b4c <HAL_ADC_ConfigChannel+0x1e8>)
8000b00: 681b ldr r3, [r3, #0]
8000b02: 4a13 ldr r2, [pc, #76] ; (8000b50 <HAL_ADC_ConfigChannel+0x1ec>)
8000b04: fba2 2303 umull r2, r3, r2, r3
8000b08: 0c9a lsrs r2, r3, #18
8000b0a: 4613 mov r3, r2
8000b0c: 009b lsls r3, r3, #2
8000b0e: 4413 add r3, r2
8000b10: 005b lsls r3, r3, #1
8000b12: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8000b14: e002 b.n 8000b1c <HAL_ADC_ConfigChannel+0x1b8>
{
wait_loop_index--;
8000b16: 68bb ldr r3, [r7, #8]
8000b18: 3b01 subs r3, #1
8000b1a: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8000b1c: 68bb ldr r3, [r7, #8]
8000b1e: 2b00 cmp r3, #0
8000b20: d1f9 bne.n 8000b16 <HAL_ADC_ConfigChannel+0x1b2>
8000b22: e007 b.n 8000b34 <HAL_ADC_ConfigChannel+0x1d0>
}
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8000b24: 687b ldr r3, [r7, #4]
8000b26: 6a9b ldr r3, [r3, #40] ; 0x28
8000b28: f043 0220 orr.w r2, r3, #32
8000b2c: 687b ldr r3, [r7, #4]
8000b2e: 629a str r2, [r3, #40] ; 0x28
tmp_hal_status = HAL_ERROR;
8000b30: 2301 movs r3, #1
8000b32: 73fb strb r3, [r7, #15]
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
8000b34: 687b ldr r3, [r7, #4]
8000b36: 2200 movs r2, #0
8000b38: f883 2024 strb.w r2, [r3, #36] ; 0x24
/* Return function status */
return tmp_hal_status;
8000b3c: 7bfb ldrb r3, [r7, #15]
}
8000b3e: 4618 mov r0, r3
8000b40: 3714 adds r7, #20
8000b42: 46bd mov sp, r7
8000b44: bc80 pop {r7}
8000b46: 4770 bx lr
8000b48: 40012400 .word 0x40012400
8000b4c: 20000000 .word 0x20000000
8000b50: 431bde83 .word 0x431bde83
08000b54 <ADC_ConversionStop_Disable>:
* stopped to disable the ADC.
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
8000b54: b580 push {r7, lr}
8000b56: b084 sub sp, #16
8000b58: af00 add r7, sp, #0
8000b5a: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8000b5c: 2300 movs r3, #0
8000b5e: 60fb str r3, [r7, #12]
/* Verification if ADC is not already disabled */
if (ADC_IS_ENABLE(hadc) != RESET)
8000b60: 687b ldr r3, [r7, #4]
8000b62: 681b ldr r3, [r3, #0]
8000b64: 689b ldr r3, [r3, #8]
8000b66: f003 0301 and.w r3, r3, #1
8000b6a: 2b01 cmp r3, #1
8000b6c: d12e bne.n 8000bcc <ADC_ConversionStop_Disable+0x78>
{
/* Disable the ADC peripheral */
__HAL_ADC_DISABLE(hadc);
8000b6e: 687b ldr r3, [r7, #4]
8000b70: 681b ldr r3, [r3, #0]
8000b72: 689a ldr r2, [r3, #8]
8000b74: 687b ldr r3, [r7, #4]
8000b76: 681b ldr r3, [r3, #0]
8000b78: f022 0201 bic.w r2, r2, #1
8000b7c: 609a str r2, [r3, #8]
/* Get tick count */
tickstart = HAL_GetTick();
8000b7e: f7ff fdeb bl 8000758 <HAL_GetTick>
8000b82: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively disabled */
while(ADC_IS_ENABLE(hadc) != RESET)
8000b84: e01b b.n 8000bbe <ADC_ConversionStop_Disable+0x6a>
{
if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
8000b86: f7ff fde7 bl 8000758 <HAL_GetTick>
8000b8a: 4602 mov r2, r0
8000b8c: 68fb ldr r3, [r7, #12]
8000b8e: 1ad3 subs r3, r2, r3
8000b90: 2b02 cmp r3, #2
8000b92: d914 bls.n 8000bbe <ADC_ConversionStop_Disable+0x6a>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) != RESET)
8000b94: 687b ldr r3, [r7, #4]
8000b96: 681b ldr r3, [r3, #0]
8000b98: 689b ldr r3, [r3, #8]
8000b9a: f003 0301 and.w r3, r3, #1
8000b9e: 2b01 cmp r3, #1
8000ba0: d10d bne.n 8000bbe <ADC_ConversionStop_Disable+0x6a>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8000ba2: 687b ldr r3, [r7, #4]
8000ba4: 6a9b ldr r3, [r3, #40] ; 0x28
8000ba6: f043 0210 orr.w r2, r3, #16
8000baa: 687b ldr r3, [r7, #4]
8000bac: 629a str r2, [r3, #40] ; 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8000bae: 687b ldr r3, [r7, #4]
8000bb0: 6adb ldr r3, [r3, #44] ; 0x2c
8000bb2: f043 0201 orr.w r2, r3, #1
8000bb6: 687b ldr r3, [r7, #4]
8000bb8: 62da str r2, [r3, #44] ; 0x2c
return HAL_ERROR;
8000bba: 2301 movs r3, #1
8000bbc: e007 b.n 8000bce <ADC_ConversionStop_Disable+0x7a>
while(ADC_IS_ENABLE(hadc) != RESET)
8000bbe: 687b ldr r3, [r7, #4]
8000bc0: 681b ldr r3, [r3, #0]
8000bc2: 689b ldr r3, [r3, #8]
8000bc4: f003 0301 and.w r3, r3, #1
8000bc8: 2b01 cmp r3, #1
8000bca: d0dc beq.n 8000b86 <ADC_ConversionStop_Disable+0x32>
}
}
}
/* Return HAL status */
return HAL_OK;
8000bcc: 2300 movs r3, #0
}
8000bce: 4618 mov r0, r3
8000bd0: 3710 adds r7, #16
8000bd2: 46bd mov sp, r7
8000bd4: bd80 pop {r7, pc}
...
08000bd8 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8000bd8: b480 push {r7}
8000bda: b085 sub sp, #20
8000bdc: af00 add r7, sp, #0
8000bde: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8000be0: 687b ldr r3, [r7, #4]
8000be2: f003 0307 and.w r3, r3, #7
8000be6: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
8000be8: 4b0c ldr r3, [pc, #48] ; (8000c1c <__NVIC_SetPriorityGrouping+0x44>)
8000bea: 68db ldr r3, [r3, #12]
8000bec: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
8000bee: 68ba ldr r2, [r7, #8]
8000bf0: f64f 03ff movw r3, #63743 ; 0xf8ff
8000bf4: 4013 ands r3, r2
8000bf6: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
8000bf8: 68fb ldr r3, [r7, #12]
8000bfa: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8000bfc: 68bb ldr r3, [r7, #8]
8000bfe: 4313 orrs r3, r2
reg_value = (reg_value |
8000c00: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
8000c04: f443 3300 orr.w r3, r3, #131072 ; 0x20000
8000c08: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
8000c0a: 4a04 ldr r2, [pc, #16] ; (8000c1c <__NVIC_SetPriorityGrouping+0x44>)
8000c0c: 68bb ldr r3, [r7, #8]
8000c0e: 60d3 str r3, [r2, #12]
}
8000c10: bf00 nop
8000c12: 3714 adds r7, #20
8000c14: 46bd mov sp, r7
8000c16: bc80 pop {r7}
8000c18: 4770 bx lr
8000c1a: bf00 nop
8000c1c: e000ed00 .word 0xe000ed00
08000c20 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
8000c20: b480 push {r7}
8000c22: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8000c24: 4b04 ldr r3, [pc, #16] ; (8000c38 <__NVIC_GetPriorityGrouping+0x18>)
8000c26: 68db ldr r3, [r3, #12]
8000c28: 0a1b lsrs r3, r3, #8
8000c2a: f003 0307 and.w r3, r3, #7
}
8000c2e: 4618 mov r0, r3
8000c30: 46bd mov sp, r7
8000c32: bc80 pop {r7}
8000c34: 4770 bx lr
8000c36: bf00 nop
8000c38: e000ed00 .word 0xe000ed00
08000c3c <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
8000c3c: b480 push {r7}
8000c3e: b083 sub sp, #12
8000c40: af00 add r7, sp, #0
8000c42: 4603 mov r3, r0
8000c44: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8000c46: f997 3007 ldrsb.w r3, [r7, #7]
8000c4a: 2b00 cmp r3, #0
8000c4c: db0b blt.n 8000c66 <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
8000c4e: 79fb ldrb r3, [r7, #7]
8000c50: f003 021f and.w r2, r3, #31
8000c54: 4906 ldr r1, [pc, #24] ; (8000c70 <__NVIC_EnableIRQ+0x34>)
8000c56: f997 3007 ldrsb.w r3, [r7, #7]
8000c5a: 095b lsrs r3, r3, #5
8000c5c: 2001 movs r0, #1
8000c5e: fa00 f202 lsl.w r2, r0, r2
8000c62: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
8000c66: bf00 nop
8000c68: 370c adds r7, #12
8000c6a: 46bd mov sp, r7
8000c6c: bc80 pop {r7}
8000c6e: 4770 bx lr
8000c70: e000e100 .word 0xe000e100
08000c74 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8000c74: b480 push {r7}
8000c76: b083 sub sp, #12
8000c78: af00 add r7, sp, #0
8000c7a: 4603 mov r3, r0
8000c7c: 6039 str r1, [r7, #0]
8000c7e: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8000c80: f997 3007 ldrsb.w r3, [r7, #7]
8000c84: 2b00 cmp r3, #0
8000c86: db0a blt.n 8000c9e <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8000c88: 683b ldr r3, [r7, #0]
8000c8a: b2da uxtb r2, r3
8000c8c: 490c ldr r1, [pc, #48] ; (8000cc0 <__NVIC_SetPriority+0x4c>)
8000c8e: f997 3007 ldrsb.w r3, [r7, #7]
8000c92: 0112 lsls r2, r2, #4
8000c94: b2d2 uxtb r2, r2
8000c96: 440b add r3, r1
8000c98: f883 2300 strb.w r2, [r3, #768] ; 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
8000c9c: e00a b.n 8000cb4 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8000c9e: 683b ldr r3, [r7, #0]
8000ca0: b2da uxtb r2, r3
8000ca2: 4908 ldr r1, [pc, #32] ; (8000cc4 <__NVIC_SetPriority+0x50>)
8000ca4: 79fb ldrb r3, [r7, #7]
8000ca6: f003 030f and.w r3, r3, #15
8000caa: 3b04 subs r3, #4
8000cac: 0112 lsls r2, r2, #4
8000cae: b2d2 uxtb r2, r2
8000cb0: 440b add r3, r1
8000cb2: 761a strb r2, [r3, #24]
}
8000cb4: bf00 nop
8000cb6: 370c adds r7, #12
8000cb8: 46bd mov sp, r7
8000cba: bc80 pop {r7}
8000cbc: 4770 bx lr
8000cbe: bf00 nop
8000cc0: e000e100 .word 0xe000e100
8000cc4: e000ed00 .word 0xe000ed00
08000cc8 <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
8000cc8: b480 push {r7}
8000cca: b089 sub sp, #36 ; 0x24
8000ccc: af00 add r7, sp, #0
8000cce: 60f8 str r0, [r7, #12]
8000cd0: 60b9 str r1, [r7, #8]
8000cd2: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8000cd4: 68fb ldr r3, [r7, #12]
8000cd6: f003 0307 and.w r3, r3, #7
8000cda: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8000cdc: 69fb ldr r3, [r7, #28]
8000cde: f1c3 0307 rsb r3, r3, #7
8000ce2: 2b04 cmp r3, #4
8000ce4: bf28 it cs
8000ce6: 2304 movcs r3, #4
8000ce8: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
8000cea: 69fb ldr r3, [r7, #28]
8000cec: 3304 adds r3, #4
8000cee: 2b06 cmp r3, #6
8000cf0: d902 bls.n 8000cf8 <NVIC_EncodePriority+0x30>
8000cf2: 69fb ldr r3, [r7, #28]
8000cf4: 3b03 subs r3, #3
8000cf6: e000 b.n 8000cfa <NVIC_EncodePriority+0x32>
8000cf8: 2300 movs r3, #0
8000cfa: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8000cfc: f04f 32ff mov.w r2, #4294967295
8000d00: 69bb ldr r3, [r7, #24]
8000d02: fa02 f303 lsl.w r3, r2, r3
8000d06: 43da mvns r2, r3
8000d08: 68bb ldr r3, [r7, #8]
8000d0a: 401a ands r2, r3
8000d0c: 697b ldr r3, [r7, #20]
8000d0e: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8000d10: f04f 31ff mov.w r1, #4294967295
8000d14: 697b ldr r3, [r7, #20]
8000d16: fa01 f303 lsl.w r3, r1, r3
8000d1a: 43d9 mvns r1, r3
8000d1c: 687b ldr r3, [r7, #4]
8000d1e: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8000d20: 4313 orrs r3, r2
);
}
8000d22: 4618 mov r0, r3
8000d24: 3724 adds r7, #36 ; 0x24
8000d26: 46bd mov sp, r7
8000d28: bc80 pop {r7}
8000d2a: 4770 bx lr
08000d2c <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8000d2c: b580 push {r7, lr}
8000d2e: b082 sub sp, #8
8000d30: af00 add r7, sp, #0
8000d32: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8000d34: 687b ldr r3, [r7, #4]
8000d36: 3b01 subs r3, #1
8000d38: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
8000d3c: d301 bcc.n 8000d42 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
8000d3e: 2301 movs r3, #1
8000d40: e00f b.n 8000d62 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
8000d42: 4a0a ldr r2, [pc, #40] ; (8000d6c <SysTick_Config+0x40>)
8000d44: 687b ldr r3, [r7, #4]
8000d46: 3b01 subs r3, #1
8000d48: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
8000d4a: 210f movs r1, #15
8000d4c: f04f 30ff mov.w r0, #4294967295
8000d50: f7ff ff90 bl 8000c74 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8000d54: 4b05 ldr r3, [pc, #20] ; (8000d6c <SysTick_Config+0x40>)
8000d56: 2200 movs r2, #0
8000d58: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
8000d5a: 4b04 ldr r3, [pc, #16] ; (8000d6c <SysTick_Config+0x40>)
8000d5c: 2207 movs r2, #7
8000d5e: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8000d60: 2300 movs r3, #0
}
8000d62: 4618 mov r0, r3
8000d64: 3708 adds r7, #8
8000d66: 46bd mov sp, r7
8000d68: bd80 pop {r7, pc}
8000d6a: bf00 nop
8000d6c: e000e010 .word 0xe000e010
08000d70 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8000d70: b580 push {r7, lr}
8000d72: b082 sub sp, #8
8000d74: af00 add r7, sp, #0
8000d76: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
8000d78: 6878 ldr r0, [r7, #4]
8000d7a: f7ff ff2d bl 8000bd8 <__NVIC_SetPriorityGrouping>
}
8000d7e: bf00 nop
8000d80: 3708 adds r7, #8
8000d82: 46bd mov sp, r7
8000d84: bd80 pop {r7, pc}
08000d86 <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
8000d86: b580 push {r7, lr}
8000d88: b086 sub sp, #24
8000d8a: af00 add r7, sp, #0
8000d8c: 4603 mov r3, r0
8000d8e: 60b9 str r1, [r7, #8]
8000d90: 607a str r2, [r7, #4]
8000d92: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
8000d94: 2300 movs r3, #0
8000d96: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
8000d98: f7ff ff42 bl 8000c20 <__NVIC_GetPriorityGrouping>
8000d9c: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
8000d9e: 687a ldr r2, [r7, #4]
8000da0: 68b9 ldr r1, [r7, #8]
8000da2: 6978 ldr r0, [r7, #20]
8000da4: f7ff ff90 bl 8000cc8 <NVIC_EncodePriority>
8000da8: 4602 mov r2, r0
8000daa: f997 300f ldrsb.w r3, [r7, #15]
8000dae: 4611 mov r1, r2
8000db0: 4618 mov r0, r3
8000db2: f7ff ff5f bl 8000c74 <__NVIC_SetPriority>
}
8000db6: bf00 nop
8000db8: 3718 adds r7, #24
8000dba: 46bd mov sp, r7
8000dbc: bd80 pop {r7, pc}
08000dbe <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8000dbe: b580 push {r7, lr}
8000dc0: b082 sub sp, #8
8000dc2: af00 add r7, sp, #0
8000dc4: 4603 mov r3, r0
8000dc6: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8000dc8: f997 3007 ldrsb.w r3, [r7, #7]
8000dcc: 4618 mov r0, r3
8000dce: f7ff ff35 bl 8000c3c <__NVIC_EnableIRQ>
}
8000dd2: bf00 nop
8000dd4: 3708 adds r7, #8
8000dd6: 46bd mov sp, r7
8000dd8: bd80 pop {r7, pc}
08000dda <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
8000dda: b580 push {r7, lr}
8000ddc: b082 sub sp, #8
8000dde: af00 add r7, sp, #0
8000de0: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8000de2: 6878 ldr r0, [r7, #4]
8000de4: f7ff ffa2 bl 8000d2c <SysTick_Config>
8000de8: 4603 mov r3, r0
}
8000dea: 4618 mov r0, r3
8000dec: 3708 adds r7, #8
8000dee: 46bd mov sp, r7
8000df0: bd80 pop {r7, pc}
...
08000df4 <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8000df4: b480 push {r7}
8000df6: b08b sub sp, #44 ; 0x2c
8000df8: af00 add r7, sp, #0
8000dfa: 6078 str r0, [r7, #4]
8000dfc: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
8000dfe: 2300 movs r3, #0
8000e00: 627b str r3, [r7, #36] ; 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
8000e02: 2300 movs r3, #0
8000e04: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
8000e06: e169 b.n 80010dc <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = (0x01uL << position);
8000e08: 2201 movs r2, #1
8000e0a: 6a7b ldr r3, [r7, #36] ; 0x24
8000e0c: fa02 f303 lsl.w r3, r2, r3
8000e10: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
8000e12: 683b ldr r3, [r7, #0]
8000e14: 681b ldr r3, [r3, #0]
8000e16: 69fa ldr r2, [r7, #28]
8000e18: 4013 ands r3, r2
8000e1a: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
8000e1c: 69ba ldr r2, [r7, #24]
8000e1e: 69fb ldr r3, [r7, #28]
8000e20: 429a cmp r2, r3
8000e22: f040 8158 bne.w 80010d6 <HAL_GPIO_Init+0x2e2>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
8000e26: 683b ldr r3, [r7, #0]
8000e28: 685b ldr r3, [r3, #4]
8000e2a: 4a9a ldr r2, [pc, #616] ; (8001094 <HAL_GPIO_Init+0x2a0>)
8000e2c: 4293 cmp r3, r2
8000e2e: d05e beq.n 8000eee <HAL_GPIO_Init+0xfa>
8000e30: 4a98 ldr r2, [pc, #608] ; (8001094 <HAL_GPIO_Init+0x2a0>)
8000e32: 4293 cmp r3, r2
8000e34: d875 bhi.n 8000f22 <HAL_GPIO_Init+0x12e>
8000e36: 4a98 ldr r2, [pc, #608] ; (8001098 <HAL_GPIO_Init+0x2a4>)
8000e38: 4293 cmp r3, r2
8000e3a: d058 beq.n 8000eee <HAL_GPIO_Init+0xfa>
8000e3c: 4a96 ldr r2, [pc, #600] ; (8001098 <HAL_GPIO_Init+0x2a4>)
8000e3e: 4293 cmp r3, r2
8000e40: d86f bhi.n 8000f22 <HAL_GPIO_Init+0x12e>
8000e42: 4a96 ldr r2, [pc, #600] ; (800109c <HAL_GPIO_Init+0x2a8>)
8000e44: 4293 cmp r3, r2
8000e46: d052 beq.n 8000eee <HAL_GPIO_Init+0xfa>
8000e48: 4a94 ldr r2, [pc, #592] ; (800109c <HAL_GPIO_Init+0x2a8>)
8000e4a: 4293 cmp r3, r2
8000e4c: d869 bhi.n 8000f22 <HAL_GPIO_Init+0x12e>
8000e4e: 4a94 ldr r2, [pc, #592] ; (80010a0 <HAL_GPIO_Init+0x2ac>)
8000e50: 4293 cmp r3, r2
8000e52: d04c beq.n 8000eee <HAL_GPIO_Init+0xfa>
8000e54: 4a92 ldr r2, [pc, #584] ; (80010a0 <HAL_GPIO_Init+0x2ac>)
8000e56: 4293 cmp r3, r2
8000e58: d863 bhi.n 8000f22 <HAL_GPIO_Init+0x12e>
8000e5a: 4a92 ldr r2, [pc, #584] ; (80010a4 <HAL_GPIO_Init+0x2b0>)
8000e5c: 4293 cmp r3, r2
8000e5e: d046 beq.n 8000eee <HAL_GPIO_Init+0xfa>
8000e60: 4a90 ldr r2, [pc, #576] ; (80010a4 <HAL_GPIO_Init+0x2b0>)
8000e62: 4293 cmp r3, r2
8000e64: d85d bhi.n 8000f22 <HAL_GPIO_Init+0x12e>
8000e66: 2b12 cmp r3, #18
8000e68: d82a bhi.n 8000ec0 <HAL_GPIO_Init+0xcc>
8000e6a: 2b12 cmp r3, #18
8000e6c: d859 bhi.n 8000f22 <HAL_GPIO_Init+0x12e>
8000e6e: a201 add r2, pc, #4 ; (adr r2, 8000e74 <HAL_GPIO_Init+0x80>)
8000e70: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8000e74: 08000eef .word 0x08000eef
8000e78: 08000ec9 .word 0x08000ec9
8000e7c: 08000edb .word 0x08000edb
8000e80: 08000f1d .word 0x08000f1d
8000e84: 08000f23 .word 0x08000f23
8000e88: 08000f23 .word 0x08000f23
8000e8c: 08000f23 .word 0x08000f23
8000e90: 08000f23 .word 0x08000f23
8000e94: 08000f23 .word 0x08000f23
8000e98: 08000f23 .word 0x08000f23
8000e9c: 08000f23 .word 0x08000f23
8000ea0: 08000f23 .word 0x08000f23
8000ea4: 08000f23 .word 0x08000f23
8000ea8: 08000f23 .word 0x08000f23
8000eac: 08000f23 .word 0x08000f23
8000eb0: 08000f23 .word 0x08000f23
8000eb4: 08000f23 .word 0x08000f23
8000eb8: 08000ed1 .word 0x08000ed1
8000ebc: 08000ee5 .word 0x08000ee5
8000ec0: 4a79 ldr r2, [pc, #484] ; (80010a8 <HAL_GPIO_Init+0x2b4>)
8000ec2: 4293 cmp r3, r2
8000ec4: d013 beq.n 8000eee <HAL_GPIO_Init+0xfa>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
8000ec6: e02c b.n 8000f22 <HAL_GPIO_Init+0x12e>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
8000ec8: 683b ldr r3, [r7, #0]
8000eca: 68db ldr r3, [r3, #12]
8000ecc: 623b str r3, [r7, #32]
break;
8000ece: e029 b.n 8000f24 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
8000ed0: 683b ldr r3, [r7, #0]
8000ed2: 68db ldr r3, [r3, #12]
8000ed4: 3304 adds r3, #4
8000ed6: 623b str r3, [r7, #32]
break;
8000ed8: e024 b.n 8000f24 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
8000eda: 683b ldr r3, [r7, #0]
8000edc: 68db ldr r3, [r3, #12]
8000ede: 3308 adds r3, #8
8000ee0: 623b str r3, [r7, #32]
break;
8000ee2: e01f b.n 8000f24 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
8000ee4: 683b ldr r3, [r7, #0]
8000ee6: 68db ldr r3, [r3, #12]
8000ee8: 330c adds r3, #12
8000eea: 623b str r3, [r7, #32]
break;
8000eec: e01a b.n 8000f24 <HAL_GPIO_Init+0x130>
if (GPIO_Init->Pull == GPIO_NOPULL)
8000eee: 683b ldr r3, [r7, #0]
8000ef0: 689b ldr r3, [r3, #8]
8000ef2: 2b00 cmp r3, #0
8000ef4: d102 bne.n 8000efc <HAL_GPIO_Init+0x108>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
8000ef6: 2304 movs r3, #4
8000ef8: 623b str r3, [r7, #32]
break;
8000efa: e013 b.n 8000f24 <HAL_GPIO_Init+0x130>
else if (GPIO_Init->Pull == GPIO_PULLUP)
8000efc: 683b ldr r3, [r7, #0]
8000efe: 689b ldr r3, [r3, #8]
8000f00: 2b01 cmp r3, #1
8000f02: d105 bne.n 8000f10 <HAL_GPIO_Init+0x11c>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8000f04: 2308 movs r3, #8
8000f06: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
8000f08: 687b ldr r3, [r7, #4]
8000f0a: 69fa ldr r2, [r7, #28]
8000f0c: 611a str r2, [r3, #16]
break;
8000f0e: e009 b.n 8000f24 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8000f10: 2308 movs r3, #8
8000f12: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
8000f14: 687b ldr r3, [r7, #4]
8000f16: 69fa ldr r2, [r7, #28]
8000f18: 615a str r2, [r3, #20]
break;
8000f1a: e003 b.n 8000f24 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
8000f1c: 2300 movs r3, #0
8000f1e: 623b str r3, [r7, #32]
break;
8000f20: e000 b.n 8000f24 <HAL_GPIO_Init+0x130>
break;
8000f22: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
8000f24: 69bb ldr r3, [r7, #24]
8000f26: 2bff cmp r3, #255 ; 0xff
8000f28: d801 bhi.n 8000f2e <HAL_GPIO_Init+0x13a>
8000f2a: 687b ldr r3, [r7, #4]
8000f2c: e001 b.n 8000f32 <HAL_GPIO_Init+0x13e>
8000f2e: 687b ldr r3, [r7, #4]
8000f30: 3304 adds r3, #4
8000f32: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
8000f34: 69bb ldr r3, [r7, #24]
8000f36: 2bff cmp r3, #255 ; 0xff
8000f38: d802 bhi.n 8000f40 <HAL_GPIO_Init+0x14c>
8000f3a: 6a7b ldr r3, [r7, #36] ; 0x24
8000f3c: 009b lsls r3, r3, #2
8000f3e: e002 b.n 8000f46 <HAL_GPIO_Init+0x152>
8000f40: 6a7b ldr r3, [r7, #36] ; 0x24
8000f42: 3b08 subs r3, #8
8000f44: 009b lsls r3, r3, #2
8000f46: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
8000f48: 697b ldr r3, [r7, #20]
8000f4a: 681a ldr r2, [r3, #0]
8000f4c: 210f movs r1, #15
8000f4e: 693b ldr r3, [r7, #16]
8000f50: fa01 f303 lsl.w r3, r1, r3
8000f54: 43db mvns r3, r3
8000f56: 401a ands r2, r3
8000f58: 6a39 ldr r1, [r7, #32]
8000f5a: 693b ldr r3, [r7, #16]
8000f5c: fa01 f303 lsl.w r3, r1, r3
8000f60: 431a orrs r2, r3
8000f62: 697b ldr r3, [r7, #20]
8000f64: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
8000f66: 683b ldr r3, [r7, #0]
8000f68: 685b ldr r3, [r3, #4]
8000f6a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8000f6e: 2b00 cmp r3, #0
8000f70: f000 80b1 beq.w 80010d6 <HAL_GPIO_Init+0x2e2>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
8000f74: 4b4d ldr r3, [pc, #308] ; (80010ac <HAL_GPIO_Init+0x2b8>)
8000f76: 699b ldr r3, [r3, #24]
8000f78: 4a4c ldr r2, [pc, #304] ; (80010ac <HAL_GPIO_Init+0x2b8>)
8000f7a: f043 0301 orr.w r3, r3, #1
8000f7e: 6193 str r3, [r2, #24]
8000f80: 4b4a ldr r3, [pc, #296] ; (80010ac <HAL_GPIO_Init+0x2b8>)
8000f82: 699b ldr r3, [r3, #24]
8000f84: f003 0301 and.w r3, r3, #1
8000f88: 60bb str r3, [r7, #8]
8000f8a: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
8000f8c: 4a48 ldr r2, [pc, #288] ; (80010b0 <HAL_GPIO_Init+0x2bc>)
8000f8e: 6a7b ldr r3, [r7, #36] ; 0x24
8000f90: 089b lsrs r3, r3, #2
8000f92: 3302 adds r3, #2
8000f94: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8000f98: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
8000f9a: 6a7b ldr r3, [r7, #36] ; 0x24
8000f9c: f003 0303 and.w r3, r3, #3
8000fa0: 009b lsls r3, r3, #2
8000fa2: 220f movs r2, #15
8000fa4: fa02 f303 lsl.w r3, r2, r3
8000fa8: 43db mvns r3, r3
8000faa: 68fa ldr r2, [r7, #12]
8000fac: 4013 ands r3, r2
8000fae: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
8000fb0: 687b ldr r3, [r7, #4]
8000fb2: 4a40 ldr r2, [pc, #256] ; (80010b4 <HAL_GPIO_Init+0x2c0>)
8000fb4: 4293 cmp r3, r2
8000fb6: d013 beq.n 8000fe0 <HAL_GPIO_Init+0x1ec>
8000fb8: 687b ldr r3, [r7, #4]
8000fba: 4a3f ldr r2, [pc, #252] ; (80010b8 <HAL_GPIO_Init+0x2c4>)
8000fbc: 4293 cmp r3, r2
8000fbe: d00d beq.n 8000fdc <HAL_GPIO_Init+0x1e8>
8000fc0: 687b ldr r3, [r7, #4]
8000fc2: 4a3e ldr r2, [pc, #248] ; (80010bc <HAL_GPIO_Init+0x2c8>)
8000fc4: 4293 cmp r3, r2
8000fc6: d007 beq.n 8000fd8 <HAL_GPIO_Init+0x1e4>
8000fc8: 687b ldr r3, [r7, #4]
8000fca: 4a3d ldr r2, [pc, #244] ; (80010c0 <HAL_GPIO_Init+0x2cc>)
8000fcc: 4293 cmp r3, r2
8000fce: d101 bne.n 8000fd4 <HAL_GPIO_Init+0x1e0>
8000fd0: 2303 movs r3, #3
8000fd2: e006 b.n 8000fe2 <HAL_GPIO_Init+0x1ee>
8000fd4: 2304 movs r3, #4
8000fd6: e004 b.n 8000fe2 <HAL_GPIO_Init+0x1ee>
8000fd8: 2302 movs r3, #2
8000fda: e002 b.n 8000fe2 <HAL_GPIO_Init+0x1ee>
8000fdc: 2301 movs r3, #1
8000fde: e000 b.n 8000fe2 <HAL_GPIO_Init+0x1ee>
8000fe0: 2300 movs r3, #0
8000fe2: 6a7a ldr r2, [r7, #36] ; 0x24
8000fe4: f002 0203 and.w r2, r2, #3
8000fe8: 0092 lsls r2, r2, #2
8000fea: 4093 lsls r3, r2
8000fec: 68fa ldr r2, [r7, #12]
8000fee: 4313 orrs r3, r2
8000ff0: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
8000ff2: 492f ldr r1, [pc, #188] ; (80010b0 <HAL_GPIO_Init+0x2bc>)
8000ff4: 6a7b ldr r3, [r7, #36] ; 0x24
8000ff6: 089b lsrs r3, r3, #2
8000ff8: 3302 adds r3, #2
8000ffa: 68fa ldr r2, [r7, #12]
8000ffc: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8001000: 683b ldr r3, [r7, #0]
8001002: 685b ldr r3, [r3, #4]
8001004: f403 3380 and.w r3, r3, #65536 ; 0x10000
8001008: 2b00 cmp r3, #0
800100a: d006 beq.n 800101a <HAL_GPIO_Init+0x226>
{
SET_BIT(EXTI->IMR, iocurrent);
800100c: 4b2d ldr r3, [pc, #180] ; (80010c4 <HAL_GPIO_Init+0x2d0>)
800100e: 681a ldr r2, [r3, #0]
8001010: 492c ldr r1, [pc, #176] ; (80010c4 <HAL_GPIO_Init+0x2d0>)
8001012: 69bb ldr r3, [r7, #24]
8001014: 4313 orrs r3, r2
8001016: 600b str r3, [r1, #0]
8001018: e006 b.n 8001028 <HAL_GPIO_Init+0x234>
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
800101a: 4b2a ldr r3, [pc, #168] ; (80010c4 <HAL_GPIO_Init+0x2d0>)
800101c: 681a ldr r2, [r3, #0]
800101e: 69bb ldr r3, [r7, #24]
8001020: 43db mvns r3, r3
8001022: 4928 ldr r1, [pc, #160] ; (80010c4 <HAL_GPIO_Init+0x2d0>)
8001024: 4013 ands r3, r2
8001026: 600b str r3, [r1, #0]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8001028: 683b ldr r3, [r7, #0]
800102a: 685b ldr r3, [r3, #4]
800102c: f403 3300 and.w r3, r3, #131072 ; 0x20000
8001030: 2b00 cmp r3, #0
8001032: d006 beq.n 8001042 <HAL_GPIO_Init+0x24e>
{
SET_BIT(EXTI->EMR, iocurrent);
8001034: 4b23 ldr r3, [pc, #140] ; (80010c4 <HAL_GPIO_Init+0x2d0>)
8001036: 685a ldr r2, [r3, #4]
8001038: 4922 ldr r1, [pc, #136] ; (80010c4 <HAL_GPIO_Init+0x2d0>)
800103a: 69bb ldr r3, [r7, #24]
800103c: 4313 orrs r3, r2
800103e: 604b str r3, [r1, #4]
8001040: e006 b.n 8001050 <HAL_GPIO_Init+0x25c>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
8001042: 4b20 ldr r3, [pc, #128] ; (80010c4 <HAL_GPIO_Init+0x2d0>)
8001044: 685a ldr r2, [r3, #4]
8001046: 69bb ldr r3, [r7, #24]
8001048: 43db mvns r3, r3
800104a: 491e ldr r1, [pc, #120] ; (80010c4 <HAL_GPIO_Init+0x2d0>)
800104c: 4013 ands r3, r2
800104e: 604b str r3, [r1, #4]
}
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
8001050: 683b ldr r3, [r7, #0]
8001052: 685b ldr r3, [r3, #4]
8001054: f403 1380 and.w r3, r3, #1048576 ; 0x100000
8001058: 2b00 cmp r3, #0
800105a: d006 beq.n 800106a <HAL_GPIO_Init+0x276>
{
SET_BIT(EXTI->RTSR, iocurrent);
800105c: 4b19 ldr r3, [pc, #100] ; (80010c4 <HAL_GPIO_Init+0x2d0>)
800105e: 689a ldr r2, [r3, #8]
8001060: 4918 ldr r1, [pc, #96] ; (80010c4 <HAL_GPIO_Init+0x2d0>)
8001062: 69bb ldr r3, [r7, #24]
8001064: 4313 orrs r3, r2
8001066: 608b str r3, [r1, #8]
8001068: e006 b.n 8001078 <HAL_GPIO_Init+0x284>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
800106a: 4b16 ldr r3, [pc, #88] ; (80010c4 <HAL_GPIO_Init+0x2d0>)
800106c: 689a ldr r2, [r3, #8]
800106e: 69bb ldr r3, [r7, #24]
8001070: 43db mvns r3, r3
8001072: 4914 ldr r1, [pc, #80] ; (80010c4 <HAL_GPIO_Init+0x2d0>)
8001074: 4013 ands r3, r2
8001076: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8001078: 683b ldr r3, [r7, #0]
800107a: 685b ldr r3, [r3, #4]
800107c: f403 1300 and.w r3, r3, #2097152 ; 0x200000
8001080: 2b00 cmp r3, #0
8001082: d021 beq.n 80010c8 <HAL_GPIO_Init+0x2d4>
{
SET_BIT(EXTI->FTSR, iocurrent);
8001084: 4b0f ldr r3, [pc, #60] ; (80010c4 <HAL_GPIO_Init+0x2d0>)
8001086: 68da ldr r2, [r3, #12]
8001088: 490e ldr r1, [pc, #56] ; (80010c4 <HAL_GPIO_Init+0x2d0>)
800108a: 69bb ldr r3, [r7, #24]
800108c: 4313 orrs r3, r2
800108e: 60cb str r3, [r1, #12]
8001090: e021 b.n 80010d6 <HAL_GPIO_Init+0x2e2>
8001092: bf00 nop
8001094: 10320000 .word 0x10320000
8001098: 10310000 .word 0x10310000
800109c: 10220000 .word 0x10220000
80010a0: 10210000 .word 0x10210000
80010a4: 10120000 .word 0x10120000
80010a8: 10110000 .word 0x10110000
80010ac: 40021000 .word 0x40021000
80010b0: 40010000 .word 0x40010000
80010b4: 40010800 .word 0x40010800
80010b8: 40010c00 .word 0x40010c00
80010bc: 40011000 .word 0x40011000
80010c0: 40011400 .word 0x40011400
80010c4: 40010400 .word 0x40010400
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
80010c8: 4b0b ldr r3, [pc, #44] ; (80010f8 <HAL_GPIO_Init+0x304>)
80010ca: 68da ldr r2, [r3, #12]
80010cc: 69bb ldr r3, [r7, #24]
80010ce: 43db mvns r3, r3
80010d0: 4909 ldr r1, [pc, #36] ; (80010f8 <HAL_GPIO_Init+0x304>)
80010d2: 4013 ands r3, r2
80010d4: 60cb str r3, [r1, #12]
}
}
}
position++;
80010d6: 6a7b ldr r3, [r7, #36] ; 0x24
80010d8: 3301 adds r3, #1
80010da: 627b str r3, [r7, #36] ; 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
80010dc: 683b ldr r3, [r7, #0]
80010de: 681a ldr r2, [r3, #0]
80010e0: 6a7b ldr r3, [r7, #36] ; 0x24
80010e2: fa22 f303 lsr.w r3, r2, r3
80010e6: 2b00 cmp r3, #0
80010e8: f47f ae8e bne.w 8000e08 <HAL_GPIO_Init+0x14>
}
}
80010ec: bf00 nop
80010ee: bf00 nop
80010f0: 372c adds r7, #44 ; 0x2c
80010f2: 46bd mov sp, r7
80010f4: bc80 pop {r7}
80010f6: 4770 bx lr
80010f8: 40010400 .word 0x40010400
080010fc <HAL_I2C_Init>:
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for the specified I2C.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
{
80010fc: b580 push {r7, lr}
80010fe: b084 sub sp, #16
8001100: af00 add r7, sp, #0
8001102: 6078 str r0, [r7, #4]
uint32_t freqrange;
uint32_t pclk1;
/* Check the I2C handle allocation */
if (hi2c == NULL)
8001104: 687b ldr r3, [r7, #4]
8001106: 2b00 cmp r3, #0
8001108: d101 bne.n 800110e <HAL_I2C_Init+0x12>
{
return HAL_ERROR;
800110a: 2301 movs r3, #1
800110c: e12b b.n 8001366 <HAL_I2C_Init+0x26a>
assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
if (hi2c->State == HAL_I2C_STATE_RESET)
800110e: 687b ldr r3, [r7, #4]
8001110: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
8001114: b2db uxtb r3, r3
8001116: 2b00 cmp r3, #0
8001118: d106 bne.n 8001128 <HAL_I2C_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hi2c->Lock = HAL_UNLOCKED;
800111a: 687b ldr r3, [r7, #4]
800111c: 2200 movs r2, #0
800111e: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Init the low level hardware : GPIO, CLOCK, NVIC */
hi2c->MspInitCallback(hi2c);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_I2C_MspInit(hi2c);
8001122: 6878 ldr r0, [r7, #4]
8001124: f7ff f9d8 bl 80004d8 <HAL_I2C_MspInit>
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
hi2c->State = HAL_I2C_STATE_BUSY;
8001128: 687b ldr r3, [r7, #4]
800112a: 2224 movs r2, #36 ; 0x24
800112c: f883 203d strb.w r2, [r3, #61] ; 0x3d
/* Disable the selected I2C peripheral */
__HAL_I2C_DISABLE(hi2c);
8001130: 687b ldr r3, [r7, #4]
8001132: 681b ldr r3, [r3, #0]
8001134: 681a ldr r2, [r3, #0]
8001136: 687b ldr r3, [r7, #4]
8001138: 681b ldr r3, [r3, #0]
800113a: f022 0201 bic.w r2, r2, #1
800113e: 601a str r2, [r3, #0]
/*Reset I2C*/
hi2c->Instance->CR1 |= I2C_CR1_SWRST;
8001140: 687b ldr r3, [r7, #4]
8001142: 681b ldr r3, [r3, #0]
8001144: 681a ldr r2, [r3, #0]
8001146: 687b ldr r3, [r7, #4]
8001148: 681b ldr r3, [r3, #0]
800114a: f442 4200 orr.w r2, r2, #32768 ; 0x8000
800114e: 601a str r2, [r3, #0]
hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
8001150: 687b ldr r3, [r7, #4]
8001152: 681b ldr r3, [r3, #0]
8001154: 681a ldr r2, [r3, #0]
8001156: 687b ldr r3, [r7, #4]
8001158: 681b ldr r3, [r3, #0]
800115a: f422 4200 bic.w r2, r2, #32768 ; 0x8000
800115e: 601a str r2, [r3, #0]
/* Get PCLK1 frequency */
pclk1 = HAL_RCC_GetPCLK1Freq();
8001160: f002 f970 bl 8003444 <HAL_RCC_GetPCLK1Freq>
8001164: 60f8 str r0, [r7, #12]
/* Check the minimum allowed PCLK1 frequency */
if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
8001166: 687b ldr r3, [r7, #4]
8001168: 685b ldr r3, [r3, #4]
800116a: 4a81 ldr r2, [pc, #516] ; (8001370 <HAL_I2C_Init+0x274>)
800116c: 4293 cmp r3, r2
800116e: d807 bhi.n 8001180 <HAL_I2C_Init+0x84>
8001170: 68fb ldr r3, [r7, #12]
8001172: 4a80 ldr r2, [pc, #512] ; (8001374 <HAL_I2C_Init+0x278>)
8001174: 4293 cmp r3, r2
8001176: bf94 ite ls
8001178: 2301 movls r3, #1
800117a: 2300 movhi r3, #0
800117c: b2db uxtb r3, r3
800117e: e006 b.n 800118e <HAL_I2C_Init+0x92>
8001180: 68fb ldr r3, [r7, #12]
8001182: 4a7d ldr r2, [pc, #500] ; (8001378 <HAL_I2C_Init+0x27c>)
8001184: 4293 cmp r3, r2
8001186: bf94 ite ls
8001188: 2301 movls r3, #1
800118a: 2300 movhi r3, #0
800118c: b2db uxtb r3, r3
800118e: 2b00 cmp r3, #0
8001190: d001 beq.n 8001196 <HAL_I2C_Init+0x9a>
{
return HAL_ERROR;
8001192: 2301 movs r3, #1
8001194: e0e7 b.n 8001366 <HAL_I2C_Init+0x26a>
}
/* Calculate frequency range */
freqrange = I2C_FREQRANGE(pclk1);
8001196: 68fb ldr r3, [r7, #12]
8001198: 4a78 ldr r2, [pc, #480] ; (800137c <HAL_I2C_Init+0x280>)
800119a: fba2 2303 umull r2, r3, r2, r3
800119e: 0c9b lsrs r3, r3, #18
80011a0: 60bb str r3, [r7, #8]
/*---------------------------- I2Cx CR2 Configuration ----------------------*/
/* Configure I2Cx: Frequency range */
MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
80011a2: 687b ldr r3, [r7, #4]
80011a4: 681b ldr r3, [r3, #0]
80011a6: 685b ldr r3, [r3, #4]
80011a8: f023 013f bic.w r1, r3, #63 ; 0x3f
80011ac: 687b ldr r3, [r7, #4]
80011ae: 681b ldr r3, [r3, #0]
80011b0: 68ba ldr r2, [r7, #8]
80011b2: 430a orrs r2, r1
80011b4: 605a str r2, [r3, #4]
/*---------------------------- I2Cx TRISE Configuration --------------------*/
/* Configure I2Cx: Rise Time */
MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
80011b6: 687b ldr r3, [r7, #4]
80011b8: 681b ldr r3, [r3, #0]
80011ba: 6a1b ldr r3, [r3, #32]
80011bc: f023 013f bic.w r1, r3, #63 ; 0x3f
80011c0: 687b ldr r3, [r7, #4]
80011c2: 685b ldr r3, [r3, #4]
80011c4: 4a6a ldr r2, [pc, #424] ; (8001370 <HAL_I2C_Init+0x274>)
80011c6: 4293 cmp r3, r2
80011c8: d802 bhi.n 80011d0 <HAL_I2C_Init+0xd4>
80011ca: 68bb ldr r3, [r7, #8]
80011cc: 3301 adds r3, #1
80011ce: e009 b.n 80011e4 <HAL_I2C_Init+0xe8>
80011d0: 68bb ldr r3, [r7, #8]
80011d2: f44f 7296 mov.w r2, #300 ; 0x12c
80011d6: fb02 f303 mul.w r3, r2, r3
80011da: 4a69 ldr r2, [pc, #420] ; (8001380 <HAL_I2C_Init+0x284>)
80011dc: fba2 2303 umull r2, r3, r2, r3
80011e0: 099b lsrs r3, r3, #6
80011e2: 3301 adds r3, #1
80011e4: 687a ldr r2, [r7, #4]
80011e6: 6812 ldr r2, [r2, #0]
80011e8: 430b orrs r3, r1
80011ea: 6213 str r3, [r2, #32]
/*---------------------------- I2Cx CCR Configuration ----------------------*/
/* Configure I2Cx: Speed */
MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
80011ec: 687b ldr r3, [r7, #4]
80011ee: 681b ldr r3, [r3, #0]
80011f0: 69db ldr r3, [r3, #28]
80011f2: f423 424f bic.w r2, r3, #52992 ; 0xcf00
80011f6: f022 02ff bic.w r2, r2, #255 ; 0xff
80011fa: 687b ldr r3, [r7, #4]
80011fc: 685b ldr r3, [r3, #4]
80011fe: 495c ldr r1, [pc, #368] ; (8001370 <HAL_I2C_Init+0x274>)
8001200: 428b cmp r3, r1
8001202: d819 bhi.n 8001238 <HAL_I2C_Init+0x13c>
8001204: 68fb ldr r3, [r7, #12]
8001206: 1e59 subs r1, r3, #1
8001208: 687b ldr r3, [r7, #4]
800120a: 685b ldr r3, [r3, #4]
800120c: 005b lsls r3, r3, #1
800120e: fbb1 f3f3 udiv r3, r1, r3
8001212: 1c59 adds r1, r3, #1
8001214: f640 73fc movw r3, #4092 ; 0xffc
8001218: 400b ands r3, r1
800121a: 2b00 cmp r3, #0
800121c: d00a beq.n 8001234 <HAL_I2C_Init+0x138>
800121e: 68fb ldr r3, [r7, #12]
8001220: 1e59 subs r1, r3, #1
8001222: 687b ldr r3, [r7, #4]
8001224: 685b ldr r3, [r3, #4]
8001226: 005b lsls r3, r3, #1
8001228: fbb1 f3f3 udiv r3, r1, r3
800122c: 3301 adds r3, #1
800122e: f3c3 030b ubfx r3, r3, #0, #12
8001232: e051 b.n 80012d8 <HAL_I2C_Init+0x1dc>
8001234: 2304 movs r3, #4
8001236: e04f b.n 80012d8 <HAL_I2C_Init+0x1dc>
8001238: 687b ldr r3, [r7, #4]
800123a: 689b ldr r3, [r3, #8]
800123c: 2b00 cmp r3, #0
800123e: d111 bne.n 8001264 <HAL_I2C_Init+0x168>
8001240: 68fb ldr r3, [r7, #12]
8001242: 1e58 subs r0, r3, #1
8001244: 687b ldr r3, [r7, #4]
8001246: 6859 ldr r1, [r3, #4]
8001248: 460b mov r3, r1
800124a: 005b lsls r3, r3, #1
800124c: 440b add r3, r1
800124e: fbb0 f3f3 udiv r3, r0, r3
8001252: 3301 adds r3, #1
8001254: f3c3 030b ubfx r3, r3, #0, #12
8001258: 2b00 cmp r3, #0
800125a: bf0c ite eq
800125c: 2301 moveq r3, #1
800125e: 2300 movne r3, #0
8001260: b2db uxtb r3, r3
8001262: e012 b.n 800128a <HAL_I2C_Init+0x18e>
8001264: 68fb ldr r3, [r7, #12]
8001266: 1e58 subs r0, r3, #1
8001268: 687b ldr r3, [r7, #4]
800126a: 6859 ldr r1, [r3, #4]
800126c: 460b mov r3, r1
800126e: 009b lsls r3, r3, #2
8001270: 440b add r3, r1
8001272: 0099 lsls r1, r3, #2
8001274: 440b add r3, r1
8001276: fbb0 f3f3 udiv r3, r0, r3
800127a: 3301 adds r3, #1
800127c: f3c3 030b ubfx r3, r3, #0, #12
8001280: 2b00 cmp r3, #0
8001282: bf0c ite eq
8001284: 2301 moveq r3, #1
8001286: 2300 movne r3, #0
8001288: b2db uxtb r3, r3
800128a: 2b00 cmp r3, #0
800128c: d001 beq.n 8001292 <HAL_I2C_Init+0x196>
800128e: 2301 movs r3, #1
8001290: e022 b.n 80012d8 <HAL_I2C_Init+0x1dc>
8001292: 687b ldr r3, [r7, #4]
8001294: 689b ldr r3, [r3, #8]
8001296: 2b00 cmp r3, #0
8001298: d10e bne.n 80012b8 <HAL_I2C_Init+0x1bc>
800129a: 68fb ldr r3, [r7, #12]
800129c: 1e58 subs r0, r3, #1
800129e: 687b ldr r3, [r7, #4]
80012a0: 6859 ldr r1, [r3, #4]
80012a2: 460b mov r3, r1
80012a4: 005b lsls r3, r3, #1
80012a6: 440b add r3, r1
80012a8: fbb0 f3f3 udiv r3, r0, r3
80012ac: 3301 adds r3, #1
80012ae: f3c3 030b ubfx r3, r3, #0, #12
80012b2: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80012b6: e00f b.n 80012d8 <HAL_I2C_Init+0x1dc>
80012b8: 68fb ldr r3, [r7, #12]
80012ba: 1e58 subs r0, r3, #1
80012bc: 687b ldr r3, [r7, #4]
80012be: 6859 ldr r1, [r3, #4]
80012c0: 460b mov r3, r1
80012c2: 009b lsls r3, r3, #2
80012c4: 440b add r3, r1
80012c6: 0099 lsls r1, r3, #2
80012c8: 440b add r3, r1
80012ca: fbb0 f3f3 udiv r3, r0, r3
80012ce: 3301 adds r3, #1
80012d0: f3c3 030b ubfx r3, r3, #0, #12
80012d4: f443 4340 orr.w r3, r3, #49152 ; 0xc000
80012d8: 6879 ldr r1, [r7, #4]
80012da: 6809 ldr r1, [r1, #0]
80012dc: 4313 orrs r3, r2
80012de: 61cb str r3, [r1, #28]
/*---------------------------- I2Cx CR1 Configuration ----------------------*/
/* Configure I2Cx: Generalcall and NoStretch mode */
MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
80012e0: 687b ldr r3, [r7, #4]
80012e2: 681b ldr r3, [r3, #0]
80012e4: 681b ldr r3, [r3, #0]
80012e6: f023 01c0 bic.w r1, r3, #192 ; 0xc0
80012ea: 687b ldr r3, [r7, #4]
80012ec: 69da ldr r2, [r3, #28]
80012ee: 687b ldr r3, [r7, #4]
80012f0: 6a1b ldr r3, [r3, #32]
80012f2: 431a orrs r2, r3
80012f4: 687b ldr r3, [r7, #4]
80012f6: 681b ldr r3, [r3, #0]
80012f8: 430a orrs r2, r1
80012fa: 601a str r2, [r3, #0]
/*---------------------------- I2Cx OAR1 Configuration ---------------------*/
/* Configure I2Cx: Own Address1 and addressing mode */
MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
80012fc: 687b ldr r3, [r7, #4]
80012fe: 681b ldr r3, [r3, #0]
8001300: 689b ldr r3, [r3, #8]
8001302: f423 4303 bic.w r3, r3, #33536 ; 0x8300
8001306: f023 03ff bic.w r3, r3, #255 ; 0xff
800130a: 687a ldr r2, [r7, #4]
800130c: 6911 ldr r1, [r2, #16]
800130e: 687a ldr r2, [r7, #4]
8001310: 68d2 ldr r2, [r2, #12]
8001312: 4311 orrs r1, r2
8001314: 687a ldr r2, [r7, #4]
8001316: 6812 ldr r2, [r2, #0]
8001318: 430b orrs r3, r1
800131a: 6093 str r3, [r2, #8]
/*---------------------------- I2Cx OAR2 Configuration ---------------------*/
/* Configure I2Cx: Dual mode and Own Address2 */
MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
800131c: 687b ldr r3, [r7, #4]
800131e: 681b ldr r3, [r3, #0]
8001320: 68db ldr r3, [r3, #12]
8001322: f023 01ff bic.w r1, r3, #255 ; 0xff
8001326: 687b ldr r3, [r7, #4]
8001328: 695a ldr r2, [r3, #20]
800132a: 687b ldr r3, [r7, #4]
800132c: 699b ldr r3, [r3, #24]
800132e: 431a orrs r2, r3
8001330: 687b ldr r3, [r7, #4]
8001332: 681b ldr r3, [r3, #0]
8001334: 430a orrs r2, r1
8001336: 60da str r2, [r3, #12]
/* Enable the selected I2C peripheral */
__HAL_I2C_ENABLE(hi2c);
8001338: 687b ldr r3, [r7, #4]
800133a: 681b ldr r3, [r3, #0]
800133c: 681a ldr r2, [r3, #0]
800133e: 687b ldr r3, [r7, #4]
8001340: 681b ldr r3, [r3, #0]
8001342: f042 0201 orr.w r2, r2, #1
8001346: 601a str r2, [r3, #0]
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
8001348: 687b ldr r3, [r7, #4]
800134a: 2200 movs r2, #0
800134c: 641a str r2, [r3, #64] ; 0x40
hi2c->State = HAL_I2C_STATE_READY;
800134e: 687b ldr r3, [r7, #4]
8001350: 2220 movs r2, #32
8001352: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->PreviousState = I2C_STATE_NONE;
8001356: 687b ldr r3, [r7, #4]
8001358: 2200 movs r2, #0
800135a: 631a str r2, [r3, #48] ; 0x30
hi2c->Mode = HAL_I2C_MODE_NONE;
800135c: 687b ldr r3, [r7, #4]
800135e: 2200 movs r2, #0
8001360: f883 203e strb.w r2, [r3, #62] ; 0x3e
return HAL_OK;
8001364: 2300 movs r3, #0
}
8001366: 4618 mov r0, r3
8001368: 3710 adds r7, #16
800136a: 46bd mov sp, r7
800136c: bd80 pop {r7, pc}
800136e: bf00 nop
8001370: 000186a0 .word 0x000186a0
8001374: 001e847f .word 0x001e847f
8001378: 003d08ff .word 0x003d08ff
800137c: 431bde83 .word 0x431bde83
8001380: 10624dd3 .word 0x10624dd3
08001384 <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
8001384: b5f0 push {r4, r5, r6, r7, lr}
8001386: b08b sub sp, #44 ; 0x2c
8001388: af06 add r7, sp, #24
800138a: 6078 str r0, [r7, #4]
USB_OTG_GlobalTypeDef *USBx;
#endif /* defined (USB_OTG_FS) */
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
800138c: 687b ldr r3, [r7, #4]
800138e: 2b00 cmp r3, #0
8001390: d101 bne.n 8001396 <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
8001392: 2301 movs r3, #1
8001394: e0fd b.n 8001592 <HAL_PCD_Init+0x20e>
#if defined (USB_OTG_FS)
USBx = hpcd->Instance;
#endif /* defined (USB_OTG_FS) */
if (hpcd->State == HAL_PCD_STATE_RESET)
8001396: 687b ldr r3, [r7, #4]
8001398: f893 32a9 ldrb.w r3, [r3, #681] ; 0x2a9
800139c: b2db uxtb r3, r3
800139e: 2b00 cmp r3, #0
80013a0: d106 bne.n 80013b0 <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
80013a2: 687b ldr r3, [r7, #4]
80013a4: 2200 movs r2, #0
80013a6: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
80013aa: 6878 ldr r0, [r7, #4]
80013ac: f006 fb5c bl 8007a68 <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
80013b0: 687b ldr r3, [r7, #4]
80013b2: 2203 movs r2, #3
80013b4: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9
hpcd->Init.dma_enable = 0U;
}
#endif /* defined (USB_OTG_FS) */
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
80013b8: 687b ldr r3, [r7, #4]
80013ba: 681b ldr r3, [r3, #0]
80013bc: 4618 mov r0, r3
80013be: f002 fa3f bl 8003840 <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
80013c2: 687b ldr r3, [r7, #4]
80013c4: 681b ldr r3, [r3, #0]
80013c6: 603b str r3, [r7, #0]
80013c8: 687e ldr r6, [r7, #4]
80013ca: 466d mov r5, sp
80013cc: f106 0410 add.w r4, r6, #16
80013d0: cc0f ldmia r4!, {r0, r1, r2, r3}
80013d2: c50f stmia r5!, {r0, r1, r2, r3}
80013d4: 6823 ldr r3, [r4, #0]
80013d6: 602b str r3, [r5, #0]
80013d8: 1d33 adds r3, r6, #4
80013da: cb0e ldmia r3, {r1, r2, r3}
80013dc: 6838 ldr r0, [r7, #0]
80013de: f002 fa09 bl 80037f4 <USB_CoreInit>
80013e2: 4603 mov r3, r0
80013e4: 2b00 cmp r3, #0
80013e6: d005 beq.n 80013f4 <HAL_PCD_Init+0x70>
{
hpcd->State = HAL_PCD_STATE_ERROR;
80013e8: 687b ldr r3, [r7, #4]
80013ea: 2202 movs r2, #2
80013ec: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9
return HAL_ERROR;
80013f0: 2301 movs r3, #1
80013f2: e0ce b.n 8001592 <HAL_PCD_Init+0x20e>
}
/* Force Device Mode*/
(void)USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE);
80013f4: 687b ldr r3, [r7, #4]
80013f6: 681b ldr r3, [r3, #0]
80013f8: 2100 movs r1, #0
80013fa: 4618 mov r0, r3
80013fc: f002 fa3a bl 8003874 <USB_SetCurrentMode>
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001400: 2300 movs r3, #0
8001402: 73fb strb r3, [r7, #15]
8001404: e04c b.n 80014a0 <HAL_PCD_Init+0x11c>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
8001406: 7bfb ldrb r3, [r7, #15]
8001408: 6879 ldr r1, [r7, #4]
800140a: 1c5a adds r2, r3, #1
800140c: 4613 mov r3, r2
800140e: 009b lsls r3, r3, #2
8001410: 4413 add r3, r2
8001412: 00db lsls r3, r3, #3
8001414: 440b add r3, r1
8001416: 3301 adds r3, #1
8001418: 2201 movs r2, #1
800141a: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
800141c: 7bfb ldrb r3, [r7, #15]
800141e: 6879 ldr r1, [r7, #4]
8001420: 1c5a adds r2, r3, #1
8001422: 4613 mov r3, r2
8001424: 009b lsls r3, r3, #2
8001426: 4413 add r3, r2
8001428: 00db lsls r3, r3, #3
800142a: 440b add r3, r1
800142c: 7bfa ldrb r2, [r7, #15]
800142e: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].tx_fifo_num = i;
8001430: 7bfa ldrb r2, [r7, #15]
8001432: 7bfb ldrb r3, [r7, #15]
8001434: b298 uxth r0, r3
8001436: 6879 ldr r1, [r7, #4]
8001438: 4613 mov r3, r2
800143a: 009b lsls r3, r3, #2
800143c: 4413 add r3, r2
800143e: 00db lsls r3, r3, #3
8001440: 440b add r3, r1
8001442: 3336 adds r3, #54 ; 0x36
8001444: 4602 mov r2, r0
8001446: 801a strh r2, [r3, #0]
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
8001448: 7bfb ldrb r3, [r7, #15]
800144a: 6879 ldr r1, [r7, #4]
800144c: 1c5a adds r2, r3, #1
800144e: 4613 mov r3, r2
8001450: 009b lsls r3, r3, #2
8001452: 4413 add r3, r2
8001454: 00db lsls r3, r3, #3
8001456: 440b add r3, r1
8001458: 3303 adds r3, #3
800145a: 2200 movs r2, #0
800145c: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
800145e: 7bfa ldrb r2, [r7, #15]
8001460: 6879 ldr r1, [r7, #4]
8001462: 4613 mov r3, r2
8001464: 009b lsls r3, r3, #2
8001466: 4413 add r3, r2
8001468: 00db lsls r3, r3, #3
800146a: 440b add r3, r1
800146c: 3338 adds r3, #56 ; 0x38
800146e: 2200 movs r2, #0
8001470: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
8001472: 7bfa ldrb r2, [r7, #15]
8001474: 6879 ldr r1, [r7, #4]
8001476: 4613 mov r3, r2
8001478: 009b lsls r3, r3, #2
800147a: 4413 add r3, r2
800147c: 00db lsls r3, r3, #3
800147e: 440b add r3, r1
8001480: 333c adds r3, #60 ; 0x3c
8001482: 2200 movs r2, #0
8001484: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
8001486: 7bfa ldrb r2, [r7, #15]
8001488: 6879 ldr r1, [r7, #4]
800148a: 4613 mov r3, r2
800148c: 009b lsls r3, r3, #2
800148e: 4413 add r3, r2
8001490: 00db lsls r3, r3, #3
8001492: 440b add r3, r1
8001494: 3340 adds r3, #64 ; 0x40
8001496: 2200 movs r2, #0
8001498: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
800149a: 7bfb ldrb r3, [r7, #15]
800149c: 3301 adds r3, #1
800149e: 73fb strb r3, [r7, #15]
80014a0: 7bfa ldrb r2, [r7, #15]
80014a2: 687b ldr r3, [r7, #4]
80014a4: 685b ldr r3, [r3, #4]
80014a6: 429a cmp r2, r3
80014a8: d3ad bcc.n 8001406 <HAL_PCD_Init+0x82>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80014aa: 2300 movs r3, #0
80014ac: 73fb strb r3, [r7, #15]
80014ae: e044 b.n 800153a <HAL_PCD_Init+0x1b6>
{
hpcd->OUT_ep[i].is_in = 0U;
80014b0: 7bfa ldrb r2, [r7, #15]
80014b2: 6879 ldr r1, [r7, #4]
80014b4: 4613 mov r3, r2
80014b6: 009b lsls r3, r3, #2
80014b8: 4413 add r3, r2
80014ba: 00db lsls r3, r3, #3
80014bc: 440b add r3, r1
80014be: f203 1369 addw r3, r3, #361 ; 0x169
80014c2: 2200 movs r2, #0
80014c4: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
80014c6: 7bfa ldrb r2, [r7, #15]
80014c8: 6879 ldr r1, [r7, #4]
80014ca: 4613 mov r3, r2
80014cc: 009b lsls r3, r3, #2
80014ce: 4413 add r3, r2
80014d0: 00db lsls r3, r3, #3
80014d2: 440b add r3, r1
80014d4: f503 73b4 add.w r3, r3, #360 ; 0x168
80014d8: 7bfa ldrb r2, [r7, #15]
80014da: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
80014dc: 7bfa ldrb r2, [r7, #15]
80014de: 6879 ldr r1, [r7, #4]
80014e0: 4613 mov r3, r2
80014e2: 009b lsls r3, r3, #2
80014e4: 4413 add r3, r2
80014e6: 00db lsls r3, r3, #3
80014e8: 440b add r3, r1
80014ea: f203 136b addw r3, r3, #363 ; 0x16b
80014ee: 2200 movs r2, #0
80014f0: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
80014f2: 7bfa ldrb r2, [r7, #15]
80014f4: 6879 ldr r1, [r7, #4]
80014f6: 4613 mov r3, r2
80014f8: 009b lsls r3, r3, #2
80014fa: 4413 add r3, r2
80014fc: 00db lsls r3, r3, #3
80014fe: 440b add r3, r1
8001500: f503 73bc add.w r3, r3, #376 ; 0x178
8001504: 2200 movs r2, #0
8001506: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
8001508: 7bfa ldrb r2, [r7, #15]
800150a: 6879 ldr r1, [r7, #4]
800150c: 4613 mov r3, r2
800150e: 009b lsls r3, r3, #2
8001510: 4413 add r3, r2
8001512: 00db lsls r3, r3, #3
8001514: 440b add r3, r1
8001516: f503 73be add.w r3, r3, #380 ; 0x17c
800151a: 2200 movs r2, #0
800151c: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
800151e: 7bfa ldrb r2, [r7, #15]
8001520: 6879 ldr r1, [r7, #4]
8001522: 4613 mov r3, r2
8001524: 009b lsls r3, r3, #2
8001526: 4413 add r3, r2
8001528: 00db lsls r3, r3, #3
800152a: 440b add r3, r1
800152c: f503 73c0 add.w r3, r3, #384 ; 0x180
8001530: 2200 movs r2, #0
8001532: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001534: 7bfb ldrb r3, [r7, #15]
8001536: 3301 adds r3, #1
8001538: 73fb strb r3, [r7, #15]
800153a: 7bfa ldrb r2, [r7, #15]
800153c: 687b ldr r3, [r7, #4]
800153e: 685b ldr r3, [r3, #4]
8001540: 429a cmp r2, r3
8001542: d3b5 bcc.n 80014b0 <HAL_PCD_Init+0x12c>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8001544: 687b ldr r3, [r7, #4]
8001546: 681b ldr r3, [r3, #0]
8001548: 603b str r3, [r7, #0]
800154a: 687e ldr r6, [r7, #4]
800154c: 466d mov r5, sp
800154e: f106 0410 add.w r4, r6, #16
8001552: cc0f ldmia r4!, {r0, r1, r2, r3}
8001554: c50f stmia r5!, {r0, r1, r2, r3}
8001556: 6823 ldr r3, [r4, #0]
8001558: 602b str r3, [r5, #0]
800155a: 1d33 adds r3, r6, #4
800155c: cb0e ldmia r3, {r1, r2, r3}
800155e: 6838 ldr r0, [r7, #0]
8001560: f002 f994 bl 800388c <USB_DevInit>
8001564: 4603 mov r3, r0
8001566: 2b00 cmp r3, #0
8001568: d005 beq.n 8001576 <HAL_PCD_Init+0x1f2>
{
hpcd->State = HAL_PCD_STATE_ERROR;
800156a: 687b ldr r3, [r7, #4]
800156c: 2202 movs r2, #2
800156e: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9
return HAL_ERROR;
8001572: 2301 movs r3, #1
8001574: e00d b.n 8001592 <HAL_PCD_Init+0x20e>
}
hpcd->USB_Address = 0U;
8001576: 687b ldr r3, [r7, #4]
8001578: 2200 movs r2, #0
800157a: f883 2024 strb.w r2, [r3, #36] ; 0x24
hpcd->State = HAL_PCD_STATE_READY;
800157e: 687b ldr r3, [r7, #4]
8001580: 2201 movs r2, #1
8001582: f883 22a9 strb.w r2, [r3, #681] ; 0x2a9
(void)USB_DevDisconnect(hpcd->Instance);
8001586: 687b ldr r3, [r7, #4]
8001588: 681b ldr r3, [r3, #0]
800158a: 4618 mov r0, r3
800158c: f004 f919 bl 80057c2 <USB_DevDisconnect>
return HAL_OK;
8001590: 2300 movs r3, #0
}
8001592: 4618 mov r0, r3
8001594: 3714 adds r7, #20
8001596: 46bd mov sp, r7
8001598: bdf0 pop {r4, r5, r6, r7, pc}
0800159a <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
800159a: b580 push {r7, lr}
800159c: b082 sub sp, #8
800159e: af00 add r7, sp, #0
80015a0: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
80015a2: 687b ldr r3, [r7, #4]
80015a4: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
80015a8: 2b01 cmp r3, #1
80015aa: d101 bne.n 80015b0 <HAL_PCD_Start+0x16>
80015ac: 2302 movs r3, #2
80015ae: e016 b.n 80015de <HAL_PCD_Start+0x44>
80015b0: 687b ldr r3, [r7, #4]
80015b2: 2201 movs r2, #1
80015b4: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
__HAL_PCD_ENABLE(hpcd);
80015b8: 687b ldr r3, [r7, #4]
80015ba: 681b ldr r3, [r3, #0]
80015bc: 4618 mov r0, r3
80015be: f002 f929 bl 8003814 <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
80015c2: 2101 movs r1, #1
80015c4: 6878 ldr r0, [r7, #4]
80015c6: f006 fc92 bl 8007eee <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
80015ca: 687b ldr r3, [r7, #4]
80015cc: 681b ldr r3, [r3, #0]
80015ce: 4618 mov r0, r3
80015d0: f004 f8ed bl 80057ae <USB_DevConnect>
__HAL_UNLOCK(hpcd);
80015d4: 687b ldr r3, [r7, #4]
80015d6: 2200 movs r2, #0
80015d8: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
80015dc: 2300 movs r3, #0
}
80015de: 4618 mov r0, r3
80015e0: 3708 adds r7, #8
80015e2: 46bd mov sp, r7
80015e4: bd80 pop {r7, pc}
080015e6 <HAL_PCD_Stop>:
* @brief Stop the USB device.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd)
{
80015e6: b580 push {r7, lr}
80015e8: b082 sub sp, #8
80015ea: af00 add r7, sp, #0
80015ec: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
80015ee: 687b ldr r3, [r7, #4]
80015f0: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
80015f4: 2b01 cmp r3, #1
80015f6: d101 bne.n 80015fc <HAL_PCD_Stop+0x16>
80015f8: 2302 movs r3, #2
80015fa: e016 b.n 800162a <HAL_PCD_Stop+0x44>
80015fc: 687b ldr r3, [r7, #4]
80015fe: 2201 movs r2, #1
8001600: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
__HAL_PCD_DISABLE(hpcd);
8001604: 687b ldr r3, [r7, #4]
8001606: 681b ldr r3, [r3, #0]
8001608: 4618 mov r0, r3
800160a: f002 f919 bl 8003840 <USB_DisableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 0U);
800160e: 2100 movs r1, #0
8001610: 6878 ldr r0, [r7, #4]
8001612: f006 fc6c bl 8007eee <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevDisconnect(hpcd->Instance);
8001616: 687b ldr r3, [r7, #4]
8001618: 681b ldr r3, [r3, #0]
800161a: 4618 mov r0, r3
800161c: f004 f8d1 bl 80057c2 <USB_DevDisconnect>
#if defined (USB_OTG_FS)
(void)USB_FlushTxFifo(hpcd->Instance, 0x10U);
#endif /* defined (USB_OTG_FS) */
__HAL_UNLOCK(hpcd);
8001620: 687b ldr r3, [r7, #4]
8001622: 2200 movs r2, #0
8001624: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
8001628: 2300 movs r3, #0
}
800162a: 4618 mov r0, r3
800162c: 3708 adds r7, #8
800162e: 46bd mov sp, r7
8001630: bd80 pop {r7, pc}
08001632 <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
8001632: b580 push {r7, lr}
8001634: b088 sub sp, #32
8001636: af00 add r7, sp, #0
8001638: 6078 str r0, [r7, #4]
uint16_t store_ep[8];
uint8_t i;
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_CTR))
800163a: 687b ldr r3, [r7, #4]
800163c: 681b ldr r3, [r3, #0]
800163e: 4618 mov r0, r3
8001640: f004 f8c9 bl 80057d6 <USB_ReadInterrupts>
8001644: 4603 mov r3, r0
8001646: f403 4300 and.w r3, r3, #32768 ; 0x8000
800164a: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
800164e: d102 bne.n 8001656 <HAL_PCD_IRQHandler+0x24>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
8001650: 6878 ldr r0, [r7, #4]
8001652: f000 fb02 bl 8001c5a <PCD_EP_ISR_Handler>
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_RESET))
8001656: 687b ldr r3, [r7, #4]
8001658: 681b ldr r3, [r3, #0]
800165a: 4618 mov r0, r3
800165c: f004 f8bb bl 80057d6 <USB_ReadInterrupts>
8001660: 4603 mov r3, r0
8001662: f403 6380 and.w r3, r3, #1024 ; 0x400
8001666: f5b3 6f80 cmp.w r3, #1024 ; 0x400
800166a: d112 bne.n 8001692 <HAL_PCD_IRQHandler+0x60>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
800166c: 687b ldr r3, [r7, #4]
800166e: 681b ldr r3, [r3, #0]
8001670: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8001674: b29a uxth r2, r3
8001676: 687b ldr r3, [r7, #4]
8001678: 681b ldr r3, [r3, #0]
800167a: f422 6280 bic.w r2, r2, #1024 ; 0x400
800167e: b292 uxth r2, r2
8001680: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
8001684: 6878 ldr r0, [r7, #4]
8001686: f006 fa6a bl 8007b5e <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
800168a: 2100 movs r1, #0
800168c: 6878 ldr r0, [r7, #4]
800168e: f000 f925 bl 80018dc <HAL_PCD_SetAddress>
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_PMAOVR))
8001692: 687b ldr r3, [r7, #4]
8001694: 681b ldr r3, [r3, #0]
8001696: 4618 mov r0, r3
8001698: f004 f89d bl 80057d6 <USB_ReadInterrupts>
800169c: 4603 mov r3, r0
800169e: f403 4380 and.w r3, r3, #16384 ; 0x4000
80016a2: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
80016a6: d10b bne.n 80016c0 <HAL_PCD_IRQHandler+0x8e>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
80016a8: 687b ldr r3, [r7, #4]
80016aa: 681b ldr r3, [r3, #0]
80016ac: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
80016b0: b29a uxth r2, r3
80016b2: 687b ldr r3, [r7, #4]
80016b4: 681b ldr r3, [r3, #0]
80016b6: f422 4280 bic.w r2, r2, #16384 ; 0x4000
80016ba: b292 uxth r2, r2
80016bc: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ERR))
80016c0: 687b ldr r3, [r7, #4]
80016c2: 681b ldr r3, [r3, #0]
80016c4: 4618 mov r0, r3
80016c6: f004 f886 bl 80057d6 <USB_ReadInterrupts>
80016ca: 4603 mov r3, r0
80016cc: f403 5300 and.w r3, r3, #8192 ; 0x2000
80016d0: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
80016d4: d10b bne.n 80016ee <HAL_PCD_IRQHandler+0xbc>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
80016d6: 687b ldr r3, [r7, #4]
80016d8: 681b ldr r3, [r3, #0]
80016da: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
80016de: b29a uxth r2, r3
80016e0: 687b ldr r3, [r7, #4]
80016e2: 681b ldr r3, [r3, #0]
80016e4: f422 5200 bic.w r2, r2, #8192 ; 0x2000
80016e8: b292 uxth r2, r2
80016ea: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_WKUP))
80016ee: 687b ldr r3, [r7, #4]
80016f0: 681b ldr r3, [r3, #0]
80016f2: 4618 mov r0, r3
80016f4: f004 f86f bl 80057d6 <USB_ReadInterrupts>
80016f8: 4603 mov r3, r0
80016fa: f403 5380 and.w r3, r3, #4096 ; 0x1000
80016fe: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
8001702: d126 bne.n 8001752 <HAL_PCD_IRQHandler+0x120>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
8001704: 687b ldr r3, [r7, #4]
8001706: 681b ldr r3, [r3, #0]
8001708: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
800170c: b29a uxth r2, r3
800170e: 687b ldr r3, [r7, #4]
8001710: 681b ldr r3, [r3, #0]
8001712: f022 0204 bic.w r2, r2, #4
8001716: b292 uxth r2, r2
8001718: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
800171c: 687b ldr r3, [r7, #4]
800171e: 681b ldr r3, [r3, #0]
8001720: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
8001724: b29a uxth r2, r3
8001726: 687b ldr r3, [r7, #4]
8001728: 681b ldr r3, [r3, #0]
800172a: f022 0208 bic.w r2, r2, #8
800172e: b292 uxth r2, r2
8001730: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
8001734: 6878 ldr r0, [r7, #4]
8001736: f006 fa4b bl 8007bd0 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
800173a: 687b ldr r3, [r7, #4]
800173c: 681b ldr r3, [r3, #0]
800173e: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8001742: b29a uxth r2, r3
8001744: 687b ldr r3, [r7, #4]
8001746: 681b ldr r3, [r3, #0]
8001748: f422 5280 bic.w r2, r2, #4096 ; 0x1000
800174c: b292 uxth r2, r2
800174e: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SUSP))
8001752: 687b ldr r3, [r7, #4]
8001754: 681b ldr r3, [r3, #0]
8001756: 4618 mov r0, r3
8001758: f004 f83d bl 80057d6 <USB_ReadInterrupts>
800175c: 4603 mov r3, r0
800175e: f403 6300 and.w r3, r3, #2048 ; 0x800
8001762: f5b3 6f00 cmp.w r3, #2048 ; 0x800
8001766: f040 8084 bne.w 8001872 <HAL_PCD_IRQHandler+0x240>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint register */
for (i = 0U; i < 8U; i++)
800176a: 2300 movs r3, #0
800176c: 77fb strb r3, [r7, #31]
800176e: e011 b.n 8001794 <HAL_PCD_IRQHandler+0x162>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
8001770: 687b ldr r3, [r7, #4]
8001772: 681b ldr r3, [r3, #0]
8001774: 461a mov r2, r3
8001776: 7ffb ldrb r3, [r7, #31]
8001778: 009b lsls r3, r3, #2
800177a: 441a add r2, r3
800177c: 7ffb ldrb r3, [r7, #31]
800177e: 8812 ldrh r2, [r2, #0]
8001780: b292 uxth r2, r2
8001782: 005b lsls r3, r3, #1
8001784: f107 0120 add.w r1, r7, #32
8001788: 440b add r3, r1
800178a: f823 2c14 strh.w r2, [r3, #-20]
for (i = 0U; i < 8U; i++)
800178e: 7ffb ldrb r3, [r7, #31]
8001790: 3301 adds r3, #1
8001792: 77fb strb r3, [r7, #31]
8001794: 7ffb ldrb r3, [r7, #31]
8001796: 2b07 cmp r3, #7
8001798: d9ea bls.n 8001770 <HAL_PCD_IRQHandler+0x13e>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
800179a: 687b ldr r3, [r7, #4]
800179c: 681b ldr r3, [r3, #0]
800179e: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
80017a2: b29a uxth r2, r3
80017a4: 687b ldr r3, [r7, #4]
80017a6: 681b ldr r3, [r3, #0]
80017a8: f042 0201 orr.w r2, r2, #1
80017ac: b292 uxth r2, r2
80017ae: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
80017b2: 687b ldr r3, [r7, #4]
80017b4: 681b ldr r3, [r3, #0]
80017b6: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
80017ba: b29a uxth r2, r3
80017bc: 687b ldr r3, [r7, #4]
80017be: 681b ldr r3, [r3, #0]
80017c0: f022 0201 bic.w r2, r2, #1
80017c4: b292 uxth r2, r2
80017c6: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
80017ca: bf00 nop
80017cc: 687b ldr r3, [r7, #4]
80017ce: 681b ldr r3, [r3, #0]
80017d0: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
80017d4: b29b uxth r3, r3
80017d6: f403 6380 and.w r3, r3, #1024 ; 0x400
80017da: 2b00 cmp r3, #0
80017dc: d0f6 beq.n 80017cc <HAL_PCD_IRQHandler+0x19a>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
80017de: 687b ldr r3, [r7, #4]
80017e0: 681b ldr r3, [r3, #0]
80017e2: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
80017e6: b29a uxth r2, r3
80017e8: 687b ldr r3, [r7, #4]
80017ea: 681b ldr r3, [r3, #0]
80017ec: f422 6280 bic.w r2, r2, #1024 ; 0x400
80017f0: b292 uxth r2, r2
80017f2: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
80017f6: 2300 movs r3, #0
80017f8: 77fb strb r3, [r7, #31]
80017fa: e010 b.n 800181e <HAL_PCD_IRQHandler+0x1ec>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
80017fc: 7ffb ldrb r3, [r7, #31]
80017fe: 687a ldr r2, [r7, #4]
8001800: 6812 ldr r2, [r2, #0]
8001802: 4611 mov r1, r2
8001804: 7ffa ldrb r2, [r7, #31]
8001806: 0092 lsls r2, r2, #2
8001808: 440a add r2, r1
800180a: 005b lsls r3, r3, #1
800180c: f107 0120 add.w r1, r7, #32
8001810: 440b add r3, r1
8001812: f833 3c14 ldrh.w r3, [r3, #-20]
8001816: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
8001818: 7ffb ldrb r3, [r7, #31]
800181a: 3301 adds r3, #1
800181c: 77fb strb r3, [r7, #31]
800181e: 7ffb ldrb r3, [r7, #31]
8001820: 2b07 cmp r3, #7
8001822: d9eb bls.n 80017fc <HAL_PCD_IRQHandler+0x1ca>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
8001824: 687b ldr r3, [r7, #4]
8001826: 681b ldr r3, [r3, #0]
8001828: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
800182c: b29a uxth r2, r3
800182e: 687b ldr r3, [r7, #4]
8001830: 681b ldr r3, [r3, #0]
8001832: f042 0208 orr.w r2, r2, #8
8001836: b292 uxth r2, r2
8001838: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
800183c: 687b ldr r3, [r7, #4]
800183e: 681b ldr r3, [r3, #0]
8001840: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8001844: b29a uxth r2, r3
8001846: 687b ldr r3, [r7, #4]
8001848: 681b ldr r3, [r3, #0]
800184a: f422 6200 bic.w r2, r2, #2048 ; 0x800
800184e: b292 uxth r2, r2
8001850: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
8001854: 687b ldr r3, [r7, #4]
8001856: 681b ldr r3, [r3, #0]
8001858: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
800185c: b29a uxth r2, r3
800185e: 687b ldr r3, [r7, #4]
8001860: 681b ldr r3, [r3, #0]
8001862: f042 0204 orr.w r2, r2, #4
8001866: b292 uxth r2, r2
8001868: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
800186c: 6878 ldr r0, [r7, #4]
800186e: f006 f995 bl 8007b9c <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SOF))
8001872: 687b ldr r3, [r7, #4]
8001874: 681b ldr r3, [r3, #0]
8001876: 4618 mov r0, r3
8001878: f003 ffad bl 80057d6 <USB_ReadInterrupts>
800187c: 4603 mov r3, r0
800187e: f403 7300 and.w r3, r3, #512 ; 0x200
8001882: f5b3 7f00 cmp.w r3, #512 ; 0x200
8001886: d10e bne.n 80018a6 <HAL_PCD_IRQHandler+0x274>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
8001888: 687b ldr r3, [r7, #4]
800188a: 681b ldr r3, [r3, #0]
800188c: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8001890: b29a uxth r2, r3
8001892: 687b ldr r3, [r7, #4]
8001894: 681b ldr r3, [r3, #0]
8001896: f422 7200 bic.w r2, r2, #512 ; 0x200
800189a: b292 uxth r2, r2
800189c: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
80018a0: 6878 ldr r0, [r7, #4]
80018a2: f006 f94e bl 8007b42 <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ESOF))
80018a6: 687b ldr r3, [r7, #4]
80018a8: 681b ldr r3, [r3, #0]
80018aa: 4618 mov r0, r3
80018ac: f003 ff93 bl 80057d6 <USB_ReadInterrupts>
80018b0: 4603 mov r3, r0
80018b2: f403 7380 and.w r3, r3, #256 ; 0x100
80018b6: f5b3 7f80 cmp.w r3, #256 ; 0x100
80018ba: d10b bne.n 80018d4 <HAL_PCD_IRQHandler+0x2a2>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
80018bc: 687b ldr r3, [r7, #4]
80018be: 681b ldr r3, [r3, #0]
80018c0: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
80018c4: b29a uxth r2, r3
80018c6: 687b ldr r3, [r7, #4]
80018c8: 681b ldr r3, [r3, #0]
80018ca: f422 7280 bic.w r2, r2, #256 ; 0x100
80018ce: b292 uxth r2, r2
80018d0: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
}
}
80018d4: bf00 nop
80018d6: 3720 adds r7, #32
80018d8: 46bd mov sp, r7
80018da: bd80 pop {r7, pc}
080018dc <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
80018dc: b580 push {r7, lr}
80018de: b082 sub sp, #8
80018e0: af00 add r7, sp, #0
80018e2: 6078 str r0, [r7, #4]
80018e4: 460b mov r3, r1
80018e6: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
80018e8: 687b ldr r3, [r7, #4]
80018ea: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
80018ee: 2b01 cmp r3, #1
80018f0: d101 bne.n 80018f6 <HAL_PCD_SetAddress+0x1a>
80018f2: 2302 movs r3, #2
80018f4: e013 b.n 800191e <HAL_PCD_SetAddress+0x42>
80018f6: 687b ldr r3, [r7, #4]
80018f8: 2201 movs r2, #1
80018fa: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
hpcd->USB_Address = address;
80018fe: 687b ldr r3, [r7, #4]
8001900: 78fa ldrb r2, [r7, #3]
8001902: f883 2024 strb.w r2, [r3, #36] ; 0x24
(void)USB_SetDevAddress(hpcd->Instance, address);
8001906: 687b ldr r3, [r7, #4]
8001908: 681b ldr r3, [r3, #0]
800190a: 78fa ldrb r2, [r7, #3]
800190c: 4611 mov r1, r2
800190e: 4618 mov r0, r3
8001910: f003 ff3a bl 8005788 <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8001914: 687b ldr r3, [r7, #4]
8001916: 2200 movs r2, #0
8001918: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
800191c: 2300 movs r3, #0
}
800191e: 4618 mov r0, r3
8001920: 3708 adds r7, #8
8001922: 46bd mov sp, r7
8001924: bd80 pop {r7, pc}
08001926 <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
8001926: b580 push {r7, lr}
8001928: b084 sub sp, #16
800192a: af00 add r7, sp, #0
800192c: 6078 str r0, [r7, #4]
800192e: 4608 mov r0, r1
8001930: 4611 mov r1, r2
8001932: 461a mov r2, r3
8001934: 4603 mov r3, r0
8001936: 70fb strb r3, [r7, #3]
8001938: 460b mov r3, r1
800193a: 803b strh r3, [r7, #0]
800193c: 4613 mov r3, r2
800193e: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
8001940: 2300 movs r3, #0
8001942: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8001944: f997 3003 ldrsb.w r3, [r7, #3]
8001948: 2b00 cmp r3, #0
800194a: da0e bge.n 800196a <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
800194c: 78fb ldrb r3, [r7, #3]
800194e: f003 0307 and.w r3, r3, #7
8001952: 1c5a adds r2, r3, #1
8001954: 4613 mov r3, r2
8001956: 009b lsls r3, r3, #2
8001958: 4413 add r3, r2
800195a: 00db lsls r3, r3, #3
800195c: 687a ldr r2, [r7, #4]
800195e: 4413 add r3, r2
8001960: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8001962: 68fb ldr r3, [r7, #12]
8001964: 2201 movs r2, #1
8001966: 705a strb r2, [r3, #1]
8001968: e00e b.n 8001988 <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
800196a: 78fb ldrb r3, [r7, #3]
800196c: f003 0207 and.w r2, r3, #7
8001970: 4613 mov r3, r2
8001972: 009b lsls r3, r3, #2
8001974: 4413 add r3, r2
8001976: 00db lsls r3, r3, #3
8001978: f503 73b4 add.w r3, r3, #360 ; 0x168
800197c: 687a ldr r2, [r7, #4]
800197e: 4413 add r3, r2
8001980: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8001982: 68fb ldr r3, [r7, #12]
8001984: 2200 movs r2, #0
8001986: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8001988: 78fb ldrb r3, [r7, #3]
800198a: f003 0307 and.w r3, r3, #7
800198e: b2da uxtb r2, r3
8001990: 68fb ldr r3, [r7, #12]
8001992: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
8001994: 883a ldrh r2, [r7, #0]
8001996: 68fb ldr r3, [r7, #12]
8001998: 611a str r2, [r3, #16]
ep->type = ep_type;
800199a: 68fb ldr r3, [r7, #12]
800199c: 78ba ldrb r2, [r7, #2]
800199e: 70da strb r2, [r3, #3]
if (ep->is_in != 0U)
80019a0: 68fb ldr r3, [r7, #12]
80019a2: 785b ldrb r3, [r3, #1]
80019a4: 2b00 cmp r3, #0
80019a6: d004 beq.n 80019b2 <HAL_PCD_EP_Open+0x8c>
{
/* Assign a Tx FIFO */
ep->tx_fifo_num = ep->num;
80019a8: 68fb ldr r3, [r7, #12]
80019aa: 781b ldrb r3, [r3, #0]
80019ac: b29a uxth r2, r3
80019ae: 68fb ldr r3, [r7, #12]
80019b0: 81da strh r2, [r3, #14]
}
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
80019b2: 78bb ldrb r3, [r7, #2]
80019b4: 2b02 cmp r3, #2
80019b6: d102 bne.n 80019be <HAL_PCD_EP_Open+0x98>
{
ep->data_pid_start = 0U;
80019b8: 68fb ldr r3, [r7, #12]
80019ba: 2200 movs r2, #0
80019bc: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
80019be: 687b ldr r3, [r7, #4]
80019c0: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
80019c4: 2b01 cmp r3, #1
80019c6: d101 bne.n 80019cc <HAL_PCD_EP_Open+0xa6>
80019c8: 2302 movs r3, #2
80019ca: e00e b.n 80019ea <HAL_PCD_EP_Open+0xc4>
80019cc: 687b ldr r3, [r7, #4]
80019ce: 2201 movs r2, #1
80019d0: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
80019d4: 687b ldr r3, [r7, #4]
80019d6: 681b ldr r3, [r3, #0]
80019d8: 68f9 ldr r1, [r7, #12]
80019da: 4618 mov r0, r3
80019dc: f001 ff76 bl 80038cc <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
80019e0: 687b ldr r3, [r7, #4]
80019e2: 2200 movs r2, #0
80019e4: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return ret;
80019e8: 7afb ldrb r3, [r7, #11]
}
80019ea: 4618 mov r0, r3
80019ec: 3710 adds r7, #16
80019ee: 46bd mov sp, r7
80019f0: bd80 pop {r7, pc}
080019f2 <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
80019f2: b580 push {r7, lr}
80019f4: b086 sub sp, #24
80019f6: af00 add r7, sp, #0
80019f8: 60f8 str r0, [r7, #12]
80019fa: 607a str r2, [r7, #4]
80019fc: 603b str r3, [r7, #0]
80019fe: 460b mov r3, r1
8001a00: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8001a02: 7afb ldrb r3, [r7, #11]
8001a04: f003 0207 and.w r2, r3, #7
8001a08: 4613 mov r3, r2
8001a0a: 009b lsls r3, r3, #2
8001a0c: 4413 add r3, r2
8001a0e: 00db lsls r3, r3, #3
8001a10: f503 73b4 add.w r3, r3, #360 ; 0x168
8001a14: 68fa ldr r2, [r7, #12]
8001a16: 4413 add r3, r2
8001a18: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8001a1a: 697b ldr r3, [r7, #20]
8001a1c: 687a ldr r2, [r7, #4]
8001a1e: 615a str r2, [r3, #20]
ep->xfer_len = len;
8001a20: 697b ldr r3, [r7, #20]
8001a22: 683a ldr r2, [r7, #0]
8001a24: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
8001a26: 697b ldr r3, [r7, #20]
8001a28: 2200 movs r2, #0
8001a2a: 61da str r2, [r3, #28]
ep->is_in = 0U;
8001a2c: 697b ldr r3, [r7, #20]
8001a2e: 2200 movs r2, #0
8001a30: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8001a32: 7afb ldrb r3, [r7, #11]
8001a34: f003 0307 and.w r3, r3, #7
8001a38: b2da uxtb r2, r3
8001a3a: 697b ldr r3, [r7, #20]
8001a3c: 701a strb r2, [r3, #0]
if ((ep_addr & EP_ADDR_MSK) == 0U)
8001a3e: 7afb ldrb r3, [r7, #11]
8001a40: f003 0307 and.w r3, r3, #7
8001a44: 2b00 cmp r3, #0
8001a46: d106 bne.n 8001a56 <HAL_PCD_EP_Receive+0x64>
{
(void)USB_EP0StartXfer(hpcd->Instance, ep);
8001a48: 68fb ldr r3, [r7, #12]
8001a4a: 681b ldr r3, [r3, #0]
8001a4c: 6979 ldr r1, [r7, #20]
8001a4e: 4618 mov r0, r3
8001a50: f002 faa6 bl 8003fa0 <USB_EPStartXfer>
8001a54: e005 b.n 8001a62 <HAL_PCD_EP_Receive+0x70>
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
8001a56: 68fb ldr r3, [r7, #12]
8001a58: 681b ldr r3, [r3, #0]
8001a5a: 6979 ldr r1, [r7, #20]
8001a5c: 4618 mov r0, r3
8001a5e: f002 fa9f bl 8003fa0 <USB_EPStartXfer>
}
return HAL_OK;
8001a62: 2300 movs r3, #0
}
8001a64: 4618 mov r0, r3
8001a66: 3718 adds r7, #24
8001a68: 46bd mov sp, r7
8001a6a: bd80 pop {r7, pc}
08001a6c <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8001a6c: b580 push {r7, lr}
8001a6e: b086 sub sp, #24
8001a70: af00 add r7, sp, #0
8001a72: 60f8 str r0, [r7, #12]
8001a74: 607a str r2, [r7, #4]
8001a76: 603b str r3, [r7, #0]
8001a78: 460b mov r3, r1
8001a7a: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001a7c: 7afb ldrb r3, [r7, #11]
8001a7e: f003 0307 and.w r3, r3, #7
8001a82: 1c5a adds r2, r3, #1
8001a84: 4613 mov r3, r2
8001a86: 009b lsls r3, r3, #2
8001a88: 4413 add r3, r2
8001a8a: 00db lsls r3, r3, #3
8001a8c: 68fa ldr r2, [r7, #12]
8001a8e: 4413 add r3, r2
8001a90: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8001a92: 697b ldr r3, [r7, #20]
8001a94: 687a ldr r2, [r7, #4]
8001a96: 615a str r2, [r3, #20]
ep->xfer_len = len;
8001a98: 697b ldr r3, [r7, #20]
8001a9a: 683a ldr r2, [r7, #0]
8001a9c: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
8001a9e: 697b ldr r3, [r7, #20]
8001aa0: 2201 movs r2, #1
8001aa2: f883 2024 strb.w r2, [r3, #36] ; 0x24
ep->xfer_len_db = len;
8001aa6: 697b ldr r3, [r7, #20]
8001aa8: 683a ldr r2, [r7, #0]
8001aaa: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
8001aac: 697b ldr r3, [r7, #20]
8001aae: 2200 movs r2, #0
8001ab0: 61da str r2, [r3, #28]
ep->is_in = 1U;
8001ab2: 697b ldr r3, [r7, #20]
8001ab4: 2201 movs r2, #1
8001ab6: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8001ab8: 7afb ldrb r3, [r7, #11]
8001aba: f003 0307 and.w r3, r3, #7
8001abe: b2da uxtb r2, r3
8001ac0: 697b ldr r3, [r7, #20]
8001ac2: 701a strb r2, [r3, #0]
if ((ep_addr & EP_ADDR_MSK) == 0U)
8001ac4: 7afb ldrb r3, [r7, #11]
8001ac6: f003 0307 and.w r3, r3, #7
8001aca: 2b00 cmp r3, #0
8001acc: d106 bne.n 8001adc <HAL_PCD_EP_Transmit+0x70>
{
(void)USB_EP0StartXfer(hpcd->Instance, ep);
8001ace: 68fb ldr r3, [r7, #12]
8001ad0: 681b ldr r3, [r3, #0]
8001ad2: 6979 ldr r1, [r7, #20]
8001ad4: 4618 mov r0, r3
8001ad6: f002 fa63 bl 8003fa0 <USB_EPStartXfer>
8001ada: e005 b.n 8001ae8 <HAL_PCD_EP_Transmit+0x7c>
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
8001adc: 68fb ldr r3, [r7, #12]
8001ade: 681b ldr r3, [r3, #0]
8001ae0: 6979 ldr r1, [r7, #20]
8001ae2: 4618 mov r0, r3
8001ae4: f002 fa5c bl 8003fa0 <USB_EPStartXfer>
}
return HAL_OK;
8001ae8: 2300 movs r3, #0
}
8001aea: 4618 mov r0, r3
8001aec: 3718 adds r7, #24
8001aee: 46bd mov sp, r7
8001af0: bd80 pop {r7, pc}
08001af2 <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8001af2: b580 push {r7, lr}
8001af4: b084 sub sp, #16
8001af6: af00 add r7, sp, #0
8001af8: 6078 str r0, [r7, #4]
8001afa: 460b mov r3, r1
8001afc: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
8001afe: 78fb ldrb r3, [r7, #3]
8001b00: f003 0207 and.w r2, r3, #7
8001b04: 687b ldr r3, [r7, #4]
8001b06: 685b ldr r3, [r3, #4]
8001b08: 429a cmp r2, r3
8001b0a: d901 bls.n 8001b10 <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
8001b0c: 2301 movs r3, #1
8001b0e: e04c b.n 8001baa <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
8001b10: f997 3003 ldrsb.w r3, [r7, #3]
8001b14: 2b00 cmp r3, #0
8001b16: da0e bge.n 8001b36 <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001b18: 78fb ldrb r3, [r7, #3]
8001b1a: f003 0307 and.w r3, r3, #7
8001b1e: 1c5a adds r2, r3, #1
8001b20: 4613 mov r3, r2
8001b22: 009b lsls r3, r3, #2
8001b24: 4413 add r3, r2
8001b26: 00db lsls r3, r3, #3
8001b28: 687a ldr r2, [r7, #4]
8001b2a: 4413 add r3, r2
8001b2c: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8001b2e: 68fb ldr r3, [r7, #12]
8001b30: 2201 movs r2, #1
8001b32: 705a strb r2, [r3, #1]
8001b34: e00c b.n 8001b50 <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8001b36: 78fa ldrb r2, [r7, #3]
8001b38: 4613 mov r3, r2
8001b3a: 009b lsls r3, r3, #2
8001b3c: 4413 add r3, r2
8001b3e: 00db lsls r3, r3, #3
8001b40: f503 73b4 add.w r3, r3, #360 ; 0x168
8001b44: 687a ldr r2, [r7, #4]
8001b46: 4413 add r3, r2
8001b48: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8001b4a: 68fb ldr r3, [r7, #12]
8001b4c: 2200 movs r2, #0
8001b4e: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
8001b50: 68fb ldr r3, [r7, #12]
8001b52: 2201 movs r2, #1
8001b54: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8001b56: 78fb ldrb r3, [r7, #3]
8001b58: f003 0307 and.w r3, r3, #7
8001b5c: b2da uxtb r2, r3
8001b5e: 68fb ldr r3, [r7, #12]
8001b60: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8001b62: 687b ldr r3, [r7, #4]
8001b64: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
8001b68: 2b01 cmp r3, #1
8001b6a: d101 bne.n 8001b70 <HAL_PCD_EP_SetStall+0x7e>
8001b6c: 2302 movs r3, #2
8001b6e: e01c b.n 8001baa <HAL_PCD_EP_SetStall+0xb8>
8001b70: 687b ldr r3, [r7, #4]
8001b72: 2201 movs r2, #1
8001b74: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
(void)USB_EPSetStall(hpcd->Instance, ep);
8001b78: 687b ldr r3, [r7, #4]
8001b7a: 681b ldr r3, [r3, #0]
8001b7c: 68f9 ldr r1, [r7, #12]
8001b7e: 4618 mov r0, r3
8001b80: f003 fd05 bl 800558e <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8001b84: 78fb ldrb r3, [r7, #3]
8001b86: f003 0307 and.w r3, r3, #7
8001b8a: 2b00 cmp r3, #0
8001b8c: d108 bne.n 8001ba0 <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
8001b8e: 687b ldr r3, [r7, #4]
8001b90: 681a ldr r2, [r3, #0]
8001b92: 687b ldr r3, [r7, #4]
8001b94: f503 732c add.w r3, r3, #688 ; 0x2b0
8001b98: 4619 mov r1, r3
8001b9a: 4610 mov r0, r2
8001b9c: f003 fe2a bl 80057f4 <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
8001ba0: 687b ldr r3, [r7, #4]
8001ba2: 2200 movs r2, #0
8001ba4: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
8001ba8: 2300 movs r3, #0
}
8001baa: 4618 mov r0, r3
8001bac: 3710 adds r7, #16
8001bae: 46bd mov sp, r7
8001bb0: bd80 pop {r7, pc}
08001bb2 <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8001bb2: b580 push {r7, lr}
8001bb4: b084 sub sp, #16
8001bb6: af00 add r7, sp, #0
8001bb8: 6078 str r0, [r7, #4]
8001bba: 460b mov r3, r1
8001bbc: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
8001bbe: 78fb ldrb r3, [r7, #3]
8001bc0: f003 020f and.w r2, r3, #15
8001bc4: 687b ldr r3, [r7, #4]
8001bc6: 685b ldr r3, [r3, #4]
8001bc8: 429a cmp r2, r3
8001bca: d901 bls.n 8001bd0 <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
8001bcc: 2301 movs r3, #1
8001bce: e040 b.n 8001c52 <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
8001bd0: f997 3003 ldrsb.w r3, [r7, #3]
8001bd4: 2b00 cmp r3, #0
8001bd6: da0e bge.n 8001bf6 <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001bd8: 78fb ldrb r3, [r7, #3]
8001bda: f003 0307 and.w r3, r3, #7
8001bde: 1c5a adds r2, r3, #1
8001be0: 4613 mov r3, r2
8001be2: 009b lsls r3, r3, #2
8001be4: 4413 add r3, r2
8001be6: 00db lsls r3, r3, #3
8001be8: 687a ldr r2, [r7, #4]
8001bea: 4413 add r3, r2
8001bec: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8001bee: 68fb ldr r3, [r7, #12]
8001bf0: 2201 movs r2, #1
8001bf2: 705a strb r2, [r3, #1]
8001bf4: e00e b.n 8001c14 <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8001bf6: 78fb ldrb r3, [r7, #3]
8001bf8: f003 0207 and.w r2, r3, #7
8001bfc: 4613 mov r3, r2
8001bfe: 009b lsls r3, r3, #2
8001c00: 4413 add r3, r2
8001c02: 00db lsls r3, r3, #3
8001c04: f503 73b4 add.w r3, r3, #360 ; 0x168
8001c08: 687a ldr r2, [r7, #4]
8001c0a: 4413 add r3, r2
8001c0c: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8001c0e: 68fb ldr r3, [r7, #12]
8001c10: 2200 movs r2, #0
8001c12: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
8001c14: 68fb ldr r3, [r7, #12]
8001c16: 2200 movs r2, #0
8001c18: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8001c1a: 78fb ldrb r3, [r7, #3]
8001c1c: f003 0307 and.w r3, r3, #7
8001c20: b2da uxtb r2, r3
8001c22: 68fb ldr r3, [r7, #12]
8001c24: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8001c26: 687b ldr r3, [r7, #4]
8001c28: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
8001c2c: 2b01 cmp r3, #1
8001c2e: d101 bne.n 8001c34 <HAL_PCD_EP_ClrStall+0x82>
8001c30: 2302 movs r3, #2
8001c32: e00e b.n 8001c52 <HAL_PCD_EP_ClrStall+0xa0>
8001c34: 687b ldr r3, [r7, #4]
8001c36: 2201 movs r2, #1
8001c38: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
(void)USB_EPClearStall(hpcd->Instance, ep);
8001c3c: 687b ldr r3, [r7, #4]
8001c3e: 681b ldr r3, [r3, #0]
8001c40: 68f9 ldr r1, [r7, #12]
8001c42: 4618 mov r0, r3
8001c44: f003 fcf3 bl 800562e <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
8001c48: 687b ldr r3, [r7, #4]
8001c4a: 2200 movs r2, #0
8001c4c: f883 22a8 strb.w r2, [r3, #680] ; 0x2a8
return HAL_OK;
8001c50: 2300 movs r3, #0
}
8001c52: 4618 mov r0, r3
8001c54: 3710 adds r7, #16
8001c56: 46bd mov sp, r7
8001c58: bd80 pop {r7, pc}
08001c5a <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
8001c5a: b580 push {r7, lr}
8001c5c: b08e sub sp, #56 ; 0x38
8001c5e: af00 add r7, sp, #0
8001c60: 6078 str r0, [r7, #4]
PCD_EPTypeDef *ep;
uint16_t count, wIstr, wEPVal, TxByteNbre;
uint8_t epindex;
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8001c62: e2ec b.n 800223e <PCD_EP_ISR_Handler+0x5e4>
{
wIstr = hpcd->Instance->ISTR;
8001c64: 687b ldr r3, [r7, #4]
8001c66: 681b ldr r3, [r3, #0]
8001c68: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8001c6c: 85fb strh r3, [r7, #46] ; 0x2e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
8001c6e: 8dfb ldrh r3, [r7, #46] ; 0x2e
8001c70: b2db uxtb r3, r3
8001c72: f003 030f and.w r3, r3, #15
8001c76: f887 302d strb.w r3, [r7, #45] ; 0x2d
if (epindex == 0U)
8001c7a: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
8001c7e: 2b00 cmp r3, #0
8001c80: f040 8161 bne.w 8001f46 <PCD_EP_ISR_Handler+0x2ec>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
8001c84: 8dfb ldrh r3, [r7, #46] ; 0x2e
8001c86: f003 0310 and.w r3, r3, #16
8001c8a: 2b00 cmp r3, #0
8001c8c: d152 bne.n 8001d34 <PCD_EP_ISR_Handler+0xda>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8001c8e: 687b ldr r3, [r7, #4]
8001c90: 681b ldr r3, [r3, #0]
8001c92: 881b ldrh r3, [r3, #0]
8001c94: b29b uxth r3, r3
8001c96: f423 43e1 bic.w r3, r3, #28800 ; 0x7080
8001c9a: f023 0370 bic.w r3, r3, #112 ; 0x70
8001c9e: 81fb strh r3, [r7, #14]
8001ca0: 687b ldr r3, [r7, #4]
8001ca2: 681a ldr r2, [r3, #0]
8001ca4: 89fb ldrh r3, [r7, #14]
8001ca6: ea6f 4343 mvn.w r3, r3, lsl #17
8001caa: ea6f 4353 mvn.w r3, r3, lsr #17
8001cae: b29b uxth r3, r3
8001cb0: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
8001cb2: 687b ldr r3, [r7, #4]
8001cb4: 3328 adds r3, #40 ; 0x28
8001cb6: 627b str r3, [r7, #36] ; 0x24
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8001cb8: 687b ldr r3, [r7, #4]
8001cba: 681b ldr r3, [r3, #0]
8001cbc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8001cc0: b29b uxth r3, r3
8001cc2: 461a mov r2, r3
8001cc4: 6a7b ldr r3, [r7, #36] ; 0x24
8001cc6: 781b ldrb r3, [r3, #0]
8001cc8: 00db lsls r3, r3, #3
8001cca: 4413 add r3, r2
8001ccc: 3302 adds r3, #2
8001cce: 005b lsls r3, r3, #1
8001cd0: 687a ldr r2, [r7, #4]
8001cd2: 6812 ldr r2, [r2, #0]
8001cd4: 4413 add r3, r2
8001cd6: f503 6380 add.w r3, r3, #1024 ; 0x400
8001cda: 881b ldrh r3, [r3, #0]
8001cdc: f3c3 0209 ubfx r2, r3, #0, #10
8001ce0: 6a7b ldr r3, [r7, #36] ; 0x24
8001ce2: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
8001ce4: 6a7b ldr r3, [r7, #36] ; 0x24
8001ce6: 695a ldr r2, [r3, #20]
8001ce8: 6a7b ldr r3, [r7, #36] ; 0x24
8001cea: 69db ldr r3, [r3, #28]
8001cec: 441a add r2, r3
8001cee: 6a7b ldr r3, [r7, #36] ; 0x24
8001cf0: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
8001cf2: 2100 movs r1, #0
8001cf4: 6878 ldr r0, [r7, #4]
8001cf6: f005 ff0a bl 8007b0e <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
8001cfa: 687b ldr r3, [r7, #4]
8001cfc: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
8001d00: b2db uxtb r3, r3
8001d02: 2b00 cmp r3, #0
8001d04: f000 829b beq.w 800223e <PCD_EP_ISR_Handler+0x5e4>
8001d08: 6a7b ldr r3, [r7, #36] ; 0x24
8001d0a: 699b ldr r3, [r3, #24]
8001d0c: 2b00 cmp r3, #0
8001d0e: f040 8296 bne.w 800223e <PCD_EP_ISR_Handler+0x5e4>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
8001d12: 687b ldr r3, [r7, #4]
8001d14: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
8001d18: b2db uxtb r3, r3
8001d1a: f063 037f orn r3, r3, #127 ; 0x7f
8001d1e: b2da uxtb r2, r3
8001d20: 687b ldr r3, [r7, #4]
8001d22: 681b ldr r3, [r3, #0]
8001d24: b292 uxth r2, r2
8001d26: f8a3 204c strh.w r2, [r3, #76] ; 0x4c
hpcd->USB_Address = 0U;
8001d2a: 687b ldr r3, [r7, #4]
8001d2c: 2200 movs r2, #0
8001d2e: f883 2024 strb.w r2, [r3, #36] ; 0x24
8001d32: e284 b.n 800223e <PCD_EP_ISR_Handler+0x5e4>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
8001d34: 687b ldr r3, [r7, #4]
8001d36: f503 73b4 add.w r3, r3, #360 ; 0x168
8001d3a: 627b str r3, [r7, #36] ; 0x24
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
8001d3c: 687b ldr r3, [r7, #4]
8001d3e: 681b ldr r3, [r3, #0]
8001d40: 881b ldrh r3, [r3, #0]
8001d42: 857b strh r3, [r7, #42] ; 0x2a
if ((wEPVal & USB_EP_SETUP) != 0U)
8001d44: 8d7b ldrh r3, [r7, #42] ; 0x2a
8001d46: f403 6300 and.w r3, r3, #2048 ; 0x800
8001d4a: 2b00 cmp r3, #0
8001d4c: d034 beq.n 8001db8 <PCD_EP_ISR_Handler+0x15e>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8001d4e: 687b ldr r3, [r7, #4]
8001d50: 681b ldr r3, [r3, #0]
8001d52: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8001d56: b29b uxth r3, r3
8001d58: 461a mov r2, r3
8001d5a: 6a7b ldr r3, [r7, #36] ; 0x24
8001d5c: 781b ldrb r3, [r3, #0]
8001d5e: 00db lsls r3, r3, #3
8001d60: 4413 add r3, r2
8001d62: 3306 adds r3, #6
8001d64: 005b lsls r3, r3, #1
8001d66: 687a ldr r2, [r7, #4]
8001d68: 6812 ldr r2, [r2, #0]
8001d6a: 4413 add r3, r2
8001d6c: f503 6380 add.w r3, r3, #1024 ; 0x400
8001d70: 881b ldrh r3, [r3, #0]
8001d72: f3c3 0209 ubfx r2, r3, #0, #10
8001d76: 6a7b ldr r3, [r7, #36] ; 0x24
8001d78: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
8001d7a: 687b ldr r3, [r7, #4]
8001d7c: 6818 ldr r0, [r3, #0]
8001d7e: 687b ldr r3, [r7, #4]
8001d80: f503 712c add.w r1, r3, #688 ; 0x2b0
8001d84: 6a7b ldr r3, [r7, #36] ; 0x24
8001d86: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8001d88: 6a7b ldr r3, [r7, #36] ; 0x24
8001d8a: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
8001d8c: b29b uxth r3, r3
8001d8e: f003 fd81 bl 8005894 <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8001d92: 687b ldr r3, [r7, #4]
8001d94: 681b ldr r3, [r3, #0]
8001d96: 881b ldrh r3, [r3, #0]
8001d98: b29a uxth r2, r3
8001d9a: f640 738f movw r3, #3983 ; 0xf8f
8001d9e: 4013 ands r3, r2
8001da0: 823b strh r3, [r7, #16]
8001da2: 687b ldr r3, [r7, #4]
8001da4: 681b ldr r3, [r3, #0]
8001da6: 8a3a ldrh r2, [r7, #16]
8001da8: f042 0280 orr.w r2, r2, #128 ; 0x80
8001dac: b292 uxth r2, r2
8001dae: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
8001db0: 6878 ldr r0, [r7, #4]
8001db2: f005 fe7f bl 8007ab4 <HAL_PCD_SetupStageCallback>
8001db6: e242 b.n 800223e <PCD_EP_ISR_Handler+0x5e4>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
8001db8: f9b7 302a ldrsh.w r3, [r7, #42] ; 0x2a
8001dbc: 2b00 cmp r3, #0
8001dbe: f280 823e bge.w 800223e <PCD_EP_ISR_Handler+0x5e4>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8001dc2: 687b ldr r3, [r7, #4]
8001dc4: 681b ldr r3, [r3, #0]
8001dc6: 881b ldrh r3, [r3, #0]
8001dc8: b29a uxth r2, r3
8001dca: f640 738f movw r3, #3983 ; 0xf8f
8001dce: 4013 ands r3, r2
8001dd0: 83bb strh r3, [r7, #28]
8001dd2: 687b ldr r3, [r7, #4]
8001dd4: 681b ldr r3, [r3, #0]
8001dd6: 8bba ldrh r2, [r7, #28]
8001dd8: f042 0280 orr.w r2, r2, #128 ; 0x80
8001ddc: b292 uxth r2, r2
8001dde: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8001de0: 687b ldr r3, [r7, #4]
8001de2: 681b ldr r3, [r3, #0]
8001de4: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8001de8: b29b uxth r3, r3
8001dea: 461a mov r2, r3
8001dec: 6a7b ldr r3, [r7, #36] ; 0x24
8001dee: 781b ldrb r3, [r3, #0]
8001df0: 00db lsls r3, r3, #3
8001df2: 4413 add r3, r2
8001df4: 3306 adds r3, #6
8001df6: 005b lsls r3, r3, #1
8001df8: 687a ldr r2, [r7, #4]
8001dfa: 6812 ldr r2, [r2, #0]
8001dfc: 4413 add r3, r2
8001dfe: f503 6380 add.w r3, r3, #1024 ; 0x400
8001e02: 881b ldrh r3, [r3, #0]
8001e04: f3c3 0209 ubfx r2, r3, #0, #10
8001e08: 6a7b ldr r3, [r7, #36] ; 0x24
8001e0a: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
8001e0c: 6a7b ldr r3, [r7, #36] ; 0x24
8001e0e: 69db ldr r3, [r3, #28]
8001e10: 2b00 cmp r3, #0
8001e12: d019 beq.n 8001e48 <PCD_EP_ISR_Handler+0x1ee>
8001e14: 6a7b ldr r3, [r7, #36] ; 0x24
8001e16: 695b ldr r3, [r3, #20]
8001e18: 2b00 cmp r3, #0
8001e1a: d015 beq.n 8001e48 <PCD_EP_ISR_Handler+0x1ee>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8001e1c: 687b ldr r3, [r7, #4]
8001e1e: 6818 ldr r0, [r3, #0]
8001e20: 6a7b ldr r3, [r7, #36] ; 0x24
8001e22: 6959 ldr r1, [r3, #20]
8001e24: 6a7b ldr r3, [r7, #36] ; 0x24
8001e26: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8001e28: 6a7b ldr r3, [r7, #36] ; 0x24
8001e2a: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8001e2c: b29b uxth r3, r3
8001e2e: f003 fd31 bl 8005894 <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
8001e32: 6a7b ldr r3, [r7, #36] ; 0x24
8001e34: 695a ldr r2, [r3, #20]
8001e36: 6a7b ldr r3, [r7, #36] ; 0x24
8001e38: 69db ldr r3, [r3, #28]
8001e3a: 441a add r2, r3
8001e3c: 6a7b ldr r3, [r7, #36] ; 0x24
8001e3e: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
8001e40: 2100 movs r1, #0
8001e42: 6878 ldr r0, [r7, #4]
8001e44: f005 fe48 bl 8007ad8 <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
if ((PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0) & USB_EP_SETUP) == 0U)
8001e48: 687b ldr r3, [r7, #4]
8001e4a: 681b ldr r3, [r3, #0]
8001e4c: 881b ldrh r3, [r3, #0]
8001e4e: b29b uxth r3, r3
8001e50: f403 6300 and.w r3, r3, #2048 ; 0x800
8001e54: 2b00 cmp r3, #0
8001e56: f040 81f2 bne.w 800223e <PCD_EP_ISR_Handler+0x5e4>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
8001e5a: 687b ldr r3, [r7, #4]
8001e5c: 681b ldr r3, [r3, #0]
8001e5e: 61bb str r3, [r7, #24]
8001e60: 687b ldr r3, [r7, #4]
8001e62: 681b ldr r3, [r3, #0]
8001e64: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8001e68: b29b uxth r3, r3
8001e6a: 461a mov r2, r3
8001e6c: 69bb ldr r3, [r7, #24]
8001e6e: 4413 add r3, r2
8001e70: 61bb str r3, [r7, #24]
8001e72: 69bb ldr r3, [r7, #24]
8001e74: f203 430c addw r3, r3, #1036 ; 0x40c
8001e78: 617b str r3, [r7, #20]
8001e7a: 6a7b ldr r3, [r7, #36] ; 0x24
8001e7c: 691b ldr r3, [r3, #16]
8001e7e: 2b00 cmp r3, #0
8001e80: d112 bne.n 8001ea8 <PCD_EP_ISR_Handler+0x24e>
8001e82: 697b ldr r3, [r7, #20]
8001e84: 881b ldrh r3, [r3, #0]
8001e86: b29b uxth r3, r3
8001e88: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8001e8c: b29a uxth r2, r3
8001e8e: 697b ldr r3, [r7, #20]
8001e90: 801a strh r2, [r3, #0]
8001e92: 697b ldr r3, [r7, #20]
8001e94: 881b ldrh r3, [r3, #0]
8001e96: b29b uxth r3, r3
8001e98: ea6f 4343 mvn.w r3, r3, lsl #17
8001e9c: ea6f 4353 mvn.w r3, r3, lsr #17
8001ea0: b29a uxth r2, r3
8001ea2: 697b ldr r3, [r7, #20]
8001ea4: 801a strh r2, [r3, #0]
8001ea6: e02f b.n 8001f08 <PCD_EP_ISR_Handler+0x2ae>
8001ea8: 6a7b ldr r3, [r7, #36] ; 0x24
8001eaa: 691b ldr r3, [r3, #16]
8001eac: 2b3e cmp r3, #62 ; 0x3e
8001eae: d813 bhi.n 8001ed8 <PCD_EP_ISR_Handler+0x27e>
8001eb0: 6a7b ldr r3, [r7, #36] ; 0x24
8001eb2: 691b ldr r3, [r3, #16]
8001eb4: 085b lsrs r3, r3, #1
8001eb6: 633b str r3, [r7, #48] ; 0x30
8001eb8: 6a7b ldr r3, [r7, #36] ; 0x24
8001eba: 691b ldr r3, [r3, #16]
8001ebc: f003 0301 and.w r3, r3, #1
8001ec0: 2b00 cmp r3, #0
8001ec2: d002 beq.n 8001eca <PCD_EP_ISR_Handler+0x270>
8001ec4: 6b3b ldr r3, [r7, #48] ; 0x30
8001ec6: 3301 adds r3, #1
8001ec8: 633b str r3, [r7, #48] ; 0x30
8001eca: 6b3b ldr r3, [r7, #48] ; 0x30
8001ecc: b29b uxth r3, r3
8001ece: 029b lsls r3, r3, #10
8001ed0: b29a uxth r2, r3
8001ed2: 697b ldr r3, [r7, #20]
8001ed4: 801a strh r2, [r3, #0]
8001ed6: e017 b.n 8001f08 <PCD_EP_ISR_Handler+0x2ae>
8001ed8: 6a7b ldr r3, [r7, #36] ; 0x24
8001eda: 691b ldr r3, [r3, #16]
8001edc: 095b lsrs r3, r3, #5
8001ede: 633b str r3, [r7, #48] ; 0x30
8001ee0: 6a7b ldr r3, [r7, #36] ; 0x24
8001ee2: 691b ldr r3, [r3, #16]
8001ee4: f003 031f and.w r3, r3, #31
8001ee8: 2b00 cmp r3, #0
8001eea: d102 bne.n 8001ef2 <PCD_EP_ISR_Handler+0x298>
8001eec: 6b3b ldr r3, [r7, #48] ; 0x30
8001eee: 3b01 subs r3, #1
8001ef0: 633b str r3, [r7, #48] ; 0x30
8001ef2: 6b3b ldr r3, [r7, #48] ; 0x30
8001ef4: b29b uxth r3, r3
8001ef6: 029b lsls r3, r3, #10
8001ef8: b29b uxth r3, r3
8001efa: ea6f 4343 mvn.w r3, r3, lsl #17
8001efe: ea6f 4353 mvn.w r3, r3, lsr #17
8001f02: b29a uxth r2, r3
8001f04: 697b ldr r3, [r7, #20]
8001f06: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
8001f08: 687b ldr r3, [r7, #4]
8001f0a: 681b ldr r3, [r3, #0]
8001f0c: 881b ldrh r3, [r3, #0]
8001f0e: b29b uxth r3, r3
8001f10: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8001f14: f023 0370 bic.w r3, r3, #112 ; 0x70
8001f18: 827b strh r3, [r7, #18]
8001f1a: 8a7b ldrh r3, [r7, #18]
8001f1c: f483 5380 eor.w r3, r3, #4096 ; 0x1000
8001f20: 827b strh r3, [r7, #18]
8001f22: 8a7b ldrh r3, [r7, #18]
8001f24: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8001f28: 827b strh r3, [r7, #18]
8001f2a: 687b ldr r3, [r7, #4]
8001f2c: 681a ldr r2, [r3, #0]
8001f2e: 8a7b ldrh r3, [r7, #18]
8001f30: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8001f34: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8001f38: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8001f3c: f043 0380 orr.w r3, r3, #128 ; 0x80
8001f40: b29b uxth r3, r3
8001f42: 8013 strh r3, [r2, #0]
8001f44: e17b b.n 800223e <PCD_EP_ISR_Handler+0x5e4>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
8001f46: 687b ldr r3, [r7, #4]
8001f48: 681b ldr r3, [r3, #0]
8001f4a: 461a mov r2, r3
8001f4c: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
8001f50: 009b lsls r3, r3, #2
8001f52: 4413 add r3, r2
8001f54: 881b ldrh r3, [r3, #0]
8001f56: 857b strh r3, [r7, #42] ; 0x2a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
8001f58: f9b7 302a ldrsh.w r3, [r7, #42] ; 0x2a
8001f5c: 2b00 cmp r3, #0
8001f5e: f280 80ea bge.w 8002136 <PCD_EP_ISR_Handler+0x4dc>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
8001f62: 687b ldr r3, [r7, #4]
8001f64: 681b ldr r3, [r3, #0]
8001f66: 461a mov r2, r3
8001f68: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
8001f6c: 009b lsls r3, r3, #2
8001f6e: 4413 add r3, r2
8001f70: 881b ldrh r3, [r3, #0]
8001f72: b29a uxth r2, r3
8001f74: f640 738f movw r3, #3983 ; 0xf8f
8001f78: 4013 ands r3, r2
8001f7a: 853b strh r3, [r7, #40] ; 0x28
8001f7c: 687b ldr r3, [r7, #4]
8001f7e: 681b ldr r3, [r3, #0]
8001f80: 461a mov r2, r3
8001f82: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
8001f86: 009b lsls r3, r3, #2
8001f88: 4413 add r3, r2
8001f8a: 8d3a ldrh r2, [r7, #40] ; 0x28
8001f8c: f042 0280 orr.w r2, r2, #128 ; 0x80
8001f90: b292 uxth r2, r2
8001f92: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
8001f94: f897 202d ldrb.w r2, [r7, #45] ; 0x2d
8001f98: 4613 mov r3, r2
8001f9a: 009b lsls r3, r3, #2
8001f9c: 4413 add r3, r2
8001f9e: 00db lsls r3, r3, #3
8001fa0: f503 73b4 add.w r3, r3, #360 ; 0x168
8001fa4: 687a ldr r2, [r7, #4]
8001fa6: 4413 add r3, r2
8001fa8: 627b str r3, [r7, #36] ; 0x24
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
8001faa: 6a7b ldr r3, [r7, #36] ; 0x24
8001fac: 7b1b ldrb r3, [r3, #12]
8001fae: 2b00 cmp r3, #0
8001fb0: d122 bne.n 8001ff8 <PCD_EP_ISR_Handler+0x39e>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8001fb2: 687b ldr r3, [r7, #4]
8001fb4: 681b ldr r3, [r3, #0]
8001fb6: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8001fba: b29b uxth r3, r3
8001fbc: 461a mov r2, r3
8001fbe: 6a7b ldr r3, [r7, #36] ; 0x24
8001fc0: 781b ldrb r3, [r3, #0]
8001fc2: 00db lsls r3, r3, #3
8001fc4: 4413 add r3, r2
8001fc6: 3306 adds r3, #6
8001fc8: 005b lsls r3, r3, #1
8001fca: 687a ldr r2, [r7, #4]
8001fcc: 6812 ldr r2, [r2, #0]
8001fce: 4413 add r3, r2
8001fd0: f503 6380 add.w r3, r3, #1024 ; 0x400
8001fd4: 881b ldrh r3, [r3, #0]
8001fd6: f3c3 0309 ubfx r3, r3, #0, #10
8001fda: 86fb strh r3, [r7, #54] ; 0x36
if (count != 0U)
8001fdc: 8efb ldrh r3, [r7, #54] ; 0x36
8001fde: 2b00 cmp r3, #0
8001fe0: f000 8087 beq.w 80020f2 <PCD_EP_ISR_Handler+0x498>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
8001fe4: 687b ldr r3, [r7, #4]
8001fe6: 6818 ldr r0, [r3, #0]
8001fe8: 6a7b ldr r3, [r7, #36] ; 0x24
8001fea: 6959 ldr r1, [r3, #20]
8001fec: 6a7b ldr r3, [r7, #36] ; 0x24
8001fee: 88da ldrh r2, [r3, #6]
8001ff0: 8efb ldrh r3, [r7, #54] ; 0x36
8001ff2: f003 fc4f bl 8005894 <USB_ReadPMA>
8001ff6: e07c b.n 80020f2 <PCD_EP_ISR_Handler+0x498>
}
}
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
8001ff8: 6a7b ldr r3, [r7, #36] ; 0x24
8001ffa: 78db ldrb r3, [r3, #3]
8001ffc: 2b02 cmp r3, #2
8001ffe: d108 bne.n 8002012 <PCD_EP_ISR_Handler+0x3b8>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
8002000: 8d7b ldrh r3, [r7, #42] ; 0x2a
8002002: 461a mov r2, r3
8002004: 6a79 ldr r1, [r7, #36] ; 0x24
8002006: 6878 ldr r0, [r7, #4]
8002008: f000 f927 bl 800225a <HAL_PCD_EP_DB_Receive>
800200c: 4603 mov r3, r0
800200e: 86fb strh r3, [r7, #54] ; 0x36
8002010: e06f b.n 80020f2 <PCD_EP_ISR_Handler+0x498>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
8002012: 687b ldr r3, [r7, #4]
8002014: 681b ldr r3, [r3, #0]
8002016: 461a mov r2, r3
8002018: 6a7b ldr r3, [r7, #36] ; 0x24
800201a: 781b ldrb r3, [r3, #0]
800201c: 009b lsls r3, r3, #2
800201e: 4413 add r3, r2
8002020: 881b ldrh r3, [r3, #0]
8002022: b29b uxth r3, r3
8002024: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8002028: f023 0370 bic.w r3, r3, #112 ; 0x70
800202c: 847b strh r3, [r7, #34] ; 0x22
800202e: 687b ldr r3, [r7, #4]
8002030: 681b ldr r3, [r3, #0]
8002032: 461a mov r2, r3
8002034: 6a7b ldr r3, [r7, #36] ; 0x24
8002036: 781b ldrb r3, [r3, #0]
8002038: 009b lsls r3, r3, #2
800203a: 441a add r2, r3
800203c: 8c7b ldrh r3, [r7, #34] ; 0x22
800203e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002042: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002046: f443 4300 orr.w r3, r3, #32768 ; 0x8000
800204a: f043 03c0 orr.w r3, r3, #192 ; 0xc0
800204e: b29b uxth r3, r3
8002050: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
8002052: 687b ldr r3, [r7, #4]
8002054: 681b ldr r3, [r3, #0]
8002056: 461a mov r2, r3
8002058: 6a7b ldr r3, [r7, #36] ; 0x24
800205a: 781b ldrb r3, [r3, #0]
800205c: 009b lsls r3, r3, #2
800205e: 4413 add r3, r2
8002060: 881b ldrh r3, [r3, #0]
8002062: b29b uxth r3, r3
8002064: f403 4380 and.w r3, r3, #16384 ; 0x4000
8002068: 2b00 cmp r3, #0
800206a: d021 beq.n 80020b0 <PCD_EP_ISR_Handler+0x456>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
800206c: 687b ldr r3, [r7, #4]
800206e: 681b ldr r3, [r3, #0]
8002070: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002074: b29b uxth r3, r3
8002076: 461a mov r2, r3
8002078: 6a7b ldr r3, [r7, #36] ; 0x24
800207a: 781b ldrb r3, [r3, #0]
800207c: 00db lsls r3, r3, #3
800207e: 4413 add r3, r2
8002080: 3302 adds r3, #2
8002082: 005b lsls r3, r3, #1
8002084: 687a ldr r2, [r7, #4]
8002086: 6812 ldr r2, [r2, #0]
8002088: 4413 add r3, r2
800208a: f503 6380 add.w r3, r3, #1024 ; 0x400
800208e: 881b ldrh r3, [r3, #0]
8002090: f3c3 0309 ubfx r3, r3, #0, #10
8002094: 86fb strh r3, [r7, #54] ; 0x36
if (count != 0U)
8002096: 8efb ldrh r3, [r7, #54] ; 0x36
8002098: 2b00 cmp r3, #0
800209a: d02a beq.n 80020f2 <PCD_EP_ISR_Handler+0x498>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
800209c: 687b ldr r3, [r7, #4]
800209e: 6818 ldr r0, [r3, #0]
80020a0: 6a7b ldr r3, [r7, #36] ; 0x24
80020a2: 6959 ldr r1, [r3, #20]
80020a4: 6a7b ldr r3, [r7, #36] ; 0x24
80020a6: 891a ldrh r2, [r3, #8]
80020a8: 8efb ldrh r3, [r7, #54] ; 0x36
80020aa: f003 fbf3 bl 8005894 <USB_ReadPMA>
80020ae: e020 b.n 80020f2 <PCD_EP_ISR_Handler+0x498>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80020b0: 687b ldr r3, [r7, #4]
80020b2: 681b ldr r3, [r3, #0]
80020b4: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80020b8: b29b uxth r3, r3
80020ba: 461a mov r2, r3
80020bc: 6a7b ldr r3, [r7, #36] ; 0x24
80020be: 781b ldrb r3, [r3, #0]
80020c0: 00db lsls r3, r3, #3
80020c2: 4413 add r3, r2
80020c4: 3306 adds r3, #6
80020c6: 005b lsls r3, r3, #1
80020c8: 687a ldr r2, [r7, #4]
80020ca: 6812 ldr r2, [r2, #0]
80020cc: 4413 add r3, r2
80020ce: f503 6380 add.w r3, r3, #1024 ; 0x400
80020d2: 881b ldrh r3, [r3, #0]
80020d4: f3c3 0309 ubfx r3, r3, #0, #10
80020d8: 86fb strh r3, [r7, #54] ; 0x36
if (count != 0U)
80020da: 8efb ldrh r3, [r7, #54] ; 0x36
80020dc: 2b00 cmp r3, #0
80020de: d008 beq.n 80020f2 <PCD_EP_ISR_Handler+0x498>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
80020e0: 687b ldr r3, [r7, #4]
80020e2: 6818 ldr r0, [r3, #0]
80020e4: 6a7b ldr r3, [r7, #36] ; 0x24
80020e6: 6959 ldr r1, [r3, #20]
80020e8: 6a7b ldr r3, [r7, #36] ; 0x24
80020ea: 895a ldrh r2, [r3, #10]
80020ec: 8efb ldrh r3, [r7, #54] ; 0x36
80020ee: f003 fbd1 bl 8005894 <USB_ReadPMA>
}
}
}
}
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
80020f2: 6a7b ldr r3, [r7, #36] ; 0x24
80020f4: 69da ldr r2, [r3, #28]
80020f6: 8efb ldrh r3, [r7, #54] ; 0x36
80020f8: 441a add r2, r3
80020fa: 6a7b ldr r3, [r7, #36] ; 0x24
80020fc: 61da str r2, [r3, #28]
ep->xfer_buff += count;
80020fe: 6a7b ldr r3, [r7, #36] ; 0x24
8002100: 695a ldr r2, [r3, #20]
8002102: 8efb ldrh r3, [r7, #54] ; 0x36
8002104: 441a add r2, r3
8002106: 6a7b ldr r3, [r7, #36] ; 0x24
8002108: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
800210a: 6a7b ldr r3, [r7, #36] ; 0x24
800210c: 699b ldr r3, [r3, #24]
800210e: 2b00 cmp r3, #0
8002110: d004 beq.n 800211c <PCD_EP_ISR_Handler+0x4c2>
8002112: 8efa ldrh r2, [r7, #54] ; 0x36
8002114: 6a7b ldr r3, [r7, #36] ; 0x24
8002116: 691b ldr r3, [r3, #16]
8002118: 429a cmp r2, r3
800211a: d206 bcs.n 800212a <PCD_EP_ISR_Handler+0x4d0>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
800211c: 6a7b ldr r3, [r7, #36] ; 0x24
800211e: 781b ldrb r3, [r3, #0]
8002120: 4619 mov r1, r3
8002122: 6878 ldr r0, [r7, #4]
8002124: f005 fcd8 bl 8007ad8 <HAL_PCD_DataOutStageCallback>
8002128: e005 b.n 8002136 <PCD_EP_ISR_Handler+0x4dc>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void) USB_EPStartXfer(hpcd->Instance, ep);
800212a: 687b ldr r3, [r7, #4]
800212c: 681b ldr r3, [r3, #0]
800212e: 6a79 ldr r1, [r7, #36] ; 0x24
8002130: 4618 mov r0, r3
8002132: f001 ff35 bl 8003fa0 <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
8002136: 8d7b ldrh r3, [r7, #42] ; 0x2a
8002138: f003 0380 and.w r3, r3, #128 ; 0x80
800213c: 2b00 cmp r3, #0
800213e: d07e beq.n 800223e <PCD_EP_ISR_Handler+0x5e4>
{
ep = &hpcd->IN_ep[epindex];
8002140: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
8002144: 1c5a adds r2, r3, #1
8002146: 4613 mov r3, r2
8002148: 009b lsls r3, r3, #2
800214a: 4413 add r3, r2
800214c: 00db lsls r3, r3, #3
800214e: 687a ldr r2, [r7, #4]
8002150: 4413 add r3, r2
8002152: 627b str r3, [r7, #36] ; 0x24
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
8002154: 687b ldr r3, [r7, #4]
8002156: 681b ldr r3, [r3, #0]
8002158: 461a mov r2, r3
800215a: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
800215e: 009b lsls r3, r3, #2
8002160: 4413 add r3, r2
8002162: 881b ldrh r3, [r3, #0]
8002164: b29b uxth r3, r3
8002166: f423 43e1 bic.w r3, r3, #28800 ; 0x7080
800216a: f023 0370 bic.w r3, r3, #112 ; 0x70
800216e: 843b strh r3, [r7, #32]
8002170: 687b ldr r3, [r7, #4]
8002172: 681b ldr r3, [r3, #0]
8002174: 461a mov r2, r3
8002176: f897 302d ldrb.w r3, [r7, #45] ; 0x2d
800217a: 009b lsls r3, r3, #2
800217c: 441a add r2, r3
800217e: 8c3b ldrh r3, [r7, #32]
8002180: ea6f 4343 mvn.w r3, r3, lsl #17
8002184: ea6f 4353 mvn.w r3, r3, lsr #17
8002188: b29b uxth r3, r3
800218a: 8013 strh r3, [r2, #0]
/* Manage all non bulk/isoc transaction Bulk Single Buffer Transaction */
if ((ep->type == EP_TYPE_INTR) || (ep->type == EP_TYPE_CTRL) ||
800218c: 6a7b ldr r3, [r7, #36] ; 0x24
800218e: 78db ldrb r3, [r3, #3]
8002190: 2b03 cmp r3, #3
8002192: d00c beq.n 80021ae <PCD_EP_ISR_Handler+0x554>
8002194: 6a7b ldr r3, [r7, #36] ; 0x24
8002196: 78db ldrb r3, [r3, #3]
8002198: 2b00 cmp r3, #0
800219a: d008 beq.n 80021ae <PCD_EP_ISR_Handler+0x554>
((ep->type == EP_TYPE_BULK) && ((wEPVal & USB_EP_KIND) == 0U)))
800219c: 6a7b ldr r3, [r7, #36] ; 0x24
800219e: 78db ldrb r3, [r3, #3]
if ((ep->type == EP_TYPE_INTR) || (ep->type == EP_TYPE_CTRL) ||
80021a0: 2b02 cmp r3, #2
80021a2: d146 bne.n 8002232 <PCD_EP_ISR_Handler+0x5d8>
((ep->type == EP_TYPE_BULK) && ((wEPVal & USB_EP_KIND) == 0U)))
80021a4: 8d7b ldrh r3, [r7, #42] ; 0x2a
80021a6: f403 7380 and.w r3, r3, #256 ; 0x100
80021aa: 2b00 cmp r3, #0
80021ac: d141 bne.n 8002232 <PCD_EP_ISR_Handler+0x5d8>
{
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
80021ae: 687b ldr r3, [r7, #4]
80021b0: 681b ldr r3, [r3, #0]
80021b2: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80021b6: b29b uxth r3, r3
80021b8: 461a mov r2, r3
80021ba: 6a7b ldr r3, [r7, #36] ; 0x24
80021bc: 781b ldrb r3, [r3, #0]
80021be: 00db lsls r3, r3, #3
80021c0: 4413 add r3, r2
80021c2: 3302 adds r3, #2
80021c4: 005b lsls r3, r3, #1
80021c6: 687a ldr r2, [r7, #4]
80021c8: 6812 ldr r2, [r2, #0]
80021ca: 4413 add r3, r2
80021cc: f503 6380 add.w r3, r3, #1024 ; 0x400
80021d0: 881b ldrh r3, [r3, #0]
80021d2: f3c3 0309 ubfx r3, r3, #0, #10
80021d6: 83fb strh r3, [r7, #30]
if (ep->xfer_len > TxByteNbre)
80021d8: 6a7b ldr r3, [r7, #36] ; 0x24
80021da: 699a ldr r2, [r3, #24]
80021dc: 8bfb ldrh r3, [r7, #30]
80021de: 429a cmp r2, r3
80021e0: d906 bls.n 80021f0 <PCD_EP_ISR_Handler+0x596>
{
ep->xfer_len -= TxByteNbre;
80021e2: 6a7b ldr r3, [r7, #36] ; 0x24
80021e4: 699a ldr r2, [r3, #24]
80021e6: 8bfb ldrh r3, [r7, #30]
80021e8: 1ad2 subs r2, r2, r3
80021ea: 6a7b ldr r3, [r7, #36] ; 0x24
80021ec: 619a str r2, [r3, #24]
80021ee: e002 b.n 80021f6 <PCD_EP_ISR_Handler+0x59c>
}
else
{
ep->xfer_len = 0U;
80021f0: 6a7b ldr r3, [r7, #36] ; 0x24
80021f2: 2200 movs r2, #0
80021f4: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
80021f6: 6a7b ldr r3, [r7, #36] ; 0x24
80021f8: 699b ldr r3, [r3, #24]
80021fa: 2b00 cmp r3, #0
80021fc: d106 bne.n 800220c <PCD_EP_ISR_Handler+0x5b2>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
80021fe: 6a7b ldr r3, [r7, #36] ; 0x24
8002200: 781b ldrb r3, [r3, #0]
8002202: 4619 mov r1, r3
8002204: 6878 ldr r0, [r7, #4]
8002206: f005 fc82 bl 8007b0e <HAL_PCD_DataInStageCallback>
800220a: e018 b.n 800223e <PCD_EP_ISR_Handler+0x5e4>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxByteNbre;
800220c: 6a7b ldr r3, [r7, #36] ; 0x24
800220e: 695a ldr r2, [r3, #20]
8002210: 8bfb ldrh r3, [r7, #30]
8002212: 441a add r2, r3
8002214: 6a7b ldr r3, [r7, #36] ; 0x24
8002216: 615a str r2, [r3, #20]
ep->xfer_count += TxByteNbre;
8002218: 6a7b ldr r3, [r7, #36] ; 0x24
800221a: 69da ldr r2, [r3, #28]
800221c: 8bfb ldrh r3, [r7, #30]
800221e: 441a add r2, r3
8002220: 6a7b ldr r3, [r7, #36] ; 0x24
8002222: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8002224: 687b ldr r3, [r7, #4]
8002226: 681b ldr r3, [r3, #0]
8002228: 6a79 ldr r1, [r7, #36] ; 0x24
800222a: 4618 mov r0, r3
800222c: f001 feb8 bl 8003fa0 <USB_EPStartXfer>
if (ep->xfer_len == 0U)
8002230: e005 b.n 800223e <PCD_EP_ISR_Handler+0x5e4>
}
}
/* Double Buffer Iso/bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
8002232: 8d7b ldrh r3, [r7, #42] ; 0x2a
8002234: 461a mov r2, r3
8002236: 6a79 ldr r1, [r7, #36] ; 0x24
8002238: 6878 ldr r0, [r7, #4]
800223a: f000 f91b bl 8002474 <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
800223e: 687b ldr r3, [r7, #4]
8002240: 681b ldr r3, [r3, #0]
8002242: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
8002246: b29b uxth r3, r3
8002248: b21b sxth r3, r3
800224a: 2b00 cmp r3, #0
800224c: f6ff ad0a blt.w 8001c64 <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
8002250: 2300 movs r3, #0
}
8002252: 4618 mov r0, r3
8002254: 3738 adds r7, #56 ; 0x38
8002256: 46bd mov sp, r7
8002258: bd80 pop {r7, pc}
0800225a <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
800225a: b580 push {r7, lr}
800225c: b088 sub sp, #32
800225e: af00 add r7, sp, #0
8002260: 60f8 str r0, [r7, #12]
8002262: 60b9 str r1, [r7, #8]
8002264: 4613 mov r3, r2
8002266: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8002268: 88fb ldrh r3, [r7, #6]
800226a: f403 4380 and.w r3, r3, #16384 ; 0x4000
800226e: 2b00 cmp r3, #0
8002270: d07e beq.n 8002370 <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8002272: 68fb ldr r3, [r7, #12]
8002274: 681b ldr r3, [r3, #0]
8002276: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800227a: b29b uxth r3, r3
800227c: 461a mov r2, r3
800227e: 68bb ldr r3, [r7, #8]
8002280: 781b ldrb r3, [r3, #0]
8002282: 00db lsls r3, r3, #3
8002284: 4413 add r3, r2
8002286: 3302 adds r3, #2
8002288: 005b lsls r3, r3, #1
800228a: 68fa ldr r2, [r7, #12]
800228c: 6812 ldr r2, [r2, #0]
800228e: 4413 add r3, r2
8002290: f503 6380 add.w r3, r3, #1024 ; 0x400
8002294: 881b ldrh r3, [r3, #0]
8002296: f3c3 0309 ubfx r3, r3, #0, #10
800229a: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
800229c: 68bb ldr r3, [r7, #8]
800229e: 699a ldr r2, [r3, #24]
80022a0: 8b7b ldrh r3, [r7, #26]
80022a2: 429a cmp r2, r3
80022a4: d306 bcc.n 80022b4 <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
80022a6: 68bb ldr r3, [r7, #8]
80022a8: 699a ldr r2, [r3, #24]
80022aa: 8b7b ldrh r3, [r7, #26]
80022ac: 1ad2 subs r2, r2, r3
80022ae: 68bb ldr r3, [r7, #8]
80022b0: 619a str r2, [r3, #24]
80022b2: e002 b.n 80022ba <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
80022b4: 68bb ldr r3, [r7, #8]
80022b6: 2200 movs r2, #0
80022b8: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
80022ba: 68bb ldr r3, [r7, #8]
80022bc: 699b ldr r3, [r3, #24]
80022be: 2b00 cmp r3, #0
80022c0: d123 bne.n 800230a <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
80022c2: 68fb ldr r3, [r7, #12]
80022c4: 681b ldr r3, [r3, #0]
80022c6: 461a mov r2, r3
80022c8: 68bb ldr r3, [r7, #8]
80022ca: 781b ldrb r3, [r3, #0]
80022cc: 009b lsls r3, r3, #2
80022ce: 4413 add r3, r2
80022d0: 881b ldrh r3, [r3, #0]
80022d2: b29b uxth r3, r3
80022d4: f423 4380 bic.w r3, r3, #16384 ; 0x4000
80022d8: f023 0370 bic.w r3, r3, #112 ; 0x70
80022dc: 833b strh r3, [r7, #24]
80022de: 8b3b ldrh r3, [r7, #24]
80022e0: f483 5300 eor.w r3, r3, #8192 ; 0x2000
80022e4: 833b strh r3, [r7, #24]
80022e6: 68fb ldr r3, [r7, #12]
80022e8: 681b ldr r3, [r3, #0]
80022ea: 461a mov r2, r3
80022ec: 68bb ldr r3, [r7, #8]
80022ee: 781b ldrb r3, [r3, #0]
80022f0: 009b lsls r3, r3, #2
80022f2: 441a add r2, r3
80022f4: 8b3b ldrh r3, [r7, #24]
80022f6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80022fa: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80022fe: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8002302: f043 0380 orr.w r3, r3, #128 ; 0x80
8002306: b29b uxth r3, r3
8002308: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked sate which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
800230a: 88fb ldrh r3, [r7, #6]
800230c: f003 0340 and.w r3, r3, #64 ; 0x40
8002310: 2b00 cmp r3, #0
8002312: d01f beq.n 8002354 <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
8002314: 68fb ldr r3, [r7, #12]
8002316: 681b ldr r3, [r3, #0]
8002318: 461a mov r2, r3
800231a: 68bb ldr r3, [r7, #8]
800231c: 781b ldrb r3, [r3, #0]
800231e: 009b lsls r3, r3, #2
8002320: 4413 add r3, r2
8002322: 881b ldrh r3, [r3, #0]
8002324: b29b uxth r3, r3
8002326: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800232a: f023 0370 bic.w r3, r3, #112 ; 0x70
800232e: 82fb strh r3, [r7, #22]
8002330: 68fb ldr r3, [r7, #12]
8002332: 681b ldr r3, [r3, #0]
8002334: 461a mov r2, r3
8002336: 68bb ldr r3, [r7, #8]
8002338: 781b ldrb r3, [r3, #0]
800233a: 009b lsls r3, r3, #2
800233c: 441a add r2, r3
800233e: 8afb ldrh r3, [r7, #22]
8002340: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002344: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002348: f443 4300 orr.w r3, r3, #32768 ; 0x8000
800234c: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8002350: b29b uxth r3, r3
8002352: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8002354: 8b7b ldrh r3, [r7, #26]
8002356: 2b00 cmp r3, #0
8002358: f000 8087 beq.w 800246a <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
800235c: 68fb ldr r3, [r7, #12]
800235e: 6818 ldr r0, [r3, #0]
8002360: 68bb ldr r3, [r7, #8]
8002362: 6959 ldr r1, [r3, #20]
8002364: 68bb ldr r3, [r7, #8]
8002366: 891a ldrh r2, [r3, #8]
8002368: 8b7b ldrh r3, [r7, #26]
800236a: f003 fa93 bl 8005894 <USB_ReadPMA>
800236e: e07c b.n 800246a <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8002370: 68fb ldr r3, [r7, #12]
8002372: 681b ldr r3, [r3, #0]
8002374: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002378: b29b uxth r3, r3
800237a: 461a mov r2, r3
800237c: 68bb ldr r3, [r7, #8]
800237e: 781b ldrb r3, [r3, #0]
8002380: 00db lsls r3, r3, #3
8002382: 4413 add r3, r2
8002384: 3306 adds r3, #6
8002386: 005b lsls r3, r3, #1
8002388: 68fa ldr r2, [r7, #12]
800238a: 6812 ldr r2, [r2, #0]
800238c: 4413 add r3, r2
800238e: f503 6380 add.w r3, r3, #1024 ; 0x400
8002392: 881b ldrh r3, [r3, #0]
8002394: f3c3 0309 ubfx r3, r3, #0, #10
8002398: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
800239a: 68bb ldr r3, [r7, #8]
800239c: 699a ldr r2, [r3, #24]
800239e: 8b7b ldrh r3, [r7, #26]
80023a0: 429a cmp r2, r3
80023a2: d306 bcc.n 80023b2 <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
80023a4: 68bb ldr r3, [r7, #8]
80023a6: 699a ldr r2, [r3, #24]
80023a8: 8b7b ldrh r3, [r7, #26]
80023aa: 1ad2 subs r2, r2, r3
80023ac: 68bb ldr r3, [r7, #8]
80023ae: 619a str r2, [r3, #24]
80023b0: e002 b.n 80023b8 <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
80023b2: 68bb ldr r3, [r7, #8]
80023b4: 2200 movs r2, #0
80023b6: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
80023b8: 68bb ldr r3, [r7, #8]
80023ba: 699b ldr r3, [r3, #24]
80023bc: 2b00 cmp r3, #0
80023be: d123 bne.n 8002408 <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
80023c0: 68fb ldr r3, [r7, #12]
80023c2: 681b ldr r3, [r3, #0]
80023c4: 461a mov r2, r3
80023c6: 68bb ldr r3, [r7, #8]
80023c8: 781b ldrb r3, [r3, #0]
80023ca: 009b lsls r3, r3, #2
80023cc: 4413 add r3, r2
80023ce: 881b ldrh r3, [r3, #0]
80023d0: b29b uxth r3, r3
80023d2: f423 4380 bic.w r3, r3, #16384 ; 0x4000
80023d6: f023 0370 bic.w r3, r3, #112 ; 0x70
80023da: 83fb strh r3, [r7, #30]
80023dc: 8bfb ldrh r3, [r7, #30]
80023de: f483 5300 eor.w r3, r3, #8192 ; 0x2000
80023e2: 83fb strh r3, [r7, #30]
80023e4: 68fb ldr r3, [r7, #12]
80023e6: 681b ldr r3, [r3, #0]
80023e8: 461a mov r2, r3
80023ea: 68bb ldr r3, [r7, #8]
80023ec: 781b ldrb r3, [r3, #0]
80023ee: 009b lsls r3, r3, #2
80023f0: 441a add r2, r3
80023f2: 8bfb ldrh r3, [r7, #30]
80023f4: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80023f8: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80023fc: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8002400: f043 0380 orr.w r3, r3, #128 ; 0x80
8002404: b29b uxth r3, r3
8002406: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
8002408: 88fb ldrh r3, [r7, #6]
800240a: f003 0340 and.w r3, r3, #64 ; 0x40
800240e: 2b00 cmp r3, #0
8002410: d11f bne.n 8002452 <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U);
8002412: 68fb ldr r3, [r7, #12]
8002414: 681b ldr r3, [r3, #0]
8002416: 461a mov r2, r3
8002418: 68bb ldr r3, [r7, #8]
800241a: 781b ldrb r3, [r3, #0]
800241c: 009b lsls r3, r3, #2
800241e: 4413 add r3, r2
8002420: 881b ldrh r3, [r3, #0]
8002422: b29b uxth r3, r3
8002424: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8002428: f023 0370 bic.w r3, r3, #112 ; 0x70
800242c: 83bb strh r3, [r7, #28]
800242e: 68fb ldr r3, [r7, #12]
8002430: 681b ldr r3, [r3, #0]
8002432: 461a mov r2, r3
8002434: 68bb ldr r3, [r7, #8]
8002436: 781b ldrb r3, [r3, #0]
8002438: 009b lsls r3, r3, #2
800243a: 441a add r2, r3
800243c: 8bbb ldrh r3, [r7, #28]
800243e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002442: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002446: f443 4300 orr.w r3, r3, #32768 ; 0x8000
800244a: f043 03c0 orr.w r3, r3, #192 ; 0xc0
800244e: b29b uxth r3, r3
8002450: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8002452: 8b7b ldrh r3, [r7, #26]
8002454: 2b00 cmp r3, #0
8002456: d008 beq.n 800246a <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8002458: 68fb ldr r3, [r7, #12]
800245a: 6818 ldr r0, [r3, #0]
800245c: 68bb ldr r3, [r7, #8]
800245e: 6959 ldr r1, [r3, #20]
8002460: 68bb ldr r3, [r7, #8]
8002462: 895a ldrh r2, [r3, #10]
8002464: 8b7b ldrh r3, [r7, #26]
8002466: f003 fa15 bl 8005894 <USB_ReadPMA>
}
}
return count;
800246a: 8b7b ldrh r3, [r7, #26]
}
800246c: 4618 mov r0, r3
800246e: 3720 adds r7, #32
8002470: 46bd mov sp, r7
8002472: bd80 pop {r7, pc}
08002474 <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8002474: b580 push {r7, lr}
8002476: b0a2 sub sp, #136 ; 0x88
8002478: af00 add r7, sp, #0
800247a: 60f8 str r0, [r7, #12]
800247c: 60b9 str r1, [r7, #8]
800247e: 4613 mov r3, r2
8002480: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxByteNbre;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8002482: 88fb ldrh r3, [r7, #6]
8002484: f003 0340 and.w r3, r3, #64 ; 0x40
8002488: 2b00 cmp r3, #0
800248a: f000 81c7 beq.w 800281c <HAL_PCD_EP_DB_Transmit+0x3a8>
{
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
800248e: 68fb ldr r3, [r7, #12]
8002490: 681b ldr r3, [r3, #0]
8002492: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002496: b29b uxth r3, r3
8002498: 461a mov r2, r3
800249a: 68bb ldr r3, [r7, #8]
800249c: 781b ldrb r3, [r3, #0]
800249e: 00db lsls r3, r3, #3
80024a0: 4413 add r3, r2
80024a2: 3302 adds r3, #2
80024a4: 005b lsls r3, r3, #1
80024a6: 68fa ldr r2, [r7, #12]
80024a8: 6812 ldr r2, [r2, #0]
80024aa: 4413 add r3, r2
80024ac: f503 6380 add.w r3, r3, #1024 ; 0x400
80024b0: 881b ldrh r3, [r3, #0]
80024b2: f3c3 0309 ubfx r3, r3, #0, #10
80024b6: f8a7 304e strh.w r3, [r7, #78] ; 0x4e
if (ep->xfer_len > TxByteNbre)
80024ba: 68bb ldr r3, [r7, #8]
80024bc: 699a ldr r2, [r3, #24]
80024be: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
80024c2: 429a cmp r2, r3
80024c4: d907 bls.n 80024d6 <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxByteNbre;
80024c6: 68bb ldr r3, [r7, #8]
80024c8: 699a ldr r2, [r3, #24]
80024ca: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
80024ce: 1ad2 subs r2, r2, r3
80024d0: 68bb ldr r3, [r7, #8]
80024d2: 619a str r2, [r3, #24]
80024d4: e002 b.n 80024dc <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
80024d6: 68bb ldr r3, [r7, #8]
80024d8: 2200 movs r2, #0
80024da: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
80024dc: 68bb ldr r3, [r7, #8]
80024de: 699b ldr r3, [r3, #24]
80024e0: 2b00 cmp r3, #0
80024e2: f040 80b9 bne.w 8002658 <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80024e6: 68bb ldr r3, [r7, #8]
80024e8: 785b ldrb r3, [r3, #1]
80024ea: 2b00 cmp r3, #0
80024ec: d126 bne.n 800253c <HAL_PCD_EP_DB_Transmit+0xc8>
80024ee: 68fb ldr r3, [r7, #12]
80024f0: 681b ldr r3, [r3, #0]
80024f2: 62bb str r3, [r7, #40] ; 0x28
80024f4: 68fb ldr r3, [r7, #12]
80024f6: 681b ldr r3, [r3, #0]
80024f8: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80024fc: b29b uxth r3, r3
80024fe: 461a mov r2, r3
8002500: 6abb ldr r3, [r7, #40] ; 0x28
8002502: 4413 add r3, r2
8002504: 62bb str r3, [r7, #40] ; 0x28
8002506: 68bb ldr r3, [r7, #8]
8002508: 781b ldrb r3, [r3, #0]
800250a: 011a lsls r2, r3, #4
800250c: 6abb ldr r3, [r7, #40] ; 0x28
800250e: 4413 add r3, r2
8002510: f203 4304 addw r3, r3, #1028 ; 0x404
8002514: 627b str r3, [r7, #36] ; 0x24
8002516: 6a7b ldr r3, [r7, #36] ; 0x24
8002518: 881b ldrh r3, [r3, #0]
800251a: b29b uxth r3, r3
800251c: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8002520: b29a uxth r2, r3
8002522: 6a7b ldr r3, [r7, #36] ; 0x24
8002524: 801a strh r2, [r3, #0]
8002526: 6a7b ldr r3, [r7, #36] ; 0x24
8002528: 881b ldrh r3, [r3, #0]
800252a: b29b uxth r3, r3
800252c: ea6f 4343 mvn.w r3, r3, lsl #17
8002530: ea6f 4353 mvn.w r3, r3, lsr #17
8002534: b29a uxth r2, r3
8002536: 6a7b ldr r3, [r7, #36] ; 0x24
8002538: 801a strh r2, [r3, #0]
800253a: e01a b.n 8002572 <HAL_PCD_EP_DB_Transmit+0xfe>
800253c: 68bb ldr r3, [r7, #8]
800253e: 785b ldrb r3, [r3, #1]
8002540: 2b01 cmp r3, #1
8002542: d116 bne.n 8002572 <HAL_PCD_EP_DB_Transmit+0xfe>
8002544: 68fb ldr r3, [r7, #12]
8002546: 681b ldr r3, [r3, #0]
8002548: 633b str r3, [r7, #48] ; 0x30
800254a: 68fb ldr r3, [r7, #12]
800254c: 681b ldr r3, [r3, #0]
800254e: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002552: b29b uxth r3, r3
8002554: 461a mov r2, r3
8002556: 6b3b ldr r3, [r7, #48] ; 0x30
8002558: 4413 add r3, r2
800255a: 633b str r3, [r7, #48] ; 0x30
800255c: 68bb ldr r3, [r7, #8]
800255e: 781b ldrb r3, [r3, #0]
8002560: 011a lsls r2, r3, #4
8002562: 6b3b ldr r3, [r7, #48] ; 0x30
8002564: 4413 add r3, r2
8002566: f203 4304 addw r3, r3, #1028 ; 0x404
800256a: 62fb str r3, [r7, #44] ; 0x2c
800256c: 6afb ldr r3, [r7, #44] ; 0x2c
800256e: 2200 movs r2, #0
8002570: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002572: 68fb ldr r3, [r7, #12]
8002574: 681b ldr r3, [r3, #0]
8002576: 623b str r3, [r7, #32]
8002578: 68bb ldr r3, [r7, #8]
800257a: 785b ldrb r3, [r3, #1]
800257c: 2b00 cmp r3, #0
800257e: d126 bne.n 80025ce <HAL_PCD_EP_DB_Transmit+0x15a>
8002580: 68fb ldr r3, [r7, #12]
8002582: 681b ldr r3, [r3, #0]
8002584: 61bb str r3, [r7, #24]
8002586: 68fb ldr r3, [r7, #12]
8002588: 681b ldr r3, [r3, #0]
800258a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800258e: b29b uxth r3, r3
8002590: 461a mov r2, r3
8002592: 69bb ldr r3, [r7, #24]
8002594: 4413 add r3, r2
8002596: 61bb str r3, [r7, #24]
8002598: 68bb ldr r3, [r7, #8]
800259a: 781b ldrb r3, [r3, #0]
800259c: 011a lsls r2, r3, #4
800259e: 69bb ldr r3, [r7, #24]
80025a0: 4413 add r3, r2
80025a2: f203 430c addw r3, r3, #1036 ; 0x40c
80025a6: 617b str r3, [r7, #20]
80025a8: 697b ldr r3, [r7, #20]
80025aa: 881b ldrh r3, [r3, #0]
80025ac: b29b uxth r3, r3
80025ae: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80025b2: b29a uxth r2, r3
80025b4: 697b ldr r3, [r7, #20]
80025b6: 801a strh r2, [r3, #0]
80025b8: 697b ldr r3, [r7, #20]
80025ba: 881b ldrh r3, [r3, #0]
80025bc: b29b uxth r3, r3
80025be: ea6f 4343 mvn.w r3, r3, lsl #17
80025c2: ea6f 4353 mvn.w r3, r3, lsr #17
80025c6: b29a uxth r2, r3
80025c8: 697b ldr r3, [r7, #20]
80025ca: 801a strh r2, [r3, #0]
80025cc: e017 b.n 80025fe <HAL_PCD_EP_DB_Transmit+0x18a>
80025ce: 68bb ldr r3, [r7, #8]
80025d0: 785b ldrb r3, [r3, #1]
80025d2: 2b01 cmp r3, #1
80025d4: d113 bne.n 80025fe <HAL_PCD_EP_DB_Transmit+0x18a>
80025d6: 68fb ldr r3, [r7, #12]
80025d8: 681b ldr r3, [r3, #0]
80025da: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80025de: b29b uxth r3, r3
80025e0: 461a mov r2, r3
80025e2: 6a3b ldr r3, [r7, #32]
80025e4: 4413 add r3, r2
80025e6: 623b str r3, [r7, #32]
80025e8: 68bb ldr r3, [r7, #8]
80025ea: 781b ldrb r3, [r3, #0]
80025ec: 011a lsls r2, r3, #4
80025ee: 6a3b ldr r3, [r7, #32]
80025f0: 4413 add r3, r2
80025f2: f203 430c addw r3, r3, #1036 ; 0x40c
80025f6: 61fb str r3, [r7, #28]
80025f8: 69fb ldr r3, [r7, #28]
80025fa: 2200 movs r2, #0
80025fc: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
80025fe: 68bb ldr r3, [r7, #8]
8002600: 781b ldrb r3, [r3, #0]
8002602: 4619 mov r1, r3
8002604: 68f8 ldr r0, [r7, #12]
8002606: f005 fa82 bl 8007b0e <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
800260a: 88fb ldrh r3, [r7, #6]
800260c: f403 4380 and.w r3, r3, #16384 ; 0x4000
8002610: 2b00 cmp r3, #0
8002612: f000 82d4 beq.w 8002bbe <HAL_PCD_EP_DB_Transmit+0x74a>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
8002616: 68fb ldr r3, [r7, #12]
8002618: 681b ldr r3, [r3, #0]
800261a: 461a mov r2, r3
800261c: 68bb ldr r3, [r7, #8]
800261e: 781b ldrb r3, [r3, #0]
8002620: 009b lsls r3, r3, #2
8002622: 4413 add r3, r2
8002624: 881b ldrh r3, [r3, #0]
8002626: b29b uxth r3, r3
8002628: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800262c: f023 0370 bic.w r3, r3, #112 ; 0x70
8002630: 827b strh r3, [r7, #18]
8002632: 68fb ldr r3, [r7, #12]
8002634: 681b ldr r3, [r3, #0]
8002636: 461a mov r2, r3
8002638: 68bb ldr r3, [r7, #8]
800263a: 781b ldrb r3, [r3, #0]
800263c: 009b lsls r3, r3, #2
800263e: 441a add r2, r3
8002640: 8a7b ldrh r3, [r7, #18]
8002642: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002646: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800264a: f443 4340 orr.w r3, r3, #49152 ; 0xc000
800264e: f043 0380 orr.w r3, r3, #128 ; 0x80
8002652: b29b uxth r3, r3
8002654: 8013 strh r3, [r2, #0]
8002656: e2b2 b.n 8002bbe <HAL_PCD_EP_DB_Transmit+0x74a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8002658: 88fb ldrh r3, [r7, #6]
800265a: f403 4380 and.w r3, r3, #16384 ; 0x4000
800265e: 2b00 cmp r3, #0
8002660: d021 beq.n 80026a6 <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
8002662: 68fb ldr r3, [r7, #12]
8002664: 681b ldr r3, [r3, #0]
8002666: 461a mov r2, r3
8002668: 68bb ldr r3, [r7, #8]
800266a: 781b ldrb r3, [r3, #0]
800266c: 009b lsls r3, r3, #2
800266e: 4413 add r3, r2
8002670: 881b ldrh r3, [r3, #0]
8002672: b29b uxth r3, r3
8002674: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8002678: f023 0370 bic.w r3, r3, #112 ; 0x70
800267c: f8a7 3044 strh.w r3, [r7, #68] ; 0x44
8002680: 68fb ldr r3, [r7, #12]
8002682: 681b ldr r3, [r3, #0]
8002684: 461a mov r2, r3
8002686: 68bb ldr r3, [r7, #8]
8002688: 781b ldrb r3, [r3, #0]
800268a: 009b lsls r3, r3, #2
800268c: 441a add r2, r3
800268e: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44
8002692: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002696: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800269a: f443 4340 orr.w r3, r3, #49152 ; 0xc000
800269e: f043 0380 orr.w r3, r3, #128 ; 0x80
80026a2: b29b uxth r3, r3
80026a4: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
80026a6: 68bb ldr r3, [r7, #8]
80026a8: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
80026ac: 2b01 cmp r3, #1
80026ae: f040 8286 bne.w 8002bbe <HAL_PCD_EP_DB_Transmit+0x74a>
{
ep->xfer_buff += TxByteNbre;
80026b2: 68bb ldr r3, [r7, #8]
80026b4: 695a ldr r2, [r3, #20]
80026b6: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
80026ba: 441a add r2, r3
80026bc: 68bb ldr r3, [r7, #8]
80026be: 615a str r2, [r3, #20]
ep->xfer_count += TxByteNbre;
80026c0: 68bb ldr r3, [r7, #8]
80026c2: 69da ldr r2, [r3, #28]
80026c4: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
80026c8: 441a add r2, r3
80026ca: 68bb ldr r3, [r7, #8]
80026cc: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
80026ce: 68bb ldr r3, [r7, #8]
80026d0: 6a1a ldr r2, [r3, #32]
80026d2: 68bb ldr r3, [r7, #8]
80026d4: 691b ldr r3, [r3, #16]
80026d6: 429a cmp r2, r3
80026d8: d309 bcc.n 80026ee <HAL_PCD_EP_DB_Transmit+0x27a>
{
len = ep->maxpacket;
80026da: 68bb ldr r3, [r7, #8]
80026dc: 691b ldr r3, [r3, #16]
80026de: 653b str r3, [r7, #80] ; 0x50
ep->xfer_len_db -= len;
80026e0: 68bb ldr r3, [r7, #8]
80026e2: 6a1a ldr r2, [r3, #32]
80026e4: 6d3b ldr r3, [r7, #80] ; 0x50
80026e6: 1ad2 subs r2, r2, r3
80026e8: 68bb ldr r3, [r7, #8]
80026ea: 621a str r2, [r3, #32]
80026ec: e015 b.n 800271a <HAL_PCD_EP_DB_Transmit+0x2a6>
}
else if (ep->xfer_len_db == 0U)
80026ee: 68bb ldr r3, [r7, #8]
80026f0: 6a1b ldr r3, [r3, #32]
80026f2: 2b00 cmp r3, #0
80026f4: d107 bne.n 8002706 <HAL_PCD_EP_DB_Transmit+0x292>
{
len = TxByteNbre;
80026f6: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
80026fa: 653b str r3, [r7, #80] ; 0x50
ep->xfer_fill_db = 0U;
80026fc: 68bb ldr r3, [r7, #8]
80026fe: 2200 movs r2, #0
8002700: f883 2024 strb.w r2, [r3, #36] ; 0x24
8002704: e009 b.n 800271a <HAL_PCD_EP_DB_Transmit+0x2a6>
}
else
{
ep->xfer_fill_db = 0U;
8002706: 68bb ldr r3, [r7, #8]
8002708: 2200 movs r2, #0
800270a: f883 2024 strb.w r2, [r3, #36] ; 0x24
len = ep->xfer_len_db;
800270e: 68bb ldr r3, [r7, #8]
8002710: 6a1b ldr r3, [r3, #32]
8002712: 653b str r3, [r7, #80] ; 0x50
ep->xfer_len_db = 0U;
8002714: 68bb ldr r3, [r7, #8]
8002716: 2200 movs r2, #0
8002718: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
800271a: 68bb ldr r3, [r7, #8]
800271c: 785b ldrb r3, [r3, #1]
800271e: 2b00 cmp r3, #0
8002720: d155 bne.n 80027ce <HAL_PCD_EP_DB_Transmit+0x35a>
8002722: 68fb ldr r3, [r7, #12]
8002724: 681b ldr r3, [r3, #0]
8002726: 63bb str r3, [r7, #56] ; 0x38
8002728: 68fb ldr r3, [r7, #12]
800272a: 681b ldr r3, [r3, #0]
800272c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002730: b29b uxth r3, r3
8002732: 461a mov r2, r3
8002734: 6bbb ldr r3, [r7, #56] ; 0x38
8002736: 4413 add r3, r2
8002738: 63bb str r3, [r7, #56] ; 0x38
800273a: 68bb ldr r3, [r7, #8]
800273c: 781b ldrb r3, [r3, #0]
800273e: 011a lsls r2, r3, #4
8002740: 6bbb ldr r3, [r7, #56] ; 0x38
8002742: 4413 add r3, r2
8002744: f203 4304 addw r3, r3, #1028 ; 0x404
8002748: 637b str r3, [r7, #52] ; 0x34
800274a: 6d3b ldr r3, [r7, #80] ; 0x50
800274c: 2b00 cmp r3, #0
800274e: d112 bne.n 8002776 <HAL_PCD_EP_DB_Transmit+0x302>
8002750: 6b7b ldr r3, [r7, #52] ; 0x34
8002752: 881b ldrh r3, [r3, #0]
8002754: b29b uxth r3, r3
8002756: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
800275a: b29a uxth r2, r3
800275c: 6b7b ldr r3, [r7, #52] ; 0x34
800275e: 801a strh r2, [r3, #0]
8002760: 6b7b ldr r3, [r7, #52] ; 0x34
8002762: 881b ldrh r3, [r3, #0]
8002764: b29b uxth r3, r3
8002766: ea6f 4343 mvn.w r3, r3, lsl #17
800276a: ea6f 4353 mvn.w r3, r3, lsr #17
800276e: b29a uxth r2, r3
8002770: 6b7b ldr r3, [r7, #52] ; 0x34
8002772: 801a strh r2, [r3, #0]
8002774: e047 b.n 8002806 <HAL_PCD_EP_DB_Transmit+0x392>
8002776: 6d3b ldr r3, [r7, #80] ; 0x50
8002778: 2b3e cmp r3, #62 ; 0x3e
800277a: d811 bhi.n 80027a0 <HAL_PCD_EP_DB_Transmit+0x32c>
800277c: 6d3b ldr r3, [r7, #80] ; 0x50
800277e: 085b lsrs r3, r3, #1
8002780: 64bb str r3, [r7, #72] ; 0x48
8002782: 6d3b ldr r3, [r7, #80] ; 0x50
8002784: f003 0301 and.w r3, r3, #1
8002788: 2b00 cmp r3, #0
800278a: d002 beq.n 8002792 <HAL_PCD_EP_DB_Transmit+0x31e>
800278c: 6cbb ldr r3, [r7, #72] ; 0x48
800278e: 3301 adds r3, #1
8002790: 64bb str r3, [r7, #72] ; 0x48
8002792: 6cbb ldr r3, [r7, #72] ; 0x48
8002794: b29b uxth r3, r3
8002796: 029b lsls r3, r3, #10
8002798: b29a uxth r2, r3
800279a: 6b7b ldr r3, [r7, #52] ; 0x34
800279c: 801a strh r2, [r3, #0]
800279e: e032 b.n 8002806 <HAL_PCD_EP_DB_Transmit+0x392>
80027a0: 6d3b ldr r3, [r7, #80] ; 0x50
80027a2: 095b lsrs r3, r3, #5
80027a4: 64bb str r3, [r7, #72] ; 0x48
80027a6: 6d3b ldr r3, [r7, #80] ; 0x50
80027a8: f003 031f and.w r3, r3, #31
80027ac: 2b00 cmp r3, #0
80027ae: d102 bne.n 80027b6 <HAL_PCD_EP_DB_Transmit+0x342>
80027b0: 6cbb ldr r3, [r7, #72] ; 0x48
80027b2: 3b01 subs r3, #1
80027b4: 64bb str r3, [r7, #72] ; 0x48
80027b6: 6cbb ldr r3, [r7, #72] ; 0x48
80027b8: b29b uxth r3, r3
80027ba: 029b lsls r3, r3, #10
80027bc: b29b uxth r3, r3
80027be: ea6f 4343 mvn.w r3, r3, lsl #17
80027c2: ea6f 4353 mvn.w r3, r3, lsr #17
80027c6: b29a uxth r2, r3
80027c8: 6b7b ldr r3, [r7, #52] ; 0x34
80027ca: 801a strh r2, [r3, #0]
80027cc: e01b b.n 8002806 <HAL_PCD_EP_DB_Transmit+0x392>
80027ce: 68bb ldr r3, [r7, #8]
80027d0: 785b ldrb r3, [r3, #1]
80027d2: 2b01 cmp r3, #1
80027d4: d117 bne.n 8002806 <HAL_PCD_EP_DB_Transmit+0x392>
80027d6: 68fb ldr r3, [r7, #12]
80027d8: 681b ldr r3, [r3, #0]
80027da: 643b str r3, [r7, #64] ; 0x40
80027dc: 68fb ldr r3, [r7, #12]
80027de: 681b ldr r3, [r3, #0]
80027e0: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80027e4: b29b uxth r3, r3
80027e6: 461a mov r2, r3
80027e8: 6c3b ldr r3, [r7, #64] ; 0x40
80027ea: 4413 add r3, r2
80027ec: 643b str r3, [r7, #64] ; 0x40
80027ee: 68bb ldr r3, [r7, #8]
80027f0: 781b ldrb r3, [r3, #0]
80027f2: 011a lsls r2, r3, #4
80027f4: 6c3b ldr r3, [r7, #64] ; 0x40
80027f6: 4413 add r3, r2
80027f8: f203 4304 addw r3, r3, #1028 ; 0x404
80027fc: 63fb str r3, [r7, #60] ; 0x3c
80027fe: 6d3b ldr r3, [r7, #80] ; 0x50
8002800: b29a uxth r2, r3
8002802: 6bfb ldr r3, [r7, #60] ; 0x3c
8002804: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
8002806: 68fb ldr r3, [r7, #12]
8002808: 6818 ldr r0, [r3, #0]
800280a: 68bb ldr r3, [r7, #8]
800280c: 6959 ldr r1, [r3, #20]
800280e: 68bb ldr r3, [r7, #8]
8002810: 891a ldrh r2, [r3, #8]
8002812: 6d3b ldr r3, [r7, #80] ; 0x50
8002814: b29b uxth r3, r3
8002816: f002 fff8 bl 800580a <USB_WritePMA>
800281a: e1d0 b.n 8002bbe <HAL_PCD_EP_DB_Transmit+0x74a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxByteNbre = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
800281c: 68fb ldr r3, [r7, #12]
800281e: 681b ldr r3, [r3, #0]
8002820: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002824: b29b uxth r3, r3
8002826: 461a mov r2, r3
8002828: 68bb ldr r3, [r7, #8]
800282a: 781b ldrb r3, [r3, #0]
800282c: 00db lsls r3, r3, #3
800282e: 4413 add r3, r2
8002830: 3306 adds r3, #6
8002832: 005b lsls r3, r3, #1
8002834: 68fa ldr r2, [r7, #12]
8002836: 6812 ldr r2, [r2, #0]
8002838: 4413 add r3, r2
800283a: f503 6380 add.w r3, r3, #1024 ; 0x400
800283e: 881b ldrh r3, [r3, #0]
8002840: f3c3 0309 ubfx r3, r3, #0, #10
8002844: f8a7 304e strh.w r3, [r7, #78] ; 0x4e
if (ep->xfer_len >= TxByteNbre)
8002848: 68bb ldr r3, [r7, #8]
800284a: 699a ldr r2, [r3, #24]
800284c: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
8002850: 429a cmp r2, r3
8002852: d307 bcc.n 8002864 <HAL_PCD_EP_DB_Transmit+0x3f0>
{
ep->xfer_len -= TxByteNbre;
8002854: 68bb ldr r3, [r7, #8]
8002856: 699a ldr r2, [r3, #24]
8002858: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
800285c: 1ad2 subs r2, r2, r3
800285e: 68bb ldr r3, [r7, #8]
8002860: 619a str r2, [r3, #24]
8002862: e002 b.n 800286a <HAL_PCD_EP_DB_Transmit+0x3f6>
}
else
{
ep->xfer_len = 0U;
8002864: 68bb ldr r3, [r7, #8]
8002866: 2200 movs r2, #0
8002868: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
800286a: 68bb ldr r3, [r7, #8]
800286c: 699b ldr r3, [r3, #24]
800286e: 2b00 cmp r3, #0
8002870: f040 80c4 bne.w 80029fc <HAL_PCD_EP_DB_Transmit+0x588>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002874: 68bb ldr r3, [r7, #8]
8002876: 785b ldrb r3, [r3, #1]
8002878: 2b00 cmp r3, #0
800287a: d126 bne.n 80028ca <HAL_PCD_EP_DB_Transmit+0x456>
800287c: 68fb ldr r3, [r7, #12]
800287e: 681b ldr r3, [r3, #0]
8002880: 66fb str r3, [r7, #108] ; 0x6c
8002882: 68fb ldr r3, [r7, #12]
8002884: 681b ldr r3, [r3, #0]
8002886: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800288a: b29b uxth r3, r3
800288c: 461a mov r2, r3
800288e: 6efb ldr r3, [r7, #108] ; 0x6c
8002890: 4413 add r3, r2
8002892: 66fb str r3, [r7, #108] ; 0x6c
8002894: 68bb ldr r3, [r7, #8]
8002896: 781b ldrb r3, [r3, #0]
8002898: 011a lsls r2, r3, #4
800289a: 6efb ldr r3, [r7, #108] ; 0x6c
800289c: 4413 add r3, r2
800289e: f203 4304 addw r3, r3, #1028 ; 0x404
80028a2: 66bb str r3, [r7, #104] ; 0x68
80028a4: 6ebb ldr r3, [r7, #104] ; 0x68
80028a6: 881b ldrh r3, [r3, #0]
80028a8: b29b uxth r3, r3
80028aa: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80028ae: b29a uxth r2, r3
80028b0: 6ebb ldr r3, [r7, #104] ; 0x68
80028b2: 801a strh r2, [r3, #0]
80028b4: 6ebb ldr r3, [r7, #104] ; 0x68
80028b6: 881b ldrh r3, [r3, #0]
80028b8: b29b uxth r3, r3
80028ba: ea6f 4343 mvn.w r3, r3, lsl #17
80028be: ea6f 4353 mvn.w r3, r3, lsr #17
80028c2: b29a uxth r2, r3
80028c4: 6ebb ldr r3, [r7, #104] ; 0x68
80028c6: 801a strh r2, [r3, #0]
80028c8: e01a b.n 8002900 <HAL_PCD_EP_DB_Transmit+0x48c>
80028ca: 68bb ldr r3, [r7, #8]
80028cc: 785b ldrb r3, [r3, #1]
80028ce: 2b01 cmp r3, #1
80028d0: d116 bne.n 8002900 <HAL_PCD_EP_DB_Transmit+0x48c>
80028d2: 68fb ldr r3, [r7, #12]
80028d4: 681b ldr r3, [r3, #0]
80028d6: 677b str r3, [r7, #116] ; 0x74
80028d8: 68fb ldr r3, [r7, #12]
80028da: 681b ldr r3, [r3, #0]
80028dc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80028e0: b29b uxth r3, r3
80028e2: 461a mov r2, r3
80028e4: 6f7b ldr r3, [r7, #116] ; 0x74
80028e6: 4413 add r3, r2
80028e8: 677b str r3, [r7, #116] ; 0x74
80028ea: 68bb ldr r3, [r7, #8]
80028ec: 781b ldrb r3, [r3, #0]
80028ee: 011a lsls r2, r3, #4
80028f0: 6f7b ldr r3, [r7, #116] ; 0x74
80028f2: 4413 add r3, r2
80028f4: f203 4304 addw r3, r3, #1028 ; 0x404
80028f8: 673b str r3, [r7, #112] ; 0x70
80028fa: 6f3b ldr r3, [r7, #112] ; 0x70
80028fc: 2200 movs r2, #0
80028fe: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002900: 68fb ldr r3, [r7, #12]
8002902: 681b ldr r3, [r3, #0]
8002904: 67bb str r3, [r7, #120] ; 0x78
8002906: 68bb ldr r3, [r7, #8]
8002908: 785b ldrb r3, [r3, #1]
800290a: 2b00 cmp r3, #0
800290c: d12f bne.n 800296e <HAL_PCD_EP_DB_Transmit+0x4fa>
800290e: 68fb ldr r3, [r7, #12]
8002910: 681b ldr r3, [r3, #0]
8002912: f8c7 3080 str.w r3, [r7, #128] ; 0x80
8002916: 68fb ldr r3, [r7, #12]
8002918: 681b ldr r3, [r3, #0]
800291a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800291e: b29b uxth r3, r3
8002920: 461a mov r2, r3
8002922: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80
8002926: 4413 add r3, r2
8002928: f8c7 3080 str.w r3, [r7, #128] ; 0x80
800292c: 68bb ldr r3, [r7, #8]
800292e: 781b ldrb r3, [r3, #0]
8002930: 011a lsls r2, r3, #4
8002932: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80
8002936: 4413 add r3, r2
8002938: f203 430c addw r3, r3, #1036 ; 0x40c
800293c: f8c7 3084 str.w r3, [r7, #132] ; 0x84
8002940: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8002944: 881b ldrh r3, [r3, #0]
8002946: b29b uxth r3, r3
8002948: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
800294c: b29a uxth r2, r3
800294e: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8002952: 801a strh r2, [r3, #0]
8002954: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8002958: 881b ldrh r3, [r3, #0]
800295a: b29b uxth r3, r3
800295c: ea6f 4343 mvn.w r3, r3, lsl #17
8002960: ea6f 4353 mvn.w r3, r3, lsr #17
8002964: b29a uxth r2, r3
8002966: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
800296a: 801a strh r2, [r3, #0]
800296c: e017 b.n 800299e <HAL_PCD_EP_DB_Transmit+0x52a>
800296e: 68bb ldr r3, [r7, #8]
8002970: 785b ldrb r3, [r3, #1]
8002972: 2b01 cmp r3, #1
8002974: d113 bne.n 800299e <HAL_PCD_EP_DB_Transmit+0x52a>
8002976: 68fb ldr r3, [r7, #12]
8002978: 681b ldr r3, [r3, #0]
800297a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800297e: b29b uxth r3, r3
8002980: 461a mov r2, r3
8002982: 6fbb ldr r3, [r7, #120] ; 0x78
8002984: 4413 add r3, r2
8002986: 67bb str r3, [r7, #120] ; 0x78
8002988: 68bb ldr r3, [r7, #8]
800298a: 781b ldrb r3, [r3, #0]
800298c: 011a lsls r2, r3, #4
800298e: 6fbb ldr r3, [r7, #120] ; 0x78
8002990: 4413 add r3, r2
8002992: f203 430c addw r3, r3, #1036 ; 0x40c
8002996: 67fb str r3, [r7, #124] ; 0x7c
8002998: 6ffb ldr r3, [r7, #124] ; 0x7c
800299a: 2200 movs r2, #0
800299c: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
800299e: 68bb ldr r3, [r7, #8]
80029a0: 781b ldrb r3, [r3, #0]
80029a2: 4619 mov r1, r3
80029a4: 68f8 ldr r0, [r7, #12]
80029a6: f005 f8b2 bl 8007b0e <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
80029aa: 88fb ldrh r3, [r7, #6]
80029ac: f403 4380 and.w r3, r3, #16384 ; 0x4000
80029b0: 2b00 cmp r3, #0
80029b2: f040 8104 bne.w 8002bbe <HAL_PCD_EP_DB_Transmit+0x74a>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
80029b6: 68fb ldr r3, [r7, #12]
80029b8: 681b ldr r3, [r3, #0]
80029ba: 461a mov r2, r3
80029bc: 68bb ldr r3, [r7, #8]
80029be: 781b ldrb r3, [r3, #0]
80029c0: 009b lsls r3, r3, #2
80029c2: 4413 add r3, r2
80029c4: 881b ldrh r3, [r3, #0]
80029c6: b29b uxth r3, r3
80029c8: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80029cc: f023 0370 bic.w r3, r3, #112 ; 0x70
80029d0: f8a7 3046 strh.w r3, [r7, #70] ; 0x46
80029d4: 68fb ldr r3, [r7, #12]
80029d6: 681b ldr r3, [r3, #0]
80029d8: 461a mov r2, r3
80029da: 68bb ldr r3, [r7, #8]
80029dc: 781b ldrb r3, [r3, #0]
80029de: 009b lsls r3, r3, #2
80029e0: 441a add r2, r3
80029e2: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46
80029e6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80029ea: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80029ee: f443 4340 orr.w r3, r3, #49152 ; 0xc000
80029f2: f043 0380 orr.w r3, r3, #128 ; 0x80
80029f6: b29b uxth r3, r3
80029f8: 8013 strh r3, [r2, #0]
80029fa: e0e0 b.n 8002bbe <HAL_PCD_EP_DB_Transmit+0x74a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
80029fc: 88fb ldrh r3, [r7, #6]
80029fe: f403 4380 and.w r3, r3, #16384 ; 0x4000
8002a02: 2b00 cmp r3, #0
8002a04: d121 bne.n 8002a4a <HAL_PCD_EP_DB_Transmit+0x5d6>
{
PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U);
8002a06: 68fb ldr r3, [r7, #12]
8002a08: 681b ldr r3, [r3, #0]
8002a0a: 461a mov r2, r3
8002a0c: 68bb ldr r3, [r7, #8]
8002a0e: 781b ldrb r3, [r3, #0]
8002a10: 009b lsls r3, r3, #2
8002a12: 4413 add r3, r2
8002a14: 881b ldrh r3, [r3, #0]
8002a16: b29b uxth r3, r3
8002a18: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8002a1c: f023 0370 bic.w r3, r3, #112 ; 0x70
8002a20: f8a7 304c strh.w r3, [r7, #76] ; 0x4c
8002a24: 68fb ldr r3, [r7, #12]
8002a26: 681b ldr r3, [r3, #0]
8002a28: 461a mov r2, r3
8002a2a: 68bb ldr r3, [r7, #8]
8002a2c: 781b ldrb r3, [r3, #0]
8002a2e: 009b lsls r3, r3, #2
8002a30: 441a add r2, r3
8002a32: f8b7 304c ldrh.w r3, [r7, #76] ; 0x4c
8002a36: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002a3a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002a3e: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8002a42: f043 0380 orr.w r3, r3, #128 ; 0x80
8002a46: b29b uxth r3, r3
8002a48: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8002a4a: 68bb ldr r3, [r7, #8]
8002a4c: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
8002a50: 2b01 cmp r3, #1
8002a52: f040 80b4 bne.w 8002bbe <HAL_PCD_EP_DB_Transmit+0x74a>
{
ep->xfer_buff += TxByteNbre;
8002a56: 68bb ldr r3, [r7, #8]
8002a58: 695a ldr r2, [r3, #20]
8002a5a: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
8002a5e: 441a add r2, r3
8002a60: 68bb ldr r3, [r7, #8]
8002a62: 615a str r2, [r3, #20]
ep->xfer_count += TxByteNbre;
8002a64: 68bb ldr r3, [r7, #8]
8002a66: 69da ldr r2, [r3, #28]
8002a68: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
8002a6c: 441a add r2, r3
8002a6e: 68bb ldr r3, [r7, #8]
8002a70: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8002a72: 68bb ldr r3, [r7, #8]
8002a74: 6a1a ldr r2, [r3, #32]
8002a76: 68bb ldr r3, [r7, #8]
8002a78: 691b ldr r3, [r3, #16]
8002a7a: 429a cmp r2, r3
8002a7c: d309 bcc.n 8002a92 <HAL_PCD_EP_DB_Transmit+0x61e>
{
len = ep->maxpacket;
8002a7e: 68bb ldr r3, [r7, #8]
8002a80: 691b ldr r3, [r3, #16]
8002a82: 653b str r3, [r7, #80] ; 0x50
ep->xfer_len_db -= len;
8002a84: 68bb ldr r3, [r7, #8]
8002a86: 6a1a ldr r2, [r3, #32]
8002a88: 6d3b ldr r3, [r7, #80] ; 0x50
8002a8a: 1ad2 subs r2, r2, r3
8002a8c: 68bb ldr r3, [r7, #8]
8002a8e: 621a str r2, [r3, #32]
8002a90: e015 b.n 8002abe <HAL_PCD_EP_DB_Transmit+0x64a>
}
else if (ep->xfer_len_db == 0U)
8002a92: 68bb ldr r3, [r7, #8]
8002a94: 6a1b ldr r3, [r3, #32]
8002a96: 2b00 cmp r3, #0
8002a98: d107 bne.n 8002aaa <HAL_PCD_EP_DB_Transmit+0x636>
{
len = TxByteNbre;
8002a9a: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e
8002a9e: 653b str r3, [r7, #80] ; 0x50
ep->xfer_fill_db = 0U;
8002aa0: 68bb ldr r3, [r7, #8]
8002aa2: 2200 movs r2, #0
8002aa4: f883 2024 strb.w r2, [r3, #36] ; 0x24
8002aa8: e009 b.n 8002abe <HAL_PCD_EP_DB_Transmit+0x64a>
}
else
{
len = ep->xfer_len_db;
8002aaa: 68bb ldr r3, [r7, #8]
8002aac: 6a1b ldr r3, [r3, #32]
8002aae: 653b str r3, [r7, #80] ; 0x50
ep->xfer_len_db = 0U;
8002ab0: 68bb ldr r3, [r7, #8]
8002ab2: 2200 movs r2, #0
8002ab4: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
8002ab6: 68bb ldr r3, [r7, #8]
8002ab8: 2200 movs r2, #0
8002aba: f883 2024 strb.w r2, [r3, #36] ; 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8002abe: 68fb ldr r3, [r7, #12]
8002ac0: 681b ldr r3, [r3, #0]
8002ac2: 667b str r3, [r7, #100] ; 0x64
8002ac4: 68bb ldr r3, [r7, #8]
8002ac6: 785b ldrb r3, [r3, #1]
8002ac8: 2b00 cmp r3, #0
8002aca: d155 bne.n 8002b78 <HAL_PCD_EP_DB_Transmit+0x704>
8002acc: 68fb ldr r3, [r7, #12]
8002ace: 681b ldr r3, [r3, #0]
8002ad0: 65fb str r3, [r7, #92] ; 0x5c
8002ad2: 68fb ldr r3, [r7, #12]
8002ad4: 681b ldr r3, [r3, #0]
8002ad6: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002ada: b29b uxth r3, r3
8002adc: 461a mov r2, r3
8002ade: 6dfb ldr r3, [r7, #92] ; 0x5c
8002ae0: 4413 add r3, r2
8002ae2: 65fb str r3, [r7, #92] ; 0x5c
8002ae4: 68bb ldr r3, [r7, #8]
8002ae6: 781b ldrb r3, [r3, #0]
8002ae8: 011a lsls r2, r3, #4
8002aea: 6dfb ldr r3, [r7, #92] ; 0x5c
8002aec: 4413 add r3, r2
8002aee: f203 430c addw r3, r3, #1036 ; 0x40c
8002af2: 65bb str r3, [r7, #88] ; 0x58
8002af4: 6d3b ldr r3, [r7, #80] ; 0x50
8002af6: 2b00 cmp r3, #0
8002af8: d112 bne.n 8002b20 <HAL_PCD_EP_DB_Transmit+0x6ac>
8002afa: 6dbb ldr r3, [r7, #88] ; 0x58
8002afc: 881b ldrh r3, [r3, #0]
8002afe: b29b uxth r3, r3
8002b00: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8002b04: b29a uxth r2, r3
8002b06: 6dbb ldr r3, [r7, #88] ; 0x58
8002b08: 801a strh r2, [r3, #0]
8002b0a: 6dbb ldr r3, [r7, #88] ; 0x58
8002b0c: 881b ldrh r3, [r3, #0]
8002b0e: b29b uxth r3, r3
8002b10: ea6f 4343 mvn.w r3, r3, lsl #17
8002b14: ea6f 4353 mvn.w r3, r3, lsr #17
8002b18: b29a uxth r2, r3
8002b1a: 6dbb ldr r3, [r7, #88] ; 0x58
8002b1c: 801a strh r2, [r3, #0]
8002b1e: e044 b.n 8002baa <HAL_PCD_EP_DB_Transmit+0x736>
8002b20: 6d3b ldr r3, [r7, #80] ; 0x50
8002b22: 2b3e cmp r3, #62 ; 0x3e
8002b24: d811 bhi.n 8002b4a <HAL_PCD_EP_DB_Transmit+0x6d6>
8002b26: 6d3b ldr r3, [r7, #80] ; 0x50
8002b28: 085b lsrs r3, r3, #1
8002b2a: 657b str r3, [r7, #84] ; 0x54
8002b2c: 6d3b ldr r3, [r7, #80] ; 0x50
8002b2e: f003 0301 and.w r3, r3, #1
8002b32: 2b00 cmp r3, #0
8002b34: d002 beq.n 8002b3c <HAL_PCD_EP_DB_Transmit+0x6c8>
8002b36: 6d7b ldr r3, [r7, #84] ; 0x54
8002b38: 3301 adds r3, #1
8002b3a: 657b str r3, [r7, #84] ; 0x54
8002b3c: 6d7b ldr r3, [r7, #84] ; 0x54
8002b3e: b29b uxth r3, r3
8002b40: 029b lsls r3, r3, #10
8002b42: b29a uxth r2, r3
8002b44: 6dbb ldr r3, [r7, #88] ; 0x58
8002b46: 801a strh r2, [r3, #0]
8002b48: e02f b.n 8002baa <HAL_PCD_EP_DB_Transmit+0x736>
8002b4a: 6d3b ldr r3, [r7, #80] ; 0x50
8002b4c: 095b lsrs r3, r3, #5
8002b4e: 657b str r3, [r7, #84] ; 0x54
8002b50: 6d3b ldr r3, [r7, #80] ; 0x50
8002b52: f003 031f and.w r3, r3, #31
8002b56: 2b00 cmp r3, #0
8002b58: d102 bne.n 8002b60 <HAL_PCD_EP_DB_Transmit+0x6ec>
8002b5a: 6d7b ldr r3, [r7, #84] ; 0x54
8002b5c: 3b01 subs r3, #1
8002b5e: 657b str r3, [r7, #84] ; 0x54
8002b60: 6d7b ldr r3, [r7, #84] ; 0x54
8002b62: b29b uxth r3, r3
8002b64: 029b lsls r3, r3, #10
8002b66: b29b uxth r3, r3
8002b68: ea6f 4343 mvn.w r3, r3, lsl #17
8002b6c: ea6f 4353 mvn.w r3, r3, lsr #17
8002b70: b29a uxth r2, r3
8002b72: 6dbb ldr r3, [r7, #88] ; 0x58
8002b74: 801a strh r2, [r3, #0]
8002b76: e018 b.n 8002baa <HAL_PCD_EP_DB_Transmit+0x736>
8002b78: 68bb ldr r3, [r7, #8]
8002b7a: 785b ldrb r3, [r3, #1]
8002b7c: 2b01 cmp r3, #1
8002b7e: d114 bne.n 8002baa <HAL_PCD_EP_DB_Transmit+0x736>
8002b80: 68fb ldr r3, [r7, #12]
8002b82: 681b ldr r3, [r3, #0]
8002b84: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8002b88: b29b uxth r3, r3
8002b8a: 461a mov r2, r3
8002b8c: 6e7b ldr r3, [r7, #100] ; 0x64
8002b8e: 4413 add r3, r2
8002b90: 667b str r3, [r7, #100] ; 0x64
8002b92: 68bb ldr r3, [r7, #8]
8002b94: 781b ldrb r3, [r3, #0]
8002b96: 011a lsls r2, r3, #4
8002b98: 6e7b ldr r3, [r7, #100] ; 0x64
8002b9a: 4413 add r3, r2
8002b9c: f203 430c addw r3, r3, #1036 ; 0x40c
8002ba0: 663b str r3, [r7, #96] ; 0x60
8002ba2: 6d3b ldr r3, [r7, #80] ; 0x50
8002ba4: b29a uxth r2, r3
8002ba6: 6e3b ldr r3, [r7, #96] ; 0x60
8002ba8: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
8002baa: 68fb ldr r3, [r7, #12]
8002bac: 6818 ldr r0, [r3, #0]
8002bae: 68bb ldr r3, [r7, #8]
8002bb0: 6959 ldr r1, [r3, #20]
8002bb2: 68bb ldr r3, [r7, #8]
8002bb4: 895a ldrh r2, [r3, #10]
8002bb6: 6d3b ldr r3, [r7, #80] ; 0x50
8002bb8: b29b uxth r3, r3
8002bba: f002 fe26 bl 800580a <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
8002bbe: 68fb ldr r3, [r7, #12]
8002bc0: 681b ldr r3, [r3, #0]
8002bc2: 461a mov r2, r3
8002bc4: 68bb ldr r3, [r7, #8]
8002bc6: 781b ldrb r3, [r3, #0]
8002bc8: 009b lsls r3, r3, #2
8002bca: 4413 add r3, r2
8002bcc: 881b ldrh r3, [r3, #0]
8002bce: b29b uxth r3, r3
8002bd0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8002bd4: f023 0340 bic.w r3, r3, #64 ; 0x40
8002bd8: 823b strh r3, [r7, #16]
8002bda: 8a3b ldrh r3, [r7, #16]
8002bdc: f083 0310 eor.w r3, r3, #16
8002be0: 823b strh r3, [r7, #16]
8002be2: 8a3b ldrh r3, [r7, #16]
8002be4: f083 0320 eor.w r3, r3, #32
8002be8: 823b strh r3, [r7, #16]
8002bea: 68fb ldr r3, [r7, #12]
8002bec: 681b ldr r3, [r3, #0]
8002bee: 461a mov r2, r3
8002bf0: 68bb ldr r3, [r7, #8]
8002bf2: 781b ldrb r3, [r3, #0]
8002bf4: 009b lsls r3, r3, #2
8002bf6: 441a add r2, r3
8002bf8: 8a3b ldrh r3, [r7, #16]
8002bfa: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8002bfe: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8002c02: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8002c06: f043 0380 orr.w r3, r3, #128 ; 0x80
8002c0a: b29b uxth r3, r3
8002c0c: 8013 strh r3, [r2, #0]
return HAL_OK;
8002c0e: 2300 movs r3, #0
}
8002c10: 4618 mov r0, r3
8002c12: 3788 adds r7, #136 ; 0x88
8002c14: 46bd mov sp, r7
8002c16: bd80 pop {r7, pc}
08002c18 <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
8002c18: b480 push {r7}
8002c1a: b087 sub sp, #28
8002c1c: af00 add r7, sp, #0
8002c1e: 60f8 str r0, [r7, #12]
8002c20: 607b str r3, [r7, #4]
8002c22: 460b mov r3, r1
8002c24: 817b strh r3, [r7, #10]
8002c26: 4613 mov r3, r2
8002c28: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
8002c2a: 897b ldrh r3, [r7, #10]
8002c2c: f003 0380 and.w r3, r3, #128 ; 0x80
8002c30: b29b uxth r3, r3
8002c32: 2b00 cmp r3, #0
8002c34: d00b beq.n 8002c4e <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8002c36: 897b ldrh r3, [r7, #10]
8002c38: f003 0307 and.w r3, r3, #7
8002c3c: 1c5a adds r2, r3, #1
8002c3e: 4613 mov r3, r2
8002c40: 009b lsls r3, r3, #2
8002c42: 4413 add r3, r2
8002c44: 00db lsls r3, r3, #3
8002c46: 68fa ldr r2, [r7, #12]
8002c48: 4413 add r3, r2
8002c4a: 617b str r3, [r7, #20]
8002c4c: e009 b.n 8002c62 <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8002c4e: 897a ldrh r2, [r7, #10]
8002c50: 4613 mov r3, r2
8002c52: 009b lsls r3, r3, #2
8002c54: 4413 add r3, r2
8002c56: 00db lsls r3, r3, #3
8002c58: f503 73b4 add.w r3, r3, #360 ; 0x168
8002c5c: 68fa ldr r2, [r7, #12]
8002c5e: 4413 add r3, r2
8002c60: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
8002c62: 893b ldrh r3, [r7, #8]
8002c64: 2b00 cmp r3, #0
8002c66: d107 bne.n 8002c78 <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
8002c68: 697b ldr r3, [r7, #20]
8002c6a: 2200 movs r2, #0
8002c6c: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
8002c6e: 687b ldr r3, [r7, #4]
8002c70: b29a uxth r2, r3
8002c72: 697b ldr r3, [r7, #20]
8002c74: 80da strh r2, [r3, #6]
8002c76: e00b b.n 8002c90 <HAL_PCDEx_PMAConfig+0x78>
}
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
8002c78: 697b ldr r3, [r7, #20]
8002c7a: 2201 movs r2, #1
8002c7c: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
8002c7e: 687b ldr r3, [r7, #4]
8002c80: b29a uxth r2, r3
8002c82: 697b ldr r3, [r7, #20]
8002c84: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
8002c86: 687b ldr r3, [r7, #4]
8002c88: 0c1b lsrs r3, r3, #16
8002c8a: b29a uxth r2, r3
8002c8c: 697b ldr r3, [r7, #20]
8002c8e: 815a strh r2, [r3, #10]
}
return HAL_OK;
8002c90: 2300 movs r3, #0
}
8002c92: 4618 mov r0, r3
8002c94: 371c adds r7, #28
8002c96: 46bd mov sp, r7
8002c98: bc80 pop {r7}
8002c9a: 4770 bx lr
08002c9c <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8002c9c: b580 push {r7, lr}
8002c9e: b086 sub sp, #24
8002ca0: af00 add r7, sp, #0
8002ca2: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
8002ca4: 687b ldr r3, [r7, #4]
8002ca6: 2b00 cmp r3, #0
8002ca8: d101 bne.n 8002cae <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
8002caa: 2301 movs r3, #1
8002cac: e26c b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8002cae: 687b ldr r3, [r7, #4]
8002cb0: 681b ldr r3, [r3, #0]
8002cb2: f003 0301 and.w r3, r3, #1
8002cb6: 2b00 cmp r3, #0
8002cb8: f000 8087 beq.w 8002dca <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
8002cbc: 4b92 ldr r3, [pc, #584] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002cbe: 685b ldr r3, [r3, #4]
8002cc0: f003 030c and.w r3, r3, #12
8002cc4: 2b04 cmp r3, #4
8002cc6: d00c beq.n 8002ce2 <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
8002cc8: 4b8f ldr r3, [pc, #572] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002cca: 685b ldr r3, [r3, #4]
8002ccc: f003 030c and.w r3, r3, #12
8002cd0: 2b08 cmp r3, #8
8002cd2: d112 bne.n 8002cfa <HAL_RCC_OscConfig+0x5e>
8002cd4: 4b8c ldr r3, [pc, #560] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002cd6: 685b ldr r3, [r3, #4]
8002cd8: f403 3380 and.w r3, r3, #65536 ; 0x10000
8002cdc: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
8002ce0: d10b bne.n 8002cfa <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8002ce2: 4b89 ldr r3, [pc, #548] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002ce4: 681b ldr r3, [r3, #0]
8002ce6: f403 3300 and.w r3, r3, #131072 ; 0x20000
8002cea: 2b00 cmp r3, #0
8002cec: d06c beq.n 8002dc8 <HAL_RCC_OscConfig+0x12c>
8002cee: 687b ldr r3, [r7, #4]
8002cf0: 685b ldr r3, [r3, #4]
8002cf2: 2b00 cmp r3, #0
8002cf4: d168 bne.n 8002dc8 <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
8002cf6: 2301 movs r3, #1
8002cf8: e246 b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8002cfa: 687b ldr r3, [r7, #4]
8002cfc: 685b ldr r3, [r3, #4]
8002cfe: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
8002d02: d106 bne.n 8002d12 <HAL_RCC_OscConfig+0x76>
8002d04: 4b80 ldr r3, [pc, #512] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d06: 681b ldr r3, [r3, #0]
8002d08: 4a7f ldr r2, [pc, #508] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d0a: f443 3380 orr.w r3, r3, #65536 ; 0x10000
8002d0e: 6013 str r3, [r2, #0]
8002d10: e02e b.n 8002d70 <HAL_RCC_OscConfig+0xd4>
8002d12: 687b ldr r3, [r7, #4]
8002d14: 685b ldr r3, [r3, #4]
8002d16: 2b00 cmp r3, #0
8002d18: d10c bne.n 8002d34 <HAL_RCC_OscConfig+0x98>
8002d1a: 4b7b ldr r3, [pc, #492] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d1c: 681b ldr r3, [r3, #0]
8002d1e: 4a7a ldr r2, [pc, #488] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d20: f423 3380 bic.w r3, r3, #65536 ; 0x10000
8002d24: 6013 str r3, [r2, #0]
8002d26: 4b78 ldr r3, [pc, #480] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d28: 681b ldr r3, [r3, #0]
8002d2a: 4a77 ldr r2, [pc, #476] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d2c: f423 2380 bic.w r3, r3, #262144 ; 0x40000
8002d30: 6013 str r3, [r2, #0]
8002d32: e01d b.n 8002d70 <HAL_RCC_OscConfig+0xd4>
8002d34: 687b ldr r3, [r7, #4]
8002d36: 685b ldr r3, [r3, #4]
8002d38: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
8002d3c: d10c bne.n 8002d58 <HAL_RCC_OscConfig+0xbc>
8002d3e: 4b72 ldr r3, [pc, #456] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d40: 681b ldr r3, [r3, #0]
8002d42: 4a71 ldr r2, [pc, #452] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d44: f443 2380 orr.w r3, r3, #262144 ; 0x40000
8002d48: 6013 str r3, [r2, #0]
8002d4a: 4b6f ldr r3, [pc, #444] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d4c: 681b ldr r3, [r3, #0]
8002d4e: 4a6e ldr r2, [pc, #440] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d50: f443 3380 orr.w r3, r3, #65536 ; 0x10000
8002d54: 6013 str r3, [r2, #0]
8002d56: e00b b.n 8002d70 <HAL_RCC_OscConfig+0xd4>
8002d58: 4b6b ldr r3, [pc, #428] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d5a: 681b ldr r3, [r3, #0]
8002d5c: 4a6a ldr r2, [pc, #424] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d5e: f423 3380 bic.w r3, r3, #65536 ; 0x10000
8002d62: 6013 str r3, [r2, #0]
8002d64: 4b68 ldr r3, [pc, #416] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d66: 681b ldr r3, [r3, #0]
8002d68: 4a67 ldr r2, [pc, #412] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d6a: f423 2380 bic.w r3, r3, #262144 ; 0x40000
8002d6e: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
8002d70: 687b ldr r3, [r7, #4]
8002d72: 685b ldr r3, [r3, #4]
8002d74: 2b00 cmp r3, #0
8002d76: d013 beq.n 8002da0 <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8002d78: f7fd fcee bl 8000758 <HAL_GetTick>
8002d7c: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8002d7e: e008 b.n 8002d92 <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8002d80: f7fd fcea bl 8000758 <HAL_GetTick>
8002d84: 4602 mov r2, r0
8002d86: 693b ldr r3, [r7, #16]
8002d88: 1ad3 subs r3, r2, r3
8002d8a: 2b64 cmp r3, #100 ; 0x64
8002d8c: d901 bls.n 8002d92 <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
8002d8e: 2303 movs r3, #3
8002d90: e1fa b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8002d92: 4b5d ldr r3, [pc, #372] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002d94: 681b ldr r3, [r3, #0]
8002d96: f403 3300 and.w r3, r3, #131072 ; 0x20000
8002d9a: 2b00 cmp r3, #0
8002d9c: d0f0 beq.n 8002d80 <HAL_RCC_OscConfig+0xe4>
8002d9e: e014 b.n 8002dca <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8002da0: f7fd fcda bl 8000758 <HAL_GetTick>
8002da4: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8002da6: e008 b.n 8002dba <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8002da8: f7fd fcd6 bl 8000758 <HAL_GetTick>
8002dac: 4602 mov r2, r0
8002dae: 693b ldr r3, [r7, #16]
8002db0: 1ad3 subs r3, r2, r3
8002db2: 2b64 cmp r3, #100 ; 0x64
8002db4: d901 bls.n 8002dba <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
8002db6: 2303 movs r3, #3
8002db8: e1e6 b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8002dba: 4b53 ldr r3, [pc, #332] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002dbc: 681b ldr r3, [r3, #0]
8002dbe: f403 3300 and.w r3, r3, #131072 ; 0x20000
8002dc2: 2b00 cmp r3, #0
8002dc4: d1f0 bne.n 8002da8 <HAL_RCC_OscConfig+0x10c>
8002dc6: e000 b.n 8002dca <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8002dc8: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
8002dca: 687b ldr r3, [r7, #4]
8002dcc: 681b ldr r3, [r3, #0]
8002dce: f003 0302 and.w r3, r3, #2
8002dd2: 2b00 cmp r3, #0
8002dd4: d063 beq.n 8002e9e <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
8002dd6: 4b4c ldr r3, [pc, #304] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002dd8: 685b ldr r3, [r3, #4]
8002dda: f003 030c and.w r3, r3, #12
8002dde: 2b00 cmp r3, #0
8002de0: d00b beq.n 8002dfa <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
8002de2: 4b49 ldr r3, [pc, #292] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002de4: 685b ldr r3, [r3, #4]
8002de6: f003 030c and.w r3, r3, #12
8002dea: 2b08 cmp r3, #8
8002dec: d11c bne.n 8002e28 <HAL_RCC_OscConfig+0x18c>
8002dee: 4b46 ldr r3, [pc, #280] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002df0: 685b ldr r3, [r3, #4]
8002df2: f403 3380 and.w r3, r3, #65536 ; 0x10000
8002df6: 2b00 cmp r3, #0
8002df8: d116 bne.n 8002e28 <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8002dfa: 4b43 ldr r3, [pc, #268] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002dfc: 681b ldr r3, [r3, #0]
8002dfe: f003 0302 and.w r3, r3, #2
8002e02: 2b00 cmp r3, #0
8002e04: d005 beq.n 8002e12 <HAL_RCC_OscConfig+0x176>
8002e06: 687b ldr r3, [r7, #4]
8002e08: 691b ldr r3, [r3, #16]
8002e0a: 2b01 cmp r3, #1
8002e0c: d001 beq.n 8002e12 <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
8002e0e: 2301 movs r3, #1
8002e10: e1ba b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8002e12: 4b3d ldr r3, [pc, #244] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002e14: 681b ldr r3, [r3, #0]
8002e16: f023 02f8 bic.w r2, r3, #248 ; 0xf8
8002e1a: 687b ldr r3, [r7, #4]
8002e1c: 695b ldr r3, [r3, #20]
8002e1e: 00db lsls r3, r3, #3
8002e20: 4939 ldr r1, [pc, #228] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002e22: 4313 orrs r3, r2
8002e24: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8002e26: e03a b.n 8002e9e <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
8002e28: 687b ldr r3, [r7, #4]
8002e2a: 691b ldr r3, [r3, #16]
8002e2c: 2b00 cmp r3, #0
8002e2e: d020 beq.n 8002e72 <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8002e30: 4b36 ldr r3, [pc, #216] ; (8002f0c <HAL_RCC_OscConfig+0x270>)
8002e32: 2201 movs r2, #1
8002e34: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002e36: f7fd fc8f bl 8000758 <HAL_GetTick>
8002e3a: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8002e3c: e008 b.n 8002e50 <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8002e3e: f7fd fc8b bl 8000758 <HAL_GetTick>
8002e42: 4602 mov r2, r0
8002e44: 693b ldr r3, [r7, #16]
8002e46: 1ad3 subs r3, r2, r3
8002e48: 2b02 cmp r3, #2
8002e4a: d901 bls.n 8002e50 <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
8002e4c: 2303 movs r3, #3
8002e4e: e19b b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8002e50: 4b2d ldr r3, [pc, #180] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002e52: 681b ldr r3, [r3, #0]
8002e54: f003 0302 and.w r3, r3, #2
8002e58: 2b00 cmp r3, #0
8002e5a: d0f0 beq.n 8002e3e <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8002e5c: 4b2a ldr r3, [pc, #168] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002e5e: 681b ldr r3, [r3, #0]
8002e60: f023 02f8 bic.w r2, r3, #248 ; 0xf8
8002e64: 687b ldr r3, [r7, #4]
8002e66: 695b ldr r3, [r3, #20]
8002e68: 00db lsls r3, r3, #3
8002e6a: 4927 ldr r1, [pc, #156] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002e6c: 4313 orrs r3, r2
8002e6e: 600b str r3, [r1, #0]
8002e70: e015 b.n 8002e9e <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8002e72: 4b26 ldr r3, [pc, #152] ; (8002f0c <HAL_RCC_OscConfig+0x270>)
8002e74: 2200 movs r2, #0
8002e76: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002e78: f7fd fc6e bl 8000758 <HAL_GetTick>
8002e7c: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8002e7e: e008 b.n 8002e92 <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8002e80: f7fd fc6a bl 8000758 <HAL_GetTick>
8002e84: 4602 mov r2, r0
8002e86: 693b ldr r3, [r7, #16]
8002e88: 1ad3 subs r3, r2, r3
8002e8a: 2b02 cmp r3, #2
8002e8c: d901 bls.n 8002e92 <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
8002e8e: 2303 movs r3, #3
8002e90: e17a b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8002e92: 4b1d ldr r3, [pc, #116] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002e94: 681b ldr r3, [r3, #0]
8002e96: f003 0302 and.w r3, r3, #2
8002e9a: 2b00 cmp r3, #0
8002e9c: d1f0 bne.n 8002e80 <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8002e9e: 687b ldr r3, [r7, #4]
8002ea0: 681b ldr r3, [r3, #0]
8002ea2: f003 0308 and.w r3, r3, #8
8002ea6: 2b00 cmp r3, #0
8002ea8: d03a beq.n 8002f20 <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
8002eaa: 687b ldr r3, [r7, #4]
8002eac: 699b ldr r3, [r3, #24]
8002eae: 2b00 cmp r3, #0
8002eb0: d019 beq.n 8002ee6 <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
8002eb2: 4b17 ldr r3, [pc, #92] ; (8002f10 <HAL_RCC_OscConfig+0x274>)
8002eb4: 2201 movs r2, #1
8002eb6: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002eb8: f7fd fc4e bl 8000758 <HAL_GetTick>
8002ebc: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8002ebe: e008 b.n 8002ed2 <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8002ec0: f7fd fc4a bl 8000758 <HAL_GetTick>
8002ec4: 4602 mov r2, r0
8002ec6: 693b ldr r3, [r7, #16]
8002ec8: 1ad3 subs r3, r2, r3
8002eca: 2b02 cmp r3, #2
8002ecc: d901 bls.n 8002ed2 <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
8002ece: 2303 movs r3, #3
8002ed0: e15a b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8002ed2: 4b0d ldr r3, [pc, #52] ; (8002f08 <HAL_RCC_OscConfig+0x26c>)
8002ed4: 6a5b ldr r3, [r3, #36] ; 0x24
8002ed6: f003 0302 and.w r3, r3, #2
8002eda: 2b00 cmp r3, #0
8002edc: d0f0 beq.n 8002ec0 <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
8002ede: 2001 movs r0, #1
8002ee0: f000 fad8 bl 8003494 <RCC_Delay>
8002ee4: e01c b.n 8002f20 <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
8002ee6: 4b0a ldr r3, [pc, #40] ; (8002f10 <HAL_RCC_OscConfig+0x274>)
8002ee8: 2200 movs r2, #0
8002eea: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002eec: f7fd fc34 bl 8000758 <HAL_GetTick>
8002ef0: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8002ef2: e00f b.n 8002f14 <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8002ef4: f7fd fc30 bl 8000758 <HAL_GetTick>
8002ef8: 4602 mov r2, r0
8002efa: 693b ldr r3, [r7, #16]
8002efc: 1ad3 subs r3, r2, r3
8002efe: 2b02 cmp r3, #2
8002f00: d908 bls.n 8002f14 <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
8002f02: 2303 movs r3, #3
8002f04: e140 b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
8002f06: bf00 nop
8002f08: 40021000 .word 0x40021000
8002f0c: 42420000 .word 0x42420000
8002f10: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8002f14: 4b9e ldr r3, [pc, #632] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002f16: 6a5b ldr r3, [r3, #36] ; 0x24
8002f18: f003 0302 and.w r3, r3, #2
8002f1c: 2b00 cmp r3, #0
8002f1e: d1e9 bne.n 8002ef4 <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8002f20: 687b ldr r3, [r7, #4]
8002f22: 681b ldr r3, [r3, #0]
8002f24: f003 0304 and.w r3, r3, #4
8002f28: 2b00 cmp r3, #0
8002f2a: f000 80a6 beq.w 800307a <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
8002f2e: 2300 movs r3, #0
8002f30: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8002f32: 4b97 ldr r3, [pc, #604] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002f34: 69db ldr r3, [r3, #28]
8002f36: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8002f3a: 2b00 cmp r3, #0
8002f3c: d10d bne.n 8002f5a <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
8002f3e: 4b94 ldr r3, [pc, #592] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002f40: 69db ldr r3, [r3, #28]
8002f42: 4a93 ldr r2, [pc, #588] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002f44: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8002f48: 61d3 str r3, [r2, #28]
8002f4a: 4b91 ldr r3, [pc, #580] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002f4c: 69db ldr r3, [r3, #28]
8002f4e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8002f52: 60bb str r3, [r7, #8]
8002f54: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8002f56: 2301 movs r3, #1
8002f58: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8002f5a: 4b8e ldr r3, [pc, #568] ; (8003194 <HAL_RCC_OscConfig+0x4f8>)
8002f5c: 681b ldr r3, [r3, #0]
8002f5e: f403 7380 and.w r3, r3, #256 ; 0x100
8002f62: 2b00 cmp r3, #0
8002f64: d118 bne.n 8002f98 <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8002f66: 4b8b ldr r3, [pc, #556] ; (8003194 <HAL_RCC_OscConfig+0x4f8>)
8002f68: 681b ldr r3, [r3, #0]
8002f6a: 4a8a ldr r2, [pc, #552] ; (8003194 <HAL_RCC_OscConfig+0x4f8>)
8002f6c: f443 7380 orr.w r3, r3, #256 ; 0x100
8002f70: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8002f72: f7fd fbf1 bl 8000758 <HAL_GetTick>
8002f76: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8002f78: e008 b.n 8002f8c <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8002f7a: f7fd fbed bl 8000758 <HAL_GetTick>
8002f7e: 4602 mov r2, r0
8002f80: 693b ldr r3, [r7, #16]
8002f82: 1ad3 subs r3, r2, r3
8002f84: 2b64 cmp r3, #100 ; 0x64
8002f86: d901 bls.n 8002f8c <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
8002f88: 2303 movs r3, #3
8002f8a: e0fd b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8002f8c: 4b81 ldr r3, [pc, #516] ; (8003194 <HAL_RCC_OscConfig+0x4f8>)
8002f8e: 681b ldr r3, [r3, #0]
8002f90: f403 7380 and.w r3, r3, #256 ; 0x100
8002f94: 2b00 cmp r3, #0
8002f96: d0f0 beq.n 8002f7a <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8002f98: 687b ldr r3, [r7, #4]
8002f9a: 68db ldr r3, [r3, #12]
8002f9c: 2b01 cmp r3, #1
8002f9e: d106 bne.n 8002fae <HAL_RCC_OscConfig+0x312>
8002fa0: 4b7b ldr r3, [pc, #492] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002fa2: 6a1b ldr r3, [r3, #32]
8002fa4: 4a7a ldr r2, [pc, #488] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002fa6: f043 0301 orr.w r3, r3, #1
8002faa: 6213 str r3, [r2, #32]
8002fac: e02d b.n 800300a <HAL_RCC_OscConfig+0x36e>
8002fae: 687b ldr r3, [r7, #4]
8002fb0: 68db ldr r3, [r3, #12]
8002fb2: 2b00 cmp r3, #0
8002fb4: d10c bne.n 8002fd0 <HAL_RCC_OscConfig+0x334>
8002fb6: 4b76 ldr r3, [pc, #472] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002fb8: 6a1b ldr r3, [r3, #32]
8002fba: 4a75 ldr r2, [pc, #468] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002fbc: f023 0301 bic.w r3, r3, #1
8002fc0: 6213 str r3, [r2, #32]
8002fc2: 4b73 ldr r3, [pc, #460] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002fc4: 6a1b ldr r3, [r3, #32]
8002fc6: 4a72 ldr r2, [pc, #456] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002fc8: f023 0304 bic.w r3, r3, #4
8002fcc: 6213 str r3, [r2, #32]
8002fce: e01c b.n 800300a <HAL_RCC_OscConfig+0x36e>
8002fd0: 687b ldr r3, [r7, #4]
8002fd2: 68db ldr r3, [r3, #12]
8002fd4: 2b05 cmp r3, #5
8002fd6: d10c bne.n 8002ff2 <HAL_RCC_OscConfig+0x356>
8002fd8: 4b6d ldr r3, [pc, #436] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002fda: 6a1b ldr r3, [r3, #32]
8002fdc: 4a6c ldr r2, [pc, #432] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002fde: f043 0304 orr.w r3, r3, #4
8002fe2: 6213 str r3, [r2, #32]
8002fe4: 4b6a ldr r3, [pc, #424] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002fe6: 6a1b ldr r3, [r3, #32]
8002fe8: 4a69 ldr r2, [pc, #420] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002fea: f043 0301 orr.w r3, r3, #1
8002fee: 6213 str r3, [r2, #32]
8002ff0: e00b b.n 800300a <HAL_RCC_OscConfig+0x36e>
8002ff2: 4b67 ldr r3, [pc, #412] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002ff4: 6a1b ldr r3, [r3, #32]
8002ff6: 4a66 ldr r2, [pc, #408] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8002ff8: f023 0301 bic.w r3, r3, #1
8002ffc: 6213 str r3, [r2, #32]
8002ffe: 4b64 ldr r3, [pc, #400] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8003000: 6a1b ldr r3, [r3, #32]
8003002: 4a63 ldr r2, [pc, #396] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8003004: f023 0304 bic.w r3, r3, #4
8003008: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
800300a: 687b ldr r3, [r7, #4]
800300c: 68db ldr r3, [r3, #12]
800300e: 2b00 cmp r3, #0
8003010: d015 beq.n 800303e <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8003012: f7fd fba1 bl 8000758 <HAL_GetTick>
8003016: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8003018: e00a b.n 8003030 <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800301a: f7fd fb9d bl 8000758 <HAL_GetTick>
800301e: 4602 mov r2, r0
8003020: 693b ldr r3, [r7, #16]
8003022: 1ad3 subs r3, r2, r3
8003024: f241 3288 movw r2, #5000 ; 0x1388
8003028: 4293 cmp r3, r2
800302a: d901 bls.n 8003030 <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
800302c: 2303 movs r3, #3
800302e: e0ab b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8003030: 4b57 ldr r3, [pc, #348] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8003032: 6a1b ldr r3, [r3, #32]
8003034: f003 0302 and.w r3, r3, #2
8003038: 2b00 cmp r3, #0
800303a: d0ee beq.n 800301a <HAL_RCC_OscConfig+0x37e>
800303c: e014 b.n 8003068 <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800303e: f7fd fb8b bl 8000758 <HAL_GetTick>
8003042: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8003044: e00a b.n 800305c <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8003046: f7fd fb87 bl 8000758 <HAL_GetTick>
800304a: 4602 mov r2, r0
800304c: 693b ldr r3, [r7, #16]
800304e: 1ad3 subs r3, r2, r3
8003050: f241 3288 movw r2, #5000 ; 0x1388
8003054: 4293 cmp r3, r2
8003056: d901 bls.n 800305c <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
8003058: 2303 movs r3, #3
800305a: e095 b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
800305c: 4b4c ldr r3, [pc, #304] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
800305e: 6a1b ldr r3, [r3, #32]
8003060: f003 0302 and.w r3, r3, #2
8003064: 2b00 cmp r3, #0
8003066: d1ee bne.n 8003046 <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8003068: 7dfb ldrb r3, [r7, #23]
800306a: 2b01 cmp r3, #1
800306c: d105 bne.n 800307a <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
800306e: 4b48 ldr r3, [pc, #288] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8003070: 69db ldr r3, [r3, #28]
8003072: 4a47 ldr r2, [pc, #284] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8003074: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
8003078: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
800307a: 687b ldr r3, [r7, #4]
800307c: 69db ldr r3, [r3, #28]
800307e: 2b00 cmp r3, #0
8003080: f000 8081 beq.w 8003186 <HAL_RCC_OscConfig+0x4ea>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
8003084: 4b42 ldr r3, [pc, #264] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8003086: 685b ldr r3, [r3, #4]
8003088: f003 030c and.w r3, r3, #12
800308c: 2b08 cmp r3, #8
800308e: d061 beq.n 8003154 <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8003090: 687b ldr r3, [r7, #4]
8003092: 69db ldr r3, [r3, #28]
8003094: 2b02 cmp r3, #2
8003096: d146 bne.n 8003126 <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8003098: 4b3f ldr r3, [pc, #252] ; (8003198 <HAL_RCC_OscConfig+0x4fc>)
800309a: 2200 movs r2, #0
800309c: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800309e: f7fd fb5b bl 8000758 <HAL_GetTick>
80030a2: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80030a4: e008 b.n 80030b8 <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80030a6: f7fd fb57 bl 8000758 <HAL_GetTick>
80030aa: 4602 mov r2, r0
80030ac: 693b ldr r3, [r7, #16]
80030ae: 1ad3 subs r3, r2, r3
80030b0: 2b02 cmp r3, #2
80030b2: d901 bls.n 80030b8 <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
80030b4: 2303 movs r3, #3
80030b6: e067 b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80030b8: 4b35 ldr r3, [pc, #212] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
80030ba: 681b ldr r3, [r3, #0]
80030bc: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
80030c0: 2b00 cmp r3, #0
80030c2: d1f0 bne.n 80030a6 <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
80030c4: 687b ldr r3, [r7, #4]
80030c6: 6a1b ldr r3, [r3, #32]
80030c8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
80030cc: d108 bne.n 80030e0 <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
80030ce: 4b30 ldr r3, [pc, #192] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
80030d0: 685b ldr r3, [r3, #4]
80030d2: f423 3200 bic.w r2, r3, #131072 ; 0x20000
80030d6: 687b ldr r3, [r7, #4]
80030d8: 689b ldr r3, [r3, #8]
80030da: 492d ldr r1, [pc, #180] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
80030dc: 4313 orrs r3, r2
80030de: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
80030e0: 4b2b ldr r3, [pc, #172] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
80030e2: 685b ldr r3, [r3, #4]
80030e4: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000
80030e8: 687b ldr r3, [r7, #4]
80030ea: 6a19 ldr r1, [r3, #32]
80030ec: 687b ldr r3, [r7, #4]
80030ee: 6a5b ldr r3, [r3, #36] ; 0x24
80030f0: 430b orrs r3, r1
80030f2: 4927 ldr r1, [pc, #156] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
80030f4: 4313 orrs r3, r2
80030f6: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
80030f8: 4b27 ldr r3, [pc, #156] ; (8003198 <HAL_RCC_OscConfig+0x4fc>)
80030fa: 2201 movs r2, #1
80030fc: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80030fe: f7fd fb2b bl 8000758 <HAL_GetTick>
8003102: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8003104: e008 b.n 8003118 <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8003106: f7fd fb27 bl 8000758 <HAL_GetTick>
800310a: 4602 mov r2, r0
800310c: 693b ldr r3, [r7, #16]
800310e: 1ad3 subs r3, r2, r3
8003110: 2b02 cmp r3, #2
8003112: d901 bls.n 8003118 <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
8003114: 2303 movs r3, #3
8003116: e037 b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8003118: 4b1d ldr r3, [pc, #116] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
800311a: 681b ldr r3, [r3, #0]
800311c: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8003120: 2b00 cmp r3, #0
8003122: d0f0 beq.n 8003106 <HAL_RCC_OscConfig+0x46a>
8003124: e02f b.n 8003186 <HAL_RCC_OscConfig+0x4ea>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8003126: 4b1c ldr r3, [pc, #112] ; (8003198 <HAL_RCC_OscConfig+0x4fc>)
8003128: 2200 movs r2, #0
800312a: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800312c: f7fd fb14 bl 8000758 <HAL_GetTick>
8003130: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8003132: e008 b.n 8003146 <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8003134: f7fd fb10 bl 8000758 <HAL_GetTick>
8003138: 4602 mov r2, r0
800313a: 693b ldr r3, [r7, #16]
800313c: 1ad3 subs r3, r2, r3
800313e: 2b02 cmp r3, #2
8003140: d901 bls.n 8003146 <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
8003142: 2303 movs r3, #3
8003144: e020 b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8003146: 4b12 ldr r3, [pc, #72] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8003148: 681b ldr r3, [r3, #0]
800314a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
800314e: 2b00 cmp r3, #0
8003150: d1f0 bne.n 8003134 <HAL_RCC_OscConfig+0x498>
8003152: e018 b.n 8003186 <HAL_RCC_OscConfig+0x4ea>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8003154: 687b ldr r3, [r7, #4]
8003156: 69db ldr r3, [r3, #28]
8003158: 2b01 cmp r3, #1
800315a: d101 bne.n 8003160 <HAL_RCC_OscConfig+0x4c4>
{
return HAL_ERROR;
800315c: 2301 movs r3, #1
800315e: e013 b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
8003160: 4b0b ldr r3, [pc, #44] ; (8003190 <HAL_RCC_OscConfig+0x4f4>)
8003162: 685b ldr r3, [r3, #4]
8003164: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8003166: 68fb ldr r3, [r7, #12]
8003168: f403 3280 and.w r2, r3, #65536 ; 0x10000
800316c: 687b ldr r3, [r7, #4]
800316e: 6a1b ldr r3, [r3, #32]
8003170: 429a cmp r2, r3
8003172: d106 bne.n 8003182 <HAL_RCC_OscConfig+0x4e6>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
8003174: 68fb ldr r3, [r7, #12]
8003176: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000
800317a: 687b ldr r3, [r7, #4]
800317c: 6a5b ldr r3, [r3, #36] ; 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
800317e: 429a cmp r2, r3
8003180: d001 beq.n 8003186 <HAL_RCC_OscConfig+0x4ea>
{
return HAL_ERROR;
8003182: 2301 movs r3, #1
8003184: e000 b.n 8003188 <HAL_RCC_OscConfig+0x4ec>
}
}
}
}
return HAL_OK;
8003186: 2300 movs r3, #0
}
8003188: 4618 mov r0, r3
800318a: 3718 adds r7, #24
800318c: 46bd mov sp, r7
800318e: bd80 pop {r7, pc}
8003190: 40021000 .word 0x40021000
8003194: 40007000 .word 0x40007000
8003198: 42420060 .word 0x42420060
0800319c <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
800319c: b580 push {r7, lr}
800319e: b084 sub sp, #16
80031a0: af00 add r7, sp, #0
80031a2: 6078 str r0, [r7, #4]
80031a4: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
80031a6: 687b ldr r3, [r7, #4]
80031a8: 2b00 cmp r3, #0
80031aa: d101 bne.n 80031b0 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
80031ac: 2301 movs r3, #1
80031ae: e0d0 b.n 8003352 <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
80031b0: 4b6a ldr r3, [pc, #424] ; (800335c <HAL_RCC_ClockConfig+0x1c0>)
80031b2: 681b ldr r3, [r3, #0]
80031b4: f003 0307 and.w r3, r3, #7
80031b8: 683a ldr r2, [r7, #0]
80031ba: 429a cmp r2, r3
80031bc: d910 bls.n 80031e0 <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80031be: 4b67 ldr r3, [pc, #412] ; (800335c <HAL_RCC_ClockConfig+0x1c0>)
80031c0: 681b ldr r3, [r3, #0]
80031c2: f023 0207 bic.w r2, r3, #7
80031c6: 4965 ldr r1, [pc, #404] ; (800335c <HAL_RCC_ClockConfig+0x1c0>)
80031c8: 683b ldr r3, [r7, #0]
80031ca: 4313 orrs r3, r2
80031cc: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
80031ce: 4b63 ldr r3, [pc, #396] ; (800335c <HAL_RCC_ClockConfig+0x1c0>)
80031d0: 681b ldr r3, [r3, #0]
80031d2: f003 0307 and.w r3, r3, #7
80031d6: 683a ldr r2, [r7, #0]
80031d8: 429a cmp r2, r3
80031da: d001 beq.n 80031e0 <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
80031dc: 2301 movs r3, #1
80031de: e0b8 b.n 8003352 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
80031e0: 687b ldr r3, [r7, #4]
80031e2: 681b ldr r3, [r3, #0]
80031e4: f003 0302 and.w r3, r3, #2
80031e8: 2b00 cmp r3, #0
80031ea: d020 beq.n 800322e <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80031ec: 687b ldr r3, [r7, #4]
80031ee: 681b ldr r3, [r3, #0]
80031f0: f003 0304 and.w r3, r3, #4
80031f4: 2b00 cmp r3, #0
80031f6: d005 beq.n 8003204 <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
80031f8: 4b59 ldr r3, [pc, #356] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
80031fa: 685b ldr r3, [r3, #4]
80031fc: 4a58 ldr r2, [pc, #352] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
80031fe: f443 63e0 orr.w r3, r3, #1792 ; 0x700
8003202: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8003204: 687b ldr r3, [r7, #4]
8003206: 681b ldr r3, [r3, #0]
8003208: f003 0308 and.w r3, r3, #8
800320c: 2b00 cmp r3, #0
800320e: d005 beq.n 800321c <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8003210: 4b53 ldr r3, [pc, #332] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
8003212: 685b ldr r3, [r3, #4]
8003214: 4a52 ldr r2, [pc, #328] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
8003216: f443 5360 orr.w r3, r3, #14336 ; 0x3800
800321a: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
800321c: 4b50 ldr r3, [pc, #320] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
800321e: 685b ldr r3, [r3, #4]
8003220: f023 02f0 bic.w r2, r3, #240 ; 0xf0
8003224: 687b ldr r3, [r7, #4]
8003226: 689b ldr r3, [r3, #8]
8003228: 494d ldr r1, [pc, #308] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
800322a: 4313 orrs r3, r2
800322c: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
800322e: 687b ldr r3, [r7, #4]
8003230: 681b ldr r3, [r3, #0]
8003232: f003 0301 and.w r3, r3, #1
8003236: 2b00 cmp r3, #0
8003238: d040 beq.n 80032bc <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
800323a: 687b ldr r3, [r7, #4]
800323c: 685b ldr r3, [r3, #4]
800323e: 2b01 cmp r3, #1
8003240: d107 bne.n 8003252 <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8003242: 4b47 ldr r3, [pc, #284] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
8003244: 681b ldr r3, [r3, #0]
8003246: f403 3300 and.w r3, r3, #131072 ; 0x20000
800324a: 2b00 cmp r3, #0
800324c: d115 bne.n 800327a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
800324e: 2301 movs r3, #1
8003250: e07f b.n 8003352 <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
8003252: 687b ldr r3, [r7, #4]
8003254: 685b ldr r3, [r3, #4]
8003256: 2b02 cmp r3, #2
8003258: d107 bne.n 800326a <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
800325a: 4b41 ldr r3, [pc, #260] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
800325c: 681b ldr r3, [r3, #0]
800325e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8003262: 2b00 cmp r3, #0
8003264: d109 bne.n 800327a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8003266: 2301 movs r3, #1
8003268: e073 b.n 8003352 <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800326a: 4b3d ldr r3, [pc, #244] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
800326c: 681b ldr r3, [r3, #0]
800326e: f003 0302 and.w r3, r3, #2
8003272: 2b00 cmp r3, #0
8003274: d101 bne.n 800327a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8003276: 2301 movs r3, #1
8003278: e06b b.n 8003352 <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
800327a: 4b39 ldr r3, [pc, #228] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
800327c: 685b ldr r3, [r3, #4]
800327e: f023 0203 bic.w r2, r3, #3
8003282: 687b ldr r3, [r7, #4]
8003284: 685b ldr r3, [r3, #4]
8003286: 4936 ldr r1, [pc, #216] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
8003288: 4313 orrs r3, r2
800328a: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
800328c: f7fd fa64 bl 8000758 <HAL_GetTick>
8003290: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8003292: e00a b.n 80032aa <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8003294: f7fd fa60 bl 8000758 <HAL_GetTick>
8003298: 4602 mov r2, r0
800329a: 68fb ldr r3, [r7, #12]
800329c: 1ad3 subs r3, r2, r3
800329e: f241 3288 movw r2, #5000 ; 0x1388
80032a2: 4293 cmp r3, r2
80032a4: d901 bls.n 80032aa <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
80032a6: 2303 movs r3, #3
80032a8: e053 b.n 8003352 <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
80032aa: 4b2d ldr r3, [pc, #180] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
80032ac: 685b ldr r3, [r3, #4]
80032ae: f003 020c and.w r2, r3, #12
80032b2: 687b ldr r3, [r7, #4]
80032b4: 685b ldr r3, [r3, #4]
80032b6: 009b lsls r3, r3, #2
80032b8: 429a cmp r2, r3
80032ba: d1eb bne.n 8003294 <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
80032bc: 4b27 ldr r3, [pc, #156] ; (800335c <HAL_RCC_ClockConfig+0x1c0>)
80032be: 681b ldr r3, [r3, #0]
80032c0: f003 0307 and.w r3, r3, #7
80032c4: 683a ldr r2, [r7, #0]
80032c6: 429a cmp r2, r3
80032c8: d210 bcs.n 80032ec <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80032ca: 4b24 ldr r3, [pc, #144] ; (800335c <HAL_RCC_ClockConfig+0x1c0>)
80032cc: 681b ldr r3, [r3, #0]
80032ce: f023 0207 bic.w r2, r3, #7
80032d2: 4922 ldr r1, [pc, #136] ; (800335c <HAL_RCC_ClockConfig+0x1c0>)
80032d4: 683b ldr r3, [r7, #0]
80032d6: 4313 orrs r3, r2
80032d8: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
80032da: 4b20 ldr r3, [pc, #128] ; (800335c <HAL_RCC_ClockConfig+0x1c0>)
80032dc: 681b ldr r3, [r3, #0]
80032de: f003 0307 and.w r3, r3, #7
80032e2: 683a ldr r2, [r7, #0]
80032e4: 429a cmp r2, r3
80032e6: d001 beq.n 80032ec <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
80032e8: 2301 movs r3, #1
80032ea: e032 b.n 8003352 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80032ec: 687b ldr r3, [r7, #4]
80032ee: 681b ldr r3, [r3, #0]
80032f0: f003 0304 and.w r3, r3, #4
80032f4: 2b00 cmp r3, #0
80032f6: d008 beq.n 800330a <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
80032f8: 4b19 ldr r3, [pc, #100] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
80032fa: 685b ldr r3, [r3, #4]
80032fc: f423 62e0 bic.w r2, r3, #1792 ; 0x700
8003300: 687b ldr r3, [r7, #4]
8003302: 68db ldr r3, [r3, #12]
8003304: 4916 ldr r1, [pc, #88] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
8003306: 4313 orrs r3, r2
8003308: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
800330a: 687b ldr r3, [r7, #4]
800330c: 681b ldr r3, [r3, #0]
800330e: f003 0308 and.w r3, r3, #8
8003312: 2b00 cmp r3, #0
8003314: d009 beq.n 800332a <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
8003316: 4b12 ldr r3, [pc, #72] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
8003318: 685b ldr r3, [r3, #4]
800331a: f423 5260 bic.w r2, r3, #14336 ; 0x3800
800331e: 687b ldr r3, [r7, #4]
8003320: 691b ldr r3, [r3, #16]
8003322: 00db lsls r3, r3, #3
8003324: 490e ldr r1, [pc, #56] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
8003326: 4313 orrs r3, r2
8003328: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
800332a: f000 f821 bl 8003370 <HAL_RCC_GetSysClockFreq>
800332e: 4602 mov r2, r0
8003330: 4b0b ldr r3, [pc, #44] ; (8003360 <HAL_RCC_ClockConfig+0x1c4>)
8003332: 685b ldr r3, [r3, #4]
8003334: 091b lsrs r3, r3, #4
8003336: f003 030f and.w r3, r3, #15
800333a: 490a ldr r1, [pc, #40] ; (8003364 <HAL_RCC_ClockConfig+0x1c8>)
800333c: 5ccb ldrb r3, [r1, r3]
800333e: fa22 f303 lsr.w r3, r2, r3
8003342: 4a09 ldr r2, [pc, #36] ; (8003368 <HAL_RCC_ClockConfig+0x1cc>)
8003344: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
8003346: 4b09 ldr r3, [pc, #36] ; (800336c <HAL_RCC_ClockConfig+0x1d0>)
8003348: 681b ldr r3, [r3, #0]
800334a: 4618 mov r0, r3
800334c: f7fd f9c2 bl 80006d4 <HAL_InitTick>
return HAL_OK;
8003350: 2300 movs r3, #0
}
8003352: 4618 mov r0, r3
8003354: 3710 adds r7, #16
8003356: 46bd mov sp, r7
8003358: bd80 pop {r7, pc}
800335a: bf00 nop
800335c: 40022000 .word 0x40022000
8003360: 40021000 .word 0x40021000
8003364: 0800808c .word 0x0800808c
8003368: 20000000 .word 0x20000000
800336c: 20000004 .word 0x20000004
08003370 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
8003370: b490 push {r4, r7}
8003372: b08a sub sp, #40 ; 0x28
8003374: af00 add r7, sp, #0
#if defined(RCC_CFGR2_PREDIV1SRC)
const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13};
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
#else
const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
8003376: 4b2a ldr r3, [pc, #168] ; (8003420 <HAL_RCC_GetSysClockFreq+0xb0>)
8003378: 1d3c adds r4, r7, #4
800337a: cb0f ldmia r3, {r0, r1, r2, r3}
800337c: e884 000f stmia.w r4, {r0, r1, r2, r3}
#if defined(RCC_CFGR2_PREDIV1)
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
#else
const uint8_t aPredivFactorTable[2] = {1, 2};
8003380: f240 2301 movw r3, #513 ; 0x201
8003384: 803b strh r3, [r7, #0]
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
8003386: 2300 movs r3, #0
8003388: 61fb str r3, [r7, #28]
800338a: 2300 movs r3, #0
800338c: 61bb str r3, [r7, #24]
800338e: 2300 movs r3, #0
8003390: 627b str r3, [r7, #36] ; 0x24
8003392: 2300 movs r3, #0
8003394: 617b str r3, [r7, #20]
uint32_t sysclockfreq = 0U;
8003396: 2300 movs r3, #0
8003398: 623b str r3, [r7, #32]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
800339a: 4b22 ldr r3, [pc, #136] ; (8003424 <HAL_RCC_GetSysClockFreq+0xb4>)
800339c: 685b ldr r3, [r3, #4]
800339e: 61fb str r3, [r7, #28]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
80033a0: 69fb ldr r3, [r7, #28]
80033a2: f003 030c and.w r3, r3, #12
80033a6: 2b04 cmp r3, #4
80033a8: d002 beq.n 80033b0 <HAL_RCC_GetSysClockFreq+0x40>
80033aa: 2b08 cmp r3, #8
80033ac: d003 beq.n 80033b6 <HAL_RCC_GetSysClockFreq+0x46>
80033ae: e02d b.n 800340c <HAL_RCC_GetSysClockFreq+0x9c>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
80033b0: 4b1d ldr r3, [pc, #116] ; (8003428 <HAL_RCC_GetSysClockFreq+0xb8>)
80033b2: 623b str r3, [r7, #32]
break;
80033b4: e02d b.n 8003412 <HAL_RCC_GetSysClockFreq+0xa2>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
80033b6: 69fb ldr r3, [r7, #28]
80033b8: 0c9b lsrs r3, r3, #18
80033ba: f003 030f and.w r3, r3, #15
80033be: f107 0228 add.w r2, r7, #40 ; 0x28
80033c2: 4413 add r3, r2
80033c4: f813 3c24 ldrb.w r3, [r3, #-36]
80033c8: 617b str r3, [r7, #20]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
80033ca: 69fb ldr r3, [r7, #28]
80033cc: f403 3380 and.w r3, r3, #65536 ; 0x10000
80033d0: 2b00 cmp r3, #0
80033d2: d013 beq.n 80033fc <HAL_RCC_GetSysClockFreq+0x8c>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
80033d4: 4b13 ldr r3, [pc, #76] ; (8003424 <HAL_RCC_GetSysClockFreq+0xb4>)
80033d6: 685b ldr r3, [r3, #4]
80033d8: 0c5b lsrs r3, r3, #17
80033da: f003 0301 and.w r3, r3, #1
80033de: f107 0228 add.w r2, r7, #40 ; 0x28
80033e2: 4413 add r3, r2
80033e4: f813 3c28 ldrb.w r3, [r3, #-40]
80033e8: 61bb str r3, [r7, #24]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
80033ea: 697b ldr r3, [r7, #20]
80033ec: 4a0e ldr r2, [pc, #56] ; (8003428 <HAL_RCC_GetSysClockFreq+0xb8>)
80033ee: fb02 f203 mul.w r2, r2, r3
80033f2: 69bb ldr r3, [r7, #24]
80033f4: fbb2 f3f3 udiv r3, r2, r3
80033f8: 627b str r3, [r7, #36] ; 0x24
80033fa: e004 b.n 8003406 <HAL_RCC_GetSysClockFreq+0x96>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
80033fc: 697b ldr r3, [r7, #20]
80033fe: 4a0b ldr r2, [pc, #44] ; (800342c <HAL_RCC_GetSysClockFreq+0xbc>)
8003400: fb02 f303 mul.w r3, r2, r3
8003404: 627b str r3, [r7, #36] ; 0x24
}
sysclockfreq = pllclk;
8003406: 6a7b ldr r3, [r7, #36] ; 0x24
8003408: 623b str r3, [r7, #32]
break;
800340a: e002 b.n 8003412 <HAL_RCC_GetSysClockFreq+0xa2>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
800340c: 4b06 ldr r3, [pc, #24] ; (8003428 <HAL_RCC_GetSysClockFreq+0xb8>)
800340e: 623b str r3, [r7, #32]
break;
8003410: bf00 nop
}
}
return sysclockfreq;
8003412: 6a3b ldr r3, [r7, #32]
}
8003414: 4618 mov r0, r3
8003416: 3728 adds r7, #40 ; 0x28
8003418: 46bd mov sp, r7
800341a: bc90 pop {r4, r7}
800341c: 4770 bx lr
800341e: bf00 nop
8003420: 08007fcc .word 0x08007fcc
8003424: 40021000 .word 0x40021000
8003428: 007a1200 .word 0x007a1200
800342c: 003d0900 .word 0x003d0900
08003430 <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
8003430: b480 push {r7}
8003432: af00 add r7, sp, #0
return SystemCoreClock;
8003434: 4b02 ldr r3, [pc, #8] ; (8003440 <HAL_RCC_GetHCLKFreq+0x10>)
8003436: 681b ldr r3, [r3, #0]
}
8003438: 4618 mov r0, r3
800343a: 46bd mov sp, r7
800343c: bc80 pop {r7}
800343e: 4770 bx lr
8003440: 20000000 .word 0x20000000
08003444 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
8003444: b580 push {r7, lr}
8003446: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
8003448: f7ff fff2 bl 8003430 <HAL_RCC_GetHCLKFreq>
800344c: 4602 mov r2, r0
800344e: 4b05 ldr r3, [pc, #20] ; (8003464 <HAL_RCC_GetPCLK1Freq+0x20>)
8003450: 685b ldr r3, [r3, #4]
8003452: 0a1b lsrs r3, r3, #8
8003454: f003 0307 and.w r3, r3, #7
8003458: 4903 ldr r1, [pc, #12] ; (8003468 <HAL_RCC_GetPCLK1Freq+0x24>)
800345a: 5ccb ldrb r3, [r1, r3]
800345c: fa22 f303 lsr.w r3, r2, r3
}
8003460: 4618 mov r0, r3
8003462: bd80 pop {r7, pc}
8003464: 40021000 .word 0x40021000
8003468: 0800809c .word 0x0800809c
0800346c <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
800346c: b580 push {r7, lr}
800346e: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
8003470: f7ff ffde bl 8003430 <HAL_RCC_GetHCLKFreq>
8003474: 4602 mov r2, r0
8003476: 4b05 ldr r3, [pc, #20] ; (800348c <HAL_RCC_GetPCLK2Freq+0x20>)
8003478: 685b ldr r3, [r3, #4]
800347a: 0adb lsrs r3, r3, #11
800347c: f003 0307 and.w r3, r3, #7
8003480: 4903 ldr r1, [pc, #12] ; (8003490 <HAL_RCC_GetPCLK2Freq+0x24>)
8003482: 5ccb ldrb r3, [r1, r3]
8003484: fa22 f303 lsr.w r3, r2, r3
}
8003488: 4618 mov r0, r3
800348a: bd80 pop {r7, pc}
800348c: 40021000 .word 0x40021000
8003490: 0800809c .word 0x0800809c
08003494 <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
8003494: b480 push {r7}
8003496: b085 sub sp, #20
8003498: af00 add r7, sp, #0
800349a: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
800349c: 4b0a ldr r3, [pc, #40] ; (80034c8 <RCC_Delay+0x34>)
800349e: 681b ldr r3, [r3, #0]
80034a0: 4a0a ldr r2, [pc, #40] ; (80034cc <RCC_Delay+0x38>)
80034a2: fba2 2303 umull r2, r3, r2, r3
80034a6: 0a5b lsrs r3, r3, #9
80034a8: 687a ldr r2, [r7, #4]
80034aa: fb02 f303 mul.w r3, r2, r3
80034ae: 60fb str r3, [r7, #12]
do
{
__NOP();
80034b0: bf00 nop
}
while (Delay --);
80034b2: 68fb ldr r3, [r7, #12]
80034b4: 1e5a subs r2, r3, #1
80034b6: 60fa str r2, [r7, #12]
80034b8: 2b00 cmp r3, #0
80034ba: d1f9 bne.n 80034b0 <RCC_Delay+0x1c>
}
80034bc: bf00 nop
80034be: bf00 nop
80034c0: 3714 adds r7, #20
80034c2: 46bd mov sp, r7
80034c4: bc80 pop {r7}
80034c6: 4770 bx lr
80034c8: 20000000 .word 0x20000000
80034cc: 10624dd3 .word 0x10624dd3
080034d0 <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
80034d0: b580 push {r7, lr}
80034d2: b086 sub sp, #24
80034d4: af00 add r7, sp, #0
80034d6: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
80034d8: 2300 movs r3, #0
80034da: 613b str r3, [r7, #16]
80034dc: 2300 movs r3, #0
80034de: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
80034e0: 687b ldr r3, [r7, #4]
80034e2: 681b ldr r3, [r3, #0]
80034e4: f003 0301 and.w r3, r3, #1
80034e8: 2b00 cmp r3, #0
80034ea: d07d beq.n 80035e8 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
FlagStatus pwrclkchanged = RESET;
80034ec: 2300 movs r3, #0
80034ee: 75fb strb r3, [r7, #23]
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
80034f0: 4b4f ldr r3, [pc, #316] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80034f2: 69db ldr r3, [r3, #28]
80034f4: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
80034f8: 2b00 cmp r3, #0
80034fa: d10d bne.n 8003518 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
80034fc: 4b4c ldr r3, [pc, #304] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80034fe: 69db ldr r3, [r3, #28]
8003500: 4a4b ldr r2, [pc, #300] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003502: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8003506: 61d3 str r3, [r2, #28]
8003508: 4b49 ldr r3, [pc, #292] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800350a: 69db ldr r3, [r3, #28]
800350c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8003510: 60bb str r3, [r7, #8]
8003512: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8003514: 2301 movs r3, #1
8003516: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003518: 4b46 ldr r3, [pc, #280] ; (8003634 <HAL_RCCEx_PeriphCLKConfig+0x164>)
800351a: 681b ldr r3, [r3, #0]
800351c: f403 7380 and.w r3, r3, #256 ; 0x100
8003520: 2b00 cmp r3, #0
8003522: d118 bne.n 8003556 <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8003524: 4b43 ldr r3, [pc, #268] ; (8003634 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003526: 681b ldr r3, [r3, #0]
8003528: 4a42 ldr r2, [pc, #264] ; (8003634 <HAL_RCCEx_PeriphCLKConfig+0x164>)
800352a: f443 7380 orr.w r3, r3, #256 ; 0x100
800352e: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8003530: f7fd f912 bl 8000758 <HAL_GetTick>
8003534: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003536: e008 b.n 800354a <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8003538: f7fd f90e bl 8000758 <HAL_GetTick>
800353c: 4602 mov r2, r0
800353e: 693b ldr r3, [r7, #16]
8003540: 1ad3 subs r3, r2, r3
8003542: 2b64 cmp r3, #100 ; 0x64
8003544: d901 bls.n 800354a <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
8003546: 2303 movs r3, #3
8003548: e06d b.n 8003626 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800354a: 4b3a ldr r3, [pc, #232] ; (8003634 <HAL_RCCEx_PeriphCLKConfig+0x164>)
800354c: 681b ldr r3, [r3, #0]
800354e: f403 7380 and.w r3, r3, #256 ; 0x100
8003552: 2b00 cmp r3, #0
8003554: d0f0 beq.n 8003538 <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
8003556: 4b36 ldr r3, [pc, #216] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003558: 6a1b ldr r3, [r3, #32]
800355a: f403 7340 and.w r3, r3, #768 ; 0x300
800355e: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
8003560: 68fb ldr r3, [r7, #12]
8003562: 2b00 cmp r3, #0
8003564: d02e beq.n 80035c4 <HAL_RCCEx_PeriphCLKConfig+0xf4>
8003566: 687b ldr r3, [r7, #4]
8003568: 685b ldr r3, [r3, #4]
800356a: f403 7340 and.w r3, r3, #768 ; 0x300
800356e: 68fa ldr r2, [r7, #12]
8003570: 429a cmp r2, r3
8003572: d027 beq.n 80035c4 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8003574: 4b2e ldr r3, [pc, #184] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003576: 6a1b ldr r3, [r3, #32]
8003578: f423 7340 bic.w r3, r3, #768 ; 0x300
800357c: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
800357e: 4b2e ldr r3, [pc, #184] ; (8003638 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8003580: 2201 movs r2, #1
8003582: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
8003584: 4b2c ldr r3, [pc, #176] ; (8003638 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8003586: 2200 movs r2, #0
8003588: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
800358a: 4a29 ldr r2, [pc, #164] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800358c: 68fb ldr r3, [r7, #12]
800358e: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
8003590: 68fb ldr r3, [r7, #12]
8003592: f003 0301 and.w r3, r3, #1
8003596: 2b00 cmp r3, #0
8003598: d014 beq.n 80035c4 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800359a: f7fd f8dd bl 8000758 <HAL_GetTick>
800359e: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
80035a0: e00a b.n 80035b8 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
80035a2: f7fd f8d9 bl 8000758 <HAL_GetTick>
80035a6: 4602 mov r2, r0
80035a8: 693b ldr r3, [r7, #16]
80035aa: 1ad3 subs r3, r2, r3
80035ac: f241 3288 movw r2, #5000 ; 0x1388
80035b0: 4293 cmp r3, r2
80035b2: d901 bls.n 80035b8 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
80035b4: 2303 movs r3, #3
80035b6: e036 b.n 8003626 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
80035b8: 4b1d ldr r3, [pc, #116] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80035ba: 6a1b ldr r3, [r3, #32]
80035bc: f003 0302 and.w r3, r3, #2
80035c0: 2b00 cmp r3, #0
80035c2: d0ee beq.n 80035a2 <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
80035c4: 4b1a ldr r3, [pc, #104] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80035c6: 6a1b ldr r3, [r3, #32]
80035c8: f423 7240 bic.w r2, r3, #768 ; 0x300
80035cc: 687b ldr r3, [r7, #4]
80035ce: 685b ldr r3, [r3, #4]
80035d0: 4917 ldr r1, [pc, #92] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80035d2: 4313 orrs r3, r2
80035d4: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
80035d6: 7dfb ldrb r3, [r7, #23]
80035d8: 2b01 cmp r3, #1
80035da: d105 bne.n 80035e8 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
80035dc: 4b14 ldr r3, [pc, #80] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80035de: 69db ldr r3, [r3, #28]
80035e0: 4a13 ldr r2, [pc, #76] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80035e2: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
80035e6: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
80035e8: 687b ldr r3, [r7, #4]
80035ea: 681b ldr r3, [r3, #0]
80035ec: f003 0302 and.w r3, r3, #2
80035f0: 2b00 cmp r3, #0
80035f2: d008 beq.n 8003606 <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
80035f4: 4b0e ldr r3, [pc, #56] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80035f6: 685b ldr r3, [r3, #4]
80035f8: f423 4240 bic.w r2, r3, #49152 ; 0xc000
80035fc: 687b ldr r3, [r7, #4]
80035fe: 689b ldr r3, [r3, #8]
8003600: 490b ldr r1, [pc, #44] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003602: 4313 orrs r3, r2
8003604: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
8003606: 687b ldr r3, [r7, #4]
8003608: 681b ldr r3, [r3, #0]
800360a: f003 0310 and.w r3, r3, #16
800360e: 2b00 cmp r3, #0
8003610: d008 beq.n 8003624 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
8003612: 4b07 ldr r3, [pc, #28] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003614: 685b ldr r3, [r3, #4]
8003616: f423 0280 bic.w r2, r3, #4194304 ; 0x400000
800361a: 687b ldr r3, [r7, #4]
800361c: 68db ldr r3, [r3, #12]
800361e: 4904 ldr r1, [pc, #16] ; (8003630 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003620: 4313 orrs r3, r2
8003622: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
8003624: 2300 movs r3, #0
}
8003626: 4618 mov r0, r3
8003628: 3718 adds r7, #24
800362a: 46bd mov sp, r7
800362c: bd80 pop {r7, pc}
800362e: bf00 nop
8003630: 40021000 .word 0x40021000
8003634: 40007000 .word 0x40007000
8003638: 42420440 .word 0x42420440
0800363c <HAL_UART_Init>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
800363c: b580 push {r7, lr}
800363e: b082 sub sp, #8
8003640: af00 add r7, sp, #0
8003642: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
8003644: 687b ldr r3, [r7, #4]
8003646: 2b00 cmp r3, #0
8003648: d101 bne.n 800364e <HAL_UART_Init+0x12>
{
return HAL_ERROR;
800364a: 2301 movs r3, #1
800364c: e03f b.n 80036ce <HAL_UART_Init+0x92>
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
#if defined(USART_CR1_OVER8)
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
#endif /* USART_CR1_OVER8 */
if (huart->gState == HAL_UART_STATE_RESET)
800364e: 687b ldr r3, [r7, #4]
8003650: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
8003654: b2db uxtb r3, r3
8003656: 2b00 cmp r3, #0
8003658: d106 bne.n 8003668 <HAL_UART_Init+0x2c>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
800365a: 687b ldr r3, [r7, #4]
800365c: 2200 movs r2, #0
800365e: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
8003662: 6878 ldr r0, [r7, #4]
8003664: f7fc ff76 bl 8000554 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
8003668: 687b ldr r3, [r7, #4]
800366a: 2224 movs r2, #36 ; 0x24
800366c: f883 203d strb.w r2, [r3, #61] ; 0x3d
/* Disable the peripheral */
__HAL_UART_DISABLE(huart);
8003670: 687b ldr r3, [r7, #4]
8003672: 681b ldr r3, [r3, #0]
8003674: 68da ldr r2, [r3, #12]
8003676: 687b ldr r3, [r7, #4]
8003678: 681b ldr r3, [r3, #0]
800367a: f422 5200 bic.w r2, r2, #8192 ; 0x2000
800367e: 60da str r2, [r3, #12]
/* Set the UART Communication parameters */
UART_SetConfig(huart);
8003680: 6878 ldr r0, [r7, #4]
8003682: f000 f829 bl 80036d8 <UART_SetConfig>
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
8003686: 687b ldr r3, [r7, #4]
8003688: 681b ldr r3, [r3, #0]
800368a: 691a ldr r2, [r3, #16]
800368c: 687b ldr r3, [r7, #4]
800368e: 681b ldr r3, [r3, #0]
8003690: f422 4290 bic.w r2, r2, #18432 ; 0x4800
8003694: 611a str r2, [r3, #16]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
8003696: 687b ldr r3, [r7, #4]
8003698: 681b ldr r3, [r3, #0]
800369a: 695a ldr r2, [r3, #20]
800369c: 687b ldr r3, [r7, #4]
800369e: 681b ldr r3, [r3, #0]
80036a0: f022 022a bic.w r2, r2, #42 ; 0x2a
80036a4: 615a str r2, [r3, #20]
/* Enable the peripheral */
__HAL_UART_ENABLE(huart);
80036a6: 687b ldr r3, [r7, #4]
80036a8: 681b ldr r3, [r3, #0]
80036aa: 68da ldr r2, [r3, #12]
80036ac: 687b ldr r3, [r7, #4]
80036ae: 681b ldr r3, [r3, #0]
80036b0: f442 5200 orr.w r2, r2, #8192 ; 0x2000
80036b4: 60da str r2, [r3, #12]
/* Initialize the UART state */
huart->ErrorCode = HAL_UART_ERROR_NONE;
80036b6: 687b ldr r3, [r7, #4]
80036b8: 2200 movs r2, #0
80036ba: 641a str r2, [r3, #64] ; 0x40
huart->gState = HAL_UART_STATE_READY;
80036bc: 687b ldr r3, [r7, #4]
80036be: 2220 movs r2, #32
80036c0: f883 203d strb.w r2, [r3, #61] ; 0x3d
huart->RxState = HAL_UART_STATE_READY;
80036c4: 687b ldr r3, [r7, #4]
80036c6: 2220 movs r2, #32
80036c8: f883 203e strb.w r2, [r3, #62] ; 0x3e
return HAL_OK;
80036cc: 2300 movs r3, #0
}
80036ce: 4618 mov r0, r3
80036d0: 3708 adds r7, #8
80036d2: 46bd mov sp, r7
80036d4: bd80 pop {r7, pc}
...
080036d8 <UART_SetConfig>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
80036d8: b580 push {r7, lr}
80036da: b084 sub sp, #16
80036dc: af00 add r7, sp, #0
80036de: 6078 str r0, [r7, #4]
assert_param(IS_UART_MODE(huart->Init.Mode));
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits
according to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
80036e0: 687b ldr r3, [r7, #4]
80036e2: 681b ldr r3, [r3, #0]
80036e4: 691b ldr r3, [r3, #16]
80036e6: f423 5140 bic.w r1, r3, #12288 ; 0x3000
80036ea: 687b ldr r3, [r7, #4]
80036ec: 68da ldr r2, [r3, #12]
80036ee: 687b ldr r3, [r7, #4]
80036f0: 681b ldr r3, [r3, #0]
80036f2: 430a orrs r2, r1
80036f4: 611a str r2, [r3, #16]
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
MODIFY_REG(huart->Instance->CR1,
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
tmpreg);
#else
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
80036f6: 687b ldr r3, [r7, #4]
80036f8: 689a ldr r2, [r3, #8]
80036fa: 687b ldr r3, [r7, #4]
80036fc: 691b ldr r3, [r3, #16]
80036fe: 431a orrs r2, r3
8003700: 687b ldr r3, [r7, #4]
8003702: 695b ldr r3, [r3, #20]
8003704: 4313 orrs r3, r2
8003706: 60bb str r3, [r7, #8]
MODIFY_REG(huart->Instance->CR1,
8003708: 687b ldr r3, [r7, #4]
800370a: 681b ldr r3, [r3, #0]
800370c: 68db ldr r3, [r3, #12]
800370e: f423 53b0 bic.w r3, r3, #5632 ; 0x1600
8003712: f023 030c bic.w r3, r3, #12
8003716: 687a ldr r2, [r7, #4]
8003718: 6812 ldr r2, [r2, #0]
800371a: 68b9 ldr r1, [r7, #8]
800371c: 430b orrs r3, r1
800371e: 60d3 str r3, [r2, #12]
tmpreg);
#endif /* USART_CR1_OVER8 */
/*-------------------------- USART CR3 Configuration -----------------------*/
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
8003720: 687b ldr r3, [r7, #4]
8003722: 681b ldr r3, [r3, #0]
8003724: 695b ldr r3, [r3, #20]
8003726: f423 7140 bic.w r1, r3, #768 ; 0x300
800372a: 687b ldr r3, [r7, #4]
800372c: 699a ldr r2, [r3, #24]
800372e: 687b ldr r3, [r7, #4]
8003730: 681b ldr r3, [r3, #0]
8003732: 430a orrs r2, r1
8003734: 615a str r2, [r3, #20]
if(huart->Instance == USART1)
8003736: 687b ldr r3, [r7, #4]
8003738: 681b ldr r3, [r3, #0]
800373a: 4a2c ldr r2, [pc, #176] ; (80037ec <UART_SetConfig+0x114>)
800373c: 4293 cmp r3, r2
800373e: d103 bne.n 8003748 <UART_SetConfig+0x70>
{
pclk = HAL_RCC_GetPCLK2Freq();
8003740: f7ff fe94 bl 800346c <HAL_RCC_GetPCLK2Freq>
8003744: 60f8 str r0, [r7, #12]
8003746: e002 b.n 800374e <UART_SetConfig+0x76>
}
else
{
pclk = HAL_RCC_GetPCLK1Freq();
8003748: f7ff fe7c bl 8003444 <HAL_RCC_GetPCLK1Freq>
800374c: 60f8 str r0, [r7, #12]
else
{
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
}
#else
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
800374e: 68fa ldr r2, [r7, #12]
8003750: 4613 mov r3, r2
8003752: 009b lsls r3, r3, #2
8003754: 4413 add r3, r2
8003756: 009a lsls r2, r3, #2
8003758: 441a add r2, r3
800375a: 687b ldr r3, [r7, #4]
800375c: 685b ldr r3, [r3, #4]
800375e: 009b lsls r3, r3, #2
8003760: fbb2 f3f3 udiv r3, r2, r3
8003764: 4a22 ldr r2, [pc, #136] ; (80037f0 <UART_SetConfig+0x118>)
8003766: fba2 2303 umull r2, r3, r2, r3
800376a: 095b lsrs r3, r3, #5
800376c: 0119 lsls r1, r3, #4
800376e: 68fa ldr r2, [r7, #12]
8003770: 4613 mov r3, r2
8003772: 009b lsls r3, r3, #2
8003774: 4413 add r3, r2
8003776: 009a lsls r2, r3, #2
8003778: 441a add r2, r3
800377a: 687b ldr r3, [r7, #4]
800377c: 685b ldr r3, [r3, #4]
800377e: 009b lsls r3, r3, #2
8003780: fbb2 f2f3 udiv r2, r2, r3
8003784: 4b1a ldr r3, [pc, #104] ; (80037f0 <UART_SetConfig+0x118>)
8003786: fba3 0302 umull r0, r3, r3, r2
800378a: 095b lsrs r3, r3, #5
800378c: 2064 movs r0, #100 ; 0x64
800378e: fb00 f303 mul.w r3, r0, r3
8003792: 1ad3 subs r3, r2, r3
8003794: 011b lsls r3, r3, #4
8003796: 3332 adds r3, #50 ; 0x32
8003798: 4a15 ldr r2, [pc, #84] ; (80037f0 <UART_SetConfig+0x118>)
800379a: fba2 2303 umull r2, r3, r2, r3
800379e: 095b lsrs r3, r3, #5
80037a0: f003 03f0 and.w r3, r3, #240 ; 0xf0
80037a4: 4419 add r1, r3
80037a6: 68fa ldr r2, [r7, #12]
80037a8: 4613 mov r3, r2
80037aa: 009b lsls r3, r3, #2
80037ac: 4413 add r3, r2
80037ae: 009a lsls r2, r3, #2
80037b0: 441a add r2, r3
80037b2: 687b ldr r3, [r7, #4]
80037b4: 685b ldr r3, [r3, #4]
80037b6: 009b lsls r3, r3, #2
80037b8: fbb2 f2f3 udiv r2, r2, r3
80037bc: 4b0c ldr r3, [pc, #48] ; (80037f0 <UART_SetConfig+0x118>)
80037be: fba3 0302 umull r0, r3, r3, r2
80037c2: 095b lsrs r3, r3, #5
80037c4: 2064 movs r0, #100 ; 0x64
80037c6: fb00 f303 mul.w r3, r0, r3
80037ca: 1ad3 subs r3, r2, r3
80037cc: 011b lsls r3, r3, #4
80037ce: 3332 adds r3, #50 ; 0x32
80037d0: 4a07 ldr r2, [pc, #28] ; (80037f0 <UART_SetConfig+0x118>)
80037d2: fba2 2303 umull r2, r3, r2, r3
80037d6: 095b lsrs r3, r3, #5
80037d8: f003 020f and.w r2, r3, #15
80037dc: 687b ldr r3, [r7, #4]
80037de: 681b ldr r3, [r3, #0]
80037e0: 440a add r2, r1
80037e2: 609a str r2, [r3, #8]
#endif /* USART_CR1_OVER8 */
}
80037e4: bf00 nop
80037e6: 3710 adds r7, #16
80037e8: 46bd mov sp, r7
80037ea: bd80 pop {r7, pc}
80037ec: 40013800 .word 0x40013800
80037f0: 51eb851f .word 0x51eb851f
080037f4 <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
80037f4: b084 sub sp, #16
80037f6: b480 push {r7}
80037f8: b083 sub sp, #12
80037fa: af00 add r7, sp, #0
80037fc: 6078 str r0, [r7, #4]
80037fe: f107 0014 add.w r0, r7, #20
8003802: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8003806: 2300 movs r3, #0
}
8003808: 4618 mov r0, r3
800380a: 370c adds r7, #12
800380c: 46bd mov sp, r7
800380e: bc80 pop {r7}
8003810: b004 add sp, #16
8003812: 4770 bx lr
08003814 <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
8003814: b480 push {r7}
8003816: b085 sub sp, #20
8003818: af00 add r7, sp, #0
800381a: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
800381c: 687b ldr r3, [r7, #4]
800381e: 2200 movs r2, #0
8003820: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8003824: f44f 433f mov.w r3, #48896 ; 0xbf00
8003828: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
800382a: 68fb ldr r3, [r7, #12]
800382c: b29a uxth r2, r3
800382e: 687b ldr r3, [r7, #4]
8003830: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
return HAL_OK;
8003834: 2300 movs r3, #0
}
8003836: 4618 mov r0, r3
8003838: 3714 adds r7, #20
800383a: 46bd mov sp, r7
800383c: bc80 pop {r7}
800383e: 4770 bx lr
08003840 <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
8003840: b480 push {r7}
8003842: b085 sub sp, #20
8003844: af00 add r7, sp, #0
8003846: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8003848: f44f 433f mov.w r3, #48896 ; 0xbf00
800384c: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
800384e: 687b ldr r3, [r7, #4]
8003850: f8b3 3040 ldrh.w r3, [r3, #64] ; 0x40
8003854: b29a uxth r2, r3
8003856: 68fb ldr r3, [r7, #12]
8003858: b29b uxth r3, r3
800385a: 43db mvns r3, r3
800385c: b29b uxth r3, r3
800385e: 4013 ands r3, r2
8003860: b29a uxth r2, r3
8003862: 687b ldr r3, [r7, #4]
8003864: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
return HAL_OK;
8003868: 2300 movs r3, #0
}
800386a: 4618 mov r0, r3
800386c: 3714 adds r7, #20
800386e: 46bd mov sp, r7
8003870: bc80 pop {r7}
8003872: 4770 bx lr
08003874 <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
8003874: b480 push {r7}
8003876: b083 sub sp, #12
8003878: af00 add r7, sp, #0
800387a: 6078 str r0, [r7, #4]
800387c: 460b mov r3, r1
800387e: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8003880: 2300 movs r3, #0
}
8003882: 4618 mov r0, r3
8003884: 370c adds r7, #12
8003886: 46bd mov sp, r7
8003888: bc80 pop {r7}
800388a: 4770 bx lr
0800388c <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
800388c: b084 sub sp, #16
800388e: b480 push {r7}
8003890: b083 sub sp, #12
8003892: af00 add r7, sp, #0
8003894: 6078 str r0, [r7, #4]
8003896: f107 0014 add.w r0, r7, #20
800389a: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
800389e: 687b ldr r3, [r7, #4]
80038a0: 2201 movs r2, #1
80038a2: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
80038a6: 687b ldr r3, [r7, #4]
80038a8: 2200 movs r2, #0
80038aa: f8a3 2040 strh.w r2, [r3, #64] ; 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
80038ae: 687b ldr r3, [r7, #4]
80038b0: 2200 movs r2, #0
80038b2: f8a3 2044 strh.w r2, [r3, #68] ; 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
80038b6: 687b ldr r3, [r7, #4]
80038b8: 2200 movs r2, #0
80038ba: f8a3 2050 strh.w r2, [r3, #80] ; 0x50
return HAL_OK;
80038be: 2300 movs r3, #0
}
80038c0: 4618 mov r0, r3
80038c2: 370c adds r7, #12
80038c4: 46bd mov sp, r7
80038c6: bc80 pop {r7}
80038c8: b004 add sp, #16
80038ca: 4770 bx lr
080038cc <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80038cc: b480 push {r7}
80038ce: b09b sub sp, #108 ; 0x6c
80038d0: af00 add r7, sp, #0
80038d2: 6078 str r0, [r7, #4]
80038d4: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
80038d6: 2300 movs r3, #0
80038d8: f887 3067 strb.w r3, [r7, #103] ; 0x67
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
80038dc: 687a ldr r2, [r7, #4]
80038de: 683b ldr r3, [r7, #0]
80038e0: 781b ldrb r3, [r3, #0]
80038e2: 009b lsls r3, r3, #2
80038e4: 4413 add r3, r2
80038e6: 881b ldrh r3, [r3, #0]
80038e8: b29b uxth r3, r3
80038ea: f423 43ec bic.w r3, r3, #30208 ; 0x7600
80038ee: f023 0370 bic.w r3, r3, #112 ; 0x70
80038f2: f8a7 3064 strh.w r3, [r7, #100] ; 0x64
/* initialize Endpoint */
switch (ep->type)
80038f6: 683b ldr r3, [r7, #0]
80038f8: 78db ldrb r3, [r3, #3]
80038fa: 2b03 cmp r3, #3
80038fc: d81f bhi.n 800393e <USB_ActivateEndpoint+0x72>
80038fe: a201 add r2, pc, #4 ; (adr r2, 8003904 <USB_ActivateEndpoint+0x38>)
8003900: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003904: 08003915 .word 0x08003915
8003908: 08003931 .word 0x08003931
800390c: 08003947 .word 0x08003947
8003910: 08003923 .word 0x08003923
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
8003914: f8b7 3064 ldrh.w r3, [r7, #100] ; 0x64
8003918: f443 7300 orr.w r3, r3, #512 ; 0x200
800391c: f8a7 3064 strh.w r3, [r7, #100] ; 0x64
break;
8003920: e012 b.n 8003948 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
8003922: f8b7 3064 ldrh.w r3, [r7, #100] ; 0x64
8003926: f443 63c0 orr.w r3, r3, #1536 ; 0x600
800392a: f8a7 3064 strh.w r3, [r7, #100] ; 0x64
break;
800392e: e00b b.n 8003948 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
8003930: f8b7 3064 ldrh.w r3, [r7, #100] ; 0x64
8003934: f443 6380 orr.w r3, r3, #1024 ; 0x400
8003938: f8a7 3064 strh.w r3, [r7, #100] ; 0x64
break;
800393c: e004 b.n 8003948 <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
800393e: 2301 movs r3, #1
8003940: f887 3067 strb.w r3, [r7, #103] ; 0x67
break;
8003944: e000 b.n 8003948 <USB_ActivateEndpoint+0x7c>
break;
8003946: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
8003948: 687a ldr r2, [r7, #4]
800394a: 683b ldr r3, [r7, #0]
800394c: 781b ldrb r3, [r3, #0]
800394e: 009b lsls r3, r3, #2
8003950: 441a add r2, r3
8003952: f8b7 3064 ldrh.w r3, [r7, #100] ; 0x64
8003956: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800395a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800395e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8003962: f043 0380 orr.w r3, r3, #128 ; 0x80
8003966: b29b uxth r3, r3
8003968: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
800396a: 687a ldr r2, [r7, #4]
800396c: 683b ldr r3, [r7, #0]
800396e: 781b ldrb r3, [r3, #0]
8003970: 009b lsls r3, r3, #2
8003972: 4413 add r3, r2
8003974: 881b ldrh r3, [r3, #0]
8003976: b29b uxth r3, r3
8003978: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800397c: f023 0370 bic.w r3, r3, #112 ; 0x70
8003980: b29a uxth r2, r3
8003982: 683b ldr r3, [r7, #0]
8003984: 781b ldrb r3, [r3, #0]
8003986: b29b uxth r3, r3
8003988: 4313 orrs r3, r2
800398a: f8a7 305e strh.w r3, [r7, #94] ; 0x5e
800398e: 687a ldr r2, [r7, #4]
8003990: 683b ldr r3, [r7, #0]
8003992: 781b ldrb r3, [r3, #0]
8003994: 009b lsls r3, r3, #2
8003996: 441a add r2, r3
8003998: f8b7 305e ldrh.w r3, [r7, #94] ; 0x5e
800399c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80039a0: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80039a4: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80039a8: f043 0380 orr.w r3, r3, #128 ; 0x80
80039ac: b29b uxth r3, r3
80039ae: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
80039b0: 683b ldr r3, [r7, #0]
80039b2: 7b1b ldrb r3, [r3, #12]
80039b4: 2b00 cmp r3, #0
80039b6: f040 8149 bne.w 8003c4c <USB_ActivateEndpoint+0x380>
{
if (ep->is_in != 0U)
80039ba: 683b ldr r3, [r7, #0]
80039bc: 785b ldrb r3, [r3, #1]
80039be: 2b00 cmp r3, #0
80039c0: f000 8084 beq.w 8003acc <USB_ActivateEndpoint+0x200>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
80039c4: 687b ldr r3, [r7, #4]
80039c6: 617b str r3, [r7, #20]
80039c8: 687b ldr r3, [r7, #4]
80039ca: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80039ce: b29b uxth r3, r3
80039d0: 461a mov r2, r3
80039d2: 697b ldr r3, [r7, #20]
80039d4: 4413 add r3, r2
80039d6: 617b str r3, [r7, #20]
80039d8: 683b ldr r3, [r7, #0]
80039da: 781b ldrb r3, [r3, #0]
80039dc: 011a lsls r2, r3, #4
80039de: 697b ldr r3, [r7, #20]
80039e0: 4413 add r3, r2
80039e2: f503 6380 add.w r3, r3, #1024 ; 0x400
80039e6: 613b str r3, [r7, #16]
80039e8: 683b ldr r3, [r7, #0]
80039ea: 88db ldrh r3, [r3, #6]
80039ec: 085b lsrs r3, r3, #1
80039ee: b29b uxth r3, r3
80039f0: 005b lsls r3, r3, #1
80039f2: b29a uxth r2, r3
80039f4: 693b ldr r3, [r7, #16]
80039f6: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80039f8: 687a ldr r2, [r7, #4]
80039fa: 683b ldr r3, [r7, #0]
80039fc: 781b ldrb r3, [r3, #0]
80039fe: 009b lsls r3, r3, #2
8003a00: 4413 add r3, r2
8003a02: 881b ldrh r3, [r3, #0]
8003a04: 81fb strh r3, [r7, #14]
8003a06: 89fb ldrh r3, [r7, #14]
8003a08: f003 0340 and.w r3, r3, #64 ; 0x40
8003a0c: 2b00 cmp r3, #0
8003a0e: d01b beq.n 8003a48 <USB_ActivateEndpoint+0x17c>
8003a10: 687a ldr r2, [r7, #4]
8003a12: 683b ldr r3, [r7, #0]
8003a14: 781b ldrb r3, [r3, #0]
8003a16: 009b lsls r3, r3, #2
8003a18: 4413 add r3, r2
8003a1a: 881b ldrh r3, [r3, #0]
8003a1c: b29b uxth r3, r3
8003a1e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8003a22: f023 0370 bic.w r3, r3, #112 ; 0x70
8003a26: 81bb strh r3, [r7, #12]
8003a28: 687a ldr r2, [r7, #4]
8003a2a: 683b ldr r3, [r7, #0]
8003a2c: 781b ldrb r3, [r3, #0]
8003a2e: 009b lsls r3, r3, #2
8003a30: 441a add r2, r3
8003a32: 89bb ldrh r3, [r7, #12]
8003a34: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003a38: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003a3c: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8003a40: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8003a44: b29b uxth r3, r3
8003a46: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8003a48: 683b ldr r3, [r7, #0]
8003a4a: 78db ldrb r3, [r3, #3]
8003a4c: 2b01 cmp r3, #1
8003a4e: d020 beq.n 8003a92 <USB_ActivateEndpoint+0x1c6>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8003a50: 687a ldr r2, [r7, #4]
8003a52: 683b ldr r3, [r7, #0]
8003a54: 781b ldrb r3, [r3, #0]
8003a56: 009b lsls r3, r3, #2
8003a58: 4413 add r3, r2
8003a5a: 881b ldrh r3, [r3, #0]
8003a5c: b29b uxth r3, r3
8003a5e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8003a62: f023 0340 bic.w r3, r3, #64 ; 0x40
8003a66: 813b strh r3, [r7, #8]
8003a68: 893b ldrh r3, [r7, #8]
8003a6a: f083 0320 eor.w r3, r3, #32
8003a6e: 813b strh r3, [r7, #8]
8003a70: 687a ldr r2, [r7, #4]
8003a72: 683b ldr r3, [r7, #0]
8003a74: 781b ldrb r3, [r3, #0]
8003a76: 009b lsls r3, r3, #2
8003a78: 441a add r2, r3
8003a7a: 893b ldrh r3, [r7, #8]
8003a7c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003a80: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003a84: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8003a88: f043 0380 orr.w r3, r3, #128 ; 0x80
8003a8c: b29b uxth r3, r3
8003a8e: 8013 strh r3, [r2, #0]
8003a90: e27f b.n 8003f92 <USB_ActivateEndpoint+0x6c6>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8003a92: 687a ldr r2, [r7, #4]
8003a94: 683b ldr r3, [r7, #0]
8003a96: 781b ldrb r3, [r3, #0]
8003a98: 009b lsls r3, r3, #2
8003a9a: 4413 add r3, r2
8003a9c: 881b ldrh r3, [r3, #0]
8003a9e: b29b uxth r3, r3
8003aa0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8003aa4: f023 0340 bic.w r3, r3, #64 ; 0x40
8003aa8: 817b strh r3, [r7, #10]
8003aaa: 687a ldr r2, [r7, #4]
8003aac: 683b ldr r3, [r7, #0]
8003aae: 781b ldrb r3, [r3, #0]
8003ab0: 009b lsls r3, r3, #2
8003ab2: 441a add r2, r3
8003ab4: 897b ldrh r3, [r7, #10]
8003ab6: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003aba: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003abe: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8003ac2: f043 0380 orr.w r3, r3, #128 ; 0x80
8003ac6: b29b uxth r3, r3
8003ac8: 8013 strh r3, [r2, #0]
8003aca: e262 b.n 8003f92 <USB_ActivateEndpoint+0x6c6>
}
}
else
{
/*Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
8003acc: 687b ldr r3, [r7, #4]
8003ace: 62fb str r3, [r7, #44] ; 0x2c
8003ad0: 687b ldr r3, [r7, #4]
8003ad2: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8003ad6: b29b uxth r3, r3
8003ad8: 461a mov r2, r3
8003ada: 6afb ldr r3, [r7, #44] ; 0x2c
8003adc: 4413 add r3, r2
8003ade: 62fb str r3, [r7, #44] ; 0x2c
8003ae0: 683b ldr r3, [r7, #0]
8003ae2: 781b ldrb r3, [r3, #0]
8003ae4: 011a lsls r2, r3, #4
8003ae6: 6afb ldr r3, [r7, #44] ; 0x2c
8003ae8: 4413 add r3, r2
8003aea: f503 6381 add.w r3, r3, #1032 ; 0x408
8003aee: 62bb str r3, [r7, #40] ; 0x28
8003af0: 683b ldr r3, [r7, #0]
8003af2: 88db ldrh r3, [r3, #6]
8003af4: 085b lsrs r3, r3, #1
8003af6: b29b uxth r3, r3
8003af8: 005b lsls r3, r3, #1
8003afa: b29a uxth r2, r3
8003afc: 6abb ldr r3, [r7, #40] ; 0x28
8003afe: 801a strh r2, [r3, #0]
/*Set the endpoint Receive buffer counter*/
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
8003b00: 687b ldr r3, [r7, #4]
8003b02: 627b str r3, [r7, #36] ; 0x24
8003b04: 687b ldr r3, [r7, #4]
8003b06: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8003b0a: b29b uxth r3, r3
8003b0c: 461a mov r2, r3
8003b0e: 6a7b ldr r3, [r7, #36] ; 0x24
8003b10: 4413 add r3, r2
8003b12: 627b str r3, [r7, #36] ; 0x24
8003b14: 683b ldr r3, [r7, #0]
8003b16: 781b ldrb r3, [r3, #0]
8003b18: 011a lsls r2, r3, #4
8003b1a: 6a7b ldr r3, [r7, #36] ; 0x24
8003b1c: 4413 add r3, r2
8003b1e: f203 430c addw r3, r3, #1036 ; 0x40c
8003b22: 623b str r3, [r7, #32]
8003b24: 683b ldr r3, [r7, #0]
8003b26: 691b ldr r3, [r3, #16]
8003b28: 2b00 cmp r3, #0
8003b2a: d112 bne.n 8003b52 <USB_ActivateEndpoint+0x286>
8003b2c: 6a3b ldr r3, [r7, #32]
8003b2e: 881b ldrh r3, [r3, #0]
8003b30: b29b uxth r3, r3
8003b32: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8003b36: b29a uxth r2, r3
8003b38: 6a3b ldr r3, [r7, #32]
8003b3a: 801a strh r2, [r3, #0]
8003b3c: 6a3b ldr r3, [r7, #32]
8003b3e: 881b ldrh r3, [r3, #0]
8003b40: b29b uxth r3, r3
8003b42: ea6f 4343 mvn.w r3, r3, lsl #17
8003b46: ea6f 4353 mvn.w r3, r3, lsr #17
8003b4a: b29a uxth r2, r3
8003b4c: 6a3b ldr r3, [r7, #32]
8003b4e: 801a strh r2, [r3, #0]
8003b50: e02f b.n 8003bb2 <USB_ActivateEndpoint+0x2e6>
8003b52: 683b ldr r3, [r7, #0]
8003b54: 691b ldr r3, [r3, #16]
8003b56: 2b3e cmp r3, #62 ; 0x3e
8003b58: d813 bhi.n 8003b82 <USB_ActivateEndpoint+0x2b6>
8003b5a: 683b ldr r3, [r7, #0]
8003b5c: 691b ldr r3, [r3, #16]
8003b5e: 085b lsrs r3, r3, #1
8003b60: 663b str r3, [r7, #96] ; 0x60
8003b62: 683b ldr r3, [r7, #0]
8003b64: 691b ldr r3, [r3, #16]
8003b66: f003 0301 and.w r3, r3, #1
8003b6a: 2b00 cmp r3, #0
8003b6c: d002 beq.n 8003b74 <USB_ActivateEndpoint+0x2a8>
8003b6e: 6e3b ldr r3, [r7, #96] ; 0x60
8003b70: 3301 adds r3, #1
8003b72: 663b str r3, [r7, #96] ; 0x60
8003b74: 6e3b ldr r3, [r7, #96] ; 0x60
8003b76: b29b uxth r3, r3
8003b78: 029b lsls r3, r3, #10
8003b7a: b29a uxth r2, r3
8003b7c: 6a3b ldr r3, [r7, #32]
8003b7e: 801a strh r2, [r3, #0]
8003b80: e017 b.n 8003bb2 <USB_ActivateEndpoint+0x2e6>
8003b82: 683b ldr r3, [r7, #0]
8003b84: 691b ldr r3, [r3, #16]
8003b86: 095b lsrs r3, r3, #5
8003b88: 663b str r3, [r7, #96] ; 0x60
8003b8a: 683b ldr r3, [r7, #0]
8003b8c: 691b ldr r3, [r3, #16]
8003b8e: f003 031f and.w r3, r3, #31
8003b92: 2b00 cmp r3, #0
8003b94: d102 bne.n 8003b9c <USB_ActivateEndpoint+0x2d0>
8003b96: 6e3b ldr r3, [r7, #96] ; 0x60
8003b98: 3b01 subs r3, #1
8003b9a: 663b str r3, [r7, #96] ; 0x60
8003b9c: 6e3b ldr r3, [r7, #96] ; 0x60
8003b9e: b29b uxth r3, r3
8003ba0: 029b lsls r3, r3, #10
8003ba2: b29b uxth r3, r3
8003ba4: ea6f 4343 mvn.w r3, r3, lsl #17
8003ba8: ea6f 4353 mvn.w r3, r3, lsr #17
8003bac: b29a uxth r2, r3
8003bae: 6a3b ldr r3, [r7, #32]
8003bb0: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8003bb2: 687a ldr r2, [r7, #4]
8003bb4: 683b ldr r3, [r7, #0]
8003bb6: 781b ldrb r3, [r3, #0]
8003bb8: 009b lsls r3, r3, #2
8003bba: 4413 add r3, r2
8003bbc: 881b ldrh r3, [r3, #0]
8003bbe: 83fb strh r3, [r7, #30]
8003bc0: 8bfb ldrh r3, [r7, #30]
8003bc2: f403 4380 and.w r3, r3, #16384 ; 0x4000
8003bc6: 2b00 cmp r3, #0
8003bc8: d01b beq.n 8003c02 <USB_ActivateEndpoint+0x336>
8003bca: 687a ldr r2, [r7, #4]
8003bcc: 683b ldr r3, [r7, #0]
8003bce: 781b ldrb r3, [r3, #0]
8003bd0: 009b lsls r3, r3, #2
8003bd2: 4413 add r3, r2
8003bd4: 881b ldrh r3, [r3, #0]
8003bd6: b29b uxth r3, r3
8003bd8: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8003bdc: f023 0370 bic.w r3, r3, #112 ; 0x70
8003be0: 83bb strh r3, [r7, #28]
8003be2: 687a ldr r2, [r7, #4]
8003be4: 683b ldr r3, [r7, #0]
8003be6: 781b ldrb r3, [r3, #0]
8003be8: 009b lsls r3, r3, #2
8003bea: 441a add r2, r3
8003bec: 8bbb ldrh r3, [r7, #28]
8003bee: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003bf2: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003bf6: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8003bfa: f043 0380 orr.w r3, r3, #128 ; 0x80
8003bfe: b29b uxth r3, r3
8003c00: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint*/
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8003c02: 687a ldr r2, [r7, #4]
8003c04: 683b ldr r3, [r7, #0]
8003c06: 781b ldrb r3, [r3, #0]
8003c08: 009b lsls r3, r3, #2
8003c0a: 4413 add r3, r2
8003c0c: 881b ldrh r3, [r3, #0]
8003c0e: b29b uxth r3, r3
8003c10: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8003c14: f023 0370 bic.w r3, r3, #112 ; 0x70
8003c18: 837b strh r3, [r7, #26]
8003c1a: 8b7b ldrh r3, [r7, #26]
8003c1c: f483 5380 eor.w r3, r3, #4096 ; 0x1000
8003c20: 837b strh r3, [r7, #26]
8003c22: 8b7b ldrh r3, [r7, #26]
8003c24: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8003c28: 837b strh r3, [r7, #26]
8003c2a: 687a ldr r2, [r7, #4]
8003c2c: 683b ldr r3, [r7, #0]
8003c2e: 781b ldrb r3, [r3, #0]
8003c30: 009b lsls r3, r3, #2
8003c32: 441a add r2, r3
8003c34: 8b7b ldrh r3, [r7, #26]
8003c36: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003c3a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003c3e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8003c42: f043 0380 orr.w r3, r3, #128 ; 0x80
8003c46: b29b uxth r3, r3
8003c48: 8013 strh r3, [r2, #0]
8003c4a: e1a2 b.n 8003f92 <USB_ActivateEndpoint+0x6c6>
}
/*Double Buffer*/
else
{
/* Set the endpoint as double buffered */
PCD_SET_EP_DBUF(USBx, ep->num);
8003c4c: 687a ldr r2, [r7, #4]
8003c4e: 683b ldr r3, [r7, #0]
8003c50: 781b ldrb r3, [r3, #0]
8003c52: 009b lsls r3, r3, #2
8003c54: 4413 add r3, r2
8003c56: 881b ldrh r3, [r3, #0]
8003c58: b29b uxth r3, r3
8003c5a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8003c5e: f023 0370 bic.w r3, r3, #112 ; 0x70
8003c62: f8a7 305c strh.w r3, [r7, #92] ; 0x5c
8003c66: 687a ldr r2, [r7, #4]
8003c68: 683b ldr r3, [r7, #0]
8003c6a: 781b ldrb r3, [r3, #0]
8003c6c: 009b lsls r3, r3, #2
8003c6e: 441a add r2, r3
8003c70: f8b7 305c ldrh.w r3, [r7, #92] ; 0x5c
8003c74: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003c78: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003c7c: f443 4301 orr.w r3, r3, #33024 ; 0x8100
8003c80: f043 0380 orr.w r3, r3, #128 ; 0x80
8003c84: b29b uxth r3, r3
8003c86: 8013 strh r3, [r2, #0]
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
8003c88: 687b ldr r3, [r7, #4]
8003c8a: 65bb str r3, [r7, #88] ; 0x58
8003c8c: 687b ldr r3, [r7, #4]
8003c8e: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8003c92: b29b uxth r3, r3
8003c94: 461a mov r2, r3
8003c96: 6dbb ldr r3, [r7, #88] ; 0x58
8003c98: 4413 add r3, r2
8003c9a: 65bb str r3, [r7, #88] ; 0x58
8003c9c: 683b ldr r3, [r7, #0]
8003c9e: 781b ldrb r3, [r3, #0]
8003ca0: 011a lsls r2, r3, #4
8003ca2: 6dbb ldr r3, [r7, #88] ; 0x58
8003ca4: 4413 add r3, r2
8003ca6: f503 6380 add.w r3, r3, #1024 ; 0x400
8003caa: 657b str r3, [r7, #84] ; 0x54
8003cac: 683b ldr r3, [r7, #0]
8003cae: 891b ldrh r3, [r3, #8]
8003cb0: 085b lsrs r3, r3, #1
8003cb2: b29b uxth r3, r3
8003cb4: 005b lsls r3, r3, #1
8003cb6: b29a uxth r2, r3
8003cb8: 6d7b ldr r3, [r7, #84] ; 0x54
8003cba: 801a strh r2, [r3, #0]
8003cbc: 687b ldr r3, [r7, #4]
8003cbe: 653b str r3, [r7, #80] ; 0x50
8003cc0: 687b ldr r3, [r7, #4]
8003cc2: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8003cc6: b29b uxth r3, r3
8003cc8: 461a mov r2, r3
8003cca: 6d3b ldr r3, [r7, #80] ; 0x50
8003ccc: 4413 add r3, r2
8003cce: 653b str r3, [r7, #80] ; 0x50
8003cd0: 683b ldr r3, [r7, #0]
8003cd2: 781b ldrb r3, [r3, #0]
8003cd4: 011a lsls r2, r3, #4
8003cd6: 6d3b ldr r3, [r7, #80] ; 0x50
8003cd8: 4413 add r3, r2
8003cda: f503 6381 add.w r3, r3, #1032 ; 0x408
8003cde: 64fb str r3, [r7, #76] ; 0x4c
8003ce0: 683b ldr r3, [r7, #0]
8003ce2: 895b ldrh r3, [r3, #10]
8003ce4: 085b lsrs r3, r3, #1
8003ce6: b29b uxth r3, r3
8003ce8: 005b lsls r3, r3, #1
8003cea: b29a uxth r2, r3
8003cec: 6cfb ldr r3, [r7, #76] ; 0x4c
8003cee: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
8003cf0: 683b ldr r3, [r7, #0]
8003cf2: 785b ldrb r3, [r3, #1]
8003cf4: 2b00 cmp r3, #0
8003cf6: f040 8091 bne.w 8003e1c <USB_ActivateEndpoint+0x550>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8003cfa: 687a ldr r2, [r7, #4]
8003cfc: 683b ldr r3, [r7, #0]
8003cfe: 781b ldrb r3, [r3, #0]
8003d00: 009b lsls r3, r3, #2
8003d02: 4413 add r3, r2
8003d04: 881b ldrh r3, [r3, #0]
8003d06: 87bb strh r3, [r7, #60] ; 0x3c
8003d08: 8fbb ldrh r3, [r7, #60] ; 0x3c
8003d0a: f403 4380 and.w r3, r3, #16384 ; 0x4000
8003d0e: 2b00 cmp r3, #0
8003d10: d01b beq.n 8003d4a <USB_ActivateEndpoint+0x47e>
8003d12: 687a ldr r2, [r7, #4]
8003d14: 683b ldr r3, [r7, #0]
8003d16: 781b ldrb r3, [r3, #0]
8003d18: 009b lsls r3, r3, #2
8003d1a: 4413 add r3, r2
8003d1c: 881b ldrh r3, [r3, #0]
8003d1e: b29b uxth r3, r3
8003d20: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8003d24: f023 0370 bic.w r3, r3, #112 ; 0x70
8003d28: 877b strh r3, [r7, #58] ; 0x3a
8003d2a: 687a ldr r2, [r7, #4]
8003d2c: 683b ldr r3, [r7, #0]
8003d2e: 781b ldrb r3, [r3, #0]
8003d30: 009b lsls r3, r3, #2
8003d32: 441a add r2, r3
8003d34: 8f7b ldrh r3, [r7, #58] ; 0x3a
8003d36: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003d3a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003d3e: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8003d42: f043 0380 orr.w r3, r3, #128 ; 0x80
8003d46: b29b uxth r3, r3
8003d48: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8003d4a: 687a ldr r2, [r7, #4]
8003d4c: 683b ldr r3, [r7, #0]
8003d4e: 781b ldrb r3, [r3, #0]
8003d50: 009b lsls r3, r3, #2
8003d52: 4413 add r3, r2
8003d54: 881b ldrh r3, [r3, #0]
8003d56: 873b strh r3, [r7, #56] ; 0x38
8003d58: 8f3b ldrh r3, [r7, #56] ; 0x38
8003d5a: f003 0340 and.w r3, r3, #64 ; 0x40
8003d5e: 2b00 cmp r3, #0
8003d60: d01b beq.n 8003d9a <USB_ActivateEndpoint+0x4ce>
8003d62: 687a ldr r2, [r7, #4]
8003d64: 683b ldr r3, [r7, #0]
8003d66: 781b ldrb r3, [r3, #0]
8003d68: 009b lsls r3, r3, #2
8003d6a: 4413 add r3, r2
8003d6c: 881b ldrh r3, [r3, #0]
8003d6e: b29b uxth r3, r3
8003d70: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8003d74: f023 0370 bic.w r3, r3, #112 ; 0x70
8003d78: 86fb strh r3, [r7, #54] ; 0x36
8003d7a: 687a ldr r2, [r7, #4]
8003d7c: 683b ldr r3, [r7, #0]
8003d7e: 781b ldrb r3, [r3, #0]
8003d80: 009b lsls r3, r3, #2
8003d82: 441a add r2, r3
8003d84: 8efb ldrh r3, [r7, #54] ; 0x36
8003d86: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003d8a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003d8e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8003d92: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8003d96: b29b uxth r3, r3
8003d98: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8003d9a: 687a ldr r2, [r7, #4]
8003d9c: 683b ldr r3, [r7, #0]
8003d9e: 781b ldrb r3, [r3, #0]
8003da0: 009b lsls r3, r3, #2
8003da2: 4413 add r3, r2
8003da4: 881b ldrh r3, [r3, #0]
8003da6: b29b uxth r3, r3
8003da8: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8003dac: f023 0370 bic.w r3, r3, #112 ; 0x70
8003db0: 86bb strh r3, [r7, #52] ; 0x34
8003db2: 8ebb ldrh r3, [r7, #52] ; 0x34
8003db4: f483 5380 eor.w r3, r3, #4096 ; 0x1000
8003db8: 86bb strh r3, [r7, #52] ; 0x34
8003dba: 8ebb ldrh r3, [r7, #52] ; 0x34
8003dbc: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8003dc0: 86bb strh r3, [r7, #52] ; 0x34
8003dc2: 687a ldr r2, [r7, #4]
8003dc4: 683b ldr r3, [r7, #0]
8003dc6: 781b ldrb r3, [r3, #0]
8003dc8: 009b lsls r3, r3, #2
8003dca: 441a add r2, r3
8003dcc: 8ebb ldrh r3, [r7, #52] ; 0x34
8003dce: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003dd2: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003dd6: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8003dda: f043 0380 orr.w r3, r3, #128 ; 0x80
8003dde: b29b uxth r3, r3
8003de0: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8003de2: 687a ldr r2, [r7, #4]
8003de4: 683b ldr r3, [r7, #0]
8003de6: 781b ldrb r3, [r3, #0]
8003de8: 009b lsls r3, r3, #2
8003dea: 4413 add r3, r2
8003dec: 881b ldrh r3, [r3, #0]
8003dee: b29b uxth r3, r3
8003df0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8003df4: f023 0340 bic.w r3, r3, #64 ; 0x40
8003df8: 867b strh r3, [r7, #50] ; 0x32
8003dfa: 687a ldr r2, [r7, #4]
8003dfc: 683b ldr r3, [r7, #0]
8003dfe: 781b ldrb r3, [r3, #0]
8003e00: 009b lsls r3, r3, #2
8003e02: 441a add r2, r3
8003e04: 8e7b ldrh r3, [r7, #50] ; 0x32
8003e06: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003e0a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003e0e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8003e12: f043 0380 orr.w r3, r3, #128 ; 0x80
8003e16: b29b uxth r3, r3
8003e18: 8013 strh r3, [r2, #0]
8003e1a: e0ba b.n 8003f92 <USB_ActivateEndpoint+0x6c6>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8003e1c: 687a ldr r2, [r7, #4]
8003e1e: 683b ldr r3, [r7, #0]
8003e20: 781b ldrb r3, [r3, #0]
8003e22: 009b lsls r3, r3, #2
8003e24: 4413 add r3, r2
8003e26: 881b ldrh r3, [r3, #0]
8003e28: f8a7 304a strh.w r3, [r7, #74] ; 0x4a
8003e2c: f8b7 304a ldrh.w r3, [r7, #74] ; 0x4a
8003e30: f403 4380 and.w r3, r3, #16384 ; 0x4000
8003e34: 2b00 cmp r3, #0
8003e36: d01d beq.n 8003e74 <USB_ActivateEndpoint+0x5a8>
8003e38: 687a ldr r2, [r7, #4]
8003e3a: 683b ldr r3, [r7, #0]
8003e3c: 781b ldrb r3, [r3, #0]
8003e3e: 009b lsls r3, r3, #2
8003e40: 4413 add r3, r2
8003e42: 881b ldrh r3, [r3, #0]
8003e44: b29b uxth r3, r3
8003e46: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8003e4a: f023 0370 bic.w r3, r3, #112 ; 0x70
8003e4e: f8a7 3048 strh.w r3, [r7, #72] ; 0x48
8003e52: 687a ldr r2, [r7, #4]
8003e54: 683b ldr r3, [r7, #0]
8003e56: 781b ldrb r3, [r3, #0]
8003e58: 009b lsls r3, r3, #2
8003e5a: 441a add r2, r3
8003e5c: f8b7 3048 ldrh.w r3, [r7, #72] ; 0x48
8003e60: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003e64: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003e68: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8003e6c: f043 0380 orr.w r3, r3, #128 ; 0x80
8003e70: b29b uxth r3, r3
8003e72: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8003e74: 687a ldr r2, [r7, #4]
8003e76: 683b ldr r3, [r7, #0]
8003e78: 781b ldrb r3, [r3, #0]
8003e7a: 009b lsls r3, r3, #2
8003e7c: 4413 add r3, r2
8003e7e: 881b ldrh r3, [r3, #0]
8003e80: f8a7 3046 strh.w r3, [r7, #70] ; 0x46
8003e84: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46
8003e88: f003 0340 and.w r3, r3, #64 ; 0x40
8003e8c: 2b00 cmp r3, #0
8003e8e: d01d beq.n 8003ecc <USB_ActivateEndpoint+0x600>
8003e90: 687a ldr r2, [r7, #4]
8003e92: 683b ldr r3, [r7, #0]
8003e94: 781b ldrb r3, [r3, #0]
8003e96: 009b lsls r3, r3, #2
8003e98: 4413 add r3, r2
8003e9a: 881b ldrh r3, [r3, #0]
8003e9c: b29b uxth r3, r3
8003e9e: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8003ea2: f023 0370 bic.w r3, r3, #112 ; 0x70
8003ea6: f8a7 3044 strh.w r3, [r7, #68] ; 0x44
8003eaa: 687a ldr r2, [r7, #4]
8003eac: 683b ldr r3, [r7, #0]
8003eae: 781b ldrb r3, [r3, #0]
8003eb0: 009b lsls r3, r3, #2
8003eb2: 441a add r2, r3
8003eb4: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44
8003eb8: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003ebc: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003ec0: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8003ec4: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8003ec8: b29b uxth r3, r3
8003eca: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8003ecc: 683b ldr r3, [r7, #0]
8003ece: 78db ldrb r3, [r3, #3]
8003ed0: 2b01 cmp r3, #1
8003ed2: d024 beq.n 8003f1e <USB_ActivateEndpoint+0x652>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8003ed4: 687a ldr r2, [r7, #4]
8003ed6: 683b ldr r3, [r7, #0]
8003ed8: 781b ldrb r3, [r3, #0]
8003eda: 009b lsls r3, r3, #2
8003edc: 4413 add r3, r2
8003ede: 881b ldrh r3, [r3, #0]
8003ee0: b29b uxth r3, r3
8003ee2: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8003ee6: f023 0340 bic.w r3, r3, #64 ; 0x40
8003eea: f8a7 3040 strh.w r3, [r7, #64] ; 0x40
8003eee: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40
8003ef2: f083 0320 eor.w r3, r3, #32
8003ef6: f8a7 3040 strh.w r3, [r7, #64] ; 0x40
8003efa: 687a ldr r2, [r7, #4]
8003efc: 683b ldr r3, [r7, #0]
8003efe: 781b ldrb r3, [r3, #0]
8003f00: 009b lsls r3, r3, #2
8003f02: 441a add r2, r3
8003f04: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40
8003f08: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003f0c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003f10: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8003f14: f043 0380 orr.w r3, r3, #128 ; 0x80
8003f18: b29b uxth r3, r3
8003f1a: 8013 strh r3, [r2, #0]
8003f1c: e01d b.n 8003f5a <USB_ActivateEndpoint+0x68e>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8003f1e: 687a ldr r2, [r7, #4]
8003f20: 683b ldr r3, [r7, #0]
8003f22: 781b ldrb r3, [r3, #0]
8003f24: 009b lsls r3, r3, #2
8003f26: 4413 add r3, r2
8003f28: 881b ldrh r3, [r3, #0]
8003f2a: b29b uxth r3, r3
8003f2c: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8003f30: f023 0340 bic.w r3, r3, #64 ; 0x40
8003f34: f8a7 3042 strh.w r3, [r7, #66] ; 0x42
8003f38: 687a ldr r2, [r7, #4]
8003f3a: 683b ldr r3, [r7, #0]
8003f3c: 781b ldrb r3, [r3, #0]
8003f3e: 009b lsls r3, r3, #2
8003f40: 441a add r2, r3
8003f42: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42
8003f46: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003f4a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003f4e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8003f52: f043 0380 orr.w r3, r3, #128 ; 0x80
8003f56: b29b uxth r3, r3
8003f58: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8003f5a: 687a ldr r2, [r7, #4]
8003f5c: 683b ldr r3, [r7, #0]
8003f5e: 781b ldrb r3, [r3, #0]
8003f60: 009b lsls r3, r3, #2
8003f62: 4413 add r3, r2
8003f64: 881b ldrh r3, [r3, #0]
8003f66: b29b uxth r3, r3
8003f68: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8003f6c: f023 0370 bic.w r3, r3, #112 ; 0x70
8003f70: 87fb strh r3, [r7, #62] ; 0x3e
8003f72: 687a ldr r2, [r7, #4]
8003f74: 683b ldr r3, [r7, #0]
8003f76: 781b ldrb r3, [r3, #0]
8003f78: 009b lsls r3, r3, #2
8003f7a: 441a add r2, r3
8003f7c: 8ffb ldrh r3, [r7, #62] ; 0x3e
8003f7e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8003f82: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8003f86: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8003f8a: f043 0380 orr.w r3, r3, #128 ; 0x80
8003f8e: b29b uxth r3, r3
8003f90: 8013 strh r3, [r2, #0]
}
}
return ret;
8003f92: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
}
8003f96: 4618 mov r0, r3
8003f98: 376c adds r7, #108 ; 0x6c
8003f9a: 46bd mov sp, r7
8003f9c: bc80 pop {r7}
8003f9e: 4770 bx lr
08003fa0 <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8003fa0: b580 push {r7, lr}
8003fa2: b0cc sub sp, #304 ; 0x130
8003fa4: af00 add r7, sp, #0
8003fa6: 1d3b adds r3, r7, #4
8003fa8: 6018 str r0, [r3, #0]
8003faa: 463b mov r3, r7
8003fac: 6019 str r1, [r3, #0]
uint32_t len;
uint16_t pmabuffer;
uint16_t wEPVal;
/* IN endpoint */
if (ep->is_in == 1U)
8003fae: 463b mov r3, r7
8003fb0: 681b ldr r3, [r3, #0]
8003fb2: 785b ldrb r3, [r3, #1]
8003fb4: 2b01 cmp r3, #1
8003fb6: f040 872e bne.w 8004e16 <USB_EPStartXfer+0xe76>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
8003fba: 463b mov r3, r7
8003fbc: 681b ldr r3, [r3, #0]
8003fbe: 699a ldr r2, [r3, #24]
8003fc0: 463b mov r3, r7
8003fc2: 681b ldr r3, [r3, #0]
8003fc4: 691b ldr r3, [r3, #16]
8003fc6: 429a cmp r2, r3
8003fc8: d905 bls.n 8003fd6 <USB_EPStartXfer+0x36>
{
len = ep->maxpacket;
8003fca: 463b mov r3, r7
8003fcc: 681b ldr r3, [r3, #0]
8003fce: 691b ldr r3, [r3, #16]
8003fd0: f8c7 312c str.w r3, [r7, #300] ; 0x12c
8003fd4: e004 b.n 8003fe0 <USB_EPStartXfer+0x40>
}
else
{
len = ep->xfer_len;
8003fd6: 463b mov r3, r7
8003fd8: 681b ldr r3, [r3, #0]
8003fda: 699b ldr r3, [r3, #24]
8003fdc: f8c7 312c str.w r3, [r7, #300] ; 0x12c
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
8003fe0: 463b mov r3, r7
8003fe2: 681b ldr r3, [r3, #0]
8003fe4: 7b1b ldrb r3, [r3, #12]
8003fe6: 2b00 cmp r3, #0
8003fe8: d134 bne.n 8004054 <USB_EPStartXfer+0xb4>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
8003fea: 463b mov r3, r7
8003fec: 681b ldr r3, [r3, #0]
8003fee: 6959 ldr r1, [r3, #20]
8003ff0: 463b mov r3, r7
8003ff2: 681b ldr r3, [r3, #0]
8003ff4: 88da ldrh r2, [r3, #6]
8003ff6: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8003ffa: b29b uxth r3, r3
8003ffc: 1d38 adds r0, r7, #4
8003ffe: 6800 ldr r0, [r0, #0]
8004000: f001 fc03 bl 800580a <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
8004004: f107 0310 add.w r3, r7, #16
8004008: 1d3a adds r2, r7, #4
800400a: 6812 ldr r2, [r2, #0]
800400c: 601a str r2, [r3, #0]
800400e: 1d3b adds r3, r7, #4
8004010: 681b ldr r3, [r3, #0]
8004012: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8004016: b29b uxth r3, r3
8004018: 4619 mov r1, r3
800401a: f107 0310 add.w r3, r7, #16
800401e: f107 0210 add.w r2, r7, #16
8004022: 6812 ldr r2, [r2, #0]
8004024: 440a add r2, r1
8004026: 601a str r2, [r3, #0]
8004028: 463b mov r3, r7
800402a: 681b ldr r3, [r3, #0]
800402c: 781b ldrb r3, [r3, #0]
800402e: 011a lsls r2, r3, #4
8004030: f107 0310 add.w r3, r7, #16
8004034: 681b ldr r3, [r3, #0]
8004036: 4413 add r3, r2
8004038: f203 4204 addw r2, r3, #1028 ; 0x404
800403c: f107 030c add.w r3, r7, #12
8004040: 601a str r2, [r3, #0]
8004042: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004046: b29a uxth r2, r3
8004048: f107 030c add.w r3, r7, #12
800404c: 681b ldr r3, [r3, #0]
800404e: 801a strh r2, [r3, #0]
8004050: f000 beac b.w 8004dac <USB_EPStartXfer+0xe0c>
}
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
8004054: 463b mov r3, r7
8004056: 681b ldr r3, [r3, #0]
8004058: 78db ldrb r3, [r3, #3]
800405a: 2b02 cmp r3, #2
800405c: f040 838c bne.w 8004778 <USB_EPStartXfer+0x7d8>
{
if (ep->xfer_len_db > ep->maxpacket)
8004060: 463b mov r3, r7
8004062: 681b ldr r3, [r3, #0]
8004064: 6a1a ldr r2, [r3, #32]
8004066: 463b mov r3, r7
8004068: 681b ldr r3, [r3, #0]
800406a: 691b ldr r3, [r3, #16]
800406c: 429a cmp r2, r3
800406e: f240 8330 bls.w 80046d2 <USB_EPStartXfer+0x732>
{
/* enable double buffer */
PCD_SET_EP_DBUF(USBx, ep->num);
8004072: 1d3b adds r3, r7, #4
8004074: 681a ldr r2, [r3, #0]
8004076: 463b mov r3, r7
8004078: 681b ldr r3, [r3, #0]
800407a: 781b ldrb r3, [r3, #0]
800407c: 009b lsls r3, r3, #2
800407e: 4413 add r3, r2
8004080: 881b ldrh r3, [r3, #0]
8004082: b29b uxth r3, r3
8004084: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8004088: f023 0370 bic.w r3, r3, #112 ; 0x70
800408c: f8a7 3056 strh.w r3, [r7, #86] ; 0x56
8004090: 1d3b adds r3, r7, #4
8004092: 681a ldr r2, [r3, #0]
8004094: 463b mov r3, r7
8004096: 681b ldr r3, [r3, #0]
8004098: 781b ldrb r3, [r3, #0]
800409a: 009b lsls r3, r3, #2
800409c: 441a add r2, r3
800409e: f8b7 3056 ldrh.w r3, [r7, #86] ; 0x56
80040a2: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80040a6: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80040aa: f443 4301 orr.w r3, r3, #33024 ; 0x8100
80040ae: f043 0380 orr.w r3, r3, #128 ; 0x80
80040b2: b29b uxth r3, r3
80040b4: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
80040b6: 463b mov r3, r7
80040b8: 681b ldr r3, [r3, #0]
80040ba: 6a1a ldr r2, [r3, #32]
80040bc: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80040c0: 1ad2 subs r2, r2, r3
80040c2: 463b mov r3, r7
80040c4: 681b ldr r3, [r3, #0]
80040c6: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
80040c8: 1d3b adds r3, r7, #4
80040ca: 681a ldr r2, [r3, #0]
80040cc: 463b mov r3, r7
80040ce: 681b ldr r3, [r3, #0]
80040d0: 781b ldrb r3, [r3, #0]
80040d2: 009b lsls r3, r3, #2
80040d4: 4413 add r3, r2
80040d6: 881b ldrh r3, [r3, #0]
80040d8: b29b uxth r3, r3
80040da: f003 0340 and.w r3, r3, #64 ; 0x40
80040de: 2b00 cmp r3, #0
80040e0: f000 819e beq.w 8004420 <USB_EPStartXfer+0x480>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
80040e4: f107 0330 add.w r3, r7, #48 ; 0x30
80040e8: 1d3a adds r2, r7, #4
80040ea: 6812 ldr r2, [r2, #0]
80040ec: 601a str r2, [r3, #0]
80040ee: 463b mov r3, r7
80040f0: 681b ldr r3, [r3, #0]
80040f2: 785b ldrb r3, [r3, #1]
80040f4: 2b00 cmp r3, #0
80040f6: d17a bne.n 80041ee <USB_EPStartXfer+0x24e>
80040f8: f107 0328 add.w r3, r7, #40 ; 0x28
80040fc: 1d3a adds r2, r7, #4
80040fe: 6812 ldr r2, [r2, #0]
8004100: 601a str r2, [r3, #0]
8004102: 1d3b adds r3, r7, #4
8004104: 681b ldr r3, [r3, #0]
8004106: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800410a: b29b uxth r3, r3
800410c: 4619 mov r1, r3
800410e: f107 0328 add.w r3, r7, #40 ; 0x28
8004112: f107 0228 add.w r2, r7, #40 ; 0x28
8004116: 6812 ldr r2, [r2, #0]
8004118: 440a add r2, r1
800411a: 601a str r2, [r3, #0]
800411c: 463b mov r3, r7
800411e: 681b ldr r3, [r3, #0]
8004120: 781b ldrb r3, [r3, #0]
8004122: 011a lsls r2, r3, #4
8004124: f107 0328 add.w r3, r7, #40 ; 0x28
8004128: 681b ldr r3, [r3, #0]
800412a: 4413 add r3, r2
800412c: f203 420c addw r2, r3, #1036 ; 0x40c
8004130: f107 0324 add.w r3, r7, #36 ; 0x24
8004134: 601a str r2, [r3, #0]
8004136: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800413a: 2b00 cmp r3, #0
800413c: d11a bne.n 8004174 <USB_EPStartXfer+0x1d4>
800413e: f107 0324 add.w r3, r7, #36 ; 0x24
8004142: 681b ldr r3, [r3, #0]
8004144: 881b ldrh r3, [r3, #0]
8004146: b29b uxth r3, r3
8004148: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
800414c: b29a uxth r2, r3
800414e: f107 0324 add.w r3, r7, #36 ; 0x24
8004152: 681b ldr r3, [r3, #0]
8004154: 801a strh r2, [r3, #0]
8004156: f107 0324 add.w r3, r7, #36 ; 0x24
800415a: 681b ldr r3, [r3, #0]
800415c: 881b ldrh r3, [r3, #0]
800415e: b29b uxth r3, r3
8004160: ea6f 4343 mvn.w r3, r3, lsl #17
8004164: ea6f 4353 mvn.w r3, r3, lsr #17
8004168: b29a uxth r2, r3
800416a: f107 0324 add.w r3, r7, #36 ; 0x24
800416e: 681b ldr r3, [r3, #0]
8004170: 801a strh r2, [r3, #0]
8004172: e062 b.n 800423a <USB_EPStartXfer+0x29a>
8004174: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004178: 2b3e cmp r3, #62 ; 0x3e
800417a: d819 bhi.n 80041b0 <USB_EPStartXfer+0x210>
800417c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004180: 085b lsrs r3, r3, #1
8004182: f8c7 3128 str.w r3, [r7, #296] ; 0x128
8004186: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800418a: f003 0301 and.w r3, r3, #1
800418e: 2b00 cmp r3, #0
8004190: d004 beq.n 800419c <USB_EPStartXfer+0x1fc>
8004192: f8d7 3128 ldr.w r3, [r7, #296] ; 0x128
8004196: 3301 adds r3, #1
8004198: f8c7 3128 str.w r3, [r7, #296] ; 0x128
800419c: f8d7 3128 ldr.w r3, [r7, #296] ; 0x128
80041a0: b29b uxth r3, r3
80041a2: 029b lsls r3, r3, #10
80041a4: b29a uxth r2, r3
80041a6: f107 0324 add.w r3, r7, #36 ; 0x24
80041aa: 681b ldr r3, [r3, #0]
80041ac: 801a strh r2, [r3, #0]
80041ae: e044 b.n 800423a <USB_EPStartXfer+0x29a>
80041b0: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80041b4: 095b lsrs r3, r3, #5
80041b6: f8c7 3128 str.w r3, [r7, #296] ; 0x128
80041ba: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80041be: f003 031f and.w r3, r3, #31
80041c2: 2b00 cmp r3, #0
80041c4: d104 bne.n 80041d0 <USB_EPStartXfer+0x230>
80041c6: f8d7 3128 ldr.w r3, [r7, #296] ; 0x128
80041ca: 3b01 subs r3, #1
80041cc: f8c7 3128 str.w r3, [r7, #296] ; 0x128
80041d0: f8d7 3128 ldr.w r3, [r7, #296] ; 0x128
80041d4: b29b uxth r3, r3
80041d6: 029b lsls r3, r3, #10
80041d8: b29b uxth r3, r3
80041da: ea6f 4343 mvn.w r3, r3, lsl #17
80041de: ea6f 4353 mvn.w r3, r3, lsr #17
80041e2: b29a uxth r2, r3
80041e4: f107 0324 add.w r3, r7, #36 ; 0x24
80041e8: 681b ldr r3, [r3, #0]
80041ea: 801a strh r2, [r3, #0]
80041ec: e025 b.n 800423a <USB_EPStartXfer+0x29a>
80041ee: 463b mov r3, r7
80041f0: 681b ldr r3, [r3, #0]
80041f2: 785b ldrb r3, [r3, #1]
80041f4: 2b01 cmp r3, #1
80041f6: d120 bne.n 800423a <USB_EPStartXfer+0x29a>
80041f8: 1d3b adds r3, r7, #4
80041fa: 681b ldr r3, [r3, #0]
80041fc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8004200: b29b uxth r3, r3
8004202: 4619 mov r1, r3
8004204: f107 0330 add.w r3, r7, #48 ; 0x30
8004208: f107 0230 add.w r2, r7, #48 ; 0x30
800420c: 6812 ldr r2, [r2, #0]
800420e: 440a add r2, r1
8004210: 601a str r2, [r3, #0]
8004212: 463b mov r3, r7
8004214: 681b ldr r3, [r3, #0]
8004216: 781b ldrb r3, [r3, #0]
8004218: 011a lsls r2, r3, #4
800421a: f107 0330 add.w r3, r7, #48 ; 0x30
800421e: 681b ldr r3, [r3, #0]
8004220: 4413 add r3, r2
8004222: f203 420c addw r2, r3, #1036 ; 0x40c
8004226: f107 032c add.w r3, r7, #44 ; 0x2c
800422a: 601a str r2, [r3, #0]
800422c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004230: b29a uxth r2, r3
8004232: f107 032c add.w r3, r7, #44 ; 0x2c
8004236: 681b ldr r3, [r3, #0]
8004238: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800423a: 463b mov r3, r7
800423c: 681b ldr r3, [r3, #0]
800423e: 895b ldrh r3, [r3, #10]
8004240: f8a7 3096 strh.w r3, [r7, #150] ; 0x96
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8004244: 463b mov r3, r7
8004246: 681b ldr r3, [r3, #0]
8004248: 6959 ldr r1, [r3, #20]
800424a: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800424e: b29b uxth r3, r3
8004250: f8b7 2096 ldrh.w r2, [r7, #150] ; 0x96
8004254: 1d38 adds r0, r7, #4
8004256: 6800 ldr r0, [r0, #0]
8004258: f001 fad7 bl 800580a <USB_WritePMA>
ep->xfer_buff += len;
800425c: 463b mov r3, r7
800425e: 681b ldr r3, [r3, #0]
8004260: 695a ldr r2, [r3, #20]
8004262: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004266: 441a add r2, r3
8004268: 463b mov r3, r7
800426a: 681b ldr r3, [r3, #0]
800426c: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
800426e: 463b mov r3, r7
8004270: 681b ldr r3, [r3, #0]
8004272: 6a1a ldr r2, [r3, #32]
8004274: 463b mov r3, r7
8004276: 681b ldr r3, [r3, #0]
8004278: 691b ldr r3, [r3, #16]
800427a: 429a cmp r2, r3
800427c: d909 bls.n 8004292 <USB_EPStartXfer+0x2f2>
{
ep->xfer_len_db -= len;
800427e: 463b mov r3, r7
8004280: 681b ldr r3, [r3, #0]
8004282: 6a1a ldr r2, [r3, #32]
8004284: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004288: 1ad2 subs r2, r2, r3
800428a: 463b mov r3, r7
800428c: 681b ldr r3, [r3, #0]
800428e: 621a str r2, [r3, #32]
8004290: e008 b.n 80042a4 <USB_EPStartXfer+0x304>
}
else
{
len = ep->xfer_len_db;
8004292: 463b mov r3, r7
8004294: 681b ldr r3, [r3, #0]
8004296: 6a1b ldr r3, [r3, #32]
8004298: f8c7 312c str.w r3, [r7, #300] ; 0x12c
ep->xfer_len_db = 0U;
800429c: 463b mov r3, r7
800429e: 681b ldr r3, [r3, #0]
80042a0: 2200 movs r2, #0
80042a2: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
80042a4: 463b mov r3, r7
80042a6: 681b ldr r3, [r3, #0]
80042a8: 785b ldrb r3, [r3, #1]
80042aa: 2b00 cmp r3, #0
80042ac: d17a bne.n 80043a4 <USB_EPStartXfer+0x404>
80042ae: f107 0318 add.w r3, r7, #24
80042b2: 1d3a adds r2, r7, #4
80042b4: 6812 ldr r2, [r2, #0]
80042b6: 601a str r2, [r3, #0]
80042b8: 1d3b adds r3, r7, #4
80042ba: 681b ldr r3, [r3, #0]
80042bc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80042c0: b29b uxth r3, r3
80042c2: 4619 mov r1, r3
80042c4: f107 0318 add.w r3, r7, #24
80042c8: f107 0218 add.w r2, r7, #24
80042cc: 6812 ldr r2, [r2, #0]
80042ce: 440a add r2, r1
80042d0: 601a str r2, [r3, #0]
80042d2: 463b mov r3, r7
80042d4: 681b ldr r3, [r3, #0]
80042d6: 781b ldrb r3, [r3, #0]
80042d8: 011a lsls r2, r3, #4
80042da: f107 0318 add.w r3, r7, #24
80042de: 681b ldr r3, [r3, #0]
80042e0: 4413 add r3, r2
80042e2: f203 4204 addw r2, r3, #1028 ; 0x404
80042e6: f107 0314 add.w r3, r7, #20
80042ea: 601a str r2, [r3, #0]
80042ec: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80042f0: 2b00 cmp r3, #0
80042f2: d11a bne.n 800432a <USB_EPStartXfer+0x38a>
80042f4: f107 0314 add.w r3, r7, #20
80042f8: 681b ldr r3, [r3, #0]
80042fa: 881b ldrh r3, [r3, #0]
80042fc: b29b uxth r3, r3
80042fe: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8004302: b29a uxth r2, r3
8004304: f107 0314 add.w r3, r7, #20
8004308: 681b ldr r3, [r3, #0]
800430a: 801a strh r2, [r3, #0]
800430c: f107 0314 add.w r3, r7, #20
8004310: 681b ldr r3, [r3, #0]
8004312: 881b ldrh r3, [r3, #0]
8004314: b29b uxth r3, r3
8004316: ea6f 4343 mvn.w r3, r3, lsl #17
800431a: ea6f 4353 mvn.w r3, r3, lsr #17
800431e: b29a uxth r2, r3
8004320: f107 0314 add.w r3, r7, #20
8004324: 681b ldr r3, [r3, #0]
8004326: 801a strh r2, [r3, #0]
8004328: e067 b.n 80043fa <USB_EPStartXfer+0x45a>
800432a: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800432e: 2b3e cmp r3, #62 ; 0x3e
8004330: d819 bhi.n 8004366 <USB_EPStartXfer+0x3c6>
8004332: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004336: 085b lsrs r3, r3, #1
8004338: f8c7 3124 str.w r3, [r7, #292] ; 0x124
800433c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004340: f003 0301 and.w r3, r3, #1
8004344: 2b00 cmp r3, #0
8004346: d004 beq.n 8004352 <USB_EPStartXfer+0x3b2>
8004348: f8d7 3124 ldr.w r3, [r7, #292] ; 0x124
800434c: 3301 adds r3, #1
800434e: f8c7 3124 str.w r3, [r7, #292] ; 0x124
8004352: f8d7 3124 ldr.w r3, [r7, #292] ; 0x124
8004356: b29b uxth r3, r3
8004358: 029b lsls r3, r3, #10
800435a: b29a uxth r2, r3
800435c: f107 0314 add.w r3, r7, #20
8004360: 681b ldr r3, [r3, #0]
8004362: 801a strh r2, [r3, #0]
8004364: e049 b.n 80043fa <USB_EPStartXfer+0x45a>
8004366: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800436a: 095b lsrs r3, r3, #5
800436c: f8c7 3124 str.w r3, [r7, #292] ; 0x124
8004370: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004374: f003 031f and.w r3, r3, #31
8004378: 2b00 cmp r3, #0
800437a: d104 bne.n 8004386 <USB_EPStartXfer+0x3e6>
800437c: f8d7 3124 ldr.w r3, [r7, #292] ; 0x124
8004380: 3b01 subs r3, #1
8004382: f8c7 3124 str.w r3, [r7, #292] ; 0x124
8004386: f8d7 3124 ldr.w r3, [r7, #292] ; 0x124
800438a: b29b uxth r3, r3
800438c: 029b lsls r3, r3, #10
800438e: b29b uxth r3, r3
8004390: ea6f 4343 mvn.w r3, r3, lsl #17
8004394: ea6f 4353 mvn.w r3, r3, lsr #17
8004398: b29a uxth r2, r3
800439a: f107 0314 add.w r3, r7, #20
800439e: 681b ldr r3, [r3, #0]
80043a0: 801a strh r2, [r3, #0]
80043a2: e02a b.n 80043fa <USB_EPStartXfer+0x45a>
80043a4: 463b mov r3, r7
80043a6: 681b ldr r3, [r3, #0]
80043a8: 785b ldrb r3, [r3, #1]
80043aa: 2b01 cmp r3, #1
80043ac: d125 bne.n 80043fa <USB_EPStartXfer+0x45a>
80043ae: f107 0320 add.w r3, r7, #32
80043b2: 1d3a adds r2, r7, #4
80043b4: 6812 ldr r2, [r2, #0]
80043b6: 601a str r2, [r3, #0]
80043b8: 1d3b adds r3, r7, #4
80043ba: 681b ldr r3, [r3, #0]
80043bc: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80043c0: b29b uxth r3, r3
80043c2: 4619 mov r1, r3
80043c4: f107 0320 add.w r3, r7, #32
80043c8: f107 0220 add.w r2, r7, #32
80043cc: 6812 ldr r2, [r2, #0]
80043ce: 440a add r2, r1
80043d0: 601a str r2, [r3, #0]
80043d2: 463b mov r3, r7
80043d4: 681b ldr r3, [r3, #0]
80043d6: 781b ldrb r3, [r3, #0]
80043d8: 011a lsls r2, r3, #4
80043da: f107 0320 add.w r3, r7, #32
80043de: 681b ldr r3, [r3, #0]
80043e0: 4413 add r3, r2
80043e2: f203 4204 addw r2, r3, #1028 ; 0x404
80043e6: f107 031c add.w r3, r7, #28
80043ea: 601a str r2, [r3, #0]
80043ec: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80043f0: b29a uxth r2, r3
80043f2: f107 031c add.w r3, r7, #28
80043f6: 681b ldr r3, [r3, #0]
80043f8: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
80043fa: 463b mov r3, r7
80043fc: 681b ldr r3, [r3, #0]
80043fe: 891b ldrh r3, [r3, #8]
8004400: f8a7 3096 strh.w r3, [r7, #150] ; 0x96
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8004404: 463b mov r3, r7
8004406: 681b ldr r3, [r3, #0]
8004408: 6959 ldr r1, [r3, #20]
800440a: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800440e: b29b uxth r3, r3
8004410: f8b7 2096 ldrh.w r2, [r7, #150] ; 0x96
8004414: 1d38 adds r0, r7, #4
8004416: 6800 ldr r0, [r0, #0]
8004418: f001 f9f7 bl 800580a <USB_WritePMA>
800441c: f000 bcc6 b.w 8004dac <USB_EPStartXfer+0xe0c>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8004420: 463b mov r3, r7
8004422: 681b ldr r3, [r3, #0]
8004424: 785b ldrb r3, [r3, #1]
8004426: 2b00 cmp r3, #0
8004428: d164 bne.n 80044f4 <USB_EPStartXfer+0x554>
800442a: 1d3b adds r3, r7, #4
800442c: 681b ldr r3, [r3, #0]
800442e: 64bb str r3, [r7, #72] ; 0x48
8004430: 1d3b adds r3, r7, #4
8004432: 681b ldr r3, [r3, #0]
8004434: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8004438: b29b uxth r3, r3
800443a: 461a mov r2, r3
800443c: 6cbb ldr r3, [r7, #72] ; 0x48
800443e: 4413 add r3, r2
8004440: 64bb str r3, [r7, #72] ; 0x48
8004442: 463b mov r3, r7
8004444: 681b ldr r3, [r3, #0]
8004446: 781b ldrb r3, [r3, #0]
8004448: 011a lsls r2, r3, #4
800444a: 6cbb ldr r3, [r7, #72] ; 0x48
800444c: 4413 add r3, r2
800444e: f203 4304 addw r3, r3, #1028 ; 0x404
8004452: 647b str r3, [r7, #68] ; 0x44
8004454: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004458: 2b00 cmp r3, #0
800445a: d112 bne.n 8004482 <USB_EPStartXfer+0x4e2>
800445c: 6c7b ldr r3, [r7, #68] ; 0x44
800445e: 881b ldrh r3, [r3, #0]
8004460: b29b uxth r3, r3
8004462: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8004466: b29a uxth r2, r3
8004468: 6c7b ldr r3, [r7, #68] ; 0x44
800446a: 801a strh r2, [r3, #0]
800446c: 6c7b ldr r3, [r7, #68] ; 0x44
800446e: 881b ldrh r3, [r3, #0]
8004470: b29b uxth r3, r3
8004472: ea6f 4343 mvn.w r3, r3, lsl #17
8004476: ea6f 4353 mvn.w r3, r3, lsr #17
800447a: b29a uxth r2, r3
800447c: 6c7b ldr r3, [r7, #68] ; 0x44
800447e: 801a strh r2, [r3, #0]
8004480: e057 b.n 8004532 <USB_EPStartXfer+0x592>
8004482: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004486: 2b3e cmp r3, #62 ; 0x3e
8004488: d817 bhi.n 80044ba <USB_EPStartXfer+0x51a>
800448a: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800448e: 085b lsrs r3, r3, #1
8004490: f8c7 3120 str.w r3, [r7, #288] ; 0x120
8004494: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004498: f003 0301 and.w r3, r3, #1
800449c: 2b00 cmp r3, #0
800449e: d004 beq.n 80044aa <USB_EPStartXfer+0x50a>
80044a0: f8d7 3120 ldr.w r3, [r7, #288] ; 0x120
80044a4: 3301 adds r3, #1
80044a6: f8c7 3120 str.w r3, [r7, #288] ; 0x120
80044aa: f8d7 3120 ldr.w r3, [r7, #288] ; 0x120
80044ae: b29b uxth r3, r3
80044b0: 029b lsls r3, r3, #10
80044b2: b29a uxth r2, r3
80044b4: 6c7b ldr r3, [r7, #68] ; 0x44
80044b6: 801a strh r2, [r3, #0]
80044b8: e03b b.n 8004532 <USB_EPStartXfer+0x592>
80044ba: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80044be: 095b lsrs r3, r3, #5
80044c0: f8c7 3120 str.w r3, [r7, #288] ; 0x120
80044c4: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80044c8: f003 031f and.w r3, r3, #31
80044cc: 2b00 cmp r3, #0
80044ce: d104 bne.n 80044da <USB_EPStartXfer+0x53a>
80044d0: f8d7 3120 ldr.w r3, [r7, #288] ; 0x120
80044d4: 3b01 subs r3, #1
80044d6: f8c7 3120 str.w r3, [r7, #288] ; 0x120
80044da: f8d7 3120 ldr.w r3, [r7, #288] ; 0x120
80044de: b29b uxth r3, r3
80044e0: 029b lsls r3, r3, #10
80044e2: b29b uxth r3, r3
80044e4: ea6f 4343 mvn.w r3, r3, lsl #17
80044e8: ea6f 4353 mvn.w r3, r3, lsr #17
80044ec: b29a uxth r2, r3
80044ee: 6c7b ldr r3, [r7, #68] ; 0x44
80044f0: 801a strh r2, [r3, #0]
80044f2: e01e b.n 8004532 <USB_EPStartXfer+0x592>
80044f4: 463b mov r3, r7
80044f6: 681b ldr r3, [r3, #0]
80044f8: 785b ldrb r3, [r3, #1]
80044fa: 2b01 cmp r3, #1
80044fc: d119 bne.n 8004532 <USB_EPStartXfer+0x592>
80044fe: 1d3b adds r3, r7, #4
8004500: 681b ldr r3, [r3, #0]
8004502: 653b str r3, [r7, #80] ; 0x50
8004504: 1d3b adds r3, r7, #4
8004506: 681b ldr r3, [r3, #0]
8004508: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800450c: b29b uxth r3, r3
800450e: 461a mov r2, r3
8004510: 6d3b ldr r3, [r7, #80] ; 0x50
8004512: 4413 add r3, r2
8004514: 653b str r3, [r7, #80] ; 0x50
8004516: 463b mov r3, r7
8004518: 681b ldr r3, [r3, #0]
800451a: 781b ldrb r3, [r3, #0]
800451c: 011a lsls r2, r3, #4
800451e: 6d3b ldr r3, [r7, #80] ; 0x50
8004520: 4413 add r3, r2
8004522: f203 4304 addw r3, r3, #1028 ; 0x404
8004526: 64fb str r3, [r7, #76] ; 0x4c
8004528: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800452c: b29a uxth r2, r3
800452e: 6cfb ldr r3, [r7, #76] ; 0x4c
8004530: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8004532: 463b mov r3, r7
8004534: 681b ldr r3, [r3, #0]
8004536: 891b ldrh r3, [r3, #8]
8004538: f8a7 3096 strh.w r3, [r7, #150] ; 0x96
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800453c: 463b mov r3, r7
800453e: 681b ldr r3, [r3, #0]
8004540: 6959 ldr r1, [r3, #20]
8004542: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004546: b29b uxth r3, r3
8004548: f8b7 2096 ldrh.w r2, [r7, #150] ; 0x96
800454c: 1d38 adds r0, r7, #4
800454e: 6800 ldr r0, [r0, #0]
8004550: f001 f95b bl 800580a <USB_WritePMA>
ep->xfer_buff += len;
8004554: 463b mov r3, r7
8004556: 681b ldr r3, [r3, #0]
8004558: 695a ldr r2, [r3, #20]
800455a: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800455e: 441a add r2, r3
8004560: 463b mov r3, r7
8004562: 681b ldr r3, [r3, #0]
8004564: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8004566: 463b mov r3, r7
8004568: 681b ldr r3, [r3, #0]
800456a: 6a1a ldr r2, [r3, #32]
800456c: 463b mov r3, r7
800456e: 681b ldr r3, [r3, #0]
8004570: 691b ldr r3, [r3, #16]
8004572: 429a cmp r2, r3
8004574: d909 bls.n 800458a <USB_EPStartXfer+0x5ea>
{
ep->xfer_len_db -= len;
8004576: 463b mov r3, r7
8004578: 681b ldr r3, [r3, #0]
800457a: 6a1a ldr r2, [r3, #32]
800457c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004580: 1ad2 subs r2, r2, r3
8004582: 463b mov r3, r7
8004584: 681b ldr r3, [r3, #0]
8004586: 621a str r2, [r3, #32]
8004588: e008 b.n 800459c <USB_EPStartXfer+0x5fc>
}
else
{
len = ep->xfer_len_db;
800458a: 463b mov r3, r7
800458c: 681b ldr r3, [r3, #0]
800458e: 6a1b ldr r3, [r3, #32]
8004590: f8c7 312c str.w r3, [r7, #300] ; 0x12c
ep->xfer_len_db = 0U;
8004594: 463b mov r3, r7
8004596: 681b ldr r3, [r3, #0]
8004598: 2200 movs r2, #0
800459a: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800459c: 1d3b adds r3, r7, #4
800459e: 681b ldr r3, [r3, #0]
80045a0: 643b str r3, [r7, #64] ; 0x40
80045a2: 463b mov r3, r7
80045a4: 681b ldr r3, [r3, #0]
80045a6: 785b ldrb r3, [r3, #1]
80045a8: 2b00 cmp r3, #0
80045aa: d164 bne.n 8004676 <USB_EPStartXfer+0x6d6>
80045ac: 1d3b adds r3, r7, #4
80045ae: 681b ldr r3, [r3, #0]
80045b0: 63bb str r3, [r7, #56] ; 0x38
80045b2: 1d3b adds r3, r7, #4
80045b4: 681b ldr r3, [r3, #0]
80045b6: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80045ba: b29b uxth r3, r3
80045bc: 461a mov r2, r3
80045be: 6bbb ldr r3, [r7, #56] ; 0x38
80045c0: 4413 add r3, r2
80045c2: 63bb str r3, [r7, #56] ; 0x38
80045c4: 463b mov r3, r7
80045c6: 681b ldr r3, [r3, #0]
80045c8: 781b ldrb r3, [r3, #0]
80045ca: 011a lsls r2, r3, #4
80045cc: 6bbb ldr r3, [r7, #56] ; 0x38
80045ce: 4413 add r3, r2
80045d0: f203 430c addw r3, r3, #1036 ; 0x40c
80045d4: 637b str r3, [r7, #52] ; 0x34
80045d6: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80045da: 2b00 cmp r3, #0
80045dc: d112 bne.n 8004604 <USB_EPStartXfer+0x664>
80045de: 6b7b ldr r3, [r7, #52] ; 0x34
80045e0: 881b ldrh r3, [r3, #0]
80045e2: b29b uxth r3, r3
80045e4: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80045e8: b29a uxth r2, r3
80045ea: 6b7b ldr r3, [r7, #52] ; 0x34
80045ec: 801a strh r2, [r3, #0]
80045ee: 6b7b ldr r3, [r7, #52] ; 0x34
80045f0: 881b ldrh r3, [r3, #0]
80045f2: b29b uxth r3, r3
80045f4: ea6f 4343 mvn.w r3, r3, lsl #17
80045f8: ea6f 4353 mvn.w r3, r3, lsr #17
80045fc: b29a uxth r2, r3
80045fe: 6b7b ldr r3, [r7, #52] ; 0x34
8004600: 801a strh r2, [r3, #0]
8004602: e054 b.n 80046ae <USB_EPStartXfer+0x70e>
8004604: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004608: 2b3e cmp r3, #62 ; 0x3e
800460a: d817 bhi.n 800463c <USB_EPStartXfer+0x69c>
800460c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004610: 085b lsrs r3, r3, #1
8004612: f8c7 311c str.w r3, [r7, #284] ; 0x11c
8004616: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800461a: f003 0301 and.w r3, r3, #1
800461e: 2b00 cmp r3, #0
8004620: d004 beq.n 800462c <USB_EPStartXfer+0x68c>
8004622: f8d7 311c ldr.w r3, [r7, #284] ; 0x11c
8004626: 3301 adds r3, #1
8004628: f8c7 311c str.w r3, [r7, #284] ; 0x11c
800462c: f8d7 311c ldr.w r3, [r7, #284] ; 0x11c
8004630: b29b uxth r3, r3
8004632: 029b lsls r3, r3, #10
8004634: b29a uxth r2, r3
8004636: 6b7b ldr r3, [r7, #52] ; 0x34
8004638: 801a strh r2, [r3, #0]
800463a: e038 b.n 80046ae <USB_EPStartXfer+0x70e>
800463c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004640: 095b lsrs r3, r3, #5
8004642: f8c7 311c str.w r3, [r7, #284] ; 0x11c
8004646: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800464a: f003 031f and.w r3, r3, #31
800464e: 2b00 cmp r3, #0
8004650: d104 bne.n 800465c <USB_EPStartXfer+0x6bc>
8004652: f8d7 311c ldr.w r3, [r7, #284] ; 0x11c
8004656: 3b01 subs r3, #1
8004658: f8c7 311c str.w r3, [r7, #284] ; 0x11c
800465c: f8d7 311c ldr.w r3, [r7, #284] ; 0x11c
8004660: b29b uxth r3, r3
8004662: 029b lsls r3, r3, #10
8004664: b29b uxth r3, r3
8004666: ea6f 4343 mvn.w r3, r3, lsl #17
800466a: ea6f 4353 mvn.w r3, r3, lsr #17
800466e: b29a uxth r2, r3
8004670: 6b7b ldr r3, [r7, #52] ; 0x34
8004672: 801a strh r2, [r3, #0]
8004674: e01b b.n 80046ae <USB_EPStartXfer+0x70e>
8004676: 463b mov r3, r7
8004678: 681b ldr r3, [r3, #0]
800467a: 785b ldrb r3, [r3, #1]
800467c: 2b01 cmp r3, #1
800467e: d116 bne.n 80046ae <USB_EPStartXfer+0x70e>
8004680: 1d3b adds r3, r7, #4
8004682: 681b ldr r3, [r3, #0]
8004684: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8004688: b29b uxth r3, r3
800468a: 461a mov r2, r3
800468c: 6c3b ldr r3, [r7, #64] ; 0x40
800468e: 4413 add r3, r2
8004690: 643b str r3, [r7, #64] ; 0x40
8004692: 463b mov r3, r7
8004694: 681b ldr r3, [r3, #0]
8004696: 781b ldrb r3, [r3, #0]
8004698: 011a lsls r2, r3, #4
800469a: 6c3b ldr r3, [r7, #64] ; 0x40
800469c: 4413 add r3, r2
800469e: f203 430c addw r3, r3, #1036 ; 0x40c
80046a2: 63fb str r3, [r7, #60] ; 0x3c
80046a4: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80046a8: b29a uxth r2, r3
80046aa: 6bfb ldr r3, [r7, #60] ; 0x3c
80046ac: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
80046ae: 463b mov r3, r7
80046b0: 681b ldr r3, [r3, #0]
80046b2: 895b ldrh r3, [r3, #10]
80046b4: f8a7 3096 strh.w r3, [r7, #150] ; 0x96
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
80046b8: 463b mov r3, r7
80046ba: 681b ldr r3, [r3, #0]
80046bc: 6959 ldr r1, [r3, #20]
80046be: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80046c2: b29b uxth r3, r3
80046c4: f8b7 2096 ldrh.w r2, [r7, #150] ; 0x96
80046c8: 1d38 adds r0, r7, #4
80046ca: 6800 ldr r0, [r0, #0]
80046cc: f001 f89d bl 800580a <USB_WritePMA>
80046d0: e36c b.n 8004dac <USB_EPStartXfer+0xe0c>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
80046d2: 463b mov r3, r7
80046d4: 681b ldr r3, [r3, #0]
80046d6: 6a1b ldr r3, [r3, #32]
80046d8: f8c7 312c str.w r3, [r7, #300] ; 0x12c
/* disable double buffer mode */
PCD_CLEAR_EP_DBUF(USBx, ep->num);
80046dc: 1d3b adds r3, r7, #4
80046de: 681a ldr r2, [r3, #0]
80046e0: 463b mov r3, r7
80046e2: 681b ldr r3, [r3, #0]
80046e4: 781b ldrb r3, [r3, #0]
80046e6: 009b lsls r3, r3, #2
80046e8: 4413 add r3, r2
80046ea: 881b ldrh r3, [r3, #0]
80046ec: b29b uxth r3, r3
80046ee: f423 43e2 bic.w r3, r3, #28928 ; 0x7100
80046f2: f023 0370 bic.w r3, r3, #112 ; 0x70
80046f6: f8a7 3062 strh.w r3, [r7, #98] ; 0x62
80046fa: 1d3b adds r3, r7, #4
80046fc: 681a ldr r2, [r3, #0]
80046fe: 463b mov r3, r7
8004700: 681b ldr r3, [r3, #0]
8004702: 781b ldrb r3, [r3, #0]
8004704: 009b lsls r3, r3, #2
8004706: 441a add r2, r3
8004708: f8b7 3062 ldrh.w r3, [r7, #98] ; 0x62
800470c: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8004710: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8004714: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8004718: f043 0380 orr.w r3, r3, #128 ; 0x80
800471c: b29b uxth r3, r3
800471e: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
8004720: 1d3b adds r3, r7, #4
8004722: 681b ldr r3, [r3, #0]
8004724: 65fb str r3, [r7, #92] ; 0x5c
8004726: 1d3b adds r3, r7, #4
8004728: 681b ldr r3, [r3, #0]
800472a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800472e: b29b uxth r3, r3
8004730: 461a mov r2, r3
8004732: 6dfb ldr r3, [r7, #92] ; 0x5c
8004734: 4413 add r3, r2
8004736: 65fb str r3, [r7, #92] ; 0x5c
8004738: 463b mov r3, r7
800473a: 681b ldr r3, [r3, #0]
800473c: 781b ldrb r3, [r3, #0]
800473e: 011a lsls r2, r3, #4
8004740: 6dfb ldr r3, [r7, #92] ; 0x5c
8004742: 4413 add r3, r2
8004744: f203 4304 addw r3, r3, #1028 ; 0x404
8004748: 65bb str r3, [r7, #88] ; 0x58
800474a: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800474e: b29a uxth r2, r3
8004750: 6dbb ldr r3, [r7, #88] ; 0x58
8004752: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8004754: 463b mov r3, r7
8004756: 681b ldr r3, [r3, #0]
8004758: 891b ldrh r3, [r3, #8]
800475a: f8a7 3096 strh.w r3, [r7, #150] ; 0x96
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800475e: 463b mov r3, r7
8004760: 681b ldr r3, [r3, #0]
8004762: 6959 ldr r1, [r3, #20]
8004764: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004768: b29b uxth r3, r3
800476a: f8b7 2096 ldrh.w r2, [r7, #150] ; 0x96
800476e: 1d38 adds r0, r7, #4
8004770: 6800 ldr r0, [r0, #0]
8004772: f001 f84a bl 800580a <USB_WritePMA>
8004776: e319 b.n 8004dac <USB_EPStartXfer+0xe0c>
/* manage isochronous double buffer IN mode */
else
{
/* enable double buffer */
PCD_SET_EP_DBUF(USBx, ep->num);
8004778: 1d3b adds r3, r7, #4
800477a: 681a ldr r2, [r3, #0]
800477c: 463b mov r3, r7
800477e: 681b ldr r3, [r3, #0]
8004780: 781b ldrb r3, [r3, #0]
8004782: 009b lsls r3, r3, #2
8004784: 4413 add r3, r2
8004786: 881b ldrh r3, [r3, #0]
8004788: b29b uxth r3, r3
800478a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800478e: f023 0370 bic.w r3, r3, #112 ; 0x70
8004792: f8a7 30a8 strh.w r3, [r7, #168] ; 0xa8
8004796: 1d3b adds r3, r7, #4
8004798: 681a ldr r2, [r3, #0]
800479a: 463b mov r3, r7
800479c: 681b ldr r3, [r3, #0]
800479e: 781b ldrb r3, [r3, #0]
80047a0: 009b lsls r3, r3, #2
80047a2: 441a add r2, r3
80047a4: f8b7 30a8 ldrh.w r3, [r7, #168] ; 0xa8
80047a8: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80047ac: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80047b0: f443 4301 orr.w r3, r3, #33024 ; 0x8100
80047b4: f043 0380 orr.w r3, r3, #128 ; 0x80
80047b8: b29b uxth r3, r3
80047ba: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
80047bc: 463b mov r3, r7
80047be: 681b ldr r3, [r3, #0]
80047c0: 6a1a ldr r2, [r3, #32]
80047c2: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80047c6: 1ad2 subs r2, r2, r3
80047c8: 463b mov r3, r7
80047ca: 681b ldr r3, [r3, #0]
80047cc: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
80047ce: 1d3b adds r3, r7, #4
80047d0: 681a ldr r2, [r3, #0]
80047d2: 463b mov r3, r7
80047d4: 681b ldr r3, [r3, #0]
80047d6: 781b ldrb r3, [r3, #0]
80047d8: 009b lsls r3, r3, #2
80047da: 4413 add r3, r2
80047dc: 881b ldrh r3, [r3, #0]
80047de: b29b uxth r3, r3
80047e0: f003 0340 and.w r3, r3, #64 ; 0x40
80047e4: 2b00 cmp r3, #0
80047e6: f000 8162 beq.w 8004aae <USB_EPStartXfer+0xb0e>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
80047ea: 1d3b adds r3, r7, #4
80047ec: 681b ldr r3, [r3, #0]
80047ee: f8c7 3080 str.w r3, [r7, #128] ; 0x80
80047f2: 463b mov r3, r7
80047f4: 681b ldr r3, [r3, #0]
80047f6: 785b ldrb r3, [r3, #1]
80047f8: 2b00 cmp r3, #0
80047fa: d164 bne.n 80048c6 <USB_EPStartXfer+0x926>
80047fc: 1d3b adds r3, r7, #4
80047fe: 681b ldr r3, [r3, #0]
8004800: 67bb str r3, [r7, #120] ; 0x78
8004802: 1d3b adds r3, r7, #4
8004804: 681b ldr r3, [r3, #0]
8004806: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800480a: b29b uxth r3, r3
800480c: 461a mov r2, r3
800480e: 6fbb ldr r3, [r7, #120] ; 0x78
8004810: 4413 add r3, r2
8004812: 67bb str r3, [r7, #120] ; 0x78
8004814: 463b mov r3, r7
8004816: 681b ldr r3, [r3, #0]
8004818: 781b ldrb r3, [r3, #0]
800481a: 011a lsls r2, r3, #4
800481c: 6fbb ldr r3, [r7, #120] ; 0x78
800481e: 4413 add r3, r2
8004820: f203 430c addw r3, r3, #1036 ; 0x40c
8004824: 677b str r3, [r7, #116] ; 0x74
8004826: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800482a: 2b00 cmp r3, #0
800482c: d112 bne.n 8004854 <USB_EPStartXfer+0x8b4>
800482e: 6f7b ldr r3, [r7, #116] ; 0x74
8004830: 881b ldrh r3, [r3, #0]
8004832: b29b uxth r3, r3
8004834: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8004838: b29a uxth r2, r3
800483a: 6f7b ldr r3, [r7, #116] ; 0x74
800483c: 801a strh r2, [r3, #0]
800483e: 6f7b ldr r3, [r7, #116] ; 0x74
8004840: 881b ldrh r3, [r3, #0]
8004842: b29b uxth r3, r3
8004844: ea6f 4343 mvn.w r3, r3, lsl #17
8004848: ea6f 4353 mvn.w r3, r3, lsr #17
800484c: b29a uxth r2, r3
800484e: 6f7b ldr r3, [r7, #116] ; 0x74
8004850: 801a strh r2, [r3, #0]
8004852: e057 b.n 8004904 <USB_EPStartXfer+0x964>
8004854: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004858: 2b3e cmp r3, #62 ; 0x3e
800485a: d817 bhi.n 800488c <USB_EPStartXfer+0x8ec>
800485c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004860: 085b lsrs r3, r3, #1
8004862: f8c7 3118 str.w r3, [r7, #280] ; 0x118
8004866: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800486a: f003 0301 and.w r3, r3, #1
800486e: 2b00 cmp r3, #0
8004870: d004 beq.n 800487c <USB_EPStartXfer+0x8dc>
8004872: f8d7 3118 ldr.w r3, [r7, #280] ; 0x118
8004876: 3301 adds r3, #1
8004878: f8c7 3118 str.w r3, [r7, #280] ; 0x118
800487c: f8d7 3118 ldr.w r3, [r7, #280] ; 0x118
8004880: b29b uxth r3, r3
8004882: 029b lsls r3, r3, #10
8004884: b29a uxth r2, r3
8004886: 6f7b ldr r3, [r7, #116] ; 0x74
8004888: 801a strh r2, [r3, #0]
800488a: e03b b.n 8004904 <USB_EPStartXfer+0x964>
800488c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004890: 095b lsrs r3, r3, #5
8004892: f8c7 3118 str.w r3, [r7, #280] ; 0x118
8004896: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800489a: f003 031f and.w r3, r3, #31
800489e: 2b00 cmp r3, #0
80048a0: d104 bne.n 80048ac <USB_EPStartXfer+0x90c>
80048a2: f8d7 3118 ldr.w r3, [r7, #280] ; 0x118
80048a6: 3b01 subs r3, #1
80048a8: f8c7 3118 str.w r3, [r7, #280] ; 0x118
80048ac: f8d7 3118 ldr.w r3, [r7, #280] ; 0x118
80048b0: b29b uxth r3, r3
80048b2: 029b lsls r3, r3, #10
80048b4: b29b uxth r3, r3
80048b6: ea6f 4343 mvn.w r3, r3, lsl #17
80048ba: ea6f 4353 mvn.w r3, r3, lsr #17
80048be: b29a uxth r2, r3
80048c0: 6f7b ldr r3, [r7, #116] ; 0x74
80048c2: 801a strh r2, [r3, #0]
80048c4: e01e b.n 8004904 <USB_EPStartXfer+0x964>
80048c6: 463b mov r3, r7
80048c8: 681b ldr r3, [r3, #0]
80048ca: 785b ldrb r3, [r3, #1]
80048cc: 2b01 cmp r3, #1
80048ce: d119 bne.n 8004904 <USB_EPStartXfer+0x964>
80048d0: 1d3b adds r3, r7, #4
80048d2: 681b ldr r3, [r3, #0]
80048d4: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80048d8: b29b uxth r3, r3
80048da: 461a mov r2, r3
80048dc: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80
80048e0: 4413 add r3, r2
80048e2: f8c7 3080 str.w r3, [r7, #128] ; 0x80
80048e6: 463b mov r3, r7
80048e8: 681b ldr r3, [r3, #0]
80048ea: 781b ldrb r3, [r3, #0]
80048ec: 011a lsls r2, r3, #4
80048ee: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80
80048f2: 4413 add r3, r2
80048f4: f203 430c addw r3, r3, #1036 ; 0x40c
80048f8: 67fb str r3, [r7, #124] ; 0x7c
80048fa: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80048fe: b29a uxth r2, r3
8004900: 6ffb ldr r3, [r7, #124] ; 0x7c
8004902: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8004904: 463b mov r3, r7
8004906: 681b ldr r3, [r3, #0]
8004908: 895b ldrh r3, [r3, #10]
800490a: f8a7 3096 strh.w r3, [r7, #150] ; 0x96
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800490e: 463b mov r3, r7
8004910: 681b ldr r3, [r3, #0]
8004912: 6959 ldr r1, [r3, #20]
8004914: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004918: b29b uxth r3, r3
800491a: f8b7 2096 ldrh.w r2, [r7, #150] ; 0x96
800491e: 1d38 adds r0, r7, #4
8004920: 6800 ldr r0, [r0, #0]
8004922: f000 ff72 bl 800580a <USB_WritePMA>
ep->xfer_buff += len;
8004926: 463b mov r3, r7
8004928: 681b ldr r3, [r3, #0]
800492a: 695a ldr r2, [r3, #20]
800492c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004930: 441a add r2, r3
8004932: 463b mov r3, r7
8004934: 681b ldr r3, [r3, #0]
8004936: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8004938: 463b mov r3, r7
800493a: 681b ldr r3, [r3, #0]
800493c: 6a1a ldr r2, [r3, #32]
800493e: 463b mov r3, r7
8004940: 681b ldr r3, [r3, #0]
8004942: 691b ldr r3, [r3, #16]
8004944: 429a cmp r2, r3
8004946: d909 bls.n 800495c <USB_EPStartXfer+0x9bc>
{
ep->xfer_len_db -= len;
8004948: 463b mov r3, r7
800494a: 681b ldr r3, [r3, #0]
800494c: 6a1a ldr r2, [r3, #32]
800494e: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004952: 1ad2 subs r2, r2, r3
8004954: 463b mov r3, r7
8004956: 681b ldr r3, [r3, #0]
8004958: 621a str r2, [r3, #32]
800495a: e008 b.n 800496e <USB_EPStartXfer+0x9ce>
}
else
{
len = ep->xfer_len_db;
800495c: 463b mov r3, r7
800495e: 681b ldr r3, [r3, #0]
8004960: 6a1b ldr r3, [r3, #32]
8004962: f8c7 312c str.w r3, [r7, #300] ; 0x12c
ep->xfer_len_db = 0U;
8004966: 463b mov r3, r7
8004968: 681b ldr r3, [r3, #0]
800496a: 2200 movs r2, #0
800496c: 621a str r2, [r3, #32]
}
if (len > 0U)
800496e: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004972: 2b00 cmp r3, #0
8004974: f000 821a beq.w 8004dac <USB_EPStartXfer+0xe0c>
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8004978: 463b mov r3, r7
800497a: 681b ldr r3, [r3, #0]
800497c: 785b ldrb r3, [r3, #1]
800497e: 2b00 cmp r3, #0
8004980: d164 bne.n 8004a4c <USB_EPStartXfer+0xaac>
8004982: 1d3b adds r3, r7, #4
8004984: 681b ldr r3, [r3, #0]
8004986: 66bb str r3, [r7, #104] ; 0x68
8004988: 1d3b adds r3, r7, #4
800498a: 681b ldr r3, [r3, #0]
800498c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8004990: b29b uxth r3, r3
8004992: 461a mov r2, r3
8004994: 6ebb ldr r3, [r7, #104] ; 0x68
8004996: 4413 add r3, r2
8004998: 66bb str r3, [r7, #104] ; 0x68
800499a: 463b mov r3, r7
800499c: 681b ldr r3, [r3, #0]
800499e: 781b ldrb r3, [r3, #0]
80049a0: 011a lsls r2, r3, #4
80049a2: 6ebb ldr r3, [r7, #104] ; 0x68
80049a4: 4413 add r3, r2
80049a6: f203 4304 addw r3, r3, #1028 ; 0x404
80049aa: 667b str r3, [r7, #100] ; 0x64
80049ac: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80049b0: 2b00 cmp r3, #0
80049b2: d112 bne.n 80049da <USB_EPStartXfer+0xa3a>
80049b4: 6e7b ldr r3, [r7, #100] ; 0x64
80049b6: 881b ldrh r3, [r3, #0]
80049b8: b29b uxth r3, r3
80049ba: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80049be: b29a uxth r2, r3
80049c0: 6e7b ldr r3, [r7, #100] ; 0x64
80049c2: 801a strh r2, [r3, #0]
80049c4: 6e7b ldr r3, [r7, #100] ; 0x64
80049c6: 881b ldrh r3, [r3, #0]
80049c8: b29b uxth r3, r3
80049ca: ea6f 4343 mvn.w r3, r3, lsl #17
80049ce: ea6f 4353 mvn.w r3, r3, lsr #17
80049d2: b29a uxth r2, r3
80049d4: 6e7b ldr r3, [r7, #100] ; 0x64
80049d6: 801a strh r2, [r3, #0]
80049d8: e057 b.n 8004a8a <USB_EPStartXfer+0xaea>
80049da: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80049de: 2b3e cmp r3, #62 ; 0x3e
80049e0: d817 bhi.n 8004a12 <USB_EPStartXfer+0xa72>
80049e2: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80049e6: 085b lsrs r3, r3, #1
80049e8: f8c7 3114 str.w r3, [r7, #276] ; 0x114
80049ec: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80049f0: f003 0301 and.w r3, r3, #1
80049f4: 2b00 cmp r3, #0
80049f6: d004 beq.n 8004a02 <USB_EPStartXfer+0xa62>
80049f8: f8d7 3114 ldr.w r3, [r7, #276] ; 0x114
80049fc: 3301 adds r3, #1
80049fe: f8c7 3114 str.w r3, [r7, #276] ; 0x114
8004a02: f8d7 3114 ldr.w r3, [r7, #276] ; 0x114
8004a06: b29b uxth r3, r3
8004a08: 029b lsls r3, r3, #10
8004a0a: b29a uxth r2, r3
8004a0c: 6e7b ldr r3, [r7, #100] ; 0x64
8004a0e: 801a strh r2, [r3, #0]
8004a10: e03b b.n 8004a8a <USB_EPStartXfer+0xaea>
8004a12: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004a16: 095b lsrs r3, r3, #5
8004a18: f8c7 3114 str.w r3, [r7, #276] ; 0x114
8004a1c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004a20: f003 031f and.w r3, r3, #31
8004a24: 2b00 cmp r3, #0
8004a26: d104 bne.n 8004a32 <USB_EPStartXfer+0xa92>
8004a28: f8d7 3114 ldr.w r3, [r7, #276] ; 0x114
8004a2c: 3b01 subs r3, #1
8004a2e: f8c7 3114 str.w r3, [r7, #276] ; 0x114
8004a32: f8d7 3114 ldr.w r3, [r7, #276] ; 0x114
8004a36: b29b uxth r3, r3
8004a38: 029b lsls r3, r3, #10
8004a3a: b29b uxth r3, r3
8004a3c: ea6f 4343 mvn.w r3, r3, lsl #17
8004a40: ea6f 4353 mvn.w r3, r3, lsr #17
8004a44: b29a uxth r2, r3
8004a46: 6e7b ldr r3, [r7, #100] ; 0x64
8004a48: 801a strh r2, [r3, #0]
8004a4a: e01e b.n 8004a8a <USB_EPStartXfer+0xaea>
8004a4c: 463b mov r3, r7
8004a4e: 681b ldr r3, [r3, #0]
8004a50: 785b ldrb r3, [r3, #1]
8004a52: 2b01 cmp r3, #1
8004a54: d119 bne.n 8004a8a <USB_EPStartXfer+0xaea>
8004a56: 1d3b adds r3, r7, #4
8004a58: 681b ldr r3, [r3, #0]
8004a5a: 673b str r3, [r7, #112] ; 0x70
8004a5c: 1d3b adds r3, r7, #4
8004a5e: 681b ldr r3, [r3, #0]
8004a60: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8004a64: b29b uxth r3, r3
8004a66: 461a mov r2, r3
8004a68: 6f3b ldr r3, [r7, #112] ; 0x70
8004a6a: 4413 add r3, r2
8004a6c: 673b str r3, [r7, #112] ; 0x70
8004a6e: 463b mov r3, r7
8004a70: 681b ldr r3, [r3, #0]
8004a72: 781b ldrb r3, [r3, #0]
8004a74: 011a lsls r2, r3, #4
8004a76: 6f3b ldr r3, [r7, #112] ; 0x70
8004a78: 4413 add r3, r2
8004a7a: f203 4304 addw r3, r3, #1028 ; 0x404
8004a7e: 66fb str r3, [r7, #108] ; 0x6c
8004a80: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004a84: b29a uxth r2, r3
8004a86: 6efb ldr r3, [r7, #108] ; 0x6c
8004a88: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8004a8a: 463b mov r3, r7
8004a8c: 681b ldr r3, [r3, #0]
8004a8e: 891b ldrh r3, [r3, #8]
8004a90: f8a7 3096 strh.w r3, [r7, #150] ; 0x96
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8004a94: 463b mov r3, r7
8004a96: 681b ldr r3, [r3, #0]
8004a98: 6959 ldr r1, [r3, #20]
8004a9a: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004a9e: b29b uxth r3, r3
8004aa0: f8b7 2096 ldrh.w r2, [r7, #150] ; 0x96
8004aa4: 1d38 adds r0, r7, #4
8004aa6: 6800 ldr r0, [r0, #0]
8004aa8: f000 feaf bl 800580a <USB_WritePMA>
8004aac: e17e b.n 8004dac <USB_EPStartXfer+0xe0c>
}
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8004aae: 463b mov r3, r7
8004ab0: 681b ldr r3, [r3, #0]
8004ab2: 785b ldrb r3, [r3, #1]
8004ab4: 2b00 cmp r3, #0
8004ab6: d16f bne.n 8004b98 <USB_EPStartXfer+0xbf8>
8004ab8: 1d3b adds r3, r7, #4
8004aba: 681b ldr r3, [r3, #0]
8004abc: f8c7 309c str.w r3, [r7, #156] ; 0x9c
8004ac0: 1d3b adds r3, r7, #4
8004ac2: 681b ldr r3, [r3, #0]
8004ac4: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8004ac8: b29b uxth r3, r3
8004aca: 461a mov r2, r3
8004acc: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
8004ad0: 4413 add r3, r2
8004ad2: f8c7 309c str.w r3, [r7, #156] ; 0x9c
8004ad6: 463b mov r3, r7
8004ad8: 681b ldr r3, [r3, #0]
8004ada: 781b ldrb r3, [r3, #0]
8004adc: 011a lsls r2, r3, #4
8004ade: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c
8004ae2: 4413 add r3, r2
8004ae4: f203 4304 addw r3, r3, #1028 ; 0x404
8004ae8: f8c7 3098 str.w r3, [r7, #152] ; 0x98
8004aec: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004af0: 2b00 cmp r3, #0
8004af2: d116 bne.n 8004b22 <USB_EPStartXfer+0xb82>
8004af4: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98
8004af8: 881b ldrh r3, [r3, #0]
8004afa: b29b uxth r3, r3
8004afc: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8004b00: b29a uxth r2, r3
8004b02: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98
8004b06: 801a strh r2, [r3, #0]
8004b08: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98
8004b0c: 881b ldrh r3, [r3, #0]
8004b0e: b29b uxth r3, r3
8004b10: ea6f 4343 mvn.w r3, r3, lsl #17
8004b14: ea6f 4353 mvn.w r3, r3, lsr #17
8004b18: b29a uxth r2, r3
8004b1a: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98
8004b1e: 801a strh r2, [r3, #0]
8004b20: e05f b.n 8004be2 <USB_EPStartXfer+0xc42>
8004b22: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004b26: 2b3e cmp r3, #62 ; 0x3e
8004b28: d818 bhi.n 8004b5c <USB_EPStartXfer+0xbbc>
8004b2a: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004b2e: 085b lsrs r3, r3, #1
8004b30: f8c7 3110 str.w r3, [r7, #272] ; 0x110
8004b34: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004b38: f003 0301 and.w r3, r3, #1
8004b3c: 2b00 cmp r3, #0
8004b3e: d004 beq.n 8004b4a <USB_EPStartXfer+0xbaa>
8004b40: f8d7 3110 ldr.w r3, [r7, #272] ; 0x110
8004b44: 3301 adds r3, #1
8004b46: f8c7 3110 str.w r3, [r7, #272] ; 0x110
8004b4a: f8d7 3110 ldr.w r3, [r7, #272] ; 0x110
8004b4e: b29b uxth r3, r3
8004b50: 029b lsls r3, r3, #10
8004b52: b29a uxth r2, r3
8004b54: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98
8004b58: 801a strh r2, [r3, #0]
8004b5a: e042 b.n 8004be2 <USB_EPStartXfer+0xc42>
8004b5c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004b60: 095b lsrs r3, r3, #5
8004b62: f8c7 3110 str.w r3, [r7, #272] ; 0x110
8004b66: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004b6a: f003 031f and.w r3, r3, #31
8004b6e: 2b00 cmp r3, #0
8004b70: d104 bne.n 8004b7c <USB_EPStartXfer+0xbdc>
8004b72: f8d7 3110 ldr.w r3, [r7, #272] ; 0x110
8004b76: 3b01 subs r3, #1
8004b78: f8c7 3110 str.w r3, [r7, #272] ; 0x110
8004b7c: f8d7 3110 ldr.w r3, [r7, #272] ; 0x110
8004b80: b29b uxth r3, r3
8004b82: 029b lsls r3, r3, #10
8004b84: b29b uxth r3, r3
8004b86: ea6f 4343 mvn.w r3, r3, lsl #17
8004b8a: ea6f 4353 mvn.w r3, r3, lsr #17
8004b8e: b29a uxth r2, r3
8004b90: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98
8004b94: 801a strh r2, [r3, #0]
8004b96: e024 b.n 8004be2 <USB_EPStartXfer+0xc42>
8004b98: 463b mov r3, r7
8004b9a: 681b ldr r3, [r3, #0]
8004b9c: 785b ldrb r3, [r3, #1]
8004b9e: 2b01 cmp r3, #1
8004ba0: d11f bne.n 8004be2 <USB_EPStartXfer+0xc42>
8004ba2: 1d3b adds r3, r7, #4
8004ba4: 681b ldr r3, [r3, #0]
8004ba6: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4
8004baa: 1d3b adds r3, r7, #4
8004bac: 681b ldr r3, [r3, #0]
8004bae: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8004bb2: b29b uxth r3, r3
8004bb4: 461a mov r2, r3
8004bb6: f8d7 30a4 ldr.w r3, [r7, #164] ; 0xa4
8004bba: 4413 add r3, r2
8004bbc: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4
8004bc0: 463b mov r3, r7
8004bc2: 681b ldr r3, [r3, #0]
8004bc4: 781b ldrb r3, [r3, #0]
8004bc6: 011a lsls r2, r3, #4
8004bc8: f8d7 30a4 ldr.w r3, [r7, #164] ; 0xa4
8004bcc: 4413 add r3, r2
8004bce: f203 4304 addw r3, r3, #1028 ; 0x404
8004bd2: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0
8004bd6: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004bda: b29a uxth r2, r3
8004bdc: f8d7 30a0 ldr.w r3, [r7, #160] ; 0xa0
8004be0: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8004be2: 463b mov r3, r7
8004be4: 681b ldr r3, [r3, #0]
8004be6: 891b ldrh r3, [r3, #8]
8004be8: f8a7 3096 strh.w r3, [r7, #150] ; 0x96
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8004bec: 463b mov r3, r7
8004bee: 681b ldr r3, [r3, #0]
8004bf0: 6959 ldr r1, [r3, #20]
8004bf2: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004bf6: b29b uxth r3, r3
8004bf8: f8b7 2096 ldrh.w r2, [r7, #150] ; 0x96
8004bfc: 1d38 adds r0, r7, #4
8004bfe: 6800 ldr r0, [r0, #0]
8004c00: f000 fe03 bl 800580a <USB_WritePMA>
ep->xfer_buff += len;
8004c04: 463b mov r3, r7
8004c06: 681b ldr r3, [r3, #0]
8004c08: 695a ldr r2, [r3, #20]
8004c0a: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004c0e: 441a add r2, r3
8004c10: 463b mov r3, r7
8004c12: 681b ldr r3, [r3, #0]
8004c14: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8004c16: 463b mov r3, r7
8004c18: 681b ldr r3, [r3, #0]
8004c1a: 6a1a ldr r2, [r3, #32]
8004c1c: 463b mov r3, r7
8004c1e: 681b ldr r3, [r3, #0]
8004c20: 691b ldr r3, [r3, #16]
8004c22: 429a cmp r2, r3
8004c24: d909 bls.n 8004c3a <USB_EPStartXfer+0xc9a>
{
ep->xfer_len_db -= len;
8004c26: 463b mov r3, r7
8004c28: 681b ldr r3, [r3, #0]
8004c2a: 6a1a ldr r2, [r3, #32]
8004c2c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004c30: 1ad2 subs r2, r2, r3
8004c32: 463b mov r3, r7
8004c34: 681b ldr r3, [r3, #0]
8004c36: 621a str r2, [r3, #32]
8004c38: e008 b.n 8004c4c <USB_EPStartXfer+0xcac>
}
else
{
len = ep->xfer_len_db;
8004c3a: 463b mov r3, r7
8004c3c: 681b ldr r3, [r3, #0]
8004c3e: 6a1b ldr r3, [r3, #32]
8004c40: f8c7 312c str.w r3, [r7, #300] ; 0x12c
ep->xfer_len_db = 0U;
8004c44: 463b mov r3, r7
8004c46: 681b ldr r3, [r3, #0]
8004c48: 2200 movs r2, #0
8004c4a: 621a str r2, [r3, #32]
}
if (len > 0U)
8004c4c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004c50: 2b00 cmp r3, #0
8004c52: f000 80ab beq.w 8004dac <USB_EPStartXfer+0xe0c>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8004c56: 1d3b adds r3, r7, #4
8004c58: 681b ldr r3, [r3, #0]
8004c5a: f8c7 3090 str.w r3, [r7, #144] ; 0x90
8004c5e: 463b mov r3, r7
8004c60: 681b ldr r3, [r3, #0]
8004c62: 785b ldrb r3, [r3, #1]
8004c64: 2b00 cmp r3, #0
8004c66: d16f bne.n 8004d48 <USB_EPStartXfer+0xda8>
8004c68: 1d3b adds r3, r7, #4
8004c6a: 681b ldr r3, [r3, #0]
8004c6c: f8c7 3088 str.w r3, [r7, #136] ; 0x88
8004c70: 1d3b adds r3, r7, #4
8004c72: 681b ldr r3, [r3, #0]
8004c74: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8004c78: b29b uxth r3, r3
8004c7a: 461a mov r2, r3
8004c7c: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88
8004c80: 4413 add r3, r2
8004c82: f8c7 3088 str.w r3, [r7, #136] ; 0x88
8004c86: 463b mov r3, r7
8004c88: 681b ldr r3, [r3, #0]
8004c8a: 781b ldrb r3, [r3, #0]
8004c8c: 011a lsls r2, r3, #4
8004c8e: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88
8004c92: 4413 add r3, r2
8004c94: f203 430c addw r3, r3, #1036 ; 0x40c
8004c98: f8c7 3084 str.w r3, [r7, #132] ; 0x84
8004c9c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004ca0: 2b00 cmp r3, #0
8004ca2: d116 bne.n 8004cd2 <USB_EPStartXfer+0xd32>
8004ca4: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8004ca8: 881b ldrh r3, [r3, #0]
8004caa: b29b uxth r3, r3
8004cac: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8004cb0: b29a uxth r2, r3
8004cb2: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8004cb6: 801a strh r2, [r3, #0]
8004cb8: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8004cbc: 881b ldrh r3, [r3, #0]
8004cbe: b29b uxth r3, r3
8004cc0: ea6f 4343 mvn.w r3, r3, lsl #17
8004cc4: ea6f 4353 mvn.w r3, r3, lsr #17
8004cc8: b29a uxth r2, r3
8004cca: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8004cce: 801a strh r2, [r3, #0]
8004cd0: e05b b.n 8004d8a <USB_EPStartXfer+0xdea>
8004cd2: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004cd6: 2b3e cmp r3, #62 ; 0x3e
8004cd8: d818 bhi.n 8004d0c <USB_EPStartXfer+0xd6c>
8004cda: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004cde: 085b lsrs r3, r3, #1
8004ce0: f8c7 310c str.w r3, [r7, #268] ; 0x10c
8004ce4: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004ce8: f003 0301 and.w r3, r3, #1
8004cec: 2b00 cmp r3, #0
8004cee: d004 beq.n 8004cfa <USB_EPStartXfer+0xd5a>
8004cf0: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8004cf4: 3301 adds r3, #1
8004cf6: f8c7 310c str.w r3, [r7, #268] ; 0x10c
8004cfa: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8004cfe: b29b uxth r3, r3
8004d00: 029b lsls r3, r3, #10
8004d02: b29a uxth r2, r3
8004d04: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8004d08: 801a strh r2, [r3, #0]
8004d0a: e03e b.n 8004d8a <USB_EPStartXfer+0xdea>
8004d0c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004d10: 095b lsrs r3, r3, #5
8004d12: f8c7 310c str.w r3, [r7, #268] ; 0x10c
8004d16: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004d1a: f003 031f and.w r3, r3, #31
8004d1e: 2b00 cmp r3, #0
8004d20: d104 bne.n 8004d2c <USB_EPStartXfer+0xd8c>
8004d22: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8004d26: 3b01 subs r3, #1
8004d28: f8c7 310c str.w r3, [r7, #268] ; 0x10c
8004d2c: f8d7 310c ldr.w r3, [r7, #268] ; 0x10c
8004d30: b29b uxth r3, r3
8004d32: 029b lsls r3, r3, #10
8004d34: b29b uxth r3, r3
8004d36: ea6f 4343 mvn.w r3, r3, lsl #17
8004d3a: ea6f 4353 mvn.w r3, r3, lsr #17
8004d3e: b29a uxth r2, r3
8004d40: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84
8004d44: 801a strh r2, [r3, #0]
8004d46: e020 b.n 8004d8a <USB_EPStartXfer+0xdea>
8004d48: 463b mov r3, r7
8004d4a: 681b ldr r3, [r3, #0]
8004d4c: 785b ldrb r3, [r3, #1]
8004d4e: 2b01 cmp r3, #1
8004d50: d11b bne.n 8004d8a <USB_EPStartXfer+0xdea>
8004d52: 1d3b adds r3, r7, #4
8004d54: 681b ldr r3, [r3, #0]
8004d56: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8004d5a: b29b uxth r3, r3
8004d5c: 461a mov r2, r3
8004d5e: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
8004d62: 4413 add r3, r2
8004d64: f8c7 3090 str.w r3, [r7, #144] ; 0x90
8004d68: 463b mov r3, r7
8004d6a: 681b ldr r3, [r3, #0]
8004d6c: 781b ldrb r3, [r3, #0]
8004d6e: 011a lsls r2, r3, #4
8004d70: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90
8004d74: 4413 add r3, r2
8004d76: f203 430c addw r3, r3, #1036 ; 0x40c
8004d7a: f8c7 308c str.w r3, [r7, #140] ; 0x8c
8004d7e: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004d82: b29a uxth r2, r3
8004d84: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c
8004d88: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8004d8a: 463b mov r3, r7
8004d8c: 681b ldr r3, [r3, #0]
8004d8e: 895b ldrh r3, [r3, #10]
8004d90: f8a7 3096 strh.w r3, [r7, #150] ; 0x96
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8004d94: 463b mov r3, r7
8004d96: 681b ldr r3, [r3, #0]
8004d98: 6959 ldr r1, [r3, #20]
8004d9a: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004d9e: b29b uxth r3, r3
8004da0: f8b7 2096 ldrh.w r2, [r7, #150] ; 0x96
8004da4: 1d38 adds r0, r7, #4
8004da6: 6800 ldr r0, [r0, #0]
8004da8: f000 fd2f bl 800580a <USB_WritePMA>
}
}
}
}
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
8004dac: 1d3b adds r3, r7, #4
8004dae: 681a ldr r2, [r3, #0]
8004db0: 463b mov r3, r7
8004db2: 681b ldr r3, [r3, #0]
8004db4: 781b ldrb r3, [r3, #0]
8004db6: 009b lsls r3, r3, #2
8004db8: 4413 add r3, r2
8004dba: 881b ldrh r3, [r3, #0]
8004dbc: b29b uxth r3, r3
8004dbe: f107 020a add.w r2, r7, #10
8004dc2: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8004dc6: f023 0340 bic.w r3, r3, #64 ; 0x40
8004dca: 8013 strh r3, [r2, #0]
8004dcc: f107 030a add.w r3, r7, #10
8004dd0: f107 020a add.w r2, r7, #10
8004dd4: 8812 ldrh r2, [r2, #0]
8004dd6: f082 0210 eor.w r2, r2, #16
8004dda: 801a strh r2, [r3, #0]
8004ddc: f107 030a add.w r3, r7, #10
8004de0: f107 020a add.w r2, r7, #10
8004de4: 8812 ldrh r2, [r2, #0]
8004de6: f082 0220 eor.w r2, r2, #32
8004dea: 801a strh r2, [r3, #0]
8004dec: 1d3b adds r3, r7, #4
8004dee: 681a ldr r2, [r3, #0]
8004df0: 463b mov r3, r7
8004df2: 681b ldr r3, [r3, #0]
8004df4: 781b ldrb r3, [r3, #0]
8004df6: 009b lsls r3, r3, #2
8004df8: 441a add r2, r3
8004dfa: f107 030a add.w r3, r7, #10
8004dfe: 881b ldrh r3, [r3, #0]
8004e00: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8004e04: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8004e08: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8004e0c: f043 0380 orr.w r3, r3, #128 ; 0x80
8004e10: b29b uxth r3, r3
8004e12: 8013 strh r3, [r2, #0]
8004e14: e3b5 b.n 8005582 <USB_EPStartXfer+0x15e2>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
8004e16: 463b mov r3, r7
8004e18: 681b ldr r3, [r3, #0]
8004e1a: 7b1b ldrb r3, [r3, #12]
8004e1c: 2b00 cmp r3, #0
8004e1e: f040 8090 bne.w 8004f42 <USB_EPStartXfer+0xfa2>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
8004e22: 463b mov r3, r7
8004e24: 681b ldr r3, [r3, #0]
8004e26: 699a ldr r2, [r3, #24]
8004e28: 463b mov r3, r7
8004e2a: 681b ldr r3, [r3, #0]
8004e2c: 691b ldr r3, [r3, #16]
8004e2e: 429a cmp r2, r3
8004e30: d90e bls.n 8004e50 <USB_EPStartXfer+0xeb0>
{
len = ep->maxpacket;
8004e32: 463b mov r3, r7
8004e34: 681b ldr r3, [r3, #0]
8004e36: 691b ldr r3, [r3, #16]
8004e38: f8c7 312c str.w r3, [r7, #300] ; 0x12c
ep->xfer_len -= len;
8004e3c: 463b mov r3, r7
8004e3e: 681b ldr r3, [r3, #0]
8004e40: 699a ldr r2, [r3, #24]
8004e42: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004e46: 1ad2 subs r2, r2, r3
8004e48: 463b mov r3, r7
8004e4a: 681b ldr r3, [r3, #0]
8004e4c: 619a str r2, [r3, #24]
8004e4e: e008 b.n 8004e62 <USB_EPStartXfer+0xec2>
}
else
{
len = ep->xfer_len;
8004e50: 463b mov r3, r7
8004e52: 681b ldr r3, [r3, #0]
8004e54: 699b ldr r3, [r3, #24]
8004e56: f8c7 312c str.w r3, [r7, #300] ; 0x12c
ep->xfer_len = 0U;
8004e5a: 463b mov r3, r7
8004e5c: 681b ldr r3, [r3, #0]
8004e5e: 2200 movs r2, #0
8004e60: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
8004e62: 1d3b adds r3, r7, #4
8004e64: 681b ldr r3, [r3, #0]
8004e66: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0
8004e6a: 1d3b adds r3, r7, #4
8004e6c: 681b ldr r3, [r3, #0]
8004e6e: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8004e72: b29b uxth r3, r3
8004e74: 461a mov r2, r3
8004e76: f8d7 30b0 ldr.w r3, [r7, #176] ; 0xb0
8004e7a: 4413 add r3, r2
8004e7c: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0
8004e80: 463b mov r3, r7
8004e82: 681b ldr r3, [r3, #0]
8004e84: 781b ldrb r3, [r3, #0]
8004e86: 011a lsls r2, r3, #4
8004e88: f8d7 30b0 ldr.w r3, [r7, #176] ; 0xb0
8004e8c: 4413 add r3, r2
8004e8e: f203 430c addw r3, r3, #1036 ; 0x40c
8004e92: f8c7 30ac str.w r3, [r7, #172] ; 0xac
8004e96: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004e9a: 2b00 cmp r3, #0
8004e9c: d116 bne.n 8004ecc <USB_EPStartXfer+0xf2c>
8004e9e: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
8004ea2: 881b ldrh r3, [r3, #0]
8004ea4: b29b uxth r3, r3
8004ea6: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8004eaa: b29a uxth r2, r3
8004eac: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
8004eb0: 801a strh r2, [r3, #0]
8004eb2: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
8004eb6: 881b ldrh r3, [r3, #0]
8004eb8: b29b uxth r3, r3
8004eba: ea6f 4343 mvn.w r3, r3, lsl #17
8004ebe: ea6f 4353 mvn.w r3, r3, lsr #17
8004ec2: b29a uxth r2, r3
8004ec4: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
8004ec8: 801a strh r2, [r3, #0]
8004eca: e32c b.n 8005526 <USB_EPStartXfer+0x1586>
8004ecc: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004ed0: 2b3e cmp r3, #62 ; 0x3e
8004ed2: d818 bhi.n 8004f06 <USB_EPStartXfer+0xf66>
8004ed4: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004ed8: 085b lsrs r3, r3, #1
8004eda: f8c7 3108 str.w r3, [r7, #264] ; 0x108
8004ede: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004ee2: f003 0301 and.w r3, r3, #1
8004ee6: 2b00 cmp r3, #0
8004ee8: d004 beq.n 8004ef4 <USB_EPStartXfer+0xf54>
8004eea: f8d7 3108 ldr.w r3, [r7, #264] ; 0x108
8004eee: 3301 adds r3, #1
8004ef0: f8c7 3108 str.w r3, [r7, #264] ; 0x108
8004ef4: f8d7 3108 ldr.w r3, [r7, #264] ; 0x108
8004ef8: b29b uxth r3, r3
8004efa: 029b lsls r3, r3, #10
8004efc: b29a uxth r2, r3
8004efe: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
8004f02: 801a strh r2, [r3, #0]
8004f04: e30f b.n 8005526 <USB_EPStartXfer+0x1586>
8004f06: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004f0a: 095b lsrs r3, r3, #5
8004f0c: f8c7 3108 str.w r3, [r7, #264] ; 0x108
8004f10: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8004f14: f003 031f and.w r3, r3, #31
8004f18: 2b00 cmp r3, #0
8004f1a: d104 bne.n 8004f26 <USB_EPStartXfer+0xf86>
8004f1c: f8d7 3108 ldr.w r3, [r7, #264] ; 0x108
8004f20: 3b01 subs r3, #1
8004f22: f8c7 3108 str.w r3, [r7, #264] ; 0x108
8004f26: f8d7 3108 ldr.w r3, [r7, #264] ; 0x108
8004f2a: b29b uxth r3, r3
8004f2c: 029b lsls r3, r3, #10
8004f2e: b29b uxth r3, r3
8004f30: ea6f 4343 mvn.w r3, r3, lsl #17
8004f34: ea6f 4353 mvn.w r3, r3, lsr #17
8004f38: b29a uxth r2, r3
8004f3a: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac
8004f3e: 801a strh r2, [r3, #0]
8004f40: e2f1 b.n 8005526 <USB_EPStartXfer+0x1586>
}
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
8004f42: 463b mov r3, r7
8004f44: 681b ldr r3, [r3, #0]
8004f46: 78db ldrb r3, [r3, #3]
8004f48: 2b02 cmp r3, #2
8004f4a: f040 818f bne.w 800526c <USB_EPStartXfer+0x12cc>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
8004f4e: 463b mov r3, r7
8004f50: 681b ldr r3, [r3, #0]
8004f52: 785b ldrb r3, [r3, #1]
8004f54: 2b00 cmp r3, #0
8004f56: d175 bne.n 8005044 <USB_EPStartXfer+0x10a4>
8004f58: 1d3b adds r3, r7, #4
8004f5a: 681b ldr r3, [r3, #0]
8004f5c: f8c7 30cc str.w r3, [r7, #204] ; 0xcc
8004f60: 1d3b adds r3, r7, #4
8004f62: 681b ldr r3, [r3, #0]
8004f64: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
8004f68: b29b uxth r3, r3
8004f6a: 461a mov r2, r3
8004f6c: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
8004f70: 4413 add r3, r2
8004f72: f8c7 30cc str.w r3, [r7, #204] ; 0xcc
8004f76: 463b mov r3, r7
8004f78: 681b ldr r3, [r3, #0]
8004f7a: 781b ldrb r3, [r3, #0]
8004f7c: 011a lsls r2, r3, #4
8004f7e: f8d7 30cc ldr.w r3, [r7, #204] ; 0xcc
8004f82: 4413 add r3, r2
8004f84: f203 4304 addw r3, r3, #1028 ; 0x404
8004f88: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8
8004f8c: 463b mov r3, r7
8004f8e: 681b ldr r3, [r3, #0]
8004f90: 691b ldr r3, [r3, #16]
8004f92: 2b00 cmp r3, #0
8004f94: d116 bne.n 8004fc4 <USB_EPStartXfer+0x1024>
8004f96: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
8004f9a: 881b ldrh r3, [r3, #0]
8004f9c: b29b uxth r3, r3
8004f9e: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8004fa2: b29a uxth r2, r3
8004fa4: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
8004fa8: 801a strh r2, [r3, #0]
8004faa: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
8004fae: 881b ldrh r3, [r3, #0]
8004fb0: b29b uxth r3, r3
8004fb2: ea6f 4343 mvn.w r3, r3, lsl #17
8004fb6: ea6f 4353 mvn.w r3, r3, lsr #17
8004fba: b29a uxth r2, r3
8004fbc: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
8004fc0: 801a strh r2, [r3, #0]
8004fc2: e065 b.n 8005090 <USB_EPStartXfer+0x10f0>
8004fc4: 463b mov r3, r7
8004fc6: 681b ldr r3, [r3, #0]
8004fc8: 691b ldr r3, [r3, #16]
8004fca: 2b3e cmp r3, #62 ; 0x3e
8004fcc: d81a bhi.n 8005004 <USB_EPStartXfer+0x1064>
8004fce: 463b mov r3, r7
8004fd0: 681b ldr r3, [r3, #0]
8004fd2: 691b ldr r3, [r3, #16]
8004fd4: 085b lsrs r3, r3, #1
8004fd6: f8c7 3104 str.w r3, [r7, #260] ; 0x104
8004fda: 463b mov r3, r7
8004fdc: 681b ldr r3, [r3, #0]
8004fde: 691b ldr r3, [r3, #16]
8004fe0: f003 0301 and.w r3, r3, #1
8004fe4: 2b00 cmp r3, #0
8004fe6: d004 beq.n 8004ff2 <USB_EPStartXfer+0x1052>
8004fe8: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8004fec: 3301 adds r3, #1
8004fee: f8c7 3104 str.w r3, [r7, #260] ; 0x104
8004ff2: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8004ff6: b29b uxth r3, r3
8004ff8: 029b lsls r3, r3, #10
8004ffa: b29a uxth r2, r3
8004ffc: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
8005000: 801a strh r2, [r3, #0]
8005002: e045 b.n 8005090 <USB_EPStartXfer+0x10f0>
8005004: 463b mov r3, r7
8005006: 681b ldr r3, [r3, #0]
8005008: 691b ldr r3, [r3, #16]
800500a: 095b lsrs r3, r3, #5
800500c: f8c7 3104 str.w r3, [r7, #260] ; 0x104
8005010: 463b mov r3, r7
8005012: 681b ldr r3, [r3, #0]
8005014: 691b ldr r3, [r3, #16]
8005016: f003 031f and.w r3, r3, #31
800501a: 2b00 cmp r3, #0
800501c: d104 bne.n 8005028 <USB_EPStartXfer+0x1088>
800501e: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
8005022: 3b01 subs r3, #1
8005024: f8c7 3104 str.w r3, [r7, #260] ; 0x104
8005028: f8d7 3104 ldr.w r3, [r7, #260] ; 0x104
800502c: b29b uxth r3, r3
800502e: 029b lsls r3, r3, #10
8005030: b29b uxth r3, r3
8005032: ea6f 4343 mvn.w r3, r3, lsl #17
8005036: ea6f 4353 mvn.w r3, r3, lsr #17
800503a: b29a uxth r2, r3
800503c: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8
8005040: 801a strh r2, [r3, #0]
8005042: e025 b.n 8005090 <USB_EPStartXfer+0x10f0>
8005044: 463b mov r3, r7
8005046: 681b ldr r3, [r3, #0]
8005048: 785b ldrb r3, [r3, #1]
800504a: 2b01 cmp r3, #1
800504c: d120 bne.n 8005090 <USB_EPStartXfer+0x10f0>
800504e: 1d3b adds r3, r7, #4
8005050: 681b ldr r3, [r3, #0]
8005052: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4
8005056: 1d3b adds r3, r7, #4
8005058: 681b ldr r3, [r3, #0]
800505a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800505e: b29b uxth r3, r3
8005060: 461a mov r2, r3
8005062: f8d7 30d4 ldr.w r3, [r7, #212] ; 0xd4
8005066: 4413 add r3, r2
8005068: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4
800506c: 463b mov r3, r7
800506e: 681b ldr r3, [r3, #0]
8005070: 781b ldrb r3, [r3, #0]
8005072: 011a lsls r2, r3, #4
8005074: f8d7 30d4 ldr.w r3, [r7, #212] ; 0xd4
8005078: 4413 add r3, r2
800507a: f203 4304 addw r3, r3, #1028 ; 0x404
800507e: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0
8005082: 463b mov r3, r7
8005084: 681b ldr r3, [r3, #0]
8005086: 691b ldr r3, [r3, #16]
8005088: b29a uxth r2, r3
800508a: f8d7 30d0 ldr.w r3, [r7, #208] ; 0xd0
800508e: 801a strh r2, [r3, #0]
8005090: 1d3b adds r3, r7, #4
8005092: 681b ldr r3, [r3, #0]
8005094: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4
8005098: 463b mov r3, r7
800509a: 681b ldr r3, [r3, #0]
800509c: 785b ldrb r3, [r3, #1]
800509e: 2b00 cmp r3, #0
80050a0: d175 bne.n 800518e <USB_EPStartXfer+0x11ee>
80050a2: 1d3b adds r3, r7, #4
80050a4: 681b ldr r3, [r3, #0]
80050a6: f8c7 30bc str.w r3, [r7, #188] ; 0xbc
80050aa: 1d3b adds r3, r7, #4
80050ac: 681b ldr r3, [r3, #0]
80050ae: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80050b2: b29b uxth r3, r3
80050b4: 461a mov r2, r3
80050b6: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
80050ba: 4413 add r3, r2
80050bc: f8c7 30bc str.w r3, [r7, #188] ; 0xbc
80050c0: 463b mov r3, r7
80050c2: 681b ldr r3, [r3, #0]
80050c4: 781b ldrb r3, [r3, #0]
80050c6: 011a lsls r2, r3, #4
80050c8: f8d7 30bc ldr.w r3, [r7, #188] ; 0xbc
80050cc: 4413 add r3, r2
80050ce: f203 430c addw r3, r3, #1036 ; 0x40c
80050d2: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8
80050d6: 463b mov r3, r7
80050d8: 681b ldr r3, [r3, #0]
80050da: 691b ldr r3, [r3, #16]
80050dc: 2b00 cmp r3, #0
80050de: d116 bne.n 800510e <USB_EPStartXfer+0x116e>
80050e0: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
80050e4: 881b ldrh r3, [r3, #0]
80050e6: b29b uxth r3, r3
80050e8: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
80050ec: b29a uxth r2, r3
80050ee: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
80050f2: 801a strh r2, [r3, #0]
80050f4: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
80050f8: 881b ldrh r3, [r3, #0]
80050fa: b29b uxth r3, r3
80050fc: ea6f 4343 mvn.w r3, r3, lsl #17
8005100: ea6f 4353 mvn.w r3, r3, lsr #17
8005104: b29a uxth r2, r3
8005106: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
800510a: 801a strh r2, [r3, #0]
800510c: e061 b.n 80051d2 <USB_EPStartXfer+0x1232>
800510e: 463b mov r3, r7
8005110: 681b ldr r3, [r3, #0]
8005112: 691b ldr r3, [r3, #16]
8005114: 2b3e cmp r3, #62 ; 0x3e
8005116: d81a bhi.n 800514e <USB_EPStartXfer+0x11ae>
8005118: 463b mov r3, r7
800511a: 681b ldr r3, [r3, #0]
800511c: 691b ldr r3, [r3, #16]
800511e: 085b lsrs r3, r3, #1
8005120: f8c7 3100 str.w r3, [r7, #256] ; 0x100
8005124: 463b mov r3, r7
8005126: 681b ldr r3, [r3, #0]
8005128: 691b ldr r3, [r3, #16]
800512a: f003 0301 and.w r3, r3, #1
800512e: 2b00 cmp r3, #0
8005130: d004 beq.n 800513c <USB_EPStartXfer+0x119c>
8005132: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
8005136: 3301 adds r3, #1
8005138: f8c7 3100 str.w r3, [r7, #256] ; 0x100
800513c: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
8005140: b29b uxth r3, r3
8005142: 029b lsls r3, r3, #10
8005144: b29a uxth r2, r3
8005146: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
800514a: 801a strh r2, [r3, #0]
800514c: e041 b.n 80051d2 <USB_EPStartXfer+0x1232>
800514e: 463b mov r3, r7
8005150: 681b ldr r3, [r3, #0]
8005152: 691b ldr r3, [r3, #16]
8005154: 095b lsrs r3, r3, #5
8005156: f8c7 3100 str.w r3, [r7, #256] ; 0x100
800515a: 463b mov r3, r7
800515c: 681b ldr r3, [r3, #0]
800515e: 691b ldr r3, [r3, #16]
8005160: f003 031f and.w r3, r3, #31
8005164: 2b00 cmp r3, #0
8005166: d104 bne.n 8005172 <USB_EPStartXfer+0x11d2>
8005168: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
800516c: 3b01 subs r3, #1
800516e: f8c7 3100 str.w r3, [r7, #256] ; 0x100
8005172: f8d7 3100 ldr.w r3, [r7, #256] ; 0x100
8005176: b29b uxth r3, r3
8005178: 029b lsls r3, r3, #10
800517a: b29b uxth r3, r3
800517c: ea6f 4343 mvn.w r3, r3, lsl #17
8005180: ea6f 4353 mvn.w r3, r3, lsr #17
8005184: b29a uxth r2, r3
8005186: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8
800518a: 801a strh r2, [r3, #0]
800518c: e021 b.n 80051d2 <USB_EPStartXfer+0x1232>
800518e: 463b mov r3, r7
8005190: 681b ldr r3, [r3, #0]
8005192: 785b ldrb r3, [r3, #1]
8005194: 2b01 cmp r3, #1
8005196: d11c bne.n 80051d2 <USB_EPStartXfer+0x1232>
8005198: 1d3b adds r3, r7, #4
800519a: 681b ldr r3, [r3, #0]
800519c: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80051a0: b29b uxth r3, r3
80051a2: 461a mov r2, r3
80051a4: f8d7 30c4 ldr.w r3, [r7, #196] ; 0xc4
80051a8: 4413 add r3, r2
80051aa: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4
80051ae: 463b mov r3, r7
80051b0: 681b ldr r3, [r3, #0]
80051b2: 781b ldrb r3, [r3, #0]
80051b4: 011a lsls r2, r3, #4
80051b6: f8d7 30c4 ldr.w r3, [r7, #196] ; 0xc4
80051ba: 4413 add r3, r2
80051bc: f203 430c addw r3, r3, #1036 ; 0x40c
80051c0: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0
80051c4: 463b mov r3, r7
80051c6: 681b ldr r3, [r3, #0]
80051c8: 691b ldr r3, [r3, #16]
80051ca: b29a uxth r2, r3
80051cc: f8d7 30c0 ldr.w r3, [r7, #192] ; 0xc0
80051d0: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
80051d2: 463b mov r3, r7
80051d4: 681b ldr r3, [r3, #0]
80051d6: 69db ldr r3, [r3, #28]
80051d8: 2b00 cmp r3, #0
80051da: f000 81a4 beq.w 8005526 <USB_EPStartXfer+0x1586>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
80051de: 1d3b adds r3, r7, #4
80051e0: 681a ldr r2, [r3, #0]
80051e2: 463b mov r3, r7
80051e4: 681b ldr r3, [r3, #0]
80051e6: 781b ldrb r3, [r3, #0]
80051e8: 009b lsls r3, r3, #2
80051ea: 4413 add r3, r2
80051ec: 881b ldrh r3, [r3, #0]
80051ee: f8a7 30b6 strh.w r3, [r7, #182] ; 0xb6
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
80051f2: f8b7 30b6 ldrh.w r3, [r7, #182] ; 0xb6
80051f6: f403 4380 and.w r3, r3, #16384 ; 0x4000
80051fa: 2b00 cmp r3, #0
80051fc: d005 beq.n 800520a <USB_EPStartXfer+0x126a>
80051fe: f8b7 30b6 ldrh.w r3, [r7, #182] ; 0xb6
8005202: f003 0340 and.w r3, r3, #64 ; 0x40
8005206: 2b00 cmp r3, #0
8005208: d10d bne.n 8005226 <USB_EPStartXfer+0x1286>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800520a: f8b7 30b6 ldrh.w r3, [r7, #182] ; 0xb6
800520e: f403 4380 and.w r3, r3, #16384 ; 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
8005212: 2b00 cmp r3, #0
8005214: f040 8187 bne.w 8005526 <USB_EPStartXfer+0x1586>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
8005218: f8b7 30b6 ldrh.w r3, [r7, #182] ; 0xb6
800521c: f003 0340 and.w r3, r3, #64 ; 0x40
8005220: 2b00 cmp r3, #0
8005222: f040 8180 bne.w 8005526 <USB_EPStartXfer+0x1586>
{
PCD_FreeUserBuffer(USBx, ep->num, 0U);
8005226: 1d3b adds r3, r7, #4
8005228: 681a ldr r2, [r3, #0]
800522a: 463b mov r3, r7
800522c: 681b ldr r3, [r3, #0]
800522e: 781b ldrb r3, [r3, #0]
8005230: 009b lsls r3, r3, #2
8005232: 4413 add r3, r2
8005234: 881b ldrh r3, [r3, #0]
8005236: b29b uxth r3, r3
8005238: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800523c: f023 0370 bic.w r3, r3, #112 ; 0x70
8005240: f8a7 30b4 strh.w r3, [r7, #180] ; 0xb4
8005244: 1d3b adds r3, r7, #4
8005246: 681a ldr r2, [r3, #0]
8005248: 463b mov r3, r7
800524a: 681b ldr r3, [r3, #0]
800524c: 781b ldrb r3, [r3, #0]
800524e: 009b lsls r3, r3, #2
8005250: 441a add r2, r3
8005252: f8b7 30b4 ldrh.w r3, [r7, #180] ; 0xb4
8005256: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800525a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800525e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005262: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8005266: b29b uxth r3, r3
8005268: 8013 strh r3, [r2, #0]
800526a: e15c b.n 8005526 <USB_EPStartXfer+0x1586>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
800526c: 463b mov r3, r7
800526e: 681b ldr r3, [r3, #0]
8005270: 78db ldrb r3, [r3, #3]
8005272: 2b01 cmp r3, #1
8005274: f040 8155 bne.w 8005522 <USB_EPStartXfer+0x1582>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
8005278: 463b mov r3, r7
800527a: 681b ldr r3, [r3, #0]
800527c: 699a ldr r2, [r3, #24]
800527e: 463b mov r3, r7
8005280: 681b ldr r3, [r3, #0]
8005282: 691b ldr r3, [r3, #16]
8005284: 429a cmp r2, r3
8005286: d90e bls.n 80052a6 <USB_EPStartXfer+0x1306>
{
len = ep->maxpacket;
8005288: 463b mov r3, r7
800528a: 681b ldr r3, [r3, #0]
800528c: 691b ldr r3, [r3, #16]
800528e: f8c7 312c str.w r3, [r7, #300] ; 0x12c
ep->xfer_len -= len;
8005292: 463b mov r3, r7
8005294: 681b ldr r3, [r3, #0]
8005296: 699a ldr r2, [r3, #24]
8005298: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800529c: 1ad2 subs r2, r2, r3
800529e: 463b mov r3, r7
80052a0: 681b ldr r3, [r3, #0]
80052a2: 619a str r2, [r3, #24]
80052a4: e008 b.n 80052b8 <USB_EPStartXfer+0x1318>
}
else
{
len = ep->xfer_len;
80052a6: 463b mov r3, r7
80052a8: 681b ldr r3, [r3, #0]
80052aa: 699b ldr r3, [r3, #24]
80052ac: f8c7 312c str.w r3, [r7, #300] ; 0x12c
ep->xfer_len = 0U;
80052b0: 463b mov r3, r7
80052b2: 681b ldr r3, [r3, #0]
80052b4: 2200 movs r2, #0
80052b6: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
80052b8: 463b mov r3, r7
80052ba: 681b ldr r3, [r3, #0]
80052bc: 785b ldrb r3, [r3, #1]
80052be: 2b00 cmp r3, #0
80052c0: d16f bne.n 80053a2 <USB_EPStartXfer+0x1402>
80052c2: 1d3b adds r3, r7, #4
80052c4: 681b ldr r3, [r3, #0]
80052c6: f8c7 30ec str.w r3, [r7, #236] ; 0xec
80052ca: 1d3b adds r3, r7, #4
80052cc: 681b ldr r3, [r3, #0]
80052ce: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80052d2: b29b uxth r3, r3
80052d4: 461a mov r2, r3
80052d6: f8d7 30ec ldr.w r3, [r7, #236] ; 0xec
80052da: 4413 add r3, r2
80052dc: f8c7 30ec str.w r3, [r7, #236] ; 0xec
80052e0: 463b mov r3, r7
80052e2: 681b ldr r3, [r3, #0]
80052e4: 781b ldrb r3, [r3, #0]
80052e6: 011a lsls r2, r3, #4
80052e8: f8d7 30ec ldr.w r3, [r7, #236] ; 0xec
80052ec: 4413 add r3, r2
80052ee: f203 4304 addw r3, r3, #1028 ; 0x404
80052f2: f8c7 30e8 str.w r3, [r7, #232] ; 0xe8
80052f6: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80052fa: 2b00 cmp r3, #0
80052fc: d116 bne.n 800532c <USB_EPStartXfer+0x138c>
80052fe: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
8005302: 881b ldrh r3, [r3, #0]
8005304: b29b uxth r3, r3
8005306: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
800530a: b29a uxth r2, r3
800530c: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
8005310: 801a strh r2, [r3, #0]
8005312: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
8005316: 881b ldrh r3, [r3, #0]
8005318: b29b uxth r3, r3
800531a: ea6f 4343 mvn.w r3, r3, lsl #17
800531e: ea6f 4353 mvn.w r3, r3, lsr #17
8005322: b29a uxth r2, r3
8005324: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
8005328: 801a strh r2, [r3, #0]
800532a: e05f b.n 80053ec <USB_EPStartXfer+0x144c>
800532c: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8005330: 2b3e cmp r3, #62 ; 0x3e
8005332: d818 bhi.n 8005366 <USB_EPStartXfer+0x13c6>
8005334: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8005338: 085b lsrs r3, r3, #1
800533a: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
800533e: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8005342: f003 0301 and.w r3, r3, #1
8005346: 2b00 cmp r3, #0
8005348: d004 beq.n 8005354 <USB_EPStartXfer+0x13b4>
800534a: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
800534e: 3301 adds r3, #1
8005350: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
8005354: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
8005358: b29b uxth r3, r3
800535a: 029b lsls r3, r3, #10
800535c: b29a uxth r2, r3
800535e: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
8005362: 801a strh r2, [r3, #0]
8005364: e042 b.n 80053ec <USB_EPStartXfer+0x144c>
8005366: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800536a: 095b lsrs r3, r3, #5
800536c: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
8005370: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8005374: f003 031f and.w r3, r3, #31
8005378: 2b00 cmp r3, #0
800537a: d104 bne.n 8005386 <USB_EPStartXfer+0x13e6>
800537c: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
8005380: 3b01 subs r3, #1
8005382: f8c7 30fc str.w r3, [r7, #252] ; 0xfc
8005386: f8d7 30fc ldr.w r3, [r7, #252] ; 0xfc
800538a: b29b uxth r3, r3
800538c: 029b lsls r3, r3, #10
800538e: b29b uxth r3, r3
8005390: ea6f 4343 mvn.w r3, r3, lsl #17
8005394: ea6f 4353 mvn.w r3, r3, lsr #17
8005398: b29a uxth r2, r3
800539a: f8d7 30e8 ldr.w r3, [r7, #232] ; 0xe8
800539e: 801a strh r2, [r3, #0]
80053a0: e024 b.n 80053ec <USB_EPStartXfer+0x144c>
80053a2: 463b mov r3, r7
80053a4: 681b ldr r3, [r3, #0]
80053a6: 785b ldrb r3, [r3, #1]
80053a8: 2b01 cmp r3, #1
80053aa: d11f bne.n 80053ec <USB_EPStartXfer+0x144c>
80053ac: 1d3b adds r3, r7, #4
80053ae: 681b ldr r3, [r3, #0]
80053b0: f8c7 30f4 str.w r3, [r7, #244] ; 0xf4
80053b4: 1d3b adds r3, r7, #4
80053b6: 681b ldr r3, [r3, #0]
80053b8: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80053bc: b29b uxth r3, r3
80053be: 461a mov r2, r3
80053c0: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4
80053c4: 4413 add r3, r2
80053c6: f8c7 30f4 str.w r3, [r7, #244] ; 0xf4
80053ca: 463b mov r3, r7
80053cc: 681b ldr r3, [r3, #0]
80053ce: 781b ldrb r3, [r3, #0]
80053d0: 011a lsls r2, r3, #4
80053d2: f8d7 30f4 ldr.w r3, [r7, #244] ; 0xf4
80053d6: 4413 add r3, r2
80053d8: f203 4304 addw r3, r3, #1028 ; 0x404
80053dc: f8c7 30f0 str.w r3, [r7, #240] ; 0xf0
80053e0: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80053e4: b29a uxth r2, r3
80053e6: f8d7 30f0 ldr.w r3, [r7, #240] ; 0xf0
80053ea: 801a strh r2, [r3, #0]
80053ec: 1d3b adds r3, r7, #4
80053ee: 681b ldr r3, [r3, #0]
80053f0: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4
80053f4: 463b mov r3, r7
80053f6: 681b ldr r3, [r3, #0]
80053f8: 785b ldrb r3, [r3, #1]
80053fa: 2b00 cmp r3, #0
80053fc: d16f bne.n 80054de <USB_EPStartXfer+0x153e>
80053fe: 1d3b adds r3, r7, #4
8005400: 681b ldr r3, [r3, #0]
8005402: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
8005406: 1d3b adds r3, r7, #4
8005408: 681b ldr r3, [r3, #0]
800540a: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
800540e: b29b uxth r3, r3
8005410: 461a mov r2, r3
8005412: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
8005416: 4413 add r3, r2
8005418: f8c7 30dc str.w r3, [r7, #220] ; 0xdc
800541c: 463b mov r3, r7
800541e: 681b ldr r3, [r3, #0]
8005420: 781b ldrb r3, [r3, #0]
8005422: 011a lsls r2, r3, #4
8005424: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc
8005428: 4413 add r3, r2
800542a: f203 430c addw r3, r3, #1036 ; 0x40c
800542e: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8
8005432: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8005436: 2b00 cmp r3, #0
8005438: d116 bne.n 8005468 <USB_EPStartXfer+0x14c8>
800543a: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8
800543e: 881b ldrh r3, [r3, #0]
8005440: b29b uxth r3, r3
8005442: f423 43f8 bic.w r3, r3, #31744 ; 0x7c00
8005446: b29a uxth r2, r3
8005448: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8
800544c: 801a strh r2, [r3, #0]
800544e: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8
8005452: 881b ldrh r3, [r3, #0]
8005454: b29b uxth r3, r3
8005456: ea6f 4343 mvn.w r3, r3, lsl #17
800545a: ea6f 4353 mvn.w r3, r3, lsr #17
800545e: b29a uxth r2, r3
8005460: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8
8005464: 801a strh r2, [r3, #0]
8005466: e05e b.n 8005526 <USB_EPStartXfer+0x1586>
8005468: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800546c: 2b3e cmp r3, #62 ; 0x3e
800546e: d818 bhi.n 80054a2 <USB_EPStartXfer+0x1502>
8005470: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8005474: 085b lsrs r3, r3, #1
8005476: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
800547a: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
800547e: f003 0301 and.w r3, r3, #1
8005482: 2b00 cmp r3, #0
8005484: d004 beq.n 8005490 <USB_EPStartXfer+0x14f0>
8005486: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
800548a: 3301 adds r3, #1
800548c: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
8005490: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
8005494: b29b uxth r3, r3
8005496: 029b lsls r3, r3, #10
8005498: b29a uxth r2, r3
800549a: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8
800549e: 801a strh r2, [r3, #0]
80054a0: e041 b.n 8005526 <USB_EPStartXfer+0x1586>
80054a2: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80054a6: 095b lsrs r3, r3, #5
80054a8: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
80054ac: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
80054b0: f003 031f and.w r3, r3, #31
80054b4: 2b00 cmp r3, #0
80054b6: d104 bne.n 80054c2 <USB_EPStartXfer+0x1522>
80054b8: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
80054bc: 3b01 subs r3, #1
80054be: f8c7 30f8 str.w r3, [r7, #248] ; 0xf8
80054c2: f8d7 30f8 ldr.w r3, [r7, #248] ; 0xf8
80054c6: b29b uxth r3, r3
80054c8: 029b lsls r3, r3, #10
80054ca: b29b uxth r3, r3
80054cc: ea6f 4343 mvn.w r3, r3, lsl #17
80054d0: ea6f 4353 mvn.w r3, r3, lsr #17
80054d4: b29a uxth r2, r3
80054d6: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8
80054da: 801a strh r2, [r3, #0]
80054dc: e023 b.n 8005526 <USB_EPStartXfer+0x1586>
80054de: 463b mov r3, r7
80054e0: 681b ldr r3, [r3, #0]
80054e2: 785b ldrb r3, [r3, #1]
80054e4: 2b01 cmp r3, #1
80054e6: d11e bne.n 8005526 <USB_EPStartXfer+0x1586>
80054e8: 1d3b adds r3, r7, #4
80054ea: 681b ldr r3, [r3, #0]
80054ec: f8b3 3050 ldrh.w r3, [r3, #80] ; 0x50
80054f0: b29b uxth r3, r3
80054f2: 461a mov r2, r3
80054f4: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4
80054f8: 4413 add r3, r2
80054fa: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4
80054fe: 463b mov r3, r7
8005500: 681b ldr r3, [r3, #0]
8005502: 781b ldrb r3, [r3, #0]
8005504: 011a lsls r2, r3, #4
8005506: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4
800550a: 4413 add r3, r2
800550c: f203 430c addw r3, r3, #1036 ; 0x40c
8005510: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0
8005514: f8d7 312c ldr.w r3, [r7, #300] ; 0x12c
8005518: b29a uxth r2, r3
800551a: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0
800551e: 801a strh r2, [r3, #0]
8005520: e001 b.n 8005526 <USB_EPStartXfer+0x1586>
}
else
{
return HAL_ERROR;
8005522: 2301 movs r3, #1
8005524: e02e b.n 8005584 <USB_EPStartXfer+0x15e4>
}
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8005526: 1d3b adds r3, r7, #4
8005528: 681a ldr r2, [r3, #0]
800552a: 463b mov r3, r7
800552c: 681b ldr r3, [r3, #0]
800552e: 781b ldrb r3, [r3, #0]
8005530: 009b lsls r3, r3, #2
8005532: 4413 add r3, r2
8005534: 881b ldrh r3, [r3, #0]
8005536: b29b uxth r3, r3
8005538: f423 4380 bic.w r3, r3, #16384 ; 0x4000
800553c: f023 0370 bic.w r3, r3, #112 ; 0x70
8005540: f8a7 30aa strh.w r3, [r7, #170] ; 0xaa
8005544: f8b7 30aa ldrh.w r3, [r7, #170] ; 0xaa
8005548: f483 5380 eor.w r3, r3, #4096 ; 0x1000
800554c: f8a7 30aa strh.w r3, [r7, #170] ; 0xaa
8005550: f8b7 30aa ldrh.w r3, [r7, #170] ; 0xaa
8005554: f483 5300 eor.w r3, r3, #8192 ; 0x2000
8005558: f8a7 30aa strh.w r3, [r7, #170] ; 0xaa
800555c: 1d3b adds r3, r7, #4
800555e: 681a ldr r2, [r3, #0]
8005560: 463b mov r3, r7
8005562: 681b ldr r3, [r3, #0]
8005564: 781b ldrb r3, [r3, #0]
8005566: 009b lsls r3, r3, #2
8005568: 441a add r2, r3
800556a: f8b7 30aa ldrh.w r3, [r7, #170] ; 0xaa
800556e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005572: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005576: f443 4300 orr.w r3, r3, #32768 ; 0x8000
800557a: f043 0380 orr.w r3, r3, #128 ; 0x80
800557e: b29b uxth r3, r3
8005580: 8013 strh r3, [r2, #0]
}
return HAL_OK;
8005582: 2300 movs r3, #0
}
8005584: 4618 mov r0, r3
8005586: f507 7798 add.w r7, r7, #304 ; 0x130
800558a: 46bd mov sp, r7
800558c: bd80 pop {r7, pc}
0800558e <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800558e: b480 push {r7}
8005590: b085 sub sp, #20
8005592: af00 add r7, sp, #0
8005594: 6078 str r0, [r7, #4]
8005596: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
8005598: 683b ldr r3, [r7, #0]
800559a: 785b ldrb r3, [r3, #1]
800559c: 2b00 cmp r3, #0
800559e: d020 beq.n 80055e2 <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
80055a0: 687a ldr r2, [r7, #4]
80055a2: 683b ldr r3, [r7, #0]
80055a4: 781b ldrb r3, [r3, #0]
80055a6: 009b lsls r3, r3, #2
80055a8: 4413 add r3, r2
80055aa: 881b ldrh r3, [r3, #0]
80055ac: b29b uxth r3, r3
80055ae: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80055b2: f023 0340 bic.w r3, r3, #64 ; 0x40
80055b6: 81bb strh r3, [r7, #12]
80055b8: 89bb ldrh r3, [r7, #12]
80055ba: f083 0310 eor.w r3, r3, #16
80055be: 81bb strh r3, [r7, #12]
80055c0: 687a ldr r2, [r7, #4]
80055c2: 683b ldr r3, [r7, #0]
80055c4: 781b ldrb r3, [r3, #0]
80055c6: 009b lsls r3, r3, #2
80055c8: 441a add r2, r3
80055ca: 89bb ldrh r3, [r7, #12]
80055cc: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80055d0: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80055d4: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80055d8: f043 0380 orr.w r3, r3, #128 ; 0x80
80055dc: b29b uxth r3, r3
80055de: 8013 strh r3, [r2, #0]
80055e0: e01f b.n 8005622 <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
80055e2: 687a ldr r2, [r7, #4]
80055e4: 683b ldr r3, [r7, #0]
80055e6: 781b ldrb r3, [r3, #0]
80055e8: 009b lsls r3, r3, #2
80055ea: 4413 add r3, r2
80055ec: 881b ldrh r3, [r3, #0]
80055ee: b29b uxth r3, r3
80055f0: f423 4380 bic.w r3, r3, #16384 ; 0x4000
80055f4: f023 0370 bic.w r3, r3, #112 ; 0x70
80055f8: 81fb strh r3, [r7, #14]
80055fa: 89fb ldrh r3, [r7, #14]
80055fc: f483 5380 eor.w r3, r3, #4096 ; 0x1000
8005600: 81fb strh r3, [r7, #14]
8005602: 687a ldr r2, [r7, #4]
8005604: 683b ldr r3, [r7, #0]
8005606: 781b ldrb r3, [r3, #0]
8005608: 009b lsls r3, r3, #2
800560a: 441a add r2, r3
800560c: 89fb ldrh r3, [r7, #14]
800560e: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005612: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005616: f443 4300 orr.w r3, r3, #32768 ; 0x8000
800561a: f043 0380 orr.w r3, r3, #128 ; 0x80
800561e: b29b uxth r3, r3
8005620: 8013 strh r3, [r2, #0]
}
return HAL_OK;
8005622: 2300 movs r3, #0
}
8005624: 4618 mov r0, r3
8005626: 3714 adds r7, #20
8005628: 46bd mov sp, r7
800562a: bc80 pop {r7}
800562c: 4770 bx lr
0800562e <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800562e: b480 push {r7}
8005630: b087 sub sp, #28
8005632: af00 add r7, sp, #0
8005634: 6078 str r0, [r7, #4]
8005636: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
8005638: 683b ldr r3, [r7, #0]
800563a: 7b1b ldrb r3, [r3, #12]
800563c: 2b00 cmp r3, #0
800563e: f040 809d bne.w 800577c <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
8005642: 683b ldr r3, [r7, #0]
8005644: 785b ldrb r3, [r3, #1]
8005646: 2b00 cmp r3, #0
8005648: d04c beq.n 80056e4 <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800564a: 687a ldr r2, [r7, #4]
800564c: 683b ldr r3, [r7, #0]
800564e: 781b ldrb r3, [r3, #0]
8005650: 009b lsls r3, r3, #2
8005652: 4413 add r3, r2
8005654: 881b ldrh r3, [r3, #0]
8005656: 823b strh r3, [r7, #16]
8005658: 8a3b ldrh r3, [r7, #16]
800565a: f003 0340 and.w r3, r3, #64 ; 0x40
800565e: 2b00 cmp r3, #0
8005660: d01b beq.n 800569a <USB_EPClearStall+0x6c>
8005662: 687a ldr r2, [r7, #4]
8005664: 683b ldr r3, [r7, #0]
8005666: 781b ldrb r3, [r3, #0]
8005668: 009b lsls r3, r3, #2
800566a: 4413 add r3, r2
800566c: 881b ldrh r3, [r3, #0]
800566e: b29b uxth r3, r3
8005670: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
8005674: f023 0370 bic.w r3, r3, #112 ; 0x70
8005678: 81fb strh r3, [r7, #14]
800567a: 687a ldr r2, [r7, #4]
800567c: 683b ldr r3, [r7, #0]
800567e: 781b ldrb r3, [r3, #0]
8005680: 009b lsls r3, r3, #2
8005682: 441a add r2, r3
8005684: 89fb ldrh r3, [r7, #14]
8005686: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800568a: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
800568e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005692: f043 03c0 orr.w r3, r3, #192 ; 0xc0
8005696: b29b uxth r3, r3
8005698: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800569a: 683b ldr r3, [r7, #0]
800569c: 78db ldrb r3, [r3, #3]
800569e: 2b01 cmp r3, #1
80056a0: d06c beq.n 800577c <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
80056a2: 687a ldr r2, [r7, #4]
80056a4: 683b ldr r3, [r7, #0]
80056a6: 781b ldrb r3, [r3, #0]
80056a8: 009b lsls r3, r3, #2
80056aa: 4413 add r3, r2
80056ac: 881b ldrh r3, [r3, #0]
80056ae: b29b uxth r3, r3
80056b0: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
80056b4: f023 0340 bic.w r3, r3, #64 ; 0x40
80056b8: 81bb strh r3, [r7, #12]
80056ba: 89bb ldrh r3, [r7, #12]
80056bc: f083 0320 eor.w r3, r3, #32
80056c0: 81bb strh r3, [r7, #12]
80056c2: 687a ldr r2, [r7, #4]
80056c4: 683b ldr r3, [r7, #0]
80056c6: 781b ldrb r3, [r3, #0]
80056c8: 009b lsls r3, r3, #2
80056ca: 441a add r2, r3
80056cc: 89bb ldrh r3, [r7, #12]
80056ce: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
80056d2: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
80056d6: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80056da: f043 0380 orr.w r3, r3, #128 ; 0x80
80056de: b29b uxth r3, r3
80056e0: 8013 strh r3, [r2, #0]
80056e2: e04b b.n 800577c <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
80056e4: 687a ldr r2, [r7, #4]
80056e6: 683b ldr r3, [r7, #0]
80056e8: 781b ldrb r3, [r3, #0]
80056ea: 009b lsls r3, r3, #2
80056ec: 4413 add r3, r2
80056ee: 881b ldrh r3, [r3, #0]
80056f0: 82fb strh r3, [r7, #22]
80056f2: 8afb ldrh r3, [r7, #22]
80056f4: f403 4380 and.w r3, r3, #16384 ; 0x4000
80056f8: 2b00 cmp r3, #0
80056fa: d01b beq.n 8005734 <USB_EPClearStall+0x106>
80056fc: 687a ldr r2, [r7, #4]
80056fe: 683b ldr r3, [r7, #0]
8005700: 781b ldrb r3, [r3, #0]
8005702: 009b lsls r3, r3, #2
8005704: 4413 add r3, r2
8005706: 881b ldrh r3, [r3, #0]
8005708: b29b uxth r3, r3
800570a: f423 43e0 bic.w r3, r3, #28672 ; 0x7000
800570e: f023 0370 bic.w r3, r3, #112 ; 0x70
8005712: 82bb strh r3, [r7, #20]
8005714: 687a ldr r2, [r7, #4]
8005716: 683b ldr r3, [r7, #0]
8005718: 781b ldrb r3, [r3, #0]
800571a: 009b lsls r3, r3, #2
800571c: 441a add r2, r3
800571e: 8abb ldrh r3, [r7, #20]
8005720: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
8005724: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005728: f443 4340 orr.w r3, r3, #49152 ; 0xc000
800572c: f043 0380 orr.w r3, r3, #128 ; 0x80
8005730: b29b uxth r3, r3
8005732: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8005734: 687a ldr r2, [r7, #4]
8005736: 683b ldr r3, [r7, #0]
8005738: 781b ldrb r3, [r3, #0]
800573a: 009b lsls r3, r3, #2
800573c: 4413 add r3, r2
800573e: 881b ldrh r3, [r3, #0]
8005740: b29b uxth r3, r3
8005742: f423 4380 bic.w r3, r3, #16384 ; 0x4000
8005746: f023 0370 bic.w r3, r3, #112 ; 0x70
800574a: 827b strh r3, [r7, #18]
800574c: 8a7b ldrh r3, [r7, #18]
800574e: f483 5380 eor.w r3, r3, #4096 ; 0x1000
8005752: 827b strh r3, [r7, #18]
8005754: 8a7b ldrh r3, [r7, #18]
8005756: f483 5300 eor.w r3, r3, #8192 ; 0x2000
800575a: 827b strh r3, [r7, #18]
800575c: 687a ldr r2, [r7, #4]
800575e: 683b ldr r3, [r7, #0]
8005760: 781b ldrb r3, [r3, #0]
8005762: 009b lsls r3, r3, #2
8005764: 441a add r2, r3
8005766: 8a7b ldrh r3, [r7, #18]
8005768: f043 437f orr.w r3, r3, #4278190080 ; 0xff000000
800576c: f443 037f orr.w r3, r3, #16711680 ; 0xff0000
8005770: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8005774: f043 0380 orr.w r3, r3, #128 ; 0x80
8005778: b29b uxth r3, r3
800577a: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
800577c: 2300 movs r3, #0
}
800577e: 4618 mov r0, r3
8005780: 371c adds r7, #28
8005782: 46bd mov sp, r7
8005784: bc80 pop {r7}
8005786: 4770 bx lr
08005788 <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
8005788: b480 push {r7}
800578a: b083 sub sp, #12
800578c: af00 add r7, sp, #0
800578e: 6078 str r0, [r7, #4]
8005790: 460b mov r3, r1
8005792: 70fb strb r3, [r7, #3]
if (address == 0U)
8005794: 78fb ldrb r3, [r7, #3]
8005796: 2b00 cmp r3, #0
8005798: d103 bne.n 80057a2 <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
800579a: 687b ldr r3, [r7, #4]
800579c: 2280 movs r2, #128 ; 0x80
800579e: f8a3 204c strh.w r2, [r3, #76] ; 0x4c
}
return HAL_OK;
80057a2: 2300 movs r3, #0
}
80057a4: 4618 mov r0, r3
80057a6: 370c adds r7, #12
80057a8: 46bd mov sp, r7
80057aa: bc80 pop {r7}
80057ac: 4770 bx lr
080057ae <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
80057ae: b480 push {r7}
80057b0: b083 sub sp, #12
80057b2: af00 add r7, sp, #0
80057b4: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
80057b6: 2300 movs r3, #0
}
80057b8: 4618 mov r0, r3
80057ba: 370c adds r7, #12
80057bc: 46bd mov sp, r7
80057be: bc80 pop {r7}
80057c0: 4770 bx lr
080057c2 <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
80057c2: b480 push {r7}
80057c4: b083 sub sp, #12
80057c6: af00 add r7, sp, #0
80057c8: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
80057ca: 2300 movs r3, #0
}
80057cc: 4618 mov r0, r3
80057ce: 370c adds r7, #12
80057d0: 46bd mov sp, r7
80057d2: bc80 pop {r7}
80057d4: 4770 bx lr
080057d6 <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval HAL status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef *USBx)
{
80057d6: b480 push {r7}
80057d8: b085 sub sp, #20
80057da: af00 add r7, sp, #0
80057dc: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
80057de: 687b ldr r3, [r7, #4]
80057e0: f8b3 3044 ldrh.w r3, [r3, #68] ; 0x44
80057e4: b29b uxth r3, r3
80057e6: 60fb str r3, [r7, #12]
return tmpreg;
80057e8: 68fb ldr r3, [r7, #12]
}
80057ea: 4618 mov r0, r3
80057ec: 3714 adds r7, #20
80057ee: 46bd mov sp, r7
80057f0: bc80 pop {r7}
80057f2: 4770 bx lr
080057f4 <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
80057f4: b480 push {r7}
80057f6: b083 sub sp, #12
80057f8: af00 add r7, sp, #0
80057fa: 6078 str r0, [r7, #4]
80057fc: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
80057fe: 2300 movs r3, #0
}
8005800: 4618 mov r0, r3
8005802: 370c adds r7, #12
8005804: 46bd mov sp, r7
8005806: bc80 pop {r7}
8005808: 4770 bx lr
0800580a <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800580a: b480 push {r7}
800580c: b08d sub sp, #52 ; 0x34
800580e: af00 add r7, sp, #0
8005810: 60f8 str r0, [r7, #12]
8005812: 60b9 str r1, [r7, #8]
8005814: 4611 mov r1, r2
8005816: 461a mov r2, r3
8005818: 460b mov r3, r1
800581a: 80fb strh r3, [r7, #6]
800581c: 4613 mov r3, r2
800581e: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
8005820: 88bb ldrh r3, [r7, #4]
8005822: 3301 adds r3, #1
8005824: 085b lsrs r3, r3, #1
8005826: 623b str r3, [r7, #32]
uint32_t BaseAddr = (uint32_t)USBx;
8005828: 68fb ldr r3, [r7, #12]
800582a: 61fb str r3, [r7, #28]
uint32_t i, temp1, temp2;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800582c: 68bb ldr r3, [r7, #8]
800582e: 627b str r3, [r7, #36] ; 0x24
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
8005830: 88fb ldrh r3, [r7, #6]
8005832: 005a lsls r2, r3, #1
8005834: 69fb ldr r3, [r7, #28]
8005836: 4413 add r3, r2
8005838: f503 6380 add.w r3, r3, #1024 ; 0x400
800583c: 62bb str r3, [r7, #40] ; 0x28
for (i = n; i != 0U; i--)
800583e: 6a3b ldr r3, [r7, #32]
8005840: 62fb str r3, [r7, #44] ; 0x2c
8005842: e01e b.n 8005882 <USB_WritePMA+0x78>
{
temp1 = *pBuf;
8005844: 6a7b ldr r3, [r7, #36] ; 0x24
8005846: 781b ldrb r3, [r3, #0]
8005848: 61bb str r3, [r7, #24]
pBuf++;
800584a: 6a7b ldr r3, [r7, #36] ; 0x24
800584c: 3301 adds r3, #1
800584e: 627b str r3, [r7, #36] ; 0x24
temp2 = temp1 | ((uint16_t)((uint16_t) *pBuf << 8));
8005850: 6a7b ldr r3, [r7, #36] ; 0x24
8005852: 781b ldrb r3, [r3, #0]
8005854: b29b uxth r3, r3
8005856: 021b lsls r3, r3, #8
8005858: b29b uxth r3, r3
800585a: 461a mov r2, r3
800585c: 69bb ldr r3, [r7, #24]
800585e: 4313 orrs r3, r2
8005860: 617b str r3, [r7, #20]
*pdwVal = (uint16_t)temp2;
8005862: 697b ldr r3, [r7, #20]
8005864: b29a uxth r2, r3
8005866: 6abb ldr r3, [r7, #40] ; 0x28
8005868: 801a strh r2, [r3, #0]
pdwVal++;
800586a: 6abb ldr r3, [r7, #40] ; 0x28
800586c: 3302 adds r3, #2
800586e: 62bb str r3, [r7, #40] ; 0x28
#if PMA_ACCESS > 1U
pdwVal++;
8005870: 6abb ldr r3, [r7, #40] ; 0x28
8005872: 3302 adds r3, #2
8005874: 62bb str r3, [r7, #40] ; 0x28
#endif
pBuf++;
8005876: 6a7b ldr r3, [r7, #36] ; 0x24
8005878: 3301 adds r3, #1
800587a: 627b str r3, [r7, #36] ; 0x24
for (i = n; i != 0U; i--)
800587c: 6afb ldr r3, [r7, #44] ; 0x2c
800587e: 3b01 subs r3, #1
8005880: 62fb str r3, [r7, #44] ; 0x2c
8005882: 6afb ldr r3, [r7, #44] ; 0x2c
8005884: 2b00 cmp r3, #0
8005886: d1dd bne.n 8005844 <USB_WritePMA+0x3a>
}
}
8005888: bf00 nop
800588a: bf00 nop
800588c: 3734 adds r7, #52 ; 0x34
800588e: 46bd mov sp, r7
8005890: bc80 pop {r7}
8005892: 4770 bx lr
08005894 <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
8005894: b480 push {r7}
8005896: b08b sub sp, #44 ; 0x2c
8005898: af00 add r7, sp, #0
800589a: 60f8 str r0, [r7, #12]
800589c: 60b9 str r1, [r7, #8]
800589e: 4611 mov r1, r2
80058a0: 461a mov r2, r3
80058a2: 460b mov r3, r1
80058a4: 80fb strh r3, [r7, #6]
80058a6: 4613 mov r3, r2
80058a8: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
80058aa: 88bb ldrh r3, [r7, #4]
80058ac: 085b lsrs r3, r3, #1
80058ae: b29b uxth r3, r3
80058b0: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
80058b2: 68fb ldr r3, [r7, #12]
80058b4: 617b str r3, [r7, #20]
uint32_t i, temp;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
80058b6: 68bb ldr r3, [r7, #8]
80058b8: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
80058ba: 88fb ldrh r3, [r7, #6]
80058bc: 005a lsls r2, r3, #1
80058be: 697b ldr r3, [r7, #20]
80058c0: 4413 add r3, r2
80058c2: f503 6380 add.w r3, r3, #1024 ; 0x400
80058c6: 623b str r3, [r7, #32]
for (i = n; i != 0U; i--)
80058c8: 69bb ldr r3, [r7, #24]
80058ca: 627b str r3, [r7, #36] ; 0x24
80058cc: e01b b.n 8005906 <USB_ReadPMA+0x72>
{
temp = *(__IO uint16_t *)pdwVal;
80058ce: 6a3b ldr r3, [r7, #32]
80058d0: 881b ldrh r3, [r3, #0]
80058d2: b29b uxth r3, r3
80058d4: 613b str r3, [r7, #16]
pdwVal++;
80058d6: 6a3b ldr r3, [r7, #32]
80058d8: 3302 adds r3, #2
80058da: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((temp >> 0) & 0xFFU);
80058dc: 693b ldr r3, [r7, #16]
80058de: b2da uxtb r2, r3
80058e0: 69fb ldr r3, [r7, #28]
80058e2: 701a strb r2, [r3, #0]
pBuf++;
80058e4: 69fb ldr r3, [r7, #28]
80058e6: 3301 adds r3, #1
80058e8: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((temp >> 8) & 0xFFU);
80058ea: 693b ldr r3, [r7, #16]
80058ec: 0a1b lsrs r3, r3, #8
80058ee: b2da uxtb r2, r3
80058f0: 69fb ldr r3, [r7, #28]
80058f2: 701a strb r2, [r3, #0]
pBuf++;
80058f4: 69fb ldr r3, [r7, #28]
80058f6: 3301 adds r3, #1
80058f8: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
80058fa: 6a3b ldr r3, [r7, #32]
80058fc: 3302 adds r3, #2
80058fe: 623b str r3, [r7, #32]
for (i = n; i != 0U; i--)
8005900: 6a7b ldr r3, [r7, #36] ; 0x24
8005902: 3b01 subs r3, #1
8005904: 627b str r3, [r7, #36] ; 0x24
8005906: 6a7b ldr r3, [r7, #36] ; 0x24
8005908: 2b00 cmp r3, #0
800590a: d1e0 bne.n 80058ce <USB_ReadPMA+0x3a>
#endif
}
if ((wNBytes % 2U) != 0U)
800590c: 88bb ldrh r3, [r7, #4]
800590e: f003 0301 and.w r3, r3, #1
8005912: b29b uxth r3, r3
8005914: 2b00 cmp r3, #0
8005916: d007 beq.n 8005928 <USB_ReadPMA+0x94>
{
temp = *pdwVal;
8005918: 6a3b ldr r3, [r7, #32]
800591a: 881b ldrh r3, [r3, #0]
800591c: b29b uxth r3, r3
800591e: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((temp >> 0) & 0xFFU);
8005920: 693b ldr r3, [r7, #16]
8005922: b2da uxtb r2, r3
8005924: 69fb ldr r3, [r7, #28]
8005926: 701a strb r2, [r3, #0]
}
}
8005928: bf00 nop
800592a: 372c adds r7, #44 ; 0x2c
800592c: 46bd mov sp, r7
800592e: bc80 pop {r7}
8005930: 4770 bx lr
...
08005934 <__NVIC_SystemReset>:
{
8005934: b480 push {r7}
8005936: af00 add r7, sp, #0
\details Acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
__STATIC_FORCEINLINE void __DSB(void)
{
__ASM volatile ("dsb 0xF":::"memory");
8005938: f3bf 8f4f dsb sy
}
800593c: bf00 nop
(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
800593e: 4b06 ldr r3, [pc, #24] ; (8005958 <__NVIC_SystemReset+0x24>)
8005940: 68db ldr r3, [r3, #12]
8005942: f403 62e0 and.w r2, r3, #1792 ; 0x700
SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8005946: 4904 ldr r1, [pc, #16] ; (8005958 <__NVIC_SystemReset+0x24>)
8005948: 4b04 ldr r3, [pc, #16] ; (800595c <__NVIC_SystemReset+0x28>)
800594a: 4313 orrs r3, r2
800594c: 60cb str r3, [r1, #12]
__ASM volatile ("dsb 0xF":::"memory");
800594e: f3bf 8f4f dsb sy
}
8005952: bf00 nop
__NOP();
8005954: bf00 nop
8005956: e7fd b.n 8005954 <__NVIC_SystemReset+0x20>
8005958: e000ed00 .word 0xe000ed00
800595c: 05fa0004 .word 0x05fa0004
08005960 <USBD_DFU_Init>:
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_DFU_Init(USBD_HandleTypeDef *pdev,
uint8_t cfgidx)
{
8005960: b580 push {r7, lr}
8005962: b084 sub sp, #16
8005964: af00 add r7, sp, #0
8005966: 6078 str r0, [r7, #4]
8005968: 460b mov r3, r1
800596a: 70fb strb r3, [r7, #3]
USBD_DFU_HandleTypeDef *hdfu;
/* Allocate Audio structure */
pdev->pClassData = USBD_malloc(sizeof(USBD_DFU_HandleTypeDef));
800596c: f240 401c movw r0, #1052 ; 0x41c
8005970: f002 faa8 bl 8007ec4 <USBD_static_malloc>
8005974: 4602 mov r2, r0
8005976: 687b ldr r3, [r7, #4]
8005978: f8c3 22b8 str.w r2, [r3, #696] ; 0x2b8
if (pdev->pClassData == NULL)
800597c: 687b ldr r3, [r7, #4]
800597e: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8005982: 2b00 cmp r3, #0
8005984: d101 bne.n 800598a <USBD_DFU_Init+0x2a>
{
return USBD_FAIL;
8005986: 2302 movs r3, #2
8005988: e03f b.n 8005a0a <USBD_DFU_Init+0xaa>
}
else
{
hdfu = (USBD_DFU_HandleTypeDef *) pdev->pClassData;
800598a: 687b ldr r3, [r7, #4]
800598c: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8005990: 60fb str r3, [r7, #12]
hdfu->alt_setting = 0U;
8005992: 68fb ldr r3, [r7, #12]
8005994: 2200 movs r2, #0
8005996: f8c3 240c str.w r2, [r3, #1036] ; 0x40c
hdfu->data_ptr = USBD_DFU_APP_DEFAULT_ADD;
800599a: 68fb ldr r3, [r7, #12]
800599c: f04f 6200 mov.w r2, #134217728 ; 0x8000000
80059a0: f8c3 2408 str.w r2, [r3, #1032] ; 0x408
hdfu->wblock_num = 0U;
80059a4: 68fb ldr r3, [r7, #12]
80059a6: 2200 movs r2, #0
80059a8: f8c3 2400 str.w r2, [r3, #1024] ; 0x400
hdfu->wlength = 0U;
80059ac: 68fb ldr r3, [r7, #12]
80059ae: 2200 movs r2, #0
80059b0: f8c3 2404 str.w r2, [r3, #1028] ; 0x404
hdfu->manif_state = DFU_MANIFEST_COMPLETE;
80059b4: 68fb ldr r3, [r7, #12]
80059b6: 2200 movs r2, #0
80059b8: f883 2419 strb.w r2, [r3, #1049] ; 0x419
hdfu->dev_state = DFU_STATE_IDLE;
80059bc: 68fb ldr r3, [r7, #12]
80059be: 2202 movs r2, #2
80059c0: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[0] = DFU_ERROR_NONE;
80059c4: 68fb ldr r3, [r7, #12]
80059c6: 2200 movs r2, #0
80059c8: f883 2410 strb.w r2, [r3, #1040] ; 0x410
hdfu->dev_status[1] = 0U;
80059cc: 68fb ldr r3, [r7, #12]
80059ce: 2200 movs r2, #0
80059d0: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
80059d4: 68fb ldr r3, [r7, #12]
80059d6: 2200 movs r2, #0
80059d8: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U;
80059dc: 68fb ldr r3, [r7, #12]
80059de: 2200 movs r2, #0
80059e0: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = DFU_STATE_IDLE;
80059e4: 68fb ldr r3, [r7, #12]
80059e6: 2202 movs r2, #2
80059e8: f883 2414 strb.w r2, [r3, #1044] ; 0x414
hdfu->dev_status[5] = 0U;
80059ec: 68fb ldr r3, [r7, #12]
80059ee: 2200 movs r2, #0
80059f0: f883 2415 strb.w r2, [r3, #1045] ; 0x415
/* Initialize Hardware layer */
if (((USBD_DFU_MediaTypeDef *)pdev->pUserData)->Init() != USBD_OK)
80059f4: 687b ldr r3, [r7, #4]
80059f6: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
80059fa: 685b ldr r3, [r3, #4]
80059fc: 4798 blx r3
80059fe: 4603 mov r3, r0
8005a00: 2b00 cmp r3, #0
8005a02: d001 beq.n 8005a08 <USBD_DFU_Init+0xa8>
{
return USBD_FAIL;
8005a04: 2302 movs r3, #2
8005a06: e000 b.n 8005a0a <USBD_DFU_Init+0xaa>
}
}
return USBD_OK;
8005a08: 2300 movs r3, #0
}
8005a0a: 4618 mov r0, r3
8005a0c: 3710 adds r7, #16
8005a0e: 46bd mov sp, r7
8005a10: bd80 pop {r7, pc}
08005a12 <USBD_DFU_DeInit>:
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_DFU_DeInit(USBD_HandleTypeDef *pdev,
uint8_t cfgidx)
{
8005a12: b580 push {r7, lr}
8005a14: b084 sub sp, #16
8005a16: af00 add r7, sp, #0
8005a18: 6078 str r0, [r7, #4]
8005a1a: 460b mov r3, r1
8005a1c: 70fb strb r3, [r7, #3]
USBD_DFU_HandleTypeDef *hdfu;
hdfu = (USBD_DFU_HandleTypeDef *) pdev->pClassData;
8005a1e: 687b ldr r3, [r7, #4]
8005a20: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8005a24: 60fb str r3, [r7, #12]
hdfu->wblock_num = 0U;
8005a26: 68fb ldr r3, [r7, #12]
8005a28: 2200 movs r2, #0
8005a2a: f8c3 2400 str.w r2, [r3, #1024] ; 0x400
hdfu->wlength = 0U;
8005a2e: 68fb ldr r3, [r7, #12]
8005a30: 2200 movs r2, #0
8005a32: f8c3 2404 str.w r2, [r3, #1028] ; 0x404
hdfu->dev_state = DFU_STATE_IDLE;
8005a36: 68fb ldr r3, [r7, #12]
8005a38: 2202 movs r2, #2
8005a3a: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[0] = DFU_ERROR_NONE;
8005a3e: 68fb ldr r3, [r7, #12]
8005a40: 2200 movs r2, #0
8005a42: f883 2410 strb.w r2, [r3, #1040] ; 0x410
hdfu->dev_status[4] = DFU_STATE_IDLE;
8005a46: 68fb ldr r3, [r7, #12]
8005a48: 2202 movs r2, #2
8005a4a: f883 2414 strb.w r2, [r3, #1044] ; 0x414
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
8005a4e: 687b ldr r3, [r7, #4]
8005a50: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8005a54: 2b00 cmp r3, #0
8005a56: d00e beq.n 8005a76 <USBD_DFU_DeInit+0x64>
{
/* De-Initialize Hardware layer */
((USBD_DFU_MediaTypeDef *)pdev->pUserData)->DeInit();
8005a58: 687b ldr r3, [r7, #4]
8005a5a: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8005a5e: 689b ldr r3, [r3, #8]
8005a60: 4798 blx r3
USBD_free(pdev->pClassData);
8005a62: 687b ldr r3, [r7, #4]
8005a64: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8005a68: 4618 mov r0, r3
8005a6a: f002 fa37 bl 8007edc <USBD_static_free>
pdev->pClassData = NULL;
8005a6e: 687b ldr r3, [r7, #4]
8005a70: 2200 movs r2, #0
8005a72: f8c3 22b8 str.w r2, [r3, #696] ; 0x2b8
}
return USBD_OK;
8005a76: 2300 movs r3, #0
}
8005a78: 4618 mov r0, r3
8005a7a: 3710 adds r7, #16
8005a7c: 46bd mov sp, r7
8005a7e: bd80 pop {r7, pc}
08005a80 <USBD_DFU_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_DFU_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8005a80: b580 push {r7, lr}
8005a82: b086 sub sp, #24
8005a84: af00 add r7, sp, #0
8005a86: 6078 str r0, [r7, #4]
8005a88: 6039 str r1, [r7, #0]
USBD_DFU_HandleTypeDef *hdfu;
uint8_t *pbuf = 0U;
8005a8a: 2300 movs r3, #0
8005a8c: 617b str r3, [r7, #20]
uint16_t len = 0U;
8005a8e: 2300 movs r3, #0
8005a90: 827b strh r3, [r7, #18]
uint16_t status_info = 0U;
8005a92: 2300 movs r3, #0
8005a94: 817b strh r3, [r7, #10]
uint8_t ret = USBD_OK;
8005a96: 2300 movs r3, #0
8005a98: 747b strb r3, [r7, #17]
hdfu = (USBD_DFU_HandleTypeDef *) pdev->pClassData;
8005a9a: 687b ldr r3, [r7, #4]
8005a9c: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8005aa0: 60fb str r3, [r7, #12]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8005aa2: 683b ldr r3, [r7, #0]
8005aa4: 781b ldrb r3, [r3, #0]
8005aa6: f003 0360 and.w r3, r3, #96 ; 0x60
8005aaa: 2b00 cmp r3, #0
8005aac: d03f beq.n 8005b2e <USBD_DFU_Setup+0xae>
8005aae: 2b20 cmp r3, #32
8005ab0: f040 80c2 bne.w 8005c38 <USBD_DFU_Setup+0x1b8>
{
case USB_REQ_TYPE_CLASS:
switch (req->bRequest)
8005ab4: 683b ldr r3, [r7, #0]
8005ab6: 785b ldrb r3, [r3, #1]
8005ab8: 2b06 cmp r3, #6
8005aba: d830 bhi.n 8005b1e <USBD_DFU_Setup+0x9e>
8005abc: a201 add r2, pc, #4 ; (adr r2, 8005ac4 <USBD_DFU_Setup+0x44>)
8005abe: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8005ac2: bf00 nop
8005ac4: 08005b15 .word 0x08005b15
8005ac8: 08005ae1 .word 0x08005ae1
8005acc: 08005aeb .word 0x08005aeb
8005ad0: 08005af5 .word 0x08005af5
8005ad4: 08005afd .word 0x08005afd
8005ad8: 08005b05 .word 0x08005b05
8005adc: 08005b0d .word 0x08005b0d
{
case DFU_DNLOAD:
DFU_Download(pdev, req);
8005ae0: 6839 ldr r1, [r7, #0]
8005ae2: 6878 ldr r0, [r7, #4]
8005ae4: f000 fa8e bl 8006004 <DFU_Download>
break;
8005ae8: e020 b.n 8005b2c <USBD_DFU_Setup+0xac>
case DFU_UPLOAD:
DFU_Upload(pdev, req);
8005aea: 6839 ldr r1, [r7, #0]
8005aec: 6878 ldr r0, [r7, #4]
8005aee: f000 faf3 bl 80060d8 <DFU_Upload>
break;
8005af2: e01b b.n 8005b2c <USBD_DFU_Setup+0xac>
case DFU_GETSTATUS:
DFU_GetStatus(pdev);
8005af4: 6878 ldr r0, [r7, #4]
8005af6: f000 fbc7 bl 8006288 <DFU_GetStatus>
break;
8005afa: e017 b.n 8005b2c <USBD_DFU_Setup+0xac>
case DFU_CLRSTATUS:
DFU_ClearStatus(pdev);
8005afc: 6878 ldr r0, [r7, #4]
8005afe: f000 fc75 bl 80063ec <DFU_ClearStatus>
break;
8005b02: e013 b.n 8005b2c <USBD_DFU_Setup+0xac>
case DFU_GETSTATE:
DFU_GetState(pdev);
8005b04: 6878 ldr r0, [r7, #4]
8005b06: f000 fcc0 bl 800648a <DFU_GetState>
break;
8005b0a: e00f b.n 8005b2c <USBD_DFU_Setup+0xac>
case DFU_ABORT:
DFU_Abort(pdev);
8005b0c: 6878 ldr r0, [r7, #4]
8005b0e: f000 fcd0 bl 80064b2 <DFU_Abort>
break;
8005b12: e00b b.n 8005b2c <USBD_DFU_Setup+0xac>
case DFU_DETACH:
DFU_Detach(pdev, req);
8005b14: 6839 ldr r1, [r7, #0]
8005b16: 6878 ldr r0, [r7, #4]
8005b18: f000 fa14 bl 8005f44 <DFU_Detach>
break;
8005b1c: e006 b.n 8005b2c <USBD_DFU_Setup+0xac>
default:
USBD_CtlError(pdev, req);
8005b1e: 6839 ldr r1, [r7, #0]
8005b20: 6878 ldr r0, [r7, #4]
8005b22: f001 fd34 bl 800758e <USBD_CtlError>
ret = USBD_FAIL;
8005b26: 2302 movs r3, #2
8005b28: 747b strb r3, [r7, #17]
break;
8005b2a: bf00 nop
}
break;
8005b2c: e08b b.n 8005c46 <USBD_DFU_Setup+0x1c6>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
8005b2e: 683b ldr r3, [r7, #0]
8005b30: 785b ldrb r3, [r3, #1]
8005b32: 2b0b cmp r3, #11
8005b34: d878 bhi.n 8005c28 <USBD_DFU_Setup+0x1a8>
8005b36: a201 add r2, pc, #4 ; (adr r2, 8005b3c <USBD_DFU_Setup+0xbc>)
8005b38: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8005b3c: 08005b6d .word 0x08005b6d
8005b40: 08005c29 .word 0x08005c29
8005b44: 08005c29 .word 0x08005c29
8005b48: 08005c29 .word 0x08005c29
8005b4c: 08005c29 .word 0x08005c29
8005b50: 08005c29 .word 0x08005c29
8005b54: 08005b95 .word 0x08005b95
8005b58: 08005c29 .word 0x08005c29
8005b5c: 08005c29 .word 0x08005c29
8005b60: 08005c29 .word 0x08005c29
8005b64: 08005bbf .word 0x08005bbf
8005b68: 08005be9 .word 0x08005be9
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8005b6c: 687b ldr r3, [r7, #4]
8005b6e: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8005b72: 2b03 cmp r3, #3
8005b74: d107 bne.n 8005b86 <USBD_DFU_Setup+0x106>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
8005b76: f107 030a add.w r3, r7, #10
8005b7a: 2202 movs r2, #2
8005b7c: 4619 mov r1, r3
8005b7e: 6878 ldr r0, [r7, #4]
8005b80: f001 fd6f bl 8007662 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
8005b84: e057 b.n 8005c36 <USBD_DFU_Setup+0x1b6>
USBD_CtlError(pdev, req);
8005b86: 6839 ldr r1, [r7, #0]
8005b88: 6878 ldr r0, [r7, #4]
8005b8a: f001 fd00 bl 800758e <USBD_CtlError>
ret = USBD_FAIL;
8005b8e: 2302 movs r3, #2
8005b90: 747b strb r3, [r7, #17]
break;
8005b92: e050 b.n 8005c36 <USBD_DFU_Setup+0x1b6>
case USB_REQ_GET_DESCRIPTOR:
if ((req->wValue >> 8) == DFU_DESCRIPTOR_TYPE)
8005b94: 683b ldr r3, [r7, #0]
8005b96: 885b ldrh r3, [r3, #2]
8005b98: 0a1b lsrs r3, r3, #8
8005b9a: b29b uxth r3, r3
8005b9c: 2b21 cmp r3, #33 ; 0x21
8005b9e: d107 bne.n 8005bb0 <USBD_DFU_Setup+0x130>
{
pbuf = USBD_DFU_CfgDesc + (9U * (USBD_DFU_MAX_ITF_NUM + 1U));
8005ba0: 4b2b ldr r3, [pc, #172] ; (8005c50 <USBD_DFU_Setup+0x1d0>)
8005ba2: 617b str r3, [r7, #20]
len = MIN(USB_DFU_DESC_SIZ, req->wLength);
8005ba4: 683b ldr r3, [r7, #0]
8005ba6: 88db ldrh r3, [r3, #6]
8005ba8: 2b09 cmp r3, #9
8005baa: bf28 it cs
8005bac: 2309 movcs r3, #9
8005bae: 827b strh r3, [r7, #18]
}
USBD_CtlSendData(pdev, pbuf, len);
8005bb0: 8a7b ldrh r3, [r7, #18]
8005bb2: 461a mov r2, r3
8005bb4: 6979 ldr r1, [r7, #20]
8005bb6: 6878 ldr r0, [r7, #4]
8005bb8: f001 fd53 bl 8007662 <USBD_CtlSendData>
break;
8005bbc: e03b b.n 8005c36 <USBD_DFU_Setup+0x1b6>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8005bbe: 687b ldr r3, [r7, #4]
8005bc0: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8005bc4: 2b03 cmp r3, #3
8005bc6: d108 bne.n 8005bda <USBD_DFU_Setup+0x15a>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&hdfu->alt_setting, 1U);
8005bc8: 68fb ldr r3, [r7, #12]
8005bca: f203 430c addw r3, r3, #1036 ; 0x40c
8005bce: 2201 movs r2, #1
8005bd0: 4619 mov r1, r3
8005bd2: 6878 ldr r0, [r7, #4]
8005bd4: f001 fd45 bl 8007662 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
8005bd8: e02d b.n 8005c36 <USBD_DFU_Setup+0x1b6>
USBD_CtlError(pdev, req);
8005bda: 6839 ldr r1, [r7, #0]
8005bdc: 6878 ldr r0, [r7, #4]
8005bde: f001 fcd6 bl 800758e <USBD_CtlError>
ret = USBD_FAIL;
8005be2: 2302 movs r3, #2
8005be4: 747b strb r3, [r7, #17]
break;
8005be6: e026 b.n 8005c36 <USBD_DFU_Setup+0x1b6>
case USB_REQ_SET_INTERFACE:
if ((uint8_t)(req->wValue) < USBD_DFU_MAX_ITF_NUM)
8005be8: 683b ldr r3, [r7, #0]
8005bea: 885b ldrh r3, [r3, #2]
8005bec: b2db uxtb r3, r3
8005bee: 2b00 cmp r3, #0
8005bf0: d113 bne.n 8005c1a <USBD_DFU_Setup+0x19a>
{
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8005bf2: 687b ldr r3, [r7, #4]
8005bf4: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8005bf8: 2b03 cmp r3, #3
8005bfa: d107 bne.n 8005c0c <USBD_DFU_Setup+0x18c>
{
hdfu->alt_setting = (uint8_t)(req->wValue);
8005bfc: 683b ldr r3, [r7, #0]
8005bfe: 885b ldrh r3, [r3, #2]
8005c00: b2db uxtb r3, r3
8005c02: 461a mov r2, r3
8005c04: 68fb ldr r3, [r7, #12]
8005c06: f8c3 240c str.w r2, [r3, #1036] ; 0x40c
{
/* Call the error management function (command will be nacked */
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
8005c0a: e014 b.n 8005c36 <USBD_DFU_Setup+0x1b6>
USBD_CtlError(pdev, req);
8005c0c: 6839 ldr r1, [r7, #0]
8005c0e: 6878 ldr r0, [r7, #4]
8005c10: f001 fcbd bl 800758e <USBD_CtlError>
ret = USBD_FAIL;
8005c14: 2302 movs r3, #2
8005c16: 747b strb r3, [r7, #17]
break;
8005c18: e00d b.n 8005c36 <USBD_DFU_Setup+0x1b6>
USBD_CtlError(pdev, req);
8005c1a: 6839 ldr r1, [r7, #0]
8005c1c: 6878 ldr r0, [r7, #4]
8005c1e: f001 fcb6 bl 800758e <USBD_CtlError>
ret = USBD_FAIL;
8005c22: 2302 movs r3, #2
8005c24: 747b strb r3, [r7, #17]
break;
8005c26: e006 b.n 8005c36 <USBD_DFU_Setup+0x1b6>
default:
USBD_CtlError(pdev, req);
8005c28: 6839 ldr r1, [r7, #0]
8005c2a: 6878 ldr r0, [r7, #4]
8005c2c: f001 fcaf bl 800758e <USBD_CtlError>
ret = USBD_FAIL;
8005c30: 2302 movs r3, #2
8005c32: 747b strb r3, [r7, #17]
break;
8005c34: bf00 nop
}
break;
8005c36: e006 b.n 8005c46 <USBD_DFU_Setup+0x1c6>
default:
USBD_CtlError(pdev, req);
8005c38: 6839 ldr r1, [r7, #0]
8005c3a: 6878 ldr r0, [r7, #4]
8005c3c: f001 fca7 bl 800758e <USBD_CtlError>
ret = USBD_FAIL;
8005c40: 2302 movs r3, #2
8005c42: 747b strb r3, [r7, #17]
break;
8005c44: bf00 nop
}
return ret;
8005c46: 7c7b ldrb r3, [r7, #17]
}
8005c48: 4618 mov r0, r3
8005c4a: 3718 adds r7, #24
8005c4c: 46bd mov sp, r7
8005c4e: bd80 pop {r7, pc}
8005c50: 2000005a .word 0x2000005a
08005c54 <USBD_DFU_GetCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_DFU_GetCfgDesc(uint16_t *length)
{
8005c54: b480 push {r7}
8005c56: b083 sub sp, #12
8005c58: af00 add r7, sp, #0
8005c5a: 6078 str r0, [r7, #4]
*length = sizeof(USBD_DFU_CfgDesc);
8005c5c: 687b ldr r3, [r7, #4]
8005c5e: 221b movs r2, #27
8005c60: 801a strh r2, [r3, #0]
return USBD_DFU_CfgDesc;
8005c62: 4b03 ldr r3, [pc, #12] ; (8005c70 <USBD_DFU_GetCfgDesc+0x1c>)
}
8005c64: 4618 mov r0, r3
8005c66: 370c adds r7, #12
8005c68: 46bd mov sp, r7
8005c6a: bc80 pop {r7}
8005c6c: 4770 bx lr
8005c6e: bf00 nop
8005c70: 20000048 .word 0x20000048
08005c74 <USBD_DFU_DataIn>:
* @param epnum: endpoint index
* @retval status
*/
static uint8_t USBD_DFU_DataIn(USBD_HandleTypeDef *pdev,
uint8_t epnum)
{
8005c74: b480 push {r7}
8005c76: b083 sub sp, #12
8005c78: af00 add r7, sp, #0
8005c7a: 6078 str r0, [r7, #4]
8005c7c: 460b mov r3, r1
8005c7e: 70fb strb r3, [r7, #3]
return USBD_OK;
8005c80: 2300 movs r3, #0
}
8005c82: 4618 mov r0, r3
8005c84: 370c adds r7, #12
8005c86: 46bd mov sp, r7
8005c88: bc80 pop {r7}
8005c8a: 4770 bx lr
08005c8c <USBD_DFU_EP0_RxReady>:
* handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_DFU_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
8005c8c: b480 push {r7}
8005c8e: b083 sub sp, #12
8005c90: af00 add r7, sp, #0
8005c92: 6078 str r0, [r7, #4]
return USBD_OK;
8005c94: 2300 movs r3, #0
}
8005c96: 4618 mov r0, r3
8005c98: 370c adds r7, #12
8005c9a: 46bd mov sp, r7
8005c9c: bc80 pop {r7}
8005c9e: 4770 bx lr
08005ca0 <USBD_DFU_EP0_TxReady>:
* handle EP0 TRx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_DFU_EP0_TxReady(USBD_HandleTypeDef *pdev)
{
8005ca0: b580 push {r7, lr}
8005ca2: b086 sub sp, #24
8005ca4: af00 add r7, sp, #0
8005ca6: 6078 str r0, [r7, #4]
uint32_t addr;
USBD_SetupReqTypedef req;
USBD_DFU_HandleTypeDef *hdfu;
hdfu = (USBD_DFU_HandleTypeDef *) pdev->pClassData;
8005ca8: 687b ldr r3, [r7, #4]
8005caa: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8005cae: 617b str r3, [r7, #20]
if (hdfu->dev_state == DFU_STATE_DNLOAD_BUSY)
8005cb0: 697b ldr r3, [r7, #20]
8005cb2: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
8005cb6: 2b04 cmp r3, #4
8005cb8: f040 80ca bne.w 8005e50 <USBD_DFU_EP0_TxReady+0x1b0>
{
/* Decode the Special Command*/
if (hdfu->wblock_num == 0U)
8005cbc: 697b ldr r3, [r7, #20]
8005cbe: f8d3 3400 ldr.w r3, [r3, #1024] ; 0x400
8005cc2: 2b00 cmp r3, #0
8005cc4: f040 8086 bne.w 8005dd4 <USBD_DFU_EP0_TxReady+0x134>
{
if ((hdfu->buffer.d8[0] == DFU_CMD_GETCOMMANDS) && (hdfu->wlength == 1U))
8005cc8: 697b ldr r3, [r7, #20]
8005cca: 781b ldrb r3, [r3, #0]
8005ccc: 2b00 cmp r3, #0
8005cce: d105 bne.n 8005cdc <USBD_DFU_EP0_TxReady+0x3c>
8005cd0: 697b ldr r3, [r7, #20]
8005cd2: f8d3 3404 ldr.w r3, [r3, #1028] ; 0x404
8005cd6: 2b01 cmp r3, #1
8005cd8: f000 809a beq.w 8005e10 <USBD_DFU_EP0_TxReady+0x170>
{
}
else if ((hdfu->buffer.d8[0] == DFU_CMD_SETADDRESSPOINTER) && (hdfu->wlength == 5U))
8005cdc: 697b ldr r3, [r7, #20]
8005cde: 781b ldrb r3, [r3, #0]
8005ce0: 2b21 cmp r3, #33 ; 0x21
8005ce2: d129 bne.n 8005d38 <USBD_DFU_EP0_TxReady+0x98>
8005ce4: 697b ldr r3, [r7, #20]
8005ce6: f8d3 3404 ldr.w r3, [r3, #1028] ; 0x404
8005cea: 2b05 cmp r3, #5
8005cec: d124 bne.n 8005d38 <USBD_DFU_EP0_TxReady+0x98>
{
hdfu->data_ptr = hdfu->buffer.d8[1];
8005cee: 697b ldr r3, [r7, #20]
8005cf0: 785b ldrb r3, [r3, #1]
8005cf2: 461a mov r2, r3
8005cf4: 697b ldr r3, [r7, #20]
8005cf6: f8c3 2408 str.w r2, [r3, #1032] ; 0x408
hdfu->data_ptr += (uint32_t)hdfu->buffer.d8[2] << 8;
8005cfa: 697b ldr r3, [r7, #20]
8005cfc: f8d3 2408 ldr.w r2, [r3, #1032] ; 0x408
8005d00: 697b ldr r3, [r7, #20]
8005d02: 789b ldrb r3, [r3, #2]
8005d04: 021b lsls r3, r3, #8
8005d06: 441a add r2, r3
8005d08: 697b ldr r3, [r7, #20]
8005d0a: f8c3 2408 str.w r2, [r3, #1032] ; 0x408
hdfu->data_ptr += (uint32_t)hdfu->buffer.d8[3] << 16;
8005d0e: 697b ldr r3, [r7, #20]
8005d10: f8d3 2408 ldr.w r2, [r3, #1032] ; 0x408
8005d14: 697b ldr r3, [r7, #20]
8005d16: 78db ldrb r3, [r3, #3]
8005d18: 041b lsls r3, r3, #16
8005d1a: 441a add r2, r3
8005d1c: 697b ldr r3, [r7, #20]
8005d1e: f8c3 2408 str.w r2, [r3, #1032] ; 0x408
hdfu->data_ptr += (uint32_t)hdfu->buffer.d8[4] << 24;
8005d22: 697b ldr r3, [r7, #20]
8005d24: f8d3 2408 ldr.w r2, [r3, #1032] ; 0x408
8005d28: 697b ldr r3, [r7, #20]
8005d2a: 791b ldrb r3, [r3, #4]
8005d2c: 061b lsls r3, r3, #24
8005d2e: 441a add r2, r3
8005d30: 697b ldr r3, [r7, #20]
8005d32: f8c3 2408 str.w r2, [r3, #1032] ; 0x408
8005d36: e06b b.n 8005e10 <USBD_DFU_EP0_TxReady+0x170>
}
else if ((hdfu->buffer.d8[0] == DFU_CMD_ERASE) && (hdfu->wlength == 5U))
8005d38: 697b ldr r3, [r7, #20]
8005d3a: 781b ldrb r3, [r3, #0]
8005d3c: 2b41 cmp r3, #65 ; 0x41
8005d3e: d136 bne.n 8005dae <USBD_DFU_EP0_TxReady+0x10e>
8005d40: 697b ldr r3, [r7, #20]
8005d42: f8d3 3404 ldr.w r3, [r3, #1028] ; 0x404
8005d46: 2b05 cmp r3, #5
8005d48: d131 bne.n 8005dae <USBD_DFU_EP0_TxReady+0x10e>
{
hdfu->data_ptr = hdfu->buffer.d8[1];
8005d4a: 697b ldr r3, [r7, #20]
8005d4c: 785b ldrb r3, [r3, #1]
8005d4e: 461a mov r2, r3
8005d50: 697b ldr r3, [r7, #20]
8005d52: f8c3 2408 str.w r2, [r3, #1032] ; 0x408
hdfu->data_ptr += (uint32_t)hdfu->buffer.d8[2] << 8;
8005d56: 697b ldr r3, [r7, #20]
8005d58: f8d3 2408 ldr.w r2, [r3, #1032] ; 0x408
8005d5c: 697b ldr r3, [r7, #20]
8005d5e: 789b ldrb r3, [r3, #2]
8005d60: 021b lsls r3, r3, #8
8005d62: 441a add r2, r3
8005d64: 697b ldr r3, [r7, #20]
8005d66: f8c3 2408 str.w r2, [r3, #1032] ; 0x408
hdfu->data_ptr += (uint32_t)hdfu->buffer.d8[3] << 16;
8005d6a: 697b ldr r3, [r7, #20]
8005d6c: f8d3 2408 ldr.w r2, [r3, #1032] ; 0x408
8005d70: 697b ldr r3, [r7, #20]
8005d72: 78db ldrb r3, [r3, #3]
8005d74: 041b lsls r3, r3, #16
8005d76: 441a add r2, r3
8005d78: 697b ldr r3, [r7, #20]
8005d7a: f8c3 2408 str.w r2, [r3, #1032] ; 0x408
hdfu->data_ptr += (uint32_t)hdfu->buffer.d8[4] << 24;
8005d7e: 697b ldr r3, [r7, #20]
8005d80: f8d3 2408 ldr.w r2, [r3, #1032] ; 0x408
8005d84: 697b ldr r3, [r7, #20]
8005d86: 791b ldrb r3, [r3, #4]
8005d88: 061b lsls r3, r3, #24
8005d8a: 441a add r2, r3
8005d8c: 697b ldr r3, [r7, #20]
8005d8e: f8c3 2408 str.w r2, [r3, #1032] ; 0x408
if (((USBD_DFU_MediaTypeDef *)pdev->pUserData)->Erase(hdfu->data_ptr) != USBD_OK)
8005d92: 687b ldr r3, [r7, #4]
8005d94: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8005d98: 68db ldr r3, [r3, #12]
8005d9a: 697a ldr r2, [r7, #20]
8005d9c: f8d2 2408 ldr.w r2, [r2, #1032] ; 0x408
8005da0: 4610 mov r0, r2
8005da2: 4798 blx r3
8005da4: 4603 mov r3, r0
8005da6: 2b00 cmp r3, #0
8005da8: d032 beq.n 8005e10 <USBD_DFU_EP0_TxReady+0x170>
{
return USBD_FAIL;
8005daa: 2302 movs r3, #2
8005dac: e059 b.n 8005e62 <USBD_DFU_EP0_TxReady+0x1c2>
}
}
else
{
/* Reset the global length and block number */
hdfu->wlength = 0U;
8005dae: 697b ldr r3, [r7, #20]
8005db0: 2200 movs r2, #0
8005db2: f8c3 2404 str.w r2, [r3, #1028] ; 0x404
hdfu->wblock_num = 0U;
8005db6: 697b ldr r3, [r7, #20]
8005db8: 2200 movs r2, #0
8005dba: f8c3 2400 str.w r2, [r3, #1024] ; 0x400
/* Call the error management function (command will be nacked) */
req.bmRequest = 0U;
8005dbe: 2300 movs r3, #0
8005dc0: 723b strb r3, [r7, #8]
req.wLength = 1U;
8005dc2: 2301 movs r3, #1
8005dc4: 81fb strh r3, [r7, #14]
USBD_CtlError(pdev, &req);
8005dc6: f107 0308 add.w r3, r7, #8
8005dca: 4619 mov r1, r3
8005dcc: 6878 ldr r0, [r7, #4]
8005dce: f001 fbde bl 800758e <USBD_CtlError>
8005dd2: e01d b.n 8005e10 <USBD_DFU_EP0_TxReady+0x170>
}
}
/* Regular Download Command */
else
{
if (hdfu->wblock_num > 1U)
8005dd4: 697b ldr r3, [r7, #20]
8005dd6: f8d3 3400 ldr.w r3, [r3, #1024] ; 0x400
8005dda: 2b01 cmp r3, #1
8005ddc: d918 bls.n 8005e10 <USBD_DFU_EP0_TxReady+0x170>
{
/* Decode the required address */
addr = ((hdfu->wblock_num - 2U) * USBD_DFU_XFER_SIZE) + hdfu->data_ptr;
8005dde: 697b ldr r3, [r7, #20]
8005de0: f8d3 3400 ldr.w r3, [r3, #1024] ; 0x400
8005de4: 3b02 subs r3, #2
8005de6: 029a lsls r2, r3, #10
8005de8: 697b ldr r3, [r7, #20]
8005dea: f8d3 3408 ldr.w r3, [r3, #1032] ; 0x408
8005dee: 4413 add r3, r2
8005df0: 613b str r3, [r7, #16]
/* Preform the write operation */
if (((USBD_DFU_MediaTypeDef *)pdev->pUserData)->Write(hdfu->buffer.d8,
8005df2: 687b ldr r3, [r7, #4]
8005df4: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8005df8: 691b ldr r3, [r3, #16]
8005dfa: 6978 ldr r0, [r7, #20]
8005dfc: 6939 ldr r1, [r7, #16]
8005dfe: 697a ldr r2, [r7, #20]
8005e00: f8d2 2404 ldr.w r2, [r2, #1028] ; 0x404
8005e04: 4798 blx r3
8005e06: 4603 mov r3, r0
8005e08: 2b00 cmp r3, #0
8005e0a: d001 beq.n 8005e10 <USBD_DFU_EP0_TxReady+0x170>
(uint8_t *)addr, hdfu->wlength) != USBD_OK)
{
return USBD_FAIL;
8005e0c: 2302 movs r3, #2
8005e0e: e028 b.n 8005e62 <USBD_DFU_EP0_TxReady+0x1c2>
}
}
}
/* Reset the global length and block number */
hdfu->wlength = 0U;
8005e10: 697b ldr r3, [r7, #20]
8005e12: 2200 movs r2, #0
8005e14: f8c3 2404 str.w r2, [r3, #1028] ; 0x404
hdfu->wblock_num = 0U;
8005e18: 697b ldr r3, [r7, #20]
8005e1a: 2200 movs r2, #0
8005e1c: f8c3 2400 str.w r2, [r3, #1024] ; 0x400
/* Update the state machine */
hdfu->dev_state = DFU_STATE_DNLOAD_SYNC;
8005e20: 697b ldr r3, [r7, #20]
8005e22: 2203 movs r2, #3
8005e24: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[1] = 0U;
8005e28: 697b ldr r3, [r7, #20]
8005e2a: 2200 movs r2, #0
8005e2c: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
8005e30: 697b ldr r3, [r7, #20]
8005e32: 2200 movs r2, #0
8005e34: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U;
8005e38: 697b ldr r3, [r7, #20]
8005e3a: 2200 movs r2, #0
8005e3c: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;
8005e40: 697b ldr r3, [r7, #20]
8005e42: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
8005e46: 697b ldr r3, [r7, #20]
8005e48: f883 2414 strb.w r2, [r3, #1044] ; 0x414
return USBD_OK;
8005e4c: 2300 movs r3, #0
8005e4e: e008 b.n 8005e62 <USBD_DFU_EP0_TxReady+0x1c2>
}
else
{
if (hdfu->dev_state == DFU_STATE_MANIFEST)/* Manifestation in progress */
8005e50: 697b ldr r3, [r7, #20]
8005e52: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
8005e56: 2b07 cmp r3, #7
8005e58: d102 bne.n 8005e60 <USBD_DFU_EP0_TxReady+0x1c0>
{
/* Start leaving DFU mode */
DFU_Leave(pdev);
8005e5a: 6878 ldr r0, [r7, #4]
8005e5c: f000 fb76 bl 800654c <DFU_Leave>
}
}
return USBD_OK;
8005e60: 2300 movs r3, #0
}
8005e62: 4618 mov r0, r3
8005e64: 3718 adds r7, #24
8005e66: 46bd mov sp, r7
8005e68: bd80 pop {r7, pc}
08005e6a <USBD_DFU_SOF>:
* handle SOF event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_DFU_SOF(USBD_HandleTypeDef *pdev)
{
8005e6a: b480 push {r7}
8005e6c: b083 sub sp, #12
8005e6e: af00 add r7, sp, #0
8005e70: 6078 str r0, [r7, #4]
return USBD_OK;
8005e72: 2300 movs r3, #0
}
8005e74: 4618 mov r0, r3
8005e76: 370c adds r7, #12
8005e78: 46bd mov sp, r7
8005e7a: bc80 pop {r7}
8005e7c: 4770 bx lr
08005e7e <USBD_DFU_IsoINIncomplete>:
* @param pdev: device instance
* @param epnum: endpoint index
* @retval status
*/
static uint8_t USBD_DFU_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
8005e7e: b480 push {r7}
8005e80: b083 sub sp, #12
8005e82: af00 add r7, sp, #0
8005e84: 6078 str r0, [r7, #4]
8005e86: 460b mov r3, r1
8005e88: 70fb strb r3, [r7, #3]
return USBD_OK;
8005e8a: 2300 movs r3, #0
}
8005e8c: 4618 mov r0, r3
8005e8e: 370c adds r7, #12
8005e90: 46bd mov sp, r7
8005e92: bc80 pop {r7}
8005e94: 4770 bx lr
08005e96 <USBD_DFU_IsoOutIncomplete>:
* @param pdev: device instance
* @param epnum: endpoint index
* @retval status
*/
static uint8_t USBD_DFU_IsoOutIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
8005e96: b480 push {r7}
8005e98: b083 sub sp, #12
8005e9a: af00 add r7, sp, #0
8005e9c: 6078 str r0, [r7, #4]
8005e9e: 460b mov r3, r1
8005ea0: 70fb strb r3, [r7, #3]
return USBD_OK;
8005ea2: 2300 movs r3, #0
}
8005ea4: 4618 mov r0, r3
8005ea6: 370c adds r7, #12
8005ea8: 46bd mov sp, r7
8005eaa: bc80 pop {r7}
8005eac: 4770 bx lr
08005eae <USBD_DFU_DataOut>:
* @param epnum: endpoint index
* @retval status
*/
static uint8_t USBD_DFU_DataOut(USBD_HandleTypeDef *pdev,
uint8_t epnum)
{
8005eae: b480 push {r7}
8005eb0: b083 sub sp, #12
8005eb2: af00 add r7, sp, #0
8005eb4: 6078 str r0, [r7, #4]
8005eb6: 460b mov r3, r1
8005eb8: 70fb strb r3, [r7, #3]
return USBD_OK;
8005eba: 2300 movs r3, #0
}
8005ebc: 4618 mov r0, r3
8005ebe: 370c adds r7, #12
8005ec0: 46bd mov sp, r7
8005ec2: bc80 pop {r7}
8005ec4: 4770 bx lr
...
08005ec8 <USBD_DFU_GetDeviceQualifierDesc>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_DFU_GetDeviceQualifierDesc(uint16_t *length)
{
8005ec8: b480 push {r7}
8005eca: b083 sub sp, #12
8005ecc: af00 add r7, sp, #0
8005ece: 6078 str r0, [r7, #4]
*length = sizeof(USBD_DFU_DeviceQualifierDesc);
8005ed0: 687b ldr r3, [r7, #4]
8005ed2: 220a movs r2, #10
8005ed4: 801a strh r2, [r3, #0]
return USBD_DFU_DeviceQualifierDesc;
8005ed6: 4b03 ldr r3, [pc, #12] ; (8005ee4 <USBD_DFU_GetDeviceQualifierDesc+0x1c>)
}
8005ed8: 4618 mov r0, r3
8005eda: 370c adds r7, #12
8005edc: 46bd mov sp, r7
8005ede: bc80 pop {r7}
8005ee0: 4770 bx lr
8005ee2: bf00 nop
8005ee4: 20000064 .word 0x20000064
08005ee8 <USBD_DFU_GetUsrStringDesc>:
* @param length : pointer data length
* @retval pointer to the descriptor table or NULL if the descriptor is not supported.
*/
#if (USBD_SUPPORT_USER_STRING_DESC == 1U)
static uint8_t *USBD_DFU_GetUsrStringDesc(USBD_HandleTypeDef *pdev, uint8_t index, uint16_t *length)
{
8005ee8: b580 push {r7, lr}
8005eea: b084 sub sp, #16
8005eec: af00 add r7, sp, #0
8005eee: 60f8 str r0, [r7, #12]
8005ef0: 460b mov r3, r1
8005ef2: 607a str r2, [r7, #4]
8005ef4: 72fb strb r3, [r7, #11]
static uint8_t USBD_StrDesc[255];
/* Check if the requested string interface is supported */
if (index <= (USBD_IDX_INTERFACE_STR + USBD_DFU_MAX_ITF_NUM))
8005ef6: 7afb ldrb r3, [r7, #11]
8005ef8: 2b06 cmp r3, #6
8005efa: d80a bhi.n 8005f12 <USBD_DFU_GetUsrStringDesc+0x2a>
{
USBD_GetString((uint8_t *)((USBD_DFU_MediaTypeDef *)pdev->pUserData)->pStrDesc, USBD_StrDesc, length);
8005efc: 68fb ldr r3, [r7, #12]
8005efe: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8005f02: 681b ldr r3, [r3, #0]
8005f04: 687a ldr r2, [r7, #4]
8005f06: 4905 ldr r1, [pc, #20] ; (8005f1c <USBD_DFU_GetUsrStringDesc+0x34>)
8005f08: 4618 mov r0, r3
8005f0a: f001 fb51 bl 80075b0 <USBD_GetString>
return USBD_StrDesc;
8005f0e: 4b03 ldr r3, [pc, #12] ; (8005f1c <USBD_DFU_GetUsrStringDesc+0x34>)
8005f10: e000 b.n 8005f14 <USBD_DFU_GetUsrStringDesc+0x2c>
}
/* Not supported Interface Descriptor index */
else
{
return NULL;
8005f12: 2300 movs r3, #0
}
}
8005f14: 4618 mov r0, r3
8005f16: 3710 adds r7, #16
8005f18: 46bd mov sp, r7
8005f1a: bd80 pop {r7, pc}
8005f1c: 200000f8 .word 0x200000f8
08005f20 <USBD_DFU_RegisterMedia>:
* @param fops: storage callback
* @retval status
*/
uint8_t USBD_DFU_RegisterMedia(USBD_HandleTypeDef *pdev,
USBD_DFU_MediaTypeDef *fops)
{
8005f20: b480 push {r7}
8005f22: b083 sub sp, #12
8005f24: af00 add r7, sp, #0
8005f26: 6078 str r0, [r7, #4]
8005f28: 6039 str r1, [r7, #0]
if (fops != NULL)
8005f2a: 683b ldr r3, [r7, #0]
8005f2c: 2b00 cmp r3, #0
8005f2e: d003 beq.n 8005f38 <USBD_DFU_RegisterMedia+0x18>
{
pdev->pUserData = fops;
8005f30: 687b ldr r3, [r7, #4]
8005f32: 683a ldr r2, [r7, #0]
8005f34: f8c3 22bc str.w r2, [r3, #700] ; 0x2bc
}
return 0U;
8005f38: 2300 movs r3, #0
}
8005f3a: 4618 mov r0, r3
8005f3c: 370c adds r7, #12
8005f3e: 46bd mov sp, r7
8005f40: bc80 pop {r7}
8005f42: 4770 bx lr
08005f44 <DFU_Detach>:
* @param pdev: device instance
* @param req: pointer to the request structure.
* @retval None.
*/
static void DFU_Detach(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8005f44: b580 push {r7, lr}
8005f46: b084 sub sp, #16
8005f48: af00 add r7, sp, #0
8005f4a: 6078 str r0, [r7, #4]
8005f4c: 6039 str r1, [r7, #0]
USBD_DFU_HandleTypeDef *hdfu;
hdfu = (USBD_DFU_HandleTypeDef *) pdev->pClassData;
8005f4e: 687b ldr r3, [r7, #4]
8005f50: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8005f54: 60fb str r3, [r7, #12]
if (hdfu->dev_state == DFU_STATE_IDLE || hdfu->dev_state == DFU_STATE_DNLOAD_SYNC
8005f56: 68fb ldr r3, [r7, #12]
8005f58: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
8005f5c: 2b02 cmp r3, #2
8005f5e: d013 beq.n 8005f88 <DFU_Detach+0x44>
8005f60: 68fb ldr r3, [r7, #12]
8005f62: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
8005f66: 2b03 cmp r3, #3
8005f68: d00e beq.n 8005f88 <DFU_Detach+0x44>
|| hdfu->dev_state == DFU_STATE_DNLOAD_IDLE || hdfu->dev_state == DFU_STATE_MANIFEST_SYNC
8005f6a: 68fb ldr r3, [r7, #12]
8005f6c: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
8005f70: 2b05 cmp r3, #5
8005f72: d009 beq.n 8005f88 <DFU_Detach+0x44>
8005f74: 68fb ldr r3, [r7, #12]
8005f76: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
8005f7a: 2b06 cmp r3, #6
8005f7c: d004 beq.n 8005f88 <DFU_Detach+0x44>
|| hdfu->dev_state == DFU_STATE_UPLOAD_IDLE)
8005f7e: 68fb ldr r3, [r7, #12]
8005f80: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
8005f84: 2b09 cmp r3, #9
8005f86: d125 bne.n 8005fd4 <DFU_Detach+0x90>
{
/* Update the state machine */
hdfu->dev_state = DFU_STATE_IDLE;
8005f88: 68fb ldr r3, [r7, #12]
8005f8a: 2202 movs r2, #2
8005f8c: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[0] = DFU_ERROR_NONE;
8005f90: 68fb ldr r3, [r7, #12]
8005f92: 2200 movs r2, #0
8005f94: f883 2410 strb.w r2, [r3, #1040] ; 0x410
hdfu->dev_status[1] = 0U;
8005f98: 68fb ldr r3, [r7, #12]
8005f9a: 2200 movs r2, #0
8005f9c: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
8005fa0: 68fb ldr r3, [r7, #12]
8005fa2: 2200 movs r2, #0
8005fa4: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U; /*bwPollTimeout=0ms*/
8005fa8: 68fb ldr r3, [r7, #12]
8005faa: 2200 movs r2, #0
8005fac: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;
8005fb0: 68fb ldr r3, [r7, #12]
8005fb2: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
8005fb6: 68fb ldr r3, [r7, #12]
8005fb8: f883 2414 strb.w r2, [r3, #1044] ; 0x414
hdfu->dev_status[5] = 0U; /*iString*/
8005fbc: 68fb ldr r3, [r7, #12]
8005fbe: 2200 movs r2, #0
8005fc0: f883 2415 strb.w r2, [r3, #1045] ; 0x415
hdfu->wblock_num = 0U;
8005fc4: 68fb ldr r3, [r7, #12]
8005fc6: 2200 movs r2, #0
8005fc8: f8c3 2400 str.w r2, [r3, #1024] ; 0x400
hdfu->wlength = 0U;
8005fcc: 68fb ldr r3, [r7, #12]
8005fce: 2200 movs r2, #0
8005fd0: f8c3 2404 str.w r2, [r3, #1028] ; 0x404
}
/* Check the detach capability in the DFU functional descriptor */
if ((USBD_DFU_CfgDesc[12U + (9U * USBD_DFU_MAX_ITF_NUM)]) & DFU_DETACH_MASK)
8005fd4: 4b0a ldr r3, [pc, #40] ; (8006000 <DFU_Detach+0xbc>)
8005fd6: 7d5b ldrb r3, [r3, #21]
8005fd8: f003 0310 and.w r3, r3, #16
8005fdc: 2b00 cmp r3, #0
8005fde: d006 beq.n 8005fee <DFU_Detach+0xaa>
{
/* Perform an Attach-Detach operation on USB bus */
USBD_Stop(pdev);
8005fe0: 6878 ldr r0, [r7, #4]
8005fe2: f000 fb51 bl 8006688 <USBD_Stop>
USBD_Start(pdev);
8005fe6: 6878 ldr r0, [r7, #4]
8005fe8: f000 fb42 bl 8006670 <USBD_Start>
else
{
/* Wait for the period of time specified in Detach request */
USBD_Delay((uint32_t)req->wValue);
}
}
8005fec: e004 b.n 8005ff8 <DFU_Detach+0xb4>
USBD_Delay((uint32_t)req->wValue);
8005fee: 683b ldr r3, [r7, #0]
8005ff0: 885b ldrh r3, [r3, #2]
8005ff2: 4618 mov r0, r3
8005ff4: f7fa fbba bl 800076c <HAL_Delay>
}
8005ff8: bf00 nop
8005ffa: 3710 adds r7, #16
8005ffc: 46bd mov sp, r7
8005ffe: bd80 pop {r7, pc}
8006000: 20000048 .word 0x20000048
08006004 <DFU_Download>:
* @param pdev: device instance
* @param req: pointer to the request structure
* @retval None
*/
static void DFU_Download(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8006004: b580 push {r7, lr}
8006006: b084 sub sp, #16
8006008: af00 add r7, sp, #0
800600a: 6078 str r0, [r7, #4]
800600c: 6039 str r1, [r7, #0]
USBD_DFU_HandleTypeDef *hdfu;
hdfu = (USBD_DFU_HandleTypeDef *) pdev->pClassData;
800600e: 687b ldr r3, [r7, #4]
8006010: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8006014: 60fb str r3, [r7, #12]
/* Data setup request */
if (req->wLength > 0U)
8006016: 683b ldr r3, [r7, #0]
8006018: 88db ldrh r3, [r3, #6]
800601a: 2b00 cmp r3, #0
800601c: d02e beq.n 800607c <DFU_Download+0x78>
{
if ((hdfu->dev_state == DFU_STATE_IDLE) || (hdfu->dev_state == DFU_STATE_DNLOAD_IDLE))
800601e: 68fb ldr r3, [r7, #12]
8006020: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
8006024: 2b02 cmp r3, #2
8006026: d004 beq.n 8006032 <DFU_Download+0x2e>
8006028: 68fb ldr r3, [r7, #12]
800602a: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
800602e: 2b05 cmp r3, #5
8006030: d11f bne.n 8006072 <DFU_Download+0x6e>
{
/* Update the global length and block number */
hdfu->wblock_num = req->wValue;
8006032: 683b ldr r3, [r7, #0]
8006034: 885b ldrh r3, [r3, #2]
8006036: 461a mov r2, r3
8006038: 68fb ldr r3, [r7, #12]
800603a: f8c3 2400 str.w r2, [r3, #1024] ; 0x400
hdfu->wlength = req->wLength;
800603e: 683b ldr r3, [r7, #0]
8006040: 88db ldrh r3, [r3, #6]
8006042: 461a mov r2, r3
8006044: 68fb ldr r3, [r7, #12]
8006046: f8c3 2404 str.w r2, [r3, #1028] ; 0x404
/* Update the state machine */
hdfu->dev_state = DFU_STATE_DNLOAD_SYNC;
800604a: 68fb ldr r3, [r7, #12]
800604c: 2203 movs r2, #3
800604e: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[4] = hdfu->dev_state;
8006052: 68fb ldr r3, [r7, #12]
8006054: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
8006058: 68fb ldr r3, [r7, #12]
800605a: f883 2414 strb.w r2, [r3, #1044] ; 0x414
/* Prepare the reception of the buffer over EP0 */
USBD_CtlPrepareRx(pdev, (uint8_t *)hdfu->buffer.d8,
800605e: 68f9 ldr r1, [r7, #12]
(uint16_t)hdfu->wlength);
8006060: 68fb ldr r3, [r7, #12]
8006062: f8d3 3404 ldr.w r3, [r3, #1028] ; 0x404
USBD_CtlPrepareRx(pdev, (uint8_t *)hdfu->buffer.d8,
8006066: b29b uxth r3, r3
8006068: 461a mov r2, r3
800606a: 6878 ldr r0, [r7, #4]
800606c: f001 fb27 bl 80076be <USBD_CtlPrepareRx>
8006070: e02e b.n 80060d0 <DFU_Download+0xcc>
}
/* Unsupported state */
else
{
/* Call the error management function (command will be nacked */
USBD_CtlError(pdev, req);
8006072: 6839 ldr r1, [r7, #0]
8006074: 6878 ldr r0, [r7, #4]
8006076: f001 fa8a bl 800758e <USBD_CtlError>
{
/* Call the error management function (command will be nacked */
USBD_CtlError(pdev, req);
}
}
}
800607a: e029 b.n 80060d0 <DFU_Download+0xcc>
if (hdfu->dev_state == DFU_STATE_DNLOAD_IDLE || hdfu->dev_state == DFU_STATE_IDLE)
800607c: 68fb ldr r3, [r7, #12]
800607e: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
8006082: 2b05 cmp r3, #5
8006084: d004 beq.n 8006090 <DFU_Download+0x8c>
8006086: 68fb ldr r3, [r7, #12]
8006088: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
800608c: 2b02 cmp r3, #2
800608e: d11a bne.n 80060c6 <DFU_Download+0xc2>
hdfu->manif_state = DFU_MANIFEST_IN_PROGRESS;
8006090: 68fb ldr r3, [r7, #12]
8006092: 2201 movs r2, #1
8006094: f883 2419 strb.w r2, [r3, #1049] ; 0x419
hdfu->dev_state = DFU_STATE_MANIFEST_SYNC;
8006098: 68fb ldr r3, [r7, #12]
800609a: 2206 movs r2, #6
800609c: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[1] = 0U;
80060a0: 68fb ldr r3, [r7, #12]
80060a2: 2200 movs r2, #0
80060a4: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
80060a8: 68fb ldr r3, [r7, #12]
80060aa: 2200 movs r2, #0
80060ac: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U;
80060b0: 68fb ldr r3, [r7, #12]
80060b2: 2200 movs r2, #0
80060b4: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;
80060b8: 68fb ldr r3, [r7, #12]
80060ba: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
80060be: 68fb ldr r3, [r7, #12]
80060c0: f883 2414 strb.w r2, [r3, #1044] ; 0x414
80060c4: e004 b.n 80060d0 <DFU_Download+0xcc>
USBD_CtlError(pdev, req);
80060c6: 6839 ldr r1, [r7, #0]
80060c8: 6878 ldr r0, [r7, #4]
80060ca: f001 fa60 bl 800758e <USBD_CtlError>
}
80060ce: e7ff b.n 80060d0 <DFU_Download+0xcc>
80060d0: bf00 nop
80060d2: 3710 adds r7, #16
80060d4: 46bd mov sp, r7
80060d6: bd80 pop {r7, pc}
080060d8 <DFU_Upload>:
* @param pdev: instance
* @param req: pointer to the request structure
* @retval status
*/
static void DFU_Upload(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
80060d8: b580 push {r7, lr}
80060da: b086 sub sp, #24
80060dc: af00 add r7, sp, #0
80060de: 6078 str r0, [r7, #4]
80060e0: 6039 str r1, [r7, #0]
USBD_DFU_HandleTypeDef *hdfu;
hdfu = (USBD_DFU_HandleTypeDef *) pdev->pClassData;
80060e2: 687b ldr r3, [r7, #4]
80060e4: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80060e8: 617b str r3, [r7, #20]
uint8_t *phaddr = NULL;
80060ea: 2300 movs r3, #0
80060ec: 613b str r3, [r7, #16]
uint32_t addr = 0U;
80060ee: 2300 movs r3, #0
80060f0: 60fb str r3, [r7, #12]
/* Data setup request */
if (req->wLength > 0U)
80060f2: 683b ldr r3, [r7, #0]
80060f4: 88db ldrh r3, [r3, #6]
80060f6: 2b00 cmp r3, #0
80060f8: f000 80ab beq.w 8006252 <DFU_Upload+0x17a>
{
if ((hdfu->dev_state == DFU_STATE_IDLE) || (hdfu->dev_state == DFU_STATE_UPLOAD_IDLE))
80060fc: 697b ldr r3, [r7, #20]
80060fe: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
8006102: 2b02 cmp r3, #2
8006104: d005 beq.n 8006112 <DFU_Upload+0x3a>
8006106: 697b ldr r3, [r7, #20]
8006108: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
800610c: 2b09 cmp r3, #9
800610e: f040 8093 bne.w 8006238 <DFU_Upload+0x160>
{
/* Update the global length and block number */
hdfu->wblock_num = req->wValue;
8006112: 683b ldr r3, [r7, #0]
8006114: 885b ldrh r3, [r3, #2]
8006116: 461a mov r2, r3
8006118: 697b ldr r3, [r7, #20]
800611a: f8c3 2400 str.w r2, [r3, #1024] ; 0x400
hdfu->wlength = req->wLength;
800611e: 683b ldr r3, [r7, #0]
8006120: 88db ldrh r3, [r3, #6]
8006122: 461a mov r2, r3
8006124: 697b ldr r3, [r7, #20]
8006126: f8c3 2404 str.w r2, [r3, #1028] ; 0x404
/* DFU Get Command */
if (hdfu->wblock_num == 0U)
800612a: 697b ldr r3, [r7, #20]
800612c: f8d3 3400 ldr.w r3, [r3, #1024] ; 0x400
8006130: 2b00 cmp r3, #0
8006132: d12c bne.n 800618e <DFU_Upload+0xb6>
{
/* Update the state machine */
hdfu->dev_state = (hdfu->wlength > 3U) ? DFU_STATE_IDLE : DFU_STATE_UPLOAD_IDLE;
8006134: 697b ldr r3, [r7, #20]
8006136: f8d3 3404 ldr.w r3, [r3, #1028] ; 0x404
800613a: 2b03 cmp r3, #3
800613c: d901 bls.n 8006142 <DFU_Upload+0x6a>
800613e: 2202 movs r2, #2
8006140: e000 b.n 8006144 <DFU_Upload+0x6c>
8006142: 2209 movs r2, #9
8006144: 697b ldr r3, [r7, #20]
8006146: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[1] = 0U;
800614a: 697b ldr r3, [r7, #20]
800614c: 2200 movs r2, #0
800614e: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
8006152: 697b ldr r3, [r7, #20]
8006154: 2200 movs r2, #0
8006156: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U;
800615a: 697b ldr r3, [r7, #20]
800615c: 2200 movs r2, #0
800615e: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;
8006162: 697b ldr r3, [r7, #20]
8006164: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
8006168: 697b ldr r3, [r7, #20]
800616a: f883 2414 strb.w r2, [r3, #1044] ; 0x414
/* Store the values of all supported commands */
hdfu->buffer.d8[0] = DFU_CMD_GETCOMMANDS;
800616e: 697b ldr r3, [r7, #20]
8006170: 2200 movs r2, #0
8006172: 701a strb r2, [r3, #0]
hdfu->buffer.d8[1] = DFU_CMD_SETADDRESSPOINTER;
8006174: 697b ldr r3, [r7, #20]
8006176: 2221 movs r2, #33 ; 0x21
8006178: 705a strb r2, [r3, #1]
hdfu->buffer.d8[2] = DFU_CMD_ERASE;
800617a: 697b ldr r3, [r7, #20]
800617c: 2241 movs r2, #65 ; 0x41
800617e: 709a strb r2, [r3, #2]
/* Send the status data over EP0 */
USBD_CtlSendData(pdev, (uint8_t *)(&(hdfu->buffer.d8[0])), 3U);
8006180: 697b ldr r3, [r7, #20]
8006182: 2203 movs r2, #3
8006184: 4619 mov r1, r3
8006186: 6878 ldr r0, [r7, #4]
8006188: f001 fa6b bl 8007662 <USBD_CtlSendData>
if (hdfu->wblock_num == 0U)
800618c: e078 b.n 8006280 <DFU_Upload+0x1a8>
}
else if (hdfu->wblock_num > 1U)
800618e: 697b ldr r3, [r7, #20]
8006190: f8d3 3400 ldr.w r3, [r3, #1024] ; 0x400
8006194: 2b01 cmp r3, #1
8006196: d934 bls.n 8006202 <DFU_Upload+0x12a>
{
hdfu->dev_state = DFU_STATE_UPLOAD_IDLE;
8006198: 697b ldr r3, [r7, #20]
800619a: 2209 movs r2, #9
800619c: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[1] = 0U;
80061a0: 697b ldr r3, [r7, #20]
80061a2: 2200 movs r2, #0
80061a4: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
80061a8: 697b ldr r3, [r7, #20]
80061aa: 2200 movs r2, #0
80061ac: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U;
80061b0: 697b ldr r3, [r7, #20]
80061b2: 2200 movs r2, #0
80061b4: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;
80061b8: 697b ldr r3, [r7, #20]
80061ba: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
80061be: 697b ldr r3, [r7, #20]
80061c0: f883 2414 strb.w r2, [r3, #1044] ; 0x414
addr = ((hdfu->wblock_num - 2U) * USBD_DFU_XFER_SIZE) + hdfu->data_ptr; /* Change is Accelerated*/
80061c4: 697b ldr r3, [r7, #20]
80061c6: f8d3 3400 ldr.w r3, [r3, #1024] ; 0x400
80061ca: 3b02 subs r3, #2
80061cc: 029a lsls r2, r3, #10
80061ce: 697b ldr r3, [r7, #20]
80061d0: f8d3 3408 ldr.w r3, [r3, #1032] ; 0x408
80061d4: 4413 add r3, r2
80061d6: 60fb str r3, [r7, #12]
/* Return the physical address where data are stored */
phaddr = ((USBD_DFU_MediaTypeDef *)pdev->pUserData)->Read((uint8_t *)addr, hdfu->buffer.d8, hdfu->wlength);
80061d8: 687b ldr r3, [r7, #4]
80061da: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
80061de: 695b ldr r3, [r3, #20]
80061e0: 68f8 ldr r0, [r7, #12]
80061e2: 6979 ldr r1, [r7, #20]
80061e4: 697a ldr r2, [r7, #20]
80061e6: f8d2 2404 ldr.w r2, [r2, #1028] ; 0x404
80061ea: 4798 blx r3
80061ec: 6138 str r0, [r7, #16]
/* Send the status data over EP0 */
USBD_CtlSendData(pdev, phaddr, (uint16_t)hdfu->wlength);
80061ee: 697b ldr r3, [r7, #20]
80061f0: f8d3 3404 ldr.w r3, [r3, #1028] ; 0x404
80061f4: b29b uxth r3, r3
80061f6: 461a mov r2, r3
80061f8: 6939 ldr r1, [r7, #16]
80061fa: 6878 ldr r0, [r7, #4]
80061fc: f001 fa31 bl 8007662 <USBD_CtlSendData>
if (hdfu->wblock_num == 0U)
8006200: e03e b.n 8006280 <DFU_Upload+0x1a8>
}
else /* unsupported hdfu->wblock_num */
{
hdfu->dev_state = DFU_ERROR_STALLEDPKT;
8006202: 697b ldr r3, [r7, #20]
8006204: 220f movs r2, #15
8006206: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[1] = 0U;
800620a: 697b ldr r3, [r7, #20]
800620c: 2200 movs r2, #0
800620e: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
8006212: 697b ldr r3, [r7, #20]
8006214: 2200 movs r2, #0
8006216: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U;
800621a: 697b ldr r3, [r7, #20]
800621c: 2200 movs r2, #0
800621e: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;
8006222: 697b ldr r3, [r7, #20]
8006224: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
8006228: 697b ldr r3, [r7, #20]
800622a: f883 2414 strb.w r2, [r3, #1044] ; 0x414
/* Call the error management function (command will be nacked */
USBD_CtlError(pdev, req);
800622e: 6839 ldr r1, [r7, #0]
8006230: 6878 ldr r0, [r7, #4]
8006232: f001 f9ac bl 800758e <USBD_CtlError>
if (hdfu->wblock_num == 0U)
8006236: e023 b.n 8006280 <DFU_Upload+0x1a8>
}
}
/* Unsupported state */
else
{
hdfu->wlength = 0U;
8006238: 697b ldr r3, [r7, #20]
800623a: 2200 movs r2, #0
800623c: f8c3 2404 str.w r2, [r3, #1028] ; 0x404
hdfu->wblock_num = 0U;
8006240: 697b ldr r3, [r7, #20]
8006242: 2200 movs r2, #0
8006244: f8c3 2400 str.w r2, [r3, #1024] ; 0x400
/* Call the error management function (command will be nacked */
USBD_CtlError(pdev, req);
8006248: 6839 ldr r1, [r7, #0]
800624a: 6878 ldr r0, [r7, #4]
800624c: f001 f99f bl 800758e <USBD_CtlError>
hdfu->dev_status[1] = 0U;
hdfu->dev_status[2] = 0U;
hdfu->dev_status[3] = 0U;
hdfu->dev_status[4] = hdfu->dev_state;
}
}
8006250: e016 b.n 8006280 <DFU_Upload+0x1a8>
hdfu->dev_state = DFU_STATE_IDLE;
8006252: 697b ldr r3, [r7, #20]
8006254: 2202 movs r2, #2
8006256: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[1] = 0U;
800625a: 697b ldr r3, [r7, #20]
800625c: 2200 movs r2, #0
800625e: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
8006262: 697b ldr r3, [r7, #20]
8006264: 2200 movs r2, #0
8006266: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U;
800626a: 697b ldr r3, [r7, #20]
800626c: 2200 movs r2, #0
800626e: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;
8006272: 697b ldr r3, [r7, #20]
8006274: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
8006278: 697b ldr r3, [r7, #20]
800627a: f883 2414 strb.w r2, [r3, #1044] ; 0x414
}
800627e: e7ff b.n 8006280 <DFU_Upload+0x1a8>
8006280: bf00 nop
8006282: 3718 adds r7, #24
8006284: 46bd mov sp, r7
8006286: bd80 pop {r7, pc}
08006288 <DFU_GetStatus>:
* Handles the DFU GETSTATUS request.
* @param pdev: instance
* @retval status
*/
static void DFU_GetStatus(USBD_HandleTypeDef *pdev)
{
8006288: b580 push {r7, lr}
800628a: b084 sub sp, #16
800628c: af00 add r7, sp, #0
800628e: 6078 str r0, [r7, #4]
USBD_DFU_HandleTypeDef *hdfu;
hdfu = (USBD_DFU_HandleTypeDef *) pdev->pClassData;
8006290: 687b ldr r3, [r7, #4]
8006292: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8006296: 60fb str r3, [r7, #12]
switch (hdfu->dev_state)
8006298: 68fb ldr r3, [r7, #12]
800629a: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
800629e: 2b03 cmp r3, #3
80062a0: d002 beq.n 80062a8 <DFU_GetStatus+0x20>
80062a2: 2b06 cmp r3, #6
80062a4: d055 beq.n 8006352 <DFU_GetStatus+0xca>
}
}
break;
default :
break;
80062a6: e092 b.n 80063ce <DFU_GetStatus+0x146>
if (hdfu->wlength != 0U)
80062a8: 68fb ldr r3, [r7, #12]
80062aa: f8d3 3404 ldr.w r3, [r3, #1028] ; 0x404
80062ae: 2b00 cmp r3, #0
80062b0: d038 beq.n 8006324 <DFU_GetStatus+0x9c>
hdfu->dev_state = DFU_STATE_DNLOAD_BUSY;
80062b2: 68fb ldr r3, [r7, #12]
80062b4: 2204 movs r2, #4
80062b6: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[1] = 0U;
80062ba: 68fb ldr r3, [r7, #12]
80062bc: 2200 movs r2, #0
80062be: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
80062c2: 68fb ldr r3, [r7, #12]
80062c4: 2200 movs r2, #0
80062c6: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U;
80062ca: 68fb ldr r3, [r7, #12]
80062cc: 2200 movs r2, #0
80062ce: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;
80062d2: 68fb ldr r3, [r7, #12]
80062d4: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
80062d8: 68fb ldr r3, [r7, #12]
80062da: f883 2414 strb.w r2, [r3, #1044] ; 0x414
if ((hdfu->wblock_num == 0U) && (hdfu->buffer.d8[0] == DFU_CMD_ERASE))
80062de: 68fb ldr r3, [r7, #12]
80062e0: f8d3 3400 ldr.w r3, [r3, #1024] ; 0x400
80062e4: 2b00 cmp r3, #0
80062e6: d110 bne.n 800630a <DFU_GetStatus+0x82>
80062e8: 68fb ldr r3, [r7, #12]
80062ea: 781b ldrb r3, [r3, #0]
80062ec: 2b41 cmp r3, #65 ; 0x41
80062ee: d10c bne.n 800630a <DFU_GetStatus+0x82>
((USBD_DFU_MediaTypeDef *)pdev->pUserData)->GetStatus(hdfu->data_ptr, DFU_MEDIA_ERASE, hdfu->dev_status);
80062f0: 687b ldr r3, [r7, #4]
80062f2: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
80062f6: 699b ldr r3, [r3, #24]
80062f8: 68fa ldr r2, [r7, #12]
80062fa: f8d2 0408 ldr.w r0, [r2, #1032] ; 0x408
80062fe: 68fa ldr r2, [r7, #12]
8006300: f502 6282 add.w r2, r2, #1040 ; 0x410
8006304: 2100 movs r1, #0
8006306: 4798 blx r3
break;
8006308: e061 b.n 80063ce <DFU_GetStatus+0x146>
((USBD_DFU_MediaTypeDef *)pdev->pUserData)->GetStatus(hdfu->data_ptr, DFU_MEDIA_PROGRAM, hdfu->dev_status);
800630a: 687b ldr r3, [r7, #4]
800630c: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
8006310: 699b ldr r3, [r3, #24]
8006312: 68fa ldr r2, [r7, #12]
8006314: f8d2 0408 ldr.w r0, [r2, #1032] ; 0x408
8006318: 68fa ldr r2, [r7, #12]
800631a: f502 6282 add.w r2, r2, #1040 ; 0x410
800631e: 2101 movs r1, #1
8006320: 4798 blx r3
break;
8006322: e054 b.n 80063ce <DFU_GetStatus+0x146>
hdfu->dev_state = DFU_STATE_DNLOAD_IDLE;
8006324: 68fb ldr r3, [r7, #12]
8006326: 2205 movs r2, #5
8006328: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[1] = 0U;
800632c: 68fb ldr r3, [r7, #12]
800632e: 2200 movs r2, #0
8006330: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
8006334: 68fb ldr r3, [r7, #12]
8006336: 2200 movs r2, #0
8006338: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U;
800633c: 68fb ldr r3, [r7, #12]
800633e: 2200 movs r2, #0
8006340: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;
8006344: 68fb ldr r3, [r7, #12]
8006346: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
800634a: 68fb ldr r3, [r7, #12]
800634c: f883 2414 strb.w r2, [r3, #1044] ; 0x414
break;
8006350: e03d b.n 80063ce <DFU_GetStatus+0x146>
if (hdfu->manif_state == DFU_MANIFEST_IN_PROGRESS)
8006352: 68fb ldr r3, [r7, #12]
8006354: f893 3419 ldrb.w r3, [r3, #1049] ; 0x419
8006358: 2b01 cmp r3, #1
800635a: d116 bne.n 800638a <DFU_GetStatus+0x102>
hdfu->dev_state = DFU_STATE_MANIFEST;
800635c: 68fb ldr r3, [r7, #12]
800635e: 2207 movs r2, #7
8006360: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[1] = 1U; /*bwPollTimeout = 1ms*/
8006364: 68fb ldr r3, [r7, #12]
8006366: 2201 movs r2, #1
8006368: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
800636c: 68fb ldr r3, [r7, #12]
800636e: 2200 movs r2, #0
8006370: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U;
8006374: 68fb ldr r3, [r7, #12]
8006376: 2200 movs r2, #0
8006378: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;
800637c: 68fb ldr r3, [r7, #12]
800637e: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
8006382: 68fb ldr r3, [r7, #12]
8006384: f883 2414 strb.w r2, [r3, #1044] ; 0x414
break;
8006388: e020 b.n 80063cc <DFU_GetStatus+0x144>
if ((hdfu->manif_state == DFU_MANIFEST_COMPLETE) &&
800638a: 68fb ldr r3, [r7, #12]
800638c: f893 3419 ldrb.w r3, [r3, #1049] ; 0x419
8006390: 2b00 cmp r3, #0
8006392: d11b bne.n 80063cc <DFU_GetStatus+0x144>
((USBD_DFU_CfgDesc[(11U + (9U * USBD_DFU_MAX_ITF_NUM))]) & 0x04U))
8006394: 4b14 ldr r3, [pc, #80] ; (80063e8 <DFU_GetStatus+0x160>)
8006396: 7d1b ldrb r3, [r3, #20]
8006398: f003 0304 and.w r3, r3, #4
if ((hdfu->manif_state == DFU_MANIFEST_COMPLETE) &&
800639c: 2b00 cmp r3, #0
800639e: d015 beq.n 80063cc <DFU_GetStatus+0x144>
hdfu->dev_state = DFU_STATE_IDLE;
80063a0: 68fb ldr r3, [r7, #12]
80063a2: 2202 movs r2, #2
80063a4: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[1] = 0U;
80063a8: 68fb ldr r3, [r7, #12]
80063aa: 2200 movs r2, #0
80063ac: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
80063b0: 68fb ldr r3, [r7, #12]
80063b2: 2200 movs r2, #0
80063b4: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U;
80063b8: 68fb ldr r3, [r7, #12]
80063ba: 2200 movs r2, #0
80063bc: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;
80063c0: 68fb ldr r3, [r7, #12]
80063c2: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
80063c6: 68fb ldr r3, [r7, #12]
80063c8: f883 2414 strb.w r2, [r3, #1044] ; 0x414
break;
80063cc: bf00 nop
}
/* Send the status data over EP0 */
USBD_CtlSendData(pdev, (uint8_t *)(&(hdfu->dev_status[0])), 6U);
80063ce: 68fb ldr r3, [r7, #12]
80063d0: f503 6382 add.w r3, r3, #1040 ; 0x410
80063d4: 2206 movs r2, #6
80063d6: 4619 mov r1, r3
80063d8: 6878 ldr r0, [r7, #4]
80063da: f001 f942 bl 8007662 <USBD_CtlSendData>
}
80063de: bf00 nop
80063e0: 3710 adds r7, #16
80063e2: 46bd mov sp, r7
80063e4: bd80 pop {r7, pc}
80063e6: bf00 nop
80063e8: 20000048 .word 0x20000048
080063ec <DFU_ClearStatus>:
* Handles the DFU CLRSTATUS request.
* @param pdev: device instance
* @retval status
*/
static void DFU_ClearStatus(USBD_HandleTypeDef *pdev)
{
80063ec: b480 push {r7}
80063ee: b085 sub sp, #20
80063f0: af00 add r7, sp, #0
80063f2: 6078 str r0, [r7, #4]
USBD_DFU_HandleTypeDef *hdfu;
hdfu = (USBD_DFU_HandleTypeDef *) pdev->pClassData;
80063f4: 687b ldr r3, [r7, #4]
80063f6: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80063fa: 60fb str r3, [r7, #12]
if (hdfu->dev_state == DFU_STATE_ERROR)
80063fc: 68fb ldr r3, [r7, #12]
80063fe: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
8006402: 2b0a cmp r3, #10
8006404: d11e bne.n 8006444 <DFU_ClearStatus+0x58>
{
hdfu->dev_state = DFU_STATE_IDLE;
8006406: 68fb ldr r3, [r7, #12]
8006408: 2202 movs r2, #2
800640a: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[0] = DFU_ERROR_NONE;/*bStatus*/
800640e: 68fb ldr r3, [r7, #12]
8006410: 2200 movs r2, #0
8006412: f883 2410 strb.w r2, [r3, #1040] ; 0x410
hdfu->dev_status[1] = 0U;
8006416: 68fb ldr r3, [r7, #12]
8006418: 2200 movs r2, #0
800641a: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
800641e: 68fb ldr r3, [r7, #12]
8006420: 2200 movs r2, #0
8006422: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U; /*bwPollTimeout=0ms*/
8006426: 68fb ldr r3, [r7, #12]
8006428: 2200 movs r2, #0
800642a: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;/*bState*/
800642e: 68fb ldr r3, [r7, #12]
8006430: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
8006434: 68fb ldr r3, [r7, #12]
8006436: f883 2414 strb.w r2, [r3, #1044] ; 0x414
hdfu->dev_status[5] = 0U;/*iString*/
800643a: 68fb ldr r3, [r7, #12]
800643c: 2200 movs r2, #0
800643e: f883 2415 strb.w r2, [r3, #1045] ; 0x415
hdfu->dev_status[2] = 0U;
hdfu->dev_status[3] = 0U; /*bwPollTimeout=0ms*/
hdfu->dev_status[4] = hdfu->dev_state;/*bState*/
hdfu->dev_status[5] = 0U;/*iString*/
}
}
8006442: e01d b.n 8006480 <DFU_ClearStatus+0x94>
hdfu->dev_state = DFU_STATE_ERROR;
8006444: 68fb ldr r3, [r7, #12]
8006446: 220a movs r2, #10
8006448: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[0] = DFU_ERROR_UNKNOWN;/*bStatus*/
800644c: 68fb ldr r3, [r7, #12]
800644e: 220e movs r2, #14
8006450: f883 2410 strb.w r2, [r3, #1040] ; 0x410
hdfu->dev_status[1] = 0U;
8006454: 68fb ldr r3, [r7, #12]
8006456: 2200 movs r2, #0
8006458: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
800645c: 68fb ldr r3, [r7, #12]
800645e: 2200 movs r2, #0
8006460: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U; /*bwPollTimeout=0ms*/
8006464: 68fb ldr r3, [r7, #12]
8006466: 2200 movs r2, #0
8006468: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;/*bState*/
800646c: 68fb ldr r3, [r7, #12]
800646e: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
8006472: 68fb ldr r3, [r7, #12]
8006474: f883 2414 strb.w r2, [r3, #1044] ; 0x414
hdfu->dev_status[5] = 0U;/*iString*/
8006478: 68fb ldr r3, [r7, #12]
800647a: 2200 movs r2, #0
800647c: f883 2415 strb.w r2, [r3, #1045] ; 0x415
}
8006480: bf00 nop
8006482: 3714 adds r7, #20
8006484: 46bd mov sp, r7
8006486: bc80 pop {r7}
8006488: 4770 bx lr
0800648a <DFU_GetState>:
* Handles the DFU GETSTATE request.
* @param pdev: device instance
* @retval None
*/
static void DFU_GetState(USBD_HandleTypeDef *pdev)
{
800648a: b580 push {r7, lr}
800648c: b084 sub sp, #16
800648e: af00 add r7, sp, #0
8006490: 6078 str r0, [r7, #4]
USBD_DFU_HandleTypeDef *hdfu;
hdfu = (USBD_DFU_HandleTypeDef *) pdev->pClassData;
8006492: 687b ldr r3, [r7, #4]
8006494: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8006498: 60fb str r3, [r7, #12]
/* Return the current state of the DFU interface */
USBD_CtlSendData(pdev, &hdfu->dev_state, 1U);
800649a: 68fb ldr r3, [r7, #12]
800649c: f503 6383 add.w r3, r3, #1048 ; 0x418
80064a0: 2201 movs r2, #1
80064a2: 4619 mov r1, r3
80064a4: 6878 ldr r0, [r7, #4]
80064a6: f001 f8dc bl 8007662 <USBD_CtlSendData>
}
80064aa: bf00 nop
80064ac: 3710 adds r7, #16
80064ae: 46bd mov sp, r7
80064b0: bd80 pop {r7, pc}
080064b2 <DFU_Abort>:
* Handles the DFU ABORT request.
* @param pdev: device instance
* @retval None
*/
static void DFU_Abort(USBD_HandleTypeDef *pdev)
{
80064b2: b480 push {r7}
80064b4: b085 sub sp, #20
80064b6: af00 add r7, sp, #0
80064b8: 6078 str r0, [r7, #4]
USBD_DFU_HandleTypeDef *hdfu;
hdfu = (USBD_DFU_HandleTypeDef *) pdev->pClassData;
80064ba: 687b ldr r3, [r7, #4]
80064bc: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
80064c0: 60fb str r3, [r7, #12]
if (hdfu->dev_state == DFU_STATE_IDLE || hdfu->dev_state == DFU_STATE_DNLOAD_SYNC
80064c2: 68fb ldr r3, [r7, #12]
80064c4: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
80064c8: 2b02 cmp r3, #2
80064ca: d013 beq.n 80064f4 <DFU_Abort+0x42>
80064cc: 68fb ldr r3, [r7, #12]
80064ce: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
80064d2: 2b03 cmp r3, #3
80064d4: d00e beq.n 80064f4 <DFU_Abort+0x42>
|| hdfu->dev_state == DFU_STATE_DNLOAD_IDLE || hdfu->dev_state == DFU_STATE_MANIFEST_SYNC
80064d6: 68fb ldr r3, [r7, #12]
80064d8: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
80064dc: 2b05 cmp r3, #5
80064de: d009 beq.n 80064f4 <DFU_Abort+0x42>
80064e0: 68fb ldr r3, [r7, #12]
80064e2: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
80064e6: 2b06 cmp r3, #6
80064e8: d004 beq.n 80064f4 <DFU_Abort+0x42>
|| hdfu->dev_state == DFU_STATE_UPLOAD_IDLE)
80064ea: 68fb ldr r3, [r7, #12]
80064ec: f893 3418 ldrb.w r3, [r3, #1048] ; 0x418
80064f0: 2b09 cmp r3, #9
80064f2: d125 bne.n 8006540 <DFU_Abort+0x8e>
{
hdfu->dev_state = DFU_STATE_IDLE;
80064f4: 68fb ldr r3, [r7, #12]
80064f6: 2202 movs r2, #2
80064f8: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[0] = DFU_ERROR_NONE;
80064fc: 68fb ldr r3, [r7, #12]
80064fe: 2200 movs r2, #0
8006500: f883 2410 strb.w r2, [r3, #1040] ; 0x410
hdfu->dev_status[1] = 0U;
8006504: 68fb ldr r3, [r7, #12]
8006506: 2200 movs r2, #0
8006508: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
800650c: 68fb ldr r3, [r7, #12]
800650e: 2200 movs r2, #0
8006510: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U; /*bwPollTimeout=0ms*/
8006514: 68fb ldr r3, [r7, #12]
8006516: 2200 movs r2, #0
8006518: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;
800651c: 68fb ldr r3, [r7, #12]
800651e: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
8006522: 68fb ldr r3, [r7, #12]
8006524: f883 2414 strb.w r2, [r3, #1044] ; 0x414
hdfu->dev_status[5] = 0U; /*iString*/
8006528: 68fb ldr r3, [r7, #12]
800652a: 2200 movs r2, #0
800652c: f883 2415 strb.w r2, [r3, #1045] ; 0x415
hdfu->wblock_num = 0U;
8006530: 68fb ldr r3, [r7, #12]
8006532: 2200 movs r2, #0
8006534: f8c3 2400 str.w r2, [r3, #1024] ; 0x400
hdfu->wlength = 0U;
8006538: 68fb ldr r3, [r7, #12]
800653a: 2200 movs r2, #0
800653c: f8c3 2404 str.w r2, [r3, #1028] ; 0x404
}
}
8006540: bf00 nop
8006542: 3714 adds r7, #20
8006544: 46bd mov sp, r7
8006546: bc80 pop {r7}
8006548: 4770 bx lr
...
0800654c <DFU_Leave>:
* and resets device to jump to user loaded code).
* @param pdev: device instance
* @retval None
*/
static void DFU_Leave(USBD_HandleTypeDef *pdev)
{
800654c: b580 push {r7, lr}
800654e: b084 sub sp, #16
8006550: af00 add r7, sp, #0
8006552: 6078 str r0, [r7, #4]
USBD_DFU_HandleTypeDef *hdfu;
hdfu = (USBD_DFU_HandleTypeDef *) pdev->pClassData;
8006554: 687b ldr r3, [r7, #4]
8006556: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
800655a: 60fb str r3, [r7, #12]
hdfu->manif_state = DFU_MANIFEST_COMPLETE;
800655c: 68fb ldr r3, [r7, #12]
800655e: 2200 movs r2, #0
8006560: f883 2419 strb.w r2, [r3, #1049] ; 0x419
if ((USBD_DFU_CfgDesc[(11U + (9U * USBD_DFU_MAX_ITF_NUM))]) & 0x04U)
8006564: 4b1f ldr r3, [pc, #124] ; (80065e4 <DFU_Leave+0x98>)
8006566: 7d1b ldrb r3, [r3, #20]
8006568: f003 0304 and.w r3, r3, #4
800656c: 2b00 cmp r3, #0
800656e: d016 beq.n 800659e <DFU_Leave+0x52>
{
hdfu->dev_state = DFU_STATE_MANIFEST_SYNC;
8006570: 68fb ldr r3, [r7, #12]
8006572: 2206 movs r2, #6
8006574: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[1] = 0U;
8006578: 68fb ldr r3, [r7, #12]
800657a: 2200 movs r2, #0
800657c: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
8006580: 68fb ldr r3, [r7, #12]
8006582: 2200 movs r2, #0
8006584: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U;
8006588: 68fb ldr r3, [r7, #12]
800658a: 2200 movs r2, #0
800658c: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;
8006590: 68fb ldr r3, [r7, #12]
8006592: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
8006596: 68fb ldr r3, [r7, #12]
8006598: f883 2414 strb.w r2, [r3, #1044] ; 0x414
return;
800659c: e01f b.n 80065de <DFU_Leave+0x92>
}
else
{
hdfu->dev_state = DFU_STATE_MANIFEST_WAIT_RESET;
800659e: 68fb ldr r3, [r7, #12]
80065a0: 2208 movs r2, #8
80065a2: f883 2418 strb.w r2, [r3, #1048] ; 0x418
hdfu->dev_status[1] = 0U;
80065a6: 68fb ldr r3, [r7, #12]
80065a8: 2200 movs r2, #0
80065aa: f883 2411 strb.w r2, [r3, #1041] ; 0x411
hdfu->dev_status[2] = 0U;
80065ae: 68fb ldr r3, [r7, #12]
80065b0: 2200 movs r2, #0
80065b2: f883 2412 strb.w r2, [r3, #1042] ; 0x412
hdfu->dev_status[3] = 0U;
80065b6: 68fb ldr r3, [r7, #12]
80065b8: 2200 movs r2, #0
80065ba: f883 2413 strb.w r2, [r3, #1043] ; 0x413
hdfu->dev_status[4] = hdfu->dev_state;
80065be: 68fb ldr r3, [r7, #12]
80065c0: f893 2418 ldrb.w r2, [r3, #1048] ; 0x418
80065c4: 68fb ldr r3, [r7, #12]
80065c6: f883 2414 strb.w r2, [r3, #1044] ; 0x414
/* Disconnect the USB device */
USBD_Stop(pdev);
80065ca: 6878 ldr r0, [r7, #4]
80065cc: f000 f85c bl 8006688 <USBD_Stop>
/* DeInitilialize the MAL(Media Access Layer) */
((USBD_DFU_MediaTypeDef *)pdev->pUserData)->DeInit();
80065d0: 687b ldr r3, [r7, #4]
80065d2: f8d3 32bc ldr.w r3, [r3, #700] ; 0x2bc
80065d6: 689b ldr r3, [r3, #8]
80065d8: 4798 blx r3
/* Generate system reset to allow jumping to the user code */
NVIC_SystemReset();
80065da: f7ff f9ab bl 8005934 <__NVIC_SystemReset>
/* The next instructions will not be reached (system reset) */
}
}
80065de: 3710 adds r7, #16
80065e0: 46bd mov sp, r7
80065e2: bd80 pop {r7, pc}
80065e4: 20000048 .word 0x20000048
080065e8 <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
80065e8: b580 push {r7, lr}
80065ea: b084 sub sp, #16
80065ec: af00 add r7, sp, #0
80065ee: 60f8 str r0, [r7, #12]
80065f0: 60b9 str r1, [r7, #8]
80065f2: 4613 mov r3, r2
80065f4: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
80065f6: 68fb ldr r3, [r7, #12]
80065f8: 2b00 cmp r3, #0
80065fa: d101 bne.n 8006600 <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
80065fc: 2302 movs r3, #2
80065fe: e01a b.n 8006636 <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
8006600: 68fb ldr r3, [r7, #12]
8006602: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006606: 2b00 cmp r3, #0
8006608: d003 beq.n 8006612 <USBD_Init+0x2a>
{
pdev->pClass = NULL;
800660a: 68fb ldr r3, [r7, #12]
800660c: 2200 movs r2, #0
800660e: f8c3 22b4 str.w r2, [r3, #692] ; 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
8006612: 68bb ldr r3, [r7, #8]
8006614: 2b00 cmp r3, #0
8006616: d003 beq.n 8006620 <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
8006618: 68fb ldr r3, [r7, #12]
800661a: 68ba ldr r2, [r7, #8]
800661c: f8c3 22b0 str.w r2, [r3, #688] ; 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
8006620: 68fb ldr r3, [r7, #12]
8006622: 2201 movs r2, #1
8006624: f883 229c strb.w r2, [r3, #668] ; 0x29c
pdev->id = id;
8006628: 68fb ldr r3, [r7, #12]
800662a: 79fa ldrb r2, [r7, #7]
800662c: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
800662e: 68f8 ldr r0, [r7, #12]
8006630: f001 fadc bl 8007bec <USBD_LL_Init>
return USBD_OK;
8006634: 2300 movs r3, #0
}
8006636: 4618 mov r0, r3
8006638: 3710 adds r7, #16
800663a: 46bd mov sp, r7
800663c: bd80 pop {r7, pc}
0800663e <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
800663e: b480 push {r7}
8006640: b085 sub sp, #20
8006642: af00 add r7, sp, #0
8006644: 6078 str r0, [r7, #4]
8006646: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
8006648: 2300 movs r3, #0
800664a: 73fb strb r3, [r7, #15]
if (pclass != NULL)
800664c: 683b ldr r3, [r7, #0]
800664e: 2b00 cmp r3, #0
8006650: d006 beq.n 8006660 <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
8006652: 687b ldr r3, [r7, #4]
8006654: 683a ldr r2, [r7, #0]
8006656: f8c3 22b4 str.w r2, [r3, #692] ; 0x2b4
status = USBD_OK;
800665a: 2300 movs r3, #0
800665c: 73fb strb r3, [r7, #15]
800665e: e001 b.n 8006664 <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
8006660: 2302 movs r3, #2
8006662: 73fb strb r3, [r7, #15]
}
return status;
8006664: 7bfb ldrb r3, [r7, #15]
}
8006666: 4618 mov r0, r3
8006668: 3714 adds r7, #20
800666a: 46bd mov sp, r7
800666c: bc80 pop {r7}
800666e: 4770 bx lr
08006670 <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
8006670: b580 push {r7, lr}
8006672: b082 sub sp, #8
8006674: af00 add r7, sp, #0
8006676: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
8006678: 6878 ldr r0, [r7, #4]
800667a: f001 faf7 bl 8007c6c <USBD_LL_Start>
return USBD_OK;
800667e: 2300 movs r3, #0
}
8006680: 4618 mov r0, r3
8006682: 3708 adds r7, #8
8006684: 46bd mov sp, r7
8006686: bd80 pop {r7, pc}
08006688 <USBD_Stop>:
* Stop the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Stop(USBD_HandleTypeDef *pdev)
{
8006688: b580 push {r7, lr}
800668a: b082 sub sp, #8
800668c: af00 add r7, sp, #0
800668e: 6078 str r0, [r7, #4]
/* Free Class Resources */
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
8006690: 687b ldr r3, [r7, #4]
8006692: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006696: 685b ldr r3, [r3, #4]
8006698: 687a ldr r2, [r7, #4]
800669a: 6852 ldr r2, [r2, #4]
800669c: b2d2 uxtb r2, r2
800669e: 4611 mov r1, r2
80066a0: 6878 ldr r0, [r7, #4]
80066a2: 4798 blx r3
/* Stop the low level driver */
USBD_LL_Stop(pdev);
80066a4: 6878 ldr r0, [r7, #4]
80066a6: f001 fafc bl 8007ca2 <USBD_LL_Stop>
return USBD_OK;
80066aa: 2300 movs r3, #0
}
80066ac: 4618 mov r0, r3
80066ae: 3708 adds r7, #8
80066b0: 46bd mov sp, r7
80066b2: bd80 pop {r7, pc}
080066b4 <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
80066b4: b480 push {r7}
80066b6: b083 sub sp, #12
80066b8: af00 add r7, sp, #0
80066ba: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
80066bc: 2300 movs r3, #0
}
80066be: 4618 mov r0, r3
80066c0: 370c adds r7, #12
80066c2: 46bd mov sp, r7
80066c4: bc80 pop {r7}
80066c6: 4770 bx lr
080066c8 <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
80066c8: b580 push {r7, lr}
80066ca: b084 sub sp, #16
80066cc: af00 add r7, sp, #0
80066ce: 6078 str r0, [r7, #4]
80066d0: 460b mov r3, r1
80066d2: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
80066d4: 2302 movs r3, #2
80066d6: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
80066d8: 687b ldr r3, [r7, #4]
80066da: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80066de: 2b00 cmp r3, #0
80066e0: d00c beq.n 80066fc <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
80066e2: 687b ldr r3, [r7, #4]
80066e4: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80066e8: 681b ldr r3, [r3, #0]
80066ea: 78fa ldrb r2, [r7, #3]
80066ec: 4611 mov r1, r2
80066ee: 6878 ldr r0, [r7, #4]
80066f0: 4798 blx r3
80066f2: 4603 mov r3, r0
80066f4: 2b00 cmp r3, #0
80066f6: d101 bne.n 80066fc <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
80066f8: 2300 movs r3, #0
80066fa: 73fb strb r3, [r7, #15]
}
}
return ret;
80066fc: 7bfb ldrb r3, [r7, #15]
}
80066fe: 4618 mov r0, r3
8006700: 3710 adds r7, #16
8006702: 46bd mov sp, r7
8006704: bd80 pop {r7, pc}
08006706 <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8006706: b580 push {r7, lr}
8006708: b082 sub sp, #8
800670a: af00 add r7, sp, #0
800670c: 6078 str r0, [r7, #4]
800670e: 460b mov r3, r1
8006710: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
8006712: 687b ldr r3, [r7, #4]
8006714: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006718: 685b ldr r3, [r3, #4]
800671a: 78fa ldrb r2, [r7, #3]
800671c: 4611 mov r1, r2
800671e: 6878 ldr r0, [r7, #4]
8006720: 4798 blx r3
return USBD_OK;
8006722: 2300 movs r3, #0
}
8006724: 4618 mov r0, r3
8006726: 3708 adds r7, #8
8006728: 46bd mov sp, r7
800672a: bd80 pop {r7, pc}
0800672c <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
800672c: b580 push {r7, lr}
800672e: b082 sub sp, #8
8006730: af00 add r7, sp, #0
8006732: 6078 str r0, [r7, #4]
8006734: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
8006736: 687b ldr r3, [r7, #4]
8006738: f503 732a add.w r3, r3, #680 ; 0x2a8
800673c: 6839 ldr r1, [r7, #0]
800673e: 4618 mov r0, r3
8006740: f000 fee9 bl 8007516 <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
8006744: 687b ldr r3, [r7, #4]
8006746: 2201 movs r2, #1
8006748: f8c3 2294 str.w r2, [r3, #660] ; 0x294
pdev->ep0_data_len = pdev->request.wLength;
800674c: 687b ldr r3, [r7, #4]
800674e: f8b3 32ae ldrh.w r3, [r3, #686] ; 0x2ae
8006752: 461a mov r2, r3
8006754: 687b ldr r3, [r7, #4]
8006756: f8c3 2298 str.w r2, [r3, #664] ; 0x298
switch (pdev->request.bmRequest & 0x1FU)
800675a: 687b ldr r3, [r7, #4]
800675c: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
8006760: f003 031f and.w r3, r3, #31
8006764: 2b02 cmp r3, #2
8006766: d016 beq.n 8006796 <USBD_LL_SetupStage+0x6a>
8006768: 2b02 cmp r3, #2
800676a: d81c bhi.n 80067a6 <USBD_LL_SetupStage+0x7a>
800676c: 2b00 cmp r3, #0
800676e: d002 beq.n 8006776 <USBD_LL_SetupStage+0x4a>
8006770: 2b01 cmp r3, #1
8006772: d008 beq.n 8006786 <USBD_LL_SetupStage+0x5a>
8006774: e017 b.n 80067a6 <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
8006776: 687b ldr r3, [r7, #4]
8006778: f503 732a add.w r3, r3, #680 ; 0x2a8
800677c: 4619 mov r1, r3
800677e: 6878 ldr r0, [r7, #4]
8006780: f000 f9ca bl 8006b18 <USBD_StdDevReq>
break;
8006784: e01a b.n 80067bc <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
8006786: 687b ldr r3, [r7, #4]
8006788: f503 732a add.w r3, r3, #680 ; 0x2a8
800678c: 4619 mov r1, r3
800678e: 6878 ldr r0, [r7, #4]
8006790: f000 fa2c bl 8006bec <USBD_StdItfReq>
break;
8006794: e012 b.n 80067bc <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
8006796: 687b ldr r3, [r7, #4]
8006798: f503 732a add.w r3, r3, #680 ; 0x2a8
800679c: 4619 mov r1, r3
800679e: 6878 ldr r0, [r7, #4]
80067a0: f000 fa6c bl 8006c7c <USBD_StdEPReq>
break;
80067a4: e00a b.n 80067bc <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
80067a6: 687b ldr r3, [r7, #4]
80067a8: f893 32a8 ldrb.w r3, [r3, #680] ; 0x2a8
80067ac: f023 037f bic.w r3, r3, #127 ; 0x7f
80067b0: b2db uxtb r3, r3
80067b2: 4619 mov r1, r3
80067b4: 6878 ldr r0, [r7, #4]
80067b6: f001 fab5 bl 8007d24 <USBD_LL_StallEP>
break;
80067ba: bf00 nop
}
return USBD_OK;
80067bc: 2300 movs r3, #0
}
80067be: 4618 mov r0, r3
80067c0: 3708 adds r7, #8
80067c2: 46bd mov sp, r7
80067c4: bd80 pop {r7, pc}
080067c6 <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
80067c6: b580 push {r7, lr}
80067c8: b086 sub sp, #24
80067ca: af00 add r7, sp, #0
80067cc: 60f8 str r0, [r7, #12]
80067ce: 460b mov r3, r1
80067d0: 607a str r2, [r7, #4]
80067d2: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
80067d4: 7afb ldrb r3, [r7, #11]
80067d6: 2b00 cmp r3, #0
80067d8: d14b bne.n 8006872 <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
80067da: 68fb ldr r3, [r7, #12]
80067dc: f503 73aa add.w r3, r3, #340 ; 0x154
80067e0: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
80067e2: 68fb ldr r3, [r7, #12]
80067e4: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
80067e8: 2b03 cmp r3, #3
80067ea: d134 bne.n 8006856 <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
80067ec: 697b ldr r3, [r7, #20]
80067ee: 68da ldr r2, [r3, #12]
80067f0: 697b ldr r3, [r7, #20]
80067f2: 691b ldr r3, [r3, #16]
80067f4: 429a cmp r2, r3
80067f6: d919 bls.n 800682c <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
80067f8: 697b ldr r3, [r7, #20]
80067fa: 68da ldr r2, [r3, #12]
80067fc: 697b ldr r3, [r7, #20]
80067fe: 691b ldr r3, [r3, #16]
8006800: 1ad2 subs r2, r2, r3
8006802: 697b ldr r3, [r7, #20]
8006804: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8006806: 697b ldr r3, [r7, #20]
8006808: 68da ldr r2, [r3, #12]
800680a: 697b ldr r3, [r7, #20]
800680c: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800680e: 429a cmp r2, r3
8006810: d203 bcs.n 800681a <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8006812: 697b ldr r3, [r7, #20]
8006814: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
8006816: b29b uxth r3, r3
8006818: e002 b.n 8006820 <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800681a: 697b ldr r3, [r7, #20]
800681c: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800681e: b29b uxth r3, r3
8006820: 461a mov r2, r3
8006822: 6879 ldr r1, [r7, #4]
8006824: 68f8 ldr r0, [r7, #12]
8006826: f000 ff68 bl 80076fa <USBD_CtlContinueRx>
800682a: e038 b.n 800689e <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
800682c: 68fb ldr r3, [r7, #12]
800682e: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006832: 691b ldr r3, [r3, #16]
8006834: 2b00 cmp r3, #0
8006836: d00a beq.n 800684e <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8006838: 68fb ldr r3, [r7, #12]
800683a: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
800683e: 2b03 cmp r3, #3
8006840: d105 bne.n 800684e <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
8006842: 68fb ldr r3, [r7, #12]
8006844: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006848: 691b ldr r3, [r3, #16]
800684a: 68f8 ldr r0, [r7, #12]
800684c: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
800684e: 68f8 ldr r0, [r7, #12]
8006850: f000 ff65 bl 800771e <USBD_CtlSendStatus>
8006854: e023 b.n 800689e <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
8006856: 68fb ldr r3, [r7, #12]
8006858: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
800685c: 2b05 cmp r3, #5
800685e: d11e bne.n 800689e <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
8006860: 68fb ldr r3, [r7, #12]
8006862: 2200 movs r2, #0
8006864: f8c3 2294 str.w r2, [r3, #660] ; 0x294
USBD_LL_StallEP(pdev, 0U);
8006868: 2100 movs r1, #0
800686a: 68f8 ldr r0, [r7, #12]
800686c: f001 fa5a bl 8007d24 <USBD_LL_StallEP>
8006870: e015 b.n 800689e <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
8006872: 68fb ldr r3, [r7, #12]
8006874: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006878: 699b ldr r3, [r3, #24]
800687a: 2b00 cmp r3, #0
800687c: d00d beq.n 800689a <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800687e: 68fb ldr r3, [r7, #12]
8006880: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
8006884: 2b03 cmp r3, #3
8006886: d108 bne.n 800689a <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
8006888: 68fb ldr r3, [r7, #12]
800688a: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
800688e: 699b ldr r3, [r3, #24]
8006890: 7afa ldrb r2, [r7, #11]
8006892: 4611 mov r1, r2
8006894: 68f8 ldr r0, [r7, #12]
8006896: 4798 blx r3
8006898: e001 b.n 800689e <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800689a: 2302 movs r3, #2
800689c: e000 b.n 80068a0 <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
800689e: 2300 movs r3, #0
}
80068a0: 4618 mov r0, r3
80068a2: 3718 adds r7, #24
80068a4: 46bd mov sp, r7
80068a6: bd80 pop {r7, pc}
080068a8 <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
80068a8: b580 push {r7, lr}
80068aa: b086 sub sp, #24
80068ac: af00 add r7, sp, #0
80068ae: 60f8 str r0, [r7, #12]
80068b0: 460b mov r3, r1
80068b2: 607a str r2, [r7, #4]
80068b4: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
80068b6: 7afb ldrb r3, [r7, #11]
80068b8: 2b00 cmp r3, #0
80068ba: d17f bne.n 80069bc <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
80068bc: 68fb ldr r3, [r7, #12]
80068be: 3314 adds r3, #20
80068c0: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
80068c2: 68fb ldr r3, [r7, #12]
80068c4: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
80068c8: 2b02 cmp r3, #2
80068ca: d15c bne.n 8006986 <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
80068cc: 697b ldr r3, [r7, #20]
80068ce: 68da ldr r2, [r3, #12]
80068d0: 697b ldr r3, [r7, #20]
80068d2: 691b ldr r3, [r3, #16]
80068d4: 429a cmp r2, r3
80068d6: d915 bls.n 8006904 <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
80068d8: 697b ldr r3, [r7, #20]
80068da: 68da ldr r2, [r3, #12]
80068dc: 697b ldr r3, [r7, #20]
80068de: 691b ldr r3, [r3, #16]
80068e0: 1ad2 subs r2, r2, r3
80068e2: 697b ldr r3, [r7, #20]
80068e4: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
80068e6: 697b ldr r3, [r7, #20]
80068e8: 68db ldr r3, [r3, #12]
80068ea: b29b uxth r3, r3
80068ec: 461a mov r2, r3
80068ee: 6879 ldr r1, [r7, #4]
80068f0: 68f8 ldr r0, [r7, #12]
80068f2: f000 fed2 bl 800769a <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
80068f6: 2300 movs r3, #0
80068f8: 2200 movs r2, #0
80068fa: 2100 movs r1, #0
80068fc: 68f8 ldr r0, [r7, #12]
80068fe: f001 fabd bl 8007e7c <USBD_LL_PrepareReceive>
8006902: e04e b.n 80069a2 <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
8006904: 697b ldr r3, [r7, #20]
8006906: 689b ldr r3, [r3, #8]
8006908: 697a ldr r2, [r7, #20]
800690a: 6912 ldr r2, [r2, #16]
800690c: fbb3 f1f2 udiv r1, r3, r2
8006910: fb02 f201 mul.w r2, r2, r1
8006914: 1a9b subs r3, r3, r2
8006916: 2b00 cmp r3, #0
8006918: d11c bne.n 8006954 <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
800691a: 697b ldr r3, [r7, #20]
800691c: 689a ldr r2, [r3, #8]
800691e: 697b ldr r3, [r7, #20]
8006920: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
8006922: 429a cmp r2, r3
8006924: d316 bcc.n 8006954 <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
8006926: 697b ldr r3, [r7, #20]
8006928: 689a ldr r2, [r3, #8]
800692a: 68fb ldr r3, [r7, #12]
800692c: f8d3 3298 ldr.w r3, [r3, #664] ; 0x298
(pep->total_length >= pep->maxpacket) &&
8006930: 429a cmp r2, r3
8006932: d20f bcs.n 8006954 <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
8006934: 2200 movs r2, #0
8006936: 2100 movs r1, #0
8006938: 68f8 ldr r0, [r7, #12]
800693a: f000 feae bl 800769a <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
800693e: 68fb ldr r3, [r7, #12]
8006940: 2200 movs r2, #0
8006942: f8c3 2298 str.w r2, [r3, #664] ; 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8006946: 2300 movs r3, #0
8006948: 2200 movs r2, #0
800694a: 2100 movs r1, #0
800694c: 68f8 ldr r0, [r7, #12]
800694e: f001 fa95 bl 8007e7c <USBD_LL_PrepareReceive>
8006952: e026 b.n 80069a2 <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
8006954: 68fb ldr r3, [r7, #12]
8006956: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
800695a: 68db ldr r3, [r3, #12]
800695c: 2b00 cmp r3, #0
800695e: d00a beq.n 8006976 <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8006960: 68fb ldr r3, [r7, #12]
8006962: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
8006966: 2b03 cmp r3, #3
8006968: d105 bne.n 8006976 <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
800696a: 68fb ldr r3, [r7, #12]
800696c: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006970: 68db ldr r3, [r3, #12]
8006972: 68f8 ldr r0, [r7, #12]
8006974: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
8006976: 2180 movs r1, #128 ; 0x80
8006978: 68f8 ldr r0, [r7, #12]
800697a: f001 f9d3 bl 8007d24 <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
800697e: 68f8 ldr r0, [r7, #12]
8006980: f000 fee0 bl 8007744 <USBD_CtlReceiveStatus>
8006984: e00d b.n 80069a2 <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
8006986: 68fb ldr r3, [r7, #12]
8006988: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
800698c: 2b04 cmp r3, #4
800698e: d004 beq.n 800699a <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
8006990: 68fb ldr r3, [r7, #12]
8006992: f8d3 3294 ldr.w r3, [r3, #660] ; 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
8006996: 2b00 cmp r3, #0
8006998: d103 bne.n 80069a2 <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
800699a: 2180 movs r1, #128 ; 0x80
800699c: 68f8 ldr r0, [r7, #12]
800699e: f001 f9c1 bl 8007d24 <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
80069a2: 68fb ldr r3, [r7, #12]
80069a4: f893 32a0 ldrb.w r3, [r3, #672] ; 0x2a0
80069a8: 2b01 cmp r3, #1
80069aa: d11d bne.n 80069e8 <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
80069ac: 68f8 ldr r0, [r7, #12]
80069ae: f7ff fe81 bl 80066b4 <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
80069b2: 68fb ldr r3, [r7, #12]
80069b4: 2200 movs r2, #0
80069b6: f883 22a0 strb.w r2, [r3, #672] ; 0x2a0
80069ba: e015 b.n 80069e8 <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
80069bc: 68fb ldr r3, [r7, #12]
80069be: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80069c2: 695b ldr r3, [r3, #20]
80069c4: 2b00 cmp r3, #0
80069c6: d00d beq.n 80069e4 <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
80069c8: 68fb ldr r3, [r7, #12]
80069ca: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
80069ce: 2b03 cmp r3, #3
80069d0: d108 bne.n 80069e4 <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
80069d2: 68fb ldr r3, [r7, #12]
80069d4: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80069d8: 695b ldr r3, [r3, #20]
80069da: 7afa ldrb r2, [r7, #11]
80069dc: 4611 mov r1, r2
80069de: 68f8 ldr r0, [r7, #12]
80069e0: 4798 blx r3
80069e2: e001 b.n 80069e8 <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
80069e4: 2302 movs r3, #2
80069e6: e000 b.n 80069ea <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
80069e8: 2300 movs r3, #0
}
80069ea: 4618 mov r0, r3
80069ec: 3718 adds r7, #24
80069ee: 46bd mov sp, r7
80069f0: bd80 pop {r7, pc}
080069f2 <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
80069f2: b580 push {r7, lr}
80069f4: b082 sub sp, #8
80069f6: af00 add r7, sp, #0
80069f8: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
80069fa: 2340 movs r3, #64 ; 0x40
80069fc: 2200 movs r2, #0
80069fe: 2100 movs r1, #0
8006a00: 6878 ldr r0, [r7, #4]
8006a02: f001 f969 bl 8007cd8 <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
8006a06: 687b ldr r3, [r7, #4]
8006a08: 2201 movs r2, #1
8006a0a: f8c3 2158 str.w r2, [r3, #344] ; 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
8006a0e: 687b ldr r3, [r7, #4]
8006a10: 2240 movs r2, #64 ; 0x40
8006a12: f8c3 2164 str.w r2, [r3, #356] ; 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
8006a16: 2340 movs r3, #64 ; 0x40
8006a18: 2200 movs r2, #0
8006a1a: 2180 movs r1, #128 ; 0x80
8006a1c: 6878 ldr r0, [r7, #4]
8006a1e: f001 f95b bl 8007cd8 <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
8006a22: 687b ldr r3, [r7, #4]
8006a24: 2201 movs r2, #1
8006a26: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
8006a28: 687b ldr r3, [r7, #4]
8006a2a: 2240 movs r2, #64 ; 0x40
8006a2c: 625a str r2, [r3, #36] ; 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
8006a2e: 687b ldr r3, [r7, #4]
8006a30: 2201 movs r2, #1
8006a32: f883 229c strb.w r2, [r3, #668] ; 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
8006a36: 687b ldr r3, [r7, #4]
8006a38: 2200 movs r2, #0
8006a3a: f8c3 2294 str.w r2, [r3, #660] ; 0x294
pdev->dev_config = 0U;
8006a3e: 687b ldr r3, [r7, #4]
8006a40: 2200 movs r2, #0
8006a42: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
8006a44: 687b ldr r3, [r7, #4]
8006a46: 2200 movs r2, #0
8006a48: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
if (pdev->pClassData)
8006a4c: 687b ldr r3, [r7, #4]
8006a4e: f8d3 32b8 ldr.w r3, [r3, #696] ; 0x2b8
8006a52: 2b00 cmp r3, #0
8006a54: d009 beq.n 8006a6a <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
8006a56: 687b ldr r3, [r7, #4]
8006a58: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006a5c: 685b ldr r3, [r3, #4]
8006a5e: 687a ldr r2, [r7, #4]
8006a60: 6852 ldr r2, [r2, #4]
8006a62: b2d2 uxtb r2, r2
8006a64: 4611 mov r1, r2
8006a66: 6878 ldr r0, [r7, #4]
8006a68: 4798 blx r3
}
return USBD_OK;
8006a6a: 2300 movs r3, #0
}
8006a6c: 4618 mov r0, r3
8006a6e: 3708 adds r7, #8
8006a70: 46bd mov sp, r7
8006a72: bd80 pop {r7, pc}
08006a74 <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
8006a74: b480 push {r7}
8006a76: b083 sub sp, #12
8006a78: af00 add r7, sp, #0
8006a7a: 6078 str r0, [r7, #4]
8006a7c: 460b mov r3, r1
8006a7e: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
8006a80: 687b ldr r3, [r7, #4]
8006a82: 78fa ldrb r2, [r7, #3]
8006a84: 741a strb r2, [r3, #16]
return USBD_OK;
8006a86: 2300 movs r3, #0
}
8006a88: 4618 mov r0, r3
8006a8a: 370c adds r7, #12
8006a8c: 46bd mov sp, r7
8006a8e: bc80 pop {r7}
8006a90: 4770 bx lr
08006a92 <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
8006a92: b480 push {r7}
8006a94: b083 sub sp, #12
8006a96: af00 add r7, sp, #0
8006a98: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
8006a9a: 687b ldr r3, [r7, #4]
8006a9c: f893 229c ldrb.w r2, [r3, #668] ; 0x29c
8006aa0: 687b ldr r3, [r7, #4]
8006aa2: f883 229d strb.w r2, [r3, #669] ; 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
8006aa6: 687b ldr r3, [r7, #4]
8006aa8: 2204 movs r2, #4
8006aaa: f883 229c strb.w r2, [r3, #668] ; 0x29c
return USBD_OK;
8006aae: 2300 movs r3, #0
}
8006ab0: 4618 mov r0, r3
8006ab2: 370c adds r7, #12
8006ab4: 46bd mov sp, r7
8006ab6: bc80 pop {r7}
8006ab8: 4770 bx lr
08006aba <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
8006aba: b480 push {r7}
8006abc: b083 sub sp, #12
8006abe: af00 add r7, sp, #0
8006ac0: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
8006ac2: 687b ldr r3, [r7, #4]
8006ac4: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8006ac8: 2b04 cmp r3, #4
8006aca: d105 bne.n 8006ad8 <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
8006acc: 687b ldr r3, [r7, #4]
8006ace: f893 229d ldrb.w r2, [r3, #669] ; 0x29d
8006ad2: 687b ldr r3, [r7, #4]
8006ad4: f883 229c strb.w r2, [r3, #668] ; 0x29c
}
return USBD_OK;
8006ad8: 2300 movs r3, #0
}
8006ada: 4618 mov r0, r3
8006adc: 370c adds r7, #12
8006ade: 46bd mov sp, r7
8006ae0: bc80 pop {r7}
8006ae2: 4770 bx lr
08006ae4 <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
8006ae4: b580 push {r7, lr}
8006ae6: b082 sub sp, #8
8006ae8: af00 add r7, sp, #0
8006aea: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8006aec: 687b ldr r3, [r7, #4]
8006aee: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8006af2: 2b03 cmp r3, #3
8006af4: d10b bne.n 8006b0e <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
8006af6: 687b ldr r3, [r7, #4]
8006af8: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006afc: 69db ldr r3, [r3, #28]
8006afe: 2b00 cmp r3, #0
8006b00: d005 beq.n 8006b0e <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
8006b02: 687b ldr r3, [r7, #4]
8006b04: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006b08: 69db ldr r3, [r3, #28]
8006b0a: 6878 ldr r0, [r7, #4]
8006b0c: 4798 blx r3
}
}
return USBD_OK;
8006b0e: 2300 movs r3, #0
}
8006b10: 4618 mov r0, r3
8006b12: 3708 adds r7, #8
8006b14: 46bd mov sp, r7
8006b16: bd80 pop {r7, pc}
08006b18 <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8006b18: b580 push {r7, lr}
8006b1a: b084 sub sp, #16
8006b1c: af00 add r7, sp, #0
8006b1e: 6078 str r0, [r7, #4]
8006b20: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
8006b22: 2300 movs r3, #0
8006b24: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8006b26: 683b ldr r3, [r7, #0]
8006b28: 781b ldrb r3, [r3, #0]
8006b2a: f003 0360 and.w r3, r3, #96 ; 0x60
8006b2e: 2b40 cmp r3, #64 ; 0x40
8006b30: d005 beq.n 8006b3e <USBD_StdDevReq+0x26>
8006b32: 2b40 cmp r3, #64 ; 0x40
8006b34: d84f bhi.n 8006bd6 <USBD_StdDevReq+0xbe>
8006b36: 2b00 cmp r3, #0
8006b38: d009 beq.n 8006b4e <USBD_StdDevReq+0x36>
8006b3a: 2b20 cmp r3, #32
8006b3c: d14b bne.n 8006bd6 <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
8006b3e: 687b ldr r3, [r7, #4]
8006b40: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006b44: 689b ldr r3, [r3, #8]
8006b46: 6839 ldr r1, [r7, #0]
8006b48: 6878 ldr r0, [r7, #4]
8006b4a: 4798 blx r3
break;
8006b4c: e048 b.n 8006be0 <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
8006b4e: 683b ldr r3, [r7, #0]
8006b50: 785b ldrb r3, [r3, #1]
8006b52: 2b09 cmp r3, #9
8006b54: d839 bhi.n 8006bca <USBD_StdDevReq+0xb2>
8006b56: a201 add r2, pc, #4 ; (adr r2, 8006b5c <USBD_StdDevReq+0x44>)
8006b58: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8006b5c: 08006bad .word 0x08006bad
8006b60: 08006bc1 .word 0x08006bc1
8006b64: 08006bcb .word 0x08006bcb
8006b68: 08006bb7 .word 0x08006bb7
8006b6c: 08006bcb .word 0x08006bcb
8006b70: 08006b8f .word 0x08006b8f
8006b74: 08006b85 .word 0x08006b85
8006b78: 08006bcb .word 0x08006bcb
8006b7c: 08006ba3 .word 0x08006ba3
8006b80: 08006b99 .word 0x08006b99
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
8006b84: 6839 ldr r1, [r7, #0]
8006b86: 6878 ldr r0, [r7, #4]
8006b88: f000 f9dc bl 8006f44 <USBD_GetDescriptor>
break;
8006b8c: e022 b.n 8006bd4 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
8006b8e: 6839 ldr r1, [r7, #0]
8006b90: 6878 ldr r0, [r7, #4]
8006b92: f000 fb51 bl 8007238 <USBD_SetAddress>
break;
8006b96: e01d b.n 8006bd4 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
8006b98: 6839 ldr r1, [r7, #0]
8006b9a: 6878 ldr r0, [r7, #4]
8006b9c: f000 fb90 bl 80072c0 <USBD_SetConfig>
break;
8006ba0: e018 b.n 8006bd4 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
8006ba2: 6839 ldr r1, [r7, #0]
8006ba4: 6878 ldr r0, [r7, #4]
8006ba6: f000 fc19 bl 80073dc <USBD_GetConfig>
break;
8006baa: e013 b.n 8006bd4 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
8006bac: 6839 ldr r1, [r7, #0]
8006bae: 6878 ldr r0, [r7, #4]
8006bb0: f000 fc49 bl 8007446 <USBD_GetStatus>
break;
8006bb4: e00e b.n 8006bd4 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
8006bb6: 6839 ldr r1, [r7, #0]
8006bb8: 6878 ldr r0, [r7, #4]
8006bba: f000 fc77 bl 80074ac <USBD_SetFeature>
break;
8006bbe: e009 b.n 8006bd4 <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
8006bc0: 6839 ldr r1, [r7, #0]
8006bc2: 6878 ldr r0, [r7, #4]
8006bc4: f000 fc86 bl 80074d4 <USBD_ClrFeature>
break;
8006bc8: e004 b.n 8006bd4 <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
8006bca: 6839 ldr r1, [r7, #0]
8006bcc: 6878 ldr r0, [r7, #4]
8006bce: f000 fcde bl 800758e <USBD_CtlError>
break;
8006bd2: bf00 nop
}
break;
8006bd4: e004 b.n 8006be0 <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
8006bd6: 6839 ldr r1, [r7, #0]
8006bd8: 6878 ldr r0, [r7, #4]
8006bda: f000 fcd8 bl 800758e <USBD_CtlError>
break;
8006bde: bf00 nop
}
return ret;
8006be0: 7bfb ldrb r3, [r7, #15]
}
8006be2: 4618 mov r0, r3
8006be4: 3710 adds r7, #16
8006be6: 46bd mov sp, r7
8006be8: bd80 pop {r7, pc}
8006bea: bf00 nop
08006bec <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8006bec: b580 push {r7, lr}
8006bee: b084 sub sp, #16
8006bf0: af00 add r7, sp, #0
8006bf2: 6078 str r0, [r7, #4]
8006bf4: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
8006bf6: 2300 movs r3, #0
8006bf8: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8006bfa: 683b ldr r3, [r7, #0]
8006bfc: 781b ldrb r3, [r3, #0]
8006bfe: f003 0360 and.w r3, r3, #96 ; 0x60
8006c02: 2b40 cmp r3, #64 ; 0x40
8006c04: d005 beq.n 8006c12 <USBD_StdItfReq+0x26>
8006c06: 2b40 cmp r3, #64 ; 0x40
8006c08: d82e bhi.n 8006c68 <USBD_StdItfReq+0x7c>
8006c0a: 2b00 cmp r3, #0
8006c0c: d001 beq.n 8006c12 <USBD_StdItfReq+0x26>
8006c0e: 2b20 cmp r3, #32
8006c10: d12a bne.n 8006c68 <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
8006c12: 687b ldr r3, [r7, #4]
8006c14: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8006c18: 3b01 subs r3, #1
8006c1a: 2b02 cmp r3, #2
8006c1c: d81d bhi.n 8006c5a <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
8006c1e: 683b ldr r3, [r7, #0]
8006c20: 889b ldrh r3, [r3, #4]
8006c22: b2db uxtb r3, r3
8006c24: 2b01 cmp r3, #1
8006c26: d813 bhi.n 8006c50 <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
8006c28: 687b ldr r3, [r7, #4]
8006c2a: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006c2e: 689b ldr r3, [r3, #8]
8006c30: 6839 ldr r1, [r7, #0]
8006c32: 6878 ldr r0, [r7, #4]
8006c34: 4798 blx r3
8006c36: 4603 mov r3, r0
8006c38: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
8006c3a: 683b ldr r3, [r7, #0]
8006c3c: 88db ldrh r3, [r3, #6]
8006c3e: 2b00 cmp r3, #0
8006c40: d110 bne.n 8006c64 <USBD_StdItfReq+0x78>
8006c42: 7bfb ldrb r3, [r7, #15]
8006c44: 2b00 cmp r3, #0
8006c46: d10d bne.n 8006c64 <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
8006c48: 6878 ldr r0, [r7, #4]
8006c4a: f000 fd68 bl 800771e <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
8006c4e: e009 b.n 8006c64 <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
8006c50: 6839 ldr r1, [r7, #0]
8006c52: 6878 ldr r0, [r7, #4]
8006c54: f000 fc9b bl 800758e <USBD_CtlError>
break;
8006c58: e004 b.n 8006c64 <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
8006c5a: 6839 ldr r1, [r7, #0]
8006c5c: 6878 ldr r0, [r7, #4]
8006c5e: f000 fc96 bl 800758e <USBD_CtlError>
break;
8006c62: e000 b.n 8006c66 <USBD_StdItfReq+0x7a>
break;
8006c64: bf00 nop
}
break;
8006c66: e004 b.n 8006c72 <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
8006c68: 6839 ldr r1, [r7, #0]
8006c6a: 6878 ldr r0, [r7, #4]
8006c6c: f000 fc8f bl 800758e <USBD_CtlError>
break;
8006c70: bf00 nop
}
return USBD_OK;
8006c72: 2300 movs r3, #0
}
8006c74: 4618 mov r0, r3
8006c76: 3710 adds r7, #16
8006c78: 46bd mov sp, r7
8006c7a: bd80 pop {r7, pc}
08006c7c <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8006c7c: b580 push {r7, lr}
8006c7e: b084 sub sp, #16
8006c80: af00 add r7, sp, #0
8006c82: 6078 str r0, [r7, #4]
8006c84: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
8006c86: 2300 movs r3, #0
8006c88: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
8006c8a: 683b ldr r3, [r7, #0]
8006c8c: 889b ldrh r3, [r3, #4]
8006c8e: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8006c90: 683b ldr r3, [r7, #0]
8006c92: 781b ldrb r3, [r3, #0]
8006c94: f003 0360 and.w r3, r3, #96 ; 0x60
8006c98: 2b40 cmp r3, #64 ; 0x40
8006c9a: d007 beq.n 8006cac <USBD_StdEPReq+0x30>
8006c9c: 2b40 cmp r3, #64 ; 0x40
8006c9e: f200 8146 bhi.w 8006f2e <USBD_StdEPReq+0x2b2>
8006ca2: 2b00 cmp r3, #0
8006ca4: d00a beq.n 8006cbc <USBD_StdEPReq+0x40>
8006ca6: 2b20 cmp r3, #32
8006ca8: f040 8141 bne.w 8006f2e <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
8006cac: 687b ldr r3, [r7, #4]
8006cae: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006cb2: 689b ldr r3, [r3, #8]
8006cb4: 6839 ldr r1, [r7, #0]
8006cb6: 6878 ldr r0, [r7, #4]
8006cb8: 4798 blx r3
break;
8006cba: e13d b.n 8006f38 <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
8006cbc: 683b ldr r3, [r7, #0]
8006cbe: 781b ldrb r3, [r3, #0]
8006cc0: f003 0360 and.w r3, r3, #96 ; 0x60
8006cc4: 2b20 cmp r3, #32
8006cc6: d10a bne.n 8006cde <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
8006cc8: 687b ldr r3, [r7, #4]
8006cca: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006cce: 689b ldr r3, [r3, #8]
8006cd0: 6839 ldr r1, [r7, #0]
8006cd2: 6878 ldr r0, [r7, #4]
8006cd4: 4798 blx r3
8006cd6: 4603 mov r3, r0
8006cd8: 73fb strb r3, [r7, #15]
return ret;
8006cda: 7bfb ldrb r3, [r7, #15]
8006cdc: e12d b.n 8006f3a <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
8006cde: 683b ldr r3, [r7, #0]
8006ce0: 785b ldrb r3, [r3, #1]
8006ce2: 2b03 cmp r3, #3
8006ce4: d007 beq.n 8006cf6 <USBD_StdEPReq+0x7a>
8006ce6: 2b03 cmp r3, #3
8006ce8: f300 811b bgt.w 8006f22 <USBD_StdEPReq+0x2a6>
8006cec: 2b00 cmp r3, #0
8006cee: d072 beq.n 8006dd6 <USBD_StdEPReq+0x15a>
8006cf0: 2b01 cmp r3, #1
8006cf2: d03a beq.n 8006d6a <USBD_StdEPReq+0xee>
8006cf4: e115 b.n 8006f22 <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
8006cf6: 687b ldr r3, [r7, #4]
8006cf8: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8006cfc: 2b02 cmp r3, #2
8006cfe: d002 beq.n 8006d06 <USBD_StdEPReq+0x8a>
8006d00: 2b03 cmp r3, #3
8006d02: d015 beq.n 8006d30 <USBD_StdEPReq+0xb4>
8006d04: e02b b.n 8006d5e <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
8006d06: 7bbb ldrb r3, [r7, #14]
8006d08: 2b00 cmp r3, #0
8006d0a: d00c beq.n 8006d26 <USBD_StdEPReq+0xaa>
8006d0c: 7bbb ldrb r3, [r7, #14]
8006d0e: 2b80 cmp r3, #128 ; 0x80
8006d10: d009 beq.n 8006d26 <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
8006d12: 7bbb ldrb r3, [r7, #14]
8006d14: 4619 mov r1, r3
8006d16: 6878 ldr r0, [r7, #4]
8006d18: f001 f804 bl 8007d24 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
8006d1c: 2180 movs r1, #128 ; 0x80
8006d1e: 6878 ldr r0, [r7, #4]
8006d20: f001 f800 bl 8007d24 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
8006d24: e020 b.n 8006d68 <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
8006d26: 6839 ldr r1, [r7, #0]
8006d28: 6878 ldr r0, [r7, #4]
8006d2a: f000 fc30 bl 800758e <USBD_CtlError>
break;
8006d2e: e01b b.n 8006d68 <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
8006d30: 683b ldr r3, [r7, #0]
8006d32: 885b ldrh r3, [r3, #2]
8006d34: 2b00 cmp r3, #0
8006d36: d10e bne.n 8006d56 <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
8006d38: 7bbb ldrb r3, [r7, #14]
8006d3a: 2b00 cmp r3, #0
8006d3c: d00b beq.n 8006d56 <USBD_StdEPReq+0xda>
8006d3e: 7bbb ldrb r3, [r7, #14]
8006d40: 2b80 cmp r3, #128 ; 0x80
8006d42: d008 beq.n 8006d56 <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
8006d44: 683b ldr r3, [r7, #0]
8006d46: 88db ldrh r3, [r3, #6]
8006d48: 2b00 cmp r3, #0
8006d4a: d104 bne.n 8006d56 <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
8006d4c: 7bbb ldrb r3, [r7, #14]
8006d4e: 4619 mov r1, r3
8006d50: 6878 ldr r0, [r7, #4]
8006d52: f000 ffe7 bl 8007d24 <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
8006d56: 6878 ldr r0, [r7, #4]
8006d58: f000 fce1 bl 800771e <USBD_CtlSendStatus>
break;
8006d5c: e004 b.n 8006d68 <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
8006d5e: 6839 ldr r1, [r7, #0]
8006d60: 6878 ldr r0, [r7, #4]
8006d62: f000 fc14 bl 800758e <USBD_CtlError>
break;
8006d66: bf00 nop
}
break;
8006d68: e0e0 b.n 8006f2c <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
8006d6a: 687b ldr r3, [r7, #4]
8006d6c: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8006d70: 2b02 cmp r3, #2
8006d72: d002 beq.n 8006d7a <USBD_StdEPReq+0xfe>
8006d74: 2b03 cmp r3, #3
8006d76: d015 beq.n 8006da4 <USBD_StdEPReq+0x128>
8006d78: e026 b.n 8006dc8 <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
8006d7a: 7bbb ldrb r3, [r7, #14]
8006d7c: 2b00 cmp r3, #0
8006d7e: d00c beq.n 8006d9a <USBD_StdEPReq+0x11e>
8006d80: 7bbb ldrb r3, [r7, #14]
8006d82: 2b80 cmp r3, #128 ; 0x80
8006d84: d009 beq.n 8006d9a <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
8006d86: 7bbb ldrb r3, [r7, #14]
8006d88: 4619 mov r1, r3
8006d8a: 6878 ldr r0, [r7, #4]
8006d8c: f000 ffca bl 8007d24 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
8006d90: 2180 movs r1, #128 ; 0x80
8006d92: 6878 ldr r0, [r7, #4]
8006d94: f000 ffc6 bl 8007d24 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
8006d98: e01c b.n 8006dd4 <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
8006d9a: 6839 ldr r1, [r7, #0]
8006d9c: 6878 ldr r0, [r7, #4]
8006d9e: f000 fbf6 bl 800758e <USBD_CtlError>
break;
8006da2: e017 b.n 8006dd4 <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
8006da4: 683b ldr r3, [r7, #0]
8006da6: 885b ldrh r3, [r3, #2]
8006da8: 2b00 cmp r3, #0
8006daa: d112 bne.n 8006dd2 <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
8006dac: 7bbb ldrb r3, [r7, #14]
8006dae: f003 037f and.w r3, r3, #127 ; 0x7f
8006db2: 2b00 cmp r3, #0
8006db4: d004 beq.n 8006dc0 <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
8006db6: 7bbb ldrb r3, [r7, #14]
8006db8: 4619 mov r1, r3
8006dba: 6878 ldr r0, [r7, #4]
8006dbc: f000 ffd1 bl 8007d62 <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
8006dc0: 6878 ldr r0, [r7, #4]
8006dc2: f000 fcac bl 800771e <USBD_CtlSendStatus>
}
break;
8006dc6: e004 b.n 8006dd2 <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
8006dc8: 6839 ldr r1, [r7, #0]
8006dca: 6878 ldr r0, [r7, #4]
8006dcc: f000 fbdf bl 800758e <USBD_CtlError>
break;
8006dd0: e000 b.n 8006dd4 <USBD_StdEPReq+0x158>
break;
8006dd2: bf00 nop
}
break;
8006dd4: e0aa b.n 8006f2c <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
8006dd6: 687b ldr r3, [r7, #4]
8006dd8: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8006ddc: 2b02 cmp r3, #2
8006dde: d002 beq.n 8006de6 <USBD_StdEPReq+0x16a>
8006de0: 2b03 cmp r3, #3
8006de2: d032 beq.n 8006e4a <USBD_StdEPReq+0x1ce>
8006de4: e097 b.n 8006f16 <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
8006de6: 7bbb ldrb r3, [r7, #14]
8006de8: 2b00 cmp r3, #0
8006dea: d007 beq.n 8006dfc <USBD_StdEPReq+0x180>
8006dec: 7bbb ldrb r3, [r7, #14]
8006dee: 2b80 cmp r3, #128 ; 0x80
8006df0: d004 beq.n 8006dfc <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
8006df2: 6839 ldr r1, [r7, #0]
8006df4: 6878 ldr r0, [r7, #4]
8006df6: f000 fbca bl 800758e <USBD_CtlError>
break;
8006dfa: e091 b.n 8006f20 <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8006dfc: f997 300e ldrsb.w r3, [r7, #14]
8006e00: 2b00 cmp r3, #0
8006e02: da0b bge.n 8006e1c <USBD_StdEPReq+0x1a0>
8006e04: 7bbb ldrb r3, [r7, #14]
8006e06: f003 027f and.w r2, r3, #127 ; 0x7f
8006e0a: 4613 mov r3, r2
8006e0c: 009b lsls r3, r3, #2
8006e0e: 4413 add r3, r2
8006e10: 009b lsls r3, r3, #2
8006e12: 3310 adds r3, #16
8006e14: 687a ldr r2, [r7, #4]
8006e16: 4413 add r3, r2
8006e18: 3304 adds r3, #4
8006e1a: e00b b.n 8006e34 <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
8006e1c: 7bbb ldrb r3, [r7, #14]
8006e1e: f003 027f and.w r2, r3, #127 ; 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8006e22: 4613 mov r3, r2
8006e24: 009b lsls r3, r3, #2
8006e26: 4413 add r3, r2
8006e28: 009b lsls r3, r3, #2
8006e2a: f503 73a8 add.w r3, r3, #336 ; 0x150
8006e2e: 687a ldr r2, [r7, #4]
8006e30: 4413 add r3, r2
8006e32: 3304 adds r3, #4
8006e34: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
8006e36: 68bb ldr r3, [r7, #8]
8006e38: 2200 movs r2, #0
8006e3a: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
8006e3c: 68bb ldr r3, [r7, #8]
8006e3e: 2202 movs r2, #2
8006e40: 4619 mov r1, r3
8006e42: 6878 ldr r0, [r7, #4]
8006e44: f000 fc0d bl 8007662 <USBD_CtlSendData>
break;
8006e48: e06a b.n 8006f20 <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
8006e4a: f997 300e ldrsb.w r3, [r7, #14]
8006e4e: 2b00 cmp r3, #0
8006e50: da11 bge.n 8006e76 <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
8006e52: 7bbb ldrb r3, [r7, #14]
8006e54: f003 020f and.w r2, r3, #15
8006e58: 6879 ldr r1, [r7, #4]
8006e5a: 4613 mov r3, r2
8006e5c: 009b lsls r3, r3, #2
8006e5e: 4413 add r3, r2
8006e60: 009b lsls r3, r3, #2
8006e62: 440b add r3, r1
8006e64: 3318 adds r3, #24
8006e66: 681b ldr r3, [r3, #0]
8006e68: 2b00 cmp r3, #0
8006e6a: d117 bne.n 8006e9c <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
8006e6c: 6839 ldr r1, [r7, #0]
8006e6e: 6878 ldr r0, [r7, #4]
8006e70: f000 fb8d bl 800758e <USBD_CtlError>
break;
8006e74: e054 b.n 8006f20 <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
8006e76: 7bbb ldrb r3, [r7, #14]
8006e78: f003 020f and.w r2, r3, #15
8006e7c: 6879 ldr r1, [r7, #4]
8006e7e: 4613 mov r3, r2
8006e80: 009b lsls r3, r3, #2
8006e82: 4413 add r3, r2
8006e84: 009b lsls r3, r3, #2
8006e86: 440b add r3, r1
8006e88: f503 73ac add.w r3, r3, #344 ; 0x158
8006e8c: 681b ldr r3, [r3, #0]
8006e8e: 2b00 cmp r3, #0
8006e90: d104 bne.n 8006e9c <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
8006e92: 6839 ldr r1, [r7, #0]
8006e94: 6878 ldr r0, [r7, #4]
8006e96: f000 fb7a bl 800758e <USBD_CtlError>
break;
8006e9a: e041 b.n 8006f20 <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8006e9c: f997 300e ldrsb.w r3, [r7, #14]
8006ea0: 2b00 cmp r3, #0
8006ea2: da0b bge.n 8006ebc <USBD_StdEPReq+0x240>
8006ea4: 7bbb ldrb r3, [r7, #14]
8006ea6: f003 027f and.w r2, r3, #127 ; 0x7f
8006eaa: 4613 mov r3, r2
8006eac: 009b lsls r3, r3, #2
8006eae: 4413 add r3, r2
8006eb0: 009b lsls r3, r3, #2
8006eb2: 3310 adds r3, #16
8006eb4: 687a ldr r2, [r7, #4]
8006eb6: 4413 add r3, r2
8006eb8: 3304 adds r3, #4
8006eba: e00b b.n 8006ed4 <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
8006ebc: 7bbb ldrb r3, [r7, #14]
8006ebe: f003 027f and.w r2, r3, #127 ; 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8006ec2: 4613 mov r3, r2
8006ec4: 009b lsls r3, r3, #2
8006ec6: 4413 add r3, r2
8006ec8: 009b lsls r3, r3, #2
8006eca: f503 73a8 add.w r3, r3, #336 ; 0x150
8006ece: 687a ldr r2, [r7, #4]
8006ed0: 4413 add r3, r2
8006ed2: 3304 adds r3, #4
8006ed4: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
8006ed6: 7bbb ldrb r3, [r7, #14]
8006ed8: 2b00 cmp r3, #0
8006eda: d002 beq.n 8006ee2 <USBD_StdEPReq+0x266>
8006edc: 7bbb ldrb r3, [r7, #14]
8006ede: 2b80 cmp r3, #128 ; 0x80
8006ee0: d103 bne.n 8006eea <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
8006ee2: 68bb ldr r3, [r7, #8]
8006ee4: 2200 movs r2, #0
8006ee6: 601a str r2, [r3, #0]
8006ee8: e00e b.n 8006f08 <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
8006eea: 7bbb ldrb r3, [r7, #14]
8006eec: 4619 mov r1, r3
8006eee: 6878 ldr r0, [r7, #4]
8006ef0: f000 ff56 bl 8007da0 <USBD_LL_IsStallEP>
8006ef4: 4603 mov r3, r0
8006ef6: 2b00 cmp r3, #0
8006ef8: d003 beq.n 8006f02 <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
8006efa: 68bb ldr r3, [r7, #8]
8006efc: 2201 movs r2, #1
8006efe: 601a str r2, [r3, #0]
8006f00: e002 b.n 8006f08 <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
8006f02: 68bb ldr r3, [r7, #8]
8006f04: 2200 movs r2, #0
8006f06: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
8006f08: 68bb ldr r3, [r7, #8]
8006f0a: 2202 movs r2, #2
8006f0c: 4619 mov r1, r3
8006f0e: 6878 ldr r0, [r7, #4]
8006f10: f000 fba7 bl 8007662 <USBD_CtlSendData>
break;
8006f14: e004 b.n 8006f20 <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
8006f16: 6839 ldr r1, [r7, #0]
8006f18: 6878 ldr r0, [r7, #4]
8006f1a: f000 fb38 bl 800758e <USBD_CtlError>
break;
8006f1e: bf00 nop
}
break;
8006f20: e004 b.n 8006f2c <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
8006f22: 6839 ldr r1, [r7, #0]
8006f24: 6878 ldr r0, [r7, #4]
8006f26: f000 fb32 bl 800758e <USBD_CtlError>
break;
8006f2a: bf00 nop
}
break;
8006f2c: e004 b.n 8006f38 <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
8006f2e: 6839 ldr r1, [r7, #0]
8006f30: 6878 ldr r0, [r7, #4]
8006f32: f000 fb2c bl 800758e <USBD_CtlError>
break;
8006f36: bf00 nop
}
return ret;
8006f38: 7bfb ldrb r3, [r7, #15]
}
8006f3a: 4618 mov r0, r3
8006f3c: 3710 adds r7, #16
8006f3e: 46bd mov sp, r7
8006f40: bd80 pop {r7, pc}
...
08006f44 <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8006f44: b580 push {r7, lr}
8006f46: b084 sub sp, #16
8006f48: af00 add r7, sp, #0
8006f4a: 6078 str r0, [r7, #4]
8006f4c: 6039 str r1, [r7, #0]
uint16_t len = 0U;
8006f4e: 2300 movs r3, #0
8006f50: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
8006f52: 2300 movs r3, #0
8006f54: 60fb str r3, [r7, #12]
uint8_t err = 0U;
8006f56: 2300 movs r3, #0
8006f58: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
8006f5a: 683b ldr r3, [r7, #0]
8006f5c: 885b ldrh r3, [r3, #2]
8006f5e: 0a1b lsrs r3, r3, #8
8006f60: b29b uxth r3, r3
8006f62: 3b01 subs r3, #1
8006f64: 2b06 cmp r3, #6
8006f66: f200 813b bhi.w 80071e0 <USBD_GetDescriptor+0x29c>
8006f6a: a201 add r2, pc, #4 ; (adr r2, 8006f70 <USBD_GetDescriptor+0x2c>)
8006f6c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8006f70: 08006f8d .word 0x08006f8d
8006f74: 08006fa5 .word 0x08006fa5
8006f78: 08006fe5 .word 0x08006fe5
8006f7c: 080071e1 .word 0x080071e1
8006f80: 080071e1 .word 0x080071e1
8006f84: 08007181 .word 0x08007181
8006f88: 080071ad .word 0x080071ad
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
8006f8c: 687b ldr r3, [r7, #4]
8006f8e: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8006f92: 681b ldr r3, [r3, #0]
8006f94: 687a ldr r2, [r7, #4]
8006f96: 7c12 ldrb r2, [r2, #16]
8006f98: f107 0108 add.w r1, r7, #8
8006f9c: 4610 mov r0, r2
8006f9e: 4798 blx r3
8006fa0: 60f8 str r0, [r7, #12]
break;
8006fa2: e125 b.n 80071f0 <USBD_GetDescriptor+0x2ac>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8006fa4: 687b ldr r3, [r7, #4]
8006fa6: 7c1b ldrb r3, [r3, #16]
8006fa8: 2b00 cmp r3, #0
8006faa: d10d bne.n 8006fc8 <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
8006fac: 687b ldr r3, [r7, #4]
8006fae: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006fb2: 6a9b ldr r3, [r3, #40] ; 0x28
8006fb4: f107 0208 add.w r2, r7, #8
8006fb8: 4610 mov r0, r2
8006fba: 4798 blx r3
8006fbc: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
8006fbe: 68fb ldr r3, [r7, #12]
8006fc0: 3301 adds r3, #1
8006fc2: 2202 movs r2, #2
8006fc4: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
8006fc6: e113 b.n 80071f0 <USBD_GetDescriptor+0x2ac>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
8006fc8: 687b ldr r3, [r7, #4]
8006fca: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
8006fce: 6adb ldr r3, [r3, #44] ; 0x2c
8006fd0: f107 0208 add.w r2, r7, #8
8006fd4: 4610 mov r0, r2
8006fd6: 4798 blx r3
8006fd8: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
8006fda: 68fb ldr r3, [r7, #12]
8006fdc: 3301 adds r3, #1
8006fde: 2202 movs r2, #2
8006fe0: 701a strb r2, [r3, #0]
break;
8006fe2: e105 b.n 80071f0 <USBD_GetDescriptor+0x2ac>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
8006fe4: 683b ldr r3, [r7, #0]
8006fe6: 885b ldrh r3, [r3, #2]
8006fe8: b2db uxtb r3, r3
8006fea: 2b05 cmp r3, #5
8006fec: f200 80ac bhi.w 8007148 <USBD_GetDescriptor+0x204>
8006ff0: a201 add r2, pc, #4 ; (adr r2, 8006ff8 <USBD_GetDescriptor+0xb4>)
8006ff2: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8006ff6: bf00 nop
8006ff8: 08007011 .word 0x08007011
8006ffc: 08007045 .word 0x08007045
8007000: 08007079 .word 0x08007079
8007004: 080070ad .word 0x080070ad
8007008: 080070e1 .word 0x080070e1
800700c: 08007115 .word 0x08007115
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
8007010: 687b ldr r3, [r7, #4]
8007012: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8007016: 685b ldr r3, [r3, #4]
8007018: 2b00 cmp r3, #0
800701a: d00b beq.n 8007034 <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
800701c: 687b ldr r3, [r7, #4]
800701e: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8007022: 685b ldr r3, [r3, #4]
8007024: 687a ldr r2, [r7, #4]
8007026: 7c12 ldrb r2, [r2, #16]
8007028: f107 0108 add.w r1, r7, #8
800702c: 4610 mov r0, r2
800702e: 4798 blx r3
8007030: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007032: e0a4 b.n 800717e <USBD_GetDescriptor+0x23a>
USBD_CtlError(pdev, req);
8007034: 6839 ldr r1, [r7, #0]
8007036: 6878 ldr r0, [r7, #4]
8007038: f000 faa9 bl 800758e <USBD_CtlError>
err++;
800703c: 7afb ldrb r3, [r7, #11]
800703e: 3301 adds r3, #1
8007040: 72fb strb r3, [r7, #11]
break;
8007042: e09c b.n 800717e <USBD_GetDescriptor+0x23a>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
8007044: 687b ldr r3, [r7, #4]
8007046: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
800704a: 689b ldr r3, [r3, #8]
800704c: 2b00 cmp r3, #0
800704e: d00b beq.n 8007068 <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
8007050: 687b ldr r3, [r7, #4]
8007052: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8007056: 689b ldr r3, [r3, #8]
8007058: 687a ldr r2, [r7, #4]
800705a: 7c12 ldrb r2, [r2, #16]
800705c: f107 0108 add.w r1, r7, #8
8007060: 4610 mov r0, r2
8007062: 4798 blx r3
8007064: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007066: e08a b.n 800717e <USBD_GetDescriptor+0x23a>
USBD_CtlError(pdev, req);
8007068: 6839 ldr r1, [r7, #0]
800706a: 6878 ldr r0, [r7, #4]
800706c: f000 fa8f bl 800758e <USBD_CtlError>
err++;
8007070: 7afb ldrb r3, [r7, #11]
8007072: 3301 adds r3, #1
8007074: 72fb strb r3, [r7, #11]
break;
8007076: e082 b.n 800717e <USBD_GetDescriptor+0x23a>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
8007078: 687b ldr r3, [r7, #4]
800707a: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
800707e: 68db ldr r3, [r3, #12]
8007080: 2b00 cmp r3, #0
8007082: d00b beq.n 800709c <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
8007084: 687b ldr r3, [r7, #4]
8007086: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
800708a: 68db ldr r3, [r3, #12]
800708c: 687a ldr r2, [r7, #4]
800708e: 7c12 ldrb r2, [r2, #16]
8007090: f107 0108 add.w r1, r7, #8
8007094: 4610 mov r0, r2
8007096: 4798 blx r3
8007098: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800709a: e070 b.n 800717e <USBD_GetDescriptor+0x23a>
USBD_CtlError(pdev, req);
800709c: 6839 ldr r1, [r7, #0]
800709e: 6878 ldr r0, [r7, #4]
80070a0: f000 fa75 bl 800758e <USBD_CtlError>
err++;
80070a4: 7afb ldrb r3, [r7, #11]
80070a6: 3301 adds r3, #1
80070a8: 72fb strb r3, [r7, #11]
break;
80070aa: e068 b.n 800717e <USBD_GetDescriptor+0x23a>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
80070ac: 687b ldr r3, [r7, #4]
80070ae: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
80070b2: 691b ldr r3, [r3, #16]
80070b4: 2b00 cmp r3, #0
80070b6: d00b beq.n 80070d0 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
80070b8: 687b ldr r3, [r7, #4]
80070ba: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
80070be: 691b ldr r3, [r3, #16]
80070c0: 687a ldr r2, [r7, #4]
80070c2: 7c12 ldrb r2, [r2, #16]
80070c4: f107 0108 add.w r1, r7, #8
80070c8: 4610 mov r0, r2
80070ca: 4798 blx r3
80070cc: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80070ce: e056 b.n 800717e <USBD_GetDescriptor+0x23a>
USBD_CtlError(pdev, req);
80070d0: 6839 ldr r1, [r7, #0]
80070d2: 6878 ldr r0, [r7, #4]
80070d4: f000 fa5b bl 800758e <USBD_CtlError>
err++;
80070d8: 7afb ldrb r3, [r7, #11]
80070da: 3301 adds r3, #1
80070dc: 72fb strb r3, [r7, #11]
break;
80070de: e04e b.n 800717e <USBD_GetDescriptor+0x23a>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
80070e0: 687b ldr r3, [r7, #4]
80070e2: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
80070e6: 695b ldr r3, [r3, #20]
80070e8: 2b00 cmp r3, #0
80070ea: d00b beq.n 8007104 <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
80070ec: 687b ldr r3, [r7, #4]
80070ee: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
80070f2: 695b ldr r3, [r3, #20]
80070f4: 687a ldr r2, [r7, #4]
80070f6: 7c12 ldrb r2, [r2, #16]
80070f8: f107 0108 add.w r1, r7, #8
80070fc: 4610 mov r0, r2
80070fe: 4798 blx r3
8007100: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007102: e03c b.n 800717e <USBD_GetDescriptor+0x23a>
USBD_CtlError(pdev, req);
8007104: 6839 ldr r1, [r7, #0]
8007106: 6878 ldr r0, [r7, #4]
8007108: f000 fa41 bl 800758e <USBD_CtlError>
err++;
800710c: 7afb ldrb r3, [r7, #11]
800710e: 3301 adds r3, #1
8007110: 72fb strb r3, [r7, #11]
break;
8007112: e034 b.n 800717e <USBD_GetDescriptor+0x23a>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
8007114: 687b ldr r3, [r7, #4]
8007116: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
800711a: 699b ldr r3, [r3, #24]
800711c: 2b00 cmp r3, #0
800711e: d00b beq.n 8007138 <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
8007120: 687b ldr r3, [r7, #4]
8007122: f8d3 32b0 ldr.w r3, [r3, #688] ; 0x2b0
8007126: 699b ldr r3, [r3, #24]
8007128: 687a ldr r2, [r7, #4]
800712a: 7c12 ldrb r2, [r2, #16]
800712c: f107 0108 add.w r1, r7, #8
8007130: 4610 mov r0, r2
8007132: 4798 blx r3
8007134: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007136: e022 b.n 800717e <USBD_GetDescriptor+0x23a>
USBD_CtlError(pdev, req);
8007138: 6839 ldr r1, [r7, #0]
800713a: 6878 ldr r0, [r7, #4]
800713c: f000 fa27 bl 800758e <USBD_CtlError>
err++;
8007140: 7afb ldrb r3, [r7, #11]
8007142: 3301 adds r3, #1
8007144: 72fb strb r3, [r7, #11]
break;
8007146: e01a b.n 800717e <USBD_GetDescriptor+0x23a>
default:
#if (USBD_SUPPORT_USER_STRING_DESC == 1U)
if (pdev->pClass->GetUsrStrDescriptor != NULL)
8007148: 687b ldr r3, [r7, #4]
800714a: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
800714e: 6b9b ldr r3, [r3, #56] ; 0x38
8007150: 2b00 cmp r3, #0
8007152: d00c beq.n 800716e <USBD_GetDescriptor+0x22a>
{
pbuf = pdev->pClass->GetUsrStrDescriptor(pdev, (req->wValue), &len);
8007154: 687b ldr r3, [r7, #4]
8007156: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
800715a: 6b9b ldr r3, [r3, #56] ; 0x38
800715c: 683a ldr r2, [r7, #0]
800715e: 8852 ldrh r2, [r2, #2]
8007160: b2d1 uxtb r1, r2
8007162: f107 0208 add.w r2, r7, #8
8007166: 6878 ldr r0, [r7, #4]
8007168: 4798 blx r3
800716a: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800716c: e006 b.n 800717c <USBD_GetDescriptor+0x238>
USBD_CtlError(pdev, req);
800716e: 6839 ldr r1, [r7, #0]
8007170: 6878 ldr r0, [r7, #4]
8007172: f000 fa0c bl 800758e <USBD_CtlError>
err++;
8007176: 7afb ldrb r3, [r7, #11]
8007178: 3301 adds r3, #1
800717a: 72fb strb r3, [r7, #11]
break;
800717c: bf00 nop
#else
USBD_CtlError(pdev, req);
err++;
#endif
}
break;
800717e: e037 b.n 80071f0 <USBD_GetDescriptor+0x2ac>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007180: 687b ldr r3, [r7, #4]
8007182: 7c1b ldrb r3, [r3, #16]
8007184: 2b00 cmp r3, #0
8007186: d109 bne.n 800719c <USBD_GetDescriptor+0x258>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
8007188: 687b ldr r3, [r7, #4]
800718a: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
800718e: 6b5b ldr r3, [r3, #52] ; 0x34
8007190: f107 0208 add.w r2, r7, #8
8007194: 4610 mov r0, r2
8007196: 4798 blx r3
8007198: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800719a: e029 b.n 80071f0 <USBD_GetDescriptor+0x2ac>
USBD_CtlError(pdev, req);
800719c: 6839 ldr r1, [r7, #0]
800719e: 6878 ldr r0, [r7, #4]
80071a0: f000 f9f5 bl 800758e <USBD_CtlError>
err++;
80071a4: 7afb ldrb r3, [r7, #11]
80071a6: 3301 adds r3, #1
80071a8: 72fb strb r3, [r7, #11]
break;
80071aa: e021 b.n 80071f0 <USBD_GetDescriptor+0x2ac>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
80071ac: 687b ldr r3, [r7, #4]
80071ae: 7c1b ldrb r3, [r3, #16]
80071b0: 2b00 cmp r3, #0
80071b2: d10d bne.n 80071d0 <USBD_GetDescriptor+0x28c>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
80071b4: 687b ldr r3, [r7, #4]
80071b6: f8d3 32b4 ldr.w r3, [r3, #692] ; 0x2b4
80071ba: 6b1b ldr r3, [r3, #48] ; 0x30
80071bc: f107 0208 add.w r2, r7, #8
80071c0: 4610 mov r0, r2
80071c2: 4798 blx r3
80071c4: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
80071c6: 68fb ldr r3, [r7, #12]
80071c8: 3301 adds r3, #1
80071ca: 2207 movs r2, #7
80071cc: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80071ce: e00f b.n 80071f0 <USBD_GetDescriptor+0x2ac>
USBD_CtlError(pdev, req);
80071d0: 6839 ldr r1, [r7, #0]
80071d2: 6878 ldr r0, [r7, #4]
80071d4: f000 f9db bl 800758e <USBD_CtlError>
err++;
80071d8: 7afb ldrb r3, [r7, #11]
80071da: 3301 adds r3, #1
80071dc: 72fb strb r3, [r7, #11]
break;
80071de: e007 b.n 80071f0 <USBD_GetDescriptor+0x2ac>
default:
USBD_CtlError(pdev, req);
80071e0: 6839 ldr r1, [r7, #0]
80071e2: 6878 ldr r0, [r7, #4]
80071e4: f000 f9d3 bl 800758e <USBD_CtlError>
err++;
80071e8: 7afb ldrb r3, [r7, #11]
80071ea: 3301 adds r3, #1
80071ec: 72fb strb r3, [r7, #11]
break;
80071ee: bf00 nop
}
if (err != 0U)
80071f0: 7afb ldrb r3, [r7, #11]
80071f2: 2b00 cmp r3, #0
80071f4: d11c bne.n 8007230 <USBD_GetDescriptor+0x2ec>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
80071f6: 893b ldrh r3, [r7, #8]
80071f8: 2b00 cmp r3, #0
80071fa: d011 beq.n 8007220 <USBD_GetDescriptor+0x2dc>
80071fc: 683b ldr r3, [r7, #0]
80071fe: 88db ldrh r3, [r3, #6]
8007200: 2b00 cmp r3, #0
8007202: d00d beq.n 8007220 <USBD_GetDescriptor+0x2dc>
{
len = MIN(len, req->wLength);
8007204: 683b ldr r3, [r7, #0]
8007206: 88da ldrh r2, [r3, #6]
8007208: 893b ldrh r3, [r7, #8]
800720a: 4293 cmp r3, r2
800720c: bf28 it cs
800720e: 4613 movcs r3, r2
8007210: b29b uxth r3, r3
8007212: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
8007214: 893b ldrh r3, [r7, #8]
8007216: 461a mov r2, r3
8007218: 68f9 ldr r1, [r7, #12]
800721a: 6878 ldr r0, [r7, #4]
800721c: f000 fa21 bl 8007662 <USBD_CtlSendData>
}
if (req->wLength == 0U)
8007220: 683b ldr r3, [r7, #0]
8007222: 88db ldrh r3, [r3, #6]
8007224: 2b00 cmp r3, #0
8007226: d104 bne.n 8007232 <USBD_GetDescriptor+0x2ee>
{
(void)USBD_CtlSendStatus(pdev);
8007228: 6878 ldr r0, [r7, #4]
800722a: f000 fa78 bl 800771e <USBD_CtlSendStatus>
800722e: e000 b.n 8007232 <USBD_GetDescriptor+0x2ee>
return;
8007230: bf00 nop
}
}
}
8007232: 3710 adds r7, #16
8007234: 46bd mov sp, r7
8007236: bd80 pop {r7, pc}
08007238 <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8007238: b580 push {r7, lr}
800723a: b084 sub sp, #16
800723c: af00 add r7, sp, #0
800723e: 6078 str r0, [r7, #4]
8007240: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
8007242: 683b ldr r3, [r7, #0]
8007244: 889b ldrh r3, [r3, #4]
8007246: 2b00 cmp r3, #0
8007248: d130 bne.n 80072ac <USBD_SetAddress+0x74>
800724a: 683b ldr r3, [r7, #0]
800724c: 88db ldrh r3, [r3, #6]
800724e: 2b00 cmp r3, #0
8007250: d12c bne.n 80072ac <USBD_SetAddress+0x74>
8007252: 683b ldr r3, [r7, #0]
8007254: 885b ldrh r3, [r3, #2]
8007256: 2b7f cmp r3, #127 ; 0x7f
8007258: d828 bhi.n 80072ac <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
800725a: 683b ldr r3, [r7, #0]
800725c: 885b ldrh r3, [r3, #2]
800725e: b2db uxtb r3, r3
8007260: f003 037f and.w r3, r3, #127 ; 0x7f
8007264: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007266: 687b ldr r3, [r7, #4]
8007268: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
800726c: 2b03 cmp r3, #3
800726e: d104 bne.n 800727a <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
8007270: 6839 ldr r1, [r7, #0]
8007272: 6878 ldr r0, [r7, #4]
8007274: f000 f98b bl 800758e <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007278: e01d b.n 80072b6 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
800727a: 687b ldr r3, [r7, #4]
800727c: 7bfa ldrb r2, [r7, #15]
800727e: f883 229e strb.w r2, [r3, #670] ; 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
8007282: 7bfb ldrb r3, [r7, #15]
8007284: 4619 mov r1, r3
8007286: 6878 ldr r0, [r7, #4]
8007288: f000 fdb6 bl 8007df8 <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
800728c: 6878 ldr r0, [r7, #4]
800728e: f000 fa46 bl 800771e <USBD_CtlSendStatus>
if (dev_addr != 0U)
8007292: 7bfb ldrb r3, [r7, #15]
8007294: 2b00 cmp r3, #0
8007296: d004 beq.n 80072a2 <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
8007298: 687b ldr r3, [r7, #4]
800729a: 2202 movs r2, #2
800729c: f883 229c strb.w r2, [r3, #668] ; 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80072a0: e009 b.n 80072b6 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
80072a2: 687b ldr r3, [r7, #4]
80072a4: 2201 movs r2, #1
80072a6: f883 229c strb.w r2, [r3, #668] ; 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80072aa: e004 b.n 80072b6 <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
80072ac: 6839 ldr r1, [r7, #0]
80072ae: 6878 ldr r0, [r7, #4]
80072b0: f000 f96d bl 800758e <USBD_CtlError>
}
}
80072b4: bf00 nop
80072b6: bf00 nop
80072b8: 3710 adds r7, #16
80072ba: 46bd mov sp, r7
80072bc: bd80 pop {r7, pc}
...
080072c0 <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
80072c0: b580 push {r7, lr}
80072c2: b082 sub sp, #8
80072c4: af00 add r7, sp, #0
80072c6: 6078 str r0, [r7, #4]
80072c8: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
80072ca: 683b ldr r3, [r7, #0]
80072cc: 885b ldrh r3, [r3, #2]
80072ce: b2da uxtb r2, r3
80072d0: 4b41 ldr r3, [pc, #260] ; (80073d8 <USBD_SetConfig+0x118>)
80072d2: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
80072d4: 4b40 ldr r3, [pc, #256] ; (80073d8 <USBD_SetConfig+0x118>)
80072d6: 781b ldrb r3, [r3, #0]
80072d8: 2b01 cmp r3, #1
80072da: d904 bls.n 80072e6 <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
80072dc: 6839 ldr r1, [r7, #0]
80072de: 6878 ldr r0, [r7, #4]
80072e0: f000 f955 bl 800758e <USBD_CtlError>
80072e4: e075 b.n 80073d2 <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
80072e6: 687b ldr r3, [r7, #4]
80072e8: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
80072ec: 2b02 cmp r3, #2
80072ee: d002 beq.n 80072f6 <USBD_SetConfig+0x36>
80072f0: 2b03 cmp r3, #3
80072f2: d023 beq.n 800733c <USBD_SetConfig+0x7c>
80072f4: e062 b.n 80073bc <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
80072f6: 4b38 ldr r3, [pc, #224] ; (80073d8 <USBD_SetConfig+0x118>)
80072f8: 781b ldrb r3, [r3, #0]
80072fa: 2b00 cmp r3, #0
80072fc: d01a beq.n 8007334 <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
80072fe: 4b36 ldr r3, [pc, #216] ; (80073d8 <USBD_SetConfig+0x118>)
8007300: 781b ldrb r3, [r3, #0]
8007302: 461a mov r2, r3
8007304: 687b ldr r3, [r7, #4]
8007306: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
8007308: 687b ldr r3, [r7, #4]
800730a: 2203 movs r2, #3
800730c: f883 229c strb.w r2, [r3, #668] ; 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
8007310: 4b31 ldr r3, [pc, #196] ; (80073d8 <USBD_SetConfig+0x118>)
8007312: 781b ldrb r3, [r3, #0]
8007314: 4619 mov r1, r3
8007316: 6878 ldr r0, [r7, #4]
8007318: f7ff f9d6 bl 80066c8 <USBD_SetClassConfig>
800731c: 4603 mov r3, r0
800731e: 2b02 cmp r3, #2
8007320: d104 bne.n 800732c <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
8007322: 6839 ldr r1, [r7, #0]
8007324: 6878 ldr r0, [r7, #4]
8007326: f000 f932 bl 800758e <USBD_CtlError>
return;
800732a: e052 b.n 80073d2 <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
800732c: 6878 ldr r0, [r7, #4]
800732e: f000 f9f6 bl 800771e <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
8007332: e04e b.n 80073d2 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
8007334: 6878 ldr r0, [r7, #4]
8007336: f000 f9f2 bl 800771e <USBD_CtlSendStatus>
break;
800733a: e04a b.n 80073d2 <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
800733c: 4b26 ldr r3, [pc, #152] ; (80073d8 <USBD_SetConfig+0x118>)
800733e: 781b ldrb r3, [r3, #0]
8007340: 2b00 cmp r3, #0
8007342: d112 bne.n 800736a <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
8007344: 687b ldr r3, [r7, #4]
8007346: 2202 movs r2, #2
8007348: f883 229c strb.w r2, [r3, #668] ; 0x29c
pdev->dev_config = cfgidx;
800734c: 4b22 ldr r3, [pc, #136] ; (80073d8 <USBD_SetConfig+0x118>)
800734e: 781b ldrb r3, [r3, #0]
8007350: 461a mov r2, r3
8007352: 687b ldr r3, [r7, #4]
8007354: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
8007356: 4b20 ldr r3, [pc, #128] ; (80073d8 <USBD_SetConfig+0x118>)
8007358: 781b ldrb r3, [r3, #0]
800735a: 4619 mov r1, r3
800735c: 6878 ldr r0, [r7, #4]
800735e: f7ff f9d2 bl 8006706 <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
8007362: 6878 ldr r0, [r7, #4]
8007364: f000 f9db bl 800771e <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
8007368: e033 b.n 80073d2 <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
800736a: 4b1b ldr r3, [pc, #108] ; (80073d8 <USBD_SetConfig+0x118>)
800736c: 781b ldrb r3, [r3, #0]
800736e: 461a mov r2, r3
8007370: 687b ldr r3, [r7, #4]
8007372: 685b ldr r3, [r3, #4]
8007374: 429a cmp r2, r3
8007376: d01d beq.n 80073b4 <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
8007378: 687b ldr r3, [r7, #4]
800737a: 685b ldr r3, [r3, #4]
800737c: b2db uxtb r3, r3
800737e: 4619 mov r1, r3
8007380: 6878 ldr r0, [r7, #4]
8007382: f7ff f9c0 bl 8006706 <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
8007386: 4b14 ldr r3, [pc, #80] ; (80073d8 <USBD_SetConfig+0x118>)
8007388: 781b ldrb r3, [r3, #0]
800738a: 461a mov r2, r3
800738c: 687b ldr r3, [r7, #4]
800738e: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
8007390: 4b11 ldr r3, [pc, #68] ; (80073d8 <USBD_SetConfig+0x118>)
8007392: 781b ldrb r3, [r3, #0]
8007394: 4619 mov r1, r3
8007396: 6878 ldr r0, [r7, #4]
8007398: f7ff f996 bl 80066c8 <USBD_SetClassConfig>
800739c: 4603 mov r3, r0
800739e: 2b02 cmp r3, #2
80073a0: d104 bne.n 80073ac <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
80073a2: 6839 ldr r1, [r7, #0]
80073a4: 6878 ldr r0, [r7, #4]
80073a6: f000 f8f2 bl 800758e <USBD_CtlError>
return;
80073aa: e012 b.n 80073d2 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
80073ac: 6878 ldr r0, [r7, #4]
80073ae: f000 f9b6 bl 800771e <USBD_CtlSendStatus>
break;
80073b2: e00e b.n 80073d2 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
80073b4: 6878 ldr r0, [r7, #4]
80073b6: f000 f9b2 bl 800771e <USBD_CtlSendStatus>
break;
80073ba: e00a b.n 80073d2 <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
80073bc: 6839 ldr r1, [r7, #0]
80073be: 6878 ldr r0, [r7, #4]
80073c0: f000 f8e5 bl 800758e <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
80073c4: 4b04 ldr r3, [pc, #16] ; (80073d8 <USBD_SetConfig+0x118>)
80073c6: 781b ldrb r3, [r3, #0]
80073c8: 4619 mov r1, r3
80073ca: 6878 ldr r0, [r7, #4]
80073cc: f7ff f99b bl 8006706 <USBD_ClrClassConfig>
break;
80073d0: bf00 nop
}
}
}
80073d2: 3708 adds r7, #8
80073d4: 46bd mov sp, r7
80073d6: bd80 pop {r7, pc}
80073d8: 200001f7 .word 0x200001f7
080073dc <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
80073dc: b580 push {r7, lr}
80073de: b082 sub sp, #8
80073e0: af00 add r7, sp, #0
80073e2: 6078 str r0, [r7, #4]
80073e4: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
80073e6: 683b ldr r3, [r7, #0]
80073e8: 88db ldrh r3, [r3, #6]
80073ea: 2b01 cmp r3, #1
80073ec: d004 beq.n 80073f8 <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
80073ee: 6839 ldr r1, [r7, #0]
80073f0: 6878 ldr r0, [r7, #4]
80073f2: f000 f8cc bl 800758e <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
80073f6: e022 b.n 800743e <USBD_GetConfig+0x62>
switch (pdev->dev_state)
80073f8: 687b ldr r3, [r7, #4]
80073fa: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
80073fe: 2b02 cmp r3, #2
8007400: dc02 bgt.n 8007408 <USBD_GetConfig+0x2c>
8007402: 2b00 cmp r3, #0
8007404: dc03 bgt.n 800740e <USBD_GetConfig+0x32>
8007406: e015 b.n 8007434 <USBD_GetConfig+0x58>
8007408: 2b03 cmp r3, #3
800740a: d00b beq.n 8007424 <USBD_GetConfig+0x48>
800740c: e012 b.n 8007434 <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
800740e: 687b ldr r3, [r7, #4]
8007410: 2200 movs r2, #0
8007412: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
8007414: 687b ldr r3, [r7, #4]
8007416: 3308 adds r3, #8
8007418: 2201 movs r2, #1
800741a: 4619 mov r1, r3
800741c: 6878 ldr r0, [r7, #4]
800741e: f000 f920 bl 8007662 <USBD_CtlSendData>
break;
8007422: e00c b.n 800743e <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
8007424: 687b ldr r3, [r7, #4]
8007426: 3304 adds r3, #4
8007428: 2201 movs r2, #1
800742a: 4619 mov r1, r3
800742c: 6878 ldr r0, [r7, #4]
800742e: f000 f918 bl 8007662 <USBD_CtlSendData>
break;
8007432: e004 b.n 800743e <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
8007434: 6839 ldr r1, [r7, #0]
8007436: 6878 ldr r0, [r7, #4]
8007438: f000 f8a9 bl 800758e <USBD_CtlError>
break;
800743c: bf00 nop
}
800743e: bf00 nop
8007440: 3708 adds r7, #8
8007442: 46bd mov sp, r7
8007444: bd80 pop {r7, pc}
08007446 <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8007446: b580 push {r7, lr}
8007448: b082 sub sp, #8
800744a: af00 add r7, sp, #0
800744c: 6078 str r0, [r7, #4]
800744e: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
8007450: 687b ldr r3, [r7, #4]
8007452: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
8007456: 3b01 subs r3, #1
8007458: 2b02 cmp r3, #2
800745a: d81e bhi.n 800749a <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
800745c: 683b ldr r3, [r7, #0]
800745e: 88db ldrh r3, [r3, #6]
8007460: 2b02 cmp r3, #2
8007462: d004 beq.n 800746e <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
8007464: 6839 ldr r1, [r7, #0]
8007466: 6878 ldr r0, [r7, #4]
8007468: f000 f891 bl 800758e <USBD_CtlError>
break;
800746c: e01a b.n 80074a4 <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
800746e: 687b ldr r3, [r7, #4]
8007470: 2201 movs r2, #1
8007472: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
8007474: 687b ldr r3, [r7, #4]
8007476: f8d3 32a4 ldr.w r3, [r3, #676] ; 0x2a4
800747a: 2b00 cmp r3, #0
800747c: d005 beq.n 800748a <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
800747e: 687b ldr r3, [r7, #4]
8007480: 68db ldr r3, [r3, #12]
8007482: f043 0202 orr.w r2, r3, #2
8007486: 687b ldr r3, [r7, #4]
8007488: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
800748a: 687b ldr r3, [r7, #4]
800748c: 330c adds r3, #12
800748e: 2202 movs r2, #2
8007490: 4619 mov r1, r3
8007492: 6878 ldr r0, [r7, #4]
8007494: f000 f8e5 bl 8007662 <USBD_CtlSendData>
break;
8007498: e004 b.n 80074a4 <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
800749a: 6839 ldr r1, [r7, #0]
800749c: 6878 ldr r0, [r7, #4]
800749e: f000 f876 bl 800758e <USBD_CtlError>
break;
80074a2: bf00 nop
}
}
80074a4: bf00 nop
80074a6: 3708 adds r7, #8
80074a8: 46bd mov sp, r7
80074aa: bd80 pop {r7, pc}
080074ac <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80074ac: b580 push {r7, lr}
80074ae: b082 sub sp, #8
80074b0: af00 add r7, sp, #0
80074b2: 6078 str r0, [r7, #4]
80074b4: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
80074b6: 683b ldr r3, [r7, #0]
80074b8: 885b ldrh r3, [r3, #2]
80074ba: 2b01 cmp r3, #1
80074bc: d106 bne.n 80074cc <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
80074be: 687b ldr r3, [r7, #4]
80074c0: 2201 movs r2, #1
80074c2: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
USBD_CtlSendStatus(pdev);
80074c6: 6878 ldr r0, [r7, #4]
80074c8: f000 f929 bl 800771e <USBD_CtlSendStatus>
}
}
80074cc: bf00 nop
80074ce: 3708 adds r7, #8
80074d0: 46bd mov sp, r7
80074d2: bd80 pop {r7, pc}
080074d4 <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80074d4: b580 push {r7, lr}
80074d6: b082 sub sp, #8
80074d8: af00 add r7, sp, #0
80074da: 6078 str r0, [r7, #4]
80074dc: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
80074de: 687b ldr r3, [r7, #4]
80074e0: f893 329c ldrb.w r3, [r3, #668] ; 0x29c
80074e4: 3b01 subs r3, #1
80074e6: 2b02 cmp r3, #2
80074e8: d80b bhi.n 8007502 <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
80074ea: 683b ldr r3, [r7, #0]
80074ec: 885b ldrh r3, [r3, #2]
80074ee: 2b01 cmp r3, #1
80074f0: d10c bne.n 800750c <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
80074f2: 687b ldr r3, [r7, #4]
80074f4: 2200 movs r2, #0
80074f6: f8c3 22a4 str.w r2, [r3, #676] ; 0x2a4
USBD_CtlSendStatus(pdev);
80074fa: 6878 ldr r0, [r7, #4]
80074fc: f000 f90f bl 800771e <USBD_CtlSendStatus>
}
break;
8007500: e004 b.n 800750c <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
8007502: 6839 ldr r1, [r7, #0]
8007504: 6878 ldr r0, [r7, #4]
8007506: f000 f842 bl 800758e <USBD_CtlError>
break;
800750a: e000 b.n 800750e <USBD_ClrFeature+0x3a>
break;
800750c: bf00 nop
}
}
800750e: bf00 nop
8007510: 3708 adds r7, #8
8007512: 46bd mov sp, r7
8007514: bd80 pop {r7, pc}
08007516 <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
8007516: b480 push {r7}
8007518: b083 sub sp, #12
800751a: af00 add r7, sp, #0
800751c: 6078 str r0, [r7, #4]
800751e: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
8007520: 683b ldr r3, [r7, #0]
8007522: 781a ldrb r2, [r3, #0]
8007524: 687b ldr r3, [r7, #4]
8007526: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
8007528: 683b ldr r3, [r7, #0]
800752a: 785a ldrb r2, [r3, #1]
800752c: 687b ldr r3, [r7, #4]
800752e: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
8007530: 683b ldr r3, [r7, #0]
8007532: 3302 adds r3, #2
8007534: 781b ldrb r3, [r3, #0]
8007536: b29a uxth r2, r3
8007538: 683b ldr r3, [r7, #0]
800753a: 3303 adds r3, #3
800753c: 781b ldrb r3, [r3, #0]
800753e: b29b uxth r3, r3
8007540: 021b lsls r3, r3, #8
8007542: b29b uxth r3, r3
8007544: 4413 add r3, r2
8007546: b29a uxth r2, r3
8007548: 687b ldr r3, [r7, #4]
800754a: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
800754c: 683b ldr r3, [r7, #0]
800754e: 3304 adds r3, #4
8007550: 781b ldrb r3, [r3, #0]
8007552: b29a uxth r2, r3
8007554: 683b ldr r3, [r7, #0]
8007556: 3305 adds r3, #5
8007558: 781b ldrb r3, [r3, #0]
800755a: b29b uxth r3, r3
800755c: 021b lsls r3, r3, #8
800755e: b29b uxth r3, r3
8007560: 4413 add r3, r2
8007562: b29a uxth r2, r3
8007564: 687b ldr r3, [r7, #4]
8007566: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
8007568: 683b ldr r3, [r7, #0]
800756a: 3306 adds r3, #6
800756c: 781b ldrb r3, [r3, #0]
800756e: b29a uxth r2, r3
8007570: 683b ldr r3, [r7, #0]
8007572: 3307 adds r3, #7
8007574: 781b ldrb r3, [r3, #0]
8007576: b29b uxth r3, r3
8007578: 021b lsls r3, r3, #8
800757a: b29b uxth r3, r3
800757c: 4413 add r3, r2
800757e: b29a uxth r2, r3
8007580: 687b ldr r3, [r7, #4]
8007582: 80da strh r2, [r3, #6]
}
8007584: bf00 nop
8007586: 370c adds r7, #12
8007588: 46bd mov sp, r7
800758a: bc80 pop {r7}
800758c: 4770 bx lr
0800758e <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800758e: b580 push {r7, lr}
8007590: b082 sub sp, #8
8007592: af00 add r7, sp, #0
8007594: 6078 str r0, [r7, #4]
8007596: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
8007598: 2180 movs r1, #128 ; 0x80
800759a: 6878 ldr r0, [r7, #4]
800759c: f000 fbc2 bl 8007d24 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
80075a0: 2100 movs r1, #0
80075a2: 6878 ldr r0, [r7, #4]
80075a4: f000 fbbe bl 8007d24 <USBD_LL_StallEP>
}
80075a8: bf00 nop
80075aa: 3708 adds r7, #8
80075ac: 46bd mov sp, r7
80075ae: bd80 pop {r7, pc}
080075b0 <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
80075b0: b580 push {r7, lr}
80075b2: b086 sub sp, #24
80075b4: af00 add r7, sp, #0
80075b6: 60f8 str r0, [r7, #12]
80075b8: 60b9 str r1, [r7, #8]
80075ba: 607a str r2, [r7, #4]
uint8_t idx = 0U;
80075bc: 2300 movs r3, #0
80075be: 75fb strb r3, [r7, #23]
if (desc != NULL)
80075c0: 68fb ldr r3, [r7, #12]
80075c2: 2b00 cmp r3, #0
80075c4: d032 beq.n 800762c <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
80075c6: 68f8 ldr r0, [r7, #12]
80075c8: f000 f834 bl 8007634 <USBD_GetLen>
80075cc: 4603 mov r3, r0
80075ce: 3301 adds r3, #1
80075d0: b29b uxth r3, r3
80075d2: 005b lsls r3, r3, #1
80075d4: b29a uxth r2, r3
80075d6: 687b ldr r3, [r7, #4]
80075d8: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
80075da: 7dfb ldrb r3, [r7, #23]
80075dc: 1c5a adds r2, r3, #1
80075de: 75fa strb r2, [r7, #23]
80075e0: 461a mov r2, r3
80075e2: 68bb ldr r3, [r7, #8]
80075e4: 4413 add r3, r2
80075e6: 687a ldr r2, [r7, #4]
80075e8: 7812 ldrb r2, [r2, #0]
80075ea: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
80075ec: 7dfb ldrb r3, [r7, #23]
80075ee: 1c5a adds r2, r3, #1
80075f0: 75fa strb r2, [r7, #23]
80075f2: 461a mov r2, r3
80075f4: 68bb ldr r3, [r7, #8]
80075f6: 4413 add r3, r2
80075f8: 2203 movs r2, #3
80075fa: 701a strb r2, [r3, #0]
while (*desc != '\0')
80075fc: e012 b.n 8007624 <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
80075fe: 68fb ldr r3, [r7, #12]
8007600: 1c5a adds r2, r3, #1
8007602: 60fa str r2, [r7, #12]
8007604: 7dfa ldrb r2, [r7, #23]
8007606: 1c51 adds r1, r2, #1
8007608: 75f9 strb r1, [r7, #23]
800760a: 4611 mov r1, r2
800760c: 68ba ldr r2, [r7, #8]
800760e: 440a add r2, r1
8007610: 781b ldrb r3, [r3, #0]
8007612: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
8007614: 7dfb ldrb r3, [r7, #23]
8007616: 1c5a adds r2, r3, #1
8007618: 75fa strb r2, [r7, #23]
800761a: 461a mov r2, r3
800761c: 68bb ldr r3, [r7, #8]
800761e: 4413 add r3, r2
8007620: 2200 movs r2, #0
8007622: 701a strb r2, [r3, #0]
while (*desc != '\0')
8007624: 68fb ldr r3, [r7, #12]
8007626: 781b ldrb r3, [r3, #0]
8007628: 2b00 cmp r3, #0
800762a: d1e8 bne.n 80075fe <USBD_GetString+0x4e>
}
}
}
800762c: bf00 nop
800762e: 3718 adds r7, #24
8007630: 46bd mov sp, r7
8007632: bd80 pop {r7, pc}
08007634 <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
8007634: b480 push {r7}
8007636: b085 sub sp, #20
8007638: af00 add r7, sp, #0
800763a: 6078 str r0, [r7, #4]
uint8_t len = 0U;
800763c: 2300 movs r3, #0
800763e: 73fb strb r3, [r7, #15]
while (*buf != '\0')
8007640: e005 b.n 800764e <USBD_GetLen+0x1a>
{
len++;
8007642: 7bfb ldrb r3, [r7, #15]
8007644: 3301 adds r3, #1
8007646: 73fb strb r3, [r7, #15]
buf++;
8007648: 687b ldr r3, [r7, #4]
800764a: 3301 adds r3, #1
800764c: 607b str r3, [r7, #4]
while (*buf != '\0')
800764e: 687b ldr r3, [r7, #4]
8007650: 781b ldrb r3, [r3, #0]
8007652: 2b00 cmp r3, #0
8007654: d1f5 bne.n 8007642 <USBD_GetLen+0xe>
}
return len;
8007656: 7bfb ldrb r3, [r7, #15]
}
8007658: 4618 mov r0, r3
800765a: 3714 adds r7, #20
800765c: 46bd mov sp, r7
800765e: bc80 pop {r7}
8007660: 4770 bx lr
08007662 <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8007662: b580 push {r7, lr}
8007664: b084 sub sp, #16
8007666: af00 add r7, sp, #0
8007668: 60f8 str r0, [r7, #12]
800766a: 60b9 str r1, [r7, #8]
800766c: 4613 mov r3, r2
800766e: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
8007670: 68fb ldr r3, [r7, #12]
8007672: 2202 movs r2, #2
8007674: f8c3 2294 str.w r2, [r3, #660] ; 0x294
pdev->ep_in[0].total_length = len;
8007678: 88fa ldrh r2, [r7, #6]
800767a: 68fb ldr r3, [r7, #12]
800767c: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
800767e: 88fa ldrh r2, [r7, #6]
8007680: 68fb ldr r3, [r7, #12]
8007682: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
8007684: 88fb ldrh r3, [r7, #6]
8007686: 68ba ldr r2, [r7, #8]
8007688: 2100 movs r1, #0
800768a: 68f8 ldr r0, [r7, #12]
800768c: f000 fbd3 bl 8007e36 <USBD_LL_Transmit>
return USBD_OK;
8007690: 2300 movs r3, #0
}
8007692: 4618 mov r0, r3
8007694: 3710 adds r7, #16
8007696: 46bd mov sp, r7
8007698: bd80 pop {r7, pc}
0800769a <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800769a: b580 push {r7, lr}
800769c: b084 sub sp, #16
800769e: af00 add r7, sp, #0
80076a0: 60f8 str r0, [r7, #12]
80076a2: 60b9 str r1, [r7, #8]
80076a4: 4613 mov r3, r2
80076a6: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
80076a8: 88fb ldrh r3, [r7, #6]
80076aa: 68ba ldr r2, [r7, #8]
80076ac: 2100 movs r1, #0
80076ae: 68f8 ldr r0, [r7, #12]
80076b0: f000 fbc1 bl 8007e36 <USBD_LL_Transmit>
return USBD_OK;
80076b4: 2300 movs r3, #0
}
80076b6: 4618 mov r0, r3
80076b8: 3710 adds r7, #16
80076ba: 46bd mov sp, r7
80076bc: bd80 pop {r7, pc}
080076be <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
80076be: b580 push {r7, lr}
80076c0: b084 sub sp, #16
80076c2: af00 add r7, sp, #0
80076c4: 60f8 str r0, [r7, #12]
80076c6: 60b9 str r1, [r7, #8]
80076c8: 4613 mov r3, r2
80076ca: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
80076cc: 68fb ldr r3, [r7, #12]
80076ce: 2203 movs r2, #3
80076d0: f8c3 2294 str.w r2, [r3, #660] ; 0x294
pdev->ep_out[0].total_length = len;
80076d4: 88fa ldrh r2, [r7, #6]
80076d6: 68fb ldr r3, [r7, #12]
80076d8: f8c3 215c str.w r2, [r3, #348] ; 0x15c
pdev->ep_out[0].rem_length = len;
80076dc: 88fa ldrh r2, [r7, #6]
80076de: 68fb ldr r3, [r7, #12]
80076e0: f8c3 2160 str.w r2, [r3, #352] ; 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
80076e4: 88fb ldrh r3, [r7, #6]
80076e6: 68ba ldr r2, [r7, #8]
80076e8: 2100 movs r1, #0
80076ea: 68f8 ldr r0, [r7, #12]
80076ec: f000 fbc6 bl 8007e7c <USBD_LL_PrepareReceive>
return USBD_OK;
80076f0: 2300 movs r3, #0
}
80076f2: 4618 mov r0, r3
80076f4: 3710 adds r7, #16
80076f6: 46bd mov sp, r7
80076f8: bd80 pop {r7, pc}
080076fa <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
80076fa: b580 push {r7, lr}
80076fc: b084 sub sp, #16
80076fe: af00 add r7, sp, #0
8007700: 60f8 str r0, [r7, #12]
8007702: 60b9 str r1, [r7, #8]
8007704: 4613 mov r3, r2
8007706: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
8007708: 88fb ldrh r3, [r7, #6]
800770a: 68ba ldr r2, [r7, #8]
800770c: 2100 movs r1, #0
800770e: 68f8 ldr r0, [r7, #12]
8007710: f000 fbb4 bl 8007e7c <USBD_LL_PrepareReceive>
return USBD_OK;
8007714: 2300 movs r3, #0
}
8007716: 4618 mov r0, r3
8007718: 3710 adds r7, #16
800771a: 46bd mov sp, r7
800771c: bd80 pop {r7, pc}
0800771e <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
800771e: b580 push {r7, lr}
8007720: b082 sub sp, #8
8007722: af00 add r7, sp, #0
8007724: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
8007726: 687b ldr r3, [r7, #4]
8007728: 2204 movs r2, #4
800772a: f8c3 2294 str.w r2, [r3, #660] ; 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
800772e: 2300 movs r3, #0
8007730: 2200 movs r2, #0
8007732: 2100 movs r1, #0
8007734: 6878 ldr r0, [r7, #4]
8007736: f000 fb7e bl 8007e36 <USBD_LL_Transmit>
return USBD_OK;
800773a: 2300 movs r3, #0
}
800773c: 4618 mov r0, r3
800773e: 3708 adds r7, #8
8007740: 46bd mov sp, r7
8007742: bd80 pop {r7, pc}
08007744 <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
8007744: b580 push {r7, lr}
8007746: b082 sub sp, #8
8007748: af00 add r7, sp, #0
800774a: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
800774c: 687b ldr r3, [r7, #4]
800774e: 2205 movs r2, #5
8007750: f8c3 2294 str.w r2, [r3, #660] ; 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8007754: 2300 movs r3, #0
8007756: 2200 movs r2, #0
8007758: 2100 movs r1, #0
800775a: 6878 ldr r0, [r7, #4]
800775c: f000 fb8e bl 8007e7c <USBD_LL_PrepareReceive>
return USBD_OK;
8007760: 2300 movs r3, #0
}
8007762: 4618 mov r0, r3
8007764: 3708 adds r7, #8
8007766: 46bd mov sp, r7
8007768: bd80 pop {r7, pc}
...
0800776c <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
800776c: b580 push {r7, lr}
800776e: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
8007770: 2200 movs r2, #0
8007772: 4912 ldr r1, [pc, #72] ; (80077bc <MX_USB_DEVICE_Init+0x50>)
8007774: 4812 ldr r0, [pc, #72] ; (80077c0 <MX_USB_DEVICE_Init+0x54>)
8007776: f7fe ff37 bl 80065e8 <USBD_Init>
800777a: 4603 mov r3, r0
800777c: 2b00 cmp r3, #0
800777e: d001 beq.n 8007784 <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
8007780: f7f8 fe36 bl 80003f0 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_DFU) != USBD_OK)
8007784: 490f ldr r1, [pc, #60] ; (80077c4 <MX_USB_DEVICE_Init+0x58>)
8007786: 480e ldr r0, [pc, #56] ; (80077c0 <MX_USB_DEVICE_Init+0x54>)
8007788: f7fe ff59 bl 800663e <USBD_RegisterClass>
800778c: 4603 mov r3, r0
800778e: 2b00 cmp r3, #0
8007790: d001 beq.n 8007796 <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
8007792: f7f8 fe2d bl 80003f0 <Error_Handler>
}
if (USBD_DFU_RegisterMedia(&hUsbDeviceFS, &USBD_DFU_fops_FS) != USBD_OK)
8007796: 490c ldr r1, [pc, #48] ; (80077c8 <MX_USB_DEVICE_Init+0x5c>)
8007798: 4809 ldr r0, [pc, #36] ; (80077c0 <MX_USB_DEVICE_Init+0x54>)
800779a: f7fe fbc1 bl 8005f20 <USBD_DFU_RegisterMedia>
800779e: 4603 mov r3, r0
80077a0: 2b00 cmp r3, #0
80077a2: d001 beq.n 80077a8 <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
80077a4: f7f8 fe24 bl 80003f0 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
80077a8: 4805 ldr r0, [pc, #20] ; (80077c0 <MX_USB_DEVICE_Init+0x54>)
80077aa: f7fe ff61 bl 8006670 <USBD_Start>
80077ae: 4603 mov r3, r0
80077b0: 2b00 cmp r3, #0
80077b2: d001 beq.n 80077b8 <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
80077b4: f7f8 fe1c bl 80003f0 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
80077b8: bf00 nop
80077ba: bd80 pop {r7, pc}
80077bc: 20000070 .word 0x20000070
80077c0: 200006e4 .word 0x200006e4
80077c4: 2000000c .word 0x2000000c
80077c8: 200000c0 .word 0x200000c0
080077cc <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80077cc: b480 push {r7}
80077ce: b083 sub sp, #12
80077d0: af00 add r7, sp, #0
80077d2: 4603 mov r3, r0
80077d4: 6039 str r1, [r7, #0]
80077d6: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
80077d8: 683b ldr r3, [r7, #0]
80077da: 2212 movs r2, #18
80077dc: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
80077de: 4b03 ldr r3, [pc, #12] ; (80077ec <USBD_FS_DeviceDescriptor+0x20>)
}
80077e0: 4618 mov r0, r3
80077e2: 370c adds r7, #12
80077e4: 46bd mov sp, r7
80077e6: bc80 pop {r7}
80077e8: 4770 bx lr
80077ea: bf00 nop
80077ec: 2000008c .word 0x2000008c
080077f0 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80077f0: b480 push {r7}
80077f2: b083 sub sp, #12
80077f4: af00 add r7, sp, #0
80077f6: 4603 mov r3, r0
80077f8: 6039 str r1, [r7, #0]
80077fa: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
80077fc: 683b ldr r3, [r7, #0]
80077fe: 2204 movs r2, #4
8007800: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
8007802: 4b03 ldr r3, [pc, #12] ; (8007810 <USBD_FS_LangIDStrDescriptor+0x20>)
}
8007804: 4618 mov r0, r3
8007806: 370c adds r7, #12
8007808: 46bd mov sp, r7
800780a: bc80 pop {r7}
800780c: 4770 bx lr
800780e: bf00 nop
8007810: 200000a0 .word 0x200000a0
08007814 <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8007814: b580 push {r7, lr}
8007816: b082 sub sp, #8
8007818: af00 add r7, sp, #0
800781a: 4603 mov r3, r0
800781c: 6039 str r1, [r7, #0]
800781e: 71fb strb r3, [r7, #7]
if(speed == 0)
8007820: 79fb ldrb r3, [r7, #7]
8007822: 2b00 cmp r3, #0
8007824: d105 bne.n 8007832 <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
8007826: 683a ldr r2, [r7, #0]
8007828: 4907 ldr r1, [pc, #28] ; (8007848 <USBD_FS_ProductStrDescriptor+0x34>)
800782a: 4808 ldr r0, [pc, #32] ; (800784c <USBD_FS_ProductStrDescriptor+0x38>)
800782c: f7ff fec0 bl 80075b0 <USBD_GetString>
8007830: e004 b.n 800783c <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
8007832: 683a ldr r2, [r7, #0]
8007834: 4904 ldr r1, [pc, #16] ; (8007848 <USBD_FS_ProductStrDescriptor+0x34>)
8007836: 4805 ldr r0, [pc, #20] ; (800784c <USBD_FS_ProductStrDescriptor+0x38>)
8007838: f7ff feba bl 80075b0 <USBD_GetString>
}
return USBD_StrDesc;
800783c: 4b02 ldr r3, [pc, #8] ; (8007848 <USBD_FS_ProductStrDescriptor+0x34>)
}
800783e: 4618 mov r0, r3
8007840: 3708 adds r7, #8
8007842: 46bd mov sp, r7
8007844: bd80 pop {r7, pc}
8007846: bf00 nop
8007848: 200009a8 .word 0x200009a8
800784c: 08007fdc .word 0x08007fdc
08007850 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8007850: b580 push {r7, lr}
8007852: b082 sub sp, #8
8007854: af00 add r7, sp, #0
8007856: 4603 mov r3, r0
8007858: 6039 str r1, [r7, #0]
800785a: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
800785c: 683a ldr r2, [r7, #0]
800785e: 4904 ldr r1, [pc, #16] ; (8007870 <USBD_FS_ManufacturerStrDescriptor+0x20>)
8007860: 4804 ldr r0, [pc, #16] ; (8007874 <USBD_FS_ManufacturerStrDescriptor+0x24>)
8007862: f7ff fea5 bl 80075b0 <USBD_GetString>
return USBD_StrDesc;
8007866: 4b02 ldr r3, [pc, #8] ; (8007870 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
8007868: 4618 mov r0, r3
800786a: 3708 adds r7, #8
800786c: 46bd mov sp, r7
800786e: bd80 pop {r7, pc}
8007870: 200009a8 .word 0x200009a8
8007874: 08007ffc .word 0x08007ffc
08007878 <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8007878: b580 push {r7, lr}
800787a: b082 sub sp, #8
800787c: af00 add r7, sp, #0
800787e: 4603 mov r3, r0
8007880: 6039 str r1, [r7, #0]
8007882: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
8007884: 683b ldr r3, [r7, #0]
8007886: 221a movs r2, #26
8007888: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
800788a: f000 f843 bl 8007914 <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
800788e: 4b02 ldr r3, [pc, #8] ; (8007898 <USBD_FS_SerialStrDescriptor+0x20>)
}
8007890: 4618 mov r0, r3
8007892: 3708 adds r7, #8
8007894: 46bd mov sp, r7
8007896: bd80 pop {r7, pc}
8007898: 200000a4 .word 0x200000a4
0800789c <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800789c: b580 push {r7, lr}
800789e: b082 sub sp, #8
80078a0: af00 add r7, sp, #0
80078a2: 4603 mov r3, r0
80078a4: 6039 str r1, [r7, #0]
80078a6: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
80078a8: 79fb ldrb r3, [r7, #7]
80078aa: 2b00 cmp r3, #0
80078ac: d105 bne.n 80078ba <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
80078ae: 683a ldr r2, [r7, #0]
80078b0: 4907 ldr r1, [pc, #28] ; (80078d0 <USBD_FS_ConfigStrDescriptor+0x34>)
80078b2: 4808 ldr r0, [pc, #32] ; (80078d4 <USBD_FS_ConfigStrDescriptor+0x38>)
80078b4: f7ff fe7c bl 80075b0 <USBD_GetString>
80078b8: e004 b.n 80078c4 <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
80078ba: 683a ldr r2, [r7, #0]
80078bc: 4904 ldr r1, [pc, #16] ; (80078d0 <USBD_FS_ConfigStrDescriptor+0x34>)
80078be: 4805 ldr r0, [pc, #20] ; (80078d4 <USBD_FS_ConfigStrDescriptor+0x38>)
80078c0: f7ff fe76 bl 80075b0 <USBD_GetString>
}
return USBD_StrDesc;
80078c4: 4b02 ldr r3, [pc, #8] ; (80078d0 <USBD_FS_ConfigStrDescriptor+0x34>)
}
80078c6: 4618 mov r0, r3
80078c8: 3708 adds r7, #8
80078ca: 46bd mov sp, r7
80078cc: bd80 pop {r7, pc}
80078ce: bf00 nop
80078d0: 200009a8 .word 0x200009a8
80078d4: 08008010 .word 0x08008010
080078d8 <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80078d8: b580 push {r7, lr}
80078da: b082 sub sp, #8
80078dc: af00 add r7, sp, #0
80078de: 4603 mov r3, r0
80078e0: 6039 str r1, [r7, #0]
80078e2: 71fb strb r3, [r7, #7]
if(speed == 0)
80078e4: 79fb ldrb r3, [r7, #7]
80078e6: 2b00 cmp r3, #0
80078e8: d105 bne.n 80078f6 <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
80078ea: 683a ldr r2, [r7, #0]
80078ec: 4907 ldr r1, [pc, #28] ; (800790c <USBD_FS_InterfaceStrDescriptor+0x34>)
80078ee: 4808 ldr r0, [pc, #32] ; (8007910 <USBD_FS_InterfaceStrDescriptor+0x38>)
80078f0: f7ff fe5e bl 80075b0 <USBD_GetString>
80078f4: e004 b.n 8007900 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
80078f6: 683a ldr r2, [r7, #0]
80078f8: 4904 ldr r1, [pc, #16] ; (800790c <USBD_FS_InterfaceStrDescriptor+0x34>)
80078fa: 4805 ldr r0, [pc, #20] ; (8007910 <USBD_FS_InterfaceStrDescriptor+0x38>)
80078fc: f7ff fe58 bl 80075b0 <USBD_GetString>
}
return USBD_StrDesc;
8007900: 4b02 ldr r3, [pc, #8] ; (800790c <USBD_FS_InterfaceStrDescriptor+0x34>)
}
8007902: 4618 mov r0, r3
8007904: 3708 adds r7, #8
8007906: 46bd mov sp, r7
8007908: bd80 pop {r7, pc}
800790a: bf00 nop
800790c: 200009a8 .word 0x200009a8
8007910: 0800801c .word 0x0800801c
08007914 <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
8007914: b580 push {r7, lr}
8007916: b084 sub sp, #16
8007918: af00 add r7, sp, #0
uint32_t deviceserial0, deviceserial1, deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
800791a: 4b0f ldr r3, [pc, #60] ; (8007958 <Get_SerialNum+0x44>)
800791c: 681b ldr r3, [r3, #0]
800791e: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
8007920: 4b0e ldr r3, [pc, #56] ; (800795c <Get_SerialNum+0x48>)
8007922: 681b ldr r3, [r3, #0]
8007924: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
8007926: 4b0e ldr r3, [pc, #56] ; (8007960 <Get_SerialNum+0x4c>)
8007928: 681b ldr r3, [r3, #0]
800792a: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
800792c: 68fa ldr r2, [r7, #12]
800792e: 687b ldr r3, [r7, #4]
8007930: 4413 add r3, r2
8007932: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
8007934: 68fb ldr r3, [r7, #12]
8007936: 2b00 cmp r3, #0
8007938: d009 beq.n 800794e <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
800793a: 2208 movs r2, #8
800793c: 4909 ldr r1, [pc, #36] ; (8007964 <Get_SerialNum+0x50>)
800793e: 68f8 ldr r0, [r7, #12]
8007940: f000 f814 bl 800796c <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
8007944: 2204 movs r2, #4
8007946: 4908 ldr r1, [pc, #32] ; (8007968 <Get_SerialNum+0x54>)
8007948: 68b8 ldr r0, [r7, #8]
800794a: f000 f80f bl 800796c <IntToUnicode>
}
}
800794e: bf00 nop
8007950: 3710 adds r7, #16
8007952: 46bd mov sp, r7
8007954: bd80 pop {r7, pc}
8007956: bf00 nop
8007958: 1ffff7e8 .word 0x1ffff7e8
800795c: 1ffff7ec .word 0x1ffff7ec
8007960: 1ffff7f0 .word 0x1ffff7f0
8007964: 200000a6 .word 0x200000a6
8007968: 200000b6 .word 0x200000b6
0800796c <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
800796c: b480 push {r7}
800796e: b087 sub sp, #28
8007970: af00 add r7, sp, #0
8007972: 60f8 str r0, [r7, #12]
8007974: 60b9 str r1, [r7, #8]
8007976: 4613 mov r3, r2
8007978: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
800797a: 2300 movs r3, #0
800797c: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
800797e: 2300 movs r3, #0
8007980: 75fb strb r3, [r7, #23]
8007982: e027 b.n 80079d4 <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
8007984: 68fb ldr r3, [r7, #12]
8007986: 0f1b lsrs r3, r3, #28
8007988: 2b09 cmp r3, #9
800798a: d80b bhi.n 80079a4 <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
800798c: 68fb ldr r3, [r7, #12]
800798e: 0f1b lsrs r3, r3, #28
8007990: b2da uxtb r2, r3
8007992: 7dfb ldrb r3, [r7, #23]
8007994: 005b lsls r3, r3, #1
8007996: 4619 mov r1, r3
8007998: 68bb ldr r3, [r7, #8]
800799a: 440b add r3, r1
800799c: 3230 adds r2, #48 ; 0x30
800799e: b2d2 uxtb r2, r2
80079a0: 701a strb r2, [r3, #0]
80079a2: e00a b.n 80079ba <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
80079a4: 68fb ldr r3, [r7, #12]
80079a6: 0f1b lsrs r3, r3, #28
80079a8: b2da uxtb r2, r3
80079aa: 7dfb ldrb r3, [r7, #23]
80079ac: 005b lsls r3, r3, #1
80079ae: 4619 mov r1, r3
80079b0: 68bb ldr r3, [r7, #8]
80079b2: 440b add r3, r1
80079b4: 3237 adds r2, #55 ; 0x37
80079b6: b2d2 uxtb r2, r2
80079b8: 701a strb r2, [r3, #0]
}
value = value << 4;
80079ba: 68fb ldr r3, [r7, #12]
80079bc: 011b lsls r3, r3, #4
80079be: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
80079c0: 7dfb ldrb r3, [r7, #23]
80079c2: 005b lsls r3, r3, #1
80079c4: 3301 adds r3, #1
80079c6: 68ba ldr r2, [r7, #8]
80079c8: 4413 add r3, r2
80079ca: 2200 movs r2, #0
80079cc: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
80079ce: 7dfb ldrb r3, [r7, #23]
80079d0: 3301 adds r3, #1
80079d2: 75fb strb r3, [r7, #23]
80079d4: 7dfa ldrb r2, [r7, #23]
80079d6: 79fb ldrb r3, [r7, #7]
80079d8: 429a cmp r2, r3
80079da: d3d3 bcc.n 8007984 <IntToUnicode+0x18>
}
}
80079dc: bf00 nop
80079de: bf00 nop
80079e0: 371c adds r7, #28
80079e2: 46bd mov sp, r7
80079e4: bc80 pop {r7}
80079e6: 4770 bx lr
080079e8 <MEM_If_Init_FS>:
/**
* @brief Memory initialization routine.
* @retval USBD_OK if operation is successful, MAL_FAIL else.
*/
uint16_t MEM_If_Init_FS(void)
{
80079e8: b480 push {r7}
80079ea: af00 add r7, sp, #0
/* USER CODE BEGIN 0 */
return (USBD_OK);
80079ec: 2300 movs r3, #0
/* USER CODE END 0 */
}
80079ee: 4618 mov r0, r3
80079f0: 46bd mov sp, r7
80079f2: bc80 pop {r7}
80079f4: 4770 bx lr
080079f6 <MEM_If_DeInit_FS>:
/**
* @brief De-Initializes Memory
* @retval USBD_OK if operation is successful, MAL_FAIL else
*/
uint16_t MEM_If_DeInit_FS(void)
{
80079f6: b480 push {r7}
80079f8: af00 add r7, sp, #0
/* USER CODE BEGIN 1 */
return (USBD_OK);
80079fa: 2300 movs r3, #0
/* USER CODE END 1 */
}
80079fc: 4618 mov r0, r3
80079fe: 46bd mov sp, r7
8007a00: bc80 pop {r7}
8007a02: 4770 bx lr
08007a04 <MEM_If_Erase_FS>:
* @brief Erase sector.
* @param Add: Address of sector to be erased.
* @retval 0 if operation is successful, MAL_FAIL else.
*/
uint16_t MEM_If_Erase_FS(uint32_t Add)
{
8007a04: b480 push {r7}
8007a06: b083 sub sp, #12
8007a08: af00 add r7, sp, #0
8007a0a: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 2 */
return (USBD_OK);
8007a0c: 2300 movs r3, #0
/* USER CODE END 2 */
}
8007a0e: 4618 mov r0, r3
8007a10: 370c adds r7, #12
8007a12: 46bd mov sp, r7
8007a14: bc80 pop {r7}
8007a16: 4770 bx lr
08007a18 <MEM_If_Write_FS>:
* @param dest: Pointer to the destination buffer.
* @param Len: Number of data to be written (in bytes).
* @retval USBD_OK if operation is successful, MAL_FAIL else.
*/
uint16_t MEM_If_Write_FS(uint8_t *src, uint8_t *dest, uint32_t Len)
{
8007a18: b480 push {r7}
8007a1a: b085 sub sp, #20
8007a1c: af00 add r7, sp, #0
8007a1e: 60f8 str r0, [r7, #12]
8007a20: 60b9 str r1, [r7, #8]
8007a22: 607a str r2, [r7, #4]
/* USER CODE BEGIN 3 */
return (USBD_OK);
8007a24: 2300 movs r3, #0
/* USER CODE END 3 */
}
8007a26: 4618 mov r0, r3
8007a28: 3714 adds r7, #20
8007a2a: 46bd mov sp, r7
8007a2c: bc80 pop {r7}
8007a2e: 4770 bx lr
08007a30 <MEM_If_Read_FS>:
* @param dest: Pointer to the destination buffer.
* @param Len: Number of data to be read (in bytes).
* @retval Pointer to the physical address where data should be read.
*/
uint8_t *MEM_If_Read_FS(uint8_t *src, uint8_t *dest, uint32_t Len)
{
8007a30: b480 push {r7}
8007a32: b085 sub sp, #20
8007a34: af00 add r7, sp, #0
8007a36: 60f8 str r0, [r7, #12]
8007a38: 60b9 str r1, [r7, #8]
8007a3a: 607a str r2, [r7, #4]
/* Return a valid address to avoid HardFault */
/* USER CODE BEGIN 4 */
return (uint8_t*)(USBD_OK);
8007a3c: 2300 movs r3, #0
/* USER CODE END 4 */
}
8007a3e: 4618 mov r0, r3
8007a40: 3714 adds r7, #20
8007a42: 46bd mov sp, r7
8007a44: bc80 pop {r7}
8007a46: 4770 bx lr
08007a48 <MEM_If_GetStatus_FS>:
* @param Cmd: Number of data to be read (in bytes)
* @param buffer: used for returning the time necessary for a program or an erase operation
* @retval USBD_OK if operation is successful
*/
uint16_t MEM_If_GetStatus_FS(uint32_t Add, uint8_t Cmd, uint8_t *buffer)
{
8007a48: b480 push {r7}
8007a4a: b085 sub sp, #20
8007a4c: af00 add r7, sp, #0
8007a4e: 60f8 str r0, [r7, #12]
8007a50: 460b mov r3, r1
8007a52: 607a str r2, [r7, #4]
8007a54: 72fb strb r3, [r7, #11]
/* USER CODE BEGIN 5 */
switch (Cmd)
8007a56: 7afb ldrb r3, [r7, #11]
8007a58: 2b01 cmp r3, #1
break;
case DFU_MEDIA_ERASE:
default:
break;
8007a5a: bf00 nop
}
return (USBD_OK);
8007a5c: 2300 movs r3, #0
/* USER CODE END 5 */
}
8007a5e: 4618 mov r0, r3
8007a60: 3714 adds r7, #20
8007a62: 46bd mov sp, r7
8007a64: bc80 pop {r7}
8007a66: 4770 bx lr
08007a68 <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
8007a68: b580 push {r7, lr}
8007a6a: b084 sub sp, #16
8007a6c: af00 add r7, sp, #0
8007a6e: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
8007a70: 687b ldr r3, [r7, #4]
8007a72: 681b ldr r3, [r3, #0]
8007a74: 4a0d ldr r2, [pc, #52] ; (8007aac <HAL_PCD_MspInit+0x44>)
8007a76: 4293 cmp r3, r2
8007a78: d113 bne.n 8007aa2 <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
8007a7a: 4b0d ldr r3, [pc, #52] ; (8007ab0 <HAL_PCD_MspInit+0x48>)
8007a7c: 69db ldr r3, [r3, #28]
8007a7e: 4a0c ldr r2, [pc, #48] ; (8007ab0 <HAL_PCD_MspInit+0x48>)
8007a80: f443 0300 orr.w r3, r3, #8388608 ; 0x800000
8007a84: 61d3 str r3, [r2, #28]
8007a86: 4b0a ldr r3, [pc, #40] ; (8007ab0 <HAL_PCD_MspInit+0x48>)
8007a88: 69db ldr r3, [r3, #28]
8007a8a: f403 0300 and.w r3, r3, #8388608 ; 0x800000
8007a8e: 60fb str r3, [r7, #12]
8007a90: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
8007a92: 2200 movs r2, #0
8007a94: 2100 movs r1, #0
8007a96: 2014 movs r0, #20
8007a98: f7f9 f975 bl 8000d86 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
8007a9c: 2014 movs r0, #20
8007a9e: f7f9 f98e bl 8000dbe <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
8007aa2: bf00 nop
8007aa4: 3710 adds r7, #16
8007aa6: 46bd mov sp, r7
8007aa8: bd80 pop {r7, pc}
8007aaa: bf00 nop
8007aac: 40005c00 .word 0x40005c00
8007ab0: 40021000 .word 0x40021000
08007ab4 <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8007ab4: b580 push {r7, lr}
8007ab6: b082 sub sp, #8
8007ab8: af00 add r7, sp, #0
8007aba: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
8007abc: 687b ldr r3, [r7, #4]
8007abe: f8d3 22e8 ldr.w r2, [r3, #744] ; 0x2e8
8007ac2: 687b ldr r3, [r7, #4]
8007ac4: f503 732c add.w r3, r3, #688 ; 0x2b0
8007ac8: 4619 mov r1, r3
8007aca: 4610 mov r0, r2
8007acc: f7fe fe2e bl 800672c <USBD_LL_SetupStage>
}
8007ad0: bf00 nop
8007ad2: 3708 adds r7, #8
8007ad4: 46bd mov sp, r7
8007ad6: bd80 pop {r7, pc}
08007ad8 <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8007ad8: b580 push {r7, lr}
8007ada: b082 sub sp, #8
8007adc: af00 add r7, sp, #0
8007ade: 6078 str r0, [r7, #4]
8007ae0: 460b mov r3, r1
8007ae2: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
8007ae4: 687b ldr r3, [r7, #4]
8007ae6: f8d3 02e8 ldr.w r0, [r3, #744] ; 0x2e8
8007aea: 78fa ldrb r2, [r7, #3]
8007aec: 6879 ldr r1, [r7, #4]
8007aee: 4613 mov r3, r2
8007af0: 009b lsls r3, r3, #2
8007af2: 4413 add r3, r2
8007af4: 00db lsls r3, r3, #3
8007af6: 440b add r3, r1
8007af8: f503 73be add.w r3, r3, #380 ; 0x17c
8007afc: 681a ldr r2, [r3, #0]
8007afe: 78fb ldrb r3, [r7, #3]
8007b00: 4619 mov r1, r3
8007b02: f7fe fe60 bl 80067c6 <USBD_LL_DataOutStage>
}
8007b06: bf00 nop
8007b08: 3708 adds r7, #8
8007b0a: 46bd mov sp, r7
8007b0c: bd80 pop {r7, pc}
08007b0e <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8007b0e: b580 push {r7, lr}
8007b10: b082 sub sp, #8
8007b12: af00 add r7, sp, #0
8007b14: 6078 str r0, [r7, #4]
8007b16: 460b mov r3, r1
8007b18: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
8007b1a: 687b ldr r3, [r7, #4]
8007b1c: f8d3 02e8 ldr.w r0, [r3, #744] ; 0x2e8
8007b20: 78fa ldrb r2, [r7, #3]
8007b22: 6879 ldr r1, [r7, #4]
8007b24: 4613 mov r3, r2
8007b26: 009b lsls r3, r3, #2
8007b28: 4413 add r3, r2
8007b2a: 00db lsls r3, r3, #3
8007b2c: 440b add r3, r1
8007b2e: 333c adds r3, #60 ; 0x3c
8007b30: 681a ldr r2, [r3, #0]
8007b32: 78fb ldrb r3, [r7, #3]
8007b34: 4619 mov r1, r3
8007b36: f7fe feb7 bl 80068a8 <USBD_LL_DataInStage>
}
8007b3a: bf00 nop
8007b3c: 3708 adds r7, #8
8007b3e: 46bd mov sp, r7
8007b40: bd80 pop {r7, pc}
08007b42 <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8007b42: b580 push {r7, lr}
8007b44: b082 sub sp, #8
8007b46: af00 add r7, sp, #0
8007b48: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
8007b4a: 687b ldr r3, [r7, #4]
8007b4c: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
8007b50: 4618 mov r0, r3
8007b52: f7fe ffc7 bl 8006ae4 <USBD_LL_SOF>
}
8007b56: bf00 nop
8007b58: 3708 adds r7, #8
8007b5a: 46bd mov sp, r7
8007b5c: bd80 pop {r7, pc}
08007b5e <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8007b5e: b580 push {r7, lr}
8007b60: b084 sub sp, #16
8007b62: af00 add r7, sp, #0
8007b64: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
8007b66: 2301 movs r3, #1
8007b68: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
8007b6a: 687b ldr r3, [r7, #4]
8007b6c: 689b ldr r3, [r3, #8]
8007b6e: 2b02 cmp r3, #2
8007b70: d001 beq.n 8007b76 <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
8007b72: f7f8 fc3d bl 80003f0 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
8007b76: 687b ldr r3, [r7, #4]
8007b78: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
8007b7c: 7bfa ldrb r2, [r7, #15]
8007b7e: 4611 mov r1, r2
8007b80: 4618 mov r0, r3
8007b82: f7fe ff77 bl 8006a74 <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
8007b86: 687b ldr r3, [r7, #4]
8007b88: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
8007b8c: 4618 mov r0, r3
8007b8e: f7fe ff30 bl 80069f2 <USBD_LL_Reset>
}
8007b92: bf00 nop
8007b94: 3710 adds r7, #16
8007b96: 46bd mov sp, r7
8007b98: bd80 pop {r7, pc}
...
08007b9c <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8007b9c: b580 push {r7, lr}
8007b9e: b082 sub sp, #8
8007ba0: af00 add r7, sp, #0
8007ba2: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
8007ba4: 687b ldr r3, [r7, #4]
8007ba6: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
8007baa: 4618 mov r0, r3
8007bac: f7fe ff71 bl 8006a92 <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
8007bb0: 687b ldr r3, [r7, #4]
8007bb2: 699b ldr r3, [r3, #24]
8007bb4: 2b00 cmp r3, #0
8007bb6: d005 beq.n 8007bc4 <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
8007bb8: 4b04 ldr r3, [pc, #16] ; (8007bcc <HAL_PCD_SuspendCallback+0x30>)
8007bba: 691b ldr r3, [r3, #16]
8007bbc: 4a03 ldr r2, [pc, #12] ; (8007bcc <HAL_PCD_SuspendCallback+0x30>)
8007bbe: f043 0306 orr.w r3, r3, #6
8007bc2: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
8007bc4: bf00 nop
8007bc6: 3708 adds r7, #8
8007bc8: 46bd mov sp, r7
8007bca: bd80 pop {r7, pc}
8007bcc: e000ed00 .word 0xe000ed00
08007bd0 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8007bd0: b580 push {r7, lr}
8007bd2: b082 sub sp, #8
8007bd4: af00 add r7, sp, #0
8007bd6: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
8007bd8: 687b ldr r3, [r7, #4]
8007bda: f8d3 32e8 ldr.w r3, [r3, #744] ; 0x2e8
8007bde: 4618 mov r0, r3
8007be0: f7fe ff6b bl 8006aba <USBD_LL_Resume>
}
8007be4: bf00 nop
8007be6: 3708 adds r7, #8
8007be8: 46bd mov sp, r7
8007bea: bd80 pop {r7, pc}
08007bec <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
8007bec: b580 push {r7, lr}
8007bee: b082 sub sp, #8
8007bf0: af00 add r7, sp, #0
8007bf2: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
8007bf4: 4a1b ldr r2, [pc, #108] ; (8007c64 <USBD_LL_Init+0x78>)
8007bf6: 687b ldr r3, [r7, #4]
8007bf8: f8c2 32e8 str.w r3, [r2, #744] ; 0x2e8
pdev->pData = &hpcd_USB_FS;
8007bfc: 687b ldr r3, [r7, #4]
8007bfe: 4a19 ldr r2, [pc, #100] ; (8007c64 <USBD_LL_Init+0x78>)
8007c00: f8c3 22c0 str.w r2, [r3, #704] ; 0x2c0
hpcd_USB_FS.Instance = USB;
8007c04: 4b17 ldr r3, [pc, #92] ; (8007c64 <USBD_LL_Init+0x78>)
8007c06: 4a18 ldr r2, [pc, #96] ; (8007c68 <USBD_LL_Init+0x7c>)
8007c08: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
8007c0a: 4b16 ldr r3, [pc, #88] ; (8007c64 <USBD_LL_Init+0x78>)
8007c0c: 2208 movs r2, #8
8007c0e: 605a str r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
8007c10: 4b14 ldr r3, [pc, #80] ; (8007c64 <USBD_LL_Init+0x78>)
8007c12: 2202 movs r2, #2
8007c14: 609a str r2, [r3, #8]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
8007c16: 4b13 ldr r3, [pc, #76] ; (8007c64 <USBD_LL_Init+0x78>)
8007c18: 2200 movs r2, #0
8007c1a: 619a str r2, [r3, #24]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
8007c1c: 4b11 ldr r3, [pc, #68] ; (8007c64 <USBD_LL_Init+0x78>)
8007c1e: 2200 movs r2, #0
8007c20: 61da str r2, [r3, #28]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
8007c22: 4b10 ldr r3, [pc, #64] ; (8007c64 <USBD_LL_Init+0x78>)
8007c24: 2200 movs r2, #0
8007c26: 621a str r2, [r3, #32]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
8007c28: 480e ldr r0, [pc, #56] ; (8007c64 <USBD_LL_Init+0x78>)
8007c2a: f7f9 fbab bl 8001384 <HAL_PCD_Init>
8007c2e: 4603 mov r3, r0
8007c30: 2b00 cmp r3, #0
8007c32: d001 beq.n 8007c38 <USBD_LL_Init+0x4c>
{
Error_Handler( );
8007c34: f7f8 fbdc bl 80003f0 <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
8007c38: 687b ldr r3, [r7, #4]
8007c3a: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
8007c3e: 2318 movs r3, #24
8007c40: 2200 movs r2, #0
8007c42: 2100 movs r1, #0
8007c44: f7fa ffe8 bl 8002c18 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
8007c48: 687b ldr r3, [r7, #4]
8007c4a: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
8007c4e: 2358 movs r3, #88 ; 0x58
8007c50: 2200 movs r2, #0
8007c52: 2180 movs r1, #128 ; 0x80
8007c54: f7fa ffe0 bl 8002c18 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
return USBD_OK;
8007c58: 2300 movs r3, #0
}
8007c5a: 4618 mov r0, r3
8007c5c: 3708 adds r7, #8
8007c5e: 46bd mov sp, r7
8007c60: bd80 pop {r7, pc}
8007c62: bf00 nop
8007c64: 20000ba8 .word 0x20000ba8
8007c68: 40005c00 .word 0x40005c00
08007c6c <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
8007c6c: b580 push {r7, lr}
8007c6e: b084 sub sp, #16
8007c70: af00 add r7, sp, #0
8007c72: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
8007c74: 2300 movs r3, #0
8007c76: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8007c78: 2300 movs r3, #0
8007c7a: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
8007c7c: 687b ldr r3, [r7, #4]
8007c7e: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8007c82: 4618 mov r0, r3
8007c84: f7f9 fc89 bl 800159a <HAL_PCD_Start>
8007c88: 4603 mov r3, r0
8007c8a: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8007c8c: 7bfb ldrb r3, [r7, #15]
8007c8e: 4618 mov r0, r3
8007c90: f000 f938 bl 8007f04 <USBD_Get_USB_Status>
8007c94: 4603 mov r3, r0
8007c96: 73bb strb r3, [r7, #14]
return usb_status;
8007c98: 7bbb ldrb r3, [r7, #14]
}
8007c9a: 4618 mov r0, r3
8007c9c: 3710 adds r7, #16
8007c9e: 46bd mov sp, r7
8007ca0: bd80 pop {r7, pc}
08007ca2 <USBD_LL_Stop>:
* @brief Stops the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev)
{
8007ca2: b580 push {r7, lr}
8007ca4: b084 sub sp, #16
8007ca6: af00 add r7, sp, #0
8007ca8: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
8007caa: 2300 movs r3, #0
8007cac: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8007cae: 2300 movs r3, #0
8007cb0: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Stop(pdev->pData);
8007cb2: 687b ldr r3, [r7, #4]
8007cb4: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8007cb8: 4618 mov r0, r3
8007cba: f7f9 fc94 bl 80015e6 <HAL_PCD_Stop>
8007cbe: 4603 mov r3, r0
8007cc0: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8007cc2: 7bfb ldrb r3, [r7, #15]
8007cc4: 4618 mov r0, r3
8007cc6: f000 f91d bl 8007f04 <USBD_Get_USB_Status>
8007cca: 4603 mov r3, r0
8007ccc: 73bb strb r3, [r7, #14]
return usb_status;
8007cce: 7bbb ldrb r3, [r7, #14]
}
8007cd0: 4618 mov r0, r3
8007cd2: 3710 adds r7, #16
8007cd4: 46bd mov sp, r7
8007cd6: bd80 pop {r7, pc}
08007cd8 <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
8007cd8: b580 push {r7, lr}
8007cda: b084 sub sp, #16
8007cdc: af00 add r7, sp, #0
8007cde: 6078 str r0, [r7, #4]
8007ce0: 4608 mov r0, r1
8007ce2: 4611 mov r1, r2
8007ce4: 461a mov r2, r3
8007ce6: 4603 mov r3, r0
8007ce8: 70fb strb r3, [r7, #3]
8007cea: 460b mov r3, r1
8007cec: 70bb strb r3, [r7, #2]
8007cee: 4613 mov r3, r2
8007cf0: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
8007cf2: 2300 movs r3, #0
8007cf4: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8007cf6: 2300 movs r3, #0
8007cf8: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
8007cfa: 687b ldr r3, [r7, #4]
8007cfc: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
8007d00: 78bb ldrb r3, [r7, #2]
8007d02: 883a ldrh r2, [r7, #0]
8007d04: 78f9 ldrb r1, [r7, #3]
8007d06: f7f9 fe0e bl 8001926 <HAL_PCD_EP_Open>
8007d0a: 4603 mov r3, r0
8007d0c: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8007d0e: 7bfb ldrb r3, [r7, #15]
8007d10: 4618 mov r0, r3
8007d12: f000 f8f7 bl 8007f04 <USBD_Get_USB_Status>
8007d16: 4603 mov r3, r0
8007d18: 73bb strb r3, [r7, #14]
return usb_status;
8007d1a: 7bbb ldrb r3, [r7, #14]
}
8007d1c: 4618 mov r0, r3
8007d1e: 3710 adds r7, #16
8007d20: 46bd mov sp, r7
8007d22: bd80 pop {r7, pc}
08007d24 <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8007d24: b580 push {r7, lr}
8007d26: b084 sub sp, #16
8007d28: af00 add r7, sp, #0
8007d2a: 6078 str r0, [r7, #4]
8007d2c: 460b mov r3, r1
8007d2e: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8007d30: 2300 movs r3, #0
8007d32: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8007d34: 2300 movs r3, #0
8007d36: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
8007d38: 687b ldr r3, [r7, #4]
8007d3a: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8007d3e: 78fa ldrb r2, [r7, #3]
8007d40: 4611 mov r1, r2
8007d42: 4618 mov r0, r3
8007d44: f7f9 fed5 bl 8001af2 <HAL_PCD_EP_SetStall>
8007d48: 4603 mov r3, r0
8007d4a: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8007d4c: 7bfb ldrb r3, [r7, #15]
8007d4e: 4618 mov r0, r3
8007d50: f000 f8d8 bl 8007f04 <USBD_Get_USB_Status>
8007d54: 4603 mov r3, r0
8007d56: 73bb strb r3, [r7, #14]
return usb_status;
8007d58: 7bbb ldrb r3, [r7, #14]
}
8007d5a: 4618 mov r0, r3
8007d5c: 3710 adds r7, #16
8007d5e: 46bd mov sp, r7
8007d60: bd80 pop {r7, pc}
08007d62 <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8007d62: b580 push {r7, lr}
8007d64: b084 sub sp, #16
8007d66: af00 add r7, sp, #0
8007d68: 6078 str r0, [r7, #4]
8007d6a: 460b mov r3, r1
8007d6c: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8007d6e: 2300 movs r3, #0
8007d70: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8007d72: 2300 movs r3, #0
8007d74: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
8007d76: 687b ldr r3, [r7, #4]
8007d78: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8007d7c: 78fa ldrb r2, [r7, #3]
8007d7e: 4611 mov r1, r2
8007d80: 4618 mov r0, r3
8007d82: f7f9 ff16 bl 8001bb2 <HAL_PCD_EP_ClrStall>
8007d86: 4603 mov r3, r0
8007d88: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8007d8a: 7bfb ldrb r3, [r7, #15]
8007d8c: 4618 mov r0, r3
8007d8e: f000 f8b9 bl 8007f04 <USBD_Get_USB_Status>
8007d92: 4603 mov r3, r0
8007d94: 73bb strb r3, [r7, #14]
return usb_status;
8007d96: 7bbb ldrb r3, [r7, #14]
}
8007d98: 4618 mov r0, r3
8007d9a: 3710 adds r7, #16
8007d9c: 46bd mov sp, r7
8007d9e: bd80 pop {r7, pc}
08007da0 <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8007da0: b480 push {r7}
8007da2: b085 sub sp, #20
8007da4: af00 add r7, sp, #0
8007da6: 6078 str r0, [r7, #4]
8007da8: 460b mov r3, r1
8007daa: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
8007dac: 687b ldr r3, [r7, #4]
8007dae: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8007db2: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
8007db4: f997 3003 ldrsb.w r3, [r7, #3]
8007db8: 2b00 cmp r3, #0
8007dba: da0c bge.n 8007dd6 <USBD_LL_IsStallEP+0x36>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
8007dbc: 78fb ldrb r3, [r7, #3]
8007dbe: f003 037f and.w r3, r3, #127 ; 0x7f
8007dc2: 68f9 ldr r1, [r7, #12]
8007dc4: 1c5a adds r2, r3, #1
8007dc6: 4613 mov r3, r2
8007dc8: 009b lsls r3, r3, #2
8007dca: 4413 add r3, r2
8007dcc: 00db lsls r3, r3, #3
8007dce: 440b add r3, r1
8007dd0: 3302 adds r3, #2
8007dd2: 781b ldrb r3, [r3, #0]
8007dd4: e00b b.n 8007dee <USBD_LL_IsStallEP+0x4e>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
8007dd6: 78fb ldrb r3, [r7, #3]
8007dd8: f003 027f and.w r2, r3, #127 ; 0x7f
8007ddc: 68f9 ldr r1, [r7, #12]
8007dde: 4613 mov r3, r2
8007de0: 009b lsls r3, r3, #2
8007de2: 4413 add r3, r2
8007de4: 00db lsls r3, r3, #3
8007de6: 440b add r3, r1
8007de8: f503 73b5 add.w r3, r3, #362 ; 0x16a
8007dec: 781b ldrb r3, [r3, #0]
}
}
8007dee: 4618 mov r0, r3
8007df0: 3714 adds r7, #20
8007df2: 46bd mov sp, r7
8007df4: bc80 pop {r7}
8007df6: 4770 bx lr
08007df8 <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
8007df8: b580 push {r7, lr}
8007dfa: b084 sub sp, #16
8007dfc: af00 add r7, sp, #0
8007dfe: 6078 str r0, [r7, #4]
8007e00: 460b mov r3, r1
8007e02: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8007e04: 2300 movs r3, #0
8007e06: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8007e08: 2300 movs r3, #0
8007e0a: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
8007e0c: 687b ldr r3, [r7, #4]
8007e0e: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8007e12: 78fa ldrb r2, [r7, #3]
8007e14: 4611 mov r1, r2
8007e16: 4618 mov r0, r3
8007e18: f7f9 fd60 bl 80018dc <HAL_PCD_SetAddress>
8007e1c: 4603 mov r3, r0
8007e1e: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8007e20: 7bfb ldrb r3, [r7, #15]
8007e22: 4618 mov r0, r3
8007e24: f000 f86e bl 8007f04 <USBD_Get_USB_Status>
8007e28: 4603 mov r3, r0
8007e2a: 73bb strb r3, [r7, #14]
return usb_status;
8007e2c: 7bbb ldrb r3, [r7, #14]
}
8007e2e: 4618 mov r0, r3
8007e30: 3710 adds r7, #16
8007e32: 46bd mov sp, r7
8007e34: bd80 pop {r7, pc}
08007e36 <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
8007e36: b580 push {r7, lr}
8007e38: b086 sub sp, #24
8007e3a: af00 add r7, sp, #0
8007e3c: 60f8 str r0, [r7, #12]
8007e3e: 607a str r2, [r7, #4]
8007e40: 461a mov r2, r3
8007e42: 460b mov r3, r1
8007e44: 72fb strb r3, [r7, #11]
8007e46: 4613 mov r3, r2
8007e48: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
8007e4a: 2300 movs r3, #0
8007e4c: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
8007e4e: 2300 movs r3, #0
8007e50: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
8007e52: 68fb ldr r3, [r7, #12]
8007e54: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
8007e58: 893b ldrh r3, [r7, #8]
8007e5a: 7af9 ldrb r1, [r7, #11]
8007e5c: 687a ldr r2, [r7, #4]
8007e5e: f7f9 fe05 bl 8001a6c <HAL_PCD_EP_Transmit>
8007e62: 4603 mov r3, r0
8007e64: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
8007e66: 7dfb ldrb r3, [r7, #23]
8007e68: 4618 mov r0, r3
8007e6a: f000 f84b bl 8007f04 <USBD_Get_USB_Status>
8007e6e: 4603 mov r3, r0
8007e70: 75bb strb r3, [r7, #22]
return usb_status;
8007e72: 7dbb ldrb r3, [r7, #22]
}
8007e74: 4618 mov r0, r3
8007e76: 3718 adds r7, #24
8007e78: 46bd mov sp, r7
8007e7a: bd80 pop {r7, pc}
08007e7c <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
8007e7c: b580 push {r7, lr}
8007e7e: b086 sub sp, #24
8007e80: af00 add r7, sp, #0
8007e82: 60f8 str r0, [r7, #12]
8007e84: 607a str r2, [r7, #4]
8007e86: 461a mov r2, r3
8007e88: 460b mov r3, r1
8007e8a: 72fb strb r3, [r7, #11]
8007e8c: 4613 mov r3, r2
8007e8e: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
8007e90: 2300 movs r3, #0
8007e92: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
8007e94: 2300 movs r3, #0
8007e96: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
8007e98: 68fb ldr r3, [r7, #12]
8007e9a: f8d3 02c0 ldr.w r0, [r3, #704] ; 0x2c0
8007e9e: 893b ldrh r3, [r7, #8]
8007ea0: 7af9 ldrb r1, [r7, #11]
8007ea2: 687a ldr r2, [r7, #4]
8007ea4: f7f9 fda5 bl 80019f2 <HAL_PCD_EP_Receive>
8007ea8: 4603 mov r3, r0
8007eaa: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
8007eac: 7dfb ldrb r3, [r7, #23]
8007eae: 4618 mov r0, r3
8007eb0: f000 f828 bl 8007f04 <USBD_Get_USB_Status>
8007eb4: 4603 mov r3, r0
8007eb6: 75bb strb r3, [r7, #22]
return usb_status;
8007eb8: 7dbb ldrb r3, [r7, #22]
}
8007eba: 4618 mov r0, r3
8007ebc: 3718 adds r7, #24
8007ebe: 46bd mov sp, r7
8007ec0: bd80 pop {r7, pc}
...
08007ec4 <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
8007ec4: b480 push {r7}
8007ec6: b083 sub sp, #12
8007ec8: af00 add r7, sp, #0
8007eca: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_DFU_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
8007ecc: 4b02 ldr r3, [pc, #8] ; (8007ed8 <USBD_static_malloc+0x14>)
}
8007ece: 4618 mov r0, r3
8007ed0: 370c adds r7, #12
8007ed2: 46bd mov sp, r7
8007ed4: bc80 pop {r7}
8007ed6: 4770 bx lr
8007ed8: 200001f8 .word 0x200001f8
08007edc <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
8007edc: b480 push {r7}
8007ede: b083 sub sp, #12
8007ee0: af00 add r7, sp, #0
8007ee2: 6078 str r0, [r7, #4]
}
8007ee4: bf00 nop
8007ee6: 370c adds r7, #12
8007ee8: 46bd mov sp, r7
8007eea: bc80 pop {r7}
8007eec: 4770 bx lr
08007eee <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8007eee: b480 push {r7}
8007ef0: b083 sub sp, #12
8007ef2: af00 add r7, sp, #0
8007ef4: 6078 str r0, [r7, #4]
8007ef6: 460b mov r3, r1
8007ef8: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
8007efa: bf00 nop
8007efc: 370c adds r7, #12
8007efe: 46bd mov sp, r7
8007f00: bc80 pop {r7}
8007f02: 4770 bx lr
08007f04 <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
8007f04: b480 push {r7}
8007f06: b085 sub sp, #20
8007f08: af00 add r7, sp, #0
8007f0a: 4603 mov r3, r0
8007f0c: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
8007f0e: 2300 movs r3, #0
8007f10: 73fb strb r3, [r7, #15]
switch (hal_status)
8007f12: 79fb ldrb r3, [r7, #7]
8007f14: 2b03 cmp r3, #3
8007f16: d817 bhi.n 8007f48 <USBD_Get_USB_Status+0x44>
8007f18: a201 add r2, pc, #4 ; (adr r2, 8007f20 <USBD_Get_USB_Status+0x1c>)
8007f1a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007f1e: bf00 nop
8007f20: 08007f31 .word 0x08007f31
8007f24: 08007f37 .word 0x08007f37
8007f28: 08007f3d .word 0x08007f3d
8007f2c: 08007f43 .word 0x08007f43
{
case HAL_OK :
usb_status = USBD_OK;
8007f30: 2300 movs r3, #0
8007f32: 73fb strb r3, [r7, #15]
break;
8007f34: e00b b.n 8007f4e <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
8007f36: 2302 movs r3, #2
8007f38: 73fb strb r3, [r7, #15]
break;
8007f3a: e008 b.n 8007f4e <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
8007f3c: 2301 movs r3, #1
8007f3e: 73fb strb r3, [r7, #15]
break;
8007f40: e005 b.n 8007f4e <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
8007f42: 2302 movs r3, #2
8007f44: 73fb strb r3, [r7, #15]
break;
8007f46: e002 b.n 8007f4e <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
8007f48: 2302 movs r3, #2
8007f4a: 73fb strb r3, [r7, #15]
break;
8007f4c: bf00 nop
}
return usb_status;
8007f4e: 7bfb ldrb r3, [r7, #15]
}
8007f50: 4618 mov r0, r3
8007f52: 3714 adds r7, #20
8007f54: 46bd mov sp, r7
8007f56: bc80 pop {r7}
8007f58: 4770 bx lr
8007f5a: bf00 nop
08007f5c <__libc_init_array>:
8007f5c: b570 push {r4, r5, r6, lr}
8007f5e: 2600 movs r6, #0
8007f60: 4d0c ldr r5, [pc, #48] ; (8007f94 <__libc_init_array+0x38>)
8007f62: 4c0d ldr r4, [pc, #52] ; (8007f98 <__libc_init_array+0x3c>)
8007f64: 1b64 subs r4, r4, r5
8007f66: 10a4 asrs r4, r4, #2
8007f68: 42a6 cmp r6, r4
8007f6a: d109 bne.n 8007f80 <__libc_init_array+0x24>
8007f6c: f000 f822 bl 8007fb4 <_init>
8007f70: 2600 movs r6, #0
8007f72: 4d0a ldr r5, [pc, #40] ; (8007f9c <__libc_init_array+0x40>)
8007f74: 4c0a ldr r4, [pc, #40] ; (8007fa0 <__libc_init_array+0x44>)
8007f76: 1b64 subs r4, r4, r5
8007f78: 10a4 asrs r4, r4, #2
8007f7a: 42a6 cmp r6, r4
8007f7c: d105 bne.n 8007f8a <__libc_init_array+0x2e>
8007f7e: bd70 pop {r4, r5, r6, pc}
8007f80: f855 3b04 ldr.w r3, [r5], #4
8007f84: 4798 blx r3
8007f86: 3601 adds r6, #1
8007f88: e7ee b.n 8007f68 <__libc_init_array+0xc>
8007f8a: f855 3b04 ldr.w r3, [r5], #4
8007f8e: 4798 blx r3
8007f90: 3601 adds r6, #1
8007f92: e7f2 b.n 8007f7a <__libc_init_array+0x1e>
8007f94: 080080a4 .word 0x080080a4
8007f98: 080080a4 .word 0x080080a4
8007f9c: 080080a4 .word 0x080080a4
8007fa0: 080080a8 .word 0x080080a8
08007fa4 <memset>:
8007fa4: 4603 mov r3, r0
8007fa6: 4402 add r2, r0
8007fa8: 4293 cmp r3, r2
8007faa: d100 bne.n 8007fae <memset+0xa>
8007fac: 4770 bx lr
8007fae: f803 1b01 strb.w r1, [r3], #1
8007fb2: e7f9 b.n 8007fa8 <memset+0x4>
08007fb4 <_init>:
8007fb4: b5f8 push {r3, r4, r5, r6, r7, lr}
8007fb6: bf00 nop
8007fb8: bcf8 pop {r3, r4, r5, r6, r7}
8007fba: bc08 pop {r3}
8007fbc: 469e mov lr, r3
8007fbe: 4770 bx lr
08007fc0 <_fini>:
8007fc0: b5f8 push {r3, r4, r5, r6, r7, lr}
8007fc2: bf00 nop
8007fc4: bcf8 pop {r3, r4, r5, r6, r7}
8007fc6: bc08 pop {r3}
8007fc8: 469e mov lr, r3
8007fca: 4770 bx lr