From efc8bebe18bedae37a3ebf718fa8db5254075255 Mon Sep 17 00:00:00 2001 From: kevin Date: Sat, 18 Sep 2021 16:08:10 +0800 Subject: [PATCH] =?UTF-8?q?=E5=AE=8C=E6=88=90=EF=BC=8C=E5=8F=AF=E4=BB=A5?= =?UTF-8?q?=E9=80=9A=E8=BF=87ADC=E9=98=B2=E6=AD=A2=E5=A0=B5=E8=BD=AC?= =?UTF-8?q?=E5=8D=A1=E6=AD=BB?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Debug/Motor_Controller.bin | Bin 9876 -> 11440 bytes Debug/Motor_Controller.list | 7832 ++++++++++++++++++++--------------- Debug/Motor_Controller.map | 259 +- Debug/My_Soul/my_main.su | 6 +- My_Soul/my_main.c | 96 +- 5 files changed, 4693 insertions(+), 3500 deletions(-) diff --git a/Debug/Motor_Controller.bin b/Debug/Motor_Controller.bin index cd75f4f42d8e07170335db8862c8833938180f34..006531eac850b29a5e7c2c913cff4827d2718f71 100755 GIT binary patch delta 4022 zcmaJ^e{2)i9e;PR6O$TZk`SD83XYxd%UQ=t*|MatD2XD-l|rGKAkfKa($y`LIs>tQ z5$6FL*_hP8q0%}GXhk#Cj|$9MaD-`PjR z*8Oq5_r9O+z4v*a@ArM*^RYF9oBIDO*3=#OXdZrt3I$uiqQB|-$Nj@c2H8(tHI0>S zw$v{%RxM7XGL6j5T)E!AGV1-dl{R5wUrOC+TO=OHs3&bT;@OOP+14jUGU~(j`$RdT z?z1<$-Z1+8H|@+C7KdHW17!;MP zI()7i|*LQ>x1$iGQ3Ls&iZymHy%Hf_iVT z#Gi39pA?RSJfVS*%~#e`KOPA^;2YQ?1cY(XU!SC&Q2pYgk1-$rfU~6f6SyR-vo=Gi{P^>EwV!i}^AMi0gf+tkvlY*E_3B^J*rLDTS zB^E45(jX#en1i|5Xq$boe^j3^jKSf9cM-iqZm~tKq;_wmNow9Ck&09jrPA@d^<_@g zv=)JA^T1XIm1~69qhoElZWz(w{hR>N^=u<*;$U=?u_4<%ZG!k#T7AfQ z#ud%6Wd2N$`A354XO4PhJtiVmmtdxuaZ<-+&3ALFId`H<@P7@<@ZP@fEGYDriM^K8K61&kUr3Ayln}{fvd_ETir-;Bov%rh61pKrn%cI&%v?}J^e7YZ z!n^na49&rbOCVQZkt^fU4ul$Li2oPKLN2VikNz}GR%FYB^JTl!Nzv?dVDO@}da`t$ zQ%mIypQO}xO8cGXEW??U+FiENdC)Q_DfL2Gz4LL)@K{Ryq->FMm1Ss2sSCFQX;*I|0sGF{fynz@T$x?q{k=|dfJgMu@arKBYe|IVs!yN`-pS+%25 z61UW;yDATgXVU6aWqsj;s9F!zsSVOn(VJDbNp7huD>4+5UsiD`T#|xBg_^^NY5cVqbM>?6mv6FT))wWr=cd_}7j#R-K9hVvE8tt*?(pS(H zdHefmvj{tQZ-1`m;=M?&=jFYf>0inQMjyj(NBHLoUa{~feiQhe^c`gqFRq?mdqB9s zCbF3rdtJWf_JmHgL4iq;H9n;_3)k4h#~EGwJE~Uqvc}E}*!bOz5<4$T!B^2{fr11r z11k@olif_$yi-5n@4=~8_U0 zQMn_0)Iy^c+R4$wax8q)_+9{y|ILX9s)+ET8S_OY`R_Ps4W8vOU4Sb1`YRFzvfe_;_aL z$KJwy`rXoQahlIYn&0x-VESMj+cclGG{5E3PCn{#?`);y!xk$&cBGoD^mrz|Amy=<;t>iIHSv_`3C8Cp%e^(C~3ztnRdTEtT7sY8pnNIi?ua`2X!nu`_C zV*IQ%kHrPD6skr_)K0Ub&W63Pdtmo+I~#xP14Dnu4GX=kTRo70TE>Zdw$)4R_)HvnlMHZ0aHt;f6QkfiUW94ksL7WVAc%s;BOYwda zj}y;%JU_(aTFBUG{#7y7bqcg7n|}m~Cpg7B+57@wNY$+N6;ujJ+N|a_C~5oUgc9xt zJn1`vt5jB7XgN5zLmx7;4|pF=NPJ|WX`Md*4zfBbZ^rR2#`nn`y)0??_QDq7aucmy zw9K&V=A?>or^&cU&t1^-Td*ltr7$>Cc23`cVcxgJN2=baD(w^QmrzPPePV!J&)%jY zlfS{(G1RBGznRM#U3=8%g7j2ubnRh7*Z!I^rLTeXAEH>3^cx_36Qn2Q?Mi%|#nF~r z!`sAM1_2UuHOQ^Hi(D&VT*iJBT2s&-uE+}P)fGVVdPXh0ljF;w=W^i7xt={h74!4; z9R32ttIG+xBq!)1*cMuX)}m$R$r4V=6qMBPLC|@yU6t;&()3Oa+{?ZHhn~vyja*QQ z3B`s4U3(ki<%D|#!qKru!WBX|y7Q25bK@eYm>aDknNL5KQ_OkP&$l$OtT5NUDHS+SO+9{bBhM z;7k0&0-mvSC=Aj7JnF}BaWTWzo27m5V?_Nd(0tSnS$K%!ClU42z)$n2_gd&Cpi1K6 zaYXp}T-1-{qD}|K5i9D4lgF(L|0sJbS7>xCnKi4}A&XkOHF$te9R;=MG-?eN?%{Z^ z0&cx<*u%L6EZE86FlaoRqxMXW+E&<}wy1^BidL^~rno+faj=Ok#kzREg!d^$Y2$i& z#Xw>FF(hjT(5sTN3Gvv%9o^iK647)l2$aM(z;PXSTnoP<)W$+QHasHLNjzEHl5lIm z2|xF0f)q;p=$jH)!q-^F5k@F zjm#gj`{w)J%)I^HdvkYk*Q<98U1i?-;V-N4oG8=uk_J!S{%Yvd@Jaf>SGRespVo&A zqFT1_pY&$(ldmxQcbZ4^CY=_>Y~HOmu(vb(O}&ndrTHiNui2$6zq|Biwk6GlV3D7Gx_Hc~jXzU0Zm|;b+RC?2R0+Ue>ct zTUg;ZR@k<`A|KTdQH>8{pq@P9eTJV}wu@EdxX)v-@3Iq(o{Mav)!U}Ajx0a2;`qcL zeeab1^kwgb9DEo{l~lWV&Hl_^Ne@QBe0Xf|Ek{$iRB8217?p`dru z{A;5D(2#--rzffdQO%olN+=gyp0ceA4j-(1h28G(>MDb^*7IAd2H5jCezs~;Ssj%A zaXq)I)-&et_0|5!|7}Knv5{zBObZ(E@|1Wdqqa5w1H3O5=+(m4P1)A0J#nylZ%N|k z*s1^20IG^YxhREBM{`vaG`i+Z3Tmhe#~RIi37bj#w;8u$JaYC@Vdj&w7Yef)IqT0P zO$Ym2#IwEYb38}7F5sEOGaGz`44f0_(Gy{ssk|~mQ|5VpAa=CPwyrFq7-GDI&M&`W zTVE`eQ0Ioz(SMkMSm$Pg{%#u4zrm(3OXjNZsa@v;gClKg3|T0b)}ib*lpO!aG`c=g z?2C%sFWGUky=&Y|6c<0O=m#Wy!W`*3p%y=`*qxF+W+uCifi)_%(CX&o_)&9GGkO!X z<;^QAS!MZFBR&Rpx39>*W@_Me!l$NoaBIb;`BUyXztPKA2NFNB|eYCXH@w-EPW>7<5}XfWp1A;g_qM& zQ3?r};oqb?WQKn!GrU`7xLs!WKGW60h~EoKe6bP#87%QxM*JRFnzZhQB|DV zW*{L;u?EMklgAcIu@W=46z@S_yQLV(h*DgGdRYTD8yv=6ZCke~J}7xFs?7_2<#xeF z6uVlor6^V1+}%UrHIvM2?@6pm(Hhz|fUC9D&9$3`yL&0GGymb;cp{wC=T4?wIH2eeD zY%n22%v*0Mhi9b2?;+xQa5w=G^N6*${D5SSLW?)0h-`8UB2o%h60p~mKCi)Y^F1m< z68ebJd@zgknF}=+?ON%IDFz}H_AG(Uy`2WV|X9fG2(v&)Fb9& zpaeo;&+LPEcWyAK6HKT15STp$CMp;l*#V}*jDpz>WM7zlvCHfX8qxbO>)63t*z7ON z`@!BX*D+`zs$r*CE%KkY=4@Bsy!Ejo^0N*3*$&#R@w_#y_zB53BR#i)ZY#YI_txq$Ia*(}ZIwwVXwQXN(E?N)aeMJLj zngYE)D;74(ZRaGjtibHaI@ZSAz*W(*qD4ikHez&Rh*lQu`aW#`qT@urAv(hU8Qy&D yQ)uks=&$Fi8uvH8TTPyAHRNHnG&_EVf^k^qVEBs$-*%J diff --git a/Debug/Motor_Controller.list b/Debug/Motor_Controller.list index ceb98eb..6ffa0cc 100644 --- a/Debug/Motor_Controller.list +++ b/Debug/Motor_Controller.list @@ -5,45 +5,45 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000000c0 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00002564 080000c0 080000c0 000100c0 2**2 + 1 .text 00002b7c 080000c0 080000c0 000100c0 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000058 08002624 08002624 00012624 2**2 + 2 .rodata 0000005c 08002c3c 08002c3c 00012c3c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 0800267c 0800267c 00020010 2**0 + 3 .ARM.extab 00000000 08002c98 08002c98 00020010 2**0 CONTENTS - 4 .ARM 00000000 0800267c 0800267c 00020010 2**0 + 4 .ARM 00000000 08002c98 08002c98 00020010 2**0 CONTENTS - 5 .preinit_array 00000000 0800267c 0800267c 00020010 2**0 + 5 .preinit_array 00000000 08002c98 08002c98 00020010 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 0800267c 0800267c 0001267c 2**2 + 6 .init_array 00000004 08002c98 08002c98 00012c98 2**2 CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000004 08002680 08002680 00012680 2**2 + 7 .fini_array 00000004 08002c9c 08002c9c 00012c9c 2**2 CONTENTS, ALLOC, LOAD, DATA - 8 .data 00000010 20000000 08002684 00020000 2**2 + 8 .data 00000010 20000000 08002ca0 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 000000ac 20000010 08002694 00020010 2**2 + 9 .bss 000000bc 20000010 08002cb0 00020010 2**2 ALLOC - 10 ._user_heap_stack 00000804 200000bc 08002694 000200bc 2**0 + 10 ._user_heap_stack 00000804 200000cc 08002cb0 000200cc 2**0 ALLOC 11 .ARM.attributes 00000028 00000000 00000000 00020010 2**0 CONTENTS, READONLY - 12 .debug_info 00004910 00000000 00000000 00020038 2**0 + 12 .debug_info 00004dc5 00000000 00000000 00020038 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 00001342 00000000 00000000 00024948 2**0 + 13 .debug_abbrev 00001353 00000000 00000000 00024dfd 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_aranges 000004b0 00000000 00000000 00025c90 2**3 + 14 .debug_aranges 000004b0 00000000 00000000 00026150 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_ranges 000003f8 00000000 00000000 00026140 2**3 + 15 .debug_ranges 000003f8 00000000 00000000 00026600 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_macro 0000e935 00000000 00000000 00026538 2**0 + 16 .debug_macro 0000e935 00000000 00000000 000269f8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_line 00006e34 00000000 00000000 00034e6d 2**0 + 17 .debug_line 00006f12 00000000 00000000 0003532d 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_str 00056677 00000000 00000000 0003bca1 2**0 + 18 .debug_str 000566a2 00000000 00000000 0003c23f 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .comment 00000053 00000000 00000000 00092318 2**0 + 19 .comment 00000053 00000000 00000000 000928e1 2**0 CONTENTS, READONLY - 20 .debug_frame 00000eb8 00000000 00000000 0009236c 2**2 + 20 .debug_frame 00000eb8 00000000 00000000 00092934 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -65,7 +65,7 @@ Disassembly of section .text: 80000da: bd10 pop {r4, pc} 80000dc: 20000010 .word 0x20000010 80000e0: 00000000 .word 0x00000000 - 80000e4: 0800260c .word 0x0800260c + 80000e4: 08002c24 .word 0x08002c24 080000e8 : 80000e8: 4b04 ldr r3, [pc, #16] ; (80000fc ) @@ -80,7 +80,7 @@ Disassembly of section .text: 80000fa: 46c0 nop ; (mov r8, r8) 80000fc: 00000000 .word 0x00000000 8000100: 20000014 .word 0x20000014 - 8000104: 0800260c .word 0x0800260c + 8000104: 08002c24 .word 0x08002c24 08000108 <__udivsi3>: 8000108: 2200 movs r2, #0 @@ -498,7 +498,7 @@ int main(void) 8000404: f000 f854 bl 80004b0 /* USER CODE BEGIN 2 */ mymain(); - 8000408: f001 fd08 bl 8001e1c + 8000408: f001 feea bl 80021e0 /* USER CODE END 2 */ /* Infinite loop */ @@ -523,14 +523,14 @@ void SystemClock_Config(void) 800041a: 2330 movs r3, #48 ; 0x30 800041c: 001a movs r2, r3 800041e: 2100 movs r1, #0 - 8000420: f002 f8ec bl 80025fc + 8000420: f002 fbf8 bl 8002c14 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8000424: 003b movs r3, r7 8000426: 0018 movs r0, r3 8000428: 2310 movs r3, #16 800042a: 001a movs r2, r3 800042c: 2100 movs r1, #0 - 800042e: f002 f8e5 bl 80025fc + 800042e: f002 fbf1 bl 8002c14 /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. @@ -576,7 +576,7 @@ void SystemClock_Config(void) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 800046c: 187b adds r3, r7, r1 800046e: 0018 movs r0, r3 - 8000470: f000 fe9c bl 80011ac + 8000470: f001 f87e bl 8001570 8000474: 1e03 subs r3, r0, #0 8000476: d001 beq.n 800047c { @@ -607,7 +607,7 @@ void SystemClock_Config(void) 8000494: 003b movs r3, r7 8000496: 2101 movs r1, #1 8000498: 0018 movs r0, r3 - 800049a: f001 f9a1 bl 80017e0 + 800049a: f001 fb83 bl 8001ba4 800049e: 1e03 subs r3, r0, #0 80004a0: d001 beq.n 80004a6 { @@ -642,7 +642,7 @@ static void MX_ADC_Init(void) 80004ba: 230c movs r3, #12 80004bc: 001a movs r2, r3 80004be: 2100 movs r1, #0 - 80004c0: f002 f89c bl 80025fc + 80004c0: f002 fba8 bl 8002c14 /* USER CODE BEGIN ADC_Init 1 */ /* USER CODE END ADC_Init 1 */ @@ -737,7 +737,7 @@ static void MX_ADC_Init(void) 8000544: 4b06 ldr r3, [pc, #24] ; (8000560 ) 8000546: 0011 movs r1, r2 8000548: 0018 movs r0, r3 - 800054a: f000 fadb bl 8000b04 + 800054a: f000 fb7b bl 8000c44 800054e: 1e03 subs r3, r0, #0 8000550: d001 beq.n 8000556 { @@ -774,7 +774,7 @@ static void MX_GPIO_Init(void) 8000574: 2314 movs r3, #20 8000576: 001a movs r2, r3 8000578: 2100 movs r1, #0 - 800057a: f002 f83f bl 80025fc + 800057a: f002 fb4b bl 8002c14 /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOF_CLK_ENABLE(); @@ -814,7 +814,7 @@ static void MX_GPIO_Init(void) 80005b8: 2200 movs r2, #0 80005ba: 2103 movs r1, #3 80005bc: 0018 movs r0, r3 - 80005be: f000 fdd8 bl 8001172 + 80005be: f000 ffba bl 8001536 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, HC595_DCK_Pin|HC595_RCK_Pin|HC595_SCK_Pin, GPIO_PIN_RESET); @@ -823,7 +823,7 @@ static void MX_GPIO_Init(void) 80005c6: 2200 movs r2, #0 80005c8: 2138 movs r1, #56 ; 0x38 80005ca: 0018 movs r0, r3 - 80005cc: f000 fdd1 bl 8001172 + 80005cc: f000 ffb3 bl 8001536 /*Configure GPIO pins : MOTA_Pin MOTB_Pin */ GPIO_InitStruct.Pin = MOTA_Pin|MOTB_Pin; @@ -847,7 +847,7 @@ static void MX_GPIO_Init(void) 80005ea: 4a18 ldr r2, [pc, #96] ; (800064c ) 80005ec: 0019 movs r1, r3 80005ee: 0010 movs r0, r2 - 80005f0: f000 fc32 bl 8000e58 + 80005f0: f000 fe14 bl 800121c /*Configure GPIO pins : HC595_DCK_Pin HC595_RCK_Pin HC595_SCK_Pin */ GPIO_InitStruct.Pin = HC595_DCK_Pin|HC595_RCK_Pin|HC595_SCK_Pin; @@ -872,7 +872,7 @@ static void MX_GPIO_Init(void) 8000610: 05db lsls r3, r3, #23 8000612: 0011 movs r1, r2 8000614: 0018 movs r0, r3 - 8000616: f000 fc1f bl 8000e58 + 8000616: f000 fe01 bl 800121c /*Configure GPIO pins : KEY1_Pin KEY2_Pin KEY3_Pin KEY4_Pin */ GPIO_InitStruct.Pin = KEY1_Pin|KEY2_Pin|KEY3_Pin|KEY4_Pin; @@ -895,7 +895,7 @@ static void MX_GPIO_Init(void) 8000634: 05db lsls r3, r3, #23 8000636: 0011 movs r1, r2 8000638: 0018 movs r0, r3 - 800063a: f000 fc0d bl 8000e58 + 800063a: f000 fdef bl 800121c } 800063e: 46c0 nop ; (mov r8, r8) @@ -1004,7 +1004,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) 80006b2: 2314 movs r3, #20 80006b4: 001a movs r2, r3 80006b6: 2100 movs r1, #0 - 80006b8: f001 ffa0 bl 80025fc + 80006b8: f002 faac bl 8002c14 if(hadc->Instance==ADC1) 80006bc: 687b ldr r3, [r7, #4] 80006be: 681b ldr r3, [r3, #0] @@ -1068,7 +1068,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) 8000714: 05db lsls r3, r3, #23 8000716: 0011 movs r1, r2 8000718: 0018 movs r0, r3 - 800071a: f000 fb9d bl 8000e58 + 800071a: f000 fd7f bl 800121c /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ @@ -1267,7 +1267,7 @@ LoopFillZerobss: 8000792: f7ff ffe4 bl 800075e /* Call static constructors */ bl __libc_init_array - 8000796: f001 ff0d bl 80025b4 <__libc_init_array> + 8000796: f002 fa19 bl 8002bcc <__libc_init_array> /* Call the application's entry point.*/ bl main 800079a: f7ff fe2b bl 80003f4
@@ -1284,11 +1284,11 @@ LoopForever: ldr r1, =_edata 80007a8: 20000010 .word 0x20000010 ldr r2, =_sidata - 80007ac: 08002684 .word 0x08002684 + 80007ac: 08002ca0 .word 0x08002ca0 ldr r2, =_sbss 80007b0: 20000010 .word 0x20000010 ldr r4, =_ebss - 80007b4: 200000bc .word 0x200000bc + 80007b4: 200000cc .word 0x200000cc 080007b8 : * @retval : None @@ -1367,7 +1367,7 @@ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) 8000804: f7ff fc80 bl 8000108 <__udivsi3> 8000808: 0003 movs r3, r0 800080a: 0018 movs r0, r3 - 800080c: f000 fb17 bl 8000e3e + 800080c: f000 fcf9 bl 8001202 8000810: 1e03 subs r3, r0, #0 8000812: d001 beq.n 8000818 { @@ -1388,7 +1388,7 @@ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) 8000822: 425b negs r3, r3 8000824: 2200 movs r2, #0 8000826: 0018 movs r0, r3 - 8000828: f000 faf4 bl 8000e14 + 8000828: f000 fcd6 bl 80011d8 uwTickPrio = TickPriority; 800082c: 4b06 ldr r3, [pc, #24] ; (8000848 ) 800082e: 687a ldr r2, [r7, #4] @@ -1946,4616 +1946,5722 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) 8000afc: fffe0219 .word 0xfffe0219 8000b00: 833fffe7 .word 0x833fffe7 -08000b04 : +08000b04 : + * Interruptions enabled in this function: None. + * @param hadc ADC handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) +{ + 8000b04: b590 push {r4, r7, lr} + 8000b06: b085 sub sp, #20 + 8000b08: af00 add r7, sp, #0 + 8000b0a: 6078 str r0, [r7, #4] + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 8000b0c: 230f movs r3, #15 + 8000b0e: 18fb adds r3, r7, r3 + 8000b10: 2200 movs r2, #0 + 8000b12: 701a strb r2, [r3, #0] + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Perform ADC enable and conversion start if no conversion is on going */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) + 8000b14: 687b ldr r3, [r7, #4] + 8000b16: 681b ldr r3, [r3, #0] + 8000b18: 689b ldr r3, [r3, #8] + 8000b1a: 2204 movs r2, #4 + 8000b1c: 4013 ands r3, r2 + 8000b1e: d138 bne.n 8000b92 + { + /* Process locked */ + __HAL_LOCK(hadc); + 8000b20: 687b ldr r3, [r7, #4] + 8000b22: 2234 movs r2, #52 ; 0x34 + 8000b24: 5c9b ldrb r3, [r3, r2] + 8000b26: 2b01 cmp r3, #1 + 8000b28: d101 bne.n 8000b2e + 8000b2a: 2302 movs r3, #2 + 8000b2c: e038 b.n 8000ba0 + 8000b2e: 687b ldr r3, [r7, #4] + 8000b30: 2234 movs r2, #52 ; 0x34 + 8000b32: 2101 movs r1, #1 + 8000b34: 5499 strb r1, [r3, r2] + + /* Enable the ADC peripheral */ + /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ + /* performed automatically by hardware. */ + if (hadc->Init.LowPowerAutoPowerOff != ENABLE) + 8000b36: 687b ldr r3, [r7, #4] + 8000b38: 7e5b ldrb r3, [r3, #25] + 8000b3a: 2b01 cmp r3, #1 + 8000b3c: d007 beq.n 8000b4e + { + tmp_hal_status = ADC_Enable(hadc); + 8000b3e: 230f movs r3, #15 + 8000b40: 18fc adds r4, r7, r3 + 8000b42: 687b ldr r3, [r7, #4] + 8000b44: 0018 movs r0, r3 + 8000b46: f000 f973 bl 8000e30 + 8000b4a: 0003 movs r3, r0 + 8000b4c: 7023 strb r3, [r4, #0] + } + + /* Start conversion if ADC is effectively enabled */ + if (tmp_hal_status == HAL_OK) + 8000b4e: 230f movs r3, #15 + 8000b50: 18fb adds r3, r7, r3 + 8000b52: 781b ldrb r3, [r3, #0] + 8000b54: 2b00 cmp r3, #0 + 8000b56: d120 bne.n 8000b9a + { + /* Set ADC state */ + /* - Clear state bitfield related to regular group conversion results */ + /* - Set state bitfield related to regular operation */ + ADC_STATE_CLR_SET(hadc->State, + 8000b58: 687b ldr r3, [r7, #4] + 8000b5a: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000b5c: 4a12 ldr r2, [pc, #72] ; (8000ba8 ) + 8000b5e: 4013 ands r3, r2 + 8000b60: 2280 movs r2, #128 ; 0x80 + 8000b62: 0052 lsls r2, r2, #1 + 8000b64: 431a orrs r2, r3 + 8000b66: 687b ldr r3, [r7, #4] + 8000b68: 639a str r2, [r3, #56] ; 0x38 + HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP, + HAL_ADC_STATE_REG_BUSY); + + /* Reset ADC all error code fields */ + ADC_CLEAR_ERRORCODE(hadc); + 8000b6a: 687b ldr r3, [r7, #4] + 8000b6c: 2200 movs r2, #0 + 8000b6e: 63da str r2, [r3, #60] ; 0x3c + + /* Process unlocked */ + /* Unlock before starting ADC conversions: in case of potential */ + /* interruption, to let the process to ADC IRQ Handler. */ + __HAL_UNLOCK(hadc); + 8000b70: 687b ldr r3, [r7, #4] + 8000b72: 2234 movs r2, #52 ; 0x34 + 8000b74: 2100 movs r1, #0 + 8000b76: 5499 strb r1, [r3, r2] + + /* Clear regular group conversion flag and overrun flag */ + /* (To ensure of no unknown state from potential previous ADC */ + /* operations) */ + __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); + 8000b78: 687b ldr r3, [r7, #4] + 8000b7a: 681b ldr r3, [r3, #0] + 8000b7c: 221c movs r2, #28 + 8000b7e: 601a str r2, [r3, #0] + + /* Enable conversion of regular group. */ + /* If software start has been selected, conversion starts immediately. */ + /* If external trigger has been selected, conversion will start at next */ + /* trigger event. */ + hadc->Instance->CR |= ADC_CR_ADSTART; + 8000b80: 687b ldr r3, [r7, #4] + 8000b82: 681b ldr r3, [r3, #0] + 8000b84: 689a ldr r2, [r3, #8] + 8000b86: 687b ldr r3, [r7, #4] + 8000b88: 681b ldr r3, [r3, #0] + 8000b8a: 2104 movs r1, #4 + 8000b8c: 430a orrs r2, r1 + 8000b8e: 609a str r2, [r3, #8] + 8000b90: e003 b.n 8000b9a + } + } + else + { + tmp_hal_status = HAL_BUSY; + 8000b92: 230f movs r3, #15 + 8000b94: 18fb adds r3, r7, r3 + 8000b96: 2202 movs r2, #2 + 8000b98: 701a strb r2, [r3, #0] + } + + /* Return function status */ + return tmp_hal_status; + 8000b9a: 230f movs r3, #15 + 8000b9c: 18fb adds r3, r7, r3 + 8000b9e: 781b ldrb r3, [r3, #0] +} + 8000ba0: 0018 movs r0, r3 + 8000ba2: 46bd mov sp, r7 + 8000ba4: b005 add sp, #20 + 8000ba6: bd90 pop {r4, r7, pc} + 8000ba8: fffff0fe .word 0xfffff0fe + +08000bac : + * @brief Stop ADC conversion of regular group, disable ADC peripheral. + * @param hadc ADC handle + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) +{ + 8000bac: b5b0 push {r4, r5, r7, lr} + 8000bae: b084 sub sp, #16 + 8000bb0: af00 add r7, sp, #0 + 8000bb2: 6078 str r0, [r7, #4] + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 8000bb4: 230f movs r3, #15 + 8000bb6: 18fb adds r3, r7, r3 + 8000bb8: 2200 movs r2, #0 + 8000bba: 701a strb r2, [r3, #0] + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Process locked */ + __HAL_LOCK(hadc); + 8000bbc: 687b ldr r3, [r7, #4] + 8000bbe: 2234 movs r2, #52 ; 0x34 + 8000bc0: 5c9b ldrb r3, [r3, r2] + 8000bc2: 2b01 cmp r3, #1 + 8000bc4: d101 bne.n 8000bca + 8000bc6: 2302 movs r3, #2 + 8000bc8: e029 b.n 8000c1e + 8000bca: 687b ldr r3, [r7, #4] + 8000bcc: 2234 movs r2, #52 ; 0x34 + 8000bce: 2101 movs r1, #1 + 8000bd0: 5499 strb r1, [r3, r2] + + /* 1. Stop potential conversion on going, on regular group */ + tmp_hal_status = ADC_ConversionStop(hadc); + 8000bd2: 250f movs r5, #15 + 8000bd4: 197c adds r4, r7, r5 + 8000bd6: 687b ldr r3, [r7, #4] + 8000bd8: 0018 movs r0, r3 + 8000bda: f000 fa1e bl 800101a + 8000bde: 0003 movs r3, r0 + 8000be0: 7023 strb r3, [r4, #0] + + /* Disable ADC peripheral if conversions are effectively stopped */ + if (tmp_hal_status == HAL_OK) + 8000be2: 197b adds r3, r7, r5 + 8000be4: 781b ldrb r3, [r3, #0] + 8000be6: 2b00 cmp r3, #0 + 8000be8: d112 bne.n 8000c10 + { + /* 2. Disable the ADC peripheral */ + tmp_hal_status = ADC_Disable(hadc); + 8000bea: 197c adds r4, r7, r5 + 8000bec: 687b ldr r3, [r7, #4] + 8000bee: 0018 movs r0, r3 + 8000bf0: f000 f9a2 bl 8000f38 + 8000bf4: 0003 movs r3, r0 + 8000bf6: 7023 strb r3, [r4, #0] + + /* Check if ADC is effectively disabled */ + if (tmp_hal_status == HAL_OK) + 8000bf8: 197b adds r3, r7, r5 + 8000bfa: 781b ldrb r3, [r3, #0] + 8000bfc: 2b00 cmp r3, #0 + 8000bfe: d107 bne.n 8000c10 + { + /* Set ADC state */ + ADC_STATE_CLR_SET(hadc->State, + 8000c00: 687b ldr r3, [r7, #4] + 8000c02: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000c04: 4a08 ldr r2, [pc, #32] ; (8000c28 ) + 8000c06: 4013 ands r3, r2 + 8000c08: 2201 movs r2, #1 + 8000c0a: 431a orrs r2, r3 + 8000c0c: 687b ldr r3, [r7, #4] + 8000c0e: 639a str r2, [r3, #56] ; 0x38 + HAL_ADC_STATE_READY); + } + } + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + 8000c10: 687b ldr r3, [r7, #4] + 8000c12: 2234 movs r2, #52 ; 0x34 + 8000c14: 2100 movs r1, #0 + 8000c16: 5499 strb r1, [r3, r2] + + /* Return function status */ + return tmp_hal_status; + 8000c18: 230f movs r3, #15 + 8000c1a: 18fb adds r3, r7, r3 + 8000c1c: 781b ldrb r3, [r3, #0] +} + 8000c1e: 0018 movs r0, r3 + 8000c20: 46bd mov sp, r7 + 8000c22: b004 add sp, #16 + 8000c24: bdb0 pop {r4, r5, r7, pc} + 8000c26: 46c0 nop ; (mov r8, r8) + 8000c28: fffffefe .word 0xfffffefe + +08000c2c : + * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). + * @param hadc ADC handle + * @retval ADC group regular conversion data + */ +uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) +{ + 8000c2c: b580 push {r7, lr} + 8000c2e: b082 sub sp, #8 + 8000c30: af00 add r7, sp, #0 + 8000c32: 6078 str r0, [r7, #4] + + /* Note: EOC flag is not cleared here by software because automatically */ + /* cleared by hardware when reading register DR. */ + + /* Return ADC converted value */ + return hadc->Instance->DR; + 8000c34: 687b ldr r3, [r7, #4] + 8000c36: 681b ldr r3, [r3, #0] + 8000c38: 6c1b ldr r3, [r3, #64] ; 0x40 +} + 8000c3a: 0018 movs r0, r3 + 8000c3c: 46bd mov sp, r7 + 8000c3e: b002 add sp, #8 + 8000c40: bd80 pop {r7, pc} + ... + +08000c44 : * @param hadc ADC handle * @param sConfig Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { - 8000b04: b580 push {r7, lr} - 8000b06: b084 sub sp, #16 - 8000b08: af00 add r7, sp, #0 - 8000b0a: 6078 str r0, [r7, #4] - 8000b0c: 6039 str r1, [r7, #0] + 8000c44: b580 push {r7, lr} + 8000c46: b084 sub sp, #16 + 8000c48: af00 add r7, sp, #0 + 8000c4a: 6078 str r0, [r7, #4] + 8000c4c: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 8000b0e: 230f movs r3, #15 - 8000b10: 18fb adds r3, r7, r3 - 8000b12: 2200 movs r2, #0 - 8000b14: 701a strb r2, [r3, #0] + 8000c4e: 230f movs r3, #15 + 8000c50: 18fb adds r3, r7, r3 + 8000c52: 2200 movs r2, #0 + 8000c54: 701a strb r2, [r3, #0] __IO uint32_t wait_loop_index = 0U; - 8000b16: 2300 movs r3, #0 - 8000b18: 60bb str r3, [r7, #8] + 8000c56: 2300 movs r3, #0 + 8000c58: 60bb str r3, [r7, #8] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_RANK(sConfig->Rank)); if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) - 8000b1a: 687b ldr r3, [r7, #4] - 8000b1c: 6ada ldr r2, [r3, #44] ; 0x2c - 8000b1e: 2380 movs r3, #128 ; 0x80 - 8000b20: 055b lsls r3, r3, #21 - 8000b22: 429a cmp r2, r3 - 8000b24: d011 beq.n 8000b4a - 8000b26: 687b ldr r3, [r7, #4] - 8000b28: 6adb ldr r3, [r3, #44] ; 0x2c - 8000b2a: 2b01 cmp r3, #1 - 8000b2c: d00d beq.n 8000b4a - 8000b2e: 687b ldr r3, [r7, #4] - 8000b30: 6adb ldr r3, [r3, #44] ; 0x2c - 8000b32: 2b02 cmp r3, #2 - 8000b34: d009 beq.n 8000b4a - 8000b36: 687b ldr r3, [r7, #4] - 8000b38: 6adb ldr r3, [r3, #44] ; 0x2c - 8000b3a: 2b03 cmp r3, #3 - 8000b3c: d005 beq.n 8000b4a - 8000b3e: 687b ldr r3, [r7, #4] - 8000b40: 6adb ldr r3, [r3, #44] ; 0x2c - 8000b42: 2b04 cmp r3, #4 - 8000b44: d001 beq.n 8000b4a - 8000b46: 687b ldr r3, [r7, #4] - 8000b48: 6adb ldr r3, [r3, #44] ; 0x2c + 8000c5a: 687b ldr r3, [r7, #4] + 8000c5c: 6ada ldr r2, [r3, #44] ; 0x2c + 8000c5e: 2380 movs r3, #128 ; 0x80 + 8000c60: 055b lsls r3, r3, #21 + 8000c62: 429a cmp r2, r3 + 8000c64: d011 beq.n 8000c8a + 8000c66: 687b ldr r3, [r7, #4] + 8000c68: 6adb ldr r3, [r3, #44] ; 0x2c + 8000c6a: 2b01 cmp r3, #1 + 8000c6c: d00d beq.n 8000c8a + 8000c6e: 687b ldr r3, [r7, #4] + 8000c70: 6adb ldr r3, [r3, #44] ; 0x2c + 8000c72: 2b02 cmp r3, #2 + 8000c74: d009 beq.n 8000c8a + 8000c76: 687b ldr r3, [r7, #4] + 8000c78: 6adb ldr r3, [r3, #44] ; 0x2c + 8000c7a: 2b03 cmp r3, #3 + 8000c7c: d005 beq.n 8000c8a + 8000c7e: 687b ldr r3, [r7, #4] + 8000c80: 6adb ldr r3, [r3, #44] ; 0x2c + 8000c82: 2b04 cmp r3, #4 + 8000c84: d001 beq.n 8000c8a + 8000c86: 687b ldr r3, [r7, #4] + 8000c88: 6adb ldr r3, [r3, #44] ; 0x2c { assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); } /* Process locked */ __HAL_LOCK(hadc); - 8000b4a: 687b ldr r3, [r7, #4] - 8000b4c: 2234 movs r2, #52 ; 0x34 - 8000b4e: 5c9b ldrb r3, [r3, r2] - 8000b50: 2b01 cmp r3, #1 - 8000b52: d101 bne.n 8000b58 - 8000b54: 2302 movs r3, #2 - 8000b56: e0bb b.n 8000cd0 - 8000b58: 687b ldr r3, [r7, #4] - 8000b5a: 2234 movs r2, #52 ; 0x34 - 8000b5c: 2101 movs r1, #1 - 8000b5e: 5499 strb r1, [r3, r2] + 8000c8a: 687b ldr r3, [r7, #4] + 8000c8c: 2234 movs r2, #52 ; 0x34 + 8000c8e: 5c9b ldrb r3, [r3, r2] + 8000c90: 2b01 cmp r3, #1 + 8000c92: d101 bne.n 8000c98 + 8000c94: 2302 movs r3, #2 + 8000c96: e0bb b.n 8000e10 + 8000c98: 687b ldr r3, [r7, #4] + 8000c9a: 2234 movs r2, #52 ; 0x34 + 8000c9c: 2101 movs r1, #1 + 8000c9e: 5499 strb r1, [r3, r2] /* Parameters that can be updated when ADC is disabled or enabled without */ /* conversion on going on regular group: */ /* - Channel number */ /* - Channel sampling time */ /* - Management of internal measurement channels: VrefInt/TempSensor/Vbat */ if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) - 8000b60: 687b ldr r3, [r7, #4] - 8000b62: 681b ldr r3, [r3, #0] - 8000b64: 689b ldr r3, [r3, #8] - 8000b66: 2204 movs r2, #4 - 8000b68: 4013 ands r3, r2 - 8000b6a: d000 beq.n 8000b6e - 8000b6c: e09f b.n 8000cae + 8000ca0: 687b ldr r3, [r7, #4] + 8000ca2: 681b ldr r3, [r3, #0] + 8000ca4: 689b ldr r3, [r3, #8] + 8000ca6: 2204 movs r2, #4 + 8000ca8: 4013 ands r3, r2 + 8000caa: d000 beq.n 8000cae + 8000cac: e09f b.n 8000dee { /* Configure channel: depending on rank setting, add it or remove it from */ /* ADC conversion sequencer. */ if (sConfig->Rank != ADC_RANK_NONE) - 8000b6e: 683b ldr r3, [r7, #0] - 8000b70: 685b ldr r3, [r3, #4] - 8000b72: 4a59 ldr r2, [pc, #356] ; (8000cd8 ) - 8000b74: 4293 cmp r3, r2 - 8000b76: d100 bne.n 8000b7a - 8000b78: e077 b.n 8000c6a + 8000cae: 683b ldr r3, [r7, #0] + 8000cb0: 685b ldr r3, [r3, #4] + 8000cb2: 4a59 ldr r2, [pc, #356] ; (8000e18 ) + 8000cb4: 4293 cmp r3, r2 + 8000cb6: d100 bne.n 8000cba + 8000cb8: e077 b.n 8000daa { /* Regular sequence configuration */ /* Set the channel selection register from the selected channel */ hadc->Instance->CHSELR |= ADC_CHSELR_CHANNEL(sConfig->Channel); - 8000b7a: 687b ldr r3, [r7, #4] - 8000b7c: 681b ldr r3, [r3, #0] - 8000b7e: 6a99 ldr r1, [r3, #40] ; 0x28 - 8000b80: 683b ldr r3, [r7, #0] - 8000b82: 681b ldr r3, [r3, #0] - 8000b84: 2201 movs r2, #1 - 8000b86: 409a lsls r2, r3 - 8000b88: 687b ldr r3, [r7, #4] - 8000b8a: 681b ldr r3, [r3, #0] - 8000b8c: 430a orrs r2, r1 - 8000b8e: 629a str r2, [r3, #40] ; 0x28 + 8000cba: 687b ldr r3, [r7, #4] + 8000cbc: 681b ldr r3, [r3, #0] + 8000cbe: 6a99 ldr r1, [r3, #40] ; 0x28 + 8000cc0: 683b ldr r3, [r7, #0] + 8000cc2: 681b ldr r3, [r3, #0] + 8000cc4: 2201 movs r2, #1 + 8000cc6: 409a lsls r2, r3 + 8000cc8: 687b ldr r3, [r7, #4] + 8000cca: 681b ldr r3, [r3, #0] + 8000ccc: 430a orrs r2, r1 + 8000cce: 629a str r2, [r3, #40] ; 0x28 /* Channel sampling time configuration */ /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */ /* (obsolete): sampling time set in this function with */ /* parameter "SamplingTime" (obsolete) only if not already set into */ /* ADC initialization structure with parameter "SamplingTimeCommon". */ if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) - 8000b90: 687b ldr r3, [r7, #4] - 8000b92: 6ada ldr r2, [r3, #44] ; 0x2c - 8000b94: 2380 movs r3, #128 ; 0x80 - 8000b96: 055b lsls r3, r3, #21 - 8000b98: 429a cmp r2, r3 - 8000b9a: d037 beq.n 8000c0c - 8000b9c: 687b ldr r3, [r7, #4] - 8000b9e: 6adb ldr r3, [r3, #44] ; 0x2c - 8000ba0: 2b01 cmp r3, #1 - 8000ba2: d033 beq.n 8000c0c - 8000ba4: 687b ldr r3, [r7, #4] - 8000ba6: 6adb ldr r3, [r3, #44] ; 0x2c - 8000ba8: 2b02 cmp r3, #2 - 8000baa: d02f beq.n 8000c0c - 8000bac: 687b ldr r3, [r7, #4] - 8000bae: 6adb ldr r3, [r3, #44] ; 0x2c - 8000bb0: 2b03 cmp r3, #3 - 8000bb2: d02b beq.n 8000c0c - 8000bb4: 687b ldr r3, [r7, #4] - 8000bb6: 6adb ldr r3, [r3, #44] ; 0x2c - 8000bb8: 2b04 cmp r3, #4 - 8000bba: d027 beq.n 8000c0c - 8000bbc: 687b ldr r3, [r7, #4] - 8000bbe: 6adb ldr r3, [r3, #44] ; 0x2c - 8000bc0: 2b05 cmp r3, #5 - 8000bc2: d023 beq.n 8000c0c - 8000bc4: 687b ldr r3, [r7, #4] - 8000bc6: 6adb ldr r3, [r3, #44] ; 0x2c - 8000bc8: 2b06 cmp r3, #6 - 8000bca: d01f beq.n 8000c0c - 8000bcc: 687b ldr r3, [r7, #4] - 8000bce: 6adb ldr r3, [r3, #44] ; 0x2c - 8000bd0: 2b07 cmp r3, #7 - 8000bd2: d01b beq.n 8000c0c + 8000cd0: 687b ldr r3, [r7, #4] + 8000cd2: 6ada ldr r2, [r3, #44] ; 0x2c + 8000cd4: 2380 movs r3, #128 ; 0x80 + 8000cd6: 055b lsls r3, r3, #21 + 8000cd8: 429a cmp r2, r3 + 8000cda: d037 beq.n 8000d4c + 8000cdc: 687b ldr r3, [r7, #4] + 8000cde: 6adb ldr r3, [r3, #44] ; 0x2c + 8000ce0: 2b01 cmp r3, #1 + 8000ce2: d033 beq.n 8000d4c + 8000ce4: 687b ldr r3, [r7, #4] + 8000ce6: 6adb ldr r3, [r3, #44] ; 0x2c + 8000ce8: 2b02 cmp r3, #2 + 8000cea: d02f beq.n 8000d4c + 8000cec: 687b ldr r3, [r7, #4] + 8000cee: 6adb ldr r3, [r3, #44] ; 0x2c + 8000cf0: 2b03 cmp r3, #3 + 8000cf2: d02b beq.n 8000d4c + 8000cf4: 687b ldr r3, [r7, #4] + 8000cf6: 6adb ldr r3, [r3, #44] ; 0x2c + 8000cf8: 2b04 cmp r3, #4 + 8000cfa: d027 beq.n 8000d4c + 8000cfc: 687b ldr r3, [r7, #4] + 8000cfe: 6adb ldr r3, [r3, #44] ; 0x2c + 8000d00: 2b05 cmp r3, #5 + 8000d02: d023 beq.n 8000d4c + 8000d04: 687b ldr r3, [r7, #4] + 8000d06: 6adb ldr r3, [r3, #44] ; 0x2c + 8000d08: 2b06 cmp r3, #6 + 8000d0a: d01f beq.n 8000d4c + 8000d0c: 687b ldr r3, [r7, #4] + 8000d0e: 6adb ldr r3, [r3, #44] ; 0x2c + 8000d10: 2b07 cmp r3, #7 + 8000d12: d01b beq.n 8000d4c { /* Modify sampling time if needed (not needed in case of reoccurrence */ /* for several channels programmed consecutively into the sequencer) */ if (sConfig->SamplingTime != ADC_GET_SAMPLINGTIME(hadc)) - 8000bd4: 683b ldr r3, [r7, #0] - 8000bd6: 689a ldr r2, [r3, #8] - 8000bd8: 687b ldr r3, [r7, #4] - 8000bda: 681b ldr r3, [r3, #0] - 8000bdc: 695b ldr r3, [r3, #20] - 8000bde: 2107 movs r1, #7 - 8000be0: 400b ands r3, r1 - 8000be2: 429a cmp r2, r3 - 8000be4: d012 beq.n 8000c0c + 8000d14: 683b ldr r3, [r7, #0] + 8000d16: 689a ldr r2, [r3, #8] + 8000d18: 687b ldr r3, [r7, #4] + 8000d1a: 681b ldr r3, [r3, #0] + 8000d1c: 695b ldr r3, [r3, #20] + 8000d1e: 2107 movs r1, #7 + 8000d20: 400b ands r3, r1 + 8000d22: 429a cmp r2, r3 + 8000d24: d012 beq.n 8000d4c { /* Channel sampling time configuration */ /* Clear the old sample time */ hadc->Instance->SMPR &= ~(ADC_SMPR_SMP); - 8000be6: 687b ldr r3, [r7, #4] - 8000be8: 681b ldr r3, [r3, #0] - 8000bea: 695a ldr r2, [r3, #20] - 8000bec: 687b ldr r3, [r7, #4] - 8000bee: 681b ldr r3, [r3, #0] - 8000bf0: 2107 movs r1, #7 - 8000bf2: 438a bics r2, r1 - 8000bf4: 615a str r2, [r3, #20] + 8000d26: 687b ldr r3, [r7, #4] + 8000d28: 681b ldr r3, [r3, #0] + 8000d2a: 695a ldr r2, [r3, #20] + 8000d2c: 687b ldr r3, [r7, #4] + 8000d2e: 681b ldr r3, [r3, #0] + 8000d30: 2107 movs r1, #7 + 8000d32: 438a bics r2, r1 + 8000d34: 615a str r2, [r3, #20] /* Set the new sample time */ hadc->Instance->SMPR |= ADC_SMPR_SET(sConfig->SamplingTime); - 8000bf6: 687b ldr r3, [r7, #4] - 8000bf8: 681b ldr r3, [r3, #0] - 8000bfa: 6959 ldr r1, [r3, #20] - 8000bfc: 683b ldr r3, [r7, #0] - 8000bfe: 689b ldr r3, [r3, #8] - 8000c00: 2207 movs r2, #7 - 8000c02: 401a ands r2, r3 - 8000c04: 687b ldr r3, [r7, #4] - 8000c06: 681b ldr r3, [r3, #0] - 8000c08: 430a orrs r2, r1 - 8000c0a: 615a str r2, [r3, #20] + 8000d36: 687b ldr r3, [r7, #4] + 8000d38: 681b ldr r3, [r3, #0] + 8000d3a: 6959 ldr r1, [r3, #20] + 8000d3c: 683b ldr r3, [r7, #0] + 8000d3e: 689b ldr r3, [r3, #8] + 8000d40: 2207 movs r2, #7 + 8000d42: 401a ands r2, r3 + 8000d44: 687b ldr r3, [r7, #4] + 8000d46: 681b ldr r3, [r3, #0] + 8000d48: 430a orrs r2, r1 + 8000d4a: 615a str r2, [r3, #20] /* internal measurement paths enable: If internal channel selected, */ /* enable dedicated internal buffers and path. */ /* Note: these internal measurement paths can be disabled using */ /* HAL_ADC_DeInit() or removing the channel from sequencer with */ /* channel configuration parameter "Rank". */ if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) - 8000c0c: 683b ldr r3, [r7, #0] - 8000c0e: 681b ldr r3, [r3, #0] - 8000c10: 2b10 cmp r3, #16 - 8000c12: d003 beq.n 8000c1c - 8000c14: 683b ldr r3, [r7, #0] - 8000c16: 681b ldr r3, [r3, #0] - 8000c18: 2b11 cmp r3, #17 - 8000c1a: d152 bne.n 8000cc2 + 8000d4c: 683b ldr r3, [r7, #0] + 8000d4e: 681b ldr r3, [r3, #0] + 8000d50: 2b10 cmp r3, #16 + 8000d52: d003 beq.n 8000d5c + 8000d54: 683b ldr r3, [r7, #0] + 8000d56: 681b ldr r3, [r3, #0] + 8000d58: 2b11 cmp r3, #17 + 8000d5a: d152 bne.n 8000e02 { /* If Channel_16 is selected, enable Temp. sensor measurement path. */ /* If Channel_17 is selected, enable VREFINT measurement path. */ /* If Channel_18 is selected, enable VBAT measurement path. */ ADC->CCR |= ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel); - 8000c1c: 4b2f ldr r3, [pc, #188] ; (8000cdc ) - 8000c1e: 6819 ldr r1, [r3, #0] - 8000c20: 683b ldr r3, [r7, #0] - 8000c22: 681b ldr r3, [r3, #0] - 8000c24: 2b10 cmp r3, #16 - 8000c26: d102 bne.n 8000c2e - 8000c28: 2380 movs r3, #128 ; 0x80 - 8000c2a: 041b lsls r3, r3, #16 - 8000c2c: e001 b.n 8000c32 - 8000c2e: 2380 movs r3, #128 ; 0x80 - 8000c30: 03db lsls r3, r3, #15 - 8000c32: 4a2a ldr r2, [pc, #168] ; (8000cdc ) - 8000c34: 430b orrs r3, r1 - 8000c36: 6013 str r3, [r2, #0] + 8000d5c: 4b2f ldr r3, [pc, #188] ; (8000e1c ) + 8000d5e: 6819 ldr r1, [r3, #0] + 8000d60: 683b ldr r3, [r7, #0] + 8000d62: 681b ldr r3, [r3, #0] + 8000d64: 2b10 cmp r3, #16 + 8000d66: d102 bne.n 8000d6e + 8000d68: 2380 movs r3, #128 ; 0x80 + 8000d6a: 041b lsls r3, r3, #16 + 8000d6c: e001 b.n 8000d72 + 8000d6e: 2380 movs r3, #128 ; 0x80 + 8000d70: 03db lsls r3, r3, #15 + 8000d72: 4a2a ldr r2, [pc, #168] ; (8000e1c ) + 8000d74: 430b orrs r3, r1 + 8000d76: 6013 str r3, [r2, #0] /* If Temp. sensor is selected, wait for stabilization delay */ if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) - 8000c38: 683b ldr r3, [r7, #0] - 8000c3a: 681b ldr r3, [r3, #0] - 8000c3c: 2b10 cmp r3, #16 - 8000c3e: d140 bne.n 8000cc2 + 8000d78: 683b ldr r3, [r7, #0] + 8000d7a: 681b ldr r3, [r3, #0] + 8000d7c: 2b10 cmp r3, #16 + 8000d7e: d140 bne.n 8000e02 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); - 8000c40: 4b27 ldr r3, [pc, #156] ; (8000ce0 ) - 8000c42: 681b ldr r3, [r3, #0] - 8000c44: 4927 ldr r1, [pc, #156] ; (8000ce4 ) - 8000c46: 0018 movs r0, r3 - 8000c48: f7ff fa5e bl 8000108 <__udivsi3> - 8000c4c: 0003 movs r3, r0 - 8000c4e: 001a movs r2, r3 - 8000c50: 0013 movs r3, r2 - 8000c52: 009b lsls r3, r3, #2 - 8000c54: 189b adds r3, r3, r2 - 8000c56: 005b lsls r3, r3, #1 - 8000c58: 60bb str r3, [r7, #8] + 8000d80: 4b27 ldr r3, [pc, #156] ; (8000e20 ) + 8000d82: 681b ldr r3, [r3, #0] + 8000d84: 4927 ldr r1, [pc, #156] ; (8000e24 ) + 8000d86: 0018 movs r0, r3 + 8000d88: f7ff f9be bl 8000108 <__udivsi3> + 8000d8c: 0003 movs r3, r0 + 8000d8e: 001a movs r2, r3 + 8000d90: 0013 movs r3, r2 + 8000d92: 009b lsls r3, r3, #2 + 8000d94: 189b adds r3, r3, r2 + 8000d96: 005b lsls r3, r3, #1 + 8000d98: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) - 8000c5a: e002 b.n 8000c62 + 8000d9a: e002 b.n 8000da2 { wait_loop_index--; - 8000c5c: 68bb ldr r3, [r7, #8] - 8000c5e: 3b01 subs r3, #1 - 8000c60: 60bb str r3, [r7, #8] + 8000d9c: 68bb ldr r3, [r7, #8] + 8000d9e: 3b01 subs r3, #1 + 8000da0: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) - 8000c62: 68bb ldr r3, [r7, #8] - 8000c64: 2b00 cmp r3, #0 - 8000c66: d1f9 bne.n 8000c5c - 8000c68: e02b b.n 8000cc2 + 8000da2: 68bb ldr r3, [r7, #8] + 8000da4: 2b00 cmp r3, #0 + 8000da6: d1f9 bne.n 8000d9c + 8000da8: e02b b.n 8000e02 } else { /* Regular sequence configuration */ /* Reset the channel selection register from the selected channel */ hadc->Instance->CHSELR &= ~ADC_CHSELR_CHANNEL(sConfig->Channel); - 8000c6a: 687b ldr r3, [r7, #4] - 8000c6c: 681b ldr r3, [r3, #0] - 8000c6e: 6a9a ldr r2, [r3, #40] ; 0x28 - 8000c70: 683b ldr r3, [r7, #0] - 8000c72: 681b ldr r3, [r3, #0] - 8000c74: 2101 movs r1, #1 - 8000c76: 4099 lsls r1, r3 - 8000c78: 000b movs r3, r1 - 8000c7a: 43d9 mvns r1, r3 - 8000c7c: 687b ldr r3, [r7, #4] - 8000c7e: 681b ldr r3, [r3, #0] - 8000c80: 400a ands r2, r1 - 8000c82: 629a str r2, [r3, #40] ; 0x28 + 8000daa: 687b ldr r3, [r7, #4] + 8000dac: 681b ldr r3, [r3, #0] + 8000dae: 6a9a ldr r2, [r3, #40] ; 0x28 + 8000db0: 683b ldr r3, [r7, #0] + 8000db2: 681b ldr r3, [r3, #0] + 8000db4: 2101 movs r1, #1 + 8000db6: 4099 lsls r1, r3 + 8000db8: 000b movs r3, r1 + 8000dba: 43d9 mvns r1, r3 + 8000dbc: 687b ldr r3, [r7, #4] + 8000dbe: 681b ldr r3, [r3, #0] + 8000dc0: 400a ands r2, r1 + 8000dc2: 629a str r2, [r3, #40] ; 0x28 /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */ /* internal measurement paths disable: If internal channel selected, */ /* disable dedicated internal buffers and path. */ if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) - 8000c84: 683b ldr r3, [r7, #0] - 8000c86: 681b ldr r3, [r3, #0] - 8000c88: 2b10 cmp r3, #16 - 8000c8a: d003 beq.n 8000c94 - 8000c8c: 683b ldr r3, [r7, #0] - 8000c8e: 681b ldr r3, [r3, #0] - 8000c90: 2b11 cmp r3, #17 - 8000c92: d116 bne.n 8000cc2 + 8000dc4: 683b ldr r3, [r7, #0] + 8000dc6: 681b ldr r3, [r3, #0] + 8000dc8: 2b10 cmp r3, #16 + 8000dca: d003 beq.n 8000dd4 + 8000dcc: 683b ldr r3, [r7, #0] + 8000dce: 681b ldr r3, [r3, #0] + 8000dd0: 2b11 cmp r3, #17 + 8000dd2: d116 bne.n 8000e02 { /* If Channel_16 is selected, disable Temp. sensor measurement path. */ /* If Channel_17 is selected, disable VREFINT measurement path. */ /* If Channel_18 is selected, disable VBAT measurement path. */ ADC->CCR &= ~ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel); - 8000c94: 4b11 ldr r3, [pc, #68] ; (8000cdc ) - 8000c96: 6819 ldr r1, [r3, #0] - 8000c98: 683b ldr r3, [r7, #0] - 8000c9a: 681b ldr r3, [r3, #0] - 8000c9c: 2b10 cmp r3, #16 - 8000c9e: d101 bne.n 8000ca4 - 8000ca0: 4a11 ldr r2, [pc, #68] ; (8000ce8 ) - 8000ca2: e000 b.n 8000ca6 - 8000ca4: 4a11 ldr r2, [pc, #68] ; (8000cec ) - 8000ca6: 4b0d ldr r3, [pc, #52] ; (8000cdc ) - 8000ca8: 400a ands r2, r1 - 8000caa: 601a str r2, [r3, #0] - 8000cac: e009 b.n 8000cc2 + 8000dd4: 4b11 ldr r3, [pc, #68] ; (8000e1c ) + 8000dd6: 6819 ldr r1, [r3, #0] + 8000dd8: 683b ldr r3, [r7, #0] + 8000dda: 681b ldr r3, [r3, #0] + 8000ddc: 2b10 cmp r3, #16 + 8000dde: d101 bne.n 8000de4 + 8000de0: 4a11 ldr r2, [pc, #68] ; (8000e28 ) + 8000de2: e000 b.n 8000de6 + 8000de4: 4a11 ldr r2, [pc, #68] ; (8000e2c ) + 8000de6: 4b0d ldr r3, [pc, #52] ; (8000e1c ) + 8000de8: 400a ands r2, r1 + 8000dea: 601a str r2, [r3, #0] + 8000dec: e009 b.n 8000e02 /* channel could be done on neither of the channel configuration structure */ /* parameters. */ else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8000cae: 687b ldr r3, [r7, #4] - 8000cb0: 6b9b ldr r3, [r3, #56] ; 0x38 - 8000cb2: 2220 movs r2, #32 - 8000cb4: 431a orrs r2, r3 - 8000cb6: 687b ldr r3, [r7, #4] - 8000cb8: 639a str r2, [r3, #56] ; 0x38 + 8000dee: 687b ldr r3, [r7, #4] + 8000df0: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000df2: 2220 movs r2, #32 + 8000df4: 431a orrs r2, r3 + 8000df6: 687b ldr r3, [r7, #4] + 8000df8: 639a str r2, [r3, #56] ; 0x38 tmp_hal_status = HAL_ERROR; - 8000cba: 230f movs r3, #15 - 8000cbc: 18fb adds r3, r7, r3 - 8000cbe: 2201 movs r2, #1 - 8000cc0: 701a strb r2, [r3, #0] + 8000dfa: 230f movs r3, #15 + 8000dfc: 18fb adds r3, r7, r3 + 8000dfe: 2201 movs r2, #1 + 8000e00: 701a strb r2, [r3, #0] } /* Process unlocked */ __HAL_UNLOCK(hadc); - 8000cc2: 687b ldr r3, [r7, #4] - 8000cc4: 2234 movs r2, #52 ; 0x34 - 8000cc6: 2100 movs r1, #0 - 8000cc8: 5499 strb r1, [r3, r2] + 8000e02: 687b ldr r3, [r7, #4] + 8000e04: 2234 movs r2, #52 ; 0x34 + 8000e06: 2100 movs r1, #0 + 8000e08: 5499 strb r1, [r3, r2] /* Return function status */ return tmp_hal_status; - 8000cca: 230f movs r3, #15 - 8000ccc: 18fb adds r3, r7, r3 - 8000cce: 781b ldrb r3, [r3, #0] + 8000e0a: 230f movs r3, #15 + 8000e0c: 18fb adds r3, r7, r3 + 8000e0e: 781b ldrb r3, [r3, #0] } - 8000cd0: 0018 movs r0, r3 - 8000cd2: 46bd mov sp, r7 - 8000cd4: b004 add sp, #16 - 8000cd6: bd80 pop {r7, pc} - 8000cd8: 00001001 .word 0x00001001 - 8000cdc: 40012708 .word 0x40012708 - 8000ce0: 20000000 .word 0x20000000 - 8000ce4: 000f4240 .word 0x000f4240 - 8000ce8: ff7fffff .word 0xff7fffff - 8000cec: ffbfffff .word 0xffbfffff + 8000e10: 0018 movs r0, r3 + 8000e12: 46bd mov sp, r7 + 8000e14: b004 add sp, #16 + 8000e16: bd80 pop {r7, pc} + 8000e18: 00001001 .word 0x00001001 + 8000e1c: 40012708 .word 0x40012708 + 8000e20: 20000000 .word 0x20000000 + 8000e24: 000f4240 .word 0x000f4240 + 8000e28: ff7fffff .word 0xff7fffff + 8000e2c: ffbfffff .word 0xffbfffff -08000cf0 <__NVIC_SetPriority>: +08000e30 : + * "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)". + * @param hadc ADC handle + * @retval HAL status. + */ +static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) +{ + 8000e30: b580 push {r7, lr} + 8000e32: b084 sub sp, #16 + 8000e34: af00 add r7, sp, #0 + 8000e36: 6078 str r0, [r7, #4] + uint32_t tickstart = 0U; + 8000e38: 2300 movs r3, #0 + 8000e3a: 60fb str r3, [r7, #12] + __IO uint32_t wait_loop_index = 0U; + 8000e3c: 2300 movs r3, #0 + 8000e3e: 60bb str r3, [r7, #8] + + /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ + /* enabling phase not yet completed: flag ADC ready not yet set). */ + /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ + /* causes: ADC clock not running, ...). */ + if (ADC_IS_ENABLE(hadc) == RESET) + 8000e40: 687b ldr r3, [r7, #4] + 8000e42: 681b ldr r3, [r3, #0] + 8000e44: 689b ldr r3, [r3, #8] + 8000e46: 2203 movs r2, #3 + 8000e48: 4013 ands r3, r2 + 8000e4a: 2b01 cmp r3, #1 + 8000e4c: d112 bne.n 8000e74 + 8000e4e: 687b ldr r3, [r7, #4] + 8000e50: 681b ldr r3, [r3, #0] + 8000e52: 681b ldr r3, [r3, #0] + 8000e54: 2201 movs r2, #1 + 8000e56: 4013 ands r3, r2 + 8000e58: 2b01 cmp r3, #1 + 8000e5a: d009 beq.n 8000e70 + 8000e5c: 687b ldr r3, [r7, #4] + 8000e5e: 681b ldr r3, [r3, #0] + 8000e60: 68da ldr r2, [r3, #12] + 8000e62: 2380 movs r3, #128 ; 0x80 + 8000e64: 021b lsls r3, r3, #8 + 8000e66: 401a ands r2, r3 + 8000e68: 2380 movs r3, #128 ; 0x80 + 8000e6a: 021b lsls r3, r3, #8 + 8000e6c: 429a cmp r2, r3 + 8000e6e: d101 bne.n 8000e74 + 8000e70: 2301 movs r3, #1 + 8000e72: e000 b.n 8000e76 + 8000e74: 2300 movs r3, #0 + 8000e76: 2b00 cmp r3, #0 + 8000e78: d152 bne.n 8000f20 + { + /* Check if conditions to enable the ADC are fulfilled */ + if (ADC_ENABLING_CONDITIONS(hadc) == RESET) + 8000e7a: 687b ldr r3, [r7, #4] + 8000e7c: 681b ldr r3, [r3, #0] + 8000e7e: 689b ldr r3, [r3, #8] + 8000e80: 4a2a ldr r2, [pc, #168] ; (8000f2c ) + 8000e82: 4013 ands r3, r2 + 8000e84: d00d beq.n 8000ea2 + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 8000e86: 687b ldr r3, [r7, #4] + 8000e88: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000e8a: 2210 movs r2, #16 + 8000e8c: 431a orrs r2, r3 + 8000e8e: 687b ldr r3, [r7, #4] + 8000e90: 639a str r2, [r3, #56] ; 0x38 + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 8000e92: 687b ldr r3, [r7, #4] + 8000e94: 6bdb ldr r3, [r3, #60] ; 0x3c + 8000e96: 2201 movs r2, #1 + 8000e98: 431a orrs r2, r3 + 8000e9a: 687b ldr r3, [r7, #4] + 8000e9c: 63da str r2, [r3, #60] ; 0x3c + + return HAL_ERROR; + 8000e9e: 2301 movs r3, #1 + 8000ea0: e03f b.n 8000f22 + } + + /* Enable the ADC peripheral */ + __HAL_ADC_ENABLE(hadc); + 8000ea2: 687b ldr r3, [r7, #4] + 8000ea4: 681b ldr r3, [r3, #0] + 8000ea6: 689a ldr r2, [r3, #8] + 8000ea8: 687b ldr r3, [r7, #4] + 8000eaa: 681b ldr r3, [r3, #0] + 8000eac: 2101 movs r1, #1 + 8000eae: 430a orrs r2, r1 + 8000eb0: 609a str r2, [r3, #8] + + /* Delay for ADC stabilization time */ + /* Compute number of CPU cycles to wait for */ + wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); + 8000eb2: 4b1f ldr r3, [pc, #124] ; (8000f30 ) + 8000eb4: 681b ldr r3, [r3, #0] + 8000eb6: 491f ldr r1, [pc, #124] ; (8000f34 ) + 8000eb8: 0018 movs r0, r3 + 8000eba: f7ff f925 bl 8000108 <__udivsi3> + 8000ebe: 0003 movs r3, r0 + 8000ec0: 60bb str r3, [r7, #8] + while(wait_loop_index != 0U) + 8000ec2: e002 b.n 8000eca + { + wait_loop_index--; + 8000ec4: 68bb ldr r3, [r7, #8] + 8000ec6: 3b01 subs r3, #1 + 8000ec8: 60bb str r3, [r7, #8] + while(wait_loop_index != 0U) + 8000eca: 68bb ldr r3, [r7, #8] + 8000ecc: 2b00 cmp r3, #0 + 8000ece: d1f9 bne.n 8000ec4 + } + + /* Get tick count */ + tickstart = HAL_GetTick(); + 8000ed0: f7ff fcce bl 8000870 + 8000ed4: 0003 movs r3, r0 + 8000ed6: 60fb str r3, [r7, #12] + + /* Wait for ADC effectively enabled */ + while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) + 8000ed8: e01b b.n 8000f12 + { + if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) + 8000eda: f7ff fcc9 bl 8000870 + 8000ede: 0002 movs r2, r0 + 8000ee0: 68fb ldr r3, [r7, #12] + 8000ee2: 1ad3 subs r3, r2, r3 + 8000ee4: 2b02 cmp r3, #2 + 8000ee6: d914 bls.n 8000f12 + { + /* New check to avoid false timeout detection in case of preemption */ + if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) + 8000ee8: 687b ldr r3, [r7, #4] + 8000eea: 681b ldr r3, [r3, #0] + 8000eec: 681b ldr r3, [r3, #0] + 8000eee: 2201 movs r2, #1 + 8000ef0: 4013 ands r3, r2 + 8000ef2: 2b01 cmp r3, #1 + 8000ef4: d00d beq.n 8000f12 + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 8000ef6: 687b ldr r3, [r7, #4] + 8000ef8: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000efa: 2210 movs r2, #16 + 8000efc: 431a orrs r2, r3 + 8000efe: 687b ldr r3, [r7, #4] + 8000f00: 639a str r2, [r3, #56] ; 0x38 + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 8000f02: 687b ldr r3, [r7, #4] + 8000f04: 6bdb ldr r3, [r3, #60] ; 0x3c + 8000f06: 2201 movs r2, #1 + 8000f08: 431a orrs r2, r3 + 8000f0a: 687b ldr r3, [r7, #4] + 8000f0c: 63da str r2, [r3, #60] ; 0x3c + + return HAL_ERROR; + 8000f0e: 2301 movs r3, #1 + 8000f10: e007 b.n 8000f22 + while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) + 8000f12: 687b ldr r3, [r7, #4] + 8000f14: 681b ldr r3, [r3, #0] + 8000f16: 681b ldr r3, [r3, #0] + 8000f18: 2201 movs r2, #1 + 8000f1a: 4013 ands r3, r2 + 8000f1c: 2b01 cmp r3, #1 + 8000f1e: d1dc bne.n 8000eda + } + } + } + + /* Return HAL status */ + return HAL_OK; + 8000f20: 2300 movs r3, #0 +} + 8000f22: 0018 movs r0, r3 + 8000f24: 46bd mov sp, r7 + 8000f26: b004 add sp, #16 + 8000f28: bd80 pop {r7, pc} + 8000f2a: 46c0 nop ; (mov r8, r8) + 8000f2c: 80000017 .word 0x80000017 + 8000f30: 20000000 .word 0x20000000 + 8000f34: 000f4240 .word 0x000f4240 + +08000f38 : + * stopped. + * @param hadc ADC handle + * @retval HAL status. + */ +static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc) +{ + 8000f38: b580 push {r7, lr} + 8000f3a: b084 sub sp, #16 + 8000f3c: af00 add r7, sp, #0 + 8000f3e: 6078 str r0, [r7, #4] + uint32_t tickstart = 0U; + 8000f40: 2300 movs r3, #0 + 8000f42: 60fb str r3, [r7, #12] + + /* Verification if ADC is not already disabled: */ + /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ + /* disabled. */ + if (ADC_IS_ENABLE(hadc) != RESET) + 8000f44: 687b ldr r3, [r7, #4] + 8000f46: 681b ldr r3, [r3, #0] + 8000f48: 689b ldr r3, [r3, #8] + 8000f4a: 2203 movs r2, #3 + 8000f4c: 4013 ands r3, r2 + 8000f4e: 2b01 cmp r3, #1 + 8000f50: d112 bne.n 8000f78 + 8000f52: 687b ldr r3, [r7, #4] + 8000f54: 681b ldr r3, [r3, #0] + 8000f56: 681b ldr r3, [r3, #0] + 8000f58: 2201 movs r2, #1 + 8000f5a: 4013 ands r3, r2 + 8000f5c: 2b01 cmp r3, #1 + 8000f5e: d009 beq.n 8000f74 + 8000f60: 687b ldr r3, [r7, #4] + 8000f62: 681b ldr r3, [r3, #0] + 8000f64: 68da ldr r2, [r3, #12] + 8000f66: 2380 movs r3, #128 ; 0x80 + 8000f68: 021b lsls r3, r3, #8 + 8000f6a: 401a ands r2, r3 + 8000f6c: 2380 movs r3, #128 ; 0x80 + 8000f6e: 021b lsls r3, r3, #8 + 8000f70: 429a cmp r2, r3 + 8000f72: d101 bne.n 8000f78 + 8000f74: 2301 movs r3, #1 + 8000f76: e000 b.n 8000f7a + 8000f78: 2300 movs r3, #0 + 8000f7a: 2b00 cmp r3, #0 + 8000f7c: d048 beq.n 8001010 + { + /* Check if conditions to disable the ADC are fulfilled */ + if (ADC_DISABLING_CONDITIONS(hadc) != RESET) + 8000f7e: 687b ldr r3, [r7, #4] + 8000f80: 681b ldr r3, [r3, #0] + 8000f82: 689b ldr r3, [r3, #8] + 8000f84: 2205 movs r2, #5 + 8000f86: 4013 ands r3, r2 + 8000f88: 2b01 cmp r3, #1 + 8000f8a: d110 bne.n 8000fae + { + /* Disable the ADC peripheral */ + __HAL_ADC_DISABLE(hadc); + 8000f8c: 687b ldr r3, [r7, #4] + 8000f8e: 681b ldr r3, [r3, #0] + 8000f90: 689a ldr r2, [r3, #8] + 8000f92: 687b ldr r3, [r7, #4] + 8000f94: 681b ldr r3, [r3, #0] + 8000f96: 2102 movs r1, #2 + 8000f98: 430a orrs r2, r1 + 8000f9a: 609a str r2, [r3, #8] + 8000f9c: 687b ldr r3, [r7, #4] + 8000f9e: 681b ldr r3, [r3, #0] + 8000fa0: 2203 movs r2, #3 + 8000fa2: 601a str r2, [r3, #0] + return HAL_ERROR; + } + + /* Wait for ADC effectively disabled */ + /* Get tick count */ + tickstart = HAL_GetTick(); + 8000fa4: f7ff fc64 bl 8000870 + 8000fa8: 0003 movs r3, r0 + 8000faa: 60fb str r3, [r7, #12] + + while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) + 8000fac: e029 b.n 8001002 + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 8000fae: 687b ldr r3, [r7, #4] + 8000fb0: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000fb2: 2210 movs r2, #16 + 8000fb4: 431a orrs r2, r3 + 8000fb6: 687b ldr r3, [r7, #4] + 8000fb8: 639a str r2, [r3, #56] ; 0x38 + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 8000fba: 687b ldr r3, [r7, #4] + 8000fbc: 6bdb ldr r3, [r3, #60] ; 0x3c + 8000fbe: 2201 movs r2, #1 + 8000fc0: 431a orrs r2, r3 + 8000fc2: 687b ldr r3, [r7, #4] + 8000fc4: 63da str r2, [r3, #60] ; 0x3c + return HAL_ERROR; + 8000fc6: 2301 movs r3, #1 + 8000fc8: e023 b.n 8001012 + { + if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) + 8000fca: f7ff fc51 bl 8000870 + 8000fce: 0002 movs r2, r0 + 8000fd0: 68fb ldr r3, [r7, #12] + 8000fd2: 1ad3 subs r3, r2, r3 + 8000fd4: 2b02 cmp r3, #2 + 8000fd6: d914 bls.n 8001002 + { + /* New check to avoid false timeout detection in case of preemption */ + if(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) + 8000fd8: 687b ldr r3, [r7, #4] + 8000fda: 681b ldr r3, [r3, #0] + 8000fdc: 689b ldr r3, [r3, #8] + 8000fde: 2201 movs r2, #1 + 8000fe0: 4013 ands r3, r2 + 8000fe2: 2b01 cmp r3, #1 + 8000fe4: d10d bne.n 8001002 + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 8000fe6: 687b ldr r3, [r7, #4] + 8000fe8: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000fea: 2210 movs r2, #16 + 8000fec: 431a orrs r2, r3 + 8000fee: 687b ldr r3, [r7, #4] + 8000ff0: 639a str r2, [r3, #56] ; 0x38 + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 8000ff2: 687b ldr r3, [r7, #4] + 8000ff4: 6bdb ldr r3, [r3, #60] ; 0x3c + 8000ff6: 2201 movs r2, #1 + 8000ff8: 431a orrs r2, r3 + 8000ffa: 687b ldr r3, [r7, #4] + 8000ffc: 63da str r2, [r3, #60] ; 0x3c + + return HAL_ERROR; + 8000ffe: 2301 movs r3, #1 + 8001000: e007 b.n 8001012 + while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) + 8001002: 687b ldr r3, [r7, #4] + 8001004: 681b ldr r3, [r3, #0] + 8001006: 689b ldr r3, [r3, #8] + 8001008: 2201 movs r2, #1 + 800100a: 4013 ands r3, r2 + 800100c: 2b01 cmp r3, #1 + 800100e: d0dc beq.n 8000fca + } + } + } + + /* Return HAL status */ + return HAL_OK; + 8001010: 2300 movs r3, #0 +} + 8001012: 0018 movs r0, r3 + 8001014: 46bd mov sp, r7 + 8001016: b004 add sp, #16 + 8001018: bd80 pop {r7, pc} + +0800101a : + * stopped to disable the ADC. + * @param hadc ADC handle + * @retval HAL status. + */ +static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc) +{ + 800101a: b580 push {r7, lr} + 800101c: b084 sub sp, #16 + 800101e: af00 add r7, sp, #0 + 8001020: 6078 str r0, [r7, #4] + uint32_t tickstart = 0U; + 8001022: 2300 movs r3, #0 + 8001024: 60fb str r3, [r7, #12] + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Verification if ADC is not already stopped on regular group to bypass */ + /* this function if not needed. */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) + 8001026: 687b ldr r3, [r7, #4] + 8001028: 681b ldr r3, [r3, #0] + 800102a: 689b ldr r3, [r3, #8] + 800102c: 2204 movs r2, #4 + 800102e: 4013 ands r3, r2 + 8001030: d03a beq.n 80010a8 + { + + /* Stop potential conversion on going on regular group */ + /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ + if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && + 8001032: 687b ldr r3, [r7, #4] + 8001034: 681b ldr r3, [r3, #0] + 8001036: 689b ldr r3, [r3, #8] + 8001038: 2204 movs r2, #4 + 800103a: 4013 ands r3, r2 + 800103c: 2b04 cmp r3, #4 + 800103e: d10d bne.n 800105c + HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) + 8001040: 687b ldr r3, [r7, #4] + 8001042: 681b ldr r3, [r3, #0] + 8001044: 689b ldr r3, [r3, #8] + 8001046: 2202 movs r2, #2 + 8001048: 4013 ands r3, r2 + if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && + 800104a: d107 bne.n 800105c + { + /* Stop conversions on regular group */ + hadc->Instance->CR |= ADC_CR_ADSTP; + 800104c: 687b ldr r3, [r7, #4] + 800104e: 681b ldr r3, [r3, #0] + 8001050: 689a ldr r2, [r3, #8] + 8001052: 687b ldr r3, [r7, #4] + 8001054: 681b ldr r3, [r3, #0] + 8001056: 2110 movs r1, #16 + 8001058: 430a orrs r2, r1 + 800105a: 609a str r2, [r3, #8] + } + + /* Wait for conversion effectively stopped */ + /* Get tick count */ + tickstart = HAL_GetTick(); + 800105c: f7ff fc08 bl 8000870 + 8001060: 0003 movs r3, r0 + 8001062: 60fb str r3, [r7, #12] + + while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) + 8001064: e01a b.n 800109c + { + if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) + 8001066: f7ff fc03 bl 8000870 + 800106a: 0002 movs r2, r0 + 800106c: 68fb ldr r3, [r7, #12] + 800106e: 1ad3 subs r3, r2, r3 + 8001070: 2b02 cmp r3, #2 + 8001072: d913 bls.n 800109c + { + /* New check to avoid false timeout detection in case of preemption */ + if((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) + 8001074: 687b ldr r3, [r7, #4] + 8001076: 681b ldr r3, [r3, #0] + 8001078: 689b ldr r3, [r3, #8] + 800107a: 2204 movs r2, #4 + 800107c: 4013 ands r3, r2 + 800107e: d00d beq.n 800109c + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 8001080: 687b ldr r3, [r7, #4] + 8001082: 6b9b ldr r3, [r3, #56] ; 0x38 + 8001084: 2210 movs r2, #16 + 8001086: 431a orrs r2, r3 + 8001088: 687b ldr r3, [r7, #4] + 800108a: 639a str r2, [r3, #56] ; 0x38 + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 800108c: 687b ldr r3, [r7, #4] + 800108e: 6bdb ldr r3, [r3, #60] ; 0x3c + 8001090: 2201 movs r2, #1 + 8001092: 431a orrs r2, r3 + 8001094: 687b ldr r3, [r7, #4] + 8001096: 63da str r2, [r3, #60] ; 0x3c + + return HAL_ERROR; + 8001098: 2301 movs r3, #1 + 800109a: e006 b.n 80010aa + while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) + 800109c: 687b ldr r3, [r7, #4] + 800109e: 681b ldr r3, [r3, #0] + 80010a0: 689b ldr r3, [r3, #8] + 80010a2: 2204 movs r2, #4 + 80010a4: 4013 ands r3, r2 + 80010a6: d1de bne.n 8001066 + } + } + } + + /* Return HAL status */ + return HAL_OK; + 80010a8: 2300 movs r3, #0 +} + 80010aa: 0018 movs r0, r3 + 80010ac: 46bd mov sp, r7 + 80010ae: b004 add sp, #16 + 80010b0: bd80 pop {r7, pc} + ... + +080010b4 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8000cf0: b590 push {r4, r7, lr} - 8000cf2: b083 sub sp, #12 - 8000cf4: af00 add r7, sp, #0 - 8000cf6: 0002 movs r2, r0 - 8000cf8: 6039 str r1, [r7, #0] - 8000cfa: 1dfb adds r3, r7, #7 - 8000cfc: 701a strb r2, [r3, #0] + 80010b4: b590 push {r4, r7, lr} + 80010b6: b083 sub sp, #12 + 80010b8: af00 add r7, sp, #0 + 80010ba: 0002 movs r2, r0 + 80010bc: 6039 str r1, [r7, #0] + 80010be: 1dfb adds r3, r7, #7 + 80010c0: 701a strb r2, [r3, #0] if ((int32_t)(IRQn) >= 0) - 8000cfe: 1dfb adds r3, r7, #7 - 8000d00: 781b ldrb r3, [r3, #0] - 8000d02: 2b7f cmp r3, #127 ; 0x7f - 8000d04: d828 bhi.n 8000d58 <__NVIC_SetPriority+0x68> + 80010c2: 1dfb adds r3, r7, #7 + 80010c4: 781b ldrb r3, [r3, #0] + 80010c6: 2b7f cmp r3, #127 ; 0x7f + 80010c8: d828 bhi.n 800111c <__NVIC_SetPriority+0x68> { NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8000d06: 4a2f ldr r2, [pc, #188] ; (8000dc4 <__NVIC_SetPriority+0xd4>) - 8000d08: 1dfb adds r3, r7, #7 - 8000d0a: 781b ldrb r3, [r3, #0] - 8000d0c: b25b sxtb r3, r3 - 8000d0e: 089b lsrs r3, r3, #2 - 8000d10: 33c0 adds r3, #192 ; 0xc0 - 8000d12: 009b lsls r3, r3, #2 - 8000d14: 589b ldr r3, [r3, r2] - 8000d16: 1dfa adds r2, r7, #7 - 8000d18: 7812 ldrb r2, [r2, #0] - 8000d1a: 0011 movs r1, r2 - 8000d1c: 2203 movs r2, #3 - 8000d1e: 400a ands r2, r1 - 8000d20: 00d2 lsls r2, r2, #3 - 8000d22: 21ff movs r1, #255 ; 0xff - 8000d24: 4091 lsls r1, r2 - 8000d26: 000a movs r2, r1 - 8000d28: 43d2 mvns r2, r2 - 8000d2a: 401a ands r2, r3 - 8000d2c: 0011 movs r1, r2 + 80010ca: 4a2f ldr r2, [pc, #188] ; (8001188 <__NVIC_SetPriority+0xd4>) + 80010cc: 1dfb adds r3, r7, #7 + 80010ce: 781b ldrb r3, [r3, #0] + 80010d0: b25b sxtb r3, r3 + 80010d2: 089b lsrs r3, r3, #2 + 80010d4: 33c0 adds r3, #192 ; 0xc0 + 80010d6: 009b lsls r3, r3, #2 + 80010d8: 589b ldr r3, [r3, r2] + 80010da: 1dfa adds r2, r7, #7 + 80010dc: 7812 ldrb r2, [r2, #0] + 80010de: 0011 movs r1, r2 + 80010e0: 2203 movs r2, #3 + 80010e2: 400a ands r2, r1 + 80010e4: 00d2 lsls r2, r2, #3 + 80010e6: 21ff movs r1, #255 ; 0xff + 80010e8: 4091 lsls r1, r2 + 80010ea: 000a movs r2, r1 + 80010ec: 43d2 mvns r2, r2 + 80010ee: 401a ands r2, r3 + 80010f0: 0011 movs r1, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 8000d2e: 683b ldr r3, [r7, #0] - 8000d30: 019b lsls r3, r3, #6 - 8000d32: 22ff movs r2, #255 ; 0xff - 8000d34: 401a ands r2, r3 - 8000d36: 1dfb adds r3, r7, #7 - 8000d38: 781b ldrb r3, [r3, #0] - 8000d3a: 0018 movs r0, r3 - 8000d3c: 2303 movs r3, #3 - 8000d3e: 4003 ands r3, r0 - 8000d40: 00db lsls r3, r3, #3 - 8000d42: 409a lsls r2, r3 + 80010f2: 683b ldr r3, [r7, #0] + 80010f4: 019b lsls r3, r3, #6 + 80010f6: 22ff movs r2, #255 ; 0xff + 80010f8: 401a ands r2, r3 + 80010fa: 1dfb adds r3, r7, #7 + 80010fc: 781b ldrb r3, [r3, #0] + 80010fe: 0018 movs r0, r3 + 8001100: 2303 movs r3, #3 + 8001102: 4003 ands r3, r0 + 8001104: 00db lsls r3, r3, #3 + 8001106: 409a lsls r2, r3 NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8000d44: 481f ldr r0, [pc, #124] ; (8000dc4 <__NVIC_SetPriority+0xd4>) - 8000d46: 1dfb adds r3, r7, #7 - 8000d48: 781b ldrb r3, [r3, #0] - 8000d4a: b25b sxtb r3, r3 - 8000d4c: 089b lsrs r3, r3, #2 - 8000d4e: 430a orrs r2, r1 - 8000d50: 33c0 adds r3, #192 ; 0xc0 - 8000d52: 009b lsls r3, r3, #2 - 8000d54: 501a str r2, [r3, r0] + 8001108: 481f ldr r0, [pc, #124] ; (8001188 <__NVIC_SetPriority+0xd4>) + 800110a: 1dfb adds r3, r7, #7 + 800110c: 781b ldrb r3, [r3, #0] + 800110e: b25b sxtb r3, r3 + 8001110: 089b lsrs r3, r3, #2 + 8001112: 430a orrs r2, r1 + 8001114: 33c0 adds r3, #192 ; 0xc0 + 8001116: 009b lsls r3, r3, #2 + 8001118: 501a str r2, [r3, r0] else { SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); } } - 8000d56: e031 b.n 8000dbc <__NVIC_SetPriority+0xcc> + 800111a: e031 b.n 8001180 <__NVIC_SetPriority+0xcc> SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8000d58: 4a1b ldr r2, [pc, #108] ; (8000dc8 <__NVIC_SetPriority+0xd8>) - 8000d5a: 1dfb adds r3, r7, #7 - 8000d5c: 781b ldrb r3, [r3, #0] - 8000d5e: 0019 movs r1, r3 - 8000d60: 230f movs r3, #15 - 8000d62: 400b ands r3, r1 - 8000d64: 3b08 subs r3, #8 - 8000d66: 089b lsrs r3, r3, #2 - 8000d68: 3306 adds r3, #6 - 8000d6a: 009b lsls r3, r3, #2 - 8000d6c: 18d3 adds r3, r2, r3 - 8000d6e: 3304 adds r3, #4 - 8000d70: 681b ldr r3, [r3, #0] - 8000d72: 1dfa adds r2, r7, #7 - 8000d74: 7812 ldrb r2, [r2, #0] - 8000d76: 0011 movs r1, r2 - 8000d78: 2203 movs r2, #3 - 8000d7a: 400a ands r2, r1 - 8000d7c: 00d2 lsls r2, r2, #3 - 8000d7e: 21ff movs r1, #255 ; 0xff - 8000d80: 4091 lsls r1, r2 - 8000d82: 000a movs r2, r1 - 8000d84: 43d2 mvns r2, r2 - 8000d86: 401a ands r2, r3 - 8000d88: 0011 movs r1, r2 + 800111c: 4a1b ldr r2, [pc, #108] ; (800118c <__NVIC_SetPriority+0xd8>) + 800111e: 1dfb adds r3, r7, #7 + 8001120: 781b ldrb r3, [r3, #0] + 8001122: 0019 movs r1, r3 + 8001124: 230f movs r3, #15 + 8001126: 400b ands r3, r1 + 8001128: 3b08 subs r3, #8 + 800112a: 089b lsrs r3, r3, #2 + 800112c: 3306 adds r3, #6 + 800112e: 009b lsls r3, r3, #2 + 8001130: 18d3 adds r3, r2, r3 + 8001132: 3304 adds r3, #4 + 8001134: 681b ldr r3, [r3, #0] + 8001136: 1dfa adds r2, r7, #7 + 8001138: 7812 ldrb r2, [r2, #0] + 800113a: 0011 movs r1, r2 + 800113c: 2203 movs r2, #3 + 800113e: 400a ands r2, r1 + 8001140: 00d2 lsls r2, r2, #3 + 8001142: 21ff movs r1, #255 ; 0xff + 8001144: 4091 lsls r1, r2 + 8001146: 000a movs r2, r1 + 8001148: 43d2 mvns r2, r2 + 800114a: 401a ands r2, r3 + 800114c: 0011 movs r1, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 8000d8a: 683b ldr r3, [r7, #0] - 8000d8c: 019b lsls r3, r3, #6 - 8000d8e: 22ff movs r2, #255 ; 0xff - 8000d90: 401a ands r2, r3 - 8000d92: 1dfb adds r3, r7, #7 - 8000d94: 781b ldrb r3, [r3, #0] - 8000d96: 0018 movs r0, r3 - 8000d98: 2303 movs r3, #3 - 8000d9a: 4003 ands r3, r0 - 8000d9c: 00db lsls r3, r3, #3 - 8000d9e: 409a lsls r2, r3 + 800114e: 683b ldr r3, [r7, #0] + 8001150: 019b lsls r3, r3, #6 + 8001152: 22ff movs r2, #255 ; 0xff + 8001154: 401a ands r2, r3 + 8001156: 1dfb adds r3, r7, #7 + 8001158: 781b ldrb r3, [r3, #0] + 800115a: 0018 movs r0, r3 + 800115c: 2303 movs r3, #3 + 800115e: 4003 ands r3, r0 + 8001160: 00db lsls r3, r3, #3 + 8001162: 409a lsls r2, r3 SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8000da0: 4809 ldr r0, [pc, #36] ; (8000dc8 <__NVIC_SetPriority+0xd8>) - 8000da2: 1dfb adds r3, r7, #7 - 8000da4: 781b ldrb r3, [r3, #0] - 8000da6: 001c movs r4, r3 - 8000da8: 230f movs r3, #15 - 8000daa: 4023 ands r3, r4 - 8000dac: 3b08 subs r3, #8 - 8000dae: 089b lsrs r3, r3, #2 - 8000db0: 430a orrs r2, r1 - 8000db2: 3306 adds r3, #6 - 8000db4: 009b lsls r3, r3, #2 - 8000db6: 18c3 adds r3, r0, r3 - 8000db8: 3304 adds r3, #4 - 8000dba: 601a str r2, [r3, #0] + 8001164: 4809 ldr r0, [pc, #36] ; (800118c <__NVIC_SetPriority+0xd8>) + 8001166: 1dfb adds r3, r7, #7 + 8001168: 781b ldrb r3, [r3, #0] + 800116a: 001c movs r4, r3 + 800116c: 230f movs r3, #15 + 800116e: 4023 ands r3, r4 + 8001170: 3b08 subs r3, #8 + 8001172: 089b lsrs r3, r3, #2 + 8001174: 430a orrs r2, r1 + 8001176: 3306 adds r3, #6 + 8001178: 009b lsls r3, r3, #2 + 800117a: 18c3 adds r3, r0, r3 + 800117c: 3304 adds r3, #4 + 800117e: 601a str r2, [r3, #0] } - 8000dbc: 46c0 nop ; (mov r8, r8) - 8000dbe: 46bd mov sp, r7 - 8000dc0: b003 add sp, #12 - 8000dc2: bd90 pop {r4, r7, pc} - 8000dc4: e000e100 .word 0xe000e100 - 8000dc8: e000ed00 .word 0xe000ed00 + 8001180: 46c0 nop ; (mov r8, r8) + 8001182: 46bd mov sp, r7 + 8001184: b003 add sp, #12 + 8001186: bd90 pop {r4, r7, pc} + 8001188: e000e100 .word 0xe000e100 + 800118c: e000ed00 .word 0xe000ed00 -08000dcc : +08001190 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 8000dcc: b580 push {r7, lr} - 8000dce: b082 sub sp, #8 - 8000dd0: af00 add r7, sp, #0 - 8000dd2: 6078 str r0, [r7, #4] + 8001190: b580 push {r7, lr} + 8001192: b082 sub sp, #8 + 8001194: af00 add r7, sp, #0 + 8001196: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8000dd4: 687b ldr r3, [r7, #4] - 8000dd6: 1e5a subs r2, r3, #1 - 8000dd8: 2380 movs r3, #128 ; 0x80 - 8000dda: 045b lsls r3, r3, #17 - 8000ddc: 429a cmp r2, r3 - 8000dde: d301 bcc.n 8000de4 + 8001198: 687b ldr r3, [r7, #4] + 800119a: 1e5a subs r2, r3, #1 + 800119c: 2380 movs r3, #128 ; 0x80 + 800119e: 045b lsls r3, r3, #17 + 80011a0: 429a cmp r2, r3 + 80011a2: d301 bcc.n 80011a8 { return (1UL); /* Reload value impossible */ - 8000de0: 2301 movs r3, #1 - 8000de2: e010 b.n 8000e06 + 80011a4: 2301 movs r3, #1 + 80011a6: e010 b.n 80011ca } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8000de4: 4b0a ldr r3, [pc, #40] ; (8000e10 ) - 8000de6: 687a ldr r2, [r7, #4] - 8000de8: 3a01 subs r2, #1 - 8000dea: 605a str r2, [r3, #4] + 80011a8: 4b0a ldr r3, [pc, #40] ; (80011d4 ) + 80011aa: 687a ldr r2, [r7, #4] + 80011ac: 3a01 subs r2, #1 + 80011ae: 605a str r2, [r3, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 8000dec: 2301 movs r3, #1 - 8000dee: 425b negs r3, r3 - 8000df0: 2103 movs r1, #3 - 8000df2: 0018 movs r0, r3 - 8000df4: f7ff ff7c bl 8000cf0 <__NVIC_SetPriority> + 80011b0: 2301 movs r3, #1 + 80011b2: 425b negs r3, r3 + 80011b4: 2103 movs r1, #3 + 80011b6: 0018 movs r0, r3 + 80011b8: f7ff ff7c bl 80010b4 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8000df8: 4b05 ldr r3, [pc, #20] ; (8000e10 ) - 8000dfa: 2200 movs r2, #0 - 8000dfc: 609a str r2, [r3, #8] + 80011bc: 4b05 ldr r3, [pc, #20] ; (80011d4 ) + 80011be: 2200 movs r2, #0 + 80011c0: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8000dfe: 4b04 ldr r3, [pc, #16] ; (8000e10 ) - 8000e00: 2207 movs r2, #7 - 8000e02: 601a str r2, [r3, #0] + 80011c2: 4b04 ldr r3, [pc, #16] ; (80011d4 ) + 80011c4: 2207 movs r2, #7 + 80011c6: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 8000e04: 2300 movs r3, #0 + 80011c8: 2300 movs r3, #0 } - 8000e06: 0018 movs r0, r3 - 8000e08: 46bd mov sp, r7 - 8000e0a: b002 add sp, #8 - 8000e0c: bd80 pop {r7, pc} - 8000e0e: 46c0 nop ; (mov r8, r8) - 8000e10: e000e010 .word 0xe000e010 + 80011ca: 0018 movs r0, r3 + 80011cc: 46bd mov sp, r7 + 80011ce: b002 add sp, #8 + 80011d0: bd80 pop {r7, pc} + 80011d2: 46c0 nop ; (mov r8, r8) + 80011d4: e000e010 .word 0xe000e010 -08000e14 : +080011d8 : * with stm32f0xx devices, this parameter is a dummy value and it is ignored, because * no subpriority supported in Cortex M0 based products. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8000e14: b580 push {r7, lr} - 8000e16: b084 sub sp, #16 - 8000e18: af00 add r7, sp, #0 - 8000e1a: 60b9 str r1, [r7, #8] - 8000e1c: 607a str r2, [r7, #4] - 8000e1e: 210f movs r1, #15 - 8000e20: 187b adds r3, r7, r1 - 8000e22: 1c02 adds r2, r0, #0 - 8000e24: 701a strb r2, [r3, #0] + 80011d8: b580 push {r7, lr} + 80011da: b084 sub sp, #16 + 80011dc: af00 add r7, sp, #0 + 80011de: 60b9 str r1, [r7, #8] + 80011e0: 607a str r2, [r7, #4] + 80011e2: 210f movs r1, #15 + 80011e4: 187b adds r3, r7, r1 + 80011e6: 1c02 adds r2, r0, #0 + 80011e8: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); NVIC_SetPriority(IRQn,PreemptPriority); - 8000e26: 68ba ldr r2, [r7, #8] - 8000e28: 187b adds r3, r7, r1 - 8000e2a: 781b ldrb r3, [r3, #0] - 8000e2c: b25b sxtb r3, r3 - 8000e2e: 0011 movs r1, r2 - 8000e30: 0018 movs r0, r3 - 8000e32: f7ff ff5d bl 8000cf0 <__NVIC_SetPriority> + 80011ea: 68ba ldr r2, [r7, #8] + 80011ec: 187b adds r3, r7, r1 + 80011ee: 781b ldrb r3, [r3, #0] + 80011f0: b25b sxtb r3, r3 + 80011f2: 0011 movs r1, r2 + 80011f4: 0018 movs r0, r3 + 80011f6: f7ff ff5d bl 80010b4 <__NVIC_SetPriority> } - 8000e36: 46c0 nop ; (mov r8, r8) - 8000e38: 46bd mov sp, r7 - 8000e3a: b004 add sp, #16 - 8000e3c: bd80 pop {r7, pc} + 80011fa: 46c0 nop ; (mov r8, r8) + 80011fc: 46bd mov sp, r7 + 80011fe: b004 add sp, #16 + 8001200: bd80 pop {r7, pc} -08000e3e : +08001202 : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 8000e3e: b580 push {r7, lr} - 8000e40: b082 sub sp, #8 - 8000e42: af00 add r7, sp, #0 - 8000e44: 6078 str r0, [r7, #4] + 8001202: b580 push {r7, lr} + 8001204: b082 sub sp, #8 + 8001206: af00 add r7, sp, #0 + 8001208: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 8000e46: 687b ldr r3, [r7, #4] - 8000e48: 0018 movs r0, r3 - 8000e4a: f7ff ffbf bl 8000dcc - 8000e4e: 0003 movs r3, r0 + 800120a: 687b ldr r3, [r7, #4] + 800120c: 0018 movs r0, r3 + 800120e: f7ff ffbf bl 8001190 + 8001212: 0003 movs r3, r0 } - 8000e50: 0018 movs r0, r3 - 8000e52: 46bd mov sp, r7 - 8000e54: b002 add sp, #8 - 8000e56: bd80 pop {r7, pc} + 8001214: 0018 movs r0, r3 + 8001216: 46bd mov sp, r7 + 8001218: b002 add sp, #8 + 800121a: bd80 pop {r7, pc} -08000e58 : +0800121c : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 8000e58: b580 push {r7, lr} - 8000e5a: b086 sub sp, #24 - 8000e5c: af00 add r7, sp, #0 - 8000e5e: 6078 str r0, [r7, #4] - 8000e60: 6039 str r1, [r7, #0] + 800121c: b580 push {r7, lr} + 800121e: b086 sub sp, #24 + 8001220: af00 add r7, sp, #0 + 8001222: 6078 str r0, [r7, #4] + 8001224: 6039 str r1, [r7, #0] uint32_t position = 0x00u; - 8000e62: 2300 movs r3, #0 - 8000e64: 617b str r3, [r7, #20] + 8001226: 2300 movs r3, #0 + 8001228: 617b str r3, [r7, #20] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) - 8000e66: e14f b.n 8001108 + 800122a: e14f b.n 80014cc { /* Get current io position */ iocurrent = (GPIO_Init->Pin) & (1uL << position); - 8000e68: 683b ldr r3, [r7, #0] - 8000e6a: 681b ldr r3, [r3, #0] - 8000e6c: 2101 movs r1, #1 - 8000e6e: 697a ldr r2, [r7, #20] - 8000e70: 4091 lsls r1, r2 - 8000e72: 000a movs r2, r1 - 8000e74: 4013 ands r3, r2 - 8000e76: 60fb str r3, [r7, #12] + 800122c: 683b ldr r3, [r7, #0] + 800122e: 681b ldr r3, [r3, #0] + 8001230: 2101 movs r1, #1 + 8001232: 697a ldr r2, [r7, #20] + 8001234: 4091 lsls r1, r2 + 8001236: 000a movs r2, r1 + 8001238: 4013 ands r3, r2 + 800123a: 60fb str r3, [r7, #12] if (iocurrent != 0x00u) - 8000e78: 68fb ldr r3, [r7, #12] - 8000e7a: 2b00 cmp r3, #0 - 8000e7c: d100 bne.n 8000e80 - 8000e7e: e140 b.n 8001102 + 800123c: 68fb ldr r3, [r7, #12] + 800123e: 2b00 cmp r3, #0 + 8001240: d100 bne.n 8001244 + 8001242: e140 b.n 80014c6 { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || - 8000e80: 683b ldr r3, [r7, #0] - 8000e82: 685b ldr r3, [r3, #4] - 8000e84: 2203 movs r2, #3 - 8000e86: 4013 ands r3, r2 - 8000e88: 2b01 cmp r3, #1 - 8000e8a: d005 beq.n 8000e98 + 8001244: 683b ldr r3, [r7, #0] + 8001246: 685b ldr r3, [r3, #4] + 8001248: 2203 movs r2, #3 + 800124a: 4013 ands r3, r2 + 800124c: 2b01 cmp r3, #1 + 800124e: d005 beq.n 800125c ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) - 8000e8c: 683b ldr r3, [r7, #0] - 8000e8e: 685b ldr r3, [r3, #4] - 8000e90: 2203 movs r2, #3 - 8000e92: 4013 ands r3, r2 + 8001250: 683b ldr r3, [r7, #0] + 8001252: 685b ldr r3, [r3, #4] + 8001254: 2203 movs r2, #3 + 8001256: 4013 ands r3, r2 if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || - 8000e94: 2b02 cmp r3, #2 - 8000e96: d130 bne.n 8000efa + 8001258: 2b02 cmp r3, #2 + 800125a: d130 bne.n 80012be { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 8000e98: 687b ldr r3, [r7, #4] - 8000e9a: 689b ldr r3, [r3, #8] - 8000e9c: 613b str r3, [r7, #16] + 800125c: 687b ldr r3, [r7, #4] + 800125e: 689b ldr r3, [r3, #8] + 8001260: 613b str r3, [r7, #16] temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); - 8000e9e: 697b ldr r3, [r7, #20] - 8000ea0: 005b lsls r3, r3, #1 - 8000ea2: 2203 movs r2, #3 - 8000ea4: 409a lsls r2, r3 - 8000ea6: 0013 movs r3, r2 - 8000ea8: 43da mvns r2, r3 - 8000eaa: 693b ldr r3, [r7, #16] - 8000eac: 4013 ands r3, r2 - 8000eae: 613b str r3, [r7, #16] + 8001262: 697b ldr r3, [r7, #20] + 8001264: 005b lsls r3, r3, #1 + 8001266: 2203 movs r2, #3 + 8001268: 409a lsls r2, r3 + 800126a: 0013 movs r3, r2 + 800126c: 43da mvns r2, r3 + 800126e: 693b ldr r3, [r7, #16] + 8001270: 4013 ands r3, r2 + 8001272: 613b str r3, [r7, #16] temp |= (GPIO_Init->Speed << (position * 2u)); - 8000eb0: 683b ldr r3, [r7, #0] - 8000eb2: 68da ldr r2, [r3, #12] - 8000eb4: 697b ldr r3, [r7, #20] - 8000eb6: 005b lsls r3, r3, #1 - 8000eb8: 409a lsls r2, r3 - 8000eba: 0013 movs r3, r2 - 8000ebc: 693a ldr r2, [r7, #16] - 8000ebe: 4313 orrs r3, r2 - 8000ec0: 613b str r3, [r7, #16] + 8001274: 683b ldr r3, [r7, #0] + 8001276: 68da ldr r2, [r3, #12] + 8001278: 697b ldr r3, [r7, #20] + 800127a: 005b lsls r3, r3, #1 + 800127c: 409a lsls r2, r3 + 800127e: 0013 movs r3, r2 + 8001280: 693a ldr r2, [r7, #16] + 8001282: 4313 orrs r3, r2 + 8001284: 613b str r3, [r7, #16] GPIOx->OSPEEDR = temp; - 8000ec2: 687b ldr r3, [r7, #4] - 8000ec4: 693a ldr r2, [r7, #16] - 8000ec6: 609a str r2, [r3, #8] + 8001286: 687b ldr r3, [r7, #4] + 8001288: 693a ldr r2, [r7, #16] + 800128a: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; - 8000ec8: 687b ldr r3, [r7, #4] - 8000eca: 685b ldr r3, [r3, #4] - 8000ecc: 613b str r3, [r7, #16] + 800128c: 687b ldr r3, [r7, #4] + 800128e: 685b ldr r3, [r3, #4] + 8001290: 613b str r3, [r7, #16] temp &= ~(GPIO_OTYPER_OT_0 << position) ; - 8000ece: 2201 movs r2, #1 - 8000ed0: 697b ldr r3, [r7, #20] - 8000ed2: 409a lsls r2, r3 - 8000ed4: 0013 movs r3, r2 - 8000ed6: 43da mvns r2, r3 - 8000ed8: 693b ldr r3, [r7, #16] - 8000eda: 4013 ands r3, r2 - 8000edc: 613b str r3, [r7, #16] + 8001292: 2201 movs r2, #1 + 8001294: 697b ldr r3, [r7, #20] + 8001296: 409a lsls r2, r3 + 8001298: 0013 movs r3, r2 + 800129a: 43da mvns r2, r3 + 800129c: 693b ldr r3, [r7, #16] + 800129e: 4013 ands r3, r2 + 80012a0: 613b str r3, [r7, #16] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); - 8000ede: 683b ldr r3, [r7, #0] - 8000ee0: 685b ldr r3, [r3, #4] - 8000ee2: 091b lsrs r3, r3, #4 - 8000ee4: 2201 movs r2, #1 - 8000ee6: 401a ands r2, r3 - 8000ee8: 697b ldr r3, [r7, #20] - 8000eea: 409a lsls r2, r3 - 8000eec: 0013 movs r3, r2 - 8000eee: 693a ldr r2, [r7, #16] - 8000ef0: 4313 orrs r3, r2 - 8000ef2: 613b str r3, [r7, #16] + 80012a2: 683b ldr r3, [r7, #0] + 80012a4: 685b ldr r3, [r3, #4] + 80012a6: 091b lsrs r3, r3, #4 + 80012a8: 2201 movs r2, #1 + 80012aa: 401a ands r2, r3 + 80012ac: 697b ldr r3, [r7, #20] + 80012ae: 409a lsls r2, r3 + 80012b0: 0013 movs r3, r2 + 80012b2: 693a ldr r2, [r7, #16] + 80012b4: 4313 orrs r3, r2 + 80012b6: 613b str r3, [r7, #16] GPIOx->OTYPER = temp; - 8000ef4: 687b ldr r3, [r7, #4] - 8000ef6: 693a ldr r2, [r7, #16] - 8000ef8: 605a str r2, [r3, #4] + 80012b8: 687b ldr r3, [r7, #4] + 80012ba: 693a ldr r2, [r7, #16] + 80012bc: 605a str r2, [r3, #4] } if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) - 8000efa: 683b ldr r3, [r7, #0] - 8000efc: 685b ldr r3, [r3, #4] - 8000efe: 2203 movs r2, #3 - 8000f00: 4013 ands r3, r2 - 8000f02: 2b03 cmp r3, #3 - 8000f04: d017 beq.n 8000f36 + 80012be: 683b ldr r3, [r7, #0] + 80012c0: 685b ldr r3, [r3, #4] + 80012c2: 2203 movs r2, #3 + 80012c4: 4013 ands r3, r2 + 80012c6: 2b03 cmp r3, #3 + 80012c8: d017 beq.n 80012fa { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; - 8000f06: 687b ldr r3, [r7, #4] - 8000f08: 68db ldr r3, [r3, #12] - 8000f0a: 613b str r3, [r7, #16] + 80012ca: 687b ldr r3, [r7, #4] + 80012cc: 68db ldr r3, [r3, #12] + 80012ce: 613b str r3, [r7, #16] temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); - 8000f0c: 697b ldr r3, [r7, #20] - 8000f0e: 005b lsls r3, r3, #1 - 8000f10: 2203 movs r2, #3 - 8000f12: 409a lsls r2, r3 - 8000f14: 0013 movs r3, r2 - 8000f16: 43da mvns r2, r3 - 8000f18: 693b ldr r3, [r7, #16] - 8000f1a: 4013 ands r3, r2 - 8000f1c: 613b str r3, [r7, #16] + 80012d0: 697b ldr r3, [r7, #20] + 80012d2: 005b lsls r3, r3, #1 + 80012d4: 2203 movs r2, #3 + 80012d6: 409a lsls r2, r3 + 80012d8: 0013 movs r3, r2 + 80012da: 43da mvns r2, r3 + 80012dc: 693b ldr r3, [r7, #16] + 80012de: 4013 ands r3, r2 + 80012e0: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Pull) << (position * 2u)); - 8000f1e: 683b ldr r3, [r7, #0] - 8000f20: 689a ldr r2, [r3, #8] - 8000f22: 697b ldr r3, [r7, #20] - 8000f24: 005b lsls r3, r3, #1 - 8000f26: 409a lsls r2, r3 - 8000f28: 0013 movs r3, r2 - 8000f2a: 693a ldr r2, [r7, #16] - 8000f2c: 4313 orrs r3, r2 - 8000f2e: 613b str r3, [r7, #16] + 80012e2: 683b ldr r3, [r7, #0] + 80012e4: 689a ldr r2, [r3, #8] + 80012e6: 697b ldr r3, [r7, #20] + 80012e8: 005b lsls r3, r3, #1 + 80012ea: 409a lsls r2, r3 + 80012ec: 0013 movs r3, r2 + 80012ee: 693a ldr r2, [r7, #16] + 80012f0: 4313 orrs r3, r2 + 80012f2: 613b str r3, [r7, #16] GPIOx->PUPDR = temp; - 8000f30: 687b ldr r3, [r7, #4] - 8000f32: 693a ldr r2, [r7, #16] - 8000f34: 60da str r2, [r3, #12] + 80012f4: 687b ldr r3, [r7, #4] + 80012f6: 693a ldr r2, [r7, #16] + 80012f8: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 8000f36: 683b ldr r3, [r7, #0] - 8000f38: 685b ldr r3, [r3, #4] - 8000f3a: 2203 movs r2, #3 - 8000f3c: 4013 ands r3, r2 - 8000f3e: 2b02 cmp r3, #2 - 8000f40: d123 bne.n 8000f8a + 80012fa: 683b ldr r3, [r7, #0] + 80012fc: 685b ldr r3, [r3, #4] + 80012fe: 2203 movs r2, #3 + 8001300: 4013 ands r3, r2 + 8001302: 2b02 cmp r3, #2 + 8001304: d123 bne.n 800134e /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3u]; - 8000f42: 697b ldr r3, [r7, #20] - 8000f44: 08da lsrs r2, r3, #3 - 8000f46: 687b ldr r3, [r7, #4] - 8000f48: 3208 adds r2, #8 - 8000f4a: 0092 lsls r2, r2, #2 - 8000f4c: 58d3 ldr r3, [r2, r3] - 8000f4e: 613b str r3, [r7, #16] + 8001306: 697b ldr r3, [r7, #20] + 8001308: 08da lsrs r2, r3, #3 + 800130a: 687b ldr r3, [r7, #4] + 800130c: 3208 adds r2, #8 + 800130e: 0092 lsls r2, r2, #2 + 8001310: 58d3 ldr r3, [r2, r3] + 8001312: 613b str r3, [r7, #16] temp &= ~(0xFu << ((position & 0x07u) * 4u)); - 8000f50: 697b ldr r3, [r7, #20] - 8000f52: 2207 movs r2, #7 - 8000f54: 4013 ands r3, r2 - 8000f56: 009b lsls r3, r3, #2 - 8000f58: 220f movs r2, #15 - 8000f5a: 409a lsls r2, r3 - 8000f5c: 0013 movs r3, r2 - 8000f5e: 43da mvns r2, r3 - 8000f60: 693b ldr r3, [r7, #16] - 8000f62: 4013 ands r3, r2 - 8000f64: 613b str r3, [r7, #16] + 8001314: 697b ldr r3, [r7, #20] + 8001316: 2207 movs r2, #7 + 8001318: 4013 ands r3, r2 + 800131a: 009b lsls r3, r3, #2 + 800131c: 220f movs r2, #15 + 800131e: 409a lsls r2, r3 + 8001320: 0013 movs r3, r2 + 8001322: 43da mvns r2, r3 + 8001324: 693b ldr r3, [r7, #16] + 8001326: 4013 ands r3, r2 + 8001328: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); - 8000f66: 683b ldr r3, [r7, #0] - 8000f68: 691a ldr r2, [r3, #16] - 8000f6a: 697b ldr r3, [r7, #20] - 8000f6c: 2107 movs r1, #7 - 8000f6e: 400b ands r3, r1 - 8000f70: 009b lsls r3, r3, #2 - 8000f72: 409a lsls r2, r3 - 8000f74: 0013 movs r3, r2 - 8000f76: 693a ldr r2, [r7, #16] - 8000f78: 4313 orrs r3, r2 - 8000f7a: 613b str r3, [r7, #16] + 800132a: 683b ldr r3, [r7, #0] + 800132c: 691a ldr r2, [r3, #16] + 800132e: 697b ldr r3, [r7, #20] + 8001330: 2107 movs r1, #7 + 8001332: 400b ands r3, r1 + 8001334: 009b lsls r3, r3, #2 + 8001336: 409a lsls r2, r3 + 8001338: 0013 movs r3, r2 + 800133a: 693a ldr r2, [r7, #16] + 800133c: 4313 orrs r3, r2 + 800133e: 613b str r3, [r7, #16] GPIOx->AFR[position >> 3u] = temp; - 8000f7c: 697b ldr r3, [r7, #20] - 8000f7e: 08da lsrs r2, r3, #3 - 8000f80: 687b ldr r3, [r7, #4] - 8000f82: 3208 adds r2, #8 - 8000f84: 0092 lsls r2, r2, #2 - 8000f86: 6939 ldr r1, [r7, #16] - 8000f88: 50d1 str r1, [r2, r3] + 8001340: 697b ldr r3, [r7, #20] + 8001342: 08da lsrs r2, r3, #3 + 8001344: 687b ldr r3, [r7, #4] + 8001346: 3208 adds r2, #8 + 8001348: 0092 lsls r2, r2, #2 + 800134a: 6939 ldr r1, [r7, #16] + 800134c: 50d1 str r1, [r2, r3] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; - 8000f8a: 687b ldr r3, [r7, #4] - 8000f8c: 681b ldr r3, [r3, #0] - 8000f8e: 613b str r3, [r7, #16] + 800134e: 687b ldr r3, [r7, #4] + 8001350: 681b ldr r3, [r3, #0] + 8001352: 613b str r3, [r7, #16] temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); - 8000f90: 697b ldr r3, [r7, #20] - 8000f92: 005b lsls r3, r3, #1 - 8000f94: 2203 movs r2, #3 - 8000f96: 409a lsls r2, r3 - 8000f98: 0013 movs r3, r2 - 8000f9a: 43da mvns r2, r3 - 8000f9c: 693b ldr r3, [r7, #16] - 8000f9e: 4013 ands r3, r2 - 8000fa0: 613b str r3, [r7, #16] + 8001354: 697b ldr r3, [r7, #20] + 8001356: 005b lsls r3, r3, #1 + 8001358: 2203 movs r2, #3 + 800135a: 409a lsls r2, r3 + 800135c: 0013 movs r3, r2 + 800135e: 43da mvns r2, r3 + 8001360: 693b ldr r3, [r7, #16] + 8001362: 4013 ands r3, r2 + 8001364: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); - 8000fa2: 683b ldr r3, [r7, #0] - 8000fa4: 685b ldr r3, [r3, #4] - 8000fa6: 2203 movs r2, #3 - 8000fa8: 401a ands r2, r3 - 8000faa: 697b ldr r3, [r7, #20] - 8000fac: 005b lsls r3, r3, #1 - 8000fae: 409a lsls r2, r3 - 8000fb0: 0013 movs r3, r2 - 8000fb2: 693a ldr r2, [r7, #16] - 8000fb4: 4313 orrs r3, r2 - 8000fb6: 613b str r3, [r7, #16] + 8001366: 683b ldr r3, [r7, #0] + 8001368: 685b ldr r3, [r3, #4] + 800136a: 2203 movs r2, #3 + 800136c: 401a ands r2, r3 + 800136e: 697b ldr r3, [r7, #20] + 8001370: 005b lsls r3, r3, #1 + 8001372: 409a lsls r2, r3 + 8001374: 0013 movs r3, r2 + 8001376: 693a ldr r2, [r7, #16] + 8001378: 4313 orrs r3, r2 + 800137a: 613b str r3, [r7, #16] GPIOx->MODER = temp; - 8000fb8: 687b ldr r3, [r7, #4] - 8000fba: 693a ldr r2, [r7, #16] - 8000fbc: 601a str r2, [r3, #0] + 800137c: 687b ldr r3, [r7, #4] + 800137e: 693a ldr r2, [r7, #16] + 8001380: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if((GPIO_Init->Mode & EXTI_MODE) != 0x00u) - 8000fbe: 683b ldr r3, [r7, #0] - 8000fc0: 685a ldr r2, [r3, #4] - 8000fc2: 23c0 movs r3, #192 ; 0xc0 - 8000fc4: 029b lsls r3, r3, #10 - 8000fc6: 4013 ands r3, r2 - 8000fc8: d100 bne.n 8000fcc - 8000fca: e09a b.n 8001102 + 8001382: 683b ldr r3, [r7, #0] + 8001384: 685a ldr r2, [r3, #4] + 8001386: 23c0 movs r3, #192 ; 0xc0 + 8001388: 029b lsls r3, r3, #10 + 800138a: 4013 ands r3, r2 + 800138c: d100 bne.n 8001390 + 800138e: e09a b.n 80014c6 { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8000fcc: 4b54 ldr r3, [pc, #336] ; (8001120 ) - 8000fce: 699a ldr r2, [r3, #24] - 8000fd0: 4b53 ldr r3, [pc, #332] ; (8001120 ) - 8000fd2: 2101 movs r1, #1 - 8000fd4: 430a orrs r2, r1 - 8000fd6: 619a str r2, [r3, #24] - 8000fd8: 4b51 ldr r3, [pc, #324] ; (8001120 ) - 8000fda: 699b ldr r3, [r3, #24] - 8000fdc: 2201 movs r2, #1 - 8000fde: 4013 ands r3, r2 - 8000fe0: 60bb str r3, [r7, #8] - 8000fe2: 68bb ldr r3, [r7, #8] + 8001390: 4b54 ldr r3, [pc, #336] ; (80014e4 ) + 8001392: 699a ldr r2, [r3, #24] + 8001394: 4b53 ldr r3, [pc, #332] ; (80014e4 ) + 8001396: 2101 movs r1, #1 + 8001398: 430a orrs r2, r1 + 800139a: 619a str r2, [r3, #24] + 800139c: 4b51 ldr r3, [pc, #324] ; (80014e4 ) + 800139e: 699b ldr r3, [r3, #24] + 80013a0: 2201 movs r2, #1 + 80013a2: 4013 ands r3, r2 + 80013a4: 60bb str r3, [r7, #8] + 80013a6: 68bb ldr r3, [r7, #8] temp = SYSCFG->EXTICR[position >> 2u]; - 8000fe4: 4a4f ldr r2, [pc, #316] ; (8001124 ) - 8000fe6: 697b ldr r3, [r7, #20] - 8000fe8: 089b lsrs r3, r3, #2 - 8000fea: 3302 adds r3, #2 - 8000fec: 009b lsls r3, r3, #2 - 8000fee: 589b ldr r3, [r3, r2] - 8000ff0: 613b str r3, [r7, #16] + 80013a8: 4a4f ldr r2, [pc, #316] ; (80014e8 ) + 80013aa: 697b ldr r3, [r7, #20] + 80013ac: 089b lsrs r3, r3, #2 + 80013ae: 3302 adds r3, #2 + 80013b0: 009b lsls r3, r3, #2 + 80013b2: 589b ldr r3, [r3, r2] + 80013b4: 613b str r3, [r7, #16] temp &= ~(0x0FuL << (4u * (position & 0x03u))); - 8000ff2: 697b ldr r3, [r7, #20] - 8000ff4: 2203 movs r2, #3 - 8000ff6: 4013 ands r3, r2 - 8000ff8: 009b lsls r3, r3, #2 - 8000ffa: 220f movs r2, #15 - 8000ffc: 409a lsls r2, r3 - 8000ffe: 0013 movs r3, r2 - 8001000: 43da mvns r2, r3 - 8001002: 693b ldr r3, [r7, #16] - 8001004: 4013 ands r3, r2 - 8001006: 613b str r3, [r7, #16] + 80013b6: 697b ldr r3, [r7, #20] + 80013b8: 2203 movs r2, #3 + 80013ba: 4013 ands r3, r2 + 80013bc: 009b lsls r3, r3, #2 + 80013be: 220f movs r2, #15 + 80013c0: 409a lsls r2, r3 + 80013c2: 0013 movs r3, r2 + 80013c4: 43da mvns r2, r3 + 80013c6: 693b ldr r3, [r7, #16] + 80013c8: 4013 ands r3, r2 + 80013ca: 613b str r3, [r7, #16] temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); - 8001008: 687a ldr r2, [r7, #4] - 800100a: 2390 movs r3, #144 ; 0x90 - 800100c: 05db lsls r3, r3, #23 - 800100e: 429a cmp r2, r3 - 8001010: d013 beq.n 800103a - 8001012: 687b ldr r3, [r7, #4] - 8001014: 4a44 ldr r2, [pc, #272] ; (8001128 ) - 8001016: 4293 cmp r3, r2 - 8001018: d00d beq.n 8001036 - 800101a: 687b ldr r3, [r7, #4] - 800101c: 4a43 ldr r2, [pc, #268] ; (800112c ) - 800101e: 4293 cmp r3, r2 - 8001020: d007 beq.n 8001032 - 8001022: 687b ldr r3, [r7, #4] - 8001024: 4a42 ldr r2, [pc, #264] ; (8001130 ) - 8001026: 4293 cmp r3, r2 - 8001028: d101 bne.n 800102e - 800102a: 2303 movs r3, #3 - 800102c: e006 b.n 800103c - 800102e: 2305 movs r3, #5 - 8001030: e004 b.n 800103c - 8001032: 2302 movs r3, #2 - 8001034: e002 b.n 800103c - 8001036: 2301 movs r3, #1 - 8001038: e000 b.n 800103c - 800103a: 2300 movs r3, #0 - 800103c: 697a ldr r2, [r7, #20] - 800103e: 2103 movs r1, #3 - 8001040: 400a ands r2, r1 - 8001042: 0092 lsls r2, r2, #2 - 8001044: 4093 lsls r3, r2 - 8001046: 693a ldr r2, [r7, #16] - 8001048: 4313 orrs r3, r2 - 800104a: 613b str r3, [r7, #16] + 80013cc: 687a ldr r2, [r7, #4] + 80013ce: 2390 movs r3, #144 ; 0x90 + 80013d0: 05db lsls r3, r3, #23 + 80013d2: 429a cmp r2, r3 + 80013d4: d013 beq.n 80013fe + 80013d6: 687b ldr r3, [r7, #4] + 80013d8: 4a44 ldr r2, [pc, #272] ; (80014ec ) + 80013da: 4293 cmp r3, r2 + 80013dc: d00d beq.n 80013fa + 80013de: 687b ldr r3, [r7, #4] + 80013e0: 4a43 ldr r2, [pc, #268] ; (80014f0 ) + 80013e2: 4293 cmp r3, r2 + 80013e4: d007 beq.n 80013f6 + 80013e6: 687b ldr r3, [r7, #4] + 80013e8: 4a42 ldr r2, [pc, #264] ; (80014f4 ) + 80013ea: 4293 cmp r3, r2 + 80013ec: d101 bne.n 80013f2 + 80013ee: 2303 movs r3, #3 + 80013f0: e006 b.n 8001400 + 80013f2: 2305 movs r3, #5 + 80013f4: e004 b.n 8001400 + 80013f6: 2302 movs r3, #2 + 80013f8: e002 b.n 8001400 + 80013fa: 2301 movs r3, #1 + 80013fc: e000 b.n 8001400 + 80013fe: 2300 movs r3, #0 + 8001400: 697a ldr r2, [r7, #20] + 8001402: 2103 movs r1, #3 + 8001404: 400a ands r2, r1 + 8001406: 0092 lsls r2, r2, #2 + 8001408: 4093 lsls r3, r2 + 800140a: 693a ldr r2, [r7, #16] + 800140c: 4313 orrs r3, r2 + 800140e: 613b str r3, [r7, #16] SYSCFG->EXTICR[position >> 2u] = temp; - 800104c: 4935 ldr r1, [pc, #212] ; (8001124 ) - 800104e: 697b ldr r3, [r7, #20] - 8001050: 089b lsrs r3, r3, #2 - 8001052: 3302 adds r3, #2 - 8001054: 009b lsls r3, r3, #2 - 8001056: 693a ldr r2, [r7, #16] - 8001058: 505a str r2, [r3, r1] + 8001410: 4935 ldr r1, [pc, #212] ; (80014e8 ) + 8001412: 697b ldr r3, [r7, #20] + 8001414: 089b lsrs r3, r3, #2 + 8001416: 3302 adds r3, #2 + 8001418: 009b lsls r3, r3, #2 + 800141a: 693a ldr r2, [r7, #16] + 800141c: 505a str r2, [r3, r1] /* Clear EXTI line configuration */ temp = EXTI->IMR; - 800105a: 4b36 ldr r3, [pc, #216] ; (8001134 ) - 800105c: 681b ldr r3, [r3, #0] - 800105e: 613b str r3, [r7, #16] + 800141e: 4b36 ldr r3, [pc, #216] ; (80014f8 ) + 8001420: 681b ldr r3, [r3, #0] + 8001422: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8001060: 68fb ldr r3, [r7, #12] - 8001062: 43da mvns r2, r3 - 8001064: 693b ldr r3, [r7, #16] - 8001066: 4013 ands r3, r2 - 8001068: 613b str r3, [r7, #16] + 8001424: 68fb ldr r3, [r7, #12] + 8001426: 43da mvns r2, r3 + 8001428: 693b ldr r3, [r7, #16] + 800142a: 4013 ands r3, r2 + 800142c: 613b str r3, [r7, #16] if((GPIO_Init->Mode & EXTI_IT) != 0x00u) - 800106a: 683b ldr r3, [r7, #0] - 800106c: 685a ldr r2, [r3, #4] - 800106e: 2380 movs r3, #128 ; 0x80 - 8001070: 025b lsls r3, r3, #9 - 8001072: 4013 ands r3, r2 - 8001074: d003 beq.n 800107e + 800142e: 683b ldr r3, [r7, #0] + 8001430: 685a ldr r2, [r3, #4] + 8001432: 2380 movs r3, #128 ; 0x80 + 8001434: 025b lsls r3, r3, #9 + 8001436: 4013 ands r3, r2 + 8001438: d003 beq.n 8001442 { temp |= iocurrent; - 8001076: 693a ldr r2, [r7, #16] - 8001078: 68fb ldr r3, [r7, #12] - 800107a: 4313 orrs r3, r2 - 800107c: 613b str r3, [r7, #16] + 800143a: 693a ldr r2, [r7, #16] + 800143c: 68fb ldr r3, [r7, #12] + 800143e: 4313 orrs r3, r2 + 8001440: 613b str r3, [r7, #16] } EXTI->IMR = temp; - 800107e: 4b2d ldr r3, [pc, #180] ; (8001134 ) - 8001080: 693a ldr r2, [r7, #16] - 8001082: 601a str r2, [r3, #0] + 8001442: 4b2d ldr r3, [pc, #180] ; (80014f8 ) + 8001444: 693a ldr r2, [r7, #16] + 8001446: 601a str r2, [r3, #0] temp = EXTI->EMR; - 8001084: 4b2b ldr r3, [pc, #172] ; (8001134 ) - 8001086: 685b ldr r3, [r3, #4] - 8001088: 613b str r3, [r7, #16] + 8001448: 4b2b ldr r3, [pc, #172] ; (80014f8 ) + 800144a: 685b ldr r3, [r3, #4] + 800144c: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 800108a: 68fb ldr r3, [r7, #12] - 800108c: 43da mvns r2, r3 - 800108e: 693b ldr r3, [r7, #16] - 8001090: 4013 ands r3, r2 - 8001092: 613b str r3, [r7, #16] + 800144e: 68fb ldr r3, [r7, #12] + 8001450: 43da mvns r2, r3 + 8001452: 693b ldr r3, [r7, #16] + 8001454: 4013 ands r3, r2 + 8001456: 613b str r3, [r7, #16] if((GPIO_Init->Mode & EXTI_EVT) != 0x00u) - 8001094: 683b ldr r3, [r7, #0] - 8001096: 685a ldr r2, [r3, #4] - 8001098: 2380 movs r3, #128 ; 0x80 - 800109a: 029b lsls r3, r3, #10 - 800109c: 4013 ands r3, r2 - 800109e: d003 beq.n 80010a8 + 8001458: 683b ldr r3, [r7, #0] + 800145a: 685a ldr r2, [r3, #4] + 800145c: 2380 movs r3, #128 ; 0x80 + 800145e: 029b lsls r3, r3, #10 + 8001460: 4013 ands r3, r2 + 8001462: d003 beq.n 800146c { temp |= iocurrent; - 80010a0: 693a ldr r2, [r7, #16] - 80010a2: 68fb ldr r3, [r7, #12] - 80010a4: 4313 orrs r3, r2 - 80010a6: 613b str r3, [r7, #16] + 8001464: 693a ldr r2, [r7, #16] + 8001466: 68fb ldr r3, [r7, #12] + 8001468: 4313 orrs r3, r2 + 800146a: 613b str r3, [r7, #16] } EXTI->EMR = temp; - 80010a8: 4b22 ldr r3, [pc, #136] ; (8001134 ) - 80010aa: 693a ldr r2, [r7, #16] - 80010ac: 605a str r2, [r3, #4] + 800146c: 4b22 ldr r3, [pc, #136] ; (80014f8 ) + 800146e: 693a ldr r2, [r7, #16] + 8001470: 605a str r2, [r3, #4] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; - 80010ae: 4b21 ldr r3, [pc, #132] ; (8001134 ) - 80010b0: 689b ldr r3, [r3, #8] - 80010b2: 613b str r3, [r7, #16] + 8001472: 4b21 ldr r3, [pc, #132] ; (80014f8 ) + 8001474: 689b ldr r3, [r3, #8] + 8001476: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 80010b4: 68fb ldr r3, [r7, #12] - 80010b6: 43da mvns r2, r3 - 80010b8: 693b ldr r3, [r7, #16] - 80010ba: 4013 ands r3, r2 - 80010bc: 613b str r3, [r7, #16] + 8001478: 68fb ldr r3, [r7, #12] + 800147a: 43da mvns r2, r3 + 800147c: 693b ldr r3, [r7, #16] + 800147e: 4013 ands r3, r2 + 8001480: 613b str r3, [r7, #16] if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) - 80010be: 683b ldr r3, [r7, #0] - 80010c0: 685a ldr r2, [r3, #4] - 80010c2: 2380 movs r3, #128 ; 0x80 - 80010c4: 035b lsls r3, r3, #13 - 80010c6: 4013 ands r3, r2 - 80010c8: d003 beq.n 80010d2 + 8001482: 683b ldr r3, [r7, #0] + 8001484: 685a ldr r2, [r3, #4] + 8001486: 2380 movs r3, #128 ; 0x80 + 8001488: 035b lsls r3, r3, #13 + 800148a: 4013 ands r3, r2 + 800148c: d003 beq.n 8001496 { temp |= iocurrent; - 80010ca: 693a ldr r2, [r7, #16] - 80010cc: 68fb ldr r3, [r7, #12] - 80010ce: 4313 orrs r3, r2 - 80010d0: 613b str r3, [r7, #16] + 800148e: 693a ldr r2, [r7, #16] + 8001490: 68fb ldr r3, [r7, #12] + 8001492: 4313 orrs r3, r2 + 8001494: 613b str r3, [r7, #16] } EXTI->RTSR = temp; - 80010d2: 4b18 ldr r3, [pc, #96] ; (8001134 ) - 80010d4: 693a ldr r2, [r7, #16] - 80010d6: 609a str r2, [r3, #8] + 8001496: 4b18 ldr r3, [pc, #96] ; (80014f8 ) + 8001498: 693a ldr r2, [r7, #16] + 800149a: 609a str r2, [r3, #8] temp = EXTI->FTSR; - 80010d8: 4b16 ldr r3, [pc, #88] ; (8001134 ) - 80010da: 68db ldr r3, [r3, #12] - 80010dc: 613b str r3, [r7, #16] + 800149c: 4b16 ldr r3, [pc, #88] ; (80014f8 ) + 800149e: 68db ldr r3, [r3, #12] + 80014a0: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 80010de: 68fb ldr r3, [r7, #12] - 80010e0: 43da mvns r2, r3 - 80010e2: 693b ldr r3, [r7, #16] - 80010e4: 4013 ands r3, r2 - 80010e6: 613b str r3, [r7, #16] + 80014a2: 68fb ldr r3, [r7, #12] + 80014a4: 43da mvns r2, r3 + 80014a6: 693b ldr r3, [r7, #16] + 80014a8: 4013 ands r3, r2 + 80014aa: 613b str r3, [r7, #16] if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) - 80010e8: 683b ldr r3, [r7, #0] - 80010ea: 685a ldr r2, [r3, #4] - 80010ec: 2380 movs r3, #128 ; 0x80 - 80010ee: 039b lsls r3, r3, #14 - 80010f0: 4013 ands r3, r2 - 80010f2: d003 beq.n 80010fc + 80014ac: 683b ldr r3, [r7, #0] + 80014ae: 685a ldr r2, [r3, #4] + 80014b0: 2380 movs r3, #128 ; 0x80 + 80014b2: 039b lsls r3, r3, #14 + 80014b4: 4013 ands r3, r2 + 80014b6: d003 beq.n 80014c0 { temp |= iocurrent; - 80010f4: 693a ldr r2, [r7, #16] - 80010f6: 68fb ldr r3, [r7, #12] - 80010f8: 4313 orrs r3, r2 - 80010fa: 613b str r3, [r7, #16] + 80014b8: 693a ldr r2, [r7, #16] + 80014ba: 68fb ldr r3, [r7, #12] + 80014bc: 4313 orrs r3, r2 + 80014be: 613b str r3, [r7, #16] } EXTI->FTSR = temp; - 80010fc: 4b0d ldr r3, [pc, #52] ; (8001134 ) - 80010fe: 693a ldr r2, [r7, #16] - 8001100: 60da str r2, [r3, #12] + 80014c0: 4b0d ldr r3, [pc, #52] ; (80014f8 ) + 80014c2: 693a ldr r2, [r7, #16] + 80014c4: 60da str r2, [r3, #12] } } position++; - 8001102: 697b ldr r3, [r7, #20] - 8001104: 3301 adds r3, #1 - 8001106: 617b str r3, [r7, #20] + 80014c6: 697b ldr r3, [r7, #20] + 80014c8: 3301 adds r3, #1 + 80014ca: 617b str r3, [r7, #20] while (((GPIO_Init->Pin) >> position) != 0x00u) - 8001108: 683b ldr r3, [r7, #0] - 800110a: 681a ldr r2, [r3, #0] - 800110c: 697b ldr r3, [r7, #20] - 800110e: 40da lsrs r2, r3 - 8001110: 1e13 subs r3, r2, #0 - 8001112: d000 beq.n 8001116 - 8001114: e6a8 b.n 8000e68 + 80014cc: 683b ldr r3, [r7, #0] + 80014ce: 681a ldr r2, [r3, #0] + 80014d0: 697b ldr r3, [r7, #20] + 80014d2: 40da lsrs r2, r3 + 80014d4: 1e13 subs r3, r2, #0 + 80014d6: d000 beq.n 80014da + 80014d8: e6a8 b.n 800122c } } - 8001116: 46c0 nop ; (mov r8, r8) - 8001118: 46c0 nop ; (mov r8, r8) - 800111a: 46bd mov sp, r7 - 800111c: b006 add sp, #24 - 800111e: bd80 pop {r7, pc} - 8001120: 40021000 .word 0x40021000 - 8001124: 40010000 .word 0x40010000 - 8001128: 48000400 .word 0x48000400 - 800112c: 48000800 .word 0x48000800 - 8001130: 48000c00 .word 0x48000c00 - 8001134: 40010400 .word 0x40010400 + 80014da: 46c0 nop ; (mov r8, r8) + 80014dc: 46c0 nop ; (mov r8, r8) + 80014de: 46bd mov sp, r7 + 80014e0: b006 add sp, #24 + 80014e2: bd80 pop {r7, pc} + 80014e4: 40021000 .word 0x40021000 + 80014e8: 40010000 .word 0x40010000 + 80014ec: 48000400 .word 0x48000400 + 80014f0: 48000800 .word 0x48000800 + 80014f4: 48000c00 .word 0x48000c00 + 80014f8: 40010400 .word 0x40010400 -08001138 : +080014fc : * @param GPIO_Pin specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) { - 8001138: b580 push {r7, lr} - 800113a: b084 sub sp, #16 - 800113c: af00 add r7, sp, #0 - 800113e: 6078 str r0, [r7, #4] - 8001140: 000a movs r2, r1 - 8001142: 1cbb adds r3, r7, #2 - 8001144: 801a strh r2, [r3, #0] + 80014fc: b580 push {r7, lr} + 80014fe: b084 sub sp, #16 + 8001500: af00 add r7, sp, #0 + 8001502: 6078 str r0, [r7, #4] + 8001504: 000a movs r2, r1 + 8001506: 1cbb adds r3, r7, #2 + 8001508: 801a strh r2, [r3, #0] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - 8001146: 687b ldr r3, [r7, #4] - 8001148: 691b ldr r3, [r3, #16] - 800114a: 1cba adds r2, r7, #2 - 800114c: 8812 ldrh r2, [r2, #0] - 800114e: 4013 ands r3, r2 - 8001150: d004 beq.n 800115c + 800150a: 687b ldr r3, [r7, #4] + 800150c: 691b ldr r3, [r3, #16] + 800150e: 1cba adds r2, r7, #2 + 8001510: 8812 ldrh r2, [r2, #0] + 8001512: 4013 ands r3, r2 + 8001514: d004 beq.n 8001520 { bitstatus = GPIO_PIN_SET; - 8001152: 230f movs r3, #15 - 8001154: 18fb adds r3, r7, r3 - 8001156: 2201 movs r2, #1 - 8001158: 701a strb r2, [r3, #0] - 800115a: e003 b.n 8001164 + 8001516: 230f movs r3, #15 + 8001518: 18fb adds r3, r7, r3 + 800151a: 2201 movs r2, #1 + 800151c: 701a strb r2, [r3, #0] + 800151e: e003 b.n 8001528 } else { bitstatus = GPIO_PIN_RESET; - 800115c: 230f movs r3, #15 - 800115e: 18fb adds r3, r7, r3 - 8001160: 2200 movs r2, #0 - 8001162: 701a strb r2, [r3, #0] + 8001520: 230f movs r3, #15 + 8001522: 18fb adds r3, r7, r3 + 8001524: 2200 movs r2, #0 + 8001526: 701a strb r2, [r3, #0] } return bitstatus; - 8001164: 230f movs r3, #15 - 8001166: 18fb adds r3, r7, r3 - 8001168: 781b ldrb r3, [r3, #0] + 8001528: 230f movs r3, #15 + 800152a: 18fb adds r3, r7, r3 + 800152c: 781b ldrb r3, [r3, #0] } - 800116a: 0018 movs r0, r3 - 800116c: 46bd mov sp, r7 - 800116e: b004 add sp, #16 - 8001170: bd80 pop {r7, pc} + 800152e: 0018 movs r0, r3 + 8001530: 46bd mov sp, r7 + 8001532: b004 add sp, #16 + 8001534: bd80 pop {r7, pc} -08001172 : +08001536 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 8001172: b580 push {r7, lr} - 8001174: b082 sub sp, #8 - 8001176: af00 add r7, sp, #0 - 8001178: 6078 str r0, [r7, #4] - 800117a: 0008 movs r0, r1 - 800117c: 0011 movs r1, r2 - 800117e: 1cbb adds r3, r7, #2 - 8001180: 1c02 adds r2, r0, #0 - 8001182: 801a strh r2, [r3, #0] - 8001184: 1c7b adds r3, r7, #1 - 8001186: 1c0a adds r2, r1, #0 - 8001188: 701a strb r2, [r3, #0] + 8001536: b580 push {r7, lr} + 8001538: b082 sub sp, #8 + 800153a: af00 add r7, sp, #0 + 800153c: 6078 str r0, [r7, #4] + 800153e: 0008 movs r0, r1 + 8001540: 0011 movs r1, r2 + 8001542: 1cbb adds r3, r7, #2 + 8001544: 1c02 adds r2, r0, #0 + 8001546: 801a strh r2, [r3, #0] + 8001548: 1c7b adds r3, r7, #1 + 800154a: 1c0a adds r2, r1, #0 + 800154c: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 800118a: 1c7b adds r3, r7, #1 - 800118c: 781b ldrb r3, [r3, #0] - 800118e: 2b00 cmp r3, #0 - 8001190: d004 beq.n 800119c + 800154e: 1c7b adds r3, r7, #1 + 8001550: 781b ldrb r3, [r3, #0] + 8001552: 2b00 cmp r3, #0 + 8001554: d004 beq.n 8001560 { GPIOx->BSRR = (uint32_t)GPIO_Pin; - 8001192: 1cbb adds r3, r7, #2 - 8001194: 881a ldrh r2, [r3, #0] - 8001196: 687b ldr r3, [r7, #4] - 8001198: 619a str r2, [r3, #24] + 8001556: 1cbb adds r3, r7, #2 + 8001558: 881a ldrh r2, [r3, #0] + 800155a: 687b ldr r3, [r7, #4] + 800155c: 619a str r2, [r3, #24] } else { GPIOx->BRR = (uint32_t)GPIO_Pin; } } - 800119a: e003 b.n 80011a4 + 800155e: e003 b.n 8001568 GPIOx->BRR = (uint32_t)GPIO_Pin; - 800119c: 1cbb adds r3, r7, #2 - 800119e: 881a ldrh r2, [r3, #0] - 80011a0: 687b ldr r3, [r7, #4] - 80011a2: 629a str r2, [r3, #40] ; 0x28 + 8001560: 1cbb adds r3, r7, #2 + 8001562: 881a ldrh r2, [r3, #0] + 8001564: 687b ldr r3, [r7, #4] + 8001566: 629a str r2, [r3, #40] ; 0x28 } - 80011a4: 46c0 nop ; (mov r8, r8) - 80011a6: 46bd mov sp, r7 - 80011a8: b002 add sp, #8 - 80011aa: bd80 pop {r7, pc} + 8001568: 46c0 nop ; (mov r8, r8) + 800156a: 46bd mov sp, r7 + 800156c: b002 add sp, #8 + 800156e: bd80 pop {r7, pc} -080011ac : +08001570 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 80011ac: b580 push {r7, lr} - 80011ae: b088 sub sp, #32 - 80011b0: af00 add r7, sp, #0 - 80011b2: 6078 str r0, [r7, #4] + 8001570: b580 push {r7, lr} + 8001572: b088 sub sp, #32 + 8001574: af00 add r7, sp, #0 + 8001576: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; uint32_t pll_config2; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) - 80011b4: 687b ldr r3, [r7, #4] - 80011b6: 2b00 cmp r3, #0 - 80011b8: d101 bne.n 80011be + 8001578: 687b ldr r3, [r7, #4] + 800157a: 2b00 cmp r3, #0 + 800157c: d101 bne.n 8001582 { return HAL_ERROR; - 80011ba: 2301 movs r3, #1 - 80011bc: e301 b.n 80017c2 + 800157e: 2301 movs r3, #1 + 8001580: e301 b.n 8001b86 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 80011be: 687b ldr r3, [r7, #4] - 80011c0: 681b ldr r3, [r3, #0] - 80011c2: 2201 movs r2, #1 - 80011c4: 4013 ands r3, r2 - 80011c6: d100 bne.n 80011ca - 80011c8: e08d b.n 80012e6 + 8001582: 687b ldr r3, [r7, #4] + 8001584: 681b ldr r3, [r3, #0] + 8001586: 2201 movs r2, #1 + 8001588: 4013 ands r3, r2 + 800158a: d100 bne.n 800158e + 800158c: e08d b.n 80016aa { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) - 80011ca: 4bc3 ldr r3, [pc, #780] ; (80014d8 ) - 80011cc: 685b ldr r3, [r3, #4] - 80011ce: 220c movs r2, #12 - 80011d0: 4013 ands r3, r2 - 80011d2: 2b04 cmp r3, #4 - 80011d4: d00e beq.n 80011f4 + 800158e: 4bc3 ldr r3, [pc, #780] ; (800189c ) + 8001590: 685b ldr r3, [r3, #4] + 8001592: 220c movs r2, #12 + 8001594: 4013 ands r3, r2 + 8001596: 2b04 cmp r3, #4 + 8001598: d00e beq.n 80015b8 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) - 80011d6: 4bc0 ldr r3, [pc, #768] ; (80014d8 ) - 80011d8: 685b ldr r3, [r3, #4] - 80011da: 220c movs r2, #12 - 80011dc: 4013 ands r3, r2 - 80011de: 2b08 cmp r3, #8 - 80011e0: d116 bne.n 8001210 - 80011e2: 4bbd ldr r3, [pc, #756] ; (80014d8 ) - 80011e4: 685a ldr r2, [r3, #4] - 80011e6: 2380 movs r3, #128 ; 0x80 - 80011e8: 025b lsls r3, r3, #9 - 80011ea: 401a ands r2, r3 - 80011ec: 2380 movs r3, #128 ; 0x80 - 80011ee: 025b lsls r3, r3, #9 - 80011f0: 429a cmp r2, r3 - 80011f2: d10d bne.n 8001210 + 800159a: 4bc0 ldr r3, [pc, #768] ; (800189c ) + 800159c: 685b ldr r3, [r3, #4] + 800159e: 220c movs r2, #12 + 80015a0: 4013 ands r3, r2 + 80015a2: 2b08 cmp r3, #8 + 80015a4: d116 bne.n 80015d4 + 80015a6: 4bbd ldr r3, [pc, #756] ; (800189c ) + 80015a8: 685a ldr r2, [r3, #4] + 80015aa: 2380 movs r3, #128 ; 0x80 + 80015ac: 025b lsls r3, r3, #9 + 80015ae: 401a ands r2, r3 + 80015b0: 2380 movs r3, #128 ; 0x80 + 80015b2: 025b lsls r3, r3, #9 + 80015b4: 429a cmp r2, r3 + 80015b6: d10d bne.n 80015d4 { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 80011f4: 4bb8 ldr r3, [pc, #736] ; (80014d8 ) - 80011f6: 681a ldr r2, [r3, #0] - 80011f8: 2380 movs r3, #128 ; 0x80 - 80011fa: 029b lsls r3, r3, #10 - 80011fc: 4013 ands r3, r2 - 80011fe: d100 bne.n 8001202 - 8001200: e070 b.n 80012e4 - 8001202: 687b ldr r3, [r7, #4] - 8001204: 685b ldr r3, [r3, #4] - 8001206: 2b00 cmp r3, #0 - 8001208: d000 beq.n 800120c - 800120a: e06b b.n 80012e4 + 80015b8: 4bb8 ldr r3, [pc, #736] ; (800189c ) + 80015ba: 681a ldr r2, [r3, #0] + 80015bc: 2380 movs r3, #128 ; 0x80 + 80015be: 029b lsls r3, r3, #10 + 80015c0: 4013 ands r3, r2 + 80015c2: d100 bne.n 80015c6 + 80015c4: e070 b.n 80016a8 + 80015c6: 687b ldr r3, [r7, #4] + 80015c8: 685b ldr r3, [r3, #4] + 80015ca: 2b00 cmp r3, #0 + 80015cc: d000 beq.n 80015d0 + 80015ce: e06b b.n 80016a8 { return HAL_ERROR; - 800120c: 2301 movs r3, #1 - 800120e: e2d8 b.n 80017c2 + 80015d0: 2301 movs r3, #1 + 80015d2: e2d8 b.n 8001b86 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8001210: 687b ldr r3, [r7, #4] - 8001212: 685b ldr r3, [r3, #4] - 8001214: 2b01 cmp r3, #1 - 8001216: d107 bne.n 8001228 - 8001218: 4baf ldr r3, [pc, #700] ; (80014d8 ) - 800121a: 681a ldr r2, [r3, #0] - 800121c: 4bae ldr r3, [pc, #696] ; (80014d8 ) - 800121e: 2180 movs r1, #128 ; 0x80 - 8001220: 0249 lsls r1, r1, #9 - 8001222: 430a orrs r2, r1 - 8001224: 601a str r2, [r3, #0] - 8001226: e02f b.n 8001288 - 8001228: 687b ldr r3, [r7, #4] - 800122a: 685b ldr r3, [r3, #4] - 800122c: 2b00 cmp r3, #0 - 800122e: d10c bne.n 800124a - 8001230: 4ba9 ldr r3, [pc, #676] ; (80014d8 ) - 8001232: 681a ldr r2, [r3, #0] - 8001234: 4ba8 ldr r3, [pc, #672] ; (80014d8 ) - 8001236: 49a9 ldr r1, [pc, #676] ; (80014dc ) - 8001238: 400a ands r2, r1 - 800123a: 601a str r2, [r3, #0] - 800123c: 4ba6 ldr r3, [pc, #664] ; (80014d8 ) - 800123e: 681a ldr r2, [r3, #0] - 8001240: 4ba5 ldr r3, [pc, #660] ; (80014d8 ) - 8001242: 49a7 ldr r1, [pc, #668] ; (80014e0 ) - 8001244: 400a ands r2, r1 - 8001246: 601a str r2, [r3, #0] - 8001248: e01e b.n 8001288 - 800124a: 687b ldr r3, [r7, #4] - 800124c: 685b ldr r3, [r3, #4] - 800124e: 2b05 cmp r3, #5 - 8001250: d10e bne.n 8001270 - 8001252: 4ba1 ldr r3, [pc, #644] ; (80014d8 ) - 8001254: 681a ldr r2, [r3, #0] - 8001256: 4ba0 ldr r3, [pc, #640] ; (80014d8 ) - 8001258: 2180 movs r1, #128 ; 0x80 - 800125a: 02c9 lsls r1, r1, #11 - 800125c: 430a orrs r2, r1 - 800125e: 601a str r2, [r3, #0] - 8001260: 4b9d ldr r3, [pc, #628] ; (80014d8 ) - 8001262: 681a ldr r2, [r3, #0] - 8001264: 4b9c ldr r3, [pc, #624] ; (80014d8 ) - 8001266: 2180 movs r1, #128 ; 0x80 - 8001268: 0249 lsls r1, r1, #9 - 800126a: 430a orrs r2, r1 - 800126c: 601a str r2, [r3, #0] - 800126e: e00b b.n 8001288 - 8001270: 4b99 ldr r3, [pc, #612] ; (80014d8 ) - 8001272: 681a ldr r2, [r3, #0] - 8001274: 4b98 ldr r3, [pc, #608] ; (80014d8 ) - 8001276: 4999 ldr r1, [pc, #612] ; (80014dc ) - 8001278: 400a ands r2, r1 - 800127a: 601a str r2, [r3, #0] - 800127c: 4b96 ldr r3, [pc, #600] ; (80014d8 ) - 800127e: 681a ldr r2, [r3, #0] - 8001280: 4b95 ldr r3, [pc, #596] ; (80014d8 ) - 8001282: 4997 ldr r1, [pc, #604] ; (80014e0 ) - 8001284: 400a ands r2, r1 - 8001286: 601a str r2, [r3, #0] + 80015d4: 687b ldr r3, [r7, #4] + 80015d6: 685b ldr r3, [r3, #4] + 80015d8: 2b01 cmp r3, #1 + 80015da: d107 bne.n 80015ec + 80015dc: 4baf ldr r3, [pc, #700] ; (800189c ) + 80015de: 681a ldr r2, [r3, #0] + 80015e0: 4bae ldr r3, [pc, #696] ; (800189c ) + 80015e2: 2180 movs r1, #128 ; 0x80 + 80015e4: 0249 lsls r1, r1, #9 + 80015e6: 430a orrs r2, r1 + 80015e8: 601a str r2, [r3, #0] + 80015ea: e02f b.n 800164c + 80015ec: 687b ldr r3, [r7, #4] + 80015ee: 685b ldr r3, [r3, #4] + 80015f0: 2b00 cmp r3, #0 + 80015f2: d10c bne.n 800160e + 80015f4: 4ba9 ldr r3, [pc, #676] ; (800189c ) + 80015f6: 681a ldr r2, [r3, #0] + 80015f8: 4ba8 ldr r3, [pc, #672] ; (800189c ) + 80015fa: 49a9 ldr r1, [pc, #676] ; (80018a0 ) + 80015fc: 400a ands r2, r1 + 80015fe: 601a str r2, [r3, #0] + 8001600: 4ba6 ldr r3, [pc, #664] ; (800189c ) + 8001602: 681a ldr r2, [r3, #0] + 8001604: 4ba5 ldr r3, [pc, #660] ; (800189c ) + 8001606: 49a7 ldr r1, [pc, #668] ; (80018a4 ) + 8001608: 400a ands r2, r1 + 800160a: 601a str r2, [r3, #0] + 800160c: e01e b.n 800164c + 800160e: 687b ldr r3, [r7, #4] + 8001610: 685b ldr r3, [r3, #4] + 8001612: 2b05 cmp r3, #5 + 8001614: d10e bne.n 8001634 + 8001616: 4ba1 ldr r3, [pc, #644] ; (800189c ) + 8001618: 681a ldr r2, [r3, #0] + 800161a: 4ba0 ldr r3, [pc, #640] ; (800189c ) + 800161c: 2180 movs r1, #128 ; 0x80 + 800161e: 02c9 lsls r1, r1, #11 + 8001620: 430a orrs r2, r1 + 8001622: 601a str r2, [r3, #0] + 8001624: 4b9d ldr r3, [pc, #628] ; (800189c ) + 8001626: 681a ldr r2, [r3, #0] + 8001628: 4b9c ldr r3, [pc, #624] ; (800189c ) + 800162a: 2180 movs r1, #128 ; 0x80 + 800162c: 0249 lsls r1, r1, #9 + 800162e: 430a orrs r2, r1 + 8001630: 601a str r2, [r3, #0] + 8001632: e00b b.n 800164c + 8001634: 4b99 ldr r3, [pc, #612] ; (800189c ) + 8001636: 681a ldr r2, [r3, #0] + 8001638: 4b98 ldr r3, [pc, #608] ; (800189c ) + 800163a: 4999 ldr r1, [pc, #612] ; (80018a0 ) + 800163c: 400a ands r2, r1 + 800163e: 601a str r2, [r3, #0] + 8001640: 4b96 ldr r3, [pc, #600] ; (800189c ) + 8001642: 681a ldr r2, [r3, #0] + 8001644: 4b95 ldr r3, [pc, #596] ; (800189c ) + 8001646: 4997 ldr r1, [pc, #604] ; (80018a4 ) + 8001648: 400a ands r2, r1 + 800164a: 601a str r2, [r3, #0] /* Check the HSE State */ if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 8001288: 687b ldr r3, [r7, #4] - 800128a: 685b ldr r3, [r3, #4] - 800128c: 2b00 cmp r3, #0 - 800128e: d014 beq.n 80012ba + 800164c: 687b ldr r3, [r7, #4] + 800164e: 685b ldr r3, [r3, #4] + 8001650: 2b00 cmp r3, #0 + 8001652: d014 beq.n 800167e { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001290: f7ff faee bl 8000870 - 8001294: 0003 movs r3, r0 - 8001296: 61bb str r3, [r7, #24] + 8001654: f7ff f90c bl 8000870 + 8001658: 0003 movs r3, r0 + 800165a: 61bb str r3, [r7, #24] /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8001298: e008 b.n 80012ac + 800165c: e008 b.n 8001670 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 800129a: f7ff fae9 bl 8000870 - 800129e: 0002 movs r2, r0 - 80012a0: 69bb ldr r3, [r7, #24] - 80012a2: 1ad3 subs r3, r2, r3 - 80012a4: 2b64 cmp r3, #100 ; 0x64 - 80012a6: d901 bls.n 80012ac + 800165e: f7ff f907 bl 8000870 + 8001662: 0002 movs r2, r0 + 8001664: 69bb ldr r3, [r7, #24] + 8001666: 1ad3 subs r3, r2, r3 + 8001668: 2b64 cmp r3, #100 ; 0x64 + 800166a: d901 bls.n 8001670 { return HAL_TIMEOUT; - 80012a8: 2303 movs r3, #3 - 80012aa: e28a b.n 80017c2 + 800166c: 2303 movs r3, #3 + 800166e: e28a b.n 8001b86 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 80012ac: 4b8a ldr r3, [pc, #552] ; (80014d8 ) - 80012ae: 681a ldr r2, [r3, #0] - 80012b0: 2380 movs r3, #128 ; 0x80 - 80012b2: 029b lsls r3, r3, #10 - 80012b4: 4013 ands r3, r2 - 80012b6: d0f0 beq.n 800129a - 80012b8: e015 b.n 80012e6 + 8001670: 4b8a ldr r3, [pc, #552] ; (800189c ) + 8001672: 681a ldr r2, [r3, #0] + 8001674: 2380 movs r3, #128 ; 0x80 + 8001676: 029b lsls r3, r3, #10 + 8001678: 4013 ands r3, r2 + 800167a: d0f0 beq.n 800165e + 800167c: e015 b.n 80016aa } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 80012ba: f7ff fad9 bl 8000870 - 80012be: 0003 movs r3, r0 - 80012c0: 61bb str r3, [r7, #24] + 800167e: f7ff f8f7 bl 8000870 + 8001682: 0003 movs r3, r0 + 8001684: 61bb str r3, [r7, #24] /* Wait till HSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 80012c2: e008 b.n 80012d6 + 8001686: e008 b.n 800169a { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 80012c4: f7ff fad4 bl 8000870 - 80012c8: 0002 movs r2, r0 - 80012ca: 69bb ldr r3, [r7, #24] - 80012cc: 1ad3 subs r3, r2, r3 - 80012ce: 2b64 cmp r3, #100 ; 0x64 - 80012d0: d901 bls.n 80012d6 + 8001688: f7ff f8f2 bl 8000870 + 800168c: 0002 movs r2, r0 + 800168e: 69bb ldr r3, [r7, #24] + 8001690: 1ad3 subs r3, r2, r3 + 8001692: 2b64 cmp r3, #100 ; 0x64 + 8001694: d901 bls.n 800169a { return HAL_TIMEOUT; - 80012d2: 2303 movs r3, #3 - 80012d4: e275 b.n 80017c2 + 8001696: 2303 movs r3, #3 + 8001698: e275 b.n 8001b86 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 80012d6: 4b80 ldr r3, [pc, #512] ; (80014d8 ) - 80012d8: 681a ldr r2, [r3, #0] - 80012da: 2380 movs r3, #128 ; 0x80 - 80012dc: 029b lsls r3, r3, #10 - 80012de: 4013 ands r3, r2 - 80012e0: d1f0 bne.n 80012c4 - 80012e2: e000 b.n 80012e6 + 800169a: 4b80 ldr r3, [pc, #512] ; (800189c ) + 800169c: 681a ldr r2, [r3, #0] + 800169e: 2380 movs r3, #128 ; 0x80 + 80016a0: 029b lsls r3, r3, #10 + 80016a2: 4013 ands r3, r2 + 80016a4: d1f0 bne.n 8001688 + 80016a6: e000 b.n 80016aa if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 80012e4: 46c0 nop ; (mov r8, r8) + 80016a8: 46c0 nop ; (mov r8, r8) } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 80012e6: 687b ldr r3, [r7, #4] - 80012e8: 681b ldr r3, [r3, #0] - 80012ea: 2202 movs r2, #2 - 80012ec: 4013 ands r3, r2 - 80012ee: d100 bne.n 80012f2 - 80012f0: e069 b.n 80013c6 + 80016aa: 687b ldr r3, [r7, #4] + 80016ac: 681b ldr r3, [r3, #0] + 80016ae: 2202 movs r2, #2 + 80016b0: 4013 ands r3, r2 + 80016b2: d100 bne.n 80016b6 + 80016b4: e069 b.n 800178a /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) - 80012f2: 4b79 ldr r3, [pc, #484] ; (80014d8 ) - 80012f4: 685b ldr r3, [r3, #4] - 80012f6: 220c movs r2, #12 - 80012f8: 4013 ands r3, r2 - 80012fa: d00b beq.n 8001314 + 80016b6: 4b79 ldr r3, [pc, #484] ; (800189c ) + 80016b8: 685b ldr r3, [r3, #4] + 80016ba: 220c movs r2, #12 + 80016bc: 4013 ands r3, r2 + 80016be: d00b beq.n 80016d8 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI))) - 80012fc: 4b76 ldr r3, [pc, #472] ; (80014d8 ) - 80012fe: 685b ldr r3, [r3, #4] - 8001300: 220c movs r2, #12 - 8001302: 4013 ands r3, r2 - 8001304: 2b08 cmp r3, #8 - 8001306: d11c bne.n 8001342 - 8001308: 4b73 ldr r3, [pc, #460] ; (80014d8 ) - 800130a: 685a ldr r2, [r3, #4] - 800130c: 2380 movs r3, #128 ; 0x80 - 800130e: 025b lsls r3, r3, #9 - 8001310: 4013 ands r3, r2 - 8001312: d116 bne.n 8001342 + 80016c0: 4b76 ldr r3, [pc, #472] ; (800189c ) + 80016c2: 685b ldr r3, [r3, #4] + 80016c4: 220c movs r2, #12 + 80016c6: 4013 ands r3, r2 + 80016c8: 2b08 cmp r3, #8 + 80016ca: d11c bne.n 8001706 + 80016cc: 4b73 ldr r3, [pc, #460] ; (800189c ) + 80016ce: 685a ldr r2, [r3, #4] + 80016d0: 2380 movs r3, #128 ; 0x80 + 80016d2: 025b lsls r3, r3, #9 + 80016d4: 4013 ands r3, r2 + 80016d6: d116 bne.n 8001706 { /* When HSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8001314: 4b70 ldr r3, [pc, #448] ; (80014d8 ) - 8001316: 681b ldr r3, [r3, #0] - 8001318: 2202 movs r2, #2 - 800131a: 4013 ands r3, r2 - 800131c: d005 beq.n 800132a - 800131e: 687b ldr r3, [r7, #4] - 8001320: 68db ldr r3, [r3, #12] - 8001322: 2b01 cmp r3, #1 - 8001324: d001 beq.n 800132a + 80016d8: 4b70 ldr r3, [pc, #448] ; (800189c ) + 80016da: 681b ldr r3, [r3, #0] + 80016dc: 2202 movs r2, #2 + 80016de: 4013 ands r3, r2 + 80016e0: d005 beq.n 80016ee + 80016e2: 687b ldr r3, [r7, #4] + 80016e4: 68db ldr r3, [r3, #12] + 80016e6: 2b01 cmp r3, #1 + 80016e8: d001 beq.n 80016ee { return HAL_ERROR; - 8001326: 2301 movs r3, #1 - 8001328: e24b b.n 80017c2 + 80016ea: 2301 movs r3, #1 + 80016ec: e24b b.n 8001b86 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 800132a: 4b6b ldr r3, [pc, #428] ; (80014d8 ) - 800132c: 681b ldr r3, [r3, #0] - 800132e: 22f8 movs r2, #248 ; 0xf8 - 8001330: 4393 bics r3, r2 - 8001332: 0019 movs r1, r3 - 8001334: 687b ldr r3, [r7, #4] - 8001336: 691b ldr r3, [r3, #16] - 8001338: 00da lsls r2, r3, #3 - 800133a: 4b67 ldr r3, [pc, #412] ; (80014d8 ) - 800133c: 430a orrs r2, r1 - 800133e: 601a str r2, [r3, #0] + 80016ee: 4b6b ldr r3, [pc, #428] ; (800189c ) + 80016f0: 681b ldr r3, [r3, #0] + 80016f2: 22f8 movs r2, #248 ; 0xf8 + 80016f4: 4393 bics r3, r2 + 80016f6: 0019 movs r1, r3 + 80016f8: 687b ldr r3, [r7, #4] + 80016fa: 691b ldr r3, [r3, #16] + 80016fc: 00da lsls r2, r3, #3 + 80016fe: 4b67 ldr r3, [pc, #412] ; (800189c ) + 8001700: 430a orrs r2, r1 + 8001702: 601a str r2, [r3, #0] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8001340: e041 b.n 80013c6 + 8001704: e041 b.n 800178a } } else { /* Check the HSI State */ if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 8001342: 687b ldr r3, [r7, #4] - 8001344: 68db ldr r3, [r3, #12] - 8001346: 2b00 cmp r3, #0 - 8001348: d024 beq.n 8001394 + 8001706: 687b ldr r3, [r7, #4] + 8001708: 68db ldr r3, [r3, #12] + 800170a: 2b00 cmp r3, #0 + 800170c: d024 beq.n 8001758 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); - 800134a: 4b63 ldr r3, [pc, #396] ; (80014d8 ) - 800134c: 681a ldr r2, [r3, #0] - 800134e: 4b62 ldr r3, [pc, #392] ; (80014d8 ) - 8001350: 2101 movs r1, #1 - 8001352: 430a orrs r2, r1 - 8001354: 601a str r2, [r3, #0] + 800170e: 4b63 ldr r3, [pc, #396] ; (800189c ) + 8001710: 681a ldr r2, [r3, #0] + 8001712: 4b62 ldr r3, [pc, #392] ; (800189c ) + 8001714: 2101 movs r1, #1 + 8001716: 430a orrs r2, r1 + 8001718: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001356: f7ff fa8b bl 8000870 - 800135a: 0003 movs r3, r0 - 800135c: 61bb str r3, [r7, #24] + 800171a: f7ff f8a9 bl 8000870 + 800171e: 0003 movs r3, r0 + 8001720: 61bb str r3, [r7, #24] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 800135e: e008 b.n 8001372 + 8001722: e008 b.n 8001736 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 8001360: f7ff fa86 bl 8000870 - 8001364: 0002 movs r2, r0 - 8001366: 69bb ldr r3, [r7, #24] - 8001368: 1ad3 subs r3, r2, r3 - 800136a: 2b02 cmp r3, #2 - 800136c: d901 bls.n 8001372 + 8001724: f7ff f8a4 bl 8000870 + 8001728: 0002 movs r2, r0 + 800172a: 69bb ldr r3, [r7, #24] + 800172c: 1ad3 subs r3, r2, r3 + 800172e: 2b02 cmp r3, #2 + 8001730: d901 bls.n 8001736 { return HAL_TIMEOUT; - 800136e: 2303 movs r3, #3 - 8001370: e227 b.n 80017c2 + 8001732: 2303 movs r3, #3 + 8001734: e227 b.n 8001b86 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8001372: 4b59 ldr r3, [pc, #356] ; (80014d8 ) - 8001374: 681b ldr r3, [r3, #0] - 8001376: 2202 movs r2, #2 - 8001378: 4013 ands r3, r2 - 800137a: d0f1 beq.n 8001360 + 8001736: 4b59 ldr r3, [pc, #356] ; (800189c ) + 8001738: 681b ldr r3, [r3, #0] + 800173a: 2202 movs r2, #2 + 800173c: 4013 ands r3, r2 + 800173e: d0f1 beq.n 8001724 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 800137c: 4b56 ldr r3, [pc, #344] ; (80014d8 ) - 800137e: 681b ldr r3, [r3, #0] - 8001380: 22f8 movs r2, #248 ; 0xf8 - 8001382: 4393 bics r3, r2 - 8001384: 0019 movs r1, r3 - 8001386: 687b ldr r3, [r7, #4] - 8001388: 691b ldr r3, [r3, #16] - 800138a: 00da lsls r2, r3, #3 - 800138c: 4b52 ldr r3, [pc, #328] ; (80014d8 ) - 800138e: 430a orrs r2, r1 - 8001390: 601a str r2, [r3, #0] - 8001392: e018 b.n 80013c6 + 8001740: 4b56 ldr r3, [pc, #344] ; (800189c ) + 8001742: 681b ldr r3, [r3, #0] + 8001744: 22f8 movs r2, #248 ; 0xf8 + 8001746: 4393 bics r3, r2 + 8001748: 0019 movs r1, r3 + 800174a: 687b ldr r3, [r7, #4] + 800174c: 691b ldr r3, [r3, #16] + 800174e: 00da lsls r2, r3, #3 + 8001750: 4b52 ldr r3, [pc, #328] ; (800189c ) + 8001752: 430a orrs r2, r1 + 8001754: 601a str r2, [r3, #0] + 8001756: e018 b.n 800178a } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 8001394: 4b50 ldr r3, [pc, #320] ; (80014d8 ) - 8001396: 681a ldr r2, [r3, #0] - 8001398: 4b4f ldr r3, [pc, #316] ; (80014d8 ) - 800139a: 2101 movs r1, #1 - 800139c: 438a bics r2, r1 - 800139e: 601a str r2, [r3, #0] + 8001758: 4b50 ldr r3, [pc, #320] ; (800189c ) + 800175a: 681a ldr r2, [r3, #0] + 800175c: 4b4f ldr r3, [pc, #316] ; (800189c ) + 800175e: 2101 movs r1, #1 + 8001760: 438a bics r2, r1 + 8001762: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80013a0: f7ff fa66 bl 8000870 - 80013a4: 0003 movs r3, r0 - 80013a6: 61bb str r3, [r7, #24] + 8001764: f7ff f884 bl 8000870 + 8001768: 0003 movs r3, r0 + 800176a: 61bb str r3, [r7, #24] /* Wait till HSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 80013a8: e008 b.n 80013bc + 800176c: e008 b.n 8001780 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 80013aa: f7ff fa61 bl 8000870 - 80013ae: 0002 movs r2, r0 - 80013b0: 69bb ldr r3, [r7, #24] - 80013b2: 1ad3 subs r3, r2, r3 - 80013b4: 2b02 cmp r3, #2 - 80013b6: d901 bls.n 80013bc + 800176e: f7ff f87f bl 8000870 + 8001772: 0002 movs r2, r0 + 8001774: 69bb ldr r3, [r7, #24] + 8001776: 1ad3 subs r3, r2, r3 + 8001778: 2b02 cmp r3, #2 + 800177a: d901 bls.n 8001780 { return HAL_TIMEOUT; - 80013b8: 2303 movs r3, #3 - 80013ba: e202 b.n 80017c2 + 800177c: 2303 movs r3, #3 + 800177e: e202 b.n 8001b86 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 80013bc: 4b46 ldr r3, [pc, #280] ; (80014d8 ) - 80013be: 681b ldr r3, [r3, #0] - 80013c0: 2202 movs r2, #2 - 80013c2: 4013 ands r3, r2 - 80013c4: d1f1 bne.n 80013aa + 8001780: 4b46 ldr r3, [pc, #280] ; (800189c ) + 8001782: 681b ldr r3, [r3, #0] + 8001784: 2202 movs r2, #2 + 8001786: 4013 ands r3, r2 + 8001788: d1f1 bne.n 800176e } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 80013c6: 687b ldr r3, [r7, #4] - 80013c8: 681b ldr r3, [r3, #0] - 80013ca: 2208 movs r2, #8 - 80013cc: 4013 ands r3, r2 - 80013ce: d036 beq.n 800143e + 800178a: 687b ldr r3, [r7, #4] + 800178c: 681b ldr r3, [r3, #0] + 800178e: 2208 movs r2, #8 + 8001790: 4013 ands r3, r2 + 8001792: d036 beq.n 8001802 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 80013d0: 687b ldr r3, [r7, #4] - 80013d2: 69db ldr r3, [r3, #28] - 80013d4: 2b00 cmp r3, #0 - 80013d6: d019 beq.n 800140c + 8001794: 687b ldr r3, [r7, #4] + 8001796: 69db ldr r3, [r3, #28] + 8001798: 2b00 cmp r3, #0 + 800179a: d019 beq.n 80017d0 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 80013d8: 4b3f ldr r3, [pc, #252] ; (80014d8 ) - 80013da: 6a5a ldr r2, [r3, #36] ; 0x24 - 80013dc: 4b3e ldr r3, [pc, #248] ; (80014d8 ) - 80013de: 2101 movs r1, #1 - 80013e0: 430a orrs r2, r1 - 80013e2: 625a str r2, [r3, #36] ; 0x24 + 800179c: 4b3f ldr r3, [pc, #252] ; (800189c ) + 800179e: 6a5a ldr r2, [r3, #36] ; 0x24 + 80017a0: 4b3e ldr r3, [pc, #248] ; (800189c ) + 80017a2: 2101 movs r1, #1 + 80017a4: 430a orrs r2, r1 + 80017a6: 625a str r2, [r3, #36] ; 0x24 /* Get Start Tick */ tickstart = HAL_GetTick(); - 80013e4: f7ff fa44 bl 8000870 - 80013e8: 0003 movs r3, r0 - 80013ea: 61bb str r3, [r7, #24] + 80017a8: f7ff f862 bl 8000870 + 80017ac: 0003 movs r3, r0 + 80017ae: 61bb str r3, [r7, #24] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 80013ec: e008 b.n 8001400 + 80017b0: e008 b.n 80017c4 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 80013ee: f7ff fa3f bl 8000870 - 80013f2: 0002 movs r2, r0 - 80013f4: 69bb ldr r3, [r7, #24] - 80013f6: 1ad3 subs r3, r2, r3 - 80013f8: 2b02 cmp r3, #2 - 80013fa: d901 bls.n 8001400 + 80017b2: f7ff f85d bl 8000870 + 80017b6: 0002 movs r2, r0 + 80017b8: 69bb ldr r3, [r7, #24] + 80017ba: 1ad3 subs r3, r2, r3 + 80017bc: 2b02 cmp r3, #2 + 80017be: d901 bls.n 80017c4 { return HAL_TIMEOUT; - 80013fc: 2303 movs r3, #3 - 80013fe: e1e0 b.n 80017c2 + 80017c0: 2303 movs r3, #3 + 80017c2: e1e0 b.n 8001b86 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8001400: 4b35 ldr r3, [pc, #212] ; (80014d8 ) - 8001402: 6a5b ldr r3, [r3, #36] ; 0x24 - 8001404: 2202 movs r2, #2 - 8001406: 4013 ands r3, r2 - 8001408: d0f1 beq.n 80013ee - 800140a: e018 b.n 800143e + 80017c4: 4b35 ldr r3, [pc, #212] ; (800189c ) + 80017c6: 6a5b ldr r3, [r3, #36] ; 0x24 + 80017c8: 2202 movs r2, #2 + 80017ca: 4013 ands r3, r2 + 80017cc: d0f1 beq.n 80017b2 + 80017ce: e018 b.n 8001802 } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 800140c: 4b32 ldr r3, [pc, #200] ; (80014d8 ) - 800140e: 6a5a ldr r2, [r3, #36] ; 0x24 - 8001410: 4b31 ldr r3, [pc, #196] ; (80014d8 ) - 8001412: 2101 movs r1, #1 - 8001414: 438a bics r2, r1 - 8001416: 625a str r2, [r3, #36] ; 0x24 + 80017d0: 4b32 ldr r3, [pc, #200] ; (800189c ) + 80017d2: 6a5a ldr r2, [r3, #36] ; 0x24 + 80017d4: 4b31 ldr r3, [pc, #196] ; (800189c ) + 80017d6: 2101 movs r1, #1 + 80017d8: 438a bics r2, r1 + 80017da: 625a str r2, [r3, #36] ; 0x24 /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001418: f7ff fa2a bl 8000870 - 800141c: 0003 movs r3, r0 - 800141e: 61bb str r3, [r7, #24] + 80017dc: f7ff f848 bl 8000870 + 80017e0: 0003 movs r3, r0 + 80017e2: 61bb str r3, [r7, #24] /* Wait till LSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8001420: e008 b.n 8001434 + 80017e4: e008 b.n 80017f8 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 8001422: f7ff fa25 bl 8000870 - 8001426: 0002 movs r2, r0 - 8001428: 69bb ldr r3, [r7, #24] - 800142a: 1ad3 subs r3, r2, r3 - 800142c: 2b02 cmp r3, #2 - 800142e: d901 bls.n 8001434 + 80017e6: f7ff f843 bl 8000870 + 80017ea: 0002 movs r2, r0 + 80017ec: 69bb ldr r3, [r7, #24] + 80017ee: 1ad3 subs r3, r2, r3 + 80017f0: 2b02 cmp r3, #2 + 80017f2: d901 bls.n 80017f8 { return HAL_TIMEOUT; - 8001430: 2303 movs r3, #3 - 8001432: e1c6 b.n 80017c2 + 80017f4: 2303 movs r3, #3 + 80017f6: e1c6 b.n 8001b86 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8001434: 4b28 ldr r3, [pc, #160] ; (80014d8 ) - 8001436: 6a5b ldr r3, [r3, #36] ; 0x24 - 8001438: 2202 movs r2, #2 - 800143a: 4013 ands r3, r2 - 800143c: d1f1 bne.n 8001422 + 80017f8: 4b28 ldr r3, [pc, #160] ; (800189c ) + 80017fa: 6a5b ldr r3, [r3, #36] ; 0x24 + 80017fc: 2202 movs r2, #2 + 80017fe: 4013 ands r3, r2 + 8001800: d1f1 bne.n 80017e6 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 800143e: 687b ldr r3, [r7, #4] - 8001440: 681b ldr r3, [r3, #0] - 8001442: 2204 movs r2, #4 - 8001444: 4013 ands r3, r2 - 8001446: d100 bne.n 800144a - 8001448: e0b4 b.n 80015b4 + 8001802: 687b ldr r3, [r7, #4] + 8001804: 681b ldr r3, [r3, #0] + 8001806: 2204 movs r2, #4 + 8001808: 4013 ands r3, r2 + 800180a: d100 bne.n 800180e + 800180c: e0b4 b.n 8001978 { FlagStatus pwrclkchanged = RESET; - 800144a: 201f movs r0, #31 - 800144c: 183b adds r3, r7, r0 - 800144e: 2200 movs r2, #0 - 8001450: 701a strb r2, [r3, #0] + 800180e: 201f movs r0, #31 + 8001810: 183b adds r3, r7, r0 + 8001812: 2200 movs r2, #0 + 8001814: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8001452: 4b21 ldr r3, [pc, #132] ; (80014d8 ) - 8001454: 69da ldr r2, [r3, #28] - 8001456: 2380 movs r3, #128 ; 0x80 - 8001458: 055b lsls r3, r3, #21 - 800145a: 4013 ands r3, r2 - 800145c: d110 bne.n 8001480 + 8001816: 4b21 ldr r3, [pc, #132] ; (800189c ) + 8001818: 69da ldr r2, [r3, #28] + 800181a: 2380 movs r3, #128 ; 0x80 + 800181c: 055b lsls r3, r3, #21 + 800181e: 4013 ands r3, r2 + 8001820: d110 bne.n 8001844 { __HAL_RCC_PWR_CLK_ENABLE(); - 800145e: 4b1e ldr r3, [pc, #120] ; (80014d8 ) - 8001460: 69da ldr r2, [r3, #28] - 8001462: 4b1d ldr r3, [pc, #116] ; (80014d8 ) - 8001464: 2180 movs r1, #128 ; 0x80 - 8001466: 0549 lsls r1, r1, #21 - 8001468: 430a orrs r2, r1 - 800146a: 61da str r2, [r3, #28] - 800146c: 4b1a ldr r3, [pc, #104] ; (80014d8 ) - 800146e: 69da ldr r2, [r3, #28] - 8001470: 2380 movs r3, #128 ; 0x80 - 8001472: 055b lsls r3, r3, #21 - 8001474: 4013 ands r3, r2 - 8001476: 60fb str r3, [r7, #12] - 8001478: 68fb ldr r3, [r7, #12] + 8001822: 4b1e ldr r3, [pc, #120] ; (800189c ) + 8001824: 69da ldr r2, [r3, #28] + 8001826: 4b1d ldr r3, [pc, #116] ; (800189c ) + 8001828: 2180 movs r1, #128 ; 0x80 + 800182a: 0549 lsls r1, r1, #21 + 800182c: 430a orrs r2, r1 + 800182e: 61da str r2, [r3, #28] + 8001830: 4b1a ldr r3, [pc, #104] ; (800189c ) + 8001832: 69da ldr r2, [r3, #28] + 8001834: 2380 movs r3, #128 ; 0x80 + 8001836: 055b lsls r3, r3, #21 + 8001838: 4013 ands r3, r2 + 800183a: 60fb str r3, [r7, #12] + 800183c: 68fb ldr r3, [r7, #12] pwrclkchanged = SET; - 800147a: 183b adds r3, r7, r0 - 800147c: 2201 movs r2, #1 - 800147e: 701a strb r2, [r3, #0] + 800183e: 183b adds r3, r7, r0 + 8001840: 2201 movs r2, #1 + 8001842: 701a strb r2, [r3, #0] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8001480: 4b18 ldr r3, [pc, #96] ; (80014e4 ) - 8001482: 681a ldr r2, [r3, #0] - 8001484: 2380 movs r3, #128 ; 0x80 - 8001486: 005b lsls r3, r3, #1 - 8001488: 4013 ands r3, r2 - 800148a: d11a bne.n 80014c2 + 8001844: 4b18 ldr r3, [pc, #96] ; (80018a8 ) + 8001846: 681a ldr r2, [r3, #0] + 8001848: 2380 movs r3, #128 ; 0x80 + 800184a: 005b lsls r3, r3, #1 + 800184c: 4013 ands r3, r2 + 800184e: d11a bne.n 8001886 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 800148c: 4b15 ldr r3, [pc, #84] ; (80014e4 ) - 800148e: 681a ldr r2, [r3, #0] - 8001490: 4b14 ldr r3, [pc, #80] ; (80014e4 ) - 8001492: 2180 movs r1, #128 ; 0x80 - 8001494: 0049 lsls r1, r1, #1 - 8001496: 430a orrs r2, r1 - 8001498: 601a str r2, [r3, #0] + 8001850: 4b15 ldr r3, [pc, #84] ; (80018a8 ) + 8001852: 681a ldr r2, [r3, #0] + 8001854: 4b14 ldr r3, [pc, #80] ; (80018a8 ) + 8001856: 2180 movs r1, #128 ; 0x80 + 8001858: 0049 lsls r1, r1, #1 + 800185a: 430a orrs r2, r1 + 800185c: 601a str r2, [r3, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 800149a: f7ff f9e9 bl 8000870 - 800149e: 0003 movs r3, r0 - 80014a0: 61bb str r3, [r7, #24] + 800185e: f7ff f807 bl 8000870 + 8001862: 0003 movs r3, r0 + 8001864: 61bb str r3, [r7, #24] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80014a2: e008 b.n 80014b6 + 8001866: e008 b.n 800187a { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 80014a4: f7ff f9e4 bl 8000870 - 80014a8: 0002 movs r2, r0 - 80014aa: 69bb ldr r3, [r7, #24] - 80014ac: 1ad3 subs r3, r2, r3 - 80014ae: 2b64 cmp r3, #100 ; 0x64 - 80014b0: d901 bls.n 80014b6 + 8001868: f7ff f802 bl 8000870 + 800186c: 0002 movs r2, r0 + 800186e: 69bb ldr r3, [r7, #24] + 8001870: 1ad3 subs r3, r2, r3 + 8001872: 2b64 cmp r3, #100 ; 0x64 + 8001874: d901 bls.n 800187a { return HAL_TIMEOUT; - 80014b2: 2303 movs r3, #3 - 80014b4: e185 b.n 80017c2 + 8001876: 2303 movs r3, #3 + 8001878: e185 b.n 8001b86 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80014b6: 4b0b ldr r3, [pc, #44] ; (80014e4 ) - 80014b8: 681a ldr r2, [r3, #0] - 80014ba: 2380 movs r3, #128 ; 0x80 - 80014bc: 005b lsls r3, r3, #1 - 80014be: 4013 ands r3, r2 - 80014c0: d0f0 beq.n 80014a4 + 800187a: 4b0b ldr r3, [pc, #44] ; (80018a8 ) + 800187c: 681a ldr r2, [r3, #0] + 800187e: 2380 movs r3, #128 ; 0x80 + 8001880: 005b lsls r3, r3, #1 + 8001882: 4013 ands r3, r2 + 8001884: d0f0 beq.n 8001868 } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 80014c2: 687b ldr r3, [r7, #4] - 80014c4: 689b ldr r3, [r3, #8] - 80014c6: 2b01 cmp r3, #1 - 80014c8: d10e bne.n 80014e8 - 80014ca: 4b03 ldr r3, [pc, #12] ; (80014d8 ) - 80014cc: 6a1a ldr r2, [r3, #32] - 80014ce: 4b02 ldr r3, [pc, #8] ; (80014d8 ) - 80014d0: 2101 movs r1, #1 - 80014d2: 430a orrs r2, r1 - 80014d4: 621a str r2, [r3, #32] - 80014d6: e035 b.n 8001544 - 80014d8: 40021000 .word 0x40021000 - 80014dc: fffeffff .word 0xfffeffff - 80014e0: fffbffff .word 0xfffbffff - 80014e4: 40007000 .word 0x40007000 - 80014e8: 687b ldr r3, [r7, #4] - 80014ea: 689b ldr r3, [r3, #8] - 80014ec: 2b00 cmp r3, #0 - 80014ee: d10c bne.n 800150a - 80014f0: 4bb6 ldr r3, [pc, #728] ; (80017cc ) - 80014f2: 6a1a ldr r2, [r3, #32] - 80014f4: 4bb5 ldr r3, [pc, #724] ; (80017cc ) - 80014f6: 2101 movs r1, #1 - 80014f8: 438a bics r2, r1 - 80014fa: 621a str r2, [r3, #32] - 80014fc: 4bb3 ldr r3, [pc, #716] ; (80017cc ) - 80014fe: 6a1a ldr r2, [r3, #32] - 8001500: 4bb2 ldr r3, [pc, #712] ; (80017cc ) - 8001502: 2104 movs r1, #4 - 8001504: 438a bics r2, r1 - 8001506: 621a str r2, [r3, #32] - 8001508: e01c b.n 8001544 - 800150a: 687b ldr r3, [r7, #4] - 800150c: 689b ldr r3, [r3, #8] - 800150e: 2b05 cmp r3, #5 - 8001510: d10c bne.n 800152c - 8001512: 4bae ldr r3, [pc, #696] ; (80017cc ) - 8001514: 6a1a ldr r2, [r3, #32] - 8001516: 4bad ldr r3, [pc, #692] ; (80017cc ) - 8001518: 2104 movs r1, #4 - 800151a: 430a orrs r2, r1 - 800151c: 621a str r2, [r3, #32] - 800151e: 4bab ldr r3, [pc, #684] ; (80017cc ) - 8001520: 6a1a ldr r2, [r3, #32] - 8001522: 4baa ldr r3, [pc, #680] ; (80017cc ) - 8001524: 2101 movs r1, #1 - 8001526: 430a orrs r2, r1 - 8001528: 621a str r2, [r3, #32] - 800152a: e00b b.n 8001544 - 800152c: 4ba7 ldr r3, [pc, #668] ; (80017cc ) - 800152e: 6a1a ldr r2, [r3, #32] - 8001530: 4ba6 ldr r3, [pc, #664] ; (80017cc ) - 8001532: 2101 movs r1, #1 - 8001534: 438a bics r2, r1 - 8001536: 621a str r2, [r3, #32] - 8001538: 4ba4 ldr r3, [pc, #656] ; (80017cc ) - 800153a: 6a1a ldr r2, [r3, #32] - 800153c: 4ba3 ldr r3, [pc, #652] ; (80017cc ) - 800153e: 2104 movs r1, #4 - 8001540: 438a bics r2, r1 - 8001542: 621a str r2, [r3, #32] + 8001886: 687b ldr r3, [r7, #4] + 8001888: 689b ldr r3, [r3, #8] + 800188a: 2b01 cmp r3, #1 + 800188c: d10e bne.n 80018ac + 800188e: 4b03 ldr r3, [pc, #12] ; (800189c ) + 8001890: 6a1a ldr r2, [r3, #32] + 8001892: 4b02 ldr r3, [pc, #8] ; (800189c ) + 8001894: 2101 movs r1, #1 + 8001896: 430a orrs r2, r1 + 8001898: 621a str r2, [r3, #32] + 800189a: e035 b.n 8001908 + 800189c: 40021000 .word 0x40021000 + 80018a0: fffeffff .word 0xfffeffff + 80018a4: fffbffff .word 0xfffbffff + 80018a8: 40007000 .word 0x40007000 + 80018ac: 687b ldr r3, [r7, #4] + 80018ae: 689b ldr r3, [r3, #8] + 80018b0: 2b00 cmp r3, #0 + 80018b2: d10c bne.n 80018ce + 80018b4: 4bb6 ldr r3, [pc, #728] ; (8001b90 ) + 80018b6: 6a1a ldr r2, [r3, #32] + 80018b8: 4bb5 ldr r3, [pc, #724] ; (8001b90 ) + 80018ba: 2101 movs r1, #1 + 80018bc: 438a bics r2, r1 + 80018be: 621a str r2, [r3, #32] + 80018c0: 4bb3 ldr r3, [pc, #716] ; (8001b90 ) + 80018c2: 6a1a ldr r2, [r3, #32] + 80018c4: 4bb2 ldr r3, [pc, #712] ; (8001b90 ) + 80018c6: 2104 movs r1, #4 + 80018c8: 438a bics r2, r1 + 80018ca: 621a str r2, [r3, #32] + 80018cc: e01c b.n 8001908 + 80018ce: 687b ldr r3, [r7, #4] + 80018d0: 689b ldr r3, [r3, #8] + 80018d2: 2b05 cmp r3, #5 + 80018d4: d10c bne.n 80018f0 + 80018d6: 4bae ldr r3, [pc, #696] ; (8001b90 ) + 80018d8: 6a1a ldr r2, [r3, #32] + 80018da: 4bad ldr r3, [pc, #692] ; (8001b90 ) + 80018dc: 2104 movs r1, #4 + 80018de: 430a orrs r2, r1 + 80018e0: 621a str r2, [r3, #32] + 80018e2: 4bab ldr r3, [pc, #684] ; (8001b90 ) + 80018e4: 6a1a ldr r2, [r3, #32] + 80018e6: 4baa ldr r3, [pc, #680] ; (8001b90 ) + 80018e8: 2101 movs r1, #1 + 80018ea: 430a orrs r2, r1 + 80018ec: 621a str r2, [r3, #32] + 80018ee: e00b b.n 8001908 + 80018f0: 4ba7 ldr r3, [pc, #668] ; (8001b90 ) + 80018f2: 6a1a ldr r2, [r3, #32] + 80018f4: 4ba6 ldr r3, [pc, #664] ; (8001b90 ) + 80018f6: 2101 movs r1, #1 + 80018f8: 438a bics r2, r1 + 80018fa: 621a str r2, [r3, #32] + 80018fc: 4ba4 ldr r3, [pc, #656] ; (8001b90 ) + 80018fe: 6a1a ldr r2, [r3, #32] + 8001900: 4ba3 ldr r3, [pc, #652] ; (8001b90 ) + 8001902: 2104 movs r1, #4 + 8001904: 438a bics r2, r1 + 8001906: 621a str r2, [r3, #32] /* Check the LSE State */ if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 8001544: 687b ldr r3, [r7, #4] - 8001546: 689b ldr r3, [r3, #8] - 8001548: 2b00 cmp r3, #0 - 800154a: d014 beq.n 8001576 + 8001908: 687b ldr r3, [r7, #4] + 800190a: 689b ldr r3, [r3, #8] + 800190c: 2b00 cmp r3, #0 + 800190e: d014 beq.n 800193a { /* Get Start Tick */ tickstart = HAL_GetTick(); - 800154c: f7ff f990 bl 8000870 - 8001550: 0003 movs r3, r0 - 8001552: 61bb str r3, [r7, #24] + 8001910: f7fe ffae bl 8000870 + 8001914: 0003 movs r3, r0 + 8001916: 61bb str r3, [r7, #24] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8001554: e009 b.n 800156a + 8001918: e009 b.n 800192e { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8001556: f7ff f98b bl 8000870 - 800155a: 0002 movs r2, r0 - 800155c: 69bb ldr r3, [r7, #24] - 800155e: 1ad3 subs r3, r2, r3 - 8001560: 4a9b ldr r2, [pc, #620] ; (80017d0 ) - 8001562: 4293 cmp r3, r2 - 8001564: d901 bls.n 800156a + 800191a: f7fe ffa9 bl 8000870 + 800191e: 0002 movs r2, r0 + 8001920: 69bb ldr r3, [r7, #24] + 8001922: 1ad3 subs r3, r2, r3 + 8001924: 4a9b ldr r2, [pc, #620] ; (8001b94 ) + 8001926: 4293 cmp r3, r2 + 8001928: d901 bls.n 800192e { return HAL_TIMEOUT; - 8001566: 2303 movs r3, #3 - 8001568: e12b b.n 80017c2 + 800192a: 2303 movs r3, #3 + 800192c: e12b b.n 8001b86 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 800156a: 4b98 ldr r3, [pc, #608] ; (80017cc ) - 800156c: 6a1b ldr r3, [r3, #32] - 800156e: 2202 movs r2, #2 - 8001570: 4013 ands r3, r2 - 8001572: d0f0 beq.n 8001556 - 8001574: e013 b.n 800159e + 800192e: 4b98 ldr r3, [pc, #608] ; (8001b90 ) + 8001930: 6a1b ldr r3, [r3, #32] + 8001932: 2202 movs r2, #2 + 8001934: 4013 ands r3, r2 + 8001936: d0f0 beq.n 800191a + 8001938: e013 b.n 8001962 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001576: f7ff f97b bl 8000870 - 800157a: 0003 movs r3, r0 - 800157c: 61bb str r3, [r7, #24] + 800193a: f7fe ff99 bl 8000870 + 800193e: 0003 movs r3, r0 + 8001940: 61bb str r3, [r7, #24] /* Wait till LSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 800157e: e009 b.n 8001594 + 8001942: e009 b.n 8001958 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8001580: f7ff f976 bl 8000870 - 8001584: 0002 movs r2, r0 - 8001586: 69bb ldr r3, [r7, #24] - 8001588: 1ad3 subs r3, r2, r3 - 800158a: 4a91 ldr r2, [pc, #580] ; (80017d0 ) - 800158c: 4293 cmp r3, r2 - 800158e: d901 bls.n 8001594 + 8001944: f7fe ff94 bl 8000870 + 8001948: 0002 movs r2, r0 + 800194a: 69bb ldr r3, [r7, #24] + 800194c: 1ad3 subs r3, r2, r3 + 800194e: 4a91 ldr r2, [pc, #580] ; (8001b94 ) + 8001950: 4293 cmp r3, r2 + 8001952: d901 bls.n 8001958 { return HAL_TIMEOUT; - 8001590: 2303 movs r3, #3 - 8001592: e116 b.n 80017c2 + 8001954: 2303 movs r3, #3 + 8001956: e116 b.n 8001b86 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8001594: 4b8d ldr r3, [pc, #564] ; (80017cc ) - 8001596: 6a1b ldr r3, [r3, #32] - 8001598: 2202 movs r2, #2 - 800159a: 4013 ands r3, r2 - 800159c: d1f0 bne.n 8001580 + 8001958: 4b8d ldr r3, [pc, #564] ; (8001b90 ) + 800195a: 6a1b ldr r3, [r3, #32] + 800195c: 2202 movs r2, #2 + 800195e: 4013 ands r3, r2 + 8001960: d1f0 bne.n 8001944 } } } /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) - 800159e: 231f movs r3, #31 - 80015a0: 18fb adds r3, r7, r3 - 80015a2: 781b ldrb r3, [r3, #0] - 80015a4: 2b01 cmp r3, #1 - 80015a6: d105 bne.n 80015b4 + 8001962: 231f movs r3, #31 + 8001964: 18fb adds r3, r7, r3 + 8001966: 781b ldrb r3, [r3, #0] + 8001968: 2b01 cmp r3, #1 + 800196a: d105 bne.n 8001978 { __HAL_RCC_PWR_CLK_DISABLE(); - 80015a8: 4b88 ldr r3, [pc, #544] ; (80017cc ) - 80015aa: 69da ldr r2, [r3, #28] - 80015ac: 4b87 ldr r3, [pc, #540] ; (80017cc ) - 80015ae: 4989 ldr r1, [pc, #548] ; (80017d4 ) - 80015b0: 400a ands r2, r1 - 80015b2: 61da str r2, [r3, #28] + 800196c: 4b88 ldr r3, [pc, #544] ; (8001b90 ) + 800196e: 69da ldr r2, [r3, #28] + 8001970: 4b87 ldr r3, [pc, #540] ; (8001b90 ) + 8001972: 4989 ldr r1, [pc, #548] ; (8001b98 ) + 8001974: 400a ands r2, r1 + 8001976: 61da str r2, [r3, #28] } } /*----------------------------- HSI14 Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14) - 80015b4: 687b ldr r3, [r7, #4] - 80015b6: 681b ldr r3, [r3, #0] - 80015b8: 2210 movs r2, #16 - 80015ba: 4013 ands r3, r2 - 80015bc: d063 beq.n 8001686 + 8001978: 687b ldr r3, [r7, #4] + 800197a: 681b ldr r3, [r3, #0] + 800197c: 2210 movs r2, #16 + 800197e: 4013 ands r3, r2 + 8001980: d063 beq.n 8001a4a /* Check the parameters */ assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue)); /* Check the HSI14 State */ if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON) - 80015be: 687b ldr r3, [r7, #4] - 80015c0: 695b ldr r3, [r3, #20] - 80015c2: 2b01 cmp r3, #1 - 80015c4: d12a bne.n 800161c + 8001982: 687b ldr r3, [r7, #4] + 8001984: 695b ldr r3, [r3, #20] + 8001986: 2b01 cmp r3, #1 + 8001988: d12a bne.n 80019e0 { /* Disable ADC control of the Internal High Speed oscillator HSI14 */ __HAL_RCC_HSI14ADC_DISABLE(); - 80015c6: 4b81 ldr r3, [pc, #516] ; (80017cc ) - 80015c8: 6b5a ldr r2, [r3, #52] ; 0x34 - 80015ca: 4b80 ldr r3, [pc, #512] ; (80017cc ) - 80015cc: 2104 movs r1, #4 - 80015ce: 430a orrs r2, r1 - 80015d0: 635a str r2, [r3, #52] ; 0x34 + 800198a: 4b81 ldr r3, [pc, #516] ; (8001b90 ) + 800198c: 6b5a ldr r2, [r3, #52] ; 0x34 + 800198e: 4b80 ldr r3, [pc, #512] ; (8001b90 ) + 8001990: 2104 movs r1, #4 + 8001992: 430a orrs r2, r1 + 8001994: 635a str r2, [r3, #52] ; 0x34 /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI14_ENABLE(); - 80015d2: 4b7e ldr r3, [pc, #504] ; (80017cc ) - 80015d4: 6b5a ldr r2, [r3, #52] ; 0x34 - 80015d6: 4b7d ldr r3, [pc, #500] ; (80017cc ) - 80015d8: 2101 movs r1, #1 - 80015da: 430a orrs r2, r1 - 80015dc: 635a str r2, [r3, #52] ; 0x34 + 8001996: 4b7e ldr r3, [pc, #504] ; (8001b90 ) + 8001998: 6b5a ldr r2, [r3, #52] ; 0x34 + 800199a: 4b7d ldr r3, [pc, #500] ; (8001b90 ) + 800199c: 2101 movs r1, #1 + 800199e: 430a orrs r2, r1 + 80019a0: 635a str r2, [r3, #52] ; 0x34 /* Get Start Tick */ tickstart = HAL_GetTick(); - 80015de: f7ff f947 bl 8000870 - 80015e2: 0003 movs r3, r0 - 80015e4: 61bb str r3, [r7, #24] + 80019a2: f7fe ff65 bl 8000870 + 80019a6: 0003 movs r3, r0 + 80019a8: 61bb str r3, [r7, #24] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET) - 80015e6: e008 b.n 80015fa + 80019aa: e008 b.n 80019be { if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) - 80015e8: f7ff f942 bl 8000870 - 80015ec: 0002 movs r2, r0 - 80015ee: 69bb ldr r3, [r7, #24] - 80015f0: 1ad3 subs r3, r2, r3 - 80015f2: 2b02 cmp r3, #2 - 80015f4: d901 bls.n 80015fa + 80019ac: f7fe ff60 bl 8000870 + 80019b0: 0002 movs r2, r0 + 80019b2: 69bb ldr r3, [r7, #24] + 80019b4: 1ad3 subs r3, r2, r3 + 80019b6: 2b02 cmp r3, #2 + 80019b8: d901 bls.n 80019be { return HAL_TIMEOUT; - 80015f6: 2303 movs r3, #3 - 80015f8: e0e3 b.n 80017c2 + 80019ba: 2303 movs r3, #3 + 80019bc: e0e3 b.n 8001b86 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET) - 80015fa: 4b74 ldr r3, [pc, #464] ; (80017cc ) - 80015fc: 6b5b ldr r3, [r3, #52] ; 0x34 - 80015fe: 2202 movs r2, #2 - 8001600: 4013 ands r3, r2 - 8001602: d0f1 beq.n 80015e8 + 80019be: 4b74 ldr r3, [pc, #464] ; (8001b90 ) + 80019c0: 6b5b ldr r3, [r3, #52] ; 0x34 + 80019c2: 2202 movs r2, #2 + 80019c4: 4013 ands r3, r2 + 80019c6: d0f1 beq.n 80019ac } } /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); - 8001604: 4b71 ldr r3, [pc, #452] ; (80017cc ) - 8001606: 6b5b ldr r3, [r3, #52] ; 0x34 - 8001608: 22f8 movs r2, #248 ; 0xf8 - 800160a: 4393 bics r3, r2 - 800160c: 0019 movs r1, r3 - 800160e: 687b ldr r3, [r7, #4] - 8001610: 699b ldr r3, [r3, #24] - 8001612: 00da lsls r2, r3, #3 - 8001614: 4b6d ldr r3, [pc, #436] ; (80017cc ) - 8001616: 430a orrs r2, r1 - 8001618: 635a str r2, [r3, #52] ; 0x34 - 800161a: e034 b.n 8001686 + 80019c8: 4b71 ldr r3, [pc, #452] ; (8001b90 ) + 80019ca: 6b5b ldr r3, [r3, #52] ; 0x34 + 80019cc: 22f8 movs r2, #248 ; 0xf8 + 80019ce: 4393 bics r3, r2 + 80019d0: 0019 movs r1, r3 + 80019d2: 687b ldr r3, [r7, #4] + 80019d4: 699b ldr r3, [r3, #24] + 80019d6: 00da lsls r2, r3, #3 + 80019d8: 4b6d ldr r3, [pc, #436] ; (8001b90 ) + 80019da: 430a orrs r2, r1 + 80019dc: 635a str r2, [r3, #52] ; 0x34 + 80019de: e034 b.n 8001a4a } else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL) - 800161c: 687b ldr r3, [r7, #4] - 800161e: 695b ldr r3, [r3, #20] - 8001620: 3305 adds r3, #5 - 8001622: d111 bne.n 8001648 + 80019e0: 687b ldr r3, [r7, #4] + 80019e2: 695b ldr r3, [r3, #20] + 80019e4: 3305 adds r3, #5 + 80019e6: d111 bne.n 8001a0c { /* Enable ADC control of the Internal High Speed oscillator HSI14 */ __HAL_RCC_HSI14ADC_ENABLE(); - 8001624: 4b69 ldr r3, [pc, #420] ; (80017cc ) - 8001626: 6b5a ldr r2, [r3, #52] ; 0x34 - 8001628: 4b68 ldr r3, [pc, #416] ; (80017cc ) - 800162a: 2104 movs r1, #4 - 800162c: 438a bics r2, r1 - 800162e: 635a str r2, [r3, #52] ; 0x34 + 80019e8: 4b69 ldr r3, [pc, #420] ; (8001b90 ) + 80019ea: 6b5a ldr r2, [r3, #52] ; 0x34 + 80019ec: 4b68 ldr r3, [pc, #416] ; (8001b90 ) + 80019ee: 2104 movs r1, #4 + 80019f0: 438a bics r2, r1 + 80019f2: 635a str r2, [r3, #52] ; 0x34 /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); - 8001630: 4b66 ldr r3, [pc, #408] ; (80017cc ) - 8001632: 6b5b ldr r3, [r3, #52] ; 0x34 - 8001634: 22f8 movs r2, #248 ; 0xf8 - 8001636: 4393 bics r3, r2 - 8001638: 0019 movs r1, r3 - 800163a: 687b ldr r3, [r7, #4] - 800163c: 699b ldr r3, [r3, #24] - 800163e: 00da lsls r2, r3, #3 - 8001640: 4b62 ldr r3, [pc, #392] ; (80017cc ) - 8001642: 430a orrs r2, r1 - 8001644: 635a str r2, [r3, #52] ; 0x34 - 8001646: e01e b.n 8001686 + 80019f4: 4b66 ldr r3, [pc, #408] ; (8001b90 ) + 80019f6: 6b5b ldr r3, [r3, #52] ; 0x34 + 80019f8: 22f8 movs r2, #248 ; 0xf8 + 80019fa: 4393 bics r3, r2 + 80019fc: 0019 movs r1, r3 + 80019fe: 687b ldr r3, [r7, #4] + 8001a00: 699b ldr r3, [r3, #24] + 8001a02: 00da lsls r2, r3, #3 + 8001a04: 4b62 ldr r3, [pc, #392] ; (8001b90 ) + 8001a06: 430a orrs r2, r1 + 8001a08: 635a str r2, [r3, #52] ; 0x34 + 8001a0a: e01e b.n 8001a4a } else { /* Disable ADC control of the Internal High Speed oscillator HSI14 */ __HAL_RCC_HSI14ADC_DISABLE(); - 8001648: 4b60 ldr r3, [pc, #384] ; (80017cc ) - 800164a: 6b5a ldr r2, [r3, #52] ; 0x34 - 800164c: 4b5f ldr r3, [pc, #380] ; (80017cc ) - 800164e: 2104 movs r1, #4 - 8001650: 430a orrs r2, r1 - 8001652: 635a str r2, [r3, #52] ; 0x34 + 8001a0c: 4b60 ldr r3, [pc, #384] ; (8001b90 ) + 8001a0e: 6b5a ldr r2, [r3, #52] ; 0x34 + 8001a10: 4b5f ldr r3, [pc, #380] ; (8001b90 ) + 8001a12: 2104 movs r1, #4 + 8001a14: 430a orrs r2, r1 + 8001a16: 635a str r2, [r3, #52] ; 0x34 /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI14_DISABLE(); - 8001654: 4b5d ldr r3, [pc, #372] ; (80017cc ) - 8001656: 6b5a ldr r2, [r3, #52] ; 0x34 - 8001658: 4b5c ldr r3, [pc, #368] ; (80017cc ) - 800165a: 2101 movs r1, #1 - 800165c: 438a bics r2, r1 - 800165e: 635a str r2, [r3, #52] ; 0x34 + 8001a18: 4b5d ldr r3, [pc, #372] ; (8001b90 ) + 8001a1a: 6b5a ldr r2, [r3, #52] ; 0x34 + 8001a1c: 4b5c ldr r3, [pc, #368] ; (8001b90 ) + 8001a1e: 2101 movs r1, #1 + 8001a20: 438a bics r2, r1 + 8001a22: 635a str r2, [r3, #52] ; 0x34 /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001660: f7ff f906 bl 8000870 - 8001664: 0003 movs r3, r0 - 8001666: 61bb str r3, [r7, #24] + 8001a24: f7fe ff24 bl 8000870 + 8001a28: 0003 movs r3, r0 + 8001a2a: 61bb str r3, [r7, #24] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET) - 8001668: e008 b.n 800167c + 8001a2c: e008 b.n 8001a40 { if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) - 800166a: f7ff f901 bl 8000870 - 800166e: 0002 movs r2, r0 - 8001670: 69bb ldr r3, [r7, #24] - 8001672: 1ad3 subs r3, r2, r3 - 8001674: 2b02 cmp r3, #2 - 8001676: d901 bls.n 800167c + 8001a2e: f7fe ff1f bl 8000870 + 8001a32: 0002 movs r2, r0 + 8001a34: 69bb ldr r3, [r7, #24] + 8001a36: 1ad3 subs r3, r2, r3 + 8001a38: 2b02 cmp r3, #2 + 8001a3a: d901 bls.n 8001a40 { return HAL_TIMEOUT; - 8001678: 2303 movs r3, #3 - 800167a: e0a2 b.n 80017c2 + 8001a3c: 2303 movs r3, #3 + 8001a3e: e0a2 b.n 8001b86 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET) - 800167c: 4b53 ldr r3, [pc, #332] ; (80017cc ) - 800167e: 6b5b ldr r3, [r3, #52] ; 0x34 - 8001680: 2202 movs r2, #2 - 8001682: 4013 ands r3, r2 - 8001684: d1f1 bne.n 800166a + 8001a40: 4b53 ldr r3, [pc, #332] ; (8001b90 ) + 8001a42: 6b5b ldr r3, [r3, #52] ; 0x34 + 8001a44: 2202 movs r2, #2 + 8001a46: 4013 ands r3, r2 + 8001a48: d1f1 bne.n 8001a2e #endif /* RCC_HSI48_SUPPORT */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 8001686: 687b ldr r3, [r7, #4] - 8001688: 6a1b ldr r3, [r3, #32] - 800168a: 2b00 cmp r3, #0 - 800168c: d100 bne.n 8001690 - 800168e: e097 b.n 80017c0 + 8001a4a: 687b ldr r3, [r7, #4] + 8001a4c: 6a1b ldr r3, [r3, #32] + 8001a4e: 2b00 cmp r3, #0 + 8001a50: d100 bne.n 8001a54 + 8001a52: e097 b.n 8001b84 { /* Check if the PLL is used as system clock or not */ if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8001690: 4b4e ldr r3, [pc, #312] ; (80017cc ) - 8001692: 685b ldr r3, [r3, #4] - 8001694: 220c movs r2, #12 - 8001696: 4013 ands r3, r2 - 8001698: 2b08 cmp r3, #8 - 800169a: d100 bne.n 800169e - 800169c: e06b b.n 8001776 + 8001a54: 4b4e ldr r3, [pc, #312] ; (8001b90 ) + 8001a56: 685b ldr r3, [r3, #4] + 8001a58: 220c movs r2, #12 + 8001a5a: 4013 ands r3, r2 + 8001a5c: 2b08 cmp r3, #8 + 8001a5e: d100 bne.n 8001a62 + 8001a60: e06b b.n 8001b3a { if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 800169e: 687b ldr r3, [r7, #4] - 80016a0: 6a1b ldr r3, [r3, #32] - 80016a2: 2b02 cmp r3, #2 - 80016a4: d14c bne.n 8001740 + 8001a62: 687b ldr r3, [r7, #4] + 8001a64: 6a1b ldr r3, [r3, #32] + 8001a66: 2b02 cmp r3, #2 + 8001a68: d14c bne.n 8001b04 assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 80016a6: 4b49 ldr r3, [pc, #292] ; (80017cc ) - 80016a8: 681a ldr r2, [r3, #0] - 80016aa: 4b48 ldr r3, [pc, #288] ; (80017cc ) - 80016ac: 494a ldr r1, [pc, #296] ; (80017d8 ) - 80016ae: 400a ands r2, r1 - 80016b0: 601a str r2, [r3, #0] + 8001a6a: 4b49 ldr r3, [pc, #292] ; (8001b90 ) + 8001a6c: 681a ldr r2, [r3, #0] + 8001a6e: 4b48 ldr r3, [pc, #288] ; (8001b90 ) + 8001a70: 494a ldr r1, [pc, #296] ; (8001b9c ) + 8001a72: 400a ands r2, r1 + 8001a74: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80016b2: f7ff f8dd bl 8000870 - 80016b6: 0003 movs r3, r0 - 80016b8: 61bb str r3, [r7, #24] + 8001a76: f7fe fefb bl 8000870 + 8001a7a: 0003 movs r3, r0 + 8001a7c: 61bb str r3, [r7, #24] /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80016ba: e008 b.n 80016ce + 8001a7e: e008 b.n 8001a92 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 80016bc: f7ff f8d8 bl 8000870 - 80016c0: 0002 movs r2, r0 - 80016c2: 69bb ldr r3, [r7, #24] - 80016c4: 1ad3 subs r3, r2, r3 - 80016c6: 2b02 cmp r3, #2 - 80016c8: d901 bls.n 80016ce + 8001a80: f7fe fef6 bl 8000870 + 8001a84: 0002 movs r2, r0 + 8001a86: 69bb ldr r3, [r7, #24] + 8001a88: 1ad3 subs r3, r2, r3 + 8001a8a: 2b02 cmp r3, #2 + 8001a8c: d901 bls.n 8001a92 { return HAL_TIMEOUT; - 80016ca: 2303 movs r3, #3 - 80016cc: e079 b.n 80017c2 + 8001a8e: 2303 movs r3, #3 + 8001a90: e079 b.n 8001b86 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80016ce: 4b3f ldr r3, [pc, #252] ; (80017cc ) - 80016d0: 681a ldr r2, [r3, #0] - 80016d2: 2380 movs r3, #128 ; 0x80 - 80016d4: 049b lsls r3, r3, #18 - 80016d6: 4013 ands r3, r2 - 80016d8: d1f0 bne.n 80016bc + 8001a92: 4b3f ldr r3, [pc, #252] ; (8001b90 ) + 8001a94: 681a ldr r2, [r3, #0] + 8001a96: 2380 movs r3, #128 ; 0x80 + 8001a98: 049b lsls r3, r3, #18 + 8001a9a: 4013 ands r3, r2 + 8001a9c: d1f0 bne.n 8001a80 } } /* Configure the main PLL clock source, predivider and multiplication factor. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 80016da: 4b3c ldr r3, [pc, #240] ; (80017cc ) - 80016dc: 6adb ldr r3, [r3, #44] ; 0x2c - 80016de: 220f movs r2, #15 - 80016e0: 4393 bics r3, r2 - 80016e2: 0019 movs r1, r3 - 80016e4: 687b ldr r3, [r7, #4] - 80016e6: 6ada ldr r2, [r3, #44] ; 0x2c - 80016e8: 4b38 ldr r3, [pc, #224] ; (80017cc ) - 80016ea: 430a orrs r2, r1 - 80016ec: 62da str r2, [r3, #44] ; 0x2c - 80016ee: 4b37 ldr r3, [pc, #220] ; (80017cc ) - 80016f0: 685b ldr r3, [r3, #4] - 80016f2: 4a3a ldr r2, [pc, #232] ; (80017dc ) - 80016f4: 4013 ands r3, r2 - 80016f6: 0019 movs r1, r3 - 80016f8: 687b ldr r3, [r7, #4] - 80016fa: 6a9a ldr r2, [r3, #40] ; 0x28 - 80016fc: 687b ldr r3, [r7, #4] - 80016fe: 6a5b ldr r3, [r3, #36] ; 0x24 - 8001700: 431a orrs r2, r3 - 8001702: 4b32 ldr r3, [pc, #200] ; (80017cc ) - 8001704: 430a orrs r2, r1 - 8001706: 605a str r2, [r3, #4] + 8001a9e: 4b3c ldr r3, [pc, #240] ; (8001b90 ) + 8001aa0: 6adb ldr r3, [r3, #44] ; 0x2c + 8001aa2: 220f movs r2, #15 + 8001aa4: 4393 bics r3, r2 + 8001aa6: 0019 movs r1, r3 + 8001aa8: 687b ldr r3, [r7, #4] + 8001aaa: 6ada ldr r2, [r3, #44] ; 0x2c + 8001aac: 4b38 ldr r3, [pc, #224] ; (8001b90 ) + 8001aae: 430a orrs r2, r1 + 8001ab0: 62da str r2, [r3, #44] ; 0x2c + 8001ab2: 4b37 ldr r3, [pc, #220] ; (8001b90 ) + 8001ab4: 685b ldr r3, [r3, #4] + 8001ab6: 4a3a ldr r2, [pc, #232] ; (8001ba0 ) + 8001ab8: 4013 ands r3, r2 + 8001aba: 0019 movs r1, r3 + 8001abc: 687b ldr r3, [r7, #4] + 8001abe: 6a9a ldr r2, [r3, #40] ; 0x28 + 8001ac0: 687b ldr r3, [r7, #4] + 8001ac2: 6a5b ldr r3, [r3, #36] ; 0x24 + 8001ac4: 431a orrs r2, r3 + 8001ac6: 4b32 ldr r3, [pc, #200] ; (8001b90 ) + 8001ac8: 430a orrs r2, r1 + 8001aca: 605a str r2, [r3, #4] RCC_OscInitStruct->PLL.PREDIV, RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 8001708: 4b30 ldr r3, [pc, #192] ; (80017cc ) - 800170a: 681a ldr r2, [r3, #0] - 800170c: 4b2f ldr r3, [pc, #188] ; (80017cc ) - 800170e: 2180 movs r1, #128 ; 0x80 - 8001710: 0449 lsls r1, r1, #17 - 8001712: 430a orrs r2, r1 - 8001714: 601a str r2, [r3, #0] + 8001acc: 4b30 ldr r3, [pc, #192] ; (8001b90 ) + 8001ace: 681a ldr r2, [r3, #0] + 8001ad0: 4b2f ldr r3, [pc, #188] ; (8001b90 ) + 8001ad2: 2180 movs r1, #128 ; 0x80 + 8001ad4: 0449 lsls r1, r1, #17 + 8001ad6: 430a orrs r2, r1 + 8001ad8: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001716: f7ff f8ab bl 8000870 - 800171a: 0003 movs r3, r0 - 800171c: 61bb str r3, [r7, #24] + 8001ada: f7fe fec9 bl 8000870 + 8001ade: 0003 movs r3, r0 + 8001ae0: 61bb str r3, [r7, #24] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 800171e: e008 b.n 8001732 + 8001ae2: e008 b.n 8001af6 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8001720: f7ff f8a6 bl 8000870 - 8001724: 0002 movs r2, r0 - 8001726: 69bb ldr r3, [r7, #24] - 8001728: 1ad3 subs r3, r2, r3 - 800172a: 2b02 cmp r3, #2 - 800172c: d901 bls.n 8001732 + 8001ae4: f7fe fec4 bl 8000870 + 8001ae8: 0002 movs r2, r0 + 8001aea: 69bb ldr r3, [r7, #24] + 8001aec: 1ad3 subs r3, r2, r3 + 8001aee: 2b02 cmp r3, #2 + 8001af0: d901 bls.n 8001af6 { return HAL_TIMEOUT; - 800172e: 2303 movs r3, #3 - 8001730: e047 b.n 80017c2 + 8001af2: 2303 movs r3, #3 + 8001af4: e047 b.n 8001b86 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8001732: 4b26 ldr r3, [pc, #152] ; (80017cc ) - 8001734: 681a ldr r2, [r3, #0] - 8001736: 2380 movs r3, #128 ; 0x80 - 8001738: 049b lsls r3, r3, #18 - 800173a: 4013 ands r3, r2 - 800173c: d0f0 beq.n 8001720 - 800173e: e03f b.n 80017c0 + 8001af6: 4b26 ldr r3, [pc, #152] ; (8001b90 ) + 8001af8: 681a ldr r2, [r3, #0] + 8001afa: 2380 movs r3, #128 ; 0x80 + 8001afc: 049b lsls r3, r3, #18 + 8001afe: 4013 ands r3, r2 + 8001b00: d0f0 beq.n 8001ae4 + 8001b02: e03f b.n 8001b84 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8001740: 4b22 ldr r3, [pc, #136] ; (80017cc ) - 8001742: 681a ldr r2, [r3, #0] - 8001744: 4b21 ldr r3, [pc, #132] ; (80017cc ) - 8001746: 4924 ldr r1, [pc, #144] ; (80017d8 ) - 8001748: 400a ands r2, r1 - 800174a: 601a str r2, [r3, #0] + 8001b04: 4b22 ldr r3, [pc, #136] ; (8001b90 ) + 8001b06: 681a ldr r2, [r3, #0] + 8001b08: 4b21 ldr r3, [pc, #132] ; (8001b90 ) + 8001b0a: 4924 ldr r1, [pc, #144] ; (8001b9c ) + 8001b0c: 400a ands r2, r1 + 8001b0e: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800174c: f7ff f890 bl 8000870 - 8001750: 0003 movs r3, r0 - 8001752: 61bb str r3, [r7, #24] + 8001b10: f7fe feae bl 8000870 + 8001b14: 0003 movs r3, r0 + 8001b16: 61bb str r3, [r7, #24] /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8001754: e008 b.n 8001768 + 8001b18: e008 b.n 8001b2c { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8001756: f7ff f88b bl 8000870 - 800175a: 0002 movs r2, r0 - 800175c: 69bb ldr r3, [r7, #24] - 800175e: 1ad3 subs r3, r2, r3 - 8001760: 2b02 cmp r3, #2 - 8001762: d901 bls.n 8001768 + 8001b1a: f7fe fea9 bl 8000870 + 8001b1e: 0002 movs r2, r0 + 8001b20: 69bb ldr r3, [r7, #24] + 8001b22: 1ad3 subs r3, r2, r3 + 8001b24: 2b02 cmp r3, #2 + 8001b26: d901 bls.n 8001b2c { return HAL_TIMEOUT; - 8001764: 2303 movs r3, #3 - 8001766: e02c b.n 80017c2 + 8001b28: 2303 movs r3, #3 + 8001b2a: e02c b.n 8001b86 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8001768: 4b18 ldr r3, [pc, #96] ; (80017cc ) - 800176a: 681a ldr r2, [r3, #0] - 800176c: 2380 movs r3, #128 ; 0x80 - 800176e: 049b lsls r3, r3, #18 - 8001770: 4013 ands r3, r2 - 8001772: d1f0 bne.n 8001756 - 8001774: e024 b.n 80017c0 + 8001b2c: 4b18 ldr r3, [pc, #96] ; (8001b90 ) + 8001b2e: 681a ldr r2, [r3, #0] + 8001b30: 2380 movs r3, #128 ; 0x80 + 8001b32: 049b lsls r3, r3, #18 + 8001b34: 4013 ands r3, r2 + 8001b36: d1f0 bne.n 8001b1a + 8001b38: e024 b.n 8001b84 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 8001776: 687b ldr r3, [r7, #4] - 8001778: 6a1b ldr r3, [r3, #32] - 800177a: 2b01 cmp r3, #1 - 800177c: d101 bne.n 8001782 + 8001b3a: 687b ldr r3, [r7, #4] + 8001b3c: 6a1b ldr r3, [r3, #32] + 8001b3e: 2b01 cmp r3, #1 + 8001b40: d101 bne.n 8001b46 { return HAL_ERROR; - 800177e: 2301 movs r3, #1 - 8001780: e01f b.n 80017c2 + 8001b42: 2301 movs r3, #1 + 8001b44: e01f b.n 8001b86 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; - 8001782: 4b12 ldr r3, [pc, #72] ; (80017cc ) - 8001784: 685b ldr r3, [r3, #4] - 8001786: 617b str r3, [r7, #20] + 8001b46: 4b12 ldr r3, [pc, #72] ; (8001b90 ) + 8001b48: 685b ldr r3, [r3, #4] + 8001b4a: 617b str r3, [r7, #20] pll_config2 = RCC->CFGR2; - 8001788: 4b10 ldr r3, [pc, #64] ; (80017cc ) - 800178a: 6adb ldr r3, [r3, #44] ; 0x2c - 800178c: 613b str r3, [r7, #16] + 8001b4c: 4b10 ldr r3, [pc, #64] ; (8001b90 ) + 8001b4e: 6adb ldr r3, [r3, #44] ; 0x2c + 8001b50: 613b str r3, [r7, #16] if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 800178e: 697a ldr r2, [r7, #20] - 8001790: 2380 movs r3, #128 ; 0x80 - 8001792: 025b lsls r3, r3, #9 - 8001794: 401a ands r2, r3 - 8001796: 687b ldr r3, [r7, #4] - 8001798: 6a5b ldr r3, [r3, #36] ; 0x24 - 800179a: 429a cmp r2, r3 - 800179c: d10e bne.n 80017bc + 8001b52: 697a ldr r2, [r7, #20] + 8001b54: 2380 movs r3, #128 ; 0x80 + 8001b56: 025b lsls r3, r3, #9 + 8001b58: 401a ands r2, r3 + 8001b5a: 687b ldr r3, [r7, #4] + 8001b5c: 6a5b ldr r3, [r3, #36] ; 0x24 + 8001b5e: 429a cmp r2, r3 + 8001b60: d10e bne.n 8001b80 (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || - 800179e: 693b ldr r3, [r7, #16] - 80017a0: 220f movs r2, #15 - 80017a2: 401a ands r2, r3 - 80017a4: 687b ldr r3, [r7, #4] - 80017a6: 6adb ldr r3, [r3, #44] ; 0x2c + 8001b62: 693b ldr r3, [r7, #16] + 8001b64: 220f movs r2, #15 + 8001b66: 401a ands r2, r3 + 8001b68: 687b ldr r3, [r7, #4] + 8001b6a: 6adb ldr r3, [r3, #44] ; 0x2c if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80017a8: 429a cmp r2, r3 - 80017aa: d107 bne.n 80017bc + 8001b6c: 429a cmp r2, r3 + 8001b6e: d107 bne.n 8001b80 (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) - 80017ac: 697a ldr r2, [r7, #20] - 80017ae: 23f0 movs r3, #240 ; 0xf0 - 80017b0: 039b lsls r3, r3, #14 - 80017b2: 401a ands r2, r3 - 80017b4: 687b ldr r3, [r7, #4] - 80017b6: 6a9b ldr r3, [r3, #40] ; 0x28 + 8001b70: 697a ldr r2, [r7, #20] + 8001b72: 23f0 movs r3, #240 ; 0xf0 + 8001b74: 039b lsls r3, r3, #14 + 8001b76: 401a ands r2, r3 + 8001b78: 687b ldr r3, [r7, #4] + 8001b7a: 6a9b ldr r3, [r3, #40] ; 0x28 (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || - 80017b8: 429a cmp r2, r3 - 80017ba: d001 beq.n 80017c0 + 8001b7c: 429a cmp r2, r3 + 8001b7e: d001 beq.n 8001b84 { return HAL_ERROR; - 80017bc: 2301 movs r3, #1 - 80017be: e000 b.n 80017c2 + 8001b80: 2301 movs r3, #1 + 8001b82: e000 b.n 8001b86 } } } } return HAL_OK; - 80017c0: 2300 movs r3, #0 + 8001b84: 2300 movs r3, #0 } - 80017c2: 0018 movs r0, r3 - 80017c4: 46bd mov sp, r7 - 80017c6: b008 add sp, #32 - 80017c8: bd80 pop {r7, pc} - 80017ca: 46c0 nop ; (mov r8, r8) - 80017cc: 40021000 .word 0x40021000 - 80017d0: 00001388 .word 0x00001388 - 80017d4: efffffff .word 0xefffffff - 80017d8: feffffff .word 0xfeffffff - 80017dc: ffc2ffff .word 0xffc2ffff + 8001b86: 0018 movs r0, r3 + 8001b88: 46bd mov sp, r7 + 8001b8a: b008 add sp, #32 + 8001b8c: bd80 pop {r7, pc} + 8001b8e: 46c0 nop ; (mov r8, r8) + 8001b90: 40021000 .word 0x40021000 + 8001b94: 00001388 .word 0x00001388 + 8001b98: efffffff .word 0xefffffff + 8001b9c: feffffff .word 0xfeffffff + 8001ba0: ffc2ffff .word 0xffc2ffff -080017e0 : +08001ba4 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 80017e0: b580 push {r7, lr} - 80017e2: b084 sub sp, #16 - 80017e4: af00 add r7, sp, #0 - 80017e6: 6078 str r0, [r7, #4] - 80017e8: 6039 str r1, [r7, #0] + 8001ba4: b580 push {r7, lr} + 8001ba6: b084 sub sp, #16 + 8001ba8: af00 add r7, sp, #0 + 8001baa: 6078 str r0, [r7, #4] + 8001bac: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if(RCC_ClkInitStruct == NULL) - 80017ea: 687b ldr r3, [r7, #4] - 80017ec: 2b00 cmp r3, #0 - 80017ee: d101 bne.n 80017f4 + 8001bae: 687b ldr r3, [r7, #4] + 8001bb0: 2b00 cmp r3, #0 + 8001bb2: d101 bne.n 8001bb8 { return HAL_ERROR; - 80017f0: 2301 movs r3, #1 - 80017f2: e0b3 b.n 800195c + 8001bb4: 2301 movs r3, #1 + 8001bb6: e0b3 b.n 8001d20 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) - 80017f4: 4b5b ldr r3, [pc, #364] ; (8001964 ) - 80017f6: 681b ldr r3, [r3, #0] - 80017f8: 2201 movs r2, #1 - 80017fa: 4013 ands r3, r2 - 80017fc: 683a ldr r2, [r7, #0] - 80017fe: 429a cmp r2, r3 - 8001800: d911 bls.n 8001826 + 8001bb8: 4b5b ldr r3, [pc, #364] ; (8001d28 ) + 8001bba: 681b ldr r3, [r3, #0] + 8001bbc: 2201 movs r2, #1 + 8001bbe: 4013 ands r3, r2 + 8001bc0: 683a ldr r2, [r7, #0] + 8001bc2: 429a cmp r2, r3 + 8001bc4: d911 bls.n 8001bea { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8001802: 4b58 ldr r3, [pc, #352] ; (8001964 ) - 8001804: 681b ldr r3, [r3, #0] - 8001806: 2201 movs r2, #1 - 8001808: 4393 bics r3, r2 - 800180a: 0019 movs r1, r3 - 800180c: 4b55 ldr r3, [pc, #340] ; (8001964 ) - 800180e: 683a ldr r2, [r7, #0] - 8001810: 430a orrs r2, r1 - 8001812: 601a str r2, [r3, #0] + 8001bc6: 4b58 ldr r3, [pc, #352] ; (8001d28 ) + 8001bc8: 681b ldr r3, [r3, #0] + 8001bca: 2201 movs r2, #1 + 8001bcc: 4393 bics r3, r2 + 8001bce: 0019 movs r1, r3 + 8001bd0: 4b55 ldr r3, [pc, #340] ; (8001d28 ) + 8001bd2: 683a ldr r2, [r7, #0] + 8001bd4: 430a orrs r2, r1 + 8001bd6: 601a str r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 8001814: 4b53 ldr r3, [pc, #332] ; (8001964 ) - 8001816: 681b ldr r3, [r3, #0] - 8001818: 2201 movs r2, #1 - 800181a: 4013 ands r3, r2 - 800181c: 683a ldr r2, [r7, #0] - 800181e: 429a cmp r2, r3 - 8001820: d001 beq.n 8001826 + 8001bd8: 4b53 ldr r3, [pc, #332] ; (8001d28 ) + 8001bda: 681b ldr r3, [r3, #0] + 8001bdc: 2201 movs r2, #1 + 8001bde: 4013 ands r3, r2 + 8001be0: 683a ldr r2, [r7, #0] + 8001be2: 429a cmp r2, r3 + 8001be4: d001 beq.n 8001bea { return HAL_ERROR; - 8001822: 2301 movs r3, #1 - 8001824: e09a b.n 800195c + 8001be6: 2301 movs r3, #1 + 8001be8: e09a b.n 8001d20 } } /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8001826: 687b ldr r3, [r7, #4] - 8001828: 681b ldr r3, [r3, #0] - 800182a: 2202 movs r2, #2 - 800182c: 4013 ands r3, r2 - 800182e: d015 beq.n 800185c + 8001bea: 687b ldr r3, [r7, #4] + 8001bec: 681b ldr r3, [r3, #0] + 8001bee: 2202 movs r2, #2 + 8001bf0: 4013 ands r3, r2 + 8001bf2: d015 beq.n 8001c20 { /* Set the highest APB divider in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8001830: 687b ldr r3, [r7, #4] - 8001832: 681b ldr r3, [r3, #0] - 8001834: 2204 movs r2, #4 - 8001836: 4013 ands r3, r2 - 8001838: d006 beq.n 8001848 + 8001bf4: 687b ldr r3, [r7, #4] + 8001bf6: 681b ldr r3, [r3, #0] + 8001bf8: 2204 movs r2, #4 + 8001bfa: 4013 ands r3, r2 + 8001bfc: d006 beq.n 8001c0c { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16); - 800183a: 4b4b ldr r3, [pc, #300] ; (8001968 ) - 800183c: 685a ldr r2, [r3, #4] - 800183e: 4b4a ldr r3, [pc, #296] ; (8001968 ) - 8001840: 21e0 movs r1, #224 ; 0xe0 - 8001842: 00c9 lsls r1, r1, #3 - 8001844: 430a orrs r2, r1 - 8001846: 605a str r2, [r3, #4] + 8001bfe: 4b4b ldr r3, [pc, #300] ; (8001d2c ) + 8001c00: 685a ldr r2, [r3, #4] + 8001c02: 4b4a ldr r3, [pc, #296] ; (8001d2c ) + 8001c04: 21e0 movs r1, #224 ; 0xe0 + 8001c06: 00c9 lsls r1, r1, #3 + 8001c08: 430a orrs r2, r1 + 8001c0a: 605a str r2, [r3, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 8001848: 4b47 ldr r3, [pc, #284] ; (8001968 ) - 800184a: 685b ldr r3, [r3, #4] - 800184c: 22f0 movs r2, #240 ; 0xf0 - 800184e: 4393 bics r3, r2 - 8001850: 0019 movs r1, r3 - 8001852: 687b ldr r3, [r7, #4] - 8001854: 689a ldr r2, [r3, #8] - 8001856: 4b44 ldr r3, [pc, #272] ; (8001968 ) - 8001858: 430a orrs r2, r1 - 800185a: 605a str r2, [r3, #4] + 8001c0c: 4b47 ldr r3, [pc, #284] ; (8001d2c ) + 8001c0e: 685b ldr r3, [r3, #4] + 8001c10: 22f0 movs r2, #240 ; 0xf0 + 8001c12: 4393 bics r3, r2 + 8001c14: 0019 movs r1, r3 + 8001c16: 687b ldr r3, [r7, #4] + 8001c18: 689a ldr r2, [r3, #8] + 8001c1a: 4b44 ldr r3, [pc, #272] ; (8001d2c ) + 8001c1c: 430a orrs r2, r1 + 8001c1e: 605a str r2, [r3, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 800185c: 687b ldr r3, [r7, #4] - 800185e: 681b ldr r3, [r3, #0] - 8001860: 2201 movs r2, #1 - 8001862: 4013 ands r3, r2 - 8001864: d040 beq.n 80018e8 + 8001c20: 687b ldr r3, [r7, #4] + 8001c22: 681b ldr r3, [r3, #0] + 8001c24: 2201 movs r2, #1 + 8001c26: 4013 ands r3, r2 + 8001c28: d040 beq.n 8001cac { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8001866: 687b ldr r3, [r7, #4] - 8001868: 685b ldr r3, [r3, #4] - 800186a: 2b01 cmp r3, #1 - 800186c: d107 bne.n 800187e + 8001c2a: 687b ldr r3, [r7, #4] + 8001c2c: 685b ldr r3, [r3, #4] + 8001c2e: 2b01 cmp r3, #1 + 8001c30: d107 bne.n 8001c42 { /* Check the HSE ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 800186e: 4b3e ldr r3, [pc, #248] ; (8001968 ) - 8001870: 681a ldr r2, [r3, #0] - 8001872: 2380 movs r3, #128 ; 0x80 - 8001874: 029b lsls r3, r3, #10 - 8001876: 4013 ands r3, r2 - 8001878: d114 bne.n 80018a4 + 8001c32: 4b3e ldr r3, [pc, #248] ; (8001d2c ) + 8001c34: 681a ldr r2, [r3, #0] + 8001c36: 2380 movs r3, #128 ; 0x80 + 8001c38: 029b lsls r3, r3, #10 + 8001c3a: 4013 ands r3, r2 + 8001c3c: d114 bne.n 8001c68 { return HAL_ERROR; - 800187a: 2301 movs r3, #1 - 800187c: e06e b.n 800195c + 8001c3e: 2301 movs r3, #1 + 8001c40: e06e b.n 8001d20 } } /* PLL is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 800187e: 687b ldr r3, [r7, #4] - 8001880: 685b ldr r3, [r3, #4] - 8001882: 2b02 cmp r3, #2 - 8001884: d107 bne.n 8001896 + 8001c42: 687b ldr r3, [r7, #4] + 8001c44: 685b ldr r3, [r3, #4] + 8001c46: 2b02 cmp r3, #2 + 8001c48: d107 bne.n 8001c5a { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8001886: 4b38 ldr r3, [pc, #224] ; (8001968 ) - 8001888: 681a ldr r2, [r3, #0] - 800188a: 2380 movs r3, #128 ; 0x80 - 800188c: 049b lsls r3, r3, #18 - 800188e: 4013 ands r3, r2 - 8001890: d108 bne.n 80018a4 + 8001c4a: 4b38 ldr r3, [pc, #224] ; (8001d2c ) + 8001c4c: 681a ldr r2, [r3, #0] + 8001c4e: 2380 movs r3, #128 ; 0x80 + 8001c50: 049b lsls r3, r3, #18 + 8001c52: 4013 ands r3, r2 + 8001c54: d108 bne.n 8001c68 { return HAL_ERROR; - 8001892: 2301 movs r3, #1 - 8001894: e062 b.n 800195c + 8001c56: 2301 movs r3, #1 + 8001c58: e062 b.n 8001d20 #endif /* RCC_CFGR_SWS_HSI48 */ /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8001896: 4b34 ldr r3, [pc, #208] ; (8001968 ) - 8001898: 681b ldr r3, [r3, #0] - 800189a: 2202 movs r2, #2 - 800189c: 4013 ands r3, r2 - 800189e: d101 bne.n 80018a4 + 8001c5a: 4b34 ldr r3, [pc, #208] ; (8001d2c ) + 8001c5c: 681b ldr r3, [r3, #0] + 8001c5e: 2202 movs r2, #2 + 8001c60: 4013 ands r3, r2 + 8001c62: d101 bne.n 8001c68 { return HAL_ERROR; - 80018a0: 2301 movs r3, #1 - 80018a2: e05b b.n 800195c + 8001c64: 2301 movs r3, #1 + 8001c66: e05b b.n 8001d20 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 80018a4: 4b30 ldr r3, [pc, #192] ; (8001968 ) - 80018a6: 685b ldr r3, [r3, #4] - 80018a8: 2203 movs r2, #3 - 80018aa: 4393 bics r3, r2 - 80018ac: 0019 movs r1, r3 - 80018ae: 687b ldr r3, [r7, #4] - 80018b0: 685a ldr r2, [r3, #4] - 80018b2: 4b2d ldr r3, [pc, #180] ; (8001968 ) - 80018b4: 430a orrs r2, r1 - 80018b6: 605a str r2, [r3, #4] + 8001c68: 4b30 ldr r3, [pc, #192] ; (8001d2c ) + 8001c6a: 685b ldr r3, [r3, #4] + 8001c6c: 2203 movs r2, #3 + 8001c6e: 4393 bics r3, r2 + 8001c70: 0019 movs r1, r3 + 8001c72: 687b ldr r3, [r7, #4] + 8001c74: 685a ldr r2, [r3, #4] + 8001c76: 4b2d ldr r3, [pc, #180] ; (8001d2c ) + 8001c78: 430a orrs r2, r1 + 8001c7a: 605a str r2, [r3, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80018b8: f7fe ffda bl 8000870 - 80018bc: 0003 movs r3, r0 - 80018be: 60fb str r3, [r7, #12] + 8001c7c: f7fe fdf8 bl 8000870 + 8001c80: 0003 movs r3, r0 + 8001c82: 60fb str r3, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80018c0: e009 b.n 80018d6 + 8001c84: e009 b.n 8001c9a { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 80018c2: f7fe ffd5 bl 8000870 - 80018c6: 0002 movs r2, r0 - 80018c8: 68fb ldr r3, [r7, #12] - 80018ca: 1ad3 subs r3, r2, r3 - 80018cc: 4a27 ldr r2, [pc, #156] ; (800196c ) - 80018ce: 4293 cmp r3, r2 - 80018d0: d901 bls.n 80018d6 + 8001c86: f7fe fdf3 bl 8000870 + 8001c8a: 0002 movs r2, r0 + 8001c8c: 68fb ldr r3, [r7, #12] + 8001c8e: 1ad3 subs r3, r2, r3 + 8001c90: 4a27 ldr r2, [pc, #156] ; (8001d30 ) + 8001c92: 4293 cmp r3, r2 + 8001c94: d901 bls.n 8001c9a { return HAL_TIMEOUT; - 80018d2: 2303 movs r3, #3 - 80018d4: e042 b.n 800195c + 8001c96: 2303 movs r3, #3 + 8001c98: e042 b.n 8001d20 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80018d6: 4b24 ldr r3, [pc, #144] ; (8001968 ) - 80018d8: 685b ldr r3, [r3, #4] - 80018da: 220c movs r2, #12 - 80018dc: 401a ands r2, r3 - 80018de: 687b ldr r3, [r7, #4] - 80018e0: 685b ldr r3, [r3, #4] - 80018e2: 009b lsls r3, r3, #2 - 80018e4: 429a cmp r2, r3 - 80018e6: d1ec bne.n 80018c2 + 8001c9a: 4b24 ldr r3, [pc, #144] ; (8001d2c ) + 8001c9c: 685b ldr r3, [r3, #4] + 8001c9e: 220c movs r2, #12 + 8001ca0: 401a ands r2, r3 + 8001ca2: 687b ldr r3, [r7, #4] + 8001ca4: 685b ldr r3, [r3, #4] + 8001ca6: 009b lsls r3, r3, #2 + 8001ca8: 429a cmp r2, r3 + 8001caa: d1ec bne.n 8001c86 } } } /* Decreasing the number of wait states because of lower CPU frequency */ if(FLatency < __HAL_FLASH_GET_LATENCY()) - 80018e8: 4b1e ldr r3, [pc, #120] ; (8001964 ) - 80018ea: 681b ldr r3, [r3, #0] - 80018ec: 2201 movs r2, #1 - 80018ee: 4013 ands r3, r2 - 80018f0: 683a ldr r2, [r7, #0] - 80018f2: 429a cmp r2, r3 - 80018f4: d211 bcs.n 800191a + 8001cac: 4b1e ldr r3, [pc, #120] ; (8001d28 ) + 8001cae: 681b ldr r3, [r3, #0] + 8001cb0: 2201 movs r2, #1 + 8001cb2: 4013 ands r3, r2 + 8001cb4: 683a ldr r2, [r7, #0] + 8001cb6: 429a cmp r2, r3 + 8001cb8: d211 bcs.n 8001cde { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 80018f6: 4b1b ldr r3, [pc, #108] ; (8001964 ) - 80018f8: 681b ldr r3, [r3, #0] - 80018fa: 2201 movs r2, #1 - 80018fc: 4393 bics r3, r2 - 80018fe: 0019 movs r1, r3 - 8001900: 4b18 ldr r3, [pc, #96] ; (8001964 ) - 8001902: 683a ldr r2, [r7, #0] - 8001904: 430a orrs r2, r1 - 8001906: 601a str r2, [r3, #0] + 8001cba: 4b1b ldr r3, [pc, #108] ; (8001d28 ) + 8001cbc: 681b ldr r3, [r3, #0] + 8001cbe: 2201 movs r2, #1 + 8001cc0: 4393 bics r3, r2 + 8001cc2: 0019 movs r1, r3 + 8001cc4: 4b18 ldr r3, [pc, #96] ; (8001d28 ) + 8001cc6: 683a ldr r2, [r7, #0] + 8001cc8: 430a orrs r2, r1 + 8001cca: 601a str r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 8001908: 4b16 ldr r3, [pc, #88] ; (8001964 ) - 800190a: 681b ldr r3, [r3, #0] - 800190c: 2201 movs r2, #1 - 800190e: 4013 ands r3, r2 - 8001910: 683a ldr r2, [r7, #0] - 8001912: 429a cmp r2, r3 - 8001914: d001 beq.n 800191a + 8001ccc: 4b16 ldr r3, [pc, #88] ; (8001d28 ) + 8001cce: 681b ldr r3, [r3, #0] + 8001cd0: 2201 movs r2, #1 + 8001cd2: 4013 ands r3, r2 + 8001cd4: 683a ldr r2, [r7, #0] + 8001cd6: 429a cmp r2, r3 + 8001cd8: d001 beq.n 8001cde { return HAL_ERROR; - 8001916: 2301 movs r3, #1 - 8001918: e020 b.n 800195c + 8001cda: 2301 movs r3, #1 + 8001cdc: e020 b.n 8001d20 } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 800191a: 687b ldr r3, [r7, #4] - 800191c: 681b ldr r3, [r3, #0] - 800191e: 2204 movs r2, #4 - 8001920: 4013 ands r3, r2 - 8001922: d009 beq.n 8001938 + 8001cde: 687b ldr r3, [r7, #4] + 8001ce0: 681b ldr r3, [r3, #0] + 8001ce2: 2204 movs r2, #4 + 8001ce4: 4013 ands r3, r2 + 8001ce6: d009 beq.n 8001cfc { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); - 8001924: 4b10 ldr r3, [pc, #64] ; (8001968 ) - 8001926: 685b ldr r3, [r3, #4] - 8001928: 4a11 ldr r2, [pc, #68] ; (8001970 ) - 800192a: 4013 ands r3, r2 - 800192c: 0019 movs r1, r3 - 800192e: 687b ldr r3, [r7, #4] - 8001930: 68da ldr r2, [r3, #12] - 8001932: 4b0d ldr r3, [pc, #52] ; (8001968 ) - 8001934: 430a orrs r2, r1 - 8001936: 605a str r2, [r3, #4] + 8001ce8: 4b10 ldr r3, [pc, #64] ; (8001d2c ) + 8001cea: 685b ldr r3, [r3, #4] + 8001cec: 4a11 ldr r2, [pc, #68] ; (8001d34 ) + 8001cee: 4013 ands r3, r2 + 8001cf0: 0019 movs r1, r3 + 8001cf2: 687b ldr r3, [r7, #4] + 8001cf4: 68da ldr r2, [r3, #12] + 8001cf6: 4b0d ldr r3, [pc, #52] ; (8001d2c ) + 8001cf8: 430a orrs r2, r1 + 8001cfa: 605a str r2, [r3, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER]; - 8001938: f000 f820 bl 800197c - 800193c: 0001 movs r1, r0 - 800193e: 4b0a ldr r3, [pc, #40] ; (8001968 ) - 8001940: 685b ldr r3, [r3, #4] - 8001942: 091b lsrs r3, r3, #4 - 8001944: 220f movs r2, #15 - 8001946: 4013 ands r3, r2 - 8001948: 4a0a ldr r2, [pc, #40] ; (8001974 ) - 800194a: 5cd3 ldrb r3, [r2, r3] - 800194c: 000a movs r2, r1 - 800194e: 40da lsrs r2, r3 - 8001950: 4b09 ldr r3, [pc, #36] ; (8001978 ) - 8001952: 601a str r2, [r3, #0] + 8001cfc: f000 f820 bl 8001d40 + 8001d00: 0001 movs r1, r0 + 8001d02: 4b0a ldr r3, [pc, #40] ; (8001d2c ) + 8001d04: 685b ldr r3, [r3, #4] + 8001d06: 091b lsrs r3, r3, #4 + 8001d08: 220f movs r2, #15 + 8001d0a: 4013 ands r3, r2 + 8001d0c: 4a0a ldr r2, [pc, #40] ; (8001d38 ) + 8001d0e: 5cd3 ldrb r3, [r2, r3] + 8001d10: 000a movs r2, r1 + 8001d12: 40da lsrs r2, r3 + 8001d14: 4b09 ldr r3, [pc, #36] ; (8001d3c ) + 8001d16: 601a str r2, [r3, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick (TICK_INT_PRIORITY); - 8001954: 2003 movs r0, #3 - 8001956: f7fe ff45 bl 80007e4 + 8001d18: 2003 movs r0, #3 + 8001d1a: f7fe fd63 bl 80007e4 return HAL_OK; - 800195a: 2300 movs r3, #0 + 8001d1e: 2300 movs r3, #0 } - 800195c: 0018 movs r0, r3 - 800195e: 46bd mov sp, r7 - 8001960: b004 add sp, #16 - 8001962: bd80 pop {r7, pc} - 8001964: 40022000 .word 0x40022000 - 8001968: 40021000 .word 0x40021000 - 800196c: 00001388 .word 0x00001388 - 8001970: fffff8ff .word 0xfffff8ff - 8001974: 08002644 .word 0x08002644 - 8001978: 20000000 .word 0x20000000 + 8001d20: 0018 movs r0, r3 + 8001d22: 46bd mov sp, r7 + 8001d24: b004 add sp, #16 + 8001d26: bd80 pop {r7, pc} + 8001d28: 40022000 .word 0x40022000 + 8001d2c: 40021000 .word 0x40021000 + 8001d30: 00001388 .word 0x00001388 + 8001d34: fffff8ff .word 0xfffff8ff + 8001d38: 08002c5c .word 0x08002c5c + 8001d3c: 20000000 .word 0x20000000 -0800197c : +08001d40 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 800197c: b590 push {r4, r7, lr} - 800197e: b08f sub sp, #60 ; 0x3c - 8001980: af00 add r7, sp, #0 + 8001d40: b590 push {r4, r7, lr} + 8001d42: b08f sub sp, #60 ; 0x3c + 8001d44: af00 add r7, sp, #0 const uint8_t aPLLMULFactorTable[16] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U, - 8001982: 2314 movs r3, #20 - 8001984: 18fb adds r3, r7, r3 - 8001986: 4a2b ldr r2, [pc, #172] ; (8001a34 ) - 8001988: ca13 ldmia r2!, {r0, r1, r4} - 800198a: c313 stmia r3!, {r0, r1, r4} - 800198c: 6812 ldr r2, [r2, #0] - 800198e: 601a str r2, [r3, #0] + 8001d46: 2314 movs r3, #20 + 8001d48: 18fb adds r3, r7, r3 + 8001d4a: 4a2b ldr r2, [pc, #172] ; (8001df8 ) + 8001d4c: ca13 ldmia r2!, {r0, r1, r4} + 8001d4e: c313 stmia r3!, {r0, r1, r4} + 8001d50: 6812 ldr r2, [r2, #0] + 8001d52: 601a str r2, [r3, #0] 10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U}; const uint8_t aPredivFactorTable[16] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U, - 8001990: 1d3b adds r3, r7, #4 - 8001992: 4a29 ldr r2, [pc, #164] ; (8001a38 ) - 8001994: ca13 ldmia r2!, {r0, r1, r4} - 8001996: c313 stmia r3!, {r0, r1, r4} - 8001998: 6812 ldr r2, [r2, #0] - 800199a: 601a str r2, [r3, #0] + 8001d54: 1d3b adds r3, r7, #4 + 8001d56: 4a29 ldr r2, [pc, #164] ; (8001dfc ) + 8001d58: ca13 ldmia r2!, {r0, r1, r4} + 8001d5a: c313 stmia r3!, {r0, r1, r4} + 8001d5c: 6812 ldr r2, [r2, #0] + 8001d5e: 601a str r2, [r3, #0] 9U,10U, 11U, 12U, 13U, 14U, 15U, 16U}; uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; - 800199c: 2300 movs r3, #0 - 800199e: 62fb str r3, [r7, #44] ; 0x2c - 80019a0: 2300 movs r3, #0 - 80019a2: 62bb str r3, [r7, #40] ; 0x28 - 80019a4: 2300 movs r3, #0 - 80019a6: 637b str r3, [r7, #52] ; 0x34 - 80019a8: 2300 movs r3, #0 - 80019aa: 627b str r3, [r7, #36] ; 0x24 + 8001d60: 2300 movs r3, #0 + 8001d62: 62fb str r3, [r7, #44] ; 0x2c + 8001d64: 2300 movs r3, #0 + 8001d66: 62bb str r3, [r7, #40] ; 0x28 + 8001d68: 2300 movs r3, #0 + 8001d6a: 637b str r3, [r7, #52] ; 0x34 + 8001d6c: 2300 movs r3, #0 + 8001d6e: 627b str r3, [r7, #36] ; 0x24 uint32_t sysclockfreq = 0U; - 80019ac: 2300 movs r3, #0 - 80019ae: 633b str r3, [r7, #48] ; 0x30 + 8001d70: 2300 movs r3, #0 + 8001d72: 633b str r3, [r7, #48] ; 0x30 tmpreg = RCC->CFGR; - 80019b0: 4b22 ldr r3, [pc, #136] ; (8001a3c ) - 80019b2: 685b ldr r3, [r3, #4] - 80019b4: 62fb str r3, [r7, #44] ; 0x2c + 8001d74: 4b22 ldr r3, [pc, #136] ; (8001e00 ) + 8001d76: 685b ldr r3, [r3, #4] + 8001d78: 62fb str r3, [r7, #44] ; 0x2c /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) - 80019b6: 6afb ldr r3, [r7, #44] ; 0x2c - 80019b8: 220c movs r2, #12 - 80019ba: 4013 ands r3, r2 - 80019bc: 2b04 cmp r3, #4 - 80019be: d002 beq.n 80019c6 - 80019c0: 2b08 cmp r3, #8 - 80019c2: d003 beq.n 80019cc - 80019c4: e02d b.n 8001a22 + 8001d7a: 6afb ldr r3, [r7, #44] ; 0x2c + 8001d7c: 220c movs r2, #12 + 8001d7e: 4013 ands r3, r2 + 8001d80: 2b04 cmp r3, #4 + 8001d82: d002 beq.n 8001d8a + 8001d84: 2b08 cmp r3, #8 + 8001d86: d003 beq.n 8001d90 + 8001d88: e02d b.n 8001de6 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; - 80019c6: 4b1e ldr r3, [pc, #120] ; (8001a40 ) - 80019c8: 633b str r3, [r7, #48] ; 0x30 + 8001d8a: 4b1e ldr r3, [pc, #120] ; (8001e04 ) + 8001d8c: 633b str r3, [r7, #48] ; 0x30 break; - 80019ca: e02d b.n 8001a28 + 8001d8e: e02d b.n 8001dec } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER]; - 80019cc: 6afb ldr r3, [r7, #44] ; 0x2c - 80019ce: 0c9b lsrs r3, r3, #18 - 80019d0: 220f movs r2, #15 - 80019d2: 4013 ands r3, r2 - 80019d4: 2214 movs r2, #20 - 80019d6: 18ba adds r2, r7, r2 - 80019d8: 5cd3 ldrb r3, [r2, r3] - 80019da: 627b str r3, [r7, #36] ; 0x24 + 8001d90: 6afb ldr r3, [r7, #44] ; 0x2c + 8001d92: 0c9b lsrs r3, r3, #18 + 8001d94: 220f movs r2, #15 + 8001d96: 4013 ands r3, r2 + 8001d98: 2214 movs r2, #20 + 8001d9a: 18ba adds r2, r7, r2 + 8001d9c: 5cd3 ldrb r3, [r2, r3] + 8001d9e: 627b str r3, [r7, #36] ; 0x24 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BITNUMBER]; - 80019dc: 4b17 ldr r3, [pc, #92] ; (8001a3c ) - 80019de: 6adb ldr r3, [r3, #44] ; 0x2c - 80019e0: 220f movs r2, #15 - 80019e2: 4013 ands r3, r2 - 80019e4: 1d3a adds r2, r7, #4 - 80019e6: 5cd3 ldrb r3, [r2, r3] - 80019e8: 62bb str r3, [r7, #40] ; 0x28 + 8001da0: 4b17 ldr r3, [pc, #92] ; (8001e00 ) + 8001da2: 6adb ldr r3, [r3, #44] ; 0x2c + 8001da4: 220f movs r2, #15 + 8001da6: 4013 ands r3, r2 + 8001da8: 1d3a adds r2, r7, #4 + 8001daa: 5cd3 ldrb r3, [r2, r3] + 8001dac: 62bb str r3, [r7, #40] ; 0x28 if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) - 80019ea: 6afa ldr r2, [r7, #44] ; 0x2c - 80019ec: 2380 movs r3, #128 ; 0x80 - 80019ee: 025b lsls r3, r3, #9 - 80019f0: 4013 ands r3, r2 - 80019f2: d009 beq.n 8001a08 + 8001dae: 6afa ldr r2, [r7, #44] ; 0x2c + 8001db0: 2380 movs r3, #128 ; 0x80 + 8001db2: 025b lsls r3, r3, #9 + 8001db4: 4013 ands r3, r2 + 8001db6: d009 beq.n 8001dcc { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); - 80019f4: 6ab9 ldr r1, [r7, #40] ; 0x28 - 80019f6: 4812 ldr r0, [pc, #72] ; (8001a40 ) - 80019f8: f7fe fb86 bl 8000108 <__udivsi3> - 80019fc: 0003 movs r3, r0 - 80019fe: 001a movs r2, r3 - 8001a00: 6a7b ldr r3, [r7, #36] ; 0x24 - 8001a02: 4353 muls r3, r2 - 8001a04: 637b str r3, [r7, #52] ; 0x34 - 8001a06: e009 b.n 8001a1c + 8001db8: 6ab9 ldr r1, [r7, #40] ; 0x28 + 8001dba: 4812 ldr r0, [pc, #72] ; (8001e04 ) + 8001dbc: f7fe f9a4 bl 8000108 <__udivsi3> + 8001dc0: 0003 movs r3, r0 + 8001dc2: 001a movs r2, r3 + 8001dc4: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001dc6: 4353 muls r3, r2 + 8001dc8: 637b str r3, [r7, #52] ; 0x34 + 8001dca: e009 b.n 8001de0 #if (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)) /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); #else /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); - 8001a08: 6a79 ldr r1, [r7, #36] ; 0x24 - 8001a0a: 000a movs r2, r1 - 8001a0c: 0152 lsls r2, r2, #5 - 8001a0e: 1a52 subs r2, r2, r1 - 8001a10: 0193 lsls r3, r2, #6 - 8001a12: 1a9b subs r3, r3, r2 - 8001a14: 00db lsls r3, r3, #3 - 8001a16: 185b adds r3, r3, r1 - 8001a18: 021b lsls r3, r3, #8 - 8001a1a: 637b str r3, [r7, #52] ; 0x34 + 8001dcc: 6a79 ldr r1, [r7, #36] ; 0x24 + 8001dce: 000a movs r2, r1 + 8001dd0: 0152 lsls r2, r2, #5 + 8001dd2: 1a52 subs r2, r2, r1 + 8001dd4: 0193 lsls r3, r2, #6 + 8001dd6: 1a9b subs r3, r3, r2 + 8001dd8: 00db lsls r3, r3, #3 + 8001dda: 185b adds r3, r3, r1 + 8001ddc: 021b lsls r3, r3, #8 + 8001dde: 637b str r3, [r7, #52] ; 0x34 #endif } sysclockfreq = pllclk; - 8001a1c: 6b7b ldr r3, [r7, #52] ; 0x34 - 8001a1e: 633b str r3, [r7, #48] ; 0x30 + 8001de0: 6b7b ldr r3, [r7, #52] ; 0x34 + 8001de2: 633b str r3, [r7, #48] ; 0x30 break; - 8001a20: e002 b.n 8001a28 + 8001de4: e002 b.n 8001dec } #endif /* RCC_CFGR_SWS_HSI48 */ case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; - 8001a22: 4b07 ldr r3, [pc, #28] ; (8001a40 ) - 8001a24: 633b str r3, [r7, #48] ; 0x30 + 8001de6: 4b07 ldr r3, [pc, #28] ; (8001e04 ) + 8001de8: 633b str r3, [r7, #48] ; 0x30 break; - 8001a26: 46c0 nop ; (mov r8, r8) + 8001dea: 46c0 nop ; (mov r8, r8) } } return sysclockfreq; - 8001a28: 6b3b ldr r3, [r7, #48] ; 0x30 + 8001dec: 6b3b ldr r3, [r7, #48] ; 0x30 } - 8001a2a: 0018 movs r0, r3 - 8001a2c: 46bd mov sp, r7 - 8001a2e: b00f add sp, #60 ; 0x3c - 8001a30: bd90 pop {r4, r7, pc} - 8001a32: 46c0 nop ; (mov r8, r8) - 8001a34: 08002624 .word 0x08002624 - 8001a38: 08002634 .word 0x08002634 - 8001a3c: 40021000 .word 0x40021000 - 8001a40: 007a1200 .word 0x007a1200 + 8001dee: 0018 movs r0, r3 + 8001df0: 46bd mov sp, r7 + 8001df2: b00f add sp, #60 ; 0x3c + 8001df4: bd90 pop {r4, r7, pc} + 8001df6: 46c0 nop ; (mov r8, r8) + 8001df8: 08002c3c .word 0x08002c3c + 8001dfc: 08002c4c .word 0x08002c4c + 8001e00: 40021000 .word 0x40021000 + 8001e04: 007a1200 .word 0x007a1200 -08001a44 : +08001e08 : */ #include "button.h" void GEI_BUTTON_CODE(struct button *bt,uint8_t in) { - 8001a44: b580 push {r7, lr} - 8001a46: b082 sub sp, #8 - 8001a48: af00 add r7, sp, #0 - 8001a4a: 6078 str r0, [r7, #4] - 8001a4c: 000a movs r2, r1 - 8001a4e: 1cfb adds r3, r7, #3 - 8001a50: 701a strb r2, [r3, #0] + 8001e08: b580 push {r7, lr} + 8001e0a: b082 sub sp, #8 + 8001e0c: af00 add r7, sp, #0 + 8001e0e: 6078 str r0, [r7, #4] + 8001e10: 000a movs r2, r1 + 8001e12: 1cfb adds r3, r7, #3 + 8001e14: 701a strb r2, [r3, #0] #define t 250 bt->code=0; - 8001a52: 687b ldr r3, [r7, #4] - 8001a54: 2200 movs r2, #0 - 8001a56: 601a str r2, [r3, #0] + 8001e16: 687b ldr r3, [r7, #4] + 8001e18: 2200 movs r2, #0 + 8001e1a: 601a str r2, [r3, #0] if(in==1) - 8001a58: 1cfb adds r3, r7, #3 - 8001a5a: 781b ldrb r3, [r3, #0] - 8001a5c: 2b01 cmp r3, #1 - 8001a5e: d138 bne.n 8001ad2 + 8001e1c: 1cfb adds r3, r7, #3 + 8001e1e: 781b ldrb r3, [r3, #0] + 8001e20: 2b01 cmp r3, #1 + 8001e22: d138 bne.n 8001e96 { if(bt->lock==0) - 8001a60: 687b ldr r3, [r7, #4] - 8001a62: 791b ldrb r3, [r3, #4] - 8001a64: 2b00 cmp r3, #0 - 8001a66: d120 bne.n 8001aaa + 8001e24: 687b ldr r3, [r7, #4] + 8001e26: 791b ldrb r3, [r3, #4] + 8001e28: 2b00 cmp r3, #0 + 8001e2a: d120 bne.n 8001e6e { if(HAL_GetTick()time+t) - 8001a68: f7fe ff02 bl 8000870 - 8001a6c: 0002 movs r2, r0 - 8001a6e: 687b ldr r3, [r7, #4] - 8001a70: 689b ldr r3, [r3, #8] - 8001a72: 33fa adds r3, #250 ; 0xfa - 8001a74: 429a cmp r2, r3 - 8001a76: d20d bcs.n 8001a94 + 8001e2c: f7fe fd20 bl 8000870 + 8001e30: 0002 movs r2, r0 + 8001e32: 687b ldr r3, [r7, #4] + 8001e34: 689b ldr r3, [r3, #8] + 8001e36: 33fa adds r3, #250 ; 0xfa + 8001e38: 429a cmp r2, r3 + 8001e3a: d20d bcs.n 8001e58 { bt->times++; - 8001a78: 687b ldr r3, [r7, #4] - 8001a7a: 68db ldr r3, [r3, #12] - 8001a7c: 1c5a adds r2, r3, #1 - 8001a7e: 687b ldr r3, [r7, #4] - 8001a80: 60da str r2, [r3, #12] + 8001e3c: 687b ldr r3, [r7, #4] + 8001e3e: 68db ldr r3, [r3, #12] + 8001e40: 1c5a adds r2, r3, #1 + 8001e42: 687b ldr r3, [r7, #4] + 8001e44: 60da str r2, [r3, #12] bt->time=HAL_GetTick(); - 8001a82: f7fe fef5 bl 8000870 - 8001a86: 0002 movs r2, r0 - 8001a88: 687b ldr r3, [r7, #4] - 8001a8a: 609a str r2, [r3, #8] + 8001e46: f7fe fd13 bl 8000870 + 8001e4a: 0002 movs r2, r0 + 8001e4c: 687b ldr r3, [r7, #4] + 8001e4e: 609a str r2, [r3, #8] bt->lock=1; - 8001a8c: 687b ldr r3, [r7, #4] - 8001a8e: 2201 movs r2, #1 - 8001a90: 711a strb r2, [r3, #4] - 8001a92: e00a b.n 8001aaa + 8001e50: 687b ldr r3, [r7, #4] + 8001e52: 2201 movs r2, #1 + 8001e54: 711a strb r2, [r3, #4] + 8001e56: e00a b.n 8001e6e }else { bt->times=1; - 8001a94: 687b ldr r3, [r7, #4] - 8001a96: 2201 movs r2, #1 - 8001a98: 60da str r2, [r3, #12] + 8001e58: 687b ldr r3, [r7, #4] + 8001e5a: 2201 movs r2, #1 + 8001e5c: 60da str r2, [r3, #12] bt->time=HAL_GetTick(); - 8001a9a: f7fe fee9 bl 8000870 - 8001a9e: 0002 movs r2, r0 - 8001aa0: 687b ldr r3, [r7, #4] - 8001aa2: 609a str r2, [r3, #8] + 8001e5e: f7fe fd07 bl 8000870 + 8001e62: 0002 movs r2, r0 + 8001e64: 687b ldr r3, [r7, #4] + 8001e66: 609a str r2, [r3, #8] bt->lock=1; - 8001aa4: 687b ldr r3, [r7, #4] - 8001aa6: 2201 movs r2, #1 - 8001aa8: 711a strb r2, [r3, #4] + 8001e68: 687b ldr r3, [r7, #4] + 8001e6a: 2201 movs r2, #1 + 8001e6c: 711a strb r2, [r3, #4] } } if(bt->lock==1) - 8001aaa: 687b ldr r3, [r7, #4] - 8001aac: 791b ldrb r3, [r3, #4] - 8001aae: 2b01 cmp r3, #1 - 8001ab0: d10f bne.n 8001ad2 + 8001e6e: 687b ldr r3, [r7, #4] + 8001e70: 791b ldrb r3, [r3, #4] + 8001e72: 2b01 cmp r3, #1 + 8001e74: d10f bne.n 8001e96 { if(HAL_GetTick()>bt->time+t) - 8001ab2: f7fe fedd bl 8000870 - 8001ab6: 0002 movs r2, r0 - 8001ab8: 687b ldr r3, [r7, #4] - 8001aba: 689b ldr r3, [r3, #8] - 8001abc: 33fa adds r3, #250 ; 0xfa - 8001abe: 429a cmp r2, r3 - 8001ac0: d907 bls.n 8001ad2 + 8001e76: f7fe fcfb bl 8000870 + 8001e7a: 0002 movs r2, r0 + 8001e7c: 687b ldr r3, [r7, #4] + 8001e7e: 689b ldr r3, [r3, #8] + 8001e80: 33fa adds r3, #250 ; 0xfa + 8001e82: 429a cmp r2, r3 + 8001e84: d907 bls.n 8001e96 { bt->code=-1; - 8001ac2: 687b ldr r3, [r7, #4] - 8001ac4: 2201 movs r2, #1 - 8001ac6: 4252 negs r2, r2 - 8001ac8: 601a str r2, [r3, #0] + 8001e86: 687b ldr r3, [r7, #4] + 8001e88: 2201 movs r2, #1 + 8001e8a: 4252 negs r2, r2 + 8001e8c: 601a str r2, [r3, #0] bt->times=-1; - 8001aca: 687b ldr r3, [r7, #4] - 8001acc: 2201 movs r2, #1 - 8001ace: 4252 negs r2, r2 - 8001ad0: 60da str r2, [r3, #12] + 8001e8e: 687b ldr r3, [r7, #4] + 8001e90: 2201 movs r2, #1 + 8001e92: 4252 negs r2, r2 + 8001e94: 60da str r2, [r3, #12] } } } if(in==0) - 8001ad2: 1cfb adds r3, r7, #3 - 8001ad4: 781b ldrb r3, [r3, #0] - 8001ad6: 2b00 cmp r3, #0 - 8001ad8: d10e bne.n 8001af8 + 8001e96: 1cfb adds r3, r7, #3 + 8001e98: 781b ldrb r3, [r3, #0] + 8001e9a: 2b00 cmp r3, #0 + 8001e9c: d10e bne.n 8001ebc { if(bt->lock==1) - 8001ada: 687b ldr r3, [r7, #4] - 8001adc: 791b ldrb r3, [r3, #4] - 8001ade: 2b01 cmp r3, #1 - 8001ae0: d10a bne.n 8001af8 + 8001e9e: 687b ldr r3, [r7, #4] + 8001ea0: 791b ldrb r3, [r3, #4] + 8001ea2: 2b01 cmp r3, #1 + 8001ea4: d10a bne.n 8001ebc { if(bt->code==-1) - 8001ae2: 687b ldr r3, [r7, #4] - 8001ae4: 681b ldr r3, [r3, #0] - 8001ae6: 3301 adds r3, #1 - 8001ae8: d003 beq.n 8001af2 + 8001ea6: 687b ldr r3, [r7, #4] + 8001ea8: 681b ldr r3, [r3, #0] + 8001eaa: 3301 adds r3, #1 + 8001eac: d003 beq.n 8001eb6 { }else { bt->code=bt->times; - 8001aea: 687b ldr r3, [r7, #4] - 8001aec: 68da ldr r2, [r3, #12] - 8001aee: 687b ldr r3, [r7, #4] - 8001af0: 601a str r2, [r3, #0] + 8001eae: 687b ldr r3, [r7, #4] + 8001eb0: 68da ldr r2, [r3, #12] + 8001eb2: 687b ldr r3, [r7, #4] + 8001eb4: 601a str r2, [r3, #0] } bt->lock=0; - 8001af2: 687b ldr r3, [r7, #4] - 8001af4: 2200 movs r2, #0 - 8001af6: 711a strb r2, [r3, #4] + 8001eb6: 687b ldr r3, [r7, #4] + 8001eb8: 2200 movs r2, #0 + 8001eba: 711a strb r2, [r3, #4] } } } - 8001af8: 46c0 nop ; (mov r8, r8) - 8001afa: 46bd mov sp, r7 - 8001afc: b002 add sp, #8 - 8001afe: bd80 pop {r7, pc} + 8001ebc: 46c0 nop ; (mov r8, r8) + 8001ebe: 46bd mov sp, r7 + 8001ec0: b002 add sp, #8 + 8001ec2: bd80 pop {r7, pc} -08001b00 : +08001ec4 : char led_n:1; char led_err:1; }dis_buff; void Send_to_595(char h,char l) { - 8001b00: b580 push {r7, lr} - 8001b02: b084 sub sp, #16 - 8001b04: af00 add r7, sp, #0 - 8001b06: 0002 movs r2, r0 - 8001b08: 1dfb adds r3, r7, #7 - 8001b0a: 701a strb r2, [r3, #0] - 8001b0c: 1dbb adds r3, r7, #6 - 8001b0e: 1c0a adds r2, r1, #0 - 8001b10: 701a strb r2, [r3, #0] + 8001ec4: b580 push {r7, lr} + 8001ec6: b084 sub sp, #16 + 8001ec8: af00 add r7, sp, #0 + 8001eca: 0002 movs r2, r0 + 8001ecc: 1dfb adds r3, r7, #7 + 8001ece: 701a strb r2, [r3, #0] + 8001ed0: 1dbb adds r3, r7, #6 + 8001ed2: 1c0a adds r2, r1, #0 + 8001ed4: 701a strb r2, [r3, #0] for(int a=0;a<8;a++) - 8001b12: 2300 movs r3, #0 - 8001b14: 60fb str r3, [r7, #12] - 8001b16: e027 b.n 8001b68 + 8001ed6: 2300 movs r3, #0 + 8001ed8: 60fb str r3, [r7, #12] + 8001eda: e027 b.n 8001f2c { if((h< + 8001edc: 1dfb adds r3, r7, #7 + 8001ede: 781a ldrb r2, [r3, #0] + 8001ee0: 68fb ldr r3, [r7, #12] + 8001ee2: 409a lsls r2, r3 + 8001ee4: 0013 movs r3, r2 + 8001ee6: 2280 movs r2, #128 ; 0x80 + 8001ee8: 4013 ands r3, r2 + 8001eea: d007 beq.n 8001efc { HC595_DCK(1); - 8001b28: 2390 movs r3, #144 ; 0x90 - 8001b2a: 05db lsls r3, r3, #23 - 8001b2c: 2201 movs r2, #1 - 8001b2e: 2108 movs r1, #8 - 8001b30: 0018 movs r0, r3 - 8001b32: f7ff fb1e bl 8001172 - 8001b36: e006 b.n 8001b46 + 8001eec: 2390 movs r3, #144 ; 0x90 + 8001eee: 05db lsls r3, r3, #23 + 8001ef0: 2201 movs r2, #1 + 8001ef2: 2108 movs r1, #8 + 8001ef4: 0018 movs r0, r3 + 8001ef6: f7ff fb1e bl 8001536 + 8001efa: e006 b.n 8001f0a }else { HC595_DCK(0); - 8001b38: 2390 movs r3, #144 ; 0x90 - 8001b3a: 05db lsls r3, r3, #23 - 8001b3c: 2200 movs r2, #0 - 8001b3e: 2108 movs r1, #8 - 8001b40: 0018 movs r0, r3 - 8001b42: f7ff fb16 bl 8001172 + 8001efc: 2390 movs r3, #144 ; 0x90 + 8001efe: 05db lsls r3, r3, #23 + 8001f00: 2200 movs r2, #0 + 8001f02: 2108 movs r1, #8 + 8001f04: 0018 movs r0, r3 + 8001f06: f7ff fb16 bl 8001536 } HC595_SCK(1); - 8001b46: 2390 movs r3, #144 ; 0x90 - 8001b48: 05db lsls r3, r3, #23 - 8001b4a: 2201 movs r2, #1 - 8001b4c: 2120 movs r1, #32 - 8001b4e: 0018 movs r0, r3 - 8001b50: f7ff fb0f bl 8001172 + 8001f0a: 2390 movs r3, #144 ; 0x90 + 8001f0c: 05db lsls r3, r3, #23 + 8001f0e: 2201 movs r2, #1 + 8001f10: 2120 movs r1, #32 + 8001f12: 0018 movs r0, r3 + 8001f14: f7ff fb0f bl 8001536 HC595_SCK(0); - 8001b54: 2390 movs r3, #144 ; 0x90 - 8001b56: 05db lsls r3, r3, #23 - 8001b58: 2200 movs r2, #0 - 8001b5a: 2120 movs r1, #32 - 8001b5c: 0018 movs r0, r3 - 8001b5e: f7ff fb08 bl 8001172 + 8001f18: 2390 movs r3, #144 ; 0x90 + 8001f1a: 05db lsls r3, r3, #23 + 8001f1c: 2200 movs r2, #0 + 8001f1e: 2120 movs r1, #32 + 8001f20: 0018 movs r0, r3 + 8001f22: f7ff fb08 bl 8001536 for(int a=0;a<8;a++) - 8001b62: 68fb ldr r3, [r7, #12] - 8001b64: 3301 adds r3, #1 - 8001b66: 60fb str r3, [r7, #12] - 8001b68: 68fb ldr r3, [r7, #12] - 8001b6a: 2b07 cmp r3, #7 - 8001b6c: ddd4 ble.n 8001b18 + 8001f26: 68fb ldr r3, [r7, #12] + 8001f28: 3301 adds r3, #1 + 8001f2a: 60fb str r3, [r7, #12] + 8001f2c: 68fb ldr r3, [r7, #12] + 8001f2e: 2b07 cmp r3, #7 + 8001f30: ddd4 ble.n 8001edc } for(int a=0;a<8;a++) - 8001b6e: 2300 movs r3, #0 - 8001b70: 60bb str r3, [r7, #8] - 8001b72: e027 b.n 8001bc4 + 8001f32: 2300 movs r3, #0 + 8001f34: 60bb str r3, [r7, #8] + 8001f36: e027 b.n 8001f88 { if((l< + 8001f38: 1dbb adds r3, r7, #6 + 8001f3a: 781a ldrb r2, [r3, #0] + 8001f3c: 68bb ldr r3, [r7, #8] + 8001f3e: 409a lsls r2, r3 + 8001f40: 0013 movs r3, r2 + 8001f42: 2280 movs r2, #128 ; 0x80 + 8001f44: 4013 ands r3, r2 + 8001f46: d007 beq.n 8001f58 { HC595_DCK(1); - 8001b84: 2390 movs r3, #144 ; 0x90 - 8001b86: 05db lsls r3, r3, #23 - 8001b88: 2201 movs r2, #1 - 8001b8a: 2108 movs r1, #8 - 8001b8c: 0018 movs r0, r3 - 8001b8e: f7ff faf0 bl 8001172 - 8001b92: e006 b.n 8001ba2 + 8001f48: 2390 movs r3, #144 ; 0x90 + 8001f4a: 05db lsls r3, r3, #23 + 8001f4c: 2201 movs r2, #1 + 8001f4e: 2108 movs r1, #8 + 8001f50: 0018 movs r0, r3 + 8001f52: f7ff faf0 bl 8001536 + 8001f56: e006 b.n 8001f66 }else { HC595_DCK(0); - 8001b94: 2390 movs r3, #144 ; 0x90 - 8001b96: 05db lsls r3, r3, #23 - 8001b98: 2200 movs r2, #0 - 8001b9a: 2108 movs r1, #8 - 8001b9c: 0018 movs r0, r3 - 8001b9e: f7ff fae8 bl 8001172 + 8001f58: 2390 movs r3, #144 ; 0x90 + 8001f5a: 05db lsls r3, r3, #23 + 8001f5c: 2200 movs r2, #0 + 8001f5e: 2108 movs r1, #8 + 8001f60: 0018 movs r0, r3 + 8001f62: f7ff fae8 bl 8001536 } HC595_SCK(1); - 8001ba2: 2390 movs r3, #144 ; 0x90 - 8001ba4: 05db lsls r3, r3, #23 - 8001ba6: 2201 movs r2, #1 - 8001ba8: 2120 movs r1, #32 - 8001baa: 0018 movs r0, r3 - 8001bac: f7ff fae1 bl 8001172 + 8001f66: 2390 movs r3, #144 ; 0x90 + 8001f68: 05db lsls r3, r3, #23 + 8001f6a: 2201 movs r2, #1 + 8001f6c: 2120 movs r1, #32 + 8001f6e: 0018 movs r0, r3 + 8001f70: f7ff fae1 bl 8001536 HC595_SCK(0); - 8001bb0: 2390 movs r3, #144 ; 0x90 - 8001bb2: 05db lsls r3, r3, #23 - 8001bb4: 2200 movs r2, #0 - 8001bb6: 2120 movs r1, #32 - 8001bb8: 0018 movs r0, r3 - 8001bba: f7ff fada bl 8001172 + 8001f74: 2390 movs r3, #144 ; 0x90 + 8001f76: 05db lsls r3, r3, #23 + 8001f78: 2200 movs r2, #0 + 8001f7a: 2120 movs r1, #32 + 8001f7c: 0018 movs r0, r3 + 8001f7e: f7ff fada bl 8001536 for(int a=0;a<8;a++) - 8001bbe: 68bb ldr r3, [r7, #8] - 8001bc0: 3301 adds r3, #1 - 8001bc2: 60bb str r3, [r7, #8] - 8001bc4: 68bb ldr r3, [r7, #8] - 8001bc6: 2b07 cmp r3, #7 - 8001bc8: ddd4 ble.n 8001b74 + 8001f82: 68bb ldr r3, [r7, #8] + 8001f84: 3301 adds r3, #1 + 8001f86: 60bb str r3, [r7, #8] + 8001f88: 68bb ldr r3, [r7, #8] + 8001f8a: 2b07 cmp r3, #7 + 8001f8c: ddd4 ble.n 8001f38 } HC595_RCK(1); - 8001bca: 2390 movs r3, #144 ; 0x90 - 8001bcc: 05db lsls r3, r3, #23 - 8001bce: 2201 movs r2, #1 - 8001bd0: 2110 movs r1, #16 - 8001bd2: 0018 movs r0, r3 - 8001bd4: f7ff facd bl 8001172 + 8001f8e: 2390 movs r3, #144 ; 0x90 + 8001f90: 05db lsls r3, r3, #23 + 8001f92: 2201 movs r2, #1 + 8001f94: 2110 movs r1, #16 + 8001f96: 0018 movs r0, r3 + 8001f98: f7ff facd bl 8001536 HC595_RCK(0); - 8001bd8: 2390 movs r3, #144 ; 0x90 - 8001bda: 05db lsls r3, r3, #23 - 8001bdc: 2200 movs r2, #0 - 8001bde: 2110 movs r1, #16 - 8001be0: 0018 movs r0, r3 - 8001be2: f7ff fac6 bl 8001172 + 8001f9c: 2390 movs r3, #144 ; 0x90 + 8001f9e: 05db lsls r3, r3, #23 + 8001fa0: 2200 movs r2, #0 + 8001fa2: 2110 movs r1, #16 + 8001fa4: 0018 movs r0, r3 + 8001fa6: f7ff fac6 bl 8001536 } - 8001be6: 46c0 nop ; (mov r8, r8) - 8001be8: 46bd mov sp, r7 - 8001bea: b004 add sp, #16 - 8001bec: bd80 pop {r7, pc} + 8001faa: 46c0 nop ; (mov r8, r8) + 8001fac: 46bd mov sp, r7 + 8001fae: b004 add sp, #16 + 8001fb0: bd80 pop {r7, pc} ... -08001bf0 : +08001fb4 : void display() { - 8001bf0: b580 push {r7, lr} - 8001bf2: b082 sub sp, #8 - 8001bf4: af00 add r7, sp, #0 + 8001fb4: b580 push {r7, lr} + 8001fb6: b082 sub sp, #8 + 8001fb8: af00 add r7, sp, #0 char h_buff=0,l_buff=0; - 8001bf6: 1dfb adds r3, r7, #7 - 8001bf8: 2200 movs r2, #0 - 8001bfa: 701a strb r2, [r3, #0] - 8001bfc: 1dbb adds r3, r7, #6 - 8001bfe: 2200 movs r2, #0 - 8001c00: 701a strb r2, [r3, #0] + 8001fba: 1dfb adds r3, r7, #7 + 8001fbc: 2200 movs r2, #0 + 8001fbe: 701a strb r2, [r3, #0] + 8001fc0: 1dbb adds r3, r7, #6 + 8001fc2: 2200 movs r2, #0 + 8001fc4: 701a strb r2, [r3, #0] h_buff=0,l_buff=0; - 8001c02: 1dfb adds r3, r7, #7 - 8001c04: 2200 movs r2, #0 - 8001c06: 701a strb r2, [r3, #0] - 8001c08: 1dbb adds r3, r7, #6 - 8001c0a: 2200 movs r2, #0 - 8001c0c: 701a strb r2, [r3, #0] + 8001fc6: 1dfb adds r3, r7, #7 + 8001fc8: 2200 movs r2, #0 + 8001fca: 701a strb r2, [r3, #0] + 8001fcc: 1dbb adds r3, r7, #6 + 8001fce: 2200 movs r2, #0 + 8001fd0: 701a strb r2, [r3, #0] Send_to_595(h_buff,l_buff); - 8001c0e: 1dbb adds r3, r7, #6 - 8001c10: 781a ldrb r2, [r3, #0] - 8001c12: 1dfb adds r3, r7, #7 - 8001c14: 781b ldrb r3, [r3, #0] - 8001c16: 0011 movs r1, r2 - 8001c18: 0018 movs r0, r3 - 8001c1a: f7ff ff71 bl 8001b00 + 8001fd2: 1dbb adds r3, r7, #6 + 8001fd4: 781a ldrb r2, [r3, #0] + 8001fd6: 1dfb adds r3, r7, #7 + 8001fd8: 781b ldrb r3, [r3, #0] + 8001fda: 0011 movs r1, r2 + 8001fdc: 0018 movs r0, r3 + 8001fde: f7ff ff71 bl 8001ec4 h_buff=~0x01; - 8001c1e: 1dfb adds r3, r7, #7 - 8001c20: 22fe movs r2, #254 ; 0xfe - 8001c22: 701a strb r2, [r3, #0] + 8001fe2: 1dfb adds r3, r7, #7 + 8001fe4: 22fe movs r2, #254 ; 0xfe + 8001fe6: 701a strb r2, [r3, #0] l_buff=dis_buff.d_num[0]>=10?0:d_num_data[0][dis_buff.d_num[0]]; - 8001c24: 4b7b ldr r3, [pc, #492] ; (8001e14 ) - 8001c26: 781b ldrb r3, [r3, #0] - 8001c28: 2b09 cmp r3, #9 - 8001c2a: d805 bhi.n 8001c38 - 8001c2c: 4b79 ldr r3, [pc, #484] ; (8001e14 ) - 8001c2e: 781b ldrb r3, [r3, #0] - 8001c30: 001a movs r2, r3 - 8001c32: 4b79 ldr r3, [pc, #484] ; (8001e18 ) - 8001c34: 5c9a ldrb r2, [r3, r2] - 8001c36: e000 b.n 8001c3a - 8001c38: 2200 movs r2, #0 - 8001c3a: 1dbb adds r3, r7, #6 - 8001c3c: 701a strb r2, [r3, #0] + 8001fe8: 4b7b ldr r3, [pc, #492] ; (80021d8 ) + 8001fea: 781b ldrb r3, [r3, #0] + 8001fec: 2b09 cmp r3, #9 + 8001fee: d805 bhi.n 8001ffc + 8001ff0: 4b79 ldr r3, [pc, #484] ; (80021d8 ) + 8001ff2: 781b ldrb r3, [r3, #0] + 8001ff4: 001a movs r2, r3 + 8001ff6: 4b79 ldr r3, [pc, #484] ; (80021dc ) + 8001ff8: 5c9a ldrb r2, [r3, r2] + 8001ffa: e000 b.n 8001ffe + 8001ffc: 2200 movs r2, #0 + 8001ffe: 1dbb adds r3, r7, #6 + 8002000: 701a strb r2, [r3, #0] if(dis_buff.dot1==1) - 8001c3e: 4b75 ldr r3, [pc, #468] ; (8001e14 ) - 8001c40: 791b ldrb r3, [r3, #4] - 8001c42: 2201 movs r2, #1 - 8001c44: 4013 ands r3, r2 - 8001c46: b2db uxtb r3, r3 - 8001c48: 2b00 cmp r3, #0 - 8001c4a: d006 beq.n 8001c5a + 8002002: 4b75 ldr r3, [pc, #468] ; (80021d8 ) + 8002004: 791b ldrb r3, [r3, #4] + 8002006: 2201 movs r2, #1 + 8002008: 4013 ands r3, r2 + 800200a: b2db uxtb r3, r3 + 800200c: 2b00 cmp r3, #0 + 800200e: d006 beq.n 800201e { l_buff|=0x80; - 8001c4c: 1dbb adds r3, r7, #6 - 8001c4e: 1dba adds r2, r7, #6 - 8001c50: 7812 ldrb r2, [r2, #0] - 8001c52: 2180 movs r1, #128 ; 0x80 - 8001c54: 4249 negs r1, r1 - 8001c56: 430a orrs r2, r1 - 8001c58: 701a strb r2, [r3, #0] + 8002010: 1dbb adds r3, r7, #6 + 8002012: 1dba adds r2, r7, #6 + 8002014: 7812 ldrb r2, [r2, #0] + 8002016: 2180 movs r1, #128 ; 0x80 + 8002018: 4249 negs r1, r1 + 800201a: 430a orrs r2, r1 + 800201c: 701a strb r2, [r3, #0] } Send_to_595(h_buff,l_buff); - 8001c5a: 1dbb adds r3, r7, #6 - 8001c5c: 781a ldrb r2, [r3, #0] - 8001c5e: 1dfb adds r3, r7, #7 - 8001c60: 781b ldrb r3, [r3, #0] - 8001c62: 0011 movs r1, r2 - 8001c64: 0018 movs r0, r3 - 8001c66: f7ff ff4b bl 8001b00 + 800201e: 1dbb adds r3, r7, #6 + 8002020: 781a ldrb r2, [r3, #0] + 8002022: 1dfb adds r3, r7, #7 + 8002024: 781b ldrb r3, [r3, #0] + 8002026: 0011 movs r1, r2 + 8002028: 0018 movs r0, r3 + 800202a: f7ff ff4b bl 8001ec4 h_buff=0,l_buff=0; - 8001c6a: 1dfb adds r3, r7, #7 - 8001c6c: 2200 movs r2, #0 - 8001c6e: 701a strb r2, [r3, #0] - 8001c70: 1dbb adds r3, r7, #6 - 8001c72: 2200 movs r2, #0 - 8001c74: 701a strb r2, [r3, #0] + 800202e: 1dfb adds r3, r7, #7 + 8002030: 2200 movs r2, #0 + 8002032: 701a strb r2, [r3, #0] + 8002034: 1dbb adds r3, r7, #6 + 8002036: 2200 movs r2, #0 + 8002038: 701a strb r2, [r3, #0] Send_to_595(h_buff,l_buff); - 8001c76: 1dbb adds r3, r7, #6 - 8001c78: 781a ldrb r2, [r3, #0] - 8001c7a: 1dfb adds r3, r7, #7 - 8001c7c: 781b ldrb r3, [r3, #0] - 8001c7e: 0011 movs r1, r2 - 8001c80: 0018 movs r0, r3 - 8001c82: f7ff ff3d bl 8001b00 + 800203a: 1dbb adds r3, r7, #6 + 800203c: 781a ldrb r2, [r3, #0] + 800203e: 1dfb adds r3, r7, #7 + 8002040: 781b ldrb r3, [r3, #0] + 8002042: 0011 movs r1, r2 + 8002044: 0018 movs r0, r3 + 8002046: f7ff ff3d bl 8001ec4 h_buff=~0x80; - 8001c86: 1dfb adds r3, r7, #7 - 8001c88: 227f movs r2, #127 ; 0x7f - 8001c8a: 701a strb r2, [r3, #0] + 800204a: 1dfb adds r3, r7, #7 + 800204c: 227f movs r2, #127 ; 0x7f + 800204e: 701a strb r2, [r3, #0] l_buff=dis_buff.d_num[1]>=10?0:d_num_data[1][dis_buff.d_num[1]]; - 8001c8c: 4b61 ldr r3, [pc, #388] ; (8001e14 ) - 8001c8e: 785b ldrb r3, [r3, #1] - 8001c90: 2b09 cmp r3, #9 - 8001c92: d806 bhi.n 8001ca2 - 8001c94: 4b5f ldr r3, [pc, #380] ; (8001e14 ) - 8001c96: 785b ldrb r3, [r3, #1] - 8001c98: 001a movs r2, r3 - 8001c9a: 4b5f ldr r3, [pc, #380] ; (8001e18 ) - 8001c9c: 189b adds r3, r3, r2 - 8001c9e: 7a9a ldrb r2, [r3, #10] - 8001ca0: e000 b.n 8001ca4 - 8001ca2: 2200 movs r2, #0 - 8001ca4: 1dbb adds r3, r7, #6 - 8001ca6: 701a strb r2, [r3, #0] + 8002050: 4b61 ldr r3, [pc, #388] ; (80021d8 ) + 8002052: 785b ldrb r3, [r3, #1] + 8002054: 2b09 cmp r3, #9 + 8002056: d806 bhi.n 8002066 + 8002058: 4b5f ldr r3, [pc, #380] ; (80021d8 ) + 800205a: 785b ldrb r3, [r3, #1] + 800205c: 001a movs r2, r3 + 800205e: 4b5f ldr r3, [pc, #380] ; (80021dc ) + 8002060: 189b adds r3, r3, r2 + 8002062: 7a9a ldrb r2, [r3, #10] + 8002064: e000 b.n 8002068 + 8002066: 2200 movs r2, #0 + 8002068: 1dbb adds r3, r7, #6 + 800206a: 701a strb r2, [r3, #0] if(dis_buff.dot2==1) - 8001ca8: 4b5a ldr r3, [pc, #360] ; (8001e14 ) - 8001caa: 791b ldrb r3, [r3, #4] - 8001cac: 2202 movs r2, #2 - 8001cae: 4013 ands r3, r2 - 8001cb0: b2db uxtb r3, r3 - 8001cb2: 2b00 cmp r3, #0 - 8001cb4: d005 beq.n 8001cc2 + 800206c: 4b5a ldr r3, [pc, #360] ; (80021d8 ) + 800206e: 791b ldrb r3, [r3, #4] + 8002070: 2202 movs r2, #2 + 8002072: 4013 ands r3, r2 + 8002074: b2db uxtb r3, r3 + 8002076: 2b00 cmp r3, #0 + 8002078: d005 beq.n 8002086 { l_buff|=0x10; - 8001cb6: 1dbb adds r3, r7, #6 - 8001cb8: 1dba adds r2, r7, #6 - 8001cba: 7812 ldrb r2, [r2, #0] - 8001cbc: 2110 movs r1, #16 - 8001cbe: 430a orrs r2, r1 - 8001cc0: 701a strb r2, [r3, #0] + 800207a: 1dbb adds r3, r7, #6 + 800207c: 1dba adds r2, r7, #6 + 800207e: 7812 ldrb r2, [r2, #0] + 8002080: 2110 movs r1, #16 + 8002082: 430a orrs r2, r1 + 8002084: 701a strb r2, [r3, #0] } Send_to_595(h_buff,l_buff); - 8001cc2: 1dbb adds r3, r7, #6 - 8001cc4: 781a ldrb r2, [r3, #0] - 8001cc6: 1dfb adds r3, r7, #7 - 8001cc8: 781b ldrb r3, [r3, #0] - 8001cca: 0011 movs r1, r2 - 8001ccc: 0018 movs r0, r3 - 8001cce: f7ff ff17 bl 8001b00 + 8002086: 1dbb adds r3, r7, #6 + 8002088: 781a ldrb r2, [r3, #0] + 800208a: 1dfb adds r3, r7, #7 + 800208c: 781b ldrb r3, [r3, #0] + 800208e: 0011 movs r1, r2 + 8002090: 0018 movs r0, r3 + 8002092: f7ff ff17 bl 8001ec4 h_buff=0,l_buff=0; - 8001cd2: 1dfb adds r3, r7, #7 - 8001cd4: 2200 movs r2, #0 - 8001cd6: 701a strb r2, [r3, #0] - 8001cd8: 1dbb adds r3, r7, #6 - 8001cda: 2200 movs r2, #0 - 8001cdc: 701a strb r2, [r3, #0] + 8002096: 1dfb adds r3, r7, #7 + 8002098: 2200 movs r2, #0 + 800209a: 701a strb r2, [r3, #0] + 800209c: 1dbb adds r3, r7, #6 + 800209e: 2200 movs r2, #0 + 80020a0: 701a strb r2, [r3, #0] Send_to_595(h_buff,l_buff); - 8001cde: 1dbb adds r3, r7, #6 - 8001ce0: 781a ldrb r2, [r3, #0] - 8001ce2: 1dfb adds r3, r7, #7 - 8001ce4: 781b ldrb r3, [r3, #0] - 8001ce6: 0011 movs r1, r2 - 8001ce8: 0018 movs r0, r3 - 8001cea: f7ff ff09 bl 8001b00 + 80020a2: 1dbb adds r3, r7, #6 + 80020a4: 781a ldrb r2, [r3, #0] + 80020a6: 1dfb adds r3, r7, #7 + 80020a8: 781b ldrb r3, [r3, #0] + 80020aa: 0011 movs r1, r2 + 80020ac: 0018 movs r0, r3 + 80020ae: f7ff ff09 bl 8001ec4 h_buff=~0x40; - 8001cee: 1dfb adds r3, r7, #7 - 8001cf0: 22bf movs r2, #191 ; 0xbf - 8001cf2: 701a strb r2, [r3, #0] + 80020b2: 1dfb adds r3, r7, #7 + 80020b4: 22bf movs r2, #191 ; 0xbf + 80020b6: 701a strb r2, [r3, #0] l_buff=dis_buff.d_num[2]>=10?0:d_num_data[0][dis_buff.d_num[2]]; - 8001cf4: 4b47 ldr r3, [pc, #284] ; (8001e14 ) - 8001cf6: 789b ldrb r3, [r3, #2] - 8001cf8: 2b09 cmp r3, #9 - 8001cfa: d805 bhi.n 8001d08 - 8001cfc: 4b45 ldr r3, [pc, #276] ; (8001e14 ) - 8001cfe: 789b ldrb r3, [r3, #2] - 8001d00: 001a movs r2, r3 - 8001d02: 4b45 ldr r3, [pc, #276] ; (8001e18 ) - 8001d04: 5c9a ldrb r2, [r3, r2] - 8001d06: e000 b.n 8001d0a - 8001d08: 2200 movs r2, #0 - 8001d0a: 1dbb adds r3, r7, #6 - 8001d0c: 701a strb r2, [r3, #0] + 80020b8: 4b47 ldr r3, [pc, #284] ; (80021d8 ) + 80020ba: 789b ldrb r3, [r3, #2] + 80020bc: 2b09 cmp r3, #9 + 80020be: d805 bhi.n 80020cc + 80020c0: 4b45 ldr r3, [pc, #276] ; (80021d8 ) + 80020c2: 789b ldrb r3, [r3, #2] + 80020c4: 001a movs r2, r3 + 80020c6: 4b45 ldr r3, [pc, #276] ; (80021dc ) + 80020c8: 5c9a ldrb r2, [r3, r2] + 80020ca: e000 b.n 80020ce + 80020cc: 2200 movs r2, #0 + 80020ce: 1dbb adds r3, r7, #6 + 80020d0: 701a strb r2, [r3, #0] if(dis_buff.dot3==1) - 8001d0e: 4b41 ldr r3, [pc, #260] ; (8001e14 ) - 8001d10: 791b ldrb r3, [r3, #4] - 8001d12: 2204 movs r2, #4 - 8001d14: 4013 ands r3, r2 - 8001d16: b2db uxtb r3, r3 - 8001d18: 2b00 cmp r3, #0 - 8001d1a: d006 beq.n 8001d2a + 80020d2: 4b41 ldr r3, [pc, #260] ; (80021d8 ) + 80020d4: 791b ldrb r3, [r3, #4] + 80020d6: 2204 movs r2, #4 + 80020d8: 4013 ands r3, r2 + 80020da: b2db uxtb r3, r3 + 80020dc: 2b00 cmp r3, #0 + 80020de: d006 beq.n 80020ee { l_buff|=0x80; - 8001d1c: 1dbb adds r3, r7, #6 - 8001d1e: 1dba adds r2, r7, #6 - 8001d20: 7812 ldrb r2, [r2, #0] - 8001d22: 2180 movs r1, #128 ; 0x80 - 8001d24: 4249 negs r1, r1 - 8001d26: 430a orrs r2, r1 - 8001d28: 701a strb r2, [r3, #0] + 80020e0: 1dbb adds r3, r7, #6 + 80020e2: 1dba adds r2, r7, #6 + 80020e4: 7812 ldrb r2, [r2, #0] + 80020e6: 2180 movs r1, #128 ; 0x80 + 80020e8: 4249 negs r1, r1 + 80020ea: 430a orrs r2, r1 + 80020ec: 701a strb r2, [r3, #0] } Send_to_595(h_buff,l_buff); - 8001d2a: 1dbb adds r3, r7, #6 - 8001d2c: 781a ldrb r2, [r3, #0] - 8001d2e: 1dfb adds r3, r7, #7 - 8001d30: 781b ldrb r3, [r3, #0] - 8001d32: 0011 movs r1, r2 - 8001d34: 0018 movs r0, r3 - 8001d36: f7ff fee3 bl 8001b00 + 80020ee: 1dbb adds r3, r7, #6 + 80020f0: 781a ldrb r2, [r3, #0] + 80020f2: 1dfb adds r3, r7, #7 + 80020f4: 781b ldrb r3, [r3, #0] + 80020f6: 0011 movs r1, r2 + 80020f8: 0018 movs r0, r3 + 80020fa: f7ff fee3 bl 8001ec4 h_buff=0,l_buff=0; - 8001d3a: 1dfb adds r3, r7, #7 - 8001d3c: 2200 movs r2, #0 - 8001d3e: 701a strb r2, [r3, #0] - 8001d40: 1dbb adds r3, r7, #6 - 8001d42: 2200 movs r2, #0 - 8001d44: 701a strb r2, [r3, #0] + 80020fe: 1dfb adds r3, r7, #7 + 8002100: 2200 movs r2, #0 + 8002102: 701a strb r2, [r3, #0] + 8002104: 1dbb adds r3, r7, #6 + 8002106: 2200 movs r2, #0 + 8002108: 701a strb r2, [r3, #0] Send_to_595(h_buff,l_buff); - 8001d46: 1dbb adds r3, r7, #6 - 8001d48: 781a ldrb r2, [r3, #0] - 8001d4a: 1dfb adds r3, r7, #7 - 8001d4c: 781b ldrb r3, [r3, #0] - 8001d4e: 0011 movs r1, r2 - 8001d50: 0018 movs r0, r3 - 8001d52: f7ff fed5 bl 8001b00 + 800210a: 1dbb adds r3, r7, #6 + 800210c: 781a ldrb r2, [r3, #0] + 800210e: 1dfb adds r3, r7, #7 + 8002110: 781b ldrb r3, [r3, #0] + 8002112: 0011 movs r1, r2 + 8002114: 0018 movs r0, r3 + 8002116: f7ff fed5 bl 8001ec4 h_buff=0xC1; - 8001d56: 1dfb adds r3, r7, #7 - 8001d58: 22c1 movs r2, #193 ; 0xc1 - 8001d5a: 701a strb r2, [r3, #0] + 800211a: 1dfb adds r3, r7, #7 + 800211c: 22c1 movs r2, #193 ; 0xc1 + 800211e: 701a strb r2, [r3, #0] l_buff=dis_buff.d_num[3]>=10?0:d_num_data[1][dis_buff.d_num[3]]; - 8001d5c: 4b2d ldr r3, [pc, #180] ; (8001e14 ) - 8001d5e: 78db ldrb r3, [r3, #3] - 8001d60: 2b09 cmp r3, #9 - 8001d62: d806 bhi.n 8001d72 - 8001d64: 4b2b ldr r3, [pc, #172] ; (8001e14 ) - 8001d66: 78db ldrb r3, [r3, #3] - 8001d68: 001a movs r2, r3 - 8001d6a: 4b2b ldr r3, [pc, #172] ; (8001e18 ) - 8001d6c: 189b adds r3, r3, r2 - 8001d6e: 7a9a ldrb r2, [r3, #10] - 8001d70: e000 b.n 8001d74 - 8001d72: 2200 movs r2, #0 - 8001d74: 1dbb adds r3, r7, #6 - 8001d76: 701a strb r2, [r3, #0] + 8002120: 4b2d ldr r3, [pc, #180] ; (80021d8 ) + 8002122: 78db ldrb r3, [r3, #3] + 8002124: 2b09 cmp r3, #9 + 8002126: d806 bhi.n 8002136 + 8002128: 4b2b ldr r3, [pc, #172] ; (80021d8 ) + 800212a: 78db ldrb r3, [r3, #3] + 800212c: 001a movs r2, r3 + 800212e: 4b2b ldr r3, [pc, #172] ; (80021dc ) + 8002130: 189b adds r3, r3, r2 + 8002132: 7a9a ldrb r2, [r3, #10] + 8002134: e000 b.n 8002138 + 8002136: 2200 movs r2, #0 + 8002138: 1dbb adds r3, r7, #6 + 800213a: 701a strb r2, [r3, #0] if(dis_buff.dot4==1) - 8001d78: 4b26 ldr r3, [pc, #152] ; (8001e14 ) - 8001d7a: 791b ldrb r3, [r3, #4] - 8001d7c: 2208 movs r2, #8 - 8001d7e: 4013 ands r3, r2 - 8001d80: b2db uxtb r3, r3 - 8001d82: 2b00 cmp r3, #0 - 8001d84: d005 beq.n 8001d92 + 800213c: 4b26 ldr r3, [pc, #152] ; (80021d8 ) + 800213e: 791b ldrb r3, [r3, #4] + 8002140: 2208 movs r2, #8 + 8002142: 4013 ands r3, r2 + 8002144: b2db uxtb r3, r3 + 8002146: 2b00 cmp r3, #0 + 8002148: d005 beq.n 8002156 { l_buff|=0x10; - 8001d86: 1dbb adds r3, r7, #6 - 8001d88: 1dba adds r2, r7, #6 - 8001d8a: 7812 ldrb r2, [r2, #0] - 8001d8c: 2110 movs r1, #16 - 8001d8e: 430a orrs r2, r1 - 8001d90: 701a strb r2, [r3, #0] + 800214a: 1dbb adds r3, r7, #6 + 800214c: 1dba adds r2, r7, #6 + 800214e: 7812 ldrb r2, [r2, #0] + 8002150: 2110 movs r1, #16 + 8002152: 430a orrs r2, r1 + 8002154: 701a strb r2, [r3, #0] } if(dis_buff.led_run==1) - 8001d92: 4b20 ldr r3, [pc, #128] ; (8001e14 ) - 8001d94: 791b ldrb r3, [r3, #4] - 8001d96: 2210 movs r2, #16 - 8001d98: 4013 ands r3, r2 - 8001d9a: b2db uxtb r3, r3 - 8001d9c: 2b00 cmp r3, #0 - 8001d9e: d005 beq.n 8001dac + 8002156: 4b20 ldr r3, [pc, #128] ; (80021d8 ) + 8002158: 791b ldrb r3, [r3, #4] + 800215a: 2210 movs r2, #16 + 800215c: 4013 ands r3, r2 + 800215e: b2db uxtb r3, r3 + 8002160: 2b00 cmp r3, #0 + 8002162: d005 beq.n 8002170 { h_buff|=0x10; - 8001da0: 1dfb adds r3, r7, #7 - 8001da2: 1dfa adds r2, r7, #7 - 8001da4: 7812 ldrb r2, [r2, #0] - 8001da6: 2110 movs r1, #16 - 8001da8: 430a orrs r2, r1 - 8001daa: 701a strb r2, [r3, #0] + 8002164: 1dfb adds r3, r7, #7 + 8002166: 1dfa adds r2, r7, #7 + 8002168: 7812 ldrb r2, [r2, #0] + 800216a: 2110 movs r1, #16 + 800216c: 430a orrs r2, r1 + 800216e: 701a strb r2, [r3, #0] } if(dis_buff.led_err==1) - 8001dac: 4b19 ldr r3, [pc, #100] ; (8001e14 ) - 8001dae: 791b ldrb r3, [r3, #4] - 8001db0: 227f movs r2, #127 ; 0x7f - 8001db2: 4393 bics r3, r2 - 8001db4: b2db uxtb r3, r3 - 8001db6: 2b00 cmp r3, #0 - 8001db8: d005 beq.n 8001dc6 + 8002170: 4b19 ldr r3, [pc, #100] ; (80021d8 ) + 8002172: 791b ldrb r3, [r3, #4] + 8002174: 227f movs r2, #127 ; 0x7f + 8002176: 4393 bics r3, r2 + 8002178: b2db uxtb r3, r3 + 800217a: 2b00 cmp r3, #0 + 800217c: d005 beq.n 800218a { h_buff|=0x08; - 8001dba: 1dfb adds r3, r7, #7 - 8001dbc: 1dfa adds r2, r7, #7 - 8001dbe: 7812 ldrb r2, [r2, #0] - 8001dc0: 2108 movs r1, #8 - 8001dc2: 430a orrs r2, r1 - 8001dc4: 701a strb r2, [r3, #0] + 800217e: 1dfb adds r3, r7, #7 + 8002180: 1dfa adds r2, r7, #7 + 8002182: 7812 ldrb r2, [r2, #0] + 8002184: 2108 movs r1, #8 + 8002186: 430a orrs r2, r1 + 8002188: 701a strb r2, [r3, #0] } if(dis_buff.led_n==1) - 8001dc6: 4b13 ldr r3, [pc, #76] ; (8001e14 ) - 8001dc8: 791b ldrb r3, [r3, #4] - 8001dca: 2240 movs r2, #64 ; 0x40 - 8001dcc: 4013 ands r3, r2 - 8001dce: b2db uxtb r3, r3 - 8001dd0: 2b00 cmp r3, #0 - 8001dd2: d005 beq.n 8001de0 + 800218a: 4b13 ldr r3, [pc, #76] ; (80021d8 ) + 800218c: 791b ldrb r3, [r3, #4] + 800218e: 2240 movs r2, #64 ; 0x40 + 8002190: 4013 ands r3, r2 + 8002192: b2db uxtb r3, r3 + 8002194: 2b00 cmp r3, #0 + 8002196: d005 beq.n 80021a4 { h_buff|=0x04; - 8001dd4: 1dfb adds r3, r7, #7 - 8001dd6: 1dfa adds r2, r7, #7 - 8001dd8: 7812 ldrb r2, [r2, #0] - 8001dda: 2104 movs r1, #4 - 8001ddc: 430a orrs r2, r1 - 8001dde: 701a strb r2, [r3, #0] + 8002198: 1dfb adds r3, r7, #7 + 800219a: 1dfa adds r2, r7, #7 + 800219c: 7812 ldrb r2, [r2, #0] + 800219e: 2104 movs r1, #4 + 80021a0: 430a orrs r2, r1 + 80021a2: 701a strb r2, [r3, #0] } if(dis_buff.led_p==1) - 8001de0: 4b0c ldr r3, [pc, #48] ; (8001e14 ) - 8001de2: 791b ldrb r3, [r3, #4] - 8001de4: 2220 movs r2, #32 - 8001de6: 4013 ands r3, r2 - 8001de8: b2db uxtb r3, r3 - 8001dea: 2b00 cmp r3, #0 - 8001dec: d005 beq.n 8001dfa + 80021a4: 4b0c ldr r3, [pc, #48] ; (80021d8 ) + 80021a6: 791b ldrb r3, [r3, #4] + 80021a8: 2220 movs r2, #32 + 80021aa: 4013 ands r3, r2 + 80021ac: b2db uxtb r3, r3 + 80021ae: 2b00 cmp r3, #0 + 80021b0: d005 beq.n 80021be { h_buff|=0x02; - 8001dee: 1dfb adds r3, r7, #7 - 8001df0: 1dfa adds r2, r7, #7 - 8001df2: 7812 ldrb r2, [r2, #0] - 8001df4: 2102 movs r1, #2 - 8001df6: 430a orrs r2, r1 - 8001df8: 701a strb r2, [r3, #0] + 80021b2: 1dfb adds r3, r7, #7 + 80021b4: 1dfa adds r2, r7, #7 + 80021b6: 7812 ldrb r2, [r2, #0] + 80021b8: 2102 movs r1, #2 + 80021ba: 430a orrs r2, r1 + 80021bc: 701a strb r2, [r3, #0] } Send_to_595(h_buff,l_buff); - 8001dfa: 1dbb adds r3, r7, #6 - 8001dfc: 781a ldrb r2, [r3, #0] - 8001dfe: 1dfb adds r3, r7, #7 - 8001e00: 781b ldrb r3, [r3, #0] - 8001e02: 0011 movs r1, r2 - 8001e04: 0018 movs r0, r3 - 8001e06: f7ff fe7b bl 8001b00 + 80021be: 1dbb adds r3, r7, #6 + 80021c0: 781a ldrb r2, [r3, #0] + 80021c2: 1dfb adds r3, r7, #7 + 80021c4: 781b ldrb r3, [r3, #0] + 80021c6: 0011 movs r1, r2 + 80021c8: 0018 movs r0, r3 + 80021ca: f7ff fe7b bl 8001ec4 } - 8001e0a: 46c0 nop ; (mov r8, r8) - 8001e0c: 46bd mov sp, r7 - 8001e0e: b002 add sp, #8 - 8001e10: bd80 pop {r7, pc} - 8001e12: 46c0 nop ; (mov r8, r8) - 8001e14: 20000084 .word 0x20000084 - 8001e18: 08002654 .word 0x08002654 + 80021ce: 46c0 nop ; (mov r8, r8) + 80021d0: 46bd mov sp, r7 + 80021d2: b002 add sp, #8 + 80021d4: bd80 pop {r7, pc} + 80021d6: 46c0 nop ; (mov r8, r8) + 80021d8: 20000084 .word 0x20000084 + 80021dc: 08002c6c .word 0x08002c6c -08001e1c : +080021e0 : long countdown=0; long countdown_set=15000; void mymain() { - 8001e1c: b580 push {r7, lr} - 8001e1e: b084 sub sp, #16 - 8001e20: af00 add r7, sp, #0 + 80021e0: b590 push {r4, r7, lr} + 80021e2: b087 sub sp, #28 + 80021e4: af00 add r7, sp, #0 uint32_t runtime=0,move=0; - 8001e22: 2300 movs r3, #0 - 8001e24: 60fb str r3, [r7, #12] - 8001e26: 2300 movs r3, #0 - 8001e28: 60bb str r3, [r7, #8] - uint8_t mode=0; - 8001e2a: 1dfb adds r3, r7, #7 - 8001e2c: 2200 movs r2, #0 - 8001e2e: 701a strb r2, [r3, #0] - uint16_t adc; - + 80021e6: 2300 movs r3, #0 + 80021e8: 617b str r3, [r7, #20] + 80021ea: 2300 movs r3, #0 + 80021ec: 613b str r3, [r7, #16] + uint8_t mode=0,overload_mode=0; + 80021ee: 230f movs r3, #15 + 80021f0: 18fb adds r3, r7, r3 + 80021f2: 2200 movs r2, #0 + 80021f4: 701a strb r2, [r3, #0] + 80021f6: 230e movs r3, #14 + 80021f8: 18fb adds r3, r7, r3 + 80021fa: 2200 movs r2, #0 + 80021fc: 701a strb r2, [r3, #0] + uint16_t adc,adc_times=0; + 80021fe: 230a movs r3, #10 + 8002200: 18fb adds r3, r7, r3 + 8002202: 2200 movs r2, #0 + 8002204: 801a strh r2, [r3, #0] + uint32_t adc_l; + uint16_t overload_times=0; + 8002206: 1cbb adds r3, r7, #2 + 8002208: 2200 movs r2, #0 + 800220a: 801a strh r2, [r3, #0] MOTA(0); - 8001e30: 4be9 ldr r3, [pc, #932] ; (80021d8 ) - 8001e32: 2200 movs r2, #0 - 8001e34: 2101 movs r1, #1 - 8001e36: 0018 movs r0, r3 - 8001e38: f7ff f99b bl 8001172 + 800220c: 4bd1 ldr r3, [pc, #836] ; (8002554 ) + 800220e: 2200 movs r2, #0 + 8002210: 2101 movs r1, #1 + 8002212: 0018 movs r0, r3 + 8002214: f7ff f98f bl 8001536 MOTB(0); - 8001e3c: 4be6 ldr r3, [pc, #920] ; (80021d8 ) - 8001e3e: 2200 movs r2, #0 - 8001e40: 2102 movs r1, #2 - 8001e42: 0018 movs r0, r3 - 8001e44: f7ff f995 bl 8001172 + 8002218: 4bce ldr r3, [pc, #824] ; (8002554 ) + 800221a: 2200 movs r2, #0 + 800221c: 2102 movs r1, #2 + 800221e: 0018 movs r0, r3 + 8002220: f7ff f989 bl 8001536 HC595_DCK(0); - 8001e48: 2390 movs r3, #144 ; 0x90 - 8001e4a: 05db lsls r3, r3, #23 - 8001e4c: 2200 movs r2, #0 - 8001e4e: 2108 movs r1, #8 - 8001e50: 0018 movs r0, r3 - 8001e52: f7ff f98e bl 8001172 + 8002224: 2390 movs r3, #144 ; 0x90 + 8002226: 05db lsls r3, r3, #23 + 8002228: 2200 movs r2, #0 + 800222a: 2108 movs r1, #8 + 800222c: 0018 movs r0, r3 + 800222e: f7ff f982 bl 8001536 HC595_RCK(0); - 8001e56: 2390 movs r3, #144 ; 0x90 - 8001e58: 05db lsls r3, r3, #23 - 8001e5a: 2200 movs r2, #0 - 8001e5c: 2110 movs r1, #16 - 8001e5e: 0018 movs r0, r3 - 8001e60: f7ff f987 bl 8001172 + 8002232: 2390 movs r3, #144 ; 0x90 + 8002234: 05db lsls r3, r3, #23 + 8002236: 2200 movs r2, #0 + 8002238: 2110 movs r1, #16 + 800223a: 0018 movs r0, r3 + 800223c: f7ff f97b bl 8001536 HC595_SCK(0); - 8001e64: 2390 movs r3, #144 ; 0x90 - 8001e66: 05db lsls r3, r3, #23 - 8001e68: 2200 movs r2, #0 - 8001e6a: 2120 movs r1, #32 - 8001e6c: 0018 movs r0, r3 - 8001e6e: f7ff f980 bl 8001172 + 8002240: 2390 movs r3, #144 ; 0x90 + 8002242: 05db lsls r3, r3, #23 + 8002244: 2200 movs r2, #0 + 8002246: 2120 movs r1, #32 + 8002248: 0018 movs r0, r3 + 800224a: f7ff f974 bl 8001536 dis_buff.d_num[0]=0xff; - 8001e72: 4bda ldr r3, [pc, #872] ; (80021dc ) - 8001e74: 22ff movs r2, #255 ; 0xff - 8001e76: 701a strb r2, [r3, #0] + 800224e: 4bc2 ldr r3, [pc, #776] ; (8002558 ) + 8002250: 22ff movs r2, #255 ; 0xff + 8002252: 701a strb r2, [r3, #0] dis_buff.d_num[1]=0xff; - 8001e78: 4bd8 ldr r3, [pc, #864] ; (80021dc ) - 8001e7a: 22ff movs r2, #255 ; 0xff - 8001e7c: 705a strb r2, [r3, #1] + 8002254: 4bc0 ldr r3, [pc, #768] ; (8002558 ) + 8002256: 22ff movs r2, #255 ; 0xff + 8002258: 705a strb r2, [r3, #1] dis_buff.d_num[2]=0xff; - 8001e7e: 4bd7 ldr r3, [pc, #860] ; (80021dc ) - 8001e80: 22ff movs r2, #255 ; 0xff - 8001e82: 709a strb r2, [r3, #2] + 800225a: 4bbf ldr r3, [pc, #764] ; (8002558 ) + 800225c: 22ff movs r2, #255 ; 0xff + 800225e: 709a strb r2, [r3, #2] dis_buff.d_num[3]=0xff; - 8001e84: 4bd5 ldr r3, [pc, #852] ; (80021dc ) - 8001e86: 22ff movs r2, #255 ; 0xff - 8001e88: 70da strb r2, [r3, #3] + 8002260: 4bbd ldr r3, [pc, #756] ; (8002558 ) + 8002262: 22ff movs r2, #255 ; 0xff + 8002264: 70da strb r2, [r3, #3] countdown=1000; - 8001e8a: 4bd5 ldr r3, [pc, #852] ; (80021e0 ) - 8001e8c: 22fa movs r2, #250 ; 0xfa - 8001e8e: 0092 lsls r2, r2, #2 - 8001e90: 601a str r2, [r3, #0] + 8002266: 4bbd ldr r3, [pc, #756] ; (800255c ) + 8002268: 22fa movs r2, #250 ; 0xfa + 800226a: 0092 lsls r2, r2, #2 + 800226c: 601a str r2, [r3, #0] while(1) { + switch(mode) - 8001e92: 1dfb adds r3, r7, #7 - 8001e94: 781b ldrb r3, [r3, #0] - 8001e96: 2b04 cmp r3, #4 - 8001e98: d900 bls.n 8001e9c - 8001e9a: e31c b.n 80024d6 - 8001e9c: 009a lsls r2, r3, #2 - 8001e9e: 4bd1 ldr r3, [pc, #836] ; (80021e4 ) - 8001ea0: 18d3 adds r3, r2, r3 - 8001ea2: 681b ldr r3, [r3, #0] - 8001ea4: 469f mov pc, r3 + 800226e: 230f movs r3, #15 + 8002270: 18fb adds r3, r7, r3 + 8002272: 781b ldrb r3, [r3, #0] + 8002274: 2b05 cmp r3, #5 + 8002276: d901 bls.n 800227c + 8002278: f000 fbfd bl 8002a76 + 800227c: 009a lsls r2, r3, #2 + 800227e: 4bb8 ldr r3, [pc, #736] ; (8002560 ) + 8002280: 18d3 adds r3, r2, r3 + 8002282: 681b ldr r3, [r3, #0] + 8002284: 469f mov pc, r3 { case 0: //Startup if(HAL_GetTick()>move) - 8001ea6: f7fe fce3 bl 8000870 - 8001eaa: 0002 movs r2, r0 - 8001eac: 68bb ldr r3, [r7, #8] - 8001eae: 4293 cmp r3, r2 - 8001eb0: d300 bcc.n 8001eb4 - 8001eb2: e309 b.n 80024c8 + 8002286: f7fe faf3 bl 8000870 + 800228a: 0002 movs r2, r0 + 800228c: 693b ldr r3, [r7, #16] + 800228e: 4293 cmp r3, r2 + 8002290: d301 bcc.n 8002296 + 8002292: f000 fbe7 bl 8002a64 { move=HAL_GetTick()+100; - 8001eb4: f7fe fcdc bl 8000870 - 8001eb8: 0003 movs r3, r0 - 8001eba: 3364 adds r3, #100 ; 0x64 - 8001ebc: 60bb str r3, [r7, #8] + 8002296: f7fe faeb bl 8000870 + 800229a: 0003 movs r3, r0 + 800229c: 3364 adds r3, #100 ; 0x64 + 800229e: 613b str r3, [r7, #16] countdown-=100; - 8001ebe: 4bc8 ldr r3, [pc, #800] ; (80021e0 ) - 8001ec0: 681b ldr r3, [r3, #0] - 8001ec2: 3b64 subs r3, #100 ; 0x64 - 8001ec4: 001a movs r2, r3 - 8001ec6: 4bc6 ldr r3, [pc, #792] ; (80021e0 ) - 8001ec8: 601a str r2, [r3, #0] + 80022a0: 4bae ldr r3, [pc, #696] ; (800255c ) + 80022a2: 681b ldr r3, [r3, #0] + 80022a4: 3b64 subs r3, #100 ; 0x64 + 80022a6: 001a movs r2, r3 + 80022a8: 4bac ldr r3, [pc, #688] ; (800255c ) + 80022aa: 601a str r2, [r3, #0] if(countdown<0) - 8001eca: 4bc5 ldr r3, [pc, #788] ; (80021e0 ) - 8001ecc: 681b ldr r3, [r3, #0] - 8001ece: 2b00 cmp r3, #0 - 8001ed0: da02 bge.n 8001ed8 + 80022ac: 4bab ldr r3, [pc, #684] ; (800255c ) + 80022ae: 681b ldr r3, [r3, #0] + 80022b0: 2b00 cmp r3, #0 + 80022b2: da03 bge.n 80022bc { mode=1; - 8001ed2: 1dfb adds r3, r7, #7 - 8001ed4: 2201 movs r2, #1 - 8001ed6: 701a strb r2, [r3, #0] + 80022b4: 230f movs r3, #15 + 80022b6: 18fb adds r3, r7, r3 + 80022b8: 2201 movs r2, #1 + 80022ba: 701a strb r2, [r3, #0] } + HAL_ADC_Start(&hadc); + 80022bc: 4ba9 ldr r3, [pc, #676] ; (8002564 ) + 80022be: 0018 movs r0, r3 + 80022c0: f7fe fc20 bl 8000b04 + HAL_ADC_GetValue(&hadc); + 80022c4: 4ba7 ldr r3, [pc, #668] ; (8002564 ) + 80022c6: 0018 movs r0, r3 + 80022c8: f7fe fcb0 bl 8000c2c + HAL_ADC_Stop(&hadc); + 80022cc: 4ba5 ldr r3, [pc, #660] ; (8002564 ) + 80022ce: 0018 movs r0, r3 + 80022d0: f7fe fc6c bl 8000bac + dis_buff.d_num[0]=((countdown/100)%10); - 8001ed8: 4bc1 ldr r3, [pc, #772] ; (80021e0 ) - 8001eda: 681b ldr r3, [r3, #0] - 8001edc: 2164 movs r1, #100 ; 0x64 - 8001ede: 0018 movs r0, r3 - 8001ee0: f7fe f99c bl 800021c <__divsi3> - 8001ee4: 0003 movs r3, r0 - 8001ee6: 210a movs r1, #10 - 8001ee8: 0018 movs r0, r3 - 8001eea: f7fe fa7d bl 80003e8 <__aeabi_idivmod> - 8001eee: 000b movs r3, r1 - 8001ef0: b2da uxtb r2, r3 - 8001ef2: 4bba ldr r3, [pc, #744] ; (80021dc ) - 8001ef4: 701a strb r2, [r3, #0] + 80022d4: 4ba1 ldr r3, [pc, #644] ; (800255c ) + 80022d6: 681b ldr r3, [r3, #0] + 80022d8: 2164 movs r1, #100 ; 0x64 + 80022da: 0018 movs r0, r3 + 80022dc: f7fd ff9e bl 800021c <__divsi3> + 80022e0: 0003 movs r3, r0 + 80022e2: 210a movs r1, #10 + 80022e4: 0018 movs r0, r3 + 80022e6: f7fe f87f bl 80003e8 <__aeabi_idivmod> + 80022ea: 000b movs r3, r1 + 80022ec: b2da uxtb r2, r3 + 80022ee: 4b9a ldr r3, [pc, #616] ; (8002558 ) + 80022f0: 701a strb r2, [r3, #0] dis_buff.d_num[1]=((countdown/100)%10); - 8001ef6: 4bba ldr r3, [pc, #744] ; (80021e0 ) - 8001ef8: 681b ldr r3, [r3, #0] - 8001efa: 2164 movs r1, #100 ; 0x64 - 8001efc: 0018 movs r0, r3 - 8001efe: f7fe f98d bl 800021c <__divsi3> - 8001f02: 0003 movs r3, r0 - 8001f04: 210a movs r1, #10 - 8001f06: 0018 movs r0, r3 - 8001f08: f7fe fa6e bl 80003e8 <__aeabi_idivmod> - 8001f0c: 000b movs r3, r1 - 8001f0e: b2da uxtb r2, r3 - 8001f10: 4bb2 ldr r3, [pc, #712] ; (80021dc ) - 8001f12: 705a strb r2, [r3, #1] + 80022f2: 4b9a ldr r3, [pc, #616] ; (800255c ) + 80022f4: 681b ldr r3, [r3, #0] + 80022f6: 2164 movs r1, #100 ; 0x64 + 80022f8: 0018 movs r0, r3 + 80022fa: f7fd ff8f bl 800021c <__divsi3> + 80022fe: 0003 movs r3, r0 + 8002300: 210a movs r1, #10 + 8002302: 0018 movs r0, r3 + 8002304: f7fe f870 bl 80003e8 <__aeabi_idivmod> + 8002308: 000b movs r3, r1 + 800230a: b2da uxtb r2, r3 + 800230c: 4b92 ldr r3, [pc, #584] ; (8002558 ) + 800230e: 705a strb r2, [r3, #1] dis_buff.d_num[2]=((countdown/100)%10); - 8001f14: 4bb2 ldr r3, [pc, #712] ; (80021e0 ) - 8001f16: 681b ldr r3, [r3, #0] - 8001f18: 2164 movs r1, #100 ; 0x64 - 8001f1a: 0018 movs r0, r3 - 8001f1c: f7fe f97e bl 800021c <__divsi3> - 8001f20: 0003 movs r3, r0 - 8001f22: 210a movs r1, #10 - 8001f24: 0018 movs r0, r3 - 8001f26: f7fe fa5f bl 80003e8 <__aeabi_idivmod> - 8001f2a: 000b movs r3, r1 - 8001f2c: b2da uxtb r2, r3 - 8001f2e: 4bab ldr r3, [pc, #684] ; (80021dc ) - 8001f30: 709a strb r2, [r3, #2] + 8002310: 4b92 ldr r3, [pc, #584] ; (800255c ) + 8002312: 681b ldr r3, [r3, #0] + 8002314: 2164 movs r1, #100 ; 0x64 + 8002316: 0018 movs r0, r3 + 8002318: f7fd ff80 bl 800021c <__divsi3> + 800231c: 0003 movs r3, r0 + 800231e: 210a movs r1, #10 + 8002320: 0018 movs r0, r3 + 8002322: f7fe f861 bl 80003e8 <__aeabi_idivmod> + 8002326: 000b movs r3, r1 + 8002328: b2da uxtb r2, r3 + 800232a: 4b8b ldr r3, [pc, #556] ; (8002558 ) + 800232c: 709a strb r2, [r3, #2] dis_buff.d_num[3]=((countdown/100)%10); - 8001f32: 4bab ldr r3, [pc, #684] ; (80021e0 ) - 8001f34: 681b ldr r3, [r3, #0] - 8001f36: 2164 movs r1, #100 ; 0x64 - 8001f38: 0018 movs r0, r3 - 8001f3a: f7fe f96f bl 800021c <__divsi3> - 8001f3e: 0003 movs r3, r0 - 8001f40: 210a movs r1, #10 - 8001f42: 0018 movs r0, r3 - 8001f44: f7fe fa50 bl 80003e8 <__aeabi_idivmod> - 8001f48: 000b movs r3, r1 - 8001f4a: b2da uxtb r2, r3 - 8001f4c: 4ba3 ldr r3, [pc, #652] ; (80021dc ) - 8001f4e: 70da strb r2, [r3, #3] + 800232e: 4b8b ldr r3, [pc, #556] ; (800255c ) + 8002330: 681b ldr r3, [r3, #0] + 8002332: 2164 movs r1, #100 ; 0x64 + 8002334: 0018 movs r0, r3 + 8002336: f7fd ff71 bl 800021c <__divsi3> + 800233a: 0003 movs r3, r0 + 800233c: 210a movs r1, #10 + 800233e: 0018 movs r0, r3 + 8002340: f7fe f852 bl 80003e8 <__aeabi_idivmod> + 8002344: 000b movs r3, r1 + 8002346: b2da uxtb r2, r3 + 8002348: 4b83 ldr r3, [pc, #524] ; (8002558 ) + 800234a: 70da strb r2, [r3, #3] dis_buff.led_err=countdown>>0; - 8001f50: 4ba3 ldr r3, [pc, #652] ; (80021e0 ) - 8001f52: 681b ldr r3, [r3, #0] - 8001f54: 1c1a adds r2, r3, #0 - 8001f56: 2301 movs r3, #1 - 8001f58: 4013 ands r3, r2 - 8001f5a: b2da uxtb r2, r3 - 8001f5c: 4b9f ldr r3, [pc, #636] ; (80021dc ) - 8001f5e: 01d0 lsls r0, r2, #7 - 8001f60: 791a ldrb r2, [r3, #4] - 8001f62: 217f movs r1, #127 ; 0x7f - 8001f64: 400a ands r2, r1 - 8001f66: 1c11 adds r1, r2, #0 - 8001f68: 1c02 adds r2, r0, #0 - 8001f6a: 430a orrs r2, r1 - 8001f6c: 711a strb r2, [r3, #4] + 800234c: 4b83 ldr r3, [pc, #524] ; (800255c ) + 800234e: 681b ldr r3, [r3, #0] + 8002350: 1c1a adds r2, r3, #0 + 8002352: 2301 movs r3, #1 + 8002354: 4013 ands r3, r2 + 8002356: b2da uxtb r2, r3 + 8002358: 4b7f ldr r3, [pc, #508] ; (8002558 ) + 800235a: 01d0 lsls r0, r2, #7 + 800235c: 791a ldrb r2, [r3, #4] + 800235e: 217f movs r1, #127 ; 0x7f + 8002360: 400a ands r2, r1 + 8002362: 1c11 adds r1, r2, #0 + 8002364: 1c02 adds r2, r0, #0 + 8002366: 430a orrs r2, r1 + 8002368: 711a strb r2, [r3, #4] dis_buff.led_p=countdown>>1; - 8001f6e: 4b9c ldr r3, [pc, #624] ; (80021e0 ) - 8001f70: 681b ldr r3, [r3, #0] - 8001f72: 105b asrs r3, r3, #1 - 8001f74: 1c1a adds r2, r3, #0 - 8001f76: 2301 movs r3, #1 - 8001f78: 4013 ands r3, r2 - 8001f7a: b2da uxtb r2, r3 - 8001f7c: 4b97 ldr r3, [pc, #604] ; (80021dc ) - 8001f7e: 2101 movs r1, #1 - 8001f80: 400a ands r2, r1 - 8001f82: 0150 lsls r0, r2, #5 - 8001f84: 791a ldrb r2, [r3, #4] - 8001f86: 2120 movs r1, #32 - 8001f88: 438a bics r2, r1 - 8001f8a: 1c11 adds r1, r2, #0 - 8001f8c: 1c02 adds r2, r0, #0 - 8001f8e: 430a orrs r2, r1 - 8001f90: 711a strb r2, [r3, #4] + 800236a: 4b7c ldr r3, [pc, #496] ; (800255c ) + 800236c: 681b ldr r3, [r3, #0] + 800236e: 105b asrs r3, r3, #1 + 8002370: 1c1a adds r2, r3, #0 + 8002372: 2301 movs r3, #1 + 8002374: 4013 ands r3, r2 + 8002376: b2da uxtb r2, r3 + 8002378: 4b77 ldr r3, [pc, #476] ; (8002558 ) + 800237a: 2101 movs r1, #1 + 800237c: 400a ands r2, r1 + 800237e: 0150 lsls r0, r2, #5 + 8002380: 791a ldrb r2, [r3, #4] + 8002382: 2120 movs r1, #32 + 8002384: 438a bics r2, r1 + 8002386: 1c11 adds r1, r2, #0 + 8002388: 1c02 adds r2, r0, #0 + 800238a: 430a orrs r2, r1 + 800238c: 711a strb r2, [r3, #4] dis_buff.led_n=countdown>>2; - 8001f92: 4b93 ldr r3, [pc, #588] ; (80021e0 ) - 8001f94: 681b ldr r3, [r3, #0] - 8001f96: 109b asrs r3, r3, #2 - 8001f98: 1c1a adds r2, r3, #0 - 8001f9a: 2301 movs r3, #1 - 8001f9c: 4013 ands r3, r2 - 8001f9e: b2da uxtb r2, r3 - 8001fa0: 4b8e ldr r3, [pc, #568] ; (80021dc ) - 8001fa2: 2101 movs r1, #1 - 8001fa4: 400a ands r2, r1 - 8001fa6: 0190 lsls r0, r2, #6 - 8001fa8: 791a ldrb r2, [r3, #4] - 8001faa: 2140 movs r1, #64 ; 0x40 - 8001fac: 438a bics r2, r1 - 8001fae: 1c11 adds r1, r2, #0 - 8001fb0: 1c02 adds r2, r0, #0 - 8001fb2: 430a orrs r2, r1 - 8001fb4: 711a strb r2, [r3, #4] + 800238e: 4b73 ldr r3, [pc, #460] ; (800255c ) + 8002390: 681b ldr r3, [r3, #0] + 8002392: 109b asrs r3, r3, #2 + 8002394: 1c1a adds r2, r3, #0 + 8002396: 2301 movs r3, #1 + 8002398: 4013 ands r3, r2 + 800239a: b2da uxtb r2, r3 + 800239c: 4b6e ldr r3, [pc, #440] ; (8002558 ) + 800239e: 2101 movs r1, #1 + 80023a0: 400a ands r2, r1 + 80023a2: 0190 lsls r0, r2, #6 + 80023a4: 791a ldrb r2, [r3, #4] + 80023a6: 2140 movs r1, #64 ; 0x40 + 80023a8: 438a bics r2, r1 + 80023aa: 1c11 adds r1, r2, #0 + 80023ac: 1c02 adds r2, r0, #0 + 80023ae: 430a orrs r2, r1 + 80023b0: 711a strb r2, [r3, #4] dis_buff.dot1=countdown>>3; - 8001fb6: 4b8a ldr r3, [pc, #552] ; (80021e0 ) - 8001fb8: 681b ldr r3, [r3, #0] - 8001fba: 10db asrs r3, r3, #3 - 8001fbc: 1c1a adds r2, r3, #0 - 8001fbe: 2301 movs r3, #1 - 8001fc0: 4013 ands r3, r2 - 8001fc2: b2da uxtb r2, r3 - 8001fc4: 4b85 ldr r3, [pc, #532] ; (80021dc ) - 8001fc6: 2101 movs r1, #1 - 8001fc8: 400a ands r2, r1 - 8001fca: 0010 movs r0, r2 - 8001fcc: 791a ldrb r2, [r3, #4] - 8001fce: 2101 movs r1, #1 - 8001fd0: 438a bics r2, r1 - 8001fd2: 1c11 adds r1, r2, #0 - 8001fd4: 1c02 adds r2, r0, #0 - 8001fd6: 430a orrs r2, r1 - 8001fd8: 711a strb r2, [r3, #4] + 80023b2: 4b6a ldr r3, [pc, #424] ; (800255c ) + 80023b4: 681b ldr r3, [r3, #0] + 80023b6: 10db asrs r3, r3, #3 + 80023b8: 1c1a adds r2, r3, #0 + 80023ba: 2301 movs r3, #1 + 80023bc: 4013 ands r3, r2 + 80023be: b2da uxtb r2, r3 + 80023c0: 4b65 ldr r3, [pc, #404] ; (8002558 ) + 80023c2: 2101 movs r1, #1 + 80023c4: 400a ands r2, r1 + 80023c6: 0010 movs r0, r2 + 80023c8: 791a ldrb r2, [r3, #4] + 80023ca: 2101 movs r1, #1 + 80023cc: 438a bics r2, r1 + 80023ce: 1c11 adds r1, r2, #0 + 80023d0: 1c02 adds r2, r0, #0 + 80023d2: 430a orrs r2, r1 + 80023d4: 711a strb r2, [r3, #4] dis_buff.dot2=countdown>>4; - 8001fda: 4b81 ldr r3, [pc, #516] ; (80021e0 ) - 8001fdc: 681b ldr r3, [r3, #0] - 8001fde: 111b asrs r3, r3, #4 - 8001fe0: 1c1a adds r2, r3, #0 - 8001fe2: 2301 movs r3, #1 - 8001fe4: 4013 ands r3, r2 - 8001fe6: b2da uxtb r2, r3 - 8001fe8: 4b7c ldr r3, [pc, #496] ; (80021dc ) - 8001fea: 2101 movs r1, #1 - 8001fec: 400a ands r2, r1 - 8001fee: 1890 adds r0, r2, r2 - 8001ff0: 791a ldrb r2, [r3, #4] - 8001ff2: 2102 movs r1, #2 - 8001ff4: 438a bics r2, r1 - 8001ff6: 1c11 adds r1, r2, #0 - 8001ff8: 1c02 adds r2, r0, #0 - 8001ffa: 430a orrs r2, r1 - 8001ffc: 711a strb r2, [r3, #4] + 80023d6: 4b61 ldr r3, [pc, #388] ; (800255c ) + 80023d8: 681b ldr r3, [r3, #0] + 80023da: 111b asrs r3, r3, #4 + 80023dc: 1c1a adds r2, r3, #0 + 80023de: 2301 movs r3, #1 + 80023e0: 4013 ands r3, r2 + 80023e2: b2da uxtb r2, r3 + 80023e4: 4b5c ldr r3, [pc, #368] ; (8002558 ) + 80023e6: 2101 movs r1, #1 + 80023e8: 400a ands r2, r1 + 80023ea: 1890 adds r0, r2, r2 + 80023ec: 791a ldrb r2, [r3, #4] + 80023ee: 2102 movs r1, #2 + 80023f0: 438a bics r2, r1 + 80023f2: 1c11 adds r1, r2, #0 + 80023f4: 1c02 adds r2, r0, #0 + 80023f6: 430a orrs r2, r1 + 80023f8: 711a strb r2, [r3, #4] dis_buff.dot3=countdown>>5; - 8001ffe: 4b78 ldr r3, [pc, #480] ; (80021e0 ) - 8002000: 681b ldr r3, [r3, #0] - 8002002: 115b asrs r3, r3, #5 - 8002004: 1c1a adds r2, r3, #0 - 8002006: 2301 movs r3, #1 - 8002008: 4013 ands r3, r2 - 800200a: b2da uxtb r2, r3 - 800200c: 4b73 ldr r3, [pc, #460] ; (80021dc ) - 800200e: 2101 movs r1, #1 - 8002010: 400a ands r2, r1 - 8002012: 0090 lsls r0, r2, #2 - 8002014: 791a ldrb r2, [r3, #4] - 8002016: 2104 movs r1, #4 - 8002018: 438a bics r2, r1 - 800201a: 1c11 adds r1, r2, #0 - 800201c: 1c02 adds r2, r0, #0 - 800201e: 430a orrs r2, r1 - 8002020: 711a strb r2, [r3, #4] + 80023fa: 4b58 ldr r3, [pc, #352] ; (800255c ) + 80023fc: 681b ldr r3, [r3, #0] + 80023fe: 115b asrs r3, r3, #5 + 8002400: 1c1a adds r2, r3, #0 + 8002402: 2301 movs r3, #1 + 8002404: 4013 ands r3, r2 + 8002406: b2da uxtb r2, r3 + 8002408: 4b53 ldr r3, [pc, #332] ; (8002558 ) + 800240a: 2101 movs r1, #1 + 800240c: 400a ands r2, r1 + 800240e: 0090 lsls r0, r2, #2 + 8002410: 791a ldrb r2, [r3, #4] + 8002412: 2104 movs r1, #4 + 8002414: 438a bics r2, r1 + 8002416: 1c11 adds r1, r2, #0 + 8002418: 1c02 adds r2, r0, #0 + 800241a: 430a orrs r2, r1 + 800241c: 711a strb r2, [r3, #4] dis_buff.dot4=countdown>>6; - 8002022: 4b6f ldr r3, [pc, #444] ; (80021e0 ) - 8002024: 681b ldr r3, [r3, #0] - 8002026: 119b asrs r3, r3, #6 - 8002028: 1c1a adds r2, r3, #0 - 800202a: 2301 movs r3, #1 - 800202c: 4013 ands r3, r2 - 800202e: b2da uxtb r2, r3 - 8002030: 4b6a ldr r3, [pc, #424] ; (80021dc ) - 8002032: 2101 movs r1, #1 - 8002034: 400a ands r2, r1 - 8002036: 00d0 lsls r0, r2, #3 - 8002038: 791a ldrb r2, [r3, #4] - 800203a: 2108 movs r1, #8 - 800203c: 438a bics r2, r1 - 800203e: 1c11 adds r1, r2, #0 - 8002040: 1c02 adds r2, r0, #0 - 8002042: 430a orrs r2, r1 - 8002044: 711a strb r2, [r3, #4] + 800241e: 4b4f ldr r3, [pc, #316] ; (800255c ) + 8002420: 681b ldr r3, [r3, #0] + 8002422: 119b asrs r3, r3, #6 + 8002424: 1c1a adds r2, r3, #0 + 8002426: 2301 movs r3, #1 + 8002428: 4013 ands r3, r2 + 800242a: b2da uxtb r2, r3 + 800242c: 4b4a ldr r3, [pc, #296] ; (8002558 ) + 800242e: 2101 movs r1, #1 + 8002430: 400a ands r2, r1 + 8002432: 00d0 lsls r0, r2, #3 + 8002434: 791a ldrb r2, [r3, #4] + 8002436: 2108 movs r1, #8 + 8002438: 438a bics r2, r1 + 800243a: 1c11 adds r1, r2, #0 + 800243c: 1c02 adds r2, r0, #0 + 800243e: 430a orrs r2, r1 + 8002440: 711a strb r2, [r3, #4] } break; - 8002046: e23f b.n 80024c8 + 8002442: e30f b.n 8002a64 case 1: //standby MOTA(0); - 8002048: 4b63 ldr r3, [pc, #396] ; (80021d8 ) - 800204a: 2200 movs r2, #0 - 800204c: 2101 movs r1, #1 - 800204e: 0018 movs r0, r3 - 8002050: f7ff f88f bl 8001172 + 8002444: 4b43 ldr r3, [pc, #268] ; (8002554 ) + 8002446: 2200 movs r2, #0 + 8002448: 2101 movs r1, #1 + 800244a: 0018 movs r0, r3 + 800244c: f7ff f873 bl 8001536 MOTB(0); - 8002054: 4b60 ldr r3, [pc, #384] ; (80021d8 ) - 8002056: 2200 movs r2, #0 - 8002058: 2102 movs r1, #2 - 800205a: 0018 movs r0, r3 - 800205c: f7ff f889 bl 8001172 + 8002450: 4b40 ldr r3, [pc, #256] ; (8002554 ) + 8002452: 2200 movs r2, #0 + 8002454: 2102 movs r1, #2 + 8002456: 0018 movs r0, r3 + 8002458: f7ff f86d bl 8001536 dis_buff.d_num[0]=0xff; - 8002060: 4b5e ldr r3, [pc, #376] ; (80021dc ) - 8002062: 22ff movs r2, #255 ; 0xff - 8002064: 701a strb r2, [r3, #0] + 800245c: 4b3e ldr r3, [pc, #248] ; (8002558 ) + 800245e: 22ff movs r2, #255 ; 0xff + 8002460: 701a strb r2, [r3, #0] dis_buff.d_num[1]=0xff; - 8002066: 4b5d ldr r3, [pc, #372] ; (80021dc ) - 8002068: 22ff movs r2, #255 ; 0xff - 800206a: 705a strb r2, [r3, #1] + 8002462: 4b3d ldr r3, [pc, #244] ; (8002558 ) + 8002464: 22ff movs r2, #255 ; 0xff + 8002466: 705a strb r2, [r3, #1] dis_buff.d_num[2]=0xff; - 800206c: 4b5b ldr r3, [pc, #364] ; (80021dc ) - 800206e: 22ff movs r2, #255 ; 0xff - 8002070: 709a strb r2, [r3, #2] + 8002468: 4b3b ldr r3, [pc, #236] ; (8002558 ) + 800246a: 22ff movs r2, #255 ; 0xff + 800246c: 709a strb r2, [r3, #2] dis_buff.d_num[3]=0xff; - 8002072: 4b5a ldr r3, [pc, #360] ; (80021dc ) - 8002074: 22ff movs r2, #255 ; 0xff - 8002076: 70da strb r2, [r3, #3] + 800246e: 4b3a ldr r3, [pc, #232] ; (8002558 ) + 8002470: 22ff movs r2, #255 ; 0xff + 8002472: 70da strb r2, [r3, #3] dis_buff.led_err=0; - 8002078: 4b58 ldr r3, [pc, #352] ; (80021dc ) - 800207a: 791a ldrb r2, [r3, #4] - 800207c: 217f movs r1, #127 ; 0x7f - 800207e: 400a ands r2, r1 - 8002080: 711a strb r2, [r3, #4] + 8002474: 4b38 ldr r3, [pc, #224] ; (8002558 ) + 8002476: 791a ldrb r2, [r3, #4] + 8002478: 217f movs r1, #127 ; 0x7f + 800247a: 400a ands r2, r1 + 800247c: 711a strb r2, [r3, #4] dis_buff.led_p=0; - 8002082: 4b56 ldr r3, [pc, #344] ; (80021dc ) - 8002084: 791a ldrb r2, [r3, #4] - 8002086: 2120 movs r1, #32 - 8002088: 438a bics r2, r1 - 800208a: 711a strb r2, [r3, #4] + 800247e: 4b36 ldr r3, [pc, #216] ; (8002558 ) + 8002480: 791a ldrb r2, [r3, #4] + 8002482: 2120 movs r1, #32 + 8002484: 438a bics r2, r1 + 8002486: 711a strb r2, [r3, #4] dis_buff.led_n=0; - 800208c: 4b53 ldr r3, [pc, #332] ; (80021dc ) - 800208e: 791a ldrb r2, [r3, #4] - 8002090: 2140 movs r1, #64 ; 0x40 - 8002092: 438a bics r2, r1 - 8002094: 711a strb r2, [r3, #4] + 8002488: 4b33 ldr r3, [pc, #204] ; (8002558 ) + 800248a: 791a ldrb r2, [r3, #4] + 800248c: 2140 movs r1, #64 ; 0x40 + 800248e: 438a bics r2, r1 + 8002490: 711a strb r2, [r3, #4] dis_buff.dot1=0; - 8002096: 4b51 ldr r3, [pc, #324] ; (80021dc ) - 8002098: 791a ldrb r2, [r3, #4] - 800209a: 2101 movs r1, #1 - 800209c: 438a bics r2, r1 - 800209e: 711a strb r2, [r3, #4] + 8002492: 4b31 ldr r3, [pc, #196] ; (8002558 ) + 8002494: 791a ldrb r2, [r3, #4] + 8002496: 2101 movs r1, #1 + 8002498: 438a bics r2, r1 + 800249a: 711a strb r2, [r3, #4] dis_buff.dot2=0; - 80020a0: 4b4e ldr r3, [pc, #312] ; (80021dc ) - 80020a2: 791a ldrb r2, [r3, #4] - 80020a4: 2102 movs r1, #2 - 80020a6: 438a bics r2, r1 - 80020a8: 711a strb r2, [r3, #4] + 800249c: 4b2e ldr r3, [pc, #184] ; (8002558 ) + 800249e: 791a ldrb r2, [r3, #4] + 80024a0: 2102 movs r1, #2 + 80024a2: 438a bics r2, r1 + 80024a4: 711a strb r2, [r3, #4] dis_buff.dot3=0; - 80020aa: 4b4c ldr r3, [pc, #304] ; (80021dc ) - 80020ac: 791a ldrb r2, [r3, #4] - 80020ae: 2104 movs r1, #4 - 80020b0: 438a bics r2, r1 - 80020b2: 711a strb r2, [r3, #4] + 80024a6: 4b2c ldr r3, [pc, #176] ; (8002558 ) + 80024a8: 791a ldrb r2, [r3, #4] + 80024aa: 2104 movs r1, #4 + 80024ac: 438a bics r2, r1 + 80024ae: 711a strb r2, [r3, #4] dis_buff.dot4=0; - 80020b4: 4b49 ldr r3, [pc, #292] ; (80021dc ) - 80020b6: 791a ldrb r2, [r3, #4] - 80020b8: 2108 movs r1, #8 - 80020ba: 438a bics r2, r1 - 80020bc: 711a strb r2, [r3, #4] - + 80024b0: 4b29 ldr r3, [pc, #164] ; (8002558 ) + 80024b2: 791a ldrb r2, [r3, #4] + 80024b4: 2108 movs r1, #8 + 80024b6: 438a bics r2, r1 + 80024b8: 711a strb r2, [r3, #4] + overload_times=0; + 80024ba: 1cbb adds r3, r7, #2 + 80024bc: 2200 movs r2, #0 + 80024be: 801a strh r2, [r3, #0] if(key2.code!=0) - 80020be: 4b4a ldr r3, [pc, #296] ; (80021e8 ) - 80020c0: 681b ldr r3, [r3, #0] - 80020c2: 2b00 cmp r3, #0 - 80020c4: d006 beq.n 80020d4 + 80024c0: 4b29 ldr r3, [pc, #164] ; (8002568 ) + 80024c2: 681b ldr r3, [r3, #0] + 80024c4: 2b00 cmp r3, #0 + 80024c6: d007 beq.n 80024d8 { mode=2; - 80020c6: 1dfb adds r3, r7, #7 - 80020c8: 2202 movs r2, #2 - 80020ca: 701a strb r2, [r3, #0] + 80024c8: 230f movs r3, #15 + 80024ca: 18fb adds r3, r7, r3 + 80024cc: 2202 movs r2, #2 + 80024ce: 701a strb r2, [r3, #0] countdown=countdown_set; - 80020cc: 4b47 ldr r3, [pc, #284] ; (80021ec ) - 80020ce: 681a ldr r2, [r3, #0] - 80020d0: 4b43 ldr r3, [pc, #268] ; (80021e0 ) - 80020d2: 601a str r2, [r3, #0] + 80024d0: 4b26 ldr r3, [pc, #152] ; (800256c ) + 80024d2: 681a ldr r2, [r3, #0] + 80024d4: 4b21 ldr r3, [pc, #132] ; (800255c ) + 80024d6: 601a str r2, [r3, #0] } if(key3.code!=0) - 80020d4: 4b46 ldr r3, [pc, #280] ; (80021f0 ) - 80020d6: 681b ldr r3, [r3, #0] - 80020d8: 2b00 cmp r3, #0 - 80020da: d006 beq.n 80020ea + 80024d8: 4b25 ldr r3, [pc, #148] ; (8002570 ) + 80024da: 681b ldr r3, [r3, #0] + 80024dc: 2b00 cmp r3, #0 + 80024de: d007 beq.n 80024f0 { mode=3; - 80020dc: 1dfb adds r3, r7, #7 - 80020de: 2203 movs r2, #3 - 80020e0: 701a strb r2, [r3, #0] + 80024e0: 230f movs r3, #15 + 80024e2: 18fb adds r3, r7, r3 + 80024e4: 2203 movs r2, #3 + 80024e6: 701a strb r2, [r3, #0] countdown=countdown_set; - 80020e2: 4b42 ldr r3, [pc, #264] ; (80021ec ) - 80020e4: 681a ldr r2, [r3, #0] - 80020e6: 4b3e ldr r3, [pc, #248] ; (80021e0 ) - 80020e8: 601a str r2, [r3, #0] + 80024e8: 4b20 ldr r3, [pc, #128] ; (800256c ) + 80024ea: 681a ldr r2, [r3, #0] + 80024ec: 4b1b ldr r3, [pc, #108] ; (800255c ) + 80024ee: 601a str r2, [r3, #0] } if(key1.code!=0) - 80020ea: 4b42 ldr r3, [pc, #264] ; (80021f4 ) - 80020ec: 681b ldr r3, [r3, #0] - 80020ee: 2b00 cmp r3, #0 - 80020f0: d100 bne.n 80020f4 - 80020f2: e1eb b.n 80024cc + 80024f0: 4b20 ldr r3, [pc, #128] ; (8002574 ) + 80024f2: 681b ldr r3, [r3, #0] + 80024f4: 2b00 cmp r3, #0 + 80024f6: d100 bne.n 80024fa + 80024f8: e2b6 b.n 8002a68 { mode=4; - 80020f4: 1dfb adds r3, r7, #7 - 80020f6: 2204 movs r2, #4 - 80020f8: 701a strb r2, [r3, #0] + 80024fa: 230f movs r3, #15 + 80024fc: 18fb adds r3, r7, r3 + 80024fe: 2204 movs r2, #4 + 8002500: 701a strb r2, [r3, #0] countdown=10000; - 80020fa: 4b39 ldr r3, [pc, #228] ; (80021e0 ) - 80020fc: 4a3e ldr r2, [pc, #248] ; (80021f8 ) - 80020fe: 601a str r2, [r3, #0] + 8002502: 4b16 ldr r3, [pc, #88] ; (800255c ) + 8002504: 4a1c ldr r2, [pc, #112] ; (8002578 ) + 8002506: 601a str r2, [r3, #0] } break; - 8002100: e1e4 b.n 80024cc + 8002508: e2ae b.n 8002a68 case 2: MOTA(0); - 8002102: 4b35 ldr r3, [pc, #212] ; (80021d8 ) - 8002104: 2200 movs r2, #0 - 8002106: 2101 movs r1, #1 - 8002108: 0018 movs r0, r3 - 800210a: f7ff f832 bl 8001172 + 800250a: 4b12 ldr r3, [pc, #72] ; (8002554 ) + 800250c: 2200 movs r2, #0 + 800250e: 2101 movs r1, #1 + 8002510: 0018 movs r0, r3 + 8002512: f7ff f810 bl 8001536 MOTB(1); - 800210e: 4b32 ldr r3, [pc, #200] ; (80021d8 ) - 8002110: 2201 movs r2, #1 - 8002112: 2102 movs r1, #2 - 8002114: 0018 movs r0, r3 - 8002116: f7ff f82c bl 8001172 + 8002516: 4b0f ldr r3, [pc, #60] ; (8002554 ) + 8002518: 2201 movs r2, #1 + 800251a: 2102 movs r1, #2 + 800251c: 0018 movs r0, r3 + 800251e: f7ff f80a bl 8001536 if(HAL_GetTick()>move) - 800211a: f7fe fba9 bl 8000870 - 800211e: 0002 movs r2, r0 - 8002120: 68bb ldr r3, [r7, #8] - 8002122: 4293 cmp r3, r2 - 8002124: d223 bcs.n 800216e + 8002522: f7fe f9a5 bl 8000870 + 8002526: 0002 movs r2, r0 + 8002528: 693b ldr r3, [r7, #16] + 800252a: 4293 cmp r3, r2 + 800252c: d239 bcs.n 80025a2 { move=HAL_GetTick()+100; - 8002126: f7fe fba3 bl 8000870 - 800212a: 0003 movs r3, r0 - 800212c: 3364 adds r3, #100 ; 0x64 - 800212e: 60bb str r3, [r7, #8] + 800252e: f7fe f99f bl 8000870 + 8002532: 0003 movs r3, r0 + 8002534: 3364 adds r3, #100 ; 0x64 + 8002536: 613b str r3, [r7, #16] if(dis_buff.led_p==1) - 8002130: 4b2a ldr r3, [pc, #168] ; (80021dc ) - 8002132: 791b ldrb r3, [r3, #4] - 8002134: 2220 movs r2, #32 - 8002136: 4013 ands r3, r2 - 8002138: b2db uxtb r3, r3 - 800213a: 2b00 cmp r3, #0 - 800213c: d005 beq.n 800214a + 8002538: 4b07 ldr r3, [pc, #28] ; (8002558 ) + 800253a: 791b ldrb r3, [r3, #4] + 800253c: 2220 movs r2, #32 + 800253e: 4013 ands r3, r2 + 8002540: b2db uxtb r3, r3 + 8002542: 2b00 cmp r3, #0 + 8002544: d01a beq.n 800257c { dis_buff.led_p=0; - 800213e: 4b27 ldr r3, [pc, #156] ; (80021dc ) - 8002140: 791a ldrb r2, [r3, #4] - 8002142: 2120 movs r1, #32 - 8002144: 438a bics r2, r1 - 8002146: 711a strb r2, [r3, #4] - 8002148: e004 b.n 8002154 + 8002546: 4b04 ldr r3, [pc, #16] ; (8002558 ) + 8002548: 791a ldrb r2, [r3, #4] + 800254a: 2120 movs r1, #32 + 800254c: 438a bics r2, r1 + 800254e: 711a strb r2, [r3, #4] + 8002550: e019 b.n 8002586 + 8002552: 46c0 nop ; (mov r8, r8) + 8002554: 48001400 .word 0x48001400 + 8002558: 20000084 .word 0x20000084 + 800255c: 2000002c .word 0x2000002c + 8002560: 08002c80 .word 0x08002c80 + 8002564: 20000030 .word 0x20000030 + 8002568: 200000bc .word 0x200000bc + 800256c: 2000000c .word 0x2000000c + 8002570: 200000ac .word 0x200000ac + 8002574: 2000008c .word 0x2000008c + 8002578: 00002710 .word 0x00002710 }else { dis_buff.led_p=1; - 800214a: 4b24 ldr r3, [pc, #144] ; (80021dc ) - 800214c: 791a ldrb r2, [r3, #4] - 800214e: 2120 movs r1, #32 - 8002150: 430a orrs r2, r1 - 8002152: 711a strb r2, [r3, #4] + 800257c: 4ba0 ldr r3, [pc, #640] ; (8002800 ) + 800257e: 791a ldrb r2, [r3, #4] + 8002580: 2120 movs r1, #32 + 8002582: 430a orrs r2, r1 + 8002584: 711a strb r2, [r3, #4] } countdown-=100; - 8002154: 4b22 ldr r3, [pc, #136] ; (80021e0 ) - 8002156: 681b ldr r3, [r3, #0] - 8002158: 3b64 subs r3, #100 ; 0x64 - 800215a: 001a movs r2, r3 - 800215c: 4b20 ldr r3, [pc, #128] ; (80021e0 ) - 800215e: 601a str r2, [r3, #0] + 8002586: 4b9f ldr r3, [pc, #636] ; (8002804 ) + 8002588: 681b ldr r3, [r3, #0] + 800258a: 3b64 subs r3, #100 ; 0x64 + 800258c: 001a movs r2, r3 + 800258e: 4b9d ldr r3, [pc, #628] ; (8002804 ) + 8002590: 601a str r2, [r3, #0] if(countdown<0) - 8002160: 4b1f ldr r3, [pc, #124] ; (80021e0 ) - 8002162: 681b ldr r3, [r3, #0] - 8002164: 2b00 cmp r3, #0 - 8002166: da02 bge.n 800216e + 8002592: 4b9c ldr r3, [pc, #624] ; (8002804 ) + 8002594: 681b ldr r3, [r3, #0] + 8002596: 2b00 cmp r3, #0 + 8002598: da03 bge.n 80025a2 { mode=1; - 8002168: 1dfb adds r3, r7, #7 - 800216a: 2201 movs r2, #1 - 800216c: 701a strb r2, [r3, #0] + 800259a: 230f movs r3, #15 + 800259c: 18fb adds r3, r7, r3 + 800259e: 2201 movs r2, #1 + 80025a0: 701a strb r2, [r3, #0] } } dis_buff.d_num[3]=(countdown/100)%10; - 800216e: 4b1c ldr r3, [pc, #112] ; (80021e0 ) - 8002170: 681b ldr r3, [r3, #0] - 8002172: 2164 movs r1, #100 ; 0x64 - 8002174: 0018 movs r0, r3 - 8002176: f7fe f851 bl 800021c <__divsi3> - 800217a: 0003 movs r3, r0 - 800217c: 210a movs r1, #10 - 800217e: 0018 movs r0, r3 - 8002180: f7fe f932 bl 80003e8 <__aeabi_idivmod> - 8002184: 000b movs r3, r1 - 8002186: b2da uxtb r2, r3 - 8002188: 4b14 ldr r3, [pc, #80] ; (80021dc ) - 800218a: 70da strb r2, [r3, #3] + 80025a2: 4b98 ldr r3, [pc, #608] ; (8002804 ) + 80025a4: 681b ldr r3, [r3, #0] + 80025a6: 2164 movs r1, #100 ; 0x64 + 80025a8: 0018 movs r0, r3 + 80025aa: f7fd fe37 bl 800021c <__divsi3> + 80025ae: 0003 movs r3, r0 + 80025b0: 210a movs r1, #10 + 80025b2: 0018 movs r0, r3 + 80025b4: f7fd ff18 bl 80003e8 <__aeabi_idivmod> + 80025b8: 000b movs r3, r1 + 80025ba: b2da uxtb r2, r3 + 80025bc: 4b90 ldr r3, [pc, #576] ; (8002800 ) + 80025be: 70da strb r2, [r3, #3] dis_buff.d_num[2]=(countdown/1000)%10; - 800218c: 4b14 ldr r3, [pc, #80] ; (80021e0 ) - 800218e: 681b ldr r3, [r3, #0] - 8002190: 22fa movs r2, #250 ; 0xfa - 8002192: 0091 lsls r1, r2, #2 - 8002194: 0018 movs r0, r3 - 8002196: f7fe f841 bl 800021c <__divsi3> - 800219a: 0003 movs r3, r0 - 800219c: 210a movs r1, #10 - 800219e: 0018 movs r0, r3 - 80021a0: f7fe f922 bl 80003e8 <__aeabi_idivmod> - 80021a4: 000b movs r3, r1 - 80021a6: b2da uxtb r2, r3 - 80021a8: 4b0c ldr r3, [pc, #48] ; (80021dc ) - 80021aa: 709a strb r2, [r3, #2] + 80025c0: 4b90 ldr r3, [pc, #576] ; (8002804 ) + 80025c2: 681b ldr r3, [r3, #0] + 80025c4: 22fa movs r2, #250 ; 0xfa + 80025c6: 0091 lsls r1, r2, #2 + 80025c8: 0018 movs r0, r3 + 80025ca: f7fd fe27 bl 800021c <__divsi3> + 80025ce: 0003 movs r3, r0 + 80025d0: 210a movs r1, #10 + 80025d2: 0018 movs r0, r3 + 80025d4: f7fd ff08 bl 80003e8 <__aeabi_idivmod> + 80025d8: 000b movs r3, r1 + 80025da: b2da uxtb r2, r3 + 80025dc: 4b88 ldr r3, [pc, #544] ; (8002800 ) + 80025de: 709a strb r2, [r3, #2] dis_buff.d_num[1]=((countdown/10000)%10); - 80021ac: 4b0c ldr r3, [pc, #48] ; (80021e0 ) - 80021ae: 681b ldr r3, [r3, #0] - 80021b0: 4911 ldr r1, [pc, #68] ; (80021f8 ) - 80021b2: 0018 movs r0, r3 - 80021b4: f7fe f832 bl 800021c <__divsi3> - 80021b8: 0003 movs r3, r0 - 80021ba: 210a movs r1, #10 - 80021bc: 0018 movs r0, r3 - 80021be: f7fe f913 bl 80003e8 <__aeabi_idivmod> - 80021c2: 000b movs r3, r1 - 80021c4: b2da uxtb r2, r3 - 80021c6: 4b05 ldr r3, [pc, #20] ; (80021dc ) - 80021c8: 705a strb r2, [r3, #1] + 80025e0: 4b88 ldr r3, [pc, #544] ; (8002804 ) + 80025e2: 681b ldr r3, [r3, #0] + 80025e4: 4988 ldr r1, [pc, #544] ; (8002808 ) + 80025e6: 0018 movs r0, r3 + 80025e8: f7fd fe18 bl 800021c <__divsi3> + 80025ec: 0003 movs r3, r0 + 80025ee: 210a movs r1, #10 + 80025f0: 0018 movs r0, r3 + 80025f2: f7fd fef9 bl 80003e8 <__aeabi_idivmod> + 80025f6: 000b movs r3, r1 + 80025f8: b2da uxtb r2, r3 + 80025fa: 4b81 ldr r3, [pc, #516] ; (8002800 ) + 80025fc: 705a strb r2, [r3, #1] dis_buff.d_num[1]=dis_buff.d_num[1]==0?255:dis_buff.d_num[1]; - 80021ca: 4b04 ldr r3, [pc, #16] ; (80021dc ) - 80021cc: 785b ldrb r3, [r3, #1] - 80021ce: 2b00 cmp r3, #0 - 80021d0: d014 beq.n 80021fc - 80021d2: 4b02 ldr r3, [pc, #8] ; (80021dc ) - 80021d4: 785a ldrb r2, [r3, #1] - 80021d6: e012 b.n 80021fe - 80021d8: 48001400 .word 0x48001400 - 80021dc: 20000084 .word 0x20000084 - 80021e0: 2000002c .word 0x2000002c - 80021e4: 08002668 .word 0x08002668 - 80021e8: 200000ac .word 0x200000ac - 80021ec: 2000000c .word 0x2000000c - 80021f0: 2000009c .word 0x2000009c - 80021f4: 2000008c .word 0x2000008c - 80021f8: 00002710 .word 0x00002710 - 80021fc: 22ff movs r2, #255 ; 0xff - 80021fe: 4be2 ldr r3, [pc, #904] ; (8002588 ) - 8002200: 705a strb r2, [r3, #1] + 80025fe: 4b80 ldr r3, [pc, #512] ; (8002800 ) + 8002600: 785b ldrb r3, [r3, #1] + 8002602: 2b00 cmp r3, #0 + 8002604: d002 beq.n 800260c + 8002606: 4b7e ldr r3, [pc, #504] ; (8002800 ) + 8002608: 785a ldrb r2, [r3, #1] + 800260a: e000 b.n 800260e + 800260c: 22ff movs r2, #255 ; 0xff + 800260e: 4b7c ldr r3, [pc, #496] ; (8002800 ) + 8002610: 705a strb r2, [r3, #1] dis_buff.dot3=1; - 8002202: 4be1 ldr r3, [pc, #900] ; (8002588 ) - 8002204: 791a ldrb r2, [r3, #4] - 8002206: 2104 movs r1, #4 - 8002208: 430a orrs r2, r1 - 800220a: 711a strb r2, [r3, #4] + 8002612: 4b7b ldr r3, [pc, #492] ; (8002800 ) + 8002614: 791a ldrb r2, [r3, #4] + 8002616: 2104 movs r1, #4 + 8002618: 430a orrs r2, r1 + 800261a: 711a strb r2, [r3, #4] dis_buff.led_n=0; - 800220c: 4bde ldr r3, [pc, #888] ; (8002588 ) - 800220e: 791a ldrb r2, [r3, #4] - 8002210: 2140 movs r1, #64 ; 0x40 - 8002212: 438a bics r2, r1 - 8002214: 711a strb r2, [r3, #4] + 800261c: 4b78 ldr r3, [pc, #480] ; (8002800 ) + 800261e: 791a ldrb r2, [r3, #4] + 8002620: 2140 movs r1, #64 ; 0x40 + 8002622: 438a bics r2, r1 + 8002624: 711a strb r2, [r3, #4] if(key3.code!=0) - 8002216: 4bdd ldr r3, [pc, #884] ; (800258c ) - 8002218: 681b ldr r3, [r3, #0] - 800221a: 2b00 cmp r3, #0 - 800221c: d009 beq.n 8002232 + 8002626: 4b79 ldr r3, [pc, #484] ; (800280c ) + 8002628: 681b ldr r3, [r3, #0] + 800262a: 2b00 cmp r3, #0 + 800262c: d00a beq.n 8002644 { mode=3; - 800221e: 1dfb adds r3, r7, #7 - 8002220: 2203 movs r2, #3 - 8002222: 701a strb r2, [r3, #0] + 800262e: 230f movs r3, #15 + 8002630: 18fb adds r3, r7, r3 + 8002632: 2203 movs r2, #3 + 8002634: 701a strb r2, [r3, #0] countdown=countdown_set-countdown; - 8002224: 4bda ldr r3, [pc, #872] ; (8002590 ) - 8002226: 681a ldr r2, [r3, #0] - 8002228: 4bda ldr r3, [pc, #872] ; (8002594 ) - 800222a: 681b ldr r3, [r3, #0] - 800222c: 1ad2 subs r2, r2, r3 - 800222e: 4bd9 ldr r3, [pc, #868] ; (8002594 ) - 8002230: 601a str r2, [r3, #0] + 8002636: 4b76 ldr r3, [pc, #472] ; (8002810 ) + 8002638: 681a ldr r2, [r3, #0] + 800263a: 4b72 ldr r3, [pc, #456] ; (8002804 ) + 800263c: 681b ldr r3, [r3, #0] + 800263e: 1ad2 subs r2, r2, r3 + 8002640: 4b70 ldr r3, [pc, #448] ; (8002804 ) + 8002642: 601a str r2, [r3, #0] } - if(key4.code!=0) - 8002232: 4bd9 ldr r3, [pc, #868] ; (8002598 ) - 8002234: 681b ldr r3, [r3, #0] - 8002236: 2b00 cmp r3, #0 - 8002238: d100 bne.n 800223c - 800223a: e149 b.n 80024d0 + if(key4.code<0) + 8002644: 4b73 ldr r3, [pc, #460] ; (8002814 ) + 8002646: 681b ldr r3, [r3, #0] + 8002648: 2b00 cmp r3, #0 + 800264a: da03 bge.n 8002654 { mode=1; - 800223c: 1dfb adds r3, r7, #7 - 800223e: 2201 movs r2, #1 - 8002240: 701a strb r2, [r3, #0] + 800264c: 230f movs r3, #15 + 800264e: 18fb adds r3, r7, r3 + 8002650: 2201 movs r2, #1 + 8002652: 701a strb r2, [r3, #0] + } + if(overload.code!=0) + 8002654: 4b70 ldr r3, [pc, #448] ; (8002818 ) + 8002656: 681b ldr r3, [r3, #0] + 8002658: 2b00 cmp r3, #0 + 800265a: d004 beq.n 8002666 + { + overload_times+=1; + 800265c: 1cbb adds r3, r7, #2 + 800265e: 1cba adds r2, r7, #2 + 8002660: 8812 ldrh r2, [r2, #0] + 8002662: 3201 adds r2, #1 + 8002664: 801a strh r2, [r3, #0] + } + if(overload_times>2) + 8002666: 1cbb adds r3, r7, #2 + 8002668: 881b ldrh r3, [r3, #0] + 800266a: 2b02 cmp r3, #2 + 800266c: d800 bhi.n 8002670 + 800266e: e1fd b.n 8002a6c + { + overload_mode=2; + 8002670: 230e movs r3, #14 + 8002672: 18fb adds r3, r7, r3 + 8002674: 2202 movs r2, #2 + 8002676: 701a strb r2, [r3, #0] + mode=5; + 8002678: 230f movs r3, #15 + 800267a: 18fb adds r3, r7, r3 + 800267c: 2205 movs r2, #5 + 800267e: 701a strb r2, [r3, #0] } break; - 8002242: e145 b.n 80024d0 + 8002680: e1f4 b.n 8002a6c case 3: MOTB(0); - 8002244: 4bd5 ldr r3, [pc, #852] ; (800259c ) - 8002246: 2200 movs r2, #0 - 8002248: 2102 movs r1, #2 - 800224a: 0018 movs r0, r3 - 800224c: f7fe ff91 bl 8001172 + 8002682: 4b66 ldr r3, [pc, #408] ; (800281c ) + 8002684: 2200 movs r2, #0 + 8002686: 2102 movs r1, #2 + 8002688: 0018 movs r0, r3 + 800268a: f7fe ff54 bl 8001536 MOTA(1); - 8002250: 4bd2 ldr r3, [pc, #840] ; (800259c ) - 8002252: 2201 movs r2, #1 - 8002254: 2101 movs r1, #1 - 8002256: 0018 movs r0, r3 - 8002258: f7fe ff8b bl 8001172 + 800268e: 4b63 ldr r3, [pc, #396] ; (800281c ) + 8002690: 2201 movs r2, #1 + 8002692: 2101 movs r1, #1 + 8002694: 0018 movs r0, r3 + 8002696: f7fe ff4e bl 8001536 if(HAL_GetTick()>move) - 800225c: f7fe fb08 bl 8000870 - 8002260: 0002 movs r2, r0 - 8002262: 68bb ldr r3, [r7, #8] - 8002264: 4293 cmp r3, r2 - 8002266: d223 bcs.n 80022b0 + 800269a: f7fe f8e9 bl 8000870 + 800269e: 0002 movs r2, r0 + 80026a0: 693b ldr r3, [r7, #16] + 80026a2: 4293 cmp r3, r2 + 80026a4: d224 bcs.n 80026f0 { move=HAL_GetTick()+100; - 8002268: f7fe fb02 bl 8000870 - 800226c: 0003 movs r3, r0 - 800226e: 3364 adds r3, #100 ; 0x64 - 8002270: 60bb str r3, [r7, #8] + 80026a6: f7fe f8e3 bl 8000870 + 80026aa: 0003 movs r3, r0 + 80026ac: 3364 adds r3, #100 ; 0x64 + 80026ae: 613b str r3, [r7, #16] if(dis_buff.led_n==1) - 8002272: 4bc5 ldr r3, [pc, #788] ; (8002588 ) - 8002274: 791b ldrb r3, [r3, #4] - 8002276: 2240 movs r2, #64 ; 0x40 - 8002278: 4013 ands r3, r2 - 800227a: b2db uxtb r3, r3 - 800227c: 2b00 cmp r3, #0 - 800227e: d005 beq.n 800228c + 80026b0: 4b53 ldr r3, [pc, #332] ; (8002800 ) + 80026b2: 791b ldrb r3, [r3, #4] + 80026b4: 2240 movs r2, #64 ; 0x40 + 80026b6: 4013 ands r3, r2 + 80026b8: b2db uxtb r3, r3 + 80026ba: 2b00 cmp r3, #0 + 80026bc: d005 beq.n 80026ca { dis_buff.led_n=0; - 8002280: 4bc1 ldr r3, [pc, #772] ; (8002588 ) - 8002282: 791a ldrb r2, [r3, #4] - 8002284: 2140 movs r1, #64 ; 0x40 - 8002286: 438a bics r2, r1 - 8002288: 711a strb r2, [r3, #4] - 800228a: e004 b.n 8002296 + 80026be: 4b50 ldr r3, [pc, #320] ; (8002800 ) + 80026c0: 791a ldrb r2, [r3, #4] + 80026c2: 2140 movs r1, #64 ; 0x40 + 80026c4: 438a bics r2, r1 + 80026c6: 711a strb r2, [r3, #4] + 80026c8: e004 b.n 80026d4 }else { dis_buff.led_n=1; - 800228c: 4bbe ldr r3, [pc, #760] ; (8002588 ) - 800228e: 791a ldrb r2, [r3, #4] - 8002290: 2140 movs r1, #64 ; 0x40 - 8002292: 430a orrs r2, r1 - 8002294: 711a strb r2, [r3, #4] + 80026ca: 4b4d ldr r3, [pc, #308] ; (8002800 ) + 80026cc: 791a ldrb r2, [r3, #4] + 80026ce: 2140 movs r1, #64 ; 0x40 + 80026d0: 430a orrs r2, r1 + 80026d2: 711a strb r2, [r3, #4] } countdown-=100; - 8002296: 4bbf ldr r3, [pc, #764] ; (8002594 ) - 8002298: 681b ldr r3, [r3, #0] - 800229a: 3b64 subs r3, #100 ; 0x64 - 800229c: 001a movs r2, r3 - 800229e: 4bbd ldr r3, [pc, #756] ; (8002594 ) - 80022a0: 601a str r2, [r3, #0] + 80026d4: 4b4b ldr r3, [pc, #300] ; (8002804 ) + 80026d6: 681b ldr r3, [r3, #0] + 80026d8: 3b64 subs r3, #100 ; 0x64 + 80026da: 001a movs r2, r3 + 80026dc: 4b49 ldr r3, [pc, #292] ; (8002804 ) + 80026de: 601a str r2, [r3, #0] if(countdown<0) - 80022a2: 4bbc ldr r3, [pc, #752] ; (8002594 ) - 80022a4: 681b ldr r3, [r3, #0] - 80022a6: 2b00 cmp r3, #0 - 80022a8: da02 bge.n 80022b0 + 80026e0: 4b48 ldr r3, [pc, #288] ; (8002804 ) + 80026e2: 681b ldr r3, [r3, #0] + 80026e4: 2b00 cmp r3, #0 + 80026e6: da03 bge.n 80026f0 { mode=1; - 80022aa: 1dfb adds r3, r7, #7 - 80022ac: 2201 movs r2, #1 - 80022ae: 701a strb r2, [r3, #0] + 80026e8: 230f movs r3, #15 + 80026ea: 18fb adds r3, r7, r3 + 80026ec: 2201 movs r2, #1 + 80026ee: 701a strb r2, [r3, #0] } } dis_buff.d_num[3]=(countdown/100)%10; - 80022b0: 4bb8 ldr r3, [pc, #736] ; (8002594 ) - 80022b2: 681b ldr r3, [r3, #0] - 80022b4: 2164 movs r1, #100 ; 0x64 - 80022b6: 0018 movs r0, r3 - 80022b8: f7fd ffb0 bl 800021c <__divsi3> - 80022bc: 0003 movs r3, r0 - 80022be: 210a movs r1, #10 - 80022c0: 0018 movs r0, r3 - 80022c2: f7fe f891 bl 80003e8 <__aeabi_idivmod> - 80022c6: 000b movs r3, r1 - 80022c8: b2da uxtb r2, r3 - 80022ca: 4baf ldr r3, [pc, #700] ; (8002588 ) - 80022cc: 70da strb r2, [r3, #3] + 80026f0: 4b44 ldr r3, [pc, #272] ; (8002804 ) + 80026f2: 681b ldr r3, [r3, #0] + 80026f4: 2164 movs r1, #100 ; 0x64 + 80026f6: 0018 movs r0, r3 + 80026f8: f7fd fd90 bl 800021c <__divsi3> + 80026fc: 0003 movs r3, r0 + 80026fe: 210a movs r1, #10 + 8002700: 0018 movs r0, r3 + 8002702: f7fd fe71 bl 80003e8 <__aeabi_idivmod> + 8002706: 000b movs r3, r1 + 8002708: b2da uxtb r2, r3 + 800270a: 4b3d ldr r3, [pc, #244] ; (8002800 ) + 800270c: 70da strb r2, [r3, #3] dis_buff.d_num[2]=(countdown/1000)%10; - 80022ce: 4bb1 ldr r3, [pc, #708] ; (8002594 ) - 80022d0: 681b ldr r3, [r3, #0] - 80022d2: 22fa movs r2, #250 ; 0xfa - 80022d4: 0091 lsls r1, r2, #2 - 80022d6: 0018 movs r0, r3 - 80022d8: f7fd ffa0 bl 800021c <__divsi3> - 80022dc: 0003 movs r3, r0 - 80022de: 210a movs r1, #10 - 80022e0: 0018 movs r0, r3 - 80022e2: f7fe f881 bl 80003e8 <__aeabi_idivmod> - 80022e6: 000b movs r3, r1 - 80022e8: b2da uxtb r2, r3 - 80022ea: 4ba7 ldr r3, [pc, #668] ; (8002588 ) - 80022ec: 709a strb r2, [r3, #2] + 800270e: 4b3d ldr r3, [pc, #244] ; (8002804 ) + 8002710: 681b ldr r3, [r3, #0] + 8002712: 22fa movs r2, #250 ; 0xfa + 8002714: 0091 lsls r1, r2, #2 + 8002716: 0018 movs r0, r3 + 8002718: f7fd fd80 bl 800021c <__divsi3> + 800271c: 0003 movs r3, r0 + 800271e: 210a movs r1, #10 + 8002720: 0018 movs r0, r3 + 8002722: f7fd fe61 bl 80003e8 <__aeabi_idivmod> + 8002726: 000b movs r3, r1 + 8002728: b2da uxtb r2, r3 + 800272a: 4b35 ldr r3, [pc, #212] ; (8002800 ) + 800272c: 709a strb r2, [r3, #2] dis_buff.d_num[1]=((countdown/10000)%10); - 80022ee: 4ba9 ldr r3, [pc, #676] ; (8002594 ) - 80022f0: 681b ldr r3, [r3, #0] - 80022f2: 49ab ldr r1, [pc, #684] ; (80025a0 ) - 80022f4: 0018 movs r0, r3 - 80022f6: f7fd ff91 bl 800021c <__divsi3> - 80022fa: 0003 movs r3, r0 - 80022fc: 210a movs r1, #10 - 80022fe: 0018 movs r0, r3 - 8002300: f7fe f872 bl 80003e8 <__aeabi_idivmod> - 8002304: 000b movs r3, r1 - 8002306: b2da uxtb r2, r3 - 8002308: 4b9f ldr r3, [pc, #636] ; (8002588 ) - 800230a: 705a strb r2, [r3, #1] + 800272e: 4b35 ldr r3, [pc, #212] ; (8002804 ) + 8002730: 681b ldr r3, [r3, #0] + 8002732: 4935 ldr r1, [pc, #212] ; (8002808 ) + 8002734: 0018 movs r0, r3 + 8002736: f7fd fd71 bl 800021c <__divsi3> + 800273a: 0003 movs r3, r0 + 800273c: 210a movs r1, #10 + 800273e: 0018 movs r0, r3 + 8002740: f7fd fe52 bl 80003e8 <__aeabi_idivmod> + 8002744: 000b movs r3, r1 + 8002746: b2da uxtb r2, r3 + 8002748: 4b2d ldr r3, [pc, #180] ; (8002800 ) + 800274a: 705a strb r2, [r3, #1] dis_buff.d_num[1]=dis_buff.d_num[1]==0?255:dis_buff.d_num[1]; - 800230c: 4b9e ldr r3, [pc, #632] ; (8002588 ) - 800230e: 785b ldrb r3, [r3, #1] - 8002310: 2b00 cmp r3, #0 - 8002312: d002 beq.n 800231a - 8002314: 4b9c ldr r3, [pc, #624] ; (8002588 ) - 8002316: 785a ldrb r2, [r3, #1] - 8002318: e000 b.n 800231c - 800231a: 22ff movs r2, #255 ; 0xff - 800231c: 4b9a ldr r3, [pc, #616] ; (8002588 ) - 800231e: 705a strb r2, [r3, #1] + 800274c: 4b2c ldr r3, [pc, #176] ; (8002800 ) + 800274e: 785b ldrb r3, [r3, #1] + 8002750: 2b00 cmp r3, #0 + 8002752: d002 beq.n 800275a + 8002754: 4b2a ldr r3, [pc, #168] ; (8002800 ) + 8002756: 785a ldrb r2, [r3, #1] + 8002758: e000 b.n 800275c + 800275a: 22ff movs r2, #255 ; 0xff + 800275c: 4b28 ldr r3, [pc, #160] ; (8002800 ) + 800275e: 705a strb r2, [r3, #1] dis_buff.dot3=1; - 8002320: 4b99 ldr r3, [pc, #612] ; (8002588 ) - 8002322: 791a ldrb r2, [r3, #4] - 8002324: 2104 movs r1, #4 - 8002326: 430a orrs r2, r1 - 8002328: 711a strb r2, [r3, #4] + 8002760: 4b27 ldr r3, [pc, #156] ; (8002800 ) + 8002762: 791a ldrb r2, [r3, #4] + 8002764: 2104 movs r1, #4 + 8002766: 430a orrs r2, r1 + 8002768: 711a strb r2, [r3, #4] dis_buff.led_p=0; - 800232a: 4b97 ldr r3, [pc, #604] ; (8002588 ) - 800232c: 791a ldrb r2, [r3, #4] - 800232e: 2120 movs r1, #32 - 8002330: 438a bics r2, r1 - 8002332: 711a strb r2, [r3, #4] + 800276a: 4b25 ldr r3, [pc, #148] ; (8002800 ) + 800276c: 791a ldrb r2, [r3, #4] + 800276e: 2120 movs r1, #32 + 8002770: 438a bics r2, r1 + 8002772: 711a strb r2, [r3, #4] if(key2.code!=0) - 8002334: 4b9b ldr r3, [pc, #620] ; (80025a4 ) - 8002336: 681b ldr r3, [r3, #0] - 8002338: 2b00 cmp r3, #0 - 800233a: d009 beq.n 8002350 + 8002774: 4b2a ldr r3, [pc, #168] ; (8002820 ) + 8002776: 681b ldr r3, [r3, #0] + 8002778: 2b00 cmp r3, #0 + 800277a: d00a beq.n 8002792 { mode=2; - 800233c: 1dfb adds r3, r7, #7 - 800233e: 2202 movs r2, #2 - 8002340: 701a strb r2, [r3, #0] + 800277c: 230f movs r3, #15 + 800277e: 18fb adds r3, r7, r3 + 8002780: 2202 movs r2, #2 + 8002782: 701a strb r2, [r3, #0] countdown=countdown_set-countdown; - 8002342: 4b93 ldr r3, [pc, #588] ; (8002590 ) - 8002344: 681a ldr r2, [r3, #0] - 8002346: 4b93 ldr r3, [pc, #588] ; (8002594 ) - 8002348: 681b ldr r3, [r3, #0] - 800234a: 1ad2 subs r2, r2, r3 - 800234c: 4b91 ldr r3, [pc, #580] ; (8002594 ) - 800234e: 601a str r2, [r3, #0] + 8002784: 4b22 ldr r3, [pc, #136] ; (8002810 ) + 8002786: 681a ldr r2, [r3, #0] + 8002788: 4b1e ldr r3, [pc, #120] ; (8002804 ) + 800278a: 681b ldr r3, [r3, #0] + 800278c: 1ad2 subs r2, r2, r3 + 800278e: 4b1d ldr r3, [pc, #116] ; (8002804 ) + 8002790: 601a str r2, [r3, #0] } - if(key4.code!=0) - 8002350: 4b91 ldr r3, [pc, #580] ; (8002598 ) - 8002352: 681b ldr r3, [r3, #0] - 8002354: 2b00 cmp r3, #0 - 8002356: d100 bne.n 800235a - 8002358: e0bc b.n 80024d4 + if(key4.code<0) + 8002792: 4b20 ldr r3, [pc, #128] ; (8002814 ) + 8002794: 681b ldr r3, [r3, #0] + 8002796: 2b00 cmp r3, #0 + 8002798: da03 bge.n 80027a2 { mode=1; - 800235a: 1dfb adds r3, r7, #7 - 800235c: 2201 movs r2, #1 - 800235e: 701a strb r2, [r3, #0] + 800279a: 230f movs r3, #15 + 800279c: 18fb adds r3, r7, r3 + 800279e: 2201 movs r2, #1 + 80027a0: 701a strb r2, [r3, #0] + } + if(overload.code!=0) + 80027a2: 4b1d ldr r3, [pc, #116] ; (8002818 ) + 80027a4: 681b ldr r3, [r3, #0] + 80027a6: 2b00 cmp r3, #0 + 80027a8: d004 beq.n 80027b4 + { + overload_times+=1; + 80027aa: 1cbb adds r3, r7, #2 + 80027ac: 1cba adds r2, r7, #2 + 80027ae: 8812 ldrh r2, [r2, #0] + 80027b0: 3201 adds r2, #1 + 80027b2: 801a strh r2, [r3, #0] + } + if(overload_times>2) + 80027b4: 1cbb adds r3, r7, #2 + 80027b6: 881b ldrh r3, [r3, #0] + 80027b8: 2b02 cmp r3, #2 + 80027ba: d800 bhi.n 80027be + 80027bc: e158 b.n 8002a70 + { + overload_mode=3; + 80027be: 230e movs r3, #14 + 80027c0: 18fb adds r3, r7, r3 + 80027c2: 2203 movs r2, #3 + 80027c4: 701a strb r2, [r3, #0] + mode=5; + 80027c6: 230f movs r3, #15 + 80027c8: 18fb adds r3, r7, r3 + 80027ca: 2205 movs r2, #5 + 80027cc: 701a strb r2, [r3, #0] } break; - 8002360: e0b8 b.n 80024d4 + 80027ce: e14f b.n 8002a70 case 4: //setting mode if(HAL_GetTick()>move) - 8002362: f7fe fa85 bl 8000870 - 8002366: 0002 movs r2, r0 - 8002368: 68bb ldr r3, [r7, #8] - 800236a: 4293 cmp r3, r2 - 800236c: d23e bcs.n 80023ec + 80027d0: f7fe f84e bl 8000870 + 80027d4: 0002 movs r2, r0 + 80027d6: 693b ldr r3, [r7, #16] + 80027d8: 4293 cmp r3, r2 + 80027da: d251 bcs.n 8002880 { move=HAL_GetTick()+100; - 800236e: f7fe fa7f bl 8000870 - 8002372: 0003 movs r3, r0 - 8002374: 3364 adds r3, #100 ; 0x64 - 8002376: 60bb str r3, [r7, #8] + 80027dc: f7fe f848 bl 8000870 + 80027e0: 0003 movs r3, r0 + 80027e2: 3364 adds r3, #100 ; 0x64 + 80027e4: 613b str r3, [r7, #16] if(dis_buff.dot1==1) - 8002378: 4b83 ldr r3, [pc, #524] ; (8002588 ) - 800237a: 791b ldrb r3, [r3, #4] - 800237c: 2201 movs r2, #1 - 800237e: 4013 ands r3, r2 - 8002380: b2db uxtb r3, r3 - 8002382: 2b00 cmp r3, #0 - 8002384: d005 beq.n 8002392 + 80027e6: 4b06 ldr r3, [pc, #24] ; (8002800 ) + 80027e8: 791b ldrb r3, [r3, #4] + 80027ea: 2201 movs r2, #1 + 80027ec: 4013 ands r3, r2 + 80027ee: b2db uxtb r3, r3 + 80027f0: 2b00 cmp r3, #0 + 80027f2: d017 beq.n 8002824 { dis_buff.dot1=0; - 8002386: 4b80 ldr r3, [pc, #512] ; (8002588 ) - 8002388: 791a ldrb r2, [r3, #4] - 800238a: 2101 movs r1, #1 - 800238c: 438a bics r2, r1 - 800238e: 711a strb r2, [r3, #4] - 8002390: e004 b.n 800239c + 80027f4: 4b02 ldr r3, [pc, #8] ; (8002800 ) + 80027f6: 791a ldrb r2, [r3, #4] + 80027f8: 2101 movs r1, #1 + 80027fa: 438a bics r2, r1 + 80027fc: 711a strb r2, [r3, #4] + 80027fe: e016 b.n 800282e + 8002800: 20000084 .word 0x20000084 + 8002804: 2000002c .word 0x2000002c + 8002808: 00002710 .word 0x00002710 + 800280c: 200000ac .word 0x200000ac + 8002810: 2000000c .word 0x2000000c + 8002814: 20000074 .word 0x20000074 + 8002818: 2000009c .word 0x2000009c + 800281c: 48001400 .word 0x48001400 + 8002820: 200000bc .word 0x200000bc }else { dis_buff.dot1=1; - 8002392: 4b7d ldr r3, [pc, #500] ; (8002588 ) - 8002394: 791a ldrb r2, [r3, #4] - 8002396: 2101 movs r1, #1 - 8002398: 430a orrs r2, r1 - 800239a: 711a strb r2, [r3, #4] + 8002824: 4bdc ldr r3, [pc, #880] ; (8002b98 ) + 8002826: 791a ldrb r2, [r3, #4] + 8002828: 2101 movs r1, #1 + 800282a: 430a orrs r2, r1 + 800282c: 711a strb r2, [r3, #4] } countdown-=100; - 800239c: 4b7d ldr r3, [pc, #500] ; (8002594 ) - 800239e: 681b ldr r3, [r3, #0] - 80023a0: 3b64 subs r3, #100 ; 0x64 - 80023a2: 001a movs r2, r3 - 80023a4: 4b7b ldr r3, [pc, #492] ; (8002594 ) - 80023a6: 601a str r2, [r3, #0] + 800282e: 4bdb ldr r3, [pc, #876] ; (8002b9c ) + 8002830: 681b ldr r3, [r3, #0] + 8002832: 3b64 subs r3, #100 ; 0x64 + 8002834: 001a movs r2, r3 + 8002836: 4bd9 ldr r3, [pc, #868] ; (8002b9c ) + 8002838: 601a str r2, [r3, #0] if(countdown<0) - 80023a8: 4b7a ldr r3, [pc, #488] ; (8002594 ) - 80023aa: 681b ldr r3, [r3, #0] - 80023ac: 2b00 cmp r3, #0 - 80023ae: da02 bge.n 80023b6 + 800283a: 4bd8 ldr r3, [pc, #864] ; (8002b9c ) + 800283c: 681b ldr r3, [r3, #0] + 800283e: 2b00 cmp r3, #0 + 8002840: da03 bge.n 800284a { mode=1; - 80023b0: 1dfb adds r3, r7, #7 - 80023b2: 2201 movs r2, #1 - 80023b4: 701a strb r2, [r3, #0] + 8002842: 230f movs r3, #15 + 8002844: 18fb adds r3, r7, r3 + 8002846: 2201 movs r2, #1 + 8002848: 701a strb r2, [r3, #0] } if(key2.code<0){countdown_set+=1000;countdown=10000;} - 80023b6: 4b7b ldr r3, [pc, #492] ; (80025a4 ) - 80023b8: 681b ldr r3, [r3, #0] - 80023ba: 2b00 cmp r3, #0 - 80023bc: da09 bge.n 80023d2 - 80023be: 4b74 ldr r3, [pc, #464] ; (8002590 ) - 80023c0: 681b ldr r3, [r3, #0] - 80023c2: 22fa movs r2, #250 ; 0xfa - 80023c4: 0092 lsls r2, r2, #2 - 80023c6: 189a adds r2, r3, r2 - 80023c8: 4b71 ldr r3, [pc, #452] ; (8002590 ) - 80023ca: 601a str r2, [r3, #0] - 80023cc: 4b71 ldr r3, [pc, #452] ; (8002594 ) - 80023ce: 4a74 ldr r2, [pc, #464] ; (80025a0 ) - 80023d0: 601a str r2, [r3, #0] + 800284a: 4bd5 ldr r3, [pc, #852] ; (8002ba0 ) + 800284c: 681b ldr r3, [r3, #0] + 800284e: 2b00 cmp r3, #0 + 8002850: da09 bge.n 8002866 + 8002852: 4bd4 ldr r3, [pc, #848] ; (8002ba4 ) + 8002854: 681b ldr r3, [r3, #0] + 8002856: 22fa movs r2, #250 ; 0xfa + 8002858: 0092 lsls r2, r2, #2 + 800285a: 189a adds r2, r3, r2 + 800285c: 4bd1 ldr r3, [pc, #836] ; (8002ba4 ) + 800285e: 601a str r2, [r3, #0] + 8002860: 4bce ldr r3, [pc, #824] ; (8002b9c ) + 8002862: 4ad1 ldr r2, [pc, #836] ; (8002ba8 ) + 8002864: 601a str r2, [r3, #0] if(key3.code<0){countdown_set-=1000;countdown=10000;} - 80023d2: 4b6e ldr r3, [pc, #440] ; (800258c ) - 80023d4: 681b ldr r3, [r3, #0] - 80023d6: 2b00 cmp r3, #0 - 80023d8: da08 bge.n 80023ec - 80023da: 4b6d ldr r3, [pc, #436] ; (8002590 ) - 80023dc: 681b ldr r3, [r3, #0] - 80023de: 4a72 ldr r2, [pc, #456] ; (80025a8 ) - 80023e0: 189a adds r2, r3, r2 - 80023e2: 4b6b ldr r3, [pc, #428] ; (8002590 ) - 80023e4: 601a str r2, [r3, #0] - 80023e6: 4b6b ldr r3, [pc, #428] ; (8002594 ) - 80023e8: 4a6d ldr r2, [pc, #436] ; (80025a0 ) - 80023ea: 601a str r2, [r3, #0] + 8002866: 4bd1 ldr r3, [pc, #836] ; (8002bac ) + 8002868: 681b ldr r3, [r3, #0] + 800286a: 2b00 cmp r3, #0 + 800286c: da08 bge.n 8002880 + 800286e: 4bcd ldr r3, [pc, #820] ; (8002ba4 ) + 8002870: 681b ldr r3, [r3, #0] + 8002872: 4acf ldr r2, [pc, #828] ; (8002bb0 ) + 8002874: 189a adds r2, r3, r2 + 8002876: 4bcb ldr r3, [pc, #812] ; (8002ba4 ) + 8002878: 601a str r2, [r3, #0] + 800287a: 4bc8 ldr r3, [pc, #800] ; (8002b9c ) + 800287c: 4aca ldr r2, [pc, #808] ; (8002ba8 ) + 800287e: 601a str r2, [r3, #0] } if(key2.code>0){countdown_set+=100;countdown=10000;} - 80023ec: 4b6d ldr r3, [pc, #436] ; (80025a4 ) - 80023ee: 681b ldr r3, [r3, #0] - 80023f0: 2b00 cmp r3, #0 - 80023f2: dd08 ble.n 8002406 - 80023f4: 4b66 ldr r3, [pc, #408] ; (8002590 ) - 80023f6: 681b ldr r3, [r3, #0] - 80023f8: 3364 adds r3, #100 ; 0x64 - 80023fa: 001a movs r2, r3 - 80023fc: 4b64 ldr r3, [pc, #400] ; (8002590 ) - 80023fe: 601a str r2, [r3, #0] - 8002400: 4b64 ldr r3, [pc, #400] ; (8002594 ) - 8002402: 4a67 ldr r2, [pc, #412] ; (80025a0 ) - 8002404: 601a str r2, [r3, #0] + 8002880: 4bc7 ldr r3, [pc, #796] ; (8002ba0 ) + 8002882: 681b ldr r3, [r3, #0] + 8002884: 2b00 cmp r3, #0 + 8002886: dd08 ble.n 800289a + 8002888: 4bc6 ldr r3, [pc, #792] ; (8002ba4 ) + 800288a: 681b ldr r3, [r3, #0] + 800288c: 3364 adds r3, #100 ; 0x64 + 800288e: 001a movs r2, r3 + 8002890: 4bc4 ldr r3, [pc, #784] ; (8002ba4 ) + 8002892: 601a str r2, [r3, #0] + 8002894: 4bc1 ldr r3, [pc, #772] ; (8002b9c ) + 8002896: 4ac4 ldr r2, [pc, #784] ; (8002ba8 ) + 8002898: 601a str r2, [r3, #0] if(key3.code>0){countdown_set-=100;countdown=10000;} - 8002406: 4b61 ldr r3, [pc, #388] ; (800258c ) - 8002408: 681b ldr r3, [r3, #0] - 800240a: 2b00 cmp r3, #0 - 800240c: dd08 ble.n 8002420 - 800240e: 4b60 ldr r3, [pc, #384] ; (8002590 ) - 8002410: 681b ldr r3, [r3, #0] - 8002412: 3b64 subs r3, #100 ; 0x64 - 8002414: 001a movs r2, r3 - 8002416: 4b5e ldr r3, [pc, #376] ; (8002590 ) - 8002418: 601a str r2, [r3, #0] - 800241a: 4b5e ldr r3, [pc, #376] ; (8002594 ) - 800241c: 4a60 ldr r2, [pc, #384] ; (80025a0 ) - 800241e: 601a str r2, [r3, #0] + 800289a: 4bc4 ldr r3, [pc, #784] ; (8002bac ) + 800289c: 681b ldr r3, [r3, #0] + 800289e: 2b00 cmp r3, #0 + 80028a0: dd08 ble.n 80028b4 + 80028a2: 4bc0 ldr r3, [pc, #768] ; (8002ba4 ) + 80028a4: 681b ldr r3, [r3, #0] + 80028a6: 3b64 subs r3, #100 ; 0x64 + 80028a8: 001a movs r2, r3 + 80028aa: 4bbe ldr r3, [pc, #760] ; (8002ba4 ) + 80028ac: 601a str r2, [r3, #0] + 80028ae: 4bbb ldr r3, [pc, #748] ; (8002b9c ) + 80028b0: 4abd ldr r2, [pc, #756] ; (8002ba8 ) + 80028b2: 601a str r2, [r3, #0] if(countdown_set<100){countdown_set=100;} - 8002420: 4b5b ldr r3, [pc, #364] ; (8002590 ) - 8002422: 681b ldr r3, [r3, #0] - 8002424: 2b63 cmp r3, #99 ; 0x63 - 8002426: dc02 bgt.n 800242e - 8002428: 4b59 ldr r3, [pc, #356] ; (8002590 ) - 800242a: 2264 movs r2, #100 ; 0x64 - 800242c: 601a str r2, [r3, #0] + 80028b4: 4bbb ldr r3, [pc, #748] ; (8002ba4 ) + 80028b6: 681b ldr r3, [r3, #0] + 80028b8: 2b63 cmp r3, #99 ; 0x63 + 80028ba: dc02 bgt.n 80028c2 + 80028bc: 4bb9 ldr r3, [pc, #740] ; (8002ba4 ) + 80028be: 2264 movs r2, #100 ; 0x64 + 80028c0: 601a str r2, [r3, #0] if(countdown_set>60000){countdown_set=60000;} - 800242e: 4b58 ldr r3, [pc, #352] ; (8002590 ) - 8002430: 681b ldr r3, [r3, #0] - 8002432: 4a5e ldr r2, [pc, #376] ; (80025ac ) - 8002434: 4293 cmp r3, r2 - 8002436: dd02 ble.n 800243e - 8002438: 4b55 ldr r3, [pc, #340] ; (8002590 ) - 800243a: 4a5c ldr r2, [pc, #368] ; (80025ac ) - 800243c: 601a str r2, [r3, #0] + 80028c2: 4bb8 ldr r3, [pc, #736] ; (8002ba4 ) + 80028c4: 681b ldr r3, [r3, #0] + 80028c6: 4abb ldr r2, [pc, #748] ; (8002bb4 ) + 80028c8: 4293 cmp r3, r2 + 80028ca: dd02 ble.n 80028d2 + 80028cc: 4bb5 ldr r3, [pc, #724] ; (8002ba4 ) + 80028ce: 4ab9 ldr r2, [pc, #740] ; (8002bb4 ) + 80028d0: 601a str r2, [r3, #0] if(key1.code!=0){mode=1;} - 800243e: 4b5c ldr r3, [pc, #368] ; (80025b0 ) - 8002440: 681b ldr r3, [r3, #0] - 8002442: 2b00 cmp r3, #0 - 8002444: d002 beq.n 800244c - 8002446: 1dfb adds r3, r7, #7 - 8002448: 2201 movs r2, #1 - 800244a: 701a strb r2, [r3, #0] + 80028d2: 4bb9 ldr r3, [pc, #740] ; (8002bb8 ) + 80028d4: 681b ldr r3, [r3, #0] + 80028d6: 2b00 cmp r3, #0 + 80028d8: d003 beq.n 80028e2 + 80028da: 230f movs r3, #15 + 80028dc: 18fb adds r3, r7, r3 + 80028de: 2201 movs r2, #1 + 80028e0: 701a strb r2, [r3, #0] dis_buff.d_num[3]=(countdown_set/100)%10; - 800244c: 4b50 ldr r3, [pc, #320] ; (8002590 ) - 800244e: 681b ldr r3, [r3, #0] - 8002450: 2164 movs r1, #100 ; 0x64 - 8002452: 0018 movs r0, r3 - 8002454: f7fd fee2 bl 800021c <__divsi3> - 8002458: 0003 movs r3, r0 - 800245a: 210a movs r1, #10 - 800245c: 0018 movs r0, r3 - 800245e: f7fd ffc3 bl 80003e8 <__aeabi_idivmod> - 8002462: 000b movs r3, r1 - 8002464: b2da uxtb r2, r3 - 8002466: 4b48 ldr r3, [pc, #288] ; (8002588 ) - 8002468: 70da strb r2, [r3, #3] + 80028e2: 4bb0 ldr r3, [pc, #704] ; (8002ba4 ) + 80028e4: 681b ldr r3, [r3, #0] + 80028e6: 2164 movs r1, #100 ; 0x64 + 80028e8: 0018 movs r0, r3 + 80028ea: f7fd fc97 bl 800021c <__divsi3> + 80028ee: 0003 movs r3, r0 + 80028f0: 210a movs r1, #10 + 80028f2: 0018 movs r0, r3 + 80028f4: f7fd fd78 bl 80003e8 <__aeabi_idivmod> + 80028f8: 000b movs r3, r1 + 80028fa: b2da uxtb r2, r3 + 80028fc: 4ba6 ldr r3, [pc, #664] ; (8002b98 ) + 80028fe: 70da strb r2, [r3, #3] dis_buff.d_num[2]=(countdown_set/1000)%10; - 800246a: 4b49 ldr r3, [pc, #292] ; (8002590 ) - 800246c: 681b ldr r3, [r3, #0] - 800246e: 22fa movs r2, #250 ; 0xfa - 8002470: 0091 lsls r1, r2, #2 - 8002472: 0018 movs r0, r3 - 8002474: f7fd fed2 bl 800021c <__divsi3> - 8002478: 0003 movs r3, r0 - 800247a: 210a movs r1, #10 - 800247c: 0018 movs r0, r3 - 800247e: f7fd ffb3 bl 80003e8 <__aeabi_idivmod> - 8002482: 000b movs r3, r1 - 8002484: b2da uxtb r2, r3 - 8002486: 4b40 ldr r3, [pc, #256] ; (8002588 ) - 8002488: 709a strb r2, [r3, #2] + 8002900: 4ba8 ldr r3, [pc, #672] ; (8002ba4 ) + 8002902: 681b ldr r3, [r3, #0] + 8002904: 22fa movs r2, #250 ; 0xfa + 8002906: 0091 lsls r1, r2, #2 + 8002908: 0018 movs r0, r3 + 800290a: f7fd fc87 bl 800021c <__divsi3> + 800290e: 0003 movs r3, r0 + 8002910: 210a movs r1, #10 + 8002912: 0018 movs r0, r3 + 8002914: f7fd fd68 bl 80003e8 <__aeabi_idivmod> + 8002918: 000b movs r3, r1 + 800291a: b2da uxtb r2, r3 + 800291c: 4b9e ldr r3, [pc, #632] ; (8002b98 ) + 800291e: 709a strb r2, [r3, #2] dis_buff.d_num[1]=((countdown_set/10000)%10); - 800248a: 4b41 ldr r3, [pc, #260] ; (8002590 ) - 800248c: 681b ldr r3, [r3, #0] - 800248e: 4944 ldr r1, [pc, #272] ; (80025a0 ) - 8002490: 0018 movs r0, r3 - 8002492: f7fd fec3 bl 800021c <__divsi3> - 8002496: 0003 movs r3, r0 - 8002498: 210a movs r1, #10 - 800249a: 0018 movs r0, r3 - 800249c: f7fd ffa4 bl 80003e8 <__aeabi_idivmod> - 80024a0: 000b movs r3, r1 - 80024a2: b2da uxtb r2, r3 - 80024a4: 4b38 ldr r3, [pc, #224] ; (8002588 ) - 80024a6: 705a strb r2, [r3, #1] + 8002920: 4ba0 ldr r3, [pc, #640] ; (8002ba4 ) + 8002922: 681b ldr r3, [r3, #0] + 8002924: 49a0 ldr r1, [pc, #640] ; (8002ba8 ) + 8002926: 0018 movs r0, r3 + 8002928: f7fd fc78 bl 800021c <__divsi3> + 800292c: 0003 movs r3, r0 + 800292e: 210a movs r1, #10 + 8002930: 0018 movs r0, r3 + 8002932: f7fd fd59 bl 80003e8 <__aeabi_idivmod> + 8002936: 000b movs r3, r1 + 8002938: b2da uxtb r2, r3 + 800293a: 4b97 ldr r3, [pc, #604] ; (8002b98 ) + 800293c: 705a strb r2, [r3, #1] dis_buff.d_num[1]=dis_buff.d_num[1]==0?255:dis_buff.d_num[1]; - 80024a8: 4b37 ldr r3, [pc, #220] ; (8002588 ) - 80024aa: 785b ldrb r3, [r3, #1] - 80024ac: 2b00 cmp r3, #0 - 80024ae: d002 beq.n 80024b6 - 80024b0: 4b35 ldr r3, [pc, #212] ; (8002588 ) - 80024b2: 785a ldrb r2, [r3, #1] - 80024b4: e000 b.n 80024b8 - 80024b6: 22ff movs r2, #255 ; 0xff - 80024b8: 4b33 ldr r3, [pc, #204] ; (8002588 ) - 80024ba: 705a strb r2, [r3, #1] + 800293e: 4b96 ldr r3, [pc, #600] ; (8002b98 ) + 8002940: 785b ldrb r3, [r3, #1] + 8002942: 2b00 cmp r3, #0 + 8002944: d002 beq.n 800294c + 8002946: 4b94 ldr r3, [pc, #592] ; (8002b98 ) + 8002948: 785a ldrb r2, [r3, #1] + 800294a: e000 b.n 800294e + 800294c: 22ff movs r2, #255 ; 0xff + 800294e: 4b92 ldr r3, [pc, #584] ; (8002b98 ) + 8002950: 705a strb r2, [r3, #1] dis_buff.dot3=1; - 80024bc: 4b32 ldr r3, [pc, #200] ; (8002588 ) - 80024be: 791a ldrb r2, [r3, #4] - 80024c0: 2104 movs r1, #4 - 80024c2: 430a orrs r2, r1 - 80024c4: 711a strb r2, [r3, #4] + 8002952: 4b91 ldr r3, [pc, #580] ; (8002b98 ) + 8002954: 791a ldrb r2, [r3, #4] + 8002956: 2104 movs r1, #4 + 8002958: 430a orrs r2, r1 + 800295a: 711a strb r2, [r3, #4] break; - 80024c6: e006 b.n 80024d6 + 800295c: e08b b.n 8002a76 + case 5: + //overload + MOTB(0); + 800295e: 4b97 ldr r3, [pc, #604] ; (8002bbc ) + 8002960: 2200 movs r2, #0 + 8002962: 2102 movs r1, #2 + 8002964: 0018 movs r0, r3 + 8002966: f7fe fde6 bl 8001536 + MOTA(0); + 800296a: 4b94 ldr r3, [pc, #592] ; (8002bbc ) + 800296c: 2200 movs r2, #0 + 800296e: 2101 movs r1, #1 + 8002970: 0018 movs r0, r3 + 8002972: f7fe fde0 bl 8001536 + overload_times=0; + 8002976: 1cbb adds r3, r7, #2 + 8002978: 2200 movs r2, #0 + 800297a: 801a strh r2, [r3, #0] + dis_buff.d_num[3]=(countdown/100)%10; + 800297c: 4b87 ldr r3, [pc, #540] ; (8002b9c ) + 800297e: 681b ldr r3, [r3, #0] + 8002980: 2164 movs r1, #100 ; 0x64 + 8002982: 0018 movs r0, r3 + 8002984: f7fd fc4a bl 800021c <__divsi3> + 8002988: 0003 movs r3, r0 + 800298a: 210a movs r1, #10 + 800298c: 0018 movs r0, r3 + 800298e: f7fd fd2b bl 80003e8 <__aeabi_idivmod> + 8002992: 000b movs r3, r1 + 8002994: b2da uxtb r2, r3 + 8002996: 4b80 ldr r3, [pc, #512] ; (8002b98 ) + 8002998: 70da strb r2, [r3, #3] + dis_buff.d_num[2]=(countdown/1000)%10; + 800299a: 4b80 ldr r3, [pc, #512] ; (8002b9c ) + 800299c: 681b ldr r3, [r3, #0] + 800299e: 22fa movs r2, #250 ; 0xfa + 80029a0: 0091 lsls r1, r2, #2 + 80029a2: 0018 movs r0, r3 + 80029a4: f7fd fc3a bl 800021c <__divsi3> + 80029a8: 0003 movs r3, r0 + 80029aa: 210a movs r1, #10 + 80029ac: 0018 movs r0, r3 + 80029ae: f7fd fd1b bl 80003e8 <__aeabi_idivmod> + 80029b2: 000b movs r3, r1 + 80029b4: b2da uxtb r2, r3 + 80029b6: 4b78 ldr r3, [pc, #480] ; (8002b98 ) + 80029b8: 709a strb r2, [r3, #2] + dis_buff.d_num[1]=((countdown/10000)%10); + 80029ba: 4b78 ldr r3, [pc, #480] ; (8002b9c ) + 80029bc: 681b ldr r3, [r3, #0] + 80029be: 497a ldr r1, [pc, #488] ; (8002ba8 ) + 80029c0: 0018 movs r0, r3 + 80029c2: f7fd fc2b bl 800021c <__divsi3> + 80029c6: 0003 movs r3, r0 + 80029c8: 210a movs r1, #10 + 80029ca: 0018 movs r0, r3 + 80029cc: f7fd fd0c bl 80003e8 <__aeabi_idivmod> + 80029d0: 000b movs r3, r1 + 80029d2: b2da uxtb r2, r3 + 80029d4: 4b70 ldr r3, [pc, #448] ; (8002b98 ) + 80029d6: 705a strb r2, [r3, #1] + dis_buff.d_num[1]=dis_buff.d_num[1]==0?255:dis_buff.d_num[1]; + 80029d8: 4b6f ldr r3, [pc, #444] ; (8002b98 ) + 80029da: 785b ldrb r3, [r3, #1] + 80029dc: 2b00 cmp r3, #0 + 80029de: d002 beq.n 80029e6 + 80029e0: 4b6d ldr r3, [pc, #436] ; (8002b98 ) + 80029e2: 785a ldrb r2, [r3, #1] + 80029e4: e000 b.n 80029e8 + 80029e6: 22ff movs r2, #255 ; 0xff + 80029e8: 4b6b ldr r3, [pc, #428] ; (8002b98 ) + 80029ea: 705a strb r2, [r3, #1] + dis_buff.dot3=1; + 80029ec: 4b6a ldr r3, [pc, #424] ; (8002b98 ) + 80029ee: 791a ldrb r2, [r3, #4] + 80029f0: 2104 movs r1, #4 + 80029f2: 430a orrs r2, r1 + 80029f4: 711a strb r2, [r3, #4] + dis_buff.led_err=1; + 80029f6: 4b68 ldr r3, [pc, #416] ; (8002b98 ) + 80029f8: 791a ldrb r2, [r3, #4] + 80029fa: 2180 movs r1, #128 ; 0x80 + 80029fc: 4249 negs r1, r1 + 80029fe: 430a orrs r2, r1 + 8002a00: 711a strb r2, [r3, #4] + if(key4.code!=0){mode=1;} + 8002a02: 4b6f ldr r3, [pc, #444] ; (8002bc0 ) + 8002a04: 681b ldr r3, [r3, #0] + 8002a06: 2b00 cmp r3, #0 + 8002a08: d003 beq.n 8002a12 + 8002a0a: 230f movs r3, #15 + 8002a0c: 18fb adds r3, r7, r3 + 8002a0e: 2201 movs r2, #1 + 8002a10: 701a strb r2, [r3, #0] + + if(key2.code!=0) + 8002a12: 4b63 ldr r3, [pc, #396] ; (8002ba0 ) + 8002a14: 681b ldr r3, [r3, #0] + 8002a16: 2b00 cmp r3, #0 + 8002a18: d00f beq.n 8002a3a + { + mode=2; + 8002a1a: 230f movs r3, #15 + 8002a1c: 18fb adds r3, r7, r3 + 8002a1e: 2202 movs r2, #2 + 8002a20: 701a strb r2, [r3, #0] + if(overload_mode==2) + 8002a22: 230e movs r3, #14 + 8002a24: 18fb adds r3, r7, r3 + 8002a26: 781b ldrb r3, [r3, #0] + 8002a28: 2b02 cmp r3, #2 + 8002a2a: d006 beq.n 8002a3a + { + + }else + { + countdown=countdown_set-countdown; + 8002a2c: 4b5d ldr r3, [pc, #372] ; (8002ba4 ) + 8002a2e: 681a ldr r2, [r3, #0] + 8002a30: 4b5a ldr r3, [pc, #360] ; (8002b9c ) + 8002a32: 681b ldr r3, [r3, #0] + 8002a34: 1ad2 subs r2, r2, r3 + 8002a36: 4b59 ldr r3, [pc, #356] ; (8002b9c ) + 8002a38: 601a str r2, [r3, #0] + } + + } + if(key3.code!=0) + 8002a3a: 4b5c ldr r3, [pc, #368] ; (8002bac ) + 8002a3c: 681b ldr r3, [r3, #0] + 8002a3e: 2b00 cmp r3, #0 + 8002a40: d018 beq.n 8002a74 + { + mode=3; + 8002a42: 230f movs r3, #15 + 8002a44: 18fb adds r3, r7, r3 + 8002a46: 2203 movs r2, #3 + 8002a48: 701a strb r2, [r3, #0] + if(overload_mode==3) + 8002a4a: 230e movs r3, #14 + 8002a4c: 18fb adds r3, r7, r3 + 8002a4e: 781b ldrb r3, [r3, #0] + 8002a50: 2b03 cmp r3, #3 + 8002a52: d00f beq.n 8002a74 + { + + }else + { + countdown=countdown_set-countdown; + 8002a54: 4b53 ldr r3, [pc, #332] ; (8002ba4 ) + 8002a56: 681a ldr r2, [r3, #0] + 8002a58: 4b50 ldr r3, [pc, #320] ; (8002b9c ) + 8002a5a: 681b ldr r3, [r3, #0] + 8002a5c: 1ad2 subs r2, r2, r3 + 8002a5e: 4b4f ldr r3, [pc, #316] ; (8002b9c ) + 8002a60: 601a str r2, [r3, #0] + } + + } + break; - 80024c8: 46c0 nop ; (mov r8, r8) - 80024ca: e004 b.n 80024d6 + 8002a62: e007 b.n 8002a74 break; - 80024cc: 46c0 nop ; (mov r8, r8) - 80024ce: e002 b.n 80024d6 + 8002a64: 46c0 nop ; (mov r8, r8) + 8002a66: e006 b.n 8002a76 break; - 80024d0: 46c0 nop ; (mov r8, r8) - 80024d2: e000 b.n 80024d6 + 8002a68: 46c0 nop ; (mov r8, r8) + 8002a6a: e004 b.n 8002a76 break; - 80024d4: 46c0 nop ; (mov r8, r8) + 8002a6c: 46c0 nop ; (mov r8, r8) + 8002a6e: e002 b.n 8002a76 + break; + 8002a70: 46c0 nop ; (mov r8, r8) + 8002a72: e000 b.n 8002a76 + break; + 8002a74: 46c0 nop ; (mov r8, r8) } if(HAL_GetTick()>runtime) - 80024d6: f7fe f9cb bl 8000870 - 80024da: 0002 movs r2, r0 - 80024dc: 68fb ldr r3, [r7, #12] - 80024de: 4293 cmp r3, r2 - 80024e0: d217 bcs.n 8002512 + 8002a76: f7fd fefb bl 8000870 + 8002a7a: 0002 movs r2, r0 + 8002a7c: 697b ldr r3, [r7, #20] + 8002a7e: 4293 cmp r3, r2 + 8002a80: d217 bcs.n 8002ab2 { runtime+=1000; - 80024e2: 68fb ldr r3, [r7, #12] - 80024e4: 22fa movs r2, #250 ; 0xfa - 80024e6: 0092 lsls r2, r2, #2 - 80024e8: 4694 mov ip, r2 - 80024ea: 4463 add r3, ip - 80024ec: 60fb str r3, [r7, #12] + 8002a82: 697b ldr r3, [r7, #20] + 8002a84: 22fa movs r2, #250 ; 0xfa + 8002a86: 0092 lsls r2, r2, #2 + 8002a88: 4694 mov ip, r2 + 8002a8a: 4463 add r3, ip + 8002a8c: 617b str r3, [r7, #20] dis_buff.led_err=rand()%2; dis_buff.led_n=rand()%2; dis_buff.led_p=rand()%2; dis_buff.led_run=rand()%2; */ if(dis_buff.led_run==1) - 80024ee: 4b26 ldr r3, [pc, #152] ; (8002588 ) - 80024f0: 791b ldrb r3, [r3, #4] - 80024f2: 2210 movs r2, #16 - 80024f4: 4013 ands r3, r2 - 80024f6: b2db uxtb r3, r3 - 80024f8: 2b00 cmp r3, #0 - 80024fa: d005 beq.n 8002508 + 8002a8e: 4b42 ldr r3, [pc, #264] ; (8002b98 ) + 8002a90: 791b ldrb r3, [r3, #4] + 8002a92: 2210 movs r2, #16 + 8002a94: 4013 ands r3, r2 + 8002a96: b2db uxtb r3, r3 + 8002a98: 2b00 cmp r3, #0 + 8002a9a: d005 beq.n 8002aa8 { dis_buff.led_run=0; - 80024fc: 4b22 ldr r3, [pc, #136] ; (8002588 ) - 80024fe: 791a ldrb r2, [r3, #4] - 8002500: 2110 movs r1, #16 - 8002502: 438a bics r2, r1 - 8002504: 711a strb r2, [r3, #4] - 8002506: e004 b.n 8002512 + 8002a9c: 4b3e ldr r3, [pc, #248] ; (8002b98 ) + 8002a9e: 791a ldrb r2, [r3, #4] + 8002aa0: 2110 movs r1, #16 + 8002aa2: 438a bics r2, r1 + 8002aa4: 711a strb r2, [r3, #4] + 8002aa6: e004 b.n 8002ab2 }else { dis_buff.led_run=1; - 8002508: 4b1f ldr r3, [pc, #124] ; (8002588 ) - 800250a: 791a ldrb r2, [r3, #4] - 800250c: 2110 movs r1, #16 - 800250e: 430a orrs r2, r1 - 8002510: 711a strb r2, [r3, #4] + 8002aa8: 4b3b ldr r3, [pc, #236] ; (8002b98 ) + 8002aaa: 791a ldrb r2, [r3, #4] + 8002aac: 2110 movs r1, #16 + 8002aae: 430a orrs r2, r1 + 8002ab0: 711a strb r2, [r3, #4] } } - + HAL_ADC_Start(&hadc); + 8002ab2: 4b44 ldr r3, [pc, #272] ; (8002bc4 ) + 8002ab4: 0018 movs r0, r3 + 8002ab6: f7fe f825 bl 8000b04 + adc_l+=HAL_ADC_GetValue(&hadc); + 8002aba: 4b42 ldr r3, [pc, #264] ; (8002bc4 ) + 8002abc: 0018 movs r0, r3 + 8002abe: f7fe f8b5 bl 8000c2c + 8002ac2: 0002 movs r2, r0 + 8002ac4: 687b ldr r3, [r7, #4] + 8002ac6: 189b adds r3, r3, r2 + 8002ac8: 607b str r3, [r7, #4] + adc_times+=1; + 8002aca: 240a movs r4, #10 + 8002acc: 193b adds r3, r7, r4 + 8002ace: 193a adds r2, r7, r4 + 8002ad0: 8812 ldrh r2, [r2, #0] + 8002ad2: 3201 adds r2, #1 + 8002ad4: 801a strh r2, [r3, #0] + HAL_ADC_Stop(&hadc); + 8002ad6: 4b3b ldr r3, [pc, #236] ; (8002bc4 ) + 8002ad8: 0018 movs r0, r3 + 8002ada: f7fe f867 bl 8000bac + if(adc_times==32) + 8002ade: 0021 movs r1, r4 + 8002ae0: 187b adds r3, r7, r1 + 8002ae2: 881b ldrh r3, [r3, #0] + 8002ae4: 2b20 cmp r3, #32 + 8002ae6: d109 bne.n 8002afc + { + adc=adc_l>>5; + 8002ae8: 687b ldr r3, [r7, #4] + 8002aea: 095a lsrs r2, r3, #5 + 8002aec: 230c movs r3, #12 + 8002aee: 18fb adds r3, r7, r3 + 8002af0: 801a strh r2, [r3, #0] + adc_times=0; + 8002af2: 187b adds r3, r7, r1 + 8002af4: 2200 movs r2, #0 + 8002af6: 801a strh r2, [r3, #0] + adc_l=0; + 8002af8: 2300 movs r3, #0 + 8002afa: 607b str r3, [r7, #4] + } + if(adc>600) + 8002afc: 230c movs r3, #12 + 8002afe: 18fb adds r3, r7, r3 + 8002b00: 881a ldrh r2, [r3, #0] + 8002b02: 2396 movs r3, #150 ; 0x96 + 8002b04: 009b lsls r3, r3, #2 + 8002b06: 429a cmp r2, r3 + 8002b08: d905 bls.n 8002b16 + { + GEI_BUTTON_CODE(&overload,1); + 8002b0a: 4b2f ldr r3, [pc, #188] ; (8002bc8 ) + 8002b0c: 2101 movs r1, #1 + 8002b0e: 0018 movs r0, r3 + 8002b10: f7ff f97a bl 8001e08 + 8002b14: e004 b.n 8002b20 + }else + { + GEI_BUTTON_CODE(&overload,0); + 8002b16: 4b2c ldr r3, [pc, #176] ; (8002bc8 ) + 8002b18: 2100 movs r1, #0 + 8002b1a: 0018 movs r0, r3 + 8002b1c: f7ff f974 bl 8001e08 + } GEI_BUTTON_CODE(&key1,KEY1); - 8002512: 2390 movs r3, #144 ; 0x90 - 8002514: 05db lsls r3, r3, #23 - 8002516: 2180 movs r1, #128 ; 0x80 - 8002518: 0018 movs r0, r3 - 800251a: f7fe fe0d bl 8001138 - 800251e: 0003 movs r3, r0 - 8002520: 001a movs r2, r3 - 8002522: 4b23 ldr r3, [pc, #140] ; (80025b0 ) - 8002524: 0011 movs r1, r2 - 8002526: 0018 movs r0, r3 - 8002528: f7ff fa8c bl 8001a44 + 8002b20: 2390 movs r3, #144 ; 0x90 + 8002b22: 05db lsls r3, r3, #23 + 8002b24: 2180 movs r1, #128 ; 0x80 + 8002b26: 0018 movs r0, r3 + 8002b28: f7fe fce8 bl 80014fc + 8002b2c: 0003 movs r3, r0 + 8002b2e: 001a movs r2, r3 + 8002b30: 4b21 ldr r3, [pc, #132] ; (8002bb8 ) + 8002b32: 0011 movs r1, r2 + 8002b34: 0018 movs r0, r3 + 8002b36: f7ff f967 bl 8001e08 GEI_BUTTON_CODE(&key2,KEY2); - 800252c: 2380 movs r3, #128 ; 0x80 - 800252e: 009a lsls r2, r3, #2 - 8002530: 2390 movs r3, #144 ; 0x90 - 8002532: 05db lsls r3, r3, #23 - 8002534: 0011 movs r1, r2 - 8002536: 0018 movs r0, r3 - 8002538: f7fe fdfe bl 8001138 - 800253c: 0003 movs r3, r0 - 800253e: 001a movs r2, r3 - 8002540: 4b18 ldr r3, [pc, #96] ; (80025a4 ) - 8002542: 0011 movs r1, r2 - 8002544: 0018 movs r0, r3 - 8002546: f7ff fa7d bl 8001a44 + 8002b3a: 2380 movs r3, #128 ; 0x80 + 8002b3c: 009a lsls r2, r3, #2 + 8002b3e: 2390 movs r3, #144 ; 0x90 + 8002b40: 05db lsls r3, r3, #23 + 8002b42: 0011 movs r1, r2 + 8002b44: 0018 movs r0, r3 + 8002b46: f7fe fcd9 bl 80014fc + 8002b4a: 0003 movs r3, r0 + 8002b4c: 001a movs r2, r3 + 8002b4e: 4b14 ldr r3, [pc, #80] ; (8002ba0 ) + 8002b50: 0011 movs r1, r2 + 8002b52: 0018 movs r0, r3 + 8002b54: f7ff f958 bl 8001e08 GEI_BUTTON_CODE(&key3,KEY3); - 800254a: 2380 movs r3, #128 ; 0x80 - 800254c: 00da lsls r2, r3, #3 - 800254e: 2390 movs r3, #144 ; 0x90 - 8002550: 05db lsls r3, r3, #23 - 8002552: 0011 movs r1, r2 - 8002554: 0018 movs r0, r3 - 8002556: f7fe fdef bl 8001138 - 800255a: 0003 movs r3, r0 - 800255c: 001a movs r2, r3 - 800255e: 4b0b ldr r3, [pc, #44] ; (800258c ) - 8002560: 0011 movs r1, r2 - 8002562: 0018 movs r0, r3 - 8002564: f7ff fa6e bl 8001a44 + 8002b58: 2380 movs r3, #128 ; 0x80 + 8002b5a: 00da lsls r2, r3, #3 + 8002b5c: 2390 movs r3, #144 ; 0x90 + 8002b5e: 05db lsls r3, r3, #23 + 8002b60: 0011 movs r1, r2 + 8002b62: 0018 movs r0, r3 + 8002b64: f7fe fcca bl 80014fc + 8002b68: 0003 movs r3, r0 + 8002b6a: 001a movs r2, r3 + 8002b6c: 4b0f ldr r3, [pc, #60] ; (8002bac ) + 8002b6e: 0011 movs r1, r2 + 8002b70: 0018 movs r0, r3 + 8002b72: f7ff f949 bl 8001e08 GEI_BUTTON_CODE(&key4,KEY4); - 8002568: 2390 movs r3, #144 ; 0x90 - 800256a: 05db lsls r3, r3, #23 - 800256c: 2140 movs r1, #64 ; 0x40 - 800256e: 0018 movs r0, r3 - 8002570: f7fe fde2 bl 8001138 - 8002574: 0003 movs r3, r0 - 8002576: 001a movs r2, r3 - 8002578: 4b07 ldr r3, [pc, #28] ; (8002598 ) - 800257a: 0011 movs r1, r2 - 800257c: 0018 movs r0, r3 - 800257e: f7ff fa61 bl 8001a44 + 8002b76: 2390 movs r3, #144 ; 0x90 + 8002b78: 05db lsls r3, r3, #23 + 8002b7a: 2140 movs r1, #64 ; 0x40 + 8002b7c: 0018 movs r0, r3 + 8002b7e: f7fe fcbd bl 80014fc + 8002b82: 0003 movs r3, r0 + 8002b84: 001a movs r2, r3 + 8002b86: 4b0e ldr r3, [pc, #56] ; (8002bc0 ) + 8002b88: 0011 movs r1, r2 + 8002b8a: 0018 movs r0, r3 + 8002b8c: f7ff f93c bl 8001e08 display(); - 8002582: f7ff fb35 bl 8001bf0 + 8002b90: f7ff fa10 bl 8001fb4 switch(mode) - 8002586: e484 b.n 8001e92 - 8002588: 20000084 .word 0x20000084 - 800258c: 2000009c .word 0x2000009c - 8002590: 2000000c .word 0x2000000c - 8002594: 2000002c .word 0x2000002c - 8002598: 20000074 .word 0x20000074 - 800259c: 48001400 .word 0x48001400 - 80025a0: 00002710 .word 0x00002710 - 80025a4: 200000ac .word 0x200000ac - 80025a8: fffffc18 .word 0xfffffc18 - 80025ac: 0000ea60 .word 0x0000ea60 - 80025b0: 2000008c .word 0x2000008c + 8002b94: f7ff fb6b bl 800226e + 8002b98: 20000084 .word 0x20000084 + 8002b9c: 2000002c .word 0x2000002c + 8002ba0: 200000bc .word 0x200000bc + 8002ba4: 2000000c .word 0x2000000c + 8002ba8: 00002710 .word 0x00002710 + 8002bac: 200000ac .word 0x200000ac + 8002bb0: fffffc18 .word 0xfffffc18 + 8002bb4: 0000ea60 .word 0x0000ea60 + 8002bb8: 2000008c .word 0x2000008c + 8002bbc: 48001400 .word 0x48001400 + 8002bc0: 20000074 .word 0x20000074 + 8002bc4: 20000030 .word 0x20000030 + 8002bc8: 2000009c .word 0x2000009c -080025b4 <__libc_init_array>: - 80025b4: b570 push {r4, r5, r6, lr} - 80025b6: 2600 movs r6, #0 - 80025b8: 4d0c ldr r5, [pc, #48] ; (80025ec <__libc_init_array+0x38>) - 80025ba: 4c0d ldr r4, [pc, #52] ; (80025f0 <__libc_init_array+0x3c>) - 80025bc: 1b64 subs r4, r4, r5 - 80025be: 10a4 asrs r4, r4, #2 - 80025c0: 42a6 cmp r6, r4 - 80025c2: d109 bne.n 80025d8 <__libc_init_array+0x24> - 80025c4: 2600 movs r6, #0 - 80025c6: f000 f821 bl 800260c <_init> - 80025ca: 4d0a ldr r5, [pc, #40] ; (80025f4 <__libc_init_array+0x40>) - 80025cc: 4c0a ldr r4, [pc, #40] ; (80025f8 <__libc_init_array+0x44>) - 80025ce: 1b64 subs r4, r4, r5 - 80025d0: 10a4 asrs r4, r4, #2 - 80025d2: 42a6 cmp r6, r4 - 80025d4: d105 bne.n 80025e2 <__libc_init_array+0x2e> - 80025d6: bd70 pop {r4, r5, r6, pc} - 80025d8: 00b3 lsls r3, r6, #2 - 80025da: 58eb ldr r3, [r5, r3] - 80025dc: 4798 blx r3 - 80025de: 3601 adds r6, #1 - 80025e0: e7ee b.n 80025c0 <__libc_init_array+0xc> - 80025e2: 00b3 lsls r3, r6, #2 - 80025e4: 58eb ldr r3, [r5, r3] - 80025e6: 4798 blx r3 - 80025e8: 3601 adds r6, #1 - 80025ea: e7f2 b.n 80025d2 <__libc_init_array+0x1e> - 80025ec: 0800267c .word 0x0800267c - 80025f0: 0800267c .word 0x0800267c - 80025f4: 0800267c .word 0x0800267c - 80025f8: 08002680 .word 0x08002680 +08002bcc <__libc_init_array>: + 8002bcc: b570 push {r4, r5, r6, lr} + 8002bce: 2600 movs r6, #0 + 8002bd0: 4d0c ldr r5, [pc, #48] ; (8002c04 <__libc_init_array+0x38>) + 8002bd2: 4c0d ldr r4, [pc, #52] ; (8002c08 <__libc_init_array+0x3c>) + 8002bd4: 1b64 subs r4, r4, r5 + 8002bd6: 10a4 asrs r4, r4, #2 + 8002bd8: 42a6 cmp r6, r4 + 8002bda: d109 bne.n 8002bf0 <__libc_init_array+0x24> + 8002bdc: 2600 movs r6, #0 + 8002bde: f000 f821 bl 8002c24 <_init> + 8002be2: 4d0a ldr r5, [pc, #40] ; (8002c0c <__libc_init_array+0x40>) + 8002be4: 4c0a ldr r4, [pc, #40] ; (8002c10 <__libc_init_array+0x44>) + 8002be6: 1b64 subs r4, r4, r5 + 8002be8: 10a4 asrs r4, r4, #2 + 8002bea: 42a6 cmp r6, r4 + 8002bec: d105 bne.n 8002bfa <__libc_init_array+0x2e> + 8002bee: bd70 pop {r4, r5, r6, pc} + 8002bf0: 00b3 lsls r3, r6, #2 + 8002bf2: 58eb ldr r3, [r5, r3] + 8002bf4: 4798 blx r3 + 8002bf6: 3601 adds r6, #1 + 8002bf8: e7ee b.n 8002bd8 <__libc_init_array+0xc> + 8002bfa: 00b3 lsls r3, r6, #2 + 8002bfc: 58eb ldr r3, [r5, r3] + 8002bfe: 4798 blx r3 + 8002c00: 3601 adds r6, #1 + 8002c02: e7f2 b.n 8002bea <__libc_init_array+0x1e> + 8002c04: 08002c98 .word 0x08002c98 + 8002c08: 08002c98 .word 0x08002c98 + 8002c0c: 08002c98 .word 0x08002c98 + 8002c10: 08002c9c .word 0x08002c9c -080025fc : - 80025fc: 0003 movs r3, r0 - 80025fe: 1882 adds r2, r0, r2 - 8002600: 4293 cmp r3, r2 - 8002602: d100 bne.n 8002606 - 8002604: 4770 bx lr - 8002606: 7019 strb r1, [r3, #0] - 8002608: 3301 adds r3, #1 - 800260a: e7f9 b.n 8002600 +08002c14 : + 8002c14: 0003 movs r3, r0 + 8002c16: 1882 adds r2, r0, r2 + 8002c18: 4293 cmp r3, r2 + 8002c1a: d100 bne.n 8002c1e + 8002c1c: 4770 bx lr + 8002c1e: 7019 strb r1, [r3, #0] + 8002c20: 3301 adds r3, #1 + 8002c22: e7f9 b.n 8002c18 -0800260c <_init>: - 800260c: b5f8 push {r3, r4, r5, r6, r7, lr} - 800260e: 46c0 nop ; (mov r8, r8) - 8002610: bcf8 pop {r3, r4, r5, r6, r7} - 8002612: bc08 pop {r3} - 8002614: 469e mov lr, r3 - 8002616: 4770 bx lr +08002c24 <_init>: + 8002c24: b5f8 push {r3, r4, r5, r6, r7, lr} + 8002c26: 46c0 nop ; (mov r8, r8) + 8002c28: bcf8 pop {r3, r4, r5, r6, r7} + 8002c2a: bc08 pop {r3} + 8002c2c: 469e mov lr, r3 + 8002c2e: 4770 bx lr -08002618 <_fini>: - 8002618: b5f8 push {r3, r4, r5, r6, r7, lr} - 800261a: 46c0 nop ; (mov r8, r8) - 800261c: bcf8 pop {r3, r4, r5, r6, r7} - 800261e: bc08 pop {r3} - 8002620: 469e mov lr, r3 - 8002622: 4770 bx lr +08002c30 <_fini>: + 8002c30: b5f8 push {r3, r4, r5, r6, r7, lr} + 8002c32: 46c0 nop ; (mov r8, r8) + 8002c34: bcf8 pop {r3, r4, r5, r6, r7} + 8002c36: bc08 pop {r3} + 8002c38: 469e mov lr, r3 + 8002c3a: 4770 bx lr diff --git a/Debug/Motor_Controller.map b/Debug/Motor_Controller.map index 33204e9..ed94566 100644 --- a/Debug/Motor_Controller.map +++ b/Debug/Motor_Controller.map @@ -25,6 +25,7 @@ uwTick 0x4 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0 pFlash 0x20 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o dis_buff 0x5 ./My_Soul/my_main.o key1 0x10 ./My_Soul/my_main.o +overload 0x10 ./My_Soul/my_main.o key3 0x10 ./My_Soul/my_main.o key2 0x10 ./My_Soul/my_main.o hadc 0x40 ./Core/Src/main.o @@ -690,10 +691,6 @@ Discarded input sections 0x0000000000000000 0x10 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o .text.HAL_ADC_MspDeInit 0x0000000000000000 0x10 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o - .text.HAL_ADC_Start - 0x0000000000000000 0xa8 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o - .text.HAL_ADC_Stop - 0x0000000000000000 0x80 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o .text.HAL_ADC_PollForConversion 0x0000000000000000 0x130 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o .text.HAL_ADC_PollForEvent @@ -706,8 +703,6 @@ Discarded input sections 0x0000000000000000 0x104 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o .text.HAL_ADC_Stop_DMA 0x0000000000000000 0xec ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o - .text.HAL_ADC_GetValue - 0x0000000000000000 0x16 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o .text.HAL_ADC_IRQHandler 0x0000000000000000 0x170 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o .text.HAL_ADC_ConvCpltCallback @@ -724,12 +719,6 @@ Discarded input sections 0x0000000000000000 0x14 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o .text.HAL_ADC_GetError 0x0000000000000000 0x14 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o - .text.ADC_Enable - 0x0000000000000000 0x108 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o - .text.ADC_Disable - 0x0000000000000000 0xe2 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o - .text.ADC_ConversionStop - 0x0000000000000000 0x98 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o .text.ADC_DMAConvCplt 0x0000000000000000 0xb4 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o .text.ADC_DMAHalfConvCplt @@ -2746,7 +2735,7 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id 0x0000000008000000 g_pfnVectors 0x00000000080000c0 . = ALIGN (0x4) -.text 0x00000000080000c0 0x2564 +.text 0x00000000080000c0 0x2b7c 0x00000000080000c0 . = ALIGN (0x4) *(.text) .text 0x00000000080000c0 0x48 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o @@ -2842,136 +2831,153 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id .text.HAL_ADC_Init 0x0000000008000884 0x280 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o 0x0000000008000884 HAL_ADC_Init + .text.HAL_ADC_Start + 0x0000000008000b04 0xa8 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + 0x0000000008000b04 HAL_ADC_Start + .text.HAL_ADC_Stop + 0x0000000008000bac 0x80 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + 0x0000000008000bac HAL_ADC_Stop + .text.HAL_ADC_GetValue + 0x0000000008000c2c 0x16 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + 0x0000000008000c2c HAL_ADC_GetValue + *fill* 0x0000000008000c42 0x2 .text.HAL_ADC_ConfigChannel - 0x0000000008000b04 0x1ec ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o - 0x0000000008000b04 HAL_ADC_ConfigChannel + 0x0000000008000c44 0x1ec ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + 0x0000000008000c44 HAL_ADC_ConfigChannel + .text.ADC_Enable + 0x0000000008000e30 0x108 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .text.ADC_Disable + 0x0000000008000f38 0xe2 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .text.ADC_ConversionStop + 0x000000000800101a 0x98 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + *fill* 0x00000000080010b2 0x2 .text.__NVIC_SetPriority - 0x0000000008000cf0 0xdc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + 0x00000000080010b4 0xdc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .text.SysTick_Config - 0x0000000008000dcc 0x48 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + 0x0000000008001190 0x48 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .text.HAL_NVIC_SetPriority - 0x0000000008000e14 0x2a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o - 0x0000000008000e14 HAL_NVIC_SetPriority + 0x00000000080011d8 0x2a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + 0x00000000080011d8 HAL_NVIC_SetPriority .text.HAL_SYSTICK_Config - 0x0000000008000e3e 0x1a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o - 0x0000000008000e3e HAL_SYSTICK_Config + 0x0000000008001202 0x1a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + 0x0000000008001202 HAL_SYSTICK_Config .text.HAL_GPIO_Init - 0x0000000008000e58 0x2e0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o - 0x0000000008000e58 HAL_GPIO_Init + 0x000000000800121c 0x2e0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + 0x000000000800121c HAL_GPIO_Init .text.HAL_GPIO_ReadPin - 0x0000000008001138 0x3a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o - 0x0000000008001138 HAL_GPIO_ReadPin + 0x00000000080014fc 0x3a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + 0x00000000080014fc HAL_GPIO_ReadPin .text.HAL_GPIO_WritePin - 0x0000000008001172 0x3a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o - 0x0000000008001172 HAL_GPIO_WritePin + 0x0000000008001536 0x3a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + 0x0000000008001536 HAL_GPIO_WritePin .text.HAL_RCC_OscConfig - 0x00000000080011ac 0x634 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o - 0x00000000080011ac HAL_RCC_OscConfig + 0x0000000008001570 0x634 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + 0x0000000008001570 HAL_RCC_OscConfig .text.HAL_RCC_ClockConfig - 0x00000000080017e0 0x19c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o - 0x00000000080017e0 HAL_RCC_ClockConfig + 0x0000000008001ba4 0x19c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + 0x0000000008001ba4 HAL_RCC_ClockConfig .text.HAL_RCC_GetSysClockFreq - 0x000000000800197c 0xc8 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o - 0x000000000800197c HAL_RCC_GetSysClockFreq + 0x0000000008001d40 0xc8 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + 0x0000000008001d40 HAL_RCC_GetSysClockFreq .text.GEI_BUTTON_CODE - 0x0000000008001a44 0xbc ./My_Soul/button.o - 0x0000000008001a44 GEI_BUTTON_CODE + 0x0000000008001e08 0xbc ./My_Soul/button.o + 0x0000000008001e08 GEI_BUTTON_CODE .text.Send_to_595 - 0x0000000008001b00 0xee ./My_Soul/my_main.o - 0x0000000008001b00 Send_to_595 - *fill* 0x0000000008001bee 0x2 - .text.display 0x0000000008001bf0 0x22c ./My_Soul/my_main.o - 0x0000000008001bf0 display - .text.mymain 0x0000000008001e1c 0x798 ./My_Soul/my_main.o - 0x0000000008001e1c mymain + 0x0000000008001ec4 0xee ./My_Soul/my_main.o + 0x0000000008001ec4 Send_to_595 + *fill* 0x0000000008001fb2 0x2 + .text.display 0x0000000008001fb4 0x22c ./My_Soul/my_main.o + 0x0000000008001fb4 display + .text.mymain 0x00000000080021e0 0x9ec ./My_Soul/my_main.o + 0x00000000080021e0 mymain .text.__libc_init_array - 0x00000000080025b4 0x48 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-init.o) - 0x00000000080025b4 __libc_init_array - .text.memset 0x00000000080025fc 0x10 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-memset.o) - 0x00000000080025fc memset + 0x0000000008002bcc 0x48 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-init.o) + 0x0000000008002bcc __libc_init_array + .text.memset 0x0000000008002c14 0x10 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-memset.o) + 0x0000000008002c14 memset *(.glue_7) - .glue_7 0x000000000800260c 0x0 linker stubs + .glue_7 0x0000000008002c24 0x0 linker stubs *(.glue_7t) - .glue_7t 0x000000000800260c 0x0 linker stubs + .glue_7t 0x0000000008002c24 0x0 linker stubs *(.eh_frame) - .eh_frame 0x000000000800260c 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o + .eh_frame 0x0000000008002c24 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o *(.init) - .init 0x000000000800260c 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crti.o - 0x000000000800260c _init - .init 0x0000000008002610 0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtn.o + .init 0x0000000008002c24 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crti.o + 0x0000000008002c24 _init + .init 0x0000000008002c28 0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtn.o *(.fini) - .fini 0x0000000008002618 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crti.o - 0x0000000008002618 _fini - .fini 0x000000000800261c 0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtn.o - 0x0000000008002624 . = ALIGN (0x4) - 0x0000000008002624 _etext = . + .fini 0x0000000008002c30 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crti.o + 0x0000000008002c30 _fini + .fini 0x0000000008002c34 0x8 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtn.o + 0x0000000008002c3c . = ALIGN (0x4) + 0x0000000008002c3c _etext = . -.vfp11_veneer 0x0000000008002624 0x0 - .vfp11_veneer 0x0000000008002624 0x0 linker stubs +.vfp11_veneer 0x0000000008002c3c 0x0 + .vfp11_veneer 0x0000000008002c3c 0x0 linker stubs -.v4_bx 0x0000000008002624 0x0 - .v4_bx 0x0000000008002624 0x0 linker stubs +.v4_bx 0x0000000008002c3c 0x0 + .v4_bx 0x0000000008002c3c 0x0 linker stubs -.iplt 0x0000000008002624 0x0 - .iplt 0x0000000008002624 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o +.iplt 0x0000000008002c3c 0x0 + .iplt 0x0000000008002c3c 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o -.rodata 0x0000000008002624 0x58 - 0x0000000008002624 . = ALIGN (0x4) +.rodata 0x0000000008002c3c 0x5c + 0x0000000008002c3c . = ALIGN (0x4) *(.rodata) - .rodata 0x0000000008002624 0x20 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + .rodata 0x0000000008002c3c 0x20 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o *(.rodata*) .rodata.AHBPrescTable - 0x0000000008002644 0x10 ./Core/Src/system_stm32f0xx.o - 0x0000000008002644 AHBPrescTable + 0x0000000008002c5c 0x10 ./Core/Src/system_stm32f0xx.o + 0x0000000008002c5c AHBPrescTable .rodata.d_num_data - 0x0000000008002654 0x14 ./My_Soul/my_main.o - 0x0000000008002654 d_num_data + 0x0000000008002c6c 0x14 ./My_Soul/my_main.o + 0x0000000008002c6c d_num_data .rodata.mymain - 0x0000000008002668 0x14 ./My_Soul/my_main.o - 0x000000000800267c . = ALIGN (0x4) + 0x0000000008002c80 0x18 ./My_Soul/my_main.o + 0x0000000008002c98 . = ALIGN (0x4) -.rel.dyn 0x000000000800267c 0x0 - .rel.iplt 0x000000000800267c 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o +.rel.dyn 0x0000000008002c98 0x0 + .rel.iplt 0x0000000008002c98 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o -.ARM.extab 0x000000000800267c 0x0 - 0x000000000800267c . = ALIGN (0x4) +.ARM.extab 0x0000000008002c98 0x0 + 0x0000000008002c98 . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x000000000800267c . = ALIGN (0x4) + 0x0000000008002c98 . = ALIGN (0x4) -.ARM 0x000000000800267c 0x0 - 0x000000000800267c . = ALIGN (0x4) - 0x000000000800267c __exidx_start = . +.ARM 0x0000000008002c98 0x0 + 0x0000000008002c98 . = ALIGN (0x4) + 0x0000000008002c98 __exidx_start = . *(.ARM.exidx*) - 0x000000000800267c __exidx_end = . - 0x000000000800267c . = ALIGN (0x4) + 0x0000000008002c98 __exidx_end = . + 0x0000000008002c98 . = ALIGN (0x4) -.preinit_array 0x000000000800267c 0x0 - 0x000000000800267c . = ALIGN (0x4) - 0x000000000800267c PROVIDE (__preinit_array_start = .) +.preinit_array 0x0000000008002c98 0x0 + 0x0000000008002c98 . = ALIGN (0x4) + 0x0000000008002c98 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x000000000800267c PROVIDE (__preinit_array_end = .) - 0x000000000800267c . = ALIGN (0x4) + 0x0000000008002c98 PROVIDE (__preinit_array_end = .) + 0x0000000008002c98 . = ALIGN (0x4) -.init_array 0x000000000800267c 0x4 - 0x000000000800267c . = ALIGN (0x4) - 0x000000000800267c PROVIDE (__init_array_start = .) +.init_array 0x0000000008002c98 0x4 + 0x0000000008002c98 . = ALIGN (0x4) + 0x0000000008002c98 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x000000000800267c 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o - 0x0000000008002680 PROVIDE (__init_array_end = .) - 0x0000000008002680 . = ALIGN (0x4) + .init_array 0x0000000008002c98 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o + 0x0000000008002c9c PROVIDE (__init_array_end = .) + 0x0000000008002c9c . = ALIGN (0x4) -.fini_array 0x0000000008002680 0x4 - 0x0000000008002680 . = ALIGN (0x4) +.fini_array 0x0000000008002c9c 0x4 + 0x0000000008002c9c . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x0000000008002680 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o + .fini_array 0x0000000008002c9c 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x0000000008002684 . = ALIGN (0x4) - 0x0000000008002684 _sidata = LOADADDR (.data) + 0x0000000008002ca0 . = ALIGN (0x4) + 0x0000000008002ca0 _sidata = LOADADDR (.data) -.data 0x0000000020000000 0x10 load address 0x0000000008002684 +.data 0x0000000020000000 0x10 load address 0x0000000008002ca0 0x0000000020000000 . = ALIGN (0x4) 0x0000000020000000 _sdata = . *(.data) @@ -2994,11 +3000,11 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id 0x0000000020000010 . = ALIGN (0x4) 0x0000000020000010 _edata = . -.igot.plt 0x0000000020000010 0x0 load address 0x0000000008002694 +.igot.plt 0x0000000020000010 0x0 load address 0x0000000008002cb0 .igot.plt 0x0000000020000010 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o 0x0000000020000010 . = ALIGN (0x4) -.bss 0x0000000020000010 0xac load address 0x0000000008002694 +.bss 0x0000000020000010 0xbc load address 0x0000000008002cb0 0x0000000020000010 _sbss = . 0x0000000020000010 __bss_start__ = _sbss *(.bss) @@ -3012,27 +3018,28 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id 0x0000000020000030 hadc COMMON 0x0000000020000070 0x4 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o 0x0000000020000070 uwTick - COMMON 0x0000000020000074 0x48 ./My_Soul/my_main.o + COMMON 0x0000000020000074 0x58 ./My_Soul/my_main.o 0x0000000020000074 key4 0x0000000020000084 dis_buff 0x000000002000008c key1 - 0x000000002000009c key3 - 0x00000000200000ac key2 - 0x00000000200000bc . = ALIGN (0x4) - 0x00000000200000bc _ebss = . - 0x00000000200000bc __bss_end__ = _ebss + 0x000000002000009c overload + 0x00000000200000ac key3 + 0x00000000200000bc key2 + 0x00000000200000cc . = ALIGN (0x4) + 0x00000000200000cc _ebss = . + 0x00000000200000cc __bss_end__ = _ebss ._user_heap_stack - 0x00000000200000bc 0x804 load address 0x0000000008002694 - 0x00000000200000c0 . = ALIGN (0x8) - *fill* 0x00000000200000bc 0x4 + 0x00000000200000cc 0x804 load address 0x0000000008002cb0 + 0x00000000200000d0 . = ALIGN (0x8) + *fill* 0x00000000200000cc 0x4 [!provide] PROVIDE (end = .) - 0x00000000200000c0 PROVIDE (_end = .) - 0x00000000200004c0 . = (. + _Min_Heap_Size) - *fill* 0x00000000200000c0 0x400 - 0x00000000200008c0 . = (. + _Min_Stack_Size) - *fill* 0x00000000200004c0 0x400 - 0x00000000200008c0 . = ALIGN (0x8) + 0x00000000200000d0 PROVIDE (_end = .) + 0x00000000200004d0 . = (. + _Min_Heap_Size) + *fill* 0x00000000200000d0 0x400 + 0x00000000200008d0 . = (. + _Min_Stack_Size) + *fill* 0x00000000200004d0 0x400 + 0x00000000200008d0 . = ALIGN (0x8) /DISCARD/ libc.a(*) @@ -3088,7 +3095,7 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libm.a LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a -.debug_info 0x0000000000000000 0x4910 +.debug_info 0x0000000000000000 0x4dc5 .debug_info 0x0000000000000000 0xa5a ./Core/Src/main.o .debug_info 0x0000000000000a5a 0x888 ./Core/Src/stm32f0xx_hal_msp.o .debug_info 0x00000000000012e2 0x1b3 ./Core/Src/stm32f0xx_it.o @@ -3100,9 +3107,9 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id .debug_info 0x000000000000333a 0x6d3 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .debug_info 0x0000000000003a0d 0x88d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .debug_info 0x000000000000429a 0x1d4 ./My_Soul/button.o - .debug_info 0x000000000000446e 0x4a2 ./My_Soul/my_main.o + .debug_info 0x000000000000446e 0x957 ./My_Soul/my_main.o -.debug_abbrev 0x0000000000000000 0x1342 +.debug_abbrev 0x0000000000000000 0x1353 .debug_abbrev 0x0000000000000000 0x208 ./Core/Src/main.o .debug_abbrev 0x0000000000000208 0x1ac ./Core/Src/stm32f0xx_hal_msp.o .debug_abbrev 0x00000000000003b4 0xd2 ./Core/Src/stm32f0xx_it.o @@ -3114,7 +3121,7 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id .debug_abbrev 0x0000000000000c95 0x1e8 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .debug_abbrev 0x0000000000000e7d 0x23b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .debug_abbrev 0x00000000000010b8 0xf6 ./My_Soul/button.o - .debug_abbrev 0x00000000000011ae 0x194 ./My_Soul/my_main.o + .debug_abbrev 0x00000000000011ae 0x1a5 ./My_Soul/my_main.o .debug_aranges 0x0000000000000000 0x4b0 .debug_aranges @@ -3208,7 +3215,7 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id .debug_macro 0x000000000000e563 0x1cc ./My_Soul/button.o .debug_macro 0x000000000000e72f 0x206 ./My_Soul/my_main.o -.debug_line 0x0000000000000000 0x6e34 +.debug_line 0x0000000000000000 0x6f12 .debug_line 0x0000000000000000 0x844 ./Core/Src/main.o .debug_line 0x0000000000000844 0x727 ./Core/Src/stm32f0xx_hal_msp.o .debug_line 0x0000000000000f6b 0x744 ./Core/Src/stm32f0xx_it.o @@ -3220,9 +3227,9 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id .debug_line 0x000000000000435c 0xad7 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .debug_line 0x0000000000004e33 0xd46 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .debug_line 0x0000000000005b79 0x736 ./My_Soul/button.o - .debug_line 0x00000000000062af 0xb85 ./My_Soul/my_main.o + .debug_line 0x00000000000062af 0xc63 ./My_Soul/my_main.o -.debug_str 0x0000000000000000 0x56677 +.debug_str 0x0000000000000000 0x566a2 .debug_str 0x0000000000000000 0x554fa ./Core/Src/main.o 0x557e3 (size before relaxing) .debug_str 0x00000000000554fa 0x4e ./Core/Src/stm32f0xx_hal_msp.o @@ -3243,10 +3250,10 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id 0x5529d (size before relaxing) .debug_str 0x0000000000056125 0x240 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o 0x554c8 (size before relaxing) - .debug_str 0x0000000000056365 0x47 ./My_Soul/button.o + .debug_str 0x0000000000056365 0x41 ./My_Soul/button.o 0x551f7 (size before relaxing) - .debug_str 0x00000000000563ac 0x2cb ./My_Soul/my_main.o - 0x554ea (size before relaxing) + .debug_str 0x00000000000563a6 0x2fc ./My_Soul/my_main.o + 0x5588c (size before relaxing) .comment 0x0000000000000000 0x53 .comment 0x0000000000000000 0x53 ./Core/Src/main.o diff --git a/Debug/My_Soul/my_main.su b/Debug/My_Soul/my_main.su index ef97ff0..5ad3398 100644 --- a/Debug/My_Soul/my_main.su +++ b/Debug/My_Soul/my_main.su @@ -1,3 +1,3 @@ -my_main.c:43:6:Send_to_595 24 static -my_main.c:76:6:display 16 static -my_main.c:141:6:mymain 24 static +my_main.c:44:6:Send_to_595 24 static +my_main.c:77:6:display 16 static +my_main.c:142:6:mymain 40 static diff --git a/My_Soul/my_main.c b/My_Soul/my_main.c index a1afc43..7c411e5 100644 --- a/My_Soul/my_main.c +++ b/My_Soul/my_main.c @@ -19,8 +19,9 @@ #define KEY2 HAL_GPIO_ReadPin(KEY3_GPIO_Port, KEY3_Pin) #define KEY3 HAL_GPIO_ReadPin(KEY4_GPIO_Port, KEY4_Pin) -struct button key1,key2,key3,key4; +struct button key1,key2,key3,key4,overload; +extern ADC_HandleTypeDef hadc; const char d_num_data[2][10]= { {0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f}, @@ -141,9 +142,10 @@ long countdown_set=15000; void mymain() { uint32_t runtime=0,move=0; - uint8_t mode=0; - uint16_t adc; - + uint8_t mode=0,overload_mode=0; + uint16_t adc,adc_times=0; + uint32_t adc_l; + uint16_t overload_times=0; MOTA(0); MOTB(0); HC595_DCK(0); @@ -159,6 +161,7 @@ void mymain() while(1) { + switch(mode) { case 0: @@ -172,6 +175,10 @@ void mymain() mode=1; } + HAL_ADC_Start(&hadc); + HAL_ADC_GetValue(&hadc); + HAL_ADC_Stop(&hadc); + dis_buff.d_num[0]=((countdown/100)%10); dis_buff.d_num[1]=((countdown/100)%10); dis_buff.d_num[2]=((countdown/100)%10); @@ -202,7 +209,7 @@ void mymain() dis_buff.dot2=0; dis_buff.dot3=0; dis_buff.dot4=0; - + overload_times=0; if(key2.code!=0) { mode=2; @@ -249,10 +256,19 @@ void mymain() mode=3; countdown=countdown_set-countdown; } - if(key4.code!=0) + if(key4.code<0) { mode=1; } + if(overload.code!=0) + { + overload_times+=1; + } + if(overload_times>2) + { + overload_mode=2; + mode=5; + } break; case 3: MOTB(0); @@ -284,10 +300,19 @@ void mymain() mode=2; countdown=countdown_set-countdown; } - if(key4.code!=0) + if(key4.code<0) { mode=1; } + if(overload.code!=0) + { + overload_times+=1; + } + if(overload_times>2) + { + overload_mode=3; + mode=5; + } break; case 4: //setting mode @@ -324,6 +349,45 @@ void mymain() dis_buff.d_num[1]=dis_buff.d_num[1]==0?255:dis_buff.d_num[1]; dis_buff.dot3=1; + break; + case 5: + //overload + MOTB(0); + MOTA(0); + overload_times=0; + dis_buff.d_num[3]=(countdown/100)%10; + dis_buff.d_num[2]=(countdown/1000)%10; + dis_buff.d_num[1]=((countdown/10000)%10); + dis_buff.d_num[1]=dis_buff.d_num[1]==0?255:dis_buff.d_num[1]; + dis_buff.dot3=1; + dis_buff.led_err=1; + if(key4.code!=0){mode=1;} + + if(key2.code!=0) + { + mode=2; + if(overload_mode==2) + { + + }else + { + countdown=countdown_set-countdown; + } + + } + if(key3.code!=0) + { + mode=3; + if(overload_mode==3) + { + + }else + { + countdown=countdown_set-countdown; + } + + } + break; } @@ -352,7 +416,23 @@ void mymain() dis_buff.led_run=1; } } - + HAL_ADC_Start(&hadc); + adc_l+=HAL_ADC_GetValue(&hadc); + adc_times+=1; + HAL_ADC_Stop(&hadc); + if(adc_times==32) + { + adc=adc_l>>5; + adc_times=0; + adc_l=0; + } + if(adc>600) + { + GEI_BUTTON_CODE(&overload,1); + }else + { + GEI_BUTTON_CODE(&overload,0); + } GEI_BUTTON_CODE(&key1,KEY1); GEI_BUTTON_CODE(&key2,KEY2); GEI_BUTTON_CODE(&key3,KEY3);