diff --git a/.cproject b/.cproject index c487de5..500a03b 100644 --- a/.cproject +++ b/.cproject @@ -72,9 +72,9 @@ + - @@ -146,9 +146,9 @@ + - diff --git a/.mxproject b/.mxproject index bb594a7..ee3cf28 100644 --- a/.mxproject +++ b/.mxproject @@ -1,8 +1,8 @@ [PreviousLibFiles] -LibFiles=Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h;Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h;Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x6.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_armv8mbl.h; +LibFiles=Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h;Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h;Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x6.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_armv8mbl.h; [PreviousUsedCubeIDEFiles] -SourceFiles=Core/Src/main.c;Core/Src/stm32f0xx_it.c;Core/Src/stm32f0xx_hal_msp.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;Core/Src/system_stm32f0xx.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;Core/Src/system_stm32f0xx.c;;; +SourceFiles=Core/Src/main.c;Core/Src/stm32f0xx_it.c;Core/Src/stm32f0xx_hal_msp.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;Core/Src/system_stm32f0xx.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;Core/Src/system_stm32f0xx.c;;; HeaderPath=Drivers/STM32F0xx_HAL_Driver/Inc;Drivers/STM32F0xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32F0xx/Include;Drivers/CMSIS/Include;Core/Inc; CDefines=USE_HAL_DRIVER;STM32F030x6;USE_HAL_DRIVER;USE_HAL_DRIVER; diff --git a/Core/Inc/stm32f0xx_hal_conf.h b/Core/Inc/stm32f0xx_hal_conf.h index 0606436..aee8d2d 100644 --- a/Core/Inc/stm32f0xx_hal_conf.h +++ b/Core/Inc/stm32f0xx_hal_conf.h @@ -32,7 +32,7 @@ * @brief This is the list of modules to be used in the HAL driver */ #define HAL_MODULE_ENABLED - /*#define HAL_ADC_MODULE_ENABLED */ + #define HAL_ADC_MODULE_ENABLED /*#define HAL_CRYP_MODULE_ENABLED */ /*#define HAL_CAN_MODULE_ENABLED */ /*#define HAL_CEC_MODULE_ENABLED */ diff --git a/Core/Src/main.c b/Core/Src/main.c index 75f8ad4..a227b05 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -40,6 +40,7 @@ /* USER CODE END PM */ /* Private variables ---------------------------------------------------------*/ +ADC_HandleTypeDef hadc; /* USER CODE BEGIN PV */ @@ -48,6 +49,7 @@ /* Private function prototypes -----------------------------------------------*/ void SystemClock_Config(void); static void MX_GPIO_Init(void); +static void MX_ADC_Init(void); /* USER CODE BEGIN PFP */ /* USER CODE END PFP */ @@ -85,6 +87,7 @@ int main(void) /* Initialize all configured peripherals */ MX_GPIO_Init(); + MX_ADC_Init(); /* USER CODE BEGIN 2 */ my_code(); @@ -113,9 +116,11 @@ void SystemClock_Config(void) /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSI14; RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSI14State = RCC_HSI14_ON; RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.HSI14CalibrationValue = 16; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; @@ -138,6 +143,65 @@ void SystemClock_Config(void) } } +/** + * @brief ADC Initialization Function + * @param None + * @retval None + */ +static void MX_ADC_Init(void) +{ + + /* USER CODE BEGIN ADC_Init 0 */ + + /* USER CODE END ADC_Init 0 */ + + ADC_ChannelConfTypeDef sConfig = {0}; + + /* USER CODE BEGIN ADC_Init 1 */ + + /* USER CODE END ADC_Init 1 */ + /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion) + */ + hadc.Instance = ADC1; + hadc.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + hadc.Init.Resolution = ADC_RESOLUTION_12B; + hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT; + hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; + hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + hadc.Init.LowPowerAutoWait = DISABLE; + hadc.Init.LowPowerAutoPowerOff = DISABLE; + hadc.Init.ContinuousConvMode = DISABLE; + hadc.Init.DiscontinuousConvMode = DISABLE; + hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START; + hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + hadc.Init.DMAContinuousRequests = DISABLE; + hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED; + if (HAL_ADC_Init(&hadc) != HAL_OK) + { + Error_Handler(); + } + /** Configure for the selected ADC regular channel to be converted. + */ + sConfig.Channel = ADC_CHANNEL_0; + sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; + sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; + if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + { + Error_Handler(); + } + /** Configure for the selected ADC regular channel to be converted. + */ + sConfig.Channel = ADC_CHANNEL_1; + if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN ADC_Init 2 */ + + /* USER CODE END ADC_Init 2 */ + +} + /** * @brief GPIO Initialization Function * @param None @@ -161,12 +225,6 @@ static void MX_GPIO_Init(void) GPIO_InitStruct.Pull = GPIO_PULLDOWN; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); - /*Configure GPIO pins : ADC_CH0_Pin ADC_CH1_Pin */ - GPIO_InitStruct.Pin = ADC_CH0_Pin|ADC_CH1_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - /*Configure GPIO pins : U_T_Pin HC595_DLK_Pin HC595_SLK_Pin HC595_RLK_Pin HC595_SLK2_Pin */ GPIO_InitStruct.Pin = U_T_Pin|HC595_DLK_Pin|HC595_SLK_Pin|HC595_RLK_Pin diff --git a/Core/Src/stm32f0xx_hal_msp.c b/Core/Src/stm32f0xx_hal_msp.c index 2b1a5c9..715089a 100644 --- a/Core/Src/stm32f0xx_hal_msp.c +++ b/Core/Src/stm32f0xx_hal_msp.c @@ -77,6 +77,69 @@ void HAL_MspInit(void) /* USER CODE END MspInit 1 */ } +/** +* @brief ADC MSP Initialization +* This function configures the hardware resources used in this example +* @param hadc: ADC handle pointer +* @retval None +*/ +void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(hadc->Instance==ADC1) + { + /* USER CODE BEGIN ADC1_MspInit 0 */ + + /* USER CODE END ADC1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_ADC1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**ADC GPIO Configuration + PA0 ------> ADC_IN0 + PA1 ------> ADC_IN1 + */ + GPIO_InitStruct.Pin = ADC_CH0_Pin|ADC_CH1_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN ADC1_MspInit 1 */ + + /* USER CODE END ADC1_MspInit 1 */ + } + +} + +/** +* @brief ADC MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param hadc: ADC handle pointer +* @retval None +*/ +void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) +{ + if(hadc->Instance==ADC1) + { + /* USER CODE BEGIN ADC1_MspDeInit 0 */ + + /* USER CODE END ADC1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_ADC1_CLK_DISABLE(); + + /**ADC GPIO Configuration + PA0 ------> ADC_IN0 + PA1 ------> ADC_IN1 + */ + HAL_GPIO_DeInit(GPIOA, ADC_CH0_Pin|ADC_CH1_Pin); + + /* USER CODE BEGIN ADC1_MspDeInit 1 */ + + /* USER CODE END ADC1_MspDeInit 1 */ + } + +} + /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/Debug/Core/Src/main.d b/Debug/Core/Src/main.d index bf63e3c..5535071 100644 --- a/Debug/Core/Src/main.d +++ b/Debug/Core/Src/main.d @@ -18,6 +18,8 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -66,6 +68,10 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Core/Src/main.su b/Debug/Core/Src/main.su index e94e55a..c3059ea 100644 --- a/Debug/Core/Src/main.su +++ b/Debug/Core/Src/main.su @@ -1,4 +1,5 @@ -main.c:64:5:main 8 static -main.c:108:6:SystemClock_Config 80 static -main.c:146:13:MX_GPIO_Init 48 static -main.c:195:6:Error_Handler 8 static,ignoring_inline_asm +main.c:66:5:main 8 static +main.c:111:6:SystemClock_Config 80 static +main.c:151:13:MX_ADC_Init 24 static +main.c:210:13:MX_GPIO_Init 48 static +main.c:253:6:Error_Handler 8 static,ignoring_inline_asm diff --git a/Debug/Core/Src/stm32f0xx_hal_msp.d b/Debug/Core/Src/stm32f0xx_hal_msp.d index 62a4406..8389811 100644 --- a/Debug/Core/Src/stm32f0xx_hal_msp.d +++ b/Debug/Core/Src/stm32f0xx_hal_msp.d @@ -18,6 +18,8 @@ Core/Src/stm32f0xx_hal_msp.o: ../Core/Src/stm32f0xx_hal_msp.c \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -65,6 +67,10 @@ Core/Src/stm32f0xx_hal_msp.o: ../Core/Src/stm32f0xx_hal_msp.c \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Core/Src/stm32f0xx_hal_msp.su b/Debug/Core/Src/stm32f0xx_hal_msp.su index 994fa07..321c299 100644 --- a/Debug/Core/Src/stm32f0xx_hal_msp.su +++ b/Debug/Core/Src/stm32f0xx_hal_msp.su @@ -1 +1,3 @@ stm32f0xx_hal_msp.c:64:6:HAL_MspInit 16 static +stm32f0xx_hal_msp.c:86:6:HAL_ADC_MspInit 56 static +stm32f0xx_hal_msp.c:120:6:HAL_ADC_MspDeInit 16 static diff --git a/Debug/Core/Src/stm32f0xx_it.d b/Debug/Core/Src/stm32f0xx_it.d index d841325..fe06dea 100644 --- a/Debug/Core/Src/stm32f0xx_it.d +++ b/Debug/Core/Src/stm32f0xx_it.d @@ -18,6 +18,8 @@ Core/Src/stm32f0xx_it.o: ../Core/Src/stm32f0xx_it.c ../Core/Inc/main.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -66,6 +68,10 @@ Core/Src/stm32f0xx_it.o: ../Core/Src/stm32f0xx_it.c ../Core/Inc/main.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Core/Src/system_stm32f0xx.d b/Debug/Core/Src/system_stm32f0xx.d index e20f9a2..a1c4da1 100644 --- a/Debug/Core/Src/system_stm32f0xx.d +++ b/Debug/Core/Src/system_stm32f0xx.d @@ -18,6 +18,8 @@ Core/Src/system_stm32f0xx.o: ../Core/Src/system_stm32f0xx.c \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -63,6 +65,10 @@ Core/Src/system_stm32f0xx.o: ../Core/Src/system_stm32f0xx.c \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d index 9b32d12..b23db59 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.d new file mode 100644 index 0000000..c062fe6 --- /dev/null +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.d @@ -0,0 +1,83 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +../Core/Inc/stm32f0xx_hal_conf.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x6.h: + +../Drivers/CMSIS/Include/core_cm0.h: + +../Drivers/CMSIS/Include/cmsis_version.h: + +../Drivers/CMSIS/Include/cmsis_compiler.h: + +../Drivers/CMSIS/Include/cmsis_gcc.h: + +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.su b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.su new file mode 100644 index 0000000..f828457 --- /dev/null +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.su @@ -0,0 +1,28 @@ +stm32f0xx_hal_adc.c:406:19:HAL_ADC_Init 24 static +stm32f0xx_hal_adc.c:648:19:HAL_ADC_DeInit 32 static +stm32f0xx_hal_adc.c:774:13:HAL_ADC_MspInit 16 static +stm32f0xx_hal_adc.c:789:13:HAL_ADC_MspDeInit 16 static +stm32f0xx_hal_adc.c:1027:19:HAL_ADC_Start 32 static +stm32f0xx_hal_adc.c:1092:19:HAL_ADC_Stop 32 static +stm32f0xx_hal_adc.c:1146:19:HAL_ADC_PollForConversion 24 static +stm32f0xx_hal_adc.c:1270:19:HAL_ADC_PollForEvent 32 static +stm32f0xx_hal_adc.c:1350:19:HAL_ADC_Start_IT 32 static +stm32f0xx_hal_adc.c:1431:19:HAL_ADC_Stop_IT 32 static +stm32f0xx_hal_adc.c:1484:19:HAL_ADC_Start_DMA 40 static +stm32f0xx_hal_adc.c:1573:19:HAL_ADC_Stop_DMA 32 static +stm32f0xx_hal_adc.c:1658:10:HAL_ADC_GetValue 16 static +stm32f0xx_hal_adc.c:1675:6:HAL_ADC_IRQHandler 16 static +stm32f0xx_hal_adc.c:1800:13:HAL_ADC_ConvCpltCallback 16 static +stm32f0xx_hal_adc.c:1815:13:HAL_ADC_ConvHalfCpltCallback 16 static +stm32f0xx_hal_adc.c:1830:13:HAL_ADC_LevelOutOfWindowCallback 16 static +stm32f0xx_hal_adc.c:1846:13:HAL_ADC_ErrorCallback 16 static +stm32f0xx_hal_adc.c:1900:19:HAL_ADC_ConfigChannel 24 static +stm32f0xx_hal_adc.c:2033:19:HAL_ADC_AnalogWDGConfig 32 static +stm32f0xx_hal_adc.c:2155:10:HAL_ADC_GetState 16 static +stm32f0xx_hal_adc.c:2169:10:HAL_ADC_GetError 16 static +stm32f0xx_hal_adc.c:2199:26:ADC_Enable 24 static +stm32f0xx_hal_adc.c:2267:26:ADC_Disable 24 static +stm32f0xx_hal_adc.c:2328:26:ADC_ConversionStop 24 static +stm32f0xx_hal_adc.c:2382:13:ADC_DMAConvCplt 24 static +stm32f0xx_hal_adc.c:2447:13:ADC_DMAHalfConvCplt 24 static +stm32f0xx_hal_adc.c:2465:13:ADC_DMAError 24 static diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.d new file mode 100644 index 0000000..b9b3961 --- /dev/null +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.d @@ -0,0 +1,83 @@ +Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.o: \ + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + ../Core/Inc/stm32f0xx_hal_conf.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x6.h \ + ../Drivers/CMSIS/Include/core_cm0.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +../Core/Inc/stm32f0xx_hal_conf.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x6.h: + +../Drivers/CMSIS/Include/core_cm0.h: + +../Drivers/CMSIS/Include/cmsis_version.h: + +../Drivers/CMSIS/Include/cmsis_compiler.h: + +../Drivers/CMSIS/Include/cmsis_gcc.h: + +../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.su b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.su new file mode 100644 index 0000000..fb018f0 --- /dev/null +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.su @@ -0,0 +1 @@ +stm32f0xx_hal_adc_ex.c:97:19:HAL_ADCEx_Calibration_Start 32 static diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.d index 750c6ff..73be8e1 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.d index 6158fa4..ded8165 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.d index 76b58f3..9d48420 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.d index 2eb18d4..d08deff 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.d index f2b6d4a..549efbf 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.d index 0cd7cbf..01b9ecb 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.d index 57698d8..976a54c 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.d index 9737ab8..9464de3 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.d index c8e0cad..a8fdcc1 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.d index 1f7f41d..1c9571c 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.d index a7478f5..7e0ea71 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.d index b2234db..1d4d538 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.d index 2949cd6..d7f6d4c 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.d b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.d index 2ccb2ad..b60b63e 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.d +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.d @@ -19,6 +19,8 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -64,6 +66,10 @@ Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o: \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/subdir.mk b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/subdir.mk index 522ef73..acdd78e 100644 --- a/Debug/Drivers/STM32F0xx_HAL_Driver/Src/subdir.mk +++ b/Debug/Drivers/STM32F0xx_HAL_Driver/Src/subdir.mk @@ -6,6 +6,8 @@ # Add inputs and outputs from these tool invocations to the build variables C_SRCS += \ ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c \ +../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c \ ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c \ ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c \ ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c \ @@ -23,6 +25,8 @@ C_SRCS += \ OBJS += \ ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.o \ ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o \ ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o \ ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o \ @@ -40,6 +44,8 @@ OBJS += \ C_DEPS += \ ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.d \ +./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.d \ ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.d \ ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.d \ ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.d \ diff --git a/Debug/Motor_Controller2.bin b/Debug/Motor_Controller2.bin index b6d3b5c..aa7e984 100755 Binary files a/Debug/Motor_Controller2.bin and b/Debug/Motor_Controller2.bin differ diff --git a/Debug/Motor_Controller2.list b/Debug/Motor_Controller2.list index e3ae128..be6afef 100644 --- a/Debug/Motor_Controller2.list +++ b/Debug/Motor_Controller2.list @@ -5,45 +5,45 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000000c0 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 000023e8 080000c0 080000c0 000100c0 2**2 + 1 .text 00002f8c 080000c0 080000c0 000100c0 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 0000005c 080024a8 080024a8 000124a8 2**2 + 2 .rodata 0000005c 0800304c 0800304c 0001304c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 08002504 08002504 0002000c 2**0 + 3 .ARM.extab 00000000 080030a8 080030a8 0002000c 2**0 CONTENTS - 4 .ARM 00000000 08002504 08002504 0002000c 2**0 + 4 .ARM 00000000 080030a8 080030a8 0002000c 2**0 CONTENTS - 5 .preinit_array 00000000 08002504 08002504 0002000c 2**0 + 5 .preinit_array 00000000 080030a8 080030a8 0002000c 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 08002504 08002504 00012504 2**2 + 6 .init_array 00000004 080030a8 080030a8 000130a8 2**2 CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000004 08002508 08002508 00012508 2**2 + 7 .fini_array 00000004 080030ac 080030ac 000130ac 2**2 CONTENTS, ALLOC, LOAD, DATA - 8 .data 0000000c 20000000 0800250c 00020000 2**2 + 8 .data 0000000c 20000000 080030b0 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 0000008c 2000000c 08002518 0002000c 2**2 + 9 .bss 000000e0 2000000c 080030bc 0002000c 2**2 ALLOC - 10 ._user_heap_stack 00000600 20000098 08002518 00020098 2**0 + 10 ._user_heap_stack 00000604 200000ec 080030bc 000200ec 2**0 ALLOC 11 .ARM.attributes 00000028 00000000 00000000 0002000c 2**0 CONTENTS, READONLY - 12 .debug_info 00003371 00000000 00000000 00020034 2**0 + 12 .debug_info 000050b2 00000000 00000000 00020034 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 00001106 00000000 00000000 000233a5 2**0 + 13 .debug_abbrev 000013fb 00000000 00000000 000250e6 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_aranges 000003c8 00000000 00000000 000244b0 2**3 + 14 .debug_aranges 000004d8 00000000 00000000 000264e8 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_ranges 00000320 00000000 00000000 00024878 2**3 + 15 .debug_ranges 00000420 00000000 00000000 000269c0 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_macro 0000e2d5 00000000 00000000 00024b98 2**0 + 16 .debug_macro 0000e973 00000000 00000000 00026de0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_line 00005c87 00000000 00000000 00032e6d 2**0 + 17 .debug_line 00007107 00000000 00000000 00035753 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_str 0005391a 00000000 00000000 00038af4 2**0 + 18 .debug_str 000567a6 00000000 00000000 0003c85a 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .comment 00000053 00000000 00000000 0008c40e 2**0 + 19 .comment 00000053 00000000 00000000 00093000 2**0 CONTENTS, READONLY - 20 .debug_frame 00000b50 00000000 00000000 0008c464 2**2 + 20 .debug_frame 00000f50 00000000 00000000 00093054 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -65,7 +65,7 @@ Disassembly of section .text: 80000da: bd10 pop {r4, pc} 80000dc: 2000000c .word 0x2000000c 80000e0: 00000000 .word 0x00000000 - 80000e4: 08002490 .word 0x08002490 + 80000e4: 08003034 .word 0x08003034 080000e8 : 80000e8: 4b04 ldr r3, [pc, #16] ; (80000fc ) @@ -80,7 +80,7 @@ Disassembly of section .text: 80000fa: 46c0 nop ; (mov r8, r8) 80000fc: 00000000 .word 0x00000000 8000100: 20000010 .word 0x20000010 - 8000104: 08002490 .word 0x08002490 + 8000104: 08003034 .word 0x08003034 08000108 <__udivsi3>: 8000108: 2200 movs r2, #0 @@ -479,5784 +479,8013 @@ int main(void) /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 80003f8: f000 f93e bl 8000678 + 80003f8: f000 f9e4 bl 80007c4 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 80003fc: f000 f805 bl 800040a + 80003fc: f000 f807 bl 800040e /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 8000400: f000 f84e bl 80004a0 + 8000400: f000 f8be bl 8000580 + MX_ADC_Init(); + 8000404: f000 f854 bl 80004b0 /* USER CODE BEGIN 2 */ my_code(); - 8000404: f001 fc06 bl 8001c14 + 8000408: f002 f95a bl 80026c0 /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) - 8000408: e7fe b.n 8000408 + 800040c: e7fe b.n 800040c -0800040a : +0800040e : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 800040a: b590 push {r4, r7, lr} - 800040c: b091 sub sp, #68 ; 0x44 - 800040e: af00 add r7, sp, #0 + 800040e: b590 push {r4, r7, lr} + 8000410: b091 sub sp, #68 ; 0x44 + 8000412: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 8000410: 2410 movs r4, #16 - 8000412: 193b adds r3, r7, r4 - 8000414: 0018 movs r0, r3 - 8000416: 2330 movs r3, #48 ; 0x30 - 8000418: 001a movs r2, r3 - 800041a: 2100 movs r1, #0 - 800041c: f002 f830 bl 8002480 + 8000414: 2410 movs r4, #16 + 8000416: 193b adds r3, r7, r4 + 8000418: 0018 movs r0, r3 + 800041a: 2330 movs r3, #48 ; 0x30 + 800041c: 001a movs r2, r3 + 800041e: 2100 movs r1, #0 + 8000420: f002 fe00 bl 8003024 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8000420: 003b movs r3, r7 - 8000422: 0018 movs r0, r3 - 8000424: 2310 movs r3, #16 - 8000426: 001a movs r2, r3 - 8000428: 2100 movs r1, #0 - 800042a: f002 f829 bl 8002480 + 8000424: 003b movs r3, r7 + 8000426: 0018 movs r0, r3 + 8000428: 2310 movs r3, #16 + 800042a: 001a movs r2, r3 + 800042c: 2100 movs r1, #0 + 800042e: f002 fdf9 bl 8003024 /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - 800042e: 0021 movs r1, r4 - 8000430: 187b adds r3, r7, r1 - 8000432: 2202 movs r2, #2 - 8000434: 601a str r2, [r3, #0] + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSI14; + 8000432: 0021 movs r1, r4 + 8000434: 187b adds r3, r7, r1 + 8000436: 2212 movs r2, #18 + 8000438: 601a str r2, [r3, #0] RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 8000436: 187b adds r3, r7, r1 - 8000438: 2201 movs r2, #1 - 800043a: 60da str r2, [r3, #12] + 800043a: 187b adds r3, r7, r1 + 800043c: 2201 movs r2, #1 + 800043e: 60da str r2, [r3, #12] + RCC_OscInitStruct.HSI14State = RCC_HSI14_ON; + 8000440: 187b adds r3, r7, r1 + 8000442: 2201 movs r2, #1 + 8000444: 615a str r2, [r3, #20] RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - 800043c: 187b adds r3, r7, r1 - 800043e: 2210 movs r2, #16 - 8000440: 611a str r2, [r3, #16] + 8000446: 187b adds r3, r7, r1 + 8000448: 2210 movs r2, #16 + 800044a: 611a str r2, [r3, #16] + RCC_OscInitStruct.HSI14CalibrationValue = 16; + 800044c: 187b adds r3, r7, r1 + 800044e: 2210 movs r2, #16 + 8000450: 619a str r2, [r3, #24] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 8000442: 187b adds r3, r7, r1 - 8000444: 2202 movs r2, #2 - 8000446: 621a str r2, [r3, #32] + 8000452: 187b adds r3, r7, r1 + 8000454: 2202 movs r2, #2 + 8000456: 621a str r2, [r3, #32] RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - 8000448: 187b adds r3, r7, r1 - 800044a: 2200 movs r2, #0 - 800044c: 625a str r2, [r3, #36] ; 0x24 + 8000458: 187b adds r3, r7, r1 + 800045a: 2200 movs r2, #0 + 800045c: 625a str r2, [r3, #36] ; 0x24 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; - 800044e: 187b adds r3, r7, r1 - 8000450: 22a0 movs r2, #160 ; 0xa0 - 8000452: 0392 lsls r2, r2, #14 - 8000454: 629a str r2, [r3, #40] ; 0x28 + 800045e: 187b adds r3, r7, r1 + 8000460: 22a0 movs r2, #160 ; 0xa0 + 8000462: 0392 lsls r2, r2, #14 + 8000464: 629a str r2, [r3, #40] ; 0x28 RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; - 8000456: 187b adds r3, r7, r1 - 8000458: 2200 movs r2, #0 - 800045a: 62da str r2, [r3, #44] ; 0x2c + 8000466: 187b adds r3, r7, r1 + 8000468: 2200 movs r2, #0 + 800046a: 62da str r2, [r3, #44] ; 0x2c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 800045c: 187b adds r3, r7, r1 - 800045e: 0018 movs r0, r3 - 8000460: f000 fbcc bl 8000bfc - 8000464: 1e03 subs r3, r0, #0 - 8000466: d001 beq.n 800046c + 800046c: 187b adds r3, r7, r1 + 800046e: 0018 movs r0, r3 + 8000470: f001 f91a bl 80016a8 + 8000474: 1e03 subs r3, r0, #0 + 8000476: d001 beq.n 800047c { Error_Handler(); - 8000468: f000 f896 bl 8000598 + 8000478: f000 f8ee bl 8000658 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 800046c: 003b movs r3, r7 - 800046e: 2207 movs r2, #7 - 8000470: 601a str r2, [r3, #0] + 800047c: 003b movs r3, r7 + 800047e: 2207 movs r2, #7 + 8000480: 601a str r2, [r3, #0] |RCC_CLOCKTYPE_PCLK1; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 8000472: 003b movs r3, r7 - 8000474: 2202 movs r2, #2 - 8000476: 605a str r2, [r3, #4] + 8000482: 003b movs r3, r7 + 8000484: 2202 movs r2, #2 + 8000486: 605a str r2, [r3, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8000478: 003b movs r3, r7 - 800047a: 2200 movs r2, #0 - 800047c: 609a str r2, [r3, #8] + 8000488: 003b movs r3, r7 + 800048a: 2200 movs r2, #0 + 800048c: 609a str r2, [r3, #8] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - 800047e: 003b movs r3, r7 - 8000480: 2200 movs r2, #0 - 8000482: 60da str r2, [r3, #12] + 800048e: 003b movs r3, r7 + 8000490: 2200 movs r2, #0 + 8000492: 60da str r2, [r3, #12] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) - 8000484: 003b movs r3, r7 - 8000486: 2101 movs r1, #1 - 8000488: 0018 movs r0, r3 - 800048a: f000 fed1 bl 8001230 - 800048e: 1e03 subs r3, r0, #0 - 8000490: d001 beq.n 8000496 + 8000494: 003b movs r3, r7 + 8000496: 2101 movs r1, #1 + 8000498: 0018 movs r0, r3 + 800049a: f001 fc1f bl 8001cdc + 800049e: 1e03 subs r3, r0, #0 + 80004a0: d001 beq.n 80004a6 { Error_Handler(); - 8000492: f000 f881 bl 8000598 + 80004a2: f000 f8d9 bl 8000658 } } - 8000496: 46c0 nop ; (mov r8, r8) - 8000498: 46bd mov sp, r7 - 800049a: b011 add sp, #68 ; 0x44 - 800049c: bd90 pop {r4, r7, pc} + 80004a6: 46c0 nop ; (mov r8, r8) + 80004a8: 46bd mov sp, r7 + 80004aa: b011 add sp, #68 ; 0x44 + 80004ac: bd90 pop {r4, r7, pc} ... -080004a0 : +080004b0 : + * @brief ADC Initialization Function + * @param None + * @retval None + */ +static void MX_ADC_Init(void) +{ + 80004b0: b580 push {r7, lr} + 80004b2: b084 sub sp, #16 + 80004b4: af00 add r7, sp, #0 + + /* USER CODE BEGIN ADC_Init 0 */ + + /* USER CODE END ADC_Init 0 */ + + ADC_ChannelConfTypeDef sConfig = {0}; + 80004b6: 1d3b adds r3, r7, #4 + 80004b8: 0018 movs r0, r3 + 80004ba: 230c movs r3, #12 + 80004bc: 001a movs r2, r3 + 80004be: 2100 movs r1, #0 + 80004c0: f002 fdb0 bl 8003024 + /* USER CODE BEGIN ADC_Init 1 */ + + /* USER CODE END ADC_Init 1 */ + /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion) + */ + hadc.Instance = ADC1; + 80004c4: 4b2c ldr r3, [pc, #176] ; (8000578 ) + 80004c6: 4a2d ldr r2, [pc, #180] ; (800057c ) + 80004c8: 601a str r2, [r3, #0] + hadc.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + 80004ca: 4b2b ldr r3, [pc, #172] ; (8000578 ) + 80004cc: 2200 movs r2, #0 + 80004ce: 605a str r2, [r3, #4] + hadc.Init.Resolution = ADC_RESOLUTION_12B; + 80004d0: 4b29 ldr r3, [pc, #164] ; (8000578 ) + 80004d2: 2200 movs r2, #0 + 80004d4: 609a str r2, [r3, #8] + hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 80004d6: 4b28 ldr r3, [pc, #160] ; (8000578 ) + 80004d8: 2200 movs r2, #0 + 80004da: 60da str r2, [r3, #12] + hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; + 80004dc: 4b26 ldr r3, [pc, #152] ; (8000578 ) + 80004de: 2201 movs r2, #1 + 80004e0: 611a str r2, [r3, #16] + hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 80004e2: 4b25 ldr r3, [pc, #148] ; (8000578 ) + 80004e4: 2204 movs r2, #4 + 80004e6: 615a str r2, [r3, #20] + hadc.Init.LowPowerAutoWait = DISABLE; + 80004e8: 4b23 ldr r3, [pc, #140] ; (8000578 ) + 80004ea: 2200 movs r2, #0 + 80004ec: 761a strb r2, [r3, #24] + hadc.Init.LowPowerAutoPowerOff = DISABLE; + 80004ee: 4b22 ldr r3, [pc, #136] ; (8000578 ) + 80004f0: 2200 movs r2, #0 + 80004f2: 765a strb r2, [r3, #25] + hadc.Init.ContinuousConvMode = DISABLE; + 80004f4: 4b20 ldr r3, [pc, #128] ; (8000578 ) + 80004f6: 2200 movs r2, #0 + 80004f8: 769a strb r2, [r3, #26] + hadc.Init.DiscontinuousConvMode = DISABLE; + 80004fa: 4b1f ldr r3, [pc, #124] ; (8000578 ) + 80004fc: 2200 movs r2, #0 + 80004fe: 76da strb r2, [r3, #27] + hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 8000500: 4b1d ldr r3, [pc, #116] ; (8000578 ) + 8000502: 22c2 movs r2, #194 ; 0xc2 + 8000504: 32ff adds r2, #255 ; 0xff + 8000506: 61da str r2, [r3, #28] + hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 8000508: 4b1b ldr r3, [pc, #108] ; (8000578 ) + 800050a: 2200 movs r2, #0 + 800050c: 621a str r2, [r3, #32] + hadc.Init.DMAContinuousRequests = DISABLE; + 800050e: 4b1a ldr r3, [pc, #104] ; (8000578 ) + 8000510: 2224 movs r2, #36 ; 0x24 + 8000512: 2100 movs r1, #0 + 8000514: 5499 strb r1, [r3, r2] + hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED; + 8000516: 4b18 ldr r3, [pc, #96] ; (8000578 ) + 8000518: 2201 movs r2, #1 + 800051a: 629a str r2, [r3, #40] ; 0x28 + if (HAL_ADC_Init(&hadc) != HAL_OK) + 800051c: 4b16 ldr r3, [pc, #88] ; (8000578 ) + 800051e: 0018 movs r0, r3 + 8000520: f000 f9b4 bl 800088c + 8000524: 1e03 subs r3, r0, #0 + 8000526: d001 beq.n 800052c + { + Error_Handler(); + 8000528: f000 f896 bl 8000658 + } + /** Configure for the selected ADC regular channel to be converted. + */ + sConfig.Channel = ADC_CHANNEL_0; + 800052c: 1d3b adds r3, r7, #4 + 800052e: 2200 movs r2, #0 + 8000530: 601a str r2, [r3, #0] + sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; + 8000532: 1d3b adds r3, r7, #4 + 8000534: 2280 movs r2, #128 ; 0x80 + 8000536: 0152 lsls r2, r2, #5 + 8000538: 605a str r2, [r3, #4] + sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; + 800053a: 1d3b adds r3, r7, #4 + 800053c: 2280 movs r2, #128 ; 0x80 + 800053e: 0552 lsls r2, r2, #21 + 8000540: 609a str r2, [r3, #8] + if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + 8000542: 1d3a adds r2, r7, #4 + 8000544: 4b0c ldr r3, [pc, #48] ; (8000578 ) + 8000546: 0011 movs r1, r2 + 8000548: 0018 movs r0, r3 + 800054a: f000 fc17 bl 8000d7c + 800054e: 1e03 subs r3, r0, #0 + 8000550: d001 beq.n 8000556 + { + Error_Handler(); + 8000552: f000 f881 bl 8000658 + } + /** Configure for the selected ADC regular channel to be converted. + */ + sConfig.Channel = ADC_CHANNEL_1; + 8000556: 1d3b adds r3, r7, #4 + 8000558: 2201 movs r2, #1 + 800055a: 601a str r2, [r3, #0] + if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) + 800055c: 1d3a adds r2, r7, #4 + 800055e: 4b06 ldr r3, [pc, #24] ; (8000578 ) + 8000560: 0011 movs r1, r2 + 8000562: 0018 movs r0, r3 + 8000564: f000 fc0a bl 8000d7c + 8000568: 1e03 subs r3, r0, #0 + 800056a: d001 beq.n 8000570 + { + Error_Handler(); + 800056c: f000 f874 bl 8000658 + } + /* USER CODE BEGIN ADC_Init 2 */ + + /* USER CODE END ADC_Init 2 */ + +} + 8000570: 46c0 nop ; (mov r8, r8) + 8000572: 46bd mov sp, r7 + 8000574: b004 add sp, #16 + 8000576: bd80 pop {r7, pc} + 8000578: 20000028 .word 0x20000028 + 800057c: 40012400 .word 0x40012400 + +08000580 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { - 80004a0: b590 push {r4, r7, lr} - 80004a2: b089 sub sp, #36 ; 0x24 - 80004a4: af00 add r7, sp, #0 + 8000580: b590 push {r4, r7, lr} + 8000582: b089 sub sp, #36 ; 0x24 + 8000584: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80004a6: 240c movs r4, #12 - 80004a8: 193b adds r3, r7, r4 - 80004aa: 0018 movs r0, r3 - 80004ac: 2314 movs r3, #20 - 80004ae: 001a movs r2, r3 - 80004b0: 2100 movs r1, #0 - 80004b2: f001 ffe5 bl 8002480 + 8000586: 240c movs r4, #12 + 8000588: 193b adds r3, r7, r4 + 800058a: 0018 movs r0, r3 + 800058c: 2314 movs r3, #20 + 800058e: 001a movs r2, r3 + 8000590: 2100 movs r1, #0 + 8000592: f002 fd47 bl 8003024 /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOF_CLK_ENABLE(); - 80004b6: 4b36 ldr r3, [pc, #216] ; (8000590 ) - 80004b8: 695a ldr r2, [r3, #20] - 80004ba: 4b35 ldr r3, [pc, #212] ; (8000590 ) - 80004bc: 2180 movs r1, #128 ; 0x80 - 80004be: 03c9 lsls r1, r1, #15 - 80004c0: 430a orrs r2, r1 - 80004c2: 615a str r2, [r3, #20] - 80004c4: 4b32 ldr r3, [pc, #200] ; (8000590 ) - 80004c6: 695a ldr r2, [r3, #20] - 80004c8: 2380 movs r3, #128 ; 0x80 - 80004ca: 03db lsls r3, r3, #15 - 80004cc: 4013 ands r3, r2 - 80004ce: 60bb str r3, [r7, #8] - 80004d0: 68bb ldr r3, [r7, #8] + 8000596: 4b2e ldr r3, [pc, #184] ; (8000650 ) + 8000598: 695a ldr r2, [r3, #20] + 800059a: 4b2d ldr r3, [pc, #180] ; (8000650 ) + 800059c: 2180 movs r1, #128 ; 0x80 + 800059e: 03c9 lsls r1, r1, #15 + 80005a0: 430a orrs r2, r1 + 80005a2: 615a str r2, [r3, #20] + 80005a4: 4b2a ldr r3, [pc, #168] ; (8000650 ) + 80005a6: 695a ldr r2, [r3, #20] + 80005a8: 2380 movs r3, #128 ; 0x80 + 80005aa: 03db lsls r3, r3, #15 + 80005ac: 4013 ands r3, r2 + 80005ae: 60bb str r3, [r7, #8] + 80005b0: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); - 80004d2: 4b2f ldr r3, [pc, #188] ; (8000590 ) - 80004d4: 695a ldr r2, [r3, #20] - 80004d6: 4b2e ldr r3, [pc, #184] ; (8000590 ) - 80004d8: 2180 movs r1, #128 ; 0x80 - 80004da: 0289 lsls r1, r1, #10 - 80004dc: 430a orrs r2, r1 - 80004de: 615a str r2, [r3, #20] - 80004e0: 4b2b ldr r3, [pc, #172] ; (8000590 ) - 80004e2: 695a ldr r2, [r3, #20] - 80004e4: 2380 movs r3, #128 ; 0x80 - 80004e6: 029b lsls r3, r3, #10 - 80004e8: 4013 ands r3, r2 - 80004ea: 607b str r3, [r7, #4] - 80004ec: 687b ldr r3, [r7, #4] + 80005b2: 4b27 ldr r3, [pc, #156] ; (8000650 ) + 80005b4: 695a ldr r2, [r3, #20] + 80005b6: 4b26 ldr r3, [pc, #152] ; (8000650 ) + 80005b8: 2180 movs r1, #128 ; 0x80 + 80005ba: 0289 lsls r1, r1, #10 + 80005bc: 430a orrs r2, r1 + 80005be: 615a str r2, [r3, #20] + 80005c0: 4b23 ldr r3, [pc, #140] ; (8000650 ) + 80005c2: 695a ldr r2, [r3, #20] + 80005c4: 2380 movs r3, #128 ; 0x80 + 80005c6: 029b lsls r3, r3, #10 + 80005c8: 4013 ands r3, r2 + 80005ca: 607b str r3, [r7, #4] + 80005cc: 687b ldr r3, [r7, #4] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, U_T_Pin|HC595_DLK_Pin|HC595_SLK_Pin|HC595_RLK_Pin - 80004ee: 23b9 movs r3, #185 ; 0xb9 - 80004f0: 0099 lsls r1, r3, #2 - 80004f2: 2390 movs r3, #144 ; 0x90 - 80004f4: 05db lsls r3, r3, #23 - 80004f6: 2200 movs r2, #0 - 80004f8: 0018 movs r0, r3 - 80004fa: f000 fb62 bl 8000bc2 + 80005ce: 23b9 movs r3, #185 ; 0xb9 + 80005d0: 0099 lsls r1, r3, #2 + 80005d2: 2390 movs r3, #144 ; 0x90 + 80005d4: 05db lsls r3, r3, #23 + 80005d6: 2200 movs r2, #0 + 80005d8: 0018 movs r0, r3 + 80005da: f001 f848 bl 800166e |HC595_SLK2_Pin, GPIO_PIN_RESET); /*Configure GPIO pins : MOT_IN1_Pin MOT_IN2_Pin */ GPIO_InitStruct.Pin = MOT_IN1_Pin|MOT_IN2_Pin; - 80004fe: 193b adds r3, r7, r4 - 8000500: 2203 movs r2, #3 - 8000502: 601a str r2, [r3, #0] + 80005de: 193b adds r3, r7, r4 + 80005e0: 2203 movs r2, #3 + 80005e2: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8000504: 193b adds r3, r7, r4 - 8000506: 2200 movs r2, #0 - 8000508: 605a str r2, [r3, #4] + 80005e4: 193b adds r3, r7, r4 + 80005e6: 2200 movs r2, #0 + 80005e8: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_PULLDOWN; - 800050a: 193b adds r3, r7, r4 - 800050c: 2202 movs r2, #2 - 800050e: 609a str r2, [r3, #8] + 80005ea: 193b adds r3, r7, r4 + 80005ec: 2202 movs r2, #2 + 80005ee: 609a str r2, [r3, #8] HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 8000510: 193b adds r3, r7, r4 - 8000512: 4a20 ldr r2, [pc, #128] ; (8000594 ) - 8000514: 0019 movs r1, r3 - 8000516: 0010 movs r0, r2 - 8000518: f000 f9c6 bl 80008a8 - - /*Configure GPIO pins : ADC_CH0_Pin ADC_CH1_Pin */ - GPIO_InitStruct.Pin = ADC_CH0_Pin|ADC_CH1_Pin; - 800051c: 193b adds r3, r7, r4 - 800051e: 2203 movs r2, #3 - 8000520: 601a str r2, [r3, #0] - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 8000522: 193b adds r3, r7, r4 - 8000524: 2203 movs r2, #3 - 8000526: 605a str r2, [r3, #4] - GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000528: 193b adds r3, r7, r4 - 800052a: 2200 movs r2, #0 - 800052c: 609a str r2, [r3, #8] - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 800052e: 193a adds r2, r7, r4 - 8000530: 2390 movs r3, #144 ; 0x90 - 8000532: 05db lsls r3, r3, #23 - 8000534: 0011 movs r1, r2 - 8000536: 0018 movs r0, r3 - 8000538: f000 f9b6 bl 80008a8 + 80005f0: 193b adds r3, r7, r4 + 80005f2: 4a18 ldr r2, [pc, #96] ; (8000654 ) + 80005f4: 0019 movs r1, r3 + 80005f6: 0010 movs r0, r2 + 80005f8: f000 feac bl 8001354 /*Configure GPIO pins : U_T_Pin HC595_DLK_Pin HC595_SLK_Pin HC595_RLK_Pin HC595_SLK2_Pin */ GPIO_InitStruct.Pin = U_T_Pin|HC595_DLK_Pin|HC595_SLK_Pin|HC595_RLK_Pin - 800053c: 0021 movs r1, r4 - 800053e: 187b adds r3, r7, r1 - 8000540: 22b9 movs r2, #185 ; 0xb9 - 8000542: 0092 lsls r2, r2, #2 - 8000544: 601a str r2, [r3, #0] + 80005fc: 0021 movs r1, r4 + 80005fe: 187b adds r3, r7, r1 + 8000600: 22b9 movs r2, #185 ; 0xb9 + 8000602: 0092 lsls r2, r2, #2 + 8000604: 601a str r2, [r3, #0] |HC595_SLK2_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8000546: 000c movs r4, r1 - 8000548: 193b adds r3, r7, r4 - 800054a: 2201 movs r2, #1 - 800054c: 605a str r2, [r3, #4] + 8000606: 000c movs r4, r1 + 8000608: 193b adds r3, r7, r4 + 800060a: 2201 movs r2, #1 + 800060c: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_PULLDOWN; - 800054e: 193b adds r3, r7, r4 - 8000550: 2202 movs r2, #2 - 8000552: 609a str r2, [r3, #8] + 800060e: 193b adds r3, r7, r4 + 8000610: 2202 movs r2, #2 + 8000612: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - 8000554: 193b adds r3, r7, r4 - 8000556: 2203 movs r2, #3 - 8000558: 60da str r2, [r3, #12] + 8000614: 193b adds r3, r7, r4 + 8000616: 2203 movs r2, #3 + 8000618: 60da str r2, [r3, #12] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 800055a: 193a adds r2, r7, r4 - 800055c: 2390 movs r3, #144 ; 0x90 - 800055e: 05db lsls r3, r3, #23 - 8000560: 0011 movs r1, r2 - 8000562: 0018 movs r0, r3 - 8000564: f000 f9a0 bl 80008a8 + 800061a: 193a adds r2, r7, r4 + 800061c: 2390 movs r3, #144 ; 0x90 + 800061e: 05db lsls r3, r3, #23 + 8000620: 0011 movs r1, r2 + 8000622: 0018 movs r0, r3 + 8000624: f000 fe96 bl 8001354 /*Configure GPIO pins : U_R_Pin I_R_Pin */ GPIO_InitStruct.Pin = U_R_Pin|I_R_Pin; - 8000568: 193b adds r3, r7, r4 - 800056a: 2218 movs r2, #24 - 800056c: 601a str r2, [r3, #0] + 8000628: 193b adds r3, r7, r4 + 800062a: 2218 movs r2, #24 + 800062c: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 800056e: 193b adds r3, r7, r4 - 8000570: 2200 movs r2, #0 - 8000572: 605a str r2, [r3, #4] + 800062e: 193b adds r3, r7, r4 + 8000630: 2200 movs r2, #0 + 8000632: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_PULLDOWN; - 8000574: 193b adds r3, r7, r4 - 8000576: 2202 movs r2, #2 - 8000578: 609a str r2, [r3, #8] + 8000634: 193b adds r3, r7, r4 + 8000636: 2202 movs r2, #2 + 8000638: 609a str r2, [r3, #8] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 800057a: 193a adds r2, r7, r4 - 800057c: 2390 movs r3, #144 ; 0x90 - 800057e: 05db lsls r3, r3, #23 - 8000580: 0011 movs r1, r2 - 8000582: 0018 movs r0, r3 - 8000584: f000 f990 bl 80008a8 + 800063a: 193a adds r2, r7, r4 + 800063c: 2390 movs r3, #144 ; 0x90 + 800063e: 05db lsls r3, r3, #23 + 8000640: 0011 movs r1, r2 + 8000642: 0018 movs r0, r3 + 8000644: f000 fe86 bl 8001354 } - 8000588: 46c0 nop ; (mov r8, r8) - 800058a: 46bd mov sp, r7 - 800058c: b009 add sp, #36 ; 0x24 - 800058e: bd90 pop {r4, r7, pc} - 8000590: 40021000 .word 0x40021000 - 8000594: 48001400 .word 0x48001400 + 8000648: 46c0 nop ; (mov r8, r8) + 800064a: 46bd mov sp, r7 + 800064c: b009 add sp, #36 ; 0x24 + 800064e: bd90 pop {r4, r7, pc} + 8000650: 40021000 .word 0x40021000 + 8000654: 48001400 .word 0x48001400 -08000598 : +08000658 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 8000598: b580 push {r7, lr} - 800059a: af00 add r7, sp, #0 + 8000658: b580 push {r7, lr} + 800065a: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 800059c: b672 cpsid i + 800065c: b672 cpsid i } - 800059e: 46c0 nop ; (mov r8, r8) + 800065e: 46c0 nop ; (mov r8, r8) /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 80005a0: e7fe b.n 80005a0 + 8000660: e7fe b.n 8000660 ... -080005a4 : +08000664 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 80005a4: b580 push {r7, lr} - 80005a6: b082 sub sp, #8 - 80005a8: af00 add r7, sp, #0 + 8000664: b580 push {r7, lr} + 8000666: b082 sub sp, #8 + 8000668: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 80005aa: 4b0f ldr r3, [pc, #60] ; (80005e8 ) - 80005ac: 699a ldr r2, [r3, #24] - 80005ae: 4b0e ldr r3, [pc, #56] ; (80005e8 ) - 80005b0: 2101 movs r1, #1 - 80005b2: 430a orrs r2, r1 - 80005b4: 619a str r2, [r3, #24] - 80005b6: 4b0c ldr r3, [pc, #48] ; (80005e8 ) - 80005b8: 699b ldr r3, [r3, #24] - 80005ba: 2201 movs r2, #1 - 80005bc: 4013 ands r3, r2 - 80005be: 607b str r3, [r7, #4] - 80005c0: 687b ldr r3, [r7, #4] + 800066a: 4b0f ldr r3, [pc, #60] ; (80006a8 ) + 800066c: 699a ldr r2, [r3, #24] + 800066e: 4b0e ldr r3, [pc, #56] ; (80006a8 ) + 8000670: 2101 movs r1, #1 + 8000672: 430a orrs r2, r1 + 8000674: 619a str r2, [r3, #24] + 8000676: 4b0c ldr r3, [pc, #48] ; (80006a8 ) + 8000678: 699b ldr r3, [r3, #24] + 800067a: 2201 movs r2, #1 + 800067c: 4013 ands r3, r2 + 800067e: 607b str r3, [r7, #4] + 8000680: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); - 80005c2: 4b09 ldr r3, [pc, #36] ; (80005e8 ) - 80005c4: 69da ldr r2, [r3, #28] - 80005c6: 4b08 ldr r3, [pc, #32] ; (80005e8 ) - 80005c8: 2180 movs r1, #128 ; 0x80 - 80005ca: 0549 lsls r1, r1, #21 - 80005cc: 430a orrs r2, r1 - 80005ce: 61da str r2, [r3, #28] - 80005d0: 4b05 ldr r3, [pc, #20] ; (80005e8 ) - 80005d2: 69da ldr r2, [r3, #28] - 80005d4: 2380 movs r3, #128 ; 0x80 - 80005d6: 055b lsls r3, r3, #21 - 80005d8: 4013 ands r3, r2 - 80005da: 603b str r3, [r7, #0] - 80005dc: 683b ldr r3, [r7, #0] + 8000682: 4b09 ldr r3, [pc, #36] ; (80006a8 ) + 8000684: 69da ldr r2, [r3, #28] + 8000686: 4b08 ldr r3, [pc, #32] ; (80006a8 ) + 8000688: 2180 movs r1, #128 ; 0x80 + 800068a: 0549 lsls r1, r1, #21 + 800068c: 430a orrs r2, r1 + 800068e: 61da str r2, [r3, #28] + 8000690: 4b05 ldr r3, [pc, #20] ; (80006a8 ) + 8000692: 69da ldr r2, [r3, #28] + 8000694: 2380 movs r3, #128 ; 0x80 + 8000696: 055b lsls r3, r3, #21 + 8000698: 4013 ands r3, r2 + 800069a: 603b str r3, [r7, #0] + 800069c: 683b ldr r3, [r7, #0] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 80005de: 46c0 nop ; (mov r8, r8) - 80005e0: 46bd mov sp, r7 - 80005e2: b002 add sp, #8 - 80005e4: bd80 pop {r7, pc} - 80005e6: 46c0 nop ; (mov r8, r8) - 80005e8: 40021000 .word 0x40021000 + 800069e: 46c0 nop ; (mov r8, r8) + 80006a0: 46bd mov sp, r7 + 80006a2: b002 add sp, #8 + 80006a4: bd80 pop {r7, pc} + 80006a6: 46c0 nop ; (mov r8, r8) + 80006a8: 40021000 .word 0x40021000 -080005ec : +080006ac : +* This function configures the hardware resources used in this example +* @param hadc: ADC handle pointer +* @retval None +*/ +void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) +{ + 80006ac: b590 push {r4, r7, lr} + 80006ae: b08b sub sp, #44 ; 0x2c + 80006b0: af00 add r7, sp, #0 + 80006b2: 6078 str r0, [r7, #4] + GPIO_InitTypeDef GPIO_InitStruct = {0}; + 80006b4: 2414 movs r4, #20 + 80006b6: 193b adds r3, r7, r4 + 80006b8: 0018 movs r0, r3 + 80006ba: 2314 movs r3, #20 + 80006bc: 001a movs r2, r3 + 80006be: 2100 movs r1, #0 + 80006c0: f002 fcb0 bl 8003024 + if(hadc->Instance==ADC1) + 80006c4: 687b ldr r3, [r7, #4] + 80006c6: 681b ldr r3, [r3, #0] + 80006c8: 4a19 ldr r2, [pc, #100] ; (8000730 ) + 80006ca: 4293 cmp r3, r2 + 80006cc: d12b bne.n 8000726 + { + /* USER CODE BEGIN ADC1_MspInit 0 */ + + /* USER CODE END ADC1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_ADC1_CLK_ENABLE(); + 80006ce: 4b19 ldr r3, [pc, #100] ; (8000734 ) + 80006d0: 699a ldr r2, [r3, #24] + 80006d2: 4b18 ldr r3, [pc, #96] ; (8000734 ) + 80006d4: 2180 movs r1, #128 ; 0x80 + 80006d6: 0089 lsls r1, r1, #2 + 80006d8: 430a orrs r2, r1 + 80006da: 619a str r2, [r3, #24] + 80006dc: 4b15 ldr r3, [pc, #84] ; (8000734 ) + 80006de: 699a ldr r2, [r3, #24] + 80006e0: 2380 movs r3, #128 ; 0x80 + 80006e2: 009b lsls r3, r3, #2 + 80006e4: 4013 ands r3, r2 + 80006e6: 613b str r3, [r7, #16] + 80006e8: 693b ldr r3, [r7, #16] + + __HAL_RCC_GPIOA_CLK_ENABLE(); + 80006ea: 4b12 ldr r3, [pc, #72] ; (8000734 ) + 80006ec: 695a ldr r2, [r3, #20] + 80006ee: 4b11 ldr r3, [pc, #68] ; (8000734 ) + 80006f0: 2180 movs r1, #128 ; 0x80 + 80006f2: 0289 lsls r1, r1, #10 + 80006f4: 430a orrs r2, r1 + 80006f6: 615a str r2, [r3, #20] + 80006f8: 4b0e ldr r3, [pc, #56] ; (8000734 ) + 80006fa: 695a ldr r2, [r3, #20] + 80006fc: 2380 movs r3, #128 ; 0x80 + 80006fe: 029b lsls r3, r3, #10 + 8000700: 4013 ands r3, r2 + 8000702: 60fb str r3, [r7, #12] + 8000704: 68fb ldr r3, [r7, #12] + /**ADC GPIO Configuration + PA0 ------> ADC_IN0 + PA1 ------> ADC_IN1 + */ + GPIO_InitStruct.Pin = ADC_CH0_Pin|ADC_CH1_Pin; + 8000706: 193b adds r3, r7, r4 + 8000708: 2203 movs r2, #3 + 800070a: 601a str r2, [r3, #0] + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 800070c: 193b adds r3, r7, r4 + 800070e: 2203 movs r2, #3 + 8000710: 605a str r2, [r3, #4] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 8000712: 193b adds r3, r7, r4 + 8000714: 2200 movs r2, #0 + 8000716: 609a str r2, [r3, #8] + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 8000718: 193a adds r2, r7, r4 + 800071a: 2390 movs r3, #144 ; 0x90 + 800071c: 05db lsls r3, r3, #23 + 800071e: 0011 movs r1, r2 + 8000720: 0018 movs r0, r3 + 8000722: f000 fe17 bl 8001354 + /* USER CODE BEGIN ADC1_MspInit 1 */ + + /* USER CODE END ADC1_MspInit 1 */ + } + +} + 8000726: 46c0 nop ; (mov r8, r8) + 8000728: 46bd mov sp, r7 + 800072a: b00b add sp, #44 ; 0x2c + 800072c: bd90 pop {r4, r7, pc} + 800072e: 46c0 nop ; (mov r8, r8) + 8000730: 40012400 .word 0x40012400 + 8000734: 40021000 .word 0x40021000 + +08000738 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 80005ec: b580 push {r7, lr} - 80005ee: af00 add r7, sp, #0 + 8000738: b580 push {r7, lr} + 800073a: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 80005f0: e7fe b.n 80005f0 + 800073c: e7fe b.n 800073c -080005f2 : +0800073e : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 80005f2: b580 push {r7, lr} - 80005f4: af00 add r7, sp, #0 + 800073e: b580 push {r7, lr} + 8000740: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 80005f6: e7fe b.n 80005f6 + 8000742: e7fe b.n 8000742 -080005f8 : +08000744 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 80005f8: b580 push {r7, lr} - 80005fa: af00 add r7, sp, #0 + 8000744: b580 push {r7, lr} + 8000746: af00 add r7, sp, #0 /* USER CODE END SVC_IRQn 0 */ /* USER CODE BEGIN SVC_IRQn 1 */ /* USER CODE END SVC_IRQn 1 */ } - 80005fc: 46c0 nop ; (mov r8, r8) - 80005fe: 46bd mov sp, r7 - 8000600: bd80 pop {r7, pc} + 8000748: 46c0 nop ; (mov r8, r8) + 800074a: 46bd mov sp, r7 + 800074c: bd80 pop {r7, pc} -08000602 : +0800074e : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 8000602: b580 push {r7, lr} - 8000604: af00 add r7, sp, #0 + 800074e: b580 push {r7, lr} + 8000750: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8000606: 46c0 nop ; (mov r8, r8) - 8000608: 46bd mov sp, r7 - 800060a: bd80 pop {r7, pc} + 8000752: 46c0 nop ; (mov r8, r8) + 8000754: 46bd mov sp, r7 + 8000756: bd80 pop {r7, pc} -0800060c : +08000758 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 800060c: b580 push {r7, lr} - 800060e: af00 add r7, sp, #0 + 8000758: b580 push {r7, lr} + 800075a: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 8000610: f000 f87a bl 8000708 + 800075c: f000 f87a bl 8000854 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 8000614: 46c0 nop ; (mov r8, r8) - 8000616: 46bd mov sp, r7 - 8000618: bd80 pop {r7, pc} + 8000760: 46c0 nop ; (mov r8, r8) + 8000762: 46bd mov sp, r7 + 8000764: bd80 pop {r7, pc} -0800061a : +08000766 : * @brief Setup the microcontroller system * @param None * @retval None */ void SystemInit(void) { - 800061a: b580 push {r7, lr} - 800061c: af00 add r7, sp, #0 + 8000766: b580 push {r7, lr} + 8000768: af00 add r7, sp, #0 before branch to main program. This call is made inside the "startup_stm32f0xx.s" file. User can setups the default system clock (System clock source, PLL Multiplier and Divider factors, AHB/APBx prescalers and Flash settings). */ } - 800061e: 46c0 nop ; (mov r8, r8) - 8000620: 46bd mov sp, r7 - 8000622: bd80 pop {r7, pc} + 800076a: 46c0 nop ; (mov r8, r8) + 800076c: 46bd mov sp, r7 + 800076e: bd80 pop {r7, pc} -08000624 : +08000770 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr r0, =_estack - 8000624: 480d ldr r0, [pc, #52] ; (800065c ) + 8000770: 480d ldr r0, [pc, #52] ; (80007a8 ) mov sp, r0 /* set stack pointer */ - 8000626: 4685 mov sp, r0 + 8000772: 4685 mov sp, r0 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8000628: 480d ldr r0, [pc, #52] ; (8000660 ) + 8000774: 480d ldr r0, [pc, #52] ; (80007ac ) ldr r1, =_edata - 800062a: 490e ldr r1, [pc, #56] ; (8000664 ) + 8000776: 490e ldr r1, [pc, #56] ; (80007b0 ) ldr r2, =_sidata - 800062c: 4a0e ldr r2, [pc, #56] ; (8000668 ) + 8000778: 4a0e ldr r2, [pc, #56] ; (80007b4 ) movs r3, #0 - 800062e: 2300 movs r3, #0 + 800077a: 2300 movs r3, #0 b LoopCopyDataInit - 8000630: e002 b.n 8000638 + 800077c: e002 b.n 8000784 -08000632 : +0800077e : CopyDataInit: ldr r4, [r2, r3] - 8000632: 58d4 ldr r4, [r2, r3] + 800077e: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 8000634: 50c4 str r4, [r0, r3] + 8000780: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 8000636: 3304 adds r3, #4 + 8000782: 3304 adds r3, #4 -08000638 : +08000784 : LoopCopyDataInit: adds r4, r0, r3 - 8000638: 18c4 adds r4, r0, r3 + 8000784: 18c4 adds r4, r0, r3 cmp r4, r1 - 800063a: 428c cmp r4, r1 + 8000786: 428c cmp r4, r1 bcc CopyDataInit - 800063c: d3f9 bcc.n 8000632 + 8000788: d3f9 bcc.n 800077e /* Zero fill the bss segment. */ ldr r2, =_sbss - 800063e: 4a0b ldr r2, [pc, #44] ; (800066c ) + 800078a: 4a0b ldr r2, [pc, #44] ; (80007b8 ) ldr r4, =_ebss - 8000640: 4c0b ldr r4, [pc, #44] ; (8000670 ) + 800078c: 4c0b ldr r4, [pc, #44] ; (80007bc ) movs r3, #0 - 8000642: 2300 movs r3, #0 + 800078e: 2300 movs r3, #0 b LoopFillZerobss - 8000644: e001 b.n 800064a + 8000790: e001 b.n 8000796 -08000646 : +08000792 : FillZerobss: str r3, [r2] - 8000646: 6013 str r3, [r2, #0] + 8000792: 6013 str r3, [r2, #0] adds r2, r2, #4 - 8000648: 3204 adds r2, #4 + 8000794: 3204 adds r2, #4 -0800064a : +08000796 : LoopFillZerobss: cmp r2, r4 - 800064a: 42a2 cmp r2, r4 + 8000796: 42a2 cmp r2, r4 bcc FillZerobss - 800064c: d3fb bcc.n 8000646 + 8000798: d3fb bcc.n 8000792 /* Call the clock system intitialization function.*/ bl SystemInit - 800064e: f7ff ffe4 bl 800061a + 800079a: f7ff ffe4 bl 8000766 /* Call static constructors */ bl __libc_init_array - 8000652: f001 fef1 bl 8002438 <__libc_init_array> + 800079e: f002 fc1d bl 8002fdc <__libc_init_array> /* Call the application's entry point.*/ bl main - 8000656: f7ff fecd bl 80003f4
+ 80007a2: f7ff fe27 bl 80003f4
-0800065a : +080007a6 : LoopForever: b LoopForever - 800065a: e7fe b.n 800065a + 80007a6: e7fe b.n 80007a6 ldr r0, =_estack - 800065c: 20001000 .word 0x20001000 + 80007a8: 20001000 .word 0x20001000 ldr r0, =_sdata - 8000660: 20000000 .word 0x20000000 + 80007ac: 20000000 .word 0x20000000 ldr r1, =_edata - 8000664: 2000000c .word 0x2000000c + 80007b0: 2000000c .word 0x2000000c ldr r2, =_sidata - 8000668: 0800250c .word 0x0800250c + 80007b4: 080030b0 .word 0x080030b0 ldr r2, =_sbss - 800066c: 2000000c .word 0x2000000c + 80007b8: 2000000c .word 0x2000000c ldr r4, =_ebss - 8000670: 20000098 .word 0x20000098 + 80007bc: 200000ec .word 0x200000ec -08000674 : +080007c0 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 8000674: e7fe b.n 8000674 + 80007c0: e7fe b.n 80007c0 ... -08000678 : +080007c4 : * In the default implementation,Systick is used as source of time base. * The tick variable is incremented each 1ms in its ISR. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8000678: b580 push {r7, lr} - 800067a: af00 add r7, sp, #0 + 80007c4: b580 push {r7, lr} + 80007c6: af00 add r7, sp, #0 /* Configure Flash prefetch */ #if (PREFETCH_ENABLE != 0) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 800067c: 4b07 ldr r3, [pc, #28] ; (800069c ) - 800067e: 681a ldr r2, [r3, #0] - 8000680: 4b06 ldr r3, [pc, #24] ; (800069c ) - 8000682: 2110 movs r1, #16 - 8000684: 430a orrs r2, r1 - 8000686: 601a str r2, [r3, #0] + 80007c8: 4b07 ldr r3, [pc, #28] ; (80007e8 ) + 80007ca: 681a ldr r2, [r3, #0] + 80007cc: 4b06 ldr r3, [pc, #24] ; (80007e8 ) + 80007ce: 2110 movs r1, #16 + 80007d0: 430a orrs r2, r1 + 80007d2: 601a str r2, [r3, #0] #endif /* PREFETCH_ENABLE */ /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); - 8000688: 2003 movs r0, #3 - 800068a: f000 f809 bl 80006a0 + 80007d4: 2003 movs r0, #3 + 80007d6: f000 f809 bl 80007ec /* Init the low level hardware */ HAL_MspInit(); - 800068e: f7ff ff89 bl 80005a4 + 80007da: f7ff ff43 bl 8000664 /* Return function status */ return HAL_OK; - 8000692: 2300 movs r3, #0 + 80007de: 2300 movs r3, #0 } - 8000694: 0018 movs r0, r3 - 8000696: 46bd mov sp, r7 - 8000698: bd80 pop {r7, pc} - 800069a: 46c0 nop ; (mov r8, r8) - 800069c: 40022000 .word 0x40022000 + 80007e0: 0018 movs r0, r3 + 80007e2: 46bd mov sp, r7 + 80007e4: bd80 pop {r7, pc} + 80007e6: 46c0 nop ; (mov r8, r8) + 80007e8: 40022000 .word 0x40022000 -080006a0 : +080007ec : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 80006a0: b590 push {r4, r7, lr} - 80006a2: b083 sub sp, #12 - 80006a4: af00 add r7, sp, #0 - 80006a6: 6078 str r0, [r7, #4] + 80007ec: b590 push {r4, r7, lr} + 80007ee: b083 sub sp, #12 + 80007f0: af00 add r7, sp, #0 + 80007f2: 6078 str r0, [r7, #4] /*Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 80006a8: 4b14 ldr r3, [pc, #80] ; (80006fc ) - 80006aa: 681c ldr r4, [r3, #0] - 80006ac: 4b14 ldr r3, [pc, #80] ; (8000700 ) - 80006ae: 781b ldrb r3, [r3, #0] - 80006b0: 0019 movs r1, r3 - 80006b2: 23fa movs r3, #250 ; 0xfa - 80006b4: 0098 lsls r0, r3, #2 - 80006b6: f7ff fd27 bl 8000108 <__udivsi3> - 80006ba: 0003 movs r3, r0 - 80006bc: 0019 movs r1, r3 - 80006be: 0020 movs r0, r4 - 80006c0: f7ff fd22 bl 8000108 <__udivsi3> - 80006c4: 0003 movs r3, r0 - 80006c6: 0018 movs r0, r3 - 80006c8: f000 f8e1 bl 800088e - 80006cc: 1e03 subs r3, r0, #0 - 80006ce: d001 beq.n 80006d4 + 80007f4: 4b14 ldr r3, [pc, #80] ; (8000848 ) + 80007f6: 681c ldr r4, [r3, #0] + 80007f8: 4b14 ldr r3, [pc, #80] ; (800084c ) + 80007fa: 781b ldrb r3, [r3, #0] + 80007fc: 0019 movs r1, r3 + 80007fe: 23fa movs r3, #250 ; 0xfa + 8000800: 0098 lsls r0, r3, #2 + 8000802: f7ff fc81 bl 8000108 <__udivsi3> + 8000806: 0003 movs r3, r0 + 8000808: 0019 movs r1, r3 + 800080a: 0020 movs r0, r4 + 800080c: f7ff fc7c bl 8000108 <__udivsi3> + 8000810: 0003 movs r3, r0 + 8000812: 0018 movs r0, r3 + 8000814: f000 fd91 bl 800133a + 8000818: 1e03 subs r3, r0, #0 + 800081a: d001 beq.n 8000820 { return HAL_ERROR; - 80006d0: 2301 movs r3, #1 - 80006d2: e00f b.n 80006f4 + 800081c: 2301 movs r3, #1 + 800081e: e00f b.n 8000840 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 80006d4: 687b ldr r3, [r7, #4] - 80006d6: 2b03 cmp r3, #3 - 80006d8: d80b bhi.n 80006f2 + 8000820: 687b ldr r3, [r7, #4] + 8000822: 2b03 cmp r3, #3 + 8000824: d80b bhi.n 800083e { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 80006da: 6879 ldr r1, [r7, #4] - 80006dc: 2301 movs r3, #1 - 80006de: 425b negs r3, r3 - 80006e0: 2200 movs r2, #0 - 80006e2: 0018 movs r0, r3 - 80006e4: f000 f8be bl 8000864 + 8000826: 6879 ldr r1, [r7, #4] + 8000828: 2301 movs r3, #1 + 800082a: 425b negs r3, r3 + 800082c: 2200 movs r2, #0 + 800082e: 0018 movs r0, r3 + 8000830: f000 fd6e bl 8001310 uwTickPrio = TickPriority; - 80006e8: 4b06 ldr r3, [pc, #24] ; (8000704 ) - 80006ea: 687a ldr r2, [r7, #4] - 80006ec: 601a str r2, [r3, #0] + 8000834: 4b06 ldr r3, [pc, #24] ; (8000850 ) + 8000836: 687a ldr r2, [r7, #4] + 8000838: 601a str r2, [r3, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 80006ee: 2300 movs r3, #0 - 80006f0: e000 b.n 80006f4 + 800083a: 2300 movs r3, #0 + 800083c: e000 b.n 8000840 return HAL_ERROR; - 80006f2: 2301 movs r3, #1 + 800083e: 2301 movs r3, #1 } - 80006f4: 0018 movs r0, r3 - 80006f6: 46bd mov sp, r7 - 80006f8: b003 add sp, #12 - 80006fa: bd90 pop {r4, r7, pc} - 80006fc: 20000000 .word 0x20000000 - 8000700: 20000008 .word 0x20000008 - 8000704: 20000004 .word 0x20000004 + 8000840: 0018 movs r0, r3 + 8000842: 46bd mov sp, r7 + 8000844: b003 add sp, #12 + 8000846: bd90 pop {r4, r7, pc} + 8000848: 20000000 .word 0x20000000 + 800084c: 20000008 .word 0x20000008 + 8000850: 20000004 .word 0x20000004 -08000708 : +08000854 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 8000708: b580 push {r7, lr} - 800070a: af00 add r7, sp, #0 + 8000854: b580 push {r7, lr} + 8000856: af00 add r7, sp, #0 uwTick += uwTickFreq; - 800070c: 4b05 ldr r3, [pc, #20] ; (8000724 ) - 800070e: 781b ldrb r3, [r3, #0] - 8000710: 001a movs r2, r3 - 8000712: 4b05 ldr r3, [pc, #20] ; (8000728 ) - 8000714: 681b ldr r3, [r3, #0] - 8000716: 18d2 adds r2, r2, r3 - 8000718: 4b03 ldr r3, [pc, #12] ; (8000728 ) - 800071a: 601a str r2, [r3, #0] + 8000858: 4b05 ldr r3, [pc, #20] ; (8000870 ) + 800085a: 781b ldrb r3, [r3, #0] + 800085c: 001a movs r2, r3 + 800085e: 4b05 ldr r3, [pc, #20] ; (8000874 ) + 8000860: 681b ldr r3, [r3, #0] + 8000862: 18d2 adds r2, r2, r3 + 8000864: 4b03 ldr r3, [pc, #12] ; (8000874 ) + 8000866: 601a str r2, [r3, #0] } - 800071c: 46c0 nop ; (mov r8, r8) - 800071e: 46bd mov sp, r7 - 8000720: bd80 pop {r7, pc} - 8000722: 46c0 nop ; (mov r8, r8) - 8000724: 20000008 .word 0x20000008 - 8000728: 20000028 .word 0x20000028 + 8000868: 46c0 nop ; (mov r8, r8) + 800086a: 46bd mov sp, r7 + 800086c: bd80 pop {r7, pc} + 800086e: 46c0 nop ; (mov r8, r8) + 8000870: 20000008 .word 0x20000008 + 8000874: 20000068 .word 0x20000068 -0800072c : +08000878 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 800072c: b580 push {r7, lr} - 800072e: af00 add r7, sp, #0 + 8000878: b580 push {r7, lr} + 800087a: af00 add r7, sp, #0 return uwTick; - 8000730: 4b02 ldr r3, [pc, #8] ; (800073c ) - 8000732: 681b ldr r3, [r3, #0] + 800087c: 4b02 ldr r3, [pc, #8] ; (8000888 ) + 800087e: 681b ldr r3, [r3, #0] } - 8000734: 0018 movs r0, r3 - 8000736: 46bd mov sp, r7 - 8000738: bd80 pop {r7, pc} - 800073a: 46c0 nop ; (mov r8, r8) - 800073c: 20000028 .word 0x20000028 + 8000880: 0018 movs r0, r3 + 8000882: 46bd mov sp, r7 + 8000884: bd80 pop {r7, pc} + 8000886: 46c0 nop ; (mov r8, r8) + 8000888: 20000068 .word 0x20000068 -08000740 <__NVIC_SetPriority>: +0800088c : + * of structure "ADC_InitTypeDef". + * @param hadc ADC handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) +{ + 800088c: b580 push {r7, lr} + 800088e: b084 sub sp, #16 + 8000890: af00 add r7, sp, #0 + 8000892: 6078 str r0, [r7, #4] + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 8000894: 230f movs r3, #15 + 8000896: 18fb adds r3, r7, r3 + 8000898: 2200 movs r2, #0 + 800089a: 701a strb r2, [r3, #0] + uint32_t tmpCFGR1 = 0U; + 800089c: 2300 movs r3, #0 + 800089e: 60bb str r3, [r7, #8] + + /* Check ADC handle */ + if(hadc == NULL) + 80008a0: 687b ldr r3, [r7, #4] + 80008a2: 2b00 cmp r3, #0 + 80008a4: d101 bne.n 80008aa + { + return HAL_ERROR; + 80008a6: 2301 movs r3, #1 + 80008a8: e125 b.n 8000af6 + /* Refer to header of this file for more details on clock enabling procedure*/ + + /* Actions performed only if ADC is coming from state reset: */ + /* - Initialization of ADC MSP */ + /* - ADC voltage regulator enable */ + if (hadc->State == HAL_ADC_STATE_RESET) + 80008aa: 687b ldr r3, [r7, #4] + 80008ac: 6b9b ldr r3, [r3, #56] ; 0x38 + 80008ae: 2b00 cmp r3, #0 + 80008b0: d10a bne.n 80008c8 + { + /* Initialize ADC error code */ + ADC_CLEAR_ERRORCODE(hadc); + 80008b2: 687b ldr r3, [r7, #4] + 80008b4: 2200 movs r2, #0 + 80008b6: 63da str r2, [r3, #60] ; 0x3c + + /* Allocate lock resource and initialize it */ + hadc->Lock = HAL_UNLOCKED; + 80008b8: 687b ldr r3, [r7, #4] + 80008ba: 2234 movs r2, #52 ; 0x34 + 80008bc: 2100 movs r1, #0 + 80008be: 5499 strb r1, [r3, r2] + + /* Init the low level hardware */ + hadc->MspInitCallback(hadc); +#else + /* Init the low level hardware */ + HAL_ADC_MspInit(hadc); + 80008c0: 687b ldr r3, [r7, #4] + 80008c2: 0018 movs r0, r3 + 80008c4: f7ff fef2 bl 80006ac + /* Configuration of ADC parameters if previous preliminary actions are */ + /* correctly completed. */ + /* and if there is no conversion on going on regular group (ADC can be */ + /* enabled anyway, in case of call of this function to update a parameter */ + /* on the fly). */ + if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && + 80008c8: 687b ldr r3, [r7, #4] + 80008ca: 6b9b ldr r3, [r3, #56] ; 0x38 + 80008cc: 2210 movs r2, #16 + 80008ce: 4013 ands r3, r2 + 80008d0: d000 beq.n 80008d4 + 80008d2: e103 b.n 8000adc + 80008d4: 230f movs r3, #15 + 80008d6: 18fb adds r3, r7, r3 + 80008d8: 781b ldrb r3, [r3, #0] + 80008da: 2b00 cmp r3, #0 + 80008dc: d000 beq.n 80008e0 + 80008de: e0fd b.n 8000adc + (tmp_hal_status == HAL_OK) && + (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) + 80008e0: 687b ldr r3, [r7, #4] + 80008e2: 681b ldr r3, [r3, #0] + 80008e4: 689b ldr r3, [r3, #8] + 80008e6: 2204 movs r2, #4 + 80008e8: 4013 ands r3, r2 + (tmp_hal_status == HAL_OK) && + 80008ea: d000 beq.n 80008ee + 80008ec: e0f6 b.n 8000adc + { + /* Set ADC state */ + ADC_STATE_CLR_SET(hadc->State, + 80008ee: 687b ldr r3, [r7, #4] + 80008f0: 6b9b ldr r3, [r3, #56] ; 0x38 + 80008f2: 4a83 ldr r2, [pc, #524] ; (8000b00 ) + 80008f4: 4013 ands r3, r2 + 80008f6: 2202 movs r2, #2 + 80008f8: 431a orrs r2, r3 + 80008fa: 687b ldr r3, [r7, #4] + 80008fc: 639a str r2, [r3, #56] ; 0x38 + /* Parameters update conditioned to ADC state: */ + /* Parameters that can be updated only when ADC is disabled: */ + /* - ADC clock mode */ + /* - ADC clock prescaler */ + /* - ADC resolution */ + if (ADC_IS_ENABLE(hadc) == RESET) + 80008fe: 687b ldr r3, [r7, #4] + 8000900: 681b ldr r3, [r3, #0] + 8000902: 689b ldr r3, [r3, #8] + 8000904: 2203 movs r2, #3 + 8000906: 4013 ands r3, r2 + 8000908: 2b01 cmp r3, #1 + 800090a: d112 bne.n 8000932 + 800090c: 687b ldr r3, [r7, #4] + 800090e: 681b ldr r3, [r3, #0] + 8000910: 681b ldr r3, [r3, #0] + 8000912: 2201 movs r2, #1 + 8000914: 4013 ands r3, r2 + 8000916: 2b01 cmp r3, #1 + 8000918: d009 beq.n 800092e + 800091a: 687b ldr r3, [r7, #4] + 800091c: 681b ldr r3, [r3, #0] + 800091e: 68da ldr r2, [r3, #12] + 8000920: 2380 movs r3, #128 ; 0x80 + 8000922: 021b lsls r3, r3, #8 + 8000924: 401a ands r2, r3 + 8000926: 2380 movs r3, #128 ; 0x80 + 8000928: 021b lsls r3, r3, #8 + 800092a: 429a cmp r2, r3 + 800092c: d101 bne.n 8000932 + 800092e: 2301 movs r3, #1 + 8000930: e000 b.n 8000934 + 8000932: 2300 movs r3, #0 + 8000934: 2b00 cmp r3, #0 + 8000936: d116 bne.n 8000966 + /* parameters): */ + /* - internal measurement paths: Vbat, temperature sensor, Vref */ + /* (set into HAL_ADC_ConfigChannel() ) */ + + /* Configuration of ADC resolution */ + MODIFY_REG(hadc->Instance->CFGR1, + 8000938: 687b ldr r3, [r7, #4] + 800093a: 681b ldr r3, [r3, #0] + 800093c: 68db ldr r3, [r3, #12] + 800093e: 2218 movs r2, #24 + 8000940: 4393 bics r3, r2 + 8000942: 0019 movs r1, r3 + 8000944: 687b ldr r3, [r7, #4] + 8000946: 689a ldr r2, [r3, #8] + 8000948: 687b ldr r3, [r7, #4] + 800094a: 681b ldr r3, [r3, #0] + 800094c: 430a orrs r2, r1 + 800094e: 60da str r2, [r3, #12] + ADC_CFGR1_RES , + hadc->Init.Resolution ); + + /* Configuration of ADC clock mode: clock source AHB or HSI with */ + /* selectable prescaler */ + MODIFY_REG(hadc->Instance->CFGR2 , + 8000950: 687b ldr r3, [r7, #4] + 8000952: 681b ldr r3, [r3, #0] + 8000954: 691b ldr r3, [r3, #16] + 8000956: 009b lsls r3, r3, #2 + 8000958: 0899 lsrs r1, r3, #2 + 800095a: 687b ldr r3, [r7, #4] + 800095c: 685a ldr r2, [r3, #4] + 800095e: 687b ldr r3, [r7, #4] + 8000960: 681b ldr r3, [r3, #0] + 8000962: 430a orrs r2, r1 + 8000964: 611a str r2, [r3, #16] + /* - external trigger polarity */ + /* - data alignment */ + /* - resolution */ + /* - scan direction */ + /* - DMA continuous request */ + hadc->Instance->CFGR1 &= ~( ADC_CFGR1_DISCEN | + 8000966: 687b ldr r3, [r7, #4] + 8000968: 681b ldr r3, [r3, #0] + 800096a: 68da ldr r2, [r3, #12] + 800096c: 687b ldr r3, [r7, #4] + 800096e: 681b ldr r3, [r3, #0] + 8000970: 4964 ldr r1, [pc, #400] ; (8000b04 ) + 8000972: 400a ands r2, r1 + 8000974: 60da str r2, [r3, #12] + ADC_CFGR1_EXTEN | + ADC_CFGR1_ALIGN | + ADC_CFGR1_SCANDIR | + ADC_CFGR1_DMACFG ); + + tmpCFGR1 |= (ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | + 8000976: 687b ldr r3, [r7, #4] + 8000978: 7e1b ldrb r3, [r3, #24] + 800097a: 039a lsls r2, r3, #14 + ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | + 800097c: 687b ldr r3, [r7, #4] + 800097e: 7e5b ldrb r3, [r3, #25] + 8000980: 03db lsls r3, r3, #15 + tmpCFGR1 |= (ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | + 8000982: 431a orrs r2, r3 + ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | + 8000984: 687b ldr r3, [r7, #4] + 8000986: 7e9b ldrb r3, [r3, #26] + 8000988: 035b lsls r3, r3, #13 + ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | + 800098a: 431a orrs r2, r3 + ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | + 800098c: 687b ldr r3, [r7, #4] + 800098e: 6a9b ldr r3, [r3, #40] ; 0x28 + 8000990: 2b01 cmp r3, #1 + 8000992: d002 beq.n 800099a + 8000994: 2380 movs r3, #128 ; 0x80 + 8000996: 015b lsls r3, r3, #5 + 8000998: e000 b.n 800099c + 800099a: 2300 movs r3, #0 + ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | + 800099c: 431a orrs r2, r3 + hadc->Init.DataAlign | + 800099e: 687b ldr r3, [r7, #4] + 80009a0: 68db ldr r3, [r3, #12] + ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | + 80009a2: 431a orrs r2, r3 + ADC_SCANDIR(hadc->Init.ScanConvMode) | + 80009a4: 687b ldr r3, [r7, #4] + 80009a6: 691b ldr r3, [r3, #16] + 80009a8: 2b02 cmp r3, #2 + 80009aa: d101 bne.n 80009b0 + 80009ac: 2304 movs r3, #4 + 80009ae: e000 b.n 80009b2 + 80009b0: 2300 movs r3, #0 + hadc->Init.DataAlign | + 80009b2: 431a orrs r2, r3 + ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); + 80009b4: 687b ldr r3, [r7, #4] + 80009b6: 2124 movs r1, #36 ; 0x24 + 80009b8: 5c5b ldrb r3, [r3, r1] + 80009ba: 005b lsls r3, r3, #1 + ADC_SCANDIR(hadc->Init.ScanConvMode) | + 80009bc: 4313 orrs r3, r2 + tmpCFGR1 |= (ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | + 80009be: 68ba ldr r2, [r7, #8] + 80009c0: 4313 orrs r3, r2 + 80009c2: 60bb str r3, [r7, #8] + + /* Enable discontinuous mode only if continuous mode is disabled */ + if (hadc->Init.DiscontinuousConvMode == ENABLE) + 80009c4: 687b ldr r3, [r7, #4] + 80009c6: 7edb ldrb r3, [r3, #27] + 80009c8: 2b01 cmp r3, #1 + 80009ca: d115 bne.n 80009f8 + { + if (hadc->Init.ContinuousConvMode == DISABLE) + 80009cc: 687b ldr r3, [r7, #4] + 80009ce: 7e9b ldrb r3, [r3, #26] + 80009d0: 2b00 cmp r3, #0 + 80009d2: d105 bne.n 80009e0 + { + /* Enable the selected ADC group regular discontinuous mode */ + tmpCFGR1 |= ADC_CFGR1_DISCEN; + 80009d4: 68bb ldr r3, [r7, #8] + 80009d6: 2280 movs r2, #128 ; 0x80 + 80009d8: 0252 lsls r2, r2, #9 + 80009da: 4313 orrs r3, r2 + 80009dc: 60bb str r3, [r7, #8] + 80009de: e00b b.n 80009f8 + /* ADC regular group discontinuous was intended to be enabled, */ + /* but ADC regular group modes continuous and sequencer discontinuous */ + /* cannot be enabled simultaneously. */ + + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + 80009e0: 687b ldr r3, [r7, #4] + 80009e2: 6b9b ldr r3, [r3, #56] ; 0x38 + 80009e4: 2220 movs r2, #32 + 80009e6: 431a orrs r2, r3 + 80009e8: 687b ldr r3, [r7, #4] + 80009ea: 639a str r2, [r3, #56] ; 0x38 + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 80009ec: 687b ldr r3, [r7, #4] + 80009ee: 6bdb ldr r3, [r3, #60] ; 0x3c + 80009f0: 2201 movs r2, #1 + 80009f2: 431a orrs r2, r3 + 80009f4: 687b ldr r3, [r7, #4] + 80009f6: 63da str r2, [r3, #60] ; 0x3c + /* Enable external trigger if trigger selection is different of software */ + /* start. */ + /* Note: This configuration keeps the hardware feature of parameter */ + /* ExternalTrigConvEdge "trigger edge none" equivalent to */ + /* software start. */ + if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) + 80009f8: 687b ldr r3, [r7, #4] + 80009fa: 69da ldr r2, [r3, #28] + 80009fc: 23c2 movs r3, #194 ; 0xc2 + 80009fe: 33ff adds r3, #255 ; 0xff + 8000a00: 429a cmp r2, r3 + 8000a02: d007 beq.n 8000a14 + { + tmpCFGR1 |= ( hadc->Init.ExternalTrigConv | + 8000a04: 687b ldr r3, [r7, #4] + 8000a06: 69da ldr r2, [r3, #28] + hadc->Init.ExternalTrigConvEdge ); + 8000a08: 687b ldr r3, [r7, #4] + 8000a0a: 6a1b ldr r3, [r3, #32] + tmpCFGR1 |= ( hadc->Init.ExternalTrigConv | + 8000a0c: 4313 orrs r3, r2 + 8000a0e: 68ba ldr r2, [r7, #8] + 8000a10: 4313 orrs r3, r2 + 8000a12: 60bb str r3, [r7, #8] + } + + /* Update ADC configuration register with previous settings */ + hadc->Instance->CFGR1 |= tmpCFGR1; + 8000a14: 687b ldr r3, [r7, #4] + 8000a16: 681b ldr r3, [r3, #0] + 8000a18: 68d9 ldr r1, [r3, #12] + 8000a1a: 687b ldr r3, [r7, #4] + 8000a1c: 681b ldr r3, [r3, #0] + 8000a1e: 68ba ldr r2, [r7, #8] + 8000a20: 430a orrs r2, r1 + 8000a22: 60da str r2, [r3, #12] + /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */ + /* (obsolete): sampling time set in this function if parameter */ + /* "SamplingTimeCommon" has been set to a valid sampling time. */ + /* Otherwise, sampling time is set into ADC channel initialization */ + /* structure with parameter "SamplingTime" (obsolete). */ + if (IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) + 8000a24: 687b ldr r3, [r7, #4] + 8000a26: 6ada ldr r2, [r3, #44] ; 0x2c + 8000a28: 2380 movs r3, #128 ; 0x80 + 8000a2a: 055b lsls r3, r3, #21 + 8000a2c: 429a cmp r2, r3 + 8000a2e: d01b beq.n 8000a68 + 8000a30: 687b ldr r3, [r7, #4] + 8000a32: 6adb ldr r3, [r3, #44] ; 0x2c + 8000a34: 2b01 cmp r3, #1 + 8000a36: d017 beq.n 8000a68 + 8000a38: 687b ldr r3, [r7, #4] + 8000a3a: 6adb ldr r3, [r3, #44] ; 0x2c + 8000a3c: 2b02 cmp r3, #2 + 8000a3e: d013 beq.n 8000a68 + 8000a40: 687b ldr r3, [r7, #4] + 8000a42: 6adb ldr r3, [r3, #44] ; 0x2c + 8000a44: 2b03 cmp r3, #3 + 8000a46: d00f beq.n 8000a68 + 8000a48: 687b ldr r3, [r7, #4] + 8000a4a: 6adb ldr r3, [r3, #44] ; 0x2c + 8000a4c: 2b04 cmp r3, #4 + 8000a4e: d00b beq.n 8000a68 + 8000a50: 687b ldr r3, [r7, #4] + 8000a52: 6adb ldr r3, [r3, #44] ; 0x2c + 8000a54: 2b05 cmp r3, #5 + 8000a56: d007 beq.n 8000a68 + 8000a58: 687b ldr r3, [r7, #4] + 8000a5a: 6adb ldr r3, [r3, #44] ; 0x2c + 8000a5c: 2b06 cmp r3, #6 + 8000a5e: d003 beq.n 8000a68 + 8000a60: 687b ldr r3, [r7, #4] + 8000a62: 6adb ldr r3, [r3, #44] ; 0x2c + 8000a64: 2b07 cmp r3, #7 + 8000a66: d112 bne.n 8000a8e + { + /* Channel sampling time configuration */ + /* Clear the old sample time */ + hadc->Instance->SMPR &= ~(ADC_SMPR_SMP); + 8000a68: 687b ldr r3, [r7, #4] + 8000a6a: 681b ldr r3, [r3, #0] + 8000a6c: 695a ldr r2, [r3, #20] + 8000a6e: 687b ldr r3, [r7, #4] + 8000a70: 681b ldr r3, [r3, #0] + 8000a72: 2107 movs r1, #7 + 8000a74: 438a bics r2, r1 + 8000a76: 615a str r2, [r3, #20] + + /* Set the new sample time */ + hadc->Instance->SMPR |= ADC_SMPR_SET(hadc->Init.SamplingTimeCommon); + 8000a78: 687b ldr r3, [r7, #4] + 8000a7a: 681b ldr r3, [r3, #0] + 8000a7c: 6959 ldr r1, [r3, #20] + 8000a7e: 687b ldr r3, [r7, #4] + 8000a80: 6adb ldr r3, [r3, #44] ; 0x2c + 8000a82: 2207 movs r2, #7 + 8000a84: 401a ands r2, r3 + 8000a86: 687b ldr r3, [r7, #4] + 8000a88: 681b ldr r3, [r3, #0] + 8000a8a: 430a orrs r2, r1 + 8000a8c: 615a str r2, [r3, #20] + /* Check back that ADC registers have effectively been configured to */ + /* ensure of no potential problem of ADC core IP clocking. */ + /* Check through register CFGR1 (excluding analog watchdog configuration: */ + /* set into separate dedicated function, and bits of ADC resolution set */ + /* out of temporary variable 'tmpCFGR1'). */ + if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_RES)) + 8000a8e: 687b ldr r3, [r7, #4] + 8000a90: 681b ldr r3, [r3, #0] + 8000a92: 68db ldr r3, [r3, #12] + 8000a94: 4a1c ldr r2, [pc, #112] ; (8000b08 ) + 8000a96: 4013 ands r3, r2 + 8000a98: 68ba ldr r2, [r7, #8] + 8000a9a: 429a cmp r2, r3 + 8000a9c: d10b bne.n 8000ab6 + == tmpCFGR1) + { + /* Set ADC error code to none */ + ADC_CLEAR_ERRORCODE(hadc); + 8000a9e: 687b ldr r3, [r7, #4] + 8000aa0: 2200 movs r2, #0 + 8000aa2: 63da str r2, [r3, #60] ; 0x3c + + /* Set the ADC state */ + ADC_STATE_CLR_SET(hadc->State, + 8000aa4: 687b ldr r3, [r7, #4] + 8000aa6: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000aa8: 2203 movs r2, #3 + 8000aaa: 4393 bics r3, r2 + 8000aac: 2201 movs r2, #1 + 8000aae: 431a orrs r2, r3 + 8000ab0: 687b ldr r3, [r7, #4] + 8000ab2: 639a str r2, [r3, #56] ; 0x38 + if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_RES)) + 8000ab4: e01c b.n 8000af0 + HAL_ADC_STATE_READY); + } + else + { + /* Update ADC state machine to error */ + ADC_STATE_CLR_SET(hadc->State, + 8000ab6: 687b ldr r3, [r7, #4] + 8000ab8: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000aba: 2212 movs r2, #18 + 8000abc: 4393 bics r3, r2 + 8000abe: 2210 movs r2, #16 + 8000ac0: 431a orrs r2, r3 + 8000ac2: 687b ldr r3, [r7, #4] + 8000ac4: 639a str r2, [r3, #56] ; 0x38 + HAL_ADC_STATE_BUSY_INTERNAL, + HAL_ADC_STATE_ERROR_INTERNAL); + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 8000ac6: 687b ldr r3, [r7, #4] + 8000ac8: 6bdb ldr r3, [r3, #60] ; 0x3c + 8000aca: 2201 movs r2, #1 + 8000acc: 431a orrs r2, r3 + 8000ace: 687b ldr r3, [r7, #4] + 8000ad0: 63da str r2, [r3, #60] ; 0x3c + + tmp_hal_status = HAL_ERROR; + 8000ad2: 230f movs r3, #15 + 8000ad4: 18fb adds r3, r7, r3 + 8000ad6: 2201 movs r2, #1 + 8000ad8: 701a strb r2, [r3, #0] + if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_RES)) + 8000ada: e009 b.n 8000af0 + + } + else + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 8000adc: 687b ldr r3, [r7, #4] + 8000ade: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000ae0: 2210 movs r2, #16 + 8000ae2: 431a orrs r2, r3 + 8000ae4: 687b ldr r3, [r7, #4] + 8000ae6: 639a str r2, [r3, #56] ; 0x38 + + tmp_hal_status = HAL_ERROR; + 8000ae8: 230f movs r3, #15 + 8000aea: 18fb adds r3, r7, r3 + 8000aec: 2201 movs r2, #1 + 8000aee: 701a strb r2, [r3, #0] + } + + /* Return function status */ + return tmp_hal_status; + 8000af0: 230f movs r3, #15 + 8000af2: 18fb adds r3, r7, r3 + 8000af4: 781b ldrb r3, [r3, #0] +} + 8000af6: 0018 movs r0, r3 + 8000af8: 46bd mov sp, r7 + 8000afa: b004 add sp, #16 + 8000afc: bd80 pop {r7, pc} + 8000afe: 46c0 nop ; (mov r8, r8) + 8000b00: fffffefd .word 0xfffffefd + 8000b04: fffe0219 .word 0xfffe0219 + 8000b08: 833fffe7 .word 0x833fffe7 + +08000b0c : + * Interruptions enabled in this function: None. + * @param hadc ADC handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) +{ + 8000b0c: b590 push {r4, r7, lr} + 8000b0e: b085 sub sp, #20 + 8000b10: af00 add r7, sp, #0 + 8000b12: 6078 str r0, [r7, #4] + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 8000b14: 230f movs r3, #15 + 8000b16: 18fb adds r3, r7, r3 + 8000b18: 2200 movs r2, #0 + 8000b1a: 701a strb r2, [r3, #0] + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Perform ADC enable and conversion start if no conversion is on going */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) + 8000b1c: 687b ldr r3, [r7, #4] + 8000b1e: 681b ldr r3, [r3, #0] + 8000b20: 689b ldr r3, [r3, #8] + 8000b22: 2204 movs r2, #4 + 8000b24: 4013 ands r3, r2 + 8000b26: d138 bne.n 8000b9a + { + /* Process locked */ + __HAL_LOCK(hadc); + 8000b28: 687b ldr r3, [r7, #4] + 8000b2a: 2234 movs r2, #52 ; 0x34 + 8000b2c: 5c9b ldrb r3, [r3, r2] + 8000b2e: 2b01 cmp r3, #1 + 8000b30: d101 bne.n 8000b36 + 8000b32: 2302 movs r3, #2 + 8000b34: e038 b.n 8000ba8 + 8000b36: 687b ldr r3, [r7, #4] + 8000b38: 2234 movs r2, #52 ; 0x34 + 8000b3a: 2101 movs r1, #1 + 8000b3c: 5499 strb r1, [r3, r2] + + /* Enable the ADC peripheral */ + /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ + /* performed automatically by hardware. */ + if (hadc->Init.LowPowerAutoPowerOff != ENABLE) + 8000b3e: 687b ldr r3, [r7, #4] + 8000b40: 7e5b ldrb r3, [r3, #25] + 8000b42: 2b01 cmp r3, #1 + 8000b44: d007 beq.n 8000b56 + { + tmp_hal_status = ADC_Enable(hadc); + 8000b46: 230f movs r3, #15 + 8000b48: 18fc adds r4, r7, r3 + 8000b4a: 687b ldr r3, [r7, #4] + 8000b4c: 0018 movs r0, r3 + 8000b4e: f000 fa0b bl 8000f68 + 8000b52: 0003 movs r3, r0 + 8000b54: 7023 strb r3, [r4, #0] + } + + /* Start conversion if ADC is effectively enabled */ + if (tmp_hal_status == HAL_OK) + 8000b56: 230f movs r3, #15 + 8000b58: 18fb adds r3, r7, r3 + 8000b5a: 781b ldrb r3, [r3, #0] + 8000b5c: 2b00 cmp r3, #0 + 8000b5e: d120 bne.n 8000ba2 + { + /* Set ADC state */ + /* - Clear state bitfield related to regular group conversion results */ + /* - Set state bitfield related to regular operation */ + ADC_STATE_CLR_SET(hadc->State, + 8000b60: 687b ldr r3, [r7, #4] + 8000b62: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000b64: 4a12 ldr r2, [pc, #72] ; (8000bb0 ) + 8000b66: 4013 ands r3, r2 + 8000b68: 2280 movs r2, #128 ; 0x80 + 8000b6a: 0052 lsls r2, r2, #1 + 8000b6c: 431a orrs r2, r3 + 8000b6e: 687b ldr r3, [r7, #4] + 8000b70: 639a str r2, [r3, #56] ; 0x38 + HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP, + HAL_ADC_STATE_REG_BUSY); + + /* Reset ADC all error code fields */ + ADC_CLEAR_ERRORCODE(hadc); + 8000b72: 687b ldr r3, [r7, #4] + 8000b74: 2200 movs r2, #0 + 8000b76: 63da str r2, [r3, #60] ; 0x3c + + /* Process unlocked */ + /* Unlock before starting ADC conversions: in case of potential */ + /* interruption, to let the process to ADC IRQ Handler. */ + __HAL_UNLOCK(hadc); + 8000b78: 687b ldr r3, [r7, #4] + 8000b7a: 2234 movs r2, #52 ; 0x34 + 8000b7c: 2100 movs r1, #0 + 8000b7e: 5499 strb r1, [r3, r2] + + /* Clear regular group conversion flag and overrun flag */ + /* (To ensure of no unknown state from potential previous ADC */ + /* operations) */ + __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); + 8000b80: 687b ldr r3, [r7, #4] + 8000b82: 681b ldr r3, [r3, #0] + 8000b84: 221c movs r2, #28 + 8000b86: 601a str r2, [r3, #0] + + /* Enable conversion of regular group. */ + /* If software start has been selected, conversion starts immediately. */ + /* If external trigger has been selected, conversion will start at next */ + /* trigger event. */ + hadc->Instance->CR |= ADC_CR_ADSTART; + 8000b88: 687b ldr r3, [r7, #4] + 8000b8a: 681b ldr r3, [r3, #0] + 8000b8c: 689a ldr r2, [r3, #8] + 8000b8e: 687b ldr r3, [r7, #4] + 8000b90: 681b ldr r3, [r3, #0] + 8000b92: 2104 movs r1, #4 + 8000b94: 430a orrs r2, r1 + 8000b96: 609a str r2, [r3, #8] + 8000b98: e003 b.n 8000ba2 + } + } + else + { + tmp_hal_status = HAL_BUSY; + 8000b9a: 230f movs r3, #15 + 8000b9c: 18fb adds r3, r7, r3 + 8000b9e: 2202 movs r2, #2 + 8000ba0: 701a strb r2, [r3, #0] + } + + /* Return function status */ + return tmp_hal_status; + 8000ba2: 230f movs r3, #15 + 8000ba4: 18fb adds r3, r7, r3 + 8000ba6: 781b ldrb r3, [r3, #0] +} + 8000ba8: 0018 movs r0, r3 + 8000baa: 46bd mov sp, r7 + 8000bac: b005 add sp, #20 + 8000bae: bd90 pop {r4, r7, pc} + 8000bb0: fffff0fe .word 0xfffff0fe + +08000bb4 : + * @brief Stop ADC conversion of regular group, disable ADC peripheral. + * @param hadc ADC handle + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) +{ + 8000bb4: b5b0 push {r4, r5, r7, lr} + 8000bb6: b084 sub sp, #16 + 8000bb8: af00 add r7, sp, #0 + 8000bba: 6078 str r0, [r7, #4] + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 8000bbc: 230f movs r3, #15 + 8000bbe: 18fb adds r3, r7, r3 + 8000bc0: 2200 movs r2, #0 + 8000bc2: 701a strb r2, [r3, #0] + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Process locked */ + __HAL_LOCK(hadc); + 8000bc4: 687b ldr r3, [r7, #4] + 8000bc6: 2234 movs r2, #52 ; 0x34 + 8000bc8: 5c9b ldrb r3, [r3, r2] + 8000bca: 2b01 cmp r3, #1 + 8000bcc: d101 bne.n 8000bd2 + 8000bce: 2302 movs r3, #2 + 8000bd0: e029 b.n 8000c26 + 8000bd2: 687b ldr r3, [r7, #4] + 8000bd4: 2234 movs r2, #52 ; 0x34 + 8000bd6: 2101 movs r1, #1 + 8000bd8: 5499 strb r1, [r3, r2] + + /* 1. Stop potential conversion on going, on regular group */ + tmp_hal_status = ADC_ConversionStop(hadc); + 8000bda: 250f movs r5, #15 + 8000bdc: 197c adds r4, r7, r5 + 8000bde: 687b ldr r3, [r7, #4] + 8000be0: 0018 movs r0, r3 + 8000be2: f000 fab6 bl 8001152 + 8000be6: 0003 movs r3, r0 + 8000be8: 7023 strb r3, [r4, #0] + + /* Disable ADC peripheral if conversions are effectively stopped */ + if (tmp_hal_status == HAL_OK) + 8000bea: 197b adds r3, r7, r5 + 8000bec: 781b ldrb r3, [r3, #0] + 8000bee: 2b00 cmp r3, #0 + 8000bf0: d112 bne.n 8000c18 + { + /* 2. Disable the ADC peripheral */ + tmp_hal_status = ADC_Disable(hadc); + 8000bf2: 197c adds r4, r7, r5 + 8000bf4: 687b ldr r3, [r7, #4] + 8000bf6: 0018 movs r0, r3 + 8000bf8: f000 fa3a bl 8001070 + 8000bfc: 0003 movs r3, r0 + 8000bfe: 7023 strb r3, [r4, #0] + + /* Check if ADC is effectively disabled */ + if (tmp_hal_status == HAL_OK) + 8000c00: 197b adds r3, r7, r5 + 8000c02: 781b ldrb r3, [r3, #0] + 8000c04: 2b00 cmp r3, #0 + 8000c06: d107 bne.n 8000c18 + { + /* Set ADC state */ + ADC_STATE_CLR_SET(hadc->State, + 8000c08: 687b ldr r3, [r7, #4] + 8000c0a: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000c0c: 4a08 ldr r2, [pc, #32] ; (8000c30 ) + 8000c0e: 4013 ands r3, r2 + 8000c10: 2201 movs r2, #1 + 8000c12: 431a orrs r2, r3 + 8000c14: 687b ldr r3, [r7, #4] + 8000c16: 639a str r2, [r3, #56] ; 0x38 + HAL_ADC_STATE_READY); + } + } + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + 8000c18: 687b ldr r3, [r7, #4] + 8000c1a: 2234 movs r2, #52 ; 0x34 + 8000c1c: 2100 movs r1, #0 + 8000c1e: 5499 strb r1, [r3, r2] + + /* Return function status */ + return tmp_hal_status; + 8000c20: 230f movs r3, #15 + 8000c22: 18fb adds r3, r7, r3 + 8000c24: 781b ldrb r3, [r3, #0] +} + 8000c26: 0018 movs r0, r3 + 8000c28: 46bd mov sp, r7 + 8000c2a: b004 add sp, #16 + 8000c2c: bdb0 pop {r4, r5, r7, pc} + 8000c2e: 46c0 nop ; (mov r8, r8) + 8000c30: fffffefe .word 0xfffffefe + +08000c34 : + * @param hadc ADC handle + * @param Timeout Timeout value in millisecond. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) +{ + 8000c34: b580 push {r7, lr} + 8000c36: b084 sub sp, #16 + 8000c38: af00 add r7, sp, #0 + 8000c3a: 6078 str r0, [r7, #4] + 8000c3c: 6039 str r1, [r7, #0] + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* If end of conversion selected to end of sequence */ + if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) + 8000c3e: 687b ldr r3, [r7, #4] + 8000c40: 695b ldr r3, [r3, #20] + 8000c42: 2b08 cmp r3, #8 + 8000c44: d102 bne.n 8000c4c + { + tmp_Flag_EOC = ADC_FLAG_EOS; + 8000c46: 2308 movs r3, #8 + 8000c48: 60fb str r3, [r7, #12] + 8000c4a: e014 b.n 8000c76 + /* each conversion: */ + /* Particular case is ADC configured in DMA mode and ADC sequencer with */ + /* several ranks and polling for end of each conversion. */ + /* For code simplicity sake, this particular case is generalized to */ + /* ADC configured in DMA mode and and polling for end of each conversion. */ + if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN)) + 8000c4c: 687b ldr r3, [r7, #4] + 8000c4e: 681b ldr r3, [r3, #0] + 8000c50: 68db ldr r3, [r3, #12] + 8000c52: 2201 movs r2, #1 + 8000c54: 4013 ands r3, r2 + 8000c56: 2b01 cmp r3, #1 + 8000c58: d10b bne.n 8000c72 + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + 8000c5a: 687b ldr r3, [r7, #4] + 8000c5c: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000c5e: 2220 movs r2, #32 + 8000c60: 431a orrs r2, r3 + 8000c62: 687b ldr r3, [r7, #4] + 8000c64: 639a str r2, [r3, #56] ; 0x38 + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + 8000c66: 687b ldr r3, [r7, #4] + 8000c68: 2234 movs r2, #52 ; 0x34 + 8000c6a: 2100 movs r1, #0 + 8000c6c: 5499 strb r1, [r3, r2] + + return HAL_ERROR; + 8000c6e: 2301 movs r3, #1 + 8000c70: e071 b.n 8000d56 + } + else + { + tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS); + 8000c72: 230c movs r3, #12 + 8000c74: 60fb str r3, [r7, #12] + } + } + + /* Get tick count */ + tickstart = HAL_GetTick(); + 8000c76: f7ff fdff bl 8000878 + 8000c7a: 0003 movs r3, r0 + 8000c7c: 60bb str r3, [r7, #8] + + /* Wait until End of Conversion flag is raised */ + while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC)) + 8000c7e: e01f b.n 8000cc0 + { + /* Check if timeout is disabled (set to infinite wait) */ + if(Timeout != HAL_MAX_DELAY) + 8000c80: 683b ldr r3, [r7, #0] + 8000c82: 3301 adds r3, #1 + 8000c84: d01c beq.n 8000cc0 + { + if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) + 8000c86: 683b ldr r3, [r7, #0] + 8000c88: 2b00 cmp r3, #0 + 8000c8a: d007 beq.n 8000c9c + 8000c8c: f7ff fdf4 bl 8000878 + 8000c90: 0002 movs r2, r0 + 8000c92: 68bb ldr r3, [r7, #8] + 8000c94: 1ad3 subs r3, r2, r3 + 8000c96: 683a ldr r2, [r7, #0] + 8000c98: 429a cmp r2, r3 + 8000c9a: d211 bcs.n 8000cc0 + { + /* New check to avoid false timeout detection in case of preemption */ + if(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC)) + 8000c9c: 687b ldr r3, [r7, #4] + 8000c9e: 681b ldr r3, [r3, #0] + 8000ca0: 681b ldr r3, [r3, #0] + 8000ca2: 68fa ldr r2, [r7, #12] + 8000ca4: 4013 ands r3, r2 + 8000ca6: d10b bne.n 8000cc0 + { + /* Update ADC state machine to timeout */ + SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); + 8000ca8: 687b ldr r3, [r7, #4] + 8000caa: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000cac: 2204 movs r2, #4 + 8000cae: 431a orrs r2, r3 + 8000cb0: 687b ldr r3, [r7, #4] + 8000cb2: 639a str r2, [r3, #56] ; 0x38 + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + 8000cb4: 687b ldr r3, [r7, #4] + 8000cb6: 2234 movs r2, #52 ; 0x34 + 8000cb8: 2100 movs r1, #0 + 8000cba: 5499 strb r1, [r3, r2] + + return HAL_TIMEOUT; + 8000cbc: 2303 movs r3, #3 + 8000cbe: e04a b.n 8000d56 + while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC)) + 8000cc0: 687b ldr r3, [r7, #4] + 8000cc2: 681b ldr r3, [r3, #0] + 8000cc4: 681b ldr r3, [r3, #0] + 8000cc6: 68fa ldr r2, [r7, #12] + 8000cc8: 4013 ands r3, r2 + 8000cca: d0d9 beq.n 8000c80 + } + } + } + + /* Update ADC state machine */ + SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); + 8000ccc: 687b ldr r3, [r7, #4] + 8000cce: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000cd0: 2280 movs r2, #128 ; 0x80 + 8000cd2: 0092 lsls r2, r2, #2 + 8000cd4: 431a orrs r2, r3 + 8000cd6: 687b ldr r3, [r7, #4] + 8000cd8: 639a str r2, [r3, #56] ; 0x38 + + /* Determine whether any further conversion upcoming on group regular */ + /* by external trigger, continuous mode or scan sequence on going. */ + if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && + 8000cda: 687b ldr r3, [r7, #4] + 8000cdc: 681b ldr r3, [r3, #0] + 8000cde: 68da ldr r2, [r3, #12] + 8000ce0: 23c0 movs r3, #192 ; 0xc0 + 8000ce2: 011b lsls r3, r3, #4 + 8000ce4: 4013 ands r3, r2 + 8000ce6: d12d bne.n 8000d44 + (hadc->Init.ContinuousConvMode == DISABLE) ) + 8000ce8: 687b ldr r3, [r7, #4] + 8000cea: 7e9b ldrb r3, [r3, #26] + if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && + 8000cec: 2b00 cmp r3, #0 + 8000cee: d129 bne.n 8000d44 + { + /* If End of Sequence is reached, disable interrupts */ + if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) + 8000cf0: 687b ldr r3, [r7, #4] + 8000cf2: 681b ldr r3, [r3, #0] + 8000cf4: 681b ldr r3, [r3, #0] + 8000cf6: 2208 movs r2, #8 + 8000cf8: 4013 ands r3, r2 + 8000cfa: 2b08 cmp r3, #8 + 8000cfc: d122 bne.n 8000d44 + { + /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ + /* ADSTART==0 (no conversion on going) */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) + 8000cfe: 687b ldr r3, [r7, #4] + 8000d00: 681b ldr r3, [r3, #0] + 8000d02: 689b ldr r3, [r3, #8] + 8000d04: 2204 movs r2, #4 + 8000d06: 4013 ands r3, r2 + 8000d08: d110 bne.n 8000d2c + { + /* Disable ADC end of single conversion interrupt on group regular */ + /* Note: Overrun interrupt was enabled with EOC interrupt in */ + /* HAL_Start_IT(), but is not disabled here because can be used */ + /* by overrun IRQ process below. */ + __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); + 8000d0a: 687b ldr r3, [r7, #4] + 8000d0c: 681b ldr r3, [r3, #0] + 8000d0e: 685a ldr r2, [r3, #4] + 8000d10: 687b ldr r3, [r7, #4] + 8000d12: 681b ldr r3, [r3, #0] + 8000d14: 210c movs r1, #12 + 8000d16: 438a bics r2, r1 + 8000d18: 605a str r2, [r3, #4] + + /* Set ADC state */ + ADC_STATE_CLR_SET(hadc->State, + 8000d1a: 687b ldr r3, [r7, #4] + 8000d1c: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000d1e: 4a10 ldr r2, [pc, #64] ; (8000d60 ) + 8000d20: 4013 ands r3, r2 + 8000d22: 2201 movs r2, #1 + 8000d24: 431a orrs r2, r3 + 8000d26: 687b ldr r3, [r7, #4] + 8000d28: 639a str r2, [r3, #56] ; 0x38 + 8000d2a: e00b b.n 8000d44 + HAL_ADC_STATE_READY); + } + else + { + /* Change ADC state to error state */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + 8000d2c: 687b ldr r3, [r7, #4] + 8000d2e: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000d30: 2220 movs r2, #32 + 8000d32: 431a orrs r2, r3 + 8000d34: 687b ldr r3, [r7, #4] + 8000d36: 639a str r2, [r3, #56] ; 0x38 + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 8000d38: 687b ldr r3, [r7, #4] + 8000d3a: 6bdb ldr r3, [r3, #60] ; 0x3c + 8000d3c: 2201 movs r2, #1 + 8000d3e: 431a orrs r2, r3 + 8000d40: 687b ldr r3, [r7, #4] + 8000d42: 63da str r2, [r3, #60] ; 0x3c + } + + /* Clear end of conversion flag of regular group if low power feature */ + /* "LowPowerAutoWait " is disabled, to not interfere with this feature */ + /* until data register is read using function HAL_ADC_GetValue(). */ + if (hadc->Init.LowPowerAutoWait == DISABLE) + 8000d44: 687b ldr r3, [r7, #4] + 8000d46: 7e1b ldrb r3, [r3, #24] + 8000d48: 2b00 cmp r3, #0 + 8000d4a: d103 bne.n 8000d54 + { + /* Clear regular group conversion flag */ + __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS)); + 8000d4c: 687b ldr r3, [r7, #4] + 8000d4e: 681b ldr r3, [r3, #0] + 8000d50: 220c movs r2, #12 + 8000d52: 601a str r2, [r3, #0] + } + + /* Return ADC state */ + return HAL_OK; + 8000d54: 2300 movs r3, #0 +} + 8000d56: 0018 movs r0, r3 + 8000d58: 46bd mov sp, r7 + 8000d5a: b004 add sp, #16 + 8000d5c: bd80 pop {r7, pc} + 8000d5e: 46c0 nop ; (mov r8, r8) + 8000d60: fffffefe .word 0xfffffefe + +08000d64 : + * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). + * @param hadc ADC handle + * @retval ADC group regular conversion data + */ +uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) +{ + 8000d64: b580 push {r7, lr} + 8000d66: b082 sub sp, #8 + 8000d68: af00 add r7, sp, #0 + 8000d6a: 6078 str r0, [r7, #4] + + /* Note: EOC flag is not cleared here by software because automatically */ + /* cleared by hardware when reading register DR. */ + + /* Return ADC converted value */ + return hadc->Instance->DR; + 8000d6c: 687b ldr r3, [r7, #4] + 8000d6e: 681b ldr r3, [r3, #0] + 8000d70: 6c1b ldr r3, [r3, #64] ; 0x40 +} + 8000d72: 0018 movs r0, r3 + 8000d74: 46bd mov sp, r7 + 8000d76: b002 add sp, #8 + 8000d78: bd80 pop {r7, pc} + ... + +08000d7c : + * @param hadc ADC handle + * @param sConfig Structure of ADC channel for regular group. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) +{ + 8000d7c: b580 push {r7, lr} + 8000d7e: b084 sub sp, #16 + 8000d80: af00 add r7, sp, #0 + 8000d82: 6078 str r0, [r7, #4] + 8000d84: 6039 str r1, [r7, #0] + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 8000d86: 230f movs r3, #15 + 8000d88: 18fb adds r3, r7, r3 + 8000d8a: 2200 movs r2, #0 + 8000d8c: 701a strb r2, [r3, #0] + __IO uint32_t wait_loop_index = 0U; + 8000d8e: 2300 movs r3, #0 + 8000d90: 60bb str r3, [r7, #8] + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + assert_param(IS_ADC_CHANNEL(sConfig->Channel)); + assert_param(IS_ADC_RANK(sConfig->Rank)); + + if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) + 8000d92: 687b ldr r3, [r7, #4] + 8000d94: 6ada ldr r2, [r3, #44] ; 0x2c + 8000d96: 2380 movs r3, #128 ; 0x80 + 8000d98: 055b lsls r3, r3, #21 + 8000d9a: 429a cmp r2, r3 + 8000d9c: d011 beq.n 8000dc2 + 8000d9e: 687b ldr r3, [r7, #4] + 8000da0: 6adb ldr r3, [r3, #44] ; 0x2c + 8000da2: 2b01 cmp r3, #1 + 8000da4: d00d beq.n 8000dc2 + 8000da6: 687b ldr r3, [r7, #4] + 8000da8: 6adb ldr r3, [r3, #44] ; 0x2c + 8000daa: 2b02 cmp r3, #2 + 8000dac: d009 beq.n 8000dc2 + 8000dae: 687b ldr r3, [r7, #4] + 8000db0: 6adb ldr r3, [r3, #44] ; 0x2c + 8000db2: 2b03 cmp r3, #3 + 8000db4: d005 beq.n 8000dc2 + 8000db6: 687b ldr r3, [r7, #4] + 8000db8: 6adb ldr r3, [r3, #44] ; 0x2c + 8000dba: 2b04 cmp r3, #4 + 8000dbc: d001 beq.n 8000dc2 + 8000dbe: 687b ldr r3, [r7, #4] + 8000dc0: 6adb ldr r3, [r3, #44] ; 0x2c + { + assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); + } + + /* Process locked */ + __HAL_LOCK(hadc); + 8000dc2: 687b ldr r3, [r7, #4] + 8000dc4: 2234 movs r2, #52 ; 0x34 + 8000dc6: 5c9b ldrb r3, [r3, r2] + 8000dc8: 2b01 cmp r3, #1 + 8000dca: d101 bne.n 8000dd0 + 8000dcc: 2302 movs r3, #2 + 8000dce: e0bb b.n 8000f48 + 8000dd0: 687b ldr r3, [r7, #4] + 8000dd2: 2234 movs r2, #52 ; 0x34 + 8000dd4: 2101 movs r1, #1 + 8000dd6: 5499 strb r1, [r3, r2] + /* Parameters that can be updated when ADC is disabled or enabled without */ + /* conversion on going on regular group: */ + /* - Channel number */ + /* - Channel sampling time */ + /* - Management of internal measurement channels: VrefInt/TempSensor/Vbat */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) + 8000dd8: 687b ldr r3, [r7, #4] + 8000dda: 681b ldr r3, [r3, #0] + 8000ddc: 689b ldr r3, [r3, #8] + 8000dde: 2204 movs r2, #4 + 8000de0: 4013 ands r3, r2 + 8000de2: d000 beq.n 8000de6 + 8000de4: e09f b.n 8000f26 + { + /* Configure channel: depending on rank setting, add it or remove it from */ + /* ADC conversion sequencer. */ + if (sConfig->Rank != ADC_RANK_NONE) + 8000de6: 683b ldr r3, [r7, #0] + 8000de8: 685b ldr r3, [r3, #4] + 8000dea: 4a59 ldr r2, [pc, #356] ; (8000f50 ) + 8000dec: 4293 cmp r3, r2 + 8000dee: d100 bne.n 8000df2 + 8000df0: e077 b.n 8000ee2 + { + /* Regular sequence configuration */ + /* Set the channel selection register from the selected channel */ + hadc->Instance->CHSELR |= ADC_CHSELR_CHANNEL(sConfig->Channel); + 8000df2: 687b ldr r3, [r7, #4] + 8000df4: 681b ldr r3, [r3, #0] + 8000df6: 6a99 ldr r1, [r3, #40] ; 0x28 + 8000df8: 683b ldr r3, [r7, #0] + 8000dfa: 681b ldr r3, [r3, #0] + 8000dfc: 2201 movs r2, #1 + 8000dfe: 409a lsls r2, r3 + 8000e00: 687b ldr r3, [r7, #4] + 8000e02: 681b ldr r3, [r3, #0] + 8000e04: 430a orrs r2, r1 + 8000e06: 629a str r2, [r3, #40] ; 0x28 + /* Channel sampling time configuration */ + /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */ + /* (obsolete): sampling time set in this function with */ + /* parameter "SamplingTime" (obsolete) only if not already set into */ + /* ADC initialization structure with parameter "SamplingTimeCommon". */ + if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) + 8000e08: 687b ldr r3, [r7, #4] + 8000e0a: 6ada ldr r2, [r3, #44] ; 0x2c + 8000e0c: 2380 movs r3, #128 ; 0x80 + 8000e0e: 055b lsls r3, r3, #21 + 8000e10: 429a cmp r2, r3 + 8000e12: d037 beq.n 8000e84 + 8000e14: 687b ldr r3, [r7, #4] + 8000e16: 6adb ldr r3, [r3, #44] ; 0x2c + 8000e18: 2b01 cmp r3, #1 + 8000e1a: d033 beq.n 8000e84 + 8000e1c: 687b ldr r3, [r7, #4] + 8000e1e: 6adb ldr r3, [r3, #44] ; 0x2c + 8000e20: 2b02 cmp r3, #2 + 8000e22: d02f beq.n 8000e84 + 8000e24: 687b ldr r3, [r7, #4] + 8000e26: 6adb ldr r3, [r3, #44] ; 0x2c + 8000e28: 2b03 cmp r3, #3 + 8000e2a: d02b beq.n 8000e84 + 8000e2c: 687b ldr r3, [r7, #4] + 8000e2e: 6adb ldr r3, [r3, #44] ; 0x2c + 8000e30: 2b04 cmp r3, #4 + 8000e32: d027 beq.n 8000e84 + 8000e34: 687b ldr r3, [r7, #4] + 8000e36: 6adb ldr r3, [r3, #44] ; 0x2c + 8000e38: 2b05 cmp r3, #5 + 8000e3a: d023 beq.n 8000e84 + 8000e3c: 687b ldr r3, [r7, #4] + 8000e3e: 6adb ldr r3, [r3, #44] ; 0x2c + 8000e40: 2b06 cmp r3, #6 + 8000e42: d01f beq.n 8000e84 + 8000e44: 687b ldr r3, [r7, #4] + 8000e46: 6adb ldr r3, [r3, #44] ; 0x2c + 8000e48: 2b07 cmp r3, #7 + 8000e4a: d01b beq.n 8000e84 + { + /* Modify sampling time if needed (not needed in case of reoccurrence */ + /* for several channels programmed consecutively into the sequencer) */ + if (sConfig->SamplingTime != ADC_GET_SAMPLINGTIME(hadc)) + 8000e4c: 683b ldr r3, [r7, #0] + 8000e4e: 689a ldr r2, [r3, #8] + 8000e50: 687b ldr r3, [r7, #4] + 8000e52: 681b ldr r3, [r3, #0] + 8000e54: 695b ldr r3, [r3, #20] + 8000e56: 2107 movs r1, #7 + 8000e58: 400b ands r3, r1 + 8000e5a: 429a cmp r2, r3 + 8000e5c: d012 beq.n 8000e84 + { + /* Channel sampling time configuration */ + /* Clear the old sample time */ + hadc->Instance->SMPR &= ~(ADC_SMPR_SMP); + 8000e5e: 687b ldr r3, [r7, #4] + 8000e60: 681b ldr r3, [r3, #0] + 8000e62: 695a ldr r2, [r3, #20] + 8000e64: 687b ldr r3, [r7, #4] + 8000e66: 681b ldr r3, [r3, #0] + 8000e68: 2107 movs r1, #7 + 8000e6a: 438a bics r2, r1 + 8000e6c: 615a str r2, [r3, #20] + + /* Set the new sample time */ + hadc->Instance->SMPR |= ADC_SMPR_SET(sConfig->SamplingTime); + 8000e6e: 687b ldr r3, [r7, #4] + 8000e70: 681b ldr r3, [r3, #0] + 8000e72: 6959 ldr r1, [r3, #20] + 8000e74: 683b ldr r3, [r7, #0] + 8000e76: 689b ldr r3, [r3, #8] + 8000e78: 2207 movs r2, #7 + 8000e7a: 401a ands r2, r3 + 8000e7c: 687b ldr r3, [r7, #4] + 8000e7e: 681b ldr r3, [r3, #0] + 8000e80: 430a orrs r2, r1 + 8000e82: 615a str r2, [r3, #20] + /* internal measurement paths enable: If internal channel selected, */ + /* enable dedicated internal buffers and path. */ + /* Note: these internal measurement paths can be disabled using */ + /* HAL_ADC_DeInit() or removing the channel from sequencer with */ + /* channel configuration parameter "Rank". */ + if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) + 8000e84: 683b ldr r3, [r7, #0] + 8000e86: 681b ldr r3, [r3, #0] + 8000e88: 2b10 cmp r3, #16 + 8000e8a: d003 beq.n 8000e94 + 8000e8c: 683b ldr r3, [r7, #0] + 8000e8e: 681b ldr r3, [r3, #0] + 8000e90: 2b11 cmp r3, #17 + 8000e92: d152 bne.n 8000f3a + { + /* If Channel_16 is selected, enable Temp. sensor measurement path. */ + /* If Channel_17 is selected, enable VREFINT measurement path. */ + /* If Channel_18 is selected, enable VBAT measurement path. */ + ADC->CCR |= ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel); + 8000e94: 4b2f ldr r3, [pc, #188] ; (8000f54 ) + 8000e96: 6819 ldr r1, [r3, #0] + 8000e98: 683b ldr r3, [r7, #0] + 8000e9a: 681b ldr r3, [r3, #0] + 8000e9c: 2b10 cmp r3, #16 + 8000e9e: d102 bne.n 8000ea6 + 8000ea0: 2380 movs r3, #128 ; 0x80 + 8000ea2: 041b lsls r3, r3, #16 + 8000ea4: e001 b.n 8000eaa + 8000ea6: 2380 movs r3, #128 ; 0x80 + 8000ea8: 03db lsls r3, r3, #15 + 8000eaa: 4a2a ldr r2, [pc, #168] ; (8000f54 ) + 8000eac: 430b orrs r3, r1 + 8000eae: 6013 str r3, [r2, #0] + + /* If Temp. sensor is selected, wait for stabilization delay */ + if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) + 8000eb0: 683b ldr r3, [r7, #0] + 8000eb2: 681b ldr r3, [r3, #0] + 8000eb4: 2b10 cmp r3, #16 + 8000eb6: d140 bne.n 8000f3a + { + /* Delay for temperature sensor stabilization time */ + /* Compute number of CPU cycles to wait for */ + wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); + 8000eb8: 4b27 ldr r3, [pc, #156] ; (8000f58 ) + 8000eba: 681b ldr r3, [r3, #0] + 8000ebc: 4927 ldr r1, [pc, #156] ; (8000f5c ) + 8000ebe: 0018 movs r0, r3 + 8000ec0: f7ff f922 bl 8000108 <__udivsi3> + 8000ec4: 0003 movs r3, r0 + 8000ec6: 001a movs r2, r3 + 8000ec8: 0013 movs r3, r2 + 8000eca: 009b lsls r3, r3, #2 + 8000ecc: 189b adds r3, r3, r2 + 8000ece: 005b lsls r3, r3, #1 + 8000ed0: 60bb str r3, [r7, #8] + while(wait_loop_index != 0U) + 8000ed2: e002 b.n 8000eda + { + wait_loop_index--; + 8000ed4: 68bb ldr r3, [r7, #8] + 8000ed6: 3b01 subs r3, #1 + 8000ed8: 60bb str r3, [r7, #8] + while(wait_loop_index != 0U) + 8000eda: 68bb ldr r3, [r7, #8] + 8000edc: 2b00 cmp r3, #0 + 8000ede: d1f9 bne.n 8000ed4 + 8000ee0: e02b b.n 8000f3a + } + else + { + /* Regular sequence configuration */ + /* Reset the channel selection register from the selected channel */ + hadc->Instance->CHSELR &= ~ADC_CHSELR_CHANNEL(sConfig->Channel); + 8000ee2: 687b ldr r3, [r7, #4] + 8000ee4: 681b ldr r3, [r3, #0] + 8000ee6: 6a9a ldr r2, [r3, #40] ; 0x28 + 8000ee8: 683b ldr r3, [r7, #0] + 8000eea: 681b ldr r3, [r3, #0] + 8000eec: 2101 movs r1, #1 + 8000eee: 4099 lsls r1, r3 + 8000ef0: 000b movs r3, r1 + 8000ef2: 43d9 mvns r1, r3 + 8000ef4: 687b ldr r3, [r7, #4] + 8000ef6: 681b ldr r3, [r3, #0] + 8000ef8: 400a ands r2, r1 + 8000efa: 629a str r2, [r3, #40] ; 0x28 + + /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */ + /* internal measurement paths disable: If internal channel selected, */ + /* disable dedicated internal buffers and path. */ + if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) + 8000efc: 683b ldr r3, [r7, #0] + 8000efe: 681b ldr r3, [r3, #0] + 8000f00: 2b10 cmp r3, #16 + 8000f02: d003 beq.n 8000f0c + 8000f04: 683b ldr r3, [r7, #0] + 8000f06: 681b ldr r3, [r3, #0] + 8000f08: 2b11 cmp r3, #17 + 8000f0a: d116 bne.n 8000f3a + { + /* If Channel_16 is selected, disable Temp. sensor measurement path. */ + /* If Channel_17 is selected, disable VREFINT measurement path. */ + /* If Channel_18 is selected, disable VBAT measurement path. */ + ADC->CCR &= ~ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel); + 8000f0c: 4b11 ldr r3, [pc, #68] ; (8000f54 ) + 8000f0e: 6819 ldr r1, [r3, #0] + 8000f10: 683b ldr r3, [r7, #0] + 8000f12: 681b ldr r3, [r3, #0] + 8000f14: 2b10 cmp r3, #16 + 8000f16: d101 bne.n 8000f1c + 8000f18: 4a11 ldr r2, [pc, #68] ; (8000f60 ) + 8000f1a: e000 b.n 8000f1e + 8000f1c: 4a11 ldr r2, [pc, #68] ; (8000f64 ) + 8000f1e: 4b0d ldr r3, [pc, #52] ; (8000f54 ) + 8000f20: 400a ands r2, r1 + 8000f22: 601a str r2, [r3, #0] + 8000f24: e009 b.n 8000f3a + /* channel could be done on neither of the channel configuration structure */ + /* parameters. */ + else + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + 8000f26: 687b ldr r3, [r7, #4] + 8000f28: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000f2a: 2220 movs r2, #32 + 8000f2c: 431a orrs r2, r3 + 8000f2e: 687b ldr r3, [r7, #4] + 8000f30: 639a str r2, [r3, #56] ; 0x38 + + tmp_hal_status = HAL_ERROR; + 8000f32: 230f movs r3, #15 + 8000f34: 18fb adds r3, r7, r3 + 8000f36: 2201 movs r2, #1 + 8000f38: 701a strb r2, [r3, #0] + } + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + 8000f3a: 687b ldr r3, [r7, #4] + 8000f3c: 2234 movs r2, #52 ; 0x34 + 8000f3e: 2100 movs r1, #0 + 8000f40: 5499 strb r1, [r3, r2] + + /* Return function status */ + return tmp_hal_status; + 8000f42: 230f movs r3, #15 + 8000f44: 18fb adds r3, r7, r3 + 8000f46: 781b ldrb r3, [r3, #0] +} + 8000f48: 0018 movs r0, r3 + 8000f4a: 46bd mov sp, r7 + 8000f4c: b004 add sp, #16 + 8000f4e: bd80 pop {r7, pc} + 8000f50: 00001001 .word 0x00001001 + 8000f54: 40012708 .word 0x40012708 + 8000f58: 20000000 .word 0x20000000 + 8000f5c: 000f4240 .word 0x000f4240 + 8000f60: ff7fffff .word 0xff7fffff + 8000f64: ffbfffff .word 0xffbfffff + +08000f68 : + * "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)". + * @param hadc ADC handle + * @retval HAL status. + */ +static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) +{ + 8000f68: b580 push {r7, lr} + 8000f6a: b084 sub sp, #16 + 8000f6c: af00 add r7, sp, #0 + 8000f6e: 6078 str r0, [r7, #4] + uint32_t tickstart = 0U; + 8000f70: 2300 movs r3, #0 + 8000f72: 60fb str r3, [r7, #12] + __IO uint32_t wait_loop_index = 0U; + 8000f74: 2300 movs r3, #0 + 8000f76: 60bb str r3, [r7, #8] + + /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ + /* enabling phase not yet completed: flag ADC ready not yet set). */ + /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ + /* causes: ADC clock not running, ...). */ + if (ADC_IS_ENABLE(hadc) == RESET) + 8000f78: 687b ldr r3, [r7, #4] + 8000f7a: 681b ldr r3, [r3, #0] + 8000f7c: 689b ldr r3, [r3, #8] + 8000f7e: 2203 movs r2, #3 + 8000f80: 4013 ands r3, r2 + 8000f82: 2b01 cmp r3, #1 + 8000f84: d112 bne.n 8000fac + 8000f86: 687b ldr r3, [r7, #4] + 8000f88: 681b ldr r3, [r3, #0] + 8000f8a: 681b ldr r3, [r3, #0] + 8000f8c: 2201 movs r2, #1 + 8000f8e: 4013 ands r3, r2 + 8000f90: 2b01 cmp r3, #1 + 8000f92: d009 beq.n 8000fa8 + 8000f94: 687b ldr r3, [r7, #4] + 8000f96: 681b ldr r3, [r3, #0] + 8000f98: 68da ldr r2, [r3, #12] + 8000f9a: 2380 movs r3, #128 ; 0x80 + 8000f9c: 021b lsls r3, r3, #8 + 8000f9e: 401a ands r2, r3 + 8000fa0: 2380 movs r3, #128 ; 0x80 + 8000fa2: 021b lsls r3, r3, #8 + 8000fa4: 429a cmp r2, r3 + 8000fa6: d101 bne.n 8000fac + 8000fa8: 2301 movs r3, #1 + 8000faa: e000 b.n 8000fae + 8000fac: 2300 movs r3, #0 + 8000fae: 2b00 cmp r3, #0 + 8000fb0: d152 bne.n 8001058 + { + /* Check if conditions to enable the ADC are fulfilled */ + if (ADC_ENABLING_CONDITIONS(hadc) == RESET) + 8000fb2: 687b ldr r3, [r7, #4] + 8000fb4: 681b ldr r3, [r3, #0] + 8000fb6: 689b ldr r3, [r3, #8] + 8000fb8: 4a2a ldr r2, [pc, #168] ; (8001064 ) + 8000fba: 4013 ands r3, r2 + 8000fbc: d00d beq.n 8000fda + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 8000fbe: 687b ldr r3, [r7, #4] + 8000fc0: 6b9b ldr r3, [r3, #56] ; 0x38 + 8000fc2: 2210 movs r2, #16 + 8000fc4: 431a orrs r2, r3 + 8000fc6: 687b ldr r3, [r7, #4] + 8000fc8: 639a str r2, [r3, #56] ; 0x38 + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 8000fca: 687b ldr r3, [r7, #4] + 8000fcc: 6bdb ldr r3, [r3, #60] ; 0x3c + 8000fce: 2201 movs r2, #1 + 8000fd0: 431a orrs r2, r3 + 8000fd2: 687b ldr r3, [r7, #4] + 8000fd4: 63da str r2, [r3, #60] ; 0x3c + + return HAL_ERROR; + 8000fd6: 2301 movs r3, #1 + 8000fd8: e03f b.n 800105a + } + + /* Enable the ADC peripheral */ + __HAL_ADC_ENABLE(hadc); + 8000fda: 687b ldr r3, [r7, #4] + 8000fdc: 681b ldr r3, [r3, #0] + 8000fde: 689a ldr r2, [r3, #8] + 8000fe0: 687b ldr r3, [r7, #4] + 8000fe2: 681b ldr r3, [r3, #0] + 8000fe4: 2101 movs r1, #1 + 8000fe6: 430a orrs r2, r1 + 8000fe8: 609a str r2, [r3, #8] + + /* Delay for ADC stabilization time */ + /* Compute number of CPU cycles to wait for */ + wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); + 8000fea: 4b1f ldr r3, [pc, #124] ; (8001068 ) + 8000fec: 681b ldr r3, [r3, #0] + 8000fee: 491f ldr r1, [pc, #124] ; (800106c ) + 8000ff0: 0018 movs r0, r3 + 8000ff2: f7ff f889 bl 8000108 <__udivsi3> + 8000ff6: 0003 movs r3, r0 + 8000ff8: 60bb str r3, [r7, #8] + while(wait_loop_index != 0U) + 8000ffa: e002 b.n 8001002 + { + wait_loop_index--; + 8000ffc: 68bb ldr r3, [r7, #8] + 8000ffe: 3b01 subs r3, #1 + 8001000: 60bb str r3, [r7, #8] + while(wait_loop_index != 0U) + 8001002: 68bb ldr r3, [r7, #8] + 8001004: 2b00 cmp r3, #0 + 8001006: d1f9 bne.n 8000ffc + } + + /* Get tick count */ + tickstart = HAL_GetTick(); + 8001008: f7ff fc36 bl 8000878 + 800100c: 0003 movs r3, r0 + 800100e: 60fb str r3, [r7, #12] + + /* Wait for ADC effectively enabled */ + while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) + 8001010: e01b b.n 800104a + { + if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) + 8001012: f7ff fc31 bl 8000878 + 8001016: 0002 movs r2, r0 + 8001018: 68fb ldr r3, [r7, #12] + 800101a: 1ad3 subs r3, r2, r3 + 800101c: 2b02 cmp r3, #2 + 800101e: d914 bls.n 800104a + { + /* New check to avoid false timeout detection in case of preemption */ + if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) + 8001020: 687b ldr r3, [r7, #4] + 8001022: 681b ldr r3, [r3, #0] + 8001024: 681b ldr r3, [r3, #0] + 8001026: 2201 movs r2, #1 + 8001028: 4013 ands r3, r2 + 800102a: 2b01 cmp r3, #1 + 800102c: d00d beq.n 800104a + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 800102e: 687b ldr r3, [r7, #4] + 8001030: 6b9b ldr r3, [r3, #56] ; 0x38 + 8001032: 2210 movs r2, #16 + 8001034: 431a orrs r2, r3 + 8001036: 687b ldr r3, [r7, #4] + 8001038: 639a str r2, [r3, #56] ; 0x38 + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 800103a: 687b ldr r3, [r7, #4] + 800103c: 6bdb ldr r3, [r3, #60] ; 0x3c + 800103e: 2201 movs r2, #1 + 8001040: 431a orrs r2, r3 + 8001042: 687b ldr r3, [r7, #4] + 8001044: 63da str r2, [r3, #60] ; 0x3c + + return HAL_ERROR; + 8001046: 2301 movs r3, #1 + 8001048: e007 b.n 800105a + while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) + 800104a: 687b ldr r3, [r7, #4] + 800104c: 681b ldr r3, [r3, #0] + 800104e: 681b ldr r3, [r3, #0] + 8001050: 2201 movs r2, #1 + 8001052: 4013 ands r3, r2 + 8001054: 2b01 cmp r3, #1 + 8001056: d1dc bne.n 8001012 + } + } + } + + /* Return HAL status */ + return HAL_OK; + 8001058: 2300 movs r3, #0 +} + 800105a: 0018 movs r0, r3 + 800105c: 46bd mov sp, r7 + 800105e: b004 add sp, #16 + 8001060: bd80 pop {r7, pc} + 8001062: 46c0 nop ; (mov r8, r8) + 8001064: 80000017 .word 0x80000017 + 8001068: 20000000 .word 0x20000000 + 800106c: 000f4240 .word 0x000f4240 + +08001070 : + * stopped. + * @param hadc ADC handle + * @retval HAL status. + */ +static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc) +{ + 8001070: b580 push {r7, lr} + 8001072: b084 sub sp, #16 + 8001074: af00 add r7, sp, #0 + 8001076: 6078 str r0, [r7, #4] + uint32_t tickstart = 0U; + 8001078: 2300 movs r3, #0 + 800107a: 60fb str r3, [r7, #12] + + /* Verification if ADC is not already disabled: */ + /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ + /* disabled. */ + if (ADC_IS_ENABLE(hadc) != RESET) + 800107c: 687b ldr r3, [r7, #4] + 800107e: 681b ldr r3, [r3, #0] + 8001080: 689b ldr r3, [r3, #8] + 8001082: 2203 movs r2, #3 + 8001084: 4013 ands r3, r2 + 8001086: 2b01 cmp r3, #1 + 8001088: d112 bne.n 80010b0 + 800108a: 687b ldr r3, [r7, #4] + 800108c: 681b ldr r3, [r3, #0] + 800108e: 681b ldr r3, [r3, #0] + 8001090: 2201 movs r2, #1 + 8001092: 4013 ands r3, r2 + 8001094: 2b01 cmp r3, #1 + 8001096: d009 beq.n 80010ac + 8001098: 687b ldr r3, [r7, #4] + 800109a: 681b ldr r3, [r3, #0] + 800109c: 68da ldr r2, [r3, #12] + 800109e: 2380 movs r3, #128 ; 0x80 + 80010a0: 021b lsls r3, r3, #8 + 80010a2: 401a ands r2, r3 + 80010a4: 2380 movs r3, #128 ; 0x80 + 80010a6: 021b lsls r3, r3, #8 + 80010a8: 429a cmp r2, r3 + 80010aa: d101 bne.n 80010b0 + 80010ac: 2301 movs r3, #1 + 80010ae: e000 b.n 80010b2 + 80010b0: 2300 movs r3, #0 + 80010b2: 2b00 cmp r3, #0 + 80010b4: d048 beq.n 8001148 + { + /* Check if conditions to disable the ADC are fulfilled */ + if (ADC_DISABLING_CONDITIONS(hadc) != RESET) + 80010b6: 687b ldr r3, [r7, #4] + 80010b8: 681b ldr r3, [r3, #0] + 80010ba: 689b ldr r3, [r3, #8] + 80010bc: 2205 movs r2, #5 + 80010be: 4013 ands r3, r2 + 80010c0: 2b01 cmp r3, #1 + 80010c2: d110 bne.n 80010e6 + { + /* Disable the ADC peripheral */ + __HAL_ADC_DISABLE(hadc); + 80010c4: 687b ldr r3, [r7, #4] + 80010c6: 681b ldr r3, [r3, #0] + 80010c8: 689a ldr r2, [r3, #8] + 80010ca: 687b ldr r3, [r7, #4] + 80010cc: 681b ldr r3, [r3, #0] + 80010ce: 2102 movs r1, #2 + 80010d0: 430a orrs r2, r1 + 80010d2: 609a str r2, [r3, #8] + 80010d4: 687b ldr r3, [r7, #4] + 80010d6: 681b ldr r3, [r3, #0] + 80010d8: 2203 movs r2, #3 + 80010da: 601a str r2, [r3, #0] + return HAL_ERROR; + } + + /* Wait for ADC effectively disabled */ + /* Get tick count */ + tickstart = HAL_GetTick(); + 80010dc: f7ff fbcc bl 8000878 + 80010e0: 0003 movs r3, r0 + 80010e2: 60fb str r3, [r7, #12] + + while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) + 80010e4: e029 b.n 800113a + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 80010e6: 687b ldr r3, [r7, #4] + 80010e8: 6b9b ldr r3, [r3, #56] ; 0x38 + 80010ea: 2210 movs r2, #16 + 80010ec: 431a orrs r2, r3 + 80010ee: 687b ldr r3, [r7, #4] + 80010f0: 639a str r2, [r3, #56] ; 0x38 + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 80010f2: 687b ldr r3, [r7, #4] + 80010f4: 6bdb ldr r3, [r3, #60] ; 0x3c + 80010f6: 2201 movs r2, #1 + 80010f8: 431a orrs r2, r3 + 80010fa: 687b ldr r3, [r7, #4] + 80010fc: 63da str r2, [r3, #60] ; 0x3c + return HAL_ERROR; + 80010fe: 2301 movs r3, #1 + 8001100: e023 b.n 800114a + { + if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) + 8001102: f7ff fbb9 bl 8000878 + 8001106: 0002 movs r2, r0 + 8001108: 68fb ldr r3, [r7, #12] + 800110a: 1ad3 subs r3, r2, r3 + 800110c: 2b02 cmp r3, #2 + 800110e: d914 bls.n 800113a + { + /* New check to avoid false timeout detection in case of preemption */ + if(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) + 8001110: 687b ldr r3, [r7, #4] + 8001112: 681b ldr r3, [r3, #0] + 8001114: 689b ldr r3, [r3, #8] + 8001116: 2201 movs r2, #1 + 8001118: 4013 ands r3, r2 + 800111a: 2b01 cmp r3, #1 + 800111c: d10d bne.n 800113a + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 800111e: 687b ldr r3, [r7, #4] + 8001120: 6b9b ldr r3, [r3, #56] ; 0x38 + 8001122: 2210 movs r2, #16 + 8001124: 431a orrs r2, r3 + 8001126: 687b ldr r3, [r7, #4] + 8001128: 639a str r2, [r3, #56] ; 0x38 + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 800112a: 687b ldr r3, [r7, #4] + 800112c: 6bdb ldr r3, [r3, #60] ; 0x3c + 800112e: 2201 movs r2, #1 + 8001130: 431a orrs r2, r3 + 8001132: 687b ldr r3, [r7, #4] + 8001134: 63da str r2, [r3, #60] ; 0x3c + + return HAL_ERROR; + 8001136: 2301 movs r3, #1 + 8001138: e007 b.n 800114a + while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) + 800113a: 687b ldr r3, [r7, #4] + 800113c: 681b ldr r3, [r3, #0] + 800113e: 689b ldr r3, [r3, #8] + 8001140: 2201 movs r2, #1 + 8001142: 4013 ands r3, r2 + 8001144: 2b01 cmp r3, #1 + 8001146: d0dc beq.n 8001102 + } + } + } + + /* Return HAL status */ + return HAL_OK; + 8001148: 2300 movs r3, #0 +} + 800114a: 0018 movs r0, r3 + 800114c: 46bd mov sp, r7 + 800114e: b004 add sp, #16 + 8001150: bd80 pop {r7, pc} + +08001152 : + * stopped to disable the ADC. + * @param hadc ADC handle + * @retval HAL status. + */ +static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc) +{ + 8001152: b580 push {r7, lr} + 8001154: b084 sub sp, #16 + 8001156: af00 add r7, sp, #0 + 8001158: 6078 str r0, [r7, #4] + uint32_t tickstart = 0U; + 800115a: 2300 movs r3, #0 + 800115c: 60fb str r3, [r7, #12] + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Verification if ADC is not already stopped on regular group to bypass */ + /* this function if not needed. */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) + 800115e: 687b ldr r3, [r7, #4] + 8001160: 681b ldr r3, [r3, #0] + 8001162: 689b ldr r3, [r3, #8] + 8001164: 2204 movs r2, #4 + 8001166: 4013 ands r3, r2 + 8001168: d03a beq.n 80011e0 + { + + /* Stop potential conversion on going on regular group */ + /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ + if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && + 800116a: 687b ldr r3, [r7, #4] + 800116c: 681b ldr r3, [r3, #0] + 800116e: 689b ldr r3, [r3, #8] + 8001170: 2204 movs r2, #4 + 8001172: 4013 ands r3, r2 + 8001174: 2b04 cmp r3, #4 + 8001176: d10d bne.n 8001194 + HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) + 8001178: 687b ldr r3, [r7, #4] + 800117a: 681b ldr r3, [r3, #0] + 800117c: 689b ldr r3, [r3, #8] + 800117e: 2202 movs r2, #2 + 8001180: 4013 ands r3, r2 + if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && + 8001182: d107 bne.n 8001194 + { + /* Stop conversions on regular group */ + hadc->Instance->CR |= ADC_CR_ADSTP; + 8001184: 687b ldr r3, [r7, #4] + 8001186: 681b ldr r3, [r3, #0] + 8001188: 689a ldr r2, [r3, #8] + 800118a: 687b ldr r3, [r7, #4] + 800118c: 681b ldr r3, [r3, #0] + 800118e: 2110 movs r1, #16 + 8001190: 430a orrs r2, r1 + 8001192: 609a str r2, [r3, #8] + } + + /* Wait for conversion effectively stopped */ + /* Get tick count */ + tickstart = HAL_GetTick(); + 8001194: f7ff fb70 bl 8000878 + 8001198: 0003 movs r3, r0 + 800119a: 60fb str r3, [r7, #12] + + while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) + 800119c: e01a b.n 80011d4 + { + if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) + 800119e: f7ff fb6b bl 8000878 + 80011a2: 0002 movs r2, r0 + 80011a4: 68fb ldr r3, [r7, #12] + 80011a6: 1ad3 subs r3, r2, r3 + 80011a8: 2b02 cmp r3, #2 + 80011aa: d913 bls.n 80011d4 + { + /* New check to avoid false timeout detection in case of preemption */ + if((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) + 80011ac: 687b ldr r3, [r7, #4] + 80011ae: 681b ldr r3, [r3, #0] + 80011b0: 689b ldr r3, [r3, #8] + 80011b2: 2204 movs r2, #4 + 80011b4: 4013 ands r3, r2 + 80011b6: d00d beq.n 80011d4 + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 80011b8: 687b ldr r3, [r7, #4] + 80011ba: 6b9b ldr r3, [r3, #56] ; 0x38 + 80011bc: 2210 movs r2, #16 + 80011be: 431a orrs r2, r3 + 80011c0: 687b ldr r3, [r7, #4] + 80011c2: 639a str r2, [r3, #56] ; 0x38 + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 80011c4: 687b ldr r3, [r7, #4] + 80011c6: 6bdb ldr r3, [r3, #60] ; 0x3c + 80011c8: 2201 movs r2, #1 + 80011ca: 431a orrs r2, r3 + 80011cc: 687b ldr r3, [r7, #4] + 80011ce: 63da str r2, [r3, #60] ; 0x3c + + return HAL_ERROR; + 80011d0: 2301 movs r3, #1 + 80011d2: e006 b.n 80011e2 + while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) + 80011d4: 687b ldr r3, [r7, #4] + 80011d6: 681b ldr r3, [r3, #0] + 80011d8: 689b ldr r3, [r3, #8] + 80011da: 2204 movs r2, #4 + 80011dc: 4013 ands r3, r2 + 80011de: d1de bne.n 800119e + } + } + } + + /* Return HAL status */ + return HAL_OK; + 80011e0: 2300 movs r3, #0 +} + 80011e2: 0018 movs r0, r3 + 80011e4: 46bd mov sp, r7 + 80011e6: b004 add sp, #16 + 80011e8: bd80 pop {r7, pc} + ... + +080011ec <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8000740: b590 push {r4, r7, lr} - 8000742: b083 sub sp, #12 - 8000744: af00 add r7, sp, #0 - 8000746: 0002 movs r2, r0 - 8000748: 6039 str r1, [r7, #0] - 800074a: 1dfb adds r3, r7, #7 - 800074c: 701a strb r2, [r3, #0] + 80011ec: b590 push {r4, r7, lr} + 80011ee: b083 sub sp, #12 + 80011f0: af00 add r7, sp, #0 + 80011f2: 0002 movs r2, r0 + 80011f4: 6039 str r1, [r7, #0] + 80011f6: 1dfb adds r3, r7, #7 + 80011f8: 701a strb r2, [r3, #0] if ((int32_t)(IRQn) >= 0) - 800074e: 1dfb adds r3, r7, #7 - 8000750: 781b ldrb r3, [r3, #0] - 8000752: 2b7f cmp r3, #127 ; 0x7f - 8000754: d828 bhi.n 80007a8 <__NVIC_SetPriority+0x68> + 80011fa: 1dfb adds r3, r7, #7 + 80011fc: 781b ldrb r3, [r3, #0] + 80011fe: 2b7f cmp r3, #127 ; 0x7f + 8001200: d828 bhi.n 8001254 <__NVIC_SetPriority+0x68> { NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8000756: 4a2f ldr r2, [pc, #188] ; (8000814 <__NVIC_SetPriority+0xd4>) - 8000758: 1dfb adds r3, r7, #7 - 800075a: 781b ldrb r3, [r3, #0] - 800075c: b25b sxtb r3, r3 - 800075e: 089b lsrs r3, r3, #2 - 8000760: 33c0 adds r3, #192 ; 0xc0 - 8000762: 009b lsls r3, r3, #2 - 8000764: 589b ldr r3, [r3, r2] - 8000766: 1dfa adds r2, r7, #7 - 8000768: 7812 ldrb r2, [r2, #0] - 800076a: 0011 movs r1, r2 - 800076c: 2203 movs r2, #3 - 800076e: 400a ands r2, r1 - 8000770: 00d2 lsls r2, r2, #3 - 8000772: 21ff movs r1, #255 ; 0xff - 8000774: 4091 lsls r1, r2 - 8000776: 000a movs r2, r1 - 8000778: 43d2 mvns r2, r2 - 800077a: 401a ands r2, r3 - 800077c: 0011 movs r1, r2 + 8001202: 4a2f ldr r2, [pc, #188] ; (80012c0 <__NVIC_SetPriority+0xd4>) + 8001204: 1dfb adds r3, r7, #7 + 8001206: 781b ldrb r3, [r3, #0] + 8001208: b25b sxtb r3, r3 + 800120a: 089b lsrs r3, r3, #2 + 800120c: 33c0 adds r3, #192 ; 0xc0 + 800120e: 009b lsls r3, r3, #2 + 8001210: 589b ldr r3, [r3, r2] + 8001212: 1dfa adds r2, r7, #7 + 8001214: 7812 ldrb r2, [r2, #0] + 8001216: 0011 movs r1, r2 + 8001218: 2203 movs r2, #3 + 800121a: 400a ands r2, r1 + 800121c: 00d2 lsls r2, r2, #3 + 800121e: 21ff movs r1, #255 ; 0xff + 8001220: 4091 lsls r1, r2 + 8001222: 000a movs r2, r1 + 8001224: 43d2 mvns r2, r2 + 8001226: 401a ands r2, r3 + 8001228: 0011 movs r1, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 800077e: 683b ldr r3, [r7, #0] - 8000780: 019b lsls r3, r3, #6 - 8000782: 22ff movs r2, #255 ; 0xff - 8000784: 401a ands r2, r3 - 8000786: 1dfb adds r3, r7, #7 - 8000788: 781b ldrb r3, [r3, #0] - 800078a: 0018 movs r0, r3 - 800078c: 2303 movs r3, #3 - 800078e: 4003 ands r3, r0 - 8000790: 00db lsls r3, r3, #3 - 8000792: 409a lsls r2, r3 + 800122a: 683b ldr r3, [r7, #0] + 800122c: 019b lsls r3, r3, #6 + 800122e: 22ff movs r2, #255 ; 0xff + 8001230: 401a ands r2, r3 + 8001232: 1dfb adds r3, r7, #7 + 8001234: 781b ldrb r3, [r3, #0] + 8001236: 0018 movs r0, r3 + 8001238: 2303 movs r3, #3 + 800123a: 4003 ands r3, r0 + 800123c: 00db lsls r3, r3, #3 + 800123e: 409a lsls r2, r3 NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8000794: 481f ldr r0, [pc, #124] ; (8000814 <__NVIC_SetPriority+0xd4>) - 8000796: 1dfb adds r3, r7, #7 - 8000798: 781b ldrb r3, [r3, #0] - 800079a: b25b sxtb r3, r3 - 800079c: 089b lsrs r3, r3, #2 - 800079e: 430a orrs r2, r1 - 80007a0: 33c0 adds r3, #192 ; 0xc0 - 80007a2: 009b lsls r3, r3, #2 - 80007a4: 501a str r2, [r3, r0] + 8001240: 481f ldr r0, [pc, #124] ; (80012c0 <__NVIC_SetPriority+0xd4>) + 8001242: 1dfb adds r3, r7, #7 + 8001244: 781b ldrb r3, [r3, #0] + 8001246: b25b sxtb r3, r3 + 8001248: 089b lsrs r3, r3, #2 + 800124a: 430a orrs r2, r1 + 800124c: 33c0 adds r3, #192 ; 0xc0 + 800124e: 009b lsls r3, r3, #2 + 8001250: 501a str r2, [r3, r0] else { SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); } } - 80007a6: e031 b.n 800080c <__NVIC_SetPriority+0xcc> + 8001252: e031 b.n 80012b8 <__NVIC_SetPriority+0xcc> SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 80007a8: 4a1b ldr r2, [pc, #108] ; (8000818 <__NVIC_SetPriority+0xd8>) - 80007aa: 1dfb adds r3, r7, #7 - 80007ac: 781b ldrb r3, [r3, #0] - 80007ae: 0019 movs r1, r3 - 80007b0: 230f movs r3, #15 - 80007b2: 400b ands r3, r1 - 80007b4: 3b08 subs r3, #8 - 80007b6: 089b lsrs r3, r3, #2 - 80007b8: 3306 adds r3, #6 - 80007ba: 009b lsls r3, r3, #2 - 80007bc: 18d3 adds r3, r2, r3 - 80007be: 3304 adds r3, #4 - 80007c0: 681b ldr r3, [r3, #0] - 80007c2: 1dfa adds r2, r7, #7 - 80007c4: 7812 ldrb r2, [r2, #0] - 80007c6: 0011 movs r1, r2 - 80007c8: 2203 movs r2, #3 - 80007ca: 400a ands r2, r1 - 80007cc: 00d2 lsls r2, r2, #3 - 80007ce: 21ff movs r1, #255 ; 0xff - 80007d0: 4091 lsls r1, r2 - 80007d2: 000a movs r2, r1 - 80007d4: 43d2 mvns r2, r2 - 80007d6: 401a ands r2, r3 - 80007d8: 0011 movs r1, r2 + 8001254: 4a1b ldr r2, [pc, #108] ; (80012c4 <__NVIC_SetPriority+0xd8>) + 8001256: 1dfb adds r3, r7, #7 + 8001258: 781b ldrb r3, [r3, #0] + 800125a: 0019 movs r1, r3 + 800125c: 230f movs r3, #15 + 800125e: 400b ands r3, r1 + 8001260: 3b08 subs r3, #8 + 8001262: 089b lsrs r3, r3, #2 + 8001264: 3306 adds r3, #6 + 8001266: 009b lsls r3, r3, #2 + 8001268: 18d3 adds r3, r2, r3 + 800126a: 3304 adds r3, #4 + 800126c: 681b ldr r3, [r3, #0] + 800126e: 1dfa adds r2, r7, #7 + 8001270: 7812 ldrb r2, [r2, #0] + 8001272: 0011 movs r1, r2 + 8001274: 2203 movs r2, #3 + 8001276: 400a ands r2, r1 + 8001278: 00d2 lsls r2, r2, #3 + 800127a: 21ff movs r1, #255 ; 0xff + 800127c: 4091 lsls r1, r2 + 800127e: 000a movs r2, r1 + 8001280: 43d2 mvns r2, r2 + 8001282: 401a ands r2, r3 + 8001284: 0011 movs r1, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 80007da: 683b ldr r3, [r7, #0] - 80007dc: 019b lsls r3, r3, #6 - 80007de: 22ff movs r2, #255 ; 0xff - 80007e0: 401a ands r2, r3 - 80007e2: 1dfb adds r3, r7, #7 - 80007e4: 781b ldrb r3, [r3, #0] - 80007e6: 0018 movs r0, r3 - 80007e8: 2303 movs r3, #3 - 80007ea: 4003 ands r3, r0 - 80007ec: 00db lsls r3, r3, #3 - 80007ee: 409a lsls r2, r3 + 8001286: 683b ldr r3, [r7, #0] + 8001288: 019b lsls r3, r3, #6 + 800128a: 22ff movs r2, #255 ; 0xff + 800128c: 401a ands r2, r3 + 800128e: 1dfb adds r3, r7, #7 + 8001290: 781b ldrb r3, [r3, #0] + 8001292: 0018 movs r0, r3 + 8001294: 2303 movs r3, #3 + 8001296: 4003 ands r3, r0 + 8001298: 00db lsls r3, r3, #3 + 800129a: 409a lsls r2, r3 SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 80007f0: 4809 ldr r0, [pc, #36] ; (8000818 <__NVIC_SetPriority+0xd8>) - 80007f2: 1dfb adds r3, r7, #7 - 80007f4: 781b ldrb r3, [r3, #0] - 80007f6: 001c movs r4, r3 - 80007f8: 230f movs r3, #15 - 80007fa: 4023 ands r3, r4 - 80007fc: 3b08 subs r3, #8 - 80007fe: 089b lsrs r3, r3, #2 - 8000800: 430a orrs r2, r1 - 8000802: 3306 adds r3, #6 - 8000804: 009b lsls r3, r3, #2 - 8000806: 18c3 adds r3, r0, r3 - 8000808: 3304 adds r3, #4 - 800080a: 601a str r2, [r3, #0] + 800129c: 4809 ldr r0, [pc, #36] ; (80012c4 <__NVIC_SetPriority+0xd8>) + 800129e: 1dfb adds r3, r7, #7 + 80012a0: 781b ldrb r3, [r3, #0] + 80012a2: 001c movs r4, r3 + 80012a4: 230f movs r3, #15 + 80012a6: 4023 ands r3, r4 + 80012a8: 3b08 subs r3, #8 + 80012aa: 089b lsrs r3, r3, #2 + 80012ac: 430a orrs r2, r1 + 80012ae: 3306 adds r3, #6 + 80012b0: 009b lsls r3, r3, #2 + 80012b2: 18c3 adds r3, r0, r3 + 80012b4: 3304 adds r3, #4 + 80012b6: 601a str r2, [r3, #0] } - 800080c: 46c0 nop ; (mov r8, r8) - 800080e: 46bd mov sp, r7 - 8000810: b003 add sp, #12 - 8000812: bd90 pop {r4, r7, pc} - 8000814: e000e100 .word 0xe000e100 - 8000818: e000ed00 .word 0xe000ed00 + 80012b8: 46c0 nop ; (mov r8, r8) + 80012ba: 46bd mov sp, r7 + 80012bc: b003 add sp, #12 + 80012be: bd90 pop {r4, r7, pc} + 80012c0: e000e100 .word 0xe000e100 + 80012c4: e000ed00 .word 0xe000ed00 -0800081c : +080012c8 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 800081c: b580 push {r7, lr} - 800081e: b082 sub sp, #8 - 8000820: af00 add r7, sp, #0 - 8000822: 6078 str r0, [r7, #4] + 80012c8: b580 push {r7, lr} + 80012ca: b082 sub sp, #8 + 80012cc: af00 add r7, sp, #0 + 80012ce: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8000824: 687b ldr r3, [r7, #4] - 8000826: 1e5a subs r2, r3, #1 - 8000828: 2380 movs r3, #128 ; 0x80 - 800082a: 045b lsls r3, r3, #17 - 800082c: 429a cmp r2, r3 - 800082e: d301 bcc.n 8000834 + 80012d0: 687b ldr r3, [r7, #4] + 80012d2: 1e5a subs r2, r3, #1 + 80012d4: 2380 movs r3, #128 ; 0x80 + 80012d6: 045b lsls r3, r3, #17 + 80012d8: 429a cmp r2, r3 + 80012da: d301 bcc.n 80012e0 { return (1UL); /* Reload value impossible */ - 8000830: 2301 movs r3, #1 - 8000832: e010 b.n 8000856 + 80012dc: 2301 movs r3, #1 + 80012de: e010 b.n 8001302 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8000834: 4b0a ldr r3, [pc, #40] ; (8000860 ) - 8000836: 687a ldr r2, [r7, #4] - 8000838: 3a01 subs r2, #1 - 800083a: 605a str r2, [r3, #4] + 80012e0: 4b0a ldr r3, [pc, #40] ; (800130c ) + 80012e2: 687a ldr r2, [r7, #4] + 80012e4: 3a01 subs r2, #1 + 80012e6: 605a str r2, [r3, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 800083c: 2301 movs r3, #1 - 800083e: 425b negs r3, r3 - 8000840: 2103 movs r1, #3 - 8000842: 0018 movs r0, r3 - 8000844: f7ff ff7c bl 8000740 <__NVIC_SetPriority> + 80012e8: 2301 movs r3, #1 + 80012ea: 425b negs r3, r3 + 80012ec: 2103 movs r1, #3 + 80012ee: 0018 movs r0, r3 + 80012f0: f7ff ff7c bl 80011ec <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8000848: 4b05 ldr r3, [pc, #20] ; (8000860 ) - 800084a: 2200 movs r2, #0 - 800084c: 609a str r2, [r3, #8] + 80012f4: 4b05 ldr r3, [pc, #20] ; (800130c ) + 80012f6: 2200 movs r2, #0 + 80012f8: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 800084e: 4b04 ldr r3, [pc, #16] ; (8000860 ) - 8000850: 2207 movs r2, #7 - 8000852: 601a str r2, [r3, #0] + 80012fa: 4b04 ldr r3, [pc, #16] ; (800130c ) + 80012fc: 2207 movs r2, #7 + 80012fe: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 8000854: 2300 movs r3, #0 + 8001300: 2300 movs r3, #0 } - 8000856: 0018 movs r0, r3 - 8000858: 46bd mov sp, r7 - 800085a: b002 add sp, #8 - 800085c: bd80 pop {r7, pc} - 800085e: 46c0 nop ; (mov r8, r8) - 8000860: e000e010 .word 0xe000e010 + 8001302: 0018 movs r0, r3 + 8001304: 46bd mov sp, r7 + 8001306: b002 add sp, #8 + 8001308: bd80 pop {r7, pc} + 800130a: 46c0 nop ; (mov r8, r8) + 800130c: e000e010 .word 0xe000e010 -08000864 : +08001310 : * with stm32f0xx devices, this parameter is a dummy value and it is ignored, because * no subpriority supported in Cortex M0 based products. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8000864: b580 push {r7, lr} - 8000866: b084 sub sp, #16 - 8000868: af00 add r7, sp, #0 - 800086a: 60b9 str r1, [r7, #8] - 800086c: 607a str r2, [r7, #4] - 800086e: 210f movs r1, #15 - 8000870: 187b adds r3, r7, r1 - 8000872: 1c02 adds r2, r0, #0 - 8000874: 701a strb r2, [r3, #0] + 8001310: b580 push {r7, lr} + 8001312: b084 sub sp, #16 + 8001314: af00 add r7, sp, #0 + 8001316: 60b9 str r1, [r7, #8] + 8001318: 607a str r2, [r7, #4] + 800131a: 210f movs r1, #15 + 800131c: 187b adds r3, r7, r1 + 800131e: 1c02 adds r2, r0, #0 + 8001320: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); NVIC_SetPriority(IRQn,PreemptPriority); - 8000876: 68ba ldr r2, [r7, #8] - 8000878: 187b adds r3, r7, r1 - 800087a: 781b ldrb r3, [r3, #0] - 800087c: b25b sxtb r3, r3 - 800087e: 0011 movs r1, r2 - 8000880: 0018 movs r0, r3 - 8000882: f7ff ff5d bl 8000740 <__NVIC_SetPriority> + 8001322: 68ba ldr r2, [r7, #8] + 8001324: 187b adds r3, r7, r1 + 8001326: 781b ldrb r3, [r3, #0] + 8001328: b25b sxtb r3, r3 + 800132a: 0011 movs r1, r2 + 800132c: 0018 movs r0, r3 + 800132e: f7ff ff5d bl 80011ec <__NVIC_SetPriority> } - 8000886: 46c0 nop ; (mov r8, r8) - 8000888: 46bd mov sp, r7 - 800088a: b004 add sp, #16 - 800088c: bd80 pop {r7, pc} + 8001332: 46c0 nop ; (mov r8, r8) + 8001334: 46bd mov sp, r7 + 8001336: b004 add sp, #16 + 8001338: bd80 pop {r7, pc} -0800088e : +0800133a : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 800088e: b580 push {r7, lr} - 8000890: b082 sub sp, #8 - 8000892: af00 add r7, sp, #0 - 8000894: 6078 str r0, [r7, #4] + 800133a: b580 push {r7, lr} + 800133c: b082 sub sp, #8 + 800133e: af00 add r7, sp, #0 + 8001340: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 8000896: 687b ldr r3, [r7, #4] - 8000898: 0018 movs r0, r3 - 800089a: f7ff ffbf bl 800081c - 800089e: 0003 movs r3, r0 + 8001342: 687b ldr r3, [r7, #4] + 8001344: 0018 movs r0, r3 + 8001346: f7ff ffbf bl 80012c8 + 800134a: 0003 movs r3, r0 } - 80008a0: 0018 movs r0, r3 - 80008a2: 46bd mov sp, r7 - 80008a4: b002 add sp, #8 - 80008a6: bd80 pop {r7, pc} + 800134c: 0018 movs r0, r3 + 800134e: 46bd mov sp, r7 + 8001350: b002 add sp, #8 + 8001352: bd80 pop {r7, pc} -080008a8 : +08001354 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 80008a8: b580 push {r7, lr} - 80008aa: b086 sub sp, #24 - 80008ac: af00 add r7, sp, #0 - 80008ae: 6078 str r0, [r7, #4] - 80008b0: 6039 str r1, [r7, #0] + 8001354: b580 push {r7, lr} + 8001356: b086 sub sp, #24 + 8001358: af00 add r7, sp, #0 + 800135a: 6078 str r0, [r7, #4] + 800135c: 6039 str r1, [r7, #0] uint32_t position = 0x00u; - 80008b2: 2300 movs r3, #0 - 80008b4: 617b str r3, [r7, #20] + 800135e: 2300 movs r3, #0 + 8001360: 617b str r3, [r7, #20] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) - 80008b6: e14f b.n 8000b58 + 8001362: e14f b.n 8001604 { /* Get current io position */ iocurrent = (GPIO_Init->Pin) & (1uL << position); - 80008b8: 683b ldr r3, [r7, #0] - 80008ba: 681b ldr r3, [r3, #0] - 80008bc: 2101 movs r1, #1 - 80008be: 697a ldr r2, [r7, #20] - 80008c0: 4091 lsls r1, r2 - 80008c2: 000a movs r2, r1 - 80008c4: 4013 ands r3, r2 - 80008c6: 60fb str r3, [r7, #12] + 8001364: 683b ldr r3, [r7, #0] + 8001366: 681b ldr r3, [r3, #0] + 8001368: 2101 movs r1, #1 + 800136a: 697a ldr r2, [r7, #20] + 800136c: 4091 lsls r1, r2 + 800136e: 000a movs r2, r1 + 8001370: 4013 ands r3, r2 + 8001372: 60fb str r3, [r7, #12] if (iocurrent != 0x00u) - 80008c8: 68fb ldr r3, [r7, #12] - 80008ca: 2b00 cmp r3, #0 - 80008cc: d100 bne.n 80008d0 - 80008ce: e140 b.n 8000b52 + 8001374: 68fb ldr r3, [r7, #12] + 8001376: 2b00 cmp r3, #0 + 8001378: d100 bne.n 800137c + 800137a: e140 b.n 80015fe { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || - 80008d0: 683b ldr r3, [r7, #0] - 80008d2: 685b ldr r3, [r3, #4] - 80008d4: 2203 movs r2, #3 - 80008d6: 4013 ands r3, r2 - 80008d8: 2b01 cmp r3, #1 - 80008da: d005 beq.n 80008e8 + 800137c: 683b ldr r3, [r7, #0] + 800137e: 685b ldr r3, [r3, #4] + 8001380: 2203 movs r2, #3 + 8001382: 4013 ands r3, r2 + 8001384: 2b01 cmp r3, #1 + 8001386: d005 beq.n 8001394 ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) - 80008dc: 683b ldr r3, [r7, #0] - 80008de: 685b ldr r3, [r3, #4] - 80008e0: 2203 movs r2, #3 - 80008e2: 4013 ands r3, r2 + 8001388: 683b ldr r3, [r7, #0] + 800138a: 685b ldr r3, [r3, #4] + 800138c: 2203 movs r2, #3 + 800138e: 4013 ands r3, r2 if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || - 80008e4: 2b02 cmp r3, #2 - 80008e6: d130 bne.n 800094a + 8001390: 2b02 cmp r3, #2 + 8001392: d130 bne.n 80013f6 { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 80008e8: 687b ldr r3, [r7, #4] - 80008ea: 689b ldr r3, [r3, #8] - 80008ec: 613b str r3, [r7, #16] + 8001394: 687b ldr r3, [r7, #4] + 8001396: 689b ldr r3, [r3, #8] + 8001398: 613b str r3, [r7, #16] temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); - 80008ee: 697b ldr r3, [r7, #20] - 80008f0: 005b lsls r3, r3, #1 - 80008f2: 2203 movs r2, #3 - 80008f4: 409a lsls r2, r3 - 80008f6: 0013 movs r3, r2 - 80008f8: 43da mvns r2, r3 - 80008fa: 693b ldr r3, [r7, #16] - 80008fc: 4013 ands r3, r2 - 80008fe: 613b str r3, [r7, #16] + 800139a: 697b ldr r3, [r7, #20] + 800139c: 005b lsls r3, r3, #1 + 800139e: 2203 movs r2, #3 + 80013a0: 409a lsls r2, r3 + 80013a2: 0013 movs r3, r2 + 80013a4: 43da mvns r2, r3 + 80013a6: 693b ldr r3, [r7, #16] + 80013a8: 4013 ands r3, r2 + 80013aa: 613b str r3, [r7, #16] temp |= (GPIO_Init->Speed << (position * 2u)); - 8000900: 683b ldr r3, [r7, #0] - 8000902: 68da ldr r2, [r3, #12] - 8000904: 697b ldr r3, [r7, #20] - 8000906: 005b lsls r3, r3, #1 - 8000908: 409a lsls r2, r3 - 800090a: 0013 movs r3, r2 - 800090c: 693a ldr r2, [r7, #16] - 800090e: 4313 orrs r3, r2 - 8000910: 613b str r3, [r7, #16] + 80013ac: 683b ldr r3, [r7, #0] + 80013ae: 68da ldr r2, [r3, #12] + 80013b0: 697b ldr r3, [r7, #20] + 80013b2: 005b lsls r3, r3, #1 + 80013b4: 409a lsls r2, r3 + 80013b6: 0013 movs r3, r2 + 80013b8: 693a ldr r2, [r7, #16] + 80013ba: 4313 orrs r3, r2 + 80013bc: 613b str r3, [r7, #16] GPIOx->OSPEEDR = temp; - 8000912: 687b ldr r3, [r7, #4] - 8000914: 693a ldr r2, [r7, #16] - 8000916: 609a str r2, [r3, #8] + 80013be: 687b ldr r3, [r7, #4] + 80013c0: 693a ldr r2, [r7, #16] + 80013c2: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; - 8000918: 687b ldr r3, [r7, #4] - 800091a: 685b ldr r3, [r3, #4] - 800091c: 613b str r3, [r7, #16] + 80013c4: 687b ldr r3, [r7, #4] + 80013c6: 685b ldr r3, [r3, #4] + 80013c8: 613b str r3, [r7, #16] temp &= ~(GPIO_OTYPER_OT_0 << position) ; - 800091e: 2201 movs r2, #1 - 8000920: 697b ldr r3, [r7, #20] - 8000922: 409a lsls r2, r3 - 8000924: 0013 movs r3, r2 - 8000926: 43da mvns r2, r3 - 8000928: 693b ldr r3, [r7, #16] - 800092a: 4013 ands r3, r2 - 800092c: 613b str r3, [r7, #16] + 80013ca: 2201 movs r2, #1 + 80013cc: 697b ldr r3, [r7, #20] + 80013ce: 409a lsls r2, r3 + 80013d0: 0013 movs r3, r2 + 80013d2: 43da mvns r2, r3 + 80013d4: 693b ldr r3, [r7, #16] + 80013d6: 4013 ands r3, r2 + 80013d8: 613b str r3, [r7, #16] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); - 800092e: 683b ldr r3, [r7, #0] - 8000930: 685b ldr r3, [r3, #4] - 8000932: 091b lsrs r3, r3, #4 - 8000934: 2201 movs r2, #1 - 8000936: 401a ands r2, r3 - 8000938: 697b ldr r3, [r7, #20] - 800093a: 409a lsls r2, r3 - 800093c: 0013 movs r3, r2 - 800093e: 693a ldr r2, [r7, #16] - 8000940: 4313 orrs r3, r2 - 8000942: 613b str r3, [r7, #16] + 80013da: 683b ldr r3, [r7, #0] + 80013dc: 685b ldr r3, [r3, #4] + 80013de: 091b lsrs r3, r3, #4 + 80013e0: 2201 movs r2, #1 + 80013e2: 401a ands r2, r3 + 80013e4: 697b ldr r3, [r7, #20] + 80013e6: 409a lsls r2, r3 + 80013e8: 0013 movs r3, r2 + 80013ea: 693a ldr r2, [r7, #16] + 80013ec: 4313 orrs r3, r2 + 80013ee: 613b str r3, [r7, #16] GPIOx->OTYPER = temp; - 8000944: 687b ldr r3, [r7, #4] - 8000946: 693a ldr r2, [r7, #16] - 8000948: 605a str r2, [r3, #4] + 80013f0: 687b ldr r3, [r7, #4] + 80013f2: 693a ldr r2, [r7, #16] + 80013f4: 605a str r2, [r3, #4] } if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) - 800094a: 683b ldr r3, [r7, #0] - 800094c: 685b ldr r3, [r3, #4] - 800094e: 2203 movs r2, #3 - 8000950: 4013 ands r3, r2 - 8000952: 2b03 cmp r3, #3 - 8000954: d017 beq.n 8000986 + 80013f6: 683b ldr r3, [r7, #0] + 80013f8: 685b ldr r3, [r3, #4] + 80013fa: 2203 movs r2, #3 + 80013fc: 4013 ands r3, r2 + 80013fe: 2b03 cmp r3, #3 + 8001400: d017 beq.n 8001432 { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; - 8000956: 687b ldr r3, [r7, #4] - 8000958: 68db ldr r3, [r3, #12] - 800095a: 613b str r3, [r7, #16] + 8001402: 687b ldr r3, [r7, #4] + 8001404: 68db ldr r3, [r3, #12] + 8001406: 613b str r3, [r7, #16] temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); - 800095c: 697b ldr r3, [r7, #20] - 800095e: 005b lsls r3, r3, #1 - 8000960: 2203 movs r2, #3 - 8000962: 409a lsls r2, r3 - 8000964: 0013 movs r3, r2 - 8000966: 43da mvns r2, r3 - 8000968: 693b ldr r3, [r7, #16] - 800096a: 4013 ands r3, r2 - 800096c: 613b str r3, [r7, #16] + 8001408: 697b ldr r3, [r7, #20] + 800140a: 005b lsls r3, r3, #1 + 800140c: 2203 movs r2, #3 + 800140e: 409a lsls r2, r3 + 8001410: 0013 movs r3, r2 + 8001412: 43da mvns r2, r3 + 8001414: 693b ldr r3, [r7, #16] + 8001416: 4013 ands r3, r2 + 8001418: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Pull) << (position * 2u)); - 800096e: 683b ldr r3, [r7, #0] - 8000970: 689a ldr r2, [r3, #8] - 8000972: 697b ldr r3, [r7, #20] - 8000974: 005b lsls r3, r3, #1 - 8000976: 409a lsls r2, r3 - 8000978: 0013 movs r3, r2 - 800097a: 693a ldr r2, [r7, #16] - 800097c: 4313 orrs r3, r2 - 800097e: 613b str r3, [r7, #16] + 800141a: 683b ldr r3, [r7, #0] + 800141c: 689a ldr r2, [r3, #8] + 800141e: 697b ldr r3, [r7, #20] + 8001420: 005b lsls r3, r3, #1 + 8001422: 409a lsls r2, r3 + 8001424: 0013 movs r3, r2 + 8001426: 693a ldr r2, [r7, #16] + 8001428: 4313 orrs r3, r2 + 800142a: 613b str r3, [r7, #16] GPIOx->PUPDR = temp; - 8000980: 687b ldr r3, [r7, #4] - 8000982: 693a ldr r2, [r7, #16] - 8000984: 60da str r2, [r3, #12] + 800142c: 687b ldr r3, [r7, #4] + 800142e: 693a ldr r2, [r7, #16] + 8001430: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 8000986: 683b ldr r3, [r7, #0] - 8000988: 685b ldr r3, [r3, #4] - 800098a: 2203 movs r2, #3 - 800098c: 4013 ands r3, r2 - 800098e: 2b02 cmp r3, #2 - 8000990: d123 bne.n 80009da + 8001432: 683b ldr r3, [r7, #0] + 8001434: 685b ldr r3, [r3, #4] + 8001436: 2203 movs r2, #3 + 8001438: 4013 ands r3, r2 + 800143a: 2b02 cmp r3, #2 + 800143c: d123 bne.n 8001486 /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3u]; - 8000992: 697b ldr r3, [r7, #20] - 8000994: 08da lsrs r2, r3, #3 - 8000996: 687b ldr r3, [r7, #4] - 8000998: 3208 adds r2, #8 - 800099a: 0092 lsls r2, r2, #2 - 800099c: 58d3 ldr r3, [r2, r3] - 800099e: 613b str r3, [r7, #16] + 800143e: 697b ldr r3, [r7, #20] + 8001440: 08da lsrs r2, r3, #3 + 8001442: 687b ldr r3, [r7, #4] + 8001444: 3208 adds r2, #8 + 8001446: 0092 lsls r2, r2, #2 + 8001448: 58d3 ldr r3, [r2, r3] + 800144a: 613b str r3, [r7, #16] temp &= ~(0xFu << ((position & 0x07u) * 4u)); - 80009a0: 697b ldr r3, [r7, #20] - 80009a2: 2207 movs r2, #7 - 80009a4: 4013 ands r3, r2 - 80009a6: 009b lsls r3, r3, #2 - 80009a8: 220f movs r2, #15 - 80009aa: 409a lsls r2, r3 - 80009ac: 0013 movs r3, r2 - 80009ae: 43da mvns r2, r3 - 80009b0: 693b ldr r3, [r7, #16] - 80009b2: 4013 ands r3, r2 - 80009b4: 613b str r3, [r7, #16] + 800144c: 697b ldr r3, [r7, #20] + 800144e: 2207 movs r2, #7 + 8001450: 4013 ands r3, r2 + 8001452: 009b lsls r3, r3, #2 + 8001454: 220f movs r2, #15 + 8001456: 409a lsls r2, r3 + 8001458: 0013 movs r3, r2 + 800145a: 43da mvns r2, r3 + 800145c: 693b ldr r3, [r7, #16] + 800145e: 4013 ands r3, r2 + 8001460: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); - 80009b6: 683b ldr r3, [r7, #0] - 80009b8: 691a ldr r2, [r3, #16] - 80009ba: 697b ldr r3, [r7, #20] - 80009bc: 2107 movs r1, #7 - 80009be: 400b ands r3, r1 - 80009c0: 009b lsls r3, r3, #2 - 80009c2: 409a lsls r2, r3 - 80009c4: 0013 movs r3, r2 - 80009c6: 693a ldr r2, [r7, #16] - 80009c8: 4313 orrs r3, r2 - 80009ca: 613b str r3, [r7, #16] + 8001462: 683b ldr r3, [r7, #0] + 8001464: 691a ldr r2, [r3, #16] + 8001466: 697b ldr r3, [r7, #20] + 8001468: 2107 movs r1, #7 + 800146a: 400b ands r3, r1 + 800146c: 009b lsls r3, r3, #2 + 800146e: 409a lsls r2, r3 + 8001470: 0013 movs r3, r2 + 8001472: 693a ldr r2, [r7, #16] + 8001474: 4313 orrs r3, r2 + 8001476: 613b str r3, [r7, #16] GPIOx->AFR[position >> 3u] = temp; - 80009cc: 697b ldr r3, [r7, #20] - 80009ce: 08da lsrs r2, r3, #3 - 80009d0: 687b ldr r3, [r7, #4] - 80009d2: 3208 adds r2, #8 - 80009d4: 0092 lsls r2, r2, #2 - 80009d6: 6939 ldr r1, [r7, #16] - 80009d8: 50d1 str r1, [r2, r3] + 8001478: 697b ldr r3, [r7, #20] + 800147a: 08da lsrs r2, r3, #3 + 800147c: 687b ldr r3, [r7, #4] + 800147e: 3208 adds r2, #8 + 8001480: 0092 lsls r2, r2, #2 + 8001482: 6939 ldr r1, [r7, #16] + 8001484: 50d1 str r1, [r2, r3] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; - 80009da: 687b ldr r3, [r7, #4] - 80009dc: 681b ldr r3, [r3, #0] - 80009de: 613b str r3, [r7, #16] + 8001486: 687b ldr r3, [r7, #4] + 8001488: 681b ldr r3, [r3, #0] + 800148a: 613b str r3, [r7, #16] temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); - 80009e0: 697b ldr r3, [r7, #20] - 80009e2: 005b lsls r3, r3, #1 - 80009e4: 2203 movs r2, #3 - 80009e6: 409a lsls r2, r3 - 80009e8: 0013 movs r3, r2 - 80009ea: 43da mvns r2, r3 - 80009ec: 693b ldr r3, [r7, #16] - 80009ee: 4013 ands r3, r2 - 80009f0: 613b str r3, [r7, #16] + 800148c: 697b ldr r3, [r7, #20] + 800148e: 005b lsls r3, r3, #1 + 8001490: 2203 movs r2, #3 + 8001492: 409a lsls r2, r3 + 8001494: 0013 movs r3, r2 + 8001496: 43da mvns r2, r3 + 8001498: 693b ldr r3, [r7, #16] + 800149a: 4013 ands r3, r2 + 800149c: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); - 80009f2: 683b ldr r3, [r7, #0] - 80009f4: 685b ldr r3, [r3, #4] - 80009f6: 2203 movs r2, #3 - 80009f8: 401a ands r2, r3 - 80009fa: 697b ldr r3, [r7, #20] - 80009fc: 005b lsls r3, r3, #1 - 80009fe: 409a lsls r2, r3 - 8000a00: 0013 movs r3, r2 - 8000a02: 693a ldr r2, [r7, #16] - 8000a04: 4313 orrs r3, r2 - 8000a06: 613b str r3, [r7, #16] + 800149e: 683b ldr r3, [r7, #0] + 80014a0: 685b ldr r3, [r3, #4] + 80014a2: 2203 movs r2, #3 + 80014a4: 401a ands r2, r3 + 80014a6: 697b ldr r3, [r7, #20] + 80014a8: 005b lsls r3, r3, #1 + 80014aa: 409a lsls r2, r3 + 80014ac: 0013 movs r3, r2 + 80014ae: 693a ldr r2, [r7, #16] + 80014b0: 4313 orrs r3, r2 + 80014b2: 613b str r3, [r7, #16] GPIOx->MODER = temp; - 8000a08: 687b ldr r3, [r7, #4] - 8000a0a: 693a ldr r2, [r7, #16] - 8000a0c: 601a str r2, [r3, #0] + 80014b4: 687b ldr r3, [r7, #4] + 80014b6: 693a ldr r2, [r7, #16] + 80014b8: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if((GPIO_Init->Mode & EXTI_MODE) != 0x00u) - 8000a0e: 683b ldr r3, [r7, #0] - 8000a10: 685a ldr r2, [r3, #4] - 8000a12: 23c0 movs r3, #192 ; 0xc0 - 8000a14: 029b lsls r3, r3, #10 - 8000a16: 4013 ands r3, r2 - 8000a18: d100 bne.n 8000a1c - 8000a1a: e09a b.n 8000b52 + 80014ba: 683b ldr r3, [r7, #0] + 80014bc: 685a ldr r2, [r3, #4] + 80014be: 23c0 movs r3, #192 ; 0xc0 + 80014c0: 029b lsls r3, r3, #10 + 80014c2: 4013 ands r3, r2 + 80014c4: d100 bne.n 80014c8 + 80014c6: e09a b.n 80015fe { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8000a1c: 4b54 ldr r3, [pc, #336] ; (8000b70 ) - 8000a1e: 699a ldr r2, [r3, #24] - 8000a20: 4b53 ldr r3, [pc, #332] ; (8000b70 ) - 8000a22: 2101 movs r1, #1 - 8000a24: 430a orrs r2, r1 - 8000a26: 619a str r2, [r3, #24] - 8000a28: 4b51 ldr r3, [pc, #324] ; (8000b70 ) - 8000a2a: 699b ldr r3, [r3, #24] - 8000a2c: 2201 movs r2, #1 - 8000a2e: 4013 ands r3, r2 - 8000a30: 60bb str r3, [r7, #8] - 8000a32: 68bb ldr r3, [r7, #8] + 80014c8: 4b54 ldr r3, [pc, #336] ; (800161c ) + 80014ca: 699a ldr r2, [r3, #24] + 80014cc: 4b53 ldr r3, [pc, #332] ; (800161c ) + 80014ce: 2101 movs r1, #1 + 80014d0: 430a orrs r2, r1 + 80014d2: 619a str r2, [r3, #24] + 80014d4: 4b51 ldr r3, [pc, #324] ; (800161c ) + 80014d6: 699b ldr r3, [r3, #24] + 80014d8: 2201 movs r2, #1 + 80014da: 4013 ands r3, r2 + 80014dc: 60bb str r3, [r7, #8] + 80014de: 68bb ldr r3, [r7, #8] temp = SYSCFG->EXTICR[position >> 2u]; - 8000a34: 4a4f ldr r2, [pc, #316] ; (8000b74 ) - 8000a36: 697b ldr r3, [r7, #20] - 8000a38: 089b lsrs r3, r3, #2 - 8000a3a: 3302 adds r3, #2 - 8000a3c: 009b lsls r3, r3, #2 - 8000a3e: 589b ldr r3, [r3, r2] - 8000a40: 613b str r3, [r7, #16] + 80014e0: 4a4f ldr r2, [pc, #316] ; (8001620 ) + 80014e2: 697b ldr r3, [r7, #20] + 80014e4: 089b lsrs r3, r3, #2 + 80014e6: 3302 adds r3, #2 + 80014e8: 009b lsls r3, r3, #2 + 80014ea: 589b ldr r3, [r3, r2] + 80014ec: 613b str r3, [r7, #16] temp &= ~(0x0FuL << (4u * (position & 0x03u))); - 8000a42: 697b ldr r3, [r7, #20] - 8000a44: 2203 movs r2, #3 - 8000a46: 4013 ands r3, r2 - 8000a48: 009b lsls r3, r3, #2 - 8000a4a: 220f movs r2, #15 - 8000a4c: 409a lsls r2, r3 - 8000a4e: 0013 movs r3, r2 - 8000a50: 43da mvns r2, r3 - 8000a52: 693b ldr r3, [r7, #16] - 8000a54: 4013 ands r3, r2 - 8000a56: 613b str r3, [r7, #16] + 80014ee: 697b ldr r3, [r7, #20] + 80014f0: 2203 movs r2, #3 + 80014f2: 4013 ands r3, r2 + 80014f4: 009b lsls r3, r3, #2 + 80014f6: 220f movs r2, #15 + 80014f8: 409a lsls r2, r3 + 80014fa: 0013 movs r3, r2 + 80014fc: 43da mvns r2, r3 + 80014fe: 693b ldr r3, [r7, #16] + 8001500: 4013 ands r3, r2 + 8001502: 613b str r3, [r7, #16] temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); - 8000a58: 687a ldr r2, [r7, #4] - 8000a5a: 2390 movs r3, #144 ; 0x90 - 8000a5c: 05db lsls r3, r3, #23 - 8000a5e: 429a cmp r2, r3 - 8000a60: d013 beq.n 8000a8a - 8000a62: 687b ldr r3, [r7, #4] - 8000a64: 4a44 ldr r2, [pc, #272] ; (8000b78 ) - 8000a66: 4293 cmp r3, r2 - 8000a68: d00d beq.n 8000a86 - 8000a6a: 687b ldr r3, [r7, #4] - 8000a6c: 4a43 ldr r2, [pc, #268] ; (8000b7c ) - 8000a6e: 4293 cmp r3, r2 - 8000a70: d007 beq.n 8000a82 - 8000a72: 687b ldr r3, [r7, #4] - 8000a74: 4a42 ldr r2, [pc, #264] ; (8000b80 ) - 8000a76: 4293 cmp r3, r2 - 8000a78: d101 bne.n 8000a7e - 8000a7a: 2303 movs r3, #3 - 8000a7c: e006 b.n 8000a8c - 8000a7e: 2305 movs r3, #5 - 8000a80: e004 b.n 8000a8c - 8000a82: 2302 movs r3, #2 - 8000a84: e002 b.n 8000a8c - 8000a86: 2301 movs r3, #1 - 8000a88: e000 b.n 8000a8c - 8000a8a: 2300 movs r3, #0 - 8000a8c: 697a ldr r2, [r7, #20] - 8000a8e: 2103 movs r1, #3 - 8000a90: 400a ands r2, r1 - 8000a92: 0092 lsls r2, r2, #2 - 8000a94: 4093 lsls r3, r2 - 8000a96: 693a ldr r2, [r7, #16] - 8000a98: 4313 orrs r3, r2 - 8000a9a: 613b str r3, [r7, #16] + 8001504: 687a ldr r2, [r7, #4] + 8001506: 2390 movs r3, #144 ; 0x90 + 8001508: 05db lsls r3, r3, #23 + 800150a: 429a cmp r2, r3 + 800150c: d013 beq.n 8001536 + 800150e: 687b ldr r3, [r7, #4] + 8001510: 4a44 ldr r2, [pc, #272] ; (8001624 ) + 8001512: 4293 cmp r3, r2 + 8001514: d00d beq.n 8001532 + 8001516: 687b ldr r3, [r7, #4] + 8001518: 4a43 ldr r2, [pc, #268] ; (8001628 ) + 800151a: 4293 cmp r3, r2 + 800151c: d007 beq.n 800152e + 800151e: 687b ldr r3, [r7, #4] + 8001520: 4a42 ldr r2, [pc, #264] ; (800162c ) + 8001522: 4293 cmp r3, r2 + 8001524: d101 bne.n 800152a + 8001526: 2303 movs r3, #3 + 8001528: e006 b.n 8001538 + 800152a: 2305 movs r3, #5 + 800152c: e004 b.n 8001538 + 800152e: 2302 movs r3, #2 + 8001530: e002 b.n 8001538 + 8001532: 2301 movs r3, #1 + 8001534: e000 b.n 8001538 + 8001536: 2300 movs r3, #0 + 8001538: 697a ldr r2, [r7, #20] + 800153a: 2103 movs r1, #3 + 800153c: 400a ands r2, r1 + 800153e: 0092 lsls r2, r2, #2 + 8001540: 4093 lsls r3, r2 + 8001542: 693a ldr r2, [r7, #16] + 8001544: 4313 orrs r3, r2 + 8001546: 613b str r3, [r7, #16] SYSCFG->EXTICR[position >> 2u] = temp; - 8000a9c: 4935 ldr r1, [pc, #212] ; (8000b74 ) - 8000a9e: 697b ldr r3, [r7, #20] - 8000aa0: 089b lsrs r3, r3, #2 - 8000aa2: 3302 adds r3, #2 - 8000aa4: 009b lsls r3, r3, #2 - 8000aa6: 693a ldr r2, [r7, #16] - 8000aa8: 505a str r2, [r3, r1] + 8001548: 4935 ldr r1, [pc, #212] ; (8001620 ) + 800154a: 697b ldr r3, [r7, #20] + 800154c: 089b lsrs r3, r3, #2 + 800154e: 3302 adds r3, #2 + 8001550: 009b lsls r3, r3, #2 + 8001552: 693a ldr r2, [r7, #16] + 8001554: 505a str r2, [r3, r1] /* Clear EXTI line configuration */ temp = EXTI->IMR; - 8000aaa: 4b36 ldr r3, [pc, #216] ; (8000b84 ) - 8000aac: 681b ldr r3, [r3, #0] - 8000aae: 613b str r3, [r7, #16] + 8001556: 4b36 ldr r3, [pc, #216] ; (8001630 ) + 8001558: 681b ldr r3, [r3, #0] + 800155a: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8000ab0: 68fb ldr r3, [r7, #12] - 8000ab2: 43da mvns r2, r3 - 8000ab4: 693b ldr r3, [r7, #16] - 8000ab6: 4013 ands r3, r2 - 8000ab8: 613b str r3, [r7, #16] + 800155c: 68fb ldr r3, [r7, #12] + 800155e: 43da mvns r2, r3 + 8001560: 693b ldr r3, [r7, #16] + 8001562: 4013 ands r3, r2 + 8001564: 613b str r3, [r7, #16] if((GPIO_Init->Mode & EXTI_IT) != 0x00u) - 8000aba: 683b ldr r3, [r7, #0] - 8000abc: 685a ldr r2, [r3, #4] - 8000abe: 2380 movs r3, #128 ; 0x80 - 8000ac0: 025b lsls r3, r3, #9 - 8000ac2: 4013 ands r3, r2 - 8000ac4: d003 beq.n 8000ace + 8001566: 683b ldr r3, [r7, #0] + 8001568: 685a ldr r2, [r3, #4] + 800156a: 2380 movs r3, #128 ; 0x80 + 800156c: 025b lsls r3, r3, #9 + 800156e: 4013 ands r3, r2 + 8001570: d003 beq.n 800157a { temp |= iocurrent; - 8000ac6: 693a ldr r2, [r7, #16] - 8000ac8: 68fb ldr r3, [r7, #12] - 8000aca: 4313 orrs r3, r2 - 8000acc: 613b str r3, [r7, #16] + 8001572: 693a ldr r2, [r7, #16] + 8001574: 68fb ldr r3, [r7, #12] + 8001576: 4313 orrs r3, r2 + 8001578: 613b str r3, [r7, #16] } EXTI->IMR = temp; - 8000ace: 4b2d ldr r3, [pc, #180] ; (8000b84 ) - 8000ad0: 693a ldr r2, [r7, #16] - 8000ad2: 601a str r2, [r3, #0] + 800157a: 4b2d ldr r3, [pc, #180] ; (8001630 ) + 800157c: 693a ldr r2, [r7, #16] + 800157e: 601a str r2, [r3, #0] temp = EXTI->EMR; - 8000ad4: 4b2b ldr r3, [pc, #172] ; (8000b84 ) - 8000ad6: 685b ldr r3, [r3, #4] - 8000ad8: 613b str r3, [r7, #16] + 8001580: 4b2b ldr r3, [pc, #172] ; (8001630 ) + 8001582: 685b ldr r3, [r3, #4] + 8001584: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8000ada: 68fb ldr r3, [r7, #12] - 8000adc: 43da mvns r2, r3 - 8000ade: 693b ldr r3, [r7, #16] - 8000ae0: 4013 ands r3, r2 - 8000ae2: 613b str r3, [r7, #16] + 8001586: 68fb ldr r3, [r7, #12] + 8001588: 43da mvns r2, r3 + 800158a: 693b ldr r3, [r7, #16] + 800158c: 4013 ands r3, r2 + 800158e: 613b str r3, [r7, #16] if((GPIO_Init->Mode & EXTI_EVT) != 0x00u) - 8000ae4: 683b ldr r3, [r7, #0] - 8000ae6: 685a ldr r2, [r3, #4] - 8000ae8: 2380 movs r3, #128 ; 0x80 - 8000aea: 029b lsls r3, r3, #10 - 8000aec: 4013 ands r3, r2 - 8000aee: d003 beq.n 8000af8 + 8001590: 683b ldr r3, [r7, #0] + 8001592: 685a ldr r2, [r3, #4] + 8001594: 2380 movs r3, #128 ; 0x80 + 8001596: 029b lsls r3, r3, #10 + 8001598: 4013 ands r3, r2 + 800159a: d003 beq.n 80015a4 { temp |= iocurrent; - 8000af0: 693a ldr r2, [r7, #16] - 8000af2: 68fb ldr r3, [r7, #12] - 8000af4: 4313 orrs r3, r2 - 8000af6: 613b str r3, [r7, #16] + 800159c: 693a ldr r2, [r7, #16] + 800159e: 68fb ldr r3, [r7, #12] + 80015a0: 4313 orrs r3, r2 + 80015a2: 613b str r3, [r7, #16] } EXTI->EMR = temp; - 8000af8: 4b22 ldr r3, [pc, #136] ; (8000b84 ) - 8000afa: 693a ldr r2, [r7, #16] - 8000afc: 605a str r2, [r3, #4] + 80015a4: 4b22 ldr r3, [pc, #136] ; (8001630 ) + 80015a6: 693a ldr r2, [r7, #16] + 80015a8: 605a str r2, [r3, #4] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; - 8000afe: 4b21 ldr r3, [pc, #132] ; (8000b84 ) - 8000b00: 689b ldr r3, [r3, #8] - 8000b02: 613b str r3, [r7, #16] + 80015aa: 4b21 ldr r3, [pc, #132] ; (8001630 ) + 80015ac: 689b ldr r3, [r3, #8] + 80015ae: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8000b04: 68fb ldr r3, [r7, #12] - 8000b06: 43da mvns r2, r3 - 8000b08: 693b ldr r3, [r7, #16] - 8000b0a: 4013 ands r3, r2 - 8000b0c: 613b str r3, [r7, #16] + 80015b0: 68fb ldr r3, [r7, #12] + 80015b2: 43da mvns r2, r3 + 80015b4: 693b ldr r3, [r7, #16] + 80015b6: 4013 ands r3, r2 + 80015b8: 613b str r3, [r7, #16] if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) - 8000b0e: 683b ldr r3, [r7, #0] - 8000b10: 685a ldr r2, [r3, #4] - 8000b12: 2380 movs r3, #128 ; 0x80 - 8000b14: 035b lsls r3, r3, #13 - 8000b16: 4013 ands r3, r2 - 8000b18: d003 beq.n 8000b22 + 80015ba: 683b ldr r3, [r7, #0] + 80015bc: 685a ldr r2, [r3, #4] + 80015be: 2380 movs r3, #128 ; 0x80 + 80015c0: 035b lsls r3, r3, #13 + 80015c2: 4013 ands r3, r2 + 80015c4: d003 beq.n 80015ce { temp |= iocurrent; - 8000b1a: 693a ldr r2, [r7, #16] - 8000b1c: 68fb ldr r3, [r7, #12] - 8000b1e: 4313 orrs r3, r2 - 8000b20: 613b str r3, [r7, #16] + 80015c6: 693a ldr r2, [r7, #16] + 80015c8: 68fb ldr r3, [r7, #12] + 80015ca: 4313 orrs r3, r2 + 80015cc: 613b str r3, [r7, #16] } EXTI->RTSR = temp; - 8000b22: 4b18 ldr r3, [pc, #96] ; (8000b84 ) - 8000b24: 693a ldr r2, [r7, #16] - 8000b26: 609a str r2, [r3, #8] + 80015ce: 4b18 ldr r3, [pc, #96] ; (8001630 ) + 80015d0: 693a ldr r2, [r7, #16] + 80015d2: 609a str r2, [r3, #8] temp = EXTI->FTSR; - 8000b28: 4b16 ldr r3, [pc, #88] ; (8000b84 ) - 8000b2a: 68db ldr r3, [r3, #12] - 8000b2c: 613b str r3, [r7, #16] + 80015d4: 4b16 ldr r3, [pc, #88] ; (8001630 ) + 80015d6: 68db ldr r3, [r3, #12] + 80015d8: 613b str r3, [r7, #16] temp &= ~(iocurrent); - 8000b2e: 68fb ldr r3, [r7, #12] - 8000b30: 43da mvns r2, r3 - 8000b32: 693b ldr r3, [r7, #16] - 8000b34: 4013 ands r3, r2 - 8000b36: 613b str r3, [r7, #16] + 80015da: 68fb ldr r3, [r7, #12] + 80015dc: 43da mvns r2, r3 + 80015de: 693b ldr r3, [r7, #16] + 80015e0: 4013 ands r3, r2 + 80015e2: 613b str r3, [r7, #16] if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) - 8000b38: 683b ldr r3, [r7, #0] - 8000b3a: 685a ldr r2, [r3, #4] - 8000b3c: 2380 movs r3, #128 ; 0x80 - 8000b3e: 039b lsls r3, r3, #14 - 8000b40: 4013 ands r3, r2 - 8000b42: d003 beq.n 8000b4c + 80015e4: 683b ldr r3, [r7, #0] + 80015e6: 685a ldr r2, [r3, #4] + 80015e8: 2380 movs r3, #128 ; 0x80 + 80015ea: 039b lsls r3, r3, #14 + 80015ec: 4013 ands r3, r2 + 80015ee: d003 beq.n 80015f8 { temp |= iocurrent; - 8000b44: 693a ldr r2, [r7, #16] - 8000b46: 68fb ldr r3, [r7, #12] - 8000b48: 4313 orrs r3, r2 - 8000b4a: 613b str r3, [r7, #16] + 80015f0: 693a ldr r2, [r7, #16] + 80015f2: 68fb ldr r3, [r7, #12] + 80015f4: 4313 orrs r3, r2 + 80015f6: 613b str r3, [r7, #16] } EXTI->FTSR = temp; - 8000b4c: 4b0d ldr r3, [pc, #52] ; (8000b84 ) - 8000b4e: 693a ldr r2, [r7, #16] - 8000b50: 60da str r2, [r3, #12] + 80015f8: 4b0d ldr r3, [pc, #52] ; (8001630 ) + 80015fa: 693a ldr r2, [r7, #16] + 80015fc: 60da str r2, [r3, #12] } } position++; - 8000b52: 697b ldr r3, [r7, #20] - 8000b54: 3301 adds r3, #1 - 8000b56: 617b str r3, [r7, #20] + 80015fe: 697b ldr r3, [r7, #20] + 8001600: 3301 adds r3, #1 + 8001602: 617b str r3, [r7, #20] while (((GPIO_Init->Pin) >> position) != 0x00u) - 8000b58: 683b ldr r3, [r7, #0] - 8000b5a: 681a ldr r2, [r3, #0] - 8000b5c: 697b ldr r3, [r7, #20] - 8000b5e: 40da lsrs r2, r3 - 8000b60: 1e13 subs r3, r2, #0 - 8000b62: d000 beq.n 8000b66 - 8000b64: e6a8 b.n 80008b8 + 8001604: 683b ldr r3, [r7, #0] + 8001606: 681a ldr r2, [r3, #0] + 8001608: 697b ldr r3, [r7, #20] + 800160a: 40da lsrs r2, r3 + 800160c: 1e13 subs r3, r2, #0 + 800160e: d000 beq.n 8001612 + 8001610: e6a8 b.n 8001364 } } - 8000b66: 46c0 nop ; (mov r8, r8) - 8000b68: 46c0 nop ; (mov r8, r8) - 8000b6a: 46bd mov sp, r7 - 8000b6c: b006 add sp, #24 - 8000b6e: bd80 pop {r7, pc} - 8000b70: 40021000 .word 0x40021000 - 8000b74: 40010000 .word 0x40010000 - 8000b78: 48000400 .word 0x48000400 - 8000b7c: 48000800 .word 0x48000800 - 8000b80: 48000c00 .word 0x48000c00 - 8000b84: 40010400 .word 0x40010400 + 8001612: 46c0 nop ; (mov r8, r8) + 8001614: 46c0 nop ; (mov r8, r8) + 8001616: 46bd mov sp, r7 + 8001618: b006 add sp, #24 + 800161a: bd80 pop {r7, pc} + 800161c: 40021000 .word 0x40021000 + 8001620: 40010000 .word 0x40010000 + 8001624: 48000400 .word 0x48000400 + 8001628: 48000800 .word 0x48000800 + 800162c: 48000c00 .word 0x48000c00 + 8001630: 40010400 .word 0x40010400 -08000b88 : +08001634 : * @param GPIO_Pin specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) { - 8000b88: b580 push {r7, lr} - 8000b8a: b084 sub sp, #16 - 8000b8c: af00 add r7, sp, #0 - 8000b8e: 6078 str r0, [r7, #4] - 8000b90: 000a movs r2, r1 - 8000b92: 1cbb adds r3, r7, #2 - 8000b94: 801a strh r2, [r3, #0] + 8001634: b580 push {r7, lr} + 8001636: b084 sub sp, #16 + 8001638: af00 add r7, sp, #0 + 800163a: 6078 str r0, [r7, #4] + 800163c: 000a movs r2, r1 + 800163e: 1cbb adds r3, r7, #2 + 8001640: 801a strh r2, [r3, #0] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - 8000b96: 687b ldr r3, [r7, #4] - 8000b98: 691b ldr r3, [r3, #16] - 8000b9a: 1cba adds r2, r7, #2 - 8000b9c: 8812 ldrh r2, [r2, #0] - 8000b9e: 4013 ands r3, r2 - 8000ba0: d004 beq.n 8000bac + 8001642: 687b ldr r3, [r7, #4] + 8001644: 691b ldr r3, [r3, #16] + 8001646: 1cba adds r2, r7, #2 + 8001648: 8812 ldrh r2, [r2, #0] + 800164a: 4013 ands r3, r2 + 800164c: d004 beq.n 8001658 { bitstatus = GPIO_PIN_SET; - 8000ba2: 230f movs r3, #15 - 8000ba4: 18fb adds r3, r7, r3 - 8000ba6: 2201 movs r2, #1 - 8000ba8: 701a strb r2, [r3, #0] - 8000baa: e003 b.n 8000bb4 + 800164e: 230f movs r3, #15 + 8001650: 18fb adds r3, r7, r3 + 8001652: 2201 movs r2, #1 + 8001654: 701a strb r2, [r3, #0] + 8001656: e003 b.n 8001660 } else { bitstatus = GPIO_PIN_RESET; - 8000bac: 230f movs r3, #15 - 8000bae: 18fb adds r3, r7, r3 - 8000bb0: 2200 movs r2, #0 - 8000bb2: 701a strb r2, [r3, #0] + 8001658: 230f movs r3, #15 + 800165a: 18fb adds r3, r7, r3 + 800165c: 2200 movs r2, #0 + 800165e: 701a strb r2, [r3, #0] } return bitstatus; - 8000bb4: 230f movs r3, #15 - 8000bb6: 18fb adds r3, r7, r3 - 8000bb8: 781b ldrb r3, [r3, #0] + 8001660: 230f movs r3, #15 + 8001662: 18fb adds r3, r7, r3 + 8001664: 781b ldrb r3, [r3, #0] } - 8000bba: 0018 movs r0, r3 - 8000bbc: 46bd mov sp, r7 - 8000bbe: b004 add sp, #16 - 8000bc0: bd80 pop {r7, pc} + 8001666: 0018 movs r0, r3 + 8001668: 46bd mov sp, r7 + 800166a: b004 add sp, #16 + 800166c: bd80 pop {r7, pc} -08000bc2 : +0800166e : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 8000bc2: b580 push {r7, lr} - 8000bc4: b082 sub sp, #8 - 8000bc6: af00 add r7, sp, #0 - 8000bc8: 6078 str r0, [r7, #4] - 8000bca: 0008 movs r0, r1 - 8000bcc: 0011 movs r1, r2 - 8000bce: 1cbb adds r3, r7, #2 - 8000bd0: 1c02 adds r2, r0, #0 - 8000bd2: 801a strh r2, [r3, #0] - 8000bd4: 1c7b adds r3, r7, #1 - 8000bd6: 1c0a adds r2, r1, #0 - 8000bd8: 701a strb r2, [r3, #0] + 800166e: b580 push {r7, lr} + 8001670: b082 sub sp, #8 + 8001672: af00 add r7, sp, #0 + 8001674: 6078 str r0, [r7, #4] + 8001676: 0008 movs r0, r1 + 8001678: 0011 movs r1, r2 + 800167a: 1cbb adds r3, r7, #2 + 800167c: 1c02 adds r2, r0, #0 + 800167e: 801a strh r2, [r3, #0] + 8001680: 1c7b adds r3, r7, #1 + 8001682: 1c0a adds r2, r1, #0 + 8001684: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 8000bda: 1c7b adds r3, r7, #1 - 8000bdc: 781b ldrb r3, [r3, #0] - 8000bde: 2b00 cmp r3, #0 - 8000be0: d004 beq.n 8000bec + 8001686: 1c7b adds r3, r7, #1 + 8001688: 781b ldrb r3, [r3, #0] + 800168a: 2b00 cmp r3, #0 + 800168c: d004 beq.n 8001698 { GPIOx->BSRR = (uint32_t)GPIO_Pin; - 8000be2: 1cbb adds r3, r7, #2 - 8000be4: 881a ldrh r2, [r3, #0] - 8000be6: 687b ldr r3, [r7, #4] - 8000be8: 619a str r2, [r3, #24] + 800168e: 1cbb adds r3, r7, #2 + 8001690: 881a ldrh r2, [r3, #0] + 8001692: 687b ldr r3, [r7, #4] + 8001694: 619a str r2, [r3, #24] } else { GPIOx->BRR = (uint32_t)GPIO_Pin; } } - 8000bea: e003 b.n 8000bf4 + 8001696: e003 b.n 80016a0 GPIOx->BRR = (uint32_t)GPIO_Pin; - 8000bec: 1cbb adds r3, r7, #2 - 8000bee: 881a ldrh r2, [r3, #0] - 8000bf0: 687b ldr r3, [r7, #4] - 8000bf2: 629a str r2, [r3, #40] ; 0x28 + 8001698: 1cbb adds r3, r7, #2 + 800169a: 881a ldrh r2, [r3, #0] + 800169c: 687b ldr r3, [r7, #4] + 800169e: 629a str r2, [r3, #40] ; 0x28 } - 8000bf4: 46c0 nop ; (mov r8, r8) - 8000bf6: 46bd mov sp, r7 - 8000bf8: b002 add sp, #8 - 8000bfa: bd80 pop {r7, pc} + 80016a0: 46c0 nop ; (mov r8, r8) + 80016a2: 46bd mov sp, r7 + 80016a4: b002 add sp, #8 + 80016a6: bd80 pop {r7, pc} -08000bfc : +080016a8 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8000bfc: b580 push {r7, lr} - 8000bfe: b088 sub sp, #32 - 8000c00: af00 add r7, sp, #0 - 8000c02: 6078 str r0, [r7, #4] + 80016a8: b580 push {r7, lr} + 80016aa: b088 sub sp, #32 + 80016ac: af00 add r7, sp, #0 + 80016ae: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; uint32_t pll_config2; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) - 8000c04: 687b ldr r3, [r7, #4] - 8000c06: 2b00 cmp r3, #0 - 8000c08: d101 bne.n 8000c0e + 80016b0: 687b ldr r3, [r7, #4] + 80016b2: 2b00 cmp r3, #0 + 80016b4: d101 bne.n 80016ba { return HAL_ERROR; - 8000c0a: 2301 movs r3, #1 - 8000c0c: e301 b.n 8001212 + 80016b6: 2301 movs r3, #1 + 80016b8: e301 b.n 8001cbe /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 8000c0e: 687b ldr r3, [r7, #4] - 8000c10: 681b ldr r3, [r3, #0] - 8000c12: 2201 movs r2, #1 - 8000c14: 4013 ands r3, r2 - 8000c16: d100 bne.n 8000c1a - 8000c18: e08d b.n 8000d36 + 80016ba: 687b ldr r3, [r7, #4] + 80016bc: 681b ldr r3, [r3, #0] + 80016be: 2201 movs r2, #1 + 80016c0: 4013 ands r3, r2 + 80016c2: d100 bne.n 80016c6 + 80016c4: e08d b.n 80017e2 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) - 8000c1a: 4bc3 ldr r3, [pc, #780] ; (8000f28 ) - 8000c1c: 685b ldr r3, [r3, #4] - 8000c1e: 220c movs r2, #12 - 8000c20: 4013 ands r3, r2 - 8000c22: 2b04 cmp r3, #4 - 8000c24: d00e beq.n 8000c44 + 80016c6: 4bc3 ldr r3, [pc, #780] ; (80019d4 ) + 80016c8: 685b ldr r3, [r3, #4] + 80016ca: 220c movs r2, #12 + 80016cc: 4013 ands r3, r2 + 80016ce: 2b04 cmp r3, #4 + 80016d0: d00e beq.n 80016f0 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) - 8000c26: 4bc0 ldr r3, [pc, #768] ; (8000f28 ) - 8000c28: 685b ldr r3, [r3, #4] - 8000c2a: 220c movs r2, #12 - 8000c2c: 4013 ands r3, r2 - 8000c2e: 2b08 cmp r3, #8 - 8000c30: d116 bne.n 8000c60 - 8000c32: 4bbd ldr r3, [pc, #756] ; (8000f28 ) - 8000c34: 685a ldr r2, [r3, #4] - 8000c36: 2380 movs r3, #128 ; 0x80 - 8000c38: 025b lsls r3, r3, #9 - 8000c3a: 401a ands r2, r3 - 8000c3c: 2380 movs r3, #128 ; 0x80 - 8000c3e: 025b lsls r3, r3, #9 - 8000c40: 429a cmp r2, r3 - 8000c42: d10d bne.n 8000c60 + 80016d2: 4bc0 ldr r3, [pc, #768] ; (80019d4 ) + 80016d4: 685b ldr r3, [r3, #4] + 80016d6: 220c movs r2, #12 + 80016d8: 4013 ands r3, r2 + 80016da: 2b08 cmp r3, #8 + 80016dc: d116 bne.n 800170c + 80016de: 4bbd ldr r3, [pc, #756] ; (80019d4 ) + 80016e0: 685a ldr r2, [r3, #4] + 80016e2: 2380 movs r3, #128 ; 0x80 + 80016e4: 025b lsls r3, r3, #9 + 80016e6: 401a ands r2, r3 + 80016e8: 2380 movs r3, #128 ; 0x80 + 80016ea: 025b lsls r3, r3, #9 + 80016ec: 429a cmp r2, r3 + 80016ee: d10d bne.n 800170c { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8000c44: 4bb8 ldr r3, [pc, #736] ; (8000f28 ) - 8000c46: 681a ldr r2, [r3, #0] - 8000c48: 2380 movs r3, #128 ; 0x80 - 8000c4a: 029b lsls r3, r3, #10 - 8000c4c: 4013 ands r3, r2 - 8000c4e: d100 bne.n 8000c52 - 8000c50: e070 b.n 8000d34 - 8000c52: 687b ldr r3, [r7, #4] - 8000c54: 685b ldr r3, [r3, #4] - 8000c56: 2b00 cmp r3, #0 - 8000c58: d000 beq.n 8000c5c - 8000c5a: e06b b.n 8000d34 + 80016f0: 4bb8 ldr r3, [pc, #736] ; (80019d4 ) + 80016f2: 681a ldr r2, [r3, #0] + 80016f4: 2380 movs r3, #128 ; 0x80 + 80016f6: 029b lsls r3, r3, #10 + 80016f8: 4013 ands r3, r2 + 80016fa: d100 bne.n 80016fe + 80016fc: e070 b.n 80017e0 + 80016fe: 687b ldr r3, [r7, #4] + 8001700: 685b ldr r3, [r3, #4] + 8001702: 2b00 cmp r3, #0 + 8001704: d000 beq.n 8001708 + 8001706: e06b b.n 80017e0 { return HAL_ERROR; - 8000c5c: 2301 movs r3, #1 - 8000c5e: e2d8 b.n 8001212 + 8001708: 2301 movs r3, #1 + 800170a: e2d8 b.n 8001cbe } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8000c60: 687b ldr r3, [r7, #4] - 8000c62: 685b ldr r3, [r3, #4] - 8000c64: 2b01 cmp r3, #1 - 8000c66: d107 bne.n 8000c78 - 8000c68: 4baf ldr r3, [pc, #700] ; (8000f28 ) - 8000c6a: 681a ldr r2, [r3, #0] - 8000c6c: 4bae ldr r3, [pc, #696] ; (8000f28 ) - 8000c6e: 2180 movs r1, #128 ; 0x80 - 8000c70: 0249 lsls r1, r1, #9 - 8000c72: 430a orrs r2, r1 - 8000c74: 601a str r2, [r3, #0] - 8000c76: e02f b.n 8000cd8 - 8000c78: 687b ldr r3, [r7, #4] - 8000c7a: 685b ldr r3, [r3, #4] - 8000c7c: 2b00 cmp r3, #0 - 8000c7e: d10c bne.n 8000c9a - 8000c80: 4ba9 ldr r3, [pc, #676] ; (8000f28 ) - 8000c82: 681a ldr r2, [r3, #0] - 8000c84: 4ba8 ldr r3, [pc, #672] ; (8000f28 ) - 8000c86: 49a9 ldr r1, [pc, #676] ; (8000f2c ) - 8000c88: 400a ands r2, r1 - 8000c8a: 601a str r2, [r3, #0] - 8000c8c: 4ba6 ldr r3, [pc, #664] ; (8000f28 ) - 8000c8e: 681a ldr r2, [r3, #0] - 8000c90: 4ba5 ldr r3, [pc, #660] ; (8000f28 ) - 8000c92: 49a7 ldr r1, [pc, #668] ; (8000f30 ) - 8000c94: 400a ands r2, r1 - 8000c96: 601a str r2, [r3, #0] - 8000c98: e01e b.n 8000cd8 - 8000c9a: 687b ldr r3, [r7, #4] - 8000c9c: 685b ldr r3, [r3, #4] - 8000c9e: 2b05 cmp r3, #5 - 8000ca0: d10e bne.n 8000cc0 - 8000ca2: 4ba1 ldr r3, [pc, #644] ; (8000f28 ) - 8000ca4: 681a ldr r2, [r3, #0] - 8000ca6: 4ba0 ldr r3, [pc, #640] ; (8000f28 ) - 8000ca8: 2180 movs r1, #128 ; 0x80 - 8000caa: 02c9 lsls r1, r1, #11 - 8000cac: 430a orrs r2, r1 - 8000cae: 601a str r2, [r3, #0] - 8000cb0: 4b9d ldr r3, [pc, #628] ; (8000f28 ) - 8000cb2: 681a ldr r2, [r3, #0] - 8000cb4: 4b9c ldr r3, [pc, #624] ; (8000f28 ) - 8000cb6: 2180 movs r1, #128 ; 0x80 - 8000cb8: 0249 lsls r1, r1, #9 - 8000cba: 430a orrs r2, r1 - 8000cbc: 601a str r2, [r3, #0] - 8000cbe: e00b b.n 8000cd8 - 8000cc0: 4b99 ldr r3, [pc, #612] ; (8000f28 ) - 8000cc2: 681a ldr r2, [r3, #0] - 8000cc4: 4b98 ldr r3, [pc, #608] ; (8000f28 ) - 8000cc6: 4999 ldr r1, [pc, #612] ; (8000f2c ) - 8000cc8: 400a ands r2, r1 - 8000cca: 601a str r2, [r3, #0] - 8000ccc: 4b96 ldr r3, [pc, #600] ; (8000f28 ) - 8000cce: 681a ldr r2, [r3, #0] - 8000cd0: 4b95 ldr r3, [pc, #596] ; (8000f28 ) - 8000cd2: 4997 ldr r1, [pc, #604] ; (8000f30 ) - 8000cd4: 400a ands r2, r1 - 8000cd6: 601a str r2, [r3, #0] + 800170c: 687b ldr r3, [r7, #4] + 800170e: 685b ldr r3, [r3, #4] + 8001710: 2b01 cmp r3, #1 + 8001712: d107 bne.n 8001724 + 8001714: 4baf ldr r3, [pc, #700] ; (80019d4 ) + 8001716: 681a ldr r2, [r3, #0] + 8001718: 4bae ldr r3, [pc, #696] ; (80019d4 ) + 800171a: 2180 movs r1, #128 ; 0x80 + 800171c: 0249 lsls r1, r1, #9 + 800171e: 430a orrs r2, r1 + 8001720: 601a str r2, [r3, #0] + 8001722: e02f b.n 8001784 + 8001724: 687b ldr r3, [r7, #4] + 8001726: 685b ldr r3, [r3, #4] + 8001728: 2b00 cmp r3, #0 + 800172a: d10c bne.n 8001746 + 800172c: 4ba9 ldr r3, [pc, #676] ; (80019d4 ) + 800172e: 681a ldr r2, [r3, #0] + 8001730: 4ba8 ldr r3, [pc, #672] ; (80019d4 ) + 8001732: 49a9 ldr r1, [pc, #676] ; (80019d8 ) + 8001734: 400a ands r2, r1 + 8001736: 601a str r2, [r3, #0] + 8001738: 4ba6 ldr r3, [pc, #664] ; (80019d4 ) + 800173a: 681a ldr r2, [r3, #0] + 800173c: 4ba5 ldr r3, [pc, #660] ; (80019d4 ) + 800173e: 49a7 ldr r1, [pc, #668] ; (80019dc ) + 8001740: 400a ands r2, r1 + 8001742: 601a str r2, [r3, #0] + 8001744: e01e b.n 8001784 + 8001746: 687b ldr r3, [r7, #4] + 8001748: 685b ldr r3, [r3, #4] + 800174a: 2b05 cmp r3, #5 + 800174c: d10e bne.n 800176c + 800174e: 4ba1 ldr r3, [pc, #644] ; (80019d4 ) + 8001750: 681a ldr r2, [r3, #0] + 8001752: 4ba0 ldr r3, [pc, #640] ; (80019d4 ) + 8001754: 2180 movs r1, #128 ; 0x80 + 8001756: 02c9 lsls r1, r1, #11 + 8001758: 430a orrs r2, r1 + 800175a: 601a str r2, [r3, #0] + 800175c: 4b9d ldr r3, [pc, #628] ; (80019d4 ) + 800175e: 681a ldr r2, [r3, #0] + 8001760: 4b9c ldr r3, [pc, #624] ; (80019d4 ) + 8001762: 2180 movs r1, #128 ; 0x80 + 8001764: 0249 lsls r1, r1, #9 + 8001766: 430a orrs r2, r1 + 8001768: 601a str r2, [r3, #0] + 800176a: e00b b.n 8001784 + 800176c: 4b99 ldr r3, [pc, #612] ; (80019d4 ) + 800176e: 681a ldr r2, [r3, #0] + 8001770: 4b98 ldr r3, [pc, #608] ; (80019d4 ) + 8001772: 4999 ldr r1, [pc, #612] ; (80019d8 ) + 8001774: 400a ands r2, r1 + 8001776: 601a str r2, [r3, #0] + 8001778: 4b96 ldr r3, [pc, #600] ; (80019d4 ) + 800177a: 681a ldr r2, [r3, #0] + 800177c: 4b95 ldr r3, [pc, #596] ; (80019d4 ) + 800177e: 4997 ldr r1, [pc, #604] ; (80019dc ) + 8001780: 400a ands r2, r1 + 8001782: 601a str r2, [r3, #0] /* Check the HSE State */ if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 8000cd8: 687b ldr r3, [r7, #4] - 8000cda: 685b ldr r3, [r3, #4] - 8000cdc: 2b00 cmp r3, #0 - 8000cde: d014 beq.n 8000d0a + 8001784: 687b ldr r3, [r7, #4] + 8001786: 685b ldr r3, [r3, #4] + 8001788: 2b00 cmp r3, #0 + 800178a: d014 beq.n 80017b6 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000ce0: f7ff fd24 bl 800072c - 8000ce4: 0003 movs r3, r0 - 8000ce6: 61bb str r3, [r7, #24] + 800178c: f7ff f874 bl 8000878 + 8001790: 0003 movs r3, r0 + 8001792: 61bb str r3, [r7, #24] /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8000ce8: e008 b.n 8000cfc + 8001794: e008 b.n 80017a8 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8000cea: f7ff fd1f bl 800072c - 8000cee: 0002 movs r2, r0 - 8000cf0: 69bb ldr r3, [r7, #24] - 8000cf2: 1ad3 subs r3, r2, r3 - 8000cf4: 2b64 cmp r3, #100 ; 0x64 - 8000cf6: d901 bls.n 8000cfc + 8001796: f7ff f86f bl 8000878 + 800179a: 0002 movs r2, r0 + 800179c: 69bb ldr r3, [r7, #24] + 800179e: 1ad3 subs r3, r2, r3 + 80017a0: 2b64 cmp r3, #100 ; 0x64 + 80017a2: d901 bls.n 80017a8 { return HAL_TIMEOUT; - 8000cf8: 2303 movs r3, #3 - 8000cfa: e28a b.n 8001212 + 80017a4: 2303 movs r3, #3 + 80017a6: e28a b.n 8001cbe while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8000cfc: 4b8a ldr r3, [pc, #552] ; (8000f28 ) - 8000cfe: 681a ldr r2, [r3, #0] - 8000d00: 2380 movs r3, #128 ; 0x80 - 8000d02: 029b lsls r3, r3, #10 - 8000d04: 4013 ands r3, r2 - 8000d06: d0f0 beq.n 8000cea - 8000d08: e015 b.n 8000d36 + 80017a8: 4b8a ldr r3, [pc, #552] ; (80019d4 ) + 80017aa: 681a ldr r2, [r3, #0] + 80017ac: 2380 movs r3, #128 ; 0x80 + 80017ae: 029b lsls r3, r3, #10 + 80017b0: 4013 ands r3, r2 + 80017b2: d0f0 beq.n 8001796 + 80017b4: e015 b.n 80017e2 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000d0a: f7ff fd0f bl 800072c - 8000d0e: 0003 movs r3, r0 - 8000d10: 61bb str r3, [r7, #24] + 80017b6: f7ff f85f bl 8000878 + 80017ba: 0003 movs r3, r0 + 80017bc: 61bb str r3, [r7, #24] /* Wait till HSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8000d12: e008 b.n 8000d26 + 80017be: e008 b.n 80017d2 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8000d14: f7ff fd0a bl 800072c - 8000d18: 0002 movs r2, r0 - 8000d1a: 69bb ldr r3, [r7, #24] - 8000d1c: 1ad3 subs r3, r2, r3 - 8000d1e: 2b64 cmp r3, #100 ; 0x64 - 8000d20: d901 bls.n 8000d26 + 80017c0: f7ff f85a bl 8000878 + 80017c4: 0002 movs r2, r0 + 80017c6: 69bb ldr r3, [r7, #24] + 80017c8: 1ad3 subs r3, r2, r3 + 80017ca: 2b64 cmp r3, #100 ; 0x64 + 80017cc: d901 bls.n 80017d2 { return HAL_TIMEOUT; - 8000d22: 2303 movs r3, #3 - 8000d24: e275 b.n 8001212 + 80017ce: 2303 movs r3, #3 + 80017d0: e275 b.n 8001cbe while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8000d26: 4b80 ldr r3, [pc, #512] ; (8000f28 ) - 8000d28: 681a ldr r2, [r3, #0] - 8000d2a: 2380 movs r3, #128 ; 0x80 - 8000d2c: 029b lsls r3, r3, #10 - 8000d2e: 4013 ands r3, r2 - 8000d30: d1f0 bne.n 8000d14 - 8000d32: e000 b.n 8000d36 + 80017d2: 4b80 ldr r3, [pc, #512] ; (80019d4 ) + 80017d4: 681a ldr r2, [r3, #0] + 80017d6: 2380 movs r3, #128 ; 0x80 + 80017d8: 029b lsls r3, r3, #10 + 80017da: 4013 ands r3, r2 + 80017dc: d1f0 bne.n 80017c0 + 80017de: e000 b.n 80017e2 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8000d34: 46c0 nop ; (mov r8, r8) + 80017e0: 46c0 nop ; (mov r8, r8) } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8000d36: 687b ldr r3, [r7, #4] - 8000d38: 681b ldr r3, [r3, #0] - 8000d3a: 2202 movs r2, #2 - 8000d3c: 4013 ands r3, r2 - 8000d3e: d100 bne.n 8000d42 - 8000d40: e069 b.n 8000e16 + 80017e2: 687b ldr r3, [r7, #4] + 80017e4: 681b ldr r3, [r3, #0] + 80017e6: 2202 movs r2, #2 + 80017e8: 4013 ands r3, r2 + 80017ea: d100 bne.n 80017ee + 80017ec: e069 b.n 80018c2 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) - 8000d42: 4b79 ldr r3, [pc, #484] ; (8000f28 ) - 8000d44: 685b ldr r3, [r3, #4] - 8000d46: 220c movs r2, #12 - 8000d48: 4013 ands r3, r2 - 8000d4a: d00b beq.n 8000d64 + 80017ee: 4b79 ldr r3, [pc, #484] ; (80019d4 ) + 80017f0: 685b ldr r3, [r3, #4] + 80017f2: 220c movs r2, #12 + 80017f4: 4013 ands r3, r2 + 80017f6: d00b beq.n 8001810 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI))) - 8000d4c: 4b76 ldr r3, [pc, #472] ; (8000f28 ) - 8000d4e: 685b ldr r3, [r3, #4] - 8000d50: 220c movs r2, #12 - 8000d52: 4013 ands r3, r2 - 8000d54: 2b08 cmp r3, #8 - 8000d56: d11c bne.n 8000d92 - 8000d58: 4b73 ldr r3, [pc, #460] ; (8000f28 ) - 8000d5a: 685a ldr r2, [r3, #4] - 8000d5c: 2380 movs r3, #128 ; 0x80 - 8000d5e: 025b lsls r3, r3, #9 - 8000d60: 4013 ands r3, r2 - 8000d62: d116 bne.n 8000d92 + 80017f8: 4b76 ldr r3, [pc, #472] ; (80019d4 ) + 80017fa: 685b ldr r3, [r3, #4] + 80017fc: 220c movs r2, #12 + 80017fe: 4013 ands r3, r2 + 8001800: 2b08 cmp r3, #8 + 8001802: d11c bne.n 800183e + 8001804: 4b73 ldr r3, [pc, #460] ; (80019d4 ) + 8001806: 685a ldr r2, [r3, #4] + 8001808: 2380 movs r3, #128 ; 0x80 + 800180a: 025b lsls r3, r3, #9 + 800180c: 4013 ands r3, r2 + 800180e: d116 bne.n 800183e { /* When HSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8000d64: 4b70 ldr r3, [pc, #448] ; (8000f28 ) - 8000d66: 681b ldr r3, [r3, #0] - 8000d68: 2202 movs r2, #2 - 8000d6a: 4013 ands r3, r2 - 8000d6c: d005 beq.n 8000d7a - 8000d6e: 687b ldr r3, [r7, #4] - 8000d70: 68db ldr r3, [r3, #12] - 8000d72: 2b01 cmp r3, #1 - 8000d74: d001 beq.n 8000d7a + 8001810: 4b70 ldr r3, [pc, #448] ; (80019d4 ) + 8001812: 681b ldr r3, [r3, #0] + 8001814: 2202 movs r2, #2 + 8001816: 4013 ands r3, r2 + 8001818: d005 beq.n 8001826 + 800181a: 687b ldr r3, [r7, #4] + 800181c: 68db ldr r3, [r3, #12] + 800181e: 2b01 cmp r3, #1 + 8001820: d001 beq.n 8001826 { return HAL_ERROR; - 8000d76: 2301 movs r3, #1 - 8000d78: e24b b.n 8001212 + 8001822: 2301 movs r3, #1 + 8001824: e24b b.n 8001cbe } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8000d7a: 4b6b ldr r3, [pc, #428] ; (8000f28 ) - 8000d7c: 681b ldr r3, [r3, #0] - 8000d7e: 22f8 movs r2, #248 ; 0xf8 - 8000d80: 4393 bics r3, r2 - 8000d82: 0019 movs r1, r3 - 8000d84: 687b ldr r3, [r7, #4] - 8000d86: 691b ldr r3, [r3, #16] - 8000d88: 00da lsls r2, r3, #3 - 8000d8a: 4b67 ldr r3, [pc, #412] ; (8000f28 ) - 8000d8c: 430a orrs r2, r1 - 8000d8e: 601a str r2, [r3, #0] + 8001826: 4b6b ldr r3, [pc, #428] ; (80019d4 ) + 8001828: 681b ldr r3, [r3, #0] + 800182a: 22f8 movs r2, #248 ; 0xf8 + 800182c: 4393 bics r3, r2 + 800182e: 0019 movs r1, r3 + 8001830: 687b ldr r3, [r7, #4] + 8001832: 691b ldr r3, [r3, #16] + 8001834: 00da lsls r2, r3, #3 + 8001836: 4b67 ldr r3, [pc, #412] ; (80019d4 ) + 8001838: 430a orrs r2, r1 + 800183a: 601a str r2, [r3, #0] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8000d90: e041 b.n 8000e16 + 800183c: e041 b.n 80018c2 } } else { /* Check the HSI State */ if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 8000d92: 687b ldr r3, [r7, #4] - 8000d94: 68db ldr r3, [r3, #12] - 8000d96: 2b00 cmp r3, #0 - 8000d98: d024 beq.n 8000de4 + 800183e: 687b ldr r3, [r7, #4] + 8001840: 68db ldr r3, [r3, #12] + 8001842: 2b00 cmp r3, #0 + 8001844: d024 beq.n 8001890 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); - 8000d9a: 4b63 ldr r3, [pc, #396] ; (8000f28 ) - 8000d9c: 681a ldr r2, [r3, #0] - 8000d9e: 4b62 ldr r3, [pc, #392] ; (8000f28 ) - 8000da0: 2101 movs r1, #1 - 8000da2: 430a orrs r2, r1 - 8000da4: 601a str r2, [r3, #0] + 8001846: 4b63 ldr r3, [pc, #396] ; (80019d4 ) + 8001848: 681a ldr r2, [r3, #0] + 800184a: 4b62 ldr r3, [pc, #392] ; (80019d4 ) + 800184c: 2101 movs r1, #1 + 800184e: 430a orrs r2, r1 + 8001850: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000da6: f7ff fcc1 bl 800072c - 8000daa: 0003 movs r3, r0 - 8000dac: 61bb str r3, [r7, #24] + 8001852: f7ff f811 bl 8000878 + 8001856: 0003 movs r3, r0 + 8001858: 61bb str r3, [r7, #24] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8000dae: e008 b.n 8000dc2 + 800185a: e008 b.n 800186e { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 8000db0: f7ff fcbc bl 800072c - 8000db4: 0002 movs r2, r0 - 8000db6: 69bb ldr r3, [r7, #24] - 8000db8: 1ad3 subs r3, r2, r3 - 8000dba: 2b02 cmp r3, #2 - 8000dbc: d901 bls.n 8000dc2 + 800185c: f7ff f80c bl 8000878 + 8001860: 0002 movs r2, r0 + 8001862: 69bb ldr r3, [r7, #24] + 8001864: 1ad3 subs r3, r2, r3 + 8001866: 2b02 cmp r3, #2 + 8001868: d901 bls.n 800186e { return HAL_TIMEOUT; - 8000dbe: 2303 movs r3, #3 - 8000dc0: e227 b.n 8001212 + 800186a: 2303 movs r3, #3 + 800186c: e227 b.n 8001cbe while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8000dc2: 4b59 ldr r3, [pc, #356] ; (8000f28 ) - 8000dc4: 681b ldr r3, [r3, #0] - 8000dc6: 2202 movs r2, #2 - 8000dc8: 4013 ands r3, r2 - 8000dca: d0f1 beq.n 8000db0 + 800186e: 4b59 ldr r3, [pc, #356] ; (80019d4 ) + 8001870: 681b ldr r3, [r3, #0] + 8001872: 2202 movs r2, #2 + 8001874: 4013 ands r3, r2 + 8001876: d0f1 beq.n 800185c } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8000dcc: 4b56 ldr r3, [pc, #344] ; (8000f28 ) - 8000dce: 681b ldr r3, [r3, #0] - 8000dd0: 22f8 movs r2, #248 ; 0xf8 - 8000dd2: 4393 bics r3, r2 - 8000dd4: 0019 movs r1, r3 - 8000dd6: 687b ldr r3, [r7, #4] - 8000dd8: 691b ldr r3, [r3, #16] - 8000dda: 00da lsls r2, r3, #3 - 8000ddc: 4b52 ldr r3, [pc, #328] ; (8000f28 ) - 8000dde: 430a orrs r2, r1 - 8000de0: 601a str r2, [r3, #0] - 8000de2: e018 b.n 8000e16 + 8001878: 4b56 ldr r3, [pc, #344] ; (80019d4 ) + 800187a: 681b ldr r3, [r3, #0] + 800187c: 22f8 movs r2, #248 ; 0xf8 + 800187e: 4393 bics r3, r2 + 8001880: 0019 movs r1, r3 + 8001882: 687b ldr r3, [r7, #4] + 8001884: 691b ldr r3, [r3, #16] + 8001886: 00da lsls r2, r3, #3 + 8001888: 4b52 ldr r3, [pc, #328] ; (80019d4 ) + 800188a: 430a orrs r2, r1 + 800188c: 601a str r2, [r3, #0] + 800188e: e018 b.n 80018c2 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 8000de4: 4b50 ldr r3, [pc, #320] ; (8000f28 ) - 8000de6: 681a ldr r2, [r3, #0] - 8000de8: 4b4f ldr r3, [pc, #316] ; (8000f28 ) - 8000dea: 2101 movs r1, #1 - 8000dec: 438a bics r2, r1 - 8000dee: 601a str r2, [r3, #0] + 8001890: 4b50 ldr r3, [pc, #320] ; (80019d4 ) + 8001892: 681a ldr r2, [r3, #0] + 8001894: 4b4f ldr r3, [pc, #316] ; (80019d4 ) + 8001896: 2101 movs r1, #1 + 8001898: 438a bics r2, r1 + 800189a: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000df0: f7ff fc9c bl 800072c - 8000df4: 0003 movs r3, r0 - 8000df6: 61bb str r3, [r7, #24] + 800189c: f7fe ffec bl 8000878 + 80018a0: 0003 movs r3, r0 + 80018a2: 61bb str r3, [r7, #24] /* Wait till HSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 8000df8: e008 b.n 8000e0c + 80018a4: e008 b.n 80018b8 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 8000dfa: f7ff fc97 bl 800072c - 8000dfe: 0002 movs r2, r0 - 8000e00: 69bb ldr r3, [r7, #24] - 8000e02: 1ad3 subs r3, r2, r3 - 8000e04: 2b02 cmp r3, #2 - 8000e06: d901 bls.n 8000e0c + 80018a6: f7fe ffe7 bl 8000878 + 80018aa: 0002 movs r2, r0 + 80018ac: 69bb ldr r3, [r7, #24] + 80018ae: 1ad3 subs r3, r2, r3 + 80018b0: 2b02 cmp r3, #2 + 80018b2: d901 bls.n 80018b8 { return HAL_TIMEOUT; - 8000e08: 2303 movs r3, #3 - 8000e0a: e202 b.n 8001212 + 80018b4: 2303 movs r3, #3 + 80018b6: e202 b.n 8001cbe while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 8000e0c: 4b46 ldr r3, [pc, #280] ; (8000f28 ) - 8000e0e: 681b ldr r3, [r3, #0] - 8000e10: 2202 movs r2, #2 - 8000e12: 4013 ands r3, r2 - 8000e14: d1f1 bne.n 8000dfa + 80018b8: 4b46 ldr r3, [pc, #280] ; (80019d4 ) + 80018ba: 681b ldr r3, [r3, #0] + 80018bc: 2202 movs r2, #2 + 80018be: 4013 ands r3, r2 + 80018c0: d1f1 bne.n 80018a6 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 8000e16: 687b ldr r3, [r7, #4] - 8000e18: 681b ldr r3, [r3, #0] - 8000e1a: 2208 movs r2, #8 - 8000e1c: 4013 ands r3, r2 - 8000e1e: d036 beq.n 8000e8e + 80018c2: 687b ldr r3, [r7, #4] + 80018c4: 681b ldr r3, [r3, #0] + 80018c6: 2208 movs r2, #8 + 80018c8: 4013 ands r3, r2 + 80018ca: d036 beq.n 800193a { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 8000e20: 687b ldr r3, [r7, #4] - 8000e22: 69db ldr r3, [r3, #28] - 8000e24: 2b00 cmp r3, #0 - 8000e26: d019 beq.n 8000e5c + 80018cc: 687b ldr r3, [r7, #4] + 80018ce: 69db ldr r3, [r3, #28] + 80018d0: 2b00 cmp r3, #0 + 80018d2: d019 beq.n 8001908 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 8000e28: 4b3f ldr r3, [pc, #252] ; (8000f28 ) - 8000e2a: 6a5a ldr r2, [r3, #36] ; 0x24 - 8000e2c: 4b3e ldr r3, [pc, #248] ; (8000f28 ) - 8000e2e: 2101 movs r1, #1 - 8000e30: 430a orrs r2, r1 - 8000e32: 625a str r2, [r3, #36] ; 0x24 + 80018d4: 4b3f ldr r3, [pc, #252] ; (80019d4 ) + 80018d6: 6a5a ldr r2, [r3, #36] ; 0x24 + 80018d8: 4b3e ldr r3, [pc, #248] ; (80019d4 ) + 80018da: 2101 movs r1, #1 + 80018dc: 430a orrs r2, r1 + 80018de: 625a str r2, [r3, #36] ; 0x24 /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000e34: f7ff fc7a bl 800072c - 8000e38: 0003 movs r3, r0 - 8000e3a: 61bb str r3, [r7, #24] + 80018e0: f7fe ffca bl 8000878 + 80018e4: 0003 movs r3, r0 + 80018e6: 61bb str r3, [r7, #24] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8000e3c: e008 b.n 8000e50 + 80018e8: e008 b.n 80018fc { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 8000e3e: f7ff fc75 bl 800072c - 8000e42: 0002 movs r2, r0 - 8000e44: 69bb ldr r3, [r7, #24] - 8000e46: 1ad3 subs r3, r2, r3 - 8000e48: 2b02 cmp r3, #2 - 8000e4a: d901 bls.n 8000e50 + 80018ea: f7fe ffc5 bl 8000878 + 80018ee: 0002 movs r2, r0 + 80018f0: 69bb ldr r3, [r7, #24] + 80018f2: 1ad3 subs r3, r2, r3 + 80018f4: 2b02 cmp r3, #2 + 80018f6: d901 bls.n 80018fc { return HAL_TIMEOUT; - 8000e4c: 2303 movs r3, #3 - 8000e4e: e1e0 b.n 8001212 + 80018f8: 2303 movs r3, #3 + 80018fa: e1e0 b.n 8001cbe while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8000e50: 4b35 ldr r3, [pc, #212] ; (8000f28 ) - 8000e52: 6a5b ldr r3, [r3, #36] ; 0x24 - 8000e54: 2202 movs r2, #2 - 8000e56: 4013 ands r3, r2 - 8000e58: d0f1 beq.n 8000e3e - 8000e5a: e018 b.n 8000e8e + 80018fc: 4b35 ldr r3, [pc, #212] ; (80019d4 ) + 80018fe: 6a5b ldr r3, [r3, #36] ; 0x24 + 8001900: 2202 movs r2, #2 + 8001902: 4013 ands r3, r2 + 8001904: d0f1 beq.n 80018ea + 8001906: e018 b.n 800193a } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 8000e5c: 4b32 ldr r3, [pc, #200] ; (8000f28 ) - 8000e5e: 6a5a ldr r2, [r3, #36] ; 0x24 - 8000e60: 4b31 ldr r3, [pc, #196] ; (8000f28 ) - 8000e62: 2101 movs r1, #1 - 8000e64: 438a bics r2, r1 - 8000e66: 625a str r2, [r3, #36] ; 0x24 + 8001908: 4b32 ldr r3, [pc, #200] ; (80019d4 ) + 800190a: 6a5a ldr r2, [r3, #36] ; 0x24 + 800190c: 4b31 ldr r3, [pc, #196] ; (80019d4 ) + 800190e: 2101 movs r1, #1 + 8001910: 438a bics r2, r1 + 8001912: 625a str r2, [r3, #36] ; 0x24 /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000e68: f7ff fc60 bl 800072c - 8000e6c: 0003 movs r3, r0 - 8000e6e: 61bb str r3, [r7, #24] + 8001914: f7fe ffb0 bl 8000878 + 8001918: 0003 movs r3, r0 + 800191a: 61bb str r3, [r7, #24] /* Wait till LSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8000e70: e008 b.n 8000e84 + 800191c: e008 b.n 8001930 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 8000e72: f7ff fc5b bl 800072c - 8000e76: 0002 movs r2, r0 - 8000e78: 69bb ldr r3, [r7, #24] - 8000e7a: 1ad3 subs r3, r2, r3 - 8000e7c: 2b02 cmp r3, #2 - 8000e7e: d901 bls.n 8000e84 + 800191e: f7fe ffab bl 8000878 + 8001922: 0002 movs r2, r0 + 8001924: 69bb ldr r3, [r7, #24] + 8001926: 1ad3 subs r3, r2, r3 + 8001928: 2b02 cmp r3, #2 + 800192a: d901 bls.n 8001930 { return HAL_TIMEOUT; - 8000e80: 2303 movs r3, #3 - 8000e82: e1c6 b.n 8001212 + 800192c: 2303 movs r3, #3 + 800192e: e1c6 b.n 8001cbe while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8000e84: 4b28 ldr r3, [pc, #160] ; (8000f28 ) - 8000e86: 6a5b ldr r3, [r3, #36] ; 0x24 - 8000e88: 2202 movs r2, #2 - 8000e8a: 4013 ands r3, r2 - 8000e8c: d1f1 bne.n 8000e72 + 8001930: 4b28 ldr r3, [pc, #160] ; (80019d4 ) + 8001932: 6a5b ldr r3, [r3, #36] ; 0x24 + 8001934: 2202 movs r2, #2 + 8001936: 4013 ands r3, r2 + 8001938: d1f1 bne.n 800191e } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 8000e8e: 687b ldr r3, [r7, #4] - 8000e90: 681b ldr r3, [r3, #0] - 8000e92: 2204 movs r2, #4 - 8000e94: 4013 ands r3, r2 - 8000e96: d100 bne.n 8000e9a - 8000e98: e0b4 b.n 8001004 + 800193a: 687b ldr r3, [r7, #4] + 800193c: 681b ldr r3, [r3, #0] + 800193e: 2204 movs r2, #4 + 8001940: 4013 ands r3, r2 + 8001942: d100 bne.n 8001946 + 8001944: e0b4 b.n 8001ab0 { FlagStatus pwrclkchanged = RESET; - 8000e9a: 201f movs r0, #31 - 8000e9c: 183b adds r3, r7, r0 - 8000e9e: 2200 movs r2, #0 - 8000ea0: 701a strb r2, [r3, #0] + 8001946: 201f movs r0, #31 + 8001948: 183b adds r3, r7, r0 + 800194a: 2200 movs r2, #0 + 800194c: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8000ea2: 4b21 ldr r3, [pc, #132] ; (8000f28 ) - 8000ea4: 69da ldr r2, [r3, #28] - 8000ea6: 2380 movs r3, #128 ; 0x80 - 8000ea8: 055b lsls r3, r3, #21 - 8000eaa: 4013 ands r3, r2 - 8000eac: d110 bne.n 8000ed0 + 800194e: 4b21 ldr r3, [pc, #132] ; (80019d4 ) + 8001950: 69da ldr r2, [r3, #28] + 8001952: 2380 movs r3, #128 ; 0x80 + 8001954: 055b lsls r3, r3, #21 + 8001956: 4013 ands r3, r2 + 8001958: d110 bne.n 800197c { __HAL_RCC_PWR_CLK_ENABLE(); - 8000eae: 4b1e ldr r3, [pc, #120] ; (8000f28 ) - 8000eb0: 69da ldr r2, [r3, #28] - 8000eb2: 4b1d ldr r3, [pc, #116] ; (8000f28 ) - 8000eb4: 2180 movs r1, #128 ; 0x80 - 8000eb6: 0549 lsls r1, r1, #21 - 8000eb8: 430a orrs r2, r1 - 8000eba: 61da str r2, [r3, #28] - 8000ebc: 4b1a ldr r3, [pc, #104] ; (8000f28 ) - 8000ebe: 69da ldr r2, [r3, #28] - 8000ec0: 2380 movs r3, #128 ; 0x80 - 8000ec2: 055b lsls r3, r3, #21 - 8000ec4: 4013 ands r3, r2 - 8000ec6: 60fb str r3, [r7, #12] - 8000ec8: 68fb ldr r3, [r7, #12] + 800195a: 4b1e ldr r3, [pc, #120] ; (80019d4 ) + 800195c: 69da ldr r2, [r3, #28] + 800195e: 4b1d ldr r3, [pc, #116] ; (80019d4 ) + 8001960: 2180 movs r1, #128 ; 0x80 + 8001962: 0549 lsls r1, r1, #21 + 8001964: 430a orrs r2, r1 + 8001966: 61da str r2, [r3, #28] + 8001968: 4b1a ldr r3, [pc, #104] ; (80019d4 ) + 800196a: 69da ldr r2, [r3, #28] + 800196c: 2380 movs r3, #128 ; 0x80 + 800196e: 055b lsls r3, r3, #21 + 8001970: 4013 ands r3, r2 + 8001972: 60fb str r3, [r7, #12] + 8001974: 68fb ldr r3, [r7, #12] pwrclkchanged = SET; - 8000eca: 183b adds r3, r7, r0 - 8000ecc: 2201 movs r2, #1 - 8000ece: 701a strb r2, [r3, #0] + 8001976: 183b adds r3, r7, r0 + 8001978: 2201 movs r2, #1 + 800197a: 701a strb r2, [r3, #0] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8000ed0: 4b18 ldr r3, [pc, #96] ; (8000f34 ) - 8000ed2: 681a ldr r2, [r3, #0] - 8000ed4: 2380 movs r3, #128 ; 0x80 - 8000ed6: 005b lsls r3, r3, #1 - 8000ed8: 4013 ands r3, r2 - 8000eda: d11a bne.n 8000f12 + 800197c: 4b18 ldr r3, [pc, #96] ; (80019e0 ) + 800197e: 681a ldr r2, [r3, #0] + 8001980: 2380 movs r3, #128 ; 0x80 + 8001982: 005b lsls r3, r3, #1 + 8001984: 4013 ands r3, r2 + 8001986: d11a bne.n 80019be { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 8000edc: 4b15 ldr r3, [pc, #84] ; (8000f34 ) - 8000ede: 681a ldr r2, [r3, #0] - 8000ee0: 4b14 ldr r3, [pc, #80] ; (8000f34 ) - 8000ee2: 2180 movs r1, #128 ; 0x80 - 8000ee4: 0049 lsls r1, r1, #1 - 8000ee6: 430a orrs r2, r1 - 8000ee8: 601a str r2, [r3, #0] + 8001988: 4b15 ldr r3, [pc, #84] ; (80019e0 ) + 800198a: 681a ldr r2, [r3, #0] + 800198c: 4b14 ldr r3, [pc, #80] ; (80019e0 ) + 800198e: 2180 movs r1, #128 ; 0x80 + 8001990: 0049 lsls r1, r1, #1 + 8001992: 430a orrs r2, r1 + 8001994: 601a str r2, [r3, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 8000eea: f7ff fc1f bl 800072c - 8000eee: 0003 movs r3, r0 - 8000ef0: 61bb str r3, [r7, #24] + 8001996: f7fe ff6f bl 8000878 + 800199a: 0003 movs r3, r0 + 800199c: 61bb str r3, [r7, #24] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8000ef2: e008 b.n 8000f06 + 800199e: e008 b.n 80019b2 { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8000ef4: f7ff fc1a bl 800072c - 8000ef8: 0002 movs r2, r0 - 8000efa: 69bb ldr r3, [r7, #24] - 8000efc: 1ad3 subs r3, r2, r3 - 8000efe: 2b64 cmp r3, #100 ; 0x64 - 8000f00: d901 bls.n 8000f06 + 80019a0: f7fe ff6a bl 8000878 + 80019a4: 0002 movs r2, r0 + 80019a6: 69bb ldr r3, [r7, #24] + 80019a8: 1ad3 subs r3, r2, r3 + 80019aa: 2b64 cmp r3, #100 ; 0x64 + 80019ac: d901 bls.n 80019b2 { return HAL_TIMEOUT; - 8000f02: 2303 movs r3, #3 - 8000f04: e185 b.n 8001212 + 80019ae: 2303 movs r3, #3 + 80019b0: e185 b.n 8001cbe while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8000f06: 4b0b ldr r3, [pc, #44] ; (8000f34 ) - 8000f08: 681a ldr r2, [r3, #0] - 8000f0a: 2380 movs r3, #128 ; 0x80 - 8000f0c: 005b lsls r3, r3, #1 - 8000f0e: 4013 ands r3, r2 - 8000f10: d0f0 beq.n 8000ef4 + 80019b2: 4b0b ldr r3, [pc, #44] ; (80019e0 ) + 80019b4: 681a ldr r2, [r3, #0] + 80019b6: 2380 movs r3, #128 ; 0x80 + 80019b8: 005b lsls r3, r3, #1 + 80019ba: 4013 ands r3, r2 + 80019bc: d0f0 beq.n 80019a0 } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 8000f12: 687b ldr r3, [r7, #4] - 8000f14: 689b ldr r3, [r3, #8] - 8000f16: 2b01 cmp r3, #1 - 8000f18: d10e bne.n 8000f38 - 8000f1a: 4b03 ldr r3, [pc, #12] ; (8000f28 ) - 8000f1c: 6a1a ldr r2, [r3, #32] - 8000f1e: 4b02 ldr r3, [pc, #8] ; (8000f28 ) - 8000f20: 2101 movs r1, #1 - 8000f22: 430a orrs r2, r1 - 8000f24: 621a str r2, [r3, #32] - 8000f26: e035 b.n 8000f94 - 8000f28: 40021000 .word 0x40021000 - 8000f2c: fffeffff .word 0xfffeffff - 8000f30: fffbffff .word 0xfffbffff - 8000f34: 40007000 .word 0x40007000 - 8000f38: 687b ldr r3, [r7, #4] - 8000f3a: 689b ldr r3, [r3, #8] - 8000f3c: 2b00 cmp r3, #0 - 8000f3e: d10c bne.n 8000f5a - 8000f40: 4bb6 ldr r3, [pc, #728] ; (800121c ) - 8000f42: 6a1a ldr r2, [r3, #32] - 8000f44: 4bb5 ldr r3, [pc, #724] ; (800121c ) - 8000f46: 2101 movs r1, #1 - 8000f48: 438a bics r2, r1 - 8000f4a: 621a str r2, [r3, #32] - 8000f4c: 4bb3 ldr r3, [pc, #716] ; (800121c ) - 8000f4e: 6a1a ldr r2, [r3, #32] - 8000f50: 4bb2 ldr r3, [pc, #712] ; (800121c ) - 8000f52: 2104 movs r1, #4 - 8000f54: 438a bics r2, r1 - 8000f56: 621a str r2, [r3, #32] - 8000f58: e01c b.n 8000f94 - 8000f5a: 687b ldr r3, [r7, #4] - 8000f5c: 689b ldr r3, [r3, #8] - 8000f5e: 2b05 cmp r3, #5 - 8000f60: d10c bne.n 8000f7c - 8000f62: 4bae ldr r3, [pc, #696] ; (800121c ) - 8000f64: 6a1a ldr r2, [r3, #32] - 8000f66: 4bad ldr r3, [pc, #692] ; (800121c ) - 8000f68: 2104 movs r1, #4 - 8000f6a: 430a orrs r2, r1 - 8000f6c: 621a str r2, [r3, #32] - 8000f6e: 4bab ldr r3, [pc, #684] ; (800121c ) - 8000f70: 6a1a ldr r2, [r3, #32] - 8000f72: 4baa ldr r3, [pc, #680] ; (800121c ) - 8000f74: 2101 movs r1, #1 - 8000f76: 430a orrs r2, r1 - 8000f78: 621a str r2, [r3, #32] - 8000f7a: e00b b.n 8000f94 - 8000f7c: 4ba7 ldr r3, [pc, #668] ; (800121c ) - 8000f7e: 6a1a ldr r2, [r3, #32] - 8000f80: 4ba6 ldr r3, [pc, #664] ; (800121c ) - 8000f82: 2101 movs r1, #1 - 8000f84: 438a bics r2, r1 - 8000f86: 621a str r2, [r3, #32] - 8000f88: 4ba4 ldr r3, [pc, #656] ; (800121c ) - 8000f8a: 6a1a ldr r2, [r3, #32] - 8000f8c: 4ba3 ldr r3, [pc, #652] ; (800121c ) - 8000f8e: 2104 movs r1, #4 - 8000f90: 438a bics r2, r1 - 8000f92: 621a str r2, [r3, #32] + 80019be: 687b ldr r3, [r7, #4] + 80019c0: 689b ldr r3, [r3, #8] + 80019c2: 2b01 cmp r3, #1 + 80019c4: d10e bne.n 80019e4 + 80019c6: 4b03 ldr r3, [pc, #12] ; (80019d4 ) + 80019c8: 6a1a ldr r2, [r3, #32] + 80019ca: 4b02 ldr r3, [pc, #8] ; (80019d4 ) + 80019cc: 2101 movs r1, #1 + 80019ce: 430a orrs r2, r1 + 80019d0: 621a str r2, [r3, #32] + 80019d2: e035 b.n 8001a40 + 80019d4: 40021000 .word 0x40021000 + 80019d8: fffeffff .word 0xfffeffff + 80019dc: fffbffff .word 0xfffbffff + 80019e0: 40007000 .word 0x40007000 + 80019e4: 687b ldr r3, [r7, #4] + 80019e6: 689b ldr r3, [r3, #8] + 80019e8: 2b00 cmp r3, #0 + 80019ea: d10c bne.n 8001a06 + 80019ec: 4bb6 ldr r3, [pc, #728] ; (8001cc8 ) + 80019ee: 6a1a ldr r2, [r3, #32] + 80019f0: 4bb5 ldr r3, [pc, #724] ; (8001cc8 ) + 80019f2: 2101 movs r1, #1 + 80019f4: 438a bics r2, r1 + 80019f6: 621a str r2, [r3, #32] + 80019f8: 4bb3 ldr r3, [pc, #716] ; (8001cc8 ) + 80019fa: 6a1a ldr r2, [r3, #32] + 80019fc: 4bb2 ldr r3, [pc, #712] ; (8001cc8 ) + 80019fe: 2104 movs r1, #4 + 8001a00: 438a bics r2, r1 + 8001a02: 621a str r2, [r3, #32] + 8001a04: e01c b.n 8001a40 + 8001a06: 687b ldr r3, [r7, #4] + 8001a08: 689b ldr r3, [r3, #8] + 8001a0a: 2b05 cmp r3, #5 + 8001a0c: d10c bne.n 8001a28 + 8001a0e: 4bae ldr r3, [pc, #696] ; (8001cc8 ) + 8001a10: 6a1a ldr r2, [r3, #32] + 8001a12: 4bad ldr r3, [pc, #692] ; (8001cc8 ) + 8001a14: 2104 movs r1, #4 + 8001a16: 430a orrs r2, r1 + 8001a18: 621a str r2, [r3, #32] + 8001a1a: 4bab ldr r3, [pc, #684] ; (8001cc8 ) + 8001a1c: 6a1a ldr r2, [r3, #32] + 8001a1e: 4baa ldr r3, [pc, #680] ; (8001cc8 ) + 8001a20: 2101 movs r1, #1 + 8001a22: 430a orrs r2, r1 + 8001a24: 621a str r2, [r3, #32] + 8001a26: e00b b.n 8001a40 + 8001a28: 4ba7 ldr r3, [pc, #668] ; (8001cc8 ) + 8001a2a: 6a1a ldr r2, [r3, #32] + 8001a2c: 4ba6 ldr r3, [pc, #664] ; (8001cc8 ) + 8001a2e: 2101 movs r1, #1 + 8001a30: 438a bics r2, r1 + 8001a32: 621a str r2, [r3, #32] + 8001a34: 4ba4 ldr r3, [pc, #656] ; (8001cc8 ) + 8001a36: 6a1a ldr r2, [r3, #32] + 8001a38: 4ba3 ldr r3, [pc, #652] ; (8001cc8 ) + 8001a3a: 2104 movs r1, #4 + 8001a3c: 438a bics r2, r1 + 8001a3e: 621a str r2, [r3, #32] /* Check the LSE State */ if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 8000f94: 687b ldr r3, [r7, #4] - 8000f96: 689b ldr r3, [r3, #8] - 8000f98: 2b00 cmp r3, #0 - 8000f9a: d014 beq.n 8000fc6 + 8001a40: 687b ldr r3, [r7, #4] + 8001a42: 689b ldr r3, [r3, #8] + 8001a44: 2b00 cmp r3, #0 + 8001a46: d014 beq.n 8001a72 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000f9c: f7ff fbc6 bl 800072c - 8000fa0: 0003 movs r3, r0 - 8000fa2: 61bb str r3, [r7, #24] + 8001a48: f7fe ff16 bl 8000878 + 8001a4c: 0003 movs r3, r0 + 8001a4e: 61bb str r3, [r7, #24] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8000fa4: e009 b.n 8000fba + 8001a50: e009 b.n 8001a66 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8000fa6: f7ff fbc1 bl 800072c - 8000faa: 0002 movs r2, r0 - 8000fac: 69bb ldr r3, [r7, #24] - 8000fae: 1ad3 subs r3, r2, r3 - 8000fb0: 4a9b ldr r2, [pc, #620] ; (8001220 ) - 8000fb2: 4293 cmp r3, r2 - 8000fb4: d901 bls.n 8000fba + 8001a52: f7fe ff11 bl 8000878 + 8001a56: 0002 movs r2, r0 + 8001a58: 69bb ldr r3, [r7, #24] + 8001a5a: 1ad3 subs r3, r2, r3 + 8001a5c: 4a9b ldr r2, [pc, #620] ; (8001ccc ) + 8001a5e: 4293 cmp r3, r2 + 8001a60: d901 bls.n 8001a66 { return HAL_TIMEOUT; - 8000fb6: 2303 movs r3, #3 - 8000fb8: e12b b.n 8001212 + 8001a62: 2303 movs r3, #3 + 8001a64: e12b b.n 8001cbe while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8000fba: 4b98 ldr r3, [pc, #608] ; (800121c ) - 8000fbc: 6a1b ldr r3, [r3, #32] - 8000fbe: 2202 movs r2, #2 - 8000fc0: 4013 ands r3, r2 - 8000fc2: d0f0 beq.n 8000fa6 - 8000fc4: e013 b.n 8000fee + 8001a66: 4b98 ldr r3, [pc, #608] ; (8001cc8 ) + 8001a68: 6a1b ldr r3, [r3, #32] + 8001a6a: 2202 movs r2, #2 + 8001a6c: 4013 ands r3, r2 + 8001a6e: d0f0 beq.n 8001a52 + 8001a70: e013 b.n 8001a9a } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8000fc6: f7ff fbb1 bl 800072c - 8000fca: 0003 movs r3, r0 - 8000fcc: 61bb str r3, [r7, #24] + 8001a72: f7fe ff01 bl 8000878 + 8001a76: 0003 movs r3, r0 + 8001a78: 61bb str r3, [r7, #24] /* Wait till LSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8000fce: e009 b.n 8000fe4 + 8001a7a: e009 b.n 8001a90 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8000fd0: f7ff fbac bl 800072c - 8000fd4: 0002 movs r2, r0 - 8000fd6: 69bb ldr r3, [r7, #24] - 8000fd8: 1ad3 subs r3, r2, r3 - 8000fda: 4a91 ldr r2, [pc, #580] ; (8001220 ) - 8000fdc: 4293 cmp r3, r2 - 8000fde: d901 bls.n 8000fe4 + 8001a7c: f7fe fefc bl 8000878 + 8001a80: 0002 movs r2, r0 + 8001a82: 69bb ldr r3, [r7, #24] + 8001a84: 1ad3 subs r3, r2, r3 + 8001a86: 4a91 ldr r2, [pc, #580] ; (8001ccc ) + 8001a88: 4293 cmp r3, r2 + 8001a8a: d901 bls.n 8001a90 { return HAL_TIMEOUT; - 8000fe0: 2303 movs r3, #3 - 8000fe2: e116 b.n 8001212 + 8001a8c: 2303 movs r3, #3 + 8001a8e: e116 b.n 8001cbe while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8000fe4: 4b8d ldr r3, [pc, #564] ; (800121c ) - 8000fe6: 6a1b ldr r3, [r3, #32] - 8000fe8: 2202 movs r2, #2 - 8000fea: 4013 ands r3, r2 - 8000fec: d1f0 bne.n 8000fd0 + 8001a90: 4b8d ldr r3, [pc, #564] ; (8001cc8 ) + 8001a92: 6a1b ldr r3, [r3, #32] + 8001a94: 2202 movs r2, #2 + 8001a96: 4013 ands r3, r2 + 8001a98: d1f0 bne.n 8001a7c } } } /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) - 8000fee: 231f movs r3, #31 - 8000ff0: 18fb adds r3, r7, r3 - 8000ff2: 781b ldrb r3, [r3, #0] - 8000ff4: 2b01 cmp r3, #1 - 8000ff6: d105 bne.n 8001004 + 8001a9a: 231f movs r3, #31 + 8001a9c: 18fb adds r3, r7, r3 + 8001a9e: 781b ldrb r3, [r3, #0] + 8001aa0: 2b01 cmp r3, #1 + 8001aa2: d105 bne.n 8001ab0 { __HAL_RCC_PWR_CLK_DISABLE(); - 8000ff8: 4b88 ldr r3, [pc, #544] ; (800121c ) - 8000ffa: 69da ldr r2, [r3, #28] - 8000ffc: 4b87 ldr r3, [pc, #540] ; (800121c ) - 8000ffe: 4989 ldr r1, [pc, #548] ; (8001224 ) - 8001000: 400a ands r2, r1 - 8001002: 61da str r2, [r3, #28] + 8001aa4: 4b88 ldr r3, [pc, #544] ; (8001cc8 ) + 8001aa6: 69da ldr r2, [r3, #28] + 8001aa8: 4b87 ldr r3, [pc, #540] ; (8001cc8 ) + 8001aaa: 4989 ldr r1, [pc, #548] ; (8001cd0 ) + 8001aac: 400a ands r2, r1 + 8001aae: 61da str r2, [r3, #28] } } /*----------------------------- HSI14 Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14) - 8001004: 687b ldr r3, [r7, #4] - 8001006: 681b ldr r3, [r3, #0] - 8001008: 2210 movs r2, #16 - 800100a: 4013 ands r3, r2 - 800100c: d063 beq.n 80010d6 + 8001ab0: 687b ldr r3, [r7, #4] + 8001ab2: 681b ldr r3, [r3, #0] + 8001ab4: 2210 movs r2, #16 + 8001ab6: 4013 ands r3, r2 + 8001ab8: d063 beq.n 8001b82 /* Check the parameters */ assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue)); /* Check the HSI14 State */ if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON) - 800100e: 687b ldr r3, [r7, #4] - 8001010: 695b ldr r3, [r3, #20] - 8001012: 2b01 cmp r3, #1 - 8001014: d12a bne.n 800106c + 8001aba: 687b ldr r3, [r7, #4] + 8001abc: 695b ldr r3, [r3, #20] + 8001abe: 2b01 cmp r3, #1 + 8001ac0: d12a bne.n 8001b18 { /* Disable ADC control of the Internal High Speed oscillator HSI14 */ __HAL_RCC_HSI14ADC_DISABLE(); - 8001016: 4b81 ldr r3, [pc, #516] ; (800121c ) - 8001018: 6b5a ldr r2, [r3, #52] ; 0x34 - 800101a: 4b80 ldr r3, [pc, #512] ; (800121c ) - 800101c: 2104 movs r1, #4 - 800101e: 430a orrs r2, r1 - 8001020: 635a str r2, [r3, #52] ; 0x34 + 8001ac2: 4b81 ldr r3, [pc, #516] ; (8001cc8 ) + 8001ac4: 6b5a ldr r2, [r3, #52] ; 0x34 + 8001ac6: 4b80 ldr r3, [pc, #512] ; (8001cc8 ) + 8001ac8: 2104 movs r1, #4 + 8001aca: 430a orrs r2, r1 + 8001acc: 635a str r2, [r3, #52] ; 0x34 /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI14_ENABLE(); - 8001022: 4b7e ldr r3, [pc, #504] ; (800121c ) - 8001024: 6b5a ldr r2, [r3, #52] ; 0x34 - 8001026: 4b7d ldr r3, [pc, #500] ; (800121c ) - 8001028: 2101 movs r1, #1 - 800102a: 430a orrs r2, r1 - 800102c: 635a str r2, [r3, #52] ; 0x34 + 8001ace: 4b7e ldr r3, [pc, #504] ; (8001cc8 ) + 8001ad0: 6b5a ldr r2, [r3, #52] ; 0x34 + 8001ad2: 4b7d ldr r3, [pc, #500] ; (8001cc8 ) + 8001ad4: 2101 movs r1, #1 + 8001ad6: 430a orrs r2, r1 + 8001ad8: 635a str r2, [r3, #52] ; 0x34 /* Get Start Tick */ tickstart = HAL_GetTick(); - 800102e: f7ff fb7d bl 800072c - 8001032: 0003 movs r3, r0 - 8001034: 61bb str r3, [r7, #24] + 8001ada: f7fe fecd bl 8000878 + 8001ade: 0003 movs r3, r0 + 8001ae0: 61bb str r3, [r7, #24] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET) - 8001036: e008 b.n 800104a + 8001ae2: e008 b.n 8001af6 { if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) - 8001038: f7ff fb78 bl 800072c - 800103c: 0002 movs r2, r0 - 800103e: 69bb ldr r3, [r7, #24] - 8001040: 1ad3 subs r3, r2, r3 - 8001042: 2b02 cmp r3, #2 - 8001044: d901 bls.n 800104a + 8001ae4: f7fe fec8 bl 8000878 + 8001ae8: 0002 movs r2, r0 + 8001aea: 69bb ldr r3, [r7, #24] + 8001aec: 1ad3 subs r3, r2, r3 + 8001aee: 2b02 cmp r3, #2 + 8001af0: d901 bls.n 8001af6 { return HAL_TIMEOUT; - 8001046: 2303 movs r3, #3 - 8001048: e0e3 b.n 8001212 + 8001af2: 2303 movs r3, #3 + 8001af4: e0e3 b.n 8001cbe while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET) - 800104a: 4b74 ldr r3, [pc, #464] ; (800121c ) - 800104c: 6b5b ldr r3, [r3, #52] ; 0x34 - 800104e: 2202 movs r2, #2 - 8001050: 4013 ands r3, r2 - 8001052: d0f1 beq.n 8001038 + 8001af6: 4b74 ldr r3, [pc, #464] ; (8001cc8 ) + 8001af8: 6b5b ldr r3, [r3, #52] ; 0x34 + 8001afa: 2202 movs r2, #2 + 8001afc: 4013 ands r3, r2 + 8001afe: d0f1 beq.n 8001ae4 } } /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); - 8001054: 4b71 ldr r3, [pc, #452] ; (800121c ) - 8001056: 6b5b ldr r3, [r3, #52] ; 0x34 - 8001058: 22f8 movs r2, #248 ; 0xf8 - 800105a: 4393 bics r3, r2 - 800105c: 0019 movs r1, r3 - 800105e: 687b ldr r3, [r7, #4] - 8001060: 699b ldr r3, [r3, #24] - 8001062: 00da lsls r2, r3, #3 - 8001064: 4b6d ldr r3, [pc, #436] ; (800121c ) - 8001066: 430a orrs r2, r1 - 8001068: 635a str r2, [r3, #52] ; 0x34 - 800106a: e034 b.n 80010d6 + 8001b00: 4b71 ldr r3, [pc, #452] ; (8001cc8 ) + 8001b02: 6b5b ldr r3, [r3, #52] ; 0x34 + 8001b04: 22f8 movs r2, #248 ; 0xf8 + 8001b06: 4393 bics r3, r2 + 8001b08: 0019 movs r1, r3 + 8001b0a: 687b ldr r3, [r7, #4] + 8001b0c: 699b ldr r3, [r3, #24] + 8001b0e: 00da lsls r2, r3, #3 + 8001b10: 4b6d ldr r3, [pc, #436] ; (8001cc8 ) + 8001b12: 430a orrs r2, r1 + 8001b14: 635a str r2, [r3, #52] ; 0x34 + 8001b16: e034 b.n 8001b82 } else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL) - 800106c: 687b ldr r3, [r7, #4] - 800106e: 695b ldr r3, [r3, #20] - 8001070: 3305 adds r3, #5 - 8001072: d111 bne.n 8001098 + 8001b18: 687b ldr r3, [r7, #4] + 8001b1a: 695b ldr r3, [r3, #20] + 8001b1c: 3305 adds r3, #5 + 8001b1e: d111 bne.n 8001b44 { /* Enable ADC control of the Internal High Speed oscillator HSI14 */ __HAL_RCC_HSI14ADC_ENABLE(); - 8001074: 4b69 ldr r3, [pc, #420] ; (800121c ) - 8001076: 6b5a ldr r2, [r3, #52] ; 0x34 - 8001078: 4b68 ldr r3, [pc, #416] ; (800121c ) - 800107a: 2104 movs r1, #4 - 800107c: 438a bics r2, r1 - 800107e: 635a str r2, [r3, #52] ; 0x34 + 8001b20: 4b69 ldr r3, [pc, #420] ; (8001cc8 ) + 8001b22: 6b5a ldr r2, [r3, #52] ; 0x34 + 8001b24: 4b68 ldr r3, [pc, #416] ; (8001cc8 ) + 8001b26: 2104 movs r1, #4 + 8001b28: 438a bics r2, r1 + 8001b2a: 635a str r2, [r3, #52] ; 0x34 /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); - 8001080: 4b66 ldr r3, [pc, #408] ; (800121c ) - 8001082: 6b5b ldr r3, [r3, #52] ; 0x34 - 8001084: 22f8 movs r2, #248 ; 0xf8 - 8001086: 4393 bics r3, r2 - 8001088: 0019 movs r1, r3 - 800108a: 687b ldr r3, [r7, #4] - 800108c: 699b ldr r3, [r3, #24] - 800108e: 00da lsls r2, r3, #3 - 8001090: 4b62 ldr r3, [pc, #392] ; (800121c ) - 8001092: 430a orrs r2, r1 - 8001094: 635a str r2, [r3, #52] ; 0x34 - 8001096: e01e b.n 80010d6 + 8001b2c: 4b66 ldr r3, [pc, #408] ; (8001cc8 ) + 8001b2e: 6b5b ldr r3, [r3, #52] ; 0x34 + 8001b30: 22f8 movs r2, #248 ; 0xf8 + 8001b32: 4393 bics r3, r2 + 8001b34: 0019 movs r1, r3 + 8001b36: 687b ldr r3, [r7, #4] + 8001b38: 699b ldr r3, [r3, #24] + 8001b3a: 00da lsls r2, r3, #3 + 8001b3c: 4b62 ldr r3, [pc, #392] ; (8001cc8 ) + 8001b3e: 430a orrs r2, r1 + 8001b40: 635a str r2, [r3, #52] ; 0x34 + 8001b42: e01e b.n 8001b82 } else { /* Disable ADC control of the Internal High Speed oscillator HSI14 */ __HAL_RCC_HSI14ADC_DISABLE(); - 8001098: 4b60 ldr r3, [pc, #384] ; (800121c ) - 800109a: 6b5a ldr r2, [r3, #52] ; 0x34 - 800109c: 4b5f ldr r3, [pc, #380] ; (800121c ) - 800109e: 2104 movs r1, #4 - 80010a0: 430a orrs r2, r1 - 80010a2: 635a str r2, [r3, #52] ; 0x34 + 8001b44: 4b60 ldr r3, [pc, #384] ; (8001cc8 ) + 8001b46: 6b5a ldr r2, [r3, #52] ; 0x34 + 8001b48: 4b5f ldr r3, [pc, #380] ; (8001cc8 ) + 8001b4a: 2104 movs r1, #4 + 8001b4c: 430a orrs r2, r1 + 8001b4e: 635a str r2, [r3, #52] ; 0x34 /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI14_DISABLE(); - 80010a4: 4b5d ldr r3, [pc, #372] ; (800121c ) - 80010a6: 6b5a ldr r2, [r3, #52] ; 0x34 - 80010a8: 4b5c ldr r3, [pc, #368] ; (800121c ) - 80010aa: 2101 movs r1, #1 - 80010ac: 438a bics r2, r1 - 80010ae: 635a str r2, [r3, #52] ; 0x34 + 8001b50: 4b5d ldr r3, [pc, #372] ; (8001cc8 ) + 8001b52: 6b5a ldr r2, [r3, #52] ; 0x34 + 8001b54: 4b5c ldr r3, [pc, #368] ; (8001cc8 ) + 8001b56: 2101 movs r1, #1 + 8001b58: 438a bics r2, r1 + 8001b5a: 635a str r2, [r3, #52] ; 0x34 /* Get Start Tick */ tickstart = HAL_GetTick(); - 80010b0: f7ff fb3c bl 800072c - 80010b4: 0003 movs r3, r0 - 80010b6: 61bb str r3, [r7, #24] + 8001b5c: f7fe fe8c bl 8000878 + 8001b60: 0003 movs r3, r0 + 8001b62: 61bb str r3, [r7, #24] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET) - 80010b8: e008 b.n 80010cc + 8001b64: e008 b.n 8001b78 { if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) - 80010ba: f7ff fb37 bl 800072c - 80010be: 0002 movs r2, r0 - 80010c0: 69bb ldr r3, [r7, #24] - 80010c2: 1ad3 subs r3, r2, r3 - 80010c4: 2b02 cmp r3, #2 - 80010c6: d901 bls.n 80010cc + 8001b66: f7fe fe87 bl 8000878 + 8001b6a: 0002 movs r2, r0 + 8001b6c: 69bb ldr r3, [r7, #24] + 8001b6e: 1ad3 subs r3, r2, r3 + 8001b70: 2b02 cmp r3, #2 + 8001b72: d901 bls.n 8001b78 { return HAL_TIMEOUT; - 80010c8: 2303 movs r3, #3 - 80010ca: e0a2 b.n 8001212 + 8001b74: 2303 movs r3, #3 + 8001b76: e0a2 b.n 8001cbe while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET) - 80010cc: 4b53 ldr r3, [pc, #332] ; (800121c ) - 80010ce: 6b5b ldr r3, [r3, #52] ; 0x34 - 80010d0: 2202 movs r2, #2 - 80010d2: 4013 ands r3, r2 - 80010d4: d1f1 bne.n 80010ba + 8001b78: 4b53 ldr r3, [pc, #332] ; (8001cc8 ) + 8001b7a: 6b5b ldr r3, [r3, #52] ; 0x34 + 8001b7c: 2202 movs r2, #2 + 8001b7e: 4013 ands r3, r2 + 8001b80: d1f1 bne.n 8001b66 #endif /* RCC_HSI48_SUPPORT */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 80010d6: 687b ldr r3, [r7, #4] - 80010d8: 6a1b ldr r3, [r3, #32] - 80010da: 2b00 cmp r3, #0 - 80010dc: d100 bne.n 80010e0 - 80010de: e097 b.n 8001210 + 8001b82: 687b ldr r3, [r7, #4] + 8001b84: 6a1b ldr r3, [r3, #32] + 8001b86: 2b00 cmp r3, #0 + 8001b88: d100 bne.n 8001b8c + 8001b8a: e097 b.n 8001cbc { /* Check if the PLL is used as system clock or not */ if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 80010e0: 4b4e ldr r3, [pc, #312] ; (800121c ) - 80010e2: 685b ldr r3, [r3, #4] - 80010e4: 220c movs r2, #12 - 80010e6: 4013 ands r3, r2 - 80010e8: 2b08 cmp r3, #8 - 80010ea: d100 bne.n 80010ee - 80010ec: e06b b.n 80011c6 + 8001b8c: 4b4e ldr r3, [pc, #312] ; (8001cc8 ) + 8001b8e: 685b ldr r3, [r3, #4] + 8001b90: 220c movs r2, #12 + 8001b92: 4013 ands r3, r2 + 8001b94: 2b08 cmp r3, #8 + 8001b96: d100 bne.n 8001b9a + 8001b98: e06b b.n 8001c72 { if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 80010ee: 687b ldr r3, [r7, #4] - 80010f0: 6a1b ldr r3, [r3, #32] - 80010f2: 2b02 cmp r3, #2 - 80010f4: d14c bne.n 8001190 + 8001b9a: 687b ldr r3, [r7, #4] + 8001b9c: 6a1b ldr r3, [r3, #32] + 8001b9e: 2b02 cmp r3, #2 + 8001ba0: d14c bne.n 8001c3c assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 80010f6: 4b49 ldr r3, [pc, #292] ; (800121c ) - 80010f8: 681a ldr r2, [r3, #0] - 80010fa: 4b48 ldr r3, [pc, #288] ; (800121c ) - 80010fc: 494a ldr r1, [pc, #296] ; (8001228 ) - 80010fe: 400a ands r2, r1 - 8001100: 601a str r2, [r3, #0] + 8001ba2: 4b49 ldr r3, [pc, #292] ; (8001cc8 ) + 8001ba4: 681a ldr r2, [r3, #0] + 8001ba6: 4b48 ldr r3, [pc, #288] ; (8001cc8 ) + 8001ba8: 494a ldr r1, [pc, #296] ; (8001cd4 ) + 8001baa: 400a ands r2, r1 + 8001bac: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001102: f7ff fb13 bl 800072c - 8001106: 0003 movs r3, r0 - 8001108: 61bb str r3, [r7, #24] + 8001bae: f7fe fe63 bl 8000878 + 8001bb2: 0003 movs r3, r0 + 8001bb4: 61bb str r3, [r7, #24] /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 800110a: e008 b.n 800111e + 8001bb6: e008 b.n 8001bca { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 800110c: f7ff fb0e bl 800072c - 8001110: 0002 movs r2, r0 - 8001112: 69bb ldr r3, [r7, #24] - 8001114: 1ad3 subs r3, r2, r3 - 8001116: 2b02 cmp r3, #2 - 8001118: d901 bls.n 800111e + 8001bb8: f7fe fe5e bl 8000878 + 8001bbc: 0002 movs r2, r0 + 8001bbe: 69bb ldr r3, [r7, #24] + 8001bc0: 1ad3 subs r3, r2, r3 + 8001bc2: 2b02 cmp r3, #2 + 8001bc4: d901 bls.n 8001bca { return HAL_TIMEOUT; - 800111a: 2303 movs r3, #3 - 800111c: e079 b.n 8001212 + 8001bc6: 2303 movs r3, #3 + 8001bc8: e079 b.n 8001cbe while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 800111e: 4b3f ldr r3, [pc, #252] ; (800121c ) - 8001120: 681a ldr r2, [r3, #0] - 8001122: 2380 movs r3, #128 ; 0x80 - 8001124: 049b lsls r3, r3, #18 - 8001126: 4013 ands r3, r2 - 8001128: d1f0 bne.n 800110c + 8001bca: 4b3f ldr r3, [pc, #252] ; (8001cc8 ) + 8001bcc: 681a ldr r2, [r3, #0] + 8001bce: 2380 movs r3, #128 ; 0x80 + 8001bd0: 049b lsls r3, r3, #18 + 8001bd2: 4013 ands r3, r2 + 8001bd4: d1f0 bne.n 8001bb8 } } /* Configure the main PLL clock source, predivider and multiplication factor. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 800112a: 4b3c ldr r3, [pc, #240] ; (800121c ) - 800112c: 6adb ldr r3, [r3, #44] ; 0x2c - 800112e: 220f movs r2, #15 - 8001130: 4393 bics r3, r2 - 8001132: 0019 movs r1, r3 - 8001134: 687b ldr r3, [r7, #4] - 8001136: 6ada ldr r2, [r3, #44] ; 0x2c - 8001138: 4b38 ldr r3, [pc, #224] ; (800121c ) - 800113a: 430a orrs r2, r1 - 800113c: 62da str r2, [r3, #44] ; 0x2c - 800113e: 4b37 ldr r3, [pc, #220] ; (800121c ) - 8001140: 685b ldr r3, [r3, #4] - 8001142: 4a3a ldr r2, [pc, #232] ; (800122c ) - 8001144: 4013 ands r3, r2 - 8001146: 0019 movs r1, r3 - 8001148: 687b ldr r3, [r7, #4] - 800114a: 6a9a ldr r2, [r3, #40] ; 0x28 - 800114c: 687b ldr r3, [r7, #4] - 800114e: 6a5b ldr r3, [r3, #36] ; 0x24 - 8001150: 431a orrs r2, r3 - 8001152: 4b32 ldr r3, [pc, #200] ; (800121c ) - 8001154: 430a orrs r2, r1 - 8001156: 605a str r2, [r3, #4] + 8001bd6: 4b3c ldr r3, [pc, #240] ; (8001cc8 ) + 8001bd8: 6adb ldr r3, [r3, #44] ; 0x2c + 8001bda: 220f movs r2, #15 + 8001bdc: 4393 bics r3, r2 + 8001bde: 0019 movs r1, r3 + 8001be0: 687b ldr r3, [r7, #4] + 8001be2: 6ada ldr r2, [r3, #44] ; 0x2c + 8001be4: 4b38 ldr r3, [pc, #224] ; (8001cc8 ) + 8001be6: 430a orrs r2, r1 + 8001be8: 62da str r2, [r3, #44] ; 0x2c + 8001bea: 4b37 ldr r3, [pc, #220] ; (8001cc8 ) + 8001bec: 685b ldr r3, [r3, #4] + 8001bee: 4a3a ldr r2, [pc, #232] ; (8001cd8 ) + 8001bf0: 4013 ands r3, r2 + 8001bf2: 0019 movs r1, r3 + 8001bf4: 687b ldr r3, [r7, #4] + 8001bf6: 6a9a ldr r2, [r3, #40] ; 0x28 + 8001bf8: 687b ldr r3, [r7, #4] + 8001bfa: 6a5b ldr r3, [r3, #36] ; 0x24 + 8001bfc: 431a orrs r2, r3 + 8001bfe: 4b32 ldr r3, [pc, #200] ; (8001cc8 ) + 8001c00: 430a orrs r2, r1 + 8001c02: 605a str r2, [r3, #4] RCC_OscInitStruct->PLL.PREDIV, RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 8001158: 4b30 ldr r3, [pc, #192] ; (800121c ) - 800115a: 681a ldr r2, [r3, #0] - 800115c: 4b2f ldr r3, [pc, #188] ; (800121c ) - 800115e: 2180 movs r1, #128 ; 0x80 - 8001160: 0449 lsls r1, r1, #17 - 8001162: 430a orrs r2, r1 - 8001164: 601a str r2, [r3, #0] + 8001c04: 4b30 ldr r3, [pc, #192] ; (8001cc8 ) + 8001c06: 681a ldr r2, [r3, #0] + 8001c08: 4b2f ldr r3, [pc, #188] ; (8001cc8 ) + 8001c0a: 2180 movs r1, #128 ; 0x80 + 8001c0c: 0449 lsls r1, r1, #17 + 8001c0e: 430a orrs r2, r1 + 8001c10: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001166: f7ff fae1 bl 800072c - 800116a: 0003 movs r3, r0 - 800116c: 61bb str r3, [r7, #24] + 8001c12: f7fe fe31 bl 8000878 + 8001c16: 0003 movs r3, r0 + 8001c18: 61bb str r3, [r7, #24] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 800116e: e008 b.n 8001182 + 8001c1a: e008 b.n 8001c2e { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8001170: f7ff fadc bl 800072c - 8001174: 0002 movs r2, r0 - 8001176: 69bb ldr r3, [r7, #24] - 8001178: 1ad3 subs r3, r2, r3 - 800117a: 2b02 cmp r3, #2 - 800117c: d901 bls.n 8001182 + 8001c1c: f7fe fe2c bl 8000878 + 8001c20: 0002 movs r2, r0 + 8001c22: 69bb ldr r3, [r7, #24] + 8001c24: 1ad3 subs r3, r2, r3 + 8001c26: 2b02 cmp r3, #2 + 8001c28: d901 bls.n 8001c2e { return HAL_TIMEOUT; - 800117e: 2303 movs r3, #3 - 8001180: e047 b.n 8001212 + 8001c2a: 2303 movs r3, #3 + 8001c2c: e047 b.n 8001cbe while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8001182: 4b26 ldr r3, [pc, #152] ; (800121c ) - 8001184: 681a ldr r2, [r3, #0] - 8001186: 2380 movs r3, #128 ; 0x80 - 8001188: 049b lsls r3, r3, #18 - 800118a: 4013 ands r3, r2 - 800118c: d0f0 beq.n 8001170 - 800118e: e03f b.n 8001210 + 8001c2e: 4b26 ldr r3, [pc, #152] ; (8001cc8 ) + 8001c30: 681a ldr r2, [r3, #0] + 8001c32: 2380 movs r3, #128 ; 0x80 + 8001c34: 049b lsls r3, r3, #18 + 8001c36: 4013 ands r3, r2 + 8001c38: d0f0 beq.n 8001c1c + 8001c3a: e03f b.n 8001cbc } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8001190: 4b22 ldr r3, [pc, #136] ; (800121c ) - 8001192: 681a ldr r2, [r3, #0] - 8001194: 4b21 ldr r3, [pc, #132] ; (800121c ) - 8001196: 4924 ldr r1, [pc, #144] ; (8001228 ) - 8001198: 400a ands r2, r1 - 800119a: 601a str r2, [r3, #0] + 8001c3c: 4b22 ldr r3, [pc, #136] ; (8001cc8 ) + 8001c3e: 681a ldr r2, [r3, #0] + 8001c40: 4b21 ldr r3, [pc, #132] ; (8001cc8 ) + 8001c42: 4924 ldr r1, [pc, #144] ; (8001cd4 ) + 8001c44: 400a ands r2, r1 + 8001c46: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800119c: f7ff fac6 bl 800072c - 80011a0: 0003 movs r3, r0 - 80011a2: 61bb str r3, [r7, #24] + 8001c48: f7fe fe16 bl 8000878 + 8001c4c: 0003 movs r3, r0 + 8001c4e: 61bb str r3, [r7, #24] /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80011a4: e008 b.n 80011b8 + 8001c50: e008 b.n 8001c64 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 80011a6: f7ff fac1 bl 800072c - 80011aa: 0002 movs r2, r0 - 80011ac: 69bb ldr r3, [r7, #24] - 80011ae: 1ad3 subs r3, r2, r3 - 80011b0: 2b02 cmp r3, #2 - 80011b2: d901 bls.n 80011b8 + 8001c52: f7fe fe11 bl 8000878 + 8001c56: 0002 movs r2, r0 + 8001c58: 69bb ldr r3, [r7, #24] + 8001c5a: 1ad3 subs r3, r2, r3 + 8001c5c: 2b02 cmp r3, #2 + 8001c5e: d901 bls.n 8001c64 { return HAL_TIMEOUT; - 80011b4: 2303 movs r3, #3 - 80011b6: e02c b.n 8001212 + 8001c60: 2303 movs r3, #3 + 8001c62: e02c b.n 8001cbe while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80011b8: 4b18 ldr r3, [pc, #96] ; (800121c ) - 80011ba: 681a ldr r2, [r3, #0] - 80011bc: 2380 movs r3, #128 ; 0x80 - 80011be: 049b lsls r3, r3, #18 - 80011c0: 4013 ands r3, r2 - 80011c2: d1f0 bne.n 80011a6 - 80011c4: e024 b.n 8001210 + 8001c64: 4b18 ldr r3, [pc, #96] ; (8001cc8 ) + 8001c66: 681a ldr r2, [r3, #0] + 8001c68: 2380 movs r3, #128 ; 0x80 + 8001c6a: 049b lsls r3, r3, #18 + 8001c6c: 4013 ands r3, r2 + 8001c6e: d1f0 bne.n 8001c52 + 8001c70: e024 b.n 8001cbc } } else { /* Check if there is a request to disable the PLL used as System clock source */ if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 80011c6: 687b ldr r3, [r7, #4] - 80011c8: 6a1b ldr r3, [r3, #32] - 80011ca: 2b01 cmp r3, #1 - 80011cc: d101 bne.n 80011d2 + 8001c72: 687b ldr r3, [r7, #4] + 8001c74: 6a1b ldr r3, [r3, #32] + 8001c76: 2b01 cmp r3, #1 + 8001c78: d101 bne.n 8001c7e { return HAL_ERROR; - 80011ce: 2301 movs r3, #1 - 80011d0: e01f b.n 8001212 + 8001c7a: 2301 movs r3, #1 + 8001c7c: e01f b.n 8001cbe } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; - 80011d2: 4b12 ldr r3, [pc, #72] ; (800121c ) - 80011d4: 685b ldr r3, [r3, #4] - 80011d6: 617b str r3, [r7, #20] + 8001c7e: 4b12 ldr r3, [pc, #72] ; (8001cc8 ) + 8001c80: 685b ldr r3, [r3, #4] + 8001c82: 617b str r3, [r7, #20] pll_config2 = RCC->CFGR2; - 80011d8: 4b10 ldr r3, [pc, #64] ; (800121c ) - 80011da: 6adb ldr r3, [r3, #44] ; 0x2c - 80011dc: 613b str r3, [r7, #16] + 8001c84: 4b10 ldr r3, [pc, #64] ; (8001cc8 ) + 8001c86: 6adb ldr r3, [r3, #44] ; 0x2c + 8001c88: 613b str r3, [r7, #16] if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80011de: 697a ldr r2, [r7, #20] - 80011e0: 2380 movs r3, #128 ; 0x80 - 80011e2: 025b lsls r3, r3, #9 - 80011e4: 401a ands r2, r3 - 80011e6: 687b ldr r3, [r7, #4] - 80011e8: 6a5b ldr r3, [r3, #36] ; 0x24 - 80011ea: 429a cmp r2, r3 - 80011ec: d10e bne.n 800120c + 8001c8a: 697a ldr r2, [r7, #20] + 8001c8c: 2380 movs r3, #128 ; 0x80 + 8001c8e: 025b lsls r3, r3, #9 + 8001c90: 401a ands r2, r3 + 8001c92: 687b ldr r3, [r7, #4] + 8001c94: 6a5b ldr r3, [r3, #36] ; 0x24 + 8001c96: 429a cmp r2, r3 + 8001c98: d10e bne.n 8001cb8 (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || - 80011ee: 693b ldr r3, [r7, #16] - 80011f0: 220f movs r2, #15 - 80011f2: 401a ands r2, r3 - 80011f4: 687b ldr r3, [r7, #4] - 80011f6: 6adb ldr r3, [r3, #44] ; 0x2c + 8001c9a: 693b ldr r3, [r7, #16] + 8001c9c: 220f movs r2, #15 + 8001c9e: 401a ands r2, r3 + 8001ca0: 687b ldr r3, [r7, #4] + 8001ca2: 6adb ldr r3, [r3, #44] ; 0x2c if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80011f8: 429a cmp r2, r3 - 80011fa: d107 bne.n 800120c + 8001ca4: 429a cmp r2, r3 + 8001ca6: d107 bne.n 8001cb8 (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) - 80011fc: 697a ldr r2, [r7, #20] - 80011fe: 23f0 movs r3, #240 ; 0xf0 - 8001200: 039b lsls r3, r3, #14 - 8001202: 401a ands r2, r3 - 8001204: 687b ldr r3, [r7, #4] - 8001206: 6a9b ldr r3, [r3, #40] ; 0x28 + 8001ca8: 697a ldr r2, [r7, #20] + 8001caa: 23f0 movs r3, #240 ; 0xf0 + 8001cac: 039b lsls r3, r3, #14 + 8001cae: 401a ands r2, r3 + 8001cb0: 687b ldr r3, [r7, #4] + 8001cb2: 6a9b ldr r3, [r3, #40] ; 0x28 (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || - 8001208: 429a cmp r2, r3 - 800120a: d001 beq.n 8001210 + 8001cb4: 429a cmp r2, r3 + 8001cb6: d001 beq.n 8001cbc { return HAL_ERROR; - 800120c: 2301 movs r3, #1 - 800120e: e000 b.n 8001212 + 8001cb8: 2301 movs r3, #1 + 8001cba: e000 b.n 8001cbe } } } } return HAL_OK; - 8001210: 2300 movs r3, #0 + 8001cbc: 2300 movs r3, #0 } - 8001212: 0018 movs r0, r3 - 8001214: 46bd mov sp, r7 - 8001216: b008 add sp, #32 - 8001218: bd80 pop {r7, pc} - 800121a: 46c0 nop ; (mov r8, r8) - 800121c: 40021000 .word 0x40021000 - 8001220: 00001388 .word 0x00001388 - 8001224: efffffff .word 0xefffffff - 8001228: feffffff .word 0xfeffffff - 800122c: ffc2ffff .word 0xffc2ffff + 8001cbe: 0018 movs r0, r3 + 8001cc0: 46bd mov sp, r7 + 8001cc2: b008 add sp, #32 + 8001cc4: bd80 pop {r7, pc} + 8001cc6: 46c0 nop ; (mov r8, r8) + 8001cc8: 40021000 .word 0x40021000 + 8001ccc: 00001388 .word 0x00001388 + 8001cd0: efffffff .word 0xefffffff + 8001cd4: feffffff .word 0xfeffffff + 8001cd8: ffc2ffff .word 0xffc2ffff -08001230 : +08001cdc : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 8001230: b580 push {r7, lr} - 8001232: b084 sub sp, #16 - 8001234: af00 add r7, sp, #0 - 8001236: 6078 str r0, [r7, #4] - 8001238: 6039 str r1, [r7, #0] + 8001cdc: b580 push {r7, lr} + 8001cde: b084 sub sp, #16 + 8001ce0: af00 add r7, sp, #0 + 8001ce2: 6078 str r0, [r7, #4] + 8001ce4: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if(RCC_ClkInitStruct == NULL) - 800123a: 687b ldr r3, [r7, #4] - 800123c: 2b00 cmp r3, #0 - 800123e: d101 bne.n 8001244 + 8001ce6: 687b ldr r3, [r7, #4] + 8001ce8: 2b00 cmp r3, #0 + 8001cea: d101 bne.n 8001cf0 { return HAL_ERROR; - 8001240: 2301 movs r3, #1 - 8001242: e0b3 b.n 80013ac + 8001cec: 2301 movs r3, #1 + 8001cee: e0b3 b.n 8001e58 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) - 8001244: 4b5b ldr r3, [pc, #364] ; (80013b4 ) - 8001246: 681b ldr r3, [r3, #0] - 8001248: 2201 movs r2, #1 - 800124a: 4013 ands r3, r2 - 800124c: 683a ldr r2, [r7, #0] - 800124e: 429a cmp r2, r3 - 8001250: d911 bls.n 8001276 + 8001cf0: 4b5b ldr r3, [pc, #364] ; (8001e60 ) + 8001cf2: 681b ldr r3, [r3, #0] + 8001cf4: 2201 movs r2, #1 + 8001cf6: 4013 ands r3, r2 + 8001cf8: 683a ldr r2, [r7, #0] + 8001cfa: 429a cmp r2, r3 + 8001cfc: d911 bls.n 8001d22 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8001252: 4b58 ldr r3, [pc, #352] ; (80013b4 ) - 8001254: 681b ldr r3, [r3, #0] - 8001256: 2201 movs r2, #1 - 8001258: 4393 bics r3, r2 - 800125a: 0019 movs r1, r3 - 800125c: 4b55 ldr r3, [pc, #340] ; (80013b4 ) - 800125e: 683a ldr r2, [r7, #0] - 8001260: 430a orrs r2, r1 - 8001262: 601a str r2, [r3, #0] + 8001cfe: 4b58 ldr r3, [pc, #352] ; (8001e60 ) + 8001d00: 681b ldr r3, [r3, #0] + 8001d02: 2201 movs r2, #1 + 8001d04: 4393 bics r3, r2 + 8001d06: 0019 movs r1, r3 + 8001d08: 4b55 ldr r3, [pc, #340] ; (8001e60 ) + 8001d0a: 683a ldr r2, [r7, #0] + 8001d0c: 430a orrs r2, r1 + 8001d0e: 601a str r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 8001264: 4b53 ldr r3, [pc, #332] ; (80013b4 ) - 8001266: 681b ldr r3, [r3, #0] - 8001268: 2201 movs r2, #1 - 800126a: 4013 ands r3, r2 - 800126c: 683a ldr r2, [r7, #0] - 800126e: 429a cmp r2, r3 - 8001270: d001 beq.n 8001276 + 8001d10: 4b53 ldr r3, [pc, #332] ; (8001e60 ) + 8001d12: 681b ldr r3, [r3, #0] + 8001d14: 2201 movs r2, #1 + 8001d16: 4013 ands r3, r2 + 8001d18: 683a ldr r2, [r7, #0] + 8001d1a: 429a cmp r2, r3 + 8001d1c: d001 beq.n 8001d22 { return HAL_ERROR; - 8001272: 2301 movs r3, #1 - 8001274: e09a b.n 80013ac + 8001d1e: 2301 movs r3, #1 + 8001d20: e09a b.n 8001e58 } } /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8001276: 687b ldr r3, [r7, #4] - 8001278: 681b ldr r3, [r3, #0] - 800127a: 2202 movs r2, #2 - 800127c: 4013 ands r3, r2 - 800127e: d015 beq.n 80012ac + 8001d22: 687b ldr r3, [r7, #4] + 8001d24: 681b ldr r3, [r3, #0] + 8001d26: 2202 movs r2, #2 + 8001d28: 4013 ands r3, r2 + 8001d2a: d015 beq.n 8001d58 { /* Set the highest APB divider in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8001280: 687b ldr r3, [r7, #4] - 8001282: 681b ldr r3, [r3, #0] - 8001284: 2204 movs r2, #4 - 8001286: 4013 ands r3, r2 - 8001288: d006 beq.n 8001298 + 8001d2c: 687b ldr r3, [r7, #4] + 8001d2e: 681b ldr r3, [r3, #0] + 8001d30: 2204 movs r2, #4 + 8001d32: 4013 ands r3, r2 + 8001d34: d006 beq.n 8001d44 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16); - 800128a: 4b4b ldr r3, [pc, #300] ; (80013b8 ) - 800128c: 685a ldr r2, [r3, #4] - 800128e: 4b4a ldr r3, [pc, #296] ; (80013b8 ) - 8001290: 21e0 movs r1, #224 ; 0xe0 - 8001292: 00c9 lsls r1, r1, #3 - 8001294: 430a orrs r2, r1 - 8001296: 605a str r2, [r3, #4] + 8001d36: 4b4b ldr r3, [pc, #300] ; (8001e64 ) + 8001d38: 685a ldr r2, [r3, #4] + 8001d3a: 4b4a ldr r3, [pc, #296] ; (8001e64 ) + 8001d3c: 21e0 movs r1, #224 ; 0xe0 + 8001d3e: 00c9 lsls r1, r1, #3 + 8001d40: 430a orrs r2, r1 + 8001d42: 605a str r2, [r3, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 8001298: 4b47 ldr r3, [pc, #284] ; (80013b8 ) - 800129a: 685b ldr r3, [r3, #4] - 800129c: 22f0 movs r2, #240 ; 0xf0 - 800129e: 4393 bics r3, r2 - 80012a0: 0019 movs r1, r3 - 80012a2: 687b ldr r3, [r7, #4] - 80012a4: 689a ldr r2, [r3, #8] - 80012a6: 4b44 ldr r3, [pc, #272] ; (80013b8 ) - 80012a8: 430a orrs r2, r1 - 80012aa: 605a str r2, [r3, #4] + 8001d44: 4b47 ldr r3, [pc, #284] ; (8001e64 ) + 8001d46: 685b ldr r3, [r3, #4] + 8001d48: 22f0 movs r2, #240 ; 0xf0 + 8001d4a: 4393 bics r3, r2 + 8001d4c: 0019 movs r1, r3 + 8001d4e: 687b ldr r3, [r7, #4] + 8001d50: 689a ldr r2, [r3, #8] + 8001d52: 4b44 ldr r3, [pc, #272] ; (8001e64 ) + 8001d54: 430a orrs r2, r1 + 8001d56: 605a str r2, [r3, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 80012ac: 687b ldr r3, [r7, #4] - 80012ae: 681b ldr r3, [r3, #0] - 80012b0: 2201 movs r2, #1 - 80012b2: 4013 ands r3, r2 - 80012b4: d040 beq.n 8001338 + 8001d58: 687b ldr r3, [r7, #4] + 8001d5a: 681b ldr r3, [r3, #0] + 8001d5c: 2201 movs r2, #1 + 8001d5e: 4013 ands r3, r2 + 8001d60: d040 beq.n 8001de4 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 80012b6: 687b ldr r3, [r7, #4] - 80012b8: 685b ldr r3, [r3, #4] - 80012ba: 2b01 cmp r3, #1 - 80012bc: d107 bne.n 80012ce + 8001d62: 687b ldr r3, [r7, #4] + 8001d64: 685b ldr r3, [r3, #4] + 8001d66: 2b01 cmp r3, #1 + 8001d68: d107 bne.n 8001d7a { /* Check the HSE ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 80012be: 4b3e ldr r3, [pc, #248] ; (80013b8 ) - 80012c0: 681a ldr r2, [r3, #0] - 80012c2: 2380 movs r3, #128 ; 0x80 - 80012c4: 029b lsls r3, r3, #10 - 80012c6: 4013 ands r3, r2 - 80012c8: d114 bne.n 80012f4 + 8001d6a: 4b3e ldr r3, [pc, #248] ; (8001e64 ) + 8001d6c: 681a ldr r2, [r3, #0] + 8001d6e: 2380 movs r3, #128 ; 0x80 + 8001d70: 029b lsls r3, r3, #10 + 8001d72: 4013 ands r3, r2 + 8001d74: d114 bne.n 8001da0 { return HAL_ERROR; - 80012ca: 2301 movs r3, #1 - 80012cc: e06e b.n 80013ac + 8001d76: 2301 movs r3, #1 + 8001d78: e06e b.n 8001e58 } } /* PLL is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 80012ce: 687b ldr r3, [r7, #4] - 80012d0: 685b ldr r3, [r3, #4] - 80012d2: 2b02 cmp r3, #2 - 80012d4: d107 bne.n 80012e6 + 8001d7a: 687b ldr r3, [r7, #4] + 8001d7c: 685b ldr r3, [r3, #4] + 8001d7e: 2b02 cmp r3, #2 + 8001d80: d107 bne.n 8001d92 { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 80012d6: 4b38 ldr r3, [pc, #224] ; (80013b8 ) - 80012d8: 681a ldr r2, [r3, #0] - 80012da: 2380 movs r3, #128 ; 0x80 - 80012dc: 049b lsls r3, r3, #18 - 80012de: 4013 ands r3, r2 - 80012e0: d108 bne.n 80012f4 + 8001d82: 4b38 ldr r3, [pc, #224] ; (8001e64 ) + 8001d84: 681a ldr r2, [r3, #0] + 8001d86: 2380 movs r3, #128 ; 0x80 + 8001d88: 049b lsls r3, r3, #18 + 8001d8a: 4013 ands r3, r2 + 8001d8c: d108 bne.n 8001da0 { return HAL_ERROR; - 80012e2: 2301 movs r3, #1 - 80012e4: e062 b.n 80013ac + 8001d8e: 2301 movs r3, #1 + 8001d90: e062 b.n 8001e58 #endif /* RCC_CFGR_SWS_HSI48 */ /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 80012e6: 4b34 ldr r3, [pc, #208] ; (80013b8 ) - 80012e8: 681b ldr r3, [r3, #0] - 80012ea: 2202 movs r2, #2 - 80012ec: 4013 ands r3, r2 - 80012ee: d101 bne.n 80012f4 + 8001d92: 4b34 ldr r3, [pc, #208] ; (8001e64 ) + 8001d94: 681b ldr r3, [r3, #0] + 8001d96: 2202 movs r2, #2 + 8001d98: 4013 ands r3, r2 + 8001d9a: d101 bne.n 8001da0 { return HAL_ERROR; - 80012f0: 2301 movs r3, #1 - 80012f2: e05b b.n 80013ac + 8001d9c: 2301 movs r3, #1 + 8001d9e: e05b b.n 8001e58 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 80012f4: 4b30 ldr r3, [pc, #192] ; (80013b8 ) - 80012f6: 685b ldr r3, [r3, #4] - 80012f8: 2203 movs r2, #3 - 80012fa: 4393 bics r3, r2 - 80012fc: 0019 movs r1, r3 - 80012fe: 687b ldr r3, [r7, #4] - 8001300: 685a ldr r2, [r3, #4] - 8001302: 4b2d ldr r3, [pc, #180] ; (80013b8 ) - 8001304: 430a orrs r2, r1 - 8001306: 605a str r2, [r3, #4] + 8001da0: 4b30 ldr r3, [pc, #192] ; (8001e64 ) + 8001da2: 685b ldr r3, [r3, #4] + 8001da4: 2203 movs r2, #3 + 8001da6: 4393 bics r3, r2 + 8001da8: 0019 movs r1, r3 + 8001daa: 687b ldr r3, [r7, #4] + 8001dac: 685a ldr r2, [r3, #4] + 8001dae: 4b2d ldr r3, [pc, #180] ; (8001e64 ) + 8001db0: 430a orrs r2, r1 + 8001db2: 605a str r2, [r3, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001308: f7ff fa10 bl 800072c - 800130c: 0003 movs r3, r0 - 800130e: 60fb str r3, [r7, #12] + 8001db4: f7fe fd60 bl 8000878 + 8001db8: 0003 movs r3, r0 + 8001dba: 60fb str r3, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 8001310: e009 b.n 8001326 + 8001dbc: e009 b.n 8001dd2 { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 8001312: f7ff fa0b bl 800072c - 8001316: 0002 movs r2, r0 - 8001318: 68fb ldr r3, [r7, #12] - 800131a: 1ad3 subs r3, r2, r3 - 800131c: 4a27 ldr r2, [pc, #156] ; (80013bc ) - 800131e: 4293 cmp r3, r2 - 8001320: d901 bls.n 8001326 + 8001dbe: f7fe fd5b bl 8000878 + 8001dc2: 0002 movs r2, r0 + 8001dc4: 68fb ldr r3, [r7, #12] + 8001dc6: 1ad3 subs r3, r2, r3 + 8001dc8: 4a27 ldr r2, [pc, #156] ; (8001e68 ) + 8001dca: 4293 cmp r3, r2 + 8001dcc: d901 bls.n 8001dd2 { return HAL_TIMEOUT; - 8001322: 2303 movs r3, #3 - 8001324: e042 b.n 80013ac + 8001dce: 2303 movs r3, #3 + 8001dd0: e042 b.n 8001e58 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 8001326: 4b24 ldr r3, [pc, #144] ; (80013b8 ) - 8001328: 685b ldr r3, [r3, #4] - 800132a: 220c movs r2, #12 - 800132c: 401a ands r2, r3 - 800132e: 687b ldr r3, [r7, #4] - 8001330: 685b ldr r3, [r3, #4] - 8001332: 009b lsls r3, r3, #2 - 8001334: 429a cmp r2, r3 - 8001336: d1ec bne.n 8001312 + 8001dd2: 4b24 ldr r3, [pc, #144] ; (8001e64 ) + 8001dd4: 685b ldr r3, [r3, #4] + 8001dd6: 220c movs r2, #12 + 8001dd8: 401a ands r2, r3 + 8001dda: 687b ldr r3, [r7, #4] + 8001ddc: 685b ldr r3, [r3, #4] + 8001dde: 009b lsls r3, r3, #2 + 8001de0: 429a cmp r2, r3 + 8001de2: d1ec bne.n 8001dbe } } } /* Decreasing the number of wait states because of lower CPU frequency */ if(FLatency < __HAL_FLASH_GET_LATENCY()) - 8001338: 4b1e ldr r3, [pc, #120] ; (80013b4 ) - 800133a: 681b ldr r3, [r3, #0] - 800133c: 2201 movs r2, #1 - 800133e: 4013 ands r3, r2 - 8001340: 683a ldr r2, [r7, #0] - 8001342: 429a cmp r2, r3 - 8001344: d211 bcs.n 800136a + 8001de4: 4b1e ldr r3, [pc, #120] ; (8001e60 ) + 8001de6: 681b ldr r3, [r3, #0] + 8001de8: 2201 movs r2, #1 + 8001dea: 4013 ands r3, r2 + 8001dec: 683a ldr r2, [r7, #0] + 8001dee: 429a cmp r2, r3 + 8001df0: d211 bcs.n 8001e16 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8001346: 4b1b ldr r3, [pc, #108] ; (80013b4 ) - 8001348: 681b ldr r3, [r3, #0] - 800134a: 2201 movs r2, #1 - 800134c: 4393 bics r3, r2 - 800134e: 0019 movs r1, r3 - 8001350: 4b18 ldr r3, [pc, #96] ; (80013b4 ) - 8001352: 683a ldr r2, [r7, #0] - 8001354: 430a orrs r2, r1 - 8001356: 601a str r2, [r3, #0] + 8001df2: 4b1b ldr r3, [pc, #108] ; (8001e60 ) + 8001df4: 681b ldr r3, [r3, #0] + 8001df6: 2201 movs r2, #1 + 8001df8: 4393 bics r3, r2 + 8001dfa: 0019 movs r1, r3 + 8001dfc: 4b18 ldr r3, [pc, #96] ; (8001e60 ) + 8001dfe: 683a ldr r2, [r7, #0] + 8001e00: 430a orrs r2, r1 + 8001e02: 601a str r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 8001358: 4b16 ldr r3, [pc, #88] ; (80013b4 ) - 800135a: 681b ldr r3, [r3, #0] - 800135c: 2201 movs r2, #1 - 800135e: 4013 ands r3, r2 - 8001360: 683a ldr r2, [r7, #0] - 8001362: 429a cmp r2, r3 - 8001364: d001 beq.n 800136a + 8001e04: 4b16 ldr r3, [pc, #88] ; (8001e60 ) + 8001e06: 681b ldr r3, [r3, #0] + 8001e08: 2201 movs r2, #1 + 8001e0a: 4013 ands r3, r2 + 8001e0c: 683a ldr r2, [r7, #0] + 8001e0e: 429a cmp r2, r3 + 8001e10: d001 beq.n 8001e16 { return HAL_ERROR; - 8001366: 2301 movs r3, #1 - 8001368: e020 b.n 80013ac + 8001e12: 2301 movs r3, #1 + 8001e14: e020 b.n 8001e58 } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 800136a: 687b ldr r3, [r7, #4] - 800136c: 681b ldr r3, [r3, #0] - 800136e: 2204 movs r2, #4 - 8001370: 4013 ands r3, r2 - 8001372: d009 beq.n 8001388 + 8001e16: 687b ldr r3, [r7, #4] + 8001e18: 681b ldr r3, [r3, #0] + 8001e1a: 2204 movs r2, #4 + 8001e1c: 4013 ands r3, r2 + 8001e1e: d009 beq.n 8001e34 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); - 8001374: 4b10 ldr r3, [pc, #64] ; (80013b8 ) - 8001376: 685b ldr r3, [r3, #4] - 8001378: 4a11 ldr r2, [pc, #68] ; (80013c0 ) - 800137a: 4013 ands r3, r2 - 800137c: 0019 movs r1, r3 - 800137e: 687b ldr r3, [r7, #4] - 8001380: 68da ldr r2, [r3, #12] - 8001382: 4b0d ldr r3, [pc, #52] ; (80013b8 ) - 8001384: 430a orrs r2, r1 - 8001386: 605a str r2, [r3, #4] + 8001e20: 4b10 ldr r3, [pc, #64] ; (8001e64 ) + 8001e22: 685b ldr r3, [r3, #4] + 8001e24: 4a11 ldr r2, [pc, #68] ; (8001e6c ) + 8001e26: 4013 ands r3, r2 + 8001e28: 0019 movs r1, r3 + 8001e2a: 687b ldr r3, [r7, #4] + 8001e2c: 68da ldr r2, [r3, #12] + 8001e2e: 4b0d ldr r3, [pc, #52] ; (8001e64 ) + 8001e30: 430a orrs r2, r1 + 8001e32: 605a str r2, [r3, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER]; - 8001388: f000 f820 bl 80013cc - 800138c: 0001 movs r1, r0 - 800138e: 4b0a ldr r3, [pc, #40] ; (80013b8 ) - 8001390: 685b ldr r3, [r3, #4] - 8001392: 091b lsrs r3, r3, #4 - 8001394: 220f movs r2, #15 - 8001396: 4013 ands r3, r2 - 8001398: 4a0a ldr r2, [pc, #40] ; (80013c4 ) - 800139a: 5cd3 ldrb r3, [r2, r3] - 800139c: 000a movs r2, r1 - 800139e: 40da lsrs r2, r3 - 80013a0: 4b09 ldr r3, [pc, #36] ; (80013c8 ) - 80013a2: 601a str r2, [r3, #0] + 8001e34: f000 f820 bl 8001e78 + 8001e38: 0001 movs r1, r0 + 8001e3a: 4b0a ldr r3, [pc, #40] ; (8001e64 ) + 8001e3c: 685b ldr r3, [r3, #4] + 8001e3e: 091b lsrs r3, r3, #4 + 8001e40: 220f movs r2, #15 + 8001e42: 4013 ands r3, r2 + 8001e44: 4a0a ldr r2, [pc, #40] ; (8001e70 ) + 8001e46: 5cd3 ldrb r3, [r2, r3] + 8001e48: 000a movs r2, r1 + 8001e4a: 40da lsrs r2, r3 + 8001e4c: 4b09 ldr r3, [pc, #36] ; (8001e74 ) + 8001e4e: 601a str r2, [r3, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick (TICK_INT_PRIORITY); - 80013a4: 2003 movs r0, #3 - 80013a6: f7ff f97b bl 80006a0 + 8001e50: 2003 movs r0, #3 + 8001e52: f7fe fccb bl 80007ec return HAL_OK; - 80013aa: 2300 movs r3, #0 + 8001e56: 2300 movs r3, #0 } - 80013ac: 0018 movs r0, r3 - 80013ae: 46bd mov sp, r7 - 80013b0: b004 add sp, #16 - 80013b2: bd80 pop {r7, pc} - 80013b4: 40022000 .word 0x40022000 - 80013b8: 40021000 .word 0x40021000 - 80013bc: 00001388 .word 0x00001388 - 80013c0: fffff8ff .word 0xfffff8ff - 80013c4: 080024c8 .word 0x080024c8 - 80013c8: 20000000 .word 0x20000000 + 8001e58: 0018 movs r0, r3 + 8001e5a: 46bd mov sp, r7 + 8001e5c: b004 add sp, #16 + 8001e5e: bd80 pop {r7, pc} + 8001e60: 40022000 .word 0x40022000 + 8001e64: 40021000 .word 0x40021000 + 8001e68: 00001388 .word 0x00001388 + 8001e6c: fffff8ff .word 0xfffff8ff + 8001e70: 0800306c .word 0x0800306c + 8001e74: 20000000 .word 0x20000000 -080013cc : +08001e78 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 80013cc: b590 push {r4, r7, lr} - 80013ce: b08f sub sp, #60 ; 0x3c - 80013d0: af00 add r7, sp, #0 + 8001e78: b590 push {r4, r7, lr} + 8001e7a: b08f sub sp, #60 ; 0x3c + 8001e7c: af00 add r7, sp, #0 const uint8_t aPLLMULFactorTable[16] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U, - 80013d2: 2314 movs r3, #20 - 80013d4: 18fb adds r3, r7, r3 - 80013d6: 4a2b ldr r2, [pc, #172] ; (8001484 ) - 80013d8: ca13 ldmia r2!, {r0, r1, r4} - 80013da: c313 stmia r3!, {r0, r1, r4} - 80013dc: 6812 ldr r2, [r2, #0] - 80013de: 601a str r2, [r3, #0] + 8001e7e: 2314 movs r3, #20 + 8001e80: 18fb adds r3, r7, r3 + 8001e82: 4a2b ldr r2, [pc, #172] ; (8001f30 ) + 8001e84: ca13 ldmia r2!, {r0, r1, r4} + 8001e86: c313 stmia r3!, {r0, r1, r4} + 8001e88: 6812 ldr r2, [r2, #0] + 8001e8a: 601a str r2, [r3, #0] 10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U}; const uint8_t aPredivFactorTable[16] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U, - 80013e0: 1d3b adds r3, r7, #4 - 80013e2: 4a29 ldr r2, [pc, #164] ; (8001488 ) - 80013e4: ca13 ldmia r2!, {r0, r1, r4} - 80013e6: c313 stmia r3!, {r0, r1, r4} - 80013e8: 6812 ldr r2, [r2, #0] - 80013ea: 601a str r2, [r3, #0] + 8001e8c: 1d3b adds r3, r7, #4 + 8001e8e: 4a29 ldr r2, [pc, #164] ; (8001f34 ) + 8001e90: ca13 ldmia r2!, {r0, r1, r4} + 8001e92: c313 stmia r3!, {r0, r1, r4} + 8001e94: 6812 ldr r2, [r2, #0] + 8001e96: 601a str r2, [r3, #0] 9U,10U, 11U, 12U, 13U, 14U, 15U, 16U}; uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; - 80013ec: 2300 movs r3, #0 - 80013ee: 62fb str r3, [r7, #44] ; 0x2c - 80013f0: 2300 movs r3, #0 - 80013f2: 62bb str r3, [r7, #40] ; 0x28 - 80013f4: 2300 movs r3, #0 - 80013f6: 637b str r3, [r7, #52] ; 0x34 - 80013f8: 2300 movs r3, #0 - 80013fa: 627b str r3, [r7, #36] ; 0x24 + 8001e98: 2300 movs r3, #0 + 8001e9a: 62fb str r3, [r7, #44] ; 0x2c + 8001e9c: 2300 movs r3, #0 + 8001e9e: 62bb str r3, [r7, #40] ; 0x28 + 8001ea0: 2300 movs r3, #0 + 8001ea2: 637b str r3, [r7, #52] ; 0x34 + 8001ea4: 2300 movs r3, #0 + 8001ea6: 627b str r3, [r7, #36] ; 0x24 uint32_t sysclockfreq = 0U; - 80013fc: 2300 movs r3, #0 - 80013fe: 633b str r3, [r7, #48] ; 0x30 + 8001ea8: 2300 movs r3, #0 + 8001eaa: 633b str r3, [r7, #48] ; 0x30 tmpreg = RCC->CFGR; - 8001400: 4b22 ldr r3, [pc, #136] ; (800148c ) - 8001402: 685b ldr r3, [r3, #4] - 8001404: 62fb str r3, [r7, #44] ; 0x2c + 8001eac: 4b22 ldr r3, [pc, #136] ; (8001f38 ) + 8001eae: 685b ldr r3, [r3, #4] + 8001eb0: 62fb str r3, [r7, #44] ; 0x2c /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) - 8001406: 6afb ldr r3, [r7, #44] ; 0x2c - 8001408: 220c movs r2, #12 - 800140a: 4013 ands r3, r2 - 800140c: 2b04 cmp r3, #4 - 800140e: d002 beq.n 8001416 - 8001410: 2b08 cmp r3, #8 - 8001412: d003 beq.n 800141c - 8001414: e02d b.n 8001472 + 8001eb2: 6afb ldr r3, [r7, #44] ; 0x2c + 8001eb4: 220c movs r2, #12 + 8001eb6: 4013 ands r3, r2 + 8001eb8: 2b04 cmp r3, #4 + 8001eba: d002 beq.n 8001ec2 + 8001ebc: 2b08 cmp r3, #8 + 8001ebe: d003 beq.n 8001ec8 + 8001ec0: e02d b.n 8001f1e { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; - 8001416: 4b1e ldr r3, [pc, #120] ; (8001490 ) - 8001418: 633b str r3, [r7, #48] ; 0x30 + 8001ec2: 4b1e ldr r3, [pc, #120] ; (8001f3c ) + 8001ec4: 633b str r3, [r7, #48] ; 0x30 break; - 800141a: e02d b.n 8001478 + 8001ec6: e02d b.n 8001f24 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER]; - 800141c: 6afb ldr r3, [r7, #44] ; 0x2c - 800141e: 0c9b lsrs r3, r3, #18 - 8001420: 220f movs r2, #15 - 8001422: 4013 ands r3, r2 - 8001424: 2214 movs r2, #20 - 8001426: 18ba adds r2, r7, r2 - 8001428: 5cd3 ldrb r3, [r2, r3] - 800142a: 627b str r3, [r7, #36] ; 0x24 + 8001ec8: 6afb ldr r3, [r7, #44] ; 0x2c + 8001eca: 0c9b lsrs r3, r3, #18 + 8001ecc: 220f movs r2, #15 + 8001ece: 4013 ands r3, r2 + 8001ed0: 2214 movs r2, #20 + 8001ed2: 18ba adds r2, r7, r2 + 8001ed4: 5cd3 ldrb r3, [r2, r3] + 8001ed6: 627b str r3, [r7, #36] ; 0x24 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BITNUMBER]; - 800142c: 4b17 ldr r3, [pc, #92] ; (800148c ) - 800142e: 6adb ldr r3, [r3, #44] ; 0x2c - 8001430: 220f movs r2, #15 - 8001432: 4013 ands r3, r2 - 8001434: 1d3a adds r2, r7, #4 - 8001436: 5cd3 ldrb r3, [r2, r3] - 8001438: 62bb str r3, [r7, #40] ; 0x28 + 8001ed8: 4b17 ldr r3, [pc, #92] ; (8001f38 ) + 8001eda: 6adb ldr r3, [r3, #44] ; 0x2c + 8001edc: 220f movs r2, #15 + 8001ede: 4013 ands r3, r2 + 8001ee0: 1d3a adds r2, r7, #4 + 8001ee2: 5cd3 ldrb r3, [r2, r3] + 8001ee4: 62bb str r3, [r7, #40] ; 0x28 if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) - 800143a: 6afa ldr r2, [r7, #44] ; 0x2c - 800143c: 2380 movs r3, #128 ; 0x80 - 800143e: 025b lsls r3, r3, #9 - 8001440: 4013 ands r3, r2 - 8001442: d009 beq.n 8001458 + 8001ee6: 6afa ldr r2, [r7, #44] ; 0x2c + 8001ee8: 2380 movs r3, #128 ; 0x80 + 8001eea: 025b lsls r3, r3, #9 + 8001eec: 4013 ands r3, r2 + 8001eee: d009 beq.n 8001f04 { /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); - 8001444: 6ab9 ldr r1, [r7, #40] ; 0x28 - 8001446: 4812 ldr r0, [pc, #72] ; (8001490 ) - 8001448: f7fe fe5e bl 8000108 <__udivsi3> - 800144c: 0003 movs r3, r0 - 800144e: 001a movs r2, r3 - 8001450: 6a7b ldr r3, [r7, #36] ; 0x24 - 8001452: 4353 muls r3, r2 - 8001454: 637b str r3, [r7, #52] ; 0x34 - 8001456: e009 b.n 800146c + 8001ef0: 6ab9 ldr r1, [r7, #40] ; 0x28 + 8001ef2: 4812 ldr r0, [pc, #72] ; (8001f3c ) + 8001ef4: f7fe f908 bl 8000108 <__udivsi3> + 8001ef8: 0003 movs r3, r0 + 8001efa: 001a movs r2, r3 + 8001efc: 6a7b ldr r3, [r7, #36] ; 0x24 + 8001efe: 4353 muls r3, r2 + 8001f00: 637b str r3, [r7, #52] ; 0x34 + 8001f02: e009 b.n 8001f18 #if (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)) /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); #else /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); - 8001458: 6a79 ldr r1, [r7, #36] ; 0x24 - 800145a: 000a movs r2, r1 - 800145c: 0152 lsls r2, r2, #5 - 800145e: 1a52 subs r2, r2, r1 - 8001460: 0193 lsls r3, r2, #6 - 8001462: 1a9b subs r3, r3, r2 - 8001464: 00db lsls r3, r3, #3 - 8001466: 185b adds r3, r3, r1 - 8001468: 021b lsls r3, r3, #8 - 800146a: 637b str r3, [r7, #52] ; 0x34 + 8001f04: 6a79 ldr r1, [r7, #36] ; 0x24 + 8001f06: 000a movs r2, r1 + 8001f08: 0152 lsls r2, r2, #5 + 8001f0a: 1a52 subs r2, r2, r1 + 8001f0c: 0193 lsls r3, r2, #6 + 8001f0e: 1a9b subs r3, r3, r2 + 8001f10: 00db lsls r3, r3, #3 + 8001f12: 185b adds r3, r3, r1 + 8001f14: 021b lsls r3, r3, #8 + 8001f16: 637b str r3, [r7, #52] ; 0x34 #endif } sysclockfreq = pllclk; - 800146c: 6b7b ldr r3, [r7, #52] ; 0x34 - 800146e: 633b str r3, [r7, #48] ; 0x30 + 8001f18: 6b7b ldr r3, [r7, #52] ; 0x34 + 8001f1a: 633b str r3, [r7, #48] ; 0x30 break; - 8001470: e002 b.n 8001478 + 8001f1c: e002 b.n 8001f24 } #endif /* RCC_CFGR_SWS_HSI48 */ case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; - 8001472: 4b07 ldr r3, [pc, #28] ; (8001490 ) - 8001474: 633b str r3, [r7, #48] ; 0x30 + 8001f1e: 4b07 ldr r3, [pc, #28] ; (8001f3c ) + 8001f20: 633b str r3, [r7, #48] ; 0x30 break; - 8001476: 46c0 nop ; (mov r8, r8) + 8001f22: 46c0 nop ; (mov r8, r8) } } return sysclockfreq; - 8001478: 6b3b ldr r3, [r7, #48] ; 0x30 + 8001f24: 6b3b ldr r3, [r7, #48] ; 0x30 } - 800147a: 0018 movs r0, r3 - 800147c: 46bd mov sp, r7 - 800147e: b00f add sp, #60 ; 0x3c - 8001480: bd90 pop {r4, r7, pc} - 8001482: 46c0 nop ; (mov r8, r8) - 8001484: 080024a8 .word 0x080024a8 - 8001488: 080024b8 .word 0x080024b8 - 800148c: 40021000 .word 0x40021000 - 8001490: 007a1200 .word 0x007a1200 + 8001f26: 0018 movs r0, r3 + 8001f28: 46bd mov sp, r7 + 8001f2a: b00f add sp, #60 ; 0x3c + 8001f2c: bd90 pop {r4, r7, pc} + 8001f2e: 46c0 nop ; (mov r8, r8) + 8001f30: 0800304c .word 0x0800304c + 8001f34: 0800305c .word 0x0800305c + 8001f38: 40021000 .word 0x40021000 + 8001f3c: 007a1200 .word 0x007a1200 -08001494 : +08001f40 : */ #include "button.h" void GEI_BUTTON_CODE(struct button *bt,uint8_t in) { - 8001494: b580 push {r7, lr} - 8001496: b082 sub sp, #8 - 8001498: af00 add r7, sp, #0 - 800149a: 6078 str r0, [r7, #4] - 800149c: 000a movs r2, r1 - 800149e: 1cfb adds r3, r7, #3 - 80014a0: 701a strb r2, [r3, #0] + 8001f40: b580 push {r7, lr} + 8001f42: b082 sub sp, #8 + 8001f44: af00 add r7, sp, #0 + 8001f46: 6078 str r0, [r7, #4] + 8001f48: 000a movs r2, r1 + 8001f4a: 1cfb adds r3, r7, #3 + 8001f4c: 701a strb r2, [r3, #0] #define t 250 bt->code=0; - 80014a2: 687b ldr r3, [r7, #4] - 80014a4: 2200 movs r2, #0 - 80014a6: 601a str r2, [r3, #0] + 8001f4e: 687b ldr r3, [r7, #4] + 8001f50: 2200 movs r2, #0 + 8001f52: 601a str r2, [r3, #0] if(in==1) - 80014a8: 1cfb adds r3, r7, #3 - 80014aa: 781b ldrb r3, [r3, #0] - 80014ac: 2b01 cmp r3, #1 - 80014ae: d138 bne.n 8001522 + 8001f54: 1cfb adds r3, r7, #3 + 8001f56: 781b ldrb r3, [r3, #0] + 8001f58: 2b01 cmp r3, #1 + 8001f5a: d138 bne.n 8001fce { if(bt->lock==0) - 80014b0: 687b ldr r3, [r7, #4] - 80014b2: 791b ldrb r3, [r3, #4] - 80014b4: 2b00 cmp r3, #0 - 80014b6: d120 bne.n 80014fa + 8001f5c: 687b ldr r3, [r7, #4] + 8001f5e: 791b ldrb r3, [r3, #4] + 8001f60: 2b00 cmp r3, #0 + 8001f62: d120 bne.n 8001fa6 { if(HAL_GetTick()time+t) - 80014b8: f7ff f938 bl 800072c - 80014bc: 0002 movs r2, r0 - 80014be: 687b ldr r3, [r7, #4] - 80014c0: 689b ldr r3, [r3, #8] - 80014c2: 33fa adds r3, #250 ; 0xfa - 80014c4: 429a cmp r2, r3 - 80014c6: d20d bcs.n 80014e4 + 8001f64: f7fe fc88 bl 8000878 + 8001f68: 0002 movs r2, r0 + 8001f6a: 687b ldr r3, [r7, #4] + 8001f6c: 689b ldr r3, [r3, #8] + 8001f6e: 33fa adds r3, #250 ; 0xfa + 8001f70: 429a cmp r2, r3 + 8001f72: d20d bcs.n 8001f90 { bt->times++; - 80014c8: 687b ldr r3, [r7, #4] - 80014ca: 68db ldr r3, [r3, #12] - 80014cc: 1c5a adds r2, r3, #1 - 80014ce: 687b ldr r3, [r7, #4] - 80014d0: 60da str r2, [r3, #12] + 8001f74: 687b ldr r3, [r7, #4] + 8001f76: 68db ldr r3, [r3, #12] + 8001f78: 1c5a adds r2, r3, #1 + 8001f7a: 687b ldr r3, [r7, #4] + 8001f7c: 60da str r2, [r3, #12] bt->time=HAL_GetTick(); - 80014d2: f7ff f92b bl 800072c - 80014d6: 0002 movs r2, r0 - 80014d8: 687b ldr r3, [r7, #4] - 80014da: 609a str r2, [r3, #8] + 8001f7e: f7fe fc7b bl 8000878 + 8001f82: 0002 movs r2, r0 + 8001f84: 687b ldr r3, [r7, #4] + 8001f86: 609a str r2, [r3, #8] bt->lock=1; - 80014dc: 687b ldr r3, [r7, #4] - 80014de: 2201 movs r2, #1 - 80014e0: 711a strb r2, [r3, #4] - 80014e2: e00a b.n 80014fa + 8001f88: 687b ldr r3, [r7, #4] + 8001f8a: 2201 movs r2, #1 + 8001f8c: 711a strb r2, [r3, #4] + 8001f8e: e00a b.n 8001fa6 }else { bt->times=1; - 80014e4: 687b ldr r3, [r7, #4] - 80014e6: 2201 movs r2, #1 - 80014e8: 60da str r2, [r3, #12] + 8001f90: 687b ldr r3, [r7, #4] + 8001f92: 2201 movs r2, #1 + 8001f94: 60da str r2, [r3, #12] bt->time=HAL_GetTick(); - 80014ea: f7ff f91f bl 800072c - 80014ee: 0002 movs r2, r0 - 80014f0: 687b ldr r3, [r7, #4] - 80014f2: 609a str r2, [r3, #8] + 8001f96: f7fe fc6f bl 8000878 + 8001f9a: 0002 movs r2, r0 + 8001f9c: 687b ldr r3, [r7, #4] + 8001f9e: 609a str r2, [r3, #8] bt->lock=1; - 80014f4: 687b ldr r3, [r7, #4] - 80014f6: 2201 movs r2, #1 - 80014f8: 711a strb r2, [r3, #4] + 8001fa0: 687b ldr r3, [r7, #4] + 8001fa2: 2201 movs r2, #1 + 8001fa4: 711a strb r2, [r3, #4] } } if(bt->lock==1) - 80014fa: 687b ldr r3, [r7, #4] - 80014fc: 791b ldrb r3, [r3, #4] - 80014fe: 2b01 cmp r3, #1 - 8001500: d10f bne.n 8001522 + 8001fa6: 687b ldr r3, [r7, #4] + 8001fa8: 791b ldrb r3, [r3, #4] + 8001faa: 2b01 cmp r3, #1 + 8001fac: d10f bne.n 8001fce { if(HAL_GetTick()>bt->time+t) - 8001502: f7ff f913 bl 800072c - 8001506: 0002 movs r2, r0 - 8001508: 687b ldr r3, [r7, #4] - 800150a: 689b ldr r3, [r3, #8] - 800150c: 33fa adds r3, #250 ; 0xfa - 800150e: 429a cmp r2, r3 - 8001510: d907 bls.n 8001522 + 8001fae: f7fe fc63 bl 8000878 + 8001fb2: 0002 movs r2, r0 + 8001fb4: 687b ldr r3, [r7, #4] + 8001fb6: 689b ldr r3, [r3, #8] + 8001fb8: 33fa adds r3, #250 ; 0xfa + 8001fba: 429a cmp r2, r3 + 8001fbc: d907 bls.n 8001fce { bt->code=-1; - 8001512: 687b ldr r3, [r7, #4] - 8001514: 2201 movs r2, #1 - 8001516: 4252 negs r2, r2 - 8001518: 601a str r2, [r3, #0] + 8001fbe: 687b ldr r3, [r7, #4] + 8001fc0: 2201 movs r2, #1 + 8001fc2: 4252 negs r2, r2 + 8001fc4: 601a str r2, [r3, #0] bt->times=-1; - 800151a: 687b ldr r3, [r7, #4] - 800151c: 2201 movs r2, #1 - 800151e: 4252 negs r2, r2 - 8001520: 60da str r2, [r3, #12] + 8001fc6: 687b ldr r3, [r7, #4] + 8001fc8: 2201 movs r2, #1 + 8001fca: 4252 negs r2, r2 + 8001fcc: 60da str r2, [r3, #12] } } } if(in==0) - 8001522: 1cfb adds r3, r7, #3 - 8001524: 781b ldrb r3, [r3, #0] - 8001526: 2b00 cmp r3, #0 - 8001528: d10e bne.n 8001548 + 8001fce: 1cfb adds r3, r7, #3 + 8001fd0: 781b ldrb r3, [r3, #0] + 8001fd2: 2b00 cmp r3, #0 + 8001fd4: d10e bne.n 8001ff4 { if(bt->lock==1) - 800152a: 687b ldr r3, [r7, #4] - 800152c: 791b ldrb r3, [r3, #4] - 800152e: 2b01 cmp r3, #1 - 8001530: d10a bne.n 8001548 + 8001fd6: 687b ldr r3, [r7, #4] + 8001fd8: 791b ldrb r3, [r3, #4] + 8001fda: 2b01 cmp r3, #1 + 8001fdc: d10a bne.n 8001ff4 { if(bt->code==-1) - 8001532: 687b ldr r3, [r7, #4] - 8001534: 681b ldr r3, [r3, #0] - 8001536: 3301 adds r3, #1 - 8001538: d003 beq.n 8001542 + 8001fde: 687b ldr r3, [r7, #4] + 8001fe0: 681b ldr r3, [r3, #0] + 8001fe2: 3301 adds r3, #1 + 8001fe4: d003 beq.n 8001fee { }else { bt->code=bt->times; - 800153a: 687b ldr r3, [r7, #4] - 800153c: 68da ldr r2, [r3, #12] - 800153e: 687b ldr r3, [r7, #4] - 8001540: 601a str r2, [r3, #0] + 8001fe6: 687b ldr r3, [r7, #4] + 8001fe8: 68da ldr r2, [r3, #12] + 8001fea: 687b ldr r3, [r7, #4] + 8001fec: 601a str r2, [r3, #0] } bt->lock=0; - 8001542: 687b ldr r3, [r7, #4] - 8001544: 2200 movs r2, #0 - 8001546: 711a strb r2, [r3, #4] + 8001fee: 687b ldr r3, [r7, #4] + 8001ff0: 2200 movs r2, #0 + 8001ff2: 711a strb r2, [r3, #4] } } } - 8001548: 46c0 nop ; (mov r8, r8) - 800154a: 46bd mov sp, r7 - 800154c: b002 add sp, #8 - 800154e: bd80 pop {r7, pc} + 8001ff4: 46c0 nop ; (mov r8, r8) + 8001ff6: 46bd mov sp, r7 + 8001ff8: b002 add sp, #8 + 8001ffa: bd80 pop {r7, pc} -08001550 : +08001ffc : char moto2b_; }moto; void ds_in_or_out(char a)//change the io function { - 8001550: b590 push {r4, r7, lr} - 8001552: b089 sub sp, #36 ; 0x24 - 8001554: af00 add r7, sp, #0 - 8001556: 0002 movs r2, r0 - 8001558: 1dfb adds r3, r7, #7 - 800155a: 701a strb r2, [r3, #0] + 8001ffc: b590 push {r4, r7, lr} + 8001ffe: b089 sub sp, #36 ; 0x24 + 8002000: af00 add r7, sp, #0 + 8002002: 0002 movs r2, r0 + 8002004: 1dfb adds r3, r7, #7 + 8002006: 701a strb r2, [r3, #0] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 800155c: 240c movs r4, #12 - 800155e: 193b adds r3, r7, r4 - 8001560: 0018 movs r0, r3 - 8001562: 2314 movs r3, #20 - 8001564: 001a movs r2, r3 - 8001566: 2100 movs r1, #0 - 8001568: f000 ff8a bl 8002480 + 8002008: 240c movs r4, #12 + 800200a: 193b adds r3, r7, r4 + 800200c: 0018 movs r0, r3 + 800200e: 2314 movs r3, #20 + 8002010: 001a movs r2, r3 + 8002012: 2100 movs r1, #0 + 8002014: f001 f806 bl 8003024 GPIO_InitStruct.Pin = HC595_DLK_Pin; - 800156c: 0021 movs r1, r4 - 800156e: 187b adds r3, r7, r1 - 8001570: 2220 movs r2, #32 - 8001572: 601a str r2, [r3, #0] + 8002018: 0021 movs r1, r4 + 800201a: 187b adds r3, r7, r1 + 800201c: 2220 movs r2, #32 + 800201e: 601a str r2, [r3, #0] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - 8001574: 187b adds r3, r7, r1 - 8001576: 2203 movs r2, #3 - 8001578: 60da str r2, [r3, #12] + 8002020: 187b adds r3, r7, r1 + 8002022: 2203 movs r2, #3 + 8002024: 60da str r2, [r3, #12] if(a==0) - 800157a: 1dfb adds r3, r7, #7 - 800157c: 781b ldrb r3, [r3, #0] - 800157e: 2b00 cmp r3, #0 - 8001580: d105 bne.n 800158e + 8002026: 1dfb adds r3, r7, #7 + 8002028: 781b ldrb r3, [r3, #0] + 800202a: 2b00 cmp r3, #0 + 800202c: d105 bne.n 800203a { GPIO_InitStruct.Pull = GPIO_PULLUP; - 8001582: 187b adds r3, r7, r1 - 8001584: 2201 movs r2, #1 - 8001586: 609a str r2, [r3, #8] + 800202e: 187b adds r3, r7, r1 + 8002030: 2201 movs r2, #1 + 8002032: 609a str r2, [r3, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8001588: 187b adds r3, r7, r1 - 800158a: 2200 movs r2, #0 - 800158c: 605a str r2, [r3, #4] + 8002034: 187b adds r3, r7, r1 + 8002036: 2200 movs r2, #0 + 8002038: 605a str r2, [r3, #4] } if(a==1) - 800158e: 1dfb adds r3, r7, #7 - 8001590: 781b ldrb r3, [r3, #0] - 8001592: 2b01 cmp r3, #1 - 8001594: d106 bne.n 80015a4 + 800203a: 1dfb adds r3, r7, #7 + 800203c: 781b ldrb r3, [r3, #0] + 800203e: 2b01 cmp r3, #1 + 8002040: d106 bne.n 8002050 { GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001596: 210c movs r1, #12 - 8001598: 187b adds r3, r7, r1 - 800159a: 2200 movs r2, #0 - 800159c: 609a str r2, [r3, #8] + 8002042: 210c movs r1, #12 + 8002044: 187b adds r3, r7, r1 + 8002046: 2200 movs r2, #0 + 8002048: 609a str r2, [r3, #8] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 800159e: 187b adds r3, r7, r1 - 80015a0: 2201 movs r2, #1 - 80015a2: 605a str r2, [r3, #4] + 800204a: 187b adds r3, r7, r1 + 800204c: 2201 movs r2, #1 + 800204e: 605a str r2, [r3, #4] } HAL_GPIO_Init(HC595_DLK_GPIO_Port, &GPIO_InitStruct); - 80015a4: 230c movs r3, #12 - 80015a6: 18fa adds r2, r7, r3 - 80015a8: 2390 movs r3, #144 ; 0x90 - 80015aa: 05db lsls r3, r3, #23 - 80015ac: 0011 movs r1, r2 - 80015ae: 0018 movs r0, r3 - 80015b0: f7ff f97a bl 80008a8 + 8002050: 230c movs r3, #12 + 8002052: 18fa adds r2, r7, r3 + 8002054: 2390 movs r3, #144 ; 0x90 + 8002056: 05db lsls r3, r3, #23 + 8002058: 0011 movs r1, r2 + 800205a: 0018 movs r0, r3 + 800205c: f7ff f97a bl 8001354 } - 80015b4: 46c0 nop ; (mov r8, r8) - 80015b6: 46bd mov sp, r7 - 80015b8: b009 add sp, #36 ; 0x24 - 80015ba: bd90 pop {r4, r7, pc} + 8002060: 46c0 nop ; (mov r8, r8) + 8002062: 46bd mov sp, r7 + 8002064: b009 add sp, #36 ; 0x24 + 8002066: bd90 pop {r4, r7, pc} -080015bc : +08002068 : uint8_t Read_Ds() { - 80015bc: b580 push {r7, lr} - 80015be: af00 add r7, sp, #0 + 8002068: b580 push {r7, lr} + 800206a: af00 add r7, sp, #0 ds_in_or_out(0); - 80015c0: 2000 movs r0, #0 - 80015c2: f7ff ffc5 bl 8001550 + 800206c: 2000 movs r0, #0 + 800206e: f7ff ffc5 bl 8001ffc if(READ_HC595_DCK){return 0;}else{return 1;} - 80015c6: 2390 movs r3, #144 ; 0x90 - 80015c8: 05db lsls r3, r3, #23 - 80015ca: 2120 movs r1, #32 - 80015cc: 0018 movs r0, r3 - 80015ce: f7ff fadb bl 8000b88 - 80015d2: 1e03 subs r3, r0, #0 - 80015d4: d001 beq.n 80015da - 80015d6: 2300 movs r3, #0 - 80015d8: e000 b.n 80015dc - 80015da: 2301 movs r3, #1 + 8002072: 2390 movs r3, #144 ; 0x90 + 8002074: 05db lsls r3, r3, #23 + 8002076: 2120 movs r1, #32 + 8002078: 0018 movs r0, r3 + 800207a: f7ff fadb bl 8001634 + 800207e: 1e03 subs r3, r0, #0 + 8002080: d001 beq.n 8002086 + 8002082: 2300 movs r3, #0 + 8002084: e000 b.n 8002088 + 8002086: 2301 movs r3, #1 //return READ_HC595_DCK; } - 80015dc: 0018 movs r0, r3 - 80015de: 46bd mov sp, r7 - 80015e0: bd80 pop {r7, pc} + 8002088: 0018 movs r0, r3 + 800208a: 46bd mov sp, r7 + 800208c: bd80 pop {r7, pc} -080015e2 : +0800208e : void Sand_Byte_to_595(uint8_t h,uint8_t l) { - 80015e2: b580 push {r7, lr} - 80015e4: b084 sub sp, #16 - 80015e6: af00 add r7, sp, #0 - 80015e8: 0002 movs r2, r0 - 80015ea: 1dfb adds r3, r7, #7 - 80015ec: 701a strb r2, [r3, #0] - 80015ee: 1dbb adds r3, r7, #6 - 80015f0: 1c0a adds r2, r1, #0 - 80015f2: 701a strb r2, [r3, #0] + 800208e: b580 push {r7, lr} + 8002090: b084 sub sp, #16 + 8002092: af00 add r7, sp, #0 + 8002094: 0002 movs r2, r0 + 8002096: 1dfb adds r3, r7, #7 + 8002098: 701a strb r2, [r3, #0] + 800209a: 1dbb adds r3, r7, #6 + 800209c: 1c0a adds r2, r1, #0 + 800209e: 701a strb r2, [r3, #0] ds_in_or_out(1); - 80015f4: 2001 movs r0, #1 - 80015f6: f7ff ffab bl 8001550 + 80020a0: 2001 movs r0, #1 + 80020a2: f7ff ffab bl 8001ffc HC595_DCK(0); - 80015fa: 2390 movs r3, #144 ; 0x90 - 80015fc: 05db lsls r3, r3, #23 - 80015fe: 2200 movs r2, #0 - 8001600: 2120 movs r1, #32 - 8001602: 0018 movs r0, r3 - 8001604: f7ff fadd bl 8000bc2 + 80020a6: 2390 movs r3, #144 ; 0x90 + 80020a8: 05db lsls r3, r3, #23 + 80020aa: 2200 movs r2, #0 + 80020ac: 2120 movs r1, #32 + 80020ae: 0018 movs r0, r3 + 80020b0: f7ff fadd bl 800166e HC595_SCK(0); - 8001608: 2390 movs r3, #144 ; 0x90 - 800160a: 05db lsls r3, r3, #23 - 800160c: 2200 movs r2, #0 - 800160e: 2140 movs r1, #64 ; 0x40 - 8001610: 0018 movs r0, r3 - 8001612: f7ff fad6 bl 8000bc2 + 80020b4: 2390 movs r3, #144 ; 0x90 + 80020b6: 05db lsls r3, r3, #23 + 80020b8: 2200 movs r2, #0 + 80020ba: 2140 movs r1, #64 ; 0x40 + 80020bc: 0018 movs r0, r3 + 80020be: f7ff fad6 bl 800166e HC595_RCK(0); - 8001616: 2390 movs r3, #144 ; 0x90 - 8001618: 05db lsls r3, r3, #23 - 800161a: 2200 movs r2, #0 - 800161c: 2180 movs r1, #128 ; 0x80 - 800161e: 0018 movs r0, r3 - 8001620: f7ff facf bl 8000bc2 + 80020c2: 2390 movs r3, #144 ; 0x90 + 80020c4: 05db lsls r3, r3, #23 + 80020c6: 2200 movs r2, #0 + 80020c8: 2180 movs r1, #128 ; 0x80 + 80020ca: 0018 movs r0, r3 + 80020cc: f7ff facf bl 800166e for(char a=0;a<8;a++) - 8001624: 230f movs r3, #15 - 8001626: 18fb adds r3, r7, r3 - 8001628: 2200 movs r2, #0 - 800162a: 701a strb r2, [r3, #0] - 800162c: e02c b.n 8001688 + 80020d0: 230f movs r3, #15 + 80020d2: 18fb adds r3, r7, r3 + 80020d4: 2200 movs r2, #0 + 80020d6: 701a strb r2, [r3, #0] + 80020d8: e02c b.n 8002134 { if((h< + 80020da: 1dfb adds r3, r7, #7 + 80020dc: 781a ldrb r2, [r3, #0] + 80020de: 230f movs r3, #15 + 80020e0: 18fb adds r3, r7, r3 + 80020e2: 781b ldrb r3, [r3, #0] + 80020e4: 409a lsls r2, r3 + 80020e6: 0013 movs r3, r2 + 80020e8: 2280 movs r2, #128 ; 0x80 + 80020ea: 4013 ands r3, r2 + 80020ec: d007 beq.n 80020fe { HC595_DCK(1); - 8001642: 2390 movs r3, #144 ; 0x90 - 8001644: 05db lsls r3, r3, #23 - 8001646: 2201 movs r2, #1 - 8001648: 2120 movs r1, #32 - 800164a: 0018 movs r0, r3 - 800164c: f7ff fab9 bl 8000bc2 - 8001650: e006 b.n 8001660 + 80020ee: 2390 movs r3, #144 ; 0x90 + 80020f0: 05db lsls r3, r3, #23 + 80020f2: 2201 movs r2, #1 + 80020f4: 2120 movs r1, #32 + 80020f6: 0018 movs r0, r3 + 80020f8: f7ff fab9 bl 800166e + 80020fc: e006 b.n 800210c }else { HC595_DCK(0); - 8001652: 2390 movs r3, #144 ; 0x90 - 8001654: 05db lsls r3, r3, #23 - 8001656: 2200 movs r2, #0 - 8001658: 2120 movs r1, #32 - 800165a: 0018 movs r0, r3 - 800165c: f7ff fab1 bl 8000bc2 + 80020fe: 2390 movs r3, #144 ; 0x90 + 8002100: 05db lsls r3, r3, #23 + 8002102: 2200 movs r2, #0 + 8002104: 2120 movs r1, #32 + 8002106: 0018 movs r0, r3 + 8002108: f7ff fab1 bl 800166e } HC595_SCK(1); - 8001660: 2390 movs r3, #144 ; 0x90 - 8001662: 05db lsls r3, r3, #23 - 8001664: 2201 movs r2, #1 - 8001666: 2140 movs r1, #64 ; 0x40 - 8001668: 0018 movs r0, r3 - 800166a: f7ff faaa bl 8000bc2 + 800210c: 2390 movs r3, #144 ; 0x90 + 800210e: 05db lsls r3, r3, #23 + 8002110: 2201 movs r2, #1 + 8002112: 2140 movs r1, #64 ; 0x40 + 8002114: 0018 movs r0, r3 + 8002116: f7ff faaa bl 800166e HC595_SCK(0); - 800166e: 2390 movs r3, #144 ; 0x90 - 8001670: 05db lsls r3, r3, #23 - 8001672: 2200 movs r2, #0 - 8001674: 2140 movs r1, #64 ; 0x40 - 8001676: 0018 movs r0, r3 - 8001678: f7ff faa3 bl 8000bc2 + 800211a: 2390 movs r3, #144 ; 0x90 + 800211c: 05db lsls r3, r3, #23 + 800211e: 2200 movs r2, #0 + 8002120: 2140 movs r1, #64 ; 0x40 + 8002122: 0018 movs r0, r3 + 8002124: f7ff faa3 bl 800166e for(char a=0;a<8;a++) - 800167c: 210f movs r1, #15 - 800167e: 187b adds r3, r7, r1 - 8001680: 781a ldrb r2, [r3, #0] - 8001682: 187b adds r3, r7, r1 - 8001684: 3201 adds r2, #1 - 8001686: 701a strb r2, [r3, #0] - 8001688: 230f movs r3, #15 - 800168a: 18fb adds r3, r7, r3 - 800168c: 781b ldrb r3, [r3, #0] - 800168e: 2b07 cmp r3, #7 - 8001690: d9cd bls.n 800162e + 8002128: 210f movs r1, #15 + 800212a: 187b adds r3, r7, r1 + 800212c: 781a ldrb r2, [r3, #0] + 800212e: 187b adds r3, r7, r1 + 8002130: 3201 adds r2, #1 + 8002132: 701a strb r2, [r3, #0] + 8002134: 230f movs r3, #15 + 8002136: 18fb adds r3, r7, r3 + 8002138: 781b ldrb r3, [r3, #0] + 800213a: 2b07 cmp r3, #7 + 800213c: d9cd bls.n 80020da } for(char a=0;a<8;a++) - 8001692: 230e movs r3, #14 - 8001694: 18fb adds r3, r7, r3 - 8001696: 2200 movs r2, #0 - 8001698: 701a strb r2, [r3, #0] - 800169a: e02c b.n 80016f6 + 800213e: 230e movs r3, #14 + 8002140: 18fb adds r3, r7, r3 + 8002142: 2200 movs r2, #0 + 8002144: 701a strb r2, [r3, #0] + 8002146: e02c b.n 80021a2 { if((l< + 8002148: 1dbb adds r3, r7, #6 + 800214a: 781a ldrb r2, [r3, #0] + 800214c: 230e movs r3, #14 + 800214e: 18fb adds r3, r7, r3 + 8002150: 781b ldrb r3, [r3, #0] + 8002152: 409a lsls r2, r3 + 8002154: 0013 movs r3, r2 + 8002156: 2280 movs r2, #128 ; 0x80 + 8002158: 4013 ands r3, r2 + 800215a: d007 beq.n 800216c { HC595_DCK(1); - 80016b0: 2390 movs r3, #144 ; 0x90 - 80016b2: 05db lsls r3, r3, #23 - 80016b4: 2201 movs r2, #1 - 80016b6: 2120 movs r1, #32 - 80016b8: 0018 movs r0, r3 - 80016ba: f7ff fa82 bl 8000bc2 - 80016be: e006 b.n 80016ce + 800215c: 2390 movs r3, #144 ; 0x90 + 800215e: 05db lsls r3, r3, #23 + 8002160: 2201 movs r2, #1 + 8002162: 2120 movs r1, #32 + 8002164: 0018 movs r0, r3 + 8002166: f7ff fa82 bl 800166e + 800216a: e006 b.n 800217a }else { HC595_DCK(0); - 80016c0: 2390 movs r3, #144 ; 0x90 - 80016c2: 05db lsls r3, r3, #23 - 80016c4: 2200 movs r2, #0 - 80016c6: 2120 movs r1, #32 - 80016c8: 0018 movs r0, r3 - 80016ca: f7ff fa7a bl 8000bc2 + 800216c: 2390 movs r3, #144 ; 0x90 + 800216e: 05db lsls r3, r3, #23 + 8002170: 2200 movs r2, #0 + 8002172: 2120 movs r1, #32 + 8002174: 0018 movs r0, r3 + 8002176: f7ff fa7a bl 800166e } HC595_SCK(1); - 80016ce: 2390 movs r3, #144 ; 0x90 - 80016d0: 05db lsls r3, r3, #23 - 80016d2: 2201 movs r2, #1 - 80016d4: 2140 movs r1, #64 ; 0x40 - 80016d6: 0018 movs r0, r3 - 80016d8: f7ff fa73 bl 8000bc2 + 800217a: 2390 movs r3, #144 ; 0x90 + 800217c: 05db lsls r3, r3, #23 + 800217e: 2201 movs r2, #1 + 8002180: 2140 movs r1, #64 ; 0x40 + 8002182: 0018 movs r0, r3 + 8002184: f7ff fa73 bl 800166e HC595_SCK(0); - 80016dc: 2390 movs r3, #144 ; 0x90 - 80016de: 05db lsls r3, r3, #23 - 80016e0: 2200 movs r2, #0 - 80016e2: 2140 movs r1, #64 ; 0x40 - 80016e4: 0018 movs r0, r3 - 80016e6: f7ff fa6c bl 8000bc2 + 8002188: 2390 movs r3, #144 ; 0x90 + 800218a: 05db lsls r3, r3, #23 + 800218c: 2200 movs r2, #0 + 800218e: 2140 movs r1, #64 ; 0x40 + 8002190: 0018 movs r0, r3 + 8002192: f7ff fa6c bl 800166e for(char a=0;a<8;a++) - 80016ea: 210e movs r1, #14 - 80016ec: 187b adds r3, r7, r1 - 80016ee: 781a ldrb r2, [r3, #0] - 80016f0: 187b adds r3, r7, r1 - 80016f2: 3201 adds r2, #1 - 80016f4: 701a strb r2, [r3, #0] - 80016f6: 230e movs r3, #14 - 80016f8: 18fb adds r3, r7, r3 - 80016fa: 781b ldrb r3, [r3, #0] - 80016fc: 2b07 cmp r3, #7 - 80016fe: d9cd bls.n 800169c + 8002196: 210e movs r1, #14 + 8002198: 187b adds r3, r7, r1 + 800219a: 781a ldrb r2, [r3, #0] + 800219c: 187b adds r3, r7, r1 + 800219e: 3201 adds r2, #1 + 80021a0: 701a strb r2, [r3, #0] + 80021a2: 230e movs r3, #14 + 80021a4: 18fb adds r3, r7, r3 + 80021a6: 781b ldrb r3, [r3, #0] + 80021a8: 2b07 cmp r3, #7 + 80021aa: d9cd bls.n 8002148 } HC595_RCK(1); - 8001700: 2390 movs r3, #144 ; 0x90 - 8001702: 05db lsls r3, r3, #23 - 8001704: 2201 movs r2, #1 - 8001706: 2180 movs r1, #128 ; 0x80 - 8001708: 0018 movs r0, r3 - 800170a: f7ff fa5a bl 8000bc2 + 80021ac: 2390 movs r3, #144 ; 0x90 + 80021ae: 05db lsls r3, r3, #23 + 80021b0: 2201 movs r2, #1 + 80021b2: 2180 movs r1, #128 ; 0x80 + 80021b4: 0018 movs r0, r3 + 80021b6: f7ff fa5a bl 800166e HC595_RCK(0); - 800170e: 2390 movs r3, #144 ; 0x90 - 8001710: 05db lsls r3, r3, #23 - 8001712: 2200 movs r2, #0 - 8001714: 2180 movs r1, #128 ; 0x80 - 8001716: 0018 movs r0, r3 - 8001718: f7ff fa53 bl 8000bc2 + 80021ba: 2390 movs r3, #144 ; 0x90 + 80021bc: 05db lsls r3, r3, #23 + 80021be: 2200 movs r2, #0 + 80021c0: 2180 movs r1, #128 ; 0x80 + 80021c2: 0018 movs r0, r3 + 80021c4: f7ff fa53 bl 800166e } - 800171c: 46c0 nop ; (mov r8, r8) - 800171e: 46bd mov sp, r7 - 8001720: b004 add sp, #16 - 8001722: bd80 pop {r7, pc} + 80021c8: 46c0 nop ; (mov r8, r8) + 80021ca: 46bd mov sp, r7 + 80021cc: b004 add sp, #16 + 80021ce: bd80 pop {r7, pc} -08001724 : +080021d0 : void Sand_Byte_to_595_2(uint8_t h) { - 8001724: b580 push {r7, lr} - 8001726: b084 sub sp, #16 - 8001728: af00 add r7, sp, #0 - 800172a: 0002 movs r2, r0 - 800172c: 1dfb adds r3, r7, #7 - 800172e: 701a strb r2, [r3, #0] + 80021d0: b580 push {r7, lr} + 80021d2: b084 sub sp, #16 + 80021d4: af00 add r7, sp, #0 + 80021d6: 0002 movs r2, r0 + 80021d8: 1dfb adds r3, r7, #7 + 80021da: 701a strb r2, [r3, #0] ds_in_or_out(1); - 8001730: 2001 movs r0, #1 - 8001732: f7ff ff0d bl 8001550 + 80021dc: 2001 movs r0, #1 + 80021de: f7ff ff0d bl 8001ffc HC595_DCK(0); - 8001736: 2390 movs r3, #144 ; 0x90 - 8001738: 05db lsls r3, r3, #23 - 800173a: 2200 movs r2, #0 - 800173c: 2120 movs r1, #32 - 800173e: 0018 movs r0, r3 - 8001740: f7ff fa3f bl 8000bc2 + 80021e2: 2390 movs r3, #144 ; 0x90 + 80021e4: 05db lsls r3, r3, #23 + 80021e6: 2200 movs r2, #0 + 80021e8: 2120 movs r1, #32 + 80021ea: 0018 movs r0, r3 + 80021ec: f7ff fa3f bl 800166e HC595_SCK2(0); - 8001744: 2380 movs r3, #128 ; 0x80 - 8001746: 0099 lsls r1, r3, #2 - 8001748: 2390 movs r3, #144 ; 0x90 - 800174a: 05db lsls r3, r3, #23 - 800174c: 2200 movs r2, #0 - 800174e: 0018 movs r0, r3 - 8001750: f7ff fa37 bl 8000bc2 + 80021f0: 2380 movs r3, #128 ; 0x80 + 80021f2: 0099 lsls r1, r3, #2 + 80021f4: 2390 movs r3, #144 ; 0x90 + 80021f6: 05db lsls r3, r3, #23 + 80021f8: 2200 movs r2, #0 + 80021fa: 0018 movs r0, r3 + 80021fc: f7ff fa37 bl 800166e HC595_RCK(0); - 8001754: 2390 movs r3, #144 ; 0x90 - 8001756: 05db lsls r3, r3, #23 - 8001758: 2200 movs r2, #0 - 800175a: 2180 movs r1, #128 ; 0x80 - 800175c: 0018 movs r0, r3 - 800175e: f7ff fa30 bl 8000bc2 + 8002200: 2390 movs r3, #144 ; 0x90 + 8002202: 05db lsls r3, r3, #23 + 8002204: 2200 movs r2, #0 + 8002206: 2180 movs r1, #128 ; 0x80 + 8002208: 0018 movs r0, r3 + 800220a: f7ff fa30 bl 800166e for(char a=0;a<8;a++) - 8001762: 230f movs r3, #15 - 8001764: 18fb adds r3, r7, r3 - 8001766: 2200 movs r2, #0 - 8001768: 701a strb r2, [r3, #0] - 800176a: e02e b.n 80017ca + 800220e: 230f movs r3, #15 + 8002210: 18fb adds r3, r7, r3 + 8002212: 2200 movs r2, #0 + 8002214: 701a strb r2, [r3, #0] + 8002216: e02e b.n 8002276 { if((h< + 8002218: 1dfb adds r3, r7, #7 + 800221a: 781a ldrb r2, [r3, #0] + 800221c: 230f movs r3, #15 + 800221e: 18fb adds r3, r7, r3 + 8002220: 781b ldrb r3, [r3, #0] + 8002222: 409a lsls r2, r3 + 8002224: 0013 movs r3, r2 + 8002226: 2280 movs r2, #128 ; 0x80 + 8002228: 4013 ands r3, r2 + 800222a: d007 beq.n 800223c { HC595_DCK(1); - 8001780: 2390 movs r3, #144 ; 0x90 - 8001782: 05db lsls r3, r3, #23 - 8001784: 2201 movs r2, #1 - 8001786: 2120 movs r1, #32 - 8001788: 0018 movs r0, r3 - 800178a: f7ff fa1a bl 8000bc2 - 800178e: e006 b.n 800179e + 800222c: 2390 movs r3, #144 ; 0x90 + 800222e: 05db lsls r3, r3, #23 + 8002230: 2201 movs r2, #1 + 8002232: 2120 movs r1, #32 + 8002234: 0018 movs r0, r3 + 8002236: f7ff fa1a bl 800166e + 800223a: e006 b.n 800224a }else { HC595_DCK(0); - 8001790: 2390 movs r3, #144 ; 0x90 - 8001792: 05db lsls r3, r3, #23 - 8001794: 2200 movs r2, #0 - 8001796: 2120 movs r1, #32 - 8001798: 0018 movs r0, r3 - 800179a: f7ff fa12 bl 8000bc2 + 800223c: 2390 movs r3, #144 ; 0x90 + 800223e: 05db lsls r3, r3, #23 + 8002240: 2200 movs r2, #0 + 8002242: 2120 movs r1, #32 + 8002244: 0018 movs r0, r3 + 8002246: f7ff fa12 bl 800166e } HC595_SCK2(1); - 800179e: 2380 movs r3, #128 ; 0x80 - 80017a0: 0099 lsls r1, r3, #2 - 80017a2: 2390 movs r3, #144 ; 0x90 - 80017a4: 05db lsls r3, r3, #23 - 80017a6: 2201 movs r2, #1 - 80017a8: 0018 movs r0, r3 - 80017aa: f7ff fa0a bl 8000bc2 + 800224a: 2380 movs r3, #128 ; 0x80 + 800224c: 0099 lsls r1, r3, #2 + 800224e: 2390 movs r3, #144 ; 0x90 + 8002250: 05db lsls r3, r3, #23 + 8002252: 2201 movs r2, #1 + 8002254: 0018 movs r0, r3 + 8002256: f7ff fa0a bl 800166e HC595_SCK2(0); - 80017ae: 2380 movs r3, #128 ; 0x80 - 80017b0: 0099 lsls r1, r3, #2 - 80017b2: 2390 movs r3, #144 ; 0x90 - 80017b4: 05db lsls r3, r3, #23 - 80017b6: 2200 movs r2, #0 - 80017b8: 0018 movs r0, r3 - 80017ba: f7ff fa02 bl 8000bc2 + 800225a: 2380 movs r3, #128 ; 0x80 + 800225c: 0099 lsls r1, r3, #2 + 800225e: 2390 movs r3, #144 ; 0x90 + 8002260: 05db lsls r3, r3, #23 + 8002262: 2200 movs r2, #0 + 8002264: 0018 movs r0, r3 + 8002266: f7ff fa02 bl 800166e for(char a=0;a<8;a++) - 80017be: 210f movs r1, #15 - 80017c0: 187b adds r3, r7, r1 - 80017c2: 781a ldrb r2, [r3, #0] - 80017c4: 187b adds r3, r7, r1 - 80017c6: 3201 adds r2, #1 - 80017c8: 701a strb r2, [r3, #0] - 80017ca: 230f movs r3, #15 - 80017cc: 18fb adds r3, r7, r3 - 80017ce: 781b ldrb r3, [r3, #0] - 80017d0: 2b07 cmp r3, #7 - 80017d2: d9cb bls.n 800176c + 800226a: 210f movs r1, #15 + 800226c: 187b adds r3, r7, r1 + 800226e: 781a ldrb r2, [r3, #0] + 8002270: 187b adds r3, r7, r1 + 8002272: 3201 adds r2, #1 + 8002274: 701a strb r2, [r3, #0] + 8002276: 230f movs r3, #15 + 8002278: 18fb adds r3, r7, r3 + 800227a: 781b ldrb r3, [r3, #0] + 800227c: 2b07 cmp r3, #7 + 800227e: d9cb bls.n 8002218 } HC595_RCK(1); - 80017d4: 2390 movs r3, #144 ; 0x90 - 80017d6: 05db lsls r3, r3, #23 - 80017d8: 2201 movs r2, #1 - 80017da: 2180 movs r1, #128 ; 0x80 - 80017dc: 0018 movs r0, r3 - 80017de: f7ff f9f0 bl 8000bc2 + 8002280: 2390 movs r3, #144 ; 0x90 + 8002282: 05db lsls r3, r3, #23 + 8002284: 2201 movs r2, #1 + 8002286: 2180 movs r1, #128 ; 0x80 + 8002288: 0018 movs r0, r3 + 800228a: f7ff f9f0 bl 800166e HC595_RCK(0); - 80017e2: 2390 movs r3, #144 ; 0x90 - 80017e4: 05db lsls r3, r3, #23 - 80017e6: 2200 movs r2, #0 - 80017e8: 2180 movs r1, #128 ; 0x80 - 80017ea: 0018 movs r0, r3 - 80017ec: f7ff f9e9 bl 8000bc2 + 800228e: 2390 movs r3, #144 ; 0x90 + 8002290: 05db lsls r3, r3, #23 + 8002292: 2200 movs r2, #0 + 8002294: 2180 movs r1, #128 ; 0x80 + 8002296: 0018 movs r0, r3 + 8002298: f7ff f9e9 bl 800166e } - 80017f0: 46c0 nop ; (mov r8, r8) - 80017f2: 46bd mov sp, r7 - 80017f4: b004 add sp, #16 - 80017f6: bd80 pop {r7, pc} + 800229c: 46c0 nop ; (mov r8, r8) + 800229e: 46bd mov sp, r7 + 80022a0: b004 add sp, #16 + 80022a2: bd80 pop {r7, pc} -080017f8 : +080022a4 : const char num_com[4]={0x1,0x2,0x4,0x8}; const char d_com[4]={0x80,0x40,0x20,0x10}; void display_and_button_loop() { - 80017f8: b580 push {r7, lr} - 80017fa: b084 sub sp, #16 - 80017fc: af00 add r7, sp, #0 + 80022a4: b580 push {r7, lr} + 80022a6: b084 sub sp, #16 + 80022a8: af00 add r7, sp, #0 char lcd_buff[4]; char change_buff; char h,l; //fast time change 1 for(int a=0;a<4;a++) - 80017fe: 2300 movs r3, #0 - 8001800: 60fb str r3, [r7, #12] - 8001802: e089 b.n 8001918 + 80022aa: 2300 movs r3, #0 + 80022ac: 60fb str r3, [r7, #12] + 80022ae: e089 b.n 80023c4 { change_buff=d_num_data[dis_buff.d_num[a]];//num to data model - 8001804: 4a65 ldr r2, [pc, #404] ; (800199c ) - 8001806: 68fb ldr r3, [r7, #12] - 8001808: 18d3 adds r3, r2, r3 - 800180a: 781b ldrb r3, [r3, #0] - 800180c: 0019 movs r1, r3 - 800180e: 1d7b adds r3, r7, #5 - 8001810: 4a63 ldr r2, [pc, #396] ; (80019a0 ) - 8001812: 5c52 ldrb r2, [r2, r1] - 8001814: 701a strb r2, [r3, #0] + 80022b0: 4a65 ldr r2, [pc, #404] ; (8002448 ) + 80022b2: 68fb ldr r3, [r7, #12] + 80022b4: 18d3 adds r3, r2, r3 + 80022b6: 781b ldrb r3, [r3, #0] + 80022b8: 0019 movs r1, r3 + 80022ba: 1d7b adds r3, r7, #5 + 80022bc: 4a63 ldr r2, [pc, #396] ; (800244c ) + 80022be: 5c52 ldrb r2, [r2, r1] + 80022c0: 701a strb r2, [r3, #0] if(change_buff&&A) - 8001816: 1d7b adds r3, r7, #5 - 8001818: 781b ldrb r3, [r3, #0] - 800181a: 2b00 cmp r3, #0 - 800181c: d00d beq.n 800183a + 80022c2: 1d7b adds r3, r7, #5 + 80022c4: 781b ldrb r3, [r3, #0] + 80022c6: 2b00 cmp r3, #0 + 80022c8: d00d beq.n 80022e6 { lcd_buff[0]|=0x80>>(a*2); - 800181e: 003b movs r3, r7 - 8001820: 781b ldrb r3, [r3, #0] - 8001822: b25a sxtb r2, r3 - 8001824: 68fb ldr r3, [r7, #12] - 8001826: 005b lsls r3, r3, #1 - 8001828: 2180 movs r1, #128 ; 0x80 - 800182a: 4119 asrs r1, r3 - 800182c: 000b movs r3, r1 - 800182e: b25b sxtb r3, r3 - 8001830: 4313 orrs r3, r2 - 8001832: b25b sxtb r3, r3 - 8001834: b2da uxtb r2, r3 - 8001836: 003b movs r3, r7 - 8001838: 701a strb r2, [r3, #0] + 80022ca: 003b movs r3, r7 + 80022cc: 781b ldrb r3, [r3, #0] + 80022ce: b25a sxtb r2, r3 + 80022d0: 68fb ldr r3, [r7, #12] + 80022d2: 005b lsls r3, r3, #1 + 80022d4: 2180 movs r1, #128 ; 0x80 + 80022d6: 4119 asrs r1, r3 + 80022d8: 000b movs r3, r1 + 80022da: b25b sxtb r3, r3 + 80022dc: 4313 orrs r3, r2 + 80022de: b25b sxtb r3, r3 + 80022e0: b2da uxtb r2, r3 + 80022e2: 003b movs r3, r7 + 80022e4: 701a strb r2, [r3, #0] } if(change_buff&&B) - 800183a: 1d7b adds r3, r7, #5 - 800183c: 781b ldrb r3, [r3, #0] - 800183e: 2b00 cmp r3, #0 - 8001840: d00d beq.n 800185e + 80022e6: 1d7b adds r3, r7, #5 + 80022e8: 781b ldrb r3, [r3, #0] + 80022ea: 2b00 cmp r3, #0 + 80022ec: d00d beq.n 800230a { lcd_buff[0]|=0x40>>(a*2); - 8001842: 003b movs r3, r7 - 8001844: 781b ldrb r3, [r3, #0] - 8001846: b25a sxtb r2, r3 - 8001848: 68fb ldr r3, [r7, #12] - 800184a: 005b lsls r3, r3, #1 - 800184c: 2140 movs r1, #64 ; 0x40 - 800184e: 4119 asrs r1, r3 - 8001850: 000b movs r3, r1 - 8001852: b25b sxtb r3, r3 - 8001854: 4313 orrs r3, r2 - 8001856: b25b sxtb r3, r3 - 8001858: b2da uxtb r2, r3 - 800185a: 003b movs r3, r7 - 800185c: 701a strb r2, [r3, #0] + 80022ee: 003b movs r3, r7 + 80022f0: 781b ldrb r3, [r3, #0] + 80022f2: b25a sxtb r2, r3 + 80022f4: 68fb ldr r3, [r7, #12] + 80022f6: 005b lsls r3, r3, #1 + 80022f8: 2140 movs r1, #64 ; 0x40 + 80022fa: 4119 asrs r1, r3 + 80022fc: 000b movs r3, r1 + 80022fe: b25b sxtb r3, r3 + 8002300: 4313 orrs r3, r2 + 8002302: b25b sxtb r3, r3 + 8002304: b2da uxtb r2, r3 + 8002306: 003b movs r3, r7 + 8002308: 701a strb r2, [r3, #0] } if(change_buff&&C) - 800185e: 1d7b adds r3, r7, #5 - 8001860: 781b ldrb r3, [r3, #0] - 8001862: 2b00 cmp r3, #0 - 8001864: d00d beq.n 8001882 + 800230a: 1d7b adds r3, r7, #5 + 800230c: 781b ldrb r3, [r3, #0] + 800230e: 2b00 cmp r3, #0 + 8002310: d00d beq.n 800232e { lcd_buff[2]|=0x40>>(a*2); - 8001866: 003b movs r3, r7 - 8001868: 789b ldrb r3, [r3, #2] - 800186a: b25a sxtb r2, r3 - 800186c: 68fb ldr r3, [r7, #12] - 800186e: 005b lsls r3, r3, #1 - 8001870: 2140 movs r1, #64 ; 0x40 - 8001872: 4119 asrs r1, r3 - 8001874: 000b movs r3, r1 - 8001876: b25b sxtb r3, r3 - 8001878: 4313 orrs r3, r2 - 800187a: b25b sxtb r3, r3 - 800187c: b2da uxtb r2, r3 - 800187e: 003b movs r3, r7 - 8001880: 709a strb r2, [r3, #2] + 8002312: 003b movs r3, r7 + 8002314: 789b ldrb r3, [r3, #2] + 8002316: b25a sxtb r2, r3 + 8002318: 68fb ldr r3, [r7, #12] + 800231a: 005b lsls r3, r3, #1 + 800231c: 2140 movs r1, #64 ; 0x40 + 800231e: 4119 asrs r1, r3 + 8002320: 000b movs r3, r1 + 8002322: b25b sxtb r3, r3 + 8002324: 4313 orrs r3, r2 + 8002326: b25b sxtb r3, r3 + 8002328: b2da uxtb r2, r3 + 800232a: 003b movs r3, r7 + 800232c: 709a strb r2, [r3, #2] } if(change_buff&&D) - 8001882: 1d7b adds r3, r7, #5 - 8001884: 781b ldrb r3, [r3, #0] - 8001886: 2b00 cmp r3, #0 - 8001888: d00d beq.n 80018a6 + 800232e: 1d7b adds r3, r7, #5 + 8002330: 781b ldrb r3, [r3, #0] + 8002332: 2b00 cmp r3, #0 + 8002334: d00d beq.n 8002352 { lcd_buff[3]|=0x40>>(a*2); - 800188a: 003b movs r3, r7 - 800188c: 78db ldrb r3, [r3, #3] - 800188e: b25a sxtb r2, r3 - 8001890: 68fb ldr r3, [r7, #12] - 8001892: 005b lsls r3, r3, #1 - 8001894: 2140 movs r1, #64 ; 0x40 - 8001896: 4119 asrs r1, r3 - 8001898: 000b movs r3, r1 - 800189a: b25b sxtb r3, r3 - 800189c: 4313 orrs r3, r2 - 800189e: b25b sxtb r3, r3 - 80018a0: b2da uxtb r2, r3 - 80018a2: 003b movs r3, r7 - 80018a4: 70da strb r2, [r3, #3] + 8002336: 003b movs r3, r7 + 8002338: 78db ldrb r3, [r3, #3] + 800233a: b25a sxtb r2, r3 + 800233c: 68fb ldr r3, [r7, #12] + 800233e: 005b lsls r3, r3, #1 + 8002340: 2140 movs r1, #64 ; 0x40 + 8002342: 4119 asrs r1, r3 + 8002344: 000b movs r3, r1 + 8002346: b25b sxtb r3, r3 + 8002348: 4313 orrs r3, r2 + 800234a: b25b sxtb r3, r3 + 800234c: b2da uxtb r2, r3 + 800234e: 003b movs r3, r7 + 8002350: 70da strb r2, [r3, #3] } if(change_buff&&E) - 80018a6: 1d7b adds r3, r7, #5 - 80018a8: 781b ldrb r3, [r3, #0] - 80018aa: 2b00 cmp r3, #0 - 80018ac: d00d beq.n 80018ca + 8002352: 1d7b adds r3, r7, #5 + 8002354: 781b ldrb r3, [r3, #0] + 8002356: 2b00 cmp r3, #0 + 8002358: d00d beq.n 8002376 { lcd_buff[2]|=0x80>>(a*2); - 80018ae: 003b movs r3, r7 - 80018b0: 789b ldrb r3, [r3, #2] - 80018b2: b25a sxtb r2, r3 - 80018b4: 68fb ldr r3, [r7, #12] - 80018b6: 005b lsls r3, r3, #1 - 80018b8: 2180 movs r1, #128 ; 0x80 - 80018ba: 4119 asrs r1, r3 - 80018bc: 000b movs r3, r1 - 80018be: b25b sxtb r3, r3 - 80018c0: 4313 orrs r3, r2 - 80018c2: b25b sxtb r3, r3 - 80018c4: b2da uxtb r2, r3 - 80018c6: 003b movs r3, r7 - 80018c8: 709a strb r2, [r3, #2] + 800235a: 003b movs r3, r7 + 800235c: 789b ldrb r3, [r3, #2] + 800235e: b25a sxtb r2, r3 + 8002360: 68fb ldr r3, [r7, #12] + 8002362: 005b lsls r3, r3, #1 + 8002364: 2180 movs r1, #128 ; 0x80 + 8002366: 4119 asrs r1, r3 + 8002368: 000b movs r3, r1 + 800236a: b25b sxtb r3, r3 + 800236c: 4313 orrs r3, r2 + 800236e: b25b sxtb r3, r3 + 8002370: b2da uxtb r2, r3 + 8002372: 003b movs r3, r7 + 8002374: 709a strb r2, [r3, #2] } if(change_buff&&F) - 80018ca: 1d7b adds r3, r7, #5 - 80018cc: 781b ldrb r3, [r3, #0] - 80018ce: 2b00 cmp r3, #0 - 80018d0: d00d beq.n 80018ee + 8002376: 1d7b adds r3, r7, #5 + 8002378: 781b ldrb r3, [r3, #0] + 800237a: 2b00 cmp r3, #0 + 800237c: d00d beq.n 800239a { lcd_buff[1]|=0x80>>(a*2); - 80018d2: 003b movs r3, r7 - 80018d4: 785b ldrb r3, [r3, #1] - 80018d6: b25a sxtb r2, r3 - 80018d8: 68fb ldr r3, [r7, #12] - 80018da: 005b lsls r3, r3, #1 - 80018dc: 2180 movs r1, #128 ; 0x80 - 80018de: 4119 asrs r1, r3 - 80018e0: 000b movs r3, r1 - 80018e2: b25b sxtb r3, r3 - 80018e4: 4313 orrs r3, r2 - 80018e6: b25b sxtb r3, r3 - 80018e8: b2da uxtb r2, r3 - 80018ea: 003b movs r3, r7 - 80018ec: 705a strb r2, [r3, #1] + 800237e: 003b movs r3, r7 + 8002380: 785b ldrb r3, [r3, #1] + 8002382: b25a sxtb r2, r3 + 8002384: 68fb ldr r3, [r7, #12] + 8002386: 005b lsls r3, r3, #1 + 8002388: 2180 movs r1, #128 ; 0x80 + 800238a: 4119 asrs r1, r3 + 800238c: 000b movs r3, r1 + 800238e: b25b sxtb r3, r3 + 8002390: 4313 orrs r3, r2 + 8002392: b25b sxtb r3, r3 + 8002394: b2da uxtb r2, r3 + 8002396: 003b movs r3, r7 + 8002398: 705a strb r2, [r3, #1] } if(change_buff&&G) - 80018ee: 1d7b adds r3, r7, #5 - 80018f0: 781b ldrb r3, [r3, #0] - 80018f2: 2b00 cmp r3, #0 - 80018f4: d00d beq.n 8001912 + 800239a: 1d7b adds r3, r7, #5 + 800239c: 781b ldrb r3, [r3, #0] + 800239e: 2b00 cmp r3, #0 + 80023a0: d00d beq.n 80023be { lcd_buff[1]|=0x40>>(a*2); - 80018f6: 003b movs r3, r7 - 80018f8: 785b ldrb r3, [r3, #1] - 80018fa: b25a sxtb r2, r3 - 80018fc: 68fb ldr r3, [r7, #12] - 80018fe: 005b lsls r3, r3, #1 - 8001900: 2140 movs r1, #64 ; 0x40 - 8001902: 4119 asrs r1, r3 - 8001904: 000b movs r3, r1 - 8001906: b25b sxtb r3, r3 - 8001908: 4313 orrs r3, r2 - 800190a: b25b sxtb r3, r3 - 800190c: b2da uxtb r2, r3 - 800190e: 003b movs r3, r7 - 8001910: 705a strb r2, [r3, #1] + 80023a2: 003b movs r3, r7 + 80023a4: 785b ldrb r3, [r3, #1] + 80023a6: b25a sxtb r2, r3 + 80023a8: 68fb ldr r3, [r7, #12] + 80023aa: 005b lsls r3, r3, #1 + 80023ac: 2140 movs r1, #64 ; 0x40 + 80023ae: 4119 asrs r1, r3 + 80023b0: 000b movs r3, r1 + 80023b2: b25b sxtb r3, r3 + 80023b4: 4313 orrs r3, r2 + 80023b6: b25b sxtb r3, r3 + 80023b8: b2da uxtb r2, r3 + 80023ba: 003b movs r3, r7 + 80023bc: 705a strb r2, [r3, #1] for(int a=0;a<4;a++) - 8001912: 68fb ldr r3, [r7, #12] - 8001914: 3301 adds r3, #1 - 8001916: 60fb str r3, [r7, #12] - 8001918: 68fb ldr r3, [r7, #12] - 800191a: 2b03 cmp r3, #3 - 800191c: dc00 bgt.n 8001920 - 800191e: e771 b.n 8001804 + 80023be: 68fb ldr r3, [r7, #12] + 80023c0: 3301 adds r3, #1 + 80023c2: 60fb str r3, [r7, #12] + 80023c4: 68fb ldr r3, [r7, #12] + 80023c6: 2b03 cmp r3, #3 + 80023c8: dc00 bgt.n 80023cc + 80023ca: e771 b.n 80022b0 //Sand_Byte_to_595(0xff,0xff); //Sand_Byte_to_595(~h,~l); //Sand_Byte_to_595(0,0); //Sand_Byte_to_595(0xff,0xff); for(int a=0;a<4;a++) - 8001920: 2300 movs r3, #0 - 8001922: 60bb str r3, [r7, #8] - 8001924: e032 b.n 800198c + 80023cc: 2300 movs r3, #0 + 80023ce: 60bb str r3, [r7, #8] + 80023d0: e032 b.n 8002438 { l=lcd_buff[a]; - 8001926: 1dfb adds r3, r7, #7 - 8001928: 0039 movs r1, r7 - 800192a: 68ba ldr r2, [r7, #8] - 800192c: 188a adds r2, r1, r2 - 800192e: 7812 ldrb r2, [r2, #0] - 8001930: 701a strb r2, [r3, #0] + 80023d2: 1dfb adds r3, r7, #7 + 80023d4: 0039 movs r1, r7 + 80023d6: 68ba ldr r2, [r7, #8] + 80023d8: 188a adds r2, r1, r2 + 80023da: 7812 ldrb r2, [r2, #0] + 80023dc: 701a strb r2, [r3, #0] //h=((~num_com[a])&0x0F); h=(~d_com[a]&0xf0)|((~num_com[a])&0x0F); - 8001932: 4a1c ldr r2, [pc, #112] ; (80019a4 ) - 8001934: 68bb ldr r3, [r7, #8] - 8001936: 18d3 adds r3, r2, r3 - 8001938: 781b ldrb r3, [r3, #0] - 800193a: b25b sxtb r3, r3 - 800193c: 43db mvns r3, r3 - 800193e: b25b sxtb r3, r3 - 8001940: 220f movs r2, #15 - 8001942: 4393 bics r3, r2 - 8001944: b25a sxtb r2, r3 - 8001946: 4918 ldr r1, [pc, #96] ; (80019a8 ) - 8001948: 68bb ldr r3, [r7, #8] - 800194a: 18cb adds r3, r1, r3 - 800194c: 781b ldrb r3, [r3, #0] - 800194e: b25b sxtb r3, r3 - 8001950: 43db mvns r3, r3 - 8001952: b25b sxtb r3, r3 - 8001954: 210f movs r1, #15 - 8001956: 400b ands r3, r1 - 8001958: b25b sxtb r3, r3 - 800195a: 4313 orrs r3, r2 - 800195c: b25a sxtb r2, r3 - 800195e: 1dbb adds r3, r7, #6 - 8001960: 701a strb r2, [r3, #0] + 80023de: 4a1c ldr r2, [pc, #112] ; (8002450 ) + 80023e0: 68bb ldr r3, [r7, #8] + 80023e2: 18d3 adds r3, r2, r3 + 80023e4: 781b ldrb r3, [r3, #0] + 80023e6: b25b sxtb r3, r3 + 80023e8: 43db mvns r3, r3 + 80023ea: b25b sxtb r3, r3 + 80023ec: 220f movs r2, #15 + 80023ee: 4393 bics r3, r2 + 80023f0: b25a sxtb r2, r3 + 80023f2: 4918 ldr r1, [pc, #96] ; (8002454 ) + 80023f4: 68bb ldr r3, [r7, #8] + 80023f6: 18cb adds r3, r1, r3 + 80023f8: 781b ldrb r3, [r3, #0] + 80023fa: b25b sxtb r3, r3 + 80023fc: 43db mvns r3, r3 + 80023fe: b25b sxtb r3, r3 + 8002400: 210f movs r1, #15 + 8002402: 400b ands r3, r1 + 8002404: b25b sxtb r3, r3 + 8002406: 4313 orrs r3, r2 + 8002408: b25a sxtb r2, r3 + 800240a: 1dbb adds r3, r7, #6 + 800240c: 701a strb r2, [r3, #0] Sand_Byte_to_595(h,l); - 8001962: 1dfb adds r3, r7, #7 - 8001964: 781a ldrb r2, [r3, #0] - 8001966: 1dbb adds r3, r7, #6 - 8001968: 781b ldrb r3, [r3, #0] - 800196a: 0011 movs r1, r2 - 800196c: 0018 movs r0, r3 - 800196e: f7ff fe38 bl 80015e2 + 800240e: 1dfb adds r3, r7, #7 + 8002410: 781a ldrb r2, [r3, #0] + 8002412: 1dbb adds r3, r7, #6 + 8002414: 781b ldrb r3, [r3, #0] + 8002416: 0011 movs r1, r2 + 8002418: 0018 movs r0, r3 + 800241a: f7ff fe38 bl 800208e dis_buff.button_flag[a]=Read_Ds(); - 8001972: f7ff fe23 bl 80015bc - 8001976: 0003 movs r3, r0 - 8001978: 0019 movs r1, r3 - 800197a: 4a08 ldr r2, [pc, #32] ; (800199c ) - 800197c: 68bb ldr r3, [r7, #8] - 800197e: 18d3 adds r3, r2, r3 - 8001980: 3304 adds r3, #4 - 8001982: 1c0a adds r2, r1, #0 - 8001984: 701a strb r2, [r3, #0] + 800241e: f7ff fe23 bl 8002068 + 8002422: 0003 movs r3, r0 + 8002424: 0019 movs r1, r3 + 8002426: 4a08 ldr r2, [pc, #32] ; (8002448 ) + 8002428: 68bb ldr r3, [r7, #8] + 800242a: 18d3 adds r3, r2, r3 + 800242c: 3304 adds r3, #4 + 800242e: 1c0a adds r2, r1, #0 + 8002430: 701a strb r2, [r3, #0] for(int a=0;a<4;a++) - 8001986: 68bb ldr r3, [r7, #8] - 8001988: 3301 adds r3, #1 - 800198a: 60bb str r3, [r7, #8] - 800198c: 68bb ldr r3, [r7, #8] - 800198e: 2b03 cmp r3, #3 - 8001990: ddc9 ble.n 8001926 + 8002432: 68bb ldr r3, [r7, #8] + 8002434: 3301 adds r3, #1 + 8002436: 60bb str r3, [r7, #8] + 8002438: 68bb ldr r3, [r7, #8] + 800243a: 2b03 cmp r3, #3 + 800243c: ddc9 ble.n 80023d2 } - 8001992: 46c0 nop ; (mov r8, r8) - 8001994: 46c0 nop ; (mov r8, r8) - 8001996: 46bd mov sp, r7 - 8001998: b004 add sp, #16 - 800199a: bd80 pop {r7, pc} - 800199c: 2000003c .word 0x2000003c - 80019a0: 080024d8 .word 0x080024d8 - 80019a4: 080024e8 .word 0x080024e8 - 80019a8: 080024e4 .word 0x080024e4 + 800243e: 46c0 nop ; (mov r8, r8) + 8002440: 46c0 nop ; (mov r8, r8) + 8002442: 46bd mov sp, r7 + 8002444: b004 add sp, #16 + 8002446: bd80 pop {r7, pc} + 8002448: 2000007c .word 0x2000007c + 800244c: 0800307c .word 0x0800307c + 8002450: 0800308c .word 0x0800308c + 8002454: 08003088 .word 0x08003088 -080019ac : +08002458 : void hc2_sever() { - 80019ac: b580 push {r7, lr} - 80019ae: b082 sub sp, #8 - 80019b0: af00 add r7, sp, #0 + 8002458: b580 push {r7, lr} + 800245a: b082 sub sp, #8 + 800245c: af00 add r7, sp, #0 char h=0; - 80019b2: 1dfb adds r3, r7, #7 - 80019b4: 2200 movs r2, #0 - 80019b6: 701a strb r2, [r3, #0] + 800245e: 1dfb adds r3, r7, #7 + 8002460: 2200 movs r2, #0 + 8002462: 701a strb r2, [r3, #0] if(dis_buff.led_run==1) - 80019b8: 4b24 ldr r3, [pc, #144] ; (8001a4c ) - 80019ba: 7a1b ldrb r3, [r3, #8] - 80019bc: 2210 movs r2, #16 - 80019be: 4013 ands r3, r2 - 80019c0: b2db uxtb r3, r3 - 80019c2: 2b00 cmp r3, #0 - 80019c4: d005 beq.n 80019d2 + 8002464: 4b24 ldr r3, [pc, #144] ; (80024f8 ) + 8002466: 7a1b ldrb r3, [r3, #8] + 8002468: 2210 movs r2, #16 + 800246a: 4013 ands r3, r2 + 800246c: b2db uxtb r3, r3 + 800246e: 2b00 cmp r3, #0 + 8002470: d005 beq.n 800247e { h|=0x01; - 80019c6: 1dfb adds r3, r7, #7 - 80019c8: 1dfa adds r2, r7, #7 - 80019ca: 7812 ldrb r2, [r2, #0] - 80019cc: 2101 movs r1, #1 - 80019ce: 430a orrs r2, r1 - 80019d0: 701a strb r2, [r3, #0] + 8002472: 1dfb adds r3, r7, #7 + 8002474: 1dfa adds r2, r7, #7 + 8002476: 7812 ldrb r2, [r2, #0] + 8002478: 2101 movs r1, #1 + 800247a: 430a orrs r2, r1 + 800247c: 701a strb r2, [r3, #0] } if(dis_buff.moto1a==1) - 80019d2: 4b1e ldr r3, [pc, #120] ; (8001a4c ) - 80019d4: 7a1b ldrb r3, [r3, #8] - 80019d6: 2220 movs r2, #32 - 80019d8: 4013 ands r3, r2 - 80019da: b2db uxtb r3, r3 - 80019dc: 2b00 cmp r3, #0 - 80019de: d005 beq.n 80019ec + 800247e: 4b1e ldr r3, [pc, #120] ; (80024f8 ) + 8002480: 7a1b ldrb r3, [r3, #8] + 8002482: 2220 movs r2, #32 + 8002484: 4013 ands r3, r2 + 8002486: b2db uxtb r3, r3 + 8002488: 2b00 cmp r3, #0 + 800248a: d005 beq.n 8002498 { h|=0x02; - 80019e0: 1dfb adds r3, r7, #7 - 80019e2: 1dfa adds r2, r7, #7 - 80019e4: 7812 ldrb r2, [r2, #0] - 80019e6: 2102 movs r1, #2 - 80019e8: 430a orrs r2, r1 - 80019ea: 701a strb r2, [r3, #0] + 800248c: 1dfb adds r3, r7, #7 + 800248e: 1dfa adds r2, r7, #7 + 8002490: 7812 ldrb r2, [r2, #0] + 8002492: 2102 movs r1, #2 + 8002494: 430a orrs r2, r1 + 8002496: 701a strb r2, [r3, #0] } if(dis_buff.moto1b==1) - 80019ec: 4b17 ldr r3, [pc, #92] ; (8001a4c ) - 80019ee: 7a1b ldrb r3, [r3, #8] - 80019f0: 2240 movs r2, #64 ; 0x40 - 80019f2: 4013 ands r3, r2 - 80019f4: b2db uxtb r3, r3 - 80019f6: 2b00 cmp r3, #0 - 80019f8: d005 beq.n 8001a06 + 8002498: 4b17 ldr r3, [pc, #92] ; (80024f8 ) + 800249a: 7a1b ldrb r3, [r3, #8] + 800249c: 2240 movs r2, #64 ; 0x40 + 800249e: 4013 ands r3, r2 + 80024a0: b2db uxtb r3, r3 + 80024a2: 2b00 cmp r3, #0 + 80024a4: d005 beq.n 80024b2 { h|=0x04; - 80019fa: 1dfb adds r3, r7, #7 - 80019fc: 1dfa adds r2, r7, #7 - 80019fe: 7812 ldrb r2, [r2, #0] - 8001a00: 2104 movs r1, #4 - 8001a02: 430a orrs r2, r1 - 8001a04: 701a strb r2, [r3, #0] + 80024a6: 1dfb adds r3, r7, #7 + 80024a8: 1dfa adds r2, r7, #7 + 80024aa: 7812 ldrb r2, [r2, #0] + 80024ac: 2104 movs r1, #4 + 80024ae: 430a orrs r2, r1 + 80024b0: 701a strb r2, [r3, #0] } if(dis_buff.moto2a==1) - 8001a06: 4b11 ldr r3, [pc, #68] ; (8001a4c ) - 8001a08: 7a1b ldrb r3, [r3, #8] - 8001a0a: 227f movs r2, #127 ; 0x7f - 8001a0c: 4393 bics r3, r2 - 8001a0e: b2db uxtb r3, r3 - 8001a10: 2b00 cmp r3, #0 - 8001a12: d005 beq.n 8001a20 + 80024b2: 4b11 ldr r3, [pc, #68] ; (80024f8 ) + 80024b4: 7a1b ldrb r3, [r3, #8] + 80024b6: 227f movs r2, #127 ; 0x7f + 80024b8: 4393 bics r3, r2 + 80024ba: b2db uxtb r3, r3 + 80024bc: 2b00 cmp r3, #0 + 80024be: d005 beq.n 80024cc { h|=0x08; - 8001a14: 1dfb adds r3, r7, #7 - 8001a16: 1dfa adds r2, r7, #7 - 8001a18: 7812 ldrb r2, [r2, #0] - 8001a1a: 2108 movs r1, #8 - 8001a1c: 430a orrs r2, r1 - 8001a1e: 701a strb r2, [r3, #0] + 80024c0: 1dfb adds r3, r7, #7 + 80024c2: 1dfa adds r2, r7, #7 + 80024c4: 7812 ldrb r2, [r2, #0] + 80024c6: 2108 movs r1, #8 + 80024c8: 430a orrs r2, r1 + 80024ca: 701a strb r2, [r3, #0] } if(dis_buff.moto2b==1) - 8001a20: 4b0a ldr r3, [pc, #40] ; (8001a4c ) - 8001a22: 7a5b ldrb r3, [r3, #9] - 8001a24: 2201 movs r2, #1 - 8001a26: 4013 ands r3, r2 - 8001a28: b2db uxtb r3, r3 - 8001a2a: 2b00 cmp r3, #0 - 8001a2c: d005 beq.n 8001a3a + 80024cc: 4b0a ldr r3, [pc, #40] ; (80024f8 ) + 80024ce: 7a5b ldrb r3, [r3, #9] + 80024d0: 2201 movs r2, #1 + 80024d2: 4013 ands r3, r2 + 80024d4: b2db uxtb r3, r3 + 80024d6: 2b00 cmp r3, #0 + 80024d8: d005 beq.n 80024e6 { h|=0x10; - 8001a2e: 1dfb adds r3, r7, #7 - 8001a30: 1dfa adds r2, r7, #7 - 8001a32: 7812 ldrb r2, [r2, #0] - 8001a34: 2110 movs r1, #16 - 8001a36: 430a orrs r2, r1 - 8001a38: 701a strb r2, [r3, #0] + 80024da: 1dfb adds r3, r7, #7 + 80024dc: 1dfa adds r2, r7, #7 + 80024de: 7812 ldrb r2, [r2, #0] + 80024e0: 2110 movs r1, #16 + 80024e2: 430a orrs r2, r1 + 80024e4: 701a strb r2, [r3, #0] } Sand_Byte_to_595_2(h); - 8001a3a: 1dfb adds r3, r7, #7 - 8001a3c: 781b ldrb r3, [r3, #0] - 8001a3e: 0018 movs r0, r3 - 8001a40: f7ff fe70 bl 8001724 + 80024e6: 1dfb adds r3, r7, #7 + 80024e8: 781b ldrb r3, [r3, #0] + 80024ea: 0018 movs r0, r3 + 80024ec: f7ff fe70 bl 80021d0 } - 8001a44: 46c0 nop ; (mov r8, r8) - 8001a46: 46bd mov sp, r7 - 8001a48: b002 add sp, #8 - 8001a4a: bd80 pop {r7, pc} - 8001a4c: 2000003c .word 0x2000003c + 80024f0: 46c0 nop ; (mov r8, r8) + 80024f2: 46bd mov sp, r7 + 80024f4: b002 add sp, #8 + 80024f6: bd80 pop {r7, pc} + 80024f8: 2000007c .word 0x2000007c -08001a50 : +080024fc : void moto_server() { - 8001a50: b580 push {r7, lr} - 8001a52: af00 add r7, sp, #0 + 80024fc: b580 push {r7, lr} + 80024fe: af00 add r7, sp, #0 if(HAL_GetTick()>moto.moto_run) - 8001a54: f7fe fe6a bl 800072c - 8001a58: 0002 movs r2, r0 - 8001a5a: 4b6c ldr r3, [pc, #432] ; (8001c0c ) - 8001a5c: 681b ldr r3, [r3, #0] - 8001a5e: 429a cmp r2, r3 - 8001a60: d800 bhi.n 8001a64 - 8001a62: e07e b.n 8001b62 + 8002500: f7fe f9ba bl 8000878 + 8002504: 0002 movs r2, r0 + 8002506: 4b6c ldr r3, [pc, #432] ; (80026b8 ) + 8002508: 681b ldr r3, [r3, #0] + 800250a: 429a cmp r2, r3 + 800250c: d800 bhi.n 8002510 + 800250e: e07e b.n 800260e { moto.moto_run=HAL_GetTick()+10; - 8001a64: f7fe fe62 bl 800072c - 8001a68: 0003 movs r3, r0 - 8001a6a: 330a adds r3, #10 - 8001a6c: 001a movs r2, r3 - 8001a6e: 4b67 ldr r3, [pc, #412] ; (8001c0c ) - 8001a70: 601a str r2, [r3, #0] + 8002510: f7fe f9b2 bl 8000878 + 8002514: 0003 movs r3, r0 + 8002516: 330a adds r3, #10 + 8002518: 001a movs r2, r3 + 800251a: 4b67 ldr r3, [pc, #412] ; (80026b8 ) + 800251c: 601a str r2, [r3, #0] if(moto.moto1a!=moto.moto1a_) - 8001a72: 4b66 ldr r3, [pc, #408] ; (8001c0c ) - 8001a74: 7a1a ldrb r2, [r3, #8] - 8001a76: 4b65 ldr r3, [pc, #404] ; (8001c0c ) - 8001a78: 7b1b ldrb r3, [r3, #12] - 8001a7a: 429a cmp r2, r3 - 8001a7c: d017 beq.n 8001aae + 800251e: 4b66 ldr r3, [pc, #408] ; (80026b8 ) + 8002520: 7a1a ldrb r2, [r3, #8] + 8002522: 4b65 ldr r3, [pc, #404] ; (80026b8 ) + 8002524: 7b1b ldrb r3, [r3, #12] + 8002526: 429a cmp r2, r3 + 8002528: d017 beq.n 800255a { if(moto.moto1a>moto.moto1a_) - 8001a7e: 4b63 ldr r3, [pc, #396] ; (8001c0c ) - 8001a80: 7a1a ldrb r2, [r3, #8] - 8001a82: 4b62 ldr r3, [pc, #392] ; (8001c0c ) - 8001a84: 7b1b ldrb r3, [r3, #12] - 8001a86: 429a cmp r2, r3 - 8001a88: d905 bls.n 8001a96 + 800252a: 4b63 ldr r3, [pc, #396] ; (80026b8 ) + 800252c: 7a1a ldrb r2, [r3, #8] + 800252e: 4b62 ldr r3, [pc, #392] ; (80026b8 ) + 8002530: 7b1b ldrb r3, [r3, #12] + 8002532: 429a cmp r2, r3 + 8002534: d905 bls.n 8002542 { moto.moto1a_++; - 8001a8a: 4b60 ldr r3, [pc, #384] ; (8001c0c ) - 8001a8c: 7b1b ldrb r3, [r3, #12] - 8001a8e: 3301 adds r3, #1 - 8001a90: b2da uxtb r2, r3 - 8001a92: 4b5e ldr r3, [pc, #376] ; (8001c0c ) - 8001a94: 731a strb r2, [r3, #12] + 8002536: 4b60 ldr r3, [pc, #384] ; (80026b8 ) + 8002538: 7b1b ldrb r3, [r3, #12] + 800253a: 3301 adds r3, #1 + 800253c: b2da uxtb r2, r3 + 800253e: 4b5e ldr r3, [pc, #376] ; (80026b8 ) + 8002540: 731a strb r2, [r3, #12] } if(moto.moto1a) - 8001a98: 7a1a ldrb r2, [r3, #8] - 8001a9a: 4b5c ldr r3, [pc, #368] ; (8001c0c ) - 8001a9c: 7b1b ldrb r3, [r3, #12] - 8001a9e: 429a cmp r2, r3 - 8001aa0: d205 bcs.n 8001aae + 8002542: 4b5d ldr r3, [pc, #372] ; (80026b8 ) + 8002544: 7a1a ldrb r2, [r3, #8] + 8002546: 4b5c ldr r3, [pc, #368] ; (80026b8 ) + 8002548: 7b1b ldrb r3, [r3, #12] + 800254a: 429a cmp r2, r3 + 800254c: d205 bcs.n 800255a { moto.moto1a_--; - 8001aa2: 4b5a ldr r3, [pc, #360] ; (8001c0c ) - 8001aa4: 7b1b ldrb r3, [r3, #12] - 8001aa6: 3b01 subs r3, #1 - 8001aa8: b2da uxtb r2, r3 - 8001aaa: 4b58 ldr r3, [pc, #352] ; (8001c0c ) - 8001aac: 731a strb r2, [r3, #12] + 800254e: 4b5a ldr r3, [pc, #360] ; (80026b8 ) + 8002550: 7b1b ldrb r3, [r3, #12] + 8002552: 3b01 subs r3, #1 + 8002554: b2da uxtb r2, r3 + 8002556: 4b58 ldr r3, [pc, #352] ; (80026b8 ) + 8002558: 731a strb r2, [r3, #12] } } if(moto.moto1b!=moto.moto1b_) - 8001aae: 4b57 ldr r3, [pc, #348] ; (8001c0c ) - 8001ab0: 7a5a ldrb r2, [r3, #9] - 8001ab2: 4b56 ldr r3, [pc, #344] ; (8001c0c ) - 8001ab4: 7b5b ldrb r3, [r3, #13] - 8001ab6: 429a cmp r2, r3 - 8001ab8: d017 beq.n 8001aea + 800255a: 4b57 ldr r3, [pc, #348] ; (80026b8 ) + 800255c: 7a5a ldrb r2, [r3, #9] + 800255e: 4b56 ldr r3, [pc, #344] ; (80026b8 ) + 8002560: 7b5b ldrb r3, [r3, #13] + 8002562: 429a cmp r2, r3 + 8002564: d017 beq.n 8002596 { if(moto.moto1b>moto.moto1b_) - 8001aba: 4b54 ldr r3, [pc, #336] ; (8001c0c ) - 8001abc: 7a5a ldrb r2, [r3, #9] - 8001abe: 4b53 ldr r3, [pc, #332] ; (8001c0c ) - 8001ac0: 7b5b ldrb r3, [r3, #13] - 8001ac2: 429a cmp r2, r3 - 8001ac4: d905 bls.n 8001ad2 + 8002566: 4b54 ldr r3, [pc, #336] ; (80026b8 ) + 8002568: 7a5a ldrb r2, [r3, #9] + 800256a: 4b53 ldr r3, [pc, #332] ; (80026b8 ) + 800256c: 7b5b ldrb r3, [r3, #13] + 800256e: 429a cmp r2, r3 + 8002570: d905 bls.n 800257e { moto.moto1b_++; - 8001ac6: 4b51 ldr r3, [pc, #324] ; (8001c0c ) - 8001ac8: 7b5b ldrb r3, [r3, #13] - 8001aca: 3301 adds r3, #1 - 8001acc: b2da uxtb r2, r3 - 8001ace: 4b4f ldr r3, [pc, #316] ; (8001c0c ) - 8001ad0: 735a strb r2, [r3, #13] + 8002572: 4b51 ldr r3, [pc, #324] ; (80026b8 ) + 8002574: 7b5b ldrb r3, [r3, #13] + 8002576: 3301 adds r3, #1 + 8002578: b2da uxtb r2, r3 + 800257a: 4b4f ldr r3, [pc, #316] ; (80026b8 ) + 800257c: 735a strb r2, [r3, #13] } if(moto.moto1b) - 8001ad4: 7a5a ldrb r2, [r3, #9] - 8001ad6: 4b4d ldr r3, [pc, #308] ; (8001c0c ) - 8001ad8: 7b5b ldrb r3, [r3, #13] - 8001ada: 429a cmp r2, r3 - 8001adc: d205 bcs.n 8001aea + 800257e: 4b4e ldr r3, [pc, #312] ; (80026b8 ) + 8002580: 7a5a ldrb r2, [r3, #9] + 8002582: 4b4d ldr r3, [pc, #308] ; (80026b8 ) + 8002584: 7b5b ldrb r3, [r3, #13] + 8002586: 429a cmp r2, r3 + 8002588: d205 bcs.n 8002596 { moto.moto1b_--; - 8001ade: 4b4b ldr r3, [pc, #300] ; (8001c0c ) - 8001ae0: 7b5b ldrb r3, [r3, #13] - 8001ae2: 3b01 subs r3, #1 - 8001ae4: b2da uxtb r2, r3 - 8001ae6: 4b49 ldr r3, [pc, #292] ; (8001c0c ) - 8001ae8: 735a strb r2, [r3, #13] + 800258a: 4b4b ldr r3, [pc, #300] ; (80026b8 ) + 800258c: 7b5b ldrb r3, [r3, #13] + 800258e: 3b01 subs r3, #1 + 8002590: b2da uxtb r2, r3 + 8002592: 4b49 ldr r3, [pc, #292] ; (80026b8 ) + 8002594: 735a strb r2, [r3, #13] } } if(moto.moto2a!=moto.moto2a_) - 8001aea: 4b48 ldr r3, [pc, #288] ; (8001c0c ) - 8001aec: 7a9a ldrb r2, [r3, #10] - 8001aee: 4b47 ldr r3, [pc, #284] ; (8001c0c ) - 8001af0: 7b9b ldrb r3, [r3, #14] - 8001af2: 429a cmp r2, r3 - 8001af4: d017 beq.n 8001b26 + 8002596: 4b48 ldr r3, [pc, #288] ; (80026b8 ) + 8002598: 7a9a ldrb r2, [r3, #10] + 800259a: 4b47 ldr r3, [pc, #284] ; (80026b8 ) + 800259c: 7b9b ldrb r3, [r3, #14] + 800259e: 429a cmp r2, r3 + 80025a0: d017 beq.n 80025d2 { if(moto.moto2a>moto.moto2a_) - 8001af6: 4b45 ldr r3, [pc, #276] ; (8001c0c ) - 8001af8: 7a9a ldrb r2, [r3, #10] - 8001afa: 4b44 ldr r3, [pc, #272] ; (8001c0c ) - 8001afc: 7b9b ldrb r3, [r3, #14] - 8001afe: 429a cmp r2, r3 - 8001b00: d905 bls.n 8001b0e + 80025a2: 4b45 ldr r3, [pc, #276] ; (80026b8 ) + 80025a4: 7a9a ldrb r2, [r3, #10] + 80025a6: 4b44 ldr r3, [pc, #272] ; (80026b8 ) + 80025a8: 7b9b ldrb r3, [r3, #14] + 80025aa: 429a cmp r2, r3 + 80025ac: d905 bls.n 80025ba { moto.moto2a_++; - 8001b02: 4b42 ldr r3, [pc, #264] ; (8001c0c ) - 8001b04: 7b9b ldrb r3, [r3, #14] - 8001b06: 3301 adds r3, #1 - 8001b08: b2da uxtb r2, r3 - 8001b0a: 4b40 ldr r3, [pc, #256] ; (8001c0c ) - 8001b0c: 739a strb r2, [r3, #14] + 80025ae: 4b42 ldr r3, [pc, #264] ; (80026b8 ) + 80025b0: 7b9b ldrb r3, [r3, #14] + 80025b2: 3301 adds r3, #1 + 80025b4: b2da uxtb r2, r3 + 80025b6: 4b40 ldr r3, [pc, #256] ; (80026b8 ) + 80025b8: 739a strb r2, [r3, #14] } if(moto.moto2a) - 8001b10: 7a9a ldrb r2, [r3, #10] - 8001b12: 4b3e ldr r3, [pc, #248] ; (8001c0c ) - 8001b14: 7b9b ldrb r3, [r3, #14] - 8001b16: 429a cmp r2, r3 - 8001b18: d205 bcs.n 8001b26 + 80025ba: 4b3f ldr r3, [pc, #252] ; (80026b8 ) + 80025bc: 7a9a ldrb r2, [r3, #10] + 80025be: 4b3e ldr r3, [pc, #248] ; (80026b8 ) + 80025c0: 7b9b ldrb r3, [r3, #14] + 80025c2: 429a cmp r2, r3 + 80025c4: d205 bcs.n 80025d2 { moto.moto2a_--; - 8001b1a: 4b3c ldr r3, [pc, #240] ; (8001c0c ) - 8001b1c: 7b9b ldrb r3, [r3, #14] - 8001b1e: 3b01 subs r3, #1 - 8001b20: b2da uxtb r2, r3 - 8001b22: 4b3a ldr r3, [pc, #232] ; (8001c0c ) - 8001b24: 739a strb r2, [r3, #14] + 80025c6: 4b3c ldr r3, [pc, #240] ; (80026b8 ) + 80025c8: 7b9b ldrb r3, [r3, #14] + 80025ca: 3b01 subs r3, #1 + 80025cc: b2da uxtb r2, r3 + 80025ce: 4b3a ldr r3, [pc, #232] ; (80026b8 ) + 80025d0: 739a strb r2, [r3, #14] } } if(moto.moto2b!=moto.moto2b_) - 8001b26: 4b39 ldr r3, [pc, #228] ; (8001c0c ) - 8001b28: 7ada ldrb r2, [r3, #11] - 8001b2a: 4b38 ldr r3, [pc, #224] ; (8001c0c ) - 8001b2c: 7bdb ldrb r3, [r3, #15] - 8001b2e: 429a cmp r2, r3 - 8001b30: d017 beq.n 8001b62 + 80025d2: 4b39 ldr r3, [pc, #228] ; (80026b8 ) + 80025d4: 7ada ldrb r2, [r3, #11] + 80025d6: 4b38 ldr r3, [pc, #224] ; (80026b8 ) + 80025d8: 7bdb ldrb r3, [r3, #15] + 80025da: 429a cmp r2, r3 + 80025dc: d017 beq.n 800260e { if(moto.moto2b>moto.moto2b_) - 8001b32: 4b36 ldr r3, [pc, #216] ; (8001c0c ) - 8001b34: 7ada ldrb r2, [r3, #11] - 8001b36: 4b35 ldr r3, [pc, #212] ; (8001c0c ) - 8001b38: 7bdb ldrb r3, [r3, #15] - 8001b3a: 429a cmp r2, r3 - 8001b3c: d905 bls.n 8001b4a + 80025de: 4b36 ldr r3, [pc, #216] ; (80026b8 ) + 80025e0: 7ada ldrb r2, [r3, #11] + 80025e2: 4b35 ldr r3, [pc, #212] ; (80026b8 ) + 80025e4: 7bdb ldrb r3, [r3, #15] + 80025e6: 429a cmp r2, r3 + 80025e8: d905 bls.n 80025f6 { moto.moto2b_++; - 8001b3e: 4b33 ldr r3, [pc, #204] ; (8001c0c ) - 8001b40: 7bdb ldrb r3, [r3, #15] - 8001b42: 3301 adds r3, #1 - 8001b44: b2da uxtb r2, r3 - 8001b46: 4b31 ldr r3, [pc, #196] ; (8001c0c ) - 8001b48: 73da strb r2, [r3, #15] + 80025ea: 4b33 ldr r3, [pc, #204] ; (80026b8 ) + 80025ec: 7bdb ldrb r3, [r3, #15] + 80025ee: 3301 adds r3, #1 + 80025f0: b2da uxtb r2, r3 + 80025f2: 4b31 ldr r3, [pc, #196] ; (80026b8 ) + 80025f4: 73da strb r2, [r3, #15] } if(moto.moto2b) - 8001b4c: 7ada ldrb r2, [r3, #11] - 8001b4e: 4b2f ldr r3, [pc, #188] ; (8001c0c ) - 8001b50: 7bdb ldrb r3, [r3, #15] - 8001b52: 429a cmp r2, r3 - 8001b54: d205 bcs.n 8001b62 + 80025f6: 4b30 ldr r3, [pc, #192] ; (80026b8 ) + 80025f8: 7ada ldrb r2, [r3, #11] + 80025fa: 4b2f ldr r3, [pc, #188] ; (80026b8 ) + 80025fc: 7bdb ldrb r3, [r3, #15] + 80025fe: 429a cmp r2, r3 + 8002600: d205 bcs.n 800260e { moto.moto2b_--; - 8001b56: 4b2d ldr r3, [pc, #180] ; (8001c0c ) - 8001b58: 7bdb ldrb r3, [r3, #15] - 8001b5a: 3b01 subs r3, #1 - 8001b5c: b2da uxtb r2, r3 - 8001b5e: 4b2b ldr r3, [pc, #172] ; (8001c0c ) - 8001b60: 73da strb r2, [r3, #15] + 8002602: 4b2d ldr r3, [pc, #180] ; (80026b8 ) + 8002604: 7bdb ldrb r3, [r3, #15] + 8002606: 3b01 subs r3, #1 + 8002608: b2da uxtb r2, r3 + 800260a: 4b2b ldr r3, [pc, #172] ; (80026b8 ) + 800260c: 73da strb r2, [r3, #15] moto.pwm_run++; - 8001b62: 4b2a ldr r3, [pc, #168] ; (8001c0c ) - 8001b64: 685b ldr r3, [r3, #4] - 8001b66: 1c5a adds r2, r3, #1 - 8001b68: 4b28 ldr r3, [pc, #160] ; (8001c0c ) - 8001b6a: 605a str r2, [r3, #4] + 800260e: 4b2a ldr r3, [pc, #168] ; (80026b8 ) + 8002610: 685b ldr r3, [r3, #4] + 8002612: 1c5a adds r2, r3, #1 + 8002614: 4b28 ldr r3, [pc, #160] ; (80026b8 ) + 8002616: 605a str r2, [r3, #4] if(moto.pwm_run==10) - 8001b6c: 4b27 ldr r3, [pc, #156] ; (8001c0c ) - 8001b6e: 685b ldr r3, [r3, #4] - 8001b70: 2b0a cmp r3, #10 - 8001b72: d102 bne.n 8001b7a + 8002618: 4b27 ldr r3, [pc, #156] ; (80026b8 ) + 800261a: 685b ldr r3, [r3, #4] + 800261c: 2b0a cmp r3, #10 + 800261e: d102 bne.n 8002626 { moto.pwm_run=0; - 8001b74: 4b25 ldr r3, [pc, #148] ; (8001c0c ) - 8001b76: 2200 movs r2, #0 - 8001b78: 605a str r2, [r3, #4] + 8002620: 4b25 ldr r3, [pc, #148] ; (80026b8 ) + 8002622: 2200 movs r2, #0 + 8002624: 605a str r2, [r3, #4] } if(moto.pwm_run) - 8001b7c: 685b ldr r3, [r3, #4] - 8001b7e: 4a23 ldr r2, [pc, #140] ; (8001c0c ) - 8001b80: 7b12 ldrb r2, [r2, #12] - 8001b82: 4293 cmp r3, r2 - 8001b84: da05 bge.n 8001b92 + 8002626: 4b24 ldr r3, [pc, #144] ; (80026b8 ) + 8002628: 685b ldr r3, [r3, #4] + 800262a: 4a23 ldr r2, [pc, #140] ; (80026b8 ) + 800262c: 7b12 ldrb r2, [r2, #12] + 800262e: 4293 cmp r3, r2 + 8002630: da05 bge.n 800263e { dis_buff.moto1a=1; - 8001b86: 4b22 ldr r3, [pc, #136] ; (8001c10 ) - 8001b88: 7a1a ldrb r2, [r3, #8] - 8001b8a: 2120 movs r1, #32 - 8001b8c: 430a orrs r2, r1 - 8001b8e: 721a strb r2, [r3, #8] - 8001b90: e004 b.n 8001b9c + 8002632: 4b22 ldr r3, [pc, #136] ; (80026bc ) + 8002634: 7a1a ldrb r2, [r3, #8] + 8002636: 2120 movs r1, #32 + 8002638: 430a orrs r2, r1 + 800263a: 721a strb r2, [r3, #8] + 800263c: e004 b.n 8002648 }else { dis_buff.moto1a=0; - 8001b92: 4b1f ldr r3, [pc, #124] ; (8001c10 ) - 8001b94: 7a1a ldrb r2, [r3, #8] - 8001b96: 2120 movs r1, #32 - 8001b98: 438a bics r2, r1 - 8001b9a: 721a strb r2, [r3, #8] + 800263e: 4b1f ldr r3, [pc, #124] ; (80026bc ) + 8002640: 7a1a ldrb r2, [r3, #8] + 8002642: 2120 movs r1, #32 + 8002644: 438a bics r2, r1 + 8002646: 721a strb r2, [r3, #8] } if(moto.pwm_run) - 8001b9e: 685b ldr r3, [r3, #4] - 8001ba0: 4a1a ldr r2, [pc, #104] ; (8001c0c ) - 8001ba2: 7b52 ldrb r2, [r2, #13] - 8001ba4: 4293 cmp r3, r2 - 8001ba6: da05 bge.n 8001bb4 + 8002648: 4b1b ldr r3, [pc, #108] ; (80026b8 ) + 800264a: 685b ldr r3, [r3, #4] + 800264c: 4a1a ldr r2, [pc, #104] ; (80026b8 ) + 800264e: 7b52 ldrb r2, [r2, #13] + 8002650: 4293 cmp r3, r2 + 8002652: da05 bge.n 8002660 { dis_buff.moto1b=1; - 8001ba8: 4b19 ldr r3, [pc, #100] ; (8001c10 ) - 8001baa: 7a1a ldrb r2, [r3, #8] - 8001bac: 2140 movs r1, #64 ; 0x40 - 8001bae: 430a orrs r2, r1 - 8001bb0: 721a strb r2, [r3, #8] - 8001bb2: e004 b.n 8001bbe + 8002654: 4b19 ldr r3, [pc, #100] ; (80026bc ) + 8002656: 7a1a ldrb r2, [r3, #8] + 8002658: 2140 movs r1, #64 ; 0x40 + 800265a: 430a orrs r2, r1 + 800265c: 721a strb r2, [r3, #8] + 800265e: e004 b.n 800266a }else { dis_buff.moto1b=0; - 8001bb4: 4b16 ldr r3, [pc, #88] ; (8001c10 ) - 8001bb6: 7a1a ldrb r2, [r3, #8] - 8001bb8: 2140 movs r1, #64 ; 0x40 - 8001bba: 438a bics r2, r1 - 8001bbc: 721a strb r2, [r3, #8] + 8002660: 4b16 ldr r3, [pc, #88] ; (80026bc ) + 8002662: 7a1a ldrb r2, [r3, #8] + 8002664: 2140 movs r1, #64 ; 0x40 + 8002666: 438a bics r2, r1 + 8002668: 721a strb r2, [r3, #8] } if(moto.pwm_run) - 8001bc0: 685b ldr r3, [r3, #4] - 8001bc2: 4a12 ldr r2, [pc, #72] ; (8001c0c ) - 8001bc4: 7b92 ldrb r2, [r2, #14] - 8001bc6: 4293 cmp r3, r2 - 8001bc8: da06 bge.n 8001bd8 + 800266a: 4b13 ldr r3, [pc, #76] ; (80026b8 ) + 800266c: 685b ldr r3, [r3, #4] + 800266e: 4a12 ldr r2, [pc, #72] ; (80026b8 ) + 8002670: 7b92 ldrb r2, [r2, #14] + 8002672: 4293 cmp r3, r2 + 8002674: da06 bge.n 8002684 { dis_buff.moto2a=1; - 8001bca: 4b11 ldr r3, [pc, #68] ; (8001c10 ) - 8001bcc: 7a1a ldrb r2, [r3, #8] - 8001bce: 2180 movs r1, #128 ; 0x80 - 8001bd0: 4249 negs r1, r1 - 8001bd2: 430a orrs r2, r1 - 8001bd4: 721a strb r2, [r3, #8] - 8001bd6: e004 b.n 8001be2 + 8002676: 4b11 ldr r3, [pc, #68] ; (80026bc ) + 8002678: 7a1a ldrb r2, [r3, #8] + 800267a: 2180 movs r1, #128 ; 0x80 + 800267c: 4249 negs r1, r1 + 800267e: 430a orrs r2, r1 + 8002680: 721a strb r2, [r3, #8] + 8002682: e004 b.n 800268e }else { dis_buff.moto2a=0; - 8001bd8: 4b0d ldr r3, [pc, #52] ; (8001c10 ) - 8001bda: 7a1a ldrb r2, [r3, #8] - 8001bdc: 217f movs r1, #127 ; 0x7f - 8001bde: 400a ands r2, r1 - 8001be0: 721a strb r2, [r3, #8] + 8002684: 4b0d ldr r3, [pc, #52] ; (80026bc ) + 8002686: 7a1a ldrb r2, [r3, #8] + 8002688: 217f movs r1, #127 ; 0x7f + 800268a: 400a ands r2, r1 + 800268c: 721a strb r2, [r3, #8] } if(moto.pwm_run) - 8001be4: 685b ldr r3, [r3, #4] - 8001be6: 4a09 ldr r2, [pc, #36] ; (8001c0c ) - 8001be8: 7bd2 ldrb r2, [r2, #15] - 8001bea: 4293 cmp r3, r2 - 8001bec: da05 bge.n 8001bfa + 800268e: 4b0a ldr r3, [pc, #40] ; (80026b8 ) + 8002690: 685b ldr r3, [r3, #4] + 8002692: 4a09 ldr r2, [pc, #36] ; (80026b8 ) + 8002694: 7bd2 ldrb r2, [r2, #15] + 8002696: 4293 cmp r3, r2 + 8002698: da05 bge.n 80026a6 { dis_buff.moto2b=1; - 8001bee: 4b08 ldr r3, [pc, #32] ; (8001c10 ) - 8001bf0: 7a5a ldrb r2, [r3, #9] - 8001bf2: 2101 movs r1, #1 - 8001bf4: 430a orrs r2, r1 - 8001bf6: 725a strb r2, [r3, #9] + 800269a: 4b08 ldr r3, [pc, #32] ; (80026bc ) + 800269c: 7a5a ldrb r2, [r3, #9] + 800269e: 2101 movs r1, #1 + 80026a0: 430a orrs r2, r1 + 80026a2: 725a strb r2, [r3, #9] }else { dis_buff.moto2b=0; } } - 8001bf8: e004 b.n 8001c04 + 80026a4: e004 b.n 80026b0 dis_buff.moto2b=0; - 8001bfa: 4b05 ldr r3, [pc, #20] ; (8001c10 ) - 8001bfc: 7a5a ldrb r2, [r3, #9] - 8001bfe: 2101 movs r1, #1 - 8001c00: 438a bics r2, r1 - 8001c02: 725a strb r2, [r3, #9] + 80026a6: 4b05 ldr r3, [pc, #20] ; (80026bc ) + 80026a8: 7a5a ldrb r2, [r3, #9] + 80026aa: 2101 movs r1, #1 + 80026ac: 438a bics r2, r1 + 80026ae: 725a strb r2, [r3, #9] } - 8001c04: 46c0 nop ; (mov r8, r8) - 8001c06: 46bd mov sp, r7 - 8001c08: bd80 pop {r7, pc} - 8001c0a: 46c0 nop ; (mov r8, r8) - 8001c0c: 20000088 .word 0x20000088 - 8001c10: 2000003c .word 0x2000003c + 80026b0: 46c0 nop ; (mov r8, r8) + 80026b2: 46bd mov sp, r7 + 80026b4: bd80 pop {r7, pc} + 80026b6: 46c0 nop ; (mov r8, r8) + 80026b8: 200000dc .word 0x200000dc + 80026bc: 2000007c .word 0x2000007c -08001c14 : +080026c0 : void my_code() { - 8001c14: b580 push {r7, lr} - 8001c16: b086 sub sp, #24 - 8001c18: af00 add r7, sp, #0 + 80026c0: b580 push {r7, lr} + 80026c2: b086 sub sp, #24 + 80026c4: af00 add r7, sp, #0 uint32_t runtime=0,move=0; - 8001c1a: 2300 movs r3, #0 - 8001c1c: 617b str r3, [r7, #20] - 8001c1e: 2300 movs r3, #0 - 8001c20: 613b str r3, [r7, #16] + 80026c6: 2300 movs r3, #0 + 80026c8: 617b str r3, [r7, #20] + 80026ca: 2300 movs r3, #0 + 80026cc: 613b str r3, [r7, #16] uint8_t mode=0,overload_mode=0; - 8001c22: 230f movs r3, #15 - 8001c24: 18fb adds r3, r7, r3 - 8001c26: 2200 movs r2, #0 - 8001c28: 701a strb r2, [r3, #0] - 8001c2a: 230e movs r3, #14 - 8001c2c: 18fb adds r3, r7, r3 - 8001c2e: 2200 movs r2, #0 - 8001c30: 701a strb r2, [r3, #0] + 80026ce: 230f movs r3, #15 + 80026d0: 18fb adds r3, r7, r3 + 80026d2: 2200 movs r2, #0 + 80026d4: 701a strb r2, [r3, #0] + 80026d6: 230e movs r3, #14 + 80026d8: 18fb adds r3, r7, r3 + 80026da: 2200 movs r2, #0 + 80026dc: 701a strb r2, [r3, #0] uint16_t adc,adc_times=0; - 8001c32: 1cbb adds r3, r7, #2 - 8001c34: 2200 movs r2, #0 - 8001c36: 801a strh r2, [r3, #0] + 80026de: 003b movs r3, r7 + 80026e0: 2200 movs r2, #0 + 80026e2: 801a strh r2, [r3, #0] uint32_t adc_l; uint16_t overload_times=0; - 8001c38: 230c movs r3, #12 - 8001c3a: 18fb adds r3, r7, r3 - 8001c3c: 2200 movs r2, #0 - 8001c3e: 801a strh r2, [r3, #0] + 80026e4: 230c movs r3, #12 + 80026e6: 18fb adds r3, r7, r3 + 80026e8: 2200 movs r2, #0 + 80026ea: 801a strh r2, [r3, #0] long countdown=0; - 8001c40: 2300 movs r3, #0 - 8001c42: 60bb str r3, [r7, #8] + 80026ec: 2300 movs r3, #0 + 80026ee: 60bb str r3, [r7, #8] long countdown_set=15000; - 8001c44: 4bd8 ldr r3, [pc, #864] ; (8001fa8 ) - 8001c46: 607b str r3, [r7, #4] + 80026f0: 4be3 ldr r3, [pc, #908] ; (8002a80 ) + 80026f2: 607b str r3, [r7, #4] dis_buff.d_num[0]=8; - 8001c48: 4bd8 ldr r3, [pc, #864] ; (8001fac ) - 8001c4a: 2208 movs r2, #8 - 8001c4c: 701a strb r2, [r3, #0] + 80026f4: 4be3 ldr r3, [pc, #908] ; (8002a84 ) + 80026f6: 2208 movs r2, #8 + 80026f8: 701a strb r2, [r3, #0] dis_buff.d_num[1]=8; - 8001c4e: 4bd7 ldr r3, [pc, #860] ; (8001fac ) - 8001c50: 2208 movs r2, #8 - 8001c52: 705a strb r2, [r3, #1] + 80026fa: 4be2 ldr r3, [pc, #904] ; (8002a84 ) + 80026fc: 2208 movs r2, #8 + 80026fe: 705a strb r2, [r3, #1] dis_buff.d_num[2]=8; - 8001c54: 4bd5 ldr r3, [pc, #852] ; (8001fac ) - 8001c56: 2208 movs r2, #8 - 8001c58: 709a strb r2, [r3, #2] + 8002700: 4be0 ldr r3, [pc, #896] ; (8002a84 ) + 8002702: 2208 movs r2, #8 + 8002704: 709a strb r2, [r3, #2] dis_buff.d_num[3]=8; - 8001c5a: 4bd4 ldr r3, [pc, #848] ; (8001fac ) - 8001c5c: 2208 movs r2, #8 - 8001c5e: 70da strb r2, [r3, #3] + 8002706: 4bdf ldr r3, [pc, #892] ; (8002a84 ) + 8002708: 2208 movs r2, #8 + 800270a: 70da strb r2, [r3, #3] dis_buff.moto1a=0; - 8001c60: 4bd2 ldr r3, [pc, #840] ; (8001fac ) - 8001c62: 7a1a ldrb r2, [r3, #8] - 8001c64: 2120 movs r1, #32 - 8001c66: 438a bics r2, r1 - 8001c68: 721a strb r2, [r3, #8] + 800270c: 4bdd ldr r3, [pc, #884] ; (8002a84 ) + 800270e: 7a1a ldrb r2, [r3, #8] + 8002710: 2120 movs r1, #32 + 8002712: 438a bics r2, r1 + 8002714: 721a strb r2, [r3, #8] dis_buff.moto1b=0; - 8001c6a: 4bd0 ldr r3, [pc, #832] ; (8001fac ) - 8001c6c: 7a1a ldrb r2, [r3, #8] - 8001c6e: 2140 movs r1, #64 ; 0x40 - 8001c70: 438a bics r2, r1 - 8001c72: 721a strb r2, [r3, #8] + 8002716: 4bdb ldr r3, [pc, #876] ; (8002a84 ) + 8002718: 7a1a ldrb r2, [r3, #8] + 800271a: 2140 movs r1, #64 ; 0x40 + 800271c: 438a bics r2, r1 + 800271e: 721a strb r2, [r3, #8] dis_buff.moto2a=0; - 8001c74: 4bcd ldr r3, [pc, #820] ; (8001fac ) - 8001c76: 7a1a ldrb r2, [r3, #8] - 8001c78: 217f movs r1, #127 ; 0x7f - 8001c7a: 400a ands r2, r1 - 8001c7c: 721a strb r2, [r3, #8] + 8002720: 4bd8 ldr r3, [pc, #864] ; (8002a84 ) + 8002722: 7a1a ldrb r2, [r3, #8] + 8002724: 217f movs r1, #127 ; 0x7f + 8002726: 400a ands r2, r1 + 8002728: 721a strb r2, [r3, #8] dis_buff.moto2b=0; - 8001c7e: 4bcb ldr r3, [pc, #812] ; (8001fac ) - 8001c80: 7a5a ldrb r2, [r3, #9] - 8001c82: 2101 movs r1, #1 - 8001c84: 438a bics r2, r1 - 8001c86: 725a strb r2, [r3, #9] + 800272a: 4bd6 ldr r3, [pc, #856] ; (8002a84 ) + 800272c: 7a5a ldrb r2, [r3, #9] + 800272e: 2101 movs r1, #1 + 8002730: 438a bics r2, r1 + 8002732: 725a strb r2, [r3, #9] moto.moto_run=0; - 8001c88: 4bc9 ldr r3, [pc, #804] ; (8001fb0 ) - 8001c8a: 2200 movs r2, #0 - 8001c8c: 601a str r2, [r3, #0] + 8002734: 4bd4 ldr r3, [pc, #848] ; (8002a88 ) + 8002736: 2200 movs r2, #0 + 8002738: 601a str r2, [r3, #0] moto.pwm_run=0; - 8001c8e: 4bc8 ldr r3, [pc, #800] ; (8001fb0 ) - 8001c90: 2200 movs r2, #0 - 8001c92: 605a str r2, [r3, #4] + 800273a: 4bd3 ldr r3, [pc, #844] ; (8002a88 ) + 800273c: 2200 movs r2, #0 + 800273e: 605a str r2, [r3, #4] moto.moto1a=0; - 8001c94: 4bc6 ldr r3, [pc, #792] ; (8001fb0 ) - 8001c96: 2200 movs r2, #0 - 8001c98: 721a strb r2, [r3, #8] + 8002740: 4bd1 ldr r3, [pc, #836] ; (8002a88 ) + 8002742: 2200 movs r2, #0 + 8002744: 721a strb r2, [r3, #8] moto.moto1b=0; - 8001c9a: 4bc5 ldr r3, [pc, #788] ; (8001fb0 ) - 8001c9c: 2200 movs r2, #0 - 8001c9e: 725a strb r2, [r3, #9] + 8002746: 4bd0 ldr r3, [pc, #832] ; (8002a88 ) + 8002748: 2200 movs r2, #0 + 800274a: 725a strb r2, [r3, #9] moto.moto2a=0; - 8001ca0: 4bc3 ldr r3, [pc, #780] ; (8001fb0 ) - 8001ca2: 2200 movs r2, #0 - 8001ca4: 729a strb r2, [r3, #10] + 800274c: 4bce ldr r3, [pc, #824] ; (8002a88 ) + 800274e: 2200 movs r2, #0 + 8002750: 729a strb r2, [r3, #10] moto.moto2b=0; - 8001ca6: 4bc2 ldr r3, [pc, #776] ; (8001fb0 ) - 8001ca8: 2200 movs r2, #0 - 8001caa: 72da strb r2, [r3, #11] + 8002752: 4bcd ldr r3, [pc, #820] ; (8002a88 ) + 8002754: 2200 movs r2, #0 + 8002756: 72da strb r2, [r3, #11] moto.moto1a_=0; - 8001cac: 4bc0 ldr r3, [pc, #768] ; (8001fb0 ) - 8001cae: 2200 movs r2, #0 - 8001cb0: 731a strb r2, [r3, #12] + 8002758: 4bcb ldr r3, [pc, #812] ; (8002a88 ) + 800275a: 2200 movs r2, #0 + 800275c: 731a strb r2, [r3, #12] moto.moto1b_=0; - 8001cb2: 4bbf ldr r3, [pc, #764] ; (8001fb0 ) - 8001cb4: 2200 movs r2, #0 - 8001cb6: 735a strb r2, [r3, #13] + 800275e: 4bca ldr r3, [pc, #808] ; (8002a88 ) + 8002760: 2200 movs r2, #0 + 8002762: 735a strb r2, [r3, #13] moto.moto2a_=0; - 8001cb8: 4bbd ldr r3, [pc, #756] ; (8001fb0 ) - 8001cba: 2200 movs r2, #0 - 8001cbc: 739a strb r2, [r3, #14] + 8002764: 4bc8 ldr r3, [pc, #800] ; (8002a88 ) + 8002766: 2200 movs r2, #0 + 8002768: 739a strb r2, [r3, #14] moto.moto2b_=0; - 8001cbe: 4bbc ldr r3, [pc, #752] ; (8001fb0 ) - 8001cc0: 2200 movs r2, #0 - 8001cc2: 73da strb r2, [r3, #15] + 800276a: 4bc7 ldr r3, [pc, #796] ; (8002a88 ) + 800276c: 2200 movs r2, #0 + 800276e: 73da strb r2, [r3, #15] while(1) { + //*adc读取 并计滤波 并计算温度*/ + ///*获取两个通道*/ + for(char a=0;a<2;a++) + 8002770: 1cfb adds r3, r7, #3 + 8002772: 2200 movs r2, #0 + 8002774: 701a strb r2, [r3, #0] + 8002776: e025 b.n 80027c4 + { + HAL_ADC_Start(&hadc); + 8002778: 4bc4 ldr r3, [pc, #784] ; (8002a8c ) + 800277a: 0018 movs r0, r3 + 800277c: f7fe f9c6 bl 8000b0c + while(HAL_ADC_PollForConversion(&hadc,0xffff)!=HAL_OK); + 8002780: 46c0 nop ; (mov r8, r8) + 8002782: 4ac3 ldr r2, [pc, #780] ; (8002a90 ) + 8002784: 4bc1 ldr r3, [pc, #772] ; (8002a8c ) + 8002786: 0011 movs r1, r2 + 8002788: 0018 movs r0, r3 + 800278a: f7fe fa53 bl 8000c34 + 800278e: 1e03 subs r3, r0, #0 + 8002790: d1f7 bne.n 8002782 + ADCC.adc_filtering[a]+=HAL_ADC_GetValue(&hadc); //把读到的值加到滤波缓存 + 8002792: 4bbe ldr r3, [pc, #760] ; (8002a8c ) + 8002794: 0018 movs r0, r3 + 8002796: f7fe fae5 bl 8000d64 + 800279a: 0001 movs r1, r0 + 800279c: 1cfb adds r3, r7, #3 + 800279e: 781b ldrb r3, [r3, #0] + 80027a0: 4abc ldr r2, [pc, #752] ; (8002a94 ) + 80027a2: 009b lsls r3, r3, #2 + 80027a4: 18d3 adds r3, r2, r3 + 80027a6: 3304 adds r3, #4 + 80027a8: 681a ldr r2, [r3, #0] + 80027aa: 1cfb adds r3, r7, #3 + 80027ac: 781b ldrb r3, [r3, #0] + 80027ae: 188a adds r2, r1, r2 + 80027b0: 49b8 ldr r1, [pc, #736] ; (8002a94 ) + 80027b2: 009b lsls r3, r3, #2 + 80027b4: 18cb adds r3, r1, r3 + 80027b6: 3304 adds r3, #4 + 80027b8: 601a str r2, [r3, #0] + for(char a=0;a<2;a++) + 80027ba: 1cfb adds r3, r7, #3 + 80027bc: 781a ldrb r2, [r3, #0] + 80027be: 1cfb adds r3, r7, #3 + 80027c0: 3201 adds r2, #1 + 80027c2: 701a strb r2, [r3, #0] + 80027c4: 1cfb adds r3, r7, #3 + 80027c6: 781b ldrb r3, [r3, #0] + 80027c8: 2b01 cmp r3, #1 + 80027ca: d9d5 bls.n 8002778 + } + HAL_ADC_Stop(&hadc); + 80027cc: 4baf ldr r3, [pc, #700] ; (8002a8c ) + 80027ce: 0018 movs r0, r3 + 80027d0: f7fe f9f0 bl 8000bb4 + ///*开始滤波*/ + ADCC.filtering_times+=1; //每采样加一次记一次 + 80027d4: 4baf ldr r3, [pc, #700] ; (8002a94 ) + 80027d6: 681b ldr r3, [r3, #0] + 80027d8: 1c5a adds r2, r3, #1 + 80027da: 4bae ldr r3, [pc, #696] ; (8002a94 ) + 80027dc: 601a str r2, [r3, #0] + if(ADCC.filtering_times==set_filtering_times) //当达到设定的滤波采样次数 + 80027de: 4bad ldr r3, [pc, #692] ; (8002a94 ) + 80027e0: 681b ldr r3, [r3, #0] + 80027e2: 2b32 cmp r3, #50 ; 0x32 + 80027e4: d11c bne.n 8002820 + { + ADCC.filtering_times=0; + 80027e6: 4bab ldr r3, [pc, #684] ; (8002a94 ) + 80027e8: 2200 movs r2, #0 + 80027ea: 601a str r2, [r3, #0] + ADCC.adc_value[0]=ADCC.adc_filtering[0]/set_filtering_times; //就除于采样次数 + 80027ec: 4ba9 ldr r3, [pc, #676] ; (8002a94 ) + 80027ee: 685b ldr r3, [r3, #4] + 80027f0: 2132 movs r1, #50 ; 0x32 + 80027f2: 0018 movs r0, r3 + 80027f4: f7fd fc88 bl 8000108 <__udivsi3> + 80027f8: 0003 movs r3, r0 + 80027fa: 001a movs r2, r3 + 80027fc: 4ba5 ldr r3, [pc, #660] ; (8002a94 ) + 80027fe: 60da str r2, [r3, #12] + ADCC.adc_filtering[0]=0; + 8002800: 4ba4 ldr r3, [pc, #656] ; (8002a94 ) + 8002802: 2200 movs r2, #0 + 8002804: 605a str r2, [r3, #4] + ADCC.adc_value[1]=ADCC.adc_filtering[1]/set_filtering_times; + 8002806: 4ba3 ldr r3, [pc, #652] ; (8002a94 ) + 8002808: 689b ldr r3, [r3, #8] + 800280a: 2132 movs r1, #50 ; 0x32 + 800280c: 0018 movs r0, r3 + 800280e: f7fd fc7b bl 8000108 <__udivsi3> + 8002812: 0003 movs r3, r0 + 8002814: 001a movs r2, r3 + 8002816: 4b9f ldr r3, [pc, #636] ; (8002a94 ) + 8002818: 611a str r2, [r3, #16] + ADCC.adc_filtering[1]=0; + 800281a: 4b9e ldr r3, [pc, #632] ; (8002a94 ) + 800281c: 2200 movs r2, #0 + 800281e: 609a str r2, [r3, #8] + } + + switch(mode) - 8001cc4: 230f movs r3, #15 - 8001cc6: 18fb adds r3, r7, r3 - 8001cc8: 781b ldrb r3, [r3, #0] - 8001cca: 2b05 cmp r3, #5 - 8001ccc: d900 bls.n 8001cd0 - 8001cce: e385 b.n 80023dc - 8001cd0: 009a lsls r2, r3, #2 - 8001cd2: 4bb8 ldr r3, [pc, #736] ; (8001fb4 ) - 8001cd4: 18d3 adds r3, r2, r3 - 8001cd6: 681b ldr r3, [r3, #0] - 8001cd8: 469f mov pc, r3 + 8002820: 230f movs r3, #15 + 8002822: 18fb adds r3, r7, r3 + 8002824: 781b ldrb r3, [r3, #0] + 8002826: 2b05 cmp r3, #5 + 8002828: d900 bls.n 800282c + 800282a: e38a b.n 8002f42 + 800282c: 009a lsls r2, r3, #2 + 800282e: 4b9a ldr r3, [pc, #616] ; (8002a98 ) + 8002830: 18d3 adds r3, r2, r3 + 8002832: 681b ldr r3, [r3, #0] + 8002834: 469f mov pc, r3 { case 0: //Startup if(HAL_GetTick()>move) - 8001cda: f7fe fd27 bl 800072c - 8001cde: 0002 movs r2, r0 - 8001ce0: 693b ldr r3, [r7, #16] - 8001ce2: 4293 cmp r3, r2 - 8001ce4: d300 bcc.n 8001ce8 - 8001ce6: e370 b.n 80023ca + 8002836: f7fe f81f bl 8000878 + 800283a: 0002 movs r2, r0 + 800283c: 693b ldr r3, [r7, #16] + 800283e: 4293 cmp r3, r2 + 8002840: d300 bcc.n 8002844 + 8002842: e375 b.n 8002f30 { move=HAL_GetTick()+100; - 8001ce8: f7fe fd20 bl 800072c - 8001cec: 0003 movs r3, r0 - 8001cee: 3364 adds r3, #100 ; 0x64 - 8001cf0: 613b str r3, [r7, #16] + 8002844: f7fe f818 bl 8000878 + 8002848: 0003 movs r3, r0 + 800284a: 3364 adds r3, #100 ; 0x64 + 800284c: 613b str r3, [r7, #16] countdown-=100; - 8001cf2: 68bb ldr r3, [r7, #8] - 8001cf4: 3b64 subs r3, #100 ; 0x64 - 8001cf6: 60bb str r3, [r7, #8] + 800284e: 68bb ldr r3, [r7, #8] + 8002850: 3b64 subs r3, #100 ; 0x64 + 8002852: 60bb str r3, [r7, #8] if(countdown<0) - 8001cf8: 68bb ldr r3, [r7, #8] - 8001cfa: 2b00 cmp r3, #0 - 8001cfc: da03 bge.n 8001d06 + 8002854: 68bb ldr r3, [r7, #8] + 8002856: 2b00 cmp r3, #0 + 8002858: da03 bge.n 8002862 { mode=1; - 8001cfe: 230f movs r3, #15 - 8001d00: 18fb adds r3, r7, r3 - 8001d02: 2201 movs r2, #1 - 8001d04: 701a strb r2, [r3, #0] + 800285a: 230f movs r3, #15 + 800285c: 18fb adds r3, r7, r3 + 800285e: 2201 movs r2, #1 + 8002860: 701a strb r2, [r3, #0] } dis_buff.d_num[0]=((countdown/100)%10); - 8001d06: 68bb ldr r3, [r7, #8] - 8001d08: 2164 movs r1, #100 ; 0x64 - 8001d0a: 0018 movs r0, r3 - 8001d0c: f7fe fa86 bl 800021c <__divsi3> - 8001d10: 0003 movs r3, r0 - 8001d12: 210a movs r1, #10 - 8001d14: 0018 movs r0, r3 - 8001d16: f7fe fb67 bl 80003e8 <__aeabi_idivmod> - 8001d1a: 000b movs r3, r1 - 8001d1c: b2da uxtb r2, r3 - 8001d1e: 4ba3 ldr r3, [pc, #652] ; (8001fac ) - 8001d20: 701a strb r2, [r3, #0] + 8002862: 68bb ldr r3, [r7, #8] + 8002864: 2164 movs r1, #100 ; 0x64 + 8002866: 0018 movs r0, r3 + 8002868: f7fd fcd8 bl 800021c <__divsi3> + 800286c: 0003 movs r3, r0 + 800286e: 210a movs r1, #10 + 8002870: 0018 movs r0, r3 + 8002872: f7fd fdb9 bl 80003e8 <__aeabi_idivmod> + 8002876: 000b movs r3, r1 + 8002878: b2da uxtb r2, r3 + 800287a: 4b82 ldr r3, [pc, #520] ; (8002a84 ) + 800287c: 701a strb r2, [r3, #0] dis_buff.d_num[1]=((countdown/100)%10); - 8001d22: 68bb ldr r3, [r7, #8] - 8001d24: 2164 movs r1, #100 ; 0x64 - 8001d26: 0018 movs r0, r3 - 8001d28: f7fe fa78 bl 800021c <__divsi3> - 8001d2c: 0003 movs r3, r0 - 8001d2e: 210a movs r1, #10 - 8001d30: 0018 movs r0, r3 - 8001d32: f7fe fb59 bl 80003e8 <__aeabi_idivmod> - 8001d36: 000b movs r3, r1 - 8001d38: b2da uxtb r2, r3 - 8001d3a: 4b9c ldr r3, [pc, #624] ; (8001fac ) - 8001d3c: 705a strb r2, [r3, #1] + 800287e: 68bb ldr r3, [r7, #8] + 8002880: 2164 movs r1, #100 ; 0x64 + 8002882: 0018 movs r0, r3 + 8002884: f7fd fcca bl 800021c <__divsi3> + 8002888: 0003 movs r3, r0 + 800288a: 210a movs r1, #10 + 800288c: 0018 movs r0, r3 + 800288e: f7fd fdab bl 80003e8 <__aeabi_idivmod> + 8002892: 000b movs r3, r1 + 8002894: b2da uxtb r2, r3 + 8002896: 4b7b ldr r3, [pc, #492] ; (8002a84 ) + 8002898: 705a strb r2, [r3, #1] dis_buff.d_num[2]=((countdown/100)%10); - 8001d3e: 68bb ldr r3, [r7, #8] - 8001d40: 2164 movs r1, #100 ; 0x64 - 8001d42: 0018 movs r0, r3 - 8001d44: f7fe fa6a bl 800021c <__divsi3> - 8001d48: 0003 movs r3, r0 - 8001d4a: 210a movs r1, #10 - 8001d4c: 0018 movs r0, r3 - 8001d4e: f7fe fb4b bl 80003e8 <__aeabi_idivmod> - 8001d52: 000b movs r3, r1 - 8001d54: b2da uxtb r2, r3 - 8001d56: 4b95 ldr r3, [pc, #596] ; (8001fac ) - 8001d58: 709a strb r2, [r3, #2] + 800289a: 68bb ldr r3, [r7, #8] + 800289c: 2164 movs r1, #100 ; 0x64 + 800289e: 0018 movs r0, r3 + 80028a0: f7fd fcbc bl 800021c <__divsi3> + 80028a4: 0003 movs r3, r0 + 80028a6: 210a movs r1, #10 + 80028a8: 0018 movs r0, r3 + 80028aa: f7fd fd9d bl 80003e8 <__aeabi_idivmod> + 80028ae: 000b movs r3, r1 + 80028b0: b2da uxtb r2, r3 + 80028b2: 4b74 ldr r3, [pc, #464] ; (8002a84 ) + 80028b4: 709a strb r2, [r3, #2] dis_buff.d_num[3]=((countdown/100)%10); - 8001d5a: 68bb ldr r3, [r7, #8] - 8001d5c: 2164 movs r1, #100 ; 0x64 - 8001d5e: 0018 movs r0, r3 - 8001d60: f7fe fa5c bl 800021c <__divsi3> - 8001d64: 0003 movs r3, r0 - 8001d66: 210a movs r1, #10 - 8001d68: 0018 movs r0, r3 - 8001d6a: f7fe fb3d bl 80003e8 <__aeabi_idivmod> - 8001d6e: 000b movs r3, r1 - 8001d70: b2da uxtb r2, r3 - 8001d72: 4b8e ldr r3, [pc, #568] ; (8001fac ) - 8001d74: 70da strb r2, [r3, #3] + 80028b6: 68bb ldr r3, [r7, #8] + 80028b8: 2164 movs r1, #100 ; 0x64 + 80028ba: 0018 movs r0, r3 + 80028bc: f7fd fcae bl 800021c <__divsi3> + 80028c0: 0003 movs r3, r0 + 80028c2: 210a movs r1, #10 + 80028c4: 0018 movs r0, r3 + 80028c6: f7fd fd8f bl 80003e8 <__aeabi_idivmod> + 80028ca: 000b movs r3, r1 + 80028cc: b2da uxtb r2, r3 + 80028ce: 4b6d ldr r3, [pc, #436] ; (8002a84 ) + 80028d0: 70da strb r2, [r3, #3] dis_buff.dot1=countdown>>3; - 8001d76: 68bb ldr r3, [r7, #8] - 8001d78: 10db asrs r3, r3, #3 - 8001d7a: 1c1a adds r2, r3, #0 - 8001d7c: 2301 movs r3, #1 - 8001d7e: 4013 ands r3, r2 - 8001d80: b2da uxtb r2, r3 - 8001d82: 4b8a ldr r3, [pc, #552] ; (8001fac ) - 8001d84: 2101 movs r1, #1 - 8001d86: 400a ands r2, r1 - 8001d88: 0010 movs r0, r2 - 8001d8a: 7a1a ldrb r2, [r3, #8] - 8001d8c: 2101 movs r1, #1 - 8001d8e: 438a bics r2, r1 - 8001d90: 1c11 adds r1, r2, #0 - 8001d92: 1c02 adds r2, r0, #0 - 8001d94: 430a orrs r2, r1 - 8001d96: 721a strb r2, [r3, #8] + 80028d2: 68bb ldr r3, [r7, #8] + 80028d4: 10db asrs r3, r3, #3 + 80028d6: 1c1a adds r2, r3, #0 + 80028d8: 2301 movs r3, #1 + 80028da: 4013 ands r3, r2 + 80028dc: b2da uxtb r2, r3 + 80028de: 4b69 ldr r3, [pc, #420] ; (8002a84 ) + 80028e0: 2101 movs r1, #1 + 80028e2: 400a ands r2, r1 + 80028e4: 0010 movs r0, r2 + 80028e6: 7a1a ldrb r2, [r3, #8] + 80028e8: 2101 movs r1, #1 + 80028ea: 438a bics r2, r1 + 80028ec: 1c11 adds r1, r2, #0 + 80028ee: 1c02 adds r2, r0, #0 + 80028f0: 430a orrs r2, r1 + 80028f2: 721a strb r2, [r3, #8] dis_buff.dot2=countdown>>4; - 8001d98: 68bb ldr r3, [r7, #8] - 8001d9a: 111b asrs r3, r3, #4 - 8001d9c: 1c1a adds r2, r3, #0 - 8001d9e: 2301 movs r3, #1 - 8001da0: 4013 ands r3, r2 - 8001da2: b2da uxtb r2, r3 - 8001da4: 4b81 ldr r3, [pc, #516] ; (8001fac ) - 8001da6: 2101 movs r1, #1 - 8001da8: 400a ands r2, r1 - 8001daa: 1890 adds r0, r2, r2 - 8001dac: 7a1a ldrb r2, [r3, #8] - 8001dae: 2102 movs r1, #2 - 8001db0: 438a bics r2, r1 - 8001db2: 1c11 adds r1, r2, #0 - 8001db4: 1c02 adds r2, r0, #0 - 8001db6: 430a orrs r2, r1 - 8001db8: 721a strb r2, [r3, #8] + 80028f4: 68bb ldr r3, [r7, #8] + 80028f6: 111b asrs r3, r3, #4 + 80028f8: 1c1a adds r2, r3, #0 + 80028fa: 2301 movs r3, #1 + 80028fc: 4013 ands r3, r2 + 80028fe: b2da uxtb r2, r3 + 8002900: 4b60 ldr r3, [pc, #384] ; (8002a84 ) + 8002902: 2101 movs r1, #1 + 8002904: 400a ands r2, r1 + 8002906: 1890 adds r0, r2, r2 + 8002908: 7a1a ldrb r2, [r3, #8] + 800290a: 2102 movs r1, #2 + 800290c: 438a bics r2, r1 + 800290e: 1c11 adds r1, r2, #0 + 8002910: 1c02 adds r2, r0, #0 + 8002912: 430a orrs r2, r1 + 8002914: 721a strb r2, [r3, #8] dis_buff.dot3=countdown>>5; - 8001dba: 68bb ldr r3, [r7, #8] - 8001dbc: 115b asrs r3, r3, #5 - 8001dbe: 1c1a adds r2, r3, #0 - 8001dc0: 2301 movs r3, #1 - 8001dc2: 4013 ands r3, r2 - 8001dc4: b2da uxtb r2, r3 - 8001dc6: 4b79 ldr r3, [pc, #484] ; (8001fac ) - 8001dc8: 2101 movs r1, #1 - 8001dca: 400a ands r2, r1 - 8001dcc: 0090 lsls r0, r2, #2 - 8001dce: 7a1a ldrb r2, [r3, #8] - 8001dd0: 2104 movs r1, #4 - 8001dd2: 438a bics r2, r1 - 8001dd4: 1c11 adds r1, r2, #0 - 8001dd6: 1c02 adds r2, r0, #0 - 8001dd8: 430a orrs r2, r1 - 8001dda: 721a strb r2, [r3, #8] + 8002916: 68bb ldr r3, [r7, #8] + 8002918: 115b asrs r3, r3, #5 + 800291a: 1c1a adds r2, r3, #0 + 800291c: 2301 movs r3, #1 + 800291e: 4013 ands r3, r2 + 8002920: b2da uxtb r2, r3 + 8002922: 4b58 ldr r3, [pc, #352] ; (8002a84 ) + 8002924: 2101 movs r1, #1 + 8002926: 400a ands r2, r1 + 8002928: 0090 lsls r0, r2, #2 + 800292a: 7a1a ldrb r2, [r3, #8] + 800292c: 2104 movs r1, #4 + 800292e: 438a bics r2, r1 + 8002930: 1c11 adds r1, r2, #0 + 8002932: 1c02 adds r2, r0, #0 + 8002934: 430a orrs r2, r1 + 8002936: 721a strb r2, [r3, #8] dis_buff.dot4=countdown>>6; - 8001ddc: 68bb ldr r3, [r7, #8] - 8001dde: 119b asrs r3, r3, #6 - 8001de0: 1c1a adds r2, r3, #0 - 8001de2: 2301 movs r3, #1 - 8001de4: 4013 ands r3, r2 - 8001de6: b2da uxtb r2, r3 - 8001de8: 4b70 ldr r3, [pc, #448] ; (8001fac ) - 8001dea: 2101 movs r1, #1 - 8001dec: 400a ands r2, r1 - 8001dee: 00d0 lsls r0, r2, #3 - 8001df0: 7a1a ldrb r2, [r3, #8] - 8001df2: 2108 movs r1, #8 - 8001df4: 438a bics r2, r1 - 8001df6: 1c11 adds r1, r2, #0 - 8001df8: 1c02 adds r2, r0, #0 - 8001dfa: 430a orrs r2, r1 - 8001dfc: 721a strb r2, [r3, #8] + 8002938: 68bb ldr r3, [r7, #8] + 800293a: 119b asrs r3, r3, #6 + 800293c: 1c1a adds r2, r3, #0 + 800293e: 2301 movs r3, #1 + 8002940: 4013 ands r3, r2 + 8002942: b2da uxtb r2, r3 + 8002944: 4b4f ldr r3, [pc, #316] ; (8002a84 ) + 8002946: 2101 movs r1, #1 + 8002948: 400a ands r2, r1 + 800294a: 00d0 lsls r0, r2, #3 + 800294c: 7a1a ldrb r2, [r3, #8] + 800294e: 2108 movs r1, #8 + 8002950: 438a bics r2, r1 + 8002952: 1c11 adds r1, r2, #0 + 8002954: 1c02 adds r2, r0, #0 + 8002956: 430a orrs r2, r1 + 8002958: 721a strb r2, [r3, #8] } break; - 8001dfe: e2e4 b.n 80023ca + 800295a: e2e9 b.n 8002f30 case 1: //standby moto.moto1a=0; - 8001e00: 4b6b ldr r3, [pc, #428] ; (8001fb0 ) - 8001e02: 2200 movs r2, #0 - 8001e04: 721a strb r2, [r3, #8] + 800295c: 4b4a ldr r3, [pc, #296] ; (8002a88 ) + 800295e: 2200 movs r2, #0 + 8002960: 721a strb r2, [r3, #8] moto.moto1b=0; - 8001e06: 4b6a ldr r3, [pc, #424] ; (8001fb0 ) - 8001e08: 2200 movs r2, #0 - 8001e0a: 725a strb r2, [r3, #9] + 8002962: 4b49 ldr r3, [pc, #292] ; (8002a88 ) + 8002964: 2200 movs r2, #0 + 8002966: 725a strb r2, [r3, #9] moto.moto2a=0; - 8001e0c: 4b68 ldr r3, [pc, #416] ; (8001fb0 ) - 8001e0e: 2200 movs r2, #0 - 8001e10: 729a strb r2, [r3, #10] + 8002968: 4b47 ldr r3, [pc, #284] ; (8002a88 ) + 800296a: 2200 movs r2, #0 + 800296c: 729a strb r2, [r3, #10] moto.moto2b=0; - 8001e12: 4b67 ldr r3, [pc, #412] ; (8001fb0 ) - 8001e14: 2200 movs r2, #0 - 8001e16: 72da strb r2, [r3, #11] + 800296e: 4b46 ldr r3, [pc, #280] ; (8002a88 ) + 8002970: 2200 movs r2, #0 + 8002972: 72da strb r2, [r3, #11] if(HAL_GetTick()>runtime) - 8001e18: f7fe fc88 bl 800072c - 8001e1c: 0002 movs r2, r0 - 8001e1e: 697b ldr r3, [r7, #20] - 8001e20: 4293 cmp r3, r2 - 8001e22: d217 bcs.n 8001e54 + 8002974: f7fd ff80 bl 8000878 + 8002978: 0002 movs r2, r0 + 800297a: 697b ldr r3, [r7, #20] + 800297c: 4293 cmp r3, r2 + 800297e: d217 bcs.n 80029b0 { runtime+=1000; - 8001e24: 697b ldr r3, [r7, #20] - 8001e26: 22fa movs r2, #250 ; 0xfa - 8001e28: 0092 lsls r2, r2, #2 - 8001e2a: 4694 mov ip, r2 - 8001e2c: 4463 add r3, ip - 8001e2e: 617b str r3, [r7, #20] + 8002980: 697b ldr r3, [r7, #20] + 8002982: 22fa movs r2, #250 ; 0xfa + 8002984: 0092 lsls r2, r2, #2 + 8002986: 4694 mov ip, r2 + 8002988: 4463 add r3, ip + 800298a: 617b str r3, [r7, #20] if(dis_buff.led_run==1) - 8001e30: 4b5e ldr r3, [pc, #376] ; (8001fac ) - 8001e32: 7a1b ldrb r3, [r3, #8] - 8001e34: 2210 movs r2, #16 - 8001e36: 4013 ands r3, r2 - 8001e38: b2db uxtb r3, r3 - 8001e3a: 2b00 cmp r3, #0 - 8001e3c: d005 beq.n 8001e4a + 800298c: 4b3d ldr r3, [pc, #244] ; (8002a84 ) + 800298e: 7a1b ldrb r3, [r3, #8] + 8002990: 2210 movs r2, #16 + 8002992: 4013 ands r3, r2 + 8002994: b2db uxtb r3, r3 + 8002996: 2b00 cmp r3, #0 + 8002998: d005 beq.n 80029a6 { dis_buff.led_run=0; - 8001e3e: 4b5b ldr r3, [pc, #364] ; (8001fac ) - 8001e40: 7a1a ldrb r2, [r3, #8] - 8001e42: 2110 movs r1, #16 - 8001e44: 438a bics r2, r1 - 8001e46: 721a strb r2, [r3, #8] - 8001e48: e004 b.n 8001e54 + 800299a: 4b3a ldr r3, [pc, #232] ; (8002a84 ) + 800299c: 7a1a ldrb r2, [r3, #8] + 800299e: 2110 movs r1, #16 + 80029a0: 438a bics r2, r1 + 80029a2: 721a strb r2, [r3, #8] + 80029a4: e004 b.n 80029b0 }else { dis_buff.led_run=1; - 8001e4a: 4b58 ldr r3, [pc, #352] ; (8001fac ) - 8001e4c: 7a1a ldrb r2, [r3, #8] - 8001e4e: 2110 movs r1, #16 - 8001e50: 430a orrs r2, r1 - 8001e52: 721a strb r2, [r3, #8] + 80029a6: 4b37 ldr r3, [pc, #220] ; (8002a84 ) + 80029a8: 7a1a ldrb r2, [r3, #8] + 80029aa: 2110 movs r1, #16 + 80029ac: 430a orrs r2, r1 + 80029ae: 721a strb r2, [r3, #8] } } dis_buff.d_num[0]=0xff; - 8001e54: 4b55 ldr r3, [pc, #340] ; (8001fac ) - 8001e56: 22ff movs r2, #255 ; 0xff - 8001e58: 701a strb r2, [r3, #0] + 80029b0: 4b34 ldr r3, [pc, #208] ; (8002a84 ) + 80029b2: 22ff movs r2, #255 ; 0xff + 80029b4: 701a strb r2, [r3, #0] dis_buff.d_num[1]=0xff; - 8001e5a: 4b54 ldr r3, [pc, #336] ; (8001fac ) - 8001e5c: 22ff movs r2, #255 ; 0xff - 8001e5e: 705a strb r2, [r3, #1] + 80029b6: 4b33 ldr r3, [pc, #204] ; (8002a84 ) + 80029b8: 22ff movs r2, #255 ; 0xff + 80029ba: 705a strb r2, [r3, #1] dis_buff.d_num[2]=0xff; - 8001e60: 4b52 ldr r3, [pc, #328] ; (8001fac ) - 8001e62: 22ff movs r2, #255 ; 0xff - 8001e64: 709a strb r2, [r3, #2] + 80029bc: 4b31 ldr r3, [pc, #196] ; (8002a84 ) + 80029be: 22ff movs r2, #255 ; 0xff + 80029c0: 709a strb r2, [r3, #2] dis_buff.d_num[3]=0xff; - 8001e66: 4b51 ldr r3, [pc, #324] ; (8001fac ) - 8001e68: 22ff movs r2, #255 ; 0xff - 8001e6a: 70da strb r2, [r3, #3] + 80029c2: 4b30 ldr r3, [pc, #192] ; (8002a84 ) + 80029c4: 22ff movs r2, #255 ; 0xff + 80029c6: 70da strb r2, [r3, #3] dis_buff.dot1=0; - 8001e6c: 4b4f ldr r3, [pc, #316] ; (8001fac ) - 8001e6e: 7a1a ldrb r2, [r3, #8] - 8001e70: 2101 movs r1, #1 - 8001e72: 438a bics r2, r1 - 8001e74: 721a strb r2, [r3, #8] + 80029c8: 4b2e ldr r3, [pc, #184] ; (8002a84 ) + 80029ca: 7a1a ldrb r2, [r3, #8] + 80029cc: 2101 movs r1, #1 + 80029ce: 438a bics r2, r1 + 80029d0: 721a strb r2, [r3, #8] dis_buff.dot2=0; - 8001e76: 4b4d ldr r3, [pc, #308] ; (8001fac ) - 8001e78: 7a1a ldrb r2, [r3, #8] - 8001e7a: 2102 movs r1, #2 - 8001e7c: 438a bics r2, r1 - 8001e7e: 721a strb r2, [r3, #8] + 80029d2: 4b2c ldr r3, [pc, #176] ; (8002a84 ) + 80029d4: 7a1a ldrb r2, [r3, #8] + 80029d6: 2102 movs r1, #2 + 80029d8: 438a bics r2, r1 + 80029da: 721a strb r2, [r3, #8] dis_buff.dot3=0; - 8001e80: 4b4a ldr r3, [pc, #296] ; (8001fac ) - 8001e82: 7a1a ldrb r2, [r3, #8] - 8001e84: 2104 movs r1, #4 - 8001e86: 438a bics r2, r1 - 8001e88: 721a strb r2, [r3, #8] + 80029dc: 4b29 ldr r3, [pc, #164] ; (8002a84 ) + 80029de: 7a1a ldrb r2, [r3, #8] + 80029e0: 2104 movs r1, #4 + 80029e2: 438a bics r2, r1 + 80029e4: 721a strb r2, [r3, #8] dis_buff.dot4=0; - 8001e8a: 4b48 ldr r3, [pc, #288] ; (8001fac ) - 8001e8c: 7a1a ldrb r2, [r3, #8] - 8001e8e: 2108 movs r1, #8 - 8001e90: 438a bics r2, r1 - 8001e92: 721a strb r2, [r3, #8] + 80029e6: 4b27 ldr r3, [pc, #156] ; (8002a84 ) + 80029e8: 7a1a ldrb r2, [r3, #8] + 80029ea: 2108 movs r1, #8 + 80029ec: 438a bics r2, r1 + 80029ee: 721a strb r2, [r3, #8] overload_times=0; - 8001e94: 230c movs r3, #12 - 8001e96: 18fb adds r3, r7, r3 - 8001e98: 2200 movs r2, #0 - 8001e9a: 801a strh r2, [r3, #0] + 80029f0: 230c movs r3, #12 + 80029f2: 18fb adds r3, r7, r3 + 80029f4: 2200 movs r2, #0 + 80029f6: 801a strh r2, [r3, #0] if(key2.code!=0) - 8001e9c: 4b46 ldr r3, [pc, #280] ; (8001fb8 ) - 8001e9e: 681b ldr r3, [r3, #0] - 8001ea0: 2b00 cmp r3, #0 - 8001ea2: d005 beq.n 8001eb0 + 80029f8: 4b28 ldr r3, [pc, #160] ; (8002a9c ) + 80029fa: 681b ldr r3, [r3, #0] + 80029fc: 2b00 cmp r3, #0 + 80029fe: d005 beq.n 8002a0c { mode=2; - 8001ea4: 230f movs r3, #15 - 8001ea6: 18fb adds r3, r7, r3 - 8001ea8: 2202 movs r2, #2 - 8001eaa: 701a strb r2, [r3, #0] + 8002a00: 230f movs r3, #15 + 8002a02: 18fb adds r3, r7, r3 + 8002a04: 2202 movs r2, #2 + 8002a06: 701a strb r2, [r3, #0] countdown=countdown_set; - 8001eac: 687b ldr r3, [r7, #4] - 8001eae: 60bb str r3, [r7, #8] + 8002a08: 687b ldr r3, [r7, #4] + 8002a0a: 60bb str r3, [r7, #8] } if(key3.code!=0) - 8001eb0: 4b42 ldr r3, [pc, #264] ; (8001fbc ) - 8001eb2: 681b ldr r3, [r3, #0] - 8001eb4: 2b00 cmp r3, #0 - 8001eb6: d005 beq.n 8001ec4 + 8002a0c: 4b24 ldr r3, [pc, #144] ; (8002aa0 ) + 8002a0e: 681b ldr r3, [r3, #0] + 8002a10: 2b00 cmp r3, #0 + 8002a12: d005 beq.n 8002a20 { mode=3; - 8001eb8: 230f movs r3, #15 - 8001eba: 18fb adds r3, r7, r3 - 8001ebc: 2203 movs r2, #3 - 8001ebe: 701a strb r2, [r3, #0] + 8002a14: 230f movs r3, #15 + 8002a16: 18fb adds r3, r7, r3 + 8002a18: 2203 movs r2, #3 + 8002a1a: 701a strb r2, [r3, #0] countdown=countdown_set; - 8001ec0: 687b ldr r3, [r7, #4] - 8001ec2: 60bb str r3, [r7, #8] + 8002a1c: 687b ldr r3, [r7, #4] + 8002a1e: 60bb str r3, [r7, #8] } if(key1.code!=0) - 8001ec4: 4b3e ldr r3, [pc, #248] ; (8001fc0 ) - 8001ec6: 681b ldr r3, [r3, #0] - 8001ec8: 2b00 cmp r3, #0 - 8001eca: d100 bne.n 8001ece - 8001ecc: e27f b.n 80023ce + 8002a20: 4b20 ldr r3, [pc, #128] ; (8002aa4 ) + 8002a22: 681b ldr r3, [r3, #0] + 8002a24: 2b00 cmp r3, #0 + 8002a26: d100 bne.n 8002a2a + 8002a28: e284 b.n 8002f34 { mode=4; - 8001ece: 230f movs r3, #15 - 8001ed0: 18fb adds r3, r7, r3 - 8001ed2: 2204 movs r2, #4 - 8001ed4: 701a strb r2, [r3, #0] + 8002a2a: 230f movs r3, #15 + 8002a2c: 18fb adds r3, r7, r3 + 8002a2e: 2204 movs r2, #4 + 8002a30: 701a strb r2, [r3, #0] countdown=10000; - 8001ed6: 4b3b ldr r3, [pc, #236] ; (8001fc4 ) - 8001ed8: 60bb str r3, [r7, #8] + 8002a32: 4b1d ldr r3, [pc, #116] ; (8002aa8 ) + 8002a34: 60bb str r3, [r7, #8] } break; - 8001eda: e278 b.n 80023ce + 8002a36: e27d b.n 8002f34 case 2: moto.moto1a=10; - 8001edc: 4b34 ldr r3, [pc, #208] ; (8001fb0 ) - 8001ede: 220a movs r2, #10 - 8001ee0: 721a strb r2, [r3, #8] + 8002a38: 4b13 ldr r3, [pc, #76] ; (8002a88 ) + 8002a3a: 220a movs r2, #10 + 8002a3c: 721a strb r2, [r3, #8] moto.moto1b=0; - 8001ee2: 4b33 ldr r3, [pc, #204] ; (8001fb0 ) - 8001ee4: 2200 movs r2, #0 - 8001ee6: 725a strb r2, [r3, #9] + 8002a3e: 4b12 ldr r3, [pc, #72] ; (8002a88 ) + 8002a40: 2200 movs r2, #0 + 8002a42: 725a strb r2, [r3, #9] moto.moto2a=10; - 8001ee8: 4b31 ldr r3, [pc, #196] ; (8001fb0 ) - 8001eea: 220a movs r2, #10 - 8001eec: 729a strb r2, [r3, #10] + 8002a44: 4b10 ldr r3, [pc, #64] ; (8002a88 ) + 8002a46: 220a movs r2, #10 + 8002a48: 729a strb r2, [r3, #10] moto.moto2b=0; - 8001eee: 4b30 ldr r3, [pc, #192] ; (8001fb0 ) - 8001ef0: 2200 movs r2, #0 - 8001ef2: 72da strb r2, [r3, #11] + 8002a4a: 4b0f ldr r3, [pc, #60] ; (8002a88 ) + 8002a4c: 2200 movs r2, #0 + 8002a4e: 72da strb r2, [r3, #11] if(HAL_GetTick()>move) - 8001ef4: f7fe fc1a bl 800072c - 8001ef8: 0002 movs r2, r0 - 8001efa: 693b ldr r3, [r7, #16] - 8001efc: 4293 cmp r3, r2 - 8001efe: d220 bcs.n 8001f42 + 8002a50: f7fd ff12 bl 8000878 + 8002a54: 0002 movs r2, r0 + 8002a56: 693b ldr r3, [r7, #16] + 8002a58: 4293 cmp r3, r2 + 8002a5a: d236 bcs.n 8002aca { move=HAL_GetTick()+100; - 8001f00: f7fe fc14 bl 800072c - 8001f04: 0003 movs r3, r0 - 8001f06: 3364 adds r3, #100 ; 0x64 - 8001f08: 613b str r3, [r7, #16] + 8002a5c: f7fd ff0c bl 8000878 + 8002a60: 0003 movs r3, r0 + 8002a62: 3364 adds r3, #100 ; 0x64 + 8002a64: 613b str r3, [r7, #16] if(dis_buff.led_run==1) - 8001f0a: 4b28 ldr r3, [pc, #160] ; (8001fac ) - 8001f0c: 7a1b ldrb r3, [r3, #8] - 8001f0e: 2210 movs r2, #16 - 8001f10: 4013 ands r3, r2 - 8001f12: b2db uxtb r3, r3 - 8001f14: 2b00 cmp r3, #0 - 8001f16: d005 beq.n 8001f24 + 8002a66: 4b07 ldr r3, [pc, #28] ; (8002a84 ) + 8002a68: 7a1b ldrb r3, [r3, #8] + 8002a6a: 2210 movs r2, #16 + 8002a6c: 4013 ands r3, r2 + 8002a6e: b2db uxtb r3, r3 + 8002a70: 2b00 cmp r3, #0 + 8002a72: d01b beq.n 8002aac { dis_buff.led_run=0; - 8001f18: 4b24 ldr r3, [pc, #144] ; (8001fac ) - 8001f1a: 7a1a ldrb r2, [r3, #8] - 8001f1c: 2110 movs r1, #16 - 8001f1e: 438a bics r2, r1 - 8001f20: 721a strb r2, [r3, #8] - 8001f22: e004 b.n 8001f2e + 8002a74: 4b03 ldr r3, [pc, #12] ; (8002a84 ) + 8002a76: 7a1a ldrb r2, [r3, #8] + 8002a78: 2110 movs r1, #16 + 8002a7a: 438a bics r2, r1 + 8002a7c: 721a strb r2, [r3, #8] + 8002a7e: e01a b.n 8002ab6 + 8002a80: 00003a98 .word 0x00003a98 + 8002a84: 2000007c .word 0x2000007c + 8002a88: 200000dc .word 0x200000dc + 8002a8c: 20000028 .word 0x20000028 + 8002a90: 0000ffff .word 0x0000ffff + 8002a94: 200000b8 .word 0x200000b8 + 8002a98: 08003090 .word 0x08003090 + 8002a9c: 200000cc .word 0x200000cc + 8002aa0: 200000a8 .word 0x200000a8 + 8002aa4: 20000088 .word 0x20000088 + 8002aa8: 00002710 .word 0x00002710 }else { dis_buff.led_run=1; - 8001f24: 4b21 ldr r3, [pc, #132] ; (8001fac ) - 8001f26: 7a1a ldrb r2, [r3, #8] - 8001f28: 2110 movs r1, #16 - 8001f2a: 430a orrs r2, r1 - 8001f2c: 721a strb r2, [r3, #8] + 8002aac: 4bd9 ldr r3, [pc, #868] ; (8002e14 ) + 8002aae: 7a1a ldrb r2, [r3, #8] + 8002ab0: 2110 movs r1, #16 + 8002ab2: 430a orrs r2, r1 + 8002ab4: 721a strb r2, [r3, #8] } countdown-=100; - 8001f2e: 68bb ldr r3, [r7, #8] - 8001f30: 3b64 subs r3, #100 ; 0x64 - 8001f32: 60bb str r3, [r7, #8] + 8002ab6: 68bb ldr r3, [r7, #8] + 8002ab8: 3b64 subs r3, #100 ; 0x64 + 8002aba: 60bb str r3, [r7, #8] if(countdown<0) - 8001f34: 68bb ldr r3, [r7, #8] - 8001f36: 2b00 cmp r3, #0 - 8001f38: da03 bge.n 8001f42 + 8002abc: 68bb ldr r3, [r7, #8] + 8002abe: 2b00 cmp r3, #0 + 8002ac0: da03 bge.n 8002aca { mode=1; - 8001f3a: 230f movs r3, #15 - 8001f3c: 18fb adds r3, r7, r3 - 8001f3e: 2201 movs r2, #1 - 8001f40: 701a strb r2, [r3, #0] + 8002ac2: 230f movs r3, #15 + 8002ac4: 18fb adds r3, r7, r3 + 8002ac6: 2201 movs r2, #1 + 8002ac8: 701a strb r2, [r3, #0] } } dis_buff.d_num[3]=(countdown/100)%10; - 8001f42: 68bb ldr r3, [r7, #8] - 8001f44: 2164 movs r1, #100 ; 0x64 - 8001f46: 0018 movs r0, r3 - 8001f48: f7fe f968 bl 800021c <__divsi3> - 8001f4c: 0003 movs r3, r0 - 8001f4e: 210a movs r1, #10 - 8001f50: 0018 movs r0, r3 - 8001f52: f7fe fa49 bl 80003e8 <__aeabi_idivmod> - 8001f56: 000b movs r3, r1 - 8001f58: b2da uxtb r2, r3 - 8001f5a: 4b14 ldr r3, [pc, #80] ; (8001fac ) - 8001f5c: 70da strb r2, [r3, #3] + 8002aca: 68bb ldr r3, [r7, #8] + 8002acc: 2164 movs r1, #100 ; 0x64 + 8002ace: 0018 movs r0, r3 + 8002ad0: f7fd fba4 bl 800021c <__divsi3> + 8002ad4: 0003 movs r3, r0 + 8002ad6: 210a movs r1, #10 + 8002ad8: 0018 movs r0, r3 + 8002ada: f7fd fc85 bl 80003e8 <__aeabi_idivmod> + 8002ade: 000b movs r3, r1 + 8002ae0: b2da uxtb r2, r3 + 8002ae2: 4bcc ldr r3, [pc, #816] ; (8002e14 ) + 8002ae4: 70da strb r2, [r3, #3] dis_buff.d_num[2]=(countdown/1000)%10; - 8001f5e: 68bb ldr r3, [r7, #8] - 8001f60: 22fa movs r2, #250 ; 0xfa - 8001f62: 0091 lsls r1, r2, #2 - 8001f64: 0018 movs r0, r3 - 8001f66: f7fe f959 bl 800021c <__divsi3> - 8001f6a: 0003 movs r3, r0 - 8001f6c: 210a movs r1, #10 - 8001f6e: 0018 movs r0, r3 - 8001f70: f7fe fa3a bl 80003e8 <__aeabi_idivmod> - 8001f74: 000b movs r3, r1 - 8001f76: b2da uxtb r2, r3 - 8001f78: 4b0c ldr r3, [pc, #48] ; (8001fac ) - 8001f7a: 709a strb r2, [r3, #2] + 8002ae6: 68bb ldr r3, [r7, #8] + 8002ae8: 22fa movs r2, #250 ; 0xfa + 8002aea: 0091 lsls r1, r2, #2 + 8002aec: 0018 movs r0, r3 + 8002aee: f7fd fb95 bl 800021c <__divsi3> + 8002af2: 0003 movs r3, r0 + 8002af4: 210a movs r1, #10 + 8002af6: 0018 movs r0, r3 + 8002af8: f7fd fc76 bl 80003e8 <__aeabi_idivmod> + 8002afc: 000b movs r3, r1 + 8002afe: b2da uxtb r2, r3 + 8002b00: 4bc4 ldr r3, [pc, #784] ; (8002e14 ) + 8002b02: 709a strb r2, [r3, #2] dis_buff.d_num[1]=((countdown/10000)%10); - 8001f7c: 68bb ldr r3, [r7, #8] - 8001f7e: 4911 ldr r1, [pc, #68] ; (8001fc4 ) - 8001f80: 0018 movs r0, r3 - 8001f82: f7fe f94b bl 800021c <__divsi3> - 8001f86: 0003 movs r3, r0 - 8001f88: 210a movs r1, #10 - 8001f8a: 0018 movs r0, r3 - 8001f8c: f7fe fa2c bl 80003e8 <__aeabi_idivmod> - 8001f90: 000b movs r3, r1 - 8001f92: b2da uxtb r2, r3 - 8001f94: 4b05 ldr r3, [pc, #20] ; (8001fac ) - 8001f96: 705a strb r2, [r3, #1] + 8002b04: 68bb ldr r3, [r7, #8] + 8002b06: 49c4 ldr r1, [pc, #784] ; (8002e18 ) + 8002b08: 0018 movs r0, r3 + 8002b0a: f7fd fb87 bl 800021c <__divsi3> + 8002b0e: 0003 movs r3, r0 + 8002b10: 210a movs r1, #10 + 8002b12: 0018 movs r0, r3 + 8002b14: f7fd fc68 bl 80003e8 <__aeabi_idivmod> + 8002b18: 000b movs r3, r1 + 8002b1a: b2da uxtb r2, r3 + 8002b1c: 4bbd ldr r3, [pc, #756] ; (8002e14 ) + 8002b1e: 705a strb r2, [r3, #1] dis_buff.d_num[1]=dis_buff.d_num[1]==0?255:dis_buff.d_num[1]; - 8001f98: 4b04 ldr r3, [pc, #16] ; (8001fac ) - 8001f9a: 785b ldrb r3, [r3, #1] - 8001f9c: 2b00 cmp r3, #0 - 8001f9e: d013 beq.n 8001fc8 - 8001fa0: 4b02 ldr r3, [pc, #8] ; (8001fac ) - 8001fa2: 785a ldrb r2, [r3, #1] - 8001fa4: e011 b.n 8001fca - 8001fa6: 46c0 nop ; (mov r8, r8) - 8001fa8: 00003a98 .word 0x00003a98 - 8001fac: 2000003c .word 0x2000003c - 8001fb0: 20000088 .word 0x20000088 - 8001fb4: 080024ec .word 0x080024ec - 8001fb8: 20000078 .word 0x20000078 - 8001fbc: 20000068 .word 0x20000068 - 8001fc0: 20000048 .word 0x20000048 - 8001fc4: 00002710 .word 0x00002710 - 8001fc8: 22ff movs r2, #255 ; 0xff - 8001fca: 4bdc ldr r3, [pc, #880] ; (800233c ) - 8001fcc: 705a strb r2, [r3, #1] + 8002b20: 4bbc ldr r3, [pc, #752] ; (8002e14 ) + 8002b22: 785b ldrb r3, [r3, #1] + 8002b24: 2b00 cmp r3, #0 + 8002b26: d002 beq.n 8002b2e + 8002b28: 4bba ldr r3, [pc, #744] ; (8002e14 ) + 8002b2a: 785a ldrb r2, [r3, #1] + 8002b2c: e000 b.n 8002b30 + 8002b2e: 22ff movs r2, #255 ; 0xff + 8002b30: 4bb8 ldr r3, [pc, #736] ; (8002e14 ) + 8002b32: 705a strb r2, [r3, #1] dis_buff.dot3=1; - 8001fce: 4bdb ldr r3, [pc, #876] ; (800233c ) - 8001fd0: 7a1a ldrb r2, [r3, #8] - 8001fd2: 2104 movs r1, #4 - 8001fd4: 430a orrs r2, r1 - 8001fd6: 721a strb r2, [r3, #8] + 8002b34: 4bb7 ldr r3, [pc, #732] ; (8002e14 ) + 8002b36: 7a1a ldrb r2, [r3, #8] + 8002b38: 2104 movs r1, #4 + 8002b3a: 430a orrs r2, r1 + 8002b3c: 721a strb r2, [r3, #8] if(key3.code!=0) - 8001fd8: 4bd9 ldr r3, [pc, #868] ; (8002340 ) - 8001fda: 681b ldr r3, [r3, #0] - 8001fdc: 2b00 cmp r3, #0 - 8001fde: d007 beq.n 8001ff0 + 8002b3e: 4bb7 ldr r3, [pc, #732] ; (8002e1c ) + 8002b40: 681b ldr r3, [r3, #0] + 8002b42: 2b00 cmp r3, #0 + 8002b44: d007 beq.n 8002b56 { mode=3; - 8001fe0: 230f movs r3, #15 - 8001fe2: 18fb adds r3, r7, r3 - 8001fe4: 2203 movs r2, #3 - 8001fe6: 701a strb r2, [r3, #0] + 8002b46: 230f movs r3, #15 + 8002b48: 18fb adds r3, r7, r3 + 8002b4a: 2203 movs r2, #3 + 8002b4c: 701a strb r2, [r3, #0] countdown=countdown_set-countdown; - 8001fe8: 687a ldr r2, [r7, #4] - 8001fea: 68bb ldr r3, [r7, #8] - 8001fec: 1ad3 subs r3, r2, r3 - 8001fee: 60bb str r3, [r7, #8] + 8002b4e: 687a ldr r2, [r7, #4] + 8002b50: 68bb ldr r3, [r7, #8] + 8002b52: 1ad3 subs r3, r2, r3 + 8002b54: 60bb str r3, [r7, #8] } if(key4.code!=0) - 8001ff0: 4bd4 ldr r3, [pc, #848] ; (8002344 ) - 8001ff2: 681b ldr r3, [r3, #0] - 8001ff4: 2b00 cmp r3, #0 - 8001ff6: d003 beq.n 8002000 + 8002b56: 4bb2 ldr r3, [pc, #712] ; (8002e20 ) + 8002b58: 681b ldr r3, [r3, #0] + 8002b5a: 2b00 cmp r3, #0 + 8002b5c: d003 beq.n 8002b66 { mode=1; - 8001ff8: 230f movs r3, #15 - 8001ffa: 18fb adds r3, r7, r3 - 8001ffc: 2201 movs r2, #1 - 8001ffe: 701a strb r2, [r3, #0] + 8002b5e: 230f movs r3, #15 + 8002b60: 18fb adds r3, r7, r3 + 8002b62: 2201 movs r2, #1 + 8002b64: 701a strb r2, [r3, #0] } if(overload.code!=0) - 8002000: 4bd1 ldr r3, [pc, #836] ; (8002348 ) - 8002002: 681b ldr r3, [r3, #0] - 8002004: 2b00 cmp r3, #0 - 8002006: d005 beq.n 8002014 + 8002b66: 4baf ldr r3, [pc, #700] ; (8002e24 ) + 8002b68: 681b ldr r3, [r3, #0] + 8002b6a: 2b00 cmp r3, #0 + 8002b6c: d005 beq.n 8002b7a { overload_times+=1; - 8002008: 220c movs r2, #12 - 800200a: 18bb adds r3, r7, r2 - 800200c: 18ba adds r2, r7, r2 - 800200e: 8812 ldrh r2, [r2, #0] - 8002010: 3201 adds r2, #1 - 8002012: 801a strh r2, [r3, #0] + 8002b6e: 220c movs r2, #12 + 8002b70: 18bb adds r3, r7, r2 + 8002b72: 18ba adds r2, r7, r2 + 8002b74: 8812 ldrh r2, [r2, #0] + 8002b76: 3201 adds r2, #1 + 8002b78: 801a strh r2, [r3, #0] } if(overload_times>2) - 8002014: 230c movs r3, #12 - 8002016: 18fb adds r3, r7, r3 - 8002018: 881b ldrh r3, [r3, #0] - 800201a: 2b02 cmp r3, #2 - 800201c: d800 bhi.n 8002020 - 800201e: e1d8 b.n 80023d2 + 8002b7a: 230c movs r3, #12 + 8002b7c: 18fb adds r3, r7, r3 + 8002b7e: 881b ldrh r3, [r3, #0] + 8002b80: 2b02 cmp r3, #2 + 8002b82: d800 bhi.n 8002b86 + 8002b84: e1d8 b.n 8002f38 { overload_mode=2; - 8002020: 230e movs r3, #14 - 8002022: 18fb adds r3, r7, r3 - 8002024: 2202 movs r2, #2 - 8002026: 701a strb r2, [r3, #0] + 8002b86: 230e movs r3, #14 + 8002b88: 18fb adds r3, r7, r3 + 8002b8a: 2202 movs r2, #2 + 8002b8c: 701a strb r2, [r3, #0] mode=5; - 8002028: 230f movs r3, #15 - 800202a: 18fb adds r3, r7, r3 - 800202c: 2205 movs r2, #5 - 800202e: 701a strb r2, [r3, #0] + 8002b8e: 230f movs r3, #15 + 8002b90: 18fb adds r3, r7, r3 + 8002b92: 2205 movs r2, #5 + 8002b94: 701a strb r2, [r3, #0] } break; - 8002030: e1cf b.n 80023d2 + 8002b96: e1cf b.n 8002f38 case 3: moto.moto1a=0; - 8002032: 4bc6 ldr r3, [pc, #792] ; (800234c ) - 8002034: 2200 movs r2, #0 - 8002036: 721a strb r2, [r3, #8] + 8002b98: 4ba3 ldr r3, [pc, #652] ; (8002e28 ) + 8002b9a: 2200 movs r2, #0 + 8002b9c: 721a strb r2, [r3, #8] moto.moto1b=10; - 8002038: 4bc4 ldr r3, [pc, #784] ; (800234c ) - 800203a: 220a movs r2, #10 - 800203c: 725a strb r2, [r3, #9] + 8002b9e: 4ba2 ldr r3, [pc, #648] ; (8002e28 ) + 8002ba0: 220a movs r2, #10 + 8002ba2: 725a strb r2, [r3, #9] moto.moto2a=0; - 800203e: 4bc3 ldr r3, [pc, #780] ; (800234c ) - 8002040: 2200 movs r2, #0 - 8002042: 729a strb r2, [r3, #10] + 8002ba4: 4ba0 ldr r3, [pc, #640] ; (8002e28 ) + 8002ba6: 2200 movs r2, #0 + 8002ba8: 729a strb r2, [r3, #10] moto.moto2b=10; - 8002044: 4bc1 ldr r3, [pc, #772] ; (800234c ) - 8002046: 220a movs r2, #10 - 8002048: 72da strb r2, [r3, #11] + 8002baa: 4b9f ldr r3, [pc, #636] ; (8002e28 ) + 8002bac: 220a movs r2, #10 + 8002bae: 72da strb r2, [r3, #11] if(HAL_GetTick()>move) - 800204a: f7fe fb6f bl 800072c - 800204e: 0002 movs r2, r0 - 8002050: 693b ldr r3, [r7, #16] - 8002052: 4293 cmp r3, r2 - 8002054: d220 bcs.n 8002098 + 8002bb0: f7fd fe62 bl 8000878 + 8002bb4: 0002 movs r2, r0 + 8002bb6: 693b ldr r3, [r7, #16] + 8002bb8: 4293 cmp r3, r2 + 8002bba: d220 bcs.n 8002bfe { move=HAL_GetTick()+100; - 8002056: f7fe fb69 bl 800072c - 800205a: 0003 movs r3, r0 - 800205c: 3364 adds r3, #100 ; 0x64 - 800205e: 613b str r3, [r7, #16] + 8002bbc: f7fd fe5c bl 8000878 + 8002bc0: 0003 movs r3, r0 + 8002bc2: 3364 adds r3, #100 ; 0x64 + 8002bc4: 613b str r3, [r7, #16] if(dis_buff.led_run==1) - 8002060: 4bb6 ldr r3, [pc, #728] ; (800233c ) - 8002062: 7a1b ldrb r3, [r3, #8] - 8002064: 2210 movs r2, #16 - 8002066: 4013 ands r3, r2 - 8002068: b2db uxtb r3, r3 - 800206a: 2b00 cmp r3, #0 - 800206c: d005 beq.n 800207a + 8002bc6: 4b93 ldr r3, [pc, #588] ; (8002e14 ) + 8002bc8: 7a1b ldrb r3, [r3, #8] + 8002bca: 2210 movs r2, #16 + 8002bcc: 4013 ands r3, r2 + 8002bce: b2db uxtb r3, r3 + 8002bd0: 2b00 cmp r3, #0 + 8002bd2: d005 beq.n 8002be0 { dis_buff.led_run=0; - 800206e: 4bb3 ldr r3, [pc, #716] ; (800233c ) - 8002070: 7a1a ldrb r2, [r3, #8] - 8002072: 2110 movs r1, #16 - 8002074: 438a bics r2, r1 - 8002076: 721a strb r2, [r3, #8] - 8002078: e004 b.n 8002084 + 8002bd4: 4b8f ldr r3, [pc, #572] ; (8002e14 ) + 8002bd6: 7a1a ldrb r2, [r3, #8] + 8002bd8: 2110 movs r1, #16 + 8002bda: 438a bics r2, r1 + 8002bdc: 721a strb r2, [r3, #8] + 8002bde: e004 b.n 8002bea }else { dis_buff.led_run=1; - 800207a: 4bb0 ldr r3, [pc, #704] ; (800233c ) - 800207c: 7a1a ldrb r2, [r3, #8] - 800207e: 2110 movs r1, #16 - 8002080: 430a orrs r2, r1 - 8002082: 721a strb r2, [r3, #8] + 8002be0: 4b8c ldr r3, [pc, #560] ; (8002e14 ) + 8002be2: 7a1a ldrb r2, [r3, #8] + 8002be4: 2110 movs r1, #16 + 8002be6: 430a orrs r2, r1 + 8002be8: 721a strb r2, [r3, #8] } countdown-=100; - 8002084: 68bb ldr r3, [r7, #8] - 8002086: 3b64 subs r3, #100 ; 0x64 - 8002088: 60bb str r3, [r7, #8] + 8002bea: 68bb ldr r3, [r7, #8] + 8002bec: 3b64 subs r3, #100 ; 0x64 + 8002bee: 60bb str r3, [r7, #8] if(countdown<0) - 800208a: 68bb ldr r3, [r7, #8] - 800208c: 2b00 cmp r3, #0 - 800208e: da03 bge.n 8002098 + 8002bf0: 68bb ldr r3, [r7, #8] + 8002bf2: 2b00 cmp r3, #0 + 8002bf4: da03 bge.n 8002bfe { mode=1; - 8002090: 230f movs r3, #15 - 8002092: 18fb adds r3, r7, r3 - 8002094: 2201 movs r2, #1 - 8002096: 701a strb r2, [r3, #0] + 8002bf6: 230f movs r3, #15 + 8002bf8: 18fb adds r3, r7, r3 + 8002bfa: 2201 movs r2, #1 + 8002bfc: 701a strb r2, [r3, #0] } } dis_buff.d_num[3]=(countdown/100)%10; - 8002098: 68bb ldr r3, [r7, #8] - 800209a: 2164 movs r1, #100 ; 0x64 - 800209c: 0018 movs r0, r3 - 800209e: f7fe f8bd bl 800021c <__divsi3> - 80020a2: 0003 movs r3, r0 - 80020a4: 210a movs r1, #10 - 80020a6: 0018 movs r0, r3 - 80020a8: f7fe f99e bl 80003e8 <__aeabi_idivmod> - 80020ac: 000b movs r3, r1 - 80020ae: b2da uxtb r2, r3 - 80020b0: 4ba2 ldr r3, [pc, #648] ; (800233c ) - 80020b2: 70da strb r2, [r3, #3] + 8002bfe: 68bb ldr r3, [r7, #8] + 8002c00: 2164 movs r1, #100 ; 0x64 + 8002c02: 0018 movs r0, r3 + 8002c04: f7fd fb0a bl 800021c <__divsi3> + 8002c08: 0003 movs r3, r0 + 8002c0a: 210a movs r1, #10 + 8002c0c: 0018 movs r0, r3 + 8002c0e: f7fd fbeb bl 80003e8 <__aeabi_idivmod> + 8002c12: 000b movs r3, r1 + 8002c14: b2da uxtb r2, r3 + 8002c16: 4b7f ldr r3, [pc, #508] ; (8002e14 ) + 8002c18: 70da strb r2, [r3, #3] dis_buff.d_num[2]=(countdown/1000)%10; - 80020b4: 68bb ldr r3, [r7, #8] - 80020b6: 22fa movs r2, #250 ; 0xfa - 80020b8: 0091 lsls r1, r2, #2 - 80020ba: 0018 movs r0, r3 - 80020bc: f7fe f8ae bl 800021c <__divsi3> - 80020c0: 0003 movs r3, r0 - 80020c2: 210a movs r1, #10 - 80020c4: 0018 movs r0, r3 - 80020c6: f7fe f98f bl 80003e8 <__aeabi_idivmod> - 80020ca: 000b movs r3, r1 - 80020cc: b2da uxtb r2, r3 - 80020ce: 4b9b ldr r3, [pc, #620] ; (800233c ) - 80020d0: 709a strb r2, [r3, #2] + 8002c1a: 68bb ldr r3, [r7, #8] + 8002c1c: 22fa movs r2, #250 ; 0xfa + 8002c1e: 0091 lsls r1, r2, #2 + 8002c20: 0018 movs r0, r3 + 8002c22: f7fd fafb bl 800021c <__divsi3> + 8002c26: 0003 movs r3, r0 + 8002c28: 210a movs r1, #10 + 8002c2a: 0018 movs r0, r3 + 8002c2c: f7fd fbdc bl 80003e8 <__aeabi_idivmod> + 8002c30: 000b movs r3, r1 + 8002c32: b2da uxtb r2, r3 + 8002c34: 4b77 ldr r3, [pc, #476] ; (8002e14 ) + 8002c36: 709a strb r2, [r3, #2] dis_buff.d_num[1]=((countdown/10000)%10); - 80020d2: 68bb ldr r3, [r7, #8] - 80020d4: 499e ldr r1, [pc, #632] ; (8002350 ) - 80020d6: 0018 movs r0, r3 - 80020d8: f7fe f8a0 bl 800021c <__divsi3> - 80020dc: 0003 movs r3, r0 - 80020de: 210a movs r1, #10 - 80020e0: 0018 movs r0, r3 - 80020e2: f7fe f981 bl 80003e8 <__aeabi_idivmod> - 80020e6: 000b movs r3, r1 - 80020e8: b2da uxtb r2, r3 - 80020ea: 4b94 ldr r3, [pc, #592] ; (800233c ) - 80020ec: 705a strb r2, [r3, #1] + 8002c38: 68bb ldr r3, [r7, #8] + 8002c3a: 4977 ldr r1, [pc, #476] ; (8002e18 ) + 8002c3c: 0018 movs r0, r3 + 8002c3e: f7fd faed bl 800021c <__divsi3> + 8002c42: 0003 movs r3, r0 + 8002c44: 210a movs r1, #10 + 8002c46: 0018 movs r0, r3 + 8002c48: f7fd fbce bl 80003e8 <__aeabi_idivmod> + 8002c4c: 000b movs r3, r1 + 8002c4e: b2da uxtb r2, r3 + 8002c50: 4b70 ldr r3, [pc, #448] ; (8002e14 ) + 8002c52: 705a strb r2, [r3, #1] dis_buff.d_num[1]=dis_buff.d_num[1]==0?255:dis_buff.d_num[1]; - 80020ee: 4b93 ldr r3, [pc, #588] ; (800233c ) - 80020f0: 785b ldrb r3, [r3, #1] - 80020f2: 2b00 cmp r3, #0 - 80020f4: d002 beq.n 80020fc - 80020f6: 4b91 ldr r3, [pc, #580] ; (800233c ) - 80020f8: 785a ldrb r2, [r3, #1] - 80020fa: e000 b.n 80020fe - 80020fc: 22ff movs r2, #255 ; 0xff - 80020fe: 4b8f ldr r3, [pc, #572] ; (800233c ) - 8002100: 705a strb r2, [r3, #1] + 8002c54: 4b6f ldr r3, [pc, #444] ; (8002e14 ) + 8002c56: 785b ldrb r3, [r3, #1] + 8002c58: 2b00 cmp r3, #0 + 8002c5a: d002 beq.n 8002c62 + 8002c5c: 4b6d ldr r3, [pc, #436] ; (8002e14 ) + 8002c5e: 785a ldrb r2, [r3, #1] + 8002c60: e000 b.n 8002c64 + 8002c62: 22ff movs r2, #255 ; 0xff + 8002c64: 4b6b ldr r3, [pc, #428] ; (8002e14 ) + 8002c66: 705a strb r2, [r3, #1] dis_buff.dot3=1; - 8002102: 4b8e ldr r3, [pc, #568] ; (800233c ) - 8002104: 7a1a ldrb r2, [r3, #8] - 8002106: 2104 movs r1, #4 - 8002108: 430a orrs r2, r1 - 800210a: 721a strb r2, [r3, #8] + 8002c68: 4b6a ldr r3, [pc, #424] ; (8002e14 ) + 8002c6a: 7a1a ldrb r2, [r3, #8] + 8002c6c: 2104 movs r1, #4 + 8002c6e: 430a orrs r2, r1 + 8002c70: 721a strb r2, [r3, #8] if(key2.code!=0) - 800210c: 4b91 ldr r3, [pc, #580] ; (8002354 ) - 800210e: 681b ldr r3, [r3, #0] - 8002110: 2b00 cmp r3, #0 - 8002112: d007 beq.n 8002124 + 8002c72: 4b6e ldr r3, [pc, #440] ; (8002e2c ) + 8002c74: 681b ldr r3, [r3, #0] + 8002c76: 2b00 cmp r3, #0 + 8002c78: d007 beq.n 8002c8a { mode=2; - 8002114: 230f movs r3, #15 - 8002116: 18fb adds r3, r7, r3 - 8002118: 2202 movs r2, #2 - 800211a: 701a strb r2, [r3, #0] + 8002c7a: 230f movs r3, #15 + 8002c7c: 18fb adds r3, r7, r3 + 8002c7e: 2202 movs r2, #2 + 8002c80: 701a strb r2, [r3, #0] countdown=countdown_set-countdown; - 800211c: 687a ldr r2, [r7, #4] - 800211e: 68bb ldr r3, [r7, #8] - 8002120: 1ad3 subs r3, r2, r3 - 8002122: 60bb str r3, [r7, #8] + 8002c82: 687a ldr r2, [r7, #4] + 8002c84: 68bb ldr r3, [r7, #8] + 8002c86: 1ad3 subs r3, r2, r3 + 8002c88: 60bb str r3, [r7, #8] } if(key4.code!=0) - 8002124: 4b87 ldr r3, [pc, #540] ; (8002344 ) - 8002126: 681b ldr r3, [r3, #0] - 8002128: 2b00 cmp r3, #0 - 800212a: d003 beq.n 8002134 + 8002c8a: 4b65 ldr r3, [pc, #404] ; (8002e20 ) + 8002c8c: 681b ldr r3, [r3, #0] + 8002c8e: 2b00 cmp r3, #0 + 8002c90: d003 beq.n 8002c9a { mode=1; - 800212c: 230f movs r3, #15 - 800212e: 18fb adds r3, r7, r3 - 8002130: 2201 movs r2, #1 - 8002132: 701a strb r2, [r3, #0] + 8002c92: 230f movs r3, #15 + 8002c94: 18fb adds r3, r7, r3 + 8002c96: 2201 movs r2, #1 + 8002c98: 701a strb r2, [r3, #0] } if(overload.code!=0) - 8002134: 4b84 ldr r3, [pc, #528] ; (8002348 ) - 8002136: 681b ldr r3, [r3, #0] - 8002138: 2b00 cmp r3, #0 - 800213a: d005 beq.n 8002148 + 8002c9a: 4b62 ldr r3, [pc, #392] ; (8002e24 ) + 8002c9c: 681b ldr r3, [r3, #0] + 8002c9e: 2b00 cmp r3, #0 + 8002ca0: d005 beq.n 8002cae { overload_times+=1; - 800213c: 220c movs r2, #12 - 800213e: 18bb adds r3, r7, r2 - 8002140: 18ba adds r2, r7, r2 - 8002142: 8812 ldrh r2, [r2, #0] - 8002144: 3201 adds r2, #1 - 8002146: 801a strh r2, [r3, #0] + 8002ca2: 220c movs r2, #12 + 8002ca4: 18bb adds r3, r7, r2 + 8002ca6: 18ba adds r2, r7, r2 + 8002ca8: 8812 ldrh r2, [r2, #0] + 8002caa: 3201 adds r2, #1 + 8002cac: 801a strh r2, [r3, #0] } if(overload_times>2) - 8002148: 230c movs r3, #12 - 800214a: 18fb adds r3, r7, r3 - 800214c: 881b ldrh r3, [r3, #0] - 800214e: 2b02 cmp r3, #2 - 8002150: d800 bhi.n 8002154 - 8002152: e140 b.n 80023d6 + 8002cae: 230c movs r3, #12 + 8002cb0: 18fb adds r3, r7, r3 + 8002cb2: 881b ldrh r3, [r3, #0] + 8002cb4: 2b02 cmp r3, #2 + 8002cb6: d800 bhi.n 8002cba + 8002cb8: e140 b.n 8002f3c { overload_mode=3; - 8002154: 230e movs r3, #14 - 8002156: 18fb adds r3, r7, r3 - 8002158: 2203 movs r2, #3 - 800215a: 701a strb r2, [r3, #0] + 8002cba: 230e movs r3, #14 + 8002cbc: 18fb adds r3, r7, r3 + 8002cbe: 2203 movs r2, #3 + 8002cc0: 701a strb r2, [r3, #0] mode=5; - 800215c: 230f movs r3, #15 - 800215e: 18fb adds r3, r7, r3 - 8002160: 2205 movs r2, #5 - 8002162: 701a strb r2, [r3, #0] + 8002cc2: 230f movs r3, #15 + 8002cc4: 18fb adds r3, r7, r3 + 8002cc6: 2205 movs r2, #5 + 8002cc8: 701a strb r2, [r3, #0] } break; - 8002164: e137 b.n 80023d6 + 8002cca: e137 b.n 8002f3c case 4: //setting mode dis_buff.led_run=0; - 8002166: 4b75 ldr r3, [pc, #468] ; (800233c ) - 8002168: 7a1a ldrb r2, [r3, #8] - 800216a: 2110 movs r1, #16 - 800216c: 438a bics r2, r1 - 800216e: 721a strb r2, [r3, #8] + 8002ccc: 4b51 ldr r3, [pc, #324] ; (8002e14 ) + 8002cce: 7a1a ldrb r2, [r3, #8] + 8002cd0: 2110 movs r1, #16 + 8002cd2: 438a bics r2, r1 + 8002cd4: 721a strb r2, [r3, #8] if(HAL_GetTick()>move) - 8002170: f7fe fadc bl 800072c - 8002174: 0002 movs r2, r0 - 8002176: 693b ldr r3, [r7, #16] - 8002178: 4293 cmp r3, r2 - 800217a: d237 bcs.n 80021ec + 8002cd6: f7fd fdcf bl 8000878 + 8002cda: 0002 movs r2, r0 + 8002cdc: 693b ldr r3, [r7, #16] + 8002cde: 4293 cmp r3, r2 + 8002ce0: d237 bcs.n 8002d52 { move=HAL_GetTick()+100; - 800217c: f7fe fad6 bl 800072c - 8002180: 0003 movs r3, r0 - 8002182: 3364 adds r3, #100 ; 0x64 - 8002184: 613b str r3, [r7, #16] + 8002ce2: f7fd fdc9 bl 8000878 + 8002ce6: 0003 movs r3, r0 + 8002ce8: 3364 adds r3, #100 ; 0x64 + 8002cea: 613b str r3, [r7, #16] if(dis_buff.dot1==1) - 8002186: 4b6d ldr r3, [pc, #436] ; (800233c ) - 8002188: 7a1b ldrb r3, [r3, #8] - 800218a: 2201 movs r2, #1 - 800218c: 4013 ands r3, r2 - 800218e: b2db uxtb r3, r3 - 8002190: 2b00 cmp r3, #0 - 8002192: d005 beq.n 80021a0 + 8002cec: 4b49 ldr r3, [pc, #292] ; (8002e14 ) + 8002cee: 7a1b ldrb r3, [r3, #8] + 8002cf0: 2201 movs r2, #1 + 8002cf2: 4013 ands r3, r2 + 8002cf4: b2db uxtb r3, r3 + 8002cf6: 2b00 cmp r3, #0 + 8002cf8: d005 beq.n 8002d06 { dis_buff.dot1=0; - 8002194: 4b69 ldr r3, [pc, #420] ; (800233c ) - 8002196: 7a1a ldrb r2, [r3, #8] - 8002198: 2101 movs r1, #1 - 800219a: 438a bics r2, r1 - 800219c: 721a strb r2, [r3, #8] - 800219e: e004 b.n 80021aa + 8002cfa: 4b46 ldr r3, [pc, #280] ; (8002e14 ) + 8002cfc: 7a1a ldrb r2, [r3, #8] + 8002cfe: 2101 movs r1, #1 + 8002d00: 438a bics r2, r1 + 8002d02: 721a strb r2, [r3, #8] + 8002d04: e004 b.n 8002d10 }else { dis_buff.dot1=1; - 80021a0: 4b66 ldr r3, [pc, #408] ; (800233c ) - 80021a2: 7a1a ldrb r2, [r3, #8] - 80021a4: 2101 movs r1, #1 - 80021a6: 430a orrs r2, r1 - 80021a8: 721a strb r2, [r3, #8] + 8002d06: 4b43 ldr r3, [pc, #268] ; (8002e14 ) + 8002d08: 7a1a ldrb r2, [r3, #8] + 8002d0a: 2101 movs r1, #1 + 8002d0c: 430a orrs r2, r1 + 8002d0e: 721a strb r2, [r3, #8] } countdown-=100; - 80021aa: 68bb ldr r3, [r7, #8] - 80021ac: 3b64 subs r3, #100 ; 0x64 - 80021ae: 60bb str r3, [r7, #8] + 8002d10: 68bb ldr r3, [r7, #8] + 8002d12: 3b64 subs r3, #100 ; 0x64 + 8002d14: 60bb str r3, [r7, #8] if(countdown<0) - 80021b0: 68bb ldr r3, [r7, #8] - 80021b2: 2b00 cmp r3, #0 - 80021b4: da03 bge.n 80021be + 8002d16: 68bb ldr r3, [r7, #8] + 8002d18: 2b00 cmp r3, #0 + 8002d1a: da03 bge.n 8002d24 { mode=1; - 80021b6: 230f movs r3, #15 - 80021b8: 18fb adds r3, r7, r3 - 80021ba: 2201 movs r2, #1 - 80021bc: 701a strb r2, [r3, #0] + 8002d1c: 230f movs r3, #15 + 8002d1e: 18fb adds r3, r7, r3 + 8002d20: 2201 movs r2, #1 + 8002d22: 701a strb r2, [r3, #0] } if(key2.code<0){countdown_set+=1000;countdown=10000;} - 80021be: 4b65 ldr r3, [pc, #404] ; (8002354 ) - 80021c0: 681b ldr r3, [r3, #0] - 80021c2: 2b00 cmp r3, #0 - 80021c4: da07 bge.n 80021d6 - 80021c6: 687b ldr r3, [r7, #4] - 80021c8: 22fa movs r2, #250 ; 0xfa - 80021ca: 0092 lsls r2, r2, #2 - 80021cc: 4694 mov ip, r2 - 80021ce: 4463 add r3, ip - 80021d0: 607b str r3, [r7, #4] - 80021d2: 4b5f ldr r3, [pc, #380] ; (8002350 ) - 80021d4: 60bb str r3, [r7, #8] + 8002d24: 4b41 ldr r3, [pc, #260] ; (8002e2c ) + 8002d26: 681b ldr r3, [r3, #0] + 8002d28: 2b00 cmp r3, #0 + 8002d2a: da07 bge.n 8002d3c + 8002d2c: 687b ldr r3, [r7, #4] + 8002d2e: 22fa movs r2, #250 ; 0xfa + 8002d30: 0092 lsls r2, r2, #2 + 8002d32: 4694 mov ip, r2 + 8002d34: 4463 add r3, ip + 8002d36: 607b str r3, [r7, #4] + 8002d38: 4b37 ldr r3, [pc, #220] ; (8002e18 ) + 8002d3a: 60bb str r3, [r7, #8] if(key3.code<0){countdown_set-=1000;countdown=10000;} - 80021d6: 4b5a ldr r3, [pc, #360] ; (8002340 ) - 80021d8: 681b ldr r3, [r3, #0] - 80021da: 2b00 cmp r3, #0 - 80021dc: da06 bge.n 80021ec - 80021de: 687b ldr r3, [r7, #4] - 80021e0: 4a5d ldr r2, [pc, #372] ; (8002358 ) - 80021e2: 4694 mov ip, r2 - 80021e4: 4463 add r3, ip - 80021e6: 607b str r3, [r7, #4] - 80021e8: 4b59 ldr r3, [pc, #356] ; (8002350 ) - 80021ea: 60bb str r3, [r7, #8] + 8002d3c: 4b37 ldr r3, [pc, #220] ; (8002e1c ) + 8002d3e: 681b ldr r3, [r3, #0] + 8002d40: 2b00 cmp r3, #0 + 8002d42: da06 bge.n 8002d52 + 8002d44: 687b ldr r3, [r7, #4] + 8002d46: 4a3a ldr r2, [pc, #232] ; (8002e30 ) + 8002d48: 4694 mov ip, r2 + 8002d4a: 4463 add r3, ip + 8002d4c: 607b str r3, [r7, #4] + 8002d4e: 4b32 ldr r3, [pc, #200] ; (8002e18 ) + 8002d50: 60bb str r3, [r7, #8] } if(key2.code>0){countdown_set+=100;countdown=10000;} - 80021ec: 4b59 ldr r3, [pc, #356] ; (8002354 ) - 80021ee: 681b ldr r3, [r3, #0] - 80021f0: 2b00 cmp r3, #0 - 80021f2: dd04 ble.n 80021fe - 80021f4: 687b ldr r3, [r7, #4] - 80021f6: 3364 adds r3, #100 ; 0x64 - 80021f8: 607b str r3, [r7, #4] - 80021fa: 4b55 ldr r3, [pc, #340] ; (8002350 ) - 80021fc: 60bb str r3, [r7, #8] + 8002d52: 4b36 ldr r3, [pc, #216] ; (8002e2c ) + 8002d54: 681b ldr r3, [r3, #0] + 8002d56: 2b00 cmp r3, #0 + 8002d58: dd04 ble.n 8002d64 + 8002d5a: 687b ldr r3, [r7, #4] + 8002d5c: 3364 adds r3, #100 ; 0x64 + 8002d5e: 607b str r3, [r7, #4] + 8002d60: 4b2d ldr r3, [pc, #180] ; (8002e18 ) + 8002d62: 60bb str r3, [r7, #8] if(key3.code>0){countdown_set-=100;countdown=10000;} - 80021fe: 4b50 ldr r3, [pc, #320] ; (8002340 ) - 8002200: 681b ldr r3, [r3, #0] - 8002202: 2b00 cmp r3, #0 - 8002204: dd04 ble.n 8002210 - 8002206: 687b ldr r3, [r7, #4] - 8002208: 3b64 subs r3, #100 ; 0x64 - 800220a: 607b str r3, [r7, #4] - 800220c: 4b50 ldr r3, [pc, #320] ; (8002350 ) - 800220e: 60bb str r3, [r7, #8] + 8002d64: 4b2d ldr r3, [pc, #180] ; (8002e1c ) + 8002d66: 681b ldr r3, [r3, #0] + 8002d68: 2b00 cmp r3, #0 + 8002d6a: dd04 ble.n 8002d76 + 8002d6c: 687b ldr r3, [r7, #4] + 8002d6e: 3b64 subs r3, #100 ; 0x64 + 8002d70: 607b str r3, [r7, #4] + 8002d72: 4b29 ldr r3, [pc, #164] ; (8002e18 ) + 8002d74: 60bb str r3, [r7, #8] if(countdown_set<100){countdown_set=100;} - 8002210: 687b ldr r3, [r7, #4] - 8002212: 2b63 cmp r3, #99 ; 0x63 - 8002214: dc01 bgt.n 800221a - 8002216: 2364 movs r3, #100 ; 0x64 - 8002218: 607b str r3, [r7, #4] + 8002d76: 687b ldr r3, [r7, #4] + 8002d78: 2b63 cmp r3, #99 ; 0x63 + 8002d7a: dc01 bgt.n 8002d80 + 8002d7c: 2364 movs r3, #100 ; 0x64 + 8002d7e: 607b str r3, [r7, #4] if(countdown_set>60000){countdown_set=60000;} - 800221a: 687b ldr r3, [r7, #4] - 800221c: 4a4f ldr r2, [pc, #316] ; (800235c ) - 800221e: 4293 cmp r3, r2 - 8002220: dd01 ble.n 8002226 - 8002222: 4b4e ldr r3, [pc, #312] ; (800235c ) - 8002224: 607b str r3, [r7, #4] + 8002d80: 687b ldr r3, [r7, #4] + 8002d82: 4a2c ldr r2, [pc, #176] ; (8002e34 ) + 8002d84: 4293 cmp r3, r2 + 8002d86: dd01 ble.n 8002d8c + 8002d88: 4b2a ldr r3, [pc, #168] ; (8002e34 ) + 8002d8a: 607b str r3, [r7, #4] if(key1.code!=0){mode=1;} - 8002226: 4b4e ldr r3, [pc, #312] ; (8002360 ) - 8002228: 681b ldr r3, [r3, #0] - 800222a: 2b00 cmp r3, #0 - 800222c: d003 beq.n 8002236 - 800222e: 230f movs r3, #15 - 8002230: 18fb adds r3, r7, r3 - 8002232: 2201 movs r2, #1 - 8002234: 701a strb r2, [r3, #0] + 8002d8c: 4b2a ldr r3, [pc, #168] ; (8002e38 ) + 8002d8e: 681b ldr r3, [r3, #0] + 8002d90: 2b00 cmp r3, #0 + 8002d92: d003 beq.n 8002d9c + 8002d94: 230f movs r3, #15 + 8002d96: 18fb adds r3, r7, r3 + 8002d98: 2201 movs r2, #1 + 8002d9a: 701a strb r2, [r3, #0] dis_buff.d_num[3]=(countdown_set/100)%10; - 8002236: 687b ldr r3, [r7, #4] - 8002238: 2164 movs r1, #100 ; 0x64 - 800223a: 0018 movs r0, r3 - 800223c: f7fd ffee bl 800021c <__divsi3> - 8002240: 0003 movs r3, r0 - 8002242: 210a movs r1, #10 - 8002244: 0018 movs r0, r3 - 8002246: f7fe f8cf bl 80003e8 <__aeabi_idivmod> - 800224a: 000b movs r3, r1 - 800224c: b2da uxtb r2, r3 - 800224e: 4b3b ldr r3, [pc, #236] ; (800233c ) - 8002250: 70da strb r2, [r3, #3] + 8002d9c: 687b ldr r3, [r7, #4] + 8002d9e: 2164 movs r1, #100 ; 0x64 + 8002da0: 0018 movs r0, r3 + 8002da2: f7fd fa3b bl 800021c <__divsi3> + 8002da6: 0003 movs r3, r0 + 8002da8: 210a movs r1, #10 + 8002daa: 0018 movs r0, r3 + 8002dac: f7fd fb1c bl 80003e8 <__aeabi_idivmod> + 8002db0: 000b movs r3, r1 + 8002db2: b2da uxtb r2, r3 + 8002db4: 4b17 ldr r3, [pc, #92] ; (8002e14 ) + 8002db6: 70da strb r2, [r3, #3] dis_buff.d_num[2]=(countdown_set/1000)%10; - 8002252: 687b ldr r3, [r7, #4] - 8002254: 22fa movs r2, #250 ; 0xfa - 8002256: 0091 lsls r1, r2, #2 - 8002258: 0018 movs r0, r3 - 800225a: f7fd ffdf bl 800021c <__divsi3> - 800225e: 0003 movs r3, r0 - 8002260: 210a movs r1, #10 - 8002262: 0018 movs r0, r3 - 8002264: f7fe f8c0 bl 80003e8 <__aeabi_idivmod> - 8002268: 000b movs r3, r1 - 800226a: b2da uxtb r2, r3 - 800226c: 4b33 ldr r3, [pc, #204] ; (800233c ) - 800226e: 709a strb r2, [r3, #2] + 8002db8: 687b ldr r3, [r7, #4] + 8002dba: 22fa movs r2, #250 ; 0xfa + 8002dbc: 0091 lsls r1, r2, #2 + 8002dbe: 0018 movs r0, r3 + 8002dc0: f7fd fa2c bl 800021c <__divsi3> + 8002dc4: 0003 movs r3, r0 + 8002dc6: 210a movs r1, #10 + 8002dc8: 0018 movs r0, r3 + 8002dca: f7fd fb0d bl 80003e8 <__aeabi_idivmod> + 8002dce: 000b movs r3, r1 + 8002dd0: b2da uxtb r2, r3 + 8002dd2: 4b10 ldr r3, [pc, #64] ; (8002e14 ) + 8002dd4: 709a strb r2, [r3, #2] dis_buff.d_num[1]=((countdown_set/10000)%10); - 8002270: 687b ldr r3, [r7, #4] - 8002272: 4937 ldr r1, [pc, #220] ; (8002350 ) - 8002274: 0018 movs r0, r3 - 8002276: f7fd ffd1 bl 800021c <__divsi3> - 800227a: 0003 movs r3, r0 - 800227c: 210a movs r1, #10 - 800227e: 0018 movs r0, r3 - 8002280: f7fe f8b2 bl 80003e8 <__aeabi_idivmod> - 8002284: 000b movs r3, r1 - 8002286: b2da uxtb r2, r3 - 8002288: 4b2c ldr r3, [pc, #176] ; (800233c ) - 800228a: 705a strb r2, [r3, #1] + 8002dd6: 687b ldr r3, [r7, #4] + 8002dd8: 490f ldr r1, [pc, #60] ; (8002e18 ) + 8002dda: 0018 movs r0, r3 + 8002ddc: f7fd fa1e bl 800021c <__divsi3> + 8002de0: 0003 movs r3, r0 + 8002de2: 210a movs r1, #10 + 8002de4: 0018 movs r0, r3 + 8002de6: f7fd faff bl 80003e8 <__aeabi_idivmod> + 8002dea: 000b movs r3, r1 + 8002dec: b2da uxtb r2, r3 + 8002dee: 4b09 ldr r3, [pc, #36] ; (8002e14 ) + 8002df0: 705a strb r2, [r3, #1] dis_buff.d_num[1]=dis_buff.d_num[1]==0?255:dis_buff.d_num[1]; - 800228c: 4b2b ldr r3, [pc, #172] ; (800233c ) - 800228e: 785b ldrb r3, [r3, #1] - 8002290: 2b00 cmp r3, #0 - 8002292: d002 beq.n 800229a - 8002294: 4b29 ldr r3, [pc, #164] ; (800233c ) - 8002296: 785a ldrb r2, [r3, #1] - 8002298: e000 b.n 800229c - 800229a: 22ff movs r2, #255 ; 0xff - 800229c: 4b27 ldr r3, [pc, #156] ; (800233c ) - 800229e: 705a strb r2, [r3, #1] + 8002df2: 4b08 ldr r3, [pc, #32] ; (8002e14 ) + 8002df4: 785b ldrb r3, [r3, #1] + 8002df6: 2b00 cmp r3, #0 + 8002df8: d002 beq.n 8002e00 + 8002dfa: 4b06 ldr r3, [pc, #24] ; (8002e14 ) + 8002dfc: 785a ldrb r2, [r3, #1] + 8002dfe: e000 b.n 8002e02 + 8002e00: 22ff movs r2, #255 ; 0xff + 8002e02: 4b04 ldr r3, [pc, #16] ; (8002e14 ) + 8002e04: 705a strb r2, [r3, #1] dis_buff.dot3=1; - 80022a0: 4b26 ldr r3, [pc, #152] ; (800233c ) - 80022a2: 7a1a ldrb r2, [r3, #8] - 80022a4: 2104 movs r1, #4 - 80022a6: 430a orrs r2, r1 - 80022a8: 721a strb r2, [r3, #8] + 8002e06: 4b03 ldr r3, [pc, #12] ; (8002e14 ) + 8002e08: 7a1a ldrb r2, [r3, #8] + 8002e0a: 2104 movs r1, #4 + 8002e0c: 430a orrs r2, r1 + 8002e0e: 721a strb r2, [r3, #8] break; - 80022aa: e097 b.n 80023dc + 8002e10: e097 b.n 8002f42 + 8002e12: 46c0 nop ; (mov r8, r8) + 8002e14: 2000007c .word 0x2000007c + 8002e18: 00002710 .word 0x00002710 + 8002e1c: 200000a8 .word 0x200000a8 + 8002e20: 2000006c .word 0x2000006c + 8002e24: 20000098 .word 0x20000098 + 8002e28: 200000dc .word 0x200000dc + 8002e2c: 200000cc .word 0x200000cc + 8002e30: fffffc18 .word 0xfffffc18 + 8002e34: 0000ea60 .word 0x0000ea60 + 8002e38: 20000088 .word 0x20000088 case 5: //overload moto.moto1a=0; - 80022ac: 4b27 ldr r3, [pc, #156] ; (800234c ) - 80022ae: 2200 movs r2, #0 - 80022b0: 721a strb r2, [r3, #8] + 8002e3c: 4b5e ldr r3, [pc, #376] ; (8002fb8 ) + 8002e3e: 2200 movs r2, #0 + 8002e40: 721a strb r2, [r3, #8] moto.moto1b=0; - 80022b2: 4b26 ldr r3, [pc, #152] ; (800234c ) - 80022b4: 2200 movs r2, #0 - 80022b6: 725a strb r2, [r3, #9] + 8002e42: 4b5d ldr r3, [pc, #372] ; (8002fb8 ) + 8002e44: 2200 movs r2, #0 + 8002e46: 725a strb r2, [r3, #9] moto.moto2a=0; - 80022b8: 4b24 ldr r3, [pc, #144] ; (800234c ) - 80022ba: 2200 movs r2, #0 - 80022bc: 729a strb r2, [r3, #10] + 8002e48: 4b5b ldr r3, [pc, #364] ; (8002fb8 ) + 8002e4a: 2200 movs r2, #0 + 8002e4c: 729a strb r2, [r3, #10] moto.moto2b=0; - 80022be: 4b23 ldr r3, [pc, #140] ; (800234c ) - 80022c0: 2200 movs r2, #0 - 80022c2: 72da strb r2, [r3, #11] + 8002e4e: 4b5a ldr r3, [pc, #360] ; (8002fb8 ) + 8002e50: 2200 movs r2, #0 + 8002e52: 72da strb r2, [r3, #11] dis_buff.led_run=1; - 80022c4: 4b1d ldr r3, [pc, #116] ; (800233c ) - 80022c6: 7a1a ldrb r2, [r3, #8] - 80022c8: 2110 movs r1, #16 - 80022ca: 430a orrs r2, r1 - 80022cc: 721a strb r2, [r3, #8] + 8002e54: 4b59 ldr r3, [pc, #356] ; (8002fbc ) + 8002e56: 7a1a ldrb r2, [r3, #8] + 8002e58: 2110 movs r1, #16 + 8002e5a: 430a orrs r2, r1 + 8002e5c: 721a strb r2, [r3, #8] overload_times=0; - 80022ce: 230c movs r3, #12 - 80022d0: 18fb adds r3, r7, r3 - 80022d2: 2200 movs r2, #0 - 80022d4: 801a strh r2, [r3, #0] + 8002e5e: 230c movs r3, #12 + 8002e60: 18fb adds r3, r7, r3 + 8002e62: 2200 movs r2, #0 + 8002e64: 801a strh r2, [r3, #0] dis_buff.d_num[3]=(countdown/100)%10; - 80022d6: 68bb ldr r3, [r7, #8] - 80022d8: 2164 movs r1, #100 ; 0x64 - 80022da: 0018 movs r0, r3 - 80022dc: f7fd ff9e bl 800021c <__divsi3> - 80022e0: 0003 movs r3, r0 - 80022e2: 210a movs r1, #10 - 80022e4: 0018 movs r0, r3 - 80022e6: f7fe f87f bl 80003e8 <__aeabi_idivmod> - 80022ea: 000b movs r3, r1 - 80022ec: b2da uxtb r2, r3 - 80022ee: 4b13 ldr r3, [pc, #76] ; (800233c ) - 80022f0: 70da strb r2, [r3, #3] + 8002e66: 68bb ldr r3, [r7, #8] + 8002e68: 2164 movs r1, #100 ; 0x64 + 8002e6a: 0018 movs r0, r3 + 8002e6c: f7fd f9d6 bl 800021c <__divsi3> + 8002e70: 0003 movs r3, r0 + 8002e72: 210a movs r1, #10 + 8002e74: 0018 movs r0, r3 + 8002e76: f7fd fab7 bl 80003e8 <__aeabi_idivmod> + 8002e7a: 000b movs r3, r1 + 8002e7c: b2da uxtb r2, r3 + 8002e7e: 4b4f ldr r3, [pc, #316] ; (8002fbc ) + 8002e80: 70da strb r2, [r3, #3] dis_buff.d_num[2]=(countdown/1000)%10; - 80022f2: 68bb ldr r3, [r7, #8] - 80022f4: 22fa movs r2, #250 ; 0xfa - 80022f6: 0091 lsls r1, r2, #2 - 80022f8: 0018 movs r0, r3 - 80022fa: f7fd ff8f bl 800021c <__divsi3> - 80022fe: 0003 movs r3, r0 - 8002300: 210a movs r1, #10 - 8002302: 0018 movs r0, r3 - 8002304: f7fe f870 bl 80003e8 <__aeabi_idivmod> - 8002308: 000b movs r3, r1 - 800230a: b2da uxtb r2, r3 - 800230c: 4b0b ldr r3, [pc, #44] ; (800233c ) - 800230e: 709a strb r2, [r3, #2] + 8002e82: 68bb ldr r3, [r7, #8] + 8002e84: 22fa movs r2, #250 ; 0xfa + 8002e86: 0091 lsls r1, r2, #2 + 8002e88: 0018 movs r0, r3 + 8002e8a: f7fd f9c7 bl 800021c <__divsi3> + 8002e8e: 0003 movs r3, r0 + 8002e90: 210a movs r1, #10 + 8002e92: 0018 movs r0, r3 + 8002e94: f7fd faa8 bl 80003e8 <__aeabi_idivmod> + 8002e98: 000b movs r3, r1 + 8002e9a: b2da uxtb r2, r3 + 8002e9c: 4b47 ldr r3, [pc, #284] ; (8002fbc ) + 8002e9e: 709a strb r2, [r3, #2] dis_buff.d_num[1]=((countdown/10000)%10); - 8002310: 68bb ldr r3, [r7, #8] - 8002312: 490f ldr r1, [pc, #60] ; (8002350 ) - 8002314: 0018 movs r0, r3 - 8002316: f7fd ff81 bl 800021c <__divsi3> - 800231a: 0003 movs r3, r0 - 800231c: 210a movs r1, #10 - 800231e: 0018 movs r0, r3 - 8002320: f7fe f862 bl 80003e8 <__aeabi_idivmod> - 8002324: 000b movs r3, r1 - 8002326: b2da uxtb r2, r3 - 8002328: 4b04 ldr r3, [pc, #16] ; (800233c ) - 800232a: 705a strb r2, [r3, #1] + 8002ea0: 68bb ldr r3, [r7, #8] + 8002ea2: 4947 ldr r1, [pc, #284] ; (8002fc0 ) + 8002ea4: 0018 movs r0, r3 + 8002ea6: f7fd f9b9 bl 800021c <__divsi3> + 8002eaa: 0003 movs r3, r0 + 8002eac: 210a movs r1, #10 + 8002eae: 0018 movs r0, r3 + 8002eb0: f7fd fa9a bl 80003e8 <__aeabi_idivmod> + 8002eb4: 000b movs r3, r1 + 8002eb6: b2da uxtb r2, r3 + 8002eb8: 4b40 ldr r3, [pc, #256] ; (8002fbc ) + 8002eba: 705a strb r2, [r3, #1] dis_buff.d_num[1]=dis_buff.d_num[1]==0?255:dis_buff.d_num[1]; - 800232c: 4b03 ldr r3, [pc, #12] ; (800233c ) - 800232e: 785b ldrb r3, [r3, #1] - 8002330: 2b00 cmp r3, #0 - 8002332: d017 beq.n 8002364 - 8002334: 4b01 ldr r3, [pc, #4] ; (800233c ) - 8002336: 785a ldrb r2, [r3, #1] - 8002338: e015 b.n 8002366 - 800233a: 46c0 nop ; (mov r8, r8) - 800233c: 2000003c .word 0x2000003c - 8002340: 20000068 .word 0x20000068 - 8002344: 2000002c .word 0x2000002c - 8002348: 20000058 .word 0x20000058 - 800234c: 20000088 .word 0x20000088 - 8002350: 00002710 .word 0x00002710 - 8002354: 20000078 .word 0x20000078 - 8002358: fffffc18 .word 0xfffffc18 - 800235c: 0000ea60 .word 0x0000ea60 - 8002360: 20000048 .word 0x20000048 - 8002364: 22ff movs r2, #255 ; 0xff - 8002366: 4b2f ldr r3, [pc, #188] ; (8002424 ) - 8002368: 705a strb r2, [r3, #1] + 8002ebc: 4b3f ldr r3, [pc, #252] ; (8002fbc ) + 8002ebe: 785b ldrb r3, [r3, #1] + 8002ec0: 2b00 cmp r3, #0 + 8002ec2: d002 beq.n 8002eca + 8002ec4: 4b3d ldr r3, [pc, #244] ; (8002fbc ) + 8002ec6: 785a ldrb r2, [r3, #1] + 8002ec8: e000 b.n 8002ecc + 8002eca: 22ff movs r2, #255 ; 0xff + 8002ecc: 4b3b ldr r3, [pc, #236] ; (8002fbc ) + 8002ece: 705a strb r2, [r3, #1] dis_buff.dot3=1; - 800236a: 4b2e ldr r3, [pc, #184] ; (8002424 ) - 800236c: 7a1a ldrb r2, [r3, #8] - 800236e: 2104 movs r1, #4 - 8002370: 430a orrs r2, r1 - 8002372: 721a strb r2, [r3, #8] + 8002ed0: 4b3a ldr r3, [pc, #232] ; (8002fbc ) + 8002ed2: 7a1a ldrb r2, [r3, #8] + 8002ed4: 2104 movs r1, #4 + 8002ed6: 430a orrs r2, r1 + 8002ed8: 721a strb r2, [r3, #8] if(key4.code!=0){mode=1;} - 8002374: 4b2c ldr r3, [pc, #176] ; (8002428 ) - 8002376: 681b ldr r3, [r3, #0] - 8002378: 2b00 cmp r3, #0 - 800237a: d003 beq.n 8002384 - 800237c: 230f movs r3, #15 - 800237e: 18fb adds r3, r7, r3 - 8002380: 2201 movs r2, #1 - 8002382: 701a strb r2, [r3, #0] + 8002eda: 4b3a ldr r3, [pc, #232] ; (8002fc4 ) + 8002edc: 681b ldr r3, [r3, #0] + 8002ede: 2b00 cmp r3, #0 + 8002ee0: d003 beq.n 8002eea + 8002ee2: 230f movs r3, #15 + 8002ee4: 18fb adds r3, r7, r3 + 8002ee6: 2201 movs r2, #1 + 8002ee8: 701a strb r2, [r3, #0] if(key2.code!=0) - 8002384: 4b29 ldr r3, [pc, #164] ; (800242c ) - 8002386: 681b ldr r3, [r3, #0] - 8002388: 2b00 cmp r3, #0 - 800238a: d00c beq.n 80023a6 + 8002eea: 4b37 ldr r3, [pc, #220] ; (8002fc8 ) + 8002eec: 681b ldr r3, [r3, #0] + 8002eee: 2b00 cmp r3, #0 + 8002ef0: d00c beq.n 8002f0c { mode=2; - 800238c: 230f movs r3, #15 - 800238e: 18fb adds r3, r7, r3 - 8002390: 2202 movs r2, #2 - 8002392: 701a strb r2, [r3, #0] + 8002ef2: 230f movs r3, #15 + 8002ef4: 18fb adds r3, r7, r3 + 8002ef6: 2202 movs r2, #2 + 8002ef8: 701a strb r2, [r3, #0] if(overload_mode==2) - 8002394: 230e movs r3, #14 - 8002396: 18fb adds r3, r7, r3 - 8002398: 781b ldrb r3, [r3, #0] - 800239a: 2b02 cmp r3, #2 - 800239c: d003 beq.n 80023a6 + 8002efa: 230e movs r3, #14 + 8002efc: 18fb adds r3, r7, r3 + 8002efe: 781b ldrb r3, [r3, #0] + 8002f00: 2b02 cmp r3, #2 + 8002f02: d003 beq.n 8002f0c { }else { countdown=countdown_set-countdown; - 800239e: 687a ldr r2, [r7, #4] - 80023a0: 68bb ldr r3, [r7, #8] - 80023a2: 1ad3 subs r3, r2, r3 - 80023a4: 60bb str r3, [r7, #8] + 8002f04: 687a ldr r2, [r7, #4] + 8002f06: 68bb ldr r3, [r7, #8] + 8002f08: 1ad3 subs r3, r2, r3 + 8002f0a: 60bb str r3, [r7, #8] } } if(key3.code!=0) - 80023a6: 4b22 ldr r3, [pc, #136] ; (8002430 ) - 80023a8: 681b ldr r3, [r3, #0] - 80023aa: 2b00 cmp r3, #0 - 80023ac: d015 beq.n 80023da + 8002f0c: 4b2f ldr r3, [pc, #188] ; (8002fcc ) + 8002f0e: 681b ldr r3, [r3, #0] + 8002f10: 2b00 cmp r3, #0 + 8002f12: d015 beq.n 8002f40 { mode=3; - 80023ae: 230f movs r3, #15 - 80023b0: 18fb adds r3, r7, r3 - 80023b2: 2203 movs r2, #3 - 80023b4: 701a strb r2, [r3, #0] + 8002f14: 230f movs r3, #15 + 8002f16: 18fb adds r3, r7, r3 + 8002f18: 2203 movs r2, #3 + 8002f1a: 701a strb r2, [r3, #0] if(overload_mode==3) - 80023b6: 230e movs r3, #14 - 80023b8: 18fb adds r3, r7, r3 - 80023ba: 781b ldrb r3, [r3, #0] - 80023bc: 2b03 cmp r3, #3 - 80023be: d00c beq.n 80023da + 8002f1c: 230e movs r3, #14 + 8002f1e: 18fb adds r3, r7, r3 + 8002f20: 781b ldrb r3, [r3, #0] + 8002f22: 2b03 cmp r3, #3 + 8002f24: d00c beq.n 8002f40 { }else { countdown=countdown_set-countdown; - 80023c0: 687a ldr r2, [r7, #4] - 80023c2: 68bb ldr r3, [r7, #8] - 80023c4: 1ad3 subs r3, r2, r3 - 80023c6: 60bb str r3, [r7, #8] + 8002f26: 687a ldr r2, [r7, #4] + 8002f28: 68bb ldr r3, [r7, #8] + 8002f2a: 1ad3 subs r3, r2, r3 + 8002f2c: 60bb str r3, [r7, #8] } } break; - 80023c8: e007 b.n 80023da + 8002f2e: e007 b.n 8002f40 break; - 80023ca: 46c0 nop ; (mov r8, r8) - 80023cc: e006 b.n 80023dc + 8002f30: 46c0 nop ; (mov r8, r8) + 8002f32: e006 b.n 8002f42 break; - 80023ce: 46c0 nop ; (mov r8, r8) - 80023d0: e004 b.n 80023dc + 8002f34: 46c0 nop ; (mov r8, r8) + 8002f36: e004 b.n 8002f42 break; - 80023d2: 46c0 nop ; (mov r8, r8) - 80023d4: e002 b.n 80023dc + 8002f38: 46c0 nop ; (mov r8, r8) + 8002f3a: e002 b.n 8002f42 break; - 80023d6: 46c0 nop ; (mov r8, r8) - 80023d8: e000 b.n 80023dc + 8002f3c: 46c0 nop ; (mov r8, r8) + 8002f3e: e000 b.n 8002f42 break; - 80023da: 46c0 nop ; (mov r8, r8) + 8002f40: 46c0 nop ; (mov r8, r8) } - + if(ADCC.adc_value[0]>600||ADCC.adc_value[1]>600) + 8002f42: 4b23 ldr r3, [pc, #140] ; (8002fd0 ) + 8002f44: 68da ldr r2, [r3, #12] + 8002f46: 2396 movs r3, #150 ; 0x96 + 8002f48: 009b lsls r3, r3, #2 + 8002f4a: 429a cmp r2, r3 + 8002f4c: dc05 bgt.n 8002f5a + 8002f4e: 4b20 ldr r3, [pc, #128] ; (8002fd0 ) + 8002f50: 691a ldr r2, [r3, #16] + 8002f52: 2396 movs r3, #150 ; 0x96 + 8002f54: 009b lsls r3, r3, #2 + 8002f56: 429a cmp r2, r3 + 8002f58: dd05 ble.n 8002f66 + { + GEI_BUTTON_CODE(&overload,1); + 8002f5a: 4b1e ldr r3, [pc, #120] ; (8002fd4 ) + 8002f5c: 2101 movs r1, #1 + 8002f5e: 0018 movs r0, r3 + 8002f60: f7fe ffee bl 8001f40 + 8002f64: e004 b.n 8002f70 + }else + { + GEI_BUTTON_CODE(&overload,0); + 8002f66: 4b1b ldr r3, [pc, #108] ; (8002fd4 ) + 8002f68: 2100 movs r1, #0 + 8002f6a: 0018 movs r0, r3 + 8002f6c: f7fe ffe8 bl 8001f40 + } GEI_BUTTON_CODE(&key1,dis_buff.button_flag[0]); - 80023dc: 4b11 ldr r3, [pc, #68] ; (8002424 ) - 80023de: 791a ldrb r2, [r3, #4] - 80023e0: 4b14 ldr r3, [pc, #80] ; (8002434 ) - 80023e2: 0011 movs r1, r2 - 80023e4: 0018 movs r0, r3 - 80023e6: f7ff f855 bl 8001494 + 8002f70: 4b12 ldr r3, [pc, #72] ; (8002fbc ) + 8002f72: 791a ldrb r2, [r3, #4] + 8002f74: 4b18 ldr r3, [pc, #96] ; (8002fd8 ) + 8002f76: 0011 movs r1, r2 + 8002f78: 0018 movs r0, r3 + 8002f7a: f7fe ffe1 bl 8001f40 GEI_BUTTON_CODE(&key2,dis_buff.button_flag[1]); - 80023ea: 4b0e ldr r3, [pc, #56] ; (8002424 ) - 80023ec: 795a ldrb r2, [r3, #5] - 80023ee: 4b0f ldr r3, [pc, #60] ; (800242c ) - 80023f0: 0011 movs r1, r2 - 80023f2: 0018 movs r0, r3 - 80023f4: f7ff f84e bl 8001494 + 8002f7e: 4b0f ldr r3, [pc, #60] ; (8002fbc ) + 8002f80: 795a ldrb r2, [r3, #5] + 8002f82: 4b11 ldr r3, [pc, #68] ; (8002fc8 ) + 8002f84: 0011 movs r1, r2 + 8002f86: 0018 movs r0, r3 + 8002f88: f7fe ffda bl 8001f40 GEI_BUTTON_CODE(&key3,dis_buff.button_flag[2]); - 80023f8: 4b0a ldr r3, [pc, #40] ; (8002424 ) - 80023fa: 799a ldrb r2, [r3, #6] - 80023fc: 4b0c ldr r3, [pc, #48] ; (8002430 ) - 80023fe: 0011 movs r1, r2 - 8002400: 0018 movs r0, r3 - 8002402: f7ff f847 bl 8001494 + 8002f8c: 4b0b ldr r3, [pc, #44] ; (8002fbc ) + 8002f8e: 799a ldrb r2, [r3, #6] + 8002f90: 4b0e ldr r3, [pc, #56] ; (8002fcc ) + 8002f92: 0011 movs r1, r2 + 8002f94: 0018 movs r0, r3 + 8002f96: f7fe ffd3 bl 8001f40 GEI_BUTTON_CODE(&key4,dis_buff.button_flag[3]); - 8002406: 4b07 ldr r3, [pc, #28] ; (8002424 ) - 8002408: 79da ldrb r2, [r3, #7] - 800240a: 4b07 ldr r3, [pc, #28] ; (8002428 ) - 800240c: 0011 movs r1, r2 - 800240e: 0018 movs r0, r3 - 8002410: f7ff f840 bl 8001494 + 8002f9a: 4b08 ldr r3, [pc, #32] ; (8002fbc ) + 8002f9c: 79da ldrb r2, [r3, #7] + 8002f9e: 4b09 ldr r3, [pc, #36] ; (8002fc4 ) + 8002fa0: 0011 movs r1, r2 + 8002fa2: 0018 movs r0, r3 + 8002fa4: f7fe ffcc bl 8001f40 display_and_button_loop(); - 8002414: f7ff f9f0 bl 80017f8 + 8002fa8: f7ff f97c bl 80022a4 hc2_sever(); - 8002418: f7ff fac8 bl 80019ac + 8002fac: f7ff fa54 bl 8002458 moto_server(); - 800241c: f7ff fb18 bl 8001a50 - switch(mode) - 8002420: e450 b.n 8001cc4 - 8002422: 46c0 nop ; (mov r8, r8) - 8002424: 2000003c .word 0x2000003c - 8002428: 2000002c .word 0x2000002c - 800242c: 20000078 .word 0x20000078 - 8002430: 20000068 .word 0x20000068 - 8002434: 20000048 .word 0x20000048 + 8002fb0: f7ff faa4 bl 80024fc + for(char a=0;a<2;a++) + 8002fb4: f7ff fbdc bl 8002770 + 8002fb8: 200000dc .word 0x200000dc + 8002fbc: 2000007c .word 0x2000007c + 8002fc0: 00002710 .word 0x00002710 + 8002fc4: 2000006c .word 0x2000006c + 8002fc8: 200000cc .word 0x200000cc + 8002fcc: 200000a8 .word 0x200000a8 + 8002fd0: 200000b8 .word 0x200000b8 + 8002fd4: 20000098 .word 0x20000098 + 8002fd8: 20000088 .word 0x20000088 -08002438 <__libc_init_array>: - 8002438: b570 push {r4, r5, r6, lr} - 800243a: 2600 movs r6, #0 - 800243c: 4d0c ldr r5, [pc, #48] ; (8002470 <__libc_init_array+0x38>) - 800243e: 4c0d ldr r4, [pc, #52] ; (8002474 <__libc_init_array+0x3c>) - 8002440: 1b64 subs r4, r4, r5 - 8002442: 10a4 asrs r4, r4, #2 - 8002444: 42a6 cmp r6, r4 - 8002446: d109 bne.n 800245c <__libc_init_array+0x24> - 8002448: 2600 movs r6, #0 - 800244a: f000 f821 bl 8002490 <_init> - 800244e: 4d0a ldr r5, [pc, #40] ; (8002478 <__libc_init_array+0x40>) - 8002450: 4c0a ldr r4, [pc, #40] ; (800247c <__libc_init_array+0x44>) - 8002452: 1b64 subs r4, r4, r5 - 8002454: 10a4 asrs r4, r4, #2 - 8002456: 42a6 cmp r6, r4 - 8002458: d105 bne.n 8002466 <__libc_init_array+0x2e> - 800245a: bd70 pop {r4, r5, r6, pc} - 800245c: 00b3 lsls r3, r6, #2 - 800245e: 58eb ldr r3, [r5, r3] - 8002460: 4798 blx r3 - 8002462: 3601 adds r6, #1 - 8002464: e7ee b.n 8002444 <__libc_init_array+0xc> - 8002466: 00b3 lsls r3, r6, #2 - 8002468: 58eb ldr r3, [r5, r3] - 800246a: 4798 blx r3 - 800246c: 3601 adds r6, #1 - 800246e: e7f2 b.n 8002456 <__libc_init_array+0x1e> - 8002470: 08002504 .word 0x08002504 - 8002474: 08002504 .word 0x08002504 - 8002478: 08002504 .word 0x08002504 - 800247c: 08002508 .word 0x08002508 +08002fdc <__libc_init_array>: + 8002fdc: b570 push {r4, r5, r6, lr} + 8002fde: 2600 movs r6, #0 + 8002fe0: 4d0c ldr r5, [pc, #48] ; (8003014 <__libc_init_array+0x38>) + 8002fe2: 4c0d ldr r4, [pc, #52] ; (8003018 <__libc_init_array+0x3c>) + 8002fe4: 1b64 subs r4, r4, r5 + 8002fe6: 10a4 asrs r4, r4, #2 + 8002fe8: 42a6 cmp r6, r4 + 8002fea: d109 bne.n 8003000 <__libc_init_array+0x24> + 8002fec: 2600 movs r6, #0 + 8002fee: f000 f821 bl 8003034 <_init> + 8002ff2: 4d0a ldr r5, [pc, #40] ; (800301c <__libc_init_array+0x40>) + 8002ff4: 4c0a ldr r4, [pc, #40] ; (8003020 <__libc_init_array+0x44>) + 8002ff6: 1b64 subs r4, r4, r5 + 8002ff8: 10a4 asrs r4, r4, #2 + 8002ffa: 42a6 cmp r6, r4 + 8002ffc: d105 bne.n 800300a <__libc_init_array+0x2e> + 8002ffe: bd70 pop {r4, r5, r6, pc} + 8003000: 00b3 lsls r3, r6, #2 + 8003002: 58eb ldr r3, [r5, r3] + 8003004: 4798 blx r3 + 8003006: 3601 adds r6, #1 + 8003008: e7ee b.n 8002fe8 <__libc_init_array+0xc> + 800300a: 00b3 lsls r3, r6, #2 + 800300c: 58eb ldr r3, [r5, r3] + 800300e: 4798 blx r3 + 8003010: 3601 adds r6, #1 + 8003012: e7f2 b.n 8002ffa <__libc_init_array+0x1e> + 8003014: 080030a8 .word 0x080030a8 + 8003018: 080030a8 .word 0x080030a8 + 800301c: 080030a8 .word 0x080030a8 + 8003020: 080030ac .word 0x080030ac -08002480 : - 8002480: 0003 movs r3, r0 - 8002482: 1882 adds r2, r0, r2 - 8002484: 4293 cmp r3, r2 - 8002486: d100 bne.n 800248a - 8002488: 4770 bx lr - 800248a: 7019 strb r1, [r3, #0] - 800248c: 3301 adds r3, #1 - 800248e: e7f9 b.n 8002484 +08003024 : + 8003024: 0003 movs r3, r0 + 8003026: 1882 adds r2, r0, r2 + 8003028: 4293 cmp r3, r2 + 800302a: d100 bne.n 800302e + 800302c: 4770 bx lr + 800302e: 7019 strb r1, [r3, #0] + 8003030: 3301 adds r3, #1 + 8003032: e7f9 b.n 8003028 -08002490 <_init>: - 8002490: b5f8 push {r3, r4, r5, r6, r7, lr} - 8002492: 46c0 nop ; (mov r8, r8) - 8002494: bcf8 pop {r3, r4, r5, r6, r7} - 8002496: bc08 pop {r3} - 8002498: 469e mov lr, r3 - 800249a: 4770 bx lr +08003034 <_init>: + 8003034: b5f8 push {r3, r4, r5, r6, r7, lr} + 8003036: 46c0 nop ; (mov r8, r8) + 8003038: bcf8 pop {r3, r4, r5, r6, r7} + 800303a: bc08 pop {r3} + 800303c: 469e mov lr, r3 + 800303e: 4770 bx lr -0800249c <_fini>: - 800249c: b5f8 push {r3, r4, r5, r6, r7, lr} - 800249e: 46c0 nop ; (mov r8, r8) - 80024a0: bcf8 pop {r3, r4, r5, r6, r7} - 80024a2: bc08 pop {r3} - 80024a4: 469e mov lr, r3 - 80024a6: 4770 bx lr +08003040 <_fini>: + 8003040: b5f8 push {r3, r4, r5, r6, r7, lr} + 8003042: 46c0 nop ; (mov r8, r8) + 8003044: bcf8 pop {r3, r4, r5, r6, r7} + 8003046: bc08 pop {r3} + 8003048: 469e mov lr, r3 + 800304a: 4770 bx lr diff --git a/Debug/Motor_Controller2.map b/Debug/Motor_Controller2.map index 4b7d4c9..51a3088 100644 --- a/Debug/Motor_Controller2.map +++ b/Debug/Motor_Controller2.map @@ -27,7 +27,9 @@ dis_buff 0xa ./my_software/my_code.o key1 0x10 ./my_software/my_code.o overload 0x10 ./my_software/my_code.o key3 0x10 ./my_software/my_code.o +ADCC 0x14 ./my_software/my_code.o key2 0x10 ./my_software/my_code.o +hadc 0x40 ./Core/Src/main.o moto 0x10 ./my_software/my_code.o Discarded input sections @@ -80,6 +82,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Core/Src/main.o .group 0x0000000000000000 0xc ./Core/Src/main.o .group 0x0000000000000000 0xc ./Core/Src/main.o + .group 0x0000000000000000 0xc ./Core/Src/main.o + .group 0x0000000000000000 0xc ./Core/Src/main.o .text 0x0000000000000000 0x0 ./Core/Src/main.o .data 0x0000000000000000 0x0 ./Core/Src/main.o .bss 0x0000000000000000 0x0 ./Core/Src/main.o @@ -120,11 +124,15 @@ Discarded input sections .group 0x0000000000000000 0xc ./Core/Src/stm32f0xx_hal_msp.o .group 0x0000000000000000 0xc ./Core/Src/stm32f0xx_hal_msp.o .group 0x0000000000000000 0xc ./Core/Src/stm32f0xx_hal_msp.o + .group 0x0000000000000000 0xc ./Core/Src/stm32f0xx_hal_msp.o + .group 0x0000000000000000 0xc ./Core/Src/stm32f0xx_hal_msp.o .text 0x0000000000000000 0x0 ./Core/Src/stm32f0xx_hal_msp.o .data 0x0000000000000000 0x0 ./Core/Src/stm32f0xx_hal_msp.o .bss 0x0000000000000000 0x0 ./Core/Src/stm32f0xx_hal_msp.o + .text.HAL_ADC_MspDeInit + 0x0000000000000000 0x40 ./Core/Src/stm32f0xx_hal_msp.o .debug_macro 0x0000000000000000 0xa7e ./Core/Src/stm32f0xx_hal_msp.o - .debug_macro 0x0000000000000000 0x127 ./Core/Src/stm32f0xx_hal_msp.o + .debug_macro 0x0000000000000000 0x12d ./Core/Src/stm32f0xx_hal_msp.o .debug_macro 0x0000000000000000 0x2e ./Core/Src/stm32f0xx_hal_msp.o .debug_macro 0x0000000000000000 0x22 ./Core/Src/stm32f0xx_hal_msp.o .debug_macro 0x0000000000000000 0x22 ./Core/Src/stm32f0xx_hal_msp.o @@ -151,6 +159,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Core/Src/stm32f0xx_hal_msp.o .debug_macro 0x0000000000000000 0x43 ./Core/Src/stm32f0xx_hal_msp.o .debug_macro 0x0000000000000000 0x28 ./Core/Src/stm32f0xx_hal_msp.o + .debug_macro 0x0000000000000000 0x33d ./Core/Src/stm32f0xx_hal_msp.o + .debug_macro 0x0000000000000000 0xbc ./Core/Src/stm32f0xx_hal_msp.o .debug_macro 0x0000000000000000 0xb0 ./Core/Src/stm32f0xx_hal_msp.o .debug_macro 0x0000000000000000 0x15a ./Core/Src/stm32f0xx_hal_msp.o .debug_macro 0x0000000000000000 0x22c ./Core/Src/stm32f0xx_hal_msp.o @@ -197,11 +207,13 @@ Discarded input sections .group 0x0000000000000000 0xc ./Core/Src/stm32f0xx_it.o .group 0x0000000000000000 0xc ./Core/Src/stm32f0xx_it.o .group 0x0000000000000000 0xc ./Core/Src/stm32f0xx_it.o + .group 0x0000000000000000 0xc ./Core/Src/stm32f0xx_it.o + .group 0x0000000000000000 0xc ./Core/Src/stm32f0xx_it.o .text 0x0000000000000000 0x0 ./Core/Src/stm32f0xx_it.o .data 0x0000000000000000 0x0 ./Core/Src/stm32f0xx_it.o .bss 0x0000000000000000 0x0 ./Core/Src/stm32f0xx_it.o .debug_macro 0x0000000000000000 0xa7e ./Core/Src/stm32f0xx_it.o - .debug_macro 0x0000000000000000 0x127 ./Core/Src/stm32f0xx_it.o + .debug_macro 0x0000000000000000 0x12d ./Core/Src/stm32f0xx_it.o .debug_macro 0x0000000000000000 0x2e ./Core/Src/stm32f0xx_it.o .debug_macro 0x0000000000000000 0x22 ./Core/Src/stm32f0xx_it.o .debug_macro 0x0000000000000000 0x22 ./Core/Src/stm32f0xx_it.o @@ -228,6 +240,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Core/Src/stm32f0xx_it.o .debug_macro 0x0000000000000000 0x43 ./Core/Src/stm32f0xx_it.o .debug_macro 0x0000000000000000 0x28 ./Core/Src/stm32f0xx_it.o + .debug_macro 0x0000000000000000 0x33d ./Core/Src/stm32f0xx_it.o + .debug_macro 0x0000000000000000 0xbc ./Core/Src/stm32f0xx_it.o .debug_macro 0x0000000000000000 0xb0 ./Core/Src/stm32f0xx_it.o .debug_macro 0x0000000000000000 0x15a ./Core/Src/stm32f0xx_it.o .debug_macro 0x0000000000000000 0x22c ./Core/Src/stm32f0xx_it.o @@ -465,6 +479,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Core/Src/system_stm32f0xx.o .group 0x0000000000000000 0xc ./Core/Src/system_stm32f0xx.o .group 0x0000000000000000 0xc ./Core/Src/system_stm32f0xx.o + .group 0x0000000000000000 0xc ./Core/Src/system_stm32f0xx.o + .group 0x0000000000000000 0xc ./Core/Src/system_stm32f0xx.o .text 0x0000000000000000 0x0 ./Core/Src/system_stm32f0xx.o .data 0x0000000000000000 0x0 ./Core/Src/system_stm32f0xx.o .bss 0x0000000000000000 0x0 ./Core/Src/system_stm32f0xx.o @@ -487,7 +503,7 @@ Discarded input sections .debug_macro 0x0000000000000000 0x391 ./Core/Src/system_stm32f0xx.o .debug_macro 0x0000000000000000 0x6e67 ./Core/Src/system_stm32f0xx.o .debug_macro 0x0000000000000000 0x66 ./Core/Src/system_stm32f0xx.o - .debug_macro 0x0000000000000000 0x127 ./Core/Src/system_stm32f0xx.o + .debug_macro 0x0000000000000000 0x12d ./Core/Src/system_stm32f0xx.o .debug_macro 0x0000000000000000 0x34a6 ./Core/Src/system_stm32f0xx.o .debug_macro 0x0000000000000000 0x174 ./Core/Src/system_stm32f0xx.o .debug_macro 0x0000000000000000 0x55 ./Core/Src/system_stm32f0xx.o @@ -500,6 +516,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Core/Src/system_stm32f0xx.o .debug_macro 0x0000000000000000 0x43 ./Core/Src/system_stm32f0xx.o .debug_macro 0x0000000000000000 0x28 ./Core/Src/system_stm32f0xx.o + .debug_macro 0x0000000000000000 0x33d ./Core/Src/system_stm32f0xx.o + .debug_macro 0x0000000000000000 0xbc ./Core/Src/system_stm32f0xx.o .debug_macro 0x0000000000000000 0xb0 ./Core/Src/system_stm32f0xx.o .debug_macro 0x0000000000000000 0x15a ./Core/Src/system_stm32f0xx.o .debug_macro 0x0000000000000000 0x22c ./Core/Src/system_stm32f0xx.o @@ -547,6 +565,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .text 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .data 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o @@ -589,7 +609,7 @@ Discarded input sections .text.HAL_DBGMCU_DisableDBGStandbyMode 0x0000000000000000 0x1c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o @@ -616,6 +636,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o @@ -624,6 +646,218 @@ Discarded input sections .debug_macro 0x0000000000000000 0x4c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .debug_macro 0x0000000000000000 0x2b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .debug_macro 0x0000000000000000 0xf1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .group 0x0000000000000000 0xc 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./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.o + .debug_line 0x0000000000000000 0x773 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.o + .debug_str 0x0000000000000000 0x55478 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.o + .comment 0x0000000000000000 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.o + .debug_frame 0x0000000000000000 0x30 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.o + .ARM.attributes + 0x0000000000000000 0x2c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o @@ -698,7 +932,7 @@ Discarded input sections .text.HAL_SYSTICK_Callback 0x0000000000000000 0xa ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o @@ -725,6 +959,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o @@ -769,6 +1005,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .text 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .data 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o @@ -807,9 +1045,9 @@ Discarded input sections .debug_aranges 0x0000000000000000 0x88 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .debug_ranges 0x0000000000000000 0x78 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o - .debug_macro 0x0000000000000000 0x199 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o + .debug_macro 0x0000000000000000 0x1ad ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o @@ -836,6 +1074,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o @@ -844,8 +1084,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x4c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .debug_macro 0x0000000000000000 0x2b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .debug_macro 0x0000000000000000 0xf1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o - .debug_line 0x0000000000000000 0xc45 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o - .debug_str 0x0000000000000000 0x52d15 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o + .debug_line 0x0000000000000000 0xc76 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o + .debug_str 0x0000000000000000 0x55497 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .comment 0x0000000000000000 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .debug_frame 0x0000000000000000 0x1d0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o .ARM.attributes @@ -886,6 +1126,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .text 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .data 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o @@ -912,9 +1154,9 @@ Discarded input sections .debug_aranges 0x0000000000000000 0x60 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .debug_ranges 0x0000000000000000 0x50 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o - .debug_macro 0x0000000000000000 0x199 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o + .debug_macro 0x0000000000000000 0x1ad ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o @@ -941,6 +1183,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o @@ -949,8 +1193,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x4c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .debug_macro 0x0000000000000000 0x2b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .debug_macro 0x0000000000000000 0xf1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o - .debug_line 0x0000000000000000 0x982 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o - .debug_str 0x0000000000000000 0x52adf ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o + .debug_line 0x0000000000000000 0x9b3 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o + .debug_str 0x0000000000000000 0x55261 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .comment 0x0000000000000000 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .debug_frame 0x0000000000000000 0x130 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o .ARM.attributes @@ -991,6 +1235,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .text 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .data 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o @@ -1027,9 +1273,9 @@ Discarded input sections .debug_aranges 0x0000000000000000 0x88 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .debug_ranges 0x0000000000000000 0x78 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o - .debug_macro 0x0000000000000000 0x199 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o + .debug_macro 0x0000000000000000 0x1ad ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o @@ -1056,6 +1302,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o @@ -1064,8 +1312,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x4c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .debug_macro 0x0000000000000000 0x2b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .debug_macro 0x0000000000000000 0xf1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o - .debug_line 0x0000000000000000 0x9f1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o - .debug_str 0x0000000000000000 0x52bf8 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o + .debug_line 0x0000000000000000 0xa22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o + .debug_str 0x0000000000000000 0x5537a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .comment 0x0000000000000000 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .debug_frame 0x0000000000000000 0x1c4 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.o .ARM.attributes @@ -1107,6 +1355,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .text 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .data 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o @@ -1147,9 +1397,9 @@ Discarded input sections .debug_aranges 0x0000000000000000 0x98 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .debug_ranges 0x0000000000000000 0x88 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x1ab ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o + .debug_macro 0x0000000000000000 0x1bf ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o @@ -1176,6 +1426,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o @@ -1184,8 +1436,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x4c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .debug_macro 0x0000000000000000 0x2b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .debug_macro 0x0000000000000000 0xf1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o - .debug_line 0x0000000000000000 0xaa0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o - .debug_str 0x0000000000000000 0x52d4b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o + .debug_line 0x0000000000000000 0xad1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o + .debug_str 0x0000000000000000 0x554cd ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .comment 0x0000000000000000 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .debug_frame 0x0000000000000000 0x220 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.o .ARM.attributes @@ -1226,6 +1478,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .text 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .data 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o @@ -1240,7 +1494,7 @@ Discarded input sections .text.HAL_GPIO_EXTI_Callback 0x0000000000000000 0x14 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o @@ -1267,6 +1521,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o @@ -1311,6 +1567,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .text 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .data 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o @@ -1477,9 +1735,9 @@ Discarded input sections .debug_aranges 0x0000000000000000 0x290 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .debug_ranges 0x0000000000000000 0x280 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x25e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .debug_macro 0x0000000000000000 0x272 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o @@ -1506,6 +1764,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o @@ -1514,8 +1774,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x4c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .debug_macro 0x0000000000000000 0x2b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .debug_macro 0x0000000000000000 0xf1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o - .debug_line 0x0000000000000000 0x3279 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o - .debug_str 0x0000000000000000 0x53bf1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .debug_line 0x0000000000000000 0x32aa ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o + .debug_str 0x0000000000000000 0x56373 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .comment 0x0000000000000000 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .debug_frame 0x0000000000000000 0xa24 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.o .ARM.attributes @@ -1556,6 +1816,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .text 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .data 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o @@ -1572,9 +1834,9 @@ Discarded input sections .debug_aranges 0x0000000000000000 0x38 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .debug_ranges 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x199 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o + .debug_macro 0x0000000000000000 0x1ad ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o @@ -1601,6 +1863,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o @@ -1609,8 +1873,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x4c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .debug_macro 0x0000000000000000 0x2b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .debug_macro 0x0000000000000000 0xf1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o - .debug_line 0x0000000000000000 0x7ea ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o - .debug_str 0x0000000000000000 0x52eac ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o + .debug_line 0x0000000000000000 0x81b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o + .debug_str 0x0000000000000000 0x5562e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .comment 0x0000000000000000 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .debug_frame 0x0000000000000000 0x90 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.o .ARM.attributes @@ -1651,6 +1915,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .text 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .data 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o @@ -1683,9 +1949,9 @@ Discarded input sections .debug_aranges 0x0000000000000000 0x78 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .debug_ranges 0x0000000000000000 0x68 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x199 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o + .debug_macro 0x0000000000000000 0x1ad ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o @@ -1712,6 +1978,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o @@ -1720,8 +1988,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x4c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .debug_macro 0x0000000000000000 0x2b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .debug_macro 0x0000000000000000 0xf1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o - .debug_line 0x0000000000000000 0x7f4 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o - .debug_str 0x0000000000000000 0x52aa6 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o + .debug_line 0x0000000000000000 0x825 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o + .debug_str 0x0000000000000000 0x55228 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .comment 0x0000000000000000 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .debug_frame 0x0000000000000000 0x170 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.o .ARM.attributes @@ -1762,6 +2030,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .text 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .data 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o @@ -1769,9 +2039,9 @@ Discarded input sections .debug_abbrev 0x0000000000000000 0x9a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .debug_aranges 0x0000000000000000 0x18 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x1b1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o + .debug_macro 0x0000000000000000 0x1c5 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o @@ -1798,6 +2068,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o @@ -1806,8 +2078,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x4c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .debug_macro 0x0000000000000000 0x2b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .debug_macro 0x0000000000000000 0xf1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o - .debug_line 0x0000000000000000 0x6a7 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o - .debug_str 0x0000000000000000 0x52938 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o + .debug_line 0x0000000000000000 0x6d8 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o + .debug_str 0x0000000000000000 0x550ba ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .comment 0x0000000000000000 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o .ARM.attributes 0x0000000000000000 0x31 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.o @@ -1847,6 +2119,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .text 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .data 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o @@ -1871,7 +2145,7 @@ Discarded input sections .text.HAL_RCC_CSSCallback 0x0000000000000000 0xa ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o @@ -1898,6 +2172,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o @@ -1942,6 +2218,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .text 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .data 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o @@ -1956,9 +2234,9 @@ Discarded input sections .debug_aranges 0x0000000000000000 0x30 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .debug_ranges 0x0000000000000000 0x20 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x199 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o + .debug_macro 0x0000000000000000 0x1ad ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o @@ -1985,6 +2263,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o @@ -1993,8 +2273,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x4c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .debug_macro 0x0000000000000000 0x2b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .debug_macro 0x0000000000000000 0xf1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o - .debug_line 0x0000000000000000 0x888 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o - .debug_str 0x0000000000000000 0x52a79 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o + .debug_line 0x0000000000000000 0x8b9 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o + .debug_str 0x0000000000000000 0x551fb ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .comment 0x0000000000000000 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .debug_frame 0x0000000000000000 0x70 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.o .ARM.attributes @@ -2035,6 +2315,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .text 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .data 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o @@ -2042,9 +2324,9 @@ Discarded input sections .debug_abbrev 0x0000000000000000 0x9a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .debug_aranges 0x0000000000000000 0x18 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o - .debug_macro 0x0000000000000000 0x19a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o + .debug_macro 0x0000000000000000 0x1ae ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o @@ -2071,6 +2353,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o @@ -2079,8 +2363,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x4c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .debug_macro 0x0000000000000000 0x2b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .debug_macro 0x0000000000000000 0xf1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o - .debug_line 0x0000000000000000 0x6a4 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o - .debug_str 0x0000000000000000 0x528c3 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o + .debug_line 0x0000000000000000 0x6d5 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o + .debug_str 0x0000000000000000 0x55045 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .comment 0x0000000000000000 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o .ARM.attributes 0x0000000000000000 0x31 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.o @@ -2120,6 +2404,8 @@ Discarded input sections .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o + .group 0x0000000000000000 0xc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .text 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .data 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .bss 0x0000000000000000 0x0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o @@ -2127,9 +2413,9 @@ Discarded input sections .debug_abbrev 0x0000000000000000 0x9a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .debug_aranges 0x0000000000000000 0x18 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x199 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o + .debug_macro 0x0000000000000000 0x1ad ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .debug_macro 0x0000000000000000 0xa7e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o - .debug_macro 0x0000000000000000 0x127 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o + .debug_macro 0x0000000000000000 0x12d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .debug_macro 0x0000000000000000 0x2e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .debug_macro 0x0000000000000000 0x22 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o @@ -2156,6 +2442,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .debug_macro 0x0000000000000000 0x43 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .debug_macro 0x0000000000000000 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o + .debug_macro 0x0000000000000000 0x33d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o + .debug_macro 0x0000000000000000 0xbc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .debug_macro 0x0000000000000000 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .debug_macro 0x0000000000000000 0x15a ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .debug_macro 0x0000000000000000 0x22c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o @@ -2164,8 +2452,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x4c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .debug_macro 0x0000000000000000 0x2b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .debug_macro 0x0000000000000000 0xf1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o - .debug_line 0x0000000000000000 0x6a7 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o - .debug_str 0x0000000000000000 0x528c6 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o + .debug_line 0x0000000000000000 0x6d8 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o + .debug_str 0x0000000000000000 0x55048 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .comment 0x0000000000000000 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o .ARM.attributes 0x0000000000000000 0x31 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.o @@ -2206,11 +2494,13 @@ Discarded input sections .group 0x0000000000000000 0xc ./my_software/button.o .group 0x0000000000000000 0xc ./my_software/button.o .group 0x0000000000000000 0xc ./my_software/button.o + .group 0x0000000000000000 0xc ./my_software/button.o + .group 0x0000000000000000 0xc ./my_software/button.o .text 0x0000000000000000 0x0 ./my_software/button.o .data 0x0000000000000000 0x0 ./my_software/button.o .bss 0x0000000000000000 0x0 ./my_software/button.o .debug_macro 0x0000000000000000 0xa7e ./my_software/button.o - .debug_macro 0x0000000000000000 0x127 ./my_software/button.o + .debug_macro 0x0000000000000000 0x12d ./my_software/button.o .debug_macro 0x0000000000000000 0x2e ./my_software/button.o .debug_macro 0x0000000000000000 0x22 ./my_software/button.o .debug_macro 0x0000000000000000 0x22 ./my_software/button.o @@ -2237,6 +2527,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./my_software/button.o .debug_macro 0x0000000000000000 0x43 ./my_software/button.o .debug_macro 0x0000000000000000 0x28 ./my_software/button.o + .debug_macro 0x0000000000000000 0x33d ./my_software/button.o + .debug_macro 0x0000000000000000 0xbc ./my_software/button.o .debug_macro 0x0000000000000000 0xb0 ./my_software/button.o .debug_macro 0x0000000000000000 0x15a ./my_software/button.o .debug_macro 0x0000000000000000 0x22c ./my_software/button.o @@ -2283,11 +2575,13 @@ Discarded input sections .group 0x0000000000000000 0xc ./my_software/my_code.o .group 0x0000000000000000 0xc ./my_software/my_code.o .group 0x0000000000000000 0xc ./my_software/my_code.o + .group 0x0000000000000000 0xc ./my_software/my_code.o + .group 0x0000000000000000 0xc ./my_software/my_code.o .text 0x0000000000000000 0x0 ./my_software/my_code.o .data 0x0000000000000000 0x0 ./my_software/my_code.o .bss 0x0000000000000000 0x0 ./my_software/my_code.o .debug_macro 0x0000000000000000 0xa7e ./my_software/my_code.o - .debug_macro 0x0000000000000000 0x127 ./my_software/my_code.o + .debug_macro 0x0000000000000000 0x12d ./my_software/my_code.o .debug_macro 0x0000000000000000 0x2e ./my_software/my_code.o .debug_macro 0x0000000000000000 0x22 ./my_software/my_code.o .debug_macro 0x0000000000000000 0x22 ./my_software/my_code.o @@ -2314,6 +2608,8 @@ Discarded input sections .debug_macro 0x0000000000000000 0x34 ./my_software/my_code.o .debug_macro 0x0000000000000000 0x43 ./my_software/my_code.o .debug_macro 0x0000000000000000 0x28 ./my_software/my_code.o + .debug_macro 0x0000000000000000 0x33d ./my_software/my_code.o + .debug_macro 0x0000000000000000 0xbc ./my_software/my_code.o .debug_macro 0x0000000000000000 0xb0 ./my_software/my_code.o .debug_macro 0x0000000000000000 0x15a ./my_software/my_code.o .debug_macro 0x0000000000000000 0x22c ./my_software/my_code.o @@ -2390,6 +2686,8 @@ LOAD ./Core/Src/sysmem.o LOAD ./Core/Src/system_stm32f0xx.o LOAD ./Core/Startup/startup_stm32f030f4px.o LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o +LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.o LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o LOAD ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o @@ -2437,7 +2735,7 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id 0x0000000008000000 g_pfnVectors 0x00000000080000c0 . = ALIGN (0x4) -.text 0x00000000080000c0 0x23e8 +.text 0x00000000080000c0 0x2f8c 0x00000000080000c0 . = ALIGN (0x4) *(.text) .text 0x00000000080000c0 0x48 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o @@ -2453,225 +2751,256 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id 0x00000000080003f0 __aeabi_ldiv0 0x00000000080003f0 __aeabi_idiv0 *(.text*) - .text.main 0x00000000080003f4 0x16 ./Core/Src/main.o + .text.main 0x00000000080003f4 0x1a ./Core/Src/main.o 0x00000000080003f4 main .text.SystemClock_Config - 0x000000000800040a 0x94 ./Core/Src/main.o - 0x000000000800040a SystemClock_Config - *fill* 0x000000000800049e 0x2 + 0x000000000800040e 0xa0 ./Core/Src/main.o + 0x000000000800040e SystemClock_Config + *fill* 0x00000000080004ae 0x2 + .text.MX_ADC_Init + 0x00000000080004b0 0xd0 ./Core/Src/main.o .text.MX_GPIO_Init - 0x00000000080004a0 0xf8 ./Core/Src/main.o + 0x0000000008000580 0xd8 ./Core/Src/main.o .text.Error_Handler - 0x0000000008000598 0xa ./Core/Src/main.o - 0x0000000008000598 Error_Handler - *fill* 0x00000000080005a2 0x2 + 0x0000000008000658 0xa ./Core/Src/main.o + 0x0000000008000658 Error_Handler + *fill* 0x0000000008000662 0x2 .text.HAL_MspInit - 0x00000000080005a4 0x48 ./Core/Src/stm32f0xx_hal_msp.o - 0x00000000080005a4 HAL_MspInit + 0x0000000008000664 0x48 ./Core/Src/stm32f0xx_hal_msp.o + 0x0000000008000664 HAL_MspInit + .text.HAL_ADC_MspInit + 0x00000000080006ac 0x8c ./Core/Src/stm32f0xx_hal_msp.o + 0x00000000080006ac HAL_ADC_MspInit .text.NMI_Handler - 0x00000000080005ec 0x6 ./Core/Src/stm32f0xx_it.o - 0x00000000080005ec NMI_Handler + 0x0000000008000738 0x6 ./Core/Src/stm32f0xx_it.o + 0x0000000008000738 NMI_Handler .text.HardFault_Handler - 0x00000000080005f2 0x6 ./Core/Src/stm32f0xx_it.o - 0x00000000080005f2 HardFault_Handler + 0x000000000800073e 0x6 ./Core/Src/stm32f0xx_it.o + 0x000000000800073e HardFault_Handler .text.SVC_Handler - 0x00000000080005f8 0xa ./Core/Src/stm32f0xx_it.o - 0x00000000080005f8 SVC_Handler + 0x0000000008000744 0xa ./Core/Src/stm32f0xx_it.o + 0x0000000008000744 SVC_Handler .text.PendSV_Handler - 0x0000000008000602 0xa ./Core/Src/stm32f0xx_it.o - 0x0000000008000602 PendSV_Handler + 0x000000000800074e 0xa ./Core/Src/stm32f0xx_it.o + 0x000000000800074e PendSV_Handler .text.SysTick_Handler - 0x000000000800060c 0xe ./Core/Src/stm32f0xx_it.o - 0x000000000800060c SysTick_Handler + 0x0000000008000758 0xe ./Core/Src/stm32f0xx_it.o + 0x0000000008000758 SysTick_Handler .text.SystemInit - 0x000000000800061a 0xa ./Core/Src/system_stm32f0xx.o - 0x000000000800061a SystemInit + 0x0000000008000766 0xa ./Core/Src/system_stm32f0xx.o + 0x0000000008000766 SystemInit .text.Reset_Handler - 0x0000000008000624 0x50 ./Core/Startup/startup_stm32f030f4px.o - 0x0000000008000624 Reset_Handler + 0x0000000008000770 0x50 ./Core/Startup/startup_stm32f030f4px.o + 0x0000000008000770 Reset_Handler .text.Default_Handler - 0x0000000008000674 0x2 ./Core/Startup/startup_stm32f030f4px.o - 0x0000000008000674 TIM1_BRK_UP_TRG_COM_IRQHandler - 0x0000000008000674 I2C1_IRQHandler - 0x0000000008000674 SPI1_IRQHandler - 0x0000000008000674 EXTI2_3_IRQHandler - 0x0000000008000674 ADC1_IRQHandler - 0x0000000008000674 TIM17_IRQHandler - 0x0000000008000674 RTC_IRQHandler - 0x0000000008000674 TIM16_IRQHandler - 0x0000000008000674 TIM3_IRQHandler - 0x0000000008000674 EXTI4_15_IRQHandler - 0x0000000008000674 RCC_IRQHandler - 0x0000000008000674 DMA1_Channel1_IRQHandler - 0x0000000008000674 Default_Handler - 0x0000000008000674 TIM14_IRQHandler - 0x0000000008000674 DMA1_Channel4_5_IRQHandler - 0x0000000008000674 EXTI0_1_IRQHandler - 0x0000000008000674 WWDG_IRQHandler - 0x0000000008000674 DMA1_Channel2_3_IRQHandler - 0x0000000008000674 FLASH_IRQHandler - 0x0000000008000674 USART1_IRQHandler - 0x0000000008000674 TIM1_CC_IRQHandler - *fill* 0x0000000008000676 0x2 + 0x00000000080007c0 0x2 ./Core/Startup/startup_stm32f030f4px.o + 0x00000000080007c0 TIM1_BRK_UP_TRG_COM_IRQHandler + 0x00000000080007c0 I2C1_IRQHandler + 0x00000000080007c0 SPI1_IRQHandler + 0x00000000080007c0 EXTI2_3_IRQHandler + 0x00000000080007c0 ADC1_IRQHandler + 0x00000000080007c0 TIM17_IRQHandler + 0x00000000080007c0 RTC_IRQHandler + 0x00000000080007c0 TIM16_IRQHandler + 0x00000000080007c0 TIM3_IRQHandler + 0x00000000080007c0 EXTI4_15_IRQHandler + 0x00000000080007c0 RCC_IRQHandler + 0x00000000080007c0 DMA1_Channel1_IRQHandler + 0x00000000080007c0 Default_Handler + 0x00000000080007c0 TIM14_IRQHandler + 0x00000000080007c0 DMA1_Channel4_5_IRQHandler + 0x00000000080007c0 EXTI0_1_IRQHandler + 0x00000000080007c0 WWDG_IRQHandler + 0x00000000080007c0 DMA1_Channel2_3_IRQHandler + 0x00000000080007c0 FLASH_IRQHandler + 0x00000000080007c0 USART1_IRQHandler + 0x00000000080007c0 TIM1_CC_IRQHandler + *fill* 0x00000000080007c2 0x2 .text.HAL_Init - 0x0000000008000678 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o - 0x0000000008000678 HAL_Init + 0x00000000080007c4 0x28 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + 0x00000000080007c4 HAL_Init .text.HAL_InitTick - 0x00000000080006a0 0x68 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o - 0x00000000080006a0 HAL_InitTick + 0x00000000080007ec 0x68 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + 0x00000000080007ec HAL_InitTick .text.HAL_IncTick - 0x0000000008000708 0x24 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o - 0x0000000008000708 HAL_IncTick + 0x0000000008000854 0x24 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + 0x0000000008000854 HAL_IncTick .text.HAL_GetTick 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0x4 + 0x00000000080030a8 . = ALIGN (0x4) + 0x00000000080030a8 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x0000000008002504 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o - 0x0000000008002508 PROVIDE (__init_array_end = .) - 0x0000000008002508 . = ALIGN (0x4) + .init_array 0x00000000080030a8 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o + 0x00000000080030ac PROVIDE (__init_array_end = .) + 0x00000000080030ac . = ALIGN (0x4) -.fini_array 0x0000000008002508 0x4 - 0x0000000008002508 . = ALIGN (0x4) +.fini_array 0x00000000080030ac 0x4 + 0x00000000080030ac . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x0000000008002508 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o + .fini_array 0x00000000080030ac 0x4 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x000000000800250c . = ALIGN (0x4) - 0x000000000800250c _sidata = LOADADDR (.data) + 0x00000000080030b0 . = ALIGN (0x4) + 0x00000000080030b0 _sidata = LOADADDR (.data) -.data 0x0000000020000000 0xc load address 0x000000000800250c +.data 0x0000000020000000 0xc load address 0x00000000080030b0 0x0000000020000000 . = ALIGN (0x4) 0x0000000020000000 _sdata = . *(.data) @@ -2691,41 +3020,45 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id *fill* 0x0000000020000009 0x3 0x000000002000000c _edata = . -.igot.plt 0x000000002000000c 0x0 load address 0x0000000008002518 +.igot.plt 0x000000002000000c 0x0 load address 0x00000000080030bc .igot.plt 0x000000002000000c 0x0 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o 0x000000002000000c . = ALIGN (0x4) -.bss 0x000000002000000c 0x8c load address 0x0000000008002518 +.bss 0x000000002000000c 0xe0 load address 0x00000000080030bc 0x000000002000000c _sbss = . 0x000000002000000c __bss_start__ = _sbss *(.bss) .bss 0x000000002000000c 0x1c /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtbegin.o *(.bss*) *(COMMON) - COMMON 0x0000000020000028 0x4 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o - 0x0000000020000028 uwTick - COMMON 0x000000002000002c 0x6c ./my_software/my_code.o - 0x000000002000002c key4 - 0x000000002000003c dis_buff - 0x0000000020000048 key1 - 0x0000000020000058 overload - 0x0000000020000068 key3 - 0x0000000020000078 key2 - 0x0000000020000088 moto - 0x0000000020000098 . = ALIGN (0x4) - 0x0000000020000098 _ebss = . - 0x0000000020000098 __bss_end__ = _ebss + COMMON 0x0000000020000028 0x40 ./Core/Src/main.o + 0x0000000020000028 hadc + COMMON 0x0000000020000068 0x4 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + 0x0000000020000068 uwTick + COMMON 0x000000002000006c 0x80 ./my_software/my_code.o + 0x000000002000006c key4 + 0x000000002000007c dis_buff + 0x0000000020000088 key1 + 0x0000000020000098 overload + 0x00000000200000a8 key3 + 0x00000000200000b8 ADCC + 0x00000000200000cc key2 + 0x00000000200000dc moto + 0x00000000200000ec . = ALIGN (0x4) + 0x00000000200000ec _ebss = . + 0x00000000200000ec __bss_end__ = _ebss ._user_heap_stack - 0x0000000020000098 0x600 load address 0x0000000008002518 - 0x0000000020000098 . = ALIGN (0x8) + 0x00000000200000ec 0x604 load address 0x00000000080030bc + 0x00000000200000f0 . = ALIGN (0x8) + *fill* 0x00000000200000ec 0x4 [!provide] PROVIDE (end = .) - 0x0000000020000098 PROVIDE (_end = .) - 0x0000000020000298 . = (. + _Min_Heap_Size) - *fill* 0x0000000020000098 0x200 - 0x0000000020000698 . = (. + _Min_Stack_Size) - *fill* 0x0000000020000298 0x400 - 0x0000000020000698 . = ALIGN (0x8) + 0x00000000200000f0 PROVIDE (_end = .) + 0x00000000200002f0 . = (. + _Min_Heap_Size) + *fill* 0x00000000200000f0 0x200 + 0x00000000200006f0 . = (. + _Min_Stack_Size) + *fill* 0x00000000200002f0 0x400 + 0x00000000200006f0 . = ALIGN (0x8) /DISCARD/ libc.a(*) @@ -2752,181 +3085,194 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id .ARM.attributes 0x000000000000011b 0x2c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .ARM.attributes - 0x0000000000000147 0x2c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + 0x0000000000000147 0x2c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o .ARM.attributes - 0x0000000000000173 0x2c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + 0x0000000000000173 0x2c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .ARM.attributes - 0x000000000000019f 0x2c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + 0x000000000000019f 0x2c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .ARM.attributes - 0x00000000000001cb 0x2c ./my_software/button.o + 0x00000000000001cb 0x2c ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .ARM.attributes - 0x00000000000001f7 0x2c ./my_software/my_code.o + 0x00000000000001f7 0x2c ./my_software/button.o .ARM.attributes - 0x0000000000000223 0x2c /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-init.o) + 0x0000000000000223 0x2c ./my_software/my_code.o .ARM.attributes - 0x000000000000024f 0x2c /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-memset.o) + 0x000000000000024f 0x2c /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-init.o) .ARM.attributes - 0x000000000000027b 0x1e /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivsi3.o) + 0x000000000000027b 0x2c /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-memset.o) .ARM.attributes - 0x0000000000000299 0x1e /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_divsi3.o) + 0x00000000000002a7 0x1e /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivsi3.o) .ARM.attributes - 0x00000000000002b7 0x1e /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_dvmd_tls.o) + 0x00000000000002c5 0x1e /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_divsi3.o) .ARM.attributes - 0x00000000000002d5 0x1e /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtn.o + 0x00000000000002e3 0x1e /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_dvmd_tls.o) + .ARM.attributes + 0x0000000000000301 0x1e /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/crtn.o OUTPUT(Motor_Controller2.elf elf32-littlearm) LOAD linker stubs LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc.a LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libm.a LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a -.debug_info 0x0000000000000000 0x3371 - .debug_info 0x0000000000000000 0x58d ./Core/Src/main.o - .debug_info 0x000000000000058d 0x27d ./Core/Src/stm32f0xx_hal_msp.o - .debug_info 0x000000000000080a 0x1b3 ./Core/Src/stm32f0xx_it.o - .debug_info 0x00000000000009bd 0x2c3 ./Core/Src/system_stm32f0xx.o - .debug_info 0x0000000000000c80 0x22 ./Core/Startup/startup_stm32f030f4px.o - .debug_info 0x0000000000000ca2 0x6be ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o - .debug_info 0x0000000000001360 0x7a0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o - .debug_info 0x0000000000001b00 0x6d3 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o - .debug_info 0x00000000000021d3 0x88d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o - .debug_info 0x0000000000002a60 0x1d4 ./my_software/button.o - .debug_info 0x0000000000002c34 0x73d ./my_software/my_code.o +.debug_info 0x0000000000000000 0x50b2 + .debug_info 0x0000000000000000 0xa5b ./Core/Src/main.o + .debug_info 0x0000000000000a5b 0x888 ./Core/Src/stm32f0xx_hal_msp.o + .debug_info 0x00000000000012e3 0x1b3 ./Core/Src/stm32f0xx_it.o + .debug_info 0x0000000000001496 0x2c3 ./Core/Src/system_stm32f0xx.o + .debug_info 0x0000000000001759 0x22 ./Core/Startup/startup_stm32f030f4px.o + .debug_info 0x000000000000177b 0x6be ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + .debug_info 0x0000000000001e39 0xd62 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .debug_info 0x0000000000002b9b 0x7a0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + .debug_info 0x000000000000333b 0x6d3 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + .debug_info 0x0000000000003a0e 0x88d ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + .debug_info 0x000000000000429b 0x1d4 ./my_software/button.o + .debug_info 0x000000000000446f 0xc43 ./my_software/my_code.o -.debug_abbrev 0x0000000000000000 0x1106 - .debug_abbrev 0x0000000000000000 0x1c4 ./Core/Src/main.o - .debug_abbrev 0x00000000000001c4 0x11d ./Core/Src/stm32f0xx_hal_msp.o - .debug_abbrev 0x00000000000002e1 0xd2 ./Core/Src/stm32f0xx_it.o - .debug_abbrev 0x00000000000003b3 0x145 ./Core/Src/system_stm32f0xx.o - .debug_abbrev 0x00000000000004f8 0x12 ./Core/Startup/startup_stm32f030f4px.o - .debug_abbrev 0x000000000000050a 0x21e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o - .debug_abbrev 0x0000000000000728 0x2a9 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o - .debug_abbrev 0x00000000000009d1 0x1e8 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o - .debug_abbrev 0x0000000000000bb9 0x23b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o - .debug_abbrev 0x0000000000000df4 0xf6 ./my_software/button.o - .debug_abbrev 0x0000000000000eea 0x21c ./my_software/my_code.o +.debug_abbrev 0x0000000000000000 0x13fb + .debug_abbrev 0x0000000000000000 0x208 ./Core/Src/main.o + .debug_abbrev 0x0000000000000208 0x1ac ./Core/Src/stm32f0xx_hal_msp.o + .debug_abbrev 0x00000000000003b4 0xd2 ./Core/Src/stm32f0xx_it.o + .debug_abbrev 0x0000000000000486 0x145 ./Core/Src/system_stm32f0xx.o + .debug_abbrev 0x00000000000005cb 0x12 ./Core/Startup/startup_stm32f030f4px.o + .debug_abbrev 0x00000000000005dd 0x21e ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + .debug_abbrev 0x00000000000007fb 0x1f1 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .debug_abbrev 0x00000000000009ec 0x2a9 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + .debug_abbrev 0x0000000000000c95 0x1e8 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + .debug_abbrev 0x0000000000000e7d 0x23b ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + .debug_abbrev 0x00000000000010b8 0xf6 ./my_software/button.o + .debug_abbrev 0x00000000000011ae 0x24d ./my_software/my_code.o -.debug_aranges 0x0000000000000000 0x3c8 +.debug_aranges 0x0000000000000000 0x4d8 .debug_aranges - 0x0000000000000000 0x38 ./Core/Src/main.o + 0x0000000000000000 0x40 ./Core/Src/main.o .debug_aranges - 0x0000000000000038 0x20 ./Core/Src/stm32f0xx_hal_msp.o + 0x0000000000000040 0x30 ./Core/Src/stm32f0xx_hal_msp.o .debug_aranges - 0x0000000000000058 0x40 ./Core/Src/stm32f0xx_it.o + 0x0000000000000070 0x40 ./Core/Src/stm32f0xx_it.o .debug_aranges - 0x0000000000000098 0x28 ./Core/Src/system_stm32f0xx.o + 0x00000000000000b0 0x28 ./Core/Src/system_stm32f0xx.o .debug_aranges - 0x00000000000000c0 0x28 ./Core/Startup/startup_stm32f030f4px.o + 0x00000000000000d8 0x28 ./Core/Startup/startup_stm32f030f4px.o .debug_aranges - 0x00000000000000e8 0xd0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + 0x0000000000000100 0xd0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o .debug_aranges - 0x00000000000001b8 0xc0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + 0x00000000000001d0 0xf8 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o .debug_aranges - 0x0000000000000278 0x58 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + 0x00000000000002c8 0xc0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .debug_aranges - 0x00000000000002d0 0x80 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + 0x0000000000000388 0x58 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .debug_aranges - 0x0000000000000350 0x20 ./my_software/button.o + 0x00000000000003e0 0x80 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .debug_aranges - 0x0000000000000370 0x58 ./my_software/my_code.o + 0x0000000000000460 0x20 ./my_software/button.o + .debug_aranges + 0x0000000000000480 0x58 ./my_software/my_code.o -.debug_ranges 0x0000000000000000 0x320 - .debug_ranges 0x0000000000000000 0x28 ./Core/Src/main.o - .debug_ranges 0x0000000000000028 0x10 ./Core/Src/stm32f0xx_hal_msp.o - .debug_ranges 0x0000000000000038 0x30 ./Core/Src/stm32f0xx_it.o - .debug_ranges 0x0000000000000068 0x18 ./Core/Src/system_stm32f0xx.o - .debug_ranges 0x0000000000000080 0x20 ./Core/Startup/startup_stm32f030f4px.o - .debug_ranges 0x00000000000000a0 0xc0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o - .debug_ranges 0x0000000000000160 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o - .debug_ranges 0x0000000000000210 0x48 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o - .debug_ranges 0x0000000000000258 0x70 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o - .debug_ranges 0x00000000000002c8 0x10 ./my_software/button.o - .debug_ranges 0x00000000000002d8 0x48 ./my_software/my_code.o +.debug_ranges 0x0000000000000000 0x420 + .debug_ranges 0x0000000000000000 0x30 ./Core/Src/main.o + .debug_ranges 0x0000000000000030 0x20 ./Core/Src/stm32f0xx_hal_msp.o + .debug_ranges 0x0000000000000050 0x30 ./Core/Src/stm32f0xx_it.o + .debug_ranges 0x0000000000000080 0x18 ./Core/Src/system_stm32f0xx.o + .debug_ranges 0x0000000000000098 0x20 ./Core/Startup/startup_stm32f030f4px.o + .debug_ranges 0x00000000000000b8 0xc0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + .debug_ranges 0x0000000000000178 0xe8 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .debug_ranges 0x0000000000000260 0xb0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + .debug_ranges 0x0000000000000310 0x48 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + .debug_ranges 0x0000000000000358 0x70 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + .debug_ranges 0x00000000000003c8 0x10 ./my_software/button.o + .debug_ranges 0x00000000000003d8 0x48 ./my_software/my_code.o -.debug_macro 0x0000000000000000 0xe2d5 - .debug_macro 0x0000000000000000 0x1b2 ./Core/Src/main.o - .debug_macro 0x00000000000001b2 0xa7e ./Core/Src/main.o - .debug_macro 0x0000000000000c30 0x127 ./Core/Src/main.o - .debug_macro 0x0000000000000d57 0x2e ./Core/Src/main.o - .debug_macro 0x0000000000000d85 0x22 ./Core/Src/main.o - .debug_macro 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- .debug_line 0x000000000000157c 0x71e ./Core/Src/system_stm32f0xx.o - .debug_line 0x0000000000001c9a 0x89 ./Core/Startup/startup_stm32f030f4px.o - .debug_line 0x0000000000001d23 0x929 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o - .debug_line 0x000000000000264c 0x9d5 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o - .debug_line 0x0000000000003021 0xaa6 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o - .debug_line 0x0000000000003ac7 0xd15 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o - .debug_line 0x00000000000047dc 0x709 ./my_software/button.o - .debug_line 0x0000000000004ee5 0xda2 ./my_software/my_code.o +.debug_line 0x0000000000000000 0x7107 + .debug_line 0x0000000000000000 0x851 ./Core/Src/main.o + .debug_line 0x0000000000000851 0x727 ./Core/Src/stm32f0xx_hal_msp.o + .debug_line 0x0000000000000f78 0x744 ./Core/Src/stm32f0xx_it.o + .debug_line 0x00000000000016bc 0x74f ./Core/Src/system_stm32f0xx.o + .debug_line 0x0000000000001e0b 0x89 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./Core/Src/system_stm32f0xx.o - 0x5293d (size before relaxing) - .debug_str 0x0000000000052baf 0x36 ./Core/Startup/startup_stm32f030f4px.o +.debug_str 0x0000000000000000 0x567a6 + .debug_str 0x0000000000000000 0x5556f ./Core/Src/main.o + 0x55853 (size before relaxing) + .debug_str 0x000000000005556f 0x4e ./Core/Src/stm32f0xx_hal_msp.o + 0x556a0 (size before relaxing) + .debug_str 0x00000000000555bd 0x76 ./Core/Src/stm32f0xx_it.o + 0x5528c (size before relaxing) + .debug_str 0x0000000000055633 0x5f ./Core/Src/system_stm32f0xx.o + 0x550bf (size before relaxing) + .debug_str 0x0000000000055692 0x36 ./Core/Startup/startup_stm32f030f4px.o 0x7c (size before relaxing) - .debug_str 0x0000000000052be5 0x413 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o - 0x52e14 (size before relaxing) - .debug_str 0x0000000000052ff8 0x204 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o - 0x52cc8 (size before relaxing) - .debug_str 0x00000000000531fc 0x156 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o - 0x52b1c (size before relaxing) - .debug_str 0x0000000000053352 0x240 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o - 0x52d47 (size before relaxing) - .debug_str 0x0000000000053592 0x40 ./my_software/button.o - 0x52ae9 (size before relaxing) - .debug_str 0x00000000000535d2 0x348 ./my_software/my_code.o - 0x52e95 (size before relaxing) + .debug_str 0x00000000000556c8 0x413 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + 0x55596 (size before relaxing) + .debug_str 0x0000000000055adb 0x393 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + 0x557bf (size before relaxing) + .debug_str 0x0000000000055e6e 0x1dc ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + 0x5544a (size before relaxing) + .debug_str 0x000000000005604a 0x150 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + 0x5529e (size before relaxing) + .debug_str 0x000000000005619a 0x240 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + 0x554c9 (size before relaxing) + .debug_str 0x00000000000563da 0x40 ./my_software/button.o + 0x5526b (size before relaxing) + .debug_str 0x000000000005641a 0x38c ./my_software/my_code.o + 0x559e8 (size before relaxing) .comment 0x0000000000000000 0x53 .comment 0x0000000000000000 0x53 ./Core/Src/main.o @@ -2935,24 +3281,26 @@ LOAD /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.id .comment 0x0000000000000053 0x54 ./Core/Src/stm32f0xx_it.o .comment 0x0000000000000053 0x54 ./Core/Src/system_stm32f0xx.o .comment 0x0000000000000053 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + .comment 0x0000000000000053 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o .comment 0x0000000000000053 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o .comment 0x0000000000000053 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o .comment 0x0000000000000053 0x54 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o .comment 0x0000000000000053 0x54 ./my_software/button.o .comment 0x0000000000000053 0x54 ./my_software/my_code.o -.debug_frame 0x0000000000000000 0xb50 - .debug_frame 0x0000000000000000 0x88 ./Core/Src/main.o - .debug_frame 0x0000000000000088 0x30 ./Core/Src/stm32f0xx_hal_msp.o - .debug_frame 0x00000000000000b8 0x9c ./Core/Src/stm32f0xx_it.o - .debug_frame 0x0000000000000154 0x4c ./Core/Src/system_stm32f0xx.o - .debug_frame 0x00000000000001a0 0x2a4 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o - .debug_frame 0x0000000000000444 0x2a0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o - .debug_frame 0x00000000000006e4 0x110 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o - .debug_frame 0x00000000000007f4 0x198 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o - .debug_frame 0x000000000000098c 0x30 ./my_software/button.o - .debug_frame 0x00000000000009bc 0x108 ./my_software/my_code.o - .debug_frame 0x0000000000000ac4 0x2c /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-init.o) - .debug_frame 0x0000000000000af0 0x20 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-memset.o) - .debug_frame 0x0000000000000b10 0x20 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivsi3.o) - .debug_frame 0x0000000000000b30 0x20 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_divsi3.o) +.debug_frame 0x0000000000000000 0xf50 + .debug_frame 0x0000000000000000 0xa8 ./Core/Src/main.o + .debug_frame 0x00000000000000a8 0x70 ./Core/Src/stm32f0xx_hal_msp.o + .debug_frame 0x0000000000000118 0x9c ./Core/Src/stm32f0xx_it.o + .debug_frame 0x00000000000001b4 0x4c ./Core/Src/system_stm32f0xx.o + .debug_frame 0x0000000000000200 0x2a4 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o + .debug_frame 0x00000000000004a4 0x3a0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o + .debug_frame 0x0000000000000844 0x2a0 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o + .debug_frame 0x0000000000000ae4 0x110 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.o + .debug_frame 0x0000000000000bf4 0x198 ./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.o + .debug_frame 0x0000000000000d8c 0x30 ./my_software/button.o + .debug_frame 0x0000000000000dbc 0x108 ./my_software/my_code.o + .debug_frame 0x0000000000000ec4 0x2c /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-init.o) + .debug_frame 0x0000000000000ef0 0x20 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(lib_a-memset.o) + .debug_frame 0x0000000000000f10 0x20 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_udivsi3.o) + .debug_frame 0x0000000000000f30 0x20 /Applications/STM32CubeIDE.app/Contents/Eclipse/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.9-2020-q2-update.macos64_2.0.0.202105311346/tools/bin/../lib/gcc/arm-none-eabi/9.3.1/thumb/v6-m/nofp/libgcc.a(_divsi3.o) diff --git a/Debug/my_software/button.d b/Debug/my_software/button.d index f91254f..cde7086 100644 --- a/Debug/my_software/button.d +++ b/Debug/my_software/button.d @@ -18,6 +18,8 @@ my_software/button.o: ../my_software/button.c ../my_software/button.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -67,6 +69,10 @@ my_software/button.o: ../my_software/button.c ../my_software/button.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/my_software/my_code.d b/Debug/my_software/my_code.d index cd11b5e..b1e1b71 100644 --- a/Debug/my_software/my_code.d +++ b/Debug/my_software/my_code.d @@ -18,6 +18,8 @@ my_software/my_code.o: ../my_software/my_code.c ../my_software/my_code.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ @@ -68,6 +70,10 @@ my_software/my_code.o: ../my_software/my_code.c ../my_software/my_code.h \ ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: diff --git a/Debug/my_software/my_code.su b/Debug/my_software/my_code.su index 3c478e2..5fb1ab6 100644 --- a/Debug/my_software/my_code.su +++ b/Debug/my_software/my_code.su @@ -1,8 +1,8 @@ -my_code.c:59:6:ds_in_or_out 48 static -my_code.c:77:9:Read_Ds 8 static -my_code.c:83:6:Sand_Byte_to_595 24 static -my_code.c:116:6:Sand_Byte_to_595_2 24 static -my_code.c:149:6:display_and_button_loop 24 static -my_code.c:215:6:hc2_sever 16 static -my_code.c:241:6:moto_server 8 static -my_code.c:333:6:my_code 32 static +my_code.c:71:6:ds_in_or_out 48 static +my_code.c:89:9:Read_Ds 8 static +my_code.c:95:6:Sand_Byte_to_595 24 static +my_code.c:128:6:Sand_Byte_to_595_2 24 static +my_code.c:161:6:display_and_button_loop 24 static +my_code.c:227:6:hc2_sever 16 static +my_code.c:253:6:moto_server 8 static +my_code.c:345:6:my_code 32 static diff --git a/Debug/objects.list b/Debug/objects.list index cbe92b2..0d64c74 100644 --- a/Debug/objects.list +++ b/Debug/objects.list @@ -6,6 +6,8 @@ "./Core/Src/system_stm32f0xx.o" "./Core/Startup/startup_stm32f030f4px.o" "./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.o" +"./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.o" "./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.o" "./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.o" "./Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.o" diff --git a/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h b/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h new file mode 100644 index 0000000..31771b1 --- /dev/null +++ b/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h @@ -0,0 +1,1019 @@ +/** + ****************************************************************************** + * @file stm32f0xx_hal_adc.h + * @author MCD Application Team + * @brief Header file containing functions prototypes of ADC HAL library. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2016 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32F0xx_HAL_ADC_H +#define STM32F0xx_HAL_ADC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f0xx_hal_def.h" + +/** @addtogroup STM32F0xx_HAL_Driver + * @{ + */ + +/** @addtogroup ADC + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ +/** @defgroup ADC_Exported_Types ADC Exported Types + * @{ + */ + +/** + * @brief Structure definition of ADC initialization and regular group + * @note The setting of these parameters with function HAL_ADC_Init() is conditioned to ADC state. + * ADC state can be either: + * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ClockPrescaler') + * - For all parameters except 'ClockPrescaler' and 'resolution': ADC enabled without conversion on going on regular group. + * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed + * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly). + */ +typedef struct +{ + uint32_t ClockPrescaler; /*!< Select ADC clock source (synchronous clock derived from APB clock or asynchronous clock derived from ADC dedicated HSI RC oscillator 14MHz) and clock prescaler. + This parameter can be a value of @ref ADC_ClockPrescaler + Note: In case of usage of the ADC dedicated HSI RC oscillator, it must be preliminarily enabled at RCC top level. + Note: This parameter can be modified only if the ADC is disabled */ + uint32_t Resolution; /*!< Configures the ADC resolution. + This parameter can be a value of @ref ADC_Resolution */ + uint32_t DataAlign; /*!< Specifies whether the ADC data alignment is left or right. + This parameter can be a value of @ref ADC_Data_align */ + uint32_t ScanConvMode; /*!< Configures the sequencer of regular group. + This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts. + Sequencer is automatically enabled if several channels are set (sequencer cannot be disabled, as it can be the case on other STM32 devices): + If only 1 channel is set: Conversion is performed in single mode. + If several channels are set: Conversions are performed in sequence mode (ranks defined by each channel number: channel 0 fixed on rank 0, channel 1 fixed on rank1, ...). + Scan direction can be set to forward (from channel 0 to channel 18) or backward (from channel 18 to channel 0). + This parameter can be a value of @ref ADC_Scan_mode */ + uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion by polling and interruption: end of conversion of each rank or complete sequence. + This parameter can be a value of @ref ADC_EOCSelection. */ + FunctionalState LowPowerAutoWait; /*!< Selects the dynamic low power Auto Delay: new conversion start only when the previous + conversion (for regular group) has been treated by user software, using function HAL_ADC_GetValue(). + This feature automatically adapts the ADC conversions trigs to the speed of the system that reads the data. Moreover, this avoids risk of overrun for low frequency applications. + This parameter can be set to ENABLE or DISABLE. + Note: Do not use with interruption or DMA (HAL_ADC_Start_IT(), HAL_ADC_Start_DMA()) since they have to clear immediately the EOC flag to free the IRQ vector sequencer. + Do use with polling: 1. Start conversion with HAL_ADC_Start(), 2. Later on, when conversion data is needed: use HAL_ADC_PollForConversion() to ensure that conversion is completed + and use HAL_ADC_GetValue() to retrieve conversion result and trig another conversion. */ + FunctionalState LowPowerAutoPowerOff; /*!< Selects the auto-off mode: the ADC automatically powers-off after a conversion and automatically wakes-up when a new conversion is triggered (with startup time between trigger and start of sampling). + This feature can be combined with automatic wait mode (parameter 'LowPowerAutoWait'). + This parameter can be set to ENABLE or DISABLE. + Note: If enabled, this feature also turns off the ADC dedicated 14 MHz RC oscillator (HSI14) */ + FunctionalState ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group, + after the selected trigger occurred (software start or external trigger). + This parameter can be set to ENABLE or DISABLE. */ + FunctionalState DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts). + Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded. + Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded. + This parameter can be set to ENABLE or DISABLE + Note: Number of discontinuous ranks increment is fixed to one-by-one. */ + uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group. + If set to ADC_SOFTWARE_START, external triggers are disabled. + This parameter can be a value of @ref ADC_External_trigger_source_Regular */ + uint32_t ExternalTrigConvEdge; /*!< Selects the external trigger edge of regular group. + If trigger is set to ADC_SOFTWARE_START, this parameter is discarded. + This parameter can be a value of @ref ADC_External_trigger_edge_Regular */ + FunctionalState DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached) + or in Continuous mode (DMA transfer unlimited, whatever number of conversions). + Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached. + This parameter can be set to ENABLE or DISABLE. */ + uint32_t Overrun; /*!< Select the behaviour in case of overrun: data preserved or overwritten + This parameter has an effect on regular group only, including in DMA mode. + This parameter can be a value of @ref ADC_Overrun */ + uint32_t SamplingTimeCommon; /*!< Sampling time value to be set for the selected channel. + Unit: ADC clock cycles + Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits, 8.5 cycles at 8 bits, 6.5 cycles at 6 bits). + Note: On STM32F0 devices, the sampling time setting is common to all channels. On some other STM32 devices, this parameter in channel wise and is located into ADC channel initialization structure. + This parameter can be a value of @ref ADC_sampling_times + Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor), + sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting) + Refer to device datasheet for timings values, parameters TS_vrefint, TS_vbat, TS_temp (values rough order: 5us to 17us). */ +}ADC_InitTypeDef; + +/** + * @brief Structure definition of ADC channel for regular group + * @note The setting of these parameters with function HAL_ADC_ConfigChannel() is conditioned to ADC state. + * ADC state can be either: + * - For all parameters: ADC disabled or enabled without conversion on going on regular group. + * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed + * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly). + */ +typedef struct +{ + uint32_t Channel; /*!< Specifies the channel to configure into ADC regular group. + This parameter can be a value of @ref ADC_channels + Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */ + uint32_t Rank; /*!< Add or remove the channel from ADC regular group sequencer. + On STM32F0 devices, number of ranks in the sequence is defined by number of channels enabled, rank of each channel is defined by channel number (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).. + Despite the channel rank is fixed, this parameter allow an additional possibility: to remove the selected rank (selected channel) from sequencer. + This parameter can be a value of @ref ADC_rank */ + uint32_t SamplingTime; /*!< Sampling time value to be set for the selected channel. + Unit: ADC clock cycles + Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits, 8.5 cycles at 8 bits, 6.5 cycles at 6 bits). + This parameter can be a value of @ref ADC_sampling_times + Caution: this setting impacts the entire regular group. Therefore, call of HAL_ADC_ConfigChannel() to configure a channel can impact the configuration of other channels previously set. + Caution: Obsolete parameter. Use parameter "SamplingTimeCommon" in ADC initialization structure. + If parameter "SamplingTimeCommon" is set to a valid sampling time, parameter "SamplingTime" is discarded. + Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor), + sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting) + Refer to device datasheet for timings values, parameters TS_vrefint, TS_vbat, TS_temp (values rough order: 5us to 17us). */ +}ADC_ChannelConfTypeDef; + +/** + * @brief Structure definition of ADC analog watchdog + * @note The setting of these parameters with function HAL_ADC_AnalogWDGConfig() is conditioned to ADC state. + * ADC state can be either: ADC disabled or ADC enabled without conversion on going on regular group. + */ +typedef struct +{ + uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode: single/all/none channels. + This parameter can be a value of @ref ADC_analog_watchdog_mode. */ + uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog. + This parameter has an effect only if parameter 'WatchdogMode' is configured on single channel. Only 1 channel can be monitored. + This parameter can be a value of @ref ADC_channels. */ + FunctionalState ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode. + This parameter can be set to ENABLE or DISABLE */ + uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value. + Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */ + uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value. + Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */ +}ADC_AnalogWDGConfTypeDef; + +/** + * @brief HAL ADC state machine: ADC states definition (bitfields) + * @note ADC state machine is managed by bitfields, state must be compared + * with bit by bit. + * For example: + * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) " + * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1) ) " + */ +/* States of ADC global scope */ +#define HAL_ADC_STATE_RESET (0x00000000U) /*!< ADC not yet initialized or disabled */ +#define HAL_ADC_STATE_READY (0x00000001U) /*!< ADC peripheral ready for use */ +#define HAL_ADC_STATE_BUSY_INTERNAL (0x00000002U) /*!< ADC is busy to internal process (initialization, calibration) */ +#define HAL_ADC_STATE_TIMEOUT (0x00000004U) /*!< TimeOut occurrence */ + +/* States of ADC errors */ +#define HAL_ADC_STATE_ERROR_INTERNAL (0x00000010U) /*!< Internal error occurrence */ +#define HAL_ADC_STATE_ERROR_CONFIG (0x00000020U) /*!< Configuration error occurrence */ +#define HAL_ADC_STATE_ERROR_DMA (0x00000040U) /*!< DMA error occurrence */ + +/* States of ADC group regular */ +#define HAL_ADC_STATE_REG_BUSY (0x00000100U) /*!< A conversion on group regular is ongoing or can occur (either by continuous mode, + external trigger, low power auto power-on, multimode ADC master control) */ +#define HAL_ADC_STATE_REG_EOC (0x00000200U) /*!< Conversion data available on group regular */ +#define HAL_ADC_STATE_REG_OVR (0x00000400U) /*!< Overrun occurrence */ +#define HAL_ADC_STATE_REG_EOSMP (0x00000800U) /*!< Not available on STM32F0 device: End Of Sampling flag raised */ + +/* States of ADC group injected */ +#define HAL_ADC_STATE_INJ_BUSY (0x00001000U) /*!< Not available on STM32F0 device: A conversion on group injected is ongoing or can occur (either by auto-injection mode, + external trigger, low power auto power-on, multimode ADC master control) */ +#define HAL_ADC_STATE_INJ_EOC (0x00002000U) /*!< Not available on STM32F0 device: Conversion data available on group injected */ +#define HAL_ADC_STATE_INJ_JQOVF (0x00004000U) /*!< Not available on STM32F0 device: Not available on STM32F0 device: Injected queue overflow occurrence */ + +/* States of ADC analog watchdogs */ +#define HAL_ADC_STATE_AWD1 (0x00010000U) /*!< Out-of-window occurrence of analog watchdog 1 */ +#define HAL_ADC_STATE_AWD2 (0x00020000U) /*!< Not available on STM32F0 device: Out-of-window occurrence of analog watchdog 2 */ +#define HAL_ADC_STATE_AWD3 (0x00040000U) /*!< Not available on STM32F0 device: Out-of-window occurrence of analog watchdog 3 */ + +/* States of ADC multi-mode */ +#define HAL_ADC_STATE_MULTIMODE_SLAVE (0x00100000U) /*!< Not available on STM32F0 device: ADC in multimode slave state, controlled by another ADC master ( */ + + +/** + * @brief ADC handle Structure definition + */ +typedef struct __ADC_HandleTypeDef +{ + ADC_TypeDef *Instance; /*!< Register base address */ + + ADC_InitTypeDef Init; /*!< ADC required parameters */ + + DMA_HandleTypeDef *DMA_Handle; /*!< Pointer DMA Handler */ + + HAL_LockTypeDef Lock; /*!< ADC locking object */ + + __IO uint32_t State; /*!< ADC communication state (bitmap of ADC states) */ + + __IO uint32_t ErrorCode; /*!< ADC Error code */ + + +#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + void (* ConvCpltCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC conversion complete callback */ + void (* ConvHalfCpltCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC conversion DMA half-transfer callback */ + void (* LevelOutOfWindowCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC analog watchdog 1 callback */ + void (* ErrorCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC error callback */ + void (* MspInitCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC Msp Init callback */ + void (* MspDeInitCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC Msp DeInit callback */ +#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +}ADC_HandleTypeDef; + +#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +/** + * @brief HAL ADC Callback ID enumeration definition + */ +typedef enum +{ + HAL_ADC_CONVERSION_COMPLETE_CB_ID = 0x00U, /*!< ADC conversion complete callback ID */ + HAL_ADC_CONVERSION_HALF_CB_ID = 0x01U, /*!< ADC conversion DMA half-transfer callback ID */ + HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID = 0x02U, /*!< ADC analog watchdog 1 callback ID */ + HAL_ADC_ERROR_CB_ID = 0x03U, /*!< ADC error callback ID */ + HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID = 0x04U, /*!< ADC group injected conversion complete callback ID */ + HAL_ADC_MSPINIT_CB_ID = 0x09U, /*!< ADC Msp Init callback ID */ + HAL_ADC_MSPDEINIT_CB_ID = 0x0AU /*!< ADC Msp DeInit callback ID */ +} HAL_ADC_CallbackIDTypeDef; + +/** + * @brief HAL ADC Callback pointer definition + */ +typedef void (*pADC_CallbackTypeDef)(ADC_HandleTypeDef *hadc); /*!< pointer to a ADC callback function */ + +#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + +/** + * @} + */ + + + +/* Exported constants --------------------------------------------------------*/ + +/** @defgroup ADC_Exported_Constants ADC Exported Constants + * @{ + */ + +/** @defgroup ADC_Error_Code ADC Error Code + * @{ + */ +#define HAL_ADC_ERROR_NONE (0x00U) /*!< No error */ +#define HAL_ADC_ERROR_INTERNAL (0x01U) /*!< ADC IP internal error: if problem of clocking, + enable/disable, erroneous state */ +#define HAL_ADC_ERROR_OVR (0x02U) /*!< Overrun error */ +#define HAL_ADC_ERROR_DMA (0x04U) /*!< DMA transfer error */ + +#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +#define HAL_ADC_ERROR_INVALID_CALLBACK (0x10U) /*!< Invalid Callback error */ +#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + +/** + * @} + */ + +/** @defgroup ADC_ClockPrescaler ADC ClockPrescaler + * @{ + */ +#define ADC_CLOCK_ASYNC_DIV1 (0x00000000U) /*!< ADC asynchronous clock derived from ADC dedicated HSI */ + +#define ADC_CLOCK_SYNC_PCLK_DIV2 ((uint32_t)ADC_CFGR2_CKMODE_0) /*!< ADC synchronous clock derived from AHB clock divided by a prescaler of 2 */ +#define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CFGR2_CKMODE_1) /*!< ADC synchronous clock derived from AHB clock divided by a prescaler of 4 */ + +/** + * @} + */ + +/** @defgroup ADC_Resolution ADC Resolution + * @{ + */ +#define ADC_RESOLUTION_12B (0x00000000U) /*!< ADC 12-bit resolution */ +#define ADC_RESOLUTION_10B ((uint32_t)ADC_CFGR1_RES_0) /*!< ADC 10-bit resolution */ +#define ADC_RESOLUTION_8B ((uint32_t)ADC_CFGR1_RES_1) /*!< ADC 8-bit resolution */ +#define ADC_RESOLUTION_6B ((uint32_t)ADC_CFGR1_RES) /*!< ADC 6-bit resolution */ +/** + * @} + */ + +/** @defgroup ADC_Data_align ADC Data_align + * @{ + */ +#define ADC_DATAALIGN_RIGHT (0x00000000U) +#define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CFGR1_ALIGN) +/** + * @} + */ + +/** @defgroup ADC_Scan_mode ADC Scan mode + * @{ + */ +/* Note: Scan mode values must be compatible with other STM32 devices having */ +/* a configurable sequencer. */ +/* Scan direction setting values are defined by taking in account */ +/* already defined values for other STM32 devices: */ +/* ADC_SCAN_DISABLE (0x00000000U) */ +/* ADC_SCAN_ENABLE (0x00000001U) */ +/* Scan direction forward is considered as default setting equivalent */ +/* to scan enable. */ +/* Scan direction backward is considered as additional setting. */ +/* In case of migration from another STM32 device, the user will be */ +/* warned of change of setting choices with assert check. */ +#define ADC_SCAN_DIRECTION_FORWARD (0x00000001U) /*!< Scan direction forward: from channel 0 to channel 18 */ +#define ADC_SCAN_DIRECTION_BACKWARD (0x00000002U) /*!< Scan direction backward: from channel 18 to channel 0 */ + +#define ADC_SCAN_ENABLE ADC_SCAN_DIRECTION_FORWARD /* For compatibility with other STM32 devices */ + +/** + * @} + */ + +/** @defgroup ADC_External_trigger_edge_Regular ADC External trigger edge Regular + * @{ + */ +#define ADC_EXTERNALTRIGCONVEDGE_NONE (0x00000000U) +#define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CFGR1_EXTEN_0) +#define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CFGR1_EXTEN_1) +#define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CFGR1_EXTEN) +/** + * @} + */ + +/** @defgroup ADC_EOCSelection ADC EOCSelection + * @{ + */ +#define ADC_EOC_SINGLE_CONV ((uint32_t) ADC_ISR_EOC) +#define ADC_EOC_SEQ_CONV ((uint32_t) ADC_ISR_EOS) +/** + * @} + */ + +/** @defgroup ADC_Overrun ADC Overrun + * @{ + */ +#define ADC_OVR_DATA_OVERWRITTEN (0x00000000U) +#define ADC_OVR_DATA_PRESERVED (0x00000001U) +/** + * @} + */ + +/** @defgroup ADC_rank ADC rank + * @{ + */ +#define ADC_RANK_CHANNEL_NUMBER (0x00001000U) /*!< Enable the rank of the selected channels. Number of ranks in the sequence is defined by number of channels enabled, rank of each channel is defined by channel number (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...) */ +#define ADC_RANK_NONE (0x00001001U) /*!< Disable the selected rank (selected channel) from sequencer */ +/** + * @} + */ + +/** @defgroup ADC_sampling_times ADC sampling times + * @{ + */ +/* Note: Parameter "ADC_SAMPLETIME_1CYCLE_5" defined with a dummy bit */ +/* to distinguish this parameter versus reset value 0x00000000, */ +/* in the context of management of parameters "SamplingTimeCommon" */ +/* and "SamplingTime" (obsolete)). */ +#define ADC_SAMPLETIME_1CYCLE_5 (0x10000000U) /*!< Sampling time 1.5 ADC clock cycle */ +#define ADC_SAMPLETIME_7CYCLES_5 ((uint32_t) ADC_SMPR_SMP_0) /*!< Sampling time 7.5 ADC clock cycles */ +#define ADC_SAMPLETIME_13CYCLES_5 ((uint32_t) ADC_SMPR_SMP_1) /*!< Sampling time 13.5 ADC clock cycles */ +#define ADC_SAMPLETIME_28CYCLES_5 ((uint32_t)(ADC_SMPR_SMP_1 | ADC_SMPR_SMP_0)) /*!< Sampling time 28.5 ADC clock cycles */ +#define ADC_SAMPLETIME_41CYCLES_5 ((uint32_t) ADC_SMPR_SMP_2) /*!< Sampling time 41.5 ADC clock cycles */ +#define ADC_SAMPLETIME_55CYCLES_5 ((uint32_t)(ADC_SMPR_SMP_2 | ADC_SMPR_SMP_0)) /*!< Sampling time 55.5 ADC clock cycles */ +#define ADC_SAMPLETIME_71CYCLES_5 ((uint32_t)(ADC_SMPR_SMP_2 | ADC_SMPR_SMP_1)) /*!< Sampling time 71.5 ADC clock cycles */ +#define ADC_SAMPLETIME_239CYCLES_5 ((uint32_t) ADC_SMPR_SMP) /*!< Sampling time 239.5 ADC clock cycles */ +/** + * @} + */ + +/** @defgroup ADC_analog_watchdog_mode ADC analog watchdog mode + * @{ + */ +#define ADC_ANALOGWATCHDOG_NONE ( 0x00000000U) +#define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CFGR1_AWDSGL | ADC_CFGR1_AWDEN)) +#define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t) ADC_CFGR1_AWDEN) +/** + * @} + */ + +/** @defgroup ADC_Event_type ADC Event type + * @{ + */ +#define ADC_AWD_EVENT ((uint32_t)ADC_FLAG_AWD) /*!< ADC Analog watchdog 1 event */ +#define ADC_OVR_EVENT ((uint32_t)ADC_FLAG_OVR) /*!< ADC overrun event */ +/** + * @} + */ + +/** @defgroup ADC_interrupts_definition ADC interrupts definition + * @{ + */ +#define ADC_IT_AWD ADC_IER_AWDIE /*!< ADC Analog watchdog interrupt source */ +#define ADC_IT_OVR ADC_IER_OVRIE /*!< ADC overrun interrupt source */ +#define ADC_IT_EOS ADC_IER_EOSEQIE /*!< ADC End of Regular sequence of Conversions interrupt source */ +#define ADC_IT_EOC ADC_IER_EOCIE /*!< ADC End of Regular Conversion interrupt source */ +#define ADC_IT_EOSMP ADC_IER_EOSMPIE /*!< ADC End of Sampling interrupt source */ +#define ADC_IT_RDY ADC_IER_ADRDYIE /*!< ADC Ready interrupt source */ +/** + * @} + */ + +/** @defgroup ADC_flags_definition ADC flags definition + * @{ + */ +#define ADC_FLAG_AWD ADC_ISR_AWD /*!< ADC Analog watchdog flag */ +#define ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC overrun flag */ +#define ADC_FLAG_EOS ADC_ISR_EOSEQ /*!< ADC End of Regular sequence of Conversions flag */ +#define ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC End of Regular Conversion flag */ +#define ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC End of Sampling flag */ +#define ADC_FLAG_RDY ADC_ISR_ADRDY /*!< ADC Ready flag */ +/** + * @} + */ + +/** + * @} + */ + + +/* Private constants ---------------------------------------------------------*/ + +/** @addtogroup ADC_Private_Constants ADC Private Constants + * @{ + */ + +/** @defgroup ADC_Internal_HAL_driver_Ext_trig_src_Regular ADC Internal HAL driver Ext trig src Regular + * @{ + */ + +/* List of external triggers of regular group for ADC1: */ +/* (used internally by HAL driver. To not use into HAL structure parameters) */ +#define ADC1_2_EXTERNALTRIG_T1_TRGO (0x00000000U) +#define ADC1_2_EXTERNALTRIG_T1_CC4 ((uint32_t)ADC_CFGR1_EXTSEL_0) +#define ADC1_2_EXTERNALTRIG_T2_TRGO ((uint32_t)ADC_CFGR1_EXTSEL_1) +#define ADC1_2_EXTERNALTRIG_T3_TRGO ((uint32_t)(ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0)) +#define ADC1_2_EXTERNALTRIG_T15_TRGO ((uint32_t)ADC_CFGR1_EXTSEL_2) +/** + * @} + */ + +/* Combination of all post-conversion flags bits: EOC/EOS, OVR, AWD */ +#define ADC_FLAG_POSTCONV_ALL (ADC_FLAG_AWD | ADC_FLAG_OVR | ADC_FLAG_EOS | ADC_FLAG_EOC) + +/** + * @} + */ + + +/* Exported macro ------------------------------------------------------------*/ + +/** @defgroup ADC_Exported_Macros ADC Exported Macros + * @{ + */ +/* Macro for internal HAL driver usage, and possibly can be used into code of */ +/* final user. */ + +/** + * @brief Enable the ADC peripheral + * @param __HANDLE__ ADC handle + * @retval None + */ +#define __HAL_ADC_ENABLE(__HANDLE__) \ + ((__HANDLE__)->Instance->CR |= ADC_CR_ADEN) + +/** + * @brief Disable the ADC peripheral + * @param __HANDLE__ ADC handle + * @retval None + */ +#define __HAL_ADC_DISABLE(__HANDLE__) \ + do{ \ + (__HANDLE__)->Instance->CR |= ADC_CR_ADDIS; \ + __HAL_ADC_CLEAR_FLAG((__HANDLE__), (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); \ + } while(0) + +/** + * @brief Enable the ADC end of conversion interrupt. + * @param __HANDLE__ ADC handle + * @param __INTERRUPT__ ADC Interrupt + * This parameter can be any combination of the following values: + * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source + * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source + * @arg ADC_IT_AWD: ADC Analog watchdog interrupt source + * @arg ADC_IT_OVR: ADC overrun interrupt source + * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source + * @arg ADC_IT_RDY: ADC Ready interrupt source + * @retval None + */ +#define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ + (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) + +/** + * @brief Disable the ADC end of conversion interrupt. + * @param __HANDLE__ ADC handle + * @param __INTERRUPT__ ADC Interrupt + * This parameter can be any combination of the following values: + * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source + * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source + * @arg ADC_IT_AWD: ADC Analog watchdog interrupt source + * @arg ADC_IT_OVR: ADC overrun interrupt source + * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source + * @arg ADC_IT_RDY: ADC Ready interrupt source + * @retval None + */ +#define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ + (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) + +/** @brief Checks if the specified ADC interrupt source is enabled or disabled. + * @param __HANDLE__ ADC handle + * @param __INTERRUPT__ ADC interrupt source to check + * This parameter can be any combination of the following values: + * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source + * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source + * @arg ADC_IT_AWD: ADC Analog watchdog interrupt source + * @arg ADC_IT_OVR: ADC overrun interrupt source + * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source + * @arg ADC_IT_RDY: ADC Ready interrupt source + * @retval State ofinterruption (SET or RESET) + */ +#define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ + (((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) + +/** + * @brief Get the selected ADC's flag status. + * @param __HANDLE__ ADC handle + * @param __FLAG__ ADC flag + * This parameter can be any combination of the following values: + * @arg ADC_FLAG_EOC: ADC End of Regular conversion flag + * @arg ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag + * @arg ADC_FLAG_AWD: ADC Analog watchdog flag + * @arg ADC_FLAG_OVR: ADC overrun flag + * @arg ADC_FLAG_EOSMP: ADC End of Sampling flag + * @arg ADC_FLAG_RDY: ADC Ready flag + * @retval None + */ +#define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) \ + ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) + +/** + * @brief Clear the ADC's pending flags + * @param __HANDLE__ ADC handle + * @param __FLAG__ ADC flag + * This parameter can be any combination of the following values: + * @arg ADC_FLAG_EOC: ADC End of Regular conversion flag + * @arg ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag + * @arg ADC_FLAG_AWD: ADC Analog watchdog flag + * @arg ADC_FLAG_OVR: ADC overrun flag + * @arg ADC_FLAG_EOSMP: ADC End of Sampling flag + * @arg ADC_FLAG_RDY: ADC Ready flag + * @retval None + */ +/* Note: bit cleared bit by writing 1 (writing 0 has no effect on any bit of register ISR) */ +#define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) \ + (((__HANDLE__)->Instance->ISR) = (__FLAG__)) + +/** @brief Reset ADC handle state + * @param __HANDLE__ ADC handle + * @retval None + */ +#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) \ + do{ \ + (__HANDLE__)->State = HAL_ADC_STATE_RESET; \ + (__HANDLE__)->MspInitCallback = NULL; \ + (__HANDLE__)->MspDeInitCallback = NULL; \ + } while(0) +#else +#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) \ + ((__HANDLE__)->State = HAL_ADC_STATE_RESET) +#endif + +/** + * @} + */ + + +/* Private macro -------------------------------------------------------------*/ + +/** @defgroup ADC_Private_Macros ADC Private Macros + * @{ + */ +/* Macro reserved for internal HAL driver usage, not intended to be used in */ +/* code of final user. */ + + +/** + * @brief Verification of hardware constraints before ADC can be enabled + * @param __HANDLE__ ADC handle + * @retval SET (ADC can be enabled) or RESET (ADC cannot be enabled) + */ +#define ADC_ENABLING_CONDITIONS(__HANDLE__) \ + (( ( ((__HANDLE__)->Instance->CR) & \ + (ADC_CR_ADCAL | ADC_CR_ADSTP | ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN) \ + ) == RESET \ + ) ? SET : RESET) + +/** + * @brief Verification of hardware constraints before ADC can be disabled + * @param __HANDLE__ ADC handle + * @retval SET (ADC can be disabled) or RESET (ADC cannot be disabled) + */ +#define ADC_DISABLING_CONDITIONS(__HANDLE__) \ + (( ( ((__HANDLE__)->Instance->CR) & \ + (ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN \ + ) ? SET : RESET) + +/** + * @brief Verification of ADC state: enabled or disabled + * @param __HANDLE__ ADC handle + * @retval SET (ADC enabled) or RESET (ADC disabled) + */ +/* Note: If low power mode AutoPowerOff is enabled, power-on/off phases are */ +/* performed automatically by hardware and flag ADC_FLAG_RDY is not */ +/* set. */ +#define ADC_IS_ENABLE(__HANDLE__) \ + (( ((((__HANDLE__)->Instance->CR) & (ADC_CR_ADEN | ADC_CR_ADDIS)) == ADC_CR_ADEN) && \ + (((((__HANDLE__)->Instance->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY) || \ + ((((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_AUTOFF) == ADC_CFGR1_AUTOFF) ) \ + ) ? SET : RESET) + +/** + * @brief Test if conversion trigger of regular group is software start + * or external trigger. + * @param __HANDLE__ ADC handle + * @retval SET (software start) or RESET (external trigger) + */ +#define ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__) \ + (((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_EXTEN) == RESET) + +/** + * @brief Check if no conversion on going on regular group + * @param __HANDLE__ ADC handle + * @retval SET (conversion is on going) or RESET (no conversion is on going) + */ +#define ADC_IS_CONVERSION_ONGOING_REGULAR(__HANDLE__) \ + (( (((__HANDLE__)->Instance->CR) & ADC_CR_ADSTART) == RESET \ + ) ? RESET : SET) + +/** + * @brief Returns resolution bits in CFGR1 register: RES[1:0]. + * Returned value is among parameters to @ref ADC_Resolution. + * @param __HANDLE__ ADC handle + * @retval None + */ +#define ADC_GET_RESOLUTION(__HANDLE__) \ + (((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_RES) + +/** + * @brief Returns ADC sample time bits in SMPR register: SMP[2:0]. + * Returned value is among parameters to @ref ADC_Resolution. + * @param __HANDLE__ ADC handle + * @retval None + */ +#define ADC_GET_SAMPLINGTIME(__HANDLE__) \ + (((__HANDLE__)->Instance->SMPR) & ADC_SMPR_SMP) + +/** + * @brief Simultaneously clears and sets specific bits of the handle State + * @note: ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(), + * the first parameter is the ADC handle State, the second parameter is the + * bit field to clear, the third and last parameter is the bit field to set. + * @retval None + */ +#define ADC_STATE_CLR_SET MODIFY_REG + +/** + * @brief Clear ADC error code (set it to error code: "no error") + * @param __HANDLE__ ADC handle + * @retval None + */ +#define ADC_CLEAR_ERRORCODE(__HANDLE__) \ + ((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE) + + +/** + * @brief Configure the channel number into channel selection register + * @param _CHANNEL_ ADC Channel + * @retval None + */ +/* This function converts ADC channels from numbers (see defgroup ADC_channels) + to bitfields, to get the equivalence of CMSIS channels: + ADC_CHANNEL_0 ((uint32_t) ADC_CHSELR_CHSEL0) + ADC_CHANNEL_1 ((uint32_t) ADC_CHSELR_CHSEL1) + ADC_CHANNEL_2 ((uint32_t) ADC_CHSELR_CHSEL2) + ADC_CHANNEL_3 ((uint32_t) ADC_CHSELR_CHSEL3) + ADC_CHANNEL_4 ((uint32_t) ADC_CHSELR_CHSEL4) + ADC_CHANNEL_5 ((uint32_t) ADC_CHSELR_CHSEL5) + ADC_CHANNEL_6 ((uint32_t) ADC_CHSELR_CHSEL6) + ADC_CHANNEL_7 ((uint32_t) ADC_CHSELR_CHSEL7) + ADC_CHANNEL_8 ((uint32_t) ADC_CHSELR_CHSEL8) + ADC_CHANNEL_9 ((uint32_t) ADC_CHSELR_CHSEL9) + ADC_CHANNEL_10 ((uint32_t) ADC_CHSELR_CHSEL10) + ADC_CHANNEL_11 ((uint32_t) ADC_CHSELR_CHSEL11) + ADC_CHANNEL_12 ((uint32_t) ADC_CHSELR_CHSEL12) + ADC_CHANNEL_13 ((uint32_t) ADC_CHSELR_CHSEL13) + ADC_CHANNEL_14 ((uint32_t) ADC_CHSELR_CHSEL14) + ADC_CHANNEL_15 ((uint32_t) ADC_CHSELR_CHSEL15) + ADC_CHANNEL_16 ((uint32_t) ADC_CHSELR_CHSEL16) + ADC_CHANNEL_17 ((uint32_t) ADC_CHSELR_CHSEL17) + ADC_CHANNEL_18 ((uint32_t) ADC_CHSELR_CHSEL18) +*/ +#define ADC_CHSELR_CHANNEL(_CHANNEL_) \ + ( 1U << (_CHANNEL_)) + +/** + * @brief Set the ADC's sample time + * @param _SAMPLETIME_ Sample time parameter. + * @retval None + */ +/* Note: ADC sampling time set using mask ADC_SMPR_SMP due to parameter */ +/* "ADC_SAMPLETIME_1CYCLE_5" defined with a dummy bit (bit used to */ +/* distinguish this parameter versus reset value 0x00000000, */ +/* in the context of management of parameters "SamplingTimeCommon" */ +/* and "SamplingTime" (obsolete)). */ +#define ADC_SMPR_SET(_SAMPLETIME_) \ + ((_SAMPLETIME_) & (ADC_SMPR_SMP)) + +/** + * @brief Set the Analog Watchdog 1 channel. + * @param _CHANNEL_ channel to be monitored by Analog Watchdog 1. + * @retval None + */ +#define ADC_CFGR_AWDCH(_CHANNEL_) \ + ((_CHANNEL_) << 26U) + +/** + * @brief Enable ADC discontinuous conversion mode for regular group + * @param _REG_DISCONTINUOUS_MODE_ Regular discontinuous mode. + * @retval None + */ +#define ADC_CFGR1_REG_DISCCONTINUOUS(_REG_DISCONTINUOUS_MODE_) \ + ((_REG_DISCONTINUOUS_MODE_) << 16U) + +/** + * @brief Enable the ADC auto off mode. + * @param _AUTOOFF_ Auto off bit enable or disable. + * @retval None + */ +#define ADC_CFGR1_AUTOOFF(_AUTOOFF_) \ + ((_AUTOOFF_) << 15U) + +/** + * @brief Enable the ADC auto delay mode. + * @param _AUTOWAIT_ Auto delay bit enable or disable. + * @retval None + */ +#define ADC_CFGR1_AUTOWAIT(_AUTOWAIT_) \ + ((_AUTOWAIT_) << 14U) + +/** + * @brief Enable ADC continuous conversion mode. + * @param _CONTINUOUS_MODE_ Continuous mode. + * @retval None + */ +#define ADC_CFGR1_CONTINUOUS(_CONTINUOUS_MODE_) \ + ((_CONTINUOUS_MODE_) << 13U) + +/** + * @brief Enable ADC overrun mode. + * @param _OVERRUN_MODE_ Overrun mode. + * @retval Overun bit setting to be programmed into CFGR register + */ +/* Note: Bit ADC_CFGR1_OVRMOD not used directly in constant */ +/* "ADC_OVR_DATA_OVERWRITTEN" to have this case defined to 0x00, to set it */ +/* as the default case to be compliant with other STM32 devices. */ +#define ADC_CFGR1_OVERRUN(_OVERRUN_MODE_) \ + ( ( (_OVERRUN_MODE_) != (ADC_OVR_DATA_PRESERVED) \ + )? (ADC_CFGR1_OVRMOD) : (0x00000000) \ + ) + +/** + * @brief Enable ADC scan mode to convert multiple ranks with sequencer. + * @param _SCAN_MODE_ Scan conversion mode. + * @retval None + */ +/* Note: Scan mode set using this macro (instead of parameter direct set) */ +/* due to different modes on other STM32 devices: to avoid any */ +/* unwanted setting, the exact parameter corresponding to the device */ +/* must be passed to this macro. */ +#define ADC_SCANDIR(_SCAN_MODE_) \ + ( ( (_SCAN_MODE_) == (ADC_SCAN_DIRECTION_BACKWARD) \ + )? (ADC_CFGR1_SCANDIR) : (0x00000000) \ + ) + +/** + * @brief Enable the ADC DMA continuous request. + * @param _DMACONTREQ_MODE_ DMA continuous request mode. + * @retval None + */ +#define ADC_CFGR1_DMACONTREQ(_DMACONTREQ_MODE_) \ + ((_DMACONTREQ_MODE_) << 1U) + +/** + * @brief Configure the analog watchdog high threshold into register TR. + * @param _Threshold_ Threshold value + * @retval None + */ +#define ADC_TRX_HIGHTHRESHOLD(_Threshold_) \ + ((_Threshold_) << 16U) + +/** + * @brief Shift the AWD threshold in function of the selected ADC resolution. + * Thresholds have to be left-aligned on bit 11, the LSB (right bits) are set to 0. + * If resolution 12 bits, no shift. + * If resolution 10 bits, shift of 2 ranks on the left. + * If resolution 8 bits, shift of 4 ranks on the left. + * If resolution 6 bits, shift of 6 ranks on the left. + * therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2)) + * @param __HANDLE__ ADC handle + * @param _Threshold_ Value to be shifted + * @retval None + */ +#define ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, _Threshold_) \ + ((_Threshold_) << ((((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_RES) >> 3U)*2)) + + +#define IS_ADC_CLOCKPRESCALER(ADC_CLOCK) (((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1) || \ + ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV2) || \ + ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV4) ) + +#define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_12B) || \ + ((RESOLUTION) == ADC_RESOLUTION_10B) || \ + ((RESOLUTION) == ADC_RESOLUTION_8B) || \ + ((RESOLUTION) == ADC_RESOLUTION_6B) ) + +#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) || \ + ((ALIGN) == ADC_DATAALIGN_LEFT) ) + +#define IS_ADC_SCAN_MODE(SCAN_MODE) (((SCAN_MODE) == ADC_SCAN_DIRECTION_FORWARD) || \ + ((SCAN_MODE) == ADC_SCAN_DIRECTION_BACKWARD) ) + +#define IS_ADC_EXTTRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGCONVEDGE_NONE) || \ + ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISING) || \ + ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_FALLING) || \ + ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING) ) + +#define IS_ADC_EOC_SELECTION(EOC_SELECTION) (((EOC_SELECTION) == ADC_EOC_SINGLE_CONV) || \ + ((EOC_SELECTION) == ADC_EOC_SEQ_CONV) ) + +#define IS_ADC_OVERRUN(OVR) (((OVR) == ADC_OVR_DATA_PRESERVED) || \ + ((OVR) == ADC_OVR_DATA_OVERWRITTEN) ) + +#define IS_ADC_RANK(WATCHDOG) (((WATCHDOG) == ADC_RANK_CHANNEL_NUMBER) || \ + ((WATCHDOG) == ADC_RANK_NONE) ) + +#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_1CYCLE_5) || \ + ((TIME) == ADC_SAMPLETIME_7CYCLES_5) || \ + ((TIME) == ADC_SAMPLETIME_13CYCLES_5) || \ + ((TIME) == ADC_SAMPLETIME_28CYCLES_5) || \ + ((TIME) == ADC_SAMPLETIME_41CYCLES_5) || \ + ((TIME) == ADC_SAMPLETIME_55CYCLES_5) || \ + ((TIME) == ADC_SAMPLETIME_71CYCLES_5) || \ + ((TIME) == ADC_SAMPLETIME_239CYCLES_5) ) + +#define IS_ADC_ANALOG_WATCHDOG_MODE(WATCHDOG) (((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE) || \ + ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \ + ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG) ) + +#define IS_ADC_EVENT_TYPE(EVENT) (((EVENT) == ADC_AWD_EVENT) || \ + ((EVENT) == ADC_OVR_EVENT) ) + +/** @defgroup ADC_range_verification ADC range verification + * in function of ADC resolution selected (12, 10, 8 or 6 bits) + * @{ + */ +#define IS_ADC_RANGE(RESOLUTION, ADC_VALUE) \ + ((((RESOLUTION) == ADC_RESOLUTION_12B) && ((ADC_VALUE) <= (0x0FFFU))) || \ + (((RESOLUTION) == ADC_RESOLUTION_10B) && ((ADC_VALUE) <= (0x03FFU))) || \ + (((RESOLUTION) == ADC_RESOLUTION_8B) && ((ADC_VALUE) <= (0x00FFU))) || \ + (((RESOLUTION) == ADC_RESOLUTION_6B) && ((ADC_VALUE) <= (0x003FU))) ) +/** + * @} + */ + +/** @defgroup ADC_regular_rank_verification ADC regular rank verification + * @{ + */ +#define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= (1U)) && ((RANK) <= (16U))) +/** + * @} + */ + +/** + * @} + */ + +/* Include ADC HAL Extension module */ +#include "stm32f0xx_hal_adc_ex.h" + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup ADC_Exported_Functions + * @{ + */ + +/** @addtogroup ADC_Exported_Functions_Group1 + * @{ + */ + + +/* Initialization and de-initialization functions **********************************/ +HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc); +HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc); +void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc); +void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc); + +#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +/* Callbacks Register/UnRegister functions ***********************************/ +HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID, pADC_CallbackTypeDef pCallback); +HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID); +#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + +/** + * @} + */ + +/* IO operation functions *****************************************************/ + +/** @addtogroup ADC_Exported_Functions_Group2 + * @{ + */ + + +/* Blocking mode: Polling */ +HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc); +HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc); +HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); +HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout); + +/* Non-blocking mode: Interruption */ +HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc); +HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc); + +/* Non-blocking mode: DMA */ +HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length); +HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc); + +/* ADC retrieve conversion value intended to be used with polling or interruption */ +uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc); + +/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */ +void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc); +void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc); +void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc); +void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc); +void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc); +/** + * @} + */ + + +/* Peripheral Control functions ***********************************************/ +/** @addtogroup ADC_Exported_Functions_Group3 + * @{ + */ +HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig); +HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig); +/** + * @} + */ + + +/* Peripheral State functions *************************************************/ +/** @addtogroup ADC_Exported_Functions_Group4 + * @{ + */ +uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc); +uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc); +/** + * @} + */ + + +/** + * @} + */ + + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + + +#endif /* STM32F0xx_HAL_ADC_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h b/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h new file mode 100644 index 0000000..96e74cc --- /dev/null +++ b/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h @@ -0,0 +1,299 @@ +/** + ****************************************************************************** + * @file stm32f0xx_hal_adc_ex.h + * @author MCD Application Team + * @brief Header file of ADC HAL Extension module. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2016 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F0xx_HAL_ADC_EX_H +#define __STM32F0xx_HAL_ADC_EX_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f0xx_hal_def.h" + +/** @addtogroup STM32F0xx_HAL_Driver + * @{ + */ + +/** @addtogroup ADCEx + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/** @defgroup ADC_Exported_Constants ADC Exported Constants + * @{ + */ + +#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) +#define ADC_CCR_ALL (ADC_CCR_VBATEN | ADC_CCR_TSEN | ADC_CCR_VREFEN) +#else +#define ADC_CCR_ALL (ADC_CCR_TSEN | ADC_CCR_VREFEN) +#endif + +/** @defgroup ADC_External_trigger_source_Regular ADC External trigger source Regular + * @{ + */ +/* List of external triggers with generic trigger name, sorted by trigger */ +/* name: */ + +/* External triggers of regular group for ADC1 */ +#define ADC_EXTERNALTRIGCONV_T1_TRGO ADC1_2_EXTERNALTRIG_T1_TRGO +#define ADC_EXTERNALTRIGCONV_T1_CC4 ADC1_2_EXTERNALTRIG_T1_CC4 +#define ADC_EXTERNALTRIGCONV_T3_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO +#define ADC_SOFTWARE_START (ADC_CFGR1_EXTSEL + 1U) + +#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) +#define ADC_EXTERNALTRIGCONV_T2_TRGO ADC1_2_EXTERNALTRIG_T2_TRGO +#endif + +#if !defined(STM32F030x6) && !defined(STM32F070x6) && !defined(STM32F042x6) +#define ADC_EXTERNALTRIGCONV_T15_TRGO ADC1_2_EXTERNALTRIG_T15_TRGO +#endif + +/** + * @} + */ + + +/** @defgroup ADC_channels ADC channels + * @{ + */ +/* Note: Depending on devices, some channels may not be available on package */ +/* pins. Refer to device datasheet for channels availability. */ +/* Note: Channels are used by bitfields for setting of channel selection */ +/* (register ADC_CHSELR) and used by number for setting of analog */ +/* watchdog channel (bits AWDCH in register ADC_CFGR1). */ +/* Channels are defined with decimal numbers and converted them to */ +/* bitfields when needed. */ +#define ADC_CHANNEL_0 ( 0x00000000U) +#define ADC_CHANNEL_1 ( 0x00000001U) +#define ADC_CHANNEL_2 ( 0x00000002U) +#define ADC_CHANNEL_3 ( 0x00000003U) +#define ADC_CHANNEL_4 ( 0x00000004U) +#define ADC_CHANNEL_5 ( 0x00000005U) +#define ADC_CHANNEL_6 ( 0x00000006U) +#define ADC_CHANNEL_7 ( 0x00000007U) +#define ADC_CHANNEL_8 ( 0x00000008U) +#define ADC_CHANNEL_9 ( 0x00000009U) +#define ADC_CHANNEL_10 ( 0x0000000AU) +#define ADC_CHANNEL_11 ( 0x0000000BU) +#define ADC_CHANNEL_12 ( 0x0000000CU) +#define ADC_CHANNEL_13 ( 0x0000000DU) +#define ADC_CHANNEL_14 ( 0x0000000EU) +#define ADC_CHANNEL_15 ( 0x0000000FU) +#define ADC_CHANNEL_16 ( 0x00000010U) +#define ADC_CHANNEL_17 ( 0x00000011U) + +#define ADC_CHANNEL_TEMPSENSOR ADC_CHANNEL_16 +#define ADC_CHANNEL_VREFINT ADC_CHANNEL_17 + +#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) +#define ADC_CHANNEL_18 ( 0x00000012U) +#define ADC_CHANNEL_VBAT ADC_CHANNEL_18 +#endif + +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ + + +/* Private macros ------------------------------------------------------------*/ + +/** @defgroup ADCEx_Private_Macros ADCEx Private Macros + * @{ + */ +/* Macro reserved for internal HAL driver usage, not intended to be used in */ +/* code of final user. */ + +/** + * @brief Test if the selected ADC channel is an internal channel + * VrefInt/TempSensor/Vbat + * Note: On STM32F0, availability of internal channel Vbat depends on + * devices lines. + * @param __CHANNEL__ ADC channel + * @retval None + */ +#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) +#define ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \ + (((__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR) || \ + ((__CHANNEL__) == ADC_CHANNEL_VREFINT) || \ + ((__CHANNEL__) == ADC_CHANNEL_VBAT) \ + ) +#else +#define ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \ + (((__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR) || \ + ((__CHANNEL__) == ADC_CHANNEL_VREFINT) \ + ) +#endif + +/** + * @brief Select the internal measurement path to be enabled/disabled + * corresponding to the selected ADC internal channel + * VrefInt/TempSensor/Vbat. + * Note: On STM32F0, availability of internal channel Vbat depends on + * devices lines. + * @param __CHANNEL__ ADC channel + * @retval Bit of register ADC_CCR + */ +#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) +#define ADC_CHANNEL_INTERNAL_PATH(__CHANNEL__) \ + (( (__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR \ + )? \ + (ADC_CCR_TSEN) \ + : \ + ( \ + ( (__CHANNEL__) == ADC_CHANNEL_VREFINT \ + )? \ + (ADC_CCR_VREFEN) \ + : \ + (ADC_CCR_VBATEN) \ + ) \ + ) +#else +#define ADC_CHANNEL_INTERNAL_PATH(__CHANNEL__) \ + (( (__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR \ + )? \ + (ADC_CCR_TSEN) \ + : \ + (ADC_CCR_VREFEN) \ + ) +#endif + + +#if defined (STM32F030x6) || defined (STM32F070x6) +#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_TRGO) || \ + ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC4) || \ + ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ + ((REGTRIG) == ADC_SOFTWARE_START)) +#elif defined (STM32F042x6) +#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_TRGO) || \ + ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC4) || \ + ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_TRGO) || \ + ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ + ((REGTRIG) == ADC_SOFTWARE_START)) + +#elif defined (STM32F030xC) || defined (STM32F070xB) || defined (STM32F030x8) +#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_TRGO) || \ + ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC4) || \ + ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ + ((REGTRIG) == ADC_EXTERNALTRIGCONV_T15_TRGO) || \ + ((REGTRIG) == ADC_SOFTWARE_START)) +#else +#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_TRGO) || \ + ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC4) || \ + ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_TRGO) || \ + ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ + ((REGTRIG) == ADC_EXTERNALTRIGCONV_T15_TRGO) || \ + ((REGTRIG) == ADC_SOFTWARE_START)) +#endif + +#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) +#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0) || \ + ((CHANNEL) == ADC_CHANNEL_1) || \ + ((CHANNEL) == ADC_CHANNEL_2) || \ + ((CHANNEL) == ADC_CHANNEL_3) || \ + ((CHANNEL) == ADC_CHANNEL_4) || \ + ((CHANNEL) == ADC_CHANNEL_5) || \ + ((CHANNEL) == ADC_CHANNEL_6) || \ + ((CHANNEL) == ADC_CHANNEL_7) || \ + ((CHANNEL) == ADC_CHANNEL_8) || \ + ((CHANNEL) == ADC_CHANNEL_9) || \ + ((CHANNEL) == ADC_CHANNEL_10) || \ + ((CHANNEL) == ADC_CHANNEL_11) || \ + ((CHANNEL) == ADC_CHANNEL_12) || \ + ((CHANNEL) == ADC_CHANNEL_13) || \ + ((CHANNEL) == ADC_CHANNEL_14) || \ + ((CHANNEL) == ADC_CHANNEL_15) || \ + ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR) || \ + ((CHANNEL) == ADC_CHANNEL_VREFINT) || \ + ((CHANNEL) == ADC_CHANNEL_VBAT) ) +#else +#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0) || \ + ((CHANNEL) == ADC_CHANNEL_1) || \ + ((CHANNEL) == ADC_CHANNEL_2) || \ + ((CHANNEL) == ADC_CHANNEL_3) || \ + ((CHANNEL) == ADC_CHANNEL_4) || \ + ((CHANNEL) == ADC_CHANNEL_5) || \ + ((CHANNEL) == ADC_CHANNEL_6) || \ + ((CHANNEL) == ADC_CHANNEL_7) || \ + ((CHANNEL) == ADC_CHANNEL_8) || \ + ((CHANNEL) == ADC_CHANNEL_9) || \ + ((CHANNEL) == ADC_CHANNEL_10) || \ + ((CHANNEL) == ADC_CHANNEL_11) || \ + ((CHANNEL) == ADC_CHANNEL_12) || \ + ((CHANNEL) == ADC_CHANNEL_13) || \ + ((CHANNEL) == ADC_CHANNEL_14) || \ + ((CHANNEL) == ADC_CHANNEL_15) || \ + ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR) || \ + ((CHANNEL) == ADC_CHANNEL_VREFINT) ) +#endif + +/** + * @} + */ + + +/* Exported functions --------------------------------------------------------*/ +/** @addtogroup ADCEx_Exported_Functions + * @{ + */ + +/* IO operation functions *****************************************************/ +/** @addtogroup ADCEx_Exported_Functions_Group1 + * @{ + */ + +/* ADC calibration */ +HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc); +/** + * @} + */ + + +/** + * @} + */ + + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F0xx_HAL_ADC_EX_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c b/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c new file mode 100644 index 0000000..3bcf1c1 --- /dev/null +++ b/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c @@ -0,0 +1,2497 @@ +/** + ****************************************************************************** + * @file stm32f0xx_hal_adc.c + * @author MCD Application Team + * @brief This file provides firmware functions to manage the following + * functionalities of the Analog to Digital Convertor (ADC) + * peripheral: + * + Initialization and de-initialization functions + * ++ Initialization and Configuration of ADC + * + Operation functions + * ++ Start, stop, get result of conversions of regular + * group, using 3 possible modes: polling, interruption or DMA. + * + Control functions + * ++ Channels configuration on regular group + * ++ Analog Watchdog configuration + * + State functions + * ++ ADC state machine management + * ++ Interrupts and flags management + * Other functions (extended functions) are available in file + * "stm32f0xx_hal_adc_ex.c". + * + @verbatim + ============================================================================== + ##### ADC peripheral features ##### + ============================================================================== + [..] + (+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution + + (+) Interrupt generation at the end of regular conversion and in case of + analog watchdog or overrun events. + + (+) Single and continuous conversion modes. + + (+) Scan mode for conversion of several channels sequentially. + + (+) Data alignment with in-built data coherency. + + (+) Programmable sampling time (common for all channels) + + (+) ADC conversion of regular group. + + (+) External trigger (timer or EXTI) with configurable polarity + + (+) DMA request generation for transfer of conversions data of regular group. + + (+) ADC calibration + + (+) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at + slower speed. + + (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to + Vdda or to an external voltage reference). + + + ##### How to use this driver ##### + ============================================================================== + [..] + + *** Configuration of top level parameters related to ADC *** + ============================================================ + [..] + + (#) Enable the ADC interface + (++) As prerequisite, ADC clock must be configured at RCC top level. + Caution: On STM32F0, ADC clock frequency max is 14MHz (refer + to device datasheet). + Therefore, ADC clock prescaler must be configured in + function of ADC clock source frequency to remain below + this maximum frequency. + + (++) Two clock settings are mandatory: + (+++) ADC clock (core clock, also possibly conversion clock). + + (+++) ADC clock (conversions clock). + Two possible clock sources: synchronous clock derived from APB clock + or asynchronous clock derived from ADC dedicated HSI RC oscillator + 14MHz. + If asynchronous clock is selected, parameter "HSI14State" must be set either: + - to "...HSI14State = RCC_HSI14_ADC_CONTROL" to let the ADC control + the HSI14 oscillator enable/disable (if not used to supply the main + system clock): feature used if ADC mode LowPowerAutoPowerOff is + enabled. + - to "...HSI14State = RCC_HSI14_ON" to maintain the HSI14 oscillator + always enabled: can be used to supply the main system clock. + + (+++) Example: + Into HAL_ADC_MspInit() (recommended code location) or with + other device clock parameters configuration: + (+++) __HAL_RCC_ADC1_CLK_ENABLE(); (mandatory) + + HI14 enable or let under control of ADC: (optional: if asynchronous clock selected) + (+++) RCC_OscInitTypeDef RCC_OscInitStructure; + (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14; + (+++) RCC_OscInitStructure.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT; + (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_ADC_CONTROL; + (+++) RCC_OscInitStructure.PLL... (optional if used for system clock) + (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure); + + (++) ADC clock source and clock prescaler are configured at ADC level with + parameter "ClockPrescaler" using function HAL_ADC_Init(). + + (#) ADC pins configuration + (++) Enable the clock for the ADC GPIOs + using macro __HAL_RCC_GPIOx_CLK_ENABLE() + (++) Configure these ADC pins in analog mode + using function HAL_GPIO_Init() + + (#) Optionally, in case of usage of ADC with interruptions: + (++) Configure the NVIC for ADC + using function HAL_NVIC_EnableIRQ(ADCx_IRQn) + (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler() + into the function of corresponding ADC interruption vector + ADCx_IRQHandler(). + + (#) Optionally, in case of usage of DMA: + (++) Configure the DMA (DMA channel, mode normal or circular, ...) + using function HAL_DMA_Init(). + (++) Configure the NVIC for DMA + using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn) + (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler() + into the function of corresponding DMA interruption vector + DMAx_Channelx_IRQHandler(). + + *** Configuration of ADC, group regular, channels parameters *** + ================================================================ + [..] + + (#) Configure the ADC parameters (resolution, data alignment, ...) + and regular group parameters (conversion trigger, sequencer, ...) + using function HAL_ADC_Init(). + + (#) Configure the channels for regular group parameters (channel number, + channel rank into sequencer, ..., into regular group) + using function HAL_ADC_ConfigChannel(). + + (#) Optionally, configure the analog watchdog parameters (channels + monitored, thresholds, ...) + using function HAL_ADC_AnalogWDGConfig(). + + *** Execution of ADC conversions *** + ==================================== + [..] + + (#) Optionally, perform an automatic ADC calibration to improve the + conversion accuracy + using function HAL_ADCEx_Calibration_Start(). + + (#) ADC driver can be used among three modes: polling, interruption, + transfer by DMA. + + (++) ADC conversion by polling: + (+++) Activate the ADC peripheral and start conversions + using function HAL_ADC_Start() + (+++) Wait for ADC conversion completion + using function HAL_ADC_PollForConversion() + (+++) Retrieve conversion results + using function HAL_ADC_GetValue() + (+++) Stop conversion and disable the ADC peripheral + using function HAL_ADC_Stop() + + (++) ADC conversion by interruption: + (+++) Activate the ADC peripheral and start conversions + using function HAL_ADC_Start_IT() + (+++) Wait for ADC conversion completion by call of function + HAL_ADC_ConvCpltCallback() + (this function must be implemented in user program) + (+++) Retrieve conversion results + using function HAL_ADC_GetValue() + (+++) Stop conversion and disable the ADC peripheral + using function HAL_ADC_Stop_IT() + + (++) ADC conversion with transfer by DMA: + (+++) Activate the ADC peripheral and start conversions + using function HAL_ADC_Start_DMA() + (+++) Wait for ADC conversion completion by call of function + HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback() + (these functions must be implemented in user program) + (+++) Conversion results are automatically transferred by DMA into + destination variable address. + (+++) Stop conversion and disable the ADC peripheral + using function HAL_ADC_Stop_DMA() + + [..] + + (@) Callback functions must be implemented in user program: + (+@) HAL_ADC_ErrorCallback() + (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog) + (+@) HAL_ADC_ConvCpltCallback() + (+@) HAL_ADC_ConvHalfCpltCallback + + *** Deinitialization of ADC *** + ============================================================ + [..] + + (#) Disable the ADC interface + (++) ADC clock can be hard reset and disabled at RCC top level. + (++) Hard reset of ADC peripherals + using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET(). + (++) ADC clock disable + using the equivalent macro/functions as configuration step. + (+++) Example: + Into HAL_ADC_MspDeInit() (recommended code location) or with + other device clock parameters configuration: + (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14; + (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_OFF; (if not used for system clock) + (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure); + + (#) ADC pins configuration + (++) Disable the clock for the ADC GPIOs + using macro __HAL_RCC_GPIOx_CLK_DISABLE() + + (#) Optionally, in case of usage of ADC with interruptions: + (++) Disable the NVIC for ADC + using function HAL_NVIC_DisableIRQ(ADCx_IRQn) + + (#) Optionally, in case of usage of DMA: + (++) Deinitialize the DMA + using function HAL_DMA_DeInit(). + (++) Disable the NVIC for DMA + using function HAL_NVIC_DisableIRQ(DMAx_Channelx_IRQn) + + [..] + + *** Callback registration *** + ============================================= + [..] + + The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1, + allows the user to configure dynamically the driver callbacks. + Use Functions HAL_ADC_RegisterCallback() + to register an interrupt callback. + [..] + + Function HAL_ADC_RegisterCallback() allows to register following callbacks: + (+) ConvCpltCallback : ADC conversion complete callback + (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback + (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback + (+) ErrorCallback : ADC error callback + (+) MspInitCallback : ADC Msp Init callback + (+) MspDeInitCallback : ADC Msp DeInit callback + This function takes as parameters the HAL peripheral handle, the Callback ID + and a pointer to the user callback function. + [..] + + Use function HAL_ADC_UnRegisterCallback to reset a callback to the default + weak function. + [..] + + HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle, + and the Callback ID. + This function allows to reset following callbacks: + (+) ConvCpltCallback : ADC conversion complete callback + (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback + (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback + (+) ErrorCallback : ADC error callback + (+) MspInitCallback : ADC Msp Init callback + (+) MspDeInitCallback : ADC Msp DeInit callback + [..] + + By default, after the HAL_ADC_Init() and when the state is HAL_ADC_STATE_RESET + all callbacks are set to the corresponding weak functions: + examples HAL_ADC_ConvCpltCallback(), HAL_ADC_ErrorCallback(). + Exception done for MspInit and MspDeInit functions that are + reset to the legacy weak functions in the HAL_ADC_Init()/ HAL_ADC_DeInit() only when + these callbacks are null (not registered beforehand). + [..] + + If MspInit or MspDeInit are not null, the HAL_ADC_Init()/ HAL_ADC_DeInit() + keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. + [..] + + Callbacks can be registered/unregistered in HAL_ADC_STATE_READY state only. + Exception done MspInit/MspDeInit functions that can be registered/unregistered + in HAL_ADC_STATE_READY or HAL_ADC_STATE_RESET state, + thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. + [..] + + Then, the user first registers the MspInit/MspDeInit user callbacks + using HAL_ADC_RegisterCallback() before calling HAL_ADC_DeInit() + or HAL_ADC_Init() function. + [..] + + When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or + not defined, the callback registration feature is not available and all callbacks + are set to the corresponding weak functions. + + @endverbatim + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2016 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f0xx_hal.h" + +/** @addtogroup STM32F0xx_HAL_Driver + * @{ + */ + +/** @defgroup ADC ADC + * @brief ADC HAL module driver + * @{ + */ + +#ifdef HAL_ADC_MODULE_ENABLED + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/** @defgroup ADC_Private_Constants ADC Private Constants + * @{ + */ + + /* Fixed timeout values for ADC calibration, enable settling time, disable */ + /* settling time. */ + /* Values defined to be higher than worst cases: low clock frequency, */ + /* maximum prescaler. */ + /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */ + /* prescaler 4, sampling time 7.5 ADC clock cycles, resolution 12 bits. */ + /* Unit: ms */ + #define ADC_ENABLE_TIMEOUT ( 2U) + #define ADC_DISABLE_TIMEOUT ( 2U) + #define ADC_STOP_CONVERSION_TIMEOUT ( 2U) + + /* Delay for ADC stabilization time. */ + /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */ + /* Unit: us */ + #define ADC_STAB_DELAY_US ( 1U) + + /* Delay for temperature sensor stabilization time. */ + /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */ + /* Unit: us */ + #define ADC_TEMPSENSOR_DELAY_US ( 10U) + +/** + * @} + */ + +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/** @defgroup ADC_Private_Functions ADC Private Functions + * @{ + */ +static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc); +static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc); +static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc); +static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma); +static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma); +static void ADC_DMAError(DMA_HandleTypeDef *hdma); +/** + * @} + */ + +/* Exported functions ---------------------------------------------------------*/ + +/** @defgroup ADC_Exported_Functions ADC Exported Functions + * @{ + */ + +/** @defgroup ADC_Exported_Functions_Group1 Initialization/de-initialization functions + * @brief Initialization and Configuration functions + * +@verbatim + =============================================================================== + ##### Initialization and de-initialization functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Initialize and configure the ADC. + (+) De-initialize the ADC +@endverbatim + * @{ + */ + +/** + * @brief Initializes the ADC peripheral and regular group according to + * parameters specified in structure "ADC_InitTypeDef". + * @note As prerequisite, ADC clock must be configured at RCC top level + * depending on both possible clock sources: APB clock of HSI clock. + * See commented example code below that can be copied and uncommented + * into HAL_ADC_MspInit(). + * @note Possibility to update parameters on the fly: + * This function initializes the ADC MSP (HAL_ADC_MspInit()) only when + * coming from ADC state reset. Following calls to this function can + * be used to reconfigure some parameters of ADC_InitTypeDef + * structure on the fly, without modifying MSP configuration. If ADC + * MSP has to be modified again, HAL_ADC_DeInit() must be called + * before HAL_ADC_Init(). + * The setting of these parameters is conditioned to ADC state. + * For parameters constraints, see comments of structure + * "ADC_InitTypeDef". + * @note This function configures the ADC within 2 scopes: scope of entire + * ADC and scope of regular group. For parameters details, see comments + * of structure "ADC_InitTypeDef". + * @param hadc ADC handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) +{ + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + uint32_t tmpCFGR1 = 0U; + + /* Check ADC handle */ + if(hadc == NULL) + { + return HAL_ERROR; + } + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler)); + assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution)); + assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); + assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); + assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); + assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode)); + assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); + assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); + assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); + assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); + assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); + assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); + assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff)); + + /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */ + /* at RCC top level depending on both possible clock sources: */ + /* APB clock or HSI clock. */ + /* Refer to header of this file for more details on clock enabling procedure*/ + + /* Actions performed only if ADC is coming from state reset: */ + /* - Initialization of ADC MSP */ + /* - ADC voltage regulator enable */ + if (hadc->State == HAL_ADC_STATE_RESET) + { + /* Initialize ADC error code */ + ADC_CLEAR_ERRORCODE(hadc); + + /* Allocate lock resource and initialize it */ + hadc->Lock = HAL_UNLOCKED; + +#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + /* Init the ADC Callback settings */ + hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; /* Legacy weak callback */ + hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; /* Legacy weak callback */ + hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; /* Legacy weak callback */ + hadc->ErrorCallback = HAL_ADC_ErrorCallback; /* Legacy weak callback */ + + if (hadc->MspInitCallback == NULL) + { + hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */ + } + + /* Init the low level hardware */ + hadc->MspInitCallback(hadc); +#else + /* Init the low level hardware */ + HAL_ADC_MspInit(hadc); +#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + } + + /* Configuration of ADC parameters if previous preliminary actions are */ + /* correctly completed. */ + /* and if there is no conversion on going on regular group (ADC can be */ + /* enabled anyway, in case of call of this function to update a parameter */ + /* on the fly). */ + if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && + (tmp_hal_status == HAL_OK) && + (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) + { + /* Set ADC state */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_REG_BUSY, + HAL_ADC_STATE_BUSY_INTERNAL); + + /* Parameters update conditioned to ADC state: */ + /* Parameters that can be updated only when ADC is disabled: */ + /* - ADC clock mode */ + /* - ADC clock prescaler */ + /* - ADC resolution */ + if (ADC_IS_ENABLE(hadc) == RESET) + { + /* Some parameters of this register are not reset, since they are set */ + /* by other functions and must be kept in case of usage of this */ + /* function on the fly (update of a parameter of ADC_InitTypeDef */ + /* without needing to reconfigure all other ADC groups/channels */ + /* parameters): */ + /* - internal measurement paths: Vbat, temperature sensor, Vref */ + /* (set into HAL_ADC_ConfigChannel() ) */ + + /* Configuration of ADC resolution */ + MODIFY_REG(hadc->Instance->CFGR1, + ADC_CFGR1_RES , + hadc->Init.Resolution ); + + /* Configuration of ADC clock mode: clock source AHB or HSI with */ + /* selectable prescaler */ + MODIFY_REG(hadc->Instance->CFGR2 , + ADC_CFGR2_CKMODE , + hadc->Init.ClockPrescaler ); + } + + /* Configuration of ADC: */ + /* - discontinuous mode */ + /* - LowPowerAutoWait mode */ + /* - LowPowerAutoPowerOff mode */ + /* - continuous conversion mode */ + /* - overrun */ + /* - external trigger to start conversion */ + /* - external trigger polarity */ + /* - data alignment */ + /* - resolution */ + /* - scan direction */ + /* - DMA continuous request */ + hadc->Instance->CFGR1 &= ~( ADC_CFGR1_DISCEN | + ADC_CFGR1_AUTOFF | + ADC_CFGR1_AUTDLY | + ADC_CFGR1_CONT | + ADC_CFGR1_OVRMOD | + ADC_CFGR1_EXTSEL | + ADC_CFGR1_EXTEN | + ADC_CFGR1_ALIGN | + ADC_CFGR1_SCANDIR | + ADC_CFGR1_DMACFG ); + + tmpCFGR1 |= (ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | + ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | + ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | + ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | + hadc->Init.DataAlign | + ADC_SCANDIR(hadc->Init.ScanConvMode) | + ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); + + /* Enable discontinuous mode only if continuous mode is disabled */ + if (hadc->Init.DiscontinuousConvMode == ENABLE) + { + if (hadc->Init.ContinuousConvMode == DISABLE) + { + /* Enable the selected ADC group regular discontinuous mode */ + tmpCFGR1 |= ADC_CFGR1_DISCEN; + } + else + { + /* ADC regular group discontinuous was intended to be enabled, */ + /* but ADC regular group modes continuous and sequencer discontinuous */ + /* cannot be enabled simultaneously. */ + + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + } + } + + /* Enable external trigger if trigger selection is different of software */ + /* start. */ + /* Note: This configuration keeps the hardware feature of parameter */ + /* ExternalTrigConvEdge "trigger edge none" equivalent to */ + /* software start. */ + if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) + { + tmpCFGR1 |= ( hadc->Init.ExternalTrigConv | + hadc->Init.ExternalTrigConvEdge ); + } + + /* Update ADC configuration register with previous settings */ + hadc->Instance->CFGR1 |= tmpCFGR1; + + /* Channel sampling time configuration */ + /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */ + /* (obsolete): sampling time set in this function if parameter */ + /* "SamplingTimeCommon" has been set to a valid sampling time. */ + /* Otherwise, sampling time is set into ADC channel initialization */ + /* structure with parameter "SamplingTime" (obsolete). */ + if (IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) + { + /* Channel sampling time configuration */ + /* Clear the old sample time */ + hadc->Instance->SMPR &= ~(ADC_SMPR_SMP); + + /* Set the new sample time */ + hadc->Instance->SMPR |= ADC_SMPR_SET(hadc->Init.SamplingTimeCommon); + } + + /* Check back that ADC registers have effectively been configured to */ + /* ensure of no potential problem of ADC core IP clocking. */ + /* Check through register CFGR1 (excluding analog watchdog configuration: */ + /* set into separate dedicated function, and bits of ADC resolution set */ + /* out of temporary variable 'tmpCFGR1'). */ + if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_RES)) + == tmpCFGR1) + { + /* Set ADC error code to none */ + ADC_CLEAR_ERRORCODE(hadc); + + /* Set the ADC state */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_BUSY_INTERNAL, + HAL_ADC_STATE_READY); + } + else + { + /* Update ADC state machine to error */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_BUSY_INTERNAL, + HAL_ADC_STATE_ERROR_INTERNAL); + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + + tmp_hal_status = HAL_ERROR; + } + + } + else + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + + tmp_hal_status = HAL_ERROR; + } + + /* Return function status */ + return tmp_hal_status; +} + + +/** + * @brief Deinitialize the ADC peripheral registers to their default reset + * values, with deinitialization of the ADC MSP. + * @note For devices with several ADCs: reset of ADC common registers is done + * only if all ADCs sharing the same common group are disabled. + * If this is not the case, reset of these common parameters reset is + * bypassed without error reporting: it can be the intended behaviour in + * case of reset of a single ADC while the other ADCs sharing the same + * common group is still running. + * @param hadc ADC handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) +{ + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + + /* Check ADC handle */ + if(hadc == NULL) + { + return HAL_ERROR; + } + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Set ADC state */ + SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL); + + /* Stop potential conversion on going, on regular group */ + tmp_hal_status = ADC_ConversionStop(hadc); + + /* Disable ADC peripheral if conversions are effectively stopped */ + if (tmp_hal_status == HAL_OK) + { + /* Disable the ADC peripheral */ + tmp_hal_status = ADC_Disable(hadc); + + /* Check if ADC is effectively disabled */ + if (tmp_hal_status != HAL_ERROR) + { + /* Change ADC state */ + hadc->State = HAL_ADC_STATE_READY; + } + } + + + /* Configuration of ADC parameters if previous preliminary actions are */ + /* correctly completed. */ + if (tmp_hal_status != HAL_ERROR) + { + + /* ========== Reset ADC registers ========== */ + /* Reset register IER */ + __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD | ADC_IT_OVR | + ADC_IT_EOS | ADC_IT_EOC | + ADC_IT_EOSMP | ADC_IT_RDY ) ); + + /* Reset register ISR */ + __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_OVR | + ADC_FLAG_EOS | ADC_FLAG_EOC | + ADC_FLAG_EOSMP | ADC_FLAG_RDY ) ); + + /* Reset register CR */ + /* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode */ + /* "read-set": no direct reset applicable. */ + + /* Reset register CFGR1 */ + hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_DISCEN | + ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_OVRMOD | + ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES | + ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN ); + + /* Reset register CFGR2 */ + /* Note: Update of ADC clock mode is conditioned to ADC state disabled: */ + /* already done above. */ + hadc->Instance->CFGR2 &= ~ADC_CFGR2_CKMODE; + + /* Reset register SMPR */ + hadc->Instance->SMPR &= ~ADC_SMPR_SMP; + + /* Reset register TR1 */ + hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT); + + /* Reset register CHSELR */ + hadc->Instance->CHSELR &= ~(ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16 | + ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12 | + ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9 | ADC_CHSELR_CHSEL8 | + ADC_CHSELR_CHSEL7 | ADC_CHSELR_CHSEL6 | ADC_CHSELR_CHSEL5 | ADC_CHSELR_CHSEL4 | + ADC_CHSELR_CHSEL3 | ADC_CHSELR_CHSEL2 | ADC_CHSELR_CHSEL1 | ADC_CHSELR_CHSEL0 ); + + /* Reset register DR */ + /* bits in access mode read only, no direct reset applicable*/ + + /* Reset register CCR */ + ADC->CCR &= ~(ADC_CCR_ALL); + + /* ========== Hard reset ADC peripheral ========== */ + /* Performs a global reset of the entire ADC peripheral: ADC state is */ + /* forced to a similar state after device power-on. */ + /* If needed, copy-paste and uncomment the following reset code into */ + /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */ + /* */ + /* __HAL_RCC_ADC1_FORCE_RESET() */ + /* __HAL_RCC_ADC1_RELEASE_RESET() */ + +#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + if (hadc->MspDeInitCallback == NULL) + { + hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */ + } + + /* DeInit the low level hardware */ + hadc->MspDeInitCallback(hadc); +#else + /* DeInit the low level hardware */ + HAL_ADC_MspDeInit(hadc); +#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + + /* Set ADC error code to none */ + ADC_CLEAR_ERRORCODE(hadc); + + /* Set ADC state */ + hadc->State = HAL_ADC_STATE_RESET; + } + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + + /* Return function status */ + return tmp_hal_status; +} + + +/** + * @brief Initializes the ADC MSP. + * @param hadc ADC handle + * @retval None + */ +__weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hadc); + + /* NOTE : This function should not be modified. When the callback is needed, + function HAL_ADC_MspInit must be implemented in the user file. + */ +} + +/** + * @brief DeInitializes the ADC MSP. + * @param hadc ADC handle + * @retval None + */ +__weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hadc); + + /* NOTE : This function should not be modified. When the callback is needed, + function HAL_ADC_MspDeInit must be implemented in the user file. + */ +} + +#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +/** + * @brief Register a User ADC Callback + * To be used instead of the weak predefined callback + * @param hadc Pointer to a ADC_HandleTypeDef structure that contains + * the configuration information for the specified ADC. + * @param CallbackID ID of the callback to be registered + * This parameter can be one of the following values: + * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID + * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID + * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID + * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID + * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complete callback ID + * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID + * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID + * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID + * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID + * @param pCallback pointer to the Callback function + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID, pADC_CallbackTypeDef pCallback) +{ + HAL_StatusTypeDef status = HAL_OK; + + if (pCallback == NULL) + { + /* Update the error code */ + hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + + return HAL_ERROR; + } + + if ((hadc->State & HAL_ADC_STATE_READY) != 0) + { + switch (CallbackID) + { + case HAL_ADC_CONVERSION_COMPLETE_CB_ID : + hadc->ConvCpltCallback = pCallback; + break; + + case HAL_ADC_CONVERSION_HALF_CB_ID : + hadc->ConvHalfCpltCallback = pCallback; + break; + + case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID : + hadc->LevelOutOfWindowCallback = pCallback; + break; + + case HAL_ADC_ERROR_CB_ID : + hadc->ErrorCallback = pCallback; + break; + + case HAL_ADC_MSPINIT_CB_ID : + hadc->MspInitCallback = pCallback; + break; + + case HAL_ADC_MSPDEINIT_CB_ID : + hadc->MspDeInitCallback = pCallback; + break; + + default : + /* Update the error code */ + hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + + /* Return error status */ + status = HAL_ERROR; + break; + } + } + else if (HAL_ADC_STATE_RESET == hadc->State) + { + switch (CallbackID) + { + case HAL_ADC_MSPINIT_CB_ID : + hadc->MspInitCallback = pCallback; + break; + + case HAL_ADC_MSPDEINIT_CB_ID : + hadc->MspDeInitCallback = pCallback; + break; + + default : + /* Update the error code */ + hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + + /* Return error status */ + status = HAL_ERROR; + break; + } + } + else + { + /* Update the error code */ + hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + + /* Return error status */ + status = HAL_ERROR; + } + + return status; +} + +/** + * @brief Unregister a ADC Callback + * ADC callback is redirected to the weak predefined callback + * @param hadc Pointer to a ADC_HandleTypeDef structure that contains + * the configuration information for the specified ADC. + * @param CallbackID ID of the callback to be unregistered + * This parameter can be one of the following values: + * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID + * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID + * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID + * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID + * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complete callback ID + * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID + * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID + * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID + * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID) +{ + HAL_StatusTypeDef status = HAL_OK; + + if ((hadc->State & HAL_ADC_STATE_READY) != 0) + { + switch (CallbackID) + { + case HAL_ADC_CONVERSION_COMPLETE_CB_ID : + hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; + break; + + case HAL_ADC_CONVERSION_HALF_CB_ID : + hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; + break; + + case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID : + hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; + break; + + case HAL_ADC_ERROR_CB_ID : + hadc->ErrorCallback = HAL_ADC_ErrorCallback; + break; + + case HAL_ADC_MSPINIT_CB_ID : + hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */ + break; + + case HAL_ADC_MSPDEINIT_CB_ID : + hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */ + break; + + default : + /* Update the error code */ + hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + + /* Return error status */ + status = HAL_ERROR; + break; + } + } + else if (HAL_ADC_STATE_RESET == hadc->State) + { + switch (CallbackID) + { + case HAL_ADC_MSPINIT_CB_ID : + hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */ + break; + + case HAL_ADC_MSPDEINIT_CB_ID : + hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */ + break; + + default : + /* Update the error code */ + hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + + /* Return error status */ + status = HAL_ERROR; + break; + } + } + else + { + /* Update the error code */ + hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + + /* Return error status */ + status = HAL_ERROR; + } + + return status; +} + +#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + +/** + * @} + */ + +/** @defgroup ADC_Exported_Functions_Group2 IO operation functions + * @brief IO operation functions + * +@verbatim + =============================================================================== + ##### IO operation functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Start conversion of regular group. + (+) Stop conversion of regular group. + (+) Poll for conversion complete on regular group. + (+) Poll for conversion event. + (+) Get result of regular channel conversion. + (+) Start conversion of regular group and enable interruptions. + (+) Stop conversion of regular group and disable interruptions. + (+) Handle ADC interrupt request + (+) Start conversion of regular group and enable DMA transfer. + (+) Stop conversion of regular group and disable ADC DMA transfer. +@endverbatim + * @{ + */ + +/** + * @brief Enables ADC, starts conversion of regular group. + * Interruptions enabled in this function: None. + * @param hadc ADC handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) +{ + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Perform ADC enable and conversion start if no conversion is on going */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) + { + /* Process locked */ + __HAL_LOCK(hadc); + + /* Enable the ADC peripheral */ + /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ + /* performed automatically by hardware. */ + if (hadc->Init.LowPowerAutoPowerOff != ENABLE) + { + tmp_hal_status = ADC_Enable(hadc); + } + + /* Start conversion if ADC is effectively enabled */ + if (tmp_hal_status == HAL_OK) + { + /* Set ADC state */ + /* - Clear state bitfield related to regular group conversion results */ + /* - Set state bitfield related to regular operation */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP, + HAL_ADC_STATE_REG_BUSY); + + /* Reset ADC all error code fields */ + ADC_CLEAR_ERRORCODE(hadc); + + /* Process unlocked */ + /* Unlock before starting ADC conversions: in case of potential */ + /* interruption, to let the process to ADC IRQ Handler. */ + __HAL_UNLOCK(hadc); + + /* Clear regular group conversion flag and overrun flag */ + /* (To ensure of no unknown state from potential previous ADC */ + /* operations) */ + __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); + + /* Enable conversion of regular group. */ + /* If software start has been selected, conversion starts immediately. */ + /* If external trigger has been selected, conversion will start at next */ + /* trigger event. */ + hadc->Instance->CR |= ADC_CR_ADSTART; + } + } + else + { + tmp_hal_status = HAL_BUSY; + } + + /* Return function status */ + return tmp_hal_status; +} + +/** + * @brief Stop ADC conversion of regular group, disable ADC peripheral. + * @param hadc ADC handle + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) +{ + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Process locked */ + __HAL_LOCK(hadc); + + /* 1. Stop potential conversion on going, on regular group */ + tmp_hal_status = ADC_ConversionStop(hadc); + + /* Disable ADC peripheral if conversions are effectively stopped */ + if (tmp_hal_status == HAL_OK) + { + /* 2. Disable the ADC peripheral */ + tmp_hal_status = ADC_Disable(hadc); + + /* Check if ADC is effectively disabled */ + if (tmp_hal_status == HAL_OK) + { + /* Set ADC state */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_REG_BUSY, + HAL_ADC_STATE_READY); + } + } + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + + /* Return function status */ + return tmp_hal_status; +} + +/** + * @brief Wait for regular group conversion to be completed. + * @note ADC conversion flags EOS (end of sequence) and EOC (end of + * conversion) are cleared by this function, with an exception: + * if low power feature "LowPowerAutoWait" is enabled, flags are + * not cleared to not interfere with this feature until data register + * is read using function HAL_ADC_GetValue(). + * @note This function cannot be used in a particular setup: ADC configured + * in DMA mode and polling for end of each conversion (ADC init + * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV). + * In this case, DMA resets the flag EOC and polling cannot be + * performed on each conversion. Nevertheless, polling can still + * be performed on the complete sequence (ADC init + * parameter "EOCSelection" set to ADC_EOC_SEQ_CONV). + * @param hadc ADC handle + * @param Timeout Timeout value in millisecond. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) +{ + uint32_t tickstart; + uint32_t tmp_Flag_EOC; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* If end of conversion selected to end of sequence */ + if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) + { + tmp_Flag_EOC = ADC_FLAG_EOS; + } + /* If end of conversion selected to end of each conversion */ + else /* ADC_EOC_SINGLE_CONV */ + { + /* Verification that ADC configuration is compliant with polling for */ + /* each conversion: */ + /* Particular case is ADC configured in DMA mode and ADC sequencer with */ + /* several ranks and polling for end of each conversion. */ + /* For code simplicity sake, this particular case is generalized to */ + /* ADC configured in DMA mode and and polling for end of each conversion. */ + if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN)) + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + + return HAL_ERROR; + } + else + { + tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS); + } + } + + /* Get tick count */ + tickstart = HAL_GetTick(); + + /* Wait until End of Conversion flag is raised */ + while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC)) + { + /* Check if timeout is disabled (set to infinite wait) */ + if(Timeout != HAL_MAX_DELAY) + { + if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) + { + /* New check to avoid false timeout detection in case of preemption */ + if(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC)) + { + /* Update ADC state machine to timeout */ + SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + + return HAL_TIMEOUT; + } + } + } + } + + /* Update ADC state machine */ + SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); + + /* Determine whether any further conversion upcoming on group regular */ + /* by external trigger, continuous mode or scan sequence on going. */ + if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && + (hadc->Init.ContinuousConvMode == DISABLE) ) + { + /* If End of Sequence is reached, disable interrupts */ + if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) + { + /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ + /* ADSTART==0 (no conversion on going) */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) + { + /* Disable ADC end of single conversion interrupt on group regular */ + /* Note: Overrun interrupt was enabled with EOC interrupt in */ + /* HAL_Start_IT(), but is not disabled here because can be used */ + /* by overrun IRQ process below. */ + __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); + + /* Set ADC state */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_REG_BUSY, + HAL_ADC_STATE_READY); + } + else + { + /* Change ADC state to error state */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + } + } + } + + /* Clear end of conversion flag of regular group if low power feature */ + /* "LowPowerAutoWait " is disabled, to not interfere with this feature */ + /* until data register is read using function HAL_ADC_GetValue(). */ + if (hadc->Init.LowPowerAutoWait == DISABLE) + { + /* Clear regular group conversion flag */ + __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS)); + } + + /* Return ADC state */ + return HAL_OK; +} + +/** + * @brief Poll for conversion event. + * @param hadc ADC handle + * @param EventType the ADC event type. + * This parameter can be one of the following values: + * @arg ADC_AWD_EVENT: ADC Analog watchdog event + * @arg ADC_OVR_EVENT: ADC Overrun event + * @param Timeout Timeout value in millisecond. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout) +{ + uint32_t tickstart=0; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + assert_param(IS_ADC_EVENT_TYPE(EventType)); + + /* Get tick count */ + tickstart = HAL_GetTick(); + + /* Check selected event flag */ + while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET) + { + /* Check if timeout is disabled (set to infinite wait) */ + if(Timeout != HAL_MAX_DELAY) + { + if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) + { + /* New check to avoid false timeout detection in case of preemption */ + if(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET) + { + /* Update ADC state machine to timeout */ + SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + + return HAL_TIMEOUT; + } + } + } + } + + switch(EventType) + { + /* Analog watchdog (level out of window) event */ + case ADC_AWD_EVENT: + /* Set ADC state */ + SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); + + /* Clear ADC analog watchdog flag */ + __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); + break; + + /* Overrun event */ + default: /* Case ADC_OVR_EVENT */ + /* If overrun is set to overwrite previous data, overrun event is not */ + /* considered as an error. */ + /* (cf ref manual "Managing conversions without using the DMA and without */ + /* overrun ") */ + if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) + { + /* Set ADC state */ + SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR); + + /* Set ADC error code to overrun */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); + } + + /* Clear ADC Overrun flag */ + __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); + break; + } + + /* Return ADC state */ + return HAL_OK; +} + +/** + * @brief Enables ADC, starts conversion of regular group with interruption. + * Interruptions enabled in this function: + * - EOC (end of conversion of regular group) or EOS (end of + * sequence of regular group) depending on ADC initialization + * parameter "EOCSelection" + * - overrun (if available) + * Each of these interruptions has its dedicated callback function. + * @param hadc ADC handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc) +{ + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Perform ADC enable and conversion start if no conversion is on going */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) + { + /* Process locked */ + __HAL_LOCK(hadc); + + /* Enable the ADC peripheral */ + /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ + /* performed automatically by hardware. */ + if (hadc->Init.LowPowerAutoPowerOff != ENABLE) + { + tmp_hal_status = ADC_Enable(hadc); + } + + /* Start conversion if ADC is effectively enabled */ + if (tmp_hal_status == HAL_OK) + { + /* Set ADC state */ + /* - Clear state bitfield related to regular group conversion results */ + /* - Set state bitfield related to regular operation */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP, + HAL_ADC_STATE_REG_BUSY); + + /* Reset ADC all error code fields */ + ADC_CLEAR_ERRORCODE(hadc); + + /* Process unlocked */ + /* Unlock before starting ADC conversions: in case of potential */ + /* interruption, to let the process to ADC IRQ Handler. */ + __HAL_UNLOCK(hadc); + + /* Clear regular group conversion flag and overrun flag */ + /* (To ensure of no unknown state from potential previous ADC */ + /* operations) */ + __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); + + /* Enable ADC end of conversion interrupt */ + /* Enable ADC overrun interrupt */ + switch(hadc->Init.EOCSelection) + { + case ADC_EOC_SEQ_CONV: + __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); + __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR)); + break; + /* case ADC_EOC_SINGLE_CONV */ + default: + __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); + break; + } + + /* Enable conversion of regular group. */ + /* If software start has been selected, conversion starts immediately. */ + /* If external trigger has been selected, conversion will start at next */ + /* trigger event. */ + hadc->Instance->CR |= ADC_CR_ADSTART; + } + } + else + { + tmp_hal_status = HAL_BUSY; + } + + /* Return function status */ + return tmp_hal_status; +} + + +/** + * @brief Stop ADC conversion of regular group, disable interruption of + * end-of-conversion, disable ADC peripheral. + * @param hadc ADC handle + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc) +{ + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Process locked */ + __HAL_LOCK(hadc); + + /* 1. Stop potential conversion on going, on regular group */ + tmp_hal_status = ADC_ConversionStop(hadc); + + /* Disable ADC peripheral if conversions are effectively stopped */ + if (tmp_hal_status == HAL_OK) + { + /* Disable ADC end of conversion interrupt for regular group */ + /* Disable ADC overrun interrupt */ + __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); + + /* 2. Disable the ADC peripheral */ + tmp_hal_status = ADC_Disable(hadc); + + /* Check if ADC is effectively disabled */ + if (tmp_hal_status == HAL_OK) + { + /* Set ADC state */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_REG_BUSY, + HAL_ADC_STATE_READY); + } + } + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + + /* Return function status */ + return tmp_hal_status; +} + +/** + * @brief Enables ADC, starts conversion of regular group and transfers result + * through DMA. + * Interruptions enabled in this function: + * - DMA transfer complete + * - DMA half transfer + * - overrun + * Each of these interruptions has its dedicated callback function. + * @param hadc ADC handle + * @param pData The destination Buffer address. + * @param Length The length of data to be transferred from ADC peripheral to memory. + * @retval None + */ +HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) +{ + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Perform ADC enable and conversion start if no conversion is on going */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) + { + /* Process locked */ + __HAL_LOCK(hadc); + + /* Enable the ADC peripheral */ + /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ + /* performed automatically by hardware. */ + if (hadc->Init.LowPowerAutoPowerOff != ENABLE) + { + tmp_hal_status = ADC_Enable(hadc); + } + + /* Start conversion if ADC is effectively enabled */ + if (tmp_hal_status == HAL_OK) + { + /* Set ADC state */ + /* - Clear state bitfield related to regular group conversion results */ + /* - Set state bitfield related to regular operation */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP, + HAL_ADC_STATE_REG_BUSY); + + /* Reset ADC all error code fields */ + ADC_CLEAR_ERRORCODE(hadc); + + /* Process unlocked */ + /* Unlock before starting ADC conversions: in case of potential */ + /* interruption, to let the process to ADC IRQ Handler. */ + __HAL_UNLOCK(hadc); + + /* Set the DMA transfer complete callback */ + hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; + + /* Set the DMA half transfer complete callback */ + hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; + + /* Set the DMA error callback */ + hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; + + + /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */ + /* start (in case of SW start): */ + + /* Clear regular group conversion flag and overrun flag */ + /* (To ensure of no unknown state from potential previous ADC */ + /* operations) */ + __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); + + /* Enable ADC overrun interrupt */ + __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); + + /* Enable ADC DMA mode */ + hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN; + + /* Start the DMA channel */ + HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); + + /* Enable conversion of regular group. */ + /* If software start has been selected, conversion starts immediately. */ + /* If external trigger has been selected, conversion will start at next */ + /* trigger event. */ + hadc->Instance->CR |= ADC_CR_ADSTART; + } + } + else + { + tmp_hal_status = HAL_BUSY; + } + + /* Return function status */ + return tmp_hal_status; +} + +/** + * @brief Stop ADC conversion of regular group, disable ADC DMA transfer, disable + * ADC peripheral. + * Each of these interruptions has its dedicated callback function. + * @param hadc ADC handle + * @retval HAL status. + */ +HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc) +{ + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Process locked */ + __HAL_LOCK(hadc); + + /* 1. Stop potential conversion on going, on regular group */ + tmp_hal_status = ADC_ConversionStop(hadc); + + /* Disable ADC peripheral if conversions are effectively stopped */ + if (tmp_hal_status == HAL_OK) + { + /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */ + hadc->Instance->CFGR1 &= ~ADC_CFGR1_DMAEN; + + /* Disable the DMA channel (in case of DMA in circular mode or stop while */ + /* while DMA transfer is on going) */ + if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY) + { + tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); + + /* Check if DMA channel effectively disabled */ + if (tmp_hal_status != HAL_OK) + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); + } + } + + /* Disable ADC overrun interrupt */ + __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); + + /* 2. Disable the ADC peripheral */ + /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep */ + /* in memory a potential failing status. */ + if (tmp_hal_status == HAL_OK) + { + tmp_hal_status = ADC_Disable(hadc); + } + else + { + ADC_Disable(hadc); + } + + /* Check if ADC is effectively disabled */ + if (tmp_hal_status == HAL_OK) + { + /* Set ADC state */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_REG_BUSY, + HAL_ADC_STATE_READY); + } + + } + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + + /* Return function status */ + return tmp_hal_status; +} + +/** + * @brief Get ADC regular group conversion result. + * @note Reading register DR automatically clears ADC flag EOC + * (ADC group regular end of unitary conversion). + * @note This function does not clear ADC flag EOS + * (ADC group regular end of sequence conversion). + * Occurrence of flag EOS rising: + * - If sequencer is composed of 1 rank, flag EOS is equivalent + * to flag EOC. + * - If sequencer is composed of several ranks, during the scan + * sequence flag EOC only is raised, at the end of the scan sequence + * both flags EOC and EOS are raised. + * To clear this flag, either use function: + * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming + * model polling: @ref HAL_ADC_PollForConversion() + * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). + * @param hadc ADC handle + * @retval ADC group regular conversion data + */ +uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Note: EOC flag is not cleared here by software because automatically */ + /* cleared by hardware when reading register DR. */ + + /* Return ADC converted value */ + return hadc->Instance->DR; +} + +/** + * @brief Handles ADC interrupt request. + * @param hadc ADC handle + * @retval None + */ +void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); + assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); + + /* ========== Check End of Conversion flag for regular group ========== */ + if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) || + (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) ) + { + /* Update state machine on conversion status if not in error state */ + if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) + { + /* Set ADC state */ + SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); + } + + /* Determine whether any further conversion upcoming on group regular */ + /* by external trigger, continuous mode or scan sequence on going. */ + if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && + (hadc->Init.ContinuousConvMode == DISABLE) ) + { + /* If End of Sequence is reached, disable interrupts */ + if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) + { + /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ + /* ADSTART==0 (no conversion on going) */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) + { + /* Disable ADC end of single conversion interrupt on group regular */ + /* Note: Overrun interrupt was enabled with EOC interrupt in */ + /* HAL_Start_IT(), but is not disabled here because can be used */ + /* by overrun IRQ process below. */ + __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); + + /* Set ADC state */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_REG_BUSY, + HAL_ADC_STATE_READY); + } + else + { + /* Change ADC state to error state */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + } + } + } + + /* Note: into callback, to determine if conversion has been triggered */ + /* from EOC or EOS, possibility to use: */ + /* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */ +#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + hadc->ConvCpltCallback(hadc); +#else + HAL_ADC_ConvCpltCallback(hadc); +#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + + + /* Clear regular group conversion flag */ + /* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of */ + /* conversion flags clear induces the release of the preserved data.*/ + /* Therefore, if the preserved data value is needed, it must be */ + /* read preliminarily into HAL_ADC_ConvCpltCallback(). */ + __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) ); + } + + /* ========== Check Analog watchdog flags ========== */ + if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD)) + { + /* Set ADC state */ + SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); + +#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + hadc->LevelOutOfWindowCallback(hadc); +#else + HAL_ADC_LevelOutOfWindowCallback(hadc); +#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + + /* Clear ADC Analog watchdog flag */ + __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); + + } + + + /* ========== Check Overrun flag ========== */ + if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR)) + { + /* If overrun is set to overwrite previous data (default setting), */ + /* overrun event is not considered as an error. */ + /* (cf ref manual "Managing conversions without using the DMA and without */ + /* overrun ") */ + /* Exception for usage with DMA overrun event always considered as an */ + /* error. */ + if ((hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) || + HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) + { + /* Set ADC error code to overrun */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); + + /* Clear ADC overrun flag */ + __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); + +#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + hadc->ErrorCallback(hadc); +#else + HAL_ADC_ErrorCallback(hadc); +#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + } + + /* Clear the Overrun flag */ + __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); + } + +} + + +/** + * @brief Conversion complete callback in non blocking mode + * @param hadc ADC handle + * @retval None + */ +__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hadc); + + /* NOTE : This function should not be modified. When the callback is needed, + function HAL_ADC_ConvCpltCallback must be implemented in the user file. + */ +} + +/** + * @brief Conversion DMA half-transfer callback in non blocking mode + * @param hadc ADC handle + * @retval None + */ +__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hadc); + + /* NOTE : This function should not be modified. When the callback is needed, + function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. + */ +} + +/** + * @brief Analog watchdog callback in non blocking mode. + * @param hadc ADC handle + * @retval None + */ +__weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hadc); + + /* NOTE : This function should not be modified. When the callback is needed, + function HAL_ADC_LevelOoutOfWindowCallback must be implemented in the user file. + */ +} + +/** + * @brief ADC error callback in non blocking mode + * (ADC conversion with interruption or transfer by DMA) + * @param hadc ADC handle + * @retval None + */ +__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) +{ + /* Prevent unused argument(s) compilation warning */ + UNUSED(hadc); + + /* NOTE : This function should not be modified. When the callback is needed, + function HAL_ADC_ErrorCallback must be implemented in the user file. + */ +} + + +/** + * @} + */ + +/** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions + * @brief Peripheral Control functions + * +@verbatim + =============================================================================== + ##### Peripheral Control functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Configure channels on regular group + (+) Configure the analog watchdog + +@endverbatim + * @{ + */ + +/** + * @brief Configures the the selected channel to be linked to the regular + * group. + * @note In case of usage of internal measurement channels: + * VrefInt/Vbat/TempSensor. + * Sampling time constraints must be respected (sampling time can be + * adjusted in function of ADC clock frequency and sampling time + * setting). + * Refer to device datasheet for timings values, parameters TS_vrefint, + * TS_vbat, TS_temp (values rough order: 5us to 17us). + * These internal paths can be be disabled using function + * HAL_ADC_DeInit(). + * @note Possibility to update parameters on the fly: + * This function initializes channel into regular group, following + * calls to this function can be used to reconfigure some parameters + * of structure "ADC_ChannelConfTypeDef" on the fly, without reseting + * the ADC. + * The setting of these parameters is conditioned to ADC state. + * For parameters constraints, see comments of structure + * "ADC_ChannelConfTypeDef". + * @param hadc ADC handle + * @param sConfig Structure of ADC channel for regular group. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) +{ + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + __IO uint32_t wait_loop_index = 0U; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + assert_param(IS_ADC_CHANNEL(sConfig->Channel)); + assert_param(IS_ADC_RANK(sConfig->Rank)); + + if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) + { + assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); + } + + /* Process locked */ + __HAL_LOCK(hadc); + + /* Parameters update conditioned to ADC state: */ + /* Parameters that can be updated when ADC is disabled or enabled without */ + /* conversion on going on regular group: */ + /* - Channel number */ + /* - Channel sampling time */ + /* - Management of internal measurement channels: VrefInt/TempSensor/Vbat */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) + { + /* Configure channel: depending on rank setting, add it or remove it from */ + /* ADC conversion sequencer. */ + if (sConfig->Rank != ADC_RANK_NONE) + { + /* Regular sequence configuration */ + /* Set the channel selection register from the selected channel */ + hadc->Instance->CHSELR |= ADC_CHSELR_CHANNEL(sConfig->Channel); + + /* Channel sampling time configuration */ + /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */ + /* (obsolete): sampling time set in this function with */ + /* parameter "SamplingTime" (obsolete) only if not already set into */ + /* ADC initialization structure with parameter "SamplingTimeCommon". */ + if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) + { + /* Modify sampling time if needed (not needed in case of reoccurrence */ + /* for several channels programmed consecutively into the sequencer) */ + if (sConfig->SamplingTime != ADC_GET_SAMPLINGTIME(hadc)) + { + /* Channel sampling time configuration */ + /* Clear the old sample time */ + hadc->Instance->SMPR &= ~(ADC_SMPR_SMP); + + /* Set the new sample time */ + hadc->Instance->SMPR |= ADC_SMPR_SET(sConfig->SamplingTime); + } + } + + /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */ + /* internal measurement paths enable: If internal channel selected, */ + /* enable dedicated internal buffers and path. */ + /* Note: these internal measurement paths can be disabled using */ + /* HAL_ADC_DeInit() or removing the channel from sequencer with */ + /* channel configuration parameter "Rank". */ + if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) + { + /* If Channel_16 is selected, enable Temp. sensor measurement path. */ + /* If Channel_17 is selected, enable VREFINT measurement path. */ + /* If Channel_18 is selected, enable VBAT measurement path. */ + ADC->CCR |= ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel); + + /* If Temp. sensor is selected, wait for stabilization delay */ + if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) + { + /* Delay for temperature sensor stabilization time */ + /* Compute number of CPU cycles to wait for */ + wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); + while(wait_loop_index != 0U) + { + wait_loop_index--; + } + } + } + } + else + { + /* Regular sequence configuration */ + /* Reset the channel selection register from the selected channel */ + hadc->Instance->CHSELR &= ~ADC_CHSELR_CHANNEL(sConfig->Channel); + + /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */ + /* internal measurement paths disable: If internal channel selected, */ + /* disable dedicated internal buffers and path. */ + if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) + { + /* If Channel_16 is selected, disable Temp. sensor measurement path. */ + /* If Channel_17 is selected, disable VREFINT measurement path. */ + /* If Channel_18 is selected, disable VBAT measurement path. */ + ADC->CCR &= ~ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel); + } + } + + } + + /* If a conversion is on going on regular group, no update on regular */ + /* channel could be done on neither of the channel configuration structure */ + /* parameters. */ + else + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + + tmp_hal_status = HAL_ERROR; + } + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + + /* Return function status */ + return tmp_hal_status; +} + + +/** + * @brief Configures the analog watchdog. + * @note Possibility to update parameters on the fly: + * This function initializes the selected analog watchdog, following + * calls to this function can be used to reconfigure some parameters + * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without reseting + * the ADC. + * The setting of these parameters is conditioned to ADC state. + * For parameters constraints, see comments of structure + * "ADC_AnalogWDGConfTypeDef". + * @param hadc ADC handle + * @param AnalogWDGConfig Structure of ADC analog watchdog configuration + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig) +{ + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + + uint32_t tmpAWDHighThresholdShifted; + uint32_t tmpAWDLowThresholdShifted; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode)); + assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode)); + + /* Verify if threshold is within the selected ADC resolution */ + assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold)); + assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold)); + + if(AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG) + { + assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel)); + } + + /* Process locked */ + __HAL_LOCK(hadc); + + /* Parameters update conditioned to ADC state: */ + /* Parameters that can be updated when ADC is disabled or enabled without */ + /* conversion on going on regular group: */ + /* - Analog watchdog channels */ + /* - Analog watchdog thresholds */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) + { + /* Configuration of analog watchdog: */ + /* - Set the analog watchdog enable mode: one or overall group of */ + /* channels. */ + /* - Set the Analog watchdog channel (is not used if watchdog */ + /* mode "all channels": ADC_CFGR_AWD1SGL=0). */ + hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL | + ADC_CFGR1_AWDEN | + ADC_CFGR1_AWDCH ); + + hadc->Instance->CFGR1 |= ( AnalogWDGConfig->WatchdogMode | + ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + + /* Shift the offset in function of the selected ADC resolution: Thresholds*/ + /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */ + tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold); + tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold); + + /* Set the high and low thresholds */ + hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT); + hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | + tmpAWDLowThresholdShifted ); + + /* Clear the ADC Analog watchdog flag (in case of left enabled by */ + /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */ + /* or HAL_ADC_PollForEvent(). */ + __HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD); + + /* Configure ADC Analog watchdog interrupt */ + if(AnalogWDGConfig->ITMode == ENABLE) + { + /* Enable the ADC Analog watchdog interrupt */ + __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD); + } + else + { + /* Disable the ADC Analog watchdog interrupt */ + __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD); + } + + } + /* If a conversion is on going on regular group, no update could be done */ + /* on neither of the AWD configuration structure parameters. */ + else + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + + tmp_hal_status = HAL_ERROR; + } + + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + + /* Return function status */ + return tmp_hal_status; +} + + +/** + * @} + */ + + +/** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions + * @brief Peripheral State functions + * +@verbatim + =============================================================================== + ##### Peripheral State and Errors functions ##### + =============================================================================== + [..] + This subsection provides functions to get in run-time the status of the + peripheral. + (+) Check the ADC state + (+) Check the ADC error code + +@endverbatim + * @{ + */ + +/** + * @brief Return the ADC state + * @note ADC state machine is managed by bitfields, ADC status must be + * compared with states bits. + * For example: + * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) " + * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1) ) " + * @param hadc ADC handle + * @retval HAL state + */ +uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Return ADC state */ + return hadc->State; +} + +/** + * @brief Return the ADC error code + * @param hadc ADC handle + * @retval ADC Error Code + */ +uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc) +{ + return hadc->ErrorCode; +} + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup ADC_Private_Functions ADC Private Functions + * @{ + */ + +/** + * @brief Enable the selected ADC. + * @note Prerequisite condition to use this function: ADC must be disabled + * and voltage regulator must be enabled (done into HAL_ADC_Init()). + * @note If low power mode AutoPowerOff is enabled, power-on/off phases are + * performed automatically by hardware. + * In this mode, this function is useless and must not be called because + * flag ADC_FLAG_RDY is not usable. + * Therefore, this function must be called under condition of + * "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)". + * @param hadc ADC handle + * @retval HAL status. + */ +static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) +{ + uint32_t tickstart = 0U; + __IO uint32_t wait_loop_index = 0U; + + /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ + /* enabling phase not yet completed: flag ADC ready not yet set). */ + /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ + /* causes: ADC clock not running, ...). */ + if (ADC_IS_ENABLE(hadc) == RESET) + { + /* Check if conditions to enable the ADC are fulfilled */ + if (ADC_ENABLING_CONDITIONS(hadc) == RESET) + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + + return HAL_ERROR; + } + + /* Enable the ADC peripheral */ + __HAL_ADC_ENABLE(hadc); + + /* Delay for ADC stabilization time */ + /* Compute number of CPU cycles to wait for */ + wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); + while(wait_loop_index != 0U) + { + wait_loop_index--; + } + + /* Get tick count */ + tickstart = HAL_GetTick(); + + /* Wait for ADC effectively enabled */ + while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) + { + if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) + { + /* New check to avoid false timeout detection in case of preemption */ + if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + + return HAL_ERROR; + } + } + } + } + + /* Return HAL status */ + return HAL_OK; +} + +/** + * @brief Disable the selected ADC. + * @note Prerequisite condition to use this function: ADC conversions must be + * stopped. + * @param hadc ADC handle + * @retval HAL status. + */ +static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc) +{ + uint32_t tickstart = 0U; + + /* Verification if ADC is not already disabled: */ + /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ + /* disabled. */ + if (ADC_IS_ENABLE(hadc) != RESET) + { + /* Check if conditions to disable the ADC are fulfilled */ + if (ADC_DISABLING_CONDITIONS(hadc) != RESET) + { + /* Disable the ADC peripheral */ + __HAL_ADC_DISABLE(hadc); + } + else + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + + return HAL_ERROR; + } + + /* Wait for ADC effectively disabled */ + /* Get tick count */ + tickstart = HAL_GetTick(); + + while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) + { + if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) + { + /* New check to avoid false timeout detection in case of preemption */ + if(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + + return HAL_ERROR; + } + } + } + } + + /* Return HAL status */ + return HAL_OK; +} + + +/** + * @brief Stop ADC conversion. + * @note Prerequisite condition to use this function: ADC conversions must be + * stopped to disable the ADC. + * @param hadc ADC handle + * @retval HAL status. + */ +static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc) +{ + uint32_t tickstart = 0U; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Verification if ADC is not already stopped on regular group to bypass */ + /* this function if not needed. */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) + { + + /* Stop potential conversion on going on regular group */ + /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ + if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && + HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) + { + /* Stop conversions on regular group */ + hadc->Instance->CR |= ADC_CR_ADSTP; + } + + /* Wait for conversion effectively stopped */ + /* Get tick count */ + tickstart = HAL_GetTick(); + + while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) + { + if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) + { + /* New check to avoid false timeout detection in case of preemption */ + if((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + + return HAL_ERROR; + } + } + } + } + + /* Return HAL status */ + return HAL_OK; +} + + +/** + * @brief DMA transfer complete callback. + * @param hdma pointer to DMA handle. + * @retval None + */ +static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) +{ + /* Retrieve ADC handle corresponding to current DMA handle */ + ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; + + /* Update state machine on conversion status if not in error state */ + if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) + { + /* Set ADC state */ + SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); + + /* Determine whether any further conversion upcoming on group regular */ + /* by external trigger, continuous mode or scan sequence on going. */ + if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && + (hadc->Init.ContinuousConvMode == DISABLE) ) + { + /* If End of Sequence is reached, disable interrupts */ + if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) + { + /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ + /* ADSTART==0 (no conversion on going) */ + if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) + { + /* Disable ADC end of single conversion interrupt on group regular */ + /* Note: Overrun interrupt was enabled with EOC interrupt in */ + /* HAL_Start_IT(), but is not disabled here because can be used */ + /* by overrun IRQ process below. */ + __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); + + /* Set ADC state */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_REG_BUSY, + HAL_ADC_STATE_READY); + } + else + { + /* Change ADC state to error state */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + + /* Set ADC error code to ADC IP internal error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + } + } + } + + /* Conversion complete callback */ +#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + hadc->ConvCpltCallback(hadc); +#else + HAL_ADC_ConvCpltCallback(hadc); +#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + } + else + { + /* Call DMA error callback */ + hadc->DMA_Handle->XferErrorCallback(hdma); + } + +} + +/** + * @brief DMA half transfer complete callback. + * @param hdma pointer to DMA handle. + * @retval None + */ +static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) +{ + /* Retrieve ADC handle corresponding to current DMA handle */ + ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; + + /* Half conversion callback */ +#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + hadc->ConvHalfCpltCallback(hadc); +#else + HAL_ADC_ConvHalfCpltCallback(hadc); +#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +} + +/** + * @brief DMA error callback + * @param hdma pointer to DMA handle. + * @retval None + */ +static void ADC_DMAError(DMA_HandleTypeDef *hdma) +{ + /* Retrieve ADC handle corresponding to current DMA handle */ + ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; + + /* Set ADC state */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); + + /* Set ADC error code to DMA error */ + SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); + + /* Error callback */ +#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + hadc->ErrorCallback(hadc); +#else + HAL_ADC_ErrorCallback(hadc); +#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +} + +/** + * @} + */ + +#endif /* HAL_ADC_MODULE_ENABLED */ +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c b/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c new file mode 100644 index 0000000..4f914be --- /dev/null +++ b/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c @@ -0,0 +1,192 @@ +/** + ****************************************************************************** + * @file stm32f0xx_hal_adc_ex.c + * @author MCD Application Team + * @brief This file provides firmware functions to manage the following + * functionalities of the Analog to Digital Convertor (ADC) + * peripheral: + * + Operation functions + * ++ Calibration (ADC automatic self-calibration) + * Other functions (generic functions) are available in file + * "stm32f0xx_hal_adc.c". + * + @verbatim + [..] + (@) Sections "ADC peripheral features" and "How to use this driver" are + available in file of generic functions "stm32l1xx_hal_adc.c". + [..] + @endverbatim + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2016 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f0xx_hal.h" + +/** @addtogroup STM32F0xx_HAL_Driver + * @{ + */ + +/** @defgroup ADCEx ADCEx + * @brief ADC HAL module driver + * @{ + */ + +#ifdef HAL_ADC_MODULE_ENABLED + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/** @defgroup ADCEx_Private_Constants ADCEx Private Constants + * @{ + */ + +/* Fixed timeout values for ADC calibration, enable settling time, disable */ + /* settling time. */ + /* Values defined to be higher than worst cases: low clock frequency, */ + /* maximum prescaler. */ + /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */ + /* prescaler 4. */ + /* Unit: ms */ + #define ADC_DISABLE_TIMEOUT 2 + #define ADC_CALIBRATION_TIMEOUT 2U +/** + * @} + */ + +/* Private macros -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions + * @{ + */ + +/** @defgroup ADCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions + * @brief Extended Initialization and Configuration functions + * +@verbatim + =============================================================================== + ##### IO operation functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Perform the ADC calibration. +@endverbatim + * @{ + */ + +/** + * @brief Perform an ADC automatic self-calibration + * Calibration prerequisite: ADC must be disabled (execute this + * function before HAL_ADC_Start() or after HAL_ADC_Stop() ). + * @note Calibration factor can be read after calibration, using function + * HAL_ADC_GetValue() (value on 7 bits: from DR[6;0]). + * @param hadc ADC handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc) +{ + HAL_StatusTypeDef tmp_hal_status = HAL_OK; + uint32_t tickstart = 0U; + uint32_t backup_setting_adc_dma_transfer = 0; /* Note: Variable not declared as volatile because register read is already declared as volatile */ + + /* Check the parameters */ + assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + + /* Process locked */ + __HAL_LOCK(hadc); + + /* Calibration prerequisite: ADC must be disabled. */ + if (ADC_IS_ENABLE(hadc) == RESET) + { + /* Set ADC state */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_REG_BUSY, + HAL_ADC_STATE_BUSY_INTERNAL); + + /* Disable ADC DMA transfer request during calibration */ + /* Note: Specificity of this STM32 serie: Calibration factor is */ + /* available in data register and also transfered by DMA. */ + /* To not insert ADC calibration factor among ADC conversion data */ + /* in array variable, DMA transfer must be disabled during */ + /* calibration. */ + backup_setting_adc_dma_transfer = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG); + CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG); + + /* Start ADC calibration */ + hadc->Instance->CR |= ADC_CR_ADCAL; + + tickstart = HAL_GetTick(); + + /* Wait for calibration completion */ + while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL)) + { + if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) + { + /* New check to avoid false timeout detection in case of preemption */ + if(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL)) + { + /* Update ADC state machine to error */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_BUSY_INTERNAL, + HAL_ADC_STATE_ERROR_INTERNAL); + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + + return HAL_ERROR; + } + } + } + + /* Restore ADC DMA transfer request after calibration */ + SET_BIT(hadc->Instance->CFGR1, backup_setting_adc_dma_transfer); + + /* Set ADC state */ + ADC_STATE_CLR_SET(hadc->State, + HAL_ADC_STATE_BUSY_INTERNAL, + HAL_ADC_STATE_READY); + } + else + { + /* Update ADC state machine to error */ + SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + + tmp_hal_status = HAL_ERROR; + } + + /* Process unlocked */ + __HAL_UNLOCK(hadc); + + /* Return function status */ + return tmp_hal_status; +} + +/** + * @} + */ + +/** + * @} + */ + +#endif /* HAL_ADC_MODULE_ENABLED */ +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Motor_Controller2.ioc b/Motor_Controller2.ioc index aa1d66b..f613360 100644 --- a/Motor_Controller2.ioc +++ b/Motor_Controller2.ioc @@ -2,10 +2,11 @@ File.Version=6 KeepUserPlacement=false Mcu.Family=STM32F0 -Mcu.IP0=NVIC -Mcu.IP1=RCC -Mcu.IP2=SYS -Mcu.IPNb=3 +Mcu.IP0=ADC +Mcu.IP1=NVIC +Mcu.IP2=RCC +Mcu.IP3=SYS +Mcu.IPNb=4 Mcu.Name=STM32F030F4Px Mcu.Package=TSSOP20 Mcu.Pin0=PF0-OSC_IN @@ -37,11 +38,11 @@ NVIC.SysTick_IRQn=true\:3\:0\:false\:false\:true\:false\:true PA0.GPIOParameters=GPIO_Label PA0.GPIO_Label=ADC_CH0 PA0.Locked=true -PA0.Signal=GPIO_Analog +PA0.Signal=SharedAnalog_PA0 PA1.GPIOParameters=GPIO_Label PA1.GPIO_Label=ADC_CH1 PA1.Locked=true -PA1.Signal=GPIO_Analog +PA1.Signal=SharedAnalog_PA1 PA13.Mode=Serial_Wire PA13.Signal=SYS_SWDIO PA14.Mode=Serial_Wire @@ -124,7 +125,7 @@ ProjectManager.StackSize=0x400 ProjectManager.TargetToolchain=STM32CubeIDE ProjectManager.ToolChainLocation= ProjectManager.UnderRoot=true -ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true RCC.AHBFreq_Value=48000000 RCC.APB1Freq_Value=48000000 RCC.APB1TimFreq_Value=48000000 @@ -138,6 +139,12 @@ RCC.SYSCLKFreq_VALUE=48000000 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK RCC.TimSysFreq_Value=48000000 RCC.USART1Freq_Value=48000000 +SH.SharedAnalog_PA0.0=GPIO_Analog +SH.SharedAnalog_PA0.1=ADC_IN0,IN0 +SH.SharedAnalog_PA0.ConfNb=2 +SH.SharedAnalog_PA1.0=GPIO_Analog +SH.SharedAnalog_PA1.1=ADC_IN1,IN1 +SH.SharedAnalog_PA1.ConfNb=2 VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Signal=SYS_VS_Systick board=custom diff --git a/my_software/my_code.c b/my_software/my_code.c index e928f56..5304cf9 100644 --- a/my_software/my_code.c +++ b/my_software/my_code.c @@ -12,14 +12,26 @@ #define HC595_SCK2(x) HAL_GPIO_WritePin(HC595_SLK2_GPIO_Port, HC595_SLK2_Pin, x); #define READ_HC595_DCK HAL_GPIO_ReadPin(HC595_DLK_GPIO_Port,HC595_DLK_Pin) -struct button key1,key2,key3,key4,overload; +extern ADC_HandleTypeDef hadc; +struct button key1,key2,key3,key4,overload; const char d_num_data[10]= { 0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f }; + +#define set_filtering_times 50 +struct +{ + //ADC_HandleTypeDef *device; + int filtering_times; + unsigned long adc_filtering[2]; + int adc_value[2]; +}ADCC; + + struct { char d_num[4]; @@ -362,6 +374,27 @@ moto.moto2a_=0; moto.moto2b_=0; while(1) { + //*adc读取 并计滤波 并计算温度*/ + ///*获取两个通道*/ + for(char a=0;a<2;a++) + { + HAL_ADC_Start(&hadc); + while(HAL_ADC_PollForConversion(&hadc,0xffff)!=HAL_OK); + ADCC.adc_filtering[a]+=HAL_ADC_GetValue(&hadc); //把读到的值加到滤波缓存 + } + HAL_ADC_Stop(&hadc); + ///*开始滤波*/ + ADCC.filtering_times+=1; //每采样加一次记一次 + if(ADCC.filtering_times==set_filtering_times) //当达到设定的滤波采样次数 + { + ADCC.filtering_times=0; + ADCC.adc_value[0]=ADCC.adc_filtering[0]/set_filtering_times; //就除于采样次数 + ADCC.adc_filtering[0]=0; + ADCC.adc_value[1]=ADCC.adc_filtering[1]/set_filtering_times; + ADCC.adc_filtering[1]=0; + } + + switch(mode) { case 0: @@ -606,7 +639,13 @@ moto.moto2b_=0; break; } - + if(ADCC.adc_value[0]>600||ADCC.adc_value[1]>600) + { + GEI_BUTTON_CODE(&overload,1); + }else + { + GEI_BUTTON_CODE(&overload,0); + } GEI_BUTTON_CODE(&key1,dis_buff.button_flag[0]); GEI_BUTTON_CODE(&key2,dis_buff.button_flag[1]);