6263 lines
228 KiB
Plaintext
6263 lines
228 KiB
Plaintext
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Motor_Controller2.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .isr_vector 000000c0 08000000 08000000 00010000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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1 .text 000023e8 080000c0 080000c0 000100c0 2**2
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 0000005c 080024a8 080024a8 000124a8 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .ARM.extab 00000000 08002504 08002504 0002000c 2**0
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CONTENTS
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4 .ARM 00000000 08002504 08002504 0002000c 2**0
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CONTENTS
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5 .preinit_array 00000000 08002504 08002504 0002000c 2**0
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CONTENTS, ALLOC, LOAD, DATA
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6 .init_array 00000004 08002504 08002504 00012504 2**2
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CONTENTS, ALLOC, LOAD, DATA
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7 .fini_array 00000004 08002508 08002508 00012508 2**2
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CONTENTS, ALLOC, LOAD, DATA
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8 .data 0000000c 20000000 0800250c 00020000 2**2
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CONTENTS, ALLOC, LOAD, DATA
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9 .bss 0000008c 2000000c 08002518 0002000c 2**2
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ALLOC
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10 ._user_heap_stack 00000600 20000098 08002518 00020098 2**0
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ALLOC
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11 .ARM.attributes 00000028 00000000 00000000 0002000c 2**0
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CONTENTS, READONLY
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12 .debug_info 00003371 00000000 00000000 00020034 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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13 .debug_abbrev 00001106 00000000 00000000 000233a5 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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14 .debug_aranges 000003c8 00000000 00000000 000244b0 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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15 .debug_ranges 00000320 00000000 00000000 00024878 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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16 .debug_macro 0000e2d5 00000000 00000000 00024b98 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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17 .debug_line 00005c87 00000000 00000000 00032e6d 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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18 .debug_str 0005391a 00000000 00000000 00038af4 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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19 .comment 00000053 00000000 00000000 0008c40e 2**0
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CONTENTS, READONLY
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20 .debug_frame 00000b50 00000000 00000000 0008c464 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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Disassembly of section .text:
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080000c0 <__do_global_dtors_aux>:
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80000c0: b510 push {r4, lr}
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80000c2: 4c06 ldr r4, [pc, #24] ; (80000dc <__do_global_dtors_aux+0x1c>)
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80000c4: 7823 ldrb r3, [r4, #0]
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80000c6: 2b00 cmp r3, #0
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80000c8: d107 bne.n 80000da <__do_global_dtors_aux+0x1a>
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80000ca: 4b05 ldr r3, [pc, #20] ; (80000e0 <__do_global_dtors_aux+0x20>)
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80000cc: 2b00 cmp r3, #0
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80000ce: d002 beq.n 80000d6 <__do_global_dtors_aux+0x16>
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80000d0: 4804 ldr r0, [pc, #16] ; (80000e4 <__do_global_dtors_aux+0x24>)
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80000d2: e000 b.n 80000d6 <__do_global_dtors_aux+0x16>
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80000d4: bf00 nop
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80000d6: 2301 movs r3, #1
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80000d8: 7023 strb r3, [r4, #0]
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80000da: bd10 pop {r4, pc}
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80000dc: 2000000c .word 0x2000000c
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80000e0: 00000000 .word 0x00000000
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80000e4: 08002490 .word 0x08002490
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080000e8 <frame_dummy>:
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80000e8: 4b04 ldr r3, [pc, #16] ; (80000fc <frame_dummy+0x14>)
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80000ea: b510 push {r4, lr}
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80000ec: 2b00 cmp r3, #0
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80000ee: d003 beq.n 80000f8 <frame_dummy+0x10>
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80000f0: 4903 ldr r1, [pc, #12] ; (8000100 <frame_dummy+0x18>)
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80000f2: 4804 ldr r0, [pc, #16] ; (8000104 <frame_dummy+0x1c>)
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80000f4: e000 b.n 80000f8 <frame_dummy+0x10>
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80000f6: bf00 nop
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80000f8: bd10 pop {r4, pc}
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80000fa: 46c0 nop ; (mov r8, r8)
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80000fc: 00000000 .word 0x00000000
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8000100: 20000010 .word 0x20000010
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8000104: 08002490 .word 0x08002490
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08000108 <__udivsi3>:
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8000108: 2200 movs r2, #0
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800010a: 0843 lsrs r3, r0, #1
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800010c: 428b cmp r3, r1
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800010e: d374 bcc.n 80001fa <__udivsi3+0xf2>
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8000110: 0903 lsrs r3, r0, #4
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8000112: 428b cmp r3, r1
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8000114: d35f bcc.n 80001d6 <__udivsi3+0xce>
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8000116: 0a03 lsrs r3, r0, #8
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8000118: 428b cmp r3, r1
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800011a: d344 bcc.n 80001a6 <__udivsi3+0x9e>
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800011c: 0b03 lsrs r3, r0, #12
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800011e: 428b cmp r3, r1
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8000120: d328 bcc.n 8000174 <__udivsi3+0x6c>
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8000122: 0c03 lsrs r3, r0, #16
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8000124: 428b cmp r3, r1
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8000126: d30d bcc.n 8000144 <__udivsi3+0x3c>
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8000128: 22ff movs r2, #255 ; 0xff
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800012a: 0209 lsls r1, r1, #8
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800012c: ba12 rev r2, r2
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800012e: 0c03 lsrs r3, r0, #16
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8000130: 428b cmp r3, r1
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8000132: d302 bcc.n 800013a <__udivsi3+0x32>
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8000134: 1212 asrs r2, r2, #8
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8000136: 0209 lsls r1, r1, #8
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8000138: d065 beq.n 8000206 <__udivsi3+0xfe>
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800013a: 0b03 lsrs r3, r0, #12
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800013c: 428b cmp r3, r1
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800013e: d319 bcc.n 8000174 <__udivsi3+0x6c>
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8000140: e000 b.n 8000144 <__udivsi3+0x3c>
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8000142: 0a09 lsrs r1, r1, #8
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8000144: 0bc3 lsrs r3, r0, #15
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8000146: 428b cmp r3, r1
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8000148: d301 bcc.n 800014e <__udivsi3+0x46>
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800014a: 03cb lsls r3, r1, #15
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800014c: 1ac0 subs r0, r0, r3
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800014e: 4152 adcs r2, r2
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8000150: 0b83 lsrs r3, r0, #14
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8000152: 428b cmp r3, r1
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8000154: d301 bcc.n 800015a <__udivsi3+0x52>
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8000156: 038b lsls r3, r1, #14
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8000158: 1ac0 subs r0, r0, r3
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800015a: 4152 adcs r2, r2
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800015c: 0b43 lsrs r3, r0, #13
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800015e: 428b cmp r3, r1
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8000160: d301 bcc.n 8000166 <__udivsi3+0x5e>
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8000162: 034b lsls r3, r1, #13
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8000164: 1ac0 subs r0, r0, r3
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8000166: 4152 adcs r2, r2
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8000168: 0b03 lsrs r3, r0, #12
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800016a: 428b cmp r3, r1
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800016c: d301 bcc.n 8000172 <__udivsi3+0x6a>
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800016e: 030b lsls r3, r1, #12
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8000170: 1ac0 subs r0, r0, r3
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8000172: 4152 adcs r2, r2
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8000174: 0ac3 lsrs r3, r0, #11
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8000176: 428b cmp r3, r1
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8000178: d301 bcc.n 800017e <__udivsi3+0x76>
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800017a: 02cb lsls r3, r1, #11
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800017c: 1ac0 subs r0, r0, r3
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800017e: 4152 adcs r2, r2
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8000180: 0a83 lsrs r3, r0, #10
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8000182: 428b cmp r3, r1
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8000184: d301 bcc.n 800018a <__udivsi3+0x82>
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8000186: 028b lsls r3, r1, #10
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8000188: 1ac0 subs r0, r0, r3
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800018a: 4152 adcs r2, r2
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800018c: 0a43 lsrs r3, r0, #9
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800018e: 428b cmp r3, r1
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8000190: d301 bcc.n 8000196 <__udivsi3+0x8e>
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8000192: 024b lsls r3, r1, #9
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8000194: 1ac0 subs r0, r0, r3
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8000196: 4152 adcs r2, r2
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8000198: 0a03 lsrs r3, r0, #8
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800019a: 428b cmp r3, r1
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800019c: d301 bcc.n 80001a2 <__udivsi3+0x9a>
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800019e: 020b lsls r3, r1, #8
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80001a0: 1ac0 subs r0, r0, r3
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80001a2: 4152 adcs r2, r2
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80001a4: d2cd bcs.n 8000142 <__udivsi3+0x3a>
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80001a6: 09c3 lsrs r3, r0, #7
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80001a8: 428b cmp r3, r1
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80001aa: d301 bcc.n 80001b0 <__udivsi3+0xa8>
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80001ac: 01cb lsls r3, r1, #7
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80001ae: 1ac0 subs r0, r0, r3
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80001b0: 4152 adcs r2, r2
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80001b2: 0983 lsrs r3, r0, #6
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80001b4: 428b cmp r3, r1
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80001b6: d301 bcc.n 80001bc <__udivsi3+0xb4>
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80001b8: 018b lsls r3, r1, #6
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80001ba: 1ac0 subs r0, r0, r3
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80001bc: 4152 adcs r2, r2
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80001be: 0943 lsrs r3, r0, #5
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80001c0: 428b cmp r3, r1
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80001c2: d301 bcc.n 80001c8 <__udivsi3+0xc0>
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80001c4: 014b lsls r3, r1, #5
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80001c6: 1ac0 subs r0, r0, r3
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80001c8: 4152 adcs r2, r2
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80001ca: 0903 lsrs r3, r0, #4
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80001cc: 428b cmp r3, r1
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80001ce: d301 bcc.n 80001d4 <__udivsi3+0xcc>
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80001d0: 010b lsls r3, r1, #4
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80001d2: 1ac0 subs r0, r0, r3
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80001d4: 4152 adcs r2, r2
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80001d6: 08c3 lsrs r3, r0, #3
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80001d8: 428b cmp r3, r1
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80001da: d301 bcc.n 80001e0 <__udivsi3+0xd8>
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80001dc: 00cb lsls r3, r1, #3
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80001de: 1ac0 subs r0, r0, r3
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80001e0: 4152 adcs r2, r2
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80001e2: 0883 lsrs r3, r0, #2
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80001e4: 428b cmp r3, r1
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80001e6: d301 bcc.n 80001ec <__udivsi3+0xe4>
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80001e8: 008b lsls r3, r1, #2
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80001ea: 1ac0 subs r0, r0, r3
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80001ec: 4152 adcs r2, r2
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80001ee: 0843 lsrs r3, r0, #1
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80001f0: 428b cmp r3, r1
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80001f2: d301 bcc.n 80001f8 <__udivsi3+0xf0>
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80001f4: 004b lsls r3, r1, #1
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80001f6: 1ac0 subs r0, r0, r3
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80001f8: 4152 adcs r2, r2
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80001fa: 1a41 subs r1, r0, r1
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80001fc: d200 bcs.n 8000200 <__udivsi3+0xf8>
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80001fe: 4601 mov r1, r0
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8000200: 4152 adcs r2, r2
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8000202: 4610 mov r0, r2
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8000204: 4770 bx lr
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8000206: e7ff b.n 8000208 <__udivsi3+0x100>
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8000208: b501 push {r0, lr}
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800020a: 2000 movs r0, #0
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800020c: f000 f8f0 bl 80003f0 <__aeabi_idiv0>
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8000210: bd02 pop {r1, pc}
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8000212: 46c0 nop ; (mov r8, r8)
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08000214 <__aeabi_uidivmod>:
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8000214: 2900 cmp r1, #0
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8000216: d0f7 beq.n 8000208 <__udivsi3+0x100>
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8000218: e776 b.n 8000108 <__udivsi3>
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800021a: 4770 bx lr
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0800021c <__divsi3>:
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800021c: 4603 mov r3, r0
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800021e: 430b orrs r3, r1
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8000220: d47f bmi.n 8000322 <__divsi3+0x106>
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8000222: 2200 movs r2, #0
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8000224: 0843 lsrs r3, r0, #1
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8000226: 428b cmp r3, r1
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8000228: d374 bcc.n 8000314 <__divsi3+0xf8>
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800022a: 0903 lsrs r3, r0, #4
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800022c: 428b cmp r3, r1
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800022e: d35f bcc.n 80002f0 <__divsi3+0xd4>
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8000230: 0a03 lsrs r3, r0, #8
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8000232: 428b cmp r3, r1
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8000234: d344 bcc.n 80002c0 <__divsi3+0xa4>
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8000236: 0b03 lsrs r3, r0, #12
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8000238: 428b cmp r3, r1
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800023a: d328 bcc.n 800028e <__divsi3+0x72>
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800023c: 0c03 lsrs r3, r0, #16
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800023e: 428b cmp r3, r1
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8000240: d30d bcc.n 800025e <__divsi3+0x42>
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8000242: 22ff movs r2, #255 ; 0xff
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8000244: 0209 lsls r1, r1, #8
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8000246: ba12 rev r2, r2
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8000248: 0c03 lsrs r3, r0, #16
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800024a: 428b cmp r3, r1
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800024c: d302 bcc.n 8000254 <__divsi3+0x38>
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800024e: 1212 asrs r2, r2, #8
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8000250: 0209 lsls r1, r1, #8
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8000252: d065 beq.n 8000320 <__divsi3+0x104>
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8000254: 0b03 lsrs r3, r0, #12
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8000256: 428b cmp r3, r1
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8000258: d319 bcc.n 800028e <__divsi3+0x72>
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800025a: e000 b.n 800025e <__divsi3+0x42>
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800025c: 0a09 lsrs r1, r1, #8
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800025e: 0bc3 lsrs r3, r0, #15
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8000260: 428b cmp r3, r1
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8000262: d301 bcc.n 8000268 <__divsi3+0x4c>
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8000264: 03cb lsls r3, r1, #15
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8000266: 1ac0 subs r0, r0, r3
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8000268: 4152 adcs r2, r2
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800026a: 0b83 lsrs r3, r0, #14
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800026c: 428b cmp r3, r1
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800026e: d301 bcc.n 8000274 <__divsi3+0x58>
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8000270: 038b lsls r3, r1, #14
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8000272: 1ac0 subs r0, r0, r3
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8000274: 4152 adcs r2, r2
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8000276: 0b43 lsrs r3, r0, #13
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8000278: 428b cmp r3, r1
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800027a: d301 bcc.n 8000280 <__divsi3+0x64>
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800027c: 034b lsls r3, r1, #13
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800027e: 1ac0 subs r0, r0, r3
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8000280: 4152 adcs r2, r2
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8000282: 0b03 lsrs r3, r0, #12
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8000284: 428b cmp r3, r1
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8000286: d301 bcc.n 800028c <__divsi3+0x70>
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8000288: 030b lsls r3, r1, #12
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800028a: 1ac0 subs r0, r0, r3
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800028c: 4152 adcs r2, r2
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800028e: 0ac3 lsrs r3, r0, #11
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8000290: 428b cmp r3, r1
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8000292: d301 bcc.n 8000298 <__divsi3+0x7c>
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8000294: 02cb lsls r3, r1, #11
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8000296: 1ac0 subs r0, r0, r3
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8000298: 4152 adcs r2, r2
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800029a: 0a83 lsrs r3, r0, #10
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800029c: 428b cmp r3, r1
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800029e: d301 bcc.n 80002a4 <__divsi3+0x88>
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80002a0: 028b lsls r3, r1, #10
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80002a2: 1ac0 subs r0, r0, r3
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80002a4: 4152 adcs r2, r2
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80002a6: 0a43 lsrs r3, r0, #9
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80002a8: 428b cmp r3, r1
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80002aa: d301 bcc.n 80002b0 <__divsi3+0x94>
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80002ac: 024b lsls r3, r1, #9
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80002ae: 1ac0 subs r0, r0, r3
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80002b0: 4152 adcs r2, r2
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80002b2: 0a03 lsrs r3, r0, #8
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80002b4: 428b cmp r3, r1
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80002b6: d301 bcc.n 80002bc <__divsi3+0xa0>
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80002b8: 020b lsls r3, r1, #8
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80002ba: 1ac0 subs r0, r0, r3
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80002bc: 4152 adcs r2, r2
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80002be: d2cd bcs.n 800025c <__divsi3+0x40>
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80002c0: 09c3 lsrs r3, r0, #7
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80002c2: 428b cmp r3, r1
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80002c4: d301 bcc.n 80002ca <__divsi3+0xae>
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80002c6: 01cb lsls r3, r1, #7
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80002c8: 1ac0 subs r0, r0, r3
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80002ca: 4152 adcs r2, r2
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80002cc: 0983 lsrs r3, r0, #6
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80002ce: 428b cmp r3, r1
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80002d0: d301 bcc.n 80002d6 <__divsi3+0xba>
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80002d2: 018b lsls r3, r1, #6
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80002d4: 1ac0 subs r0, r0, r3
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80002d6: 4152 adcs r2, r2
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80002d8: 0943 lsrs r3, r0, #5
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80002da: 428b cmp r3, r1
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80002dc: d301 bcc.n 80002e2 <__divsi3+0xc6>
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80002de: 014b lsls r3, r1, #5
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80002e0: 1ac0 subs r0, r0, r3
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80002e2: 4152 adcs r2, r2
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80002e4: 0903 lsrs r3, r0, #4
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80002e6: 428b cmp r3, r1
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80002e8: d301 bcc.n 80002ee <__divsi3+0xd2>
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80002ea: 010b lsls r3, r1, #4
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80002ec: 1ac0 subs r0, r0, r3
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80002ee: 4152 adcs r2, r2
|
|
80002f0: 08c3 lsrs r3, r0, #3
|
|
80002f2: 428b cmp r3, r1
|
|
80002f4: d301 bcc.n 80002fa <__divsi3+0xde>
|
|
80002f6: 00cb lsls r3, r1, #3
|
|
80002f8: 1ac0 subs r0, r0, r3
|
|
80002fa: 4152 adcs r2, r2
|
|
80002fc: 0883 lsrs r3, r0, #2
|
|
80002fe: 428b cmp r3, r1
|
|
8000300: d301 bcc.n 8000306 <__divsi3+0xea>
|
|
8000302: 008b lsls r3, r1, #2
|
|
8000304: 1ac0 subs r0, r0, r3
|
|
8000306: 4152 adcs r2, r2
|
|
8000308: 0843 lsrs r3, r0, #1
|
|
800030a: 428b cmp r3, r1
|
|
800030c: d301 bcc.n 8000312 <__divsi3+0xf6>
|
|
800030e: 004b lsls r3, r1, #1
|
|
8000310: 1ac0 subs r0, r0, r3
|
|
8000312: 4152 adcs r2, r2
|
|
8000314: 1a41 subs r1, r0, r1
|
|
8000316: d200 bcs.n 800031a <__divsi3+0xfe>
|
|
8000318: 4601 mov r1, r0
|
|
800031a: 4152 adcs r2, r2
|
|
800031c: 4610 mov r0, r2
|
|
800031e: 4770 bx lr
|
|
8000320: e05d b.n 80003de <__divsi3+0x1c2>
|
|
8000322: 0fca lsrs r2, r1, #31
|
|
8000324: d000 beq.n 8000328 <__divsi3+0x10c>
|
|
8000326: 4249 negs r1, r1
|
|
8000328: 1003 asrs r3, r0, #32
|
|
800032a: d300 bcc.n 800032e <__divsi3+0x112>
|
|
800032c: 4240 negs r0, r0
|
|
800032e: 4053 eors r3, r2
|
|
8000330: 2200 movs r2, #0
|
|
8000332: 469c mov ip, r3
|
|
8000334: 0903 lsrs r3, r0, #4
|
|
8000336: 428b cmp r3, r1
|
|
8000338: d32d bcc.n 8000396 <__divsi3+0x17a>
|
|
800033a: 0a03 lsrs r3, r0, #8
|
|
800033c: 428b cmp r3, r1
|
|
800033e: d312 bcc.n 8000366 <__divsi3+0x14a>
|
|
8000340: 22fc movs r2, #252 ; 0xfc
|
|
8000342: 0189 lsls r1, r1, #6
|
|
8000344: ba12 rev r2, r2
|
|
8000346: 0a03 lsrs r3, r0, #8
|
|
8000348: 428b cmp r3, r1
|
|
800034a: d30c bcc.n 8000366 <__divsi3+0x14a>
|
|
800034c: 0189 lsls r1, r1, #6
|
|
800034e: 1192 asrs r2, r2, #6
|
|
8000350: 428b cmp r3, r1
|
|
8000352: d308 bcc.n 8000366 <__divsi3+0x14a>
|
|
8000354: 0189 lsls r1, r1, #6
|
|
8000356: 1192 asrs r2, r2, #6
|
|
8000358: 428b cmp r3, r1
|
|
800035a: d304 bcc.n 8000366 <__divsi3+0x14a>
|
|
800035c: 0189 lsls r1, r1, #6
|
|
800035e: d03a beq.n 80003d6 <__divsi3+0x1ba>
|
|
8000360: 1192 asrs r2, r2, #6
|
|
8000362: e000 b.n 8000366 <__divsi3+0x14a>
|
|
8000364: 0989 lsrs r1, r1, #6
|
|
8000366: 09c3 lsrs r3, r0, #7
|
|
8000368: 428b cmp r3, r1
|
|
800036a: d301 bcc.n 8000370 <__divsi3+0x154>
|
|
800036c: 01cb lsls r3, r1, #7
|
|
800036e: 1ac0 subs r0, r0, r3
|
|
8000370: 4152 adcs r2, r2
|
|
8000372: 0983 lsrs r3, r0, #6
|
|
8000374: 428b cmp r3, r1
|
|
8000376: d301 bcc.n 800037c <__divsi3+0x160>
|
|
8000378: 018b lsls r3, r1, #6
|
|
800037a: 1ac0 subs r0, r0, r3
|
|
800037c: 4152 adcs r2, r2
|
|
800037e: 0943 lsrs r3, r0, #5
|
|
8000380: 428b cmp r3, r1
|
|
8000382: d301 bcc.n 8000388 <__divsi3+0x16c>
|
|
8000384: 014b lsls r3, r1, #5
|
|
8000386: 1ac0 subs r0, r0, r3
|
|
8000388: 4152 adcs r2, r2
|
|
800038a: 0903 lsrs r3, r0, #4
|
|
800038c: 428b cmp r3, r1
|
|
800038e: d301 bcc.n 8000394 <__divsi3+0x178>
|
|
8000390: 010b lsls r3, r1, #4
|
|
8000392: 1ac0 subs r0, r0, r3
|
|
8000394: 4152 adcs r2, r2
|
|
8000396: 08c3 lsrs r3, r0, #3
|
|
8000398: 428b cmp r3, r1
|
|
800039a: d301 bcc.n 80003a0 <__divsi3+0x184>
|
|
800039c: 00cb lsls r3, r1, #3
|
|
800039e: 1ac0 subs r0, r0, r3
|
|
80003a0: 4152 adcs r2, r2
|
|
80003a2: 0883 lsrs r3, r0, #2
|
|
80003a4: 428b cmp r3, r1
|
|
80003a6: d301 bcc.n 80003ac <__divsi3+0x190>
|
|
80003a8: 008b lsls r3, r1, #2
|
|
80003aa: 1ac0 subs r0, r0, r3
|
|
80003ac: 4152 adcs r2, r2
|
|
80003ae: d2d9 bcs.n 8000364 <__divsi3+0x148>
|
|
80003b0: 0843 lsrs r3, r0, #1
|
|
80003b2: 428b cmp r3, r1
|
|
80003b4: d301 bcc.n 80003ba <__divsi3+0x19e>
|
|
80003b6: 004b lsls r3, r1, #1
|
|
80003b8: 1ac0 subs r0, r0, r3
|
|
80003ba: 4152 adcs r2, r2
|
|
80003bc: 1a41 subs r1, r0, r1
|
|
80003be: d200 bcs.n 80003c2 <__divsi3+0x1a6>
|
|
80003c0: 4601 mov r1, r0
|
|
80003c2: 4663 mov r3, ip
|
|
80003c4: 4152 adcs r2, r2
|
|
80003c6: 105b asrs r3, r3, #1
|
|
80003c8: 4610 mov r0, r2
|
|
80003ca: d301 bcc.n 80003d0 <__divsi3+0x1b4>
|
|
80003cc: 4240 negs r0, r0
|
|
80003ce: 2b00 cmp r3, #0
|
|
80003d0: d500 bpl.n 80003d4 <__divsi3+0x1b8>
|
|
80003d2: 4249 negs r1, r1
|
|
80003d4: 4770 bx lr
|
|
80003d6: 4663 mov r3, ip
|
|
80003d8: 105b asrs r3, r3, #1
|
|
80003da: d300 bcc.n 80003de <__divsi3+0x1c2>
|
|
80003dc: 4240 negs r0, r0
|
|
80003de: b501 push {r0, lr}
|
|
80003e0: 2000 movs r0, #0
|
|
80003e2: f000 f805 bl 80003f0 <__aeabi_idiv0>
|
|
80003e6: bd02 pop {r1, pc}
|
|
|
|
080003e8 <__aeabi_idivmod>:
|
|
80003e8: 2900 cmp r1, #0
|
|
80003ea: d0f8 beq.n 80003de <__divsi3+0x1c2>
|
|
80003ec: e716 b.n 800021c <__divsi3>
|
|
80003ee: 4770 bx lr
|
|
|
|
080003f0 <__aeabi_idiv0>:
|
|
80003f0: 4770 bx lr
|
|
80003f2: 46c0 nop ; (mov r8, r8)
|
|
|
|
080003f4 <main>:
|
|
/**
|
|
* @brief The application entry point.
|
|
* @retval int
|
|
*/
|
|
int main(void)
|
|
{
|
|
80003f4: b580 push {r7, lr}
|
|
80003f6: af00 add r7, sp, #0
|
|
/* USER CODE END 1 */
|
|
|
|
/* MCU Configuration--------------------------------------------------------*/
|
|
|
|
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
|
HAL_Init();
|
|
80003f8: f000 f93e bl 8000678 <HAL_Init>
|
|
/* USER CODE BEGIN Init */
|
|
|
|
/* USER CODE END Init */
|
|
|
|
/* Configure the system clock */
|
|
SystemClock_Config();
|
|
80003fc: f000 f805 bl 800040a <SystemClock_Config>
|
|
/* USER CODE BEGIN SysInit */
|
|
|
|
/* USER CODE END SysInit */
|
|
|
|
/* Initialize all configured peripherals */
|
|
MX_GPIO_Init();
|
|
8000400: f000 f84e bl 80004a0 <MX_GPIO_Init>
|
|
/* USER CODE BEGIN 2 */
|
|
|
|
my_code();
|
|
8000404: f001 fc06 bl 8001c14 <my_code>
|
|
/* USER CODE END 2 */
|
|
|
|
/* Infinite loop */
|
|
/* USER CODE BEGIN WHILE */
|
|
while (1)
|
|
8000408: e7fe b.n 8000408 <main+0x14>
|
|
|
|
0800040a <SystemClock_Config>:
|
|
/**
|
|
* @brief System Clock Configuration
|
|
* @retval None
|
|
*/
|
|
void SystemClock_Config(void)
|
|
{
|
|
800040a: b590 push {r4, r7, lr}
|
|
800040c: b091 sub sp, #68 ; 0x44
|
|
800040e: af00 add r7, sp, #0
|
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
|
8000410: 2410 movs r4, #16
|
|
8000412: 193b adds r3, r7, r4
|
|
8000414: 0018 movs r0, r3
|
|
8000416: 2330 movs r3, #48 ; 0x30
|
|
8000418: 001a movs r2, r3
|
|
800041a: 2100 movs r1, #0
|
|
800041c: f002 f830 bl 8002480 <memset>
|
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
|
8000420: 003b movs r3, r7
|
|
8000422: 0018 movs r0, r3
|
|
8000424: 2310 movs r3, #16
|
|
8000426: 001a movs r2, r3
|
|
8000428: 2100 movs r1, #0
|
|
800042a: f002 f829 bl 8002480 <memset>
|
|
|
|
/** Initializes the RCC Oscillators according to the specified parameters
|
|
* in the RCC_OscInitTypeDef structure.
|
|
*/
|
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
|
|
800042e: 0021 movs r1, r4
|
|
8000430: 187b adds r3, r7, r1
|
|
8000432: 2202 movs r2, #2
|
|
8000434: 601a str r2, [r3, #0]
|
|
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
|
8000436: 187b adds r3, r7, r1
|
|
8000438: 2201 movs r2, #1
|
|
800043a: 60da str r2, [r3, #12]
|
|
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
|
800043c: 187b adds r3, r7, r1
|
|
800043e: 2210 movs r2, #16
|
|
8000440: 611a str r2, [r3, #16]
|
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
|
8000442: 187b adds r3, r7, r1
|
|
8000444: 2202 movs r2, #2
|
|
8000446: 621a str r2, [r3, #32]
|
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
|
8000448: 187b adds r3, r7, r1
|
|
800044a: 2200 movs r2, #0
|
|
800044c: 625a str r2, [r3, #36] ; 0x24
|
|
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12;
|
|
800044e: 187b adds r3, r7, r1
|
|
8000450: 22a0 movs r2, #160 ; 0xa0
|
|
8000452: 0392 lsls r2, r2, #14
|
|
8000454: 629a str r2, [r3, #40] ; 0x28
|
|
RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1;
|
|
8000456: 187b adds r3, r7, r1
|
|
8000458: 2200 movs r2, #0
|
|
800045a: 62da str r2, [r3, #44] ; 0x2c
|
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
|
800045c: 187b adds r3, r7, r1
|
|
800045e: 0018 movs r0, r3
|
|
8000460: f000 fbcc bl 8000bfc <HAL_RCC_OscConfig>
|
|
8000464: 1e03 subs r3, r0, #0
|
|
8000466: d001 beq.n 800046c <SystemClock_Config+0x62>
|
|
{
|
|
Error_Handler();
|
|
8000468: f000 f896 bl 8000598 <Error_Handler>
|
|
}
|
|
/** Initializes the CPU, AHB and APB buses clocks
|
|
*/
|
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
|
800046c: 003b movs r3, r7
|
|
800046e: 2207 movs r2, #7
|
|
8000470: 601a str r2, [r3, #0]
|
|
|RCC_CLOCKTYPE_PCLK1;
|
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
|
8000472: 003b movs r3, r7
|
|
8000474: 2202 movs r2, #2
|
|
8000476: 605a str r2, [r3, #4]
|
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
|
8000478: 003b movs r3, r7
|
|
800047a: 2200 movs r2, #0
|
|
800047c: 609a str r2, [r3, #8]
|
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
|
800047e: 003b movs r3, r7
|
|
8000480: 2200 movs r2, #0
|
|
8000482: 60da str r2, [r3, #12]
|
|
|
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
|
|
8000484: 003b movs r3, r7
|
|
8000486: 2101 movs r1, #1
|
|
8000488: 0018 movs r0, r3
|
|
800048a: f000 fed1 bl 8001230 <HAL_RCC_ClockConfig>
|
|
800048e: 1e03 subs r3, r0, #0
|
|
8000490: d001 beq.n 8000496 <SystemClock_Config+0x8c>
|
|
{
|
|
Error_Handler();
|
|
8000492: f000 f881 bl 8000598 <Error_Handler>
|
|
}
|
|
}
|
|
8000496: 46c0 nop ; (mov r8, r8)
|
|
8000498: 46bd mov sp, r7
|
|
800049a: b011 add sp, #68 ; 0x44
|
|
800049c: bd90 pop {r4, r7, pc}
|
|
...
|
|
|
|
080004a0 <MX_GPIO_Init>:
|
|
* @brief GPIO Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_GPIO_Init(void)
|
|
{
|
|
80004a0: b590 push {r4, r7, lr}
|
|
80004a2: b089 sub sp, #36 ; 0x24
|
|
80004a4: af00 add r7, sp, #0
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
80004a6: 240c movs r4, #12
|
|
80004a8: 193b adds r3, r7, r4
|
|
80004aa: 0018 movs r0, r3
|
|
80004ac: 2314 movs r3, #20
|
|
80004ae: 001a movs r2, r3
|
|
80004b0: 2100 movs r1, #0
|
|
80004b2: f001 ffe5 bl 8002480 <memset>
|
|
|
|
/* GPIO Ports Clock Enable */
|
|
__HAL_RCC_GPIOF_CLK_ENABLE();
|
|
80004b6: 4b36 ldr r3, [pc, #216] ; (8000590 <MX_GPIO_Init+0xf0>)
|
|
80004b8: 695a ldr r2, [r3, #20]
|
|
80004ba: 4b35 ldr r3, [pc, #212] ; (8000590 <MX_GPIO_Init+0xf0>)
|
|
80004bc: 2180 movs r1, #128 ; 0x80
|
|
80004be: 03c9 lsls r1, r1, #15
|
|
80004c0: 430a orrs r2, r1
|
|
80004c2: 615a str r2, [r3, #20]
|
|
80004c4: 4b32 ldr r3, [pc, #200] ; (8000590 <MX_GPIO_Init+0xf0>)
|
|
80004c6: 695a ldr r2, [r3, #20]
|
|
80004c8: 2380 movs r3, #128 ; 0x80
|
|
80004ca: 03db lsls r3, r3, #15
|
|
80004cc: 4013 ands r3, r2
|
|
80004ce: 60bb str r3, [r7, #8]
|
|
80004d0: 68bb ldr r3, [r7, #8]
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
80004d2: 4b2f ldr r3, [pc, #188] ; (8000590 <MX_GPIO_Init+0xf0>)
|
|
80004d4: 695a ldr r2, [r3, #20]
|
|
80004d6: 4b2e ldr r3, [pc, #184] ; (8000590 <MX_GPIO_Init+0xf0>)
|
|
80004d8: 2180 movs r1, #128 ; 0x80
|
|
80004da: 0289 lsls r1, r1, #10
|
|
80004dc: 430a orrs r2, r1
|
|
80004de: 615a str r2, [r3, #20]
|
|
80004e0: 4b2b ldr r3, [pc, #172] ; (8000590 <MX_GPIO_Init+0xf0>)
|
|
80004e2: 695a ldr r2, [r3, #20]
|
|
80004e4: 2380 movs r3, #128 ; 0x80
|
|
80004e6: 029b lsls r3, r3, #10
|
|
80004e8: 4013 ands r3, r2
|
|
80004ea: 607b str r3, [r7, #4]
|
|
80004ec: 687b ldr r3, [r7, #4]
|
|
|
|
/*Configure GPIO pin Output Level */
|
|
HAL_GPIO_WritePin(GPIOA, U_T_Pin|HC595_DLK_Pin|HC595_SLK_Pin|HC595_RLK_Pin
|
|
80004ee: 23b9 movs r3, #185 ; 0xb9
|
|
80004f0: 0099 lsls r1, r3, #2
|
|
80004f2: 2390 movs r3, #144 ; 0x90
|
|
80004f4: 05db lsls r3, r3, #23
|
|
80004f6: 2200 movs r2, #0
|
|
80004f8: 0018 movs r0, r3
|
|
80004fa: f000 fb62 bl 8000bc2 <HAL_GPIO_WritePin>
|
|
|HC595_SLK2_Pin, GPIO_PIN_RESET);
|
|
|
|
/*Configure GPIO pins : MOT_IN1_Pin MOT_IN2_Pin */
|
|
GPIO_InitStruct.Pin = MOT_IN1_Pin|MOT_IN2_Pin;
|
|
80004fe: 193b adds r3, r7, r4
|
|
8000500: 2203 movs r2, #3
|
|
8000502: 601a str r2, [r3, #0]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
8000504: 193b adds r3, r7, r4
|
|
8000506: 2200 movs r2, #0
|
|
8000508: 605a str r2, [r3, #4]
|
|
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
|
|
800050a: 193b adds r3, r7, r4
|
|
800050c: 2202 movs r2, #2
|
|
800050e: 609a str r2, [r3, #8]
|
|
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
|
|
8000510: 193b adds r3, r7, r4
|
|
8000512: 4a20 ldr r2, [pc, #128] ; (8000594 <MX_GPIO_Init+0xf4>)
|
|
8000514: 0019 movs r1, r3
|
|
8000516: 0010 movs r0, r2
|
|
8000518: f000 f9c6 bl 80008a8 <HAL_GPIO_Init>
|
|
|
|
/*Configure GPIO pins : ADC_CH0_Pin ADC_CH1_Pin */
|
|
GPIO_InitStruct.Pin = ADC_CH0_Pin|ADC_CH1_Pin;
|
|
800051c: 193b adds r3, r7, r4
|
|
800051e: 2203 movs r2, #3
|
|
8000520: 601a str r2, [r3, #0]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
|
8000522: 193b adds r3, r7, r4
|
|
8000524: 2203 movs r2, #3
|
|
8000526: 605a str r2, [r3, #4]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
8000528: 193b adds r3, r7, r4
|
|
800052a: 2200 movs r2, #0
|
|
800052c: 609a str r2, [r3, #8]
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
800052e: 193a adds r2, r7, r4
|
|
8000530: 2390 movs r3, #144 ; 0x90
|
|
8000532: 05db lsls r3, r3, #23
|
|
8000534: 0011 movs r1, r2
|
|
8000536: 0018 movs r0, r3
|
|
8000538: f000 f9b6 bl 80008a8 <HAL_GPIO_Init>
|
|
|
|
/*Configure GPIO pins : U_T_Pin HC595_DLK_Pin HC595_SLK_Pin HC595_RLK_Pin
|
|
HC595_SLK2_Pin */
|
|
GPIO_InitStruct.Pin = U_T_Pin|HC595_DLK_Pin|HC595_SLK_Pin|HC595_RLK_Pin
|
|
800053c: 0021 movs r1, r4
|
|
800053e: 187b adds r3, r7, r1
|
|
8000540: 22b9 movs r2, #185 ; 0xb9
|
|
8000542: 0092 lsls r2, r2, #2
|
|
8000544: 601a str r2, [r3, #0]
|
|
|HC595_SLK2_Pin;
|
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
|
8000546: 000c movs r4, r1
|
|
8000548: 193b adds r3, r7, r4
|
|
800054a: 2201 movs r2, #1
|
|
800054c: 605a str r2, [r3, #4]
|
|
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
|
|
800054e: 193b adds r3, r7, r4
|
|
8000550: 2202 movs r2, #2
|
|
8000552: 609a str r2, [r3, #8]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
8000554: 193b adds r3, r7, r4
|
|
8000556: 2203 movs r2, #3
|
|
8000558: 60da str r2, [r3, #12]
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
800055a: 193a adds r2, r7, r4
|
|
800055c: 2390 movs r3, #144 ; 0x90
|
|
800055e: 05db lsls r3, r3, #23
|
|
8000560: 0011 movs r1, r2
|
|
8000562: 0018 movs r0, r3
|
|
8000564: f000 f9a0 bl 80008a8 <HAL_GPIO_Init>
|
|
|
|
/*Configure GPIO pins : U_R_Pin I_R_Pin */
|
|
GPIO_InitStruct.Pin = U_R_Pin|I_R_Pin;
|
|
8000568: 193b adds r3, r7, r4
|
|
800056a: 2218 movs r2, #24
|
|
800056c: 601a str r2, [r3, #0]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
800056e: 193b adds r3, r7, r4
|
|
8000570: 2200 movs r2, #0
|
|
8000572: 605a str r2, [r3, #4]
|
|
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
|
|
8000574: 193b adds r3, r7, r4
|
|
8000576: 2202 movs r2, #2
|
|
8000578: 609a str r2, [r3, #8]
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
800057a: 193a adds r2, r7, r4
|
|
800057c: 2390 movs r3, #144 ; 0x90
|
|
800057e: 05db lsls r3, r3, #23
|
|
8000580: 0011 movs r1, r2
|
|
8000582: 0018 movs r0, r3
|
|
8000584: f000 f990 bl 80008a8 <HAL_GPIO_Init>
|
|
|
|
}
|
|
8000588: 46c0 nop ; (mov r8, r8)
|
|
800058a: 46bd mov sp, r7
|
|
800058c: b009 add sp, #36 ; 0x24
|
|
800058e: bd90 pop {r4, r7, pc}
|
|
8000590: 40021000 .word 0x40021000
|
|
8000594: 48001400 .word 0x48001400
|
|
|
|
08000598 <Error_Handler>:
|
|
/**
|
|
* @brief This function is executed in case of error occurrence.
|
|
* @retval None
|
|
*/
|
|
void Error_Handler(void)
|
|
{
|
|
8000598: b580 push {r7, lr}
|
|
800059a: af00 add r7, sp, #0
|
|
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
|
Can only be executed in Privileged modes.
|
|
*/
|
|
__STATIC_FORCEINLINE void __disable_irq(void)
|
|
{
|
|
__ASM volatile ("cpsid i" : : : "memory");
|
|
800059c: b672 cpsid i
|
|
}
|
|
800059e: 46c0 nop ; (mov r8, r8)
|
|
/* USER CODE BEGIN Error_Handler_Debug */
|
|
/* User can add his own implementation to report the HAL error return state */
|
|
__disable_irq();
|
|
while (1)
|
|
80005a0: e7fe b.n 80005a0 <Error_Handler+0x8>
|
|
...
|
|
|
|
080005a4 <HAL_MspInit>:
|
|
/* USER CODE END 0 */
|
|
/**
|
|
* Initializes the Global MSP.
|
|
*/
|
|
void HAL_MspInit(void)
|
|
{
|
|
80005a4: b580 push {r7, lr}
|
|
80005a6: b082 sub sp, #8
|
|
80005a8: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN MspInit 0 */
|
|
|
|
/* USER CODE END MspInit 0 */
|
|
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
|
80005aa: 4b0f ldr r3, [pc, #60] ; (80005e8 <HAL_MspInit+0x44>)
|
|
80005ac: 699a ldr r2, [r3, #24]
|
|
80005ae: 4b0e ldr r3, [pc, #56] ; (80005e8 <HAL_MspInit+0x44>)
|
|
80005b0: 2101 movs r1, #1
|
|
80005b2: 430a orrs r2, r1
|
|
80005b4: 619a str r2, [r3, #24]
|
|
80005b6: 4b0c ldr r3, [pc, #48] ; (80005e8 <HAL_MspInit+0x44>)
|
|
80005b8: 699b ldr r3, [r3, #24]
|
|
80005ba: 2201 movs r2, #1
|
|
80005bc: 4013 ands r3, r2
|
|
80005be: 607b str r3, [r7, #4]
|
|
80005c0: 687b ldr r3, [r7, #4]
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
80005c2: 4b09 ldr r3, [pc, #36] ; (80005e8 <HAL_MspInit+0x44>)
|
|
80005c4: 69da ldr r2, [r3, #28]
|
|
80005c6: 4b08 ldr r3, [pc, #32] ; (80005e8 <HAL_MspInit+0x44>)
|
|
80005c8: 2180 movs r1, #128 ; 0x80
|
|
80005ca: 0549 lsls r1, r1, #21
|
|
80005cc: 430a orrs r2, r1
|
|
80005ce: 61da str r2, [r3, #28]
|
|
80005d0: 4b05 ldr r3, [pc, #20] ; (80005e8 <HAL_MspInit+0x44>)
|
|
80005d2: 69da ldr r2, [r3, #28]
|
|
80005d4: 2380 movs r3, #128 ; 0x80
|
|
80005d6: 055b lsls r3, r3, #21
|
|
80005d8: 4013 ands r3, r2
|
|
80005da: 603b str r3, [r7, #0]
|
|
80005dc: 683b ldr r3, [r7, #0]
|
|
/* System interrupt init*/
|
|
|
|
/* USER CODE BEGIN MspInit 1 */
|
|
|
|
/* USER CODE END MspInit 1 */
|
|
}
|
|
80005de: 46c0 nop ; (mov r8, r8)
|
|
80005e0: 46bd mov sp, r7
|
|
80005e2: b002 add sp, #8
|
|
80005e4: bd80 pop {r7, pc}
|
|
80005e6: 46c0 nop ; (mov r8, r8)
|
|
80005e8: 40021000 .word 0x40021000
|
|
|
|
080005ec <NMI_Handler>:
|
|
/******************************************************************************/
|
|
/**
|
|
* @brief This function handles Non maskable interrupt.
|
|
*/
|
|
void NMI_Handler(void)
|
|
{
|
|
80005ec: b580 push {r7, lr}
|
|
80005ee: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
|
|
|
/* USER CODE END NonMaskableInt_IRQn 0 */
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
|
while (1)
|
|
80005f0: e7fe b.n 80005f0 <NMI_Handler+0x4>
|
|
|
|
080005f2 <HardFault_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Hard fault interrupt.
|
|
*/
|
|
void HardFault_Handler(void)
|
|
{
|
|
80005f2: b580 push {r7, lr}
|
|
80005f4: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN HardFault_IRQn 0 */
|
|
|
|
/* USER CODE END HardFault_IRQn 0 */
|
|
while (1)
|
|
80005f6: e7fe b.n 80005f6 <HardFault_Handler+0x4>
|
|
|
|
080005f8 <SVC_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles System service call via SWI instruction.
|
|
*/
|
|
void SVC_Handler(void)
|
|
{
|
|
80005f8: b580 push {r7, lr}
|
|
80005fa: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END SVC_IRQn 0 */
|
|
/* USER CODE BEGIN SVC_IRQn 1 */
|
|
|
|
/* USER CODE END SVC_IRQn 1 */
|
|
}
|
|
80005fc: 46c0 nop ; (mov r8, r8)
|
|
80005fe: 46bd mov sp, r7
|
|
8000600: bd80 pop {r7, pc}
|
|
|
|
08000602 <PendSV_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Pendable request for system service.
|
|
*/
|
|
void PendSV_Handler(void)
|
|
{
|
|
8000602: b580 push {r7, lr}
|
|
8000604: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END PendSV_IRQn 0 */
|
|
/* USER CODE BEGIN PendSV_IRQn 1 */
|
|
|
|
/* USER CODE END PendSV_IRQn 1 */
|
|
}
|
|
8000606: 46c0 nop ; (mov r8, r8)
|
|
8000608: 46bd mov sp, r7
|
|
800060a: bd80 pop {r7, pc}
|
|
|
|
0800060c <SysTick_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles System tick timer.
|
|
*/
|
|
void SysTick_Handler(void)
|
|
{
|
|
800060c: b580 push {r7, lr}
|
|
800060e: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN SysTick_IRQn 0 */
|
|
|
|
/* USER CODE END SysTick_IRQn 0 */
|
|
HAL_IncTick();
|
|
8000610: f000 f87a bl 8000708 <HAL_IncTick>
|
|
/* USER CODE BEGIN SysTick_IRQn 1 */
|
|
|
|
/* USER CODE END SysTick_IRQn 1 */
|
|
}
|
|
8000614: 46c0 nop ; (mov r8, r8)
|
|
8000616: 46bd mov sp, r7
|
|
8000618: bd80 pop {r7, pc}
|
|
|
|
0800061a <SystemInit>:
|
|
* @brief Setup the microcontroller system
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
void SystemInit(void)
|
|
{
|
|
800061a: b580 push {r7, lr}
|
|
800061c: af00 add r7, sp, #0
|
|
before branch to main program. This call is made inside
|
|
the "startup_stm32f0xx.s" file.
|
|
User can setups the default system clock (System clock source, PLL Multiplier
|
|
and Divider factors, AHB/APBx prescalers and Flash settings).
|
|
*/
|
|
}
|
|
800061e: 46c0 nop ; (mov r8, r8)
|
|
8000620: 46bd mov sp, r7
|
|
8000622: bd80 pop {r7, pc}
|
|
|
|
08000624 <Reset_Handler>:
|
|
|
|
.section .text.Reset_Handler
|
|
.weak Reset_Handler
|
|
.type Reset_Handler, %function
|
|
Reset_Handler:
|
|
ldr r0, =_estack
|
|
8000624: 480d ldr r0, [pc, #52] ; (800065c <LoopForever+0x2>)
|
|
mov sp, r0 /* set stack pointer */
|
|
8000626: 4685 mov sp, r0
|
|
|
|
/* Copy the data segment initializers from flash to SRAM */
|
|
ldr r0, =_sdata
|
|
8000628: 480d ldr r0, [pc, #52] ; (8000660 <LoopForever+0x6>)
|
|
ldr r1, =_edata
|
|
800062a: 490e ldr r1, [pc, #56] ; (8000664 <LoopForever+0xa>)
|
|
ldr r2, =_sidata
|
|
800062c: 4a0e ldr r2, [pc, #56] ; (8000668 <LoopForever+0xe>)
|
|
movs r3, #0
|
|
800062e: 2300 movs r3, #0
|
|
b LoopCopyDataInit
|
|
8000630: e002 b.n 8000638 <LoopCopyDataInit>
|
|
|
|
08000632 <CopyDataInit>:
|
|
|
|
CopyDataInit:
|
|
ldr r4, [r2, r3]
|
|
8000632: 58d4 ldr r4, [r2, r3]
|
|
str r4, [r0, r3]
|
|
8000634: 50c4 str r4, [r0, r3]
|
|
adds r3, r3, #4
|
|
8000636: 3304 adds r3, #4
|
|
|
|
08000638 <LoopCopyDataInit>:
|
|
|
|
LoopCopyDataInit:
|
|
adds r4, r0, r3
|
|
8000638: 18c4 adds r4, r0, r3
|
|
cmp r4, r1
|
|
800063a: 428c cmp r4, r1
|
|
bcc CopyDataInit
|
|
800063c: d3f9 bcc.n 8000632 <CopyDataInit>
|
|
|
|
/* Zero fill the bss segment. */
|
|
ldr r2, =_sbss
|
|
800063e: 4a0b ldr r2, [pc, #44] ; (800066c <LoopForever+0x12>)
|
|
ldr r4, =_ebss
|
|
8000640: 4c0b ldr r4, [pc, #44] ; (8000670 <LoopForever+0x16>)
|
|
movs r3, #0
|
|
8000642: 2300 movs r3, #0
|
|
b LoopFillZerobss
|
|
8000644: e001 b.n 800064a <LoopFillZerobss>
|
|
|
|
08000646 <FillZerobss>:
|
|
|
|
FillZerobss:
|
|
str r3, [r2]
|
|
8000646: 6013 str r3, [r2, #0]
|
|
adds r2, r2, #4
|
|
8000648: 3204 adds r2, #4
|
|
|
|
0800064a <LoopFillZerobss>:
|
|
|
|
LoopFillZerobss:
|
|
cmp r2, r4
|
|
800064a: 42a2 cmp r2, r4
|
|
bcc FillZerobss
|
|
800064c: d3fb bcc.n 8000646 <FillZerobss>
|
|
|
|
/* Call the clock system intitialization function.*/
|
|
bl SystemInit
|
|
800064e: f7ff ffe4 bl 800061a <SystemInit>
|
|
/* Call static constructors */
|
|
bl __libc_init_array
|
|
8000652: f001 fef1 bl 8002438 <__libc_init_array>
|
|
/* Call the application's entry point.*/
|
|
bl main
|
|
8000656: f7ff fecd bl 80003f4 <main>
|
|
|
|
0800065a <LoopForever>:
|
|
|
|
LoopForever:
|
|
b LoopForever
|
|
800065a: e7fe b.n 800065a <LoopForever>
|
|
ldr r0, =_estack
|
|
800065c: 20001000 .word 0x20001000
|
|
ldr r0, =_sdata
|
|
8000660: 20000000 .word 0x20000000
|
|
ldr r1, =_edata
|
|
8000664: 2000000c .word 0x2000000c
|
|
ldr r2, =_sidata
|
|
8000668: 0800250c .word 0x0800250c
|
|
ldr r2, =_sbss
|
|
800066c: 2000000c .word 0x2000000c
|
|
ldr r4, =_ebss
|
|
8000670: 20000098 .word 0x20000098
|
|
|
|
08000674 <ADC1_IRQHandler>:
|
|
* @retval : None
|
|
*/
|
|
.section .text.Default_Handler,"ax",%progbits
|
|
Default_Handler:
|
|
Infinite_Loop:
|
|
b Infinite_Loop
|
|
8000674: e7fe b.n 8000674 <ADC1_IRQHandler>
|
|
...
|
|
|
|
08000678 <HAL_Init>:
|
|
* In the default implementation,Systick is used as source of time base.
|
|
* The tick variable is incremented each 1ms in its ISR.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_Init(void)
|
|
{
|
|
8000678: b580 push {r7, lr}
|
|
800067a: af00 add r7, sp, #0
|
|
/* Configure Flash prefetch */
|
|
#if (PREFETCH_ENABLE != 0)
|
|
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
|
800067c: 4b07 ldr r3, [pc, #28] ; (800069c <HAL_Init+0x24>)
|
|
800067e: 681a ldr r2, [r3, #0]
|
|
8000680: 4b06 ldr r3, [pc, #24] ; (800069c <HAL_Init+0x24>)
|
|
8000682: 2110 movs r1, #16
|
|
8000684: 430a orrs r2, r1
|
|
8000686: 601a str r2, [r3, #0]
|
|
#endif /* PREFETCH_ENABLE */
|
|
|
|
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
|
|
|
|
HAL_InitTick(TICK_INT_PRIORITY);
|
|
8000688: 2003 movs r0, #3
|
|
800068a: f000 f809 bl 80006a0 <HAL_InitTick>
|
|
|
|
/* Init the low level hardware */
|
|
HAL_MspInit();
|
|
800068e: f7ff ff89 bl 80005a4 <HAL_MspInit>
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
8000692: 2300 movs r3, #0
|
|
}
|
|
8000694: 0018 movs r0, r3
|
|
8000696: 46bd mov sp, r7
|
|
8000698: bd80 pop {r7, pc}
|
|
800069a: 46c0 nop ; (mov r8, r8)
|
|
800069c: 40022000 .word 0x40022000
|
|
|
|
080006a0 <HAL_InitTick>:
|
|
* implementation in user file.
|
|
* @param TickPriority Tick interrupt priority.
|
|
* @retval HAL status
|
|
*/
|
|
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
|
{
|
|
80006a0: b590 push {r4, r7, lr}
|
|
80006a2: b083 sub sp, #12
|
|
80006a4: af00 add r7, sp, #0
|
|
80006a6: 6078 str r0, [r7, #4]
|
|
/*Configure the SysTick to have interrupt in 1ms time basis*/
|
|
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
|
|
80006a8: 4b14 ldr r3, [pc, #80] ; (80006fc <HAL_InitTick+0x5c>)
|
|
80006aa: 681c ldr r4, [r3, #0]
|
|
80006ac: 4b14 ldr r3, [pc, #80] ; (8000700 <HAL_InitTick+0x60>)
|
|
80006ae: 781b ldrb r3, [r3, #0]
|
|
80006b0: 0019 movs r1, r3
|
|
80006b2: 23fa movs r3, #250 ; 0xfa
|
|
80006b4: 0098 lsls r0, r3, #2
|
|
80006b6: f7ff fd27 bl 8000108 <__udivsi3>
|
|
80006ba: 0003 movs r3, r0
|
|
80006bc: 0019 movs r1, r3
|
|
80006be: 0020 movs r0, r4
|
|
80006c0: f7ff fd22 bl 8000108 <__udivsi3>
|
|
80006c4: 0003 movs r3, r0
|
|
80006c6: 0018 movs r0, r3
|
|
80006c8: f000 f8e1 bl 800088e <HAL_SYSTICK_Config>
|
|
80006cc: 1e03 subs r3, r0, #0
|
|
80006ce: d001 beq.n 80006d4 <HAL_InitTick+0x34>
|
|
{
|
|
return HAL_ERROR;
|
|
80006d0: 2301 movs r3, #1
|
|
80006d2: e00f b.n 80006f4 <HAL_InitTick+0x54>
|
|
}
|
|
|
|
/* Configure the SysTick IRQ priority */
|
|
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
|
80006d4: 687b ldr r3, [r7, #4]
|
|
80006d6: 2b03 cmp r3, #3
|
|
80006d8: d80b bhi.n 80006f2 <HAL_InitTick+0x52>
|
|
{
|
|
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
|
80006da: 6879 ldr r1, [r7, #4]
|
|
80006dc: 2301 movs r3, #1
|
|
80006de: 425b negs r3, r3
|
|
80006e0: 2200 movs r2, #0
|
|
80006e2: 0018 movs r0, r3
|
|
80006e4: f000 f8be bl 8000864 <HAL_NVIC_SetPriority>
|
|
uwTickPrio = TickPriority;
|
|
80006e8: 4b06 ldr r3, [pc, #24] ; (8000704 <HAL_InitTick+0x64>)
|
|
80006ea: 687a ldr r2, [r7, #4]
|
|
80006ec: 601a str r2, [r3, #0]
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
80006ee: 2300 movs r3, #0
|
|
80006f0: e000 b.n 80006f4 <HAL_InitTick+0x54>
|
|
return HAL_ERROR;
|
|
80006f2: 2301 movs r3, #1
|
|
}
|
|
80006f4: 0018 movs r0, r3
|
|
80006f6: 46bd mov sp, r7
|
|
80006f8: b003 add sp, #12
|
|
80006fa: bd90 pop {r4, r7, pc}
|
|
80006fc: 20000000 .word 0x20000000
|
|
8000700: 20000008 .word 0x20000008
|
|
8000704: 20000004 .word 0x20000004
|
|
|
|
08000708 <HAL_IncTick>:
|
|
* @note This function is declared as __weak to be overwritten in case of other
|
|
* implementations in user file.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_IncTick(void)
|
|
{
|
|
8000708: b580 push {r7, lr}
|
|
800070a: af00 add r7, sp, #0
|
|
uwTick += uwTickFreq;
|
|
800070c: 4b05 ldr r3, [pc, #20] ; (8000724 <HAL_IncTick+0x1c>)
|
|
800070e: 781b ldrb r3, [r3, #0]
|
|
8000710: 001a movs r2, r3
|
|
8000712: 4b05 ldr r3, [pc, #20] ; (8000728 <HAL_IncTick+0x20>)
|
|
8000714: 681b ldr r3, [r3, #0]
|
|
8000716: 18d2 adds r2, r2, r3
|
|
8000718: 4b03 ldr r3, [pc, #12] ; (8000728 <HAL_IncTick+0x20>)
|
|
800071a: 601a str r2, [r3, #0]
|
|
}
|
|
800071c: 46c0 nop ; (mov r8, r8)
|
|
800071e: 46bd mov sp, r7
|
|
8000720: bd80 pop {r7, pc}
|
|
8000722: 46c0 nop ; (mov r8, r8)
|
|
8000724: 20000008 .word 0x20000008
|
|
8000728: 20000028 .word 0x20000028
|
|
|
|
0800072c <HAL_GetTick>:
|
|
* @note This function is declared as __weak to be overwritten in case of other
|
|
* implementations in user file.
|
|
* @retval tick value
|
|
*/
|
|
__weak uint32_t HAL_GetTick(void)
|
|
{
|
|
800072c: b580 push {r7, lr}
|
|
800072e: af00 add r7, sp, #0
|
|
return uwTick;
|
|
8000730: 4b02 ldr r3, [pc, #8] ; (800073c <HAL_GetTick+0x10>)
|
|
8000732: 681b ldr r3, [r3, #0]
|
|
}
|
|
8000734: 0018 movs r0, r3
|
|
8000736: 46bd mov sp, r7
|
|
8000738: bd80 pop {r7, pc}
|
|
800073a: 46c0 nop ; (mov r8, r8)
|
|
800073c: 20000028 .word 0x20000028
|
|
|
|
08000740 <__NVIC_SetPriority>:
|
|
\param [in] IRQn Interrupt number.
|
|
\param [in] priority Priority to set.
|
|
\note The priority cannot be set for every processor exception.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
|
{
|
|
8000740: b590 push {r4, r7, lr}
|
|
8000742: b083 sub sp, #12
|
|
8000744: af00 add r7, sp, #0
|
|
8000746: 0002 movs r2, r0
|
|
8000748: 6039 str r1, [r7, #0]
|
|
800074a: 1dfb adds r3, r7, #7
|
|
800074c: 701a strb r2, [r3, #0]
|
|
if ((int32_t)(IRQn) >= 0)
|
|
800074e: 1dfb adds r3, r7, #7
|
|
8000750: 781b ldrb r3, [r3, #0]
|
|
8000752: 2b7f cmp r3, #127 ; 0x7f
|
|
8000754: d828 bhi.n 80007a8 <__NVIC_SetPriority+0x68>
|
|
{
|
|
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
|
8000756: 4a2f ldr r2, [pc, #188] ; (8000814 <__NVIC_SetPriority+0xd4>)
|
|
8000758: 1dfb adds r3, r7, #7
|
|
800075a: 781b ldrb r3, [r3, #0]
|
|
800075c: b25b sxtb r3, r3
|
|
800075e: 089b lsrs r3, r3, #2
|
|
8000760: 33c0 adds r3, #192 ; 0xc0
|
|
8000762: 009b lsls r3, r3, #2
|
|
8000764: 589b ldr r3, [r3, r2]
|
|
8000766: 1dfa adds r2, r7, #7
|
|
8000768: 7812 ldrb r2, [r2, #0]
|
|
800076a: 0011 movs r1, r2
|
|
800076c: 2203 movs r2, #3
|
|
800076e: 400a ands r2, r1
|
|
8000770: 00d2 lsls r2, r2, #3
|
|
8000772: 21ff movs r1, #255 ; 0xff
|
|
8000774: 4091 lsls r1, r2
|
|
8000776: 000a movs r2, r1
|
|
8000778: 43d2 mvns r2, r2
|
|
800077a: 401a ands r2, r3
|
|
800077c: 0011 movs r1, r2
|
|
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
|
|
800077e: 683b ldr r3, [r7, #0]
|
|
8000780: 019b lsls r3, r3, #6
|
|
8000782: 22ff movs r2, #255 ; 0xff
|
|
8000784: 401a ands r2, r3
|
|
8000786: 1dfb adds r3, r7, #7
|
|
8000788: 781b ldrb r3, [r3, #0]
|
|
800078a: 0018 movs r0, r3
|
|
800078c: 2303 movs r3, #3
|
|
800078e: 4003 ands r3, r0
|
|
8000790: 00db lsls r3, r3, #3
|
|
8000792: 409a lsls r2, r3
|
|
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
|
8000794: 481f ldr r0, [pc, #124] ; (8000814 <__NVIC_SetPriority+0xd4>)
|
|
8000796: 1dfb adds r3, r7, #7
|
|
8000798: 781b ldrb r3, [r3, #0]
|
|
800079a: b25b sxtb r3, r3
|
|
800079c: 089b lsrs r3, r3, #2
|
|
800079e: 430a orrs r2, r1
|
|
80007a0: 33c0 adds r3, #192 ; 0xc0
|
|
80007a2: 009b lsls r3, r3, #2
|
|
80007a4: 501a str r2, [r3, r0]
|
|
else
|
|
{
|
|
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
|
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
|
|
}
|
|
}
|
|
80007a6: e031 b.n 800080c <__NVIC_SetPriority+0xcc>
|
|
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
|
80007a8: 4a1b ldr r2, [pc, #108] ; (8000818 <__NVIC_SetPriority+0xd8>)
|
|
80007aa: 1dfb adds r3, r7, #7
|
|
80007ac: 781b ldrb r3, [r3, #0]
|
|
80007ae: 0019 movs r1, r3
|
|
80007b0: 230f movs r3, #15
|
|
80007b2: 400b ands r3, r1
|
|
80007b4: 3b08 subs r3, #8
|
|
80007b6: 089b lsrs r3, r3, #2
|
|
80007b8: 3306 adds r3, #6
|
|
80007ba: 009b lsls r3, r3, #2
|
|
80007bc: 18d3 adds r3, r2, r3
|
|
80007be: 3304 adds r3, #4
|
|
80007c0: 681b ldr r3, [r3, #0]
|
|
80007c2: 1dfa adds r2, r7, #7
|
|
80007c4: 7812 ldrb r2, [r2, #0]
|
|
80007c6: 0011 movs r1, r2
|
|
80007c8: 2203 movs r2, #3
|
|
80007ca: 400a ands r2, r1
|
|
80007cc: 00d2 lsls r2, r2, #3
|
|
80007ce: 21ff movs r1, #255 ; 0xff
|
|
80007d0: 4091 lsls r1, r2
|
|
80007d2: 000a movs r2, r1
|
|
80007d4: 43d2 mvns r2, r2
|
|
80007d6: 401a ands r2, r3
|
|
80007d8: 0011 movs r1, r2
|
|
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
|
|
80007da: 683b ldr r3, [r7, #0]
|
|
80007dc: 019b lsls r3, r3, #6
|
|
80007de: 22ff movs r2, #255 ; 0xff
|
|
80007e0: 401a ands r2, r3
|
|
80007e2: 1dfb adds r3, r7, #7
|
|
80007e4: 781b ldrb r3, [r3, #0]
|
|
80007e6: 0018 movs r0, r3
|
|
80007e8: 2303 movs r3, #3
|
|
80007ea: 4003 ands r3, r0
|
|
80007ec: 00db lsls r3, r3, #3
|
|
80007ee: 409a lsls r2, r3
|
|
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
|
80007f0: 4809 ldr r0, [pc, #36] ; (8000818 <__NVIC_SetPriority+0xd8>)
|
|
80007f2: 1dfb adds r3, r7, #7
|
|
80007f4: 781b ldrb r3, [r3, #0]
|
|
80007f6: 001c movs r4, r3
|
|
80007f8: 230f movs r3, #15
|
|
80007fa: 4023 ands r3, r4
|
|
80007fc: 3b08 subs r3, #8
|
|
80007fe: 089b lsrs r3, r3, #2
|
|
8000800: 430a orrs r2, r1
|
|
8000802: 3306 adds r3, #6
|
|
8000804: 009b lsls r3, r3, #2
|
|
8000806: 18c3 adds r3, r0, r3
|
|
8000808: 3304 adds r3, #4
|
|
800080a: 601a str r2, [r3, #0]
|
|
}
|
|
800080c: 46c0 nop ; (mov r8, r8)
|
|
800080e: 46bd mov sp, r7
|
|
8000810: b003 add sp, #12
|
|
8000812: bd90 pop {r4, r7, pc}
|
|
8000814: e000e100 .word 0xe000e100
|
|
8000818: e000ed00 .word 0xe000ed00
|
|
|
|
0800081c <SysTick_Config>:
|
|
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
|
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
|
must contain a vendor-specific implementation of this function.
|
|
*/
|
|
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
|
{
|
|
800081c: b580 push {r7, lr}
|
|
800081e: b082 sub sp, #8
|
|
8000820: af00 add r7, sp, #0
|
|
8000822: 6078 str r0, [r7, #4]
|
|
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
|
8000824: 687b ldr r3, [r7, #4]
|
|
8000826: 1e5a subs r2, r3, #1
|
|
8000828: 2380 movs r3, #128 ; 0x80
|
|
800082a: 045b lsls r3, r3, #17
|
|
800082c: 429a cmp r2, r3
|
|
800082e: d301 bcc.n 8000834 <SysTick_Config+0x18>
|
|
{
|
|
return (1UL); /* Reload value impossible */
|
|
8000830: 2301 movs r3, #1
|
|
8000832: e010 b.n 8000856 <SysTick_Config+0x3a>
|
|
}
|
|
|
|
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
|
8000834: 4b0a ldr r3, [pc, #40] ; (8000860 <SysTick_Config+0x44>)
|
|
8000836: 687a ldr r2, [r7, #4]
|
|
8000838: 3a01 subs r2, #1
|
|
800083a: 605a str r2, [r3, #4]
|
|
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
|
800083c: 2301 movs r3, #1
|
|
800083e: 425b negs r3, r3
|
|
8000840: 2103 movs r1, #3
|
|
8000842: 0018 movs r0, r3
|
|
8000844: f7ff ff7c bl 8000740 <__NVIC_SetPriority>
|
|
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
|
8000848: 4b05 ldr r3, [pc, #20] ; (8000860 <SysTick_Config+0x44>)
|
|
800084a: 2200 movs r2, #0
|
|
800084c: 609a str r2, [r3, #8]
|
|
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
|
800084e: 4b04 ldr r3, [pc, #16] ; (8000860 <SysTick_Config+0x44>)
|
|
8000850: 2207 movs r2, #7
|
|
8000852: 601a str r2, [r3, #0]
|
|
SysTick_CTRL_TICKINT_Msk |
|
|
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
|
return (0UL); /* Function successful */
|
|
8000854: 2300 movs r3, #0
|
|
}
|
|
8000856: 0018 movs r0, r3
|
|
8000858: 46bd mov sp, r7
|
|
800085a: b002 add sp, #8
|
|
800085c: bd80 pop {r7, pc}
|
|
800085e: 46c0 nop ; (mov r8, r8)
|
|
8000860: e000e010 .word 0xe000e010
|
|
|
|
08000864 <HAL_NVIC_SetPriority>:
|
|
* with stm32f0xx devices, this parameter is a dummy value and it is ignored, because
|
|
* no subpriority supported in Cortex M0 based products.
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
{
|
|
8000864: b580 push {r7, lr}
|
|
8000866: b084 sub sp, #16
|
|
8000868: af00 add r7, sp, #0
|
|
800086a: 60b9 str r1, [r7, #8]
|
|
800086c: 607a str r2, [r7, #4]
|
|
800086e: 210f movs r1, #15
|
|
8000870: 187b adds r3, r7, r1
|
|
8000872: 1c02 adds r2, r0, #0
|
|
8000874: 701a strb r2, [r3, #0]
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
|
NVIC_SetPriority(IRQn,PreemptPriority);
|
|
8000876: 68ba ldr r2, [r7, #8]
|
|
8000878: 187b adds r3, r7, r1
|
|
800087a: 781b ldrb r3, [r3, #0]
|
|
800087c: b25b sxtb r3, r3
|
|
800087e: 0011 movs r1, r2
|
|
8000880: 0018 movs r0, r3
|
|
8000882: f7ff ff5d bl 8000740 <__NVIC_SetPriority>
|
|
}
|
|
8000886: 46c0 nop ; (mov r8, r8)
|
|
8000888: 46bd mov sp, r7
|
|
800088a: b004 add sp, #16
|
|
800088c: bd80 pop {r7, pc}
|
|
|
|
0800088e <HAL_SYSTICK_Config>:
|
|
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
|
|
* @retval status: - 0 Function succeeded.
|
|
* - 1 Function failed.
|
|
*/
|
|
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
|
{
|
|
800088e: b580 push {r7, lr}
|
|
8000890: b082 sub sp, #8
|
|
8000892: af00 add r7, sp, #0
|
|
8000894: 6078 str r0, [r7, #4]
|
|
return SysTick_Config(TicksNumb);
|
|
8000896: 687b ldr r3, [r7, #4]
|
|
8000898: 0018 movs r0, r3
|
|
800089a: f7ff ffbf bl 800081c <SysTick_Config>
|
|
800089e: 0003 movs r3, r0
|
|
}
|
|
80008a0: 0018 movs r0, r3
|
|
80008a2: 46bd mov sp, r7
|
|
80008a4: b002 add sp, #8
|
|
80008a6: bd80 pop {r7, pc}
|
|
|
|
080008a8 <HAL_GPIO_Init>:
|
|
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
|
|
* the configuration information for the specified GPIO peripheral.
|
|
* @retval None
|
|
*/
|
|
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
|
{
|
|
80008a8: b580 push {r7, lr}
|
|
80008aa: b086 sub sp, #24
|
|
80008ac: af00 add r7, sp, #0
|
|
80008ae: 6078 str r0, [r7, #4]
|
|
80008b0: 6039 str r1, [r7, #0]
|
|
uint32_t position = 0x00u;
|
|
80008b2: 2300 movs r3, #0
|
|
80008b4: 617b str r3, [r7, #20]
|
|
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
|
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
|
|
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
|
|
|
|
/* Configure the port pins */
|
|
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
|
80008b6: e14f b.n 8000b58 <HAL_GPIO_Init+0x2b0>
|
|
{
|
|
/* Get current io position */
|
|
iocurrent = (GPIO_Init->Pin) & (1uL << position);
|
|
80008b8: 683b ldr r3, [r7, #0]
|
|
80008ba: 681b ldr r3, [r3, #0]
|
|
80008bc: 2101 movs r1, #1
|
|
80008be: 697a ldr r2, [r7, #20]
|
|
80008c0: 4091 lsls r1, r2
|
|
80008c2: 000a movs r2, r1
|
|
80008c4: 4013 ands r3, r2
|
|
80008c6: 60fb str r3, [r7, #12]
|
|
|
|
if (iocurrent != 0x00u)
|
|
80008c8: 68fb ldr r3, [r7, #12]
|
|
80008ca: 2b00 cmp r3, #0
|
|
80008cc: d100 bne.n 80008d0 <HAL_GPIO_Init+0x28>
|
|
80008ce: e140 b.n 8000b52 <HAL_GPIO_Init+0x2aa>
|
|
{
|
|
/*--------------------- GPIO Mode Configuration ------------------------*/
|
|
/* In case of Output or Alternate function mode selection */
|
|
if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) ||
|
|
80008d0: 683b ldr r3, [r7, #0]
|
|
80008d2: 685b ldr r3, [r3, #4]
|
|
80008d4: 2203 movs r2, #3
|
|
80008d6: 4013 ands r3, r2
|
|
80008d8: 2b01 cmp r3, #1
|
|
80008da: d005 beq.n 80008e8 <HAL_GPIO_Init+0x40>
|
|
((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
|
|
80008dc: 683b ldr r3, [r7, #0]
|
|
80008de: 685b ldr r3, [r3, #4]
|
|
80008e0: 2203 movs r2, #3
|
|
80008e2: 4013 ands r3, r2
|
|
if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) ||
|
|
80008e4: 2b02 cmp r3, #2
|
|
80008e6: d130 bne.n 800094a <HAL_GPIO_Init+0xa2>
|
|
{
|
|
/* Check the Speed parameter */
|
|
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
|
|
/* Configure the IO Speed */
|
|
temp = GPIOx->OSPEEDR;
|
|
80008e8: 687b ldr r3, [r7, #4]
|
|
80008ea: 689b ldr r3, [r3, #8]
|
|
80008ec: 613b str r3, [r7, #16]
|
|
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u));
|
|
80008ee: 697b ldr r3, [r7, #20]
|
|
80008f0: 005b lsls r3, r3, #1
|
|
80008f2: 2203 movs r2, #3
|
|
80008f4: 409a lsls r2, r3
|
|
80008f6: 0013 movs r3, r2
|
|
80008f8: 43da mvns r2, r3
|
|
80008fa: 693b ldr r3, [r7, #16]
|
|
80008fc: 4013 ands r3, r2
|
|
80008fe: 613b str r3, [r7, #16]
|
|
temp |= (GPIO_Init->Speed << (position * 2u));
|
|
8000900: 683b ldr r3, [r7, #0]
|
|
8000902: 68da ldr r2, [r3, #12]
|
|
8000904: 697b ldr r3, [r7, #20]
|
|
8000906: 005b lsls r3, r3, #1
|
|
8000908: 409a lsls r2, r3
|
|
800090a: 0013 movs r3, r2
|
|
800090c: 693a ldr r2, [r7, #16]
|
|
800090e: 4313 orrs r3, r2
|
|
8000910: 613b str r3, [r7, #16]
|
|
GPIOx->OSPEEDR = temp;
|
|
8000912: 687b ldr r3, [r7, #4]
|
|
8000914: 693a ldr r2, [r7, #16]
|
|
8000916: 609a str r2, [r3, #8]
|
|
|
|
/* Configure the IO Output Type */
|
|
temp = GPIOx->OTYPER;
|
|
8000918: 687b ldr r3, [r7, #4]
|
|
800091a: 685b ldr r3, [r3, #4]
|
|
800091c: 613b str r3, [r7, #16]
|
|
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
|
|
800091e: 2201 movs r2, #1
|
|
8000920: 697b ldr r3, [r7, #20]
|
|
8000922: 409a lsls r2, r3
|
|
8000924: 0013 movs r3, r2
|
|
8000926: 43da mvns r2, r3
|
|
8000928: 693b ldr r3, [r7, #16]
|
|
800092a: 4013 ands r3, r2
|
|
800092c: 613b str r3, [r7, #16]
|
|
temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
|
|
800092e: 683b ldr r3, [r7, #0]
|
|
8000930: 685b ldr r3, [r3, #4]
|
|
8000932: 091b lsrs r3, r3, #4
|
|
8000934: 2201 movs r2, #1
|
|
8000936: 401a ands r2, r3
|
|
8000938: 697b ldr r3, [r7, #20]
|
|
800093a: 409a lsls r2, r3
|
|
800093c: 0013 movs r3, r2
|
|
800093e: 693a ldr r2, [r7, #16]
|
|
8000940: 4313 orrs r3, r2
|
|
8000942: 613b str r3, [r7, #16]
|
|
GPIOx->OTYPER = temp;
|
|
8000944: 687b ldr r3, [r7, #4]
|
|
8000946: 693a ldr r2, [r7, #16]
|
|
8000948: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
|
|
800094a: 683b ldr r3, [r7, #0]
|
|
800094c: 685b ldr r3, [r3, #4]
|
|
800094e: 2203 movs r2, #3
|
|
8000950: 4013 ands r3, r2
|
|
8000952: 2b03 cmp r3, #3
|
|
8000954: d017 beq.n 8000986 <HAL_GPIO_Init+0xde>
|
|
{
|
|
/* Check the Pull parameter */
|
|
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
|
|
|
|
/* Activate the Pull-up or Pull down resistor for the current IO */
|
|
temp = GPIOx->PUPDR;
|
|
8000956: 687b ldr r3, [r7, #4]
|
|
8000958: 68db ldr r3, [r3, #12]
|
|
800095a: 613b str r3, [r7, #16]
|
|
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u));
|
|
800095c: 697b ldr r3, [r7, #20]
|
|
800095e: 005b lsls r3, r3, #1
|
|
8000960: 2203 movs r2, #3
|
|
8000962: 409a lsls r2, r3
|
|
8000964: 0013 movs r3, r2
|
|
8000966: 43da mvns r2, r3
|
|
8000968: 693b ldr r3, [r7, #16]
|
|
800096a: 4013 ands r3, r2
|
|
800096c: 613b str r3, [r7, #16]
|
|
temp |= ((GPIO_Init->Pull) << (position * 2u));
|
|
800096e: 683b ldr r3, [r7, #0]
|
|
8000970: 689a ldr r2, [r3, #8]
|
|
8000972: 697b ldr r3, [r7, #20]
|
|
8000974: 005b lsls r3, r3, #1
|
|
8000976: 409a lsls r2, r3
|
|
8000978: 0013 movs r3, r2
|
|
800097a: 693a ldr r2, [r7, #16]
|
|
800097c: 4313 orrs r3, r2
|
|
800097e: 613b str r3, [r7, #16]
|
|
GPIOx->PUPDR = temp;
|
|
8000980: 687b ldr r3, [r7, #4]
|
|
8000982: 693a ldr r2, [r7, #16]
|
|
8000984: 60da str r2, [r3, #12]
|
|
}
|
|
|
|
/* In case of Alternate function mode selection */
|
|
if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
|
|
8000986: 683b ldr r3, [r7, #0]
|
|
8000988: 685b ldr r3, [r3, #4]
|
|
800098a: 2203 movs r2, #3
|
|
800098c: 4013 ands r3, r2
|
|
800098e: 2b02 cmp r3, #2
|
|
8000990: d123 bne.n 80009da <HAL_GPIO_Init+0x132>
|
|
/* Check the Alternate function parameters */
|
|
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
|
|
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
|
|
|
|
/* Configure Alternate function mapped with the current IO */
|
|
temp = GPIOx->AFR[position >> 3u];
|
|
8000992: 697b ldr r3, [r7, #20]
|
|
8000994: 08da lsrs r2, r3, #3
|
|
8000996: 687b ldr r3, [r7, #4]
|
|
8000998: 3208 adds r2, #8
|
|
800099a: 0092 lsls r2, r2, #2
|
|
800099c: 58d3 ldr r3, [r2, r3]
|
|
800099e: 613b str r3, [r7, #16]
|
|
temp &= ~(0xFu << ((position & 0x07u) * 4u));
|
|
80009a0: 697b ldr r3, [r7, #20]
|
|
80009a2: 2207 movs r2, #7
|
|
80009a4: 4013 ands r3, r2
|
|
80009a6: 009b lsls r3, r3, #2
|
|
80009a8: 220f movs r2, #15
|
|
80009aa: 409a lsls r2, r3
|
|
80009ac: 0013 movs r3, r2
|
|
80009ae: 43da mvns r2, r3
|
|
80009b0: 693b ldr r3, [r7, #16]
|
|
80009b2: 4013 ands r3, r2
|
|
80009b4: 613b str r3, [r7, #16]
|
|
temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u));
|
|
80009b6: 683b ldr r3, [r7, #0]
|
|
80009b8: 691a ldr r2, [r3, #16]
|
|
80009ba: 697b ldr r3, [r7, #20]
|
|
80009bc: 2107 movs r1, #7
|
|
80009be: 400b ands r3, r1
|
|
80009c0: 009b lsls r3, r3, #2
|
|
80009c2: 409a lsls r2, r3
|
|
80009c4: 0013 movs r3, r2
|
|
80009c6: 693a ldr r2, [r7, #16]
|
|
80009c8: 4313 orrs r3, r2
|
|
80009ca: 613b str r3, [r7, #16]
|
|
GPIOx->AFR[position >> 3u] = temp;
|
|
80009cc: 697b ldr r3, [r7, #20]
|
|
80009ce: 08da lsrs r2, r3, #3
|
|
80009d0: 687b ldr r3, [r7, #4]
|
|
80009d2: 3208 adds r2, #8
|
|
80009d4: 0092 lsls r2, r2, #2
|
|
80009d6: 6939 ldr r1, [r7, #16]
|
|
80009d8: 50d1 str r1, [r2, r3]
|
|
}
|
|
|
|
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
|
|
temp = GPIOx->MODER;
|
|
80009da: 687b ldr r3, [r7, #4]
|
|
80009dc: 681b ldr r3, [r3, #0]
|
|
80009de: 613b str r3, [r7, #16]
|
|
temp &= ~(GPIO_MODER_MODER0 << (position * 2u));
|
|
80009e0: 697b ldr r3, [r7, #20]
|
|
80009e2: 005b lsls r3, r3, #1
|
|
80009e4: 2203 movs r2, #3
|
|
80009e6: 409a lsls r2, r3
|
|
80009e8: 0013 movs r3, r2
|
|
80009ea: 43da mvns r2, r3
|
|
80009ec: 693b ldr r3, [r7, #16]
|
|
80009ee: 4013 ands r3, r2
|
|
80009f0: 613b str r3, [r7, #16]
|
|
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u));
|
|
80009f2: 683b ldr r3, [r7, #0]
|
|
80009f4: 685b ldr r3, [r3, #4]
|
|
80009f6: 2203 movs r2, #3
|
|
80009f8: 401a ands r2, r3
|
|
80009fa: 697b ldr r3, [r7, #20]
|
|
80009fc: 005b lsls r3, r3, #1
|
|
80009fe: 409a lsls r2, r3
|
|
8000a00: 0013 movs r3, r2
|
|
8000a02: 693a ldr r2, [r7, #16]
|
|
8000a04: 4313 orrs r3, r2
|
|
8000a06: 613b str r3, [r7, #16]
|
|
GPIOx->MODER = temp;
|
|
8000a08: 687b ldr r3, [r7, #4]
|
|
8000a0a: 693a ldr r2, [r7, #16]
|
|
8000a0c: 601a str r2, [r3, #0]
|
|
|
|
/*--------------------- EXTI Mode Configuration ------------------------*/
|
|
/* Configure the External Interrupt or event for the current IO */
|
|
if((GPIO_Init->Mode & EXTI_MODE) != 0x00u)
|
|
8000a0e: 683b ldr r3, [r7, #0]
|
|
8000a10: 685a ldr r2, [r3, #4]
|
|
8000a12: 23c0 movs r3, #192 ; 0xc0
|
|
8000a14: 029b lsls r3, r3, #10
|
|
8000a16: 4013 ands r3, r2
|
|
8000a18: d100 bne.n 8000a1c <HAL_GPIO_Init+0x174>
|
|
8000a1a: e09a b.n 8000b52 <HAL_GPIO_Init+0x2aa>
|
|
{
|
|
/* Enable SYSCFG Clock */
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
|
8000a1c: 4b54 ldr r3, [pc, #336] ; (8000b70 <HAL_GPIO_Init+0x2c8>)
|
|
8000a1e: 699a ldr r2, [r3, #24]
|
|
8000a20: 4b53 ldr r3, [pc, #332] ; (8000b70 <HAL_GPIO_Init+0x2c8>)
|
|
8000a22: 2101 movs r1, #1
|
|
8000a24: 430a orrs r2, r1
|
|
8000a26: 619a str r2, [r3, #24]
|
|
8000a28: 4b51 ldr r3, [pc, #324] ; (8000b70 <HAL_GPIO_Init+0x2c8>)
|
|
8000a2a: 699b ldr r3, [r3, #24]
|
|
8000a2c: 2201 movs r2, #1
|
|
8000a2e: 4013 ands r3, r2
|
|
8000a30: 60bb str r3, [r7, #8]
|
|
8000a32: 68bb ldr r3, [r7, #8]
|
|
|
|
temp = SYSCFG->EXTICR[position >> 2u];
|
|
8000a34: 4a4f ldr r2, [pc, #316] ; (8000b74 <HAL_GPIO_Init+0x2cc>)
|
|
8000a36: 697b ldr r3, [r7, #20]
|
|
8000a38: 089b lsrs r3, r3, #2
|
|
8000a3a: 3302 adds r3, #2
|
|
8000a3c: 009b lsls r3, r3, #2
|
|
8000a3e: 589b ldr r3, [r3, r2]
|
|
8000a40: 613b str r3, [r7, #16]
|
|
temp &= ~(0x0FuL << (4u * (position & 0x03u)));
|
|
8000a42: 697b ldr r3, [r7, #20]
|
|
8000a44: 2203 movs r2, #3
|
|
8000a46: 4013 ands r3, r2
|
|
8000a48: 009b lsls r3, r3, #2
|
|
8000a4a: 220f movs r2, #15
|
|
8000a4c: 409a lsls r2, r3
|
|
8000a4e: 0013 movs r3, r2
|
|
8000a50: 43da mvns r2, r3
|
|
8000a52: 693b ldr r3, [r7, #16]
|
|
8000a54: 4013 ands r3, r2
|
|
8000a56: 613b str r3, [r7, #16]
|
|
temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)));
|
|
8000a58: 687a ldr r2, [r7, #4]
|
|
8000a5a: 2390 movs r3, #144 ; 0x90
|
|
8000a5c: 05db lsls r3, r3, #23
|
|
8000a5e: 429a cmp r2, r3
|
|
8000a60: d013 beq.n 8000a8a <HAL_GPIO_Init+0x1e2>
|
|
8000a62: 687b ldr r3, [r7, #4]
|
|
8000a64: 4a44 ldr r2, [pc, #272] ; (8000b78 <HAL_GPIO_Init+0x2d0>)
|
|
8000a66: 4293 cmp r3, r2
|
|
8000a68: d00d beq.n 8000a86 <HAL_GPIO_Init+0x1de>
|
|
8000a6a: 687b ldr r3, [r7, #4]
|
|
8000a6c: 4a43 ldr r2, [pc, #268] ; (8000b7c <HAL_GPIO_Init+0x2d4>)
|
|
8000a6e: 4293 cmp r3, r2
|
|
8000a70: d007 beq.n 8000a82 <HAL_GPIO_Init+0x1da>
|
|
8000a72: 687b ldr r3, [r7, #4]
|
|
8000a74: 4a42 ldr r2, [pc, #264] ; (8000b80 <HAL_GPIO_Init+0x2d8>)
|
|
8000a76: 4293 cmp r3, r2
|
|
8000a78: d101 bne.n 8000a7e <HAL_GPIO_Init+0x1d6>
|
|
8000a7a: 2303 movs r3, #3
|
|
8000a7c: e006 b.n 8000a8c <HAL_GPIO_Init+0x1e4>
|
|
8000a7e: 2305 movs r3, #5
|
|
8000a80: e004 b.n 8000a8c <HAL_GPIO_Init+0x1e4>
|
|
8000a82: 2302 movs r3, #2
|
|
8000a84: e002 b.n 8000a8c <HAL_GPIO_Init+0x1e4>
|
|
8000a86: 2301 movs r3, #1
|
|
8000a88: e000 b.n 8000a8c <HAL_GPIO_Init+0x1e4>
|
|
8000a8a: 2300 movs r3, #0
|
|
8000a8c: 697a ldr r2, [r7, #20]
|
|
8000a8e: 2103 movs r1, #3
|
|
8000a90: 400a ands r2, r1
|
|
8000a92: 0092 lsls r2, r2, #2
|
|
8000a94: 4093 lsls r3, r2
|
|
8000a96: 693a ldr r2, [r7, #16]
|
|
8000a98: 4313 orrs r3, r2
|
|
8000a9a: 613b str r3, [r7, #16]
|
|
SYSCFG->EXTICR[position >> 2u] = temp;
|
|
8000a9c: 4935 ldr r1, [pc, #212] ; (8000b74 <HAL_GPIO_Init+0x2cc>)
|
|
8000a9e: 697b ldr r3, [r7, #20]
|
|
8000aa0: 089b lsrs r3, r3, #2
|
|
8000aa2: 3302 adds r3, #2
|
|
8000aa4: 009b lsls r3, r3, #2
|
|
8000aa6: 693a ldr r2, [r7, #16]
|
|
8000aa8: 505a str r2, [r3, r1]
|
|
|
|
/* Clear EXTI line configuration */
|
|
temp = EXTI->IMR;
|
|
8000aaa: 4b36 ldr r3, [pc, #216] ; (8000b84 <HAL_GPIO_Init+0x2dc>)
|
|
8000aac: 681b ldr r3, [r3, #0]
|
|
8000aae: 613b str r3, [r7, #16]
|
|
temp &= ~(iocurrent);
|
|
8000ab0: 68fb ldr r3, [r7, #12]
|
|
8000ab2: 43da mvns r2, r3
|
|
8000ab4: 693b ldr r3, [r7, #16]
|
|
8000ab6: 4013 ands r3, r2
|
|
8000ab8: 613b str r3, [r7, #16]
|
|
if((GPIO_Init->Mode & EXTI_IT) != 0x00u)
|
|
8000aba: 683b ldr r3, [r7, #0]
|
|
8000abc: 685a ldr r2, [r3, #4]
|
|
8000abe: 2380 movs r3, #128 ; 0x80
|
|
8000ac0: 025b lsls r3, r3, #9
|
|
8000ac2: 4013 ands r3, r2
|
|
8000ac4: d003 beq.n 8000ace <HAL_GPIO_Init+0x226>
|
|
{
|
|
temp |= iocurrent;
|
|
8000ac6: 693a ldr r2, [r7, #16]
|
|
8000ac8: 68fb ldr r3, [r7, #12]
|
|
8000aca: 4313 orrs r3, r2
|
|
8000acc: 613b str r3, [r7, #16]
|
|
}
|
|
EXTI->IMR = temp;
|
|
8000ace: 4b2d ldr r3, [pc, #180] ; (8000b84 <HAL_GPIO_Init+0x2dc>)
|
|
8000ad0: 693a ldr r2, [r7, #16]
|
|
8000ad2: 601a str r2, [r3, #0]
|
|
|
|
temp = EXTI->EMR;
|
|
8000ad4: 4b2b ldr r3, [pc, #172] ; (8000b84 <HAL_GPIO_Init+0x2dc>)
|
|
8000ad6: 685b ldr r3, [r3, #4]
|
|
8000ad8: 613b str r3, [r7, #16]
|
|
temp &= ~(iocurrent);
|
|
8000ada: 68fb ldr r3, [r7, #12]
|
|
8000adc: 43da mvns r2, r3
|
|
8000ade: 693b ldr r3, [r7, #16]
|
|
8000ae0: 4013 ands r3, r2
|
|
8000ae2: 613b str r3, [r7, #16]
|
|
if((GPIO_Init->Mode & EXTI_EVT) != 0x00u)
|
|
8000ae4: 683b ldr r3, [r7, #0]
|
|
8000ae6: 685a ldr r2, [r3, #4]
|
|
8000ae8: 2380 movs r3, #128 ; 0x80
|
|
8000aea: 029b lsls r3, r3, #10
|
|
8000aec: 4013 ands r3, r2
|
|
8000aee: d003 beq.n 8000af8 <HAL_GPIO_Init+0x250>
|
|
{
|
|
temp |= iocurrent;
|
|
8000af0: 693a ldr r2, [r7, #16]
|
|
8000af2: 68fb ldr r3, [r7, #12]
|
|
8000af4: 4313 orrs r3, r2
|
|
8000af6: 613b str r3, [r7, #16]
|
|
}
|
|
EXTI->EMR = temp;
|
|
8000af8: 4b22 ldr r3, [pc, #136] ; (8000b84 <HAL_GPIO_Init+0x2dc>)
|
|
8000afa: 693a ldr r2, [r7, #16]
|
|
8000afc: 605a str r2, [r3, #4]
|
|
|
|
/* Clear Rising Falling edge configuration */
|
|
temp = EXTI->RTSR;
|
|
8000afe: 4b21 ldr r3, [pc, #132] ; (8000b84 <HAL_GPIO_Init+0x2dc>)
|
|
8000b00: 689b ldr r3, [r3, #8]
|
|
8000b02: 613b str r3, [r7, #16]
|
|
temp &= ~(iocurrent);
|
|
8000b04: 68fb ldr r3, [r7, #12]
|
|
8000b06: 43da mvns r2, r3
|
|
8000b08: 693b ldr r3, [r7, #16]
|
|
8000b0a: 4013 ands r3, r2
|
|
8000b0c: 613b str r3, [r7, #16]
|
|
if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u)
|
|
8000b0e: 683b ldr r3, [r7, #0]
|
|
8000b10: 685a ldr r2, [r3, #4]
|
|
8000b12: 2380 movs r3, #128 ; 0x80
|
|
8000b14: 035b lsls r3, r3, #13
|
|
8000b16: 4013 ands r3, r2
|
|
8000b18: d003 beq.n 8000b22 <HAL_GPIO_Init+0x27a>
|
|
{
|
|
temp |= iocurrent;
|
|
8000b1a: 693a ldr r2, [r7, #16]
|
|
8000b1c: 68fb ldr r3, [r7, #12]
|
|
8000b1e: 4313 orrs r3, r2
|
|
8000b20: 613b str r3, [r7, #16]
|
|
}
|
|
EXTI->RTSR = temp;
|
|
8000b22: 4b18 ldr r3, [pc, #96] ; (8000b84 <HAL_GPIO_Init+0x2dc>)
|
|
8000b24: 693a ldr r2, [r7, #16]
|
|
8000b26: 609a str r2, [r3, #8]
|
|
|
|
temp = EXTI->FTSR;
|
|
8000b28: 4b16 ldr r3, [pc, #88] ; (8000b84 <HAL_GPIO_Init+0x2dc>)
|
|
8000b2a: 68db ldr r3, [r3, #12]
|
|
8000b2c: 613b str r3, [r7, #16]
|
|
temp &= ~(iocurrent);
|
|
8000b2e: 68fb ldr r3, [r7, #12]
|
|
8000b30: 43da mvns r2, r3
|
|
8000b32: 693b ldr r3, [r7, #16]
|
|
8000b34: 4013 ands r3, r2
|
|
8000b36: 613b str r3, [r7, #16]
|
|
if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u)
|
|
8000b38: 683b ldr r3, [r7, #0]
|
|
8000b3a: 685a ldr r2, [r3, #4]
|
|
8000b3c: 2380 movs r3, #128 ; 0x80
|
|
8000b3e: 039b lsls r3, r3, #14
|
|
8000b40: 4013 ands r3, r2
|
|
8000b42: d003 beq.n 8000b4c <HAL_GPIO_Init+0x2a4>
|
|
{
|
|
temp |= iocurrent;
|
|
8000b44: 693a ldr r2, [r7, #16]
|
|
8000b46: 68fb ldr r3, [r7, #12]
|
|
8000b48: 4313 orrs r3, r2
|
|
8000b4a: 613b str r3, [r7, #16]
|
|
}
|
|
EXTI->FTSR = temp;
|
|
8000b4c: 4b0d ldr r3, [pc, #52] ; (8000b84 <HAL_GPIO_Init+0x2dc>)
|
|
8000b4e: 693a ldr r2, [r7, #16]
|
|
8000b50: 60da str r2, [r3, #12]
|
|
}
|
|
}
|
|
|
|
position++;
|
|
8000b52: 697b ldr r3, [r7, #20]
|
|
8000b54: 3301 adds r3, #1
|
|
8000b56: 617b str r3, [r7, #20]
|
|
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
|
8000b58: 683b ldr r3, [r7, #0]
|
|
8000b5a: 681a ldr r2, [r3, #0]
|
|
8000b5c: 697b ldr r3, [r7, #20]
|
|
8000b5e: 40da lsrs r2, r3
|
|
8000b60: 1e13 subs r3, r2, #0
|
|
8000b62: d000 beq.n 8000b66 <HAL_GPIO_Init+0x2be>
|
|
8000b64: e6a8 b.n 80008b8 <HAL_GPIO_Init+0x10>
|
|
}
|
|
}
|
|
8000b66: 46c0 nop ; (mov r8, r8)
|
|
8000b68: 46c0 nop ; (mov r8, r8)
|
|
8000b6a: 46bd mov sp, r7
|
|
8000b6c: b006 add sp, #24
|
|
8000b6e: bd80 pop {r7, pc}
|
|
8000b70: 40021000 .word 0x40021000
|
|
8000b74: 40010000 .word 0x40010000
|
|
8000b78: 48000400 .word 0x48000400
|
|
8000b7c: 48000800 .word 0x48000800
|
|
8000b80: 48000c00 .word 0x48000c00
|
|
8000b84: 40010400 .word 0x40010400
|
|
|
|
08000b88 <HAL_GPIO_ReadPin>:
|
|
* @param GPIO_Pin specifies the port bit to read.
|
|
* This parameter can be GPIO_PIN_x where x can be (0..15).
|
|
* @retval The input port pin value.
|
|
*/
|
|
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
|
{
|
|
8000b88: b580 push {r7, lr}
|
|
8000b8a: b084 sub sp, #16
|
|
8000b8c: af00 add r7, sp, #0
|
|
8000b8e: 6078 str r0, [r7, #4]
|
|
8000b90: 000a movs r2, r1
|
|
8000b92: 1cbb adds r3, r7, #2
|
|
8000b94: 801a strh r2, [r3, #0]
|
|
GPIO_PinState bitstatus;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
|
|
|
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
|
|
8000b96: 687b ldr r3, [r7, #4]
|
|
8000b98: 691b ldr r3, [r3, #16]
|
|
8000b9a: 1cba adds r2, r7, #2
|
|
8000b9c: 8812 ldrh r2, [r2, #0]
|
|
8000b9e: 4013 ands r3, r2
|
|
8000ba0: d004 beq.n 8000bac <HAL_GPIO_ReadPin+0x24>
|
|
{
|
|
bitstatus = GPIO_PIN_SET;
|
|
8000ba2: 230f movs r3, #15
|
|
8000ba4: 18fb adds r3, r7, r3
|
|
8000ba6: 2201 movs r2, #1
|
|
8000ba8: 701a strb r2, [r3, #0]
|
|
8000baa: e003 b.n 8000bb4 <HAL_GPIO_ReadPin+0x2c>
|
|
}
|
|
else
|
|
{
|
|
bitstatus = GPIO_PIN_RESET;
|
|
8000bac: 230f movs r3, #15
|
|
8000bae: 18fb adds r3, r7, r3
|
|
8000bb0: 2200 movs r2, #0
|
|
8000bb2: 701a strb r2, [r3, #0]
|
|
}
|
|
return bitstatus;
|
|
8000bb4: 230f movs r3, #15
|
|
8000bb6: 18fb adds r3, r7, r3
|
|
8000bb8: 781b ldrb r3, [r3, #0]
|
|
}
|
|
8000bba: 0018 movs r0, r3
|
|
8000bbc: 46bd mov sp, r7
|
|
8000bbe: b004 add sp, #16
|
|
8000bc0: bd80 pop {r7, pc}
|
|
|
|
08000bc2 <HAL_GPIO_WritePin>:
|
|
* @arg GPIO_PIN_RESET: to clear the port pin
|
|
* @arg GPIO_PIN_SET: to set the port pin
|
|
* @retval None
|
|
*/
|
|
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
|
|
{
|
|
8000bc2: b580 push {r7, lr}
|
|
8000bc4: b082 sub sp, #8
|
|
8000bc6: af00 add r7, sp, #0
|
|
8000bc8: 6078 str r0, [r7, #4]
|
|
8000bca: 0008 movs r0, r1
|
|
8000bcc: 0011 movs r1, r2
|
|
8000bce: 1cbb adds r3, r7, #2
|
|
8000bd0: 1c02 adds r2, r0, #0
|
|
8000bd2: 801a strh r2, [r3, #0]
|
|
8000bd4: 1c7b adds r3, r7, #1
|
|
8000bd6: 1c0a adds r2, r1, #0
|
|
8000bd8: 701a strb r2, [r3, #0]
|
|
/* Check the parameters */
|
|
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
|
assert_param(IS_GPIO_PIN_ACTION(PinState));
|
|
|
|
if (PinState != GPIO_PIN_RESET)
|
|
8000bda: 1c7b adds r3, r7, #1
|
|
8000bdc: 781b ldrb r3, [r3, #0]
|
|
8000bde: 2b00 cmp r3, #0
|
|
8000be0: d004 beq.n 8000bec <HAL_GPIO_WritePin+0x2a>
|
|
{
|
|
GPIOx->BSRR = (uint32_t)GPIO_Pin;
|
|
8000be2: 1cbb adds r3, r7, #2
|
|
8000be4: 881a ldrh r2, [r3, #0]
|
|
8000be6: 687b ldr r3, [r7, #4]
|
|
8000be8: 619a str r2, [r3, #24]
|
|
}
|
|
else
|
|
{
|
|
GPIOx->BRR = (uint32_t)GPIO_Pin;
|
|
}
|
|
}
|
|
8000bea: e003 b.n 8000bf4 <HAL_GPIO_WritePin+0x32>
|
|
GPIOx->BRR = (uint32_t)GPIO_Pin;
|
|
8000bec: 1cbb adds r3, r7, #2
|
|
8000bee: 881a ldrh r2, [r3, #0]
|
|
8000bf0: 687b ldr r3, [r7, #4]
|
|
8000bf2: 629a str r2, [r3, #40] ; 0x28
|
|
}
|
|
8000bf4: 46c0 nop ; (mov r8, r8)
|
|
8000bf6: 46bd mov sp, r7
|
|
8000bf8: b002 add sp, #8
|
|
8000bfa: bd80 pop {r7, pc}
|
|
|
|
08000bfc <HAL_RCC_OscConfig>:
|
|
* supported by this macro. User should request a transition to HSE Off
|
|
* first and then HSE On or HSE Bypass.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
|
{
|
|
8000bfc: b580 push {r7, lr}
|
|
8000bfe: b088 sub sp, #32
|
|
8000c00: af00 add r7, sp, #0
|
|
8000c02: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart;
|
|
uint32_t pll_config;
|
|
uint32_t pll_config2;
|
|
|
|
/* Check Null pointer */
|
|
if(RCC_OscInitStruct == NULL)
|
|
8000c04: 687b ldr r3, [r7, #4]
|
|
8000c06: 2b00 cmp r3, #0
|
|
8000c08: d101 bne.n 8000c0e <HAL_RCC_OscConfig+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8000c0a: 2301 movs r3, #1
|
|
8000c0c: e301 b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
|
|
|
/*------------------------------- HSE Configuration ------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
|
8000c0e: 687b ldr r3, [r7, #4]
|
|
8000c10: 681b ldr r3, [r3, #0]
|
|
8000c12: 2201 movs r2, #1
|
|
8000c14: 4013 ands r3, r2
|
|
8000c16: d100 bne.n 8000c1a <HAL_RCC_OscConfig+0x1e>
|
|
8000c18: e08d b.n 8000d36 <HAL_RCC_OscConfig+0x13a>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
|
|
|
|
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
|
|
8000c1a: 4bc3 ldr r3, [pc, #780] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000c1c: 685b ldr r3, [r3, #4]
|
|
8000c1e: 220c movs r2, #12
|
|
8000c20: 4013 ands r3, r2
|
|
8000c22: 2b04 cmp r3, #4
|
|
8000c24: d00e beq.n 8000c44 <HAL_RCC_OscConfig+0x48>
|
|
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
|
|
8000c26: 4bc0 ldr r3, [pc, #768] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000c28: 685b ldr r3, [r3, #4]
|
|
8000c2a: 220c movs r2, #12
|
|
8000c2c: 4013 ands r3, r2
|
|
8000c2e: 2b08 cmp r3, #8
|
|
8000c30: d116 bne.n 8000c60 <HAL_RCC_OscConfig+0x64>
|
|
8000c32: 4bbd ldr r3, [pc, #756] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000c34: 685a ldr r2, [r3, #4]
|
|
8000c36: 2380 movs r3, #128 ; 0x80
|
|
8000c38: 025b lsls r3, r3, #9
|
|
8000c3a: 401a ands r2, r3
|
|
8000c3c: 2380 movs r3, #128 ; 0x80
|
|
8000c3e: 025b lsls r3, r3, #9
|
|
8000c40: 429a cmp r2, r3
|
|
8000c42: d10d bne.n 8000c60 <HAL_RCC_OscConfig+0x64>
|
|
{
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
|
8000c44: 4bb8 ldr r3, [pc, #736] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000c46: 681a ldr r2, [r3, #0]
|
|
8000c48: 2380 movs r3, #128 ; 0x80
|
|
8000c4a: 029b lsls r3, r3, #10
|
|
8000c4c: 4013 ands r3, r2
|
|
8000c4e: d100 bne.n 8000c52 <HAL_RCC_OscConfig+0x56>
|
|
8000c50: e070 b.n 8000d34 <HAL_RCC_OscConfig+0x138>
|
|
8000c52: 687b ldr r3, [r7, #4]
|
|
8000c54: 685b ldr r3, [r3, #4]
|
|
8000c56: 2b00 cmp r3, #0
|
|
8000c58: d000 beq.n 8000c5c <HAL_RCC_OscConfig+0x60>
|
|
8000c5a: e06b b.n 8000d34 <HAL_RCC_OscConfig+0x138>
|
|
{
|
|
return HAL_ERROR;
|
|
8000c5c: 2301 movs r3, #1
|
|
8000c5e: e2d8 b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Set the new HSE configuration ---------------------------------------*/
|
|
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
|
8000c60: 687b ldr r3, [r7, #4]
|
|
8000c62: 685b ldr r3, [r3, #4]
|
|
8000c64: 2b01 cmp r3, #1
|
|
8000c66: d107 bne.n 8000c78 <HAL_RCC_OscConfig+0x7c>
|
|
8000c68: 4baf ldr r3, [pc, #700] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000c6a: 681a ldr r2, [r3, #0]
|
|
8000c6c: 4bae ldr r3, [pc, #696] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000c6e: 2180 movs r1, #128 ; 0x80
|
|
8000c70: 0249 lsls r1, r1, #9
|
|
8000c72: 430a orrs r2, r1
|
|
8000c74: 601a str r2, [r3, #0]
|
|
8000c76: e02f b.n 8000cd8 <HAL_RCC_OscConfig+0xdc>
|
|
8000c78: 687b ldr r3, [r7, #4]
|
|
8000c7a: 685b ldr r3, [r3, #4]
|
|
8000c7c: 2b00 cmp r3, #0
|
|
8000c7e: d10c bne.n 8000c9a <HAL_RCC_OscConfig+0x9e>
|
|
8000c80: 4ba9 ldr r3, [pc, #676] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000c82: 681a ldr r2, [r3, #0]
|
|
8000c84: 4ba8 ldr r3, [pc, #672] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000c86: 49a9 ldr r1, [pc, #676] ; (8000f2c <HAL_RCC_OscConfig+0x330>)
|
|
8000c88: 400a ands r2, r1
|
|
8000c8a: 601a str r2, [r3, #0]
|
|
8000c8c: 4ba6 ldr r3, [pc, #664] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000c8e: 681a ldr r2, [r3, #0]
|
|
8000c90: 4ba5 ldr r3, [pc, #660] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000c92: 49a7 ldr r1, [pc, #668] ; (8000f30 <HAL_RCC_OscConfig+0x334>)
|
|
8000c94: 400a ands r2, r1
|
|
8000c96: 601a str r2, [r3, #0]
|
|
8000c98: e01e b.n 8000cd8 <HAL_RCC_OscConfig+0xdc>
|
|
8000c9a: 687b ldr r3, [r7, #4]
|
|
8000c9c: 685b ldr r3, [r3, #4]
|
|
8000c9e: 2b05 cmp r3, #5
|
|
8000ca0: d10e bne.n 8000cc0 <HAL_RCC_OscConfig+0xc4>
|
|
8000ca2: 4ba1 ldr r3, [pc, #644] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000ca4: 681a ldr r2, [r3, #0]
|
|
8000ca6: 4ba0 ldr r3, [pc, #640] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000ca8: 2180 movs r1, #128 ; 0x80
|
|
8000caa: 02c9 lsls r1, r1, #11
|
|
8000cac: 430a orrs r2, r1
|
|
8000cae: 601a str r2, [r3, #0]
|
|
8000cb0: 4b9d ldr r3, [pc, #628] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000cb2: 681a ldr r2, [r3, #0]
|
|
8000cb4: 4b9c ldr r3, [pc, #624] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000cb6: 2180 movs r1, #128 ; 0x80
|
|
8000cb8: 0249 lsls r1, r1, #9
|
|
8000cba: 430a orrs r2, r1
|
|
8000cbc: 601a str r2, [r3, #0]
|
|
8000cbe: e00b b.n 8000cd8 <HAL_RCC_OscConfig+0xdc>
|
|
8000cc0: 4b99 ldr r3, [pc, #612] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000cc2: 681a ldr r2, [r3, #0]
|
|
8000cc4: 4b98 ldr r3, [pc, #608] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000cc6: 4999 ldr r1, [pc, #612] ; (8000f2c <HAL_RCC_OscConfig+0x330>)
|
|
8000cc8: 400a ands r2, r1
|
|
8000cca: 601a str r2, [r3, #0]
|
|
8000ccc: 4b96 ldr r3, [pc, #600] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000cce: 681a ldr r2, [r3, #0]
|
|
8000cd0: 4b95 ldr r3, [pc, #596] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000cd2: 4997 ldr r1, [pc, #604] ; (8000f30 <HAL_RCC_OscConfig+0x334>)
|
|
8000cd4: 400a ands r2, r1
|
|
8000cd6: 601a str r2, [r3, #0]
|
|
|
|
|
|
/* Check the HSE State */
|
|
if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
|
|
8000cd8: 687b ldr r3, [r7, #4]
|
|
8000cda: 685b ldr r3, [r3, #4]
|
|
8000cdc: 2b00 cmp r3, #0
|
|
8000cde: d014 beq.n 8000d0a <HAL_RCC_OscConfig+0x10e>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8000ce0: f7ff fd24 bl 800072c <HAL_GetTick>
|
|
8000ce4: 0003 movs r3, r0
|
|
8000ce6: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till HSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
8000ce8: e008 b.n 8000cfc <HAL_RCC_OscConfig+0x100>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
|
|
8000cea: f7ff fd1f bl 800072c <HAL_GetTick>
|
|
8000cee: 0002 movs r2, r0
|
|
8000cf0: 69bb ldr r3, [r7, #24]
|
|
8000cf2: 1ad3 subs r3, r2, r3
|
|
8000cf4: 2b64 cmp r3, #100 ; 0x64
|
|
8000cf6: d901 bls.n 8000cfc <HAL_RCC_OscConfig+0x100>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8000cf8: 2303 movs r3, #3
|
|
8000cfa: e28a b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
8000cfc: 4b8a ldr r3, [pc, #552] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000cfe: 681a ldr r2, [r3, #0]
|
|
8000d00: 2380 movs r3, #128 ; 0x80
|
|
8000d02: 029b lsls r3, r3, #10
|
|
8000d04: 4013 ands r3, r2
|
|
8000d06: d0f0 beq.n 8000cea <HAL_RCC_OscConfig+0xee>
|
|
8000d08: e015 b.n 8000d36 <HAL_RCC_OscConfig+0x13a>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8000d0a: f7ff fd0f bl 800072c <HAL_GetTick>
|
|
8000d0e: 0003 movs r3, r0
|
|
8000d10: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till HSE is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
|
8000d12: e008 b.n 8000d26 <HAL_RCC_OscConfig+0x12a>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
|
|
8000d14: f7ff fd0a bl 800072c <HAL_GetTick>
|
|
8000d18: 0002 movs r2, r0
|
|
8000d1a: 69bb ldr r3, [r7, #24]
|
|
8000d1c: 1ad3 subs r3, r2, r3
|
|
8000d1e: 2b64 cmp r3, #100 ; 0x64
|
|
8000d20: d901 bls.n 8000d26 <HAL_RCC_OscConfig+0x12a>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8000d22: 2303 movs r3, #3
|
|
8000d24: e275 b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
|
8000d26: 4b80 ldr r3, [pc, #512] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000d28: 681a ldr r2, [r3, #0]
|
|
8000d2a: 2380 movs r3, #128 ; 0x80
|
|
8000d2c: 029b lsls r3, r3, #10
|
|
8000d2e: 4013 ands r3, r2
|
|
8000d30: d1f0 bne.n 8000d14 <HAL_RCC_OscConfig+0x118>
|
|
8000d32: e000 b.n 8000d36 <HAL_RCC_OscConfig+0x13a>
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
|
8000d34: 46c0 nop ; (mov r8, r8)
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*----------------------------- HSI Configuration --------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
|
|
8000d36: 687b ldr r3, [r7, #4]
|
|
8000d38: 681b ldr r3, [r3, #0]
|
|
8000d3a: 2202 movs r2, #2
|
|
8000d3c: 4013 ands r3, r2
|
|
8000d3e: d100 bne.n 8000d42 <HAL_RCC_OscConfig+0x146>
|
|
8000d40: e069 b.n 8000e16 <HAL_RCC_OscConfig+0x21a>
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
|
|
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
|
|
|
|
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
|
|
8000d42: 4b79 ldr r3, [pc, #484] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000d44: 685b ldr r3, [r3, #4]
|
|
8000d46: 220c movs r2, #12
|
|
8000d48: 4013 ands r3, r2
|
|
8000d4a: d00b beq.n 8000d64 <HAL_RCC_OscConfig+0x168>
|
|
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)))
|
|
8000d4c: 4b76 ldr r3, [pc, #472] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000d4e: 685b ldr r3, [r3, #4]
|
|
8000d50: 220c movs r2, #12
|
|
8000d52: 4013 ands r3, r2
|
|
8000d54: 2b08 cmp r3, #8
|
|
8000d56: d11c bne.n 8000d92 <HAL_RCC_OscConfig+0x196>
|
|
8000d58: 4b73 ldr r3, [pc, #460] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000d5a: 685a ldr r2, [r3, #4]
|
|
8000d5c: 2380 movs r3, #128 ; 0x80
|
|
8000d5e: 025b lsls r3, r3, #9
|
|
8000d60: 4013 ands r3, r2
|
|
8000d62: d116 bne.n 8000d92 <HAL_RCC_OscConfig+0x196>
|
|
{
|
|
/* When HSI is used as system clock it will not disabled */
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
|
8000d64: 4b70 ldr r3, [pc, #448] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000d66: 681b ldr r3, [r3, #0]
|
|
8000d68: 2202 movs r2, #2
|
|
8000d6a: 4013 ands r3, r2
|
|
8000d6c: d005 beq.n 8000d7a <HAL_RCC_OscConfig+0x17e>
|
|
8000d6e: 687b ldr r3, [r7, #4]
|
|
8000d70: 68db ldr r3, [r3, #12]
|
|
8000d72: 2b01 cmp r3, #1
|
|
8000d74: d001 beq.n 8000d7a <HAL_RCC_OscConfig+0x17e>
|
|
{
|
|
return HAL_ERROR;
|
|
8000d76: 2301 movs r3, #1
|
|
8000d78: e24b b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
}
|
|
/* Otherwise, just the calibration is allowed */
|
|
else
|
|
{
|
|
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
8000d7a: 4b6b ldr r3, [pc, #428] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000d7c: 681b ldr r3, [r3, #0]
|
|
8000d7e: 22f8 movs r2, #248 ; 0xf8
|
|
8000d80: 4393 bics r3, r2
|
|
8000d82: 0019 movs r1, r3
|
|
8000d84: 687b ldr r3, [r7, #4]
|
|
8000d86: 691b ldr r3, [r3, #16]
|
|
8000d88: 00da lsls r2, r3, #3
|
|
8000d8a: 4b67 ldr r3, [pc, #412] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000d8c: 430a orrs r2, r1
|
|
8000d8e: 601a str r2, [r3, #0]
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
|
8000d90: e041 b.n 8000e16 <HAL_RCC_OscConfig+0x21a>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check the HSI State */
|
|
if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
|
|
8000d92: 687b ldr r3, [r7, #4]
|
|
8000d94: 68db ldr r3, [r3, #12]
|
|
8000d96: 2b00 cmp r3, #0
|
|
8000d98: d024 beq.n 8000de4 <HAL_RCC_OscConfig+0x1e8>
|
|
{
|
|
/* Enable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI_ENABLE();
|
|
8000d9a: 4b63 ldr r3, [pc, #396] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000d9c: 681a ldr r2, [r3, #0]
|
|
8000d9e: 4b62 ldr r3, [pc, #392] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000da0: 2101 movs r1, #1
|
|
8000da2: 430a orrs r2, r1
|
|
8000da4: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8000da6: f7ff fcc1 bl 800072c <HAL_GetTick>
|
|
8000daa: 0003 movs r3, r0
|
|
8000dac: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till HSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
8000dae: e008 b.n 8000dc2 <HAL_RCC_OscConfig+0x1c6>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
|
|
8000db0: f7ff fcbc bl 800072c <HAL_GetTick>
|
|
8000db4: 0002 movs r2, r0
|
|
8000db6: 69bb ldr r3, [r7, #24]
|
|
8000db8: 1ad3 subs r3, r2, r3
|
|
8000dba: 2b02 cmp r3, #2
|
|
8000dbc: d901 bls.n 8000dc2 <HAL_RCC_OscConfig+0x1c6>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8000dbe: 2303 movs r3, #3
|
|
8000dc0: e227 b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
8000dc2: 4b59 ldr r3, [pc, #356] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000dc4: 681b ldr r3, [r3, #0]
|
|
8000dc6: 2202 movs r2, #2
|
|
8000dc8: 4013 ands r3, r2
|
|
8000dca: d0f1 beq.n 8000db0 <HAL_RCC_OscConfig+0x1b4>
|
|
}
|
|
}
|
|
|
|
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
8000dcc: 4b56 ldr r3, [pc, #344] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000dce: 681b ldr r3, [r3, #0]
|
|
8000dd0: 22f8 movs r2, #248 ; 0xf8
|
|
8000dd2: 4393 bics r3, r2
|
|
8000dd4: 0019 movs r1, r3
|
|
8000dd6: 687b ldr r3, [r7, #4]
|
|
8000dd8: 691b ldr r3, [r3, #16]
|
|
8000dda: 00da lsls r2, r3, #3
|
|
8000ddc: 4b52 ldr r3, [pc, #328] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000dde: 430a orrs r2, r1
|
|
8000de0: 601a str r2, [r3, #0]
|
|
8000de2: e018 b.n 8000e16 <HAL_RCC_OscConfig+0x21a>
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI_DISABLE();
|
|
8000de4: 4b50 ldr r3, [pc, #320] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000de6: 681a ldr r2, [r3, #0]
|
|
8000de8: 4b4f ldr r3, [pc, #316] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000dea: 2101 movs r1, #1
|
|
8000dec: 438a bics r2, r1
|
|
8000dee: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8000df0: f7ff fc9c bl 800072c <HAL_GetTick>
|
|
8000df4: 0003 movs r3, r0
|
|
8000df6: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till HSI is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
|
8000df8: e008 b.n 8000e0c <HAL_RCC_OscConfig+0x210>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
|
|
8000dfa: f7ff fc97 bl 800072c <HAL_GetTick>
|
|
8000dfe: 0002 movs r2, r0
|
|
8000e00: 69bb ldr r3, [r7, #24]
|
|
8000e02: 1ad3 subs r3, r2, r3
|
|
8000e04: 2b02 cmp r3, #2
|
|
8000e06: d901 bls.n 8000e0c <HAL_RCC_OscConfig+0x210>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8000e08: 2303 movs r3, #3
|
|
8000e0a: e202 b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
|
8000e0c: 4b46 ldr r3, [pc, #280] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000e0e: 681b ldr r3, [r3, #0]
|
|
8000e10: 2202 movs r2, #2
|
|
8000e12: 4013 ands r3, r2
|
|
8000e14: d1f1 bne.n 8000dfa <HAL_RCC_OscConfig+0x1fe>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSI Configuration -------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
|
|
8000e16: 687b ldr r3, [r7, #4]
|
|
8000e18: 681b ldr r3, [r3, #0]
|
|
8000e1a: 2208 movs r2, #8
|
|
8000e1c: 4013 ands r3, r2
|
|
8000e1e: d036 beq.n 8000e8e <HAL_RCC_OscConfig+0x292>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
|
|
|
|
/* Check the LSI State */
|
|
if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
|
|
8000e20: 687b ldr r3, [r7, #4]
|
|
8000e22: 69db ldr r3, [r3, #28]
|
|
8000e24: 2b00 cmp r3, #0
|
|
8000e26: d019 beq.n 8000e5c <HAL_RCC_OscConfig+0x260>
|
|
{
|
|
/* Enable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_ENABLE();
|
|
8000e28: 4b3f ldr r3, [pc, #252] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000e2a: 6a5a ldr r2, [r3, #36] ; 0x24
|
|
8000e2c: 4b3e ldr r3, [pc, #248] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000e2e: 2101 movs r1, #1
|
|
8000e30: 430a orrs r2, r1
|
|
8000e32: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8000e34: f7ff fc7a bl 800072c <HAL_GetTick>
|
|
8000e38: 0003 movs r3, r0
|
|
8000e3a: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till LSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
|
8000e3c: e008 b.n 8000e50 <HAL_RCC_OscConfig+0x254>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
|
|
8000e3e: f7ff fc75 bl 800072c <HAL_GetTick>
|
|
8000e42: 0002 movs r2, r0
|
|
8000e44: 69bb ldr r3, [r7, #24]
|
|
8000e46: 1ad3 subs r3, r2, r3
|
|
8000e48: 2b02 cmp r3, #2
|
|
8000e4a: d901 bls.n 8000e50 <HAL_RCC_OscConfig+0x254>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8000e4c: 2303 movs r3, #3
|
|
8000e4e: e1e0 b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
|
8000e50: 4b35 ldr r3, [pc, #212] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000e52: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8000e54: 2202 movs r2, #2
|
|
8000e56: 4013 ands r3, r2
|
|
8000e58: d0f1 beq.n 8000e3e <HAL_RCC_OscConfig+0x242>
|
|
8000e5a: e018 b.n 8000e8e <HAL_RCC_OscConfig+0x292>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_DISABLE();
|
|
8000e5c: 4b32 ldr r3, [pc, #200] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000e5e: 6a5a ldr r2, [r3, #36] ; 0x24
|
|
8000e60: 4b31 ldr r3, [pc, #196] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000e62: 2101 movs r1, #1
|
|
8000e64: 438a bics r2, r1
|
|
8000e66: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8000e68: f7ff fc60 bl 800072c <HAL_GetTick>
|
|
8000e6c: 0003 movs r3, r0
|
|
8000e6e: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till LSI is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
|
8000e70: e008 b.n 8000e84 <HAL_RCC_OscConfig+0x288>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
|
|
8000e72: f7ff fc5b bl 800072c <HAL_GetTick>
|
|
8000e76: 0002 movs r2, r0
|
|
8000e78: 69bb ldr r3, [r7, #24]
|
|
8000e7a: 1ad3 subs r3, r2, r3
|
|
8000e7c: 2b02 cmp r3, #2
|
|
8000e7e: d901 bls.n 8000e84 <HAL_RCC_OscConfig+0x288>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8000e80: 2303 movs r3, #3
|
|
8000e82: e1c6 b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
|
8000e84: 4b28 ldr r3, [pc, #160] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000e86: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8000e88: 2202 movs r2, #2
|
|
8000e8a: 4013 ands r3, r2
|
|
8000e8c: d1f1 bne.n 8000e72 <HAL_RCC_OscConfig+0x276>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSE Configuration -------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
|
|
8000e8e: 687b ldr r3, [r7, #4]
|
|
8000e90: 681b ldr r3, [r3, #0]
|
|
8000e92: 2204 movs r2, #4
|
|
8000e94: 4013 ands r3, r2
|
|
8000e96: d100 bne.n 8000e9a <HAL_RCC_OscConfig+0x29e>
|
|
8000e98: e0b4 b.n 8001004 <HAL_RCC_OscConfig+0x408>
|
|
{
|
|
FlagStatus pwrclkchanged = RESET;
|
|
8000e9a: 201f movs r0, #31
|
|
8000e9c: 183b adds r3, r7, r0
|
|
8000e9e: 2200 movs r2, #0
|
|
8000ea0: 701a strb r2, [r3, #0]
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
|
|
|
|
/* Update LSE configuration in Backup Domain control register */
|
|
/* Requires to enable write access to Backup Domain of necessary */
|
|
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
|
|
8000ea2: 4b21 ldr r3, [pc, #132] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000ea4: 69da ldr r2, [r3, #28]
|
|
8000ea6: 2380 movs r3, #128 ; 0x80
|
|
8000ea8: 055b lsls r3, r3, #21
|
|
8000eaa: 4013 ands r3, r2
|
|
8000eac: d110 bne.n 8000ed0 <HAL_RCC_OscConfig+0x2d4>
|
|
{
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
8000eae: 4b1e ldr r3, [pc, #120] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000eb0: 69da ldr r2, [r3, #28]
|
|
8000eb2: 4b1d ldr r3, [pc, #116] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000eb4: 2180 movs r1, #128 ; 0x80
|
|
8000eb6: 0549 lsls r1, r1, #21
|
|
8000eb8: 430a orrs r2, r1
|
|
8000eba: 61da str r2, [r3, #28]
|
|
8000ebc: 4b1a ldr r3, [pc, #104] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000ebe: 69da ldr r2, [r3, #28]
|
|
8000ec0: 2380 movs r3, #128 ; 0x80
|
|
8000ec2: 055b lsls r3, r3, #21
|
|
8000ec4: 4013 ands r3, r2
|
|
8000ec6: 60fb str r3, [r7, #12]
|
|
8000ec8: 68fb ldr r3, [r7, #12]
|
|
pwrclkchanged = SET;
|
|
8000eca: 183b adds r3, r7, r0
|
|
8000ecc: 2201 movs r2, #1
|
|
8000ece: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8000ed0: 4b18 ldr r3, [pc, #96] ; (8000f34 <HAL_RCC_OscConfig+0x338>)
|
|
8000ed2: 681a ldr r2, [r3, #0]
|
|
8000ed4: 2380 movs r3, #128 ; 0x80
|
|
8000ed6: 005b lsls r3, r3, #1
|
|
8000ed8: 4013 ands r3, r2
|
|
8000eda: d11a bne.n 8000f12 <HAL_RCC_OscConfig+0x316>
|
|
{
|
|
/* Enable write access to Backup domain */
|
|
SET_BIT(PWR->CR, PWR_CR_DBP);
|
|
8000edc: 4b15 ldr r3, [pc, #84] ; (8000f34 <HAL_RCC_OscConfig+0x338>)
|
|
8000ede: 681a ldr r2, [r3, #0]
|
|
8000ee0: 4b14 ldr r3, [pc, #80] ; (8000f34 <HAL_RCC_OscConfig+0x338>)
|
|
8000ee2: 2180 movs r1, #128 ; 0x80
|
|
8000ee4: 0049 lsls r1, r1, #1
|
|
8000ee6: 430a orrs r2, r1
|
|
8000ee8: 601a str r2, [r3, #0]
|
|
|
|
/* Wait for Backup domain Write protection disable */
|
|
tickstart = HAL_GetTick();
|
|
8000eea: f7ff fc1f bl 800072c <HAL_GetTick>
|
|
8000eee: 0003 movs r3, r0
|
|
8000ef0: 61bb str r3, [r7, #24]
|
|
|
|
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8000ef2: e008 b.n 8000f06 <HAL_RCC_OscConfig+0x30a>
|
|
{
|
|
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
|
8000ef4: f7ff fc1a bl 800072c <HAL_GetTick>
|
|
8000ef8: 0002 movs r2, r0
|
|
8000efa: 69bb ldr r3, [r7, #24]
|
|
8000efc: 1ad3 subs r3, r2, r3
|
|
8000efe: 2b64 cmp r3, #100 ; 0x64
|
|
8000f00: d901 bls.n 8000f06 <HAL_RCC_OscConfig+0x30a>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8000f02: 2303 movs r3, #3
|
|
8000f04: e185 b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8000f06: 4b0b ldr r3, [pc, #44] ; (8000f34 <HAL_RCC_OscConfig+0x338>)
|
|
8000f08: 681a ldr r2, [r3, #0]
|
|
8000f0a: 2380 movs r3, #128 ; 0x80
|
|
8000f0c: 005b lsls r3, r3, #1
|
|
8000f0e: 4013 ands r3, r2
|
|
8000f10: d0f0 beq.n 8000ef4 <HAL_RCC_OscConfig+0x2f8>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Set the new LSE configuration -----------------------------------------*/
|
|
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
|
8000f12: 687b ldr r3, [r7, #4]
|
|
8000f14: 689b ldr r3, [r3, #8]
|
|
8000f16: 2b01 cmp r3, #1
|
|
8000f18: d10e bne.n 8000f38 <HAL_RCC_OscConfig+0x33c>
|
|
8000f1a: 4b03 ldr r3, [pc, #12] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000f1c: 6a1a ldr r2, [r3, #32]
|
|
8000f1e: 4b02 ldr r3, [pc, #8] ; (8000f28 <HAL_RCC_OscConfig+0x32c>)
|
|
8000f20: 2101 movs r1, #1
|
|
8000f22: 430a orrs r2, r1
|
|
8000f24: 621a str r2, [r3, #32]
|
|
8000f26: e035 b.n 8000f94 <HAL_RCC_OscConfig+0x398>
|
|
8000f28: 40021000 .word 0x40021000
|
|
8000f2c: fffeffff .word 0xfffeffff
|
|
8000f30: fffbffff .word 0xfffbffff
|
|
8000f34: 40007000 .word 0x40007000
|
|
8000f38: 687b ldr r3, [r7, #4]
|
|
8000f3a: 689b ldr r3, [r3, #8]
|
|
8000f3c: 2b00 cmp r3, #0
|
|
8000f3e: d10c bne.n 8000f5a <HAL_RCC_OscConfig+0x35e>
|
|
8000f40: 4bb6 ldr r3, [pc, #728] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000f42: 6a1a ldr r2, [r3, #32]
|
|
8000f44: 4bb5 ldr r3, [pc, #724] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000f46: 2101 movs r1, #1
|
|
8000f48: 438a bics r2, r1
|
|
8000f4a: 621a str r2, [r3, #32]
|
|
8000f4c: 4bb3 ldr r3, [pc, #716] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000f4e: 6a1a ldr r2, [r3, #32]
|
|
8000f50: 4bb2 ldr r3, [pc, #712] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000f52: 2104 movs r1, #4
|
|
8000f54: 438a bics r2, r1
|
|
8000f56: 621a str r2, [r3, #32]
|
|
8000f58: e01c b.n 8000f94 <HAL_RCC_OscConfig+0x398>
|
|
8000f5a: 687b ldr r3, [r7, #4]
|
|
8000f5c: 689b ldr r3, [r3, #8]
|
|
8000f5e: 2b05 cmp r3, #5
|
|
8000f60: d10c bne.n 8000f7c <HAL_RCC_OscConfig+0x380>
|
|
8000f62: 4bae ldr r3, [pc, #696] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000f64: 6a1a ldr r2, [r3, #32]
|
|
8000f66: 4bad ldr r3, [pc, #692] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000f68: 2104 movs r1, #4
|
|
8000f6a: 430a orrs r2, r1
|
|
8000f6c: 621a str r2, [r3, #32]
|
|
8000f6e: 4bab ldr r3, [pc, #684] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000f70: 6a1a ldr r2, [r3, #32]
|
|
8000f72: 4baa ldr r3, [pc, #680] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000f74: 2101 movs r1, #1
|
|
8000f76: 430a orrs r2, r1
|
|
8000f78: 621a str r2, [r3, #32]
|
|
8000f7a: e00b b.n 8000f94 <HAL_RCC_OscConfig+0x398>
|
|
8000f7c: 4ba7 ldr r3, [pc, #668] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000f7e: 6a1a ldr r2, [r3, #32]
|
|
8000f80: 4ba6 ldr r3, [pc, #664] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000f82: 2101 movs r1, #1
|
|
8000f84: 438a bics r2, r1
|
|
8000f86: 621a str r2, [r3, #32]
|
|
8000f88: 4ba4 ldr r3, [pc, #656] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000f8a: 6a1a ldr r2, [r3, #32]
|
|
8000f8c: 4ba3 ldr r3, [pc, #652] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000f8e: 2104 movs r1, #4
|
|
8000f90: 438a bics r2, r1
|
|
8000f92: 621a str r2, [r3, #32]
|
|
/* Check the LSE State */
|
|
if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
|
|
8000f94: 687b ldr r3, [r7, #4]
|
|
8000f96: 689b ldr r3, [r3, #8]
|
|
8000f98: 2b00 cmp r3, #0
|
|
8000f9a: d014 beq.n 8000fc6 <HAL_RCC_OscConfig+0x3ca>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8000f9c: f7ff fbc6 bl 800072c <HAL_GetTick>
|
|
8000fa0: 0003 movs r3, r0
|
|
8000fa2: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till LSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8000fa4: e009 b.n 8000fba <HAL_RCC_OscConfig+0x3be>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
|
|
8000fa6: f7ff fbc1 bl 800072c <HAL_GetTick>
|
|
8000faa: 0002 movs r2, r0
|
|
8000fac: 69bb ldr r3, [r7, #24]
|
|
8000fae: 1ad3 subs r3, r2, r3
|
|
8000fb0: 4a9b ldr r2, [pc, #620] ; (8001220 <HAL_RCC_OscConfig+0x624>)
|
|
8000fb2: 4293 cmp r3, r2
|
|
8000fb4: d901 bls.n 8000fba <HAL_RCC_OscConfig+0x3be>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8000fb6: 2303 movs r3, #3
|
|
8000fb8: e12b b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8000fba: 4b98 ldr r3, [pc, #608] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000fbc: 6a1b ldr r3, [r3, #32]
|
|
8000fbe: 2202 movs r2, #2
|
|
8000fc0: 4013 ands r3, r2
|
|
8000fc2: d0f0 beq.n 8000fa6 <HAL_RCC_OscConfig+0x3aa>
|
|
8000fc4: e013 b.n 8000fee <HAL_RCC_OscConfig+0x3f2>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8000fc6: f7ff fbb1 bl 800072c <HAL_GetTick>
|
|
8000fca: 0003 movs r3, r0
|
|
8000fcc: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till LSE is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
|
8000fce: e009 b.n 8000fe4 <HAL_RCC_OscConfig+0x3e8>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
|
|
8000fd0: f7ff fbac bl 800072c <HAL_GetTick>
|
|
8000fd4: 0002 movs r2, r0
|
|
8000fd6: 69bb ldr r3, [r7, #24]
|
|
8000fd8: 1ad3 subs r3, r2, r3
|
|
8000fda: 4a91 ldr r2, [pc, #580] ; (8001220 <HAL_RCC_OscConfig+0x624>)
|
|
8000fdc: 4293 cmp r3, r2
|
|
8000fde: d901 bls.n 8000fe4 <HAL_RCC_OscConfig+0x3e8>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8000fe0: 2303 movs r3, #3
|
|
8000fe2: e116 b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
|
8000fe4: 4b8d ldr r3, [pc, #564] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000fe6: 6a1b ldr r3, [r3, #32]
|
|
8000fe8: 2202 movs r2, #2
|
|
8000fea: 4013 ands r3, r2
|
|
8000fec: d1f0 bne.n 8000fd0 <HAL_RCC_OscConfig+0x3d4>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Require to disable power clock if necessary */
|
|
if(pwrclkchanged == SET)
|
|
8000fee: 231f movs r3, #31
|
|
8000ff0: 18fb adds r3, r7, r3
|
|
8000ff2: 781b ldrb r3, [r3, #0]
|
|
8000ff4: 2b01 cmp r3, #1
|
|
8000ff6: d105 bne.n 8001004 <HAL_RCC_OscConfig+0x408>
|
|
{
|
|
__HAL_RCC_PWR_CLK_DISABLE();
|
|
8000ff8: 4b88 ldr r3, [pc, #544] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000ffa: 69da ldr r2, [r3, #28]
|
|
8000ffc: 4b87 ldr r3, [pc, #540] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8000ffe: 4989 ldr r1, [pc, #548] ; (8001224 <HAL_RCC_OscConfig+0x628>)
|
|
8001000: 400a ands r2, r1
|
|
8001002: 61da str r2, [r3, #28]
|
|
}
|
|
}
|
|
|
|
/*----------------------------- HSI14 Configuration --------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14)
|
|
8001004: 687b ldr r3, [r7, #4]
|
|
8001006: 681b ldr r3, [r3, #0]
|
|
8001008: 2210 movs r2, #16
|
|
800100a: 4013 ands r3, r2
|
|
800100c: d063 beq.n 80010d6 <HAL_RCC_OscConfig+0x4da>
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State));
|
|
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue));
|
|
|
|
/* Check the HSI14 State */
|
|
if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON)
|
|
800100e: 687b ldr r3, [r7, #4]
|
|
8001010: 695b ldr r3, [r3, #20]
|
|
8001012: 2b01 cmp r3, #1
|
|
8001014: d12a bne.n 800106c <HAL_RCC_OscConfig+0x470>
|
|
{
|
|
/* Disable ADC control of the Internal High Speed oscillator HSI14 */
|
|
__HAL_RCC_HSI14ADC_DISABLE();
|
|
8001016: 4b81 ldr r3, [pc, #516] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8001018: 6b5a ldr r2, [r3, #52] ; 0x34
|
|
800101a: 4b80 ldr r3, [pc, #512] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
800101c: 2104 movs r1, #4
|
|
800101e: 430a orrs r2, r1
|
|
8001020: 635a str r2, [r3, #52] ; 0x34
|
|
|
|
/* Enable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI14_ENABLE();
|
|
8001022: 4b7e ldr r3, [pc, #504] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8001024: 6b5a ldr r2, [r3, #52] ; 0x34
|
|
8001026: 4b7d ldr r3, [pc, #500] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8001028: 2101 movs r1, #1
|
|
800102a: 430a orrs r2, r1
|
|
800102c: 635a str r2, [r3, #52] ; 0x34
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
800102e: f7ff fb7d bl 800072c <HAL_GetTick>
|
|
8001032: 0003 movs r3, r0
|
|
8001034: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till HSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET)
|
|
8001036: e008 b.n 800104a <HAL_RCC_OscConfig+0x44e>
|
|
{
|
|
if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
|
|
8001038: f7ff fb78 bl 800072c <HAL_GetTick>
|
|
800103c: 0002 movs r2, r0
|
|
800103e: 69bb ldr r3, [r7, #24]
|
|
8001040: 1ad3 subs r3, r2, r3
|
|
8001042: 2b02 cmp r3, #2
|
|
8001044: d901 bls.n 800104a <HAL_RCC_OscConfig+0x44e>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8001046: 2303 movs r3, #3
|
|
8001048: e0e3 b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET)
|
|
800104a: 4b74 ldr r3, [pc, #464] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
800104c: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
800104e: 2202 movs r2, #2
|
|
8001050: 4013 ands r3, r2
|
|
8001052: d0f1 beq.n 8001038 <HAL_RCC_OscConfig+0x43c>
|
|
}
|
|
}
|
|
|
|
/* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
|
|
__HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
|
|
8001054: 4b71 ldr r3, [pc, #452] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8001056: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8001058: 22f8 movs r2, #248 ; 0xf8
|
|
800105a: 4393 bics r3, r2
|
|
800105c: 0019 movs r1, r3
|
|
800105e: 687b ldr r3, [r7, #4]
|
|
8001060: 699b ldr r3, [r3, #24]
|
|
8001062: 00da lsls r2, r3, #3
|
|
8001064: 4b6d ldr r3, [pc, #436] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8001066: 430a orrs r2, r1
|
|
8001068: 635a str r2, [r3, #52] ; 0x34
|
|
800106a: e034 b.n 80010d6 <HAL_RCC_OscConfig+0x4da>
|
|
}
|
|
else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL)
|
|
800106c: 687b ldr r3, [r7, #4]
|
|
800106e: 695b ldr r3, [r3, #20]
|
|
8001070: 3305 adds r3, #5
|
|
8001072: d111 bne.n 8001098 <HAL_RCC_OscConfig+0x49c>
|
|
{
|
|
/* Enable ADC control of the Internal High Speed oscillator HSI14 */
|
|
__HAL_RCC_HSI14ADC_ENABLE();
|
|
8001074: 4b69 ldr r3, [pc, #420] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8001076: 6b5a ldr r2, [r3, #52] ; 0x34
|
|
8001078: 4b68 ldr r3, [pc, #416] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
800107a: 2104 movs r1, #4
|
|
800107c: 438a bics r2, r1
|
|
800107e: 635a str r2, [r3, #52] ; 0x34
|
|
|
|
/* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
|
|
__HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
|
|
8001080: 4b66 ldr r3, [pc, #408] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8001082: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8001084: 22f8 movs r2, #248 ; 0xf8
|
|
8001086: 4393 bics r3, r2
|
|
8001088: 0019 movs r1, r3
|
|
800108a: 687b ldr r3, [r7, #4]
|
|
800108c: 699b ldr r3, [r3, #24]
|
|
800108e: 00da lsls r2, r3, #3
|
|
8001090: 4b62 ldr r3, [pc, #392] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8001092: 430a orrs r2, r1
|
|
8001094: 635a str r2, [r3, #52] ; 0x34
|
|
8001096: e01e b.n 80010d6 <HAL_RCC_OscConfig+0x4da>
|
|
}
|
|
else
|
|
{
|
|
/* Disable ADC control of the Internal High Speed oscillator HSI14 */
|
|
__HAL_RCC_HSI14ADC_DISABLE();
|
|
8001098: 4b60 ldr r3, [pc, #384] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
800109a: 6b5a ldr r2, [r3, #52] ; 0x34
|
|
800109c: 4b5f ldr r3, [pc, #380] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
800109e: 2104 movs r1, #4
|
|
80010a0: 430a orrs r2, r1
|
|
80010a2: 635a str r2, [r3, #52] ; 0x34
|
|
|
|
/* Disable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI14_DISABLE();
|
|
80010a4: 4b5d ldr r3, [pc, #372] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
80010a6: 6b5a ldr r2, [r3, #52] ; 0x34
|
|
80010a8: 4b5c ldr r3, [pc, #368] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
80010aa: 2101 movs r1, #1
|
|
80010ac: 438a bics r2, r1
|
|
80010ae: 635a str r2, [r3, #52] ; 0x34
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80010b0: f7ff fb3c bl 800072c <HAL_GetTick>
|
|
80010b4: 0003 movs r3, r0
|
|
80010b6: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till HSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET)
|
|
80010b8: e008 b.n 80010cc <HAL_RCC_OscConfig+0x4d0>
|
|
{
|
|
if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
|
|
80010ba: f7ff fb37 bl 800072c <HAL_GetTick>
|
|
80010be: 0002 movs r2, r0
|
|
80010c0: 69bb ldr r3, [r7, #24]
|
|
80010c2: 1ad3 subs r3, r2, r3
|
|
80010c4: 2b02 cmp r3, #2
|
|
80010c6: d901 bls.n 80010cc <HAL_RCC_OscConfig+0x4d0>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80010c8: 2303 movs r3, #3
|
|
80010ca: e0a2 b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET)
|
|
80010cc: 4b53 ldr r3, [pc, #332] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
80010ce: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
80010d0: 2202 movs r2, #2
|
|
80010d2: 4013 ands r3, r2
|
|
80010d4: d1f1 bne.n 80010ba <HAL_RCC_OscConfig+0x4be>
|
|
#endif /* RCC_HSI48_SUPPORT */
|
|
|
|
/*-------------------------------- PLL Configuration -----------------------*/
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
|
|
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
|
|
80010d6: 687b ldr r3, [r7, #4]
|
|
80010d8: 6a1b ldr r3, [r3, #32]
|
|
80010da: 2b00 cmp r3, #0
|
|
80010dc: d100 bne.n 80010e0 <HAL_RCC_OscConfig+0x4e4>
|
|
80010de: e097 b.n 8001210 <HAL_RCC_OscConfig+0x614>
|
|
{
|
|
/* Check if the PLL is used as system clock or not */
|
|
if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
|
|
80010e0: 4b4e ldr r3, [pc, #312] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
80010e2: 685b ldr r3, [r3, #4]
|
|
80010e4: 220c movs r2, #12
|
|
80010e6: 4013 ands r3, r2
|
|
80010e8: 2b08 cmp r3, #8
|
|
80010ea: d100 bne.n 80010ee <HAL_RCC_OscConfig+0x4f2>
|
|
80010ec: e06b b.n 80011c6 <HAL_RCC_OscConfig+0x5ca>
|
|
{
|
|
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
|
|
80010ee: 687b ldr r3, [r7, #4]
|
|
80010f0: 6a1b ldr r3, [r3, #32]
|
|
80010f2: 2b02 cmp r3, #2
|
|
80010f4: d14c bne.n 8001190 <HAL_RCC_OscConfig+0x594>
|
|
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
|
|
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
|
|
assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV));
|
|
|
|
/* Disable the main PLL. */
|
|
__HAL_RCC_PLL_DISABLE();
|
|
80010f6: 4b49 ldr r3, [pc, #292] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
80010f8: 681a ldr r2, [r3, #0]
|
|
80010fa: 4b48 ldr r3, [pc, #288] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
80010fc: 494a ldr r1, [pc, #296] ; (8001228 <HAL_RCC_OscConfig+0x62c>)
|
|
80010fe: 400a ands r2, r1
|
|
8001100: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8001102: f7ff fb13 bl 800072c <HAL_GetTick>
|
|
8001106: 0003 movs r3, r0
|
|
8001108: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till PLL is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
800110a: e008 b.n 800111e <HAL_RCC_OscConfig+0x522>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
800110c: f7ff fb0e bl 800072c <HAL_GetTick>
|
|
8001110: 0002 movs r2, r0
|
|
8001112: 69bb ldr r3, [r7, #24]
|
|
8001114: 1ad3 subs r3, r2, r3
|
|
8001116: 2b02 cmp r3, #2
|
|
8001118: d901 bls.n 800111e <HAL_RCC_OscConfig+0x522>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800111a: 2303 movs r3, #3
|
|
800111c: e079 b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
800111e: 4b3f ldr r3, [pc, #252] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8001120: 681a ldr r2, [r3, #0]
|
|
8001122: 2380 movs r3, #128 ; 0x80
|
|
8001124: 049b lsls r3, r3, #18
|
|
8001126: 4013 ands r3, r2
|
|
8001128: d1f0 bne.n 800110c <HAL_RCC_OscConfig+0x510>
|
|
}
|
|
}
|
|
|
|
/* Configure the main PLL clock source, predivider and multiplication factor. */
|
|
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
|
|
800112a: 4b3c ldr r3, [pc, #240] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
800112c: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
800112e: 220f movs r2, #15
|
|
8001130: 4393 bics r3, r2
|
|
8001132: 0019 movs r1, r3
|
|
8001134: 687b ldr r3, [r7, #4]
|
|
8001136: 6ada ldr r2, [r3, #44] ; 0x2c
|
|
8001138: 4b38 ldr r3, [pc, #224] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
800113a: 430a orrs r2, r1
|
|
800113c: 62da str r2, [r3, #44] ; 0x2c
|
|
800113e: 4b37 ldr r3, [pc, #220] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8001140: 685b ldr r3, [r3, #4]
|
|
8001142: 4a3a ldr r2, [pc, #232] ; (800122c <HAL_RCC_OscConfig+0x630>)
|
|
8001144: 4013 ands r3, r2
|
|
8001146: 0019 movs r1, r3
|
|
8001148: 687b ldr r3, [r7, #4]
|
|
800114a: 6a9a ldr r2, [r3, #40] ; 0x28
|
|
800114c: 687b ldr r3, [r7, #4]
|
|
800114e: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8001150: 431a orrs r2, r3
|
|
8001152: 4b32 ldr r3, [pc, #200] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8001154: 430a orrs r2, r1
|
|
8001156: 605a str r2, [r3, #4]
|
|
RCC_OscInitStruct->PLL.PREDIV,
|
|
RCC_OscInitStruct->PLL.PLLMUL);
|
|
/* Enable the main PLL. */
|
|
__HAL_RCC_PLL_ENABLE();
|
|
8001158: 4b30 ldr r3, [pc, #192] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
800115a: 681a ldr r2, [r3, #0]
|
|
800115c: 4b2f ldr r3, [pc, #188] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
800115e: 2180 movs r1, #128 ; 0x80
|
|
8001160: 0449 lsls r1, r1, #17
|
|
8001162: 430a orrs r2, r1
|
|
8001164: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8001166: f7ff fae1 bl 800072c <HAL_GetTick>
|
|
800116a: 0003 movs r3, r0
|
|
800116c: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till PLL is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
800116e: e008 b.n 8001182 <HAL_RCC_OscConfig+0x586>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
8001170: f7ff fadc bl 800072c <HAL_GetTick>
|
|
8001174: 0002 movs r2, r0
|
|
8001176: 69bb ldr r3, [r7, #24]
|
|
8001178: 1ad3 subs r3, r2, r3
|
|
800117a: 2b02 cmp r3, #2
|
|
800117c: d901 bls.n 8001182 <HAL_RCC_OscConfig+0x586>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800117e: 2303 movs r3, #3
|
|
8001180: e047 b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
8001182: 4b26 ldr r3, [pc, #152] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8001184: 681a ldr r2, [r3, #0]
|
|
8001186: 2380 movs r3, #128 ; 0x80
|
|
8001188: 049b lsls r3, r3, #18
|
|
800118a: 4013 ands r3, r2
|
|
800118c: d0f0 beq.n 8001170 <HAL_RCC_OscConfig+0x574>
|
|
800118e: e03f b.n 8001210 <HAL_RCC_OscConfig+0x614>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the main PLL. */
|
|
__HAL_RCC_PLL_DISABLE();
|
|
8001190: 4b22 ldr r3, [pc, #136] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8001192: 681a ldr r2, [r3, #0]
|
|
8001194: 4b21 ldr r3, [pc, #132] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
8001196: 4924 ldr r1, [pc, #144] ; (8001228 <HAL_RCC_OscConfig+0x62c>)
|
|
8001198: 400a ands r2, r1
|
|
800119a: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
800119c: f7ff fac6 bl 800072c <HAL_GetTick>
|
|
80011a0: 0003 movs r3, r0
|
|
80011a2: 61bb str r3, [r7, #24]
|
|
|
|
/* Wait till PLL is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
80011a4: e008 b.n 80011b8 <HAL_RCC_OscConfig+0x5bc>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
80011a6: f7ff fac1 bl 800072c <HAL_GetTick>
|
|
80011aa: 0002 movs r2, r0
|
|
80011ac: 69bb ldr r3, [r7, #24]
|
|
80011ae: 1ad3 subs r3, r2, r3
|
|
80011b0: 2b02 cmp r3, #2
|
|
80011b2: d901 bls.n 80011b8 <HAL_RCC_OscConfig+0x5bc>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80011b4: 2303 movs r3, #3
|
|
80011b6: e02c b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
80011b8: 4b18 ldr r3, [pc, #96] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
80011ba: 681a ldr r2, [r3, #0]
|
|
80011bc: 2380 movs r3, #128 ; 0x80
|
|
80011be: 049b lsls r3, r3, #18
|
|
80011c0: 4013 ands r3, r2
|
|
80011c2: d1f0 bne.n 80011a6 <HAL_RCC_OscConfig+0x5aa>
|
|
80011c4: e024 b.n 8001210 <HAL_RCC_OscConfig+0x614>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check if there is a request to disable the PLL used as System clock source */
|
|
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
|
|
80011c6: 687b ldr r3, [r7, #4]
|
|
80011c8: 6a1b ldr r3, [r3, #32]
|
|
80011ca: 2b01 cmp r3, #1
|
|
80011cc: d101 bne.n 80011d2 <HAL_RCC_OscConfig+0x5d6>
|
|
{
|
|
return HAL_ERROR;
|
|
80011ce: 2301 movs r3, #1
|
|
80011d0: e01f b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
}
|
|
else
|
|
{
|
|
/* Do not return HAL_ERROR if request repeats the current configuration */
|
|
pll_config = RCC->CFGR;
|
|
80011d2: 4b12 ldr r3, [pc, #72] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
80011d4: 685b ldr r3, [r3, #4]
|
|
80011d6: 617b str r3, [r7, #20]
|
|
pll_config2 = RCC->CFGR2;
|
|
80011d8: 4b10 ldr r3, [pc, #64] ; (800121c <HAL_RCC_OscConfig+0x620>)
|
|
80011da: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
80011dc: 613b str r3, [r7, #16]
|
|
if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
80011de: 697a ldr r2, [r7, #20]
|
|
80011e0: 2380 movs r3, #128 ; 0x80
|
|
80011e2: 025b lsls r3, r3, #9
|
|
80011e4: 401a ands r2, r3
|
|
80011e6: 687b ldr r3, [r7, #4]
|
|
80011e8: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
80011ea: 429a cmp r2, r3
|
|
80011ec: d10e bne.n 800120c <HAL_RCC_OscConfig+0x610>
|
|
(READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) ||
|
|
80011ee: 693b ldr r3, [r7, #16]
|
|
80011f0: 220f movs r2, #15
|
|
80011f2: 401a ands r2, r3
|
|
80011f4: 687b ldr r3, [r7, #4]
|
|
80011f6: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
80011f8: 429a cmp r2, r3
|
|
80011fa: d107 bne.n 800120c <HAL_RCC_OscConfig+0x610>
|
|
(READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL))
|
|
80011fc: 697a ldr r2, [r7, #20]
|
|
80011fe: 23f0 movs r3, #240 ; 0xf0
|
|
8001200: 039b lsls r3, r3, #14
|
|
8001202: 401a ands r2, r3
|
|
8001204: 687b ldr r3, [r7, #4]
|
|
8001206: 6a9b ldr r3, [r3, #40] ; 0x28
|
|
(READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) ||
|
|
8001208: 429a cmp r2, r3
|
|
800120a: d001 beq.n 8001210 <HAL_RCC_OscConfig+0x614>
|
|
{
|
|
return HAL_ERROR;
|
|
800120c: 2301 movs r3, #1
|
|
800120e: e000 b.n 8001212 <HAL_RCC_OscConfig+0x616>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
8001210: 2300 movs r3, #0
|
|
}
|
|
8001212: 0018 movs r0, r3
|
|
8001214: 46bd mov sp, r7
|
|
8001216: b008 add sp, #32
|
|
8001218: bd80 pop {r7, pc}
|
|
800121a: 46c0 nop ; (mov r8, r8)
|
|
800121c: 40021000 .word 0x40021000
|
|
8001220: 00001388 .word 0x00001388
|
|
8001224: efffffff .word 0xefffffff
|
|
8001228: feffffff .word 0xfeffffff
|
|
800122c: ffc2ffff .word 0xffc2ffff
|
|
|
|
08001230 <HAL_RCC_ClockConfig>:
|
|
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
|
|
* currently used as system clock source.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
|
|
{
|
|
8001230: b580 push {r7, lr}
|
|
8001232: b084 sub sp, #16
|
|
8001234: af00 add r7, sp, #0
|
|
8001236: 6078 str r0, [r7, #4]
|
|
8001238: 6039 str r1, [r7, #0]
|
|
uint32_t tickstart;
|
|
|
|
/* Check Null pointer */
|
|
if(RCC_ClkInitStruct == NULL)
|
|
800123a: 687b ldr r3, [r7, #4]
|
|
800123c: 2b00 cmp r3, #0
|
|
800123e: d101 bne.n 8001244 <HAL_RCC_ClockConfig+0x14>
|
|
{
|
|
return HAL_ERROR;
|
|
8001240: 2301 movs r3, #1
|
|
8001242: e0b3 b.n 80013ac <HAL_RCC_ClockConfig+0x17c>
|
|
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
|
|
must be correctly programmed according to the frequency of the CPU clock
|
|
(HCLK) of the device. */
|
|
|
|
/* Increasing the number of wait states because of higher CPU frequency */
|
|
if(FLatency > __HAL_FLASH_GET_LATENCY())
|
|
8001244: 4b5b ldr r3, [pc, #364] ; (80013b4 <HAL_RCC_ClockConfig+0x184>)
|
|
8001246: 681b ldr r3, [r3, #0]
|
|
8001248: 2201 movs r2, #1
|
|
800124a: 4013 ands r3, r2
|
|
800124c: 683a ldr r2, [r7, #0]
|
|
800124e: 429a cmp r2, r3
|
|
8001250: d911 bls.n 8001276 <HAL_RCC_ClockConfig+0x46>
|
|
{
|
|
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
8001252: 4b58 ldr r3, [pc, #352] ; (80013b4 <HAL_RCC_ClockConfig+0x184>)
|
|
8001254: 681b ldr r3, [r3, #0]
|
|
8001256: 2201 movs r2, #1
|
|
8001258: 4393 bics r3, r2
|
|
800125a: 0019 movs r1, r3
|
|
800125c: 4b55 ldr r3, [pc, #340] ; (80013b4 <HAL_RCC_ClockConfig+0x184>)
|
|
800125e: 683a ldr r2, [r7, #0]
|
|
8001260: 430a orrs r2, r1
|
|
8001262: 601a str r2, [r3, #0]
|
|
|
|
/* Check that the new number of wait states is taken into account to access the Flash
|
|
memory by reading the FLASH_ACR register */
|
|
if(__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
8001264: 4b53 ldr r3, [pc, #332] ; (80013b4 <HAL_RCC_ClockConfig+0x184>)
|
|
8001266: 681b ldr r3, [r3, #0]
|
|
8001268: 2201 movs r2, #1
|
|
800126a: 4013 ands r3, r2
|
|
800126c: 683a ldr r2, [r7, #0]
|
|
800126e: 429a cmp r2, r3
|
|
8001270: d001 beq.n 8001276 <HAL_RCC_ClockConfig+0x46>
|
|
{
|
|
return HAL_ERROR;
|
|
8001272: 2301 movs r3, #1
|
|
8001274: e09a b.n 80013ac <HAL_RCC_ClockConfig+0x17c>
|
|
}
|
|
}
|
|
|
|
/*-------------------------- HCLK Configuration --------------------------*/
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
|
|
8001276: 687b ldr r3, [r7, #4]
|
|
8001278: 681b ldr r3, [r3, #0]
|
|
800127a: 2202 movs r2, #2
|
|
800127c: 4013 ands r3, r2
|
|
800127e: d015 beq.n 80012ac <HAL_RCC_ClockConfig+0x7c>
|
|
{
|
|
/* Set the highest APB divider in order to ensure that we do not go through
|
|
a non-spec phase whatever we decrease or increase HCLK. */
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
8001280: 687b ldr r3, [r7, #4]
|
|
8001282: 681b ldr r3, [r3, #0]
|
|
8001284: 2204 movs r2, #4
|
|
8001286: 4013 ands r3, r2
|
|
8001288: d006 beq.n 8001298 <HAL_RCC_ClockConfig+0x68>
|
|
{
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16);
|
|
800128a: 4b4b ldr r3, [pc, #300] ; (80013b8 <HAL_RCC_ClockConfig+0x188>)
|
|
800128c: 685a ldr r2, [r3, #4]
|
|
800128e: 4b4a ldr r3, [pc, #296] ; (80013b8 <HAL_RCC_ClockConfig+0x188>)
|
|
8001290: 21e0 movs r1, #224 ; 0xe0
|
|
8001292: 00c9 lsls r1, r1, #3
|
|
8001294: 430a orrs r2, r1
|
|
8001296: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
/* Set the new HCLK clock divider */
|
|
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
|
|
8001298: 4b47 ldr r3, [pc, #284] ; (80013b8 <HAL_RCC_ClockConfig+0x188>)
|
|
800129a: 685b ldr r3, [r3, #4]
|
|
800129c: 22f0 movs r2, #240 ; 0xf0
|
|
800129e: 4393 bics r3, r2
|
|
80012a0: 0019 movs r1, r3
|
|
80012a2: 687b ldr r3, [r7, #4]
|
|
80012a4: 689a ldr r2, [r3, #8]
|
|
80012a6: 4b44 ldr r3, [pc, #272] ; (80013b8 <HAL_RCC_ClockConfig+0x188>)
|
|
80012a8: 430a orrs r2, r1
|
|
80012aa: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
/*------------------------- SYSCLK Configuration ---------------------------*/
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
|
|
80012ac: 687b ldr r3, [r7, #4]
|
|
80012ae: 681b ldr r3, [r3, #0]
|
|
80012b0: 2201 movs r2, #1
|
|
80012b2: 4013 ands r3, r2
|
|
80012b4: d040 beq.n 8001338 <HAL_RCC_ClockConfig+0x108>
|
|
{
|
|
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
|
|
|
|
/* HSE is selected as System Clock Source */
|
|
if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
|
|
80012b6: 687b ldr r3, [r7, #4]
|
|
80012b8: 685b ldr r3, [r3, #4]
|
|
80012ba: 2b01 cmp r3, #1
|
|
80012bc: d107 bne.n 80012ce <HAL_RCC_ClockConfig+0x9e>
|
|
{
|
|
/* Check the HSE ready flag */
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
80012be: 4b3e ldr r3, [pc, #248] ; (80013b8 <HAL_RCC_ClockConfig+0x188>)
|
|
80012c0: 681a ldr r2, [r3, #0]
|
|
80012c2: 2380 movs r3, #128 ; 0x80
|
|
80012c4: 029b lsls r3, r3, #10
|
|
80012c6: 4013 ands r3, r2
|
|
80012c8: d114 bne.n 80012f4 <HAL_RCC_ClockConfig+0xc4>
|
|
{
|
|
return HAL_ERROR;
|
|
80012ca: 2301 movs r3, #1
|
|
80012cc: e06e b.n 80013ac <HAL_RCC_ClockConfig+0x17c>
|
|
}
|
|
}
|
|
/* PLL is selected as System Clock Source */
|
|
else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
|
|
80012ce: 687b ldr r3, [r7, #4]
|
|
80012d0: 685b ldr r3, [r3, #4]
|
|
80012d2: 2b02 cmp r3, #2
|
|
80012d4: d107 bne.n 80012e6 <HAL_RCC_ClockConfig+0xb6>
|
|
{
|
|
/* Check the PLL ready flag */
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
80012d6: 4b38 ldr r3, [pc, #224] ; (80013b8 <HAL_RCC_ClockConfig+0x188>)
|
|
80012d8: 681a ldr r2, [r3, #0]
|
|
80012da: 2380 movs r3, #128 ; 0x80
|
|
80012dc: 049b lsls r3, r3, #18
|
|
80012de: 4013 ands r3, r2
|
|
80012e0: d108 bne.n 80012f4 <HAL_RCC_ClockConfig+0xc4>
|
|
{
|
|
return HAL_ERROR;
|
|
80012e2: 2301 movs r3, #1
|
|
80012e4: e062 b.n 80013ac <HAL_RCC_ClockConfig+0x17c>
|
|
#endif /* RCC_CFGR_SWS_HSI48 */
|
|
/* HSI is selected as System Clock Source */
|
|
else
|
|
{
|
|
/* Check the HSI ready flag */
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
80012e6: 4b34 ldr r3, [pc, #208] ; (80013b8 <HAL_RCC_ClockConfig+0x188>)
|
|
80012e8: 681b ldr r3, [r3, #0]
|
|
80012ea: 2202 movs r2, #2
|
|
80012ec: 4013 ands r3, r2
|
|
80012ee: d101 bne.n 80012f4 <HAL_RCC_ClockConfig+0xc4>
|
|
{
|
|
return HAL_ERROR;
|
|
80012f0: 2301 movs r3, #1
|
|
80012f2: e05b b.n 80013ac <HAL_RCC_ClockConfig+0x17c>
|
|
}
|
|
}
|
|
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
|
|
80012f4: 4b30 ldr r3, [pc, #192] ; (80013b8 <HAL_RCC_ClockConfig+0x188>)
|
|
80012f6: 685b ldr r3, [r3, #4]
|
|
80012f8: 2203 movs r2, #3
|
|
80012fa: 4393 bics r3, r2
|
|
80012fc: 0019 movs r1, r3
|
|
80012fe: 687b ldr r3, [r7, #4]
|
|
8001300: 685a ldr r2, [r3, #4]
|
|
8001302: 4b2d ldr r3, [pc, #180] ; (80013b8 <HAL_RCC_ClockConfig+0x188>)
|
|
8001304: 430a orrs r2, r1
|
|
8001306: 605a str r2, [r3, #4]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8001308: f7ff fa10 bl 800072c <HAL_GetTick>
|
|
800130c: 0003 movs r3, r0
|
|
800130e: 60fb str r3, [r7, #12]
|
|
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
|
8001310: e009 b.n 8001326 <HAL_RCC_ClockConfig+0xf6>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
|
|
8001312: f7ff fa0b bl 800072c <HAL_GetTick>
|
|
8001316: 0002 movs r2, r0
|
|
8001318: 68fb ldr r3, [r7, #12]
|
|
800131a: 1ad3 subs r3, r2, r3
|
|
800131c: 4a27 ldr r2, [pc, #156] ; (80013bc <HAL_RCC_ClockConfig+0x18c>)
|
|
800131e: 4293 cmp r3, r2
|
|
8001320: d901 bls.n 8001326 <HAL_RCC_ClockConfig+0xf6>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8001322: 2303 movs r3, #3
|
|
8001324: e042 b.n 80013ac <HAL_RCC_ClockConfig+0x17c>
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
|
8001326: 4b24 ldr r3, [pc, #144] ; (80013b8 <HAL_RCC_ClockConfig+0x188>)
|
|
8001328: 685b ldr r3, [r3, #4]
|
|
800132a: 220c movs r2, #12
|
|
800132c: 401a ands r2, r3
|
|
800132e: 687b ldr r3, [r7, #4]
|
|
8001330: 685b ldr r3, [r3, #4]
|
|
8001332: 009b lsls r3, r3, #2
|
|
8001334: 429a cmp r2, r3
|
|
8001336: d1ec bne.n 8001312 <HAL_RCC_ClockConfig+0xe2>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Decreasing the number of wait states because of lower CPU frequency */
|
|
if(FLatency < __HAL_FLASH_GET_LATENCY())
|
|
8001338: 4b1e ldr r3, [pc, #120] ; (80013b4 <HAL_RCC_ClockConfig+0x184>)
|
|
800133a: 681b ldr r3, [r3, #0]
|
|
800133c: 2201 movs r2, #1
|
|
800133e: 4013 ands r3, r2
|
|
8001340: 683a ldr r2, [r7, #0]
|
|
8001342: 429a cmp r2, r3
|
|
8001344: d211 bcs.n 800136a <HAL_RCC_ClockConfig+0x13a>
|
|
{
|
|
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
8001346: 4b1b ldr r3, [pc, #108] ; (80013b4 <HAL_RCC_ClockConfig+0x184>)
|
|
8001348: 681b ldr r3, [r3, #0]
|
|
800134a: 2201 movs r2, #1
|
|
800134c: 4393 bics r3, r2
|
|
800134e: 0019 movs r1, r3
|
|
8001350: 4b18 ldr r3, [pc, #96] ; (80013b4 <HAL_RCC_ClockConfig+0x184>)
|
|
8001352: 683a ldr r2, [r7, #0]
|
|
8001354: 430a orrs r2, r1
|
|
8001356: 601a str r2, [r3, #0]
|
|
|
|
/* Check that the new number of wait states is taken into account to access the Flash
|
|
memory by reading the FLASH_ACR register */
|
|
if(__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
8001358: 4b16 ldr r3, [pc, #88] ; (80013b4 <HAL_RCC_ClockConfig+0x184>)
|
|
800135a: 681b ldr r3, [r3, #0]
|
|
800135c: 2201 movs r2, #1
|
|
800135e: 4013 ands r3, r2
|
|
8001360: 683a ldr r2, [r7, #0]
|
|
8001362: 429a cmp r2, r3
|
|
8001364: d001 beq.n 800136a <HAL_RCC_ClockConfig+0x13a>
|
|
{
|
|
return HAL_ERROR;
|
|
8001366: 2301 movs r3, #1
|
|
8001368: e020 b.n 80013ac <HAL_RCC_ClockConfig+0x17c>
|
|
}
|
|
}
|
|
|
|
/*-------------------------- PCLK1 Configuration ---------------------------*/
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
800136a: 687b ldr r3, [r7, #4]
|
|
800136c: 681b ldr r3, [r3, #0]
|
|
800136e: 2204 movs r2, #4
|
|
8001370: 4013 ands r3, r2
|
|
8001372: d009 beq.n 8001388 <HAL_RCC_ClockConfig+0x158>
|
|
{
|
|
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider);
|
|
8001374: 4b10 ldr r3, [pc, #64] ; (80013b8 <HAL_RCC_ClockConfig+0x188>)
|
|
8001376: 685b ldr r3, [r3, #4]
|
|
8001378: 4a11 ldr r2, [pc, #68] ; (80013c0 <HAL_RCC_ClockConfig+0x190>)
|
|
800137a: 4013 ands r3, r2
|
|
800137c: 0019 movs r1, r3
|
|
800137e: 687b ldr r3, [r7, #4]
|
|
8001380: 68da ldr r2, [r3, #12]
|
|
8001382: 4b0d ldr r3, [pc, #52] ; (80013b8 <HAL_RCC_ClockConfig+0x188>)
|
|
8001384: 430a orrs r2, r1
|
|
8001386: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
/* Update the SystemCoreClock global variable */
|
|
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER];
|
|
8001388: f000 f820 bl 80013cc <HAL_RCC_GetSysClockFreq>
|
|
800138c: 0001 movs r1, r0
|
|
800138e: 4b0a ldr r3, [pc, #40] ; (80013b8 <HAL_RCC_ClockConfig+0x188>)
|
|
8001390: 685b ldr r3, [r3, #4]
|
|
8001392: 091b lsrs r3, r3, #4
|
|
8001394: 220f movs r2, #15
|
|
8001396: 4013 ands r3, r2
|
|
8001398: 4a0a ldr r2, [pc, #40] ; (80013c4 <HAL_RCC_ClockConfig+0x194>)
|
|
800139a: 5cd3 ldrb r3, [r2, r3]
|
|
800139c: 000a movs r2, r1
|
|
800139e: 40da lsrs r2, r3
|
|
80013a0: 4b09 ldr r3, [pc, #36] ; (80013c8 <HAL_RCC_ClockConfig+0x198>)
|
|
80013a2: 601a str r2, [r3, #0]
|
|
|
|
/* Configure the source of time base considering new system clocks settings*/
|
|
HAL_InitTick (TICK_INT_PRIORITY);
|
|
80013a4: 2003 movs r0, #3
|
|
80013a6: f7ff f97b bl 80006a0 <HAL_InitTick>
|
|
|
|
return HAL_OK;
|
|
80013aa: 2300 movs r3, #0
|
|
}
|
|
80013ac: 0018 movs r0, r3
|
|
80013ae: 46bd mov sp, r7
|
|
80013b0: b004 add sp, #16
|
|
80013b2: bd80 pop {r7, pc}
|
|
80013b4: 40022000 .word 0x40022000
|
|
80013b8: 40021000 .word 0x40021000
|
|
80013bc: 00001388 .word 0x00001388
|
|
80013c0: fffff8ff .word 0xfffff8ff
|
|
80013c4: 080024c8 .word 0x080024c8
|
|
80013c8: 20000000 .word 0x20000000
|
|
|
|
080013cc <HAL_RCC_GetSysClockFreq>:
|
|
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
|
|
*
|
|
* @retval SYSCLK frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetSysClockFreq(void)
|
|
{
|
|
80013cc: b590 push {r4, r7, lr}
|
|
80013ce: b08f sub sp, #60 ; 0x3c
|
|
80013d0: af00 add r7, sp, #0
|
|
const uint8_t aPLLMULFactorTable[16] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U,
|
|
80013d2: 2314 movs r3, #20
|
|
80013d4: 18fb adds r3, r7, r3
|
|
80013d6: 4a2b ldr r2, [pc, #172] ; (8001484 <HAL_RCC_GetSysClockFreq+0xb8>)
|
|
80013d8: ca13 ldmia r2!, {r0, r1, r4}
|
|
80013da: c313 stmia r3!, {r0, r1, r4}
|
|
80013dc: 6812 ldr r2, [r2, #0]
|
|
80013de: 601a str r2, [r3, #0]
|
|
10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U};
|
|
const uint8_t aPredivFactorTable[16] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U,
|
|
80013e0: 1d3b adds r3, r7, #4
|
|
80013e2: 4a29 ldr r2, [pc, #164] ; (8001488 <HAL_RCC_GetSysClockFreq+0xbc>)
|
|
80013e4: ca13 ldmia r2!, {r0, r1, r4}
|
|
80013e6: c313 stmia r3!, {r0, r1, r4}
|
|
80013e8: 6812 ldr r2, [r2, #0]
|
|
80013ea: 601a str r2, [r3, #0]
|
|
9U,10U, 11U, 12U, 13U, 14U, 15U, 16U};
|
|
|
|
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
|
|
80013ec: 2300 movs r3, #0
|
|
80013ee: 62fb str r3, [r7, #44] ; 0x2c
|
|
80013f0: 2300 movs r3, #0
|
|
80013f2: 62bb str r3, [r7, #40] ; 0x28
|
|
80013f4: 2300 movs r3, #0
|
|
80013f6: 637b str r3, [r7, #52] ; 0x34
|
|
80013f8: 2300 movs r3, #0
|
|
80013fa: 627b str r3, [r7, #36] ; 0x24
|
|
uint32_t sysclockfreq = 0U;
|
|
80013fc: 2300 movs r3, #0
|
|
80013fe: 633b str r3, [r7, #48] ; 0x30
|
|
|
|
tmpreg = RCC->CFGR;
|
|
8001400: 4b22 ldr r3, [pc, #136] ; (800148c <HAL_RCC_GetSysClockFreq+0xc0>)
|
|
8001402: 685b ldr r3, [r3, #4]
|
|
8001404: 62fb str r3, [r7, #44] ; 0x2c
|
|
|
|
/* Get SYSCLK source -------------------------------------------------------*/
|
|
switch (tmpreg & RCC_CFGR_SWS)
|
|
8001406: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
8001408: 220c movs r2, #12
|
|
800140a: 4013 ands r3, r2
|
|
800140c: 2b04 cmp r3, #4
|
|
800140e: d002 beq.n 8001416 <HAL_RCC_GetSysClockFreq+0x4a>
|
|
8001410: 2b08 cmp r3, #8
|
|
8001412: d003 beq.n 800141c <HAL_RCC_GetSysClockFreq+0x50>
|
|
8001414: e02d b.n 8001472 <HAL_RCC_GetSysClockFreq+0xa6>
|
|
{
|
|
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
|
|
{
|
|
sysclockfreq = HSE_VALUE;
|
|
8001416: 4b1e ldr r3, [pc, #120] ; (8001490 <HAL_RCC_GetSysClockFreq+0xc4>)
|
|
8001418: 633b str r3, [r7, #48] ; 0x30
|
|
break;
|
|
800141a: e02d b.n 8001478 <HAL_RCC_GetSysClockFreq+0xac>
|
|
}
|
|
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
|
|
{
|
|
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER];
|
|
800141c: 6afb ldr r3, [r7, #44] ; 0x2c
|
|
800141e: 0c9b lsrs r3, r3, #18
|
|
8001420: 220f movs r2, #15
|
|
8001422: 4013 ands r3, r2
|
|
8001424: 2214 movs r2, #20
|
|
8001426: 18ba adds r2, r7, r2
|
|
8001428: 5cd3 ldrb r3, [r2, r3]
|
|
800142a: 627b str r3, [r7, #36] ; 0x24
|
|
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BITNUMBER];
|
|
800142c: 4b17 ldr r3, [pc, #92] ; (800148c <HAL_RCC_GetSysClockFreq+0xc0>)
|
|
800142e: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
8001430: 220f movs r2, #15
|
|
8001432: 4013 ands r3, r2
|
|
8001434: 1d3a adds r2, r7, #4
|
|
8001436: 5cd3 ldrb r3, [r2, r3]
|
|
8001438: 62bb str r3, [r7, #40] ; 0x28
|
|
if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
|
|
800143a: 6afa ldr r2, [r7, #44] ; 0x2c
|
|
800143c: 2380 movs r3, #128 ; 0x80
|
|
800143e: 025b lsls r3, r3, #9
|
|
8001440: 4013 ands r3, r2
|
|
8001442: d009 beq.n 8001458 <HAL_RCC_GetSysClockFreq+0x8c>
|
|
{
|
|
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
|
|
pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
|
|
8001444: 6ab9 ldr r1, [r7, #40] ; 0x28
|
|
8001446: 4812 ldr r0, [pc, #72] ; (8001490 <HAL_RCC_GetSysClockFreq+0xc4>)
|
|
8001448: f7fe fe5e bl 8000108 <__udivsi3>
|
|
800144c: 0003 movs r3, r0
|
|
800144e: 001a movs r2, r3
|
|
8001450: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8001452: 4353 muls r3, r2
|
|
8001454: 637b str r3, [r7, #52] ; 0x34
|
|
8001456: e009 b.n 800146c <HAL_RCC_GetSysClockFreq+0xa0>
|
|
#if (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC))
|
|
/* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */
|
|
pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
|
|
#else
|
|
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
|
|
pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul));
|
|
8001458: 6a79 ldr r1, [r7, #36] ; 0x24
|
|
800145a: 000a movs r2, r1
|
|
800145c: 0152 lsls r2, r2, #5
|
|
800145e: 1a52 subs r2, r2, r1
|
|
8001460: 0193 lsls r3, r2, #6
|
|
8001462: 1a9b subs r3, r3, r2
|
|
8001464: 00db lsls r3, r3, #3
|
|
8001466: 185b adds r3, r3, r1
|
|
8001468: 021b lsls r3, r3, #8
|
|
800146a: 637b str r3, [r7, #52] ; 0x34
|
|
#endif
|
|
}
|
|
sysclockfreq = pllclk;
|
|
800146c: 6b7b ldr r3, [r7, #52] ; 0x34
|
|
800146e: 633b str r3, [r7, #48] ; 0x30
|
|
break;
|
|
8001470: e002 b.n 8001478 <HAL_RCC_GetSysClockFreq+0xac>
|
|
}
|
|
#endif /* RCC_CFGR_SWS_HSI48 */
|
|
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
|
|
default: /* HSI used as system clock */
|
|
{
|
|
sysclockfreq = HSI_VALUE;
|
|
8001472: 4b07 ldr r3, [pc, #28] ; (8001490 <HAL_RCC_GetSysClockFreq+0xc4>)
|
|
8001474: 633b str r3, [r7, #48] ; 0x30
|
|
break;
|
|
8001476: 46c0 nop ; (mov r8, r8)
|
|
}
|
|
}
|
|
return sysclockfreq;
|
|
8001478: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
}
|
|
800147a: 0018 movs r0, r3
|
|
800147c: 46bd mov sp, r7
|
|
800147e: b00f add sp, #60 ; 0x3c
|
|
8001480: bd90 pop {r4, r7, pc}
|
|
8001482: 46c0 nop ; (mov r8, r8)
|
|
8001484: 080024a8 .word 0x080024a8
|
|
8001488: 080024b8 .word 0x080024b8
|
|
800148c: 40021000 .word 0x40021000
|
|
8001490: 007a1200 .word 0x007a1200
|
|
|
|
08001494 <GEI_BUTTON_CODE>:
|
|
*/
|
|
|
|
#include "button.h"
|
|
|
|
void GEI_BUTTON_CODE(struct button *bt,uint8_t in)
|
|
{
|
|
8001494: b580 push {r7, lr}
|
|
8001496: b082 sub sp, #8
|
|
8001498: af00 add r7, sp, #0
|
|
800149a: 6078 str r0, [r7, #4]
|
|
800149c: 000a movs r2, r1
|
|
800149e: 1cfb adds r3, r7, #3
|
|
80014a0: 701a strb r2, [r3, #0]
|
|
#define t 250
|
|
bt->code=0;
|
|
80014a2: 687b ldr r3, [r7, #4]
|
|
80014a4: 2200 movs r2, #0
|
|
80014a6: 601a str r2, [r3, #0]
|
|
if(in==1)
|
|
80014a8: 1cfb adds r3, r7, #3
|
|
80014aa: 781b ldrb r3, [r3, #0]
|
|
80014ac: 2b01 cmp r3, #1
|
|
80014ae: d138 bne.n 8001522 <GEI_BUTTON_CODE+0x8e>
|
|
{
|
|
if(bt->lock==0)
|
|
80014b0: 687b ldr r3, [r7, #4]
|
|
80014b2: 791b ldrb r3, [r3, #4]
|
|
80014b4: 2b00 cmp r3, #0
|
|
80014b6: d120 bne.n 80014fa <GEI_BUTTON_CODE+0x66>
|
|
{
|
|
if(HAL_GetTick()<bt->time+t)
|
|
80014b8: f7ff f938 bl 800072c <HAL_GetTick>
|
|
80014bc: 0002 movs r2, r0
|
|
80014be: 687b ldr r3, [r7, #4]
|
|
80014c0: 689b ldr r3, [r3, #8]
|
|
80014c2: 33fa adds r3, #250 ; 0xfa
|
|
80014c4: 429a cmp r2, r3
|
|
80014c6: d20d bcs.n 80014e4 <GEI_BUTTON_CODE+0x50>
|
|
{
|
|
bt->times++;
|
|
80014c8: 687b ldr r3, [r7, #4]
|
|
80014ca: 68db ldr r3, [r3, #12]
|
|
80014cc: 1c5a adds r2, r3, #1
|
|
80014ce: 687b ldr r3, [r7, #4]
|
|
80014d0: 60da str r2, [r3, #12]
|
|
bt->time=HAL_GetTick();
|
|
80014d2: f7ff f92b bl 800072c <HAL_GetTick>
|
|
80014d6: 0002 movs r2, r0
|
|
80014d8: 687b ldr r3, [r7, #4]
|
|
80014da: 609a str r2, [r3, #8]
|
|
bt->lock=1;
|
|
80014dc: 687b ldr r3, [r7, #4]
|
|
80014de: 2201 movs r2, #1
|
|
80014e0: 711a strb r2, [r3, #4]
|
|
80014e2: e00a b.n 80014fa <GEI_BUTTON_CODE+0x66>
|
|
|
|
}else
|
|
{
|
|
bt->times=1;
|
|
80014e4: 687b ldr r3, [r7, #4]
|
|
80014e6: 2201 movs r2, #1
|
|
80014e8: 60da str r2, [r3, #12]
|
|
bt->time=HAL_GetTick();
|
|
80014ea: f7ff f91f bl 800072c <HAL_GetTick>
|
|
80014ee: 0002 movs r2, r0
|
|
80014f0: 687b ldr r3, [r7, #4]
|
|
80014f2: 609a str r2, [r3, #8]
|
|
bt->lock=1;
|
|
80014f4: 687b ldr r3, [r7, #4]
|
|
80014f6: 2201 movs r2, #1
|
|
80014f8: 711a strb r2, [r3, #4]
|
|
}
|
|
|
|
}
|
|
if(bt->lock==1)
|
|
80014fa: 687b ldr r3, [r7, #4]
|
|
80014fc: 791b ldrb r3, [r3, #4]
|
|
80014fe: 2b01 cmp r3, #1
|
|
8001500: d10f bne.n 8001522 <GEI_BUTTON_CODE+0x8e>
|
|
{
|
|
if(HAL_GetTick()>bt->time+t)
|
|
8001502: f7ff f913 bl 800072c <HAL_GetTick>
|
|
8001506: 0002 movs r2, r0
|
|
8001508: 687b ldr r3, [r7, #4]
|
|
800150a: 689b ldr r3, [r3, #8]
|
|
800150c: 33fa adds r3, #250 ; 0xfa
|
|
800150e: 429a cmp r2, r3
|
|
8001510: d907 bls.n 8001522 <GEI_BUTTON_CODE+0x8e>
|
|
{
|
|
bt->code=-1;
|
|
8001512: 687b ldr r3, [r7, #4]
|
|
8001514: 2201 movs r2, #1
|
|
8001516: 4252 negs r2, r2
|
|
8001518: 601a str r2, [r3, #0]
|
|
bt->times=-1;
|
|
800151a: 687b ldr r3, [r7, #4]
|
|
800151c: 2201 movs r2, #1
|
|
800151e: 4252 negs r2, r2
|
|
8001520: 60da str r2, [r3, #12]
|
|
}
|
|
}
|
|
|
|
}
|
|
|
|
if(in==0)
|
|
8001522: 1cfb adds r3, r7, #3
|
|
8001524: 781b ldrb r3, [r3, #0]
|
|
8001526: 2b00 cmp r3, #0
|
|
8001528: d10e bne.n 8001548 <GEI_BUTTON_CODE+0xb4>
|
|
{
|
|
if(bt->lock==1)
|
|
800152a: 687b ldr r3, [r7, #4]
|
|
800152c: 791b ldrb r3, [r3, #4]
|
|
800152e: 2b01 cmp r3, #1
|
|
8001530: d10a bne.n 8001548 <GEI_BUTTON_CODE+0xb4>
|
|
{
|
|
if(bt->code==-1)
|
|
8001532: 687b ldr r3, [r7, #4]
|
|
8001534: 681b ldr r3, [r3, #0]
|
|
8001536: 3301 adds r3, #1
|
|
8001538: d003 beq.n 8001542 <GEI_BUTTON_CODE+0xae>
|
|
{
|
|
|
|
}else
|
|
{
|
|
bt->code=bt->times;
|
|
800153a: 687b ldr r3, [r7, #4]
|
|
800153c: 68da ldr r2, [r3, #12]
|
|
800153e: 687b ldr r3, [r7, #4]
|
|
8001540: 601a str r2, [r3, #0]
|
|
}
|
|
bt->lock=0;
|
|
8001542: 687b ldr r3, [r7, #4]
|
|
8001544: 2200 movs r2, #0
|
|
8001546: 711a strb r2, [r3, #4]
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
8001548: 46c0 nop ; (mov r8, r8)
|
|
800154a: 46bd mov sp, r7
|
|
800154c: b002 add sp, #8
|
|
800154e: bd80 pop {r7, pc}
|
|
|
|
08001550 <ds_in_or_out>:
|
|
char moto2b_;
|
|
|
|
}moto;
|
|
|
|
void ds_in_or_out(char a)//change the io function
|
|
{
|
|
8001550: b590 push {r4, r7, lr}
|
|
8001552: b089 sub sp, #36 ; 0x24
|
|
8001554: af00 add r7, sp, #0
|
|
8001556: 0002 movs r2, r0
|
|
8001558: 1dfb adds r3, r7, #7
|
|
800155a: 701a strb r2, [r3, #0]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
800155c: 240c movs r4, #12
|
|
800155e: 193b adds r3, r7, r4
|
|
8001560: 0018 movs r0, r3
|
|
8001562: 2314 movs r3, #20
|
|
8001564: 001a movs r2, r3
|
|
8001566: 2100 movs r1, #0
|
|
8001568: f000 ff8a bl 8002480 <memset>
|
|
GPIO_InitStruct.Pin = HC595_DLK_Pin;
|
|
800156c: 0021 movs r1, r4
|
|
800156e: 187b adds r3, r7, r1
|
|
8001570: 2220 movs r2, #32
|
|
8001572: 601a str r2, [r3, #0]
|
|
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
8001574: 187b adds r3, r7, r1
|
|
8001576: 2203 movs r2, #3
|
|
8001578: 60da str r2, [r3, #12]
|
|
if(a==0)
|
|
800157a: 1dfb adds r3, r7, #7
|
|
800157c: 781b ldrb r3, [r3, #0]
|
|
800157e: 2b00 cmp r3, #0
|
|
8001580: d105 bne.n 800158e <ds_in_or_out+0x3e>
|
|
{
|
|
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
|
8001582: 187b adds r3, r7, r1
|
|
8001584: 2201 movs r2, #1
|
|
8001586: 609a str r2, [r3, #8]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
8001588: 187b adds r3, r7, r1
|
|
800158a: 2200 movs r2, #0
|
|
800158c: 605a str r2, [r3, #4]
|
|
}
|
|
if(a==1)
|
|
800158e: 1dfb adds r3, r7, #7
|
|
8001590: 781b ldrb r3, [r3, #0]
|
|
8001592: 2b01 cmp r3, #1
|
|
8001594: d106 bne.n 80015a4 <ds_in_or_out+0x54>
|
|
{
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
8001596: 210c movs r1, #12
|
|
8001598: 187b adds r3, r7, r1
|
|
800159a: 2200 movs r2, #0
|
|
800159c: 609a str r2, [r3, #8]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
|
800159e: 187b adds r3, r7, r1
|
|
80015a0: 2201 movs r2, #1
|
|
80015a2: 605a str r2, [r3, #4]
|
|
}
|
|
HAL_GPIO_Init(HC595_DLK_GPIO_Port, &GPIO_InitStruct);
|
|
80015a4: 230c movs r3, #12
|
|
80015a6: 18fa adds r2, r7, r3
|
|
80015a8: 2390 movs r3, #144 ; 0x90
|
|
80015aa: 05db lsls r3, r3, #23
|
|
80015ac: 0011 movs r1, r2
|
|
80015ae: 0018 movs r0, r3
|
|
80015b0: f7ff f97a bl 80008a8 <HAL_GPIO_Init>
|
|
}
|
|
80015b4: 46c0 nop ; (mov r8, r8)
|
|
80015b6: 46bd mov sp, r7
|
|
80015b8: b009 add sp, #36 ; 0x24
|
|
80015ba: bd90 pop {r4, r7, pc}
|
|
|
|
080015bc <Read_Ds>:
|
|
uint8_t Read_Ds()
|
|
{
|
|
80015bc: b580 push {r7, lr}
|
|
80015be: af00 add r7, sp, #0
|
|
ds_in_or_out(0);
|
|
80015c0: 2000 movs r0, #0
|
|
80015c2: f7ff ffc5 bl 8001550 <ds_in_or_out>
|
|
if(READ_HC595_DCK){return 0;}else{return 1;}
|
|
80015c6: 2390 movs r3, #144 ; 0x90
|
|
80015c8: 05db lsls r3, r3, #23
|
|
80015ca: 2120 movs r1, #32
|
|
80015cc: 0018 movs r0, r3
|
|
80015ce: f7ff fadb bl 8000b88 <HAL_GPIO_ReadPin>
|
|
80015d2: 1e03 subs r3, r0, #0
|
|
80015d4: d001 beq.n 80015da <Read_Ds+0x1e>
|
|
80015d6: 2300 movs r3, #0
|
|
80015d8: e000 b.n 80015dc <Read_Ds+0x20>
|
|
80015da: 2301 movs r3, #1
|
|
//return READ_HC595_DCK;
|
|
}
|
|
80015dc: 0018 movs r0, r3
|
|
80015de: 46bd mov sp, r7
|
|
80015e0: bd80 pop {r7, pc}
|
|
|
|
080015e2 <Sand_Byte_to_595>:
|
|
void Sand_Byte_to_595(uint8_t h,uint8_t l)
|
|
{
|
|
80015e2: b580 push {r7, lr}
|
|
80015e4: b084 sub sp, #16
|
|
80015e6: af00 add r7, sp, #0
|
|
80015e8: 0002 movs r2, r0
|
|
80015ea: 1dfb adds r3, r7, #7
|
|
80015ec: 701a strb r2, [r3, #0]
|
|
80015ee: 1dbb adds r3, r7, #6
|
|
80015f0: 1c0a adds r2, r1, #0
|
|
80015f2: 701a strb r2, [r3, #0]
|
|
ds_in_or_out(1);
|
|
80015f4: 2001 movs r0, #1
|
|
80015f6: f7ff ffab bl 8001550 <ds_in_or_out>
|
|
HC595_DCK(0);
|
|
80015fa: 2390 movs r3, #144 ; 0x90
|
|
80015fc: 05db lsls r3, r3, #23
|
|
80015fe: 2200 movs r2, #0
|
|
8001600: 2120 movs r1, #32
|
|
8001602: 0018 movs r0, r3
|
|
8001604: f7ff fadd bl 8000bc2 <HAL_GPIO_WritePin>
|
|
HC595_SCK(0);
|
|
8001608: 2390 movs r3, #144 ; 0x90
|
|
800160a: 05db lsls r3, r3, #23
|
|
800160c: 2200 movs r2, #0
|
|
800160e: 2140 movs r1, #64 ; 0x40
|
|
8001610: 0018 movs r0, r3
|
|
8001612: f7ff fad6 bl 8000bc2 <HAL_GPIO_WritePin>
|
|
HC595_RCK(0);
|
|
8001616: 2390 movs r3, #144 ; 0x90
|
|
8001618: 05db lsls r3, r3, #23
|
|
800161a: 2200 movs r2, #0
|
|
800161c: 2180 movs r1, #128 ; 0x80
|
|
800161e: 0018 movs r0, r3
|
|
8001620: f7ff facf bl 8000bc2 <HAL_GPIO_WritePin>
|
|
for(char a=0;a<8;a++)
|
|
8001624: 230f movs r3, #15
|
|
8001626: 18fb adds r3, r7, r3
|
|
8001628: 2200 movs r2, #0
|
|
800162a: 701a strb r2, [r3, #0]
|
|
800162c: e02c b.n 8001688 <Sand_Byte_to_595+0xa6>
|
|
{
|
|
if((h<<a)&0x80)
|
|
800162e: 1dfb adds r3, r7, #7
|
|
8001630: 781a ldrb r2, [r3, #0]
|
|
8001632: 230f movs r3, #15
|
|
8001634: 18fb adds r3, r7, r3
|
|
8001636: 781b ldrb r3, [r3, #0]
|
|
8001638: 409a lsls r2, r3
|
|
800163a: 0013 movs r3, r2
|
|
800163c: 2280 movs r2, #128 ; 0x80
|
|
800163e: 4013 ands r3, r2
|
|
8001640: d007 beq.n 8001652 <Sand_Byte_to_595+0x70>
|
|
{
|
|
HC595_DCK(1);
|
|
8001642: 2390 movs r3, #144 ; 0x90
|
|
8001644: 05db lsls r3, r3, #23
|
|
8001646: 2201 movs r2, #1
|
|
8001648: 2120 movs r1, #32
|
|
800164a: 0018 movs r0, r3
|
|
800164c: f7ff fab9 bl 8000bc2 <HAL_GPIO_WritePin>
|
|
8001650: e006 b.n 8001660 <Sand_Byte_to_595+0x7e>
|
|
}else
|
|
{
|
|
HC595_DCK(0);
|
|
8001652: 2390 movs r3, #144 ; 0x90
|
|
8001654: 05db lsls r3, r3, #23
|
|
8001656: 2200 movs r2, #0
|
|
8001658: 2120 movs r1, #32
|
|
800165a: 0018 movs r0, r3
|
|
800165c: f7ff fab1 bl 8000bc2 <HAL_GPIO_WritePin>
|
|
}
|
|
HC595_SCK(1);
|
|
8001660: 2390 movs r3, #144 ; 0x90
|
|
8001662: 05db lsls r3, r3, #23
|
|
8001664: 2201 movs r2, #1
|
|
8001666: 2140 movs r1, #64 ; 0x40
|
|
8001668: 0018 movs r0, r3
|
|
800166a: f7ff faaa bl 8000bc2 <HAL_GPIO_WritePin>
|
|
HC595_SCK(0);
|
|
800166e: 2390 movs r3, #144 ; 0x90
|
|
8001670: 05db lsls r3, r3, #23
|
|
8001672: 2200 movs r2, #0
|
|
8001674: 2140 movs r1, #64 ; 0x40
|
|
8001676: 0018 movs r0, r3
|
|
8001678: f7ff faa3 bl 8000bc2 <HAL_GPIO_WritePin>
|
|
for(char a=0;a<8;a++)
|
|
800167c: 210f movs r1, #15
|
|
800167e: 187b adds r3, r7, r1
|
|
8001680: 781a ldrb r2, [r3, #0]
|
|
8001682: 187b adds r3, r7, r1
|
|
8001684: 3201 adds r2, #1
|
|
8001686: 701a strb r2, [r3, #0]
|
|
8001688: 230f movs r3, #15
|
|
800168a: 18fb adds r3, r7, r3
|
|
800168c: 781b ldrb r3, [r3, #0]
|
|
800168e: 2b07 cmp r3, #7
|
|
8001690: d9cd bls.n 800162e <Sand_Byte_to_595+0x4c>
|
|
}
|
|
for(char a=0;a<8;a++)
|
|
8001692: 230e movs r3, #14
|
|
8001694: 18fb adds r3, r7, r3
|
|
8001696: 2200 movs r2, #0
|
|
8001698: 701a strb r2, [r3, #0]
|
|
800169a: e02c b.n 80016f6 <Sand_Byte_to_595+0x114>
|
|
{
|
|
if((l<<a)&0x80)
|
|
800169c: 1dbb adds r3, r7, #6
|
|
800169e: 781a ldrb r2, [r3, #0]
|
|
80016a0: 230e movs r3, #14
|
|
80016a2: 18fb adds r3, r7, r3
|
|
80016a4: 781b ldrb r3, [r3, #0]
|
|
80016a6: 409a lsls r2, r3
|
|
80016a8: 0013 movs r3, r2
|
|
80016aa: 2280 movs r2, #128 ; 0x80
|
|
80016ac: 4013 ands r3, r2
|
|
80016ae: d007 beq.n 80016c0 <Sand_Byte_to_595+0xde>
|
|
{
|
|
HC595_DCK(1);
|
|
80016b0: 2390 movs r3, #144 ; 0x90
|
|
80016b2: 05db lsls r3, r3, #23
|
|
80016b4: 2201 movs r2, #1
|
|
80016b6: 2120 movs r1, #32
|
|
80016b8: 0018 movs r0, r3
|
|
80016ba: f7ff fa82 bl 8000bc2 <HAL_GPIO_WritePin>
|
|
80016be: e006 b.n 80016ce <Sand_Byte_to_595+0xec>
|
|
}else
|
|
{
|
|
HC595_DCK(0);
|
|
80016c0: 2390 movs r3, #144 ; 0x90
|
|
80016c2: 05db lsls r3, r3, #23
|
|
80016c4: 2200 movs r2, #0
|
|
80016c6: 2120 movs r1, #32
|
|
80016c8: 0018 movs r0, r3
|
|
80016ca: f7ff fa7a bl 8000bc2 <HAL_GPIO_WritePin>
|
|
}
|
|
HC595_SCK(1);
|
|
80016ce: 2390 movs r3, #144 ; 0x90
|
|
80016d0: 05db lsls r3, r3, #23
|
|
80016d2: 2201 movs r2, #1
|
|
80016d4: 2140 movs r1, #64 ; 0x40
|
|
80016d6: 0018 movs r0, r3
|
|
80016d8: f7ff fa73 bl 8000bc2 <HAL_GPIO_WritePin>
|
|
HC595_SCK(0);
|
|
80016dc: 2390 movs r3, #144 ; 0x90
|
|
80016de: 05db lsls r3, r3, #23
|
|
80016e0: 2200 movs r2, #0
|
|
80016e2: 2140 movs r1, #64 ; 0x40
|
|
80016e4: 0018 movs r0, r3
|
|
80016e6: f7ff fa6c bl 8000bc2 <HAL_GPIO_WritePin>
|
|
for(char a=0;a<8;a++)
|
|
80016ea: 210e movs r1, #14
|
|
80016ec: 187b adds r3, r7, r1
|
|
80016ee: 781a ldrb r2, [r3, #0]
|
|
80016f0: 187b adds r3, r7, r1
|
|
80016f2: 3201 adds r2, #1
|
|
80016f4: 701a strb r2, [r3, #0]
|
|
80016f6: 230e movs r3, #14
|
|
80016f8: 18fb adds r3, r7, r3
|
|
80016fa: 781b ldrb r3, [r3, #0]
|
|
80016fc: 2b07 cmp r3, #7
|
|
80016fe: d9cd bls.n 800169c <Sand_Byte_to_595+0xba>
|
|
}
|
|
HC595_RCK(1);
|
|
8001700: 2390 movs r3, #144 ; 0x90
|
|
8001702: 05db lsls r3, r3, #23
|
|
8001704: 2201 movs r2, #1
|
|
8001706: 2180 movs r1, #128 ; 0x80
|
|
8001708: 0018 movs r0, r3
|
|
800170a: f7ff fa5a bl 8000bc2 <HAL_GPIO_WritePin>
|
|
HC595_RCK(0);
|
|
800170e: 2390 movs r3, #144 ; 0x90
|
|
8001710: 05db lsls r3, r3, #23
|
|
8001712: 2200 movs r2, #0
|
|
8001714: 2180 movs r1, #128 ; 0x80
|
|
8001716: 0018 movs r0, r3
|
|
8001718: f7ff fa53 bl 8000bc2 <HAL_GPIO_WritePin>
|
|
}
|
|
800171c: 46c0 nop ; (mov r8, r8)
|
|
800171e: 46bd mov sp, r7
|
|
8001720: b004 add sp, #16
|
|
8001722: bd80 pop {r7, pc}
|
|
|
|
08001724 <Sand_Byte_to_595_2>:
|
|
void Sand_Byte_to_595_2(uint8_t h)
|
|
{
|
|
8001724: b580 push {r7, lr}
|
|
8001726: b084 sub sp, #16
|
|
8001728: af00 add r7, sp, #0
|
|
800172a: 0002 movs r2, r0
|
|
800172c: 1dfb adds r3, r7, #7
|
|
800172e: 701a strb r2, [r3, #0]
|
|
ds_in_or_out(1);
|
|
8001730: 2001 movs r0, #1
|
|
8001732: f7ff ff0d bl 8001550 <ds_in_or_out>
|
|
HC595_DCK(0);
|
|
8001736: 2390 movs r3, #144 ; 0x90
|
|
8001738: 05db lsls r3, r3, #23
|
|
800173a: 2200 movs r2, #0
|
|
800173c: 2120 movs r1, #32
|
|
800173e: 0018 movs r0, r3
|
|
8001740: f7ff fa3f bl 8000bc2 <HAL_GPIO_WritePin>
|
|
HC595_SCK2(0);
|
|
8001744: 2380 movs r3, #128 ; 0x80
|
|
8001746: 0099 lsls r1, r3, #2
|
|
8001748: 2390 movs r3, #144 ; 0x90
|
|
800174a: 05db lsls r3, r3, #23
|
|
800174c: 2200 movs r2, #0
|
|
800174e: 0018 movs r0, r3
|
|
8001750: f7ff fa37 bl 8000bc2 <HAL_GPIO_WritePin>
|
|
HC595_RCK(0);
|
|
8001754: 2390 movs r3, #144 ; 0x90
|
|
8001756: 05db lsls r3, r3, #23
|
|
8001758: 2200 movs r2, #0
|
|
800175a: 2180 movs r1, #128 ; 0x80
|
|
800175c: 0018 movs r0, r3
|
|
800175e: f7ff fa30 bl 8000bc2 <HAL_GPIO_WritePin>
|
|
for(char a=0;a<8;a++)
|
|
8001762: 230f movs r3, #15
|
|
8001764: 18fb adds r3, r7, r3
|
|
8001766: 2200 movs r2, #0
|
|
8001768: 701a strb r2, [r3, #0]
|
|
800176a: e02e b.n 80017ca <Sand_Byte_to_595_2+0xa6>
|
|
{
|
|
if((h<<a)&0x80)
|
|
800176c: 1dfb adds r3, r7, #7
|
|
800176e: 781a ldrb r2, [r3, #0]
|
|
8001770: 230f movs r3, #15
|
|
8001772: 18fb adds r3, r7, r3
|
|
8001774: 781b ldrb r3, [r3, #0]
|
|
8001776: 409a lsls r2, r3
|
|
8001778: 0013 movs r3, r2
|
|
800177a: 2280 movs r2, #128 ; 0x80
|
|
800177c: 4013 ands r3, r2
|
|
800177e: d007 beq.n 8001790 <Sand_Byte_to_595_2+0x6c>
|
|
{
|
|
HC595_DCK(1);
|
|
8001780: 2390 movs r3, #144 ; 0x90
|
|
8001782: 05db lsls r3, r3, #23
|
|
8001784: 2201 movs r2, #1
|
|
8001786: 2120 movs r1, #32
|
|
8001788: 0018 movs r0, r3
|
|
800178a: f7ff fa1a bl 8000bc2 <HAL_GPIO_WritePin>
|
|
800178e: e006 b.n 800179e <Sand_Byte_to_595_2+0x7a>
|
|
}else
|
|
{
|
|
HC595_DCK(0);
|
|
8001790: 2390 movs r3, #144 ; 0x90
|
|
8001792: 05db lsls r3, r3, #23
|
|
8001794: 2200 movs r2, #0
|
|
8001796: 2120 movs r1, #32
|
|
8001798: 0018 movs r0, r3
|
|
800179a: f7ff fa12 bl 8000bc2 <HAL_GPIO_WritePin>
|
|
}
|
|
HC595_SCK2(1);
|
|
800179e: 2380 movs r3, #128 ; 0x80
|
|
80017a0: 0099 lsls r1, r3, #2
|
|
80017a2: 2390 movs r3, #144 ; 0x90
|
|
80017a4: 05db lsls r3, r3, #23
|
|
80017a6: 2201 movs r2, #1
|
|
80017a8: 0018 movs r0, r3
|
|
80017aa: f7ff fa0a bl 8000bc2 <HAL_GPIO_WritePin>
|
|
HC595_SCK2(0);
|
|
80017ae: 2380 movs r3, #128 ; 0x80
|
|
80017b0: 0099 lsls r1, r3, #2
|
|
80017b2: 2390 movs r3, #144 ; 0x90
|
|
80017b4: 05db lsls r3, r3, #23
|
|
80017b6: 2200 movs r2, #0
|
|
80017b8: 0018 movs r0, r3
|
|
80017ba: f7ff fa02 bl 8000bc2 <HAL_GPIO_WritePin>
|
|
for(char a=0;a<8;a++)
|
|
80017be: 210f movs r1, #15
|
|
80017c0: 187b adds r3, r7, r1
|
|
80017c2: 781a ldrb r2, [r3, #0]
|
|
80017c4: 187b adds r3, r7, r1
|
|
80017c6: 3201 adds r2, #1
|
|
80017c8: 701a strb r2, [r3, #0]
|
|
80017ca: 230f movs r3, #15
|
|
80017cc: 18fb adds r3, r7, r3
|
|
80017ce: 781b ldrb r3, [r3, #0]
|
|
80017d0: 2b07 cmp r3, #7
|
|
80017d2: d9cb bls.n 800176c <Sand_Byte_to_595_2+0x48>
|
|
}
|
|
HC595_RCK(1);
|
|
80017d4: 2390 movs r3, #144 ; 0x90
|
|
80017d6: 05db lsls r3, r3, #23
|
|
80017d8: 2201 movs r2, #1
|
|
80017da: 2180 movs r1, #128 ; 0x80
|
|
80017dc: 0018 movs r0, r3
|
|
80017de: f7ff f9f0 bl 8000bc2 <HAL_GPIO_WritePin>
|
|
HC595_RCK(0);
|
|
80017e2: 2390 movs r3, #144 ; 0x90
|
|
80017e4: 05db lsls r3, r3, #23
|
|
80017e6: 2200 movs r2, #0
|
|
80017e8: 2180 movs r1, #128 ; 0x80
|
|
80017ea: 0018 movs r0, r3
|
|
80017ec: f7ff f9e9 bl 8000bc2 <HAL_GPIO_WritePin>
|
|
}
|
|
80017f0: 46c0 nop ; (mov r8, r8)
|
|
80017f2: 46bd mov sp, r7
|
|
80017f4: b004 add sp, #16
|
|
80017f6: bd80 pop {r7, pc}
|
|
|
|
080017f8 <display_and_button_loop>:
|
|
|
|
const char num_com[4]={0x1,0x2,0x4,0x8};
|
|
const char d_com[4]={0x80,0x40,0x20,0x10};
|
|
|
|
void display_and_button_loop()
|
|
{
|
|
80017f8: b580 push {r7, lr}
|
|
80017fa: b084 sub sp, #16
|
|
80017fc: af00 add r7, sp, #0
|
|
char lcd_buff[4];
|
|
char change_buff;
|
|
char h,l;
|
|
//fast time change 1
|
|
|
|
for(int a=0;a<4;a++)
|
|
80017fe: 2300 movs r3, #0
|
|
8001800: 60fb str r3, [r7, #12]
|
|
8001802: e089 b.n 8001918 <display_and_button_loop+0x120>
|
|
{
|
|
change_buff=d_num_data[dis_buff.d_num[a]];//num to data model
|
|
8001804: 4a65 ldr r2, [pc, #404] ; (800199c <display_and_button_loop+0x1a4>)
|
|
8001806: 68fb ldr r3, [r7, #12]
|
|
8001808: 18d3 adds r3, r2, r3
|
|
800180a: 781b ldrb r3, [r3, #0]
|
|
800180c: 0019 movs r1, r3
|
|
800180e: 1d7b adds r3, r7, #5
|
|
8001810: 4a63 ldr r2, [pc, #396] ; (80019a0 <display_and_button_loop+0x1a8>)
|
|
8001812: 5c52 ldrb r2, [r2, r1]
|
|
8001814: 701a strb r2, [r3, #0]
|
|
if(change_buff&&A)
|
|
8001816: 1d7b adds r3, r7, #5
|
|
8001818: 781b ldrb r3, [r3, #0]
|
|
800181a: 2b00 cmp r3, #0
|
|
800181c: d00d beq.n 800183a <display_and_button_loop+0x42>
|
|
{
|
|
lcd_buff[0]|=0x80>>(a*2);
|
|
800181e: 003b movs r3, r7
|
|
8001820: 781b ldrb r3, [r3, #0]
|
|
8001822: b25a sxtb r2, r3
|
|
8001824: 68fb ldr r3, [r7, #12]
|
|
8001826: 005b lsls r3, r3, #1
|
|
8001828: 2180 movs r1, #128 ; 0x80
|
|
800182a: 4119 asrs r1, r3
|
|
800182c: 000b movs r3, r1
|
|
800182e: b25b sxtb r3, r3
|
|
8001830: 4313 orrs r3, r2
|
|
8001832: b25b sxtb r3, r3
|
|
8001834: b2da uxtb r2, r3
|
|
8001836: 003b movs r3, r7
|
|
8001838: 701a strb r2, [r3, #0]
|
|
}
|
|
if(change_buff&&B)
|
|
800183a: 1d7b adds r3, r7, #5
|
|
800183c: 781b ldrb r3, [r3, #0]
|
|
800183e: 2b00 cmp r3, #0
|
|
8001840: d00d beq.n 800185e <display_and_button_loop+0x66>
|
|
{
|
|
lcd_buff[0]|=0x40>>(a*2);
|
|
8001842: 003b movs r3, r7
|
|
8001844: 781b ldrb r3, [r3, #0]
|
|
8001846: b25a sxtb r2, r3
|
|
8001848: 68fb ldr r3, [r7, #12]
|
|
800184a: 005b lsls r3, r3, #1
|
|
800184c: 2140 movs r1, #64 ; 0x40
|
|
800184e: 4119 asrs r1, r3
|
|
8001850: 000b movs r3, r1
|
|
8001852: b25b sxtb r3, r3
|
|
8001854: 4313 orrs r3, r2
|
|
8001856: b25b sxtb r3, r3
|
|
8001858: b2da uxtb r2, r3
|
|
800185a: 003b movs r3, r7
|
|
800185c: 701a strb r2, [r3, #0]
|
|
}
|
|
if(change_buff&&C)
|
|
800185e: 1d7b adds r3, r7, #5
|
|
8001860: 781b ldrb r3, [r3, #0]
|
|
8001862: 2b00 cmp r3, #0
|
|
8001864: d00d beq.n 8001882 <display_and_button_loop+0x8a>
|
|
{
|
|
lcd_buff[2]|=0x40>>(a*2);
|
|
8001866: 003b movs r3, r7
|
|
8001868: 789b ldrb r3, [r3, #2]
|
|
800186a: b25a sxtb r2, r3
|
|
800186c: 68fb ldr r3, [r7, #12]
|
|
800186e: 005b lsls r3, r3, #1
|
|
8001870: 2140 movs r1, #64 ; 0x40
|
|
8001872: 4119 asrs r1, r3
|
|
8001874: 000b movs r3, r1
|
|
8001876: b25b sxtb r3, r3
|
|
8001878: 4313 orrs r3, r2
|
|
800187a: b25b sxtb r3, r3
|
|
800187c: b2da uxtb r2, r3
|
|
800187e: 003b movs r3, r7
|
|
8001880: 709a strb r2, [r3, #2]
|
|
}
|
|
if(change_buff&&D)
|
|
8001882: 1d7b adds r3, r7, #5
|
|
8001884: 781b ldrb r3, [r3, #0]
|
|
8001886: 2b00 cmp r3, #0
|
|
8001888: d00d beq.n 80018a6 <display_and_button_loop+0xae>
|
|
{
|
|
lcd_buff[3]|=0x40>>(a*2);
|
|
800188a: 003b movs r3, r7
|
|
800188c: 78db ldrb r3, [r3, #3]
|
|
800188e: b25a sxtb r2, r3
|
|
8001890: 68fb ldr r3, [r7, #12]
|
|
8001892: 005b lsls r3, r3, #1
|
|
8001894: 2140 movs r1, #64 ; 0x40
|
|
8001896: 4119 asrs r1, r3
|
|
8001898: 000b movs r3, r1
|
|
800189a: b25b sxtb r3, r3
|
|
800189c: 4313 orrs r3, r2
|
|
800189e: b25b sxtb r3, r3
|
|
80018a0: b2da uxtb r2, r3
|
|
80018a2: 003b movs r3, r7
|
|
80018a4: 70da strb r2, [r3, #3]
|
|
}
|
|
if(change_buff&&E)
|
|
80018a6: 1d7b adds r3, r7, #5
|
|
80018a8: 781b ldrb r3, [r3, #0]
|
|
80018aa: 2b00 cmp r3, #0
|
|
80018ac: d00d beq.n 80018ca <display_and_button_loop+0xd2>
|
|
{
|
|
lcd_buff[2]|=0x80>>(a*2);
|
|
80018ae: 003b movs r3, r7
|
|
80018b0: 789b ldrb r3, [r3, #2]
|
|
80018b2: b25a sxtb r2, r3
|
|
80018b4: 68fb ldr r3, [r7, #12]
|
|
80018b6: 005b lsls r3, r3, #1
|
|
80018b8: 2180 movs r1, #128 ; 0x80
|
|
80018ba: 4119 asrs r1, r3
|
|
80018bc: 000b movs r3, r1
|
|
80018be: b25b sxtb r3, r3
|
|
80018c0: 4313 orrs r3, r2
|
|
80018c2: b25b sxtb r3, r3
|
|
80018c4: b2da uxtb r2, r3
|
|
80018c6: 003b movs r3, r7
|
|
80018c8: 709a strb r2, [r3, #2]
|
|
}
|
|
if(change_buff&&F)
|
|
80018ca: 1d7b adds r3, r7, #5
|
|
80018cc: 781b ldrb r3, [r3, #0]
|
|
80018ce: 2b00 cmp r3, #0
|
|
80018d0: d00d beq.n 80018ee <display_and_button_loop+0xf6>
|
|
{
|
|
lcd_buff[1]|=0x80>>(a*2);
|
|
80018d2: 003b movs r3, r7
|
|
80018d4: 785b ldrb r3, [r3, #1]
|
|
80018d6: b25a sxtb r2, r3
|
|
80018d8: 68fb ldr r3, [r7, #12]
|
|
80018da: 005b lsls r3, r3, #1
|
|
80018dc: 2180 movs r1, #128 ; 0x80
|
|
80018de: 4119 asrs r1, r3
|
|
80018e0: 000b movs r3, r1
|
|
80018e2: b25b sxtb r3, r3
|
|
80018e4: 4313 orrs r3, r2
|
|
80018e6: b25b sxtb r3, r3
|
|
80018e8: b2da uxtb r2, r3
|
|
80018ea: 003b movs r3, r7
|
|
80018ec: 705a strb r2, [r3, #1]
|
|
}
|
|
if(change_buff&&G)
|
|
80018ee: 1d7b adds r3, r7, #5
|
|
80018f0: 781b ldrb r3, [r3, #0]
|
|
80018f2: 2b00 cmp r3, #0
|
|
80018f4: d00d beq.n 8001912 <display_and_button_loop+0x11a>
|
|
{
|
|
lcd_buff[1]|=0x40>>(a*2);
|
|
80018f6: 003b movs r3, r7
|
|
80018f8: 785b ldrb r3, [r3, #1]
|
|
80018fa: b25a sxtb r2, r3
|
|
80018fc: 68fb ldr r3, [r7, #12]
|
|
80018fe: 005b lsls r3, r3, #1
|
|
8001900: 2140 movs r1, #64 ; 0x40
|
|
8001902: 4119 asrs r1, r3
|
|
8001904: 000b movs r3, r1
|
|
8001906: b25b sxtb r3, r3
|
|
8001908: 4313 orrs r3, r2
|
|
800190a: b25b sxtb r3, r3
|
|
800190c: b2da uxtb r2, r3
|
|
800190e: 003b movs r3, r7
|
|
8001910: 705a strb r2, [r3, #1]
|
|
for(int a=0;a<4;a++)
|
|
8001912: 68fb ldr r3, [r7, #12]
|
|
8001914: 3301 adds r3, #1
|
|
8001916: 60fb str r3, [r7, #12]
|
|
8001918: 68fb ldr r3, [r7, #12]
|
|
800191a: 2b03 cmp r3, #3
|
|
800191c: dc00 bgt.n 8001920 <display_and_button_loop+0x128>
|
|
800191e: e771 b.n 8001804 <display_and_button_loop+0xc>
|
|
//Sand_Byte_to_595(0xff,0xff);
|
|
//Sand_Byte_to_595(~h,~l);
|
|
//Sand_Byte_to_595(0,0);
|
|
//Sand_Byte_to_595(0xff,0xff);
|
|
|
|
for(int a=0;a<4;a++)
|
|
8001920: 2300 movs r3, #0
|
|
8001922: 60bb str r3, [r7, #8]
|
|
8001924: e032 b.n 800198c <display_and_button_loop+0x194>
|
|
{
|
|
l=lcd_buff[a];
|
|
8001926: 1dfb adds r3, r7, #7
|
|
8001928: 0039 movs r1, r7
|
|
800192a: 68ba ldr r2, [r7, #8]
|
|
800192c: 188a adds r2, r1, r2
|
|
800192e: 7812 ldrb r2, [r2, #0]
|
|
8001930: 701a strb r2, [r3, #0]
|
|
//h=((~num_com[a])&0x0F);
|
|
h=(~d_com[a]&0xf0)|((~num_com[a])&0x0F);
|
|
8001932: 4a1c ldr r2, [pc, #112] ; (80019a4 <display_and_button_loop+0x1ac>)
|
|
8001934: 68bb ldr r3, [r7, #8]
|
|
8001936: 18d3 adds r3, r2, r3
|
|
8001938: 781b ldrb r3, [r3, #0]
|
|
800193a: b25b sxtb r3, r3
|
|
800193c: 43db mvns r3, r3
|
|
800193e: b25b sxtb r3, r3
|
|
8001940: 220f movs r2, #15
|
|
8001942: 4393 bics r3, r2
|
|
8001944: b25a sxtb r2, r3
|
|
8001946: 4918 ldr r1, [pc, #96] ; (80019a8 <display_and_button_loop+0x1b0>)
|
|
8001948: 68bb ldr r3, [r7, #8]
|
|
800194a: 18cb adds r3, r1, r3
|
|
800194c: 781b ldrb r3, [r3, #0]
|
|
800194e: b25b sxtb r3, r3
|
|
8001950: 43db mvns r3, r3
|
|
8001952: b25b sxtb r3, r3
|
|
8001954: 210f movs r1, #15
|
|
8001956: 400b ands r3, r1
|
|
8001958: b25b sxtb r3, r3
|
|
800195a: 4313 orrs r3, r2
|
|
800195c: b25a sxtb r2, r3
|
|
800195e: 1dbb adds r3, r7, #6
|
|
8001960: 701a strb r2, [r3, #0]
|
|
Sand_Byte_to_595(h,l);
|
|
8001962: 1dfb adds r3, r7, #7
|
|
8001964: 781a ldrb r2, [r3, #0]
|
|
8001966: 1dbb adds r3, r7, #6
|
|
8001968: 781b ldrb r3, [r3, #0]
|
|
800196a: 0011 movs r1, r2
|
|
800196c: 0018 movs r0, r3
|
|
800196e: f7ff fe38 bl 80015e2 <Sand_Byte_to_595>
|
|
dis_buff.button_flag[a]=Read_Ds();
|
|
8001972: f7ff fe23 bl 80015bc <Read_Ds>
|
|
8001976: 0003 movs r3, r0
|
|
8001978: 0019 movs r1, r3
|
|
800197a: 4a08 ldr r2, [pc, #32] ; (800199c <display_and_button_loop+0x1a4>)
|
|
800197c: 68bb ldr r3, [r7, #8]
|
|
800197e: 18d3 adds r3, r2, r3
|
|
8001980: 3304 adds r3, #4
|
|
8001982: 1c0a adds r2, r1, #0
|
|
8001984: 701a strb r2, [r3, #0]
|
|
for(int a=0;a<4;a++)
|
|
8001986: 68bb ldr r3, [r7, #8]
|
|
8001988: 3301 adds r3, #1
|
|
800198a: 60bb str r3, [r7, #8]
|
|
800198c: 68bb ldr r3, [r7, #8]
|
|
800198e: 2b03 cmp r3, #3
|
|
8001990: ddc9 ble.n 8001926 <display_and_button_loop+0x12e>
|
|
|
|
|
|
|
|
|
|
|
|
}
|
|
8001992: 46c0 nop ; (mov r8, r8)
|
|
8001994: 46c0 nop ; (mov r8, r8)
|
|
8001996: 46bd mov sp, r7
|
|
8001998: b004 add sp, #16
|
|
800199a: bd80 pop {r7, pc}
|
|
800199c: 2000003c .word 0x2000003c
|
|
80019a0: 080024d8 .word 0x080024d8
|
|
80019a4: 080024e8 .word 0x080024e8
|
|
80019a8: 080024e4 .word 0x080024e4
|
|
|
|
080019ac <hc2_sever>:
|
|
void hc2_sever()
|
|
{
|
|
80019ac: b580 push {r7, lr}
|
|
80019ae: b082 sub sp, #8
|
|
80019b0: af00 add r7, sp, #0
|
|
char h=0;
|
|
80019b2: 1dfb adds r3, r7, #7
|
|
80019b4: 2200 movs r2, #0
|
|
80019b6: 701a strb r2, [r3, #0]
|
|
if(dis_buff.led_run==1)
|
|
80019b8: 4b24 ldr r3, [pc, #144] ; (8001a4c <hc2_sever+0xa0>)
|
|
80019ba: 7a1b ldrb r3, [r3, #8]
|
|
80019bc: 2210 movs r2, #16
|
|
80019be: 4013 ands r3, r2
|
|
80019c0: b2db uxtb r3, r3
|
|
80019c2: 2b00 cmp r3, #0
|
|
80019c4: d005 beq.n 80019d2 <hc2_sever+0x26>
|
|
{
|
|
h|=0x01;
|
|
80019c6: 1dfb adds r3, r7, #7
|
|
80019c8: 1dfa adds r2, r7, #7
|
|
80019ca: 7812 ldrb r2, [r2, #0]
|
|
80019cc: 2101 movs r1, #1
|
|
80019ce: 430a orrs r2, r1
|
|
80019d0: 701a strb r2, [r3, #0]
|
|
}
|
|
if(dis_buff.moto1a==1)
|
|
80019d2: 4b1e ldr r3, [pc, #120] ; (8001a4c <hc2_sever+0xa0>)
|
|
80019d4: 7a1b ldrb r3, [r3, #8]
|
|
80019d6: 2220 movs r2, #32
|
|
80019d8: 4013 ands r3, r2
|
|
80019da: b2db uxtb r3, r3
|
|
80019dc: 2b00 cmp r3, #0
|
|
80019de: d005 beq.n 80019ec <hc2_sever+0x40>
|
|
{
|
|
h|=0x02;
|
|
80019e0: 1dfb adds r3, r7, #7
|
|
80019e2: 1dfa adds r2, r7, #7
|
|
80019e4: 7812 ldrb r2, [r2, #0]
|
|
80019e6: 2102 movs r1, #2
|
|
80019e8: 430a orrs r2, r1
|
|
80019ea: 701a strb r2, [r3, #0]
|
|
}
|
|
if(dis_buff.moto1b==1)
|
|
80019ec: 4b17 ldr r3, [pc, #92] ; (8001a4c <hc2_sever+0xa0>)
|
|
80019ee: 7a1b ldrb r3, [r3, #8]
|
|
80019f0: 2240 movs r2, #64 ; 0x40
|
|
80019f2: 4013 ands r3, r2
|
|
80019f4: b2db uxtb r3, r3
|
|
80019f6: 2b00 cmp r3, #0
|
|
80019f8: d005 beq.n 8001a06 <hc2_sever+0x5a>
|
|
{
|
|
h|=0x04;
|
|
80019fa: 1dfb adds r3, r7, #7
|
|
80019fc: 1dfa adds r2, r7, #7
|
|
80019fe: 7812 ldrb r2, [r2, #0]
|
|
8001a00: 2104 movs r1, #4
|
|
8001a02: 430a orrs r2, r1
|
|
8001a04: 701a strb r2, [r3, #0]
|
|
}
|
|
if(dis_buff.moto2a==1)
|
|
8001a06: 4b11 ldr r3, [pc, #68] ; (8001a4c <hc2_sever+0xa0>)
|
|
8001a08: 7a1b ldrb r3, [r3, #8]
|
|
8001a0a: 227f movs r2, #127 ; 0x7f
|
|
8001a0c: 4393 bics r3, r2
|
|
8001a0e: b2db uxtb r3, r3
|
|
8001a10: 2b00 cmp r3, #0
|
|
8001a12: d005 beq.n 8001a20 <hc2_sever+0x74>
|
|
{
|
|
h|=0x08;
|
|
8001a14: 1dfb adds r3, r7, #7
|
|
8001a16: 1dfa adds r2, r7, #7
|
|
8001a18: 7812 ldrb r2, [r2, #0]
|
|
8001a1a: 2108 movs r1, #8
|
|
8001a1c: 430a orrs r2, r1
|
|
8001a1e: 701a strb r2, [r3, #0]
|
|
}
|
|
if(dis_buff.moto2b==1)
|
|
8001a20: 4b0a ldr r3, [pc, #40] ; (8001a4c <hc2_sever+0xa0>)
|
|
8001a22: 7a5b ldrb r3, [r3, #9]
|
|
8001a24: 2201 movs r2, #1
|
|
8001a26: 4013 ands r3, r2
|
|
8001a28: b2db uxtb r3, r3
|
|
8001a2a: 2b00 cmp r3, #0
|
|
8001a2c: d005 beq.n 8001a3a <hc2_sever+0x8e>
|
|
{
|
|
h|=0x10;
|
|
8001a2e: 1dfb adds r3, r7, #7
|
|
8001a30: 1dfa adds r2, r7, #7
|
|
8001a32: 7812 ldrb r2, [r2, #0]
|
|
8001a34: 2110 movs r1, #16
|
|
8001a36: 430a orrs r2, r1
|
|
8001a38: 701a strb r2, [r3, #0]
|
|
}
|
|
Sand_Byte_to_595_2(h);
|
|
8001a3a: 1dfb adds r3, r7, #7
|
|
8001a3c: 781b ldrb r3, [r3, #0]
|
|
8001a3e: 0018 movs r0, r3
|
|
8001a40: f7ff fe70 bl 8001724 <Sand_Byte_to_595_2>
|
|
}
|
|
8001a44: 46c0 nop ; (mov r8, r8)
|
|
8001a46: 46bd mov sp, r7
|
|
8001a48: b002 add sp, #8
|
|
8001a4a: bd80 pop {r7, pc}
|
|
8001a4c: 2000003c .word 0x2000003c
|
|
|
|
08001a50 <moto_server>:
|
|
|
|
void moto_server()
|
|
{
|
|
8001a50: b580 push {r7, lr}
|
|
8001a52: af00 add r7, sp, #0
|
|
if(HAL_GetTick()>moto.moto_run)
|
|
8001a54: f7fe fe6a bl 800072c <HAL_GetTick>
|
|
8001a58: 0002 movs r2, r0
|
|
8001a5a: 4b6c ldr r3, [pc, #432] ; (8001c0c <moto_server+0x1bc>)
|
|
8001a5c: 681b ldr r3, [r3, #0]
|
|
8001a5e: 429a cmp r2, r3
|
|
8001a60: d800 bhi.n 8001a64 <moto_server+0x14>
|
|
8001a62: e07e b.n 8001b62 <moto_server+0x112>
|
|
{
|
|
moto.moto_run=HAL_GetTick()+10;
|
|
8001a64: f7fe fe62 bl 800072c <HAL_GetTick>
|
|
8001a68: 0003 movs r3, r0
|
|
8001a6a: 330a adds r3, #10
|
|
8001a6c: 001a movs r2, r3
|
|
8001a6e: 4b67 ldr r3, [pc, #412] ; (8001c0c <moto_server+0x1bc>)
|
|
8001a70: 601a str r2, [r3, #0]
|
|
if(moto.moto1a!=moto.moto1a_)
|
|
8001a72: 4b66 ldr r3, [pc, #408] ; (8001c0c <moto_server+0x1bc>)
|
|
8001a74: 7a1a ldrb r2, [r3, #8]
|
|
8001a76: 4b65 ldr r3, [pc, #404] ; (8001c0c <moto_server+0x1bc>)
|
|
8001a78: 7b1b ldrb r3, [r3, #12]
|
|
8001a7a: 429a cmp r2, r3
|
|
8001a7c: d017 beq.n 8001aae <moto_server+0x5e>
|
|
{
|
|
if(moto.moto1a>moto.moto1a_)
|
|
8001a7e: 4b63 ldr r3, [pc, #396] ; (8001c0c <moto_server+0x1bc>)
|
|
8001a80: 7a1a ldrb r2, [r3, #8]
|
|
8001a82: 4b62 ldr r3, [pc, #392] ; (8001c0c <moto_server+0x1bc>)
|
|
8001a84: 7b1b ldrb r3, [r3, #12]
|
|
8001a86: 429a cmp r2, r3
|
|
8001a88: d905 bls.n 8001a96 <moto_server+0x46>
|
|
{
|
|
moto.moto1a_++;
|
|
8001a8a: 4b60 ldr r3, [pc, #384] ; (8001c0c <moto_server+0x1bc>)
|
|
8001a8c: 7b1b ldrb r3, [r3, #12]
|
|
8001a8e: 3301 adds r3, #1
|
|
8001a90: b2da uxtb r2, r3
|
|
8001a92: 4b5e ldr r3, [pc, #376] ; (8001c0c <moto_server+0x1bc>)
|
|
8001a94: 731a strb r2, [r3, #12]
|
|
}
|
|
if(moto.moto1a<moto.moto1a_)
|
|
8001a96: 4b5d ldr r3, [pc, #372] ; (8001c0c <moto_server+0x1bc>)
|
|
8001a98: 7a1a ldrb r2, [r3, #8]
|
|
8001a9a: 4b5c ldr r3, [pc, #368] ; (8001c0c <moto_server+0x1bc>)
|
|
8001a9c: 7b1b ldrb r3, [r3, #12]
|
|
8001a9e: 429a cmp r2, r3
|
|
8001aa0: d205 bcs.n 8001aae <moto_server+0x5e>
|
|
{
|
|
moto.moto1a_--;
|
|
8001aa2: 4b5a ldr r3, [pc, #360] ; (8001c0c <moto_server+0x1bc>)
|
|
8001aa4: 7b1b ldrb r3, [r3, #12]
|
|
8001aa6: 3b01 subs r3, #1
|
|
8001aa8: b2da uxtb r2, r3
|
|
8001aaa: 4b58 ldr r3, [pc, #352] ; (8001c0c <moto_server+0x1bc>)
|
|
8001aac: 731a strb r2, [r3, #12]
|
|
}
|
|
}
|
|
if(moto.moto1b!=moto.moto1b_)
|
|
8001aae: 4b57 ldr r3, [pc, #348] ; (8001c0c <moto_server+0x1bc>)
|
|
8001ab0: 7a5a ldrb r2, [r3, #9]
|
|
8001ab2: 4b56 ldr r3, [pc, #344] ; (8001c0c <moto_server+0x1bc>)
|
|
8001ab4: 7b5b ldrb r3, [r3, #13]
|
|
8001ab6: 429a cmp r2, r3
|
|
8001ab8: d017 beq.n 8001aea <moto_server+0x9a>
|
|
{
|
|
if(moto.moto1b>moto.moto1b_)
|
|
8001aba: 4b54 ldr r3, [pc, #336] ; (8001c0c <moto_server+0x1bc>)
|
|
8001abc: 7a5a ldrb r2, [r3, #9]
|
|
8001abe: 4b53 ldr r3, [pc, #332] ; (8001c0c <moto_server+0x1bc>)
|
|
8001ac0: 7b5b ldrb r3, [r3, #13]
|
|
8001ac2: 429a cmp r2, r3
|
|
8001ac4: d905 bls.n 8001ad2 <moto_server+0x82>
|
|
{
|
|
moto.moto1b_++;
|
|
8001ac6: 4b51 ldr r3, [pc, #324] ; (8001c0c <moto_server+0x1bc>)
|
|
8001ac8: 7b5b ldrb r3, [r3, #13]
|
|
8001aca: 3301 adds r3, #1
|
|
8001acc: b2da uxtb r2, r3
|
|
8001ace: 4b4f ldr r3, [pc, #316] ; (8001c0c <moto_server+0x1bc>)
|
|
8001ad0: 735a strb r2, [r3, #13]
|
|
}
|
|
if(moto.moto1b<moto.moto1b_)
|
|
8001ad2: 4b4e ldr r3, [pc, #312] ; (8001c0c <moto_server+0x1bc>)
|
|
8001ad4: 7a5a ldrb r2, [r3, #9]
|
|
8001ad6: 4b4d ldr r3, [pc, #308] ; (8001c0c <moto_server+0x1bc>)
|
|
8001ad8: 7b5b ldrb r3, [r3, #13]
|
|
8001ada: 429a cmp r2, r3
|
|
8001adc: d205 bcs.n 8001aea <moto_server+0x9a>
|
|
{
|
|
moto.moto1b_--;
|
|
8001ade: 4b4b ldr r3, [pc, #300] ; (8001c0c <moto_server+0x1bc>)
|
|
8001ae0: 7b5b ldrb r3, [r3, #13]
|
|
8001ae2: 3b01 subs r3, #1
|
|
8001ae4: b2da uxtb r2, r3
|
|
8001ae6: 4b49 ldr r3, [pc, #292] ; (8001c0c <moto_server+0x1bc>)
|
|
8001ae8: 735a strb r2, [r3, #13]
|
|
}
|
|
}
|
|
if(moto.moto2a!=moto.moto2a_)
|
|
8001aea: 4b48 ldr r3, [pc, #288] ; (8001c0c <moto_server+0x1bc>)
|
|
8001aec: 7a9a ldrb r2, [r3, #10]
|
|
8001aee: 4b47 ldr r3, [pc, #284] ; (8001c0c <moto_server+0x1bc>)
|
|
8001af0: 7b9b ldrb r3, [r3, #14]
|
|
8001af2: 429a cmp r2, r3
|
|
8001af4: d017 beq.n 8001b26 <moto_server+0xd6>
|
|
{
|
|
if(moto.moto2a>moto.moto2a_)
|
|
8001af6: 4b45 ldr r3, [pc, #276] ; (8001c0c <moto_server+0x1bc>)
|
|
8001af8: 7a9a ldrb r2, [r3, #10]
|
|
8001afa: 4b44 ldr r3, [pc, #272] ; (8001c0c <moto_server+0x1bc>)
|
|
8001afc: 7b9b ldrb r3, [r3, #14]
|
|
8001afe: 429a cmp r2, r3
|
|
8001b00: d905 bls.n 8001b0e <moto_server+0xbe>
|
|
{
|
|
moto.moto2a_++;
|
|
8001b02: 4b42 ldr r3, [pc, #264] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b04: 7b9b ldrb r3, [r3, #14]
|
|
8001b06: 3301 adds r3, #1
|
|
8001b08: b2da uxtb r2, r3
|
|
8001b0a: 4b40 ldr r3, [pc, #256] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b0c: 739a strb r2, [r3, #14]
|
|
}
|
|
if(moto.moto2a<moto.moto2a_)
|
|
8001b0e: 4b3f ldr r3, [pc, #252] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b10: 7a9a ldrb r2, [r3, #10]
|
|
8001b12: 4b3e ldr r3, [pc, #248] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b14: 7b9b ldrb r3, [r3, #14]
|
|
8001b16: 429a cmp r2, r3
|
|
8001b18: d205 bcs.n 8001b26 <moto_server+0xd6>
|
|
{
|
|
moto.moto2a_--;
|
|
8001b1a: 4b3c ldr r3, [pc, #240] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b1c: 7b9b ldrb r3, [r3, #14]
|
|
8001b1e: 3b01 subs r3, #1
|
|
8001b20: b2da uxtb r2, r3
|
|
8001b22: 4b3a ldr r3, [pc, #232] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b24: 739a strb r2, [r3, #14]
|
|
}
|
|
}
|
|
if(moto.moto2b!=moto.moto2b_)
|
|
8001b26: 4b39 ldr r3, [pc, #228] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b28: 7ada ldrb r2, [r3, #11]
|
|
8001b2a: 4b38 ldr r3, [pc, #224] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b2c: 7bdb ldrb r3, [r3, #15]
|
|
8001b2e: 429a cmp r2, r3
|
|
8001b30: d017 beq.n 8001b62 <moto_server+0x112>
|
|
{
|
|
if(moto.moto2b>moto.moto2b_)
|
|
8001b32: 4b36 ldr r3, [pc, #216] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b34: 7ada ldrb r2, [r3, #11]
|
|
8001b36: 4b35 ldr r3, [pc, #212] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b38: 7bdb ldrb r3, [r3, #15]
|
|
8001b3a: 429a cmp r2, r3
|
|
8001b3c: d905 bls.n 8001b4a <moto_server+0xfa>
|
|
{
|
|
moto.moto2b_++;
|
|
8001b3e: 4b33 ldr r3, [pc, #204] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b40: 7bdb ldrb r3, [r3, #15]
|
|
8001b42: 3301 adds r3, #1
|
|
8001b44: b2da uxtb r2, r3
|
|
8001b46: 4b31 ldr r3, [pc, #196] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b48: 73da strb r2, [r3, #15]
|
|
}
|
|
if(moto.moto2b<moto.moto2b_)
|
|
8001b4a: 4b30 ldr r3, [pc, #192] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b4c: 7ada ldrb r2, [r3, #11]
|
|
8001b4e: 4b2f ldr r3, [pc, #188] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b50: 7bdb ldrb r3, [r3, #15]
|
|
8001b52: 429a cmp r2, r3
|
|
8001b54: d205 bcs.n 8001b62 <moto_server+0x112>
|
|
{
|
|
moto.moto2b_--;
|
|
8001b56: 4b2d ldr r3, [pc, #180] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b58: 7bdb ldrb r3, [r3, #15]
|
|
8001b5a: 3b01 subs r3, #1
|
|
8001b5c: b2da uxtb r2, r3
|
|
8001b5e: 4b2b ldr r3, [pc, #172] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b60: 73da strb r2, [r3, #15]
|
|
|
|
|
|
|
|
|
|
|
|
moto.pwm_run++;
|
|
8001b62: 4b2a ldr r3, [pc, #168] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b64: 685b ldr r3, [r3, #4]
|
|
8001b66: 1c5a adds r2, r3, #1
|
|
8001b68: 4b28 ldr r3, [pc, #160] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b6a: 605a str r2, [r3, #4]
|
|
if(moto.pwm_run==10)
|
|
8001b6c: 4b27 ldr r3, [pc, #156] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b6e: 685b ldr r3, [r3, #4]
|
|
8001b70: 2b0a cmp r3, #10
|
|
8001b72: d102 bne.n 8001b7a <moto_server+0x12a>
|
|
{
|
|
moto.pwm_run=0;
|
|
8001b74: 4b25 ldr r3, [pc, #148] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b76: 2200 movs r2, #0
|
|
8001b78: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
if(moto.pwm_run<moto.moto1a_)
|
|
8001b7a: 4b24 ldr r3, [pc, #144] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b7c: 685b ldr r3, [r3, #4]
|
|
8001b7e: 4a23 ldr r2, [pc, #140] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b80: 7b12 ldrb r2, [r2, #12]
|
|
8001b82: 4293 cmp r3, r2
|
|
8001b84: da05 bge.n 8001b92 <moto_server+0x142>
|
|
{
|
|
dis_buff.moto1a=1;
|
|
8001b86: 4b22 ldr r3, [pc, #136] ; (8001c10 <moto_server+0x1c0>)
|
|
8001b88: 7a1a ldrb r2, [r3, #8]
|
|
8001b8a: 2120 movs r1, #32
|
|
8001b8c: 430a orrs r2, r1
|
|
8001b8e: 721a strb r2, [r3, #8]
|
|
8001b90: e004 b.n 8001b9c <moto_server+0x14c>
|
|
}else
|
|
{
|
|
dis_buff.moto1a=0;
|
|
8001b92: 4b1f ldr r3, [pc, #124] ; (8001c10 <moto_server+0x1c0>)
|
|
8001b94: 7a1a ldrb r2, [r3, #8]
|
|
8001b96: 2120 movs r1, #32
|
|
8001b98: 438a bics r2, r1
|
|
8001b9a: 721a strb r2, [r3, #8]
|
|
}
|
|
if(moto.pwm_run<moto.moto1b_)
|
|
8001b9c: 4b1b ldr r3, [pc, #108] ; (8001c0c <moto_server+0x1bc>)
|
|
8001b9e: 685b ldr r3, [r3, #4]
|
|
8001ba0: 4a1a ldr r2, [pc, #104] ; (8001c0c <moto_server+0x1bc>)
|
|
8001ba2: 7b52 ldrb r2, [r2, #13]
|
|
8001ba4: 4293 cmp r3, r2
|
|
8001ba6: da05 bge.n 8001bb4 <moto_server+0x164>
|
|
{
|
|
dis_buff.moto1b=1;
|
|
8001ba8: 4b19 ldr r3, [pc, #100] ; (8001c10 <moto_server+0x1c0>)
|
|
8001baa: 7a1a ldrb r2, [r3, #8]
|
|
8001bac: 2140 movs r1, #64 ; 0x40
|
|
8001bae: 430a orrs r2, r1
|
|
8001bb0: 721a strb r2, [r3, #8]
|
|
8001bb2: e004 b.n 8001bbe <moto_server+0x16e>
|
|
}else
|
|
{
|
|
dis_buff.moto1b=0;
|
|
8001bb4: 4b16 ldr r3, [pc, #88] ; (8001c10 <moto_server+0x1c0>)
|
|
8001bb6: 7a1a ldrb r2, [r3, #8]
|
|
8001bb8: 2140 movs r1, #64 ; 0x40
|
|
8001bba: 438a bics r2, r1
|
|
8001bbc: 721a strb r2, [r3, #8]
|
|
}
|
|
if(moto.pwm_run<moto.moto2a_)
|
|
8001bbe: 4b13 ldr r3, [pc, #76] ; (8001c0c <moto_server+0x1bc>)
|
|
8001bc0: 685b ldr r3, [r3, #4]
|
|
8001bc2: 4a12 ldr r2, [pc, #72] ; (8001c0c <moto_server+0x1bc>)
|
|
8001bc4: 7b92 ldrb r2, [r2, #14]
|
|
8001bc6: 4293 cmp r3, r2
|
|
8001bc8: da06 bge.n 8001bd8 <moto_server+0x188>
|
|
{
|
|
dis_buff.moto2a=1;
|
|
8001bca: 4b11 ldr r3, [pc, #68] ; (8001c10 <moto_server+0x1c0>)
|
|
8001bcc: 7a1a ldrb r2, [r3, #8]
|
|
8001bce: 2180 movs r1, #128 ; 0x80
|
|
8001bd0: 4249 negs r1, r1
|
|
8001bd2: 430a orrs r2, r1
|
|
8001bd4: 721a strb r2, [r3, #8]
|
|
8001bd6: e004 b.n 8001be2 <moto_server+0x192>
|
|
}else
|
|
{
|
|
dis_buff.moto2a=0;
|
|
8001bd8: 4b0d ldr r3, [pc, #52] ; (8001c10 <moto_server+0x1c0>)
|
|
8001bda: 7a1a ldrb r2, [r3, #8]
|
|
8001bdc: 217f movs r1, #127 ; 0x7f
|
|
8001bde: 400a ands r2, r1
|
|
8001be0: 721a strb r2, [r3, #8]
|
|
}
|
|
if(moto.pwm_run<moto.moto2b_)
|
|
8001be2: 4b0a ldr r3, [pc, #40] ; (8001c0c <moto_server+0x1bc>)
|
|
8001be4: 685b ldr r3, [r3, #4]
|
|
8001be6: 4a09 ldr r2, [pc, #36] ; (8001c0c <moto_server+0x1bc>)
|
|
8001be8: 7bd2 ldrb r2, [r2, #15]
|
|
8001bea: 4293 cmp r3, r2
|
|
8001bec: da05 bge.n 8001bfa <moto_server+0x1aa>
|
|
{
|
|
dis_buff.moto2b=1;
|
|
8001bee: 4b08 ldr r3, [pc, #32] ; (8001c10 <moto_server+0x1c0>)
|
|
8001bf0: 7a5a ldrb r2, [r3, #9]
|
|
8001bf2: 2101 movs r1, #1
|
|
8001bf4: 430a orrs r2, r1
|
|
8001bf6: 725a strb r2, [r3, #9]
|
|
}else
|
|
{
|
|
dis_buff.moto2b=0;
|
|
}
|
|
|
|
}
|
|
8001bf8: e004 b.n 8001c04 <moto_server+0x1b4>
|
|
dis_buff.moto2b=0;
|
|
8001bfa: 4b05 ldr r3, [pc, #20] ; (8001c10 <moto_server+0x1c0>)
|
|
8001bfc: 7a5a ldrb r2, [r3, #9]
|
|
8001bfe: 2101 movs r1, #1
|
|
8001c00: 438a bics r2, r1
|
|
8001c02: 725a strb r2, [r3, #9]
|
|
}
|
|
8001c04: 46c0 nop ; (mov r8, r8)
|
|
8001c06: 46bd mov sp, r7
|
|
8001c08: bd80 pop {r7, pc}
|
|
8001c0a: 46c0 nop ; (mov r8, r8)
|
|
8001c0c: 20000088 .word 0x20000088
|
|
8001c10: 2000003c .word 0x2000003c
|
|
|
|
08001c14 <my_code>:
|
|
|
|
void my_code()
|
|
{
|
|
8001c14: b580 push {r7, lr}
|
|
8001c16: b086 sub sp, #24
|
|
8001c18: af00 add r7, sp, #0
|
|
uint32_t runtime=0,move=0;
|
|
8001c1a: 2300 movs r3, #0
|
|
8001c1c: 617b str r3, [r7, #20]
|
|
8001c1e: 2300 movs r3, #0
|
|
8001c20: 613b str r3, [r7, #16]
|
|
uint8_t mode=0,overload_mode=0;
|
|
8001c22: 230f movs r3, #15
|
|
8001c24: 18fb adds r3, r7, r3
|
|
8001c26: 2200 movs r2, #0
|
|
8001c28: 701a strb r2, [r3, #0]
|
|
8001c2a: 230e movs r3, #14
|
|
8001c2c: 18fb adds r3, r7, r3
|
|
8001c2e: 2200 movs r2, #0
|
|
8001c30: 701a strb r2, [r3, #0]
|
|
uint16_t adc,adc_times=0;
|
|
8001c32: 1cbb adds r3, r7, #2
|
|
8001c34: 2200 movs r2, #0
|
|
8001c36: 801a strh r2, [r3, #0]
|
|
uint32_t adc_l;
|
|
uint16_t overload_times=0;
|
|
8001c38: 230c movs r3, #12
|
|
8001c3a: 18fb adds r3, r7, r3
|
|
8001c3c: 2200 movs r2, #0
|
|
8001c3e: 801a strh r2, [r3, #0]
|
|
long countdown=0;
|
|
8001c40: 2300 movs r3, #0
|
|
8001c42: 60bb str r3, [r7, #8]
|
|
long countdown_set=15000;
|
|
8001c44: 4bd8 ldr r3, [pc, #864] ; (8001fa8 <my_code+0x394>)
|
|
8001c46: 607b str r3, [r7, #4]
|
|
dis_buff.d_num[0]=8;
|
|
8001c48: 4bd8 ldr r3, [pc, #864] ; (8001fac <my_code+0x398>)
|
|
8001c4a: 2208 movs r2, #8
|
|
8001c4c: 701a strb r2, [r3, #0]
|
|
dis_buff.d_num[1]=8;
|
|
8001c4e: 4bd7 ldr r3, [pc, #860] ; (8001fac <my_code+0x398>)
|
|
8001c50: 2208 movs r2, #8
|
|
8001c52: 705a strb r2, [r3, #1]
|
|
dis_buff.d_num[2]=8;
|
|
8001c54: 4bd5 ldr r3, [pc, #852] ; (8001fac <my_code+0x398>)
|
|
8001c56: 2208 movs r2, #8
|
|
8001c58: 709a strb r2, [r3, #2]
|
|
dis_buff.d_num[3]=8;
|
|
8001c5a: 4bd4 ldr r3, [pc, #848] ; (8001fac <my_code+0x398>)
|
|
8001c5c: 2208 movs r2, #8
|
|
8001c5e: 70da strb r2, [r3, #3]
|
|
|
|
dis_buff.moto1a=0;
|
|
8001c60: 4bd2 ldr r3, [pc, #840] ; (8001fac <my_code+0x398>)
|
|
8001c62: 7a1a ldrb r2, [r3, #8]
|
|
8001c64: 2120 movs r1, #32
|
|
8001c66: 438a bics r2, r1
|
|
8001c68: 721a strb r2, [r3, #8]
|
|
dis_buff.moto1b=0;
|
|
8001c6a: 4bd0 ldr r3, [pc, #832] ; (8001fac <my_code+0x398>)
|
|
8001c6c: 7a1a ldrb r2, [r3, #8]
|
|
8001c6e: 2140 movs r1, #64 ; 0x40
|
|
8001c70: 438a bics r2, r1
|
|
8001c72: 721a strb r2, [r3, #8]
|
|
dis_buff.moto2a=0;
|
|
8001c74: 4bcd ldr r3, [pc, #820] ; (8001fac <my_code+0x398>)
|
|
8001c76: 7a1a ldrb r2, [r3, #8]
|
|
8001c78: 217f movs r1, #127 ; 0x7f
|
|
8001c7a: 400a ands r2, r1
|
|
8001c7c: 721a strb r2, [r3, #8]
|
|
dis_buff.moto2b=0;
|
|
8001c7e: 4bcb ldr r3, [pc, #812] ; (8001fac <my_code+0x398>)
|
|
8001c80: 7a5a ldrb r2, [r3, #9]
|
|
8001c82: 2101 movs r1, #1
|
|
8001c84: 438a bics r2, r1
|
|
8001c86: 725a strb r2, [r3, #9]
|
|
|
|
moto.moto_run=0;
|
|
8001c88: 4bc9 ldr r3, [pc, #804] ; (8001fb0 <my_code+0x39c>)
|
|
8001c8a: 2200 movs r2, #0
|
|
8001c8c: 601a str r2, [r3, #0]
|
|
moto.pwm_run=0;
|
|
8001c8e: 4bc8 ldr r3, [pc, #800] ; (8001fb0 <my_code+0x39c>)
|
|
8001c90: 2200 movs r2, #0
|
|
8001c92: 605a str r2, [r3, #4]
|
|
moto.moto1a=0;
|
|
8001c94: 4bc6 ldr r3, [pc, #792] ; (8001fb0 <my_code+0x39c>)
|
|
8001c96: 2200 movs r2, #0
|
|
8001c98: 721a strb r2, [r3, #8]
|
|
moto.moto1b=0;
|
|
8001c9a: 4bc5 ldr r3, [pc, #788] ; (8001fb0 <my_code+0x39c>)
|
|
8001c9c: 2200 movs r2, #0
|
|
8001c9e: 725a strb r2, [r3, #9]
|
|
moto.moto2a=0;
|
|
8001ca0: 4bc3 ldr r3, [pc, #780] ; (8001fb0 <my_code+0x39c>)
|
|
8001ca2: 2200 movs r2, #0
|
|
8001ca4: 729a strb r2, [r3, #10]
|
|
moto.moto2b=0;
|
|
8001ca6: 4bc2 ldr r3, [pc, #776] ; (8001fb0 <my_code+0x39c>)
|
|
8001ca8: 2200 movs r2, #0
|
|
8001caa: 72da strb r2, [r3, #11]
|
|
|
|
moto.moto1a_=0;
|
|
8001cac: 4bc0 ldr r3, [pc, #768] ; (8001fb0 <my_code+0x39c>)
|
|
8001cae: 2200 movs r2, #0
|
|
8001cb0: 731a strb r2, [r3, #12]
|
|
moto.moto1b_=0;
|
|
8001cb2: 4bbf ldr r3, [pc, #764] ; (8001fb0 <my_code+0x39c>)
|
|
8001cb4: 2200 movs r2, #0
|
|
8001cb6: 735a strb r2, [r3, #13]
|
|
moto.moto2a_=0;
|
|
8001cb8: 4bbd ldr r3, [pc, #756] ; (8001fb0 <my_code+0x39c>)
|
|
8001cba: 2200 movs r2, #0
|
|
8001cbc: 739a strb r2, [r3, #14]
|
|
moto.moto2b_=0;
|
|
8001cbe: 4bbc ldr r3, [pc, #752] ; (8001fb0 <my_code+0x39c>)
|
|
8001cc0: 2200 movs r2, #0
|
|
8001cc2: 73da strb r2, [r3, #15]
|
|
while(1)
|
|
{
|
|
switch(mode)
|
|
8001cc4: 230f movs r3, #15
|
|
8001cc6: 18fb adds r3, r7, r3
|
|
8001cc8: 781b ldrb r3, [r3, #0]
|
|
8001cca: 2b05 cmp r3, #5
|
|
8001ccc: d900 bls.n 8001cd0 <my_code+0xbc>
|
|
8001cce: e385 b.n 80023dc <my_code+0x7c8>
|
|
8001cd0: 009a lsls r2, r3, #2
|
|
8001cd2: 4bb8 ldr r3, [pc, #736] ; (8001fb4 <my_code+0x3a0>)
|
|
8001cd4: 18d3 adds r3, r2, r3
|
|
8001cd6: 681b ldr r3, [r3, #0]
|
|
8001cd8: 469f mov pc, r3
|
|
{
|
|
case 0:
|
|
//Startup
|
|
if(HAL_GetTick()>move)
|
|
8001cda: f7fe fd27 bl 800072c <HAL_GetTick>
|
|
8001cde: 0002 movs r2, r0
|
|
8001ce0: 693b ldr r3, [r7, #16]
|
|
8001ce2: 4293 cmp r3, r2
|
|
8001ce4: d300 bcc.n 8001ce8 <my_code+0xd4>
|
|
8001ce6: e370 b.n 80023ca <my_code+0x7b6>
|
|
{
|
|
move=HAL_GetTick()+100;
|
|
8001ce8: f7fe fd20 bl 800072c <HAL_GetTick>
|
|
8001cec: 0003 movs r3, r0
|
|
8001cee: 3364 adds r3, #100 ; 0x64
|
|
8001cf0: 613b str r3, [r7, #16]
|
|
countdown-=100;
|
|
8001cf2: 68bb ldr r3, [r7, #8]
|
|
8001cf4: 3b64 subs r3, #100 ; 0x64
|
|
8001cf6: 60bb str r3, [r7, #8]
|
|
if(countdown<0)
|
|
8001cf8: 68bb ldr r3, [r7, #8]
|
|
8001cfa: 2b00 cmp r3, #0
|
|
8001cfc: da03 bge.n 8001d06 <my_code+0xf2>
|
|
{
|
|
mode=1;
|
|
8001cfe: 230f movs r3, #15
|
|
8001d00: 18fb adds r3, r7, r3
|
|
8001d02: 2201 movs r2, #1
|
|
8001d04: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
|
|
|
|
dis_buff.d_num[0]=((countdown/100)%10);
|
|
8001d06: 68bb ldr r3, [r7, #8]
|
|
8001d08: 2164 movs r1, #100 ; 0x64
|
|
8001d0a: 0018 movs r0, r3
|
|
8001d0c: f7fe fa86 bl 800021c <__divsi3>
|
|
8001d10: 0003 movs r3, r0
|
|
8001d12: 210a movs r1, #10
|
|
8001d14: 0018 movs r0, r3
|
|
8001d16: f7fe fb67 bl 80003e8 <__aeabi_idivmod>
|
|
8001d1a: 000b movs r3, r1
|
|
8001d1c: b2da uxtb r2, r3
|
|
8001d1e: 4ba3 ldr r3, [pc, #652] ; (8001fac <my_code+0x398>)
|
|
8001d20: 701a strb r2, [r3, #0]
|
|
dis_buff.d_num[1]=((countdown/100)%10);
|
|
8001d22: 68bb ldr r3, [r7, #8]
|
|
8001d24: 2164 movs r1, #100 ; 0x64
|
|
8001d26: 0018 movs r0, r3
|
|
8001d28: f7fe fa78 bl 800021c <__divsi3>
|
|
8001d2c: 0003 movs r3, r0
|
|
8001d2e: 210a movs r1, #10
|
|
8001d30: 0018 movs r0, r3
|
|
8001d32: f7fe fb59 bl 80003e8 <__aeabi_idivmod>
|
|
8001d36: 000b movs r3, r1
|
|
8001d38: b2da uxtb r2, r3
|
|
8001d3a: 4b9c ldr r3, [pc, #624] ; (8001fac <my_code+0x398>)
|
|
8001d3c: 705a strb r2, [r3, #1]
|
|
dis_buff.d_num[2]=((countdown/100)%10);
|
|
8001d3e: 68bb ldr r3, [r7, #8]
|
|
8001d40: 2164 movs r1, #100 ; 0x64
|
|
8001d42: 0018 movs r0, r3
|
|
8001d44: f7fe fa6a bl 800021c <__divsi3>
|
|
8001d48: 0003 movs r3, r0
|
|
8001d4a: 210a movs r1, #10
|
|
8001d4c: 0018 movs r0, r3
|
|
8001d4e: f7fe fb4b bl 80003e8 <__aeabi_idivmod>
|
|
8001d52: 000b movs r3, r1
|
|
8001d54: b2da uxtb r2, r3
|
|
8001d56: 4b95 ldr r3, [pc, #596] ; (8001fac <my_code+0x398>)
|
|
8001d58: 709a strb r2, [r3, #2]
|
|
dis_buff.d_num[3]=((countdown/100)%10);
|
|
8001d5a: 68bb ldr r3, [r7, #8]
|
|
8001d5c: 2164 movs r1, #100 ; 0x64
|
|
8001d5e: 0018 movs r0, r3
|
|
8001d60: f7fe fa5c bl 800021c <__divsi3>
|
|
8001d64: 0003 movs r3, r0
|
|
8001d66: 210a movs r1, #10
|
|
8001d68: 0018 movs r0, r3
|
|
8001d6a: f7fe fb3d bl 80003e8 <__aeabi_idivmod>
|
|
8001d6e: 000b movs r3, r1
|
|
8001d70: b2da uxtb r2, r3
|
|
8001d72: 4b8e ldr r3, [pc, #568] ; (8001fac <my_code+0x398>)
|
|
8001d74: 70da strb r2, [r3, #3]
|
|
|
|
|
|
dis_buff.dot1=countdown>>3;
|
|
8001d76: 68bb ldr r3, [r7, #8]
|
|
8001d78: 10db asrs r3, r3, #3
|
|
8001d7a: 1c1a adds r2, r3, #0
|
|
8001d7c: 2301 movs r3, #1
|
|
8001d7e: 4013 ands r3, r2
|
|
8001d80: b2da uxtb r2, r3
|
|
8001d82: 4b8a ldr r3, [pc, #552] ; (8001fac <my_code+0x398>)
|
|
8001d84: 2101 movs r1, #1
|
|
8001d86: 400a ands r2, r1
|
|
8001d88: 0010 movs r0, r2
|
|
8001d8a: 7a1a ldrb r2, [r3, #8]
|
|
8001d8c: 2101 movs r1, #1
|
|
8001d8e: 438a bics r2, r1
|
|
8001d90: 1c11 adds r1, r2, #0
|
|
8001d92: 1c02 adds r2, r0, #0
|
|
8001d94: 430a orrs r2, r1
|
|
8001d96: 721a strb r2, [r3, #8]
|
|
dis_buff.dot2=countdown>>4;
|
|
8001d98: 68bb ldr r3, [r7, #8]
|
|
8001d9a: 111b asrs r3, r3, #4
|
|
8001d9c: 1c1a adds r2, r3, #0
|
|
8001d9e: 2301 movs r3, #1
|
|
8001da0: 4013 ands r3, r2
|
|
8001da2: b2da uxtb r2, r3
|
|
8001da4: 4b81 ldr r3, [pc, #516] ; (8001fac <my_code+0x398>)
|
|
8001da6: 2101 movs r1, #1
|
|
8001da8: 400a ands r2, r1
|
|
8001daa: 1890 adds r0, r2, r2
|
|
8001dac: 7a1a ldrb r2, [r3, #8]
|
|
8001dae: 2102 movs r1, #2
|
|
8001db0: 438a bics r2, r1
|
|
8001db2: 1c11 adds r1, r2, #0
|
|
8001db4: 1c02 adds r2, r0, #0
|
|
8001db6: 430a orrs r2, r1
|
|
8001db8: 721a strb r2, [r3, #8]
|
|
dis_buff.dot3=countdown>>5;
|
|
8001dba: 68bb ldr r3, [r7, #8]
|
|
8001dbc: 115b asrs r3, r3, #5
|
|
8001dbe: 1c1a adds r2, r3, #0
|
|
8001dc0: 2301 movs r3, #1
|
|
8001dc2: 4013 ands r3, r2
|
|
8001dc4: b2da uxtb r2, r3
|
|
8001dc6: 4b79 ldr r3, [pc, #484] ; (8001fac <my_code+0x398>)
|
|
8001dc8: 2101 movs r1, #1
|
|
8001dca: 400a ands r2, r1
|
|
8001dcc: 0090 lsls r0, r2, #2
|
|
8001dce: 7a1a ldrb r2, [r3, #8]
|
|
8001dd0: 2104 movs r1, #4
|
|
8001dd2: 438a bics r2, r1
|
|
8001dd4: 1c11 adds r1, r2, #0
|
|
8001dd6: 1c02 adds r2, r0, #0
|
|
8001dd8: 430a orrs r2, r1
|
|
8001dda: 721a strb r2, [r3, #8]
|
|
dis_buff.dot4=countdown>>6;
|
|
8001ddc: 68bb ldr r3, [r7, #8]
|
|
8001dde: 119b asrs r3, r3, #6
|
|
8001de0: 1c1a adds r2, r3, #0
|
|
8001de2: 2301 movs r3, #1
|
|
8001de4: 4013 ands r3, r2
|
|
8001de6: b2da uxtb r2, r3
|
|
8001de8: 4b70 ldr r3, [pc, #448] ; (8001fac <my_code+0x398>)
|
|
8001dea: 2101 movs r1, #1
|
|
8001dec: 400a ands r2, r1
|
|
8001dee: 00d0 lsls r0, r2, #3
|
|
8001df0: 7a1a ldrb r2, [r3, #8]
|
|
8001df2: 2108 movs r1, #8
|
|
8001df4: 438a bics r2, r1
|
|
8001df6: 1c11 adds r1, r2, #0
|
|
8001df8: 1c02 adds r2, r0, #0
|
|
8001dfa: 430a orrs r2, r1
|
|
8001dfc: 721a strb r2, [r3, #8]
|
|
|
|
}
|
|
break;
|
|
8001dfe: e2e4 b.n 80023ca <my_code+0x7b6>
|
|
case 1:
|
|
//standby
|
|
moto.moto1a=0;
|
|
8001e00: 4b6b ldr r3, [pc, #428] ; (8001fb0 <my_code+0x39c>)
|
|
8001e02: 2200 movs r2, #0
|
|
8001e04: 721a strb r2, [r3, #8]
|
|
moto.moto1b=0;
|
|
8001e06: 4b6a ldr r3, [pc, #424] ; (8001fb0 <my_code+0x39c>)
|
|
8001e08: 2200 movs r2, #0
|
|
8001e0a: 725a strb r2, [r3, #9]
|
|
moto.moto2a=0;
|
|
8001e0c: 4b68 ldr r3, [pc, #416] ; (8001fb0 <my_code+0x39c>)
|
|
8001e0e: 2200 movs r2, #0
|
|
8001e10: 729a strb r2, [r3, #10]
|
|
moto.moto2b=0;
|
|
8001e12: 4b67 ldr r3, [pc, #412] ; (8001fb0 <my_code+0x39c>)
|
|
8001e14: 2200 movs r2, #0
|
|
8001e16: 72da strb r2, [r3, #11]
|
|
|
|
if(HAL_GetTick()>runtime)
|
|
8001e18: f7fe fc88 bl 800072c <HAL_GetTick>
|
|
8001e1c: 0002 movs r2, r0
|
|
8001e1e: 697b ldr r3, [r7, #20]
|
|
8001e20: 4293 cmp r3, r2
|
|
8001e22: d217 bcs.n 8001e54 <my_code+0x240>
|
|
{
|
|
runtime+=1000;
|
|
8001e24: 697b ldr r3, [r7, #20]
|
|
8001e26: 22fa movs r2, #250 ; 0xfa
|
|
8001e28: 0092 lsls r2, r2, #2
|
|
8001e2a: 4694 mov ip, r2
|
|
8001e2c: 4463 add r3, ip
|
|
8001e2e: 617b str r3, [r7, #20]
|
|
|
|
if(dis_buff.led_run==1)
|
|
8001e30: 4b5e ldr r3, [pc, #376] ; (8001fac <my_code+0x398>)
|
|
8001e32: 7a1b ldrb r3, [r3, #8]
|
|
8001e34: 2210 movs r2, #16
|
|
8001e36: 4013 ands r3, r2
|
|
8001e38: b2db uxtb r3, r3
|
|
8001e3a: 2b00 cmp r3, #0
|
|
8001e3c: d005 beq.n 8001e4a <my_code+0x236>
|
|
{
|
|
dis_buff.led_run=0;
|
|
8001e3e: 4b5b ldr r3, [pc, #364] ; (8001fac <my_code+0x398>)
|
|
8001e40: 7a1a ldrb r2, [r3, #8]
|
|
8001e42: 2110 movs r1, #16
|
|
8001e44: 438a bics r2, r1
|
|
8001e46: 721a strb r2, [r3, #8]
|
|
8001e48: e004 b.n 8001e54 <my_code+0x240>
|
|
}else
|
|
{
|
|
dis_buff.led_run=1;
|
|
8001e4a: 4b58 ldr r3, [pc, #352] ; (8001fac <my_code+0x398>)
|
|
8001e4c: 7a1a ldrb r2, [r3, #8]
|
|
8001e4e: 2110 movs r1, #16
|
|
8001e50: 430a orrs r2, r1
|
|
8001e52: 721a strb r2, [r3, #8]
|
|
}
|
|
}
|
|
dis_buff.d_num[0]=0xff;
|
|
8001e54: 4b55 ldr r3, [pc, #340] ; (8001fac <my_code+0x398>)
|
|
8001e56: 22ff movs r2, #255 ; 0xff
|
|
8001e58: 701a strb r2, [r3, #0]
|
|
dis_buff.d_num[1]=0xff;
|
|
8001e5a: 4b54 ldr r3, [pc, #336] ; (8001fac <my_code+0x398>)
|
|
8001e5c: 22ff movs r2, #255 ; 0xff
|
|
8001e5e: 705a strb r2, [r3, #1]
|
|
dis_buff.d_num[2]=0xff;
|
|
8001e60: 4b52 ldr r3, [pc, #328] ; (8001fac <my_code+0x398>)
|
|
8001e62: 22ff movs r2, #255 ; 0xff
|
|
8001e64: 709a strb r2, [r3, #2]
|
|
dis_buff.d_num[3]=0xff;
|
|
8001e66: 4b51 ldr r3, [pc, #324] ; (8001fac <my_code+0x398>)
|
|
8001e68: 22ff movs r2, #255 ; 0xff
|
|
8001e6a: 70da strb r2, [r3, #3]
|
|
|
|
dis_buff.dot1=0;
|
|
8001e6c: 4b4f ldr r3, [pc, #316] ; (8001fac <my_code+0x398>)
|
|
8001e6e: 7a1a ldrb r2, [r3, #8]
|
|
8001e70: 2101 movs r1, #1
|
|
8001e72: 438a bics r2, r1
|
|
8001e74: 721a strb r2, [r3, #8]
|
|
dis_buff.dot2=0;
|
|
8001e76: 4b4d ldr r3, [pc, #308] ; (8001fac <my_code+0x398>)
|
|
8001e78: 7a1a ldrb r2, [r3, #8]
|
|
8001e7a: 2102 movs r1, #2
|
|
8001e7c: 438a bics r2, r1
|
|
8001e7e: 721a strb r2, [r3, #8]
|
|
dis_buff.dot3=0;
|
|
8001e80: 4b4a ldr r3, [pc, #296] ; (8001fac <my_code+0x398>)
|
|
8001e82: 7a1a ldrb r2, [r3, #8]
|
|
8001e84: 2104 movs r1, #4
|
|
8001e86: 438a bics r2, r1
|
|
8001e88: 721a strb r2, [r3, #8]
|
|
dis_buff.dot4=0;
|
|
8001e8a: 4b48 ldr r3, [pc, #288] ; (8001fac <my_code+0x398>)
|
|
8001e8c: 7a1a ldrb r2, [r3, #8]
|
|
8001e8e: 2108 movs r1, #8
|
|
8001e90: 438a bics r2, r1
|
|
8001e92: 721a strb r2, [r3, #8]
|
|
overload_times=0;
|
|
8001e94: 230c movs r3, #12
|
|
8001e96: 18fb adds r3, r7, r3
|
|
8001e98: 2200 movs r2, #0
|
|
8001e9a: 801a strh r2, [r3, #0]
|
|
if(key2.code!=0)
|
|
8001e9c: 4b46 ldr r3, [pc, #280] ; (8001fb8 <my_code+0x3a4>)
|
|
8001e9e: 681b ldr r3, [r3, #0]
|
|
8001ea0: 2b00 cmp r3, #0
|
|
8001ea2: d005 beq.n 8001eb0 <my_code+0x29c>
|
|
{
|
|
mode=2;
|
|
8001ea4: 230f movs r3, #15
|
|
8001ea6: 18fb adds r3, r7, r3
|
|
8001ea8: 2202 movs r2, #2
|
|
8001eaa: 701a strb r2, [r3, #0]
|
|
countdown=countdown_set;
|
|
8001eac: 687b ldr r3, [r7, #4]
|
|
8001eae: 60bb str r3, [r7, #8]
|
|
}
|
|
if(key3.code!=0)
|
|
8001eb0: 4b42 ldr r3, [pc, #264] ; (8001fbc <my_code+0x3a8>)
|
|
8001eb2: 681b ldr r3, [r3, #0]
|
|
8001eb4: 2b00 cmp r3, #0
|
|
8001eb6: d005 beq.n 8001ec4 <my_code+0x2b0>
|
|
{
|
|
mode=3;
|
|
8001eb8: 230f movs r3, #15
|
|
8001eba: 18fb adds r3, r7, r3
|
|
8001ebc: 2203 movs r2, #3
|
|
8001ebe: 701a strb r2, [r3, #0]
|
|
countdown=countdown_set;
|
|
8001ec0: 687b ldr r3, [r7, #4]
|
|
8001ec2: 60bb str r3, [r7, #8]
|
|
}
|
|
if(key1.code!=0)
|
|
8001ec4: 4b3e ldr r3, [pc, #248] ; (8001fc0 <my_code+0x3ac>)
|
|
8001ec6: 681b ldr r3, [r3, #0]
|
|
8001ec8: 2b00 cmp r3, #0
|
|
8001eca: d100 bne.n 8001ece <my_code+0x2ba>
|
|
8001ecc: e27f b.n 80023ce <my_code+0x7ba>
|
|
{
|
|
mode=4;
|
|
8001ece: 230f movs r3, #15
|
|
8001ed0: 18fb adds r3, r7, r3
|
|
8001ed2: 2204 movs r2, #4
|
|
8001ed4: 701a strb r2, [r3, #0]
|
|
countdown=10000;
|
|
8001ed6: 4b3b ldr r3, [pc, #236] ; (8001fc4 <my_code+0x3b0>)
|
|
8001ed8: 60bb str r3, [r7, #8]
|
|
}
|
|
break;
|
|
8001eda: e278 b.n 80023ce <my_code+0x7ba>
|
|
case 2:
|
|
moto.moto1a=10;
|
|
8001edc: 4b34 ldr r3, [pc, #208] ; (8001fb0 <my_code+0x39c>)
|
|
8001ede: 220a movs r2, #10
|
|
8001ee0: 721a strb r2, [r3, #8]
|
|
moto.moto1b=0;
|
|
8001ee2: 4b33 ldr r3, [pc, #204] ; (8001fb0 <my_code+0x39c>)
|
|
8001ee4: 2200 movs r2, #0
|
|
8001ee6: 725a strb r2, [r3, #9]
|
|
moto.moto2a=10;
|
|
8001ee8: 4b31 ldr r3, [pc, #196] ; (8001fb0 <my_code+0x39c>)
|
|
8001eea: 220a movs r2, #10
|
|
8001eec: 729a strb r2, [r3, #10]
|
|
moto.moto2b=0;
|
|
8001eee: 4b30 ldr r3, [pc, #192] ; (8001fb0 <my_code+0x39c>)
|
|
8001ef0: 2200 movs r2, #0
|
|
8001ef2: 72da strb r2, [r3, #11]
|
|
if(HAL_GetTick()>move)
|
|
8001ef4: f7fe fc1a bl 800072c <HAL_GetTick>
|
|
8001ef8: 0002 movs r2, r0
|
|
8001efa: 693b ldr r3, [r7, #16]
|
|
8001efc: 4293 cmp r3, r2
|
|
8001efe: d220 bcs.n 8001f42 <my_code+0x32e>
|
|
{
|
|
move=HAL_GetTick()+100;
|
|
8001f00: f7fe fc14 bl 800072c <HAL_GetTick>
|
|
8001f04: 0003 movs r3, r0
|
|
8001f06: 3364 adds r3, #100 ; 0x64
|
|
8001f08: 613b str r3, [r7, #16]
|
|
if(dis_buff.led_run==1)
|
|
8001f0a: 4b28 ldr r3, [pc, #160] ; (8001fac <my_code+0x398>)
|
|
8001f0c: 7a1b ldrb r3, [r3, #8]
|
|
8001f0e: 2210 movs r2, #16
|
|
8001f10: 4013 ands r3, r2
|
|
8001f12: b2db uxtb r3, r3
|
|
8001f14: 2b00 cmp r3, #0
|
|
8001f16: d005 beq.n 8001f24 <my_code+0x310>
|
|
{
|
|
dis_buff.led_run=0;
|
|
8001f18: 4b24 ldr r3, [pc, #144] ; (8001fac <my_code+0x398>)
|
|
8001f1a: 7a1a ldrb r2, [r3, #8]
|
|
8001f1c: 2110 movs r1, #16
|
|
8001f1e: 438a bics r2, r1
|
|
8001f20: 721a strb r2, [r3, #8]
|
|
8001f22: e004 b.n 8001f2e <my_code+0x31a>
|
|
}else
|
|
{
|
|
dis_buff.led_run=1;
|
|
8001f24: 4b21 ldr r3, [pc, #132] ; (8001fac <my_code+0x398>)
|
|
8001f26: 7a1a ldrb r2, [r3, #8]
|
|
8001f28: 2110 movs r1, #16
|
|
8001f2a: 430a orrs r2, r1
|
|
8001f2c: 721a strb r2, [r3, #8]
|
|
}
|
|
countdown-=100;
|
|
8001f2e: 68bb ldr r3, [r7, #8]
|
|
8001f30: 3b64 subs r3, #100 ; 0x64
|
|
8001f32: 60bb str r3, [r7, #8]
|
|
if(countdown<0)
|
|
8001f34: 68bb ldr r3, [r7, #8]
|
|
8001f36: 2b00 cmp r3, #0
|
|
8001f38: da03 bge.n 8001f42 <my_code+0x32e>
|
|
{
|
|
mode=1;
|
|
8001f3a: 230f movs r3, #15
|
|
8001f3c: 18fb adds r3, r7, r3
|
|
8001f3e: 2201 movs r2, #1
|
|
8001f40: 701a strb r2, [r3, #0]
|
|
}
|
|
}
|
|
dis_buff.d_num[3]=(countdown/100)%10;
|
|
8001f42: 68bb ldr r3, [r7, #8]
|
|
8001f44: 2164 movs r1, #100 ; 0x64
|
|
8001f46: 0018 movs r0, r3
|
|
8001f48: f7fe f968 bl 800021c <__divsi3>
|
|
8001f4c: 0003 movs r3, r0
|
|
8001f4e: 210a movs r1, #10
|
|
8001f50: 0018 movs r0, r3
|
|
8001f52: f7fe fa49 bl 80003e8 <__aeabi_idivmod>
|
|
8001f56: 000b movs r3, r1
|
|
8001f58: b2da uxtb r2, r3
|
|
8001f5a: 4b14 ldr r3, [pc, #80] ; (8001fac <my_code+0x398>)
|
|
8001f5c: 70da strb r2, [r3, #3]
|
|
dis_buff.d_num[2]=(countdown/1000)%10;
|
|
8001f5e: 68bb ldr r3, [r7, #8]
|
|
8001f60: 22fa movs r2, #250 ; 0xfa
|
|
8001f62: 0091 lsls r1, r2, #2
|
|
8001f64: 0018 movs r0, r3
|
|
8001f66: f7fe f959 bl 800021c <__divsi3>
|
|
8001f6a: 0003 movs r3, r0
|
|
8001f6c: 210a movs r1, #10
|
|
8001f6e: 0018 movs r0, r3
|
|
8001f70: f7fe fa3a bl 80003e8 <__aeabi_idivmod>
|
|
8001f74: 000b movs r3, r1
|
|
8001f76: b2da uxtb r2, r3
|
|
8001f78: 4b0c ldr r3, [pc, #48] ; (8001fac <my_code+0x398>)
|
|
8001f7a: 709a strb r2, [r3, #2]
|
|
dis_buff.d_num[1]=((countdown/10000)%10);
|
|
8001f7c: 68bb ldr r3, [r7, #8]
|
|
8001f7e: 4911 ldr r1, [pc, #68] ; (8001fc4 <my_code+0x3b0>)
|
|
8001f80: 0018 movs r0, r3
|
|
8001f82: f7fe f94b bl 800021c <__divsi3>
|
|
8001f86: 0003 movs r3, r0
|
|
8001f88: 210a movs r1, #10
|
|
8001f8a: 0018 movs r0, r3
|
|
8001f8c: f7fe fa2c bl 80003e8 <__aeabi_idivmod>
|
|
8001f90: 000b movs r3, r1
|
|
8001f92: b2da uxtb r2, r3
|
|
8001f94: 4b05 ldr r3, [pc, #20] ; (8001fac <my_code+0x398>)
|
|
8001f96: 705a strb r2, [r3, #1]
|
|
dis_buff.d_num[1]=dis_buff.d_num[1]==0?255:dis_buff.d_num[1];
|
|
8001f98: 4b04 ldr r3, [pc, #16] ; (8001fac <my_code+0x398>)
|
|
8001f9a: 785b ldrb r3, [r3, #1]
|
|
8001f9c: 2b00 cmp r3, #0
|
|
8001f9e: d013 beq.n 8001fc8 <my_code+0x3b4>
|
|
8001fa0: 4b02 ldr r3, [pc, #8] ; (8001fac <my_code+0x398>)
|
|
8001fa2: 785a ldrb r2, [r3, #1]
|
|
8001fa4: e011 b.n 8001fca <my_code+0x3b6>
|
|
8001fa6: 46c0 nop ; (mov r8, r8)
|
|
8001fa8: 00003a98 .word 0x00003a98
|
|
8001fac: 2000003c .word 0x2000003c
|
|
8001fb0: 20000088 .word 0x20000088
|
|
8001fb4: 080024ec .word 0x080024ec
|
|
8001fb8: 20000078 .word 0x20000078
|
|
8001fbc: 20000068 .word 0x20000068
|
|
8001fc0: 20000048 .word 0x20000048
|
|
8001fc4: 00002710 .word 0x00002710
|
|
8001fc8: 22ff movs r2, #255 ; 0xff
|
|
8001fca: 4bdc ldr r3, [pc, #880] ; (800233c <my_code+0x728>)
|
|
8001fcc: 705a strb r2, [r3, #1]
|
|
dis_buff.dot3=1;
|
|
8001fce: 4bdb ldr r3, [pc, #876] ; (800233c <my_code+0x728>)
|
|
8001fd0: 7a1a ldrb r2, [r3, #8]
|
|
8001fd2: 2104 movs r1, #4
|
|
8001fd4: 430a orrs r2, r1
|
|
8001fd6: 721a strb r2, [r3, #8]
|
|
|
|
if(key3.code!=0)
|
|
8001fd8: 4bd9 ldr r3, [pc, #868] ; (8002340 <my_code+0x72c>)
|
|
8001fda: 681b ldr r3, [r3, #0]
|
|
8001fdc: 2b00 cmp r3, #0
|
|
8001fde: d007 beq.n 8001ff0 <my_code+0x3dc>
|
|
{
|
|
mode=3;
|
|
8001fe0: 230f movs r3, #15
|
|
8001fe2: 18fb adds r3, r7, r3
|
|
8001fe4: 2203 movs r2, #3
|
|
8001fe6: 701a strb r2, [r3, #0]
|
|
countdown=countdown_set-countdown;
|
|
8001fe8: 687a ldr r2, [r7, #4]
|
|
8001fea: 68bb ldr r3, [r7, #8]
|
|
8001fec: 1ad3 subs r3, r2, r3
|
|
8001fee: 60bb str r3, [r7, #8]
|
|
}
|
|
if(key4.code!=0)
|
|
8001ff0: 4bd4 ldr r3, [pc, #848] ; (8002344 <my_code+0x730>)
|
|
8001ff2: 681b ldr r3, [r3, #0]
|
|
8001ff4: 2b00 cmp r3, #0
|
|
8001ff6: d003 beq.n 8002000 <my_code+0x3ec>
|
|
{
|
|
mode=1;
|
|
8001ff8: 230f movs r3, #15
|
|
8001ffa: 18fb adds r3, r7, r3
|
|
8001ffc: 2201 movs r2, #1
|
|
8001ffe: 701a strb r2, [r3, #0]
|
|
}
|
|
if(overload.code!=0)
|
|
8002000: 4bd1 ldr r3, [pc, #836] ; (8002348 <my_code+0x734>)
|
|
8002002: 681b ldr r3, [r3, #0]
|
|
8002004: 2b00 cmp r3, #0
|
|
8002006: d005 beq.n 8002014 <my_code+0x400>
|
|
{
|
|
overload_times+=1;
|
|
8002008: 220c movs r2, #12
|
|
800200a: 18bb adds r3, r7, r2
|
|
800200c: 18ba adds r2, r7, r2
|
|
800200e: 8812 ldrh r2, [r2, #0]
|
|
8002010: 3201 adds r2, #1
|
|
8002012: 801a strh r2, [r3, #0]
|
|
}
|
|
if(overload_times>2)
|
|
8002014: 230c movs r3, #12
|
|
8002016: 18fb adds r3, r7, r3
|
|
8002018: 881b ldrh r3, [r3, #0]
|
|
800201a: 2b02 cmp r3, #2
|
|
800201c: d800 bhi.n 8002020 <my_code+0x40c>
|
|
800201e: e1d8 b.n 80023d2 <my_code+0x7be>
|
|
{
|
|
overload_mode=2;
|
|
8002020: 230e movs r3, #14
|
|
8002022: 18fb adds r3, r7, r3
|
|
8002024: 2202 movs r2, #2
|
|
8002026: 701a strb r2, [r3, #0]
|
|
mode=5;
|
|
8002028: 230f movs r3, #15
|
|
800202a: 18fb adds r3, r7, r3
|
|
800202c: 2205 movs r2, #5
|
|
800202e: 701a strb r2, [r3, #0]
|
|
}
|
|
break;
|
|
8002030: e1cf b.n 80023d2 <my_code+0x7be>
|
|
case 3:
|
|
moto.moto1a=0;
|
|
8002032: 4bc6 ldr r3, [pc, #792] ; (800234c <my_code+0x738>)
|
|
8002034: 2200 movs r2, #0
|
|
8002036: 721a strb r2, [r3, #8]
|
|
moto.moto1b=10;
|
|
8002038: 4bc4 ldr r3, [pc, #784] ; (800234c <my_code+0x738>)
|
|
800203a: 220a movs r2, #10
|
|
800203c: 725a strb r2, [r3, #9]
|
|
moto.moto2a=0;
|
|
800203e: 4bc3 ldr r3, [pc, #780] ; (800234c <my_code+0x738>)
|
|
8002040: 2200 movs r2, #0
|
|
8002042: 729a strb r2, [r3, #10]
|
|
moto.moto2b=10;
|
|
8002044: 4bc1 ldr r3, [pc, #772] ; (800234c <my_code+0x738>)
|
|
8002046: 220a movs r2, #10
|
|
8002048: 72da strb r2, [r3, #11]
|
|
if(HAL_GetTick()>move)
|
|
800204a: f7fe fb6f bl 800072c <HAL_GetTick>
|
|
800204e: 0002 movs r2, r0
|
|
8002050: 693b ldr r3, [r7, #16]
|
|
8002052: 4293 cmp r3, r2
|
|
8002054: d220 bcs.n 8002098 <my_code+0x484>
|
|
{
|
|
move=HAL_GetTick()+100;
|
|
8002056: f7fe fb69 bl 800072c <HAL_GetTick>
|
|
800205a: 0003 movs r3, r0
|
|
800205c: 3364 adds r3, #100 ; 0x64
|
|
800205e: 613b str r3, [r7, #16]
|
|
if(dis_buff.led_run==1)
|
|
8002060: 4bb6 ldr r3, [pc, #728] ; (800233c <my_code+0x728>)
|
|
8002062: 7a1b ldrb r3, [r3, #8]
|
|
8002064: 2210 movs r2, #16
|
|
8002066: 4013 ands r3, r2
|
|
8002068: b2db uxtb r3, r3
|
|
800206a: 2b00 cmp r3, #0
|
|
800206c: d005 beq.n 800207a <my_code+0x466>
|
|
{
|
|
dis_buff.led_run=0;
|
|
800206e: 4bb3 ldr r3, [pc, #716] ; (800233c <my_code+0x728>)
|
|
8002070: 7a1a ldrb r2, [r3, #8]
|
|
8002072: 2110 movs r1, #16
|
|
8002074: 438a bics r2, r1
|
|
8002076: 721a strb r2, [r3, #8]
|
|
8002078: e004 b.n 8002084 <my_code+0x470>
|
|
}else
|
|
{
|
|
dis_buff.led_run=1;
|
|
800207a: 4bb0 ldr r3, [pc, #704] ; (800233c <my_code+0x728>)
|
|
800207c: 7a1a ldrb r2, [r3, #8]
|
|
800207e: 2110 movs r1, #16
|
|
8002080: 430a orrs r2, r1
|
|
8002082: 721a strb r2, [r3, #8]
|
|
}
|
|
countdown-=100;
|
|
8002084: 68bb ldr r3, [r7, #8]
|
|
8002086: 3b64 subs r3, #100 ; 0x64
|
|
8002088: 60bb str r3, [r7, #8]
|
|
if(countdown<0)
|
|
800208a: 68bb ldr r3, [r7, #8]
|
|
800208c: 2b00 cmp r3, #0
|
|
800208e: da03 bge.n 8002098 <my_code+0x484>
|
|
{
|
|
mode=1;
|
|
8002090: 230f movs r3, #15
|
|
8002092: 18fb adds r3, r7, r3
|
|
8002094: 2201 movs r2, #1
|
|
8002096: 701a strb r2, [r3, #0]
|
|
}
|
|
}
|
|
dis_buff.d_num[3]=(countdown/100)%10;
|
|
8002098: 68bb ldr r3, [r7, #8]
|
|
800209a: 2164 movs r1, #100 ; 0x64
|
|
800209c: 0018 movs r0, r3
|
|
800209e: f7fe f8bd bl 800021c <__divsi3>
|
|
80020a2: 0003 movs r3, r0
|
|
80020a4: 210a movs r1, #10
|
|
80020a6: 0018 movs r0, r3
|
|
80020a8: f7fe f99e bl 80003e8 <__aeabi_idivmod>
|
|
80020ac: 000b movs r3, r1
|
|
80020ae: b2da uxtb r2, r3
|
|
80020b0: 4ba2 ldr r3, [pc, #648] ; (800233c <my_code+0x728>)
|
|
80020b2: 70da strb r2, [r3, #3]
|
|
dis_buff.d_num[2]=(countdown/1000)%10;
|
|
80020b4: 68bb ldr r3, [r7, #8]
|
|
80020b6: 22fa movs r2, #250 ; 0xfa
|
|
80020b8: 0091 lsls r1, r2, #2
|
|
80020ba: 0018 movs r0, r3
|
|
80020bc: f7fe f8ae bl 800021c <__divsi3>
|
|
80020c0: 0003 movs r3, r0
|
|
80020c2: 210a movs r1, #10
|
|
80020c4: 0018 movs r0, r3
|
|
80020c6: f7fe f98f bl 80003e8 <__aeabi_idivmod>
|
|
80020ca: 000b movs r3, r1
|
|
80020cc: b2da uxtb r2, r3
|
|
80020ce: 4b9b ldr r3, [pc, #620] ; (800233c <my_code+0x728>)
|
|
80020d0: 709a strb r2, [r3, #2]
|
|
dis_buff.d_num[1]=((countdown/10000)%10);
|
|
80020d2: 68bb ldr r3, [r7, #8]
|
|
80020d4: 499e ldr r1, [pc, #632] ; (8002350 <my_code+0x73c>)
|
|
80020d6: 0018 movs r0, r3
|
|
80020d8: f7fe f8a0 bl 800021c <__divsi3>
|
|
80020dc: 0003 movs r3, r0
|
|
80020de: 210a movs r1, #10
|
|
80020e0: 0018 movs r0, r3
|
|
80020e2: f7fe f981 bl 80003e8 <__aeabi_idivmod>
|
|
80020e6: 000b movs r3, r1
|
|
80020e8: b2da uxtb r2, r3
|
|
80020ea: 4b94 ldr r3, [pc, #592] ; (800233c <my_code+0x728>)
|
|
80020ec: 705a strb r2, [r3, #1]
|
|
dis_buff.d_num[1]=dis_buff.d_num[1]==0?255:dis_buff.d_num[1];
|
|
80020ee: 4b93 ldr r3, [pc, #588] ; (800233c <my_code+0x728>)
|
|
80020f0: 785b ldrb r3, [r3, #1]
|
|
80020f2: 2b00 cmp r3, #0
|
|
80020f4: d002 beq.n 80020fc <my_code+0x4e8>
|
|
80020f6: 4b91 ldr r3, [pc, #580] ; (800233c <my_code+0x728>)
|
|
80020f8: 785a ldrb r2, [r3, #1]
|
|
80020fa: e000 b.n 80020fe <my_code+0x4ea>
|
|
80020fc: 22ff movs r2, #255 ; 0xff
|
|
80020fe: 4b8f ldr r3, [pc, #572] ; (800233c <my_code+0x728>)
|
|
8002100: 705a strb r2, [r3, #1]
|
|
dis_buff.dot3=1;
|
|
8002102: 4b8e ldr r3, [pc, #568] ; (800233c <my_code+0x728>)
|
|
8002104: 7a1a ldrb r2, [r3, #8]
|
|
8002106: 2104 movs r1, #4
|
|
8002108: 430a orrs r2, r1
|
|
800210a: 721a strb r2, [r3, #8]
|
|
if(key2.code!=0)
|
|
800210c: 4b91 ldr r3, [pc, #580] ; (8002354 <my_code+0x740>)
|
|
800210e: 681b ldr r3, [r3, #0]
|
|
8002110: 2b00 cmp r3, #0
|
|
8002112: d007 beq.n 8002124 <my_code+0x510>
|
|
{
|
|
mode=2;
|
|
8002114: 230f movs r3, #15
|
|
8002116: 18fb adds r3, r7, r3
|
|
8002118: 2202 movs r2, #2
|
|
800211a: 701a strb r2, [r3, #0]
|
|
countdown=countdown_set-countdown;
|
|
800211c: 687a ldr r2, [r7, #4]
|
|
800211e: 68bb ldr r3, [r7, #8]
|
|
8002120: 1ad3 subs r3, r2, r3
|
|
8002122: 60bb str r3, [r7, #8]
|
|
}
|
|
if(key4.code!=0)
|
|
8002124: 4b87 ldr r3, [pc, #540] ; (8002344 <my_code+0x730>)
|
|
8002126: 681b ldr r3, [r3, #0]
|
|
8002128: 2b00 cmp r3, #0
|
|
800212a: d003 beq.n 8002134 <my_code+0x520>
|
|
{
|
|
mode=1;
|
|
800212c: 230f movs r3, #15
|
|
800212e: 18fb adds r3, r7, r3
|
|
8002130: 2201 movs r2, #1
|
|
8002132: 701a strb r2, [r3, #0]
|
|
}
|
|
if(overload.code!=0)
|
|
8002134: 4b84 ldr r3, [pc, #528] ; (8002348 <my_code+0x734>)
|
|
8002136: 681b ldr r3, [r3, #0]
|
|
8002138: 2b00 cmp r3, #0
|
|
800213a: d005 beq.n 8002148 <my_code+0x534>
|
|
{
|
|
overload_times+=1;
|
|
800213c: 220c movs r2, #12
|
|
800213e: 18bb adds r3, r7, r2
|
|
8002140: 18ba adds r2, r7, r2
|
|
8002142: 8812 ldrh r2, [r2, #0]
|
|
8002144: 3201 adds r2, #1
|
|
8002146: 801a strh r2, [r3, #0]
|
|
}
|
|
if(overload_times>2)
|
|
8002148: 230c movs r3, #12
|
|
800214a: 18fb adds r3, r7, r3
|
|
800214c: 881b ldrh r3, [r3, #0]
|
|
800214e: 2b02 cmp r3, #2
|
|
8002150: d800 bhi.n 8002154 <my_code+0x540>
|
|
8002152: e140 b.n 80023d6 <my_code+0x7c2>
|
|
{
|
|
overload_mode=3;
|
|
8002154: 230e movs r3, #14
|
|
8002156: 18fb adds r3, r7, r3
|
|
8002158: 2203 movs r2, #3
|
|
800215a: 701a strb r2, [r3, #0]
|
|
mode=5;
|
|
800215c: 230f movs r3, #15
|
|
800215e: 18fb adds r3, r7, r3
|
|
8002160: 2205 movs r2, #5
|
|
8002162: 701a strb r2, [r3, #0]
|
|
}
|
|
break;
|
|
8002164: e137 b.n 80023d6 <my_code+0x7c2>
|
|
case 4:
|
|
//setting mode
|
|
dis_buff.led_run=0;
|
|
8002166: 4b75 ldr r3, [pc, #468] ; (800233c <my_code+0x728>)
|
|
8002168: 7a1a ldrb r2, [r3, #8]
|
|
800216a: 2110 movs r1, #16
|
|
800216c: 438a bics r2, r1
|
|
800216e: 721a strb r2, [r3, #8]
|
|
if(HAL_GetTick()>move)
|
|
8002170: f7fe fadc bl 800072c <HAL_GetTick>
|
|
8002174: 0002 movs r2, r0
|
|
8002176: 693b ldr r3, [r7, #16]
|
|
8002178: 4293 cmp r3, r2
|
|
800217a: d237 bcs.n 80021ec <my_code+0x5d8>
|
|
{
|
|
move=HAL_GetTick()+100;
|
|
800217c: f7fe fad6 bl 800072c <HAL_GetTick>
|
|
8002180: 0003 movs r3, r0
|
|
8002182: 3364 adds r3, #100 ; 0x64
|
|
8002184: 613b str r3, [r7, #16]
|
|
if(dis_buff.dot1==1)
|
|
8002186: 4b6d ldr r3, [pc, #436] ; (800233c <my_code+0x728>)
|
|
8002188: 7a1b ldrb r3, [r3, #8]
|
|
800218a: 2201 movs r2, #1
|
|
800218c: 4013 ands r3, r2
|
|
800218e: b2db uxtb r3, r3
|
|
8002190: 2b00 cmp r3, #0
|
|
8002192: d005 beq.n 80021a0 <my_code+0x58c>
|
|
{
|
|
dis_buff.dot1=0;
|
|
8002194: 4b69 ldr r3, [pc, #420] ; (800233c <my_code+0x728>)
|
|
8002196: 7a1a ldrb r2, [r3, #8]
|
|
8002198: 2101 movs r1, #1
|
|
800219a: 438a bics r2, r1
|
|
800219c: 721a strb r2, [r3, #8]
|
|
800219e: e004 b.n 80021aa <my_code+0x596>
|
|
}else
|
|
{
|
|
dis_buff.dot1=1;
|
|
80021a0: 4b66 ldr r3, [pc, #408] ; (800233c <my_code+0x728>)
|
|
80021a2: 7a1a ldrb r2, [r3, #8]
|
|
80021a4: 2101 movs r1, #1
|
|
80021a6: 430a orrs r2, r1
|
|
80021a8: 721a strb r2, [r3, #8]
|
|
}
|
|
countdown-=100;
|
|
80021aa: 68bb ldr r3, [r7, #8]
|
|
80021ac: 3b64 subs r3, #100 ; 0x64
|
|
80021ae: 60bb str r3, [r7, #8]
|
|
if(countdown<0)
|
|
80021b0: 68bb ldr r3, [r7, #8]
|
|
80021b2: 2b00 cmp r3, #0
|
|
80021b4: da03 bge.n 80021be <my_code+0x5aa>
|
|
{
|
|
mode=1;
|
|
80021b6: 230f movs r3, #15
|
|
80021b8: 18fb adds r3, r7, r3
|
|
80021ba: 2201 movs r2, #1
|
|
80021bc: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
if(key2.code<0){countdown_set+=1000;countdown=10000;}
|
|
80021be: 4b65 ldr r3, [pc, #404] ; (8002354 <my_code+0x740>)
|
|
80021c0: 681b ldr r3, [r3, #0]
|
|
80021c2: 2b00 cmp r3, #0
|
|
80021c4: da07 bge.n 80021d6 <my_code+0x5c2>
|
|
80021c6: 687b ldr r3, [r7, #4]
|
|
80021c8: 22fa movs r2, #250 ; 0xfa
|
|
80021ca: 0092 lsls r2, r2, #2
|
|
80021cc: 4694 mov ip, r2
|
|
80021ce: 4463 add r3, ip
|
|
80021d0: 607b str r3, [r7, #4]
|
|
80021d2: 4b5f ldr r3, [pc, #380] ; (8002350 <my_code+0x73c>)
|
|
80021d4: 60bb str r3, [r7, #8]
|
|
if(key3.code<0){countdown_set-=1000;countdown=10000;}
|
|
80021d6: 4b5a ldr r3, [pc, #360] ; (8002340 <my_code+0x72c>)
|
|
80021d8: 681b ldr r3, [r3, #0]
|
|
80021da: 2b00 cmp r3, #0
|
|
80021dc: da06 bge.n 80021ec <my_code+0x5d8>
|
|
80021de: 687b ldr r3, [r7, #4]
|
|
80021e0: 4a5d ldr r2, [pc, #372] ; (8002358 <my_code+0x744>)
|
|
80021e2: 4694 mov ip, r2
|
|
80021e4: 4463 add r3, ip
|
|
80021e6: 607b str r3, [r7, #4]
|
|
80021e8: 4b59 ldr r3, [pc, #356] ; (8002350 <my_code+0x73c>)
|
|
80021ea: 60bb str r3, [r7, #8]
|
|
|
|
}
|
|
|
|
if(key2.code>0){countdown_set+=100;countdown=10000;}
|
|
80021ec: 4b59 ldr r3, [pc, #356] ; (8002354 <my_code+0x740>)
|
|
80021ee: 681b ldr r3, [r3, #0]
|
|
80021f0: 2b00 cmp r3, #0
|
|
80021f2: dd04 ble.n 80021fe <my_code+0x5ea>
|
|
80021f4: 687b ldr r3, [r7, #4]
|
|
80021f6: 3364 adds r3, #100 ; 0x64
|
|
80021f8: 607b str r3, [r7, #4]
|
|
80021fa: 4b55 ldr r3, [pc, #340] ; (8002350 <my_code+0x73c>)
|
|
80021fc: 60bb str r3, [r7, #8]
|
|
if(key3.code>0){countdown_set-=100;countdown=10000;}
|
|
80021fe: 4b50 ldr r3, [pc, #320] ; (8002340 <my_code+0x72c>)
|
|
8002200: 681b ldr r3, [r3, #0]
|
|
8002202: 2b00 cmp r3, #0
|
|
8002204: dd04 ble.n 8002210 <my_code+0x5fc>
|
|
8002206: 687b ldr r3, [r7, #4]
|
|
8002208: 3b64 subs r3, #100 ; 0x64
|
|
800220a: 607b str r3, [r7, #4]
|
|
800220c: 4b50 ldr r3, [pc, #320] ; (8002350 <my_code+0x73c>)
|
|
800220e: 60bb str r3, [r7, #8]
|
|
if(countdown_set<100){countdown_set=100;}
|
|
8002210: 687b ldr r3, [r7, #4]
|
|
8002212: 2b63 cmp r3, #99 ; 0x63
|
|
8002214: dc01 bgt.n 800221a <my_code+0x606>
|
|
8002216: 2364 movs r3, #100 ; 0x64
|
|
8002218: 607b str r3, [r7, #4]
|
|
if(countdown_set>60000){countdown_set=60000;}
|
|
800221a: 687b ldr r3, [r7, #4]
|
|
800221c: 4a4f ldr r2, [pc, #316] ; (800235c <my_code+0x748>)
|
|
800221e: 4293 cmp r3, r2
|
|
8002220: dd01 ble.n 8002226 <my_code+0x612>
|
|
8002222: 4b4e ldr r3, [pc, #312] ; (800235c <my_code+0x748>)
|
|
8002224: 607b str r3, [r7, #4]
|
|
|
|
if(key1.code!=0){mode=1;}
|
|
8002226: 4b4e ldr r3, [pc, #312] ; (8002360 <my_code+0x74c>)
|
|
8002228: 681b ldr r3, [r3, #0]
|
|
800222a: 2b00 cmp r3, #0
|
|
800222c: d003 beq.n 8002236 <my_code+0x622>
|
|
800222e: 230f movs r3, #15
|
|
8002230: 18fb adds r3, r7, r3
|
|
8002232: 2201 movs r2, #1
|
|
8002234: 701a strb r2, [r3, #0]
|
|
dis_buff.d_num[3]=(countdown_set/100)%10;
|
|
8002236: 687b ldr r3, [r7, #4]
|
|
8002238: 2164 movs r1, #100 ; 0x64
|
|
800223a: 0018 movs r0, r3
|
|
800223c: f7fd ffee bl 800021c <__divsi3>
|
|
8002240: 0003 movs r3, r0
|
|
8002242: 210a movs r1, #10
|
|
8002244: 0018 movs r0, r3
|
|
8002246: f7fe f8cf bl 80003e8 <__aeabi_idivmod>
|
|
800224a: 000b movs r3, r1
|
|
800224c: b2da uxtb r2, r3
|
|
800224e: 4b3b ldr r3, [pc, #236] ; (800233c <my_code+0x728>)
|
|
8002250: 70da strb r2, [r3, #3]
|
|
dis_buff.d_num[2]=(countdown_set/1000)%10;
|
|
8002252: 687b ldr r3, [r7, #4]
|
|
8002254: 22fa movs r2, #250 ; 0xfa
|
|
8002256: 0091 lsls r1, r2, #2
|
|
8002258: 0018 movs r0, r3
|
|
800225a: f7fd ffdf bl 800021c <__divsi3>
|
|
800225e: 0003 movs r3, r0
|
|
8002260: 210a movs r1, #10
|
|
8002262: 0018 movs r0, r3
|
|
8002264: f7fe f8c0 bl 80003e8 <__aeabi_idivmod>
|
|
8002268: 000b movs r3, r1
|
|
800226a: b2da uxtb r2, r3
|
|
800226c: 4b33 ldr r3, [pc, #204] ; (800233c <my_code+0x728>)
|
|
800226e: 709a strb r2, [r3, #2]
|
|
dis_buff.d_num[1]=((countdown_set/10000)%10);
|
|
8002270: 687b ldr r3, [r7, #4]
|
|
8002272: 4937 ldr r1, [pc, #220] ; (8002350 <my_code+0x73c>)
|
|
8002274: 0018 movs r0, r3
|
|
8002276: f7fd ffd1 bl 800021c <__divsi3>
|
|
800227a: 0003 movs r3, r0
|
|
800227c: 210a movs r1, #10
|
|
800227e: 0018 movs r0, r3
|
|
8002280: f7fe f8b2 bl 80003e8 <__aeabi_idivmod>
|
|
8002284: 000b movs r3, r1
|
|
8002286: b2da uxtb r2, r3
|
|
8002288: 4b2c ldr r3, [pc, #176] ; (800233c <my_code+0x728>)
|
|
800228a: 705a strb r2, [r3, #1]
|
|
dis_buff.d_num[1]=dis_buff.d_num[1]==0?255:dis_buff.d_num[1];
|
|
800228c: 4b2b ldr r3, [pc, #172] ; (800233c <my_code+0x728>)
|
|
800228e: 785b ldrb r3, [r3, #1]
|
|
8002290: 2b00 cmp r3, #0
|
|
8002292: d002 beq.n 800229a <my_code+0x686>
|
|
8002294: 4b29 ldr r3, [pc, #164] ; (800233c <my_code+0x728>)
|
|
8002296: 785a ldrb r2, [r3, #1]
|
|
8002298: e000 b.n 800229c <my_code+0x688>
|
|
800229a: 22ff movs r2, #255 ; 0xff
|
|
800229c: 4b27 ldr r3, [pc, #156] ; (800233c <my_code+0x728>)
|
|
800229e: 705a strb r2, [r3, #1]
|
|
dis_buff.dot3=1;
|
|
80022a0: 4b26 ldr r3, [pc, #152] ; (800233c <my_code+0x728>)
|
|
80022a2: 7a1a ldrb r2, [r3, #8]
|
|
80022a4: 2104 movs r1, #4
|
|
80022a6: 430a orrs r2, r1
|
|
80022a8: 721a strb r2, [r3, #8]
|
|
|
|
break;
|
|
80022aa: e097 b.n 80023dc <my_code+0x7c8>
|
|
case 5:
|
|
//overload
|
|
moto.moto1a=0;
|
|
80022ac: 4b27 ldr r3, [pc, #156] ; (800234c <my_code+0x738>)
|
|
80022ae: 2200 movs r2, #0
|
|
80022b0: 721a strb r2, [r3, #8]
|
|
moto.moto1b=0;
|
|
80022b2: 4b26 ldr r3, [pc, #152] ; (800234c <my_code+0x738>)
|
|
80022b4: 2200 movs r2, #0
|
|
80022b6: 725a strb r2, [r3, #9]
|
|
moto.moto2a=0;
|
|
80022b8: 4b24 ldr r3, [pc, #144] ; (800234c <my_code+0x738>)
|
|
80022ba: 2200 movs r2, #0
|
|
80022bc: 729a strb r2, [r3, #10]
|
|
moto.moto2b=0;
|
|
80022be: 4b23 ldr r3, [pc, #140] ; (800234c <my_code+0x738>)
|
|
80022c0: 2200 movs r2, #0
|
|
80022c2: 72da strb r2, [r3, #11]
|
|
dis_buff.led_run=1;
|
|
80022c4: 4b1d ldr r3, [pc, #116] ; (800233c <my_code+0x728>)
|
|
80022c6: 7a1a ldrb r2, [r3, #8]
|
|
80022c8: 2110 movs r1, #16
|
|
80022ca: 430a orrs r2, r1
|
|
80022cc: 721a strb r2, [r3, #8]
|
|
overload_times=0;
|
|
80022ce: 230c movs r3, #12
|
|
80022d0: 18fb adds r3, r7, r3
|
|
80022d2: 2200 movs r2, #0
|
|
80022d4: 801a strh r2, [r3, #0]
|
|
dis_buff.d_num[3]=(countdown/100)%10;
|
|
80022d6: 68bb ldr r3, [r7, #8]
|
|
80022d8: 2164 movs r1, #100 ; 0x64
|
|
80022da: 0018 movs r0, r3
|
|
80022dc: f7fd ff9e bl 800021c <__divsi3>
|
|
80022e0: 0003 movs r3, r0
|
|
80022e2: 210a movs r1, #10
|
|
80022e4: 0018 movs r0, r3
|
|
80022e6: f7fe f87f bl 80003e8 <__aeabi_idivmod>
|
|
80022ea: 000b movs r3, r1
|
|
80022ec: b2da uxtb r2, r3
|
|
80022ee: 4b13 ldr r3, [pc, #76] ; (800233c <my_code+0x728>)
|
|
80022f0: 70da strb r2, [r3, #3]
|
|
dis_buff.d_num[2]=(countdown/1000)%10;
|
|
80022f2: 68bb ldr r3, [r7, #8]
|
|
80022f4: 22fa movs r2, #250 ; 0xfa
|
|
80022f6: 0091 lsls r1, r2, #2
|
|
80022f8: 0018 movs r0, r3
|
|
80022fa: f7fd ff8f bl 800021c <__divsi3>
|
|
80022fe: 0003 movs r3, r0
|
|
8002300: 210a movs r1, #10
|
|
8002302: 0018 movs r0, r3
|
|
8002304: f7fe f870 bl 80003e8 <__aeabi_idivmod>
|
|
8002308: 000b movs r3, r1
|
|
800230a: b2da uxtb r2, r3
|
|
800230c: 4b0b ldr r3, [pc, #44] ; (800233c <my_code+0x728>)
|
|
800230e: 709a strb r2, [r3, #2]
|
|
dis_buff.d_num[1]=((countdown/10000)%10);
|
|
8002310: 68bb ldr r3, [r7, #8]
|
|
8002312: 490f ldr r1, [pc, #60] ; (8002350 <my_code+0x73c>)
|
|
8002314: 0018 movs r0, r3
|
|
8002316: f7fd ff81 bl 800021c <__divsi3>
|
|
800231a: 0003 movs r3, r0
|
|
800231c: 210a movs r1, #10
|
|
800231e: 0018 movs r0, r3
|
|
8002320: f7fe f862 bl 80003e8 <__aeabi_idivmod>
|
|
8002324: 000b movs r3, r1
|
|
8002326: b2da uxtb r2, r3
|
|
8002328: 4b04 ldr r3, [pc, #16] ; (800233c <my_code+0x728>)
|
|
800232a: 705a strb r2, [r3, #1]
|
|
dis_buff.d_num[1]=dis_buff.d_num[1]==0?255:dis_buff.d_num[1];
|
|
800232c: 4b03 ldr r3, [pc, #12] ; (800233c <my_code+0x728>)
|
|
800232e: 785b ldrb r3, [r3, #1]
|
|
8002330: 2b00 cmp r3, #0
|
|
8002332: d017 beq.n 8002364 <my_code+0x750>
|
|
8002334: 4b01 ldr r3, [pc, #4] ; (800233c <my_code+0x728>)
|
|
8002336: 785a ldrb r2, [r3, #1]
|
|
8002338: e015 b.n 8002366 <my_code+0x752>
|
|
800233a: 46c0 nop ; (mov r8, r8)
|
|
800233c: 2000003c .word 0x2000003c
|
|
8002340: 20000068 .word 0x20000068
|
|
8002344: 2000002c .word 0x2000002c
|
|
8002348: 20000058 .word 0x20000058
|
|
800234c: 20000088 .word 0x20000088
|
|
8002350: 00002710 .word 0x00002710
|
|
8002354: 20000078 .word 0x20000078
|
|
8002358: fffffc18 .word 0xfffffc18
|
|
800235c: 0000ea60 .word 0x0000ea60
|
|
8002360: 20000048 .word 0x20000048
|
|
8002364: 22ff movs r2, #255 ; 0xff
|
|
8002366: 4b2f ldr r3, [pc, #188] ; (8002424 <my_code+0x810>)
|
|
8002368: 705a strb r2, [r3, #1]
|
|
dis_buff.dot3=1;
|
|
800236a: 4b2e ldr r3, [pc, #184] ; (8002424 <my_code+0x810>)
|
|
800236c: 7a1a ldrb r2, [r3, #8]
|
|
800236e: 2104 movs r1, #4
|
|
8002370: 430a orrs r2, r1
|
|
8002372: 721a strb r2, [r3, #8]
|
|
if(key4.code!=0){mode=1;}
|
|
8002374: 4b2c ldr r3, [pc, #176] ; (8002428 <my_code+0x814>)
|
|
8002376: 681b ldr r3, [r3, #0]
|
|
8002378: 2b00 cmp r3, #0
|
|
800237a: d003 beq.n 8002384 <my_code+0x770>
|
|
800237c: 230f movs r3, #15
|
|
800237e: 18fb adds r3, r7, r3
|
|
8002380: 2201 movs r2, #1
|
|
8002382: 701a strb r2, [r3, #0]
|
|
|
|
if(key2.code!=0)
|
|
8002384: 4b29 ldr r3, [pc, #164] ; (800242c <my_code+0x818>)
|
|
8002386: 681b ldr r3, [r3, #0]
|
|
8002388: 2b00 cmp r3, #0
|
|
800238a: d00c beq.n 80023a6 <my_code+0x792>
|
|
{
|
|
mode=2;
|
|
800238c: 230f movs r3, #15
|
|
800238e: 18fb adds r3, r7, r3
|
|
8002390: 2202 movs r2, #2
|
|
8002392: 701a strb r2, [r3, #0]
|
|
if(overload_mode==2)
|
|
8002394: 230e movs r3, #14
|
|
8002396: 18fb adds r3, r7, r3
|
|
8002398: 781b ldrb r3, [r3, #0]
|
|
800239a: 2b02 cmp r3, #2
|
|
800239c: d003 beq.n 80023a6 <my_code+0x792>
|
|
{
|
|
|
|
}else
|
|
{
|
|
countdown=countdown_set-countdown;
|
|
800239e: 687a ldr r2, [r7, #4]
|
|
80023a0: 68bb ldr r3, [r7, #8]
|
|
80023a2: 1ad3 subs r3, r2, r3
|
|
80023a4: 60bb str r3, [r7, #8]
|
|
}
|
|
|
|
}
|
|
if(key3.code!=0)
|
|
80023a6: 4b22 ldr r3, [pc, #136] ; (8002430 <my_code+0x81c>)
|
|
80023a8: 681b ldr r3, [r3, #0]
|
|
80023aa: 2b00 cmp r3, #0
|
|
80023ac: d015 beq.n 80023da <my_code+0x7c6>
|
|
{
|
|
mode=3;
|
|
80023ae: 230f movs r3, #15
|
|
80023b0: 18fb adds r3, r7, r3
|
|
80023b2: 2203 movs r2, #3
|
|
80023b4: 701a strb r2, [r3, #0]
|
|
if(overload_mode==3)
|
|
80023b6: 230e movs r3, #14
|
|
80023b8: 18fb adds r3, r7, r3
|
|
80023ba: 781b ldrb r3, [r3, #0]
|
|
80023bc: 2b03 cmp r3, #3
|
|
80023be: d00c beq.n 80023da <my_code+0x7c6>
|
|
{
|
|
|
|
}else
|
|
{
|
|
countdown=countdown_set-countdown;
|
|
80023c0: 687a ldr r2, [r7, #4]
|
|
80023c2: 68bb ldr r3, [r7, #8]
|
|
80023c4: 1ad3 subs r3, r2, r3
|
|
80023c6: 60bb str r3, [r7, #8]
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
80023c8: e007 b.n 80023da <my_code+0x7c6>
|
|
break;
|
|
80023ca: 46c0 nop ; (mov r8, r8)
|
|
80023cc: e006 b.n 80023dc <my_code+0x7c8>
|
|
break;
|
|
80023ce: 46c0 nop ; (mov r8, r8)
|
|
80023d0: e004 b.n 80023dc <my_code+0x7c8>
|
|
break;
|
|
80023d2: 46c0 nop ; (mov r8, r8)
|
|
80023d4: e002 b.n 80023dc <my_code+0x7c8>
|
|
break;
|
|
80023d6: 46c0 nop ; (mov r8, r8)
|
|
80023d8: e000 b.n 80023dc <my_code+0x7c8>
|
|
break;
|
|
80023da: 46c0 nop ; (mov r8, r8)
|
|
}
|
|
|
|
|
|
|
|
GEI_BUTTON_CODE(&key1,dis_buff.button_flag[0]);
|
|
80023dc: 4b11 ldr r3, [pc, #68] ; (8002424 <my_code+0x810>)
|
|
80023de: 791a ldrb r2, [r3, #4]
|
|
80023e0: 4b14 ldr r3, [pc, #80] ; (8002434 <my_code+0x820>)
|
|
80023e2: 0011 movs r1, r2
|
|
80023e4: 0018 movs r0, r3
|
|
80023e6: f7ff f855 bl 8001494 <GEI_BUTTON_CODE>
|
|
GEI_BUTTON_CODE(&key2,dis_buff.button_flag[1]);
|
|
80023ea: 4b0e ldr r3, [pc, #56] ; (8002424 <my_code+0x810>)
|
|
80023ec: 795a ldrb r2, [r3, #5]
|
|
80023ee: 4b0f ldr r3, [pc, #60] ; (800242c <my_code+0x818>)
|
|
80023f0: 0011 movs r1, r2
|
|
80023f2: 0018 movs r0, r3
|
|
80023f4: f7ff f84e bl 8001494 <GEI_BUTTON_CODE>
|
|
GEI_BUTTON_CODE(&key3,dis_buff.button_flag[2]);
|
|
80023f8: 4b0a ldr r3, [pc, #40] ; (8002424 <my_code+0x810>)
|
|
80023fa: 799a ldrb r2, [r3, #6]
|
|
80023fc: 4b0c ldr r3, [pc, #48] ; (8002430 <my_code+0x81c>)
|
|
80023fe: 0011 movs r1, r2
|
|
8002400: 0018 movs r0, r3
|
|
8002402: f7ff f847 bl 8001494 <GEI_BUTTON_CODE>
|
|
GEI_BUTTON_CODE(&key4,dis_buff.button_flag[3]);
|
|
8002406: 4b07 ldr r3, [pc, #28] ; (8002424 <my_code+0x810>)
|
|
8002408: 79da ldrb r2, [r3, #7]
|
|
800240a: 4b07 ldr r3, [pc, #28] ; (8002428 <my_code+0x814>)
|
|
800240c: 0011 movs r1, r2
|
|
800240e: 0018 movs r0, r3
|
|
8002410: f7ff f840 bl 8001494 <GEI_BUTTON_CODE>
|
|
display_and_button_loop();
|
|
8002414: f7ff f9f0 bl 80017f8 <display_and_button_loop>
|
|
hc2_sever();
|
|
8002418: f7ff fac8 bl 80019ac <hc2_sever>
|
|
moto_server();
|
|
800241c: f7ff fb18 bl 8001a50 <moto_server>
|
|
switch(mode)
|
|
8002420: e450 b.n 8001cc4 <my_code+0xb0>
|
|
8002422: 46c0 nop ; (mov r8, r8)
|
|
8002424: 2000003c .word 0x2000003c
|
|
8002428: 2000002c .word 0x2000002c
|
|
800242c: 20000078 .word 0x20000078
|
|
8002430: 20000068 .word 0x20000068
|
|
8002434: 20000048 .word 0x20000048
|
|
|
|
08002438 <__libc_init_array>:
|
|
8002438: b570 push {r4, r5, r6, lr}
|
|
800243a: 2600 movs r6, #0
|
|
800243c: 4d0c ldr r5, [pc, #48] ; (8002470 <__libc_init_array+0x38>)
|
|
800243e: 4c0d ldr r4, [pc, #52] ; (8002474 <__libc_init_array+0x3c>)
|
|
8002440: 1b64 subs r4, r4, r5
|
|
8002442: 10a4 asrs r4, r4, #2
|
|
8002444: 42a6 cmp r6, r4
|
|
8002446: d109 bne.n 800245c <__libc_init_array+0x24>
|
|
8002448: 2600 movs r6, #0
|
|
800244a: f000 f821 bl 8002490 <_init>
|
|
800244e: 4d0a ldr r5, [pc, #40] ; (8002478 <__libc_init_array+0x40>)
|
|
8002450: 4c0a ldr r4, [pc, #40] ; (800247c <__libc_init_array+0x44>)
|
|
8002452: 1b64 subs r4, r4, r5
|
|
8002454: 10a4 asrs r4, r4, #2
|
|
8002456: 42a6 cmp r6, r4
|
|
8002458: d105 bne.n 8002466 <__libc_init_array+0x2e>
|
|
800245a: bd70 pop {r4, r5, r6, pc}
|
|
800245c: 00b3 lsls r3, r6, #2
|
|
800245e: 58eb ldr r3, [r5, r3]
|
|
8002460: 4798 blx r3
|
|
8002462: 3601 adds r6, #1
|
|
8002464: e7ee b.n 8002444 <__libc_init_array+0xc>
|
|
8002466: 00b3 lsls r3, r6, #2
|
|
8002468: 58eb ldr r3, [r5, r3]
|
|
800246a: 4798 blx r3
|
|
800246c: 3601 adds r6, #1
|
|
800246e: e7f2 b.n 8002456 <__libc_init_array+0x1e>
|
|
8002470: 08002504 .word 0x08002504
|
|
8002474: 08002504 .word 0x08002504
|
|
8002478: 08002504 .word 0x08002504
|
|
800247c: 08002508 .word 0x08002508
|
|
|
|
08002480 <memset>:
|
|
8002480: 0003 movs r3, r0
|
|
8002482: 1882 adds r2, r0, r2
|
|
8002484: 4293 cmp r3, r2
|
|
8002486: d100 bne.n 800248a <memset+0xa>
|
|
8002488: 4770 bx lr
|
|
800248a: 7019 strb r1, [r3, #0]
|
|
800248c: 3301 adds r3, #1
|
|
800248e: e7f9 b.n 8002484 <memset+0x4>
|
|
|
|
08002490 <_init>:
|
|
8002490: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
8002492: 46c0 nop ; (mov r8, r8)
|
|
8002494: bcf8 pop {r3, r4, r5, r6, r7}
|
|
8002496: bc08 pop {r3}
|
|
8002498: 469e mov lr, r3
|
|
800249a: 4770 bx lr
|
|
|
|
0800249c <_fini>:
|
|
800249c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800249e: 46c0 nop ; (mov r8, r8)
|
|
80024a0: bcf8 pop {r3, r4, r5, r6, r7}
|
|
80024a2: bc08 pop {r3}
|
|
80024a4: 469e mov lr, r3
|
|
80024a6: 4770 bx lr
|