diff --git a/103ze/.cproject b/103ze/.cproject
index 358324e..f882f6b 100644
--- a/103ze/.cproject
+++ b/103ze/.cproject
@@ -43,7 +43,7 @@
-
+
@@ -84,6 +84,14 @@
+
+
+
+
+
+
+
+
@@ -137,8 +145,14 @@
+
+
+
+
+
+
@@ -183,23 +197,23 @@
-
+
-
+
-
+
-
+
-
+
-
+
-
+
@@ -207,11 +221,11 @@
-
+
-
+
-
-
@@ -239,15 +259,15 @@
-
+
-
+
-
+
@@ -283,8 +303,14 @@
+
+
+
+
+
+
@@ -328,5 +354,7 @@
+
+
diff --git a/103ze/.mxproject b/103ze/.mxproject
index 4e93c5c..bf176eb 100644
--- a/103ze/.mxproject
+++ b/103ze/.mxproject
@@ -1,25 +1,34 @@
[PreviousLibFiles]
-LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
+LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Middlewares/Third_Party/FatFs/src/diskio.h;Middlewares/Third_Party/FatFs/src/ff.h;Middlewares/Third_Party/FatFs/src/ff_gen_drv.h;Middlewares/Third_Party/FatFs/src/integer.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Middlewares/Third_Party/FatFs/src/diskio.c;Middlewares/Third_Party/FatFs/src/ff.c;Middlewares/Third_Party/FatFs/src/ff_gen_drv.c;Middlewares/Third_Party/FatFs/src/option/syscall.c;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Middlewares/Third_Party/FatFs/src/diskio.h;Middlewares/Third_Party/FatFs/src/ff.h;Middlewares/Third_Party/FatFs/src/ff_gen_drv.h;Middlewares/Third_Party/FatFs/src/integer.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
[PreviousUsedCubeIDEFiles]
-SourceFiles=Core\Src\main.c;Core\Src\stm32f1xx_it.c;Core\Src\stm32f1xx_hal_msp.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Core\Src/system_stm32f1xx.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Core\Src/system_stm32f1xx.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;;
-HeaderPath=Drivers\STM32F1xx_HAL_Driver\Inc;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32F1xx\Include;Drivers\CMSIS\Include;Core\Inc;
+SourceFiles=Core\Src\main.c;FATFS\Target\user_diskio.c;FATFS\App\fatfs.c;Core\Src\stm32f1xx_it.c;Core\Src\stm32f1xx_hal_msp.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Middlewares/Third_Party/FatFs/src/diskio.c;Middlewares/Third_Party/FatFs/src/ff.c;Middlewares/Third_Party/FatFs/src/ff_gen_drv.c;Middlewares/Third_Party/FatFs/src/option/syscall.c;Core\Src/system_stm32f1xx.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Middlewares/Third_Party/FatFs/src/diskio.c;Middlewares/Third_Party/FatFs/src/ff.c;Middlewares/Third_Party/FatFs/src/ff_gen_drv.c;Middlewares/Third_Party/FatFs/src/option/syscall.c;Core\Src/system_stm32f1xx.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;;Middlewares/Third_Party/FatFs/src/diskio.c;Middlewares/Third_Party/FatFs/src/ff.c;Middlewares/Third_Party/FatFs/src/ff_gen_drv.c;Middlewares/Third_Party/FatFs/src/option/syscall.c;
+HeaderPath=Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;Drivers\STM32F1xx_HAL_Driver\Inc;Middlewares\Third_Party\FatFs\src;Drivers\CMSIS\Device\ST\STM32F1xx\Include;Drivers\CMSIS\Include;FATFS\Target;FATFS\App;Core\Inc;
CDefines=USE_HAL_DRIVER;STM32F103xE;USE_HAL_DRIVER;USE_HAL_DRIVER;
[PreviousGenFiles]
AdvancedFolderStructure=true
-HeaderFileListSize=3
-HeaderFiles#0=C:/Users/13370/Desktop/smartbooks/103ze/Core/Inc/stm32f1xx_it.h
-HeaderFiles#1=C:/Users/13370/Desktop/smartbooks/103ze/Core/Inc/stm32f1xx_hal_conf.h
-HeaderFiles#2=C:/Users/13370/Desktop/smartbooks/103ze/Core/Inc/main.h
-HeaderFolderListSize=1
-HeaderPath#0=C:/Users/13370/Desktop/smartbooks/103ze/Core/Inc
+HeaderFileListSize=6
+HeaderFiles#0=C:/Users/13370/Desktop/smartbooks/103ze/FATFS/Target/ffconf.h
+HeaderFiles#1=C:/Users/13370/Desktop/smartbooks/103ze/FATFS/Target/user_diskio.h
+HeaderFiles#2=C:/Users/13370/Desktop/smartbooks/103ze/FATFS/App/fatfs.h
+HeaderFiles#3=C:/Users/13370/Desktop/smartbooks/103ze/Core/Inc/stm32f1xx_it.h
+HeaderFiles#4=C:/Users/13370/Desktop/smartbooks/103ze/Core/Inc/stm32f1xx_hal_conf.h
+HeaderFiles#5=C:/Users/13370/Desktop/smartbooks/103ze/Core/Inc/main.h
+HeaderFolderListSize=3
+HeaderPath#0=C:/Users/13370/Desktop/smartbooks/103ze/FATFS/Target
+HeaderPath#1=C:/Users/13370/Desktop/smartbooks/103ze/FATFS/App
+HeaderPath#2=C:/Users/13370/Desktop/smartbooks/103ze/Core/Inc
HeaderFiles=;
-SourceFileListSize=3
-SourceFiles#0=C:/Users/13370/Desktop/smartbooks/103ze/Core/Src/stm32f1xx_it.c
-SourceFiles#1=C:/Users/13370/Desktop/smartbooks/103ze/Core/Src/stm32f1xx_hal_msp.c
-SourceFiles#2=C:/Users/13370/Desktop/smartbooks/103ze/Core/Src/main.c
-SourceFolderListSize=1
-SourcePath#0=C:/Users/13370/Desktop/smartbooks/103ze/Core/Src
+SourceFileListSize=5
+SourceFiles#0=C:/Users/13370/Desktop/smartbooks/103ze/FATFS/Target/user_diskio.c
+SourceFiles#1=C:/Users/13370/Desktop/smartbooks/103ze/FATFS/App/fatfs.c
+SourceFiles#2=C:/Users/13370/Desktop/smartbooks/103ze/Core/Src/stm32f1xx_it.c
+SourceFiles#3=C:/Users/13370/Desktop/smartbooks/103ze/Core/Src/stm32f1xx_hal_msp.c
+SourceFiles#4=C:/Users/13370/Desktop/smartbooks/103ze/Core/Src/main.c
+SourceFolderListSize=3
+SourcePath#0=C:/Users/13370/Desktop/smartbooks/103ze/FATFS/Target
+SourcePath#1=C:/Users/13370/Desktop/smartbooks/103ze/FATFS/App
+SourcePath#2=C:/Users/13370/Desktop/smartbooks/103ze/Core/Src
SourceFiles=;
diff --git a/103ze/.settings/language.settings.xml b/103ze/.settings/language.settings.xml
index b3ae9f6..87ef363 100644
--- a/103ze/.settings/language.settings.xml
+++ b/103ze/.settings/language.settings.xml
@@ -13,7 +13,7 @@
-
+
@@ -37,7 +37,7 @@
-
+
diff --git a/103ze/.settings/org.eclipse.core.resources.prefs b/103ze/.settings/org.eclipse.core.resources.prefs
new file mode 100644
index 0000000..9f0c098
--- /dev/null
+++ b/103ze/.settings/org.eclipse.core.resources.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+encoding/=GB2312
diff --git a/103ze/.settings/stm32cubeide.project.prefs b/103ze/.settings/stm32cubeide.project.prefs
index 224180f..ce30672 100644
--- a/103ze/.settings/stm32cubeide.project.prefs
+++ b/103ze/.settings/stm32cubeide.project.prefs
@@ -1,4 +1,4 @@
-66BE74F758C12D739921AEA421D593D3=1
-8DF89ED150041C4CBC7CB9A9CAA90856=CC76C33494A966CD096CE20D27AFD561
-DC22A860405A8BF2F2C095E5B6529F12=CC76C33494A966CD096CE20D27AFD561
+66BE74F758C12D739921AEA421D593D3=3
+8DF89ED150041C4CBC7CB9A9CAA90856=C51B2B4ECCDABDF7BBEE78EFB628823D
+DC22A860405A8BF2F2C095E5B6529F12=C51B2B4ECCDABDF7BBEE78EFB628823D
eclipse.preferences.version=1
diff --git a/103ze/103ze_code Debug.launch b/103ze/103ze_code Debug.launch
new file mode 100644
index 0000000..598fddf
--- /dev/null
+++ b/103ze/103ze_code Debug.launch
@@ -0,0 +1,72 @@
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diff --git a/103ze/103ze_code.ioc b/103ze/103ze_code.ioc
index 133df77..776d7a4 100644
--- a/103ze/103ze_code.ioc
+++ b/103ze/103ze_code.ioc
@@ -1,99 +1,219 @@
#MicroXplorer Configuration settings - do not modify
Mcu.Family=STM32F1
-RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
ProjectManager.MainLocation=Core/Src
+FSMC.AddressSetupTime1=0
RCC.MCOFreq_Value=72000000
-ProjectManager.ProjectFileName=103ze_code.ioc
+SH.FSMC_D1_DA1.0=FSMC_D1,16b-d1
ProjectManager.KeepUserCode=true
Mcu.UserName=STM32F103ZETx
-Mcu.PinsNb=5
-ProjectManager.NoMain=false
+SPI2.VirtualType=VM_MASTER
RCC.PLLCLKFreq_Value=72000000
-ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false
+SH.FSMC_NWE.0=FSMC_NWE,Lcd1
+PG0.Signal=FSMC_A10
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_FSMC_Init-FSMC-false-HAL-true,4-MX_SPI2_Init-SPI2-false-HAL-true,5-MX_FATFS_Init-FATFS-false-HAL-false
+SH.FSMC_D0_DA0.0=FSMC_D0,16b-d1
+PD2.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
RCC.ADCFreqValue=36000000
-ProjectManager.DefaultFWLocation=true
-ProjectManager.DeletePrevious=true
-RCC.APB1CLKDivider=RCC_HCLK_DIV2
+PB0.GPIO_Label=LCD_BL
+PD2.Locked=true
+PD2.GPIOParameters=GPIO_Speed,GPIO_Label
+PB13.Signal=SPI2_SCK
+PB15.Signal=SPI2_MOSI
PinOutPanel.RotationAngle=0
-RCC.FamilyName=M
-RCC.I2S3Freq_Value=72000000
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
-ProjectManager.StackSize=0x400
-PA13.Signal=SYS_JTMS-SWDIO
+ProjectManager.StackSize=0x800
+Mcu.IP4=SPI2
RCC.FCLKCortexFreq_Value=72000000
-Mcu.IP2=SYS
+Mcu.IP5=SYS
+Mcu.IP2=NVIC
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+Mcu.IP3=RCC
RCC.SDIOHCLKDiv2FreqValue=36000000
-Mcu.IP0=NVIC
-Mcu.IP1=RCC
+Mcu.IP0=FATFS
+Mcu.IP1=FSMC
Mcu.UserConstants=
-ProjectManager.TargetToolchain=STM32CubeIDE
Mcu.ThirdPartyNb=0
RCC.SDIOFreq_Value=72000000
RCC.HCLKFreq_Value=72000000
-Mcu.IPNb=3
+Mcu.IPNb=6
ProjectManager.PreviousToolchain=
+PD4.Signal=FSMC_NOE
RCC.APB2TimFreq_Value=72000000
-ProjectManager.RegisterCallBack=
-OSC_IN.Signal=RCC_OSC_IN
-RCC.USBFreq_Value=72000000
+Mcu.Pin6=PE9
+PD0.Signal=FSMC_D2_DA2
+PD8.Signal=FSMC_D13_DA13
+Mcu.Pin7=PE10
+Mcu.Pin8=PE11
OSC_OUT.Mode=HSE-External-Oscillator
+Mcu.Pin9=PE12
+SH.FSMC_A10.0=FSMC_A10,A10_1
OSC_OUT.Signal=RCC_OSC_OUT
RCC.AHBFreq_Value=72000000
Mcu.Pin0=OSC_IN
Mcu.Pin1=OSC_OUT
-Mcu.Pin2=PA13
-Mcu.Pin3=PA14
-Mcu.Pin4=VP_SYS_VS_Systick
+GPIO.groupedBy=Group By Peripherals
+Mcu.Pin2=PB0
+Mcu.Pin3=PG0
+SH.FSMC_D4_DA4.ConfNb=1
+SH.FSMC_D12_DA12.ConfNb=1
+Mcu.Pin4=PE7
+Mcu.Pin5=PE8
ProjectManager.ProjectBuild=false
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
-board=custom
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
-ProjectManager.LastFirmware=true
+SH.FSMC_D6_DA6.ConfNb=1
RCC.PLLMUL=RCC_PLL_MUL9
-RCC.VCOOutput2Freq_Value=8000000
+PB12.GPIO_Label=FLASH_E
ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.8.3
MxDb.Version=DB.6.0.20
-RCC.APB2Freq_Value=72000000
+PB0.GPIOParameters=GPIO_Label
+SH.FSMC_NOE.ConfNb=1
+PE13.Signal=FSMC_D10_DA10
ProjectManager.BackupPrevious=false
-MxCube.Version=6.2.0
+SH.FSMC_D14_DA14.0=FSMC_D14,16b-d1
+SH.FSMC_D10_DA10.0=FSMC_D10,16b-d1
+PE9.Signal=FSMC_D6_DA6
PA14.Mode=Serial_Wire
+PB14.Mode=Full_Duplex_Master
+SH.FSMC_D6_DA6.0=FSMC_D6,16b-d1
File.Version=6
-VP_SYS_VS_Systick.Mode=SysTick
-NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+SPI2.CalculateBaudRate=18.0 MBits/s
+SH.FSMC_D9_DA9.ConfNb=1
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+PE10.Signal=FSMC_D7_DA7
+SH.FSMC_D5_DA5.0=FSMC_D5,16b-d1
+ProjectManager.HalAssertFull=false
+PB0.Locked=true
+ProjectManager.ProjectName=103ze_code
+SH.FSMC_D4_DA4.0=FSMC_D4,16b-d1
+RCC.PLLMCOFreq_Value=36000000
+Mcu.Package=LQFP144
+SPI2.Mode=SPI_MODE_MASTER
+SH.FSMC_D15_DA15.ConfNb=1
+VP_FATFS_VS_Generic.Signal=FATFS_VS_Generic
+RCC.I2S2Freq_Value=72000000
+FSMC.IPParameters=AddressSetupTime1,DataSetupTime1
+ProjectManager.ToolChainLocation=
+SH.FSMC_D13_DA13.0=FSMC_D13,16b-d1
+SH.FSMC_D14_DA14.ConfNb=1
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+SH.FSMC_D3_DA3.0=FSMC_D3,16b-d1
+RCC.APB1TimFreq_Value=72000000
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+SH.FSMC_D2_DA2.0=FSMC_D2,16b-d1
+SH.FSMC_NWE.ConfNb=1
+SPI2.Direction=SPI_DIRECTION_2LINES
+PB13.Mode=Full_Duplex_Master
+PE7.Signal=FSMC_D4_DA4
+SH.FSMC_D7_DA7.ConfNb=1
+PD15.Signal=FSMC_D1_DA1
+ProjectManager.CustomerFirmwarePackage=
+PG12.Signal=FSMC_NE4
+RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
+ProjectManager.ProjectFileName=103ze_code.ioc
+SH.FSMC_D12_DA12.0=FSMC_D12,16b-d1
+Mcu.PinsNb=32
+ProjectManager.NoMain=false
+SH.FSMC_D8_DA8.ConfNb=1
+PD1.Signal=FSMC_D3_DA3
+ProjectManager.DefaultFWLocation=true
+SH.FSMC_D9_DA9.0=FSMC_D9,16b-d1
+PD9.Signal=FSMC_D14_DA14
+PD5.Signal=FSMC_NWE
+SH.FSMC_D11_DA11.ConfNb=1
+PB12.Locked=true
+ProjectManager.DeletePrevious=true
+RCC.APB1CLKDivider=RCC_HCLK_DIV2
+RCC.FamilyName=M
+RCC.I2S3Freq_Value=72000000
+SH.FSMC_D8_DA8.0=FSMC_D8,16b-d1
+PD10.Signal=FSMC_D15_DA15
+PA13.Signal=SYS_JTMS-SWDIO
+SH.FSMC_D13_DA13.ConfNb=1
+ProjectManager.TargetToolchain=STM32CubeIDE
+FSMC.DataSetupTime1=1
+SH.FSMC_D5_DA5.ConfNb=1
+SH.FSMC_A10.ConfNb=1
+SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
+ProjectManager.RegisterCallBack=
+OSC_IN.Signal=RCC_OSC_IN
+RCC.USBFreq_Value=72000000
+PE11.Signal=FSMC_D8_DA8
+PB12.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
+VP_FATFS_VS_Generic.Mode=User_defined
+PB14.Signal=SPI2_MISO
+SH.FSMC_D7_DA7.0=FSMC_D7,16b-d1
+board=custom
+PG12.Mode=NorPsramChipSelect4_1
+SH.FSMC_D0_DA0.ConfNb=1
+ProjectManager.LastFirmware=true
+PB15.Mode=Full_Duplex_Master
+SH.FSMC_D3_DA3.ConfNb=1
+RCC.VCOOutput2Freq_Value=8000000
+RCC.APB2Freq_Value=72000000
+PE14.Signal=FSMC_D11_DA11
+PE15.Signal=FSMC_D12_DA12
+MxCube.Version=6.2.0
+PE8.Signal=FSMC_D5_DA5
+Mcu.Pin30=VP_FATFS_VS_Generic
+VP_SYS_VS_Systick.Mode=SysTick
+Mcu.Pin31=VP_SYS_VS_Systick
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
PA13.Mode=Serial_Wire
ProjectManager.FreePins=false
RCC.IPParameters=ADCFreqValue,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FSMCFreq_Value,FamilyName,HCLKFreq_Value,I2S2Freq_Value,I2S3Freq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,PLLSourceVirtual,SDIOFreq_Value,SDIOHCLKDiv2FreqValue,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value,VCOOutput2Freq_Value
ProjectManager.AskForMigrate=true
Mcu.Name=STM32F103Z(C-D-E)Tx
-ProjectManager.HalAssertFull=false
-ProjectManager.ProjectName=103ze_code
+PE12.Signal=FSMC_D9_DA9
+Mcu.Pin26=PD2
+Mcu.Pin27=PD4
+Mcu.Pin24=PD0
ProjectManager.UnderRoot=true
-RCC.PLLMCOFreq_Value=36000000
+Mcu.Pin25=PD1
+PD14.Signal=FSMC_D0_DA0
+Mcu.Pin28=PD5
RCC.FSMCFreq_Value=72000000
+Mcu.Pin29=PG12
ProjectManager.CoupleFile=false
RCC.SYSCLKFreq_VALUE=72000000
-Mcu.Package=LQFP144
+Mcu.Pin22=PA13
+Mcu.Pin23=PA14
RCC.TimSysFreq_Value=72000000
-RCC.I2S2Freq_Value=72000000
+Mcu.Pin20=PD14
+Mcu.Pin21=PD15
NVIC.ForceEnableDMAVector=true
KeepUserPlacement=false
OSC_IN.Mode=HSE-External-Oscillator
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
ProjectManager.CompilerOptimize=6
-ProjectManager.ToolChainLocation=
-VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+SH.FSMC_D15_DA15.0=FSMC_D15,16b-d1
PA14.Signal=SYS_JTCK-SWCLK
-ProjectManager.HeapSize=0x200
+ProjectManager.HeapSize=0x800
+Mcu.Pin15=PB14
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+Mcu.Pin16=PB15
+SH.FSMC_D11_DA11.0=FSMC_D11,16b-d1
+Mcu.Pin13=PB12
+Mcu.Pin14=PB13
+Mcu.Pin19=PD10
+SH.FSMC_NOE.0=FSMC_NOE,Lcd1
ProjectManager.ComputerToolchain=false
+Mcu.Pin17=PD8
+SH.FSMC_D2_DA2.ConfNb=1
+Mcu.Pin18=PD9
+SH.FSMC_D1_DA1.ConfNb=1
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
-RCC.APB1TimFreq_Value=72000000
-NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+Mcu.Pin11=PE14
+Mcu.Pin12=PE15
+Mcu.Pin10=PE13
+PD2.Signal=GPIO_Output
RCC.APB1Freq_Value=36000000
-ProjectManager.CustomerFirmwarePackage=
+PB0.Signal=GPIO_Output
ProjectManager.DeviceId=STM32F103ZETx
+PB12.GPIOParameters=GPIO_Speed,GPIO_Label
+PB12.Signal=GPIO_Output
+PD2.GPIO_Label=SD_E
ProjectManager.LibraryCopy=1
+SH.FSMC_D10_DA10.ConfNb=1
isbadioc=false
diff --git a/103ze/Core/Inc/main.h b/103ze/Core/Inc/main.h
index 13d1cee..949eb16 100644
--- a/103ze/Core/Inc/main.h
+++ b/103ze/Core/Inc/main.h
@@ -58,6 +58,12 @@ void Error_Handler(void);
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
+#define LCD_BL_Pin GPIO_PIN_0
+#define LCD_BL_GPIO_Port GPIOB
+#define FLASH_E_Pin GPIO_PIN_12
+#define FLASH_E_GPIO_Port GPIOB
+#define SD_E_Pin GPIO_PIN_2
+#define SD_E_GPIO_Port GPIOD
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
diff --git a/103ze/Core/Inc/stm32f1xx_hal_conf.h b/103ze/Core/Inc/stm32f1xx_hal_conf.h
index 452125b..689a492 100644
--- a/103ze/Core/Inc/stm32f1xx_hal_conf.h
+++ b/103ze/Core/Inc/stm32f1xx_hal_conf.h
@@ -61,8 +61,8 @@
/*#define HAL_MMC_MODULE_ENABLED */
/*#define HAL_SDRAM_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
-/*#define HAL_SPI_MODULE_ENABLED */
-/*#define HAL_SRAM_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_SRAM_MODULE_ENABLED
/*#define HAL_TIM_MODULE_ENABLED */
/*#define HAL_UART_MODULE_ENABLED */
/*#define HAL_USART_MODULE_ENABLED */
diff --git a/103ze/Core/Src/main.c b/103ze/Core/Src/main.c
index 7fee498..835e581 100644
--- a/103ze/Core/Src/main.c
+++ b/103ze/Core/Src/main.c
@@ -19,10 +19,11 @@
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
+#include "fatfs.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
-
+#include "c.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
@@ -40,6 +41,9 @@
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
+SPI_HandleTypeDef hspi2;
+
+SRAM_HandleTypeDef hsram1;
/* USER CODE BEGIN PV */
@@ -48,6 +52,8 @@
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
+static void MX_FSMC_Init(void);
+static void MX_SPI2_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@@ -85,7 +91,11 @@ int main(void)
/* Initialize all configured peripherals */
MX_GPIO_Init();
+ MX_FSMC_Init();
+ MX_SPI2_Init();
+ MX_FATFS_Init();
/* USER CODE BEGIN 2 */
+ my_main();
/* USER CODE END 2 */
@@ -138,6 +148,44 @@ void SystemClock_Config(void)
}
}
+/**
+ * @brief SPI2 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_SPI2_Init(void)
+{
+
+ /* USER CODE BEGIN SPI2_Init 0 */
+
+ /* USER CODE END SPI2_Init 0 */
+
+ /* USER CODE BEGIN SPI2_Init 1 */
+
+ /* USER CODE END SPI2_Init 1 */
+ /* SPI2 parameter configuration*/
+ hspi2.Instance = SPI2;
+ hspi2.Init.Mode = SPI_MODE_MASTER;
+ hspi2.Init.Direction = SPI_DIRECTION_2LINES;
+ hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
+ hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
+ hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
+ hspi2.Init.NSS = SPI_NSS_SOFT;
+ hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
+ hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
+ hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
+ hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+ hspi2.Init.CRCPolynomial = 10;
+ if (HAL_SPI_Init(&hspi2) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN SPI2_Init 2 */
+
+ /* USER CODE END SPI2_Init 2 */
+
+}
+
/**
* @brief GPIO Initialization Function
* @param None
@@ -145,10 +193,99 @@ void SystemClock_Config(void)
*/
static void MX_GPIO_Init(void)
{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ __HAL_RCC_GPIOG_CLK_ENABLE();
+ __HAL_RCC_GPIOE_CLK_ENABLE();
+ __HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOB, LCD_BL_Pin|FLASH_E_Pin, GPIO_PIN_RESET);
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(SD_E_GPIO_Port, SD_E_Pin, GPIO_PIN_RESET);
+
+ /*Configure GPIO pin : LCD_BL_Pin */
+ GPIO_InitStruct.Pin = LCD_BL_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(LCD_BL_GPIO_Port, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : FLASH_E_Pin */
+ GPIO_InitStruct.Pin = FLASH_E_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ HAL_GPIO_Init(FLASH_E_GPIO_Port, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : SD_E_Pin */
+ GPIO_InitStruct.Pin = SD_E_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ HAL_GPIO_Init(SD_E_GPIO_Port, &GPIO_InitStruct);
+
+}
+
+/* FSMC initialization function */
+static void MX_FSMC_Init(void)
+{
+
+ /* USER CODE BEGIN FSMC_Init 0 */
+
+ /* USER CODE END FSMC_Init 0 */
+
+ FSMC_NORSRAM_TimingTypeDef Timing = {0};
+
+ /* USER CODE BEGIN FSMC_Init 1 */
+
+ /* USER CODE END FSMC_Init 1 */
+
+ /** Perform the SRAM1 memory initialization sequence
+ */
+ hsram1.Instance = FSMC_NORSRAM_DEVICE;
+ hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
+ /* hsram1.Init */
+ hsram1.Init.NSBank = FSMC_NORSRAM_BANK4;
+ hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
+ hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
+ hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
+ hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
+ hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
+ hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
+ hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
+ hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
+ hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
+ hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
+ hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
+ hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
+ /* Timing */
+ Timing.AddressSetupTime = 0;
+ Timing.AddressHoldTime = 15;
+ Timing.DataSetupTime = 1;
+ Timing.BusTurnAroundDuration = 15;
+ Timing.CLKDivision = 16;
+ Timing.DataLatency = 17;
+ Timing.AccessMode = FSMC_ACCESS_MODE_A;
+ /* ExtTiming */
+
+ if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
+ {
+ Error_Handler( );
+ }
+
+ /** Disconnect NADV
+ */
+
+ __HAL_AFIO_FSMCNADV_DISCONNECTED();
+
+ /* USER CODE BEGIN FSMC_Init 2 */
+
+ /* USER CODE END FSMC_Init 2 */
}
/* USER CODE BEGIN 4 */
diff --git a/103ze/Core/Src/stm32f1xx_hal_msp.c b/103ze/Core/Src/stm32f1xx_hal_msp.c
index add2195..2d9a191 100644
--- a/103ze/Core/Src/stm32f1xx_hal_msp.c
+++ b/103ze/Core/Src/stm32f1xx_hal_msp.c
@@ -81,6 +81,207 @@ void HAL_MspInit(void)
/* USER CODE END MspInit 1 */
}
+/**
+* @brief SPI MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hspi: SPI handle pointer
+* @retval None
+*/
+void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ if(hspi->Instance==SPI2)
+ {
+ /* USER CODE BEGIN SPI2_MspInit 0 */
+
+ /* USER CODE END SPI2_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_SPI2_CLK_ENABLE();
+
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ /**SPI2 GPIO Configuration
+ PB13 ------> SPI2_SCK
+ PB14 ------> SPI2_MISO
+ PB15 ------> SPI2_MOSI
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ GPIO_InitStruct.Pin = GPIO_PIN_14;
+ GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN SPI2_MspInit 1 */
+
+ /* USER CODE END SPI2_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief SPI MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hspi: SPI handle pointer
+* @retval None
+*/
+void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
+{
+ if(hspi->Instance==SPI2)
+ {
+ /* USER CODE BEGIN SPI2_MspDeInit 0 */
+
+ /* USER CODE END SPI2_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_SPI2_CLK_DISABLE();
+
+ /**SPI2 GPIO Configuration
+ PB13 ------> SPI2_SCK
+ PB14 ------> SPI2_MISO
+ PB15 ------> SPI2_MOSI
+ */
+ HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
+
+ /* USER CODE BEGIN SPI2_MspDeInit 1 */
+
+ /* USER CODE END SPI2_MspDeInit 1 */
+ }
+
+}
+
+static uint32_t FSMC_Initialized = 0;
+
+static void HAL_FSMC_MspInit(void){
+ /* USER CODE BEGIN FSMC_MspInit 0 */
+
+ /* USER CODE END FSMC_MspInit 0 */
+ GPIO_InitTypeDef GPIO_InitStruct ={0};
+ if (FSMC_Initialized) {
+ return;
+ }
+ FSMC_Initialized = 1;
+
+ /* Peripheral clock enable */
+ __HAL_RCC_FSMC_CLK_ENABLE();
+
+ /** FSMC GPIO Configuration
+ PG0 ------> FSMC_A10
+ PE7 ------> FSMC_D4
+ PE8 ------> FSMC_D5
+ PE9 ------> FSMC_D6
+ PE10 ------> FSMC_D7
+ PE11 ------> FSMC_D8
+ PE12 ------> FSMC_D9
+ PE13 ------> FSMC_D10
+ PE14 ------> FSMC_D11
+ PE15 ------> FSMC_D12
+ PD8 ------> FSMC_D13
+ PD9 ------> FSMC_D14
+ PD10 ------> FSMC_D15
+ PD14 ------> FSMC_D0
+ PD15 ------> FSMC_D1
+ PD0 ------> FSMC_D2
+ PD1 ------> FSMC_D3
+ PD4 ------> FSMC_NOE
+ PD5 ------> FSMC_NWE
+ PG12 ------> FSMC_NE4
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_12;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+ GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
+ |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
+ |GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
+ |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4
+ |GPIO_PIN_5;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN FSMC_MspInit 1 */
+
+ /* USER CODE END FSMC_MspInit 1 */
+}
+
+void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){
+ /* USER CODE BEGIN SRAM_MspInit 0 */
+
+ /* USER CODE END SRAM_MspInit 0 */
+ HAL_FSMC_MspInit();
+ /* USER CODE BEGIN SRAM_MspInit 1 */
+
+ /* USER CODE END SRAM_MspInit 1 */
+}
+
+static uint32_t FSMC_DeInitialized = 0;
+
+static void HAL_FSMC_MspDeInit(void){
+ /* USER CODE BEGIN FSMC_MspDeInit 0 */
+
+ /* USER CODE END FSMC_MspDeInit 0 */
+ if (FSMC_DeInitialized) {
+ return;
+ }
+ FSMC_DeInitialized = 1;
+ /* Peripheral clock enable */
+ __HAL_RCC_FSMC_CLK_DISABLE();
+
+ /** FSMC GPIO Configuration
+ PG0 ------> FSMC_A10
+ PE7 ------> FSMC_D4
+ PE8 ------> FSMC_D5
+ PE9 ------> FSMC_D6
+ PE10 ------> FSMC_D7
+ PE11 ------> FSMC_D8
+ PE12 ------> FSMC_D9
+ PE13 ------> FSMC_D10
+ PE14 ------> FSMC_D11
+ PE15 ------> FSMC_D12
+ PD8 ------> FSMC_D13
+ PD9 ------> FSMC_D14
+ PD10 ------> FSMC_D15
+ PD14 ------> FSMC_D0
+ PD15 ------> FSMC_D1
+ PD0 ------> FSMC_D2
+ PD1 ------> FSMC_D3
+ PD4 ------> FSMC_NOE
+ PD5 ------> FSMC_NWE
+ PG12 ------> FSMC_NE4
+ */
+ HAL_GPIO_DeInit(GPIOG, GPIO_PIN_0|GPIO_PIN_12);
+
+ HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
+ |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
+ |GPIO_PIN_15);
+
+ HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
+ |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4
+ |GPIO_PIN_5);
+
+ /* USER CODE BEGIN FSMC_MspDeInit 1 */
+
+ /* USER CODE END FSMC_MspDeInit 1 */
+}
+
+void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef* hsram){
+ /* USER CODE BEGIN SRAM_MspDeInit 0 */
+
+ /* USER CODE END SRAM_MspDeInit 0 */
+ HAL_FSMC_MspDeInit();
+ /* USER CODE BEGIN SRAM_MspDeInit 1 */
+
+ /* USER CODE END SRAM_MspDeInit 1 */
+}
+
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
diff --git a/103ze/Debug/103ze_code.bin b/103ze/Debug/103ze_code.bin
index ff76bdf..0f14643 100644
Binary files a/103ze/Debug/103ze_code.bin and b/103ze/Debug/103ze_code.bin differ
diff --git a/103ze/Debug/103ze_code.elf b/103ze/Debug/103ze_code.elf
index 0f6460e..fac0123 100644
Binary files a/103ze/Debug/103ze_code.elf and b/103ze/Debug/103ze_code.elf differ
diff --git a/103ze/Debug/103ze_code.list b/103ze/Debug/103ze_code.list
index 768067b..2838b51 100644
--- a/103ze/Debug/103ze_code.list
+++ b/103ze/Debug/103ze_code.list
@@ -5,45 +5,45 @@ Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000001e4 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 1 .text 00000cec 080001e4 080001e4 000101e4 2**2
+ 1 .text 00003a80 080001e4 080001e4 000101e4 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
- 2 .rodata 00000020 08000ed0 08000ed0 00010ed0 2**2
+ 2 .rodata 00000a98 08003c64 08003c64 00013c64 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 3 .ARM.extab 00000000 08000ef0 08000ef0 0002000c 2**0
+ 3 .ARM.extab 00000000 080046fc 080046fc 00020024 2**0
CONTENTS
- 4 .ARM 00000000 08000ef0 08000ef0 0002000c 2**0
+ 4 .ARM 00000000 080046fc 080046fc 00020024 2**0
CONTENTS
- 5 .preinit_array 00000000 08000ef0 08000ef0 0002000c 2**0
+ 5 .preinit_array 00000000 080046fc 080046fc 00020024 2**0
CONTENTS, ALLOC, LOAD, DATA
- 6 .init_array 00000004 08000ef0 08000ef0 00010ef0 2**2
+ 6 .init_array 00000004 080046fc 080046fc 000146fc 2**2
CONTENTS, ALLOC, LOAD, DATA
- 7 .fini_array 00000004 08000ef4 08000ef4 00010ef4 2**2
+ 7 .fini_array 00000004 08004700 08004700 00014700 2**2
CONTENTS, ALLOC, LOAD, DATA
- 8 .data 0000000c 20000000 08000ef8 00020000 2**2
+ 8 .data 00000024 20000000 08004704 00020000 2**2
CONTENTS, ALLOC, LOAD, DATA
- 9 .bss 00000020 2000000c 08000f04 0002000c 2**2
+ 9 .bss 0000056c 20000024 08004728 00020024 2**2
ALLOC
- 10 ._user_heap_stack 00000604 2000002c 08000f04 0002002c 2**0
+ 10 ._user_heap_stack 00001000 20000590 08004728 00020590 2**0
ALLOC
- 11 .ARM.attributes 00000029 00000000 00000000 0002000c 2**0
+ 11 .ARM.attributes 00000029 00000000 00000000 00020024 2**0
CONTENTS, READONLY
- 12 .debug_info 000028a8 00000000 00000000 00020035 2**0
+ 12 .debug_info 0000bb02 00000000 00000000 0002004d 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 13 .debug_abbrev 00000c6a 00000000 00000000 000228dd 2**0
+ 13 .debug_abbrev 000026e2 00000000 00000000 0002bb4f 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_aranges 00000378 00000000 00000000 00023548 2**3
+ 14 .debug_aranges 000009c8 00000000 00000000 0002e238 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_ranges 00000300 00000000 00000000 000238c0 2**3
+ 15 .debug_ranges 00000890 00000000 00000000 0002ec00 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .debug_macro 00017679 00000000 00000000 00023bc0 2**0
+ 16 .debug_macro 0001a202 00000000 00000000 0002f490 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 17 .debug_line 00003bac 00000000 00000000 0003b239 2**0
+ 17 .debug_line 0000c6fc 00000000 00000000 00049692 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_str 0008957f 00000000 00000000 0003ede5 2**0
+ 18 .debug_str 00092d57 00000000 00000000 00055d8e 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .comment 00000053 00000000 00000000 000c8364 2**0
+ 19 .comment 00000053 00000000 00000000 000e8ae5 2**0
CONTENTS, READONLY
- 20 .debug_frame 00000be8 00000000 00000000 000c83b8 2**2
+ 20 .debug_frame 000024c8 00000000 00000000 000e8b38 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
@@ -60,9 +60,9 @@ Disassembly of section .text:
80001f6: 2301 movs r3, #1
80001f8: 7023 strb r3, [r4, #0]
80001fa: bd10 pop {r4, pc}
- 80001fc: 2000000c .word 0x2000000c
+ 80001fc: 20000024 .word 0x20000024
8000200: 00000000 .word 0x00000000
- 8000204: 08000eb8 .word 0x08000eb8
+ 8000204: 08003c4c .word 0x08003c4c
08000208 :
8000208: b508 push {r3, lr}
@@ -73,8 +73,8 @@ Disassembly of section .text:
8000212: f3af 8000 nop.w
8000216: bd08 pop {r3, pc}
8000218: 00000000 .word 0x00000000
- 800021c: 20000010 .word 0x20000010
- 8000220: 08000eb8 .word 0x08000eb8
+ 800021c: 20000028 .word 0x20000028
+ 8000220: 08003c4c .word 0x08003c4c
08000224 :
/**
@@ -91,2490 +91,10129 @@ int main(void)
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
- 8000228: f000 f8ec bl 8000404
+ 8000228: f000 faa8 bl 800077c
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
- 800022c: f000 f803 bl 8000236
+ 800022c: f000 f80b bl 8000246
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
- 8000230: f000 f846 bl 80002c0
+ 8000230: f000 f884 bl 800033c
+ MX_FSMC_Init();
+ 8000234: f000 f908 bl 8000448
+ MX_SPI2_Init();
+ 8000238: f000 f84a bl 80002d0
+ MX_FATFS_Init();
+ 800023c: f002 f838 bl 80022b0
+ /* USER CODE BEGIN 2 */
+ my_main();
+ 8000240: f002 f90a bl 8002458
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
- 8000234: e7fe b.n 8000234
+ 8000244: e7fe b.n 8000244
-08000236 :
+08000246 :
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
- 8000236: b580 push {r7, lr}
- 8000238: b090 sub sp, #64 ; 0x40
- 800023a: af00 add r7, sp, #0
+ 8000246: b580 push {r7, lr}
+ 8000248: b090 sub sp, #64 ; 0x40
+ 800024a: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 800023c: f107 0318 add.w r3, r7, #24
- 8000240: 2228 movs r2, #40 ; 0x28
- 8000242: 2100 movs r1, #0
- 8000244: 4618 mov r0, r3
- 8000246: f000 fe2f bl 8000ea8
+ 800024c: f107 0318 add.w r3, r7, #24
+ 8000250: 2228 movs r2, #40 ; 0x28
+ 8000252: 2100 movs r1, #0
+ 8000254: 4618 mov r0, r3
+ 8000256: f003 fcf1 bl 8003c3c
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 800024a: 1d3b adds r3, r7, #4
- 800024c: 2200 movs r2, #0
- 800024e: 601a str r2, [r3, #0]
- 8000250: 605a str r2, [r3, #4]
- 8000252: 609a str r2, [r3, #8]
- 8000254: 60da str r2, [r3, #12]
- 8000256: 611a str r2, [r3, #16]
+ 800025a: 1d3b adds r3, r7, #4
+ 800025c: 2200 movs r2, #0
+ 800025e: 601a str r2, [r3, #0]
+ 8000260: 605a str r2, [r3, #4]
+ 8000262: 609a str r2, [r3, #8]
+ 8000264: 60da str r2, [r3, #12]
+ 8000266: 611a str r2, [r3, #16]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
- 8000258: 2301 movs r3, #1
- 800025a: 61bb str r3, [r7, #24]
+ 8000268: 2301 movs r3, #1
+ 800026a: 61bb str r3, [r7, #24]
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- 800025c: f44f 3380 mov.w r3, #65536 ; 0x10000
- 8000260: 61fb str r3, [r7, #28]
+ 800026c: f44f 3380 mov.w r3, #65536 ; 0x10000
+ 8000270: 61fb str r3, [r7, #28]
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
- 8000262: 2300 movs r3, #0
- 8000264: 623b str r3, [r7, #32]
+ 8000272: 2300 movs r3, #0
+ 8000274: 623b str r3, [r7, #32]
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
- 8000266: 2301 movs r3, #1
- 8000268: 62bb str r3, [r7, #40] ; 0x28
+ 8000276: 2301 movs r3, #1
+ 8000278: 62bb str r3, [r7, #40] ; 0x28
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- 800026a: 2302 movs r3, #2
- 800026c: 637b str r3, [r7, #52] ; 0x34
+ 800027a: 2302 movs r3, #2
+ 800027c: 637b str r3, [r7, #52] ; 0x34
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- 800026e: f44f 3380 mov.w r3, #65536 ; 0x10000
- 8000272: 63bb str r3, [r7, #56] ; 0x38
+ 800027e: f44f 3380 mov.w r3, #65536 ; 0x10000
+ 8000282: 63bb str r3, [r7, #56] ; 0x38
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
- 8000274: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
- 8000278: 63fb str r3, [r7, #60] ; 0x3c
+ 8000284: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
+ 8000288: 63fb str r3, [r7, #60] ; 0x3c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 800027a: f107 0318 add.w r3, r7, #24
- 800027e: 4618 mov r0, r3
- 8000280: f000 fa06 bl 8000690
- 8000284: 4603 mov r3, r0
- 8000286: 2b00 cmp r3, #0
- 8000288: d001 beq.n 800028e
+ 800028a: f107 0318 add.w r3, r7, #24
+ 800028e: 4618 mov r0, r3
+ 8000290: f000 fd8a bl 8000da8
+ 8000294: 4603 mov r3, r0
+ 8000296: 2b00 cmp r3, #0
+ 8000298: d001 beq.n 800029e
{
Error_Handler();
- 800028a: f000 f82f bl 80002ec
+ 800029a: f000 f939 bl 8000510
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- 800028e: 230f movs r3, #15
- 8000290: 607b str r3, [r7, #4]
+ 800029e: 230f movs r3, #15
+ 80002a0: 607b str r3, [r7, #4]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- 8000292: 2302 movs r3, #2
- 8000294: 60bb str r3, [r7, #8]
+ 80002a2: 2302 movs r3, #2
+ 80002a4: 60bb str r3, [r7, #8]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 8000296: 2300 movs r3, #0
- 8000298: 60fb str r3, [r7, #12]
+ 80002a6: 2300 movs r3, #0
+ 80002a8: 60fb str r3, [r7, #12]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
- 800029a: f44f 6380 mov.w r3, #1024 ; 0x400
- 800029e: 613b str r3, [r7, #16]
+ 80002aa: f44f 6380 mov.w r3, #1024 ; 0x400
+ 80002ae: 613b str r3, [r7, #16]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
- 80002a0: 2300 movs r3, #0
- 80002a2: 617b str r3, [r7, #20]
+ 80002b0: 2300 movs r3, #0
+ 80002b2: 617b str r3, [r7, #20]
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
- 80002a4: 1d3b adds r3, r7, #4
- 80002a6: 2102 movs r1, #2
- 80002a8: 4618 mov r0, r3
- 80002aa: f000 fc71 bl 8000b90
- 80002ae: 4603 mov r3, r0
- 80002b0: 2b00 cmp r3, #0
- 80002b2: d001 beq.n 80002b8
+ 80002b4: 1d3b adds r3, r7, #4
+ 80002b6: 2102 movs r1, #2
+ 80002b8: 4618 mov r0, r3
+ 80002ba: f000 fff5 bl 80012a8
+ 80002be: 4603 mov r3, r0
+ 80002c0: 2b00 cmp r3, #0
+ 80002c2: d001 beq.n 80002c8
{
Error_Handler();
- 80002b4: f000 f81a bl 80002ec
+ 80002c4: f000 f924 bl 8000510
}
}
- 80002b8: bf00 nop
- 80002ba: 3740 adds r7, #64 ; 0x40
- 80002bc: 46bd mov sp, r7
- 80002be: bd80 pop {r7, pc}
+ 80002c8: bf00 nop
+ 80002ca: 3740 adds r7, #64 ; 0x40
+ 80002cc: 46bd mov sp, r7
+ 80002ce: bd80 pop {r7, pc}
-080002c0 :
+080002d0 :
+ * @brief SPI2 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_SPI2_Init(void)
+{
+ 80002d0: b580 push {r7, lr}
+ 80002d2: af00 add r7, sp, #0
+
+ /* USER CODE BEGIN SPI2_Init 1 */
+
+ /* USER CODE END SPI2_Init 1 */
+ /* SPI2 parameter configuration*/
+ hspi2.Instance = SPI2;
+ 80002d4: 4b17 ldr r3, [pc, #92] ; (8000334 )
+ 80002d6: 4a18 ldr r2, [pc, #96] ; (8000338 )
+ 80002d8: 601a str r2, [r3, #0]
+ hspi2.Init.Mode = SPI_MODE_MASTER;
+ 80002da: 4b16 ldr r3, [pc, #88] ; (8000334 )
+ 80002dc: f44f 7282 mov.w r2, #260 ; 0x104
+ 80002e0: 605a str r2, [r3, #4]
+ hspi2.Init.Direction = SPI_DIRECTION_2LINES;
+ 80002e2: 4b14 ldr r3, [pc, #80] ; (8000334 )
+ 80002e4: 2200 movs r2, #0
+ 80002e6: 609a str r2, [r3, #8]
+ hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
+ 80002e8: 4b12 ldr r3, [pc, #72] ; (8000334 )
+ 80002ea: 2200 movs r2, #0
+ 80002ec: 60da str r2, [r3, #12]
+ hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
+ 80002ee: 4b11 ldr r3, [pc, #68] ; (8000334 )
+ 80002f0: 2200 movs r2, #0
+ 80002f2: 611a str r2, [r3, #16]
+ hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
+ 80002f4: 4b0f ldr r3, [pc, #60] ; (8000334 )
+ 80002f6: 2200 movs r2, #0
+ 80002f8: 615a str r2, [r3, #20]
+ hspi2.Init.NSS = SPI_NSS_SOFT;
+ 80002fa: 4b0e ldr r3, [pc, #56] ; (8000334 )
+ 80002fc: f44f 7200 mov.w r2, #512 ; 0x200
+ 8000300: 619a str r2, [r3, #24]
+ hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
+ 8000302: 4b0c ldr r3, [pc, #48] ; (8000334 )
+ 8000304: 2200 movs r2, #0
+ 8000306: 61da str r2, [r3, #28]
+ hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
+ 8000308: 4b0a ldr r3, [pc, #40] ; (8000334 )
+ 800030a: 2200 movs r2, #0
+ 800030c: 621a str r2, [r3, #32]
+ hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
+ 800030e: 4b09 ldr r3, [pc, #36] ; (8000334 )
+ 8000310: 2200 movs r2, #0
+ 8000312: 625a str r2, [r3, #36] ; 0x24
+ hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+ 8000314: 4b07 ldr r3, [pc, #28] ; (8000334 )
+ 8000316: 2200 movs r2, #0
+ 8000318: 629a str r2, [r3, #40] ; 0x28
+ hspi2.Init.CRCPolynomial = 10;
+ 800031a: 4b06 ldr r3, [pc, #24] ; (8000334 )
+ 800031c: 220a movs r2, #10
+ 800031e: 62da str r2, [r3, #44] ; 0x2c
+ if (HAL_SPI_Init(&hspi2) != HAL_OK)
+ 8000320: 4804 ldr r0, [pc, #16] ; (8000334 )
+ 8000322: f001 f929 bl 8001578
+ 8000326: 4603 mov r3, r0
+ 8000328: 2b00 cmp r3, #0
+ 800032a: d001 beq.n 8000330
+ {
+ Error_Handler();
+ 800032c: f000 f8f0 bl 8000510
+ }
+ /* USER CODE BEGIN SPI2_Init 2 */
+
+ /* USER CODE END SPI2_Init 2 */
+
+}
+ 8000330: bf00 nop
+ 8000332: bd80 pop {r7, pc}
+ 8000334: 20000054 .word 0x20000054
+ 8000338: 40003800 .word 0x40003800
+
+0800033c :
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
- 80002c0: b480 push {r7}
- 80002c2: b083 sub sp, #12
- 80002c4: af00 add r7, sp, #0
+ 800033c: b580 push {r7, lr}
+ 800033e: b08a sub sp, #40 ; 0x28
+ 8000340: af00 add r7, sp, #0
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 8000342: f107 0318 add.w r3, r7, #24
+ 8000346: 2200 movs r2, #0
+ 8000348: 601a str r2, [r3, #0]
+ 800034a: 605a str r2, [r3, #4]
+ 800034c: 609a str r2, [r3, #8]
+ 800034e: 60da str r2, [r3, #12]
/* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ 8000350: 4b3a ldr r3, [pc, #232] ; (800043c )
+ 8000352: 699b ldr r3, [r3, #24]
+ 8000354: 4a39 ldr r2, [pc, #228] ; (800043c )
+ 8000356: f043 0308 orr.w r3, r3, #8
+ 800035a: 6193 str r3, [r2, #24]
+ 800035c: 4b37 ldr r3, [pc, #220] ; (800043c )
+ 800035e: 699b ldr r3, [r3, #24]
+ 8000360: f003 0308 and.w r3, r3, #8
+ 8000364: 617b str r3, [r7, #20]
+ 8000366: 697b ldr r3, [r7, #20]
+ __HAL_RCC_GPIOG_CLK_ENABLE();
+ 8000368: 4b34 ldr r3, [pc, #208] ; (800043c )
+ 800036a: 699b ldr r3, [r3, #24]
+ 800036c: 4a33 ldr r2, [pc, #204] ; (800043c )
+ 800036e: f443 7380 orr.w r3, r3, #256 ; 0x100
+ 8000372: 6193 str r3, [r2, #24]
+ 8000374: 4b31 ldr r3, [pc, #196] ; (800043c )
+ 8000376: 699b ldr r3, [r3, #24]
+ 8000378: f403 7380 and.w r3, r3, #256 ; 0x100
+ 800037c: 613b str r3, [r7, #16]
+ 800037e: 693b ldr r3, [r7, #16]
+ __HAL_RCC_GPIOE_CLK_ENABLE();
+ 8000380: 4b2e ldr r3, [pc, #184] ; (800043c )
+ 8000382: 699b ldr r3, [r3, #24]
+ 8000384: 4a2d ldr r2, [pc, #180] ; (800043c )
+ 8000386: f043 0340 orr.w r3, r3, #64 ; 0x40
+ 800038a: 6193 str r3, [r2, #24]
+ 800038c: 4b2b ldr r3, [pc, #172] ; (800043c )
+ 800038e: 699b ldr r3, [r3, #24]
+ 8000390: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8000394: 60fb str r3, [r7, #12]
+ 8000396: 68fb ldr r3, [r7, #12]
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+ 8000398: 4b28 ldr r3, [pc, #160] ; (800043c )
+ 800039a: 699b ldr r3, [r3, #24]
+ 800039c: 4a27 ldr r2, [pc, #156] ; (800043c )
+ 800039e: f043 0320 orr.w r3, r3, #32
+ 80003a2: 6193 str r3, [r2, #24]
+ 80003a4: 4b25 ldr r3, [pc, #148] ; (800043c )
+ 80003a6: 699b ldr r3, [r3, #24]
+ 80003a8: f003 0320 and.w r3, r3, #32
+ 80003ac: 60bb str r3, [r7, #8]
+ 80003ae: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
- 80002c6: 4b08 ldr r3, [pc, #32] ; (80002e8 )
- 80002c8: 699b ldr r3, [r3, #24]
- 80002ca: 4a07 ldr r2, [pc, #28] ; (80002e8 )
- 80002cc: f043 0304 orr.w r3, r3, #4
- 80002d0: 6193 str r3, [r2, #24]
- 80002d2: 4b05 ldr r3, [pc, #20] ; (80002e8 )
- 80002d4: 699b ldr r3, [r3, #24]
- 80002d6: f003 0304 and.w r3, r3, #4
- 80002da: 607b str r3, [r7, #4]
- 80002dc: 687b ldr r3, [r7, #4]
+ 80003b0: 4b22 ldr r3, [pc, #136] ; (800043c )
+ 80003b2: 699b ldr r3, [r3, #24]
+ 80003b4: 4a21 ldr r2, [pc, #132] ; (800043c )
+ 80003b6: f043 0304 orr.w r3, r3, #4
+ 80003ba: 6193 str r3, [r2, #24]
+ 80003bc: 4b1f ldr r3, [pc, #124] ; (800043c )
+ 80003be: 699b ldr r3, [r3, #24]
+ 80003c0: f003 0304 and.w r3, r3, #4
+ 80003c4: 607b str r3, [r7, #4]
+ 80003c6: 687b ldr r3, [r7, #4]
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOB, LCD_BL_Pin|FLASH_E_Pin, GPIO_PIN_RESET);
+ 80003c8: 2200 movs r2, #0
+ 80003ca: f241 0101 movw r1, #4097 ; 0x1001
+ 80003ce: 481c ldr r0, [pc, #112] ; (8000440 )
+ 80003d0: f000 fcd2 bl 8000d78
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(SD_E_GPIO_Port, SD_E_Pin, GPIO_PIN_RESET);
+ 80003d4: 2200 movs r2, #0
+ 80003d6: 2104 movs r1, #4
+ 80003d8: 481a ldr r0, [pc, #104] ; (8000444 )
+ 80003da: f000 fccd bl 8000d78
+
+ /*Configure GPIO pin : LCD_BL_Pin */
+ GPIO_InitStruct.Pin = LCD_BL_Pin;
+ 80003de: 2301 movs r3, #1
+ 80003e0: 61bb str r3, [r7, #24]
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 80003e2: 2301 movs r3, #1
+ 80003e4: 61fb str r3, [r7, #28]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80003e6: 2300 movs r3, #0
+ 80003e8: 623b str r3, [r7, #32]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 80003ea: 2302 movs r3, #2
+ 80003ec: 627b str r3, [r7, #36] ; 0x24
+ HAL_GPIO_Init(LCD_BL_GPIO_Port, &GPIO_InitStruct);
+ 80003ee: f107 0318 add.w r3, r7, #24
+ 80003f2: 4619 mov r1, r3
+ 80003f4: 4812 ldr r0, [pc, #72] ; (8000440 )
+ 80003f6: f000 fb2b bl 8000a50
+
+ /*Configure GPIO pin : FLASH_E_Pin */
+ GPIO_InitStruct.Pin = FLASH_E_Pin;
+ 80003fa: f44f 5380 mov.w r3, #4096 ; 0x1000
+ 80003fe: 61bb str r3, [r7, #24]
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 8000400: 2301 movs r3, #1
+ 8000402: 61fb str r3, [r7, #28]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8000404: 2300 movs r3, #0
+ 8000406: 623b str r3, [r7, #32]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ 8000408: 2303 movs r3, #3
+ 800040a: 627b str r3, [r7, #36] ; 0x24
+ HAL_GPIO_Init(FLASH_E_GPIO_Port, &GPIO_InitStruct);
+ 800040c: f107 0318 add.w r3, r7, #24
+ 8000410: 4619 mov r1, r3
+ 8000412: 480b ldr r0, [pc, #44] ; (8000440 )
+ 8000414: f000 fb1c bl 8000a50
+
+ /*Configure GPIO pin : SD_E_Pin */
+ GPIO_InitStruct.Pin = SD_E_Pin;
+ 8000418: 2304 movs r3, #4
+ 800041a: 61bb str r3, [r7, #24]
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 800041c: 2301 movs r3, #1
+ 800041e: 61fb str r3, [r7, #28]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8000420: 2300 movs r3, #0
+ 8000422: 623b str r3, [r7, #32]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ 8000424: 2303 movs r3, #3
+ 8000426: 627b str r3, [r7, #36] ; 0x24
+ HAL_GPIO_Init(SD_E_GPIO_Port, &GPIO_InitStruct);
+ 8000428: f107 0318 add.w r3, r7, #24
+ 800042c: 4619 mov r1, r3
+ 800042e: 4805 ldr r0, [pc, #20] ; (8000444 )
+ 8000430: f000 fb0e bl 8000a50
}
- 80002de: bf00 nop
- 80002e0: 370c adds r7, #12
- 80002e2: 46bd mov sp, r7
- 80002e4: bc80 pop {r7}
- 80002e6: 4770 bx lr
- 80002e8: 40021000 .word 0x40021000
+ 8000434: bf00 nop
+ 8000436: 3728 adds r7, #40 ; 0x28
+ 8000438: 46bd mov sp, r7
+ 800043a: bd80 pop {r7, pc}
+ 800043c: 40021000 .word 0x40021000
+ 8000440: 40010c00 .word 0x40010c00
+ 8000444: 40011400 .word 0x40011400
-080002ec :
+08000448 :
+
+/* FSMC initialization function */
+static void MX_FSMC_Init(void)
+{
+ 8000448: b580 push {r7, lr}
+ 800044a: b088 sub sp, #32
+ 800044c: af00 add r7, sp, #0
+
+ /* USER CODE BEGIN FSMC_Init 0 */
+
+ /* USER CODE END FSMC_Init 0 */
+
+ FSMC_NORSRAM_TimingTypeDef Timing = {0};
+ 800044e: 1d3b adds r3, r7, #4
+ 8000450: 2200 movs r2, #0
+ 8000452: 601a str r2, [r3, #0]
+ 8000454: 605a str r2, [r3, #4]
+ 8000456: 609a str r2, [r3, #8]
+ 8000458: 60da str r2, [r3, #12]
+ 800045a: 611a str r2, [r3, #16]
+ 800045c: 615a str r2, [r3, #20]
+ 800045e: 619a str r2, [r3, #24]
+
+ /* USER CODE END FSMC_Init 1 */
+
+ /** Perform the SRAM1 memory initialization sequence
+ */
+ hsram1.Instance = FSMC_NORSRAM_DEVICE;
+ 8000460: 4b28 ldr r3, [pc, #160] ; (8000504 )
+ 8000462: f04f 4220 mov.w r2, #2684354560 ; 0xa0000000
+ 8000466: 601a str r2, [r3, #0]
+ hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
+ 8000468: 4b26 ldr r3, [pc, #152] ; (8000504 )
+ 800046a: 4a27 ldr r2, [pc, #156] ; (8000508 )
+ 800046c: 605a str r2, [r3, #4]
+ /* hsram1.Init */
+ hsram1.Init.NSBank = FSMC_NORSRAM_BANK4;
+ 800046e: 4b25 ldr r3, [pc, #148] ; (8000504 )
+ 8000470: 2206 movs r2, #6
+ 8000472: 609a str r2, [r3, #8]
+ hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
+ 8000474: 4b23 ldr r3, [pc, #140] ; (8000504 )
+ 8000476: 2200 movs r2, #0
+ 8000478: 60da str r2, [r3, #12]
+ hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
+ 800047a: 4b22 ldr r3, [pc, #136] ; (8000504 )
+ 800047c: 2200 movs r2, #0
+ 800047e: 611a str r2, [r3, #16]
+ hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
+ 8000480: 4b20 ldr r3, [pc, #128] ; (8000504 )
+ 8000482: 2210 movs r2, #16
+ 8000484: 615a str r2, [r3, #20]
+ hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
+ 8000486: 4b1f ldr r3, [pc, #124] ; (8000504 )
+ 8000488: 2200 movs r2, #0
+ 800048a: 619a str r2, [r3, #24]
+ hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
+ 800048c: 4b1d ldr r3, [pc, #116] ; (8000504 )
+ 800048e: 2200 movs r2, #0
+ 8000490: 61da str r2, [r3, #28]
+ hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
+ 8000492: 4b1c ldr r3, [pc, #112] ; (8000504 )
+ 8000494: 2200 movs r2, #0
+ 8000496: 621a str r2, [r3, #32]
+ hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
+ 8000498: 4b1a ldr r3, [pc, #104] ; (8000504 )
+ 800049a: 2200 movs r2, #0
+ 800049c: 625a str r2, [r3, #36] ; 0x24
+ hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
+ 800049e: 4b19 ldr r3, [pc, #100] ; (8000504 )
+ 80004a0: f44f 5280 mov.w r2, #4096 ; 0x1000
+ 80004a4: 629a str r2, [r3, #40] ; 0x28
+ hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
+ 80004a6: 4b17 ldr r3, [pc, #92] ; (8000504 )
+ 80004a8: 2200 movs r2, #0
+ 80004aa: 62da str r2, [r3, #44] ; 0x2c
+ hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
+ 80004ac: 4b15 ldr r3, [pc, #84] ; (8000504 )
+ 80004ae: 2200 movs r2, #0
+ 80004b0: 631a str r2, [r3, #48] ; 0x30
+ hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
+ 80004b2: 4b14 ldr r3, [pc, #80] ; (8000504 )
+ 80004b4: 2200 movs r2, #0
+ 80004b6: 635a str r2, [r3, #52] ; 0x34
+ hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
+ 80004b8: 4b12 ldr r3, [pc, #72] ; (8000504 )
+ 80004ba: 2200 movs r2, #0
+ 80004bc: 639a str r2, [r3, #56] ; 0x38
+ /* Timing */
+ Timing.AddressSetupTime = 0;
+ 80004be: 2300 movs r3, #0
+ 80004c0: 607b str r3, [r7, #4]
+ Timing.AddressHoldTime = 15;
+ 80004c2: 230f movs r3, #15
+ 80004c4: 60bb str r3, [r7, #8]
+ Timing.DataSetupTime = 1;
+ 80004c6: 2301 movs r3, #1
+ 80004c8: 60fb str r3, [r7, #12]
+ Timing.BusTurnAroundDuration = 15;
+ 80004ca: 230f movs r3, #15
+ 80004cc: 613b str r3, [r7, #16]
+ Timing.CLKDivision = 16;
+ 80004ce: 2310 movs r3, #16
+ 80004d0: 617b str r3, [r7, #20]
+ Timing.DataLatency = 17;
+ 80004d2: 2311 movs r3, #17
+ 80004d4: 61bb str r3, [r7, #24]
+ Timing.AccessMode = FSMC_ACCESS_MODE_A;
+ 80004d6: 2300 movs r3, #0
+ 80004d8: 61fb str r3, [r7, #28]
+ /* ExtTiming */
+
+ if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
+ 80004da: 1d3b adds r3, r7, #4
+ 80004dc: 2200 movs r2, #0
+ 80004de: 4619 mov r1, r3
+ 80004e0: 4808 ldr r0, [pc, #32] ; (8000504 )
+ 80004e2: f001 fdc1 bl 8002068
+ 80004e6: 4603 mov r3, r0
+ 80004e8: 2b00 cmp r3, #0
+ 80004ea: d001 beq.n 80004f0
+ {
+ Error_Handler( );
+ 80004ec: f000 f810 bl 8000510
+ }
+
+ /** Disconnect NADV
+ */
+
+ __HAL_AFIO_FSMCNADV_DISCONNECTED();
+ 80004f0: 4b06 ldr r3, [pc, #24] ; (800050c )
+ 80004f2: 69db ldr r3, [r3, #28]
+ 80004f4: 4a05 ldr r2, [pc, #20] ; (800050c )
+ 80004f6: f443 6380 orr.w r3, r3, #1024 ; 0x400
+ 80004fa: 61d3 str r3, [r2, #28]
+
+ /* USER CODE BEGIN FSMC_Init 2 */
+
+ /* USER CODE END FSMC_Init 2 */
+}
+ 80004fc: bf00 nop
+ 80004fe: 3720 adds r7, #32
+ 8000500: 46bd mov sp, r7
+ 8000502: bd80 pop {r7, pc}
+ 8000504: 200000ac .word 0x200000ac
+ 8000508: a0000104 .word 0xa0000104
+ 800050c: 40010000 .word 0x40010000
+
+08000510 :
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
- 80002ec: b480 push {r7}
- 80002ee: af00 add r7, sp, #0
+ 8000510: b480 push {r7}
+ 8000512: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
- 80002f0: b672 cpsid i
+ 8000514: b672 cpsid i
}
- 80002f2: bf00 nop
+ 8000516: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
- 80002f4: e7fe b.n 80002f4
+ 8000518: e7fe b.n 8000518
...
-080002f8 :
+0800051c :
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
- 80002f8: b480 push {r7}
- 80002fa: b085 sub sp, #20
- 80002fc: af00 add r7, sp, #0
+ 800051c: b480 push {r7}
+ 800051e: b085 sub sp, #20
+ 8000520: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
- 80002fe: 4b15 ldr r3, [pc, #84] ; (8000354 )
- 8000300: 699b ldr r3, [r3, #24]
- 8000302: 4a14 ldr r2, [pc, #80] ; (8000354 )
- 8000304: f043 0301 orr.w r3, r3, #1
- 8000308: 6193 str r3, [r2, #24]
- 800030a: 4b12 ldr r3, [pc, #72] ; (8000354 )
- 800030c: 699b ldr r3, [r3, #24]
- 800030e: f003 0301 and.w r3, r3, #1
- 8000312: 60bb str r3, [r7, #8]
- 8000314: 68bb ldr r3, [r7, #8]
+ 8000522: 4b15 ldr r3, [pc, #84] ; (8000578 )
+ 8000524: 699b ldr r3, [r3, #24]
+ 8000526: 4a14 ldr r2, [pc, #80] ; (8000578 )
+ 8000528: f043 0301 orr.w r3, r3, #1
+ 800052c: 6193 str r3, [r2, #24]
+ 800052e: 4b12 ldr r3, [pc, #72] ; (8000578 )
+ 8000530: 699b ldr r3, [r3, #24]
+ 8000532: f003 0301 and.w r3, r3, #1
+ 8000536: 60bb str r3, [r7, #8]
+ 8000538: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
- 8000316: 4b0f ldr r3, [pc, #60] ; (8000354 )
- 8000318: 69db ldr r3, [r3, #28]
- 800031a: 4a0e ldr r2, [pc, #56] ; (8000354 )
- 800031c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 8000320: 61d3 str r3, [r2, #28]
- 8000322: 4b0c ldr r3, [pc, #48] ; (8000354 )
- 8000324: 69db ldr r3, [r3, #28]
- 8000326: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 800032a: 607b str r3, [r7, #4]
- 800032c: 687b ldr r3, [r7, #4]
+ 800053a: 4b0f ldr r3, [pc, #60] ; (8000578 )
+ 800053c: 69db ldr r3, [r3, #28]
+ 800053e: 4a0e ldr r2, [pc, #56] ; (8000578 )
+ 8000540: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 8000544: 61d3 str r3, [r2, #28]
+ 8000546: 4b0c ldr r3, [pc, #48] ; (8000578 )
+ 8000548: 69db ldr r3, [r3, #28]
+ 800054a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 800054e: 607b str r3, [r7, #4]
+ 8000550: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG();
- 800032e: 4b0a ldr r3, [pc, #40] ; (8000358 )
- 8000330: 685b ldr r3, [r3, #4]
- 8000332: 60fb str r3, [r7, #12]
- 8000334: 68fb ldr r3, [r7, #12]
- 8000336: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
- 800033a: 60fb str r3, [r7, #12]
- 800033c: 68fb ldr r3, [r7, #12]
- 800033e: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000
- 8000342: 60fb str r3, [r7, #12]
- 8000344: 4a04 ldr r2, [pc, #16] ; (8000358 )
- 8000346: 68fb ldr r3, [r7, #12]
- 8000348: 6053 str r3, [r2, #4]
+ 8000552: 4b0a ldr r3, [pc, #40] ; (800057c )
+ 8000554: 685b ldr r3, [r3, #4]
+ 8000556: 60fb str r3, [r7, #12]
+ 8000558: 68fb ldr r3, [r7, #12]
+ 800055a: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
+ 800055e: 60fb str r3, [r7, #12]
+ 8000560: 68fb ldr r3, [r7, #12]
+ 8000562: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000
+ 8000566: 60fb str r3, [r7, #12]
+ 8000568: 4a04 ldr r2, [pc, #16] ; (800057c )
+ 800056a: 68fb ldr r3, [r7, #12]
+ 800056c: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
- 800034a: bf00 nop
- 800034c: 3714 adds r7, #20
- 800034e: 46bd mov sp, r7
- 8000350: bc80 pop {r7}
- 8000352: 4770 bx lr
- 8000354: 40021000 .word 0x40021000
- 8000358: 40010000 .word 0x40010000
+ 800056e: bf00 nop
+ 8000570: 3714 adds r7, #20
+ 8000572: 46bd mov sp, r7
+ 8000574: bc80 pop {r7}
+ 8000576: 4770 bx lr
+ 8000578: 40021000 .word 0x40021000
+ 800057c: 40010000 .word 0x40010000
-0800035c :
+08000580 :
+* This function configures the hardware resources used in this example
+* @param hspi: SPI handle pointer
+* @retval None
+*/
+void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
+{
+ 8000580: b580 push {r7, lr}
+ 8000582: b088 sub sp, #32
+ 8000584: af00 add r7, sp, #0
+ 8000586: 6078 str r0, [r7, #4]
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 8000588: f107 0310 add.w r3, r7, #16
+ 800058c: 2200 movs r2, #0
+ 800058e: 601a str r2, [r3, #0]
+ 8000590: 605a str r2, [r3, #4]
+ 8000592: 609a str r2, [r3, #8]
+ 8000594: 60da str r2, [r3, #12]
+ if(hspi->Instance==SPI2)
+ 8000596: 687b ldr r3, [r7, #4]
+ 8000598: 681b ldr r3, [r3, #0]
+ 800059a: 4a1c ldr r2, [pc, #112] ; (800060c )
+ 800059c: 4293 cmp r3, r2
+ 800059e: d131 bne.n 8000604
+ {
+ /* USER CODE BEGIN SPI2_MspInit 0 */
+
+ /* USER CODE END SPI2_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_SPI2_CLK_ENABLE();
+ 80005a0: 4b1b ldr r3, [pc, #108] ; (8000610 )
+ 80005a2: 69db ldr r3, [r3, #28]
+ 80005a4: 4a1a ldr r2, [pc, #104] ; (8000610 )
+ 80005a6: f443 4380 orr.w r3, r3, #16384 ; 0x4000
+ 80005aa: 61d3 str r3, [r2, #28]
+ 80005ac: 4b18 ldr r3, [pc, #96] ; (8000610 )
+ 80005ae: 69db ldr r3, [r3, #28]
+ 80005b0: f403 4380 and.w r3, r3, #16384 ; 0x4000
+ 80005b4: 60fb str r3, [r7, #12]
+ 80005b6: 68fb ldr r3, [r7, #12]
+
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ 80005b8: 4b15 ldr r3, [pc, #84] ; (8000610 )
+ 80005ba: 699b ldr r3, [r3, #24]
+ 80005bc: 4a14 ldr r2, [pc, #80] ; (8000610 )
+ 80005be: f043 0308 orr.w r3, r3, #8
+ 80005c2: 6193 str r3, [r2, #24]
+ 80005c4: 4b12 ldr r3, [pc, #72] ; (8000610 )
+ 80005c6: 699b ldr r3, [r3, #24]
+ 80005c8: f003 0308 and.w r3, r3, #8
+ 80005cc: 60bb str r3, [r7, #8]
+ 80005ce: 68bb ldr r3, [r7, #8]
+ /**SPI2 GPIO Configuration
+ PB13 ------> SPI2_SCK
+ PB14 ------> SPI2_MISO
+ PB15 ------> SPI2_MOSI
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_15;
+ 80005d0: f44f 4320 mov.w r3, #40960 ; 0xa000
+ 80005d4: 613b str r3, [r7, #16]
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80005d6: 2302 movs r3, #2
+ 80005d8: 617b str r3, [r7, #20]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ 80005da: 2303 movs r3, #3
+ 80005dc: 61fb str r3, [r7, #28]
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 80005de: f107 0310 add.w r3, r7, #16
+ 80005e2: 4619 mov r1, r3
+ 80005e4: 480b ldr r0, [pc, #44] ; (8000614 )
+ 80005e6: f000 fa33 bl 8000a50
+
+ GPIO_InitStruct.Pin = GPIO_PIN_14;
+ 80005ea: f44f 4380 mov.w r3, #16384 ; 0x4000
+ 80005ee: 613b str r3, [r7, #16]
+ GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 80005f0: 2300 movs r3, #0
+ 80005f2: 617b str r3, [r7, #20]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80005f4: 2300 movs r3, #0
+ 80005f6: 61bb str r3, [r7, #24]
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 80005f8: f107 0310 add.w r3, r7, #16
+ 80005fc: 4619 mov r1, r3
+ 80005fe: 4805 ldr r0, [pc, #20] ; (8000614 )
+ 8000600: f000 fa26 bl 8000a50
+ /* USER CODE BEGIN SPI2_MspInit 1 */
+
+ /* USER CODE END SPI2_MspInit 1 */
+ }
+
+}
+ 8000604: bf00 nop
+ 8000606: 3720 adds r7, #32
+ 8000608: 46bd mov sp, r7
+ 800060a: bd80 pop {r7, pc}
+ 800060c: 40003800 .word 0x40003800
+ 8000610: 40021000 .word 0x40021000
+ 8000614: 40010c00 .word 0x40010c00
+
+08000618 :
+
+}
+
+static uint32_t FSMC_Initialized = 0;
+
+static void HAL_FSMC_MspInit(void){
+ 8000618: b580 push {r7, lr}
+ 800061a: b086 sub sp, #24
+ 800061c: af00 add r7, sp, #0
+ /* USER CODE BEGIN FSMC_MspInit 0 */
+
+ /* USER CODE END FSMC_MspInit 0 */
+ GPIO_InitTypeDef GPIO_InitStruct ={0};
+ 800061e: f107 0308 add.w r3, r7, #8
+ 8000622: 2200 movs r2, #0
+ 8000624: 601a str r2, [r3, #0]
+ 8000626: 605a str r2, [r3, #4]
+ 8000628: 609a str r2, [r3, #8]
+ 800062a: 60da str r2, [r3, #12]
+ if (FSMC_Initialized) {
+ 800062c: 4b1f ldr r3, [pc, #124] ; (80006ac )
+ 800062e: 681b ldr r3, [r3, #0]
+ 8000630: 2b00 cmp r3, #0
+ 8000632: d136 bne.n 80006a2
+ return;
+ }
+ FSMC_Initialized = 1;
+ 8000634: 4b1d ldr r3, [pc, #116] ; (80006ac )
+ 8000636: 2201 movs r2, #1
+ 8000638: 601a str r2, [r3, #0]
+
+ /* Peripheral clock enable */
+ __HAL_RCC_FSMC_CLK_ENABLE();
+ 800063a: 4b1d ldr r3, [pc, #116] ; (80006b0 )
+ 800063c: 695b ldr r3, [r3, #20]
+ 800063e: 4a1c ldr r2, [pc, #112] ; (80006b0 )
+ 8000640: f443 7380 orr.w r3, r3, #256 ; 0x100
+ 8000644: 6153 str r3, [r2, #20]
+ 8000646: 4b1a ldr r3, [pc, #104] ; (80006b0 )
+ 8000648: 695b ldr r3, [r3, #20]
+ 800064a: f403 7380 and.w r3, r3, #256 ; 0x100
+ 800064e: 607b str r3, [r7, #4]
+ 8000650: 687b ldr r3, [r7, #4]
+ PD1 ------> FSMC_D3
+ PD4 ------> FSMC_NOE
+ PD5 ------> FSMC_NWE
+ PG12 ------> FSMC_NE4
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_12;
+ 8000652: f241 0301 movw r3, #4097 ; 0x1001
+ 8000656: 60bb str r3, [r7, #8]
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8000658: 2302 movs r3, #2
+ 800065a: 60fb str r3, [r7, #12]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ 800065c: 2303 movs r3, #3
+ 800065e: 617b str r3, [r7, #20]
+ HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+ 8000660: f107 0308 add.w r3, r7, #8
+ 8000664: 4619 mov r1, r3
+ 8000666: 4813 ldr r0, [pc, #76] ; (80006b4 )
+ 8000668: f000 f9f2 bl 8000a50
+
+ GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
+ 800066c: f64f 7380 movw r3, #65408 ; 0xff80
+ 8000670: 60bb str r3, [r7, #8]
+ |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
+ |GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8000672: 2302 movs r3, #2
+ 8000674: 60fb str r3, [r7, #12]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ 8000676: 2303 movs r3, #3
+ 8000678: 617b str r3, [r7, #20]
+ HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 800067a: f107 0308 add.w r3, r7, #8
+ 800067e: 4619 mov r1, r3
+ 8000680: 480d ldr r0, [pc, #52] ; (80006b8 )
+ 8000682: f000 f9e5 bl 8000a50
+
+ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
+ 8000686: f24c 7333 movw r3, #50995 ; 0xc733
+ 800068a: 60bb str r3, [r7, #8]
+ |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4
+ |GPIO_PIN_5;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 800068c: 2302 movs r3, #2
+ 800068e: 60fb str r3, [r7, #12]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ 8000690: 2303 movs r3, #3
+ 8000692: 617b str r3, [r7, #20]
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+ 8000694: f107 0308 add.w r3, r7, #8
+ 8000698: 4619 mov r1, r3
+ 800069a: 4808 ldr r0, [pc, #32] ; (80006bc )
+ 800069c: f000 f9d8 bl 8000a50
+ 80006a0: e000 b.n 80006a4
+ return;
+ 80006a2: bf00 nop
+
+ /* USER CODE BEGIN FSMC_MspInit 1 */
+
+ /* USER CODE END FSMC_MspInit 1 */
+}
+ 80006a4: 3718 adds r7, #24
+ 80006a6: 46bd mov sp, r7
+ 80006a8: bd80 pop {r7, pc}
+ 80006aa: bf00 nop
+ 80006ac: 20000040 .word 0x20000040
+ 80006b0: 40021000 .word 0x40021000
+ 80006b4: 40012000 .word 0x40012000
+ 80006b8: 40011800 .word 0x40011800
+ 80006bc: 40011400 .word 0x40011400
+
+080006c0 :
+
+void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){
+ 80006c0: b580 push {r7, lr}
+ 80006c2: b082 sub sp, #8
+ 80006c4: af00 add r7, sp, #0
+ 80006c6: 6078 str r0, [r7, #4]
+ /* USER CODE BEGIN SRAM_MspInit 0 */
+
+ /* USER CODE END SRAM_MspInit 0 */
+ HAL_FSMC_MspInit();
+ 80006c8: f7ff ffa6 bl 8000618
+ /* USER CODE BEGIN SRAM_MspInit 1 */
+
+ /* USER CODE END SRAM_MspInit 1 */
+}
+ 80006cc: bf00 nop
+ 80006ce: 3708 adds r7, #8
+ 80006d0: 46bd mov sp, r7
+ 80006d2: bd80 pop {r7, pc}
+
+080006d4 :
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
- 800035c: b480 push {r7}
- 800035e: af00 add r7, sp, #0
+ 80006d4: b480 push {r7}
+ 80006d6: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
- 8000360: e7fe b.n 8000360
+ 80006d8: e7fe b.n 80006d8
-08000362 :
+080006da :
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
- 8000362: b480 push {r7}
- 8000364: af00 add r7, sp, #0
+ 80006da: b480 push {r7}
+ 80006dc: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
- 8000366: e7fe b.n 8000366
+ 80006de: e7fe b.n 80006de
-08000368 :
+080006e0 :
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
- 8000368: b480 push {r7}
- 800036a: af00 add r7, sp, #0
+ 80006e0: b480 push {r7}
+ 80006e2: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
- 800036c: e7fe b.n 800036c
+ 80006e4: e7fe b.n 80006e4
-0800036e :
+080006e6 :
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
- 800036e: b480 push {r7}
- 8000370: af00 add r7, sp, #0
+ 80006e6: b480 push {r7}
+ 80006e8: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
- 8000372: e7fe b.n 8000372
+ 80006ea: e7fe b.n 80006ea
-08000374 :
+080006ec :
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
- 8000374: b480 push {r7}
- 8000376: af00 add r7, sp, #0
+ 80006ec: b480 push {r7}
+ 80006ee: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
- 8000378: e7fe b.n 8000378
+ 80006f0: e7fe b.n 80006f0
-0800037a :
+080006f2 :
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
- 800037a: b480 push {r7}
- 800037c: af00 add r7, sp, #0
+ 80006f2: b480 push {r7}
+ 80006f4: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
- 800037e: bf00 nop
- 8000380: 46bd mov sp, r7
- 8000382: bc80 pop {r7}
- 8000384: 4770 bx lr
+ 80006f6: bf00 nop
+ 80006f8: 46bd mov sp, r7
+ 80006fa: bc80 pop {r7}
+ 80006fc: 4770 bx lr
-08000386 :
+080006fe :
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
- 8000386: b480 push {r7}
- 8000388: af00 add r7, sp, #0
+ 80006fe: b480 push {r7}
+ 8000700: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
- 800038a: bf00 nop
- 800038c: 46bd mov sp, r7
- 800038e: bc80 pop {r7}
- 8000390: 4770 bx lr
+ 8000702: bf00 nop
+ 8000704: 46bd mov sp, r7
+ 8000706: bc80 pop {r7}
+ 8000708: 4770 bx lr
-08000392 :
+0800070a :
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
- 8000392: b480 push {r7}
- 8000394: af00 add r7, sp, #0
+ 800070a: b480 push {r7}
+ 800070c: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
- 8000396: bf00 nop
- 8000398: 46bd mov sp, r7
- 800039a: bc80 pop {r7}
- 800039c: 4770 bx lr
+ 800070e: bf00 nop
+ 8000710: 46bd mov sp, r7
+ 8000712: bc80 pop {r7}
+ 8000714: 4770 bx lr
-0800039e :
+08000716 :
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
- 800039e: b580 push {r7, lr}
- 80003a0: af00 add r7, sp, #0
+ 8000716: b580 push {r7, lr}
+ 8000718: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
- 80003a2: f000 f875 bl 8000490
+ 800071a: f000 f875 bl 8000808
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
- 80003a6: bf00 nop
- 80003a8: bd80 pop {r7, pc}
+ 800071e: bf00 nop
+ 8000720: bd80 pop {r7, pc}
-080003aa :
+08000722 :
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
- 80003aa: b480 push {r7}
- 80003ac: af00 add r7, sp, #0
+ 8000722: b480 push {r7}
+ 8000724: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
- 80003ae: bf00 nop
- 80003b0: 46bd mov sp, r7
- 80003b2: bc80 pop {r7}
- 80003b4: 4770 bx lr
+ 8000726: bf00 nop
+ 8000728: 46bd mov sp, r7
+ 800072a: bc80 pop {r7}
+ 800072c: 4770 bx lr
...
-080003b8 :
+08000730 :
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
- 80003b8: 2100 movs r1, #0
+ 8000730: 2100 movs r1, #0
b LoopCopyDataInit
- 80003ba: e003 b.n 80003c4
+ 8000732: e003 b.n 800073c
-080003bc :
+08000734 :
CopyDataInit:
ldr r3, =_sidata
- 80003bc: 4b0b ldr r3, [pc, #44] ; (80003ec )
+ 8000734: 4b0b ldr r3, [pc, #44] ; (8000764 )
ldr r3, [r3, r1]
- 80003be: 585b ldr r3, [r3, r1]
+ 8000736: 585b ldr r3, [r3, r1]
str r3, [r0, r1]
- 80003c0: 5043 str r3, [r0, r1]
+ 8000738: 5043 str r3, [r0, r1]
adds r1, r1, #4
- 80003c2: 3104 adds r1, #4
+ 800073a: 3104 adds r1, #4
-080003c4 :
+0800073c :
LoopCopyDataInit:
ldr r0, =_sdata
- 80003c4: 480a ldr r0, [pc, #40] ; (80003f0 )
+ 800073c: 480a ldr r0, [pc, #40] ; (8000768 )
ldr r3, =_edata
- 80003c6: 4b0b ldr r3, [pc, #44] ; (80003f4 )
+ 800073e: 4b0b ldr r3, [pc, #44] ; (800076c )
adds r2, r0, r1
- 80003c8: 1842 adds r2, r0, r1
+ 8000740: 1842 adds r2, r0, r1
cmp r2, r3
- 80003ca: 429a cmp r2, r3
+ 8000742: 429a cmp r2, r3
bcc CopyDataInit
- 80003cc: d3f6 bcc.n 80003bc
+ 8000744: d3f6 bcc.n 8000734
ldr r2, =_sbss
- 80003ce: 4a0a ldr r2, [pc, #40] ; (80003f8 )
+ 8000746: 4a0a ldr r2, [pc, #40] ; (8000770 )
b LoopFillZerobss
- 80003d0: e002 b.n 80003d8
+ 8000748: e002 b.n 8000750
-080003d2 :
+0800074a :
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
- 80003d2: 2300 movs r3, #0
+ 800074a: 2300 movs r3, #0
str r3, [r2], #4
- 80003d4: f842 3b04 str.w r3, [r2], #4
+ 800074c: f842 3b04 str.w r3, [r2], #4
-080003d8 :
+08000750 :
LoopFillZerobss:
ldr r3, = _ebss
- 80003d8: 4b08 ldr r3, [pc, #32] ; (80003fc )
+ 8000750: 4b08 ldr r3, [pc, #32] ; (8000774 )
cmp r2, r3
- 80003da: 429a cmp r2, r3
+ 8000752: 429a cmp r2, r3
bcc FillZerobss
- 80003dc: d3f9 bcc.n 80003d2
+ 8000754: d3f9 bcc.n 800074a
/* Call the clock system intitialization function.*/
bl SystemInit
- 80003de: f7ff ffe4 bl 80003aa
+ 8000756: f7ff ffe4 bl 8000722
/* Call static constructors */
bl __libc_init_array
- 80003e2: f000 fd3d bl 8000e60 <__libc_init_array>
+ 800075a: f003 fa4b bl 8003bf4 <__libc_init_array>
/* Call the application's entry point.*/
bl main
- 80003e6: f7ff ff1d bl 8000224
+ 800075e: f7ff fd61 bl 8000224
bx lr
- 80003ea: 4770 bx lr
+ 8000762: 4770 bx lr
ldr r3, =_sidata
- 80003ec: 08000ef8 .word 0x08000ef8
+ 8000764: 08004704 .word 0x08004704
ldr r0, =_sdata
- 80003f0: 20000000 .word 0x20000000
+ 8000768: 20000000 .word 0x20000000
ldr r3, =_edata
- 80003f4: 2000000c .word 0x2000000c
+ 800076c: 20000024 .word 0x20000024
ldr r2, =_sbss
- 80003f8: 2000000c .word 0x2000000c
+ 8000770: 20000024 .word 0x20000024
ldr r3, = _ebss
- 80003fc: 2000002c .word 0x2000002c
+ 8000774: 20000590 .word 0x20000590
-08000400 :
+08000778 :
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
- 8000400: e7fe b.n 8000400
+ 8000778: e7fe b.n 8000778
...
-08000404 :
+0800077c :
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
- 8000404: b580 push {r7, lr}
- 8000406: af00 add r7, sp, #0
+ 800077c: b580 push {r7, lr}
+ 800077e: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
- 8000408: 4b08 ldr r3, [pc, #32] ; (800042c )
- 800040a: 681b ldr r3, [r3, #0]
- 800040c: 4a07 ldr r2, [pc, #28] ; (800042c )
- 800040e: f043 0310 orr.w r3, r3, #16
- 8000412: 6013 str r3, [r2, #0]
+ 8000780: 4b08 ldr r3, [pc, #32] ; (80007a4 )
+ 8000782: 681b ldr r3, [r3, #0]
+ 8000784: 4a07 ldr r2, [pc, #28] ; (80007a4 )
+ 8000786: f043 0310 orr.w r3, r3, #16
+ 800078a: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
- 8000414: 2003 movs r0, #3
- 8000416: f000 f907 bl 8000628
+ 800078c: 2003 movs r0, #3
+ 800078e: f000 f92b bl 80009e8
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
- 800041a: 2000 movs r0, #0
- 800041c: f000 f808 bl 8000430
+ 8000792: 2000 movs r0, #0
+ 8000794: f000 f808 bl 80007a8
/* Init the low level hardware */
HAL_MspInit();
- 8000420: f7ff ff6a bl 80002f8
+ 8000798: f7ff fec0 bl 800051c
/* Return function status */
return HAL_OK;
- 8000424: 2300 movs r3, #0
+ 800079c: 2300 movs r3, #0
}
- 8000426: 4618 mov r0, r3
- 8000428: bd80 pop {r7, pc}
- 800042a: bf00 nop
- 800042c: 40022000 .word 0x40022000
+ 800079e: 4618 mov r0, r3
+ 80007a0: bd80 pop {r7, pc}
+ 80007a2: bf00 nop
+ 80007a4: 40022000 .word 0x40022000
-08000430 :
+080007a8 :
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
- 8000430: b580 push {r7, lr}
- 8000432: b082 sub sp, #8
- 8000434: af00 add r7, sp, #0
- 8000436: 6078 str r0, [r7, #4]
+ 80007a8: b580 push {r7, lr}
+ 80007aa: b082 sub sp, #8
+ 80007ac: af00 add r7, sp, #0
+ 80007ae: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
- 8000438: 4b12 ldr r3, [pc, #72] ; (8000484 )
- 800043a: 681a ldr r2, [r3, #0]
- 800043c: 4b12 ldr r3, [pc, #72] ; (8000488 )
- 800043e: 781b ldrb r3, [r3, #0]
- 8000440: 4619 mov r1, r3
- 8000442: f44f 737a mov.w r3, #1000 ; 0x3e8
- 8000446: fbb3 f3f1 udiv r3, r3, r1
- 800044a: fbb2 f3f3 udiv r3, r2, r3
- 800044e: 4618 mov r0, r3
- 8000450: f000 f911 bl 8000676
- 8000454: 4603 mov r3, r0
- 8000456: 2b00 cmp r3, #0
- 8000458: d001 beq.n 800045e
+ 80007b0: 4b12 ldr r3, [pc, #72] ; (80007fc )
+ 80007b2: 681a ldr r2, [r3, #0]
+ 80007b4: 4b12 ldr r3, [pc, #72] ; (8000800 )
+ 80007b6: 781b ldrb r3, [r3, #0]
+ 80007b8: 4619 mov r1, r3
+ 80007ba: f44f 737a mov.w r3, #1000 ; 0x3e8
+ 80007be: fbb3 f3f1 udiv r3, r3, r1
+ 80007c2: fbb2 f3f3 udiv r3, r2, r3
+ 80007c6: 4618 mov r0, r3
+ 80007c8: f000 f935 bl 8000a36
+ 80007cc: 4603 mov r3, r0
+ 80007ce: 2b00 cmp r3, #0
+ 80007d0: d001 beq.n 80007d6
{
return HAL_ERROR;
- 800045a: 2301 movs r3, #1
- 800045c: e00e b.n 800047c
+ 80007d2: 2301 movs r3, #1
+ 80007d4: e00e b.n 80007f4