下个版本打算两字节两个字节的读取,这样就就不怕数据块中 换行太多导致显示不下。 Signed-off-by: 无闻风 <53944749+wuwenfengmi1998@users.noreply.github.com>
16665 lines
602 KiB
Plaintext
16665 lines
602 KiB
Plaintext
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103ze_code.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .isr_vector 000001e4 08000000 08000000 00010000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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1 .text 00006814 080001e4 080001e4 000101e4 2**2
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 00000b98 080069f8 080069f8 000169f8 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .ARM.extab 00000000 08007590 08007590 00020088 2**0
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CONTENTS
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4 .ARM 00000000 08007590 08007590 00020088 2**0
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CONTENTS
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5 .preinit_array 00000000 08007590 08007590 00020088 2**0
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CONTENTS, ALLOC, LOAD, DATA
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6 .init_array 00000004 08007590 08007590 00017590 2**2
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CONTENTS, ALLOC, LOAD, DATA
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7 .fini_array 00000004 08007594 08007594 00017594 2**2
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CONTENTS, ALLOC, LOAD, DATA
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8 .data 00000088 20000000 08007598 00020000 2**2
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CONTENTS, ALLOC, LOAD, DATA
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9 .bss 000007dc 20000088 08007620 00020088 2**2
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ALLOC
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10 ._user_heap_stack 00001004 20000864 08007620 00020864 2**0
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ALLOC
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11 .ARM.attributes 00000029 00000000 00000000 00020088 2**0
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CONTENTS, READONLY
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12 .debug_info 0000ede2 00000000 00000000 000200b1 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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13 .debug_abbrev 00002d03 00000000 00000000 0002ee93 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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14 .debug_aranges 00000c18 00000000 00000000 00031b98 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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15 .debug_ranges 00000ab0 00000000 00000000 000327b0 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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16 .debug_macro 0001ac05 00000000 00000000 00033260 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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17 .debug_line 00010388 00000000 00000000 0004de65 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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18 .debug_str 00094106 00000000 00000000 0005e1ed 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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19 .comment 00000053 00000000 00000000 000f22f3 2**0
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CONTENTS, READONLY
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20 .debug_frame 000032d8 00000000 00000000 000f2348 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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Disassembly of section .text:
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080001e4 <__do_global_dtors_aux>:
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80001e4: b510 push {r4, lr}
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80001e6: 4c05 ldr r4, [pc, #20] ; (80001fc <__do_global_dtors_aux+0x18>)
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80001e8: 7823 ldrb r3, [r4, #0]
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80001ea: b933 cbnz r3, 80001fa <__do_global_dtors_aux+0x16>
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80001ec: 4b04 ldr r3, [pc, #16] ; (8000200 <__do_global_dtors_aux+0x1c>)
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80001ee: b113 cbz r3, 80001f6 <__do_global_dtors_aux+0x12>
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80001f0: 4804 ldr r0, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x20>)
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80001f2: f3af 8000 nop.w
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80001f6: 2301 movs r3, #1
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80001f8: 7023 strb r3, [r4, #0]
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80001fa: bd10 pop {r4, pc}
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80001fc: 20000088 .word 0x20000088
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8000200: 00000000 .word 0x00000000
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8000204: 080069e0 .word 0x080069e0
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08000208 <frame_dummy>:
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8000208: b508 push {r3, lr}
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800020a: 4b03 ldr r3, [pc, #12] ; (8000218 <frame_dummy+0x10>)
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800020c: b11b cbz r3, 8000216 <frame_dummy+0xe>
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800020e: 4903 ldr r1, [pc, #12] ; (800021c <frame_dummy+0x14>)
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8000210: 4803 ldr r0, [pc, #12] ; (8000220 <frame_dummy+0x18>)
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8000212: f3af 8000 nop.w
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8000216: bd08 pop {r3, pc}
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8000218: 00000000 .word 0x00000000
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800021c: 2000008c .word 0x2000008c
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8000220: 080069e0 .word 0x080069e0
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08000224 <main>:
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/**
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* @brief The application entry point.
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* @retval int
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*/
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int main(void)
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{
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8000224: b580 push {r7, lr}
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8000226: af00 add r7, sp, #0
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/* USER CODE END 1 */
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/* MCU Configuration--------------------------------------------------------*/
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/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
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HAL_Init();
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8000228: f000 faec bl 8000804 <HAL_Init>
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/* USER CODE BEGIN Init */
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/* USER CODE END Init */
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/* Configure the system clock */
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SystemClock_Config();
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800022c: f000 f80b bl 8000246 <SystemClock_Config>
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/* USER CODE BEGIN SysInit */
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/* USER CODE END SysInit */
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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8000230: f000 f884 bl 800033c <MX_GPIO_Init>
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MX_FSMC_Init();
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8000234: f000 f916 bl 8000464 <MX_FSMC_Init>
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MX_SPI2_Init();
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8000238: f000 f84a bl 80002d0 <MX_SPI2_Init>
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MX_FATFS_Init();
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800023c: f002 f894 bl 8002368 <MX_FATFS_Init>
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/* USER CODE BEGIN 2 */
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my_main();
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8000240: f004 faaa bl 8004798 <my_main>
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/* USER CODE END 2 */
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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while (1)
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8000244: e7fe b.n 8000244 <main+0x20>
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08000246 <SystemClock_Config>:
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/**
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* @brief System Clock Configuration
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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8000246: b580 push {r7, lr}
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8000248: b090 sub sp, #64 ; 0x40
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800024a: af00 add r7, sp, #0
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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800024c: f107 0318 add.w r3, r7, #24
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8000250: 2228 movs r2, #40 ; 0x28
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8000252: 2100 movs r1, #0
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8000254: 4618 mov r0, r3
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8000256: f005 ff81 bl 800615c <memset>
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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800025a: 1d3b adds r3, r7, #4
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800025c: 2200 movs r2, #0
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800025e: 601a str r2, [r3, #0]
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8000260: 605a str r2, [r3, #4]
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8000262: 609a str r2, [r3, #8]
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8000264: 60da str r2, [r3, #12]
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8000266: 611a str r2, [r3, #16]
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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8000268: 2301 movs r3, #1
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800026a: 61bb str r3, [r7, #24]
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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800026c: f44f 3380 mov.w r3, #65536 ; 0x10000
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8000270: 61fb str r3, [r7, #28]
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RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
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8000272: 2300 movs r3, #0
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8000274: 623b str r3, [r7, #32]
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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8000276: 2301 movs r3, #1
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8000278: 62bb str r3, [r7, #40] ; 0x28
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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800027a: 2302 movs r3, #2
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800027c: 637b str r3, [r7, #52] ; 0x34
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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800027e: f44f 3380 mov.w r3, #65536 ; 0x10000
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8000282: 63bb str r3, [r7, #56] ; 0x38
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RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
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8000284: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
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8000288: 63fb str r3, [r7, #60] ; 0x3c
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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800028a: f107 0318 add.w r3, r7, #24
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800028e: 4618 mov r0, r3
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8000290: f000 fde6 bl 8000e60 <HAL_RCC_OscConfig>
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8000294: 4603 mov r3, r0
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8000296: 2b00 cmp r3, #0
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8000298: d001 beq.n 800029e <SystemClock_Config+0x58>
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{
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Error_Handler();
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800029a: f000 f947 bl 800052c <Error_Handler>
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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800029e: 230f movs r3, #15
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80002a0: 607b str r3, [r7, #4]
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|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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80002a2: 2302 movs r3, #2
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80002a4: 60bb str r3, [r7, #8]
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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80002a6: 2300 movs r3, #0
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80002a8: 60fb str r3, [r7, #12]
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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80002aa: f44f 6380 mov.w r3, #1024 ; 0x400
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80002ae: 613b str r3, [r7, #16]
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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80002b0: 2300 movs r3, #0
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80002b2: 617b str r3, [r7, #20]
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
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80002b4: 1d3b adds r3, r7, #4
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80002b6: 2102 movs r1, #2
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80002b8: 4618 mov r0, r3
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80002ba: f001 f851 bl 8001360 <HAL_RCC_ClockConfig>
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80002be: 4603 mov r3, r0
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80002c0: 2b00 cmp r3, #0
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80002c2: d001 beq.n 80002c8 <SystemClock_Config+0x82>
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{
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Error_Handler();
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80002c4: f000 f932 bl 800052c <Error_Handler>
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}
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}
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80002c8: bf00 nop
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80002ca: 3740 adds r7, #64 ; 0x40
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80002cc: 46bd mov sp, r7
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80002ce: bd80 pop {r7, pc}
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080002d0 <MX_SPI2_Init>:
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* @brief SPI2 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_SPI2_Init(void)
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{
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80002d0: b580 push {r7, lr}
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80002d2: af00 add r7, sp, #0
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/* USER CODE BEGIN SPI2_Init 1 */
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/* USER CODE END SPI2_Init 1 */
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/* SPI2 parameter configuration*/
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hspi2.Instance = SPI2;
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80002d4: 4b17 ldr r3, [pc, #92] ; (8000334 <MX_SPI2_Init+0x64>)
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80002d6: 4a18 ldr r2, [pc, #96] ; (8000338 <MX_SPI2_Init+0x68>)
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80002d8: 601a str r2, [r3, #0]
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hspi2.Init.Mode = SPI_MODE_MASTER;
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80002da: 4b16 ldr r3, [pc, #88] ; (8000334 <MX_SPI2_Init+0x64>)
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80002dc: f44f 7282 mov.w r2, #260 ; 0x104
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80002e0: 605a str r2, [r3, #4]
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hspi2.Init.Direction = SPI_DIRECTION_2LINES;
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80002e2: 4b14 ldr r3, [pc, #80] ; (8000334 <MX_SPI2_Init+0x64>)
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80002e4: 2200 movs r2, #0
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80002e6: 609a str r2, [r3, #8]
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hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
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80002e8: 4b12 ldr r3, [pc, #72] ; (8000334 <MX_SPI2_Init+0x64>)
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80002ea: 2200 movs r2, #0
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80002ec: 60da str r2, [r3, #12]
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hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
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80002ee: 4b11 ldr r3, [pc, #68] ; (8000334 <MX_SPI2_Init+0x64>)
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80002f0: 2200 movs r2, #0
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80002f2: 611a str r2, [r3, #16]
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hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
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80002f4: 4b0f ldr r3, [pc, #60] ; (8000334 <MX_SPI2_Init+0x64>)
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80002f6: 2200 movs r2, #0
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80002f8: 615a str r2, [r3, #20]
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hspi2.Init.NSS = SPI_NSS_SOFT;
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80002fa: 4b0e ldr r3, [pc, #56] ; (8000334 <MX_SPI2_Init+0x64>)
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80002fc: f44f 7200 mov.w r2, #512 ; 0x200
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8000300: 619a str r2, [r3, #24]
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hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
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8000302: 4b0c ldr r3, [pc, #48] ; (8000334 <MX_SPI2_Init+0x64>)
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8000304: 2200 movs r2, #0
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8000306: 61da str r2, [r3, #28]
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hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
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8000308: 4b0a ldr r3, [pc, #40] ; (8000334 <MX_SPI2_Init+0x64>)
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800030a: 2200 movs r2, #0
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800030c: 621a str r2, [r3, #32]
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hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
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800030e: 4b09 ldr r3, [pc, #36] ; (8000334 <MX_SPI2_Init+0x64>)
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8000310: 2200 movs r2, #0
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8000312: 625a str r2, [r3, #36] ; 0x24
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hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
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8000314: 4b07 ldr r3, [pc, #28] ; (8000334 <MX_SPI2_Init+0x64>)
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8000316: 2200 movs r2, #0
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8000318: 629a str r2, [r3, #40] ; 0x28
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hspi2.Init.CRCPolynomial = 10;
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800031a: 4b06 ldr r3, [pc, #24] ; (8000334 <MX_SPI2_Init+0x64>)
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800031c: 220a movs r2, #10
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800031e: 62da str r2, [r3, #44] ; 0x2c
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if (HAL_SPI_Init(&hspi2) != HAL_OK)
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8000320: 4804 ldr r0, [pc, #16] ; (8000334 <MX_SPI2_Init+0x64>)
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8000322: f001 f985 bl 8001630 <HAL_SPI_Init>
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8000326: 4603 mov r3, r0
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8000328: 2b00 cmp r3, #0
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800032a: d001 beq.n 8000330 <MX_SPI2_Init+0x60>
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{
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Error_Handler();
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800032c: f000 f8fe bl 800052c <Error_Handler>
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}
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/* USER CODE BEGIN SPI2_Init 2 */
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/* USER CODE END SPI2_Init 2 */
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}
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8000330: bf00 nop
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8000332: bd80 pop {r7, pc}
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8000334: 200000e4 .word 0x200000e4
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8000338: 40003800 .word 0x40003800
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0800033c <MX_GPIO_Init>:
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* @brief GPIO Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_GPIO_Init(void)
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{
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800033c: b580 push {r7, lr}
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800033e: b08a sub sp, #40 ; 0x28
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8000340: af00 add r7, sp, #0
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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8000342: f107 0318 add.w r3, r7, #24
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8000346: 2200 movs r2, #0
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8000348: 601a str r2, [r3, #0]
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800034a: 605a str r2, [r3, #4]
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800034c: 609a str r2, [r3, #8]
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800034e: 60da str r2, [r3, #12]
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/* GPIO Ports Clock Enable */
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__HAL_RCC_GPIOE_CLK_ENABLE();
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8000350: 4b40 ldr r3, [pc, #256] ; (8000454 <MX_GPIO_Init+0x118>)
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8000352: 699b ldr r3, [r3, #24]
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8000354: 4a3f ldr r2, [pc, #252] ; (8000454 <MX_GPIO_Init+0x118>)
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8000356: f043 0340 orr.w r3, r3, #64 ; 0x40
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800035a: 6193 str r3, [r2, #24]
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800035c: 4b3d ldr r3, [pc, #244] ; (8000454 <MX_GPIO_Init+0x118>)
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800035e: 699b ldr r3, [r3, #24]
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8000360: f003 0340 and.w r3, r3, #64 ; 0x40
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8000364: 617b str r3, [r7, #20]
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8000366: 697b ldr r3, [r7, #20]
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__HAL_RCC_GPIOB_CLK_ENABLE();
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8000368: 4b3a ldr r3, [pc, #232] ; (8000454 <MX_GPIO_Init+0x118>)
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800036a: 699b ldr r3, [r3, #24]
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800036c: 4a39 ldr r2, [pc, #228] ; (8000454 <MX_GPIO_Init+0x118>)
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800036e: f043 0308 orr.w r3, r3, #8
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8000372: 6193 str r3, [r2, #24]
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8000374: 4b37 ldr r3, [pc, #220] ; (8000454 <MX_GPIO_Init+0x118>)
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8000376: 699b ldr r3, [r3, #24]
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8000378: f003 0308 and.w r3, r3, #8
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800037c: 613b str r3, [r7, #16]
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800037e: 693b ldr r3, [r7, #16]
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__HAL_RCC_GPIOG_CLK_ENABLE();
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8000380: 4b34 ldr r3, [pc, #208] ; (8000454 <MX_GPIO_Init+0x118>)
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8000382: 699b ldr r3, [r3, #24]
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8000384: 4a33 ldr r2, [pc, #204] ; (8000454 <MX_GPIO_Init+0x118>)
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8000386: f443 7380 orr.w r3, r3, #256 ; 0x100
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800038a: 6193 str r3, [r2, #24]
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800038c: 4b31 ldr r3, [pc, #196] ; (8000454 <MX_GPIO_Init+0x118>)
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800038e: 699b ldr r3, [r3, #24]
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8000390: f403 7380 and.w r3, r3, #256 ; 0x100
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8000394: 60fb str r3, [r7, #12]
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8000396: 68fb ldr r3, [r7, #12]
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__HAL_RCC_GPIOD_CLK_ENABLE();
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8000398: 4b2e ldr r3, [pc, #184] ; (8000454 <MX_GPIO_Init+0x118>)
|
||
800039a: 699b ldr r3, [r3, #24]
|
||
800039c: 4a2d ldr r2, [pc, #180] ; (8000454 <MX_GPIO_Init+0x118>)
|
||
800039e: f043 0320 orr.w r3, r3, #32
|
||
80003a2: 6193 str r3, [r2, #24]
|
||
80003a4: 4b2b ldr r3, [pc, #172] ; (8000454 <MX_GPIO_Init+0x118>)
|
||
80003a6: 699b ldr r3, [r3, #24]
|
||
80003a8: f003 0320 and.w r3, r3, #32
|
||
80003ac: 60bb str r3, [r7, #8]
|
||
80003ae: 68bb ldr r3, [r7, #8]
|
||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||
80003b0: 4b28 ldr r3, [pc, #160] ; (8000454 <MX_GPIO_Init+0x118>)
|
||
80003b2: 699b ldr r3, [r3, #24]
|
||
80003b4: 4a27 ldr r2, [pc, #156] ; (8000454 <MX_GPIO_Init+0x118>)
|
||
80003b6: f043 0304 orr.w r3, r3, #4
|
||
80003ba: 6193 str r3, [r2, #24]
|
||
80003bc: 4b25 ldr r3, [pc, #148] ; (8000454 <MX_GPIO_Init+0x118>)
|
||
80003be: 699b ldr r3, [r3, #24]
|
||
80003c0: f003 0304 and.w r3, r3, #4
|
||
80003c4: 607b str r3, [r7, #4]
|
||
80003c6: 687b ldr r3, [r7, #4]
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(GPIOB, LCD_BL_Pin|FLASH_E_Pin, GPIO_PIN_RESET);
|
||
80003c8: 2200 movs r2, #0
|
||
80003ca: f241 0101 movw r1, #4097 ; 0x1001
|
||
80003ce: 4822 ldr r0, [pc, #136] ; (8000458 <MX_GPIO_Init+0x11c>)
|
||
80003d0: f000 fd2d bl 8000e2e <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(SD_E_GPIO_Port, SD_E_Pin, GPIO_PIN_RESET);
|
||
80003d4: 2200 movs r2, #0
|
||
80003d6: 2104 movs r1, #4
|
||
80003d8: 4820 ldr r0, [pc, #128] ; (800045c <MX_GPIO_Init+0x120>)
|
||
80003da: f000 fd28 bl 8000e2e <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pins : KEY_UP_Pin KEY_B_Pin KEY_DOWN_Pin */
|
||
GPIO_InitStruct.Pin = KEY_UP_Pin|KEY_B_Pin|KEY_DOWN_Pin;
|
||
80003de: 231c movs r3, #28
|
||
80003e0: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||
80003e2: 2300 movs r3, #0
|
||
80003e4: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||
80003e6: 2301 movs r3, #1
|
||
80003e8: 623b str r3, [r7, #32]
|
||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||
80003ea: f107 0318 add.w r3, r7, #24
|
||
80003ee: 4619 mov r1, r3
|
||
80003f0: 481b ldr r0, [pc, #108] ; (8000460 <MX_GPIO_Init+0x124>)
|
||
80003f2: f000 fb71 bl 8000ad8 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : LCD_BL_Pin */
|
||
GPIO_InitStruct.Pin = LCD_BL_Pin;
|
||
80003f6: 2301 movs r3, #1
|
||
80003f8: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
80003fa: 2301 movs r3, #1
|
||
80003fc: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
80003fe: 2300 movs r3, #0
|
||
8000400: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||
8000402: 2302 movs r3, #2
|
||
8000404: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(LCD_BL_GPIO_Port, &GPIO_InitStruct);
|
||
8000406: f107 0318 add.w r3, r7, #24
|
||
800040a: 4619 mov r1, r3
|
||
800040c: 4812 ldr r0, [pc, #72] ; (8000458 <MX_GPIO_Init+0x11c>)
|
||
800040e: f000 fb63 bl 8000ad8 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : FLASH_E_Pin */
|
||
GPIO_InitStruct.Pin = FLASH_E_Pin;
|
||
8000412: f44f 5380 mov.w r3, #4096 ; 0x1000
|
||
8000416: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
8000418: 2301 movs r3, #1
|
||
800041a: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
800041c: 2300 movs r3, #0
|
||
800041e: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8000420: 2303 movs r3, #3
|
||
8000422: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(FLASH_E_GPIO_Port, &GPIO_InitStruct);
|
||
8000424: f107 0318 add.w r3, r7, #24
|
||
8000428: 4619 mov r1, r3
|
||
800042a: 480b ldr r0, [pc, #44] ; (8000458 <MX_GPIO_Init+0x11c>)
|
||
800042c: f000 fb54 bl 8000ad8 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : SD_E_Pin */
|
||
GPIO_InitStruct.Pin = SD_E_Pin;
|
||
8000430: 2304 movs r3, #4
|
||
8000432: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
8000434: 2301 movs r3, #1
|
||
8000436: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
8000438: 2300 movs r3, #0
|
||
800043a: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
800043c: 2303 movs r3, #3
|
||
800043e: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(SD_E_GPIO_Port, &GPIO_InitStruct);
|
||
8000440: f107 0318 add.w r3, r7, #24
|
||
8000444: 4619 mov r1, r3
|
||
8000446: 4805 ldr r0, [pc, #20] ; (800045c <MX_GPIO_Init+0x120>)
|
||
8000448: f000 fb46 bl 8000ad8 <HAL_GPIO_Init>
|
||
|
||
}
|
||
800044c: bf00 nop
|
||
800044e: 3728 adds r7, #40 ; 0x28
|
||
8000450: 46bd mov sp, r7
|
||
8000452: bd80 pop {r7, pc}
|
||
8000454: 40021000 .word 0x40021000
|
||
8000458: 40010c00 .word 0x40010c00
|
||
800045c: 40011400 .word 0x40011400
|
||
8000460: 40011800 .word 0x40011800
|
||
|
||
08000464 <MX_FSMC_Init>:
|
||
|
||
/* FSMC initialization function */
|
||
static void MX_FSMC_Init(void)
|
||
{
|
||
8000464: b580 push {r7, lr}
|
||
8000466: b088 sub sp, #32
|
||
8000468: af00 add r7, sp, #0
|
||
|
||
/* USER CODE BEGIN FSMC_Init 0 */
|
||
|
||
/* USER CODE END FSMC_Init 0 */
|
||
|
||
FSMC_NORSRAM_TimingTypeDef Timing = {0};
|
||
800046a: 1d3b adds r3, r7, #4
|
||
800046c: 2200 movs r2, #0
|
||
800046e: 601a str r2, [r3, #0]
|
||
8000470: 605a str r2, [r3, #4]
|
||
8000472: 609a str r2, [r3, #8]
|
||
8000474: 60da str r2, [r3, #12]
|
||
8000476: 611a str r2, [r3, #16]
|
||
8000478: 615a str r2, [r3, #20]
|
||
800047a: 619a str r2, [r3, #24]
|
||
|
||
/* USER CODE END FSMC_Init 1 */
|
||
|
||
/** Perform the SRAM1 memory initialization sequence
|
||
*/
|
||
hsram1.Instance = FSMC_NORSRAM_DEVICE;
|
||
800047c: 4b28 ldr r3, [pc, #160] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
800047e: f04f 4220 mov.w r2, #2684354560 ; 0xa0000000
|
||
8000482: 601a str r2, [r3, #0]
|
||
hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
|
||
8000484: 4b26 ldr r3, [pc, #152] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
8000486: 4a27 ldr r2, [pc, #156] ; (8000524 <MX_FSMC_Init+0xc0>)
|
||
8000488: 605a str r2, [r3, #4]
|
||
/* hsram1.Init */
|
||
hsram1.Init.NSBank = FSMC_NORSRAM_BANK4;
|
||
800048a: 4b25 ldr r3, [pc, #148] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
800048c: 2206 movs r2, #6
|
||
800048e: 609a str r2, [r3, #8]
|
||
hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
|
||
8000490: 4b23 ldr r3, [pc, #140] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
8000492: 2200 movs r2, #0
|
||
8000494: 60da str r2, [r3, #12]
|
||
hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
|
||
8000496: 4b22 ldr r3, [pc, #136] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
8000498: 2200 movs r2, #0
|
||
800049a: 611a str r2, [r3, #16]
|
||
hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
|
||
800049c: 4b20 ldr r3, [pc, #128] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
800049e: 2210 movs r2, #16
|
||
80004a0: 615a str r2, [r3, #20]
|
||
hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
|
||
80004a2: 4b1f ldr r3, [pc, #124] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
80004a4: 2200 movs r2, #0
|
||
80004a6: 619a str r2, [r3, #24]
|
||
hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
|
||
80004a8: 4b1d ldr r3, [pc, #116] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
80004aa: 2200 movs r2, #0
|
||
80004ac: 61da str r2, [r3, #28]
|
||
hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
|
||
80004ae: 4b1c ldr r3, [pc, #112] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
80004b0: 2200 movs r2, #0
|
||
80004b2: 621a str r2, [r3, #32]
|
||
hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
|
||
80004b4: 4b1a ldr r3, [pc, #104] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
80004b6: 2200 movs r2, #0
|
||
80004b8: 625a str r2, [r3, #36] ; 0x24
|
||
hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
|
||
80004ba: 4b19 ldr r3, [pc, #100] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
80004bc: f44f 5280 mov.w r2, #4096 ; 0x1000
|
||
80004c0: 629a str r2, [r3, #40] ; 0x28
|
||
hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
|
||
80004c2: 4b17 ldr r3, [pc, #92] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
80004c4: 2200 movs r2, #0
|
||
80004c6: 62da str r2, [r3, #44] ; 0x2c
|
||
hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
|
||
80004c8: 4b15 ldr r3, [pc, #84] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
80004ca: 2200 movs r2, #0
|
||
80004cc: 631a str r2, [r3, #48] ; 0x30
|
||
hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
|
||
80004ce: 4b14 ldr r3, [pc, #80] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
80004d0: 2200 movs r2, #0
|
||
80004d2: 635a str r2, [r3, #52] ; 0x34
|
||
hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
|
||
80004d4: 4b12 ldr r3, [pc, #72] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
80004d6: 2200 movs r2, #0
|
||
80004d8: 639a str r2, [r3, #56] ; 0x38
|
||
/* Timing */
|
||
Timing.AddressSetupTime = 0;
|
||
80004da: 2300 movs r3, #0
|
||
80004dc: 607b str r3, [r7, #4]
|
||
Timing.AddressHoldTime = 15;
|
||
80004de: 230f movs r3, #15
|
||
80004e0: 60bb str r3, [r7, #8]
|
||
Timing.DataSetupTime = 1;
|
||
80004e2: 2301 movs r3, #1
|
||
80004e4: 60fb str r3, [r7, #12]
|
||
Timing.BusTurnAroundDuration = 15;
|
||
80004e6: 230f movs r3, #15
|
||
80004e8: 613b str r3, [r7, #16]
|
||
Timing.CLKDivision = 16;
|
||
80004ea: 2310 movs r3, #16
|
||
80004ec: 617b str r3, [r7, #20]
|
||
Timing.DataLatency = 17;
|
||
80004ee: 2311 movs r3, #17
|
||
80004f0: 61bb str r3, [r7, #24]
|
||
Timing.AccessMode = FSMC_ACCESS_MODE_A;
|
||
80004f2: 2300 movs r3, #0
|
||
80004f4: 61fb str r3, [r7, #28]
|
||
/* ExtTiming */
|
||
|
||
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
|
||
80004f6: 1d3b adds r3, r7, #4
|
||
80004f8: 2200 movs r2, #0
|
||
80004fa: 4619 mov r1, r3
|
||
80004fc: 4808 ldr r0, [pc, #32] ; (8000520 <MX_FSMC_Init+0xbc>)
|
||
80004fe: f001 fe0f bl 8002120 <HAL_SRAM_Init>
|
||
8000502: 4603 mov r3, r0
|
||
8000504: 2b00 cmp r3, #0
|
||
8000506: d001 beq.n 800050c <MX_FSMC_Init+0xa8>
|
||
{
|
||
Error_Handler( );
|
||
8000508: f000 f810 bl 800052c <Error_Handler>
|
||
}
|
||
|
||
/** Disconnect NADV
|
||
*/
|
||
|
||
__HAL_AFIO_FSMCNADV_DISCONNECTED();
|
||
800050c: 4b06 ldr r3, [pc, #24] ; (8000528 <MX_FSMC_Init+0xc4>)
|
||
800050e: 69db ldr r3, [r3, #28]
|
||
8000510: 4a05 ldr r2, [pc, #20] ; (8000528 <MX_FSMC_Init+0xc4>)
|
||
8000512: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
||
8000516: 61d3 str r3, [r2, #28]
|
||
|
||
/* USER CODE BEGIN FSMC_Init 2 */
|
||
|
||
/* USER CODE END FSMC_Init 2 */
|
||
}
|
||
8000518: bf00 nop
|
||
800051a: 3720 adds r7, #32
|
||
800051c: 46bd mov sp, r7
|
||
800051e: bd80 pop {r7, pc}
|
||
8000520: 2000013c .word 0x2000013c
|
||
8000524: a0000104 .word 0xa0000104
|
||
8000528: 40010000 .word 0x40010000
|
||
|
||
0800052c <Error_Handler>:
|
||
/**
|
||
* @brief This function is executed in case of error occurrence.
|
||
* @retval None
|
||
*/
|
||
void Error_Handler(void)
|
||
{
|
||
800052c: b480 push {r7}
|
||
800052e: af00 add r7, sp, #0
|
||
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
||
Can only be executed in Privileged modes.
|
||
*/
|
||
__STATIC_FORCEINLINE void __disable_irq(void)
|
||
{
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
8000530: b672 cpsid i
|
||
}
|
||
8000532: bf00 nop
|
||
/* USER CODE BEGIN Error_Handler_Debug */
|
||
/* User can add his own implementation to report the HAL error return state */
|
||
__disable_irq();
|
||
while (1)
|
||
8000534: e7fe b.n 8000534 <Error_Handler+0x8>
|
||
...
|
||
|
||
08000538 <HAL_MspInit>:
|
||
/* USER CODE END 0 */
|
||
/**
|
||
* Initializes the Global MSP.
|
||
*/
|
||
void HAL_MspInit(void)
|
||
{
|
||
8000538: b480 push {r7}
|
||
800053a: b085 sub sp, #20
|
||
800053c: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN MspInit 0 */
|
||
|
||
/* USER CODE END MspInit 0 */
|
||
|
||
__HAL_RCC_AFIO_CLK_ENABLE();
|
||
800053e: 4b15 ldr r3, [pc, #84] ; (8000594 <HAL_MspInit+0x5c>)
|
||
8000540: 699b ldr r3, [r3, #24]
|
||
8000542: 4a14 ldr r2, [pc, #80] ; (8000594 <HAL_MspInit+0x5c>)
|
||
8000544: f043 0301 orr.w r3, r3, #1
|
||
8000548: 6193 str r3, [r2, #24]
|
||
800054a: 4b12 ldr r3, [pc, #72] ; (8000594 <HAL_MspInit+0x5c>)
|
||
800054c: 699b ldr r3, [r3, #24]
|
||
800054e: f003 0301 and.w r3, r3, #1
|
||
8000552: 60bb str r3, [r7, #8]
|
||
8000554: 68bb ldr r3, [r7, #8]
|
||
__HAL_RCC_PWR_CLK_ENABLE();
|
||
8000556: 4b0f ldr r3, [pc, #60] ; (8000594 <HAL_MspInit+0x5c>)
|
||
8000558: 69db ldr r3, [r3, #28]
|
||
800055a: 4a0e ldr r2, [pc, #56] ; (8000594 <HAL_MspInit+0x5c>)
|
||
800055c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
||
8000560: 61d3 str r3, [r2, #28]
|
||
8000562: 4b0c ldr r3, [pc, #48] ; (8000594 <HAL_MspInit+0x5c>)
|
||
8000564: 69db ldr r3, [r3, #28]
|
||
8000566: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
800056a: 607b str r3, [r7, #4]
|
||
800056c: 687b ldr r3, [r7, #4]
|
||
|
||
/* System interrupt init*/
|
||
|
||
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
|
||
*/
|
||
__HAL_AFIO_REMAP_SWJ_NOJTAG();
|
||
800056e: 4b0a ldr r3, [pc, #40] ; (8000598 <HAL_MspInit+0x60>)
|
||
8000570: 685b ldr r3, [r3, #4]
|
||
8000572: 60fb str r3, [r7, #12]
|
||
8000574: 68fb ldr r3, [r7, #12]
|
||
8000576: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
|
||
800057a: 60fb str r3, [r7, #12]
|
||
800057c: 68fb ldr r3, [r7, #12]
|
||
800057e: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000
|
||
8000582: 60fb str r3, [r7, #12]
|
||
8000584: 4a04 ldr r2, [pc, #16] ; (8000598 <HAL_MspInit+0x60>)
|
||
8000586: 68fb ldr r3, [r7, #12]
|
||
8000588: 6053 str r3, [r2, #4]
|
||
|
||
/* USER CODE BEGIN MspInit 1 */
|
||
|
||
/* USER CODE END MspInit 1 */
|
||
}
|
||
800058a: bf00 nop
|
||
800058c: 3714 adds r7, #20
|
||
800058e: 46bd mov sp, r7
|
||
8000590: bc80 pop {r7}
|
||
8000592: 4770 bx lr
|
||
8000594: 40021000 .word 0x40021000
|
||
8000598: 40010000 .word 0x40010000
|
||
|
||
0800059c <HAL_SPI_MspInit>:
|
||
* This function configures the hardware resources used in this example
|
||
* @param hspi: SPI handle pointer
|
||
* @retval None
|
||
*/
|
||
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
|
||
{
|
||
800059c: b580 push {r7, lr}
|
||
800059e: b088 sub sp, #32
|
||
80005a0: af00 add r7, sp, #0
|
||
80005a2: 6078 str r0, [r7, #4]
|
||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||
80005a4: f107 0310 add.w r3, r7, #16
|
||
80005a8: 2200 movs r2, #0
|
||
80005aa: 601a str r2, [r3, #0]
|
||
80005ac: 605a str r2, [r3, #4]
|
||
80005ae: 609a str r2, [r3, #8]
|
||
80005b0: 60da str r2, [r3, #12]
|
||
if(hspi->Instance==SPI2)
|
||
80005b2: 687b ldr r3, [r7, #4]
|
||
80005b4: 681b ldr r3, [r3, #0]
|
||
80005b6: 4a1c ldr r2, [pc, #112] ; (8000628 <HAL_SPI_MspInit+0x8c>)
|
||
80005b8: 4293 cmp r3, r2
|
||
80005ba: d131 bne.n 8000620 <HAL_SPI_MspInit+0x84>
|
||
{
|
||
/* USER CODE BEGIN SPI2_MspInit 0 */
|
||
|
||
/* USER CODE END SPI2_MspInit 0 */
|
||
/* Peripheral clock enable */
|
||
__HAL_RCC_SPI2_CLK_ENABLE();
|
||
80005bc: 4b1b ldr r3, [pc, #108] ; (800062c <HAL_SPI_MspInit+0x90>)
|
||
80005be: 69db ldr r3, [r3, #28]
|
||
80005c0: 4a1a ldr r2, [pc, #104] ; (800062c <HAL_SPI_MspInit+0x90>)
|
||
80005c2: f443 4380 orr.w r3, r3, #16384 ; 0x4000
|
||
80005c6: 61d3 str r3, [r2, #28]
|
||
80005c8: 4b18 ldr r3, [pc, #96] ; (800062c <HAL_SPI_MspInit+0x90>)
|
||
80005ca: 69db ldr r3, [r3, #28]
|
||
80005cc: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
||
80005d0: 60fb str r3, [r7, #12]
|
||
80005d2: 68fb ldr r3, [r7, #12]
|
||
|
||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||
80005d4: 4b15 ldr r3, [pc, #84] ; (800062c <HAL_SPI_MspInit+0x90>)
|
||
80005d6: 699b ldr r3, [r3, #24]
|
||
80005d8: 4a14 ldr r2, [pc, #80] ; (800062c <HAL_SPI_MspInit+0x90>)
|
||
80005da: f043 0308 orr.w r3, r3, #8
|
||
80005de: 6193 str r3, [r2, #24]
|
||
80005e0: 4b12 ldr r3, [pc, #72] ; (800062c <HAL_SPI_MspInit+0x90>)
|
||
80005e2: 699b ldr r3, [r3, #24]
|
||
80005e4: f003 0308 and.w r3, r3, #8
|
||
80005e8: 60bb str r3, [r7, #8]
|
||
80005ea: 68bb ldr r3, [r7, #8]
|
||
/**SPI2 GPIO Configuration
|
||
PB13 ------> SPI2_SCK
|
||
PB14 ------> SPI2_MISO
|
||
PB15 ------> SPI2_MOSI
|
||
*/
|
||
GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_15;
|
||
80005ec: f44f 4320 mov.w r3, #40960 ; 0xa000
|
||
80005f0: 613b str r3, [r7, #16]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
80005f2: 2302 movs r3, #2
|
||
80005f4: 617b str r3, [r7, #20]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
80005f6: 2303 movs r3, #3
|
||
80005f8: 61fb str r3, [r7, #28]
|
||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
80005fa: f107 0310 add.w r3, r7, #16
|
||
80005fe: 4619 mov r1, r3
|
||
8000600: 480b ldr r0, [pc, #44] ; (8000630 <HAL_SPI_MspInit+0x94>)
|
||
8000602: f000 fa69 bl 8000ad8 <HAL_GPIO_Init>
|
||
|
||
GPIO_InitStruct.Pin = GPIO_PIN_14;
|
||
8000606: f44f 4380 mov.w r3, #16384 ; 0x4000
|
||
800060a: 613b str r3, [r7, #16]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||
800060c: 2300 movs r3, #0
|
||
800060e: 617b str r3, [r7, #20]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
8000610: 2300 movs r3, #0
|
||
8000612: 61bb str r3, [r7, #24]
|
||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
8000614: f107 0310 add.w r3, r7, #16
|
||
8000618: 4619 mov r1, r3
|
||
800061a: 4805 ldr r0, [pc, #20] ; (8000630 <HAL_SPI_MspInit+0x94>)
|
||
800061c: f000 fa5c bl 8000ad8 <HAL_GPIO_Init>
|
||
/* USER CODE BEGIN SPI2_MspInit 1 */
|
||
|
||
/* USER CODE END SPI2_MspInit 1 */
|
||
}
|
||
|
||
}
|
||
8000620: bf00 nop
|
||
8000622: 3720 adds r7, #32
|
||
8000624: 46bd mov sp, r7
|
||
8000626: bd80 pop {r7, pc}
|
||
8000628: 40003800 .word 0x40003800
|
||
800062c: 40021000 .word 0x40021000
|
||
8000630: 40010c00 .word 0x40010c00
|
||
|
||
08000634 <HAL_FSMC_MspInit>:
|
||
|
||
}
|
||
|
||
static uint32_t FSMC_Initialized = 0;
|
||
|
||
static void HAL_FSMC_MspInit(void){
|
||
8000634: b580 push {r7, lr}
|
||
8000636: b086 sub sp, #24
|
||
8000638: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN FSMC_MspInit 0 */
|
||
|
||
/* USER CODE END FSMC_MspInit 0 */
|
||
GPIO_InitTypeDef GPIO_InitStruct ={0};
|
||
800063a: f107 0308 add.w r3, r7, #8
|
||
800063e: 2200 movs r2, #0
|
||
8000640: 601a str r2, [r3, #0]
|
||
8000642: 605a str r2, [r3, #4]
|
||
8000644: 609a str r2, [r3, #8]
|
||
8000646: 60da str r2, [r3, #12]
|
||
if (FSMC_Initialized) {
|
||
8000648: 4b1f ldr r3, [pc, #124] ; (80006c8 <HAL_FSMC_MspInit+0x94>)
|
||
800064a: 681b ldr r3, [r3, #0]
|
||
800064c: 2b00 cmp r3, #0
|
||
800064e: d136 bne.n 80006be <HAL_FSMC_MspInit+0x8a>
|
||
return;
|
||
}
|
||
FSMC_Initialized = 1;
|
||
8000650: 4b1d ldr r3, [pc, #116] ; (80006c8 <HAL_FSMC_MspInit+0x94>)
|
||
8000652: 2201 movs r2, #1
|
||
8000654: 601a str r2, [r3, #0]
|
||
|
||
/* Peripheral clock enable */
|
||
__HAL_RCC_FSMC_CLK_ENABLE();
|
||
8000656: 4b1d ldr r3, [pc, #116] ; (80006cc <HAL_FSMC_MspInit+0x98>)
|
||
8000658: 695b ldr r3, [r3, #20]
|
||
800065a: 4a1c ldr r2, [pc, #112] ; (80006cc <HAL_FSMC_MspInit+0x98>)
|
||
800065c: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
8000660: 6153 str r3, [r2, #20]
|
||
8000662: 4b1a ldr r3, [pc, #104] ; (80006cc <HAL_FSMC_MspInit+0x98>)
|
||
8000664: 695b ldr r3, [r3, #20]
|
||
8000666: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
800066a: 607b str r3, [r7, #4]
|
||
800066c: 687b ldr r3, [r7, #4]
|
||
PD1 ------> FSMC_D3
|
||
PD4 ------> FSMC_NOE
|
||
PD5 ------> FSMC_NWE
|
||
PG12 ------> FSMC_NE4
|
||
*/
|
||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_12;
|
||
800066e: f241 0301 movw r3, #4097 ; 0x1001
|
||
8000672: 60bb str r3, [r7, #8]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
8000674: 2302 movs r3, #2
|
||
8000676: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8000678: 2303 movs r3, #3
|
||
800067a: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||
800067c: f107 0308 add.w r3, r7, #8
|
||
8000680: 4619 mov r1, r3
|
||
8000682: 4813 ldr r0, [pc, #76] ; (80006d0 <HAL_FSMC_MspInit+0x9c>)
|
||
8000684: f000 fa28 bl 8000ad8 <HAL_GPIO_Init>
|
||
|
||
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
|
||
8000688: f64f 7380 movw r3, #65408 ; 0xff80
|
||
800068c: 60bb str r3, [r7, #8]
|
||
|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
|
||
|GPIO_PIN_15;
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
800068e: 2302 movs r3, #2
|
||
8000690: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8000692: 2303 movs r3, #3
|
||
8000694: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||
8000696: f107 0308 add.w r3, r7, #8
|
||
800069a: 4619 mov r1, r3
|
||
800069c: 480d ldr r0, [pc, #52] ; (80006d4 <HAL_FSMC_MspInit+0xa0>)
|
||
800069e: f000 fa1b bl 8000ad8 <HAL_GPIO_Init>
|
||
|
||
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
|
||
80006a2: f24c 7333 movw r3, #50995 ; 0xc733
|
||
80006a6: 60bb str r3, [r7, #8]
|
||
|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4
|
||
|GPIO_PIN_5;
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
80006a8: 2302 movs r3, #2
|
||
80006aa: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
80006ac: 2303 movs r3, #3
|
||
80006ae: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||
80006b0: f107 0308 add.w r3, r7, #8
|
||
80006b4: 4619 mov r1, r3
|
||
80006b6: 4808 ldr r0, [pc, #32] ; (80006d8 <HAL_FSMC_MspInit+0xa4>)
|
||
80006b8: f000 fa0e bl 8000ad8 <HAL_GPIO_Init>
|
||
80006bc: e000 b.n 80006c0 <HAL_FSMC_MspInit+0x8c>
|
||
return;
|
||
80006be: bf00 nop
|
||
|
||
/* USER CODE BEGIN FSMC_MspInit 1 */
|
||
|
||
/* USER CODE END FSMC_MspInit 1 */
|
||
}
|
||
80006c0: 3718 adds r7, #24
|
||
80006c2: 46bd mov sp, r7
|
||
80006c4: bd80 pop {r7, pc}
|
||
80006c6: bf00 nop
|
||
80006c8: 200000a4 .word 0x200000a4
|
||
80006cc: 40021000 .word 0x40021000
|
||
80006d0: 40012000 .word 0x40012000
|
||
80006d4: 40011800 .word 0x40011800
|
||
80006d8: 40011400 .word 0x40011400
|
||
|
||
080006dc <HAL_SRAM_MspInit>:
|
||
|
||
void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){
|
||
80006dc: b580 push {r7, lr}
|
||
80006de: b082 sub sp, #8
|
||
80006e0: af00 add r7, sp, #0
|
||
80006e2: 6078 str r0, [r7, #4]
|
||
/* USER CODE BEGIN SRAM_MspInit 0 */
|
||
|
||
/* USER CODE END SRAM_MspInit 0 */
|
||
HAL_FSMC_MspInit();
|
||
80006e4: f7ff ffa6 bl 8000634 <HAL_FSMC_MspInit>
|
||
/* USER CODE BEGIN SRAM_MspInit 1 */
|
||
|
||
/* USER CODE END SRAM_MspInit 1 */
|
||
}
|
||
80006e8: bf00 nop
|
||
80006ea: 3708 adds r7, #8
|
||
80006ec: 46bd mov sp, r7
|
||
80006ee: bd80 pop {r7, pc}
|
||
|
||
080006f0 <NMI_Handler>:
|
||
/******************************************************************************/
|
||
/**
|
||
* @brief This function handles Non maskable interrupt.
|
||
*/
|
||
void NMI_Handler(void)
|
||
{
|
||
80006f0: b480 push {r7}
|
||
80006f2: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||
|
||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||
while (1)
|
||
80006f4: e7fe b.n 80006f4 <NMI_Handler+0x4>
|
||
|
||
080006f6 <HardFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Hard fault interrupt.
|
||
*/
|
||
void HardFault_Handler(void)
|
||
{
|
||
80006f6: b480 push {r7}
|
||
80006f8: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||
|
||
/* USER CODE END HardFault_IRQn 0 */
|
||
while (1)
|
||
80006fa: e7fe b.n 80006fa <HardFault_Handler+0x4>
|
||
|
||
080006fc <MemManage_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Memory management fault.
|
||
*/
|
||
void MemManage_Handler(void)
|
||
{
|
||
80006fc: b480 push {r7}
|
||
80006fe: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||
|
||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||
while (1)
|
||
8000700: e7fe b.n 8000700 <MemManage_Handler+0x4>
|
||
|
||
08000702 <BusFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Prefetch fault, memory access fault.
|
||
*/
|
||
void BusFault_Handler(void)
|
||
{
|
||
8000702: b480 push {r7}
|
||
8000704: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||
|
||
/* USER CODE END BusFault_IRQn 0 */
|
||
while (1)
|
||
8000706: e7fe b.n 8000706 <BusFault_Handler+0x4>
|
||
|
||
08000708 <UsageFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Undefined instruction or illegal state.
|
||
*/
|
||
void UsageFault_Handler(void)
|
||
{
|
||
8000708: b480 push {r7}
|
||
800070a: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||
|
||
/* USER CODE END UsageFault_IRQn 0 */
|
||
while (1)
|
||
800070c: e7fe b.n 800070c <UsageFault_Handler+0x4>
|
||
|
||
0800070e <SVC_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles System service call via SWI instruction.
|
||
*/
|
||
void SVC_Handler(void)
|
||
{
|
||
800070e: b480 push {r7}
|
||
8000710: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END SVCall_IRQn 0 */
|
||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||
|
||
/* USER CODE END SVCall_IRQn 1 */
|
||
}
|
||
8000712: bf00 nop
|
||
8000714: 46bd mov sp, r7
|
||
8000716: bc80 pop {r7}
|
||
8000718: 4770 bx lr
|
||
|
||
0800071a <DebugMon_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Debug monitor.
|
||
*/
|
||
void DebugMon_Handler(void)
|
||
{
|
||
800071a: b480 push {r7}
|
||
800071c: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||
|
||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||
}
|
||
800071e: bf00 nop
|
||
8000720: 46bd mov sp, r7
|
||
8000722: bc80 pop {r7}
|
||
8000724: 4770 bx lr
|
||
|
||
08000726 <PendSV_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Pendable request for system service.
|
||
*/
|
||
void PendSV_Handler(void)
|
||
{
|
||
8000726: b480 push {r7}
|
||
8000728: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END PendSV_IRQn 0 */
|
||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||
|
||
/* USER CODE END PendSV_IRQn 1 */
|
||
}
|
||
800072a: bf00 nop
|
||
800072c: 46bd mov sp, r7
|
||
800072e: bc80 pop {r7}
|
||
8000730: 4770 bx lr
|
||
|
||
08000732 <SysTick_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles System tick timer.
|
||
*/
|
||
void SysTick_Handler(void)
|
||
{
|
||
8000732: b580 push {r7, lr}
|
||
8000734: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||
|
||
/* USER CODE END SysTick_IRQn 0 */
|
||
HAL_IncTick();
|
||
8000736: f000 f8ab bl 8000890 <HAL_IncTick>
|
||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||
|
||
/* USER CODE END SysTick_IRQn 1 */
|
||
}
|
||
800073a: bf00 nop
|
||
800073c: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08000740 <_sbrk>:
|
||
*
|
||
* @param incr Memory size
|
||
* @return Pointer to allocated memory
|
||
*/
|
||
void *_sbrk(ptrdiff_t incr)
|
||
{
|
||
8000740: b580 push {r7, lr}
|
||
8000742: b086 sub sp, #24
|
||
8000744: af00 add r7, sp, #0
|
||
8000746: 6078 str r0, [r7, #4]
|
||
extern uint8_t _end; /* Symbol defined in the linker script */
|
||
extern uint8_t _estack; /* Symbol defined in the linker script */
|
||
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
||
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
||
8000748: 4a14 ldr r2, [pc, #80] ; (800079c <_sbrk+0x5c>)
|
||
800074a: 4b15 ldr r3, [pc, #84] ; (80007a0 <_sbrk+0x60>)
|
||
800074c: 1ad3 subs r3, r2, r3
|
||
800074e: 617b str r3, [r7, #20]
|
||
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||
8000750: 697b ldr r3, [r7, #20]
|
||
8000752: 613b str r3, [r7, #16]
|
||
uint8_t *prev_heap_end;
|
||
|
||
/* Initialize heap end at first call */
|
||
if (NULL == __sbrk_heap_end)
|
||
8000754: 4b13 ldr r3, [pc, #76] ; (80007a4 <_sbrk+0x64>)
|
||
8000756: 681b ldr r3, [r3, #0]
|
||
8000758: 2b00 cmp r3, #0
|
||
800075a: d102 bne.n 8000762 <_sbrk+0x22>
|
||
{
|
||
__sbrk_heap_end = &_end;
|
||
800075c: 4b11 ldr r3, [pc, #68] ; (80007a4 <_sbrk+0x64>)
|
||
800075e: 4a12 ldr r2, [pc, #72] ; (80007a8 <_sbrk+0x68>)
|
||
8000760: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Protect heap from growing into the reserved MSP stack */
|
||
if (__sbrk_heap_end + incr > max_heap)
|
||
8000762: 4b10 ldr r3, [pc, #64] ; (80007a4 <_sbrk+0x64>)
|
||
8000764: 681a ldr r2, [r3, #0]
|
||
8000766: 687b ldr r3, [r7, #4]
|
||
8000768: 4413 add r3, r2
|
||
800076a: 693a ldr r2, [r7, #16]
|
||
800076c: 429a cmp r2, r3
|
||
800076e: d207 bcs.n 8000780 <_sbrk+0x40>
|
||
{
|
||
errno = ENOMEM;
|
||
8000770: f005 fcca bl 8006108 <__errno>
|
||
8000774: 4603 mov r3, r0
|
||
8000776: 220c movs r2, #12
|
||
8000778: 601a str r2, [r3, #0]
|
||
return (void *)-1;
|
||
800077a: f04f 33ff mov.w r3, #4294967295
|
||
800077e: e009 b.n 8000794 <_sbrk+0x54>
|
||
}
|
||
|
||
prev_heap_end = __sbrk_heap_end;
|
||
8000780: 4b08 ldr r3, [pc, #32] ; (80007a4 <_sbrk+0x64>)
|
||
8000782: 681b ldr r3, [r3, #0]
|
||
8000784: 60fb str r3, [r7, #12]
|
||
__sbrk_heap_end += incr;
|
||
8000786: 4b07 ldr r3, [pc, #28] ; (80007a4 <_sbrk+0x64>)
|
||
8000788: 681a ldr r2, [r3, #0]
|
||
800078a: 687b ldr r3, [r7, #4]
|
||
800078c: 4413 add r3, r2
|
||
800078e: 4a05 ldr r2, [pc, #20] ; (80007a4 <_sbrk+0x64>)
|
||
8000790: 6013 str r3, [r2, #0]
|
||
|
||
return (void *)prev_heap_end;
|
||
8000792: 68fb ldr r3, [r7, #12]
|
||
}
|
||
8000794: 4618 mov r0, r3
|
||
8000796: 3718 adds r7, #24
|
||
8000798: 46bd mov sp, r7
|
||
800079a: bd80 pop {r7, pc}
|
||
800079c: 20010000 .word 0x20010000
|
||
80007a0: 00000800 .word 0x00000800
|
||
80007a4: 200000a8 .word 0x200000a8
|
||
80007a8: 20000868 .word 0x20000868
|
||
|
||
080007ac <SystemInit>:
|
||
* @note This function should be used only after reset.
|
||
* @param None
|
||
* @retval None
|
||
*/
|
||
void SystemInit (void)
|
||
{
|
||
80007ac: b480 push {r7}
|
||
80007ae: af00 add r7, sp, #0
|
||
|
||
/* Configure the Vector Table location -------------------------------------*/
|
||
#if defined(USER_VECT_TAB_ADDRESS)
|
||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
|
||
#endif /* USER_VECT_TAB_ADDRESS */
|
||
}
|
||
80007b0: bf00 nop
|
||
80007b2: 46bd mov sp, r7
|
||
80007b4: bc80 pop {r7}
|
||
80007b6: 4770 bx lr
|
||
|
||
080007b8 <Reset_Handler>:
|
||
.weak Reset_Handler
|
||
.type Reset_Handler, %function
|
||
Reset_Handler:
|
||
|
||
/* Copy the data segment initializers from flash to SRAM */
|
||
movs r1, #0
|
||
80007b8: 2100 movs r1, #0
|
||
b LoopCopyDataInit
|
||
80007ba: e003 b.n 80007c4 <LoopCopyDataInit>
|
||
|
||
080007bc <CopyDataInit>:
|
||
|
||
CopyDataInit:
|
||
ldr r3, =_sidata
|
||
80007bc: 4b0b ldr r3, [pc, #44] ; (80007ec <LoopFillZerobss+0x14>)
|
||
ldr r3, [r3, r1]
|
||
80007be: 585b ldr r3, [r3, r1]
|
||
str r3, [r0, r1]
|
||
80007c0: 5043 str r3, [r0, r1]
|
||
adds r1, r1, #4
|
||
80007c2: 3104 adds r1, #4
|
||
|
||
080007c4 <LoopCopyDataInit>:
|
||
|
||
LoopCopyDataInit:
|
||
ldr r0, =_sdata
|
||
80007c4: 480a ldr r0, [pc, #40] ; (80007f0 <LoopFillZerobss+0x18>)
|
||
ldr r3, =_edata
|
||
80007c6: 4b0b ldr r3, [pc, #44] ; (80007f4 <LoopFillZerobss+0x1c>)
|
||
adds r2, r0, r1
|
||
80007c8: 1842 adds r2, r0, r1
|
||
cmp r2, r3
|
||
80007ca: 429a cmp r2, r3
|
||
bcc CopyDataInit
|
||
80007cc: d3f6 bcc.n 80007bc <CopyDataInit>
|
||
ldr r2, =_sbss
|
||
80007ce: 4a0a ldr r2, [pc, #40] ; (80007f8 <LoopFillZerobss+0x20>)
|
||
b LoopFillZerobss
|
||
80007d0: e002 b.n 80007d8 <LoopFillZerobss>
|
||
|
||
080007d2 <FillZerobss>:
|
||
/* Zero fill the bss segment. */
|
||
FillZerobss:
|
||
movs r3, #0
|
||
80007d2: 2300 movs r3, #0
|
||
str r3, [r2], #4
|
||
80007d4: f842 3b04 str.w r3, [r2], #4
|
||
|
||
080007d8 <LoopFillZerobss>:
|
||
|
||
LoopFillZerobss:
|
||
ldr r3, = _ebss
|
||
80007d8: 4b08 ldr r3, [pc, #32] ; (80007fc <LoopFillZerobss+0x24>)
|
||
cmp r2, r3
|
||
80007da: 429a cmp r2, r3
|
||
bcc FillZerobss
|
||
80007dc: d3f9 bcc.n 80007d2 <FillZerobss>
|
||
|
||
/* Call the clock system intitialization function.*/
|
||
bl SystemInit
|
||
80007de: f7ff ffe5 bl 80007ac <SystemInit>
|
||
/* Call static constructors */
|
||
bl __libc_init_array
|
||
80007e2: f005 fc97 bl 8006114 <__libc_init_array>
|
||
/* Call the application's entry point.*/
|
||
bl main
|
||
80007e6: f7ff fd1d bl 8000224 <main>
|
||
bx lr
|
||
80007ea: 4770 bx lr
|
||
ldr r3, =_sidata
|
||
80007ec: 08007598 .word 0x08007598
|
||
ldr r0, =_sdata
|
||
80007f0: 20000000 .word 0x20000000
|
||
ldr r3, =_edata
|
||
80007f4: 20000088 .word 0x20000088
|
||
ldr r2, =_sbss
|
||
80007f8: 20000088 .word 0x20000088
|
||
ldr r3, = _ebss
|
||
80007fc: 20000864 .word 0x20000864
|
||
|
||
08000800 <ADC1_2_IRQHandler>:
|
||
* @retval : None
|
||
*/
|
||
.section .text.Default_Handler,"ax",%progbits
|
||
Default_Handler:
|
||
Infinite_Loop:
|
||
b Infinite_Loop
|
||
8000800: e7fe b.n 8000800 <ADC1_2_IRQHandler>
|
||
...
|
||
|
||
08000804 <HAL_Init>:
|
||
* need to ensure that the SysTick time base is always set to 1 millisecond
|
||
* to have correct HAL operation.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_Init(void)
|
||
{
|
||
8000804: b580 push {r7, lr}
|
||
8000806: af00 add r7, sp, #0
|
||
defined(STM32F102x6) || defined(STM32F102xB) || \
|
||
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
|
||
defined(STM32F105xC) || defined(STM32F107xC)
|
||
|
||
/* Prefetch buffer is not available on value line devices */
|
||
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
||
8000808: 4b08 ldr r3, [pc, #32] ; (800082c <HAL_Init+0x28>)
|
||
800080a: 681b ldr r3, [r3, #0]
|
||
800080c: 4a07 ldr r2, [pc, #28] ; (800082c <HAL_Init+0x28>)
|
||
800080e: f043 0310 orr.w r3, r3, #16
|
||
8000812: 6013 str r3, [r2, #0]
|
||
#endif
|
||
#endif /* PREFETCH_ENABLE */
|
||
|
||
/* Set Interrupt Group Priority */
|
||
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
||
8000814: 2003 movs r0, #3
|
||
8000816: f000 f92b bl 8000a70 <HAL_NVIC_SetPriorityGrouping>
|
||
|
||
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
|
||
HAL_InitTick(TICK_INT_PRIORITY);
|
||
800081a: 2000 movs r0, #0
|
||
800081c: f000 f808 bl 8000830 <HAL_InitTick>
|
||
|
||
/* Init the low level hardware */
|
||
HAL_MspInit();
|
||
8000820: f7ff fe8a bl 8000538 <HAL_MspInit>
|
||
|
||
/* Return function status */
|
||
return HAL_OK;
|
||
8000824: 2300 movs r3, #0
|
||
}
|
||
8000826: 4618 mov r0, r3
|
||
8000828: bd80 pop {r7, pc}
|
||
800082a: bf00 nop
|
||
800082c: 40022000 .word 0x40022000
|
||
|
||
08000830 <HAL_InitTick>:
|
||
* implementation in user file.
|
||
* @param TickPriority Tick interrupt priority.
|
||
* @retval HAL status
|
||
*/
|
||
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
||
{
|
||
8000830: b580 push {r7, lr}
|
||
8000832: b082 sub sp, #8
|
||
8000834: af00 add r7, sp, #0
|
||
8000836: 6078 str r0, [r7, #4]
|
||
/* Configure the SysTick to have interrupt in 1ms time basis*/
|
||
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
|
||
8000838: 4b12 ldr r3, [pc, #72] ; (8000884 <HAL_InitTick+0x54>)
|
||
800083a: 681a ldr r2, [r3, #0]
|
||
800083c: 4b12 ldr r3, [pc, #72] ; (8000888 <HAL_InitTick+0x58>)
|
||
800083e: 781b ldrb r3, [r3, #0]
|
||
8000840: 4619 mov r1, r3
|
||
8000842: f44f 737a mov.w r3, #1000 ; 0x3e8
|
||
8000846: fbb3 f3f1 udiv r3, r3, r1
|
||
800084a: fbb2 f3f3 udiv r3, r2, r3
|
||
800084e: 4618 mov r0, r3
|
||
8000850: f000 f935 bl 8000abe <HAL_SYSTICK_Config>
|
||
8000854: 4603 mov r3, r0
|
||
8000856: 2b00 cmp r3, #0
|
||
8000858: d001 beq.n 800085e <HAL_InitTick+0x2e>
|
||
{
|
||
return HAL_ERROR;
|
||
800085a: 2301 movs r3, #1
|
||
800085c: e00e b.n 800087c <HAL_InitTick+0x4c>
|
||
}
|
||
|
||
/* Configure the SysTick IRQ priority */
|
||
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
||
800085e: 687b ldr r3, [r7, #4]
|
||
8000860: 2b0f cmp r3, #15
|
||
8000862: d80a bhi.n 800087a <HAL_InitTick+0x4a>
|
||
{
|
||
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
||
8000864: 2200 movs r2, #0
|
||
8000866: 6879 ldr r1, [r7, #4]
|
||
8000868: f04f 30ff mov.w r0, #4294967295
|
||
800086c: f000 f90b bl 8000a86 <HAL_NVIC_SetPriority>
|
||
uwTickPrio = TickPriority;
|
||
8000870: 4a06 ldr r2, [pc, #24] ; (800088c <HAL_InitTick+0x5c>)
|
||
8000872: 687b ldr r3, [r7, #4]
|
||
8000874: 6013 str r3, [r2, #0]
|
||
{
|
||
return HAL_ERROR;
|
||
}
|
||
|
||
/* Return function status */
|
||
return HAL_OK;
|
||
8000876: 2300 movs r3, #0
|
||
8000878: e000 b.n 800087c <HAL_InitTick+0x4c>
|
||
return HAL_ERROR;
|
||
800087a: 2301 movs r3, #1
|
||
}
|
||
800087c: 4618 mov r0, r3
|
||
800087e: 3708 adds r7, #8
|
||
8000880: 46bd mov sp, r7
|
||
8000882: bd80 pop {r7, pc}
|
||
8000884: 20000000 .word 0x20000000
|
||
8000888: 20000008 .word 0x20000008
|
||
800088c: 20000004 .word 0x20000004
|
||
|
||
08000890 <HAL_IncTick>:
|
||
* @note This function is declared as __weak to be overwritten in case of other
|
||
* implementations in user file.
|
||
* @retval None
|
||
*/
|
||
__weak void HAL_IncTick(void)
|
||
{
|
||
8000890: b480 push {r7}
|
||
8000892: af00 add r7, sp, #0
|
||
uwTick += uwTickFreq;
|
||
8000894: 4b05 ldr r3, [pc, #20] ; (80008ac <HAL_IncTick+0x1c>)
|
||
8000896: 781b ldrb r3, [r3, #0]
|
||
8000898: 461a mov r2, r3
|
||
800089a: 4b05 ldr r3, [pc, #20] ; (80008b0 <HAL_IncTick+0x20>)
|
||
800089c: 681b ldr r3, [r3, #0]
|
||
800089e: 4413 add r3, r2
|
||
80008a0: 4a03 ldr r2, [pc, #12] ; (80008b0 <HAL_IncTick+0x20>)
|
||
80008a2: 6013 str r3, [r2, #0]
|
||
}
|
||
80008a4: bf00 nop
|
||
80008a6: 46bd mov sp, r7
|
||
80008a8: bc80 pop {r7}
|
||
80008aa: 4770 bx lr
|
||
80008ac: 20000008 .word 0x20000008
|
||
80008b0: 20000184 .word 0x20000184
|
||
|
||
080008b4 <HAL_GetTick>:
|
||
* @note This function is declared as __weak to be overwritten in case of other
|
||
* implementations in user file.
|
||
* @retval tick value
|
||
*/
|
||
__weak uint32_t HAL_GetTick(void)
|
||
{
|
||
80008b4: b480 push {r7}
|
||
80008b6: af00 add r7, sp, #0
|
||
return uwTick;
|
||
80008b8: 4b02 ldr r3, [pc, #8] ; (80008c4 <HAL_GetTick+0x10>)
|
||
80008ba: 681b ldr r3, [r3, #0]
|
||
}
|
||
80008bc: 4618 mov r0, r3
|
||
80008be: 46bd mov sp, r7
|
||
80008c0: bc80 pop {r7}
|
||
80008c2: 4770 bx lr
|
||
80008c4: 20000184 .word 0x20000184
|
||
|
||
080008c8 <HAL_Delay>:
|
||
* implementations in user file.
|
||
* @param Delay specifies the delay time length, in milliseconds.
|
||
* @retval None
|
||
*/
|
||
__weak void HAL_Delay(uint32_t Delay)
|
||
{
|
||
80008c8: b580 push {r7, lr}
|
||
80008ca: b084 sub sp, #16
|
||
80008cc: af00 add r7, sp, #0
|
||
80008ce: 6078 str r0, [r7, #4]
|
||
uint32_t tickstart = HAL_GetTick();
|
||
80008d0: f7ff fff0 bl 80008b4 <HAL_GetTick>
|
||
80008d4: 60b8 str r0, [r7, #8]
|
||
uint32_t wait = Delay;
|
||
80008d6: 687b ldr r3, [r7, #4]
|
||
80008d8: 60fb str r3, [r7, #12]
|
||
|
||
/* Add a freq to guarantee minimum wait */
|
||
if (wait < HAL_MAX_DELAY)
|
||
80008da: 68fb ldr r3, [r7, #12]
|
||
80008dc: f1b3 3fff cmp.w r3, #4294967295
|
||
80008e0: d005 beq.n 80008ee <HAL_Delay+0x26>
|
||
{
|
||
wait += (uint32_t)(uwTickFreq);
|
||
80008e2: 4b0a ldr r3, [pc, #40] ; (800090c <HAL_Delay+0x44>)
|
||
80008e4: 781b ldrb r3, [r3, #0]
|
||
80008e6: 461a mov r2, r3
|
||
80008e8: 68fb ldr r3, [r7, #12]
|
||
80008ea: 4413 add r3, r2
|
||
80008ec: 60fb str r3, [r7, #12]
|
||
}
|
||
|
||
while ((HAL_GetTick() - tickstart) < wait)
|
||
80008ee: bf00 nop
|
||
80008f0: f7ff ffe0 bl 80008b4 <HAL_GetTick>
|
||
80008f4: 4602 mov r2, r0
|
||
80008f6: 68bb ldr r3, [r7, #8]
|
||
80008f8: 1ad3 subs r3, r2, r3
|
||
80008fa: 68fa ldr r2, [r7, #12]
|
||
80008fc: 429a cmp r2, r3
|
||
80008fe: d8f7 bhi.n 80008f0 <HAL_Delay+0x28>
|
||
{
|
||
}
|
||
}
|
||
8000900: bf00 nop
|
||
8000902: bf00 nop
|
||
8000904: 3710 adds r7, #16
|
||
8000906: 46bd mov sp, r7
|
||
8000908: bd80 pop {r7, pc}
|
||
800090a: bf00 nop
|
||
800090c: 20000008 .word 0x20000008
|
||
|
||
08000910 <__NVIC_SetPriorityGrouping>:
|
||
In case of a conflict between priority grouping and available
|
||
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
|
||
\param [in] PriorityGroup Priority grouping field.
|
||
*/
|
||
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
||
{
|
||
8000910: b480 push {r7}
|
||
8000912: b085 sub sp, #20
|
||
8000914: af00 add r7, sp, #0
|
||
8000916: 6078 str r0, [r7, #4]
|
||
uint32_t reg_value;
|
||
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
||
8000918: 687b ldr r3, [r7, #4]
|
||
800091a: f003 0307 and.w r3, r3, #7
|
||
800091e: 60fb str r3, [r7, #12]
|
||
|
||
reg_value = SCB->AIRCR; /* read old register configuration */
|
||
8000920: 4b0c ldr r3, [pc, #48] ; (8000954 <__NVIC_SetPriorityGrouping+0x44>)
|
||
8000922: 68db ldr r3, [r3, #12]
|
||
8000924: 60bb str r3, [r7, #8]
|
||
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
|
||
8000926: 68ba ldr r2, [r7, #8]
|
||
8000928: f64f 03ff movw r3, #63743 ; 0xf8ff
|
||
800092c: 4013 ands r3, r2
|
||
800092e: 60bb str r3, [r7, #8]
|
||
reg_value = (reg_value |
|
||
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
|
||
8000930: 68fb ldr r3, [r7, #12]
|
||
8000932: 021a lsls r2, r3, #8
|
||
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||
8000934: 68bb ldr r3, [r7, #8]
|
||
8000936: 4313 orrs r3, r2
|
||
reg_value = (reg_value |
|
||
8000938: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
|
||
800093c: f443 3300 orr.w r3, r3, #131072 ; 0x20000
|
||
8000940: 60bb str r3, [r7, #8]
|
||
SCB->AIRCR = reg_value;
|
||
8000942: 4a04 ldr r2, [pc, #16] ; (8000954 <__NVIC_SetPriorityGrouping+0x44>)
|
||
8000944: 68bb ldr r3, [r7, #8]
|
||
8000946: 60d3 str r3, [r2, #12]
|
||
}
|
||
8000948: bf00 nop
|
||
800094a: 3714 adds r7, #20
|
||
800094c: 46bd mov sp, r7
|
||
800094e: bc80 pop {r7}
|
||
8000950: 4770 bx lr
|
||
8000952: bf00 nop
|
||
8000954: e000ed00 .word 0xe000ed00
|
||
|
||
08000958 <__NVIC_GetPriorityGrouping>:
|
||
\brief Get Priority Grouping
|
||
\details Reads the priority grouping field from the NVIC Interrupt Controller.
|
||
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
|
||
*/
|
||
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
|
||
{
|
||
8000958: b480 push {r7}
|
||
800095a: af00 add r7, sp, #0
|
||
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
|
||
800095c: 4b04 ldr r3, [pc, #16] ; (8000970 <__NVIC_GetPriorityGrouping+0x18>)
|
||
800095e: 68db ldr r3, [r3, #12]
|
||
8000960: 0a1b lsrs r3, r3, #8
|
||
8000962: f003 0307 and.w r3, r3, #7
|
||
}
|
||
8000966: 4618 mov r0, r3
|
||
8000968: 46bd mov sp, r7
|
||
800096a: bc80 pop {r7}
|
||
800096c: 4770 bx lr
|
||
800096e: bf00 nop
|
||
8000970: e000ed00 .word 0xe000ed00
|
||
|
||
08000974 <__NVIC_SetPriority>:
|
||
\param [in] IRQn Interrupt number.
|
||
\param [in] priority Priority to set.
|
||
\note The priority cannot be set for every processor exception.
|
||
*/
|
||
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
||
{
|
||
8000974: b480 push {r7}
|
||
8000976: b083 sub sp, #12
|
||
8000978: af00 add r7, sp, #0
|
||
800097a: 4603 mov r3, r0
|
||
800097c: 6039 str r1, [r7, #0]
|
||
800097e: 71fb strb r3, [r7, #7]
|
||
if ((int32_t)(IRQn) >= 0)
|
||
8000980: f997 3007 ldrsb.w r3, [r7, #7]
|
||
8000984: 2b00 cmp r3, #0
|
||
8000986: db0a blt.n 800099e <__NVIC_SetPriority+0x2a>
|
||
{
|
||
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
8000988: 683b ldr r3, [r7, #0]
|
||
800098a: b2da uxtb r2, r3
|
||
800098c: 490c ldr r1, [pc, #48] ; (80009c0 <__NVIC_SetPriority+0x4c>)
|
||
800098e: f997 3007 ldrsb.w r3, [r7, #7]
|
||
8000992: 0112 lsls r2, r2, #4
|
||
8000994: b2d2 uxtb r2, r2
|
||
8000996: 440b add r3, r1
|
||
8000998: f883 2300 strb.w r2, [r3, #768] ; 0x300
|
||
}
|
||
else
|
||
{
|
||
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
}
|
||
}
|
||
800099c: e00a b.n 80009b4 <__NVIC_SetPriority+0x40>
|
||
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
800099e: 683b ldr r3, [r7, #0]
|
||
80009a0: b2da uxtb r2, r3
|
||
80009a2: 4908 ldr r1, [pc, #32] ; (80009c4 <__NVIC_SetPriority+0x50>)
|
||
80009a4: 79fb ldrb r3, [r7, #7]
|
||
80009a6: f003 030f and.w r3, r3, #15
|
||
80009aa: 3b04 subs r3, #4
|
||
80009ac: 0112 lsls r2, r2, #4
|
||
80009ae: b2d2 uxtb r2, r2
|
||
80009b0: 440b add r3, r1
|
||
80009b2: 761a strb r2, [r3, #24]
|
||
}
|
||
80009b4: bf00 nop
|
||
80009b6: 370c adds r7, #12
|
||
80009b8: 46bd mov sp, r7
|
||
80009ba: bc80 pop {r7}
|
||
80009bc: 4770 bx lr
|
||
80009be: bf00 nop
|
||
80009c0: e000e100 .word 0xe000e100
|
||
80009c4: e000ed00 .word 0xe000ed00
|
||
|
||
080009c8 <NVIC_EncodePriority>:
|
||
\param [in] PreemptPriority Preemptive priority value (starting from 0).
|
||
\param [in] SubPriority Subpriority value (starting from 0).
|
||
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
|
||
*/
|
||
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
|
||
{
|
||
80009c8: b480 push {r7}
|
||
80009ca: b089 sub sp, #36 ; 0x24
|
||
80009cc: af00 add r7, sp, #0
|
||
80009ce: 60f8 str r0, [r7, #12]
|
||
80009d0: 60b9 str r1, [r7, #8]
|
||
80009d2: 607a str r2, [r7, #4]
|
||
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
||
80009d4: 68fb ldr r3, [r7, #12]
|
||
80009d6: f003 0307 and.w r3, r3, #7
|
||
80009da: 61fb str r3, [r7, #28]
|
||
uint32_t PreemptPriorityBits;
|
||
uint32_t SubPriorityBits;
|
||
|
||
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
|
||
80009dc: 69fb ldr r3, [r7, #28]
|
||
80009de: f1c3 0307 rsb r3, r3, #7
|
||
80009e2: 2b04 cmp r3, #4
|
||
80009e4: bf28 it cs
|
||
80009e6: 2304 movcs r3, #4
|
||
80009e8: 61bb str r3, [r7, #24]
|
||
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
|
||
80009ea: 69fb ldr r3, [r7, #28]
|
||
80009ec: 3304 adds r3, #4
|
||
80009ee: 2b06 cmp r3, #6
|
||
80009f0: d902 bls.n 80009f8 <NVIC_EncodePriority+0x30>
|
||
80009f2: 69fb ldr r3, [r7, #28]
|
||
80009f4: 3b03 subs r3, #3
|
||
80009f6: e000 b.n 80009fa <NVIC_EncodePriority+0x32>
|
||
80009f8: 2300 movs r3, #0
|
||
80009fa: 617b str r3, [r7, #20]
|
||
|
||
return (
|
||
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
||
80009fc: f04f 32ff mov.w r2, #4294967295
|
||
8000a00: 69bb ldr r3, [r7, #24]
|
||
8000a02: fa02 f303 lsl.w r3, r2, r3
|
||
8000a06: 43da mvns r2, r3
|
||
8000a08: 68bb ldr r3, [r7, #8]
|
||
8000a0a: 401a ands r2, r3
|
||
8000a0c: 697b ldr r3, [r7, #20]
|
||
8000a0e: 409a lsls r2, r3
|
||
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
|
||
8000a10: f04f 31ff mov.w r1, #4294967295
|
||
8000a14: 697b ldr r3, [r7, #20]
|
||
8000a16: fa01 f303 lsl.w r3, r1, r3
|
||
8000a1a: 43d9 mvns r1, r3
|
||
8000a1c: 687b ldr r3, [r7, #4]
|
||
8000a1e: 400b ands r3, r1
|
||
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
||
8000a20: 4313 orrs r3, r2
|
||
);
|
||
}
|
||
8000a22: 4618 mov r0, r3
|
||
8000a24: 3724 adds r7, #36 ; 0x24
|
||
8000a26: 46bd mov sp, r7
|
||
8000a28: bc80 pop {r7}
|
||
8000a2a: 4770 bx lr
|
||
|
||
08000a2c <SysTick_Config>:
|
||
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
||
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
||
must contain a vendor-specific implementation of this function.
|
||
*/
|
||
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
||
{
|
||
8000a2c: b580 push {r7, lr}
|
||
8000a2e: b082 sub sp, #8
|
||
8000a30: af00 add r7, sp, #0
|
||
8000a32: 6078 str r0, [r7, #4]
|
||
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
||
8000a34: 687b ldr r3, [r7, #4]
|
||
8000a36: 3b01 subs r3, #1
|
||
8000a38: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
|
||
8000a3c: d301 bcc.n 8000a42 <SysTick_Config+0x16>
|
||
{
|
||
return (1UL); /* Reload value impossible */
|
||
8000a3e: 2301 movs r3, #1
|
||
8000a40: e00f b.n 8000a62 <SysTick_Config+0x36>
|
||
}
|
||
|
||
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
||
8000a42: 4a0a ldr r2, [pc, #40] ; (8000a6c <SysTick_Config+0x40>)
|
||
8000a44: 687b ldr r3, [r7, #4]
|
||
8000a46: 3b01 subs r3, #1
|
||
8000a48: 6053 str r3, [r2, #4]
|
||
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
||
8000a4a: 210f movs r1, #15
|
||
8000a4c: f04f 30ff mov.w r0, #4294967295
|
||
8000a50: f7ff ff90 bl 8000974 <__NVIC_SetPriority>
|
||
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
||
8000a54: 4b05 ldr r3, [pc, #20] ; (8000a6c <SysTick_Config+0x40>)
|
||
8000a56: 2200 movs r2, #0
|
||
8000a58: 609a str r2, [r3, #8]
|
||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
||
8000a5a: 4b04 ldr r3, [pc, #16] ; (8000a6c <SysTick_Config+0x40>)
|
||
8000a5c: 2207 movs r2, #7
|
||
8000a5e: 601a str r2, [r3, #0]
|
||
SysTick_CTRL_TICKINT_Msk |
|
||
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
||
return (0UL); /* Function successful */
|
||
8000a60: 2300 movs r3, #0
|
||
}
|
||
8000a62: 4618 mov r0, r3
|
||
8000a64: 3708 adds r7, #8
|
||
8000a66: 46bd mov sp, r7
|
||
8000a68: bd80 pop {r7, pc}
|
||
8000a6a: bf00 nop
|
||
8000a6c: e000e010 .word 0xe000e010
|
||
|
||
08000a70 <HAL_NVIC_SetPriorityGrouping>:
|
||
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
|
||
* The pending IRQ priority will be managed only by the subpriority.
|
||
* @retval None
|
||
*/
|
||
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
||
{
|
||
8000a70: b580 push {r7, lr}
|
||
8000a72: b082 sub sp, #8
|
||
8000a74: af00 add r7, sp, #0
|
||
8000a76: 6078 str r0, [r7, #4]
|
||
/* Check the parameters */
|
||
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
|
||
|
||
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
|
||
NVIC_SetPriorityGrouping(PriorityGroup);
|
||
8000a78: 6878 ldr r0, [r7, #4]
|
||
8000a7a: f7ff ff49 bl 8000910 <__NVIC_SetPriorityGrouping>
|
||
}
|
||
8000a7e: bf00 nop
|
||
8000a80: 3708 adds r7, #8
|
||
8000a82: 46bd mov sp, r7
|
||
8000a84: bd80 pop {r7, pc}
|
||
|
||
08000a86 <HAL_NVIC_SetPriority>:
|
||
* This parameter can be a value between 0 and 15
|
||
* A lower priority value indicates a higher priority.
|
||
* @retval None
|
||
*/
|
||
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
||
{
|
||
8000a86: b580 push {r7, lr}
|
||
8000a88: b086 sub sp, #24
|
||
8000a8a: af00 add r7, sp, #0
|
||
8000a8c: 4603 mov r3, r0
|
||
8000a8e: 60b9 str r1, [r7, #8]
|
||
8000a90: 607a str r2, [r7, #4]
|
||
8000a92: 73fb strb r3, [r7, #15]
|
||
uint32_t prioritygroup = 0x00U;
|
||
8000a94: 2300 movs r3, #0
|
||
8000a96: 617b str r3, [r7, #20]
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
|
||
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
||
|
||
prioritygroup = NVIC_GetPriorityGrouping();
|
||
8000a98: f7ff ff5e bl 8000958 <__NVIC_GetPriorityGrouping>
|
||
8000a9c: 6178 str r0, [r7, #20]
|
||
|
||
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
|
||
8000a9e: 687a ldr r2, [r7, #4]
|
||
8000aa0: 68b9 ldr r1, [r7, #8]
|
||
8000aa2: 6978 ldr r0, [r7, #20]
|
||
8000aa4: f7ff ff90 bl 80009c8 <NVIC_EncodePriority>
|
||
8000aa8: 4602 mov r2, r0
|
||
8000aaa: f997 300f ldrsb.w r3, [r7, #15]
|
||
8000aae: 4611 mov r1, r2
|
||
8000ab0: 4618 mov r0, r3
|
||
8000ab2: f7ff ff5f bl 8000974 <__NVIC_SetPriority>
|
||
}
|
||
8000ab6: bf00 nop
|
||
8000ab8: 3718 adds r7, #24
|
||
8000aba: 46bd mov sp, r7
|
||
8000abc: bd80 pop {r7, pc}
|
||
|
||
08000abe <HAL_SYSTICK_Config>:
|
||
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
|
||
* @retval status: - 0 Function succeeded.
|
||
* - 1 Function failed.
|
||
*/
|
||
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
||
{
|
||
8000abe: b580 push {r7, lr}
|
||
8000ac0: b082 sub sp, #8
|
||
8000ac2: af00 add r7, sp, #0
|
||
8000ac4: 6078 str r0, [r7, #4]
|
||
return SysTick_Config(TicksNumb);
|
||
8000ac6: 6878 ldr r0, [r7, #4]
|
||
8000ac8: f7ff ffb0 bl 8000a2c <SysTick_Config>
|
||
8000acc: 4603 mov r3, r0
|
||
}
|
||
8000ace: 4618 mov r0, r3
|
||
8000ad0: 3708 adds r7, #8
|
||
8000ad2: 46bd mov sp, r7
|
||
8000ad4: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08000ad8 <HAL_GPIO_Init>:
|
||
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
|
||
* the configuration information for the specified GPIO peripheral.
|
||
* @retval None
|
||
*/
|
||
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
||
{
|
||
8000ad8: b480 push {r7}
|
||
8000ada: b08b sub sp, #44 ; 0x2c
|
||
8000adc: af00 add r7, sp, #0
|
||
8000ade: 6078 str r0, [r7, #4]
|
||
8000ae0: 6039 str r1, [r7, #0]
|
||
uint32_t position = 0x00u;
|
||
8000ae2: 2300 movs r3, #0
|
||
8000ae4: 627b str r3, [r7, #36] ; 0x24
|
||
uint32_t ioposition;
|
||
uint32_t iocurrent;
|
||
uint32_t temp;
|
||
uint32_t config = 0x00u;
|
||
8000ae6: 2300 movs r3, #0
|
||
8000ae8: 623b str r3, [r7, #32]
|
||
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
||
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
|
||
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
|
||
|
||
/* Configure the port pins */
|
||
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
||
8000aea: e179 b.n 8000de0 <HAL_GPIO_Init+0x308>
|
||
{
|
||
/* Get the IO position */
|
||
ioposition = (0x01uL << position);
|
||
8000aec: 2201 movs r2, #1
|
||
8000aee: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000af0: fa02 f303 lsl.w r3, r2, r3
|
||
8000af4: 61fb str r3, [r7, #28]
|
||
|
||
/* Get the current IO position */
|
||
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
|
||
8000af6: 683b ldr r3, [r7, #0]
|
||
8000af8: 681b ldr r3, [r3, #0]
|
||
8000afa: 69fa ldr r2, [r7, #28]
|
||
8000afc: 4013 ands r3, r2
|
||
8000afe: 61bb str r3, [r7, #24]
|
||
|
||
if (iocurrent == ioposition)
|
||
8000b00: 69ba ldr r2, [r7, #24]
|
||
8000b02: 69fb ldr r3, [r7, #28]
|
||
8000b04: 429a cmp r2, r3
|
||
8000b06: f040 8168 bne.w 8000dda <HAL_GPIO_Init+0x302>
|
||
{
|
||
/* Check the Alternate function parameters */
|
||
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
|
||
|
||
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
|
||
switch (GPIO_Init->Mode)
|
||
8000b0a: 683b ldr r3, [r7, #0]
|
||
8000b0c: 685b ldr r3, [r3, #4]
|
||
8000b0e: 4aa0 ldr r2, [pc, #640] ; (8000d90 <HAL_GPIO_Init+0x2b8>)
|
||
8000b10: 4293 cmp r3, r2
|
||
8000b12: d05e beq.n 8000bd2 <HAL_GPIO_Init+0xfa>
|
||
8000b14: 4a9e ldr r2, [pc, #632] ; (8000d90 <HAL_GPIO_Init+0x2b8>)
|
||
8000b16: 4293 cmp r3, r2
|
||
8000b18: d875 bhi.n 8000c06 <HAL_GPIO_Init+0x12e>
|
||
8000b1a: 4a9e ldr r2, [pc, #632] ; (8000d94 <HAL_GPIO_Init+0x2bc>)
|
||
8000b1c: 4293 cmp r3, r2
|
||
8000b1e: d058 beq.n 8000bd2 <HAL_GPIO_Init+0xfa>
|
||
8000b20: 4a9c ldr r2, [pc, #624] ; (8000d94 <HAL_GPIO_Init+0x2bc>)
|
||
8000b22: 4293 cmp r3, r2
|
||
8000b24: d86f bhi.n 8000c06 <HAL_GPIO_Init+0x12e>
|
||
8000b26: 4a9c ldr r2, [pc, #624] ; (8000d98 <HAL_GPIO_Init+0x2c0>)
|
||
8000b28: 4293 cmp r3, r2
|
||
8000b2a: d052 beq.n 8000bd2 <HAL_GPIO_Init+0xfa>
|
||
8000b2c: 4a9a ldr r2, [pc, #616] ; (8000d98 <HAL_GPIO_Init+0x2c0>)
|
||
8000b2e: 4293 cmp r3, r2
|
||
8000b30: d869 bhi.n 8000c06 <HAL_GPIO_Init+0x12e>
|
||
8000b32: 4a9a ldr r2, [pc, #616] ; (8000d9c <HAL_GPIO_Init+0x2c4>)
|
||
8000b34: 4293 cmp r3, r2
|
||
8000b36: d04c beq.n 8000bd2 <HAL_GPIO_Init+0xfa>
|
||
8000b38: 4a98 ldr r2, [pc, #608] ; (8000d9c <HAL_GPIO_Init+0x2c4>)
|
||
8000b3a: 4293 cmp r3, r2
|
||
8000b3c: d863 bhi.n 8000c06 <HAL_GPIO_Init+0x12e>
|
||
8000b3e: 4a98 ldr r2, [pc, #608] ; (8000da0 <HAL_GPIO_Init+0x2c8>)
|
||
8000b40: 4293 cmp r3, r2
|
||
8000b42: d046 beq.n 8000bd2 <HAL_GPIO_Init+0xfa>
|
||
8000b44: 4a96 ldr r2, [pc, #600] ; (8000da0 <HAL_GPIO_Init+0x2c8>)
|
||
8000b46: 4293 cmp r3, r2
|
||
8000b48: d85d bhi.n 8000c06 <HAL_GPIO_Init+0x12e>
|
||
8000b4a: 2b12 cmp r3, #18
|
||
8000b4c: d82a bhi.n 8000ba4 <HAL_GPIO_Init+0xcc>
|
||
8000b4e: 2b12 cmp r3, #18
|
||
8000b50: d859 bhi.n 8000c06 <HAL_GPIO_Init+0x12e>
|
||
8000b52: a201 add r2, pc, #4 ; (adr r2, 8000b58 <HAL_GPIO_Init+0x80>)
|
||
8000b54: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
8000b58: 08000bd3 .word 0x08000bd3
|
||
8000b5c: 08000bad .word 0x08000bad
|
||
8000b60: 08000bbf .word 0x08000bbf
|
||
8000b64: 08000c01 .word 0x08000c01
|
||
8000b68: 08000c07 .word 0x08000c07
|
||
8000b6c: 08000c07 .word 0x08000c07
|
||
8000b70: 08000c07 .word 0x08000c07
|
||
8000b74: 08000c07 .word 0x08000c07
|
||
8000b78: 08000c07 .word 0x08000c07
|
||
8000b7c: 08000c07 .word 0x08000c07
|
||
8000b80: 08000c07 .word 0x08000c07
|
||
8000b84: 08000c07 .word 0x08000c07
|
||
8000b88: 08000c07 .word 0x08000c07
|
||
8000b8c: 08000c07 .word 0x08000c07
|
||
8000b90: 08000c07 .word 0x08000c07
|
||
8000b94: 08000c07 .word 0x08000c07
|
||
8000b98: 08000c07 .word 0x08000c07
|
||
8000b9c: 08000bb5 .word 0x08000bb5
|
||
8000ba0: 08000bc9 .word 0x08000bc9
|
||
8000ba4: 4a7f ldr r2, [pc, #508] ; (8000da4 <HAL_GPIO_Init+0x2cc>)
|
||
8000ba6: 4293 cmp r3, r2
|
||
8000ba8: d013 beq.n 8000bd2 <HAL_GPIO_Init+0xfa>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
||
break;
|
||
|
||
/* Parameters are checked with assert_param */
|
||
default:
|
||
break;
|
||
8000baa: e02c b.n 8000c06 <HAL_GPIO_Init+0x12e>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
|
||
8000bac: 683b ldr r3, [r7, #0]
|
||
8000bae: 68db ldr r3, [r3, #12]
|
||
8000bb0: 623b str r3, [r7, #32]
|
||
break;
|
||
8000bb2: e029 b.n 8000c08 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
|
||
8000bb4: 683b ldr r3, [r7, #0]
|
||
8000bb6: 68db ldr r3, [r3, #12]
|
||
8000bb8: 3304 adds r3, #4
|
||
8000bba: 623b str r3, [r7, #32]
|
||
break;
|
||
8000bbc: e024 b.n 8000c08 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
|
||
8000bbe: 683b ldr r3, [r7, #0]
|
||
8000bc0: 68db ldr r3, [r3, #12]
|
||
8000bc2: 3308 adds r3, #8
|
||
8000bc4: 623b str r3, [r7, #32]
|
||
break;
|
||
8000bc6: e01f b.n 8000c08 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
|
||
8000bc8: 683b ldr r3, [r7, #0]
|
||
8000bca: 68db ldr r3, [r3, #12]
|
||
8000bcc: 330c adds r3, #12
|
||
8000bce: 623b str r3, [r7, #32]
|
||
break;
|
||
8000bd0: e01a b.n 8000c08 <HAL_GPIO_Init+0x130>
|
||
if (GPIO_Init->Pull == GPIO_NOPULL)
|
||
8000bd2: 683b ldr r3, [r7, #0]
|
||
8000bd4: 689b ldr r3, [r3, #8]
|
||
8000bd6: 2b00 cmp r3, #0
|
||
8000bd8: d102 bne.n 8000be0 <HAL_GPIO_Init+0x108>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
|
||
8000bda: 2304 movs r3, #4
|
||
8000bdc: 623b str r3, [r7, #32]
|
||
break;
|
||
8000bde: e013 b.n 8000c08 <HAL_GPIO_Init+0x130>
|
||
else if (GPIO_Init->Pull == GPIO_PULLUP)
|
||
8000be0: 683b ldr r3, [r7, #0]
|
||
8000be2: 689b ldr r3, [r3, #8]
|
||
8000be4: 2b01 cmp r3, #1
|
||
8000be6: d105 bne.n 8000bf4 <HAL_GPIO_Init+0x11c>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
||
8000be8: 2308 movs r3, #8
|
||
8000bea: 623b str r3, [r7, #32]
|
||
GPIOx->BSRR = ioposition;
|
||
8000bec: 687b ldr r3, [r7, #4]
|
||
8000bee: 69fa ldr r2, [r7, #28]
|
||
8000bf0: 611a str r2, [r3, #16]
|
||
break;
|
||
8000bf2: e009 b.n 8000c08 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
||
8000bf4: 2308 movs r3, #8
|
||
8000bf6: 623b str r3, [r7, #32]
|
||
GPIOx->BRR = ioposition;
|
||
8000bf8: 687b ldr r3, [r7, #4]
|
||
8000bfa: 69fa ldr r2, [r7, #28]
|
||
8000bfc: 615a str r2, [r3, #20]
|
||
break;
|
||
8000bfe: e003 b.n 8000c08 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
||
8000c00: 2300 movs r3, #0
|
||
8000c02: 623b str r3, [r7, #32]
|
||
break;
|
||
8000c04: e000 b.n 8000c08 <HAL_GPIO_Init+0x130>
|
||
break;
|
||
8000c06: bf00 nop
|
||
}
|
||
|
||
/* Check if the current bit belongs to first half or last half of the pin count number
|
||
in order to address CRH or CRL register*/
|
||
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
|
||
8000c08: 69bb ldr r3, [r7, #24]
|
||
8000c0a: 2bff cmp r3, #255 ; 0xff
|
||
8000c0c: d801 bhi.n 8000c12 <HAL_GPIO_Init+0x13a>
|
||
8000c0e: 687b ldr r3, [r7, #4]
|
||
8000c10: e001 b.n 8000c16 <HAL_GPIO_Init+0x13e>
|
||
8000c12: 687b ldr r3, [r7, #4]
|
||
8000c14: 3304 adds r3, #4
|
||
8000c16: 617b str r3, [r7, #20]
|
||
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
|
||
8000c18: 69bb ldr r3, [r7, #24]
|
||
8000c1a: 2bff cmp r3, #255 ; 0xff
|
||
8000c1c: d802 bhi.n 8000c24 <HAL_GPIO_Init+0x14c>
|
||
8000c1e: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000c20: 009b lsls r3, r3, #2
|
||
8000c22: e002 b.n 8000c2a <HAL_GPIO_Init+0x152>
|
||
8000c24: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000c26: 3b08 subs r3, #8
|
||
8000c28: 009b lsls r3, r3, #2
|
||
8000c2a: 613b str r3, [r7, #16]
|
||
|
||
/* Apply the new configuration of the pin to the register */
|
||
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
|
||
8000c2c: 697b ldr r3, [r7, #20]
|
||
8000c2e: 681a ldr r2, [r3, #0]
|
||
8000c30: 210f movs r1, #15
|
||
8000c32: 693b ldr r3, [r7, #16]
|
||
8000c34: fa01 f303 lsl.w r3, r1, r3
|
||
8000c38: 43db mvns r3, r3
|
||
8000c3a: 401a ands r2, r3
|
||
8000c3c: 6a39 ldr r1, [r7, #32]
|
||
8000c3e: 693b ldr r3, [r7, #16]
|
||
8000c40: fa01 f303 lsl.w r3, r1, r3
|
||
8000c44: 431a orrs r2, r3
|
||
8000c46: 697b ldr r3, [r7, #20]
|
||
8000c48: 601a str r2, [r3, #0]
|
||
|
||
/*--------------------- EXTI Mode Configuration ------------------------*/
|
||
/* Configure the External Interrupt or event for the current IO */
|
||
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
|
||
8000c4a: 683b ldr r3, [r7, #0]
|
||
8000c4c: 685b ldr r3, [r3, #4]
|
||
8000c4e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
8000c52: 2b00 cmp r3, #0
|
||
8000c54: f000 80c1 beq.w 8000dda <HAL_GPIO_Init+0x302>
|
||
{
|
||
/* Enable AFIO Clock */
|
||
__HAL_RCC_AFIO_CLK_ENABLE();
|
||
8000c58: 4b53 ldr r3, [pc, #332] ; (8000da8 <HAL_GPIO_Init+0x2d0>)
|
||
8000c5a: 699b ldr r3, [r3, #24]
|
||
8000c5c: 4a52 ldr r2, [pc, #328] ; (8000da8 <HAL_GPIO_Init+0x2d0>)
|
||
8000c5e: f043 0301 orr.w r3, r3, #1
|
||
8000c62: 6193 str r3, [r2, #24]
|
||
8000c64: 4b50 ldr r3, [pc, #320] ; (8000da8 <HAL_GPIO_Init+0x2d0>)
|
||
8000c66: 699b ldr r3, [r3, #24]
|
||
8000c68: f003 0301 and.w r3, r3, #1
|
||
8000c6c: 60bb str r3, [r7, #8]
|
||
8000c6e: 68bb ldr r3, [r7, #8]
|
||
temp = AFIO->EXTICR[position >> 2u];
|
||
8000c70: 4a4e ldr r2, [pc, #312] ; (8000dac <HAL_GPIO_Init+0x2d4>)
|
||
8000c72: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000c74: 089b lsrs r3, r3, #2
|
||
8000c76: 3302 adds r3, #2
|
||
8000c78: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
||
8000c7c: 60fb str r3, [r7, #12]
|
||
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
|
||
8000c7e: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000c80: f003 0303 and.w r3, r3, #3
|
||
8000c84: 009b lsls r3, r3, #2
|
||
8000c86: 220f movs r2, #15
|
||
8000c88: fa02 f303 lsl.w r3, r2, r3
|
||
8000c8c: 43db mvns r3, r3
|
||
8000c8e: 68fa ldr r2, [r7, #12]
|
||
8000c90: 4013 ands r3, r2
|
||
8000c92: 60fb str r3, [r7, #12]
|
||
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
|
||
8000c94: 687b ldr r3, [r7, #4]
|
||
8000c96: 4a46 ldr r2, [pc, #280] ; (8000db0 <HAL_GPIO_Init+0x2d8>)
|
||
8000c98: 4293 cmp r3, r2
|
||
8000c9a: d01f beq.n 8000cdc <HAL_GPIO_Init+0x204>
|
||
8000c9c: 687b ldr r3, [r7, #4]
|
||
8000c9e: 4a45 ldr r2, [pc, #276] ; (8000db4 <HAL_GPIO_Init+0x2dc>)
|
||
8000ca0: 4293 cmp r3, r2
|
||
8000ca2: d019 beq.n 8000cd8 <HAL_GPIO_Init+0x200>
|
||
8000ca4: 687b ldr r3, [r7, #4]
|
||
8000ca6: 4a44 ldr r2, [pc, #272] ; (8000db8 <HAL_GPIO_Init+0x2e0>)
|
||
8000ca8: 4293 cmp r3, r2
|
||
8000caa: d013 beq.n 8000cd4 <HAL_GPIO_Init+0x1fc>
|
||
8000cac: 687b ldr r3, [r7, #4]
|
||
8000cae: 4a43 ldr r2, [pc, #268] ; (8000dbc <HAL_GPIO_Init+0x2e4>)
|
||
8000cb0: 4293 cmp r3, r2
|
||
8000cb2: d00d beq.n 8000cd0 <HAL_GPIO_Init+0x1f8>
|
||
8000cb4: 687b ldr r3, [r7, #4]
|
||
8000cb6: 4a42 ldr r2, [pc, #264] ; (8000dc0 <HAL_GPIO_Init+0x2e8>)
|
||
8000cb8: 4293 cmp r3, r2
|
||
8000cba: d007 beq.n 8000ccc <HAL_GPIO_Init+0x1f4>
|
||
8000cbc: 687b ldr r3, [r7, #4]
|
||
8000cbe: 4a41 ldr r2, [pc, #260] ; (8000dc4 <HAL_GPIO_Init+0x2ec>)
|
||
8000cc0: 4293 cmp r3, r2
|
||
8000cc2: d101 bne.n 8000cc8 <HAL_GPIO_Init+0x1f0>
|
||
8000cc4: 2305 movs r3, #5
|
||
8000cc6: e00a b.n 8000cde <HAL_GPIO_Init+0x206>
|
||
8000cc8: 2306 movs r3, #6
|
||
8000cca: e008 b.n 8000cde <HAL_GPIO_Init+0x206>
|
||
8000ccc: 2304 movs r3, #4
|
||
8000cce: e006 b.n 8000cde <HAL_GPIO_Init+0x206>
|
||
8000cd0: 2303 movs r3, #3
|
||
8000cd2: e004 b.n 8000cde <HAL_GPIO_Init+0x206>
|
||
8000cd4: 2302 movs r3, #2
|
||
8000cd6: e002 b.n 8000cde <HAL_GPIO_Init+0x206>
|
||
8000cd8: 2301 movs r3, #1
|
||
8000cda: e000 b.n 8000cde <HAL_GPIO_Init+0x206>
|
||
8000cdc: 2300 movs r3, #0
|
||
8000cde: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8000ce0: f002 0203 and.w r2, r2, #3
|
||
8000ce4: 0092 lsls r2, r2, #2
|
||
8000ce6: 4093 lsls r3, r2
|
||
8000ce8: 68fa ldr r2, [r7, #12]
|
||
8000cea: 4313 orrs r3, r2
|
||
8000cec: 60fb str r3, [r7, #12]
|
||
AFIO->EXTICR[position >> 2u] = temp;
|
||
8000cee: 492f ldr r1, [pc, #188] ; (8000dac <HAL_GPIO_Init+0x2d4>)
|
||
8000cf0: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000cf2: 089b lsrs r3, r3, #2
|
||
8000cf4: 3302 adds r3, #2
|
||
8000cf6: 68fa ldr r2, [r7, #12]
|
||
8000cf8: f841 2023 str.w r2, [r1, r3, lsl #2]
|
||
|
||
|
||
/* Configure the interrupt mask */
|
||
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
|
||
8000cfc: 683b ldr r3, [r7, #0]
|
||
8000cfe: 685b ldr r3, [r3, #4]
|
||
8000d00: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8000d04: 2b00 cmp r3, #0
|
||
8000d06: d006 beq.n 8000d16 <HAL_GPIO_Init+0x23e>
|
||
{
|
||
SET_BIT(EXTI->IMR, iocurrent);
|
||
8000d08: 4b2f ldr r3, [pc, #188] ; (8000dc8 <HAL_GPIO_Init+0x2f0>)
|
||
8000d0a: 681a ldr r2, [r3, #0]
|
||
8000d0c: 492e ldr r1, [pc, #184] ; (8000dc8 <HAL_GPIO_Init+0x2f0>)
|
||
8000d0e: 69bb ldr r3, [r7, #24]
|
||
8000d10: 4313 orrs r3, r2
|
||
8000d12: 600b str r3, [r1, #0]
|
||
8000d14: e006 b.n 8000d24 <HAL_GPIO_Init+0x24c>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->IMR, iocurrent);
|
||
8000d16: 4b2c ldr r3, [pc, #176] ; (8000dc8 <HAL_GPIO_Init+0x2f0>)
|
||
8000d18: 681a ldr r2, [r3, #0]
|
||
8000d1a: 69bb ldr r3, [r7, #24]
|
||
8000d1c: 43db mvns r3, r3
|
||
8000d1e: 492a ldr r1, [pc, #168] ; (8000dc8 <HAL_GPIO_Init+0x2f0>)
|
||
8000d20: 4013 ands r3, r2
|
||
8000d22: 600b str r3, [r1, #0]
|
||
}
|
||
|
||
/* Configure the event mask */
|
||
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
|
||
8000d24: 683b ldr r3, [r7, #0]
|
||
8000d26: 685b ldr r3, [r3, #4]
|
||
8000d28: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8000d2c: 2b00 cmp r3, #0
|
||
8000d2e: d006 beq.n 8000d3e <HAL_GPIO_Init+0x266>
|
||
{
|
||
SET_BIT(EXTI->EMR, iocurrent);
|
||
8000d30: 4b25 ldr r3, [pc, #148] ; (8000dc8 <HAL_GPIO_Init+0x2f0>)
|
||
8000d32: 685a ldr r2, [r3, #4]
|
||
8000d34: 4924 ldr r1, [pc, #144] ; (8000dc8 <HAL_GPIO_Init+0x2f0>)
|
||
8000d36: 69bb ldr r3, [r7, #24]
|
||
8000d38: 4313 orrs r3, r2
|
||
8000d3a: 604b str r3, [r1, #4]
|
||
8000d3c: e006 b.n 8000d4c <HAL_GPIO_Init+0x274>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->EMR, iocurrent);
|
||
8000d3e: 4b22 ldr r3, [pc, #136] ; (8000dc8 <HAL_GPIO_Init+0x2f0>)
|
||
8000d40: 685a ldr r2, [r3, #4]
|
||
8000d42: 69bb ldr r3, [r7, #24]
|
||
8000d44: 43db mvns r3, r3
|
||
8000d46: 4920 ldr r1, [pc, #128] ; (8000dc8 <HAL_GPIO_Init+0x2f0>)
|
||
8000d48: 4013 ands r3, r2
|
||
8000d4a: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Enable or disable the rising trigger */
|
||
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
|
||
8000d4c: 683b ldr r3, [r7, #0]
|
||
8000d4e: 685b ldr r3, [r3, #4]
|
||
8000d50: f403 1380 and.w r3, r3, #1048576 ; 0x100000
|
||
8000d54: 2b00 cmp r3, #0
|
||
8000d56: d006 beq.n 8000d66 <HAL_GPIO_Init+0x28e>
|
||
{
|
||
SET_BIT(EXTI->RTSR, iocurrent);
|
||
8000d58: 4b1b ldr r3, [pc, #108] ; (8000dc8 <HAL_GPIO_Init+0x2f0>)
|
||
8000d5a: 689a ldr r2, [r3, #8]
|
||
8000d5c: 491a ldr r1, [pc, #104] ; (8000dc8 <HAL_GPIO_Init+0x2f0>)
|
||
8000d5e: 69bb ldr r3, [r7, #24]
|
||
8000d60: 4313 orrs r3, r2
|
||
8000d62: 608b str r3, [r1, #8]
|
||
8000d64: e006 b.n 8000d74 <HAL_GPIO_Init+0x29c>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->RTSR, iocurrent);
|
||
8000d66: 4b18 ldr r3, [pc, #96] ; (8000dc8 <HAL_GPIO_Init+0x2f0>)
|
||
8000d68: 689a ldr r2, [r3, #8]
|
||
8000d6a: 69bb ldr r3, [r7, #24]
|
||
8000d6c: 43db mvns r3, r3
|
||
8000d6e: 4916 ldr r1, [pc, #88] ; (8000dc8 <HAL_GPIO_Init+0x2f0>)
|
||
8000d70: 4013 ands r3, r2
|
||
8000d72: 608b str r3, [r1, #8]
|
||
}
|
||
|
||
/* Enable or disable the falling trigger */
|
||
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
|
||
8000d74: 683b ldr r3, [r7, #0]
|
||
8000d76: 685b ldr r3, [r3, #4]
|
||
8000d78: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
||
8000d7c: 2b00 cmp r3, #0
|
||
8000d7e: d025 beq.n 8000dcc <HAL_GPIO_Init+0x2f4>
|
||
{
|
||
SET_BIT(EXTI->FTSR, iocurrent);
|
||
8000d80: 4b11 ldr r3, [pc, #68] ; (8000dc8 <HAL_GPIO_Init+0x2f0>)
|
||
8000d82: 68da ldr r2, [r3, #12]
|
||
8000d84: 4910 ldr r1, [pc, #64] ; (8000dc8 <HAL_GPIO_Init+0x2f0>)
|
||
8000d86: 69bb ldr r3, [r7, #24]
|
||
8000d88: 4313 orrs r3, r2
|
||
8000d8a: 60cb str r3, [r1, #12]
|
||
8000d8c: e025 b.n 8000dda <HAL_GPIO_Init+0x302>
|
||
8000d8e: bf00 nop
|
||
8000d90: 10320000 .word 0x10320000
|
||
8000d94: 10310000 .word 0x10310000
|
||
8000d98: 10220000 .word 0x10220000
|
||
8000d9c: 10210000 .word 0x10210000
|
||
8000da0: 10120000 .word 0x10120000
|
||
8000da4: 10110000 .word 0x10110000
|
||
8000da8: 40021000 .word 0x40021000
|
||
8000dac: 40010000 .word 0x40010000
|
||
8000db0: 40010800 .word 0x40010800
|
||
8000db4: 40010c00 .word 0x40010c00
|
||
8000db8: 40011000 .word 0x40011000
|
||
8000dbc: 40011400 .word 0x40011400
|
||
8000dc0: 40011800 .word 0x40011800
|
||
8000dc4: 40011c00 .word 0x40011c00
|
||
8000dc8: 40010400 .word 0x40010400
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->FTSR, iocurrent);
|
||
8000dcc: 4b0b ldr r3, [pc, #44] ; (8000dfc <HAL_GPIO_Init+0x324>)
|
||
8000dce: 68da ldr r2, [r3, #12]
|
||
8000dd0: 69bb ldr r3, [r7, #24]
|
||
8000dd2: 43db mvns r3, r3
|
||
8000dd4: 4909 ldr r1, [pc, #36] ; (8000dfc <HAL_GPIO_Init+0x324>)
|
||
8000dd6: 4013 ands r3, r2
|
||
8000dd8: 60cb str r3, [r1, #12]
|
||
}
|
||
}
|
||
}
|
||
|
||
position++;
|
||
8000dda: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000ddc: 3301 adds r3, #1
|
||
8000dde: 627b str r3, [r7, #36] ; 0x24
|
||
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
||
8000de0: 683b ldr r3, [r7, #0]
|
||
8000de2: 681a ldr r2, [r3, #0]
|
||
8000de4: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8000de6: fa22 f303 lsr.w r3, r2, r3
|
||
8000dea: 2b00 cmp r3, #0
|
||
8000dec: f47f ae7e bne.w 8000aec <HAL_GPIO_Init+0x14>
|
||
}
|
||
}
|
||
8000df0: bf00 nop
|
||
8000df2: bf00 nop
|
||
8000df4: 372c adds r7, #44 ; 0x2c
|
||
8000df6: 46bd mov sp, r7
|
||
8000df8: bc80 pop {r7}
|
||
8000dfa: 4770 bx lr
|
||
8000dfc: 40010400 .word 0x40010400
|
||
|
||
08000e00 <HAL_GPIO_ReadPin>:
|
||
* @param GPIO_Pin: specifies the port bit to read.
|
||
* This parameter can be GPIO_PIN_x where x can be (0..15).
|
||
* @retval The input port pin value.
|
||
*/
|
||
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
|
||
{
|
||
8000e00: b480 push {r7}
|
||
8000e02: b085 sub sp, #20
|
||
8000e04: af00 add r7, sp, #0
|
||
8000e06: 6078 str r0, [r7, #4]
|
||
8000e08: 460b mov r3, r1
|
||
8000e0a: 807b strh r3, [r7, #2]
|
||
GPIO_PinState bitstatus;
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||
|
||
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
|
||
8000e0c: 687b ldr r3, [r7, #4]
|
||
8000e0e: 689a ldr r2, [r3, #8]
|
||
8000e10: 887b ldrh r3, [r7, #2]
|
||
8000e12: 4013 ands r3, r2
|
||
8000e14: 2b00 cmp r3, #0
|
||
8000e16: d002 beq.n 8000e1e <HAL_GPIO_ReadPin+0x1e>
|
||
{
|
||
bitstatus = GPIO_PIN_SET;
|
||
8000e18: 2301 movs r3, #1
|
||
8000e1a: 73fb strb r3, [r7, #15]
|
||
8000e1c: e001 b.n 8000e22 <HAL_GPIO_ReadPin+0x22>
|
||
}
|
||
else
|
||
{
|
||
bitstatus = GPIO_PIN_RESET;
|
||
8000e1e: 2300 movs r3, #0
|
||
8000e20: 73fb strb r3, [r7, #15]
|
||
}
|
||
return bitstatus;
|
||
8000e22: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
8000e24: 4618 mov r0, r3
|
||
8000e26: 3714 adds r7, #20
|
||
8000e28: 46bd mov sp, r7
|
||
8000e2a: bc80 pop {r7}
|
||
8000e2c: 4770 bx lr
|
||
|
||
08000e2e <HAL_GPIO_WritePin>:
|
||
* @arg GPIO_PIN_RESET: to clear the port pin
|
||
* @arg GPIO_PIN_SET: to set the port pin
|
||
* @retval None
|
||
*/
|
||
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
|
||
{
|
||
8000e2e: b480 push {r7}
|
||
8000e30: b083 sub sp, #12
|
||
8000e32: af00 add r7, sp, #0
|
||
8000e34: 6078 str r0, [r7, #4]
|
||
8000e36: 460b mov r3, r1
|
||
8000e38: 807b strh r3, [r7, #2]
|
||
8000e3a: 4613 mov r3, r2
|
||
8000e3c: 707b strb r3, [r7, #1]
|
||
/* Check the parameters */
|
||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||
assert_param(IS_GPIO_PIN_ACTION(PinState));
|
||
|
||
if (PinState != GPIO_PIN_RESET)
|
||
8000e3e: 787b ldrb r3, [r7, #1]
|
||
8000e40: 2b00 cmp r3, #0
|
||
8000e42: d003 beq.n 8000e4c <HAL_GPIO_WritePin+0x1e>
|
||
{
|
||
GPIOx->BSRR = GPIO_Pin;
|
||
8000e44: 887a ldrh r2, [r7, #2]
|
||
8000e46: 687b ldr r3, [r7, #4]
|
||
8000e48: 611a str r2, [r3, #16]
|
||
}
|
||
else
|
||
{
|
||
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
||
}
|
||
}
|
||
8000e4a: e003 b.n 8000e54 <HAL_GPIO_WritePin+0x26>
|
||
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
||
8000e4c: 887b ldrh r3, [r7, #2]
|
||
8000e4e: 041a lsls r2, r3, #16
|
||
8000e50: 687b ldr r3, [r7, #4]
|
||
8000e52: 611a str r2, [r3, #16]
|
||
}
|
||
8000e54: bf00 nop
|
||
8000e56: 370c adds r7, #12
|
||
8000e58: 46bd mov sp, r7
|
||
8000e5a: bc80 pop {r7}
|
||
8000e5c: 4770 bx lr
|
||
...
|
||
|
||
08000e60 <HAL_RCC_OscConfig>:
|
||
* supported by this macro. User should request a transition to HSE Off
|
||
* first and then HSE On or HSE Bypass.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
||
{
|
||
8000e60: b580 push {r7, lr}
|
||
8000e62: b086 sub sp, #24
|
||
8000e64: af00 add r7, sp, #0
|
||
8000e66: 6078 str r0, [r7, #4]
|
||
uint32_t tickstart;
|
||
uint32_t pll_config;
|
||
|
||
/* Check Null pointer */
|
||
if (RCC_OscInitStruct == NULL)
|
||
8000e68: 687b ldr r3, [r7, #4]
|
||
8000e6a: 2b00 cmp r3, #0
|
||
8000e6c: d101 bne.n 8000e72 <HAL_RCC_OscConfig+0x12>
|
||
{
|
||
return HAL_ERROR;
|
||
8000e6e: 2301 movs r3, #1
|
||
8000e70: e26c b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
||
|
||
/*------------------------------- HSE Configuration ------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
||
8000e72: 687b ldr r3, [r7, #4]
|
||
8000e74: 681b ldr r3, [r3, #0]
|
||
8000e76: f003 0301 and.w r3, r3, #1
|
||
8000e7a: 2b00 cmp r3, #0
|
||
8000e7c: f000 8087 beq.w 8000f8e <HAL_RCC_OscConfig+0x12e>
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
|
||
|
||
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
|
||
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
|
||
8000e80: 4b92 ldr r3, [pc, #584] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000e82: 685b ldr r3, [r3, #4]
|
||
8000e84: f003 030c and.w r3, r3, #12
|
||
8000e88: 2b04 cmp r3, #4
|
||
8000e8a: d00c beq.n 8000ea6 <HAL_RCC_OscConfig+0x46>
|
||
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
|
||
8000e8c: 4b8f ldr r3, [pc, #572] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000e8e: 685b ldr r3, [r3, #4]
|
||
8000e90: f003 030c and.w r3, r3, #12
|
||
8000e94: 2b08 cmp r3, #8
|
||
8000e96: d112 bne.n 8000ebe <HAL_RCC_OscConfig+0x5e>
|
||
8000e98: 4b8c ldr r3, [pc, #560] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000e9a: 685b ldr r3, [r3, #4]
|
||
8000e9c: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8000ea0: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8000ea4: d10b bne.n 8000ebe <HAL_RCC_OscConfig+0x5e>
|
||
{
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
||
8000ea6: 4b89 ldr r3, [pc, #548] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000ea8: 681b ldr r3, [r3, #0]
|
||
8000eaa: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8000eae: 2b00 cmp r3, #0
|
||
8000eb0: d06c beq.n 8000f8c <HAL_RCC_OscConfig+0x12c>
|
||
8000eb2: 687b ldr r3, [r7, #4]
|
||
8000eb4: 685b ldr r3, [r3, #4]
|
||
8000eb6: 2b00 cmp r3, #0
|
||
8000eb8: d168 bne.n 8000f8c <HAL_RCC_OscConfig+0x12c>
|
||
{
|
||
return HAL_ERROR;
|
||
8000eba: 2301 movs r3, #1
|
||
8000ebc: e246 b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Set the new HSE configuration ---------------------------------------*/
|
||
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
||
8000ebe: 687b ldr r3, [r7, #4]
|
||
8000ec0: 685b ldr r3, [r3, #4]
|
||
8000ec2: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8000ec6: d106 bne.n 8000ed6 <HAL_RCC_OscConfig+0x76>
|
||
8000ec8: 4b80 ldr r3, [pc, #512] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000eca: 681b ldr r3, [r3, #0]
|
||
8000ecc: 4a7f ldr r2, [pc, #508] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000ece: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
||
8000ed2: 6013 str r3, [r2, #0]
|
||
8000ed4: e02e b.n 8000f34 <HAL_RCC_OscConfig+0xd4>
|
||
8000ed6: 687b ldr r3, [r7, #4]
|
||
8000ed8: 685b ldr r3, [r3, #4]
|
||
8000eda: 2b00 cmp r3, #0
|
||
8000edc: d10c bne.n 8000ef8 <HAL_RCC_OscConfig+0x98>
|
||
8000ede: 4b7b ldr r3, [pc, #492] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000ee0: 681b ldr r3, [r3, #0]
|
||
8000ee2: 4a7a ldr r2, [pc, #488] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000ee4: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
||
8000ee8: 6013 str r3, [r2, #0]
|
||
8000eea: 4b78 ldr r3, [pc, #480] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000eec: 681b ldr r3, [r3, #0]
|
||
8000eee: 4a77 ldr r2, [pc, #476] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000ef0: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
||
8000ef4: 6013 str r3, [r2, #0]
|
||
8000ef6: e01d b.n 8000f34 <HAL_RCC_OscConfig+0xd4>
|
||
8000ef8: 687b ldr r3, [r7, #4]
|
||
8000efa: 685b ldr r3, [r3, #4]
|
||
8000efc: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
|
||
8000f00: d10c bne.n 8000f1c <HAL_RCC_OscConfig+0xbc>
|
||
8000f02: 4b72 ldr r3, [pc, #456] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000f04: 681b ldr r3, [r3, #0]
|
||
8000f06: 4a71 ldr r2, [pc, #452] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000f08: f443 2380 orr.w r3, r3, #262144 ; 0x40000
|
||
8000f0c: 6013 str r3, [r2, #0]
|
||
8000f0e: 4b6f ldr r3, [pc, #444] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000f10: 681b ldr r3, [r3, #0]
|
||
8000f12: 4a6e ldr r2, [pc, #440] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000f14: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
||
8000f18: 6013 str r3, [r2, #0]
|
||
8000f1a: e00b b.n 8000f34 <HAL_RCC_OscConfig+0xd4>
|
||
8000f1c: 4b6b ldr r3, [pc, #428] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000f1e: 681b ldr r3, [r3, #0]
|
||
8000f20: 4a6a ldr r2, [pc, #424] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000f22: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
||
8000f26: 6013 str r3, [r2, #0]
|
||
8000f28: 4b68 ldr r3, [pc, #416] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000f2a: 681b ldr r3, [r3, #0]
|
||
8000f2c: 4a67 ldr r2, [pc, #412] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000f2e: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
||
8000f32: 6013 str r3, [r2, #0]
|
||
|
||
|
||
/* Check the HSE State */
|
||
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
|
||
8000f34: 687b ldr r3, [r7, #4]
|
||
8000f36: 685b ldr r3, [r3, #4]
|
||
8000f38: 2b00 cmp r3, #0
|
||
8000f3a: d013 beq.n 8000f64 <HAL_RCC_OscConfig+0x104>
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8000f3c: f7ff fcba bl 80008b4 <HAL_GetTick>
|
||
8000f40: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSE is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
8000f42: e008 b.n 8000f56 <HAL_RCC_OscConfig+0xf6>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
||
8000f44: f7ff fcb6 bl 80008b4 <HAL_GetTick>
|
||
8000f48: 4602 mov r2, r0
|
||
8000f4a: 693b ldr r3, [r7, #16]
|
||
8000f4c: 1ad3 subs r3, r2, r3
|
||
8000f4e: 2b64 cmp r3, #100 ; 0x64
|
||
8000f50: d901 bls.n 8000f56 <HAL_RCC_OscConfig+0xf6>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8000f52: 2303 movs r3, #3
|
||
8000f54: e1fa b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
8000f56: 4b5d ldr r3, [pc, #372] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000f58: 681b ldr r3, [r3, #0]
|
||
8000f5a: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8000f5e: 2b00 cmp r3, #0
|
||
8000f60: d0f0 beq.n 8000f44 <HAL_RCC_OscConfig+0xe4>
|
||
8000f62: e014 b.n 8000f8e <HAL_RCC_OscConfig+0x12e>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8000f64: f7ff fca6 bl 80008b4 <HAL_GetTick>
|
||
8000f68: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSE is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
||
8000f6a: e008 b.n 8000f7e <HAL_RCC_OscConfig+0x11e>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
||
8000f6c: f7ff fca2 bl 80008b4 <HAL_GetTick>
|
||
8000f70: 4602 mov r2, r0
|
||
8000f72: 693b ldr r3, [r7, #16]
|
||
8000f74: 1ad3 subs r3, r2, r3
|
||
8000f76: 2b64 cmp r3, #100 ; 0x64
|
||
8000f78: d901 bls.n 8000f7e <HAL_RCC_OscConfig+0x11e>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8000f7a: 2303 movs r3, #3
|
||
8000f7c: e1e6 b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
||
8000f7e: 4b53 ldr r3, [pc, #332] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000f80: 681b ldr r3, [r3, #0]
|
||
8000f82: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8000f86: 2b00 cmp r3, #0
|
||
8000f88: d1f0 bne.n 8000f6c <HAL_RCC_OscConfig+0x10c>
|
||
8000f8a: e000 b.n 8000f8e <HAL_RCC_OscConfig+0x12e>
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
||
8000f8c: bf00 nop
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*----------------------------- HSI Configuration --------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
|
||
8000f8e: 687b ldr r3, [r7, #4]
|
||
8000f90: 681b ldr r3, [r3, #0]
|
||
8000f92: f003 0302 and.w r3, r3, #2
|
||
8000f96: 2b00 cmp r3, #0
|
||
8000f98: d063 beq.n 8001062 <HAL_RCC_OscConfig+0x202>
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
|
||
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
|
||
|
||
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
|
||
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
|
||
8000f9a: 4b4c ldr r3, [pc, #304] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000f9c: 685b ldr r3, [r3, #4]
|
||
8000f9e: f003 030c and.w r3, r3, #12
|
||
8000fa2: 2b00 cmp r3, #0
|
||
8000fa4: d00b beq.n 8000fbe <HAL_RCC_OscConfig+0x15e>
|
||
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
|
||
8000fa6: 4b49 ldr r3, [pc, #292] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000fa8: 685b ldr r3, [r3, #4]
|
||
8000faa: f003 030c and.w r3, r3, #12
|
||
8000fae: 2b08 cmp r3, #8
|
||
8000fb0: d11c bne.n 8000fec <HAL_RCC_OscConfig+0x18c>
|
||
8000fb2: 4b46 ldr r3, [pc, #280] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000fb4: 685b ldr r3, [r3, #4]
|
||
8000fb6: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8000fba: 2b00 cmp r3, #0
|
||
8000fbc: d116 bne.n 8000fec <HAL_RCC_OscConfig+0x18c>
|
||
{
|
||
/* When HSI is used as system clock it will not disabled */
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
||
8000fbe: 4b43 ldr r3, [pc, #268] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000fc0: 681b ldr r3, [r3, #0]
|
||
8000fc2: f003 0302 and.w r3, r3, #2
|
||
8000fc6: 2b00 cmp r3, #0
|
||
8000fc8: d005 beq.n 8000fd6 <HAL_RCC_OscConfig+0x176>
|
||
8000fca: 687b ldr r3, [r7, #4]
|
||
8000fcc: 691b ldr r3, [r3, #16]
|
||
8000fce: 2b01 cmp r3, #1
|
||
8000fd0: d001 beq.n 8000fd6 <HAL_RCC_OscConfig+0x176>
|
||
{
|
||
return HAL_ERROR;
|
||
8000fd2: 2301 movs r3, #1
|
||
8000fd4: e1ba b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
/* Otherwise, just the calibration is allowed */
|
||
else
|
||
{
|
||
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
||
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
||
8000fd6: 4b3d ldr r3, [pc, #244] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000fd8: 681b ldr r3, [r3, #0]
|
||
8000fda: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
||
8000fde: 687b ldr r3, [r7, #4]
|
||
8000fe0: 695b ldr r3, [r3, #20]
|
||
8000fe2: 00db lsls r3, r3, #3
|
||
8000fe4: 4939 ldr r1, [pc, #228] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8000fe6: 4313 orrs r3, r2
|
||
8000fe8: 600b str r3, [r1, #0]
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
||
8000fea: e03a b.n 8001062 <HAL_RCC_OscConfig+0x202>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Check the HSI State */
|
||
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
|
||
8000fec: 687b ldr r3, [r7, #4]
|
||
8000fee: 691b ldr r3, [r3, #16]
|
||
8000ff0: 2b00 cmp r3, #0
|
||
8000ff2: d020 beq.n 8001036 <HAL_RCC_OscConfig+0x1d6>
|
||
{
|
||
/* Enable the Internal High Speed oscillator (HSI). */
|
||
__HAL_RCC_HSI_ENABLE();
|
||
8000ff4: 4b36 ldr r3, [pc, #216] ; (80010d0 <HAL_RCC_OscConfig+0x270>)
|
||
8000ff6: 2201 movs r2, #1
|
||
8000ff8: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8000ffa: f7ff fc5b bl 80008b4 <HAL_GetTick>
|
||
8000ffe: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSI is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8001000: e008 b.n 8001014 <HAL_RCC_OscConfig+0x1b4>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
||
8001002: f7ff fc57 bl 80008b4 <HAL_GetTick>
|
||
8001006: 4602 mov r2, r0
|
||
8001008: 693b ldr r3, [r7, #16]
|
||
800100a: 1ad3 subs r3, r2, r3
|
||
800100c: 2b02 cmp r3, #2
|
||
800100e: d901 bls.n 8001014 <HAL_RCC_OscConfig+0x1b4>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001010: 2303 movs r3, #3
|
||
8001012: e19b b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8001014: 4b2d ldr r3, [pc, #180] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8001016: 681b ldr r3, [r3, #0]
|
||
8001018: f003 0302 and.w r3, r3, #2
|
||
800101c: 2b00 cmp r3, #0
|
||
800101e: d0f0 beq.n 8001002 <HAL_RCC_OscConfig+0x1a2>
|
||
}
|
||
}
|
||
|
||
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
||
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
||
8001020: 4b2a ldr r3, [pc, #168] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8001022: 681b ldr r3, [r3, #0]
|
||
8001024: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
||
8001028: 687b ldr r3, [r7, #4]
|
||
800102a: 695b ldr r3, [r3, #20]
|
||
800102c: 00db lsls r3, r3, #3
|
||
800102e: 4927 ldr r1, [pc, #156] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8001030: 4313 orrs r3, r2
|
||
8001032: 600b str r3, [r1, #0]
|
||
8001034: e015 b.n 8001062 <HAL_RCC_OscConfig+0x202>
|
||
}
|
||
else
|
||
{
|
||
/* Disable the Internal High Speed oscillator (HSI). */
|
||
__HAL_RCC_HSI_DISABLE();
|
||
8001036: 4b26 ldr r3, [pc, #152] ; (80010d0 <HAL_RCC_OscConfig+0x270>)
|
||
8001038: 2200 movs r2, #0
|
||
800103a: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
800103c: f7ff fc3a bl 80008b4 <HAL_GetTick>
|
||
8001040: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSI is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
||
8001042: e008 b.n 8001056 <HAL_RCC_OscConfig+0x1f6>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
||
8001044: f7ff fc36 bl 80008b4 <HAL_GetTick>
|
||
8001048: 4602 mov r2, r0
|
||
800104a: 693b ldr r3, [r7, #16]
|
||
800104c: 1ad3 subs r3, r2, r3
|
||
800104e: 2b02 cmp r3, #2
|
||
8001050: d901 bls.n 8001056 <HAL_RCC_OscConfig+0x1f6>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001052: 2303 movs r3, #3
|
||
8001054: e17a b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
||
8001056: 4b1d ldr r3, [pc, #116] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8001058: 681b ldr r3, [r3, #0]
|
||
800105a: f003 0302 and.w r3, r3, #2
|
||
800105e: 2b00 cmp r3, #0
|
||
8001060: d1f0 bne.n 8001044 <HAL_RCC_OscConfig+0x1e4>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*------------------------------ LSI Configuration -------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
|
||
8001062: 687b ldr r3, [r7, #4]
|
||
8001064: 681b ldr r3, [r3, #0]
|
||
8001066: f003 0308 and.w r3, r3, #8
|
||
800106a: 2b00 cmp r3, #0
|
||
800106c: d03a beq.n 80010e4 <HAL_RCC_OscConfig+0x284>
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
|
||
|
||
/* Check the LSI State */
|
||
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
|
||
800106e: 687b ldr r3, [r7, #4]
|
||
8001070: 699b ldr r3, [r3, #24]
|
||
8001072: 2b00 cmp r3, #0
|
||
8001074: d019 beq.n 80010aa <HAL_RCC_OscConfig+0x24a>
|
||
{
|
||
/* Enable the Internal Low Speed oscillator (LSI). */
|
||
__HAL_RCC_LSI_ENABLE();
|
||
8001076: 4b17 ldr r3, [pc, #92] ; (80010d4 <HAL_RCC_OscConfig+0x274>)
|
||
8001078: 2201 movs r2, #1
|
||
800107a: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
800107c: f7ff fc1a bl 80008b4 <HAL_GetTick>
|
||
8001080: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSI is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
||
8001082: e008 b.n 8001096 <HAL_RCC_OscConfig+0x236>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
||
8001084: f7ff fc16 bl 80008b4 <HAL_GetTick>
|
||
8001088: 4602 mov r2, r0
|
||
800108a: 693b ldr r3, [r7, #16]
|
||
800108c: 1ad3 subs r3, r2, r3
|
||
800108e: 2b02 cmp r3, #2
|
||
8001090: d901 bls.n 8001096 <HAL_RCC_OscConfig+0x236>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001092: 2303 movs r3, #3
|
||
8001094: e15a b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
||
8001096: 4b0d ldr r3, [pc, #52] ; (80010cc <HAL_RCC_OscConfig+0x26c>)
|
||
8001098: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800109a: f003 0302 and.w r3, r3, #2
|
||
800109e: 2b00 cmp r3, #0
|
||
80010a0: d0f0 beq.n 8001084 <HAL_RCC_OscConfig+0x224>
|
||
}
|
||
}
|
||
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
|
||
should be added.*/
|
||
RCC_Delay(1);
|
||
80010a2: 2001 movs r0, #1
|
||
80010a4: f000 faa6 bl 80015f4 <RCC_Delay>
|
||
80010a8: e01c b.n 80010e4 <HAL_RCC_OscConfig+0x284>
|
||
}
|
||
else
|
||
{
|
||
/* Disable the Internal Low Speed oscillator (LSI). */
|
||
__HAL_RCC_LSI_DISABLE();
|
||
80010aa: 4b0a ldr r3, [pc, #40] ; (80010d4 <HAL_RCC_OscConfig+0x274>)
|
||
80010ac: 2200 movs r2, #0
|
||
80010ae: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80010b0: f7ff fc00 bl 80008b4 <HAL_GetTick>
|
||
80010b4: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSI is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
||
80010b6: e00f b.n 80010d8 <HAL_RCC_OscConfig+0x278>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
||
80010b8: f7ff fbfc bl 80008b4 <HAL_GetTick>
|
||
80010bc: 4602 mov r2, r0
|
||
80010be: 693b ldr r3, [r7, #16]
|
||
80010c0: 1ad3 subs r3, r2, r3
|
||
80010c2: 2b02 cmp r3, #2
|
||
80010c4: d908 bls.n 80010d8 <HAL_RCC_OscConfig+0x278>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80010c6: 2303 movs r3, #3
|
||
80010c8: e140 b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
80010ca: bf00 nop
|
||
80010cc: 40021000 .word 0x40021000
|
||
80010d0: 42420000 .word 0x42420000
|
||
80010d4: 42420480 .word 0x42420480
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
||
80010d8: 4b9e ldr r3, [pc, #632] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
80010da: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80010dc: f003 0302 and.w r3, r3, #2
|
||
80010e0: 2b00 cmp r3, #0
|
||
80010e2: d1e9 bne.n 80010b8 <HAL_RCC_OscConfig+0x258>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*------------------------------ LSE Configuration -------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
|
||
80010e4: 687b ldr r3, [r7, #4]
|
||
80010e6: 681b ldr r3, [r3, #0]
|
||
80010e8: f003 0304 and.w r3, r3, #4
|
||
80010ec: 2b00 cmp r3, #0
|
||
80010ee: f000 80a6 beq.w 800123e <HAL_RCC_OscConfig+0x3de>
|
||
{
|
||
FlagStatus pwrclkchanged = RESET;
|
||
80010f2: 2300 movs r3, #0
|
||
80010f4: 75fb strb r3, [r7, #23]
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
|
||
|
||
/* Update LSE configuration in Backup Domain control register */
|
||
/* Requires to enable write access to Backup Domain of necessary */
|
||
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
|
||
80010f6: 4b97 ldr r3, [pc, #604] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
80010f8: 69db ldr r3, [r3, #28]
|
||
80010fa: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
80010fe: 2b00 cmp r3, #0
|
||
8001100: d10d bne.n 800111e <HAL_RCC_OscConfig+0x2be>
|
||
{
|
||
__HAL_RCC_PWR_CLK_ENABLE();
|
||
8001102: 4b94 ldr r3, [pc, #592] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001104: 69db ldr r3, [r3, #28]
|
||
8001106: 4a93 ldr r2, [pc, #588] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001108: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
||
800110c: 61d3 str r3, [r2, #28]
|
||
800110e: 4b91 ldr r3, [pc, #580] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001110: 69db ldr r3, [r3, #28]
|
||
8001112: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
8001116: 60bb str r3, [r7, #8]
|
||
8001118: 68bb ldr r3, [r7, #8]
|
||
pwrclkchanged = SET;
|
||
800111a: 2301 movs r3, #1
|
||
800111c: 75fb strb r3, [r7, #23]
|
||
}
|
||
|
||
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
800111e: 4b8e ldr r3, [pc, #568] ; (8001358 <HAL_RCC_OscConfig+0x4f8>)
|
||
8001120: 681b ldr r3, [r3, #0]
|
||
8001122: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8001126: 2b00 cmp r3, #0
|
||
8001128: d118 bne.n 800115c <HAL_RCC_OscConfig+0x2fc>
|
||
{
|
||
/* Enable write access to Backup domain */
|
||
SET_BIT(PWR->CR, PWR_CR_DBP);
|
||
800112a: 4b8b ldr r3, [pc, #556] ; (8001358 <HAL_RCC_OscConfig+0x4f8>)
|
||
800112c: 681b ldr r3, [r3, #0]
|
||
800112e: 4a8a ldr r2, [pc, #552] ; (8001358 <HAL_RCC_OscConfig+0x4f8>)
|
||
8001130: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
8001134: 6013 str r3, [r2, #0]
|
||
|
||
/* Wait for Backup domain Write protection disable */
|
||
tickstart = HAL_GetTick();
|
||
8001136: f7ff fbbd bl 80008b4 <HAL_GetTick>
|
||
800113a: 6138 str r0, [r7, #16]
|
||
|
||
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
800113c: e008 b.n 8001150 <HAL_RCC_OscConfig+0x2f0>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
||
800113e: f7ff fbb9 bl 80008b4 <HAL_GetTick>
|
||
8001142: 4602 mov r2, r0
|
||
8001144: 693b ldr r3, [r7, #16]
|
||
8001146: 1ad3 subs r3, r2, r3
|
||
8001148: 2b64 cmp r3, #100 ; 0x64
|
||
800114a: d901 bls.n 8001150 <HAL_RCC_OscConfig+0x2f0>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800114c: 2303 movs r3, #3
|
||
800114e: e0fd b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
8001150: 4b81 ldr r3, [pc, #516] ; (8001358 <HAL_RCC_OscConfig+0x4f8>)
|
||
8001152: 681b ldr r3, [r3, #0]
|
||
8001154: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8001158: 2b00 cmp r3, #0
|
||
800115a: d0f0 beq.n 800113e <HAL_RCC_OscConfig+0x2de>
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Set the new LSE configuration -----------------------------------------*/
|
||
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
||
800115c: 687b ldr r3, [r7, #4]
|
||
800115e: 68db ldr r3, [r3, #12]
|
||
8001160: 2b01 cmp r3, #1
|
||
8001162: d106 bne.n 8001172 <HAL_RCC_OscConfig+0x312>
|
||
8001164: 4b7b ldr r3, [pc, #492] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001166: 6a1b ldr r3, [r3, #32]
|
||
8001168: 4a7a ldr r2, [pc, #488] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
800116a: f043 0301 orr.w r3, r3, #1
|
||
800116e: 6213 str r3, [r2, #32]
|
||
8001170: e02d b.n 80011ce <HAL_RCC_OscConfig+0x36e>
|
||
8001172: 687b ldr r3, [r7, #4]
|
||
8001174: 68db ldr r3, [r3, #12]
|
||
8001176: 2b00 cmp r3, #0
|
||
8001178: d10c bne.n 8001194 <HAL_RCC_OscConfig+0x334>
|
||
800117a: 4b76 ldr r3, [pc, #472] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
800117c: 6a1b ldr r3, [r3, #32]
|
||
800117e: 4a75 ldr r2, [pc, #468] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001180: f023 0301 bic.w r3, r3, #1
|
||
8001184: 6213 str r3, [r2, #32]
|
||
8001186: 4b73 ldr r3, [pc, #460] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001188: 6a1b ldr r3, [r3, #32]
|
||
800118a: 4a72 ldr r2, [pc, #456] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
800118c: f023 0304 bic.w r3, r3, #4
|
||
8001190: 6213 str r3, [r2, #32]
|
||
8001192: e01c b.n 80011ce <HAL_RCC_OscConfig+0x36e>
|
||
8001194: 687b ldr r3, [r7, #4]
|
||
8001196: 68db ldr r3, [r3, #12]
|
||
8001198: 2b05 cmp r3, #5
|
||
800119a: d10c bne.n 80011b6 <HAL_RCC_OscConfig+0x356>
|
||
800119c: 4b6d ldr r3, [pc, #436] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
800119e: 6a1b ldr r3, [r3, #32]
|
||
80011a0: 4a6c ldr r2, [pc, #432] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
80011a2: f043 0304 orr.w r3, r3, #4
|
||
80011a6: 6213 str r3, [r2, #32]
|
||
80011a8: 4b6a ldr r3, [pc, #424] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
80011aa: 6a1b ldr r3, [r3, #32]
|
||
80011ac: 4a69 ldr r2, [pc, #420] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
80011ae: f043 0301 orr.w r3, r3, #1
|
||
80011b2: 6213 str r3, [r2, #32]
|
||
80011b4: e00b b.n 80011ce <HAL_RCC_OscConfig+0x36e>
|
||
80011b6: 4b67 ldr r3, [pc, #412] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
80011b8: 6a1b ldr r3, [r3, #32]
|
||
80011ba: 4a66 ldr r2, [pc, #408] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
80011bc: f023 0301 bic.w r3, r3, #1
|
||
80011c0: 6213 str r3, [r2, #32]
|
||
80011c2: 4b64 ldr r3, [pc, #400] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
80011c4: 6a1b ldr r3, [r3, #32]
|
||
80011c6: 4a63 ldr r2, [pc, #396] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
80011c8: f023 0304 bic.w r3, r3, #4
|
||
80011cc: 6213 str r3, [r2, #32]
|
||
/* Check the LSE State */
|
||
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
|
||
80011ce: 687b ldr r3, [r7, #4]
|
||
80011d0: 68db ldr r3, [r3, #12]
|
||
80011d2: 2b00 cmp r3, #0
|
||
80011d4: d015 beq.n 8001202 <HAL_RCC_OscConfig+0x3a2>
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80011d6: f7ff fb6d bl 80008b4 <HAL_GetTick>
|
||
80011da: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSE is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
||
80011dc: e00a b.n 80011f4 <HAL_RCC_OscConfig+0x394>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
||
80011de: f7ff fb69 bl 80008b4 <HAL_GetTick>
|
||
80011e2: 4602 mov r2, r0
|
||
80011e4: 693b ldr r3, [r7, #16]
|
||
80011e6: 1ad3 subs r3, r2, r3
|
||
80011e8: f241 3288 movw r2, #5000 ; 0x1388
|
||
80011ec: 4293 cmp r3, r2
|
||
80011ee: d901 bls.n 80011f4 <HAL_RCC_OscConfig+0x394>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80011f0: 2303 movs r3, #3
|
||
80011f2: e0ab b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
||
80011f4: 4b57 ldr r3, [pc, #348] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
80011f6: 6a1b ldr r3, [r3, #32]
|
||
80011f8: f003 0302 and.w r3, r3, #2
|
||
80011fc: 2b00 cmp r3, #0
|
||
80011fe: d0ee beq.n 80011de <HAL_RCC_OscConfig+0x37e>
|
||
8001200: e014 b.n 800122c <HAL_RCC_OscConfig+0x3cc>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8001202: f7ff fb57 bl 80008b4 <HAL_GetTick>
|
||
8001206: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSE is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
||
8001208: e00a b.n 8001220 <HAL_RCC_OscConfig+0x3c0>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
||
800120a: f7ff fb53 bl 80008b4 <HAL_GetTick>
|
||
800120e: 4602 mov r2, r0
|
||
8001210: 693b ldr r3, [r7, #16]
|
||
8001212: 1ad3 subs r3, r2, r3
|
||
8001214: f241 3288 movw r2, #5000 ; 0x1388
|
||
8001218: 4293 cmp r3, r2
|
||
800121a: d901 bls.n 8001220 <HAL_RCC_OscConfig+0x3c0>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800121c: 2303 movs r3, #3
|
||
800121e: e095 b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
||
8001220: 4b4c ldr r3, [pc, #304] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001222: 6a1b ldr r3, [r3, #32]
|
||
8001224: f003 0302 and.w r3, r3, #2
|
||
8001228: 2b00 cmp r3, #0
|
||
800122a: d1ee bne.n 800120a <HAL_RCC_OscConfig+0x3aa>
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Require to disable power clock if necessary */
|
||
if (pwrclkchanged == SET)
|
||
800122c: 7dfb ldrb r3, [r7, #23]
|
||
800122e: 2b01 cmp r3, #1
|
||
8001230: d105 bne.n 800123e <HAL_RCC_OscConfig+0x3de>
|
||
{
|
||
__HAL_RCC_PWR_CLK_DISABLE();
|
||
8001232: 4b48 ldr r3, [pc, #288] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001234: 69db ldr r3, [r3, #28]
|
||
8001236: 4a47 ldr r2, [pc, #284] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001238: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
|
||
800123c: 61d3 str r3, [r2, #28]
|
||
|
||
#endif /* RCC_CR_PLL2ON */
|
||
/*-------------------------------- PLL Configuration -----------------------*/
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
|
||
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
|
||
800123e: 687b ldr r3, [r7, #4]
|
||
8001240: 69db ldr r3, [r3, #28]
|
||
8001242: 2b00 cmp r3, #0
|
||
8001244: f000 8081 beq.w 800134a <HAL_RCC_OscConfig+0x4ea>
|
||
{
|
||
/* Check if the PLL is used as system clock or not */
|
||
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
|
||
8001248: 4b42 ldr r3, [pc, #264] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
800124a: 685b ldr r3, [r3, #4]
|
||
800124c: f003 030c and.w r3, r3, #12
|
||
8001250: 2b08 cmp r3, #8
|
||
8001252: d061 beq.n 8001318 <HAL_RCC_OscConfig+0x4b8>
|
||
{
|
||
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
|
||
8001254: 687b ldr r3, [r7, #4]
|
||
8001256: 69db ldr r3, [r3, #28]
|
||
8001258: 2b02 cmp r3, #2
|
||
800125a: d146 bne.n 80012ea <HAL_RCC_OscConfig+0x48a>
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
|
||
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
|
||
|
||
/* Disable the main PLL. */
|
||
__HAL_RCC_PLL_DISABLE();
|
||
800125c: 4b3f ldr r3, [pc, #252] ; (800135c <HAL_RCC_OscConfig+0x4fc>)
|
||
800125e: 2200 movs r2, #0
|
||
8001260: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8001262: f7ff fb27 bl 80008b4 <HAL_GetTick>
|
||
8001266: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
8001268: e008 b.n 800127c <HAL_RCC_OscConfig+0x41c>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
800126a: f7ff fb23 bl 80008b4 <HAL_GetTick>
|
||
800126e: 4602 mov r2, r0
|
||
8001270: 693b ldr r3, [r7, #16]
|
||
8001272: 1ad3 subs r3, r2, r3
|
||
8001274: 2b02 cmp r3, #2
|
||
8001276: d901 bls.n 800127c <HAL_RCC_OscConfig+0x41c>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001278: 2303 movs r3, #3
|
||
800127a: e067 b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
800127c: 4b35 ldr r3, [pc, #212] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
800127e: 681b ldr r3, [r3, #0]
|
||
8001280: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
8001284: 2b00 cmp r3, #0
|
||
8001286: d1f0 bne.n 800126a <HAL_RCC_OscConfig+0x40a>
|
||
}
|
||
}
|
||
|
||
/* Configure the HSE prediv factor --------------------------------*/
|
||
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
|
||
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
|
||
8001288: 687b ldr r3, [r7, #4]
|
||
800128a: 6a1b ldr r3, [r3, #32]
|
||
800128c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8001290: d108 bne.n 80012a4 <HAL_RCC_OscConfig+0x444>
|
||
/* Set PREDIV1 source */
|
||
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
|
||
#endif /* RCC_CFGR2_PREDIV1SRC */
|
||
|
||
/* Set PREDIV1 Value */
|
||
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
|
||
8001292: 4b30 ldr r3, [pc, #192] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001294: 685b ldr r3, [r3, #4]
|
||
8001296: f423 3200 bic.w r2, r3, #131072 ; 0x20000
|
||
800129a: 687b ldr r3, [r7, #4]
|
||
800129c: 689b ldr r3, [r3, #8]
|
||
800129e: 492d ldr r1, [pc, #180] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
80012a0: 4313 orrs r3, r2
|
||
80012a2: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Configure the main PLL clock source and multiplication factors. */
|
||
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
|
||
80012a4: 4b2b ldr r3, [pc, #172] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
80012a6: 685b ldr r3, [r3, #4]
|
||
80012a8: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000
|
||
80012ac: 687b ldr r3, [r7, #4]
|
||
80012ae: 6a19 ldr r1, [r3, #32]
|
||
80012b0: 687b ldr r3, [r7, #4]
|
||
80012b2: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80012b4: 430b orrs r3, r1
|
||
80012b6: 4927 ldr r1, [pc, #156] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
80012b8: 4313 orrs r3, r2
|
||
80012ba: 604b str r3, [r1, #4]
|
||
RCC_OscInitStruct->PLL.PLLMUL);
|
||
/* Enable the main PLL. */
|
||
__HAL_RCC_PLL_ENABLE();
|
||
80012bc: 4b27 ldr r3, [pc, #156] ; (800135c <HAL_RCC_OscConfig+0x4fc>)
|
||
80012be: 2201 movs r2, #1
|
||
80012c0: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80012c2: f7ff faf7 bl 80008b4 <HAL_GetTick>
|
||
80012c6: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
80012c8: e008 b.n 80012dc <HAL_RCC_OscConfig+0x47c>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
80012ca: f7ff faf3 bl 80008b4 <HAL_GetTick>
|
||
80012ce: 4602 mov r2, r0
|
||
80012d0: 693b ldr r3, [r7, #16]
|
||
80012d2: 1ad3 subs r3, r2, r3
|
||
80012d4: 2b02 cmp r3, #2
|
||
80012d6: d901 bls.n 80012dc <HAL_RCC_OscConfig+0x47c>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80012d8: 2303 movs r3, #3
|
||
80012da: e037 b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
80012dc: 4b1d ldr r3, [pc, #116] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
80012de: 681b ldr r3, [r3, #0]
|
||
80012e0: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
80012e4: 2b00 cmp r3, #0
|
||
80012e6: d0f0 beq.n 80012ca <HAL_RCC_OscConfig+0x46a>
|
||
80012e8: e02f b.n 800134a <HAL_RCC_OscConfig+0x4ea>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Disable the main PLL. */
|
||
__HAL_RCC_PLL_DISABLE();
|
||
80012ea: 4b1c ldr r3, [pc, #112] ; (800135c <HAL_RCC_OscConfig+0x4fc>)
|
||
80012ec: 2200 movs r2, #0
|
||
80012ee: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80012f0: f7ff fae0 bl 80008b4 <HAL_GetTick>
|
||
80012f4: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
80012f6: e008 b.n 800130a <HAL_RCC_OscConfig+0x4aa>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
80012f8: f7ff fadc bl 80008b4 <HAL_GetTick>
|
||
80012fc: 4602 mov r2, r0
|
||
80012fe: 693b ldr r3, [r7, #16]
|
||
8001300: 1ad3 subs r3, r2, r3
|
||
8001302: 2b02 cmp r3, #2
|
||
8001304: d901 bls.n 800130a <HAL_RCC_OscConfig+0x4aa>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001306: 2303 movs r3, #3
|
||
8001308: e020 b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
800130a: 4b12 ldr r3, [pc, #72] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
800130c: 681b ldr r3, [r3, #0]
|
||
800130e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
8001312: 2b00 cmp r3, #0
|
||
8001314: d1f0 bne.n 80012f8 <HAL_RCC_OscConfig+0x498>
|
||
8001316: e018 b.n 800134a <HAL_RCC_OscConfig+0x4ea>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Check if there is a request to disable the PLL used as System clock source */
|
||
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
|
||
8001318: 687b ldr r3, [r7, #4]
|
||
800131a: 69db ldr r3, [r3, #28]
|
||
800131c: 2b01 cmp r3, #1
|
||
800131e: d101 bne.n 8001324 <HAL_RCC_OscConfig+0x4c4>
|
||
{
|
||
return HAL_ERROR;
|
||
8001320: 2301 movs r3, #1
|
||
8001322: e013 b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
else
|
||
{
|
||
/* Do not return HAL_ERROR if request repeats the current configuration */
|
||
pll_config = RCC->CFGR;
|
||
8001324: 4b0b ldr r3, [pc, #44] ; (8001354 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001326: 685b ldr r3, [r3, #4]
|
||
8001328: 60fb str r3, [r7, #12]
|
||
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
||
800132a: 68fb ldr r3, [r7, #12]
|
||
800132c: f403 3280 and.w r2, r3, #65536 ; 0x10000
|
||
8001330: 687b ldr r3, [r7, #4]
|
||
8001332: 6a1b ldr r3, [r3, #32]
|
||
8001334: 429a cmp r2, r3
|
||
8001336: d106 bne.n 8001346 <HAL_RCC_OscConfig+0x4e6>
|
||
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
|
||
8001338: 68fb ldr r3, [r7, #12]
|
||
800133a: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000
|
||
800133e: 687b ldr r3, [r7, #4]
|
||
8001340: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
||
8001342: 429a cmp r2, r3
|
||
8001344: d001 beq.n 800134a <HAL_RCC_OscConfig+0x4ea>
|
||
{
|
||
return HAL_ERROR;
|
||
8001346: 2301 movs r3, #1
|
||
8001348: e000 b.n 800134c <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
return HAL_OK;
|
||
800134a: 2300 movs r3, #0
|
||
}
|
||
800134c: 4618 mov r0, r3
|
||
800134e: 3718 adds r7, #24
|
||
8001350: 46bd mov sp, r7
|
||
8001352: bd80 pop {r7, pc}
|
||
8001354: 40021000 .word 0x40021000
|
||
8001358: 40007000 .word 0x40007000
|
||
800135c: 42420060 .word 0x42420060
|
||
|
||
08001360 <HAL_RCC_ClockConfig>:
|
||
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
|
||
* currently used as system clock source.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
|
||
{
|
||
8001360: b580 push {r7, lr}
|
||
8001362: b084 sub sp, #16
|
||
8001364: af00 add r7, sp, #0
|
||
8001366: 6078 str r0, [r7, #4]
|
||
8001368: 6039 str r1, [r7, #0]
|
||
uint32_t tickstart;
|
||
|
||
/* Check Null pointer */
|
||
if (RCC_ClkInitStruct == NULL)
|
||
800136a: 687b ldr r3, [r7, #4]
|
||
800136c: 2b00 cmp r3, #0
|
||
800136e: d101 bne.n 8001374 <HAL_RCC_ClockConfig+0x14>
|
||
{
|
||
return HAL_ERROR;
|
||
8001370: 2301 movs r3, #1
|
||
8001372: e0d0 b.n 8001516 <HAL_RCC_ClockConfig+0x1b6>
|
||
must be correctly programmed according to the frequency of the CPU clock
|
||
(HCLK) of the device. */
|
||
|
||
#if defined(FLASH_ACR_LATENCY)
|
||
/* Increasing the number of wait states because of higher CPU frequency */
|
||
if (FLatency > __HAL_FLASH_GET_LATENCY())
|
||
8001374: 4b6a ldr r3, [pc, #424] ; (8001520 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8001376: 681b ldr r3, [r3, #0]
|
||
8001378: f003 0307 and.w r3, r3, #7
|
||
800137c: 683a ldr r2, [r7, #0]
|
||
800137e: 429a cmp r2, r3
|
||
8001380: d910 bls.n 80013a4 <HAL_RCC_ClockConfig+0x44>
|
||
{
|
||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||
__HAL_FLASH_SET_LATENCY(FLatency);
|
||
8001382: 4b67 ldr r3, [pc, #412] ; (8001520 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8001384: 681b ldr r3, [r3, #0]
|
||
8001386: f023 0207 bic.w r2, r3, #7
|
||
800138a: 4965 ldr r1, [pc, #404] ; (8001520 <HAL_RCC_ClockConfig+0x1c0>)
|
||
800138c: 683b ldr r3, [r7, #0]
|
||
800138e: 4313 orrs r3, r2
|
||
8001390: 600b str r3, [r1, #0]
|
||
|
||
/* Check that the new number of wait states is taken into account to access the Flash
|
||
memory by reading the FLASH_ACR register */
|
||
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
||
8001392: 4b63 ldr r3, [pc, #396] ; (8001520 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8001394: 681b ldr r3, [r3, #0]
|
||
8001396: f003 0307 and.w r3, r3, #7
|
||
800139a: 683a ldr r2, [r7, #0]
|
||
800139c: 429a cmp r2, r3
|
||
800139e: d001 beq.n 80013a4 <HAL_RCC_ClockConfig+0x44>
|
||
{
|
||
return HAL_ERROR;
|
||
80013a0: 2301 movs r3, #1
|
||
80013a2: e0b8 b.n 8001516 <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
|
||
#endif /* FLASH_ACR_LATENCY */
|
||
/*-------------------------- HCLK Configuration --------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
|
||
80013a4: 687b ldr r3, [r7, #4]
|
||
80013a6: 681b ldr r3, [r3, #0]
|
||
80013a8: f003 0302 and.w r3, r3, #2
|
||
80013ac: 2b00 cmp r3, #0
|
||
80013ae: d020 beq.n 80013f2 <HAL_RCC_ClockConfig+0x92>
|
||
{
|
||
/* Set the highest APBx dividers in order to ensure that we do not go through
|
||
a non-spec phase whatever we decrease or increase HCLK. */
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
||
80013b0: 687b ldr r3, [r7, #4]
|
||
80013b2: 681b ldr r3, [r3, #0]
|
||
80013b4: f003 0304 and.w r3, r3, #4
|
||
80013b8: 2b00 cmp r3, #0
|
||
80013ba: d005 beq.n 80013c8 <HAL_RCC_ClockConfig+0x68>
|
||
{
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
|
||
80013bc: 4b59 ldr r3, [pc, #356] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80013be: 685b ldr r3, [r3, #4]
|
||
80013c0: 4a58 ldr r2, [pc, #352] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80013c2: f443 63e0 orr.w r3, r3, #1792 ; 0x700
|
||
80013c6: 6053 str r3, [r2, #4]
|
||
}
|
||
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
||
80013c8: 687b ldr r3, [r7, #4]
|
||
80013ca: 681b ldr r3, [r3, #0]
|
||
80013cc: f003 0308 and.w r3, r3, #8
|
||
80013d0: 2b00 cmp r3, #0
|
||
80013d2: d005 beq.n 80013e0 <HAL_RCC_ClockConfig+0x80>
|
||
{
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
|
||
80013d4: 4b53 ldr r3, [pc, #332] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80013d6: 685b ldr r3, [r3, #4]
|
||
80013d8: 4a52 ldr r2, [pc, #328] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80013da: f443 5360 orr.w r3, r3, #14336 ; 0x3800
|
||
80013de: 6053 str r3, [r2, #4]
|
||
}
|
||
|
||
/* Set the new HCLK clock divider */
|
||
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
|
||
80013e0: 4b50 ldr r3, [pc, #320] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80013e2: 685b ldr r3, [r3, #4]
|
||
80013e4: f023 02f0 bic.w r2, r3, #240 ; 0xf0
|
||
80013e8: 687b ldr r3, [r7, #4]
|
||
80013ea: 689b ldr r3, [r3, #8]
|
||
80013ec: 494d ldr r1, [pc, #308] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80013ee: 4313 orrs r3, r2
|
||
80013f0: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/*------------------------- SYSCLK Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
|
||
80013f2: 687b ldr r3, [r7, #4]
|
||
80013f4: 681b ldr r3, [r3, #0]
|
||
80013f6: f003 0301 and.w r3, r3, #1
|
||
80013fa: 2b00 cmp r3, #0
|
||
80013fc: d040 beq.n 8001480 <HAL_RCC_ClockConfig+0x120>
|
||
{
|
||
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
|
||
|
||
/* HSE is selected as System Clock Source */
|
||
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
|
||
80013fe: 687b ldr r3, [r7, #4]
|
||
8001400: 685b ldr r3, [r3, #4]
|
||
8001402: 2b01 cmp r3, #1
|
||
8001404: d107 bne.n 8001416 <HAL_RCC_ClockConfig+0xb6>
|
||
{
|
||
/* Check the HSE ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
8001406: 4b47 ldr r3, [pc, #284] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001408: 681b ldr r3, [r3, #0]
|
||
800140a: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
800140e: 2b00 cmp r3, #0
|
||
8001410: d115 bne.n 800143e <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
8001412: 2301 movs r3, #1
|
||
8001414: e07f b.n 8001516 <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
/* PLL is selected as System Clock Source */
|
||
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
|
||
8001416: 687b ldr r3, [r7, #4]
|
||
8001418: 685b ldr r3, [r3, #4]
|
||
800141a: 2b02 cmp r3, #2
|
||
800141c: d107 bne.n 800142e <HAL_RCC_ClockConfig+0xce>
|
||
{
|
||
/* Check the PLL ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
800141e: 4b41 ldr r3, [pc, #260] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001420: 681b ldr r3, [r3, #0]
|
||
8001422: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
8001426: 2b00 cmp r3, #0
|
||
8001428: d109 bne.n 800143e <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
800142a: 2301 movs r3, #1
|
||
800142c: e073 b.n 8001516 <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
/* HSI is selected as System Clock Source */
|
||
else
|
||
{
|
||
/* Check the HSI ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
800142e: 4b3d ldr r3, [pc, #244] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001430: 681b ldr r3, [r3, #0]
|
||
8001432: f003 0302 and.w r3, r3, #2
|
||
8001436: 2b00 cmp r3, #0
|
||
8001438: d101 bne.n 800143e <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
800143a: 2301 movs r3, #1
|
||
800143c: e06b b.n 8001516 <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
|
||
800143e: 4b39 ldr r3, [pc, #228] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001440: 685b ldr r3, [r3, #4]
|
||
8001442: f023 0203 bic.w r2, r3, #3
|
||
8001446: 687b ldr r3, [r7, #4]
|
||
8001448: 685b ldr r3, [r3, #4]
|
||
800144a: 4936 ldr r1, [pc, #216] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
800144c: 4313 orrs r3, r2
|
||
800144e: 604b str r3, [r1, #4]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8001450: f7ff fa30 bl 80008b4 <HAL_GetTick>
|
||
8001454: 60f8 str r0, [r7, #12]
|
||
|
||
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
||
8001456: e00a b.n 800146e <HAL_RCC_ClockConfig+0x10e>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
|
||
8001458: f7ff fa2c bl 80008b4 <HAL_GetTick>
|
||
800145c: 4602 mov r2, r0
|
||
800145e: 68fb ldr r3, [r7, #12]
|
||
8001460: 1ad3 subs r3, r2, r3
|
||
8001462: f241 3288 movw r2, #5000 ; 0x1388
|
||
8001466: 4293 cmp r3, r2
|
||
8001468: d901 bls.n 800146e <HAL_RCC_ClockConfig+0x10e>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800146a: 2303 movs r3, #3
|
||
800146c: e053 b.n 8001516 <HAL_RCC_ClockConfig+0x1b6>
|
||
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
||
800146e: 4b2d ldr r3, [pc, #180] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8001470: 685b ldr r3, [r3, #4]
|
||
8001472: f003 020c and.w r2, r3, #12
|
||
8001476: 687b ldr r3, [r7, #4]
|
||
8001478: 685b ldr r3, [r3, #4]
|
||
800147a: 009b lsls r3, r3, #2
|
||
800147c: 429a cmp r2, r3
|
||
800147e: d1eb bne.n 8001458 <HAL_RCC_ClockConfig+0xf8>
|
||
}
|
||
}
|
||
|
||
#if defined(FLASH_ACR_LATENCY)
|
||
/* Decreasing the number of wait states because of lower CPU frequency */
|
||
if (FLatency < __HAL_FLASH_GET_LATENCY())
|
||
8001480: 4b27 ldr r3, [pc, #156] ; (8001520 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8001482: 681b ldr r3, [r3, #0]
|
||
8001484: f003 0307 and.w r3, r3, #7
|
||
8001488: 683a ldr r2, [r7, #0]
|
||
800148a: 429a cmp r2, r3
|
||
800148c: d210 bcs.n 80014b0 <HAL_RCC_ClockConfig+0x150>
|
||
{
|
||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||
__HAL_FLASH_SET_LATENCY(FLatency);
|
||
800148e: 4b24 ldr r3, [pc, #144] ; (8001520 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8001490: 681b ldr r3, [r3, #0]
|
||
8001492: f023 0207 bic.w r2, r3, #7
|
||
8001496: 4922 ldr r1, [pc, #136] ; (8001520 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8001498: 683b ldr r3, [r7, #0]
|
||
800149a: 4313 orrs r3, r2
|
||
800149c: 600b str r3, [r1, #0]
|
||
|
||
/* Check that the new number of wait states is taken into account to access the Flash
|
||
memory by reading the FLASH_ACR register */
|
||
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
||
800149e: 4b20 ldr r3, [pc, #128] ; (8001520 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80014a0: 681b ldr r3, [r3, #0]
|
||
80014a2: f003 0307 and.w r3, r3, #7
|
||
80014a6: 683a ldr r2, [r7, #0]
|
||
80014a8: 429a cmp r2, r3
|
||
80014aa: d001 beq.n 80014b0 <HAL_RCC_ClockConfig+0x150>
|
||
{
|
||
return HAL_ERROR;
|
||
80014ac: 2301 movs r3, #1
|
||
80014ae: e032 b.n 8001516 <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
#endif /* FLASH_ACR_LATENCY */
|
||
|
||
/*-------------------------- PCLK1 Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
||
80014b0: 687b ldr r3, [r7, #4]
|
||
80014b2: 681b ldr r3, [r3, #0]
|
||
80014b4: f003 0304 and.w r3, r3, #4
|
||
80014b8: 2b00 cmp r3, #0
|
||
80014ba: d008 beq.n 80014ce <HAL_RCC_ClockConfig+0x16e>
|
||
{
|
||
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
|
||
80014bc: 4b19 ldr r3, [pc, #100] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80014be: 685b ldr r3, [r3, #4]
|
||
80014c0: f423 62e0 bic.w r2, r3, #1792 ; 0x700
|
||
80014c4: 687b ldr r3, [r7, #4]
|
||
80014c6: 68db ldr r3, [r3, #12]
|
||
80014c8: 4916 ldr r1, [pc, #88] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80014ca: 4313 orrs r3, r2
|
||
80014cc: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/*-------------------------- PCLK2 Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
||
80014ce: 687b ldr r3, [r7, #4]
|
||
80014d0: 681b ldr r3, [r3, #0]
|
||
80014d2: f003 0308 and.w r3, r3, #8
|
||
80014d6: 2b00 cmp r3, #0
|
||
80014d8: d009 beq.n 80014ee <HAL_RCC_ClockConfig+0x18e>
|
||
{
|
||
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
|
||
80014da: 4b12 ldr r3, [pc, #72] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80014dc: 685b ldr r3, [r3, #4]
|
||
80014de: f423 5260 bic.w r2, r3, #14336 ; 0x3800
|
||
80014e2: 687b ldr r3, [r7, #4]
|
||
80014e4: 691b ldr r3, [r3, #16]
|
||
80014e6: 00db lsls r3, r3, #3
|
||
80014e8: 490e ldr r1, [pc, #56] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80014ea: 4313 orrs r3, r2
|
||
80014ec: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Update the SystemCoreClock global variable */
|
||
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
|
||
80014ee: f000 f821 bl 8001534 <HAL_RCC_GetSysClockFreq>
|
||
80014f2: 4602 mov r2, r0
|
||
80014f4: 4b0b ldr r3, [pc, #44] ; (8001524 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80014f6: 685b ldr r3, [r3, #4]
|
||
80014f8: 091b lsrs r3, r3, #4
|
||
80014fa: f003 030f and.w r3, r3, #15
|
||
80014fe: 490a ldr r1, [pc, #40] ; (8001528 <HAL_RCC_ClockConfig+0x1c8>)
|
||
8001500: 5ccb ldrb r3, [r1, r3]
|
||
8001502: fa22 f303 lsr.w r3, r2, r3
|
||
8001506: 4a09 ldr r2, [pc, #36] ; (800152c <HAL_RCC_ClockConfig+0x1cc>)
|
||
8001508: 6013 str r3, [r2, #0]
|
||
|
||
/* Configure the source of time base considering new system clocks settings*/
|
||
HAL_InitTick(uwTickPrio);
|
||
800150a: 4b09 ldr r3, [pc, #36] ; (8001530 <HAL_RCC_ClockConfig+0x1d0>)
|
||
800150c: 681b ldr r3, [r3, #0]
|
||
800150e: 4618 mov r0, r3
|
||
8001510: f7ff f98e bl 8000830 <HAL_InitTick>
|
||
|
||
return HAL_OK;
|
||
8001514: 2300 movs r3, #0
|
||
}
|
||
8001516: 4618 mov r0, r3
|
||
8001518: 3710 adds r7, #16
|
||
800151a: 46bd mov sp, r7
|
||
800151c: bd80 pop {r7, pc}
|
||
800151e: bf00 nop
|
||
8001520: 40022000 .word 0x40022000
|
||
8001524: 40021000 .word 0x40021000
|
||
8001528: 08006a68 .word 0x08006a68
|
||
800152c: 20000000 .word 0x20000000
|
||
8001530: 20000004 .word 0x20000004
|
||
|
||
08001534 <HAL_RCC_GetSysClockFreq>:
|
||
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
|
||
*
|
||
* @retval SYSCLK frequency
|
||
*/
|
||
uint32_t HAL_RCC_GetSysClockFreq(void)
|
||
{
|
||
8001534: b490 push {r4, r7}
|
||
8001536: b08a sub sp, #40 ; 0x28
|
||
8001538: af00 add r7, sp, #0
|
||
#if defined(RCC_CFGR2_PREDIV1SRC)
|
||
const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13};
|
||
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
||
#else
|
||
const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
|
||
800153a: 4b2a ldr r3, [pc, #168] ; (80015e4 <HAL_RCC_GetSysClockFreq+0xb0>)
|
||
800153c: 1d3c adds r4, r7, #4
|
||
800153e: cb0f ldmia r3, {r0, r1, r2, r3}
|
||
8001540: e884 000f stmia.w r4, {r0, r1, r2, r3}
|
||
#if defined(RCC_CFGR2_PREDIV1)
|
||
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
||
#else
|
||
const uint8_t aPredivFactorTable[2] = {1, 2};
|
||
8001544: f240 2301 movw r3, #513 ; 0x201
|
||
8001548: 803b strh r3, [r7, #0]
|
||
#endif /*RCC_CFGR2_PREDIV1*/
|
||
|
||
#endif
|
||
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
|
||
800154a: 2300 movs r3, #0
|
||
800154c: 61fb str r3, [r7, #28]
|
||
800154e: 2300 movs r3, #0
|
||
8001550: 61bb str r3, [r7, #24]
|
||
8001552: 2300 movs r3, #0
|
||
8001554: 627b str r3, [r7, #36] ; 0x24
|
||
8001556: 2300 movs r3, #0
|
||
8001558: 617b str r3, [r7, #20]
|
||
uint32_t sysclockfreq = 0U;
|
||
800155a: 2300 movs r3, #0
|
||
800155c: 623b str r3, [r7, #32]
|
||
#if defined(RCC_CFGR2_PREDIV1SRC)
|
||
uint32_t prediv2 = 0U, pll2mul = 0U;
|
||
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
||
|
||
tmpreg = RCC->CFGR;
|
||
800155e: 4b22 ldr r3, [pc, #136] ; (80015e8 <HAL_RCC_GetSysClockFreq+0xb4>)
|
||
8001560: 685b ldr r3, [r3, #4]
|
||
8001562: 61fb str r3, [r7, #28]
|
||
|
||
/* Get SYSCLK source -------------------------------------------------------*/
|
||
switch (tmpreg & RCC_CFGR_SWS)
|
||
8001564: 69fb ldr r3, [r7, #28]
|
||
8001566: f003 030c and.w r3, r3, #12
|
||
800156a: 2b04 cmp r3, #4
|
||
800156c: d002 beq.n 8001574 <HAL_RCC_GetSysClockFreq+0x40>
|
||
800156e: 2b08 cmp r3, #8
|
||
8001570: d003 beq.n 800157a <HAL_RCC_GetSysClockFreq+0x46>
|
||
8001572: e02d b.n 80015d0 <HAL_RCC_GetSysClockFreq+0x9c>
|
||
{
|
||
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
|
||
{
|
||
sysclockfreq = HSE_VALUE;
|
||
8001574: 4b1d ldr r3, [pc, #116] ; (80015ec <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
8001576: 623b str r3, [r7, #32]
|
||
break;
|
||
8001578: e02d b.n 80015d6 <HAL_RCC_GetSysClockFreq+0xa2>
|
||
}
|
||
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
|
||
{
|
||
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
|
||
800157a: 69fb ldr r3, [r7, #28]
|
||
800157c: 0c9b lsrs r3, r3, #18
|
||
800157e: f003 030f and.w r3, r3, #15
|
||
8001582: f107 0228 add.w r2, r7, #40 ; 0x28
|
||
8001586: 4413 add r3, r2
|
||
8001588: f813 3c24 ldrb.w r3, [r3, #-36]
|
||
800158c: 617b str r3, [r7, #20]
|
||
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
|
||
800158e: 69fb ldr r3, [r7, #28]
|
||
8001590: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8001594: 2b00 cmp r3, #0
|
||
8001596: d013 beq.n 80015c0 <HAL_RCC_GetSysClockFreq+0x8c>
|
||
{
|
||
#if defined(RCC_CFGR2_PREDIV1)
|
||
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
|
||
#else
|
||
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
|
||
8001598: 4b13 ldr r3, [pc, #76] ; (80015e8 <HAL_RCC_GetSysClockFreq+0xb4>)
|
||
800159a: 685b ldr r3, [r3, #4]
|
||
800159c: 0c5b lsrs r3, r3, #17
|
||
800159e: f003 0301 and.w r3, r3, #1
|
||
80015a2: f107 0228 add.w r2, r7, #40 ; 0x28
|
||
80015a6: 4413 add r3, r2
|
||
80015a8: f813 3c28 ldrb.w r3, [r3, #-40]
|
||
80015ac: 61bb str r3, [r7, #24]
|
||
{
|
||
pllclk = pllclk / 2;
|
||
}
|
||
#else
|
||
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
|
||
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
|
||
80015ae: 697b ldr r3, [r7, #20]
|
||
80015b0: 4a0e ldr r2, [pc, #56] ; (80015ec <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
80015b2: fb02 f203 mul.w r2, r2, r3
|
||
80015b6: 69bb ldr r3, [r7, #24]
|
||
80015b8: fbb2 f3f3 udiv r3, r2, r3
|
||
80015bc: 627b str r3, [r7, #36] ; 0x24
|
||
80015be: e004 b.n 80015ca <HAL_RCC_GetSysClockFreq+0x96>
|
||
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
||
}
|
||
else
|
||
{
|
||
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
|
||
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
|
||
80015c0: 697b ldr r3, [r7, #20]
|
||
80015c2: 4a0b ldr r2, [pc, #44] ; (80015f0 <HAL_RCC_GetSysClockFreq+0xbc>)
|
||
80015c4: fb02 f303 mul.w r3, r2, r3
|
||
80015c8: 627b str r3, [r7, #36] ; 0x24
|
||
}
|
||
sysclockfreq = pllclk;
|
||
80015ca: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80015cc: 623b str r3, [r7, #32]
|
||
break;
|
||
80015ce: e002 b.n 80015d6 <HAL_RCC_GetSysClockFreq+0xa2>
|
||
}
|
||
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
|
||
default: /* HSI used as system clock */
|
||
{
|
||
sysclockfreq = HSI_VALUE;
|
||
80015d0: 4b06 ldr r3, [pc, #24] ; (80015ec <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
80015d2: 623b str r3, [r7, #32]
|
||
break;
|
||
80015d4: bf00 nop
|
||
}
|
||
}
|
||
return sysclockfreq;
|
||
80015d6: 6a3b ldr r3, [r7, #32]
|
||
}
|
||
80015d8: 4618 mov r0, r3
|
||
80015da: 3728 adds r7, #40 ; 0x28
|
||
80015dc: 46bd mov sp, r7
|
||
80015de: bc90 pop {r4, r7}
|
||
80015e0: 4770 bx lr
|
||
80015e2: bf00 nop
|
||
80015e4: 080069f8 .word 0x080069f8
|
||
80015e8: 40021000 .word 0x40021000
|
||
80015ec: 007a1200 .word 0x007a1200
|
||
80015f0: 003d0900 .word 0x003d0900
|
||
|
||
080015f4 <RCC_Delay>:
|
||
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
|
||
* @param mdelay: specifies the delay time length, in milliseconds.
|
||
* @retval None
|
||
*/
|
||
static void RCC_Delay(uint32_t mdelay)
|
||
{
|
||
80015f4: b480 push {r7}
|
||
80015f6: b085 sub sp, #20
|
||
80015f8: af00 add r7, sp, #0
|
||
80015fa: 6078 str r0, [r7, #4]
|
||
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
|
||
80015fc: 4b0a ldr r3, [pc, #40] ; (8001628 <RCC_Delay+0x34>)
|
||
80015fe: 681b ldr r3, [r3, #0]
|
||
8001600: 4a0a ldr r2, [pc, #40] ; (800162c <RCC_Delay+0x38>)
|
||
8001602: fba2 2303 umull r2, r3, r2, r3
|
||
8001606: 0a5b lsrs r3, r3, #9
|
||
8001608: 687a ldr r2, [r7, #4]
|
||
800160a: fb02 f303 mul.w r3, r2, r3
|
||
800160e: 60fb str r3, [r7, #12]
|
||
do
|
||
{
|
||
__NOP();
|
||
8001610: bf00 nop
|
||
}
|
||
while (Delay --);
|
||
8001612: 68fb ldr r3, [r7, #12]
|
||
8001614: 1e5a subs r2, r3, #1
|
||
8001616: 60fa str r2, [r7, #12]
|
||
8001618: 2b00 cmp r3, #0
|
||
800161a: d1f9 bne.n 8001610 <RCC_Delay+0x1c>
|
||
}
|
||
800161c: bf00 nop
|
||
800161e: bf00 nop
|
||
8001620: 3714 adds r7, #20
|
||
8001622: 46bd mov sp, r7
|
||
8001624: bc80 pop {r7}
|
||
8001626: 4770 bx lr
|
||
8001628: 20000000 .word 0x20000000
|
||
800162c: 10624dd3 .word 0x10624dd3
|
||
|
||
08001630 <HAL_SPI_Init>:
|
||
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
|
||
* the configuration information for SPI module.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
|
||
{
|
||
8001630: b580 push {r7, lr}
|
||
8001632: b082 sub sp, #8
|
||
8001634: af00 add r7, sp, #0
|
||
8001636: 6078 str r0, [r7, #4]
|
||
/* Check the SPI handle allocation */
|
||
if (hspi == NULL)
|
||
8001638: 687b ldr r3, [r7, #4]
|
||
800163a: 2b00 cmp r3, #0
|
||
800163c: d101 bne.n 8001642 <HAL_SPI_Init+0x12>
|
||
{
|
||
return HAL_ERROR;
|
||
800163e: 2301 movs r3, #1
|
||
8001640: e076 b.n 8001730 <HAL_SPI_Init+0x100>
|
||
assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
|
||
assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
|
||
/* TI mode is not supported on this device.
|
||
TIMode parameter is mandatory equal to SPI_TIMODE_DISABLE */
|
||
assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
|
||
if (hspi->Init.TIMode == SPI_TIMODE_DISABLE)
|
||
8001642: 687b ldr r3, [r7, #4]
|
||
8001644: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8001646: 2b00 cmp r3, #0
|
||
8001648: d108 bne.n 800165c <HAL_SPI_Init+0x2c>
|
||
{
|
||
assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
|
||
assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
|
||
|
||
if (hspi->Init.Mode == SPI_MODE_MASTER)
|
||
800164a: 687b ldr r3, [r7, #4]
|
||
800164c: 685b ldr r3, [r3, #4]
|
||
800164e: f5b3 7f82 cmp.w r3, #260 ; 0x104
|
||
8001652: d009 beq.n 8001668 <HAL_SPI_Init+0x38>
|
||
assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
|
||
}
|
||
else
|
||
{
|
||
/* Baudrate prescaler not use in Motoraola Slave mode. force to default value */
|
||
hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
|
||
8001654: 687b ldr r3, [r7, #4]
|
||
8001656: 2200 movs r2, #0
|
||
8001658: 61da str r2, [r3, #28]
|
||
800165a: e005 b.n 8001668 <HAL_SPI_Init+0x38>
|
||
else
|
||
{
|
||
assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
|
||
|
||
/* Force polarity and phase to TI protocaol requirements */
|
||
hspi->Init.CLKPolarity = SPI_POLARITY_LOW;
|
||
800165c: 687b ldr r3, [r7, #4]
|
||
800165e: 2200 movs r2, #0
|
||
8001660: 611a str r2, [r3, #16]
|
||
hspi->Init.CLKPhase = SPI_PHASE_1EDGE;
|
||
8001662: 687b ldr r3, [r7, #4]
|
||
8001664: 2200 movs r2, #0
|
||
8001666: 615a str r2, [r3, #20]
|
||
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
|
||
{
|
||
assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
|
||
}
|
||
#else
|
||
hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
||
8001668: 687b ldr r3, [r7, #4]
|
||
800166a: 2200 movs r2, #0
|
||
800166c: 629a str r2, [r3, #40] ; 0x28
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
if (hspi->State == HAL_SPI_STATE_RESET)
|
||
800166e: 687b ldr r3, [r7, #4]
|
||
8001670: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
||
8001674: b2db uxtb r3, r3
|
||
8001676: 2b00 cmp r3, #0
|
||
8001678: d106 bne.n 8001688 <HAL_SPI_Init+0x58>
|
||
{
|
||
/* Allocate lock resource and initialize it */
|
||
hspi->Lock = HAL_UNLOCKED;
|
||
800167a: 687b ldr r3, [r7, #4]
|
||
800167c: 2200 movs r2, #0
|
||
800167e: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
|
||
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
||
hspi->MspInitCallback(hspi);
|
||
#else
|
||
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
||
HAL_SPI_MspInit(hspi);
|
||
8001682: 6878 ldr r0, [r7, #4]
|
||
8001684: f7fe ff8a bl 800059c <HAL_SPI_MspInit>
|
||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||
}
|
||
|
||
hspi->State = HAL_SPI_STATE_BUSY;
|
||
8001688: 687b ldr r3, [r7, #4]
|
||
800168a: 2202 movs r2, #2
|
||
800168c: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
|
||
/* Disable the selected SPI peripheral */
|
||
__HAL_SPI_DISABLE(hspi);
|
||
8001690: 687b ldr r3, [r7, #4]
|
||
8001692: 681b ldr r3, [r3, #0]
|
||
8001694: 681a ldr r2, [r3, #0]
|
||
8001696: 687b ldr r3, [r7, #4]
|
||
8001698: 681b ldr r3, [r3, #0]
|
||
800169a: f022 0240 bic.w r2, r2, #64 ; 0x40
|
||
800169e: 601a str r2, [r3, #0]
|
||
|
||
/*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
|
||
/* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
|
||
Communication speed, First bit and CRC calculation state */
|
||
WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) |
|
||
80016a0: 687b ldr r3, [r7, #4]
|
||
80016a2: 685b ldr r3, [r3, #4]
|
||
80016a4: f403 7282 and.w r2, r3, #260 ; 0x104
|
||
80016a8: 687b ldr r3, [r7, #4]
|
||
80016aa: 689b ldr r3, [r3, #8]
|
||
80016ac: f403 4304 and.w r3, r3, #33792 ; 0x8400
|
||
80016b0: 431a orrs r2, r3
|
||
80016b2: 687b ldr r3, [r7, #4]
|
||
80016b4: 68db ldr r3, [r3, #12]
|
||
80016b6: f403 6300 and.w r3, r3, #2048 ; 0x800
|
||
80016ba: 431a orrs r2, r3
|
||
80016bc: 687b ldr r3, [r7, #4]
|
||
80016be: 691b ldr r3, [r3, #16]
|
||
80016c0: f003 0302 and.w r3, r3, #2
|
||
80016c4: 431a orrs r2, r3
|
||
80016c6: 687b ldr r3, [r7, #4]
|
||
80016c8: 695b ldr r3, [r3, #20]
|
||
80016ca: f003 0301 and.w r3, r3, #1
|
||
80016ce: 431a orrs r2, r3
|
||
80016d0: 687b ldr r3, [r7, #4]
|
||
80016d2: 699b ldr r3, [r3, #24]
|
||
80016d4: f403 7300 and.w r3, r3, #512 ; 0x200
|
||
80016d8: 431a orrs r2, r3
|
||
80016da: 687b ldr r3, [r7, #4]
|
||
80016dc: 69db ldr r3, [r3, #28]
|
||
80016de: f003 0338 and.w r3, r3, #56 ; 0x38
|
||
80016e2: 431a orrs r2, r3
|
||
80016e4: 687b ldr r3, [r7, #4]
|
||
80016e6: 6a1b ldr r3, [r3, #32]
|
||
80016e8: f003 0380 and.w r3, r3, #128 ; 0x80
|
||
80016ec: ea42 0103 orr.w r1, r2, r3
|
||
80016f0: 687b ldr r3, [r7, #4]
|
||
80016f2: 6a9b ldr r3, [r3, #40] ; 0x28
|
||
80016f4: f403 5200 and.w r2, r3, #8192 ; 0x2000
|
||
80016f8: 687b ldr r3, [r7, #4]
|
||
80016fa: 681b ldr r3, [r3, #0]
|
||
80016fc: 430a orrs r2, r1
|
||
80016fe: 601a str r2, [r3, #0]
|
||
(hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) |
|
||
(hspi->Init.FirstBit & SPI_CR1_LSBFIRST) |
|
||
(hspi->Init.CRCCalculation & SPI_CR1_CRCEN)));
|
||
|
||
/* Configure : NSS management */
|
||
WRITE_REG(hspi->Instance->CR2, ((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE));
|
||
8001700: 687b ldr r3, [r7, #4]
|
||
8001702: 699b ldr r3, [r3, #24]
|
||
8001704: 0c1a lsrs r2, r3, #16
|
||
8001706: 687b ldr r3, [r7, #4]
|
||
8001708: 681b ldr r3, [r3, #0]
|
||
800170a: f002 0204 and.w r2, r2, #4
|
||
800170e: 605a str r2, [r3, #4]
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
#if defined(SPI_I2SCFGR_I2SMOD)
|
||
/* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
|
||
CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
|
||
8001710: 687b ldr r3, [r7, #4]
|
||
8001712: 681b ldr r3, [r3, #0]
|
||
8001714: 69da ldr r2, [r3, #28]
|
||
8001716: 687b ldr r3, [r7, #4]
|
||
8001718: 681b ldr r3, [r3, #0]
|
||
800171a: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
||
800171e: 61da str r2, [r3, #28]
|
||
#endif /* SPI_I2SCFGR_I2SMOD */
|
||
|
||
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
||
8001720: 687b ldr r3, [r7, #4]
|
||
8001722: 2200 movs r2, #0
|
||
8001724: 655a str r2, [r3, #84] ; 0x54
|
||
hspi->State = HAL_SPI_STATE_READY;
|
||
8001726: 687b ldr r3, [r7, #4]
|
||
8001728: 2201 movs r2, #1
|
||
800172a: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
|
||
return HAL_OK;
|
||
800172e: 2300 movs r3, #0
|
||
}
|
||
8001730: 4618 mov r0, r3
|
||
8001732: 3708 adds r7, #8
|
||
8001734: 46bd mov sp, r7
|
||
8001736: bd80 pop {r7, pc}
|
||
|
||
08001738 <HAL_SPI_Transmit>:
|
||
* @param Size amount of data to be sent
|
||
* @param Timeout Timeout duration
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
||
{
|
||
8001738: b580 push {r7, lr}
|
||
800173a: b088 sub sp, #32
|
||
800173c: af00 add r7, sp, #0
|
||
800173e: 60f8 str r0, [r7, #12]
|
||
8001740: 60b9 str r1, [r7, #8]
|
||
8001742: 603b str r3, [r7, #0]
|
||
8001744: 4613 mov r3, r2
|
||
8001746: 80fb strh r3, [r7, #6]
|
||
uint32_t tickstart;
|
||
HAL_StatusTypeDef errorcode = HAL_OK;
|
||
8001748: 2300 movs r3, #0
|
||
800174a: 77fb strb r3, [r7, #31]
|
||
|
||
/* Check Direction parameter */
|
||
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
|
||
|
||
/* Process Locked */
|
||
__HAL_LOCK(hspi);
|
||
800174c: 68fb ldr r3, [r7, #12]
|
||
800174e: f893 3050 ldrb.w r3, [r3, #80] ; 0x50
|
||
8001752: 2b01 cmp r3, #1
|
||
8001754: d101 bne.n 800175a <HAL_SPI_Transmit+0x22>
|
||
8001756: 2302 movs r3, #2
|
||
8001758: e126 b.n 80019a8 <HAL_SPI_Transmit+0x270>
|
||
800175a: 68fb ldr r3, [r7, #12]
|
||
800175c: 2201 movs r2, #1
|
||
800175e: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
|
||
/* Init tickstart for timeout management*/
|
||
tickstart = HAL_GetTick();
|
||
8001762: f7ff f8a7 bl 80008b4 <HAL_GetTick>
|
||
8001766: 61b8 str r0, [r7, #24]
|
||
initial_TxXferCount = Size;
|
||
8001768: 88fb ldrh r3, [r7, #6]
|
||
800176a: 82fb strh r3, [r7, #22]
|
||
|
||
if (hspi->State != HAL_SPI_STATE_READY)
|
||
800176c: 68fb ldr r3, [r7, #12]
|
||
800176e: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
||
8001772: b2db uxtb r3, r3
|
||
8001774: 2b01 cmp r3, #1
|
||
8001776: d002 beq.n 800177e <HAL_SPI_Transmit+0x46>
|
||
{
|
||
errorcode = HAL_BUSY;
|
||
8001778: 2302 movs r3, #2
|
||
800177a: 77fb strb r3, [r7, #31]
|
||
goto error;
|
||
800177c: e10b b.n 8001996 <HAL_SPI_Transmit+0x25e>
|
||
}
|
||
|
||
if ((pData == NULL) || (Size == 0U))
|
||
800177e: 68bb ldr r3, [r7, #8]
|
||
8001780: 2b00 cmp r3, #0
|
||
8001782: d002 beq.n 800178a <HAL_SPI_Transmit+0x52>
|
||
8001784: 88fb ldrh r3, [r7, #6]
|
||
8001786: 2b00 cmp r3, #0
|
||
8001788: d102 bne.n 8001790 <HAL_SPI_Transmit+0x58>
|
||
{
|
||
errorcode = HAL_ERROR;
|
||
800178a: 2301 movs r3, #1
|
||
800178c: 77fb strb r3, [r7, #31]
|
||
goto error;
|
||
800178e: e102 b.n 8001996 <HAL_SPI_Transmit+0x25e>
|
||
}
|
||
|
||
/* Set the transaction information */
|
||
hspi->State = HAL_SPI_STATE_BUSY_TX;
|
||
8001790: 68fb ldr r3, [r7, #12]
|
||
8001792: 2203 movs r2, #3
|
||
8001794: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
||
8001798: 68fb ldr r3, [r7, #12]
|
||
800179a: 2200 movs r2, #0
|
||
800179c: 655a str r2, [r3, #84] ; 0x54
|
||
hspi->pTxBuffPtr = (uint8_t *)pData;
|
||
800179e: 68fb ldr r3, [r7, #12]
|
||
80017a0: 68ba ldr r2, [r7, #8]
|
||
80017a2: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferSize = Size;
|
||
80017a4: 68fb ldr r3, [r7, #12]
|
||
80017a6: 88fa ldrh r2, [r7, #6]
|
||
80017a8: 869a strh r2, [r3, #52] ; 0x34
|
||
hspi->TxXferCount = Size;
|
||
80017aa: 68fb ldr r3, [r7, #12]
|
||
80017ac: 88fa ldrh r2, [r7, #6]
|
||
80017ae: 86da strh r2, [r3, #54] ; 0x36
|
||
|
||
/*Init field not used in handle to zero */
|
||
hspi->pRxBuffPtr = (uint8_t *)NULL;
|
||
80017b0: 68fb ldr r3, [r7, #12]
|
||
80017b2: 2200 movs r2, #0
|
||
80017b4: 639a str r2, [r3, #56] ; 0x38
|
||
hspi->RxXferSize = 0U;
|
||
80017b6: 68fb ldr r3, [r7, #12]
|
||
80017b8: 2200 movs r2, #0
|
||
80017ba: 879a strh r2, [r3, #60] ; 0x3c
|
||
hspi->RxXferCount = 0U;
|
||
80017bc: 68fb ldr r3, [r7, #12]
|
||
80017be: 2200 movs r2, #0
|
||
80017c0: 87da strh r2, [r3, #62] ; 0x3e
|
||
hspi->TxISR = NULL;
|
||
80017c2: 68fb ldr r3, [r7, #12]
|
||
80017c4: 2200 movs r2, #0
|
||
80017c6: 645a str r2, [r3, #68] ; 0x44
|
||
hspi->RxISR = NULL;
|
||
80017c8: 68fb ldr r3, [r7, #12]
|
||
80017ca: 2200 movs r2, #0
|
||
80017cc: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Configure communication direction : 1Line */
|
||
if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
|
||
80017ce: 68fb ldr r3, [r7, #12]
|
||
80017d0: 689b ldr r3, [r3, #8]
|
||
80017d2: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
||
80017d6: d10f bne.n 80017f8 <HAL_SPI_Transmit+0xc0>
|
||
{
|
||
/* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
|
||
__HAL_SPI_DISABLE(hspi);
|
||
80017d8: 68fb ldr r3, [r7, #12]
|
||
80017da: 681b ldr r3, [r3, #0]
|
||
80017dc: 681a ldr r2, [r3, #0]
|
||
80017de: 68fb ldr r3, [r7, #12]
|
||
80017e0: 681b ldr r3, [r3, #0]
|
||
80017e2: f022 0240 bic.w r2, r2, #64 ; 0x40
|
||
80017e6: 601a str r2, [r3, #0]
|
||
SPI_1LINE_TX(hspi);
|
||
80017e8: 68fb ldr r3, [r7, #12]
|
||
80017ea: 681b ldr r3, [r3, #0]
|
||
80017ec: 681a ldr r2, [r3, #0]
|
||
80017ee: 68fb ldr r3, [r7, #12]
|
||
80017f0: 681b ldr r3, [r3, #0]
|
||
80017f2: f442 4280 orr.w r2, r2, #16384 ; 0x4000
|
||
80017f6: 601a str r2, [r3, #0]
|
||
SPI_RESET_CRC(hspi);
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
/* Check if the SPI is already enabled */
|
||
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
|
||
80017f8: 68fb ldr r3, [r7, #12]
|
||
80017fa: 681b ldr r3, [r3, #0]
|
||
80017fc: 681b ldr r3, [r3, #0]
|
||
80017fe: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
8001802: 2b40 cmp r3, #64 ; 0x40
|
||
8001804: d007 beq.n 8001816 <HAL_SPI_Transmit+0xde>
|
||
{
|
||
/* Enable SPI peripheral */
|
||
__HAL_SPI_ENABLE(hspi);
|
||
8001806: 68fb ldr r3, [r7, #12]
|
||
8001808: 681b ldr r3, [r3, #0]
|
||
800180a: 681a ldr r2, [r3, #0]
|
||
800180c: 68fb ldr r3, [r7, #12]
|
||
800180e: 681b ldr r3, [r3, #0]
|
||
8001810: f042 0240 orr.w r2, r2, #64 ; 0x40
|
||
8001814: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Transmit data in 16 Bit mode */
|
||
if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
|
||
8001816: 68fb ldr r3, [r7, #12]
|
||
8001818: 68db ldr r3, [r3, #12]
|
||
800181a: f5b3 6f00 cmp.w r3, #2048 ; 0x800
|
||
800181e: d14b bne.n 80018b8 <HAL_SPI_Transmit+0x180>
|
||
{
|
||
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
|
||
8001820: 68fb ldr r3, [r7, #12]
|
||
8001822: 685b ldr r3, [r3, #4]
|
||
8001824: 2b00 cmp r3, #0
|
||
8001826: d002 beq.n 800182e <HAL_SPI_Transmit+0xf6>
|
||
8001828: 8afb ldrh r3, [r7, #22]
|
||
800182a: 2b01 cmp r3, #1
|
||
800182c: d13e bne.n 80018ac <HAL_SPI_Transmit+0x174>
|
||
{
|
||
hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
|
||
800182e: 68fb ldr r3, [r7, #12]
|
||
8001830: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001832: 881a ldrh r2, [r3, #0]
|
||
8001834: 68fb ldr r3, [r7, #12]
|
||
8001836: 681b ldr r3, [r3, #0]
|
||
8001838: 60da str r2, [r3, #12]
|
||
hspi->pTxBuffPtr += sizeof(uint16_t);
|
||
800183a: 68fb ldr r3, [r7, #12]
|
||
800183c: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
800183e: 1c9a adds r2, r3, #2
|
||
8001840: 68fb ldr r3, [r7, #12]
|
||
8001842: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
8001844: 68fb ldr r3, [r7, #12]
|
||
8001846: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001848: b29b uxth r3, r3
|
||
800184a: 3b01 subs r3, #1
|
||
800184c: b29a uxth r2, r3
|
||
800184e: 68fb ldr r3, [r7, #12]
|
||
8001850: 86da strh r2, [r3, #54] ; 0x36
|
||
}
|
||
/* Transmit data in 16 Bit mode */
|
||
while (hspi->TxXferCount > 0U)
|
||
8001852: e02b b.n 80018ac <HAL_SPI_Transmit+0x174>
|
||
{
|
||
/* Wait until TXE flag is set to send data */
|
||
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
|
||
8001854: 68fb ldr r3, [r7, #12]
|
||
8001856: 681b ldr r3, [r3, #0]
|
||
8001858: 689b ldr r3, [r3, #8]
|
||
800185a: f003 0302 and.w r3, r3, #2
|
||
800185e: 2b02 cmp r3, #2
|
||
8001860: d112 bne.n 8001888 <HAL_SPI_Transmit+0x150>
|
||
{
|
||
hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
|
||
8001862: 68fb ldr r3, [r7, #12]
|
||
8001864: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001866: 881a ldrh r2, [r3, #0]
|
||
8001868: 68fb ldr r3, [r7, #12]
|
||
800186a: 681b ldr r3, [r3, #0]
|
||
800186c: 60da str r2, [r3, #12]
|
||
hspi->pTxBuffPtr += sizeof(uint16_t);
|
||
800186e: 68fb ldr r3, [r7, #12]
|
||
8001870: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001872: 1c9a adds r2, r3, #2
|
||
8001874: 68fb ldr r3, [r7, #12]
|
||
8001876: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
8001878: 68fb ldr r3, [r7, #12]
|
||
800187a: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
800187c: b29b uxth r3, r3
|
||
800187e: 3b01 subs r3, #1
|
||
8001880: b29a uxth r2, r3
|
||
8001882: 68fb ldr r3, [r7, #12]
|
||
8001884: 86da strh r2, [r3, #54] ; 0x36
|
||
8001886: e011 b.n 80018ac <HAL_SPI_Transmit+0x174>
|
||
}
|
||
else
|
||
{
|
||
/* Timeout management */
|
||
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
|
||
8001888: f7ff f814 bl 80008b4 <HAL_GetTick>
|
||
800188c: 4602 mov r2, r0
|
||
800188e: 69bb ldr r3, [r7, #24]
|
||
8001890: 1ad3 subs r3, r2, r3
|
||
8001892: 683a ldr r2, [r7, #0]
|
||
8001894: 429a cmp r2, r3
|
||
8001896: d803 bhi.n 80018a0 <HAL_SPI_Transmit+0x168>
|
||
8001898: 683b ldr r3, [r7, #0]
|
||
800189a: f1b3 3fff cmp.w r3, #4294967295
|
||
800189e: d102 bne.n 80018a6 <HAL_SPI_Transmit+0x16e>
|
||
80018a0: 683b ldr r3, [r7, #0]
|
||
80018a2: 2b00 cmp r3, #0
|
||
80018a4: d102 bne.n 80018ac <HAL_SPI_Transmit+0x174>
|
||
{
|
||
errorcode = HAL_TIMEOUT;
|
||
80018a6: 2303 movs r3, #3
|
||
80018a8: 77fb strb r3, [r7, #31]
|
||
goto error;
|
||
80018aa: e074 b.n 8001996 <HAL_SPI_Transmit+0x25e>
|
||
while (hspi->TxXferCount > 0U)
|
||
80018ac: 68fb ldr r3, [r7, #12]
|
||
80018ae: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
80018b0: b29b uxth r3, r3
|
||
80018b2: 2b00 cmp r3, #0
|
||
80018b4: d1ce bne.n 8001854 <HAL_SPI_Transmit+0x11c>
|
||
80018b6: e04c b.n 8001952 <HAL_SPI_Transmit+0x21a>
|
||
}
|
||
}
|
||
/* Transmit data in 8 Bit mode */
|
||
else
|
||
{
|
||
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
|
||
80018b8: 68fb ldr r3, [r7, #12]
|
||
80018ba: 685b ldr r3, [r3, #4]
|
||
80018bc: 2b00 cmp r3, #0
|
||
80018be: d002 beq.n 80018c6 <HAL_SPI_Transmit+0x18e>
|
||
80018c0: 8afb ldrh r3, [r7, #22]
|
||
80018c2: 2b01 cmp r3, #1
|
||
80018c4: d140 bne.n 8001948 <HAL_SPI_Transmit+0x210>
|
||
{
|
||
*((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
|
||
80018c6: 68fb ldr r3, [r7, #12]
|
||
80018c8: 6b1a ldr r2, [r3, #48] ; 0x30
|
||
80018ca: 68fb ldr r3, [r7, #12]
|
||
80018cc: 681b ldr r3, [r3, #0]
|
||
80018ce: 330c adds r3, #12
|
||
80018d0: 7812 ldrb r2, [r2, #0]
|
||
80018d2: 701a strb r2, [r3, #0]
|
||
hspi->pTxBuffPtr += sizeof(uint8_t);
|
||
80018d4: 68fb ldr r3, [r7, #12]
|
||
80018d6: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
80018d8: 1c5a adds r2, r3, #1
|
||
80018da: 68fb ldr r3, [r7, #12]
|
||
80018dc: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
80018de: 68fb ldr r3, [r7, #12]
|
||
80018e0: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
80018e2: b29b uxth r3, r3
|
||
80018e4: 3b01 subs r3, #1
|
||
80018e6: b29a uxth r2, r3
|
||
80018e8: 68fb ldr r3, [r7, #12]
|
||
80018ea: 86da strh r2, [r3, #54] ; 0x36
|
||
}
|
||
while (hspi->TxXferCount > 0U)
|
||
80018ec: e02c b.n 8001948 <HAL_SPI_Transmit+0x210>
|
||
{
|
||
/* Wait until TXE flag is set to send data */
|
||
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
|
||
80018ee: 68fb ldr r3, [r7, #12]
|
||
80018f0: 681b ldr r3, [r3, #0]
|
||
80018f2: 689b ldr r3, [r3, #8]
|
||
80018f4: f003 0302 and.w r3, r3, #2
|
||
80018f8: 2b02 cmp r3, #2
|
||
80018fa: d113 bne.n 8001924 <HAL_SPI_Transmit+0x1ec>
|
||
{
|
||
*((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
|
||
80018fc: 68fb ldr r3, [r7, #12]
|
||
80018fe: 6b1a ldr r2, [r3, #48] ; 0x30
|
||
8001900: 68fb ldr r3, [r7, #12]
|
||
8001902: 681b ldr r3, [r3, #0]
|
||
8001904: 330c adds r3, #12
|
||
8001906: 7812 ldrb r2, [r2, #0]
|
||
8001908: 701a strb r2, [r3, #0]
|
||
hspi->pTxBuffPtr += sizeof(uint8_t);
|
||
800190a: 68fb ldr r3, [r7, #12]
|
||
800190c: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
800190e: 1c5a adds r2, r3, #1
|
||
8001910: 68fb ldr r3, [r7, #12]
|
||
8001912: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
8001914: 68fb ldr r3, [r7, #12]
|
||
8001916: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001918: b29b uxth r3, r3
|
||
800191a: 3b01 subs r3, #1
|
||
800191c: b29a uxth r2, r3
|
||
800191e: 68fb ldr r3, [r7, #12]
|
||
8001920: 86da strh r2, [r3, #54] ; 0x36
|
||
8001922: e011 b.n 8001948 <HAL_SPI_Transmit+0x210>
|
||
}
|
||
else
|
||
{
|
||
/* Timeout management */
|
||
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
|
||
8001924: f7fe ffc6 bl 80008b4 <HAL_GetTick>
|
||
8001928: 4602 mov r2, r0
|
||
800192a: 69bb ldr r3, [r7, #24]
|
||
800192c: 1ad3 subs r3, r2, r3
|
||
800192e: 683a ldr r2, [r7, #0]
|
||
8001930: 429a cmp r2, r3
|
||
8001932: d803 bhi.n 800193c <HAL_SPI_Transmit+0x204>
|
||
8001934: 683b ldr r3, [r7, #0]
|
||
8001936: f1b3 3fff cmp.w r3, #4294967295
|
||
800193a: d102 bne.n 8001942 <HAL_SPI_Transmit+0x20a>
|
||
800193c: 683b ldr r3, [r7, #0]
|
||
800193e: 2b00 cmp r3, #0
|
||
8001940: d102 bne.n 8001948 <HAL_SPI_Transmit+0x210>
|
||
{
|
||
errorcode = HAL_TIMEOUT;
|
||
8001942: 2303 movs r3, #3
|
||
8001944: 77fb strb r3, [r7, #31]
|
||
goto error;
|
||
8001946: e026 b.n 8001996 <HAL_SPI_Transmit+0x25e>
|
||
while (hspi->TxXferCount > 0U)
|
||
8001948: 68fb ldr r3, [r7, #12]
|
||
800194a: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
800194c: b29b uxth r3, r3
|
||
800194e: 2b00 cmp r3, #0
|
||
8001950: d1cd bne.n 80018ee <HAL_SPI_Transmit+0x1b6>
|
||
SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
/* Check the end of the transaction */
|
||
if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
|
||
8001952: 69ba ldr r2, [r7, #24]
|
||
8001954: 6839 ldr r1, [r7, #0]
|
||
8001956: 68f8 ldr r0, [r7, #12]
|
||
8001958: f000 fbc4 bl 80020e4 <SPI_EndRxTxTransaction>
|
||
800195c: 4603 mov r3, r0
|
||
800195e: 2b00 cmp r3, #0
|
||
8001960: d002 beq.n 8001968 <HAL_SPI_Transmit+0x230>
|
||
{
|
||
hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
|
||
8001962: 68fb ldr r3, [r7, #12]
|
||
8001964: 2220 movs r2, #32
|
||
8001966: 655a str r2, [r3, #84] ; 0x54
|
||
}
|
||
|
||
/* Clear overrun flag in 2 Lines communication mode because received is not read */
|
||
if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
|
||
8001968: 68fb ldr r3, [r7, #12]
|
||
800196a: 689b ldr r3, [r3, #8]
|
||
800196c: 2b00 cmp r3, #0
|
||
800196e: d10a bne.n 8001986 <HAL_SPI_Transmit+0x24e>
|
||
{
|
||
__HAL_SPI_CLEAR_OVRFLAG(hspi);
|
||
8001970: 2300 movs r3, #0
|
||
8001972: 613b str r3, [r7, #16]
|
||
8001974: 68fb ldr r3, [r7, #12]
|
||
8001976: 681b ldr r3, [r3, #0]
|
||
8001978: 68db ldr r3, [r3, #12]
|
||
800197a: 613b str r3, [r7, #16]
|
||
800197c: 68fb ldr r3, [r7, #12]
|
||
800197e: 681b ldr r3, [r3, #0]
|
||
8001980: 689b ldr r3, [r3, #8]
|
||
8001982: 613b str r3, [r7, #16]
|
||
8001984: 693b ldr r3, [r7, #16]
|
||
}
|
||
|
||
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
|
||
8001986: 68fb ldr r3, [r7, #12]
|
||
8001988: 6d5b ldr r3, [r3, #84] ; 0x54
|
||
800198a: 2b00 cmp r3, #0
|
||
800198c: d002 beq.n 8001994 <HAL_SPI_Transmit+0x25c>
|
||
{
|
||
errorcode = HAL_ERROR;
|
||
800198e: 2301 movs r3, #1
|
||
8001990: 77fb strb r3, [r7, #31]
|
||
8001992: e000 b.n 8001996 <HAL_SPI_Transmit+0x25e>
|
||
}
|
||
|
||
error:
|
||
8001994: bf00 nop
|
||
hspi->State = HAL_SPI_STATE_READY;
|
||
8001996: 68fb ldr r3, [r7, #12]
|
||
8001998: 2201 movs r2, #1
|
||
800199a: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hspi);
|
||
800199e: 68fb ldr r3, [r7, #12]
|
||
80019a0: 2200 movs r2, #0
|
||
80019a2: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
return errorcode;
|
||
80019a6: 7ffb ldrb r3, [r7, #31]
|
||
}
|
||
80019a8: 4618 mov r0, r3
|
||
80019aa: 3720 adds r7, #32
|
||
80019ac: 46bd mov sp, r7
|
||
80019ae: bd80 pop {r7, pc}
|
||
|
||
080019b0 <HAL_SPI_Receive>:
|
||
* @param Size amount of data to be received
|
||
* @param Timeout Timeout duration
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
||
{
|
||
80019b0: b580 push {r7, lr}
|
||
80019b2: b088 sub sp, #32
|
||
80019b4: af02 add r7, sp, #8
|
||
80019b6: 60f8 str r0, [r7, #12]
|
||
80019b8: 60b9 str r1, [r7, #8]
|
||
80019ba: 603b str r3, [r7, #0]
|
||
80019bc: 4613 mov r3, r2
|
||
80019be: 80fb strh r3, [r7, #6]
|
||
uint32_t tickstart;
|
||
HAL_StatusTypeDef errorcode = HAL_OK;
|
||
80019c0: 2300 movs r3, #0
|
||
80019c2: 75fb strb r3, [r7, #23]
|
||
|
||
if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
|
||
80019c4: 68fb ldr r3, [r7, #12]
|
||
80019c6: 685b ldr r3, [r3, #4]
|
||
80019c8: f5b3 7f82 cmp.w r3, #260 ; 0x104
|
||
80019cc: d112 bne.n 80019f4 <HAL_SPI_Receive+0x44>
|
||
80019ce: 68fb ldr r3, [r7, #12]
|
||
80019d0: 689b ldr r3, [r3, #8]
|
||
80019d2: 2b00 cmp r3, #0
|
||
80019d4: d10e bne.n 80019f4 <HAL_SPI_Receive+0x44>
|
||
{
|
||
hspi->State = HAL_SPI_STATE_BUSY_RX;
|
||
80019d6: 68fb ldr r3, [r7, #12]
|
||
80019d8: 2204 movs r2, #4
|
||
80019da: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
/* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
|
||
return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
|
||
80019de: 88fa ldrh r2, [r7, #6]
|
||
80019e0: 683b ldr r3, [r7, #0]
|
||
80019e2: 9300 str r3, [sp, #0]
|
||
80019e4: 4613 mov r3, r2
|
||
80019e6: 68ba ldr r2, [r7, #8]
|
||
80019e8: 68b9 ldr r1, [r7, #8]
|
||
80019ea: 68f8 ldr r0, [r7, #12]
|
||
80019ec: f000 f8f1 bl 8001bd2 <HAL_SPI_TransmitReceive>
|
||
80019f0: 4603 mov r3, r0
|
||
80019f2: e0ea b.n 8001bca <HAL_SPI_Receive+0x21a>
|
||
}
|
||
|
||
/* Process Locked */
|
||
__HAL_LOCK(hspi);
|
||
80019f4: 68fb ldr r3, [r7, #12]
|
||
80019f6: f893 3050 ldrb.w r3, [r3, #80] ; 0x50
|
||
80019fa: 2b01 cmp r3, #1
|
||
80019fc: d101 bne.n 8001a02 <HAL_SPI_Receive+0x52>
|
||
80019fe: 2302 movs r3, #2
|
||
8001a00: e0e3 b.n 8001bca <HAL_SPI_Receive+0x21a>
|
||
8001a02: 68fb ldr r3, [r7, #12]
|
||
8001a04: 2201 movs r2, #1
|
||
8001a06: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
|
||
/* Init tickstart for timeout management*/
|
||
tickstart = HAL_GetTick();
|
||
8001a0a: f7fe ff53 bl 80008b4 <HAL_GetTick>
|
||
8001a0e: 6138 str r0, [r7, #16]
|
||
|
||
if (hspi->State != HAL_SPI_STATE_READY)
|
||
8001a10: 68fb ldr r3, [r7, #12]
|
||
8001a12: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
||
8001a16: b2db uxtb r3, r3
|
||
8001a18: 2b01 cmp r3, #1
|
||
8001a1a: d002 beq.n 8001a22 <HAL_SPI_Receive+0x72>
|
||
{
|
||
errorcode = HAL_BUSY;
|
||
8001a1c: 2302 movs r3, #2
|
||
8001a1e: 75fb strb r3, [r7, #23]
|
||
goto error;
|
||
8001a20: e0ca b.n 8001bb8 <HAL_SPI_Receive+0x208>
|
||
}
|
||
|
||
if ((pData == NULL) || (Size == 0U))
|
||
8001a22: 68bb ldr r3, [r7, #8]
|
||
8001a24: 2b00 cmp r3, #0
|
||
8001a26: d002 beq.n 8001a2e <HAL_SPI_Receive+0x7e>
|
||
8001a28: 88fb ldrh r3, [r7, #6]
|
||
8001a2a: 2b00 cmp r3, #0
|
||
8001a2c: d102 bne.n 8001a34 <HAL_SPI_Receive+0x84>
|
||
{
|
||
errorcode = HAL_ERROR;
|
||
8001a2e: 2301 movs r3, #1
|
||
8001a30: 75fb strb r3, [r7, #23]
|
||
goto error;
|
||
8001a32: e0c1 b.n 8001bb8 <HAL_SPI_Receive+0x208>
|
||
}
|
||
|
||
/* Set the transaction information */
|
||
hspi->State = HAL_SPI_STATE_BUSY_RX;
|
||
8001a34: 68fb ldr r3, [r7, #12]
|
||
8001a36: 2204 movs r2, #4
|
||
8001a38: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
||
8001a3c: 68fb ldr r3, [r7, #12]
|
||
8001a3e: 2200 movs r2, #0
|
||
8001a40: 655a str r2, [r3, #84] ; 0x54
|
||
hspi->pRxBuffPtr = (uint8_t *)pData;
|
||
8001a42: 68fb ldr r3, [r7, #12]
|
||
8001a44: 68ba ldr r2, [r7, #8]
|
||
8001a46: 639a str r2, [r3, #56] ; 0x38
|
||
hspi->RxXferSize = Size;
|
||
8001a48: 68fb ldr r3, [r7, #12]
|
||
8001a4a: 88fa ldrh r2, [r7, #6]
|
||
8001a4c: 879a strh r2, [r3, #60] ; 0x3c
|
||
hspi->RxXferCount = Size;
|
||
8001a4e: 68fb ldr r3, [r7, #12]
|
||
8001a50: 88fa ldrh r2, [r7, #6]
|
||
8001a52: 87da strh r2, [r3, #62] ; 0x3e
|
||
|
||
/*Init field not used in handle to zero */
|
||
hspi->pTxBuffPtr = (uint8_t *)NULL;
|
||
8001a54: 68fb ldr r3, [r7, #12]
|
||
8001a56: 2200 movs r2, #0
|
||
8001a58: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferSize = 0U;
|
||
8001a5a: 68fb ldr r3, [r7, #12]
|
||
8001a5c: 2200 movs r2, #0
|
||
8001a5e: 869a strh r2, [r3, #52] ; 0x34
|
||
hspi->TxXferCount = 0U;
|
||
8001a60: 68fb ldr r3, [r7, #12]
|
||
8001a62: 2200 movs r2, #0
|
||
8001a64: 86da strh r2, [r3, #54] ; 0x36
|
||
hspi->RxISR = NULL;
|
||
8001a66: 68fb ldr r3, [r7, #12]
|
||
8001a68: 2200 movs r2, #0
|
||
8001a6a: 641a str r2, [r3, #64] ; 0x40
|
||
hspi->TxISR = NULL;
|
||
8001a6c: 68fb ldr r3, [r7, #12]
|
||
8001a6e: 2200 movs r2, #0
|
||
8001a70: 645a str r2, [r3, #68] ; 0x44
|
||
hspi->RxXferCount--;
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
/* Configure communication direction: 1Line */
|
||
if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
|
||
8001a72: 68fb ldr r3, [r7, #12]
|
||
8001a74: 689b ldr r3, [r3, #8]
|
||
8001a76: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
||
8001a7a: d10f bne.n 8001a9c <HAL_SPI_Receive+0xec>
|
||
{
|
||
/* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
|
||
__HAL_SPI_DISABLE(hspi);
|
||
8001a7c: 68fb ldr r3, [r7, #12]
|
||
8001a7e: 681b ldr r3, [r3, #0]
|
||
8001a80: 681a ldr r2, [r3, #0]
|
||
8001a82: 68fb ldr r3, [r7, #12]
|
||
8001a84: 681b ldr r3, [r3, #0]
|
||
8001a86: f022 0240 bic.w r2, r2, #64 ; 0x40
|
||
8001a8a: 601a str r2, [r3, #0]
|
||
SPI_1LINE_RX(hspi);
|
||
8001a8c: 68fb ldr r3, [r7, #12]
|
||
8001a8e: 681b ldr r3, [r3, #0]
|
||
8001a90: 681a ldr r2, [r3, #0]
|
||
8001a92: 68fb ldr r3, [r7, #12]
|
||
8001a94: 681b ldr r3, [r3, #0]
|
||
8001a96: f422 4280 bic.w r2, r2, #16384 ; 0x4000
|
||
8001a9a: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Check if the SPI is already enabled */
|
||
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
|
||
8001a9c: 68fb ldr r3, [r7, #12]
|
||
8001a9e: 681b ldr r3, [r3, #0]
|
||
8001aa0: 681b ldr r3, [r3, #0]
|
||
8001aa2: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
8001aa6: 2b40 cmp r3, #64 ; 0x40
|
||
8001aa8: d007 beq.n 8001aba <HAL_SPI_Receive+0x10a>
|
||
{
|
||
/* Enable SPI peripheral */
|
||
__HAL_SPI_ENABLE(hspi);
|
||
8001aaa: 68fb ldr r3, [r7, #12]
|
||
8001aac: 681b ldr r3, [r3, #0]
|
||
8001aae: 681a ldr r2, [r3, #0]
|
||
8001ab0: 68fb ldr r3, [r7, #12]
|
||
8001ab2: 681b ldr r3, [r3, #0]
|
||
8001ab4: f042 0240 orr.w r2, r2, #64 ; 0x40
|
||
8001ab8: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Receive data in 8 Bit mode */
|
||
if (hspi->Init.DataSize == SPI_DATASIZE_8BIT)
|
||
8001aba: 68fb ldr r3, [r7, #12]
|
||
8001abc: 68db ldr r3, [r3, #12]
|
||
8001abe: 2b00 cmp r3, #0
|
||
8001ac0: d162 bne.n 8001b88 <HAL_SPI_Receive+0x1d8>
|
||
{
|
||
/* Transfer loop */
|
||
while (hspi->RxXferCount > 0U)
|
||
8001ac2: e02e b.n 8001b22 <HAL_SPI_Receive+0x172>
|
||
{
|
||
/* Check the RXNE flag */
|
||
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
|
||
8001ac4: 68fb ldr r3, [r7, #12]
|
||
8001ac6: 681b ldr r3, [r3, #0]
|
||
8001ac8: 689b ldr r3, [r3, #8]
|
||
8001aca: f003 0301 and.w r3, r3, #1
|
||
8001ace: 2b01 cmp r3, #1
|
||
8001ad0: d115 bne.n 8001afe <HAL_SPI_Receive+0x14e>
|
||
{
|
||
/* read the received data */
|
||
(* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR;
|
||
8001ad2: 68fb ldr r3, [r7, #12]
|
||
8001ad4: 681b ldr r3, [r3, #0]
|
||
8001ad6: f103 020c add.w r2, r3, #12
|
||
8001ada: 68fb ldr r3, [r7, #12]
|
||
8001adc: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001ade: 7812 ldrb r2, [r2, #0]
|
||
8001ae0: b2d2 uxtb r2, r2
|
||
8001ae2: 701a strb r2, [r3, #0]
|
||
hspi->pRxBuffPtr += sizeof(uint8_t);
|
||
8001ae4: 68fb ldr r3, [r7, #12]
|
||
8001ae6: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001ae8: 1c5a adds r2, r3, #1
|
||
8001aea: 68fb ldr r3, [r7, #12]
|
||
8001aec: 639a str r2, [r3, #56] ; 0x38
|
||
hspi->RxXferCount--;
|
||
8001aee: 68fb ldr r3, [r7, #12]
|
||
8001af0: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001af2: b29b uxth r3, r3
|
||
8001af4: 3b01 subs r3, #1
|
||
8001af6: b29a uxth r2, r3
|
||
8001af8: 68fb ldr r3, [r7, #12]
|
||
8001afa: 87da strh r2, [r3, #62] ; 0x3e
|
||
8001afc: e011 b.n 8001b22 <HAL_SPI_Receive+0x172>
|
||
}
|
||
else
|
||
{
|
||
/* Timeout management */
|
||
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
|
||
8001afe: f7fe fed9 bl 80008b4 <HAL_GetTick>
|
||
8001b02: 4602 mov r2, r0
|
||
8001b04: 693b ldr r3, [r7, #16]
|
||
8001b06: 1ad3 subs r3, r2, r3
|
||
8001b08: 683a ldr r2, [r7, #0]
|
||
8001b0a: 429a cmp r2, r3
|
||
8001b0c: d803 bhi.n 8001b16 <HAL_SPI_Receive+0x166>
|
||
8001b0e: 683b ldr r3, [r7, #0]
|
||
8001b10: f1b3 3fff cmp.w r3, #4294967295
|
||
8001b14: d102 bne.n 8001b1c <HAL_SPI_Receive+0x16c>
|
||
8001b16: 683b ldr r3, [r7, #0]
|
||
8001b18: 2b00 cmp r3, #0
|
||
8001b1a: d102 bne.n 8001b22 <HAL_SPI_Receive+0x172>
|
||
{
|
||
errorcode = HAL_TIMEOUT;
|
||
8001b1c: 2303 movs r3, #3
|
||
8001b1e: 75fb strb r3, [r7, #23]
|
||
goto error;
|
||
8001b20: e04a b.n 8001bb8 <HAL_SPI_Receive+0x208>
|
||
while (hspi->RxXferCount > 0U)
|
||
8001b22: 68fb ldr r3, [r7, #12]
|
||
8001b24: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001b26: b29b uxth r3, r3
|
||
8001b28: 2b00 cmp r3, #0
|
||
8001b2a: d1cb bne.n 8001ac4 <HAL_SPI_Receive+0x114>
|
||
8001b2c: e031 b.n 8001b92 <HAL_SPI_Receive+0x1e2>
|
||
{
|
||
/* Transfer loop */
|
||
while (hspi->RxXferCount > 0U)
|
||
{
|
||
/* Check the RXNE flag */
|
||
if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
|
||
8001b2e: 68fb ldr r3, [r7, #12]
|
||
8001b30: 681b ldr r3, [r3, #0]
|
||
8001b32: 689b ldr r3, [r3, #8]
|
||
8001b34: f003 0301 and.w r3, r3, #1
|
||
8001b38: 2b01 cmp r3, #1
|
||
8001b3a: d113 bne.n 8001b64 <HAL_SPI_Receive+0x1b4>
|
||
{
|
||
*((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
|
||
8001b3c: 68fb ldr r3, [r7, #12]
|
||
8001b3e: 681b ldr r3, [r3, #0]
|
||
8001b40: 68da ldr r2, [r3, #12]
|
||
8001b42: 68fb ldr r3, [r7, #12]
|
||
8001b44: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001b46: b292 uxth r2, r2
|
||
8001b48: 801a strh r2, [r3, #0]
|
||
hspi->pRxBuffPtr += sizeof(uint16_t);
|
||
8001b4a: 68fb ldr r3, [r7, #12]
|
||
8001b4c: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001b4e: 1c9a adds r2, r3, #2
|
||
8001b50: 68fb ldr r3, [r7, #12]
|
||
8001b52: 639a str r2, [r3, #56] ; 0x38
|
||
hspi->RxXferCount--;
|
||
8001b54: 68fb ldr r3, [r7, #12]
|
||
8001b56: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001b58: b29b uxth r3, r3
|
||
8001b5a: 3b01 subs r3, #1
|
||
8001b5c: b29a uxth r2, r3
|
||
8001b5e: 68fb ldr r3, [r7, #12]
|
||
8001b60: 87da strh r2, [r3, #62] ; 0x3e
|
||
8001b62: e011 b.n 8001b88 <HAL_SPI_Receive+0x1d8>
|
||
}
|
||
else
|
||
{
|
||
/* Timeout management */
|
||
if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
|
||
8001b64: f7fe fea6 bl 80008b4 <HAL_GetTick>
|
||
8001b68: 4602 mov r2, r0
|
||
8001b6a: 693b ldr r3, [r7, #16]
|
||
8001b6c: 1ad3 subs r3, r2, r3
|
||
8001b6e: 683a ldr r2, [r7, #0]
|
||
8001b70: 429a cmp r2, r3
|
||
8001b72: d803 bhi.n 8001b7c <HAL_SPI_Receive+0x1cc>
|
||
8001b74: 683b ldr r3, [r7, #0]
|
||
8001b76: f1b3 3fff cmp.w r3, #4294967295
|
||
8001b7a: d102 bne.n 8001b82 <HAL_SPI_Receive+0x1d2>
|
||
8001b7c: 683b ldr r3, [r7, #0]
|
||
8001b7e: 2b00 cmp r3, #0
|
||
8001b80: d102 bne.n 8001b88 <HAL_SPI_Receive+0x1d8>
|
||
{
|
||
errorcode = HAL_TIMEOUT;
|
||
8001b82: 2303 movs r3, #3
|
||
8001b84: 75fb strb r3, [r7, #23]
|
||
goto error;
|
||
8001b86: e017 b.n 8001bb8 <HAL_SPI_Receive+0x208>
|
||
while (hspi->RxXferCount > 0U)
|
||
8001b88: 68fb ldr r3, [r7, #12]
|
||
8001b8a: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001b8c: b29b uxth r3, r3
|
||
8001b8e: 2b00 cmp r3, #0
|
||
8001b90: d1cd bne.n 8001b2e <HAL_SPI_Receive+0x17e>
|
||
READ_REG(hspi->Instance->DR);
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
/* Check the end of the transaction */
|
||
if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK)
|
||
8001b92: 693a ldr r2, [r7, #16]
|
||
8001b94: 6839 ldr r1, [r7, #0]
|
||
8001b96: 68f8 ldr r0, [r7, #12]
|
||
8001b98: f000 fa52 bl 8002040 <SPI_EndRxTransaction>
|
||
8001b9c: 4603 mov r3, r0
|
||
8001b9e: 2b00 cmp r3, #0
|
||
8001ba0: d002 beq.n 8001ba8 <HAL_SPI_Receive+0x1f8>
|
||
{
|
||
hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
|
||
8001ba2: 68fb ldr r3, [r7, #12]
|
||
8001ba4: 2220 movs r2, #32
|
||
8001ba6: 655a str r2, [r3, #84] ; 0x54
|
||
__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
|
||
}
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
|
||
8001ba8: 68fb ldr r3, [r7, #12]
|
||
8001baa: 6d5b ldr r3, [r3, #84] ; 0x54
|
||
8001bac: 2b00 cmp r3, #0
|
||
8001bae: d002 beq.n 8001bb6 <HAL_SPI_Receive+0x206>
|
||
{
|
||
errorcode = HAL_ERROR;
|
||
8001bb0: 2301 movs r3, #1
|
||
8001bb2: 75fb strb r3, [r7, #23]
|
||
8001bb4: e000 b.n 8001bb8 <HAL_SPI_Receive+0x208>
|
||
}
|
||
|
||
error :
|
||
8001bb6: bf00 nop
|
||
hspi->State = HAL_SPI_STATE_READY;
|
||
8001bb8: 68fb ldr r3, [r7, #12]
|
||
8001bba: 2201 movs r2, #1
|
||
8001bbc: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
__HAL_UNLOCK(hspi);
|
||
8001bc0: 68fb ldr r3, [r7, #12]
|
||
8001bc2: 2200 movs r2, #0
|
||
8001bc4: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
return errorcode;
|
||
8001bc8: 7dfb ldrb r3, [r7, #23]
|
||
}
|
||
8001bca: 4618 mov r0, r3
|
||
8001bcc: 3718 adds r7, #24
|
||
8001bce: 46bd mov sp, r7
|
||
8001bd0: bd80 pop {r7, pc}
|
||
|
||
08001bd2 <HAL_SPI_TransmitReceive>:
|
||
* @param Timeout Timeout duration
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
|
||
uint32_t Timeout)
|
||
{
|
||
8001bd2: b580 push {r7, lr}
|
||
8001bd4: b08c sub sp, #48 ; 0x30
|
||
8001bd6: af00 add r7, sp, #0
|
||
8001bd8: 60f8 str r0, [r7, #12]
|
||
8001bda: 60b9 str r1, [r7, #8]
|
||
8001bdc: 607a str r2, [r7, #4]
|
||
8001bde: 807b strh r3, [r7, #2]
|
||
uint32_t tmp_mode;
|
||
HAL_SPI_StateTypeDef tmp_state;
|
||
uint32_t tickstart;
|
||
|
||
/* Variable used to alternate Rx and Tx during transfer */
|
||
uint32_t txallowed = 1U;
|
||
8001be0: 2301 movs r3, #1
|
||
8001be2: 62fb str r3, [r7, #44] ; 0x2c
|
||
HAL_StatusTypeDef errorcode = HAL_OK;
|
||
8001be4: 2300 movs r3, #0
|
||
8001be6: f887 302b strb.w r3, [r7, #43] ; 0x2b
|
||
|
||
/* Check Direction parameter */
|
||
assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
|
||
|
||
/* Process Locked */
|
||
__HAL_LOCK(hspi);
|
||
8001bea: 68fb ldr r3, [r7, #12]
|
||
8001bec: f893 3050 ldrb.w r3, [r3, #80] ; 0x50
|
||
8001bf0: 2b01 cmp r3, #1
|
||
8001bf2: d101 bne.n 8001bf8 <HAL_SPI_TransmitReceive+0x26>
|
||
8001bf4: 2302 movs r3, #2
|
||
8001bf6: e18a b.n 8001f0e <HAL_SPI_TransmitReceive+0x33c>
|
||
8001bf8: 68fb ldr r3, [r7, #12]
|
||
8001bfa: 2201 movs r2, #1
|
||
8001bfc: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
|
||
/* Init tickstart for timeout management*/
|
||
tickstart = HAL_GetTick();
|
||
8001c00: f7fe fe58 bl 80008b4 <HAL_GetTick>
|
||
8001c04: 6278 str r0, [r7, #36] ; 0x24
|
||
|
||
/* Init temporary variables */
|
||
tmp_state = hspi->State;
|
||
8001c06: 68fb ldr r3, [r7, #12]
|
||
8001c08: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
||
8001c0c: f887 3023 strb.w r3, [r7, #35] ; 0x23
|
||
tmp_mode = hspi->Init.Mode;
|
||
8001c10: 68fb ldr r3, [r7, #12]
|
||
8001c12: 685b ldr r3, [r3, #4]
|
||
8001c14: 61fb str r3, [r7, #28]
|
||
initial_TxXferCount = Size;
|
||
8001c16: 887b ldrh r3, [r7, #2]
|
||
8001c18: 837b strh r3, [r7, #26]
|
||
|
||
if (!((tmp_state == HAL_SPI_STATE_READY) || \
|
||
8001c1a: f897 3023 ldrb.w r3, [r7, #35] ; 0x23
|
||
8001c1e: 2b01 cmp r3, #1
|
||
8001c20: d00f beq.n 8001c42 <HAL_SPI_TransmitReceive+0x70>
|
||
8001c22: 69fb ldr r3, [r7, #28]
|
||
8001c24: f5b3 7f82 cmp.w r3, #260 ; 0x104
|
||
8001c28: d107 bne.n 8001c3a <HAL_SPI_TransmitReceive+0x68>
|
||
((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
|
||
8001c2a: 68fb ldr r3, [r7, #12]
|
||
8001c2c: 689b ldr r3, [r3, #8]
|
||
8001c2e: 2b00 cmp r3, #0
|
||
8001c30: d103 bne.n 8001c3a <HAL_SPI_TransmitReceive+0x68>
|
||
8001c32: f897 3023 ldrb.w r3, [r7, #35] ; 0x23
|
||
8001c36: 2b04 cmp r3, #4
|
||
8001c38: d003 beq.n 8001c42 <HAL_SPI_TransmitReceive+0x70>
|
||
{
|
||
errorcode = HAL_BUSY;
|
||
8001c3a: 2302 movs r3, #2
|
||
8001c3c: f887 302b strb.w r3, [r7, #43] ; 0x2b
|
||
goto error;
|
||
8001c40: e15b b.n 8001efa <HAL_SPI_TransmitReceive+0x328>
|
||
}
|
||
|
||
if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
|
||
8001c42: 68bb ldr r3, [r7, #8]
|
||
8001c44: 2b00 cmp r3, #0
|
||
8001c46: d005 beq.n 8001c54 <HAL_SPI_TransmitReceive+0x82>
|
||
8001c48: 687b ldr r3, [r7, #4]
|
||
8001c4a: 2b00 cmp r3, #0
|
||
8001c4c: d002 beq.n 8001c54 <HAL_SPI_TransmitReceive+0x82>
|
||
8001c4e: 887b ldrh r3, [r7, #2]
|
||
8001c50: 2b00 cmp r3, #0
|
||
8001c52: d103 bne.n 8001c5c <HAL_SPI_TransmitReceive+0x8a>
|
||
{
|
||
errorcode = HAL_ERROR;
|
||
8001c54: 2301 movs r3, #1
|
||
8001c56: f887 302b strb.w r3, [r7, #43] ; 0x2b
|
||
goto error;
|
||
8001c5a: e14e b.n 8001efa <HAL_SPI_TransmitReceive+0x328>
|
||
}
|
||
|
||
/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
|
||
if (hspi->State != HAL_SPI_STATE_BUSY_RX)
|
||
8001c5c: 68fb ldr r3, [r7, #12]
|
||
8001c5e: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
||
8001c62: b2db uxtb r3, r3
|
||
8001c64: 2b04 cmp r3, #4
|
||
8001c66: d003 beq.n 8001c70 <HAL_SPI_TransmitReceive+0x9e>
|
||
{
|
||
hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
|
||
8001c68: 68fb ldr r3, [r7, #12]
|
||
8001c6a: 2205 movs r2, #5
|
||
8001c6c: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
}
|
||
|
||
/* Set the transaction information */
|
||
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
||
8001c70: 68fb ldr r3, [r7, #12]
|
||
8001c72: 2200 movs r2, #0
|
||
8001c74: 655a str r2, [r3, #84] ; 0x54
|
||
hspi->pRxBuffPtr = (uint8_t *)pRxData;
|
||
8001c76: 68fb ldr r3, [r7, #12]
|
||
8001c78: 687a ldr r2, [r7, #4]
|
||
8001c7a: 639a str r2, [r3, #56] ; 0x38
|
||
hspi->RxXferCount = Size;
|
||
8001c7c: 68fb ldr r3, [r7, #12]
|
||
8001c7e: 887a ldrh r2, [r7, #2]
|
||
8001c80: 87da strh r2, [r3, #62] ; 0x3e
|
||
hspi->RxXferSize = Size;
|
||
8001c82: 68fb ldr r3, [r7, #12]
|
||
8001c84: 887a ldrh r2, [r7, #2]
|
||
8001c86: 879a strh r2, [r3, #60] ; 0x3c
|
||
hspi->pTxBuffPtr = (uint8_t *)pTxData;
|
||
8001c88: 68fb ldr r3, [r7, #12]
|
||
8001c8a: 68ba ldr r2, [r7, #8]
|
||
8001c8c: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount = Size;
|
||
8001c8e: 68fb ldr r3, [r7, #12]
|
||
8001c90: 887a ldrh r2, [r7, #2]
|
||
8001c92: 86da strh r2, [r3, #54] ; 0x36
|
||
hspi->TxXferSize = Size;
|
||
8001c94: 68fb ldr r3, [r7, #12]
|
||
8001c96: 887a ldrh r2, [r7, #2]
|
||
8001c98: 869a strh r2, [r3, #52] ; 0x34
|
||
|
||
/*Init field not used in handle to zero */
|
||
hspi->RxISR = NULL;
|
||
8001c9a: 68fb ldr r3, [r7, #12]
|
||
8001c9c: 2200 movs r2, #0
|
||
8001c9e: 641a str r2, [r3, #64] ; 0x40
|
||
hspi->TxISR = NULL;
|
||
8001ca0: 68fb ldr r3, [r7, #12]
|
||
8001ca2: 2200 movs r2, #0
|
||
8001ca4: 645a str r2, [r3, #68] ; 0x44
|
||
SPI_RESET_CRC(hspi);
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
/* Check if the SPI is already enabled */
|
||
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
|
||
8001ca6: 68fb ldr r3, [r7, #12]
|
||
8001ca8: 681b ldr r3, [r3, #0]
|
||
8001caa: 681b ldr r3, [r3, #0]
|
||
8001cac: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
8001cb0: 2b40 cmp r3, #64 ; 0x40
|
||
8001cb2: d007 beq.n 8001cc4 <HAL_SPI_TransmitReceive+0xf2>
|
||
{
|
||
/* Enable SPI peripheral */
|
||
__HAL_SPI_ENABLE(hspi);
|
||
8001cb4: 68fb ldr r3, [r7, #12]
|
||
8001cb6: 681b ldr r3, [r3, #0]
|
||
8001cb8: 681a ldr r2, [r3, #0]
|
||
8001cba: 68fb ldr r3, [r7, #12]
|
||
8001cbc: 681b ldr r3, [r3, #0]
|
||
8001cbe: f042 0240 orr.w r2, r2, #64 ; 0x40
|
||
8001cc2: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Transmit and Receive data in 16 Bit mode */
|
||
if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
|
||
8001cc4: 68fb ldr r3, [r7, #12]
|
||
8001cc6: 68db ldr r3, [r3, #12]
|
||
8001cc8: f5b3 6f00 cmp.w r3, #2048 ; 0x800
|
||
8001ccc: d178 bne.n 8001dc0 <HAL_SPI_TransmitReceive+0x1ee>
|
||
{
|
||
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
|
||
8001cce: 68fb ldr r3, [r7, #12]
|
||
8001cd0: 685b ldr r3, [r3, #4]
|
||
8001cd2: 2b00 cmp r3, #0
|
||
8001cd4: d002 beq.n 8001cdc <HAL_SPI_TransmitReceive+0x10a>
|
||
8001cd6: 8b7b ldrh r3, [r7, #26]
|
||
8001cd8: 2b01 cmp r3, #1
|
||
8001cda: d166 bne.n 8001daa <HAL_SPI_TransmitReceive+0x1d8>
|
||
{
|
||
hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
|
||
8001cdc: 68fb ldr r3, [r7, #12]
|
||
8001cde: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001ce0: 881a ldrh r2, [r3, #0]
|
||
8001ce2: 68fb ldr r3, [r7, #12]
|
||
8001ce4: 681b ldr r3, [r3, #0]
|
||
8001ce6: 60da str r2, [r3, #12]
|
||
hspi->pTxBuffPtr += sizeof(uint16_t);
|
||
8001ce8: 68fb ldr r3, [r7, #12]
|
||
8001cea: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001cec: 1c9a adds r2, r3, #2
|
||
8001cee: 68fb ldr r3, [r7, #12]
|
||
8001cf0: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
8001cf2: 68fb ldr r3, [r7, #12]
|
||
8001cf4: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001cf6: b29b uxth r3, r3
|
||
8001cf8: 3b01 subs r3, #1
|
||
8001cfa: b29a uxth r2, r3
|
||
8001cfc: 68fb ldr r3, [r7, #12]
|
||
8001cfe: 86da strh r2, [r3, #54] ; 0x36
|
||
}
|
||
while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
|
||
8001d00: e053 b.n 8001daa <HAL_SPI_TransmitReceive+0x1d8>
|
||
{
|
||
/* Check TXE flag */
|
||
if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
|
||
8001d02: 68fb ldr r3, [r7, #12]
|
||
8001d04: 681b ldr r3, [r3, #0]
|
||
8001d06: 689b ldr r3, [r3, #8]
|
||
8001d08: f003 0302 and.w r3, r3, #2
|
||
8001d0c: 2b02 cmp r3, #2
|
||
8001d0e: d11b bne.n 8001d48 <HAL_SPI_TransmitReceive+0x176>
|
||
8001d10: 68fb ldr r3, [r7, #12]
|
||
8001d12: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001d14: b29b uxth r3, r3
|
||
8001d16: 2b00 cmp r3, #0
|
||
8001d18: d016 beq.n 8001d48 <HAL_SPI_TransmitReceive+0x176>
|
||
8001d1a: 6afb ldr r3, [r7, #44] ; 0x2c
|
||
8001d1c: 2b01 cmp r3, #1
|
||
8001d1e: d113 bne.n 8001d48 <HAL_SPI_TransmitReceive+0x176>
|
||
{
|
||
hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
|
||
8001d20: 68fb ldr r3, [r7, #12]
|
||
8001d22: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001d24: 881a ldrh r2, [r3, #0]
|
||
8001d26: 68fb ldr r3, [r7, #12]
|
||
8001d28: 681b ldr r3, [r3, #0]
|
||
8001d2a: 60da str r2, [r3, #12]
|
||
hspi->pTxBuffPtr += sizeof(uint16_t);
|
||
8001d2c: 68fb ldr r3, [r7, #12]
|
||
8001d2e: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001d30: 1c9a adds r2, r3, #2
|
||
8001d32: 68fb ldr r3, [r7, #12]
|
||
8001d34: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
8001d36: 68fb ldr r3, [r7, #12]
|
||
8001d38: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001d3a: b29b uxth r3, r3
|
||
8001d3c: 3b01 subs r3, #1
|
||
8001d3e: b29a uxth r2, r3
|
||
8001d40: 68fb ldr r3, [r7, #12]
|
||
8001d42: 86da strh r2, [r3, #54] ; 0x36
|
||
/* Next Data is a reception (Rx). Tx not allowed */
|
||
txallowed = 0U;
|
||
8001d44: 2300 movs r3, #0
|
||
8001d46: 62fb str r3, [r7, #44] ; 0x2c
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
}
|
||
|
||
/* Check RXNE flag */
|
||
if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
|
||
8001d48: 68fb ldr r3, [r7, #12]
|
||
8001d4a: 681b ldr r3, [r3, #0]
|
||
8001d4c: 689b ldr r3, [r3, #8]
|
||
8001d4e: f003 0301 and.w r3, r3, #1
|
||
8001d52: 2b01 cmp r3, #1
|
||
8001d54: d119 bne.n 8001d8a <HAL_SPI_TransmitReceive+0x1b8>
|
||
8001d56: 68fb ldr r3, [r7, #12]
|
||
8001d58: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001d5a: b29b uxth r3, r3
|
||
8001d5c: 2b00 cmp r3, #0
|
||
8001d5e: d014 beq.n 8001d8a <HAL_SPI_TransmitReceive+0x1b8>
|
||
{
|
||
*((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
|
||
8001d60: 68fb ldr r3, [r7, #12]
|
||
8001d62: 681b ldr r3, [r3, #0]
|
||
8001d64: 68da ldr r2, [r3, #12]
|
||
8001d66: 68fb ldr r3, [r7, #12]
|
||
8001d68: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001d6a: b292 uxth r2, r2
|
||
8001d6c: 801a strh r2, [r3, #0]
|
||
hspi->pRxBuffPtr += sizeof(uint16_t);
|
||
8001d6e: 68fb ldr r3, [r7, #12]
|
||
8001d70: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001d72: 1c9a adds r2, r3, #2
|
||
8001d74: 68fb ldr r3, [r7, #12]
|
||
8001d76: 639a str r2, [r3, #56] ; 0x38
|
||
hspi->RxXferCount--;
|
||
8001d78: 68fb ldr r3, [r7, #12]
|
||
8001d7a: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001d7c: b29b uxth r3, r3
|
||
8001d7e: 3b01 subs r3, #1
|
||
8001d80: b29a uxth r2, r3
|
||
8001d82: 68fb ldr r3, [r7, #12]
|
||
8001d84: 87da strh r2, [r3, #62] ; 0x3e
|
||
/* Next Data is a Transmission (Tx). Tx is allowed */
|
||
txallowed = 1U;
|
||
8001d86: 2301 movs r3, #1
|
||
8001d88: 62fb str r3, [r7, #44] ; 0x2c
|
||
}
|
||
if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY))
|
||
8001d8a: f7fe fd93 bl 80008b4 <HAL_GetTick>
|
||
8001d8e: 4602 mov r2, r0
|
||
8001d90: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001d92: 1ad3 subs r3, r2, r3
|
||
8001d94: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8001d96: 429a cmp r2, r3
|
||
8001d98: d807 bhi.n 8001daa <HAL_SPI_TransmitReceive+0x1d8>
|
||
8001d9a: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8001d9c: f1b3 3fff cmp.w r3, #4294967295
|
||
8001da0: d003 beq.n 8001daa <HAL_SPI_TransmitReceive+0x1d8>
|
||
{
|
||
errorcode = HAL_TIMEOUT;
|
||
8001da2: 2303 movs r3, #3
|
||
8001da4: f887 302b strb.w r3, [r7, #43] ; 0x2b
|
||
goto error;
|
||
8001da8: e0a7 b.n 8001efa <HAL_SPI_TransmitReceive+0x328>
|
||
while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
|
||
8001daa: 68fb ldr r3, [r7, #12]
|
||
8001dac: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001dae: b29b uxth r3, r3
|
||
8001db0: 2b00 cmp r3, #0
|
||
8001db2: d1a6 bne.n 8001d02 <HAL_SPI_TransmitReceive+0x130>
|
||
8001db4: 68fb ldr r3, [r7, #12]
|
||
8001db6: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001db8: b29b uxth r3, r3
|
||
8001dba: 2b00 cmp r3, #0
|
||
8001dbc: d1a1 bne.n 8001d02 <HAL_SPI_TransmitReceive+0x130>
|
||
8001dbe: e07c b.n 8001eba <HAL_SPI_TransmitReceive+0x2e8>
|
||
}
|
||
}
|
||
/* Transmit and Receive data in 8 Bit mode */
|
||
else
|
||
{
|
||
if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
|
||
8001dc0: 68fb ldr r3, [r7, #12]
|
||
8001dc2: 685b ldr r3, [r3, #4]
|
||
8001dc4: 2b00 cmp r3, #0
|
||
8001dc6: d002 beq.n 8001dce <HAL_SPI_TransmitReceive+0x1fc>
|
||
8001dc8: 8b7b ldrh r3, [r7, #26]
|
||
8001dca: 2b01 cmp r3, #1
|
||
8001dcc: d16b bne.n 8001ea6 <HAL_SPI_TransmitReceive+0x2d4>
|
||
{
|
||
*((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
|
||
8001dce: 68fb ldr r3, [r7, #12]
|
||
8001dd0: 6b1a ldr r2, [r3, #48] ; 0x30
|
||
8001dd2: 68fb ldr r3, [r7, #12]
|
||
8001dd4: 681b ldr r3, [r3, #0]
|
||
8001dd6: 330c adds r3, #12
|
||
8001dd8: 7812 ldrb r2, [r2, #0]
|
||
8001dda: 701a strb r2, [r3, #0]
|
||
hspi->pTxBuffPtr += sizeof(uint8_t);
|
||
8001ddc: 68fb ldr r3, [r7, #12]
|
||
8001dde: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001de0: 1c5a adds r2, r3, #1
|
||
8001de2: 68fb ldr r3, [r7, #12]
|
||
8001de4: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
8001de6: 68fb ldr r3, [r7, #12]
|
||
8001de8: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001dea: b29b uxth r3, r3
|
||
8001dec: 3b01 subs r3, #1
|
||
8001dee: b29a uxth r2, r3
|
||
8001df0: 68fb ldr r3, [r7, #12]
|
||
8001df2: 86da strh r2, [r3, #54] ; 0x36
|
||
}
|
||
while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
|
||
8001df4: e057 b.n 8001ea6 <HAL_SPI_TransmitReceive+0x2d4>
|
||
{
|
||
/* Check TXE flag */
|
||
if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
|
||
8001df6: 68fb ldr r3, [r7, #12]
|
||
8001df8: 681b ldr r3, [r3, #0]
|
||
8001dfa: 689b ldr r3, [r3, #8]
|
||
8001dfc: f003 0302 and.w r3, r3, #2
|
||
8001e00: 2b02 cmp r3, #2
|
||
8001e02: d11c bne.n 8001e3e <HAL_SPI_TransmitReceive+0x26c>
|
||
8001e04: 68fb ldr r3, [r7, #12]
|
||
8001e06: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001e08: b29b uxth r3, r3
|
||
8001e0a: 2b00 cmp r3, #0
|
||
8001e0c: d017 beq.n 8001e3e <HAL_SPI_TransmitReceive+0x26c>
|
||
8001e0e: 6afb ldr r3, [r7, #44] ; 0x2c
|
||
8001e10: 2b01 cmp r3, #1
|
||
8001e12: d114 bne.n 8001e3e <HAL_SPI_TransmitReceive+0x26c>
|
||
{
|
||
*(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
|
||
8001e14: 68fb ldr r3, [r7, #12]
|
||
8001e16: 6b1a ldr r2, [r3, #48] ; 0x30
|
||
8001e18: 68fb ldr r3, [r7, #12]
|
||
8001e1a: 681b ldr r3, [r3, #0]
|
||
8001e1c: 330c adds r3, #12
|
||
8001e1e: 7812 ldrb r2, [r2, #0]
|
||
8001e20: 701a strb r2, [r3, #0]
|
||
hspi->pTxBuffPtr++;
|
||
8001e22: 68fb ldr r3, [r7, #12]
|
||
8001e24: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8001e26: 1c5a adds r2, r3, #1
|
||
8001e28: 68fb ldr r3, [r7, #12]
|
||
8001e2a: 631a str r2, [r3, #48] ; 0x30
|
||
hspi->TxXferCount--;
|
||
8001e2c: 68fb ldr r3, [r7, #12]
|
||
8001e2e: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001e30: b29b uxth r3, r3
|
||
8001e32: 3b01 subs r3, #1
|
||
8001e34: b29a uxth r2, r3
|
||
8001e36: 68fb ldr r3, [r7, #12]
|
||
8001e38: 86da strh r2, [r3, #54] ; 0x36
|
||
/* Next Data is a reception (Rx). Tx not allowed */
|
||
txallowed = 0U;
|
||
8001e3a: 2300 movs r3, #0
|
||
8001e3c: 62fb str r3, [r7, #44] ; 0x2c
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
}
|
||
|
||
/* Wait until RXNE flag is reset */
|
||
if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
|
||
8001e3e: 68fb ldr r3, [r7, #12]
|
||
8001e40: 681b ldr r3, [r3, #0]
|
||
8001e42: 689b ldr r3, [r3, #8]
|
||
8001e44: f003 0301 and.w r3, r3, #1
|
||
8001e48: 2b01 cmp r3, #1
|
||
8001e4a: d119 bne.n 8001e80 <HAL_SPI_TransmitReceive+0x2ae>
|
||
8001e4c: 68fb ldr r3, [r7, #12]
|
||
8001e4e: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001e50: b29b uxth r3, r3
|
||
8001e52: 2b00 cmp r3, #0
|
||
8001e54: d014 beq.n 8001e80 <HAL_SPI_TransmitReceive+0x2ae>
|
||
{
|
||
(*(uint8_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
|
||
8001e56: 68fb ldr r3, [r7, #12]
|
||
8001e58: 681b ldr r3, [r3, #0]
|
||
8001e5a: 68da ldr r2, [r3, #12]
|
||
8001e5c: 68fb ldr r3, [r7, #12]
|
||
8001e5e: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001e60: b2d2 uxtb r2, r2
|
||
8001e62: 701a strb r2, [r3, #0]
|
||
hspi->pRxBuffPtr++;
|
||
8001e64: 68fb ldr r3, [r7, #12]
|
||
8001e66: 6b9b ldr r3, [r3, #56] ; 0x38
|
||
8001e68: 1c5a adds r2, r3, #1
|
||
8001e6a: 68fb ldr r3, [r7, #12]
|
||
8001e6c: 639a str r2, [r3, #56] ; 0x38
|
||
hspi->RxXferCount--;
|
||
8001e6e: 68fb ldr r3, [r7, #12]
|
||
8001e70: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001e72: b29b uxth r3, r3
|
||
8001e74: 3b01 subs r3, #1
|
||
8001e76: b29a uxth r2, r3
|
||
8001e78: 68fb ldr r3, [r7, #12]
|
||
8001e7a: 87da strh r2, [r3, #62] ; 0x3e
|
||
/* Next Data is a Transmission (Tx). Tx is allowed */
|
||
txallowed = 1U;
|
||
8001e7c: 2301 movs r3, #1
|
||
8001e7e: 62fb str r3, [r7, #44] ; 0x2c
|
||
}
|
||
if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U))
|
||
8001e80: f7fe fd18 bl 80008b4 <HAL_GetTick>
|
||
8001e84: 4602 mov r2, r0
|
||
8001e86: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001e88: 1ad3 subs r3, r2, r3
|
||
8001e8a: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8001e8c: 429a cmp r2, r3
|
||
8001e8e: d803 bhi.n 8001e98 <HAL_SPI_TransmitReceive+0x2c6>
|
||
8001e90: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8001e92: f1b3 3fff cmp.w r3, #4294967295
|
||
8001e96: d102 bne.n 8001e9e <HAL_SPI_TransmitReceive+0x2cc>
|
||
8001e98: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8001e9a: 2b00 cmp r3, #0
|
||
8001e9c: d103 bne.n 8001ea6 <HAL_SPI_TransmitReceive+0x2d4>
|
||
{
|
||
errorcode = HAL_TIMEOUT;
|
||
8001e9e: 2303 movs r3, #3
|
||
8001ea0: f887 302b strb.w r3, [r7, #43] ; 0x2b
|
||
goto error;
|
||
8001ea4: e029 b.n 8001efa <HAL_SPI_TransmitReceive+0x328>
|
||
while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
|
||
8001ea6: 68fb ldr r3, [r7, #12]
|
||
8001ea8: 8edb ldrh r3, [r3, #54] ; 0x36
|
||
8001eaa: b29b uxth r3, r3
|
||
8001eac: 2b00 cmp r3, #0
|
||
8001eae: d1a2 bne.n 8001df6 <HAL_SPI_TransmitReceive+0x224>
|
||
8001eb0: 68fb ldr r3, [r7, #12]
|
||
8001eb2: 8fdb ldrh r3, [r3, #62] ; 0x3e
|
||
8001eb4: b29b uxth r3, r3
|
||
8001eb6: 2b00 cmp r3, #0
|
||
8001eb8: d19d bne.n 8001df6 <HAL_SPI_TransmitReceive+0x224>
|
||
}
|
||
}
|
||
#endif /* USE_SPI_CRC */
|
||
|
||
/* Check the end of the transaction */
|
||
if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
|
||
8001eba: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8001ebc: 6bb9 ldr r1, [r7, #56] ; 0x38
|
||
8001ebe: 68f8 ldr r0, [r7, #12]
|
||
8001ec0: f000 f910 bl 80020e4 <SPI_EndRxTxTransaction>
|
||
8001ec4: 4603 mov r3, r0
|
||
8001ec6: 2b00 cmp r3, #0
|
||
8001ec8: d006 beq.n 8001ed8 <HAL_SPI_TransmitReceive+0x306>
|
||
{
|
||
errorcode = HAL_ERROR;
|
||
8001eca: 2301 movs r3, #1
|
||
8001ecc: f887 302b strb.w r3, [r7, #43] ; 0x2b
|
||
hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
|
||
8001ed0: 68fb ldr r3, [r7, #12]
|
||
8001ed2: 2220 movs r2, #32
|
||
8001ed4: 655a str r2, [r3, #84] ; 0x54
|
||
goto error;
|
||
8001ed6: e010 b.n 8001efa <HAL_SPI_TransmitReceive+0x328>
|
||
}
|
||
|
||
/* Clear overrun flag in 2 Lines communication mode because received is not read */
|
||
if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
|
||
8001ed8: 68fb ldr r3, [r7, #12]
|
||
8001eda: 689b ldr r3, [r3, #8]
|
||
8001edc: 2b00 cmp r3, #0
|
||
8001ede: d10b bne.n 8001ef8 <HAL_SPI_TransmitReceive+0x326>
|
||
{
|
||
__HAL_SPI_CLEAR_OVRFLAG(hspi);
|
||
8001ee0: 2300 movs r3, #0
|
||
8001ee2: 617b str r3, [r7, #20]
|
||
8001ee4: 68fb ldr r3, [r7, #12]
|
||
8001ee6: 681b ldr r3, [r3, #0]
|
||
8001ee8: 68db ldr r3, [r3, #12]
|
||
8001eea: 617b str r3, [r7, #20]
|
||
8001eec: 68fb ldr r3, [r7, #12]
|
||
8001eee: 681b ldr r3, [r3, #0]
|
||
8001ef0: 689b ldr r3, [r3, #8]
|
||
8001ef2: 617b str r3, [r7, #20]
|
||
8001ef4: 697b ldr r3, [r7, #20]
|
||
8001ef6: e000 b.n 8001efa <HAL_SPI_TransmitReceive+0x328>
|
||
}
|
||
|
||
error :
|
||
8001ef8: bf00 nop
|
||
hspi->State = HAL_SPI_STATE_READY;
|
||
8001efa: 68fb ldr r3, [r7, #12]
|
||
8001efc: 2201 movs r2, #1
|
||
8001efe: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
__HAL_UNLOCK(hspi);
|
||
8001f02: 68fb ldr r3, [r7, #12]
|
||
8001f04: 2200 movs r2, #0
|
||
8001f06: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
return errorcode;
|
||
8001f0a: f897 302b ldrb.w r3, [r7, #43] ; 0x2b
|
||
}
|
||
8001f0e: 4618 mov r0, r3
|
||
8001f10: 3730 adds r7, #48 ; 0x30
|
||
8001f12: 46bd mov sp, r7
|
||
8001f14: bd80 pop {r7, pc}
|
||
|
||
08001f16 <HAL_SPI_GetState>:
|
||
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
|
||
* the configuration information for SPI module.
|
||
* @retval SPI state
|
||
*/
|
||
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
|
||
{
|
||
8001f16: b480 push {r7}
|
||
8001f18: b083 sub sp, #12
|
||
8001f1a: af00 add r7, sp, #0
|
||
8001f1c: 6078 str r0, [r7, #4]
|
||
/* Return SPI handle state */
|
||
return hspi->State;
|
||
8001f1e: 687b ldr r3, [r7, #4]
|
||
8001f20: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
||
8001f24: b2db uxtb r3, r3
|
||
}
|
||
8001f26: 4618 mov r0, r3
|
||
8001f28: 370c adds r7, #12
|
||
8001f2a: 46bd mov sp, r7
|
||
8001f2c: bc80 pop {r7}
|
||
8001f2e: 4770 bx lr
|
||
|
||
08001f30 <SPI_WaitFlagStateUntilTimeout>:
|
||
* @param Tickstart tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
|
||
uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8001f30: b580 push {r7, lr}
|
||
8001f32: b088 sub sp, #32
|
||
8001f34: af00 add r7, sp, #0
|
||
8001f36: 60f8 str r0, [r7, #12]
|
||
8001f38: 60b9 str r1, [r7, #8]
|
||
8001f3a: 603b str r3, [r7, #0]
|
||
8001f3c: 4613 mov r3, r2
|
||
8001f3e: 71fb strb r3, [r7, #7]
|
||
__IO uint32_t count;
|
||
uint32_t tmp_timeout;
|
||
uint32_t tmp_tickstart;
|
||
|
||
/* Adjust Timeout value in case of end of transfer */
|
||
tmp_timeout = Timeout - (HAL_GetTick() - Tickstart);
|
||
8001f40: f7fe fcb8 bl 80008b4 <HAL_GetTick>
|
||
8001f44: 4602 mov r2, r0
|
||
8001f46: 6abb ldr r3, [r7, #40] ; 0x28
|
||
8001f48: 1a9b subs r3, r3, r2
|
||
8001f4a: 683a ldr r2, [r7, #0]
|
||
8001f4c: 4413 add r3, r2
|
||
8001f4e: 61fb str r3, [r7, #28]
|
||
tmp_tickstart = HAL_GetTick();
|
||
8001f50: f7fe fcb0 bl 80008b4 <HAL_GetTick>
|
||
8001f54: 61b8 str r0, [r7, #24]
|
||
|
||
/* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */
|
||
count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U);
|
||
8001f56: 4b39 ldr r3, [pc, #228] ; (800203c <SPI_WaitFlagStateUntilTimeout+0x10c>)
|
||
8001f58: 681b ldr r3, [r3, #0]
|
||
8001f5a: 015b lsls r3, r3, #5
|
||
8001f5c: 0d1b lsrs r3, r3, #20
|
||
8001f5e: 69fa ldr r2, [r7, #28]
|
||
8001f60: fb02 f303 mul.w r3, r2, r3
|
||
8001f64: 617b str r3, [r7, #20]
|
||
|
||
while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
|
||
8001f66: e054 b.n 8002012 <SPI_WaitFlagStateUntilTimeout+0xe2>
|
||
{
|
||
if (Timeout != HAL_MAX_DELAY)
|
||
8001f68: 683b ldr r3, [r7, #0]
|
||
8001f6a: f1b3 3fff cmp.w r3, #4294967295
|
||
8001f6e: d050 beq.n 8002012 <SPI_WaitFlagStateUntilTimeout+0xe2>
|
||
{
|
||
if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U))
|
||
8001f70: f7fe fca0 bl 80008b4 <HAL_GetTick>
|
||
8001f74: 4602 mov r2, r0
|
||
8001f76: 69bb ldr r3, [r7, #24]
|
||
8001f78: 1ad3 subs r3, r2, r3
|
||
8001f7a: 69fa ldr r2, [r7, #28]
|
||
8001f7c: 429a cmp r2, r3
|
||
8001f7e: d902 bls.n 8001f86 <SPI_WaitFlagStateUntilTimeout+0x56>
|
||
8001f80: 69fb ldr r3, [r7, #28]
|
||
8001f82: 2b00 cmp r3, #0
|
||
8001f84: d13d bne.n 8002002 <SPI_WaitFlagStateUntilTimeout+0xd2>
|
||
/* Disable the SPI and reset the CRC: the CRC value should be cleared
|
||
on both master and slave sides in order to resynchronize the master
|
||
and slave for their respective CRC calculation */
|
||
|
||
/* Disable TXE, RXNE and ERR interrupts for the interrupt process */
|
||
__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
|
||
8001f86: 68fb ldr r3, [r7, #12]
|
||
8001f88: 681b ldr r3, [r3, #0]
|
||
8001f8a: 685a ldr r2, [r3, #4]
|
||
8001f8c: 68fb ldr r3, [r7, #12]
|
||
8001f8e: 681b ldr r3, [r3, #0]
|
||
8001f90: f022 02e0 bic.w r2, r2, #224 ; 0xe0
|
||
8001f94: 605a str r2, [r3, #4]
|
||
|
||
if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
|
||
8001f96: 68fb ldr r3, [r7, #12]
|
||
8001f98: 685b ldr r3, [r3, #4]
|
||
8001f9a: f5b3 7f82 cmp.w r3, #260 ; 0x104
|
||
8001f9e: d111 bne.n 8001fc4 <SPI_WaitFlagStateUntilTimeout+0x94>
|
||
8001fa0: 68fb ldr r3, [r7, #12]
|
||
8001fa2: 689b ldr r3, [r3, #8]
|
||
8001fa4: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
||
8001fa8: d004 beq.n 8001fb4 <SPI_WaitFlagStateUntilTimeout+0x84>
|
||
|| (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
|
||
8001faa: 68fb ldr r3, [r7, #12]
|
||
8001fac: 689b ldr r3, [r3, #8]
|
||
8001fae: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
||
8001fb2: d107 bne.n 8001fc4 <SPI_WaitFlagStateUntilTimeout+0x94>
|
||
{
|
||
/* Disable SPI peripheral */
|
||
__HAL_SPI_DISABLE(hspi);
|
||
8001fb4: 68fb ldr r3, [r7, #12]
|
||
8001fb6: 681b ldr r3, [r3, #0]
|
||
8001fb8: 681a ldr r2, [r3, #0]
|
||
8001fba: 68fb ldr r3, [r7, #12]
|
||
8001fbc: 681b ldr r3, [r3, #0]
|
||
8001fbe: f022 0240 bic.w r2, r2, #64 ; 0x40
|
||
8001fc2: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Reset CRC Calculation */
|
||
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
|
||
8001fc4: 68fb ldr r3, [r7, #12]
|
||
8001fc6: 6a9b ldr r3, [r3, #40] ; 0x28
|
||
8001fc8: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
|
||
8001fcc: d10f bne.n 8001fee <SPI_WaitFlagStateUntilTimeout+0xbe>
|
||
{
|
||
SPI_RESET_CRC(hspi);
|
||
8001fce: 68fb ldr r3, [r7, #12]
|
||
8001fd0: 681b ldr r3, [r3, #0]
|
||
8001fd2: 681a ldr r2, [r3, #0]
|
||
8001fd4: 68fb ldr r3, [r7, #12]
|
||
8001fd6: 681b ldr r3, [r3, #0]
|
||
8001fd8: f422 5200 bic.w r2, r2, #8192 ; 0x2000
|
||
8001fdc: 601a str r2, [r3, #0]
|
||
8001fde: 68fb ldr r3, [r7, #12]
|
||
8001fe0: 681b ldr r3, [r3, #0]
|
||
8001fe2: 681a ldr r2, [r3, #0]
|
||
8001fe4: 68fb ldr r3, [r7, #12]
|
||
8001fe6: 681b ldr r3, [r3, #0]
|
||
8001fe8: f442 5200 orr.w r2, r2, #8192 ; 0x2000
|
||
8001fec: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
hspi->State = HAL_SPI_STATE_READY;
|
||
8001fee: 68fb ldr r3, [r7, #12]
|
||
8001ff0: 2201 movs r2, #1
|
||
8001ff2: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hspi);
|
||
8001ff6: 68fb ldr r3, [r7, #12]
|
||
8001ff8: 2200 movs r2, #0
|
||
8001ffa: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
||
|
||
return HAL_TIMEOUT;
|
||
8001ffe: 2303 movs r3, #3
|
||
8002000: e017 b.n 8002032 <SPI_WaitFlagStateUntilTimeout+0x102>
|
||
}
|
||
/* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */
|
||
if(count == 0U)
|
||
8002002: 697b ldr r3, [r7, #20]
|
||
8002004: 2b00 cmp r3, #0
|
||
8002006: d101 bne.n 800200c <SPI_WaitFlagStateUntilTimeout+0xdc>
|
||
{
|
||
tmp_timeout = 0U;
|
||
8002008: 2300 movs r3, #0
|
||
800200a: 61fb str r3, [r7, #28]
|
||
}
|
||
count--;
|
||
800200c: 697b ldr r3, [r7, #20]
|
||
800200e: 3b01 subs r3, #1
|
||
8002010: 617b str r3, [r7, #20]
|
||
while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
|
||
8002012: 68fb ldr r3, [r7, #12]
|
||
8002014: 681b ldr r3, [r3, #0]
|
||
8002016: 689a ldr r2, [r3, #8]
|
||
8002018: 68bb ldr r3, [r7, #8]
|
||
800201a: 4013 ands r3, r2
|
||
800201c: 68ba ldr r2, [r7, #8]
|
||
800201e: 429a cmp r2, r3
|
||
8002020: bf0c ite eq
|
||
8002022: 2301 moveq r3, #1
|
||
8002024: 2300 movne r3, #0
|
||
8002026: b2db uxtb r3, r3
|
||
8002028: 461a mov r2, r3
|
||
800202a: 79fb ldrb r3, [r7, #7]
|
||
800202c: 429a cmp r2, r3
|
||
800202e: d19b bne.n 8001f68 <SPI_WaitFlagStateUntilTimeout+0x38>
|
||
}
|
||
}
|
||
|
||
return HAL_OK;
|
||
8002030: 2300 movs r3, #0
|
||
}
|
||
8002032: 4618 mov r0, r3
|
||
8002034: 3720 adds r7, #32
|
||
8002036: 46bd mov sp, r7
|
||
8002038: bd80 pop {r7, pc}
|
||
800203a: bf00 nop
|
||
800203c: 20000000 .word 0x20000000
|
||
|
||
08002040 <SPI_EndRxTransaction>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002040: b580 push {r7, lr}
|
||
8002042: b086 sub sp, #24
|
||
8002044: af02 add r7, sp, #8
|
||
8002046: 60f8 str r0, [r7, #12]
|
||
8002048: 60b9 str r1, [r7, #8]
|
||
800204a: 607a str r2, [r7, #4]
|
||
if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
|
||
800204c: 68fb ldr r3, [r7, #12]
|
||
800204e: 685b ldr r3, [r3, #4]
|
||
8002050: f5b3 7f82 cmp.w r3, #260 ; 0x104
|
||
8002054: d111 bne.n 800207a <SPI_EndRxTransaction+0x3a>
|
||
8002056: 68fb ldr r3, [r7, #12]
|
||
8002058: 689b ldr r3, [r3, #8]
|
||
800205a: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
||
800205e: d004 beq.n 800206a <SPI_EndRxTransaction+0x2a>
|
||
|| (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
|
||
8002060: 68fb ldr r3, [r7, #12]
|
||
8002062: 689b ldr r3, [r3, #8]
|
||
8002064: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
||
8002068: d107 bne.n 800207a <SPI_EndRxTransaction+0x3a>
|
||
{
|
||
/* Disable SPI peripheral */
|
||
__HAL_SPI_DISABLE(hspi);
|
||
800206a: 68fb ldr r3, [r7, #12]
|
||
800206c: 681b ldr r3, [r3, #0]
|
||
800206e: 681a ldr r2, [r3, #0]
|
||
8002070: 68fb ldr r3, [r7, #12]
|
||
8002072: 681b ldr r3, [r3, #0]
|
||
8002074: f022 0240 bic.w r2, r2, #64 ; 0x40
|
||
8002078: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))
|
||
800207a: 68fb ldr r3, [r7, #12]
|
||
800207c: 685b ldr r3, [r3, #4]
|
||
800207e: f5b3 7f82 cmp.w r3, #260 ; 0x104
|
||
8002082: d117 bne.n 80020b4 <SPI_EndRxTransaction+0x74>
|
||
8002084: 68fb ldr r3, [r7, #12]
|
||
8002086: 689b ldr r3, [r3, #8]
|
||
8002088: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
||
800208c: d112 bne.n 80020b4 <SPI_EndRxTransaction+0x74>
|
||
{
|
||
/* Wait the RXNE reset */
|
||
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout, Tickstart) != HAL_OK)
|
||
800208e: 687b ldr r3, [r7, #4]
|
||
8002090: 9300 str r3, [sp, #0]
|
||
8002092: 68bb ldr r3, [r7, #8]
|
||
8002094: 2200 movs r2, #0
|
||
8002096: 2101 movs r1, #1
|
||
8002098: 68f8 ldr r0, [r7, #12]
|
||
800209a: f7ff ff49 bl 8001f30 <SPI_WaitFlagStateUntilTimeout>
|
||
800209e: 4603 mov r3, r0
|
||
80020a0: 2b00 cmp r3, #0
|
||
80020a2: d01a beq.n 80020da <SPI_EndRxTransaction+0x9a>
|
||
{
|
||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
|
||
80020a4: 68fb ldr r3, [r7, #12]
|
||
80020a6: 6d5b ldr r3, [r3, #84] ; 0x54
|
||
80020a8: f043 0220 orr.w r2, r3, #32
|
||
80020ac: 68fb ldr r3, [r7, #12]
|
||
80020ae: 655a str r2, [r3, #84] ; 0x54
|
||
return HAL_TIMEOUT;
|
||
80020b0: 2303 movs r3, #3
|
||
80020b2: e013 b.n 80020dc <SPI_EndRxTransaction+0x9c>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Control the BSY flag */
|
||
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
|
||
80020b4: 687b ldr r3, [r7, #4]
|
||
80020b6: 9300 str r3, [sp, #0]
|
||
80020b8: 68bb ldr r3, [r7, #8]
|
||
80020ba: 2200 movs r2, #0
|
||
80020bc: 2180 movs r1, #128 ; 0x80
|
||
80020be: 68f8 ldr r0, [r7, #12]
|
||
80020c0: f7ff ff36 bl 8001f30 <SPI_WaitFlagStateUntilTimeout>
|
||
80020c4: 4603 mov r3, r0
|
||
80020c6: 2b00 cmp r3, #0
|
||
80020c8: d007 beq.n 80020da <SPI_EndRxTransaction+0x9a>
|
||
{
|
||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
|
||
80020ca: 68fb ldr r3, [r7, #12]
|
||
80020cc: 6d5b ldr r3, [r3, #84] ; 0x54
|
||
80020ce: f043 0220 orr.w r2, r3, #32
|
||
80020d2: 68fb ldr r3, [r7, #12]
|
||
80020d4: 655a str r2, [r3, #84] ; 0x54
|
||
return HAL_TIMEOUT;
|
||
80020d6: 2303 movs r3, #3
|
||
80020d8: e000 b.n 80020dc <SPI_EndRxTransaction+0x9c>
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
80020da: 2300 movs r3, #0
|
||
}
|
||
80020dc: 4618 mov r0, r3
|
||
80020de: 3710 adds r7, #16
|
||
80020e0: 46bd mov sp, r7
|
||
80020e2: bd80 pop {r7, pc}
|
||
|
||
080020e4 <SPI_EndRxTxTransaction>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
80020e4: b580 push {r7, lr}
|
||
80020e6: b086 sub sp, #24
|
||
80020e8: af02 add r7, sp, #8
|
||
80020ea: 60f8 str r0, [r7, #12]
|
||
80020ec: 60b9 str r1, [r7, #8]
|
||
80020ee: 607a str r2, [r7, #4]
|
||
/* Control the BSY flag */
|
||
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
|
||
80020f0: 687b ldr r3, [r7, #4]
|
||
80020f2: 9300 str r3, [sp, #0]
|
||
80020f4: 68bb ldr r3, [r7, #8]
|
||
80020f6: 2200 movs r2, #0
|
||
80020f8: 2180 movs r1, #128 ; 0x80
|
||
80020fa: 68f8 ldr r0, [r7, #12]
|
||
80020fc: f7ff ff18 bl 8001f30 <SPI_WaitFlagStateUntilTimeout>
|
||
8002100: 4603 mov r3, r0
|
||
8002102: 2b00 cmp r3, #0
|
||
8002104: d007 beq.n 8002116 <SPI_EndRxTxTransaction+0x32>
|
||
{
|
||
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
|
||
8002106: 68fb ldr r3, [r7, #12]
|
||
8002108: 6d5b ldr r3, [r3, #84] ; 0x54
|
||
800210a: f043 0220 orr.w r2, r3, #32
|
||
800210e: 68fb ldr r3, [r7, #12]
|
||
8002110: 655a str r2, [r3, #84] ; 0x54
|
||
return HAL_TIMEOUT;
|
||
8002112: 2303 movs r3, #3
|
||
8002114: e000 b.n 8002118 <SPI_EndRxTxTransaction+0x34>
|
||
}
|
||
return HAL_OK;
|
||
8002116: 2300 movs r3, #0
|
||
}
|
||
8002118: 4618 mov r0, r3
|
||
800211a: 3710 adds r7, #16
|
||
800211c: 46bd mov sp, r7
|
||
800211e: bd80 pop {r7, pc}
|
||
|
||
08002120 <HAL_SRAM_Init>:
|
||
* @param ExtTiming Pointer to SRAM extended mode timing structure
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing,
|
||
FSMC_NORSRAM_TimingTypeDef *ExtTiming)
|
||
{
|
||
8002120: b580 push {r7, lr}
|
||
8002122: b084 sub sp, #16
|
||
8002124: af00 add r7, sp, #0
|
||
8002126: 60f8 str r0, [r7, #12]
|
||
8002128: 60b9 str r1, [r7, #8]
|
||
800212a: 607a str r2, [r7, #4]
|
||
/* Check the SRAM handle parameter */
|
||
if ((hsram == NULL) || (hsram->Init.BurstAccessMode == FSMC_BURST_ACCESS_MODE_ENABLE))
|
||
800212c: 68fb ldr r3, [r7, #12]
|
||
800212e: 2b00 cmp r3, #0
|
||
8002130: d004 beq.n 800213c <HAL_SRAM_Init+0x1c>
|
||
8002132: 68fb ldr r3, [r7, #12]
|
||
8002134: 699b ldr r3, [r3, #24]
|
||
8002136: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
800213a: d101 bne.n 8002140 <HAL_SRAM_Init+0x20>
|
||
{
|
||
return HAL_ERROR;
|
||
800213c: 2301 movs r3, #1
|
||
800213e: e038 b.n 80021b2 <HAL_SRAM_Init+0x92>
|
||
}
|
||
|
||
if (hsram->State == HAL_SRAM_STATE_RESET)
|
||
8002140: 68fb ldr r3, [r7, #12]
|
||
8002142: f893 3041 ldrb.w r3, [r3, #65] ; 0x41
|
||
8002146: b2db uxtb r3, r3
|
||
8002148: 2b00 cmp r3, #0
|
||
800214a: d106 bne.n 800215a <HAL_SRAM_Init+0x3a>
|
||
{
|
||
/* Allocate lock resource and initialize it */
|
||
hsram->Lock = HAL_UNLOCKED;
|
||
800214c: 68fb ldr r3, [r7, #12]
|
||
800214e: 2200 movs r2, #0
|
||
8002150: f883 2040 strb.w r2, [r3, #64] ; 0x40
|
||
|
||
/* Init the low level hardware */
|
||
hsram->MspInitCallback(hsram);
|
||
#else
|
||
/* Initialize the low level hardware (MSP) */
|
||
HAL_SRAM_MspInit(hsram);
|
||
8002154: 68f8 ldr r0, [r7, #12]
|
||
8002156: f7fe fac1 bl 80006dc <HAL_SRAM_MspInit>
|
||
#endif
|
||
}
|
||
|
||
/* Initialize SRAM control Interface */
|
||
(void)FSMC_NORSRAM_Init(hsram->Instance, &(hsram->Init));
|
||
800215a: 68fb ldr r3, [r7, #12]
|
||
800215c: 681a ldr r2, [r3, #0]
|
||
800215e: 68fb ldr r3, [r7, #12]
|
||
8002160: 3308 adds r3, #8
|
||
8002162: 4619 mov r1, r3
|
||
8002164: 4610 mov r0, r2
|
||
8002166: f000 f829 bl 80021bc <FSMC_NORSRAM_Init>
|
||
|
||
/* Initialize SRAM timing Interface */
|
||
(void)FSMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank);
|
||
800216a: 68fb ldr r3, [r7, #12]
|
||
800216c: 6818 ldr r0, [r3, #0]
|
||
800216e: 68fb ldr r3, [r7, #12]
|
||
8002170: 689b ldr r3, [r3, #8]
|
||
8002172: 461a mov r2, r3
|
||
8002174: 68b9 ldr r1, [r7, #8]
|
||
8002176: f000 f88b bl 8002290 <FSMC_NORSRAM_Timing_Init>
|
||
|
||
/* Initialize SRAM extended mode timing Interface */
|
||
(void)FSMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank,
|
||
800217a: 68fb ldr r3, [r7, #12]
|
||
800217c: 6858 ldr r0, [r3, #4]
|
||
800217e: 68fb ldr r3, [r7, #12]
|
||
8002180: 689a ldr r2, [r3, #8]
|
||
8002182: 68fb ldr r3, [r7, #12]
|
||
8002184: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
8002186: 6879 ldr r1, [r7, #4]
|
||
8002188: f000 f8b6 bl 80022f8 <FSMC_NORSRAM_Extended_Timing_Init>
|
||
hsram->Init.ExtendedMode);
|
||
|
||
/* Enable the NORSRAM device */
|
||
__FSMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
|
||
800218c: 68fb ldr r3, [r7, #12]
|
||
800218e: 681b ldr r3, [r3, #0]
|
||
8002190: 68fa ldr r2, [r7, #12]
|
||
8002192: 6892 ldr r2, [r2, #8]
|
||
8002194: f853 1022 ldr.w r1, [r3, r2, lsl #2]
|
||
8002198: 68fb ldr r3, [r7, #12]
|
||
800219a: 681b ldr r3, [r3, #0]
|
||
800219c: 68fa ldr r2, [r7, #12]
|
||
800219e: 6892 ldr r2, [r2, #8]
|
||
80021a0: f041 0101 orr.w r1, r1, #1
|
||
80021a4: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
/* Initialize the SRAM controller state */
|
||
hsram->State = HAL_SRAM_STATE_READY;
|
||
80021a8: 68fb ldr r3, [r7, #12]
|
||
80021aa: 2201 movs r2, #1
|
||
80021ac: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
||
|
||
return HAL_OK;
|
||
80021b0: 2300 movs r3, #0
|
||
}
|
||
80021b2: 4618 mov r0, r3
|
||
80021b4: 3710 adds r7, #16
|
||
80021b6: 46bd mov sp, r7
|
||
80021b8: bd80 pop {r7, pc}
|
||
...
|
||
|
||
080021bc <FSMC_NORSRAM_Init>:
|
||
* @param Init Pointer to NORSRAM Initialization structure
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device,
|
||
FSMC_NORSRAM_InitTypeDef *Init)
|
||
{
|
||
80021bc: b480 push {r7}
|
||
80021be: b087 sub sp, #28
|
||
80021c0: af00 add r7, sp, #0
|
||
80021c2: 6078 str r0, [r7, #4]
|
||
80021c4: 6039 str r1, [r7, #0]
|
||
assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait));
|
||
assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst));
|
||
assert_param(IS_FSMC_PAGESIZE(Init->PageSize));
|
||
|
||
/* Disable NORSRAM Device */
|
||
__FSMC_NORSRAM_DISABLE(Device, Init->NSBank);
|
||
80021c6: 683b ldr r3, [r7, #0]
|
||
80021c8: 681a ldr r2, [r3, #0]
|
||
80021ca: 687b ldr r3, [r7, #4]
|
||
80021cc: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
||
80021d0: 683a ldr r2, [r7, #0]
|
||
80021d2: 6812 ldr r2, [r2, #0]
|
||
80021d4: f023 0101 bic.w r1, r3, #1
|
||
80021d8: 687b ldr r3, [r7, #4]
|
||
80021da: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
/* Set NORSRAM device control parameters */
|
||
if (Init->MemoryType == FSMC_MEMORY_TYPE_NOR)
|
||
80021de: 683b ldr r3, [r7, #0]
|
||
80021e0: 689b ldr r3, [r3, #8]
|
||
80021e2: 2b08 cmp r3, #8
|
||
80021e4: d102 bne.n 80021ec <FSMC_NORSRAM_Init+0x30>
|
||
{
|
||
flashaccess = FSMC_NORSRAM_FLASH_ACCESS_ENABLE;
|
||
80021e6: 2340 movs r3, #64 ; 0x40
|
||
80021e8: 617b str r3, [r7, #20]
|
||
80021ea: e001 b.n 80021f0 <FSMC_NORSRAM_Init+0x34>
|
||
}
|
||
else
|
||
{
|
||
flashaccess = FSMC_NORSRAM_FLASH_ACCESS_DISABLE;
|
||
80021ec: 2300 movs r3, #0
|
||
80021ee: 617b str r3, [r7, #20]
|
||
}
|
||
|
||
btcr_reg = (flashaccess | \
|
||
Init->DataAddressMux | \
|
||
80021f0: 683b ldr r3, [r7, #0]
|
||
80021f2: 685a ldr r2, [r3, #4]
|
||
btcr_reg = (flashaccess | \
|
||
80021f4: 697b ldr r3, [r7, #20]
|
||
80021f6: 431a orrs r2, r3
|
||
Init->MemoryType | \
|
||
80021f8: 683b ldr r3, [r7, #0]
|
||
80021fa: 689b ldr r3, [r3, #8]
|
||
Init->DataAddressMux | \
|
||
80021fc: 431a orrs r2, r3
|
||
Init->MemoryDataWidth | \
|
||
80021fe: 683b ldr r3, [r7, #0]
|
||
8002200: 68db ldr r3, [r3, #12]
|
||
Init->MemoryType | \
|
||
8002202: 431a orrs r2, r3
|
||
Init->BurstAccessMode | \
|
||
8002204: 683b ldr r3, [r7, #0]
|
||
8002206: 691b ldr r3, [r3, #16]
|
||
Init->MemoryDataWidth | \
|
||
8002208: 431a orrs r2, r3
|
||
Init->WaitSignalPolarity | \
|
||
800220a: 683b ldr r3, [r7, #0]
|
||
800220c: 695b ldr r3, [r3, #20]
|
||
Init->BurstAccessMode | \
|
||
800220e: 431a orrs r2, r3
|
||
Init->WaitSignalActive | \
|
||
8002210: 683b ldr r3, [r7, #0]
|
||
8002212: 69db ldr r3, [r3, #28]
|
||
Init->WaitSignalPolarity | \
|
||
8002214: 431a orrs r2, r3
|
||
Init->WriteOperation | \
|
||
8002216: 683b ldr r3, [r7, #0]
|
||
8002218: 6a1b ldr r3, [r3, #32]
|
||
Init->WaitSignalActive | \
|
||
800221a: 431a orrs r2, r3
|
||
Init->WaitSignal | \
|
||
800221c: 683b ldr r3, [r7, #0]
|
||
800221e: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
Init->WriteOperation | \
|
||
8002220: 431a orrs r2, r3
|
||
Init->ExtendedMode | \
|
||
8002222: 683b ldr r3, [r7, #0]
|
||
8002224: 6a9b ldr r3, [r3, #40] ; 0x28
|
||
Init->WaitSignal | \
|
||
8002226: 431a orrs r2, r3
|
||
Init->AsynchronousWait | \
|
||
8002228: 683b ldr r3, [r7, #0]
|
||
800222a: 6adb ldr r3, [r3, #44] ; 0x2c
|
||
Init->ExtendedMode | \
|
||
800222c: 431a orrs r2, r3
|
||
Init->WriteBurst);
|
||
800222e: 683b ldr r3, [r7, #0]
|
||
8002230: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
btcr_reg = (flashaccess | \
|
||
8002232: 4313 orrs r3, r2
|
||
8002234: 613b str r3, [r7, #16]
|
||
|
||
btcr_reg |= Init->WrapMode;
|
||
8002236: 683b ldr r3, [r7, #0]
|
||
8002238: 699b ldr r3, [r3, #24]
|
||
800223a: 693a ldr r2, [r7, #16]
|
||
800223c: 4313 orrs r3, r2
|
||
800223e: 613b str r3, [r7, #16]
|
||
btcr_reg |= Init->PageSize;
|
||
8002240: 683b ldr r3, [r7, #0]
|
||
8002242: 6b5b ldr r3, [r3, #52] ; 0x34
|
||
8002244: 693a ldr r2, [r7, #16]
|
||
8002246: 4313 orrs r3, r2
|
||
8002248: 613b str r3, [r7, #16]
|
||
|
||
mask = (FSMC_BCRx_MBKEN |
|
||
800224a: 4b10 ldr r3, [pc, #64] ; (800228c <FSMC_NORSRAM_Init+0xd0>)
|
||
800224c: 60fb str r3, [r7, #12]
|
||
FSMC_BCRx_WAITEN |
|
||
FSMC_BCRx_EXTMOD |
|
||
FSMC_BCRx_ASYNCWAIT |
|
||
FSMC_BCRx_CBURSTRW);
|
||
|
||
mask |= FSMC_BCRx_WRAPMOD;
|
||
800224e: 68fb ldr r3, [r7, #12]
|
||
8002250: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
||
8002254: 60fb str r3, [r7, #12]
|
||
mask |= 0x00070000U; /* CPSIZE to be defined in CMSIS file */
|
||
8002256: 68fb ldr r3, [r7, #12]
|
||
8002258: f443 23e0 orr.w r3, r3, #458752 ; 0x70000
|
||
800225c: 60fb str r3, [r7, #12]
|
||
|
||
MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg);
|
||
800225e: 683b ldr r3, [r7, #0]
|
||
8002260: 681a ldr r2, [r3, #0]
|
||
8002262: 687b ldr r3, [r7, #4]
|
||
8002264: f853 2022 ldr.w r2, [r3, r2, lsl #2]
|
||
8002268: 68fb ldr r3, [r7, #12]
|
||
800226a: 43db mvns r3, r3
|
||
800226c: ea02 0103 and.w r1, r2, r3
|
||
8002270: 683b ldr r3, [r7, #0]
|
||
8002272: 681a ldr r2, [r3, #0]
|
||
8002274: 693b ldr r3, [r7, #16]
|
||
8002276: 4319 orrs r1, r3
|
||
8002278: 687b ldr r3, [r7, #4]
|
||
800227a: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
|
||
return HAL_OK;
|
||
800227e: 2300 movs r3, #0
|
||
}
|
||
8002280: 4618 mov r0, r3
|
||
8002282: 371c adds r7, #28
|
||
8002284: 46bd mov sp, r7
|
||
8002286: bc80 pop {r7}
|
||
8002288: 4770 bx lr
|
||
800228a: bf00 nop
|
||
800228c: 0008fb7f .word 0x0008fb7f
|
||
|
||
08002290 <FSMC_NORSRAM_Timing_Init>:
|
||
* @param Bank NORSRAM bank number
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device,
|
||
FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)
|
||
{
|
||
8002290: b480 push {r7}
|
||
8002292: b085 sub sp, #20
|
||
8002294: af00 add r7, sp, #0
|
||
8002296: 60f8 str r0, [r7, #12]
|
||
8002298: 60b9 str r1, [r7, #8]
|
||
800229a: 607a str r2, [r7, #4]
|
||
assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency));
|
||
assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
|
||
assert_param(IS_FSMC_NORSRAM_BANK(Bank));
|
||
|
||
/* Set FSMC_NORSRAM device timing parameters */
|
||
MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime |
|
||
800229c: 687b ldr r3, [r7, #4]
|
||
800229e: 1c5a adds r2, r3, #1
|
||
80022a0: 68fb ldr r3, [r7, #12]
|
||
80022a2: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
||
80022a6: f003 4140 and.w r1, r3, #3221225472 ; 0xc0000000
|
||
80022aa: 68bb ldr r3, [r7, #8]
|
||
80022ac: 681a ldr r2, [r3, #0]
|
||
80022ae: 68bb ldr r3, [r7, #8]
|
||
80022b0: 685b ldr r3, [r3, #4]
|
||
80022b2: 011b lsls r3, r3, #4
|
||
80022b4: 431a orrs r2, r3
|
||
80022b6: 68bb ldr r3, [r7, #8]
|
||
80022b8: 689b ldr r3, [r3, #8]
|
||
80022ba: 021b lsls r3, r3, #8
|
||
80022bc: 431a orrs r2, r3
|
||
80022be: 68bb ldr r3, [r7, #8]
|
||
80022c0: 68db ldr r3, [r3, #12]
|
||
80022c2: 041b lsls r3, r3, #16
|
||
80022c4: 431a orrs r2, r3
|
||
80022c6: 68bb ldr r3, [r7, #8]
|
||
80022c8: 691b ldr r3, [r3, #16]
|
||
80022ca: 3b01 subs r3, #1
|
||
80022cc: 051b lsls r3, r3, #20
|
||
80022ce: 431a orrs r2, r3
|
||
80022d0: 68bb ldr r3, [r7, #8]
|
||
80022d2: 695b ldr r3, [r3, #20]
|
||
80022d4: 3b02 subs r3, #2
|
||
80022d6: 061b lsls r3, r3, #24
|
||
80022d8: 431a orrs r2, r3
|
||
80022da: 68bb ldr r3, [r7, #8]
|
||
80022dc: 699b ldr r3, [r3, #24]
|
||
80022de: 4313 orrs r3, r2
|
||
80022e0: 687a ldr r2, [r7, #4]
|
||
80022e2: 3201 adds r2, #1
|
||
80022e4: 4319 orrs r1, r3
|
||
80022e6: 68fb ldr r3, [r7, #12]
|
||
80022e8: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
((Timing->BusTurnAroundDuration) << FSMC_BTRx_BUSTURN_Pos) |
|
||
(((Timing->CLKDivision) - 1U) << FSMC_BTRx_CLKDIV_Pos) |
|
||
(((Timing->DataLatency) - 2U) << FSMC_BTRx_DATLAT_Pos) |
|
||
(Timing->AccessMode)));
|
||
|
||
return HAL_OK;
|
||
80022ec: 2300 movs r3, #0
|
||
}
|
||
80022ee: 4618 mov r0, r3
|
||
80022f0: 3714 adds r7, #20
|
||
80022f2: 46bd mov sp, r7
|
||
80022f4: bc80 pop {r7}
|
||
80022f6: 4770 bx lr
|
||
|
||
080022f8 <FSMC_NORSRAM_Extended_Timing_Init>:
|
||
* @arg FSMC_EXTENDED_MODE_ENABLE
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device,
|
||
FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode)
|
||
{
|
||
80022f8: b480 push {r7}
|
||
80022fa: b085 sub sp, #20
|
||
80022fc: af00 add r7, sp, #0
|
||
80022fe: 60f8 str r0, [r7, #12]
|
||
8002300: 60b9 str r1, [r7, #8]
|
||
8002302: 607a str r2, [r7, #4]
|
||
8002304: 603b str r3, [r7, #0]
|
||
/* Check the parameters */
|
||
assert_param(IS_FSMC_EXTENDED_MODE(ExtendedMode));
|
||
|
||
/* Set NORSRAM device timing register for write configuration, if extended mode is used */
|
||
if (ExtendedMode == FSMC_EXTENDED_MODE_ENABLE)
|
||
8002306: 683b ldr r3, [r7, #0]
|
||
8002308: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
|
||
800230c: d11d bne.n 800234a <FSMC_NORSRAM_Extended_Timing_Init+0x52>
|
||
assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
|
||
assert_param(IS_FSMC_NORSRAM_BANK(Bank));
|
||
|
||
/* Set NORSRAM device timing register for write configuration, if extended mode is used */
|
||
#if defined(STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG)
|
||
MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime |
|
||
800230e: 68fb ldr r3, [r7, #12]
|
||
8002310: 687a ldr r2, [r7, #4]
|
||
8002312: f853 2022 ldr.w r2, [r3, r2, lsl #2]
|
||
8002316: 4b13 ldr r3, [pc, #76] ; (8002364 <FSMC_NORSRAM_Extended_Timing_Init+0x6c>)
|
||
8002318: 4013 ands r3, r2
|
||
800231a: 68ba ldr r2, [r7, #8]
|
||
800231c: 6811 ldr r1, [r2, #0]
|
||
800231e: 68ba ldr r2, [r7, #8]
|
||
8002320: 6852 ldr r2, [r2, #4]
|
||
8002322: 0112 lsls r2, r2, #4
|
||
8002324: 4311 orrs r1, r2
|
||
8002326: 68ba ldr r2, [r7, #8]
|
||
8002328: 6892 ldr r2, [r2, #8]
|
||
800232a: 0212 lsls r2, r2, #8
|
||
800232c: 4311 orrs r1, r2
|
||
800232e: 68ba ldr r2, [r7, #8]
|
||
8002330: 6992 ldr r2, [r2, #24]
|
||
8002332: 4311 orrs r1, r2
|
||
8002334: 68ba ldr r2, [r7, #8]
|
||
8002336: 68d2 ldr r2, [r2, #12]
|
||
8002338: 0412 lsls r2, r2, #16
|
||
800233a: 430a orrs r2, r1
|
||
800233c: ea43 0102 orr.w r1, r3, r2
|
||
8002340: 68fb ldr r3, [r7, #12]
|
||
8002342: 687a ldr r2, [r7, #4]
|
||
8002344: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
8002348: e005 b.n 8002356 <FSMC_NORSRAM_Extended_Timing_Init+0x5e>
|
||
(((Timing->DataLatency) - 2U) << FSMC_BWTRx_DATLAT_Pos)));
|
||
#endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG */
|
||
}
|
||
else
|
||
{
|
||
Device->BWTR[Bank] = 0x0FFFFFFFU;
|
||
800234a: 68fb ldr r3, [r7, #12]
|
||
800234c: 687a ldr r2, [r7, #4]
|
||
800234e: f06f 4170 mvn.w r1, #4026531840 ; 0xf0000000
|
||
8002352: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
}
|
||
|
||
return HAL_OK;
|
||
8002356: 2300 movs r3, #0
|
||
}
|
||
8002358: 4618 mov r0, r3
|
||
800235a: 3714 adds r7, #20
|
||
800235c: 46bd mov sp, r7
|
||
800235e: bc80 pop {r7}
|
||
8002360: 4770 bx lr
|
||
8002362: bf00 nop
|
||
8002364: cff00000 .word 0xcff00000
|
||
|
||
08002368 <MX_FATFS_Init>:
|
||
/* USER CODE BEGIN Variables */
|
||
|
||
/* USER CODE END Variables */
|
||
|
||
void MX_FATFS_Init(void)
|
||
{
|
||
8002368: b580 push {r7, lr}
|
||
800236a: af00 add r7, sp, #0
|
||
/*## FatFS: Link the USER driver ###########################*/
|
||
retUSER = FATFS_LinkDriver(&USER_Driver, USERPath);
|
||
800236c: 4904 ldr r1, [pc, #16] ; (8002380 <MX_FATFS_Init+0x18>)
|
||
800236e: 4805 ldr r0, [pc, #20] ; (8002384 <MX_FATFS_Init+0x1c>)
|
||
8002370: f002 fa02 bl 8004778 <FATFS_LinkDriver>
|
||
8002374: 4603 mov r3, r0
|
||
8002376: 461a mov r2, r3
|
||
8002378: 4b03 ldr r3, [pc, #12] ; (8002388 <MX_FATFS_Init+0x20>)
|
||
800237a: 701a strb r2, [r3, #0]
|
||
|
||
/* USER CODE BEGIN Init */
|
||
/* additional user code for init */
|
||
/* USER CODE END Init */
|
||
}
|
||
800237c: bf00 nop
|
||
800237e: bd80 pop {r7, pc}
|
||
8002380: 20000188 .word 0x20000188
|
||
8002384: 2000000c .word 0x2000000c
|
||
8002388: 2000018c .word 0x2000018c
|
||
|
||
0800238c <get_fattime>:
|
||
* @brief Gets Time from RTC
|
||
* @param None
|
||
* @retval Time in DWORD
|
||
*/
|
||
DWORD get_fattime(void)
|
||
{
|
||
800238c: b480 push {r7}
|
||
800238e: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN get_fattime */
|
||
return 0;
|
||
8002390: 2300 movs r3, #0
|
||
/* USER CODE END get_fattime */
|
||
}
|
||
8002392: 4618 mov r0, r3
|
||
8002394: 46bd mov sp, r7
|
||
8002396: bc80 pop {r7}
|
||
8002398: 4770 bx lr
|
||
...
|
||
|
||
0800239c <USER_initialize>:
|
||
* @retval DSTATUS: Operation status
|
||
*/
|
||
DSTATUS USER_initialize (
|
||
BYTE pdrv /* Physical drive nmuber to identify the drive */
|
||
)
|
||
{
|
||
800239c: b580 push {r7, lr}
|
||
800239e: b082 sub sp, #8
|
||
80023a0: af00 add r7, sp, #0
|
||
80023a2: 4603 mov r3, r0
|
||
80023a4: 71fb strb r3, [r7, #7]
|
||
/* USER CODE BEGIN INIT */
|
||
Stat = SD_disk_initialize(pdrv);
|
||
80023a6: 79fb ldrb r3, [r7, #7]
|
||
80023a8: 4618 mov r0, r3
|
||
80023aa: f002 fce7 bl 8004d7c <SD_disk_initialize>
|
||
80023ae: 4603 mov r3, r0
|
||
80023b0: 461a mov r2, r3
|
||
80023b2: 4b04 ldr r3, [pc, #16] ; (80023c4 <USER_initialize+0x28>)
|
||
80023b4: 701a strb r2, [r3, #0]
|
||
return Stat;
|
||
80023b6: 4b03 ldr r3, [pc, #12] ; (80023c4 <USER_initialize+0x28>)
|
||
80023b8: 781b ldrb r3, [r3, #0]
|
||
80023ba: b2db uxtb r3, r3
|
||
/* USER CODE END INIT */
|
||
}
|
||
80023bc: 4618 mov r0, r3
|
||
80023be: 3708 adds r7, #8
|
||
80023c0: 46bd mov sp, r7
|
||
80023c2: bd80 pop {r7, pc}
|
||
80023c4: 20000009 .word 0x20000009
|
||
|
||
080023c8 <USER_status>:
|
||
* @retval DSTATUS: Operation status
|
||
*/
|
||
DSTATUS USER_status (
|
||
BYTE pdrv /* Physical drive number to identify the drive */
|
||
)
|
||
{
|
||
80023c8: b580 push {r7, lr}
|
||
80023ca: b082 sub sp, #8
|
||
80023cc: af00 add r7, sp, #0
|
||
80023ce: 4603 mov r3, r0
|
||
80023d0: 71fb strb r3, [r7, #7]
|
||
/* USER CODE BEGIN STATUS */
|
||
Stat = SD_disk_status (pdrv);
|
||
80023d2: 79fb ldrb r3, [r7, #7]
|
||
80023d4: 4618 mov r0, r3
|
||
80023d6: f002 fdc5 bl 8004f64 <SD_disk_status>
|
||
80023da: 4603 mov r3, r0
|
||
80023dc: 461a mov r2, r3
|
||
80023de: 4b04 ldr r3, [pc, #16] ; (80023f0 <USER_status+0x28>)
|
||
80023e0: 701a strb r2, [r3, #0]
|
||
return Stat;
|
||
80023e2: 4b03 ldr r3, [pc, #12] ; (80023f0 <USER_status+0x28>)
|
||
80023e4: 781b ldrb r3, [r3, #0]
|
||
80023e6: b2db uxtb r3, r3
|
||
/* USER CODE END STATUS */
|
||
}
|
||
80023e8: 4618 mov r0, r3
|
||
80023ea: 3708 adds r7, #8
|
||
80023ec: 46bd mov sp, r7
|
||
80023ee: bd80 pop {r7, pc}
|
||
80023f0: 20000009 .word 0x20000009
|
||
|
||
080023f4 <USER_read>:
|
||
BYTE pdrv, /* Physical drive nmuber to identify the drive */
|
||
BYTE *buff, /* Data buffer to store read data */
|
||
DWORD sector, /* Sector address in LBA */
|
||
UINT count /* Number of sectors to read */
|
||
)
|
||
{
|
||
80023f4: b580 push {r7, lr}
|
||
80023f6: b084 sub sp, #16
|
||
80023f8: af00 add r7, sp, #0
|
||
80023fa: 60b9 str r1, [r7, #8]
|
||
80023fc: 607a str r2, [r7, #4]
|
||
80023fe: 603b str r3, [r7, #0]
|
||
8002400: 4603 mov r3, r0
|
||
8002402: 73fb strb r3, [r7, #15]
|
||
/* USER CODE BEGIN READ */
|
||
return SD_disk_read (pdrv, buff, sector, count);
|
||
8002404: 7bf8 ldrb r0, [r7, #15]
|
||
8002406: 683b ldr r3, [r7, #0]
|
||
8002408: 687a ldr r2, [r7, #4]
|
||
800240a: 68b9 ldr r1, [r7, #8]
|
||
800240c: f002 fdbe bl 8004f8c <SD_disk_read>
|
||
8002410: 4603 mov r3, r0
|
||
/* USER CODE END READ */
|
||
}
|
||
8002412: 4618 mov r0, r3
|
||
8002414: 3710 adds r7, #16
|
||
8002416: 46bd mov sp, r7
|
||
8002418: bd80 pop {r7, pc}
|
||
|
||
0800241a <USER_write>:
|
||
BYTE pdrv, /* Physical drive nmuber to identify the drive */
|
||
const BYTE *buff, /* Data to be written */
|
||
DWORD sector, /* Sector address in LBA */
|
||
UINT count /* Number of sectors to write */
|
||
)
|
||
{
|
||
800241a: b580 push {r7, lr}
|
||
800241c: b084 sub sp, #16
|
||
800241e: af00 add r7, sp, #0
|
||
8002420: 60b9 str r1, [r7, #8]
|
||
8002422: 607a str r2, [r7, #4]
|
||
8002424: 603b str r3, [r7, #0]
|
||
8002426: 4603 mov r3, r0
|
||
8002428: 73fb strb r3, [r7, #15]
|
||
/* USER CODE BEGIN WRITE */
|
||
/* USER CODE HERE */
|
||
return SD_disk_write (pdrv, buff, sector, count);
|
||
800242a: 7bf8 ldrb r0, [r7, #15]
|
||
800242c: 683b ldr r3, [r7, #0]
|
||
800242e: 687a ldr r2, [r7, #4]
|
||
8002430: 68b9 ldr r1, [r7, #8]
|
||
8002432: f002 fe15 bl 8005060 <SD_disk_write>
|
||
8002436: 4603 mov r3, r0
|
||
/* USER CODE END WRITE */
|
||
}
|
||
8002438: 4618 mov r0, r3
|
||
800243a: 3710 adds r7, #16
|
||
800243c: 46bd mov sp, r7
|
||
800243e: bd80 pop {r7, pc}
|
||
|
||
08002440 <USER_ioctl>:
|
||
DRESULT USER_ioctl (
|
||
BYTE pdrv, /* Physical drive nmuber (0..) */
|
||
BYTE cmd, /* Control code */
|
||
void *buff /* Buffer to send/receive control data */
|
||
)
|
||
{
|
||
8002440: b580 push {r7, lr}
|
||
8002442: b084 sub sp, #16
|
||
8002444: af00 add r7, sp, #0
|
||
8002446: 4603 mov r3, r0
|
||
8002448: 603a str r2, [r7, #0]
|
||
800244a: 71fb strb r3, [r7, #7]
|
||
800244c: 460b mov r3, r1
|
||
800244e: 71bb strb r3, [r7, #6]
|
||
/* USER CODE BEGIN IOCTL */
|
||
DRESULT res = SD_disk_ioctl (pdrv, cmd, buff);
|
||
8002450: 79b9 ldrb r1, [r7, #6]
|
||
8002452: 79fb ldrb r3, [r7, #7]
|
||
8002454: 683a ldr r2, [r7, #0]
|
||
8002456: 4618 mov r0, r3
|
||
8002458: f002 fe86 bl 8005168 <SD_disk_ioctl>
|
||
800245c: 4603 mov r3, r0
|
||
800245e: 73fb strb r3, [r7, #15]
|
||
return res;
|
||
8002460: 7bfb ldrb r3, [r7, #15]
|
||
/* USER CODE END IOCTL */
|
||
}
|
||
8002462: 4618 mov r0, r3
|
||
8002464: 3710 adds r7, #16
|
||
8002466: 46bd mov sp, r7
|
||
8002468: bd80 pop {r7, pc}
|
||
...
|
||
|
||
0800246c <disk_status>:
|
||
* @retval DSTATUS: Operation status
|
||
*/
|
||
DSTATUS disk_status (
|
||
BYTE pdrv /* Physical drive nmuber to identify the drive */
|
||
)
|
||
{
|
||
800246c: b580 push {r7, lr}
|
||
800246e: b084 sub sp, #16
|
||
8002470: af00 add r7, sp, #0
|
||
8002472: 4603 mov r3, r0
|
||
8002474: 71fb strb r3, [r7, #7]
|
||
DSTATUS stat;
|
||
|
||
stat = disk.drv[pdrv]->disk_status(disk.lun[pdrv]);
|
||
8002476: 79fb ldrb r3, [r7, #7]
|
||
8002478: 4a08 ldr r2, [pc, #32] ; (800249c <disk_status+0x30>)
|
||
800247a: 009b lsls r3, r3, #2
|
||
800247c: 4413 add r3, r2
|
||
800247e: 685b ldr r3, [r3, #4]
|
||
8002480: 685b ldr r3, [r3, #4]
|
||
8002482: 79fa ldrb r2, [r7, #7]
|
||
8002484: 4905 ldr r1, [pc, #20] ; (800249c <disk_status+0x30>)
|
||
8002486: 440a add r2, r1
|
||
8002488: 7a12 ldrb r2, [r2, #8]
|
||
800248a: 4610 mov r0, r2
|
||
800248c: 4798 blx r3
|
||
800248e: 4603 mov r3, r0
|
||
8002490: 73fb strb r3, [r7, #15]
|
||
return stat;
|
||
8002492: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
8002494: 4618 mov r0, r3
|
||
8002496: 3710 adds r7, #16
|
||
8002498: 46bd mov sp, r7
|
||
800249a: bd80 pop {r7, pc}
|
||
800249c: 200000cc .word 0x200000cc
|
||
|
||
080024a0 <disk_initialize>:
|
||
* @retval DSTATUS: Operation status
|
||
*/
|
||
DSTATUS disk_initialize (
|
||
BYTE pdrv /* Physical drive nmuber to identify the drive */
|
||
)
|
||
{
|
||
80024a0: b580 push {r7, lr}
|
||
80024a2: b084 sub sp, #16
|
||
80024a4: af00 add r7, sp, #0
|
||
80024a6: 4603 mov r3, r0
|
||
80024a8: 71fb strb r3, [r7, #7]
|
||
DSTATUS stat = RES_OK;
|
||
80024aa: 2300 movs r3, #0
|
||
80024ac: 73fb strb r3, [r7, #15]
|
||
|
||
if(disk.is_initialized[pdrv] == 0)
|
||
80024ae: 79fb ldrb r3, [r7, #7]
|
||
80024b0: 4a0d ldr r2, [pc, #52] ; (80024e8 <disk_initialize+0x48>)
|
||
80024b2: 5cd3 ldrb r3, [r2, r3]
|
||
80024b4: 2b00 cmp r3, #0
|
||
80024b6: d111 bne.n 80024dc <disk_initialize+0x3c>
|
||
{
|
||
disk.is_initialized[pdrv] = 1;
|
||
80024b8: 79fb ldrb r3, [r7, #7]
|
||
80024ba: 4a0b ldr r2, [pc, #44] ; (80024e8 <disk_initialize+0x48>)
|
||
80024bc: 2101 movs r1, #1
|
||
80024be: 54d1 strb r1, [r2, r3]
|
||
stat = disk.drv[pdrv]->disk_initialize(disk.lun[pdrv]);
|
||
80024c0: 79fb ldrb r3, [r7, #7]
|
||
80024c2: 4a09 ldr r2, [pc, #36] ; (80024e8 <disk_initialize+0x48>)
|
||
80024c4: 009b lsls r3, r3, #2
|
||
80024c6: 4413 add r3, r2
|
||
80024c8: 685b ldr r3, [r3, #4]
|
||
80024ca: 681b ldr r3, [r3, #0]
|
||
80024cc: 79fa ldrb r2, [r7, #7]
|
||
80024ce: 4906 ldr r1, [pc, #24] ; (80024e8 <disk_initialize+0x48>)
|
||
80024d0: 440a add r2, r1
|
||
80024d2: 7a12 ldrb r2, [r2, #8]
|
||
80024d4: 4610 mov r0, r2
|
||
80024d6: 4798 blx r3
|
||
80024d8: 4603 mov r3, r0
|
||
80024da: 73fb strb r3, [r7, #15]
|
||
}
|
||
return stat;
|
||
80024dc: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
80024de: 4618 mov r0, r3
|
||
80024e0: 3710 adds r7, #16
|
||
80024e2: 46bd mov sp, r7
|
||
80024e4: bd80 pop {r7, pc}
|
||
80024e6: bf00 nop
|
||
80024e8: 200000cc .word 0x200000cc
|
||
|
||
080024ec <disk_read>:
|
||
BYTE pdrv, /* Physical drive nmuber to identify the drive */
|
||
BYTE *buff, /* Data buffer to store read data */
|
||
DWORD sector, /* Sector address in LBA */
|
||
UINT count /* Number of sectors to read */
|
||
)
|
||
{
|
||
80024ec: b590 push {r4, r7, lr}
|
||
80024ee: b087 sub sp, #28
|
||
80024f0: af00 add r7, sp, #0
|
||
80024f2: 60b9 str r1, [r7, #8]
|
||
80024f4: 607a str r2, [r7, #4]
|
||
80024f6: 603b str r3, [r7, #0]
|
||
80024f8: 4603 mov r3, r0
|
||
80024fa: 73fb strb r3, [r7, #15]
|
||
DRESULT res;
|
||
|
||
res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count);
|
||
80024fc: 7bfb ldrb r3, [r7, #15]
|
||
80024fe: 4a0a ldr r2, [pc, #40] ; (8002528 <disk_read+0x3c>)
|
||
8002500: 009b lsls r3, r3, #2
|
||
8002502: 4413 add r3, r2
|
||
8002504: 685b ldr r3, [r3, #4]
|
||
8002506: 689c ldr r4, [r3, #8]
|
||
8002508: 7bfb ldrb r3, [r7, #15]
|
||
800250a: 4a07 ldr r2, [pc, #28] ; (8002528 <disk_read+0x3c>)
|
||
800250c: 4413 add r3, r2
|
||
800250e: 7a18 ldrb r0, [r3, #8]
|
||
8002510: 683b ldr r3, [r7, #0]
|
||
8002512: 687a ldr r2, [r7, #4]
|
||
8002514: 68b9 ldr r1, [r7, #8]
|
||
8002516: 47a0 blx r4
|
||
8002518: 4603 mov r3, r0
|
||
800251a: 75fb strb r3, [r7, #23]
|
||
return res;
|
||
800251c: 7dfb ldrb r3, [r7, #23]
|
||
}
|
||
800251e: 4618 mov r0, r3
|
||
8002520: 371c adds r7, #28
|
||
8002522: 46bd mov sp, r7
|
||
8002524: bd90 pop {r4, r7, pc}
|
||
8002526: bf00 nop
|
||
8002528: 200000cc .word 0x200000cc
|
||
|
||
0800252c <disk_write>:
|
||
BYTE pdrv, /* Physical drive nmuber to identify the drive */
|
||
const BYTE *buff, /* Data to be written */
|
||
DWORD sector, /* Sector address in LBA */
|
||
UINT count /* Number of sectors to write */
|
||
)
|
||
{
|
||
800252c: b590 push {r4, r7, lr}
|
||
800252e: b087 sub sp, #28
|
||
8002530: af00 add r7, sp, #0
|
||
8002532: 60b9 str r1, [r7, #8]
|
||
8002534: 607a str r2, [r7, #4]
|
||
8002536: 603b str r3, [r7, #0]
|
||
8002538: 4603 mov r3, r0
|
||
800253a: 73fb strb r3, [r7, #15]
|
||
DRESULT res;
|
||
|
||
res = disk.drv[pdrv]->disk_write(disk.lun[pdrv], buff, sector, count);
|
||
800253c: 7bfb ldrb r3, [r7, #15]
|
||
800253e: 4a0a ldr r2, [pc, #40] ; (8002568 <disk_write+0x3c>)
|
||
8002540: 009b lsls r3, r3, #2
|
||
8002542: 4413 add r3, r2
|
||
8002544: 685b ldr r3, [r3, #4]
|
||
8002546: 68dc ldr r4, [r3, #12]
|
||
8002548: 7bfb ldrb r3, [r7, #15]
|
||
800254a: 4a07 ldr r2, [pc, #28] ; (8002568 <disk_write+0x3c>)
|
||
800254c: 4413 add r3, r2
|
||
800254e: 7a18 ldrb r0, [r3, #8]
|
||
8002550: 683b ldr r3, [r7, #0]
|
||
8002552: 687a ldr r2, [r7, #4]
|
||
8002554: 68b9 ldr r1, [r7, #8]
|
||
8002556: 47a0 blx r4
|
||
8002558: 4603 mov r3, r0
|
||
800255a: 75fb strb r3, [r7, #23]
|
||
return res;
|
||
800255c: 7dfb ldrb r3, [r7, #23]
|
||
}
|
||
800255e: 4618 mov r0, r3
|
||
8002560: 371c adds r7, #28
|
||
8002562: 46bd mov sp, r7
|
||
8002564: bd90 pop {r4, r7, pc}
|
||
8002566: bf00 nop
|
||
8002568: 200000cc .word 0x200000cc
|
||
|
||
0800256c <mem_cpy>:
|
||
/* String functions */
|
||
/*-----------------------------------------------------------------------*/
|
||
|
||
/* Copy memory to memory */
|
||
static
|
||
void mem_cpy (void* dst, const void* src, UINT cnt) {
|
||
800256c: b480 push {r7}
|
||
800256e: b087 sub sp, #28
|
||
8002570: af00 add r7, sp, #0
|
||
8002572: 60f8 str r0, [r7, #12]
|
||
8002574: 60b9 str r1, [r7, #8]
|
||
8002576: 607a str r2, [r7, #4]
|
||
BYTE *d = (BYTE*)dst;
|
||
8002578: 68fb ldr r3, [r7, #12]
|
||
800257a: 617b str r3, [r7, #20]
|
||
const BYTE *s = (const BYTE*)src;
|
||
800257c: 68bb ldr r3, [r7, #8]
|
||
800257e: 613b str r3, [r7, #16]
|
||
*(int*)d = *(int*)s;
|
||
d += sizeof (int); s += sizeof (int);
|
||
cnt -= sizeof (int);
|
||
}
|
||
#endif
|
||
while (cnt--)
|
||
8002580: e007 b.n 8002592 <mem_cpy+0x26>
|
||
*d++ = *s++;
|
||
8002582: 693a ldr r2, [r7, #16]
|
||
8002584: 1c53 adds r3, r2, #1
|
||
8002586: 613b str r3, [r7, #16]
|
||
8002588: 697b ldr r3, [r7, #20]
|
||
800258a: 1c59 adds r1, r3, #1
|
||
800258c: 6179 str r1, [r7, #20]
|
||
800258e: 7812 ldrb r2, [r2, #0]
|
||
8002590: 701a strb r2, [r3, #0]
|
||
while (cnt--)
|
||
8002592: 687b ldr r3, [r7, #4]
|
||
8002594: 1e5a subs r2, r3, #1
|
||
8002596: 607a str r2, [r7, #4]
|
||
8002598: 2b00 cmp r3, #0
|
||
800259a: d1f2 bne.n 8002582 <mem_cpy+0x16>
|
||
}
|
||
800259c: bf00 nop
|
||
800259e: bf00 nop
|
||
80025a0: 371c adds r7, #28
|
||
80025a2: 46bd mov sp, r7
|
||
80025a4: bc80 pop {r7}
|
||
80025a6: 4770 bx lr
|
||
|
||
080025a8 <mem_set>:
|
||
|
||
/* Fill memory */
|
||
static
|
||
void mem_set (void* dst, int val, UINT cnt) {
|
||
80025a8: b480 push {r7}
|
||
80025aa: b087 sub sp, #28
|
||
80025ac: af00 add r7, sp, #0
|
||
80025ae: 60f8 str r0, [r7, #12]
|
||
80025b0: 60b9 str r1, [r7, #8]
|
||
80025b2: 607a str r2, [r7, #4]
|
||
BYTE *d = (BYTE*)dst;
|
||
80025b4: 68fb ldr r3, [r7, #12]
|
||
80025b6: 617b str r3, [r7, #20]
|
||
|
||
while (cnt--)
|
||
80025b8: e005 b.n 80025c6 <mem_set+0x1e>
|
||
*d++ = (BYTE)val;
|
||
80025ba: 697b ldr r3, [r7, #20]
|
||
80025bc: 1c5a adds r2, r3, #1
|
||
80025be: 617a str r2, [r7, #20]
|
||
80025c0: 68ba ldr r2, [r7, #8]
|
||
80025c2: b2d2 uxtb r2, r2
|
||
80025c4: 701a strb r2, [r3, #0]
|
||
while (cnt--)
|
||
80025c6: 687b ldr r3, [r7, #4]
|
||
80025c8: 1e5a subs r2, r3, #1
|
||
80025ca: 607a str r2, [r7, #4]
|
||
80025cc: 2b00 cmp r3, #0
|
||
80025ce: d1f4 bne.n 80025ba <mem_set+0x12>
|
||
}
|
||
80025d0: bf00 nop
|
||
80025d2: bf00 nop
|
||
80025d4: 371c adds r7, #28
|
||
80025d6: 46bd mov sp, r7
|
||
80025d8: bc80 pop {r7}
|
||
80025da: 4770 bx lr
|
||
|
||
080025dc <mem_cmp>:
|
||
|
||
/* Compare memory to memory */
|
||
static
|
||
int mem_cmp (const void* dst, const void* src, UINT cnt) {
|
||
80025dc: b480 push {r7}
|
||
80025de: b089 sub sp, #36 ; 0x24
|
||
80025e0: af00 add r7, sp, #0
|
||
80025e2: 60f8 str r0, [r7, #12]
|
||
80025e4: 60b9 str r1, [r7, #8]
|
||
80025e6: 607a str r2, [r7, #4]
|
||
const BYTE *d = (const BYTE *)dst, *s = (const BYTE *)src;
|
||
80025e8: 68fb ldr r3, [r7, #12]
|
||
80025ea: 61fb str r3, [r7, #28]
|
||
80025ec: 68bb ldr r3, [r7, #8]
|
||
80025ee: 61bb str r3, [r7, #24]
|
||
int r = 0;
|
||
80025f0: 2300 movs r3, #0
|
||
80025f2: 617b str r3, [r7, #20]
|
||
|
||
while (cnt-- && (r = *d++ - *s++) == 0) ;
|
||
80025f4: bf00 nop
|
||
80025f6: 687b ldr r3, [r7, #4]
|
||
80025f8: 1e5a subs r2, r3, #1
|
||
80025fa: 607a str r2, [r7, #4]
|
||
80025fc: 2b00 cmp r3, #0
|
||
80025fe: d00d beq.n 800261c <mem_cmp+0x40>
|
||
8002600: 69fb ldr r3, [r7, #28]
|
||
8002602: 1c5a adds r2, r3, #1
|
||
8002604: 61fa str r2, [r7, #28]
|
||
8002606: 781b ldrb r3, [r3, #0]
|
||
8002608: 4619 mov r1, r3
|
||
800260a: 69bb ldr r3, [r7, #24]
|
||
800260c: 1c5a adds r2, r3, #1
|
||
800260e: 61ba str r2, [r7, #24]
|
||
8002610: 781b ldrb r3, [r3, #0]
|
||
8002612: 1acb subs r3, r1, r3
|
||
8002614: 617b str r3, [r7, #20]
|
||
8002616: 697b ldr r3, [r7, #20]
|
||
8002618: 2b00 cmp r3, #0
|
||
800261a: d0ec beq.n 80025f6 <mem_cmp+0x1a>
|
||
return r;
|
||
800261c: 697b ldr r3, [r7, #20]
|
||
}
|
||
800261e: 4618 mov r0, r3
|
||
8002620: 3724 adds r7, #36 ; 0x24
|
||
8002622: 46bd mov sp, r7
|
||
8002624: bc80 pop {r7}
|
||
8002626: 4770 bx lr
|
||
|
||
08002628 <chk_chr>:
|
||
|
||
/* Check if chr is contained in the string */
|
||
static
|
||
int chk_chr (const char* str, int chr) {
|
||
8002628: b480 push {r7}
|
||
800262a: b083 sub sp, #12
|
||
800262c: af00 add r7, sp, #0
|
||
800262e: 6078 str r0, [r7, #4]
|
||
8002630: 6039 str r1, [r7, #0]
|
||
while (*str && *str != chr) str++;
|
||
8002632: e002 b.n 800263a <chk_chr+0x12>
|
||
8002634: 687b ldr r3, [r7, #4]
|
||
8002636: 3301 adds r3, #1
|
||
8002638: 607b str r3, [r7, #4]
|
||
800263a: 687b ldr r3, [r7, #4]
|
||
800263c: 781b ldrb r3, [r3, #0]
|
||
800263e: 2b00 cmp r3, #0
|
||
8002640: d005 beq.n 800264e <chk_chr+0x26>
|
||
8002642: 687b ldr r3, [r7, #4]
|
||
8002644: 781b ldrb r3, [r3, #0]
|
||
8002646: 461a mov r2, r3
|
||
8002648: 683b ldr r3, [r7, #0]
|
||
800264a: 4293 cmp r3, r2
|
||
800264c: d1f2 bne.n 8002634 <chk_chr+0xc>
|
||
return *str;
|
||
800264e: 687b ldr r3, [r7, #4]
|
||
8002650: 781b ldrb r3, [r3, #0]
|
||
}
|
||
8002652: 4618 mov r0, r3
|
||
8002654: 370c adds r7, #12
|
||
8002656: 46bd mov sp, r7
|
||
8002658: bc80 pop {r7}
|
||
800265a: 4770 bx lr
|
||
|
||
0800265c <chk_lock>:
|
||
static
|
||
FRESULT chk_lock ( /* Check if the file can be accessed */
|
||
DIR* dp, /* Directory object pointing the file to be checked */
|
||
int acc /* Desired access type (0:Read, 1:Write, 2:Delete/Rename) */
|
||
)
|
||
{
|
||
800265c: b480 push {r7}
|
||
800265e: b085 sub sp, #20
|
||
8002660: af00 add r7, sp, #0
|
||
8002662: 6078 str r0, [r7, #4]
|
||
8002664: 6039 str r1, [r7, #0]
|
||
UINT i, be;
|
||
|
||
/* Search file semaphore table */
|
||
for (i = be = 0; i < _FS_LOCK; i++) {
|
||
8002666: 2300 movs r3, #0
|
||
8002668: 60bb str r3, [r7, #8]
|
||
800266a: 68bb ldr r3, [r7, #8]
|
||
800266c: 60fb str r3, [r7, #12]
|
||
800266e: e038 b.n 80026e2 <chk_lock+0x86>
|
||
if (Files[i].fs) { /* Existing entry */
|
||
8002670: 492f ldr r1, [pc, #188] ; (8002730 <chk_lock+0xd4>)
|
||
8002672: 68fa ldr r2, [r7, #12]
|
||
8002674: 4613 mov r3, r2
|
||
8002676: 005b lsls r3, r3, #1
|
||
8002678: 4413 add r3, r2
|
||
800267a: 009b lsls r3, r3, #2
|
||
800267c: 440b add r3, r1
|
||
800267e: 681b ldr r3, [r3, #0]
|
||
8002680: 2b00 cmp r3, #0
|
||
8002682: d029 beq.n 80026d8 <chk_lock+0x7c>
|
||
if (Files[i].fs == dp->fs && /* Check if the object matched with an open object */
|
||
8002684: 492a ldr r1, [pc, #168] ; (8002730 <chk_lock+0xd4>)
|
||
8002686: 68fa ldr r2, [r7, #12]
|
||
8002688: 4613 mov r3, r2
|
||
800268a: 005b lsls r3, r3, #1
|
||
800268c: 4413 add r3, r2
|
||
800268e: 009b lsls r3, r3, #2
|
||
8002690: 440b add r3, r1
|
||
8002692: 681a ldr r2, [r3, #0]
|
||
8002694: 687b ldr r3, [r7, #4]
|
||
8002696: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800269a: 429a cmp r2, r3
|
||
800269c: d11e bne.n 80026dc <chk_lock+0x80>
|
||
Files[i].clu == dp->sclust &&
|
||
800269e: 4924 ldr r1, [pc, #144] ; (8002730 <chk_lock+0xd4>)
|
||
80026a0: 68fa ldr r2, [r7, #12]
|
||
80026a2: 4613 mov r3, r2
|
||
80026a4: 005b lsls r3, r3, #1
|
||
80026a6: 4413 add r3, r2
|
||
80026a8: 009b lsls r3, r3, #2
|
||
80026aa: 440b add r3, r1
|
||
80026ac: 3304 adds r3, #4
|
||
80026ae: 681a ldr r2, [r3, #0]
|
||
80026b0: 687b ldr r3, [r7, #4]
|
||
80026b2: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
if (Files[i].fs == dp->fs && /* Check if the object matched with an open object */
|
||
80026b6: 429a cmp r2, r3
|
||
80026b8: d110 bne.n 80026dc <chk_lock+0x80>
|
||
Files[i].idx == dp->index) break;
|
||
80026ba: 491d ldr r1, [pc, #116] ; (8002730 <chk_lock+0xd4>)
|
||
80026bc: 68fa ldr r2, [r7, #12]
|
||
80026be: 4613 mov r3, r2
|
||
80026c0: 005b lsls r3, r3, #1
|
||
80026c2: 4413 add r3, r2
|
||
80026c4: 009b lsls r3, r3, #2
|
||
80026c6: 440b add r3, r1
|
||
80026c8: 3308 adds r3, #8
|
||
80026ca: 881a ldrh r2, [r3, #0]
|
||
80026cc: 687b ldr r3, [r7, #4]
|
||
80026ce: f8b3 3206 ldrh.w r3, [r3, #518] ; 0x206
|
||
Files[i].clu == dp->sclust &&
|
||
80026d2: 429a cmp r2, r3
|
||
80026d4: d102 bne.n 80026dc <chk_lock+0x80>
|
||
Files[i].idx == dp->index) break;
|
||
80026d6: e007 b.n 80026e8 <chk_lock+0x8c>
|
||
} else { /* Blank entry */
|
||
be = 1;
|
||
80026d8: 2301 movs r3, #1
|
||
80026da: 60bb str r3, [r7, #8]
|
||
for (i = be = 0; i < _FS_LOCK; i++) {
|
||
80026dc: 68fb ldr r3, [r7, #12]
|
||
80026de: 3301 adds r3, #1
|
||
80026e0: 60fb str r3, [r7, #12]
|
||
80026e2: 68fb ldr r3, [r7, #12]
|
||
80026e4: 2b01 cmp r3, #1
|
||
80026e6: d9c3 bls.n 8002670 <chk_lock+0x14>
|
||
}
|
||
}
|
||
if (i == _FS_LOCK) /* The object is not opened */
|
||
80026e8: 68fb ldr r3, [r7, #12]
|
||
80026ea: 2b02 cmp r3, #2
|
||
80026ec: d109 bne.n 8002702 <chk_lock+0xa6>
|
||
return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES; /* Is there a blank entry for new object? */
|
||
80026ee: 68bb ldr r3, [r7, #8]
|
||
80026f0: 2b00 cmp r3, #0
|
||
80026f2: d102 bne.n 80026fa <chk_lock+0x9e>
|
||
80026f4: 683b ldr r3, [r7, #0]
|
||
80026f6: 2b02 cmp r3, #2
|
||
80026f8: d101 bne.n 80026fe <chk_lock+0xa2>
|
||
80026fa: 2300 movs r3, #0
|
||
80026fc: e013 b.n 8002726 <chk_lock+0xca>
|
||
80026fe: 2312 movs r3, #18
|
||
8002700: e011 b.n 8002726 <chk_lock+0xca>
|
||
|
||
/* The object has been opened. Reject any open against writing file and all write mode open */
|
||
return (acc || Files[i].ctr == 0x100) ? FR_LOCKED : FR_OK;
|
||
8002702: 683b ldr r3, [r7, #0]
|
||
8002704: 2b00 cmp r3, #0
|
||
8002706: d10b bne.n 8002720 <chk_lock+0xc4>
|
||
8002708: 4909 ldr r1, [pc, #36] ; (8002730 <chk_lock+0xd4>)
|
||
800270a: 68fa ldr r2, [r7, #12]
|
||
800270c: 4613 mov r3, r2
|
||
800270e: 005b lsls r3, r3, #1
|
||
8002710: 4413 add r3, r2
|
||
8002712: 009b lsls r3, r3, #2
|
||
8002714: 440b add r3, r1
|
||
8002716: 330a adds r3, #10
|
||
8002718: 881b ldrh r3, [r3, #0]
|
||
800271a: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
800271e: d101 bne.n 8002724 <chk_lock+0xc8>
|
||
8002720: 2310 movs r3, #16
|
||
8002722: e000 b.n 8002726 <chk_lock+0xca>
|
||
8002724: 2300 movs r3, #0
|
||
}
|
||
8002726: 4618 mov r0, r3
|
||
8002728: 3714 adds r7, #20
|
||
800272a: 46bd mov sp, r7
|
||
800272c: bc80 pop {r7}
|
||
800272e: 4770 bx lr
|
||
8002730: 200000b4 .word 0x200000b4
|
||
|
||
08002734 <enq_lock>:
|
||
|
||
|
||
static
|
||
int enq_lock (void) /* Check if an entry is available for a new object */
|
||
{
|
||
8002734: b480 push {r7}
|
||
8002736: b083 sub sp, #12
|
||
8002738: af00 add r7, sp, #0
|
||
UINT i;
|
||
|
||
for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;
|
||
800273a: 2300 movs r3, #0
|
||
800273c: 607b str r3, [r7, #4]
|
||
800273e: e002 b.n 8002746 <enq_lock+0x12>
|
||
8002740: 687b ldr r3, [r7, #4]
|
||
8002742: 3301 adds r3, #1
|
||
8002744: 607b str r3, [r7, #4]
|
||
8002746: 687b ldr r3, [r7, #4]
|
||
8002748: 2b01 cmp r3, #1
|
||
800274a: d809 bhi.n 8002760 <enq_lock+0x2c>
|
||
800274c: 490a ldr r1, [pc, #40] ; (8002778 <enq_lock+0x44>)
|
||
800274e: 687a ldr r2, [r7, #4]
|
||
8002750: 4613 mov r3, r2
|
||
8002752: 005b lsls r3, r3, #1
|
||
8002754: 4413 add r3, r2
|
||
8002756: 009b lsls r3, r3, #2
|
||
8002758: 440b add r3, r1
|
||
800275a: 681b ldr r3, [r3, #0]
|
||
800275c: 2b00 cmp r3, #0
|
||
800275e: d1ef bne.n 8002740 <enq_lock+0xc>
|
||
return (i == _FS_LOCK) ? 0 : 1;
|
||
8002760: 687b ldr r3, [r7, #4]
|
||
8002762: 2b02 cmp r3, #2
|
||
8002764: bf14 ite ne
|
||
8002766: 2301 movne r3, #1
|
||
8002768: 2300 moveq r3, #0
|
||
800276a: b2db uxtb r3, r3
|
||
}
|
||
800276c: 4618 mov r0, r3
|
||
800276e: 370c adds r7, #12
|
||
8002770: 46bd mov sp, r7
|
||
8002772: bc80 pop {r7}
|
||
8002774: 4770 bx lr
|
||
8002776: bf00 nop
|
||
8002778: 200000b4 .word 0x200000b4
|
||
|
||
0800277c <inc_lock>:
|
||
static
|
||
UINT inc_lock ( /* Increment object open counter and returns its index (0:Internal error) */
|
||
DIR* dp, /* Directory object pointing the file to register or increment */
|
||
int acc /* Desired access (0:Read, 1:Write, 2:Delete/Rename) */
|
||
)
|
||
{
|
||
800277c: b480 push {r7}
|
||
800277e: b085 sub sp, #20
|
||
8002780: af00 add r7, sp, #0
|
||
8002782: 6078 str r0, [r7, #4]
|
||
8002784: 6039 str r1, [r7, #0]
|
||
UINT i;
|
||
|
||
|
||
for (i = 0; i < _FS_LOCK; i++) { /* Find the object */
|
||
8002786: 2300 movs r3, #0
|
||
8002788: 60fb str r3, [r7, #12]
|
||
800278a: e02b b.n 80027e4 <inc_lock+0x68>
|
||
if (Files[i].fs == dp->fs &&
|
||
800278c: 4955 ldr r1, [pc, #340] ; (80028e4 <inc_lock+0x168>)
|
||
800278e: 68fa ldr r2, [r7, #12]
|
||
8002790: 4613 mov r3, r2
|
||
8002792: 005b lsls r3, r3, #1
|
||
8002794: 4413 add r3, r2
|
||
8002796: 009b lsls r3, r3, #2
|
||
8002798: 440b add r3, r1
|
||
800279a: 681a ldr r2, [r3, #0]
|
||
800279c: 687b ldr r3, [r7, #4]
|
||
800279e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80027a2: 429a cmp r2, r3
|
||
80027a4: d11b bne.n 80027de <inc_lock+0x62>
|
||
Files[i].clu == dp->sclust &&
|
||
80027a6: 494f ldr r1, [pc, #316] ; (80028e4 <inc_lock+0x168>)
|
||
80027a8: 68fa ldr r2, [r7, #12]
|
||
80027aa: 4613 mov r3, r2
|
||
80027ac: 005b lsls r3, r3, #1
|
||
80027ae: 4413 add r3, r2
|
||
80027b0: 009b lsls r3, r3, #2
|
||
80027b2: 440b add r3, r1
|
||
80027b4: 3304 adds r3, #4
|
||
80027b6: 681a ldr r2, [r3, #0]
|
||
80027b8: 687b ldr r3, [r7, #4]
|
||
80027ba: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
if (Files[i].fs == dp->fs &&
|
||
80027be: 429a cmp r2, r3
|
||
80027c0: d10d bne.n 80027de <inc_lock+0x62>
|
||
Files[i].idx == dp->index) break;
|
||
80027c2: 4948 ldr r1, [pc, #288] ; (80028e4 <inc_lock+0x168>)
|
||
80027c4: 68fa ldr r2, [r7, #12]
|
||
80027c6: 4613 mov r3, r2
|
||
80027c8: 005b lsls r3, r3, #1
|
||
80027ca: 4413 add r3, r2
|
||
80027cc: 009b lsls r3, r3, #2
|
||
80027ce: 440b add r3, r1
|
||
80027d0: 3308 adds r3, #8
|
||
80027d2: 881a ldrh r2, [r3, #0]
|
||
80027d4: 687b ldr r3, [r7, #4]
|
||
80027d6: f8b3 3206 ldrh.w r3, [r3, #518] ; 0x206
|
||
Files[i].clu == dp->sclust &&
|
||
80027da: 429a cmp r2, r3
|
||
80027dc: d006 beq.n 80027ec <inc_lock+0x70>
|
||
for (i = 0; i < _FS_LOCK; i++) { /* Find the object */
|
||
80027de: 68fb ldr r3, [r7, #12]
|
||
80027e0: 3301 adds r3, #1
|
||
80027e2: 60fb str r3, [r7, #12]
|
||
80027e4: 68fb ldr r3, [r7, #12]
|
||
80027e6: 2b01 cmp r3, #1
|
||
80027e8: d9d0 bls.n 800278c <inc_lock+0x10>
|
||
80027ea: e000 b.n 80027ee <inc_lock+0x72>
|
||
Files[i].idx == dp->index) break;
|
||
80027ec: bf00 nop
|
||
}
|
||
|
||
if (i == _FS_LOCK) { /* Not opened. Register it as new. */
|
||
80027ee: 68fb ldr r3, [r7, #12]
|
||
80027f0: 2b02 cmp r3, #2
|
||
80027f2: d145 bne.n 8002880 <inc_lock+0x104>
|
||
for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;
|
||
80027f4: 2300 movs r3, #0
|
||
80027f6: 60fb str r3, [r7, #12]
|
||
80027f8: e002 b.n 8002800 <inc_lock+0x84>
|
||
80027fa: 68fb ldr r3, [r7, #12]
|
||
80027fc: 3301 adds r3, #1
|
||
80027fe: 60fb str r3, [r7, #12]
|
||
8002800: 68fb ldr r3, [r7, #12]
|
||
8002802: 2b01 cmp r3, #1
|
||
8002804: d809 bhi.n 800281a <inc_lock+0x9e>
|
||
8002806: 4937 ldr r1, [pc, #220] ; (80028e4 <inc_lock+0x168>)
|
||
8002808: 68fa ldr r2, [r7, #12]
|
||
800280a: 4613 mov r3, r2
|
||
800280c: 005b lsls r3, r3, #1
|
||
800280e: 4413 add r3, r2
|
||
8002810: 009b lsls r3, r3, #2
|
||
8002812: 440b add r3, r1
|
||
8002814: 681b ldr r3, [r3, #0]
|
||
8002816: 2b00 cmp r3, #0
|
||
8002818: d1ef bne.n 80027fa <inc_lock+0x7e>
|
||
if (i == _FS_LOCK) return 0; /* No free entry to register (int err) */
|
||
800281a: 68fb ldr r3, [r7, #12]
|
||
800281c: 2b02 cmp r3, #2
|
||
800281e: d101 bne.n 8002824 <inc_lock+0xa8>
|
||
8002820: 2300 movs r3, #0
|
||
8002822: e05a b.n 80028da <inc_lock+0x15e>
|
||
Files[i].fs = dp->fs;
|
||
8002824: 687b ldr r3, [r7, #4]
|
||
8002826: f8d3 1200 ldr.w r1, [r3, #512] ; 0x200
|
||
800282a: 482e ldr r0, [pc, #184] ; (80028e4 <inc_lock+0x168>)
|
||
800282c: 68fa ldr r2, [r7, #12]
|
||
800282e: 4613 mov r3, r2
|
||
8002830: 005b lsls r3, r3, #1
|
||
8002832: 4413 add r3, r2
|
||
8002834: 009b lsls r3, r3, #2
|
||
8002836: 4403 add r3, r0
|
||
8002838: 6019 str r1, [r3, #0]
|
||
Files[i].clu = dp->sclust;
|
||
800283a: 687b ldr r3, [r7, #4]
|
||
800283c: f8d3 1208 ldr.w r1, [r3, #520] ; 0x208
|
||
8002840: 4828 ldr r0, [pc, #160] ; (80028e4 <inc_lock+0x168>)
|
||
8002842: 68fa ldr r2, [r7, #12]
|
||
8002844: 4613 mov r3, r2
|
||
8002846: 005b lsls r3, r3, #1
|
||
8002848: 4413 add r3, r2
|
||
800284a: 009b lsls r3, r3, #2
|
||
800284c: 4403 add r3, r0
|
||
800284e: 3304 adds r3, #4
|
||
8002850: 6019 str r1, [r3, #0]
|
||
Files[i].idx = dp->index;
|
||
8002852: 687b ldr r3, [r7, #4]
|
||
8002854: f8b3 0206 ldrh.w r0, [r3, #518] ; 0x206
|
||
8002858: 4922 ldr r1, [pc, #136] ; (80028e4 <inc_lock+0x168>)
|
||
800285a: 68fa ldr r2, [r7, #12]
|
||
800285c: 4613 mov r3, r2
|
||
800285e: 005b lsls r3, r3, #1
|
||
8002860: 4413 add r3, r2
|
||
8002862: 009b lsls r3, r3, #2
|
||
8002864: 440b add r3, r1
|
||
8002866: 3308 adds r3, #8
|
||
8002868: 4602 mov r2, r0
|
||
800286a: 801a strh r2, [r3, #0]
|
||
Files[i].ctr = 0;
|
||
800286c: 491d ldr r1, [pc, #116] ; (80028e4 <inc_lock+0x168>)
|
||
800286e: 68fa ldr r2, [r7, #12]
|
||
8002870: 4613 mov r3, r2
|
||
8002872: 005b lsls r3, r3, #1
|
||
8002874: 4413 add r3, r2
|
||
8002876: 009b lsls r3, r3, #2
|
||
8002878: 440b add r3, r1
|
||
800287a: 330a adds r3, #10
|
||
800287c: 2200 movs r2, #0
|
||
800287e: 801a strh r2, [r3, #0]
|
||
}
|
||
|
||
if (acc && Files[i].ctr) return 0; /* Access violation (int err) */
|
||
8002880: 683b ldr r3, [r7, #0]
|
||
8002882: 2b00 cmp r3, #0
|
||
8002884: d00c beq.n 80028a0 <inc_lock+0x124>
|
||
8002886: 4917 ldr r1, [pc, #92] ; (80028e4 <inc_lock+0x168>)
|
||
8002888: 68fa ldr r2, [r7, #12]
|
||
800288a: 4613 mov r3, r2
|
||
800288c: 005b lsls r3, r3, #1
|
||
800288e: 4413 add r3, r2
|
||
8002890: 009b lsls r3, r3, #2
|
||
8002892: 440b add r3, r1
|
||
8002894: 330a adds r3, #10
|
||
8002896: 881b ldrh r3, [r3, #0]
|
||
8002898: 2b00 cmp r3, #0
|
||
800289a: d001 beq.n 80028a0 <inc_lock+0x124>
|
||
800289c: 2300 movs r3, #0
|
||
800289e: e01c b.n 80028da <inc_lock+0x15e>
|
||
|
||
Files[i].ctr = acc ? 0x100 : Files[i].ctr + 1; /* Set semaphore value */
|
||
80028a0: 683b ldr r3, [r7, #0]
|
||
80028a2: 2b00 cmp r3, #0
|
||
80028a4: d10b bne.n 80028be <inc_lock+0x142>
|
||
80028a6: 490f ldr r1, [pc, #60] ; (80028e4 <inc_lock+0x168>)
|
||
80028a8: 68fa ldr r2, [r7, #12]
|
||
80028aa: 4613 mov r3, r2
|
||
80028ac: 005b lsls r3, r3, #1
|
||
80028ae: 4413 add r3, r2
|
||
80028b0: 009b lsls r3, r3, #2
|
||
80028b2: 440b add r3, r1
|
||
80028b4: 330a adds r3, #10
|
||
80028b6: 881b ldrh r3, [r3, #0]
|
||
80028b8: 3301 adds r3, #1
|
||
80028ba: b299 uxth r1, r3
|
||
80028bc: e001 b.n 80028c2 <inc_lock+0x146>
|
||
80028be: f44f 7180 mov.w r1, #256 ; 0x100
|
||
80028c2: 4808 ldr r0, [pc, #32] ; (80028e4 <inc_lock+0x168>)
|
||
80028c4: 68fa ldr r2, [r7, #12]
|
||
80028c6: 4613 mov r3, r2
|
||
80028c8: 005b lsls r3, r3, #1
|
||
80028ca: 4413 add r3, r2
|
||
80028cc: 009b lsls r3, r3, #2
|
||
80028ce: 4403 add r3, r0
|
||
80028d0: 330a adds r3, #10
|
||
80028d2: 460a mov r2, r1
|
||
80028d4: 801a strh r2, [r3, #0]
|
||
|
||
return i + 1;
|
||
80028d6: 68fb ldr r3, [r7, #12]
|
||
80028d8: 3301 adds r3, #1
|
||
}
|
||
80028da: 4618 mov r0, r3
|
||
80028dc: 3714 adds r7, #20
|
||
80028de: 46bd mov sp, r7
|
||
80028e0: bc80 pop {r7}
|
||
80028e2: 4770 bx lr
|
||
80028e4: 200000b4 .word 0x200000b4
|
||
|
||
080028e8 <clear_lock>:
|
||
|
||
static
|
||
void clear_lock ( /* Clear lock entries of the volume */
|
||
FATFS *fs
|
||
)
|
||
{
|
||
80028e8: b480 push {r7}
|
||
80028ea: b085 sub sp, #20
|
||
80028ec: af00 add r7, sp, #0
|
||
80028ee: 6078 str r0, [r7, #4]
|
||
UINT i;
|
||
|
||
for (i = 0; i < _FS_LOCK; i++) {
|
||
80028f0: 2300 movs r3, #0
|
||
80028f2: 60fb str r3, [r7, #12]
|
||
80028f4: e016 b.n 8002924 <clear_lock+0x3c>
|
||
if (Files[i].fs == fs) Files[i].fs = 0;
|
||
80028f6: 4910 ldr r1, [pc, #64] ; (8002938 <clear_lock+0x50>)
|
||
80028f8: 68fa ldr r2, [r7, #12]
|
||
80028fa: 4613 mov r3, r2
|
||
80028fc: 005b lsls r3, r3, #1
|
||
80028fe: 4413 add r3, r2
|
||
8002900: 009b lsls r3, r3, #2
|
||
8002902: 440b add r3, r1
|
||
8002904: 681b ldr r3, [r3, #0]
|
||
8002906: 687a ldr r2, [r7, #4]
|
||
8002908: 429a cmp r2, r3
|
||
800290a: d108 bne.n 800291e <clear_lock+0x36>
|
||
800290c: 490a ldr r1, [pc, #40] ; (8002938 <clear_lock+0x50>)
|
||
800290e: 68fa ldr r2, [r7, #12]
|
||
8002910: 4613 mov r3, r2
|
||
8002912: 005b lsls r3, r3, #1
|
||
8002914: 4413 add r3, r2
|
||
8002916: 009b lsls r3, r3, #2
|
||
8002918: 440b add r3, r1
|
||
800291a: 2200 movs r2, #0
|
||
800291c: 601a str r2, [r3, #0]
|
||
for (i = 0; i < _FS_LOCK; i++) {
|
||
800291e: 68fb ldr r3, [r7, #12]
|
||
8002920: 3301 adds r3, #1
|
||
8002922: 60fb str r3, [r7, #12]
|
||
8002924: 68fb ldr r3, [r7, #12]
|
||
8002926: 2b01 cmp r3, #1
|
||
8002928: d9e5 bls.n 80028f6 <clear_lock+0xe>
|
||
}
|
||
}
|
||
800292a: bf00 nop
|
||
800292c: bf00 nop
|
||
800292e: 3714 adds r7, #20
|
||
8002930: 46bd mov sp, r7
|
||
8002932: bc80 pop {r7}
|
||
8002934: 4770 bx lr
|
||
8002936: bf00 nop
|
||
8002938: 200000b4 .word 0x200000b4
|
||
|
||
0800293c <sync_window>:
|
||
#if !_FS_READONLY
|
||
static
|
||
FRESULT sync_window (
|
||
FATFS* fs /* File system object */
|
||
)
|
||
{
|
||
800293c: b580 push {r7, lr}
|
||
800293e: b086 sub sp, #24
|
||
8002940: af00 add r7, sp, #0
|
||
8002942: 6078 str r0, [r7, #4]
|
||
DWORD wsect;
|
||
UINT nf;
|
||
FRESULT res = FR_OK;
|
||
8002944: 2300 movs r3, #0
|
||
8002946: 73fb strb r3, [r7, #15]
|
||
|
||
|
||
if (fs->wflag) { /* Write back the sector if it is dirty */
|
||
8002948: 687b ldr r3, [r7, #4]
|
||
800294a: f893 3204 ldrb.w r3, [r3, #516] ; 0x204
|
||
800294e: 2b00 cmp r3, #0
|
||
8002950: d038 beq.n 80029c4 <sync_window+0x88>
|
||
wsect = fs->winsect; /* Current sector number */
|
||
8002952: 687b ldr r3, [r7, #4]
|
||
8002954: f8d3 322c ldr.w r3, [r3, #556] ; 0x22c
|
||
8002958: 617b str r3, [r7, #20]
|
||
if (disk_write(fs->drv, fs->win.d8, wsect, 1) != RES_OK) {
|
||
800295a: 687b ldr r3, [r7, #4]
|
||
800295c: f893 0201 ldrb.w r0, [r3, #513] ; 0x201
|
||
8002960: 6879 ldr r1, [r7, #4]
|
||
8002962: 2301 movs r3, #1
|
||
8002964: 697a ldr r2, [r7, #20]
|
||
8002966: f7ff fde1 bl 800252c <disk_write>
|
||
800296a: 4603 mov r3, r0
|
||
800296c: 2b00 cmp r3, #0
|
||
800296e: d002 beq.n 8002976 <sync_window+0x3a>
|
||
res = FR_DISK_ERR;
|
||
8002970: 2301 movs r3, #1
|
||
8002972: 73fb strb r3, [r7, #15]
|
||
8002974: e026 b.n 80029c4 <sync_window+0x88>
|
||
} else {
|
||
fs->wflag = 0;
|
||
8002976: 687b ldr r3, [r7, #4]
|
||
8002978: 2200 movs r2, #0
|
||
800297a: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
if (wsect - fs->fatbase < fs->fsize) { /* Is it in the FAT area? */
|
||
800297e: 687b ldr r3, [r7, #4]
|
||
8002980: f8d3 3220 ldr.w r3, [r3, #544] ; 0x220
|
||
8002984: 697a ldr r2, [r7, #20]
|
||
8002986: 1ad2 subs r2, r2, r3
|
||
8002988: 687b ldr r3, [r7, #4]
|
||
800298a: f8d3 3218 ldr.w r3, [r3, #536] ; 0x218
|
||
800298e: 429a cmp r2, r3
|
||
8002990: d218 bcs.n 80029c4 <sync_window+0x88>
|
||
for (nf = fs->n_fats; nf >= 2; nf--) { /* Reflect the change to all FAT copies */
|
||
8002992: 687b ldr r3, [r7, #4]
|
||
8002994: f893 3203 ldrb.w r3, [r3, #515] ; 0x203
|
||
8002998: 613b str r3, [r7, #16]
|
||
800299a: e010 b.n 80029be <sync_window+0x82>
|
||
wsect += fs->fsize;
|
||
800299c: 687b ldr r3, [r7, #4]
|
||
800299e: f8d3 3218 ldr.w r3, [r3, #536] ; 0x218
|
||
80029a2: 697a ldr r2, [r7, #20]
|
||
80029a4: 4413 add r3, r2
|
||
80029a6: 617b str r3, [r7, #20]
|
||
disk_write(fs->drv, fs->win.d8, wsect, 1);
|
||
80029a8: 687b ldr r3, [r7, #4]
|
||
80029aa: f893 0201 ldrb.w r0, [r3, #513] ; 0x201
|
||
80029ae: 6879 ldr r1, [r7, #4]
|
||
80029b0: 2301 movs r3, #1
|
||
80029b2: 697a ldr r2, [r7, #20]
|
||
80029b4: f7ff fdba bl 800252c <disk_write>
|
||
for (nf = fs->n_fats; nf >= 2; nf--) { /* Reflect the change to all FAT copies */
|
||
80029b8: 693b ldr r3, [r7, #16]
|
||
80029ba: 3b01 subs r3, #1
|
||
80029bc: 613b str r3, [r7, #16]
|
||
80029be: 693b ldr r3, [r7, #16]
|
||
80029c0: 2b01 cmp r3, #1
|
||
80029c2: d8eb bhi.n 800299c <sync_window+0x60>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
return res;
|
||
80029c4: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
80029c6: 4618 mov r0, r3
|
||
80029c8: 3718 adds r7, #24
|
||
80029ca: 46bd mov sp, r7
|
||
80029cc: bd80 pop {r7, pc}
|
||
|
||
080029ce <move_window>:
|
||
static
|
||
FRESULT move_window (
|
||
FATFS* fs, /* File system object */
|
||
DWORD sector /* Sector number to make appearance in the fs->win[].d8 */
|
||
)
|
||
{
|
||
80029ce: b580 push {r7, lr}
|
||
80029d0: b084 sub sp, #16
|
||
80029d2: af00 add r7, sp, #0
|
||
80029d4: 6078 str r0, [r7, #4]
|
||
80029d6: 6039 str r1, [r7, #0]
|
||
FRESULT res = FR_OK;
|
||
80029d8: 2300 movs r3, #0
|
||
80029da: 73fb strb r3, [r7, #15]
|
||
|
||
|
||
if (sector != fs->winsect) { /* Window offset changed? */
|
||
80029dc: 687b ldr r3, [r7, #4]
|
||
80029de: f8d3 322c ldr.w r3, [r3, #556] ; 0x22c
|
||
80029e2: 683a ldr r2, [r7, #0]
|
||
80029e4: 429a cmp r2, r3
|
||
80029e6: d01b beq.n 8002a20 <move_window+0x52>
|
||
#if !_FS_READONLY
|
||
res = sync_window(fs); /* Write-back changes */
|
||
80029e8: 6878 ldr r0, [r7, #4]
|
||
80029ea: f7ff ffa7 bl 800293c <sync_window>
|
||
80029ee: 4603 mov r3, r0
|
||
80029f0: 73fb strb r3, [r7, #15]
|
||
#endif
|
||
if (res == FR_OK) { /* Fill sector window with new data */
|
||
80029f2: 7bfb ldrb r3, [r7, #15]
|
||
80029f4: 2b00 cmp r3, #0
|
||
80029f6: d113 bne.n 8002a20 <move_window+0x52>
|
||
if (disk_read(fs->drv, fs->win.d8, sector, 1) != RES_OK) {
|
||
80029f8: 687b ldr r3, [r7, #4]
|
||
80029fa: f893 0201 ldrb.w r0, [r3, #513] ; 0x201
|
||
80029fe: 6879 ldr r1, [r7, #4]
|
||
8002a00: 2301 movs r3, #1
|
||
8002a02: 683a ldr r2, [r7, #0]
|
||
8002a04: f7ff fd72 bl 80024ec <disk_read>
|
||
8002a08: 4603 mov r3, r0
|
||
8002a0a: 2b00 cmp r3, #0
|
||
8002a0c: d004 beq.n 8002a18 <move_window+0x4a>
|
||
sector = 0xFFFFFFFF; /* Invalidate window if data is not reliable */
|
||
8002a0e: f04f 33ff mov.w r3, #4294967295
|
||
8002a12: 603b str r3, [r7, #0]
|
||
res = FR_DISK_ERR;
|
||
8002a14: 2301 movs r3, #1
|
||
8002a16: 73fb strb r3, [r7, #15]
|
||
}
|
||
fs->winsect = sector;
|
||
8002a18: 687b ldr r3, [r7, #4]
|
||
8002a1a: 683a ldr r2, [r7, #0]
|
||
8002a1c: f8c3 222c str.w r2, [r3, #556] ; 0x22c
|
||
}
|
||
}
|
||
return res;
|
||
8002a20: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
8002a22: 4618 mov r0, r3
|
||
8002a24: 3710 adds r7, #16
|
||
8002a26: 46bd mov sp, r7
|
||
8002a28: bd80 pop {r7, pc}
|
||
|
||
08002a2a <clust2sect>:
|
||
|
||
DWORD clust2sect ( /* !=0: Sector number, 0: Failed - invalid cluster# */
|
||
FATFS* fs, /* File system object */
|
||
DWORD clst /* Cluster# to be converted */
|
||
)
|
||
{
|
||
8002a2a: b480 push {r7}
|
||
8002a2c: b083 sub sp, #12
|
||
8002a2e: af00 add r7, sp, #0
|
||
8002a30: 6078 str r0, [r7, #4]
|
||
8002a32: 6039 str r1, [r7, #0]
|
||
clst -= 2;
|
||
8002a34: 683b ldr r3, [r7, #0]
|
||
8002a36: 3b02 subs r3, #2
|
||
8002a38: 603b str r3, [r7, #0]
|
||
if (clst >= fs->n_fatent - 2) return 0; /* Invalid cluster# */
|
||
8002a3a: 687b ldr r3, [r7, #4]
|
||
8002a3c: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002a40: 3b02 subs r3, #2
|
||
8002a42: 683a ldr r2, [r7, #0]
|
||
8002a44: 429a cmp r2, r3
|
||
8002a46: d301 bcc.n 8002a4c <clust2sect+0x22>
|
||
8002a48: 2300 movs r3, #0
|
||
8002a4a: e00a b.n 8002a62 <clust2sect+0x38>
|
||
return clst * fs->csize + fs->database;
|
||
8002a4c: 687b ldr r3, [r7, #4]
|
||
8002a4e: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
8002a52: 461a mov r2, r3
|
||
8002a54: 683b ldr r3, [r7, #0]
|
||
8002a56: fb03 f202 mul.w r2, r3, r2
|
||
8002a5a: 687b ldr r3, [r7, #4]
|
||
8002a5c: f8d3 3228 ldr.w r3, [r3, #552] ; 0x228
|
||
8002a60: 4413 add r3, r2
|
||
}
|
||
8002a62: 4618 mov r0, r3
|
||
8002a64: 370c adds r7, #12
|
||
8002a66: 46bd mov sp, r7
|
||
8002a68: bc80 pop {r7}
|
||
8002a6a: 4770 bx lr
|
||
|
||
08002a6c <get_fat>:
|
||
|
||
DWORD get_fat ( /* 0xFFFFFFFF:Disk error, 1:Internal error, 2..0x0FFFFFFF:Cluster status */
|
||
FATFS* fs, /* File system object */
|
||
DWORD clst /* FAT index number (cluster number) to get the value */
|
||
)
|
||
{
|
||
8002a6c: b580 push {r7, lr}
|
||
8002a6e: b086 sub sp, #24
|
||
8002a70: af00 add r7, sp, #0
|
||
8002a72: 6078 str r0, [r7, #4]
|
||
8002a74: 6039 str r1, [r7, #0]
|
||
UINT wc, bc;
|
||
BYTE *p;
|
||
DWORD val;
|
||
|
||
|
||
if (clst < 2 || clst >= fs->n_fatent) { /* Check range */
|
||
8002a76: 683b ldr r3, [r7, #0]
|
||
8002a78: 2b01 cmp r3, #1
|
||
8002a7a: d905 bls.n 8002a88 <get_fat+0x1c>
|
||
8002a7c: 687b ldr r3, [r7, #4]
|
||
8002a7e: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002a82: 683a ldr r2, [r7, #0]
|
||
8002a84: 429a cmp r2, r3
|
||
8002a86: d302 bcc.n 8002a8e <get_fat+0x22>
|
||
val = 1; /* Internal error */
|
||
8002a88: 2301 movs r3, #1
|
||
8002a8a: 617b str r3, [r7, #20]
|
||
8002a8c: e0a3 b.n 8002bd6 <get_fat+0x16a>
|
||
|
||
} else {
|
||
val = 0xFFFFFFFF; /* Default value falls on disk error */
|
||
8002a8e: f04f 33ff mov.w r3, #4294967295
|
||
8002a92: 617b str r3, [r7, #20]
|
||
|
||
switch (fs->fs_type) {
|
||
8002a94: 687b ldr r3, [r7, #4]
|
||
8002a96: f893 3200 ldrb.w r3, [r3, #512] ; 0x200
|
||
8002a9a: 2b03 cmp r3, #3
|
||
8002a9c: d068 beq.n 8002b70 <get_fat+0x104>
|
||
8002a9e: 2b03 cmp r3, #3
|
||
8002aa0: f300 808f bgt.w 8002bc2 <get_fat+0x156>
|
||
8002aa4: 2b01 cmp r3, #1
|
||
8002aa6: d002 beq.n 8002aae <get_fat+0x42>
|
||
8002aa8: 2b02 cmp r3, #2
|
||
8002aaa: d040 beq.n 8002b2e <get_fat+0xc2>
|
||
8002aac: e089 b.n 8002bc2 <get_fat+0x156>
|
||
case FS_FAT12 :
|
||
bc = (UINT)clst; bc += bc / 2;
|
||
8002aae: 683b ldr r3, [r7, #0]
|
||
8002ab0: 60fb str r3, [r7, #12]
|
||
8002ab2: 68fb ldr r3, [r7, #12]
|
||
8002ab4: 085b lsrs r3, r3, #1
|
||
8002ab6: 68fa ldr r2, [r7, #12]
|
||
8002ab8: 4413 add r3, r2
|
||
8002aba: 60fb str r3, [r7, #12]
|
||
if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
|
||
8002abc: 687b ldr r3, [r7, #4]
|
||
8002abe: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002ac2: 68fb ldr r3, [r7, #12]
|
||
8002ac4: 0a5b lsrs r3, r3, #9
|
||
8002ac6: 4413 add r3, r2
|
||
8002ac8: 4619 mov r1, r3
|
||
8002aca: 6878 ldr r0, [r7, #4]
|
||
8002acc: f7ff ff7f bl 80029ce <move_window>
|
||
8002ad0: 4603 mov r3, r0
|
||
8002ad2: 2b00 cmp r3, #0
|
||
8002ad4: d178 bne.n 8002bc8 <get_fat+0x15c>
|
||
wc = fs->win.d8[bc++ % SS(fs)];
|
||
8002ad6: 68fb ldr r3, [r7, #12]
|
||
8002ad8: 1c5a adds r2, r3, #1
|
||
8002ada: 60fa str r2, [r7, #12]
|
||
8002adc: f3c3 0308 ubfx r3, r3, #0, #9
|
||
8002ae0: 687a ldr r2, [r7, #4]
|
||
8002ae2: 5cd3 ldrb r3, [r2, r3]
|
||
8002ae4: 60bb str r3, [r7, #8]
|
||
if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
|
||
8002ae6: 687b ldr r3, [r7, #4]
|
||
8002ae8: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002aec: 68fb ldr r3, [r7, #12]
|
||
8002aee: 0a5b lsrs r3, r3, #9
|
||
8002af0: 4413 add r3, r2
|
||
8002af2: 4619 mov r1, r3
|
||
8002af4: 6878 ldr r0, [r7, #4]
|
||
8002af6: f7ff ff6a bl 80029ce <move_window>
|
||
8002afa: 4603 mov r3, r0
|
||
8002afc: 2b00 cmp r3, #0
|
||
8002afe: d165 bne.n 8002bcc <get_fat+0x160>
|
||
wc |= fs->win.d8[bc % SS(fs)] << 8;
|
||
8002b00: 68fb ldr r3, [r7, #12]
|
||
8002b02: f3c3 0308 ubfx r3, r3, #0, #9
|
||
8002b06: 687a ldr r2, [r7, #4]
|
||
8002b08: 5cd3 ldrb r3, [r2, r3]
|
||
8002b0a: 021b lsls r3, r3, #8
|
||
8002b0c: 461a mov r2, r3
|
||
8002b0e: 68bb ldr r3, [r7, #8]
|
||
8002b10: 4313 orrs r3, r2
|
||
8002b12: 60bb str r3, [r7, #8]
|
||
val = clst & 1 ? wc >> 4 : (wc & 0xFFF);
|
||
8002b14: 683b ldr r3, [r7, #0]
|
||
8002b16: f003 0301 and.w r3, r3, #1
|
||
8002b1a: 2b00 cmp r3, #0
|
||
8002b1c: d002 beq.n 8002b24 <get_fat+0xb8>
|
||
8002b1e: 68bb ldr r3, [r7, #8]
|
||
8002b20: 091b lsrs r3, r3, #4
|
||
8002b22: e002 b.n 8002b2a <get_fat+0xbe>
|
||
8002b24: 68bb ldr r3, [r7, #8]
|
||
8002b26: f3c3 030b ubfx r3, r3, #0, #12
|
||
8002b2a: 617b str r3, [r7, #20]
|
||
break;
|
||
8002b2c: e053 b.n 8002bd6 <get_fat+0x16a>
|
||
|
||
case FS_FAT16 :
|
||
if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) != FR_OK) break;
|
||
8002b2e: 687b ldr r3, [r7, #4]
|
||
8002b30: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002b34: 683b ldr r3, [r7, #0]
|
||
8002b36: 0a1b lsrs r3, r3, #8
|
||
8002b38: 4413 add r3, r2
|
||
8002b3a: 4619 mov r1, r3
|
||
8002b3c: 6878 ldr r0, [r7, #4]
|
||
8002b3e: f7ff ff46 bl 80029ce <move_window>
|
||
8002b42: 4603 mov r3, r0
|
||
8002b44: 2b00 cmp r3, #0
|
||
8002b46: d143 bne.n 8002bd0 <get_fat+0x164>
|
||
p = &fs->win.d8[clst * 2 % SS(fs)];
|
||
8002b48: 683b ldr r3, [r7, #0]
|
||
8002b4a: 005b lsls r3, r3, #1
|
||
8002b4c: f403 73ff and.w r3, r3, #510 ; 0x1fe
|
||
8002b50: 687a ldr r2, [r7, #4]
|
||
8002b52: 4413 add r3, r2
|
||
8002b54: 613b str r3, [r7, #16]
|
||
val = LD_WORD(p);
|
||
8002b56: 693b ldr r3, [r7, #16]
|
||
8002b58: 3301 adds r3, #1
|
||
8002b5a: 781b ldrb r3, [r3, #0]
|
||
8002b5c: 021b lsls r3, r3, #8
|
||
8002b5e: b21a sxth r2, r3
|
||
8002b60: 693b ldr r3, [r7, #16]
|
||
8002b62: 781b ldrb r3, [r3, #0]
|
||
8002b64: b21b sxth r3, r3
|
||
8002b66: 4313 orrs r3, r2
|
||
8002b68: b21b sxth r3, r3
|
||
8002b6a: b29b uxth r3, r3
|
||
8002b6c: 617b str r3, [r7, #20]
|
||
break;
|
||
8002b6e: e032 b.n 8002bd6 <get_fat+0x16a>
|
||
|
||
case FS_FAT32 :
|
||
if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break;
|
||
8002b70: 687b ldr r3, [r7, #4]
|
||
8002b72: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002b76: 683b ldr r3, [r7, #0]
|
||
8002b78: 09db lsrs r3, r3, #7
|
||
8002b7a: 4413 add r3, r2
|
||
8002b7c: 4619 mov r1, r3
|
||
8002b7e: 6878 ldr r0, [r7, #4]
|
||
8002b80: f7ff ff25 bl 80029ce <move_window>
|
||
8002b84: 4603 mov r3, r0
|
||
8002b86: 2b00 cmp r3, #0
|
||
8002b88: d124 bne.n 8002bd4 <get_fat+0x168>
|
||
p = &fs->win.d8[clst * 4 % SS(fs)];
|
||
8002b8a: 683b ldr r3, [r7, #0]
|
||
8002b8c: 009b lsls r3, r3, #2
|
||
8002b8e: f403 73fe and.w r3, r3, #508 ; 0x1fc
|
||
8002b92: 687a ldr r2, [r7, #4]
|
||
8002b94: 4413 add r3, r2
|
||
8002b96: 613b str r3, [r7, #16]
|
||
val = LD_DWORD(p) & 0x0FFFFFFF;
|
||
8002b98: 693b ldr r3, [r7, #16]
|
||
8002b9a: 3303 adds r3, #3
|
||
8002b9c: 781b ldrb r3, [r3, #0]
|
||
8002b9e: 061a lsls r2, r3, #24
|
||
8002ba0: 693b ldr r3, [r7, #16]
|
||
8002ba2: 3302 adds r3, #2
|
||
8002ba4: 781b ldrb r3, [r3, #0]
|
||
8002ba6: 041b lsls r3, r3, #16
|
||
8002ba8: 4313 orrs r3, r2
|
||
8002baa: 693a ldr r2, [r7, #16]
|
||
8002bac: 3201 adds r2, #1
|
||
8002bae: 7812 ldrb r2, [r2, #0]
|
||
8002bb0: 0212 lsls r2, r2, #8
|
||
8002bb2: 4313 orrs r3, r2
|
||
8002bb4: 693a ldr r2, [r7, #16]
|
||
8002bb6: 7812 ldrb r2, [r2, #0]
|
||
8002bb8: 4313 orrs r3, r2
|
||
8002bba: f023 4370 bic.w r3, r3, #4026531840 ; 0xf0000000
|
||
8002bbe: 617b str r3, [r7, #20]
|
||
break;
|
||
8002bc0: e009 b.n 8002bd6 <get_fat+0x16a>
|
||
|
||
default:
|
||
val = 1; /* Internal error */
|
||
8002bc2: 2301 movs r3, #1
|
||
8002bc4: 617b str r3, [r7, #20]
|
||
8002bc6: e006 b.n 8002bd6 <get_fat+0x16a>
|
||
if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
|
||
8002bc8: bf00 nop
|
||
8002bca: e004 b.n 8002bd6 <get_fat+0x16a>
|
||
if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
|
||
8002bcc: bf00 nop
|
||
8002bce: e002 b.n 8002bd6 <get_fat+0x16a>
|
||
if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) != FR_OK) break;
|
||
8002bd0: bf00 nop
|
||
8002bd2: e000 b.n 8002bd6 <get_fat+0x16a>
|
||
if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break;
|
||
8002bd4: bf00 nop
|
||
}
|
||
}
|
||
|
||
return val;
|
||
8002bd6: 697b ldr r3, [r7, #20]
|
||
}
|
||
8002bd8: 4618 mov r0, r3
|
||
8002bda: 3718 adds r7, #24
|
||
8002bdc: 46bd mov sp, r7
|
||
8002bde: bd80 pop {r7, pc}
|
||
|
||
08002be0 <put_fat>:
|
||
FRESULT put_fat (
|
||
FATFS* fs, /* File system object */
|
||
DWORD clst, /* FAT index number (cluster number) to be changed */
|
||
DWORD val /* New value to be set to the entry */
|
||
)
|
||
{
|
||
8002be0: b580 push {r7, lr}
|
||
8002be2: b088 sub sp, #32
|
||
8002be4: af00 add r7, sp, #0
|
||
8002be6: 60f8 str r0, [r7, #12]
|
||
8002be8: 60b9 str r1, [r7, #8]
|
||
8002bea: 607a str r2, [r7, #4]
|
||
UINT bc;
|
||
BYTE *p;
|
||
FRESULT res;
|
||
|
||
|
||
if (clst < 2 || clst >= fs->n_fatent) { /* Check range */
|
||
8002bec: 68bb ldr r3, [r7, #8]
|
||
8002bee: 2b01 cmp r3, #1
|
||
8002bf0: d905 bls.n 8002bfe <put_fat+0x1e>
|
||
8002bf2: 68fb ldr r3, [r7, #12]
|
||
8002bf4: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002bf8: 68ba ldr r2, [r7, #8]
|
||
8002bfa: 429a cmp r2, r3
|
||
8002bfc: d302 bcc.n 8002c04 <put_fat+0x24>
|
||
res = FR_INT_ERR;
|
||
8002bfe: 2302 movs r3, #2
|
||
8002c00: 77fb strb r3, [r7, #31]
|
||
8002c02: e0f6 b.n 8002df2 <put_fat+0x212>
|
||
|
||
} else {
|
||
switch (fs->fs_type) {
|
||
8002c04: 68fb ldr r3, [r7, #12]
|
||
8002c06: f893 3200 ldrb.w r3, [r3, #512] ; 0x200
|
||
8002c0a: 2b03 cmp r3, #3
|
||
8002c0c: f000 809e beq.w 8002d4c <put_fat+0x16c>
|
||
8002c10: 2b03 cmp r3, #3
|
||
8002c12: f300 80e4 bgt.w 8002dde <put_fat+0x1fe>
|
||
8002c16: 2b01 cmp r3, #1
|
||
8002c18: d002 beq.n 8002c20 <put_fat+0x40>
|
||
8002c1a: 2b02 cmp r3, #2
|
||
8002c1c: d06f beq.n 8002cfe <put_fat+0x11e>
|
||
8002c1e: e0de b.n 8002dde <put_fat+0x1fe>
|
||
case FS_FAT12 :
|
||
bc = (UINT)clst; bc += bc / 2;
|
||
8002c20: 68bb ldr r3, [r7, #8]
|
||
8002c22: 617b str r3, [r7, #20]
|
||
8002c24: 697b ldr r3, [r7, #20]
|
||
8002c26: 085b lsrs r3, r3, #1
|
||
8002c28: 697a ldr r2, [r7, #20]
|
||
8002c2a: 4413 add r3, r2
|
||
8002c2c: 617b str r3, [r7, #20]
|
||
res = move_window(fs, fs->fatbase + (bc / SS(fs)));
|
||
8002c2e: 68fb ldr r3, [r7, #12]
|
||
8002c30: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002c34: 697b ldr r3, [r7, #20]
|
||
8002c36: 0a5b lsrs r3, r3, #9
|
||
8002c38: 4413 add r3, r2
|
||
8002c3a: 4619 mov r1, r3
|
||
8002c3c: 68f8 ldr r0, [r7, #12]
|
||
8002c3e: f7ff fec6 bl 80029ce <move_window>
|
||
8002c42: 4603 mov r3, r0
|
||
8002c44: 77fb strb r3, [r7, #31]
|
||
if (res != FR_OK) break;
|
||
8002c46: 7ffb ldrb r3, [r7, #31]
|
||
8002c48: 2b00 cmp r3, #0
|
||
8002c4a: f040 80cb bne.w 8002de4 <put_fat+0x204>
|
||
p = &fs->win.d8[bc++ % SS(fs)];
|
||
8002c4e: 697b ldr r3, [r7, #20]
|
||
8002c50: 1c5a adds r2, r3, #1
|
||
8002c52: 617a str r2, [r7, #20]
|
||
8002c54: f3c3 0308 ubfx r3, r3, #0, #9
|
||
8002c58: 68fa ldr r2, [r7, #12]
|
||
8002c5a: 4413 add r3, r2
|
||
8002c5c: 61bb str r3, [r7, #24]
|
||
*p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val;
|
||
8002c5e: 68bb ldr r3, [r7, #8]
|
||
8002c60: f003 0301 and.w r3, r3, #1
|
||
8002c64: 2b00 cmp r3, #0
|
||
8002c66: d00d beq.n 8002c84 <put_fat+0xa4>
|
||
8002c68: 69bb ldr r3, [r7, #24]
|
||
8002c6a: 781b ldrb r3, [r3, #0]
|
||
8002c6c: b25b sxtb r3, r3
|
||
8002c6e: f003 030f and.w r3, r3, #15
|
||
8002c72: b25a sxtb r2, r3
|
||
8002c74: 687b ldr r3, [r7, #4]
|
||
8002c76: b2db uxtb r3, r3
|
||
8002c78: 011b lsls r3, r3, #4
|
||
8002c7a: b25b sxtb r3, r3
|
||
8002c7c: 4313 orrs r3, r2
|
||
8002c7e: b25b sxtb r3, r3
|
||
8002c80: b2db uxtb r3, r3
|
||
8002c82: e001 b.n 8002c88 <put_fat+0xa8>
|
||
8002c84: 687b ldr r3, [r7, #4]
|
||
8002c86: b2db uxtb r3, r3
|
||
8002c88: 69ba ldr r2, [r7, #24]
|
||
8002c8a: 7013 strb r3, [r2, #0]
|
||
fs->wflag = 1;
|
||
8002c8c: 68fb ldr r3, [r7, #12]
|
||
8002c8e: 2201 movs r2, #1
|
||
8002c90: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
res = move_window(fs, fs->fatbase + (bc / SS(fs)));
|
||
8002c94: 68fb ldr r3, [r7, #12]
|
||
8002c96: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002c9a: 697b ldr r3, [r7, #20]
|
||
8002c9c: 0a5b lsrs r3, r3, #9
|
||
8002c9e: 4413 add r3, r2
|
||
8002ca0: 4619 mov r1, r3
|
||
8002ca2: 68f8 ldr r0, [r7, #12]
|
||
8002ca4: f7ff fe93 bl 80029ce <move_window>
|
||
8002ca8: 4603 mov r3, r0
|
||
8002caa: 77fb strb r3, [r7, #31]
|
||
if (res != FR_OK) break;
|
||
8002cac: 7ffb ldrb r3, [r7, #31]
|
||
8002cae: 2b00 cmp r3, #0
|
||
8002cb0: f040 809a bne.w 8002de8 <put_fat+0x208>
|
||
p = &fs->win.d8[bc % SS(fs)];
|
||
8002cb4: 697b ldr r3, [r7, #20]
|
||
8002cb6: f3c3 0308 ubfx r3, r3, #0, #9
|
||
8002cba: 68fa ldr r2, [r7, #12]
|
||
8002cbc: 4413 add r3, r2
|
||
8002cbe: 61bb str r3, [r7, #24]
|
||
*p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F));
|
||
8002cc0: 68bb ldr r3, [r7, #8]
|
||
8002cc2: f003 0301 and.w r3, r3, #1
|
||
8002cc6: 2b00 cmp r3, #0
|
||
8002cc8: d003 beq.n 8002cd2 <put_fat+0xf2>
|
||
8002cca: 687b ldr r3, [r7, #4]
|
||
8002ccc: 091b lsrs r3, r3, #4
|
||
8002cce: b2db uxtb r3, r3
|
||
8002cd0: e00e b.n 8002cf0 <put_fat+0x110>
|
||
8002cd2: 69bb ldr r3, [r7, #24]
|
||
8002cd4: 781b ldrb r3, [r3, #0]
|
||
8002cd6: b25b sxtb r3, r3
|
||
8002cd8: f023 030f bic.w r3, r3, #15
|
||
8002cdc: b25a sxtb r2, r3
|
||
8002cde: 687b ldr r3, [r7, #4]
|
||
8002ce0: 0a1b lsrs r3, r3, #8
|
||
8002ce2: b25b sxtb r3, r3
|
||
8002ce4: f003 030f and.w r3, r3, #15
|
||
8002ce8: b25b sxtb r3, r3
|
||
8002cea: 4313 orrs r3, r2
|
||
8002cec: b25b sxtb r3, r3
|
||
8002cee: b2db uxtb r3, r3
|
||
8002cf0: 69ba ldr r2, [r7, #24]
|
||
8002cf2: 7013 strb r3, [r2, #0]
|
||
fs->wflag = 1;
|
||
8002cf4: 68fb ldr r3, [r7, #12]
|
||
8002cf6: 2201 movs r2, #1
|
||
8002cf8: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
break;
|
||
8002cfc: e079 b.n 8002df2 <put_fat+0x212>
|
||
|
||
case FS_FAT16 :
|
||
res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 2)));
|
||
8002cfe: 68fb ldr r3, [r7, #12]
|
||
8002d00: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002d04: 68bb ldr r3, [r7, #8]
|
||
8002d06: 0a1b lsrs r3, r3, #8
|
||
8002d08: 4413 add r3, r2
|
||
8002d0a: 4619 mov r1, r3
|
||
8002d0c: 68f8 ldr r0, [r7, #12]
|
||
8002d0e: f7ff fe5e bl 80029ce <move_window>
|
||
8002d12: 4603 mov r3, r0
|
||
8002d14: 77fb strb r3, [r7, #31]
|
||
if (res != FR_OK) break;
|
||
8002d16: 7ffb ldrb r3, [r7, #31]
|
||
8002d18: 2b00 cmp r3, #0
|
||
8002d1a: d167 bne.n 8002dec <put_fat+0x20c>
|
||
p = &fs->win.d8[clst * 2 % SS(fs)];
|
||
8002d1c: 68bb ldr r3, [r7, #8]
|
||
8002d1e: 005b lsls r3, r3, #1
|
||
8002d20: f403 73ff and.w r3, r3, #510 ; 0x1fe
|
||
8002d24: 68fa ldr r2, [r7, #12]
|
||
8002d26: 4413 add r3, r2
|
||
8002d28: 61bb str r3, [r7, #24]
|
||
ST_WORD(p, (WORD)val);
|
||
8002d2a: 687b ldr r3, [r7, #4]
|
||
8002d2c: b2da uxtb r2, r3
|
||
8002d2e: 69bb ldr r3, [r7, #24]
|
||
8002d30: 701a strb r2, [r3, #0]
|
||
8002d32: 687b ldr r3, [r7, #4]
|
||
8002d34: b29b uxth r3, r3
|
||
8002d36: 0a1b lsrs r3, r3, #8
|
||
8002d38: b29a uxth r2, r3
|
||
8002d3a: 69bb ldr r3, [r7, #24]
|
||
8002d3c: 3301 adds r3, #1
|
||
8002d3e: b2d2 uxtb r2, r2
|
||
8002d40: 701a strb r2, [r3, #0]
|
||
fs->wflag = 1;
|
||
8002d42: 68fb ldr r3, [r7, #12]
|
||
8002d44: 2201 movs r2, #1
|
||
8002d46: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
break;
|
||
8002d4a: e052 b.n 8002df2 <put_fat+0x212>
|
||
|
||
case FS_FAT32 :
|
||
res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 4)));
|
||
8002d4c: 68fb ldr r3, [r7, #12]
|
||
8002d4e: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8002d52: 68bb ldr r3, [r7, #8]
|
||
8002d54: 09db lsrs r3, r3, #7
|
||
8002d56: 4413 add r3, r2
|
||
8002d58: 4619 mov r1, r3
|
||
8002d5a: 68f8 ldr r0, [r7, #12]
|
||
8002d5c: f7ff fe37 bl 80029ce <move_window>
|
||
8002d60: 4603 mov r3, r0
|
||
8002d62: 77fb strb r3, [r7, #31]
|
||
if (res != FR_OK) break;
|
||
8002d64: 7ffb ldrb r3, [r7, #31]
|
||
8002d66: 2b00 cmp r3, #0
|
||
8002d68: d142 bne.n 8002df0 <put_fat+0x210>
|
||
p = &fs->win.d8[clst * 4 % SS(fs)];
|
||
8002d6a: 68bb ldr r3, [r7, #8]
|
||
8002d6c: 009b lsls r3, r3, #2
|
||
8002d6e: f403 73fe and.w r3, r3, #508 ; 0x1fc
|
||
8002d72: 68fa ldr r2, [r7, #12]
|
||
8002d74: 4413 add r3, r2
|
||
8002d76: 61bb str r3, [r7, #24]
|
||
val |= LD_DWORD(p) & 0xF0000000;
|
||
8002d78: 69bb ldr r3, [r7, #24]
|
||
8002d7a: 3303 adds r3, #3
|
||
8002d7c: 781b ldrb r3, [r3, #0]
|
||
8002d7e: 061a lsls r2, r3, #24
|
||
8002d80: 69bb ldr r3, [r7, #24]
|
||
8002d82: 3302 adds r3, #2
|
||
8002d84: 781b ldrb r3, [r3, #0]
|
||
8002d86: 041b lsls r3, r3, #16
|
||
8002d88: 4313 orrs r3, r2
|
||
8002d8a: 69ba ldr r2, [r7, #24]
|
||
8002d8c: 3201 adds r2, #1
|
||
8002d8e: 7812 ldrb r2, [r2, #0]
|
||
8002d90: 0212 lsls r2, r2, #8
|
||
8002d92: 4313 orrs r3, r2
|
||
8002d94: 69ba ldr r2, [r7, #24]
|
||
8002d96: 7812 ldrb r2, [r2, #0]
|
||
8002d98: 4313 orrs r3, r2
|
||
8002d9a: f003 4370 and.w r3, r3, #4026531840 ; 0xf0000000
|
||
8002d9e: 687a ldr r2, [r7, #4]
|
||
8002da0: 4313 orrs r3, r2
|
||
8002da2: 607b str r3, [r7, #4]
|
||
ST_DWORD(p, val);
|
||
8002da4: 687b ldr r3, [r7, #4]
|
||
8002da6: b2da uxtb r2, r3
|
||
8002da8: 69bb ldr r3, [r7, #24]
|
||
8002daa: 701a strb r2, [r3, #0]
|
||
8002dac: 687b ldr r3, [r7, #4]
|
||
8002dae: b29b uxth r3, r3
|
||
8002db0: 0a1b lsrs r3, r3, #8
|
||
8002db2: b29a uxth r2, r3
|
||
8002db4: 69bb ldr r3, [r7, #24]
|
||
8002db6: 3301 adds r3, #1
|
||
8002db8: b2d2 uxtb r2, r2
|
||
8002dba: 701a strb r2, [r3, #0]
|
||
8002dbc: 687b ldr r3, [r7, #4]
|
||
8002dbe: 0c1a lsrs r2, r3, #16
|
||
8002dc0: 69bb ldr r3, [r7, #24]
|
||
8002dc2: 3302 adds r3, #2
|
||
8002dc4: b2d2 uxtb r2, r2
|
||
8002dc6: 701a strb r2, [r3, #0]
|
||
8002dc8: 687b ldr r3, [r7, #4]
|
||
8002dca: 0e1a lsrs r2, r3, #24
|
||
8002dcc: 69bb ldr r3, [r7, #24]
|
||
8002dce: 3303 adds r3, #3
|
||
8002dd0: b2d2 uxtb r2, r2
|
||
8002dd2: 701a strb r2, [r3, #0]
|
||
fs->wflag = 1;
|
||
8002dd4: 68fb ldr r3, [r7, #12]
|
||
8002dd6: 2201 movs r2, #1
|
||
8002dd8: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
break;
|
||
8002ddc: e009 b.n 8002df2 <put_fat+0x212>
|
||
|
||
default :
|
||
res = FR_INT_ERR;
|
||
8002dde: 2302 movs r3, #2
|
||
8002de0: 77fb strb r3, [r7, #31]
|
||
8002de2: e006 b.n 8002df2 <put_fat+0x212>
|
||
if (res != FR_OK) break;
|
||
8002de4: bf00 nop
|
||
8002de6: e004 b.n 8002df2 <put_fat+0x212>
|
||
if (res != FR_OK) break;
|
||
8002de8: bf00 nop
|
||
8002dea: e002 b.n 8002df2 <put_fat+0x212>
|
||
if (res != FR_OK) break;
|
||
8002dec: bf00 nop
|
||
8002dee: e000 b.n 8002df2 <put_fat+0x212>
|
||
if (res != FR_OK) break;
|
||
8002df0: bf00 nop
|
||
}
|
||
}
|
||
|
||
return res;
|
||
8002df2: 7ffb ldrb r3, [r7, #31]
|
||
}
|
||
8002df4: 4618 mov r0, r3
|
||
8002df6: 3720 adds r7, #32
|
||
8002df8: 46bd mov sp, r7
|
||
8002dfa: bd80 pop {r7, pc}
|
||
|
||
08002dfc <remove_chain>:
|
||
static
|
||
FRESULT remove_chain (
|
||
FATFS* fs, /* File system object */
|
||
DWORD clst /* Cluster# to remove a chain from */
|
||
)
|
||
{
|
||
8002dfc: b580 push {r7, lr}
|
||
8002dfe: b084 sub sp, #16
|
||
8002e00: af00 add r7, sp, #0
|
||
8002e02: 6078 str r0, [r7, #4]
|
||
8002e04: 6039 str r1, [r7, #0]
|
||
DWORD nxt;
|
||
#if _USE_TRIM
|
||
DWORD scl = clst, ecl = clst, rt[2];
|
||
#endif
|
||
|
||
if (clst < 2 || clst >= fs->n_fatent) { /* Check range */
|
||
8002e06: 683b ldr r3, [r7, #0]
|
||
8002e08: 2b01 cmp r3, #1
|
||
8002e0a: d905 bls.n 8002e18 <remove_chain+0x1c>
|
||
8002e0c: 687b ldr r3, [r7, #4]
|
||
8002e0e: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002e12: 683a ldr r2, [r7, #0]
|
||
8002e14: 429a cmp r2, r3
|
||
8002e16: d302 bcc.n 8002e1e <remove_chain+0x22>
|
||
res = FR_INT_ERR;
|
||
8002e18: 2302 movs r3, #2
|
||
8002e1a: 73fb strb r3, [r7, #15]
|
||
8002e1c: e043 b.n 8002ea6 <remove_chain+0xaa>
|
||
|
||
} else {
|
||
res = FR_OK;
|
||
8002e1e: 2300 movs r3, #0
|
||
8002e20: 73fb strb r3, [r7, #15]
|
||
while (clst < fs->n_fatent) { /* Not a last link? */
|
||
8002e22: e036 b.n 8002e92 <remove_chain+0x96>
|
||
nxt = get_fat(fs, clst); /* Get cluster status */
|
||
8002e24: 6839 ldr r1, [r7, #0]
|
||
8002e26: 6878 ldr r0, [r7, #4]
|
||
8002e28: f7ff fe20 bl 8002a6c <get_fat>
|
||
8002e2c: 60b8 str r0, [r7, #8]
|
||
if (nxt == 0) break; /* Empty cluster? */
|
||
8002e2e: 68bb ldr r3, [r7, #8]
|
||
8002e30: 2b00 cmp r3, #0
|
||
8002e32: d035 beq.n 8002ea0 <remove_chain+0xa4>
|
||
if (nxt == 1) { res = FR_INT_ERR; break; } /* Internal error? */
|
||
8002e34: 68bb ldr r3, [r7, #8]
|
||
8002e36: 2b01 cmp r3, #1
|
||
8002e38: d102 bne.n 8002e40 <remove_chain+0x44>
|
||
8002e3a: 2302 movs r3, #2
|
||
8002e3c: 73fb strb r3, [r7, #15]
|
||
8002e3e: e032 b.n 8002ea6 <remove_chain+0xaa>
|
||
if (nxt == 0xFFFFFFFF) { res = FR_DISK_ERR; break; } /* Disk error? */
|
||
8002e40: 68bb ldr r3, [r7, #8]
|
||
8002e42: f1b3 3fff cmp.w r3, #4294967295
|
||
8002e46: d102 bne.n 8002e4e <remove_chain+0x52>
|
||
8002e48: 2301 movs r3, #1
|
||
8002e4a: 73fb strb r3, [r7, #15]
|
||
8002e4c: e02b b.n 8002ea6 <remove_chain+0xaa>
|
||
res = put_fat(fs, clst, 0); /* Mark the cluster "empty" */
|
||
8002e4e: 2200 movs r2, #0
|
||
8002e50: 6839 ldr r1, [r7, #0]
|
||
8002e52: 6878 ldr r0, [r7, #4]
|
||
8002e54: f7ff fec4 bl 8002be0 <put_fat>
|
||
8002e58: 4603 mov r3, r0
|
||
8002e5a: 73fb strb r3, [r7, #15]
|
||
if (res != FR_OK) break;
|
||
8002e5c: 7bfb ldrb r3, [r7, #15]
|
||
8002e5e: 2b00 cmp r3, #0
|
||
8002e60: d120 bne.n 8002ea4 <remove_chain+0xa8>
|
||
if (fs->free_clust != 0xFFFFFFFF) { /* Update FSINFO */
|
||
8002e62: 687b ldr r3, [r7, #4]
|
||
8002e64: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
8002e68: f1b3 3fff cmp.w r3, #4294967295
|
||
8002e6c: d00f beq.n 8002e8e <remove_chain+0x92>
|
||
fs->free_clust++;
|
||
8002e6e: 687b ldr r3, [r7, #4]
|
||
8002e70: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
8002e74: 1c5a adds r2, r3, #1
|
||
8002e76: 687b ldr r3, [r7, #4]
|
||
8002e78: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
fs->fsi_flag |= 1;
|
||
8002e7c: 687b ldr r3, [r7, #4]
|
||
8002e7e: f893 3205 ldrb.w r3, [r3, #517] ; 0x205
|
||
8002e82: f043 0301 orr.w r3, r3, #1
|
||
8002e86: b2da uxtb r2, r3
|
||
8002e88: 687b ldr r3, [r7, #4]
|
||
8002e8a: f883 2205 strb.w r2, [r3, #517] ; 0x205
|
||
rt[1] = clust2sect(fs, ecl) + fs->csize - 1; /* End sector */
|
||
disk_ioctl(fs->drv, CTRL_TRIM, rt); /* Erase the block */
|
||
scl = ecl = nxt;
|
||
}
|
||
#endif
|
||
clst = nxt; /* Next cluster */
|
||
8002e8e: 68bb ldr r3, [r7, #8]
|
||
8002e90: 603b str r3, [r7, #0]
|
||
while (clst < fs->n_fatent) { /* Not a last link? */
|
||
8002e92: 687b ldr r3, [r7, #4]
|
||
8002e94: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002e98: 683a ldr r2, [r7, #0]
|
||
8002e9a: 429a cmp r2, r3
|
||
8002e9c: d3c2 bcc.n 8002e24 <remove_chain+0x28>
|
||
8002e9e: e002 b.n 8002ea6 <remove_chain+0xaa>
|
||
if (nxt == 0) break; /* Empty cluster? */
|
||
8002ea0: bf00 nop
|
||
8002ea2: e000 b.n 8002ea6 <remove_chain+0xaa>
|
||
if (res != FR_OK) break;
|
||
8002ea4: bf00 nop
|
||
}
|
||
}
|
||
|
||
return res;
|
||
8002ea6: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
8002ea8: 4618 mov r0, r3
|
||
8002eaa: 3710 adds r7, #16
|
||
8002eac: 46bd mov sp, r7
|
||
8002eae: bd80 pop {r7, pc}
|
||
|
||
08002eb0 <create_chain>:
|
||
static
|
||
DWORD create_chain ( /* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */
|
||
FATFS* fs, /* File system object */
|
||
DWORD clst /* Cluster# to stretch. 0 means create a new chain. */
|
||
)
|
||
{
|
||
8002eb0: b580 push {r7, lr}
|
||
8002eb2: b086 sub sp, #24
|
||
8002eb4: af00 add r7, sp, #0
|
||
8002eb6: 6078 str r0, [r7, #4]
|
||
8002eb8: 6039 str r1, [r7, #0]
|
||
DWORD cs, ncl, scl;
|
||
FRESULT res;
|
||
|
||
|
||
if (clst == 0) { /* Create a new chain */
|
||
8002eba: 683b ldr r3, [r7, #0]
|
||
8002ebc: 2b00 cmp r3, #0
|
||
8002ebe: d10f bne.n 8002ee0 <create_chain+0x30>
|
||
scl = fs->last_clust; /* Get suggested start point */
|
||
8002ec0: 687b ldr r3, [r7, #4]
|
||
8002ec2: f8d3 320c ldr.w r3, [r3, #524] ; 0x20c
|
||
8002ec6: 613b str r3, [r7, #16]
|
||
if (!scl || scl >= fs->n_fatent) scl = 1;
|
||
8002ec8: 693b ldr r3, [r7, #16]
|
||
8002eca: 2b00 cmp r3, #0
|
||
8002ecc: d005 beq.n 8002eda <create_chain+0x2a>
|
||
8002ece: 687b ldr r3, [r7, #4]
|
||
8002ed0: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002ed4: 693a ldr r2, [r7, #16]
|
||
8002ed6: 429a cmp r2, r3
|
||
8002ed8: d31c bcc.n 8002f14 <create_chain+0x64>
|
||
8002eda: 2301 movs r3, #1
|
||
8002edc: 613b str r3, [r7, #16]
|
||
8002ede: e019 b.n 8002f14 <create_chain+0x64>
|
||
}
|
||
else { /* Stretch the current chain */
|
||
cs = get_fat(fs, clst); /* Check the cluster status */
|
||
8002ee0: 6839 ldr r1, [r7, #0]
|
||
8002ee2: 6878 ldr r0, [r7, #4]
|
||
8002ee4: f7ff fdc2 bl 8002a6c <get_fat>
|
||
8002ee8: 60b8 str r0, [r7, #8]
|
||
if (cs < 2) return 1; /* Invalid value */
|
||
8002eea: 68bb ldr r3, [r7, #8]
|
||
8002eec: 2b01 cmp r3, #1
|
||
8002eee: d801 bhi.n 8002ef4 <create_chain+0x44>
|
||
8002ef0: 2301 movs r3, #1
|
||
8002ef2: e076 b.n 8002fe2 <create_chain+0x132>
|
||
if (cs == 0xFFFFFFFF) return cs; /* A disk error occurred */
|
||
8002ef4: 68bb ldr r3, [r7, #8]
|
||
8002ef6: f1b3 3fff cmp.w r3, #4294967295
|
||
8002efa: d101 bne.n 8002f00 <create_chain+0x50>
|
||
8002efc: 68bb ldr r3, [r7, #8]
|
||
8002efe: e070 b.n 8002fe2 <create_chain+0x132>
|
||
if (cs < fs->n_fatent) return cs; /* It is already followed by next cluster */
|
||
8002f00: 687b ldr r3, [r7, #4]
|
||
8002f02: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002f06: 68ba ldr r2, [r7, #8]
|
||
8002f08: 429a cmp r2, r3
|
||
8002f0a: d201 bcs.n 8002f10 <create_chain+0x60>
|
||
8002f0c: 68bb ldr r3, [r7, #8]
|
||
8002f0e: e068 b.n 8002fe2 <create_chain+0x132>
|
||
scl = clst;
|
||
8002f10: 683b ldr r3, [r7, #0]
|
||
8002f12: 613b str r3, [r7, #16]
|
||
}
|
||
|
||
ncl = scl; /* Start cluster */
|
||
8002f14: 693b ldr r3, [r7, #16]
|
||
8002f16: 617b str r3, [r7, #20]
|
||
for (;;) {
|
||
ncl++; /* Next cluster */
|
||
8002f18: 697b ldr r3, [r7, #20]
|
||
8002f1a: 3301 adds r3, #1
|
||
8002f1c: 617b str r3, [r7, #20]
|
||
if (ncl >= fs->n_fatent) { /* Check wrap around */
|
||
8002f1e: 687b ldr r3, [r7, #4]
|
||
8002f20: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8002f24: 697a ldr r2, [r7, #20]
|
||
8002f26: 429a cmp r2, r3
|
||
8002f28: d307 bcc.n 8002f3a <create_chain+0x8a>
|
||
ncl = 2;
|
||
8002f2a: 2302 movs r3, #2
|
||
8002f2c: 617b str r3, [r7, #20]
|
||
if (ncl > scl) return 0; /* No free cluster */
|
||
8002f2e: 697a ldr r2, [r7, #20]
|
||
8002f30: 693b ldr r3, [r7, #16]
|
||
8002f32: 429a cmp r2, r3
|
||
8002f34: d901 bls.n 8002f3a <create_chain+0x8a>
|
||
8002f36: 2300 movs r3, #0
|
||
8002f38: e053 b.n 8002fe2 <create_chain+0x132>
|
||
}
|
||
cs = get_fat(fs, ncl); /* Get the cluster status */
|
||
8002f3a: 6979 ldr r1, [r7, #20]
|
||
8002f3c: 6878 ldr r0, [r7, #4]
|
||
8002f3e: f7ff fd95 bl 8002a6c <get_fat>
|
||
8002f42: 60b8 str r0, [r7, #8]
|
||
if (cs == 0) break; /* Found a free cluster */
|
||
8002f44: 68bb ldr r3, [r7, #8]
|
||
8002f46: 2b00 cmp r3, #0
|
||
8002f48: d00e beq.n 8002f68 <create_chain+0xb8>
|
||
if (cs == 0xFFFFFFFF || cs == 1)/* An error occurred */
|
||
8002f4a: 68bb ldr r3, [r7, #8]
|
||
8002f4c: f1b3 3fff cmp.w r3, #4294967295
|
||
8002f50: d002 beq.n 8002f58 <create_chain+0xa8>
|
||
8002f52: 68bb ldr r3, [r7, #8]
|
||
8002f54: 2b01 cmp r3, #1
|
||
8002f56: d101 bne.n 8002f5c <create_chain+0xac>
|
||
return cs;
|
||
8002f58: 68bb ldr r3, [r7, #8]
|
||
8002f5a: e042 b.n 8002fe2 <create_chain+0x132>
|
||
if (ncl == scl) return 0; /* No free cluster */
|
||
8002f5c: 697a ldr r2, [r7, #20]
|
||
8002f5e: 693b ldr r3, [r7, #16]
|
||
8002f60: 429a cmp r2, r3
|
||
8002f62: d1d9 bne.n 8002f18 <create_chain+0x68>
|
||
8002f64: 2300 movs r3, #0
|
||
8002f66: e03c b.n 8002fe2 <create_chain+0x132>
|
||
if (cs == 0) break; /* Found a free cluster */
|
||
8002f68: bf00 nop
|
||
}
|
||
|
||
res = put_fat(fs, ncl, 0x0FFFFFFF); /* Mark the new cluster "last link" */
|
||
8002f6a: f06f 4270 mvn.w r2, #4026531840 ; 0xf0000000
|
||
8002f6e: 6979 ldr r1, [r7, #20]
|
||
8002f70: 6878 ldr r0, [r7, #4]
|
||
8002f72: f7ff fe35 bl 8002be0 <put_fat>
|
||
8002f76: 4603 mov r3, r0
|
||
8002f78: 73fb strb r3, [r7, #15]
|
||
if (res == FR_OK && clst != 0) {
|
||
8002f7a: 7bfb ldrb r3, [r7, #15]
|
||
8002f7c: 2b00 cmp r3, #0
|
||
8002f7e: d109 bne.n 8002f94 <create_chain+0xe4>
|
||
8002f80: 683b ldr r3, [r7, #0]
|
||
8002f82: 2b00 cmp r3, #0
|
||
8002f84: d006 beq.n 8002f94 <create_chain+0xe4>
|
||
res = put_fat(fs, clst, ncl); /* Link it to the previous one if needed */
|
||
8002f86: 697a ldr r2, [r7, #20]
|
||
8002f88: 6839 ldr r1, [r7, #0]
|
||
8002f8a: 6878 ldr r0, [r7, #4]
|
||
8002f8c: f7ff fe28 bl 8002be0 <put_fat>
|
||
8002f90: 4603 mov r3, r0
|
||
8002f92: 73fb strb r3, [r7, #15]
|
||
}
|
||
if (res == FR_OK) {
|
||
8002f94: 7bfb ldrb r3, [r7, #15]
|
||
8002f96: 2b00 cmp r3, #0
|
||
8002f98: d11a bne.n 8002fd0 <create_chain+0x120>
|
||
fs->last_clust = ncl; /* Update FSINFO */
|
||
8002f9a: 687b ldr r3, [r7, #4]
|
||
8002f9c: 697a ldr r2, [r7, #20]
|
||
8002f9e: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
||
if (fs->free_clust != 0xFFFFFFFF) {
|
||
8002fa2: 687b ldr r3, [r7, #4]
|
||
8002fa4: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
8002fa8: f1b3 3fff cmp.w r3, #4294967295
|
||
8002fac: d018 beq.n 8002fe0 <create_chain+0x130>
|
||
fs->free_clust--;
|
||
8002fae: 687b ldr r3, [r7, #4]
|
||
8002fb0: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
8002fb4: 1e5a subs r2, r3, #1
|
||
8002fb6: 687b ldr r3, [r7, #4]
|
||
8002fb8: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
fs->fsi_flag |= 1;
|
||
8002fbc: 687b ldr r3, [r7, #4]
|
||
8002fbe: f893 3205 ldrb.w r3, [r3, #517] ; 0x205
|
||
8002fc2: f043 0301 orr.w r3, r3, #1
|
||
8002fc6: b2da uxtb r2, r3
|
||
8002fc8: 687b ldr r3, [r7, #4]
|
||
8002fca: f883 2205 strb.w r2, [r3, #517] ; 0x205
|
||
8002fce: e007 b.n 8002fe0 <create_chain+0x130>
|
||
}
|
||
} else {
|
||
ncl = (res == FR_DISK_ERR) ? 0xFFFFFFFF : 1;
|
||
8002fd0: 7bfb ldrb r3, [r7, #15]
|
||
8002fd2: 2b01 cmp r3, #1
|
||
8002fd4: d102 bne.n 8002fdc <create_chain+0x12c>
|
||
8002fd6: f04f 33ff mov.w r3, #4294967295
|
||
8002fda: e000 b.n 8002fde <create_chain+0x12e>
|
||
8002fdc: 2301 movs r3, #1
|
||
8002fde: 617b str r3, [r7, #20]
|
||
}
|
||
|
||
return ncl; /* Return new cluster number or error code */
|
||
8002fe0: 697b ldr r3, [r7, #20]
|
||
}
|
||
8002fe2: 4618 mov r0, r3
|
||
8002fe4: 3718 adds r7, #24
|
||
8002fe6: 46bd mov sp, r7
|
||
8002fe8: bd80 pop {r7, pc}
|
||
|
||
08002fea <clmt_clust>:
|
||
static
|
||
DWORD clmt_clust ( /* <2:Error, >=2:Cluster number */
|
||
FIL* fp, /* Pointer to the file object */
|
||
DWORD ofs /* File offset to be converted to cluster# */
|
||
)
|
||
{
|
||
8002fea: b480 push {r7}
|
||
8002fec: b087 sub sp, #28
|
||
8002fee: af00 add r7, sp, #0
|
||
8002ff0: 6078 str r0, [r7, #4]
|
||
8002ff2: 6039 str r1, [r7, #0]
|
||
DWORD cl, ncl, *tbl;
|
||
|
||
|
||
tbl = fp->cltbl + 1; /* Top of CLMT */
|
||
8002ff4: 687b ldr r3, [r7, #4]
|
||
8002ff6: f8d3 3224 ldr.w r3, [r3, #548] ; 0x224
|
||
8002ffa: 3304 adds r3, #4
|
||
8002ffc: 613b str r3, [r7, #16]
|
||
cl = ofs / SS(fp->fs) / fp->fs->csize; /* Cluster order from top of the file */
|
||
8002ffe: 683b ldr r3, [r7, #0]
|
||
8003000: 0a5b lsrs r3, r3, #9
|
||
8003002: 687a ldr r2, [r7, #4]
|
||
8003004: f8d2 2200 ldr.w r2, [r2, #512] ; 0x200
|
||
8003008: f892 2202 ldrb.w r2, [r2, #514] ; 0x202
|
||
800300c: fbb3 f3f2 udiv r3, r3, r2
|
||
8003010: 617b str r3, [r7, #20]
|
||
for (;;) {
|
||
ncl = *tbl++; /* Number of cluters in the fragment */
|
||
8003012: 693b ldr r3, [r7, #16]
|
||
8003014: 1d1a adds r2, r3, #4
|
||
8003016: 613a str r2, [r7, #16]
|
||
8003018: 681b ldr r3, [r3, #0]
|
||
800301a: 60fb str r3, [r7, #12]
|
||
if (!ncl) return 0; /* End of table? (error) */
|
||
800301c: 68fb ldr r3, [r7, #12]
|
||
800301e: 2b00 cmp r3, #0
|
||
8003020: d101 bne.n 8003026 <clmt_clust+0x3c>
|
||
8003022: 2300 movs r3, #0
|
||
8003024: e010 b.n 8003048 <clmt_clust+0x5e>
|
||
if (cl < ncl) break; /* In this fragment? */
|
||
8003026: 697a ldr r2, [r7, #20]
|
||
8003028: 68fb ldr r3, [r7, #12]
|
||
800302a: 429a cmp r2, r3
|
||
800302c: d307 bcc.n 800303e <clmt_clust+0x54>
|
||
cl -= ncl; tbl++; /* Next fragment */
|
||
800302e: 697a ldr r2, [r7, #20]
|
||
8003030: 68fb ldr r3, [r7, #12]
|
||
8003032: 1ad3 subs r3, r2, r3
|
||
8003034: 617b str r3, [r7, #20]
|
||
8003036: 693b ldr r3, [r7, #16]
|
||
8003038: 3304 adds r3, #4
|
||
800303a: 613b str r3, [r7, #16]
|
||
ncl = *tbl++; /* Number of cluters in the fragment */
|
||
800303c: e7e9 b.n 8003012 <clmt_clust+0x28>
|
||
if (cl < ncl) break; /* In this fragment? */
|
||
800303e: bf00 nop
|
||
}
|
||
return cl + *tbl; /* Return the cluster number */
|
||
8003040: 693b ldr r3, [r7, #16]
|
||
8003042: 681a ldr r2, [r3, #0]
|
||
8003044: 697b ldr r3, [r7, #20]
|
||
8003046: 4413 add r3, r2
|
||
}
|
||
8003048: 4618 mov r0, r3
|
||
800304a: 371c adds r7, #28
|
||
800304c: 46bd mov sp, r7
|
||
800304e: bc80 pop {r7}
|
||
8003050: 4770 bx lr
|
||
|
||
08003052 <dir_sdi>:
|
||
static
|
||
FRESULT dir_sdi (
|
||
DIR* dp, /* Pointer to directory object */
|
||
UINT idx /* Index of directory table */
|
||
)
|
||
{
|
||
8003052: b580 push {r7, lr}
|
||
8003054: b086 sub sp, #24
|
||
8003056: af00 add r7, sp, #0
|
||
8003058: 6078 str r0, [r7, #4]
|
||
800305a: 6039 str r1, [r7, #0]
|
||
DWORD clst, sect;
|
||
UINT ic;
|
||
|
||
|
||
dp->index = (WORD)idx; /* Current index */
|
||
800305c: 683b ldr r3, [r7, #0]
|
||
800305e: b29a uxth r2, r3
|
||
8003060: 687b ldr r3, [r7, #4]
|
||
8003062: f8a3 2206 strh.w r2, [r3, #518] ; 0x206
|
||
clst = dp->sclust; /* Table start cluster (0:root) */
|
||
8003066: 687b ldr r3, [r7, #4]
|
||
8003068: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
800306c: 617b str r3, [r7, #20]
|
||
if (clst == 1 || clst >= dp->fs->n_fatent) /* Check start cluster range */
|
||
800306e: 697b ldr r3, [r7, #20]
|
||
8003070: 2b01 cmp r3, #1
|
||
8003072: d007 beq.n 8003084 <dir_sdi+0x32>
|
||
8003074: 687b ldr r3, [r7, #4]
|
||
8003076: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800307a: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
800307e: 697a ldr r2, [r7, #20]
|
||
8003080: 429a cmp r2, r3
|
||
8003082: d301 bcc.n 8003088 <dir_sdi+0x36>
|
||
return FR_INT_ERR;
|
||
8003084: 2302 movs r3, #2
|
||
8003086: e074 b.n 8003172 <dir_sdi+0x120>
|
||
if (!clst && dp->fs->fs_type == FS_FAT32) /* Replace cluster# 0 with root cluster# if in FAT32 */
|
||
8003088: 697b ldr r3, [r7, #20]
|
||
800308a: 2b00 cmp r3, #0
|
||
800308c: d10c bne.n 80030a8 <dir_sdi+0x56>
|
||
800308e: 687b ldr r3, [r7, #4]
|
||
8003090: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003094: f893 3200 ldrb.w r3, [r3, #512] ; 0x200
|
||
8003098: 2b03 cmp r3, #3
|
||
800309a: d105 bne.n 80030a8 <dir_sdi+0x56>
|
||
clst = dp->fs->dirbase;
|
||
800309c: 687b ldr r3, [r7, #4]
|
||
800309e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80030a2: f8d3 3224 ldr.w r3, [r3, #548] ; 0x224
|
||
80030a6: 617b str r3, [r7, #20]
|
||
|
||
if (clst == 0) { /* Static table (root-directory in FAT12/16) */
|
||
80030a8: 697b ldr r3, [r7, #20]
|
||
80030aa: 2b00 cmp r3, #0
|
||
80030ac: d111 bne.n 80030d2 <dir_sdi+0x80>
|
||
if (idx >= dp->fs->n_rootdir) /* Is index out of range? */
|
||
80030ae: 687b ldr r3, [r7, #4]
|
||
80030b0: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80030b4: f8b3 3208 ldrh.w r3, [r3, #520] ; 0x208
|
||
80030b8: 461a mov r2, r3
|
||
80030ba: 683b ldr r3, [r7, #0]
|
||
80030bc: 4293 cmp r3, r2
|
||
80030be: d301 bcc.n 80030c4 <dir_sdi+0x72>
|
||
return FR_INT_ERR;
|
||
80030c0: 2302 movs r3, #2
|
||
80030c2: e056 b.n 8003172 <dir_sdi+0x120>
|
||
sect = dp->fs->dirbase;
|
||
80030c4: 687b ldr r3, [r7, #4]
|
||
80030c6: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80030ca: f8d3 3224 ldr.w r3, [r3, #548] ; 0x224
|
||
80030ce: 613b str r3, [r7, #16]
|
||
80030d0: e032 b.n 8003138 <dir_sdi+0xe6>
|
||
}
|
||
else { /* Dynamic table (root-directory in FAT32 or sub-directory) */
|
||
ic = SS(dp->fs) / SZ_DIRE * dp->fs->csize; /* Entries per cluster */
|
||
80030d2: 687b ldr r3, [r7, #4]
|
||
80030d4: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80030d8: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
80030dc: 011b lsls r3, r3, #4
|
||
80030de: 60fb str r3, [r7, #12]
|
||
while (idx >= ic) { /* Follow cluster chain */
|
||
80030e0: e01e b.n 8003120 <dir_sdi+0xce>
|
||
clst = get_fat(dp->fs, clst); /* Get next cluster */
|
||
80030e2: 687b ldr r3, [r7, #4]
|
||
80030e4: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80030e8: 6979 ldr r1, [r7, #20]
|
||
80030ea: 4618 mov r0, r3
|
||
80030ec: f7ff fcbe bl 8002a6c <get_fat>
|
||
80030f0: 6178 str r0, [r7, #20]
|
||
if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */
|
||
80030f2: 697b ldr r3, [r7, #20]
|
||
80030f4: f1b3 3fff cmp.w r3, #4294967295
|
||
80030f8: d101 bne.n 80030fe <dir_sdi+0xac>
|
||
80030fa: 2301 movs r3, #1
|
||
80030fc: e039 b.n 8003172 <dir_sdi+0x120>
|
||
if (clst < 2 || clst >= dp->fs->n_fatent) /* Reached to end of table or internal error */
|
||
80030fe: 697b ldr r3, [r7, #20]
|
||
8003100: 2b01 cmp r3, #1
|
||
8003102: d907 bls.n 8003114 <dir_sdi+0xc2>
|
||
8003104: 687b ldr r3, [r7, #4]
|
||
8003106: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800310a: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
800310e: 697a ldr r2, [r7, #20]
|
||
8003110: 429a cmp r2, r3
|
||
8003112: d301 bcc.n 8003118 <dir_sdi+0xc6>
|
||
return FR_INT_ERR;
|
||
8003114: 2302 movs r3, #2
|
||
8003116: e02c b.n 8003172 <dir_sdi+0x120>
|
||
idx -= ic;
|
||
8003118: 683a ldr r2, [r7, #0]
|
||
800311a: 68fb ldr r3, [r7, #12]
|
||
800311c: 1ad3 subs r3, r2, r3
|
||
800311e: 603b str r3, [r7, #0]
|
||
while (idx >= ic) { /* Follow cluster chain */
|
||
8003120: 683a ldr r2, [r7, #0]
|
||
8003122: 68fb ldr r3, [r7, #12]
|
||
8003124: 429a cmp r2, r3
|
||
8003126: d2dc bcs.n 80030e2 <dir_sdi+0x90>
|
||
}
|
||
sect = clust2sect(dp->fs, clst);
|
||
8003128: 687b ldr r3, [r7, #4]
|
||
800312a: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800312e: 6979 ldr r1, [r7, #20]
|
||
8003130: 4618 mov r0, r3
|
||
8003132: f7ff fc7a bl 8002a2a <clust2sect>
|
||
8003136: 6138 str r0, [r7, #16]
|
||
}
|
||
dp->clust = clst; /* Current cluster# */
|
||
8003138: 687b ldr r3, [r7, #4]
|
||
800313a: 697a ldr r2, [r7, #20]
|
||
800313c: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
||
if (!sect) return FR_INT_ERR;
|
||
8003140: 693b ldr r3, [r7, #16]
|
||
8003142: 2b00 cmp r3, #0
|
||
8003144: d101 bne.n 800314a <dir_sdi+0xf8>
|
||
8003146: 2302 movs r3, #2
|
||
8003148: e013 b.n 8003172 <dir_sdi+0x120>
|
||
dp->sect = sect + idx / (SS(dp->fs) / SZ_DIRE); /* Sector# of the directory entry */
|
||
800314a: 683b ldr r3, [r7, #0]
|
||
800314c: 091a lsrs r2, r3, #4
|
||
800314e: 693b ldr r3, [r7, #16]
|
||
8003150: 441a add r2, r3
|
||
8003152: 687b ldr r3, [r7, #4]
|
||
8003154: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
dp->dir = dp->fs->win.d8 + (idx % (SS(dp->fs) / SZ_DIRE)) * SZ_DIRE; /* Ptr to the entry in the sector */
|
||
8003158: 687b ldr r3, [r7, #4]
|
||
800315a: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800315e: 461a mov r2, r3
|
||
8003160: 683b ldr r3, [r7, #0]
|
||
8003162: f003 030f and.w r3, r3, #15
|
||
8003166: 015b lsls r3, r3, #5
|
||
8003168: 441a add r2, r3
|
||
800316a: 687b ldr r3, [r7, #4]
|
||
800316c: f8c3 2214 str.w r2, [r3, #532] ; 0x214
|
||
|
||
return FR_OK;
|
||
8003170: 2300 movs r3, #0
|
||
}
|
||
8003172: 4618 mov r0, r3
|
||
8003174: 3718 adds r7, #24
|
||
8003176: 46bd mov sp, r7
|
||
8003178: bd80 pop {r7, pc}
|
||
|
||
0800317a <dir_next>:
|
||
static
|
||
FRESULT dir_next ( /* FR_OK:Succeeded, FR_NO_FILE:End of table, FR_DENIED:Could not stretch */
|
||
DIR* dp, /* Pointer to the directory object */
|
||
int stretch /* 0: Do not stretch table, 1: Stretch table if needed */
|
||
)
|
||
{
|
||
800317a: b590 push {r4, r7, lr}
|
||
800317c: b087 sub sp, #28
|
||
800317e: af00 add r7, sp, #0
|
||
8003180: 6078 str r0, [r7, #4]
|
||
8003182: 6039 str r1, [r7, #0]
|
||
#if !_FS_READONLY
|
||
UINT c;
|
||
#endif
|
||
|
||
|
||
i = dp->index + 1;
|
||
8003184: 687b ldr r3, [r7, #4]
|
||
8003186: f8b3 3206 ldrh.w r3, [r3, #518] ; 0x206
|
||
800318a: 3301 adds r3, #1
|
||
800318c: 60fb str r3, [r7, #12]
|
||
if (!(i & 0xFFFF) || !dp->sect) /* Report EOT when index has reached 65535 */
|
||
800318e: 68fb ldr r3, [r7, #12]
|
||
8003190: b29b uxth r3, r3
|
||
8003192: 2b00 cmp r3, #0
|
||
8003194: d004 beq.n 80031a0 <dir_next+0x26>
|
||
8003196: 687b ldr r3, [r7, #4]
|
||
8003198: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
800319c: 2b00 cmp r3, #0
|
||
800319e: d101 bne.n 80031a4 <dir_next+0x2a>
|
||
return FR_NO_FILE;
|
||
80031a0: 2304 movs r3, #4
|
||
80031a2: e0dd b.n 8003360 <dir_next+0x1e6>
|
||
|
||
if (!(i % (SS(dp->fs) / SZ_DIRE))) { /* Sector changed? */
|
||
80031a4: 68fb ldr r3, [r7, #12]
|
||
80031a6: f003 030f and.w r3, r3, #15
|
||
80031aa: 2b00 cmp r3, #0
|
||
80031ac: f040 80c6 bne.w 800333c <dir_next+0x1c2>
|
||
dp->sect++; /* Next sector */
|
||
80031b0: 687b ldr r3, [r7, #4]
|
||
80031b2: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
80031b6: 1c5a adds r2, r3, #1
|
||
80031b8: 687b ldr r3, [r7, #4]
|
||
80031ba: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
|
||
if (!dp->clust) { /* Static table */
|
||
80031be: 687b ldr r3, [r7, #4]
|
||
80031c0: f8d3 320c ldr.w r3, [r3, #524] ; 0x20c
|
||
80031c4: 2b00 cmp r3, #0
|
||
80031c6: d10b bne.n 80031e0 <dir_next+0x66>
|
||
if (i >= dp->fs->n_rootdir) /* Report EOT if it reached end of static table */
|
||
80031c8: 687b ldr r3, [r7, #4]
|
||
80031ca: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80031ce: f8b3 3208 ldrh.w r3, [r3, #520] ; 0x208
|
||
80031d2: 461a mov r2, r3
|
||
80031d4: 68fb ldr r3, [r7, #12]
|
||
80031d6: 4293 cmp r3, r2
|
||
80031d8: f0c0 80b0 bcc.w 800333c <dir_next+0x1c2>
|
||
return FR_NO_FILE;
|
||
80031dc: 2304 movs r3, #4
|
||
80031de: e0bf b.n 8003360 <dir_next+0x1e6>
|
||
}
|
||
else { /* Dynamic table */
|
||
if (((i / (SS(dp->fs) / SZ_DIRE)) & (dp->fs->csize - 1)) == 0) { /* Cluster changed? */
|
||
80031e0: 68fb ldr r3, [r7, #12]
|
||
80031e2: 091b lsrs r3, r3, #4
|
||
80031e4: 687a ldr r2, [r7, #4]
|
||
80031e6: f8d2 2200 ldr.w r2, [r2, #512] ; 0x200
|
||
80031ea: f892 2202 ldrb.w r2, [r2, #514] ; 0x202
|
||
80031ee: 3a01 subs r2, #1
|
||
80031f0: 4013 ands r3, r2
|
||
80031f2: 2b00 cmp r3, #0
|
||
80031f4: f040 80a2 bne.w 800333c <dir_next+0x1c2>
|
||
clst = get_fat(dp->fs, dp->clust); /* Get next cluster */
|
||
80031f8: 687b ldr r3, [r7, #4]
|
||
80031fa: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
80031fe: 687b ldr r3, [r7, #4]
|
||
8003200: f8d3 320c ldr.w r3, [r3, #524] ; 0x20c
|
||
8003204: 4619 mov r1, r3
|
||
8003206: 4610 mov r0, r2
|
||
8003208: f7ff fc30 bl 8002a6c <get_fat>
|
||
800320c: 6178 str r0, [r7, #20]
|
||
if (clst <= 1) return FR_INT_ERR;
|
||
800320e: 697b ldr r3, [r7, #20]
|
||
8003210: 2b01 cmp r3, #1
|
||
8003212: d801 bhi.n 8003218 <dir_next+0x9e>
|
||
8003214: 2302 movs r3, #2
|
||
8003216: e0a3 b.n 8003360 <dir_next+0x1e6>
|
||
if (clst == 0xFFFFFFFF) return FR_DISK_ERR;
|
||
8003218: 697b ldr r3, [r7, #20]
|
||
800321a: f1b3 3fff cmp.w r3, #4294967295
|
||
800321e: d101 bne.n 8003224 <dir_next+0xaa>
|
||
8003220: 2301 movs r3, #1
|
||
8003222: e09d b.n 8003360 <dir_next+0x1e6>
|
||
if (clst >= dp->fs->n_fatent) { /* If it reached end of dynamic table, */
|
||
8003224: 687b ldr r3, [r7, #4]
|
||
8003226: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800322a: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
800322e: 697a ldr r2, [r7, #20]
|
||
8003230: 429a cmp r2, r3
|
||
8003232: d374 bcc.n 800331e <dir_next+0x1a4>
|
||
#if !_FS_READONLY
|
||
if (!stretch) return FR_NO_FILE; /* If do not stretch, report EOT */
|
||
8003234: 683b ldr r3, [r7, #0]
|
||
8003236: 2b00 cmp r3, #0
|
||
8003238: d101 bne.n 800323e <dir_next+0xc4>
|
||
800323a: 2304 movs r3, #4
|
||
800323c: e090 b.n 8003360 <dir_next+0x1e6>
|
||
clst = create_chain(dp->fs, dp->clust); /* Stretch cluster chain */
|
||
800323e: 687b ldr r3, [r7, #4]
|
||
8003240: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
8003244: 687b ldr r3, [r7, #4]
|
||
8003246: f8d3 320c ldr.w r3, [r3, #524] ; 0x20c
|
||
800324a: 4619 mov r1, r3
|
||
800324c: 4610 mov r0, r2
|
||
800324e: f7ff fe2f bl 8002eb0 <create_chain>
|
||
8003252: 6178 str r0, [r7, #20]
|
||
if (clst == 0) return FR_DENIED; /* No free cluster */
|
||
8003254: 697b ldr r3, [r7, #20]
|
||
8003256: 2b00 cmp r3, #0
|
||
8003258: d101 bne.n 800325e <dir_next+0xe4>
|
||
800325a: 2307 movs r3, #7
|
||
800325c: e080 b.n 8003360 <dir_next+0x1e6>
|
||
if (clst == 1) return FR_INT_ERR;
|
||
800325e: 697b ldr r3, [r7, #20]
|
||
8003260: 2b01 cmp r3, #1
|
||
8003262: d101 bne.n 8003268 <dir_next+0xee>
|
||
8003264: 2302 movs r3, #2
|
||
8003266: e07b b.n 8003360 <dir_next+0x1e6>
|
||
if (clst == 0xFFFFFFFF) return FR_DISK_ERR;
|
||
8003268: 697b ldr r3, [r7, #20]
|
||
800326a: f1b3 3fff cmp.w r3, #4294967295
|
||
800326e: d101 bne.n 8003274 <dir_next+0xfa>
|
||
8003270: 2301 movs r3, #1
|
||
8003272: e075 b.n 8003360 <dir_next+0x1e6>
|
||
/* Clean-up stretched table */
|
||
if (sync_window(dp->fs)) return FR_DISK_ERR;/* Flush disk access window */
|
||
8003274: 687b ldr r3, [r7, #4]
|
||
8003276: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800327a: 4618 mov r0, r3
|
||
800327c: f7ff fb5e bl 800293c <sync_window>
|
||
8003280: 4603 mov r3, r0
|
||
8003282: 2b00 cmp r3, #0
|
||
8003284: d001 beq.n 800328a <dir_next+0x110>
|
||
8003286: 2301 movs r3, #1
|
||
8003288: e06a b.n 8003360 <dir_next+0x1e6>
|
||
mem_set(dp->fs->win.d8, 0, SS(dp->fs)); /* Clear window buffer */
|
||
800328a: 687b ldr r3, [r7, #4]
|
||
800328c: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003290: f44f 7200 mov.w r2, #512 ; 0x200
|
||
8003294: 2100 movs r1, #0
|
||
8003296: 4618 mov r0, r3
|
||
8003298: f7ff f986 bl 80025a8 <mem_set>
|
||
dp->fs->winsect = clust2sect(dp->fs, clst); /* Cluster start sector */
|
||
800329c: 687b ldr r3, [r7, #4]
|
||
800329e: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
80032a2: 687b ldr r3, [r7, #4]
|
||
80032a4: f8d3 4200 ldr.w r4, [r3, #512] ; 0x200
|
||
80032a8: 6979 ldr r1, [r7, #20]
|
||
80032aa: 4610 mov r0, r2
|
||
80032ac: f7ff fbbd bl 8002a2a <clust2sect>
|
||
80032b0: 4603 mov r3, r0
|
||
80032b2: f8c4 322c str.w r3, [r4, #556] ; 0x22c
|
||
for (c = 0; c < dp->fs->csize; c++) { /* Fill the new cluster with 0 */
|
||
80032b6: 2300 movs r3, #0
|
||
80032b8: 613b str r3, [r7, #16]
|
||
80032ba: e01b b.n 80032f4 <dir_next+0x17a>
|
||
dp->fs->wflag = 1;
|
||
80032bc: 687b ldr r3, [r7, #4]
|
||
80032be: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80032c2: 2201 movs r2, #1
|
||
80032c4: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
if (sync_window(dp->fs)) return FR_DISK_ERR;
|
||
80032c8: 687b ldr r3, [r7, #4]
|
||
80032ca: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80032ce: 4618 mov r0, r3
|
||
80032d0: f7ff fb34 bl 800293c <sync_window>
|
||
80032d4: 4603 mov r3, r0
|
||
80032d6: 2b00 cmp r3, #0
|
||
80032d8: d001 beq.n 80032de <dir_next+0x164>
|
||
80032da: 2301 movs r3, #1
|
||
80032dc: e040 b.n 8003360 <dir_next+0x1e6>
|
||
dp->fs->winsect++;
|
||
80032de: 687b ldr r3, [r7, #4]
|
||
80032e0: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80032e4: f8d3 222c ldr.w r2, [r3, #556] ; 0x22c
|
||
80032e8: 3201 adds r2, #1
|
||
80032ea: f8c3 222c str.w r2, [r3, #556] ; 0x22c
|
||
for (c = 0; c < dp->fs->csize; c++) { /* Fill the new cluster with 0 */
|
||
80032ee: 693b ldr r3, [r7, #16]
|
||
80032f0: 3301 adds r3, #1
|
||
80032f2: 613b str r3, [r7, #16]
|
||
80032f4: 687b ldr r3, [r7, #4]
|
||
80032f6: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80032fa: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
80032fe: 461a mov r2, r3
|
||
8003300: 693b ldr r3, [r7, #16]
|
||
8003302: 4293 cmp r3, r2
|
||
8003304: d3da bcc.n 80032bc <dir_next+0x142>
|
||
}
|
||
dp->fs->winsect -= c; /* Rewind window offset */
|
||
8003306: 687b ldr r3, [r7, #4]
|
||
8003308: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800330c: f8d3 122c ldr.w r1, [r3, #556] ; 0x22c
|
||
8003310: 687b ldr r3, [r7, #4]
|
||
8003312: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003316: 693a ldr r2, [r7, #16]
|
||
8003318: 1a8a subs r2, r1, r2
|
||
800331a: f8c3 222c str.w r2, [r3, #556] ; 0x22c
|
||
#else
|
||
if (!stretch) return FR_NO_FILE; /* If do not stretch, report EOT (this is to suppress warning) */
|
||
return FR_NO_FILE; /* Report EOT */
|
||
#endif
|
||
}
|
||
dp->clust = clst; /* Initialize data for new cluster */
|
||
800331e: 687b ldr r3, [r7, #4]
|
||
8003320: 697a ldr r2, [r7, #20]
|
||
8003322: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
||
dp->sect = clust2sect(dp->fs, clst);
|
||
8003326: 687b ldr r3, [r7, #4]
|
||
8003328: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800332c: 6979 ldr r1, [r7, #20]
|
||
800332e: 4618 mov r0, r3
|
||
8003330: f7ff fb7b bl 8002a2a <clust2sect>
|
||
8003334: 4602 mov r2, r0
|
||
8003336: 687b ldr r3, [r7, #4]
|
||
8003338: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
}
|
||
}
|
||
}
|
||
|
||
dp->index = (WORD)i; /* Current index */
|
||
800333c: 68fb ldr r3, [r7, #12]
|
||
800333e: b29a uxth r2, r3
|
||
8003340: 687b ldr r3, [r7, #4]
|
||
8003342: f8a3 2206 strh.w r2, [r3, #518] ; 0x206
|
||
dp->dir = dp->fs->win.d8 + (i % (SS(dp->fs) / SZ_DIRE)) * SZ_DIRE; /* Current entry in the window */
|
||
8003346: 687b ldr r3, [r7, #4]
|
||
8003348: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800334c: 461a mov r2, r3
|
||
800334e: 68fb ldr r3, [r7, #12]
|
||
8003350: f003 030f and.w r3, r3, #15
|
||
8003354: 015b lsls r3, r3, #5
|
||
8003356: 441a add r2, r3
|
||
8003358: 687b ldr r3, [r7, #4]
|
||
800335a: f8c3 2214 str.w r2, [r3, #532] ; 0x214
|
||
|
||
return FR_OK;
|
||
800335e: 2300 movs r3, #0
|
||
}
|
||
8003360: 4618 mov r0, r3
|
||
8003362: 371c adds r7, #28
|
||
8003364: 46bd mov sp, r7
|
||
8003366: bd90 pop {r4, r7, pc}
|
||
|
||
08003368 <dir_alloc>:
|
||
static
|
||
FRESULT dir_alloc (
|
||
DIR* dp, /* Pointer to the directory object */
|
||
UINT nent /* Number of contiguous entries to allocate (1-21) */
|
||
)
|
||
{
|
||
8003368: b580 push {r7, lr}
|
||
800336a: b084 sub sp, #16
|
||
800336c: af00 add r7, sp, #0
|
||
800336e: 6078 str r0, [r7, #4]
|
||
8003370: 6039 str r1, [r7, #0]
|
||
FRESULT res;
|
||
UINT n;
|
||
|
||
|
||
res = dir_sdi(dp, 0);
|
||
8003372: 2100 movs r1, #0
|
||
8003374: 6878 ldr r0, [r7, #4]
|
||
8003376: f7ff fe6c bl 8003052 <dir_sdi>
|
||
800337a: 4603 mov r3, r0
|
||
800337c: 73fb strb r3, [r7, #15]
|
||
if (res == FR_OK) {
|
||
800337e: 7bfb ldrb r3, [r7, #15]
|
||
8003380: 2b00 cmp r3, #0
|
||
8003382: d131 bne.n 80033e8 <dir_alloc+0x80>
|
||
n = 0;
|
||
8003384: 2300 movs r3, #0
|
||
8003386: 60bb str r3, [r7, #8]
|
||
do {
|
||
res = move_window(dp->fs, dp->sect);
|
||
8003388: 687b ldr r3, [r7, #4]
|
||
800338a: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
800338e: 687b ldr r3, [r7, #4]
|
||
8003390: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
8003394: 4619 mov r1, r3
|
||
8003396: 4610 mov r0, r2
|
||
8003398: f7ff fb19 bl 80029ce <move_window>
|
||
800339c: 4603 mov r3, r0
|
||
800339e: 73fb strb r3, [r7, #15]
|
||
if (res != FR_OK) break;
|
||
80033a0: 7bfb ldrb r3, [r7, #15]
|
||
80033a2: 2b00 cmp r3, #0
|
||
80033a4: d11f bne.n 80033e6 <dir_alloc+0x7e>
|
||
if (dp->dir[0] == DDEM || dp->dir[0] == 0) { /* Is it a free entry? */
|
||
80033a6: 687b ldr r3, [r7, #4]
|
||
80033a8: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
80033ac: 781b ldrb r3, [r3, #0]
|
||
80033ae: 2be5 cmp r3, #229 ; 0xe5
|
||
80033b0: d005 beq.n 80033be <dir_alloc+0x56>
|
||
80033b2: 687b ldr r3, [r7, #4]
|
||
80033b4: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
80033b8: 781b ldrb r3, [r3, #0]
|
||
80033ba: 2b00 cmp r3, #0
|
||
80033bc: d107 bne.n 80033ce <dir_alloc+0x66>
|
||
if (++n == nent) break; /* A block of contiguous free entries is found */
|
||
80033be: 68bb ldr r3, [r7, #8]
|
||
80033c0: 3301 adds r3, #1
|
||
80033c2: 60bb str r3, [r7, #8]
|
||
80033c4: 68ba ldr r2, [r7, #8]
|
||
80033c6: 683b ldr r3, [r7, #0]
|
||
80033c8: 429a cmp r2, r3
|
||
80033ca: d102 bne.n 80033d2 <dir_alloc+0x6a>
|
||
80033cc: e00c b.n 80033e8 <dir_alloc+0x80>
|
||
} else {
|
||
n = 0; /* Not a blank entry. Restart to search */
|
||
80033ce: 2300 movs r3, #0
|
||
80033d0: 60bb str r3, [r7, #8]
|
||
}
|
||
res = dir_next(dp, 1); /* Next entry with table stretch enabled */
|
||
80033d2: 2101 movs r1, #1
|
||
80033d4: 6878 ldr r0, [r7, #4]
|
||
80033d6: f7ff fed0 bl 800317a <dir_next>
|
||
80033da: 4603 mov r3, r0
|
||
80033dc: 73fb strb r3, [r7, #15]
|
||
} while (res == FR_OK);
|
||
80033de: 7bfb ldrb r3, [r7, #15]
|
||
80033e0: 2b00 cmp r3, #0
|
||
80033e2: d0d1 beq.n 8003388 <dir_alloc+0x20>
|
||
80033e4: e000 b.n 80033e8 <dir_alloc+0x80>
|
||
if (res != FR_OK) break;
|
||
80033e6: bf00 nop
|
||
}
|
||
if (res == FR_NO_FILE) res = FR_DENIED; /* No directory entry to allocate */
|
||
80033e8: 7bfb ldrb r3, [r7, #15]
|
||
80033ea: 2b04 cmp r3, #4
|
||
80033ec: d101 bne.n 80033f2 <dir_alloc+0x8a>
|
||
80033ee: 2307 movs r3, #7
|
||
80033f0: 73fb strb r3, [r7, #15]
|
||
return res;
|
||
80033f2: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
80033f4: 4618 mov r0, r3
|
||
80033f6: 3710 adds r7, #16
|
||
80033f8: 46bd mov sp, r7
|
||
80033fa: bd80 pop {r7, pc}
|
||
|
||
080033fc <ld_clust>:
|
||
static
|
||
DWORD ld_clust (
|
||
FATFS* fs, /* Pointer to the fs object */
|
||
BYTE* dir /* Pointer to the directory entry */
|
||
)
|
||
{
|
||
80033fc: b480 push {r7}
|
||
80033fe: b085 sub sp, #20
|
||
8003400: af00 add r7, sp, #0
|
||
8003402: 6078 str r0, [r7, #4]
|
||
8003404: 6039 str r1, [r7, #0]
|
||
DWORD cl;
|
||
|
||
cl = LD_WORD(dir + DIR_FstClusLO);
|
||
8003406: 683b ldr r3, [r7, #0]
|
||
8003408: 331b adds r3, #27
|
||
800340a: 781b ldrb r3, [r3, #0]
|
||
800340c: 021b lsls r3, r3, #8
|
||
800340e: b21a sxth r2, r3
|
||
8003410: 683b ldr r3, [r7, #0]
|
||
8003412: 331a adds r3, #26
|
||
8003414: 781b ldrb r3, [r3, #0]
|
||
8003416: b21b sxth r3, r3
|
||
8003418: 4313 orrs r3, r2
|
||
800341a: b21b sxth r3, r3
|
||
800341c: b29b uxth r3, r3
|
||
800341e: 60fb str r3, [r7, #12]
|
||
if (fs->fs_type == FS_FAT32)
|
||
8003420: 687b ldr r3, [r7, #4]
|
||
8003422: f893 3200 ldrb.w r3, [r3, #512] ; 0x200
|
||
8003426: 2b03 cmp r3, #3
|
||
8003428: d10f bne.n 800344a <ld_clust+0x4e>
|
||
cl |= (DWORD)LD_WORD(dir + DIR_FstClusHI) << 16;
|
||
800342a: 683b ldr r3, [r7, #0]
|
||
800342c: 3315 adds r3, #21
|
||
800342e: 781b ldrb r3, [r3, #0]
|
||
8003430: 021b lsls r3, r3, #8
|
||
8003432: b21a sxth r2, r3
|
||
8003434: 683b ldr r3, [r7, #0]
|
||
8003436: 3314 adds r3, #20
|
||
8003438: 781b ldrb r3, [r3, #0]
|
||
800343a: b21b sxth r3, r3
|
||
800343c: 4313 orrs r3, r2
|
||
800343e: b21b sxth r3, r3
|
||
8003440: b29b uxth r3, r3
|
||
8003442: 041b lsls r3, r3, #16
|
||
8003444: 68fa ldr r2, [r7, #12]
|
||
8003446: 4313 orrs r3, r2
|
||
8003448: 60fb str r3, [r7, #12]
|
||
|
||
return cl;
|
||
800344a: 68fb ldr r3, [r7, #12]
|
||
}
|
||
800344c: 4618 mov r0, r3
|
||
800344e: 3714 adds r7, #20
|
||
8003450: 46bd mov sp, r7
|
||
8003452: bc80 pop {r7}
|
||
8003454: 4770 bx lr
|
||
|
||
08003456 <st_clust>:
|
||
static
|
||
void st_clust (
|
||
BYTE* dir, /* Pointer to the directory entry */
|
||
DWORD cl /* Value to be set */
|
||
)
|
||
{
|
||
8003456: b480 push {r7}
|
||
8003458: b083 sub sp, #12
|
||
800345a: af00 add r7, sp, #0
|
||
800345c: 6078 str r0, [r7, #4]
|
||
800345e: 6039 str r1, [r7, #0]
|
||
ST_WORD(dir + DIR_FstClusLO, cl);
|
||
8003460: 687b ldr r3, [r7, #4]
|
||
8003462: 331a adds r3, #26
|
||
8003464: 683a ldr r2, [r7, #0]
|
||
8003466: b2d2 uxtb r2, r2
|
||
8003468: 701a strb r2, [r3, #0]
|
||
800346a: 683b ldr r3, [r7, #0]
|
||
800346c: b29b uxth r3, r3
|
||
800346e: 0a1b lsrs r3, r3, #8
|
||
8003470: b29a uxth r2, r3
|
||
8003472: 687b ldr r3, [r7, #4]
|
||
8003474: 331b adds r3, #27
|
||
8003476: b2d2 uxtb r2, r2
|
||
8003478: 701a strb r2, [r3, #0]
|
||
ST_WORD(dir + DIR_FstClusHI, cl >> 16);
|
||
800347a: 683b ldr r3, [r7, #0]
|
||
800347c: 0c1a lsrs r2, r3, #16
|
||
800347e: 687b ldr r3, [r7, #4]
|
||
8003480: 3314 adds r3, #20
|
||
8003482: b2d2 uxtb r2, r2
|
||
8003484: 701a strb r2, [r3, #0]
|
||
8003486: 683b ldr r3, [r7, #0]
|
||
8003488: 0c1b lsrs r3, r3, #16
|
||
800348a: b29b uxth r3, r3
|
||
800348c: 0a1b lsrs r3, r3, #8
|
||
800348e: b29a uxth r2, r3
|
||
8003490: 687b ldr r3, [r7, #4]
|
||
8003492: 3315 adds r3, #21
|
||
8003494: b2d2 uxtb r2, r2
|
||
8003496: 701a strb r2, [r3, #0]
|
||
}
|
||
8003498: bf00 nop
|
||
800349a: 370c adds r7, #12
|
||
800349c: 46bd mov sp, r7
|
||
800349e: bc80 pop {r7}
|
||
80034a0: 4770 bx lr
|
||
|
||
080034a2 <dir_find>:
|
||
|
||
static
|
||
FRESULT dir_find (
|
||
DIR* dp /* Pointer to the directory object linked to the file name */
|
||
)
|
||
{
|
||
80034a2: b580 push {r7, lr}
|
||
80034a4: b086 sub sp, #24
|
||
80034a6: af00 add r7, sp, #0
|
||
80034a8: 6078 str r0, [r7, #4]
|
||
BYTE c, *dir;
|
||
#if _USE_LFN
|
||
BYTE a, ord, sum;
|
||
#endif
|
||
|
||
res = dir_sdi(dp, 0); /* Rewind directory object */
|
||
80034aa: 2100 movs r1, #0
|
||
80034ac: 6878 ldr r0, [r7, #4]
|
||
80034ae: f7ff fdd0 bl 8003052 <dir_sdi>
|
||
80034b2: 4603 mov r3, r0
|
||
80034b4: 75fb strb r3, [r7, #23]
|
||
if (res != FR_OK) return res;
|
||
80034b6: 7dfb ldrb r3, [r7, #23]
|
||
80034b8: 2b00 cmp r3, #0
|
||
80034ba: d001 beq.n 80034c0 <dir_find+0x1e>
|
||
80034bc: 7dfb ldrb r3, [r7, #23]
|
||
80034be: e03b b.n 8003538 <dir_find+0x96>
|
||
|
||
#if _USE_LFN
|
||
ord = sum = 0xFF; dp->lfn_idx = 0xFFFF; /* Reset LFN sequence */
|
||
#endif
|
||
do {
|
||
res = move_window(dp->fs, dp->sect);
|
||
80034c0: 687b ldr r3, [r7, #4]
|
||
80034c2: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
80034c6: 687b ldr r3, [r7, #4]
|
||
80034c8: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
80034cc: 4619 mov r1, r3
|
||
80034ce: 4610 mov r0, r2
|
||
80034d0: f7ff fa7d bl 80029ce <move_window>
|
||
80034d4: 4603 mov r3, r0
|
||
80034d6: 75fb strb r3, [r7, #23]
|
||
if (res != FR_OK) break;
|
||
80034d8: 7dfb ldrb r3, [r7, #23]
|
||
80034da: 2b00 cmp r3, #0
|
||
80034dc: d128 bne.n 8003530 <dir_find+0x8e>
|
||
dir = dp->dir; /* Ptr to the directory entry of current index */
|
||
80034de: 687b ldr r3, [r7, #4]
|
||
80034e0: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
80034e4: 613b str r3, [r7, #16]
|
||
c = dir[DIR_Name];
|
||
80034e6: 693b ldr r3, [r7, #16]
|
||
80034e8: 781b ldrb r3, [r3, #0]
|
||
80034ea: 73fb strb r3, [r7, #15]
|
||
if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */
|
||
80034ec: 7bfb ldrb r3, [r7, #15]
|
||
80034ee: 2b00 cmp r3, #0
|
||
80034f0: d102 bne.n 80034f8 <dir_find+0x56>
|
||
80034f2: 2304 movs r3, #4
|
||
80034f4: 75fb strb r3, [r7, #23]
|
||
80034f6: e01e b.n 8003536 <dir_find+0x94>
|
||
if (!(dp->fn[NSFLAG] & NS_LOSS) && !mem_cmp(dir, dp->fn, 11)) break; /* SFN matched? */
|
||
ord = 0xFF; dp->lfn_idx = 0xFFFF; /* Reset LFN sequence */
|
||
}
|
||
}
|
||
#else /* Non LFN configuration */
|
||
if (!(dir[DIR_Attr] & AM_VOL) && !mem_cmp(dir, dp->fn, 11)) /* Is it a valid entry? */
|
||
80034f8: 693b ldr r3, [r7, #16]
|
||
80034fa: 330b adds r3, #11
|
||
80034fc: 781b ldrb r3, [r3, #0]
|
||
80034fe: f003 0308 and.w r3, r3, #8
|
||
8003502: 2b00 cmp r3, #0
|
||
8003504: d10a bne.n 800351c <dir_find+0x7a>
|
||
8003506: 687b ldr r3, [r7, #4]
|
||
8003508: f8d3 3218 ldr.w r3, [r3, #536] ; 0x218
|
||
800350c: 220b movs r2, #11
|
||
800350e: 4619 mov r1, r3
|
||
8003510: 6938 ldr r0, [r7, #16]
|
||
8003512: f7ff f863 bl 80025dc <mem_cmp>
|
||
8003516: 4603 mov r3, r0
|
||
8003518: 2b00 cmp r3, #0
|
||
800351a: d00b beq.n 8003534 <dir_find+0x92>
|
||
break;
|
||
#endif
|
||
res = dir_next(dp, 0); /* Next entry */
|
||
800351c: 2100 movs r1, #0
|
||
800351e: 6878 ldr r0, [r7, #4]
|
||
8003520: f7ff fe2b bl 800317a <dir_next>
|
||
8003524: 4603 mov r3, r0
|
||
8003526: 75fb strb r3, [r7, #23]
|
||
} while (res == FR_OK);
|
||
8003528: 7dfb ldrb r3, [r7, #23]
|
||
800352a: 2b00 cmp r3, #0
|
||
800352c: d0c8 beq.n 80034c0 <dir_find+0x1e>
|
||
800352e: e002 b.n 8003536 <dir_find+0x94>
|
||
if (res != FR_OK) break;
|
||
8003530: bf00 nop
|
||
8003532: e000 b.n 8003536 <dir_find+0x94>
|
||
break;
|
||
8003534: bf00 nop
|
||
|
||
return res;
|
||
8003536: 7dfb ldrb r3, [r7, #23]
|
||
}
|
||
8003538: 4618 mov r0, r3
|
||
800353a: 3718 adds r7, #24
|
||
800353c: 46bd mov sp, r7
|
||
800353e: bd80 pop {r7, pc}
|
||
|
||
08003540 <dir_register>:
|
||
#if !_FS_READONLY
|
||
static
|
||
FRESULT dir_register ( /* FR_OK:Successful, FR_DENIED:No free entry or too many SFN collision, FR_DISK_ERR:Disk error */
|
||
DIR* dp /* Target directory with object name to be created */
|
||
)
|
||
{
|
||
8003540: b580 push {r7, lr}
|
||
8003542: b084 sub sp, #16
|
||
8003544: af00 add r7, sp, #0
|
||
8003546: 6078 str r0, [r7, #4]
|
||
res = dir_next(dp, 0); /* Next entry */
|
||
} while (res == FR_OK && --nent);
|
||
}
|
||
}
|
||
#else /* Non LFN configuration */
|
||
res = dir_alloc(dp, 1); /* Allocate an entry for SFN */
|
||
8003548: 2101 movs r1, #1
|
||
800354a: 6878 ldr r0, [r7, #4]
|
||
800354c: f7ff ff0c bl 8003368 <dir_alloc>
|
||
8003550: 4603 mov r3, r0
|
||
8003552: 73fb strb r3, [r7, #15]
|
||
#endif
|
||
|
||
if (res == FR_OK) { /* Set SFN entry */
|
||
8003554: 7bfb ldrb r3, [r7, #15]
|
||
8003556: 2b00 cmp r3, #0
|
||
8003558: d126 bne.n 80035a8 <dir_register+0x68>
|
||
res = move_window(dp->fs, dp->sect);
|
||
800355a: 687b ldr r3, [r7, #4]
|
||
800355c: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
8003560: 687b ldr r3, [r7, #4]
|
||
8003562: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
8003566: 4619 mov r1, r3
|
||
8003568: 4610 mov r0, r2
|
||
800356a: f7ff fa30 bl 80029ce <move_window>
|
||
800356e: 4603 mov r3, r0
|
||
8003570: 73fb strb r3, [r7, #15]
|
||
if (res == FR_OK) {
|
||
8003572: 7bfb ldrb r3, [r7, #15]
|
||
8003574: 2b00 cmp r3, #0
|
||
8003576: d117 bne.n 80035a8 <dir_register+0x68>
|
||
mem_set(dp->dir, 0, SZ_DIRE); /* Clean the entry */
|
||
8003578: 687b ldr r3, [r7, #4]
|
||
800357a: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
800357e: 2220 movs r2, #32
|
||
8003580: 2100 movs r1, #0
|
||
8003582: 4618 mov r0, r3
|
||
8003584: f7ff f810 bl 80025a8 <mem_set>
|
||
mem_cpy(dp->dir, dp->fn, 11); /* Put SFN */
|
||
8003588: 687b ldr r3, [r7, #4]
|
||
800358a: f8d3 0214 ldr.w r0, [r3, #532] ; 0x214
|
||
800358e: 687b ldr r3, [r7, #4]
|
||
8003590: f8d3 3218 ldr.w r3, [r3, #536] ; 0x218
|
||
8003594: 220b movs r2, #11
|
||
8003596: 4619 mov r1, r3
|
||
8003598: f7fe ffe8 bl 800256c <mem_cpy>
|
||
#if _USE_LFN
|
||
dp->dir[DIR_NTres] = dp->fn[NSFLAG] & (NS_BODY | NS_EXT); /* Put NT flag */
|
||
#endif
|
||
dp->fs->wflag = 1;
|
||
800359c: 687b ldr r3, [r7, #4]
|
||
800359e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80035a2: 2201 movs r2, #1
|
||
80035a4: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
}
|
||
}
|
||
|
||
return res;
|
||
80035a8: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
80035aa: 4618 mov r0, r3
|
||
80035ac: 3710 adds r7, #16
|
||
80035ae: 46bd mov sp, r7
|
||
80035b0: bd80 pop {r7, pc}
|
||
...
|
||
|
||
080035b4 <create_name>:
|
||
static
|
||
FRESULT create_name (
|
||
DIR* dp, /* Pointer to the directory object */
|
||
const TCHAR** path /* Pointer to pointer to the segment in the path string */
|
||
)
|
||
{
|
||
80035b4: b580 push {r7, lr}
|
||
80035b6: b088 sub sp, #32
|
||
80035b8: af00 add r7, sp, #0
|
||
80035ba: 6078 str r0, [r7, #4]
|
||
80035bc: 6039 str r1, [r7, #0]
|
||
BYTE b, c, d, *sfn;
|
||
UINT ni, si, i;
|
||
const char *p;
|
||
|
||
/* Create file name in directory form */
|
||
for (p = *path; *p == '/' || *p == '\\'; p++) ; /* Strip duplicated separator */
|
||
80035be: 683b ldr r3, [r7, #0]
|
||
80035c0: 681b ldr r3, [r3, #0]
|
||
80035c2: 60fb str r3, [r7, #12]
|
||
80035c4: e002 b.n 80035cc <create_name+0x18>
|
||
80035c6: 68fb ldr r3, [r7, #12]
|
||
80035c8: 3301 adds r3, #1
|
||
80035ca: 60fb str r3, [r7, #12]
|
||
80035cc: 68fb ldr r3, [r7, #12]
|
||
80035ce: 781b ldrb r3, [r3, #0]
|
||
80035d0: 2b2f cmp r3, #47 ; 0x2f
|
||
80035d2: d0f8 beq.n 80035c6 <create_name+0x12>
|
||
80035d4: 68fb ldr r3, [r7, #12]
|
||
80035d6: 781b ldrb r3, [r3, #0]
|
||
80035d8: 2b5c cmp r3, #92 ; 0x5c
|
||
80035da: d0f4 beq.n 80035c6 <create_name+0x12>
|
||
sfn = dp->fn;
|
||
80035dc: 687b ldr r3, [r7, #4]
|
||
80035de: f8d3 3218 ldr.w r3, [r3, #536] ; 0x218
|
||
80035e2: 60bb str r3, [r7, #8]
|
||
mem_set(sfn, ' ', 11);
|
||
80035e4: 220b movs r2, #11
|
||
80035e6: 2120 movs r1, #32
|
||
80035e8: 68b8 ldr r0, [r7, #8]
|
||
80035ea: f7fe ffdd bl 80025a8 <mem_set>
|
||
si = i = b = 0; ni = 8;
|
||
80035ee: 2300 movs r3, #0
|
||
80035f0: 77fb strb r3, [r7, #31]
|
||
80035f2: 2300 movs r3, #0
|
||
80035f4: 613b str r3, [r7, #16]
|
||
80035f6: 693b ldr r3, [r7, #16]
|
||
80035f8: 617b str r3, [r7, #20]
|
||
80035fa: 2308 movs r3, #8
|
||
80035fc: 61bb str r3, [r7, #24]
|
||
sfn[NSFLAG] = (c <= ' ') ? NS_LAST | NS_DOT : NS_DOT; /* Set last segment flag if end of path */
|
||
return FR_OK;
|
||
}
|
||
#endif
|
||
for (;;) {
|
||
c = (BYTE)p[si++];
|
||
80035fe: 697b ldr r3, [r7, #20]
|
||
8003600: 1c5a adds r2, r3, #1
|
||
8003602: 617a str r2, [r7, #20]
|
||
8003604: 68fa ldr r2, [r7, #12]
|
||
8003606: 4413 add r3, r2
|
||
8003608: 781b ldrb r3, [r3, #0]
|
||
800360a: 77bb strb r3, [r7, #30]
|
||
if (c <= ' ' || c == '/' || c == '\\') break; /* Break on end of segment */
|
||
800360c: 7fbb ldrb r3, [r7, #30]
|
||
800360e: 2b20 cmp r3, #32
|
||
8003610: d953 bls.n 80036ba <create_name+0x106>
|
||
8003612: 7fbb ldrb r3, [r7, #30]
|
||
8003614: 2b2f cmp r3, #47 ; 0x2f
|
||
8003616: d050 beq.n 80036ba <create_name+0x106>
|
||
8003618: 7fbb ldrb r3, [r7, #30]
|
||
800361a: 2b5c cmp r3, #92 ; 0x5c
|
||
800361c: d04d beq.n 80036ba <create_name+0x106>
|
||
if (c == '.' || i >= ni) {
|
||
800361e: 7fbb ldrb r3, [r7, #30]
|
||
8003620: 2b2e cmp r3, #46 ; 0x2e
|
||
8003622: d003 beq.n 800362c <create_name+0x78>
|
||
8003624: 693a ldr r2, [r7, #16]
|
||
8003626: 69bb ldr r3, [r7, #24]
|
||
8003628: 429a cmp r2, r3
|
||
800362a: d30f bcc.n 800364c <create_name+0x98>
|
||
if (ni != 8 || c != '.') return FR_INVALID_NAME;
|
||
800362c: 69bb ldr r3, [r7, #24]
|
||
800362e: 2b08 cmp r3, #8
|
||
8003630: d102 bne.n 8003638 <create_name+0x84>
|
||
8003632: 7fbb ldrb r3, [r7, #30]
|
||
8003634: 2b2e cmp r3, #46 ; 0x2e
|
||
8003636: d001 beq.n 800363c <create_name+0x88>
|
||
8003638: 2306 movs r3, #6
|
||
800363a: e073 b.n 8003724 <create_name+0x170>
|
||
i = 8; ni = 11;
|
||
800363c: 2308 movs r3, #8
|
||
800363e: 613b str r3, [r7, #16]
|
||
8003640: 230b movs r3, #11
|
||
8003642: 61bb str r3, [r7, #24]
|
||
b <<= 2; continue;
|
||
8003644: 7ffb ldrb r3, [r7, #31]
|
||
8003646: 009b lsls r3, r3, #2
|
||
8003648: 77fb strb r3, [r7, #31]
|
||
800364a: e035 b.n 80036b8 <create_name+0x104>
|
||
}
|
||
if (c >= 0x80) { /* Extended character? */
|
||
800364c: f997 301e ldrsb.w r3, [r7, #30]
|
||
8003650: 2b00 cmp r3, #0
|
||
8003652: da08 bge.n 8003666 <create_name+0xb2>
|
||
b |= 3; /* Eliminate NT flag */
|
||
8003654: 7ffb ldrb r3, [r7, #31]
|
||
8003656: f043 0303 orr.w r3, r3, #3
|
||
800365a: 77fb strb r3, [r7, #31]
|
||
#ifdef _EXCVT
|
||
c = ExCvt[c - 0x80]; /* To upper extended characters (SBCS cfg) */
|
||
800365c: 7fbb ldrb r3, [r7, #30]
|
||
800365e: 3b80 subs r3, #128 ; 0x80
|
||
8003660: 4a32 ldr r2, [pc, #200] ; (800372c <create_name+0x178>)
|
||
8003662: 5cd3 ldrb r3, [r2, r3]
|
||
8003664: 77bb strb r3, [r7, #30]
|
||
if (!IsDBCS2(d) || i >= ni - 1) /* Reject invalid DBC */
|
||
return FR_INVALID_NAME;
|
||
sfn[i++] = c;
|
||
sfn[i++] = d;
|
||
} else { /* SBC */
|
||
if (chk_chr("\"*+,:;<=>\?[]|\x7F", c)) /* Reject illegal chrs for SFN */
|
||
8003666: 7fbb ldrb r3, [r7, #30]
|
||
8003668: 4619 mov r1, r3
|
||
800366a: 4831 ldr r0, [pc, #196] ; (8003730 <create_name+0x17c>)
|
||
800366c: f7fe ffdc bl 8002628 <chk_chr>
|
||
8003670: 4603 mov r3, r0
|
||
8003672: 2b00 cmp r3, #0
|
||
8003674: d001 beq.n 800367a <create_name+0xc6>
|
||
return FR_INVALID_NAME;
|
||
8003676: 2306 movs r3, #6
|
||
8003678: e054 b.n 8003724 <create_name+0x170>
|
||
if (IsUpper(c)) { /* ASCII large capital? */
|
||
800367a: 7fbb ldrb r3, [r7, #30]
|
||
800367c: 2b40 cmp r3, #64 ; 0x40
|
||
800367e: d907 bls.n 8003690 <create_name+0xdc>
|
||
8003680: 7fbb ldrb r3, [r7, #30]
|
||
8003682: 2b5a cmp r3, #90 ; 0x5a
|
||
8003684: d804 bhi.n 8003690 <create_name+0xdc>
|
||
b |= 2;
|
||
8003686: 7ffb ldrb r3, [r7, #31]
|
||
8003688: f043 0302 orr.w r3, r3, #2
|
||
800368c: 77fb strb r3, [r7, #31]
|
||
800368e: e00c b.n 80036aa <create_name+0xf6>
|
||
} else {
|
||
if (IsLower(c)) { /* ASCII small capital? */
|
||
8003690: 7fbb ldrb r3, [r7, #30]
|
||
8003692: 2b60 cmp r3, #96 ; 0x60
|
||
8003694: d909 bls.n 80036aa <create_name+0xf6>
|
||
8003696: 7fbb ldrb r3, [r7, #30]
|
||
8003698: 2b7a cmp r3, #122 ; 0x7a
|
||
800369a: d806 bhi.n 80036aa <create_name+0xf6>
|
||
b |= 1; c -= 0x20;
|
||
800369c: 7ffb ldrb r3, [r7, #31]
|
||
800369e: f043 0301 orr.w r3, r3, #1
|
||
80036a2: 77fb strb r3, [r7, #31]
|
||
80036a4: 7fbb ldrb r3, [r7, #30]
|
||
80036a6: 3b20 subs r3, #32
|
||
80036a8: 77bb strb r3, [r7, #30]
|
||
}
|
||
}
|
||
sfn[i++] = c;
|
||
80036aa: 693b ldr r3, [r7, #16]
|
||
80036ac: 1c5a adds r2, r3, #1
|
||
80036ae: 613a str r2, [r7, #16]
|
||
80036b0: 68ba ldr r2, [r7, #8]
|
||
80036b2: 4413 add r3, r2
|
||
80036b4: 7fba ldrb r2, [r7, #30]
|
||
80036b6: 701a strb r2, [r3, #0]
|
||
c = (BYTE)p[si++];
|
||
80036b8: e7a1 b.n 80035fe <create_name+0x4a>
|
||
}
|
||
}
|
||
*path = &p[si]; /* Return pointer to the next segment */
|
||
80036ba: 68fa ldr r2, [r7, #12]
|
||
80036bc: 697b ldr r3, [r7, #20]
|
||
80036be: 441a add r2, r3
|
||
80036c0: 683b ldr r3, [r7, #0]
|
||
80036c2: 601a str r2, [r3, #0]
|
||
c = (c <= ' ') ? NS_LAST : 0; /* Set last segment flag if end of path */
|
||
80036c4: 7fbb ldrb r3, [r7, #30]
|
||
80036c6: 2b20 cmp r3, #32
|
||
80036c8: d801 bhi.n 80036ce <create_name+0x11a>
|
||
80036ca: 2304 movs r3, #4
|
||
80036cc: e000 b.n 80036d0 <create_name+0x11c>
|
||
80036ce: 2300 movs r3, #0
|
||
80036d0: 77bb strb r3, [r7, #30]
|
||
|
||
if (!i) return FR_INVALID_NAME; /* Reject nul string */
|
||
80036d2: 693b ldr r3, [r7, #16]
|
||
80036d4: 2b00 cmp r3, #0
|
||
80036d6: d101 bne.n 80036dc <create_name+0x128>
|
||
80036d8: 2306 movs r3, #6
|
||
80036da: e023 b.n 8003724 <create_name+0x170>
|
||
if (sfn[0] == DDEM) sfn[0] = RDDEM; /* When first character collides with DDEM, replace it with RDDEM */
|
||
80036dc: 68bb ldr r3, [r7, #8]
|
||
80036de: 781b ldrb r3, [r3, #0]
|
||
80036e0: 2be5 cmp r3, #229 ; 0xe5
|
||
80036e2: d102 bne.n 80036ea <create_name+0x136>
|
||
80036e4: 68bb ldr r3, [r7, #8]
|
||
80036e6: 2205 movs r2, #5
|
||
80036e8: 701a strb r2, [r3, #0]
|
||
|
||
if (ni == 8) b <<= 2;
|
||
80036ea: 69bb ldr r3, [r7, #24]
|
||
80036ec: 2b08 cmp r3, #8
|
||
80036ee: d102 bne.n 80036f6 <create_name+0x142>
|
||
80036f0: 7ffb ldrb r3, [r7, #31]
|
||
80036f2: 009b lsls r3, r3, #2
|
||
80036f4: 77fb strb r3, [r7, #31]
|
||
if ((b & 0x03) == 0x01) c |= NS_EXT; /* NT flag (Name extension has only small capital) */
|
||
80036f6: 7ffb ldrb r3, [r7, #31]
|
||
80036f8: f003 0303 and.w r3, r3, #3
|
||
80036fc: 2b01 cmp r3, #1
|
||
80036fe: d103 bne.n 8003708 <create_name+0x154>
|
||
8003700: 7fbb ldrb r3, [r7, #30]
|
||
8003702: f043 0310 orr.w r3, r3, #16
|
||
8003706: 77bb strb r3, [r7, #30]
|
||
if ((b & 0x0C) == 0x04) c |= NS_BODY; /* NT flag (Name body has only small capital) */
|
||
8003708: 7ffb ldrb r3, [r7, #31]
|
||
800370a: f003 030c and.w r3, r3, #12
|
||
800370e: 2b04 cmp r3, #4
|
||
8003710: d103 bne.n 800371a <create_name+0x166>
|
||
8003712: 7fbb ldrb r3, [r7, #30]
|
||
8003714: f043 0308 orr.w r3, r3, #8
|
||
8003718: 77bb strb r3, [r7, #30]
|
||
|
||
sfn[NSFLAG] = c; /* Store NT flag, File name is created */
|
||
800371a: 68bb ldr r3, [r7, #8]
|
||
800371c: 330b adds r3, #11
|
||
800371e: 7fba ldrb r2, [r7, #30]
|
||
8003720: 701a strb r2, [r3, #0]
|
||
|
||
return FR_OK;
|
||
8003722: 2300 movs r3, #0
|
||
#endif
|
||
}
|
||
8003724: 4618 mov r0, r3
|
||
8003726: 3720 adds r7, #32
|
||
8003728: 46bd mov sp, r7
|
||
800372a: bd80 pop {r7, pc}
|
||
800372c: 08006a78 .word 0x08006a78
|
||
8003730: 08006a08 .word 0x08006a08
|
||
|
||
08003734 <follow_path>:
|
||
static
|
||
FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */
|
||
DIR* dp, /* Directory object to return last directory and found object */
|
||
const TCHAR* path /* Full-path string to find a file or directory */
|
||
)
|
||
{
|
||
8003734: b580 push {r7, lr}
|
||
8003736: b084 sub sp, #16
|
||
8003738: af00 add r7, sp, #0
|
||
800373a: 6078 str r0, [r7, #4]
|
||
800373c: 6039 str r1, [r7, #0]
|
||
path++; dp->sclust = 0; /* Strip it and start from the root directory */
|
||
} else { /* No heading separator */
|
||
dp->sclust = dp->fs->cdir; /* Start from the current directory */
|
||
}
|
||
#else
|
||
if (*path == '/' || *path == '\\') /* Strip heading separator if exist */
|
||
800373e: 683b ldr r3, [r7, #0]
|
||
8003740: 781b ldrb r3, [r3, #0]
|
||
8003742: 2b2f cmp r3, #47 ; 0x2f
|
||
8003744: d003 beq.n 800374e <follow_path+0x1a>
|
||
8003746: 683b ldr r3, [r7, #0]
|
||
8003748: 781b ldrb r3, [r3, #0]
|
||
800374a: 2b5c cmp r3, #92 ; 0x5c
|
||
800374c: d102 bne.n 8003754 <follow_path+0x20>
|
||
path++;
|
||
800374e: 683b ldr r3, [r7, #0]
|
||
8003750: 3301 adds r3, #1
|
||
8003752: 603b str r3, [r7, #0]
|
||
dp->sclust = 0; /* Always start from the root directory */
|
||
8003754: 687b ldr r3, [r7, #4]
|
||
8003756: 2200 movs r2, #0
|
||
8003758: f8c3 2208 str.w r2, [r3, #520] ; 0x208
|
||
#endif
|
||
|
||
if ((UINT)*path < ' ') { /* Null path name is the origin directory itself */
|
||
800375c: 683b ldr r3, [r7, #0]
|
||
800375e: 781b ldrb r3, [r3, #0]
|
||
8003760: 2b1f cmp r3, #31
|
||
8003762: d80a bhi.n 800377a <follow_path+0x46>
|
||
res = dir_sdi(dp, 0);
|
||
8003764: 2100 movs r1, #0
|
||
8003766: 6878 ldr r0, [r7, #4]
|
||
8003768: f7ff fc73 bl 8003052 <dir_sdi>
|
||
800376c: 4603 mov r3, r0
|
||
800376e: 73fb strb r3, [r7, #15]
|
||
dp->dir = 0;
|
||
8003770: 687b ldr r3, [r7, #4]
|
||
8003772: 2200 movs r2, #0
|
||
8003774: f8c3 2214 str.w r2, [r3, #532] ; 0x214
|
||
8003778: e045 b.n 8003806 <follow_path+0xd2>
|
||
} else { /* Follow path */
|
||
for (;;) {
|
||
res = create_name(dp, &path); /* Get a segment name of the path */
|
||
800377a: 463b mov r3, r7
|
||
800377c: 4619 mov r1, r3
|
||
800377e: 6878 ldr r0, [r7, #4]
|
||
8003780: f7ff ff18 bl 80035b4 <create_name>
|
||
8003784: 4603 mov r3, r0
|
||
8003786: 73fb strb r3, [r7, #15]
|
||
if (res != FR_OK) break;
|
||
8003788: 7bfb ldrb r3, [r7, #15]
|
||
800378a: 2b00 cmp r3, #0
|
||
800378c: d136 bne.n 80037fc <follow_path+0xc8>
|
||
res = dir_find(dp); /* Find an object with the sagment name */
|
||
800378e: 6878 ldr r0, [r7, #4]
|
||
8003790: f7ff fe87 bl 80034a2 <dir_find>
|
||
8003794: 4603 mov r3, r0
|
||
8003796: 73fb strb r3, [r7, #15]
|
||
ns = dp->fn[NSFLAG];
|
||
8003798: 687b ldr r3, [r7, #4]
|
||
800379a: f8d3 3218 ldr.w r3, [r3, #536] ; 0x218
|
||
800379e: 7adb ldrb r3, [r3, #11]
|
||
80037a0: 73bb strb r3, [r7, #14]
|
||
if (res != FR_OK) { /* Failed to find the object */
|
||
80037a2: 7bfb ldrb r3, [r7, #15]
|
||
80037a4: 2b00 cmp r3, #0
|
||
80037a6: d00a beq.n 80037be <follow_path+0x8a>
|
||
if (res == FR_NO_FILE) { /* Object is not found */
|
||
80037a8: 7bfb ldrb r3, [r7, #15]
|
||
80037aa: 2b04 cmp r3, #4
|
||
80037ac: d128 bne.n 8003800 <follow_path+0xcc>
|
||
if (_FS_RPATH && (ns & NS_DOT)) { /* If dot entry is not exist, */
|
||
dp->sclust = 0; dp->dir = 0; /* it is the root directory and stay there */
|
||
if (!(ns & NS_LAST)) continue; /* Continue to follow if not last segment */
|
||
res = FR_OK; /* Ended at the root directroy. Function completed. */
|
||
} else { /* Could not find the object */
|
||
if (!(ns & NS_LAST)) res = FR_NO_PATH; /* Adjust error code if not last segment */
|
||
80037ae: 7bbb ldrb r3, [r7, #14]
|
||
80037b0: f003 0304 and.w r3, r3, #4
|
||
80037b4: 2b00 cmp r3, #0
|
||
80037b6: d123 bne.n 8003800 <follow_path+0xcc>
|
||
80037b8: 2305 movs r3, #5
|
||
80037ba: 73fb strb r3, [r7, #15]
|
||
}
|
||
}
|
||
break;
|
||
80037bc: e020 b.n 8003800 <follow_path+0xcc>
|
||
}
|
||
if (ns & NS_LAST) break; /* Last segment matched. Function completed. */
|
||
80037be: 7bbb ldrb r3, [r7, #14]
|
||
80037c0: f003 0304 and.w r3, r3, #4
|
||
80037c4: 2b00 cmp r3, #0
|
||
80037c6: d11d bne.n 8003804 <follow_path+0xd0>
|
||
dir = dp->dir; /* Follow the sub-directory */
|
||
80037c8: 687b ldr r3, [r7, #4]
|
||
80037ca: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
80037ce: 60bb str r3, [r7, #8]
|
||
if (!(dir[DIR_Attr] & AM_DIR)) { /* It is not a sub-directory and cannot follow */
|
||
80037d0: 68bb ldr r3, [r7, #8]
|
||
80037d2: 330b adds r3, #11
|
||
80037d4: 781b ldrb r3, [r3, #0]
|
||
80037d6: f003 0310 and.w r3, r3, #16
|
||
80037da: 2b00 cmp r3, #0
|
||
80037dc: d102 bne.n 80037e4 <follow_path+0xb0>
|
||
res = FR_NO_PATH; break;
|
||
80037de: 2305 movs r3, #5
|
||
80037e0: 73fb strb r3, [r7, #15]
|
||
80037e2: e010 b.n 8003806 <follow_path+0xd2>
|
||
}
|
||
dp->sclust = ld_clust(dp->fs, dir);
|
||
80037e4: 687b ldr r3, [r7, #4]
|
||
80037e6: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80037ea: 68b9 ldr r1, [r7, #8]
|
||
80037ec: 4618 mov r0, r3
|
||
80037ee: f7ff fe05 bl 80033fc <ld_clust>
|
||
80037f2: 4602 mov r2, r0
|
||
80037f4: 687b ldr r3, [r7, #4]
|
||
80037f6: f8c3 2208 str.w r2, [r3, #520] ; 0x208
|
||
res = create_name(dp, &path); /* Get a segment name of the path */
|
||
80037fa: e7be b.n 800377a <follow_path+0x46>
|
||
if (res != FR_OK) break;
|
||
80037fc: bf00 nop
|
||
80037fe: e002 b.n 8003806 <follow_path+0xd2>
|
||
break;
|
||
8003800: bf00 nop
|
||
8003802: e000 b.n 8003806 <follow_path+0xd2>
|
||
if (ns & NS_LAST) break; /* Last segment matched. Function completed. */
|
||
8003804: bf00 nop
|
||
}
|
||
}
|
||
|
||
return res;
|
||
8003806: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
8003808: 4618 mov r0, r3
|
||
800380a: 3710 adds r7, #16
|
||
800380c: 46bd mov sp, r7
|
||
800380e: bd80 pop {r7, pc}
|
||
|
||
08003810 <get_ldnumber>:
|
||
|
||
static
|
||
int get_ldnumber ( /* Returns logical drive number (-1:invalid drive) */
|
||
const TCHAR** path /* Pointer to pointer to the path name */
|
||
)
|
||
{
|
||
8003810: b480 push {r7}
|
||
8003812: b087 sub sp, #28
|
||
8003814: af00 add r7, sp, #0
|
||
8003816: 6078 str r0, [r7, #4]
|
||
const TCHAR *tp, *tt;
|
||
UINT i;
|
||
int vol = -1;
|
||
8003818: f04f 33ff mov.w r3, #4294967295
|
||
800381c: 613b str r3, [r7, #16]
|
||
char c;
|
||
TCHAR tc;
|
||
#endif
|
||
|
||
|
||
if (*path) { /* If the pointer is not a null */
|
||
800381e: 687b ldr r3, [r7, #4]
|
||
8003820: 681b ldr r3, [r3, #0]
|
||
8003822: 2b00 cmp r3, #0
|
||
8003824: d031 beq.n 800388a <get_ldnumber+0x7a>
|
||
for (tt = *path; (UINT)*tt >= (_USE_LFN ? ' ' : '!') && *tt != ':'; tt++) ; /* Find ':' in the path */
|
||
8003826: 687b ldr r3, [r7, #4]
|
||
8003828: 681b ldr r3, [r3, #0]
|
||
800382a: 617b str r3, [r7, #20]
|
||
800382c: e002 b.n 8003834 <get_ldnumber+0x24>
|
||
800382e: 697b ldr r3, [r7, #20]
|
||
8003830: 3301 adds r3, #1
|
||
8003832: 617b str r3, [r7, #20]
|
||
8003834: 697b ldr r3, [r7, #20]
|
||
8003836: 781b ldrb r3, [r3, #0]
|
||
8003838: 2b20 cmp r3, #32
|
||
800383a: d903 bls.n 8003844 <get_ldnumber+0x34>
|
||
800383c: 697b ldr r3, [r7, #20]
|
||
800383e: 781b ldrb r3, [r3, #0]
|
||
8003840: 2b3a cmp r3, #58 ; 0x3a
|
||
8003842: d1f4 bne.n 800382e <get_ldnumber+0x1e>
|
||
if (*tt == ':') { /* If a ':' is exist in the path name */
|
||
8003844: 697b ldr r3, [r7, #20]
|
||
8003846: 781b ldrb r3, [r3, #0]
|
||
8003848: 2b3a cmp r3, #58 ; 0x3a
|
||
800384a: d11c bne.n 8003886 <get_ldnumber+0x76>
|
||
tp = *path;
|
||
800384c: 687b ldr r3, [r7, #4]
|
||
800384e: 681b ldr r3, [r3, #0]
|
||
8003850: 60fb str r3, [r7, #12]
|
||
i = *tp++ - '0';
|
||
8003852: 68fb ldr r3, [r7, #12]
|
||
8003854: 1c5a adds r2, r3, #1
|
||
8003856: 60fa str r2, [r7, #12]
|
||
8003858: 781b ldrb r3, [r3, #0]
|
||
800385a: 3b30 subs r3, #48 ; 0x30
|
||
800385c: 60bb str r3, [r7, #8]
|
||
if (i < 10 && tp == tt) { /* Is there a numeric drive id? */
|
||
800385e: 68bb ldr r3, [r7, #8]
|
||
8003860: 2b09 cmp r3, #9
|
||
8003862: d80e bhi.n 8003882 <get_ldnumber+0x72>
|
||
8003864: 68fa ldr r2, [r7, #12]
|
||
8003866: 697b ldr r3, [r7, #20]
|
||
8003868: 429a cmp r2, r3
|
||
800386a: d10a bne.n 8003882 <get_ldnumber+0x72>
|
||
if (i < _VOLUMES) { /* If a drive id is found, get the value and strip it */
|
||
800386c: 68bb ldr r3, [r7, #8]
|
||
800386e: 2b00 cmp r3, #0
|
||
8003870: d107 bne.n 8003882 <get_ldnumber+0x72>
|
||
vol = (int)i;
|
||
8003872: 68bb ldr r3, [r7, #8]
|
||
8003874: 613b str r3, [r7, #16]
|
||
*path = ++tt;
|
||
8003876: 697b ldr r3, [r7, #20]
|
||
8003878: 3301 adds r3, #1
|
||
800387a: 617b str r3, [r7, #20]
|
||
800387c: 687b ldr r3, [r7, #4]
|
||
800387e: 697a ldr r2, [r7, #20]
|
||
8003880: 601a str r2, [r3, #0]
|
||
vol = (int)i;
|
||
*path = tt;
|
||
}
|
||
}
|
||
#endif
|
||
return vol;
|
||
8003882: 693b ldr r3, [r7, #16]
|
||
8003884: e002 b.n 800388c <get_ldnumber+0x7c>
|
||
}
|
||
#if _FS_RPATH && _VOLUMES >= 2
|
||
vol = CurrVol; /* Current drive */
|
||
#else
|
||
vol = 0; /* Drive 0 */
|
||
8003886: 2300 movs r3, #0
|
||
8003888: 613b str r3, [r7, #16]
|
||
#endif
|
||
}
|
||
return vol;
|
||
800388a: 693b ldr r3, [r7, #16]
|
||
}
|
||
800388c: 4618 mov r0, r3
|
||
800388e: 371c adds r7, #28
|
||
8003890: 46bd mov sp, r7
|
||
8003892: bc80 pop {r7}
|
||
8003894: 4770 bx lr
|
||
...
|
||
|
||
08003898 <check_fs>:
|
||
static
|
||
BYTE check_fs ( /* 0:FAT boor sector, 1:Valid boor sector but not FAT, 2:Not a boot sector, 3:Disk error */
|
||
FATFS* fs, /* File system object */
|
||
DWORD sect /* Sector# (lba) to check if it is an FAT boot record or not */
|
||
)
|
||
{
|
||
8003898: b580 push {r7, lr}
|
||
800389a: b082 sub sp, #8
|
||
800389c: af00 add r7, sp, #0
|
||
800389e: 6078 str r0, [r7, #4]
|
||
80038a0: 6039 str r1, [r7, #0]
|
||
fs->wflag = 0; fs->winsect = 0xFFFFFFFF; /* Invaidate window */
|
||
80038a2: 687b ldr r3, [r7, #4]
|
||
80038a4: 2200 movs r2, #0
|
||
80038a6: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
80038aa: 687b ldr r3, [r7, #4]
|
||
80038ac: f04f 32ff mov.w r2, #4294967295
|
||
80038b0: f8c3 222c str.w r2, [r3, #556] ; 0x22c
|
||
if (move_window(fs, sect) != FR_OK) /* Load boot record */
|
||
80038b4: 6839 ldr r1, [r7, #0]
|
||
80038b6: 6878 ldr r0, [r7, #4]
|
||
80038b8: f7ff f889 bl 80029ce <move_window>
|
||
80038bc: 4603 mov r3, r0
|
||
80038be: 2b00 cmp r3, #0
|
||
80038c0: d001 beq.n 80038c6 <check_fs+0x2e>
|
||
return 3;
|
||
80038c2: 2303 movs r3, #3
|
||
80038c4: e04a b.n 800395c <check_fs+0xc4>
|
||
|
||
if (LD_WORD(&fs->win.d8[BS_55AA]) != 0xAA55) /* Check boot record signature (always placed at offset 510 even if the sector size is >512) */
|
||
80038c6: 687b ldr r3, [r7, #4]
|
||
80038c8: f503 73ff add.w r3, r3, #510 ; 0x1fe
|
||
80038cc: 3301 adds r3, #1
|
||
80038ce: 781b ldrb r3, [r3, #0]
|
||
80038d0: 021b lsls r3, r3, #8
|
||
80038d2: b21a sxth r2, r3
|
||
80038d4: 687b ldr r3, [r7, #4]
|
||
80038d6: f893 31fe ldrb.w r3, [r3, #510] ; 0x1fe
|
||
80038da: b21b sxth r3, r3
|
||
80038dc: 4313 orrs r3, r2
|
||
80038de: b21b sxth r3, r3
|
||
80038e0: 4a20 ldr r2, [pc, #128] ; (8003964 <check_fs+0xcc>)
|
||
80038e2: 4293 cmp r3, r2
|
||
80038e4: d001 beq.n 80038ea <check_fs+0x52>
|
||
return 2;
|
||
80038e6: 2302 movs r3, #2
|
||
80038e8: e038 b.n 800395c <check_fs+0xc4>
|
||
|
||
if ((LD_DWORD(&fs->win.d8[BS_FilSysType]) & 0xFFFFFF) == 0x544146) /* Check "FAT" string */
|
||
80038ea: 687b ldr r3, [r7, #4]
|
||
80038ec: 3336 adds r3, #54 ; 0x36
|
||
80038ee: 3303 adds r3, #3
|
||
80038f0: 781b ldrb r3, [r3, #0]
|
||
80038f2: 061a lsls r2, r3, #24
|
||
80038f4: 687b ldr r3, [r7, #4]
|
||
80038f6: 3336 adds r3, #54 ; 0x36
|
||
80038f8: 3302 adds r3, #2
|
||
80038fa: 781b ldrb r3, [r3, #0]
|
||
80038fc: 041b lsls r3, r3, #16
|
||
80038fe: 4313 orrs r3, r2
|
||
8003900: 687a ldr r2, [r7, #4]
|
||
8003902: 3236 adds r2, #54 ; 0x36
|
||
8003904: 3201 adds r2, #1
|
||
8003906: 7812 ldrb r2, [r2, #0]
|
||
8003908: 0212 lsls r2, r2, #8
|
||
800390a: 4313 orrs r3, r2
|
||
800390c: 687a ldr r2, [r7, #4]
|
||
800390e: f892 2036 ldrb.w r2, [r2, #54] ; 0x36
|
||
8003912: 4313 orrs r3, r2
|
||
8003914: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000
|
||
8003918: 4a13 ldr r2, [pc, #76] ; (8003968 <check_fs+0xd0>)
|
||
800391a: 4293 cmp r3, r2
|
||
800391c: d101 bne.n 8003922 <check_fs+0x8a>
|
||
return 0;
|
||
800391e: 2300 movs r3, #0
|
||
8003920: e01c b.n 800395c <check_fs+0xc4>
|
||
if ((LD_DWORD(&fs->win.d8[BS_FilSysType32]) & 0xFFFFFF) == 0x544146) /* Check "FAT" string */
|
||
8003922: 687b ldr r3, [r7, #4]
|
||
8003924: 3352 adds r3, #82 ; 0x52
|
||
8003926: 3303 adds r3, #3
|
||
8003928: 781b ldrb r3, [r3, #0]
|
||
800392a: 061a lsls r2, r3, #24
|
||
800392c: 687b ldr r3, [r7, #4]
|
||
800392e: 3352 adds r3, #82 ; 0x52
|
||
8003930: 3302 adds r3, #2
|
||
8003932: 781b ldrb r3, [r3, #0]
|
||
8003934: 041b lsls r3, r3, #16
|
||
8003936: 4313 orrs r3, r2
|
||
8003938: 687a ldr r2, [r7, #4]
|
||
800393a: 3252 adds r2, #82 ; 0x52
|
||
800393c: 3201 adds r2, #1
|
||
800393e: 7812 ldrb r2, [r2, #0]
|
||
8003940: 0212 lsls r2, r2, #8
|
||
8003942: 4313 orrs r3, r2
|
||
8003944: 687a ldr r2, [r7, #4]
|
||
8003946: f892 2052 ldrb.w r2, [r2, #82] ; 0x52
|
||
800394a: 4313 orrs r3, r2
|
||
800394c: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000
|
||
8003950: 4a05 ldr r2, [pc, #20] ; (8003968 <check_fs+0xd0>)
|
||
8003952: 4293 cmp r3, r2
|
||
8003954: d101 bne.n 800395a <check_fs+0xc2>
|
||
return 0;
|
||
8003956: 2300 movs r3, #0
|
||
8003958: e000 b.n 800395c <check_fs+0xc4>
|
||
|
||
return 1;
|
||
800395a: 2301 movs r3, #1
|
||
}
|
||
800395c: 4618 mov r0, r3
|
||
800395e: 3708 adds r7, #8
|
||
8003960: 46bd mov sp, r7
|
||
8003962: bd80 pop {r7, pc}
|
||
8003964: ffffaa55 .word 0xffffaa55
|
||
8003968: 00544146 .word 0x00544146
|
||
|
||
0800396c <find_volume>:
|
||
FRESULT find_volume ( /* FR_OK(0): successful, !=0: any error occurred */
|
||
FATFS** rfs, /* Pointer to pointer to the found file system object */
|
||
const TCHAR** path, /* Pointer to pointer to the path name (drive number) */
|
||
BYTE wmode /* !=0: Check write protection for write access */
|
||
)
|
||
{
|
||
800396c: b580 push {r7, lr}
|
||
800396e: b096 sub sp, #88 ; 0x58
|
||
8003970: af00 add r7, sp, #0
|
||
8003972: 60f8 str r0, [r7, #12]
|
||
8003974: 60b9 str r1, [r7, #8]
|
||
8003976: 4613 mov r3, r2
|
||
8003978: 71fb strb r3, [r7, #7]
|
||
FATFS *fs;
|
||
UINT i;
|
||
|
||
|
||
/* Get logical drive number from the path name */
|
||
*rfs = 0;
|
||
800397a: 68fb ldr r3, [r7, #12]
|
||
800397c: 2200 movs r2, #0
|
||
800397e: 601a str r2, [r3, #0]
|
||
vol = get_ldnumber(path);
|
||
8003980: 68b8 ldr r0, [r7, #8]
|
||
8003982: f7ff ff45 bl 8003810 <get_ldnumber>
|
||
8003986: 63f8 str r0, [r7, #60] ; 0x3c
|
||
if (vol < 0) return FR_INVALID_DRIVE;
|
||
8003988: 6bfb ldr r3, [r7, #60] ; 0x3c
|
||
800398a: 2b00 cmp r3, #0
|
||
800398c: da01 bge.n 8003992 <find_volume+0x26>
|
||
800398e: 230b movs r3, #11
|
||
8003990: e2aa b.n 8003ee8 <find_volume+0x57c>
|
||
|
||
/* Check if the file system object is valid or not */
|
||
fs = FatFs[vol]; /* Get pointer to the file system object */
|
||
8003992: 4a9e ldr r2, [pc, #632] ; (8003c0c <find_volume+0x2a0>)
|
||
8003994: 6bfb ldr r3, [r7, #60] ; 0x3c
|
||
8003996: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
||
800399a: 63bb str r3, [r7, #56] ; 0x38
|
||
if (!fs) return FR_NOT_ENABLED; /* Is the file system object available? */
|
||
800399c: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
800399e: 2b00 cmp r3, #0
|
||
80039a0: d101 bne.n 80039a6 <find_volume+0x3a>
|
||
80039a2: 230c movs r3, #12
|
||
80039a4: e2a0 b.n 8003ee8 <find_volume+0x57c>
|
||
|
||
ENTER_FF(fs); /* Lock the volume */
|
||
*rfs = fs; /* Return pointer to the file system object */
|
||
80039a6: 68fb ldr r3, [r7, #12]
|
||
80039a8: 6bba ldr r2, [r7, #56] ; 0x38
|
||
80039aa: 601a str r2, [r3, #0]
|
||
|
||
if (fs->fs_type) { /* If the volume has been mounted */
|
||
80039ac: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
80039ae: f893 3200 ldrb.w r3, [r3, #512] ; 0x200
|
||
80039b2: 2b00 cmp r3, #0
|
||
80039b4: d01b beq.n 80039ee <find_volume+0x82>
|
||
stat = disk_status(fs->drv);
|
||
80039b6: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
80039b8: f893 3201 ldrb.w r3, [r3, #513] ; 0x201
|
||
80039bc: 4618 mov r0, r3
|
||
80039be: f7fe fd55 bl 800246c <disk_status>
|
||
80039c2: 4603 mov r3, r0
|
||
80039c4: f887 3037 strb.w r3, [r7, #55] ; 0x37
|
||
if (!(stat & STA_NOINIT)) { /* and the physical drive is kept initialized */
|
||
80039c8: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
|
||
80039cc: f003 0301 and.w r3, r3, #1
|
||
80039d0: 2b00 cmp r3, #0
|
||
80039d2: d10c bne.n 80039ee <find_volume+0x82>
|
||
if (!_FS_READONLY && wmode && (stat & STA_PROTECT)) /* Check write protection if needed */
|
||
80039d4: 79fb ldrb r3, [r7, #7]
|
||
80039d6: 2b00 cmp r3, #0
|
||
80039d8: d007 beq.n 80039ea <find_volume+0x7e>
|
||
80039da: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
|
||
80039de: f003 0304 and.w r3, r3, #4
|
||
80039e2: 2b00 cmp r3, #0
|
||
80039e4: d001 beq.n 80039ea <find_volume+0x7e>
|
||
return FR_WRITE_PROTECTED;
|
||
80039e6: 230a movs r3, #10
|
||
80039e8: e27e b.n 8003ee8 <find_volume+0x57c>
|
||
return FR_OK; /* The file system object is valid */
|
||
80039ea: 2300 movs r3, #0
|
||
80039ec: e27c b.n 8003ee8 <find_volume+0x57c>
|
||
}
|
||
|
||
/* The file system object is not valid. */
|
||
/* Following code attempts to mount the volume. (analyze BPB and initialize the fs object) */
|
||
|
||
fs->fs_type = 0; /* Clear the file system object */
|
||
80039ee: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
80039f0: 2200 movs r2, #0
|
||
80039f2: f883 2200 strb.w r2, [r3, #512] ; 0x200
|
||
fs->drv = LD2PD(vol); /* Bind the logical drive and a physical drive */
|
||
80039f6: 6bfb ldr r3, [r7, #60] ; 0x3c
|
||
80039f8: b2da uxtb r2, r3
|
||
80039fa: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
80039fc: f883 2201 strb.w r2, [r3, #513] ; 0x201
|
||
stat = disk_initialize(fs->drv); /* Initialize the physical drive */
|
||
8003a00: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003a02: f893 3201 ldrb.w r3, [r3, #513] ; 0x201
|
||
8003a06: 4618 mov r0, r3
|
||
8003a08: f7fe fd4a bl 80024a0 <disk_initialize>
|
||
8003a0c: 4603 mov r3, r0
|
||
8003a0e: f887 3037 strb.w r3, [r7, #55] ; 0x37
|
||
if (stat & STA_NOINIT) /* Check if the initialization succeeded */
|
||
8003a12: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
|
||
8003a16: f003 0301 and.w r3, r3, #1
|
||
8003a1a: 2b00 cmp r3, #0
|
||
8003a1c: d001 beq.n 8003a22 <find_volume+0xb6>
|
||
return FR_NOT_READY; /* Failed to initialize due to no medium or hard error */
|
||
8003a1e: 2303 movs r3, #3
|
||
8003a20: e262 b.n 8003ee8 <find_volume+0x57c>
|
||
if (!_FS_READONLY && wmode && (stat & STA_PROTECT)) /* Check disk write protection if needed */
|
||
8003a22: 79fb ldrb r3, [r7, #7]
|
||
8003a24: 2b00 cmp r3, #0
|
||
8003a26: d007 beq.n 8003a38 <find_volume+0xcc>
|
||
8003a28: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
|
||
8003a2c: f003 0304 and.w r3, r3, #4
|
||
8003a30: 2b00 cmp r3, #0
|
||
8003a32: d001 beq.n 8003a38 <find_volume+0xcc>
|
||
return FR_WRITE_PROTECTED;
|
||
8003a34: 230a movs r3, #10
|
||
8003a36: e257 b.n 8003ee8 <find_volume+0x57c>
|
||
#if _MAX_SS != _MIN_SS /* Get sector size (multiple sector size cfg only) */
|
||
if (disk_ioctl(fs->drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK
|
||
|| SS(fs) < _MIN_SS || SS(fs) > _MAX_SS) return FR_DISK_ERR;
|
||
#endif
|
||
/* Find an FAT partition on the drive. Supports only generic partitioning, FDISK and SFD. */
|
||
bsect = 0;
|
||
8003a38: 2300 movs r3, #0
|
||
8003a3a: 653b str r3, [r7, #80] ; 0x50
|
||
fmt = check_fs(fs, bsect); /* Load sector 0 and check if it is an FAT boot sector as SFD */
|
||
8003a3c: 6d39 ldr r1, [r7, #80] ; 0x50
|
||
8003a3e: 6bb8 ldr r0, [r7, #56] ; 0x38
|
||
8003a40: f7ff ff2a bl 8003898 <check_fs>
|
||
8003a44: 4603 mov r3, r0
|
||
8003a46: f887 3057 strb.w r3, [r7, #87] ; 0x57
|
||
if (fmt == 1 || (!fmt && (LD2PT(vol)))) { /* Not an FAT boot sector or forced partition number */
|
||
8003a4a: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
|
||
8003a4e: 2b01 cmp r3, #1
|
||
8003a50: d155 bne.n 8003afe <find_volume+0x192>
|
||
for (i = 0; i < 4; i++) { /* Get partition offset */
|
||
8003a52: 2300 movs r3, #0
|
||
8003a54: 643b str r3, [r7, #64] ; 0x40
|
||
8003a56: e029 b.n 8003aac <find_volume+0x140>
|
||
pt = fs->win.d8 + MBR_Table + i * SZ_PTE;
|
||
8003a58: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003a5a: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
8003a5c: 011b lsls r3, r3, #4
|
||
8003a5e: f503 73df add.w r3, r3, #446 ; 0x1be
|
||
8003a62: 4413 add r3, r2
|
||
8003a64: 633b str r3, [r7, #48] ; 0x30
|
||
br[i] = pt[4] ? LD_DWORD(&pt[8]) : 0;
|
||
8003a66: 6b3b ldr r3, [r7, #48] ; 0x30
|
||
8003a68: 3304 adds r3, #4
|
||
8003a6a: 781b ldrb r3, [r3, #0]
|
||
8003a6c: 2b00 cmp r3, #0
|
||
8003a6e: d012 beq.n 8003a96 <find_volume+0x12a>
|
||
8003a70: 6b3b ldr r3, [r7, #48] ; 0x30
|
||
8003a72: 330b adds r3, #11
|
||
8003a74: 781b ldrb r3, [r3, #0]
|
||
8003a76: 061a lsls r2, r3, #24
|
||
8003a78: 6b3b ldr r3, [r7, #48] ; 0x30
|
||
8003a7a: 330a adds r3, #10
|
||
8003a7c: 781b ldrb r3, [r3, #0]
|
||
8003a7e: 041b lsls r3, r3, #16
|
||
8003a80: 4313 orrs r3, r2
|
||
8003a82: 6b3a ldr r2, [r7, #48] ; 0x30
|
||
8003a84: 3209 adds r2, #9
|
||
8003a86: 7812 ldrb r2, [r2, #0]
|
||
8003a88: 0212 lsls r2, r2, #8
|
||
8003a8a: 4313 orrs r3, r2
|
||
8003a8c: 6b3a ldr r2, [r7, #48] ; 0x30
|
||
8003a8e: 3208 adds r2, #8
|
||
8003a90: 7812 ldrb r2, [r2, #0]
|
||
8003a92: 431a orrs r2, r3
|
||
8003a94: e000 b.n 8003a98 <find_volume+0x12c>
|
||
8003a96: 2200 movs r2, #0
|
||
8003a98: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
8003a9a: 009b lsls r3, r3, #2
|
||
8003a9c: f107 0158 add.w r1, r7, #88 ; 0x58
|
||
8003aa0: 440b add r3, r1
|
||
8003aa2: f843 2c44 str.w r2, [r3, #-68]
|
||
for (i = 0; i < 4; i++) { /* Get partition offset */
|
||
8003aa6: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
8003aa8: 3301 adds r3, #1
|
||
8003aaa: 643b str r3, [r7, #64] ; 0x40
|
||
8003aac: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
8003aae: 2b03 cmp r3, #3
|
||
8003ab0: d9d2 bls.n 8003a58 <find_volume+0xec>
|
||
}
|
||
i = LD2PT(vol); /* Partition number: 0:auto, 1-4:forced */
|
||
8003ab2: 2300 movs r3, #0
|
||
8003ab4: 643b str r3, [r7, #64] ; 0x40
|
||
if (i) i--;
|
||
8003ab6: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
8003ab8: 2b00 cmp r3, #0
|
||
8003aba: d002 beq.n 8003ac2 <find_volume+0x156>
|
||
8003abc: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
8003abe: 3b01 subs r3, #1
|
||
8003ac0: 643b str r3, [r7, #64] ; 0x40
|
||
do { /* Find an FAT volume */
|
||
bsect = br[i];
|
||
8003ac2: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
8003ac4: 009b lsls r3, r3, #2
|
||
8003ac6: f107 0258 add.w r2, r7, #88 ; 0x58
|
||
8003aca: 4413 add r3, r2
|
||
8003acc: f853 3c44 ldr.w r3, [r3, #-68]
|
||
8003ad0: 653b str r3, [r7, #80] ; 0x50
|
||
fmt = bsect ? check_fs(fs, bsect) : 2; /* Check the partition */
|
||
8003ad2: 6d3b ldr r3, [r7, #80] ; 0x50
|
||
8003ad4: 2b00 cmp r3, #0
|
||
8003ad6: d005 beq.n 8003ae4 <find_volume+0x178>
|
||
8003ad8: 6d39 ldr r1, [r7, #80] ; 0x50
|
||
8003ada: 6bb8 ldr r0, [r7, #56] ; 0x38
|
||
8003adc: f7ff fedc bl 8003898 <check_fs>
|
||
8003ae0: 4603 mov r3, r0
|
||
8003ae2: e000 b.n 8003ae6 <find_volume+0x17a>
|
||
8003ae4: 2302 movs r3, #2
|
||
8003ae6: f887 3057 strb.w r3, [r7, #87] ; 0x57
|
||
} while (!LD2PT(vol) && fmt && ++i < 4);
|
||
8003aea: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
|
||
8003aee: 2b00 cmp r3, #0
|
||
8003af0: d005 beq.n 8003afe <find_volume+0x192>
|
||
8003af2: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
8003af4: 3301 adds r3, #1
|
||
8003af6: 643b str r3, [r7, #64] ; 0x40
|
||
8003af8: 6c3b ldr r3, [r7, #64] ; 0x40
|
||
8003afa: 2b03 cmp r3, #3
|
||
8003afc: d9e1 bls.n 8003ac2 <find_volume+0x156>
|
||
}
|
||
if (fmt == 3) return FR_DISK_ERR; /* An error occured in the disk I/O layer */
|
||
8003afe: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
|
||
8003b02: 2b03 cmp r3, #3
|
||
8003b04: d101 bne.n 8003b0a <find_volume+0x19e>
|
||
8003b06: 2301 movs r3, #1
|
||
8003b08: e1ee b.n 8003ee8 <find_volume+0x57c>
|
||
if (fmt) return FR_NO_FILESYSTEM; /* No FAT volume is found */
|
||
8003b0a: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
|
||
8003b0e: 2b00 cmp r3, #0
|
||
8003b10: d001 beq.n 8003b16 <find_volume+0x1aa>
|
||
8003b12: 230d movs r3, #13
|
||
8003b14: e1e8 b.n 8003ee8 <find_volume+0x57c>
|
||
|
||
/* An FAT volume is found. Following code initializes the file system object */
|
||
|
||
if (LD_WORD(fs->win.d8 + BPB_BytsPerSec) != SS(fs)) /* (BPB_BytsPerSec must be equal to the physical sector size) */
|
||
8003b16: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b18: 7b1b ldrb r3, [r3, #12]
|
||
8003b1a: 021b lsls r3, r3, #8
|
||
8003b1c: b21a sxth r2, r3
|
||
8003b1e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b20: 7adb ldrb r3, [r3, #11]
|
||
8003b22: b21b sxth r3, r3
|
||
8003b24: 4313 orrs r3, r2
|
||
8003b26: b21b sxth r3, r3
|
||
8003b28: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
||
8003b2c: d001 beq.n 8003b32 <find_volume+0x1c6>
|
||
return FR_NO_FILESYSTEM;
|
||
8003b2e: 230d movs r3, #13
|
||
8003b30: e1da b.n 8003ee8 <find_volume+0x57c>
|
||
|
||
fasize = LD_WORD(fs->win.d8 + BPB_FATSz16); /* Number of sectors per FAT */
|
||
8003b32: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b34: 7ddb ldrb r3, [r3, #23]
|
||
8003b36: 021b lsls r3, r3, #8
|
||
8003b38: b21a sxth r2, r3
|
||
8003b3a: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b3c: 7d9b ldrb r3, [r3, #22]
|
||
8003b3e: b21b sxth r3, r3
|
||
8003b40: 4313 orrs r3, r2
|
||
8003b42: b21b sxth r3, r3
|
||
8003b44: b29b uxth r3, r3
|
||
8003b46: 64fb str r3, [r7, #76] ; 0x4c
|
||
if (!fasize) fasize = LD_DWORD(fs->win.d8 + BPB_FATSz32);
|
||
8003b48: 6cfb ldr r3, [r7, #76] ; 0x4c
|
||
8003b4a: 2b00 cmp r3, #0
|
||
8003b4c: d112 bne.n 8003b74 <find_volume+0x208>
|
||
8003b4e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b50: f893 3027 ldrb.w r3, [r3, #39] ; 0x27
|
||
8003b54: 061a lsls r2, r3, #24
|
||
8003b56: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b58: f893 3026 ldrb.w r3, [r3, #38] ; 0x26
|
||
8003b5c: 041b lsls r3, r3, #16
|
||
8003b5e: 4313 orrs r3, r2
|
||
8003b60: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003b62: f892 2025 ldrb.w r2, [r2, #37] ; 0x25
|
||
8003b66: 0212 lsls r2, r2, #8
|
||
8003b68: 4313 orrs r3, r2
|
||
8003b6a: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003b6c: f892 2024 ldrb.w r2, [r2, #36] ; 0x24
|
||
8003b70: 4313 orrs r3, r2
|
||
8003b72: 64fb str r3, [r7, #76] ; 0x4c
|
||
fs->fsize = fasize;
|
||
8003b74: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b76: 6cfa ldr r2, [r7, #76] ; 0x4c
|
||
8003b78: f8c3 2218 str.w r2, [r3, #536] ; 0x218
|
||
|
||
fs->n_fats = fs->win.d8[BPB_NumFATs]; /* Number of FAT copies */
|
||
8003b7c: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b7e: 7c1a ldrb r2, [r3, #16]
|
||
8003b80: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b82: f883 2203 strb.w r2, [r3, #515] ; 0x203
|
||
if (fs->n_fats != 1 && fs->n_fats != 2) /* (Must be 1 or 2) */
|
||
8003b86: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b88: f893 3203 ldrb.w r3, [r3, #515] ; 0x203
|
||
8003b8c: 2b01 cmp r3, #1
|
||
8003b8e: d006 beq.n 8003b9e <find_volume+0x232>
|
||
8003b90: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003b92: f893 3203 ldrb.w r3, [r3, #515] ; 0x203
|
||
8003b96: 2b02 cmp r3, #2
|
||
8003b98: d001 beq.n 8003b9e <find_volume+0x232>
|
||
return FR_NO_FILESYSTEM;
|
||
8003b9a: 230d movs r3, #13
|
||
8003b9c: e1a4 b.n 8003ee8 <find_volume+0x57c>
|
||
fasize *= fs->n_fats; /* Number of sectors for FAT area */
|
||
8003b9e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003ba0: f893 3203 ldrb.w r3, [r3, #515] ; 0x203
|
||
8003ba4: 461a mov r2, r3
|
||
8003ba6: 6cfb ldr r3, [r7, #76] ; 0x4c
|
||
8003ba8: fb02 f303 mul.w r3, r2, r3
|
||
8003bac: 64fb str r3, [r7, #76] ; 0x4c
|
||
|
||
fs->csize = fs->win.d8[BPB_SecPerClus]; /* Number of sectors per cluster */
|
||
8003bae: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003bb0: 7b5a ldrb r2, [r3, #13]
|
||
8003bb2: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003bb4: f883 2202 strb.w r2, [r3, #514] ; 0x202
|
||
if (!fs->csize || (fs->csize & (fs->csize - 1))) /* (Must be power of 2) */
|
||
8003bb8: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003bba: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
8003bbe: 2b00 cmp r3, #0
|
||
8003bc0: d00a beq.n 8003bd8 <find_volume+0x26c>
|
||
8003bc2: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003bc4: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
8003bc8: 461a mov r2, r3
|
||
8003bca: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003bcc: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
8003bd0: 3b01 subs r3, #1
|
||
8003bd2: 4013 ands r3, r2
|
||
8003bd4: 2b00 cmp r3, #0
|
||
8003bd6: d001 beq.n 8003bdc <find_volume+0x270>
|
||
return FR_NO_FILESYSTEM;
|
||
8003bd8: 230d movs r3, #13
|
||
8003bda: e185 b.n 8003ee8 <find_volume+0x57c>
|
||
|
||
fs->n_rootdir = LD_WORD(fs->win.d8 + BPB_RootEntCnt); /* Number of root directory entries */
|
||
8003bdc: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003bde: 7c9b ldrb r3, [r3, #18]
|
||
8003be0: 021b lsls r3, r3, #8
|
||
8003be2: b21a sxth r2, r3
|
||
8003be4: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003be6: 7c5b ldrb r3, [r3, #17]
|
||
8003be8: b21b sxth r3, r3
|
||
8003bea: 4313 orrs r3, r2
|
||
8003bec: b21b sxth r3, r3
|
||
8003bee: b29a uxth r2, r3
|
||
8003bf0: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003bf2: f8a3 2208 strh.w r2, [r3, #520] ; 0x208
|
||
if (fs->n_rootdir % (SS(fs) / SZ_DIRE)) /* (Must be sector aligned) */
|
||
8003bf6: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003bf8: f8b3 3208 ldrh.w r3, [r3, #520] ; 0x208
|
||
8003bfc: f003 030f and.w r3, r3, #15
|
||
8003c00: b29b uxth r3, r3
|
||
8003c02: 2b00 cmp r3, #0
|
||
8003c04: d004 beq.n 8003c10 <find_volume+0x2a4>
|
||
return FR_NO_FILESYSTEM;
|
||
8003c06: 230d movs r3, #13
|
||
8003c08: e16e b.n 8003ee8 <find_volume+0x57c>
|
||
8003c0a: bf00 nop
|
||
8003c0c: 200000ac .word 0x200000ac
|
||
|
||
tsect = LD_WORD(fs->win.d8 + BPB_TotSec16); /* Number of sectors on the volume */
|
||
8003c10: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c12: 7d1b ldrb r3, [r3, #20]
|
||
8003c14: 021b lsls r3, r3, #8
|
||
8003c16: b21a sxth r2, r3
|
||
8003c18: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c1a: 7cdb ldrb r3, [r3, #19]
|
||
8003c1c: b21b sxth r3, r3
|
||
8003c1e: 4313 orrs r3, r2
|
||
8003c20: b21b sxth r3, r3
|
||
8003c22: b29b uxth r3, r3
|
||
8003c24: 64bb str r3, [r7, #72] ; 0x48
|
||
if (!tsect) tsect = LD_DWORD(fs->win.d8 + BPB_TotSec32);
|
||
8003c26: 6cbb ldr r3, [r7, #72] ; 0x48
|
||
8003c28: 2b00 cmp r3, #0
|
||
8003c2a: d112 bne.n 8003c52 <find_volume+0x2e6>
|
||
8003c2c: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c2e: f893 3023 ldrb.w r3, [r3, #35] ; 0x23
|
||
8003c32: 061a lsls r2, r3, #24
|
||
8003c34: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c36: f893 3022 ldrb.w r3, [r3, #34] ; 0x22
|
||
8003c3a: 041b lsls r3, r3, #16
|
||
8003c3c: 4313 orrs r3, r2
|
||
8003c3e: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003c40: f892 2021 ldrb.w r2, [r2, #33] ; 0x21
|
||
8003c44: 0212 lsls r2, r2, #8
|
||
8003c46: 4313 orrs r3, r2
|
||
8003c48: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003c4a: f892 2020 ldrb.w r2, [r2, #32]
|
||
8003c4e: 4313 orrs r3, r2
|
||
8003c50: 64bb str r3, [r7, #72] ; 0x48
|
||
|
||
nrsv = LD_WORD(fs->win.d8 + BPB_RsvdSecCnt); /* Number of reserved sectors */
|
||
8003c52: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c54: 7bdb ldrb r3, [r3, #15]
|
||
8003c56: 021b lsls r3, r3, #8
|
||
8003c58: b21a sxth r2, r3
|
||
8003c5a: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003c5c: 7b9b ldrb r3, [r3, #14]
|
||
8003c5e: b21b sxth r3, r3
|
||
8003c60: 4313 orrs r3, r2
|
||
8003c62: b21b sxth r3, r3
|
||
8003c64: 85fb strh r3, [r7, #46] ; 0x2e
|
||
if (!nrsv) return FR_NO_FILESYSTEM; /* (Must not be 0) */
|
||
8003c66: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
||
8003c68: 2b00 cmp r3, #0
|
||
8003c6a: d101 bne.n 8003c70 <find_volume+0x304>
|
||
8003c6c: 230d movs r3, #13
|
||
8003c6e: e13b b.n 8003ee8 <find_volume+0x57c>
|
||
|
||
/* Determine the FAT sub type */
|
||
sysect = nrsv + fasize + fs->n_rootdir / (SS(fs) / SZ_DIRE); /* RSV + FAT + DIR */
|
||
8003c70: 8dfa ldrh r2, [r7, #46] ; 0x2e
|
||
8003c72: 6cfb ldr r3, [r7, #76] ; 0x4c
|
||
8003c74: 4413 add r3, r2
|
||
8003c76: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003c78: f8b2 2208 ldrh.w r2, [r2, #520] ; 0x208
|
||
8003c7c: 0912 lsrs r2, r2, #4
|
||
8003c7e: b292 uxth r2, r2
|
||
8003c80: 4413 add r3, r2
|
||
8003c82: 62bb str r3, [r7, #40] ; 0x28
|
||
if (tsect < sysect) return FR_NO_FILESYSTEM; /* (Invalid volume size) */
|
||
8003c84: 6cba ldr r2, [r7, #72] ; 0x48
|
||
8003c86: 6abb ldr r3, [r7, #40] ; 0x28
|
||
8003c88: 429a cmp r2, r3
|
||
8003c8a: d201 bcs.n 8003c90 <find_volume+0x324>
|
||
8003c8c: 230d movs r3, #13
|
||
8003c8e: e12b b.n 8003ee8 <find_volume+0x57c>
|
||
nclst = (tsect - sysect) / fs->csize; /* Number of clusters */
|
||
8003c90: 6cba ldr r2, [r7, #72] ; 0x48
|
||
8003c92: 6abb ldr r3, [r7, #40] ; 0x28
|
||
8003c94: 1ad3 subs r3, r2, r3
|
||
8003c96: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003c98: f892 2202 ldrb.w r2, [r2, #514] ; 0x202
|
||
8003c9c: fbb3 f3f2 udiv r3, r3, r2
|
||
8003ca0: 627b str r3, [r7, #36] ; 0x24
|
||
if (!nclst) return FR_NO_FILESYSTEM; /* (Invalid volume size) */
|
||
8003ca2: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8003ca4: 2b00 cmp r3, #0
|
||
8003ca6: d101 bne.n 8003cac <find_volume+0x340>
|
||
8003ca8: 230d movs r3, #13
|
||
8003caa: e11d b.n 8003ee8 <find_volume+0x57c>
|
||
fmt = FS_FAT12;
|
||
8003cac: 2301 movs r3, #1
|
||
8003cae: f887 3057 strb.w r3, [r7, #87] ; 0x57
|
||
if (nclst >= MIN_FAT16) fmt = FS_FAT16;
|
||
8003cb2: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8003cb4: f640 72f5 movw r2, #4085 ; 0xff5
|
||
8003cb8: 4293 cmp r3, r2
|
||
8003cba: d902 bls.n 8003cc2 <find_volume+0x356>
|
||
8003cbc: 2302 movs r3, #2
|
||
8003cbe: f887 3057 strb.w r3, [r7, #87] ; 0x57
|
||
if (nclst >= MIN_FAT32) fmt = FS_FAT32;
|
||
8003cc2: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8003cc4: f64f 72f5 movw r2, #65525 ; 0xfff5
|
||
8003cc8: 4293 cmp r3, r2
|
||
8003cca: d902 bls.n 8003cd2 <find_volume+0x366>
|
||
8003ccc: 2303 movs r3, #3
|
||
8003cce: f887 3057 strb.w r3, [r7, #87] ; 0x57
|
||
|
||
/* Boundaries and Limits */
|
||
fs->n_fatent = nclst + 2; /* Number of FAT entries */
|
||
8003cd2: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8003cd4: 1c9a adds r2, r3, #2
|
||
8003cd6: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003cd8: f8c3 2214 str.w r2, [r3, #532] ; 0x214
|
||
fs->volbase = bsect; /* Volume start sector */
|
||
8003cdc: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003cde: 6d3a ldr r2, [r7, #80] ; 0x50
|
||
8003ce0: f8c3 221c str.w r2, [r3, #540] ; 0x21c
|
||
fs->fatbase = bsect + nrsv; /* FAT start sector */
|
||
8003ce4: 8dfa ldrh r2, [r7, #46] ; 0x2e
|
||
8003ce6: 6d3b ldr r3, [r7, #80] ; 0x50
|
||
8003ce8: 441a add r2, r3
|
||
8003cea: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003cec: f8c3 2220 str.w r2, [r3, #544] ; 0x220
|
||
fs->database = bsect + sysect; /* Data start sector */
|
||
8003cf0: 6d3a ldr r2, [r7, #80] ; 0x50
|
||
8003cf2: 6abb ldr r3, [r7, #40] ; 0x28
|
||
8003cf4: 441a add r2, r3
|
||
8003cf6: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003cf8: f8c3 2228 str.w r2, [r3, #552] ; 0x228
|
||
if (fmt == FS_FAT32) {
|
||
8003cfc: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
|
||
8003d00: 2b03 cmp r3, #3
|
||
8003d02: d121 bne.n 8003d48 <find_volume+0x3dc>
|
||
if (fs->n_rootdir) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must be 0) */
|
||
8003d04: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d06: f8b3 3208 ldrh.w r3, [r3, #520] ; 0x208
|
||
8003d0a: 2b00 cmp r3, #0
|
||
8003d0c: d001 beq.n 8003d12 <find_volume+0x3a6>
|
||
8003d0e: 230d movs r3, #13
|
||
8003d10: e0ea b.n 8003ee8 <find_volume+0x57c>
|
||
fs->dirbase = LD_DWORD(fs->win.d8 + BPB_RootClus); /* Root directory start cluster */
|
||
8003d12: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d14: f893 302f ldrb.w r3, [r3, #47] ; 0x2f
|
||
8003d18: 061a lsls r2, r3, #24
|
||
8003d1a: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d1c: f893 302e ldrb.w r3, [r3, #46] ; 0x2e
|
||
8003d20: 041b lsls r3, r3, #16
|
||
8003d22: 4313 orrs r3, r2
|
||
8003d24: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003d26: f892 202d ldrb.w r2, [r2, #45] ; 0x2d
|
||
8003d2a: 0212 lsls r2, r2, #8
|
||
8003d2c: 4313 orrs r3, r2
|
||
8003d2e: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003d30: f892 202c ldrb.w r2, [r2, #44] ; 0x2c
|
||
8003d34: 431a orrs r2, r3
|
||
8003d36: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d38: f8c3 2224 str.w r2, [r3, #548] ; 0x224
|
||
szbfat = fs->n_fatent * 4; /* (Needed FAT size) */
|
||
8003d3c: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d3e: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8003d42: 009b lsls r3, r3, #2
|
||
8003d44: 647b str r3, [r7, #68] ; 0x44
|
||
8003d46: e025 b.n 8003d94 <find_volume+0x428>
|
||
} else {
|
||
if (!fs->n_rootdir) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must not be 0) */
|
||
8003d48: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d4a: f8b3 3208 ldrh.w r3, [r3, #520] ; 0x208
|
||
8003d4e: 2b00 cmp r3, #0
|
||
8003d50: d101 bne.n 8003d56 <find_volume+0x3ea>
|
||
8003d52: 230d movs r3, #13
|
||
8003d54: e0c8 b.n 8003ee8 <find_volume+0x57c>
|
||
fs->dirbase = fs->fatbase + fasize; /* Root directory start sector */
|
||
8003d56: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d58: f8d3 2220 ldr.w r2, [r3, #544] ; 0x220
|
||
8003d5c: 6cfb ldr r3, [r7, #76] ; 0x4c
|
||
8003d5e: 441a add r2, r3
|
||
8003d60: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d62: f8c3 2224 str.w r2, [r3, #548] ; 0x224
|
||
szbfat = (fmt == FS_FAT16) ? /* (Needed FAT size) */
|
||
fs->n_fatent * 2 : fs->n_fatent * 3 / 2 + (fs->n_fatent & 1);
|
||
8003d66: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
|
||
8003d6a: 2b02 cmp r3, #2
|
||
8003d6c: d104 bne.n 8003d78 <find_volume+0x40c>
|
||
8003d6e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d70: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8003d74: 005b lsls r3, r3, #1
|
||
8003d76: e00c b.n 8003d92 <find_volume+0x426>
|
||
8003d78: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d7a: f8d3 2214 ldr.w r2, [r3, #532] ; 0x214
|
||
8003d7e: 4613 mov r3, r2
|
||
8003d80: 005b lsls r3, r3, #1
|
||
8003d82: 4413 add r3, r2
|
||
8003d84: 085a lsrs r2, r3, #1
|
||
8003d86: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d88: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8003d8c: f003 0301 and.w r3, r3, #1
|
||
8003d90: 4413 add r3, r2
|
||
szbfat = (fmt == FS_FAT16) ? /* (Needed FAT size) */
|
||
8003d92: 647b str r3, [r7, #68] ; 0x44
|
||
}
|
||
if (fs->fsize < (szbfat + (SS(fs) - 1)) / SS(fs)) /* (BPB_FATSz must not be less than the size needed) */
|
||
8003d94: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003d96: f8d3 2218 ldr.w r2, [r3, #536] ; 0x218
|
||
8003d9a: 6c7b ldr r3, [r7, #68] ; 0x44
|
||
8003d9c: f203 13ff addw r3, r3, #511 ; 0x1ff
|
||
8003da0: 0a5b lsrs r3, r3, #9
|
||
8003da2: 429a cmp r2, r3
|
||
8003da4: d201 bcs.n 8003daa <find_volume+0x43e>
|
||
return FR_NO_FILESYSTEM;
|
||
8003da6: 230d movs r3, #13
|
||
8003da8: e09e b.n 8003ee8 <find_volume+0x57c>
|
||
|
||
#if !_FS_READONLY
|
||
/* Initialize cluster allocation information */
|
||
fs->last_clust = fs->free_clust = 0xFFFFFFFF;
|
||
8003daa: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003dac: f04f 32ff mov.w r2, #4294967295
|
||
8003db0: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
8003db4: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003db6: f8d3 2210 ldr.w r2, [r3, #528] ; 0x210
|
||
8003dba: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003dbc: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
||
|
||
/* Get fsinfo if available */
|
||
fs->fsi_flag = 0x80;
|
||
8003dc0: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003dc2: 2280 movs r2, #128 ; 0x80
|
||
8003dc4: f883 2205 strb.w r2, [r3, #517] ; 0x205
|
||
#if (_FS_NOFSINFO & 3) != 3
|
||
if (fmt == FS_FAT32 /* Enable FSINFO only if FAT32 and BPB_FSInfo is 1 */
|
||
8003dc8: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
|
||
8003dcc: 2b03 cmp r3, #3
|
||
8003dce: d177 bne.n 8003ec0 <find_volume+0x554>
|
||
&& LD_WORD(fs->win.d8 + BPB_FSInfo) == 1
|
||
8003dd0: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003dd2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31
|
||
8003dd6: 021b lsls r3, r3, #8
|
||
8003dd8: b21a sxth r2, r3
|
||
8003dda: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003ddc: f893 3030 ldrb.w r3, [r3, #48] ; 0x30
|
||
8003de0: b21b sxth r3, r3
|
||
8003de2: 4313 orrs r3, r2
|
||
8003de4: b21b sxth r3, r3
|
||
8003de6: 2b01 cmp r3, #1
|
||
8003de8: d16a bne.n 8003ec0 <find_volume+0x554>
|
||
&& move_window(fs, bsect + 1) == FR_OK)
|
||
8003dea: 6d3b ldr r3, [r7, #80] ; 0x50
|
||
8003dec: 3301 adds r3, #1
|
||
8003dee: 4619 mov r1, r3
|
||
8003df0: 6bb8 ldr r0, [r7, #56] ; 0x38
|
||
8003df2: f7fe fdec bl 80029ce <move_window>
|
||
8003df6: 4603 mov r3, r0
|
||
8003df8: 2b00 cmp r3, #0
|
||
8003dfa: d161 bne.n 8003ec0 <find_volume+0x554>
|
||
{
|
||
fs->fsi_flag = 0;
|
||
8003dfc: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003dfe: 2200 movs r2, #0
|
||
8003e00: f883 2205 strb.w r2, [r3, #517] ; 0x205
|
||
if (LD_WORD(fs->win.d8 + BS_55AA) == 0xAA55 /* Load FSINFO data if available */
|
||
8003e04: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003e06: f893 31ff ldrb.w r3, [r3, #511] ; 0x1ff
|
||
8003e0a: 021b lsls r3, r3, #8
|
||
8003e0c: b21a sxth r2, r3
|
||
8003e0e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003e10: f893 31fe ldrb.w r3, [r3, #510] ; 0x1fe
|
||
8003e14: b21b sxth r3, r3
|
||
8003e16: 4313 orrs r3, r2
|
||
8003e18: b21b sxth r3, r3
|
||
8003e1a: 4a35 ldr r2, [pc, #212] ; (8003ef0 <find_volume+0x584>)
|
||
8003e1c: 4293 cmp r3, r2
|
||
8003e1e: d14f bne.n 8003ec0 <find_volume+0x554>
|
||
&& LD_DWORD(fs->win.d8 + FSI_LeadSig) == 0x41615252
|
||
8003e20: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003e22: 78db ldrb r3, [r3, #3]
|
||
8003e24: 061a lsls r2, r3, #24
|
||
8003e26: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003e28: 789b ldrb r3, [r3, #2]
|
||
8003e2a: 041b lsls r3, r3, #16
|
||
8003e2c: 4313 orrs r3, r2
|
||
8003e2e: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003e30: 7852 ldrb r2, [r2, #1]
|
||
8003e32: 0212 lsls r2, r2, #8
|
||
8003e34: 4313 orrs r3, r2
|
||
8003e36: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003e38: 7812 ldrb r2, [r2, #0]
|
||
8003e3a: 4313 orrs r3, r2
|
||
8003e3c: 4a2d ldr r2, [pc, #180] ; (8003ef4 <find_volume+0x588>)
|
||
8003e3e: 4293 cmp r3, r2
|
||
8003e40: d13e bne.n 8003ec0 <find_volume+0x554>
|
||
&& LD_DWORD(fs->win.d8 + FSI_StrucSig) == 0x61417272)
|
||
8003e42: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003e44: f893 31e7 ldrb.w r3, [r3, #487] ; 0x1e7
|
||
8003e48: 061a lsls r2, r3, #24
|
||
8003e4a: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003e4c: f893 31e6 ldrb.w r3, [r3, #486] ; 0x1e6
|
||
8003e50: 041b lsls r3, r3, #16
|
||
8003e52: 4313 orrs r3, r2
|
||
8003e54: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003e56: f892 21e5 ldrb.w r2, [r2, #485] ; 0x1e5
|
||
8003e5a: 0212 lsls r2, r2, #8
|
||
8003e5c: 4313 orrs r3, r2
|
||
8003e5e: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003e60: f892 21e4 ldrb.w r2, [r2, #484] ; 0x1e4
|
||
8003e64: 4313 orrs r3, r2
|
||
8003e66: 4a24 ldr r2, [pc, #144] ; (8003ef8 <find_volume+0x58c>)
|
||
8003e68: 4293 cmp r3, r2
|
||
8003e6a: d129 bne.n 8003ec0 <find_volume+0x554>
|
||
{
|
||
#if (_FS_NOFSINFO & 1) == 0
|
||
fs->free_clust = LD_DWORD(fs->win.d8 + FSI_Free_Count);
|
||
8003e6c: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003e6e: f893 31eb ldrb.w r3, [r3, #491] ; 0x1eb
|
||
8003e72: 061a lsls r2, r3, #24
|
||
8003e74: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003e76: f893 31ea ldrb.w r3, [r3, #490] ; 0x1ea
|
||
8003e7a: 041b lsls r3, r3, #16
|
||
8003e7c: 4313 orrs r3, r2
|
||
8003e7e: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003e80: f892 21e9 ldrb.w r2, [r2, #489] ; 0x1e9
|
||
8003e84: 0212 lsls r2, r2, #8
|
||
8003e86: 4313 orrs r3, r2
|
||
8003e88: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003e8a: f892 21e8 ldrb.w r2, [r2, #488] ; 0x1e8
|
||
8003e8e: 431a orrs r2, r3
|
||
8003e90: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003e92: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
#endif
|
||
#if (_FS_NOFSINFO & 2) == 0
|
||
fs->last_clust = LD_DWORD(fs->win.d8 + FSI_Nxt_Free);
|
||
8003e96: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003e98: f893 31ef ldrb.w r3, [r3, #495] ; 0x1ef
|
||
8003e9c: 061a lsls r2, r3, #24
|
||
8003e9e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003ea0: f893 31ee ldrb.w r3, [r3, #494] ; 0x1ee
|
||
8003ea4: 041b lsls r3, r3, #16
|
||
8003ea6: 4313 orrs r3, r2
|
||
8003ea8: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003eaa: f892 21ed ldrb.w r2, [r2, #493] ; 0x1ed
|
||
8003eae: 0212 lsls r2, r2, #8
|
||
8003eb0: 4313 orrs r3, r2
|
||
8003eb2: 6bba ldr r2, [r7, #56] ; 0x38
|
||
8003eb4: f892 21ec ldrb.w r2, [r2, #492] ; 0x1ec
|
||
8003eb8: 431a orrs r2, r3
|
||
8003eba: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003ebc: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
||
#endif
|
||
}
|
||
}
|
||
#endif
|
||
#endif
|
||
fs->fs_type = fmt; /* FAT sub-type */
|
||
8003ec0: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003ec2: f897 2057 ldrb.w r2, [r7, #87] ; 0x57
|
||
8003ec6: f883 2200 strb.w r2, [r3, #512] ; 0x200
|
||
fs->id = ++Fsid; /* File system mount ID */
|
||
8003eca: 4b0c ldr r3, [pc, #48] ; (8003efc <find_volume+0x590>)
|
||
8003ecc: 881b ldrh r3, [r3, #0]
|
||
8003ece: 3301 adds r3, #1
|
||
8003ed0: b29a uxth r2, r3
|
||
8003ed2: 4b0a ldr r3, [pc, #40] ; (8003efc <find_volume+0x590>)
|
||
8003ed4: 801a strh r2, [r3, #0]
|
||
8003ed6: 4b09 ldr r3, [pc, #36] ; (8003efc <find_volume+0x590>)
|
||
8003ed8: 881a ldrh r2, [r3, #0]
|
||
8003eda: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8003edc: f8a3 2206 strh.w r2, [r3, #518] ; 0x206
|
||
#if _FS_RPATH
|
||
fs->cdir = 0; /* Set current directory to root */
|
||
#endif
|
||
#if _FS_LOCK /* Clear file lock semaphores */
|
||
clear_lock(fs);
|
||
8003ee0: 6bb8 ldr r0, [r7, #56] ; 0x38
|
||
8003ee2: f7fe fd01 bl 80028e8 <clear_lock>
|
||
#endif
|
||
|
||
return FR_OK;
|
||
8003ee6: 2300 movs r3, #0
|
||
}
|
||
8003ee8: 4618 mov r0, r3
|
||
8003eea: 3758 adds r7, #88 ; 0x58
|
||
8003eec: 46bd mov sp, r7
|
||
8003eee: bd80 pop {r7, pc}
|
||
8003ef0: ffffaa55 .word 0xffffaa55
|
||
8003ef4: 41615252 .word 0x41615252
|
||
8003ef8: 61417272 .word 0x61417272
|
||
8003efc: 200000b0 .word 0x200000b0
|
||
|
||
08003f00 <validate>:
|
||
|
||
static
|
||
FRESULT validate ( /* FR_OK(0): The object is valid, !=0: Invalid */
|
||
void* obj /* Pointer to the object FIL/DIR to check validity */
|
||
)
|
||
{
|
||
8003f00: b580 push {r7, lr}
|
||
8003f02: b084 sub sp, #16
|
||
8003f04: af00 add r7, sp, #0
|
||
8003f06: 6078 str r0, [r7, #4]
|
||
FIL *fil = (FIL*)obj; /* Assuming offset of .fs and .id in the FIL/DIR structure is identical */
|
||
8003f08: 687b ldr r3, [r7, #4]
|
||
8003f0a: 60fb str r3, [r7, #12]
|
||
|
||
|
||
if (!fil || !fil->fs || !fil->fs->fs_type || fil->fs->id != fil->id || (disk_status(fil->fs->drv) & STA_NOINIT))
|
||
8003f0c: 68fb ldr r3, [r7, #12]
|
||
8003f0e: 2b00 cmp r3, #0
|
||
8003f10: d022 beq.n 8003f58 <validate+0x58>
|
||
8003f12: 68fb ldr r3, [r7, #12]
|
||
8003f14: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003f18: 2b00 cmp r3, #0
|
||
8003f1a: d01d beq.n 8003f58 <validate+0x58>
|
||
8003f1c: 68fb ldr r3, [r7, #12]
|
||
8003f1e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003f22: f893 3200 ldrb.w r3, [r3, #512] ; 0x200
|
||
8003f26: 2b00 cmp r3, #0
|
||
8003f28: d016 beq.n 8003f58 <validate+0x58>
|
||
8003f2a: 68fb ldr r3, [r7, #12]
|
||
8003f2c: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003f30: f8b3 2206 ldrh.w r2, [r3, #518] ; 0x206
|
||
8003f34: 68fb ldr r3, [r7, #12]
|
||
8003f36: f8b3 3204 ldrh.w r3, [r3, #516] ; 0x204
|
||
8003f3a: 429a cmp r2, r3
|
||
8003f3c: d10c bne.n 8003f58 <validate+0x58>
|
||
8003f3e: 68fb ldr r3, [r7, #12]
|
||
8003f40: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8003f44: f893 3201 ldrb.w r3, [r3, #513] ; 0x201
|
||
8003f48: 4618 mov r0, r3
|
||
8003f4a: f7fe fa8f bl 800246c <disk_status>
|
||
8003f4e: 4603 mov r3, r0
|
||
8003f50: f003 0301 and.w r3, r3, #1
|
||
8003f54: 2b00 cmp r3, #0
|
||
8003f56: d001 beq.n 8003f5c <validate+0x5c>
|
||
return FR_INVALID_OBJECT;
|
||
8003f58: 2309 movs r3, #9
|
||
8003f5a: e000 b.n 8003f5e <validate+0x5e>
|
||
|
||
ENTER_FF(fil->fs); /* Lock file system */
|
||
|
||
return FR_OK;
|
||
8003f5c: 2300 movs r3, #0
|
||
}
|
||
8003f5e: 4618 mov r0, r3
|
||
8003f60: 3710 adds r7, #16
|
||
8003f62: 46bd mov sp, r7
|
||
8003f64: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08003f68 <f_mount>:
|
||
FRESULT f_mount (
|
||
FATFS* fs, /* Pointer to the file system object (NULL:unmount)*/
|
||
const TCHAR* path, /* Logical drive number to be mounted/unmounted */
|
||
BYTE opt /* 0:Do not mount (delayed mount), 1:Mount immediately */
|
||
)
|
||
{
|
||
8003f68: b580 push {r7, lr}
|
||
8003f6a: b088 sub sp, #32
|
||
8003f6c: af00 add r7, sp, #0
|
||
8003f6e: 60f8 str r0, [r7, #12]
|
||
8003f70: 60b9 str r1, [r7, #8]
|
||
8003f72: 4613 mov r3, r2
|
||
8003f74: 71fb strb r3, [r7, #7]
|
||
FATFS *cfs;
|
||
int vol;
|
||
FRESULT res;
|
||
const TCHAR *rp = path;
|
||
8003f76: 68bb ldr r3, [r7, #8]
|
||
8003f78: 613b str r3, [r7, #16]
|
||
|
||
|
||
vol = get_ldnumber(&rp);
|
||
8003f7a: f107 0310 add.w r3, r7, #16
|
||
8003f7e: 4618 mov r0, r3
|
||
8003f80: f7ff fc46 bl 8003810 <get_ldnumber>
|
||
8003f84: 61f8 str r0, [r7, #28]
|
||
if (vol < 0) return FR_INVALID_DRIVE;
|
||
8003f86: 69fb ldr r3, [r7, #28]
|
||
8003f88: 2b00 cmp r3, #0
|
||
8003f8a: da01 bge.n 8003f90 <f_mount+0x28>
|
||
8003f8c: 230b movs r3, #11
|
||
8003f8e: e02d b.n 8003fec <f_mount+0x84>
|
||
cfs = FatFs[vol]; /* Pointer to fs object */
|
||
8003f90: 4a18 ldr r2, [pc, #96] ; (8003ff4 <f_mount+0x8c>)
|
||
8003f92: 69fb ldr r3, [r7, #28]
|
||
8003f94: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
||
8003f98: 61bb str r3, [r7, #24]
|
||
|
||
if (cfs) {
|
||
8003f9a: 69bb ldr r3, [r7, #24]
|
||
8003f9c: 2b00 cmp r3, #0
|
||
8003f9e: d006 beq.n 8003fae <f_mount+0x46>
|
||
#if _FS_LOCK
|
||
clear_lock(cfs);
|
||
8003fa0: 69b8 ldr r0, [r7, #24]
|
||
8003fa2: f7fe fca1 bl 80028e8 <clear_lock>
|
||
#endif
|
||
#if _FS_REENTRANT /* Discard sync object of the current volume */
|
||
if (!ff_del_syncobj(cfs->sobj)) return FR_INT_ERR;
|
||
#endif
|
||
cfs->fs_type = 0; /* Clear old fs object */
|
||
8003fa6: 69bb ldr r3, [r7, #24]
|
||
8003fa8: 2200 movs r2, #0
|
||
8003faa: f883 2200 strb.w r2, [r3, #512] ; 0x200
|
||
}
|
||
|
||
if (fs) {
|
||
8003fae: 68fb ldr r3, [r7, #12]
|
||
8003fb0: 2b00 cmp r3, #0
|
||
8003fb2: d003 beq.n 8003fbc <f_mount+0x54>
|
||
fs->fs_type = 0; /* Clear new fs object */
|
||
8003fb4: 68fb ldr r3, [r7, #12]
|
||
8003fb6: 2200 movs r2, #0
|
||
8003fb8: f883 2200 strb.w r2, [r3, #512] ; 0x200
|
||
#if _FS_REENTRANT /* Create sync object for the new volume */
|
||
if (!ff_cre_syncobj((BYTE)vol, &fs->sobj)) return FR_INT_ERR;
|
||
#endif
|
||
}
|
||
FatFs[vol] = fs; /* Register new fs object */
|
||
8003fbc: 68fa ldr r2, [r7, #12]
|
||
8003fbe: 490d ldr r1, [pc, #52] ; (8003ff4 <f_mount+0x8c>)
|
||
8003fc0: 69fb ldr r3, [r7, #28]
|
||
8003fc2: f841 2023 str.w r2, [r1, r3, lsl #2]
|
||
|
||
if (!fs || opt != 1) return FR_OK; /* Do not mount now, it will be mounted later */
|
||
8003fc6: 68fb ldr r3, [r7, #12]
|
||
8003fc8: 2b00 cmp r3, #0
|
||
8003fca: d002 beq.n 8003fd2 <f_mount+0x6a>
|
||
8003fcc: 79fb ldrb r3, [r7, #7]
|
||
8003fce: 2b01 cmp r3, #1
|
||
8003fd0: d001 beq.n 8003fd6 <f_mount+0x6e>
|
||
8003fd2: 2300 movs r3, #0
|
||
8003fd4: e00a b.n 8003fec <f_mount+0x84>
|
||
|
||
res = find_volume(&fs, &path, 0); /* Force mounted the volume */
|
||
8003fd6: f107 0108 add.w r1, r7, #8
|
||
8003fda: f107 030c add.w r3, r7, #12
|
||
8003fde: 2200 movs r2, #0
|
||
8003fe0: 4618 mov r0, r3
|
||
8003fe2: f7ff fcc3 bl 800396c <find_volume>
|
||
8003fe6: 4603 mov r3, r0
|
||
8003fe8: 75fb strb r3, [r7, #23]
|
||
LEAVE_FF(fs, res);
|
||
8003fea: 7dfb ldrb r3, [r7, #23]
|
||
}
|
||
8003fec: 4618 mov r0, r3
|
||
8003fee: 3720 adds r7, #32
|
||
8003ff0: 46bd mov sp, r7
|
||
8003ff2: bd80 pop {r7, pc}
|
||
8003ff4: 200000ac .word 0x200000ac
|
||
|
||
08003ff8 <f_open>:
|
||
FRESULT f_open (
|
||
FIL* fp, /* Pointer to the blank file object */
|
||
const TCHAR* path, /* Pointer to the file name */
|
||
BYTE mode /* Access mode and file open mode flags */
|
||
)
|
||
{
|
||
8003ff8: b580 push {r7, lr}
|
||
8003ffa: f5ad 7d14 sub.w sp, sp, #592 ; 0x250
|
||
8003ffe: af00 add r7, sp, #0
|
||
8004000: f107 030c add.w r3, r7, #12
|
||
8004004: 6018 str r0, [r3, #0]
|
||
8004006: f107 0308 add.w r3, r7, #8
|
||
800400a: 6019 str r1, [r3, #0]
|
||
800400c: 1dfb adds r3, r7, #7
|
||
800400e: 701a strb r2, [r3, #0]
|
||
#if !_FS_READONLY
|
||
DWORD dw, cl;
|
||
#endif
|
||
|
||
|
||
if (!fp) return FR_INVALID_OBJECT;
|
||
8004010: f107 030c add.w r3, r7, #12
|
||
8004014: 681b ldr r3, [r3, #0]
|
||
8004016: 2b00 cmp r3, #0
|
||
8004018: d101 bne.n 800401e <f_open+0x26>
|
||
800401a: 2309 movs r3, #9
|
||
800401c: e1f2 b.n 8004404 <f_open+0x40c>
|
||
fp->fs = 0; /* Clear file object */
|
||
800401e: f107 030c add.w r3, r7, #12
|
||
8004022: 681b ldr r3, [r3, #0]
|
||
8004024: 2200 movs r2, #0
|
||
8004026: f8c3 2200 str.w r2, [r3, #512] ; 0x200
|
||
|
||
/* Get logical drive number */
|
||
#if !_FS_READONLY
|
||
mode &= FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW;
|
||
800402a: 1dfb adds r3, r7, #7
|
||
800402c: 1dfa adds r2, r7, #7
|
||
800402e: 7812 ldrb r2, [r2, #0]
|
||
8004030: f002 021f and.w r2, r2, #31
|
||
8004034: 701a strb r2, [r3, #0]
|
||
res = find_volume(&dj.fs, &path, (BYTE)(mode & ~FA_READ));
|
||
8004036: 1dfb adds r3, r7, #7
|
||
8004038: 781b ldrb r3, [r3, #0]
|
||
800403a: f023 0301 bic.w r3, r3, #1
|
||
800403e: b2da uxtb r2, r3
|
||
8004040: f107 0108 add.w r1, r7, #8
|
||
8004044: f107 0320 add.w r3, r7, #32
|
||
8004048: f503 7300 add.w r3, r3, #512 ; 0x200
|
||
800404c: 4618 mov r0, r3
|
||
800404e: f7ff fc8d bl 800396c <find_volume>
|
||
8004052: 4603 mov r3, r0
|
||
8004054: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
#else
|
||
mode &= FA_READ;
|
||
res = find_volume(&dj.fs, &path, 0);
|
||
#endif
|
||
if (res == FR_OK) {
|
||
8004058: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
800405c: 2b00 cmp r3, #0
|
||
800405e: f040 81cf bne.w 8004400 <f_open+0x408>
|
||
INIT_BUF(dj);
|
||
8004062: f107 0320 add.w r3, r7, #32
|
||
8004066: f107 0214 add.w r2, r7, #20
|
||
800406a: f8c3 2218 str.w r2, [r3, #536] ; 0x218
|
||
res = follow_path(&dj, path); /* Follow the file path */
|
||
800406e: f107 0308 add.w r3, r7, #8
|
||
8004072: 681a ldr r2, [r3, #0]
|
||
8004074: f107 0320 add.w r3, r7, #32
|
||
8004078: 4611 mov r1, r2
|
||
800407a: 4618 mov r0, r3
|
||
800407c: f7ff fb5a bl 8003734 <follow_path>
|
||
8004080: 4603 mov r3, r0
|
||
8004082: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
dir = dj.dir;
|
||
8004086: f107 0320 add.w r3, r7, #32
|
||
800408a: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
800408e: f8c7 3248 str.w r3, [r7, #584] ; 0x248
|
||
#if !_FS_READONLY /* R/W configuration */
|
||
if (res == FR_OK) {
|
||
8004092: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
8004096: 2b00 cmp r3, #0
|
||
8004098: d11a bne.n 80040d0 <f_open+0xd8>
|
||
if (!dir) /* Default directory itself */
|
||
800409a: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
800409e: 2b00 cmp r3, #0
|
||
80040a0: d103 bne.n 80040aa <f_open+0xb2>
|
||
res = FR_INVALID_NAME;
|
||
80040a2: 2306 movs r3, #6
|
||
80040a4: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
80040a8: e012 b.n 80040d0 <f_open+0xd8>
|
||
#if _FS_LOCK
|
||
else
|
||
res = chk_lock(&dj, (mode & ~FA_READ) ? 1 : 0);
|
||
80040aa: 1dfb adds r3, r7, #7
|
||
80040ac: 781b ldrb r3, [r3, #0]
|
||
80040ae: f023 0301 bic.w r3, r3, #1
|
||
80040b2: 2b00 cmp r3, #0
|
||
80040b4: bf14 ite ne
|
||
80040b6: 2301 movne r3, #1
|
||
80040b8: 2300 moveq r3, #0
|
||
80040ba: b2db uxtb r3, r3
|
||
80040bc: 461a mov r2, r3
|
||
80040be: f107 0320 add.w r3, r7, #32
|
||
80040c2: 4611 mov r1, r2
|
||
80040c4: 4618 mov r0, r3
|
||
80040c6: f7fe fac9 bl 800265c <chk_lock>
|
||
80040ca: 4603 mov r3, r0
|
||
80040cc: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
#endif
|
||
}
|
||
/* Create or Open a file */
|
||
if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) {
|
||
80040d0: 1dfb adds r3, r7, #7
|
||
80040d2: 781b ldrb r3, [r3, #0]
|
||
80040d4: f003 031c and.w r3, r3, #28
|
||
80040d8: 2b00 cmp r3, #0
|
||
80040da: f000 80cc beq.w 8004276 <f_open+0x27e>
|
||
if (res != FR_OK) { /* No file, create new */
|
||
80040de: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
80040e2: 2b00 cmp r3, #0
|
||
80040e4: d01f beq.n 8004126 <f_open+0x12e>
|
||
if (res == FR_NO_FILE) /* There is no file to open, create a new entry */
|
||
80040e6: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
80040ea: 2b04 cmp r3, #4
|
||
80040ec: d10e bne.n 800410c <f_open+0x114>
|
||
#if _FS_LOCK
|
||
res = enq_lock() ? dir_register(&dj) : FR_TOO_MANY_OPEN_FILES;
|
||
80040ee: f7fe fb21 bl 8002734 <enq_lock>
|
||
80040f2: 4603 mov r3, r0
|
||
80040f4: 2b00 cmp r3, #0
|
||
80040f6: d006 beq.n 8004106 <f_open+0x10e>
|
||
80040f8: f107 0320 add.w r3, r7, #32
|
||
80040fc: 4618 mov r0, r3
|
||
80040fe: f7ff fa1f bl 8003540 <dir_register>
|
||
8004102: 4603 mov r3, r0
|
||
8004104: e000 b.n 8004108 <f_open+0x110>
|
||
8004106: 2312 movs r3, #18
|
||
8004108: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
#else
|
||
res = dir_register(&dj);
|
||
#endif
|
||
mode |= FA_CREATE_ALWAYS; /* File is created */
|
||
800410c: 1dfb adds r3, r7, #7
|
||
800410e: 1dfa adds r2, r7, #7
|
||
8004110: 7812 ldrb r2, [r2, #0]
|
||
8004112: f042 0208 orr.w r2, r2, #8
|
||
8004116: 701a strb r2, [r3, #0]
|
||
dir = dj.dir; /* New entry */
|
||
8004118: f107 0320 add.w r3, r7, #32
|
||
800411c: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8004120: f8c7 3248 str.w r3, [r7, #584] ; 0x248
|
||
8004124: e014 b.n 8004150 <f_open+0x158>
|
||
}
|
||
else { /* Any object is already existing */
|
||
if (dir[DIR_Attr] & (AM_RDO | AM_DIR)) { /* Cannot overwrite it (R/O or DIR) */
|
||
8004126: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
800412a: 330b adds r3, #11
|
||
800412c: 781b ldrb r3, [r3, #0]
|
||
800412e: f003 0311 and.w r3, r3, #17
|
||
8004132: 2b00 cmp r3, #0
|
||
8004134: d003 beq.n 800413e <f_open+0x146>
|
||
res = FR_DENIED;
|
||
8004136: 2307 movs r3, #7
|
||
8004138: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
800413c: e008 b.n 8004150 <f_open+0x158>
|
||
} else {
|
||
if (mode & FA_CREATE_NEW) /* Cannot create as new file */
|
||
800413e: 1dfb adds r3, r7, #7
|
||
8004140: 781b ldrb r3, [r3, #0]
|
||
8004142: f003 0304 and.w r3, r3, #4
|
||
8004146: 2b00 cmp r3, #0
|
||
8004148: d002 beq.n 8004150 <f_open+0x158>
|
||
res = FR_EXIST;
|
||
800414a: 2308 movs r3, #8
|
||
800414c: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
}
|
||
}
|
||
if (res == FR_OK && (mode & FA_CREATE_ALWAYS)) { /* Truncate it if overwrite mode */
|
||
8004150: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
8004154: 2b00 cmp r3, #0
|
||
8004156: f040 80af bne.w 80042b8 <f_open+0x2c0>
|
||
800415a: 1dfb adds r3, r7, #7
|
||
800415c: 781b ldrb r3, [r3, #0]
|
||
800415e: f003 0308 and.w r3, r3, #8
|
||
8004162: 2b00 cmp r3, #0
|
||
8004164: f000 80a8 beq.w 80042b8 <f_open+0x2c0>
|
||
dw = GET_FATTIME(); /* Created time */
|
||
8004168: f7fe f910 bl 800238c <get_fattime>
|
||
800416c: f8c7 0244 str.w r0, [r7, #580] ; 0x244
|
||
ST_DWORD(dir + DIR_CrtTime, dw);
|
||
8004170: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
8004174: 330e adds r3, #14
|
||
8004176: f8d7 2244 ldr.w r2, [r7, #580] ; 0x244
|
||
800417a: b2d2 uxtb r2, r2
|
||
800417c: 701a strb r2, [r3, #0]
|
||
800417e: f8d7 3244 ldr.w r3, [r7, #580] ; 0x244
|
||
8004182: b29b uxth r3, r3
|
||
8004184: 0a1b lsrs r3, r3, #8
|
||
8004186: b29a uxth r2, r3
|
||
8004188: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
800418c: 330f adds r3, #15
|
||
800418e: b2d2 uxtb r2, r2
|
||
8004190: 701a strb r2, [r3, #0]
|
||
8004192: f8d7 3244 ldr.w r3, [r7, #580] ; 0x244
|
||
8004196: 0c1a lsrs r2, r3, #16
|
||
8004198: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
800419c: 3310 adds r3, #16
|
||
800419e: b2d2 uxtb r2, r2
|
||
80041a0: 701a strb r2, [r3, #0]
|
||
80041a2: f8d7 3244 ldr.w r3, [r7, #580] ; 0x244
|
||
80041a6: 0e1a lsrs r2, r3, #24
|
||
80041a8: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80041ac: 3311 adds r3, #17
|
||
80041ae: b2d2 uxtb r2, r2
|
||
80041b0: 701a strb r2, [r3, #0]
|
||
dir[DIR_Attr] = 0; /* Reset attribute */
|
||
80041b2: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80041b6: 330b adds r3, #11
|
||
80041b8: 2200 movs r2, #0
|
||
80041ba: 701a strb r2, [r3, #0]
|
||
ST_DWORD(dir + DIR_FileSize, 0);/* size = 0 */
|
||
80041bc: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80041c0: 331c adds r3, #28
|
||
80041c2: 2200 movs r2, #0
|
||
80041c4: 701a strb r2, [r3, #0]
|
||
80041c6: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80041ca: 331d adds r3, #29
|
||
80041cc: 2200 movs r2, #0
|
||
80041ce: 701a strb r2, [r3, #0]
|
||
80041d0: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80041d4: 331e adds r3, #30
|
||
80041d6: 2200 movs r2, #0
|
||
80041d8: 701a strb r2, [r3, #0]
|
||
80041da: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80041de: 331f adds r3, #31
|
||
80041e0: 2200 movs r2, #0
|
||
80041e2: 701a strb r2, [r3, #0]
|
||
cl = ld_clust(dj.fs, dir); /* Get start cluster */
|
||
80041e4: f107 0320 add.w r3, r7, #32
|
||
80041e8: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80041ec: f8d7 1248 ldr.w r1, [r7, #584] ; 0x248
|
||
80041f0: 4618 mov r0, r3
|
||
80041f2: f7ff f903 bl 80033fc <ld_clust>
|
||
80041f6: f8c7 0240 str.w r0, [r7, #576] ; 0x240
|
||
st_clust(dir, 0); /* cluster = 0 */
|
||
80041fa: 2100 movs r1, #0
|
||
80041fc: f8d7 0248 ldr.w r0, [r7, #584] ; 0x248
|
||
8004200: f7ff f929 bl 8003456 <st_clust>
|
||
dj.fs->wflag = 1;
|
||
8004204: f107 0320 add.w r3, r7, #32
|
||
8004208: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800420c: 2201 movs r2, #1
|
||
800420e: f883 2204 strb.w r2, [r3, #516] ; 0x204
|
||
if (cl) { /* Remove the cluster chain if exist */
|
||
8004212: f8d7 3240 ldr.w r3, [r7, #576] ; 0x240
|
||
8004216: 2b00 cmp r3, #0
|
||
8004218: d04e beq.n 80042b8 <f_open+0x2c0>
|
||
dw = dj.fs->winsect;
|
||
800421a: f107 0320 add.w r3, r7, #32
|
||
800421e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8004222: f8d3 322c ldr.w r3, [r3, #556] ; 0x22c
|
||
8004226: f8c7 3244 str.w r3, [r7, #580] ; 0x244
|
||
res = remove_chain(dj.fs, cl);
|
||
800422a: f107 0320 add.w r3, r7, #32
|
||
800422e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8004232: f8d7 1240 ldr.w r1, [r7, #576] ; 0x240
|
||
8004236: 4618 mov r0, r3
|
||
8004238: f7fe fde0 bl 8002dfc <remove_chain>
|
||
800423c: 4603 mov r3, r0
|
||
800423e: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
if (res == FR_OK) {
|
||
8004242: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
8004246: 2b00 cmp r3, #0
|
||
8004248: d136 bne.n 80042b8 <f_open+0x2c0>
|
||
dj.fs->last_clust = cl - 1; /* Reuse the cluster hole */
|
||
800424a: f107 0320 add.w r3, r7, #32
|
||
800424e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8004252: f8d7 2240 ldr.w r2, [r7, #576] ; 0x240
|
||
8004256: 3a01 subs r2, #1
|
||
8004258: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
||
res = move_window(dj.fs, dw);
|
||
800425c: f107 0320 add.w r3, r7, #32
|
||
8004260: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8004264: f8d7 1244 ldr.w r1, [r7, #580] ; 0x244
|
||
8004268: 4618 mov r0, r3
|
||
800426a: f7fe fbb0 bl 80029ce <move_window>
|
||
800426e: 4603 mov r3, r0
|
||
8004270: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
8004274: e020 b.n 80042b8 <f_open+0x2c0>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
else { /* Open an existing file */
|
||
if (res == FR_OK) { /* Follow succeeded */
|
||
8004276: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
800427a: 2b00 cmp r3, #0
|
||
800427c: d11c bne.n 80042b8 <f_open+0x2c0>
|
||
if (dir[DIR_Attr] & AM_DIR) { /* It is a directory */
|
||
800427e: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
8004282: 330b adds r3, #11
|
||
8004284: 781b ldrb r3, [r3, #0]
|
||
8004286: f003 0310 and.w r3, r3, #16
|
||
800428a: 2b00 cmp r3, #0
|
||
800428c: d003 beq.n 8004296 <f_open+0x29e>
|
||
res = FR_NO_FILE;
|
||
800428e: 2304 movs r3, #4
|
||
8004290: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
8004294: e010 b.n 80042b8 <f_open+0x2c0>
|
||
} else {
|
||
if ((mode & FA_WRITE) && (dir[DIR_Attr] & AM_RDO)) /* R/O violation */
|
||
8004296: 1dfb adds r3, r7, #7
|
||
8004298: 781b ldrb r3, [r3, #0]
|
||
800429a: f003 0302 and.w r3, r3, #2
|
||
800429e: 2b00 cmp r3, #0
|
||
80042a0: d00a beq.n 80042b8 <f_open+0x2c0>
|
||
80042a2: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
80042a6: 330b adds r3, #11
|
||
80042a8: 781b ldrb r3, [r3, #0]
|
||
80042aa: f003 0301 and.w r3, r3, #1
|
||
80042ae: 2b00 cmp r3, #0
|
||
80042b0: d002 beq.n 80042b8 <f_open+0x2c0>
|
||
res = FR_DENIED;
|
||
80042b2: 2307 movs r3, #7
|
||
80042b4: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
}
|
||
}
|
||
}
|
||
if (res == FR_OK) {
|
||
80042b8: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
80042bc: 2b00 cmp r3, #0
|
||
80042be: d13d bne.n 800433c <f_open+0x344>
|
||
if (mode & FA_CREATE_ALWAYS) /* Set file change flag if created or overwritten */
|
||
80042c0: 1dfb adds r3, r7, #7
|
||
80042c2: 781b ldrb r3, [r3, #0]
|
||
80042c4: f003 0308 and.w r3, r3, #8
|
||
80042c8: 2b00 cmp r3, #0
|
||
80042ca: d005 beq.n 80042d8 <f_open+0x2e0>
|
||
mode |= FA__WRITTEN;
|
||
80042cc: 1dfb adds r3, r7, #7
|
||
80042ce: 1dfa adds r2, r7, #7
|
||
80042d0: 7812 ldrb r2, [r2, #0]
|
||
80042d2: f042 0220 orr.w r2, r2, #32
|
||
80042d6: 701a strb r2, [r3, #0]
|
||
fp->dir_sect = dj.fs->winsect; /* Pointer to the directory entry */
|
||
80042d8: f107 0320 add.w r3, r7, #32
|
||
80042dc: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80042e0: f8d3 222c ldr.w r2, [r3, #556] ; 0x22c
|
||
80042e4: f107 030c add.w r3, r7, #12
|
||
80042e8: 681b ldr r3, [r3, #0]
|
||
80042ea: f8c3 221c str.w r2, [r3, #540] ; 0x21c
|
||
fp->dir_ptr = dir;
|
||
80042ee: f107 030c add.w r3, r7, #12
|
||
80042f2: 681b ldr r3, [r3, #0]
|
||
80042f4: f8d7 2248 ldr.w r2, [r7, #584] ; 0x248
|
||
80042f8: f8c3 2220 str.w r2, [r3, #544] ; 0x220
|
||
#if _FS_LOCK
|
||
fp->lockid = inc_lock(&dj, (mode & ~FA_READ) ? 1 : 0);
|
||
80042fc: 1dfb adds r3, r7, #7
|
||
80042fe: 781b ldrb r3, [r3, #0]
|
||
8004300: f023 0301 bic.w r3, r3, #1
|
||
8004304: 2b00 cmp r3, #0
|
||
8004306: bf14 ite ne
|
||
8004308: 2301 movne r3, #1
|
||
800430a: 2300 moveq r3, #0
|
||
800430c: b2db uxtb r3, r3
|
||
800430e: 461a mov r2, r3
|
||
8004310: f107 0320 add.w r3, r7, #32
|
||
8004314: 4611 mov r1, r2
|
||
8004316: 4618 mov r0, r3
|
||
8004318: f7fe fa30 bl 800277c <inc_lock>
|
||
800431c: 4602 mov r2, r0
|
||
800431e: f107 030c add.w r3, r7, #12
|
||
8004322: 681b ldr r3, [r3, #0]
|
||
8004324: f8c3 2228 str.w r2, [r3, #552] ; 0x228
|
||
if (!fp->lockid) res = FR_INT_ERR;
|
||
8004328: f107 030c add.w r3, r7, #12
|
||
800432c: 681b ldr r3, [r3, #0]
|
||
800432e: f8d3 3228 ldr.w r3, [r3, #552] ; 0x228
|
||
8004332: 2b00 cmp r3, #0
|
||
8004334: d102 bne.n 800433c <f_open+0x344>
|
||
8004336: 2302 movs r3, #2
|
||
8004338: f887 324f strb.w r3, [r7, #591] ; 0x24f
|
||
}
|
||
}
|
||
#endif
|
||
FREE_BUF();
|
||
|
||
if (res == FR_OK) {
|
||
800433c: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
8004340: 2b00 cmp r3, #0
|
||
8004342: d15d bne.n 8004400 <f_open+0x408>
|
||
fp->flag = mode; /* File access mode */
|
||
8004344: f107 030c add.w r3, r7, #12
|
||
8004348: 681b ldr r3, [r3, #0]
|
||
800434a: 1dfa adds r2, r7, #7
|
||
800434c: 7812 ldrb r2, [r2, #0]
|
||
800434e: f883 2206 strb.w r2, [r3, #518] ; 0x206
|
||
fp->err = 0; /* Clear error flag */
|
||
8004352: f107 030c add.w r3, r7, #12
|
||
8004356: 681b ldr r3, [r3, #0]
|
||
8004358: 2200 movs r2, #0
|
||
800435a: f883 2207 strb.w r2, [r3, #519] ; 0x207
|
||
fp->sclust = ld_clust(dj.fs, dir); /* File start cluster */
|
||
800435e: f107 0320 add.w r3, r7, #32
|
||
8004362: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
8004366: f8d7 1248 ldr.w r1, [r7, #584] ; 0x248
|
||
800436a: 4618 mov r0, r3
|
||
800436c: f7ff f846 bl 80033fc <ld_clust>
|
||
8004370: 4602 mov r2, r0
|
||
8004372: f107 030c add.w r3, r7, #12
|
||
8004376: 681b ldr r3, [r3, #0]
|
||
8004378: f8c3 2210 str.w r2, [r3, #528] ; 0x210
|
||
fp->fsize = LD_DWORD(dir + DIR_FileSize); /* File size */
|
||
800437c: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
8004380: 331f adds r3, #31
|
||
8004382: 781b ldrb r3, [r3, #0]
|
||
8004384: 061a lsls r2, r3, #24
|
||
8004386: f8d7 3248 ldr.w r3, [r7, #584] ; 0x248
|
||
800438a: 331e adds r3, #30
|
||
800438c: 781b ldrb r3, [r3, #0]
|
||
800438e: 041b lsls r3, r3, #16
|
||
8004390: 4313 orrs r3, r2
|
||
8004392: f8d7 2248 ldr.w r2, [r7, #584] ; 0x248
|
||
8004396: 321d adds r2, #29
|
||
8004398: 7812 ldrb r2, [r2, #0]
|
||
800439a: 0212 lsls r2, r2, #8
|
||
800439c: 4313 orrs r3, r2
|
||
800439e: f8d7 2248 ldr.w r2, [r7, #584] ; 0x248
|
||
80043a2: 321c adds r2, #28
|
||
80043a4: 7812 ldrb r2, [r2, #0]
|
||
80043a6: 431a orrs r2, r3
|
||
80043a8: f107 030c add.w r3, r7, #12
|
||
80043ac: 681b ldr r3, [r3, #0]
|
||
80043ae: f8c3 220c str.w r2, [r3, #524] ; 0x20c
|
||
fp->fptr = 0; /* File pointer */
|
||
80043b2: f107 030c add.w r3, r7, #12
|
||
80043b6: 681b ldr r3, [r3, #0]
|
||
80043b8: 2200 movs r2, #0
|
||
80043ba: f8c3 2208 str.w r2, [r3, #520] ; 0x208
|
||
fp->dsect = 0;
|
||
80043be: f107 030c add.w r3, r7, #12
|
||
80043c2: 681b ldr r3, [r3, #0]
|
||
80043c4: 2200 movs r2, #0
|
||
80043c6: f8c3 2218 str.w r2, [r3, #536] ; 0x218
|
||
#if _USE_FASTSEEK
|
||
fp->cltbl = 0; /* Normal seek mode */
|
||
80043ca: f107 030c add.w r3, r7, #12
|
||
80043ce: 681b ldr r3, [r3, #0]
|
||
80043d0: 2200 movs r2, #0
|
||
80043d2: f8c3 2224 str.w r2, [r3, #548] ; 0x224
|
||
#endif
|
||
fp->fs = dj.fs; /* Validate file object */
|
||
80043d6: f107 0320 add.w r3, r7, #32
|
||
80043da: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
80043de: f107 030c add.w r3, r7, #12
|
||
80043e2: 681b ldr r3, [r3, #0]
|
||
80043e4: f8c3 2200 str.w r2, [r3, #512] ; 0x200
|
||
fp->id = fp->fs->id;
|
||
80043e8: f107 030c add.w r3, r7, #12
|
||
80043ec: 681b ldr r3, [r3, #0]
|
||
80043ee: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
80043f2: f8b3 2206 ldrh.w r2, [r3, #518] ; 0x206
|
||
80043f6: f107 030c add.w r3, r7, #12
|
||
80043fa: 681b ldr r3, [r3, #0]
|
||
80043fc: f8a3 2204 strh.w r2, [r3, #516] ; 0x204
|
||
}
|
||
}
|
||
|
||
LEAVE_FF(dj.fs, res);
|
||
8004400: f897 324f ldrb.w r3, [r7, #591] ; 0x24f
|
||
}
|
||
8004404: 4618 mov r0, r3
|
||
8004406: f507 7714 add.w r7, r7, #592 ; 0x250
|
||
800440a: 46bd mov sp, r7
|
||
800440c: bd80 pop {r7, pc}
|
||
|
||
0800440e <f_read>:
|
||
FIL* fp, /* Pointer to the file object */
|
||
void* buff, /* Pointer to data buffer */
|
||
UINT btr, /* Number of bytes to read */
|
||
UINT* br /* Pointer to number of bytes read */
|
||
)
|
||
{
|
||
800440e: b580 push {r7, lr}
|
||
8004410: b08c sub sp, #48 ; 0x30
|
||
8004412: af00 add r7, sp, #0
|
||
8004414: 60f8 str r0, [r7, #12]
|
||
8004416: 60b9 str r1, [r7, #8]
|
||
8004418: 607a str r2, [r7, #4]
|
||
800441a: 603b str r3, [r7, #0]
|
||
FRESULT res;
|
||
DWORD clst, sect, remain;
|
||
UINT rcnt, cc;
|
||
BYTE csect, *rbuff = (BYTE*)buff;
|
||
800441c: 68bb ldr r3, [r7, #8]
|
||
800441e: 623b str r3, [r7, #32]
|
||
|
||
|
||
*br = 0; /* Clear read byte counter */
|
||
8004420: 683b ldr r3, [r7, #0]
|
||
8004422: 2200 movs r2, #0
|
||
8004424: 601a str r2, [r3, #0]
|
||
|
||
res = validate(fp); /* Check validity */
|
||
8004426: 68f8 ldr r0, [r7, #12]
|
||
8004428: f7ff fd6a bl 8003f00 <validate>
|
||
800442c: 4603 mov r3, r0
|
||
800442e: 77fb strb r3, [r7, #31]
|
||
if (res != FR_OK) LEAVE_FF(fp->fs, res);
|
||
8004430: 7ffb ldrb r3, [r7, #31]
|
||
8004432: 2b00 cmp r3, #0
|
||
8004434: d001 beq.n 800443a <f_read+0x2c>
|
||
8004436: 7ffb ldrb r3, [r7, #31]
|
||
8004438: e150 b.n 80046dc <f_read+0x2ce>
|
||
if (fp->err) /* Check error */
|
||
800443a: 68fb ldr r3, [r7, #12]
|
||
800443c: f893 3207 ldrb.w r3, [r3, #519] ; 0x207
|
||
8004440: 2b00 cmp r3, #0
|
||
8004442: d003 beq.n 800444c <f_read+0x3e>
|
||
LEAVE_FF(fp->fs, (FRESULT)fp->err);
|
||
8004444: 68fb ldr r3, [r7, #12]
|
||
8004446: f893 3207 ldrb.w r3, [r3, #519] ; 0x207
|
||
800444a: e147 b.n 80046dc <f_read+0x2ce>
|
||
if (!(fp->flag & FA_READ)) /* Check access mode */
|
||
800444c: 68fb ldr r3, [r7, #12]
|
||
800444e: f893 3206 ldrb.w r3, [r3, #518] ; 0x206
|
||
8004452: f003 0301 and.w r3, r3, #1
|
||
8004456: 2b00 cmp r3, #0
|
||
8004458: d101 bne.n 800445e <f_read+0x50>
|
||
LEAVE_FF(fp->fs, FR_DENIED);
|
||
800445a: 2307 movs r3, #7
|
||
800445c: e13e b.n 80046dc <f_read+0x2ce>
|
||
remain = fp->fsize - fp->fptr;
|
||
800445e: 68fb ldr r3, [r7, #12]
|
||
8004460: f8d3 220c ldr.w r2, [r3, #524] ; 0x20c
|
||
8004464: 68fb ldr r3, [r7, #12]
|
||
8004466: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
800446a: 1ad3 subs r3, r2, r3
|
||
800446c: 61bb str r3, [r7, #24]
|
||
if (btr > remain) btr = (UINT)remain; /* Truncate btr by remaining bytes */
|
||
800446e: 687a ldr r2, [r7, #4]
|
||
8004470: 69bb ldr r3, [r7, #24]
|
||
8004472: 429a cmp r2, r3
|
||
8004474: f240 812d bls.w 80046d2 <f_read+0x2c4>
|
||
8004478: 69bb ldr r3, [r7, #24]
|
||
800447a: 607b str r3, [r7, #4]
|
||
|
||
for ( ; btr; /* Repeat until all data read */
|
||
800447c: e129 b.n 80046d2 <f_read+0x2c4>
|
||
rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) {
|
||
if ((fp->fptr % SS(fp->fs)) == 0) { /* On the sector boundary? */
|
||
800447e: 68fb ldr r3, [r7, #12]
|
||
8004480: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
8004484: f3c3 0308 ubfx r3, r3, #0, #9
|
||
8004488: 2b00 cmp r3, #0
|
||
800448a: f040 80f2 bne.w 8004672 <f_read+0x264>
|
||
csect = (BYTE)(fp->fptr / SS(fp->fs) & (fp->fs->csize - 1)); /* Sector offset in the cluster */
|
||
800448e: 68fb ldr r3, [r7, #12]
|
||
8004490: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
8004494: 0a5b lsrs r3, r3, #9
|
||
8004496: b2da uxtb r2, r3
|
||
8004498: 68fb ldr r3, [r7, #12]
|
||
800449a: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800449e: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
80044a2: 3b01 subs r3, #1
|
||
80044a4: b2db uxtb r3, r3
|
||
80044a6: 4013 ands r3, r2
|
||
80044a8: 75fb strb r3, [r7, #23]
|
||
if (!csect) { /* On the cluster boundary? */
|
||
80044aa: 7dfb ldrb r3, [r7, #23]
|
||
80044ac: 2b00 cmp r3, #0
|
||
80044ae: d139 bne.n 8004524 <f_read+0x116>
|
||
if (fp->fptr == 0) { /* On the top of the file? */
|
||
80044b0: 68fb ldr r3, [r7, #12]
|
||
80044b2: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
80044b6: 2b00 cmp r3, #0
|
||
80044b8: d104 bne.n 80044c4 <f_read+0xb6>
|
||
clst = fp->sclust; /* Follow from the origin */
|
||
80044ba: 68fb ldr r3, [r7, #12]
|
||
80044bc: f8d3 3210 ldr.w r3, [r3, #528] ; 0x210
|
||
80044c0: 62fb str r3, [r7, #44] ; 0x2c
|
||
80044c2: e018 b.n 80044f6 <f_read+0xe8>
|
||
} else { /* Middle or end of the file */
|
||
#if _USE_FASTSEEK
|
||
if (fp->cltbl)
|
||
80044c4: 68fb ldr r3, [r7, #12]
|
||
80044c6: f8d3 3224 ldr.w r3, [r3, #548] ; 0x224
|
||
80044ca: 2b00 cmp r3, #0
|
||
80044cc: d008 beq.n 80044e0 <f_read+0xd2>
|
||
clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */
|
||
80044ce: 68fb ldr r3, [r7, #12]
|
||
80044d0: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
80044d4: 4619 mov r1, r3
|
||
80044d6: 68f8 ldr r0, [r7, #12]
|
||
80044d8: f7fe fd87 bl 8002fea <clmt_clust>
|
||
80044dc: 62f8 str r0, [r7, #44] ; 0x2c
|
||
80044de: e00a b.n 80044f6 <f_read+0xe8>
|
||
else
|
||
#endif
|
||
clst = get_fat(fp->fs, fp->clust); /* Follow cluster chain on the FAT */
|
||
80044e0: 68fb ldr r3, [r7, #12]
|
||
80044e2: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
80044e6: 68fb ldr r3, [r7, #12]
|
||
80044e8: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
80044ec: 4619 mov r1, r3
|
||
80044ee: 4610 mov r0, r2
|
||
80044f0: f7fe fabc bl 8002a6c <get_fat>
|
||
80044f4: 62f8 str r0, [r7, #44] ; 0x2c
|
||
}
|
||
if (clst < 2) ABORT(fp->fs, FR_INT_ERR);
|
||
80044f6: 6afb ldr r3, [r7, #44] ; 0x2c
|
||
80044f8: 2b01 cmp r3, #1
|
||
80044fa: d805 bhi.n 8004508 <f_read+0xfa>
|
||
80044fc: 68fb ldr r3, [r7, #12]
|
||
80044fe: 2202 movs r2, #2
|
||
8004500: f883 2207 strb.w r2, [r3, #519] ; 0x207
|
||
8004504: 2302 movs r3, #2
|
||
8004506: e0e9 b.n 80046dc <f_read+0x2ce>
|
||
if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
|
||
8004508: 6afb ldr r3, [r7, #44] ; 0x2c
|
||
800450a: f1b3 3fff cmp.w r3, #4294967295
|
||
800450e: d105 bne.n 800451c <f_read+0x10e>
|
||
8004510: 68fb ldr r3, [r7, #12]
|
||
8004512: 2201 movs r2, #1
|
||
8004514: f883 2207 strb.w r2, [r3, #519] ; 0x207
|
||
8004518: 2301 movs r3, #1
|
||
800451a: e0df b.n 80046dc <f_read+0x2ce>
|
||
fp->clust = clst; /* Update current cluster */
|
||
800451c: 68fb ldr r3, [r7, #12]
|
||
800451e: 6afa ldr r2, [r7, #44] ; 0x2c
|
||
8004520: f8c3 2214 str.w r2, [r3, #532] ; 0x214
|
||
}
|
||
sect = clust2sect(fp->fs, fp->clust); /* Get current sector */
|
||
8004524: 68fb ldr r3, [r7, #12]
|
||
8004526: f8d3 2200 ldr.w r2, [r3, #512] ; 0x200
|
||
800452a: 68fb ldr r3, [r7, #12]
|
||
800452c: f8d3 3214 ldr.w r3, [r3, #532] ; 0x214
|
||
8004530: 4619 mov r1, r3
|
||
8004532: 4610 mov r0, r2
|
||
8004534: f7fe fa79 bl 8002a2a <clust2sect>
|
||
8004538: 6138 str r0, [r7, #16]
|
||
if (!sect) ABORT(fp->fs, FR_INT_ERR);
|
||
800453a: 693b ldr r3, [r7, #16]
|
||
800453c: 2b00 cmp r3, #0
|
||
800453e: d105 bne.n 800454c <f_read+0x13e>
|
||
8004540: 68fb ldr r3, [r7, #12]
|
||
8004542: 2202 movs r2, #2
|
||
8004544: f883 2207 strb.w r2, [r3, #519] ; 0x207
|
||
8004548: 2302 movs r3, #2
|
||
800454a: e0c7 b.n 80046dc <f_read+0x2ce>
|
||
sect += csect;
|
||
800454c: 7dfb ldrb r3, [r7, #23]
|
||
800454e: 693a ldr r2, [r7, #16]
|
||
8004550: 4413 add r3, r2
|
||
8004552: 613b str r3, [r7, #16]
|
||
cc = btr / SS(fp->fs); /* When remaining bytes >= sector size, */
|
||
8004554: 687b ldr r3, [r7, #4]
|
||
8004556: 0a5b lsrs r3, r3, #9
|
||
8004558: 627b str r3, [r7, #36] ; 0x24
|
||
if (cc) { /* Read maximum contiguous sectors directly */
|
||
800455a: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
800455c: 2b00 cmp r3, #0
|
||
800455e: d046 beq.n 80045ee <f_read+0x1e0>
|
||
if (csect + cc > fp->fs->csize) /* Clip at cluster boundary */
|
||
8004560: 7dfa ldrb r2, [r7, #23]
|
||
8004562: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8004564: 4413 add r3, r2
|
||
8004566: 68fa ldr r2, [r7, #12]
|
||
8004568: f8d2 2200 ldr.w r2, [r2, #512] ; 0x200
|
||
800456c: f892 2202 ldrb.w r2, [r2, #514] ; 0x202
|
||
8004570: 4293 cmp r3, r2
|
||
8004572: d908 bls.n 8004586 <f_read+0x178>
|
||
cc = fp->fs->csize - csect;
|
||
8004574: 68fb ldr r3, [r7, #12]
|
||
8004576: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800457a: f893 3202 ldrb.w r3, [r3, #514] ; 0x202
|
||
800457e: 461a mov r2, r3
|
||
8004580: 7dfb ldrb r3, [r7, #23]
|
||
8004582: 1ad3 subs r3, r2, r3
|
||
8004584: 627b str r3, [r7, #36] ; 0x24
|
||
if (disk_read(fp->fs->drv, rbuff, sect, cc) != RES_OK)
|
||
8004586: 68fb ldr r3, [r7, #12]
|
||
8004588: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800458c: f893 0201 ldrb.w r0, [r3, #513] ; 0x201
|
||
8004590: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8004592: 693a ldr r2, [r7, #16]
|
||
8004594: 6a39 ldr r1, [r7, #32]
|
||
8004596: f7fd ffa9 bl 80024ec <disk_read>
|
||
800459a: 4603 mov r3, r0
|
||
800459c: 2b00 cmp r3, #0
|
||
800459e: d005 beq.n 80045ac <f_read+0x19e>
|
||
ABORT(fp->fs, FR_DISK_ERR);
|
||
80045a0: 68fb ldr r3, [r7, #12]
|
||
80045a2: 2201 movs r2, #1
|
||
80045a4: f883 2207 strb.w r2, [r3, #519] ; 0x207
|
||
80045a8: 2301 movs r3, #1
|
||
80045aa: e097 b.n 80046dc <f_read+0x2ce>
|
||
#if !_FS_READONLY && _FS_MINIMIZE <= 2 /* Replace one of the read sectors with cached data if it contains a dirty sector */
|
||
#if _FS_TINY
|
||
if (fp->fs->wflag && fp->fs->winsect - sect < cc)
|
||
mem_cpy(rbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), fp->fs->win.d8, SS(fp->fs));
|
||
#else
|
||
if ((fp->flag & FA__DIRTY) && fp->dsect - sect < cc)
|
||
80045ac: 68fb ldr r3, [r7, #12]
|
||
80045ae: f893 3206 ldrb.w r3, [r3, #518] ; 0x206
|
||
80045b2: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
80045b6: 2b00 cmp r3, #0
|
||
80045b8: d015 beq.n 80045e6 <f_read+0x1d8>
|
||
80045ba: 68fb ldr r3, [r7, #12]
|
||
80045bc: f8d3 2218 ldr.w r2, [r3, #536] ; 0x218
|
||
80045c0: 693b ldr r3, [r7, #16]
|
||
80045c2: 1ad3 subs r3, r2, r3
|
||
80045c4: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
80045c6: 429a cmp r2, r3
|
||
80045c8: d90d bls.n 80045e6 <f_read+0x1d8>
|
||
mem_cpy(rbuff + ((fp->dsect - sect) * SS(fp->fs)), fp->buf.d8, SS(fp->fs));
|
||
80045ca: 68fb ldr r3, [r7, #12]
|
||
80045cc: f8d3 2218 ldr.w r2, [r3, #536] ; 0x218
|
||
80045d0: 693b ldr r3, [r7, #16]
|
||
80045d2: 1ad3 subs r3, r2, r3
|
||
80045d4: 025b lsls r3, r3, #9
|
||
80045d6: 6a3a ldr r2, [r7, #32]
|
||
80045d8: 4413 add r3, r2
|
||
80045da: 68f9 ldr r1, [r7, #12]
|
||
80045dc: f44f 7200 mov.w r2, #512 ; 0x200
|
||
80045e0: 4618 mov r0, r3
|
||
80045e2: f7fd ffc3 bl 800256c <mem_cpy>
|
||
#endif
|
||
#endif
|
||
rcnt = SS(fp->fs) * cc; /* Number of bytes transferred */
|
||
80045e6: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80045e8: 025b lsls r3, r3, #9
|
||
80045ea: 62bb str r3, [r7, #40] ; 0x28
|
||
continue;
|
||
80045ec: e05b b.n 80046a6 <f_read+0x298>
|
||
}
|
||
#if !_FS_TINY
|
||
if (fp->dsect != sect) { /* Load data sector if not in cache */
|
||
80045ee: 68fb ldr r3, [r7, #12]
|
||
80045f0: f8d3 3218 ldr.w r3, [r3, #536] ; 0x218
|
||
80045f4: 693a ldr r2, [r7, #16]
|
||
80045f6: 429a cmp r2, r3
|
||
80045f8: d037 beq.n 800466a <f_read+0x25c>
|
||
#if !_FS_READONLY
|
||
if (fp->flag & FA__DIRTY) { /* Write-back dirty sector cache */
|
||
80045fa: 68fb ldr r3, [r7, #12]
|
||
80045fc: f893 3206 ldrb.w r3, [r3, #518] ; 0x206
|
||
8004600: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
8004604: 2b00 cmp r3, #0
|
||
8004606: d01d beq.n 8004644 <f_read+0x236>
|
||
if (disk_write(fp->fs->drv, fp->buf.d8, fp->dsect, 1) != RES_OK)
|
||
8004608: 68fb ldr r3, [r7, #12]
|
||
800460a: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800460e: f893 0201 ldrb.w r0, [r3, #513] ; 0x201
|
||
8004612: 68f9 ldr r1, [r7, #12]
|
||
8004614: 68fb ldr r3, [r7, #12]
|
||
8004616: f8d3 2218 ldr.w r2, [r3, #536] ; 0x218
|
||
800461a: 2301 movs r3, #1
|
||
800461c: f7fd ff86 bl 800252c <disk_write>
|
||
8004620: 4603 mov r3, r0
|
||
8004622: 2b00 cmp r3, #0
|
||
8004624: d005 beq.n 8004632 <f_read+0x224>
|
||
ABORT(fp->fs, FR_DISK_ERR);
|
||
8004626: 68fb ldr r3, [r7, #12]
|
||
8004628: 2201 movs r2, #1
|
||
800462a: f883 2207 strb.w r2, [r3, #519] ; 0x207
|
||
800462e: 2301 movs r3, #1
|
||
8004630: e054 b.n 80046dc <f_read+0x2ce>
|
||
fp->flag &= ~FA__DIRTY;
|
||
8004632: 68fb ldr r3, [r7, #12]
|
||
8004634: f893 3206 ldrb.w r3, [r3, #518] ; 0x206
|
||
8004638: f023 0340 bic.w r3, r3, #64 ; 0x40
|
||
800463c: b2da uxtb r2, r3
|
||
800463e: 68fb ldr r3, [r7, #12]
|
||
8004640: f883 2206 strb.w r2, [r3, #518] ; 0x206
|
||
}
|
||
#endif
|
||
if (disk_read(fp->fs->drv, fp->buf.d8, sect, 1) != RES_OK) /* Fill sector cache */
|
||
8004644: 68fb ldr r3, [r7, #12]
|
||
8004646: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200
|
||
800464a: f893 0201 ldrb.w r0, [r3, #513] ; 0x201
|
||
800464e: 68f9 ldr r1, [r7, #12]
|
||
8004650: 2301 movs r3, #1
|
||
8004652: 693a ldr r2, [r7, #16]
|
||
8004654: f7fd ff4a bl 80024ec <disk_read>
|
||
8004658: 4603 mov r3, r0
|
||
800465a: 2b00 cmp r3, #0
|
||
800465c: d005 beq.n 800466a <f_read+0x25c>
|
||
ABORT(fp->fs, FR_DISK_ERR);
|
||
800465e: 68fb ldr r3, [r7, #12]
|
||
8004660: 2201 movs r2, #1
|
||
8004662: f883 2207 strb.w r2, [r3, #519] ; 0x207
|
||
8004666: 2301 movs r3, #1
|
||
8004668: e038 b.n 80046dc <f_read+0x2ce>
|
||
}
|
||
#endif
|
||
fp->dsect = sect;
|
||
800466a: 68fb ldr r3, [r7, #12]
|
||
800466c: 693a ldr r2, [r7, #16]
|
||
800466e: f8c3 2218 str.w r2, [r3, #536] ; 0x218
|
||
}
|
||
rcnt = SS(fp->fs) - ((UINT)fp->fptr % SS(fp->fs)); /* Get partial sector data from sector buffer */
|
||
8004672: 68fb ldr r3, [r7, #12]
|
||
8004674: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
8004678: f3c3 0308 ubfx r3, r3, #0, #9
|
||
800467c: f5c3 7300 rsb r3, r3, #512 ; 0x200
|
||
8004680: 62bb str r3, [r7, #40] ; 0x28
|
||
if (rcnt > btr) rcnt = btr;
|
||
8004682: 6aba ldr r2, [r7, #40] ; 0x28
|
||
8004684: 687b ldr r3, [r7, #4]
|
||
8004686: 429a cmp r2, r3
|
||
8004688: d901 bls.n 800468e <f_read+0x280>
|
||
800468a: 687b ldr r3, [r7, #4]
|
||
800468c: 62bb str r3, [r7, #40] ; 0x28
|
||
#if _FS_TINY
|
||
if (move_window(fp->fs, fp->dsect) != FR_OK) /* Move sector window */
|
||
ABORT(fp->fs, FR_DISK_ERR);
|
||
mem_cpy(rbuff, &fp->fs->win.d8[fp->fptr % SS(fp->fs)], rcnt); /* Pick partial sector */
|
||
#else
|
||
mem_cpy(rbuff, &fp->buf.d8[fp->fptr % SS(fp->fs)], rcnt); /* Pick partial sector */
|
||
800468e: 68fb ldr r3, [r7, #12]
|
||
8004690: f8d3 3208 ldr.w r3, [r3, #520] ; 0x208
|
||
8004694: f3c3 0308 ubfx r3, r3, #0, #9
|
||
8004698: 68fa ldr r2, [r7, #12]
|
||
800469a: 4413 add r3, r2
|
||
800469c: 6aba ldr r2, [r7, #40] ; 0x28
|
||
800469e: 4619 mov r1, r3
|
||
80046a0: 6a38 ldr r0, [r7, #32]
|
||
80046a2: f7fd ff63 bl 800256c <mem_cpy>
|
||
rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) {
|
||
80046a6: 6a3a ldr r2, [r7, #32]
|
||
80046a8: 6abb ldr r3, [r7, #40] ; 0x28
|
||
80046aa: 4413 add r3, r2
|
||
80046ac: 623b str r3, [r7, #32]
|
||
80046ae: 68fb ldr r3, [r7, #12]
|
||
80046b0: f8d3 2208 ldr.w r2, [r3, #520] ; 0x208
|
||
80046b4: 6abb ldr r3, [r7, #40] ; 0x28
|
||
80046b6: 441a add r2, r3
|
||
80046b8: 68fb ldr r3, [r7, #12]
|
||
80046ba: f8c3 2208 str.w r2, [r3, #520] ; 0x208
|
||
80046be: 683b ldr r3, [r7, #0]
|
||
80046c0: 681a ldr r2, [r3, #0]
|
||
80046c2: 6abb ldr r3, [r7, #40] ; 0x28
|
||
80046c4: 441a add r2, r3
|
||
80046c6: 683b ldr r3, [r7, #0]
|
||
80046c8: 601a str r2, [r3, #0]
|
||
80046ca: 687a ldr r2, [r7, #4]
|
||
80046cc: 6abb ldr r3, [r7, #40] ; 0x28
|
||
80046ce: 1ad3 subs r3, r2, r3
|
||
80046d0: 607b str r3, [r7, #4]
|
||
for ( ; btr; /* Repeat until all data read */
|
||
80046d2: 687b ldr r3, [r7, #4]
|
||
80046d4: 2b00 cmp r3, #0
|
||
80046d6: f47f aed2 bne.w 800447e <f_read+0x70>
|
||
#endif
|
||
}
|
||
|
||
LEAVE_FF(fp->fs, FR_OK);
|
||
80046da: 2300 movs r3, #0
|
||
}
|
||
80046dc: 4618 mov r0, r3
|
||
80046de: 3730 adds r7, #48 ; 0x30
|
||
80046e0: 46bd mov sp, r7
|
||
80046e2: bd80 pop {r7, pc}
|
||
|
||
080046e4 <FATFS_LinkDriverEx>:
|
||
* @param lun : only used for USB Key Disk to add multi-lun management
|
||
else the paramter must be equal to 0
|
||
* @retval Returns 0 in case of success, otherwise 1.
|
||
*/
|
||
uint8_t FATFS_LinkDriverEx(Diskio_drvTypeDef *drv, char *path, uint8_t lun)
|
||
{
|
||
80046e4: b480 push {r7}
|
||
80046e6: b087 sub sp, #28
|
||
80046e8: af00 add r7, sp, #0
|
||
80046ea: 60f8 str r0, [r7, #12]
|
||
80046ec: 60b9 str r1, [r7, #8]
|
||
80046ee: 4613 mov r3, r2
|
||
80046f0: 71fb strb r3, [r7, #7]
|
||
uint8_t ret = 1;
|
||
80046f2: 2301 movs r3, #1
|
||
80046f4: 75fb strb r3, [r7, #23]
|
||
uint8_t DiskNum = 0;
|
||
80046f6: 2300 movs r3, #0
|
||
80046f8: 75bb strb r3, [r7, #22]
|
||
|
||
if(disk.nbr <= _VOLUMES)
|
||
80046fa: 4b1e ldr r3, [pc, #120] ; (8004774 <FATFS_LinkDriverEx+0x90>)
|
||
80046fc: 7a5b ldrb r3, [r3, #9]
|
||
80046fe: b2db uxtb r3, r3
|
||
8004700: 2b01 cmp r3, #1
|
||
8004702: d831 bhi.n 8004768 <FATFS_LinkDriverEx+0x84>
|
||
{
|
||
disk.is_initialized[disk.nbr] = 0;
|
||
8004704: 4b1b ldr r3, [pc, #108] ; (8004774 <FATFS_LinkDriverEx+0x90>)
|
||
8004706: 7a5b ldrb r3, [r3, #9]
|
||
8004708: b2db uxtb r3, r3
|
||
800470a: 461a mov r2, r3
|
||
800470c: 4b19 ldr r3, [pc, #100] ; (8004774 <FATFS_LinkDriverEx+0x90>)
|
||
800470e: 2100 movs r1, #0
|
||
8004710: 5499 strb r1, [r3, r2]
|
||
disk.drv[disk.nbr] = drv;
|
||
8004712: 4b18 ldr r3, [pc, #96] ; (8004774 <FATFS_LinkDriverEx+0x90>)
|
||
8004714: 7a5b ldrb r3, [r3, #9]
|
||
8004716: b2db uxtb r3, r3
|
||
8004718: 4a16 ldr r2, [pc, #88] ; (8004774 <FATFS_LinkDriverEx+0x90>)
|
||
800471a: 009b lsls r3, r3, #2
|
||
800471c: 4413 add r3, r2
|
||
800471e: 68fa ldr r2, [r7, #12]
|
||
8004720: 605a str r2, [r3, #4]
|
||
disk.lun[disk.nbr] = lun;
|
||
8004722: 4b14 ldr r3, [pc, #80] ; (8004774 <FATFS_LinkDriverEx+0x90>)
|
||
8004724: 7a5b ldrb r3, [r3, #9]
|
||
8004726: b2db uxtb r3, r3
|
||
8004728: 461a mov r2, r3
|
||
800472a: 4b12 ldr r3, [pc, #72] ; (8004774 <FATFS_LinkDriverEx+0x90>)
|
||
800472c: 4413 add r3, r2
|
||
800472e: 79fa ldrb r2, [r7, #7]
|
||
8004730: 721a strb r2, [r3, #8]
|
||
DiskNum = disk.nbr++;
|
||
8004732: 4b10 ldr r3, [pc, #64] ; (8004774 <FATFS_LinkDriverEx+0x90>)
|
||
8004734: 7a5b ldrb r3, [r3, #9]
|
||
8004736: b2db uxtb r3, r3
|
||
8004738: 1c5a adds r2, r3, #1
|
||
800473a: b2d1 uxtb r1, r2
|
||
800473c: 4a0d ldr r2, [pc, #52] ; (8004774 <FATFS_LinkDriverEx+0x90>)
|
||
800473e: 7251 strb r1, [r2, #9]
|
||
8004740: 75bb strb r3, [r7, #22]
|
||
path[0] = DiskNum + '0';
|
||
8004742: 7dbb ldrb r3, [r7, #22]
|
||
8004744: 3330 adds r3, #48 ; 0x30
|
||
8004746: b2da uxtb r2, r3
|
||
8004748: 68bb ldr r3, [r7, #8]
|
||
800474a: 701a strb r2, [r3, #0]
|
||
path[1] = ':';
|
||
800474c: 68bb ldr r3, [r7, #8]
|
||
800474e: 3301 adds r3, #1
|
||
8004750: 223a movs r2, #58 ; 0x3a
|
||
8004752: 701a strb r2, [r3, #0]
|
||
path[2] = '/';
|
||
8004754: 68bb ldr r3, [r7, #8]
|
||
8004756: 3302 adds r3, #2
|
||
8004758: 222f movs r2, #47 ; 0x2f
|
||
800475a: 701a strb r2, [r3, #0]
|
||
path[3] = 0;
|
||
800475c: 68bb ldr r3, [r7, #8]
|
||
800475e: 3303 adds r3, #3
|
||
8004760: 2200 movs r2, #0
|
||
8004762: 701a strb r2, [r3, #0]
|
||
ret = 0;
|
||
8004764: 2300 movs r3, #0
|
||
8004766: 75fb strb r3, [r7, #23]
|
||
}
|
||
|
||
return ret;
|
||
8004768: 7dfb ldrb r3, [r7, #23]
|
||
}
|
||
800476a: 4618 mov r0, r3
|
||
800476c: 371c adds r7, #28
|
||
800476e: 46bd mov sp, r7
|
||
8004770: bc80 pop {r7}
|
||
8004772: 4770 bx lr
|
||
8004774: 200000cc .word 0x200000cc
|
||
|
||
08004778 <FATFS_LinkDriver>:
|
||
* @param drv: pointer to the disk IO Driver structure
|
||
* @param path: pointer to the logical drive path
|
||
* @retval Returns 0 in case of success, otherwise 1.
|
||
*/
|
||
uint8_t FATFS_LinkDriver(Diskio_drvTypeDef *drv, char *path)
|
||
{
|
||
8004778: b580 push {r7, lr}
|
||
800477a: b082 sub sp, #8
|
||
800477c: af00 add r7, sp, #0
|
||
800477e: 6078 str r0, [r7, #4]
|
||
8004780: 6039 str r1, [r7, #0]
|
||
return FATFS_LinkDriverEx(drv, path, 0);
|
||
8004782: 2200 movs r2, #0
|
||
8004784: 6839 ldr r1, [r7, #0]
|
||
8004786: 6878 ldr r0, [r7, #4]
|
||
8004788: f7ff ffac bl 80046e4 <FATFS_LinkDriverEx>
|
||
800478c: 4603 mov r3, r0
|
||
}
|
||
800478e: 4618 mov r0, r3
|
||
8004790: 3708 adds r7, #8
|
||
8004792: 46bd mov sp, r7
|
||
8004794: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08004798 <my_main>:
|
||
FATFS SD;
|
||
|
||
#define fuck 256
|
||
|
||
int my_main()
|
||
{
|
||
8004798: b580 push {r7, lr}
|
||
800479a: f5ad 6d8b sub.w sp, sp, #1112 ; 0x458
|
||
800479e: af04 add r7, sp, #16
|
||
uint8_t res;
|
||
FIL fil;
|
||
char fil_buff[fuck+1]={0};
|
||
80047a0: f507 7384 add.w r3, r7, #264 ; 0x108
|
||
80047a4: 2200 movs r2, #0
|
||
80047a6: 601a str r2, [r3, #0]
|
||
80047a8: 3304 adds r3, #4
|
||
80047aa: 22fd movs r2, #253 ; 0xfd
|
||
80047ac: 2100 movs r1, #0
|
||
80047ae: 4618 mov r0, r3
|
||
80047b0: f001 fcd4 bl 800615c <memset>
|
||
char fuck_flag=0;
|
||
80047b4: 2300 movs r3, #0
|
||
80047b6: f887 3447 strb.w r3, [r7, #1095] ; 0x447
|
||
char fuck_buff;
|
||
uint16_t br=0;
|
||
80047ba: f507 7383 add.w r3, r7, #262 ; 0x106
|
||
80047be: 2200 movs r2, #0
|
||
80047c0: 801a strh r2, [r3, #0]
|
||
char str[fuck+1]={0};
|
||
80047c2: 1d3b adds r3, r7, #4
|
||
80047c4: 2200 movs r2, #0
|
||
80047c6: 601a str r2, [r3, #0]
|
||
80047c8: 3304 adds r3, #4
|
||
80047ca: 22fd movs r2, #253 ; 0xfd
|
||
80047cc: 2100 movs r1, #0
|
||
80047ce: 4618 mov r0, r3
|
||
80047d0: f001 fcc4 bl 800615c <memset>
|
||
LCD_BL(0);
|
||
80047d4: 2200 movs r2, #0
|
||
80047d6: 2101 movs r1, #1
|
||
80047d8: 4865 ldr r0, [pc, #404] ; (8004970 <my_main+0x1d8>)
|
||
80047da: f7fc fb28 bl 8000e2e <HAL_GPIO_WritePin>
|
||
LCDx_Init();
|
||
80047de: f001 f871 bl 80058c4 <LCDx_Init>
|
||
LCD_Clear(GRAY);
|
||
80047e2: f248 4030 movw r0, #33840 ; 0x8430
|
||
80047e6: f001 fa13 bl 8005c10 <LCD_Clear>
|
||
|
||
if(font_init())
|
||
80047ea: f001 fa63 bl 8005cb4 <font_init>
|
||
80047ee: 4603 mov r3, r0
|
||
80047f0: 2b00 cmp r3, #0
|
||
80047f2: d00c beq.n 800480e <my_main+0x76>
|
||
{
|
||
LCD_ShowString(0,16,(uint8_t *)"erro",16,RED,BLUE,64);
|
||
80047f4: 2340 movs r3, #64 ; 0x40
|
||
80047f6: 9302 str r3, [sp, #8]
|
||
80047f8: 231f movs r3, #31
|
||
80047fa: 9301 str r3, [sp, #4]
|
||
80047fc: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004800: 9300 str r3, [sp, #0]
|
||
8004802: 2310 movs r3, #16
|
||
8004804: 4a5b ldr r2, [pc, #364] ; (8004974 <my_main+0x1dc>)
|
||
8004806: 2110 movs r1, #16
|
||
8004808: 2000 movs r0, #0
|
||
800480a: f001 fc0b bl 8006024 <LCD_ShowString>
|
||
}
|
||
|
||
f_mount(&SD,"0:",1);
|
||
800480e: 2201 movs r2, #1
|
||
8004810: 4959 ldr r1, [pc, #356] ; (8004978 <my_main+0x1e0>)
|
||
8004812: 485a ldr r0, [pc, #360] ; (800497c <my_main+0x1e4>)
|
||
8004814: f7ff fba8 bl 8003f68 <f_mount>
|
||
res=f_open(&fil,"0:/demo.txt",FA_READ);
|
||
8004818: f507 7303 add.w r3, r7, #524 ; 0x20c
|
||
800481c: 2201 movs r2, #1
|
||
800481e: 4958 ldr r1, [pc, #352] ; (8004980 <my_main+0x1e8>)
|
||
8004820: 4618 mov r0, r3
|
||
8004822: f7ff fbe9 bl 8003ff8 <f_open>
|
||
8004826: 4603 mov r3, r0
|
||
8004828: f887 343b strb.w r3, [r7, #1083] ; 0x43b
|
||
|
||
LCD_ShowString(0,100,"163165sdf������",12,RED,BLUE);
|
||
*/
|
||
while(1)
|
||
{
|
||
if(KEY_UP==0)
|
||
800482c: 2104 movs r1, #4
|
||
800482e: 4855 ldr r0, [pc, #340] ; (8004984 <my_main+0x1ec>)
|
||
8004830: f7fc fae6 bl 8000e00 <HAL_GPIO_ReadPin>
|
||
8004834: 4603 mov r3, r0
|
||
8004836: 2b00 cmp r3, #0
|
||
8004838: d1f8 bne.n 800482c <my_main+0x94>
|
||
{
|
||
HAL_Delay(10);
|
||
800483a: 200a movs r0, #10
|
||
800483c: f7fc f844 bl 80008c8 <HAL_Delay>
|
||
while(KEY_UP==0);
|
||
8004840: bf00 nop
|
||
8004842: 2104 movs r1, #4
|
||
8004844: 484f ldr r0, [pc, #316] ; (8004984 <my_main+0x1ec>)
|
||
8004846: f7fc fadb bl 8000e00 <HAL_GPIO_ReadPin>
|
||
800484a: 4603 mov r3, r0
|
||
800484c: 2b00 cmp r3, #0
|
||
800484e: d0f8 beq.n 8004842 <my_main+0xaa>
|
||
LCD_Clear(WHITE);
|
||
8004850: f64f 70ff movw r0, #65535 ; 0xffff
|
||
8004854: f001 f9dc bl 8005c10 <LCD_Clear>
|
||
for(int a=0;a<fuck+1;a++)
|
||
8004858: 2300 movs r3, #0
|
||
800485a: f8c7 3440 str.w r3, [r7, #1088] ; 0x440
|
||
800485e: e011 b.n 8004884 <my_main+0xec>
|
||
{
|
||
fil_buff[a]=0;
|
||
8004860: f507 7284 add.w r2, r7, #264 ; 0x108
|
||
8004864: f8d7 3440 ldr.w r3, [r7, #1088] ; 0x440
|
||
8004868: 4413 add r3, r2
|
||
800486a: 2200 movs r2, #0
|
||
800486c: 701a strb r2, [r3, #0]
|
||
str[a]=0;
|
||
800486e: 1d3a adds r2, r7, #4
|
||
8004870: f8d7 3440 ldr.w r3, [r7, #1088] ; 0x440
|
||
8004874: 4413 add r3, r2
|
||
8004876: 2200 movs r2, #0
|
||
8004878: 701a strb r2, [r3, #0]
|
||
for(int a=0;a<fuck+1;a++)
|
||
800487a: f8d7 3440 ldr.w r3, [r7, #1088] ; 0x440
|
||
800487e: 3301 adds r3, #1
|
||
8004880: f8c7 3440 str.w r3, [r7, #1088] ; 0x440
|
||
8004884: f8d7 3440 ldr.w r3, [r7, #1088] ; 0x440
|
||
8004888: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
800488c: dde8 ble.n 8004860 <my_main+0xc8>
|
||
}
|
||
|
||
if(fuck_flag==1)
|
||
800488e: f897 3447 ldrb.w r3, [r7, #1095] ; 0x447
|
||
8004892: 2b01 cmp r3, #1
|
||
8004894: d12d bne.n 80048f2 <my_main+0x15a>
|
||
{
|
||
fuck_flag=0;
|
||
8004896: 2300 movs r3, #0
|
||
8004898: f887 3447 strb.w r3, [r7, #1095] ; 0x447
|
||
res=f_read(&fil,fil_buff,fuck-1,(UINT*)&br);
|
||
800489c: f507 7383 add.w r3, r7, #262 ; 0x106
|
||
80048a0: f507 7184 add.w r1, r7, #264 ; 0x108
|
||
80048a4: f507 7003 add.w r0, r7, #524 ; 0x20c
|
||
80048a8: 22ff movs r2, #255 ; 0xff
|
||
80048aa: f7ff fdb0 bl 800440e <f_read>
|
||
80048ae: 4603 mov r3, r0
|
||
80048b0: f887 343b strb.w r3, [r7, #1083] ; 0x43b
|
||
for(int a=fuck-2;a>0;a--)
|
||
80048b4: 23fe movs r3, #254 ; 0xfe
|
||
80048b6: f8c7 343c str.w r3, [r7, #1084] ; 0x43c
|
||
80048ba: e010 b.n 80048de <my_main+0x146>
|
||
{
|
||
fil_buff[a+1]=fil_buff[a];
|
||
80048bc: f8d7 343c ldr.w r3, [r7, #1084] ; 0x43c
|
||
80048c0: 3301 adds r3, #1
|
||
80048c2: f507 7184 add.w r1, r7, #264 ; 0x108
|
||
80048c6: f8d7 243c ldr.w r2, [r7, #1084] ; 0x43c
|
||
80048ca: 440a add r2, r1
|
||
80048cc: 7811 ldrb r1, [r2, #0]
|
||
80048ce: f507 7284 add.w r2, r7, #264 ; 0x108
|
||
80048d2: 54d1 strb r1, [r2, r3]
|
||
for(int a=fuck-2;a>0;a--)
|
||
80048d4: f8d7 343c ldr.w r3, [r7, #1084] ; 0x43c
|
||
80048d8: 3b01 subs r3, #1
|
||
80048da: f8c7 343c str.w r3, [r7, #1084] ; 0x43c
|
||
80048de: f8d7 343c ldr.w r3, [r7, #1084] ; 0x43c
|
||
80048e2: 2b00 cmp r3, #0
|
||
80048e4: dcea bgt.n 80048bc <my_main+0x124>
|
||
}
|
||
fil_buff[0]=fuck_buff;
|
||
80048e6: f507 7384 add.w r3, r7, #264 ; 0x108
|
||
80048ea: f897 2446 ldrb.w r2, [r7, #1094] ; 0x446
|
||
80048ee: 701a strb r2, [r3, #0]
|
||
80048f0: e00c b.n 800490c <my_main+0x174>
|
||
|
||
}else
|
||
{
|
||
res=f_read(&fil,fil_buff,fuck,(UINT*)&br);
|
||
80048f2: f507 7383 add.w r3, r7, #262 ; 0x106
|
||
80048f6: f507 7184 add.w r1, r7, #264 ; 0x108
|
||
80048fa: f507 7003 add.w r0, r7, #524 ; 0x20c
|
||
80048fe: f44f 7280 mov.w r2, #256 ; 0x100
|
||
8004902: f7ff fd84 bl 800440e <f_read>
|
||
8004906: 4603 mov r3, r0
|
||
8004908: f887 343b strb.w r3, [r7, #1083] ; 0x43b
|
||
}
|
||
|
||
if((fil_buff[fuck-1]>127)&&(fil_buff[fuck-2]<128))
|
||
800490c: f507 7384 add.w r3, r7, #264 ; 0x108
|
||
8004910: f893 30ff ldrb.w r3, [r3, #255] ; 0xff
|
||
8004914: b25b sxtb r3, r3
|
||
8004916: 2b00 cmp r3, #0
|
||
8004918: da14 bge.n 8004944 <my_main+0x1ac>
|
||
800491a: f507 7384 add.w r3, r7, #264 ; 0x108
|
||
800491e: f893 30fe ldrb.w r3, [r3, #254] ; 0xfe
|
||
8004922: b25b sxtb r3, r3
|
||
8004924: 2b00 cmp r3, #0
|
||
8004926: db0d blt.n 8004944 <my_main+0x1ac>
|
||
{
|
||
fuck_buff=fil_buff[fuck-1];
|
||
8004928: f507 7384 add.w r3, r7, #264 ; 0x108
|
||
800492c: f893 30ff ldrb.w r3, [r3, #255] ; 0xff
|
||
8004930: f887 3446 strb.w r3, [r7, #1094] ; 0x446
|
||
fil_buff[fuck-1]='\0';
|
||
8004934: f507 7384 add.w r3, r7, #264 ; 0x108
|
||
8004938: 2200 movs r2, #0
|
||
800493a: f883 20ff strb.w r2, [r3, #255] ; 0xff
|
||
fuck_flag=1;
|
||
800493e: 2301 movs r3, #1
|
||
8004940: f887 3447 strb.w r3, [r7, #1095] ; 0x447
|
||
|
||
}
|
||
|
||
sprintf(str,"%s\0",fil_buff);
|
||
8004944: f507 7284 add.w r2, r7, #264 ; 0x108
|
||
8004948: 1d3b adds r3, r7, #4
|
||
800494a: 490f ldr r1, [pc, #60] ; (8004988 <my_main+0x1f0>)
|
||
800494c: 4618 mov r0, r3
|
||
800494e: f001 fc0d bl 800616c <siprintf>
|
||
LCD_ShowString(0,0,str,16,WHITE,BLACK,fuck);
|
||
8004952: 1d3a adds r2, r7, #4
|
||
8004954: f44f 7380 mov.w r3, #256 ; 0x100
|
||
8004958: 9302 str r3, [sp, #8]
|
||
800495a: 2300 movs r3, #0
|
||
800495c: 9301 str r3, [sp, #4]
|
||
800495e: f64f 73ff movw r3, #65535 ; 0xffff
|
||
8004962: 9300 str r3, [sp, #0]
|
||
8004964: 2310 movs r3, #16
|
||
8004966: 2100 movs r1, #0
|
||
8004968: 2000 movs r0, #0
|
||
800496a: f001 fb5b bl 8006024 <LCD_ShowString>
|
||
if(KEY_UP==0)
|
||
800496e: e75d b.n 800482c <my_main+0x94>
|
||
8004970: 40010c00 .word 0x40010c00
|
||
8004974: 08006a4c .word 0x08006a4c
|
||
8004978: 08006a54 .word 0x08006a54
|
||
800497c: 200005ec .word 0x200005ec
|
||
8004980: 08006a58 .word 0x08006a58
|
||
8004984: 40011800 .word 0x40011800
|
||
8004988: 08006a64 .word 0x08006a64
|
||
|
||
0800498c <W25QXX_Read>:
|
||
//ReadAddr:��ʼ��ȡ�ĵ�ַ(24bit)
|
||
//NumByteToRead:Ҫ��ȡ���ֽ���(����65535)
|
||
|
||
|
||
void W25QXX_Read(uint8_t* pBuffer,uint32_t ReadAddr,uint16_t NumByteToRead)
|
||
{
|
||
800498c: b580 push {r7, lr}
|
||
800498e: b086 sub sp, #24
|
||
8004990: af00 add r7, sp, #0
|
||
8004992: 60f8 str r0, [r7, #12]
|
||
8004994: 60b9 str r1, [r7, #8]
|
||
8004996: 4613 mov r3, r2
|
||
8004998: 80fb strh r3, [r7, #6]
|
||
unsigned char buff[4];
|
||
HAL_GPIO_WritePin(FLASH_E_GPIO_Port,FLASH_E_Pin,0);
|
||
800499a: 2200 movs r2, #0
|
||
800499c: f44f 5180 mov.w r1, #4096 ; 0x1000
|
||
80049a0: 4813 ldr r0, [pc, #76] ; (80049f0 <W25QXX_Read+0x64>)
|
||
80049a2: f7fc fa44 bl 8000e2e <HAL_GPIO_WritePin>
|
||
buff[0]=W25X_ReadData;
|
||
80049a6: 2303 movs r3, #3
|
||
80049a8: 753b strb r3, [r7, #20]
|
||
buff[1]=(uint8_t)((ReadAddr)>>16);
|
||
80049aa: 68bb ldr r3, [r7, #8]
|
||
80049ac: 0c1b lsrs r3, r3, #16
|
||
80049ae: b2db uxtb r3, r3
|
||
80049b0: 757b strb r3, [r7, #21]
|
||
buff[2]=(uint8_t)((ReadAddr)>>8);
|
||
80049b2: 68bb ldr r3, [r7, #8]
|
||
80049b4: 0a1b lsrs r3, r3, #8
|
||
80049b6: b2db uxtb r3, r3
|
||
80049b8: 75bb strb r3, [r7, #22]
|
||
buff[3]=(uint8_t)ReadAddr;
|
||
80049ba: 68bb ldr r3, [r7, #8]
|
||
80049bc: b2db uxtb r3, r3
|
||
80049be: 75fb strb r3, [r7, #23]
|
||
HAL_SPI_Transmit(&hspi2,buff,4,100); //���Ͷ�ȡ����
|
||
80049c0: f107 0114 add.w r1, r7, #20
|
||
80049c4: 2364 movs r3, #100 ; 0x64
|
||
80049c6: 2204 movs r2, #4
|
||
80049c8: 480a ldr r0, [pc, #40] ; (80049f4 <W25QXX_Read+0x68>)
|
||
80049ca: f7fc feb5 bl 8001738 <HAL_SPI_Transmit>
|
||
|
||
HAL_SPI_Receive(&hspi2,pBuffer,NumByteToRead,100);
|
||
80049ce: 88fa ldrh r2, [r7, #6]
|
||
80049d0: 2364 movs r3, #100 ; 0x64
|
||
80049d2: 68f9 ldr r1, [r7, #12]
|
||
80049d4: 4807 ldr r0, [pc, #28] ; (80049f4 <W25QXX_Read+0x68>)
|
||
80049d6: f7fc ffeb bl 80019b0 <HAL_SPI_Receive>
|
||
HAL_GPIO_WritePin(FLASH_E_GPIO_Port,FLASH_E_Pin,1);
|
||
80049da: 2201 movs r2, #1
|
||
80049dc: f44f 5180 mov.w r1, #4096 ; 0x1000
|
||
80049e0: 4803 ldr r0, [pc, #12] ; (80049f0 <W25QXX_Read+0x64>)
|
||
80049e2: f7fc fa24 bl 8000e2e <HAL_GPIO_WritePin>
|
||
|
||
}
|
||
80049e6: bf00 nop
|
||
80049e8: 3718 adds r7, #24
|
||
80049ea: 46bd mov sp, r7
|
||
80049ec: bd80 pop {r7, pc}
|
||
80049ee: bf00 nop
|
||
80049f0: 40010c00 .word 0x40010c00
|
||
80049f4: 200000e4 .word 0x200000e4
|
||
|
||
080049f8 <SELECT>:
|
||
|
||
}
|
||
|
||
/* SPI Chip Select */
|
||
static void SELECT(void)
|
||
{
|
||
80049f8: b580 push {r7, lr}
|
||
80049fa: af00 add r7, sp, #0
|
||
HAL_GPIO_WritePin(SD_CS_GPIO_Port, SD_CS_Pin, GPIO_PIN_RESET);
|
||
80049fc: 2200 movs r2, #0
|
||
80049fe: 2104 movs r1, #4
|
||
8004a00: 4802 ldr r0, [pc, #8] ; (8004a0c <SELECT+0x14>)
|
||
8004a02: f7fc fa14 bl 8000e2e <HAL_GPIO_WritePin>
|
||
}
|
||
8004a06: bf00 nop
|
||
8004a08: bd80 pop {r7, pc}
|
||
8004a0a: bf00 nop
|
||
8004a0c: 40011400 .word 0x40011400
|
||
|
||
08004a10 <DESELECT>:
|
||
|
||
/* SPI Chip Deselect */
|
||
static void DESELECT(void)
|
||
{
|
||
8004a10: b580 push {r7, lr}
|
||
8004a12: af00 add r7, sp, #0
|
||
HAL_GPIO_WritePin(SD_CS_GPIO_Port, SD_CS_Pin, GPIO_PIN_SET);
|
||
8004a14: 2201 movs r2, #1
|
||
8004a16: 2104 movs r1, #4
|
||
8004a18: 4802 ldr r0, [pc, #8] ; (8004a24 <DESELECT+0x14>)
|
||
8004a1a: f7fc fa08 bl 8000e2e <HAL_GPIO_WritePin>
|
||
}
|
||
8004a1e: bf00 nop
|
||
8004a20: bd80 pop {r7, pc}
|
||
8004a22: bf00 nop
|
||
8004a24: 40011400 .word 0x40011400
|
||
|
||
08004a28 <SPI_TxByte>:
|
||
|
||
|
||
static void SPI_TxByte(BYTE data)
|
||
{
|
||
8004a28: b580 push {r7, lr}
|
||
8004a2a: b082 sub sp, #8
|
||
8004a2c: af00 add r7, sp, #0
|
||
8004a2e: 4603 mov r3, r0
|
||
8004a30: 71fb strb r3, [r7, #7]
|
||
while (HAL_SPI_GetState(&hspi2) != HAL_SPI_STATE_READY);
|
||
8004a32: bf00 nop
|
||
8004a34: 4808 ldr r0, [pc, #32] ; (8004a58 <SPI_TxByte+0x30>)
|
||
8004a36: f7fd fa6e bl 8001f16 <HAL_SPI_GetState>
|
||
8004a3a: 4603 mov r3, r0
|
||
8004a3c: 2b01 cmp r3, #1
|
||
8004a3e: d1f9 bne.n 8004a34 <SPI_TxByte+0xc>
|
||
HAL_SPI_Transmit(&hspi2, &data, 1, SPI_TIMEOUT);
|
||
8004a40: 1df9 adds r1, r7, #7
|
||
8004a42: f44f 737a mov.w r3, #1000 ; 0x3e8
|
||
8004a46: 2201 movs r2, #1
|
||
8004a48: 4803 ldr r0, [pc, #12] ; (8004a58 <SPI_TxByte+0x30>)
|
||
8004a4a: f7fc fe75 bl 8001738 <HAL_SPI_Transmit>
|
||
}
|
||
8004a4e: bf00 nop
|
||
8004a50: 3708 adds r7, #8
|
||
8004a52: 46bd mov sp, r7
|
||
8004a54: bd80 pop {r7, pc}
|
||
8004a56: bf00 nop
|
||
8004a58: 200000e4 .word 0x200000e4
|
||
|
||
08004a5c <SPI_RxByte>:
|
||
|
||
|
||
static uint8_t SPI_RxByte(void)
|
||
{
|
||
8004a5c: b580 push {r7, lr}
|
||
8004a5e: b084 sub sp, #16
|
||
8004a60: af02 add r7, sp, #8
|
||
uint8_t dummy, data;
|
||
dummy = 0xFF;
|
||
8004a62: 23ff movs r3, #255 ; 0xff
|
||
8004a64: 71fb strb r3, [r7, #7]
|
||
data = 0;
|
||
8004a66: 2300 movs r3, #0
|
||
8004a68: 71bb strb r3, [r7, #6]
|
||
|
||
while ((HAL_SPI_GetState(&hspi2) != HAL_SPI_STATE_READY));
|
||
8004a6a: bf00 nop
|
||
8004a6c: 4809 ldr r0, [pc, #36] ; (8004a94 <SPI_RxByte+0x38>)
|
||
8004a6e: f7fd fa52 bl 8001f16 <HAL_SPI_GetState>
|
||
8004a72: 4603 mov r3, r0
|
||
8004a74: 2b01 cmp r3, #1
|
||
8004a76: d1f9 bne.n 8004a6c <SPI_RxByte+0x10>
|
||
HAL_SPI_TransmitReceive(&hspi2, &dummy, &data, 1, SPI_TIMEOUT);
|
||
8004a78: 1dba adds r2, r7, #6
|
||
8004a7a: 1df9 adds r1, r7, #7
|
||
8004a7c: f44f 737a mov.w r3, #1000 ; 0x3e8
|
||
8004a80: 9300 str r3, [sp, #0]
|
||
8004a82: 2301 movs r3, #1
|
||
8004a84: 4803 ldr r0, [pc, #12] ; (8004a94 <SPI_RxByte+0x38>)
|
||
8004a86: f7fd f8a4 bl 8001bd2 <HAL_SPI_TransmitReceive>
|
||
|
||
return data;
|
||
8004a8a: 79bb ldrb r3, [r7, #6]
|
||
}
|
||
8004a8c: 4618 mov r0, r3
|
||
8004a8e: 3708 adds r7, #8
|
||
8004a90: 46bd mov sp, r7
|
||
8004a92: bd80 pop {r7, pc}
|
||
8004a94: 200000e4 .word 0x200000e4
|
||
|
||
08004a98 <SPI_RxBytePtr>:
|
||
|
||
|
||
static void SPI_RxBytePtr(uint8_t *buff)
|
||
{
|
||
8004a98: b580 push {r7, lr}
|
||
8004a9a: b082 sub sp, #8
|
||
8004a9c: af00 add r7, sp, #0
|
||
8004a9e: 6078 str r0, [r7, #4]
|
||
*buff = SPI_RxByte();
|
||
8004aa0: f7ff ffdc bl 8004a5c <SPI_RxByte>
|
||
8004aa4: 4603 mov r3, r0
|
||
8004aa6: 461a mov r2, r3
|
||
8004aa8: 687b ldr r3, [r7, #4]
|
||
8004aaa: 701a strb r2, [r3, #0]
|
||
}
|
||
8004aac: bf00 nop
|
||
8004aae: 3708 adds r7, #8
|
||
8004ab0: 46bd mov sp, r7
|
||
8004ab2: bd80 pop {r7, pc}
|
||
|
||
08004ab4 <SD_ReadyWait>:
|
||
|
||
|
||
static uint8_t SD_ReadyWait(void)
|
||
{
|
||
8004ab4: b580 push {r7, lr}
|
||
8004ab6: b082 sub sp, #8
|
||
8004ab8: af00 add r7, sp, #0
|
||
uint8_t res;
|
||
|
||
|
||
Timer2 = 50000;
|
||
8004aba: 4b0d ldr r3, [pc, #52] ; (8004af0 <SD_ReadyWait+0x3c>)
|
||
8004abc: f24c 3250 movw r2, #50000 ; 0xc350
|
||
8004ac0: 601a str r2, [r3, #0]
|
||
SPI_RxByte();
|
||
8004ac2: f7ff ffcb bl 8004a5c <SPI_RxByte>
|
||
|
||
do
|
||
{
|
||
|
||
res = SPI_RxByte();
|
||
8004ac6: f7ff ffc9 bl 8004a5c <SPI_RxByte>
|
||
8004aca: 4603 mov r3, r0
|
||
8004acc: 71fb strb r3, [r7, #7]
|
||
Timer2--;
|
||
8004ace: 4b08 ldr r3, [pc, #32] ; (8004af0 <SD_ReadyWait+0x3c>)
|
||
8004ad0: 681b ldr r3, [r3, #0]
|
||
8004ad2: 3b01 subs r3, #1
|
||
8004ad4: 4a06 ldr r2, [pc, #24] ; (8004af0 <SD_ReadyWait+0x3c>)
|
||
8004ad6: 6013 str r3, [r2, #0]
|
||
} while ((res != 0xFF) && Timer2);
|
||
8004ad8: 79fb ldrb r3, [r7, #7]
|
||
8004ada: 2bff cmp r3, #255 ; 0xff
|
||
8004adc: d003 beq.n 8004ae6 <SD_ReadyWait+0x32>
|
||
8004ade: 4b04 ldr r3, [pc, #16] ; (8004af0 <SD_ReadyWait+0x3c>)
|
||
8004ae0: 681b ldr r3, [r3, #0]
|
||
8004ae2: 2b00 cmp r3, #0
|
||
8004ae4: d1ef bne.n 8004ac6 <SD_ReadyWait+0x12>
|
||
|
||
return res;
|
||
8004ae6: 79fb ldrb r3, [r7, #7]
|
||
}
|
||
8004ae8: 4618 mov r0, r3
|
||
8004aea: 3708 adds r7, #8
|
||
8004aec: 46bd mov sp, r7
|
||
8004aee: bd80 pop {r7, pc}
|
||
8004af0: 2000081c .word 0x2000081c
|
||
|
||
08004af4 <SD_PowerOn>:
|
||
|
||
|
||
static void SD_PowerOn(void)
|
||
{
|
||
8004af4: b580 push {r7, lr}
|
||
8004af6: b086 sub sp, #24
|
||
8004af8: af00 add r7, sp, #0
|
||
uint8_t cmd_arg[6];
|
||
uint32_t Count = 0x1FFF;
|
||
8004afa: f641 73ff movw r3, #8191 ; 0x1fff
|
||
8004afe: 617b str r3, [r7, #20]
|
||
|
||
|
||
DESELECT();
|
||
8004b00: f7ff ff86 bl 8004a10 <DESELECT>
|
||
|
||
for(int i = 0; i < 10; i++)
|
||
8004b04: 2300 movs r3, #0
|
||
8004b06: 613b str r3, [r7, #16]
|
||
8004b08: e005 b.n 8004b16 <SD_PowerOn+0x22>
|
||
{
|
||
SPI_TxByte(0xFF);
|
||
8004b0a: 20ff movs r0, #255 ; 0xff
|
||
8004b0c: f7ff ff8c bl 8004a28 <SPI_TxByte>
|
||
for(int i = 0; i < 10; i++)
|
||
8004b10: 693b ldr r3, [r7, #16]
|
||
8004b12: 3301 adds r3, #1
|
||
8004b14: 613b str r3, [r7, #16]
|
||
8004b16: 693b ldr r3, [r7, #16]
|
||
8004b18: 2b09 cmp r3, #9
|
||
8004b1a: ddf6 ble.n 8004b0a <SD_PowerOn+0x16>
|
||
}
|
||
|
||
/* SPI Chips Select */
|
||
SELECT();
|
||
8004b1c: f7ff ff6c bl 80049f8 <SELECT>
|
||
|
||
|
||
cmd_arg[0] = (CMD0 | 0x40);
|
||
8004b20: 2340 movs r3, #64 ; 0x40
|
||
8004b22: 713b strb r3, [r7, #4]
|
||
cmd_arg[1] = 0;
|
||
8004b24: 2300 movs r3, #0
|
||
8004b26: 717b strb r3, [r7, #5]
|
||
cmd_arg[2] = 0;
|
||
8004b28: 2300 movs r3, #0
|
||
8004b2a: 71bb strb r3, [r7, #6]
|
||
cmd_arg[3] = 0;
|
||
8004b2c: 2300 movs r3, #0
|
||
8004b2e: 71fb strb r3, [r7, #7]
|
||
cmd_arg[4] = 0;
|
||
8004b30: 2300 movs r3, #0
|
||
8004b32: 723b strb r3, [r7, #8]
|
||
cmd_arg[5] = 0x95;
|
||
8004b34: 2395 movs r3, #149 ; 0x95
|
||
8004b36: 727b strb r3, [r7, #9]
|
||
|
||
|
||
for (int i = 0; i < 6; i++)
|
||
8004b38: 2300 movs r3, #0
|
||
8004b3a: 60fb str r3, [r7, #12]
|
||
8004b3c: e009 b.n 8004b52 <SD_PowerOn+0x5e>
|
||
{
|
||
SPI_TxByte(cmd_arg[i]);
|
||
8004b3e: 1d3a adds r2, r7, #4
|
||
8004b40: 68fb ldr r3, [r7, #12]
|
||
8004b42: 4413 add r3, r2
|
||
8004b44: 781b ldrb r3, [r3, #0]
|
||
8004b46: 4618 mov r0, r3
|
||
8004b48: f7ff ff6e bl 8004a28 <SPI_TxByte>
|
||
for (int i = 0; i < 6; i++)
|
||
8004b4c: 68fb ldr r3, [r7, #12]
|
||
8004b4e: 3301 adds r3, #1
|
||
8004b50: 60fb str r3, [r7, #12]
|
||
8004b52: 68fb ldr r3, [r7, #12]
|
||
8004b54: 2b05 cmp r3, #5
|
||
8004b56: ddf2 ble.n 8004b3e <SD_PowerOn+0x4a>
|
||
}
|
||
|
||
|
||
while ((SPI_RxByte() != 0x01) && Count)
|
||
8004b58: e002 b.n 8004b60 <SD_PowerOn+0x6c>
|
||
{
|
||
Count--;
|
||
8004b5a: 697b ldr r3, [r7, #20]
|
||
8004b5c: 3b01 subs r3, #1
|
||
8004b5e: 617b str r3, [r7, #20]
|
||
while ((SPI_RxByte() != 0x01) && Count)
|
||
8004b60: f7ff ff7c bl 8004a5c <SPI_RxByte>
|
||
8004b64: 4603 mov r3, r0
|
||
8004b66: 2b01 cmp r3, #1
|
||
8004b68: d002 beq.n 8004b70 <SD_PowerOn+0x7c>
|
||
8004b6a: 697b ldr r3, [r7, #20]
|
||
8004b6c: 2b00 cmp r3, #0
|
||
8004b6e: d1f4 bne.n 8004b5a <SD_PowerOn+0x66>
|
||
}
|
||
|
||
DESELECT();
|
||
8004b70: f7ff ff4e bl 8004a10 <DESELECT>
|
||
SPI_TxByte(0XFF);
|
||
8004b74: 20ff movs r0, #255 ; 0xff
|
||
8004b76: f7ff ff57 bl 8004a28 <SPI_TxByte>
|
||
|
||
PowerFlag = 1;
|
||
8004b7a: 4b03 ldr r3, [pc, #12] ; (8004b88 <SD_PowerOn+0x94>)
|
||
8004b7c: 2201 movs r2, #1
|
||
8004b7e: 701a strb r2, [r3, #0]
|
||
}
|
||
8004b80: bf00 nop
|
||
8004b82: 3718 adds r7, #24
|
||
8004b84: 46bd mov sp, r7
|
||
8004b86: bd80 pop {r7, pc}
|
||
8004b88: 200000d9 .word 0x200000d9
|
||
|
||
08004b8c <SD_PowerOff>:
|
||
|
||
|
||
static void SD_PowerOff(void)
|
||
{
|
||
8004b8c: b480 push {r7}
|
||
8004b8e: af00 add r7, sp, #0
|
||
PowerFlag = 0;
|
||
8004b90: 4b03 ldr r3, [pc, #12] ; (8004ba0 <SD_PowerOff+0x14>)
|
||
8004b92: 2200 movs r2, #0
|
||
8004b94: 701a strb r2, [r3, #0]
|
||
}
|
||
8004b96: bf00 nop
|
||
8004b98: 46bd mov sp, r7
|
||
8004b9a: bc80 pop {r7}
|
||
8004b9c: 4770 bx lr
|
||
8004b9e: bf00 nop
|
||
8004ba0: 200000d9 .word 0x200000d9
|
||
|
||
08004ba4 <SD_CheckPower>:
|
||
|
||
|
||
static uint8_t SD_CheckPower(void)
|
||
{
|
||
8004ba4: b480 push {r7}
|
||
8004ba6: af00 add r7, sp, #0
|
||
/* 0=off, 1=on */
|
||
return PowerFlag;
|
||
8004ba8: 4b02 ldr r3, [pc, #8] ; (8004bb4 <SD_CheckPower+0x10>)
|
||
8004baa: 781b ldrb r3, [r3, #0]
|
||
}
|
||
8004bac: 4618 mov r0, r3
|
||
8004bae: 46bd mov sp, r7
|
||
8004bb0: bc80 pop {r7}
|
||
8004bb2: 4770 bx lr
|
||
8004bb4: 200000d9 .word 0x200000d9
|
||
|
||
08004bb8 <SD_RxDataBlock>:
|
||
|
||
|
||
static bool SD_RxDataBlock(BYTE *buff, UINT btr)
|
||
{
|
||
8004bb8: b580 push {r7, lr}
|
||
8004bba: b084 sub sp, #16
|
||
8004bbc: af00 add r7, sp, #0
|
||
8004bbe: 6078 str r0, [r7, #4]
|
||
8004bc0: 6039 str r1, [r7, #0]
|
||
uint8_t token;
|
||
|
||
Timer1 = 10000;
|
||
8004bc2: 4b1a ldr r3, [pc, #104] ; (8004c2c <SD_RxDataBlock+0x74>)
|
||
8004bc4: f242 7210 movw r2, #10000 ; 0x2710
|
||
8004bc8: 601a str r2, [r3, #0]
|
||
do
|
||
{
|
||
token = SPI_RxByte();
|
||
8004bca: f7ff ff47 bl 8004a5c <SPI_RxByte>
|
||
8004bce: 4603 mov r3, r0
|
||
8004bd0: 73fb strb r3, [r7, #15]
|
||
Timer1--;
|
||
8004bd2: 4b16 ldr r3, [pc, #88] ; (8004c2c <SD_RxDataBlock+0x74>)
|
||
8004bd4: 681b ldr r3, [r3, #0]
|
||
8004bd6: 3b01 subs r3, #1
|
||
8004bd8: 4a14 ldr r2, [pc, #80] ; (8004c2c <SD_RxDataBlock+0x74>)
|
||
8004bda: 6013 str r3, [r2, #0]
|
||
} while((token == 0xFF) && Timer1);
|
||
8004bdc: 7bfb ldrb r3, [r7, #15]
|
||
8004bde: 2bff cmp r3, #255 ; 0xff
|
||
8004be0: d103 bne.n 8004bea <SD_RxDataBlock+0x32>
|
||
8004be2: 4b12 ldr r3, [pc, #72] ; (8004c2c <SD_RxDataBlock+0x74>)
|
||
8004be4: 681b ldr r3, [r3, #0]
|
||
8004be6: 2b00 cmp r3, #0
|
||
8004be8: d1ef bne.n 8004bca <SD_RxDataBlock+0x12>
|
||
|
||
|
||
if(token != 0xFE)
|
||
8004bea: 7bfb ldrb r3, [r7, #15]
|
||
8004bec: 2bfe cmp r3, #254 ; 0xfe
|
||
8004bee: d001 beq.n 8004bf4 <SD_RxDataBlock+0x3c>
|
||
return FALSE;
|
||
8004bf0: 2300 movs r3, #0
|
||
8004bf2: e016 b.n 8004c22 <SD_RxDataBlock+0x6a>
|
||
|
||
|
||
do
|
||
{
|
||
SPI_RxBytePtr(buff++);
|
||
8004bf4: 687b ldr r3, [r7, #4]
|
||
8004bf6: 1c5a adds r2, r3, #1
|
||
8004bf8: 607a str r2, [r7, #4]
|
||
8004bfa: 4618 mov r0, r3
|
||
8004bfc: f7ff ff4c bl 8004a98 <SPI_RxBytePtr>
|
||
SPI_RxBytePtr(buff++);
|
||
8004c00: 687b ldr r3, [r7, #4]
|
||
8004c02: 1c5a adds r2, r3, #1
|
||
8004c04: 607a str r2, [r7, #4]
|
||
8004c06: 4618 mov r0, r3
|
||
8004c08: f7ff ff46 bl 8004a98 <SPI_RxBytePtr>
|
||
} while(btr -= 2);
|
||
8004c0c: 683b ldr r3, [r7, #0]
|
||
8004c0e: 3b02 subs r3, #2
|
||
8004c10: 603b str r3, [r7, #0]
|
||
8004c12: 683b ldr r3, [r7, #0]
|
||
8004c14: 2b00 cmp r3, #0
|
||
8004c16: d1ed bne.n 8004bf4 <SD_RxDataBlock+0x3c>
|
||
|
||
SPI_RxByte();
|
||
8004c18: f7ff ff20 bl 8004a5c <SPI_RxByte>
|
||
SPI_RxByte();
|
||
8004c1c: f7ff ff1e bl 8004a5c <SPI_RxByte>
|
||
|
||
return TRUE;
|
||
8004c20: 2301 movs r3, #1
|
||
}
|
||
8004c22: 4618 mov r0, r3
|
||
8004c24: 3710 adds r7, #16
|
||
8004c26: 46bd mov sp, r7
|
||
8004c28: bd80 pop {r7, pc}
|
||
8004c2a: bf00 nop
|
||
8004c2c: 20000820 .word 0x20000820
|
||
|
||
08004c30 <SD_TxDataBlock>:
|
||
|
||
|
||
#if _READONLY == 0
|
||
static bool SD_TxDataBlock(const BYTE *buff, BYTE token)
|
||
{
|
||
8004c30: b580 push {r7, lr}
|
||
8004c32: b084 sub sp, #16
|
||
8004c34: af00 add r7, sp, #0
|
||
8004c36: 6078 str r0, [r7, #4]
|
||
8004c38: 460b mov r3, r1
|
||
8004c3a: 70fb strb r3, [r7, #3]
|
||
uint8_t resp, wc;
|
||
uint8_t i = 0;
|
||
8004c3c: 2300 movs r3, #0
|
||
8004c3e: 737b strb r3, [r7, #13]
|
||
|
||
if (SD_ReadyWait() != 0xFF)
|
||
8004c40: f7ff ff38 bl 8004ab4 <SD_ReadyWait>
|
||
8004c44: 4603 mov r3, r0
|
||
8004c46: 2bff cmp r3, #255 ; 0xff
|
||
8004c48: d001 beq.n 8004c4e <SD_TxDataBlock+0x1e>
|
||
return FALSE;
|
||
8004c4a: 2300 movs r3, #0
|
||
8004c4c: e040 b.n 8004cd0 <SD_TxDataBlock+0xa0>
|
||
|
||
SPI_TxByte(token);
|
||
8004c4e: 78fb ldrb r3, [r7, #3]
|
||
8004c50: 4618 mov r0, r3
|
||
8004c52: f7ff fee9 bl 8004a28 <SPI_TxByte>
|
||
|
||
if (token != 0xFD)
|
||
8004c56: 78fb ldrb r3, [r7, #3]
|
||
8004c58: 2bfd cmp r3, #253 ; 0xfd
|
||
8004c5a: d031 beq.n 8004cc0 <SD_TxDataBlock+0x90>
|
||
{
|
||
wc = 0;
|
||
8004c5c: 2300 movs r3, #0
|
||
8004c5e: 73bb strb r3, [r7, #14]
|
||
|
||
|
||
do
|
||
{
|
||
SPI_TxByte(*buff++);
|
||
8004c60: 687b ldr r3, [r7, #4]
|
||
8004c62: 1c5a adds r2, r3, #1
|
||
8004c64: 607a str r2, [r7, #4]
|
||
8004c66: 781b ldrb r3, [r3, #0]
|
||
8004c68: 4618 mov r0, r3
|
||
8004c6a: f7ff fedd bl 8004a28 <SPI_TxByte>
|
||
SPI_TxByte(*buff++);
|
||
8004c6e: 687b ldr r3, [r7, #4]
|
||
8004c70: 1c5a adds r2, r3, #1
|
||
8004c72: 607a str r2, [r7, #4]
|
||
8004c74: 781b ldrb r3, [r3, #0]
|
||
8004c76: 4618 mov r0, r3
|
||
8004c78: f7ff fed6 bl 8004a28 <SPI_TxByte>
|
||
} while (--wc);
|
||
8004c7c: 7bbb ldrb r3, [r7, #14]
|
||
8004c7e: 3b01 subs r3, #1
|
||
8004c80: 73bb strb r3, [r7, #14]
|
||
8004c82: 7bbb ldrb r3, [r7, #14]
|
||
8004c84: 2b00 cmp r3, #0
|
||
8004c86: d1eb bne.n 8004c60 <SD_TxDataBlock+0x30>
|
||
|
||
SPI_RxByte();
|
||
8004c88: f7ff fee8 bl 8004a5c <SPI_RxByte>
|
||
SPI_RxByte();
|
||
8004c8c: f7ff fee6 bl 8004a5c <SPI_RxByte>
|
||
|
||
|
||
while (i <= 64)
|
||
8004c90: e00b b.n 8004caa <SD_TxDataBlock+0x7a>
|
||
{
|
||
resp = SPI_RxByte();
|
||
8004c92: f7ff fee3 bl 8004a5c <SPI_RxByte>
|
||
8004c96: 4603 mov r3, r0
|
||
8004c98: 73fb strb r3, [r7, #15]
|
||
|
||
|
||
if ((resp & 0x1F) == 0x05)
|
||
8004c9a: 7bfb ldrb r3, [r7, #15]
|
||
8004c9c: f003 031f and.w r3, r3, #31
|
||
8004ca0: 2b05 cmp r3, #5
|
||
8004ca2: d006 beq.n 8004cb2 <SD_TxDataBlock+0x82>
|
||
break;
|
||
|
||
i++;
|
||
8004ca4: 7b7b ldrb r3, [r7, #13]
|
||
8004ca6: 3301 adds r3, #1
|
||
8004ca8: 737b strb r3, [r7, #13]
|
||
while (i <= 64)
|
||
8004caa: 7b7b ldrb r3, [r7, #13]
|
||
8004cac: 2b40 cmp r3, #64 ; 0x40
|
||
8004cae: d9f0 bls.n 8004c92 <SD_TxDataBlock+0x62>
|
||
8004cb0: e000 b.n 8004cb4 <SD_TxDataBlock+0x84>
|
||
break;
|
||
8004cb2: bf00 nop
|
||
}
|
||
|
||
|
||
while (SPI_RxByte() == 0);
|
||
8004cb4: bf00 nop
|
||
8004cb6: f7ff fed1 bl 8004a5c <SPI_RxByte>
|
||
8004cba: 4603 mov r3, r0
|
||
8004cbc: 2b00 cmp r3, #0
|
||
8004cbe: d0fa beq.n 8004cb6 <SD_TxDataBlock+0x86>
|
||
}
|
||
|
||
if ((resp & 0x1F) == 0x05)
|
||
8004cc0: 7bfb ldrb r3, [r7, #15]
|
||
8004cc2: f003 031f and.w r3, r3, #31
|
||
8004cc6: 2b05 cmp r3, #5
|
||
8004cc8: d101 bne.n 8004cce <SD_TxDataBlock+0x9e>
|
||
return TRUE;
|
||
8004cca: 2301 movs r3, #1
|
||
8004ccc: e000 b.n 8004cd0 <SD_TxDataBlock+0xa0>
|
||
else
|
||
return FALSE;
|
||
8004cce: 2300 movs r3, #0
|
||
}
|
||
8004cd0: 4618 mov r0, r3
|
||
8004cd2: 3710 adds r7, #16
|
||
8004cd4: 46bd mov sp, r7
|
||
8004cd6: bd80 pop {r7, pc}
|
||
|
||
08004cd8 <SD_SendCmd>:
|
||
#endif /* _READONLY */
|
||
|
||
|
||
static BYTE SD_SendCmd(BYTE cmd, DWORD arg)
|
||
{
|
||
8004cd8: b580 push {r7, lr}
|
||
8004cda: b084 sub sp, #16
|
||
8004cdc: af00 add r7, sp, #0
|
||
8004cde: 4603 mov r3, r0
|
||
8004ce0: 6039 str r1, [r7, #0]
|
||
8004ce2: 71fb strb r3, [r7, #7]
|
||
uint8_t crc, res;
|
||
|
||
|
||
if (SD_ReadyWait() != 0xFF)
|
||
8004ce4: f7ff fee6 bl 8004ab4 <SD_ReadyWait>
|
||
8004ce8: 4603 mov r3, r0
|
||
8004cea: 2bff cmp r3, #255 ; 0xff
|
||
8004cec: d001 beq.n 8004cf2 <SD_SendCmd+0x1a>
|
||
return 0xFF;
|
||
8004cee: 23ff movs r3, #255 ; 0xff
|
||
8004cf0: e040 b.n 8004d74 <SD_SendCmd+0x9c>
|
||
|
||
|
||
SPI_TxByte(cmd); /* Command */
|
||
8004cf2: 79fb ldrb r3, [r7, #7]
|
||
8004cf4: 4618 mov r0, r3
|
||
8004cf6: f7ff fe97 bl 8004a28 <SPI_TxByte>
|
||
SPI_TxByte((BYTE) (arg >> 24)); /* Argument[31..24] */
|
||
8004cfa: 683b ldr r3, [r7, #0]
|
||
8004cfc: 0e1b lsrs r3, r3, #24
|
||
8004cfe: b2db uxtb r3, r3
|
||
8004d00: 4618 mov r0, r3
|
||
8004d02: f7ff fe91 bl 8004a28 <SPI_TxByte>
|
||
SPI_TxByte((BYTE) (arg >> 16)); /* Argument[23..16] */
|
||
8004d06: 683b ldr r3, [r7, #0]
|
||
8004d08: 0c1b lsrs r3, r3, #16
|
||
8004d0a: b2db uxtb r3, r3
|
||
8004d0c: 4618 mov r0, r3
|
||
8004d0e: f7ff fe8b bl 8004a28 <SPI_TxByte>
|
||
SPI_TxByte((BYTE) (arg >> 8)); /* Argument[15..8] */
|
||
8004d12: 683b ldr r3, [r7, #0]
|
||
8004d14: 0a1b lsrs r3, r3, #8
|
||
8004d16: b2db uxtb r3, r3
|
||
8004d18: 4618 mov r0, r3
|
||
8004d1a: f7ff fe85 bl 8004a28 <SPI_TxByte>
|
||
SPI_TxByte((BYTE) arg); /* Argument[7..0] */
|
||
8004d1e: 683b ldr r3, [r7, #0]
|
||
8004d20: b2db uxtb r3, r3
|
||
8004d22: 4618 mov r0, r3
|
||
8004d24: f7ff fe80 bl 8004a28 <SPI_TxByte>
|
||
|
||
|
||
crc = 0;
|
||
8004d28: 2300 movs r3, #0
|
||
8004d2a: 73fb strb r3, [r7, #15]
|
||
if (cmd == CMD0)
|
||
8004d2c: 79fb ldrb r3, [r7, #7]
|
||
8004d2e: 2b40 cmp r3, #64 ; 0x40
|
||
8004d30: d101 bne.n 8004d36 <SD_SendCmd+0x5e>
|
||
crc = 0x95; /* CRC for CMD0(0) */
|
||
8004d32: 2395 movs r3, #149 ; 0x95
|
||
8004d34: 73fb strb r3, [r7, #15]
|
||
|
||
if (cmd == CMD8)
|
||
8004d36: 79fb ldrb r3, [r7, #7]
|
||
8004d38: 2b48 cmp r3, #72 ; 0x48
|
||
8004d3a: d101 bne.n 8004d40 <SD_SendCmd+0x68>
|
||
crc = 0x87; /* CRC for CMD8(0x1AA) */
|
||
8004d3c: 2387 movs r3, #135 ; 0x87
|
||
8004d3e: 73fb strb r3, [r7, #15]
|
||
|
||
SPI_TxByte(crc);
|
||
8004d40: 7bfb ldrb r3, [r7, #15]
|
||
8004d42: 4618 mov r0, r3
|
||
8004d44: f7ff fe70 bl 8004a28 <SPI_TxByte>
|
||
|
||
|
||
if (cmd == CMD12)
|
||
8004d48: 79fb ldrb r3, [r7, #7]
|
||
8004d4a: 2b4c cmp r3, #76 ; 0x4c
|
||
8004d4c: d101 bne.n 8004d52 <SD_SendCmd+0x7a>
|
||
SPI_RxByte();
|
||
8004d4e: f7ff fe85 bl 8004a5c <SPI_RxByte>
|
||
|
||
|
||
uint8_t n = 10;
|
||
8004d52: 230a movs r3, #10
|
||
8004d54: 73bb strb r3, [r7, #14]
|
||
do
|
||
{
|
||
res = SPI_RxByte();
|
||
8004d56: f7ff fe81 bl 8004a5c <SPI_RxByte>
|
||
8004d5a: 4603 mov r3, r0
|
||
8004d5c: 737b strb r3, [r7, #13]
|
||
} while ((res & 0x80) && --n);
|
||
8004d5e: f997 300d ldrsb.w r3, [r7, #13]
|
||
8004d62: 2b00 cmp r3, #0
|
||
8004d64: da05 bge.n 8004d72 <SD_SendCmd+0x9a>
|
||
8004d66: 7bbb ldrb r3, [r7, #14]
|
||
8004d68: 3b01 subs r3, #1
|
||
8004d6a: 73bb strb r3, [r7, #14]
|
||
8004d6c: 7bbb ldrb r3, [r7, #14]
|
||
8004d6e: 2b00 cmp r3, #0
|
||
8004d70: d1f1 bne.n 8004d56 <SD_SendCmd+0x7e>
|
||
|
||
return res;
|
||
8004d72: 7b7b ldrb r3, [r7, #13]
|
||
}
|
||
8004d74: 4618 mov r0, r3
|
||
8004d76: 3710 adds r7, #16
|
||
8004d78: 46bd mov sp, r7
|
||
8004d7a: bd80 pop {r7, pc}
|
||
|
||
08004d7c <SD_disk_initialize>:
|
||
|
||
-----------------------------------------------------------------------*/
|
||
|
||
|
||
DSTATUS SD_disk_initialize(BYTE drv)
|
||
{
|
||
8004d7c: b590 push {r4, r7, lr}
|
||
8004d7e: b085 sub sp, #20
|
||
8004d80: af00 add r7, sp, #0
|
||
8004d82: 4603 mov r3, r0
|
||
8004d84: 71fb strb r3, [r7, #7]
|
||
uint8_t n, type, ocr[4];
|
||
|
||
|
||
if(drv)
|
||
8004d86: 79fb ldrb r3, [r7, #7]
|
||
8004d88: 2b00 cmp r3, #0
|
||
8004d8a: d001 beq.n 8004d90 <SD_disk_initialize+0x14>
|
||
return STA_NOINIT;
|
||
8004d8c: 2301 movs r3, #1
|
||
8004d8e: e0dc b.n 8004f4a <SD_disk_initialize+0x1ce>
|
||
|
||
|
||
if(Stat & STA_NODISK)
|
||
8004d90: 4b70 ldr r3, [pc, #448] ; (8004f54 <SD_disk_initialize+0x1d8>)
|
||
8004d92: 781b ldrb r3, [r3, #0]
|
||
8004d94: b2db uxtb r3, r3
|
||
8004d96: f003 0302 and.w r3, r3, #2
|
||
8004d9a: 2b00 cmp r3, #0
|
||
8004d9c: d003 beq.n 8004da6 <SD_disk_initialize+0x2a>
|
||
return Stat;
|
||
8004d9e: 4b6d ldr r3, [pc, #436] ; (8004f54 <SD_disk_initialize+0x1d8>)
|
||
8004da0: 781b ldrb r3, [r3, #0]
|
||
8004da2: b2db uxtb r3, r3
|
||
8004da4: e0d1 b.n 8004f4a <SD_disk_initialize+0x1ce>
|
||
|
||
|
||
SD_PowerOn();
|
||
8004da6: f7ff fea5 bl 8004af4 <SD_PowerOn>
|
||
|
||
|
||
SELECT();
|
||
8004daa: f7ff fe25 bl 80049f8 <SELECT>
|
||
|
||
|
||
type = 0;
|
||
8004dae: 2300 movs r3, #0
|
||
8004db0: 73bb strb r3, [r7, #14]
|
||
|
||
|
||
if (SD_SendCmd(CMD0, 0) == 1)
|
||
8004db2: 2100 movs r1, #0
|
||
8004db4: 2040 movs r0, #64 ; 0x40
|
||
8004db6: f7ff ff8f bl 8004cd8 <SD_SendCmd>
|
||
8004dba: 4603 mov r3, r0
|
||
8004dbc: 2b01 cmp r3, #1
|
||
8004dbe: f040 80ac bne.w 8004f1a <SD_disk_initialize+0x19e>
|
||
{
|
||
|
||
Timer1 = 100000;
|
||
8004dc2: 4b65 ldr r3, [pc, #404] ; (8004f58 <SD_disk_initialize+0x1dc>)
|
||
8004dc4: 4a65 ldr r2, [pc, #404] ; (8004f5c <SD_disk_initialize+0x1e0>)
|
||
8004dc6: 601a str r2, [r3, #0]
|
||
|
||
|
||
if (SD_SendCmd(CMD8, 0x1AA) == 1)
|
||
8004dc8: f44f 71d5 mov.w r1, #426 ; 0x1aa
|
||
8004dcc: 2048 movs r0, #72 ; 0x48
|
||
8004dce: f7ff ff83 bl 8004cd8 <SD_SendCmd>
|
||
8004dd2: 4603 mov r3, r0
|
||
8004dd4: 2b01 cmp r3, #1
|
||
8004dd6: d15c bne.n 8004e92 <SD_disk_initialize+0x116>
|
||
{
|
||
/* SDC Ver2+ */
|
||
for (n = 0; n < 4; n++)
|
||
8004dd8: 2300 movs r3, #0
|
||
8004dda: 73fb strb r3, [r7, #15]
|
||
8004ddc: e00c b.n 8004df8 <SD_disk_initialize+0x7c>
|
||
{
|
||
ocr[n] = SPI_RxByte();
|
||
8004dde: 7bfc ldrb r4, [r7, #15]
|
||
8004de0: f7ff fe3c bl 8004a5c <SPI_RxByte>
|
||
8004de4: 4603 mov r3, r0
|
||
8004de6: 461a mov r2, r3
|
||
8004de8: f107 0310 add.w r3, r7, #16
|
||
8004dec: 4423 add r3, r4
|
||
8004dee: f803 2c08 strb.w r2, [r3, #-8]
|
||
for (n = 0; n < 4; n++)
|
||
8004df2: 7bfb ldrb r3, [r7, #15]
|
||
8004df4: 3301 adds r3, #1
|
||
8004df6: 73fb strb r3, [r7, #15]
|
||
8004df8: 7bfb ldrb r3, [r7, #15]
|
||
8004dfa: 2b03 cmp r3, #3
|
||
8004dfc: d9ef bls.n 8004dde <SD_disk_initialize+0x62>
|
||
}
|
||
|
||
if (ocr[2] == 0x01 && ocr[3] == 0xAA)
|
||
8004dfe: 7abb ldrb r3, [r7, #10]
|
||
8004e00: 2b01 cmp r3, #1
|
||
8004e02: f040 808a bne.w 8004f1a <SD_disk_initialize+0x19e>
|
||
8004e06: 7afb ldrb r3, [r7, #11]
|
||
8004e08: 2baa cmp r3, #170 ; 0xaa
|
||
8004e0a: f040 8086 bne.w 8004f1a <SD_disk_initialize+0x19e>
|
||
{
|
||
|
||
do {
|
||
if (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 1UL << 30) == 0)
|
||
8004e0e: 2100 movs r1, #0
|
||
8004e10: 2077 movs r0, #119 ; 0x77
|
||
8004e12: f7ff ff61 bl 8004cd8 <SD_SendCmd>
|
||
8004e16: 4603 mov r3, r0
|
||
8004e18: 2b01 cmp r3, #1
|
||
8004e1a: d807 bhi.n 8004e2c <SD_disk_initialize+0xb0>
|
||
8004e1c: f04f 4180 mov.w r1, #1073741824 ; 0x40000000
|
||
8004e20: 2069 movs r0, #105 ; 0x69
|
||
8004e22: f7ff ff59 bl 8004cd8 <SD_SendCmd>
|
||
8004e26: 4603 mov r3, r0
|
||
8004e28: 2b00 cmp r3, #0
|
||
8004e2a: d009 beq.n 8004e40 <SD_disk_initialize+0xc4>
|
||
break; /* ACMD41 with HCS bit */
|
||
Timer1--;
|
||
8004e2c: 4b4a ldr r3, [pc, #296] ; (8004f58 <SD_disk_initialize+0x1dc>)
|
||
8004e2e: 681b ldr r3, [r3, #0]
|
||
8004e30: 3b01 subs r3, #1
|
||
8004e32: 4a49 ldr r2, [pc, #292] ; (8004f58 <SD_disk_initialize+0x1dc>)
|
||
8004e34: 6013 str r3, [r2, #0]
|
||
} while (Timer1);
|
||
8004e36: 4b48 ldr r3, [pc, #288] ; (8004f58 <SD_disk_initialize+0x1dc>)
|
||
8004e38: 681b ldr r3, [r3, #0]
|
||
8004e3a: 2b00 cmp r3, #0
|
||
8004e3c: d1e7 bne.n 8004e0e <SD_disk_initialize+0x92>
|
||
8004e3e: e000 b.n 8004e42 <SD_disk_initialize+0xc6>
|
||
break; /* ACMD41 with HCS bit */
|
||
8004e40: bf00 nop
|
||
|
||
if (Timer1 && SD_SendCmd(CMD58, 0) == 0)
|
||
8004e42: 4b45 ldr r3, [pc, #276] ; (8004f58 <SD_disk_initialize+0x1dc>)
|
||
8004e44: 681b ldr r3, [r3, #0]
|
||
8004e46: 2b00 cmp r3, #0
|
||
8004e48: d067 beq.n 8004f1a <SD_disk_initialize+0x19e>
|
||
8004e4a: 2100 movs r1, #0
|
||
8004e4c: 207a movs r0, #122 ; 0x7a
|
||
8004e4e: f7ff ff43 bl 8004cd8 <SD_SendCmd>
|
||
8004e52: 4603 mov r3, r0
|
||
8004e54: 2b00 cmp r3, #0
|
||
8004e56: d160 bne.n 8004f1a <SD_disk_initialize+0x19e>
|
||
{
|
||
/* Check CCS bit */
|
||
for (n = 0; n < 4; n++)
|
||
8004e58: 2300 movs r3, #0
|
||
8004e5a: 73fb strb r3, [r7, #15]
|
||
8004e5c: e00c b.n 8004e78 <SD_disk_initialize+0xfc>
|
||
{
|
||
ocr[n] = SPI_RxByte();
|
||
8004e5e: 7bfc ldrb r4, [r7, #15]
|
||
8004e60: f7ff fdfc bl 8004a5c <SPI_RxByte>
|
||
8004e64: 4603 mov r3, r0
|
||
8004e66: 461a mov r2, r3
|
||
8004e68: f107 0310 add.w r3, r7, #16
|
||
8004e6c: 4423 add r3, r4
|
||
8004e6e: f803 2c08 strb.w r2, [r3, #-8]
|
||
for (n = 0; n < 4; n++)
|
||
8004e72: 7bfb ldrb r3, [r7, #15]
|
||
8004e74: 3301 adds r3, #1
|
||
8004e76: 73fb strb r3, [r7, #15]
|
||
8004e78: 7bfb ldrb r3, [r7, #15]
|
||
8004e7a: 2b03 cmp r3, #3
|
||
8004e7c: d9ef bls.n 8004e5e <SD_disk_initialize+0xe2>
|
||
}
|
||
|
||
type = (ocr[0] & 0x40) ? 6 : 2;
|
||
8004e7e: 7a3b ldrb r3, [r7, #8]
|
||
8004e80: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
8004e84: 2b00 cmp r3, #0
|
||
8004e86: d001 beq.n 8004e8c <SD_disk_initialize+0x110>
|
||
8004e88: 2306 movs r3, #6
|
||
8004e8a: e000 b.n 8004e8e <SD_disk_initialize+0x112>
|
||
8004e8c: 2302 movs r3, #2
|
||
8004e8e: 73bb strb r3, [r7, #14]
|
||
8004e90: e043 b.n 8004f1a <SD_disk_initialize+0x19e>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* SDC Ver1 or MMC */
|
||
type = (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 0) <= 1) ? 2 : 1; /* SDC : MMC */
|
||
8004e92: 2100 movs r1, #0
|
||
8004e94: 2077 movs r0, #119 ; 0x77
|
||
8004e96: f7ff ff1f bl 8004cd8 <SD_SendCmd>
|
||
8004e9a: 4603 mov r3, r0
|
||
8004e9c: 2b01 cmp r3, #1
|
||
8004e9e: d808 bhi.n 8004eb2 <SD_disk_initialize+0x136>
|
||
8004ea0: 2100 movs r1, #0
|
||
8004ea2: 2069 movs r0, #105 ; 0x69
|
||
8004ea4: f7ff ff18 bl 8004cd8 <SD_SendCmd>
|
||
8004ea8: 4603 mov r3, r0
|
||
8004eaa: 2b01 cmp r3, #1
|
||
8004eac: d801 bhi.n 8004eb2 <SD_disk_initialize+0x136>
|
||
8004eae: 2302 movs r3, #2
|
||
8004eb0: e000 b.n 8004eb4 <SD_disk_initialize+0x138>
|
||
8004eb2: 2301 movs r3, #1
|
||
8004eb4: 73bb strb r3, [r7, #14]
|
||
|
||
do {
|
||
if (type == 2)
|
||
8004eb6: 7bbb ldrb r3, [r7, #14]
|
||
8004eb8: 2b02 cmp r3, #2
|
||
8004eba: d10e bne.n 8004eda <SD_disk_initialize+0x15e>
|
||
{
|
||
if (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 0) == 0)
|
||
8004ebc: 2100 movs r1, #0
|
||
8004ebe: 2077 movs r0, #119 ; 0x77
|
||
8004ec0: f7ff ff0a bl 8004cd8 <SD_SendCmd>
|
||
8004ec4: 4603 mov r3, r0
|
||
8004ec6: 2b01 cmp r3, #1
|
||
8004ec8: d80e bhi.n 8004ee8 <SD_disk_initialize+0x16c>
|
||
8004eca: 2100 movs r1, #0
|
||
8004ecc: 2069 movs r0, #105 ; 0x69
|
||
8004ece: f7ff ff03 bl 8004cd8 <SD_SendCmd>
|
||
8004ed2: 4603 mov r3, r0
|
||
8004ed4: 2b00 cmp r3, #0
|
||
8004ed6: d107 bne.n 8004ee8 <SD_disk_initialize+0x16c>
|
||
break; /* ACMD41 */
|
||
8004ed8: e011 b.n 8004efe <SD_disk_initialize+0x182>
|
||
}
|
||
else
|
||
{
|
||
if (SD_SendCmd(CMD1, 0) == 0)
|
||
8004eda: 2100 movs r1, #0
|
||
8004edc: 2041 movs r0, #65 ; 0x41
|
||
8004ede: f7ff fefb bl 8004cd8 <SD_SendCmd>
|
||
8004ee2: 4603 mov r3, r0
|
||
8004ee4: 2b00 cmp r3, #0
|
||
8004ee6: d009 beq.n 8004efc <SD_disk_initialize+0x180>
|
||
break; /* CMD1 */
|
||
}
|
||
Timer1--;
|
||
8004ee8: 4b1b ldr r3, [pc, #108] ; (8004f58 <SD_disk_initialize+0x1dc>)
|
||
8004eea: 681b ldr r3, [r3, #0]
|
||
8004eec: 3b01 subs r3, #1
|
||
8004eee: 4a1a ldr r2, [pc, #104] ; (8004f58 <SD_disk_initialize+0x1dc>)
|
||
8004ef0: 6013 str r3, [r2, #0]
|
||
} while (Timer1);
|
||
8004ef2: 4b19 ldr r3, [pc, #100] ; (8004f58 <SD_disk_initialize+0x1dc>)
|
||
8004ef4: 681b ldr r3, [r3, #0]
|
||
8004ef6: 2b00 cmp r3, #0
|
||
8004ef8: d1dd bne.n 8004eb6 <SD_disk_initialize+0x13a>
|
||
8004efa: e000 b.n 8004efe <SD_disk_initialize+0x182>
|
||
break; /* CMD1 */
|
||
8004efc: bf00 nop
|
||
|
||
if (!Timer1 || SD_SendCmd(CMD16, 512) != 0)
|
||
8004efe: 4b16 ldr r3, [pc, #88] ; (8004f58 <SD_disk_initialize+0x1dc>)
|
||
8004f00: 681b ldr r3, [r3, #0]
|
||
8004f02: 2b00 cmp r3, #0
|
||
8004f04: d007 beq.n 8004f16 <SD_disk_initialize+0x19a>
|
||
8004f06: f44f 7100 mov.w r1, #512 ; 0x200
|
||
8004f0a: 2050 movs r0, #80 ; 0x50
|
||
8004f0c: f7ff fee4 bl 8004cd8 <SD_SendCmd>
|
||
8004f10: 4603 mov r3, r0
|
||
8004f12: 2b00 cmp r3, #0
|
||
8004f14: d001 beq.n 8004f1a <SD_disk_initialize+0x19e>
|
||
{
|
||
|
||
type = 0;
|
||
8004f16: 2300 movs r3, #0
|
||
8004f18: 73bb strb r3, [r7, #14]
|
||
}
|
||
}
|
||
}
|
||
|
||
CardType = type;
|
||
8004f1a: 4a11 ldr r2, [pc, #68] ; (8004f60 <SD_disk_initialize+0x1e4>)
|
||
8004f1c: 7bbb ldrb r3, [r7, #14]
|
||
8004f1e: 7013 strb r3, [r2, #0]
|
||
|
||
DESELECT();
|
||
8004f20: f7ff fd76 bl 8004a10 <DESELECT>
|
||
|
||
SPI_RxByte();
|
||
8004f24: f7ff fd9a bl 8004a5c <SPI_RxByte>
|
||
|
||
if (type)
|
||
8004f28: 7bbb ldrb r3, [r7, #14]
|
||
8004f2a: 2b00 cmp r3, #0
|
||
8004f2c: d008 beq.n 8004f40 <SD_disk_initialize+0x1c4>
|
||
{
|
||
/* Clear STA_NOINIT */
|
||
Stat &= ~STA_NOINIT;
|
||
8004f2e: 4b09 ldr r3, [pc, #36] ; (8004f54 <SD_disk_initialize+0x1d8>)
|
||
8004f30: 781b ldrb r3, [r3, #0]
|
||
8004f32: b2db uxtb r3, r3
|
||
8004f34: f023 0301 bic.w r3, r3, #1
|
||
8004f38: b2da uxtb r2, r3
|
||
8004f3a: 4b06 ldr r3, [pc, #24] ; (8004f54 <SD_disk_initialize+0x1d8>)
|
||
8004f3c: 701a strb r2, [r3, #0]
|
||
8004f3e: e001 b.n 8004f44 <SD_disk_initialize+0x1c8>
|
||
}
|
||
else
|
||
{
|
||
/* Initialization failed */
|
||
SD_PowerOff();
|
||
8004f40: f7ff fe24 bl 8004b8c <SD_PowerOff>
|
||
}
|
||
|
||
return Stat;
|
||
8004f44: 4b03 ldr r3, [pc, #12] ; (8004f54 <SD_disk_initialize+0x1d8>)
|
||
8004f46: 781b ldrb r3, [r3, #0]
|
||
8004f48: b2db uxtb r3, r3
|
||
}
|
||
8004f4a: 4618 mov r0, r3
|
||
8004f4c: 3714 adds r7, #20
|
||
8004f4e: 46bd mov sp, r7
|
||
8004f50: bd90 pop {r4, r7, pc}
|
||
8004f52: bf00 nop
|
||
8004f54: 20000020 .word 0x20000020
|
||
8004f58: 20000820 .word 0x20000820
|
||
8004f5c: 000186a0 .word 0x000186a0
|
||
8004f60: 200000d8 .word 0x200000d8
|
||
|
||
08004f64 <SD_disk_status>:
|
||
|
||
|
||
DSTATUS SD_disk_status(BYTE drv)
|
||
{
|
||
8004f64: b480 push {r7}
|
||
8004f66: b083 sub sp, #12
|
||
8004f68: af00 add r7, sp, #0
|
||
8004f6a: 4603 mov r3, r0
|
||
8004f6c: 71fb strb r3, [r7, #7]
|
||
if (drv)
|
||
8004f6e: 79fb ldrb r3, [r7, #7]
|
||
8004f70: 2b00 cmp r3, #0
|
||
8004f72: d001 beq.n 8004f78 <SD_disk_status+0x14>
|
||
return STA_NOINIT;
|
||
8004f74: 2301 movs r3, #1
|
||
8004f76: e002 b.n 8004f7e <SD_disk_status+0x1a>
|
||
|
||
return Stat;
|
||
8004f78: 4b03 ldr r3, [pc, #12] ; (8004f88 <SD_disk_status+0x24>)
|
||
8004f7a: 781b ldrb r3, [r3, #0]
|
||
8004f7c: b2db uxtb r3, r3
|
||
}
|
||
8004f7e: 4618 mov r0, r3
|
||
8004f80: 370c adds r7, #12
|
||
8004f82: 46bd mov sp, r7
|
||
8004f84: bc80 pop {r7}
|
||
8004f86: 4770 bx lr
|
||
8004f88: 20000020 .word 0x20000020
|
||
|
||
08004f8c <SD_disk_read>:
|
||
|
||
|
||
DRESULT SD_disk_read(BYTE pdrv, BYTE* buff, DWORD sector, UINT count)
|
||
{
|
||
8004f8c: b580 push {r7, lr}
|
||
8004f8e: b084 sub sp, #16
|
||
8004f90: af00 add r7, sp, #0
|
||
8004f92: 60b9 str r1, [r7, #8]
|
||
8004f94: 607a str r2, [r7, #4]
|
||
8004f96: 603b str r3, [r7, #0]
|
||
8004f98: 4603 mov r3, r0
|
||
8004f9a: 73fb strb r3, [r7, #15]
|
||
if (pdrv || !count)
|
||
8004f9c: 7bfb ldrb r3, [r7, #15]
|
||
8004f9e: 2b00 cmp r3, #0
|
||
8004fa0: d102 bne.n 8004fa8 <SD_disk_read+0x1c>
|
||
8004fa2: 683b ldr r3, [r7, #0]
|
||
8004fa4: 2b00 cmp r3, #0
|
||
8004fa6: d101 bne.n 8004fac <SD_disk_read+0x20>
|
||
return RES_PARERR;
|
||
8004fa8: 2304 movs r3, #4
|
||
8004faa: e051 b.n 8005050 <SD_disk_read+0xc4>
|
||
|
||
if (Stat & STA_NOINIT)
|
||
8004fac: 4b2a ldr r3, [pc, #168] ; (8005058 <SD_disk_read+0xcc>)
|
||
8004fae: 781b ldrb r3, [r3, #0]
|
||
8004fb0: b2db uxtb r3, r3
|
||
8004fb2: f003 0301 and.w r3, r3, #1
|
||
8004fb6: 2b00 cmp r3, #0
|
||
8004fb8: d001 beq.n 8004fbe <SD_disk_read+0x32>
|
||
return RES_NOTRDY;
|
||
8004fba: 2303 movs r3, #3
|
||
8004fbc: e048 b.n 8005050 <SD_disk_read+0xc4>
|
||
|
||
if (!(CardType & 4))
|
||
8004fbe: 4b27 ldr r3, [pc, #156] ; (800505c <SD_disk_read+0xd0>)
|
||
8004fc0: 781b ldrb r3, [r3, #0]
|
||
8004fc2: f003 0304 and.w r3, r3, #4
|
||
8004fc6: 2b00 cmp r3, #0
|
||
8004fc8: d102 bne.n 8004fd0 <SD_disk_read+0x44>
|
||
sector *= 512;
|
||
8004fca: 687b ldr r3, [r7, #4]
|
||
8004fcc: 025b lsls r3, r3, #9
|
||
8004fce: 607b str r3, [r7, #4]
|
||
|
||
SELECT();
|
||
8004fd0: f7ff fd12 bl 80049f8 <SELECT>
|
||
|
||
if (count == 1)
|
||
8004fd4: 683b ldr r3, [r7, #0]
|
||
8004fd6: 2b01 cmp r3, #1
|
||
8004fd8: d111 bne.n 8004ffe <SD_disk_read+0x72>
|
||
{
|
||
|
||
if ((SD_SendCmd(CMD17, sector) == 0) && SD_RxDataBlock(buff, 512))
|
||
8004fda: 6879 ldr r1, [r7, #4]
|
||
8004fdc: 2051 movs r0, #81 ; 0x51
|
||
8004fde: f7ff fe7b bl 8004cd8 <SD_SendCmd>
|
||
8004fe2: 4603 mov r3, r0
|
||
8004fe4: 2b00 cmp r3, #0
|
||
8004fe6: d129 bne.n 800503c <SD_disk_read+0xb0>
|
||
8004fe8: f44f 7100 mov.w r1, #512 ; 0x200
|
||
8004fec: 68b8 ldr r0, [r7, #8]
|
||
8004fee: f7ff fde3 bl 8004bb8 <SD_RxDataBlock>
|
||
8004ff2: 4603 mov r3, r0
|
||
8004ff4: 2b00 cmp r3, #0
|
||
8004ff6: d021 beq.n 800503c <SD_disk_read+0xb0>
|
||
count = 0;
|
||
8004ff8: 2300 movs r3, #0
|
||
8004ffa: 603b str r3, [r7, #0]
|
||
8004ffc: e01e b.n 800503c <SD_disk_read+0xb0>
|
||
}
|
||
else
|
||
{
|
||
|
||
if (SD_SendCmd(CMD18, sector) == 0)
|
||
8004ffe: 6879 ldr r1, [r7, #4]
|
||
8005000: 2052 movs r0, #82 ; 0x52
|
||
8005002: f7ff fe69 bl 8004cd8 <SD_SendCmd>
|
||
8005006: 4603 mov r3, r0
|
||
8005008: 2b00 cmp r3, #0
|
||
800500a: d117 bne.n 800503c <SD_disk_read+0xb0>
|
||
{
|
||
do {
|
||
if (!SD_RxDataBlock(buff, 512))
|
||
800500c: f44f 7100 mov.w r1, #512 ; 0x200
|
||
8005010: 68b8 ldr r0, [r7, #8]
|
||
8005012: f7ff fdd1 bl 8004bb8 <SD_RxDataBlock>
|
||
8005016: 4603 mov r3, r0
|
||
8005018: 2b00 cmp r3, #0
|
||
800501a: d00a beq.n 8005032 <SD_disk_read+0xa6>
|
||
break;
|
||
|
||
buff += 512;
|
||
800501c: 68bb ldr r3, [r7, #8]
|
||
800501e: f503 7300 add.w r3, r3, #512 ; 0x200
|
||
8005022: 60bb str r3, [r7, #8]
|
||
} while (--count);
|
||
8005024: 683b ldr r3, [r7, #0]
|
||
8005026: 3b01 subs r3, #1
|
||
8005028: 603b str r3, [r7, #0]
|
||
800502a: 683b ldr r3, [r7, #0]
|
||
800502c: 2b00 cmp r3, #0
|
||
800502e: d1ed bne.n 800500c <SD_disk_read+0x80>
|
||
8005030: e000 b.n 8005034 <SD_disk_read+0xa8>
|
||
break;
|
||
8005032: bf00 nop
|
||
|
||
|
||
SD_SendCmd(CMD12, 0);
|
||
8005034: 2100 movs r1, #0
|
||
8005036: 204c movs r0, #76 ; 0x4c
|
||
8005038: f7ff fe4e bl 8004cd8 <SD_SendCmd>
|
||
}
|
||
}
|
||
|
||
DESELECT();
|
||
800503c: f7ff fce8 bl 8004a10 <DESELECT>
|
||
SPI_RxByte();
|
||
8005040: f7ff fd0c bl 8004a5c <SPI_RxByte>
|
||
|
||
return count ? RES_ERROR : RES_OK;
|
||
8005044: 683b ldr r3, [r7, #0]
|
||
8005046: 2b00 cmp r3, #0
|
||
8005048: bf14 ite ne
|
||
800504a: 2301 movne r3, #1
|
||
800504c: 2300 moveq r3, #0
|
||
800504e: b2db uxtb r3, r3
|
||
}
|
||
8005050: 4618 mov r0, r3
|
||
8005052: 3710 adds r7, #16
|
||
8005054: 46bd mov sp, r7
|
||
8005056: bd80 pop {r7, pc}
|
||
8005058: 20000020 .word 0x20000020
|
||
800505c: 200000d8 .word 0x200000d8
|
||
|
||
08005060 <SD_disk_write>:
|
||
|
||
|
||
#if _READONLY == 0
|
||
DRESULT SD_disk_write(BYTE pdrv, const BYTE* buff, DWORD sector, UINT count)
|
||
{
|
||
8005060: b580 push {r7, lr}
|
||
8005062: b084 sub sp, #16
|
||
8005064: af00 add r7, sp, #0
|
||
8005066: 60b9 str r1, [r7, #8]
|
||
8005068: 607a str r2, [r7, #4]
|
||
800506a: 603b str r3, [r7, #0]
|
||
800506c: 4603 mov r3, r0
|
||
800506e: 73fb strb r3, [r7, #15]
|
||
if (pdrv || !count)
|
||
8005070: 7bfb ldrb r3, [r7, #15]
|
||
8005072: 2b00 cmp r3, #0
|
||
8005074: d102 bne.n 800507c <SD_disk_write+0x1c>
|
||
8005076: 683b ldr r3, [r7, #0]
|
||
8005078: 2b00 cmp r3, #0
|
||
800507a: d101 bne.n 8005080 <SD_disk_write+0x20>
|
||
return RES_PARERR;
|
||
800507c: 2304 movs r3, #4
|
||
800507e: e06b b.n 8005158 <SD_disk_write+0xf8>
|
||
|
||
if (Stat & STA_NOINIT)
|
||
8005080: 4b37 ldr r3, [pc, #220] ; (8005160 <SD_disk_write+0x100>)
|
||
8005082: 781b ldrb r3, [r3, #0]
|
||
8005084: b2db uxtb r3, r3
|
||
8005086: f003 0301 and.w r3, r3, #1
|
||
800508a: 2b00 cmp r3, #0
|
||
800508c: d001 beq.n 8005092 <SD_disk_write+0x32>
|
||
return RES_NOTRDY;
|
||
800508e: 2303 movs r3, #3
|
||
8005090: e062 b.n 8005158 <SD_disk_write+0xf8>
|
||
|
||
if (Stat & STA_PROTECT)
|
||
8005092: 4b33 ldr r3, [pc, #204] ; (8005160 <SD_disk_write+0x100>)
|
||
8005094: 781b ldrb r3, [r3, #0]
|
||
8005096: b2db uxtb r3, r3
|
||
8005098: f003 0304 and.w r3, r3, #4
|
||
800509c: 2b00 cmp r3, #0
|
||
800509e: d001 beq.n 80050a4 <SD_disk_write+0x44>
|
||
return RES_WRPRT;
|
||
80050a0: 2302 movs r3, #2
|
||
80050a2: e059 b.n 8005158 <SD_disk_write+0xf8>
|
||
|
||
if (!(CardType & 4))
|
||
80050a4: 4b2f ldr r3, [pc, #188] ; (8005164 <SD_disk_write+0x104>)
|
||
80050a6: 781b ldrb r3, [r3, #0]
|
||
80050a8: f003 0304 and.w r3, r3, #4
|
||
80050ac: 2b00 cmp r3, #0
|
||
80050ae: d102 bne.n 80050b6 <SD_disk_write+0x56>
|
||
sector *= 512;
|
||
80050b0: 687b ldr r3, [r7, #4]
|
||
80050b2: 025b lsls r3, r3, #9
|
||
80050b4: 607b str r3, [r7, #4]
|
||
|
||
SELECT();
|
||
80050b6: f7ff fc9f bl 80049f8 <SELECT>
|
||
|
||
if (count == 1)
|
||
80050ba: 683b ldr r3, [r7, #0]
|
||
80050bc: 2b01 cmp r3, #1
|
||
80050be: d110 bne.n 80050e2 <SD_disk_write+0x82>
|
||
{
|
||
|
||
if ((SD_SendCmd(CMD24, sector) == 0) && SD_TxDataBlock(buff, 0xFE))
|
||
80050c0: 6879 ldr r1, [r7, #4]
|
||
80050c2: 2058 movs r0, #88 ; 0x58
|
||
80050c4: f7ff fe08 bl 8004cd8 <SD_SendCmd>
|
||
80050c8: 4603 mov r3, r0
|
||
80050ca: 2b00 cmp r3, #0
|
||
80050cc: d13a bne.n 8005144 <SD_disk_write+0xe4>
|
||
80050ce: 21fe movs r1, #254 ; 0xfe
|
||
80050d0: 68b8 ldr r0, [r7, #8]
|
||
80050d2: f7ff fdad bl 8004c30 <SD_TxDataBlock>
|
||
80050d6: 4603 mov r3, r0
|
||
80050d8: 2b00 cmp r3, #0
|
||
80050da: d033 beq.n 8005144 <SD_disk_write+0xe4>
|
||
count = 0;
|
||
80050dc: 2300 movs r3, #0
|
||
80050de: 603b str r3, [r7, #0]
|
||
80050e0: e030 b.n 8005144 <SD_disk_write+0xe4>
|
||
}
|
||
else
|
||
{
|
||
|
||
if (CardType & 2)
|
||
80050e2: 4b20 ldr r3, [pc, #128] ; (8005164 <SD_disk_write+0x104>)
|
||
80050e4: 781b ldrb r3, [r3, #0]
|
||
80050e6: f003 0302 and.w r3, r3, #2
|
||
80050ea: 2b00 cmp r3, #0
|
||
80050ec: d007 beq.n 80050fe <SD_disk_write+0x9e>
|
||
{
|
||
SD_SendCmd(CMD55, 0);
|
||
80050ee: 2100 movs r1, #0
|
||
80050f0: 2077 movs r0, #119 ; 0x77
|
||
80050f2: f7ff fdf1 bl 8004cd8 <SD_SendCmd>
|
||
SD_SendCmd(CMD23, count); /* ACMD23 */
|
||
80050f6: 6839 ldr r1, [r7, #0]
|
||
80050f8: 2057 movs r0, #87 ; 0x57
|
||
80050fa: f7ff fded bl 8004cd8 <SD_SendCmd>
|
||
}
|
||
|
||
if (SD_SendCmd(CMD25, sector) == 0)
|
||
80050fe: 6879 ldr r1, [r7, #4]
|
||
8005100: 2059 movs r0, #89 ; 0x59
|
||
8005102: f7ff fde9 bl 8004cd8 <SD_SendCmd>
|
||
8005106: 4603 mov r3, r0
|
||
8005108: 2b00 cmp r3, #0
|
||
800510a: d11b bne.n 8005144 <SD_disk_write+0xe4>
|
||
{
|
||
do {
|
||
if(!SD_TxDataBlock(buff, 0xFC))
|
||
800510c: 21fc movs r1, #252 ; 0xfc
|
||
800510e: 68b8 ldr r0, [r7, #8]
|
||
8005110: f7ff fd8e bl 8004c30 <SD_TxDataBlock>
|
||
8005114: 4603 mov r3, r0
|
||
8005116: 2b00 cmp r3, #0
|
||
8005118: d00a beq.n 8005130 <SD_disk_write+0xd0>
|
||
break;
|
||
|
||
buff += 512;
|
||
800511a: 68bb ldr r3, [r7, #8]
|
||
800511c: f503 7300 add.w r3, r3, #512 ; 0x200
|
||
8005120: 60bb str r3, [r7, #8]
|
||
} while (--count);
|
||
8005122: 683b ldr r3, [r7, #0]
|
||
8005124: 3b01 subs r3, #1
|
||
8005126: 603b str r3, [r7, #0]
|
||
8005128: 683b ldr r3, [r7, #0]
|
||
800512a: 2b00 cmp r3, #0
|
||
800512c: d1ee bne.n 800510c <SD_disk_write+0xac>
|
||
800512e: e000 b.n 8005132 <SD_disk_write+0xd2>
|
||
break;
|
||
8005130: bf00 nop
|
||
|
||
if(!SD_TxDataBlock(0, 0xFD))
|
||
8005132: 21fd movs r1, #253 ; 0xfd
|
||
8005134: 2000 movs r0, #0
|
||
8005136: f7ff fd7b bl 8004c30 <SD_TxDataBlock>
|
||
800513a: 4603 mov r3, r0
|
||
800513c: 2b00 cmp r3, #0
|
||
800513e: d101 bne.n 8005144 <SD_disk_write+0xe4>
|
||
{
|
||
count = 1;
|
||
8005140: 2301 movs r3, #1
|
||
8005142: 603b str r3, [r7, #0]
|
||
}
|
||
}
|
||
}
|
||
|
||
DESELECT();
|
||
8005144: f7ff fc64 bl 8004a10 <DESELECT>
|
||
SPI_RxByte();
|
||
8005148: f7ff fc88 bl 8004a5c <SPI_RxByte>
|
||
|
||
return count ? RES_ERROR : RES_OK;
|
||
800514c: 683b ldr r3, [r7, #0]
|
||
800514e: 2b00 cmp r3, #0
|
||
8005150: bf14 ite ne
|
||
8005152: 2301 movne r3, #1
|
||
8005154: 2300 moveq r3, #0
|
||
8005156: b2db uxtb r3, r3
|
||
}
|
||
8005158: 4618 mov r0, r3
|
||
800515a: 3710 adds r7, #16
|
||
800515c: 46bd mov sp, r7
|
||
800515e: bd80 pop {r7, pc}
|
||
8005160: 20000020 .word 0x20000020
|
||
8005164: 200000d8 .word 0x200000d8
|
||
|
||
08005168 <SD_disk_ioctl>:
|
||
#endif /* _READONLY */
|
||
|
||
|
||
DRESULT SD_disk_ioctl(BYTE drv, BYTE ctrl, void *buff)
|
||
{
|
||
8005168: b590 push {r4, r7, lr}
|
||
800516a: b08b sub sp, #44 ; 0x2c
|
||
800516c: af00 add r7, sp, #0
|
||
800516e: 4603 mov r3, r0
|
||
8005170: 603a str r2, [r7, #0]
|
||
8005172: 71fb strb r3, [r7, #7]
|
||
8005174: 460b mov r3, r1
|
||
8005176: 71bb strb r3, [r7, #6]
|
||
DRESULT res;
|
||
BYTE n, csd[16], *ptr = buff;
|
||
8005178: 683b ldr r3, [r7, #0]
|
||
800517a: 623b str r3, [r7, #32]
|
||
WORD csize;
|
||
|
||
if (drv)
|
||
800517c: 79fb ldrb r3, [r7, #7]
|
||
800517e: 2b00 cmp r3, #0
|
||
8005180: d001 beq.n 8005186 <SD_disk_ioctl+0x1e>
|
||
return RES_PARERR;
|
||
8005182: 2304 movs r3, #4
|
||
8005184: e11b b.n 80053be <SD_disk_ioctl+0x256>
|
||
|
||
res = RES_ERROR;
|
||
8005186: 2301 movs r3, #1
|
||
8005188: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
|
||
if (ctrl == CTRL_POWER)
|
||
800518c: 79bb ldrb r3, [r7, #6]
|
||
800518e: 2b05 cmp r3, #5
|
||
8005190: d129 bne.n 80051e6 <SD_disk_ioctl+0x7e>
|
||
{
|
||
switch (*ptr)
|
||
8005192: 6a3b ldr r3, [r7, #32]
|
||
8005194: 781b ldrb r3, [r3, #0]
|
||
8005196: 2b02 cmp r3, #2
|
||
8005198: d017 beq.n 80051ca <SD_disk_ioctl+0x62>
|
||
800519a: 2b02 cmp r3, #2
|
||
800519c: dc1f bgt.n 80051de <SD_disk_ioctl+0x76>
|
||
800519e: 2b00 cmp r3, #0
|
||
80051a0: d002 beq.n 80051a8 <SD_disk_ioctl+0x40>
|
||
80051a2: 2b01 cmp r3, #1
|
||
80051a4: d00b beq.n 80051be <SD_disk_ioctl+0x56>
|
||
80051a6: e01a b.n 80051de <SD_disk_ioctl+0x76>
|
||
{
|
||
case 0:
|
||
if (SD_CheckPower())
|
||
80051a8: f7ff fcfc bl 8004ba4 <SD_CheckPower>
|
||
80051ac: 4603 mov r3, r0
|
||
80051ae: 2b00 cmp r3, #0
|
||
80051b0: d001 beq.n 80051b6 <SD_disk_ioctl+0x4e>
|
||
SD_PowerOff(); /* Power Off */
|
||
80051b2: f7ff fceb bl 8004b8c <SD_PowerOff>
|
||
res = RES_OK;
|
||
80051b6: 2300 movs r3, #0
|
||
80051b8: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
break;
|
||
80051bc: e0fd b.n 80053ba <SD_disk_ioctl+0x252>
|
||
case 1:
|
||
SD_PowerOn(); /* Power On */
|
||
80051be: f7ff fc99 bl 8004af4 <SD_PowerOn>
|
||
res = RES_OK;
|
||
80051c2: 2300 movs r3, #0
|
||
80051c4: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
break;
|
||
80051c8: e0f7 b.n 80053ba <SD_disk_ioctl+0x252>
|
||
case 2:
|
||
*(ptr + 1) = (BYTE) SD_CheckPower();
|
||
80051ca: 6a3b ldr r3, [r7, #32]
|
||
80051cc: 1c5c adds r4, r3, #1
|
||
80051ce: f7ff fce9 bl 8004ba4 <SD_CheckPower>
|
||
80051d2: 4603 mov r3, r0
|
||
80051d4: 7023 strb r3, [r4, #0]
|
||
res = RES_OK; /* Power Check */
|
||
80051d6: 2300 movs r3, #0
|
||
80051d8: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
break;
|
||
80051dc: e0ed b.n 80053ba <SD_disk_ioctl+0x252>
|
||
default:
|
||
res = RES_PARERR;
|
||
80051de: 2304 movs r3, #4
|
||
80051e0: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
80051e4: e0e9 b.n 80053ba <SD_disk_ioctl+0x252>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
if (Stat & STA_NOINIT)
|
||
80051e6: 4b78 ldr r3, [pc, #480] ; (80053c8 <SD_disk_ioctl+0x260>)
|
||
80051e8: 781b ldrb r3, [r3, #0]
|
||
80051ea: b2db uxtb r3, r3
|
||
80051ec: f003 0301 and.w r3, r3, #1
|
||
80051f0: 2b00 cmp r3, #0
|
||
80051f2: d001 beq.n 80051f8 <SD_disk_ioctl+0x90>
|
||
return RES_NOTRDY;
|
||
80051f4: 2303 movs r3, #3
|
||
80051f6: e0e2 b.n 80053be <SD_disk_ioctl+0x256>
|
||
|
||
SELECT();
|
||
80051f8: f7ff fbfe bl 80049f8 <SELECT>
|
||
|
||
switch (ctrl)
|
||
80051fc: 79bb ldrb r3, [r7, #6]
|
||
80051fe: 2b0d cmp r3, #13
|
||
8005200: f200 80cc bhi.w 800539c <SD_disk_ioctl+0x234>
|
||
8005204: a201 add r2, pc, #4 ; (adr r2, 800520c <SD_disk_ioctl+0xa4>)
|
||
8005206: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
800520a: bf00 nop
|
||
800520c: 08005307 .word 0x08005307
|
||
8005210: 08005245 .word 0x08005245
|
||
8005214: 080052f7 .word 0x080052f7
|
||
8005218: 0800539d .word 0x0800539d
|
||
800521c: 0800539d .word 0x0800539d
|
||
8005220: 0800539d .word 0x0800539d
|
||
8005224: 0800539d .word 0x0800539d
|
||
8005228: 0800539d .word 0x0800539d
|
||
800522c: 0800539d .word 0x0800539d
|
||
8005230: 0800539d .word 0x0800539d
|
||
8005234: 0800539d .word 0x0800539d
|
||
8005238: 08005319 .word 0x08005319
|
||
800523c: 0800533d .word 0x0800533d
|
||
8005240: 08005361 .word 0x08005361
|
||
{
|
||
case GET_SECTOR_COUNT:
|
||
|
||
if ((SD_SendCmd(CMD9, 0) == 0) && SD_RxDataBlock(csd, 16))
|
||
8005244: 2100 movs r1, #0
|
||
8005246: 2049 movs r0, #73 ; 0x49
|
||
8005248: f7ff fd46 bl 8004cd8 <SD_SendCmd>
|
||
800524c: 4603 mov r3, r0
|
||
800524e: 2b00 cmp r3, #0
|
||
8005250: f040 80a8 bne.w 80053a4 <SD_disk_ioctl+0x23c>
|
||
8005254: f107 030c add.w r3, r7, #12
|
||
8005258: 2110 movs r1, #16
|
||
800525a: 4618 mov r0, r3
|
||
800525c: f7ff fcac bl 8004bb8 <SD_RxDataBlock>
|
||
8005260: 4603 mov r3, r0
|
||
8005262: 2b00 cmp r3, #0
|
||
8005264: f000 809e beq.w 80053a4 <SD_disk_ioctl+0x23c>
|
||
{
|
||
if ((csd[0] >> 6) == 1)
|
||
8005268: 7b3b ldrb r3, [r7, #12]
|
||
800526a: 099b lsrs r3, r3, #6
|
||
800526c: b2db uxtb r3, r3
|
||
800526e: 2b01 cmp r3, #1
|
||
8005270: d10e bne.n 8005290 <SD_disk_ioctl+0x128>
|
||
{
|
||
/* SDC ver 2.00 */
|
||
csize = csd[9] + ((WORD) csd[8] << 8) + 1;
|
||
8005272: 7d7b ldrb r3, [r7, #21]
|
||
8005274: b29a uxth r2, r3
|
||
8005276: 7d3b ldrb r3, [r7, #20]
|
||
8005278: b29b uxth r3, r3
|
||
800527a: 021b lsls r3, r3, #8
|
||
800527c: b29b uxth r3, r3
|
||
800527e: 4413 add r3, r2
|
||
8005280: b29b uxth r3, r3
|
||
8005282: 3301 adds r3, #1
|
||
8005284: 83fb strh r3, [r7, #30]
|
||
*(DWORD*) buff = (DWORD) csize << 10;
|
||
8005286: 8bfb ldrh r3, [r7, #30]
|
||
8005288: 029a lsls r2, r3, #10
|
||
800528a: 683b ldr r3, [r7, #0]
|
||
800528c: 601a str r2, [r3, #0]
|
||
800528e: e02e b.n 80052ee <SD_disk_ioctl+0x186>
|
||
}
|
||
else
|
||
{
|
||
/* MMC or SDC ver 1.XX */
|
||
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
|
||
8005290: 7c7b ldrb r3, [r7, #17]
|
||
8005292: f003 030f and.w r3, r3, #15
|
||
8005296: b2da uxtb r2, r3
|
||
8005298: 7dbb ldrb r3, [r7, #22]
|
||
800529a: 09db lsrs r3, r3, #7
|
||
800529c: b2db uxtb r3, r3
|
||
800529e: 4413 add r3, r2
|
||
80052a0: b2da uxtb r2, r3
|
||
80052a2: 7d7b ldrb r3, [r7, #21]
|
||
80052a4: 005b lsls r3, r3, #1
|
||
80052a6: b2db uxtb r3, r3
|
||
80052a8: f003 0306 and.w r3, r3, #6
|
||
80052ac: b2db uxtb r3, r3
|
||
80052ae: 4413 add r3, r2
|
||
80052b0: b2db uxtb r3, r3
|
||
80052b2: 3302 adds r3, #2
|
||
80052b4: f887 3026 strb.w r3, [r7, #38] ; 0x26
|
||
csize = (csd[8] >> 6) + ((WORD) csd[7] << 2) + ((WORD) (csd[6] & 3) << 10) + 1;
|
||
80052b8: 7d3b ldrb r3, [r7, #20]
|
||
80052ba: 099b lsrs r3, r3, #6
|
||
80052bc: b2db uxtb r3, r3
|
||
80052be: b29a uxth r2, r3
|
||
80052c0: 7cfb ldrb r3, [r7, #19]
|
||
80052c2: b29b uxth r3, r3
|
||
80052c4: 009b lsls r3, r3, #2
|
||
80052c6: b29b uxth r3, r3
|
||
80052c8: 4413 add r3, r2
|
||
80052ca: b29a uxth r2, r3
|
||
80052cc: 7cbb ldrb r3, [r7, #18]
|
||
80052ce: 029b lsls r3, r3, #10
|
||
80052d0: b29b uxth r3, r3
|
||
80052d2: f403 6340 and.w r3, r3, #3072 ; 0xc00
|
||
80052d6: b29b uxth r3, r3
|
||
80052d8: 4413 add r3, r2
|
||
80052da: b29b uxth r3, r3
|
||
80052dc: 3301 adds r3, #1
|
||
80052de: 83fb strh r3, [r7, #30]
|
||
*(DWORD*) buff = (DWORD) csize << (n - 9);
|
||
80052e0: 8bfa ldrh r2, [r7, #30]
|
||
80052e2: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
|
||
80052e6: 3b09 subs r3, #9
|
||
80052e8: 409a lsls r2, r3
|
||
80052ea: 683b ldr r3, [r7, #0]
|
||
80052ec: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
res = RES_OK;
|
||
80052ee: 2300 movs r3, #0
|
||
80052f0: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
}
|
||
break;
|
||
80052f4: e056 b.n 80053a4 <SD_disk_ioctl+0x23c>
|
||
|
||
case GET_SECTOR_SIZE:
|
||
|
||
*(WORD*) buff = 512;
|
||
80052f6: 683b ldr r3, [r7, #0]
|
||
80052f8: f44f 7200 mov.w r2, #512 ; 0x200
|
||
80052fc: 801a strh r2, [r3, #0]
|
||
res = RES_OK;
|
||
80052fe: 2300 movs r3, #0
|
||
8005300: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
break;
|
||
8005304: e055 b.n 80053b2 <SD_disk_ioctl+0x24a>
|
||
|
||
case CTRL_SYNC:
|
||
|
||
if (SD_ReadyWait() == 0xFF)
|
||
8005306: f7ff fbd5 bl 8004ab4 <SD_ReadyWait>
|
||
800530a: 4603 mov r3, r0
|
||
800530c: 2bff cmp r3, #255 ; 0xff
|
||
800530e: d14b bne.n 80053a8 <SD_disk_ioctl+0x240>
|
||
res = RES_OK;
|
||
8005310: 2300 movs r3, #0
|
||
8005312: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
break;
|
||
8005316: e047 b.n 80053a8 <SD_disk_ioctl+0x240>
|
||
|
||
case MMC_GET_CSD:
|
||
|
||
if (SD_SendCmd(CMD9, 0) == 0 && SD_RxDataBlock(ptr, 16))
|
||
8005318: 2100 movs r1, #0
|
||
800531a: 2049 movs r0, #73 ; 0x49
|
||
800531c: f7ff fcdc bl 8004cd8 <SD_SendCmd>
|
||
8005320: 4603 mov r3, r0
|
||
8005322: 2b00 cmp r3, #0
|
||
8005324: d142 bne.n 80053ac <SD_disk_ioctl+0x244>
|
||
8005326: 2110 movs r1, #16
|
||
8005328: 6a38 ldr r0, [r7, #32]
|
||
800532a: f7ff fc45 bl 8004bb8 <SD_RxDataBlock>
|
||
800532e: 4603 mov r3, r0
|
||
8005330: 2b00 cmp r3, #0
|
||
8005332: d03b beq.n 80053ac <SD_disk_ioctl+0x244>
|
||
res = RES_OK;
|
||
8005334: 2300 movs r3, #0
|
||
8005336: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
break;
|
||
800533a: e037 b.n 80053ac <SD_disk_ioctl+0x244>
|
||
|
||
case MMC_GET_CID:
|
||
|
||
if (SD_SendCmd(CMD10, 0) == 0 && SD_RxDataBlock(ptr, 16))
|
||
800533c: 2100 movs r1, #0
|
||
800533e: 204a movs r0, #74 ; 0x4a
|
||
8005340: f7ff fcca bl 8004cd8 <SD_SendCmd>
|
||
8005344: 4603 mov r3, r0
|
||
8005346: 2b00 cmp r3, #0
|
||
8005348: d132 bne.n 80053b0 <SD_disk_ioctl+0x248>
|
||
800534a: 2110 movs r1, #16
|
||
800534c: 6a38 ldr r0, [r7, #32]
|
||
800534e: f7ff fc33 bl 8004bb8 <SD_RxDataBlock>
|
||
8005352: 4603 mov r3, r0
|
||
8005354: 2b00 cmp r3, #0
|
||
8005356: d02b beq.n 80053b0 <SD_disk_ioctl+0x248>
|
||
res = RES_OK;
|
||
8005358: 2300 movs r3, #0
|
||
800535a: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
break;
|
||
800535e: e027 b.n 80053b0 <SD_disk_ioctl+0x248>
|
||
|
||
case MMC_GET_OCR:
|
||
|
||
if (SD_SendCmd(CMD58, 0) == 0)
|
||
8005360: 2100 movs r1, #0
|
||
8005362: 207a movs r0, #122 ; 0x7a
|
||
8005364: f7ff fcb8 bl 8004cd8 <SD_SendCmd>
|
||
8005368: 4603 mov r3, r0
|
||
800536a: 2b00 cmp r3, #0
|
||
800536c: d116 bne.n 800539c <SD_disk_ioctl+0x234>
|
||
{
|
||
for (n = 0; n < 4; n++)
|
||
800536e: 2300 movs r3, #0
|
||
8005370: f887 3026 strb.w r3, [r7, #38] ; 0x26
|
||
8005374: e00b b.n 800538e <SD_disk_ioctl+0x226>
|
||
{
|
||
*ptr++ = SPI_RxByte();
|
||
8005376: 6a3c ldr r4, [r7, #32]
|
||
8005378: 1c63 adds r3, r4, #1
|
||
800537a: 623b str r3, [r7, #32]
|
||
800537c: f7ff fb6e bl 8004a5c <SPI_RxByte>
|
||
8005380: 4603 mov r3, r0
|
||
8005382: 7023 strb r3, [r4, #0]
|
||
for (n = 0; n < 4; n++)
|
||
8005384: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
|
||
8005388: 3301 adds r3, #1
|
||
800538a: f887 3026 strb.w r3, [r7, #38] ; 0x26
|
||
800538e: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
|
||
8005392: 2b03 cmp r3, #3
|
||
8005394: d9ef bls.n 8005376 <SD_disk_ioctl+0x20e>
|
||
}
|
||
|
||
res = RES_OK;
|
||
8005396: 2300 movs r3, #0
|
||
8005398: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
}
|
||
|
||
default:
|
||
res = RES_PARERR;
|
||
800539c: 2304 movs r3, #4
|
||
800539e: f887 3027 strb.w r3, [r7, #39] ; 0x27
|
||
80053a2: e006 b.n 80053b2 <SD_disk_ioctl+0x24a>
|
||
break;
|
||
80053a4: bf00 nop
|
||
80053a6: e004 b.n 80053b2 <SD_disk_ioctl+0x24a>
|
||
break;
|
||
80053a8: bf00 nop
|
||
80053aa: e002 b.n 80053b2 <SD_disk_ioctl+0x24a>
|
||
break;
|
||
80053ac: bf00 nop
|
||
80053ae: e000 b.n 80053b2 <SD_disk_ioctl+0x24a>
|
||
break;
|
||
80053b0: bf00 nop
|
||
}
|
||
|
||
DESELECT();
|
||
80053b2: f7ff fb2d bl 8004a10 <DESELECT>
|
||
SPI_RxByte();
|
||
80053b6: f7ff fb51 bl 8004a5c <SPI_RxByte>
|
||
}
|
||
|
||
return res;
|
||
80053ba: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
|
||
}
|
||
80053be: 4618 mov r0, r3
|
||
80053c0: 372c adds r7, #44 ; 0x2c
|
||
80053c2: 46bd mov sp, r7
|
||
80053c4: bd90 pop {r4, r7, pc}
|
||
80053c6: bf00 nop
|
||
80053c8: 20000020 .word 0x20000020
|
||
|
||
080053cc <LCD_WR_REG>:
|
||
_lcd_dev lcddev; //����LCD��Ҫ����
|
||
//**************************************************���ֿ��ٽӿ�
|
||
//д�Ĵ�������
|
||
//regval:�Ĵ���ֵ
|
||
void LCD_WR_REG(uint16_t regval)
|
||
{
|
||
80053cc: b480 push {r7}
|
||
80053ce: b083 sub sp, #12
|
||
80053d0: af00 add r7, sp, #0
|
||
80053d2: 4603 mov r3, r0
|
||
80053d4: 80fb strh r3, [r7, #6]
|
||
LCD_REG_ADDRESS=regval;//д��Ҫд�ļĴ�������
|
||
80053d6: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
80053da: 88fb ldrh r3, [r7, #6]
|
||
80053dc: 8013 strh r3, [r2, #0]
|
||
}
|
||
80053de: bf00 nop
|
||
80053e0: 370c adds r7, #12
|
||
80053e2: 46bd mov sp, r7
|
||
80053e4: bc80 pop {r7}
|
||
80053e6: 4770 bx lr
|
||
|
||
080053e8 <LCD_WR_DATA>:
|
||
//дLCD����
|
||
//data:Ҫд����ֵ
|
||
void LCD_WR_DATA(uint16_t data)
|
||
{
|
||
80053e8: b480 push {r7}
|
||
80053ea: b083 sub sp, #12
|
||
80053ec: af00 add r7, sp, #0
|
||
80053ee: 4603 mov r3, r0
|
||
80053f0: 80fb strh r3, [r7, #6]
|
||
LCD_DATA_ADDRESS=data;
|
||
80053f2: 4a04 ldr r2, [pc, #16] ; (8005404 <LCD_WR_DATA+0x1c>)
|
||
80053f4: 88fb ldrh r3, [r7, #6]
|
||
80053f6: 8013 strh r3, [r2, #0]
|
||
}
|
||
80053f8: bf00 nop
|
||
80053fa: 370c adds r7, #12
|
||
80053fc: 46bd mov sp, r7
|
||
80053fe: bc80 pop {r7}
|
||
8005400: 4770 bx lr
|
||
8005402: bf00 nop
|
||
8005404: 6c000800 .word 0x6c000800
|
||
|
||
08005408 <LCD_WriteReg>:
|
||
}
|
||
//д�Ĵ���
|
||
//LCD_Reg:�Ĵ�����ַ
|
||
//LCD_RegValue:Ҫд��������
|
||
void LCD_WriteReg(uint16_t LCD_Reg, uint16_t LCD_RegValue)
|
||
{
|
||
8005408: b480 push {r7}
|
||
800540a: b083 sub sp, #12
|
||
800540c: af00 add r7, sp, #0
|
||
800540e: 4603 mov r3, r0
|
||
8005410: 460a mov r2, r1
|
||
8005412: 80fb strh r3, [r7, #6]
|
||
8005414: 4613 mov r3, r2
|
||
8005416: 80bb strh r3, [r7, #4]
|
||
LCD_REG_ADDRESS = LCD_Reg; //д��Ҫд�ļĴ�������
|
||
8005418: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
800541c: 88fb ldrh r3, [r7, #6]
|
||
800541e: 8013 strh r3, [r2, #0]
|
||
LCD_DATA_ADDRESS = LCD_RegValue;//�����
|
||
8005420: 4a03 ldr r2, [pc, #12] ; (8005430 <LCD_WriteReg+0x28>)
|
||
8005422: 88bb ldrh r3, [r7, #4]
|
||
8005424: 8013 strh r3, [r2, #0]
|
||
}
|
||
8005426: bf00 nop
|
||
8005428: 370c adds r7, #12
|
||
800542a: 46bd mov sp, r7
|
||
800542c: bc80 pop {r7}
|
||
800542e: 4770 bx lr
|
||
8005430: 6c000800 .word 0x6c000800
|
||
|
||
08005434 <LCD_ReadReg>:
|
||
//���Ĵ���
|
||
//LCD_Reg:�Ĵ�����ַ
|
||
//����ֵ:����������
|
||
uint16_t LCD_ReadReg(uint16_t LCD_Reg)
|
||
{
|
||
8005434: b480 push {r7}
|
||
8005436: b083 sub sp, #12
|
||
8005438: af00 add r7, sp, #0
|
||
800543a: 4603 mov r3, r0
|
||
800543c: 80fb strh r3, [r7, #6]
|
||
LCD_REG_ADDRESS=LCD_Reg; //д��Ҫ���ļĴ�������
|
||
800543e: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
8005442: 88fb ldrh r3, [r7, #6]
|
||
8005444: 8013 strh r3, [r2, #0]
|
||
//delay_us(5);
|
||
return LCD_DATA_ADDRESS; //���ض�����ֵ
|
||
8005446: 4b04 ldr r3, [pc, #16] ; (8005458 <LCD_ReadReg+0x24>)
|
||
8005448: 881b ldrh r3, [r3, #0]
|
||
800544a: b29b uxth r3, r3
|
||
}
|
||
800544c: 4618 mov r0, r3
|
||
800544e: 370c adds r7, #12
|
||
8005450: 46bd mov sp, r7
|
||
8005452: bc80 pop {r7}
|
||
8005454: 4770 bx lr
|
||
8005456: bf00 nop
|
||
8005458: 6c000800 .word 0x6c000800
|
||
|
||
0800545c <LCD_Scan_Dir>:
|
||
//ע��:�����������ܻ��ܵ��˺������õ�Ӱ��(������9341/6804����������),
|
||
//����,һ������ΪL2R_U2D����,��������Ϊ����ɨ�跽ʽ,���ܵ�����ʾ������.
|
||
//dir:0~7,����8������(���嶨����lcd.h)
|
||
//9320/9325/9328/4531/4535/1505/b505/8989/5408/9341/5310��IC�Ѿ�ʵ�ʲ���
|
||
void LCD_Scan_Dir(uint8_t dir)
|
||
{
|
||
800545c: b580 push {r7, lr}
|
||
800545e: b084 sub sp, #16
|
||
8005460: af00 add r7, sp, #0
|
||
8005462: 4603 mov r3, r0
|
||
8005464: 71fb strb r3, [r7, #7]
|
||
uint16_t regval=0;
|
||
8005466: 2300 movs r3, #0
|
||
8005468: 81fb strh r3, [r7, #14]
|
||
uint8_t dirreg=0;
|
||
800546a: 2300 movs r3, #0
|
||
800546c: 737b strb r3, [r7, #13]
|
||
uint16_t temp;
|
||
if(lcddev.dir==1&&lcddev.id!=0X6804)//����ʱ����6804���ı�ɨ�跽����
|
||
800546e: 4ba8 ldr r3, [pc, #672] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
8005470: 799b ldrb r3, [r3, #6]
|
||
8005472: 2b01 cmp r3, #1
|
||
8005474: d134 bne.n 80054e0 <LCD_Scan_Dir+0x84>
|
||
8005476: 4ba6 ldr r3, [pc, #664] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
8005478: 889b ldrh r3, [r3, #4]
|
||
800547a: f646 0204 movw r2, #26628 ; 0x6804
|
||
800547e: 4293 cmp r3, r2
|
||
8005480: d02e beq.n 80054e0 <LCD_Scan_Dir+0x84>
|
||
{
|
||
switch(dir)//����ת��
|
||
8005482: 79fb ldrb r3, [r7, #7]
|
||
8005484: 2b07 cmp r3, #7
|
||
8005486: d82c bhi.n 80054e2 <LCD_Scan_Dir+0x86>
|
||
8005488: a201 add r2, pc, #4 ; (adr r2, 8005490 <LCD_Scan_Dir+0x34>)
|
||
800548a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
800548e: bf00 nop
|
||
8005490: 080054b1 .word 0x080054b1
|
||
8005494: 080054b7 .word 0x080054b7
|
||
8005498: 080054bd .word 0x080054bd
|
||
800549c: 080054c3 .word 0x080054c3
|
||
80054a0: 080054c9 .word 0x080054c9
|
||
80054a4: 080054cf .word 0x080054cf
|
||
80054a8: 080054d5 .word 0x080054d5
|
||
80054ac: 080054db .word 0x080054db
|
||
{
|
||
case 0:dir=6;break;
|
||
80054b0: 2306 movs r3, #6
|
||
80054b2: 71fb strb r3, [r7, #7]
|
||
80054b4: e015 b.n 80054e2 <LCD_Scan_Dir+0x86>
|
||
case 1:dir=7;break;
|
||
80054b6: 2307 movs r3, #7
|
||
80054b8: 71fb strb r3, [r7, #7]
|
||
80054ba: e012 b.n 80054e2 <LCD_Scan_Dir+0x86>
|
||
case 2:dir=4;break;
|
||
80054bc: 2304 movs r3, #4
|
||
80054be: 71fb strb r3, [r7, #7]
|
||
80054c0: e00f b.n 80054e2 <LCD_Scan_Dir+0x86>
|
||
case 3:dir=5;break;
|
||
80054c2: 2305 movs r3, #5
|
||
80054c4: 71fb strb r3, [r7, #7]
|
||
80054c6: e00c b.n 80054e2 <LCD_Scan_Dir+0x86>
|
||
case 4:dir=1;break;
|
||
80054c8: 2301 movs r3, #1
|
||
80054ca: 71fb strb r3, [r7, #7]
|
||
80054cc: e009 b.n 80054e2 <LCD_Scan_Dir+0x86>
|
||
case 5:dir=0;break;
|
||
80054ce: 2300 movs r3, #0
|
||
80054d0: 71fb strb r3, [r7, #7]
|
||
80054d2: e006 b.n 80054e2 <LCD_Scan_Dir+0x86>
|
||
case 6:dir=3;break;
|
||
80054d4: 2303 movs r3, #3
|
||
80054d6: 71fb strb r3, [r7, #7]
|
||
80054d8: e003 b.n 80054e2 <LCD_Scan_Dir+0x86>
|
||
case 7:dir=2;break;
|
||
80054da: 2302 movs r3, #2
|
||
80054dc: 71fb strb r3, [r7, #7]
|
||
80054de: e000 b.n 80054e2 <LCD_Scan_Dir+0x86>
|
||
}
|
||
}
|
||
80054e0: bf00 nop
|
||
if(lcddev.id==0x9341||lcddev.id==0X6804||lcddev.id==0X5310)//9341/6804/5310,������
|
||
80054e2: 4b8b ldr r3, [pc, #556] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80054e4: 889b ldrh r3, [r3, #4]
|
||
80054e6: f249 3241 movw r2, #37697 ; 0x9341
|
||
80054ea: 4293 cmp r3, r2
|
||
80054ec: d00c beq.n 8005508 <LCD_Scan_Dir+0xac>
|
||
80054ee: 4b88 ldr r3, [pc, #544] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80054f0: 889b ldrh r3, [r3, #4]
|
||
80054f2: f646 0204 movw r2, #26628 ; 0x6804
|
||
80054f6: 4293 cmp r3, r2
|
||
80054f8: d006 beq.n 8005508 <LCD_Scan_Dir+0xac>
|
||
80054fa: 4b85 ldr r3, [pc, #532] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80054fc: 889b ldrh r3, [r3, #4]
|
||
80054fe: f245 3210 movw r2, #21264 ; 0x5310
|
||
8005502: 4293 cmp r3, r2
|
||
8005504: f040 80bb bne.w 800567e <LCD_Scan_Dir+0x222>
|
||
{
|
||
switch(dir)
|
||
8005508: 79fb ldrb r3, [r7, #7]
|
||
800550a: 2b07 cmp r3, #7
|
||
800550c: d835 bhi.n 800557a <LCD_Scan_Dir+0x11e>
|
||
800550e: a201 add r2, pc, #4 ; (adr r2, 8005514 <LCD_Scan_Dir+0xb8>)
|
||
8005510: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
8005514: 0800557b .word 0x0800557b
|
||
8005518: 08005535 .word 0x08005535
|
||
800551c: 0800553f .word 0x0800553f
|
||
8005520: 08005549 .word 0x08005549
|
||
8005524: 08005553 .word 0x08005553
|
||
8005528: 0800555d .word 0x0800555d
|
||
800552c: 08005567 .word 0x08005567
|
||
8005530: 08005571 .word 0x08005571
|
||
{
|
||
case L2R_U2D://��������,���ϵ���
|
||
regval|=(0<<7)|(0<<6)|(0<<5);
|
||
break;
|
||
case L2R_D2U://��������,���µ���
|
||
regval|=(1<<7)|(0<<6)|(0<<5);
|
||
8005534: 89fb ldrh r3, [r7, #14]
|
||
8005536: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
800553a: 81fb strh r3, [r7, #14]
|
||
break;
|
||
800553c: e01d b.n 800557a <LCD_Scan_Dir+0x11e>
|
||
case R2L_U2D://���ҵ���,���ϵ���
|
||
regval|=(0<<7)|(1<<6)|(0<<5);
|
||
800553e: 89fb ldrh r3, [r7, #14]
|
||
8005540: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8005544: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8005546: e018 b.n 800557a <LCD_Scan_Dir+0x11e>
|
||
case R2L_D2U://���ҵ���,���µ���
|
||
regval|=(1<<7)|(1<<6)|(0<<5);
|
||
8005548: 89fb ldrh r3, [r7, #14]
|
||
800554a: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
||
800554e: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8005550: e013 b.n 800557a <LCD_Scan_Dir+0x11e>
|
||
case U2D_L2R://���ϵ���,��������
|
||
regval|=(0<<7)|(0<<6)|(1<<5);
|
||
8005552: 89fb ldrh r3, [r7, #14]
|
||
8005554: f043 0320 orr.w r3, r3, #32
|
||
8005558: 81fb strh r3, [r7, #14]
|
||
break;
|
||
800555a: e00e b.n 800557a <LCD_Scan_Dir+0x11e>
|
||
case U2D_R2L://���ϵ���,���ҵ���
|
||
regval|=(0<<7)|(1<<6)|(1<<5);
|
||
800555c: 89fb ldrh r3, [r7, #14]
|
||
800555e: f043 0360 orr.w r3, r3, #96 ; 0x60
|
||
8005562: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8005564: e009 b.n 800557a <LCD_Scan_Dir+0x11e>
|
||
case D2U_L2R://���µ���,��������
|
||
regval|=(1<<7)|(0<<6)|(1<<5);
|
||
8005566: 89fb ldrh r3, [r7, #14]
|
||
8005568: f043 03a0 orr.w r3, r3, #160 ; 0xa0
|
||
800556c: 81fb strh r3, [r7, #14]
|
||
break;
|
||
800556e: e004 b.n 800557a <LCD_Scan_Dir+0x11e>
|
||
case D2U_R2L://���µ���,���ҵ���
|
||
regval|=(1<<7)|(1<<6)|(1<<5);
|
||
8005570: 89fb ldrh r3, [r7, #14]
|
||
8005572: f043 03e0 orr.w r3, r3, #224 ; 0xe0
|
||
8005576: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8005578: bf00 nop
|
||
}
|
||
dirreg=0X36;
|
||
800557a: 2336 movs r3, #54 ; 0x36
|
||
800557c: 737b strb r3, [r7, #13]
|
||
if(lcddev.id!=0X5310)regval|=0X08;//5310����ҪBGR
|
||
800557e: 4b64 ldr r3, [pc, #400] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
8005580: 889b ldrh r3, [r3, #4]
|
||
8005582: f245 3210 movw r2, #21264 ; 0x5310
|
||
8005586: 4293 cmp r3, r2
|
||
8005588: d003 beq.n 8005592 <LCD_Scan_Dir+0x136>
|
||
800558a: 89fb ldrh r3, [r7, #14]
|
||
800558c: f043 0308 orr.w r3, r3, #8
|
||
8005590: 81fb strh r3, [r7, #14]
|
||
if(lcddev.id==0X6804)regval|=0x02;//6804��BIT6��9341���
|
||
8005592: 4b5f ldr r3, [pc, #380] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
8005594: 889b ldrh r3, [r3, #4]
|
||
8005596: f646 0204 movw r2, #26628 ; 0x6804
|
||
800559a: 4293 cmp r3, r2
|
||
800559c: d103 bne.n 80055a6 <LCD_Scan_Dir+0x14a>
|
||
800559e: 89fb ldrh r3, [r7, #14]
|
||
80055a0: f043 0302 orr.w r3, r3, #2
|
||
80055a4: 81fb strh r3, [r7, #14]
|
||
LCD_WriteReg(dirreg,regval);
|
||
80055a6: 7b7b ldrb r3, [r7, #13]
|
||
80055a8: b29b uxth r3, r3
|
||
80055aa: 89fa ldrh r2, [r7, #14]
|
||
80055ac: 4611 mov r1, r2
|
||
80055ae: 4618 mov r0, r3
|
||
80055b0: f7ff ff2a bl 8005408 <LCD_WriteReg>
|
||
if((regval&0X20)||lcddev.dir==1)
|
||
80055b4: 89fb ldrh r3, [r7, #14]
|
||
80055b6: f003 0320 and.w r3, r3, #32
|
||
80055ba: 2b00 cmp r3, #0
|
||
80055bc: d103 bne.n 80055c6 <LCD_Scan_Dir+0x16a>
|
||
80055be: 4b54 ldr r3, [pc, #336] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80055c0: 799b ldrb r3, [r3, #6]
|
||
80055c2: 2b01 cmp r3, #1
|
||
80055c4: d110 bne.n 80055e8 <LCD_Scan_Dir+0x18c>
|
||
{
|
||
if(lcddev.width<lcddev.height)//����X,Y
|
||
80055c6: 4b52 ldr r3, [pc, #328] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80055c8: 881a ldrh r2, [r3, #0]
|
||
80055ca: 4b51 ldr r3, [pc, #324] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80055cc: 885b ldrh r3, [r3, #2]
|
||
80055ce: 429a cmp r2, r3
|
||
80055d0: d21a bcs.n 8005608 <LCD_Scan_Dir+0x1ac>
|
||
{
|
||
temp=lcddev.width;
|
||
80055d2: 4b4f ldr r3, [pc, #316] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80055d4: 881b ldrh r3, [r3, #0]
|
||
80055d6: 817b strh r3, [r7, #10]
|
||
lcddev.width=lcddev.height;
|
||
80055d8: 4b4d ldr r3, [pc, #308] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80055da: 885a ldrh r2, [r3, #2]
|
||
80055dc: 4b4c ldr r3, [pc, #304] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80055de: 801a strh r2, [r3, #0]
|
||
lcddev.height=temp;
|
||
80055e0: 4a4b ldr r2, [pc, #300] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80055e2: 897b ldrh r3, [r7, #10]
|
||
80055e4: 8053 strh r3, [r2, #2]
|
||
if(lcddev.width<lcddev.height)//����X,Y
|
||
80055e6: e00f b.n 8005608 <LCD_Scan_Dir+0x1ac>
|
||
}
|
||
}else
|
||
{
|
||
if(lcddev.width>lcddev.height)//����X,Y
|
||
80055e8: 4b49 ldr r3, [pc, #292] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80055ea: 881a ldrh r2, [r3, #0]
|
||
80055ec: 4b48 ldr r3, [pc, #288] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80055ee: 885b ldrh r3, [r3, #2]
|
||
80055f0: 429a cmp r2, r3
|
||
80055f2: d909 bls.n 8005608 <LCD_Scan_Dir+0x1ac>
|
||
{
|
||
temp=lcddev.width;
|
||
80055f4: 4b46 ldr r3, [pc, #280] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80055f6: 881b ldrh r3, [r3, #0]
|
||
80055f8: 817b strh r3, [r7, #10]
|
||
lcddev.width=lcddev.height;
|
||
80055fa: 4b45 ldr r3, [pc, #276] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80055fc: 885a ldrh r2, [r3, #2]
|
||
80055fe: 4b44 ldr r3, [pc, #272] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
8005600: 801a strh r2, [r3, #0]
|
||
lcddev.height=temp;
|
||
8005602: 4a43 ldr r2, [pc, #268] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
8005604: 897b ldrh r3, [r7, #10]
|
||
8005606: 8053 strh r3, [r2, #2]
|
||
}
|
||
}
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
8005608: 4b41 ldr r3, [pc, #260] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
800560a: 7a1b ldrb r3, [r3, #8]
|
||
800560c: b29b uxth r3, r3
|
||
800560e: 4618 mov r0, r3
|
||
8005610: f7ff fedc bl 80053cc <LCD_WR_REG>
|
||
LCD_WR_DATA(0);LCD_WR_DATA(0);
|
||
8005614: 2000 movs r0, #0
|
||
8005616: f7ff fee7 bl 80053e8 <LCD_WR_DATA>
|
||
800561a: 2000 movs r0, #0
|
||
800561c: f7ff fee4 bl 80053e8 <LCD_WR_DATA>
|
||
LCD_WR_DATA((lcddev.width-1)>>8);LCD_WR_DATA((lcddev.width-1)&0XFF);
|
||
8005620: 4b3b ldr r3, [pc, #236] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
8005622: 881b ldrh r3, [r3, #0]
|
||
8005624: 3b01 subs r3, #1
|
||
8005626: 121b asrs r3, r3, #8
|
||
8005628: b29b uxth r3, r3
|
||
800562a: 4618 mov r0, r3
|
||
800562c: f7ff fedc bl 80053e8 <LCD_WR_DATA>
|
||
8005630: 4b37 ldr r3, [pc, #220] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
8005632: 881b ldrh r3, [r3, #0]
|
||
8005634: 3b01 subs r3, #1
|
||
8005636: b29b uxth r3, r3
|
||
8005638: b2db uxtb r3, r3
|
||
800563a: b29b uxth r3, r3
|
||
800563c: 4618 mov r0, r3
|
||
800563e: f7ff fed3 bl 80053e8 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8005642: 4b33 ldr r3, [pc, #204] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
8005644: 7a5b ldrb r3, [r3, #9]
|
||
8005646: b29b uxth r3, r3
|
||
8005648: 4618 mov r0, r3
|
||
800564a: f7ff febf bl 80053cc <LCD_WR_REG>
|
||
LCD_WR_DATA(0);LCD_WR_DATA(0);
|
||
800564e: 2000 movs r0, #0
|
||
8005650: f7ff feca bl 80053e8 <LCD_WR_DATA>
|
||
8005654: 2000 movs r0, #0
|
||
8005656: f7ff fec7 bl 80053e8 <LCD_WR_DATA>
|
||
LCD_WR_DATA((lcddev.height-1)>>8);LCD_WR_DATA((lcddev.height-1)&0XFF);
|
||
800565a: 4b2d ldr r3, [pc, #180] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
800565c: 885b ldrh r3, [r3, #2]
|
||
800565e: 3b01 subs r3, #1
|
||
8005660: 121b asrs r3, r3, #8
|
||
8005662: b29b uxth r3, r3
|
||
8005664: 4618 mov r0, r3
|
||
8005666: f7ff febf bl 80053e8 <LCD_WR_DATA>
|
||
800566a: 4b29 ldr r3, [pc, #164] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
800566c: 885b ldrh r3, [r3, #2]
|
||
800566e: 3b01 subs r3, #1
|
||
8005670: b29b uxth r3, r3
|
||
8005672: b2db uxtb r3, r3
|
||
8005674: b29b uxth r3, r3
|
||
8005676: 4618 mov r0, r3
|
||
8005678: f7ff feb6 bl 80053e8 <LCD_WR_DATA>
|
||
800567c: e058 b.n 8005730 <LCD_Scan_Dir+0x2d4>
|
||
}else
|
||
{
|
||
switch(dir)
|
||
800567e: 79fb ldrb r3, [r7, #7]
|
||
8005680: 2b07 cmp r3, #7
|
||
8005682: d836 bhi.n 80056f2 <LCD_Scan_Dir+0x296>
|
||
8005684: a201 add r2, pc, #4 ; (adr r2, 800568c <LCD_Scan_Dir+0x230>)
|
||
8005686: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
800568a: bf00 nop
|
||
800568c: 080056ad .word 0x080056ad
|
||
8005690: 080056b7 .word 0x080056b7
|
||
8005694: 080056c1 .word 0x080056c1
|
||
8005698: 080056f3 .word 0x080056f3
|
||
800569c: 080056cb .word 0x080056cb
|
||
80056a0: 080056d5 .word 0x080056d5
|
||
80056a4: 080056df .word 0x080056df
|
||
80056a8: 080056e9 .word 0x080056e9
|
||
{
|
||
case L2R_U2D://��������,���ϵ���
|
||
regval|=(1<<5)|(1<<4)|(0<<3);
|
||
80056ac: 89fb ldrh r3, [r7, #14]
|
||
80056ae: f043 0330 orr.w r3, r3, #48 ; 0x30
|
||
80056b2: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80056b4: e01d b.n 80056f2 <LCD_Scan_Dir+0x296>
|
||
case L2R_D2U://��������,���µ���
|
||
regval|=(0<<5)|(1<<4)|(0<<3);
|
||
80056b6: 89fb ldrh r3, [r7, #14]
|
||
80056b8: f043 0310 orr.w r3, r3, #16
|
||
80056bc: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80056be: e018 b.n 80056f2 <LCD_Scan_Dir+0x296>
|
||
case R2L_U2D://���ҵ���,���ϵ���
|
||
regval|=(1<<5)|(0<<4)|(0<<3);
|
||
80056c0: 89fb ldrh r3, [r7, #14]
|
||
80056c2: f043 0320 orr.w r3, r3, #32
|
||
80056c6: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80056c8: e013 b.n 80056f2 <LCD_Scan_Dir+0x296>
|
||
case R2L_D2U://���ҵ���,���µ���
|
||
regval|=(0<<5)|(0<<4)|(0<<3);
|
||
break;
|
||
case U2D_L2R://���ϵ���,��������
|
||
regval|=(1<<5)|(1<<4)|(1<<3);
|
||
80056ca: 89fb ldrh r3, [r7, #14]
|
||
80056cc: f043 0338 orr.w r3, r3, #56 ; 0x38
|
||
80056d0: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80056d2: e00e b.n 80056f2 <LCD_Scan_Dir+0x296>
|
||
case U2D_R2L://���ϵ���,���ҵ���
|
||
regval|=(1<<5)|(0<<4)|(1<<3);
|
||
80056d4: 89fb ldrh r3, [r7, #14]
|
||
80056d6: f043 0328 orr.w r3, r3, #40 ; 0x28
|
||
80056da: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80056dc: e009 b.n 80056f2 <LCD_Scan_Dir+0x296>
|
||
case D2U_L2R://���µ���,��������
|
||
regval|=(0<<5)|(1<<4)|(1<<3);
|
||
80056de: 89fb ldrh r3, [r7, #14]
|
||
80056e0: f043 0318 orr.w r3, r3, #24
|
||
80056e4: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80056e6: e004 b.n 80056f2 <LCD_Scan_Dir+0x296>
|
||
case D2U_R2L://���µ���,���ҵ���
|
||
regval|=(0<<5)|(0<<4)|(1<<3);
|
||
80056e8: 89fb ldrh r3, [r7, #14]
|
||
80056ea: f043 0308 orr.w r3, r3, #8
|
||
80056ee: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80056f0: bf00 nop
|
||
}
|
||
if(lcddev.id==0x8989)//8989 IC
|
||
80056f2: 4b07 ldr r3, [pc, #28] ; (8005710 <LCD_Scan_Dir+0x2b4>)
|
||
80056f4: 889b ldrh r3, [r3, #4]
|
||
80056f6: f648 1289 movw r2, #35209 ; 0x8989
|
||
80056fa: 4293 cmp r3, r2
|
||
80056fc: d10a bne.n 8005714 <LCD_Scan_Dir+0x2b8>
|
||
{
|
||
dirreg=0X11;
|
||
80056fe: 2311 movs r3, #17
|
||
8005700: 737b strb r3, [r7, #13]
|
||
regval|=0X6040; //65K
|
||
8005702: 89fb ldrh r3, [r7, #14]
|
||
8005704: f443 43c0 orr.w r3, r3, #24576 ; 0x6000
|
||
8005708: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
800570c: 81fb strh r3, [r7, #14]
|
||
800570e: e007 b.n 8005720 <LCD_Scan_Dir+0x2c4>
|
||
8005710: 20000824 .word 0x20000824
|
||
}else//��������IC
|
||
{
|
||
dirreg=0X03;
|
||
8005714: 2303 movs r3, #3
|
||
8005716: 737b strb r3, [r7, #13]
|
||
regval|=1<<12;
|
||
8005718: 89fb ldrh r3, [r7, #14]
|
||
800571a: f443 5380 orr.w r3, r3, #4096 ; 0x1000
|
||
800571e: 81fb strh r3, [r7, #14]
|
||
}
|
||
LCD_WriteReg(dirreg,regval);
|
||
8005720: 7b7b ldrb r3, [r7, #13]
|
||
8005722: b29b uxth r3, r3
|
||
8005724: 89fa ldrh r2, [r7, #14]
|
||
8005726: 4611 mov r1, r2
|
||
8005728: 4618 mov r0, r3
|
||
800572a: f7ff fe6d bl 8005408 <LCD_WriteReg>
|
||
}
|
||
}
|
||
800572e: bf00 nop
|
||
8005730: bf00 nop
|
||
8005732: 3710 adds r7, #16
|
||
8005734: 46bd mov sp, r7
|
||
8005736: bd80 pop {r7, pc}
|
||
|
||
08005738 <LCD_Display_Dir>:
|
||
//����LCD��ʾ����
|
||
//dir:0,������1,����
|
||
void LCD_Display_Dir(uint8_t dir)
|
||
{
|
||
8005738: b580 push {r7, lr}
|
||
800573a: b082 sub sp, #8
|
||
800573c: af00 add r7, sp, #0
|
||
800573e: 4603 mov r3, r0
|
||
8005740: 71fb strb r3, [r7, #7]
|
||
if(dir==0) //����
|
||
8005742: 79fb ldrb r3, [r7, #7]
|
||
8005744: 2b00 cmp r3, #0
|
||
8005746: d154 bne.n 80057f2 <LCD_Display_Dir+0xba>
|
||
{
|
||
lcddev.dir=0; //����
|
||
8005748: 4b5d ldr r3, [pc, #372] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
800574a: 2200 movs r2, #0
|
||
800574c: 719a strb r2, [r3, #6]
|
||
lcddev.width=240;
|
||
800574e: 4b5c ldr r3, [pc, #368] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005750: 22f0 movs r2, #240 ; 0xf0
|
||
8005752: 801a strh r2, [r3, #0]
|
||
lcddev.height=320;
|
||
8005754: 4b5a ldr r3, [pc, #360] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005756: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
800575a: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X9341||lcddev.id==0X6804||lcddev.id==0X5310)
|
||
800575c: 4b58 ldr r3, [pc, #352] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
800575e: 889b ldrh r3, [r3, #4]
|
||
8005760: f249 3241 movw r2, #37697 ; 0x9341
|
||
8005764: 4293 cmp r3, r2
|
||
8005766: d00b beq.n 8005780 <LCD_Display_Dir+0x48>
|
||
8005768: 4b55 ldr r3, [pc, #340] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
800576a: 889b ldrh r3, [r3, #4]
|
||
800576c: f646 0204 movw r2, #26628 ; 0x6804
|
||
8005770: 4293 cmp r3, r2
|
||
8005772: d005 beq.n 8005780 <LCD_Display_Dir+0x48>
|
||
8005774: 4b52 ldr r3, [pc, #328] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005776: 889b ldrh r3, [r3, #4]
|
||
8005778: f245 3210 movw r2, #21264 ; 0x5310
|
||
800577c: 4293 cmp r3, r2
|
||
800577e: d11e bne.n 80057be <LCD_Display_Dir+0x86>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
8005780: 4b4f ldr r3, [pc, #316] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005782: 222c movs r2, #44 ; 0x2c
|
||
8005784: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2A;
|
||
8005786: 4b4e ldr r3, [pc, #312] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005788: 222a movs r2, #42 ; 0x2a
|
||
800578a: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
800578c: 4b4c ldr r3, [pc, #304] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
800578e: 222b movs r2, #43 ; 0x2b
|
||
8005790: 725a strb r2, [r3, #9]
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8005792: 4b4b ldr r3, [pc, #300] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005794: 889b ldrh r3, [r3, #4]
|
||
8005796: f646 0204 movw r2, #26628 ; 0x6804
|
||
800579a: 4293 cmp r3, r2
|
||
800579c: d006 beq.n 80057ac <LCD_Display_Dir+0x74>
|
||
800579e: 4b48 ldr r3, [pc, #288] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
80057a0: 889b ldrh r3, [r3, #4]
|
||
80057a2: f245 3210 movw r2, #21264 ; 0x5310
|
||
80057a6: 4293 cmp r3, r2
|
||
80057a8: f040 8081 bne.w 80058ae <LCD_Display_Dir+0x176>
|
||
{
|
||
lcddev.width=320;
|
||
80057ac: 4b44 ldr r3, [pc, #272] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
80057ae: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
80057b2: 801a strh r2, [r3, #0]
|
||
lcddev.height=480;
|
||
80057b4: 4b42 ldr r3, [pc, #264] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
80057b6: f44f 72f0 mov.w r2, #480 ; 0x1e0
|
||
80057ba: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
80057bc: e077 b.n 80058ae <LCD_Display_Dir+0x176>
|
||
}
|
||
}else if(lcddev.id==0X8989)
|
||
80057be: 4b40 ldr r3, [pc, #256] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
80057c0: 889b ldrh r3, [r3, #4]
|
||
80057c2: f648 1289 movw r2, #35209 ; 0x8989
|
||
80057c6: 4293 cmp r3, r2
|
||
80057c8: d109 bne.n 80057de <LCD_Display_Dir+0xa6>
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
80057ca: 4b3d ldr r3, [pc, #244] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
80057cc: 2222 movs r2, #34 ; 0x22
|
||
80057ce: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X4E;
|
||
80057d0: 4b3b ldr r3, [pc, #236] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
80057d2: 224e movs r2, #78 ; 0x4e
|
||
80057d4: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X4F;
|
||
80057d6: 4b3a ldr r3, [pc, #232] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
80057d8: 224f movs r2, #79 ; 0x4f
|
||
80057da: 725a strb r2, [r3, #9]
|
||
80057dc: e068 b.n 80058b0 <LCD_Display_Dir+0x178>
|
||
}else
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
80057de: 4b38 ldr r3, [pc, #224] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
80057e0: 2222 movs r2, #34 ; 0x22
|
||
80057e2: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=R32;
|
||
80057e4: 4b36 ldr r3, [pc, #216] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
80057e6: 2220 movs r2, #32
|
||
80057e8: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=R33;
|
||
80057ea: 4b35 ldr r3, [pc, #212] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
80057ec: 2221 movs r2, #33 ; 0x21
|
||
80057ee: 725a strb r2, [r3, #9]
|
||
80057f0: e05e b.n 80058b0 <LCD_Display_Dir+0x178>
|
||
}
|
||
}else //����
|
||
{
|
||
lcddev.dir=1; //����
|
||
80057f2: 4b33 ldr r3, [pc, #204] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
80057f4: 2201 movs r2, #1
|
||
80057f6: 719a strb r2, [r3, #6]
|
||
lcddev.width=320;
|
||
80057f8: 4b31 ldr r3, [pc, #196] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
80057fa: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
80057fe: 801a strh r2, [r3, #0]
|
||
lcddev.height=240;
|
||
8005800: 4b2f ldr r3, [pc, #188] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005802: 22f0 movs r2, #240 ; 0xf0
|
||
8005804: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X9341||lcddev.id==0X5310)
|
||
8005806: 4b2e ldr r3, [pc, #184] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005808: 889b ldrh r3, [r3, #4]
|
||
800580a: f249 3241 movw r2, #37697 ; 0x9341
|
||
800580e: 4293 cmp r3, r2
|
||
8005810: d005 beq.n 800581e <LCD_Display_Dir+0xe6>
|
||
8005812: 4b2b ldr r3, [pc, #172] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005814: 889b ldrh r3, [r3, #4]
|
||
8005816: f245 3210 movw r2, #21264 ; 0x5310
|
||
800581a: 4293 cmp r3, r2
|
||
800581c: d109 bne.n 8005832 <LCD_Display_Dir+0xfa>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
800581e: 4b28 ldr r3, [pc, #160] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005820: 222c movs r2, #44 ; 0x2c
|
||
8005822: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2A;
|
||
8005824: 4b26 ldr r3, [pc, #152] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005826: 222a movs r2, #42 ; 0x2a
|
||
8005828: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
800582a: 4b25 ldr r3, [pc, #148] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
800582c: 222b movs r2, #43 ; 0x2b
|
||
800582e: 725a strb r2, [r3, #9]
|
||
8005830: e028 b.n 8005884 <LCD_Display_Dir+0x14c>
|
||
}else if(lcddev.id==0X6804)
|
||
8005832: 4b23 ldr r3, [pc, #140] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005834: 889b ldrh r3, [r3, #4]
|
||
8005836: f646 0204 movw r2, #26628 ; 0x6804
|
||
800583a: 4293 cmp r3, r2
|
||
800583c: d109 bne.n 8005852 <LCD_Display_Dir+0x11a>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
800583e: 4b20 ldr r3, [pc, #128] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005840: 222c movs r2, #44 ; 0x2c
|
||
8005842: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2B;
|
||
8005844: 4b1e ldr r3, [pc, #120] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005846: 222b movs r2, #43 ; 0x2b
|
||
8005848: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2A;
|
||
800584a: 4b1d ldr r3, [pc, #116] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
800584c: 222a movs r2, #42 ; 0x2a
|
||
800584e: 725a strb r2, [r3, #9]
|
||
8005850: e018 b.n 8005884 <LCD_Display_Dir+0x14c>
|
||
}else if(lcddev.id==0X8989)
|
||
8005852: 4b1b ldr r3, [pc, #108] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005854: 889b ldrh r3, [r3, #4]
|
||
8005856: f648 1289 movw r2, #35209 ; 0x8989
|
||
800585a: 4293 cmp r3, r2
|
||
800585c: d109 bne.n 8005872 <LCD_Display_Dir+0x13a>
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
800585e: 4b18 ldr r3, [pc, #96] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005860: 2222 movs r2, #34 ; 0x22
|
||
8005862: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X4F;
|
||
8005864: 4b16 ldr r3, [pc, #88] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005866: 224f movs r2, #79 ; 0x4f
|
||
8005868: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X4E;
|
||
800586a: 4b15 ldr r3, [pc, #84] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
800586c: 224e movs r2, #78 ; 0x4e
|
||
800586e: 725a strb r2, [r3, #9]
|
||
8005870: e008 b.n 8005884 <LCD_Display_Dir+0x14c>
|
||
}else
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8005872: 4b13 ldr r3, [pc, #76] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005874: 2222 movs r2, #34 ; 0x22
|
||
8005876: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=R33;
|
||
8005878: 4b11 ldr r3, [pc, #68] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
800587a: 2221 movs r2, #33 ; 0x21
|
||
800587c: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=R32;
|
||
800587e: 4b10 ldr r3, [pc, #64] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005880: 2220 movs r2, #32
|
||
8005882: 725a strb r2, [r3, #9]
|
||
}
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8005884: 4b0e ldr r3, [pc, #56] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005886: 889b ldrh r3, [r3, #4]
|
||
8005888: f646 0204 movw r2, #26628 ; 0x6804
|
||
800588c: 4293 cmp r3, r2
|
||
800588e: d005 beq.n 800589c <LCD_Display_Dir+0x164>
|
||
8005890: 4b0b ldr r3, [pc, #44] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
8005892: 889b ldrh r3, [r3, #4]
|
||
8005894: f245 3210 movw r2, #21264 ; 0x5310
|
||
8005898: 4293 cmp r3, r2
|
||
800589a: d109 bne.n 80058b0 <LCD_Display_Dir+0x178>
|
||
{
|
||
lcddev.width=480;
|
||
800589c: 4b08 ldr r3, [pc, #32] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
800589e: f44f 72f0 mov.w r2, #480 ; 0x1e0
|
||
80058a2: 801a strh r2, [r3, #0]
|
||
lcddev.height=320;
|
||
80058a4: 4b06 ldr r3, [pc, #24] ; (80058c0 <LCD_Display_Dir+0x188>)
|
||
80058a6: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
80058aa: 805a strh r2, [r3, #2]
|
||
80058ac: e000 b.n 80058b0 <LCD_Display_Dir+0x178>
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
80058ae: bf00 nop
|
||
}
|
||
}
|
||
LCD_Scan_Dir(DFT_SCAN_DIR); //Ĭ��ɨ�跽��
|
||
80058b0: 2000 movs r0, #0
|
||
80058b2: f7ff fdd3 bl 800545c <LCD_Scan_Dir>
|
||
}
|
||
80058b6: bf00 nop
|
||
80058b8: 3708 adds r7, #8
|
||
80058ba: 46bd mov sp, r7
|
||
80058bc: bd80 pop {r7, pc}
|
||
80058be: bf00 nop
|
||
80058c0: 20000824 .word 0x20000824
|
||
|
||
080058c4 <LCDx_Init>:
|
||
|
||
//��ʼ��lcd
|
||
//�ó�ʼ���������Գ�ʼ������Һ��!
|
||
void LCDx_Init(void)
|
||
{
|
||
80058c4: b580 push {r7, lr}
|
||
80058c6: af00 add r7, sp, #0
|
||
|
||
LCD_BL(0);
|
||
80058c8: 2200 movs r2, #0
|
||
80058ca: 2101 movs r1, #1
|
||
80058cc: 4876 ldr r0, [pc, #472] ; (8005aa8 <LCDx_Init+0x1e4>)
|
||
80058ce: f7fb faae bl 8000e2e <HAL_GPIO_WritePin>
|
||
HAL_Delay(50); // delay 50 ms
|
||
80058d2: 2032 movs r0, #50 ; 0x32
|
||
80058d4: f7fa fff8 bl 80008c8 <HAL_Delay>
|
||
LCD_WriteReg(0x0000,0x0001);
|
||
80058d8: 2101 movs r1, #1
|
||
80058da: 2000 movs r0, #0
|
||
80058dc: f7ff fd94 bl 8005408 <LCD_WriteReg>
|
||
HAL_Delay(50); // delay 50 ms
|
||
80058e0: 2032 movs r0, #50 ; 0x32
|
||
80058e2: f7fa fff1 bl 80008c8 <HAL_Delay>
|
||
lcddev.id = LCD_ReadReg(0x0000);
|
||
80058e6: 2000 movs r0, #0
|
||
80058e8: f7ff fda4 bl 8005434 <LCD_ReadReg>
|
||
80058ec: 4603 mov r3, r0
|
||
80058ee: 461a mov r2, r3
|
||
80058f0: 4b6e ldr r3, [pc, #440] ; (8005aac <LCDx_Init+0x1e8>)
|
||
80058f2: 809a strh r2, [r3, #4]
|
||
|
||
|
||
LCD_WriteReg(0x00E5,0x78F0);
|
||
80058f4: f647 01f0 movw r1, #30960 ; 0x78f0
|
||
80058f8: 20e5 movs r0, #229 ; 0xe5
|
||
80058fa: f7ff fd85 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0001,0x0100);
|
||
80058fe: f44f 7180 mov.w r1, #256 ; 0x100
|
||
8005902: 2001 movs r0, #1
|
||
8005904: f7ff fd80 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0002,0x0700);
|
||
8005908: f44f 61e0 mov.w r1, #1792 ; 0x700
|
||
800590c: 2002 movs r0, #2
|
||
800590e: f7ff fd7b bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0003,0x1030);
|
||
8005912: f241 0130 movw r1, #4144 ; 0x1030
|
||
8005916: 2003 movs r0, #3
|
||
8005918: f7ff fd76 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0004,0x0000);
|
||
800591c: 2100 movs r1, #0
|
||
800591e: 2004 movs r0, #4
|
||
8005920: f7ff fd72 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0008,0x0202);
|
||
8005924: f240 2102 movw r1, #514 ; 0x202
|
||
8005928: 2008 movs r0, #8
|
||
800592a: f7ff fd6d bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0009,0x0000);
|
||
800592e: 2100 movs r1, #0
|
||
8005930: 2009 movs r0, #9
|
||
8005932: f7ff fd69 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000A,0x0000);
|
||
8005936: 2100 movs r1, #0
|
||
8005938: 200a movs r0, #10
|
||
800593a: f7ff fd65 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000C,0x0000);
|
||
800593e: 2100 movs r1, #0
|
||
8005940: 200c movs r0, #12
|
||
8005942: f7ff fd61 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000D,0x0000);
|
||
8005946: 2100 movs r1, #0
|
||
8005948: 200d movs r0, #13
|
||
800594a: f7ff fd5d bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000F,0x0000);
|
||
800594e: 2100 movs r1, #0
|
||
8005950: 200f movs r0, #15
|
||
8005952: f7ff fd59 bl 8005408 <LCD_WriteReg>
|
||
//power on sequence VGHVGL
|
||
LCD_WriteReg(0x0010,0x0000);
|
||
8005956: 2100 movs r1, #0
|
||
8005958: 2010 movs r0, #16
|
||
800595a: f7ff fd55 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0011,0x0007);
|
||
800595e: 2107 movs r1, #7
|
||
8005960: 2011 movs r0, #17
|
||
8005962: f7ff fd51 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0012,0x0000);
|
||
8005966: 2100 movs r1, #0
|
||
8005968: 2012 movs r0, #18
|
||
800596a: f7ff fd4d bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0013,0x0000);
|
||
800596e: 2100 movs r1, #0
|
||
8005970: 2013 movs r0, #19
|
||
8005972: f7ff fd49 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0007,0x0000);
|
||
8005976: 2100 movs r1, #0
|
||
8005978: 2007 movs r0, #7
|
||
800597a: f7ff fd45 bl 8005408 <LCD_WriteReg>
|
||
//vgh
|
||
LCD_WriteReg(0x0010,0x1690);
|
||
800597e: f241 6190 movw r1, #5776 ; 0x1690
|
||
8005982: 2010 movs r0, #16
|
||
8005984: f7ff fd40 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0011,0x0227);
|
||
8005988: f240 2127 movw r1, #551 ; 0x227
|
||
800598c: 2011 movs r0, #17
|
||
800598e: f7ff fd3b bl 8005408 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vregiout
|
||
LCD_WriteReg(0x0012,0x009D); //0x001b
|
||
8005992: 219d movs r1, #157 ; 0x9d
|
||
8005994: 2012 movs r0, #18
|
||
8005996: f7ff fd37 bl 8005408 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vom amplitude
|
||
LCD_WriteReg(0x0013,0x1900);
|
||
800599a: f44f 51c8 mov.w r1, #6400 ; 0x1900
|
||
800599e: 2013 movs r0, #19
|
||
80059a0: f7ff fd32 bl 8005408 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vom H
|
||
LCD_WriteReg(0x0029,0x0025);
|
||
80059a4: 2125 movs r1, #37 ; 0x25
|
||
80059a6: 2029 movs r0, #41 ; 0x29
|
||
80059a8: f7ff fd2e bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x002B,0x000D);
|
||
80059ac: 210d movs r1, #13
|
||
80059ae: 202b movs r0, #43 ; 0x2b
|
||
80059b0: f7ff fd2a bl 8005408 <LCD_WriteReg>
|
||
//gamma
|
||
LCD_WriteReg(0x0030,0x0007);
|
||
80059b4: 2107 movs r1, #7
|
||
80059b6: 2030 movs r0, #48 ; 0x30
|
||
80059b8: f7ff fd26 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0031,0x0303);
|
||
80059bc: f240 3103 movw r1, #771 ; 0x303
|
||
80059c0: 2031 movs r0, #49 ; 0x31
|
||
80059c2: f7ff fd21 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0032,0x0003);// 0006
|
||
80059c6: 2103 movs r1, #3
|
||
80059c8: 2032 movs r0, #50 ; 0x32
|
||
80059ca: f7ff fd1d bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0035,0x0206);
|
||
80059ce: f240 2106 movw r1, #518 ; 0x206
|
||
80059d2: 2035 movs r0, #53 ; 0x35
|
||
80059d4: f7ff fd18 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0036,0x0008);
|
||
80059d8: 2108 movs r1, #8
|
||
80059da: 2036 movs r0, #54 ; 0x36
|
||
80059dc: f7ff fd14 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0037,0x0406);
|
||
80059e0: f240 4106 movw r1, #1030 ; 0x406
|
||
80059e4: 2037 movs r0, #55 ; 0x37
|
||
80059e6: f7ff fd0f bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0038,0x0304);//0200
|
||
80059ea: f44f 7141 mov.w r1, #772 ; 0x304
|
||
80059ee: 2038 movs r0, #56 ; 0x38
|
||
80059f0: f7ff fd0a bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0039,0x0007);
|
||
80059f4: 2107 movs r1, #7
|
||
80059f6: 2039 movs r0, #57 ; 0x39
|
||
80059f8: f7ff fd06 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x003C,0x0602);// 0504
|
||
80059fc: f240 6102 movw r1, #1538 ; 0x602
|
||
8005a00: 203c movs r0, #60 ; 0x3c
|
||
8005a02: f7ff fd01 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x003D,0x0008);
|
||
8005a06: 2108 movs r1, #8
|
||
8005a08: 203d movs r0, #61 ; 0x3d
|
||
8005a0a: f7ff fcfd bl 8005408 <LCD_WriteReg>
|
||
//ram
|
||
LCD_WriteReg(0x0050,0x0000);
|
||
8005a0e: 2100 movs r1, #0
|
||
8005a10: 2050 movs r0, #80 ; 0x50
|
||
8005a12: f7ff fcf9 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0051,0x00EF);
|
||
8005a16: 21ef movs r1, #239 ; 0xef
|
||
8005a18: 2051 movs r0, #81 ; 0x51
|
||
8005a1a: f7ff fcf5 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0052,0x0000);
|
||
8005a1e: 2100 movs r1, #0
|
||
8005a20: 2052 movs r0, #82 ; 0x52
|
||
8005a22: f7ff fcf1 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0053,0x013F);
|
||
8005a26: f240 113f movw r1, #319 ; 0x13f
|
||
8005a2a: 2053 movs r0, #83 ; 0x53
|
||
8005a2c: f7ff fcec bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0060,0xA700);
|
||
8005a30: f44f 4127 mov.w r1, #42752 ; 0xa700
|
||
8005a34: 2060 movs r0, #96 ; 0x60
|
||
8005a36: f7ff fce7 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0061,0x0001);
|
||
8005a3a: 2101 movs r1, #1
|
||
8005a3c: 2061 movs r0, #97 ; 0x61
|
||
8005a3e: f7ff fce3 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x006A,0x0000);
|
||
8005a42: 2100 movs r1, #0
|
||
8005a44: 206a movs r0, #106 ; 0x6a
|
||
8005a46: f7ff fcdf bl 8005408 <LCD_WriteReg>
|
||
//
|
||
LCD_WriteReg(0x0080,0x0000);
|
||
8005a4a: 2100 movs r1, #0
|
||
8005a4c: 2080 movs r0, #128 ; 0x80
|
||
8005a4e: f7ff fcdb bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0081,0x0000);
|
||
8005a52: 2100 movs r1, #0
|
||
8005a54: 2081 movs r0, #129 ; 0x81
|
||
8005a56: f7ff fcd7 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0082,0x0000);
|
||
8005a5a: 2100 movs r1, #0
|
||
8005a5c: 2082 movs r0, #130 ; 0x82
|
||
8005a5e: f7ff fcd3 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0083,0x0000);
|
||
8005a62: 2100 movs r1, #0
|
||
8005a64: 2083 movs r0, #131 ; 0x83
|
||
8005a66: f7ff fccf bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0084,0x0000);
|
||
8005a6a: 2100 movs r1, #0
|
||
8005a6c: 2084 movs r0, #132 ; 0x84
|
||
8005a6e: f7ff fccb bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0085,0x0000);
|
||
8005a72: 2100 movs r1, #0
|
||
8005a74: 2085 movs r0, #133 ; 0x85
|
||
8005a76: f7ff fcc7 bl 8005408 <LCD_WriteReg>
|
||
//
|
||
LCD_WriteReg(0x0090,0x0010);
|
||
8005a7a: 2110 movs r1, #16
|
||
8005a7c: 2090 movs r0, #144 ; 0x90
|
||
8005a7e: f7ff fcc3 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0092,0x0600);
|
||
8005a82: f44f 61c0 mov.w r1, #1536 ; 0x600
|
||
8005a86: 2092 movs r0, #146 ; 0x92
|
||
8005a88: f7ff fcbe bl 8005408 <LCD_WriteReg>
|
||
|
||
LCD_WriteReg(0x0007,0x0133);
|
||
8005a8c: f240 1133 movw r1, #307 ; 0x133
|
||
8005a90: 2007 movs r0, #7
|
||
8005a92: f7ff fcb9 bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(0x00,0x0022);//
|
||
8005a96: 2122 movs r1, #34 ; 0x22
|
||
8005a98: 2000 movs r0, #0
|
||
8005a9a: f7ff fcb5 bl 8005408 <LCD_WriteReg>
|
||
|
||
|
||
LCD_Display_Dir(1); //Ĭ��Ϊh��
|
||
8005a9e: 2001 movs r0, #1
|
||
8005aa0: f7ff fe4a bl 8005738 <LCD_Display_Dir>
|
||
|
||
|
||
}
|
||
8005aa4: bf00 nop
|
||
8005aa6: bd80 pop {r7, pc}
|
||
8005aa8: 40010c00 .word 0x40010c00
|
||
8005aac: 20000824 .word 0x20000824
|
||
|
||
08005ab0 <LCD_SetCursor>:
|
||
//***********************************************************���� ���� ʲô��
|
||
//���ù���λ��
|
||
//Xpos:������
|
||
//Ypos:������
|
||
void LCD_SetCursor(uint16_t Xpos, uint16_t Ypos)
|
||
{
|
||
8005ab0: b580 push {r7, lr}
|
||
8005ab2: b082 sub sp, #8
|
||
8005ab4: af00 add r7, sp, #0
|
||
8005ab6: 4603 mov r3, r0
|
||
8005ab8: 460a mov r2, r1
|
||
8005aba: 80fb strh r3, [r7, #6]
|
||
8005abc: 4613 mov r3, r2
|
||
8005abe: 80bb strh r3, [r7, #4]
|
||
if(lcddev.id==0X9341||lcddev.id==0X5310)
|
||
8005ac0: 4b42 ldr r3, [pc, #264] ; (8005bcc <LCD_SetCursor+0x11c>)
|
||
8005ac2: 889b ldrh r3, [r3, #4]
|
||
8005ac4: f249 3241 movw r2, #37697 ; 0x9341
|
||
8005ac8: 4293 cmp r3, r2
|
||
8005aca: d005 beq.n 8005ad8 <LCD_SetCursor+0x28>
|
||
8005acc: 4b3f ldr r3, [pc, #252] ; (8005bcc <LCD_SetCursor+0x11c>)
|
||
8005ace: 889b ldrh r3, [r3, #4]
|
||
8005ad0: f245 3210 movw r2, #21264 ; 0x5310
|
||
8005ad4: 4293 cmp r3, r2
|
||
8005ad6: d124 bne.n 8005b22 <LCD_SetCursor+0x72>
|
||
{
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
8005ad8: 4b3c ldr r3, [pc, #240] ; (8005bcc <LCD_SetCursor+0x11c>)
|
||
8005ada: 7a1b ldrb r3, [r3, #8]
|
||
8005adc: b29b uxth r3, r3
|
||
8005ade: 4618 mov r0, r3
|
||
8005ae0: f7ff fc74 bl 80053cc <LCD_WR_REG>
|
||
LCD_WR_DATA(Xpos>>8);
|
||
8005ae4: 88fb ldrh r3, [r7, #6]
|
||
8005ae6: 0a1b lsrs r3, r3, #8
|
||
8005ae8: b29b uxth r3, r3
|
||
8005aea: 4618 mov r0, r3
|
||
8005aec: f7ff fc7c bl 80053e8 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Xpos&0XFF);
|
||
8005af0: 88fb ldrh r3, [r7, #6]
|
||
8005af2: b2db uxtb r3, r3
|
||
8005af4: b29b uxth r3, r3
|
||
8005af6: 4618 mov r0, r3
|
||
8005af8: f7ff fc76 bl 80053e8 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8005afc: 4b33 ldr r3, [pc, #204] ; (8005bcc <LCD_SetCursor+0x11c>)
|
||
8005afe: 7a5b ldrb r3, [r3, #9]
|
||
8005b00: b29b uxth r3, r3
|
||
8005b02: 4618 mov r0, r3
|
||
8005b04: f7ff fc62 bl 80053cc <LCD_WR_REG>
|
||
LCD_WR_DATA(Ypos>>8);
|
||
8005b08: 88bb ldrh r3, [r7, #4]
|
||
8005b0a: 0a1b lsrs r3, r3, #8
|
||
8005b0c: b29b uxth r3, r3
|
||
8005b0e: 4618 mov r0, r3
|
||
8005b10: f7ff fc6a bl 80053e8 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Ypos&0XFF);
|
||
8005b14: 88bb ldrh r3, [r7, #4]
|
||
8005b16: b2db uxtb r3, r3
|
||
8005b18: b29b uxth r3, r3
|
||
8005b1a: 4618 mov r0, r3
|
||
8005b1c: f7ff fc64 bl 80053e8 <LCD_WR_DATA>
|
||
{
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//������ʵ���ǵ�תx,y����
|
||
LCD_WriteReg(lcddev.setxcmd, Xpos);
|
||
LCD_WriteReg(lcddev.setycmd, Ypos);
|
||
}
|
||
}
|
||
8005b20: e050 b.n 8005bc4 <LCD_SetCursor+0x114>
|
||
}else if(lcddev.id==0X6804)
|
||
8005b22: 4b2a ldr r3, [pc, #168] ; (8005bcc <LCD_SetCursor+0x11c>)
|
||
8005b24: 889b ldrh r3, [r3, #4]
|
||
8005b26: f646 0204 movw r2, #26628 ; 0x6804
|
||
8005b2a: 4293 cmp r3, r2
|
||
8005b2c: d12f bne.n 8005b8e <LCD_SetCursor+0xde>
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//����ʱ����
|
||
8005b2e: 4b27 ldr r3, [pc, #156] ; (8005bcc <LCD_SetCursor+0x11c>)
|
||
8005b30: 799b ldrb r3, [r3, #6]
|
||
8005b32: 2b01 cmp r3, #1
|
||
8005b34: d106 bne.n 8005b44 <LCD_SetCursor+0x94>
|
||
8005b36: 4b25 ldr r3, [pc, #148] ; (8005bcc <LCD_SetCursor+0x11c>)
|
||
8005b38: 881a ldrh r2, [r3, #0]
|
||
8005b3a: 88fb ldrh r3, [r7, #6]
|
||
8005b3c: 1ad3 subs r3, r2, r3
|
||
8005b3e: b29b uxth r3, r3
|
||
8005b40: 3b01 subs r3, #1
|
||
8005b42: 80fb strh r3, [r7, #6]
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
8005b44: 4b21 ldr r3, [pc, #132] ; (8005bcc <LCD_SetCursor+0x11c>)
|
||
8005b46: 7a1b ldrb r3, [r3, #8]
|
||
8005b48: b29b uxth r3, r3
|
||
8005b4a: 4618 mov r0, r3
|
||
8005b4c: f7ff fc3e bl 80053cc <LCD_WR_REG>
|
||
LCD_WR_DATA(Xpos>>8);
|
||
8005b50: 88fb ldrh r3, [r7, #6]
|
||
8005b52: 0a1b lsrs r3, r3, #8
|
||
8005b54: b29b uxth r3, r3
|
||
8005b56: 4618 mov r0, r3
|
||
8005b58: f7ff fc46 bl 80053e8 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Xpos&0XFF);
|
||
8005b5c: 88fb ldrh r3, [r7, #6]
|
||
8005b5e: b2db uxtb r3, r3
|
||
8005b60: b29b uxth r3, r3
|
||
8005b62: 4618 mov r0, r3
|
||
8005b64: f7ff fc40 bl 80053e8 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8005b68: 4b18 ldr r3, [pc, #96] ; (8005bcc <LCD_SetCursor+0x11c>)
|
||
8005b6a: 7a5b ldrb r3, [r3, #9]
|
||
8005b6c: b29b uxth r3, r3
|
||
8005b6e: 4618 mov r0, r3
|
||
8005b70: f7ff fc2c bl 80053cc <LCD_WR_REG>
|
||
LCD_WR_DATA(Ypos>>8);
|
||
8005b74: 88bb ldrh r3, [r7, #4]
|
||
8005b76: 0a1b lsrs r3, r3, #8
|
||
8005b78: b29b uxth r3, r3
|
||
8005b7a: 4618 mov r0, r3
|
||
8005b7c: f7ff fc34 bl 80053e8 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Ypos&0XFF);
|
||
8005b80: 88bb ldrh r3, [r7, #4]
|
||
8005b82: b2db uxtb r3, r3
|
||
8005b84: b29b uxth r3, r3
|
||
8005b86: 4618 mov r0, r3
|
||
8005b88: f7ff fc2e bl 80053e8 <LCD_WR_DATA>
|
||
}
|
||
8005b8c: e01a b.n 8005bc4 <LCD_SetCursor+0x114>
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//������ʵ���ǵ�תx,y����
|
||
8005b8e: 4b0f ldr r3, [pc, #60] ; (8005bcc <LCD_SetCursor+0x11c>)
|
||
8005b90: 799b ldrb r3, [r3, #6]
|
||
8005b92: 2b01 cmp r3, #1
|
||
8005b94: d106 bne.n 8005ba4 <LCD_SetCursor+0xf4>
|
||
8005b96: 4b0d ldr r3, [pc, #52] ; (8005bcc <LCD_SetCursor+0x11c>)
|
||
8005b98: 881a ldrh r2, [r3, #0]
|
||
8005b9a: 88fb ldrh r3, [r7, #6]
|
||
8005b9c: 1ad3 subs r3, r2, r3
|
||
8005b9e: b29b uxth r3, r3
|
||
8005ba0: 3b01 subs r3, #1
|
||
8005ba2: 80fb strh r3, [r7, #6]
|
||
LCD_WriteReg(lcddev.setxcmd, Xpos);
|
||
8005ba4: 4b09 ldr r3, [pc, #36] ; (8005bcc <LCD_SetCursor+0x11c>)
|
||
8005ba6: 7a1b ldrb r3, [r3, #8]
|
||
8005ba8: b29b uxth r3, r3
|
||
8005baa: 88fa ldrh r2, [r7, #6]
|
||
8005bac: 4611 mov r1, r2
|
||
8005bae: 4618 mov r0, r3
|
||
8005bb0: f7ff fc2a bl 8005408 <LCD_WriteReg>
|
||
LCD_WriteReg(lcddev.setycmd, Ypos);
|
||
8005bb4: 4b05 ldr r3, [pc, #20] ; (8005bcc <LCD_SetCursor+0x11c>)
|
||
8005bb6: 7a5b ldrb r3, [r3, #9]
|
||
8005bb8: b29b uxth r3, r3
|
||
8005bba: 88ba ldrh r2, [r7, #4]
|
||
8005bbc: 4611 mov r1, r2
|
||
8005bbe: 4618 mov r0, r3
|
||
8005bc0: f7ff fc22 bl 8005408 <LCD_WriteReg>
|
||
}
|
||
8005bc4: bf00 nop
|
||
8005bc6: 3708 adds r7, #8
|
||
8005bc8: 46bd mov sp, r7
|
||
8005bca: bd80 pop {r7, pc}
|
||
8005bcc: 20000824 .word 0x20000824
|
||
|
||
08005bd0 <LCD_set_dot>:
|
||
}
|
||
//����
|
||
//x,y:����
|
||
//POINT_COLOR:�˵�����ɫ
|
||
void LCD_set_dot(uint16_t x,uint16_t y,uint16_t color)
|
||
{
|
||
8005bd0: b580 push {r7, lr}
|
||
8005bd2: b082 sub sp, #8
|
||
8005bd4: af00 add r7, sp, #0
|
||
8005bd6: 4603 mov r3, r0
|
||
8005bd8: 80fb strh r3, [r7, #6]
|
||
8005bda: 460b mov r3, r1
|
||
8005bdc: 80bb strh r3, [r7, #4]
|
||
8005bde: 4613 mov r3, r2
|
||
8005be0: 807b strh r3, [r7, #2]
|
||
LCD_SetCursor(x,y); //���ù���λ��
|
||
8005be2: 88ba ldrh r2, [r7, #4]
|
||
8005be4: 88fb ldrh r3, [r7, #6]
|
||
8005be6: 4611 mov r1, r2
|
||
8005be8: 4618 mov r0, r3
|
||
8005bea: f7ff ff61 bl 8005ab0 <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
8005bee: 4b06 ldr r3, [pc, #24] ; (8005c08 <LCD_set_dot+0x38>)
|
||
8005bf0: 79da ldrb r2, [r3, #7]
|
||
8005bf2: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
8005bf6: b292 uxth r2, r2
|
||
8005bf8: 801a strh r2, [r3, #0]
|
||
LCD_DATA_ADDRESS=color;
|
||
8005bfa: 4a04 ldr r2, [pc, #16] ; (8005c0c <LCD_set_dot+0x3c>)
|
||
8005bfc: 887b ldrh r3, [r7, #2]
|
||
8005bfe: 8013 strh r3, [r2, #0]
|
||
}
|
||
8005c00: bf00 nop
|
||
8005c02: 3708 adds r7, #8
|
||
8005c04: 46bd mov sp, r7
|
||
8005c06: bd80 pop {r7, pc}
|
||
8005c08: 20000824 .word 0x20000824
|
||
8005c0c: 6c000800 .word 0x6c000800
|
||
|
||
08005c10 <LCD_Clear>:
|
||
|
||
//��������
|
||
//color:Ҫ����������ɫ
|
||
void LCD_Clear(uint16_t color)
|
||
{
|
||
8005c10: b580 push {r7, lr}
|
||
8005c12: b084 sub sp, #16
|
||
8005c14: af00 add r7, sp, #0
|
||
8005c16: 4603 mov r3, r0
|
||
8005c18: 80fb strh r3, [r7, #6]
|
||
uint32_t index=0;
|
||
8005c1a: 2300 movs r3, #0
|
||
8005c1c: 60fb str r3, [r7, #12]
|
||
uint32_t totalpoint=lcddev.width;
|
||
8005c1e: 4b23 ldr r3, [pc, #140] ; (8005cac <LCD_Clear+0x9c>)
|
||
8005c20: 881b ldrh r3, [r3, #0]
|
||
8005c22: 60bb str r3, [r7, #8]
|
||
totalpoint*=lcddev.height; //�õ��ܵ���
|
||
8005c24: 4b21 ldr r3, [pc, #132] ; (8005cac <LCD_Clear+0x9c>)
|
||
8005c26: 885b ldrh r3, [r3, #2]
|
||
8005c28: 461a mov r2, r3
|
||
8005c2a: 68bb ldr r3, [r7, #8]
|
||
8005c2c: fb02 f303 mul.w r3, r2, r3
|
||
8005c30: 60bb str r3, [r7, #8]
|
||
if((lcddev.id==0X6804)&&(lcddev.dir==1))//6804������ʱ�������
|
||
8005c32: 4b1e ldr r3, [pc, #120] ; (8005cac <LCD_Clear+0x9c>)
|
||
8005c34: 889b ldrh r3, [r3, #4]
|
||
8005c36: f646 0204 movw r2, #26628 ; 0x6804
|
||
8005c3a: 4293 cmp r3, r2
|
||
8005c3c: d11a bne.n 8005c74 <LCD_Clear+0x64>
|
||
8005c3e: 4b1b ldr r3, [pc, #108] ; (8005cac <LCD_Clear+0x9c>)
|
||
8005c40: 799b ldrb r3, [r3, #6]
|
||
8005c42: 2b01 cmp r3, #1
|
||
8005c44: d116 bne.n 8005c74 <LCD_Clear+0x64>
|
||
{
|
||
lcddev.dir=0;
|
||
8005c46: 4b19 ldr r3, [pc, #100] ; (8005cac <LCD_Clear+0x9c>)
|
||
8005c48: 2200 movs r2, #0
|
||
8005c4a: 719a strb r2, [r3, #6]
|
||
lcddev.setxcmd=0X2A;
|
||
8005c4c: 4b17 ldr r3, [pc, #92] ; (8005cac <LCD_Clear+0x9c>)
|
||
8005c4e: 222a movs r2, #42 ; 0x2a
|
||
8005c50: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
8005c52: 4b16 ldr r3, [pc, #88] ; (8005cac <LCD_Clear+0x9c>)
|
||
8005c54: 222b movs r2, #43 ; 0x2b
|
||
8005c56: 725a strb r2, [r3, #9]
|
||
LCD_SetCursor(0x00,0x0000); //���ù���λ��
|
||
8005c58: 2100 movs r1, #0
|
||
8005c5a: 2000 movs r0, #0
|
||
8005c5c: f7ff ff28 bl 8005ab0 <LCD_SetCursor>
|
||
lcddev.dir=1;
|
||
8005c60: 4b12 ldr r3, [pc, #72] ; (8005cac <LCD_Clear+0x9c>)
|
||
8005c62: 2201 movs r2, #1
|
||
8005c64: 719a strb r2, [r3, #6]
|
||
lcddev.setxcmd=0X2B;
|
||
8005c66: 4b11 ldr r3, [pc, #68] ; (8005cac <LCD_Clear+0x9c>)
|
||
8005c68: 222b movs r2, #43 ; 0x2b
|
||
8005c6a: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2A;
|
||
8005c6c: 4b0f ldr r3, [pc, #60] ; (8005cac <LCD_Clear+0x9c>)
|
||
8005c6e: 222a movs r2, #42 ; 0x2a
|
||
8005c70: 725a strb r2, [r3, #9]
|
||
8005c72: e003 b.n 8005c7c <LCD_Clear+0x6c>
|
||
}else LCD_SetCursor(0x00,0x0000); //���ù���λ��
|
||
8005c74: 2100 movs r1, #0
|
||
8005c76: 2000 movs r0, #0
|
||
8005c78: f7ff ff1a bl 8005ab0 <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
8005c7c: 4b0b ldr r3, [pc, #44] ; (8005cac <LCD_Clear+0x9c>)
|
||
8005c7e: 79da ldrb r2, [r3, #7]
|
||
8005c80: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
8005c84: b292 uxth r2, r2
|
||
8005c86: 801a strh r2, [r3, #0]
|
||
for(index=0;index<totalpoint;index++)
|
||
8005c88: 2300 movs r3, #0
|
||
8005c8a: 60fb str r3, [r7, #12]
|
||
8005c8c: e005 b.n 8005c9a <LCD_Clear+0x8a>
|
||
{
|
||
LCD_DATA_ADDRESS=color;
|
||
8005c8e: 4a08 ldr r2, [pc, #32] ; (8005cb0 <LCD_Clear+0xa0>)
|
||
8005c90: 88fb ldrh r3, [r7, #6]
|
||
8005c92: 8013 strh r3, [r2, #0]
|
||
for(index=0;index<totalpoint;index++)
|
||
8005c94: 68fb ldr r3, [r7, #12]
|
||
8005c96: 3301 adds r3, #1
|
||
8005c98: 60fb str r3, [r7, #12]
|
||
8005c9a: 68fa ldr r2, [r7, #12]
|
||
8005c9c: 68bb ldr r3, [r7, #8]
|
||
8005c9e: 429a cmp r2, r3
|
||
8005ca0: d3f5 bcc.n 8005c8e <LCD_Clear+0x7e>
|
||
}
|
||
}
|
||
8005ca2: bf00 nop
|
||
8005ca4: bf00 nop
|
||
8005ca6: 3710 adds r7, #16
|
||
8005ca8: 46bd mov sp, r7
|
||
8005caa: bd80 pop {r7, pc}
|
||
8005cac: 20000824 .word 0x20000824
|
||
8005cb0: 6c000800 .word 0x6c000800
|
||
|
||
08005cb4 <font_init>:
|
||
|
||
//��ʼ������
|
||
//����ֵ:0,�ֿ�����.
|
||
// ����,�ֿⶪʧ
|
||
uint8_t font_init(void)
|
||
{
|
||
8005cb4: b580 push {r7, lr}
|
||
8005cb6: b082 sub sp, #8
|
||
8005cb8: af00 add r7, sp, #0
|
||
uint8_t t=0;
|
||
8005cba: 2300 movs r3, #0
|
||
8005cbc: 71fb strb r3, [r7, #7]
|
||
while(t<10)//������ȡ10��,���Ǵ���,˵��ȷʵ��������,�ø����ֿ���
|
||
8005cbe: e014 b.n 8005cea <font_init+0x36>
|
||
{
|
||
t++;
|
||
8005cc0: 79fb ldrb r3, [r7, #7]
|
||
8005cc2: 3301 adds r3, #1
|
||
8005cc4: 71fb strb r3, [r7, #7]
|
||
W25QXX_Read((uint8_t*)&ftinfo,FONTINFOADDR,sizeof(ftinfo));//����ftinfo�ṹ������
|
||
8005cc6: 2224 movs r2, #36 ; 0x24
|
||
8005cc8: f44f 0180 mov.w r1, #4194304 ; 0x400000
|
||
8005ccc: 480d ldr r0, [pc, #52] ; (8005d04 <font_init+0x50>)
|
||
8005cce: f7fe fe5d bl 800498c <W25QXX_Read>
|
||
if(ftinfo.fontok==0XAA)
|
||
8005cd2: 4b0c ldr r3, [pc, #48] ; (8005d04 <font_init+0x50>)
|
||
8005cd4: 781b ldrb r3, [r3, #0]
|
||
8005cd6: 2baa cmp r3, #170 ; 0xaa
|
||
8005cd8: d107 bne.n 8005cea <font_init+0x36>
|
||
{
|
||
ftinfo.f12addr=0x0042a929;
|
||
8005cda: 4b0a ldr r3, [pc, #40] ; (8005d04 <font_init+0x50>)
|
||
8005cdc: 4a0a ldr r2, [pc, #40] ; (8005d08 <font_init+0x54>)
|
||
8005cde: 60da str r2, [r3, #12]
|
||
ftinfo.f16addr=0x004b6d89;
|
||
8005ce0: 4b08 ldr r3, [pc, #32] ; (8005d04 <font_init+0x50>)
|
||
8005ce2: 4a0a ldr r2, [pc, #40] ; (8005d0c <font_init+0x58>)
|
||
8005ce4: 615a str r2, [r3, #20]
|
||
return 0;
|
||
8005ce6: 2300 movs r3, #0
|
||
8005ce8: e008 b.n 8005cfc <font_init+0x48>
|
||
while(t<10)//������ȡ10��,���Ǵ���,˵��ȷʵ��������,�ø����ֿ���
|
||
8005cea: 79fb ldrb r3, [r7, #7]
|
||
8005cec: 2b09 cmp r3, #9
|
||
8005cee: d9e7 bls.n 8005cc0 <font_init+0xc>
|
||
}
|
||
|
||
}
|
||
if(ftinfo.fontok!=0XAA)return 1;
|
||
8005cf0: 4b04 ldr r3, [pc, #16] ; (8005d04 <font_init+0x50>)
|
||
8005cf2: 781b ldrb r3, [r3, #0]
|
||
8005cf4: 2baa cmp r3, #170 ; 0xaa
|
||
8005cf6: d001 beq.n 8005cfc <font_init+0x48>
|
||
8005cf8: 2301 movs r3, #1
|
||
8005cfa: e7ff b.n 8005cfc <font_init+0x48>
|
||
|
||
}
|
||
8005cfc: 4618 mov r0, r3
|
||
8005cfe: 3708 adds r7, #8
|
||
8005d00: 46bd mov sp, r7
|
||
8005d02: bd80 pop {r7, pc}
|
||
8005d04: 20000830 .word 0x20000830
|
||
8005d08: 0042a929 .word 0x0042a929
|
||
8005d0c: 004b6d89 .word 0x004b6d89
|
||
|
||
08005d10 <Get_HzMat>:
|
||
//���ֿ��в��ҳ���ģ
|
||
//code �ַ����Ŀ�ʼ��ַ,GBK��
|
||
//mat ���ݴ��ŵ�ַ (size/8+((size%8)?1:0))*(size) bytes��С
|
||
//size:������С
|
||
void Get_HzMat(unsigned char *code,unsigned char *mat,uint8_t size)
|
||
{
|
||
8005d10: b580 push {r7, lr}
|
||
8005d12: b086 sub sp, #24
|
||
8005d14: af00 add r7, sp, #0
|
||
8005d16: 60f8 str r0, [r7, #12]
|
||
8005d18: 60b9 str r1, [r7, #8]
|
||
8005d1a: 4613 mov r3, r2
|
||
8005d1c: 71fb strb r3, [r7, #7]
|
||
unsigned char qh,ql;
|
||
unsigned char i;
|
||
unsigned long foffset;
|
||
uint8_t csize=(size/8+((size%8)?1:0))*(size);//�õ�����һ���ַ���Ӧ��������ռ���ֽ���
|
||
8005d1e: 79fb ldrb r3, [r7, #7]
|
||
8005d20: 08db lsrs r3, r3, #3
|
||
8005d22: b2db uxtb r3, r3
|
||
8005d24: 461a mov r2, r3
|
||
8005d26: 79fb ldrb r3, [r7, #7]
|
||
8005d28: f003 0307 and.w r3, r3, #7
|
||
8005d2c: b2db uxtb r3, r3
|
||
8005d2e: 2b00 cmp r3, #0
|
||
8005d30: bf14 ite ne
|
||
8005d32: 2301 movne r3, #1
|
||
8005d34: 2300 moveq r3, #0
|
||
8005d36: b2db uxtb r3, r3
|
||
8005d38: 4413 add r3, r2
|
||
8005d3a: b2db uxtb r3, r3
|
||
8005d3c: 79fa ldrb r2, [r7, #7]
|
||
8005d3e: fb02 f303 mul.w r3, r2, r3
|
||
8005d42: 757b strb r3, [r7, #21]
|
||
qh=*code;
|
||
8005d44: 68fb ldr r3, [r7, #12]
|
||
8005d46: 781b ldrb r3, [r3, #0]
|
||
8005d48: 753b strb r3, [r7, #20]
|
||
ql=*(++code);
|
||
8005d4a: 68fb ldr r3, [r7, #12]
|
||
8005d4c: 3301 adds r3, #1
|
||
8005d4e: 60fb str r3, [r7, #12]
|
||
8005d50: 68fb ldr r3, [r7, #12]
|
||
8005d52: 781b ldrb r3, [r3, #0]
|
||
8005d54: 75fb strb r3, [r7, #23]
|
||
if(qh<0x81||ql<0x40||ql==0xff||qh==0xff)//�� ���ú���
|
||
8005d56: 7d3b ldrb r3, [r7, #20]
|
||
8005d58: 2b80 cmp r3, #128 ; 0x80
|
||
8005d5a: d908 bls.n 8005d6e <Get_HzMat+0x5e>
|
||
8005d5c: 7dfb ldrb r3, [r7, #23]
|
||
8005d5e: 2b3f cmp r3, #63 ; 0x3f
|
||
8005d60: d905 bls.n 8005d6e <Get_HzMat+0x5e>
|
||
8005d62: 7dfb ldrb r3, [r7, #23]
|
||
8005d64: 2bff cmp r3, #255 ; 0xff
|
||
8005d66: d002 beq.n 8005d6e <Get_HzMat+0x5e>
|
||
8005d68: 7d3b ldrb r3, [r7, #20]
|
||
8005d6a: 2bff cmp r3, #255 ; 0xff
|
||
8005d6c: d10f bne.n 8005d8e <Get_HzMat+0x7e>
|
||
{
|
||
for(i=0;i<csize;i++)*mat++=0x00;//��������
|
||
8005d6e: 2300 movs r3, #0
|
||
8005d70: 75bb strb r3, [r7, #22]
|
||
8005d72: e007 b.n 8005d84 <Get_HzMat+0x74>
|
||
8005d74: 68bb ldr r3, [r7, #8]
|
||
8005d76: 1c5a adds r2, r3, #1
|
||
8005d78: 60ba str r2, [r7, #8]
|
||
8005d7a: 2200 movs r2, #0
|
||
8005d7c: 701a strb r2, [r3, #0]
|
||
8005d7e: 7dbb ldrb r3, [r7, #22]
|
||
8005d80: 3301 adds r3, #1
|
||
8005d82: 75bb strb r3, [r7, #22]
|
||
8005d84: 7dba ldrb r2, [r7, #22]
|
||
8005d86: 7d7b ldrb r3, [r7, #21]
|
||
8005d88: 429a cmp r2, r3
|
||
8005d8a: d3f3 bcc.n 8005d74 <Get_HzMat+0x64>
|
||
return; //��������
|
||
8005d8c: e041 b.n 8005e12 <Get_HzMat+0x102>
|
||
}
|
||
if(ql<0x7f)ql-=0x40;//ע��!
|
||
8005d8e: 7dfb ldrb r3, [r7, #23]
|
||
8005d90: 2b7e cmp r3, #126 ; 0x7e
|
||
8005d92: d803 bhi.n 8005d9c <Get_HzMat+0x8c>
|
||
8005d94: 7dfb ldrb r3, [r7, #23]
|
||
8005d96: 3b40 subs r3, #64 ; 0x40
|
||
8005d98: 75fb strb r3, [r7, #23]
|
||
8005d9a: e002 b.n 8005da2 <Get_HzMat+0x92>
|
||
else ql-=0x41;
|
||
8005d9c: 7dfb ldrb r3, [r7, #23]
|
||
8005d9e: 3b41 subs r3, #65 ; 0x41
|
||
8005da0: 75fb strb r3, [r7, #23]
|
||
qh-=0x81;
|
||
8005da2: 7d3b ldrb r3, [r7, #20]
|
||
8005da4: 337f adds r3, #127 ; 0x7f
|
||
8005da6: 753b strb r3, [r7, #20]
|
||
foffset=((unsigned long)190*qh+ql)*csize; //�õ��ֿ��е��ֽ�ƫ����
|
||
8005da8: 7d3b ldrb r3, [r7, #20]
|
||
8005daa: 22be movs r2, #190 ; 0xbe
|
||
8005dac: fb02 f203 mul.w r2, r2, r3
|
||
8005db0: 7dfb ldrb r3, [r7, #23]
|
||
8005db2: 4413 add r3, r2
|
||
8005db4: 7d7a ldrb r2, [r7, #21]
|
||
8005db6: fb02 f303 mul.w r3, r2, r3
|
||
8005dba: 613b str r3, [r7, #16]
|
||
switch(size)
|
||
8005dbc: 79fb ldrb r3, [r7, #7]
|
||
8005dbe: 2b18 cmp r3, #24
|
||
8005dc0: d01c beq.n 8005dfc <Get_HzMat+0xec>
|
||
8005dc2: 2b18 cmp r3, #24
|
||
8005dc4: dc25 bgt.n 8005e12 <Get_HzMat+0x102>
|
||
8005dc6: 2b0c cmp r3, #12
|
||
8005dc8: d002 beq.n 8005dd0 <Get_HzMat+0xc0>
|
||
8005dca: 2b10 cmp r3, #16
|
||
8005dcc: d00b beq.n 8005de6 <Get_HzMat+0xd6>
|
||
8005dce: e020 b.n 8005e12 <Get_HzMat+0x102>
|
||
{
|
||
case 12:
|
||
W25QXX_Read(mat,foffset+ftinfo.f12addr,csize);
|
||
8005dd0: 4b11 ldr r3, [pc, #68] ; (8005e18 <Get_HzMat+0x108>)
|
||
8005dd2: 68da ldr r2, [r3, #12]
|
||
8005dd4: 693b ldr r3, [r7, #16]
|
||
8005dd6: 4413 add r3, r2
|
||
8005dd8: 7d7a ldrb r2, [r7, #21]
|
||
8005dda: b292 uxth r2, r2
|
||
8005ddc: 4619 mov r1, r3
|
||
8005dde: 68b8 ldr r0, [r7, #8]
|
||
8005de0: f7fe fdd4 bl 800498c <W25QXX_Read>
|
||
break;
|
||
8005de4: e015 b.n 8005e12 <Get_HzMat+0x102>
|
||
case 16:
|
||
W25QXX_Read(mat,foffset+ftinfo.f16addr,csize);
|
||
8005de6: 4b0c ldr r3, [pc, #48] ; (8005e18 <Get_HzMat+0x108>)
|
||
8005de8: 695a ldr r2, [r3, #20]
|
||
8005dea: 693b ldr r3, [r7, #16]
|
||
8005dec: 4413 add r3, r2
|
||
8005dee: 7d7a ldrb r2, [r7, #21]
|
||
8005df0: b292 uxth r2, r2
|
||
8005df2: 4619 mov r1, r3
|
||
8005df4: 68b8 ldr r0, [r7, #8]
|
||
8005df6: f7fe fdc9 bl 800498c <W25QXX_Read>
|
||
break;
|
||
8005dfa: e00a b.n 8005e12 <Get_HzMat+0x102>
|
||
case 24:
|
||
W25QXX_Read(mat,foffset+ftinfo.f24addr,csize);
|
||
8005dfc: 4b06 ldr r3, [pc, #24] ; (8005e18 <Get_HzMat+0x108>)
|
||
8005dfe: 69da ldr r2, [r3, #28]
|
||
8005e00: 693b ldr r3, [r7, #16]
|
||
8005e02: 4413 add r3, r2
|
||
8005e04: 7d7a ldrb r2, [r7, #21]
|
||
8005e06: b292 uxth r2, r2
|
||
8005e08: 4619 mov r1, r3
|
||
8005e0a: 68b8 ldr r0, [r7, #8]
|
||
8005e0c: f7fe fdbe bl 800498c <W25QXX_Read>
|
||
break;
|
||
8005e10: bf00 nop
|
||
|
||
}
|
||
}
|
||
8005e12: 3718 adds r7, #24
|
||
8005e14: 46bd mov sp, r7
|
||
8005e16: bd80 pop {r7, pc}
|
||
8005e18: 20000830 .word 0x20000830
|
||
|
||
08005e1c <Show_Font>:
|
||
//x,y :���ֵ�����
|
||
//font:����GBK��
|
||
//size:������С
|
||
//mode:0,������ʾ,1,������ʾ
|
||
void Show_Font(uint16_t x,uint16_t y,uint8_t *font,uint8_t size,uint16_t bg,uint16_t color)
|
||
{
|
||
8005e1c: b580 push {r7, lr}
|
||
8005e1e: b098 sub sp, #96 ; 0x60
|
||
8005e20: af00 add r7, sp, #0
|
||
8005e22: 60ba str r2, [r7, #8]
|
||
8005e24: 461a mov r2, r3
|
||
8005e26: 4603 mov r3, r0
|
||
8005e28: 81fb strh r3, [r7, #14]
|
||
8005e2a: 460b mov r3, r1
|
||
8005e2c: 81bb strh r3, [r7, #12]
|
||
8005e2e: 4613 mov r3, r2
|
||
8005e30: 71fb strb r3, [r7, #7]
|
||
uint8_t temp,t,t1;
|
||
uint16_t y0=y;
|
||
8005e32: 89bb ldrh r3, [r7, #12]
|
||
8005e34: f8a7 305a strh.w r3, [r7, #90] ; 0x5a
|
||
uint8_t dzk[72];
|
||
uint8_t csize=(size/8+((size%8)?1:0))*(size);//�õ�����һ���ַ���Ӧ��������ռ���ֽ���
|
||
8005e38: 79fb ldrb r3, [r7, #7]
|
||
8005e3a: 08db lsrs r3, r3, #3
|
||
8005e3c: b2db uxtb r3, r3
|
||
8005e3e: 461a mov r2, r3
|
||
8005e40: 79fb ldrb r3, [r7, #7]
|
||
8005e42: f003 0307 and.w r3, r3, #7
|
||
8005e46: b2db uxtb r3, r3
|
||
8005e48: 2b00 cmp r3, #0
|
||
8005e4a: bf14 ite ne
|
||
8005e4c: 2301 movne r3, #1
|
||
8005e4e: 2300 moveq r3, #0
|
||
8005e50: b2db uxtb r3, r3
|
||
8005e52: 4413 add r3, r2
|
||
8005e54: b2db uxtb r3, r3
|
||
8005e56: 79fa ldrb r2, [r7, #7]
|
||
8005e58: fb02 f303 mul.w r3, r2, r3
|
||
8005e5c: f887 3059 strb.w r3, [r7, #89] ; 0x59
|
||
if(size!=12&&size!=16)return; //��֧�ֵ�size
|
||
8005e60: 79fb ldrb r3, [r7, #7]
|
||
8005e62: 2b0c cmp r3, #12
|
||
8005e64: d002 beq.n 8005e6c <Show_Font+0x50>
|
||
8005e66: 79fb ldrb r3, [r7, #7]
|
||
8005e68: 2b10 cmp r3, #16
|
||
8005e6a: d15b bne.n 8005f24 <Show_Font+0x108>
|
||
Get_HzMat(font,dzk,size); //�õ���Ӧ��С�ĵ�������
|
||
8005e6c: 79fa ldrb r2, [r7, #7]
|
||
8005e6e: f107 0310 add.w r3, r7, #16
|
||
8005e72: 4619 mov r1, r3
|
||
8005e74: 68b8 ldr r0, [r7, #8]
|
||
8005e76: f7ff ff4b bl 8005d10 <Get_HzMat>
|
||
for(t=0;t<csize;t++)
|
||
8005e7a: 2300 movs r3, #0
|
||
8005e7c: f887 305e strb.w r3, [r7, #94] ; 0x5e
|
||
8005e80: e049 b.n 8005f16 <Show_Font+0xfa>
|
||
{
|
||
temp=dzk[t]; //�õ���������
|
||
8005e82: f897 305e ldrb.w r3, [r7, #94] ; 0x5e
|
||
8005e86: f107 0260 add.w r2, r7, #96 ; 0x60
|
||
8005e8a: 4413 add r3, r2
|
||
8005e8c: f813 3c50 ldrb.w r3, [r3, #-80]
|
||
8005e90: f887 305f strb.w r3, [r7, #95] ; 0x5f
|
||
for(t1=0;t1<8;t1++)
|
||
8005e94: 2300 movs r3, #0
|
||
8005e96: f887 305d strb.w r3, [r7, #93] ; 0x5d
|
||
8005e9a: e033 b.n 8005f04 <Show_Font+0xe8>
|
||
{
|
||
if(temp&0x80){LCD_set_dot(x,y,color);}else{if(bg!=color){LCD_set_dot(x,y,bg);}}
|
||
8005e9c: f997 305f ldrsb.w r3, [r7, #95] ; 0x5f
|
||
8005ea0: 2b00 cmp r3, #0
|
||
8005ea2: da07 bge.n 8005eb4 <Show_Font+0x98>
|
||
8005ea4: f8b7 206c ldrh.w r2, [r7, #108] ; 0x6c
|
||
8005ea8: 89b9 ldrh r1, [r7, #12]
|
||
8005eaa: 89fb ldrh r3, [r7, #14]
|
||
8005eac: 4618 mov r0, r3
|
||
8005eae: f7ff fe8f bl 8005bd0 <LCD_set_dot>
|
||
8005eb2: e00c b.n 8005ece <Show_Font+0xb2>
|
||
8005eb4: f8b7 2068 ldrh.w r2, [r7, #104] ; 0x68
|
||
8005eb8: f8b7 306c ldrh.w r3, [r7, #108] ; 0x6c
|
||
8005ebc: 429a cmp r2, r3
|
||
8005ebe: d006 beq.n 8005ece <Show_Font+0xb2>
|
||
8005ec0: f8b7 2068 ldrh.w r2, [r7, #104] ; 0x68
|
||
8005ec4: 89b9 ldrh r1, [r7, #12]
|
||
8005ec6: 89fb ldrh r3, [r7, #14]
|
||
8005ec8: 4618 mov r0, r3
|
||
8005eca: f7ff fe81 bl 8005bd0 <LCD_set_dot>
|
||
temp<<=1;
|
||
8005ece: f897 305f ldrb.w r3, [r7, #95] ; 0x5f
|
||
8005ed2: 005b lsls r3, r3, #1
|
||
8005ed4: f887 305f strb.w r3, [r7, #95] ; 0x5f
|
||
y++;
|
||
8005ed8: 89bb ldrh r3, [r7, #12]
|
||
8005eda: 3301 adds r3, #1
|
||
8005edc: 81bb strh r3, [r7, #12]
|
||
if((y-y0)==size)
|
||
8005ede: 89ba ldrh r2, [r7, #12]
|
||
8005ee0: f8b7 305a ldrh.w r3, [r7, #90] ; 0x5a
|
||
8005ee4: 1ad2 subs r2, r2, r3
|
||
8005ee6: 79fb ldrb r3, [r7, #7]
|
||
8005ee8: 429a cmp r2, r3
|
||
8005eea: d106 bne.n 8005efa <Show_Font+0xde>
|
||
{
|
||
y=y0;
|
||
8005eec: f8b7 305a ldrh.w r3, [r7, #90] ; 0x5a
|
||
8005ef0: 81bb strh r3, [r7, #12]
|
||
x++;
|
||
8005ef2: 89fb ldrh r3, [r7, #14]
|
||
8005ef4: 3301 adds r3, #1
|
||
8005ef6: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8005ef8: e008 b.n 8005f0c <Show_Font+0xf0>
|
||
for(t1=0;t1<8;t1++)
|
||
8005efa: f897 305d ldrb.w r3, [r7, #93] ; 0x5d
|
||
8005efe: 3301 adds r3, #1
|
||
8005f00: f887 305d strb.w r3, [r7, #93] ; 0x5d
|
||
8005f04: f897 305d ldrb.w r3, [r7, #93] ; 0x5d
|
||
8005f08: 2b07 cmp r3, #7
|
||
8005f0a: d9c7 bls.n 8005e9c <Show_Font+0x80>
|
||
for(t=0;t<csize;t++)
|
||
8005f0c: f897 305e ldrb.w r3, [r7, #94] ; 0x5e
|
||
8005f10: 3301 adds r3, #1
|
||
8005f12: f887 305e strb.w r3, [r7, #94] ; 0x5e
|
||
8005f16: f897 205e ldrb.w r2, [r7, #94] ; 0x5e
|
||
8005f1a: f897 3059 ldrb.w r3, [r7, #89] ; 0x59
|
||
8005f1e: 429a cmp r2, r3
|
||
8005f20: d3af bcc.n 8005e82 <Show_Font+0x66>
|
||
8005f22: e000 b.n 8005f26 <Show_Font+0x10a>
|
||
if(size!=12&&size!=16)return; //��֧�ֵ�size
|
||
8005f24: bf00 nop
|
||
}
|
||
}
|
||
}
|
||
}
|
||
8005f26: 3760 adds r7, #96 ; 0x60
|
||
8005f28: 46bd mov sp, r7
|
||
8005f2a: bd80 pop {r7, pc}
|
||
|
||
08005f2c <LCD_ShowChar>:
|
||
//num:Ҫ��ʾ���ַ�:" "--->"~"
|
||
//size:������С 12/16
|
||
//mode:���ӷ�ʽ(1)���Ƿǵ��ӷ�ʽ(0)
|
||
|
||
void LCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint16_t bg,uint16_t color)
|
||
{
|
||
8005f2c: b590 push {r4, r7, lr}
|
||
8005f2e: b085 sub sp, #20
|
||
8005f30: af00 add r7, sp, #0
|
||
8005f32: 4604 mov r4, r0
|
||
8005f34: 4608 mov r0, r1
|
||
8005f36: 4611 mov r1, r2
|
||
8005f38: 461a mov r2, r3
|
||
8005f3a: 4623 mov r3, r4
|
||
8005f3c: 80fb strh r3, [r7, #6]
|
||
8005f3e: 4603 mov r3, r0
|
||
8005f40: 80bb strh r3, [r7, #4]
|
||
8005f42: 460b mov r3, r1
|
||
8005f44: 70fb strb r3, [r7, #3]
|
||
8005f46: 4613 mov r3, r2
|
||
8005f48: 70bb strb r3, [r7, #2]
|
||
uint8_t temp,t1,t;
|
||
uint16_t y0=y;
|
||
8005f4a: 88bb ldrh r3, [r7, #4]
|
||
8005f4c: 817b strh r3, [r7, #10]
|
||
|
||
//����
|
||
num=num-' ';//�õ�ƫ�ƺ���ֵ
|
||
8005f4e: 78fb ldrb r3, [r7, #3]
|
||
8005f50: 3b20 subs r3, #32
|
||
8005f52: 70fb strb r3, [r7, #3]
|
||
|
||
for(t=0;t<size;t++)
|
||
8005f54: 2300 movs r3, #0
|
||
8005f56: 737b strb r3, [r7, #13]
|
||
8005f58: e055 b.n 8006006 <LCD_ShowChar+0xda>
|
||
{
|
||
if(size==12){temp=asc2_1206[num][t];} //����1206����
|
||
8005f5a: 78bb ldrb r3, [r7, #2]
|
||
8005f5c: 2b0c cmp r3, #12
|
||
8005f5e: d10b bne.n 8005f78 <LCD_ShowChar+0x4c>
|
||
8005f60: 78fa ldrb r2, [r7, #3]
|
||
8005f62: 7b79 ldrb r1, [r7, #13]
|
||
8005f64: 482c ldr r0, [pc, #176] ; (8006018 <LCD_ShowChar+0xec>)
|
||
8005f66: 4613 mov r3, r2
|
||
8005f68: 005b lsls r3, r3, #1
|
||
8005f6a: 4413 add r3, r2
|
||
8005f6c: 009b lsls r3, r3, #2
|
||
8005f6e: 4403 add r3, r0
|
||
8005f70: 440b add r3, r1
|
||
8005f72: 781b ldrb r3, [r3, #0]
|
||
8005f74: 73fb strb r3, [r7, #15]
|
||
8005f76: e007 b.n 8005f88 <LCD_ShowChar+0x5c>
|
||
else{ temp=asc2_1608[num][t]; } //����1608����
|
||
8005f78: 78fa ldrb r2, [r7, #3]
|
||
8005f7a: 7b7b ldrb r3, [r7, #13]
|
||
8005f7c: 4927 ldr r1, [pc, #156] ; (800601c <LCD_ShowChar+0xf0>)
|
||
8005f7e: 0112 lsls r2, r2, #4
|
||
8005f80: 440a add r2, r1
|
||
8005f82: 4413 add r3, r2
|
||
8005f84: 781b ldrb r3, [r3, #0]
|
||
8005f86: 73fb strb r3, [r7, #15]
|
||
for(t1=0;t1<8;t1++)
|
||
8005f88: 2300 movs r3, #0
|
||
8005f8a: 73bb strb r3, [r7, #14]
|
||
8005f8c: e033 b.n 8005ff6 <LCD_ShowChar+0xca>
|
||
{
|
||
if(temp&0x80){LCD_set_dot(x,y,color);}else{if(bg!=color){LCD_set_dot(x,y,bg);}}
|
||
8005f8e: f997 300f ldrsb.w r3, [r7, #15]
|
||
8005f92: 2b00 cmp r3, #0
|
||
8005f94: da06 bge.n 8005fa4 <LCD_ShowChar+0x78>
|
||
8005f96: 8cba ldrh r2, [r7, #36] ; 0x24
|
||
8005f98: 88b9 ldrh r1, [r7, #4]
|
||
8005f9a: 88fb ldrh r3, [r7, #6]
|
||
8005f9c: 4618 mov r0, r3
|
||
8005f9e: f7ff fe17 bl 8005bd0 <LCD_set_dot>
|
||
8005fa2: e009 b.n 8005fb8 <LCD_ShowChar+0x8c>
|
||
8005fa4: 8c3a ldrh r2, [r7, #32]
|
||
8005fa6: 8cbb ldrh r3, [r7, #36] ; 0x24
|
||
8005fa8: 429a cmp r2, r3
|
||
8005faa: d005 beq.n 8005fb8 <LCD_ShowChar+0x8c>
|
||
8005fac: 8c3a ldrh r2, [r7, #32]
|
||
8005fae: 88b9 ldrh r1, [r7, #4]
|
||
8005fb0: 88fb ldrh r3, [r7, #6]
|
||
8005fb2: 4618 mov r0, r3
|
||
8005fb4: f7ff fe0c bl 8005bd0 <LCD_set_dot>
|
||
temp<<=1;
|
||
8005fb8: 7bfb ldrb r3, [r7, #15]
|
||
8005fba: 005b lsls r3, r3, #1
|
||
8005fbc: 73fb strb r3, [r7, #15]
|
||
y++;
|
||
8005fbe: 88bb ldrh r3, [r7, #4]
|
||
8005fc0: 3301 adds r3, #1
|
||
8005fc2: 80bb strh r3, [r7, #4]
|
||
if(x>=lcddev.width){return;}//��������
|
||
8005fc4: 4b16 ldr r3, [pc, #88] ; (8006020 <LCD_ShowChar+0xf4>)
|
||
8005fc6: 881b ldrh r3, [r3, #0]
|
||
8005fc8: 88fa ldrh r2, [r7, #6]
|
||
8005fca: 429a cmp r2, r3
|
||
8005fcc: d220 bcs.n 8006010 <LCD_ShowChar+0xe4>
|
||
if((y-y0)==size)
|
||
8005fce: 88ba ldrh r2, [r7, #4]
|
||
8005fd0: 897b ldrh r3, [r7, #10]
|
||
8005fd2: 1ad2 subs r2, r2, r3
|
||
8005fd4: 78bb ldrb r3, [r7, #2]
|
||
8005fd6: 429a cmp r2, r3
|
||
8005fd8: d10a bne.n 8005ff0 <LCD_ShowChar+0xc4>
|
||
{
|
||
y=y0;
|
||
8005fda: 897b ldrh r3, [r7, #10]
|
||
8005fdc: 80bb strh r3, [r7, #4]
|
||
x++;
|
||
8005fde: 88fb ldrh r3, [r7, #6]
|
||
8005fe0: 3301 adds r3, #1
|
||
8005fe2: 80fb strh r3, [r7, #6]
|
||
if(x>=lcddev.width){return;}//��������
|
||
8005fe4: 4b0e ldr r3, [pc, #56] ; (8006020 <LCD_ShowChar+0xf4>)
|
||
8005fe6: 881b ldrh r3, [r3, #0]
|
||
8005fe8: 88fa ldrh r2, [r7, #6]
|
||
8005fea: 429a cmp r2, r3
|
||
8005fec: d307 bcc.n 8005ffe <LCD_ShowChar+0xd2>
|
||
8005fee: e010 b.n 8006012 <LCD_ShowChar+0xe6>
|
||
for(t1=0;t1<8;t1++)
|
||
8005ff0: 7bbb ldrb r3, [r7, #14]
|
||
8005ff2: 3301 adds r3, #1
|
||
8005ff4: 73bb strb r3, [r7, #14]
|
||
8005ff6: 7bbb ldrb r3, [r7, #14]
|
||
8005ff8: 2b07 cmp r3, #7
|
||
8005ffa: d9c8 bls.n 8005f8e <LCD_ShowChar+0x62>
|
||
8005ffc: e000 b.n 8006000 <LCD_ShowChar+0xd4>
|
||
break;
|
||
8005ffe: bf00 nop
|
||
for(t=0;t<size;t++)
|
||
8006000: 7b7b ldrb r3, [r7, #13]
|
||
8006002: 3301 adds r3, #1
|
||
8006004: 737b strb r3, [r7, #13]
|
||
8006006: 7b7a ldrb r2, [r7, #13]
|
||
8006008: 78bb ldrb r3, [r7, #2]
|
||
800600a: 429a cmp r2, r3
|
||
800600c: d3a5 bcc.n 8005f5a <LCD_ShowChar+0x2e>
|
||
800600e: e000 b.n 8006012 <LCD_ShowChar+0xe6>
|
||
if(x>=lcddev.width){return;}//��������
|
||
8006010: bf00 nop
|
||
}
|
||
}
|
||
|
||
|
||
|
||
}
|
||
8006012: 3714 adds r7, #20
|
||
8006014: 46bd mov sp, r7
|
||
8006016: bd90 pop {r4, r7, pc}
|
||
8006018: 08006af8 .word 0x08006af8
|
||
800601c: 08006f6c .word 0x08006f6c
|
||
8006020: 20000824 .word 0x20000824
|
||
|
||
08006024 <LCD_ShowString>:
|
||
//width,height:������С
|
||
//size:������С
|
||
//*p:�ַ�����ʼ��ַ
|
||
|
||
void LCD_ShowString(uint16_t x,uint16_t y,uint8_t *p,uint8_t size,uint16_t bg,uint16_t color,uint16_t len)
|
||
{
|
||
8006024: b590 push {r4, r7, lr}
|
||
8006026: b087 sub sp, #28
|
||
8006028: af02 add r7, sp, #8
|
||
800602a: 60ba str r2, [r7, #8]
|
||
800602c: 461a mov r2, r3
|
||
800602e: 4603 mov r3, r0
|
||
8006030: 81fb strh r3, [r7, #14]
|
||
8006032: 460b mov r3, r1
|
||
8006034: 81bb strh r3, [r7, #12]
|
||
8006036: 4613 mov r3, r2
|
||
8006038: 71fb strb r3, [r7, #7]
|
||
while(len--)
|
||
800603a: e057 b.n 80060ec <LCD_ShowString+0xc8>
|
||
{
|
||
|
||
if(x>=lcddev.width)
|
||
800603c: 4b31 ldr r3, [pc, #196] ; (8006104 <LCD_ShowString+0xe0>)
|
||
800603e: 881b ldrh r3, [r3, #0]
|
||
8006040: 89fa ldrh r2, [r7, #14]
|
||
8006042: 429a cmp r2, r3
|
||
8006044: d306 bcc.n 8006054 <LCD_ShowString+0x30>
|
||
{
|
||
x=0;
|
||
8006046: 2300 movs r3, #0
|
||
8006048: 81fb strh r3, [r7, #14]
|
||
y+=size;
|
||
800604a: 79fb ldrb r3, [r7, #7]
|
||
800604c: b29a uxth r2, r3
|
||
800604e: 89bb ldrh r3, [r7, #12]
|
||
8006050: 4413 add r3, r2
|
||
8006052: 81bb strh r3, [r7, #12]
|
||
}
|
||
if(*p=='\0')
|
||
8006054: 68bb ldr r3, [r7, #8]
|
||
8006056: 781b ldrb r3, [r3, #0]
|
||
8006058: 2b00 cmp r3, #0
|
||
800605a: d04d beq.n 80060f8 <LCD_ShowString+0xd4>
|
||
{
|
||
return;
|
||
}
|
||
if(*p=='\r')
|
||
800605c: 68bb ldr r3, [r7, #8]
|
||
800605e: 781b ldrb r3, [r3, #0]
|
||
8006060: 2b0d cmp r3, #13
|
||
8006062: d106 bne.n 8006072 <LCD_ShowString+0x4e>
|
||
{
|
||
p++;
|
||
8006064: 68bb ldr r3, [r7, #8]
|
||
8006066: 3301 adds r3, #1
|
||
8006068: 60bb str r3, [r7, #8]
|
||
if(*p!='\n')
|
||
800606a: 68bb ldr r3, [r7, #8]
|
||
800606c: 781b ldrb r3, [r3, #0]
|
||
800606e: 2b0a cmp r3, #10
|
||
8006070: d144 bne.n 80060fc <LCD_ShowString+0xd8>
|
||
{
|
||
return ;
|
||
}
|
||
}
|
||
if(*p=='\n')
|
||
8006072: 68bb ldr r3, [r7, #8]
|
||
8006074: 781b ldrb r3, [r3, #0]
|
||
8006076: 2b0a cmp r3, #10
|
||
8006078: d109 bne.n 800608e <LCD_ShowString+0x6a>
|
||
{
|
||
x=0;
|
||
800607a: 2300 movs r3, #0
|
||
800607c: 81fb strh r3, [r7, #14]
|
||
y+=size;
|
||
800607e: 79fb ldrb r3, [r7, #7]
|
||
8006080: b29a uxth r2, r3
|
||
8006082: 89bb ldrh r3, [r7, #12]
|
||
8006084: 4413 add r3, r2
|
||
8006086: 81bb strh r3, [r7, #12]
|
||
p++;
|
||
8006088: 68bb ldr r3, [r7, #8]
|
||
800608a: 3301 adds r3, #1
|
||
800608c: 60bb str r3, [r7, #8]
|
||
}
|
||
if(*p>127)
|
||
800608e: 68bb ldr r3, [r7, #8]
|
||
8006090: 781b ldrb r3, [r3, #0]
|
||
8006092: b25b sxtb r3, r3
|
||
8006094: 2b00 cmp r3, #0
|
||
8006096: da13 bge.n 80060c0 <LCD_ShowString+0x9c>
|
||
{
|
||
|
||
|
||
Show_Font(x,y,p,size,bg,color);
|
||
8006098: 79fa ldrb r2, [r7, #7]
|
||
800609a: 89b9 ldrh r1, [r7, #12]
|
||
800609c: 89f8 ldrh r0, [r7, #14]
|
||
800609e: 8cbb ldrh r3, [r7, #36] ; 0x24
|
||
80060a0: 9301 str r3, [sp, #4]
|
||
80060a2: 8c3b ldrh r3, [r7, #32]
|
||
80060a4: 9300 str r3, [sp, #0]
|
||
80060a6: 4613 mov r3, r2
|
||
80060a8: 68ba ldr r2, [r7, #8]
|
||
80060aa: f7ff feb7 bl 8005e1c <Show_Font>
|
||
p++;
|
||
80060ae: 68bb ldr r3, [r7, #8]
|
||
80060b0: 3301 adds r3, #1
|
||
80060b2: 60bb str r3, [r7, #8]
|
||
x+=size;
|
||
80060b4: 79fb ldrb r3, [r7, #7]
|
||
80060b6: b29a uxth r2, r3
|
||
80060b8: 89fb ldrh r3, [r7, #14]
|
||
80060ba: 4413 add r3, r2
|
||
80060bc: 81fb strh r3, [r7, #14]
|
||
80060be: e012 b.n 80060e6 <LCD_ShowString+0xc2>
|
||
}else
|
||
{
|
||
LCD_ShowChar(x,y,*p,size,bg,color);
|
||
80060c0: 68bb ldr r3, [r7, #8]
|
||
80060c2: 781a ldrb r2, [r3, #0]
|
||
80060c4: 79fc ldrb r4, [r7, #7]
|
||
80060c6: 89b9 ldrh r1, [r7, #12]
|
||
80060c8: 89f8 ldrh r0, [r7, #14]
|
||
80060ca: 8cbb ldrh r3, [r7, #36] ; 0x24
|
||
80060cc: 9301 str r3, [sp, #4]
|
||
80060ce: 8c3b ldrh r3, [r7, #32]
|
||
80060d0: 9300 str r3, [sp, #0]
|
||
80060d2: 4623 mov r3, r4
|
||
80060d4: f7ff ff2a bl 8005f2c <LCD_ShowChar>
|
||
x+=(size/2);
|
||
80060d8: 79fb ldrb r3, [r7, #7]
|
||
80060da: 085b lsrs r3, r3, #1
|
||
80060dc: b2db uxtb r3, r3
|
||
80060de: b29a uxth r2, r3
|
||
80060e0: 89fb ldrh r3, [r7, #14]
|
||
80060e2: 4413 add r3, r2
|
||
80060e4: 81fb strh r3, [r7, #14]
|
||
}
|
||
p++;
|
||
80060e6: 68bb ldr r3, [r7, #8]
|
||
80060e8: 3301 adds r3, #1
|
||
80060ea: 60bb str r3, [r7, #8]
|
||
while(len--)
|
||
80060ec: 8d3b ldrh r3, [r7, #40] ; 0x28
|
||
80060ee: 1e5a subs r2, r3, #1
|
||
80060f0: 853a strh r2, [r7, #40] ; 0x28
|
||
80060f2: 2b00 cmp r3, #0
|
||
80060f4: d1a2 bne.n 800603c <LCD_ShowString+0x18>
|
||
80060f6: e002 b.n 80060fe <LCD_ShowString+0xda>
|
||
return;
|
||
80060f8: bf00 nop
|
||
80060fa: e000 b.n 80060fe <LCD_ShowString+0xda>
|
||
return ;
|
||
80060fc: bf00 nop
|
||
|
||
}
|
||
}
|
||
80060fe: 3714 adds r7, #20
|
||
8006100: 46bd mov sp, r7
|
||
8006102: bd90 pop {r4, r7, pc}
|
||
8006104: 20000824 .word 0x20000824
|
||
|
||
08006108 <__errno>:
|
||
8006108: 4b01 ldr r3, [pc, #4] ; (8006110 <__errno+0x8>)
|
||
800610a: 6818 ldr r0, [r3, #0]
|
||
800610c: 4770 bx lr
|
||
800610e: bf00 nop
|
||
8006110: 20000024 .word 0x20000024
|
||
|
||
08006114 <__libc_init_array>:
|
||
8006114: b570 push {r4, r5, r6, lr}
|
||
8006116: 2600 movs r6, #0
|
||
8006118: 4d0c ldr r5, [pc, #48] ; (800614c <__libc_init_array+0x38>)
|
||
800611a: 4c0d ldr r4, [pc, #52] ; (8006150 <__libc_init_array+0x3c>)
|
||
800611c: 1b64 subs r4, r4, r5
|
||
800611e: 10a4 asrs r4, r4, #2
|
||
8006120: 42a6 cmp r6, r4
|
||
8006122: d109 bne.n 8006138 <__libc_init_array+0x24>
|
||
8006124: f000 fc5c bl 80069e0 <_init>
|
||
8006128: 2600 movs r6, #0
|
||
800612a: 4d0a ldr r5, [pc, #40] ; (8006154 <__libc_init_array+0x40>)
|
||
800612c: 4c0a ldr r4, [pc, #40] ; (8006158 <__libc_init_array+0x44>)
|
||
800612e: 1b64 subs r4, r4, r5
|
||
8006130: 10a4 asrs r4, r4, #2
|
||
8006132: 42a6 cmp r6, r4
|
||
8006134: d105 bne.n 8006142 <__libc_init_array+0x2e>
|
||
8006136: bd70 pop {r4, r5, r6, pc}
|
||
8006138: f855 3b04 ldr.w r3, [r5], #4
|
||
800613c: 4798 blx r3
|
||
800613e: 3601 adds r6, #1
|
||
8006140: e7ee b.n 8006120 <__libc_init_array+0xc>
|
||
8006142: f855 3b04 ldr.w r3, [r5], #4
|
||
8006146: 4798 blx r3
|
||
8006148: 3601 adds r6, #1
|
||
800614a: e7f2 b.n 8006132 <__libc_init_array+0x1e>
|
||
800614c: 08007590 .word 0x08007590
|
||
8006150: 08007590 .word 0x08007590
|
||
8006154: 08007590 .word 0x08007590
|
||
8006158: 08007594 .word 0x08007594
|
||
|
||
0800615c <memset>:
|
||
800615c: 4603 mov r3, r0
|
||
800615e: 4402 add r2, r0
|
||
8006160: 4293 cmp r3, r2
|
||
8006162: d100 bne.n 8006166 <memset+0xa>
|
||
8006164: 4770 bx lr
|
||
8006166: f803 1b01 strb.w r1, [r3], #1
|
||
800616a: e7f9 b.n 8006160 <memset+0x4>
|
||
|
||
0800616c <siprintf>:
|
||
800616c: b40e push {r1, r2, r3}
|
||
800616e: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000
|
||
8006172: b500 push {lr}
|
||
8006174: b09c sub sp, #112 ; 0x70
|
||
8006176: ab1d add r3, sp, #116 ; 0x74
|
||
8006178: 9002 str r0, [sp, #8]
|
||
800617a: 9006 str r0, [sp, #24]
|
||
800617c: 9107 str r1, [sp, #28]
|
||
800617e: 9104 str r1, [sp, #16]
|
||
8006180: 4808 ldr r0, [pc, #32] ; (80061a4 <siprintf+0x38>)
|
||
8006182: 4909 ldr r1, [pc, #36] ; (80061a8 <siprintf+0x3c>)
|
||
8006184: f853 2b04 ldr.w r2, [r3], #4
|
||
8006188: 9105 str r1, [sp, #20]
|
||
800618a: 6800 ldr r0, [r0, #0]
|
||
800618c: a902 add r1, sp, #8
|
||
800618e: 9301 str r3, [sp, #4]
|
||
8006190: f000 f868 bl 8006264 <_svfiprintf_r>
|
||
8006194: 2200 movs r2, #0
|
||
8006196: 9b02 ldr r3, [sp, #8]
|
||
8006198: 701a strb r2, [r3, #0]
|
||
800619a: b01c add sp, #112 ; 0x70
|
||
800619c: f85d eb04 ldr.w lr, [sp], #4
|
||
80061a0: b003 add sp, #12
|
||
80061a2: 4770 bx lr
|
||
80061a4: 20000024 .word 0x20000024
|
||
80061a8: ffff0208 .word 0xffff0208
|
||
|
||
080061ac <__ssputs_r>:
|
||
80061ac: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
80061b0: 688e ldr r6, [r1, #8]
|
||
80061b2: 4682 mov sl, r0
|
||
80061b4: 429e cmp r6, r3
|
||
80061b6: 460c mov r4, r1
|
||
80061b8: 4690 mov r8, r2
|
||
80061ba: 461f mov r7, r3
|
||
80061bc: d838 bhi.n 8006230 <__ssputs_r+0x84>
|
||
80061be: 898a ldrh r2, [r1, #12]
|
||
80061c0: f412 6f90 tst.w r2, #1152 ; 0x480
|
||
80061c4: d032 beq.n 800622c <__ssputs_r+0x80>
|
||
80061c6: 6825 ldr r5, [r4, #0]
|
||
80061c8: 6909 ldr r1, [r1, #16]
|
||
80061ca: 3301 adds r3, #1
|
||
80061cc: eba5 0901 sub.w r9, r5, r1
|
||
80061d0: 6965 ldr r5, [r4, #20]
|
||
80061d2: 444b add r3, r9
|
||
80061d4: eb05 0545 add.w r5, r5, r5, lsl #1
|
||
80061d8: eb05 75d5 add.w r5, r5, r5, lsr #31
|
||
80061dc: 106d asrs r5, r5, #1
|
||
80061de: 429d cmp r5, r3
|
||
80061e0: bf38 it cc
|
||
80061e2: 461d movcc r5, r3
|
||
80061e4: 0553 lsls r3, r2, #21
|
||
80061e6: d531 bpl.n 800624c <__ssputs_r+0xa0>
|
||
80061e8: 4629 mov r1, r5
|
||
80061ea: f000 fb53 bl 8006894 <_malloc_r>
|
||
80061ee: 4606 mov r6, r0
|
||
80061f0: b950 cbnz r0, 8006208 <__ssputs_r+0x5c>
|
||
80061f2: 230c movs r3, #12
|
||
80061f4: f04f 30ff mov.w r0, #4294967295
|
||
80061f8: f8ca 3000 str.w r3, [sl]
|
||
80061fc: 89a3 ldrh r3, [r4, #12]
|
||
80061fe: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8006202: 81a3 strh r3, [r4, #12]
|
||
8006204: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8006208: 464a mov r2, r9
|
||
800620a: 6921 ldr r1, [r4, #16]
|
||
800620c: f000 face bl 80067ac <memcpy>
|
||
8006210: 89a3 ldrh r3, [r4, #12]
|
||
8006212: f423 6390 bic.w r3, r3, #1152 ; 0x480
|
||
8006216: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
800621a: 81a3 strh r3, [r4, #12]
|
||
800621c: 6126 str r6, [r4, #16]
|
||
800621e: 444e add r6, r9
|
||
8006220: 6026 str r6, [r4, #0]
|
||
8006222: 463e mov r6, r7
|
||
8006224: 6165 str r5, [r4, #20]
|
||
8006226: eba5 0509 sub.w r5, r5, r9
|
||
800622a: 60a5 str r5, [r4, #8]
|
||
800622c: 42be cmp r6, r7
|
||
800622e: d900 bls.n 8006232 <__ssputs_r+0x86>
|
||
8006230: 463e mov r6, r7
|
||
8006232: 4632 mov r2, r6
|
||
8006234: 4641 mov r1, r8
|
||
8006236: 6820 ldr r0, [r4, #0]
|
||
8006238: f000 fac6 bl 80067c8 <memmove>
|
||
800623c: 68a3 ldr r3, [r4, #8]
|
||
800623e: 6822 ldr r2, [r4, #0]
|
||
8006240: 1b9b subs r3, r3, r6
|
||
8006242: 4432 add r2, r6
|
||
8006244: 2000 movs r0, #0
|
||
8006246: 60a3 str r3, [r4, #8]
|
||
8006248: 6022 str r2, [r4, #0]
|
||
800624a: e7db b.n 8006204 <__ssputs_r+0x58>
|
||
800624c: 462a mov r2, r5
|
||
800624e: f000 fb7b bl 8006948 <_realloc_r>
|
||
8006252: 4606 mov r6, r0
|
||
8006254: 2800 cmp r0, #0
|
||
8006256: d1e1 bne.n 800621c <__ssputs_r+0x70>
|
||
8006258: 4650 mov r0, sl
|
||
800625a: 6921 ldr r1, [r4, #16]
|
||
800625c: f000 face bl 80067fc <_free_r>
|
||
8006260: e7c7 b.n 80061f2 <__ssputs_r+0x46>
|
||
...
|
||
|
||
08006264 <_svfiprintf_r>:
|
||
8006264: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8006268: 4698 mov r8, r3
|
||
800626a: 898b ldrh r3, [r1, #12]
|
||
800626c: 4607 mov r7, r0
|
||
800626e: 061b lsls r3, r3, #24
|
||
8006270: 460d mov r5, r1
|
||
8006272: 4614 mov r4, r2
|
||
8006274: b09d sub sp, #116 ; 0x74
|
||
8006276: d50e bpl.n 8006296 <_svfiprintf_r+0x32>
|
||
8006278: 690b ldr r3, [r1, #16]
|
||
800627a: b963 cbnz r3, 8006296 <_svfiprintf_r+0x32>
|
||
800627c: 2140 movs r1, #64 ; 0x40
|
||
800627e: f000 fb09 bl 8006894 <_malloc_r>
|
||
8006282: 6028 str r0, [r5, #0]
|
||
8006284: 6128 str r0, [r5, #16]
|
||
8006286: b920 cbnz r0, 8006292 <_svfiprintf_r+0x2e>
|
||
8006288: 230c movs r3, #12
|
||
800628a: 603b str r3, [r7, #0]
|
||
800628c: f04f 30ff mov.w r0, #4294967295
|
||
8006290: e0d1 b.n 8006436 <_svfiprintf_r+0x1d2>
|
||
8006292: 2340 movs r3, #64 ; 0x40
|
||
8006294: 616b str r3, [r5, #20]
|
||
8006296: 2300 movs r3, #0
|
||
8006298: 9309 str r3, [sp, #36] ; 0x24
|
||
800629a: 2320 movs r3, #32
|
||
800629c: f88d 3029 strb.w r3, [sp, #41] ; 0x29
|
||
80062a0: 2330 movs r3, #48 ; 0x30
|
||
80062a2: f04f 0901 mov.w r9, #1
|
||
80062a6: f8cd 800c str.w r8, [sp, #12]
|
||
80062aa: f8df 81a4 ldr.w r8, [pc, #420] ; 8006450 <_svfiprintf_r+0x1ec>
|
||
80062ae: f88d 302a strb.w r3, [sp, #42] ; 0x2a
|
||
80062b2: 4623 mov r3, r4
|
||
80062b4: 469a mov sl, r3
|
||
80062b6: f813 2b01 ldrb.w r2, [r3], #1
|
||
80062ba: b10a cbz r2, 80062c0 <_svfiprintf_r+0x5c>
|
||
80062bc: 2a25 cmp r2, #37 ; 0x25
|
||
80062be: d1f9 bne.n 80062b4 <_svfiprintf_r+0x50>
|
||
80062c0: ebba 0b04 subs.w fp, sl, r4
|
||
80062c4: d00b beq.n 80062de <_svfiprintf_r+0x7a>
|
||
80062c6: 465b mov r3, fp
|
||
80062c8: 4622 mov r2, r4
|
||
80062ca: 4629 mov r1, r5
|
||
80062cc: 4638 mov r0, r7
|
||
80062ce: f7ff ff6d bl 80061ac <__ssputs_r>
|
||
80062d2: 3001 adds r0, #1
|
||
80062d4: f000 80aa beq.w 800642c <_svfiprintf_r+0x1c8>
|
||
80062d8: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
80062da: 445a add r2, fp
|
||
80062dc: 9209 str r2, [sp, #36] ; 0x24
|
||
80062de: f89a 3000 ldrb.w r3, [sl]
|
||
80062e2: 2b00 cmp r3, #0
|
||
80062e4: f000 80a2 beq.w 800642c <_svfiprintf_r+0x1c8>
|
||
80062e8: 2300 movs r3, #0
|
||
80062ea: f04f 32ff mov.w r2, #4294967295
|
||
80062ee: e9cd 2305 strd r2, r3, [sp, #20]
|
||
80062f2: f10a 0a01 add.w sl, sl, #1
|
||
80062f6: 9304 str r3, [sp, #16]
|
||
80062f8: 9307 str r3, [sp, #28]
|
||
80062fa: f88d 3053 strb.w r3, [sp, #83] ; 0x53
|
||
80062fe: 931a str r3, [sp, #104] ; 0x68
|
||
8006300: 4654 mov r4, sl
|
||
8006302: 2205 movs r2, #5
|
||
8006304: f814 1b01 ldrb.w r1, [r4], #1
|
||
8006308: 4851 ldr r0, [pc, #324] ; (8006450 <_svfiprintf_r+0x1ec>)
|
||
800630a: f000 fa41 bl 8006790 <memchr>
|
||
800630e: 9a04 ldr r2, [sp, #16]
|
||
8006310: b9d8 cbnz r0, 800634a <_svfiprintf_r+0xe6>
|
||
8006312: 06d0 lsls r0, r2, #27
|
||
8006314: bf44 itt mi
|
||
8006316: 2320 movmi r3, #32
|
||
8006318: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
800631c: 0711 lsls r1, r2, #28
|
||
800631e: bf44 itt mi
|
||
8006320: 232b movmi r3, #43 ; 0x2b
|
||
8006322: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
8006326: f89a 3000 ldrb.w r3, [sl]
|
||
800632a: 2b2a cmp r3, #42 ; 0x2a
|
||
800632c: d015 beq.n 800635a <_svfiprintf_r+0xf6>
|
||
800632e: 4654 mov r4, sl
|
||
8006330: 2000 movs r0, #0
|
||
8006332: f04f 0c0a mov.w ip, #10
|
||
8006336: 9a07 ldr r2, [sp, #28]
|
||
8006338: 4621 mov r1, r4
|
||
800633a: f811 3b01 ldrb.w r3, [r1], #1
|
||
800633e: 3b30 subs r3, #48 ; 0x30
|
||
8006340: 2b09 cmp r3, #9
|
||
8006342: d94e bls.n 80063e2 <_svfiprintf_r+0x17e>
|
||
8006344: b1b0 cbz r0, 8006374 <_svfiprintf_r+0x110>
|
||
8006346: 9207 str r2, [sp, #28]
|
||
8006348: e014 b.n 8006374 <_svfiprintf_r+0x110>
|
||
800634a: eba0 0308 sub.w r3, r0, r8
|
||
800634e: fa09 f303 lsl.w r3, r9, r3
|
||
8006352: 4313 orrs r3, r2
|
||
8006354: 46a2 mov sl, r4
|
||
8006356: 9304 str r3, [sp, #16]
|
||
8006358: e7d2 b.n 8006300 <_svfiprintf_r+0x9c>
|
||
800635a: 9b03 ldr r3, [sp, #12]
|
||
800635c: 1d19 adds r1, r3, #4
|
||
800635e: 681b ldr r3, [r3, #0]
|
||
8006360: 9103 str r1, [sp, #12]
|
||
8006362: 2b00 cmp r3, #0
|
||
8006364: bfbb ittet lt
|
||
8006366: 425b neglt r3, r3
|
||
8006368: f042 0202 orrlt.w r2, r2, #2
|
||
800636c: 9307 strge r3, [sp, #28]
|
||
800636e: 9307 strlt r3, [sp, #28]
|
||
8006370: bfb8 it lt
|
||
8006372: 9204 strlt r2, [sp, #16]
|
||
8006374: 7823 ldrb r3, [r4, #0]
|
||
8006376: 2b2e cmp r3, #46 ; 0x2e
|
||
8006378: d10c bne.n 8006394 <_svfiprintf_r+0x130>
|
||
800637a: 7863 ldrb r3, [r4, #1]
|
||
800637c: 2b2a cmp r3, #42 ; 0x2a
|
||
800637e: d135 bne.n 80063ec <_svfiprintf_r+0x188>
|
||
8006380: 9b03 ldr r3, [sp, #12]
|
||
8006382: 3402 adds r4, #2
|
||
8006384: 1d1a adds r2, r3, #4
|
||
8006386: 681b ldr r3, [r3, #0]
|
||
8006388: 9203 str r2, [sp, #12]
|
||
800638a: 2b00 cmp r3, #0
|
||
800638c: bfb8 it lt
|
||
800638e: f04f 33ff movlt.w r3, #4294967295
|
||
8006392: 9305 str r3, [sp, #20]
|
||
8006394: f8df a0c8 ldr.w sl, [pc, #200] ; 8006460 <_svfiprintf_r+0x1fc>
|
||
8006398: 2203 movs r2, #3
|
||
800639a: 4650 mov r0, sl
|
||
800639c: 7821 ldrb r1, [r4, #0]
|
||
800639e: f000 f9f7 bl 8006790 <memchr>
|
||
80063a2: b140 cbz r0, 80063b6 <_svfiprintf_r+0x152>
|
||
80063a4: 2340 movs r3, #64 ; 0x40
|
||
80063a6: eba0 000a sub.w r0, r0, sl
|
||
80063aa: fa03 f000 lsl.w r0, r3, r0
|
||
80063ae: 9b04 ldr r3, [sp, #16]
|
||
80063b0: 3401 adds r4, #1
|
||
80063b2: 4303 orrs r3, r0
|
||
80063b4: 9304 str r3, [sp, #16]
|
||
80063b6: f814 1b01 ldrb.w r1, [r4], #1
|
||
80063ba: 2206 movs r2, #6
|
||
80063bc: 4825 ldr r0, [pc, #148] ; (8006454 <_svfiprintf_r+0x1f0>)
|
||
80063be: f88d 1028 strb.w r1, [sp, #40] ; 0x28
|
||
80063c2: f000 f9e5 bl 8006790 <memchr>
|
||
80063c6: 2800 cmp r0, #0
|
||
80063c8: d038 beq.n 800643c <_svfiprintf_r+0x1d8>
|
||
80063ca: 4b23 ldr r3, [pc, #140] ; (8006458 <_svfiprintf_r+0x1f4>)
|
||
80063cc: bb1b cbnz r3, 8006416 <_svfiprintf_r+0x1b2>
|
||
80063ce: 9b03 ldr r3, [sp, #12]
|
||
80063d0: 3307 adds r3, #7
|
||
80063d2: f023 0307 bic.w r3, r3, #7
|
||
80063d6: 3308 adds r3, #8
|
||
80063d8: 9303 str r3, [sp, #12]
|
||
80063da: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
80063dc: 4433 add r3, r6
|
||
80063de: 9309 str r3, [sp, #36] ; 0x24
|
||
80063e0: e767 b.n 80062b2 <_svfiprintf_r+0x4e>
|
||
80063e2: 460c mov r4, r1
|
||
80063e4: 2001 movs r0, #1
|
||
80063e6: fb0c 3202 mla r2, ip, r2, r3
|
||
80063ea: e7a5 b.n 8006338 <_svfiprintf_r+0xd4>
|
||
80063ec: 2300 movs r3, #0
|
||
80063ee: f04f 0c0a mov.w ip, #10
|
||
80063f2: 4619 mov r1, r3
|
||
80063f4: 3401 adds r4, #1
|
||
80063f6: 9305 str r3, [sp, #20]
|
||
80063f8: 4620 mov r0, r4
|
||
80063fa: f810 2b01 ldrb.w r2, [r0], #1
|
||
80063fe: 3a30 subs r2, #48 ; 0x30
|
||
8006400: 2a09 cmp r2, #9
|
||
8006402: d903 bls.n 800640c <_svfiprintf_r+0x1a8>
|
||
8006404: 2b00 cmp r3, #0
|
||
8006406: d0c5 beq.n 8006394 <_svfiprintf_r+0x130>
|
||
8006408: 9105 str r1, [sp, #20]
|
||
800640a: e7c3 b.n 8006394 <_svfiprintf_r+0x130>
|
||
800640c: 4604 mov r4, r0
|
||
800640e: 2301 movs r3, #1
|
||
8006410: fb0c 2101 mla r1, ip, r1, r2
|
||
8006414: e7f0 b.n 80063f8 <_svfiprintf_r+0x194>
|
||
8006416: ab03 add r3, sp, #12
|
||
8006418: 9300 str r3, [sp, #0]
|
||
800641a: 462a mov r2, r5
|
||
800641c: 4638 mov r0, r7
|
||
800641e: 4b0f ldr r3, [pc, #60] ; (800645c <_svfiprintf_r+0x1f8>)
|
||
8006420: a904 add r1, sp, #16
|
||
8006422: f3af 8000 nop.w
|
||
8006426: 1c42 adds r2, r0, #1
|
||
8006428: 4606 mov r6, r0
|
||
800642a: d1d6 bne.n 80063da <_svfiprintf_r+0x176>
|
||
800642c: 89ab ldrh r3, [r5, #12]
|
||
800642e: 065b lsls r3, r3, #25
|
||
8006430: f53f af2c bmi.w 800628c <_svfiprintf_r+0x28>
|
||
8006434: 9809 ldr r0, [sp, #36] ; 0x24
|
||
8006436: b01d add sp, #116 ; 0x74
|
||
8006438: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
800643c: ab03 add r3, sp, #12
|
||
800643e: 9300 str r3, [sp, #0]
|
||
8006440: 462a mov r2, r5
|
||
8006442: 4638 mov r0, r7
|
||
8006444: 4b05 ldr r3, [pc, #20] ; (800645c <_svfiprintf_r+0x1f8>)
|
||
8006446: a904 add r1, sp, #16
|
||
8006448: f000 f87c bl 8006544 <_printf_i>
|
||
800644c: e7eb b.n 8006426 <_svfiprintf_r+0x1c2>
|
||
800644e: bf00 nop
|
||
8006450: 0800755c .word 0x0800755c
|
||
8006454: 08007566 .word 0x08007566
|
||
8006458: 00000000 .word 0x00000000
|
||
800645c: 080061ad .word 0x080061ad
|
||
8006460: 08007562 .word 0x08007562
|
||
|
||
08006464 <_printf_common>:
|
||
8006464: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8006468: 4616 mov r6, r2
|
||
800646a: 4699 mov r9, r3
|
||
800646c: 688a ldr r2, [r1, #8]
|
||
800646e: 690b ldr r3, [r1, #16]
|
||
8006470: 4607 mov r7, r0
|
||
8006472: 4293 cmp r3, r2
|
||
8006474: bfb8 it lt
|
||
8006476: 4613 movlt r3, r2
|
||
8006478: 6033 str r3, [r6, #0]
|
||
800647a: f891 2043 ldrb.w r2, [r1, #67] ; 0x43
|
||
800647e: 460c mov r4, r1
|
||
8006480: f8dd 8020 ldr.w r8, [sp, #32]
|
||
8006484: b10a cbz r2, 800648a <_printf_common+0x26>
|
||
8006486: 3301 adds r3, #1
|
||
8006488: 6033 str r3, [r6, #0]
|
||
800648a: 6823 ldr r3, [r4, #0]
|
||
800648c: 0699 lsls r1, r3, #26
|
||
800648e: bf42 ittt mi
|
||
8006490: 6833 ldrmi r3, [r6, #0]
|
||
8006492: 3302 addmi r3, #2
|
||
8006494: 6033 strmi r3, [r6, #0]
|
||
8006496: 6825 ldr r5, [r4, #0]
|
||
8006498: f015 0506 ands.w r5, r5, #6
|
||
800649c: d106 bne.n 80064ac <_printf_common+0x48>
|
||
800649e: f104 0a19 add.w sl, r4, #25
|
||
80064a2: 68e3 ldr r3, [r4, #12]
|
||
80064a4: 6832 ldr r2, [r6, #0]
|
||
80064a6: 1a9b subs r3, r3, r2
|
||
80064a8: 42ab cmp r3, r5
|
||
80064aa: dc28 bgt.n 80064fe <_printf_common+0x9a>
|
||
80064ac: f894 2043 ldrb.w r2, [r4, #67] ; 0x43
|
||
80064b0: 1e13 subs r3, r2, #0
|
||
80064b2: 6822 ldr r2, [r4, #0]
|
||
80064b4: bf18 it ne
|
||
80064b6: 2301 movne r3, #1
|
||
80064b8: 0692 lsls r2, r2, #26
|
||
80064ba: d42d bmi.n 8006518 <_printf_common+0xb4>
|
||
80064bc: 4649 mov r1, r9
|
||
80064be: 4638 mov r0, r7
|
||
80064c0: f104 0243 add.w r2, r4, #67 ; 0x43
|
||
80064c4: 47c0 blx r8
|
||
80064c6: 3001 adds r0, #1
|
||
80064c8: d020 beq.n 800650c <_printf_common+0xa8>
|
||
80064ca: 6823 ldr r3, [r4, #0]
|
||
80064cc: 68e5 ldr r5, [r4, #12]
|
||
80064ce: f003 0306 and.w r3, r3, #6
|
||
80064d2: 2b04 cmp r3, #4
|
||
80064d4: bf18 it ne
|
||
80064d6: 2500 movne r5, #0
|
||
80064d8: 6832 ldr r2, [r6, #0]
|
||
80064da: f04f 0600 mov.w r6, #0
|
||
80064de: 68a3 ldr r3, [r4, #8]
|
||
80064e0: bf08 it eq
|
||
80064e2: 1aad subeq r5, r5, r2
|
||
80064e4: 6922 ldr r2, [r4, #16]
|
||
80064e6: bf08 it eq
|
||
80064e8: ea25 75e5 biceq.w r5, r5, r5, asr #31
|
||
80064ec: 4293 cmp r3, r2
|
||
80064ee: bfc4 itt gt
|
||
80064f0: 1a9b subgt r3, r3, r2
|
||
80064f2: 18ed addgt r5, r5, r3
|
||
80064f4: 341a adds r4, #26
|
||
80064f6: 42b5 cmp r5, r6
|
||
80064f8: d11a bne.n 8006530 <_printf_common+0xcc>
|
||
80064fa: 2000 movs r0, #0
|
||
80064fc: e008 b.n 8006510 <_printf_common+0xac>
|
||
80064fe: 2301 movs r3, #1
|
||
8006500: 4652 mov r2, sl
|
||
8006502: 4649 mov r1, r9
|
||
8006504: 4638 mov r0, r7
|
||
8006506: 47c0 blx r8
|
||
8006508: 3001 adds r0, #1
|
||
800650a: d103 bne.n 8006514 <_printf_common+0xb0>
|
||
800650c: f04f 30ff mov.w r0, #4294967295
|
||
8006510: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8006514: 3501 adds r5, #1
|
||
8006516: e7c4 b.n 80064a2 <_printf_common+0x3e>
|
||
8006518: 2030 movs r0, #48 ; 0x30
|
||
800651a: 18e1 adds r1, r4, r3
|
||
800651c: f881 0043 strb.w r0, [r1, #67] ; 0x43
|
||
8006520: 1c5a adds r2, r3, #1
|
||
8006522: f894 1045 ldrb.w r1, [r4, #69] ; 0x45
|
||
8006526: 4422 add r2, r4
|
||
8006528: 3302 adds r3, #2
|
||
800652a: f882 1043 strb.w r1, [r2, #67] ; 0x43
|
||
800652e: e7c5 b.n 80064bc <_printf_common+0x58>
|
||
8006530: 2301 movs r3, #1
|
||
8006532: 4622 mov r2, r4
|
||
8006534: 4649 mov r1, r9
|
||
8006536: 4638 mov r0, r7
|
||
8006538: 47c0 blx r8
|
||
800653a: 3001 adds r0, #1
|
||
800653c: d0e6 beq.n 800650c <_printf_common+0xa8>
|
||
800653e: 3601 adds r6, #1
|
||
8006540: e7d9 b.n 80064f6 <_printf_common+0x92>
|
||
...
|
||
|
||
08006544 <_printf_i>:
|
||
8006544: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8006548: 460c mov r4, r1
|
||
800654a: 7e27 ldrb r7, [r4, #24]
|
||
800654c: 4691 mov r9, r2
|
||
800654e: 2f78 cmp r7, #120 ; 0x78
|
||
8006550: 4680 mov r8, r0
|
||
8006552: 469a mov sl, r3
|
||
8006554: 990c ldr r1, [sp, #48] ; 0x30
|
||
8006556: f104 0243 add.w r2, r4, #67 ; 0x43
|
||
800655a: d807 bhi.n 800656c <_printf_i+0x28>
|
||
800655c: 2f62 cmp r7, #98 ; 0x62
|
||
800655e: d80a bhi.n 8006576 <_printf_i+0x32>
|
||
8006560: 2f00 cmp r7, #0
|
||
8006562: f000 80d9 beq.w 8006718 <_printf_i+0x1d4>
|
||
8006566: 2f58 cmp r7, #88 ; 0x58
|
||
8006568: f000 80a4 beq.w 80066b4 <_printf_i+0x170>
|
||
800656c: f104 0642 add.w r6, r4, #66 ; 0x42
|
||
8006570: f884 7042 strb.w r7, [r4, #66] ; 0x42
|
||
8006574: e03a b.n 80065ec <_printf_i+0xa8>
|
||
8006576: f1a7 0363 sub.w r3, r7, #99 ; 0x63
|
||
800657a: 2b15 cmp r3, #21
|
||
800657c: d8f6 bhi.n 800656c <_printf_i+0x28>
|
||
800657e: a001 add r0, pc, #4 ; (adr r0, 8006584 <_printf_i+0x40>)
|
||
8006580: f850 f023 ldr.w pc, [r0, r3, lsl #2]
|
||
8006584: 080065dd .word 0x080065dd
|
||
8006588: 080065f1 .word 0x080065f1
|
||
800658c: 0800656d .word 0x0800656d
|
||
8006590: 0800656d .word 0x0800656d
|
||
8006594: 0800656d .word 0x0800656d
|
||
8006598: 0800656d .word 0x0800656d
|
||
800659c: 080065f1 .word 0x080065f1
|
||
80065a0: 0800656d .word 0x0800656d
|
||
80065a4: 0800656d .word 0x0800656d
|
||
80065a8: 0800656d .word 0x0800656d
|
||
80065ac: 0800656d .word 0x0800656d
|
||
80065b0: 080066ff .word 0x080066ff
|
||
80065b4: 08006621 .word 0x08006621
|
||
80065b8: 080066e1 .word 0x080066e1
|
||
80065bc: 0800656d .word 0x0800656d
|
||
80065c0: 0800656d .word 0x0800656d
|
||
80065c4: 08006721 .word 0x08006721
|
||
80065c8: 0800656d .word 0x0800656d
|
||
80065cc: 08006621 .word 0x08006621
|
||
80065d0: 0800656d .word 0x0800656d
|
||
80065d4: 0800656d .word 0x0800656d
|
||
80065d8: 080066e9 .word 0x080066e9
|
||
80065dc: 680b ldr r3, [r1, #0]
|
||
80065de: f104 0642 add.w r6, r4, #66 ; 0x42
|
||
80065e2: 1d1a adds r2, r3, #4
|
||
80065e4: 681b ldr r3, [r3, #0]
|
||
80065e6: 600a str r2, [r1, #0]
|
||
80065e8: f884 3042 strb.w r3, [r4, #66] ; 0x42
|
||
80065ec: 2301 movs r3, #1
|
||
80065ee: e0a4 b.n 800673a <_printf_i+0x1f6>
|
||
80065f0: 6825 ldr r5, [r4, #0]
|
||
80065f2: 6808 ldr r0, [r1, #0]
|
||
80065f4: 062e lsls r6, r5, #24
|
||
80065f6: f100 0304 add.w r3, r0, #4
|
||
80065fa: d50a bpl.n 8006612 <_printf_i+0xce>
|
||
80065fc: 6805 ldr r5, [r0, #0]
|
||
80065fe: 600b str r3, [r1, #0]
|
||
8006600: 2d00 cmp r5, #0
|
||
8006602: da03 bge.n 800660c <_printf_i+0xc8>
|
||
8006604: 232d movs r3, #45 ; 0x2d
|
||
8006606: 426d negs r5, r5
|
||
8006608: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
800660c: 230a movs r3, #10
|
||
800660e: 485e ldr r0, [pc, #376] ; (8006788 <_printf_i+0x244>)
|
||
8006610: e019 b.n 8006646 <_printf_i+0x102>
|
||
8006612: f015 0f40 tst.w r5, #64 ; 0x40
|
||
8006616: 6805 ldr r5, [r0, #0]
|
||
8006618: 600b str r3, [r1, #0]
|
||
800661a: bf18 it ne
|
||
800661c: b22d sxthne r5, r5
|
||
800661e: e7ef b.n 8006600 <_printf_i+0xbc>
|
||
8006620: 680b ldr r3, [r1, #0]
|
||
8006622: 6825 ldr r5, [r4, #0]
|
||
8006624: 1d18 adds r0, r3, #4
|
||
8006626: 6008 str r0, [r1, #0]
|
||
8006628: 0628 lsls r0, r5, #24
|
||
800662a: d501 bpl.n 8006630 <_printf_i+0xec>
|
||
800662c: 681d ldr r5, [r3, #0]
|
||
800662e: e002 b.n 8006636 <_printf_i+0xf2>
|
||
8006630: 0669 lsls r1, r5, #25
|
||
8006632: d5fb bpl.n 800662c <_printf_i+0xe8>
|
||
8006634: 881d ldrh r5, [r3, #0]
|
||
8006636: 2f6f cmp r7, #111 ; 0x6f
|
||
8006638: bf0c ite eq
|
||
800663a: 2308 moveq r3, #8
|
||
800663c: 230a movne r3, #10
|
||
800663e: 4852 ldr r0, [pc, #328] ; (8006788 <_printf_i+0x244>)
|
||
8006640: 2100 movs r1, #0
|
||
8006642: f884 1043 strb.w r1, [r4, #67] ; 0x43
|
||
8006646: 6866 ldr r6, [r4, #4]
|
||
8006648: 2e00 cmp r6, #0
|
||
800664a: bfa8 it ge
|
||
800664c: 6821 ldrge r1, [r4, #0]
|
||
800664e: 60a6 str r6, [r4, #8]
|
||
8006650: bfa4 itt ge
|
||
8006652: f021 0104 bicge.w r1, r1, #4
|
||
8006656: 6021 strge r1, [r4, #0]
|
||
8006658: b90d cbnz r5, 800665e <_printf_i+0x11a>
|
||
800665a: 2e00 cmp r6, #0
|
||
800665c: d04d beq.n 80066fa <_printf_i+0x1b6>
|
||
800665e: 4616 mov r6, r2
|
||
8006660: fbb5 f1f3 udiv r1, r5, r3
|
||
8006664: fb03 5711 mls r7, r3, r1, r5
|
||
8006668: 5dc7 ldrb r7, [r0, r7]
|
||
800666a: f806 7d01 strb.w r7, [r6, #-1]!
|
||
800666e: 462f mov r7, r5
|
||
8006670: 42bb cmp r3, r7
|
||
8006672: 460d mov r5, r1
|
||
8006674: d9f4 bls.n 8006660 <_printf_i+0x11c>
|
||
8006676: 2b08 cmp r3, #8
|
||
8006678: d10b bne.n 8006692 <_printf_i+0x14e>
|
||
800667a: 6823 ldr r3, [r4, #0]
|
||
800667c: 07df lsls r7, r3, #31
|
||
800667e: d508 bpl.n 8006692 <_printf_i+0x14e>
|
||
8006680: 6923 ldr r3, [r4, #16]
|
||
8006682: 6861 ldr r1, [r4, #4]
|
||
8006684: 4299 cmp r1, r3
|
||
8006686: bfde ittt le
|
||
8006688: 2330 movle r3, #48 ; 0x30
|
||
800668a: f806 3c01 strble.w r3, [r6, #-1]
|
||
800668e: f106 36ff addle.w r6, r6, #4294967295
|
||
8006692: 1b92 subs r2, r2, r6
|
||
8006694: 6122 str r2, [r4, #16]
|
||
8006696: 464b mov r3, r9
|
||
8006698: 4621 mov r1, r4
|
||
800669a: 4640 mov r0, r8
|
||
800669c: f8cd a000 str.w sl, [sp]
|
||
80066a0: aa03 add r2, sp, #12
|
||
80066a2: f7ff fedf bl 8006464 <_printf_common>
|
||
80066a6: 3001 adds r0, #1
|
||
80066a8: d14c bne.n 8006744 <_printf_i+0x200>
|
||
80066aa: f04f 30ff mov.w r0, #4294967295
|
||
80066ae: b004 add sp, #16
|
||
80066b0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
80066b4: 4834 ldr r0, [pc, #208] ; (8006788 <_printf_i+0x244>)
|
||
80066b6: f884 7045 strb.w r7, [r4, #69] ; 0x45
|
||
80066ba: 680e ldr r6, [r1, #0]
|
||
80066bc: 6823 ldr r3, [r4, #0]
|
||
80066be: f856 5b04 ldr.w r5, [r6], #4
|
||
80066c2: 061f lsls r7, r3, #24
|
||
80066c4: 600e str r6, [r1, #0]
|
||
80066c6: d514 bpl.n 80066f2 <_printf_i+0x1ae>
|
||
80066c8: 07d9 lsls r1, r3, #31
|
||
80066ca: bf44 itt mi
|
||
80066cc: f043 0320 orrmi.w r3, r3, #32
|
||
80066d0: 6023 strmi r3, [r4, #0]
|
||
80066d2: b91d cbnz r5, 80066dc <_printf_i+0x198>
|
||
80066d4: 6823 ldr r3, [r4, #0]
|
||
80066d6: f023 0320 bic.w r3, r3, #32
|
||
80066da: 6023 str r3, [r4, #0]
|
||
80066dc: 2310 movs r3, #16
|
||
80066de: e7af b.n 8006640 <_printf_i+0xfc>
|
||
80066e0: 6823 ldr r3, [r4, #0]
|
||
80066e2: f043 0320 orr.w r3, r3, #32
|
||
80066e6: 6023 str r3, [r4, #0]
|
||
80066e8: 2378 movs r3, #120 ; 0x78
|
||
80066ea: 4828 ldr r0, [pc, #160] ; (800678c <_printf_i+0x248>)
|
||
80066ec: f884 3045 strb.w r3, [r4, #69] ; 0x45
|
||
80066f0: e7e3 b.n 80066ba <_printf_i+0x176>
|
||
80066f2: 065e lsls r6, r3, #25
|
||
80066f4: bf48 it mi
|
||
80066f6: b2ad uxthmi r5, r5
|
||
80066f8: e7e6 b.n 80066c8 <_printf_i+0x184>
|
||
80066fa: 4616 mov r6, r2
|
||
80066fc: e7bb b.n 8006676 <_printf_i+0x132>
|
||
80066fe: 680b ldr r3, [r1, #0]
|
||
8006700: 6826 ldr r6, [r4, #0]
|
||
8006702: 1d1d adds r5, r3, #4
|
||
8006704: 6960 ldr r0, [r4, #20]
|
||
8006706: 600d str r5, [r1, #0]
|
||
8006708: 0635 lsls r5, r6, #24
|
||
800670a: 681b ldr r3, [r3, #0]
|
||
800670c: d501 bpl.n 8006712 <_printf_i+0x1ce>
|
||
800670e: 6018 str r0, [r3, #0]
|
||
8006710: e002 b.n 8006718 <_printf_i+0x1d4>
|
||
8006712: 0671 lsls r1, r6, #25
|
||
8006714: d5fb bpl.n 800670e <_printf_i+0x1ca>
|
||
8006716: 8018 strh r0, [r3, #0]
|
||
8006718: 2300 movs r3, #0
|
||
800671a: 4616 mov r6, r2
|
||
800671c: 6123 str r3, [r4, #16]
|
||
800671e: e7ba b.n 8006696 <_printf_i+0x152>
|
||
8006720: 680b ldr r3, [r1, #0]
|
||
8006722: 1d1a adds r2, r3, #4
|
||
8006724: 600a str r2, [r1, #0]
|
||
8006726: 681e ldr r6, [r3, #0]
|
||
8006728: 2100 movs r1, #0
|
||
800672a: 4630 mov r0, r6
|
||
800672c: 6862 ldr r2, [r4, #4]
|
||
800672e: f000 f82f bl 8006790 <memchr>
|
||
8006732: b108 cbz r0, 8006738 <_printf_i+0x1f4>
|
||
8006734: 1b80 subs r0, r0, r6
|
||
8006736: 6060 str r0, [r4, #4]
|
||
8006738: 6863 ldr r3, [r4, #4]
|
||
800673a: 6123 str r3, [r4, #16]
|
||
800673c: 2300 movs r3, #0
|
||
800673e: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
8006742: e7a8 b.n 8006696 <_printf_i+0x152>
|
||
8006744: 4632 mov r2, r6
|
||
8006746: 4649 mov r1, r9
|
||
8006748: 4640 mov r0, r8
|
||
800674a: 6923 ldr r3, [r4, #16]
|
||
800674c: 47d0 blx sl
|
||
800674e: 3001 adds r0, #1
|
||
8006750: d0ab beq.n 80066aa <_printf_i+0x166>
|
||
8006752: 6823 ldr r3, [r4, #0]
|
||
8006754: 079b lsls r3, r3, #30
|
||
8006756: d413 bmi.n 8006780 <_printf_i+0x23c>
|
||
8006758: 68e0 ldr r0, [r4, #12]
|
||
800675a: 9b03 ldr r3, [sp, #12]
|
||
800675c: 4298 cmp r0, r3
|
||
800675e: bfb8 it lt
|
||
8006760: 4618 movlt r0, r3
|
||
8006762: e7a4 b.n 80066ae <_printf_i+0x16a>
|
||
8006764: 2301 movs r3, #1
|
||
8006766: 4632 mov r2, r6
|
||
8006768: 4649 mov r1, r9
|
||
800676a: 4640 mov r0, r8
|
||
800676c: 47d0 blx sl
|
||
800676e: 3001 adds r0, #1
|
||
8006770: d09b beq.n 80066aa <_printf_i+0x166>
|
||
8006772: 3501 adds r5, #1
|
||
8006774: 68e3 ldr r3, [r4, #12]
|
||
8006776: 9903 ldr r1, [sp, #12]
|
||
8006778: 1a5b subs r3, r3, r1
|
||
800677a: 42ab cmp r3, r5
|
||
800677c: dcf2 bgt.n 8006764 <_printf_i+0x220>
|
||
800677e: e7eb b.n 8006758 <_printf_i+0x214>
|
||
8006780: 2500 movs r5, #0
|
||
8006782: f104 0619 add.w r6, r4, #25
|
||
8006786: e7f5 b.n 8006774 <_printf_i+0x230>
|
||
8006788: 0800756d .word 0x0800756d
|
||
800678c: 0800757e .word 0x0800757e
|
||
|
||
08006790 <memchr>:
|
||
8006790: 4603 mov r3, r0
|
||
8006792: b510 push {r4, lr}
|
||
8006794: b2c9 uxtb r1, r1
|
||
8006796: 4402 add r2, r0
|
||
8006798: 4293 cmp r3, r2
|
||
800679a: 4618 mov r0, r3
|
||
800679c: d101 bne.n 80067a2 <memchr+0x12>
|
||
800679e: 2000 movs r0, #0
|
||
80067a0: e003 b.n 80067aa <memchr+0x1a>
|
||
80067a2: 7804 ldrb r4, [r0, #0]
|
||
80067a4: 3301 adds r3, #1
|
||
80067a6: 428c cmp r4, r1
|
||
80067a8: d1f6 bne.n 8006798 <memchr+0x8>
|
||
80067aa: bd10 pop {r4, pc}
|
||
|
||
080067ac <memcpy>:
|
||
80067ac: 440a add r2, r1
|
||
80067ae: 4291 cmp r1, r2
|
||
80067b0: f100 33ff add.w r3, r0, #4294967295
|
||
80067b4: d100 bne.n 80067b8 <memcpy+0xc>
|
||
80067b6: 4770 bx lr
|
||
80067b8: b510 push {r4, lr}
|
||
80067ba: f811 4b01 ldrb.w r4, [r1], #1
|
||
80067be: 4291 cmp r1, r2
|
||
80067c0: f803 4f01 strb.w r4, [r3, #1]!
|
||
80067c4: d1f9 bne.n 80067ba <memcpy+0xe>
|
||
80067c6: bd10 pop {r4, pc}
|
||
|
||
080067c8 <memmove>:
|
||
80067c8: 4288 cmp r0, r1
|
||
80067ca: b510 push {r4, lr}
|
||
80067cc: eb01 0402 add.w r4, r1, r2
|
||
80067d0: d902 bls.n 80067d8 <memmove+0x10>
|
||
80067d2: 4284 cmp r4, r0
|
||
80067d4: 4623 mov r3, r4
|
||
80067d6: d807 bhi.n 80067e8 <memmove+0x20>
|
||
80067d8: 1e43 subs r3, r0, #1
|
||
80067da: 42a1 cmp r1, r4
|
||
80067dc: d008 beq.n 80067f0 <memmove+0x28>
|
||
80067de: f811 2b01 ldrb.w r2, [r1], #1
|
||
80067e2: f803 2f01 strb.w r2, [r3, #1]!
|
||
80067e6: e7f8 b.n 80067da <memmove+0x12>
|
||
80067e8: 4601 mov r1, r0
|
||
80067ea: 4402 add r2, r0
|
||
80067ec: 428a cmp r2, r1
|
||
80067ee: d100 bne.n 80067f2 <memmove+0x2a>
|
||
80067f0: bd10 pop {r4, pc}
|
||
80067f2: f813 4d01 ldrb.w r4, [r3, #-1]!
|
||
80067f6: f802 4d01 strb.w r4, [r2, #-1]!
|
||
80067fa: e7f7 b.n 80067ec <memmove+0x24>
|
||
|
||
080067fc <_free_r>:
|
||
80067fc: b538 push {r3, r4, r5, lr}
|
||
80067fe: 4605 mov r5, r0
|
||
8006800: 2900 cmp r1, #0
|
||
8006802: d043 beq.n 800688c <_free_r+0x90>
|
||
8006804: f851 3c04 ldr.w r3, [r1, #-4]
|
||
8006808: 1f0c subs r4, r1, #4
|
||
800680a: 2b00 cmp r3, #0
|
||
800680c: bfb8 it lt
|
||
800680e: 18e4 addlt r4, r4, r3
|
||
8006810: f000 f8d0 bl 80069b4 <__malloc_lock>
|
||
8006814: 4a1e ldr r2, [pc, #120] ; (8006890 <_free_r+0x94>)
|
||
8006816: 6813 ldr r3, [r2, #0]
|
||
8006818: 4610 mov r0, r2
|
||
800681a: b933 cbnz r3, 800682a <_free_r+0x2e>
|
||
800681c: 6063 str r3, [r4, #4]
|
||
800681e: 6014 str r4, [r2, #0]
|
||
8006820: 4628 mov r0, r5
|
||
8006822: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
||
8006826: f000 b8cb b.w 80069c0 <__malloc_unlock>
|
||
800682a: 42a3 cmp r3, r4
|
||
800682c: d90a bls.n 8006844 <_free_r+0x48>
|
||
800682e: 6821 ldr r1, [r4, #0]
|
||
8006830: 1862 adds r2, r4, r1
|
||
8006832: 4293 cmp r3, r2
|
||
8006834: bf01 itttt eq
|
||
8006836: 681a ldreq r2, [r3, #0]
|
||
8006838: 685b ldreq r3, [r3, #4]
|
||
800683a: 1852 addeq r2, r2, r1
|
||
800683c: 6022 streq r2, [r4, #0]
|
||
800683e: 6063 str r3, [r4, #4]
|
||
8006840: 6004 str r4, [r0, #0]
|
||
8006842: e7ed b.n 8006820 <_free_r+0x24>
|
||
8006844: 461a mov r2, r3
|
||
8006846: 685b ldr r3, [r3, #4]
|
||
8006848: b10b cbz r3, 800684e <_free_r+0x52>
|
||
800684a: 42a3 cmp r3, r4
|
||
800684c: d9fa bls.n 8006844 <_free_r+0x48>
|
||
800684e: 6811 ldr r1, [r2, #0]
|
||
8006850: 1850 adds r0, r2, r1
|
||
8006852: 42a0 cmp r0, r4
|
||
8006854: d10b bne.n 800686e <_free_r+0x72>
|
||
8006856: 6820 ldr r0, [r4, #0]
|
||
8006858: 4401 add r1, r0
|
||
800685a: 1850 adds r0, r2, r1
|
||
800685c: 4283 cmp r3, r0
|
||
800685e: 6011 str r1, [r2, #0]
|
||
8006860: d1de bne.n 8006820 <_free_r+0x24>
|
||
8006862: 6818 ldr r0, [r3, #0]
|
||
8006864: 685b ldr r3, [r3, #4]
|
||
8006866: 4401 add r1, r0
|
||
8006868: 6011 str r1, [r2, #0]
|
||
800686a: 6053 str r3, [r2, #4]
|
||
800686c: e7d8 b.n 8006820 <_free_r+0x24>
|
||
800686e: d902 bls.n 8006876 <_free_r+0x7a>
|
||
8006870: 230c movs r3, #12
|
||
8006872: 602b str r3, [r5, #0]
|
||
8006874: e7d4 b.n 8006820 <_free_r+0x24>
|
||
8006876: 6820 ldr r0, [r4, #0]
|
||
8006878: 1821 adds r1, r4, r0
|
||
800687a: 428b cmp r3, r1
|
||
800687c: bf01 itttt eq
|
||
800687e: 6819 ldreq r1, [r3, #0]
|
||
8006880: 685b ldreq r3, [r3, #4]
|
||
8006882: 1809 addeq r1, r1, r0
|
||
8006884: 6021 streq r1, [r4, #0]
|
||
8006886: 6063 str r3, [r4, #4]
|
||
8006888: 6054 str r4, [r2, #4]
|
||
800688a: e7c9 b.n 8006820 <_free_r+0x24>
|
||
800688c: bd38 pop {r3, r4, r5, pc}
|
||
800688e: bf00 nop
|
||
8006890: 200000dc .word 0x200000dc
|
||
|
||
08006894 <_malloc_r>:
|
||
8006894: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8006896: 1ccd adds r5, r1, #3
|
||
8006898: f025 0503 bic.w r5, r5, #3
|
||
800689c: 3508 adds r5, #8
|
||
800689e: 2d0c cmp r5, #12
|
||
80068a0: bf38 it cc
|
||
80068a2: 250c movcc r5, #12
|
||
80068a4: 2d00 cmp r5, #0
|
||
80068a6: 4606 mov r6, r0
|
||
80068a8: db01 blt.n 80068ae <_malloc_r+0x1a>
|
||
80068aa: 42a9 cmp r1, r5
|
||
80068ac: d903 bls.n 80068b6 <_malloc_r+0x22>
|
||
80068ae: 230c movs r3, #12
|
||
80068b0: 6033 str r3, [r6, #0]
|
||
80068b2: 2000 movs r0, #0
|
||
80068b4: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
80068b6: f000 f87d bl 80069b4 <__malloc_lock>
|
||
80068ba: 4921 ldr r1, [pc, #132] ; (8006940 <_malloc_r+0xac>)
|
||
80068bc: 680a ldr r2, [r1, #0]
|
||
80068be: 4614 mov r4, r2
|
||
80068c0: b99c cbnz r4, 80068ea <_malloc_r+0x56>
|
||
80068c2: 4f20 ldr r7, [pc, #128] ; (8006944 <_malloc_r+0xb0>)
|
||
80068c4: 683b ldr r3, [r7, #0]
|
||
80068c6: b923 cbnz r3, 80068d2 <_malloc_r+0x3e>
|
||
80068c8: 4621 mov r1, r4
|
||
80068ca: 4630 mov r0, r6
|
||
80068cc: f000 f862 bl 8006994 <_sbrk_r>
|
||
80068d0: 6038 str r0, [r7, #0]
|
||
80068d2: 4629 mov r1, r5
|
||
80068d4: 4630 mov r0, r6
|
||
80068d6: f000 f85d bl 8006994 <_sbrk_r>
|
||
80068da: 1c43 adds r3, r0, #1
|
||
80068dc: d123 bne.n 8006926 <_malloc_r+0x92>
|
||
80068de: 230c movs r3, #12
|
||
80068e0: 4630 mov r0, r6
|
||
80068e2: 6033 str r3, [r6, #0]
|
||
80068e4: f000 f86c bl 80069c0 <__malloc_unlock>
|
||
80068e8: e7e3 b.n 80068b2 <_malloc_r+0x1e>
|
||
80068ea: 6823 ldr r3, [r4, #0]
|
||
80068ec: 1b5b subs r3, r3, r5
|
||
80068ee: d417 bmi.n 8006920 <_malloc_r+0x8c>
|
||
80068f0: 2b0b cmp r3, #11
|
||
80068f2: d903 bls.n 80068fc <_malloc_r+0x68>
|
||
80068f4: 6023 str r3, [r4, #0]
|
||
80068f6: 441c add r4, r3
|
||
80068f8: 6025 str r5, [r4, #0]
|
||
80068fa: e004 b.n 8006906 <_malloc_r+0x72>
|
||
80068fc: 6863 ldr r3, [r4, #4]
|
||
80068fe: 42a2 cmp r2, r4
|
||
8006900: bf0c ite eq
|
||
8006902: 600b streq r3, [r1, #0]
|
||
8006904: 6053 strne r3, [r2, #4]
|
||
8006906: 4630 mov r0, r6
|
||
8006908: f000 f85a bl 80069c0 <__malloc_unlock>
|
||
800690c: f104 000b add.w r0, r4, #11
|
||
8006910: 1d23 adds r3, r4, #4
|
||
8006912: f020 0007 bic.w r0, r0, #7
|
||
8006916: 1ac2 subs r2, r0, r3
|
||
8006918: d0cc beq.n 80068b4 <_malloc_r+0x20>
|
||
800691a: 1a1b subs r3, r3, r0
|
||
800691c: 50a3 str r3, [r4, r2]
|
||
800691e: e7c9 b.n 80068b4 <_malloc_r+0x20>
|
||
8006920: 4622 mov r2, r4
|
||
8006922: 6864 ldr r4, [r4, #4]
|
||
8006924: e7cc b.n 80068c0 <_malloc_r+0x2c>
|
||
8006926: 1cc4 adds r4, r0, #3
|
||
8006928: f024 0403 bic.w r4, r4, #3
|
||
800692c: 42a0 cmp r0, r4
|
||
800692e: d0e3 beq.n 80068f8 <_malloc_r+0x64>
|
||
8006930: 1a21 subs r1, r4, r0
|
||
8006932: 4630 mov r0, r6
|
||
8006934: f000 f82e bl 8006994 <_sbrk_r>
|
||
8006938: 3001 adds r0, #1
|
||
800693a: d1dd bne.n 80068f8 <_malloc_r+0x64>
|
||
800693c: e7cf b.n 80068de <_malloc_r+0x4a>
|
||
800693e: bf00 nop
|
||
8006940: 200000dc .word 0x200000dc
|
||
8006944: 200000e0 .word 0x200000e0
|
||
|
||
08006948 <_realloc_r>:
|
||
8006948: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
800694a: 4607 mov r7, r0
|
||
800694c: 4614 mov r4, r2
|
||
800694e: 460e mov r6, r1
|
||
8006950: b921 cbnz r1, 800695c <_realloc_r+0x14>
|
||
8006952: 4611 mov r1, r2
|
||
8006954: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr}
|
||
8006958: f7ff bf9c b.w 8006894 <_malloc_r>
|
||
800695c: b922 cbnz r2, 8006968 <_realloc_r+0x20>
|
||
800695e: f7ff ff4d bl 80067fc <_free_r>
|
||
8006962: 4625 mov r5, r4
|
||
8006964: 4628 mov r0, r5
|
||
8006966: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
8006968: f000 f830 bl 80069cc <_malloc_usable_size_r>
|
||
800696c: 42a0 cmp r0, r4
|
||
800696e: d20f bcs.n 8006990 <_realloc_r+0x48>
|
||
8006970: 4621 mov r1, r4
|
||
8006972: 4638 mov r0, r7
|
||
8006974: f7ff ff8e bl 8006894 <_malloc_r>
|
||
8006978: 4605 mov r5, r0
|
||
800697a: 2800 cmp r0, #0
|
||
800697c: d0f2 beq.n 8006964 <_realloc_r+0x1c>
|
||
800697e: 4631 mov r1, r6
|
||
8006980: 4622 mov r2, r4
|
||
8006982: f7ff ff13 bl 80067ac <memcpy>
|
||
8006986: 4631 mov r1, r6
|
||
8006988: 4638 mov r0, r7
|
||
800698a: f7ff ff37 bl 80067fc <_free_r>
|
||
800698e: e7e9 b.n 8006964 <_realloc_r+0x1c>
|
||
8006990: 4635 mov r5, r6
|
||
8006992: e7e7 b.n 8006964 <_realloc_r+0x1c>
|
||
|
||
08006994 <_sbrk_r>:
|
||
8006994: b538 push {r3, r4, r5, lr}
|
||
8006996: 2300 movs r3, #0
|
||
8006998: 4d05 ldr r5, [pc, #20] ; (80069b0 <_sbrk_r+0x1c>)
|
||
800699a: 4604 mov r4, r0
|
||
800699c: 4608 mov r0, r1
|
||
800699e: 602b str r3, [r5, #0]
|
||
80069a0: f7f9 fece bl 8000740 <_sbrk>
|
||
80069a4: 1c43 adds r3, r0, #1
|
||
80069a6: d102 bne.n 80069ae <_sbrk_r+0x1a>
|
||
80069a8: 682b ldr r3, [r5, #0]
|
||
80069aa: b103 cbz r3, 80069ae <_sbrk_r+0x1a>
|
||
80069ac: 6023 str r3, [r4, #0]
|
||
80069ae: bd38 pop {r3, r4, r5, pc}
|
||
80069b0: 20000854 .word 0x20000854
|
||
|
||
080069b4 <__malloc_lock>:
|
||
80069b4: 4801 ldr r0, [pc, #4] ; (80069bc <__malloc_lock+0x8>)
|
||
80069b6: f000 b811 b.w 80069dc <__retarget_lock_acquire_recursive>
|
||
80069ba: bf00 nop
|
||
80069bc: 2000085c .word 0x2000085c
|
||
|
||
080069c0 <__malloc_unlock>:
|
||
80069c0: 4801 ldr r0, [pc, #4] ; (80069c8 <__malloc_unlock+0x8>)
|
||
80069c2: f000 b80c b.w 80069de <__retarget_lock_release_recursive>
|
||
80069c6: bf00 nop
|
||
80069c8: 2000085c .word 0x2000085c
|
||
|
||
080069cc <_malloc_usable_size_r>:
|
||
80069cc: f851 3c04 ldr.w r3, [r1, #-4]
|
||
80069d0: 1f18 subs r0, r3, #4
|
||
80069d2: 2b00 cmp r3, #0
|
||
80069d4: bfbc itt lt
|
||
80069d6: 580b ldrlt r3, [r1, r0]
|
||
80069d8: 18c0 addlt r0, r0, r3
|
||
80069da: 4770 bx lr
|
||
|
||
080069dc <__retarget_lock_acquire_recursive>:
|
||
80069dc: 4770 bx lr
|
||
|
||
080069de <__retarget_lock_release_recursive>:
|
||
80069de: 4770 bx lr
|
||
|
||
080069e0 <_init>:
|
||
80069e0: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
80069e2: bf00 nop
|
||
80069e4: bcf8 pop {r3, r4, r5, r6, r7}
|
||
80069e6: bc08 pop {r3}
|
||
80069e8: 469e mov lr, r3
|
||
80069ea: 4770 bx lr
|
||
|
||
080069ec <_fini>:
|
||
80069ec: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
80069ee: bf00 nop
|
||
80069f0: bcf8 pop {r3, r4, r5, r6, r7}
|
||
80069f2: bc08 pop {r3}
|
||
80069f4: 469e mov lr, r3
|
||
80069f6: 4770 bx lr
|