18352 lines
678 KiB
Plaintext
18352 lines
678 KiB
Plaintext
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m3s.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .isr_vector 000001e4 08000000 08000000 00010000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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1 .text 00008530 080001e8 080001e8 000101e8 2**3
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 00000f54 08008718 08008718 00018718 2**3
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .ARM.extab 00000000 0800966c 0800966c 000201dc 2**0
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CONTENTS
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4 .ARM 00000000 0800966c 0800966c 000201dc 2**0
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CONTENTS
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5 .preinit_array 00000000 0800966c 0800966c 000201dc 2**0
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CONTENTS, ALLOC, LOAD, DATA
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6 .init_array 00000004 0800966c 0800966c 0001966c 2**2
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CONTENTS, ALLOC, LOAD, DATA
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7 .fini_array 00000004 08009670 08009670 00019670 2**2
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CONTENTS, ALLOC, LOAD, DATA
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8 .data 000001dc 20000000 08009674 00020000 2**2
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CONTENTS, ALLOC, LOAD, DATA
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9 .bss 00000124 200001dc 08009850 000201dc 2**2
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ALLOC
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10 ._user_heap_stack 00000c00 20000300 08009850 00020300 2**0
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ALLOC
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11 .ARM.attributes 00000029 00000000 00000000 000201dc 2**0
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CONTENTS, READONLY
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12 .debug_info 0000c543 00000000 00000000 00020205 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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13 .debug_abbrev 000025b9 00000000 00000000 0002c748 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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14 .debug_aranges 00000ad8 00000000 00000000 0002ed08 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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15 .debug_ranges 000009f0 00000000 00000000 0002f7e0 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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16 .debug_macro 0001b199 00000000 00000000 000301d0 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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17 .debug_line 0000e090 00000000 00000000 0004b369 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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18 .debug_str 00095bc2 00000000 00000000 000593f9 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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19 .comment 00000053 00000000 00000000 000eefbb 2**0
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CONTENTS, READONLY
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20 .debug_frame 00003d44 00000000 00000000 000ef010 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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Disassembly of section .text:
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080001e8 <__do_global_dtors_aux>:
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80001e8: b510 push {r4, lr}
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80001ea: 4c05 ldr r4, [pc, #20] ; (8000200 <__do_global_dtors_aux+0x18>)
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80001ec: 7823 ldrb r3, [r4, #0]
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80001ee: b933 cbnz r3, 80001fe <__do_global_dtors_aux+0x16>
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80001f0: 4b04 ldr r3, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x1c>)
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80001f2: b113 cbz r3, 80001fa <__do_global_dtors_aux+0x12>
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80001f4: 4804 ldr r0, [pc, #16] ; (8000208 <__do_global_dtors_aux+0x20>)
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80001f6: f3af 8000 nop.w
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80001fa: 2301 movs r3, #1
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80001fc: 7023 strb r3, [r4, #0]
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80001fe: bd10 pop {r4, pc}
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8000200: 200001dc .word 0x200001dc
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8000204: 00000000 .word 0x00000000
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8000208: 08008700 .word 0x08008700
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0800020c <frame_dummy>:
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800020c: b508 push {r3, lr}
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800020e: 4b03 ldr r3, [pc, #12] ; (800021c <frame_dummy+0x10>)
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8000210: b11b cbz r3, 800021a <frame_dummy+0xe>
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8000212: 4903 ldr r1, [pc, #12] ; (8000220 <frame_dummy+0x14>)
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8000214: 4803 ldr r0, [pc, #12] ; (8000224 <frame_dummy+0x18>)
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8000216: f3af 8000 nop.w
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800021a: bd08 pop {r3, pc}
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800021c: 00000000 .word 0x00000000
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8000220: 200001e0 .word 0x200001e0
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8000224: 08008700 .word 0x08008700
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08000228 <strlen>:
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8000228: 4603 mov r3, r0
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800022a: f813 2b01 ldrb.w r2, [r3], #1
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800022e: 2a00 cmp r2, #0
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8000230: d1fb bne.n 800022a <strlen+0x2>
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8000232: 1a18 subs r0, r3, r0
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8000234: 3801 subs r0, #1
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8000236: 4770 bx lr
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08000238 <__aeabi_drsub>:
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8000238: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000
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800023c: e002 b.n 8000244 <__adddf3>
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800023e: bf00 nop
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08000240 <__aeabi_dsub>:
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8000240: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000
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08000244 <__adddf3>:
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8000244: b530 push {r4, r5, lr}
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8000246: ea4f 0441 mov.w r4, r1, lsl #1
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800024a: ea4f 0543 mov.w r5, r3, lsl #1
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800024e: ea94 0f05 teq r4, r5
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8000252: bf08 it eq
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8000254: ea90 0f02 teqeq r0, r2
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8000258: bf1f itttt ne
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800025a: ea54 0c00 orrsne.w ip, r4, r0
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800025e: ea55 0c02 orrsne.w ip, r5, r2
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8000262: ea7f 5c64 mvnsne.w ip, r4, asr #21
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8000266: ea7f 5c65 mvnsne.w ip, r5, asr #21
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800026a: f000 80e2 beq.w 8000432 <__adddf3+0x1ee>
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800026e: ea4f 5454 mov.w r4, r4, lsr #21
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8000272: ebd4 5555 rsbs r5, r4, r5, lsr #21
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8000276: bfb8 it lt
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8000278: 426d neglt r5, r5
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800027a: dd0c ble.n 8000296 <__adddf3+0x52>
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800027c: 442c add r4, r5
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800027e: ea80 0202 eor.w r2, r0, r2
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8000282: ea81 0303 eor.w r3, r1, r3
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8000286: ea82 0000 eor.w r0, r2, r0
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800028a: ea83 0101 eor.w r1, r3, r1
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800028e: ea80 0202 eor.w r2, r0, r2
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8000292: ea81 0303 eor.w r3, r1, r3
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8000296: 2d36 cmp r5, #54 ; 0x36
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8000298: bf88 it hi
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800029a: bd30 pophi {r4, r5, pc}
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800029c: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
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80002a0: ea4f 3101 mov.w r1, r1, lsl #12
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80002a4: f44f 1c80 mov.w ip, #1048576 ; 0x100000
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80002a8: ea4c 3111 orr.w r1, ip, r1, lsr #12
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80002ac: d002 beq.n 80002b4 <__adddf3+0x70>
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80002ae: 4240 negs r0, r0
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80002b0: eb61 0141 sbc.w r1, r1, r1, lsl #1
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80002b4: f013 4f00 tst.w r3, #2147483648 ; 0x80000000
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80002b8: ea4f 3303 mov.w r3, r3, lsl #12
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80002bc: ea4c 3313 orr.w r3, ip, r3, lsr #12
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80002c0: d002 beq.n 80002c8 <__adddf3+0x84>
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80002c2: 4252 negs r2, r2
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80002c4: eb63 0343 sbc.w r3, r3, r3, lsl #1
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80002c8: ea94 0f05 teq r4, r5
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80002cc: f000 80a7 beq.w 800041e <__adddf3+0x1da>
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80002d0: f1a4 0401 sub.w r4, r4, #1
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80002d4: f1d5 0e20 rsbs lr, r5, #32
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80002d8: db0d blt.n 80002f6 <__adddf3+0xb2>
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80002da: fa02 fc0e lsl.w ip, r2, lr
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80002de: fa22 f205 lsr.w r2, r2, r5
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80002e2: 1880 adds r0, r0, r2
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80002e4: f141 0100 adc.w r1, r1, #0
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80002e8: fa03 f20e lsl.w r2, r3, lr
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80002ec: 1880 adds r0, r0, r2
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80002ee: fa43 f305 asr.w r3, r3, r5
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80002f2: 4159 adcs r1, r3
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80002f4: e00e b.n 8000314 <__adddf3+0xd0>
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80002f6: f1a5 0520 sub.w r5, r5, #32
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80002fa: f10e 0e20 add.w lr, lr, #32
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80002fe: 2a01 cmp r2, #1
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8000300: fa03 fc0e lsl.w ip, r3, lr
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8000304: bf28 it cs
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8000306: f04c 0c02 orrcs.w ip, ip, #2
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800030a: fa43 f305 asr.w r3, r3, r5
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800030e: 18c0 adds r0, r0, r3
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8000310: eb51 71e3 adcs.w r1, r1, r3, asr #31
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8000314: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
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8000318: d507 bpl.n 800032a <__adddf3+0xe6>
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800031a: f04f 0e00 mov.w lr, #0
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800031e: f1dc 0c00 rsbs ip, ip, #0
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8000322: eb7e 0000 sbcs.w r0, lr, r0
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8000326: eb6e 0101 sbc.w r1, lr, r1
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800032a: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000
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800032e: d31b bcc.n 8000368 <__adddf3+0x124>
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8000330: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000
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8000334: d30c bcc.n 8000350 <__adddf3+0x10c>
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8000336: 0849 lsrs r1, r1, #1
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8000338: ea5f 0030 movs.w r0, r0, rrx
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800033c: ea4f 0c3c mov.w ip, ip, rrx
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8000340: f104 0401 add.w r4, r4, #1
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8000344: ea4f 5244 mov.w r2, r4, lsl #21
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8000348: f512 0f80 cmn.w r2, #4194304 ; 0x400000
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800034c: f080 809a bcs.w 8000484 <__adddf3+0x240>
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8000350: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000
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8000354: bf08 it eq
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8000356: ea5f 0c50 movseq.w ip, r0, lsr #1
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800035a: f150 0000 adcs.w r0, r0, #0
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800035e: eb41 5104 adc.w r1, r1, r4, lsl #20
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8000362: ea41 0105 orr.w r1, r1, r5
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8000366: bd30 pop {r4, r5, pc}
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8000368: ea5f 0c4c movs.w ip, ip, lsl #1
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800036c: 4140 adcs r0, r0
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800036e: eb41 0101 adc.w r1, r1, r1
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8000372: 3c01 subs r4, #1
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8000374: bf28 it cs
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8000376: f5b1 1f80 cmpcs.w r1, #1048576 ; 0x100000
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800037a: d2e9 bcs.n 8000350 <__adddf3+0x10c>
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800037c: f091 0f00 teq r1, #0
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8000380: bf04 itt eq
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8000382: 4601 moveq r1, r0
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8000384: 2000 moveq r0, #0
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8000386: fab1 f381 clz r3, r1
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800038a: bf08 it eq
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800038c: 3320 addeq r3, #32
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800038e: f1a3 030b sub.w r3, r3, #11
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8000392: f1b3 0220 subs.w r2, r3, #32
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8000396: da0c bge.n 80003b2 <__adddf3+0x16e>
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8000398: 320c adds r2, #12
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800039a: dd08 ble.n 80003ae <__adddf3+0x16a>
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800039c: f102 0c14 add.w ip, r2, #20
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80003a0: f1c2 020c rsb r2, r2, #12
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80003a4: fa01 f00c lsl.w r0, r1, ip
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80003a8: fa21 f102 lsr.w r1, r1, r2
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80003ac: e00c b.n 80003c8 <__adddf3+0x184>
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80003ae: f102 0214 add.w r2, r2, #20
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80003b2: bfd8 it le
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80003b4: f1c2 0c20 rsble ip, r2, #32
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80003b8: fa01 f102 lsl.w r1, r1, r2
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80003bc: fa20 fc0c lsr.w ip, r0, ip
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80003c0: bfdc itt le
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80003c2: ea41 010c orrle.w r1, r1, ip
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80003c6: 4090 lslle r0, r2
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80003c8: 1ae4 subs r4, r4, r3
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80003ca: bfa2 ittt ge
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80003cc: eb01 5104 addge.w r1, r1, r4, lsl #20
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80003d0: 4329 orrge r1, r5
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80003d2: bd30 popge {r4, r5, pc}
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80003d4: ea6f 0404 mvn.w r4, r4
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80003d8: 3c1f subs r4, #31
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80003da: da1c bge.n 8000416 <__adddf3+0x1d2>
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80003dc: 340c adds r4, #12
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80003de: dc0e bgt.n 80003fe <__adddf3+0x1ba>
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80003e0: f104 0414 add.w r4, r4, #20
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80003e4: f1c4 0220 rsb r2, r4, #32
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80003e8: fa20 f004 lsr.w r0, r0, r4
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80003ec: fa01 f302 lsl.w r3, r1, r2
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80003f0: ea40 0003 orr.w r0, r0, r3
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80003f4: fa21 f304 lsr.w r3, r1, r4
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80003f8: ea45 0103 orr.w r1, r5, r3
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80003fc: bd30 pop {r4, r5, pc}
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80003fe: f1c4 040c rsb r4, r4, #12
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8000402: f1c4 0220 rsb r2, r4, #32
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8000406: fa20 f002 lsr.w r0, r0, r2
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800040a: fa01 f304 lsl.w r3, r1, r4
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800040e: ea40 0003 orr.w r0, r0, r3
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8000412: 4629 mov r1, r5
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8000414: bd30 pop {r4, r5, pc}
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8000416: fa21 f004 lsr.w r0, r1, r4
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800041a: 4629 mov r1, r5
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800041c: bd30 pop {r4, r5, pc}
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800041e: f094 0f00 teq r4, #0
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8000422: f483 1380 eor.w r3, r3, #1048576 ; 0x100000
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8000426: bf06 itte eq
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8000428: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000
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800042c: 3401 addeq r4, #1
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800042e: 3d01 subne r5, #1
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8000430: e74e b.n 80002d0 <__adddf3+0x8c>
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8000432: ea7f 5c64 mvns.w ip, r4, asr #21
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8000436: bf18 it ne
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8000438: ea7f 5c65 mvnsne.w ip, r5, asr #21
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800043c: d029 beq.n 8000492 <__adddf3+0x24e>
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800043e: ea94 0f05 teq r4, r5
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8000442: bf08 it eq
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8000444: ea90 0f02 teqeq r0, r2
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8000448: d005 beq.n 8000456 <__adddf3+0x212>
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800044a: ea54 0c00 orrs.w ip, r4, r0
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800044e: bf04 itt eq
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8000450: 4619 moveq r1, r3
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8000452: 4610 moveq r0, r2
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8000454: bd30 pop {r4, r5, pc}
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8000456: ea91 0f03 teq r1, r3
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800045a: bf1e ittt ne
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800045c: 2100 movne r1, #0
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800045e: 2000 movne r0, #0
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8000460: bd30 popne {r4, r5, pc}
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8000462: ea5f 5c54 movs.w ip, r4, lsr #21
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8000466: d105 bne.n 8000474 <__adddf3+0x230>
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||
8000468: 0040 lsls r0, r0, #1
|
||
800046a: 4149 adcs r1, r1
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||
800046c: bf28 it cs
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800046e: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000
|
||
8000472: bd30 pop {r4, r5, pc}
|
||
8000474: f514 0480 adds.w r4, r4, #4194304 ; 0x400000
|
||
8000478: bf3c itt cc
|
||
800047a: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000
|
||
800047e: bd30 popcc {r4, r5, pc}
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||
8000480: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
|
||
8000484: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000
|
||
8000488: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
|
||
800048c: f04f 0000 mov.w r0, #0
|
||
8000490: bd30 pop {r4, r5, pc}
|
||
8000492: ea7f 5c64 mvns.w ip, r4, asr #21
|
||
8000496: bf1a itte ne
|
||
8000498: 4619 movne r1, r3
|
||
800049a: 4610 movne r0, r2
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||
800049c: ea7f 5c65 mvnseq.w ip, r5, asr #21
|
||
80004a0: bf1c itt ne
|
||
80004a2: 460b movne r3, r1
|
||
80004a4: 4602 movne r2, r0
|
||
80004a6: ea50 3401 orrs.w r4, r0, r1, lsl #12
|
||
80004aa: bf06 itte eq
|
||
80004ac: ea52 3503 orrseq.w r5, r2, r3, lsl #12
|
||
80004b0: ea91 0f03 teqeq r1, r3
|
||
80004b4: f441 2100 orrne.w r1, r1, #524288 ; 0x80000
|
||
80004b8: bd30 pop {r4, r5, pc}
|
||
80004ba: bf00 nop
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||
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||
080004bc <__aeabi_ui2d>:
|
||
80004bc: f090 0f00 teq r0, #0
|
||
80004c0: bf04 itt eq
|
||
80004c2: 2100 moveq r1, #0
|
||
80004c4: 4770 bxeq lr
|
||
80004c6: b530 push {r4, r5, lr}
|
||
80004c8: f44f 6480 mov.w r4, #1024 ; 0x400
|
||
80004cc: f104 0432 add.w r4, r4, #50 ; 0x32
|
||
80004d0: f04f 0500 mov.w r5, #0
|
||
80004d4: f04f 0100 mov.w r1, #0
|
||
80004d8: e750 b.n 800037c <__adddf3+0x138>
|
||
80004da: bf00 nop
|
||
|
||
080004dc <__aeabi_i2d>:
|
||
80004dc: f090 0f00 teq r0, #0
|
||
80004e0: bf04 itt eq
|
||
80004e2: 2100 moveq r1, #0
|
||
80004e4: 4770 bxeq lr
|
||
80004e6: b530 push {r4, r5, lr}
|
||
80004e8: f44f 6480 mov.w r4, #1024 ; 0x400
|
||
80004ec: f104 0432 add.w r4, r4, #50 ; 0x32
|
||
80004f0: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000
|
||
80004f4: bf48 it mi
|
||
80004f6: 4240 negmi r0, r0
|
||
80004f8: f04f 0100 mov.w r1, #0
|
||
80004fc: e73e b.n 800037c <__adddf3+0x138>
|
||
80004fe: bf00 nop
|
||
|
||
08000500 <__aeabi_f2d>:
|
||
8000500: 0042 lsls r2, r0, #1
|
||
8000502: ea4f 01e2 mov.w r1, r2, asr #3
|
||
8000506: ea4f 0131 mov.w r1, r1, rrx
|
||
800050a: ea4f 7002 mov.w r0, r2, lsl #28
|
||
800050e: bf1f itttt ne
|
||
8000510: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000
|
||
8000514: f093 4f7f teqne r3, #4278190080 ; 0xff000000
|
||
8000518: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000
|
||
800051c: 4770 bxne lr
|
||
800051e: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000
|
||
8000522: bf08 it eq
|
||
8000524: 4770 bxeq lr
|
||
8000526: f093 4f7f teq r3, #4278190080 ; 0xff000000
|
||
800052a: bf04 itt eq
|
||
800052c: f441 2100 orreq.w r1, r1, #524288 ; 0x80000
|
||
8000530: 4770 bxeq lr
|
||
8000532: b530 push {r4, r5, lr}
|
||
8000534: f44f 7460 mov.w r4, #896 ; 0x380
|
||
8000538: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
|
||
800053c: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
|
||
8000540: e71c b.n 800037c <__adddf3+0x138>
|
||
8000542: bf00 nop
|
||
|
||
08000544 <__aeabi_ul2d>:
|
||
8000544: ea50 0201 orrs.w r2, r0, r1
|
||
8000548: bf08 it eq
|
||
800054a: 4770 bxeq lr
|
||
800054c: b530 push {r4, r5, lr}
|
||
800054e: f04f 0500 mov.w r5, #0
|
||
8000552: e00a b.n 800056a <__aeabi_l2d+0x16>
|
||
|
||
08000554 <__aeabi_l2d>:
|
||
8000554: ea50 0201 orrs.w r2, r0, r1
|
||
8000558: bf08 it eq
|
||
800055a: 4770 bxeq lr
|
||
800055c: b530 push {r4, r5, lr}
|
||
800055e: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000
|
||
8000562: d502 bpl.n 800056a <__aeabi_l2d+0x16>
|
||
8000564: 4240 negs r0, r0
|
||
8000566: eb61 0141 sbc.w r1, r1, r1, lsl #1
|
||
800056a: f44f 6480 mov.w r4, #1024 ; 0x400
|
||
800056e: f104 0432 add.w r4, r4, #50 ; 0x32
|
||
8000572: ea5f 5c91 movs.w ip, r1, lsr #22
|
||
8000576: f43f aed8 beq.w 800032a <__adddf3+0xe6>
|
||
800057a: f04f 0203 mov.w r2, #3
|
||
800057e: ea5f 0cdc movs.w ip, ip, lsr #3
|
||
8000582: bf18 it ne
|
||
8000584: 3203 addne r2, #3
|
||
8000586: ea5f 0cdc movs.w ip, ip, lsr #3
|
||
800058a: bf18 it ne
|
||
800058c: 3203 addne r2, #3
|
||
800058e: eb02 02dc add.w r2, r2, ip, lsr #3
|
||
8000592: f1c2 0320 rsb r3, r2, #32
|
||
8000596: fa00 fc03 lsl.w ip, r0, r3
|
||
800059a: fa20 f002 lsr.w r0, r0, r2
|
||
800059e: fa01 fe03 lsl.w lr, r1, r3
|
||
80005a2: ea40 000e orr.w r0, r0, lr
|
||
80005a6: fa21 f102 lsr.w r1, r1, r2
|
||
80005aa: 4414 add r4, r2
|
||
80005ac: e6bd b.n 800032a <__adddf3+0xe6>
|
||
80005ae: bf00 nop
|
||
|
||
080005b0 <__aeabi_dmul>:
|
||
80005b0: b570 push {r4, r5, r6, lr}
|
||
80005b2: f04f 0cff mov.w ip, #255 ; 0xff
|
||
80005b6: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
|
||
80005ba: ea1c 5411 ands.w r4, ip, r1, lsr #20
|
||
80005be: bf1d ittte ne
|
||
80005c0: ea1c 5513 andsne.w r5, ip, r3, lsr #20
|
||
80005c4: ea94 0f0c teqne r4, ip
|
||
80005c8: ea95 0f0c teqne r5, ip
|
||
80005cc: f000 f8de bleq 800078c <__aeabi_dmul+0x1dc>
|
||
80005d0: 442c add r4, r5
|
||
80005d2: ea81 0603 eor.w r6, r1, r3
|
||
80005d6: ea21 514c bic.w r1, r1, ip, lsl #21
|
||
80005da: ea23 534c bic.w r3, r3, ip, lsl #21
|
||
80005de: ea50 3501 orrs.w r5, r0, r1, lsl #12
|
||
80005e2: bf18 it ne
|
||
80005e4: ea52 3503 orrsne.w r5, r2, r3, lsl #12
|
||
80005e8: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
80005ec: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
|
||
80005f0: d038 beq.n 8000664 <__aeabi_dmul+0xb4>
|
||
80005f2: fba0 ce02 umull ip, lr, r0, r2
|
||
80005f6: f04f 0500 mov.w r5, #0
|
||
80005fa: fbe1 e502 umlal lr, r5, r1, r2
|
||
80005fe: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000
|
||
8000602: fbe0 e503 umlal lr, r5, r0, r3
|
||
8000606: f04f 0600 mov.w r6, #0
|
||
800060a: fbe1 5603 umlal r5, r6, r1, r3
|
||
800060e: f09c 0f00 teq ip, #0
|
||
8000612: bf18 it ne
|
||
8000614: f04e 0e01 orrne.w lr, lr, #1
|
||
8000618: f1a4 04ff sub.w r4, r4, #255 ; 0xff
|
||
800061c: f5b6 7f00 cmp.w r6, #512 ; 0x200
|
||
8000620: f564 7440 sbc.w r4, r4, #768 ; 0x300
|
||
8000624: d204 bcs.n 8000630 <__aeabi_dmul+0x80>
|
||
8000626: ea5f 0e4e movs.w lr, lr, lsl #1
|
||
800062a: 416d adcs r5, r5
|
||
800062c: eb46 0606 adc.w r6, r6, r6
|
||
8000630: ea42 21c6 orr.w r1, r2, r6, lsl #11
|
||
8000634: ea41 5155 orr.w r1, r1, r5, lsr #21
|
||
8000638: ea4f 20c5 mov.w r0, r5, lsl #11
|
||
800063c: ea40 505e orr.w r0, r0, lr, lsr #21
|
||
8000640: ea4f 2ece mov.w lr, lr, lsl #11
|
||
8000644: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
|
||
8000648: bf88 it hi
|
||
800064a: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
|
||
800064e: d81e bhi.n 800068e <__aeabi_dmul+0xde>
|
||
8000650: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000
|
||
8000654: bf08 it eq
|
||
8000656: ea5f 0e50 movseq.w lr, r0, lsr #1
|
||
800065a: f150 0000 adcs.w r0, r0, #0
|
||
800065e: eb41 5104 adc.w r1, r1, r4, lsl #20
|
||
8000662: bd70 pop {r4, r5, r6, pc}
|
||
8000664: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000
|
||
8000668: ea46 0101 orr.w r1, r6, r1
|
||
800066c: ea40 0002 orr.w r0, r0, r2
|
||
8000670: ea81 0103 eor.w r1, r1, r3
|
||
8000674: ebb4 045c subs.w r4, r4, ip, lsr #1
|
||
8000678: bfc2 ittt gt
|
||
800067a: ebd4 050c rsbsgt r5, r4, ip
|
||
800067e: ea41 5104 orrgt.w r1, r1, r4, lsl #20
|
||
8000682: bd70 popgt {r4, r5, r6, pc}
|
||
8000684: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
8000688: f04f 0e00 mov.w lr, #0
|
||
800068c: 3c01 subs r4, #1
|
||
800068e: f300 80ab bgt.w 80007e8 <__aeabi_dmul+0x238>
|
||
8000692: f114 0f36 cmn.w r4, #54 ; 0x36
|
||
8000696: bfde ittt le
|
||
8000698: 2000 movle r0, #0
|
||
800069a: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000
|
||
800069e: bd70 pople {r4, r5, r6, pc}
|
||
80006a0: f1c4 0400 rsb r4, r4, #0
|
||
80006a4: 3c20 subs r4, #32
|
||
80006a6: da35 bge.n 8000714 <__aeabi_dmul+0x164>
|
||
80006a8: 340c adds r4, #12
|
||
80006aa: dc1b bgt.n 80006e4 <__aeabi_dmul+0x134>
|
||
80006ac: f104 0414 add.w r4, r4, #20
|
||
80006b0: f1c4 0520 rsb r5, r4, #32
|
||
80006b4: fa00 f305 lsl.w r3, r0, r5
|
||
80006b8: fa20 f004 lsr.w r0, r0, r4
|
||
80006bc: fa01 f205 lsl.w r2, r1, r5
|
||
80006c0: ea40 0002 orr.w r0, r0, r2
|
||
80006c4: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000
|
||
80006c8: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
|
||
80006cc: eb10 70d3 adds.w r0, r0, r3, lsr #31
|
||
80006d0: fa21 f604 lsr.w r6, r1, r4
|
||
80006d4: eb42 0106 adc.w r1, r2, r6
|
||
80006d8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
||
80006dc: bf08 it eq
|
||
80006de: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
||
80006e2: bd70 pop {r4, r5, r6, pc}
|
||
80006e4: f1c4 040c rsb r4, r4, #12
|
||
80006e8: f1c4 0520 rsb r5, r4, #32
|
||
80006ec: fa00 f304 lsl.w r3, r0, r4
|
||
80006f0: fa20 f005 lsr.w r0, r0, r5
|
||
80006f4: fa01 f204 lsl.w r2, r1, r4
|
||
80006f8: ea40 0002 orr.w r0, r0, r2
|
||
80006fc: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
8000700: eb10 70d3 adds.w r0, r0, r3, lsr #31
|
||
8000704: f141 0100 adc.w r1, r1, #0
|
||
8000708: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
||
800070c: bf08 it eq
|
||
800070e: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
||
8000712: bd70 pop {r4, r5, r6, pc}
|
||
8000714: f1c4 0520 rsb r5, r4, #32
|
||
8000718: fa00 f205 lsl.w r2, r0, r5
|
||
800071c: ea4e 0e02 orr.w lr, lr, r2
|
||
8000720: fa20 f304 lsr.w r3, r0, r4
|
||
8000724: fa01 f205 lsl.w r2, r1, r5
|
||
8000728: ea43 0302 orr.w r3, r3, r2
|
||
800072c: fa21 f004 lsr.w r0, r1, r4
|
||
8000730: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
8000734: fa21 f204 lsr.w r2, r1, r4
|
||
8000738: ea20 0002 bic.w r0, r0, r2
|
||
800073c: eb00 70d3 add.w r0, r0, r3, lsr #31
|
||
8000740: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
||
8000744: bf08 it eq
|
||
8000746: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
||
800074a: bd70 pop {r4, r5, r6, pc}
|
||
800074c: f094 0f00 teq r4, #0
|
||
8000750: d10f bne.n 8000772 <__aeabi_dmul+0x1c2>
|
||
8000752: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000
|
||
8000756: 0040 lsls r0, r0, #1
|
||
8000758: eb41 0101 adc.w r1, r1, r1
|
||
800075c: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
||
8000760: bf08 it eq
|
||
8000762: 3c01 subeq r4, #1
|
||
8000764: d0f7 beq.n 8000756 <__aeabi_dmul+0x1a6>
|
||
8000766: ea41 0106 orr.w r1, r1, r6
|
||
800076a: f095 0f00 teq r5, #0
|
||
800076e: bf18 it ne
|
||
8000770: 4770 bxne lr
|
||
8000772: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000
|
||
8000776: 0052 lsls r2, r2, #1
|
||
8000778: eb43 0303 adc.w r3, r3, r3
|
||
800077c: f413 1f80 tst.w r3, #1048576 ; 0x100000
|
||
8000780: bf08 it eq
|
||
8000782: 3d01 subeq r5, #1
|
||
8000784: d0f7 beq.n 8000776 <__aeabi_dmul+0x1c6>
|
||
8000786: ea43 0306 orr.w r3, r3, r6
|
||
800078a: 4770 bx lr
|
||
800078c: ea94 0f0c teq r4, ip
|
||
8000790: ea0c 5513 and.w r5, ip, r3, lsr #20
|
||
8000794: bf18 it ne
|
||
8000796: ea95 0f0c teqne r5, ip
|
||
800079a: d00c beq.n 80007b6 <__aeabi_dmul+0x206>
|
||
800079c: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
||
80007a0: bf18 it ne
|
||
80007a2: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
||
80007a6: d1d1 bne.n 800074c <__aeabi_dmul+0x19c>
|
||
80007a8: ea81 0103 eor.w r1, r1, r3
|
||
80007ac: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
80007b0: f04f 0000 mov.w r0, #0
|
||
80007b4: bd70 pop {r4, r5, r6, pc}
|
||
80007b6: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
||
80007ba: bf06 itte eq
|
||
80007bc: 4610 moveq r0, r2
|
||
80007be: 4619 moveq r1, r3
|
||
80007c0: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
||
80007c4: d019 beq.n 80007fa <__aeabi_dmul+0x24a>
|
||
80007c6: ea94 0f0c teq r4, ip
|
||
80007ca: d102 bne.n 80007d2 <__aeabi_dmul+0x222>
|
||
80007cc: ea50 3601 orrs.w r6, r0, r1, lsl #12
|
||
80007d0: d113 bne.n 80007fa <__aeabi_dmul+0x24a>
|
||
80007d2: ea95 0f0c teq r5, ip
|
||
80007d6: d105 bne.n 80007e4 <__aeabi_dmul+0x234>
|
||
80007d8: ea52 3603 orrs.w r6, r2, r3, lsl #12
|
||
80007dc: bf1c itt ne
|
||
80007de: 4610 movne r0, r2
|
||
80007e0: 4619 movne r1, r3
|
||
80007e2: d10a bne.n 80007fa <__aeabi_dmul+0x24a>
|
||
80007e4: ea81 0103 eor.w r1, r1, r3
|
||
80007e8: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
80007ec: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
|
||
80007f0: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
|
||
80007f4: f04f 0000 mov.w r0, #0
|
||
80007f8: bd70 pop {r4, r5, r6, pc}
|
||
80007fa: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
|
||
80007fe: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000
|
||
8000802: bd70 pop {r4, r5, r6, pc}
|
||
|
||
08000804 <__aeabi_ddiv>:
|
||
8000804: b570 push {r4, r5, r6, lr}
|
||
8000806: f04f 0cff mov.w ip, #255 ; 0xff
|
||
800080a: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
|
||
800080e: ea1c 5411 ands.w r4, ip, r1, lsr #20
|
||
8000812: bf1d ittte ne
|
||
8000814: ea1c 5513 andsne.w r5, ip, r3, lsr #20
|
||
8000818: ea94 0f0c teqne r4, ip
|
||
800081c: ea95 0f0c teqne r5, ip
|
||
8000820: f000 f8a7 bleq 8000972 <__aeabi_ddiv+0x16e>
|
||
8000824: eba4 0405 sub.w r4, r4, r5
|
||
8000828: ea81 0e03 eor.w lr, r1, r3
|
||
800082c: ea52 3503 orrs.w r5, r2, r3, lsl #12
|
||
8000830: ea4f 3101 mov.w r1, r1, lsl #12
|
||
8000834: f000 8088 beq.w 8000948 <__aeabi_ddiv+0x144>
|
||
8000838: ea4f 3303 mov.w r3, r3, lsl #12
|
||
800083c: f04f 5580 mov.w r5, #268435456 ; 0x10000000
|
||
8000840: ea45 1313 orr.w r3, r5, r3, lsr #4
|
||
8000844: ea43 6312 orr.w r3, r3, r2, lsr #24
|
||
8000848: ea4f 2202 mov.w r2, r2, lsl #8
|
||
800084c: ea45 1511 orr.w r5, r5, r1, lsr #4
|
||
8000850: ea45 6510 orr.w r5, r5, r0, lsr #24
|
||
8000854: ea4f 2600 mov.w r6, r0, lsl #8
|
||
8000858: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000
|
||
800085c: 429d cmp r5, r3
|
||
800085e: bf08 it eq
|
||
8000860: 4296 cmpeq r6, r2
|
||
8000862: f144 04fd adc.w r4, r4, #253 ; 0xfd
|
||
8000866: f504 7440 add.w r4, r4, #768 ; 0x300
|
||
800086a: d202 bcs.n 8000872 <__aeabi_ddiv+0x6e>
|
||
800086c: 085b lsrs r3, r3, #1
|
||
800086e: ea4f 0232 mov.w r2, r2, rrx
|
||
8000872: 1ab6 subs r6, r6, r2
|
||
8000874: eb65 0503 sbc.w r5, r5, r3
|
||
8000878: 085b lsrs r3, r3, #1
|
||
800087a: ea4f 0232 mov.w r2, r2, rrx
|
||
800087e: f44f 1080 mov.w r0, #1048576 ; 0x100000
|
||
8000882: f44f 2c00 mov.w ip, #524288 ; 0x80000
|
||
8000886: ebb6 0e02 subs.w lr, r6, r2
|
||
800088a: eb75 0e03 sbcs.w lr, r5, r3
|
||
800088e: bf22 ittt cs
|
||
8000890: 1ab6 subcs r6, r6, r2
|
||
8000892: 4675 movcs r5, lr
|
||
8000894: ea40 000c orrcs.w r0, r0, ip
|
||
8000898: 085b lsrs r3, r3, #1
|
||
800089a: ea4f 0232 mov.w r2, r2, rrx
|
||
800089e: ebb6 0e02 subs.w lr, r6, r2
|
||
80008a2: eb75 0e03 sbcs.w lr, r5, r3
|
||
80008a6: bf22 ittt cs
|
||
80008a8: 1ab6 subcs r6, r6, r2
|
||
80008aa: 4675 movcs r5, lr
|
||
80008ac: ea40 005c orrcs.w r0, r0, ip, lsr #1
|
||
80008b0: 085b lsrs r3, r3, #1
|
||
80008b2: ea4f 0232 mov.w r2, r2, rrx
|
||
80008b6: ebb6 0e02 subs.w lr, r6, r2
|
||
80008ba: eb75 0e03 sbcs.w lr, r5, r3
|
||
80008be: bf22 ittt cs
|
||
80008c0: 1ab6 subcs r6, r6, r2
|
||
80008c2: 4675 movcs r5, lr
|
||
80008c4: ea40 009c orrcs.w r0, r0, ip, lsr #2
|
||
80008c8: 085b lsrs r3, r3, #1
|
||
80008ca: ea4f 0232 mov.w r2, r2, rrx
|
||
80008ce: ebb6 0e02 subs.w lr, r6, r2
|
||
80008d2: eb75 0e03 sbcs.w lr, r5, r3
|
||
80008d6: bf22 ittt cs
|
||
80008d8: 1ab6 subcs r6, r6, r2
|
||
80008da: 4675 movcs r5, lr
|
||
80008dc: ea40 00dc orrcs.w r0, r0, ip, lsr #3
|
||
80008e0: ea55 0e06 orrs.w lr, r5, r6
|
||
80008e4: d018 beq.n 8000918 <__aeabi_ddiv+0x114>
|
||
80008e6: ea4f 1505 mov.w r5, r5, lsl #4
|
||
80008ea: ea45 7516 orr.w r5, r5, r6, lsr #28
|
||
80008ee: ea4f 1606 mov.w r6, r6, lsl #4
|
||
80008f2: ea4f 03c3 mov.w r3, r3, lsl #3
|
||
80008f6: ea43 7352 orr.w r3, r3, r2, lsr #29
|
||
80008fa: ea4f 02c2 mov.w r2, r2, lsl #3
|
||
80008fe: ea5f 1c1c movs.w ip, ip, lsr #4
|
||
8000902: d1c0 bne.n 8000886 <__aeabi_ddiv+0x82>
|
||
8000904: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
||
8000908: d10b bne.n 8000922 <__aeabi_ddiv+0x11e>
|
||
800090a: ea41 0100 orr.w r1, r1, r0
|
||
800090e: f04f 0000 mov.w r0, #0
|
||
8000912: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000
|
||
8000916: e7b6 b.n 8000886 <__aeabi_ddiv+0x82>
|
||
8000918: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
||
800091c: bf04 itt eq
|
||
800091e: 4301 orreq r1, r0
|
||
8000920: 2000 moveq r0, #0
|
||
8000922: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
|
||
8000926: bf88 it hi
|
||
8000928: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
|
||
800092c: f63f aeaf bhi.w 800068e <__aeabi_dmul+0xde>
|
||
8000930: ebb5 0c03 subs.w ip, r5, r3
|
||
8000934: bf04 itt eq
|
||
8000936: ebb6 0c02 subseq.w ip, r6, r2
|
||
800093a: ea5f 0c50 movseq.w ip, r0, lsr #1
|
||
800093e: f150 0000 adcs.w r0, r0, #0
|
||
8000942: eb41 5104 adc.w r1, r1, r4, lsl #20
|
||
8000946: bd70 pop {r4, r5, r6, pc}
|
||
8000948: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000
|
||
800094c: ea4e 3111 orr.w r1, lr, r1, lsr #12
|
||
8000950: eb14 045c adds.w r4, r4, ip, lsr #1
|
||
8000954: bfc2 ittt gt
|
||
8000956: ebd4 050c rsbsgt r5, r4, ip
|
||
800095a: ea41 5104 orrgt.w r1, r1, r4, lsl #20
|
||
800095e: bd70 popgt {r4, r5, r6, pc}
|
||
8000960: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
8000964: f04f 0e00 mov.w lr, #0
|
||
8000968: 3c01 subs r4, #1
|
||
800096a: e690 b.n 800068e <__aeabi_dmul+0xde>
|
||
800096c: ea45 0e06 orr.w lr, r5, r6
|
||
8000970: e68d b.n 800068e <__aeabi_dmul+0xde>
|
||
8000972: ea0c 5513 and.w r5, ip, r3, lsr #20
|
||
8000976: ea94 0f0c teq r4, ip
|
||
800097a: bf08 it eq
|
||
800097c: ea95 0f0c teqeq r5, ip
|
||
8000980: f43f af3b beq.w 80007fa <__aeabi_dmul+0x24a>
|
||
8000984: ea94 0f0c teq r4, ip
|
||
8000988: d10a bne.n 80009a0 <__aeabi_ddiv+0x19c>
|
||
800098a: ea50 3401 orrs.w r4, r0, r1, lsl #12
|
||
800098e: f47f af34 bne.w 80007fa <__aeabi_dmul+0x24a>
|
||
8000992: ea95 0f0c teq r5, ip
|
||
8000996: f47f af25 bne.w 80007e4 <__aeabi_dmul+0x234>
|
||
800099a: 4610 mov r0, r2
|
||
800099c: 4619 mov r1, r3
|
||
800099e: e72c b.n 80007fa <__aeabi_dmul+0x24a>
|
||
80009a0: ea95 0f0c teq r5, ip
|
||
80009a4: d106 bne.n 80009b4 <__aeabi_ddiv+0x1b0>
|
||
80009a6: ea52 3503 orrs.w r5, r2, r3, lsl #12
|
||
80009aa: f43f aefd beq.w 80007a8 <__aeabi_dmul+0x1f8>
|
||
80009ae: 4610 mov r0, r2
|
||
80009b0: 4619 mov r1, r3
|
||
80009b2: e722 b.n 80007fa <__aeabi_dmul+0x24a>
|
||
80009b4: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
||
80009b8: bf18 it ne
|
||
80009ba: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
||
80009be: f47f aec5 bne.w 800074c <__aeabi_dmul+0x19c>
|
||
80009c2: ea50 0441 orrs.w r4, r0, r1, lsl #1
|
||
80009c6: f47f af0d bne.w 80007e4 <__aeabi_dmul+0x234>
|
||
80009ca: ea52 0543 orrs.w r5, r2, r3, lsl #1
|
||
80009ce: f47f aeeb bne.w 80007a8 <__aeabi_dmul+0x1f8>
|
||
80009d2: e712 b.n 80007fa <__aeabi_dmul+0x24a>
|
||
|
||
080009d4 <__gedf2>:
|
||
80009d4: f04f 3cff mov.w ip, #4294967295 ; 0xffffffff
|
||
80009d8: e006 b.n 80009e8 <__cmpdf2+0x4>
|
||
80009da: bf00 nop
|
||
|
||
080009dc <__ledf2>:
|
||
80009dc: f04f 0c01 mov.w ip, #1
|
||
80009e0: e002 b.n 80009e8 <__cmpdf2+0x4>
|
||
80009e2: bf00 nop
|
||
|
||
080009e4 <__cmpdf2>:
|
||
80009e4: f04f 0c01 mov.w ip, #1
|
||
80009e8: f84d cd04 str.w ip, [sp, #-4]!
|
||
80009ec: ea4f 0c41 mov.w ip, r1, lsl #1
|
||
80009f0: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
80009f4: ea4f 0c43 mov.w ip, r3, lsl #1
|
||
80009f8: bf18 it ne
|
||
80009fa: ea7f 5c6c mvnsne.w ip, ip, asr #21
|
||
80009fe: d01b beq.n 8000a38 <__cmpdf2+0x54>
|
||
8000a00: b001 add sp, #4
|
||
8000a02: ea50 0c41 orrs.w ip, r0, r1, lsl #1
|
||
8000a06: bf0c ite eq
|
||
8000a08: ea52 0c43 orrseq.w ip, r2, r3, lsl #1
|
||
8000a0c: ea91 0f03 teqne r1, r3
|
||
8000a10: bf02 ittt eq
|
||
8000a12: ea90 0f02 teqeq r0, r2
|
||
8000a16: 2000 moveq r0, #0
|
||
8000a18: 4770 bxeq lr
|
||
8000a1a: f110 0f00 cmn.w r0, #0
|
||
8000a1e: ea91 0f03 teq r1, r3
|
||
8000a22: bf58 it pl
|
||
8000a24: 4299 cmppl r1, r3
|
||
8000a26: bf08 it eq
|
||
8000a28: 4290 cmpeq r0, r2
|
||
8000a2a: bf2c ite cs
|
||
8000a2c: 17d8 asrcs r0, r3, #31
|
||
8000a2e: ea6f 70e3 mvncc.w r0, r3, asr #31
|
||
8000a32: f040 0001 orr.w r0, r0, #1
|
||
8000a36: 4770 bx lr
|
||
8000a38: ea4f 0c41 mov.w ip, r1, lsl #1
|
||
8000a3c: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000a40: d102 bne.n 8000a48 <__cmpdf2+0x64>
|
||
8000a42: ea50 3c01 orrs.w ip, r0, r1, lsl #12
|
||
8000a46: d107 bne.n 8000a58 <__cmpdf2+0x74>
|
||
8000a48: ea4f 0c43 mov.w ip, r3, lsl #1
|
||
8000a4c: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000a50: d1d6 bne.n 8000a00 <__cmpdf2+0x1c>
|
||
8000a52: ea52 3c03 orrs.w ip, r2, r3, lsl #12
|
||
8000a56: d0d3 beq.n 8000a00 <__cmpdf2+0x1c>
|
||
8000a58: f85d 0b04 ldr.w r0, [sp], #4
|
||
8000a5c: 4770 bx lr
|
||
8000a5e: bf00 nop
|
||
|
||
08000a60 <__aeabi_cdrcmple>:
|
||
8000a60: 4684 mov ip, r0
|
||
8000a62: 4610 mov r0, r2
|
||
8000a64: 4662 mov r2, ip
|
||
8000a66: 468c mov ip, r1
|
||
8000a68: 4619 mov r1, r3
|
||
8000a6a: 4663 mov r3, ip
|
||
8000a6c: e000 b.n 8000a70 <__aeabi_cdcmpeq>
|
||
8000a6e: bf00 nop
|
||
|
||
08000a70 <__aeabi_cdcmpeq>:
|
||
8000a70: b501 push {r0, lr}
|
||
8000a72: f7ff ffb7 bl 80009e4 <__cmpdf2>
|
||
8000a76: 2800 cmp r0, #0
|
||
8000a78: bf48 it mi
|
||
8000a7a: f110 0f00 cmnmi.w r0, #0
|
||
8000a7e: bd01 pop {r0, pc}
|
||
|
||
08000a80 <__aeabi_dcmpeq>:
|
||
8000a80: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000a84: f7ff fff4 bl 8000a70 <__aeabi_cdcmpeq>
|
||
8000a88: bf0c ite eq
|
||
8000a8a: 2001 moveq r0, #1
|
||
8000a8c: 2000 movne r0, #0
|
||
8000a8e: f85d fb08 ldr.w pc, [sp], #8
|
||
8000a92: bf00 nop
|
||
|
||
08000a94 <__aeabi_dcmplt>:
|
||
8000a94: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000a98: f7ff ffea bl 8000a70 <__aeabi_cdcmpeq>
|
||
8000a9c: bf34 ite cc
|
||
8000a9e: 2001 movcc r0, #1
|
||
8000aa0: 2000 movcs r0, #0
|
||
8000aa2: f85d fb08 ldr.w pc, [sp], #8
|
||
8000aa6: bf00 nop
|
||
|
||
08000aa8 <__aeabi_dcmple>:
|
||
8000aa8: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000aac: f7ff ffe0 bl 8000a70 <__aeabi_cdcmpeq>
|
||
8000ab0: bf94 ite ls
|
||
8000ab2: 2001 movls r0, #1
|
||
8000ab4: 2000 movhi r0, #0
|
||
8000ab6: f85d fb08 ldr.w pc, [sp], #8
|
||
8000aba: bf00 nop
|
||
|
||
08000abc <__aeabi_dcmpge>:
|
||
8000abc: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000ac0: f7ff ffce bl 8000a60 <__aeabi_cdrcmple>
|
||
8000ac4: bf94 ite ls
|
||
8000ac6: 2001 movls r0, #1
|
||
8000ac8: 2000 movhi r0, #0
|
||
8000aca: f85d fb08 ldr.w pc, [sp], #8
|
||
8000ace: bf00 nop
|
||
|
||
08000ad0 <__aeabi_dcmpgt>:
|
||
8000ad0: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000ad4: f7ff ffc4 bl 8000a60 <__aeabi_cdrcmple>
|
||
8000ad8: bf34 ite cc
|
||
8000ada: 2001 movcc r0, #1
|
||
8000adc: 2000 movcs r0, #0
|
||
8000ade: f85d fb08 ldr.w pc, [sp], #8
|
||
8000ae2: bf00 nop
|
||
|
||
08000ae4 <__aeabi_dcmpun>:
|
||
8000ae4: ea4f 0c41 mov.w ip, r1, lsl #1
|
||
8000ae8: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000aec: d102 bne.n 8000af4 <__aeabi_dcmpun+0x10>
|
||
8000aee: ea50 3c01 orrs.w ip, r0, r1, lsl #12
|
||
8000af2: d10a bne.n 8000b0a <__aeabi_dcmpun+0x26>
|
||
8000af4: ea4f 0c43 mov.w ip, r3, lsl #1
|
||
8000af8: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000afc: d102 bne.n 8000b04 <__aeabi_dcmpun+0x20>
|
||
8000afe: ea52 3c03 orrs.w ip, r2, r3, lsl #12
|
||
8000b02: d102 bne.n 8000b0a <__aeabi_dcmpun+0x26>
|
||
8000b04: f04f 0000 mov.w r0, #0
|
||
8000b08: 4770 bx lr
|
||
8000b0a: f04f 0001 mov.w r0, #1
|
||
8000b0e: 4770 bx lr
|
||
|
||
08000b10 <__aeabi_d2iz>:
|
||
8000b10: ea4f 0241 mov.w r2, r1, lsl #1
|
||
8000b14: f512 1200 adds.w r2, r2, #2097152 ; 0x200000
|
||
8000b18: d215 bcs.n 8000b46 <__aeabi_d2iz+0x36>
|
||
8000b1a: d511 bpl.n 8000b40 <__aeabi_d2iz+0x30>
|
||
8000b1c: f46f 7378 mvn.w r3, #992 ; 0x3e0
|
||
8000b20: ebb3 5262 subs.w r2, r3, r2, asr #21
|
||
8000b24: d912 bls.n 8000b4c <__aeabi_d2iz+0x3c>
|
||
8000b26: ea4f 23c1 mov.w r3, r1, lsl #11
|
||
8000b2a: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
||
8000b2e: ea43 5350 orr.w r3, r3, r0, lsr #21
|
||
8000b32: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
|
||
8000b36: fa23 f002 lsr.w r0, r3, r2
|
||
8000b3a: bf18 it ne
|
||
8000b3c: 4240 negne r0, r0
|
||
8000b3e: 4770 bx lr
|
||
8000b40: f04f 0000 mov.w r0, #0
|
||
8000b44: 4770 bx lr
|
||
8000b46: ea50 3001 orrs.w r0, r0, r1, lsl #12
|
||
8000b4a: d105 bne.n 8000b58 <__aeabi_d2iz+0x48>
|
||
8000b4c: f011 4000 ands.w r0, r1, #2147483648 ; 0x80000000
|
||
8000b50: bf08 it eq
|
||
8000b52: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000
|
||
8000b56: 4770 bx lr
|
||
8000b58: f04f 0000 mov.w r0, #0
|
||
8000b5c: 4770 bx lr
|
||
8000b5e: bf00 nop
|
||
|
||
08000b60 <__aeabi_d2f>:
|
||
8000b60: ea4f 0241 mov.w r2, r1, lsl #1
|
||
8000b64: f1b2 43e0 subs.w r3, r2, #1879048192 ; 0x70000000
|
||
8000b68: bf24 itt cs
|
||
8000b6a: f5b3 1c00 subscs.w ip, r3, #2097152 ; 0x200000
|
||
8000b6e: f1dc 5cfe rsbscs ip, ip, #532676608 ; 0x1fc00000
|
||
8000b72: d90d bls.n 8000b90 <__aeabi_d2f+0x30>
|
||
8000b74: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
||
8000b78: ea4f 02c0 mov.w r2, r0, lsl #3
|
||
8000b7c: ea4c 7050 orr.w r0, ip, r0, lsr #29
|
||
8000b80: f1b2 4f00 cmp.w r2, #2147483648 ; 0x80000000
|
||
8000b84: eb40 0083 adc.w r0, r0, r3, lsl #2
|
||
8000b88: bf08 it eq
|
||
8000b8a: f020 0001 biceq.w r0, r0, #1
|
||
8000b8e: 4770 bx lr
|
||
8000b90: f011 4f80 tst.w r1, #1073741824 ; 0x40000000
|
||
8000b94: d121 bne.n 8000bda <__aeabi_d2f+0x7a>
|
||
8000b96: f113 7238 adds.w r2, r3, #48234496 ; 0x2e00000
|
||
8000b9a: bfbc itt lt
|
||
8000b9c: f001 4000 andlt.w r0, r1, #2147483648 ; 0x80000000
|
||
8000ba0: 4770 bxlt lr
|
||
8000ba2: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
8000ba6: ea4f 5252 mov.w r2, r2, lsr #21
|
||
8000baa: f1c2 0218 rsb r2, r2, #24
|
||
8000bae: f1c2 0c20 rsb ip, r2, #32
|
||
8000bb2: fa10 f30c lsls.w r3, r0, ip
|
||
8000bb6: fa20 f002 lsr.w r0, r0, r2
|
||
8000bba: bf18 it ne
|
||
8000bbc: f040 0001 orrne.w r0, r0, #1
|
||
8000bc0: ea4f 23c1 mov.w r3, r1, lsl #11
|
||
8000bc4: ea4f 23d3 mov.w r3, r3, lsr #11
|
||
8000bc8: fa03 fc0c lsl.w ip, r3, ip
|
||
8000bcc: ea40 000c orr.w r0, r0, ip
|
||
8000bd0: fa23 f302 lsr.w r3, r3, r2
|
||
8000bd4: ea4f 0343 mov.w r3, r3, lsl #1
|
||
8000bd8: e7cc b.n 8000b74 <__aeabi_d2f+0x14>
|
||
8000bda: ea7f 5362 mvns.w r3, r2, asr #21
|
||
8000bde: d107 bne.n 8000bf0 <__aeabi_d2f+0x90>
|
||
8000be0: ea50 3301 orrs.w r3, r0, r1, lsl #12
|
||
8000be4: bf1e ittt ne
|
||
8000be6: f04f 40fe movne.w r0, #2130706432 ; 0x7f000000
|
||
8000bea: f440 0040 orrne.w r0, r0, #12582912 ; 0xc00000
|
||
8000bee: 4770 bxne lr
|
||
8000bf0: f001 4000 and.w r0, r1, #2147483648 ; 0x80000000
|
||
8000bf4: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
||
8000bf8: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000bfc: 4770 bx lr
|
||
8000bfe: bf00 nop
|
||
|
||
08000c00 <__aeabi_frsub>:
|
||
8000c00: f080 4000 eor.w r0, r0, #2147483648 ; 0x80000000
|
||
8000c04: e002 b.n 8000c0c <__addsf3>
|
||
8000c06: bf00 nop
|
||
|
||
08000c08 <__aeabi_fsub>:
|
||
8000c08: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000
|
||
|
||
08000c0c <__addsf3>:
|
||
8000c0c: 0042 lsls r2, r0, #1
|
||
8000c0e: bf1f itttt ne
|
||
8000c10: ea5f 0341 movsne.w r3, r1, lsl #1
|
||
8000c14: ea92 0f03 teqne r2, r3
|
||
8000c18: ea7f 6c22 mvnsne.w ip, r2, asr #24
|
||
8000c1c: ea7f 6c23 mvnsne.w ip, r3, asr #24
|
||
8000c20: d06a beq.n 8000cf8 <__addsf3+0xec>
|
||
8000c22: ea4f 6212 mov.w r2, r2, lsr #24
|
||
8000c26: ebd2 6313 rsbs r3, r2, r3, lsr #24
|
||
8000c2a: bfc1 itttt gt
|
||
8000c2c: 18d2 addgt r2, r2, r3
|
||
8000c2e: 4041 eorgt r1, r0
|
||
8000c30: 4048 eorgt r0, r1
|
||
8000c32: 4041 eorgt r1, r0
|
||
8000c34: bfb8 it lt
|
||
8000c36: 425b neglt r3, r3
|
||
8000c38: 2b19 cmp r3, #25
|
||
8000c3a: bf88 it hi
|
||
8000c3c: 4770 bxhi lr
|
||
8000c3e: f010 4f00 tst.w r0, #2147483648 ; 0x80000000
|
||
8000c42: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000c46: f020 407f bic.w r0, r0, #4278190080 ; 0xff000000
|
||
8000c4a: bf18 it ne
|
||
8000c4c: 4240 negne r0, r0
|
||
8000c4e: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
|
||
8000c52: f441 0100 orr.w r1, r1, #8388608 ; 0x800000
|
||
8000c56: f021 417f bic.w r1, r1, #4278190080 ; 0xff000000
|
||
8000c5a: bf18 it ne
|
||
8000c5c: 4249 negne r1, r1
|
||
8000c5e: ea92 0f03 teq r2, r3
|
||
8000c62: d03f beq.n 8000ce4 <__addsf3+0xd8>
|
||
8000c64: f1a2 0201 sub.w r2, r2, #1
|
||
8000c68: fa41 fc03 asr.w ip, r1, r3
|
||
8000c6c: eb10 000c adds.w r0, r0, ip
|
||
8000c70: f1c3 0320 rsb r3, r3, #32
|
||
8000c74: fa01 f103 lsl.w r1, r1, r3
|
||
8000c78: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000
|
||
8000c7c: d502 bpl.n 8000c84 <__addsf3+0x78>
|
||
8000c7e: 4249 negs r1, r1
|
||
8000c80: eb60 0040 sbc.w r0, r0, r0, lsl #1
|
||
8000c84: f5b0 0f00 cmp.w r0, #8388608 ; 0x800000
|
||
8000c88: d313 bcc.n 8000cb2 <__addsf3+0xa6>
|
||
8000c8a: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000
|
||
8000c8e: d306 bcc.n 8000c9e <__addsf3+0x92>
|
||
8000c90: 0840 lsrs r0, r0, #1
|
||
8000c92: ea4f 0131 mov.w r1, r1, rrx
|
||
8000c96: f102 0201 add.w r2, r2, #1
|
||
8000c9a: 2afe cmp r2, #254 ; 0xfe
|
||
8000c9c: d251 bcs.n 8000d42 <__addsf3+0x136>
|
||
8000c9e: f1b1 4f00 cmp.w r1, #2147483648 ; 0x80000000
|
||
8000ca2: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
||
8000ca6: bf08 it eq
|
||
8000ca8: f020 0001 biceq.w r0, r0, #1
|
||
8000cac: ea40 0003 orr.w r0, r0, r3
|
||
8000cb0: 4770 bx lr
|
||
8000cb2: 0049 lsls r1, r1, #1
|
||
8000cb4: eb40 0000 adc.w r0, r0, r0
|
||
8000cb8: 3a01 subs r2, #1
|
||
8000cba: bf28 it cs
|
||
8000cbc: f5b0 0f00 cmpcs.w r0, #8388608 ; 0x800000
|
||
8000cc0: d2ed bcs.n 8000c9e <__addsf3+0x92>
|
||
8000cc2: fab0 fc80 clz ip, r0
|
||
8000cc6: f1ac 0c08 sub.w ip, ip, #8
|
||
8000cca: ebb2 020c subs.w r2, r2, ip
|
||
8000cce: fa00 f00c lsl.w r0, r0, ip
|
||
8000cd2: bfaa itet ge
|
||
8000cd4: eb00 50c2 addge.w r0, r0, r2, lsl #23
|
||
8000cd8: 4252 neglt r2, r2
|
||
8000cda: 4318 orrge r0, r3
|
||
8000cdc: bfbc itt lt
|
||
8000cde: 40d0 lsrlt r0, r2
|
||
8000ce0: 4318 orrlt r0, r3
|
||
8000ce2: 4770 bx lr
|
||
8000ce4: f092 0f00 teq r2, #0
|
||
8000ce8: f481 0100 eor.w r1, r1, #8388608 ; 0x800000
|
||
8000cec: bf06 itte eq
|
||
8000cee: f480 0000 eoreq.w r0, r0, #8388608 ; 0x800000
|
||
8000cf2: 3201 addeq r2, #1
|
||
8000cf4: 3b01 subne r3, #1
|
||
8000cf6: e7b5 b.n 8000c64 <__addsf3+0x58>
|
||
8000cf8: ea4f 0341 mov.w r3, r1, lsl #1
|
||
8000cfc: ea7f 6c22 mvns.w ip, r2, asr #24
|
||
8000d00: bf18 it ne
|
||
8000d02: ea7f 6c23 mvnsne.w ip, r3, asr #24
|
||
8000d06: d021 beq.n 8000d4c <__addsf3+0x140>
|
||
8000d08: ea92 0f03 teq r2, r3
|
||
8000d0c: d004 beq.n 8000d18 <__addsf3+0x10c>
|
||
8000d0e: f092 0f00 teq r2, #0
|
||
8000d12: bf08 it eq
|
||
8000d14: 4608 moveq r0, r1
|
||
8000d16: 4770 bx lr
|
||
8000d18: ea90 0f01 teq r0, r1
|
||
8000d1c: bf1c itt ne
|
||
8000d1e: 2000 movne r0, #0
|
||
8000d20: 4770 bxne lr
|
||
8000d22: f012 4f7f tst.w r2, #4278190080 ; 0xff000000
|
||
8000d26: d104 bne.n 8000d32 <__addsf3+0x126>
|
||
8000d28: 0040 lsls r0, r0, #1
|
||
8000d2a: bf28 it cs
|
||
8000d2c: f040 4000 orrcs.w r0, r0, #2147483648 ; 0x80000000
|
||
8000d30: 4770 bx lr
|
||
8000d32: f112 7200 adds.w r2, r2, #33554432 ; 0x2000000
|
||
8000d36: bf3c itt cc
|
||
8000d38: f500 0000 addcc.w r0, r0, #8388608 ; 0x800000
|
||
8000d3c: 4770 bxcc lr
|
||
8000d3e: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000
|
||
8000d42: f043 40fe orr.w r0, r3, #2130706432 ; 0x7f000000
|
||
8000d46: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000d4a: 4770 bx lr
|
||
8000d4c: ea7f 6222 mvns.w r2, r2, asr #24
|
||
8000d50: bf16 itet ne
|
||
8000d52: 4608 movne r0, r1
|
||
8000d54: ea7f 6323 mvnseq.w r3, r3, asr #24
|
||
8000d58: 4601 movne r1, r0
|
||
8000d5a: 0242 lsls r2, r0, #9
|
||
8000d5c: bf06 itte eq
|
||
8000d5e: ea5f 2341 movseq.w r3, r1, lsl #9
|
||
8000d62: ea90 0f01 teqeq r0, r1
|
||
8000d66: f440 0080 orrne.w r0, r0, #4194304 ; 0x400000
|
||
8000d6a: 4770 bx lr
|
||
|
||
08000d6c <__aeabi_ui2f>:
|
||
8000d6c: f04f 0300 mov.w r3, #0
|
||
8000d70: e004 b.n 8000d7c <__aeabi_i2f+0x8>
|
||
8000d72: bf00 nop
|
||
|
||
08000d74 <__aeabi_i2f>:
|
||
8000d74: f010 4300 ands.w r3, r0, #2147483648 ; 0x80000000
|
||
8000d78: bf48 it mi
|
||
8000d7a: 4240 negmi r0, r0
|
||
8000d7c: ea5f 0c00 movs.w ip, r0
|
||
8000d80: bf08 it eq
|
||
8000d82: 4770 bxeq lr
|
||
8000d84: f043 4396 orr.w r3, r3, #1258291200 ; 0x4b000000
|
||
8000d88: 4601 mov r1, r0
|
||
8000d8a: f04f 0000 mov.w r0, #0
|
||
8000d8e: e01c b.n 8000dca <__aeabi_l2f+0x2a>
|
||
|
||
08000d90 <__aeabi_ul2f>:
|
||
8000d90: ea50 0201 orrs.w r2, r0, r1
|
||
8000d94: bf08 it eq
|
||
8000d96: 4770 bxeq lr
|
||
8000d98: f04f 0300 mov.w r3, #0
|
||
8000d9c: e00a b.n 8000db4 <__aeabi_l2f+0x14>
|
||
8000d9e: bf00 nop
|
||
|
||
08000da0 <__aeabi_l2f>:
|
||
8000da0: ea50 0201 orrs.w r2, r0, r1
|
||
8000da4: bf08 it eq
|
||
8000da6: 4770 bxeq lr
|
||
8000da8: f011 4300 ands.w r3, r1, #2147483648 ; 0x80000000
|
||
8000dac: d502 bpl.n 8000db4 <__aeabi_l2f+0x14>
|
||
8000dae: 4240 negs r0, r0
|
||
8000db0: eb61 0141 sbc.w r1, r1, r1, lsl #1
|
||
8000db4: ea5f 0c01 movs.w ip, r1
|
||
8000db8: bf02 ittt eq
|
||
8000dba: 4684 moveq ip, r0
|
||
8000dbc: 4601 moveq r1, r0
|
||
8000dbe: 2000 moveq r0, #0
|
||
8000dc0: f043 43b6 orr.w r3, r3, #1526726656 ; 0x5b000000
|
||
8000dc4: bf08 it eq
|
||
8000dc6: f1a3 5380 subeq.w r3, r3, #268435456 ; 0x10000000
|
||
8000dca: f5a3 0300 sub.w r3, r3, #8388608 ; 0x800000
|
||
8000dce: fabc f28c clz r2, ip
|
||
8000dd2: 3a08 subs r2, #8
|
||
8000dd4: eba3 53c2 sub.w r3, r3, r2, lsl #23
|
||
8000dd8: db10 blt.n 8000dfc <__aeabi_l2f+0x5c>
|
||
8000dda: fa01 fc02 lsl.w ip, r1, r2
|
||
8000dde: 4463 add r3, ip
|
||
8000de0: fa00 fc02 lsl.w ip, r0, r2
|
||
8000de4: f1c2 0220 rsb r2, r2, #32
|
||
8000de8: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000
|
||
8000dec: fa20 f202 lsr.w r2, r0, r2
|
||
8000df0: eb43 0002 adc.w r0, r3, r2
|
||
8000df4: bf08 it eq
|
||
8000df6: f020 0001 biceq.w r0, r0, #1
|
||
8000dfa: 4770 bx lr
|
||
8000dfc: f102 0220 add.w r2, r2, #32
|
||
8000e00: fa01 fc02 lsl.w ip, r1, r2
|
||
8000e04: f1c2 0220 rsb r2, r2, #32
|
||
8000e08: ea50 004c orrs.w r0, r0, ip, lsl #1
|
||
8000e0c: fa21 f202 lsr.w r2, r1, r2
|
||
8000e10: eb43 0002 adc.w r0, r3, r2
|
||
8000e14: bf08 it eq
|
||
8000e16: ea20 70dc biceq.w r0, r0, ip, lsr #31
|
||
8000e1a: 4770 bx lr
|
||
|
||
08000e1c <__aeabi_fmul>:
|
||
8000e1c: f04f 0cff mov.w ip, #255 ; 0xff
|
||
8000e20: ea1c 52d0 ands.w r2, ip, r0, lsr #23
|
||
8000e24: bf1e ittt ne
|
||
8000e26: ea1c 53d1 andsne.w r3, ip, r1, lsr #23
|
||
8000e2a: ea92 0f0c teqne r2, ip
|
||
8000e2e: ea93 0f0c teqne r3, ip
|
||
8000e32: d06f beq.n 8000f14 <__aeabi_fmul+0xf8>
|
||
8000e34: 441a add r2, r3
|
||
8000e36: ea80 0c01 eor.w ip, r0, r1
|
||
8000e3a: 0240 lsls r0, r0, #9
|
||
8000e3c: bf18 it ne
|
||
8000e3e: ea5f 2141 movsne.w r1, r1, lsl #9
|
||
8000e42: d01e beq.n 8000e82 <__aeabi_fmul+0x66>
|
||
8000e44: f04f 6300 mov.w r3, #134217728 ; 0x8000000
|
||
8000e48: ea43 1050 orr.w r0, r3, r0, lsr #5
|
||
8000e4c: ea43 1151 orr.w r1, r3, r1, lsr #5
|
||
8000e50: fba0 3101 umull r3, r1, r0, r1
|
||
8000e54: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000
|
||
8000e58: f5b1 0f00 cmp.w r1, #8388608 ; 0x800000
|
||
8000e5c: bf3e ittt cc
|
||
8000e5e: 0049 lslcc r1, r1, #1
|
||
8000e60: ea41 71d3 orrcc.w r1, r1, r3, lsr #31
|
||
8000e64: 005b lslcc r3, r3, #1
|
||
8000e66: ea40 0001 orr.w r0, r0, r1
|
||
8000e6a: f162 027f sbc.w r2, r2, #127 ; 0x7f
|
||
8000e6e: 2afd cmp r2, #253 ; 0xfd
|
||
8000e70: d81d bhi.n 8000eae <__aeabi_fmul+0x92>
|
||
8000e72: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000
|
||
8000e76: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
||
8000e7a: bf08 it eq
|
||
8000e7c: f020 0001 biceq.w r0, r0, #1
|
||
8000e80: 4770 bx lr
|
||
8000e82: f090 0f00 teq r0, #0
|
||
8000e86: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000
|
||
8000e8a: bf08 it eq
|
||
8000e8c: 0249 lsleq r1, r1, #9
|
||
8000e8e: ea4c 2050 orr.w r0, ip, r0, lsr #9
|
||
8000e92: ea40 2051 orr.w r0, r0, r1, lsr #9
|
||
8000e96: 3a7f subs r2, #127 ; 0x7f
|
||
8000e98: bfc2 ittt gt
|
||
8000e9a: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff
|
||
8000e9e: ea40 50c2 orrgt.w r0, r0, r2, lsl #23
|
||
8000ea2: 4770 bxgt lr
|
||
8000ea4: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000ea8: f04f 0300 mov.w r3, #0
|
||
8000eac: 3a01 subs r2, #1
|
||
8000eae: dc5d bgt.n 8000f6c <__aeabi_fmul+0x150>
|
||
8000eb0: f112 0f19 cmn.w r2, #25
|
||
8000eb4: bfdc itt le
|
||
8000eb6: f000 4000 andle.w r0, r0, #2147483648 ; 0x80000000
|
||
8000eba: 4770 bxle lr
|
||
8000ebc: f1c2 0200 rsb r2, r2, #0
|
||
8000ec0: 0041 lsls r1, r0, #1
|
||
8000ec2: fa21 f102 lsr.w r1, r1, r2
|
||
8000ec6: f1c2 0220 rsb r2, r2, #32
|
||
8000eca: fa00 fc02 lsl.w ip, r0, r2
|
||
8000ece: ea5f 0031 movs.w r0, r1, rrx
|
||
8000ed2: f140 0000 adc.w r0, r0, #0
|
||
8000ed6: ea53 034c orrs.w r3, r3, ip, lsl #1
|
||
8000eda: bf08 it eq
|
||
8000edc: ea20 70dc biceq.w r0, r0, ip, lsr #31
|
||
8000ee0: 4770 bx lr
|
||
8000ee2: f092 0f00 teq r2, #0
|
||
8000ee6: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000
|
||
8000eea: bf02 ittt eq
|
||
8000eec: 0040 lsleq r0, r0, #1
|
||
8000eee: f410 0f00 tsteq.w r0, #8388608 ; 0x800000
|
||
8000ef2: 3a01 subeq r2, #1
|
||
8000ef4: d0f9 beq.n 8000eea <__aeabi_fmul+0xce>
|
||
8000ef6: ea40 000c orr.w r0, r0, ip
|
||
8000efa: f093 0f00 teq r3, #0
|
||
8000efe: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
||
8000f02: bf02 ittt eq
|
||
8000f04: 0049 lsleq r1, r1, #1
|
||
8000f06: f411 0f00 tsteq.w r1, #8388608 ; 0x800000
|
||
8000f0a: 3b01 subeq r3, #1
|
||
8000f0c: d0f9 beq.n 8000f02 <__aeabi_fmul+0xe6>
|
||
8000f0e: ea41 010c orr.w r1, r1, ip
|
||
8000f12: e78f b.n 8000e34 <__aeabi_fmul+0x18>
|
||
8000f14: ea0c 53d1 and.w r3, ip, r1, lsr #23
|
||
8000f18: ea92 0f0c teq r2, ip
|
||
8000f1c: bf18 it ne
|
||
8000f1e: ea93 0f0c teqne r3, ip
|
||
8000f22: d00a beq.n 8000f3a <__aeabi_fmul+0x11e>
|
||
8000f24: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000
|
||
8000f28: bf18 it ne
|
||
8000f2a: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000
|
||
8000f2e: d1d8 bne.n 8000ee2 <__aeabi_fmul+0xc6>
|
||
8000f30: ea80 0001 eor.w r0, r0, r1
|
||
8000f34: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000
|
||
8000f38: 4770 bx lr
|
||
8000f3a: f090 0f00 teq r0, #0
|
||
8000f3e: bf17 itett ne
|
||
8000f40: f090 4f00 teqne r0, #2147483648 ; 0x80000000
|
||
8000f44: 4608 moveq r0, r1
|
||
8000f46: f091 0f00 teqne r1, #0
|
||
8000f4a: f091 4f00 teqne r1, #2147483648 ; 0x80000000
|
||
8000f4e: d014 beq.n 8000f7a <__aeabi_fmul+0x15e>
|
||
8000f50: ea92 0f0c teq r2, ip
|
||
8000f54: d101 bne.n 8000f5a <__aeabi_fmul+0x13e>
|
||
8000f56: 0242 lsls r2, r0, #9
|
||
8000f58: d10f bne.n 8000f7a <__aeabi_fmul+0x15e>
|
||
8000f5a: ea93 0f0c teq r3, ip
|
||
8000f5e: d103 bne.n 8000f68 <__aeabi_fmul+0x14c>
|
||
8000f60: 024b lsls r3, r1, #9
|
||
8000f62: bf18 it ne
|
||
8000f64: 4608 movne r0, r1
|
||
8000f66: d108 bne.n 8000f7a <__aeabi_fmul+0x15e>
|
||
8000f68: ea80 0001 eor.w r0, r0, r1
|
||
8000f6c: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000
|
||
8000f70: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
||
8000f74: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000f78: 4770 bx lr
|
||
8000f7a: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
||
8000f7e: f440 0040 orr.w r0, r0, #12582912 ; 0xc00000
|
||
8000f82: 4770 bx lr
|
||
|
||
08000f84 <__aeabi_fdiv>:
|
||
8000f84: f04f 0cff mov.w ip, #255 ; 0xff
|
||
8000f88: ea1c 52d0 ands.w r2, ip, r0, lsr #23
|
||
8000f8c: bf1e ittt ne
|
||
8000f8e: ea1c 53d1 andsne.w r3, ip, r1, lsr #23
|
||
8000f92: ea92 0f0c teqne r2, ip
|
||
8000f96: ea93 0f0c teqne r3, ip
|
||
8000f9a: d069 beq.n 8001070 <__aeabi_fdiv+0xec>
|
||
8000f9c: eba2 0203 sub.w r2, r2, r3
|
||
8000fa0: ea80 0c01 eor.w ip, r0, r1
|
||
8000fa4: 0249 lsls r1, r1, #9
|
||
8000fa6: ea4f 2040 mov.w r0, r0, lsl #9
|
||
8000faa: d037 beq.n 800101c <__aeabi_fdiv+0x98>
|
||
8000fac: f04f 5380 mov.w r3, #268435456 ; 0x10000000
|
||
8000fb0: ea43 1111 orr.w r1, r3, r1, lsr #4
|
||
8000fb4: ea43 1310 orr.w r3, r3, r0, lsr #4
|
||
8000fb8: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000
|
||
8000fbc: 428b cmp r3, r1
|
||
8000fbe: bf38 it cc
|
||
8000fc0: 005b lslcc r3, r3, #1
|
||
8000fc2: f142 027d adc.w r2, r2, #125 ; 0x7d
|
||
8000fc6: f44f 0c00 mov.w ip, #8388608 ; 0x800000
|
||
8000fca: 428b cmp r3, r1
|
||
8000fcc: bf24 itt cs
|
||
8000fce: 1a5b subcs r3, r3, r1
|
||
8000fd0: ea40 000c orrcs.w r0, r0, ip
|
||
8000fd4: ebb3 0f51 cmp.w r3, r1, lsr #1
|
||
8000fd8: bf24 itt cs
|
||
8000fda: eba3 0351 subcs.w r3, r3, r1, lsr #1
|
||
8000fde: ea40 005c orrcs.w r0, r0, ip, lsr #1
|
||
8000fe2: ebb3 0f91 cmp.w r3, r1, lsr #2
|
||
8000fe6: bf24 itt cs
|
||
8000fe8: eba3 0391 subcs.w r3, r3, r1, lsr #2
|
||
8000fec: ea40 009c orrcs.w r0, r0, ip, lsr #2
|
||
8000ff0: ebb3 0fd1 cmp.w r3, r1, lsr #3
|
||
8000ff4: bf24 itt cs
|
||
8000ff6: eba3 03d1 subcs.w r3, r3, r1, lsr #3
|
||
8000ffa: ea40 00dc orrcs.w r0, r0, ip, lsr #3
|
||
8000ffe: 011b lsls r3, r3, #4
|
||
8001000: bf18 it ne
|
||
8001002: ea5f 1c1c movsne.w ip, ip, lsr #4
|
||
8001006: d1e0 bne.n 8000fca <__aeabi_fdiv+0x46>
|
||
8001008: 2afd cmp r2, #253 ; 0xfd
|
||
800100a: f63f af50 bhi.w 8000eae <__aeabi_fmul+0x92>
|
||
800100e: 428b cmp r3, r1
|
||
8001010: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
||
8001014: bf08 it eq
|
||
8001016: f020 0001 biceq.w r0, r0, #1
|
||
800101a: 4770 bx lr
|
||
800101c: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000
|
||
8001020: ea4c 2050 orr.w r0, ip, r0, lsr #9
|
||
8001024: 327f adds r2, #127 ; 0x7f
|
||
8001026: bfc2 ittt gt
|
||
8001028: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff
|
||
800102c: ea40 50c2 orrgt.w r0, r0, r2, lsl #23
|
||
8001030: 4770 bxgt lr
|
||
8001032: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8001036: f04f 0300 mov.w r3, #0
|
||
800103a: 3a01 subs r2, #1
|
||
800103c: e737 b.n 8000eae <__aeabi_fmul+0x92>
|
||
800103e: f092 0f00 teq r2, #0
|
||
8001042: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000
|
||
8001046: bf02 ittt eq
|
||
8001048: 0040 lsleq r0, r0, #1
|
||
800104a: f410 0f00 tsteq.w r0, #8388608 ; 0x800000
|
||
800104e: 3a01 subeq r2, #1
|
||
8001050: d0f9 beq.n 8001046 <__aeabi_fdiv+0xc2>
|
||
8001052: ea40 000c orr.w r0, r0, ip
|
||
8001056: f093 0f00 teq r3, #0
|
||
800105a: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
||
800105e: bf02 ittt eq
|
||
8001060: 0049 lsleq r1, r1, #1
|
||
8001062: f411 0f00 tsteq.w r1, #8388608 ; 0x800000
|
||
8001066: 3b01 subeq r3, #1
|
||
8001068: d0f9 beq.n 800105e <__aeabi_fdiv+0xda>
|
||
800106a: ea41 010c orr.w r1, r1, ip
|
||
800106e: e795 b.n 8000f9c <__aeabi_fdiv+0x18>
|
||
8001070: ea0c 53d1 and.w r3, ip, r1, lsr #23
|
||
8001074: ea92 0f0c teq r2, ip
|
||
8001078: d108 bne.n 800108c <__aeabi_fdiv+0x108>
|
||
800107a: 0242 lsls r2, r0, #9
|
||
800107c: f47f af7d bne.w 8000f7a <__aeabi_fmul+0x15e>
|
||
8001080: ea93 0f0c teq r3, ip
|
||
8001084: f47f af70 bne.w 8000f68 <__aeabi_fmul+0x14c>
|
||
8001088: 4608 mov r0, r1
|
||
800108a: e776 b.n 8000f7a <__aeabi_fmul+0x15e>
|
||
800108c: ea93 0f0c teq r3, ip
|
||
8001090: d104 bne.n 800109c <__aeabi_fdiv+0x118>
|
||
8001092: 024b lsls r3, r1, #9
|
||
8001094: f43f af4c beq.w 8000f30 <__aeabi_fmul+0x114>
|
||
8001098: 4608 mov r0, r1
|
||
800109a: e76e b.n 8000f7a <__aeabi_fmul+0x15e>
|
||
800109c: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000
|
||
80010a0: bf18 it ne
|
||
80010a2: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000
|
||
80010a6: d1ca bne.n 800103e <__aeabi_fdiv+0xba>
|
||
80010a8: f030 4200 bics.w r2, r0, #2147483648 ; 0x80000000
|
||
80010ac: f47f af5c bne.w 8000f68 <__aeabi_fmul+0x14c>
|
||
80010b0: f031 4300 bics.w r3, r1, #2147483648 ; 0x80000000
|
||
80010b4: f47f af3c bne.w 8000f30 <__aeabi_fmul+0x114>
|
||
80010b8: e75f b.n 8000f7a <__aeabi_fmul+0x15e>
|
||
80010ba: bf00 nop
|
||
|
||
080010bc <__aeabi_f2iz>:
|
||
80010bc: ea4f 0240 mov.w r2, r0, lsl #1
|
||
80010c0: f1b2 4ffe cmp.w r2, #2130706432 ; 0x7f000000
|
||
80010c4: d30f bcc.n 80010e6 <__aeabi_f2iz+0x2a>
|
||
80010c6: f04f 039e mov.w r3, #158 ; 0x9e
|
||
80010ca: ebb3 6212 subs.w r2, r3, r2, lsr #24
|
||
80010ce: d90d bls.n 80010ec <__aeabi_f2iz+0x30>
|
||
80010d0: ea4f 2300 mov.w r3, r0, lsl #8
|
||
80010d4: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
||
80010d8: f010 4f00 tst.w r0, #2147483648 ; 0x80000000
|
||
80010dc: fa23 f002 lsr.w r0, r3, r2
|
||
80010e0: bf18 it ne
|
||
80010e2: 4240 negne r0, r0
|
||
80010e4: 4770 bx lr
|
||
80010e6: f04f 0000 mov.w r0, #0
|
||
80010ea: 4770 bx lr
|
||
80010ec: f112 0f61 cmn.w r2, #97 ; 0x61
|
||
80010f0: d101 bne.n 80010f6 <__aeabi_f2iz+0x3a>
|
||
80010f2: 0242 lsls r2, r0, #9
|
||
80010f4: d105 bne.n 8001102 <__aeabi_f2iz+0x46>
|
||
80010f6: f010 4000 ands.w r0, r0, #2147483648 ; 0x80000000
|
||
80010fa: bf08 it eq
|
||
80010fc: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000
|
||
8001100: 4770 bx lr
|
||
8001102: f04f 0000 mov.w r0, #0
|
||
8001106: 4770 bx lr
|
||
|
||
08001108 <main>:
|
||
/**
|
||
* @brief The application entry point.
|
||
* @retval int
|
||
*/
|
||
int main(void)
|
||
{
|
||
8001108: b580 push {r7, lr}
|
||
800110a: af00 add r7, sp, #0
|
||
/* USER CODE END 1 */
|
||
|
||
/* MCU Configuration--------------------------------------------------------*/
|
||
|
||
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
||
HAL_Init();
|
||
800110c: f000 fb72 bl 80017f4 <HAL_Init>
|
||
/* USER CODE BEGIN Init */
|
||
|
||
/* USER CODE END Init */
|
||
|
||
/* Configure the system clock */
|
||
SystemClock_Config();
|
||
8001110: f000 f809 bl 8001126 <SystemClock_Config>
|
||
/* USER CODE BEGIN SysInit */
|
||
|
||
/* USER CODE END SysInit */
|
||
|
||
/* Initialize all configured peripherals */
|
||
MX_GPIO_Init();
|
||
8001114: f000 f87a bl 800120c <MX_GPIO_Init>
|
||
MX_FSMC_Init();
|
||
8001118: f000 f91e bl 8001358 <MX_FSMC_Init>
|
||
MX_I2C2_Init();
|
||
800111c: f000 f848 bl 80011b0 <MX_I2C2_Init>
|
||
/* USER CODE BEGIN 2 */
|
||
main_app();
|
||
8001120: f004 f84e bl 80051c0 <main_app>
|
||
/* USER CODE END 2 */
|
||
|
||
/* Infinite loop */
|
||
/* USER CODE BEGIN WHILE */
|
||
while (1)
|
||
8001124: e7fe b.n 8001124 <main+0x1c>
|
||
|
||
08001126 <SystemClock_Config>:
|
||
/**
|
||
* @brief System Clock Configuration
|
||
* @retval None
|
||
*/
|
||
void SystemClock_Config(void)
|
||
{
|
||
8001126: b580 push {r7, lr}
|
||
8001128: b090 sub sp, #64 ; 0x40
|
||
800112a: af00 add r7, sp, #0
|
||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||
800112c: f107 0318 add.w r3, r7, #24
|
||
8001130: 2228 movs r2, #40 ; 0x28
|
||
8001132: 2100 movs r1, #0
|
||
8001134: 4618 mov r0, r3
|
||
8001136: f004 fc49 bl 80059cc <memset>
|
||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||
800113a: 1d3b adds r3, r7, #4
|
||
800113c: 2200 movs r2, #0
|
||
800113e: 601a str r2, [r3, #0]
|
||
8001140: 605a str r2, [r3, #4]
|
||
8001142: 609a str r2, [r3, #8]
|
||
8001144: 60da str r2, [r3, #12]
|
||
8001146: 611a str r2, [r3, #16]
|
||
|
||
/** Initializes the RCC Oscillators according to the specified parameters
|
||
* in the RCC_OscInitTypeDef structure.
|
||
*/
|
||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||
8001148: 2301 movs r3, #1
|
||
800114a: 61bb str r3, [r7, #24]
|
||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||
800114c: f44f 3380 mov.w r3, #65536 ; 0x10000
|
||
8001150: 61fb str r3, [r7, #28]
|
||
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
|
||
8001152: 2300 movs r3, #0
|
||
8001154: 623b str r3, [r7, #32]
|
||
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||
8001156: 2301 movs r3, #1
|
||
8001158: 62bb str r3, [r7, #40] ; 0x28
|
||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||
800115a: 2302 movs r3, #2
|
||
800115c: 637b str r3, [r7, #52] ; 0x34
|
||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||
800115e: f44f 3380 mov.w r3, #65536 ; 0x10000
|
||
8001162: 63bb str r3, [r7, #56] ; 0x38
|
||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
|
||
8001164: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
|
||
8001168: 63fb str r3, [r7, #60] ; 0x3c
|
||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||
800116a: f107 0318 add.w r3, r7, #24
|
||
800116e: 4618 mov r0, r3
|
||
8001170: f001 fe6e bl 8002e50 <HAL_RCC_OscConfig>
|
||
8001174: 4603 mov r3, r0
|
||
8001176: 2b00 cmp r3, #0
|
||
8001178: d001 beq.n 800117e <SystemClock_Config+0x58>
|
||
{
|
||
Error_Handler();
|
||
800117a: f000 f951 bl 8001420 <Error_Handler>
|
||
}
|
||
/** Initializes the CPU, AHB and APB buses clocks
|
||
*/
|
||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||
800117e: 230f movs r3, #15
|
||
8001180: 607b str r3, [r7, #4]
|
||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||
8001182: 2302 movs r3, #2
|
||
8001184: 60bb str r3, [r7, #8]
|
||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||
8001186: 2300 movs r3, #0
|
||
8001188: 60fb str r3, [r7, #12]
|
||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
||
800118a: f44f 6380 mov.w r3, #1024 ; 0x400
|
||
800118e: 613b str r3, [r7, #16]
|
||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||
8001190: 2300 movs r3, #0
|
||
8001192: 617b str r3, [r7, #20]
|
||
|
||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
|
||
8001194: 1d3b adds r3, r7, #4
|
||
8001196: 2102 movs r1, #2
|
||
8001198: 4618 mov r0, r3
|
||
800119a: f002 f8d9 bl 8003350 <HAL_RCC_ClockConfig>
|
||
800119e: 4603 mov r3, r0
|
||
80011a0: 2b00 cmp r3, #0
|
||
80011a2: d001 beq.n 80011a8 <SystemClock_Config+0x82>
|
||
{
|
||
Error_Handler();
|
||
80011a4: f000 f93c bl 8001420 <Error_Handler>
|
||
}
|
||
}
|
||
80011a8: bf00 nop
|
||
80011aa: 3740 adds r7, #64 ; 0x40
|
||
80011ac: 46bd mov sp, r7
|
||
80011ae: bd80 pop {r7, pc}
|
||
|
||
080011b0 <MX_I2C2_Init>:
|
||
* @brief I2C2 Initialization Function
|
||
* @param None
|
||
* @retval None
|
||
*/
|
||
static void MX_I2C2_Init(void)
|
||
{
|
||
80011b0: b580 push {r7, lr}
|
||
80011b2: af00 add r7, sp, #0
|
||
/* USER CODE END I2C2_Init 0 */
|
||
|
||
/* USER CODE BEGIN I2C2_Init 1 */
|
||
|
||
/* USER CODE END I2C2_Init 1 */
|
||
hi2c2.Instance = I2C2;
|
||
80011b4: 4b12 ldr r3, [pc, #72] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011b6: 4a13 ldr r2, [pc, #76] ; (8001204 <MX_I2C2_Init+0x54>)
|
||
80011b8: 601a str r2, [r3, #0]
|
||
hi2c2.Init.ClockSpeed = 100000;
|
||
80011ba: 4b11 ldr r3, [pc, #68] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011bc: 4a12 ldr r2, [pc, #72] ; (8001208 <MX_I2C2_Init+0x58>)
|
||
80011be: 605a str r2, [r3, #4]
|
||
hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
|
||
80011c0: 4b0f ldr r3, [pc, #60] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011c2: 2200 movs r2, #0
|
||
80011c4: 609a str r2, [r3, #8]
|
||
hi2c2.Init.OwnAddress1 = 0;
|
||
80011c6: 4b0e ldr r3, [pc, #56] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011c8: 2200 movs r2, #0
|
||
80011ca: 60da str r2, [r3, #12]
|
||
hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
||
80011cc: 4b0c ldr r3, [pc, #48] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011ce: f44f 4280 mov.w r2, #16384 ; 0x4000
|
||
80011d2: 611a str r2, [r3, #16]
|
||
hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
|
||
80011d4: 4b0a ldr r3, [pc, #40] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011d6: 2200 movs r2, #0
|
||
80011d8: 615a str r2, [r3, #20]
|
||
hi2c2.Init.OwnAddress2 = 0;
|
||
80011da: 4b09 ldr r3, [pc, #36] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011dc: 2200 movs r2, #0
|
||
80011de: 619a str r2, [r3, #24]
|
||
hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
|
||
80011e0: 4b07 ldr r3, [pc, #28] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011e2: 2200 movs r2, #0
|
||
80011e4: 61da str r2, [r3, #28]
|
||
hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
||
80011e6: 4b06 ldr r3, [pc, #24] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011e8: 2200 movs r2, #0
|
||
80011ea: 621a str r2, [r3, #32]
|
||
if (HAL_I2C_Init(&hi2c2) != HAL_OK)
|
||
80011ec: 4804 ldr r0, [pc, #16] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011ee: f000 fe2f bl 8001e50 <HAL_I2C_Init>
|
||
80011f2: 4603 mov r3, r0
|
||
80011f4: 2b00 cmp r3, #0
|
||
80011f6: d001 beq.n 80011fc <MX_I2C2_Init+0x4c>
|
||
{
|
||
Error_Handler();
|
||
80011f8: f000 f912 bl 8001420 <Error_Handler>
|
||
}
|
||
/* USER CODE BEGIN I2C2_Init 2 */
|
||
|
||
/* USER CODE END I2C2_Init 2 */
|
||
|
||
}
|
||
80011fc: bf00 nop
|
||
80011fe: bd80 pop {r7, pc}
|
||
8001200: 20000208 .word 0x20000208
|
||
8001204: 40005800 .word 0x40005800
|
||
8001208: 000186a0 .word 0x000186a0
|
||
|
||
0800120c <MX_GPIO_Init>:
|
||
* @brief GPIO Initialization Function
|
||
* @param None
|
||
* @retval None
|
||
*/
|
||
static void MX_GPIO_Init(void)
|
||
{
|
||
800120c: b580 push {r7, lr}
|
||
800120e: b08a sub sp, #40 ; 0x28
|
||
8001210: af00 add r7, sp, #0
|
||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||
8001212: f107 0318 add.w r3, r7, #24
|
||
8001216: 2200 movs r2, #0
|
||
8001218: 601a str r2, [r3, #0]
|
||
800121a: 605a str r2, [r3, #4]
|
||
800121c: 609a str r2, [r3, #8]
|
||
800121e: 60da str r2, [r3, #12]
|
||
|
||
/* GPIO Ports Clock Enable */
|
||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||
8001220: 4b4a ldr r3, [pc, #296] ; (800134c <MX_GPIO_Init+0x140>)
|
||
8001222: 699b ldr r3, [r3, #24]
|
||
8001224: 4a49 ldr r2, [pc, #292] ; (800134c <MX_GPIO_Init+0x140>)
|
||
8001226: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
800122a: 6193 str r3, [r2, #24]
|
||
800122c: 4b47 ldr r3, [pc, #284] ; (800134c <MX_GPIO_Init+0x140>)
|
||
800122e: 699b ldr r3, [r3, #24]
|
||
8001230: f003 0380 and.w r3, r3, #128 ; 0x80
|
||
8001234: 617b str r3, [r7, #20]
|
||
8001236: 697b ldr r3, [r7, #20]
|
||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||
8001238: 4b44 ldr r3, [pc, #272] ; (800134c <MX_GPIO_Init+0x140>)
|
||
800123a: 699b ldr r3, [r3, #24]
|
||
800123c: 4a43 ldr r2, [pc, #268] ; (800134c <MX_GPIO_Init+0x140>)
|
||
800123e: f043 0308 orr.w r3, r3, #8
|
||
8001242: 6193 str r3, [r2, #24]
|
||
8001244: 4b41 ldr r3, [pc, #260] ; (800134c <MX_GPIO_Init+0x140>)
|
||
8001246: 699b ldr r3, [r3, #24]
|
||
8001248: f003 0308 and.w r3, r3, #8
|
||
800124c: 613b str r3, [r7, #16]
|
||
800124e: 693b ldr r3, [r7, #16]
|
||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||
8001250: 4b3e ldr r3, [pc, #248] ; (800134c <MX_GPIO_Init+0x140>)
|
||
8001252: 699b ldr r3, [r3, #24]
|
||
8001254: 4a3d ldr r2, [pc, #244] ; (800134c <MX_GPIO_Init+0x140>)
|
||
8001256: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
800125a: 6193 str r3, [r2, #24]
|
||
800125c: 4b3b ldr r3, [pc, #236] ; (800134c <MX_GPIO_Init+0x140>)
|
||
800125e: 699b ldr r3, [r3, #24]
|
||
8001260: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8001264: 60fb str r3, [r7, #12]
|
||
8001266: 68fb ldr r3, [r7, #12]
|
||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||
8001268: 4b38 ldr r3, [pc, #224] ; (800134c <MX_GPIO_Init+0x140>)
|
||
800126a: 699b ldr r3, [r3, #24]
|
||
800126c: 4a37 ldr r2, [pc, #220] ; (800134c <MX_GPIO_Init+0x140>)
|
||
800126e: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8001272: 6193 str r3, [r2, #24]
|
||
8001274: 4b35 ldr r3, [pc, #212] ; (800134c <MX_GPIO_Init+0x140>)
|
||
8001276: 699b ldr r3, [r3, #24]
|
||
8001278: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
800127c: 60bb str r3, [r7, #8]
|
||
800127e: 68bb ldr r3, [r7, #8]
|
||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||
8001280: 4b32 ldr r3, [pc, #200] ; (800134c <MX_GPIO_Init+0x140>)
|
||
8001282: 699b ldr r3, [r3, #24]
|
||
8001284: 4a31 ldr r2, [pc, #196] ; (800134c <MX_GPIO_Init+0x140>)
|
||
8001286: f043 0320 orr.w r3, r3, #32
|
||
800128a: 6193 str r3, [r2, #24]
|
||
800128c: 4b2f ldr r3, [pc, #188] ; (800134c <MX_GPIO_Init+0x140>)
|
||
800128e: 699b ldr r3, [r3, #24]
|
||
8001290: f003 0320 and.w r3, r3, #32
|
||
8001294: 607b str r3, [r7, #4]
|
||
8001296: 687b ldr r3, [r7, #4]
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(TDIN_GPIO_Port, TDIN_Pin, GPIO_PIN_SET);
|
||
8001298: 2201 movs r2, #1
|
||
800129a: f44f 7100 mov.w r1, #512 ; 0x200
|
||
800129e: 482c ldr r0, [pc, #176] ; (8001350 <MX_GPIO_Init+0x144>)
|
||
80012a0: f000 fdbd bl 8001e1e <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(LCD_BL_GPIO_Port, LCD_BL_Pin, GPIO_PIN_RESET);
|
||
80012a4: 2200 movs r2, #0
|
||
80012a6: 2101 movs r1, #1
|
||
80012a8: 482a ldr r0, [pc, #168] ; (8001354 <MX_GPIO_Init+0x148>)
|
||
80012aa: f000 fdb8 bl 8001e1e <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(GPIOB, TCLK_Pin|TCS_Pin, GPIO_PIN_SET);
|
||
80012ae: 2201 movs r2, #1
|
||
80012b0: 2106 movs r1, #6
|
||
80012b2: 4828 ldr r0, [pc, #160] ; (8001354 <MX_GPIO_Init+0x148>)
|
||
80012b4: f000 fdb3 bl 8001e1e <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pin : TDOUT_Pin */
|
||
GPIO_InitStruct.Pin = TDOUT_Pin;
|
||
80012b8: f44f 7380 mov.w r3, #256 ; 0x100
|
||
80012bc: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||
80012be: 2300 movs r3, #0
|
||
80012c0: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
80012c2: 2300 movs r3, #0
|
||
80012c4: 623b str r3, [r7, #32]
|
||
HAL_GPIO_Init(TDOUT_GPIO_Port, &GPIO_InitStruct);
|
||
80012c6: f107 0318 add.w r3, r7, #24
|
||
80012ca: 4619 mov r1, r3
|
||
80012cc: 4820 ldr r0, [pc, #128] ; (8001350 <MX_GPIO_Init+0x144>)
|
||
80012ce: f000 fbfb bl 8001ac8 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : TDIN_Pin */
|
||
GPIO_InitStruct.Pin = TDIN_Pin;
|
||
80012d2: f44f 7300 mov.w r3, #512 ; 0x200
|
||
80012d6: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
80012d8: 2301 movs r3, #1
|
||
80012da: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
80012dc: 2300 movs r3, #0
|
||
80012de: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
80012e0: 2303 movs r3, #3
|
||
80012e2: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(TDIN_GPIO_Port, &GPIO_InitStruct);
|
||
80012e4: f107 0318 add.w r3, r7, #24
|
||
80012e8: 4619 mov r1, r3
|
||
80012ea: 4819 ldr r0, [pc, #100] ; (8001350 <MX_GPIO_Init+0x144>)
|
||
80012ec: f000 fbec bl 8001ac8 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : TPEN_Pin */
|
||
GPIO_InitStruct.Pin = TPEN_Pin;
|
||
80012f0: f44f 6380 mov.w r3, #1024 ; 0x400
|
||
80012f4: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||
80012f6: 2300 movs r3, #0
|
||
80012f8: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||
80012fa: 2301 movs r3, #1
|
||
80012fc: 623b str r3, [r7, #32]
|
||
HAL_GPIO_Init(TPEN_GPIO_Port, &GPIO_InitStruct);
|
||
80012fe: f107 0318 add.w r3, r7, #24
|
||
8001302: 4619 mov r1, r3
|
||
8001304: 4812 ldr r0, [pc, #72] ; (8001350 <MX_GPIO_Init+0x144>)
|
||
8001306: f000 fbdf bl 8001ac8 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : LCD_BL_Pin */
|
||
GPIO_InitStruct.Pin = LCD_BL_Pin;
|
||
800130a: 2301 movs r3, #1
|
||
800130c: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
800130e: 2301 movs r3, #1
|
||
8001310: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
8001312: 2300 movs r3, #0
|
||
8001314: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||
8001316: 2302 movs r3, #2
|
||
8001318: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(LCD_BL_GPIO_Port, &GPIO_InitStruct);
|
||
800131a: f107 0318 add.w r3, r7, #24
|
||
800131e: 4619 mov r1, r3
|
||
8001320: 480c ldr r0, [pc, #48] ; (8001354 <MX_GPIO_Init+0x148>)
|
||
8001322: f000 fbd1 bl 8001ac8 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pins : TCLK_Pin TCS_Pin */
|
||
GPIO_InitStruct.Pin = TCLK_Pin|TCS_Pin;
|
||
8001326: 2306 movs r3, #6
|
||
8001328: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
800132a: 2301 movs r3, #1
|
||
800132c: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
800132e: 2300 movs r3, #0
|
||
8001330: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8001332: 2303 movs r3, #3
|
||
8001334: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
8001336: f107 0318 add.w r3, r7, #24
|
||
800133a: 4619 mov r1, r3
|
||
800133c: 4805 ldr r0, [pc, #20] ; (8001354 <MX_GPIO_Init+0x148>)
|
||
800133e: f000 fbc3 bl 8001ac8 <HAL_GPIO_Init>
|
||
|
||
}
|
||
8001342: bf00 nop
|
||
8001344: 3728 adds r7, #40 ; 0x28
|
||
8001346: 46bd mov sp, r7
|
||
8001348: bd80 pop {r7, pc}
|
||
800134a: bf00 nop
|
||
800134c: 40021000 .word 0x40021000
|
||
8001350: 40011c00 .word 0x40011c00
|
||
8001354: 40010c00 .word 0x40010c00
|
||
|
||
08001358 <MX_FSMC_Init>:
|
||
|
||
/* FSMC initialization function */
|
||
static void MX_FSMC_Init(void)
|
||
{
|
||
8001358: b580 push {r7, lr}
|
||
800135a: b088 sub sp, #32
|
||
800135c: af00 add r7, sp, #0
|
||
|
||
/* USER CODE BEGIN FSMC_Init 0 */
|
||
|
||
/* USER CODE END FSMC_Init 0 */
|
||
|
||
FSMC_NORSRAM_TimingTypeDef Timing = {0};
|
||
800135e: 1d3b adds r3, r7, #4
|
||
8001360: 2200 movs r2, #0
|
||
8001362: 601a str r2, [r3, #0]
|
||
8001364: 605a str r2, [r3, #4]
|
||
8001366: 609a str r2, [r3, #8]
|
||
8001368: 60da str r2, [r3, #12]
|
||
800136a: 611a str r2, [r3, #16]
|
||
800136c: 615a str r2, [r3, #20]
|
||
800136e: 619a str r2, [r3, #24]
|
||
|
||
/* USER CODE END FSMC_Init 1 */
|
||
|
||
/** Perform the SRAM1 memory initialization sequence
|
||
*/
|
||
hsram1.Instance = FSMC_NORSRAM_DEVICE;
|
||
8001370: 4b28 ldr r3, [pc, #160] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
8001372: f04f 4220 mov.w r2, #2684354560 ; 0xa0000000
|
||
8001376: 601a str r2, [r3, #0]
|
||
hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
|
||
8001378: 4b26 ldr r3, [pc, #152] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
800137a: 4a27 ldr r2, [pc, #156] ; (8001418 <MX_FSMC_Init+0xc0>)
|
||
800137c: 605a str r2, [r3, #4]
|
||
/* hsram1.Init */
|
||
hsram1.Init.NSBank = FSMC_NORSRAM_BANK4;
|
||
800137e: 4b25 ldr r3, [pc, #148] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
8001380: 2206 movs r2, #6
|
||
8001382: 609a str r2, [r3, #8]
|
||
hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
|
||
8001384: 4b23 ldr r3, [pc, #140] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
8001386: 2200 movs r2, #0
|
||
8001388: 60da str r2, [r3, #12]
|
||
hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
|
||
800138a: 4b22 ldr r3, [pc, #136] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
800138c: 2200 movs r2, #0
|
||
800138e: 611a str r2, [r3, #16]
|
||
hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
|
||
8001390: 4b20 ldr r3, [pc, #128] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
8001392: 2210 movs r2, #16
|
||
8001394: 615a str r2, [r3, #20]
|
||
hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
|
||
8001396: 4b1f ldr r3, [pc, #124] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
8001398: 2200 movs r2, #0
|
||
800139a: 619a str r2, [r3, #24]
|
||
hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
|
||
800139c: 4b1d ldr r3, [pc, #116] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
800139e: 2200 movs r2, #0
|
||
80013a0: 61da str r2, [r3, #28]
|
||
hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
|
||
80013a2: 4b1c ldr r3, [pc, #112] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
80013a4: 2200 movs r2, #0
|
||
80013a6: 621a str r2, [r3, #32]
|
||
hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
|
||
80013a8: 4b1a ldr r3, [pc, #104] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
80013aa: 2200 movs r2, #0
|
||
80013ac: 625a str r2, [r3, #36] ; 0x24
|
||
hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
|
||
80013ae: 4b19 ldr r3, [pc, #100] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
80013b0: f44f 5280 mov.w r2, #4096 ; 0x1000
|
||
80013b4: 629a str r2, [r3, #40] ; 0x28
|
||
hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
|
||
80013b6: 4b17 ldr r3, [pc, #92] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
80013b8: 2200 movs r2, #0
|
||
80013ba: 62da str r2, [r3, #44] ; 0x2c
|
||
hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
|
||
80013bc: 4b15 ldr r3, [pc, #84] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
80013be: 2200 movs r2, #0
|
||
80013c0: 631a str r2, [r3, #48] ; 0x30
|
||
hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
|
||
80013c2: 4b14 ldr r3, [pc, #80] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
80013c4: 2200 movs r2, #0
|
||
80013c6: 635a str r2, [r3, #52] ; 0x34
|
||
hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
|
||
80013c8: 4b12 ldr r3, [pc, #72] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
80013ca: 2200 movs r2, #0
|
||
80013cc: 639a str r2, [r3, #56] ; 0x38
|
||
/* Timing */
|
||
Timing.AddressSetupTime = 0;
|
||
80013ce: 2300 movs r3, #0
|
||
80013d0: 607b str r3, [r7, #4]
|
||
Timing.AddressHoldTime = 15;
|
||
80013d2: 230f movs r3, #15
|
||
80013d4: 60bb str r3, [r7, #8]
|
||
Timing.DataSetupTime = 1;
|
||
80013d6: 2301 movs r3, #1
|
||
80013d8: 60fb str r3, [r7, #12]
|
||
Timing.BusTurnAroundDuration = 0;
|
||
80013da: 2300 movs r3, #0
|
||
80013dc: 613b str r3, [r7, #16]
|
||
Timing.CLKDivision = 16;
|
||
80013de: 2310 movs r3, #16
|
||
80013e0: 617b str r3, [r7, #20]
|
||
Timing.DataLatency = 17;
|
||
80013e2: 2311 movs r3, #17
|
||
80013e4: 61bb str r3, [r7, #24]
|
||
Timing.AccessMode = FSMC_ACCESS_MODE_A;
|
||
80013e6: 2300 movs r3, #0
|
||
80013e8: 61fb str r3, [r7, #28]
|
||
/* ExtTiming */
|
||
|
||
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
|
||
80013ea: 1d3b adds r3, r7, #4
|
||
80013ec: 2200 movs r2, #0
|
||
80013ee: 4619 mov r1, r3
|
||
80013f0: 4808 ldr r0, [pc, #32] ; (8001414 <MX_FSMC_Init+0xbc>)
|
||
80013f2: f002 f933 bl 800365c <HAL_SRAM_Init>
|
||
80013f6: 4603 mov r3, r0
|
||
80013f8: 2b00 cmp r3, #0
|
||
80013fa: d001 beq.n 8001400 <MX_FSMC_Init+0xa8>
|
||
{
|
||
Error_Handler( );
|
||
80013fc: f000 f810 bl 8001420 <Error_Handler>
|
||
}
|
||
|
||
/** Disconnect NADV
|
||
*/
|
||
|
||
__HAL_AFIO_FSMCNADV_DISCONNECTED();
|
||
8001400: 4b06 ldr r3, [pc, #24] ; (800141c <MX_FSMC_Init+0xc4>)
|
||
8001402: 69db ldr r3, [r3, #28]
|
||
8001404: 4a05 ldr r2, [pc, #20] ; (800141c <MX_FSMC_Init+0xc4>)
|
||
8001406: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
||
800140a: 61d3 str r3, [r2, #28]
|
||
|
||
/* USER CODE BEGIN FSMC_Init 2 */
|
||
|
||
/* USER CODE END FSMC_Init 2 */
|
||
}
|
||
800140c: bf00 nop
|
||
800140e: 3720 adds r7, #32
|
||
8001410: 46bd mov sp, r7
|
||
8001412: bd80 pop {r7, pc}
|
||
8001414: 2000025c .word 0x2000025c
|
||
8001418: a0000104 .word 0xa0000104
|
||
800141c: 40010000 .word 0x40010000
|
||
|
||
08001420 <Error_Handler>:
|
||
/**
|
||
* @brief This function is executed in case of error occurrence.
|
||
* @retval None
|
||
*/
|
||
void Error_Handler(void)
|
||
{
|
||
8001420: b480 push {r7}
|
||
8001422: af00 add r7, sp, #0
|
||
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
||
Can only be executed in Privileged modes.
|
||
*/
|
||
__STATIC_FORCEINLINE void __disable_irq(void)
|
||
{
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
8001424: b672 cpsid i
|
||
}
|
||
8001426: bf00 nop
|
||
/* USER CODE BEGIN Error_Handler_Debug */
|
||
/* User can add his own implementation to report the HAL error return state */
|
||
__disable_irq();
|
||
while (1)
|
||
8001428: e7fe b.n 8001428 <Error_Handler+0x8>
|
||
...
|
||
|
||
0800142c <HAL_MspInit>:
|
||
/* USER CODE END 0 */
|
||
/**
|
||
* Initializes the Global MSP.
|
||
*/
|
||
void HAL_MspInit(void)
|
||
{
|
||
800142c: b480 push {r7}
|
||
800142e: b085 sub sp, #20
|
||
8001430: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN MspInit 0 */
|
||
|
||
/* USER CODE END MspInit 0 */
|
||
|
||
__HAL_RCC_AFIO_CLK_ENABLE();
|
||
8001432: 4b15 ldr r3, [pc, #84] ; (8001488 <HAL_MspInit+0x5c>)
|
||
8001434: 699b ldr r3, [r3, #24]
|
||
8001436: 4a14 ldr r2, [pc, #80] ; (8001488 <HAL_MspInit+0x5c>)
|
||
8001438: f043 0301 orr.w r3, r3, #1
|
||
800143c: 6193 str r3, [r2, #24]
|
||
800143e: 4b12 ldr r3, [pc, #72] ; (8001488 <HAL_MspInit+0x5c>)
|
||
8001440: 699b ldr r3, [r3, #24]
|
||
8001442: f003 0301 and.w r3, r3, #1
|
||
8001446: 60bb str r3, [r7, #8]
|
||
8001448: 68bb ldr r3, [r7, #8]
|
||
__HAL_RCC_PWR_CLK_ENABLE();
|
||
800144a: 4b0f ldr r3, [pc, #60] ; (8001488 <HAL_MspInit+0x5c>)
|
||
800144c: 69db ldr r3, [r3, #28]
|
||
800144e: 4a0e ldr r2, [pc, #56] ; (8001488 <HAL_MspInit+0x5c>)
|
||
8001450: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
||
8001454: 61d3 str r3, [r2, #28]
|
||
8001456: 4b0c ldr r3, [pc, #48] ; (8001488 <HAL_MspInit+0x5c>)
|
||
8001458: 69db ldr r3, [r3, #28]
|
||
800145a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
800145e: 607b str r3, [r7, #4]
|
||
8001460: 687b ldr r3, [r7, #4]
|
||
|
||
/* System interrupt init*/
|
||
|
||
/** DISABLE: JTAG-DP Disabled and SW-DP Disabled
|
||
*/
|
||
__HAL_AFIO_REMAP_SWJ_DISABLE();
|
||
8001462: 4b0a ldr r3, [pc, #40] ; (800148c <HAL_MspInit+0x60>)
|
||
8001464: 685b ldr r3, [r3, #4]
|
||
8001466: 60fb str r3, [r7, #12]
|
||
8001468: 68fb ldr r3, [r7, #12]
|
||
800146a: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
|
||
800146e: 60fb str r3, [r7, #12]
|
||
8001470: 68fb ldr r3, [r7, #12]
|
||
8001472: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000
|
||
8001476: 60fb str r3, [r7, #12]
|
||
8001478: 4a04 ldr r2, [pc, #16] ; (800148c <HAL_MspInit+0x60>)
|
||
800147a: 68fb ldr r3, [r7, #12]
|
||
800147c: 6053 str r3, [r2, #4]
|
||
|
||
/* USER CODE BEGIN MspInit 1 */
|
||
|
||
/* USER CODE END MspInit 1 */
|
||
}
|
||
800147e: bf00 nop
|
||
8001480: 3714 adds r7, #20
|
||
8001482: 46bd mov sp, r7
|
||
8001484: bc80 pop {r7}
|
||
8001486: 4770 bx lr
|
||
8001488: 40021000 .word 0x40021000
|
||
800148c: 40010000 .word 0x40010000
|
||
|
||
08001490 <HAL_I2C_MspInit>:
|
||
* This function configures the hardware resources used in this example
|
||
* @param hi2c: I2C handle pointer
|
||
* @retval None
|
||
*/
|
||
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
|
||
{
|
||
8001490: b580 push {r7, lr}
|
||
8001492: b088 sub sp, #32
|
||
8001494: af00 add r7, sp, #0
|
||
8001496: 6078 str r0, [r7, #4]
|
||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||
8001498: f107 0310 add.w r3, r7, #16
|
||
800149c: 2200 movs r2, #0
|
||
800149e: 601a str r2, [r3, #0]
|
||
80014a0: 605a str r2, [r3, #4]
|
||
80014a2: 609a str r2, [r3, #8]
|
||
80014a4: 60da str r2, [r3, #12]
|
||
if(hi2c->Instance==I2C2)
|
||
80014a6: 687b ldr r3, [r7, #4]
|
||
80014a8: 681b ldr r3, [r3, #0]
|
||
80014aa: 4a16 ldr r2, [pc, #88] ; (8001504 <HAL_I2C_MspInit+0x74>)
|
||
80014ac: 4293 cmp r3, r2
|
||
80014ae: d124 bne.n 80014fa <HAL_I2C_MspInit+0x6a>
|
||
{
|
||
/* USER CODE BEGIN I2C2_MspInit 0 */
|
||
|
||
/* USER CODE END I2C2_MspInit 0 */
|
||
|
||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||
80014b0: 4b15 ldr r3, [pc, #84] ; (8001508 <HAL_I2C_MspInit+0x78>)
|
||
80014b2: 699b ldr r3, [r3, #24]
|
||
80014b4: 4a14 ldr r2, [pc, #80] ; (8001508 <HAL_I2C_MspInit+0x78>)
|
||
80014b6: f043 0308 orr.w r3, r3, #8
|
||
80014ba: 6193 str r3, [r2, #24]
|
||
80014bc: 4b12 ldr r3, [pc, #72] ; (8001508 <HAL_I2C_MspInit+0x78>)
|
||
80014be: 699b ldr r3, [r3, #24]
|
||
80014c0: f003 0308 and.w r3, r3, #8
|
||
80014c4: 60fb str r3, [r7, #12]
|
||
80014c6: 68fb ldr r3, [r7, #12]
|
||
/**I2C2 GPIO Configuration
|
||
PB10 ------> I2C2_SCL
|
||
PB11 ------> I2C2_SDA
|
||
*/
|
||
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
|
||
80014c8: f44f 6340 mov.w r3, #3072 ; 0xc00
|
||
80014cc: 613b str r3, [r7, #16]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
|
||
80014ce: 2312 movs r3, #18
|
||
80014d0: 617b str r3, [r7, #20]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
80014d2: 2303 movs r3, #3
|
||
80014d4: 61fb str r3, [r7, #28]
|
||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
80014d6: f107 0310 add.w r3, r7, #16
|
||
80014da: 4619 mov r1, r3
|
||
80014dc: 480b ldr r0, [pc, #44] ; (800150c <HAL_I2C_MspInit+0x7c>)
|
||
80014de: f000 faf3 bl 8001ac8 <HAL_GPIO_Init>
|
||
|
||
/* Peripheral clock enable */
|
||
__HAL_RCC_I2C2_CLK_ENABLE();
|
||
80014e2: 4b09 ldr r3, [pc, #36] ; (8001508 <HAL_I2C_MspInit+0x78>)
|
||
80014e4: 69db ldr r3, [r3, #28]
|
||
80014e6: 4a08 ldr r2, [pc, #32] ; (8001508 <HAL_I2C_MspInit+0x78>)
|
||
80014e8: f443 0380 orr.w r3, r3, #4194304 ; 0x400000
|
||
80014ec: 61d3 str r3, [r2, #28]
|
||
80014ee: 4b06 ldr r3, [pc, #24] ; (8001508 <HAL_I2C_MspInit+0x78>)
|
||
80014f0: 69db ldr r3, [r3, #28]
|
||
80014f2: f403 0380 and.w r3, r3, #4194304 ; 0x400000
|
||
80014f6: 60bb str r3, [r7, #8]
|
||
80014f8: 68bb ldr r3, [r7, #8]
|
||
/* USER CODE BEGIN I2C2_MspInit 1 */
|
||
|
||
/* USER CODE END I2C2_MspInit 1 */
|
||
}
|
||
|
||
}
|
||
80014fa: bf00 nop
|
||
80014fc: 3720 adds r7, #32
|
||
80014fe: 46bd mov sp, r7
|
||
8001500: bd80 pop {r7, pc}
|
||
8001502: bf00 nop
|
||
8001504: 40005800 .word 0x40005800
|
||
8001508: 40021000 .word 0x40021000
|
||
800150c: 40010c00 .word 0x40010c00
|
||
|
||
08001510 <HAL_FSMC_MspInit>:
|
||
|
||
}
|
||
|
||
static uint32_t FSMC_Initialized = 0;
|
||
|
||
static void HAL_FSMC_MspInit(void){
|
||
8001510: b580 push {r7, lr}
|
||
8001512: b086 sub sp, #24
|
||
8001514: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN FSMC_MspInit 0 */
|
||
|
||
/* USER CODE END FSMC_MspInit 0 */
|
||
GPIO_InitTypeDef GPIO_InitStruct ={0};
|
||
8001516: f107 0308 add.w r3, r7, #8
|
||
800151a: 2200 movs r2, #0
|
||
800151c: 601a str r2, [r3, #0]
|
||
800151e: 605a str r2, [r3, #4]
|
||
8001520: 609a str r2, [r3, #8]
|
||
8001522: 60da str r2, [r3, #12]
|
||
if (FSMC_Initialized) {
|
||
8001524: 4b1f ldr r3, [pc, #124] ; (80015a4 <HAL_FSMC_MspInit+0x94>)
|
||
8001526: 681b ldr r3, [r3, #0]
|
||
8001528: 2b00 cmp r3, #0
|
||
800152a: d136 bne.n 800159a <HAL_FSMC_MspInit+0x8a>
|
||
return;
|
||
}
|
||
FSMC_Initialized = 1;
|
||
800152c: 4b1d ldr r3, [pc, #116] ; (80015a4 <HAL_FSMC_MspInit+0x94>)
|
||
800152e: 2201 movs r2, #1
|
||
8001530: 601a str r2, [r3, #0]
|
||
|
||
/* Peripheral clock enable */
|
||
__HAL_RCC_FSMC_CLK_ENABLE();
|
||
8001532: 4b1d ldr r3, [pc, #116] ; (80015a8 <HAL_FSMC_MspInit+0x98>)
|
||
8001534: 695b ldr r3, [r3, #20]
|
||
8001536: 4a1c ldr r2, [pc, #112] ; (80015a8 <HAL_FSMC_MspInit+0x98>)
|
||
8001538: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
800153c: 6153 str r3, [r2, #20]
|
||
800153e: 4b1a ldr r3, [pc, #104] ; (80015a8 <HAL_FSMC_MspInit+0x98>)
|
||
8001540: 695b ldr r3, [r3, #20]
|
||
8001542: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8001546: 607b str r3, [r7, #4]
|
||
8001548: 687b ldr r3, [r7, #4]
|
||
PD1 ------> FSMC_D3
|
||
PD4 ------> FSMC_NOE
|
||
PD5 ------> FSMC_NWE
|
||
PG12 ------> FSMC_NE4
|
||
*/
|
||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_12;
|
||
800154a: f241 0301 movw r3, #4097 ; 0x1001
|
||
800154e: 60bb str r3, [r7, #8]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
8001550: 2302 movs r3, #2
|
||
8001552: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8001554: 2303 movs r3, #3
|
||
8001556: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||
8001558: f107 0308 add.w r3, r7, #8
|
||
800155c: 4619 mov r1, r3
|
||
800155e: 4813 ldr r0, [pc, #76] ; (80015ac <HAL_FSMC_MspInit+0x9c>)
|
||
8001560: f000 fab2 bl 8001ac8 <HAL_GPIO_Init>
|
||
|
||
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
|
||
8001564: f64f 7380 movw r3, #65408 ; 0xff80
|
||
8001568: 60bb str r3, [r7, #8]
|
||
|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
|
||
|GPIO_PIN_15;
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
800156a: 2302 movs r3, #2
|
||
800156c: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
800156e: 2303 movs r3, #3
|
||
8001570: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||
8001572: f107 0308 add.w r3, r7, #8
|
||
8001576: 4619 mov r1, r3
|
||
8001578: 480d ldr r0, [pc, #52] ; (80015b0 <HAL_FSMC_MspInit+0xa0>)
|
||
800157a: f000 faa5 bl 8001ac8 <HAL_GPIO_Init>
|
||
|
||
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
|
||
800157e: f24c 7333 movw r3, #50995 ; 0xc733
|
||
8001582: 60bb str r3, [r7, #8]
|
||
|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4
|
||
|GPIO_PIN_5;
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
8001584: 2302 movs r3, #2
|
||
8001586: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8001588: 2303 movs r3, #3
|
||
800158a: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||
800158c: f107 0308 add.w r3, r7, #8
|
||
8001590: 4619 mov r1, r3
|
||
8001592: 4808 ldr r0, [pc, #32] ; (80015b4 <HAL_FSMC_MspInit+0xa4>)
|
||
8001594: f000 fa98 bl 8001ac8 <HAL_GPIO_Init>
|
||
8001598: e000 b.n 800159c <HAL_FSMC_MspInit+0x8c>
|
||
return;
|
||
800159a: bf00 nop
|
||
|
||
/* USER CODE BEGIN FSMC_MspInit 1 */
|
||
|
||
/* USER CODE END FSMC_MspInit 1 */
|
||
}
|
||
800159c: 3718 adds r7, #24
|
||
800159e: 46bd mov sp, r7
|
||
80015a0: bd80 pop {r7, pc}
|
||
80015a2: bf00 nop
|
||
80015a4: 200001f8 .word 0x200001f8
|
||
80015a8: 40021000 .word 0x40021000
|
||
80015ac: 40012000 .word 0x40012000
|
||
80015b0: 40011800 .word 0x40011800
|
||
80015b4: 40011400 .word 0x40011400
|
||
|
||
080015b8 <HAL_SRAM_MspInit>:
|
||
|
||
void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){
|
||
80015b8: b580 push {r7, lr}
|
||
80015ba: b082 sub sp, #8
|
||
80015bc: af00 add r7, sp, #0
|
||
80015be: 6078 str r0, [r7, #4]
|
||
/* USER CODE BEGIN SRAM_MspInit 0 */
|
||
|
||
/* USER CODE END SRAM_MspInit 0 */
|
||
HAL_FSMC_MspInit();
|
||
80015c0: f7ff ffa6 bl 8001510 <HAL_FSMC_MspInit>
|
||
/* USER CODE BEGIN SRAM_MspInit 1 */
|
||
|
||
/* USER CODE END SRAM_MspInit 1 */
|
||
}
|
||
80015c4: bf00 nop
|
||
80015c6: 3708 adds r7, #8
|
||
80015c8: 46bd mov sp, r7
|
||
80015ca: bd80 pop {r7, pc}
|
||
|
||
080015cc <NMI_Handler>:
|
||
/******************************************************************************/
|
||
/**
|
||
* @brief This function handles Non maskable interrupt.
|
||
*/
|
||
void NMI_Handler(void)
|
||
{
|
||
80015cc: b480 push {r7}
|
||
80015ce: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||
|
||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||
while (1)
|
||
80015d0: e7fe b.n 80015d0 <NMI_Handler+0x4>
|
||
|
||
080015d2 <HardFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Hard fault interrupt.
|
||
*/
|
||
void HardFault_Handler(void)
|
||
{
|
||
80015d2: b480 push {r7}
|
||
80015d4: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||
|
||
/* USER CODE END HardFault_IRQn 0 */
|
||
while (1)
|
||
80015d6: e7fe b.n 80015d6 <HardFault_Handler+0x4>
|
||
|
||
080015d8 <MemManage_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Memory management fault.
|
||
*/
|
||
void MemManage_Handler(void)
|
||
{
|
||
80015d8: b480 push {r7}
|
||
80015da: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||
|
||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||
while (1)
|
||
80015dc: e7fe b.n 80015dc <MemManage_Handler+0x4>
|
||
|
||
080015de <BusFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Prefetch fault, memory access fault.
|
||
*/
|
||
void BusFault_Handler(void)
|
||
{
|
||
80015de: b480 push {r7}
|
||
80015e0: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||
|
||
/* USER CODE END BusFault_IRQn 0 */
|
||
while (1)
|
||
80015e2: e7fe b.n 80015e2 <BusFault_Handler+0x4>
|
||
|
||
080015e4 <UsageFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Undefined instruction or illegal state.
|
||
*/
|
||
void UsageFault_Handler(void)
|
||
{
|
||
80015e4: b480 push {r7}
|
||
80015e6: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||
|
||
/* USER CODE END UsageFault_IRQn 0 */
|
||
while (1)
|
||
80015e8: e7fe b.n 80015e8 <UsageFault_Handler+0x4>
|
||
|
||
080015ea <SVC_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles System service call via SWI instruction.
|
||
*/
|
||
void SVC_Handler(void)
|
||
{
|
||
80015ea: b480 push {r7}
|
||
80015ec: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END SVCall_IRQn 0 */
|
||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||
|
||
/* USER CODE END SVCall_IRQn 1 */
|
||
}
|
||
80015ee: bf00 nop
|
||
80015f0: 46bd mov sp, r7
|
||
80015f2: bc80 pop {r7}
|
||
80015f4: 4770 bx lr
|
||
|
||
080015f6 <DebugMon_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Debug monitor.
|
||
*/
|
||
void DebugMon_Handler(void)
|
||
{
|
||
80015f6: b480 push {r7}
|
||
80015f8: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||
|
||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||
}
|
||
80015fa: bf00 nop
|
||
80015fc: 46bd mov sp, r7
|
||
80015fe: bc80 pop {r7}
|
||
8001600: 4770 bx lr
|
||
|
||
08001602 <PendSV_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Pendable request for system service.
|
||
*/
|
||
void PendSV_Handler(void)
|
||
{
|
||
8001602: b480 push {r7}
|
||
8001604: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END PendSV_IRQn 0 */
|
||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||
|
||
/* USER CODE END PendSV_IRQn 1 */
|
||
}
|
||
8001606: bf00 nop
|
||
8001608: 46bd mov sp, r7
|
||
800160a: bc80 pop {r7}
|
||
800160c: 4770 bx lr
|
||
|
||
0800160e <SysTick_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles System tick timer.
|
||
*/
|
||
void SysTick_Handler(void)
|
||
{
|
||
800160e: b580 push {r7, lr}
|
||
8001610: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||
|
||
/* USER CODE END SysTick_IRQn 0 */
|
||
HAL_IncTick();
|
||
8001612: f000 f935 bl 8001880 <HAL_IncTick>
|
||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||
|
||
/* USER CODE END SysTick_IRQn 1 */
|
||
}
|
||
8001616: bf00 nop
|
||
8001618: bd80 pop {r7, pc}
|
||
|
||
0800161a <_getpid>:
|
||
void initialise_monitor_handles()
|
||
{
|
||
}
|
||
|
||
int _getpid(void)
|
||
{
|
||
800161a: b480 push {r7}
|
||
800161c: af00 add r7, sp, #0
|
||
return 1;
|
||
800161e: 2301 movs r3, #1
|
||
}
|
||
8001620: 4618 mov r0, r3
|
||
8001622: 46bd mov sp, r7
|
||
8001624: bc80 pop {r7}
|
||
8001626: 4770 bx lr
|
||
|
||
08001628 <_kill>:
|
||
|
||
int _kill(int pid, int sig)
|
||
{
|
||
8001628: b580 push {r7, lr}
|
||
800162a: b082 sub sp, #8
|
||
800162c: af00 add r7, sp, #0
|
||
800162e: 6078 str r0, [r7, #4]
|
||
8001630: 6039 str r1, [r7, #0]
|
||
errno = EINVAL;
|
||
8001632: f004 f991 bl 8005958 <__errno>
|
||
8001636: 4603 mov r3, r0
|
||
8001638: 2216 movs r2, #22
|
||
800163a: 601a str r2, [r3, #0]
|
||
return -1;
|
||
800163c: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
}
|
||
8001640: 4618 mov r0, r3
|
||
8001642: 3708 adds r7, #8
|
||
8001644: 46bd mov sp, r7
|
||
8001646: bd80 pop {r7, pc}
|
||
|
||
08001648 <_exit>:
|
||
|
||
void _exit (int status)
|
||
{
|
||
8001648: b580 push {r7, lr}
|
||
800164a: b082 sub sp, #8
|
||
800164c: af00 add r7, sp, #0
|
||
800164e: 6078 str r0, [r7, #4]
|
||
_kill(status, -1);
|
||
8001650: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
|
||
8001654: 6878 ldr r0, [r7, #4]
|
||
8001656: f7ff ffe7 bl 8001628 <_kill>
|
||
while (1) {} /* Make sure we hang here */
|
||
800165a: e7fe b.n 800165a <_exit+0x12>
|
||
|
||
0800165c <_read>:
|
||
}
|
||
|
||
__attribute__((weak)) int _read(int file, char *ptr, int len)
|
||
{
|
||
800165c: b580 push {r7, lr}
|
||
800165e: b086 sub sp, #24
|
||
8001660: af00 add r7, sp, #0
|
||
8001662: 60f8 str r0, [r7, #12]
|
||
8001664: 60b9 str r1, [r7, #8]
|
||
8001666: 607a str r2, [r7, #4]
|
||
int DataIdx;
|
||
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
8001668: 2300 movs r3, #0
|
||
800166a: 617b str r3, [r7, #20]
|
||
800166c: e00a b.n 8001684 <_read+0x28>
|
||
{
|
||
*ptr++ = __io_getchar();
|
||
800166e: f3af 8000 nop.w
|
||
8001672: 4601 mov r1, r0
|
||
8001674: 68bb ldr r3, [r7, #8]
|
||
8001676: 1c5a adds r2, r3, #1
|
||
8001678: 60ba str r2, [r7, #8]
|
||
800167a: b2ca uxtb r2, r1
|
||
800167c: 701a strb r2, [r3, #0]
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
800167e: 697b ldr r3, [r7, #20]
|
||
8001680: 3301 adds r3, #1
|
||
8001682: 617b str r3, [r7, #20]
|
||
8001684: 697a ldr r2, [r7, #20]
|
||
8001686: 687b ldr r3, [r7, #4]
|
||
8001688: 429a cmp r2, r3
|
||
800168a: dbf0 blt.n 800166e <_read+0x12>
|
||
}
|
||
|
||
return len;
|
||
800168c: 687b ldr r3, [r7, #4]
|
||
}
|
||
800168e: 4618 mov r0, r3
|
||
8001690: 3718 adds r7, #24
|
||
8001692: 46bd mov sp, r7
|
||
8001694: bd80 pop {r7, pc}
|
||
|
||
08001696 <_write>:
|
||
|
||
__attribute__((weak)) int _write(int file, char *ptr, int len)
|
||
{
|
||
8001696: b580 push {r7, lr}
|
||
8001698: b086 sub sp, #24
|
||
800169a: af00 add r7, sp, #0
|
||
800169c: 60f8 str r0, [r7, #12]
|
||
800169e: 60b9 str r1, [r7, #8]
|
||
80016a0: 607a str r2, [r7, #4]
|
||
int DataIdx;
|
||
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
80016a2: 2300 movs r3, #0
|
||
80016a4: 617b str r3, [r7, #20]
|
||
80016a6: e009 b.n 80016bc <_write+0x26>
|
||
{
|
||
__io_putchar(*ptr++);
|
||
80016a8: 68bb ldr r3, [r7, #8]
|
||
80016aa: 1c5a adds r2, r3, #1
|
||
80016ac: 60ba str r2, [r7, #8]
|
||
80016ae: 781b ldrb r3, [r3, #0]
|
||
80016b0: 4618 mov r0, r3
|
||
80016b2: f3af 8000 nop.w
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
80016b6: 697b ldr r3, [r7, #20]
|
||
80016b8: 3301 adds r3, #1
|
||
80016ba: 617b str r3, [r7, #20]
|
||
80016bc: 697a ldr r2, [r7, #20]
|
||
80016be: 687b ldr r3, [r7, #4]
|
||
80016c0: 429a cmp r2, r3
|
||
80016c2: dbf1 blt.n 80016a8 <_write+0x12>
|
||
}
|
||
return len;
|
||
80016c4: 687b ldr r3, [r7, #4]
|
||
}
|
||
80016c6: 4618 mov r0, r3
|
||
80016c8: 3718 adds r7, #24
|
||
80016ca: 46bd mov sp, r7
|
||
80016cc: bd80 pop {r7, pc}
|
||
|
||
080016ce <_close>:
|
||
|
||
int _close(int file)
|
||
{
|
||
80016ce: b480 push {r7}
|
||
80016d0: b083 sub sp, #12
|
||
80016d2: af00 add r7, sp, #0
|
||
80016d4: 6078 str r0, [r7, #4]
|
||
return -1;
|
||
80016d6: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
}
|
||
80016da: 4618 mov r0, r3
|
||
80016dc: 370c adds r7, #12
|
||
80016de: 46bd mov sp, r7
|
||
80016e0: bc80 pop {r7}
|
||
80016e2: 4770 bx lr
|
||
|
||
080016e4 <_fstat>:
|
||
|
||
|
||
int _fstat(int file, struct stat *st)
|
||
{
|
||
80016e4: b480 push {r7}
|
||
80016e6: b083 sub sp, #12
|
||
80016e8: af00 add r7, sp, #0
|
||
80016ea: 6078 str r0, [r7, #4]
|
||
80016ec: 6039 str r1, [r7, #0]
|
||
st->st_mode = S_IFCHR;
|
||
80016ee: 683b ldr r3, [r7, #0]
|
||
80016f0: f44f 5200 mov.w r2, #8192 ; 0x2000
|
||
80016f4: 605a str r2, [r3, #4]
|
||
return 0;
|
||
80016f6: 2300 movs r3, #0
|
||
}
|
||
80016f8: 4618 mov r0, r3
|
||
80016fa: 370c adds r7, #12
|
||
80016fc: 46bd mov sp, r7
|
||
80016fe: bc80 pop {r7}
|
||
8001700: 4770 bx lr
|
||
|
||
08001702 <_isatty>:
|
||
|
||
int _isatty(int file)
|
||
{
|
||
8001702: b480 push {r7}
|
||
8001704: b083 sub sp, #12
|
||
8001706: af00 add r7, sp, #0
|
||
8001708: 6078 str r0, [r7, #4]
|
||
return 1;
|
||
800170a: 2301 movs r3, #1
|
||
}
|
||
800170c: 4618 mov r0, r3
|
||
800170e: 370c adds r7, #12
|
||
8001710: 46bd mov sp, r7
|
||
8001712: bc80 pop {r7}
|
||
8001714: 4770 bx lr
|
||
|
||
08001716 <_lseek>:
|
||
|
||
int _lseek(int file, int ptr, int dir)
|
||
{
|
||
8001716: b480 push {r7}
|
||
8001718: b085 sub sp, #20
|
||
800171a: af00 add r7, sp, #0
|
||
800171c: 60f8 str r0, [r7, #12]
|
||
800171e: 60b9 str r1, [r7, #8]
|
||
8001720: 607a str r2, [r7, #4]
|
||
return 0;
|
||
8001722: 2300 movs r3, #0
|
||
}
|
||
8001724: 4618 mov r0, r3
|
||
8001726: 3714 adds r7, #20
|
||
8001728: 46bd mov sp, r7
|
||
800172a: bc80 pop {r7}
|
||
800172c: 4770 bx lr
|
||
...
|
||
|
||
08001730 <_sbrk>:
|
||
*
|
||
* @param incr Memory size
|
||
* @return Pointer to allocated memory
|
||
*/
|
||
void *_sbrk(ptrdiff_t incr)
|
||
{
|
||
8001730: b580 push {r7, lr}
|
||
8001732: b086 sub sp, #24
|
||
8001734: af00 add r7, sp, #0
|
||
8001736: 6078 str r0, [r7, #4]
|
||
extern uint8_t _end; /* Symbol defined in the linker script */
|
||
extern uint8_t _estack; /* Symbol defined in the linker script */
|
||
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
||
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
||
8001738: 4a14 ldr r2, [pc, #80] ; (800178c <_sbrk+0x5c>)
|
||
800173a: 4b15 ldr r3, [pc, #84] ; (8001790 <_sbrk+0x60>)
|
||
800173c: 1ad3 subs r3, r2, r3
|
||
800173e: 617b str r3, [r7, #20]
|
||
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||
8001740: 697b ldr r3, [r7, #20]
|
||
8001742: 613b str r3, [r7, #16]
|
||
uint8_t *prev_heap_end;
|
||
|
||
/* Initialize heap end at first call */
|
||
if (NULL == __sbrk_heap_end)
|
||
8001744: 4b13 ldr r3, [pc, #76] ; (8001794 <_sbrk+0x64>)
|
||
8001746: 681b ldr r3, [r3, #0]
|
||
8001748: 2b00 cmp r3, #0
|
||
800174a: d102 bne.n 8001752 <_sbrk+0x22>
|
||
{
|
||
__sbrk_heap_end = &_end;
|
||
800174c: 4b11 ldr r3, [pc, #68] ; (8001794 <_sbrk+0x64>)
|
||
800174e: 4a12 ldr r2, [pc, #72] ; (8001798 <_sbrk+0x68>)
|
||
8001750: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Protect heap from growing into the reserved MSP stack */
|
||
if (__sbrk_heap_end + incr > max_heap)
|
||
8001752: 4b10 ldr r3, [pc, #64] ; (8001794 <_sbrk+0x64>)
|
||
8001754: 681a ldr r2, [r3, #0]
|
||
8001756: 687b ldr r3, [r7, #4]
|
||
8001758: 4413 add r3, r2
|
||
800175a: 693a ldr r2, [r7, #16]
|
||
800175c: 429a cmp r2, r3
|
||
800175e: d207 bcs.n 8001770 <_sbrk+0x40>
|
||
{
|
||
errno = ENOMEM;
|
||
8001760: f004 f8fa bl 8005958 <__errno>
|
||
8001764: 4603 mov r3, r0
|
||
8001766: 220c movs r2, #12
|
||
8001768: 601a str r2, [r3, #0]
|
||
return (void *)-1;
|
||
800176a: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
800176e: e009 b.n 8001784 <_sbrk+0x54>
|
||
}
|
||
|
||
prev_heap_end = __sbrk_heap_end;
|
||
8001770: 4b08 ldr r3, [pc, #32] ; (8001794 <_sbrk+0x64>)
|
||
8001772: 681b ldr r3, [r3, #0]
|
||
8001774: 60fb str r3, [r7, #12]
|
||
__sbrk_heap_end += incr;
|
||
8001776: 4b07 ldr r3, [pc, #28] ; (8001794 <_sbrk+0x64>)
|
||
8001778: 681a ldr r2, [r3, #0]
|
||
800177a: 687b ldr r3, [r7, #4]
|
||
800177c: 4413 add r3, r2
|
||
800177e: 4a05 ldr r2, [pc, #20] ; (8001794 <_sbrk+0x64>)
|
||
8001780: 6013 str r3, [r2, #0]
|
||
|
||
return (void *)prev_heap_end;
|
||
8001782: 68fb ldr r3, [r7, #12]
|
||
}
|
||
8001784: 4618 mov r0, r3
|
||
8001786: 3718 adds r7, #24
|
||
8001788: 46bd mov sp, r7
|
||
800178a: bd80 pop {r7, pc}
|
||
800178c: 20010000 .word 0x20010000
|
||
8001790: 00000800 .word 0x00000800
|
||
8001794: 200001fc .word 0x200001fc
|
||
8001798: 20000300 .word 0x20000300
|
||
|
||
0800179c <SystemInit>:
|
||
* @note This function should be used only after reset.
|
||
* @param None
|
||
* @retval None
|
||
*/
|
||
void SystemInit (void)
|
||
{
|
||
800179c: b480 push {r7}
|
||
800179e: af00 add r7, sp, #0
|
||
|
||
/* Configure the Vector Table location -------------------------------------*/
|
||
#if defined(USER_VECT_TAB_ADDRESS)
|
||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
|
||
#endif /* USER_VECT_TAB_ADDRESS */
|
||
}
|
||
80017a0: bf00 nop
|
||
80017a2: 46bd mov sp, r7
|
||
80017a4: bc80 pop {r7}
|
||
80017a6: 4770 bx lr
|
||
|
||
080017a8 <Reset_Handler>:
|
||
.weak Reset_Handler
|
||
.type Reset_Handler, %function
|
||
Reset_Handler:
|
||
|
||
/* Copy the data segment initializers from flash to SRAM */
|
||
ldr r0, =_sdata
|
||
80017a8: 480c ldr r0, [pc, #48] ; (80017dc <LoopFillZerobss+0x12>)
|
||
ldr r1, =_edata
|
||
80017aa: 490d ldr r1, [pc, #52] ; (80017e0 <LoopFillZerobss+0x16>)
|
||
ldr r2, =_sidata
|
||
80017ac: 4a0d ldr r2, [pc, #52] ; (80017e4 <LoopFillZerobss+0x1a>)
|
||
movs r3, #0
|
||
80017ae: 2300 movs r3, #0
|
||
b LoopCopyDataInit
|
||
80017b0: e002 b.n 80017b8 <LoopCopyDataInit>
|
||
|
||
080017b2 <CopyDataInit>:
|
||
|
||
CopyDataInit:
|
||
ldr r4, [r2, r3]
|
||
80017b2: 58d4 ldr r4, [r2, r3]
|
||
str r4, [r0, r3]
|
||
80017b4: 50c4 str r4, [r0, r3]
|
||
adds r3, r3, #4
|
||
80017b6: 3304 adds r3, #4
|
||
|
||
080017b8 <LoopCopyDataInit>:
|
||
|
||
LoopCopyDataInit:
|
||
adds r4, r0, r3
|
||
80017b8: 18c4 adds r4, r0, r3
|
||
cmp r4, r1
|
||
80017ba: 428c cmp r4, r1
|
||
bcc CopyDataInit
|
||
80017bc: d3f9 bcc.n 80017b2 <CopyDataInit>
|
||
|
||
/* Zero fill the bss segment. */
|
||
ldr r2, =_sbss
|
||
80017be: 4a0a ldr r2, [pc, #40] ; (80017e8 <LoopFillZerobss+0x1e>)
|
||
ldr r4, =_ebss
|
||
80017c0: 4c0a ldr r4, [pc, #40] ; (80017ec <LoopFillZerobss+0x22>)
|
||
movs r3, #0
|
||
80017c2: 2300 movs r3, #0
|
||
b LoopFillZerobss
|
||
80017c4: e001 b.n 80017ca <LoopFillZerobss>
|
||
|
||
080017c6 <FillZerobss>:
|
||
|
||
FillZerobss:
|
||
str r3, [r2]
|
||
80017c6: 6013 str r3, [r2, #0]
|
||
adds r2, r2, #4
|
||
80017c8: 3204 adds r2, #4
|
||
|
||
080017ca <LoopFillZerobss>:
|
||
|
||
LoopFillZerobss:
|
||
cmp r2, r4
|
||
80017ca: 42a2 cmp r2, r4
|
||
bcc FillZerobss
|
||
80017cc: d3fb bcc.n 80017c6 <FillZerobss>
|
||
|
||
/* Call the clock system intitialization function.*/
|
||
bl SystemInit
|
||
80017ce: f7ff ffe5 bl 800179c <SystemInit>
|
||
/* Call static constructors */
|
||
bl __libc_init_array
|
||
80017d2: f004 f8c7 bl 8005964 <__libc_init_array>
|
||
/* Call the application's entry point.*/
|
||
bl main
|
||
80017d6: f7ff fc97 bl 8001108 <main>
|
||
bx lr
|
||
80017da: 4770 bx lr
|
||
ldr r0, =_sdata
|
||
80017dc: 20000000 .word 0x20000000
|
||
ldr r1, =_edata
|
||
80017e0: 200001dc .word 0x200001dc
|
||
ldr r2, =_sidata
|
||
80017e4: 08009674 .word 0x08009674
|
||
ldr r2, =_sbss
|
||
80017e8: 200001dc .word 0x200001dc
|
||
ldr r4, =_ebss
|
||
80017ec: 20000300 .word 0x20000300
|
||
|
||
080017f0 <ADC1_2_IRQHandler>:
|
||
* @retval : None
|
||
*/
|
||
.section .text.Default_Handler,"ax",%progbits
|
||
Default_Handler:
|
||
Infinite_Loop:
|
||
b Infinite_Loop
|
||
80017f0: e7fe b.n 80017f0 <ADC1_2_IRQHandler>
|
||
...
|
||
|
||
080017f4 <HAL_Init>:
|
||
* need to ensure that the SysTick time base is always set to 1 millisecond
|
||
* to have correct HAL operation.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_Init(void)
|
||
{
|
||
80017f4: b580 push {r7, lr}
|
||
80017f6: af00 add r7, sp, #0
|
||
defined(STM32F102x6) || defined(STM32F102xB) || \
|
||
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
|
||
defined(STM32F105xC) || defined(STM32F107xC)
|
||
|
||
/* Prefetch buffer is not available on value line devices */
|
||
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
||
80017f8: 4b08 ldr r3, [pc, #32] ; (800181c <HAL_Init+0x28>)
|
||
80017fa: 681b ldr r3, [r3, #0]
|
||
80017fc: 4a07 ldr r2, [pc, #28] ; (800181c <HAL_Init+0x28>)
|
||
80017fe: f043 0310 orr.w r3, r3, #16
|
||
8001802: 6013 str r3, [r2, #0]
|
||
#endif
|
||
#endif /* PREFETCH_ENABLE */
|
||
|
||
/* Set Interrupt Group Priority */
|
||
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
||
8001804: 2003 movs r0, #3
|
||
8001806: f000 f92b bl 8001a60 <HAL_NVIC_SetPriorityGrouping>
|
||
|
||
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
|
||
HAL_InitTick(TICK_INT_PRIORITY);
|
||
800180a: 200f movs r0, #15
|
||
800180c: f000 f808 bl 8001820 <HAL_InitTick>
|
||
|
||
/* Init the low level hardware */
|
||
HAL_MspInit();
|
||
8001810: f7ff fe0c bl 800142c <HAL_MspInit>
|
||
|
||
/* Return function status */
|
||
return HAL_OK;
|
||
8001814: 2300 movs r3, #0
|
||
}
|
||
8001816: 4618 mov r0, r3
|
||
8001818: bd80 pop {r7, pc}
|
||
800181a: bf00 nop
|
||
800181c: 40022000 .word 0x40022000
|
||
|
||
08001820 <HAL_InitTick>:
|
||
* implementation in user file.
|
||
* @param TickPriority Tick interrupt priority.
|
||
* @retval HAL status
|
||
*/
|
||
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
||
{
|
||
8001820: b580 push {r7, lr}
|
||
8001822: b082 sub sp, #8
|
||
8001824: af00 add r7, sp, #0
|
||
8001826: 6078 str r0, [r7, #4]
|
||
/* Configure the SysTick to have interrupt in 1ms time basis*/
|
||
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
|
||
8001828: 4b12 ldr r3, [pc, #72] ; (8001874 <HAL_InitTick+0x54>)
|
||
800182a: 681a ldr r2, [r3, #0]
|
||
800182c: 4b12 ldr r3, [pc, #72] ; (8001878 <HAL_InitTick+0x58>)
|
||
800182e: 781b ldrb r3, [r3, #0]
|
||
8001830: 4619 mov r1, r3
|
||
8001832: f44f 737a mov.w r3, #1000 ; 0x3e8
|
||
8001836: fbb3 f3f1 udiv r3, r3, r1
|
||
800183a: fbb2 f3f3 udiv r3, r2, r3
|
||
800183e: 4618 mov r0, r3
|
||
8001840: f000 f935 bl 8001aae <HAL_SYSTICK_Config>
|
||
8001844: 4603 mov r3, r0
|
||
8001846: 2b00 cmp r3, #0
|
||
8001848: d001 beq.n 800184e <HAL_InitTick+0x2e>
|
||
{
|
||
return HAL_ERROR;
|
||
800184a: 2301 movs r3, #1
|
||
800184c: e00e b.n 800186c <HAL_InitTick+0x4c>
|
||
}
|
||
|
||
/* Configure the SysTick IRQ priority */
|
||
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
||
800184e: 687b ldr r3, [r7, #4]
|
||
8001850: 2b0f cmp r3, #15
|
||
8001852: d80a bhi.n 800186a <HAL_InitTick+0x4a>
|
||
{
|
||
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
||
8001854: 2200 movs r2, #0
|
||
8001856: 6879 ldr r1, [r7, #4]
|
||
8001858: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
800185c: f000 f90b bl 8001a76 <HAL_NVIC_SetPriority>
|
||
uwTickPrio = TickPriority;
|
||
8001860: 4a06 ldr r2, [pc, #24] ; (800187c <HAL_InitTick+0x5c>)
|
||
8001862: 687b ldr r3, [r7, #4]
|
||
8001864: 6013 str r3, [r2, #0]
|
||
{
|
||
return HAL_ERROR;
|
||
}
|
||
|
||
/* Return function status */
|
||
return HAL_OK;
|
||
8001866: 2300 movs r3, #0
|
||
8001868: e000 b.n 800186c <HAL_InitTick+0x4c>
|
||
return HAL_ERROR;
|
||
800186a: 2301 movs r3, #1
|
||
}
|
||
800186c: 4618 mov r0, r3
|
||
800186e: 3708 adds r7, #8
|
||
8001870: 46bd mov sp, r7
|
||
8001872: bd80 pop {r7, pc}
|
||
8001874: 20000000 .word 0x20000000
|
||
8001878: 20000008 .word 0x20000008
|
||
800187c: 20000004 .word 0x20000004
|
||
|
||
08001880 <HAL_IncTick>:
|
||
* @note This function is declared as __weak to be overwritten in case of other
|
||
* implementations in user file.
|
||
* @retval None
|
||
*/
|
||
__weak void HAL_IncTick(void)
|
||
{
|
||
8001880: b480 push {r7}
|
||
8001882: af00 add r7, sp, #0
|
||
uwTick += uwTickFreq;
|
||
8001884: 4b05 ldr r3, [pc, #20] ; (800189c <HAL_IncTick+0x1c>)
|
||
8001886: 781b ldrb r3, [r3, #0]
|
||
8001888: 461a mov r2, r3
|
||
800188a: 4b05 ldr r3, [pc, #20] ; (80018a0 <HAL_IncTick+0x20>)
|
||
800188c: 681b ldr r3, [r3, #0]
|
||
800188e: 4413 add r3, r2
|
||
8001890: 4a03 ldr r2, [pc, #12] ; (80018a0 <HAL_IncTick+0x20>)
|
||
8001892: 6013 str r3, [r2, #0]
|
||
}
|
||
8001894: bf00 nop
|
||
8001896: 46bd mov sp, r7
|
||
8001898: bc80 pop {r7}
|
||
800189a: 4770 bx lr
|
||
800189c: 20000008 .word 0x20000008
|
||
80018a0: 200002a4 .word 0x200002a4
|
||
|
||
080018a4 <HAL_GetTick>:
|
||
* @note This function is declared as __weak to be overwritten in case of other
|
||
* implementations in user file.
|
||
* @retval tick value
|
||
*/
|
||
__weak uint32_t HAL_GetTick(void)
|
||
{
|
||
80018a4: b480 push {r7}
|
||
80018a6: af00 add r7, sp, #0
|
||
return uwTick;
|
||
80018a8: 4b02 ldr r3, [pc, #8] ; (80018b4 <HAL_GetTick+0x10>)
|
||
80018aa: 681b ldr r3, [r3, #0]
|
||
}
|
||
80018ac: 4618 mov r0, r3
|
||
80018ae: 46bd mov sp, r7
|
||
80018b0: bc80 pop {r7}
|
||
80018b2: 4770 bx lr
|
||
80018b4: 200002a4 .word 0x200002a4
|
||
|
||
080018b8 <HAL_Delay>:
|
||
* implementations in user file.
|
||
* @param Delay specifies the delay time length, in milliseconds.
|
||
* @retval None
|
||
*/
|
||
__weak void HAL_Delay(uint32_t Delay)
|
||
{
|
||
80018b8: b580 push {r7, lr}
|
||
80018ba: b084 sub sp, #16
|
||
80018bc: af00 add r7, sp, #0
|
||
80018be: 6078 str r0, [r7, #4]
|
||
uint32_t tickstart = HAL_GetTick();
|
||
80018c0: f7ff fff0 bl 80018a4 <HAL_GetTick>
|
||
80018c4: 60b8 str r0, [r7, #8]
|
||
uint32_t wait = Delay;
|
||
80018c6: 687b ldr r3, [r7, #4]
|
||
80018c8: 60fb str r3, [r7, #12]
|
||
|
||
/* Add a freq to guarantee minimum wait */
|
||
if (wait < HAL_MAX_DELAY)
|
||
80018ca: 68fb ldr r3, [r7, #12]
|
||
80018cc: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
80018d0: d005 beq.n 80018de <HAL_Delay+0x26>
|
||
{
|
||
wait += (uint32_t)(uwTickFreq);
|
||
80018d2: 4b0a ldr r3, [pc, #40] ; (80018fc <HAL_Delay+0x44>)
|
||
80018d4: 781b ldrb r3, [r3, #0]
|
||
80018d6: 461a mov r2, r3
|
||
80018d8: 68fb ldr r3, [r7, #12]
|
||
80018da: 4413 add r3, r2
|
||
80018dc: 60fb str r3, [r7, #12]
|
||
}
|
||
|
||
while ((HAL_GetTick() - tickstart) < wait)
|
||
80018de: bf00 nop
|
||
80018e0: f7ff ffe0 bl 80018a4 <HAL_GetTick>
|
||
80018e4: 4602 mov r2, r0
|
||
80018e6: 68bb ldr r3, [r7, #8]
|
||
80018e8: 1ad3 subs r3, r2, r3
|
||
80018ea: 68fa ldr r2, [r7, #12]
|
||
80018ec: 429a cmp r2, r3
|
||
80018ee: d8f7 bhi.n 80018e0 <HAL_Delay+0x28>
|
||
{
|
||
}
|
||
}
|
||
80018f0: bf00 nop
|
||
80018f2: bf00 nop
|
||
80018f4: 3710 adds r7, #16
|
||
80018f6: 46bd mov sp, r7
|
||
80018f8: bd80 pop {r7, pc}
|
||
80018fa: bf00 nop
|
||
80018fc: 20000008 .word 0x20000008
|
||
|
||
08001900 <__NVIC_SetPriorityGrouping>:
|
||
In case of a conflict between priority grouping and available
|
||
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
|
||
\param [in] PriorityGroup Priority grouping field.
|
||
*/
|
||
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
||
{
|
||
8001900: b480 push {r7}
|
||
8001902: b085 sub sp, #20
|
||
8001904: af00 add r7, sp, #0
|
||
8001906: 6078 str r0, [r7, #4]
|
||
uint32_t reg_value;
|
||
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
||
8001908: 687b ldr r3, [r7, #4]
|
||
800190a: f003 0307 and.w r3, r3, #7
|
||
800190e: 60fb str r3, [r7, #12]
|
||
|
||
reg_value = SCB->AIRCR; /* read old register configuration */
|
||
8001910: 4b0c ldr r3, [pc, #48] ; (8001944 <__NVIC_SetPriorityGrouping+0x44>)
|
||
8001912: 68db ldr r3, [r3, #12]
|
||
8001914: 60bb str r3, [r7, #8]
|
||
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
|
||
8001916: 68ba ldr r2, [r7, #8]
|
||
8001918: f64f 03ff movw r3, #63743 ; 0xf8ff
|
||
800191c: 4013 ands r3, r2
|
||
800191e: 60bb str r3, [r7, #8]
|
||
reg_value = (reg_value |
|
||
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
|
||
8001920: 68fb ldr r3, [r7, #12]
|
||
8001922: 021a lsls r2, r3, #8
|
||
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||
8001924: 68bb ldr r3, [r7, #8]
|
||
8001926: 4313 orrs r3, r2
|
||
reg_value = (reg_value |
|
||
8001928: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
|
||
800192c: f443 3300 orr.w r3, r3, #131072 ; 0x20000
|
||
8001930: 60bb str r3, [r7, #8]
|
||
SCB->AIRCR = reg_value;
|
||
8001932: 4a04 ldr r2, [pc, #16] ; (8001944 <__NVIC_SetPriorityGrouping+0x44>)
|
||
8001934: 68bb ldr r3, [r7, #8]
|
||
8001936: 60d3 str r3, [r2, #12]
|
||
}
|
||
8001938: bf00 nop
|
||
800193a: 3714 adds r7, #20
|
||
800193c: 46bd mov sp, r7
|
||
800193e: bc80 pop {r7}
|
||
8001940: 4770 bx lr
|
||
8001942: bf00 nop
|
||
8001944: e000ed00 .word 0xe000ed00
|
||
|
||
08001948 <__NVIC_GetPriorityGrouping>:
|
||
\brief Get Priority Grouping
|
||
\details Reads the priority grouping field from the NVIC Interrupt Controller.
|
||
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
|
||
*/
|
||
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
|
||
{
|
||
8001948: b480 push {r7}
|
||
800194a: af00 add r7, sp, #0
|
||
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
|
||
800194c: 4b04 ldr r3, [pc, #16] ; (8001960 <__NVIC_GetPriorityGrouping+0x18>)
|
||
800194e: 68db ldr r3, [r3, #12]
|
||
8001950: 0a1b lsrs r3, r3, #8
|
||
8001952: f003 0307 and.w r3, r3, #7
|
||
}
|
||
8001956: 4618 mov r0, r3
|
||
8001958: 46bd mov sp, r7
|
||
800195a: bc80 pop {r7}
|
||
800195c: 4770 bx lr
|
||
800195e: bf00 nop
|
||
8001960: e000ed00 .word 0xe000ed00
|
||
|
||
08001964 <__NVIC_SetPriority>:
|
||
\param [in] IRQn Interrupt number.
|
||
\param [in] priority Priority to set.
|
||
\note The priority cannot be set for every processor exception.
|
||
*/
|
||
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
||
{
|
||
8001964: b480 push {r7}
|
||
8001966: b083 sub sp, #12
|
||
8001968: af00 add r7, sp, #0
|
||
800196a: 4603 mov r3, r0
|
||
800196c: 6039 str r1, [r7, #0]
|
||
800196e: 71fb strb r3, [r7, #7]
|
||
if ((int32_t)(IRQn) >= 0)
|
||
8001970: f997 3007 ldrsb.w r3, [r7, #7]
|
||
8001974: 2b00 cmp r3, #0
|
||
8001976: db0a blt.n 800198e <__NVIC_SetPriority+0x2a>
|
||
{
|
||
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
8001978: 683b ldr r3, [r7, #0]
|
||
800197a: b2da uxtb r2, r3
|
||
800197c: 490c ldr r1, [pc, #48] ; (80019b0 <__NVIC_SetPriority+0x4c>)
|
||
800197e: f997 3007 ldrsb.w r3, [r7, #7]
|
||
8001982: 0112 lsls r2, r2, #4
|
||
8001984: b2d2 uxtb r2, r2
|
||
8001986: 440b add r3, r1
|
||
8001988: f883 2300 strb.w r2, [r3, #768] ; 0x300
|
||
}
|
||
else
|
||
{
|
||
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
}
|
||
}
|
||
800198c: e00a b.n 80019a4 <__NVIC_SetPriority+0x40>
|
||
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
800198e: 683b ldr r3, [r7, #0]
|
||
8001990: b2da uxtb r2, r3
|
||
8001992: 4908 ldr r1, [pc, #32] ; (80019b4 <__NVIC_SetPriority+0x50>)
|
||
8001994: 79fb ldrb r3, [r7, #7]
|
||
8001996: f003 030f and.w r3, r3, #15
|
||
800199a: 3b04 subs r3, #4
|
||
800199c: 0112 lsls r2, r2, #4
|
||
800199e: b2d2 uxtb r2, r2
|
||
80019a0: 440b add r3, r1
|
||
80019a2: 761a strb r2, [r3, #24]
|
||
}
|
||
80019a4: bf00 nop
|
||
80019a6: 370c adds r7, #12
|
||
80019a8: 46bd mov sp, r7
|
||
80019aa: bc80 pop {r7}
|
||
80019ac: 4770 bx lr
|
||
80019ae: bf00 nop
|
||
80019b0: e000e100 .word 0xe000e100
|
||
80019b4: e000ed00 .word 0xe000ed00
|
||
|
||
080019b8 <NVIC_EncodePriority>:
|
||
\param [in] PreemptPriority Preemptive priority value (starting from 0).
|
||
\param [in] SubPriority Subpriority value (starting from 0).
|
||
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
|
||
*/
|
||
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
|
||
{
|
||
80019b8: b480 push {r7}
|
||
80019ba: b089 sub sp, #36 ; 0x24
|
||
80019bc: af00 add r7, sp, #0
|
||
80019be: 60f8 str r0, [r7, #12]
|
||
80019c0: 60b9 str r1, [r7, #8]
|
||
80019c2: 607a str r2, [r7, #4]
|
||
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
||
80019c4: 68fb ldr r3, [r7, #12]
|
||
80019c6: f003 0307 and.w r3, r3, #7
|
||
80019ca: 61fb str r3, [r7, #28]
|
||
uint32_t PreemptPriorityBits;
|
||
uint32_t SubPriorityBits;
|
||
|
||
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
|
||
80019cc: 69fb ldr r3, [r7, #28]
|
||
80019ce: f1c3 0307 rsb r3, r3, #7
|
||
80019d2: 2b04 cmp r3, #4
|
||
80019d4: bf28 it cs
|
||
80019d6: 2304 movcs r3, #4
|
||
80019d8: 61bb str r3, [r7, #24]
|
||
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
|
||
80019da: 69fb ldr r3, [r7, #28]
|
||
80019dc: 3304 adds r3, #4
|
||
80019de: 2b06 cmp r3, #6
|
||
80019e0: d902 bls.n 80019e8 <NVIC_EncodePriority+0x30>
|
||
80019e2: 69fb ldr r3, [r7, #28]
|
||
80019e4: 3b03 subs r3, #3
|
||
80019e6: e000 b.n 80019ea <NVIC_EncodePriority+0x32>
|
||
80019e8: 2300 movs r3, #0
|
||
80019ea: 617b str r3, [r7, #20]
|
||
|
||
return (
|
||
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
||
80019ec: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
80019f0: 69bb ldr r3, [r7, #24]
|
||
80019f2: fa02 f303 lsl.w r3, r2, r3
|
||
80019f6: 43da mvns r2, r3
|
||
80019f8: 68bb ldr r3, [r7, #8]
|
||
80019fa: 401a ands r2, r3
|
||
80019fc: 697b ldr r3, [r7, #20]
|
||
80019fe: 409a lsls r2, r3
|
||
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
|
||
8001a00: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
|
||
8001a04: 697b ldr r3, [r7, #20]
|
||
8001a06: fa01 f303 lsl.w r3, r1, r3
|
||
8001a0a: 43d9 mvns r1, r3
|
||
8001a0c: 687b ldr r3, [r7, #4]
|
||
8001a0e: 400b ands r3, r1
|
||
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
||
8001a10: 4313 orrs r3, r2
|
||
);
|
||
}
|
||
8001a12: 4618 mov r0, r3
|
||
8001a14: 3724 adds r7, #36 ; 0x24
|
||
8001a16: 46bd mov sp, r7
|
||
8001a18: bc80 pop {r7}
|
||
8001a1a: 4770 bx lr
|
||
|
||
08001a1c <SysTick_Config>:
|
||
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
||
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
||
must contain a vendor-specific implementation of this function.
|
||
*/
|
||
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
||
{
|
||
8001a1c: b580 push {r7, lr}
|
||
8001a1e: b082 sub sp, #8
|
||
8001a20: af00 add r7, sp, #0
|
||
8001a22: 6078 str r0, [r7, #4]
|
||
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
||
8001a24: 687b ldr r3, [r7, #4]
|
||
8001a26: 3b01 subs r3, #1
|
||
8001a28: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
|
||
8001a2c: d301 bcc.n 8001a32 <SysTick_Config+0x16>
|
||
{
|
||
return (1UL); /* Reload value impossible */
|
||
8001a2e: 2301 movs r3, #1
|
||
8001a30: e00f b.n 8001a52 <SysTick_Config+0x36>
|
||
}
|
||
|
||
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
||
8001a32: 4a0a ldr r2, [pc, #40] ; (8001a5c <SysTick_Config+0x40>)
|
||
8001a34: 687b ldr r3, [r7, #4]
|
||
8001a36: 3b01 subs r3, #1
|
||
8001a38: 6053 str r3, [r2, #4]
|
||
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
||
8001a3a: 210f movs r1, #15
|
||
8001a3c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8001a40: f7ff ff90 bl 8001964 <__NVIC_SetPriority>
|
||
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
||
8001a44: 4b05 ldr r3, [pc, #20] ; (8001a5c <SysTick_Config+0x40>)
|
||
8001a46: 2200 movs r2, #0
|
||
8001a48: 609a str r2, [r3, #8]
|
||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
||
8001a4a: 4b04 ldr r3, [pc, #16] ; (8001a5c <SysTick_Config+0x40>)
|
||
8001a4c: 2207 movs r2, #7
|
||
8001a4e: 601a str r2, [r3, #0]
|
||
SysTick_CTRL_TICKINT_Msk |
|
||
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
||
return (0UL); /* Function successful */
|
||
8001a50: 2300 movs r3, #0
|
||
}
|
||
8001a52: 4618 mov r0, r3
|
||
8001a54: 3708 adds r7, #8
|
||
8001a56: 46bd mov sp, r7
|
||
8001a58: bd80 pop {r7, pc}
|
||
8001a5a: bf00 nop
|
||
8001a5c: e000e010 .word 0xe000e010
|
||
|
||
08001a60 <HAL_NVIC_SetPriorityGrouping>:
|
||
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
|
||
* The pending IRQ priority will be managed only by the subpriority.
|
||
* @retval None
|
||
*/
|
||
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
||
{
|
||
8001a60: b580 push {r7, lr}
|
||
8001a62: b082 sub sp, #8
|
||
8001a64: af00 add r7, sp, #0
|
||
8001a66: 6078 str r0, [r7, #4]
|
||
/* Check the parameters */
|
||
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
|
||
|
||
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
|
||
NVIC_SetPriorityGrouping(PriorityGroup);
|
||
8001a68: 6878 ldr r0, [r7, #4]
|
||
8001a6a: f7ff ff49 bl 8001900 <__NVIC_SetPriorityGrouping>
|
||
}
|
||
8001a6e: bf00 nop
|
||
8001a70: 3708 adds r7, #8
|
||
8001a72: 46bd mov sp, r7
|
||
8001a74: bd80 pop {r7, pc}
|
||
|
||
08001a76 <HAL_NVIC_SetPriority>:
|
||
* This parameter can be a value between 0 and 15
|
||
* A lower priority value indicates a higher priority.
|
||
* @retval None
|
||
*/
|
||
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
||
{
|
||
8001a76: b580 push {r7, lr}
|
||
8001a78: b086 sub sp, #24
|
||
8001a7a: af00 add r7, sp, #0
|
||
8001a7c: 4603 mov r3, r0
|
||
8001a7e: 60b9 str r1, [r7, #8]
|
||
8001a80: 607a str r2, [r7, #4]
|
||
8001a82: 73fb strb r3, [r7, #15]
|
||
uint32_t prioritygroup = 0x00U;
|
||
8001a84: 2300 movs r3, #0
|
||
8001a86: 617b str r3, [r7, #20]
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
|
||
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
||
|
||
prioritygroup = NVIC_GetPriorityGrouping();
|
||
8001a88: f7ff ff5e bl 8001948 <__NVIC_GetPriorityGrouping>
|
||
8001a8c: 6178 str r0, [r7, #20]
|
||
|
||
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
|
||
8001a8e: 687a ldr r2, [r7, #4]
|
||
8001a90: 68b9 ldr r1, [r7, #8]
|
||
8001a92: 6978 ldr r0, [r7, #20]
|
||
8001a94: f7ff ff90 bl 80019b8 <NVIC_EncodePriority>
|
||
8001a98: 4602 mov r2, r0
|
||
8001a9a: f997 300f ldrsb.w r3, [r7, #15]
|
||
8001a9e: 4611 mov r1, r2
|
||
8001aa0: 4618 mov r0, r3
|
||
8001aa2: f7ff ff5f bl 8001964 <__NVIC_SetPriority>
|
||
}
|
||
8001aa6: bf00 nop
|
||
8001aa8: 3718 adds r7, #24
|
||
8001aaa: 46bd mov sp, r7
|
||
8001aac: bd80 pop {r7, pc}
|
||
|
||
08001aae <HAL_SYSTICK_Config>:
|
||
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
|
||
* @retval status: - 0 Function succeeded.
|
||
* - 1 Function failed.
|
||
*/
|
||
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
||
{
|
||
8001aae: b580 push {r7, lr}
|
||
8001ab0: b082 sub sp, #8
|
||
8001ab2: af00 add r7, sp, #0
|
||
8001ab4: 6078 str r0, [r7, #4]
|
||
return SysTick_Config(TicksNumb);
|
||
8001ab6: 6878 ldr r0, [r7, #4]
|
||
8001ab8: f7ff ffb0 bl 8001a1c <SysTick_Config>
|
||
8001abc: 4603 mov r3, r0
|
||
}
|
||
8001abe: 4618 mov r0, r3
|
||
8001ac0: 3708 adds r7, #8
|
||
8001ac2: 46bd mov sp, r7
|
||
8001ac4: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08001ac8 <HAL_GPIO_Init>:
|
||
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
|
||
* the configuration information for the specified GPIO peripheral.
|
||
* @retval None
|
||
*/
|
||
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
||
{
|
||
8001ac8: b480 push {r7}
|
||
8001aca: b08b sub sp, #44 ; 0x2c
|
||
8001acc: af00 add r7, sp, #0
|
||
8001ace: 6078 str r0, [r7, #4]
|
||
8001ad0: 6039 str r1, [r7, #0]
|
||
uint32_t position = 0x00u;
|
||
8001ad2: 2300 movs r3, #0
|
||
8001ad4: 627b str r3, [r7, #36] ; 0x24
|
||
uint32_t ioposition;
|
||
uint32_t iocurrent;
|
||
uint32_t temp;
|
||
uint32_t config = 0x00u;
|
||
8001ad6: 2300 movs r3, #0
|
||
8001ad8: 623b str r3, [r7, #32]
|
||
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
||
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
|
||
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
|
||
|
||
/* Configure the port pins */
|
||
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
||
8001ada: e179 b.n 8001dd0 <HAL_GPIO_Init+0x308>
|
||
{
|
||
/* Get the IO position */
|
||
ioposition = (0x01uL << position);
|
||
8001adc: 2201 movs r2, #1
|
||
8001ade: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001ae0: fa02 f303 lsl.w r3, r2, r3
|
||
8001ae4: 61fb str r3, [r7, #28]
|
||
|
||
/* Get the current IO position */
|
||
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
|
||
8001ae6: 683b ldr r3, [r7, #0]
|
||
8001ae8: 681b ldr r3, [r3, #0]
|
||
8001aea: 69fa ldr r2, [r7, #28]
|
||
8001aec: 4013 ands r3, r2
|
||
8001aee: 61bb str r3, [r7, #24]
|
||
|
||
if (iocurrent == ioposition)
|
||
8001af0: 69ba ldr r2, [r7, #24]
|
||
8001af2: 69fb ldr r3, [r7, #28]
|
||
8001af4: 429a cmp r2, r3
|
||
8001af6: f040 8168 bne.w 8001dca <HAL_GPIO_Init+0x302>
|
||
{
|
||
/* Check the Alternate function parameters */
|
||
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
|
||
|
||
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
|
||
switch (GPIO_Init->Mode)
|
||
8001afa: 683b ldr r3, [r7, #0]
|
||
8001afc: 685b ldr r3, [r3, #4]
|
||
8001afe: 4aa0 ldr r2, [pc, #640] ; (8001d80 <HAL_GPIO_Init+0x2b8>)
|
||
8001b00: 4293 cmp r3, r2
|
||
8001b02: d05e beq.n 8001bc2 <HAL_GPIO_Init+0xfa>
|
||
8001b04: 4a9e ldr r2, [pc, #632] ; (8001d80 <HAL_GPIO_Init+0x2b8>)
|
||
8001b06: 4293 cmp r3, r2
|
||
8001b08: d875 bhi.n 8001bf6 <HAL_GPIO_Init+0x12e>
|
||
8001b0a: 4a9e ldr r2, [pc, #632] ; (8001d84 <HAL_GPIO_Init+0x2bc>)
|
||
8001b0c: 4293 cmp r3, r2
|
||
8001b0e: d058 beq.n 8001bc2 <HAL_GPIO_Init+0xfa>
|
||
8001b10: 4a9c ldr r2, [pc, #624] ; (8001d84 <HAL_GPIO_Init+0x2bc>)
|
||
8001b12: 4293 cmp r3, r2
|
||
8001b14: d86f bhi.n 8001bf6 <HAL_GPIO_Init+0x12e>
|
||
8001b16: 4a9c ldr r2, [pc, #624] ; (8001d88 <HAL_GPIO_Init+0x2c0>)
|
||
8001b18: 4293 cmp r3, r2
|
||
8001b1a: d052 beq.n 8001bc2 <HAL_GPIO_Init+0xfa>
|
||
8001b1c: 4a9a ldr r2, [pc, #616] ; (8001d88 <HAL_GPIO_Init+0x2c0>)
|
||
8001b1e: 4293 cmp r3, r2
|
||
8001b20: d869 bhi.n 8001bf6 <HAL_GPIO_Init+0x12e>
|
||
8001b22: 4a9a ldr r2, [pc, #616] ; (8001d8c <HAL_GPIO_Init+0x2c4>)
|
||
8001b24: 4293 cmp r3, r2
|
||
8001b26: d04c beq.n 8001bc2 <HAL_GPIO_Init+0xfa>
|
||
8001b28: 4a98 ldr r2, [pc, #608] ; (8001d8c <HAL_GPIO_Init+0x2c4>)
|
||
8001b2a: 4293 cmp r3, r2
|
||
8001b2c: d863 bhi.n 8001bf6 <HAL_GPIO_Init+0x12e>
|
||
8001b2e: 4a98 ldr r2, [pc, #608] ; (8001d90 <HAL_GPIO_Init+0x2c8>)
|
||
8001b30: 4293 cmp r3, r2
|
||
8001b32: d046 beq.n 8001bc2 <HAL_GPIO_Init+0xfa>
|
||
8001b34: 4a96 ldr r2, [pc, #600] ; (8001d90 <HAL_GPIO_Init+0x2c8>)
|
||
8001b36: 4293 cmp r3, r2
|
||
8001b38: d85d bhi.n 8001bf6 <HAL_GPIO_Init+0x12e>
|
||
8001b3a: 2b12 cmp r3, #18
|
||
8001b3c: d82a bhi.n 8001b94 <HAL_GPIO_Init+0xcc>
|
||
8001b3e: 2b12 cmp r3, #18
|
||
8001b40: d859 bhi.n 8001bf6 <HAL_GPIO_Init+0x12e>
|
||
8001b42: a201 add r2, pc, #4 ; (adr r2, 8001b48 <HAL_GPIO_Init+0x80>)
|
||
8001b44: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
8001b48: 08001bc3 .word 0x08001bc3
|
||
8001b4c: 08001b9d .word 0x08001b9d
|
||
8001b50: 08001baf .word 0x08001baf
|
||
8001b54: 08001bf1 .word 0x08001bf1
|
||
8001b58: 08001bf7 .word 0x08001bf7
|
||
8001b5c: 08001bf7 .word 0x08001bf7
|
||
8001b60: 08001bf7 .word 0x08001bf7
|
||
8001b64: 08001bf7 .word 0x08001bf7
|
||
8001b68: 08001bf7 .word 0x08001bf7
|
||
8001b6c: 08001bf7 .word 0x08001bf7
|
||
8001b70: 08001bf7 .word 0x08001bf7
|
||
8001b74: 08001bf7 .word 0x08001bf7
|
||
8001b78: 08001bf7 .word 0x08001bf7
|
||
8001b7c: 08001bf7 .word 0x08001bf7
|
||
8001b80: 08001bf7 .word 0x08001bf7
|
||
8001b84: 08001bf7 .word 0x08001bf7
|
||
8001b88: 08001bf7 .word 0x08001bf7
|
||
8001b8c: 08001ba5 .word 0x08001ba5
|
||
8001b90: 08001bb9 .word 0x08001bb9
|
||
8001b94: 4a7f ldr r2, [pc, #508] ; (8001d94 <HAL_GPIO_Init+0x2cc>)
|
||
8001b96: 4293 cmp r3, r2
|
||
8001b98: d013 beq.n 8001bc2 <HAL_GPIO_Init+0xfa>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
||
break;
|
||
|
||
/* Parameters are checked with assert_param */
|
||
default:
|
||
break;
|
||
8001b9a: e02c b.n 8001bf6 <HAL_GPIO_Init+0x12e>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
|
||
8001b9c: 683b ldr r3, [r7, #0]
|
||
8001b9e: 68db ldr r3, [r3, #12]
|
||
8001ba0: 623b str r3, [r7, #32]
|
||
break;
|
||
8001ba2: e029 b.n 8001bf8 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
|
||
8001ba4: 683b ldr r3, [r7, #0]
|
||
8001ba6: 68db ldr r3, [r3, #12]
|
||
8001ba8: 3304 adds r3, #4
|
||
8001baa: 623b str r3, [r7, #32]
|
||
break;
|
||
8001bac: e024 b.n 8001bf8 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
|
||
8001bae: 683b ldr r3, [r7, #0]
|
||
8001bb0: 68db ldr r3, [r3, #12]
|
||
8001bb2: 3308 adds r3, #8
|
||
8001bb4: 623b str r3, [r7, #32]
|
||
break;
|
||
8001bb6: e01f b.n 8001bf8 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
|
||
8001bb8: 683b ldr r3, [r7, #0]
|
||
8001bba: 68db ldr r3, [r3, #12]
|
||
8001bbc: 330c adds r3, #12
|
||
8001bbe: 623b str r3, [r7, #32]
|
||
break;
|
||
8001bc0: e01a b.n 8001bf8 <HAL_GPIO_Init+0x130>
|
||
if (GPIO_Init->Pull == GPIO_NOPULL)
|
||
8001bc2: 683b ldr r3, [r7, #0]
|
||
8001bc4: 689b ldr r3, [r3, #8]
|
||
8001bc6: 2b00 cmp r3, #0
|
||
8001bc8: d102 bne.n 8001bd0 <HAL_GPIO_Init+0x108>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
|
||
8001bca: 2304 movs r3, #4
|
||
8001bcc: 623b str r3, [r7, #32]
|
||
break;
|
||
8001bce: e013 b.n 8001bf8 <HAL_GPIO_Init+0x130>
|
||
else if (GPIO_Init->Pull == GPIO_PULLUP)
|
||
8001bd0: 683b ldr r3, [r7, #0]
|
||
8001bd2: 689b ldr r3, [r3, #8]
|
||
8001bd4: 2b01 cmp r3, #1
|
||
8001bd6: d105 bne.n 8001be4 <HAL_GPIO_Init+0x11c>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
||
8001bd8: 2308 movs r3, #8
|
||
8001bda: 623b str r3, [r7, #32]
|
||
GPIOx->BSRR = ioposition;
|
||
8001bdc: 687b ldr r3, [r7, #4]
|
||
8001bde: 69fa ldr r2, [r7, #28]
|
||
8001be0: 611a str r2, [r3, #16]
|
||
break;
|
||
8001be2: e009 b.n 8001bf8 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
||
8001be4: 2308 movs r3, #8
|
||
8001be6: 623b str r3, [r7, #32]
|
||
GPIOx->BRR = ioposition;
|
||
8001be8: 687b ldr r3, [r7, #4]
|
||
8001bea: 69fa ldr r2, [r7, #28]
|
||
8001bec: 615a str r2, [r3, #20]
|
||
break;
|
||
8001bee: e003 b.n 8001bf8 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
||
8001bf0: 2300 movs r3, #0
|
||
8001bf2: 623b str r3, [r7, #32]
|
||
break;
|
||
8001bf4: e000 b.n 8001bf8 <HAL_GPIO_Init+0x130>
|
||
break;
|
||
8001bf6: bf00 nop
|
||
}
|
||
|
||
/* Check if the current bit belongs to first half or last half of the pin count number
|
||
in order to address CRH or CRL register*/
|
||
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
|
||
8001bf8: 69bb ldr r3, [r7, #24]
|
||
8001bfa: 2bff cmp r3, #255 ; 0xff
|
||
8001bfc: d801 bhi.n 8001c02 <HAL_GPIO_Init+0x13a>
|
||
8001bfe: 687b ldr r3, [r7, #4]
|
||
8001c00: e001 b.n 8001c06 <HAL_GPIO_Init+0x13e>
|
||
8001c02: 687b ldr r3, [r7, #4]
|
||
8001c04: 3304 adds r3, #4
|
||
8001c06: 617b str r3, [r7, #20]
|
||
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
|
||
8001c08: 69bb ldr r3, [r7, #24]
|
||
8001c0a: 2bff cmp r3, #255 ; 0xff
|
||
8001c0c: d802 bhi.n 8001c14 <HAL_GPIO_Init+0x14c>
|
||
8001c0e: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001c10: 009b lsls r3, r3, #2
|
||
8001c12: e002 b.n 8001c1a <HAL_GPIO_Init+0x152>
|
||
8001c14: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001c16: 3b08 subs r3, #8
|
||
8001c18: 009b lsls r3, r3, #2
|
||
8001c1a: 613b str r3, [r7, #16]
|
||
|
||
/* Apply the new configuration of the pin to the register */
|
||
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
|
||
8001c1c: 697b ldr r3, [r7, #20]
|
||
8001c1e: 681a ldr r2, [r3, #0]
|
||
8001c20: 210f movs r1, #15
|
||
8001c22: 693b ldr r3, [r7, #16]
|
||
8001c24: fa01 f303 lsl.w r3, r1, r3
|
||
8001c28: 43db mvns r3, r3
|
||
8001c2a: 401a ands r2, r3
|
||
8001c2c: 6a39 ldr r1, [r7, #32]
|
||
8001c2e: 693b ldr r3, [r7, #16]
|
||
8001c30: fa01 f303 lsl.w r3, r1, r3
|
||
8001c34: 431a orrs r2, r3
|
||
8001c36: 697b ldr r3, [r7, #20]
|
||
8001c38: 601a str r2, [r3, #0]
|
||
|
||
/*--------------------- EXTI Mode Configuration ------------------------*/
|
||
/* Configure the External Interrupt or event for the current IO */
|
||
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
|
||
8001c3a: 683b ldr r3, [r7, #0]
|
||
8001c3c: 685b ldr r3, [r3, #4]
|
||
8001c3e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
8001c42: 2b00 cmp r3, #0
|
||
8001c44: f000 80c1 beq.w 8001dca <HAL_GPIO_Init+0x302>
|
||
{
|
||
/* Enable AFIO Clock */
|
||
__HAL_RCC_AFIO_CLK_ENABLE();
|
||
8001c48: 4b53 ldr r3, [pc, #332] ; (8001d98 <HAL_GPIO_Init+0x2d0>)
|
||
8001c4a: 699b ldr r3, [r3, #24]
|
||
8001c4c: 4a52 ldr r2, [pc, #328] ; (8001d98 <HAL_GPIO_Init+0x2d0>)
|
||
8001c4e: f043 0301 orr.w r3, r3, #1
|
||
8001c52: 6193 str r3, [r2, #24]
|
||
8001c54: 4b50 ldr r3, [pc, #320] ; (8001d98 <HAL_GPIO_Init+0x2d0>)
|
||
8001c56: 699b ldr r3, [r3, #24]
|
||
8001c58: f003 0301 and.w r3, r3, #1
|
||
8001c5c: 60bb str r3, [r7, #8]
|
||
8001c5e: 68bb ldr r3, [r7, #8]
|
||
temp = AFIO->EXTICR[position >> 2u];
|
||
8001c60: 4a4e ldr r2, [pc, #312] ; (8001d9c <HAL_GPIO_Init+0x2d4>)
|
||
8001c62: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001c64: 089b lsrs r3, r3, #2
|
||
8001c66: 3302 adds r3, #2
|
||
8001c68: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
||
8001c6c: 60fb str r3, [r7, #12]
|
||
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
|
||
8001c6e: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001c70: f003 0303 and.w r3, r3, #3
|
||
8001c74: 009b lsls r3, r3, #2
|
||
8001c76: 220f movs r2, #15
|
||
8001c78: fa02 f303 lsl.w r3, r2, r3
|
||
8001c7c: 43db mvns r3, r3
|
||
8001c7e: 68fa ldr r2, [r7, #12]
|
||
8001c80: 4013 ands r3, r2
|
||
8001c82: 60fb str r3, [r7, #12]
|
||
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
|
||
8001c84: 687b ldr r3, [r7, #4]
|
||
8001c86: 4a46 ldr r2, [pc, #280] ; (8001da0 <HAL_GPIO_Init+0x2d8>)
|
||
8001c88: 4293 cmp r3, r2
|
||
8001c8a: d01f beq.n 8001ccc <HAL_GPIO_Init+0x204>
|
||
8001c8c: 687b ldr r3, [r7, #4]
|
||
8001c8e: 4a45 ldr r2, [pc, #276] ; (8001da4 <HAL_GPIO_Init+0x2dc>)
|
||
8001c90: 4293 cmp r3, r2
|
||
8001c92: d019 beq.n 8001cc8 <HAL_GPIO_Init+0x200>
|
||
8001c94: 687b ldr r3, [r7, #4]
|
||
8001c96: 4a44 ldr r2, [pc, #272] ; (8001da8 <HAL_GPIO_Init+0x2e0>)
|
||
8001c98: 4293 cmp r3, r2
|
||
8001c9a: d013 beq.n 8001cc4 <HAL_GPIO_Init+0x1fc>
|
||
8001c9c: 687b ldr r3, [r7, #4]
|
||
8001c9e: 4a43 ldr r2, [pc, #268] ; (8001dac <HAL_GPIO_Init+0x2e4>)
|
||
8001ca0: 4293 cmp r3, r2
|
||
8001ca2: d00d beq.n 8001cc0 <HAL_GPIO_Init+0x1f8>
|
||
8001ca4: 687b ldr r3, [r7, #4]
|
||
8001ca6: 4a42 ldr r2, [pc, #264] ; (8001db0 <HAL_GPIO_Init+0x2e8>)
|
||
8001ca8: 4293 cmp r3, r2
|
||
8001caa: d007 beq.n 8001cbc <HAL_GPIO_Init+0x1f4>
|
||
8001cac: 687b ldr r3, [r7, #4]
|
||
8001cae: 4a41 ldr r2, [pc, #260] ; (8001db4 <HAL_GPIO_Init+0x2ec>)
|
||
8001cb0: 4293 cmp r3, r2
|
||
8001cb2: d101 bne.n 8001cb8 <HAL_GPIO_Init+0x1f0>
|
||
8001cb4: 2305 movs r3, #5
|
||
8001cb6: e00a b.n 8001cce <HAL_GPIO_Init+0x206>
|
||
8001cb8: 2306 movs r3, #6
|
||
8001cba: e008 b.n 8001cce <HAL_GPIO_Init+0x206>
|
||
8001cbc: 2304 movs r3, #4
|
||
8001cbe: e006 b.n 8001cce <HAL_GPIO_Init+0x206>
|
||
8001cc0: 2303 movs r3, #3
|
||
8001cc2: e004 b.n 8001cce <HAL_GPIO_Init+0x206>
|
||
8001cc4: 2302 movs r3, #2
|
||
8001cc6: e002 b.n 8001cce <HAL_GPIO_Init+0x206>
|
||
8001cc8: 2301 movs r3, #1
|
||
8001cca: e000 b.n 8001cce <HAL_GPIO_Init+0x206>
|
||
8001ccc: 2300 movs r3, #0
|
||
8001cce: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8001cd0: f002 0203 and.w r2, r2, #3
|
||
8001cd4: 0092 lsls r2, r2, #2
|
||
8001cd6: 4093 lsls r3, r2
|
||
8001cd8: 68fa ldr r2, [r7, #12]
|
||
8001cda: 4313 orrs r3, r2
|
||
8001cdc: 60fb str r3, [r7, #12]
|
||
AFIO->EXTICR[position >> 2u] = temp;
|
||
8001cde: 492f ldr r1, [pc, #188] ; (8001d9c <HAL_GPIO_Init+0x2d4>)
|
||
8001ce0: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001ce2: 089b lsrs r3, r3, #2
|
||
8001ce4: 3302 adds r3, #2
|
||
8001ce6: 68fa ldr r2, [r7, #12]
|
||
8001ce8: f841 2023 str.w r2, [r1, r3, lsl #2]
|
||
|
||
|
||
/* Configure the interrupt mask */
|
||
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
|
||
8001cec: 683b ldr r3, [r7, #0]
|
||
8001cee: 685b ldr r3, [r3, #4]
|
||
8001cf0: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8001cf4: 2b00 cmp r3, #0
|
||
8001cf6: d006 beq.n 8001d06 <HAL_GPIO_Init+0x23e>
|
||
{
|
||
SET_BIT(EXTI->IMR, iocurrent);
|
||
8001cf8: 4b2f ldr r3, [pc, #188] ; (8001db8 <HAL_GPIO_Init+0x2f0>)
|
||
8001cfa: 681a ldr r2, [r3, #0]
|
||
8001cfc: 492e ldr r1, [pc, #184] ; (8001db8 <HAL_GPIO_Init+0x2f0>)
|
||
8001cfe: 69bb ldr r3, [r7, #24]
|
||
8001d00: 4313 orrs r3, r2
|
||
8001d02: 600b str r3, [r1, #0]
|
||
8001d04: e006 b.n 8001d14 <HAL_GPIO_Init+0x24c>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->IMR, iocurrent);
|
||
8001d06: 4b2c ldr r3, [pc, #176] ; (8001db8 <HAL_GPIO_Init+0x2f0>)
|
||
8001d08: 681a ldr r2, [r3, #0]
|
||
8001d0a: 69bb ldr r3, [r7, #24]
|
||
8001d0c: 43db mvns r3, r3
|
||
8001d0e: 492a ldr r1, [pc, #168] ; (8001db8 <HAL_GPIO_Init+0x2f0>)
|
||
8001d10: 4013 ands r3, r2
|
||
8001d12: 600b str r3, [r1, #0]
|
||
}
|
||
|
||
/* Configure the event mask */
|
||
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
|
||
8001d14: 683b ldr r3, [r7, #0]
|
||
8001d16: 685b ldr r3, [r3, #4]
|
||
8001d18: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8001d1c: 2b00 cmp r3, #0
|
||
8001d1e: d006 beq.n 8001d2e <HAL_GPIO_Init+0x266>
|
||
{
|
||
SET_BIT(EXTI->EMR, iocurrent);
|
||
8001d20: 4b25 ldr r3, [pc, #148] ; (8001db8 <HAL_GPIO_Init+0x2f0>)
|
||
8001d22: 685a ldr r2, [r3, #4]
|
||
8001d24: 4924 ldr r1, [pc, #144] ; (8001db8 <HAL_GPIO_Init+0x2f0>)
|
||
8001d26: 69bb ldr r3, [r7, #24]
|
||
8001d28: 4313 orrs r3, r2
|
||
8001d2a: 604b str r3, [r1, #4]
|
||
8001d2c: e006 b.n 8001d3c <HAL_GPIO_Init+0x274>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->EMR, iocurrent);
|
||
8001d2e: 4b22 ldr r3, [pc, #136] ; (8001db8 <HAL_GPIO_Init+0x2f0>)
|
||
8001d30: 685a ldr r2, [r3, #4]
|
||
8001d32: 69bb ldr r3, [r7, #24]
|
||
8001d34: 43db mvns r3, r3
|
||
8001d36: 4920 ldr r1, [pc, #128] ; (8001db8 <HAL_GPIO_Init+0x2f0>)
|
||
8001d38: 4013 ands r3, r2
|
||
8001d3a: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Enable or disable the rising trigger */
|
||
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
|
||
8001d3c: 683b ldr r3, [r7, #0]
|
||
8001d3e: 685b ldr r3, [r3, #4]
|
||
8001d40: f403 1380 and.w r3, r3, #1048576 ; 0x100000
|
||
8001d44: 2b00 cmp r3, #0
|
||
8001d46: d006 beq.n 8001d56 <HAL_GPIO_Init+0x28e>
|
||
{
|
||
SET_BIT(EXTI->RTSR, iocurrent);
|
||
8001d48: 4b1b ldr r3, [pc, #108] ; (8001db8 <HAL_GPIO_Init+0x2f0>)
|
||
8001d4a: 689a ldr r2, [r3, #8]
|
||
8001d4c: 491a ldr r1, [pc, #104] ; (8001db8 <HAL_GPIO_Init+0x2f0>)
|
||
8001d4e: 69bb ldr r3, [r7, #24]
|
||
8001d50: 4313 orrs r3, r2
|
||
8001d52: 608b str r3, [r1, #8]
|
||
8001d54: e006 b.n 8001d64 <HAL_GPIO_Init+0x29c>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->RTSR, iocurrent);
|
||
8001d56: 4b18 ldr r3, [pc, #96] ; (8001db8 <HAL_GPIO_Init+0x2f0>)
|
||
8001d58: 689a ldr r2, [r3, #8]
|
||
8001d5a: 69bb ldr r3, [r7, #24]
|
||
8001d5c: 43db mvns r3, r3
|
||
8001d5e: 4916 ldr r1, [pc, #88] ; (8001db8 <HAL_GPIO_Init+0x2f0>)
|
||
8001d60: 4013 ands r3, r2
|
||
8001d62: 608b str r3, [r1, #8]
|
||
}
|
||
|
||
/* Enable or disable the falling trigger */
|
||
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
|
||
8001d64: 683b ldr r3, [r7, #0]
|
||
8001d66: 685b ldr r3, [r3, #4]
|
||
8001d68: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
||
8001d6c: 2b00 cmp r3, #0
|
||
8001d6e: d025 beq.n 8001dbc <HAL_GPIO_Init+0x2f4>
|
||
{
|
||
SET_BIT(EXTI->FTSR, iocurrent);
|
||
8001d70: 4b11 ldr r3, [pc, #68] ; (8001db8 <HAL_GPIO_Init+0x2f0>)
|
||
8001d72: 68da ldr r2, [r3, #12]
|
||
8001d74: 4910 ldr r1, [pc, #64] ; (8001db8 <HAL_GPIO_Init+0x2f0>)
|
||
8001d76: 69bb ldr r3, [r7, #24]
|
||
8001d78: 4313 orrs r3, r2
|
||
8001d7a: 60cb str r3, [r1, #12]
|
||
8001d7c: e025 b.n 8001dca <HAL_GPIO_Init+0x302>
|
||
8001d7e: bf00 nop
|
||
8001d80: 10320000 .word 0x10320000
|
||
8001d84: 10310000 .word 0x10310000
|
||
8001d88: 10220000 .word 0x10220000
|
||
8001d8c: 10210000 .word 0x10210000
|
||
8001d90: 10120000 .word 0x10120000
|
||
8001d94: 10110000 .word 0x10110000
|
||
8001d98: 40021000 .word 0x40021000
|
||
8001d9c: 40010000 .word 0x40010000
|
||
8001da0: 40010800 .word 0x40010800
|
||
8001da4: 40010c00 .word 0x40010c00
|
||
8001da8: 40011000 .word 0x40011000
|
||
8001dac: 40011400 .word 0x40011400
|
||
8001db0: 40011800 .word 0x40011800
|
||
8001db4: 40011c00 .word 0x40011c00
|
||
8001db8: 40010400 .word 0x40010400
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->FTSR, iocurrent);
|
||
8001dbc: 4b0b ldr r3, [pc, #44] ; (8001dec <HAL_GPIO_Init+0x324>)
|
||
8001dbe: 68da ldr r2, [r3, #12]
|
||
8001dc0: 69bb ldr r3, [r7, #24]
|
||
8001dc2: 43db mvns r3, r3
|
||
8001dc4: 4909 ldr r1, [pc, #36] ; (8001dec <HAL_GPIO_Init+0x324>)
|
||
8001dc6: 4013 ands r3, r2
|
||
8001dc8: 60cb str r3, [r1, #12]
|
||
}
|
||
}
|
||
}
|
||
|
||
position++;
|
||
8001dca: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001dcc: 3301 adds r3, #1
|
||
8001dce: 627b str r3, [r7, #36] ; 0x24
|
||
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
||
8001dd0: 683b ldr r3, [r7, #0]
|
||
8001dd2: 681a ldr r2, [r3, #0]
|
||
8001dd4: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001dd6: fa22 f303 lsr.w r3, r2, r3
|
||
8001dda: 2b00 cmp r3, #0
|
||
8001ddc: f47f ae7e bne.w 8001adc <HAL_GPIO_Init+0x14>
|
||
}
|
||
}
|
||
8001de0: bf00 nop
|
||
8001de2: bf00 nop
|
||
8001de4: 372c adds r7, #44 ; 0x2c
|
||
8001de6: 46bd mov sp, r7
|
||
8001de8: bc80 pop {r7}
|
||
8001dea: 4770 bx lr
|
||
8001dec: 40010400 .word 0x40010400
|
||
|
||
08001df0 <HAL_GPIO_ReadPin>:
|
||
* @param GPIO_Pin: specifies the port bit to read.
|
||
* This parameter can be GPIO_PIN_x where x can be (0..15).
|
||
* @retval The input port pin value.
|
||
*/
|
||
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
|
||
{
|
||
8001df0: b480 push {r7}
|
||
8001df2: b085 sub sp, #20
|
||
8001df4: af00 add r7, sp, #0
|
||
8001df6: 6078 str r0, [r7, #4]
|
||
8001df8: 460b mov r3, r1
|
||
8001dfa: 807b strh r3, [r7, #2]
|
||
GPIO_PinState bitstatus;
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||
|
||
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
|
||
8001dfc: 687b ldr r3, [r7, #4]
|
||
8001dfe: 689a ldr r2, [r3, #8]
|
||
8001e00: 887b ldrh r3, [r7, #2]
|
||
8001e02: 4013 ands r3, r2
|
||
8001e04: 2b00 cmp r3, #0
|
||
8001e06: d002 beq.n 8001e0e <HAL_GPIO_ReadPin+0x1e>
|
||
{
|
||
bitstatus = GPIO_PIN_SET;
|
||
8001e08: 2301 movs r3, #1
|
||
8001e0a: 73fb strb r3, [r7, #15]
|
||
8001e0c: e001 b.n 8001e12 <HAL_GPIO_ReadPin+0x22>
|
||
}
|
||
else
|
||
{
|
||
bitstatus = GPIO_PIN_RESET;
|
||
8001e0e: 2300 movs r3, #0
|
||
8001e10: 73fb strb r3, [r7, #15]
|
||
}
|
||
return bitstatus;
|
||
8001e12: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
8001e14: 4618 mov r0, r3
|
||
8001e16: 3714 adds r7, #20
|
||
8001e18: 46bd mov sp, r7
|
||
8001e1a: bc80 pop {r7}
|
||
8001e1c: 4770 bx lr
|
||
|
||
08001e1e <HAL_GPIO_WritePin>:
|
||
* @arg GPIO_PIN_RESET: to clear the port pin
|
||
* @arg GPIO_PIN_SET: to set the port pin
|
||
* @retval None
|
||
*/
|
||
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
|
||
{
|
||
8001e1e: b480 push {r7}
|
||
8001e20: b083 sub sp, #12
|
||
8001e22: af00 add r7, sp, #0
|
||
8001e24: 6078 str r0, [r7, #4]
|
||
8001e26: 460b mov r3, r1
|
||
8001e28: 807b strh r3, [r7, #2]
|
||
8001e2a: 4613 mov r3, r2
|
||
8001e2c: 707b strb r3, [r7, #1]
|
||
/* Check the parameters */
|
||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||
assert_param(IS_GPIO_PIN_ACTION(PinState));
|
||
|
||
if (PinState != GPIO_PIN_RESET)
|
||
8001e2e: 787b ldrb r3, [r7, #1]
|
||
8001e30: 2b00 cmp r3, #0
|
||
8001e32: d003 beq.n 8001e3c <HAL_GPIO_WritePin+0x1e>
|
||
{
|
||
GPIOx->BSRR = GPIO_Pin;
|
||
8001e34: 887a ldrh r2, [r7, #2]
|
||
8001e36: 687b ldr r3, [r7, #4]
|
||
8001e38: 611a str r2, [r3, #16]
|
||
}
|
||
else
|
||
{
|
||
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
||
}
|
||
}
|
||
8001e3a: e003 b.n 8001e44 <HAL_GPIO_WritePin+0x26>
|
||
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
||
8001e3c: 887b ldrh r3, [r7, #2]
|
||
8001e3e: 041a lsls r2, r3, #16
|
||
8001e40: 687b ldr r3, [r7, #4]
|
||
8001e42: 611a str r2, [r3, #16]
|
||
}
|
||
8001e44: bf00 nop
|
||
8001e46: 370c adds r7, #12
|
||
8001e48: 46bd mov sp, r7
|
||
8001e4a: bc80 pop {r7}
|
||
8001e4c: 4770 bx lr
|
||
...
|
||
|
||
08001e50 <HAL_I2C_Init>:
|
||
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
||
* the configuration information for the specified I2C.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
|
||
{
|
||
8001e50: b580 push {r7, lr}
|
||
8001e52: b084 sub sp, #16
|
||
8001e54: af00 add r7, sp, #0
|
||
8001e56: 6078 str r0, [r7, #4]
|
||
uint32_t freqrange;
|
||
uint32_t pclk1;
|
||
|
||
/* Check the I2C handle allocation */
|
||
if (hi2c == NULL)
|
||
8001e58: 687b ldr r3, [r7, #4]
|
||
8001e5a: 2b00 cmp r3, #0
|
||
8001e5c: d101 bne.n 8001e62 <HAL_I2C_Init+0x12>
|
||
{
|
||
return HAL_ERROR;
|
||
8001e5e: 2301 movs r3, #1
|
||
8001e60: e12b b.n 80020ba <HAL_I2C_Init+0x26a>
|
||
assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
|
||
assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
|
||
assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
|
||
assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
|
||
|
||
if (hi2c->State == HAL_I2C_STATE_RESET)
|
||
8001e62: 687b ldr r3, [r7, #4]
|
||
8001e64: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
||
8001e68: b2db uxtb r3, r3
|
||
8001e6a: 2b00 cmp r3, #0
|
||
8001e6c: d106 bne.n 8001e7c <HAL_I2C_Init+0x2c>
|
||
{
|
||
/* Allocate lock resource and initialize it */
|
||
hi2c->Lock = HAL_UNLOCKED;
|
||
8001e6e: 687b ldr r3, [r7, #4]
|
||
8001e70: 2200 movs r2, #0
|
||
8001e72: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
/* Init the low level hardware : GPIO, CLOCK, NVIC */
|
||
hi2c->MspInitCallback(hi2c);
|
||
#else
|
||
/* Init the low level hardware : GPIO, CLOCK, NVIC */
|
||
HAL_I2C_MspInit(hi2c);
|
||
8001e76: 6878 ldr r0, [r7, #4]
|
||
8001e78: f7ff fb0a bl 8001490 <HAL_I2C_MspInit>
|
||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||
}
|
||
|
||
hi2c->State = HAL_I2C_STATE_BUSY;
|
||
8001e7c: 687b ldr r3, [r7, #4]
|
||
8001e7e: 2224 movs r2, #36 ; 0x24
|
||
8001e80: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
|
||
/* Disable the selected I2C peripheral */
|
||
__HAL_I2C_DISABLE(hi2c);
|
||
8001e84: 687b ldr r3, [r7, #4]
|
||
8001e86: 681b ldr r3, [r3, #0]
|
||
8001e88: 681a ldr r2, [r3, #0]
|
||
8001e8a: 687b ldr r3, [r7, #4]
|
||
8001e8c: 681b ldr r3, [r3, #0]
|
||
8001e8e: f022 0201 bic.w r2, r2, #1
|
||
8001e92: 601a str r2, [r3, #0]
|
||
|
||
/*Reset I2C*/
|
||
hi2c->Instance->CR1 |= I2C_CR1_SWRST;
|
||
8001e94: 687b ldr r3, [r7, #4]
|
||
8001e96: 681b ldr r3, [r3, #0]
|
||
8001e98: 681a ldr r2, [r3, #0]
|
||
8001e9a: 687b ldr r3, [r7, #4]
|
||
8001e9c: 681b ldr r3, [r3, #0]
|
||
8001e9e: f442 4200 orr.w r2, r2, #32768 ; 0x8000
|
||
8001ea2: 601a str r2, [r3, #0]
|
||
hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
|
||
8001ea4: 687b ldr r3, [r7, #4]
|
||
8001ea6: 681b ldr r3, [r3, #0]
|
||
8001ea8: 681a ldr r2, [r3, #0]
|
||
8001eaa: 687b ldr r3, [r7, #4]
|
||
8001eac: 681b ldr r3, [r3, #0]
|
||
8001eae: f422 4200 bic.w r2, r2, #32768 ; 0x8000
|
||
8001eb2: 601a str r2, [r3, #0]
|
||
|
||
/* Get PCLK1 frequency */
|
||
pclk1 = HAL_RCC_GetPCLK1Freq();
|
||
8001eb4: f001 fba0 bl 80035f8 <HAL_RCC_GetPCLK1Freq>
|
||
8001eb8: 60f8 str r0, [r7, #12]
|
||
|
||
/* Check the minimum allowed PCLK1 frequency */
|
||
if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
|
||
8001eba: 687b ldr r3, [r7, #4]
|
||
8001ebc: 685b ldr r3, [r3, #4]
|
||
8001ebe: 4a81 ldr r2, [pc, #516] ; (80020c4 <HAL_I2C_Init+0x274>)
|
||
8001ec0: 4293 cmp r3, r2
|
||
8001ec2: d807 bhi.n 8001ed4 <HAL_I2C_Init+0x84>
|
||
8001ec4: 68fb ldr r3, [r7, #12]
|
||
8001ec6: 4a80 ldr r2, [pc, #512] ; (80020c8 <HAL_I2C_Init+0x278>)
|
||
8001ec8: 4293 cmp r3, r2
|
||
8001eca: bf94 ite ls
|
||
8001ecc: 2301 movls r3, #1
|
||
8001ece: 2300 movhi r3, #0
|
||
8001ed0: b2db uxtb r3, r3
|
||
8001ed2: e006 b.n 8001ee2 <HAL_I2C_Init+0x92>
|
||
8001ed4: 68fb ldr r3, [r7, #12]
|
||
8001ed6: 4a7d ldr r2, [pc, #500] ; (80020cc <HAL_I2C_Init+0x27c>)
|
||
8001ed8: 4293 cmp r3, r2
|
||
8001eda: bf94 ite ls
|
||
8001edc: 2301 movls r3, #1
|
||
8001ede: 2300 movhi r3, #0
|
||
8001ee0: b2db uxtb r3, r3
|
||
8001ee2: 2b00 cmp r3, #0
|
||
8001ee4: d001 beq.n 8001eea <HAL_I2C_Init+0x9a>
|
||
{
|
||
return HAL_ERROR;
|
||
8001ee6: 2301 movs r3, #1
|
||
8001ee8: e0e7 b.n 80020ba <HAL_I2C_Init+0x26a>
|
||
}
|
||
|
||
/* Calculate frequency range */
|
||
freqrange = I2C_FREQRANGE(pclk1);
|
||
8001eea: 68fb ldr r3, [r7, #12]
|
||
8001eec: 4a78 ldr r2, [pc, #480] ; (80020d0 <HAL_I2C_Init+0x280>)
|
||
8001eee: fba2 2303 umull r2, r3, r2, r3
|
||
8001ef2: 0c9b lsrs r3, r3, #18
|
||
8001ef4: 60bb str r3, [r7, #8]
|
||
|
||
/*---------------------------- I2Cx CR2 Configuration ----------------------*/
|
||
/* Configure I2Cx: Frequency range */
|
||
MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
|
||
8001ef6: 687b ldr r3, [r7, #4]
|
||
8001ef8: 681b ldr r3, [r3, #0]
|
||
8001efa: 685b ldr r3, [r3, #4]
|
||
8001efc: f023 013f bic.w r1, r3, #63 ; 0x3f
|
||
8001f00: 687b ldr r3, [r7, #4]
|
||
8001f02: 681b ldr r3, [r3, #0]
|
||
8001f04: 68ba ldr r2, [r7, #8]
|
||
8001f06: 430a orrs r2, r1
|
||
8001f08: 605a str r2, [r3, #4]
|
||
|
||
/*---------------------------- I2Cx TRISE Configuration --------------------*/
|
||
/* Configure I2Cx: Rise Time */
|
||
MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
|
||
8001f0a: 687b ldr r3, [r7, #4]
|
||
8001f0c: 681b ldr r3, [r3, #0]
|
||
8001f0e: 6a1b ldr r3, [r3, #32]
|
||
8001f10: f023 013f bic.w r1, r3, #63 ; 0x3f
|
||
8001f14: 687b ldr r3, [r7, #4]
|
||
8001f16: 685b ldr r3, [r3, #4]
|
||
8001f18: 4a6a ldr r2, [pc, #424] ; (80020c4 <HAL_I2C_Init+0x274>)
|
||
8001f1a: 4293 cmp r3, r2
|
||
8001f1c: d802 bhi.n 8001f24 <HAL_I2C_Init+0xd4>
|
||
8001f1e: 68bb ldr r3, [r7, #8]
|
||
8001f20: 3301 adds r3, #1
|
||
8001f22: e009 b.n 8001f38 <HAL_I2C_Init+0xe8>
|
||
8001f24: 68bb ldr r3, [r7, #8]
|
||
8001f26: f44f 7296 mov.w r2, #300 ; 0x12c
|
||
8001f2a: fb02 f303 mul.w r3, r2, r3
|
||
8001f2e: 4a69 ldr r2, [pc, #420] ; (80020d4 <HAL_I2C_Init+0x284>)
|
||
8001f30: fba2 2303 umull r2, r3, r2, r3
|
||
8001f34: 099b lsrs r3, r3, #6
|
||
8001f36: 3301 adds r3, #1
|
||
8001f38: 687a ldr r2, [r7, #4]
|
||
8001f3a: 6812 ldr r2, [r2, #0]
|
||
8001f3c: 430b orrs r3, r1
|
||
8001f3e: 6213 str r3, [r2, #32]
|
||
|
||
/*---------------------------- I2Cx CCR Configuration ----------------------*/
|
||
/* Configure I2Cx: Speed */
|
||
MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
|
||
8001f40: 687b ldr r3, [r7, #4]
|
||
8001f42: 681b ldr r3, [r3, #0]
|
||
8001f44: 69db ldr r3, [r3, #28]
|
||
8001f46: f423 424f bic.w r2, r3, #52992 ; 0xcf00
|
||
8001f4a: f022 02ff bic.w r2, r2, #255 ; 0xff
|
||
8001f4e: 687b ldr r3, [r7, #4]
|
||
8001f50: 685b ldr r3, [r3, #4]
|
||
8001f52: 495c ldr r1, [pc, #368] ; (80020c4 <HAL_I2C_Init+0x274>)
|
||
8001f54: 428b cmp r3, r1
|
||
8001f56: d819 bhi.n 8001f8c <HAL_I2C_Init+0x13c>
|
||
8001f58: 68fb ldr r3, [r7, #12]
|
||
8001f5a: 1e59 subs r1, r3, #1
|
||
8001f5c: 687b ldr r3, [r7, #4]
|
||
8001f5e: 685b ldr r3, [r3, #4]
|
||
8001f60: 005b lsls r3, r3, #1
|
||
8001f62: fbb1 f3f3 udiv r3, r1, r3
|
||
8001f66: 1c59 adds r1, r3, #1
|
||
8001f68: f640 73fc movw r3, #4092 ; 0xffc
|
||
8001f6c: 400b ands r3, r1
|
||
8001f6e: 2b00 cmp r3, #0
|
||
8001f70: d00a beq.n 8001f88 <HAL_I2C_Init+0x138>
|
||
8001f72: 68fb ldr r3, [r7, #12]
|
||
8001f74: 1e59 subs r1, r3, #1
|
||
8001f76: 687b ldr r3, [r7, #4]
|
||
8001f78: 685b ldr r3, [r3, #4]
|
||
8001f7a: 005b lsls r3, r3, #1
|
||
8001f7c: fbb1 f3f3 udiv r3, r1, r3
|
||
8001f80: 3301 adds r3, #1
|
||
8001f82: f3c3 030b ubfx r3, r3, #0, #12
|
||
8001f86: e051 b.n 800202c <HAL_I2C_Init+0x1dc>
|
||
8001f88: 2304 movs r3, #4
|
||
8001f8a: e04f b.n 800202c <HAL_I2C_Init+0x1dc>
|
||
8001f8c: 687b ldr r3, [r7, #4]
|
||
8001f8e: 689b ldr r3, [r3, #8]
|
||
8001f90: 2b00 cmp r3, #0
|
||
8001f92: d111 bne.n 8001fb8 <HAL_I2C_Init+0x168>
|
||
8001f94: 68fb ldr r3, [r7, #12]
|
||
8001f96: 1e58 subs r0, r3, #1
|
||
8001f98: 687b ldr r3, [r7, #4]
|
||
8001f9a: 6859 ldr r1, [r3, #4]
|
||
8001f9c: 460b mov r3, r1
|
||
8001f9e: 005b lsls r3, r3, #1
|
||
8001fa0: 440b add r3, r1
|
||
8001fa2: fbb0 f3f3 udiv r3, r0, r3
|
||
8001fa6: 3301 adds r3, #1
|
||
8001fa8: f3c3 030b ubfx r3, r3, #0, #12
|
||
8001fac: 2b00 cmp r3, #0
|
||
8001fae: bf0c ite eq
|
||
8001fb0: 2301 moveq r3, #1
|
||
8001fb2: 2300 movne r3, #0
|
||
8001fb4: b2db uxtb r3, r3
|
||
8001fb6: e012 b.n 8001fde <HAL_I2C_Init+0x18e>
|
||
8001fb8: 68fb ldr r3, [r7, #12]
|
||
8001fba: 1e58 subs r0, r3, #1
|
||
8001fbc: 687b ldr r3, [r7, #4]
|
||
8001fbe: 6859 ldr r1, [r3, #4]
|
||
8001fc0: 460b mov r3, r1
|
||
8001fc2: 009b lsls r3, r3, #2
|
||
8001fc4: 440b add r3, r1
|
||
8001fc6: 0099 lsls r1, r3, #2
|
||
8001fc8: 440b add r3, r1
|
||
8001fca: fbb0 f3f3 udiv r3, r0, r3
|
||
8001fce: 3301 adds r3, #1
|
||
8001fd0: f3c3 030b ubfx r3, r3, #0, #12
|
||
8001fd4: 2b00 cmp r3, #0
|
||
8001fd6: bf0c ite eq
|
||
8001fd8: 2301 moveq r3, #1
|
||
8001fda: 2300 movne r3, #0
|
||
8001fdc: b2db uxtb r3, r3
|
||
8001fde: 2b00 cmp r3, #0
|
||
8001fe0: d001 beq.n 8001fe6 <HAL_I2C_Init+0x196>
|
||
8001fe2: 2301 movs r3, #1
|
||
8001fe4: e022 b.n 800202c <HAL_I2C_Init+0x1dc>
|
||
8001fe6: 687b ldr r3, [r7, #4]
|
||
8001fe8: 689b ldr r3, [r3, #8]
|
||
8001fea: 2b00 cmp r3, #0
|
||
8001fec: d10e bne.n 800200c <HAL_I2C_Init+0x1bc>
|
||
8001fee: 68fb ldr r3, [r7, #12]
|
||
8001ff0: 1e58 subs r0, r3, #1
|
||
8001ff2: 687b ldr r3, [r7, #4]
|
||
8001ff4: 6859 ldr r1, [r3, #4]
|
||
8001ff6: 460b mov r3, r1
|
||
8001ff8: 005b lsls r3, r3, #1
|
||
8001ffa: 440b add r3, r1
|
||
8001ffc: fbb0 f3f3 udiv r3, r0, r3
|
||
8002000: 3301 adds r3, #1
|
||
8002002: f3c3 030b ubfx r3, r3, #0, #12
|
||
8002006: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
||
800200a: e00f b.n 800202c <HAL_I2C_Init+0x1dc>
|
||
800200c: 68fb ldr r3, [r7, #12]
|
||
800200e: 1e58 subs r0, r3, #1
|
||
8002010: 687b ldr r3, [r7, #4]
|
||
8002012: 6859 ldr r1, [r3, #4]
|
||
8002014: 460b mov r3, r1
|
||
8002016: 009b lsls r3, r3, #2
|
||
8002018: 440b add r3, r1
|
||
800201a: 0099 lsls r1, r3, #2
|
||
800201c: 440b add r3, r1
|
||
800201e: fbb0 f3f3 udiv r3, r0, r3
|
||
8002022: 3301 adds r3, #1
|
||
8002024: f3c3 030b ubfx r3, r3, #0, #12
|
||
8002028: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
||
800202c: 6879 ldr r1, [r7, #4]
|
||
800202e: 6809 ldr r1, [r1, #0]
|
||
8002030: 4313 orrs r3, r2
|
||
8002032: 61cb str r3, [r1, #28]
|
||
|
||
/*---------------------------- I2Cx CR1 Configuration ----------------------*/
|
||
/* Configure I2Cx: Generalcall and NoStretch mode */
|
||
MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
|
||
8002034: 687b ldr r3, [r7, #4]
|
||
8002036: 681b ldr r3, [r3, #0]
|
||
8002038: 681b ldr r3, [r3, #0]
|
||
800203a: f023 01c0 bic.w r1, r3, #192 ; 0xc0
|
||
800203e: 687b ldr r3, [r7, #4]
|
||
8002040: 69da ldr r2, [r3, #28]
|
||
8002042: 687b ldr r3, [r7, #4]
|
||
8002044: 6a1b ldr r3, [r3, #32]
|
||
8002046: 431a orrs r2, r3
|
||
8002048: 687b ldr r3, [r7, #4]
|
||
800204a: 681b ldr r3, [r3, #0]
|
||
800204c: 430a orrs r2, r1
|
||
800204e: 601a str r2, [r3, #0]
|
||
|
||
/*---------------------------- I2Cx OAR1 Configuration ---------------------*/
|
||
/* Configure I2Cx: Own Address1 and addressing mode */
|
||
MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
|
||
8002050: 687b ldr r3, [r7, #4]
|
||
8002052: 681b ldr r3, [r3, #0]
|
||
8002054: 689b ldr r3, [r3, #8]
|
||
8002056: f423 4303 bic.w r3, r3, #33536 ; 0x8300
|
||
800205a: f023 03ff bic.w r3, r3, #255 ; 0xff
|
||
800205e: 687a ldr r2, [r7, #4]
|
||
8002060: 6911 ldr r1, [r2, #16]
|
||
8002062: 687a ldr r2, [r7, #4]
|
||
8002064: 68d2 ldr r2, [r2, #12]
|
||
8002066: 4311 orrs r1, r2
|
||
8002068: 687a ldr r2, [r7, #4]
|
||
800206a: 6812 ldr r2, [r2, #0]
|
||
800206c: 430b orrs r3, r1
|
||
800206e: 6093 str r3, [r2, #8]
|
||
|
||
/*---------------------------- I2Cx OAR2 Configuration ---------------------*/
|
||
/* Configure I2Cx: Dual mode and Own Address2 */
|
||
MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
|
||
8002070: 687b ldr r3, [r7, #4]
|
||
8002072: 681b ldr r3, [r3, #0]
|
||
8002074: 68db ldr r3, [r3, #12]
|
||
8002076: f023 01ff bic.w r1, r3, #255 ; 0xff
|
||
800207a: 687b ldr r3, [r7, #4]
|
||
800207c: 695a ldr r2, [r3, #20]
|
||
800207e: 687b ldr r3, [r7, #4]
|
||
8002080: 699b ldr r3, [r3, #24]
|
||
8002082: 431a orrs r2, r3
|
||
8002084: 687b ldr r3, [r7, #4]
|
||
8002086: 681b ldr r3, [r3, #0]
|
||
8002088: 430a orrs r2, r1
|
||
800208a: 60da str r2, [r3, #12]
|
||
|
||
/* Enable the selected I2C peripheral */
|
||
__HAL_I2C_ENABLE(hi2c);
|
||
800208c: 687b ldr r3, [r7, #4]
|
||
800208e: 681b ldr r3, [r3, #0]
|
||
8002090: 681a ldr r2, [r3, #0]
|
||
8002092: 687b ldr r3, [r7, #4]
|
||
8002094: 681b ldr r3, [r3, #0]
|
||
8002096: f042 0201 orr.w r2, r2, #1
|
||
800209a: 601a str r2, [r3, #0]
|
||
|
||
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
||
800209c: 687b ldr r3, [r7, #4]
|
||
800209e: 2200 movs r2, #0
|
||
80020a0: 641a str r2, [r3, #64] ; 0x40
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
80020a2: 687b ldr r3, [r7, #4]
|
||
80020a4: 2220 movs r2, #32
|
||
80020a6: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
80020aa: 687b ldr r3, [r7, #4]
|
||
80020ac: 2200 movs r2, #0
|
||
80020ae: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
80020b0: 687b ldr r3, [r7, #4]
|
||
80020b2: 2200 movs r2, #0
|
||
80020b4: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
|
||
return HAL_OK;
|
||
80020b8: 2300 movs r3, #0
|
||
}
|
||
80020ba: 4618 mov r0, r3
|
||
80020bc: 3710 adds r7, #16
|
||
80020be: 46bd mov sp, r7
|
||
80020c0: bd80 pop {r7, pc}
|
||
80020c2: bf00 nop
|
||
80020c4: 000186a0 .word 0x000186a0
|
||
80020c8: 001e847f .word 0x001e847f
|
||
80020cc: 003d08ff .word 0x003d08ff
|
||
80020d0: 431bde83 .word 0x431bde83
|
||
80020d4: 10624dd3 .word 0x10624dd3
|
||
|
||
080020d8 <HAL_I2C_Mem_Write>:
|
||
* @param Size Amount of data to be sent
|
||
* @param Timeout Timeout duration
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
||
{
|
||
80020d8: b580 push {r7, lr}
|
||
80020da: b088 sub sp, #32
|
||
80020dc: af02 add r7, sp, #8
|
||
80020de: 60f8 str r0, [r7, #12]
|
||
80020e0: 4608 mov r0, r1
|
||
80020e2: 4611 mov r1, r2
|
||
80020e4: 461a mov r2, r3
|
||
80020e6: 4603 mov r3, r0
|
||
80020e8: 817b strh r3, [r7, #10]
|
||
80020ea: 460b mov r3, r1
|
||
80020ec: 813b strh r3, [r7, #8]
|
||
80020ee: 4613 mov r3, r2
|
||
80020f0: 80fb strh r3, [r7, #6]
|
||
/* Init tickstart for timeout management*/
|
||
uint32_t tickstart = HAL_GetTick();
|
||
80020f2: f7ff fbd7 bl 80018a4 <HAL_GetTick>
|
||
80020f6: 6178 str r0, [r7, #20]
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
|
||
|
||
if (hi2c->State == HAL_I2C_STATE_READY)
|
||
80020f8: 68fb ldr r3, [r7, #12]
|
||
80020fa: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
||
80020fe: b2db uxtb r3, r3
|
||
8002100: 2b20 cmp r3, #32
|
||
8002102: f040 80d9 bne.w 80022b8 <HAL_I2C_Mem_Write+0x1e0>
|
||
{
|
||
/* Wait until BUSY flag is reset */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
|
||
8002106: 697b ldr r3, [r7, #20]
|
||
8002108: 9300 str r3, [sp, #0]
|
||
800210a: 2319 movs r3, #25
|
||
800210c: 2201 movs r2, #1
|
||
800210e: 496d ldr r1, [pc, #436] ; (80022c4 <HAL_I2C_Mem_Write+0x1ec>)
|
||
8002110: 68f8 ldr r0, [r7, #12]
|
||
8002112: f000 fcc1 bl 8002a98 <I2C_WaitOnFlagUntilTimeout>
|
||
8002116: 4603 mov r3, r0
|
||
8002118: 2b00 cmp r3, #0
|
||
800211a: d001 beq.n 8002120 <HAL_I2C_Mem_Write+0x48>
|
||
{
|
||
return HAL_BUSY;
|
||
800211c: 2302 movs r3, #2
|
||
800211e: e0cc b.n 80022ba <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
|
||
/* Process Locked */
|
||
__HAL_LOCK(hi2c);
|
||
8002120: 68fb ldr r3, [r7, #12]
|
||
8002122: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
|
||
8002126: 2b01 cmp r3, #1
|
||
8002128: d101 bne.n 800212e <HAL_I2C_Mem_Write+0x56>
|
||
800212a: 2302 movs r3, #2
|
||
800212c: e0c5 b.n 80022ba <HAL_I2C_Mem_Write+0x1e2>
|
||
800212e: 68fb ldr r3, [r7, #12]
|
||
8002130: 2201 movs r2, #1
|
||
8002132: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
/* Check if the I2C is already enabled */
|
||
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
|
||
8002136: 68fb ldr r3, [r7, #12]
|
||
8002138: 681b ldr r3, [r3, #0]
|
||
800213a: 681b ldr r3, [r3, #0]
|
||
800213c: f003 0301 and.w r3, r3, #1
|
||
8002140: 2b01 cmp r3, #1
|
||
8002142: d007 beq.n 8002154 <HAL_I2C_Mem_Write+0x7c>
|
||
{
|
||
/* Enable I2C peripheral */
|
||
__HAL_I2C_ENABLE(hi2c);
|
||
8002144: 68fb ldr r3, [r7, #12]
|
||
8002146: 681b ldr r3, [r3, #0]
|
||
8002148: 681a ldr r2, [r3, #0]
|
||
800214a: 68fb ldr r3, [r7, #12]
|
||
800214c: 681b ldr r3, [r3, #0]
|
||
800214e: f042 0201 orr.w r2, r2, #1
|
||
8002152: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Disable Pos */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
||
8002154: 68fb ldr r3, [r7, #12]
|
||
8002156: 681b ldr r3, [r3, #0]
|
||
8002158: 681a ldr r2, [r3, #0]
|
||
800215a: 68fb ldr r3, [r7, #12]
|
||
800215c: 681b ldr r3, [r3, #0]
|
||
800215e: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
||
8002162: 601a str r2, [r3, #0]
|
||
|
||
hi2c->State = HAL_I2C_STATE_BUSY_TX;
|
||
8002164: 68fb ldr r3, [r7, #12]
|
||
8002166: 2221 movs r2, #33 ; 0x21
|
||
8002168: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_MEM;
|
||
800216c: 68fb ldr r3, [r7, #12]
|
||
800216e: 2240 movs r2, #64 ; 0x40
|
||
8002170: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
||
8002174: 68fb ldr r3, [r7, #12]
|
||
8002176: 2200 movs r2, #0
|
||
8002178: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Prepare transfer parameters */
|
||
hi2c->pBuffPtr = pData;
|
||
800217a: 68fb ldr r3, [r7, #12]
|
||
800217c: 6a3a ldr r2, [r7, #32]
|
||
800217e: 625a str r2, [r3, #36] ; 0x24
|
||
hi2c->XferCount = Size;
|
||
8002180: 68fb ldr r3, [r7, #12]
|
||
8002182: 8cba ldrh r2, [r7, #36] ; 0x24
|
||
8002184: 855a strh r2, [r3, #42] ; 0x2a
|
||
hi2c->XferSize = hi2c->XferCount;
|
||
8002186: 68fb ldr r3, [r7, #12]
|
||
8002188: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
800218a: b29a uxth r2, r3
|
||
800218c: 68fb ldr r3, [r7, #12]
|
||
800218e: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
|
||
8002190: 68fb ldr r3, [r7, #12]
|
||
8002192: 4a4d ldr r2, [pc, #308] ; (80022c8 <HAL_I2C_Mem_Write+0x1f0>)
|
||
8002194: 62da str r2, [r3, #44] ; 0x2c
|
||
|
||
/* Send Slave Address and Memory Address */
|
||
if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
|
||
8002196: 88f8 ldrh r0, [r7, #6]
|
||
8002198: 893a ldrh r2, [r7, #8]
|
||
800219a: 8979 ldrh r1, [r7, #10]
|
||
800219c: 697b ldr r3, [r7, #20]
|
||
800219e: 9301 str r3, [sp, #4]
|
||
80021a0: 6abb ldr r3, [r7, #40] ; 0x28
|
||
80021a2: 9300 str r3, [sp, #0]
|
||
80021a4: 4603 mov r3, r0
|
||
80021a6: 68f8 ldr r0, [r7, #12]
|
||
80021a8: f000 faf8 bl 800279c <I2C_RequestMemoryWrite>
|
||
80021ac: 4603 mov r3, r0
|
||
80021ae: 2b00 cmp r3, #0
|
||
80021b0: d052 beq.n 8002258 <HAL_I2C_Mem_Write+0x180>
|
||
{
|
||
return HAL_ERROR;
|
||
80021b2: 2301 movs r3, #1
|
||
80021b4: e081 b.n 80022ba <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
|
||
while (hi2c->XferSize > 0U)
|
||
{
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
||
80021b6: 697a ldr r2, [r7, #20]
|
||
80021b8: 6ab9 ldr r1, [r7, #40] ; 0x28
|
||
80021ba: 68f8 ldr r0, [r7, #12]
|
||
80021bc: f000 fd42 bl 8002c44 <I2C_WaitOnTXEFlagUntilTimeout>
|
||
80021c0: 4603 mov r3, r0
|
||
80021c2: 2b00 cmp r3, #0
|
||
80021c4: d00d beq.n 80021e2 <HAL_I2C_Mem_Write+0x10a>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
80021c6: 68fb ldr r3, [r7, #12]
|
||
80021c8: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
80021ca: 2b04 cmp r3, #4
|
||
80021cc: d107 bne.n 80021de <HAL_I2C_Mem_Write+0x106>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
80021ce: 68fb ldr r3, [r7, #12]
|
||
80021d0: 681b ldr r3, [r3, #0]
|
||
80021d2: 681a ldr r2, [r3, #0]
|
||
80021d4: 68fb ldr r3, [r7, #12]
|
||
80021d6: 681b ldr r3, [r3, #0]
|
||
80021d8: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
80021dc: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
80021de: 2301 movs r3, #1
|
||
80021e0: e06b b.n 80022ba <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
|
||
/* Write data to DR */
|
||
hi2c->Instance->DR = *hi2c->pBuffPtr;
|
||
80021e2: 68fb ldr r3, [r7, #12]
|
||
80021e4: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80021e6: 781a ldrb r2, [r3, #0]
|
||
80021e8: 68fb ldr r3, [r7, #12]
|
||
80021ea: 681b ldr r3, [r3, #0]
|
||
80021ec: 611a str r2, [r3, #16]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
80021ee: 68fb ldr r3, [r7, #12]
|
||
80021f0: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80021f2: 1c5a adds r2, r3, #1
|
||
80021f4: 68fb ldr r3, [r7, #12]
|
||
80021f6: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
80021f8: 68fb ldr r3, [r7, #12]
|
||
80021fa: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80021fc: 3b01 subs r3, #1
|
||
80021fe: b29a uxth r2, r3
|
||
8002200: 68fb ldr r3, [r7, #12]
|
||
8002202: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
8002204: 68fb ldr r3, [r7, #12]
|
||
8002206: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002208: b29b uxth r3, r3
|
||
800220a: 3b01 subs r3, #1
|
||
800220c: b29a uxth r2, r3
|
||
800220e: 68fb ldr r3, [r7, #12]
|
||
8002210: 855a strh r2, [r3, #42] ; 0x2a
|
||
|
||
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
|
||
8002212: 68fb ldr r3, [r7, #12]
|
||
8002214: 681b ldr r3, [r3, #0]
|
||
8002216: 695b ldr r3, [r3, #20]
|
||
8002218: f003 0304 and.w r3, r3, #4
|
||
800221c: 2b04 cmp r3, #4
|
||
800221e: d11b bne.n 8002258 <HAL_I2C_Mem_Write+0x180>
|
||
8002220: 68fb ldr r3, [r7, #12]
|
||
8002222: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002224: 2b00 cmp r3, #0
|
||
8002226: d017 beq.n 8002258 <HAL_I2C_Mem_Write+0x180>
|
||
{
|
||
/* Write data to DR */
|
||
hi2c->Instance->DR = *hi2c->pBuffPtr;
|
||
8002228: 68fb ldr r3, [r7, #12]
|
||
800222a: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800222c: 781a ldrb r2, [r3, #0]
|
||
800222e: 68fb ldr r3, [r7, #12]
|
||
8002230: 681b ldr r3, [r3, #0]
|
||
8002232: 611a str r2, [r3, #16]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
8002234: 68fb ldr r3, [r7, #12]
|
||
8002236: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002238: 1c5a adds r2, r3, #1
|
||
800223a: 68fb ldr r3, [r7, #12]
|
||
800223c: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
800223e: 68fb ldr r3, [r7, #12]
|
||
8002240: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002242: 3b01 subs r3, #1
|
||
8002244: b29a uxth r2, r3
|
||
8002246: 68fb ldr r3, [r7, #12]
|
||
8002248: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
800224a: 68fb ldr r3, [r7, #12]
|
||
800224c: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
800224e: b29b uxth r3, r3
|
||
8002250: 3b01 subs r3, #1
|
||
8002252: b29a uxth r2, r3
|
||
8002254: 68fb ldr r3, [r7, #12]
|
||
8002256: 855a strh r2, [r3, #42] ; 0x2a
|
||
while (hi2c->XferSize > 0U)
|
||
8002258: 68fb ldr r3, [r7, #12]
|
||
800225a: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
800225c: 2b00 cmp r3, #0
|
||
800225e: d1aa bne.n 80021b6 <HAL_I2C_Mem_Write+0xde>
|
||
}
|
||
}
|
||
|
||
/* Wait until BTF flag is set */
|
||
if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
||
8002260: 697a ldr r2, [r7, #20]
|
||
8002262: 6ab9 ldr r1, [r7, #40] ; 0x28
|
||
8002264: 68f8 ldr r0, [r7, #12]
|
||
8002266: f000 fd2e bl 8002cc6 <I2C_WaitOnBTFFlagUntilTimeout>
|
||
800226a: 4603 mov r3, r0
|
||
800226c: 2b00 cmp r3, #0
|
||
800226e: d00d beq.n 800228c <HAL_I2C_Mem_Write+0x1b4>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
8002270: 68fb ldr r3, [r7, #12]
|
||
8002272: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002274: 2b04 cmp r3, #4
|
||
8002276: d107 bne.n 8002288 <HAL_I2C_Mem_Write+0x1b0>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002278: 68fb ldr r3, [r7, #12]
|
||
800227a: 681b ldr r3, [r3, #0]
|
||
800227c: 681a ldr r2, [r3, #0]
|
||
800227e: 68fb ldr r3, [r7, #12]
|
||
8002280: 681b ldr r3, [r3, #0]
|
||
8002282: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002286: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
8002288: 2301 movs r3, #1
|
||
800228a: e016 b.n 80022ba <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
800228c: 68fb ldr r3, [r7, #12]
|
||
800228e: 681b ldr r3, [r3, #0]
|
||
8002290: 681a ldr r2, [r3, #0]
|
||
8002292: 68fb ldr r3, [r7, #12]
|
||
8002294: 681b ldr r3, [r3, #0]
|
||
8002296: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
800229a: 601a str r2, [r3, #0]
|
||
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
800229c: 68fb ldr r3, [r7, #12]
|
||
800229e: 2220 movs r2, #32
|
||
80022a0: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
80022a4: 68fb ldr r3, [r7, #12]
|
||
80022a6: 2200 movs r2, #0
|
||
80022a8: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
80022ac: 68fb ldr r3, [r7, #12]
|
||
80022ae: 2200 movs r2, #0
|
||
80022b0: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_OK;
|
||
80022b4: 2300 movs r3, #0
|
||
80022b6: e000 b.n 80022ba <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
else
|
||
{
|
||
return HAL_BUSY;
|
||
80022b8: 2302 movs r3, #2
|
||
}
|
||
}
|
||
80022ba: 4618 mov r0, r3
|
||
80022bc: 3718 adds r7, #24
|
||
80022be: 46bd mov sp, r7
|
||
80022c0: bd80 pop {r7, pc}
|
||
80022c2: bf00 nop
|
||
80022c4: 00100002 .word 0x00100002
|
||
80022c8: ffff0000 .word 0xffff0000
|
||
|
||
080022cc <HAL_I2C_Mem_Read>:
|
||
* @param Size Amount of data to be sent
|
||
* @param Timeout Timeout duration
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
||
{
|
||
80022cc: b580 push {r7, lr}
|
||
80022ce: b08c sub sp, #48 ; 0x30
|
||
80022d0: af02 add r7, sp, #8
|
||
80022d2: 60f8 str r0, [r7, #12]
|
||
80022d4: 4608 mov r0, r1
|
||
80022d6: 4611 mov r1, r2
|
||
80022d8: 461a mov r2, r3
|
||
80022da: 4603 mov r3, r0
|
||
80022dc: 817b strh r3, [r7, #10]
|
||
80022de: 460b mov r3, r1
|
||
80022e0: 813b strh r3, [r7, #8]
|
||
80022e2: 4613 mov r3, r2
|
||
80022e4: 80fb strh r3, [r7, #6]
|
||
__IO uint32_t count = 0U;
|
||
80022e6: 2300 movs r3, #0
|
||
80022e8: 623b str r3, [r7, #32]
|
||
|
||
/* Init tickstart for timeout management*/
|
||
uint32_t tickstart = HAL_GetTick();
|
||
80022ea: f7ff fadb bl 80018a4 <HAL_GetTick>
|
||
80022ee: 6278 str r0, [r7, #36] ; 0x24
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
|
||
|
||
if (hi2c->State == HAL_I2C_STATE_READY)
|
||
80022f0: 68fb ldr r3, [r7, #12]
|
||
80022f2: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
||
80022f6: b2db uxtb r3, r3
|
||
80022f8: 2b20 cmp r3, #32
|
||
80022fa: f040 8244 bne.w 8002786 <HAL_I2C_Mem_Read+0x4ba>
|
||
{
|
||
/* Wait until BUSY flag is reset */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
|
||
80022fe: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002300: 9300 str r3, [sp, #0]
|
||
8002302: 2319 movs r3, #25
|
||
8002304: 2201 movs r2, #1
|
||
8002306: 4982 ldr r1, [pc, #520] ; (8002510 <HAL_I2C_Mem_Read+0x244>)
|
||
8002308: 68f8 ldr r0, [r7, #12]
|
||
800230a: f000 fbc5 bl 8002a98 <I2C_WaitOnFlagUntilTimeout>
|
||
800230e: 4603 mov r3, r0
|
||
8002310: 2b00 cmp r3, #0
|
||
8002312: d001 beq.n 8002318 <HAL_I2C_Mem_Read+0x4c>
|
||
{
|
||
return HAL_BUSY;
|
||
8002314: 2302 movs r3, #2
|
||
8002316: e237 b.n 8002788 <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
/* Process Locked */
|
||
__HAL_LOCK(hi2c);
|
||
8002318: 68fb ldr r3, [r7, #12]
|
||
800231a: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
|
||
800231e: 2b01 cmp r3, #1
|
||
8002320: d101 bne.n 8002326 <HAL_I2C_Mem_Read+0x5a>
|
||
8002322: 2302 movs r3, #2
|
||
8002324: e230 b.n 8002788 <HAL_I2C_Mem_Read+0x4bc>
|
||
8002326: 68fb ldr r3, [r7, #12]
|
||
8002328: 2201 movs r2, #1
|
||
800232a: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
/* Check if the I2C is already enabled */
|
||
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
|
||
800232e: 68fb ldr r3, [r7, #12]
|
||
8002330: 681b ldr r3, [r3, #0]
|
||
8002332: 681b ldr r3, [r3, #0]
|
||
8002334: f003 0301 and.w r3, r3, #1
|
||
8002338: 2b01 cmp r3, #1
|
||
800233a: d007 beq.n 800234c <HAL_I2C_Mem_Read+0x80>
|
||
{
|
||
/* Enable I2C peripheral */
|
||
__HAL_I2C_ENABLE(hi2c);
|
||
800233c: 68fb ldr r3, [r7, #12]
|
||
800233e: 681b ldr r3, [r3, #0]
|
||
8002340: 681a ldr r2, [r3, #0]
|
||
8002342: 68fb ldr r3, [r7, #12]
|
||
8002344: 681b ldr r3, [r3, #0]
|
||
8002346: f042 0201 orr.w r2, r2, #1
|
||
800234a: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Disable Pos */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
||
800234c: 68fb ldr r3, [r7, #12]
|
||
800234e: 681b ldr r3, [r3, #0]
|
||
8002350: 681a ldr r2, [r3, #0]
|
||
8002352: 68fb ldr r3, [r7, #12]
|
||
8002354: 681b ldr r3, [r3, #0]
|
||
8002356: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
||
800235a: 601a str r2, [r3, #0]
|
||
|
||
hi2c->State = HAL_I2C_STATE_BUSY_RX;
|
||
800235c: 68fb ldr r3, [r7, #12]
|
||
800235e: 2222 movs r2, #34 ; 0x22
|
||
8002360: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_MEM;
|
||
8002364: 68fb ldr r3, [r7, #12]
|
||
8002366: 2240 movs r2, #64 ; 0x40
|
||
8002368: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
||
800236c: 68fb ldr r3, [r7, #12]
|
||
800236e: 2200 movs r2, #0
|
||
8002370: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Prepare transfer parameters */
|
||
hi2c->pBuffPtr = pData;
|
||
8002372: 68fb ldr r3, [r7, #12]
|
||
8002374: 6b3a ldr r2, [r7, #48] ; 0x30
|
||
8002376: 625a str r2, [r3, #36] ; 0x24
|
||
hi2c->XferCount = Size;
|
||
8002378: 68fb ldr r3, [r7, #12]
|
||
800237a: 8eba ldrh r2, [r7, #52] ; 0x34
|
||
800237c: 855a strh r2, [r3, #42] ; 0x2a
|
||
hi2c->XferSize = hi2c->XferCount;
|
||
800237e: 68fb ldr r3, [r7, #12]
|
||
8002380: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002382: b29a uxth r2, r3
|
||
8002384: 68fb ldr r3, [r7, #12]
|
||
8002386: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
|
||
8002388: 68fb ldr r3, [r7, #12]
|
||
800238a: 4a62 ldr r2, [pc, #392] ; (8002514 <HAL_I2C_Mem_Read+0x248>)
|
||
800238c: 62da str r2, [r3, #44] ; 0x2c
|
||
|
||
/* Send Slave Address and Memory Address */
|
||
if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
|
||
800238e: 88f8 ldrh r0, [r7, #6]
|
||
8002390: 893a ldrh r2, [r7, #8]
|
||
8002392: 8979 ldrh r1, [r7, #10]
|
||
8002394: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002396: 9301 str r3, [sp, #4]
|
||
8002398: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
800239a: 9300 str r3, [sp, #0]
|
||
800239c: 4603 mov r3, r0
|
||
800239e: 68f8 ldr r0, [r7, #12]
|
||
80023a0: f000 fa92 bl 80028c8 <I2C_RequestMemoryRead>
|
||
80023a4: 4603 mov r3, r0
|
||
80023a6: 2b00 cmp r3, #0
|
||
80023a8: d001 beq.n 80023ae <HAL_I2C_Mem_Read+0xe2>
|
||
{
|
||
return HAL_ERROR;
|
||
80023aa: 2301 movs r3, #1
|
||
80023ac: e1ec b.n 8002788 <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
if (hi2c->XferSize == 0U)
|
||
80023ae: 68fb ldr r3, [r7, #12]
|
||
80023b0: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80023b2: 2b00 cmp r3, #0
|
||
80023b4: d113 bne.n 80023de <HAL_I2C_Mem_Read+0x112>
|
||
{
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
80023b6: 2300 movs r3, #0
|
||
80023b8: 61fb str r3, [r7, #28]
|
||
80023ba: 68fb ldr r3, [r7, #12]
|
||
80023bc: 681b ldr r3, [r3, #0]
|
||
80023be: 695b ldr r3, [r3, #20]
|
||
80023c0: 61fb str r3, [r7, #28]
|
||
80023c2: 68fb ldr r3, [r7, #12]
|
||
80023c4: 681b ldr r3, [r3, #0]
|
||
80023c6: 699b ldr r3, [r3, #24]
|
||
80023c8: 61fb str r3, [r7, #28]
|
||
80023ca: 69fb ldr r3, [r7, #28]
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
80023cc: 68fb ldr r3, [r7, #12]
|
||
80023ce: 681b ldr r3, [r3, #0]
|
||
80023d0: 681a ldr r2, [r3, #0]
|
||
80023d2: 68fb ldr r3, [r7, #12]
|
||
80023d4: 681b ldr r3, [r3, #0]
|
||
80023d6: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
80023da: 601a str r2, [r3, #0]
|
||
80023dc: e1c0 b.n 8002760 <HAL_I2C_Mem_Read+0x494>
|
||
}
|
||
else if (hi2c->XferSize == 1U)
|
||
80023de: 68fb ldr r3, [r7, #12]
|
||
80023e0: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80023e2: 2b01 cmp r3, #1
|
||
80023e4: d11e bne.n 8002424 <HAL_I2C_Mem_Read+0x158>
|
||
{
|
||
/* Disable Acknowledge */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
80023e6: 68fb ldr r3, [r7, #12]
|
||
80023e8: 681b ldr r3, [r3, #0]
|
||
80023ea: 681a ldr r2, [r3, #0]
|
||
80023ec: 68fb ldr r3, [r7, #12]
|
||
80023ee: 681b ldr r3, [r3, #0]
|
||
80023f0: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
||
80023f4: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
80023f6: b672 cpsid i
|
||
}
|
||
80023f8: bf00 nop
|
||
/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
|
||
software sequence must complete before the current byte end of transfer */
|
||
__disable_irq();
|
||
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
80023fa: 2300 movs r3, #0
|
||
80023fc: 61bb str r3, [r7, #24]
|
||
80023fe: 68fb ldr r3, [r7, #12]
|
||
8002400: 681b ldr r3, [r3, #0]
|
||
8002402: 695b ldr r3, [r3, #20]
|
||
8002404: 61bb str r3, [r7, #24]
|
||
8002406: 68fb ldr r3, [r7, #12]
|
||
8002408: 681b ldr r3, [r3, #0]
|
||
800240a: 699b ldr r3, [r3, #24]
|
||
800240c: 61bb str r3, [r7, #24]
|
||
800240e: 69bb ldr r3, [r7, #24]
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002410: 68fb ldr r3, [r7, #12]
|
||
8002412: 681b ldr r3, [r3, #0]
|
||
8002414: 681a ldr r2, [r3, #0]
|
||
8002416: 68fb ldr r3, [r7, #12]
|
||
8002418: 681b ldr r3, [r3, #0]
|
||
800241a: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
800241e: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
8002420: b662 cpsie i
|
||
}
|
||
8002422: e035 b.n 8002490 <HAL_I2C_Mem_Read+0x1c4>
|
||
|
||
/* Re-enable IRQs */
|
||
__enable_irq();
|
||
}
|
||
else if (hi2c->XferSize == 2U)
|
||
8002424: 68fb ldr r3, [r7, #12]
|
||
8002426: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002428: 2b02 cmp r3, #2
|
||
800242a: d11e bne.n 800246a <HAL_I2C_Mem_Read+0x19e>
|
||
{
|
||
/* Enable Pos */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
||
800242c: 68fb ldr r3, [r7, #12]
|
||
800242e: 681b ldr r3, [r3, #0]
|
||
8002430: 681a ldr r2, [r3, #0]
|
||
8002432: 68fb ldr r3, [r7, #12]
|
||
8002434: 681b ldr r3, [r3, #0]
|
||
8002436: f442 6200 orr.w r2, r2, #2048 ; 0x800
|
||
800243a: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
800243c: b672 cpsid i
|
||
}
|
||
800243e: bf00 nop
|
||
/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
|
||
software sequence must complete before the current byte end of transfer */
|
||
__disable_irq();
|
||
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
8002440: 2300 movs r3, #0
|
||
8002442: 617b str r3, [r7, #20]
|
||
8002444: 68fb ldr r3, [r7, #12]
|
||
8002446: 681b ldr r3, [r3, #0]
|
||
8002448: 695b ldr r3, [r3, #20]
|
||
800244a: 617b str r3, [r7, #20]
|
||
800244c: 68fb ldr r3, [r7, #12]
|
||
800244e: 681b ldr r3, [r3, #0]
|
||
8002450: 699b ldr r3, [r3, #24]
|
||
8002452: 617b str r3, [r7, #20]
|
||
8002454: 697b ldr r3, [r7, #20]
|
||
|
||
/* Disable Acknowledge */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
8002456: 68fb ldr r3, [r7, #12]
|
||
8002458: 681b ldr r3, [r3, #0]
|
||
800245a: 681a ldr r2, [r3, #0]
|
||
800245c: 68fb ldr r3, [r7, #12]
|
||
800245e: 681b ldr r3, [r3, #0]
|
||
8002460: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
||
8002464: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
8002466: b662 cpsie i
|
||
}
|
||
8002468: e012 b.n 8002490 <HAL_I2C_Mem_Read+0x1c4>
|
||
__enable_irq();
|
||
}
|
||
else
|
||
{
|
||
/* Enable Acknowledge */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
800246a: 68fb ldr r3, [r7, #12]
|
||
800246c: 681b ldr r3, [r3, #0]
|
||
800246e: 681a ldr r2, [r3, #0]
|
||
8002470: 68fb ldr r3, [r7, #12]
|
||
8002472: 681b ldr r3, [r3, #0]
|
||
8002474: f442 6280 orr.w r2, r2, #1024 ; 0x400
|
||
8002478: 601a str r2, [r3, #0]
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
800247a: 2300 movs r3, #0
|
||
800247c: 613b str r3, [r7, #16]
|
||
800247e: 68fb ldr r3, [r7, #12]
|
||
8002480: 681b ldr r3, [r3, #0]
|
||
8002482: 695b ldr r3, [r3, #20]
|
||
8002484: 613b str r3, [r7, #16]
|
||
8002486: 68fb ldr r3, [r7, #12]
|
||
8002488: 681b ldr r3, [r3, #0]
|
||
800248a: 699b ldr r3, [r3, #24]
|
||
800248c: 613b str r3, [r7, #16]
|
||
800248e: 693b ldr r3, [r7, #16]
|
||
}
|
||
|
||
while (hi2c->XferSize > 0U)
|
||
8002490: e166 b.n 8002760 <HAL_I2C_Mem_Read+0x494>
|
||
{
|
||
if (hi2c->XferSize <= 3U)
|
||
8002492: 68fb ldr r3, [r7, #12]
|
||
8002494: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002496: 2b03 cmp r3, #3
|
||
8002498: f200 811f bhi.w 80026da <HAL_I2C_Mem_Read+0x40e>
|
||
{
|
||
/* One byte */
|
||
if (hi2c->XferSize == 1U)
|
||
800249c: 68fb ldr r3, [r7, #12]
|
||
800249e: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80024a0: 2b01 cmp r3, #1
|
||
80024a2: d123 bne.n 80024ec <HAL_I2C_Mem_Read+0x220>
|
||
{
|
||
/* Wait until RXNE flag is set */
|
||
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
||
80024a4: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
80024a6: 6bb9 ldr r1, [r7, #56] ; 0x38
|
||
80024a8: 68f8 ldr r0, [r7, #12]
|
||
80024aa: f000 fc4d bl 8002d48 <I2C_WaitOnRXNEFlagUntilTimeout>
|
||
80024ae: 4603 mov r3, r0
|
||
80024b0: 2b00 cmp r3, #0
|
||
80024b2: d001 beq.n 80024b8 <HAL_I2C_Mem_Read+0x1ec>
|
||
{
|
||
return HAL_ERROR;
|
||
80024b4: 2301 movs r3, #1
|
||
80024b6: e167 b.n 8002788 <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
80024b8: 68fb ldr r3, [r7, #12]
|
||
80024ba: 681b ldr r3, [r3, #0]
|
||
80024bc: 691a ldr r2, [r3, #16]
|
||
80024be: 68fb ldr r3, [r7, #12]
|
||
80024c0: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80024c2: b2d2 uxtb r2, r2
|
||
80024c4: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
80024c6: 68fb ldr r3, [r7, #12]
|
||
80024c8: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80024ca: 1c5a adds r2, r3, #1
|
||
80024cc: 68fb ldr r3, [r7, #12]
|
||
80024ce: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
80024d0: 68fb ldr r3, [r7, #12]
|
||
80024d2: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80024d4: 3b01 subs r3, #1
|
||
80024d6: b29a uxth r2, r3
|
||
80024d8: 68fb ldr r3, [r7, #12]
|
||
80024da: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
80024dc: 68fb ldr r3, [r7, #12]
|
||
80024de: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
80024e0: b29b uxth r3, r3
|
||
80024e2: 3b01 subs r3, #1
|
||
80024e4: b29a uxth r2, r3
|
||
80024e6: 68fb ldr r3, [r7, #12]
|
||
80024e8: 855a strh r2, [r3, #42] ; 0x2a
|
||
80024ea: e139 b.n 8002760 <HAL_I2C_Mem_Read+0x494>
|
||
}
|
||
/* Two bytes */
|
||
else if (hi2c->XferSize == 2U)
|
||
80024ec: 68fb ldr r3, [r7, #12]
|
||
80024ee: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80024f0: 2b02 cmp r3, #2
|
||
80024f2: d152 bne.n 800259a <HAL_I2C_Mem_Read+0x2ce>
|
||
{
|
||
/* Wait until BTF flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
||
80024f4: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80024f6: 9300 str r3, [sp, #0]
|
||
80024f8: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
80024fa: 2200 movs r2, #0
|
||
80024fc: 4906 ldr r1, [pc, #24] ; (8002518 <HAL_I2C_Mem_Read+0x24c>)
|
||
80024fe: 68f8 ldr r0, [r7, #12]
|
||
8002500: f000 faca bl 8002a98 <I2C_WaitOnFlagUntilTimeout>
|
||
8002504: 4603 mov r3, r0
|
||
8002506: 2b00 cmp r3, #0
|
||
8002508: d008 beq.n 800251c <HAL_I2C_Mem_Read+0x250>
|
||
{
|
||
return HAL_ERROR;
|
||
800250a: 2301 movs r3, #1
|
||
800250c: e13c b.n 8002788 <HAL_I2C_Mem_Read+0x4bc>
|
||
800250e: bf00 nop
|
||
8002510: 00100002 .word 0x00100002
|
||
8002514: ffff0000 .word 0xffff0000
|
||
8002518: 00010004 .word 0x00010004
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
800251c: b672 cpsid i
|
||
}
|
||
800251e: bf00 nop
|
||
/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
|
||
software sequence must complete before the current byte end of transfer */
|
||
__disable_irq();
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002520: 68fb ldr r3, [r7, #12]
|
||
8002522: 681b ldr r3, [r3, #0]
|
||
8002524: 681a ldr r2, [r3, #0]
|
||
8002526: 68fb ldr r3, [r7, #12]
|
||
8002528: 681b ldr r3, [r3, #0]
|
||
800252a: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
800252e: 601a str r2, [r3, #0]
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
8002530: 68fb ldr r3, [r7, #12]
|
||
8002532: 681b ldr r3, [r3, #0]
|
||
8002534: 691a ldr r2, [r3, #16]
|
||
8002536: 68fb ldr r3, [r7, #12]
|
||
8002538: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800253a: b2d2 uxtb r2, r2
|
||
800253c: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
800253e: 68fb ldr r3, [r7, #12]
|
||
8002540: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002542: 1c5a adds r2, r3, #1
|
||
8002544: 68fb ldr r3, [r7, #12]
|
||
8002546: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
8002548: 68fb ldr r3, [r7, #12]
|
||
800254a: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
800254c: 3b01 subs r3, #1
|
||
800254e: b29a uxth r2, r3
|
||
8002550: 68fb ldr r3, [r7, #12]
|
||
8002552: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
8002554: 68fb ldr r3, [r7, #12]
|
||
8002556: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002558: b29b uxth r3, r3
|
||
800255a: 3b01 subs r3, #1
|
||
800255c: b29a uxth r2, r3
|
||
800255e: 68fb ldr r3, [r7, #12]
|
||
8002560: 855a strh r2, [r3, #42] ; 0x2a
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
8002562: b662 cpsie i
|
||
}
|
||
8002564: bf00 nop
|
||
|
||
/* Re-enable IRQs */
|
||
__enable_irq();
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
8002566: 68fb ldr r3, [r7, #12]
|
||
8002568: 681b ldr r3, [r3, #0]
|
||
800256a: 691a ldr r2, [r3, #16]
|
||
800256c: 68fb ldr r3, [r7, #12]
|
||
800256e: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002570: b2d2 uxtb r2, r2
|
||
8002572: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
8002574: 68fb ldr r3, [r7, #12]
|
||
8002576: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002578: 1c5a adds r2, r3, #1
|
||
800257a: 68fb ldr r3, [r7, #12]
|
||
800257c: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
800257e: 68fb ldr r3, [r7, #12]
|
||
8002580: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002582: 3b01 subs r3, #1
|
||
8002584: b29a uxth r2, r3
|
||
8002586: 68fb ldr r3, [r7, #12]
|
||
8002588: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
800258a: 68fb ldr r3, [r7, #12]
|
||
800258c: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
800258e: b29b uxth r3, r3
|
||
8002590: 3b01 subs r3, #1
|
||
8002592: b29a uxth r2, r3
|
||
8002594: 68fb ldr r3, [r7, #12]
|
||
8002596: 855a strh r2, [r3, #42] ; 0x2a
|
||
8002598: e0e2 b.n 8002760 <HAL_I2C_Mem_Read+0x494>
|
||
}
|
||
/* 3 Last bytes */
|
||
else
|
||
{
|
||
/* Wait until BTF flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
||
800259a: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
800259c: 9300 str r3, [sp, #0]
|
||
800259e: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
80025a0: 2200 movs r2, #0
|
||
80025a2: 497b ldr r1, [pc, #492] ; (8002790 <HAL_I2C_Mem_Read+0x4c4>)
|
||
80025a4: 68f8 ldr r0, [r7, #12]
|
||
80025a6: f000 fa77 bl 8002a98 <I2C_WaitOnFlagUntilTimeout>
|
||
80025aa: 4603 mov r3, r0
|
||
80025ac: 2b00 cmp r3, #0
|
||
80025ae: d001 beq.n 80025b4 <HAL_I2C_Mem_Read+0x2e8>
|
||
{
|
||
return HAL_ERROR;
|
||
80025b0: 2301 movs r3, #1
|
||
80025b2: e0e9 b.n 8002788 <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
/* Disable Acknowledge */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
80025b4: 68fb ldr r3, [r7, #12]
|
||
80025b6: 681b ldr r3, [r3, #0]
|
||
80025b8: 681a ldr r2, [r3, #0]
|
||
80025ba: 68fb ldr r3, [r7, #12]
|
||
80025bc: 681b ldr r3, [r3, #0]
|
||
80025be: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
||
80025c2: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
80025c4: b672 cpsid i
|
||
}
|
||
80025c6: bf00 nop
|
||
/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
|
||
software sequence must complete before the current byte end of transfer */
|
||
__disable_irq();
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
80025c8: 68fb ldr r3, [r7, #12]
|
||
80025ca: 681b ldr r3, [r3, #0]
|
||
80025cc: 691a ldr r2, [r3, #16]
|
||
80025ce: 68fb ldr r3, [r7, #12]
|
||
80025d0: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80025d2: b2d2 uxtb r2, r2
|
||
80025d4: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
80025d6: 68fb ldr r3, [r7, #12]
|
||
80025d8: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80025da: 1c5a adds r2, r3, #1
|
||
80025dc: 68fb ldr r3, [r7, #12]
|
||
80025de: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
80025e0: 68fb ldr r3, [r7, #12]
|
||
80025e2: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80025e4: 3b01 subs r3, #1
|
||
80025e6: b29a uxth r2, r3
|
||
80025e8: 68fb ldr r3, [r7, #12]
|
||
80025ea: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
80025ec: 68fb ldr r3, [r7, #12]
|
||
80025ee: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
80025f0: b29b uxth r3, r3
|
||
80025f2: 3b01 subs r3, #1
|
||
80025f4: b29a uxth r2, r3
|
||
80025f6: 68fb ldr r3, [r7, #12]
|
||
80025f8: 855a strh r2, [r3, #42] ; 0x2a
|
||
|
||
/* Wait until BTF flag is set */
|
||
count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U);
|
||
80025fa: 4b66 ldr r3, [pc, #408] ; (8002794 <HAL_I2C_Mem_Read+0x4c8>)
|
||
80025fc: 681b ldr r3, [r3, #0]
|
||
80025fe: 08db lsrs r3, r3, #3
|
||
8002600: 4a65 ldr r2, [pc, #404] ; (8002798 <HAL_I2C_Mem_Read+0x4cc>)
|
||
8002602: fba2 2303 umull r2, r3, r2, r3
|
||
8002606: 0a1a lsrs r2, r3, #8
|
||
8002608: 4613 mov r3, r2
|
||
800260a: 009b lsls r3, r3, #2
|
||
800260c: 4413 add r3, r2
|
||
800260e: 00da lsls r2, r3, #3
|
||
8002610: 1ad3 subs r3, r2, r3
|
||
8002612: 623b str r3, [r7, #32]
|
||
do
|
||
{
|
||
count--;
|
||
8002614: 6a3b ldr r3, [r7, #32]
|
||
8002616: 3b01 subs r3, #1
|
||
8002618: 623b str r3, [r7, #32]
|
||
if (count == 0U)
|
||
800261a: 6a3b ldr r3, [r7, #32]
|
||
800261c: 2b00 cmp r3, #0
|
||
800261e: d118 bne.n 8002652 <HAL_I2C_Mem_Read+0x386>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002620: 68fb ldr r3, [r7, #12]
|
||
8002622: 2200 movs r2, #0
|
||
8002624: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002626: 68fb ldr r3, [r7, #12]
|
||
8002628: 2220 movs r2, #32
|
||
800262a: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
800262e: 68fb ldr r3, [r7, #12]
|
||
8002630: 2200 movs r2, #0
|
||
8002632: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002636: 68fb ldr r3, [r7, #12]
|
||
8002638: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
800263a: f043 0220 orr.w r2, r3, #32
|
||
800263e: 68fb ldr r3, [r7, #12]
|
||
8002640: 641a str r2, [r3, #64] ; 0x40
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
8002642: b662 cpsie i
|
||
}
|
||
8002644: bf00 nop
|
||
|
||
/* Re-enable IRQs */
|
||
__enable_irq();
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002646: 68fb ldr r3, [r7, #12]
|
||
8002648: 2200 movs r2, #0
|
||
800264a: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
800264e: 2301 movs r3, #1
|
||
8002650: e09a b.n 8002788 <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
}
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET);
|
||
8002652: 68fb ldr r3, [r7, #12]
|
||
8002654: 681b ldr r3, [r3, #0]
|
||
8002656: 695b ldr r3, [r3, #20]
|
||
8002658: f003 0304 and.w r3, r3, #4
|
||
800265c: 2b04 cmp r3, #4
|
||
800265e: d1d9 bne.n 8002614 <HAL_I2C_Mem_Read+0x348>
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002660: 68fb ldr r3, [r7, #12]
|
||
8002662: 681b ldr r3, [r3, #0]
|
||
8002664: 681a ldr r2, [r3, #0]
|
||
8002666: 68fb ldr r3, [r7, #12]
|
||
8002668: 681b ldr r3, [r3, #0]
|
||
800266a: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
800266e: 601a str r2, [r3, #0]
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
8002670: 68fb ldr r3, [r7, #12]
|
||
8002672: 681b ldr r3, [r3, #0]
|
||
8002674: 691a ldr r2, [r3, #16]
|
||
8002676: 68fb ldr r3, [r7, #12]
|
||
8002678: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800267a: b2d2 uxtb r2, r2
|
||
800267c: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
800267e: 68fb ldr r3, [r7, #12]
|
||
8002680: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002682: 1c5a adds r2, r3, #1
|
||
8002684: 68fb ldr r3, [r7, #12]
|
||
8002686: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
8002688: 68fb ldr r3, [r7, #12]
|
||
800268a: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
800268c: 3b01 subs r3, #1
|
||
800268e: b29a uxth r2, r3
|
||
8002690: 68fb ldr r3, [r7, #12]
|
||
8002692: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
8002694: 68fb ldr r3, [r7, #12]
|
||
8002696: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002698: b29b uxth r3, r3
|
||
800269a: 3b01 subs r3, #1
|
||
800269c: b29a uxth r2, r3
|
||
800269e: 68fb ldr r3, [r7, #12]
|
||
80026a0: 855a strh r2, [r3, #42] ; 0x2a
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
80026a2: b662 cpsie i
|
||
}
|
||
80026a4: bf00 nop
|
||
|
||
/* Re-enable IRQs */
|
||
__enable_irq();
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
80026a6: 68fb ldr r3, [r7, #12]
|
||
80026a8: 681b ldr r3, [r3, #0]
|
||
80026aa: 691a ldr r2, [r3, #16]
|
||
80026ac: 68fb ldr r3, [r7, #12]
|
||
80026ae: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80026b0: b2d2 uxtb r2, r2
|
||
80026b2: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
80026b4: 68fb ldr r3, [r7, #12]
|
||
80026b6: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80026b8: 1c5a adds r2, r3, #1
|
||
80026ba: 68fb ldr r3, [r7, #12]
|
||
80026bc: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
80026be: 68fb ldr r3, [r7, #12]
|
||
80026c0: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80026c2: 3b01 subs r3, #1
|
||
80026c4: b29a uxth r2, r3
|
||
80026c6: 68fb ldr r3, [r7, #12]
|
||
80026c8: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
80026ca: 68fb ldr r3, [r7, #12]
|
||
80026cc: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
80026ce: b29b uxth r3, r3
|
||
80026d0: 3b01 subs r3, #1
|
||
80026d2: b29a uxth r2, r3
|
||
80026d4: 68fb ldr r3, [r7, #12]
|
||
80026d6: 855a strh r2, [r3, #42] ; 0x2a
|
||
80026d8: e042 b.n 8002760 <HAL_I2C_Mem_Read+0x494>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Wait until RXNE flag is set */
|
||
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
||
80026da: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
80026dc: 6bb9 ldr r1, [r7, #56] ; 0x38
|
||
80026de: 68f8 ldr r0, [r7, #12]
|
||
80026e0: f000 fb32 bl 8002d48 <I2C_WaitOnRXNEFlagUntilTimeout>
|
||
80026e4: 4603 mov r3, r0
|
||
80026e6: 2b00 cmp r3, #0
|
||
80026e8: d001 beq.n 80026ee <HAL_I2C_Mem_Read+0x422>
|
||
{
|
||
return HAL_ERROR;
|
||
80026ea: 2301 movs r3, #1
|
||
80026ec: e04c b.n 8002788 <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
80026ee: 68fb ldr r3, [r7, #12]
|
||
80026f0: 681b ldr r3, [r3, #0]
|
||
80026f2: 691a ldr r2, [r3, #16]
|
||
80026f4: 68fb ldr r3, [r7, #12]
|
||
80026f6: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80026f8: b2d2 uxtb r2, r2
|
||
80026fa: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
80026fc: 68fb ldr r3, [r7, #12]
|
||
80026fe: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002700: 1c5a adds r2, r3, #1
|
||
8002702: 68fb ldr r3, [r7, #12]
|
||
8002704: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
8002706: 68fb ldr r3, [r7, #12]
|
||
8002708: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
800270a: 3b01 subs r3, #1
|
||
800270c: b29a uxth r2, r3
|
||
800270e: 68fb ldr r3, [r7, #12]
|
||
8002710: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
8002712: 68fb ldr r3, [r7, #12]
|
||
8002714: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002716: b29b uxth r3, r3
|
||
8002718: 3b01 subs r3, #1
|
||
800271a: b29a uxth r2, r3
|
||
800271c: 68fb ldr r3, [r7, #12]
|
||
800271e: 855a strh r2, [r3, #42] ; 0x2a
|
||
|
||
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
|
||
8002720: 68fb ldr r3, [r7, #12]
|
||
8002722: 681b ldr r3, [r3, #0]
|
||
8002724: 695b ldr r3, [r3, #20]
|
||
8002726: f003 0304 and.w r3, r3, #4
|
||
800272a: 2b04 cmp r3, #4
|
||
800272c: d118 bne.n 8002760 <HAL_I2C_Mem_Read+0x494>
|
||
{
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
800272e: 68fb ldr r3, [r7, #12]
|
||
8002730: 681b ldr r3, [r3, #0]
|
||
8002732: 691a ldr r2, [r3, #16]
|
||
8002734: 68fb ldr r3, [r7, #12]
|
||
8002736: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002738: b2d2 uxtb r2, r2
|
||
800273a: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
800273c: 68fb ldr r3, [r7, #12]
|
||
800273e: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002740: 1c5a adds r2, r3, #1
|
||
8002742: 68fb ldr r3, [r7, #12]
|
||
8002744: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
8002746: 68fb ldr r3, [r7, #12]
|
||
8002748: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
800274a: 3b01 subs r3, #1
|
||
800274c: b29a uxth r2, r3
|
||
800274e: 68fb ldr r3, [r7, #12]
|
||
8002750: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
8002752: 68fb ldr r3, [r7, #12]
|
||
8002754: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002756: b29b uxth r3, r3
|
||
8002758: 3b01 subs r3, #1
|
||
800275a: b29a uxth r2, r3
|
||
800275c: 68fb ldr r3, [r7, #12]
|
||
800275e: 855a strh r2, [r3, #42] ; 0x2a
|
||
while (hi2c->XferSize > 0U)
|
||
8002760: 68fb ldr r3, [r7, #12]
|
||
8002762: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002764: 2b00 cmp r3, #0
|
||
8002766: f47f ae94 bne.w 8002492 <HAL_I2C_Mem_Read+0x1c6>
|
||
}
|
||
}
|
||
}
|
||
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
800276a: 68fb ldr r3, [r7, #12]
|
||
800276c: 2220 movs r2, #32
|
||
800276e: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002772: 68fb ldr r3, [r7, #12]
|
||
8002774: 2200 movs r2, #0
|
||
8002776: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
800277a: 68fb ldr r3, [r7, #12]
|
||
800277c: 2200 movs r2, #0
|
||
800277e: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_OK;
|
||
8002782: 2300 movs r3, #0
|
||
8002784: e000 b.n 8002788 <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
else
|
||
{
|
||
return HAL_BUSY;
|
||
8002786: 2302 movs r3, #2
|
||
}
|
||
}
|
||
8002788: 4618 mov r0, r3
|
||
800278a: 3728 adds r7, #40 ; 0x28
|
||
800278c: 46bd mov sp, r7
|
||
800278e: bd80 pop {r7, pc}
|
||
8002790: 00010004 .word 0x00010004
|
||
8002794: 20000000 .word 0x20000000
|
||
8002798: 14f8b589 .word 0x14f8b589
|
||
|
||
0800279c <I2C_RequestMemoryWrite>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
800279c: b580 push {r7, lr}
|
||
800279e: b088 sub sp, #32
|
||
80027a0: af02 add r7, sp, #8
|
||
80027a2: 60f8 str r0, [r7, #12]
|
||
80027a4: 4608 mov r0, r1
|
||
80027a6: 4611 mov r1, r2
|
||
80027a8: 461a mov r2, r3
|
||
80027aa: 4603 mov r3, r0
|
||
80027ac: 817b strh r3, [r7, #10]
|
||
80027ae: 460b mov r3, r1
|
||
80027b0: 813b strh r3, [r7, #8]
|
||
80027b2: 4613 mov r3, r2
|
||
80027b4: 80fb strh r3, [r7, #6]
|
||
/* Generate Start */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
||
80027b6: 68fb ldr r3, [r7, #12]
|
||
80027b8: 681b ldr r3, [r3, #0]
|
||
80027ba: 681a ldr r2, [r3, #0]
|
||
80027bc: 68fb ldr r3, [r7, #12]
|
||
80027be: 681b ldr r3, [r3, #0]
|
||
80027c0: f442 7280 orr.w r2, r2, #256 ; 0x100
|
||
80027c4: 601a str r2, [r3, #0]
|
||
|
||
/* Wait until SB flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
||
80027c6: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80027c8: 9300 str r3, [sp, #0]
|
||
80027ca: 6a3b ldr r3, [r7, #32]
|
||
80027cc: 2200 movs r2, #0
|
||
80027ce: f04f 1101 mov.w r1, #65537 ; 0x10001
|
||
80027d2: 68f8 ldr r0, [r7, #12]
|
||
80027d4: f000 f960 bl 8002a98 <I2C_WaitOnFlagUntilTimeout>
|
||
80027d8: 4603 mov r3, r0
|
||
80027da: 2b00 cmp r3, #0
|
||
80027dc: d00d beq.n 80027fa <I2C_RequestMemoryWrite+0x5e>
|
||
{
|
||
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
||
80027de: 68fb ldr r3, [r7, #12]
|
||
80027e0: 681b ldr r3, [r3, #0]
|
||
80027e2: 681b ldr r3, [r3, #0]
|
||
80027e4: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
80027e8: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
80027ec: d103 bne.n 80027f6 <I2C_RequestMemoryWrite+0x5a>
|
||
{
|
||
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
||
80027ee: 68fb ldr r3, [r7, #12]
|
||
80027f0: f44f 7200 mov.w r2, #512 ; 0x200
|
||
80027f4: 641a str r2, [r3, #64] ; 0x40
|
||
}
|
||
return HAL_TIMEOUT;
|
||
80027f6: 2303 movs r3, #3
|
||
80027f8: e05f b.n 80028ba <I2C_RequestMemoryWrite+0x11e>
|
||
}
|
||
|
||
/* Send slave address */
|
||
hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
|
||
80027fa: 897b ldrh r3, [r7, #10]
|
||
80027fc: b2db uxtb r3, r3
|
||
80027fe: 461a mov r2, r3
|
||
8002800: 68fb ldr r3, [r7, #12]
|
||
8002802: 681b ldr r3, [r3, #0]
|
||
8002804: f002 02fe and.w r2, r2, #254 ; 0xfe
|
||
8002808: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until ADDR flag is set */
|
||
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
||
800280a: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
800280c: 6a3a ldr r2, [r7, #32]
|
||
800280e: 492d ldr r1, [pc, #180] ; (80028c4 <I2C_RequestMemoryWrite+0x128>)
|
||
8002810: 68f8 ldr r0, [r7, #12]
|
||
8002812: f000 f998 bl 8002b46 <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
||
8002816: 4603 mov r3, r0
|
||
8002818: 2b00 cmp r3, #0
|
||
800281a: d001 beq.n 8002820 <I2C_RequestMemoryWrite+0x84>
|
||
{
|
||
return HAL_ERROR;
|
||
800281c: 2301 movs r3, #1
|
||
800281e: e04c b.n 80028ba <I2C_RequestMemoryWrite+0x11e>
|
||
}
|
||
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
8002820: 2300 movs r3, #0
|
||
8002822: 617b str r3, [r7, #20]
|
||
8002824: 68fb ldr r3, [r7, #12]
|
||
8002826: 681b ldr r3, [r3, #0]
|
||
8002828: 695b ldr r3, [r3, #20]
|
||
800282a: 617b str r3, [r7, #20]
|
||
800282c: 68fb ldr r3, [r7, #12]
|
||
800282e: 681b ldr r3, [r3, #0]
|
||
8002830: 699b ldr r3, [r3, #24]
|
||
8002832: 617b str r3, [r7, #20]
|
||
8002834: 697b ldr r3, [r7, #20]
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
8002836: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8002838: 6a39 ldr r1, [r7, #32]
|
||
800283a: 68f8 ldr r0, [r7, #12]
|
||
800283c: f000 fa02 bl 8002c44 <I2C_WaitOnTXEFlagUntilTimeout>
|
||
8002840: 4603 mov r3, r0
|
||
8002842: 2b00 cmp r3, #0
|
||
8002844: d00d beq.n 8002862 <I2C_RequestMemoryWrite+0xc6>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
8002846: 68fb ldr r3, [r7, #12]
|
||
8002848: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
800284a: 2b04 cmp r3, #4
|
||
800284c: d107 bne.n 800285e <I2C_RequestMemoryWrite+0xc2>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
800284e: 68fb ldr r3, [r7, #12]
|
||
8002850: 681b ldr r3, [r3, #0]
|
||
8002852: 681a ldr r2, [r3, #0]
|
||
8002854: 68fb ldr r3, [r7, #12]
|
||
8002856: 681b ldr r3, [r3, #0]
|
||
8002858: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
800285c: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
800285e: 2301 movs r3, #1
|
||
8002860: e02b b.n 80028ba <I2C_RequestMemoryWrite+0x11e>
|
||
}
|
||
|
||
/* If Memory address size is 8Bit */
|
||
if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
|
||
8002862: 88fb ldrh r3, [r7, #6]
|
||
8002864: 2b01 cmp r3, #1
|
||
8002866: d105 bne.n 8002874 <I2C_RequestMemoryWrite+0xd8>
|
||
{
|
||
/* Send Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
||
8002868: 893b ldrh r3, [r7, #8]
|
||
800286a: b2da uxtb r2, r3
|
||
800286c: 68fb ldr r3, [r7, #12]
|
||
800286e: 681b ldr r3, [r3, #0]
|
||
8002870: 611a str r2, [r3, #16]
|
||
8002872: e021 b.n 80028b8 <I2C_RequestMemoryWrite+0x11c>
|
||
}
|
||
/* If Memory address size is 16Bit */
|
||
else
|
||
{
|
||
/* Send MSB of Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
|
||
8002874: 893b ldrh r3, [r7, #8]
|
||
8002876: 0a1b lsrs r3, r3, #8
|
||
8002878: b29b uxth r3, r3
|
||
800287a: b2da uxtb r2, r3
|
||
800287c: 68fb ldr r3, [r7, #12]
|
||
800287e: 681b ldr r3, [r3, #0]
|
||
8002880: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
8002882: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8002884: 6a39 ldr r1, [r7, #32]
|
||
8002886: 68f8 ldr r0, [r7, #12]
|
||
8002888: f000 f9dc bl 8002c44 <I2C_WaitOnTXEFlagUntilTimeout>
|
||
800288c: 4603 mov r3, r0
|
||
800288e: 2b00 cmp r3, #0
|
||
8002890: d00d beq.n 80028ae <I2C_RequestMemoryWrite+0x112>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
8002892: 68fb ldr r3, [r7, #12]
|
||
8002894: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002896: 2b04 cmp r3, #4
|
||
8002898: d107 bne.n 80028aa <I2C_RequestMemoryWrite+0x10e>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
800289a: 68fb ldr r3, [r7, #12]
|
||
800289c: 681b ldr r3, [r3, #0]
|
||
800289e: 681a ldr r2, [r3, #0]
|
||
80028a0: 68fb ldr r3, [r7, #12]
|
||
80028a2: 681b ldr r3, [r3, #0]
|
||
80028a4: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
80028a8: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
80028aa: 2301 movs r3, #1
|
||
80028ac: e005 b.n 80028ba <I2C_RequestMemoryWrite+0x11e>
|
||
}
|
||
|
||
/* Send LSB of Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
||
80028ae: 893b ldrh r3, [r7, #8]
|
||
80028b0: b2da uxtb r2, r3
|
||
80028b2: 68fb ldr r3, [r7, #12]
|
||
80028b4: 681b ldr r3, [r3, #0]
|
||
80028b6: 611a str r2, [r3, #16]
|
||
}
|
||
|
||
return HAL_OK;
|
||
80028b8: 2300 movs r3, #0
|
||
}
|
||
80028ba: 4618 mov r0, r3
|
||
80028bc: 3718 adds r7, #24
|
||
80028be: 46bd mov sp, r7
|
||
80028c0: bd80 pop {r7, pc}
|
||
80028c2: bf00 nop
|
||
80028c4: 00010002 .word 0x00010002
|
||
|
||
080028c8 <I2C_RequestMemoryRead>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
80028c8: b580 push {r7, lr}
|
||
80028ca: b088 sub sp, #32
|
||
80028cc: af02 add r7, sp, #8
|
||
80028ce: 60f8 str r0, [r7, #12]
|
||
80028d0: 4608 mov r0, r1
|
||
80028d2: 4611 mov r1, r2
|
||
80028d4: 461a mov r2, r3
|
||
80028d6: 4603 mov r3, r0
|
||
80028d8: 817b strh r3, [r7, #10]
|
||
80028da: 460b mov r3, r1
|
||
80028dc: 813b strh r3, [r7, #8]
|
||
80028de: 4613 mov r3, r2
|
||
80028e0: 80fb strh r3, [r7, #6]
|
||
/* Enable Acknowledge */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
80028e2: 68fb ldr r3, [r7, #12]
|
||
80028e4: 681b ldr r3, [r3, #0]
|
||
80028e6: 681a ldr r2, [r3, #0]
|
||
80028e8: 68fb ldr r3, [r7, #12]
|
||
80028ea: 681b ldr r3, [r3, #0]
|
||
80028ec: f442 6280 orr.w r2, r2, #1024 ; 0x400
|
||
80028f0: 601a str r2, [r3, #0]
|
||
|
||
/* Generate Start */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
||
80028f2: 68fb ldr r3, [r7, #12]
|
||
80028f4: 681b ldr r3, [r3, #0]
|
||
80028f6: 681a ldr r2, [r3, #0]
|
||
80028f8: 68fb ldr r3, [r7, #12]
|
||
80028fa: 681b ldr r3, [r3, #0]
|
||
80028fc: f442 7280 orr.w r2, r2, #256 ; 0x100
|
||
8002900: 601a str r2, [r3, #0]
|
||
|
||
/* Wait until SB flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
||
8002902: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002904: 9300 str r3, [sp, #0]
|
||
8002906: 6a3b ldr r3, [r7, #32]
|
||
8002908: 2200 movs r2, #0
|
||
800290a: f04f 1101 mov.w r1, #65537 ; 0x10001
|
||
800290e: 68f8 ldr r0, [r7, #12]
|
||
8002910: f000 f8c2 bl 8002a98 <I2C_WaitOnFlagUntilTimeout>
|
||
8002914: 4603 mov r3, r0
|
||
8002916: 2b00 cmp r3, #0
|
||
8002918: d00d beq.n 8002936 <I2C_RequestMemoryRead+0x6e>
|
||
{
|
||
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
||
800291a: 68fb ldr r3, [r7, #12]
|
||
800291c: 681b ldr r3, [r3, #0]
|
||
800291e: 681b ldr r3, [r3, #0]
|
||
8002920: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8002924: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
8002928: d103 bne.n 8002932 <I2C_RequestMemoryRead+0x6a>
|
||
{
|
||
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
||
800292a: 68fb ldr r3, [r7, #12]
|
||
800292c: f44f 7200 mov.w r2, #512 ; 0x200
|
||
8002930: 641a str r2, [r3, #64] ; 0x40
|
||
}
|
||
return HAL_TIMEOUT;
|
||
8002932: 2303 movs r3, #3
|
||
8002934: e0aa b.n 8002a8c <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Send slave address */
|
||
hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
|
||
8002936: 897b ldrh r3, [r7, #10]
|
||
8002938: b2db uxtb r3, r3
|
||
800293a: 461a mov r2, r3
|
||
800293c: 68fb ldr r3, [r7, #12]
|
||
800293e: 681b ldr r3, [r3, #0]
|
||
8002940: f002 02fe and.w r2, r2, #254 ; 0xfe
|
||
8002944: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until ADDR flag is set */
|
||
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
||
8002946: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002948: 6a3a ldr r2, [r7, #32]
|
||
800294a: 4952 ldr r1, [pc, #328] ; (8002a94 <I2C_RequestMemoryRead+0x1cc>)
|
||
800294c: 68f8 ldr r0, [r7, #12]
|
||
800294e: f000 f8fa bl 8002b46 <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
||
8002952: 4603 mov r3, r0
|
||
8002954: 2b00 cmp r3, #0
|
||
8002956: d001 beq.n 800295c <I2C_RequestMemoryRead+0x94>
|
||
{
|
||
return HAL_ERROR;
|
||
8002958: 2301 movs r3, #1
|
||
800295a: e097 b.n 8002a8c <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
800295c: 2300 movs r3, #0
|
||
800295e: 617b str r3, [r7, #20]
|
||
8002960: 68fb ldr r3, [r7, #12]
|
||
8002962: 681b ldr r3, [r3, #0]
|
||
8002964: 695b ldr r3, [r3, #20]
|
||
8002966: 617b str r3, [r7, #20]
|
||
8002968: 68fb ldr r3, [r7, #12]
|
||
800296a: 681b ldr r3, [r3, #0]
|
||
800296c: 699b ldr r3, [r3, #24]
|
||
800296e: 617b str r3, [r7, #20]
|
||
8002970: 697b ldr r3, [r7, #20]
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
8002972: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8002974: 6a39 ldr r1, [r7, #32]
|
||
8002976: 68f8 ldr r0, [r7, #12]
|
||
8002978: f000 f964 bl 8002c44 <I2C_WaitOnTXEFlagUntilTimeout>
|
||
800297c: 4603 mov r3, r0
|
||
800297e: 2b00 cmp r3, #0
|
||
8002980: d00d beq.n 800299e <I2C_RequestMemoryRead+0xd6>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
8002982: 68fb ldr r3, [r7, #12]
|
||
8002984: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002986: 2b04 cmp r3, #4
|
||
8002988: d107 bne.n 800299a <I2C_RequestMemoryRead+0xd2>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
800298a: 68fb ldr r3, [r7, #12]
|
||
800298c: 681b ldr r3, [r3, #0]
|
||
800298e: 681a ldr r2, [r3, #0]
|
||
8002990: 68fb ldr r3, [r7, #12]
|
||
8002992: 681b ldr r3, [r3, #0]
|
||
8002994: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002998: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
800299a: 2301 movs r3, #1
|
||
800299c: e076 b.n 8002a8c <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* If Memory address size is 8Bit */
|
||
if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
|
||
800299e: 88fb ldrh r3, [r7, #6]
|
||
80029a0: 2b01 cmp r3, #1
|
||
80029a2: d105 bne.n 80029b0 <I2C_RequestMemoryRead+0xe8>
|
||
{
|
||
/* Send Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
||
80029a4: 893b ldrh r3, [r7, #8]
|
||
80029a6: b2da uxtb r2, r3
|
||
80029a8: 68fb ldr r3, [r7, #12]
|
||
80029aa: 681b ldr r3, [r3, #0]
|
||
80029ac: 611a str r2, [r3, #16]
|
||
80029ae: e021 b.n 80029f4 <I2C_RequestMemoryRead+0x12c>
|
||
}
|
||
/* If Memory address size is 16Bit */
|
||
else
|
||
{
|
||
/* Send MSB of Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
|
||
80029b0: 893b ldrh r3, [r7, #8]
|
||
80029b2: 0a1b lsrs r3, r3, #8
|
||
80029b4: b29b uxth r3, r3
|
||
80029b6: b2da uxtb r2, r3
|
||
80029b8: 68fb ldr r3, [r7, #12]
|
||
80029ba: 681b ldr r3, [r3, #0]
|
||
80029bc: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
80029be: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
80029c0: 6a39 ldr r1, [r7, #32]
|
||
80029c2: 68f8 ldr r0, [r7, #12]
|
||
80029c4: f000 f93e bl 8002c44 <I2C_WaitOnTXEFlagUntilTimeout>
|
||
80029c8: 4603 mov r3, r0
|
||
80029ca: 2b00 cmp r3, #0
|
||
80029cc: d00d beq.n 80029ea <I2C_RequestMemoryRead+0x122>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
80029ce: 68fb ldr r3, [r7, #12]
|
||
80029d0: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
80029d2: 2b04 cmp r3, #4
|
||
80029d4: d107 bne.n 80029e6 <I2C_RequestMemoryRead+0x11e>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
80029d6: 68fb ldr r3, [r7, #12]
|
||
80029d8: 681b ldr r3, [r3, #0]
|
||
80029da: 681a ldr r2, [r3, #0]
|
||
80029dc: 68fb ldr r3, [r7, #12]
|
||
80029de: 681b ldr r3, [r3, #0]
|
||
80029e0: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
80029e4: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
80029e6: 2301 movs r3, #1
|
||
80029e8: e050 b.n 8002a8c <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Send LSB of Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
||
80029ea: 893b ldrh r3, [r7, #8]
|
||
80029ec: b2da uxtb r2, r3
|
||
80029ee: 68fb ldr r3, [r7, #12]
|
||
80029f0: 681b ldr r3, [r3, #0]
|
||
80029f2: 611a str r2, [r3, #16]
|
||
}
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
80029f4: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
80029f6: 6a39 ldr r1, [r7, #32]
|
||
80029f8: 68f8 ldr r0, [r7, #12]
|
||
80029fa: f000 f923 bl 8002c44 <I2C_WaitOnTXEFlagUntilTimeout>
|
||
80029fe: 4603 mov r3, r0
|
||
8002a00: 2b00 cmp r3, #0
|
||
8002a02: d00d beq.n 8002a20 <I2C_RequestMemoryRead+0x158>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
8002a04: 68fb ldr r3, [r7, #12]
|
||
8002a06: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002a08: 2b04 cmp r3, #4
|
||
8002a0a: d107 bne.n 8002a1c <I2C_RequestMemoryRead+0x154>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002a0c: 68fb ldr r3, [r7, #12]
|
||
8002a0e: 681b ldr r3, [r3, #0]
|
||
8002a10: 681a ldr r2, [r3, #0]
|
||
8002a12: 68fb ldr r3, [r7, #12]
|
||
8002a14: 681b ldr r3, [r3, #0]
|
||
8002a16: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002a1a: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
8002a1c: 2301 movs r3, #1
|
||
8002a1e: e035 b.n 8002a8c <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Generate Restart */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
||
8002a20: 68fb ldr r3, [r7, #12]
|
||
8002a22: 681b ldr r3, [r3, #0]
|
||
8002a24: 681a ldr r2, [r3, #0]
|
||
8002a26: 68fb ldr r3, [r7, #12]
|
||
8002a28: 681b ldr r3, [r3, #0]
|
||
8002a2a: f442 7280 orr.w r2, r2, #256 ; 0x100
|
||
8002a2e: 601a str r2, [r3, #0]
|
||
|
||
/* Wait until SB flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
||
8002a30: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002a32: 9300 str r3, [sp, #0]
|
||
8002a34: 6a3b ldr r3, [r7, #32]
|
||
8002a36: 2200 movs r2, #0
|
||
8002a38: f04f 1101 mov.w r1, #65537 ; 0x10001
|
||
8002a3c: 68f8 ldr r0, [r7, #12]
|
||
8002a3e: f000 f82b bl 8002a98 <I2C_WaitOnFlagUntilTimeout>
|
||
8002a42: 4603 mov r3, r0
|
||
8002a44: 2b00 cmp r3, #0
|
||
8002a46: d00d beq.n 8002a64 <I2C_RequestMemoryRead+0x19c>
|
||
{
|
||
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
||
8002a48: 68fb ldr r3, [r7, #12]
|
||
8002a4a: 681b ldr r3, [r3, #0]
|
||
8002a4c: 681b ldr r3, [r3, #0]
|
||
8002a4e: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8002a52: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
8002a56: d103 bne.n 8002a60 <I2C_RequestMemoryRead+0x198>
|
||
{
|
||
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
||
8002a58: 68fb ldr r3, [r7, #12]
|
||
8002a5a: f44f 7200 mov.w r2, #512 ; 0x200
|
||
8002a5e: 641a str r2, [r3, #64] ; 0x40
|
||
}
|
||
return HAL_TIMEOUT;
|
||
8002a60: 2303 movs r3, #3
|
||
8002a62: e013 b.n 8002a8c <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Send slave address */
|
||
hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
|
||
8002a64: 897b ldrh r3, [r7, #10]
|
||
8002a66: b2db uxtb r3, r3
|
||
8002a68: f043 0301 orr.w r3, r3, #1
|
||
8002a6c: b2da uxtb r2, r3
|
||
8002a6e: 68fb ldr r3, [r7, #12]
|
||
8002a70: 681b ldr r3, [r3, #0]
|
||
8002a72: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until ADDR flag is set */
|
||
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
||
8002a74: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002a76: 6a3a ldr r2, [r7, #32]
|
||
8002a78: 4906 ldr r1, [pc, #24] ; (8002a94 <I2C_RequestMemoryRead+0x1cc>)
|
||
8002a7a: 68f8 ldr r0, [r7, #12]
|
||
8002a7c: f000 f863 bl 8002b46 <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
||
8002a80: 4603 mov r3, r0
|
||
8002a82: 2b00 cmp r3, #0
|
||
8002a84: d001 beq.n 8002a8a <I2C_RequestMemoryRead+0x1c2>
|
||
{
|
||
return HAL_ERROR;
|
||
8002a86: 2301 movs r3, #1
|
||
8002a88: e000 b.n 8002a8c <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
return HAL_OK;
|
||
8002a8a: 2300 movs r3, #0
|
||
}
|
||
8002a8c: 4618 mov r0, r3
|
||
8002a8e: 3718 adds r7, #24
|
||
8002a90: 46bd mov sp, r7
|
||
8002a92: bd80 pop {r7, pc}
|
||
8002a94: 00010002 .word 0x00010002
|
||
|
||
08002a98 <I2C_WaitOnFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002a98: b580 push {r7, lr}
|
||
8002a9a: b084 sub sp, #16
|
||
8002a9c: af00 add r7, sp, #0
|
||
8002a9e: 60f8 str r0, [r7, #12]
|
||
8002aa0: 60b9 str r1, [r7, #8]
|
||
8002aa2: 603b str r3, [r7, #0]
|
||
8002aa4: 4613 mov r3, r2
|
||
8002aa6: 71fb strb r3, [r7, #7]
|
||
/* Wait until flag is set */
|
||
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
||
8002aa8: e025 b.n 8002af6 <I2C_WaitOnFlagUntilTimeout+0x5e>
|
||
{
|
||
/* Check for the Timeout */
|
||
if (Timeout != HAL_MAX_DELAY)
|
||
8002aaa: 683b ldr r3, [r7, #0]
|
||
8002aac: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
8002ab0: d021 beq.n 8002af6 <I2C_WaitOnFlagUntilTimeout+0x5e>
|
||
{
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002ab2: f7fe fef7 bl 80018a4 <HAL_GetTick>
|
||
8002ab6: 4602 mov r2, r0
|
||
8002ab8: 69bb ldr r3, [r7, #24]
|
||
8002aba: 1ad3 subs r3, r2, r3
|
||
8002abc: 683a ldr r2, [r7, #0]
|
||
8002abe: 429a cmp r2, r3
|
||
8002ac0: d302 bcc.n 8002ac8 <I2C_WaitOnFlagUntilTimeout+0x30>
|
||
8002ac2: 683b ldr r3, [r7, #0]
|
||
8002ac4: 2b00 cmp r3, #0
|
||
8002ac6: d116 bne.n 8002af6 <I2C_WaitOnFlagUntilTimeout+0x5e>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002ac8: 68fb ldr r3, [r7, #12]
|
||
8002aca: 2200 movs r2, #0
|
||
8002acc: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002ace: 68fb ldr r3, [r7, #12]
|
||
8002ad0: 2220 movs r2, #32
|
||
8002ad2: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002ad6: 68fb ldr r3, [r7, #12]
|
||
8002ad8: 2200 movs r2, #0
|
||
8002ada: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002ade: 68fb ldr r3, [r7, #12]
|
||
8002ae0: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002ae2: f043 0220 orr.w r2, r3, #32
|
||
8002ae6: 68fb ldr r3, [r7, #12]
|
||
8002ae8: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002aea: 68fb ldr r3, [r7, #12]
|
||
8002aec: 2200 movs r2, #0
|
||
8002aee: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002af2: 2301 movs r3, #1
|
||
8002af4: e023 b.n 8002b3e <I2C_WaitOnFlagUntilTimeout+0xa6>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
||
8002af6: 68bb ldr r3, [r7, #8]
|
||
8002af8: 0c1b lsrs r3, r3, #16
|
||
8002afa: b2db uxtb r3, r3
|
||
8002afc: 2b01 cmp r3, #1
|
||
8002afe: d10d bne.n 8002b1c <I2C_WaitOnFlagUntilTimeout+0x84>
|
||
8002b00: 68fb ldr r3, [r7, #12]
|
||
8002b02: 681b ldr r3, [r3, #0]
|
||
8002b04: 695b ldr r3, [r3, #20]
|
||
8002b06: 43da mvns r2, r3
|
||
8002b08: 68bb ldr r3, [r7, #8]
|
||
8002b0a: 4013 ands r3, r2
|
||
8002b0c: b29b uxth r3, r3
|
||
8002b0e: 2b00 cmp r3, #0
|
||
8002b10: bf0c ite eq
|
||
8002b12: 2301 moveq r3, #1
|
||
8002b14: 2300 movne r3, #0
|
||
8002b16: b2db uxtb r3, r3
|
||
8002b18: 461a mov r2, r3
|
||
8002b1a: e00c b.n 8002b36 <I2C_WaitOnFlagUntilTimeout+0x9e>
|
||
8002b1c: 68fb ldr r3, [r7, #12]
|
||
8002b1e: 681b ldr r3, [r3, #0]
|
||
8002b20: 699b ldr r3, [r3, #24]
|
||
8002b22: 43da mvns r2, r3
|
||
8002b24: 68bb ldr r3, [r7, #8]
|
||
8002b26: 4013 ands r3, r2
|
||
8002b28: b29b uxth r3, r3
|
||
8002b2a: 2b00 cmp r3, #0
|
||
8002b2c: bf0c ite eq
|
||
8002b2e: 2301 moveq r3, #1
|
||
8002b30: 2300 movne r3, #0
|
||
8002b32: b2db uxtb r3, r3
|
||
8002b34: 461a mov r2, r3
|
||
8002b36: 79fb ldrb r3, [r7, #7]
|
||
8002b38: 429a cmp r2, r3
|
||
8002b3a: d0b6 beq.n 8002aaa <I2C_WaitOnFlagUntilTimeout+0x12>
|
||
}
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002b3c: 2300 movs r3, #0
|
||
}
|
||
8002b3e: 4618 mov r0, r3
|
||
8002b40: 3710 adds r7, #16
|
||
8002b42: 46bd mov sp, r7
|
||
8002b44: bd80 pop {r7, pc}
|
||
|
||
08002b46 <I2C_WaitOnMasterAddressFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002b46: b580 push {r7, lr}
|
||
8002b48: b084 sub sp, #16
|
||
8002b4a: af00 add r7, sp, #0
|
||
8002b4c: 60f8 str r0, [r7, #12]
|
||
8002b4e: 60b9 str r1, [r7, #8]
|
||
8002b50: 607a str r2, [r7, #4]
|
||
8002b52: 603b str r3, [r7, #0]
|
||
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
|
||
8002b54: e051 b.n 8002bfa <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
|
||
{
|
||
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
|
||
8002b56: 68fb ldr r3, [r7, #12]
|
||
8002b58: 681b ldr r3, [r3, #0]
|
||
8002b5a: 695b ldr r3, [r3, #20]
|
||
8002b5c: f403 6380 and.w r3, r3, #1024 ; 0x400
|
||
8002b60: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
||
8002b64: d123 bne.n 8002bae <I2C_WaitOnMasterAddressFlagUntilTimeout+0x68>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002b66: 68fb ldr r3, [r7, #12]
|
||
8002b68: 681b ldr r3, [r3, #0]
|
||
8002b6a: 681a ldr r2, [r3, #0]
|
||
8002b6c: 68fb ldr r3, [r7, #12]
|
||
8002b6e: 681b ldr r3, [r3, #0]
|
||
8002b70: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002b74: 601a str r2, [r3, #0]
|
||
|
||
/* Clear AF Flag */
|
||
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
||
8002b76: 68fb ldr r3, [r7, #12]
|
||
8002b78: 681b ldr r3, [r3, #0]
|
||
8002b7a: f46f 6280 mvn.w r2, #1024 ; 0x400
|
||
8002b7e: 615a str r2, [r3, #20]
|
||
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002b80: 68fb ldr r3, [r7, #12]
|
||
8002b82: 2200 movs r2, #0
|
||
8002b84: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002b86: 68fb ldr r3, [r7, #12]
|
||
8002b88: 2220 movs r2, #32
|
||
8002b8a: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002b8e: 68fb ldr r3, [r7, #12]
|
||
8002b90: 2200 movs r2, #0
|
||
8002b92: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
|
||
8002b96: 68fb ldr r3, [r7, #12]
|
||
8002b98: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002b9a: f043 0204 orr.w r2, r3, #4
|
||
8002b9e: 68fb ldr r3, [r7, #12]
|
||
8002ba0: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002ba2: 68fb ldr r3, [r7, #12]
|
||
8002ba4: 2200 movs r2, #0
|
||
8002ba6: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002baa: 2301 movs r3, #1
|
||
8002bac: e046 b.n 8002c3c <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf6>
|
||
}
|
||
|
||
/* Check for the Timeout */
|
||
if (Timeout != HAL_MAX_DELAY)
|
||
8002bae: 687b ldr r3, [r7, #4]
|
||
8002bb0: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
8002bb4: d021 beq.n 8002bfa <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
|
||
{
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002bb6: f7fe fe75 bl 80018a4 <HAL_GetTick>
|
||
8002bba: 4602 mov r2, r0
|
||
8002bbc: 683b ldr r3, [r7, #0]
|
||
8002bbe: 1ad3 subs r3, r2, r3
|
||
8002bc0: 687a ldr r2, [r7, #4]
|
||
8002bc2: 429a cmp r2, r3
|
||
8002bc4: d302 bcc.n 8002bcc <I2C_WaitOnMasterAddressFlagUntilTimeout+0x86>
|
||
8002bc6: 687b ldr r3, [r7, #4]
|
||
8002bc8: 2b00 cmp r3, #0
|
||
8002bca: d116 bne.n 8002bfa <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002bcc: 68fb ldr r3, [r7, #12]
|
||
8002bce: 2200 movs r2, #0
|
||
8002bd0: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002bd2: 68fb ldr r3, [r7, #12]
|
||
8002bd4: 2220 movs r2, #32
|
||
8002bd6: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002bda: 68fb ldr r3, [r7, #12]
|
||
8002bdc: 2200 movs r2, #0
|
||
8002bde: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002be2: 68fb ldr r3, [r7, #12]
|
||
8002be4: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002be6: f043 0220 orr.w r2, r3, #32
|
||
8002bea: 68fb ldr r3, [r7, #12]
|
||
8002bec: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002bee: 68fb ldr r3, [r7, #12]
|
||
8002bf0: 2200 movs r2, #0
|
||
8002bf2: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002bf6: 2301 movs r3, #1
|
||
8002bf8: e020 b.n 8002c3c <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf6>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
|
||
8002bfa: 68bb ldr r3, [r7, #8]
|
||
8002bfc: 0c1b lsrs r3, r3, #16
|
||
8002bfe: b2db uxtb r3, r3
|
||
8002c00: 2b01 cmp r3, #1
|
||
8002c02: d10c bne.n 8002c1e <I2C_WaitOnMasterAddressFlagUntilTimeout+0xd8>
|
||
8002c04: 68fb ldr r3, [r7, #12]
|
||
8002c06: 681b ldr r3, [r3, #0]
|
||
8002c08: 695b ldr r3, [r3, #20]
|
||
8002c0a: 43da mvns r2, r3
|
||
8002c0c: 68bb ldr r3, [r7, #8]
|
||
8002c0e: 4013 ands r3, r2
|
||
8002c10: b29b uxth r3, r3
|
||
8002c12: 2b00 cmp r3, #0
|
||
8002c14: bf14 ite ne
|
||
8002c16: 2301 movne r3, #1
|
||
8002c18: 2300 moveq r3, #0
|
||
8002c1a: b2db uxtb r3, r3
|
||
8002c1c: e00b b.n 8002c36 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf0>
|
||
8002c1e: 68fb ldr r3, [r7, #12]
|
||
8002c20: 681b ldr r3, [r3, #0]
|
||
8002c22: 699b ldr r3, [r3, #24]
|
||
8002c24: 43da mvns r2, r3
|
||
8002c26: 68bb ldr r3, [r7, #8]
|
||
8002c28: 4013 ands r3, r2
|
||
8002c2a: b29b uxth r3, r3
|
||
8002c2c: 2b00 cmp r3, #0
|
||
8002c2e: bf14 ite ne
|
||
8002c30: 2301 movne r3, #1
|
||
8002c32: 2300 moveq r3, #0
|
||
8002c34: b2db uxtb r3, r3
|
||
8002c36: 2b00 cmp r3, #0
|
||
8002c38: d18d bne.n 8002b56 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
|
||
}
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002c3a: 2300 movs r3, #0
|
||
}
|
||
8002c3c: 4618 mov r0, r3
|
||
8002c3e: 3710 adds r7, #16
|
||
8002c40: 46bd mov sp, r7
|
||
8002c42: bd80 pop {r7, pc}
|
||
|
||
08002c44 <I2C_WaitOnTXEFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002c44: b580 push {r7, lr}
|
||
8002c46: b084 sub sp, #16
|
||
8002c48: af00 add r7, sp, #0
|
||
8002c4a: 60f8 str r0, [r7, #12]
|
||
8002c4c: 60b9 str r1, [r7, #8]
|
||
8002c4e: 607a str r2, [r7, #4]
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
|
||
8002c50: e02d b.n 8002cae <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
|
||
{
|
||
/* Check if a NACK is detected */
|
||
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
|
||
8002c52: 68f8 ldr r0, [r7, #12]
|
||
8002c54: f000 f8ce bl 8002df4 <I2C_IsAcknowledgeFailed>
|
||
8002c58: 4603 mov r3, r0
|
||
8002c5a: 2b00 cmp r3, #0
|
||
8002c5c: d001 beq.n 8002c62 <I2C_WaitOnTXEFlagUntilTimeout+0x1e>
|
||
{
|
||
return HAL_ERROR;
|
||
8002c5e: 2301 movs r3, #1
|
||
8002c60: e02d b.n 8002cbe <I2C_WaitOnTXEFlagUntilTimeout+0x7a>
|
||
}
|
||
|
||
/* Check for the Timeout */
|
||
if (Timeout != HAL_MAX_DELAY)
|
||
8002c62: 68bb ldr r3, [r7, #8]
|
||
8002c64: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
8002c68: d021 beq.n 8002cae <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
|
||
{
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002c6a: f7fe fe1b bl 80018a4 <HAL_GetTick>
|
||
8002c6e: 4602 mov r2, r0
|
||
8002c70: 687b ldr r3, [r7, #4]
|
||
8002c72: 1ad3 subs r3, r2, r3
|
||
8002c74: 68ba ldr r2, [r7, #8]
|
||
8002c76: 429a cmp r2, r3
|
||
8002c78: d302 bcc.n 8002c80 <I2C_WaitOnTXEFlagUntilTimeout+0x3c>
|
||
8002c7a: 68bb ldr r3, [r7, #8]
|
||
8002c7c: 2b00 cmp r3, #0
|
||
8002c7e: d116 bne.n 8002cae <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002c80: 68fb ldr r3, [r7, #12]
|
||
8002c82: 2200 movs r2, #0
|
||
8002c84: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002c86: 68fb ldr r3, [r7, #12]
|
||
8002c88: 2220 movs r2, #32
|
||
8002c8a: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002c8e: 68fb ldr r3, [r7, #12]
|
||
8002c90: 2200 movs r2, #0
|
||
8002c92: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002c96: 68fb ldr r3, [r7, #12]
|
||
8002c98: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002c9a: f043 0220 orr.w r2, r3, #32
|
||
8002c9e: 68fb ldr r3, [r7, #12]
|
||
8002ca0: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002ca2: 68fb ldr r3, [r7, #12]
|
||
8002ca4: 2200 movs r2, #0
|
||
8002ca6: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002caa: 2301 movs r3, #1
|
||
8002cac: e007 b.n 8002cbe <I2C_WaitOnTXEFlagUntilTimeout+0x7a>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
|
||
8002cae: 68fb ldr r3, [r7, #12]
|
||
8002cb0: 681b ldr r3, [r3, #0]
|
||
8002cb2: 695b ldr r3, [r3, #20]
|
||
8002cb4: f003 0380 and.w r3, r3, #128 ; 0x80
|
||
8002cb8: 2b80 cmp r3, #128 ; 0x80
|
||
8002cba: d1ca bne.n 8002c52 <I2C_WaitOnTXEFlagUntilTimeout+0xe>
|
||
}
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002cbc: 2300 movs r3, #0
|
||
}
|
||
8002cbe: 4618 mov r0, r3
|
||
8002cc0: 3710 adds r7, #16
|
||
8002cc2: 46bd mov sp, r7
|
||
8002cc4: bd80 pop {r7, pc}
|
||
|
||
08002cc6 <I2C_WaitOnBTFFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002cc6: b580 push {r7, lr}
|
||
8002cc8: b084 sub sp, #16
|
||
8002cca: af00 add r7, sp, #0
|
||
8002ccc: 60f8 str r0, [r7, #12]
|
||
8002cce: 60b9 str r1, [r7, #8]
|
||
8002cd0: 607a str r2, [r7, #4]
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
|
||
8002cd2: e02d b.n 8002d30 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
|
||
{
|
||
/* Check if a NACK is detected */
|
||
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
|
||
8002cd4: 68f8 ldr r0, [r7, #12]
|
||
8002cd6: f000 f88d bl 8002df4 <I2C_IsAcknowledgeFailed>
|
||
8002cda: 4603 mov r3, r0
|
||
8002cdc: 2b00 cmp r3, #0
|
||
8002cde: d001 beq.n 8002ce4 <I2C_WaitOnBTFFlagUntilTimeout+0x1e>
|
||
{
|
||
return HAL_ERROR;
|
||
8002ce0: 2301 movs r3, #1
|
||
8002ce2: e02d b.n 8002d40 <I2C_WaitOnBTFFlagUntilTimeout+0x7a>
|
||
}
|
||
|
||
/* Check for the Timeout */
|
||
if (Timeout != HAL_MAX_DELAY)
|
||
8002ce4: 68bb ldr r3, [r7, #8]
|
||
8002ce6: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
8002cea: d021 beq.n 8002d30 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
|
||
{
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002cec: f7fe fdda bl 80018a4 <HAL_GetTick>
|
||
8002cf0: 4602 mov r2, r0
|
||
8002cf2: 687b ldr r3, [r7, #4]
|
||
8002cf4: 1ad3 subs r3, r2, r3
|
||
8002cf6: 68ba ldr r2, [r7, #8]
|
||
8002cf8: 429a cmp r2, r3
|
||
8002cfa: d302 bcc.n 8002d02 <I2C_WaitOnBTFFlagUntilTimeout+0x3c>
|
||
8002cfc: 68bb ldr r3, [r7, #8]
|
||
8002cfe: 2b00 cmp r3, #0
|
||
8002d00: d116 bne.n 8002d30 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002d02: 68fb ldr r3, [r7, #12]
|
||
8002d04: 2200 movs r2, #0
|
||
8002d06: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002d08: 68fb ldr r3, [r7, #12]
|
||
8002d0a: 2220 movs r2, #32
|
||
8002d0c: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002d10: 68fb ldr r3, [r7, #12]
|
||
8002d12: 2200 movs r2, #0
|
||
8002d14: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002d18: 68fb ldr r3, [r7, #12]
|
||
8002d1a: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002d1c: f043 0220 orr.w r2, r3, #32
|
||
8002d20: 68fb ldr r3, [r7, #12]
|
||
8002d22: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002d24: 68fb ldr r3, [r7, #12]
|
||
8002d26: 2200 movs r2, #0
|
||
8002d28: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002d2c: 2301 movs r3, #1
|
||
8002d2e: e007 b.n 8002d40 <I2C_WaitOnBTFFlagUntilTimeout+0x7a>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
|
||
8002d30: 68fb ldr r3, [r7, #12]
|
||
8002d32: 681b ldr r3, [r3, #0]
|
||
8002d34: 695b ldr r3, [r3, #20]
|
||
8002d36: f003 0304 and.w r3, r3, #4
|
||
8002d3a: 2b04 cmp r3, #4
|
||
8002d3c: d1ca bne.n 8002cd4 <I2C_WaitOnBTFFlagUntilTimeout+0xe>
|
||
}
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002d3e: 2300 movs r3, #0
|
||
}
|
||
8002d40: 4618 mov r0, r3
|
||
8002d42: 3710 adds r7, #16
|
||
8002d44: 46bd mov sp, r7
|
||
8002d46: bd80 pop {r7, pc}
|
||
|
||
08002d48 <I2C_WaitOnRXNEFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002d48: b580 push {r7, lr}
|
||
8002d4a: b084 sub sp, #16
|
||
8002d4c: af00 add r7, sp, #0
|
||
8002d4e: 60f8 str r0, [r7, #12]
|
||
8002d50: 60b9 str r1, [r7, #8]
|
||
8002d52: 607a str r2, [r7, #4]
|
||
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
|
||
8002d54: e042 b.n 8002ddc <I2C_WaitOnRXNEFlagUntilTimeout+0x94>
|
||
{
|
||
/* Check if a STOPF is detected */
|
||
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
|
||
8002d56: 68fb ldr r3, [r7, #12]
|
||
8002d58: 681b ldr r3, [r3, #0]
|
||
8002d5a: 695b ldr r3, [r3, #20]
|
||
8002d5c: f003 0310 and.w r3, r3, #16
|
||
8002d60: 2b10 cmp r3, #16
|
||
8002d62: d119 bne.n 8002d98 <I2C_WaitOnRXNEFlagUntilTimeout+0x50>
|
||
{
|
||
/* Clear STOP Flag */
|
||
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
|
||
8002d64: 68fb ldr r3, [r7, #12]
|
||
8002d66: 681b ldr r3, [r3, #0]
|
||
8002d68: f06f 0210 mvn.w r2, #16
|
||
8002d6c: 615a str r2, [r3, #20]
|
||
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002d6e: 68fb ldr r3, [r7, #12]
|
||
8002d70: 2200 movs r2, #0
|
||
8002d72: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002d74: 68fb ldr r3, [r7, #12]
|
||
8002d76: 2220 movs r2, #32
|
||
8002d78: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002d7c: 68fb ldr r3, [r7, #12]
|
||
8002d7e: 2200 movs r2, #0
|
||
8002d80: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_NONE;
|
||
8002d84: 68fb ldr r3, [r7, #12]
|
||
8002d86: 6c1a ldr r2, [r3, #64] ; 0x40
|
||
8002d88: 68fb ldr r3, [r7, #12]
|
||
8002d8a: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002d8c: 68fb ldr r3, [r7, #12]
|
||
8002d8e: 2200 movs r2, #0
|
||
8002d90: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002d94: 2301 movs r3, #1
|
||
8002d96: e029 b.n 8002dec <I2C_WaitOnRXNEFlagUntilTimeout+0xa4>
|
||
}
|
||
|
||
/* Check for the Timeout */
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002d98: f7fe fd84 bl 80018a4 <HAL_GetTick>
|
||
8002d9c: 4602 mov r2, r0
|
||
8002d9e: 687b ldr r3, [r7, #4]
|
||
8002da0: 1ad3 subs r3, r2, r3
|
||
8002da2: 68ba ldr r2, [r7, #8]
|
||
8002da4: 429a cmp r2, r3
|
||
8002da6: d302 bcc.n 8002dae <I2C_WaitOnRXNEFlagUntilTimeout+0x66>
|
||
8002da8: 68bb ldr r3, [r7, #8]
|
||
8002daa: 2b00 cmp r3, #0
|
||
8002dac: d116 bne.n 8002ddc <I2C_WaitOnRXNEFlagUntilTimeout+0x94>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002dae: 68fb ldr r3, [r7, #12]
|
||
8002db0: 2200 movs r2, #0
|
||
8002db2: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002db4: 68fb ldr r3, [r7, #12]
|
||
8002db6: 2220 movs r2, #32
|
||
8002db8: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002dbc: 68fb ldr r3, [r7, #12]
|
||
8002dbe: 2200 movs r2, #0
|
||
8002dc0: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002dc4: 68fb ldr r3, [r7, #12]
|
||
8002dc6: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002dc8: f043 0220 orr.w r2, r3, #32
|
||
8002dcc: 68fb ldr r3, [r7, #12]
|
||
8002dce: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002dd0: 68fb ldr r3, [r7, #12]
|
||
8002dd2: 2200 movs r2, #0
|
||
8002dd4: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002dd8: 2301 movs r3, #1
|
||
8002dda: e007 b.n 8002dec <I2C_WaitOnRXNEFlagUntilTimeout+0xa4>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
|
||
8002ddc: 68fb ldr r3, [r7, #12]
|
||
8002dde: 681b ldr r3, [r3, #0]
|
||
8002de0: 695b ldr r3, [r3, #20]
|
||
8002de2: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
8002de6: 2b40 cmp r3, #64 ; 0x40
|
||
8002de8: d1b5 bne.n 8002d56 <I2C_WaitOnRXNEFlagUntilTimeout+0xe>
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002dea: 2300 movs r3, #0
|
||
}
|
||
8002dec: 4618 mov r0, r3
|
||
8002dee: 3710 adds r7, #16
|
||
8002df0: 46bd mov sp, r7
|
||
8002df2: bd80 pop {r7, pc}
|
||
|
||
08002df4 <I2C_IsAcknowledgeFailed>:
|
||
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
||
* the configuration information for the specified I2C.
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
|
||
{
|
||
8002df4: b480 push {r7}
|
||
8002df6: b083 sub sp, #12
|
||
8002df8: af00 add r7, sp, #0
|
||
8002dfa: 6078 str r0, [r7, #4]
|
||
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
|
||
8002dfc: 687b ldr r3, [r7, #4]
|
||
8002dfe: 681b ldr r3, [r3, #0]
|
||
8002e00: 695b ldr r3, [r3, #20]
|
||
8002e02: f403 6380 and.w r3, r3, #1024 ; 0x400
|
||
8002e06: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
||
8002e0a: d11b bne.n 8002e44 <I2C_IsAcknowledgeFailed+0x50>
|
||
{
|
||
/* Clear NACKF Flag */
|
||
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
||
8002e0c: 687b ldr r3, [r7, #4]
|
||
8002e0e: 681b ldr r3, [r3, #0]
|
||
8002e10: f46f 6280 mvn.w r2, #1024 ; 0x400
|
||
8002e14: 615a str r2, [r3, #20]
|
||
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002e16: 687b ldr r3, [r7, #4]
|
||
8002e18: 2200 movs r2, #0
|
||
8002e1a: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002e1c: 687b ldr r3, [r7, #4]
|
||
8002e1e: 2220 movs r2, #32
|
||
8002e20: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002e24: 687b ldr r3, [r7, #4]
|
||
8002e26: 2200 movs r2, #0
|
||
8002e28: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
|
||
8002e2c: 687b ldr r3, [r7, #4]
|
||
8002e2e: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002e30: f043 0204 orr.w r2, r3, #4
|
||
8002e34: 687b ldr r3, [r7, #4]
|
||
8002e36: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002e38: 687b ldr r3, [r7, #4]
|
||
8002e3a: 2200 movs r2, #0
|
||
8002e3c: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002e40: 2301 movs r3, #1
|
||
8002e42: e000 b.n 8002e46 <I2C_IsAcknowledgeFailed+0x52>
|
||
}
|
||
return HAL_OK;
|
||
8002e44: 2300 movs r3, #0
|
||
}
|
||
8002e46: 4618 mov r0, r3
|
||
8002e48: 370c adds r7, #12
|
||
8002e4a: 46bd mov sp, r7
|
||
8002e4c: bc80 pop {r7}
|
||
8002e4e: 4770 bx lr
|
||
|
||
08002e50 <HAL_RCC_OscConfig>:
|
||
* supported by this macro. User should request a transition to HSE Off
|
||
* first and then HSE On or HSE Bypass.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
||
{
|
||
8002e50: b580 push {r7, lr}
|
||
8002e52: b086 sub sp, #24
|
||
8002e54: af00 add r7, sp, #0
|
||
8002e56: 6078 str r0, [r7, #4]
|
||
uint32_t tickstart;
|
||
uint32_t pll_config;
|
||
|
||
/* Check Null pointer */
|
||
if (RCC_OscInitStruct == NULL)
|
||
8002e58: 687b ldr r3, [r7, #4]
|
||
8002e5a: 2b00 cmp r3, #0
|
||
8002e5c: d101 bne.n 8002e62 <HAL_RCC_OscConfig+0x12>
|
||
{
|
||
return HAL_ERROR;
|
||
8002e5e: 2301 movs r3, #1
|
||
8002e60: e26c b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
||
|
||
/*------------------------------- HSE Configuration ------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
||
8002e62: 687b ldr r3, [r7, #4]
|
||
8002e64: 681b ldr r3, [r3, #0]
|
||
8002e66: f003 0301 and.w r3, r3, #1
|
||
8002e6a: 2b00 cmp r3, #0
|
||
8002e6c: f000 8087 beq.w 8002f7e <HAL_RCC_OscConfig+0x12e>
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
|
||
|
||
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
|
||
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
|
||
8002e70: 4b92 ldr r3, [pc, #584] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002e72: 685b ldr r3, [r3, #4]
|
||
8002e74: f003 030c and.w r3, r3, #12
|
||
8002e78: 2b04 cmp r3, #4
|
||
8002e7a: d00c beq.n 8002e96 <HAL_RCC_OscConfig+0x46>
|
||
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
|
||
8002e7c: 4b8f ldr r3, [pc, #572] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002e7e: 685b ldr r3, [r3, #4]
|
||
8002e80: f003 030c and.w r3, r3, #12
|
||
8002e84: 2b08 cmp r3, #8
|
||
8002e86: d112 bne.n 8002eae <HAL_RCC_OscConfig+0x5e>
|
||
8002e88: 4b8c ldr r3, [pc, #560] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002e8a: 685b ldr r3, [r3, #4]
|
||
8002e8c: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8002e90: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8002e94: d10b bne.n 8002eae <HAL_RCC_OscConfig+0x5e>
|
||
{
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
||
8002e96: 4b89 ldr r3, [pc, #548] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002e98: 681b ldr r3, [r3, #0]
|
||
8002e9a: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8002e9e: 2b00 cmp r3, #0
|
||
8002ea0: d06c beq.n 8002f7c <HAL_RCC_OscConfig+0x12c>
|
||
8002ea2: 687b ldr r3, [r7, #4]
|
||
8002ea4: 685b ldr r3, [r3, #4]
|
||
8002ea6: 2b00 cmp r3, #0
|
||
8002ea8: d168 bne.n 8002f7c <HAL_RCC_OscConfig+0x12c>
|
||
{
|
||
return HAL_ERROR;
|
||
8002eaa: 2301 movs r3, #1
|
||
8002eac: e246 b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Set the new HSE configuration ---------------------------------------*/
|
||
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
||
8002eae: 687b ldr r3, [r7, #4]
|
||
8002eb0: 685b ldr r3, [r3, #4]
|
||
8002eb2: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8002eb6: d106 bne.n 8002ec6 <HAL_RCC_OscConfig+0x76>
|
||
8002eb8: 4b80 ldr r3, [pc, #512] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002eba: 681b ldr r3, [r3, #0]
|
||
8002ebc: 4a7f ldr r2, [pc, #508] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002ebe: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
||
8002ec2: 6013 str r3, [r2, #0]
|
||
8002ec4: e02e b.n 8002f24 <HAL_RCC_OscConfig+0xd4>
|
||
8002ec6: 687b ldr r3, [r7, #4]
|
||
8002ec8: 685b ldr r3, [r3, #4]
|
||
8002eca: 2b00 cmp r3, #0
|
||
8002ecc: d10c bne.n 8002ee8 <HAL_RCC_OscConfig+0x98>
|
||
8002ece: 4b7b ldr r3, [pc, #492] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002ed0: 681b ldr r3, [r3, #0]
|
||
8002ed2: 4a7a ldr r2, [pc, #488] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002ed4: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
||
8002ed8: 6013 str r3, [r2, #0]
|
||
8002eda: 4b78 ldr r3, [pc, #480] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002edc: 681b ldr r3, [r3, #0]
|
||
8002ede: 4a77 ldr r2, [pc, #476] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002ee0: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
||
8002ee4: 6013 str r3, [r2, #0]
|
||
8002ee6: e01d b.n 8002f24 <HAL_RCC_OscConfig+0xd4>
|
||
8002ee8: 687b ldr r3, [r7, #4]
|
||
8002eea: 685b ldr r3, [r3, #4]
|
||
8002eec: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
|
||
8002ef0: d10c bne.n 8002f0c <HAL_RCC_OscConfig+0xbc>
|
||
8002ef2: 4b72 ldr r3, [pc, #456] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002ef4: 681b ldr r3, [r3, #0]
|
||
8002ef6: 4a71 ldr r2, [pc, #452] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002ef8: f443 2380 orr.w r3, r3, #262144 ; 0x40000
|
||
8002efc: 6013 str r3, [r2, #0]
|
||
8002efe: 4b6f ldr r3, [pc, #444] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002f00: 681b ldr r3, [r3, #0]
|
||
8002f02: 4a6e ldr r2, [pc, #440] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002f04: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
||
8002f08: 6013 str r3, [r2, #0]
|
||
8002f0a: e00b b.n 8002f24 <HAL_RCC_OscConfig+0xd4>
|
||
8002f0c: 4b6b ldr r3, [pc, #428] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002f0e: 681b ldr r3, [r3, #0]
|
||
8002f10: 4a6a ldr r2, [pc, #424] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002f12: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
||
8002f16: 6013 str r3, [r2, #0]
|
||
8002f18: 4b68 ldr r3, [pc, #416] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002f1a: 681b ldr r3, [r3, #0]
|
||
8002f1c: 4a67 ldr r2, [pc, #412] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002f1e: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
||
8002f22: 6013 str r3, [r2, #0]
|
||
|
||
|
||
/* Check the HSE State */
|
||
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
|
||
8002f24: 687b ldr r3, [r7, #4]
|
||
8002f26: 685b ldr r3, [r3, #4]
|
||
8002f28: 2b00 cmp r3, #0
|
||
8002f2a: d013 beq.n 8002f54 <HAL_RCC_OscConfig+0x104>
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8002f2c: f7fe fcba bl 80018a4 <HAL_GetTick>
|
||
8002f30: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSE is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
8002f32: e008 b.n 8002f46 <HAL_RCC_OscConfig+0xf6>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
||
8002f34: f7fe fcb6 bl 80018a4 <HAL_GetTick>
|
||
8002f38: 4602 mov r2, r0
|
||
8002f3a: 693b ldr r3, [r7, #16]
|
||
8002f3c: 1ad3 subs r3, r2, r3
|
||
8002f3e: 2b64 cmp r3, #100 ; 0x64
|
||
8002f40: d901 bls.n 8002f46 <HAL_RCC_OscConfig+0xf6>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8002f42: 2303 movs r3, #3
|
||
8002f44: e1fa b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
8002f46: 4b5d ldr r3, [pc, #372] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002f48: 681b ldr r3, [r3, #0]
|
||
8002f4a: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8002f4e: 2b00 cmp r3, #0
|
||
8002f50: d0f0 beq.n 8002f34 <HAL_RCC_OscConfig+0xe4>
|
||
8002f52: e014 b.n 8002f7e <HAL_RCC_OscConfig+0x12e>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8002f54: f7fe fca6 bl 80018a4 <HAL_GetTick>
|
||
8002f58: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSE is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
||
8002f5a: e008 b.n 8002f6e <HAL_RCC_OscConfig+0x11e>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
||
8002f5c: f7fe fca2 bl 80018a4 <HAL_GetTick>
|
||
8002f60: 4602 mov r2, r0
|
||
8002f62: 693b ldr r3, [r7, #16]
|
||
8002f64: 1ad3 subs r3, r2, r3
|
||
8002f66: 2b64 cmp r3, #100 ; 0x64
|
||
8002f68: d901 bls.n 8002f6e <HAL_RCC_OscConfig+0x11e>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8002f6a: 2303 movs r3, #3
|
||
8002f6c: e1e6 b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
||
8002f6e: 4b53 ldr r3, [pc, #332] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002f70: 681b ldr r3, [r3, #0]
|
||
8002f72: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8002f76: 2b00 cmp r3, #0
|
||
8002f78: d1f0 bne.n 8002f5c <HAL_RCC_OscConfig+0x10c>
|
||
8002f7a: e000 b.n 8002f7e <HAL_RCC_OscConfig+0x12e>
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
||
8002f7c: bf00 nop
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*----------------------------- HSI Configuration --------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
|
||
8002f7e: 687b ldr r3, [r7, #4]
|
||
8002f80: 681b ldr r3, [r3, #0]
|
||
8002f82: f003 0302 and.w r3, r3, #2
|
||
8002f86: 2b00 cmp r3, #0
|
||
8002f88: d063 beq.n 8003052 <HAL_RCC_OscConfig+0x202>
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
|
||
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
|
||
|
||
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
|
||
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
|
||
8002f8a: 4b4c ldr r3, [pc, #304] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002f8c: 685b ldr r3, [r3, #4]
|
||
8002f8e: f003 030c and.w r3, r3, #12
|
||
8002f92: 2b00 cmp r3, #0
|
||
8002f94: d00b beq.n 8002fae <HAL_RCC_OscConfig+0x15e>
|
||
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
|
||
8002f96: 4b49 ldr r3, [pc, #292] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002f98: 685b ldr r3, [r3, #4]
|
||
8002f9a: f003 030c and.w r3, r3, #12
|
||
8002f9e: 2b08 cmp r3, #8
|
||
8002fa0: d11c bne.n 8002fdc <HAL_RCC_OscConfig+0x18c>
|
||
8002fa2: 4b46 ldr r3, [pc, #280] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002fa4: 685b ldr r3, [r3, #4]
|
||
8002fa6: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8002faa: 2b00 cmp r3, #0
|
||
8002fac: d116 bne.n 8002fdc <HAL_RCC_OscConfig+0x18c>
|
||
{
|
||
/* When HSI is used as system clock it will not disabled */
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
||
8002fae: 4b43 ldr r3, [pc, #268] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002fb0: 681b ldr r3, [r3, #0]
|
||
8002fb2: f003 0302 and.w r3, r3, #2
|
||
8002fb6: 2b00 cmp r3, #0
|
||
8002fb8: d005 beq.n 8002fc6 <HAL_RCC_OscConfig+0x176>
|
||
8002fba: 687b ldr r3, [r7, #4]
|
||
8002fbc: 691b ldr r3, [r3, #16]
|
||
8002fbe: 2b01 cmp r3, #1
|
||
8002fc0: d001 beq.n 8002fc6 <HAL_RCC_OscConfig+0x176>
|
||
{
|
||
return HAL_ERROR;
|
||
8002fc2: 2301 movs r3, #1
|
||
8002fc4: e1ba b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
/* Otherwise, just the calibration is allowed */
|
||
else
|
||
{
|
||
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
||
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
||
8002fc6: 4b3d ldr r3, [pc, #244] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002fc8: 681b ldr r3, [r3, #0]
|
||
8002fca: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
||
8002fce: 687b ldr r3, [r7, #4]
|
||
8002fd0: 695b ldr r3, [r3, #20]
|
||
8002fd2: 00db lsls r3, r3, #3
|
||
8002fd4: 4939 ldr r1, [pc, #228] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8002fd6: 4313 orrs r3, r2
|
||
8002fd8: 600b str r3, [r1, #0]
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
||
8002fda: e03a b.n 8003052 <HAL_RCC_OscConfig+0x202>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Check the HSI State */
|
||
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
|
||
8002fdc: 687b ldr r3, [r7, #4]
|
||
8002fde: 691b ldr r3, [r3, #16]
|
||
8002fe0: 2b00 cmp r3, #0
|
||
8002fe2: d020 beq.n 8003026 <HAL_RCC_OscConfig+0x1d6>
|
||
{
|
||
/* Enable the Internal High Speed oscillator (HSI). */
|
||
__HAL_RCC_HSI_ENABLE();
|
||
8002fe4: 4b36 ldr r3, [pc, #216] ; (80030c0 <HAL_RCC_OscConfig+0x270>)
|
||
8002fe6: 2201 movs r2, #1
|
||
8002fe8: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8002fea: f7fe fc5b bl 80018a4 <HAL_GetTick>
|
||
8002fee: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSI is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8002ff0: e008 b.n 8003004 <HAL_RCC_OscConfig+0x1b4>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
||
8002ff2: f7fe fc57 bl 80018a4 <HAL_GetTick>
|
||
8002ff6: 4602 mov r2, r0
|
||
8002ff8: 693b ldr r3, [r7, #16]
|
||
8002ffa: 1ad3 subs r3, r2, r3
|
||
8002ffc: 2b02 cmp r3, #2
|
||
8002ffe: d901 bls.n 8003004 <HAL_RCC_OscConfig+0x1b4>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8003000: 2303 movs r3, #3
|
||
8003002: e19b b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8003004: 4b2d ldr r3, [pc, #180] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8003006: 681b ldr r3, [r3, #0]
|
||
8003008: f003 0302 and.w r3, r3, #2
|
||
800300c: 2b00 cmp r3, #0
|
||
800300e: d0f0 beq.n 8002ff2 <HAL_RCC_OscConfig+0x1a2>
|
||
}
|
||
}
|
||
|
||
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
||
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
||
8003010: 4b2a ldr r3, [pc, #168] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8003012: 681b ldr r3, [r3, #0]
|
||
8003014: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
||
8003018: 687b ldr r3, [r7, #4]
|
||
800301a: 695b ldr r3, [r3, #20]
|
||
800301c: 00db lsls r3, r3, #3
|
||
800301e: 4927 ldr r1, [pc, #156] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8003020: 4313 orrs r3, r2
|
||
8003022: 600b str r3, [r1, #0]
|
||
8003024: e015 b.n 8003052 <HAL_RCC_OscConfig+0x202>
|
||
}
|
||
else
|
||
{
|
||
/* Disable the Internal High Speed oscillator (HSI). */
|
||
__HAL_RCC_HSI_DISABLE();
|
||
8003026: 4b26 ldr r3, [pc, #152] ; (80030c0 <HAL_RCC_OscConfig+0x270>)
|
||
8003028: 2200 movs r2, #0
|
||
800302a: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
800302c: f7fe fc3a bl 80018a4 <HAL_GetTick>
|
||
8003030: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSI is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
||
8003032: e008 b.n 8003046 <HAL_RCC_OscConfig+0x1f6>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
||
8003034: f7fe fc36 bl 80018a4 <HAL_GetTick>
|
||
8003038: 4602 mov r2, r0
|
||
800303a: 693b ldr r3, [r7, #16]
|
||
800303c: 1ad3 subs r3, r2, r3
|
||
800303e: 2b02 cmp r3, #2
|
||
8003040: d901 bls.n 8003046 <HAL_RCC_OscConfig+0x1f6>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8003042: 2303 movs r3, #3
|
||
8003044: e17a b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
||
8003046: 4b1d ldr r3, [pc, #116] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8003048: 681b ldr r3, [r3, #0]
|
||
800304a: f003 0302 and.w r3, r3, #2
|
||
800304e: 2b00 cmp r3, #0
|
||
8003050: d1f0 bne.n 8003034 <HAL_RCC_OscConfig+0x1e4>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*------------------------------ LSI Configuration -------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
|
||
8003052: 687b ldr r3, [r7, #4]
|
||
8003054: 681b ldr r3, [r3, #0]
|
||
8003056: f003 0308 and.w r3, r3, #8
|
||
800305a: 2b00 cmp r3, #0
|
||
800305c: d03a beq.n 80030d4 <HAL_RCC_OscConfig+0x284>
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
|
||
|
||
/* Check the LSI State */
|
||
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
|
||
800305e: 687b ldr r3, [r7, #4]
|
||
8003060: 699b ldr r3, [r3, #24]
|
||
8003062: 2b00 cmp r3, #0
|
||
8003064: d019 beq.n 800309a <HAL_RCC_OscConfig+0x24a>
|
||
{
|
||
/* Enable the Internal Low Speed oscillator (LSI). */
|
||
__HAL_RCC_LSI_ENABLE();
|
||
8003066: 4b17 ldr r3, [pc, #92] ; (80030c4 <HAL_RCC_OscConfig+0x274>)
|
||
8003068: 2201 movs r2, #1
|
||
800306a: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
800306c: f7fe fc1a bl 80018a4 <HAL_GetTick>
|
||
8003070: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSI is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
||
8003072: e008 b.n 8003086 <HAL_RCC_OscConfig+0x236>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
||
8003074: f7fe fc16 bl 80018a4 <HAL_GetTick>
|
||
8003078: 4602 mov r2, r0
|
||
800307a: 693b ldr r3, [r7, #16]
|
||
800307c: 1ad3 subs r3, r2, r3
|
||
800307e: 2b02 cmp r3, #2
|
||
8003080: d901 bls.n 8003086 <HAL_RCC_OscConfig+0x236>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8003082: 2303 movs r3, #3
|
||
8003084: e15a b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
||
8003086: 4b0d ldr r3, [pc, #52] ; (80030bc <HAL_RCC_OscConfig+0x26c>)
|
||
8003088: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800308a: f003 0302 and.w r3, r3, #2
|
||
800308e: 2b00 cmp r3, #0
|
||
8003090: d0f0 beq.n 8003074 <HAL_RCC_OscConfig+0x224>
|
||
}
|
||
}
|
||
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
|
||
should be added.*/
|
||
RCC_Delay(1);
|
||
8003092: 2001 movs r0, #1
|
||
8003094: f000 fac4 bl 8003620 <RCC_Delay>
|
||
8003098: e01c b.n 80030d4 <HAL_RCC_OscConfig+0x284>
|
||
}
|
||
else
|
||
{
|
||
/* Disable the Internal Low Speed oscillator (LSI). */
|
||
__HAL_RCC_LSI_DISABLE();
|
||
800309a: 4b0a ldr r3, [pc, #40] ; (80030c4 <HAL_RCC_OscConfig+0x274>)
|
||
800309c: 2200 movs r2, #0
|
||
800309e: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80030a0: f7fe fc00 bl 80018a4 <HAL_GetTick>
|
||
80030a4: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSI is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
||
80030a6: e00f b.n 80030c8 <HAL_RCC_OscConfig+0x278>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
||
80030a8: f7fe fbfc bl 80018a4 <HAL_GetTick>
|
||
80030ac: 4602 mov r2, r0
|
||
80030ae: 693b ldr r3, [r7, #16]
|
||
80030b0: 1ad3 subs r3, r2, r3
|
||
80030b2: 2b02 cmp r3, #2
|
||
80030b4: d908 bls.n 80030c8 <HAL_RCC_OscConfig+0x278>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80030b6: 2303 movs r3, #3
|
||
80030b8: e140 b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
80030ba: bf00 nop
|
||
80030bc: 40021000 .word 0x40021000
|
||
80030c0: 42420000 .word 0x42420000
|
||
80030c4: 42420480 .word 0x42420480
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
||
80030c8: 4b9e ldr r3, [pc, #632] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
80030ca: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80030cc: f003 0302 and.w r3, r3, #2
|
||
80030d0: 2b00 cmp r3, #0
|
||
80030d2: d1e9 bne.n 80030a8 <HAL_RCC_OscConfig+0x258>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*------------------------------ LSE Configuration -------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
|
||
80030d4: 687b ldr r3, [r7, #4]
|
||
80030d6: 681b ldr r3, [r3, #0]
|
||
80030d8: f003 0304 and.w r3, r3, #4
|
||
80030dc: 2b00 cmp r3, #0
|
||
80030de: f000 80a6 beq.w 800322e <HAL_RCC_OscConfig+0x3de>
|
||
{
|
||
FlagStatus pwrclkchanged = RESET;
|
||
80030e2: 2300 movs r3, #0
|
||
80030e4: 75fb strb r3, [r7, #23]
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
|
||
|
||
/* Update LSE configuration in Backup Domain control register */
|
||
/* Requires to enable write access to Backup Domain of necessary */
|
||
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
|
||
80030e6: 4b97 ldr r3, [pc, #604] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
80030e8: 69db ldr r3, [r3, #28]
|
||
80030ea: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
80030ee: 2b00 cmp r3, #0
|
||
80030f0: d10d bne.n 800310e <HAL_RCC_OscConfig+0x2be>
|
||
{
|
||
__HAL_RCC_PWR_CLK_ENABLE();
|
||
80030f2: 4b94 ldr r3, [pc, #592] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
80030f4: 69db ldr r3, [r3, #28]
|
||
80030f6: 4a93 ldr r2, [pc, #588] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
80030f8: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
||
80030fc: 61d3 str r3, [r2, #28]
|
||
80030fe: 4b91 ldr r3, [pc, #580] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003100: 69db ldr r3, [r3, #28]
|
||
8003102: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
8003106: 60bb str r3, [r7, #8]
|
||
8003108: 68bb ldr r3, [r7, #8]
|
||
pwrclkchanged = SET;
|
||
800310a: 2301 movs r3, #1
|
||
800310c: 75fb strb r3, [r7, #23]
|
||
}
|
||
|
||
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
800310e: 4b8e ldr r3, [pc, #568] ; (8003348 <HAL_RCC_OscConfig+0x4f8>)
|
||
8003110: 681b ldr r3, [r3, #0]
|
||
8003112: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8003116: 2b00 cmp r3, #0
|
||
8003118: d118 bne.n 800314c <HAL_RCC_OscConfig+0x2fc>
|
||
{
|
||
/* Enable write access to Backup domain */
|
||
SET_BIT(PWR->CR, PWR_CR_DBP);
|
||
800311a: 4b8b ldr r3, [pc, #556] ; (8003348 <HAL_RCC_OscConfig+0x4f8>)
|
||
800311c: 681b ldr r3, [r3, #0]
|
||
800311e: 4a8a ldr r2, [pc, #552] ; (8003348 <HAL_RCC_OscConfig+0x4f8>)
|
||
8003120: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
8003124: 6013 str r3, [r2, #0]
|
||
|
||
/* Wait for Backup domain Write protection disable */
|
||
tickstart = HAL_GetTick();
|
||
8003126: f7fe fbbd bl 80018a4 <HAL_GetTick>
|
||
800312a: 6138 str r0, [r7, #16]
|
||
|
||
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
800312c: e008 b.n 8003140 <HAL_RCC_OscConfig+0x2f0>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
||
800312e: f7fe fbb9 bl 80018a4 <HAL_GetTick>
|
||
8003132: 4602 mov r2, r0
|
||
8003134: 693b ldr r3, [r7, #16]
|
||
8003136: 1ad3 subs r3, r2, r3
|
||
8003138: 2b64 cmp r3, #100 ; 0x64
|
||
800313a: d901 bls.n 8003140 <HAL_RCC_OscConfig+0x2f0>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800313c: 2303 movs r3, #3
|
||
800313e: e0fd b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
8003140: 4b81 ldr r3, [pc, #516] ; (8003348 <HAL_RCC_OscConfig+0x4f8>)
|
||
8003142: 681b ldr r3, [r3, #0]
|
||
8003144: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8003148: 2b00 cmp r3, #0
|
||
800314a: d0f0 beq.n 800312e <HAL_RCC_OscConfig+0x2de>
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Set the new LSE configuration -----------------------------------------*/
|
||
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
||
800314c: 687b ldr r3, [r7, #4]
|
||
800314e: 68db ldr r3, [r3, #12]
|
||
8003150: 2b01 cmp r3, #1
|
||
8003152: d106 bne.n 8003162 <HAL_RCC_OscConfig+0x312>
|
||
8003154: 4b7b ldr r3, [pc, #492] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003156: 6a1b ldr r3, [r3, #32]
|
||
8003158: 4a7a ldr r2, [pc, #488] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
800315a: f043 0301 orr.w r3, r3, #1
|
||
800315e: 6213 str r3, [r2, #32]
|
||
8003160: e02d b.n 80031be <HAL_RCC_OscConfig+0x36e>
|
||
8003162: 687b ldr r3, [r7, #4]
|
||
8003164: 68db ldr r3, [r3, #12]
|
||
8003166: 2b00 cmp r3, #0
|
||
8003168: d10c bne.n 8003184 <HAL_RCC_OscConfig+0x334>
|
||
800316a: 4b76 ldr r3, [pc, #472] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
800316c: 6a1b ldr r3, [r3, #32]
|
||
800316e: 4a75 ldr r2, [pc, #468] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003170: f023 0301 bic.w r3, r3, #1
|
||
8003174: 6213 str r3, [r2, #32]
|
||
8003176: 4b73 ldr r3, [pc, #460] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003178: 6a1b ldr r3, [r3, #32]
|
||
800317a: 4a72 ldr r2, [pc, #456] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
800317c: f023 0304 bic.w r3, r3, #4
|
||
8003180: 6213 str r3, [r2, #32]
|
||
8003182: e01c b.n 80031be <HAL_RCC_OscConfig+0x36e>
|
||
8003184: 687b ldr r3, [r7, #4]
|
||
8003186: 68db ldr r3, [r3, #12]
|
||
8003188: 2b05 cmp r3, #5
|
||
800318a: d10c bne.n 80031a6 <HAL_RCC_OscConfig+0x356>
|
||
800318c: 4b6d ldr r3, [pc, #436] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
800318e: 6a1b ldr r3, [r3, #32]
|
||
8003190: 4a6c ldr r2, [pc, #432] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003192: f043 0304 orr.w r3, r3, #4
|
||
8003196: 6213 str r3, [r2, #32]
|
||
8003198: 4b6a ldr r3, [pc, #424] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
800319a: 6a1b ldr r3, [r3, #32]
|
||
800319c: 4a69 ldr r2, [pc, #420] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
800319e: f043 0301 orr.w r3, r3, #1
|
||
80031a2: 6213 str r3, [r2, #32]
|
||
80031a4: e00b b.n 80031be <HAL_RCC_OscConfig+0x36e>
|
||
80031a6: 4b67 ldr r3, [pc, #412] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
80031a8: 6a1b ldr r3, [r3, #32]
|
||
80031aa: 4a66 ldr r2, [pc, #408] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
80031ac: f023 0301 bic.w r3, r3, #1
|
||
80031b0: 6213 str r3, [r2, #32]
|
||
80031b2: 4b64 ldr r3, [pc, #400] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
80031b4: 6a1b ldr r3, [r3, #32]
|
||
80031b6: 4a63 ldr r2, [pc, #396] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
80031b8: f023 0304 bic.w r3, r3, #4
|
||
80031bc: 6213 str r3, [r2, #32]
|
||
/* Check the LSE State */
|
||
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
|
||
80031be: 687b ldr r3, [r7, #4]
|
||
80031c0: 68db ldr r3, [r3, #12]
|
||
80031c2: 2b00 cmp r3, #0
|
||
80031c4: d015 beq.n 80031f2 <HAL_RCC_OscConfig+0x3a2>
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80031c6: f7fe fb6d bl 80018a4 <HAL_GetTick>
|
||
80031ca: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSE is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
||
80031cc: e00a b.n 80031e4 <HAL_RCC_OscConfig+0x394>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
||
80031ce: f7fe fb69 bl 80018a4 <HAL_GetTick>
|
||
80031d2: 4602 mov r2, r0
|
||
80031d4: 693b ldr r3, [r7, #16]
|
||
80031d6: 1ad3 subs r3, r2, r3
|
||
80031d8: f241 3288 movw r2, #5000 ; 0x1388
|
||
80031dc: 4293 cmp r3, r2
|
||
80031de: d901 bls.n 80031e4 <HAL_RCC_OscConfig+0x394>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80031e0: 2303 movs r3, #3
|
||
80031e2: e0ab b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
||
80031e4: 4b57 ldr r3, [pc, #348] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
80031e6: 6a1b ldr r3, [r3, #32]
|
||
80031e8: f003 0302 and.w r3, r3, #2
|
||
80031ec: 2b00 cmp r3, #0
|
||
80031ee: d0ee beq.n 80031ce <HAL_RCC_OscConfig+0x37e>
|
||
80031f0: e014 b.n 800321c <HAL_RCC_OscConfig+0x3cc>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80031f2: f7fe fb57 bl 80018a4 <HAL_GetTick>
|
||
80031f6: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSE is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
||
80031f8: e00a b.n 8003210 <HAL_RCC_OscConfig+0x3c0>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
||
80031fa: f7fe fb53 bl 80018a4 <HAL_GetTick>
|
||
80031fe: 4602 mov r2, r0
|
||
8003200: 693b ldr r3, [r7, #16]
|
||
8003202: 1ad3 subs r3, r2, r3
|
||
8003204: f241 3288 movw r2, #5000 ; 0x1388
|
||
8003208: 4293 cmp r3, r2
|
||
800320a: d901 bls.n 8003210 <HAL_RCC_OscConfig+0x3c0>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800320c: 2303 movs r3, #3
|
||
800320e: e095 b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
||
8003210: 4b4c ldr r3, [pc, #304] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003212: 6a1b ldr r3, [r3, #32]
|
||
8003214: f003 0302 and.w r3, r3, #2
|
||
8003218: 2b00 cmp r3, #0
|
||
800321a: d1ee bne.n 80031fa <HAL_RCC_OscConfig+0x3aa>
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Require to disable power clock if necessary */
|
||
if (pwrclkchanged == SET)
|
||
800321c: 7dfb ldrb r3, [r7, #23]
|
||
800321e: 2b01 cmp r3, #1
|
||
8003220: d105 bne.n 800322e <HAL_RCC_OscConfig+0x3de>
|
||
{
|
||
__HAL_RCC_PWR_CLK_DISABLE();
|
||
8003222: 4b48 ldr r3, [pc, #288] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003224: 69db ldr r3, [r3, #28]
|
||
8003226: 4a47 ldr r2, [pc, #284] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003228: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
|
||
800322c: 61d3 str r3, [r2, #28]
|
||
|
||
#endif /* RCC_CR_PLL2ON */
|
||
/*-------------------------------- PLL Configuration -----------------------*/
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
|
||
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
|
||
800322e: 687b ldr r3, [r7, #4]
|
||
8003230: 69db ldr r3, [r3, #28]
|
||
8003232: 2b00 cmp r3, #0
|
||
8003234: f000 8081 beq.w 800333a <HAL_RCC_OscConfig+0x4ea>
|
||
{
|
||
/* Check if the PLL is used as system clock or not */
|
||
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
|
||
8003238: 4b42 ldr r3, [pc, #264] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
800323a: 685b ldr r3, [r3, #4]
|
||
800323c: f003 030c and.w r3, r3, #12
|
||
8003240: 2b08 cmp r3, #8
|
||
8003242: d061 beq.n 8003308 <HAL_RCC_OscConfig+0x4b8>
|
||
{
|
||
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
|
||
8003244: 687b ldr r3, [r7, #4]
|
||
8003246: 69db ldr r3, [r3, #28]
|
||
8003248: 2b02 cmp r3, #2
|
||
800324a: d146 bne.n 80032da <HAL_RCC_OscConfig+0x48a>
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
|
||
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
|
||
|
||
/* Disable the main PLL. */
|
||
__HAL_RCC_PLL_DISABLE();
|
||
800324c: 4b3f ldr r3, [pc, #252] ; (800334c <HAL_RCC_OscConfig+0x4fc>)
|
||
800324e: 2200 movs r2, #0
|
||
8003250: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8003252: f7fe fb27 bl 80018a4 <HAL_GetTick>
|
||
8003256: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
8003258: e008 b.n 800326c <HAL_RCC_OscConfig+0x41c>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
800325a: f7fe fb23 bl 80018a4 <HAL_GetTick>
|
||
800325e: 4602 mov r2, r0
|
||
8003260: 693b ldr r3, [r7, #16]
|
||
8003262: 1ad3 subs r3, r2, r3
|
||
8003264: 2b02 cmp r3, #2
|
||
8003266: d901 bls.n 800326c <HAL_RCC_OscConfig+0x41c>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8003268: 2303 movs r3, #3
|
||
800326a: e067 b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
800326c: 4b35 ldr r3, [pc, #212] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
800326e: 681b ldr r3, [r3, #0]
|
||
8003270: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
8003274: 2b00 cmp r3, #0
|
||
8003276: d1f0 bne.n 800325a <HAL_RCC_OscConfig+0x40a>
|
||
}
|
||
}
|
||
|
||
/* Configure the HSE prediv factor --------------------------------*/
|
||
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
|
||
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
|
||
8003278: 687b ldr r3, [r7, #4]
|
||
800327a: 6a1b ldr r3, [r3, #32]
|
||
800327c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8003280: d108 bne.n 8003294 <HAL_RCC_OscConfig+0x444>
|
||
/* Set PREDIV1 source */
|
||
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
|
||
#endif /* RCC_CFGR2_PREDIV1SRC */
|
||
|
||
/* Set PREDIV1 Value */
|
||
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
|
||
8003282: 4b30 ldr r3, [pc, #192] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003284: 685b ldr r3, [r3, #4]
|
||
8003286: f423 3200 bic.w r2, r3, #131072 ; 0x20000
|
||
800328a: 687b ldr r3, [r7, #4]
|
||
800328c: 689b ldr r3, [r3, #8]
|
||
800328e: 492d ldr r1, [pc, #180] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003290: 4313 orrs r3, r2
|
||
8003292: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Configure the main PLL clock source and multiplication factors. */
|
||
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
|
||
8003294: 4b2b ldr r3, [pc, #172] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003296: 685b ldr r3, [r3, #4]
|
||
8003298: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000
|
||
800329c: 687b ldr r3, [r7, #4]
|
||
800329e: 6a19 ldr r1, [r3, #32]
|
||
80032a0: 687b ldr r3, [r7, #4]
|
||
80032a2: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80032a4: 430b orrs r3, r1
|
||
80032a6: 4927 ldr r1, [pc, #156] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
80032a8: 4313 orrs r3, r2
|
||
80032aa: 604b str r3, [r1, #4]
|
||
RCC_OscInitStruct->PLL.PLLMUL);
|
||
/* Enable the main PLL. */
|
||
__HAL_RCC_PLL_ENABLE();
|
||
80032ac: 4b27 ldr r3, [pc, #156] ; (800334c <HAL_RCC_OscConfig+0x4fc>)
|
||
80032ae: 2201 movs r2, #1
|
||
80032b0: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80032b2: f7fe faf7 bl 80018a4 <HAL_GetTick>
|
||
80032b6: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
80032b8: e008 b.n 80032cc <HAL_RCC_OscConfig+0x47c>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
80032ba: f7fe faf3 bl 80018a4 <HAL_GetTick>
|
||
80032be: 4602 mov r2, r0
|
||
80032c0: 693b ldr r3, [r7, #16]
|
||
80032c2: 1ad3 subs r3, r2, r3
|
||
80032c4: 2b02 cmp r3, #2
|
||
80032c6: d901 bls.n 80032cc <HAL_RCC_OscConfig+0x47c>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80032c8: 2303 movs r3, #3
|
||
80032ca: e037 b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
80032cc: 4b1d ldr r3, [pc, #116] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
80032ce: 681b ldr r3, [r3, #0]
|
||
80032d0: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
80032d4: 2b00 cmp r3, #0
|
||
80032d6: d0f0 beq.n 80032ba <HAL_RCC_OscConfig+0x46a>
|
||
80032d8: e02f b.n 800333a <HAL_RCC_OscConfig+0x4ea>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Disable the main PLL. */
|
||
__HAL_RCC_PLL_DISABLE();
|
||
80032da: 4b1c ldr r3, [pc, #112] ; (800334c <HAL_RCC_OscConfig+0x4fc>)
|
||
80032dc: 2200 movs r2, #0
|
||
80032de: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80032e0: f7fe fae0 bl 80018a4 <HAL_GetTick>
|
||
80032e4: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
80032e6: e008 b.n 80032fa <HAL_RCC_OscConfig+0x4aa>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
80032e8: f7fe fadc bl 80018a4 <HAL_GetTick>
|
||
80032ec: 4602 mov r2, r0
|
||
80032ee: 693b ldr r3, [r7, #16]
|
||
80032f0: 1ad3 subs r3, r2, r3
|
||
80032f2: 2b02 cmp r3, #2
|
||
80032f4: d901 bls.n 80032fa <HAL_RCC_OscConfig+0x4aa>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80032f6: 2303 movs r3, #3
|
||
80032f8: e020 b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
80032fa: 4b12 ldr r3, [pc, #72] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
80032fc: 681b ldr r3, [r3, #0]
|
||
80032fe: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
8003302: 2b00 cmp r3, #0
|
||
8003304: d1f0 bne.n 80032e8 <HAL_RCC_OscConfig+0x498>
|
||
8003306: e018 b.n 800333a <HAL_RCC_OscConfig+0x4ea>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Check if there is a request to disable the PLL used as System clock source */
|
||
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
|
||
8003308: 687b ldr r3, [r7, #4]
|
||
800330a: 69db ldr r3, [r3, #28]
|
||
800330c: 2b01 cmp r3, #1
|
||
800330e: d101 bne.n 8003314 <HAL_RCC_OscConfig+0x4c4>
|
||
{
|
||
return HAL_ERROR;
|
||
8003310: 2301 movs r3, #1
|
||
8003312: e013 b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
else
|
||
{
|
||
/* Do not return HAL_ERROR if request repeats the current configuration */
|
||
pll_config = RCC->CFGR;
|
||
8003314: 4b0b ldr r3, [pc, #44] ; (8003344 <HAL_RCC_OscConfig+0x4f4>)
|
||
8003316: 685b ldr r3, [r3, #4]
|
||
8003318: 60fb str r3, [r7, #12]
|
||
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
||
800331a: 68fb ldr r3, [r7, #12]
|
||
800331c: f403 3280 and.w r2, r3, #65536 ; 0x10000
|
||
8003320: 687b ldr r3, [r7, #4]
|
||
8003322: 6a1b ldr r3, [r3, #32]
|
||
8003324: 429a cmp r2, r3
|
||
8003326: d106 bne.n 8003336 <HAL_RCC_OscConfig+0x4e6>
|
||
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
|
||
8003328: 68fb ldr r3, [r7, #12]
|
||
800332a: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000
|
||
800332e: 687b ldr r3, [r7, #4]
|
||
8003330: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
||
8003332: 429a cmp r2, r3
|
||
8003334: d001 beq.n 800333a <HAL_RCC_OscConfig+0x4ea>
|
||
{
|
||
return HAL_ERROR;
|
||
8003336: 2301 movs r3, #1
|
||
8003338: e000 b.n 800333c <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
return HAL_OK;
|
||
800333a: 2300 movs r3, #0
|
||
}
|
||
800333c: 4618 mov r0, r3
|
||
800333e: 3718 adds r7, #24
|
||
8003340: 46bd mov sp, r7
|
||
8003342: bd80 pop {r7, pc}
|
||
8003344: 40021000 .word 0x40021000
|
||
8003348: 40007000 .word 0x40007000
|
||
800334c: 42420060 .word 0x42420060
|
||
|
||
08003350 <HAL_RCC_ClockConfig>:
|
||
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
|
||
* currently used as system clock source.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
|
||
{
|
||
8003350: b580 push {r7, lr}
|
||
8003352: b084 sub sp, #16
|
||
8003354: af00 add r7, sp, #0
|
||
8003356: 6078 str r0, [r7, #4]
|
||
8003358: 6039 str r1, [r7, #0]
|
||
uint32_t tickstart;
|
||
|
||
/* Check Null pointer */
|
||
if (RCC_ClkInitStruct == NULL)
|
||
800335a: 687b ldr r3, [r7, #4]
|
||
800335c: 2b00 cmp r3, #0
|
||
800335e: d101 bne.n 8003364 <HAL_RCC_ClockConfig+0x14>
|
||
{
|
||
return HAL_ERROR;
|
||
8003360: 2301 movs r3, #1
|
||
8003362: e0d0 b.n 8003506 <HAL_RCC_ClockConfig+0x1b6>
|
||
must be correctly programmed according to the frequency of the CPU clock
|
||
(HCLK) of the device. */
|
||
|
||
#if defined(FLASH_ACR_LATENCY)
|
||
/* Increasing the number of wait states because of higher CPU frequency */
|
||
if (FLatency > __HAL_FLASH_GET_LATENCY())
|
||
8003364: 4b6a ldr r3, [pc, #424] ; (8003510 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8003366: 681b ldr r3, [r3, #0]
|
||
8003368: f003 0307 and.w r3, r3, #7
|
||
800336c: 683a ldr r2, [r7, #0]
|
||
800336e: 429a cmp r2, r3
|
||
8003370: d910 bls.n 8003394 <HAL_RCC_ClockConfig+0x44>
|
||
{
|
||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||
__HAL_FLASH_SET_LATENCY(FLatency);
|
||
8003372: 4b67 ldr r3, [pc, #412] ; (8003510 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8003374: 681b ldr r3, [r3, #0]
|
||
8003376: f023 0207 bic.w r2, r3, #7
|
||
800337a: 4965 ldr r1, [pc, #404] ; (8003510 <HAL_RCC_ClockConfig+0x1c0>)
|
||
800337c: 683b ldr r3, [r7, #0]
|
||
800337e: 4313 orrs r3, r2
|
||
8003380: 600b str r3, [r1, #0]
|
||
|
||
/* Check that the new number of wait states is taken into account to access the Flash
|
||
memory by reading the FLASH_ACR register */
|
||
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
||
8003382: 4b63 ldr r3, [pc, #396] ; (8003510 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8003384: 681b ldr r3, [r3, #0]
|
||
8003386: f003 0307 and.w r3, r3, #7
|
||
800338a: 683a ldr r2, [r7, #0]
|
||
800338c: 429a cmp r2, r3
|
||
800338e: d001 beq.n 8003394 <HAL_RCC_ClockConfig+0x44>
|
||
{
|
||
return HAL_ERROR;
|
||
8003390: 2301 movs r3, #1
|
||
8003392: e0b8 b.n 8003506 <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
|
||
#endif /* FLASH_ACR_LATENCY */
|
||
/*-------------------------- HCLK Configuration --------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
|
||
8003394: 687b ldr r3, [r7, #4]
|
||
8003396: 681b ldr r3, [r3, #0]
|
||
8003398: f003 0302 and.w r3, r3, #2
|
||
800339c: 2b00 cmp r3, #0
|
||
800339e: d020 beq.n 80033e2 <HAL_RCC_ClockConfig+0x92>
|
||
{
|
||
/* Set the highest APBx dividers in order to ensure that we do not go through
|
||
a non-spec phase whatever we decrease or increase HCLK. */
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
||
80033a0: 687b ldr r3, [r7, #4]
|
||
80033a2: 681b ldr r3, [r3, #0]
|
||
80033a4: f003 0304 and.w r3, r3, #4
|
||
80033a8: 2b00 cmp r3, #0
|
||
80033aa: d005 beq.n 80033b8 <HAL_RCC_ClockConfig+0x68>
|
||
{
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
|
||
80033ac: 4b59 ldr r3, [pc, #356] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033ae: 685b ldr r3, [r3, #4]
|
||
80033b0: 4a58 ldr r2, [pc, #352] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033b2: f443 63e0 orr.w r3, r3, #1792 ; 0x700
|
||
80033b6: 6053 str r3, [r2, #4]
|
||
}
|
||
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
||
80033b8: 687b ldr r3, [r7, #4]
|
||
80033ba: 681b ldr r3, [r3, #0]
|
||
80033bc: f003 0308 and.w r3, r3, #8
|
||
80033c0: 2b00 cmp r3, #0
|
||
80033c2: d005 beq.n 80033d0 <HAL_RCC_ClockConfig+0x80>
|
||
{
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
|
||
80033c4: 4b53 ldr r3, [pc, #332] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033c6: 685b ldr r3, [r3, #4]
|
||
80033c8: 4a52 ldr r2, [pc, #328] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033ca: f443 5360 orr.w r3, r3, #14336 ; 0x3800
|
||
80033ce: 6053 str r3, [r2, #4]
|
||
}
|
||
|
||
/* Set the new HCLK clock divider */
|
||
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
|
||
80033d0: 4b50 ldr r3, [pc, #320] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033d2: 685b ldr r3, [r3, #4]
|
||
80033d4: f023 02f0 bic.w r2, r3, #240 ; 0xf0
|
||
80033d8: 687b ldr r3, [r7, #4]
|
||
80033da: 689b ldr r3, [r3, #8]
|
||
80033dc: 494d ldr r1, [pc, #308] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033de: 4313 orrs r3, r2
|
||
80033e0: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/*------------------------- SYSCLK Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
|
||
80033e2: 687b ldr r3, [r7, #4]
|
||
80033e4: 681b ldr r3, [r3, #0]
|
||
80033e6: f003 0301 and.w r3, r3, #1
|
||
80033ea: 2b00 cmp r3, #0
|
||
80033ec: d040 beq.n 8003470 <HAL_RCC_ClockConfig+0x120>
|
||
{
|
||
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
|
||
|
||
/* HSE is selected as System Clock Source */
|
||
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
|
||
80033ee: 687b ldr r3, [r7, #4]
|
||
80033f0: 685b ldr r3, [r3, #4]
|
||
80033f2: 2b01 cmp r3, #1
|
||
80033f4: d107 bne.n 8003406 <HAL_RCC_ClockConfig+0xb6>
|
||
{
|
||
/* Check the HSE ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
80033f6: 4b47 ldr r3, [pc, #284] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033f8: 681b ldr r3, [r3, #0]
|
||
80033fa: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
80033fe: 2b00 cmp r3, #0
|
||
8003400: d115 bne.n 800342e <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
8003402: 2301 movs r3, #1
|
||
8003404: e07f b.n 8003506 <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
/* PLL is selected as System Clock Source */
|
||
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
|
||
8003406: 687b ldr r3, [r7, #4]
|
||
8003408: 685b ldr r3, [r3, #4]
|
||
800340a: 2b02 cmp r3, #2
|
||
800340c: d107 bne.n 800341e <HAL_RCC_ClockConfig+0xce>
|
||
{
|
||
/* Check the PLL ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
800340e: 4b41 ldr r3, [pc, #260] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003410: 681b ldr r3, [r3, #0]
|
||
8003412: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
8003416: 2b00 cmp r3, #0
|
||
8003418: d109 bne.n 800342e <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
800341a: 2301 movs r3, #1
|
||
800341c: e073 b.n 8003506 <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
/* HSI is selected as System Clock Source */
|
||
else
|
||
{
|
||
/* Check the HSI ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
800341e: 4b3d ldr r3, [pc, #244] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003420: 681b ldr r3, [r3, #0]
|
||
8003422: f003 0302 and.w r3, r3, #2
|
||
8003426: 2b00 cmp r3, #0
|
||
8003428: d101 bne.n 800342e <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
800342a: 2301 movs r3, #1
|
||
800342c: e06b b.n 8003506 <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
|
||
800342e: 4b39 ldr r3, [pc, #228] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003430: 685b ldr r3, [r3, #4]
|
||
8003432: f023 0203 bic.w r2, r3, #3
|
||
8003436: 687b ldr r3, [r7, #4]
|
||
8003438: 685b ldr r3, [r3, #4]
|
||
800343a: 4936 ldr r1, [pc, #216] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
800343c: 4313 orrs r3, r2
|
||
800343e: 604b str r3, [r1, #4]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8003440: f7fe fa30 bl 80018a4 <HAL_GetTick>
|
||
8003444: 60f8 str r0, [r7, #12]
|
||
|
||
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
||
8003446: e00a b.n 800345e <HAL_RCC_ClockConfig+0x10e>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
|
||
8003448: f7fe fa2c bl 80018a4 <HAL_GetTick>
|
||
800344c: 4602 mov r2, r0
|
||
800344e: 68fb ldr r3, [r7, #12]
|
||
8003450: 1ad3 subs r3, r2, r3
|
||
8003452: f241 3288 movw r2, #5000 ; 0x1388
|
||
8003456: 4293 cmp r3, r2
|
||
8003458: d901 bls.n 800345e <HAL_RCC_ClockConfig+0x10e>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800345a: 2303 movs r3, #3
|
||
800345c: e053 b.n 8003506 <HAL_RCC_ClockConfig+0x1b6>
|
||
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
||
800345e: 4b2d ldr r3, [pc, #180] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003460: 685b ldr r3, [r3, #4]
|
||
8003462: f003 020c and.w r2, r3, #12
|
||
8003466: 687b ldr r3, [r7, #4]
|
||
8003468: 685b ldr r3, [r3, #4]
|
||
800346a: 009b lsls r3, r3, #2
|
||
800346c: 429a cmp r2, r3
|
||
800346e: d1eb bne.n 8003448 <HAL_RCC_ClockConfig+0xf8>
|
||
}
|
||
}
|
||
|
||
#if defined(FLASH_ACR_LATENCY)
|
||
/* Decreasing the number of wait states because of lower CPU frequency */
|
||
if (FLatency < __HAL_FLASH_GET_LATENCY())
|
||
8003470: 4b27 ldr r3, [pc, #156] ; (8003510 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8003472: 681b ldr r3, [r3, #0]
|
||
8003474: f003 0307 and.w r3, r3, #7
|
||
8003478: 683a ldr r2, [r7, #0]
|
||
800347a: 429a cmp r2, r3
|
||
800347c: d210 bcs.n 80034a0 <HAL_RCC_ClockConfig+0x150>
|
||
{
|
||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||
__HAL_FLASH_SET_LATENCY(FLatency);
|
||
800347e: 4b24 ldr r3, [pc, #144] ; (8003510 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8003480: 681b ldr r3, [r3, #0]
|
||
8003482: f023 0207 bic.w r2, r3, #7
|
||
8003486: 4922 ldr r1, [pc, #136] ; (8003510 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8003488: 683b ldr r3, [r7, #0]
|
||
800348a: 4313 orrs r3, r2
|
||
800348c: 600b str r3, [r1, #0]
|
||
|
||
/* Check that the new number of wait states is taken into account to access the Flash
|
||
memory by reading the FLASH_ACR register */
|
||
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
||
800348e: 4b20 ldr r3, [pc, #128] ; (8003510 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8003490: 681b ldr r3, [r3, #0]
|
||
8003492: f003 0307 and.w r3, r3, #7
|
||
8003496: 683a ldr r2, [r7, #0]
|
||
8003498: 429a cmp r2, r3
|
||
800349a: d001 beq.n 80034a0 <HAL_RCC_ClockConfig+0x150>
|
||
{
|
||
return HAL_ERROR;
|
||
800349c: 2301 movs r3, #1
|
||
800349e: e032 b.n 8003506 <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
#endif /* FLASH_ACR_LATENCY */
|
||
|
||
/*-------------------------- PCLK1 Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
||
80034a0: 687b ldr r3, [r7, #4]
|
||
80034a2: 681b ldr r3, [r3, #0]
|
||
80034a4: f003 0304 and.w r3, r3, #4
|
||
80034a8: 2b00 cmp r3, #0
|
||
80034aa: d008 beq.n 80034be <HAL_RCC_ClockConfig+0x16e>
|
||
{
|
||
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
|
||
80034ac: 4b19 ldr r3, [pc, #100] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80034ae: 685b ldr r3, [r3, #4]
|
||
80034b0: f423 62e0 bic.w r2, r3, #1792 ; 0x700
|
||
80034b4: 687b ldr r3, [r7, #4]
|
||
80034b6: 68db ldr r3, [r3, #12]
|
||
80034b8: 4916 ldr r1, [pc, #88] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80034ba: 4313 orrs r3, r2
|
||
80034bc: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/*-------------------------- PCLK2 Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
||
80034be: 687b ldr r3, [r7, #4]
|
||
80034c0: 681b ldr r3, [r3, #0]
|
||
80034c2: f003 0308 and.w r3, r3, #8
|
||
80034c6: 2b00 cmp r3, #0
|
||
80034c8: d009 beq.n 80034de <HAL_RCC_ClockConfig+0x18e>
|
||
{
|
||
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
|
||
80034ca: 4b12 ldr r3, [pc, #72] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80034cc: 685b ldr r3, [r3, #4]
|
||
80034ce: f423 5260 bic.w r2, r3, #14336 ; 0x3800
|
||
80034d2: 687b ldr r3, [r7, #4]
|
||
80034d4: 691b ldr r3, [r3, #16]
|
||
80034d6: 00db lsls r3, r3, #3
|
||
80034d8: 490e ldr r1, [pc, #56] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80034da: 4313 orrs r3, r2
|
||
80034dc: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Update the SystemCoreClock global variable */
|
||
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
|
||
80034de: f000 f821 bl 8003524 <HAL_RCC_GetSysClockFreq>
|
||
80034e2: 4602 mov r2, r0
|
||
80034e4: 4b0b ldr r3, [pc, #44] ; (8003514 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80034e6: 685b ldr r3, [r3, #4]
|
||
80034e8: 091b lsrs r3, r3, #4
|
||
80034ea: f003 030f and.w r3, r3, #15
|
||
80034ee: 490a ldr r1, [pc, #40] ; (8003518 <HAL_RCC_ClockConfig+0x1c8>)
|
||
80034f0: 5ccb ldrb r3, [r1, r3]
|
||
80034f2: fa22 f303 lsr.w r3, r2, r3
|
||
80034f6: 4a09 ldr r2, [pc, #36] ; (800351c <HAL_RCC_ClockConfig+0x1cc>)
|
||
80034f8: 6013 str r3, [r2, #0]
|
||
|
||
/* Configure the source of time base considering new system clocks settings*/
|
||
HAL_InitTick(uwTickPrio);
|
||
80034fa: 4b09 ldr r3, [pc, #36] ; (8003520 <HAL_RCC_ClockConfig+0x1d0>)
|
||
80034fc: 681b ldr r3, [r3, #0]
|
||
80034fe: 4618 mov r0, r3
|
||
8003500: f7fe f98e bl 8001820 <HAL_InitTick>
|
||
|
||
return HAL_OK;
|
||
8003504: 2300 movs r3, #0
|
||
}
|
||
8003506: 4618 mov r0, r3
|
||
8003508: 3710 adds r7, #16
|
||
800350a: 46bd mov sp, r7
|
||
800350c: bd80 pop {r7, pc}
|
||
800350e: bf00 nop
|
||
8003510: 40022000 .word 0x40022000
|
||
8003514: 40021000 .word 0x40021000
|
||
8003518: 08008810 .word 0x08008810
|
||
800351c: 20000000 .word 0x20000000
|
||
8003520: 20000004 .word 0x20000004
|
||
|
||
08003524 <HAL_RCC_GetSysClockFreq>:
|
||
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
|
||
*
|
||
* @retval SYSCLK frequency
|
||
*/
|
||
uint32_t HAL_RCC_GetSysClockFreq(void)
|
||
{
|
||
8003524: b490 push {r4, r7}
|
||
8003526: b08a sub sp, #40 ; 0x28
|
||
8003528: af00 add r7, sp, #0
|
||
#if defined(RCC_CFGR2_PREDIV1SRC)
|
||
const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13};
|
||
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
||
#else
|
||
const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
|
||
800352a: 4b2a ldr r3, [pc, #168] ; (80035d4 <HAL_RCC_GetSysClockFreq+0xb0>)
|
||
800352c: 1d3c adds r4, r7, #4
|
||
800352e: cb0f ldmia r3, {r0, r1, r2, r3}
|
||
8003530: e884 000f stmia.w r4, {r0, r1, r2, r3}
|
||
#if defined(RCC_CFGR2_PREDIV1)
|
||
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
||
#else
|
||
const uint8_t aPredivFactorTable[2] = {1, 2};
|
||
8003534: f240 2301 movw r3, #513 ; 0x201
|
||
8003538: 803b strh r3, [r7, #0]
|
||
#endif /*RCC_CFGR2_PREDIV1*/
|
||
|
||
#endif
|
||
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
|
||
800353a: 2300 movs r3, #0
|
||
800353c: 61fb str r3, [r7, #28]
|
||
800353e: 2300 movs r3, #0
|
||
8003540: 61bb str r3, [r7, #24]
|
||
8003542: 2300 movs r3, #0
|
||
8003544: 627b str r3, [r7, #36] ; 0x24
|
||
8003546: 2300 movs r3, #0
|
||
8003548: 617b str r3, [r7, #20]
|
||
uint32_t sysclockfreq = 0U;
|
||
800354a: 2300 movs r3, #0
|
||
800354c: 623b str r3, [r7, #32]
|
||
#if defined(RCC_CFGR2_PREDIV1SRC)
|
||
uint32_t prediv2 = 0U, pll2mul = 0U;
|
||
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
||
|
||
tmpreg = RCC->CFGR;
|
||
800354e: 4b22 ldr r3, [pc, #136] ; (80035d8 <HAL_RCC_GetSysClockFreq+0xb4>)
|
||
8003550: 685b ldr r3, [r3, #4]
|
||
8003552: 61fb str r3, [r7, #28]
|
||
|
||
/* Get SYSCLK source -------------------------------------------------------*/
|
||
switch (tmpreg & RCC_CFGR_SWS)
|
||
8003554: 69fb ldr r3, [r7, #28]
|
||
8003556: f003 030c and.w r3, r3, #12
|
||
800355a: 2b04 cmp r3, #4
|
||
800355c: d002 beq.n 8003564 <HAL_RCC_GetSysClockFreq+0x40>
|
||
800355e: 2b08 cmp r3, #8
|
||
8003560: d003 beq.n 800356a <HAL_RCC_GetSysClockFreq+0x46>
|
||
8003562: e02d b.n 80035c0 <HAL_RCC_GetSysClockFreq+0x9c>
|
||
{
|
||
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
|
||
{
|
||
sysclockfreq = HSE_VALUE;
|
||
8003564: 4b1d ldr r3, [pc, #116] ; (80035dc <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
8003566: 623b str r3, [r7, #32]
|
||
break;
|
||
8003568: e02d b.n 80035c6 <HAL_RCC_GetSysClockFreq+0xa2>
|
||
}
|
||
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
|
||
{
|
||
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
|
||
800356a: 69fb ldr r3, [r7, #28]
|
||
800356c: 0c9b lsrs r3, r3, #18
|
||
800356e: f003 030f and.w r3, r3, #15
|
||
8003572: f107 0228 add.w r2, r7, #40 ; 0x28
|
||
8003576: 4413 add r3, r2
|
||
8003578: f813 3c24 ldrb.w r3, [r3, #-36]
|
||
800357c: 617b str r3, [r7, #20]
|
||
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
|
||
800357e: 69fb ldr r3, [r7, #28]
|
||
8003580: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8003584: 2b00 cmp r3, #0
|
||
8003586: d013 beq.n 80035b0 <HAL_RCC_GetSysClockFreq+0x8c>
|
||
{
|
||
#if defined(RCC_CFGR2_PREDIV1)
|
||
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
|
||
#else
|
||
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
|
||
8003588: 4b13 ldr r3, [pc, #76] ; (80035d8 <HAL_RCC_GetSysClockFreq+0xb4>)
|
||
800358a: 685b ldr r3, [r3, #4]
|
||
800358c: 0c5b lsrs r3, r3, #17
|
||
800358e: f003 0301 and.w r3, r3, #1
|
||
8003592: f107 0228 add.w r2, r7, #40 ; 0x28
|
||
8003596: 4413 add r3, r2
|
||
8003598: f813 3c28 ldrb.w r3, [r3, #-40]
|
||
800359c: 61bb str r3, [r7, #24]
|
||
{
|
||
pllclk = pllclk / 2;
|
||
}
|
||
#else
|
||
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
|
||
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
|
||
800359e: 697b ldr r3, [r7, #20]
|
||
80035a0: 4a0e ldr r2, [pc, #56] ; (80035dc <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
80035a2: fb02 f203 mul.w r2, r2, r3
|
||
80035a6: 69bb ldr r3, [r7, #24]
|
||
80035a8: fbb2 f3f3 udiv r3, r2, r3
|
||
80035ac: 627b str r3, [r7, #36] ; 0x24
|
||
80035ae: e004 b.n 80035ba <HAL_RCC_GetSysClockFreq+0x96>
|
||
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
||
}
|
||
else
|
||
{
|
||
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
|
||
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
|
||
80035b0: 697b ldr r3, [r7, #20]
|
||
80035b2: 4a0b ldr r2, [pc, #44] ; (80035e0 <HAL_RCC_GetSysClockFreq+0xbc>)
|
||
80035b4: fb02 f303 mul.w r3, r2, r3
|
||
80035b8: 627b str r3, [r7, #36] ; 0x24
|
||
}
|
||
sysclockfreq = pllclk;
|
||
80035ba: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80035bc: 623b str r3, [r7, #32]
|
||
break;
|
||
80035be: e002 b.n 80035c6 <HAL_RCC_GetSysClockFreq+0xa2>
|
||
}
|
||
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
|
||
default: /* HSI used as system clock */
|
||
{
|
||
sysclockfreq = HSI_VALUE;
|
||
80035c0: 4b06 ldr r3, [pc, #24] ; (80035dc <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
80035c2: 623b str r3, [r7, #32]
|
||
break;
|
||
80035c4: bf00 nop
|
||
}
|
||
}
|
||
return sysclockfreq;
|
||
80035c6: 6a3b ldr r3, [r7, #32]
|
||
}
|
||
80035c8: 4618 mov r0, r3
|
||
80035ca: 3728 adds r7, #40 ; 0x28
|
||
80035cc: 46bd mov sp, r7
|
||
80035ce: bc90 pop {r4, r7}
|
||
80035d0: 4770 bx lr
|
||
80035d2: bf00 nop
|
||
80035d4: 08008718 .word 0x08008718
|
||
80035d8: 40021000 .word 0x40021000
|
||
80035dc: 007a1200 .word 0x007a1200
|
||
80035e0: 003d0900 .word 0x003d0900
|
||
|
||
080035e4 <HAL_RCC_GetHCLKFreq>:
|
||
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
|
||
* and updated within this function
|
||
* @retval HCLK frequency
|
||
*/
|
||
uint32_t HAL_RCC_GetHCLKFreq(void)
|
||
{
|
||
80035e4: b480 push {r7}
|
||
80035e6: af00 add r7, sp, #0
|
||
return SystemCoreClock;
|
||
80035e8: 4b02 ldr r3, [pc, #8] ; (80035f4 <HAL_RCC_GetHCLKFreq+0x10>)
|
||
80035ea: 681b ldr r3, [r3, #0]
|
||
}
|
||
80035ec: 4618 mov r0, r3
|
||
80035ee: 46bd mov sp, r7
|
||
80035f0: bc80 pop {r7}
|
||
80035f2: 4770 bx lr
|
||
80035f4: 20000000 .word 0x20000000
|
||
|
||
080035f8 <HAL_RCC_GetPCLK1Freq>:
|
||
* @note Each time PCLK1 changes, this function must be called to update the
|
||
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
|
||
* @retval PCLK1 frequency
|
||
*/
|
||
uint32_t HAL_RCC_GetPCLK1Freq(void)
|
||
{
|
||
80035f8: b580 push {r7, lr}
|
||
80035fa: af00 add r7, sp, #0
|
||
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
|
||
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
|
||
80035fc: f7ff fff2 bl 80035e4 <HAL_RCC_GetHCLKFreq>
|
||
8003600: 4602 mov r2, r0
|
||
8003602: 4b05 ldr r3, [pc, #20] ; (8003618 <HAL_RCC_GetPCLK1Freq+0x20>)
|
||
8003604: 685b ldr r3, [r3, #4]
|
||
8003606: 0a1b lsrs r3, r3, #8
|
||
8003608: f003 0307 and.w r3, r3, #7
|
||
800360c: 4903 ldr r1, [pc, #12] ; (800361c <HAL_RCC_GetPCLK1Freq+0x24>)
|
||
800360e: 5ccb ldrb r3, [r1, r3]
|
||
8003610: fa22 f303 lsr.w r3, r2, r3
|
||
}
|
||
8003614: 4618 mov r0, r3
|
||
8003616: bd80 pop {r7, pc}
|
||
8003618: 40021000 .word 0x40021000
|
||
800361c: 08008820 .word 0x08008820
|
||
|
||
08003620 <RCC_Delay>:
|
||
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
|
||
* @param mdelay: specifies the delay time length, in milliseconds.
|
||
* @retval None
|
||
*/
|
||
static void RCC_Delay(uint32_t mdelay)
|
||
{
|
||
8003620: b480 push {r7}
|
||
8003622: b085 sub sp, #20
|
||
8003624: af00 add r7, sp, #0
|
||
8003626: 6078 str r0, [r7, #4]
|
||
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
|
||
8003628: 4b0a ldr r3, [pc, #40] ; (8003654 <RCC_Delay+0x34>)
|
||
800362a: 681b ldr r3, [r3, #0]
|
||
800362c: 4a0a ldr r2, [pc, #40] ; (8003658 <RCC_Delay+0x38>)
|
||
800362e: fba2 2303 umull r2, r3, r2, r3
|
||
8003632: 0a5b lsrs r3, r3, #9
|
||
8003634: 687a ldr r2, [r7, #4]
|
||
8003636: fb02 f303 mul.w r3, r2, r3
|
||
800363a: 60fb str r3, [r7, #12]
|
||
do
|
||
{
|
||
__NOP();
|
||
800363c: bf00 nop
|
||
}
|
||
while (Delay --);
|
||
800363e: 68fb ldr r3, [r7, #12]
|
||
8003640: 1e5a subs r2, r3, #1
|
||
8003642: 60fa str r2, [r7, #12]
|
||
8003644: 2b00 cmp r3, #0
|
||
8003646: d1f9 bne.n 800363c <RCC_Delay+0x1c>
|
||
}
|
||
8003648: bf00 nop
|
||
800364a: bf00 nop
|
||
800364c: 3714 adds r7, #20
|
||
800364e: 46bd mov sp, r7
|
||
8003650: bc80 pop {r7}
|
||
8003652: 4770 bx lr
|
||
8003654: 20000000 .word 0x20000000
|
||
8003658: 10624dd3 .word 0x10624dd3
|
||
|
||
0800365c <HAL_SRAM_Init>:
|
||
* @param ExtTiming Pointer to SRAM extended mode timing structure
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing,
|
||
FSMC_NORSRAM_TimingTypeDef *ExtTiming)
|
||
{
|
||
800365c: b580 push {r7, lr}
|
||
800365e: b084 sub sp, #16
|
||
8003660: af00 add r7, sp, #0
|
||
8003662: 60f8 str r0, [r7, #12]
|
||
8003664: 60b9 str r1, [r7, #8]
|
||
8003666: 607a str r2, [r7, #4]
|
||
/* Check the SRAM handle parameter */
|
||
if ((hsram == NULL) || (hsram->Init.BurstAccessMode == FSMC_BURST_ACCESS_MODE_ENABLE))
|
||
8003668: 68fb ldr r3, [r7, #12]
|
||
800366a: 2b00 cmp r3, #0
|
||
800366c: d004 beq.n 8003678 <HAL_SRAM_Init+0x1c>
|
||
800366e: 68fb ldr r3, [r7, #12]
|
||
8003670: 699b ldr r3, [r3, #24]
|
||
8003672: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
8003676: d101 bne.n 800367c <HAL_SRAM_Init+0x20>
|
||
{
|
||
return HAL_ERROR;
|
||
8003678: 2301 movs r3, #1
|
||
800367a: e038 b.n 80036ee <HAL_SRAM_Init+0x92>
|
||
}
|
||
|
||
if (hsram->State == HAL_SRAM_STATE_RESET)
|
||
800367c: 68fb ldr r3, [r7, #12]
|
||
800367e: f893 3041 ldrb.w r3, [r3, #65] ; 0x41
|
||
8003682: b2db uxtb r3, r3
|
||
8003684: 2b00 cmp r3, #0
|
||
8003686: d106 bne.n 8003696 <HAL_SRAM_Init+0x3a>
|
||
{
|
||
/* Allocate lock resource and initialize it */
|
||
hsram->Lock = HAL_UNLOCKED;
|
||
8003688: 68fb ldr r3, [r7, #12]
|
||
800368a: 2200 movs r2, #0
|
||
800368c: f883 2040 strb.w r2, [r3, #64] ; 0x40
|
||
|
||
/* Init the low level hardware */
|
||
hsram->MspInitCallback(hsram);
|
||
#else
|
||
/* Initialize the low level hardware (MSP) */
|
||
HAL_SRAM_MspInit(hsram);
|
||
8003690: 68f8 ldr r0, [r7, #12]
|
||
8003692: f7fd ff91 bl 80015b8 <HAL_SRAM_MspInit>
|
||
#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */
|
||
}
|
||
|
||
/* Initialize SRAM control Interface */
|
||
(void)FSMC_NORSRAM_Init(hsram->Instance, &(hsram->Init));
|
||
8003696: 68fb ldr r3, [r7, #12]
|
||
8003698: 681a ldr r2, [r3, #0]
|
||
800369a: 68fb ldr r3, [r7, #12]
|
||
800369c: 3308 adds r3, #8
|
||
800369e: 4619 mov r1, r3
|
||
80036a0: 4610 mov r0, r2
|
||
80036a2: f000 f829 bl 80036f8 <FSMC_NORSRAM_Init>
|
||
|
||
/* Initialize SRAM timing Interface */
|
||
(void)FSMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank);
|
||
80036a6: 68fb ldr r3, [r7, #12]
|
||
80036a8: 6818 ldr r0, [r3, #0]
|
||
80036aa: 68fb ldr r3, [r7, #12]
|
||
80036ac: 689b ldr r3, [r3, #8]
|
||
80036ae: 461a mov r2, r3
|
||
80036b0: 68b9 ldr r1, [r7, #8]
|
||
80036b2: f000 f88b bl 80037cc <FSMC_NORSRAM_Timing_Init>
|
||
|
||
/* Initialize SRAM extended mode timing Interface */
|
||
(void)FSMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank,
|
||
80036b6: 68fb ldr r3, [r7, #12]
|
||
80036b8: 6858 ldr r0, [r3, #4]
|
||
80036ba: 68fb ldr r3, [r7, #12]
|
||
80036bc: 689a ldr r2, [r3, #8]
|
||
80036be: 68fb ldr r3, [r7, #12]
|
||
80036c0: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
80036c2: 6879 ldr r1, [r7, #4]
|
||
80036c4: f000 f8b6 bl 8003834 <FSMC_NORSRAM_Extended_Timing_Init>
|
||
hsram->Init.ExtendedMode);
|
||
|
||
/* Enable the NORSRAM device */
|
||
__FSMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
|
||
80036c8: 68fb ldr r3, [r7, #12]
|
||
80036ca: 681b ldr r3, [r3, #0]
|
||
80036cc: 68fa ldr r2, [r7, #12]
|
||
80036ce: 6892 ldr r2, [r2, #8]
|
||
80036d0: f853 1022 ldr.w r1, [r3, r2, lsl #2]
|
||
80036d4: 68fb ldr r3, [r7, #12]
|
||
80036d6: 681b ldr r3, [r3, #0]
|
||
80036d8: 68fa ldr r2, [r7, #12]
|
||
80036da: 6892 ldr r2, [r2, #8]
|
||
80036dc: f041 0101 orr.w r1, r1, #1
|
||
80036e0: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
/* Initialize the SRAM controller state */
|
||
hsram->State = HAL_SRAM_STATE_READY;
|
||
80036e4: 68fb ldr r3, [r7, #12]
|
||
80036e6: 2201 movs r2, #1
|
||
80036e8: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
||
|
||
return HAL_OK;
|
||
80036ec: 2300 movs r3, #0
|
||
}
|
||
80036ee: 4618 mov r0, r3
|
||
80036f0: 3710 adds r7, #16
|
||
80036f2: 46bd mov sp, r7
|
||
80036f4: bd80 pop {r7, pc}
|
||
...
|
||
|
||
080036f8 <FSMC_NORSRAM_Init>:
|
||
* @param Init Pointer to NORSRAM Initialization structure
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device,
|
||
FSMC_NORSRAM_InitTypeDef *Init)
|
||
{
|
||
80036f8: b480 push {r7}
|
||
80036fa: b087 sub sp, #28
|
||
80036fc: af00 add r7, sp, #0
|
||
80036fe: 6078 str r0, [r7, #4]
|
||
8003700: 6039 str r1, [r7, #0]
|
||
assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait));
|
||
assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst));
|
||
assert_param(IS_FSMC_PAGESIZE(Init->PageSize));
|
||
|
||
/* Disable NORSRAM Device */
|
||
__FSMC_NORSRAM_DISABLE(Device, Init->NSBank);
|
||
8003702: 683b ldr r3, [r7, #0]
|
||
8003704: 681a ldr r2, [r3, #0]
|
||
8003706: 687b ldr r3, [r7, #4]
|
||
8003708: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
||
800370c: 683a ldr r2, [r7, #0]
|
||
800370e: 6812 ldr r2, [r2, #0]
|
||
8003710: f023 0101 bic.w r1, r3, #1
|
||
8003714: 687b ldr r3, [r7, #4]
|
||
8003716: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
/* Set NORSRAM device control parameters */
|
||
if (Init->MemoryType == FSMC_MEMORY_TYPE_NOR)
|
||
800371a: 683b ldr r3, [r7, #0]
|
||
800371c: 689b ldr r3, [r3, #8]
|
||
800371e: 2b08 cmp r3, #8
|
||
8003720: d102 bne.n 8003728 <FSMC_NORSRAM_Init+0x30>
|
||
{
|
||
flashaccess = FSMC_NORSRAM_FLASH_ACCESS_ENABLE;
|
||
8003722: 2340 movs r3, #64 ; 0x40
|
||
8003724: 617b str r3, [r7, #20]
|
||
8003726: e001 b.n 800372c <FSMC_NORSRAM_Init+0x34>
|
||
}
|
||
else
|
||
{
|
||
flashaccess = FSMC_NORSRAM_FLASH_ACCESS_DISABLE;
|
||
8003728: 2300 movs r3, #0
|
||
800372a: 617b str r3, [r7, #20]
|
||
}
|
||
|
||
btcr_reg = (flashaccess | \
|
||
Init->DataAddressMux | \
|
||
800372c: 683b ldr r3, [r7, #0]
|
||
800372e: 685a ldr r2, [r3, #4]
|
||
btcr_reg = (flashaccess | \
|
||
8003730: 697b ldr r3, [r7, #20]
|
||
8003732: 431a orrs r2, r3
|
||
Init->MemoryType | \
|
||
8003734: 683b ldr r3, [r7, #0]
|
||
8003736: 689b ldr r3, [r3, #8]
|
||
Init->DataAddressMux | \
|
||
8003738: 431a orrs r2, r3
|
||
Init->MemoryDataWidth | \
|
||
800373a: 683b ldr r3, [r7, #0]
|
||
800373c: 68db ldr r3, [r3, #12]
|
||
Init->MemoryType | \
|
||
800373e: 431a orrs r2, r3
|
||
Init->BurstAccessMode | \
|
||
8003740: 683b ldr r3, [r7, #0]
|
||
8003742: 691b ldr r3, [r3, #16]
|
||
Init->MemoryDataWidth | \
|
||
8003744: 431a orrs r2, r3
|
||
Init->WaitSignalPolarity | \
|
||
8003746: 683b ldr r3, [r7, #0]
|
||
8003748: 695b ldr r3, [r3, #20]
|
||
Init->BurstAccessMode | \
|
||
800374a: 431a orrs r2, r3
|
||
Init->WaitSignalActive | \
|
||
800374c: 683b ldr r3, [r7, #0]
|
||
800374e: 69db ldr r3, [r3, #28]
|
||
Init->WaitSignalPolarity | \
|
||
8003750: 431a orrs r2, r3
|
||
Init->WriteOperation | \
|
||
8003752: 683b ldr r3, [r7, #0]
|
||
8003754: 6a1b ldr r3, [r3, #32]
|
||
Init->WaitSignalActive | \
|
||
8003756: 431a orrs r2, r3
|
||
Init->WaitSignal | \
|
||
8003758: 683b ldr r3, [r7, #0]
|
||
800375a: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
Init->WriteOperation | \
|
||
800375c: 431a orrs r2, r3
|
||
Init->ExtendedMode | \
|
||
800375e: 683b ldr r3, [r7, #0]
|
||
8003760: 6a9b ldr r3, [r3, #40] ; 0x28
|
||
Init->WaitSignal | \
|
||
8003762: 431a orrs r2, r3
|
||
Init->AsynchronousWait | \
|
||
8003764: 683b ldr r3, [r7, #0]
|
||
8003766: 6adb ldr r3, [r3, #44] ; 0x2c
|
||
Init->ExtendedMode | \
|
||
8003768: 431a orrs r2, r3
|
||
Init->WriteBurst);
|
||
800376a: 683b ldr r3, [r7, #0]
|
||
800376c: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
btcr_reg = (flashaccess | \
|
||
800376e: 4313 orrs r3, r2
|
||
8003770: 613b str r3, [r7, #16]
|
||
|
||
btcr_reg |= Init->WrapMode;
|
||
8003772: 683b ldr r3, [r7, #0]
|
||
8003774: 699b ldr r3, [r3, #24]
|
||
8003776: 693a ldr r2, [r7, #16]
|
||
8003778: 4313 orrs r3, r2
|
||
800377a: 613b str r3, [r7, #16]
|
||
btcr_reg |= Init->PageSize;
|
||
800377c: 683b ldr r3, [r7, #0]
|
||
800377e: 6b5b ldr r3, [r3, #52] ; 0x34
|
||
8003780: 693a ldr r2, [r7, #16]
|
||
8003782: 4313 orrs r3, r2
|
||
8003784: 613b str r3, [r7, #16]
|
||
|
||
mask = (FSMC_BCRx_MBKEN |
|
||
8003786: 4b10 ldr r3, [pc, #64] ; (80037c8 <FSMC_NORSRAM_Init+0xd0>)
|
||
8003788: 60fb str r3, [r7, #12]
|
||
FSMC_BCRx_WAITEN |
|
||
FSMC_BCRx_EXTMOD |
|
||
FSMC_BCRx_ASYNCWAIT |
|
||
FSMC_BCRx_CBURSTRW);
|
||
|
||
mask |= FSMC_BCRx_WRAPMOD;
|
||
800378a: 68fb ldr r3, [r7, #12]
|
||
800378c: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
||
8003790: 60fb str r3, [r7, #12]
|
||
mask |= 0x00070000U; /* CPSIZE to be defined in CMSIS file */
|
||
8003792: 68fb ldr r3, [r7, #12]
|
||
8003794: f443 23e0 orr.w r3, r3, #458752 ; 0x70000
|
||
8003798: 60fb str r3, [r7, #12]
|
||
|
||
MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg);
|
||
800379a: 683b ldr r3, [r7, #0]
|
||
800379c: 681a ldr r2, [r3, #0]
|
||
800379e: 687b ldr r3, [r7, #4]
|
||
80037a0: f853 2022 ldr.w r2, [r3, r2, lsl #2]
|
||
80037a4: 68fb ldr r3, [r7, #12]
|
||
80037a6: 43db mvns r3, r3
|
||
80037a8: ea02 0103 and.w r1, r2, r3
|
||
80037ac: 683b ldr r3, [r7, #0]
|
||
80037ae: 681a ldr r2, [r3, #0]
|
||
80037b0: 693b ldr r3, [r7, #16]
|
||
80037b2: 4319 orrs r1, r3
|
||
80037b4: 687b ldr r3, [r7, #4]
|
||
80037b6: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
|
||
return HAL_OK;
|
||
80037ba: 2300 movs r3, #0
|
||
}
|
||
80037bc: 4618 mov r0, r3
|
||
80037be: 371c adds r7, #28
|
||
80037c0: 46bd mov sp, r7
|
||
80037c2: bc80 pop {r7}
|
||
80037c4: 4770 bx lr
|
||
80037c6: bf00 nop
|
||
80037c8: 0008fb7f .word 0x0008fb7f
|
||
|
||
080037cc <FSMC_NORSRAM_Timing_Init>:
|
||
* @param Bank NORSRAM bank number
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device,
|
||
FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)
|
||
{
|
||
80037cc: b480 push {r7}
|
||
80037ce: b085 sub sp, #20
|
||
80037d0: af00 add r7, sp, #0
|
||
80037d2: 60f8 str r0, [r7, #12]
|
||
80037d4: 60b9 str r1, [r7, #8]
|
||
80037d6: 607a str r2, [r7, #4]
|
||
assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency));
|
||
assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
|
||
assert_param(IS_FSMC_NORSRAM_BANK(Bank));
|
||
|
||
/* Set FSMC_NORSRAM device timing parameters */
|
||
MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime |
|
||
80037d8: 687b ldr r3, [r7, #4]
|
||
80037da: 1c5a adds r2, r3, #1
|
||
80037dc: 68fb ldr r3, [r7, #12]
|
||
80037de: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
||
80037e2: f003 4140 and.w r1, r3, #3221225472 ; 0xc0000000
|
||
80037e6: 68bb ldr r3, [r7, #8]
|
||
80037e8: 681a ldr r2, [r3, #0]
|
||
80037ea: 68bb ldr r3, [r7, #8]
|
||
80037ec: 685b ldr r3, [r3, #4]
|
||
80037ee: 011b lsls r3, r3, #4
|
||
80037f0: 431a orrs r2, r3
|
||
80037f2: 68bb ldr r3, [r7, #8]
|
||
80037f4: 689b ldr r3, [r3, #8]
|
||
80037f6: 021b lsls r3, r3, #8
|
||
80037f8: 431a orrs r2, r3
|
||
80037fa: 68bb ldr r3, [r7, #8]
|
||
80037fc: 68db ldr r3, [r3, #12]
|
||
80037fe: 041b lsls r3, r3, #16
|
||
8003800: 431a orrs r2, r3
|
||
8003802: 68bb ldr r3, [r7, #8]
|
||
8003804: 691b ldr r3, [r3, #16]
|
||
8003806: 3b01 subs r3, #1
|
||
8003808: 051b lsls r3, r3, #20
|
||
800380a: 431a orrs r2, r3
|
||
800380c: 68bb ldr r3, [r7, #8]
|
||
800380e: 695b ldr r3, [r3, #20]
|
||
8003810: 3b02 subs r3, #2
|
||
8003812: 061b lsls r3, r3, #24
|
||
8003814: 431a orrs r2, r3
|
||
8003816: 68bb ldr r3, [r7, #8]
|
||
8003818: 699b ldr r3, [r3, #24]
|
||
800381a: 4313 orrs r3, r2
|
||
800381c: 687a ldr r2, [r7, #4]
|
||
800381e: 3201 adds r2, #1
|
||
8003820: 4319 orrs r1, r3
|
||
8003822: 68fb ldr r3, [r7, #12]
|
||
8003824: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
((Timing->BusTurnAroundDuration) << FSMC_BTRx_BUSTURN_Pos) |
|
||
(((Timing->CLKDivision) - 1U) << FSMC_BTRx_CLKDIV_Pos) |
|
||
(((Timing->DataLatency) - 2U) << FSMC_BTRx_DATLAT_Pos) |
|
||
(Timing->AccessMode)));
|
||
|
||
return HAL_OK;
|
||
8003828: 2300 movs r3, #0
|
||
}
|
||
800382a: 4618 mov r0, r3
|
||
800382c: 3714 adds r7, #20
|
||
800382e: 46bd mov sp, r7
|
||
8003830: bc80 pop {r7}
|
||
8003832: 4770 bx lr
|
||
|
||
08003834 <FSMC_NORSRAM_Extended_Timing_Init>:
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device,
|
||
FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank,
|
||
uint32_t ExtendedMode)
|
||
{
|
||
8003834: b480 push {r7}
|
||
8003836: b085 sub sp, #20
|
||
8003838: af00 add r7, sp, #0
|
||
800383a: 60f8 str r0, [r7, #12]
|
||
800383c: 60b9 str r1, [r7, #8]
|
||
800383e: 607a str r2, [r7, #4]
|
||
8003840: 603b str r3, [r7, #0]
|
||
/* Check the parameters */
|
||
assert_param(IS_FSMC_EXTENDED_MODE(ExtendedMode));
|
||
|
||
/* Set NORSRAM device timing register for write configuration, if extended mode is used */
|
||
if (ExtendedMode == FSMC_EXTENDED_MODE_ENABLE)
|
||
8003842: 683b ldr r3, [r7, #0]
|
||
8003844: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
|
||
8003848: d11d bne.n 8003886 <FSMC_NORSRAM_Extended_Timing_Init+0x52>
|
||
assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
|
||
assert_param(IS_FSMC_NORSRAM_BANK(Bank));
|
||
|
||
/* Set NORSRAM device timing register for write configuration, if extended mode is used */
|
||
#if defined(FSMC_BWTRx_BUSTURN)
|
||
MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime |
|
||
800384a: 68fb ldr r3, [r7, #12]
|
||
800384c: 687a ldr r2, [r7, #4]
|
||
800384e: f853 2022 ldr.w r2, [r3, r2, lsl #2]
|
||
8003852: 4b13 ldr r3, [pc, #76] ; (80038a0 <FSMC_NORSRAM_Extended_Timing_Init+0x6c>)
|
||
8003854: 4013 ands r3, r2
|
||
8003856: 68ba ldr r2, [r7, #8]
|
||
8003858: 6811 ldr r1, [r2, #0]
|
||
800385a: 68ba ldr r2, [r7, #8]
|
||
800385c: 6852 ldr r2, [r2, #4]
|
||
800385e: 0112 lsls r2, r2, #4
|
||
8003860: 4311 orrs r1, r2
|
||
8003862: 68ba ldr r2, [r7, #8]
|
||
8003864: 6892 ldr r2, [r2, #8]
|
||
8003866: 0212 lsls r2, r2, #8
|
||
8003868: 4311 orrs r1, r2
|
||
800386a: 68ba ldr r2, [r7, #8]
|
||
800386c: 6992 ldr r2, [r2, #24]
|
||
800386e: 4311 orrs r1, r2
|
||
8003870: 68ba ldr r2, [r7, #8]
|
||
8003872: 68d2 ldr r2, [r2, #12]
|
||
8003874: 0412 lsls r2, r2, #16
|
||
8003876: 430a orrs r2, r1
|
||
8003878: ea43 0102 orr.w r1, r3, r2
|
||
800387c: 68fb ldr r3, [r7, #12]
|
||
800387e: 687a ldr r2, [r7, #4]
|
||
8003880: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
8003884: e005 b.n 8003892 <FSMC_NORSRAM_Extended_Timing_Init+0x5e>
|
||
(((Timing->DataLatency) - 2U) << FSMC_BWTRx_DATLAT_Pos)));
|
||
#endif /* FSMC_BWTRx_BUSTURN */
|
||
}
|
||
else
|
||
{
|
||
Device->BWTR[Bank] = 0x0FFFFFFFU;
|
||
8003886: 68fb ldr r3, [r7, #12]
|
||
8003888: 687a ldr r2, [r7, #4]
|
||
800388a: f06f 4170 mvn.w r1, #4026531840 ; 0xf0000000
|
||
800388e: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
}
|
||
|
||
return HAL_OK;
|
||
8003892: 2300 movs r3, #0
|
||
}
|
||
8003894: 4618 mov r0, r3
|
||
8003896: 3714 adds r7, #20
|
||
8003898: 46bd mov sp, r7
|
||
800389a: bc80 pop {r7}
|
||
800389c: 4770 bx lr
|
||
800389e: bf00 nop
|
||
80038a0: cff00000 .word 0xcff00000
|
||
|
||
080038a4 <LCD_WR_REG>:
|
||
_lcd_dev lcddev; //����LCD��Ҫ����
|
||
//**************************************************���ֿ��ٽӿ�
|
||
//д�Ĵ�������
|
||
//regval:�Ĵ���ֵ
|
||
void LCD_WR_REG(uint16_t regval)
|
||
{
|
||
80038a4: b480 push {r7}
|
||
80038a6: b083 sub sp, #12
|
||
80038a8: af00 add r7, sp, #0
|
||
80038aa: 4603 mov r3, r0
|
||
80038ac: 80fb strh r3, [r7, #6]
|
||
LCD_REG_ADDRESS=regval;//д��Ҫд�ļĴ�������
|
||
80038ae: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
80038b2: 88fb ldrh r3, [r7, #6]
|
||
80038b4: 8013 strh r3, [r2, #0]
|
||
}
|
||
80038b6: bf00 nop
|
||
80038b8: 370c adds r7, #12
|
||
80038ba: 46bd mov sp, r7
|
||
80038bc: bc80 pop {r7}
|
||
80038be: 4770 bx lr
|
||
|
||
080038c0 <LCD_WR_DATA>:
|
||
//дLCD����
|
||
//data:Ҫд����ֵ
|
||
void LCD_WR_DATA(uint16_t data)
|
||
{
|
||
80038c0: b480 push {r7}
|
||
80038c2: b083 sub sp, #12
|
||
80038c4: af00 add r7, sp, #0
|
||
80038c6: 4603 mov r3, r0
|
||
80038c8: 80fb strh r3, [r7, #6]
|
||
LCD_DATA_ADDRESS=data;
|
||
80038ca: 4a04 ldr r2, [pc, #16] ; (80038dc <LCD_WR_DATA+0x1c>)
|
||
80038cc: 88fb ldrh r3, [r7, #6]
|
||
80038ce: 8013 strh r3, [r2, #0]
|
||
}
|
||
80038d0: bf00 nop
|
||
80038d2: 370c adds r7, #12
|
||
80038d4: 46bd mov sp, r7
|
||
80038d6: bc80 pop {r7}
|
||
80038d8: 4770 bx lr
|
||
80038da: bf00 nop
|
||
80038dc: 6c000800 .word 0x6c000800
|
||
|
||
080038e0 <LCD_WriteReg>:
|
||
}
|
||
//д�Ĵ���
|
||
//LCD_Reg:�Ĵ�����ַ
|
||
//LCD_RegValue:Ҫд��������
|
||
void LCD_WriteReg(uint16_t LCD_Reg, uint16_t LCD_RegValue)
|
||
{
|
||
80038e0: b480 push {r7}
|
||
80038e2: b083 sub sp, #12
|
||
80038e4: af00 add r7, sp, #0
|
||
80038e6: 4603 mov r3, r0
|
||
80038e8: 460a mov r2, r1
|
||
80038ea: 80fb strh r3, [r7, #6]
|
||
80038ec: 4613 mov r3, r2
|
||
80038ee: 80bb strh r3, [r7, #4]
|
||
LCD_REG_ADDRESS = LCD_Reg; //д��Ҫд�ļĴ�������
|
||
80038f0: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
80038f4: 88fb ldrh r3, [r7, #6]
|
||
80038f6: 8013 strh r3, [r2, #0]
|
||
LCD_DATA_ADDRESS = LCD_RegValue;//�����
|
||
80038f8: 4a03 ldr r2, [pc, #12] ; (8003908 <LCD_WriteReg+0x28>)
|
||
80038fa: 88bb ldrh r3, [r7, #4]
|
||
80038fc: 8013 strh r3, [r2, #0]
|
||
}
|
||
80038fe: bf00 nop
|
||
8003900: 370c adds r7, #12
|
||
8003902: 46bd mov sp, r7
|
||
8003904: bc80 pop {r7}
|
||
8003906: 4770 bx lr
|
||
8003908: 6c000800 .word 0x6c000800
|
||
|
||
0800390c <LCD_ReadReg>:
|
||
//���Ĵ���
|
||
//LCD_Reg:�Ĵ�����ַ
|
||
//����ֵ:����������
|
||
uint16_t LCD_ReadReg(uint16_t LCD_Reg)
|
||
{
|
||
800390c: b480 push {r7}
|
||
800390e: b083 sub sp, #12
|
||
8003910: af00 add r7, sp, #0
|
||
8003912: 4603 mov r3, r0
|
||
8003914: 80fb strh r3, [r7, #6]
|
||
LCD_REG_ADDRESS=LCD_Reg; //д��Ҫ���ļĴ�������
|
||
8003916: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
800391a: 88fb ldrh r3, [r7, #6]
|
||
800391c: 8013 strh r3, [r2, #0]
|
||
//delay_us(5);
|
||
return LCD_DATA_ADDRESS; //���ض�����ֵ
|
||
800391e: 4b04 ldr r3, [pc, #16] ; (8003930 <LCD_ReadReg+0x24>)
|
||
8003920: 881b ldrh r3, [r3, #0]
|
||
8003922: b29b uxth r3, r3
|
||
}
|
||
8003924: 4618 mov r0, r3
|
||
8003926: 370c adds r7, #12
|
||
8003928: 46bd mov sp, r7
|
||
800392a: bc80 pop {r7}
|
||
800392c: 4770 bx lr
|
||
800392e: bf00 nop
|
||
8003930: 6c000800 .word 0x6c000800
|
||
|
||
08003934 <LCD_Scan_Dir>:
|
||
//ע��:�����������ܻ��ܵ��˺������õ�Ӱ��(������9341/6804����������),
|
||
//����,һ������ΪL2R_U2D����,��������Ϊ����ɨ�跽ʽ,���ܵ�����ʾ������.
|
||
//dir:0~7,����8������(���嶨����lcd.h)
|
||
//9320/9325/9328/4531/4535/1505/b505/8989/5408/9341/5310��IC�Ѿ�ʵ�ʲ���
|
||
void LCD_Scan_Dir(uint8_t dir)
|
||
{
|
||
8003934: b580 push {r7, lr}
|
||
8003936: b084 sub sp, #16
|
||
8003938: af00 add r7, sp, #0
|
||
800393a: 4603 mov r3, r0
|
||
800393c: 71fb strb r3, [r7, #7]
|
||
uint16_t regval=0;
|
||
800393e: 2300 movs r3, #0
|
||
8003940: 81fb strh r3, [r7, #14]
|
||
uint8_t dirreg=0;
|
||
8003942: 2300 movs r3, #0
|
||
8003944: 737b strb r3, [r7, #13]
|
||
uint16_t temp;
|
||
if(lcddev.dir==1&&lcddev.id!=0X6804)//����ʱ����6804���ı�ɨ�跽����
|
||
8003946: 4ba8 ldr r3, [pc, #672] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003948: 799b ldrb r3, [r3, #6]
|
||
800394a: 2b01 cmp r3, #1
|
||
800394c: d134 bne.n 80039b8 <LCD_Scan_Dir+0x84>
|
||
800394e: 4ba6 ldr r3, [pc, #664] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003950: 889b ldrh r3, [r3, #4]
|
||
8003952: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003956: 4293 cmp r3, r2
|
||
8003958: d02e beq.n 80039b8 <LCD_Scan_Dir+0x84>
|
||
{
|
||
switch(dir)//����ת��
|
||
800395a: 79fb ldrb r3, [r7, #7]
|
||
800395c: 2b07 cmp r3, #7
|
||
800395e: d82c bhi.n 80039ba <LCD_Scan_Dir+0x86>
|
||
8003960: a201 add r2, pc, #4 ; (adr r2, 8003968 <LCD_Scan_Dir+0x34>)
|
||
8003962: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
8003966: bf00 nop
|
||
8003968: 08003989 .word 0x08003989
|
||
800396c: 0800398f .word 0x0800398f
|
||
8003970: 08003995 .word 0x08003995
|
||
8003974: 0800399b .word 0x0800399b
|
||
8003978: 080039a1 .word 0x080039a1
|
||
800397c: 080039a7 .word 0x080039a7
|
||
8003980: 080039ad .word 0x080039ad
|
||
8003984: 080039b3 .word 0x080039b3
|
||
{
|
||
case 0:dir=6;break;
|
||
8003988: 2306 movs r3, #6
|
||
800398a: 71fb strb r3, [r7, #7]
|
||
800398c: e015 b.n 80039ba <LCD_Scan_Dir+0x86>
|
||
case 1:dir=7;break;
|
||
800398e: 2307 movs r3, #7
|
||
8003990: 71fb strb r3, [r7, #7]
|
||
8003992: e012 b.n 80039ba <LCD_Scan_Dir+0x86>
|
||
case 2:dir=4;break;
|
||
8003994: 2304 movs r3, #4
|
||
8003996: 71fb strb r3, [r7, #7]
|
||
8003998: e00f b.n 80039ba <LCD_Scan_Dir+0x86>
|
||
case 3:dir=5;break;
|
||
800399a: 2305 movs r3, #5
|
||
800399c: 71fb strb r3, [r7, #7]
|
||
800399e: e00c b.n 80039ba <LCD_Scan_Dir+0x86>
|
||
case 4:dir=1;break;
|
||
80039a0: 2301 movs r3, #1
|
||
80039a2: 71fb strb r3, [r7, #7]
|
||
80039a4: e009 b.n 80039ba <LCD_Scan_Dir+0x86>
|
||
case 5:dir=0;break;
|
||
80039a6: 2300 movs r3, #0
|
||
80039a8: 71fb strb r3, [r7, #7]
|
||
80039aa: e006 b.n 80039ba <LCD_Scan_Dir+0x86>
|
||
case 6:dir=3;break;
|
||
80039ac: 2303 movs r3, #3
|
||
80039ae: 71fb strb r3, [r7, #7]
|
||
80039b0: e003 b.n 80039ba <LCD_Scan_Dir+0x86>
|
||
case 7:dir=2;break;
|
||
80039b2: 2302 movs r3, #2
|
||
80039b4: 71fb strb r3, [r7, #7]
|
||
80039b6: e000 b.n 80039ba <LCD_Scan_Dir+0x86>
|
||
}
|
||
}
|
||
80039b8: bf00 nop
|
||
if(lcddev.id==0x9341||lcddev.id==0X6804||lcddev.id==0X5310)//9341/6804/5310,������
|
||
80039ba: 4b8b ldr r3, [pc, #556] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
80039bc: 889b ldrh r3, [r3, #4]
|
||
80039be: f249 3241 movw r2, #37697 ; 0x9341
|
||
80039c2: 4293 cmp r3, r2
|
||
80039c4: d00c beq.n 80039e0 <LCD_Scan_Dir+0xac>
|
||
80039c6: 4b88 ldr r3, [pc, #544] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
80039c8: 889b ldrh r3, [r3, #4]
|
||
80039ca: f646 0204 movw r2, #26628 ; 0x6804
|
||
80039ce: 4293 cmp r3, r2
|
||
80039d0: d006 beq.n 80039e0 <LCD_Scan_Dir+0xac>
|
||
80039d2: 4b85 ldr r3, [pc, #532] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
80039d4: 889b ldrh r3, [r3, #4]
|
||
80039d6: f245 3210 movw r2, #21264 ; 0x5310
|
||
80039da: 4293 cmp r3, r2
|
||
80039dc: f040 80bb bne.w 8003b56 <LCD_Scan_Dir+0x222>
|
||
{
|
||
switch(dir)
|
||
80039e0: 79fb ldrb r3, [r7, #7]
|
||
80039e2: 2b07 cmp r3, #7
|
||
80039e4: d835 bhi.n 8003a52 <LCD_Scan_Dir+0x11e>
|
||
80039e6: a201 add r2, pc, #4 ; (adr r2, 80039ec <LCD_Scan_Dir+0xb8>)
|
||
80039e8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
80039ec: 08003a53 .word 0x08003a53
|
||
80039f0: 08003a0d .word 0x08003a0d
|
||
80039f4: 08003a17 .word 0x08003a17
|
||
80039f8: 08003a21 .word 0x08003a21
|
||
80039fc: 08003a2b .word 0x08003a2b
|
||
8003a00: 08003a35 .word 0x08003a35
|
||
8003a04: 08003a3f .word 0x08003a3f
|
||
8003a08: 08003a49 .word 0x08003a49
|
||
{
|
||
case L2R_U2D://��������,���ϵ���
|
||
regval|=(0<<7)|(0<<6)|(0<<5);
|
||
break;
|
||
case L2R_D2U://��������,���µ���
|
||
regval|=(1<<7)|(0<<6)|(0<<5);
|
||
8003a0c: 89fb ldrh r3, [r7, #14]
|
||
8003a0e: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
8003a12: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a14: e01d b.n 8003a52 <LCD_Scan_Dir+0x11e>
|
||
case R2L_U2D://���ҵ���,���ϵ���
|
||
regval|=(0<<7)|(1<<6)|(0<<5);
|
||
8003a16: 89fb ldrh r3, [r7, #14]
|
||
8003a18: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8003a1c: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a1e: e018 b.n 8003a52 <LCD_Scan_Dir+0x11e>
|
||
case R2L_D2U://���ҵ���,���µ���
|
||
regval|=(1<<7)|(1<<6)|(0<<5);
|
||
8003a20: 89fb ldrh r3, [r7, #14]
|
||
8003a22: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
||
8003a26: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a28: e013 b.n 8003a52 <LCD_Scan_Dir+0x11e>
|
||
case U2D_L2R://���ϵ���,��������
|
||
regval|=(0<<7)|(0<<6)|(1<<5);
|
||
8003a2a: 89fb ldrh r3, [r7, #14]
|
||
8003a2c: f043 0320 orr.w r3, r3, #32
|
||
8003a30: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a32: e00e b.n 8003a52 <LCD_Scan_Dir+0x11e>
|
||
case U2D_R2L://���ϵ���,���ҵ���
|
||
regval|=(0<<7)|(1<<6)|(1<<5);
|
||
8003a34: 89fb ldrh r3, [r7, #14]
|
||
8003a36: f043 0360 orr.w r3, r3, #96 ; 0x60
|
||
8003a3a: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a3c: e009 b.n 8003a52 <LCD_Scan_Dir+0x11e>
|
||
case D2U_L2R://���µ���,��������
|
||
regval|=(1<<7)|(0<<6)|(1<<5);
|
||
8003a3e: 89fb ldrh r3, [r7, #14]
|
||
8003a40: f043 03a0 orr.w r3, r3, #160 ; 0xa0
|
||
8003a44: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a46: e004 b.n 8003a52 <LCD_Scan_Dir+0x11e>
|
||
case D2U_R2L://���µ���,���ҵ���
|
||
regval|=(1<<7)|(1<<6)|(1<<5);
|
||
8003a48: 89fb ldrh r3, [r7, #14]
|
||
8003a4a: f043 03e0 orr.w r3, r3, #224 ; 0xe0
|
||
8003a4e: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a50: bf00 nop
|
||
}
|
||
dirreg=0X36;
|
||
8003a52: 2336 movs r3, #54 ; 0x36
|
||
8003a54: 737b strb r3, [r7, #13]
|
||
if(lcddev.id!=0X5310)regval|=0X08;//5310����ҪBGR
|
||
8003a56: 4b64 ldr r3, [pc, #400] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003a58: 889b ldrh r3, [r3, #4]
|
||
8003a5a: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003a5e: 4293 cmp r3, r2
|
||
8003a60: d003 beq.n 8003a6a <LCD_Scan_Dir+0x136>
|
||
8003a62: 89fb ldrh r3, [r7, #14]
|
||
8003a64: f043 0308 orr.w r3, r3, #8
|
||
8003a68: 81fb strh r3, [r7, #14]
|
||
if(lcddev.id==0X6804)regval|=0x02;//6804��BIT6��9341�ķ���
|
||
8003a6a: 4b5f ldr r3, [pc, #380] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003a6c: 889b ldrh r3, [r3, #4]
|
||
8003a6e: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003a72: 4293 cmp r3, r2
|
||
8003a74: d103 bne.n 8003a7e <LCD_Scan_Dir+0x14a>
|
||
8003a76: 89fb ldrh r3, [r7, #14]
|
||
8003a78: f043 0302 orr.w r3, r3, #2
|
||
8003a7c: 81fb strh r3, [r7, #14]
|
||
LCD_WriteReg(dirreg,regval);
|
||
8003a7e: 7b7b ldrb r3, [r7, #13]
|
||
8003a80: b29b uxth r3, r3
|
||
8003a82: 89fa ldrh r2, [r7, #14]
|
||
8003a84: 4611 mov r1, r2
|
||
8003a86: 4618 mov r0, r3
|
||
8003a88: f7ff ff2a bl 80038e0 <LCD_WriteReg>
|
||
if((regval&0X20)||lcddev.dir==1)
|
||
8003a8c: 89fb ldrh r3, [r7, #14]
|
||
8003a8e: f003 0320 and.w r3, r3, #32
|
||
8003a92: 2b00 cmp r3, #0
|
||
8003a94: d103 bne.n 8003a9e <LCD_Scan_Dir+0x16a>
|
||
8003a96: 4b54 ldr r3, [pc, #336] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003a98: 799b ldrb r3, [r3, #6]
|
||
8003a9a: 2b01 cmp r3, #1
|
||
8003a9c: d110 bne.n 8003ac0 <LCD_Scan_Dir+0x18c>
|
||
{
|
||
if(lcddev.width<lcddev.height)//����X,Y
|
||
8003a9e: 4b52 ldr r3, [pc, #328] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003aa0: 881a ldrh r2, [r3, #0]
|
||
8003aa2: 4b51 ldr r3, [pc, #324] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003aa4: 885b ldrh r3, [r3, #2]
|
||
8003aa6: 429a cmp r2, r3
|
||
8003aa8: d21a bcs.n 8003ae0 <LCD_Scan_Dir+0x1ac>
|
||
{
|
||
temp=lcddev.width;
|
||
8003aaa: 4b4f ldr r3, [pc, #316] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003aac: 881b ldrh r3, [r3, #0]
|
||
8003aae: 817b strh r3, [r7, #10]
|
||
lcddev.width=lcddev.height;
|
||
8003ab0: 4b4d ldr r3, [pc, #308] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003ab2: 885a ldrh r2, [r3, #2]
|
||
8003ab4: 4b4c ldr r3, [pc, #304] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003ab6: 801a strh r2, [r3, #0]
|
||
lcddev.height=temp;
|
||
8003ab8: 4a4b ldr r2, [pc, #300] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003aba: 897b ldrh r3, [r7, #10]
|
||
8003abc: 8053 strh r3, [r2, #2]
|
||
if(lcddev.width<lcddev.height)//����X,Y
|
||
8003abe: e00f b.n 8003ae0 <LCD_Scan_Dir+0x1ac>
|
||
}
|
||
}else
|
||
{
|
||
if(lcddev.width>lcddev.height)//����X,Y
|
||
8003ac0: 4b49 ldr r3, [pc, #292] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003ac2: 881a ldrh r2, [r3, #0]
|
||
8003ac4: 4b48 ldr r3, [pc, #288] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003ac6: 885b ldrh r3, [r3, #2]
|
||
8003ac8: 429a cmp r2, r3
|
||
8003aca: d909 bls.n 8003ae0 <LCD_Scan_Dir+0x1ac>
|
||
{
|
||
temp=lcddev.width;
|
||
8003acc: 4b46 ldr r3, [pc, #280] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003ace: 881b ldrh r3, [r3, #0]
|
||
8003ad0: 817b strh r3, [r7, #10]
|
||
lcddev.width=lcddev.height;
|
||
8003ad2: 4b45 ldr r3, [pc, #276] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003ad4: 885a ldrh r2, [r3, #2]
|
||
8003ad6: 4b44 ldr r3, [pc, #272] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003ad8: 801a strh r2, [r3, #0]
|
||
lcddev.height=temp;
|
||
8003ada: 4a43 ldr r2, [pc, #268] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003adc: 897b ldrh r3, [r7, #10]
|
||
8003ade: 8053 strh r3, [r2, #2]
|
||
}
|
||
}
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
8003ae0: 4b41 ldr r3, [pc, #260] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003ae2: 7a1b ldrb r3, [r3, #8]
|
||
8003ae4: b29b uxth r3, r3
|
||
8003ae6: 4618 mov r0, r3
|
||
8003ae8: f7ff fedc bl 80038a4 <LCD_WR_REG>
|
||
LCD_WR_DATA(0);LCD_WR_DATA(0);
|
||
8003aec: 2000 movs r0, #0
|
||
8003aee: f7ff fee7 bl 80038c0 <LCD_WR_DATA>
|
||
8003af2: 2000 movs r0, #0
|
||
8003af4: f7ff fee4 bl 80038c0 <LCD_WR_DATA>
|
||
LCD_WR_DATA((lcddev.width-1)>>8);LCD_WR_DATA((lcddev.width-1)&0XFF);
|
||
8003af8: 4b3b ldr r3, [pc, #236] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003afa: 881b ldrh r3, [r3, #0]
|
||
8003afc: 3b01 subs r3, #1
|
||
8003afe: 121b asrs r3, r3, #8
|
||
8003b00: b29b uxth r3, r3
|
||
8003b02: 4618 mov r0, r3
|
||
8003b04: f7ff fedc bl 80038c0 <LCD_WR_DATA>
|
||
8003b08: 4b37 ldr r3, [pc, #220] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003b0a: 881b ldrh r3, [r3, #0]
|
||
8003b0c: 3b01 subs r3, #1
|
||
8003b0e: b29b uxth r3, r3
|
||
8003b10: b2db uxtb r3, r3
|
||
8003b12: b29b uxth r3, r3
|
||
8003b14: 4618 mov r0, r3
|
||
8003b16: f7ff fed3 bl 80038c0 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8003b1a: 4b33 ldr r3, [pc, #204] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003b1c: 7a5b ldrb r3, [r3, #9]
|
||
8003b1e: b29b uxth r3, r3
|
||
8003b20: 4618 mov r0, r3
|
||
8003b22: f7ff febf bl 80038a4 <LCD_WR_REG>
|
||
LCD_WR_DATA(0);LCD_WR_DATA(0);
|
||
8003b26: 2000 movs r0, #0
|
||
8003b28: f7ff feca bl 80038c0 <LCD_WR_DATA>
|
||
8003b2c: 2000 movs r0, #0
|
||
8003b2e: f7ff fec7 bl 80038c0 <LCD_WR_DATA>
|
||
LCD_WR_DATA((lcddev.height-1)>>8);LCD_WR_DATA((lcddev.height-1)&0XFF);
|
||
8003b32: 4b2d ldr r3, [pc, #180] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003b34: 885b ldrh r3, [r3, #2]
|
||
8003b36: 3b01 subs r3, #1
|
||
8003b38: 121b asrs r3, r3, #8
|
||
8003b3a: b29b uxth r3, r3
|
||
8003b3c: 4618 mov r0, r3
|
||
8003b3e: f7ff febf bl 80038c0 <LCD_WR_DATA>
|
||
8003b42: 4b29 ldr r3, [pc, #164] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003b44: 885b ldrh r3, [r3, #2]
|
||
8003b46: 3b01 subs r3, #1
|
||
8003b48: b29b uxth r3, r3
|
||
8003b4a: b2db uxtb r3, r3
|
||
8003b4c: b29b uxth r3, r3
|
||
8003b4e: 4618 mov r0, r3
|
||
8003b50: f7ff feb6 bl 80038c0 <LCD_WR_DATA>
|
||
8003b54: e058 b.n 8003c08 <LCD_Scan_Dir+0x2d4>
|
||
}else
|
||
{
|
||
switch(dir)
|
||
8003b56: 79fb ldrb r3, [r7, #7]
|
||
8003b58: 2b07 cmp r3, #7
|
||
8003b5a: d836 bhi.n 8003bca <LCD_Scan_Dir+0x296>
|
||
8003b5c: a201 add r2, pc, #4 ; (adr r2, 8003b64 <LCD_Scan_Dir+0x230>)
|
||
8003b5e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
8003b62: bf00 nop
|
||
8003b64: 08003b85 .word 0x08003b85
|
||
8003b68: 08003b8f .word 0x08003b8f
|
||
8003b6c: 08003b99 .word 0x08003b99
|
||
8003b70: 08003bcb .word 0x08003bcb
|
||
8003b74: 08003ba3 .word 0x08003ba3
|
||
8003b78: 08003bad .word 0x08003bad
|
||
8003b7c: 08003bb7 .word 0x08003bb7
|
||
8003b80: 08003bc1 .word 0x08003bc1
|
||
{
|
||
case L2R_U2D://��������,���ϵ���
|
||
regval|=(1<<5)|(1<<4)|(0<<3);
|
||
8003b84: 89fb ldrh r3, [r7, #14]
|
||
8003b86: f043 0330 orr.w r3, r3, #48 ; 0x30
|
||
8003b8a: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003b8c: e01d b.n 8003bca <LCD_Scan_Dir+0x296>
|
||
case L2R_D2U://��������,���µ���
|
||
regval|=(0<<5)|(1<<4)|(0<<3);
|
||
8003b8e: 89fb ldrh r3, [r7, #14]
|
||
8003b90: f043 0310 orr.w r3, r3, #16
|
||
8003b94: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003b96: e018 b.n 8003bca <LCD_Scan_Dir+0x296>
|
||
case R2L_U2D://���ҵ���,���ϵ���
|
||
regval|=(1<<5)|(0<<4)|(0<<3);
|
||
8003b98: 89fb ldrh r3, [r7, #14]
|
||
8003b9a: f043 0320 orr.w r3, r3, #32
|
||
8003b9e: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003ba0: e013 b.n 8003bca <LCD_Scan_Dir+0x296>
|
||
case R2L_D2U://���ҵ���,���µ���
|
||
regval|=(0<<5)|(0<<4)|(0<<3);
|
||
break;
|
||
case U2D_L2R://���ϵ���,��������
|
||
regval|=(1<<5)|(1<<4)|(1<<3);
|
||
8003ba2: 89fb ldrh r3, [r7, #14]
|
||
8003ba4: f043 0338 orr.w r3, r3, #56 ; 0x38
|
||
8003ba8: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003baa: e00e b.n 8003bca <LCD_Scan_Dir+0x296>
|
||
case U2D_R2L://���ϵ���,���ҵ���
|
||
regval|=(1<<5)|(0<<4)|(1<<3);
|
||
8003bac: 89fb ldrh r3, [r7, #14]
|
||
8003bae: f043 0328 orr.w r3, r3, #40 ; 0x28
|
||
8003bb2: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003bb4: e009 b.n 8003bca <LCD_Scan_Dir+0x296>
|
||
case D2U_L2R://���µ���,��������
|
||
regval|=(0<<5)|(1<<4)|(1<<3);
|
||
8003bb6: 89fb ldrh r3, [r7, #14]
|
||
8003bb8: f043 0318 orr.w r3, r3, #24
|
||
8003bbc: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003bbe: e004 b.n 8003bca <LCD_Scan_Dir+0x296>
|
||
case D2U_R2L://���µ���,���ҵ���
|
||
regval|=(0<<5)|(0<<4)|(1<<3);
|
||
8003bc0: 89fb ldrh r3, [r7, #14]
|
||
8003bc2: f043 0308 orr.w r3, r3, #8
|
||
8003bc6: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003bc8: bf00 nop
|
||
}
|
||
if(lcddev.id==0x8989)//8989 IC
|
||
8003bca: 4b07 ldr r3, [pc, #28] ; (8003be8 <LCD_Scan_Dir+0x2b4>)
|
||
8003bcc: 889b ldrh r3, [r3, #4]
|
||
8003bce: f648 1289 movw r2, #35209 ; 0x8989
|
||
8003bd2: 4293 cmp r3, r2
|
||
8003bd4: d10a bne.n 8003bec <LCD_Scan_Dir+0x2b8>
|
||
{
|
||
dirreg=0X11;
|
||
8003bd6: 2311 movs r3, #17
|
||
8003bd8: 737b strb r3, [r7, #13]
|
||
regval|=0X6040; //65K
|
||
8003bda: 89fb ldrh r3, [r7, #14]
|
||
8003bdc: f443 43c0 orr.w r3, r3, #24576 ; 0x6000
|
||
8003be0: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8003be4: 81fb strh r3, [r7, #14]
|
||
8003be6: e007 b.n 8003bf8 <LCD_Scan_Dir+0x2c4>
|
||
8003be8: 200002a8 .word 0x200002a8
|
||
}else//��������IC
|
||
{
|
||
dirreg=0X03;
|
||
8003bec: 2303 movs r3, #3
|
||
8003bee: 737b strb r3, [r7, #13]
|
||
regval|=1<<12;
|
||
8003bf0: 89fb ldrh r3, [r7, #14]
|
||
8003bf2: f443 5380 orr.w r3, r3, #4096 ; 0x1000
|
||
8003bf6: 81fb strh r3, [r7, #14]
|
||
}
|
||
LCD_WriteReg(dirreg,regval);
|
||
8003bf8: 7b7b ldrb r3, [r7, #13]
|
||
8003bfa: b29b uxth r3, r3
|
||
8003bfc: 89fa ldrh r2, [r7, #14]
|
||
8003bfe: 4611 mov r1, r2
|
||
8003c00: 4618 mov r0, r3
|
||
8003c02: f7ff fe6d bl 80038e0 <LCD_WriteReg>
|
||
}
|
||
}
|
||
8003c06: bf00 nop
|
||
8003c08: bf00 nop
|
||
8003c0a: 3710 adds r7, #16
|
||
8003c0c: 46bd mov sp, r7
|
||
8003c0e: bd80 pop {r7, pc}
|
||
|
||
08003c10 <LCD_Display_Dir>:
|
||
//����LCD��ʾ����
|
||
//dir:0,������1,����
|
||
void LCD_Display_Dir(uint8_t dir)
|
||
{
|
||
8003c10: b580 push {r7, lr}
|
||
8003c12: b082 sub sp, #8
|
||
8003c14: af00 add r7, sp, #0
|
||
8003c16: 4603 mov r3, r0
|
||
8003c18: 71fb strb r3, [r7, #7]
|
||
if(dir==0) //����
|
||
8003c1a: 79fb ldrb r3, [r7, #7]
|
||
8003c1c: 2b00 cmp r3, #0
|
||
8003c1e: d154 bne.n 8003cca <LCD_Display_Dir+0xba>
|
||
{
|
||
lcddev.dir=0; //����
|
||
8003c20: 4b5d ldr r3, [pc, #372] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003c22: 2200 movs r2, #0
|
||
8003c24: 719a strb r2, [r3, #6]
|
||
lcddev.width=240;
|
||
8003c26: 4b5c ldr r3, [pc, #368] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003c28: 22f0 movs r2, #240 ; 0xf0
|
||
8003c2a: 801a strh r2, [r3, #0]
|
||
lcddev.height=320;
|
||
8003c2c: 4b5a ldr r3, [pc, #360] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003c2e: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8003c32: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X9341||lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003c34: 4b58 ldr r3, [pc, #352] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003c36: 889b ldrh r3, [r3, #4]
|
||
8003c38: f249 3241 movw r2, #37697 ; 0x9341
|
||
8003c3c: 4293 cmp r3, r2
|
||
8003c3e: d00b beq.n 8003c58 <LCD_Display_Dir+0x48>
|
||
8003c40: 4b55 ldr r3, [pc, #340] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003c42: 889b ldrh r3, [r3, #4]
|
||
8003c44: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003c48: 4293 cmp r3, r2
|
||
8003c4a: d005 beq.n 8003c58 <LCD_Display_Dir+0x48>
|
||
8003c4c: 4b52 ldr r3, [pc, #328] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003c4e: 889b ldrh r3, [r3, #4]
|
||
8003c50: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003c54: 4293 cmp r3, r2
|
||
8003c56: d11e bne.n 8003c96 <LCD_Display_Dir+0x86>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
8003c58: 4b4f ldr r3, [pc, #316] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003c5a: 222c movs r2, #44 ; 0x2c
|
||
8003c5c: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2A;
|
||
8003c5e: 4b4e ldr r3, [pc, #312] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003c60: 222a movs r2, #42 ; 0x2a
|
||
8003c62: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
8003c64: 4b4c ldr r3, [pc, #304] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003c66: 222b movs r2, #43 ; 0x2b
|
||
8003c68: 725a strb r2, [r3, #9]
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003c6a: 4b4b ldr r3, [pc, #300] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003c6c: 889b ldrh r3, [r3, #4]
|
||
8003c6e: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003c72: 4293 cmp r3, r2
|
||
8003c74: d006 beq.n 8003c84 <LCD_Display_Dir+0x74>
|
||
8003c76: 4b48 ldr r3, [pc, #288] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003c78: 889b ldrh r3, [r3, #4]
|
||
8003c7a: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003c7e: 4293 cmp r3, r2
|
||
8003c80: f040 8081 bne.w 8003d86 <LCD_Display_Dir+0x176>
|
||
{
|
||
lcddev.width=320;
|
||
8003c84: 4b44 ldr r3, [pc, #272] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003c86: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8003c8a: 801a strh r2, [r3, #0]
|
||
lcddev.height=480;
|
||
8003c8c: 4b42 ldr r3, [pc, #264] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003c8e: f44f 72f0 mov.w r2, #480 ; 0x1e0
|
||
8003c92: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003c94: e077 b.n 8003d86 <LCD_Display_Dir+0x176>
|
||
}
|
||
}else if(lcddev.id==0X8989)
|
||
8003c96: 4b40 ldr r3, [pc, #256] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003c98: 889b ldrh r3, [r3, #4]
|
||
8003c9a: f648 1289 movw r2, #35209 ; 0x8989
|
||
8003c9e: 4293 cmp r3, r2
|
||
8003ca0: d109 bne.n 8003cb6 <LCD_Display_Dir+0xa6>
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8003ca2: 4b3d ldr r3, [pc, #244] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003ca4: 2222 movs r2, #34 ; 0x22
|
||
8003ca6: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X4E;
|
||
8003ca8: 4b3b ldr r3, [pc, #236] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003caa: 224e movs r2, #78 ; 0x4e
|
||
8003cac: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X4F;
|
||
8003cae: 4b3a ldr r3, [pc, #232] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003cb0: 224f movs r2, #79 ; 0x4f
|
||
8003cb2: 725a strb r2, [r3, #9]
|
||
8003cb4: e068 b.n 8003d88 <LCD_Display_Dir+0x178>
|
||
}else
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8003cb6: 4b38 ldr r3, [pc, #224] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003cb8: 2222 movs r2, #34 ; 0x22
|
||
8003cba: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=R32;
|
||
8003cbc: 4b36 ldr r3, [pc, #216] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003cbe: 2220 movs r2, #32
|
||
8003cc0: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=R33;
|
||
8003cc2: 4b35 ldr r3, [pc, #212] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003cc4: 2221 movs r2, #33 ; 0x21
|
||
8003cc6: 725a strb r2, [r3, #9]
|
||
8003cc8: e05e b.n 8003d88 <LCD_Display_Dir+0x178>
|
||
}
|
||
}else //����
|
||
{
|
||
lcddev.dir=1; //����
|
||
8003cca: 4b33 ldr r3, [pc, #204] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003ccc: 2201 movs r2, #1
|
||
8003cce: 719a strb r2, [r3, #6]
|
||
lcddev.width=320;
|
||
8003cd0: 4b31 ldr r3, [pc, #196] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003cd2: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8003cd6: 801a strh r2, [r3, #0]
|
||
lcddev.height=240;
|
||
8003cd8: 4b2f ldr r3, [pc, #188] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003cda: 22f0 movs r2, #240 ; 0xf0
|
||
8003cdc: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X9341||lcddev.id==0X5310)
|
||
8003cde: 4b2e ldr r3, [pc, #184] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003ce0: 889b ldrh r3, [r3, #4]
|
||
8003ce2: f249 3241 movw r2, #37697 ; 0x9341
|
||
8003ce6: 4293 cmp r3, r2
|
||
8003ce8: d005 beq.n 8003cf6 <LCD_Display_Dir+0xe6>
|
||
8003cea: 4b2b ldr r3, [pc, #172] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003cec: 889b ldrh r3, [r3, #4]
|
||
8003cee: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003cf2: 4293 cmp r3, r2
|
||
8003cf4: d109 bne.n 8003d0a <LCD_Display_Dir+0xfa>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
8003cf6: 4b28 ldr r3, [pc, #160] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003cf8: 222c movs r2, #44 ; 0x2c
|
||
8003cfa: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2A;
|
||
8003cfc: 4b26 ldr r3, [pc, #152] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003cfe: 222a movs r2, #42 ; 0x2a
|
||
8003d00: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
8003d02: 4b25 ldr r3, [pc, #148] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d04: 222b movs r2, #43 ; 0x2b
|
||
8003d06: 725a strb r2, [r3, #9]
|
||
8003d08: e028 b.n 8003d5c <LCD_Display_Dir+0x14c>
|
||
}else if(lcddev.id==0X6804)
|
||
8003d0a: 4b23 ldr r3, [pc, #140] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d0c: 889b ldrh r3, [r3, #4]
|
||
8003d0e: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003d12: 4293 cmp r3, r2
|
||
8003d14: d109 bne.n 8003d2a <LCD_Display_Dir+0x11a>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
8003d16: 4b20 ldr r3, [pc, #128] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d18: 222c movs r2, #44 ; 0x2c
|
||
8003d1a: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2B;
|
||
8003d1c: 4b1e ldr r3, [pc, #120] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d1e: 222b movs r2, #43 ; 0x2b
|
||
8003d20: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2A;
|
||
8003d22: 4b1d ldr r3, [pc, #116] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d24: 222a movs r2, #42 ; 0x2a
|
||
8003d26: 725a strb r2, [r3, #9]
|
||
8003d28: e018 b.n 8003d5c <LCD_Display_Dir+0x14c>
|
||
}else if(lcddev.id==0X8989)
|
||
8003d2a: 4b1b ldr r3, [pc, #108] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d2c: 889b ldrh r3, [r3, #4]
|
||
8003d2e: f648 1289 movw r2, #35209 ; 0x8989
|
||
8003d32: 4293 cmp r3, r2
|
||
8003d34: d109 bne.n 8003d4a <LCD_Display_Dir+0x13a>
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8003d36: 4b18 ldr r3, [pc, #96] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d38: 2222 movs r2, #34 ; 0x22
|
||
8003d3a: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X4F;
|
||
8003d3c: 4b16 ldr r3, [pc, #88] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d3e: 224f movs r2, #79 ; 0x4f
|
||
8003d40: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X4E;
|
||
8003d42: 4b15 ldr r3, [pc, #84] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d44: 224e movs r2, #78 ; 0x4e
|
||
8003d46: 725a strb r2, [r3, #9]
|
||
8003d48: e008 b.n 8003d5c <LCD_Display_Dir+0x14c>
|
||
}else
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8003d4a: 4b13 ldr r3, [pc, #76] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d4c: 2222 movs r2, #34 ; 0x22
|
||
8003d4e: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=R33;
|
||
8003d50: 4b11 ldr r3, [pc, #68] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d52: 2221 movs r2, #33 ; 0x21
|
||
8003d54: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=R32;
|
||
8003d56: 4b10 ldr r3, [pc, #64] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d58: 2220 movs r2, #32
|
||
8003d5a: 725a strb r2, [r3, #9]
|
||
}
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003d5c: 4b0e ldr r3, [pc, #56] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d5e: 889b ldrh r3, [r3, #4]
|
||
8003d60: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003d64: 4293 cmp r3, r2
|
||
8003d66: d005 beq.n 8003d74 <LCD_Display_Dir+0x164>
|
||
8003d68: 4b0b ldr r3, [pc, #44] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d6a: 889b ldrh r3, [r3, #4]
|
||
8003d6c: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003d70: 4293 cmp r3, r2
|
||
8003d72: d109 bne.n 8003d88 <LCD_Display_Dir+0x178>
|
||
{
|
||
lcddev.width=480;
|
||
8003d74: 4b08 ldr r3, [pc, #32] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d76: f44f 72f0 mov.w r2, #480 ; 0x1e0
|
||
8003d7a: 801a strh r2, [r3, #0]
|
||
lcddev.height=320;
|
||
8003d7c: 4b06 ldr r3, [pc, #24] ; (8003d98 <LCD_Display_Dir+0x188>)
|
||
8003d7e: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8003d82: 805a strh r2, [r3, #2]
|
||
8003d84: e000 b.n 8003d88 <LCD_Display_Dir+0x178>
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003d86: bf00 nop
|
||
}
|
||
}
|
||
LCD_Scan_Dir(DFT_SCAN_DIR); //Ĭ��ɨ�跽��
|
||
8003d88: 2000 movs r0, #0
|
||
8003d8a: f7ff fdd3 bl 8003934 <LCD_Scan_Dir>
|
||
}
|
||
8003d8e: bf00 nop
|
||
8003d90: 3708 adds r7, #8
|
||
8003d92: 46bd mov sp, r7
|
||
8003d94: bd80 pop {r7, pc}
|
||
8003d96: bf00 nop
|
||
8003d98: 200002a8 .word 0x200002a8
|
||
|
||
08003d9c <LCDx_Init>:
|
||
|
||
//��ʼ��lcd
|
||
//�ó�ʼ���������Գ�ʼ������Һ��!
|
||
void LCDx_Init(void)
|
||
{
|
||
8003d9c: b580 push {r7, lr}
|
||
8003d9e: af00 add r7, sp, #0
|
||
|
||
|
||
HAL_Delay(50); // delay 50 ms
|
||
8003da0: 2032 movs r0, #50 ; 0x32
|
||
8003da2: f7fd fd89 bl 80018b8 <HAL_Delay>
|
||
LCD_WriteReg(0x0000,0x0001);
|
||
8003da6: 2101 movs r1, #1
|
||
8003da8: 2000 movs r0, #0
|
||
8003daa: f7ff fd99 bl 80038e0 <LCD_WriteReg>
|
||
HAL_Delay(50); // delay 50 ms
|
||
8003dae: 2032 movs r0, #50 ; 0x32
|
||
8003db0: f7fd fd82 bl 80018b8 <HAL_Delay>
|
||
lcddev.id = LCD_ReadReg(0x0000);
|
||
8003db4: 2000 movs r0, #0
|
||
8003db6: f7ff fda9 bl 800390c <LCD_ReadReg>
|
||
8003dba: 4603 mov r3, r0
|
||
8003dbc: 461a mov r2, r3
|
||
8003dbe: 4b70 ldr r3, [pc, #448] ; (8003f80 <LCDx_Init+0x1e4>)
|
||
8003dc0: 809a strh r2, [r3, #4]
|
||
|
||
|
||
LCD_WriteReg(0x00E5,0x78F0);
|
||
8003dc2: f647 01f0 movw r1, #30960 ; 0x78f0
|
||
8003dc6: 20e5 movs r0, #229 ; 0xe5
|
||
8003dc8: f7ff fd8a bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0001,0x0100);
|
||
8003dcc: f44f 7180 mov.w r1, #256 ; 0x100
|
||
8003dd0: 2001 movs r0, #1
|
||
8003dd2: f7ff fd85 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0002,0x0700);
|
||
8003dd6: f44f 61e0 mov.w r1, #1792 ; 0x700
|
||
8003dda: 2002 movs r0, #2
|
||
8003ddc: f7ff fd80 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0003,0x1030);
|
||
8003de0: f241 0130 movw r1, #4144 ; 0x1030
|
||
8003de4: 2003 movs r0, #3
|
||
8003de6: f7ff fd7b bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0004,0x0000);
|
||
8003dea: 2100 movs r1, #0
|
||
8003dec: 2004 movs r0, #4
|
||
8003dee: f7ff fd77 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0008,0x0202);
|
||
8003df2: f240 2102 movw r1, #514 ; 0x202
|
||
8003df6: 2008 movs r0, #8
|
||
8003df8: f7ff fd72 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0009,0x0000);
|
||
8003dfc: 2100 movs r1, #0
|
||
8003dfe: 2009 movs r0, #9
|
||
8003e00: f7ff fd6e bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000A,0x0000);
|
||
8003e04: 2100 movs r1, #0
|
||
8003e06: 200a movs r0, #10
|
||
8003e08: f7ff fd6a bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000C,0x0000);
|
||
8003e0c: 2100 movs r1, #0
|
||
8003e0e: 200c movs r0, #12
|
||
8003e10: f7ff fd66 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000D,0x0000);
|
||
8003e14: 2100 movs r1, #0
|
||
8003e16: 200d movs r0, #13
|
||
8003e18: f7ff fd62 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000F,0x0000);
|
||
8003e1c: 2100 movs r1, #0
|
||
8003e1e: 200f movs r0, #15
|
||
8003e20: f7ff fd5e bl 80038e0 <LCD_WriteReg>
|
||
//power on sequence VGHVGL
|
||
LCD_WriteReg(0x0010,0x0000);
|
||
8003e24: 2100 movs r1, #0
|
||
8003e26: 2010 movs r0, #16
|
||
8003e28: f7ff fd5a bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0011,0x0007);
|
||
8003e2c: 2107 movs r1, #7
|
||
8003e2e: 2011 movs r0, #17
|
||
8003e30: f7ff fd56 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0012,0x0000);
|
||
8003e34: 2100 movs r1, #0
|
||
8003e36: 2012 movs r0, #18
|
||
8003e38: f7ff fd52 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0013,0x0000);
|
||
8003e3c: 2100 movs r1, #0
|
||
8003e3e: 2013 movs r0, #19
|
||
8003e40: f7ff fd4e bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0007,0x0000);
|
||
8003e44: 2100 movs r1, #0
|
||
8003e46: 2007 movs r0, #7
|
||
8003e48: f7ff fd4a bl 80038e0 <LCD_WriteReg>
|
||
//vgh
|
||
LCD_WriteReg(0x0010,0x1690);
|
||
8003e4c: f241 6190 movw r1, #5776 ; 0x1690
|
||
8003e50: 2010 movs r0, #16
|
||
8003e52: f7ff fd45 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0011,0x0227);
|
||
8003e56: f240 2127 movw r1, #551 ; 0x227
|
||
8003e5a: 2011 movs r0, #17
|
||
8003e5c: f7ff fd40 bl 80038e0 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vregiout
|
||
LCD_WriteReg(0x0012,0x009D); //0x001b
|
||
8003e60: 219d movs r1, #157 ; 0x9d
|
||
8003e62: 2012 movs r0, #18
|
||
8003e64: f7ff fd3c bl 80038e0 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vom amplitude
|
||
LCD_WriteReg(0x0013,0x1900);
|
||
8003e68: f44f 51c8 mov.w r1, #6400 ; 0x1900
|
||
8003e6c: 2013 movs r0, #19
|
||
8003e6e: f7ff fd37 bl 80038e0 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vom H
|
||
LCD_WriteReg(0x0029,0x0025);
|
||
8003e72: 2125 movs r1, #37 ; 0x25
|
||
8003e74: 2029 movs r0, #41 ; 0x29
|
||
8003e76: f7ff fd33 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x002B,0x000D);
|
||
8003e7a: 210d movs r1, #13
|
||
8003e7c: 202b movs r0, #43 ; 0x2b
|
||
8003e7e: f7ff fd2f bl 80038e0 <LCD_WriteReg>
|
||
//gamma
|
||
LCD_WriteReg(0x0030,0x0007);
|
||
8003e82: 2107 movs r1, #7
|
||
8003e84: 2030 movs r0, #48 ; 0x30
|
||
8003e86: f7ff fd2b bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0031,0x0303);
|
||
8003e8a: f240 3103 movw r1, #771 ; 0x303
|
||
8003e8e: 2031 movs r0, #49 ; 0x31
|
||
8003e90: f7ff fd26 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0032,0x0003);// 0006
|
||
8003e94: 2103 movs r1, #3
|
||
8003e96: 2032 movs r0, #50 ; 0x32
|
||
8003e98: f7ff fd22 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0035,0x0206);
|
||
8003e9c: f240 2106 movw r1, #518 ; 0x206
|
||
8003ea0: 2035 movs r0, #53 ; 0x35
|
||
8003ea2: f7ff fd1d bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0036,0x0008);
|
||
8003ea6: 2108 movs r1, #8
|
||
8003ea8: 2036 movs r0, #54 ; 0x36
|
||
8003eaa: f7ff fd19 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0037,0x0406);
|
||
8003eae: f240 4106 movw r1, #1030 ; 0x406
|
||
8003eb2: 2037 movs r0, #55 ; 0x37
|
||
8003eb4: f7ff fd14 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0038,0x0304);//0200
|
||
8003eb8: f44f 7141 mov.w r1, #772 ; 0x304
|
||
8003ebc: 2038 movs r0, #56 ; 0x38
|
||
8003ebe: f7ff fd0f bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0039,0x0007);
|
||
8003ec2: 2107 movs r1, #7
|
||
8003ec4: 2039 movs r0, #57 ; 0x39
|
||
8003ec6: f7ff fd0b bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x003C,0x0602);// 0504
|
||
8003eca: f240 6102 movw r1, #1538 ; 0x602
|
||
8003ece: 203c movs r0, #60 ; 0x3c
|
||
8003ed0: f7ff fd06 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x003D,0x0008);
|
||
8003ed4: 2108 movs r1, #8
|
||
8003ed6: 203d movs r0, #61 ; 0x3d
|
||
8003ed8: f7ff fd02 bl 80038e0 <LCD_WriteReg>
|
||
//ram
|
||
LCD_WriteReg(0x0050,0x0000);
|
||
8003edc: 2100 movs r1, #0
|
||
8003ede: 2050 movs r0, #80 ; 0x50
|
||
8003ee0: f7ff fcfe bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0051,0x00EF);
|
||
8003ee4: 21ef movs r1, #239 ; 0xef
|
||
8003ee6: 2051 movs r0, #81 ; 0x51
|
||
8003ee8: f7ff fcfa bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0052,0x0000);
|
||
8003eec: 2100 movs r1, #0
|
||
8003eee: 2052 movs r0, #82 ; 0x52
|
||
8003ef0: f7ff fcf6 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0053,0x013F);
|
||
8003ef4: f240 113f movw r1, #319 ; 0x13f
|
||
8003ef8: 2053 movs r0, #83 ; 0x53
|
||
8003efa: f7ff fcf1 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0060,0xA700);
|
||
8003efe: f44f 4127 mov.w r1, #42752 ; 0xa700
|
||
8003f02: 2060 movs r0, #96 ; 0x60
|
||
8003f04: f7ff fcec bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0061,0x0001);
|
||
8003f08: 2101 movs r1, #1
|
||
8003f0a: 2061 movs r0, #97 ; 0x61
|
||
8003f0c: f7ff fce8 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x006A,0x0000);
|
||
8003f10: 2100 movs r1, #0
|
||
8003f12: 206a movs r0, #106 ; 0x6a
|
||
8003f14: f7ff fce4 bl 80038e0 <LCD_WriteReg>
|
||
//
|
||
LCD_WriteReg(0x0080,0x0000);
|
||
8003f18: 2100 movs r1, #0
|
||
8003f1a: 2080 movs r0, #128 ; 0x80
|
||
8003f1c: f7ff fce0 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0081,0x0000);
|
||
8003f20: 2100 movs r1, #0
|
||
8003f22: 2081 movs r0, #129 ; 0x81
|
||
8003f24: f7ff fcdc bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0082,0x0000);
|
||
8003f28: 2100 movs r1, #0
|
||
8003f2a: 2082 movs r0, #130 ; 0x82
|
||
8003f2c: f7ff fcd8 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0083,0x0000);
|
||
8003f30: 2100 movs r1, #0
|
||
8003f32: 2083 movs r0, #131 ; 0x83
|
||
8003f34: f7ff fcd4 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0084,0x0000);
|
||
8003f38: 2100 movs r1, #0
|
||
8003f3a: 2084 movs r0, #132 ; 0x84
|
||
8003f3c: f7ff fcd0 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0085,0x0000);
|
||
8003f40: 2100 movs r1, #0
|
||
8003f42: 2085 movs r0, #133 ; 0x85
|
||
8003f44: f7ff fccc bl 80038e0 <LCD_WriteReg>
|
||
//
|
||
LCD_WriteReg(0x0090,0x0010);
|
||
8003f48: 2110 movs r1, #16
|
||
8003f4a: 2090 movs r0, #144 ; 0x90
|
||
8003f4c: f7ff fcc8 bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0092,0x0600);
|
||
8003f50: f44f 61c0 mov.w r1, #1536 ; 0x600
|
||
8003f54: 2092 movs r0, #146 ; 0x92
|
||
8003f56: f7ff fcc3 bl 80038e0 <LCD_WriteReg>
|
||
|
||
LCD_WriteReg(0x0007,0x0133);
|
||
8003f5a: f240 1133 movw r1, #307 ; 0x133
|
||
8003f5e: 2007 movs r0, #7
|
||
8003f60: f7ff fcbe bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(0x00,0x0022);//
|
||
8003f64: 2122 movs r1, #34 ; 0x22
|
||
8003f66: 2000 movs r0, #0
|
||
8003f68: f7ff fcba bl 80038e0 <LCD_WriteReg>
|
||
|
||
|
||
LCD_Display_Dir(1); //Ĭ��Ϊh��
|
||
8003f6c: 2001 movs r0, #1
|
||
8003f6e: f7ff fe4f bl 8003c10 <LCD_Display_Dir>
|
||
|
||
LCD_BL(0);
|
||
8003f72: 2200 movs r2, #0
|
||
8003f74: 2101 movs r1, #1
|
||
8003f76: 4803 ldr r0, [pc, #12] ; (8003f84 <LCDx_Init+0x1e8>)
|
||
8003f78: f7fd ff51 bl 8001e1e <HAL_GPIO_WritePin>
|
||
|
||
}
|
||
8003f7c: bf00 nop
|
||
8003f7e: bd80 pop {r7, pc}
|
||
8003f80: 200002a8 .word 0x200002a8
|
||
8003f84: 40010c00 .word 0x40010c00
|
||
|
||
08003f88 <LCD_SetCursor>:
|
||
//***********************************************************���� ���� ʲô��
|
||
//���ù���λ��
|
||
//Xpos:������
|
||
//Ypos:������
|
||
void LCD_SetCursor(uint16_t Xpos, uint16_t Ypos)
|
||
{
|
||
8003f88: b580 push {r7, lr}
|
||
8003f8a: b082 sub sp, #8
|
||
8003f8c: af00 add r7, sp, #0
|
||
8003f8e: 4603 mov r3, r0
|
||
8003f90: 460a mov r2, r1
|
||
8003f92: 80fb strh r3, [r7, #6]
|
||
8003f94: 4613 mov r3, r2
|
||
8003f96: 80bb strh r3, [r7, #4]
|
||
if(lcddev.id==0X9341||lcddev.id==0X5310)
|
||
8003f98: 4b42 ldr r3, [pc, #264] ; (80040a4 <LCD_SetCursor+0x11c>)
|
||
8003f9a: 889b ldrh r3, [r3, #4]
|
||
8003f9c: f249 3241 movw r2, #37697 ; 0x9341
|
||
8003fa0: 4293 cmp r3, r2
|
||
8003fa2: d005 beq.n 8003fb0 <LCD_SetCursor+0x28>
|
||
8003fa4: 4b3f ldr r3, [pc, #252] ; (80040a4 <LCD_SetCursor+0x11c>)
|
||
8003fa6: 889b ldrh r3, [r3, #4]
|
||
8003fa8: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003fac: 4293 cmp r3, r2
|
||
8003fae: d124 bne.n 8003ffa <LCD_SetCursor+0x72>
|
||
{
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
8003fb0: 4b3c ldr r3, [pc, #240] ; (80040a4 <LCD_SetCursor+0x11c>)
|
||
8003fb2: 7a1b ldrb r3, [r3, #8]
|
||
8003fb4: b29b uxth r3, r3
|
||
8003fb6: 4618 mov r0, r3
|
||
8003fb8: f7ff fc74 bl 80038a4 <LCD_WR_REG>
|
||
LCD_WR_DATA(Xpos>>8);
|
||
8003fbc: 88fb ldrh r3, [r7, #6]
|
||
8003fbe: 0a1b lsrs r3, r3, #8
|
||
8003fc0: b29b uxth r3, r3
|
||
8003fc2: 4618 mov r0, r3
|
||
8003fc4: f7ff fc7c bl 80038c0 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Xpos&0XFF);
|
||
8003fc8: 88fb ldrh r3, [r7, #6]
|
||
8003fca: b2db uxtb r3, r3
|
||
8003fcc: b29b uxth r3, r3
|
||
8003fce: 4618 mov r0, r3
|
||
8003fd0: f7ff fc76 bl 80038c0 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8003fd4: 4b33 ldr r3, [pc, #204] ; (80040a4 <LCD_SetCursor+0x11c>)
|
||
8003fd6: 7a5b ldrb r3, [r3, #9]
|
||
8003fd8: b29b uxth r3, r3
|
||
8003fda: 4618 mov r0, r3
|
||
8003fdc: f7ff fc62 bl 80038a4 <LCD_WR_REG>
|
||
LCD_WR_DATA(Ypos>>8);
|
||
8003fe0: 88bb ldrh r3, [r7, #4]
|
||
8003fe2: 0a1b lsrs r3, r3, #8
|
||
8003fe4: b29b uxth r3, r3
|
||
8003fe6: 4618 mov r0, r3
|
||
8003fe8: f7ff fc6a bl 80038c0 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Ypos&0XFF);
|
||
8003fec: 88bb ldrh r3, [r7, #4]
|
||
8003fee: b2db uxtb r3, r3
|
||
8003ff0: b29b uxth r3, r3
|
||
8003ff2: 4618 mov r0, r3
|
||
8003ff4: f7ff fc64 bl 80038c0 <LCD_WR_DATA>
|
||
{
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//������ʵ���ǵ�תx,y����
|
||
LCD_WriteReg(lcddev.setxcmd, Xpos);
|
||
LCD_WriteReg(lcddev.setycmd, Ypos);
|
||
}
|
||
}
|
||
8003ff8: e050 b.n 800409c <LCD_SetCursor+0x114>
|
||
}else if(lcddev.id==0X6804)
|
||
8003ffa: 4b2a ldr r3, [pc, #168] ; (80040a4 <LCD_SetCursor+0x11c>)
|
||
8003ffc: 889b ldrh r3, [r3, #4]
|
||
8003ffe: f646 0204 movw r2, #26628 ; 0x6804
|
||
8004002: 4293 cmp r3, r2
|
||
8004004: d12f bne.n 8004066 <LCD_SetCursor+0xde>
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//����ʱ����
|
||
8004006: 4b27 ldr r3, [pc, #156] ; (80040a4 <LCD_SetCursor+0x11c>)
|
||
8004008: 799b ldrb r3, [r3, #6]
|
||
800400a: 2b01 cmp r3, #1
|
||
800400c: d106 bne.n 800401c <LCD_SetCursor+0x94>
|
||
800400e: 4b25 ldr r3, [pc, #148] ; (80040a4 <LCD_SetCursor+0x11c>)
|
||
8004010: 881a ldrh r2, [r3, #0]
|
||
8004012: 88fb ldrh r3, [r7, #6]
|
||
8004014: 1ad3 subs r3, r2, r3
|
||
8004016: b29b uxth r3, r3
|
||
8004018: 3b01 subs r3, #1
|
||
800401a: 80fb strh r3, [r7, #6]
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
800401c: 4b21 ldr r3, [pc, #132] ; (80040a4 <LCD_SetCursor+0x11c>)
|
||
800401e: 7a1b ldrb r3, [r3, #8]
|
||
8004020: b29b uxth r3, r3
|
||
8004022: 4618 mov r0, r3
|
||
8004024: f7ff fc3e bl 80038a4 <LCD_WR_REG>
|
||
LCD_WR_DATA(Xpos>>8);
|
||
8004028: 88fb ldrh r3, [r7, #6]
|
||
800402a: 0a1b lsrs r3, r3, #8
|
||
800402c: b29b uxth r3, r3
|
||
800402e: 4618 mov r0, r3
|
||
8004030: f7ff fc46 bl 80038c0 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Xpos&0XFF);
|
||
8004034: 88fb ldrh r3, [r7, #6]
|
||
8004036: b2db uxtb r3, r3
|
||
8004038: b29b uxth r3, r3
|
||
800403a: 4618 mov r0, r3
|
||
800403c: f7ff fc40 bl 80038c0 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8004040: 4b18 ldr r3, [pc, #96] ; (80040a4 <LCD_SetCursor+0x11c>)
|
||
8004042: 7a5b ldrb r3, [r3, #9]
|
||
8004044: b29b uxth r3, r3
|
||
8004046: 4618 mov r0, r3
|
||
8004048: f7ff fc2c bl 80038a4 <LCD_WR_REG>
|
||
LCD_WR_DATA(Ypos>>8);
|
||
800404c: 88bb ldrh r3, [r7, #4]
|
||
800404e: 0a1b lsrs r3, r3, #8
|
||
8004050: b29b uxth r3, r3
|
||
8004052: 4618 mov r0, r3
|
||
8004054: f7ff fc34 bl 80038c0 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Ypos&0XFF);
|
||
8004058: 88bb ldrh r3, [r7, #4]
|
||
800405a: b2db uxtb r3, r3
|
||
800405c: b29b uxth r3, r3
|
||
800405e: 4618 mov r0, r3
|
||
8004060: f7ff fc2e bl 80038c0 <LCD_WR_DATA>
|
||
}
|
||
8004064: e01a b.n 800409c <LCD_SetCursor+0x114>
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//������ʵ���ǵ�תx,y����
|
||
8004066: 4b0f ldr r3, [pc, #60] ; (80040a4 <LCD_SetCursor+0x11c>)
|
||
8004068: 799b ldrb r3, [r3, #6]
|
||
800406a: 2b01 cmp r3, #1
|
||
800406c: d106 bne.n 800407c <LCD_SetCursor+0xf4>
|
||
800406e: 4b0d ldr r3, [pc, #52] ; (80040a4 <LCD_SetCursor+0x11c>)
|
||
8004070: 881a ldrh r2, [r3, #0]
|
||
8004072: 88fb ldrh r3, [r7, #6]
|
||
8004074: 1ad3 subs r3, r2, r3
|
||
8004076: b29b uxth r3, r3
|
||
8004078: 3b01 subs r3, #1
|
||
800407a: 80fb strh r3, [r7, #6]
|
||
LCD_WriteReg(lcddev.setxcmd, Xpos);
|
||
800407c: 4b09 ldr r3, [pc, #36] ; (80040a4 <LCD_SetCursor+0x11c>)
|
||
800407e: 7a1b ldrb r3, [r3, #8]
|
||
8004080: b29b uxth r3, r3
|
||
8004082: 88fa ldrh r2, [r7, #6]
|
||
8004084: 4611 mov r1, r2
|
||
8004086: 4618 mov r0, r3
|
||
8004088: f7ff fc2a bl 80038e0 <LCD_WriteReg>
|
||
LCD_WriteReg(lcddev.setycmd, Ypos);
|
||
800408c: 4b05 ldr r3, [pc, #20] ; (80040a4 <LCD_SetCursor+0x11c>)
|
||
800408e: 7a5b ldrb r3, [r3, #9]
|
||
8004090: b29b uxth r3, r3
|
||
8004092: 88ba ldrh r2, [r7, #4]
|
||
8004094: 4611 mov r1, r2
|
||
8004096: 4618 mov r0, r3
|
||
8004098: f7ff fc22 bl 80038e0 <LCD_WriteReg>
|
||
}
|
||
800409c: bf00 nop
|
||
800409e: 3708 adds r7, #8
|
||
80040a0: 46bd mov sp, r7
|
||
80040a2: bd80 pop {r7, pc}
|
||
80040a4: 200002a8 .word 0x200002a8
|
||
|
||
080040a8 <LCD_set_dot>:
|
||
}
|
||
//����
|
||
//x,y:����
|
||
//POINT_COLOR:�˵�����ɫ
|
||
void LCD_set_dot(uint16_t x,uint16_t y,uint16_t color)
|
||
{
|
||
80040a8: b580 push {r7, lr}
|
||
80040aa: b082 sub sp, #8
|
||
80040ac: af00 add r7, sp, #0
|
||
80040ae: 4603 mov r3, r0
|
||
80040b0: 80fb strh r3, [r7, #6]
|
||
80040b2: 460b mov r3, r1
|
||
80040b4: 80bb strh r3, [r7, #4]
|
||
80040b6: 4613 mov r3, r2
|
||
80040b8: 807b strh r3, [r7, #2]
|
||
LCD_SetCursor(x,y); //���ù���λ��
|
||
80040ba: 88ba ldrh r2, [r7, #4]
|
||
80040bc: 88fb ldrh r3, [r7, #6]
|
||
80040be: 4611 mov r1, r2
|
||
80040c0: 4618 mov r0, r3
|
||
80040c2: f7ff ff61 bl 8003f88 <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
80040c6: 4b06 ldr r3, [pc, #24] ; (80040e0 <LCD_set_dot+0x38>)
|
||
80040c8: 79da ldrb r2, [r3, #7]
|
||
80040ca: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
80040ce: b292 uxth r2, r2
|
||
80040d0: 801a strh r2, [r3, #0]
|
||
LCD_DATA_ADDRESS=color;
|
||
80040d2: 4a04 ldr r2, [pc, #16] ; (80040e4 <LCD_set_dot+0x3c>)
|
||
80040d4: 887b ldrh r3, [r7, #2]
|
||
80040d6: 8013 strh r3, [r2, #0]
|
||
}
|
||
80040d8: bf00 nop
|
||
80040da: 3708 adds r7, #8
|
||
80040dc: 46bd mov sp, r7
|
||
80040de: bd80 pop {r7, pc}
|
||
80040e0: 200002a8 .word 0x200002a8
|
||
80040e4: 6c000800 .word 0x6c000800
|
||
|
||
080040e8 <LCD_Clear>:
|
||
|
||
//��������
|
||
//color:Ҫ����������ɫ
|
||
void LCD_Clear(uint16_t color)
|
||
{
|
||
80040e8: b580 push {r7, lr}
|
||
80040ea: b084 sub sp, #16
|
||
80040ec: af00 add r7, sp, #0
|
||
80040ee: 4603 mov r3, r0
|
||
80040f0: 80fb strh r3, [r7, #6]
|
||
uint32_t index=0;
|
||
80040f2: 2300 movs r3, #0
|
||
80040f4: 60fb str r3, [r7, #12]
|
||
uint32_t totalpoint=lcddev.width;
|
||
80040f6: 4b23 ldr r3, [pc, #140] ; (8004184 <LCD_Clear+0x9c>)
|
||
80040f8: 881b ldrh r3, [r3, #0]
|
||
80040fa: 60bb str r3, [r7, #8]
|
||
totalpoint*=lcddev.height; //�õ��ܵ���
|
||
80040fc: 4b21 ldr r3, [pc, #132] ; (8004184 <LCD_Clear+0x9c>)
|
||
80040fe: 885b ldrh r3, [r3, #2]
|
||
8004100: 461a mov r2, r3
|
||
8004102: 68bb ldr r3, [r7, #8]
|
||
8004104: fb02 f303 mul.w r3, r2, r3
|
||
8004108: 60bb str r3, [r7, #8]
|
||
if((lcddev.id==0X6804)&&(lcddev.dir==1))//6804������ʱ�������
|
||
800410a: 4b1e ldr r3, [pc, #120] ; (8004184 <LCD_Clear+0x9c>)
|
||
800410c: 889b ldrh r3, [r3, #4]
|
||
800410e: f646 0204 movw r2, #26628 ; 0x6804
|
||
8004112: 4293 cmp r3, r2
|
||
8004114: d11a bne.n 800414c <LCD_Clear+0x64>
|
||
8004116: 4b1b ldr r3, [pc, #108] ; (8004184 <LCD_Clear+0x9c>)
|
||
8004118: 799b ldrb r3, [r3, #6]
|
||
800411a: 2b01 cmp r3, #1
|
||
800411c: d116 bne.n 800414c <LCD_Clear+0x64>
|
||
{
|
||
lcddev.dir=0;
|
||
800411e: 4b19 ldr r3, [pc, #100] ; (8004184 <LCD_Clear+0x9c>)
|
||
8004120: 2200 movs r2, #0
|
||
8004122: 719a strb r2, [r3, #6]
|
||
lcddev.setxcmd=0X2A;
|
||
8004124: 4b17 ldr r3, [pc, #92] ; (8004184 <LCD_Clear+0x9c>)
|
||
8004126: 222a movs r2, #42 ; 0x2a
|
||
8004128: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
800412a: 4b16 ldr r3, [pc, #88] ; (8004184 <LCD_Clear+0x9c>)
|
||
800412c: 222b movs r2, #43 ; 0x2b
|
||
800412e: 725a strb r2, [r3, #9]
|
||
LCD_SetCursor(0x00,0x0000); //���ù���λ��
|
||
8004130: 2100 movs r1, #0
|
||
8004132: 2000 movs r0, #0
|
||
8004134: f7ff ff28 bl 8003f88 <LCD_SetCursor>
|
||
lcddev.dir=1;
|
||
8004138: 4b12 ldr r3, [pc, #72] ; (8004184 <LCD_Clear+0x9c>)
|
||
800413a: 2201 movs r2, #1
|
||
800413c: 719a strb r2, [r3, #6]
|
||
lcddev.setxcmd=0X2B;
|
||
800413e: 4b11 ldr r3, [pc, #68] ; (8004184 <LCD_Clear+0x9c>)
|
||
8004140: 222b movs r2, #43 ; 0x2b
|
||
8004142: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2A;
|
||
8004144: 4b0f ldr r3, [pc, #60] ; (8004184 <LCD_Clear+0x9c>)
|
||
8004146: 222a movs r2, #42 ; 0x2a
|
||
8004148: 725a strb r2, [r3, #9]
|
||
800414a: e003 b.n 8004154 <LCD_Clear+0x6c>
|
||
}else LCD_SetCursor(0x00,0x0000); //���ù���λ��
|
||
800414c: 2100 movs r1, #0
|
||
800414e: 2000 movs r0, #0
|
||
8004150: f7ff ff1a bl 8003f88 <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
8004154: 4b0b ldr r3, [pc, #44] ; (8004184 <LCD_Clear+0x9c>)
|
||
8004156: 79da ldrb r2, [r3, #7]
|
||
8004158: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
800415c: b292 uxth r2, r2
|
||
800415e: 801a strh r2, [r3, #0]
|
||
for(index=0;index<totalpoint;index++)
|
||
8004160: 2300 movs r3, #0
|
||
8004162: 60fb str r3, [r7, #12]
|
||
8004164: e005 b.n 8004172 <LCD_Clear+0x8a>
|
||
{
|
||
LCD_DATA_ADDRESS=color;
|
||
8004166: 4a08 ldr r2, [pc, #32] ; (8004188 <LCD_Clear+0xa0>)
|
||
8004168: 88fb ldrh r3, [r7, #6]
|
||
800416a: 8013 strh r3, [r2, #0]
|
||
for(index=0;index<totalpoint;index++)
|
||
800416c: 68fb ldr r3, [r7, #12]
|
||
800416e: 3301 adds r3, #1
|
||
8004170: 60fb str r3, [r7, #12]
|
||
8004172: 68fa ldr r2, [r7, #12]
|
||
8004174: 68bb ldr r3, [r7, #8]
|
||
8004176: 429a cmp r2, r3
|
||
8004178: d3f5 bcc.n 8004166 <LCD_Clear+0x7e>
|
||
}
|
||
}
|
||
800417a: bf00 nop
|
||
800417c: bf00 nop
|
||
800417e: 3710 adds r7, #16
|
||
8004180: 46bd mov sp, r7
|
||
8004182: bd80 pop {r7, pc}
|
||
8004184: 200002a8 .word 0x200002a8
|
||
8004188: 6c000800 .word 0x6c000800
|
||
|
||
0800418c <LCD_DrawLine>:
|
||
//***********************************2D
|
||
//����
|
||
//x1,y1:��������
|
||
//x2,y2:�յ�����
|
||
void LCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2,uint16_t color)
|
||
{
|
||
800418c: b590 push {r4, r7, lr}
|
||
800418e: b08d sub sp, #52 ; 0x34
|
||
8004190: af00 add r7, sp, #0
|
||
8004192: 4604 mov r4, r0
|
||
8004194: 4608 mov r0, r1
|
||
8004196: 4611 mov r1, r2
|
||
8004198: 461a mov r2, r3
|
||
800419a: 4623 mov r3, r4
|
||
800419c: 80fb strh r3, [r7, #6]
|
||
800419e: 4603 mov r3, r0
|
||
80041a0: 80bb strh r3, [r7, #4]
|
||
80041a2: 460b mov r3, r1
|
||
80041a4: 807b strh r3, [r7, #2]
|
||
80041a6: 4613 mov r3, r2
|
||
80041a8: 803b strh r3, [r7, #0]
|
||
uint16_t t;
|
||
int xerr=0,yerr=0,delta_x,delta_y,distance;
|
||
80041aa: 2300 movs r3, #0
|
||
80041ac: 62bb str r3, [r7, #40] ; 0x28
|
||
80041ae: 2300 movs r3, #0
|
||
80041b0: 627b str r3, [r7, #36] ; 0x24
|
||
int incx,incy,uRow,uCol;
|
||
delta_x=x2-x1; //������������
|
||
80041b2: 887a ldrh r2, [r7, #2]
|
||
80041b4: 88fb ldrh r3, [r7, #6]
|
||
80041b6: 1ad3 subs r3, r2, r3
|
||
80041b8: 623b str r3, [r7, #32]
|
||
delta_y=y2-y1;
|
||
80041ba: 883a ldrh r2, [r7, #0]
|
||
80041bc: 88bb ldrh r3, [r7, #4]
|
||
80041be: 1ad3 subs r3, r2, r3
|
||
80041c0: 61fb str r3, [r7, #28]
|
||
uRow=x1;
|
||
80041c2: 88fb ldrh r3, [r7, #6]
|
||
80041c4: 60fb str r3, [r7, #12]
|
||
uCol=y1;
|
||
80041c6: 88bb ldrh r3, [r7, #4]
|
||
80041c8: 60bb str r3, [r7, #8]
|
||
if(delta_x>0)incx=1; //���õ�������
|
||
80041ca: 6a3b ldr r3, [r7, #32]
|
||
80041cc: 2b00 cmp r3, #0
|
||
80041ce: dd02 ble.n 80041d6 <LCD_DrawLine+0x4a>
|
||
80041d0: 2301 movs r3, #1
|
||
80041d2: 617b str r3, [r7, #20]
|
||
80041d4: e00b b.n 80041ee <LCD_DrawLine+0x62>
|
||
else if(delta_x==0)incx=0;//��ֱ��
|
||
80041d6: 6a3b ldr r3, [r7, #32]
|
||
80041d8: 2b00 cmp r3, #0
|
||
80041da: d102 bne.n 80041e2 <LCD_DrawLine+0x56>
|
||
80041dc: 2300 movs r3, #0
|
||
80041de: 617b str r3, [r7, #20]
|
||
80041e0: e005 b.n 80041ee <LCD_DrawLine+0x62>
|
||
else {incx=-1;delta_x=-delta_x;}
|
||
80041e2: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
80041e6: 617b str r3, [r7, #20]
|
||
80041e8: 6a3b ldr r3, [r7, #32]
|
||
80041ea: 425b negs r3, r3
|
||
80041ec: 623b str r3, [r7, #32]
|
||
if(delta_y>0)incy=1;
|
||
80041ee: 69fb ldr r3, [r7, #28]
|
||
80041f0: 2b00 cmp r3, #0
|
||
80041f2: dd02 ble.n 80041fa <LCD_DrawLine+0x6e>
|
||
80041f4: 2301 movs r3, #1
|
||
80041f6: 613b str r3, [r7, #16]
|
||
80041f8: e00b b.n 8004212 <LCD_DrawLine+0x86>
|
||
else if(delta_y==0)incy=0;//ˮƽ��
|
||
80041fa: 69fb ldr r3, [r7, #28]
|
||
80041fc: 2b00 cmp r3, #0
|
||
80041fe: d102 bne.n 8004206 <LCD_DrawLine+0x7a>
|
||
8004200: 2300 movs r3, #0
|
||
8004202: 613b str r3, [r7, #16]
|
||
8004204: e005 b.n 8004212 <LCD_DrawLine+0x86>
|
||
else{incy=-1;delta_y=-delta_y;}
|
||
8004206: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
800420a: 613b str r3, [r7, #16]
|
||
800420c: 69fb ldr r3, [r7, #28]
|
||
800420e: 425b negs r3, r3
|
||
8004210: 61fb str r3, [r7, #28]
|
||
if( delta_x>delta_y)distance=delta_x; //ѡȡ��������������
|
||
8004212: 6a3a ldr r2, [r7, #32]
|
||
8004214: 69fb ldr r3, [r7, #28]
|
||
8004216: 429a cmp r2, r3
|
||
8004218: dd02 ble.n 8004220 <LCD_DrawLine+0x94>
|
||
800421a: 6a3b ldr r3, [r7, #32]
|
||
800421c: 61bb str r3, [r7, #24]
|
||
800421e: e001 b.n 8004224 <LCD_DrawLine+0x98>
|
||
else distance=delta_y;
|
||
8004220: 69fb ldr r3, [r7, #28]
|
||
8004222: 61bb str r3, [r7, #24]
|
||
for(t=0;t<=distance+1;t++ )//��������
|
||
8004224: 2300 movs r3, #0
|
||
8004226: 85fb strh r3, [r7, #46] ; 0x2e
|
||
8004228: e02b b.n 8004282 <LCD_DrawLine+0xf6>
|
||
{
|
||
LCD_set_dot(uRow,uCol,color);//����
|
||
800422a: 68fb ldr r3, [r7, #12]
|
||
800422c: b29b uxth r3, r3
|
||
800422e: 68ba ldr r2, [r7, #8]
|
||
8004230: b291 uxth r1, r2
|
||
8004232: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40
|
||
8004236: 4618 mov r0, r3
|
||
8004238: f7ff ff36 bl 80040a8 <LCD_set_dot>
|
||
xerr+=delta_x ;
|
||
800423c: 6aba ldr r2, [r7, #40] ; 0x28
|
||
800423e: 6a3b ldr r3, [r7, #32]
|
||
8004240: 4413 add r3, r2
|
||
8004242: 62bb str r3, [r7, #40] ; 0x28
|
||
yerr+=delta_y ;
|
||
8004244: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8004246: 69fb ldr r3, [r7, #28]
|
||
8004248: 4413 add r3, r2
|
||
800424a: 627b str r3, [r7, #36] ; 0x24
|
||
if(xerr>distance)
|
||
800424c: 6aba ldr r2, [r7, #40] ; 0x28
|
||
800424e: 69bb ldr r3, [r7, #24]
|
||
8004250: 429a cmp r2, r3
|
||
8004252: dd07 ble.n 8004264 <LCD_DrawLine+0xd8>
|
||
{
|
||
xerr-=distance;
|
||
8004254: 6aba ldr r2, [r7, #40] ; 0x28
|
||
8004256: 69bb ldr r3, [r7, #24]
|
||
8004258: 1ad3 subs r3, r2, r3
|
||
800425a: 62bb str r3, [r7, #40] ; 0x28
|
||
uRow+=incx;
|
||
800425c: 68fa ldr r2, [r7, #12]
|
||
800425e: 697b ldr r3, [r7, #20]
|
||
8004260: 4413 add r3, r2
|
||
8004262: 60fb str r3, [r7, #12]
|
||
}
|
||
if(yerr>distance)
|
||
8004264: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8004266: 69bb ldr r3, [r7, #24]
|
||
8004268: 429a cmp r2, r3
|
||
800426a: dd07 ble.n 800427c <LCD_DrawLine+0xf0>
|
||
{
|
||
yerr-=distance;
|
||
800426c: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
800426e: 69bb ldr r3, [r7, #24]
|
||
8004270: 1ad3 subs r3, r2, r3
|
||
8004272: 627b str r3, [r7, #36] ; 0x24
|
||
uCol+=incy;
|
||
8004274: 68ba ldr r2, [r7, #8]
|
||
8004276: 693b ldr r3, [r7, #16]
|
||
8004278: 4413 add r3, r2
|
||
800427a: 60bb str r3, [r7, #8]
|
||
for(t=0;t<=distance+1;t++ )//��������
|
||
800427c: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
||
800427e: 3301 adds r3, #1
|
||
8004280: 85fb strh r3, [r7, #46] ; 0x2e
|
||
8004282: 8dfa ldrh r2, [r7, #46] ; 0x2e
|
||
8004284: 69bb ldr r3, [r7, #24]
|
||
8004286: 3301 adds r3, #1
|
||
8004288: 429a cmp r2, r3
|
||
800428a: ddce ble.n 800422a <LCD_DrawLine+0x9e>
|
||
}
|
||
}
|
||
}
|
||
800428c: bf00 nop
|
||
800428e: bf00 nop
|
||
8004290: 3734 adds r7, #52 ; 0x34
|
||
8004292: 46bd mov sp, r7
|
||
8004294: bd90 pop {r4, r7, pc}
|
||
|
||
08004296 <Draw_Circle>:
|
||
|
||
//��ָ��λ�û�һ��ָ����С��Բ
|
||
//(x,y):���ĵ�
|
||
//r :�뾶
|
||
void Draw_Circle(uint16_t x0,uint16_t y0,uint16_t r,uint16_t color)
|
||
{
|
||
8004296: b590 push {r4, r7, lr}
|
||
8004298: b087 sub sp, #28
|
||
800429a: af00 add r7, sp, #0
|
||
800429c: 4604 mov r4, r0
|
||
800429e: 4608 mov r0, r1
|
||
80042a0: 4611 mov r1, r2
|
||
80042a2: 461a mov r2, r3
|
||
80042a4: 4623 mov r3, r4
|
||
80042a6: 80fb strh r3, [r7, #6]
|
||
80042a8: 4603 mov r3, r0
|
||
80042aa: 80bb strh r3, [r7, #4]
|
||
80042ac: 460b mov r3, r1
|
||
80042ae: 807b strh r3, [r7, #2]
|
||
80042b0: 4613 mov r3, r2
|
||
80042b2: 803b strh r3, [r7, #0]
|
||
int a,b;
|
||
int di;
|
||
a=0;b=r;
|
||
80042b4: 2300 movs r3, #0
|
||
80042b6: 617b str r3, [r7, #20]
|
||
80042b8: 887b ldrh r3, [r7, #2]
|
||
80042ba: 613b str r3, [r7, #16]
|
||
di=3-(r<<1); //�ж��¸���λ�õı�־
|
||
80042bc: 887b ldrh r3, [r7, #2]
|
||
80042be: 005b lsls r3, r3, #1
|
||
80042c0: f1c3 0303 rsb r3, r3, #3
|
||
80042c4: 60fb str r3, [r7, #12]
|
||
while(a<=b)
|
||
80042c6: e087 b.n 80043d8 <Draw_Circle+0x142>
|
||
{
|
||
LCD_set_dot(x0+a,y0-b,color); //5
|
||
80042c8: 697b ldr r3, [r7, #20]
|
||
80042ca: b29a uxth r2, r3
|
||
80042cc: 88fb ldrh r3, [r7, #6]
|
||
80042ce: 4413 add r3, r2
|
||
80042d0: b298 uxth r0, r3
|
||
80042d2: 693b ldr r3, [r7, #16]
|
||
80042d4: b29b uxth r3, r3
|
||
80042d6: 88ba ldrh r2, [r7, #4]
|
||
80042d8: 1ad3 subs r3, r2, r3
|
||
80042da: b29b uxth r3, r3
|
||
80042dc: 883a ldrh r2, [r7, #0]
|
||
80042de: 4619 mov r1, r3
|
||
80042e0: f7ff fee2 bl 80040a8 <LCD_set_dot>
|
||
LCD_set_dot(x0+b,y0-a,color); //0
|
||
80042e4: 693b ldr r3, [r7, #16]
|
||
80042e6: b29a uxth r2, r3
|
||
80042e8: 88fb ldrh r3, [r7, #6]
|
||
80042ea: 4413 add r3, r2
|
||
80042ec: b298 uxth r0, r3
|
||
80042ee: 697b ldr r3, [r7, #20]
|
||
80042f0: b29b uxth r3, r3
|
||
80042f2: 88ba ldrh r2, [r7, #4]
|
||
80042f4: 1ad3 subs r3, r2, r3
|
||
80042f6: b29b uxth r3, r3
|
||
80042f8: 883a ldrh r2, [r7, #0]
|
||
80042fa: 4619 mov r1, r3
|
||
80042fc: f7ff fed4 bl 80040a8 <LCD_set_dot>
|
||
LCD_set_dot(x0+b,y0+a,color); //4
|
||
8004300: 693b ldr r3, [r7, #16]
|
||
8004302: b29a uxth r2, r3
|
||
8004304: 88fb ldrh r3, [r7, #6]
|
||
8004306: 4413 add r3, r2
|
||
8004308: b298 uxth r0, r3
|
||
800430a: 697b ldr r3, [r7, #20]
|
||
800430c: b29a uxth r2, r3
|
||
800430e: 88bb ldrh r3, [r7, #4]
|
||
8004310: 4413 add r3, r2
|
||
8004312: b29b uxth r3, r3
|
||
8004314: 883a ldrh r2, [r7, #0]
|
||
8004316: 4619 mov r1, r3
|
||
8004318: f7ff fec6 bl 80040a8 <LCD_set_dot>
|
||
LCD_set_dot(x0+a,y0+b,color); //6
|
||
800431c: 697b ldr r3, [r7, #20]
|
||
800431e: b29a uxth r2, r3
|
||
8004320: 88fb ldrh r3, [r7, #6]
|
||
8004322: 4413 add r3, r2
|
||
8004324: b298 uxth r0, r3
|
||
8004326: 693b ldr r3, [r7, #16]
|
||
8004328: b29a uxth r2, r3
|
||
800432a: 88bb ldrh r3, [r7, #4]
|
||
800432c: 4413 add r3, r2
|
||
800432e: b29b uxth r3, r3
|
||
8004330: 883a ldrh r2, [r7, #0]
|
||
8004332: 4619 mov r1, r3
|
||
8004334: f7ff feb8 bl 80040a8 <LCD_set_dot>
|
||
LCD_set_dot(x0-a,y0+b,color); //1
|
||
8004338: 697b ldr r3, [r7, #20]
|
||
800433a: b29b uxth r3, r3
|
||
800433c: 88fa ldrh r2, [r7, #6]
|
||
800433e: 1ad3 subs r3, r2, r3
|
||
8004340: b298 uxth r0, r3
|
||
8004342: 693b ldr r3, [r7, #16]
|
||
8004344: b29a uxth r2, r3
|
||
8004346: 88bb ldrh r3, [r7, #4]
|
||
8004348: 4413 add r3, r2
|
||
800434a: b29b uxth r3, r3
|
||
800434c: 883a ldrh r2, [r7, #0]
|
||
800434e: 4619 mov r1, r3
|
||
8004350: f7ff feaa bl 80040a8 <LCD_set_dot>
|
||
LCD_set_dot(x0-b,y0+a,color);
|
||
8004354: 693b ldr r3, [r7, #16]
|
||
8004356: b29b uxth r3, r3
|
||
8004358: 88fa ldrh r2, [r7, #6]
|
||
800435a: 1ad3 subs r3, r2, r3
|
||
800435c: b298 uxth r0, r3
|
||
800435e: 697b ldr r3, [r7, #20]
|
||
8004360: b29a uxth r2, r3
|
||
8004362: 88bb ldrh r3, [r7, #4]
|
||
8004364: 4413 add r3, r2
|
||
8004366: b29b uxth r3, r3
|
||
8004368: 883a ldrh r2, [r7, #0]
|
||
800436a: 4619 mov r1, r3
|
||
800436c: f7ff fe9c bl 80040a8 <LCD_set_dot>
|
||
LCD_set_dot(x0-a,y0-b,color); //2
|
||
8004370: 697b ldr r3, [r7, #20]
|
||
8004372: b29b uxth r3, r3
|
||
8004374: 88fa ldrh r2, [r7, #6]
|
||
8004376: 1ad3 subs r3, r2, r3
|
||
8004378: b298 uxth r0, r3
|
||
800437a: 693b ldr r3, [r7, #16]
|
||
800437c: b29b uxth r3, r3
|
||
800437e: 88ba ldrh r2, [r7, #4]
|
||
8004380: 1ad3 subs r3, r2, r3
|
||
8004382: b29b uxth r3, r3
|
||
8004384: 883a ldrh r2, [r7, #0]
|
||
8004386: 4619 mov r1, r3
|
||
8004388: f7ff fe8e bl 80040a8 <LCD_set_dot>
|
||
LCD_set_dot(x0-b,y0-a,color); //7
|
||
800438c: 693b ldr r3, [r7, #16]
|
||
800438e: b29b uxth r3, r3
|
||
8004390: 88fa ldrh r2, [r7, #6]
|
||
8004392: 1ad3 subs r3, r2, r3
|
||
8004394: b298 uxth r0, r3
|
||
8004396: 697b ldr r3, [r7, #20]
|
||
8004398: b29b uxth r3, r3
|
||
800439a: 88ba ldrh r2, [r7, #4]
|
||
800439c: 1ad3 subs r3, r2, r3
|
||
800439e: b29b uxth r3, r3
|
||
80043a0: 883a ldrh r2, [r7, #0]
|
||
80043a2: 4619 mov r1, r3
|
||
80043a4: f7ff fe80 bl 80040a8 <LCD_set_dot>
|
||
a++;
|
||
80043a8: 697b ldr r3, [r7, #20]
|
||
80043aa: 3301 adds r3, #1
|
||
80043ac: 617b str r3, [r7, #20]
|
||
//ʹ��Bresenham�㷨��Բ
|
||
if(di<0)di +=4*a+6;
|
||
80043ae: 68fb ldr r3, [r7, #12]
|
||
80043b0: 2b00 cmp r3, #0
|
||
80043b2: da06 bge.n 80043c2 <Draw_Circle+0x12c>
|
||
80043b4: 697b ldr r3, [r7, #20]
|
||
80043b6: 009b lsls r3, r3, #2
|
||
80043b8: 3306 adds r3, #6
|
||
80043ba: 68fa ldr r2, [r7, #12]
|
||
80043bc: 4413 add r3, r2
|
||
80043be: 60fb str r3, [r7, #12]
|
||
80043c0: e00a b.n 80043d8 <Draw_Circle+0x142>
|
||
else
|
||
{
|
||
di+=10+4*(a-b);
|
||
80043c2: 697a ldr r2, [r7, #20]
|
||
80043c4: 693b ldr r3, [r7, #16]
|
||
80043c6: 1ad3 subs r3, r2, r3
|
||
80043c8: 009b lsls r3, r3, #2
|
||
80043ca: 330a adds r3, #10
|
||
80043cc: 68fa ldr r2, [r7, #12]
|
||
80043ce: 4413 add r3, r2
|
||
80043d0: 60fb str r3, [r7, #12]
|
||
b--;
|
||
80043d2: 693b ldr r3, [r7, #16]
|
||
80043d4: 3b01 subs r3, #1
|
||
80043d6: 613b str r3, [r7, #16]
|
||
while(a<=b)
|
||
80043d8: 697a ldr r2, [r7, #20]
|
||
80043da: 693b ldr r3, [r7, #16]
|
||
80043dc: 429a cmp r2, r3
|
||
80043de: f77f af73 ble.w 80042c8 <Draw_Circle+0x32>
|
||
}
|
||
}
|
||
}
|
||
80043e2: bf00 nop
|
||
80043e4: bf00 nop
|
||
80043e6: 371c adds r7, #28
|
||
80043e8: 46bd mov sp, r7
|
||
80043ea: bd90 pop {r4, r7, pc}
|
||
|
||
080043ec <LCD_ShowChar>:
|
||
//num:Ҫ��ʾ���ַ�:" "--->"~"
|
||
//size:������С 12/16
|
||
//mode:���ӷ�ʽ(1)���Ƿǵ��ӷ�ʽ(0)
|
||
|
||
void LCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint16_t bg,uint16_t color)
|
||
{
|
||
80043ec: b590 push {r4, r7, lr}
|
||
80043ee: b085 sub sp, #20
|
||
80043f0: af00 add r7, sp, #0
|
||
80043f2: 4604 mov r4, r0
|
||
80043f4: 4608 mov r0, r1
|
||
80043f6: 4611 mov r1, r2
|
||
80043f8: 461a mov r2, r3
|
||
80043fa: 4623 mov r3, r4
|
||
80043fc: 80fb strh r3, [r7, #6]
|
||
80043fe: 4603 mov r3, r0
|
||
8004400: 80bb strh r3, [r7, #4]
|
||
8004402: 460b mov r3, r1
|
||
8004404: 70fb strb r3, [r7, #3]
|
||
8004406: 4613 mov r3, r2
|
||
8004408: 70bb strb r3, [r7, #2]
|
||
uint8_t temp,t1,t;
|
||
uint16_t y0=y;
|
||
800440a: 88bb ldrh r3, [r7, #4]
|
||
800440c: 817b strh r3, [r7, #10]
|
||
|
||
//����
|
||
num=num-' ';//�õ�ƫ�ƺ���ֵ
|
||
800440e: 78fb ldrb r3, [r7, #3]
|
||
8004410: 3b20 subs r3, #32
|
||
8004412: 70fb strb r3, [r7, #3]
|
||
|
||
for(t=0;t<size;t++)
|
||
8004414: 2300 movs r3, #0
|
||
8004416: 737b strb r3, [r7, #13]
|
||
8004418: e055 b.n 80044c6 <LCD_ShowChar+0xda>
|
||
{
|
||
if(size==12){temp=asc2_1206[num][t];} //����1206����
|
||
800441a: 78bb ldrb r3, [r7, #2]
|
||
800441c: 2b0c cmp r3, #12
|
||
800441e: d10b bne.n 8004438 <LCD_ShowChar+0x4c>
|
||
8004420: 78fa ldrb r2, [r7, #3]
|
||
8004422: 7b79 ldrb r1, [r7, #13]
|
||
8004424: 482c ldr r0, [pc, #176] ; (80044d8 <LCD_ShowChar+0xec>)
|
||
8004426: 4613 mov r3, r2
|
||
8004428: 005b lsls r3, r3, #1
|
||
800442a: 4413 add r3, r2
|
||
800442c: 009b lsls r3, r3, #2
|
||
800442e: 4403 add r3, r0
|
||
8004430: 440b add r3, r1
|
||
8004432: 781b ldrb r3, [r3, #0]
|
||
8004434: 73fb strb r3, [r7, #15]
|
||
8004436: e007 b.n 8004448 <LCD_ShowChar+0x5c>
|
||
else{ temp=asc2_1608[num][t]; } //����1608����
|
||
8004438: 78fa ldrb r2, [r7, #3]
|
||
800443a: 7b7b ldrb r3, [r7, #13]
|
||
800443c: 4927 ldr r1, [pc, #156] ; (80044dc <LCD_ShowChar+0xf0>)
|
||
800443e: 0112 lsls r2, r2, #4
|
||
8004440: 440a add r2, r1
|
||
8004442: 4413 add r3, r2
|
||
8004444: 781b ldrb r3, [r3, #0]
|
||
8004446: 73fb strb r3, [r7, #15]
|
||
for(t1=0;t1<8;t1++)
|
||
8004448: 2300 movs r3, #0
|
||
800444a: 73bb strb r3, [r7, #14]
|
||
800444c: e033 b.n 80044b6 <LCD_ShowChar+0xca>
|
||
{
|
||
if(temp&0x80){LCD_set_dot(x,y,color);}else{if(bg!=color){LCD_set_dot(x,y,bg);}}
|
||
800444e: f997 300f ldrsb.w r3, [r7, #15]
|
||
8004452: 2b00 cmp r3, #0
|
||
8004454: da06 bge.n 8004464 <LCD_ShowChar+0x78>
|
||
8004456: 8cba ldrh r2, [r7, #36] ; 0x24
|
||
8004458: 88b9 ldrh r1, [r7, #4]
|
||
800445a: 88fb ldrh r3, [r7, #6]
|
||
800445c: 4618 mov r0, r3
|
||
800445e: f7ff fe23 bl 80040a8 <LCD_set_dot>
|
||
8004462: e009 b.n 8004478 <LCD_ShowChar+0x8c>
|
||
8004464: 8c3a ldrh r2, [r7, #32]
|
||
8004466: 8cbb ldrh r3, [r7, #36] ; 0x24
|
||
8004468: 429a cmp r2, r3
|
||
800446a: d005 beq.n 8004478 <LCD_ShowChar+0x8c>
|
||
800446c: 8c3a ldrh r2, [r7, #32]
|
||
800446e: 88b9 ldrh r1, [r7, #4]
|
||
8004470: 88fb ldrh r3, [r7, #6]
|
||
8004472: 4618 mov r0, r3
|
||
8004474: f7ff fe18 bl 80040a8 <LCD_set_dot>
|
||
temp<<=1;
|
||
8004478: 7bfb ldrb r3, [r7, #15]
|
||
800447a: 005b lsls r3, r3, #1
|
||
800447c: 73fb strb r3, [r7, #15]
|
||
y++;
|
||
800447e: 88bb ldrh r3, [r7, #4]
|
||
8004480: 3301 adds r3, #1
|
||
8004482: 80bb strh r3, [r7, #4]
|
||
if(x>=lcddev.width){return;}//��������
|
||
8004484: 4b16 ldr r3, [pc, #88] ; (80044e0 <LCD_ShowChar+0xf4>)
|
||
8004486: 881b ldrh r3, [r3, #0]
|
||
8004488: 88fa ldrh r2, [r7, #6]
|
||
800448a: 429a cmp r2, r3
|
||
800448c: d220 bcs.n 80044d0 <LCD_ShowChar+0xe4>
|
||
if((y-y0)==size)
|
||
800448e: 88ba ldrh r2, [r7, #4]
|
||
8004490: 897b ldrh r3, [r7, #10]
|
||
8004492: 1ad2 subs r2, r2, r3
|
||
8004494: 78bb ldrb r3, [r7, #2]
|
||
8004496: 429a cmp r2, r3
|
||
8004498: d10a bne.n 80044b0 <LCD_ShowChar+0xc4>
|
||
{
|
||
y=y0;
|
||
800449a: 897b ldrh r3, [r7, #10]
|
||
800449c: 80bb strh r3, [r7, #4]
|
||
x++;
|
||
800449e: 88fb ldrh r3, [r7, #6]
|
||
80044a0: 3301 adds r3, #1
|
||
80044a2: 80fb strh r3, [r7, #6]
|
||
if(x>=lcddev.width){return;}//��������
|
||
80044a4: 4b0e ldr r3, [pc, #56] ; (80044e0 <LCD_ShowChar+0xf4>)
|
||
80044a6: 881b ldrh r3, [r3, #0]
|
||
80044a8: 88fa ldrh r2, [r7, #6]
|
||
80044aa: 429a cmp r2, r3
|
||
80044ac: d307 bcc.n 80044be <LCD_ShowChar+0xd2>
|
||
80044ae: e010 b.n 80044d2 <LCD_ShowChar+0xe6>
|
||
for(t1=0;t1<8;t1++)
|
||
80044b0: 7bbb ldrb r3, [r7, #14]
|
||
80044b2: 3301 adds r3, #1
|
||
80044b4: 73bb strb r3, [r7, #14]
|
||
80044b6: 7bbb ldrb r3, [r7, #14]
|
||
80044b8: 2b07 cmp r3, #7
|
||
80044ba: d9c8 bls.n 800444e <LCD_ShowChar+0x62>
|
||
80044bc: e000 b.n 80044c0 <LCD_ShowChar+0xd4>
|
||
break;
|
||
80044be: bf00 nop
|
||
for(t=0;t<size;t++)
|
||
80044c0: 7b7b ldrb r3, [r7, #13]
|
||
80044c2: 3301 adds r3, #1
|
||
80044c4: 737b strb r3, [r7, #13]
|
||
80044c6: 7b7a ldrb r2, [r7, #13]
|
||
80044c8: 78bb ldrb r3, [r7, #2]
|
||
80044ca: 429a cmp r2, r3
|
||
80044cc: d3a5 bcc.n 800441a <LCD_ShowChar+0x2e>
|
||
80044ce: e000 b.n 80044d2 <LCD_ShowChar+0xe6>
|
||
if(x>=lcddev.width){return;}//��������
|
||
80044d0: bf00 nop
|
||
}
|
||
}
|
||
|
||
|
||
|
||
}
|
||
80044d2: 3714 adds r7, #20
|
||
80044d4: 46bd mov sp, r7
|
||
80044d6: bd90 pop {r4, r7, pc}
|
||
80044d8: 08008828 .word 0x08008828
|
||
80044dc: 08008c9c .word 0x08008c9c
|
||
80044e0: 200002a8 .word 0x200002a8
|
||
|
||
080044e4 <LCD_ShowString>:
|
||
//width,height:������С
|
||
//size:������С
|
||
//*p:�ַ�����ʼ��ַ
|
||
|
||
void LCD_ShowString(uint16_t x,uint16_t y,uint8_t *p,uint8_t size,uint16_t bg,uint16_t color)
|
||
{
|
||
80044e4: b590 push {r4, r7, lr}
|
||
80044e6: b087 sub sp, #28
|
||
80044e8: af02 add r7, sp, #8
|
||
80044ea: 60ba str r2, [r7, #8]
|
||
80044ec: 461a mov r2, r3
|
||
80044ee: 4603 mov r3, r0
|
||
80044f0: 81fb strh r3, [r7, #14]
|
||
80044f2: 460b mov r3, r1
|
||
80044f4: 81bb strh r3, [r7, #12]
|
||
80044f6: 4613 mov r3, r2
|
||
80044f8: 71fb strb r3, [r7, #7]
|
||
while(*p!='\0')
|
||
80044fa: e026 b.n 800454a <LCD_ShowString+0x66>
|
||
{
|
||
|
||
if(x>=lcddev.width||*p=='\n')
|
||
80044fc: 4b17 ldr r3, [pc, #92] ; (800455c <LCD_ShowString+0x78>)
|
||
80044fe: 881b ldrh r3, [r3, #0]
|
||
8004500: 89fa ldrh r2, [r7, #14]
|
||
8004502: 429a cmp r2, r3
|
||
8004504: d203 bcs.n 800450e <LCD_ShowString+0x2a>
|
||
8004506: 68bb ldr r3, [r7, #8]
|
||
8004508: 781b ldrb r3, [r3, #0]
|
||
800450a: 2b0a cmp r3, #10
|
||
800450c: d107 bne.n 800451e <LCD_ShowString+0x3a>
|
||
{
|
||
x=0;
|
||
800450e: 2300 movs r3, #0
|
||
8004510: 81fb strh r3, [r7, #14]
|
||
y+=size;
|
||
8004512: 79fb ldrb r3, [r7, #7]
|
||
8004514: b29a uxth r2, r3
|
||
8004516: 89bb ldrh r3, [r7, #12]
|
||
8004518: 4413 add r3, r2
|
||
800451a: 81bb strh r3, [r7, #12]
|
||
800451c: e012 b.n 8004544 <LCD_ShowString+0x60>
|
||
}else
|
||
{
|
||
LCD_ShowChar(x,y,*p,size,bg,color);
|
||
800451e: 68bb ldr r3, [r7, #8]
|
||
8004520: 781a ldrb r2, [r3, #0]
|
||
8004522: 79fc ldrb r4, [r7, #7]
|
||
8004524: 89b9 ldrh r1, [r7, #12]
|
||
8004526: 89f8 ldrh r0, [r7, #14]
|
||
8004528: 8cbb ldrh r3, [r7, #36] ; 0x24
|
||
800452a: 9301 str r3, [sp, #4]
|
||
800452c: 8c3b ldrh r3, [r7, #32]
|
||
800452e: 9300 str r3, [sp, #0]
|
||
8004530: 4623 mov r3, r4
|
||
8004532: f7ff ff5b bl 80043ec <LCD_ShowChar>
|
||
x+=(size/2);
|
||
8004536: 79fb ldrb r3, [r7, #7]
|
||
8004538: 085b lsrs r3, r3, #1
|
||
800453a: b2db uxtb r3, r3
|
||
800453c: b29a uxth r2, r3
|
||
800453e: 89fb ldrh r3, [r7, #14]
|
||
8004540: 4413 add r3, r2
|
||
8004542: 81fb strh r3, [r7, #14]
|
||
}
|
||
p++;
|
||
8004544: 68bb ldr r3, [r7, #8]
|
||
8004546: 3301 adds r3, #1
|
||
8004548: 60bb str r3, [r7, #8]
|
||
while(*p!='\0')
|
||
800454a: 68bb ldr r3, [r7, #8]
|
||
800454c: 781b ldrb r3, [r3, #0]
|
||
800454e: 2b00 cmp r3, #0
|
||
8004550: d1d4 bne.n 80044fc <LCD_ShowString+0x18>
|
||
|
||
}
|
||
}
|
||
8004552: bf00 nop
|
||
8004554: bf00 nop
|
||
8004556: 3714 adds r7, #20
|
||
8004558: 46bd mov sp, r7
|
||
800455a: bd90 pop {r4, r7, pc}
|
||
800455c: 200002a8 .word 0x200002a8
|
||
|
||
08004560 <IIC_SAND_DATE>:
|
||
|
||
//iicӲ���ӿ�
|
||
extern I2C_HandleTypeDef hi2c2;
|
||
|
||
void IIC_SAND_DATE(uint16_t DEVICE_ADD,uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG)
|
||
{
|
||
8004560: b580 push {r7, lr}
|
||
8004562: b088 sub sp, #32
|
||
8004564: af04 add r7, sp, #16
|
||
8004566: 60ba str r2, [r7, #8]
|
||
8004568: 461a mov r2, r3
|
||
800456a: 4603 mov r3, r0
|
||
800456c: 81fb strh r3, [r7, #14]
|
||
800456e: 460b mov r3, r1
|
||
8004570: 81bb strh r3, [r7, #12]
|
||
8004572: 4613 mov r3, r2
|
||
8004574: 80fb strh r3, [r7, #6]
|
||
HAL_I2C_Mem_Write(&hi2c2,DEVICE_ADD,IN_DEVICE_ADD,I2C_MEMADD_SIZE_8BIT,DATAS,LONG,100);
|
||
8004576: 89ba ldrh r2, [r7, #12]
|
||
8004578: 89f9 ldrh r1, [r7, #14]
|
||
800457a: 2364 movs r3, #100 ; 0x64
|
||
800457c: 9302 str r3, [sp, #8]
|
||
800457e: 88fb ldrh r3, [r7, #6]
|
||
8004580: 9301 str r3, [sp, #4]
|
||
8004582: 68bb ldr r3, [r7, #8]
|
||
8004584: 9300 str r3, [sp, #0]
|
||
8004586: 2301 movs r3, #1
|
||
8004588: 4803 ldr r0, [pc, #12] ; (8004598 <IIC_SAND_DATE+0x38>)
|
||
800458a: f7fd fda5 bl 80020d8 <HAL_I2C_Mem_Write>
|
||
}
|
||
800458e: bf00 nop
|
||
8004590: 3710 adds r7, #16
|
||
8004592: 46bd mov sp, r7
|
||
8004594: bd80 pop {r7, pc}
|
||
8004596: bf00 nop
|
||
8004598: 20000208 .word 0x20000208
|
||
|
||
0800459c <IIC_READ_DATE>:
|
||
|
||
void IIC_READ_DATE(uint16_t DEVICE_ADD,uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG)
|
||
{
|
||
800459c: b580 push {r7, lr}
|
||
800459e: b088 sub sp, #32
|
||
80045a0: af04 add r7, sp, #16
|
||
80045a2: 60ba str r2, [r7, #8]
|
||
80045a4: 461a mov r2, r3
|
||
80045a6: 4603 mov r3, r0
|
||
80045a8: 81fb strh r3, [r7, #14]
|
||
80045aa: 460b mov r3, r1
|
||
80045ac: 81bb strh r3, [r7, #12]
|
||
80045ae: 4613 mov r3, r2
|
||
80045b0: 80fb strh r3, [r7, #6]
|
||
HAL_I2C_Mem_Read(&hi2c2,DEVICE_ADD,IN_DEVICE_ADD,I2C_MEMADD_SIZE_8BIT,DATAS,LONG,100);
|
||
80045b2: 89ba ldrh r2, [r7, #12]
|
||
80045b4: 89f9 ldrh r1, [r7, #14]
|
||
80045b6: 2364 movs r3, #100 ; 0x64
|
||
80045b8: 9302 str r3, [sp, #8]
|
||
80045ba: 88fb ldrh r3, [r7, #6]
|
||
80045bc: 9301 str r3, [sp, #4]
|
||
80045be: 68bb ldr r3, [r7, #8]
|
||
80045c0: 9300 str r3, [sp, #0]
|
||
80045c2: 2301 movs r3, #1
|
||
80045c4: 4803 ldr r0, [pc, #12] ; (80045d4 <IIC_READ_DATE+0x38>)
|
||
80045c6: f7fd fe81 bl 80022cc <HAL_I2C_Mem_Read>
|
||
}
|
||
80045ca: bf00 nop
|
||
80045cc: 3710 adds r7, #16
|
||
80045ce: 46bd mov sp, r7
|
||
80045d0: bd80 pop {r7, pc}
|
||
80045d2: bf00 nop
|
||
80045d4: 20000208 .word 0x20000208
|
||
|
||
080045d8 <EPPROM_SLOWWRITE_INIT>:
|
||
//��ΪeepromоƬ��д���ٶ����ޣ�ÿд��һ���ַ�����Ҫ�ȴ�һ��ʱ����������д��
|
||
//����ϵͳ�����ܵ���һ���ģ���ͳ�Ľ�����������ʹ�ö�ʱ���жϻ��߶��߳̿����������ں�̨���棬
|
||
//�����Ľ���������ʹ��״̬����ͨ��һ��������Ҫ���������ݴ���������ͨ��״̬ѭ��һ�������棬������ʱ����ѭ����ʱ��
|
||
eeprom_write_buff_info eeprom_write_buffer; //��������
|
||
void EPPROM_SLOWWRITE_INIT() //��ʼ������
|
||
{
|
||
80045d8: b480 push {r7}
|
||
80045da: af00 add r7, sp, #0
|
||
eeprom_write_buffer.buff=NULL;
|
||
80045dc: 4b0a ldr r3, [pc, #40] ; (8004608 <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
80045de: 2200 movs r2, #0
|
||
80045e0: 601a str r2, [r3, #0]
|
||
eeprom_write_buffer.end=NULL;
|
||
80045e2: 4b09 ldr r3, [pc, #36] ; (8004608 <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
80045e4: 2200 movs r2, #0
|
||
80045e6: 609a str r2, [r3, #8]
|
||
eeprom_write_buffer.head=NULL;
|
||
80045e8: 4b07 ldr r3, [pc, #28] ; (8004608 <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
80045ea: 2200 movs r2, #0
|
||
80045ec: 605a str r2, [r3, #4]
|
||
eeprom_write_buffer.save_timeout=5; //����״̬��ѭ�����쵼�µı���ʧ�ܣ�������������ʱ�����о�û��Ҫд�����̫�˷ѿռ��ˣ�
|
||
80045ee: 4b06 ldr r3, [pc, #24] ; (8004608 <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
80045f0: 2205 movs r2, #5
|
||
80045f2: 741a strb r2, [r3, #16]
|
||
eeprom_write_buffer.save_busy=0; //��С��ʱ��Ϊæ״̬
|
||
80045f4: 4a04 ldr r2, [pc, #16] ; (8004608 <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
80045f6: 7c53 ldrb r3, [r2, #17]
|
||
80045f8: f36f 0300 bfc r3, #0, #1
|
||
80045fc: 7453 strb r3, [r2, #17]
|
||
}
|
||
80045fe: bf00 nop
|
||
8004600: 46bd mov sp, r7
|
||
8004602: bc80 pop {r7}
|
||
8004604: 4770 bx lr
|
||
8004606: bf00 nop
|
||
8004608: 200002b4 .word 0x200002b4
|
||
|
||
0800460c <EEPROM_SLOWWRITE_SERVER>:
|
||
|
||
//ѭ����������������ͷ�Ƿ��������Ƿ�æ��
|
||
void EEPROM_SLOWWRITE_SERVER()
|
||
{
|
||
800460c: b580 push {r7, lr}
|
||
800460e: b082 sub sp, #8
|
||
8004610: af00 add r7, sp, #0
|
||
eeprom_write_buff *buff;
|
||
char data;
|
||
if(eeprom_write_buffer.save_busy)
|
||
8004612: 4b20 ldr r3, [pc, #128] ; (8004694 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004614: 7c5b ldrb r3, [r3, #17]
|
||
8004616: f003 0301 and.w r3, r3, #1
|
||
800461a: b2db uxtb r3, r3
|
||
800461c: 2b00 cmp r3, #0
|
||
800461e: d00c beq.n 800463a <EEPROM_SLOWWRITE_SERVER+0x2e>
|
||
{
|
||
if(HAL_GetTick()>eeprom_write_buffer.save_time)
|
||
8004620: f7fd f940 bl 80018a4 <HAL_GetTick>
|
||
8004624: 4602 mov r2, r0
|
||
8004626: 4b1b ldr r3, [pc, #108] ; (8004694 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004628: 68db ldr r3, [r3, #12]
|
||
800462a: 429a cmp r2, r3
|
||
800462c: d92e bls.n 800468c <EEPROM_SLOWWRITE_SERVER+0x80>
|
||
{
|
||
eeprom_write_buffer.save_busy=0;
|
||
800462e: 4a19 ldr r2, [pc, #100] ; (8004694 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004630: 7c53 ldrb r3, [r2, #17]
|
||
8004632: f36f 0300 bfc r3, #0, #1
|
||
8004636: 7453 strb r3, [r2, #17]
|
||
free(eeprom_write_buffer.head);
|
||
eeprom_write_buffer.head=buff;
|
||
}
|
||
|
||
}
|
||
}
|
||
8004638: e028 b.n 800468c <EEPROM_SLOWWRITE_SERVER+0x80>
|
||
if(eeprom_write_buffer.head!=NULL)
|
||
800463a: 4b16 ldr r3, [pc, #88] ; (8004694 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
800463c: 685b ldr r3, [r3, #4]
|
||
800463e: 2b00 cmp r3, #0
|
||
8004640: d024 beq.n 800468c <EEPROM_SLOWWRITE_SERVER+0x80>
|
||
eeprom_write_buffer.save_busy=1;
|
||
8004642: 4a14 ldr r2, [pc, #80] ; (8004694 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004644: 7c53 ldrb r3, [r2, #17]
|
||
8004646: f043 0301 orr.w r3, r3, #1
|
||
800464a: 7453 strb r3, [r2, #17]
|
||
eeprom_write_buffer.save_time=HAL_GetTick()+eeprom_write_buffer.save_timeout;
|
||
800464c: f7fd f92a bl 80018a4 <HAL_GetTick>
|
||
8004650: 4603 mov r3, r0
|
||
8004652: 4a10 ldr r2, [pc, #64] ; (8004694 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004654: 7c12 ldrb r2, [r2, #16]
|
||
8004656: 4413 add r3, r2
|
||
8004658: 4a0e ldr r2, [pc, #56] ; (8004694 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
800465a: 60d3 str r3, [r2, #12]
|
||
buff=eeprom_write_buffer.head->next;
|
||
800465c: 4b0d ldr r3, [pc, #52] ; (8004694 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
800465e: 685b ldr r3, [r3, #4]
|
||
8004660: 681b ldr r3, [r3, #0]
|
||
8004662: 607b str r3, [r7, #4]
|
||
data=eeprom_write_buffer.head->date;
|
||
8004664: 4b0b ldr r3, [pc, #44] ; (8004694 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004666: 685b ldr r3, [r3, #4]
|
||
8004668: 799b ldrb r3, [r3, #6]
|
||
800466a: 70fb strb r3, [r7, #3]
|
||
IIC_SAND_DATE(EEPROM_ADDRESS,eeprom_write_buffer.head->add,&data,1);
|
||
800466c: 4b09 ldr r3, [pc, #36] ; (8004694 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
800466e: 685b ldr r3, [r3, #4]
|
||
8004670: 8899 ldrh r1, [r3, #4]
|
||
8004672: 1cfa adds r2, r7, #3
|
||
8004674: 2301 movs r3, #1
|
||
8004676: 20a0 movs r0, #160 ; 0xa0
|
||
8004678: f7ff ff72 bl 8004560 <IIC_SAND_DATE>
|
||
free(eeprom_write_buffer.head);
|
||
800467c: 4b05 ldr r3, [pc, #20] ; (8004694 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
800467e: 685b ldr r3, [r3, #4]
|
||
8004680: 4618 mov r0, r3
|
||
8004682: f001 f99b bl 80059bc <free>
|
||
eeprom_write_buffer.head=buff;
|
||
8004686: 4a03 ldr r2, [pc, #12] ; (8004694 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004688: 687b ldr r3, [r7, #4]
|
||
800468a: 6053 str r3, [r2, #4]
|
||
}
|
||
800468c: bf00 nop
|
||
800468e: 3708 adds r7, #8
|
||
8004690: 46bd mov sp, r7
|
||
8004692: bd80 pop {r7, pc}
|
||
8004694: 200002b4 .word 0x200002b4
|
||
|
||
08004698 <EEPROM_READ_BATY>:
|
||
|
||
//��eeprom��ȡ����
|
||
void EEPROM_READ_BATY(uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG)
|
||
{
|
||
8004698: b580 push {r7, lr}
|
||
800469a: b082 sub sp, #8
|
||
800469c: af00 add r7, sp, #0
|
||
800469e: 4603 mov r3, r0
|
||
80046a0: 6039 str r1, [r7, #0]
|
||
80046a2: 80fb strh r3, [r7, #6]
|
||
80046a4: 4613 mov r3, r2
|
||
80046a6: 80bb strh r3, [r7, #4]
|
||
IIC_READ_DATE(EEPROM_ADDRESS,IN_DEVICE_ADD,DATAS,LONG);
|
||
80046a8: 88bb ldrh r3, [r7, #4]
|
||
80046aa: 88f9 ldrh r1, [r7, #6]
|
||
80046ac: 683a ldr r2, [r7, #0]
|
||
80046ae: 20a0 movs r0, #160 ; 0xa0
|
||
80046b0: f7ff ff74 bl 800459c <IIC_READ_DATE>
|
||
}
|
||
80046b4: bf00 nop
|
||
80046b6: 3708 adds r7, #8
|
||
80046b8: 46bd mov sp, r7
|
||
80046ba: bd80 pop {r7, pc}
|
||
|
||
080046bc <EEPROM_WRITE_BATY>:
|
||
//��eeprom�����
|
||
void EEPROM_WRITE_BATY(uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG)
|
||
{
|
||
80046bc: b580 push {r7, lr}
|
||
80046be: b086 sub sp, #24
|
||
80046c0: af00 add r7, sp, #0
|
||
80046c2: 4603 mov r3, r0
|
||
80046c4: 6039 str r1, [r7, #0]
|
||
80046c6: 80fb strh r3, [r7, #6]
|
||
80046c8: 4613 mov r3, r2
|
||
80046ca: 80bb strh r3, [r7, #4]
|
||
//IIC_SAND_DATE(EEPROM_ADDRESS,IN_DEVICE_ADD,DATAS,LONG);
|
||
uint16_t addoffset=0;
|
||
80046cc: 2300 movs r3, #0
|
||
80046ce: 82fb strh r3, [r7, #22]
|
||
|
||
|
||
eeprom_write_buff *buff;
|
||
eeprom_write_buff *buff2;
|
||
while(LONG--)
|
||
80046d0: e02d b.n 800472e <EEPROM_WRITE_BATY+0x72>
|
||
{
|
||
buff =(eeprom_write_buff*)malloc(sizeof(eeprom_write_buff));
|
||
80046d2: 2008 movs r0, #8
|
||
80046d4: f001 f96a bl 80059ac <malloc>
|
||
80046d8: 4603 mov r3, r0
|
||
80046da: 613b str r3, [r7, #16]
|
||
if(buff!=NULL)
|
||
80046dc: 693b ldr r3, [r7, #16]
|
||
80046de: 2b00 cmp r3, #0
|
||
80046e0: d02b beq.n 800473a <EEPROM_WRITE_BATY+0x7e>
|
||
{
|
||
buff->add=IN_DEVICE_ADD+addoffset;
|
||
80046e2: 88fa ldrh r2, [r7, #6]
|
||
80046e4: 8afb ldrh r3, [r7, #22]
|
||
80046e6: 4413 add r3, r2
|
||
80046e8: b29a uxth r2, r3
|
||
80046ea: 693b ldr r3, [r7, #16]
|
||
80046ec: 809a strh r2, [r3, #4]
|
||
buff->date=DATAS[addoffset];
|
||
80046ee: 8afb ldrh r3, [r7, #22]
|
||
80046f0: 683a ldr r2, [r7, #0]
|
||
80046f2: 4413 add r3, r2
|
||
80046f4: 781a ldrb r2, [r3, #0]
|
||
80046f6: 693b ldr r3, [r7, #16]
|
||
80046f8: 719a strb r2, [r3, #6]
|
||
buff->next=NULL;
|
||
80046fa: 693b ldr r3, [r7, #16]
|
||
80046fc: 2200 movs r2, #0
|
||
80046fe: 601a str r2, [r3, #0]
|
||
}else{return ;}
|
||
if(eeprom_write_buffer.head==NULL)
|
||
8004700: 4b10 ldr r3, [pc, #64] ; (8004744 <EEPROM_WRITE_BATY+0x88>)
|
||
8004702: 685b ldr r3, [r3, #4]
|
||
8004704: 2b00 cmp r3, #0
|
||
8004706: d106 bne.n 8004716 <EEPROM_WRITE_BATY+0x5a>
|
||
{
|
||
eeprom_write_buffer.head=buff;
|
||
8004708: 4a0e ldr r2, [pc, #56] ; (8004744 <EEPROM_WRITE_BATY+0x88>)
|
||
800470a: 693b ldr r3, [r7, #16]
|
||
800470c: 6053 str r3, [r2, #4]
|
||
eeprom_write_buffer.end=buff;
|
||
800470e: 4a0d ldr r2, [pc, #52] ; (8004744 <EEPROM_WRITE_BATY+0x88>)
|
||
8004710: 693b ldr r3, [r7, #16]
|
||
8004712: 6093 str r3, [r2, #8]
|
||
8004714: e008 b.n 8004728 <EEPROM_WRITE_BATY+0x6c>
|
||
}else
|
||
{
|
||
buff2=eeprom_write_buffer.end;
|
||
8004716: 4b0b ldr r3, [pc, #44] ; (8004744 <EEPROM_WRITE_BATY+0x88>)
|
||
8004718: 689b ldr r3, [r3, #8]
|
||
800471a: 60fb str r3, [r7, #12]
|
||
buff2->next=buff;
|
||
800471c: 68fb ldr r3, [r7, #12]
|
||
800471e: 693a ldr r2, [r7, #16]
|
||
8004720: 601a str r2, [r3, #0]
|
||
eeprom_write_buffer.end=buff;
|
||
8004722: 4a08 ldr r2, [pc, #32] ; (8004744 <EEPROM_WRITE_BATY+0x88>)
|
||
8004724: 693b ldr r3, [r7, #16]
|
||
8004726: 6093 str r3, [r2, #8]
|
||
}
|
||
addoffset++;
|
||
8004728: 8afb ldrh r3, [r7, #22]
|
||
800472a: 3301 adds r3, #1
|
||
800472c: 82fb strh r3, [r7, #22]
|
||
while(LONG--)
|
||
800472e: 88bb ldrh r3, [r7, #4]
|
||
8004730: 1e5a subs r2, r3, #1
|
||
8004732: 80ba strh r2, [r7, #4]
|
||
8004734: 2b00 cmp r3, #0
|
||
8004736: d1cc bne.n 80046d2 <EEPROM_WRITE_BATY+0x16>
|
||
8004738: e000 b.n 800473c <EEPROM_WRITE_BATY+0x80>
|
||
}else{return ;}
|
||
800473a: bf00 nop
|
||
}
|
||
|
||
}
|
||
800473c: 3718 adds r7, #24
|
||
800473e: 46bd mov sp, r7
|
||
8004740: bd80 pop {r7, pc}
|
||
8004742: bf00 nop
|
||
8004744: 200002b4 .word 0x200002b4
|
||
|
||
08004748 <TP_Write_Byte>:
|
||
|
||
//SPI���
|
||
//��������IC�1byte����
|
||
//num:Ҫд��������
|
||
void TP_Write_Byte(char num)
|
||
{
|
||
8004748: b580 push {r7, lr}
|
||
800474a: b084 sub sp, #16
|
||
800474c: af00 add r7, sp, #0
|
||
800474e: 4603 mov r3, r0
|
||
8004750: 71fb strb r3, [r7, #7]
|
||
for(uint8_t count=0;count<8;count++)
|
||
8004752: 2300 movs r3, #0
|
||
8004754: 73fb strb r3, [r7, #15]
|
||
8004756: e020 b.n 800479a <TP_Write_Byte+0x52>
|
||
{
|
||
if(num&0x80){TDIN(1);}
|
||
8004758: f997 3007 ldrsb.w r3, [r7, #7]
|
||
800475c: 2b00 cmp r3, #0
|
||
800475e: da06 bge.n 800476e <TP_Write_Byte+0x26>
|
||
8004760: 2201 movs r2, #1
|
||
8004762: f44f 7100 mov.w r1, #512 ; 0x200
|
||
8004766: 4811 ldr r0, [pc, #68] ; (80047ac <TP_Write_Byte+0x64>)
|
||
8004768: f7fd fb59 bl 8001e1e <HAL_GPIO_WritePin>
|
||
800476c: e005 b.n 800477a <TP_Write_Byte+0x32>
|
||
else {TDIN(0);}
|
||
800476e: 2200 movs r2, #0
|
||
8004770: f44f 7100 mov.w r1, #512 ; 0x200
|
||
8004774: 480d ldr r0, [pc, #52] ; (80047ac <TP_Write_Byte+0x64>)
|
||
8004776: f7fd fb52 bl 8001e1e <HAL_GPIO_WritePin>
|
||
num<<=1;
|
||
800477a: 79fb ldrb r3, [r7, #7]
|
||
800477c: 005b lsls r3, r3, #1
|
||
800477e: 71fb strb r3, [r7, #7]
|
||
TCLK(0);
|
||
8004780: 2200 movs r2, #0
|
||
8004782: 2102 movs r1, #2
|
||
8004784: 480a ldr r0, [pc, #40] ; (80047b0 <TP_Write_Byte+0x68>)
|
||
8004786: f7fd fb4a bl 8001e1e <HAL_GPIO_WritePin>
|
||
TCLK(1); //��������Ч
|
||
800478a: 2201 movs r2, #1
|
||
800478c: 2102 movs r1, #2
|
||
800478e: 4808 ldr r0, [pc, #32] ; (80047b0 <TP_Write_Byte+0x68>)
|
||
8004790: f7fd fb45 bl 8001e1e <HAL_GPIO_WritePin>
|
||
for(uint8_t count=0;count<8;count++)
|
||
8004794: 7bfb ldrb r3, [r7, #15]
|
||
8004796: 3301 adds r3, #1
|
||
8004798: 73fb strb r3, [r7, #15]
|
||
800479a: 7bfb ldrb r3, [r7, #15]
|
||
800479c: 2b07 cmp r3, #7
|
||
800479e: d9db bls.n 8004758 <TP_Write_Byte+0x10>
|
||
}
|
||
}
|
||
80047a0: bf00 nop
|
||
80047a2: bf00 nop
|
||
80047a4: 3710 adds r7, #16
|
||
80047a6: 46bd mov sp, r7
|
||
80047a8: bd80 pop {r7, pc}
|
||
80047aa: bf00 nop
|
||
80047ac: 40011c00 .word 0x40011c00
|
||
80047b0: 40010c00 .word 0x40010c00
|
||
|
||
080047b4 <TP_Read_AD>:
|
||
//SPI������
|
||
//�Ӵ�����IC��ȡadcֵ
|
||
//CMD:ָ��
|
||
//����ֵ:����������
|
||
uint16_t TP_Read_AD(char CMD)
|
||
{
|
||
80047b4: b580 push {r7, lr}
|
||
80047b6: b084 sub sp, #16
|
||
80047b8: af00 add r7, sp, #0
|
||
80047ba: 4603 mov r3, r0
|
||
80047bc: 71fb strb r3, [r7, #7]
|
||
uint16_t Num=0;
|
||
80047be: 2300 movs r3, #0
|
||
80047c0: 81fb strh r3, [r7, #14]
|
||
TCLK(0); //������ʱ��
|
||
80047c2: 2200 movs r2, #0
|
||
80047c4: 2102 movs r1, #2
|
||
80047c6: 482b ldr r0, [pc, #172] ; (8004874 <TP_Read_AD+0xc0>)
|
||
80047c8: f7fd fb29 bl 8001e1e <HAL_GPIO_WritePin>
|
||
TDIN(0); //����������
|
||
80047cc: 2200 movs r2, #0
|
||
80047ce: f44f 7100 mov.w r1, #512 ; 0x200
|
||
80047d2: 4829 ldr r0, [pc, #164] ; (8004878 <TP_Read_AD+0xc4>)
|
||
80047d4: f7fd fb23 bl 8001e1e <HAL_GPIO_WritePin>
|
||
TCS(0); //ѡ�д�����IC
|
||
80047d8: 2200 movs r2, #0
|
||
80047da: 2104 movs r1, #4
|
||
80047dc: 4825 ldr r0, [pc, #148] ; (8004874 <TP_Read_AD+0xc0>)
|
||
80047de: f7fd fb1e bl 8001e1e <HAL_GPIO_WritePin>
|
||
TP_Write_Byte(CMD);//����������
|
||
80047e2: 79fb ldrb r3, [r7, #7]
|
||
80047e4: 4618 mov r0, r3
|
||
80047e6: f7ff ffaf bl 8004748 <TP_Write_Byte>
|
||
HAL_GetTick(); //����ʱ��adת����Ҫʱ��
|
||
80047ea: f7fd f85b bl 80018a4 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80047ee: f7fd f859 bl 80018a4 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80047f2: f7fd f857 bl 80018a4 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80047f6: f7fd f855 bl 80018a4 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80047fa: f7fd f853 bl 80018a4 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80047fe: f7fd f851 bl 80018a4 <HAL_GetTick>
|
||
TCLK(1); //��1��ʱ�ӣ�����BUSY
|
||
8004802: 2201 movs r2, #1
|
||
8004804: 2102 movs r1, #2
|
||
8004806: 481b ldr r0, [pc, #108] ; (8004874 <TP_Read_AD+0xc0>)
|
||
8004808: f7fd fb09 bl 8001e1e <HAL_GPIO_WritePin>
|
||
TCLK(0);
|
||
800480c: 2200 movs r2, #0
|
||
800480e: 2102 movs r1, #2
|
||
8004810: 4818 ldr r0, [pc, #96] ; (8004874 <TP_Read_AD+0xc0>)
|
||
8004812: f7fd fb04 bl 8001e1e <HAL_GPIO_WritePin>
|
||
for(uint8_t count=0;count<16;count++)//����16λ����,ֻ�и�12λ��Ч
|
||
8004816: 2300 movs r3, #0
|
||
8004818: 737b strb r3, [r7, #13]
|
||
800481a: e01a b.n 8004852 <TP_Read_AD+0x9e>
|
||
{
|
||
Num<<=1;
|
||
800481c: 89fb ldrh r3, [r7, #14]
|
||
800481e: 005b lsls r3, r3, #1
|
||
8004820: 81fb strh r3, [r7, #14]
|
||
TCLK(0); //�½�����Ч
|
||
8004822: 2200 movs r2, #0
|
||
8004824: 2102 movs r1, #2
|
||
8004826: 4813 ldr r0, [pc, #76] ; (8004874 <TP_Read_AD+0xc0>)
|
||
8004828: f7fd faf9 bl 8001e1e <HAL_GPIO_WritePin>
|
||
TCLK(1);;
|
||
800482c: 2201 movs r2, #1
|
||
800482e: 2102 movs r1, #2
|
||
8004830: 4810 ldr r0, [pc, #64] ; (8004874 <TP_Read_AD+0xc0>)
|
||
8004832: f7fd faf4 bl 8001e1e <HAL_GPIO_WritePin>
|
||
if(TDOUT){Num++;}
|
||
8004836: f44f 7180 mov.w r1, #256 ; 0x100
|
||
800483a: 480f ldr r0, [pc, #60] ; (8004878 <TP_Read_AD+0xc4>)
|
||
800483c: f7fd fad8 bl 8001df0 <HAL_GPIO_ReadPin>
|
||
8004840: 4603 mov r3, r0
|
||
8004842: 2b00 cmp r3, #0
|
||
8004844: d002 beq.n 800484c <TP_Read_AD+0x98>
|
||
8004846: 89fb ldrh r3, [r7, #14]
|
||
8004848: 3301 adds r3, #1
|
||
800484a: 81fb strh r3, [r7, #14]
|
||
for(uint8_t count=0;count<16;count++)//����16λ����,ֻ�и�12λ��Ч
|
||
800484c: 7b7b ldrb r3, [r7, #13]
|
||
800484e: 3301 adds r3, #1
|
||
8004850: 737b strb r3, [r7, #13]
|
||
8004852: 7b7b ldrb r3, [r7, #13]
|
||
8004854: 2b0f cmp r3, #15
|
||
8004856: d9e1 bls.n 800481c <TP_Read_AD+0x68>
|
||
}
|
||
Num>>=4; //ֻ�и�12λ��Ч.
|
||
8004858: 89fb ldrh r3, [r7, #14]
|
||
800485a: 091b lsrs r3, r3, #4
|
||
800485c: 81fb strh r3, [r7, #14]
|
||
TCS(1); //�ͷ�Ƭѡ
|
||
800485e: 2201 movs r2, #1
|
||
8004860: 2104 movs r1, #4
|
||
8004862: 4804 ldr r0, [pc, #16] ; (8004874 <TP_Read_AD+0xc0>)
|
||
8004864: f7fd fadb bl 8001e1e <HAL_GPIO_WritePin>
|
||
return(Num);
|
||
8004868: 89fb ldrh r3, [r7, #14]
|
||
}
|
||
800486a: 4618 mov r0, r3
|
||
800486c: 3710 adds r7, #16
|
||
800486e: 46bd mov sp, r7
|
||
8004870: bd80 pop {r7, pc}
|
||
8004872: bf00 nop
|
||
8004874: 40010c00 .word 0x40010c00
|
||
8004878: 40011c00 .word 0x40011c00
|
||
|
||
0800487c <TP_Read_XOY>:
|
||
//xy:ָ�CMD_RDX/CMD_RDY��
|
||
//����ֵ:����������
|
||
#define READ_TIMES 5 //��ȡ����
|
||
#define LOST_VAL 1 //����ֵ
|
||
uint16_t TP_Read_XOY(uint8_t xy)
|
||
{
|
||
800487c: b590 push {r4, r7, lr}
|
||
800487e: b089 sub sp, #36 ; 0x24
|
||
8004880: af00 add r7, sp, #0
|
||
8004882: 4603 mov r3, r0
|
||
8004884: 71fb strb r3, [r7, #7]
|
||
uint16_t i, j;
|
||
uint16_t buf[READ_TIMES];
|
||
uint16_t sum=0;
|
||
8004886: 2300 movs r3, #0
|
||
8004888: 837b strh r3, [r7, #26]
|
||
uint16_t temp;
|
||
for(i=0;i<READ_TIMES;i++)buf[i]=TP_Read_AD(xy);
|
||
800488a: 2300 movs r3, #0
|
||
800488c: 83fb strh r3, [r7, #30]
|
||
800488e: e00f b.n 80048b0 <TP_Read_XOY+0x34>
|
||
8004890: 8bfc ldrh r4, [r7, #30]
|
||
8004892: 79fb ldrb r3, [r7, #7]
|
||
8004894: 4618 mov r0, r3
|
||
8004896: f7ff ff8d bl 80047b4 <TP_Read_AD>
|
||
800489a: 4603 mov r3, r0
|
||
800489c: 461a mov r2, r3
|
||
800489e: 0063 lsls r3, r4, #1
|
||
80048a0: f107 0120 add.w r1, r7, #32
|
||
80048a4: 440b add r3, r1
|
||
80048a6: f823 2c14 strh.w r2, [r3, #-20]
|
||
80048aa: 8bfb ldrh r3, [r7, #30]
|
||
80048ac: 3301 adds r3, #1
|
||
80048ae: 83fb strh r3, [r7, #30]
|
||
80048b0: 8bfb ldrh r3, [r7, #30]
|
||
80048b2: 2b04 cmp r3, #4
|
||
80048b4: d9ec bls.n 8004890 <TP_Read_XOY+0x14>
|
||
for(i=0;i<READ_TIMES-1; i++)//����
|
||
80048b6: 2300 movs r3, #0
|
||
80048b8: 83fb strh r3, [r7, #30]
|
||
80048ba: e03b b.n 8004934 <TP_Read_XOY+0xb8>
|
||
{
|
||
for(j=i+1;j<READ_TIMES;j++)
|
||
80048bc: 8bfb ldrh r3, [r7, #30]
|
||
80048be: 3301 adds r3, #1
|
||
80048c0: 83bb strh r3, [r7, #28]
|
||
80048c2: e031 b.n 8004928 <TP_Read_XOY+0xac>
|
||
{
|
||
if(buf[i]>buf[j])//��������
|
||
80048c4: 8bfb ldrh r3, [r7, #30]
|
||
80048c6: 005b lsls r3, r3, #1
|
||
80048c8: f107 0220 add.w r2, r7, #32
|
||
80048cc: 4413 add r3, r2
|
||
80048ce: f833 2c14 ldrh.w r2, [r3, #-20]
|
||
80048d2: 8bbb ldrh r3, [r7, #28]
|
||
80048d4: 005b lsls r3, r3, #1
|
||
80048d6: f107 0120 add.w r1, r7, #32
|
||
80048da: 440b add r3, r1
|
||
80048dc: f833 3c14 ldrh.w r3, [r3, #-20]
|
||
80048e0: 429a cmp r2, r3
|
||
80048e2: d91e bls.n 8004922 <TP_Read_XOY+0xa6>
|
||
{
|
||
temp=buf[i];
|
||
80048e4: 8bfb ldrh r3, [r7, #30]
|
||
80048e6: 005b lsls r3, r3, #1
|
||
80048e8: f107 0220 add.w r2, r7, #32
|
||
80048ec: 4413 add r3, r2
|
||
80048ee: f833 3c14 ldrh.w r3, [r3, #-20]
|
||
80048f2: 833b strh r3, [r7, #24]
|
||
buf[i]=buf[j];
|
||
80048f4: 8bbb ldrh r3, [r7, #28]
|
||
80048f6: 8bfa ldrh r2, [r7, #30]
|
||
80048f8: 005b lsls r3, r3, #1
|
||
80048fa: f107 0120 add.w r1, r7, #32
|
||
80048fe: 440b add r3, r1
|
||
8004900: f833 1c14 ldrh.w r1, [r3, #-20]
|
||
8004904: 0053 lsls r3, r2, #1
|
||
8004906: f107 0220 add.w r2, r7, #32
|
||
800490a: 4413 add r3, r2
|
||
800490c: 460a mov r2, r1
|
||
800490e: f823 2c14 strh.w r2, [r3, #-20]
|
||
buf[j]=temp;
|
||
8004912: 8bbb ldrh r3, [r7, #28]
|
||
8004914: 005b lsls r3, r3, #1
|
||
8004916: f107 0220 add.w r2, r7, #32
|
||
800491a: 4413 add r3, r2
|
||
800491c: 8b3a ldrh r2, [r7, #24]
|
||
800491e: f823 2c14 strh.w r2, [r3, #-20]
|
||
for(j=i+1;j<READ_TIMES;j++)
|
||
8004922: 8bbb ldrh r3, [r7, #28]
|
||
8004924: 3301 adds r3, #1
|
||
8004926: 83bb strh r3, [r7, #28]
|
||
8004928: 8bbb ldrh r3, [r7, #28]
|
||
800492a: 2b04 cmp r3, #4
|
||
800492c: d9ca bls.n 80048c4 <TP_Read_XOY+0x48>
|
||
for(i=0;i<READ_TIMES-1; i++)//����
|
||
800492e: 8bfb ldrh r3, [r7, #30]
|
||
8004930: 3301 adds r3, #1
|
||
8004932: 83fb strh r3, [r7, #30]
|
||
8004934: 8bfb ldrh r3, [r7, #30]
|
||
8004936: 2b03 cmp r3, #3
|
||
8004938: d9c0 bls.n 80048bc <TP_Read_XOY+0x40>
|
||
}
|
||
}
|
||
}
|
||
sum=0;
|
||
800493a: 2300 movs r3, #0
|
||
800493c: 837b strh r3, [r7, #26]
|
||
for(i=LOST_VAL;i<READ_TIMES-LOST_VAL;i++)sum+=buf[i];
|
||
800493e: 2301 movs r3, #1
|
||
8004940: 83fb strh r3, [r7, #30]
|
||
8004942: e00c b.n 800495e <TP_Read_XOY+0xe2>
|
||
8004944: 8bfb ldrh r3, [r7, #30]
|
||
8004946: 005b lsls r3, r3, #1
|
||
8004948: f107 0220 add.w r2, r7, #32
|
||
800494c: 4413 add r3, r2
|
||
800494e: f833 2c14 ldrh.w r2, [r3, #-20]
|
||
8004952: 8b7b ldrh r3, [r7, #26]
|
||
8004954: 4413 add r3, r2
|
||
8004956: 837b strh r3, [r7, #26]
|
||
8004958: 8bfb ldrh r3, [r7, #30]
|
||
800495a: 3301 adds r3, #1
|
||
800495c: 83fb strh r3, [r7, #30]
|
||
800495e: 8bfb ldrh r3, [r7, #30]
|
||
8004960: 2b03 cmp r3, #3
|
||
8004962: d9ef bls.n 8004944 <TP_Read_XOY+0xc8>
|
||
temp=sum/(READ_TIMES-2*LOST_VAL);
|
||
8004964: 8b7b ldrh r3, [r7, #26]
|
||
8004966: 4a05 ldr r2, [pc, #20] ; (800497c <TP_Read_XOY+0x100>)
|
||
8004968: fba2 2303 umull r2, r3, r2, r3
|
||
800496c: 085b lsrs r3, r3, #1
|
||
800496e: 833b strh r3, [r7, #24]
|
||
return temp;
|
||
8004970: 8b3b ldrh r3, [r7, #24]
|
||
}
|
||
8004972: 4618 mov r0, r3
|
||
8004974: 3724 adds r7, #36 ; 0x24
|
||
8004976: 46bd mov sp, r7
|
||
8004978: bd90 pop {r4, r7, pc}
|
||
800497a: bf00 nop
|
||
800497c: aaaaaaab .word 0xaaaaaaab
|
||
|
||
08004980 <TP_Read_XY_ADC>:
|
||
|
||
//��ȡx,y����
|
||
//x,y:��ȡ��������ADCֵ
|
||
void TP_Read_XY_ADC(int16_t *x,int16_t *y)
|
||
{
|
||
8004980: b580 push {r7, lr}
|
||
8004982: b084 sub sp, #16
|
||
8004984: af00 add r7, sp, #0
|
||
8004986: 6078 str r0, [r7, #4]
|
||
8004988: 6039 str r1, [r7, #0]
|
||
int16_t xtemp,ytemp;
|
||
xtemp=TP_Read_XOY(CMD_RDX);
|
||
800498a: 2090 movs r0, #144 ; 0x90
|
||
800498c: f7ff ff76 bl 800487c <TP_Read_XOY>
|
||
8004990: 4603 mov r3, r0
|
||
8004992: 81fb strh r3, [r7, #14]
|
||
ytemp=TP_Read_XOY(CMD_RDY);
|
||
8004994: 20d0 movs r0, #208 ; 0xd0
|
||
8004996: f7ff ff71 bl 800487c <TP_Read_XOY>
|
||
800499a: 4603 mov r3, r0
|
||
800499c: 81bb strh r3, [r7, #12]
|
||
*x=xtemp;
|
||
800499e: 687b ldr r3, [r7, #4]
|
||
80049a0: 89fa ldrh r2, [r7, #14]
|
||
80049a2: 801a strh r2, [r3, #0]
|
||
*y=ytemp;
|
||
80049a4: 683b ldr r3, [r7, #0]
|
||
80049a6: 89ba ldrh r2, [r7, #12]
|
||
80049a8: 801a strh r2, [r3, #0]
|
||
}
|
||
80049aa: bf00 nop
|
||
80049ac: 3710 adds r7, #16
|
||
80049ae: 46bd mov sp, r7
|
||
80049b0: bd80 pop {r7, pc}
|
||
|
||
080049b2 <TP_Read_XY2>:
|
||
//�ú����ܴ�������ȷ��
|
||
//x,y:��ȡ��������ֵ
|
||
//����ֵ:0,ʧ��;1,�ɹ���
|
||
#define ERR_RANGE 10 //���Χ
|
||
uint8_t TP_Read_XY2(int16_t *x,int16_t *y)
|
||
{
|
||
80049b2: b580 push {r7, lr}
|
||
80049b4: b084 sub sp, #16
|
||
80049b6: af00 add r7, sp, #0
|
||
80049b8: 6078 str r0, [r7, #4]
|
||
80049ba: 6039 str r1, [r7, #0]
|
||
int16_t x1,y1;
|
||
int16_t x2,y2;
|
||
|
||
TP_Read_XY_ADC(&x1,&y1);
|
||
80049bc: f107 020c add.w r2, r7, #12
|
||
80049c0: f107 030e add.w r3, r7, #14
|
||
80049c4: 4611 mov r1, r2
|
||
80049c6: 4618 mov r0, r3
|
||
80049c8: f7ff ffda bl 8004980 <TP_Read_XY_ADC>
|
||
|
||
TP_Read_XY_ADC(&x2,&y2);
|
||
80049cc: f107 0208 add.w r2, r7, #8
|
||
80049d0: f107 030a add.w r3, r7, #10
|
||
80049d4: 4611 mov r1, r2
|
||
80049d6: 4618 mov r0, r3
|
||
80049d8: f7ff ffd2 bl 8004980 <TP_Read_XY_ADC>
|
||
|
||
if(((x2<=x1&&x1<x2+ERR_RANGE)||(x1<=x2&&x2<x1+ERR_RANGE))//ǰ�����β�����+-50��
|
||
80049dc: f9b7 200a ldrsh.w r2, [r7, #10]
|
||
80049e0: f9b7 300e ldrsh.w r3, [r7, #14]
|
||
80049e4: 429a cmp r2, r3
|
||
80049e6: dc06 bgt.n 80049f6 <TP_Read_XY2+0x44>
|
||
80049e8: f9b7 300a ldrsh.w r3, [r7, #10]
|
||
80049ec: 3309 adds r3, #9
|
||
80049ee: f9b7 200e ldrsh.w r2, [r7, #14]
|
||
80049f2: 4293 cmp r3, r2
|
||
80049f4: da0c bge.n 8004a10 <TP_Read_XY2+0x5e>
|
||
80049f6: f9b7 200e ldrsh.w r2, [r7, #14]
|
||
80049fa: f9b7 300a ldrsh.w r3, [r7, #10]
|
||
80049fe: 429a cmp r2, r3
|
||
8004a00: dc3a bgt.n 8004a78 <TP_Read_XY2+0xc6>
|
||
8004a02: f9b7 300e ldrsh.w r3, [r7, #14]
|
||
8004a06: 3309 adds r3, #9
|
||
8004a08: f9b7 200a ldrsh.w r2, [r7, #10]
|
||
8004a0c: 4293 cmp r3, r2
|
||
8004a0e: db33 blt.n 8004a78 <TP_Read_XY2+0xc6>
|
||
&&((y2<=y1&&y1<y2+ERR_RANGE)||(y1<=y2&&y2<y1+ERR_RANGE)))
|
||
8004a10: f9b7 2008 ldrsh.w r2, [r7, #8]
|
||
8004a14: f9b7 300c ldrsh.w r3, [r7, #12]
|
||
8004a18: 429a cmp r2, r3
|
||
8004a1a: dc06 bgt.n 8004a2a <TP_Read_XY2+0x78>
|
||
8004a1c: f9b7 3008 ldrsh.w r3, [r7, #8]
|
||
8004a20: 3309 adds r3, #9
|
||
8004a22: f9b7 200c ldrsh.w r2, [r7, #12]
|
||
8004a26: 4293 cmp r3, r2
|
||
8004a28: da0c bge.n 8004a44 <TP_Read_XY2+0x92>
|
||
8004a2a: f9b7 200c ldrsh.w r2, [r7, #12]
|
||
8004a2e: f9b7 3008 ldrsh.w r3, [r7, #8]
|
||
8004a32: 429a cmp r2, r3
|
||
8004a34: dc20 bgt.n 8004a78 <TP_Read_XY2+0xc6>
|
||
8004a36: f9b7 300c ldrsh.w r3, [r7, #12]
|
||
8004a3a: 3309 adds r3, #9
|
||
8004a3c: f9b7 2008 ldrsh.w r2, [r7, #8]
|
||
8004a40: 4293 cmp r3, r2
|
||
8004a42: db19 blt.n 8004a78 <TP_Read_XY2+0xc6>
|
||
{
|
||
*x=(x1+x2)/2;
|
||
8004a44: f9b7 300e ldrsh.w r3, [r7, #14]
|
||
8004a48: 461a mov r2, r3
|
||
8004a4a: f9b7 300a ldrsh.w r3, [r7, #10]
|
||
8004a4e: 4413 add r3, r2
|
||
8004a50: 0fda lsrs r2, r3, #31
|
||
8004a52: 4413 add r3, r2
|
||
8004a54: 105b asrs r3, r3, #1
|
||
8004a56: b21a sxth r2, r3
|
||
8004a58: 687b ldr r3, [r7, #4]
|
||
8004a5a: 801a strh r2, [r3, #0]
|
||
*y=(y1+y2)/2;
|
||
8004a5c: f9b7 300c ldrsh.w r3, [r7, #12]
|
||
8004a60: 461a mov r2, r3
|
||
8004a62: f9b7 3008 ldrsh.w r3, [r7, #8]
|
||
8004a66: 4413 add r3, r2
|
||
8004a68: 0fda lsrs r2, r3, #31
|
||
8004a6a: 4413 add r3, r2
|
||
8004a6c: 105b asrs r3, r3, #1
|
||
8004a6e: b21a sxth r2, r3
|
||
8004a70: 683b ldr r3, [r7, #0]
|
||
8004a72: 801a strh r2, [r3, #0]
|
||
return 1;
|
||
8004a74: 2301 movs r3, #1
|
||
8004a76: e000 b.n 8004a7a <TP_Read_XY2+0xc8>
|
||
}else return 0;
|
||
8004a78: 2300 movs r3, #0
|
||
}
|
||
8004a7a: 4618 mov r0, r3
|
||
8004a7c: 3710 adds r7, #16
|
||
8004a7e: 46bd mov sp, r7
|
||
8004a80: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08004a84 <TP_Server>:
|
||
touch_device t0;// t0 yyds~
|
||
touch_config tconfig;
|
||
//�������·�����״̬��д����ѭ����ȡ����
|
||
void TP_Server()
|
||
{
|
||
8004a84: b598 push {r3, r4, r7, lr}
|
||
8004a86: af00 add r7, sp, #0
|
||
if(TPEN==0) //�������
|
||
8004a88: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004a8c: 4835 ldr r0, [pc, #212] ; (8004b64 <TP_Server+0xe0>)
|
||
8004a8e: f7fd f9af bl 8001df0 <HAL_GPIO_ReadPin>
|
||
8004a92: 4603 mov r3, r0
|
||
8004a94: 2b00 cmp r3, #0
|
||
8004a96: d155 bne.n 8004b44 <TP_Server+0xc0>
|
||
{
|
||
if(TP_Read_XY2(&t0.adc_x,&t0.adc_y))
|
||
8004a98: 4933 ldr r1, [pc, #204] ; (8004b68 <TP_Server+0xe4>)
|
||
8004a9a: 4834 ldr r0, [pc, #208] ; (8004b6c <TP_Server+0xe8>)
|
||
8004a9c: f7ff ff89 bl 80049b2 <TP_Read_XY2>
|
||
8004aa0: 4603 mov r3, r0
|
||
8004aa2: 2b00 cmp r3, #0
|
||
8004aa4: d043 beq.n 8004b2e <TP_Server+0xaa>
|
||
{//�ȶ�ȡadֵ
|
||
t0.pix_x=(t0.adc_x/tconfig.x_acc)-tconfig.x_offset;//ת��Ϊ��������
|
||
8004aa6: 4b31 ldr r3, [pc, #196] ; (8004b6c <TP_Server+0xe8>)
|
||
8004aa8: 881b ldrh r3, [r3, #0]
|
||
8004aaa: 4618 mov r0, r3
|
||
8004aac: f7fc f962 bl 8000d74 <__aeabi_i2f>
|
||
8004ab0: 4602 mov r2, r0
|
||
8004ab2: 4b2f ldr r3, [pc, #188] ; (8004b70 <TP_Server+0xec>)
|
||
8004ab4: 685b ldr r3, [r3, #4]
|
||
8004ab6: 4619 mov r1, r3
|
||
8004ab8: 4610 mov r0, r2
|
||
8004aba: f7fc fa63 bl 8000f84 <__aeabi_fdiv>
|
||
8004abe: 4603 mov r3, r0
|
||
8004ac0: 461c mov r4, r3
|
||
8004ac2: 4b2b ldr r3, [pc, #172] ; (8004b70 <TP_Server+0xec>)
|
||
8004ac4: 68db ldr r3, [r3, #12]
|
||
8004ac6: 4618 mov r0, r3
|
||
8004ac8: f7fc f954 bl 8000d74 <__aeabi_i2f>
|
||
8004acc: 4603 mov r3, r0
|
||
8004ace: 4619 mov r1, r3
|
||
8004ad0: 4620 mov r0, r4
|
||
8004ad2: f7fc f899 bl 8000c08 <__aeabi_fsub>
|
||
8004ad6: 4603 mov r3, r0
|
||
8004ad8: 4618 mov r0, r3
|
||
8004ada: f7fc faef bl 80010bc <__aeabi_f2iz>
|
||
8004ade: 4603 mov r3, r0
|
||
8004ae0: 4a22 ldr r2, [pc, #136] ; (8004b6c <TP_Server+0xe8>)
|
||
8004ae2: 6053 str r3, [r2, #4]
|
||
t0.pix_y=(t0.adc_y/tconfig.y_acc)-tconfig.y_offset;
|
||
8004ae4: 4b21 ldr r3, [pc, #132] ; (8004b6c <TP_Server+0xe8>)
|
||
8004ae6: 885b ldrh r3, [r3, #2]
|
||
8004ae8: 4618 mov r0, r3
|
||
8004aea: f7fc f943 bl 8000d74 <__aeabi_i2f>
|
||
8004aee: 4602 mov r2, r0
|
||
8004af0: 4b1f ldr r3, [pc, #124] ; (8004b70 <TP_Server+0xec>)
|
||
8004af2: 689b ldr r3, [r3, #8]
|
||
8004af4: 4619 mov r1, r3
|
||
8004af6: 4610 mov r0, r2
|
||
8004af8: f7fc fa44 bl 8000f84 <__aeabi_fdiv>
|
||
8004afc: 4603 mov r3, r0
|
||
8004afe: 461c mov r4, r3
|
||
8004b00: 4b1b ldr r3, [pc, #108] ; (8004b70 <TP_Server+0xec>)
|
||
8004b02: 691b ldr r3, [r3, #16]
|
||
8004b04: 4618 mov r0, r3
|
||
8004b06: f7fc f935 bl 8000d74 <__aeabi_i2f>
|
||
8004b0a: 4603 mov r3, r0
|
||
8004b0c: 4619 mov r1, r3
|
||
8004b0e: 4620 mov r0, r4
|
||
8004b10: f7fc f87a bl 8000c08 <__aeabi_fsub>
|
||
8004b14: 4603 mov r3, r0
|
||
8004b16: 4618 mov r0, r3
|
||
8004b18: f7fc fad0 bl 80010bc <__aeabi_f2iz>
|
||
8004b1c: 4603 mov r3, r0
|
||
8004b1e: 4a13 ldr r2, [pc, #76] ; (8004b6c <TP_Server+0xe8>)
|
||
8004b20: 6093 str r3, [r2, #8]
|
||
t0.d=1;
|
||
8004b22: 4a12 ldr r2, [pc, #72] ; (8004b6c <TP_Server+0xe8>)
|
||
8004b24: 7b13 ldrb r3, [r2, #12]
|
||
8004b26: f043 0304 orr.w r3, r3, #4
|
||
8004b2a: 7313 strb r3, [r2, #12]
|
||
8004b2c: e004 b.n 8004b38 <TP_Server+0xb4>
|
||
}else
|
||
{
|
||
t0.d=0;
|
||
8004b2e: 4a0f ldr r2, [pc, #60] ; (8004b6c <TP_Server+0xe8>)
|
||
8004b30: 7b13 ldrb r3, [r2, #12]
|
||
8004b32: f36f 0382 bfc r3, #2, #1
|
||
8004b36: 7313 strb r3, [r2, #12]
|
||
}
|
||
t0.c=1;
|
||
8004b38: 4a0c ldr r2, [pc, #48] ; (8004b6c <TP_Server+0xe8>)
|
||
8004b3a: 7b13 ldrb r3, [r2, #12]
|
||
8004b3c: f043 0302 orr.w r3, r3, #2
|
||
8004b40: 7313 strb r3, [r2, #12]
|
||
{
|
||
t0.c=0;
|
||
t0.pix_x=-1;
|
||
t0.pix_y=-1;
|
||
}
|
||
}
|
||
8004b42: e00c b.n 8004b5e <TP_Server+0xda>
|
||
t0.c=0;
|
||
8004b44: 4a09 ldr r2, [pc, #36] ; (8004b6c <TP_Server+0xe8>)
|
||
8004b46: 7b13 ldrb r3, [r2, #12]
|
||
8004b48: f36f 0341 bfc r3, #1, #1
|
||
8004b4c: 7313 strb r3, [r2, #12]
|
||
t0.pix_x=-1;
|
||
8004b4e: 4b07 ldr r3, [pc, #28] ; (8004b6c <TP_Server+0xe8>)
|
||
8004b50: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8004b54: 605a str r2, [r3, #4]
|
||
t0.pix_y=-1;
|
||
8004b56: 4b05 ldr r3, [pc, #20] ; (8004b6c <TP_Server+0xe8>)
|
||
8004b58: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8004b5c: 609a str r2, [r3, #8]
|
||
}
|
||
8004b5e: bf00 nop
|
||
8004b60: bd98 pop {r3, r4, r7, pc}
|
||
8004b62: bf00 nop
|
||
8004b64: 40011c00 .word 0x40011c00
|
||
8004b68: 200002e2 .word 0x200002e2
|
||
8004b6c: 200002e0 .word 0x200002e0
|
||
8004b70: 200002c8 .word 0x200002c8
|
||
|
||
08004b74 <TP_DrwaTrage>:
|
||
return 0;
|
||
}
|
||
//У�ã���һ��Ŀ������
|
||
//r=�����뾶����ʾ��Ч��
|
||
void TP_DrwaTrage(int x,int y,int r)
|
||
{
|
||
8004b74: b590 push {r4, r7, lr}
|
||
8004b76: b087 sub sp, #28
|
||
8004b78: af02 add r7, sp, #8
|
||
8004b7a: 60f8 str r0, [r7, #12]
|
||
8004b7c: 60b9 str r1, [r7, #8]
|
||
8004b7e: 607a str r2, [r7, #4]
|
||
Draw_Circle(x,y,r+1,GRAY);
|
||
8004b80: 68fb ldr r3, [r7, #12]
|
||
8004b82: b298 uxth r0, r3
|
||
8004b84: 68bb ldr r3, [r7, #8]
|
||
8004b86: b299 uxth r1, r3
|
||
8004b88: 687b ldr r3, [r7, #4]
|
||
8004b8a: b29b uxth r3, r3
|
||
8004b8c: 3301 adds r3, #1
|
||
8004b8e: b29a uxth r2, r3
|
||
8004b90: f248 4330 movw r3, #33840 ; 0x8430
|
||
8004b94: f7ff fb7f bl 8004296 <Draw_Circle>
|
||
Draw_Circle(x,y,r,RED);
|
||
8004b98: 68fb ldr r3, [r7, #12]
|
||
8004b9a: b298 uxth r0, r3
|
||
8004b9c: 68bb ldr r3, [r7, #8]
|
||
8004b9e: b299 uxth r1, r3
|
||
8004ba0: 687b ldr r3, [r7, #4]
|
||
8004ba2: b29a uxth r2, r3
|
||
8004ba4: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004ba8: f7ff fb75 bl 8004296 <Draw_Circle>
|
||
LCD_DrawLine(x,y,x+10,y,RED);
|
||
8004bac: 68fb ldr r3, [r7, #12]
|
||
8004bae: b298 uxth r0, r3
|
||
8004bb0: 68bb ldr r3, [r7, #8]
|
||
8004bb2: b299 uxth r1, r3
|
||
8004bb4: 68fb ldr r3, [r7, #12]
|
||
8004bb6: b29b uxth r3, r3
|
||
8004bb8: 330a adds r3, #10
|
||
8004bba: b29a uxth r2, r3
|
||
8004bbc: 68bb ldr r3, [r7, #8]
|
||
8004bbe: b29b uxth r3, r3
|
||
8004bc0: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
8004bc4: 9400 str r4, [sp, #0]
|
||
8004bc6: f7ff fae1 bl 800418c <LCD_DrawLine>
|
||
LCD_DrawLine(x,y,x,y+10,RED);
|
||
8004bca: 68fb ldr r3, [r7, #12]
|
||
8004bcc: b298 uxth r0, r3
|
||
8004bce: 68bb ldr r3, [r7, #8]
|
||
8004bd0: b299 uxth r1, r3
|
||
8004bd2: 68fb ldr r3, [r7, #12]
|
||
8004bd4: b29a uxth r2, r3
|
||
8004bd6: 68bb ldr r3, [r7, #8]
|
||
8004bd8: b29b uxth r3, r3
|
||
8004bda: 330a adds r3, #10
|
||
8004bdc: b29b uxth r3, r3
|
||
8004bde: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
8004be2: 9400 str r4, [sp, #0]
|
||
8004be4: f7ff fad2 bl 800418c <LCD_DrawLine>
|
||
LCD_DrawLine(x,y,x-10,y,RED);
|
||
8004be8: 68fb ldr r3, [r7, #12]
|
||
8004bea: b298 uxth r0, r3
|
||
8004bec: 68bb ldr r3, [r7, #8]
|
||
8004bee: b299 uxth r1, r3
|
||
8004bf0: 68fb ldr r3, [r7, #12]
|
||
8004bf2: b29b uxth r3, r3
|
||
8004bf4: 3b0a subs r3, #10
|
||
8004bf6: b29a uxth r2, r3
|
||
8004bf8: 68bb ldr r3, [r7, #8]
|
||
8004bfa: b29b uxth r3, r3
|
||
8004bfc: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
8004c00: 9400 str r4, [sp, #0]
|
||
8004c02: f7ff fac3 bl 800418c <LCD_DrawLine>
|
||
LCD_DrawLine(x,y,x,y-10,RED);
|
||
8004c06: 68fb ldr r3, [r7, #12]
|
||
8004c08: b298 uxth r0, r3
|
||
8004c0a: 68bb ldr r3, [r7, #8]
|
||
8004c0c: b299 uxth r1, r3
|
||
8004c0e: 68fb ldr r3, [r7, #12]
|
||
8004c10: b29a uxth r2, r3
|
||
8004c12: 68bb ldr r3, [r7, #8]
|
||
8004c14: b29b uxth r3, r3
|
||
8004c16: 3b0a subs r3, #10
|
||
8004c18: b29b uxth r3, r3
|
||
8004c1a: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
8004c1e: 9400 str r4, [sp, #0]
|
||
8004c20: f7ff fab4 bl 800418c <LCD_DrawLine>
|
||
}
|
||
8004c24: bf00 nop
|
||
8004c26: 3714 adds r7, #20
|
||
8004c28: 46bd mov sp, r7
|
||
8004c2a: bd90 pop {r4, r7, pc}
|
||
|
||
08004c2c <TP_adjustment>:
|
||
//������У
|
||
void TP_adjustment()
|
||
{
|
||
8004c2c: b5b0 push {r4, r5, r7, lr}
|
||
8004c2e: b0a4 sub sp, #144 ; 0x90
|
||
8004c30: af02 add r7, sp, #8
|
||
//�ж��Ƿ���ҪУ����eeprom��ȡ����
|
||
EEPROM_READ_BATY(16,(char *)&tconfig,sizeof(touch_config));
|
||
8004c32: 2218 movs r2, #24
|
||
8004c34: 4916 ldr r1, [pc, #88] ; (8004c90 <TP_adjustment+0x64>)
|
||
8004c36: 2010 movs r0, #16
|
||
8004c38: f7ff fd2e bl 8004698 <EEPROM_READ_BATY>
|
||
if(tconfig.begin==0xab&&tconfig.end==0xcd) //�ж�У����
|
||
8004c3c: 4b14 ldr r3, [pc, #80] ; (8004c90 <TP_adjustment+0x64>)
|
||
8004c3e: 781b ldrb r3, [r3, #0]
|
||
8004c40: 2bab cmp r3, #171 ; 0xab
|
||
8004c42: d104 bne.n 8004c4e <TP_adjustment+0x22>
|
||
8004c44: 4b12 ldr r3, [pc, #72] ; (8004c90 <TP_adjustment+0x64>)
|
||
8004c46: 7d1b ldrb r3, [r3, #20]
|
||
8004c48: 2bcd cmp r3, #205 ; 0xcd
|
||
8004c4a: f000 82a5 beq.w 8005198 <TP_adjustment+0x56c>
|
||
{
|
||
return; //�Ѿ�У����
|
||
}
|
||
//У�����Ƚϼ���ȡ4����������adֵ�����صĹ�ϵ
|
||
char str[64]; //�����ַ�����ʾ
|
||
uint16_t y_adc,x_adc,step=0,r=10; //adc���棬У���裬�����İ뾶
|
||
8004c4e: 2300 movs r3, #0
|
||
8004c50: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
8004c54: 230a movs r3, #10
|
||
8004c56: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
uint16_t y1,y2,y3,y4,x1,x2,x3,x4; //4���㻺��
|
||
int y5,x5,xd,xl,yd,yl; //ͨ��4��������xy�ij��ߺͶ̱�
|
||
float acc_x,acc_y; //�����Ĺ�ϵ����
|
||
int offset_x,offset_y; //������ƫ��
|
||
uint32_t wait=HAL_GetTick()+50000,ms100=0; //Уʱ�䣬50��û�������Զ��˳�
|
||
8004c5a: f7fc fe23 bl 80018a4 <HAL_GetTick>
|
||
8004c5e: 4603 mov r3, r0
|
||
8004c60: f503 4343 add.w r3, r3, #49920 ; 0xc300
|
||
8004c64: 3350 adds r3, #80 ; 0x50
|
||
8004c66: 673b str r3, [r7, #112] ; 0x70
|
||
8004c68: 2300 movs r3, #0
|
||
8004c6a: 66fb str r3, [r7, #108] ; 0x6c
|
||
//��ʾ�ַ�����ʾ
|
||
LCD_Clear(GRAY);
|
||
8004c6c: f248 4030 movw r0, #33840 ; 0x8430
|
||
8004c70: f7ff fa3a bl 80040e8 <LCD_Clear>
|
||
LCD_ShowString(0,50,"Calibrate the touch screen",16,RED,RED);
|
||
8004c74: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004c78: 9301 str r3, [sp, #4]
|
||
8004c7a: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004c7e: 9300 str r3, [sp, #0]
|
||
8004c80: 2310 movs r3, #16
|
||
8004c82: 4a04 ldr r2, [pc, #16] ; (8004c94 <TP_adjustment+0x68>)
|
||
8004c84: 2132 movs r1, #50 ; 0x32
|
||
8004c86: 2000 movs r0, #0
|
||
8004c88: f7ff fc2c bl 80044e4 <LCD_ShowString>
|
||
//TP_DrwaTrage(30,30,10);
|
||
//��ʼУ
|
||
while(HAL_GetTick()<wait)
|
||
8004c8c: e27c b.n 8005188 <TP_adjustment+0x55c>
|
||
8004c8e: bf00 nop
|
||
8004c90: 200002c8 .word 0x200002c8
|
||
8004c94: 08008728 .word 0x08008728
|
||
{
|
||
if(TPEN==0) //������Ļ������
|
||
8004c98: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004c9c: 48cf ldr r0, [pc, #828] ; (8004fdc <TP_adjustment+0x3b0>)
|
||
8004c9e: f7fd f8a7 bl 8001df0 <HAL_GPIO_ReadPin>
|
||
8004ca2: 4603 mov r3, r0
|
||
8004ca4: 2b00 cmp r3, #0
|
||
8004ca6: d146 bne.n 8004d36 <TP_adjustment+0x10a>
|
||
{
|
||
wait=HAL_GetTick()+50000; //����50��
|
||
8004ca8: f7fc fdfc bl 80018a4 <HAL_GetTick>
|
||
8004cac: 4603 mov r3, r0
|
||
8004cae: f503 4343 add.w r3, r3, #49920 ; 0xc300
|
||
8004cb2: 3350 adds r3, #80 ; 0x50
|
||
8004cb4: 673b str r3, [r7, #112] ; 0x70
|
||
|
||
TP_Read_XY2(&x_adc,&y_adc); //��ȡxy adֵ
|
||
8004cb6: 1cba adds r2, r7, #2
|
||
8004cb8: 463b mov r3, r7
|
||
8004cba: 4611 mov r1, r2
|
||
8004cbc: 4618 mov r0, r3
|
||
8004cbe: f7ff fe78 bl 80049b2 <TP_Read_XY2>
|
||
//��������ֵ��ʾ����
|
||
sprintf(str,"ADC_X:%04d",x_adc);
|
||
8004cc2: 883b ldrh r3, [r7, #0]
|
||
8004cc4: 461a mov r2, r3
|
||
8004cc6: 1d3b adds r3, r7, #4
|
||
8004cc8: 49c5 ldr r1, [pc, #788] ; (8004fe0 <TP_adjustment+0x3b4>)
|
||
8004cca: 4618 mov r0, r3
|
||
8004ccc: f001 fb9c bl 8006408 <siprintf>
|
||
LCD_ShowString(100, 0, str, 16, RED, GRAY);
|
||
8004cd0: 1d3a adds r2, r7, #4
|
||
8004cd2: f248 4330 movw r3, #33840 ; 0x8430
|
||
8004cd6: 9301 str r3, [sp, #4]
|
||
8004cd8: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004cdc: 9300 str r3, [sp, #0]
|
||
8004cde: 2310 movs r3, #16
|
||
8004ce0: 2100 movs r1, #0
|
||
8004ce2: 2064 movs r0, #100 ; 0x64
|
||
8004ce4: f7ff fbfe bl 80044e4 <LCD_ShowString>
|
||
sprintf(str,"ADC_Y:%04d",y_adc);
|
||
8004ce8: 887b ldrh r3, [r7, #2]
|
||
8004cea: 461a mov r2, r3
|
||
8004cec: 1d3b adds r3, r7, #4
|
||
8004cee: 49bd ldr r1, [pc, #756] ; (8004fe4 <TP_adjustment+0x3b8>)
|
||
8004cf0: 4618 mov r0, r3
|
||
8004cf2: f001 fb89 bl 8006408 <siprintf>
|
||
LCD_ShowString(100, 16, str, 16, RED, GRAY);
|
||
8004cf6: 1d3a adds r2, r7, #4
|
||
8004cf8: f248 4330 movw r3, #33840 ; 0x8430
|
||
8004cfc: 9301 str r3, [sp, #4]
|
||
8004cfe: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004d02: 9300 str r3, [sp, #0]
|
||
8004d04: 2310 movs r3, #16
|
||
8004d06: 2110 movs r1, #16
|
||
8004d08: 2064 movs r0, #100 ; 0x64
|
||
8004d0a: f7ff fbeb bl 80044e4 <LCD_ShowString>
|
||
//��Ч���뾶��ʼ����
|
||
if(HAL_GetTick()>ms100)
|
||
8004d0e: f7fc fdc9 bl 80018a4 <HAL_GetTick>
|
||
8004d12: 4602 mov r2, r0
|
||
8004d14: 6efb ldr r3, [r7, #108] ; 0x6c
|
||
8004d16: 4293 cmp r3, r2
|
||
8004d18: d20d bcs.n 8004d36 <TP_adjustment+0x10a>
|
||
{
|
||
ms100=HAL_GetTick()+100;
|
||
8004d1a: f7fc fdc3 bl 80018a4 <HAL_GetTick>
|
||
8004d1e: 4603 mov r3, r0
|
||
8004d20: 3364 adds r3, #100 ; 0x64
|
||
8004d22: 66fb str r3, [r7, #108] ; 0x6c
|
||
if(r>0){r--;}
|
||
8004d24: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004d28: 2b00 cmp r3, #0
|
||
8004d2a: d004 beq.n 8004d36 <TP_adjustment+0x10a>
|
||
8004d2c: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004d30: 3b01 subs r3, #1
|
||
8004d32: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
}
|
||
//����0�����㻭�ڣ�30��30����ʱ�뾶Ϊ10
|
||
if(step==0)
|
||
8004d36: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004d3a: 2b00 cmp r3, #0
|
||
8004d3c: d129 bne.n 8004d92 <TP_adjustment+0x166>
|
||
{
|
||
TP_DrwaTrage(30,30,r);
|
||
8004d3e: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004d42: 461a mov r2, r3
|
||
8004d44: 211e movs r1, #30
|
||
8004d46: 201e movs r0, #30
|
||
8004d48: f7ff ff14 bl 8004b74 <TP_DrwaTrage>
|
||
if(r==0)//���뾶����Ϊ0��ʱ��
|
||
8004d4c: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004d50: 2b00 cmp r3, #0
|
||
8004d52: d11e bne.n 8004d92 <TP_adjustment+0x166>
|
||
{
|
||
//������һ�����裬������������ֵ����ʾ����
|
||
step+=1;
|
||
8004d54: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004d58: 3301 adds r3, #1
|
||
8004d5a: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y1=y_adc;
|
||
8004d5e: 887b ldrh r3, [r7, #2]
|
||
8004d60: f8a7 3082 strh.w r3, [r7, #130] ; 0x82
|
||
x1=x_adc;
|
||
8004d64: 883b ldrh r3, [r7, #0]
|
||
8004d66: f8a7 307a strh.w r3, [r7, #122] ; 0x7a
|
||
sprintf(str,"point_1 x:%d y:%d",x1,y1);
|
||
8004d6a: f8b7 207a ldrh.w r2, [r7, #122] ; 0x7a
|
||
8004d6e: f8b7 3082 ldrh.w r3, [r7, #130] ; 0x82
|
||
8004d72: 1d38 adds r0, r7, #4
|
||
8004d74: 499c ldr r1, [pc, #624] ; (8004fe8 <TP_adjustment+0x3bc>)
|
||
8004d76: f001 fb47 bl 8006408 <siprintf>
|
||
LCD_ShowString(0,66,str,16,RED,RED);
|
||
8004d7a: 1d3a adds r2, r7, #4
|
||
8004d7c: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004d80: 9301 str r3, [sp, #4]
|
||
8004d82: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004d86: 9300 str r3, [sp, #0]
|
||
8004d88: 2310 movs r3, #16
|
||
8004d8a: 2142 movs r1, #66 ; 0x42
|
||
8004d8c: 2000 movs r0, #0
|
||
8004d8e: f7ff fba9 bl 80044e4 <LCD_ShowString>
|
||
}
|
||
}
|
||
//����1���ȴ���Ļ���ɿ���������һ�����裬���ð뾶
|
||
if(step==1)
|
||
8004d92: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004d96: 2b01 cmp r3, #1
|
||
8004d98: d10f bne.n 8004dba <TP_adjustment+0x18e>
|
||
{
|
||
if(TPEN==1)
|
||
8004d9a: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004d9e: 488f ldr r0, [pc, #572] ; (8004fdc <TP_adjustment+0x3b0>)
|
||
8004da0: f7fd f826 bl 8001df0 <HAL_GPIO_ReadPin>
|
||
8004da4: 4603 mov r3, r0
|
||
8004da6: 2b01 cmp r3, #1
|
||
8004da8: d107 bne.n 8004dba <TP_adjustment+0x18e>
|
||
{
|
||
step+=1;
|
||
8004daa: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004dae: 3301 adds r3, #1
|
||
8004db0: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8004db4: 230a movs r3, #10
|
||
8004db6: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
|
||
}
|
||
//���漸������������һ��
|
||
if(step==2)
|
||
8004dba: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004dbe: 2b02 cmp r3, #2
|
||
8004dc0: d12a bne.n 8004e18 <TP_adjustment+0x1ec>
|
||
{
|
||
TP_DrwaTrage(290,30,r);
|
||
8004dc2: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004dc6: 461a mov r2, r3
|
||
8004dc8: 211e movs r1, #30
|
||
8004dca: f44f 7091 mov.w r0, #290 ; 0x122
|
||
8004dce: f7ff fed1 bl 8004b74 <TP_DrwaTrage>
|
||
if(r==0)
|
||
8004dd2: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004dd6: 2b00 cmp r3, #0
|
||
8004dd8: d11e bne.n 8004e18 <TP_adjustment+0x1ec>
|
||
{
|
||
step+=1;
|
||
8004dda: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004dde: 3301 adds r3, #1
|
||
8004de0: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y2=y_adc;
|
||
8004de4: 887b ldrh r3, [r7, #2]
|
||
8004de6: f8a7 3080 strh.w r3, [r7, #128] ; 0x80
|
||
x2=x_adc;
|
||
8004dea: 883b ldrh r3, [r7, #0]
|
||
8004dec: f8a7 3078 strh.w r3, [r7, #120] ; 0x78
|
||
sprintf(str,"point_2 x:%d y:%d",x2,y2);
|
||
8004df0: f8b7 2078 ldrh.w r2, [r7, #120] ; 0x78
|
||
8004df4: f8b7 3080 ldrh.w r3, [r7, #128] ; 0x80
|
||
8004df8: 1d38 adds r0, r7, #4
|
||
8004dfa: 497c ldr r1, [pc, #496] ; (8004fec <TP_adjustment+0x3c0>)
|
||
8004dfc: f001 fb04 bl 8006408 <siprintf>
|
||
LCD_ShowString(0,66+16,str,16,RED,RED);
|
||
8004e00: 1d3a adds r2, r7, #4
|
||
8004e02: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004e06: 9301 str r3, [sp, #4]
|
||
8004e08: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004e0c: 9300 str r3, [sp, #0]
|
||
8004e0e: 2310 movs r3, #16
|
||
8004e10: 2152 movs r1, #82 ; 0x52
|
||
8004e12: 2000 movs r0, #0
|
||
8004e14: f7ff fb66 bl 80044e4 <LCD_ShowString>
|
||
}
|
||
}
|
||
if(step==3)
|
||
8004e18: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004e1c: 2b03 cmp r3, #3
|
||
8004e1e: d10f bne.n 8004e40 <TP_adjustment+0x214>
|
||
{
|
||
if(TPEN==1)
|
||
8004e20: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004e24: 486d ldr r0, [pc, #436] ; (8004fdc <TP_adjustment+0x3b0>)
|
||
8004e26: f7fc ffe3 bl 8001df0 <HAL_GPIO_ReadPin>
|
||
8004e2a: 4603 mov r3, r0
|
||
8004e2c: 2b01 cmp r3, #1
|
||
8004e2e: d107 bne.n 8004e40 <TP_adjustment+0x214>
|
||
{
|
||
step+=1;
|
||
8004e30: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004e34: 3301 adds r3, #1
|
||
8004e36: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8004e3a: 230a movs r3, #10
|
||
8004e3c: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
|
||
}
|
||
if(step==4)
|
||
8004e40: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004e44: 2b04 cmp r3, #4
|
||
8004e46: d129 bne.n 8004e9c <TP_adjustment+0x270>
|
||
{
|
||
TP_DrwaTrage(30,210,r);
|
||
8004e48: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004e4c: 461a mov r2, r3
|
||
8004e4e: 21d2 movs r1, #210 ; 0xd2
|
||
8004e50: 201e movs r0, #30
|
||
8004e52: f7ff fe8f bl 8004b74 <TP_DrwaTrage>
|
||
if(r==0)
|
||
8004e56: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004e5a: 2b00 cmp r3, #0
|
||
8004e5c: d11e bne.n 8004e9c <TP_adjustment+0x270>
|
||
{
|
||
step+=1;
|
||
8004e5e: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004e62: 3301 adds r3, #1
|
||
8004e64: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y3=y_adc;
|
||
8004e68: 887b ldrh r3, [r7, #2]
|
||
8004e6a: f8a7 307e strh.w r3, [r7, #126] ; 0x7e
|
||
x3=x_adc;
|
||
8004e6e: 883b ldrh r3, [r7, #0]
|
||
8004e70: f8a7 3076 strh.w r3, [r7, #118] ; 0x76
|
||
sprintf(str,"point_3 x:%d y:%d",x3,y3);
|
||
8004e74: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76
|
||
8004e78: f8b7 307e ldrh.w r3, [r7, #126] ; 0x7e
|
||
8004e7c: 1d38 adds r0, r7, #4
|
||
8004e7e: 495c ldr r1, [pc, #368] ; (8004ff0 <TP_adjustment+0x3c4>)
|
||
8004e80: f001 fac2 bl 8006408 <siprintf>
|
||
LCD_ShowString(0,66+16+16,str,16,RED,RED);
|
||
8004e84: 1d3a adds r2, r7, #4
|
||
8004e86: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004e8a: 9301 str r3, [sp, #4]
|
||
8004e8c: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004e90: 9300 str r3, [sp, #0]
|
||
8004e92: 2310 movs r3, #16
|
||
8004e94: 2162 movs r1, #98 ; 0x62
|
||
8004e96: 2000 movs r0, #0
|
||
8004e98: f7ff fb24 bl 80044e4 <LCD_ShowString>
|
||
}
|
||
}
|
||
if(step==5)
|
||
8004e9c: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004ea0: 2b05 cmp r3, #5
|
||
8004ea2: d10f bne.n 8004ec4 <TP_adjustment+0x298>
|
||
{
|
||
if(TPEN==1)
|
||
8004ea4: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004ea8: 484c ldr r0, [pc, #304] ; (8004fdc <TP_adjustment+0x3b0>)
|
||
8004eaa: f7fc ffa1 bl 8001df0 <HAL_GPIO_ReadPin>
|
||
8004eae: 4603 mov r3, r0
|
||
8004eb0: 2b01 cmp r3, #1
|
||
8004eb2: d107 bne.n 8004ec4 <TP_adjustment+0x298>
|
||
{
|
||
step+=1;
|
||
8004eb4: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004eb8: 3301 adds r3, #1
|
||
8004eba: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8004ebe: 230a movs r3, #10
|
||
8004ec0: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
|
||
}
|
||
if(step==6)
|
||
8004ec4: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004ec8: 2b06 cmp r3, #6
|
||
8004eca: d12a bne.n 8004f22 <TP_adjustment+0x2f6>
|
||
{
|
||
TP_DrwaTrage(290,210,r);
|
||
8004ecc: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004ed0: 461a mov r2, r3
|
||
8004ed2: 21d2 movs r1, #210 ; 0xd2
|
||
8004ed4: f44f 7091 mov.w r0, #290 ; 0x122
|
||
8004ed8: f7ff fe4c bl 8004b74 <TP_DrwaTrage>
|
||
if(r==0)
|
||
8004edc: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004ee0: 2b00 cmp r3, #0
|
||
8004ee2: d11e bne.n 8004f22 <TP_adjustment+0x2f6>
|
||
{
|
||
step+=1;
|
||
8004ee4: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004ee8: 3301 adds r3, #1
|
||
8004eea: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y4=y_adc;
|
||
8004eee: 887b ldrh r3, [r7, #2]
|
||
8004ef0: f8a7 307c strh.w r3, [r7, #124] ; 0x7c
|
||
x4=x_adc;
|
||
8004ef4: 883b ldrh r3, [r7, #0]
|
||
8004ef6: f8a7 3074 strh.w r3, [r7, #116] ; 0x74
|
||
sprintf(str,"point_4 x:%d y:%d",x4,y4);
|
||
8004efa: f8b7 2074 ldrh.w r2, [r7, #116] ; 0x74
|
||
8004efe: f8b7 307c ldrh.w r3, [r7, #124] ; 0x7c
|
||
8004f02: 1d38 adds r0, r7, #4
|
||
8004f04: 493b ldr r1, [pc, #236] ; (8004ff4 <TP_adjustment+0x3c8>)
|
||
8004f06: f001 fa7f bl 8006408 <siprintf>
|
||
LCD_ShowString(0,66+16+16+16,str,16,RED,RED);
|
||
8004f0a: 1d3a adds r2, r7, #4
|
||
8004f0c: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004f10: 9301 str r3, [sp, #4]
|
||
8004f12: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004f16: 9300 str r3, [sp, #0]
|
||
8004f18: 2310 movs r3, #16
|
||
8004f1a: 2172 movs r1, #114 ; 0x72
|
||
8004f1c: 2000 movs r0, #0
|
||
8004f1e: f7ff fae1 bl 80044e4 <LCD_ShowString>
|
||
}
|
||
}
|
||
if(step==7)
|
||
8004f22: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004f26: 2b07 cmp r3, #7
|
||
8004f28: d10f bne.n 8004f4a <TP_adjustment+0x31e>
|
||
{
|
||
if(TPEN==1)
|
||
8004f2a: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004f2e: 482b ldr r0, [pc, #172] ; (8004fdc <TP_adjustment+0x3b0>)
|
||
8004f30: f7fc ff5e bl 8001df0 <HAL_GPIO_ReadPin>
|
||
8004f34: 4603 mov r3, r0
|
||
8004f36: 2b01 cmp r3, #1
|
||
8004f38: d107 bne.n 8004f4a <TP_adjustment+0x31e>
|
||
{
|
||
step+=1;
|
||
8004f3a: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004f3e: 3301 adds r3, #1
|
||
8004f40: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8004f44: 230a movs r3, #10
|
||
8004f46: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
}
|
||
//��4������ȡ�꣬��ʼ������ϵ
|
||
if(step==8)
|
||
8004f4a: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004f4e: 2b08 cmp r3, #8
|
||
8004f50: f040 811a bne.w 8005188 <TP_adjustment+0x55c>
|
||
{
|
||
//��ʵֻ��Ҫ����������У��ͨ��ȡƽ��ֵ����xy�ij��ߺͶ̱�
|
||
xd=((x1+x3)/2);
|
||
8004f54: f8b7 207a ldrh.w r2, [r7, #122] ; 0x7a
|
||
8004f58: f8b7 3076 ldrh.w r3, [r7, #118] ; 0x76
|
||
8004f5c: 4413 add r3, r2
|
||
8004f5e: 0fda lsrs r2, r3, #31
|
||
8004f60: 4413 add r3, r2
|
||
8004f62: 105b asrs r3, r3, #1
|
||
8004f64: 66bb str r3, [r7, #104] ; 0x68
|
||
xl=((x2+x4)/2);
|
||
8004f66: f8b7 2078 ldrh.w r2, [r7, #120] ; 0x78
|
||
8004f6a: f8b7 3074 ldrh.w r3, [r7, #116] ; 0x74
|
||
8004f6e: 4413 add r3, r2
|
||
8004f70: 0fda lsrs r2, r3, #31
|
||
8004f72: 4413 add r3, r2
|
||
8004f74: 105b asrs r3, r3, #1
|
||
8004f76: 667b str r3, [r7, #100] ; 0x64
|
||
yd=((y1+y2)/2);
|
||
8004f78: f8b7 2082 ldrh.w r2, [r7, #130] ; 0x82
|
||
8004f7c: f8b7 3080 ldrh.w r3, [r7, #128] ; 0x80
|
||
8004f80: 4413 add r3, r2
|
||
8004f82: 0fda lsrs r2, r3, #31
|
||
8004f84: 4413 add r3, r2
|
||
8004f86: 105b asrs r3, r3, #1
|
||
8004f88: 663b str r3, [r7, #96] ; 0x60
|
||
yl=((y3+y4)/2);
|
||
8004f8a: f8b7 207e ldrh.w r2, [r7, #126] ; 0x7e
|
||
8004f8e: f8b7 307c ldrh.w r3, [r7, #124] ; 0x7c
|
||
8004f92: 4413 add r3, r2
|
||
8004f94: 0fda lsrs r2, r3, #31
|
||
8004f96: 4413 add r3, r2
|
||
8004f98: 105b asrs r3, r3, #1
|
||
8004f9a: 65fb str r3, [r7, #92] ; 0x5c
|
||
//����ȥ�̱߿����ٻ���һ����
|
||
x5=xl-xd;
|
||
8004f9c: 6e7a ldr r2, [r7, #100] ; 0x64
|
||
8004f9e: 6ebb ldr r3, [r7, #104] ; 0x68
|
||
8004fa0: 1ad3 subs r3, r2, r3
|
||
8004fa2: 65bb str r3, [r7, #88] ; 0x58
|
||
y5=yl-yd;
|
||
8004fa4: 6dfa ldr r2, [r7, #92] ; 0x5c
|
||
8004fa6: 6e3b ldr r3, [r7, #96] ; 0x60
|
||
8004fa8: 1ad3 subs r3, r2, r3
|
||
8004faa: 657b str r3, [r7, #84] ; 0x54
|
||
//�����������Ǹ������϶��д���������xy�㷴��
|
||
if(x5<0||y5<0)
|
||
8004fac: 6dbb ldr r3, [r7, #88] ; 0x58
|
||
8004fae: 2b00 cmp r3, #0
|
||
8004fb0: db02 blt.n 8004fb8 <TP_adjustment+0x38c>
|
||
8004fb2: 6d7b ldr r3, [r7, #84] ; 0x54
|
||
8004fb4: 2b00 cmp r3, #0
|
||
8004fb6: da21 bge.n 8004ffc <TP_adjustment+0x3d0>
|
||
{
|
||
//��ʾerror
|
||
sprintf(str,"ERROR");
|
||
8004fb8: 1d3b adds r3, r7, #4
|
||
8004fba: 490f ldr r1, [pc, #60] ; (8004ff8 <TP_adjustment+0x3cc>)
|
||
8004fbc: 4618 mov r0, r3
|
||
8004fbe: f001 fa23 bl 8006408 <siprintf>
|
||
LCD_ShowString(0,66+16+16+16+16,str,16,RED, GRAY);
|
||
8004fc2: 1d3a adds r2, r7, #4
|
||
8004fc4: f248 4330 movw r3, #33840 ; 0x8430
|
||
8004fc8: 9301 str r3, [sp, #4]
|
||
8004fca: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004fce: 9300 str r3, [sp, #0]
|
||
8004fd0: 2310 movs r3, #16
|
||
8004fd2: 2182 movs r1, #130 ; 0x82
|
||
8004fd4: 2000 movs r0, #0
|
||
8004fd6: f7ff fa85 bl 80044e4 <LCD_ShowString>
|
||
{
|
||
8004fda: e0cb b.n 8005174 <TP_adjustment+0x548>
|
||
8004fdc: 40011c00 .word 0x40011c00
|
||
8004fe0: 08008744 .word 0x08008744
|
||
8004fe4: 08008750 .word 0x08008750
|
||
8004fe8: 0800875c .word 0x0800875c
|
||
8004fec: 08008770 .word 0x08008770
|
||
8004ff0: 08008784 .word 0x08008784
|
||
8004ff4: 08008798 .word 0x08008798
|
||
8004ff8: 080087ac .word 0x080087ac
|
||
}else
|
||
{
|
||
//������ϵ����
|
||
//ad�ij���ȥ�̱��ٳ�ȥʵ����Ļ���صij����̱ߣ�260=320-30-30��180=240-30-30��
|
||
acc_x=x5/260.0;
|
||
8004ffc: 6db8 ldr r0, [r7, #88] ; 0x58
|
||
8004ffe: f7fb fa6d bl 80004dc <__aeabi_i2d>
|
||
8005002: f04f 0200 mov.w r2, #0
|
||
8005006: 4b66 ldr r3, [pc, #408] ; (80051a0 <TP_adjustment+0x574>)
|
||
8005008: f7fb fbfc bl 8000804 <__aeabi_ddiv>
|
||
800500c: 4602 mov r2, r0
|
||
800500e: 460b mov r3, r1
|
||
8005010: 4610 mov r0, r2
|
||
8005012: 4619 mov r1, r3
|
||
8005014: f7fb fda4 bl 8000b60 <__aeabi_d2f>
|
||
8005018: 4603 mov r3, r0
|
||
800501a: 653b str r3, [r7, #80] ; 0x50
|
||
acc_y=y5/180.0;
|
||
800501c: 6d78 ldr r0, [r7, #84] ; 0x54
|
||
800501e: f7fb fa5d bl 80004dc <__aeabi_i2d>
|
||
8005022: f04f 0200 mov.w r2, #0
|
||
8005026: 4b5f ldr r3, [pc, #380] ; (80051a4 <TP_adjustment+0x578>)
|
||
8005028: f7fb fbec bl 8000804 <__aeabi_ddiv>
|
||
800502c: 4602 mov r2, r0
|
||
800502e: 460b mov r3, r1
|
||
8005030: 4610 mov r0, r2
|
||
8005032: 4619 mov r1, r3
|
||
8005034: f7fb fd94 bl 8000b60 <__aeabi_d2f>
|
||
8005038: 4603 mov r3, r0
|
||
800503a: 64fb str r3, [r7, #76] ; 0x4c
|
||
//��֤���ʣ���ʵ��ֵ��ȥ��ֵ֤�͵�������ֵ����Ϊ�������㣬���Լ�������������������ƽ��ֵ
|
||
offset_x=(((xd/acc_x)-30)+((xl/acc_x)-290))/2;
|
||
800503c: 6eb8 ldr r0, [r7, #104] ; 0x68
|
||
800503e: f7fb fe99 bl 8000d74 <__aeabi_i2f>
|
||
8005042: 4603 mov r3, r0
|
||
8005044: 6d39 ldr r1, [r7, #80] ; 0x50
|
||
8005046: 4618 mov r0, r3
|
||
8005048: f7fb ff9c bl 8000f84 <__aeabi_fdiv>
|
||
800504c: 4603 mov r3, r0
|
||
800504e: 4956 ldr r1, [pc, #344] ; (80051a8 <TP_adjustment+0x57c>)
|
||
8005050: 4618 mov r0, r3
|
||
8005052: f7fb fdd9 bl 8000c08 <__aeabi_fsub>
|
||
8005056: 4603 mov r3, r0
|
||
8005058: 461c mov r4, r3
|
||
800505a: 6e78 ldr r0, [r7, #100] ; 0x64
|
||
800505c: f7fb fe8a bl 8000d74 <__aeabi_i2f>
|
||
8005060: 4603 mov r3, r0
|
||
8005062: 6d39 ldr r1, [r7, #80] ; 0x50
|
||
8005064: 4618 mov r0, r3
|
||
8005066: f7fb ff8d bl 8000f84 <__aeabi_fdiv>
|
||
800506a: 4603 mov r3, r0
|
||
800506c: 494f ldr r1, [pc, #316] ; (80051ac <TP_adjustment+0x580>)
|
||
800506e: 4618 mov r0, r3
|
||
8005070: f7fb fdca bl 8000c08 <__aeabi_fsub>
|
||
8005074: 4603 mov r3, r0
|
||
8005076: 4619 mov r1, r3
|
||
8005078: 4620 mov r0, r4
|
||
800507a: f7fb fdc7 bl 8000c0c <__addsf3>
|
||
800507e: 4603 mov r3, r0
|
||
8005080: f04f 4180 mov.w r1, #1073741824 ; 0x40000000
|
||
8005084: 4618 mov r0, r3
|
||
8005086: f7fb ff7d bl 8000f84 <__aeabi_fdiv>
|
||
800508a: 4603 mov r3, r0
|
||
800508c: 4618 mov r0, r3
|
||
800508e: f7fc f815 bl 80010bc <__aeabi_f2iz>
|
||
8005092: 4603 mov r3, r0
|
||
8005094: 64bb str r3, [r7, #72] ; 0x48
|
||
offset_y=(((yd/acc_y)-30)+((yl/acc_y)-210))/2;
|
||
8005096: 6e38 ldr r0, [r7, #96] ; 0x60
|
||
8005098: f7fb fe6c bl 8000d74 <__aeabi_i2f>
|
||
800509c: 4603 mov r3, r0
|
||
800509e: 6cf9 ldr r1, [r7, #76] ; 0x4c
|
||
80050a0: 4618 mov r0, r3
|
||
80050a2: f7fb ff6f bl 8000f84 <__aeabi_fdiv>
|
||
80050a6: 4603 mov r3, r0
|
||
80050a8: 493f ldr r1, [pc, #252] ; (80051a8 <TP_adjustment+0x57c>)
|
||
80050aa: 4618 mov r0, r3
|
||
80050ac: f7fb fdac bl 8000c08 <__aeabi_fsub>
|
||
80050b0: 4603 mov r3, r0
|
||
80050b2: 461c mov r4, r3
|
||
80050b4: 6df8 ldr r0, [r7, #92] ; 0x5c
|
||
80050b6: f7fb fe5d bl 8000d74 <__aeabi_i2f>
|
||
80050ba: 4603 mov r3, r0
|
||
80050bc: 6cf9 ldr r1, [r7, #76] ; 0x4c
|
||
80050be: 4618 mov r0, r3
|
||
80050c0: f7fb ff60 bl 8000f84 <__aeabi_fdiv>
|
||
80050c4: 4603 mov r3, r0
|
||
80050c6: 493a ldr r1, [pc, #232] ; (80051b0 <TP_adjustment+0x584>)
|
||
80050c8: 4618 mov r0, r3
|
||
80050ca: f7fb fd9d bl 8000c08 <__aeabi_fsub>
|
||
80050ce: 4603 mov r3, r0
|
||
80050d0: 4619 mov r1, r3
|
||
80050d2: 4620 mov r0, r4
|
||
80050d4: f7fb fd9a bl 8000c0c <__addsf3>
|
||
80050d8: 4603 mov r3, r0
|
||
80050da: f04f 4180 mov.w r1, #1073741824 ; 0x40000000
|
||
80050de: 4618 mov r0, r3
|
||
80050e0: f7fb ff50 bl 8000f84 <__aeabi_fdiv>
|
||
80050e4: 4603 mov r3, r0
|
||
80050e6: 4618 mov r0, r3
|
||
80050e8: f7fb ffe8 bl 80010bc <__aeabi_f2iz>
|
||
80050ec: 4603 mov r3, r0
|
||
80050ee: 647b str r3, [r7, #68] ; 0x44
|
||
//������������
|
||
tconfig.x_acc=acc_x;
|
||
80050f0: 4a30 ldr r2, [pc, #192] ; (80051b4 <TP_adjustment+0x588>)
|
||
80050f2: 6d3b ldr r3, [r7, #80] ; 0x50
|
||
80050f4: 6053 str r3, [r2, #4]
|
||
tconfig.x_offset=offset_x;
|
||
80050f6: 4a2f ldr r2, [pc, #188] ; (80051b4 <TP_adjustment+0x588>)
|
||
80050f8: 6cbb ldr r3, [r7, #72] ; 0x48
|
||
80050fa: 60d3 str r3, [r2, #12]
|
||
tconfig.y_acc=acc_y;
|
||
80050fc: 4a2d ldr r2, [pc, #180] ; (80051b4 <TP_adjustment+0x588>)
|
||
80050fe: 6cfb ldr r3, [r7, #76] ; 0x4c
|
||
8005100: 6093 str r3, [r2, #8]
|
||
tconfig.y_offset=offset_y;
|
||
8005102: 4a2c ldr r2, [pc, #176] ; (80051b4 <TP_adjustment+0x588>)
|
||
8005104: 6c7b ldr r3, [r7, #68] ; 0x44
|
||
8005106: 6113 str r3, [r2, #16]
|
||
//eeprom������
|
||
tconfig.begin=0xab;
|
||
8005108: 4b2a ldr r3, [pc, #168] ; (80051b4 <TP_adjustment+0x588>)
|
||
800510a: 22ab movs r2, #171 ; 0xab
|
||
800510c: 701a strb r2, [r3, #0]
|
||
tconfig.end=0xcd;
|
||
800510e: 4b29 ldr r3, [pc, #164] ; (80051b4 <TP_adjustment+0x588>)
|
||
8005110: 22cd movs r2, #205 ; 0xcd
|
||
8005112: 751a strb r2, [r3, #20]
|
||
|
||
//��ʾ��������
|
||
sprintf(str,"x_acc=%f y_acc=%f",acc_x,acc_y);
|
||
8005114: 6d38 ldr r0, [r7, #80] ; 0x50
|
||
8005116: f7fb f9f3 bl 8000500 <__aeabi_f2d>
|
||
800511a: 4604 mov r4, r0
|
||
800511c: 460d mov r5, r1
|
||
800511e: 6cf8 ldr r0, [r7, #76] ; 0x4c
|
||
8005120: f7fb f9ee bl 8000500 <__aeabi_f2d>
|
||
8005124: 4602 mov r2, r0
|
||
8005126: 460b mov r3, r1
|
||
8005128: 1d38 adds r0, r7, #4
|
||
800512a: e9cd 2300 strd r2, r3, [sp]
|
||
800512e: 4622 mov r2, r4
|
||
8005130: 462b mov r3, r5
|
||
8005132: 4921 ldr r1, [pc, #132] ; (80051b8 <TP_adjustment+0x58c>)
|
||
8005134: f001 f968 bl 8006408 <siprintf>
|
||
LCD_ShowString(0,66+16+16+16+16,str,16,RED,RED);
|
||
8005138: 1d3a adds r2, r7, #4
|
||
800513a: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
800513e: 9301 str r3, [sp, #4]
|
||
8005140: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8005144: 9300 str r3, [sp, #0]
|
||
8005146: 2310 movs r3, #16
|
||
8005148: 2182 movs r1, #130 ; 0x82
|
||
800514a: 2000 movs r0, #0
|
||
800514c: f7ff f9ca bl 80044e4 <LCD_ShowString>
|
||
sprintf(str,"x_offset=%d y_offset=%d",offset_x,offset_y);
|
||
8005150: 1d38 adds r0, r7, #4
|
||
8005152: 6c7b ldr r3, [r7, #68] ; 0x44
|
||
8005154: 6cba ldr r2, [r7, #72] ; 0x48
|
||
8005156: 4919 ldr r1, [pc, #100] ; (80051bc <TP_adjustment+0x590>)
|
||
8005158: f001 f956 bl 8006408 <siprintf>
|
||
LCD_ShowString(0,66+16+16+16+16+16,str,16,RED,RED);
|
||
800515c: 1d3a adds r2, r7, #4
|
||
800515e: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8005162: 9301 str r3, [sp, #4]
|
||
8005164: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8005168: 9300 str r3, [sp, #0]
|
||
800516a: 2310 movs r3, #16
|
||
800516c: 2192 movs r1, #146 ; 0x92
|
||
800516e: 2000 movs r0, #0
|
||
8005170: f7ff f9b8 bl 80044e4 <LCD_ShowString>
|
||
|
||
}
|
||
//��������������
|
||
EEPROM_WRITE_BATY(16,(char *)&tconfig,sizeof(touch_config));
|
||
8005174: 2218 movs r2, #24
|
||
8005176: 490f ldr r1, [pc, #60] ; (80051b4 <TP_adjustment+0x588>)
|
||
8005178: 2010 movs r0, #16
|
||
800517a: f7ff fa9f bl 80046bc <EEPROM_WRITE_BATY>
|
||
HAL_Delay(1000);
|
||
800517e: f44f 707a mov.w r0, #1000 ; 0x3e8
|
||
8005182: f7fc fb99 bl 80018b8 <HAL_Delay>
|
||
return;
|
||
8005186: e008 b.n 800519a <TP_adjustment+0x56e>
|
||
while(HAL_GetTick()<wait)
|
||
8005188: f7fc fb8c bl 80018a4 <HAL_GetTick>
|
||
800518c: 4602 mov r2, r0
|
||
800518e: 6f3b ldr r3, [r7, #112] ; 0x70
|
||
8005190: 4293 cmp r3, r2
|
||
8005192: f63f ad81 bhi.w 8004c98 <TP_adjustment+0x6c>
|
||
8005196: e000 b.n 800519a <TP_adjustment+0x56e>
|
||
return; //�Ѿ�У����
|
||
8005198: bf00 nop
|
||
|
||
}
|
||
}
|
||
|
||
}
|
||
800519a: 3788 adds r7, #136 ; 0x88
|
||
800519c: 46bd mov sp, r7
|
||
800519e: bdb0 pop {r4, r5, r7, pc}
|
||
80051a0: 40704000 .word 0x40704000
|
||
80051a4: 40668000 .word 0x40668000
|
||
80051a8: 41f00000 .word 0x41f00000
|
||
80051ac: 43910000 .word 0x43910000
|
||
80051b0: 43520000 .word 0x43520000
|
||
80051b4: 200002c8 .word 0x200002c8
|
||
80051b8: 080087b4 .word 0x080087b4
|
||
80051bc: 080087c8 .word 0x080087c8
|
||
|
||
080051c0 <main_app>:
|
||
extern touch_device t0;
|
||
|
||
task run_loop;//��ѭ��״̬��
|
||
|
||
void main_app()
|
||
{
|
||
80051c0: b580 push {r7, lr}
|
||
80051c2: b096 sub sp, #88 ; 0x58
|
||
80051c4: af04 add r7, sp, #16
|
||
char str[64];
|
||
LCDx_Init();
|
||
80051c6: f7fe fde9 bl 8003d9c <LCDx_Init>
|
||
EPPROM_SLOWWRITE_INIT();
|
||
80051ca: f7ff fa05 bl 80045d8 <EPPROM_SLOWWRITE_INIT>
|
||
|
||
TP_adjustment();
|
||
80051ce: f7ff fd2d bl 8004c2c <TP_adjustment>
|
||
|
||
|
||
UI *ui=UI_Init(BLACK);
|
||
80051d2: 2000 movs r0, #0
|
||
80051d4: f000 f8a0 bl 8005318 <UI_Init>
|
||
80051d8: 6478 str r0, [r7, #68] ; 0x44
|
||
|
||
New_Window(ui,10,10,100,100,WHITE,"WHITE");
|
||
80051da: 4b34 ldr r3, [pc, #208] ; (80052ac <main_app+0xec>)
|
||
80051dc: 9302 str r3, [sp, #8]
|
||
80051de: f64f 73ff movw r3, #65535 ; 0xffff
|
||
80051e2: 9301 str r3, [sp, #4]
|
||
80051e4: 2364 movs r3, #100 ; 0x64
|
||
80051e6: 9300 str r3, [sp, #0]
|
||
80051e8: 2364 movs r3, #100 ; 0x64
|
||
80051ea: 220a movs r2, #10
|
||
80051ec: 210a movs r1, #10
|
||
80051ee: 6c78 ldr r0, [r7, #68] ; 0x44
|
||
80051f0: f000 f8c5 bl 800537e <New_Window>
|
||
New_Window(ui,25,30,150,100,GREEN,"GREEN");
|
||
80051f4: 4b2e ldr r3, [pc, #184] ; (80052b0 <main_app+0xf0>)
|
||
80051f6: 9302 str r3, [sp, #8]
|
||
80051f8: f44f 63fc mov.w r3, #2016 ; 0x7e0
|
||
80051fc: 9301 str r3, [sp, #4]
|
||
80051fe: 2364 movs r3, #100 ; 0x64
|
||
8005200: 9300 str r3, [sp, #0]
|
||
8005202: 2396 movs r3, #150 ; 0x96
|
||
8005204: 221e movs r2, #30
|
||
8005206: 2119 movs r1, #25
|
||
8005208: 6c78 ldr r0, [r7, #68] ; 0x44
|
||
800520a: f000 f8b8 bl 800537e <New_Window>
|
||
New_Window(ui,80,80,60,90,YELLOW,"YELLOW");
|
||
800520e: 4b29 ldr r3, [pc, #164] ; (80052b4 <main_app+0xf4>)
|
||
8005210: 9302 str r3, [sp, #8]
|
||
8005212: f64f 73e0 movw r3, #65504 ; 0xffe0
|
||
8005216: 9301 str r3, [sp, #4]
|
||
8005218: 235a movs r3, #90 ; 0x5a
|
||
800521a: 9300 str r3, [sp, #0]
|
||
800521c: 233c movs r3, #60 ; 0x3c
|
||
800521e: 2250 movs r2, #80 ; 0x50
|
||
8005220: 2150 movs r1, #80 ; 0x50
|
||
8005222: 6c78 ldr r0, [r7, #68] ; 0x44
|
||
8005224: f000 f8ab bl 800537e <New_Window>
|
||
New_Window(ui,120,90,70,60,MAGENTA,"MAGENTA");
|
||
8005228: 4b23 ldr r3, [pc, #140] ; (80052b8 <main_app+0xf8>)
|
||
800522a: 9302 str r3, [sp, #8]
|
||
800522c: f64f 031f movw r3, #63519 ; 0xf81f
|
||
8005230: 9301 str r3, [sp, #4]
|
||
8005232: 233c movs r3, #60 ; 0x3c
|
||
8005234: 9300 str r3, [sp, #0]
|
||
8005236: 2346 movs r3, #70 ; 0x46
|
||
8005238: 225a movs r2, #90 ; 0x5a
|
||
800523a: 2178 movs r1, #120 ; 0x78
|
||
800523c: 6c78 ldr r0, [r7, #68] ; 0x44
|
||
800523e: f000 f89e bl 800537e <New_Window>
|
||
|
||
ui->refresh_ui_flag=1;
|
||
8005242: 6c7a ldr r2, [r7, #68] ; 0x44
|
||
8005244: f892 3020 ldrb.w r3, [r2, #32]
|
||
8005248: f043 0304 orr.w r3, r3, #4
|
||
800524c: f882 3020 strb.w r3, [r2, #32]
|
||
|
||
while(1)
|
||
{
|
||
LCD_set_dot(t0.pix_x, t0.pix_y, RED);
|
||
8005250: 4b1a ldr r3, [pc, #104] ; (80052bc <main_app+0xfc>)
|
||
8005252: 685b ldr r3, [r3, #4]
|
||
8005254: b29b uxth r3, r3
|
||
8005256: 4a19 ldr r2, [pc, #100] ; (80052bc <main_app+0xfc>)
|
||
8005258: 6892 ldr r2, [r2, #8]
|
||
800525a: b291 uxth r1, r2
|
||
800525c: f44f 4278 mov.w r2, #63488 ; 0xf800
|
||
8005260: 4618 mov r0, r3
|
||
8005262: f7fe ff21 bl 80040a8 <LCD_set_dot>
|
||
sprintf(str,"%04d\n%04d\n%04d",t0.pix_x,t0.pix_y,t0.c);
|
||
8005266: 4b15 ldr r3, [pc, #84] ; (80052bc <main_app+0xfc>)
|
||
8005268: 685a ldr r2, [r3, #4]
|
||
800526a: 4b14 ldr r3, [pc, #80] ; (80052bc <main_app+0xfc>)
|
||
800526c: 6899 ldr r1, [r3, #8]
|
||
800526e: 4b13 ldr r3, [pc, #76] ; (80052bc <main_app+0xfc>)
|
||
8005270: 7b1b ldrb r3, [r3, #12]
|
||
8005272: f3c3 0340 ubfx r3, r3, #1, #1
|
||
8005276: b2db uxtb r3, r3
|
||
8005278: 1d38 adds r0, r7, #4
|
||
800527a: 9300 str r3, [sp, #0]
|
||
800527c: 460b mov r3, r1
|
||
800527e: 4910 ldr r1, [pc, #64] ; (80052c0 <main_app+0x100>)
|
||
8005280: f001 f8c2 bl 8006408 <siprintf>
|
||
LCD_ShowString(0, 0, &str, 16, RED, BLUE);
|
||
8005284: 1d3a adds r2, r7, #4
|
||
8005286: 231f movs r3, #31
|
||
8005288: 9301 str r3, [sp, #4]
|
||
800528a: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
800528e: 9300 str r3, [sp, #0]
|
||
8005290: 2310 movs r3, #16
|
||
8005292: 2100 movs r1, #0
|
||
8005294: 2000 movs r0, #0
|
||
8005296: f7ff f925 bl 80044e4 <LCD_ShowString>
|
||
{
|
||
|
||
|
||
}
|
||
*/
|
||
UI_Server(ui);
|
||
800529a: 6c78 ldr r0, [r7, #68] ; 0x44
|
||
800529c: f000 fa5e bl 800575c <UI_Server>
|
||
TP_Server();
|
||
80052a0: f7ff fbf0 bl 8004a84 <TP_Server>
|
||
EEPROM_SLOWWRITE_SERVER();
|
||
80052a4: f7ff f9b2 bl 800460c <EEPROM_SLOWWRITE_SERVER>
|
||
{
|
||
80052a8: e7d2 b.n 8005250 <main_app+0x90>
|
||
80052aa: bf00 nop
|
||
80052ac: 080087e0 .word 0x080087e0
|
||
80052b0: 080087e8 .word 0x080087e8
|
||
80052b4: 080087f0 .word 0x080087f0
|
||
80052b8: 080087f8 .word 0x080087f8
|
||
80052bc: 200002e0 .word 0x200002e0
|
||
80052c0: 08008800 .word 0x08008800
|
||
|
||
080052c4 <Inteface_SetCursor>:
|
||
#include "touch.h"
|
||
extern touch_device t0;
|
||
//�ӿ�
|
||
//������Ļ��������
|
||
void Inteface_SetCursor(uint16_t Xpos, uint16_t Ypos)
|
||
{
|
||
80052c4: b580 push {r7, lr}
|
||
80052c6: b082 sub sp, #8
|
||
80052c8: af00 add r7, sp, #0
|
||
80052ca: 4603 mov r3, r0
|
||
80052cc: 460a mov r2, r1
|
||
80052ce: 80fb strh r3, [r7, #6]
|
||
80052d0: 4613 mov r3, r2
|
||
80052d2: 80bb strh r3, [r7, #4]
|
||
LCD_SetCursor(Xpos,Ypos); //���ù���λ��
|
||
80052d4: 88ba ldrh r2, [r7, #4]
|
||
80052d6: 88fb ldrh r3, [r7, #6]
|
||
80052d8: 4611 mov r1, r2
|
||
80052da: 4618 mov r0, r3
|
||
80052dc: f7fe fe54 bl 8003f88 <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
80052e0: 4b04 ldr r3, [pc, #16] ; (80052f4 <Inteface_SetCursor+0x30>)
|
||
80052e2: 79da ldrb r2, [r3, #7]
|
||
80052e4: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
80052e8: b292 uxth r2, r2
|
||
80052ea: 801a strh r2, [r3, #0]
|
||
}
|
||
80052ec: bf00 nop
|
||
80052ee: 3708 adds r7, #8
|
||
80052f0: 46bd mov sp, r7
|
||
80052f2: bd80 pop {r7, pc}
|
||
80052f4: 200002a8 .word 0x200002a8
|
||
|
||
080052f8 <Inteface_SetColor>:
|
||
//����������д��һ����ɫ
|
||
void Inteface_SetColor(uint16_t color)
|
||
{
|
||
80052f8: b480 push {r7}
|
||
80052fa: b083 sub sp, #12
|
||
80052fc: af00 add r7, sp, #0
|
||
80052fe: 4603 mov r3, r0
|
||
8005300: 80fb strh r3, [r7, #6]
|
||
LCD_DATA_ADDRESS=color;
|
||
8005302: 4a04 ldr r2, [pc, #16] ; (8005314 <Inteface_SetColor+0x1c>)
|
||
8005304: 88fb ldrh r3, [r7, #6]
|
||
8005306: 8013 strh r3, [r2, #0]
|
||
}
|
||
8005308: bf00 nop
|
||
800530a: 370c adds r7, #12
|
||
800530c: 46bd mov sp, r7
|
||
800530e: bc80 pop {r7}
|
||
8005310: 4770 bx lr
|
||
8005312: bf00 nop
|
||
8005314: 6c000800 .word 0x6c000800
|
||
|
||
08005318 <UI_Init>:
|
||
//�½�һ��UI����
|
||
//��ʱ���뷨������windows�Ķ����棬ÿ�����涼����n������
|
||
UI *UI_Init(COLOR_16 background)
|
||
{
|
||
8005318: b580 push {r7, lr}
|
||
800531a: b084 sub sp, #16
|
||
800531c: af00 add r7, sp, #0
|
||
800531e: 6078 str r0, [r7, #4]
|
||
UI *ui;
|
||
ui = (UI*)malloc(sizeof(UI));
|
||
8005320: 2024 movs r0, #36 ; 0x24
|
||
8005322: f000 fb43 bl 80059ac <malloc>
|
||
8005326: 4603 mov r3, r0
|
||
8005328: 60fb str r3, [r7, #12]
|
||
if(ui!=NULL)
|
||
800532a: 68fb ldr r3, [r7, #12]
|
||
800532c: 2b00 cmp r3, #0
|
||
800532e: d021 beq.n 8005374 <UI_Init+0x5c>
|
||
{
|
||
ui->x=0;
|
||
8005330: 68fb ldr r3, [r7, #12]
|
||
8005332: 2200 movs r2, #0
|
||
8005334: 809a strh r2, [r3, #4]
|
||
ui->y=0;
|
||
8005336: 68fb ldr r3, [r7, #12]
|
||
8005338: 2200 movs r2, #0
|
||
800533a: 80da strh r2, [r3, #6]
|
||
ui->high=240;
|
||
800533c: 68fb ldr r3, [r7, #12]
|
||
800533e: 22f0 movs r2, #240 ; 0xf0
|
||
8005340: 815a strh r2, [r3, #10]
|
||
ui->width=320;
|
||
8005342: 68fb ldr r3, [r7, #12]
|
||
8005344: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8005348: 811a strh r2, [r3, #8]
|
||
ui->background=background;
|
||
800534a: 68fb ldr r3, [r7, #12]
|
||
800534c: 687a ldr r2, [r7, #4]
|
||
800534e: 601a str r2, [r3, #0]
|
||
ui->windows=NULL;
|
||
8005350: 68fb ldr r3, [r7, #12]
|
||
8005352: 2200 movs r2, #0
|
||
8005354: 60da str r2, [r3, #12]
|
||
ui->last_windows=NULL;
|
||
8005356: 68fb ldr r3, [r7, #12]
|
||
8005358: 2200 movs r2, #0
|
||
800535a: 611a str r2, [r3, #16]
|
||
ui->refresh_ui_flag=1;
|
||
800535c: 68fa ldr r2, [r7, #12]
|
||
800535e: f892 3020 ldrb.w r3, [r2, #32]
|
||
8005362: f043 0304 orr.w r3, r3, #4
|
||
8005366: f882 3020 strb.w r3, [r2, #32]
|
||
ui->moveed_windwos=NULL;
|
||
800536a: 68fb ldr r3, [r7, #12]
|
||
800536c: 2200 movs r2, #0
|
||
800536e: 615a str r2, [r3, #20]
|
||
ui->touch->acc_y=0;
|
||
|
||
}
|
||
*/
|
||
|
||
return ui;
|
||
8005370: 68fb ldr r3, [r7, #12]
|
||
8005372: e000 b.n 8005376 <UI_Init+0x5e>
|
||
}
|
||
return NULL;
|
||
8005374: 2300 movs r3, #0
|
||
|
||
}
|
||
8005376: 4618 mov r0, r3
|
||
8005378: 3710 adds r7, #16
|
||
800537a: 46bd mov sp, r7
|
||
800537c: bd80 pop {r7, pc}
|
||
|
||
0800537e <New_Window>:
|
||
//�½�һ������
|
||
//���ش��ڵ�ָ��
|
||
//�����ڹ��ص�ij��ui
|
||
window *New_Window(UI *ui,uint16_t x,uint16_t y,uint16_t width,uint16_t high,COLOR_16 background,const char *title)
|
||
{
|
||
800537e: b580 push {r7, lr}
|
||
8005380: b088 sub sp, #32
|
||
8005382: af00 add r7, sp, #0
|
||
8005384: 60f8 str r0, [r7, #12]
|
||
8005386: 4608 mov r0, r1
|
||
8005388: 4611 mov r1, r2
|
||
800538a: 461a mov r2, r3
|
||
800538c: 4603 mov r3, r0
|
||
800538e: 817b strh r3, [r7, #10]
|
||
8005390: 460b mov r3, r1
|
||
8005392: 813b strh r3, [r7, #8]
|
||
8005394: 4613 mov r3, r2
|
||
8005396: 80fb strh r3, [r7, #6]
|
||
window *temp_window;
|
||
temp_window = (window*)malloc(sizeof(window));
|
||
8005398: 201c movs r0, #28
|
||
800539a: f000 fb07 bl 80059ac <malloc>
|
||
800539e: 4603 mov r3, r0
|
||
80053a0: 617b str r3, [r7, #20]
|
||
if(temp_window!=NULL)
|
||
80053a2: 697b ldr r3, [r7, #20]
|
||
80053a4: 2b00 cmp r3, #0
|
||
80053a6: d022 beq.n 80053ee <New_Window+0x70>
|
||
{
|
||
temp_window->background=background;
|
||
80053a8: 697b ldr r3, [r7, #20]
|
||
80053aa: 6afa ldr r2, [r7, #44] ; 0x2c
|
||
80053ac: 609a str r2, [r3, #8]
|
||
temp_window->high=high;
|
||
80053ae: 697b ldr r3, [r7, #20]
|
||
80053b0: 8d3a ldrh r2, [r7, #40] ; 0x28
|
||
80053b2: 80da strh r2, [r3, #6]
|
||
temp_window->width=width;
|
||
80053b4: 697b ldr r3, [r7, #20]
|
||
80053b6: 88fa ldrh r2, [r7, #6]
|
||
80053b8: 809a strh r2, [r3, #4]
|
||
temp_window->x=x;
|
||
80053ba: 697b ldr r3, [r7, #20]
|
||
80053bc: 897a ldrh r2, [r7, #10]
|
||
80053be: 801a strh r2, [r3, #0]
|
||
temp_window->y=y;
|
||
80053c0: 697b ldr r3, [r7, #20]
|
||
80053c2: 893a ldrh r2, [r7, #8]
|
||
80053c4: 805a strh r2, [r3, #2]
|
||
for(int a=0;a<16;a++)
|
||
80053c6: 2300 movs r3, #0
|
||
80053c8: 61fb str r3, [r7, #28]
|
||
80053ca: e00c b.n 80053e6 <New_Window+0x68>
|
||
{
|
||
temp_window->title[a]=title[a];
|
||
80053cc: 69fb ldr r3, [r7, #28]
|
||
80053ce: 6b3a ldr r2, [r7, #48] ; 0x30
|
||
80053d0: 4413 add r3, r2
|
||
80053d2: 7819 ldrb r1, [r3, #0]
|
||
80053d4: 697a ldr r2, [r7, #20]
|
||
80053d6: 69fb ldr r3, [r7, #28]
|
||
80053d8: 4413 add r3, r2
|
||
80053da: 330c adds r3, #12
|
||
80053dc: 460a mov r2, r1
|
||
80053de: 701a strb r2, [r3, #0]
|
||
for(int a=0;a<16;a++)
|
||
80053e0: 69fb ldr r3, [r7, #28]
|
||
80053e2: 3301 adds r3, #1
|
||
80053e4: 61fb str r3, [r7, #28]
|
||
80053e6: 69fb ldr r3, [r7, #28]
|
||
80053e8: 2b0f cmp r3, #15
|
||
80053ea: ddef ble.n 80053cc <New_Window+0x4e>
|
||
80053ec: e001 b.n 80053f2 <New_Window+0x74>
|
||
}
|
||
}else{return NULL;}
|
||
80053ee: 2300 movs r3, #0
|
||
80053f0: e02a b.n 8005448 <New_Window+0xca>
|
||
|
||
windows_stack *temp_windows_stack;
|
||
temp_windows_stack=ui->last_windows;
|
||
80053f2: 68fb ldr r3, [r7, #12]
|
||
80053f4: 691b ldr r3, [r3, #16]
|
||
80053f6: 61bb str r3, [r7, #24]
|
||
if(temp_windows_stack==NULL)
|
||
80053f8: 69bb ldr r3, [r7, #24]
|
||
80053fa: 2b00 cmp r3, #0
|
||
80053fc: d10b bne.n 8005416 <New_Window+0x98>
|
||
{
|
||
temp_windows_stack=(windows_stack*)malloc(sizeof(windows_stack));
|
||
80053fe: 200c movs r0, #12
|
||
8005400: f000 fad4 bl 80059ac <malloc>
|
||
8005404: 4603 mov r3, r0
|
||
8005406: 61bb str r3, [r7, #24]
|
||
temp_windows_stack->up=NULL;
|
||
8005408: 69bb ldr r3, [r7, #24]
|
||
800540a: 2200 movs r2, #0
|
||
800540c: 601a str r2, [r3, #0]
|
||
ui->windows=temp_windows_stack;
|
||
800540e: 68fb ldr r3, [r7, #12]
|
||
8005410: 69ba ldr r2, [r7, #24]
|
||
8005412: 60da str r2, [r3, #12]
|
||
8005414: e00e b.n 8005434 <New_Window+0xb6>
|
||
while(temp_windows_stack->next!=NULL)
|
||
{
|
||
temp_windows_stack=temp_windows_stack->next;
|
||
}
|
||
*/
|
||
windows_stack *up=temp_windows_stack;//���ݵ�ǰ����ָ��
|
||
8005416: 69bb ldr r3, [r7, #24]
|
||
8005418: 613b str r3, [r7, #16]
|
||
temp_windows_stack->next=(windows_stack*)malloc(sizeof(windows_stack));
|
||
800541a: 200c movs r0, #12
|
||
800541c: f000 fac6 bl 80059ac <malloc>
|
||
8005420: 4603 mov r3, r0
|
||
8005422: 461a mov r2, r3
|
||
8005424: 69bb ldr r3, [r7, #24]
|
||
8005426: 609a str r2, [r3, #8]
|
||
temp_windows_stack=temp_windows_stack->next;
|
||
8005428: 69bb ldr r3, [r7, #24]
|
||
800542a: 689b ldr r3, [r3, #8]
|
||
800542c: 61bb str r3, [r7, #24]
|
||
temp_windows_stack->up=up;
|
||
800542e: 69bb ldr r3, [r7, #24]
|
||
8005430: 693a ldr r2, [r7, #16]
|
||
8005432: 601a str r2, [r3, #0]
|
||
}
|
||
temp_windows_stack->next=NULL;
|
||
8005434: 69bb ldr r3, [r7, #24]
|
||
8005436: 2200 movs r2, #0
|
||
8005438: 609a str r2, [r3, #8]
|
||
temp_windows_stack->window=temp_window;
|
||
800543a: 69bb ldr r3, [r7, #24]
|
||
800543c: 697a ldr r2, [r7, #20]
|
||
800543e: 605a str r2, [r3, #4]
|
||
|
||
ui->last_windows=temp_windows_stack;
|
||
8005440: 68fb ldr r3, [r7, #12]
|
||
8005442: 69ba ldr r2, [r7, #24]
|
||
8005444: 611a str r2, [r3, #16]
|
||
|
||
return temp_window;
|
||
8005446: 697b ldr r3, [r7, #20]
|
||
|
||
}
|
||
8005448: 4618 mov r0, r3
|
||
800544a: 3720 adds r7, #32
|
||
800544c: 46bd mov sp, r7
|
||
800544e: bd80 pop {r7, pc}
|
||
|
||
08005450 <Close_Windows_Stack>:
|
||
//�ر�ij������
|
||
//ͦ�鷳�ģ�����Ҫ�ͷŴ����ڴ棬��ҪȥuiĨ�����ڵ�ָ��
|
||
void Close_Windows_Stack(UI *ui,windows_stack *temp_windows_stack)
|
||
{
|
||
8005450: b580 push {r7, lr}
|
||
8005452: b082 sub sp, #8
|
||
8005454: af00 add r7, sp, #0
|
||
8005456: 6078 str r0, [r7, #4]
|
||
8005458: 6039 str r1, [r7, #0]
|
||
|
||
if(temp_windows_stack==ui->windows)
|
||
800545a: 687b ldr r3, [r7, #4]
|
||
800545c: 68db ldr r3, [r3, #12]
|
||
800545e: 683a ldr r2, [r7, #0]
|
||
8005460: 429a cmp r2, r3
|
||
8005462: d113 bne.n 800548c <Close_Windows_Stack+0x3c>
|
||
{
|
||
if(temp_windows_stack->next!=NULL)
|
||
8005464: 683b ldr r3, [r7, #0]
|
||
8005466: 689b ldr r3, [r3, #8]
|
||
8005468: 2b00 cmp r3, #0
|
||
800546a: d008 beq.n 800547e <Close_Windows_Stack+0x2e>
|
||
{
|
||
ui->windows=temp_windows_stack->next;
|
||
800546c: 683b ldr r3, [r7, #0]
|
||
800546e: 689a ldr r2, [r3, #8]
|
||
8005470: 687b ldr r3, [r7, #4]
|
||
8005472: 60da str r2, [r3, #12]
|
||
ui->windows->up=NULL;
|
||
8005474: 687b ldr r3, [r7, #4]
|
||
8005476: 68db ldr r3, [r3, #12]
|
||
8005478: 2200 movs r2, #0
|
||
800547a: 601a str r2, [r3, #0]
|
||
800547c: e029 b.n 80054d2 <Close_Windows_Stack+0x82>
|
||
}else
|
||
{
|
||
ui->windows=NULL;
|
||
800547e: 687b ldr r3, [r7, #4]
|
||
8005480: 2200 movs r2, #0
|
||
8005482: 60da str r2, [r3, #12]
|
||
ui->last_windows=NULL;
|
||
8005484: 687b ldr r3, [r7, #4]
|
||
8005486: 2200 movs r2, #0
|
||
8005488: 611a str r2, [r3, #16]
|
||
800548a: e022 b.n 80054d2 <Close_Windows_Stack+0x82>
|
||
}
|
||
|
||
}else if(temp_windows_stack==ui->last_windows)
|
||
800548c: 687b ldr r3, [r7, #4]
|
||
800548e: 691b ldr r3, [r3, #16]
|
||
8005490: 683a ldr r2, [r7, #0]
|
||
8005492: 429a cmp r2, r3
|
||
8005494: d113 bne.n 80054be <Close_Windows_Stack+0x6e>
|
||
{
|
||
if(temp_windows_stack->up!=NULL)
|
||
8005496: 683b ldr r3, [r7, #0]
|
||
8005498: 681b ldr r3, [r3, #0]
|
||
800549a: 2b00 cmp r3, #0
|
||
800549c: d008 beq.n 80054b0 <Close_Windows_Stack+0x60>
|
||
{
|
||
ui->last_windows=temp_windows_stack->up;
|
||
800549e: 683b ldr r3, [r7, #0]
|
||
80054a0: 681a ldr r2, [r3, #0]
|
||
80054a2: 687b ldr r3, [r7, #4]
|
||
80054a4: 611a str r2, [r3, #16]
|
||
ui->last_windows->next=NULL;
|
||
80054a6: 687b ldr r3, [r7, #4]
|
||
80054a8: 691b ldr r3, [r3, #16]
|
||
80054aa: 2200 movs r2, #0
|
||
80054ac: 609a str r2, [r3, #8]
|
||
80054ae: e010 b.n 80054d2 <Close_Windows_Stack+0x82>
|
||
}else
|
||
{
|
||
ui->windows=NULL;
|
||
80054b0: 687b ldr r3, [r7, #4]
|
||
80054b2: 2200 movs r2, #0
|
||
80054b4: 60da str r2, [r3, #12]
|
||
ui->last_windows=NULL;
|
||
80054b6: 687b ldr r3, [r7, #4]
|
||
80054b8: 2200 movs r2, #0
|
||
80054ba: 611a str r2, [r3, #16]
|
||
80054bc: e009 b.n 80054d2 <Close_Windows_Stack+0x82>
|
||
}
|
||
}else
|
||
{
|
||
temp_windows_stack->up->next=temp_windows_stack->next; //ȡ�������ڵ� �ѽڵ������²�������
|
||
80054be: 683b ldr r3, [r7, #0]
|
||
80054c0: 681b ldr r3, [r3, #0]
|
||
80054c2: 683a ldr r2, [r7, #0]
|
||
80054c4: 6892 ldr r2, [r2, #8]
|
||
80054c6: 609a str r2, [r3, #8]
|
||
temp_windows_stack->next->up=temp_windows_stack->up;
|
||
80054c8: 683b ldr r3, [r7, #0]
|
||
80054ca: 689b ldr r3, [r3, #8]
|
||
80054cc: 683a ldr r2, [r7, #0]
|
||
80054ce: 6812 ldr r2, [r2, #0]
|
||
80054d0: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
free(temp_windows_stack->window);
|
||
80054d2: 683b ldr r3, [r7, #0]
|
||
80054d4: 685b ldr r3, [r3, #4]
|
||
80054d6: 4618 mov r0, r3
|
||
80054d8: f000 fa70 bl 80059bc <free>
|
||
free(temp_windows_stack);
|
||
80054dc: 6838 ldr r0, [r7, #0]
|
||
80054de: f000 fa6d bl 80059bc <free>
|
||
|
||
|
||
|
||
}
|
||
80054e2: bf00 nop
|
||
80054e4: 3708 adds r7, #8
|
||
80054e6: 46bd mov sp, r7
|
||
80054e8: bd80 pop {r7, pc}
|
||
|
||
080054ea <Refresh_Window>:
|
||
temp_window->y=temp_window->y+acc_y;
|
||
}
|
||
|
||
//��ʾһ������
|
||
void Refresh_Window(window *temp_window)
|
||
{
|
||
80054ea: b580 push {r7, lr}
|
||
80054ec: b086 sub sp, #24
|
||
80054ee: af02 add r7, sp, #8
|
||
80054f0: 6078 str r0, [r7, #4]
|
||
//��ʼ���ƴ���//���䴰�ڱ���
|
||
for(uint16_t temp_y=0;temp_y<temp_window->high;temp_y++)
|
||
80054f2: 2300 movs r3, #0
|
||
80054f4: 81fb strh r3, [r7, #14]
|
||
80054f6: e033 b.n 8005560 <Refresh_Window+0x76>
|
||
{
|
||
Inteface_SetCursor(temp_window->x,temp_window->y+temp_y);
|
||
80054f8: 687b ldr r3, [r7, #4]
|
||
80054fa: 8818 ldrh r0, [r3, #0]
|
||
80054fc: 687b ldr r3, [r7, #4]
|
||
80054fe: 885a ldrh r2, [r3, #2]
|
||
8005500: 89fb ldrh r3, [r7, #14]
|
||
8005502: 4413 add r3, r2
|
||
8005504: b29b uxth r3, r3
|
||
8005506: 4619 mov r1, r3
|
||
8005508: f7ff fedc bl 80052c4 <Inteface_SetCursor>
|
||
for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
|
||
800550c: 2300 movs r3, #0
|
||
800550e: 81bb strh r3, [r7, #12]
|
||
8005510: e01e b.n 8005550 <Refresh_Window+0x66>
|
||
{
|
||
if(temp_i==0||temp_y==0||temp_i==temp_window->width-1||temp_y==temp_window->high-1)
|
||
8005512: 89bb ldrh r3, [r7, #12]
|
||
8005514: 2b00 cmp r3, #0
|
||
8005516: d00e beq.n 8005536 <Refresh_Window+0x4c>
|
||
8005518: 89fb ldrh r3, [r7, #14]
|
||
800551a: 2b00 cmp r3, #0
|
||
800551c: d00b beq.n 8005536 <Refresh_Window+0x4c>
|
||
800551e: 89ba ldrh r2, [r7, #12]
|
||
8005520: 687b ldr r3, [r7, #4]
|
||
8005522: 889b ldrh r3, [r3, #4]
|
||
8005524: 3b01 subs r3, #1
|
||
8005526: 429a cmp r2, r3
|
||
8005528: d005 beq.n 8005536 <Refresh_Window+0x4c>
|
||
800552a: 89fa ldrh r2, [r7, #14]
|
||
800552c: 687b ldr r3, [r7, #4]
|
||
800552e: 88db ldrh r3, [r3, #6]
|
||
8005530: 3b01 subs r3, #1
|
||
8005532: 429a cmp r2, r3
|
||
8005534: d103 bne.n 800553e <Refresh_Window+0x54>
|
||
{
|
||
Inteface_SetColor(BLUE);
|
||
8005536: 201f movs r0, #31
|
||
8005538: f7ff fede bl 80052f8 <Inteface_SetColor>
|
||
800553c: e005 b.n 800554a <Refresh_Window+0x60>
|
||
}else
|
||
{
|
||
Inteface_SetColor(temp_window->background);
|
||
800553e: 687b ldr r3, [r7, #4]
|
||
8005540: 689b ldr r3, [r3, #8]
|
||
8005542: b29b uxth r3, r3
|
||
8005544: 4618 mov r0, r3
|
||
8005546: f7ff fed7 bl 80052f8 <Inteface_SetColor>
|
||
for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
|
||
800554a: 89bb ldrh r3, [r7, #12]
|
||
800554c: 3301 adds r3, #1
|
||
800554e: 81bb strh r3, [r7, #12]
|
||
8005550: 687b ldr r3, [r7, #4]
|
||
8005552: 889b ldrh r3, [r3, #4]
|
||
8005554: 89ba ldrh r2, [r7, #12]
|
||
8005556: 429a cmp r2, r3
|
||
8005558: d3db bcc.n 8005512 <Refresh_Window+0x28>
|
||
for(uint16_t temp_y=0;temp_y<temp_window->high;temp_y++)
|
||
800555a: 89fb ldrh r3, [r7, #14]
|
||
800555c: 3301 adds r3, #1
|
||
800555e: 81fb strh r3, [r7, #14]
|
||
8005560: 687b ldr r3, [r7, #4]
|
||
8005562: 88db ldrh r3, [r3, #6]
|
||
8005564: 89fa ldrh r2, [r7, #14]
|
||
8005566: 429a cmp r2, r3
|
||
8005568: d3c6 bcc.n 80054f8 <Refresh_Window+0xe>
|
||
}
|
||
|
||
}
|
||
}
|
||
//����bar
|
||
for(uint16_t temp_y=0;temp_y<16;temp_y++)
|
||
800556a: 2300 movs r3, #0
|
||
800556c: 817b strh r3, [r7, #10]
|
||
800556e: e026 b.n 80055be <Refresh_Window+0xd4>
|
||
{
|
||
Inteface_SetCursor(temp_window->x,temp_window->y+temp_y);
|
||
8005570: 687b ldr r3, [r7, #4]
|
||
8005572: 8818 ldrh r0, [r3, #0]
|
||
8005574: 687b ldr r3, [r7, #4]
|
||
8005576: 885a ldrh r2, [r3, #2]
|
||
8005578: 897b ldrh r3, [r7, #10]
|
||
800557a: 4413 add r3, r2
|
||
800557c: b29b uxth r3, r3
|
||
800557e: 4619 mov r1, r3
|
||
8005580: f7ff fea0 bl 80052c4 <Inteface_SetCursor>
|
||
for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
|
||
8005584: 2300 movs r3, #0
|
||
8005586: 813b strh r3, [r7, #8]
|
||
8005588: e011 b.n 80055ae <Refresh_Window+0xc4>
|
||
{
|
||
if(temp_i>temp_window->width-16)
|
||
800558a: 687b ldr r3, [r7, #4]
|
||
800558c: 889b ldrh r3, [r3, #4]
|
||
800558e: f1a3 020f sub.w r2, r3, #15
|
||
8005592: 893b ldrh r3, [r7, #8]
|
||
8005594: 429a cmp r2, r3
|
||
8005596: dc04 bgt.n 80055a2 <Refresh_Window+0xb8>
|
||
{
|
||
Inteface_SetColor(RED);
|
||
8005598: f44f 4078 mov.w r0, #63488 ; 0xf800
|
||
800559c: f7ff feac bl 80052f8 <Inteface_SetColor>
|
||
80055a0: e002 b.n 80055a8 <Refresh_Window+0xbe>
|
||
}else
|
||
{
|
||
Inteface_SetColor(BLUE);
|
||
80055a2: 201f movs r0, #31
|
||
80055a4: f7ff fea8 bl 80052f8 <Inteface_SetColor>
|
||
for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
|
||
80055a8: 893b ldrh r3, [r7, #8]
|
||
80055aa: 3301 adds r3, #1
|
||
80055ac: 813b strh r3, [r7, #8]
|
||
80055ae: 687b ldr r3, [r7, #4]
|
||
80055b0: 889b ldrh r3, [r3, #4]
|
||
80055b2: 893a ldrh r2, [r7, #8]
|
||
80055b4: 429a cmp r2, r3
|
||
80055b6: d3e8 bcc.n 800558a <Refresh_Window+0xa0>
|
||
for(uint16_t temp_y=0;temp_y<16;temp_y++)
|
||
80055b8: 897b ldrh r3, [r7, #10]
|
||
80055ba: 3301 adds r3, #1
|
||
80055bc: 817b strh r3, [r7, #10]
|
||
80055be: 897b ldrh r3, [r7, #10]
|
||
80055c0: 2b0f cmp r3, #15
|
||
80055c2: d9d5 bls.n 8005570 <Refresh_Window+0x86>
|
||
}
|
||
|
||
}
|
||
}
|
||
//��ʾtitle
|
||
LCD_ShowString(temp_window->x,temp_window->y,&temp_window->title,16,WHITE,WHITE);
|
||
80055c4: 687b ldr r3, [r7, #4]
|
||
80055c6: 8818 ldrh r0, [r3, #0]
|
||
80055c8: 687b ldr r3, [r7, #4]
|
||
80055ca: 8859 ldrh r1, [r3, #2]
|
||
80055cc: 687b ldr r3, [r7, #4]
|
||
80055ce: f103 020c add.w r2, r3, #12
|
||
80055d2: f64f 73ff movw r3, #65535 ; 0xffff
|
||
80055d6: 9301 str r3, [sp, #4]
|
||
80055d8: f64f 73ff movw r3, #65535 ; 0xffff
|
||
80055dc: 9300 str r3, [sp, #0]
|
||
80055de: 2310 movs r3, #16
|
||
80055e0: f7fe ff80 bl 80044e4 <LCD_ShowString>
|
||
|
||
}
|
||
80055e4: bf00 nop
|
||
80055e6: 3710 adds r7, #16
|
||
80055e8: 46bd mov sp, r7
|
||
80055ea: bd80 pop {r7, pc}
|
||
|
||
080055ec <Refresh_UI>:
|
||
* �ܿ�ϧ ��������д�Ĵ���Ҫ������
|
||
* ���㷨ʵ���ڵ���ϵ������ͦ��
|
||
*
|
||
* */
|
||
void Refresh_UI(UI *ui)
|
||
{
|
||
80055ec: b580 push {r7, lr}
|
||
80055ee: b086 sub sp, #24
|
||
80055f0: af00 add r7, sp, #0
|
||
80055f2: 6078 str r0, [r7, #4]
|
||
int flag=0;
|
||
80055f4: 2300 movs r3, #0
|
||
80055f6: 617b str r3, [r7, #20]
|
||
uint16_t dot_y=0,dot_x=0;
|
||
80055f8: 2300 movs r3, #0
|
||
80055fa: 827b strh r3, [r7, #18]
|
||
80055fc: 2300 movs r3, #0
|
||
80055fe: 823b strh r3, [r7, #16]
|
||
//������
|
||
for(dot_y=ui->y;dot_y<ui->high;dot_y++)
|
||
8005600: 687b ldr r3, [r7, #4]
|
||
8005602: 88db ldrh r3, [r3, #6]
|
||
8005604: 827b strh r3, [r7, #18]
|
||
8005606: e01a b.n 800563e <Refresh_UI+0x52>
|
||
{
|
||
Inteface_SetCursor(dot_x,dot_y);
|
||
8005608: 8a7a ldrh r2, [r7, #18]
|
||
800560a: 8a3b ldrh r3, [r7, #16]
|
||
800560c: 4611 mov r1, r2
|
||
800560e: 4618 mov r0, r3
|
||
8005610: f7ff fe58 bl 80052c4 <Inteface_SetCursor>
|
||
for(dot_x=ui->x;dot_x<ui->width;dot_x++)
|
||
8005614: 687b ldr r3, [r7, #4]
|
||
8005616: 889b ldrh r3, [r3, #4]
|
||
8005618: 823b strh r3, [r7, #16]
|
||
800561a: e008 b.n 800562e <Refresh_UI+0x42>
|
||
{
|
||
Inteface_SetColor(ui->background);
|
||
800561c: 687b ldr r3, [r7, #4]
|
||
800561e: 681b ldr r3, [r3, #0]
|
||
8005620: b29b uxth r3, r3
|
||
8005622: 4618 mov r0, r3
|
||
8005624: f7ff fe68 bl 80052f8 <Inteface_SetColor>
|
||
for(dot_x=ui->x;dot_x<ui->width;dot_x++)
|
||
8005628: 8a3b ldrh r3, [r7, #16]
|
||
800562a: 3301 adds r3, #1
|
||
800562c: 823b strh r3, [r7, #16]
|
||
800562e: 687b ldr r3, [r7, #4]
|
||
8005630: 891b ldrh r3, [r3, #8]
|
||
8005632: 8a3a ldrh r2, [r7, #16]
|
||
8005634: 429a cmp r2, r3
|
||
8005636: d3f1 bcc.n 800561c <Refresh_UI+0x30>
|
||
for(dot_y=ui->y;dot_y<ui->high;dot_y++)
|
||
8005638: 8a7b ldrh r3, [r7, #18]
|
||
800563a: 3301 adds r3, #1
|
||
800563c: 827b strh r3, [r7, #18]
|
||
800563e: 687b ldr r3, [r7, #4]
|
||
8005640: 895b ldrh r3, [r3, #10]
|
||
8005642: 8a7a ldrh r2, [r7, #18]
|
||
8005644: 429a cmp r2, r3
|
||
8005646: d3df bcc.n 8005608 <Refresh_UI+0x1c>
|
||
}
|
||
|
||
}
|
||
windows_stack *temp_windows_stack,*temp_windows_stack2;
|
||
temp_windows_stack=ui->windows;
|
||
8005648: 687b ldr r3, [r7, #4]
|
||
800564a: 68db ldr r3, [r3, #12]
|
||
800564c: 60fb str r3, [r7, #12]
|
||
do
|
||
{
|
||
if(temp_windows_stack!=NULL)
|
||
800564e: 68fb ldr r3, [r7, #12]
|
||
8005650: 2b00 cmp r3, #0
|
||
8005652: d00a beq.n 800566a <Refresh_UI+0x7e>
|
||
{
|
||
flag=1;
|
||
8005654: 2301 movs r3, #1
|
||
8005656: 617b str r3, [r7, #20]
|
||
Refresh_Window(temp_windows_stack->window);
|
||
8005658: 68fb ldr r3, [r7, #12]
|
||
800565a: 685b ldr r3, [r3, #4]
|
||
800565c: 4618 mov r0, r3
|
||
800565e: f7ff ff44 bl 80054ea <Refresh_Window>
|
||
//������һ������
|
||
temp_windows_stack=temp_windows_stack->next;
|
||
8005662: 68fb ldr r3, [r7, #12]
|
||
8005664: 689b ldr r3, [r3, #8]
|
||
8005666: 60fb str r3, [r7, #12]
|
||
8005668: e001 b.n 800566e <Refresh_UI+0x82>
|
||
}else
|
||
{
|
||
flag=0;
|
||
800566a: 2300 movs r3, #0
|
||
800566c: 617b str r3, [r7, #20]
|
||
}
|
||
|
||
}while(flag);
|
||
800566e: 697b ldr r3, [r7, #20]
|
||
8005670: 2b00 cmp r3, #0
|
||
8005672: d1ec bne.n 800564e <Refresh_UI+0x62>
|
||
}
|
||
|
||
}
|
||
*/
|
||
|
||
}
|
||
8005674: bf00 nop
|
||
8005676: bf00 nop
|
||
8005678: 3718 adds r7, #24
|
||
800567a: 46bd mov sp, r7
|
||
800567c: bd80 pop {r7, pc}
|
||
|
||
0800567e <Chack>:
|
||
#define BODY 1
|
||
#define BAR 2
|
||
#define CLOSE 3
|
||
|
||
uint8_t Chack(window *this_window,int x,int y)
|
||
{
|
||
800567e: b480 push {r7}
|
||
8005680: b087 sub sp, #28
|
||
8005682: af00 add r7, sp, #0
|
||
8005684: 60f8 str r0, [r7, #12]
|
||
8005686: 60b9 str r1, [r7, #8]
|
||
8005688: 607a str r2, [r7, #4]
|
||
int a=0;
|
||
800568a: 2300 movs r3, #0
|
||
800568c: 617b str r3, [r7, #20]
|
||
|
||
if(((x>=this_window->x)&&(x<(this_window->x+this_window->width)))&&((y>=this_window->y+16)&&(y<(this_window->y+this_window->high))))
|
||
800568e: 68fb ldr r3, [r7, #12]
|
||
8005690: 881b ldrh r3, [r3, #0]
|
||
8005692: 461a mov r2, r3
|
||
8005694: 68bb ldr r3, [r7, #8]
|
||
8005696: 4293 cmp r3, r2
|
||
8005698: db19 blt.n 80056ce <Chack+0x50>
|
||
800569a: 68fb ldr r3, [r7, #12]
|
||
800569c: 881b ldrh r3, [r3, #0]
|
||
800569e: 461a mov r2, r3
|
||
80056a0: 68fb ldr r3, [r7, #12]
|
||
80056a2: 889b ldrh r3, [r3, #4]
|
||
80056a4: 4413 add r3, r2
|
||
80056a6: 68ba ldr r2, [r7, #8]
|
||
80056a8: 429a cmp r2, r3
|
||
80056aa: da10 bge.n 80056ce <Chack+0x50>
|
||
80056ac: 68fb ldr r3, [r7, #12]
|
||
80056ae: 885b ldrh r3, [r3, #2]
|
||
80056b0: 330f adds r3, #15
|
||
80056b2: 687a ldr r2, [r7, #4]
|
||
80056b4: 429a cmp r2, r3
|
||
80056b6: dd0a ble.n 80056ce <Chack+0x50>
|
||
80056b8: 68fb ldr r3, [r7, #12]
|
||
80056ba: 885b ldrh r3, [r3, #2]
|
||
80056bc: 461a mov r2, r3
|
||
80056be: 68fb ldr r3, [r7, #12]
|
||
80056c0: 88db ldrh r3, [r3, #6]
|
||
80056c2: 4413 add r3, r2
|
||
80056c4: 687a ldr r2, [r7, #4]
|
||
80056c6: 429a cmp r2, r3
|
||
80056c8: da01 bge.n 80056ce <Chack+0x50>
|
||
{
|
||
a=1;
|
||
80056ca: 2301 movs r3, #1
|
||
80056cc: 617b str r3, [r7, #20]
|
||
}
|
||
if(((x>=this_window->x)&&(x<(this_window->x+this_window->width-16)))&&((y>=this_window->y)&&(y<(this_window->y+16))))
|
||
80056ce: 68fb ldr r3, [r7, #12]
|
||
80056d0: 881b ldrh r3, [r3, #0]
|
||
80056d2: 461a mov r2, r3
|
||
80056d4: 68bb ldr r3, [r7, #8]
|
||
80056d6: 4293 cmp r3, r2
|
||
80056d8: db17 blt.n 800570a <Chack+0x8c>
|
||
80056da: 68fb ldr r3, [r7, #12]
|
||
80056dc: 881b ldrh r3, [r3, #0]
|
||
80056de: 461a mov r2, r3
|
||
80056e0: 68fb ldr r3, [r7, #12]
|
||
80056e2: 889b ldrh r3, [r3, #4]
|
||
80056e4: 4413 add r3, r2
|
||
80056e6: 3b10 subs r3, #16
|
||
80056e8: 68ba ldr r2, [r7, #8]
|
||
80056ea: 429a cmp r2, r3
|
||
80056ec: da0d bge.n 800570a <Chack+0x8c>
|
||
80056ee: 68fb ldr r3, [r7, #12]
|
||
80056f0: 885b ldrh r3, [r3, #2]
|
||
80056f2: 461a mov r2, r3
|
||
80056f4: 687b ldr r3, [r7, #4]
|
||
80056f6: 4293 cmp r3, r2
|
||
80056f8: db07 blt.n 800570a <Chack+0x8c>
|
||
80056fa: 68fb ldr r3, [r7, #12]
|
||
80056fc: 885b ldrh r3, [r3, #2]
|
||
80056fe: 330f adds r3, #15
|
||
8005700: 687a ldr r2, [r7, #4]
|
||
8005702: 429a cmp r2, r3
|
||
8005704: dc01 bgt.n 800570a <Chack+0x8c>
|
||
{
|
||
a=2;
|
||
8005706: 2302 movs r3, #2
|
||
8005708: 617b str r3, [r7, #20]
|
||
}
|
||
if((x>=(this_window->x+this_window->width-16))&&(x<(this_window->x+this_window->width))&&((y>=this_window->y)&&(y<(this_window->y+16))))
|
||
800570a: 68fb ldr r3, [r7, #12]
|
||
800570c: 881b ldrh r3, [r3, #0]
|
||
800570e: 461a mov r2, r3
|
||
8005710: 68fb ldr r3, [r7, #12]
|
||
8005712: 889b ldrh r3, [r3, #4]
|
||
8005714: 4413 add r3, r2
|
||
8005716: 3b10 subs r3, #16
|
||
8005718: 68ba ldr r2, [r7, #8]
|
||
800571a: 429a cmp r2, r3
|
||
800571c: db16 blt.n 800574c <Chack+0xce>
|
||
800571e: 68fb ldr r3, [r7, #12]
|
||
8005720: 881b ldrh r3, [r3, #0]
|
||
8005722: 461a mov r2, r3
|
||
8005724: 68fb ldr r3, [r7, #12]
|
||
8005726: 889b ldrh r3, [r3, #4]
|
||
8005728: 4413 add r3, r2
|
||
800572a: 68ba ldr r2, [r7, #8]
|
||
800572c: 429a cmp r2, r3
|
||
800572e: da0d bge.n 800574c <Chack+0xce>
|
||
8005730: 68fb ldr r3, [r7, #12]
|
||
8005732: 885b ldrh r3, [r3, #2]
|
||
8005734: 461a mov r2, r3
|
||
8005736: 687b ldr r3, [r7, #4]
|
||
8005738: 4293 cmp r3, r2
|
||
800573a: db07 blt.n 800574c <Chack+0xce>
|
||
800573c: 68fb ldr r3, [r7, #12]
|
||
800573e: 885b ldrh r3, [r3, #2]
|
||
8005740: 330f adds r3, #15
|
||
8005742: 687a ldr r2, [r7, #4]
|
||
8005744: 429a cmp r2, r3
|
||
8005746: dc01 bgt.n 800574c <Chack+0xce>
|
||
{
|
||
a=3;
|
||
8005748: 2303 movs r3, #3
|
||
800574a: 617b str r3, [r7, #20]
|
||
}
|
||
return a;
|
||
800574c: 697b ldr r3, [r7, #20]
|
||
800574e: b2db uxtb r3, r3
|
||
|
||
}
|
||
8005750: 4618 mov r0, r3
|
||
8005752: 371c adds r7, #28
|
||
8005754: 46bd mov sp, r7
|
||
8005756: bc80 pop {r7}
|
||
8005758: 4770 bx lr
|
||
...
|
||
|
||
0800575c <UI_Server>:
|
||
|
||
void UI_Server(UI *ui)
|
||
{
|
||
800575c: b580 push {r7, lr}
|
||
800575e: b088 sub sp, #32
|
||
8005760: af00 add r7, sp, #0
|
||
8005762: 6078 str r0, [r7, #4]
|
||
|
||
windows_stack *temp_windows_stack=NULL;
|
||
8005764: 2300 movs r3, #0
|
||
8005766: 61fb str r3, [r7, #28]
|
||
window *temp_window;
|
||
//touch_device *temp_touch=NULL;
|
||
int flag=0;
|
||
8005768: 2300 movs r3, #0
|
||
800576a: 61bb str r3, [r7, #24]
|
||
uint8_t hit_flag=0;
|
||
800576c: 2300 movs r3, #0
|
||
800576e: 75fb strb r3, [r7, #23]
|
||
|
||
int t_x,t_y;
|
||
//touch
|
||
//temp_touch=ui->touch;
|
||
if(t0.c)//TP_XY(&t_x, &t_y))
|
||
8005770: 4b78 ldr r3, [pc, #480] ; (8005954 <UI_Server+0x1f8>)
|
||
8005772: 7b1b ldrb r3, [r3, #12]
|
||
8005774: f003 0302 and.w r3, r3, #2
|
||
8005778: b2db uxtb r3, r3
|
||
800577a: 2b00 cmp r3, #0
|
||
800577c: f000 80be beq.w 80058fc <UI_Server+0x1a0>
|
||
{
|
||
if(t0.d)
|
||
8005780: 4b74 ldr r3, [pc, #464] ; (8005954 <UI_Server+0x1f8>)
|
||
8005782: 7b1b ldrb r3, [r3, #12]
|
||
8005784: f003 0304 and.w r3, r3, #4
|
||
8005788: b2db uxtb r3, r3
|
||
800578a: 2b00 cmp r3, #0
|
||
800578c: f000 80cc beq.w 8005928 <UI_Server+0x1cc>
|
||
{
|
||
t_x=t0.pix_x;
|
||
8005790: 4b70 ldr r3, [pc, #448] ; (8005954 <UI_Server+0x1f8>)
|
||
8005792: 685b ldr r3, [r3, #4]
|
||
8005794: 613b str r3, [r7, #16]
|
||
t_y=t0.pix_y;
|
||
8005796: 4b6f ldr r3, [pc, #444] ; (8005954 <UI_Server+0x1f8>)
|
||
8005798: 689b ldr r3, [r3, #8]
|
||
800579a: 60fb str r3, [r7, #12]
|
||
temp_window=NULL;
|
||
800579c: 2300 movs r3, #0
|
||
800579e: 60bb str r3, [r7, #8]
|
||
|
||
if(ui->moveed_windwos==NULL)
|
||
80057a0: 687b ldr r3, [r7, #4]
|
||
80057a2: 695b ldr r3, [r3, #20]
|
||
80057a4: 2b00 cmp r3, #0
|
||
80057a6: f040 808c bne.w 80058c2 <UI_Server+0x166>
|
||
{
|
||
if(ui->First_click_flag==0)
|
||
80057aa: 687b ldr r3, [r7, #4]
|
||
80057ac: f893 3020 ldrb.w r3, [r3, #32]
|
||
80057b0: f003 0302 and.w r3, r3, #2
|
||
80057b4: b2db uxtb r3, r3
|
||
80057b6: 2b00 cmp r3, #0
|
||
80057b8: f040 80b6 bne.w 8005928 <UI_Server+0x1cc>
|
||
{
|
||
ui->First_click_flag=1;
|
||
80057bc: 687a ldr r2, [r7, #4]
|
||
80057be: f892 3020 ldrb.w r3, [r2, #32]
|
||
80057c2: f043 0302 orr.w r3, r3, #2
|
||
80057c6: f882 3020 strb.w r3, [r2, #32]
|
||
temp_windows_stack=ui->last_windows; //��ȡui����ǰ�˵Ĵ��� ��ǰ����ɨ��
|
||
80057ca: 687b ldr r3, [r7, #4]
|
||
80057cc: 691b ldr r3, [r3, #16]
|
||
80057ce: 61fb str r3, [r7, #28]
|
||
do
|
||
{
|
||
if(temp_windows_stack!=NULL) //�����д��ھͿ�ʼɨ��
|
||
80057d0: 69fb ldr r3, [r7, #28]
|
||
80057d2: 2b00 cmp r3, #0
|
||
80057d4: d06f beq.n 80058b6 <UI_Server+0x15a>
|
||
{
|
||
flag=1; //���鵽�д��� ��Ҫѭ��һ���Լ����Ƿ�����һ������
|
||
80057d6: 2301 movs r3, #1
|
||
80057d8: 61bb str r3, [r7, #24]
|
||
//
|
||
temp_window=temp_windows_stack->window; //ȡ����������
|
||
80057da: 69fb ldr r3, [r7, #28]
|
||
80057dc: 685b ldr r3, [r3, #4]
|
||
80057de: 60bb str r3, [r7, #8]
|
||
hit_flag=Chack(temp_window,t_x,t_y); //���鴥���Ƿ����� ֱ�ӷ������д��ڵ�λ��
|
||
80057e0: 68fa ldr r2, [r7, #12]
|
||
80057e2: 6939 ldr r1, [r7, #16]
|
||
80057e4: 68b8 ldr r0, [r7, #8]
|
||
80057e6: f7ff ff4a bl 800567e <Chack>
|
||
80057ea: 4603 mov r3, r0
|
||
80057ec: 75fb strb r3, [r7, #23]
|
||
if(hit_flag) // �����
|
||
80057ee: 7dfb ldrb r3, [r7, #23]
|
||
80057f0: 2b00 cmp r3, #0
|
||
80057f2: d05c beq.n 80058ae <UI_Server+0x152>
|
||
{
|
||
if(temp_windows_stack!=ui->last_windows) //�����Ƿ���ǰ�˵Ĵ��� �������Ǿͷ���ǰ��
|
||
80057f4: 687b ldr r3, [r7, #4]
|
||
80057f6: 691b ldr r3, [r3, #16]
|
||
80057f8: 69fa ldr r2, [r7, #28]
|
||
80057fa: 429a cmp r2, r3
|
||
80057fc: d02c beq.n 8005858 <UI_Server+0xfc>
|
||
{
|
||
if(temp_windows_stack!=ui->windows) //�����Ƿ������˵Ĵ��� ��Ϊ��ʾ�Ǵ���������ǰ��ʾ�� ����ui�������˴��ڵ�����
|
||
80057fe: 687b ldr r3, [r7, #4]
|
||
8005800: 68db ldr r3, [r3, #12]
|
||
8005802: 69fa ldr r2, [r7, #28]
|
||
8005804: 429a cmp r2, r3
|
||
8005806: d00a beq.n 800581e <UI_Server+0xc2>
|
||
{
|
||
temp_windows_stack->up->next=temp_windows_stack->next; //ȡ�������ڵ� �ѽڵ������²�������
|
||
8005808: 69fb ldr r3, [r7, #28]
|
||
800580a: 681b ldr r3, [r3, #0]
|
||
800580c: 69fa ldr r2, [r7, #28]
|
||
800580e: 6892 ldr r2, [r2, #8]
|
||
8005810: 609a str r2, [r3, #8]
|
||
temp_windows_stack->next->up=temp_windows_stack->up;
|
||
8005812: 69fb ldr r3, [r7, #28]
|
||
8005814: 689b ldr r3, [r3, #8]
|
||
8005816: 69fa ldr r2, [r7, #28]
|
||
8005818: 6812 ldr r2, [r2, #0]
|
||
800581a: 601a str r2, [r3, #0]
|
||
800581c: e007 b.n 800582e <UI_Server+0xd2>
|
||
}else
|
||
{
|
||
ui->windows=temp_windows_stack->next; //�����������˵Ĵ��� ��ȡ�������ڵ������ھͱ���һ���ڵ���
|
||
800581e: 69fb ldr r3, [r7, #28]
|
||
8005820: 689a ldr r2, [r3, #8]
|
||
8005822: 687b ldr r3, [r7, #4]
|
||
8005824: 60da str r2, [r3, #12]
|
||
ui->windows->up=NULL; //�����ڶ��������� ���߾�û�� ����Ҫ����ָ��
|
||
8005826: 687b ldr r3, [r7, #4]
|
||
8005828: 68db ldr r3, [r3, #12]
|
||
800582a: 2200 movs r2, #0
|
||
800582c: 601a str r2, [r3, #0]
|
||
}
|
||
temp_windows_stack->next=NULL; //ȡ���Ľڵ�Ҫ������ǰ�� ���� ������ǰ ������ǰ��ָ��
|
||
800582e: 69fb ldr r3, [r7, #28]
|
||
8005830: 2200 movs r2, #0
|
||
8005832: 609a str r2, [r3, #8]
|
||
temp_windows_stack->up=ui->last_windows; //��һ��ָ������ԭ��������һ��
|
||
8005834: 687b ldr r3, [r7, #4]
|
||
8005836: 691a ldr r2, [r3, #16]
|
||
8005838: 69fb ldr r3, [r7, #28]
|
||
800583a: 601a str r2, [r3, #0]
|
||
ui->last_windows->next=temp_windows_stack; //ԭ��������һ��ָ�����ڵ�����һ��
|
||
800583c: 687b ldr r3, [r7, #4]
|
||
800583e: 691b ldr r3, [r3, #16]
|
||
8005840: 69fa ldr r2, [r7, #28]
|
||
8005842: 609a str r2, [r3, #8]
|
||
ui->last_windows=temp_windows_stack; //����ui�е�����һ��������
|
||
8005844: 687b ldr r3, [r7, #4]
|
||
8005846: 69fa ldr r2, [r7, #28]
|
||
8005848: 611a str r2, [r3, #16]
|
||
ui->refresh_ui_flag=1; //�����˱仯 ˢ��ui����ʾ
|
||
800584a: 687a ldr r2, [r7, #4]
|
||
800584c: f892 3020 ldrb.w r3, [r2, #32]
|
||
8005850: f043 0304 orr.w r3, r3, #4
|
||
8005854: f882 3020 strb.w r3, [r2, #32]
|
||
}
|
||
|
||
//�������д��ڵ�ʲôλ��
|
||
switch(hit_flag)
|
||
8005858: 7dfb ldrb r3, [r7, #23]
|
||
800585a: 2b03 cmp r3, #3
|
||
800585c: d006 beq.n 800586c <UI_Server+0x110>
|
||
800585e: 2b03 cmp r3, #3
|
||
8005860: dc23 bgt.n 80058aa <UI_Server+0x14e>
|
||
8005862: 2b01 cmp r3, #1
|
||
8005864: d020 beq.n 80058a8 <UI_Server+0x14c>
|
||
8005866: 2b02 cmp r3, #2
|
||
8005868: d00c beq.n 8005884 <UI_Server+0x128>
|
||
800586a: e01e b.n 80058aa <UI_Server+0x14e>
|
||
{
|
||
case CLOSE:
|
||
Close_Windows_Stack(ui,temp_windows_stack);
|
||
800586c: 69f9 ldr r1, [r7, #28]
|
||
800586e: 6878 ldr r0, [r7, #4]
|
||
8005870: f7ff fdee bl 8005450 <Close_Windows_Stack>
|
||
ui->refresh_ui_flag=1; //�����˱仯 ˢ��ui����ʾ
|
||
8005874: 687a ldr r2, [r7, #4]
|
||
8005876: f892 3020 ldrb.w r3, [r2, #32]
|
||
800587a: f043 0304 orr.w r3, r3, #4
|
||
800587e: f882 3020 strb.w r3, [r2, #32]
|
||
break;
|
||
8005882: e012 b.n 80058aa <UI_Server+0x14e>
|
||
case BAR:
|
||
ui->moveed_windwos=temp_window;
|
||
8005884: 687b ldr r3, [r7, #4]
|
||
8005886: 68ba ldr r2, [r7, #8]
|
||
8005888: 615a str r2, [r3, #20]
|
||
ui->move_x=t_x-temp_window->x;
|
||
800588a: 68bb ldr r3, [r7, #8]
|
||
800588c: 881b ldrh r3, [r3, #0]
|
||
800588e: 461a mov r2, r3
|
||
8005890: 693b ldr r3, [r7, #16]
|
||
8005892: 1a9a subs r2, r3, r2
|
||
8005894: 687b ldr r3, [r7, #4]
|
||
8005896: 619a str r2, [r3, #24]
|
||
ui->move_y=t_y-temp_window->y;
|
||
8005898: 68bb ldr r3, [r7, #8]
|
||
800589a: 885b ldrh r3, [r3, #2]
|
||
800589c: 461a mov r2, r3
|
||
800589e: 68fb ldr r3, [r7, #12]
|
||
80058a0: 1a9a subs r2, r3, r2
|
||
80058a2: 687b ldr r3, [r7, #4]
|
||
80058a4: 61da str r2, [r3, #28]
|
||
|
||
break;
|
||
80058a6: e000 b.n 80058aa <UI_Server+0x14e>
|
||
case BODY:
|
||
//ui->background=temp_windows_stack->window->background;
|
||
//ui->refresh_ui_flag=1;
|
||
break;
|
||
80058a8: bf00 nop
|
||
}
|
||
|
||
|
||
flag=0; //����ɨ�� ��ֹ����ǰ����
|
||
80058aa: 2300 movs r3, #0
|
||
80058ac: 61bb str r3, [r7, #24]
|
||
}
|
||
temp_windows_stack=temp_windows_stack->up; //��ǰɨ��
|
||
80058ae: 69fb ldr r3, [r7, #28]
|
||
80058b0: 681b ldr r3, [r3, #0]
|
||
80058b2: 61fb str r3, [r7, #28]
|
||
80058b4: e001 b.n 80058ba <UI_Server+0x15e>
|
||
}else
|
||
{
|
||
flag=0; //һ�����ڶ�û�� ֱ�ӽ���ѭ��
|
||
80058b6: 2300 movs r3, #0
|
||
80058b8: 61bb str r3, [r7, #24]
|
||
}
|
||
}while(flag);
|
||
80058ba: 69bb ldr r3, [r7, #24]
|
||
80058bc: 2b00 cmp r3, #0
|
||
80058be: d187 bne.n 80057d0 <UI_Server+0x74>
|
||
80058c0: e032 b.n 8005928 <UI_Server+0x1cc>
|
||
}
|
||
|
||
}else
|
||
{
|
||
temp_window=ui->moveed_windwos;
|
||
80058c2: 687b ldr r3, [r7, #4]
|
||
80058c4: 695b ldr r3, [r3, #20]
|
||
80058c6: 60bb str r3, [r7, #8]
|
||
temp_window->x=t_x-ui->move_x;
|
||
80058c8: 693b ldr r3, [r7, #16]
|
||
80058ca: b29a uxth r2, r3
|
||
80058cc: 687b ldr r3, [r7, #4]
|
||
80058ce: 699b ldr r3, [r3, #24]
|
||
80058d0: b29b uxth r3, r3
|
||
80058d2: 1ad3 subs r3, r2, r3
|
||
80058d4: b29a uxth r2, r3
|
||
80058d6: 68bb ldr r3, [r7, #8]
|
||
80058d8: 801a strh r2, [r3, #0]
|
||
temp_window->y=t_y-ui->move_y;
|
||
80058da: 68fb ldr r3, [r7, #12]
|
||
80058dc: b29a uxth r2, r3
|
||
80058de: 687b ldr r3, [r7, #4]
|
||
80058e0: 69db ldr r3, [r3, #28]
|
||
80058e2: b29b uxth r3, r3
|
||
80058e4: 1ad3 subs r3, r2, r3
|
||
80058e6: b29a uxth r2, r3
|
||
80058e8: 68bb ldr r3, [r7, #8]
|
||
80058ea: 805a strh r2, [r3, #2]
|
||
ui->refresh_ui_flag=1;
|
||
80058ec: 687a ldr r2, [r7, #4]
|
||
80058ee: f892 3020 ldrb.w r3, [r2, #32]
|
||
80058f2: f043 0304 orr.w r3, r3, #4
|
||
80058f6: f882 3020 strb.w r3, [r2, #32]
|
||
80058fa: e015 b.n 8005928 <UI_Server+0x1cc>
|
||
|
||
|
||
|
||
}else
|
||
{
|
||
if(ui->First_click_flag==1)
|
||
80058fc: 687b ldr r3, [r7, #4]
|
||
80058fe: f893 3020 ldrb.w r3, [r3, #32]
|
||
8005902: f003 0302 and.w r3, r3, #2
|
||
8005906: b2db uxtb r3, r3
|
||
8005908: 2b00 cmp r3, #0
|
||
800590a: d006 beq.n 800591a <UI_Server+0x1be>
|
||
{
|
||
ui->First_click_flag=0;
|
||
800590c: 687a ldr r2, [r7, #4]
|
||
800590e: f892 3020 ldrb.w r3, [r2, #32]
|
||
8005912: f36f 0341 bfc r3, #1, #1
|
||
8005916: f882 3020 strb.w r3, [r2, #32]
|
||
}
|
||
if(ui->moveed_windwos!=NULL)
|
||
800591a: 687b ldr r3, [r7, #4]
|
||
800591c: 695b ldr r3, [r3, #20]
|
||
800591e: 2b00 cmp r3, #0
|
||
8005920: d002 beq.n 8005928 <UI_Server+0x1cc>
|
||
{
|
||
ui->moveed_windwos=NULL;
|
||
8005922: 687b ldr r3, [r7, #4]
|
||
8005924: 2200 movs r2, #0
|
||
8005926: 615a str r2, [r3, #20]
|
||
}
|
||
|
||
|
||
}
|
||
//display
|
||
if(ui->refresh_ui_flag==1)
|
||
8005928: 687b ldr r3, [r7, #4]
|
||
800592a: f893 3020 ldrb.w r3, [r3, #32]
|
||
800592e: f003 0304 and.w r3, r3, #4
|
||
8005932: b2db uxtb r3, r3
|
||
8005934: 2b00 cmp r3, #0
|
||
8005936: d009 beq.n 800594c <UI_Server+0x1f0>
|
||
{
|
||
ui->refresh_ui_flag=0;
|
||
8005938: 687a ldr r2, [r7, #4]
|
||
800593a: f892 3020 ldrb.w r3, [r2, #32]
|
||
800593e: f36f 0382 bfc r3, #2, #1
|
||
8005942: f882 3020 strb.w r3, [r2, #32]
|
||
Refresh_UI(ui);
|
||
8005946: 6878 ldr r0, [r7, #4]
|
||
8005948: f7ff fe50 bl 80055ec <Refresh_UI>
|
||
|
||
}
|
||
|
||
}
|
||
800594c: bf00 nop
|
||
800594e: 3720 adds r7, #32
|
||
8005950: 46bd mov sp, r7
|
||
8005952: bd80 pop {r7, pc}
|
||
8005954: 200002e0 .word 0x200002e0
|
||
|
||
08005958 <__errno>:
|
||
8005958: 4b01 ldr r3, [pc, #4] ; (8005960 <__errno+0x8>)
|
||
800595a: 6818 ldr r0, [r3, #0]
|
||
800595c: 4770 bx lr
|
||
800595e: bf00 nop
|
||
8005960: 2000000c .word 0x2000000c
|
||
|
||
08005964 <__libc_init_array>:
|
||
8005964: b570 push {r4, r5, r6, lr}
|
||
8005966: 2600 movs r6, #0
|
||
8005968: 4d0c ldr r5, [pc, #48] ; (800599c <__libc_init_array+0x38>)
|
||
800596a: 4c0d ldr r4, [pc, #52] ; (80059a0 <__libc_init_array+0x3c>)
|
||
800596c: 1b64 subs r4, r4, r5
|
||
800596e: 10a4 asrs r4, r4, #2
|
||
8005970: 42a6 cmp r6, r4
|
||
8005972: d109 bne.n 8005988 <__libc_init_array+0x24>
|
||
8005974: f002 fec4 bl 8008700 <_init>
|
||
8005978: 2600 movs r6, #0
|
||
800597a: 4d0a ldr r5, [pc, #40] ; (80059a4 <__libc_init_array+0x40>)
|
||
800597c: 4c0a ldr r4, [pc, #40] ; (80059a8 <__libc_init_array+0x44>)
|
||
800597e: 1b64 subs r4, r4, r5
|
||
8005980: 10a4 asrs r4, r4, #2
|
||
8005982: 42a6 cmp r6, r4
|
||
8005984: d105 bne.n 8005992 <__libc_init_array+0x2e>
|
||
8005986: bd70 pop {r4, r5, r6, pc}
|
||
8005988: f855 3b04 ldr.w r3, [r5], #4
|
||
800598c: 4798 blx r3
|
||
800598e: 3601 adds r6, #1
|
||
8005990: e7ee b.n 8005970 <__libc_init_array+0xc>
|
||
8005992: f855 3b04 ldr.w r3, [r5], #4
|
||
8005996: 4798 blx r3
|
||
8005998: 3601 adds r6, #1
|
||
800599a: e7f2 b.n 8005982 <__libc_init_array+0x1e>
|
||
800599c: 0800966c .word 0x0800966c
|
||
80059a0: 0800966c .word 0x0800966c
|
||
80059a4: 0800966c .word 0x0800966c
|
||
80059a8: 08009670 .word 0x08009670
|
||
|
||
080059ac <malloc>:
|
||
80059ac: 4b02 ldr r3, [pc, #8] ; (80059b8 <malloc+0xc>)
|
||
80059ae: 4601 mov r1, r0
|
||
80059b0: 6818 ldr r0, [r3, #0]
|
||
80059b2: f000 b85f b.w 8005a74 <_malloc_r>
|
||
80059b6: bf00 nop
|
||
80059b8: 2000000c .word 0x2000000c
|
||
|
||
080059bc <free>:
|
||
80059bc: 4b02 ldr r3, [pc, #8] ; (80059c8 <free+0xc>)
|
||
80059be: 4601 mov r1, r0
|
||
80059c0: 6818 ldr r0, [r3, #0]
|
||
80059c2: f000 b80b b.w 80059dc <_free_r>
|
||
80059c6: bf00 nop
|
||
80059c8: 2000000c .word 0x2000000c
|
||
|
||
080059cc <memset>:
|
||
80059cc: 4603 mov r3, r0
|
||
80059ce: 4402 add r2, r0
|
||
80059d0: 4293 cmp r3, r2
|
||
80059d2: d100 bne.n 80059d6 <memset+0xa>
|
||
80059d4: 4770 bx lr
|
||
80059d6: f803 1b01 strb.w r1, [r3], #1
|
||
80059da: e7f9 b.n 80059d0 <memset+0x4>
|
||
|
||
080059dc <_free_r>:
|
||
80059dc: b538 push {r3, r4, r5, lr}
|
||
80059de: 4605 mov r5, r0
|
||
80059e0: 2900 cmp r1, #0
|
||
80059e2: d043 beq.n 8005a6c <_free_r+0x90>
|
||
80059e4: f851 3c04 ldr.w r3, [r1, #-4]
|
||
80059e8: 1f0c subs r4, r1, #4
|
||
80059ea: 2b00 cmp r3, #0
|
||
80059ec: bfb8 it lt
|
||
80059ee: 18e4 addlt r4, r4, r3
|
||
80059f0: f001 fbc8 bl 8007184 <__malloc_lock>
|
||
80059f4: 4a1e ldr r2, [pc, #120] ; (8005a70 <_free_r+0x94>)
|
||
80059f6: 6813 ldr r3, [r2, #0]
|
||
80059f8: 4610 mov r0, r2
|
||
80059fa: b933 cbnz r3, 8005a0a <_free_r+0x2e>
|
||
80059fc: 6063 str r3, [r4, #4]
|
||
80059fe: 6014 str r4, [r2, #0]
|
||
8005a00: 4628 mov r0, r5
|
||
8005a02: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
||
8005a06: f001 bbc3 b.w 8007190 <__malloc_unlock>
|
||
8005a0a: 42a3 cmp r3, r4
|
||
8005a0c: d90a bls.n 8005a24 <_free_r+0x48>
|
||
8005a0e: 6821 ldr r1, [r4, #0]
|
||
8005a10: 1862 adds r2, r4, r1
|
||
8005a12: 4293 cmp r3, r2
|
||
8005a14: bf01 itttt eq
|
||
8005a16: 681a ldreq r2, [r3, #0]
|
||
8005a18: 685b ldreq r3, [r3, #4]
|
||
8005a1a: 1852 addeq r2, r2, r1
|
||
8005a1c: 6022 streq r2, [r4, #0]
|
||
8005a1e: 6063 str r3, [r4, #4]
|
||
8005a20: 6004 str r4, [r0, #0]
|
||
8005a22: e7ed b.n 8005a00 <_free_r+0x24>
|
||
8005a24: 461a mov r2, r3
|
||
8005a26: 685b ldr r3, [r3, #4]
|
||
8005a28: b10b cbz r3, 8005a2e <_free_r+0x52>
|
||
8005a2a: 42a3 cmp r3, r4
|
||
8005a2c: d9fa bls.n 8005a24 <_free_r+0x48>
|
||
8005a2e: 6811 ldr r1, [r2, #0]
|
||
8005a30: 1850 adds r0, r2, r1
|
||
8005a32: 42a0 cmp r0, r4
|
||
8005a34: d10b bne.n 8005a4e <_free_r+0x72>
|
||
8005a36: 6820 ldr r0, [r4, #0]
|
||
8005a38: 4401 add r1, r0
|
||
8005a3a: 1850 adds r0, r2, r1
|
||
8005a3c: 4283 cmp r3, r0
|
||
8005a3e: 6011 str r1, [r2, #0]
|
||
8005a40: d1de bne.n 8005a00 <_free_r+0x24>
|
||
8005a42: 6818 ldr r0, [r3, #0]
|
||
8005a44: 685b ldr r3, [r3, #4]
|
||
8005a46: 4401 add r1, r0
|
||
8005a48: 6011 str r1, [r2, #0]
|
||
8005a4a: 6053 str r3, [r2, #4]
|
||
8005a4c: e7d8 b.n 8005a00 <_free_r+0x24>
|
||
8005a4e: d902 bls.n 8005a56 <_free_r+0x7a>
|
||
8005a50: 230c movs r3, #12
|
||
8005a52: 602b str r3, [r5, #0]
|
||
8005a54: e7d4 b.n 8005a00 <_free_r+0x24>
|
||
8005a56: 6820 ldr r0, [r4, #0]
|
||
8005a58: 1821 adds r1, r4, r0
|
||
8005a5a: 428b cmp r3, r1
|
||
8005a5c: bf01 itttt eq
|
||
8005a5e: 6819 ldreq r1, [r3, #0]
|
||
8005a60: 685b ldreq r3, [r3, #4]
|
||
8005a62: 1809 addeq r1, r1, r0
|
||
8005a64: 6021 streq r1, [r4, #0]
|
||
8005a66: 6063 str r3, [r4, #4]
|
||
8005a68: 6054 str r4, [r2, #4]
|
||
8005a6a: e7c9 b.n 8005a00 <_free_r+0x24>
|
||
8005a6c: bd38 pop {r3, r4, r5, pc}
|
||
8005a6e: bf00 nop
|
||
8005a70: 20000200 .word 0x20000200
|
||
|
||
08005a74 <_malloc_r>:
|
||
8005a74: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8005a76: 1ccd adds r5, r1, #3
|
||
8005a78: f025 0503 bic.w r5, r5, #3
|
||
8005a7c: 3508 adds r5, #8
|
||
8005a7e: 2d0c cmp r5, #12
|
||
8005a80: bf38 it cc
|
||
8005a82: 250c movcc r5, #12
|
||
8005a84: 2d00 cmp r5, #0
|
||
8005a86: 4606 mov r6, r0
|
||
8005a88: db01 blt.n 8005a8e <_malloc_r+0x1a>
|
||
8005a8a: 42a9 cmp r1, r5
|
||
8005a8c: d903 bls.n 8005a96 <_malloc_r+0x22>
|
||
8005a8e: 230c movs r3, #12
|
||
8005a90: 6033 str r3, [r6, #0]
|
||
8005a92: 2000 movs r0, #0
|
||
8005a94: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
8005a96: f001 fb75 bl 8007184 <__malloc_lock>
|
||
8005a9a: 4921 ldr r1, [pc, #132] ; (8005b20 <_malloc_r+0xac>)
|
||
8005a9c: 680a ldr r2, [r1, #0]
|
||
8005a9e: 4614 mov r4, r2
|
||
8005aa0: b99c cbnz r4, 8005aca <_malloc_r+0x56>
|
||
8005aa2: 4f20 ldr r7, [pc, #128] ; (8005b24 <_malloc_r+0xb0>)
|
||
8005aa4: 683b ldr r3, [r7, #0]
|
||
8005aa6: b923 cbnz r3, 8005ab2 <_malloc_r+0x3e>
|
||
8005aa8: 4621 mov r1, r4
|
||
8005aaa: 4630 mov r0, r6
|
||
8005aac: f000 fc9c bl 80063e8 <_sbrk_r>
|
||
8005ab0: 6038 str r0, [r7, #0]
|
||
8005ab2: 4629 mov r1, r5
|
||
8005ab4: 4630 mov r0, r6
|
||
8005ab6: f000 fc97 bl 80063e8 <_sbrk_r>
|
||
8005aba: 1c43 adds r3, r0, #1
|
||
8005abc: d123 bne.n 8005b06 <_malloc_r+0x92>
|
||
8005abe: 230c movs r3, #12
|
||
8005ac0: 4630 mov r0, r6
|
||
8005ac2: 6033 str r3, [r6, #0]
|
||
8005ac4: f001 fb64 bl 8007190 <__malloc_unlock>
|
||
8005ac8: e7e3 b.n 8005a92 <_malloc_r+0x1e>
|
||
8005aca: 6823 ldr r3, [r4, #0]
|
||
8005acc: 1b5b subs r3, r3, r5
|
||
8005ace: d417 bmi.n 8005b00 <_malloc_r+0x8c>
|
||
8005ad0: 2b0b cmp r3, #11
|
||
8005ad2: d903 bls.n 8005adc <_malloc_r+0x68>
|
||
8005ad4: 6023 str r3, [r4, #0]
|
||
8005ad6: 441c add r4, r3
|
||
8005ad8: 6025 str r5, [r4, #0]
|
||
8005ada: e004 b.n 8005ae6 <_malloc_r+0x72>
|
||
8005adc: 6863 ldr r3, [r4, #4]
|
||
8005ade: 42a2 cmp r2, r4
|
||
8005ae0: bf0c ite eq
|
||
8005ae2: 600b streq r3, [r1, #0]
|
||
8005ae4: 6053 strne r3, [r2, #4]
|
||
8005ae6: 4630 mov r0, r6
|
||
8005ae8: f001 fb52 bl 8007190 <__malloc_unlock>
|
||
8005aec: f104 000b add.w r0, r4, #11
|
||
8005af0: 1d23 adds r3, r4, #4
|
||
8005af2: f020 0007 bic.w r0, r0, #7
|
||
8005af6: 1ac2 subs r2, r0, r3
|
||
8005af8: d0cc beq.n 8005a94 <_malloc_r+0x20>
|
||
8005afa: 1a1b subs r3, r3, r0
|
||
8005afc: 50a3 str r3, [r4, r2]
|
||
8005afe: e7c9 b.n 8005a94 <_malloc_r+0x20>
|
||
8005b00: 4622 mov r2, r4
|
||
8005b02: 6864 ldr r4, [r4, #4]
|
||
8005b04: e7cc b.n 8005aa0 <_malloc_r+0x2c>
|
||
8005b06: 1cc4 adds r4, r0, #3
|
||
8005b08: f024 0403 bic.w r4, r4, #3
|
||
8005b0c: 42a0 cmp r0, r4
|
||
8005b0e: d0e3 beq.n 8005ad8 <_malloc_r+0x64>
|
||
8005b10: 1a21 subs r1, r4, r0
|
||
8005b12: 4630 mov r0, r6
|
||
8005b14: f000 fc68 bl 80063e8 <_sbrk_r>
|
||
8005b18: 3001 adds r0, #1
|
||
8005b1a: d1dd bne.n 8005ad8 <_malloc_r+0x64>
|
||
8005b1c: e7cf b.n 8005abe <_malloc_r+0x4a>
|
||
8005b1e: bf00 nop
|
||
8005b20: 20000200 .word 0x20000200
|
||
8005b24: 20000204 .word 0x20000204
|
||
|
||
08005b28 <__cvt>:
|
||
8005b28: 2b00 cmp r3, #0
|
||
8005b2a: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8005b2e: 461f mov r7, r3
|
||
8005b30: bfbb ittet lt
|
||
8005b32: f103 4300 addlt.w r3, r3, #2147483648 ; 0x80000000
|
||
8005b36: 461f movlt r7, r3
|
||
8005b38: 2300 movge r3, #0
|
||
8005b3a: 232d movlt r3, #45 ; 0x2d
|
||
8005b3c: b088 sub sp, #32
|
||
8005b3e: 4614 mov r4, r2
|
||
8005b40: 9a12 ldr r2, [sp, #72] ; 0x48
|
||
8005b42: 9d10 ldr r5, [sp, #64] ; 0x40
|
||
8005b44: 7013 strb r3, [r2, #0]
|
||
8005b46: 9b14 ldr r3, [sp, #80] ; 0x50
|
||
8005b48: f8dd a04c ldr.w sl, [sp, #76] ; 0x4c
|
||
8005b4c: f023 0820 bic.w r8, r3, #32
|
||
8005b50: f1b8 0f46 cmp.w r8, #70 ; 0x46
|
||
8005b54: d005 beq.n 8005b62 <__cvt+0x3a>
|
||
8005b56: f1b8 0f45 cmp.w r8, #69 ; 0x45
|
||
8005b5a: d100 bne.n 8005b5e <__cvt+0x36>
|
||
8005b5c: 3501 adds r5, #1
|
||
8005b5e: 2302 movs r3, #2
|
||
8005b60: e000 b.n 8005b64 <__cvt+0x3c>
|
||
8005b62: 2303 movs r3, #3
|
||
8005b64: aa07 add r2, sp, #28
|
||
8005b66: 9204 str r2, [sp, #16]
|
||
8005b68: aa06 add r2, sp, #24
|
||
8005b6a: e9cd a202 strd sl, r2, [sp, #8]
|
||
8005b6e: e9cd 3500 strd r3, r5, [sp]
|
||
8005b72: 4622 mov r2, r4
|
||
8005b74: 463b mov r3, r7
|
||
8005b76: f000 fcf7 bl 8006568 <_dtoa_r>
|
||
8005b7a: f1b8 0f47 cmp.w r8, #71 ; 0x47
|
||
8005b7e: 4606 mov r6, r0
|
||
8005b80: d102 bne.n 8005b88 <__cvt+0x60>
|
||
8005b82: 9b11 ldr r3, [sp, #68] ; 0x44
|
||
8005b84: 07db lsls r3, r3, #31
|
||
8005b86: d522 bpl.n 8005bce <__cvt+0xa6>
|
||
8005b88: f1b8 0f46 cmp.w r8, #70 ; 0x46
|
||
8005b8c: eb06 0905 add.w r9, r6, r5
|
||
8005b90: d110 bne.n 8005bb4 <__cvt+0x8c>
|
||
8005b92: 7833 ldrb r3, [r6, #0]
|
||
8005b94: 2b30 cmp r3, #48 ; 0x30
|
||
8005b96: d10a bne.n 8005bae <__cvt+0x86>
|
||
8005b98: 2200 movs r2, #0
|
||
8005b9a: 2300 movs r3, #0
|
||
8005b9c: 4620 mov r0, r4
|
||
8005b9e: 4639 mov r1, r7
|
||
8005ba0: f7fa ff6e bl 8000a80 <__aeabi_dcmpeq>
|
||
8005ba4: b918 cbnz r0, 8005bae <__cvt+0x86>
|
||
8005ba6: f1c5 0501 rsb r5, r5, #1
|
||
8005baa: f8ca 5000 str.w r5, [sl]
|
||
8005bae: f8da 3000 ldr.w r3, [sl]
|
||
8005bb2: 4499 add r9, r3
|
||
8005bb4: 2200 movs r2, #0
|
||
8005bb6: 2300 movs r3, #0
|
||
8005bb8: 4620 mov r0, r4
|
||
8005bba: 4639 mov r1, r7
|
||
8005bbc: f7fa ff60 bl 8000a80 <__aeabi_dcmpeq>
|
||
8005bc0: b108 cbz r0, 8005bc6 <__cvt+0x9e>
|
||
8005bc2: f8cd 901c str.w r9, [sp, #28]
|
||
8005bc6: 2230 movs r2, #48 ; 0x30
|
||
8005bc8: 9b07 ldr r3, [sp, #28]
|
||
8005bca: 454b cmp r3, r9
|
||
8005bcc: d307 bcc.n 8005bde <__cvt+0xb6>
|
||
8005bce: 4630 mov r0, r6
|
||
8005bd0: 9b07 ldr r3, [sp, #28]
|
||
8005bd2: 9a15 ldr r2, [sp, #84] ; 0x54
|
||
8005bd4: 1b9b subs r3, r3, r6
|
||
8005bd6: 6013 str r3, [r2, #0]
|
||
8005bd8: b008 add sp, #32
|
||
8005bda: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8005bde: 1c59 adds r1, r3, #1
|
||
8005be0: 9107 str r1, [sp, #28]
|
||
8005be2: 701a strb r2, [r3, #0]
|
||
8005be4: e7f0 b.n 8005bc8 <__cvt+0xa0>
|
||
|
||
08005be6 <__exponent>:
|
||
8005be6: 4603 mov r3, r0
|
||
8005be8: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr}
|
||
8005bea: 2900 cmp r1, #0
|
||
8005bec: f803 2b02 strb.w r2, [r3], #2
|
||
8005bf0: bfb6 itet lt
|
||
8005bf2: 222d movlt r2, #45 ; 0x2d
|
||
8005bf4: 222b movge r2, #43 ; 0x2b
|
||
8005bf6: 4249 neglt r1, r1
|
||
8005bf8: 2909 cmp r1, #9
|
||
8005bfa: 7042 strb r2, [r0, #1]
|
||
8005bfc: dd2b ble.n 8005c56 <__exponent+0x70>
|
||
8005bfe: f10d 0407 add.w r4, sp, #7
|
||
8005c02: 46a4 mov ip, r4
|
||
8005c04: 270a movs r7, #10
|
||
8005c06: fb91 f6f7 sdiv r6, r1, r7
|
||
8005c0a: 460a mov r2, r1
|
||
8005c0c: 46a6 mov lr, r4
|
||
8005c0e: fb07 1516 mls r5, r7, r6, r1
|
||
8005c12: 2a63 cmp r2, #99 ; 0x63
|
||
8005c14: f105 0530 add.w r5, r5, #48 ; 0x30
|
||
8005c18: 4631 mov r1, r6
|
||
8005c1a: f104 34ff add.w r4, r4, #4294967295 ; 0xffffffff
|
||
8005c1e: f80e 5c01 strb.w r5, [lr, #-1]
|
||
8005c22: dcf0 bgt.n 8005c06 <__exponent+0x20>
|
||
8005c24: 3130 adds r1, #48 ; 0x30
|
||
8005c26: f1ae 0502 sub.w r5, lr, #2
|
||
8005c2a: f804 1c01 strb.w r1, [r4, #-1]
|
||
8005c2e: 4629 mov r1, r5
|
||
8005c30: 1c44 adds r4, r0, #1
|
||
8005c32: 4561 cmp r1, ip
|
||
8005c34: d30a bcc.n 8005c4c <__exponent+0x66>
|
||
8005c36: f10d 0209 add.w r2, sp, #9
|
||
8005c3a: eba2 020e sub.w r2, r2, lr
|
||
8005c3e: 4565 cmp r5, ip
|
||
8005c40: bf88 it hi
|
||
8005c42: 2200 movhi r2, #0
|
||
8005c44: 4413 add r3, r2
|
||
8005c46: 1a18 subs r0, r3, r0
|
||
8005c48: b003 add sp, #12
|
||
8005c4a: bdf0 pop {r4, r5, r6, r7, pc}
|
||
8005c4c: f811 2b01 ldrb.w r2, [r1], #1
|
||
8005c50: f804 2f01 strb.w r2, [r4, #1]!
|
||
8005c54: e7ed b.n 8005c32 <__exponent+0x4c>
|
||
8005c56: 2330 movs r3, #48 ; 0x30
|
||
8005c58: 3130 adds r1, #48 ; 0x30
|
||
8005c5a: 7083 strb r3, [r0, #2]
|
||
8005c5c: 70c1 strb r1, [r0, #3]
|
||
8005c5e: 1d03 adds r3, r0, #4
|
||
8005c60: e7f1 b.n 8005c46 <__exponent+0x60>
|
||
...
|
||
|
||
08005c64 <_printf_float>:
|
||
8005c64: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8005c68: b091 sub sp, #68 ; 0x44
|
||
8005c6a: 460c mov r4, r1
|
||
8005c6c: f8dd 8068 ldr.w r8, [sp, #104] ; 0x68
|
||
8005c70: 4616 mov r6, r2
|
||
8005c72: 461f mov r7, r3
|
||
8005c74: 4605 mov r5, r0
|
||
8005c76: f001 fa65 bl 8007144 <_localeconv_r>
|
||
8005c7a: 6803 ldr r3, [r0, #0]
|
||
8005c7c: 4618 mov r0, r3
|
||
8005c7e: 9309 str r3, [sp, #36] ; 0x24
|
||
8005c80: f7fa fad2 bl 8000228 <strlen>
|
||
8005c84: 2300 movs r3, #0
|
||
8005c86: 930e str r3, [sp, #56] ; 0x38
|
||
8005c88: f8d8 3000 ldr.w r3, [r8]
|
||
8005c8c: 900a str r0, [sp, #40] ; 0x28
|
||
8005c8e: 3307 adds r3, #7
|
||
8005c90: f023 0307 bic.w r3, r3, #7
|
||
8005c94: f103 0208 add.w r2, r3, #8
|
||
8005c98: f894 9018 ldrb.w r9, [r4, #24]
|
||
8005c9c: f8d4 b000 ldr.w fp, [r4]
|
||
8005ca0: f8c8 2000 str.w r2, [r8]
|
||
8005ca4: e9d3 2300 ldrd r2, r3, [r3]
|
||
8005ca8: e9c4 2312 strd r2, r3, [r4, #72] ; 0x48
|
||
8005cac: e9d4 8a12 ldrd r8, sl, [r4, #72] ; 0x48
|
||
8005cb0: f02a 4300 bic.w r3, sl, #2147483648 ; 0x80000000
|
||
8005cb4: 930b str r3, [sp, #44] ; 0x2c
|
||
8005cb6: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8005cba: 4640 mov r0, r8
|
||
8005cbc: 4b9c ldr r3, [pc, #624] ; (8005f30 <_printf_float+0x2cc>)
|
||
8005cbe: 990b ldr r1, [sp, #44] ; 0x2c
|
||
8005cc0: f7fa ff10 bl 8000ae4 <__aeabi_dcmpun>
|
||
8005cc4: bb70 cbnz r0, 8005d24 <_printf_float+0xc0>
|
||
8005cc6: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8005cca: 4640 mov r0, r8
|
||
8005ccc: 4b98 ldr r3, [pc, #608] ; (8005f30 <_printf_float+0x2cc>)
|
||
8005cce: 990b ldr r1, [sp, #44] ; 0x2c
|
||
8005cd0: f7fa feea bl 8000aa8 <__aeabi_dcmple>
|
||
8005cd4: bb30 cbnz r0, 8005d24 <_printf_float+0xc0>
|
||
8005cd6: 2200 movs r2, #0
|
||
8005cd8: 2300 movs r3, #0
|
||
8005cda: 4640 mov r0, r8
|
||
8005cdc: 4651 mov r1, sl
|
||
8005cde: f7fa fed9 bl 8000a94 <__aeabi_dcmplt>
|
||
8005ce2: b110 cbz r0, 8005cea <_printf_float+0x86>
|
||
8005ce4: 232d movs r3, #45 ; 0x2d
|
||
8005ce6: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
8005cea: 4b92 ldr r3, [pc, #584] ; (8005f34 <_printf_float+0x2d0>)
|
||
8005cec: 4892 ldr r0, [pc, #584] ; (8005f38 <_printf_float+0x2d4>)
|
||
8005cee: f1b9 0f47 cmp.w r9, #71 ; 0x47
|
||
8005cf2: bf94 ite ls
|
||
8005cf4: 4698 movls r8, r3
|
||
8005cf6: 4680 movhi r8, r0
|
||
8005cf8: 2303 movs r3, #3
|
||
8005cfa: f04f 0a00 mov.w sl, #0
|
||
8005cfe: 6123 str r3, [r4, #16]
|
||
8005d00: f02b 0304 bic.w r3, fp, #4
|
||
8005d04: 6023 str r3, [r4, #0]
|
||
8005d06: 4633 mov r3, r6
|
||
8005d08: 4621 mov r1, r4
|
||
8005d0a: 4628 mov r0, r5
|
||
8005d0c: 9700 str r7, [sp, #0]
|
||
8005d0e: aa0f add r2, sp, #60 ; 0x3c
|
||
8005d10: f000 f9d4 bl 80060bc <_printf_common>
|
||
8005d14: 3001 adds r0, #1
|
||
8005d16: f040 8090 bne.w 8005e3a <_printf_float+0x1d6>
|
||
8005d1a: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8005d1e: b011 add sp, #68 ; 0x44
|
||
8005d20: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8005d24: 4642 mov r2, r8
|
||
8005d26: 4653 mov r3, sl
|
||
8005d28: 4640 mov r0, r8
|
||
8005d2a: 4651 mov r1, sl
|
||
8005d2c: f7fa feda bl 8000ae4 <__aeabi_dcmpun>
|
||
8005d30: b148 cbz r0, 8005d46 <_printf_float+0xe2>
|
||
8005d32: f1ba 0f00 cmp.w sl, #0
|
||
8005d36: bfb8 it lt
|
||
8005d38: 232d movlt r3, #45 ; 0x2d
|
||
8005d3a: 4880 ldr r0, [pc, #512] ; (8005f3c <_printf_float+0x2d8>)
|
||
8005d3c: bfb8 it lt
|
||
8005d3e: f884 3043 strblt.w r3, [r4, #67] ; 0x43
|
||
8005d42: 4b7f ldr r3, [pc, #508] ; (8005f40 <_printf_float+0x2dc>)
|
||
8005d44: e7d3 b.n 8005cee <_printf_float+0x8a>
|
||
8005d46: 6863 ldr r3, [r4, #4]
|
||
8005d48: f009 01df and.w r1, r9, #223 ; 0xdf
|
||
8005d4c: 1c5a adds r2, r3, #1
|
||
8005d4e: d142 bne.n 8005dd6 <_printf_float+0x172>
|
||
8005d50: 2306 movs r3, #6
|
||
8005d52: 6063 str r3, [r4, #4]
|
||
8005d54: 2200 movs r2, #0
|
||
8005d56: 9206 str r2, [sp, #24]
|
||
8005d58: aa0e add r2, sp, #56 ; 0x38
|
||
8005d5a: e9cd 9204 strd r9, r2, [sp, #16]
|
||
8005d5e: aa0d add r2, sp, #52 ; 0x34
|
||
8005d60: f44b 6380 orr.w r3, fp, #1024 ; 0x400
|
||
8005d64: 9203 str r2, [sp, #12]
|
||
8005d66: f10d 0233 add.w r2, sp, #51 ; 0x33
|
||
8005d6a: e9cd 3201 strd r3, r2, [sp, #4]
|
||
8005d6e: 6023 str r3, [r4, #0]
|
||
8005d70: 6863 ldr r3, [r4, #4]
|
||
8005d72: 4642 mov r2, r8
|
||
8005d74: 9300 str r3, [sp, #0]
|
||
8005d76: 4628 mov r0, r5
|
||
8005d78: 4653 mov r3, sl
|
||
8005d7a: 910b str r1, [sp, #44] ; 0x2c
|
||
8005d7c: f7ff fed4 bl 8005b28 <__cvt>
|
||
8005d80: 990b ldr r1, [sp, #44] ; 0x2c
|
||
8005d82: 4680 mov r8, r0
|
||
8005d84: 2947 cmp r1, #71 ; 0x47
|
||
8005d86: 990d ldr r1, [sp, #52] ; 0x34
|
||
8005d88: d108 bne.n 8005d9c <_printf_float+0x138>
|
||
8005d8a: 1cc8 adds r0, r1, #3
|
||
8005d8c: db02 blt.n 8005d94 <_printf_float+0x130>
|
||
8005d8e: 6863 ldr r3, [r4, #4]
|
||
8005d90: 4299 cmp r1, r3
|
||
8005d92: dd40 ble.n 8005e16 <_printf_float+0x1b2>
|
||
8005d94: f1a9 0902 sub.w r9, r9, #2
|
||
8005d98: fa5f f989 uxtb.w r9, r9
|
||
8005d9c: f1b9 0f65 cmp.w r9, #101 ; 0x65
|
||
8005da0: d81f bhi.n 8005de2 <_printf_float+0x17e>
|
||
8005da2: 464a mov r2, r9
|
||
8005da4: 3901 subs r1, #1
|
||
8005da6: f104 0050 add.w r0, r4, #80 ; 0x50
|
||
8005daa: 910d str r1, [sp, #52] ; 0x34
|
||
8005dac: f7ff ff1b bl 8005be6 <__exponent>
|
||
8005db0: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
8005db2: 4682 mov sl, r0
|
||
8005db4: 1813 adds r3, r2, r0
|
||
8005db6: 2a01 cmp r2, #1
|
||
8005db8: 6123 str r3, [r4, #16]
|
||
8005dba: dc02 bgt.n 8005dc2 <_printf_float+0x15e>
|
||
8005dbc: 6822 ldr r2, [r4, #0]
|
||
8005dbe: 07d2 lsls r2, r2, #31
|
||
8005dc0: d501 bpl.n 8005dc6 <_printf_float+0x162>
|
||
8005dc2: 3301 adds r3, #1
|
||
8005dc4: 6123 str r3, [r4, #16]
|
||
8005dc6: f89d 3033 ldrb.w r3, [sp, #51] ; 0x33
|
||
8005dca: 2b00 cmp r3, #0
|
||
8005dcc: d09b beq.n 8005d06 <_printf_float+0xa2>
|
||
8005dce: 232d movs r3, #45 ; 0x2d
|
||
8005dd0: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
8005dd4: e797 b.n 8005d06 <_printf_float+0xa2>
|
||
8005dd6: 2947 cmp r1, #71 ; 0x47
|
||
8005dd8: d1bc bne.n 8005d54 <_printf_float+0xf0>
|
||
8005dda: 2b00 cmp r3, #0
|
||
8005ddc: d1ba bne.n 8005d54 <_printf_float+0xf0>
|
||
8005dde: 2301 movs r3, #1
|
||
8005de0: e7b7 b.n 8005d52 <_printf_float+0xee>
|
||
8005de2: f1b9 0f66 cmp.w r9, #102 ; 0x66
|
||
8005de6: d118 bne.n 8005e1a <_printf_float+0x1b6>
|
||
8005de8: 2900 cmp r1, #0
|
||
8005dea: 6863 ldr r3, [r4, #4]
|
||
8005dec: dd0b ble.n 8005e06 <_printf_float+0x1a2>
|
||
8005dee: 6121 str r1, [r4, #16]
|
||
8005df0: b913 cbnz r3, 8005df8 <_printf_float+0x194>
|
||
8005df2: 6822 ldr r2, [r4, #0]
|
||
8005df4: 07d0 lsls r0, r2, #31
|
||
8005df6: d502 bpl.n 8005dfe <_printf_float+0x19a>
|
||
8005df8: 3301 adds r3, #1
|
||
8005dfa: 440b add r3, r1
|
||
8005dfc: 6123 str r3, [r4, #16]
|
||
8005dfe: f04f 0a00 mov.w sl, #0
|
||
8005e02: 65a1 str r1, [r4, #88] ; 0x58
|
||
8005e04: e7df b.n 8005dc6 <_printf_float+0x162>
|
||
8005e06: b913 cbnz r3, 8005e0e <_printf_float+0x1aa>
|
||
8005e08: 6822 ldr r2, [r4, #0]
|
||
8005e0a: 07d2 lsls r2, r2, #31
|
||
8005e0c: d501 bpl.n 8005e12 <_printf_float+0x1ae>
|
||
8005e0e: 3302 adds r3, #2
|
||
8005e10: e7f4 b.n 8005dfc <_printf_float+0x198>
|
||
8005e12: 2301 movs r3, #1
|
||
8005e14: e7f2 b.n 8005dfc <_printf_float+0x198>
|
||
8005e16: f04f 0967 mov.w r9, #103 ; 0x67
|
||
8005e1a: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8005e1c: 4299 cmp r1, r3
|
||
8005e1e: db05 blt.n 8005e2c <_printf_float+0x1c8>
|
||
8005e20: 6823 ldr r3, [r4, #0]
|
||
8005e22: 6121 str r1, [r4, #16]
|
||
8005e24: 07d8 lsls r0, r3, #31
|
||
8005e26: d5ea bpl.n 8005dfe <_printf_float+0x19a>
|
||
8005e28: 1c4b adds r3, r1, #1
|
||
8005e2a: e7e7 b.n 8005dfc <_printf_float+0x198>
|
||
8005e2c: 2900 cmp r1, #0
|
||
8005e2e: bfcc ite gt
|
||
8005e30: 2201 movgt r2, #1
|
||
8005e32: f1c1 0202 rsble r2, r1, #2
|
||
8005e36: 4413 add r3, r2
|
||
8005e38: e7e0 b.n 8005dfc <_printf_float+0x198>
|
||
8005e3a: 6823 ldr r3, [r4, #0]
|
||
8005e3c: 055a lsls r2, r3, #21
|
||
8005e3e: d407 bmi.n 8005e50 <_printf_float+0x1ec>
|
||
8005e40: 6923 ldr r3, [r4, #16]
|
||
8005e42: 4642 mov r2, r8
|
||
8005e44: 4631 mov r1, r6
|
||
8005e46: 4628 mov r0, r5
|
||
8005e48: 47b8 blx r7
|
||
8005e4a: 3001 adds r0, #1
|
||
8005e4c: d12b bne.n 8005ea6 <_printf_float+0x242>
|
||
8005e4e: e764 b.n 8005d1a <_printf_float+0xb6>
|
||
8005e50: f1b9 0f65 cmp.w r9, #101 ; 0x65
|
||
8005e54: f240 80dd bls.w 8006012 <_printf_float+0x3ae>
|
||
8005e58: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48
|
||
8005e5c: 2200 movs r2, #0
|
||
8005e5e: 2300 movs r3, #0
|
||
8005e60: f7fa fe0e bl 8000a80 <__aeabi_dcmpeq>
|
||
8005e64: 2800 cmp r0, #0
|
||
8005e66: d033 beq.n 8005ed0 <_printf_float+0x26c>
|
||
8005e68: 2301 movs r3, #1
|
||
8005e6a: 4631 mov r1, r6
|
||
8005e6c: 4628 mov r0, r5
|
||
8005e6e: 4a35 ldr r2, [pc, #212] ; (8005f44 <_printf_float+0x2e0>)
|
||
8005e70: 47b8 blx r7
|
||
8005e72: 3001 adds r0, #1
|
||
8005e74: f43f af51 beq.w 8005d1a <_printf_float+0xb6>
|
||
8005e78: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
8005e7c: 429a cmp r2, r3
|
||
8005e7e: db02 blt.n 8005e86 <_printf_float+0x222>
|
||
8005e80: 6823 ldr r3, [r4, #0]
|
||
8005e82: 07d8 lsls r0, r3, #31
|
||
8005e84: d50f bpl.n 8005ea6 <_printf_float+0x242>
|
||
8005e86: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
8005e8a: 4631 mov r1, r6
|
||
8005e8c: 4628 mov r0, r5
|
||
8005e8e: 47b8 blx r7
|
||
8005e90: 3001 adds r0, #1
|
||
8005e92: f43f af42 beq.w 8005d1a <_printf_float+0xb6>
|
||
8005e96: f04f 0800 mov.w r8, #0
|
||
8005e9a: f104 091a add.w r9, r4, #26
|
||
8005e9e: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8005ea0: 3b01 subs r3, #1
|
||
8005ea2: 4543 cmp r3, r8
|
||
8005ea4: dc09 bgt.n 8005eba <_printf_float+0x256>
|
||
8005ea6: 6823 ldr r3, [r4, #0]
|
||
8005ea8: 079b lsls r3, r3, #30
|
||
8005eaa: f100 8102 bmi.w 80060b2 <_printf_float+0x44e>
|
||
8005eae: 68e0 ldr r0, [r4, #12]
|
||
8005eb0: 9b0f ldr r3, [sp, #60] ; 0x3c
|
||
8005eb2: 4298 cmp r0, r3
|
||
8005eb4: bfb8 it lt
|
||
8005eb6: 4618 movlt r0, r3
|
||
8005eb8: e731 b.n 8005d1e <_printf_float+0xba>
|
||
8005eba: 2301 movs r3, #1
|
||
8005ebc: 464a mov r2, r9
|
||
8005ebe: 4631 mov r1, r6
|
||
8005ec0: 4628 mov r0, r5
|
||
8005ec2: 47b8 blx r7
|
||
8005ec4: 3001 adds r0, #1
|
||
8005ec6: f43f af28 beq.w 8005d1a <_printf_float+0xb6>
|
||
8005eca: f108 0801 add.w r8, r8, #1
|
||
8005ece: e7e6 b.n 8005e9e <_printf_float+0x23a>
|
||
8005ed0: 9b0d ldr r3, [sp, #52] ; 0x34
|
||
8005ed2: 2b00 cmp r3, #0
|
||
8005ed4: dc38 bgt.n 8005f48 <_printf_float+0x2e4>
|
||
8005ed6: 2301 movs r3, #1
|
||
8005ed8: 4631 mov r1, r6
|
||
8005eda: 4628 mov r0, r5
|
||
8005edc: 4a19 ldr r2, [pc, #100] ; (8005f44 <_printf_float+0x2e0>)
|
||
8005ede: 47b8 blx r7
|
||
8005ee0: 3001 adds r0, #1
|
||
8005ee2: f43f af1a beq.w 8005d1a <_printf_float+0xb6>
|
||
8005ee6: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
8005eea: 4313 orrs r3, r2
|
||
8005eec: d102 bne.n 8005ef4 <_printf_float+0x290>
|
||
8005eee: 6823 ldr r3, [r4, #0]
|
||
8005ef0: 07d9 lsls r1, r3, #31
|
||
8005ef2: d5d8 bpl.n 8005ea6 <_printf_float+0x242>
|
||
8005ef4: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
8005ef8: 4631 mov r1, r6
|
||
8005efa: 4628 mov r0, r5
|
||
8005efc: 47b8 blx r7
|
||
8005efe: 3001 adds r0, #1
|
||
8005f00: f43f af0b beq.w 8005d1a <_printf_float+0xb6>
|
||
8005f04: f04f 0900 mov.w r9, #0
|
||
8005f08: f104 0a1a add.w sl, r4, #26
|
||
8005f0c: 9b0d ldr r3, [sp, #52] ; 0x34
|
||
8005f0e: 425b negs r3, r3
|
||
8005f10: 454b cmp r3, r9
|
||
8005f12: dc01 bgt.n 8005f18 <_printf_float+0x2b4>
|
||
8005f14: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8005f16: e794 b.n 8005e42 <_printf_float+0x1de>
|
||
8005f18: 2301 movs r3, #1
|
||
8005f1a: 4652 mov r2, sl
|
||
8005f1c: 4631 mov r1, r6
|
||
8005f1e: 4628 mov r0, r5
|
||
8005f20: 47b8 blx r7
|
||
8005f22: 3001 adds r0, #1
|
||
8005f24: f43f aef9 beq.w 8005d1a <_printf_float+0xb6>
|
||
8005f28: f109 0901 add.w r9, r9, #1
|
||
8005f2c: e7ee b.n 8005f0c <_printf_float+0x2a8>
|
||
8005f2e: bf00 nop
|
||
8005f30: 7fefffff .word 0x7fefffff
|
||
8005f34: 08009290 .word 0x08009290
|
||
8005f38: 08009294 .word 0x08009294
|
||
8005f3c: 0800929c .word 0x0800929c
|
||
8005f40: 08009298 .word 0x08009298
|
||
8005f44: 080092a0 .word 0x080092a0
|
||
8005f48: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
8005f4a: 6da3 ldr r3, [r4, #88] ; 0x58
|
||
8005f4c: 429a cmp r2, r3
|
||
8005f4e: bfa8 it ge
|
||
8005f50: 461a movge r2, r3
|
||
8005f52: 2a00 cmp r2, #0
|
||
8005f54: 4691 mov r9, r2
|
||
8005f56: dc37 bgt.n 8005fc8 <_printf_float+0x364>
|
||
8005f58: f04f 0b00 mov.w fp, #0
|
||
8005f5c: ea29 79e9 bic.w r9, r9, r9, asr #31
|
||
8005f60: f104 021a add.w r2, r4, #26
|
||
8005f64: f8d4 a058 ldr.w sl, [r4, #88] ; 0x58
|
||
8005f68: ebaa 0309 sub.w r3, sl, r9
|
||
8005f6c: 455b cmp r3, fp
|
||
8005f6e: dc33 bgt.n 8005fd8 <_printf_float+0x374>
|
||
8005f70: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
8005f74: 429a cmp r2, r3
|
||
8005f76: db3b blt.n 8005ff0 <_printf_float+0x38c>
|
||
8005f78: 6823 ldr r3, [r4, #0]
|
||
8005f7a: 07da lsls r2, r3, #31
|
||
8005f7c: d438 bmi.n 8005ff0 <_printf_float+0x38c>
|
||
8005f7e: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
8005f80: 990d ldr r1, [sp, #52] ; 0x34
|
||
8005f82: eba2 030a sub.w r3, r2, sl
|
||
8005f86: eba2 0901 sub.w r9, r2, r1
|
||
8005f8a: 4599 cmp r9, r3
|
||
8005f8c: bfa8 it ge
|
||
8005f8e: 4699 movge r9, r3
|
||
8005f90: f1b9 0f00 cmp.w r9, #0
|
||
8005f94: dc34 bgt.n 8006000 <_printf_float+0x39c>
|
||
8005f96: f04f 0800 mov.w r8, #0
|
||
8005f9a: ea29 79e9 bic.w r9, r9, r9, asr #31
|
||
8005f9e: f104 0a1a add.w sl, r4, #26
|
||
8005fa2: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
8005fa6: 1a9b subs r3, r3, r2
|
||
8005fa8: eba3 0309 sub.w r3, r3, r9
|
||
8005fac: 4543 cmp r3, r8
|
||
8005fae: f77f af7a ble.w 8005ea6 <_printf_float+0x242>
|
||
8005fb2: 2301 movs r3, #1
|
||
8005fb4: 4652 mov r2, sl
|
||
8005fb6: 4631 mov r1, r6
|
||
8005fb8: 4628 mov r0, r5
|
||
8005fba: 47b8 blx r7
|
||
8005fbc: 3001 adds r0, #1
|
||
8005fbe: f43f aeac beq.w 8005d1a <_printf_float+0xb6>
|
||
8005fc2: f108 0801 add.w r8, r8, #1
|
||
8005fc6: e7ec b.n 8005fa2 <_printf_float+0x33e>
|
||
8005fc8: 4613 mov r3, r2
|
||
8005fca: 4631 mov r1, r6
|
||
8005fcc: 4642 mov r2, r8
|
||
8005fce: 4628 mov r0, r5
|
||
8005fd0: 47b8 blx r7
|
||
8005fd2: 3001 adds r0, #1
|
||
8005fd4: d1c0 bne.n 8005f58 <_printf_float+0x2f4>
|
||
8005fd6: e6a0 b.n 8005d1a <_printf_float+0xb6>
|
||
8005fd8: 2301 movs r3, #1
|
||
8005fda: 4631 mov r1, r6
|
||
8005fdc: 4628 mov r0, r5
|
||
8005fde: 920b str r2, [sp, #44] ; 0x2c
|
||
8005fe0: 47b8 blx r7
|
||
8005fe2: 3001 adds r0, #1
|
||
8005fe4: f43f ae99 beq.w 8005d1a <_printf_float+0xb6>
|
||
8005fe8: 9a0b ldr r2, [sp, #44] ; 0x2c
|
||
8005fea: f10b 0b01 add.w fp, fp, #1
|
||
8005fee: e7b9 b.n 8005f64 <_printf_float+0x300>
|
||
8005ff0: 4631 mov r1, r6
|
||
8005ff2: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
8005ff6: 4628 mov r0, r5
|
||
8005ff8: 47b8 blx r7
|
||
8005ffa: 3001 adds r0, #1
|
||
8005ffc: d1bf bne.n 8005f7e <_printf_float+0x31a>
|
||
8005ffe: e68c b.n 8005d1a <_printf_float+0xb6>
|
||
8006000: 464b mov r3, r9
|
||
8006002: 4631 mov r1, r6
|
||
8006004: 4628 mov r0, r5
|
||
8006006: eb08 020a add.w r2, r8, sl
|
||
800600a: 47b8 blx r7
|
||
800600c: 3001 adds r0, #1
|
||
800600e: d1c2 bne.n 8005f96 <_printf_float+0x332>
|
||
8006010: e683 b.n 8005d1a <_printf_float+0xb6>
|
||
8006012: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
8006014: 2a01 cmp r2, #1
|
||
8006016: dc01 bgt.n 800601c <_printf_float+0x3b8>
|
||
8006018: 07db lsls r3, r3, #31
|
||
800601a: d537 bpl.n 800608c <_printf_float+0x428>
|
||
800601c: 2301 movs r3, #1
|
||
800601e: 4642 mov r2, r8
|
||
8006020: 4631 mov r1, r6
|
||
8006022: 4628 mov r0, r5
|
||
8006024: 47b8 blx r7
|
||
8006026: 3001 adds r0, #1
|
||
8006028: f43f ae77 beq.w 8005d1a <_printf_float+0xb6>
|
||
800602c: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
8006030: 4631 mov r1, r6
|
||
8006032: 4628 mov r0, r5
|
||
8006034: 47b8 blx r7
|
||
8006036: 3001 adds r0, #1
|
||
8006038: f43f ae6f beq.w 8005d1a <_printf_float+0xb6>
|
||
800603c: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48
|
||
8006040: 2200 movs r2, #0
|
||
8006042: 2300 movs r3, #0
|
||
8006044: f7fa fd1c bl 8000a80 <__aeabi_dcmpeq>
|
||
8006048: b9d8 cbnz r0, 8006082 <_printf_float+0x41e>
|
||
800604a: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
800604c: f108 0201 add.w r2, r8, #1
|
||
8006050: 3b01 subs r3, #1
|
||
8006052: 4631 mov r1, r6
|
||
8006054: 4628 mov r0, r5
|
||
8006056: 47b8 blx r7
|
||
8006058: 3001 adds r0, #1
|
||
800605a: d10e bne.n 800607a <_printf_float+0x416>
|
||
800605c: e65d b.n 8005d1a <_printf_float+0xb6>
|
||
800605e: 2301 movs r3, #1
|
||
8006060: 464a mov r2, r9
|
||
8006062: 4631 mov r1, r6
|
||
8006064: 4628 mov r0, r5
|
||
8006066: 47b8 blx r7
|
||
8006068: 3001 adds r0, #1
|
||
800606a: f43f ae56 beq.w 8005d1a <_printf_float+0xb6>
|
||
800606e: f108 0801 add.w r8, r8, #1
|
||
8006072: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8006074: 3b01 subs r3, #1
|
||
8006076: 4543 cmp r3, r8
|
||
8006078: dcf1 bgt.n 800605e <_printf_float+0x3fa>
|
||
800607a: 4653 mov r3, sl
|
||
800607c: f104 0250 add.w r2, r4, #80 ; 0x50
|
||
8006080: e6e0 b.n 8005e44 <_printf_float+0x1e0>
|
||
8006082: f04f 0800 mov.w r8, #0
|
||
8006086: f104 091a add.w r9, r4, #26
|
||
800608a: e7f2 b.n 8006072 <_printf_float+0x40e>
|
||
800608c: 2301 movs r3, #1
|
||
800608e: 4642 mov r2, r8
|
||
8006090: e7df b.n 8006052 <_printf_float+0x3ee>
|
||
8006092: 2301 movs r3, #1
|
||
8006094: 464a mov r2, r9
|
||
8006096: 4631 mov r1, r6
|
||
8006098: 4628 mov r0, r5
|
||
800609a: 47b8 blx r7
|
||
800609c: 3001 adds r0, #1
|
||
800609e: f43f ae3c beq.w 8005d1a <_printf_float+0xb6>
|
||
80060a2: f108 0801 add.w r8, r8, #1
|
||
80060a6: 68e3 ldr r3, [r4, #12]
|
||
80060a8: 990f ldr r1, [sp, #60] ; 0x3c
|
||
80060aa: 1a5b subs r3, r3, r1
|
||
80060ac: 4543 cmp r3, r8
|
||
80060ae: dcf0 bgt.n 8006092 <_printf_float+0x42e>
|
||
80060b0: e6fd b.n 8005eae <_printf_float+0x24a>
|
||
80060b2: f04f 0800 mov.w r8, #0
|
||
80060b6: f104 0919 add.w r9, r4, #25
|
||
80060ba: e7f4 b.n 80060a6 <_printf_float+0x442>
|
||
|
||
080060bc <_printf_common>:
|
||
80060bc: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
80060c0: 4616 mov r6, r2
|
||
80060c2: 4699 mov r9, r3
|
||
80060c4: 688a ldr r2, [r1, #8]
|
||
80060c6: 690b ldr r3, [r1, #16]
|
||
80060c8: 4607 mov r7, r0
|
||
80060ca: 4293 cmp r3, r2
|
||
80060cc: bfb8 it lt
|
||
80060ce: 4613 movlt r3, r2
|
||
80060d0: 6033 str r3, [r6, #0]
|
||
80060d2: f891 2043 ldrb.w r2, [r1, #67] ; 0x43
|
||
80060d6: 460c mov r4, r1
|
||
80060d8: f8dd 8020 ldr.w r8, [sp, #32]
|
||
80060dc: b10a cbz r2, 80060e2 <_printf_common+0x26>
|
||
80060de: 3301 adds r3, #1
|
||
80060e0: 6033 str r3, [r6, #0]
|
||
80060e2: 6823 ldr r3, [r4, #0]
|
||
80060e4: 0699 lsls r1, r3, #26
|
||
80060e6: bf42 ittt mi
|
||
80060e8: 6833 ldrmi r3, [r6, #0]
|
||
80060ea: 3302 addmi r3, #2
|
||
80060ec: 6033 strmi r3, [r6, #0]
|
||
80060ee: 6825 ldr r5, [r4, #0]
|
||
80060f0: f015 0506 ands.w r5, r5, #6
|
||
80060f4: d106 bne.n 8006104 <_printf_common+0x48>
|
||
80060f6: f104 0a19 add.w sl, r4, #25
|
||
80060fa: 68e3 ldr r3, [r4, #12]
|
||
80060fc: 6832 ldr r2, [r6, #0]
|
||
80060fe: 1a9b subs r3, r3, r2
|
||
8006100: 42ab cmp r3, r5
|
||
8006102: dc28 bgt.n 8006156 <_printf_common+0x9a>
|
||
8006104: f894 2043 ldrb.w r2, [r4, #67] ; 0x43
|
||
8006108: 1e13 subs r3, r2, #0
|
||
800610a: 6822 ldr r2, [r4, #0]
|
||
800610c: bf18 it ne
|
||
800610e: 2301 movne r3, #1
|
||
8006110: 0692 lsls r2, r2, #26
|
||
8006112: d42d bmi.n 8006170 <_printf_common+0xb4>
|
||
8006114: 4649 mov r1, r9
|
||
8006116: 4638 mov r0, r7
|
||
8006118: f104 0243 add.w r2, r4, #67 ; 0x43
|
||
800611c: 47c0 blx r8
|
||
800611e: 3001 adds r0, #1
|
||
8006120: d020 beq.n 8006164 <_printf_common+0xa8>
|
||
8006122: 6823 ldr r3, [r4, #0]
|
||
8006124: 68e5 ldr r5, [r4, #12]
|
||
8006126: f003 0306 and.w r3, r3, #6
|
||
800612a: 2b04 cmp r3, #4
|
||
800612c: bf18 it ne
|
||
800612e: 2500 movne r5, #0
|
||
8006130: 6832 ldr r2, [r6, #0]
|
||
8006132: f04f 0600 mov.w r6, #0
|
||
8006136: 68a3 ldr r3, [r4, #8]
|
||
8006138: bf08 it eq
|
||
800613a: 1aad subeq r5, r5, r2
|
||
800613c: 6922 ldr r2, [r4, #16]
|
||
800613e: bf08 it eq
|
||
8006140: ea25 75e5 biceq.w r5, r5, r5, asr #31
|
||
8006144: 4293 cmp r3, r2
|
||
8006146: bfc4 itt gt
|
||
8006148: 1a9b subgt r3, r3, r2
|
||
800614a: 18ed addgt r5, r5, r3
|
||
800614c: 341a adds r4, #26
|
||
800614e: 42b5 cmp r5, r6
|
||
8006150: d11a bne.n 8006188 <_printf_common+0xcc>
|
||
8006152: 2000 movs r0, #0
|
||
8006154: e008 b.n 8006168 <_printf_common+0xac>
|
||
8006156: 2301 movs r3, #1
|
||
8006158: 4652 mov r2, sl
|
||
800615a: 4649 mov r1, r9
|
||
800615c: 4638 mov r0, r7
|
||
800615e: 47c0 blx r8
|
||
8006160: 3001 adds r0, #1
|
||
8006162: d103 bne.n 800616c <_printf_common+0xb0>
|
||
8006164: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8006168: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
800616c: 3501 adds r5, #1
|
||
800616e: e7c4 b.n 80060fa <_printf_common+0x3e>
|
||
8006170: 2030 movs r0, #48 ; 0x30
|
||
8006172: 18e1 adds r1, r4, r3
|
||
8006174: f881 0043 strb.w r0, [r1, #67] ; 0x43
|
||
8006178: 1c5a adds r2, r3, #1
|
||
800617a: f894 1045 ldrb.w r1, [r4, #69] ; 0x45
|
||
800617e: 4422 add r2, r4
|
||
8006180: 3302 adds r3, #2
|
||
8006182: f882 1043 strb.w r1, [r2, #67] ; 0x43
|
||
8006186: e7c5 b.n 8006114 <_printf_common+0x58>
|
||
8006188: 2301 movs r3, #1
|
||
800618a: 4622 mov r2, r4
|
||
800618c: 4649 mov r1, r9
|
||
800618e: 4638 mov r0, r7
|
||
8006190: 47c0 blx r8
|
||
8006192: 3001 adds r0, #1
|
||
8006194: d0e6 beq.n 8006164 <_printf_common+0xa8>
|
||
8006196: 3601 adds r6, #1
|
||
8006198: e7d9 b.n 800614e <_printf_common+0x92>
|
||
...
|
||
|
||
0800619c <_printf_i>:
|
||
800619c: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
|
||
80061a0: 460c mov r4, r1
|
||
80061a2: 7e27 ldrb r7, [r4, #24]
|
||
80061a4: 4691 mov r9, r2
|
||
80061a6: 2f78 cmp r7, #120 ; 0x78
|
||
80061a8: 4680 mov r8, r0
|
||
80061aa: 469a mov sl, r3
|
||
80061ac: 990c ldr r1, [sp, #48] ; 0x30
|
||
80061ae: f104 0243 add.w r2, r4, #67 ; 0x43
|
||
80061b2: d807 bhi.n 80061c4 <_printf_i+0x28>
|
||
80061b4: 2f62 cmp r7, #98 ; 0x62
|
||
80061b6: d80a bhi.n 80061ce <_printf_i+0x32>
|
||
80061b8: 2f00 cmp r7, #0
|
||
80061ba: f000 80d9 beq.w 8006370 <_printf_i+0x1d4>
|
||
80061be: 2f58 cmp r7, #88 ; 0x58
|
||
80061c0: f000 80a4 beq.w 800630c <_printf_i+0x170>
|
||
80061c4: f104 0642 add.w r6, r4, #66 ; 0x42
|
||
80061c8: f884 7042 strb.w r7, [r4, #66] ; 0x42
|
||
80061cc: e03a b.n 8006244 <_printf_i+0xa8>
|
||
80061ce: f1a7 0363 sub.w r3, r7, #99 ; 0x63
|
||
80061d2: 2b15 cmp r3, #21
|
||
80061d4: d8f6 bhi.n 80061c4 <_printf_i+0x28>
|
||
80061d6: a001 add r0, pc, #4 ; (adr r0, 80061dc <_printf_i+0x40>)
|
||
80061d8: f850 f023 ldr.w pc, [r0, r3, lsl #2]
|
||
80061dc: 08006235 .word 0x08006235
|
||
80061e0: 08006249 .word 0x08006249
|
||
80061e4: 080061c5 .word 0x080061c5
|
||
80061e8: 080061c5 .word 0x080061c5
|
||
80061ec: 080061c5 .word 0x080061c5
|
||
80061f0: 080061c5 .word 0x080061c5
|
||
80061f4: 08006249 .word 0x08006249
|
||
80061f8: 080061c5 .word 0x080061c5
|
||
80061fc: 080061c5 .word 0x080061c5
|
||
8006200: 080061c5 .word 0x080061c5
|
||
8006204: 080061c5 .word 0x080061c5
|
||
8006208: 08006357 .word 0x08006357
|
||
800620c: 08006279 .word 0x08006279
|
||
8006210: 08006339 .word 0x08006339
|
||
8006214: 080061c5 .word 0x080061c5
|
||
8006218: 080061c5 .word 0x080061c5
|
||
800621c: 08006379 .word 0x08006379
|
||
8006220: 080061c5 .word 0x080061c5
|
||
8006224: 08006279 .word 0x08006279
|
||
8006228: 080061c5 .word 0x080061c5
|
||
800622c: 080061c5 .word 0x080061c5
|
||
8006230: 08006341 .word 0x08006341
|
||
8006234: 680b ldr r3, [r1, #0]
|
||
8006236: f104 0642 add.w r6, r4, #66 ; 0x42
|
||
800623a: 1d1a adds r2, r3, #4
|
||
800623c: 681b ldr r3, [r3, #0]
|
||
800623e: 600a str r2, [r1, #0]
|
||
8006240: f884 3042 strb.w r3, [r4, #66] ; 0x42
|
||
8006244: 2301 movs r3, #1
|
||
8006246: e0a4 b.n 8006392 <_printf_i+0x1f6>
|
||
8006248: 6825 ldr r5, [r4, #0]
|
||
800624a: 6808 ldr r0, [r1, #0]
|
||
800624c: 062e lsls r6, r5, #24
|
||
800624e: f100 0304 add.w r3, r0, #4
|
||
8006252: d50a bpl.n 800626a <_printf_i+0xce>
|
||
8006254: 6805 ldr r5, [r0, #0]
|
||
8006256: 600b str r3, [r1, #0]
|
||
8006258: 2d00 cmp r5, #0
|
||
800625a: da03 bge.n 8006264 <_printf_i+0xc8>
|
||
800625c: 232d movs r3, #45 ; 0x2d
|
||
800625e: 426d negs r5, r5
|
||
8006260: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
8006264: 230a movs r3, #10
|
||
8006266: 485e ldr r0, [pc, #376] ; (80063e0 <_printf_i+0x244>)
|
||
8006268: e019 b.n 800629e <_printf_i+0x102>
|
||
800626a: f015 0f40 tst.w r5, #64 ; 0x40
|
||
800626e: 6805 ldr r5, [r0, #0]
|
||
8006270: 600b str r3, [r1, #0]
|
||
8006272: bf18 it ne
|
||
8006274: b22d sxthne r5, r5
|
||
8006276: e7ef b.n 8006258 <_printf_i+0xbc>
|
||
8006278: 680b ldr r3, [r1, #0]
|
||
800627a: 6825 ldr r5, [r4, #0]
|
||
800627c: 1d18 adds r0, r3, #4
|
||
800627e: 6008 str r0, [r1, #0]
|
||
8006280: 0628 lsls r0, r5, #24
|
||
8006282: d501 bpl.n 8006288 <_printf_i+0xec>
|
||
8006284: 681d ldr r5, [r3, #0]
|
||
8006286: e002 b.n 800628e <_printf_i+0xf2>
|
||
8006288: 0669 lsls r1, r5, #25
|
||
800628a: d5fb bpl.n 8006284 <_printf_i+0xe8>
|
||
800628c: 881d ldrh r5, [r3, #0]
|
||
800628e: 2f6f cmp r7, #111 ; 0x6f
|
||
8006290: bf0c ite eq
|
||
8006292: 2308 moveq r3, #8
|
||
8006294: 230a movne r3, #10
|
||
8006296: 4852 ldr r0, [pc, #328] ; (80063e0 <_printf_i+0x244>)
|
||
8006298: 2100 movs r1, #0
|
||
800629a: f884 1043 strb.w r1, [r4, #67] ; 0x43
|
||
800629e: 6866 ldr r6, [r4, #4]
|
||
80062a0: 2e00 cmp r6, #0
|
||
80062a2: bfa8 it ge
|
||
80062a4: 6821 ldrge r1, [r4, #0]
|
||
80062a6: 60a6 str r6, [r4, #8]
|
||
80062a8: bfa4 itt ge
|
||
80062aa: f021 0104 bicge.w r1, r1, #4
|
||
80062ae: 6021 strge r1, [r4, #0]
|
||
80062b0: b90d cbnz r5, 80062b6 <_printf_i+0x11a>
|
||
80062b2: 2e00 cmp r6, #0
|
||
80062b4: d04d beq.n 8006352 <_printf_i+0x1b6>
|
||
80062b6: 4616 mov r6, r2
|
||
80062b8: fbb5 f1f3 udiv r1, r5, r3
|
||
80062bc: fb03 5711 mls r7, r3, r1, r5
|
||
80062c0: 5dc7 ldrb r7, [r0, r7]
|
||
80062c2: f806 7d01 strb.w r7, [r6, #-1]!
|
||
80062c6: 462f mov r7, r5
|
||
80062c8: 42bb cmp r3, r7
|
||
80062ca: 460d mov r5, r1
|
||
80062cc: d9f4 bls.n 80062b8 <_printf_i+0x11c>
|
||
80062ce: 2b08 cmp r3, #8
|
||
80062d0: d10b bne.n 80062ea <_printf_i+0x14e>
|
||
80062d2: 6823 ldr r3, [r4, #0]
|
||
80062d4: 07df lsls r7, r3, #31
|
||
80062d6: d508 bpl.n 80062ea <_printf_i+0x14e>
|
||
80062d8: 6923 ldr r3, [r4, #16]
|
||
80062da: 6861 ldr r1, [r4, #4]
|
||
80062dc: 4299 cmp r1, r3
|
||
80062de: bfde ittt le
|
||
80062e0: 2330 movle r3, #48 ; 0x30
|
||
80062e2: f806 3c01 strble.w r3, [r6, #-1]
|
||
80062e6: f106 36ff addle.w r6, r6, #4294967295 ; 0xffffffff
|
||
80062ea: 1b92 subs r2, r2, r6
|
||
80062ec: 6122 str r2, [r4, #16]
|
||
80062ee: 464b mov r3, r9
|
||
80062f0: 4621 mov r1, r4
|
||
80062f2: 4640 mov r0, r8
|
||
80062f4: f8cd a000 str.w sl, [sp]
|
||
80062f8: aa03 add r2, sp, #12
|
||
80062fa: f7ff fedf bl 80060bc <_printf_common>
|
||
80062fe: 3001 adds r0, #1
|
||
8006300: d14c bne.n 800639c <_printf_i+0x200>
|
||
8006302: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8006306: b004 add sp, #16
|
||
8006308: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
800630c: 4834 ldr r0, [pc, #208] ; (80063e0 <_printf_i+0x244>)
|
||
800630e: f884 7045 strb.w r7, [r4, #69] ; 0x45
|
||
8006312: 680e ldr r6, [r1, #0]
|
||
8006314: 6823 ldr r3, [r4, #0]
|
||
8006316: f856 5b04 ldr.w r5, [r6], #4
|
||
800631a: 061f lsls r7, r3, #24
|
||
800631c: 600e str r6, [r1, #0]
|
||
800631e: d514 bpl.n 800634a <_printf_i+0x1ae>
|
||
8006320: 07d9 lsls r1, r3, #31
|
||
8006322: bf44 itt mi
|
||
8006324: f043 0320 orrmi.w r3, r3, #32
|
||
8006328: 6023 strmi r3, [r4, #0]
|
||
800632a: b91d cbnz r5, 8006334 <_printf_i+0x198>
|
||
800632c: 6823 ldr r3, [r4, #0]
|
||
800632e: f023 0320 bic.w r3, r3, #32
|
||
8006332: 6023 str r3, [r4, #0]
|
||
8006334: 2310 movs r3, #16
|
||
8006336: e7af b.n 8006298 <_printf_i+0xfc>
|
||
8006338: 6823 ldr r3, [r4, #0]
|
||
800633a: f043 0320 orr.w r3, r3, #32
|
||
800633e: 6023 str r3, [r4, #0]
|
||
8006340: 2378 movs r3, #120 ; 0x78
|
||
8006342: 4828 ldr r0, [pc, #160] ; (80063e4 <_printf_i+0x248>)
|
||
8006344: f884 3045 strb.w r3, [r4, #69] ; 0x45
|
||
8006348: e7e3 b.n 8006312 <_printf_i+0x176>
|
||
800634a: 065e lsls r6, r3, #25
|
||
800634c: bf48 it mi
|
||
800634e: b2ad uxthmi r5, r5
|
||
8006350: e7e6 b.n 8006320 <_printf_i+0x184>
|
||
8006352: 4616 mov r6, r2
|
||
8006354: e7bb b.n 80062ce <_printf_i+0x132>
|
||
8006356: 680b ldr r3, [r1, #0]
|
||
8006358: 6826 ldr r6, [r4, #0]
|
||
800635a: 1d1d adds r5, r3, #4
|
||
800635c: 6960 ldr r0, [r4, #20]
|
||
800635e: 600d str r5, [r1, #0]
|
||
8006360: 0635 lsls r5, r6, #24
|
||
8006362: 681b ldr r3, [r3, #0]
|
||
8006364: d501 bpl.n 800636a <_printf_i+0x1ce>
|
||
8006366: 6018 str r0, [r3, #0]
|
||
8006368: e002 b.n 8006370 <_printf_i+0x1d4>
|
||
800636a: 0671 lsls r1, r6, #25
|
||
800636c: d5fb bpl.n 8006366 <_printf_i+0x1ca>
|
||
800636e: 8018 strh r0, [r3, #0]
|
||
8006370: 2300 movs r3, #0
|
||
8006372: 4616 mov r6, r2
|
||
8006374: 6123 str r3, [r4, #16]
|
||
8006376: e7ba b.n 80062ee <_printf_i+0x152>
|
||
8006378: 680b ldr r3, [r1, #0]
|
||
800637a: 1d1a adds r2, r3, #4
|
||
800637c: 600a str r2, [r1, #0]
|
||
800637e: 681e ldr r6, [r3, #0]
|
||
8006380: 2100 movs r1, #0
|
||
8006382: 4630 mov r0, r6
|
||
8006384: 6862 ldr r2, [r4, #4]
|
||
8006386: f000 fee1 bl 800714c <memchr>
|
||
800638a: b108 cbz r0, 8006390 <_printf_i+0x1f4>
|
||
800638c: 1b80 subs r0, r0, r6
|
||
800638e: 6060 str r0, [r4, #4]
|
||
8006390: 6863 ldr r3, [r4, #4]
|
||
8006392: 6123 str r3, [r4, #16]
|
||
8006394: 2300 movs r3, #0
|
||
8006396: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
800639a: e7a8 b.n 80062ee <_printf_i+0x152>
|
||
800639c: 4632 mov r2, r6
|
||
800639e: 4649 mov r1, r9
|
||
80063a0: 4640 mov r0, r8
|
||
80063a2: 6923 ldr r3, [r4, #16]
|
||
80063a4: 47d0 blx sl
|
||
80063a6: 3001 adds r0, #1
|
||
80063a8: d0ab beq.n 8006302 <_printf_i+0x166>
|
||
80063aa: 6823 ldr r3, [r4, #0]
|
||
80063ac: 079b lsls r3, r3, #30
|
||
80063ae: d413 bmi.n 80063d8 <_printf_i+0x23c>
|
||
80063b0: 68e0 ldr r0, [r4, #12]
|
||
80063b2: 9b03 ldr r3, [sp, #12]
|
||
80063b4: 4298 cmp r0, r3
|
||
80063b6: bfb8 it lt
|
||
80063b8: 4618 movlt r0, r3
|
||
80063ba: e7a4 b.n 8006306 <_printf_i+0x16a>
|
||
80063bc: 2301 movs r3, #1
|
||
80063be: 4632 mov r2, r6
|
||
80063c0: 4649 mov r1, r9
|
||
80063c2: 4640 mov r0, r8
|
||
80063c4: 47d0 blx sl
|
||
80063c6: 3001 adds r0, #1
|
||
80063c8: d09b beq.n 8006302 <_printf_i+0x166>
|
||
80063ca: 3501 adds r5, #1
|
||
80063cc: 68e3 ldr r3, [r4, #12]
|
||
80063ce: 9903 ldr r1, [sp, #12]
|
||
80063d0: 1a5b subs r3, r3, r1
|
||
80063d2: 42ab cmp r3, r5
|
||
80063d4: dcf2 bgt.n 80063bc <_printf_i+0x220>
|
||
80063d6: e7eb b.n 80063b0 <_printf_i+0x214>
|
||
80063d8: 2500 movs r5, #0
|
||
80063da: f104 0619 add.w r6, r4, #25
|
||
80063de: e7f5 b.n 80063cc <_printf_i+0x230>
|
||
80063e0: 080092a2 .word 0x080092a2
|
||
80063e4: 080092b3 .word 0x080092b3
|
||
|
||
080063e8 <_sbrk_r>:
|
||
80063e8: b538 push {r3, r4, r5, lr}
|
||
80063ea: 2300 movs r3, #0
|
||
80063ec: 4d05 ldr r5, [pc, #20] ; (8006404 <_sbrk_r+0x1c>)
|
||
80063ee: 4604 mov r4, r0
|
||
80063f0: 4608 mov r0, r1
|
||
80063f2: 602b str r3, [r5, #0]
|
||
80063f4: f7fb f99c bl 8001730 <_sbrk>
|
||
80063f8: 1c43 adds r3, r0, #1
|
||
80063fa: d102 bne.n 8006402 <_sbrk_r+0x1a>
|
||
80063fc: 682b ldr r3, [r5, #0]
|
||
80063fe: b103 cbz r3, 8006402 <_sbrk_r+0x1a>
|
||
8006400: 6023 str r3, [r4, #0]
|
||
8006402: bd38 pop {r3, r4, r5, pc}
|
||
8006404: 200002f0 .word 0x200002f0
|
||
|
||
08006408 <siprintf>:
|
||
8006408: b40e push {r1, r2, r3}
|
||
800640a: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000
|
||
800640e: b500 push {lr}
|
||
8006410: b09c sub sp, #112 ; 0x70
|
||
8006412: ab1d add r3, sp, #116 ; 0x74
|
||
8006414: 9002 str r0, [sp, #8]
|
||
8006416: 9006 str r0, [sp, #24]
|
||
8006418: 9107 str r1, [sp, #28]
|
||
800641a: 9104 str r1, [sp, #16]
|
||
800641c: 4808 ldr r0, [pc, #32] ; (8006440 <siprintf+0x38>)
|
||
800641e: 4909 ldr r1, [pc, #36] ; (8006444 <siprintf+0x3c>)
|
||
8006420: f853 2b04 ldr.w r2, [r3], #4
|
||
8006424: 9105 str r1, [sp, #20]
|
||
8006426: 6800 ldr r0, [r0, #0]
|
||
8006428: a902 add r1, sp, #8
|
||
800642a: 9301 str r3, [sp, #4]
|
||
800642c: f001 faa2 bl 8007974 <_svfiprintf_r>
|
||
8006430: 2200 movs r2, #0
|
||
8006432: 9b02 ldr r3, [sp, #8]
|
||
8006434: 701a strb r2, [r3, #0]
|
||
8006436: b01c add sp, #112 ; 0x70
|
||
8006438: f85d eb04 ldr.w lr, [sp], #4
|
||
800643c: b003 add sp, #12
|
||
800643e: 4770 bx lr
|
||
8006440: 2000000c .word 0x2000000c
|
||
8006444: ffff0208 .word 0xffff0208
|
||
|
||
08006448 <quorem>:
|
||
8006448: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
800644c: 6903 ldr r3, [r0, #16]
|
||
800644e: 690c ldr r4, [r1, #16]
|
||
8006450: 4607 mov r7, r0
|
||
8006452: 42a3 cmp r3, r4
|
||
8006454: f2c0 8083 blt.w 800655e <quorem+0x116>
|
||
8006458: 3c01 subs r4, #1
|
||
800645a: f100 0514 add.w r5, r0, #20
|
||
800645e: f101 0814 add.w r8, r1, #20
|
||
8006462: eb05 0384 add.w r3, r5, r4, lsl #2
|
||
8006466: 9301 str r3, [sp, #4]
|
||
8006468: f858 3024 ldr.w r3, [r8, r4, lsl #2]
|
||
800646c: f855 2024 ldr.w r2, [r5, r4, lsl #2]
|
||
8006470: 3301 adds r3, #1
|
||
8006472: 429a cmp r2, r3
|
||
8006474: fbb2 f6f3 udiv r6, r2, r3
|
||
8006478: ea4f 0b84 mov.w fp, r4, lsl #2
|
||
800647c: eb08 0984 add.w r9, r8, r4, lsl #2
|
||
8006480: d332 bcc.n 80064e8 <quorem+0xa0>
|
||
8006482: f04f 0e00 mov.w lr, #0
|
||
8006486: 4640 mov r0, r8
|
||
8006488: 46ac mov ip, r5
|
||
800648a: 46f2 mov sl, lr
|
||
800648c: f850 2b04 ldr.w r2, [r0], #4
|
||
8006490: b293 uxth r3, r2
|
||
8006492: fb06 e303 mla r3, r6, r3, lr
|
||
8006496: 0c12 lsrs r2, r2, #16
|
||
8006498: ea4f 4e13 mov.w lr, r3, lsr #16
|
||
800649c: fb06 e202 mla r2, r6, r2, lr
|
||
80064a0: b29b uxth r3, r3
|
||
80064a2: ebaa 0303 sub.w r3, sl, r3
|
||
80064a6: f8dc a000 ldr.w sl, [ip]
|
||
80064aa: ea4f 4e12 mov.w lr, r2, lsr #16
|
||
80064ae: fa1f fa8a uxth.w sl, sl
|
||
80064b2: 4453 add r3, sl
|
||
80064b4: fa1f fa82 uxth.w sl, r2
|
||
80064b8: f8dc 2000 ldr.w r2, [ip]
|
||
80064bc: 4581 cmp r9, r0
|
||
80064be: ebca 4212 rsb r2, sl, r2, lsr #16
|
||
80064c2: eb02 4223 add.w r2, r2, r3, asr #16
|
||
80064c6: b29b uxth r3, r3
|
||
80064c8: ea43 4302 orr.w r3, r3, r2, lsl #16
|
||
80064cc: ea4f 4a22 mov.w sl, r2, asr #16
|
||
80064d0: f84c 3b04 str.w r3, [ip], #4
|
||
80064d4: d2da bcs.n 800648c <quorem+0x44>
|
||
80064d6: f855 300b ldr.w r3, [r5, fp]
|
||
80064da: b92b cbnz r3, 80064e8 <quorem+0xa0>
|
||
80064dc: 9b01 ldr r3, [sp, #4]
|
||
80064de: 3b04 subs r3, #4
|
||
80064e0: 429d cmp r5, r3
|
||
80064e2: 461a mov r2, r3
|
||
80064e4: d32f bcc.n 8006546 <quorem+0xfe>
|
||
80064e6: 613c str r4, [r7, #16]
|
||
80064e8: 4638 mov r0, r7
|
||
80064ea: f001 f8d1 bl 8007690 <__mcmp>
|
||
80064ee: 2800 cmp r0, #0
|
||
80064f0: db25 blt.n 800653e <quorem+0xf6>
|
||
80064f2: 4628 mov r0, r5
|
||
80064f4: f04f 0c00 mov.w ip, #0
|
||
80064f8: 3601 adds r6, #1
|
||
80064fa: f858 1b04 ldr.w r1, [r8], #4
|
||
80064fe: f8d0 e000 ldr.w lr, [r0]
|
||
8006502: b28b uxth r3, r1
|
||
8006504: ebac 0303 sub.w r3, ip, r3
|
||
8006508: fa1f f28e uxth.w r2, lr
|
||
800650c: 4413 add r3, r2
|
||
800650e: 0c0a lsrs r2, r1, #16
|
||
8006510: ebc2 421e rsb r2, r2, lr, lsr #16
|
||
8006514: eb02 4223 add.w r2, r2, r3, asr #16
|
||
8006518: b29b uxth r3, r3
|
||
800651a: ea43 4302 orr.w r3, r3, r2, lsl #16
|
||
800651e: 45c1 cmp r9, r8
|
||
8006520: ea4f 4c22 mov.w ip, r2, asr #16
|
||
8006524: f840 3b04 str.w r3, [r0], #4
|
||
8006528: d2e7 bcs.n 80064fa <quorem+0xb2>
|
||
800652a: f855 2024 ldr.w r2, [r5, r4, lsl #2]
|
||
800652e: eb05 0384 add.w r3, r5, r4, lsl #2
|
||
8006532: b922 cbnz r2, 800653e <quorem+0xf6>
|
||
8006534: 3b04 subs r3, #4
|
||
8006536: 429d cmp r5, r3
|
||
8006538: 461a mov r2, r3
|
||
800653a: d30a bcc.n 8006552 <quorem+0x10a>
|
||
800653c: 613c str r4, [r7, #16]
|
||
800653e: 4630 mov r0, r6
|
||
8006540: b003 add sp, #12
|
||
8006542: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8006546: 6812 ldr r2, [r2, #0]
|
||
8006548: 3b04 subs r3, #4
|
||
800654a: 2a00 cmp r2, #0
|
||
800654c: d1cb bne.n 80064e6 <quorem+0x9e>
|
||
800654e: 3c01 subs r4, #1
|
||
8006550: e7c6 b.n 80064e0 <quorem+0x98>
|
||
8006552: 6812 ldr r2, [r2, #0]
|
||
8006554: 3b04 subs r3, #4
|
||
8006556: 2a00 cmp r2, #0
|
||
8006558: d1f0 bne.n 800653c <quorem+0xf4>
|
||
800655a: 3c01 subs r4, #1
|
||
800655c: e7eb b.n 8006536 <quorem+0xee>
|
||
800655e: 2000 movs r0, #0
|
||
8006560: e7ee b.n 8006540 <quorem+0xf8>
|
||
8006562: 0000 movs r0, r0
|
||
8006564: 0000 movs r0, r0
|
||
...
|
||
|
||
08006568 <_dtoa_r>:
|
||
8006568: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
800656c: 4616 mov r6, r2
|
||
800656e: 461f mov r7, r3
|
||
8006570: 6a44 ldr r4, [r0, #36] ; 0x24
|
||
8006572: b099 sub sp, #100 ; 0x64
|
||
8006574: 4605 mov r5, r0
|
||
8006576: e9cd 6704 strd r6, r7, [sp, #16]
|
||
800657a: f8dd 8094 ldr.w r8, [sp, #148] ; 0x94
|
||
800657e: b974 cbnz r4, 800659e <_dtoa_r+0x36>
|
||
8006580: 2010 movs r0, #16
|
||
8006582: f7ff fa13 bl 80059ac <malloc>
|
||
8006586: 4602 mov r2, r0
|
||
8006588: 6268 str r0, [r5, #36] ; 0x24
|
||
800658a: b920 cbnz r0, 8006596 <_dtoa_r+0x2e>
|
||
800658c: 21ea movs r1, #234 ; 0xea
|
||
800658e: 4bae ldr r3, [pc, #696] ; (8006848 <_dtoa_r+0x2e0>)
|
||
8006590: 48ae ldr r0, [pc, #696] ; (800684c <_dtoa_r+0x2e4>)
|
||
8006592: f001 faef bl 8007b74 <__assert_func>
|
||
8006596: e9c0 4401 strd r4, r4, [r0, #4]
|
||
800659a: 6004 str r4, [r0, #0]
|
||
800659c: 60c4 str r4, [r0, #12]
|
||
800659e: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
80065a0: 6819 ldr r1, [r3, #0]
|
||
80065a2: b151 cbz r1, 80065ba <_dtoa_r+0x52>
|
||
80065a4: 685a ldr r2, [r3, #4]
|
||
80065a6: 2301 movs r3, #1
|
||
80065a8: 4093 lsls r3, r2
|
||
80065aa: 604a str r2, [r1, #4]
|
||
80065ac: 608b str r3, [r1, #8]
|
||
80065ae: 4628 mov r0, r5
|
||
80065b0: f000 fe34 bl 800721c <_Bfree>
|
||
80065b4: 2200 movs r2, #0
|
||
80065b6: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
80065b8: 601a str r2, [r3, #0]
|
||
80065ba: 1e3b subs r3, r7, #0
|
||
80065bc: bfaf iteee ge
|
||
80065be: 2300 movge r3, #0
|
||
80065c0: 2201 movlt r2, #1
|
||
80065c2: f023 4300 biclt.w r3, r3, #2147483648 ; 0x80000000
|
||
80065c6: 9305 strlt r3, [sp, #20]
|
||
80065c8: bfa8 it ge
|
||
80065ca: f8c8 3000 strge.w r3, [r8]
|
||
80065ce: f8dd 9014 ldr.w r9, [sp, #20]
|
||
80065d2: 4b9f ldr r3, [pc, #636] ; (8006850 <_dtoa_r+0x2e8>)
|
||
80065d4: bfb8 it lt
|
||
80065d6: f8c8 2000 strlt.w r2, [r8]
|
||
80065da: ea33 0309 bics.w r3, r3, r9
|
||
80065de: d119 bne.n 8006614 <_dtoa_r+0xac>
|
||
80065e0: f242 730f movw r3, #9999 ; 0x270f
|
||
80065e4: 9a24 ldr r2, [sp, #144] ; 0x90
|
||
80065e6: 6013 str r3, [r2, #0]
|
||
80065e8: f3c9 0313 ubfx r3, r9, #0, #20
|
||
80065ec: 4333 orrs r3, r6
|
||
80065ee: f000 8580 beq.w 80070f2 <_dtoa_r+0xb8a>
|
||
80065f2: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
80065f4: b953 cbnz r3, 800660c <_dtoa_r+0xa4>
|
||
80065f6: 4b97 ldr r3, [pc, #604] ; (8006854 <_dtoa_r+0x2ec>)
|
||
80065f8: e022 b.n 8006640 <_dtoa_r+0xd8>
|
||
80065fa: 4b97 ldr r3, [pc, #604] ; (8006858 <_dtoa_r+0x2f0>)
|
||
80065fc: 9308 str r3, [sp, #32]
|
||
80065fe: 3308 adds r3, #8
|
||
8006600: 9a26 ldr r2, [sp, #152] ; 0x98
|
||
8006602: 6013 str r3, [r2, #0]
|
||
8006604: 9808 ldr r0, [sp, #32]
|
||
8006606: b019 add sp, #100 ; 0x64
|
||
8006608: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
800660c: 4b91 ldr r3, [pc, #580] ; (8006854 <_dtoa_r+0x2ec>)
|
||
800660e: 9308 str r3, [sp, #32]
|
||
8006610: 3303 adds r3, #3
|
||
8006612: e7f5 b.n 8006600 <_dtoa_r+0x98>
|
||
8006614: e9dd 3404 ldrd r3, r4, [sp, #16]
|
||
8006618: e9cd 340c strd r3, r4, [sp, #48] ; 0x30
|
||
800661c: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
8006620: 2200 movs r2, #0
|
||
8006622: 2300 movs r3, #0
|
||
8006624: f7fa fa2c bl 8000a80 <__aeabi_dcmpeq>
|
||
8006628: 4680 mov r8, r0
|
||
800662a: b158 cbz r0, 8006644 <_dtoa_r+0xdc>
|
||
800662c: 2301 movs r3, #1
|
||
800662e: 9a24 ldr r2, [sp, #144] ; 0x90
|
||
8006630: 6013 str r3, [r2, #0]
|
||
8006632: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
8006634: 2b00 cmp r3, #0
|
||
8006636: f000 8559 beq.w 80070ec <_dtoa_r+0xb84>
|
||
800663a: 4888 ldr r0, [pc, #544] ; (800685c <_dtoa_r+0x2f4>)
|
||
800663c: 6018 str r0, [r3, #0]
|
||
800663e: 1e43 subs r3, r0, #1
|
||
8006640: 9308 str r3, [sp, #32]
|
||
8006642: e7df b.n 8006604 <_dtoa_r+0x9c>
|
||
8006644: ab16 add r3, sp, #88 ; 0x58
|
||
8006646: 9301 str r3, [sp, #4]
|
||
8006648: ab17 add r3, sp, #92 ; 0x5c
|
||
800664a: 9300 str r3, [sp, #0]
|
||
800664c: 4628 mov r0, r5
|
||
800664e: e9dd 230c ldrd r2, r3, [sp, #48] ; 0x30
|
||
8006652: f001 f8c9 bl 80077e8 <__d2b>
|
||
8006656: f3c9 540a ubfx r4, r9, #20, #11
|
||
800665a: 4682 mov sl, r0
|
||
800665c: 2c00 cmp r4, #0
|
||
800665e: d07e beq.n 800675e <_dtoa_r+0x1f6>
|
||
8006660: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
8006664: 9b0d ldr r3, [sp, #52] ; 0x34
|
||
8006666: f2a4 34ff subw r4, r4, #1023 ; 0x3ff
|
||
800666a: f3c3 0313 ubfx r3, r3, #0, #20
|
||
800666e: f043 517f orr.w r1, r3, #1069547520 ; 0x3fc00000
|
||
8006672: f441 1140 orr.w r1, r1, #3145728 ; 0x300000
|
||
8006676: f8cd 804c str.w r8, [sp, #76] ; 0x4c
|
||
800667a: 2200 movs r2, #0
|
||
800667c: 4b78 ldr r3, [pc, #480] ; (8006860 <_dtoa_r+0x2f8>)
|
||
800667e: f7f9 fddf bl 8000240 <__aeabi_dsub>
|
||
8006682: a36b add r3, pc, #428 ; (adr r3, 8006830 <_dtoa_r+0x2c8>)
|
||
8006684: e9d3 2300 ldrd r2, r3, [r3]
|
||
8006688: f7f9 ff92 bl 80005b0 <__aeabi_dmul>
|
||
800668c: a36a add r3, pc, #424 ; (adr r3, 8006838 <_dtoa_r+0x2d0>)
|
||
800668e: e9d3 2300 ldrd r2, r3, [r3]
|
||
8006692: f7f9 fdd7 bl 8000244 <__adddf3>
|
||
8006696: 4606 mov r6, r0
|
||
8006698: 4620 mov r0, r4
|
||
800669a: 460f mov r7, r1
|
||
800669c: f7f9 ff1e bl 80004dc <__aeabi_i2d>
|
||
80066a0: a367 add r3, pc, #412 ; (adr r3, 8006840 <_dtoa_r+0x2d8>)
|
||
80066a2: e9d3 2300 ldrd r2, r3, [r3]
|
||
80066a6: f7f9 ff83 bl 80005b0 <__aeabi_dmul>
|
||
80066aa: 4602 mov r2, r0
|
||
80066ac: 460b mov r3, r1
|
||
80066ae: 4630 mov r0, r6
|
||
80066b0: 4639 mov r1, r7
|
||
80066b2: f7f9 fdc7 bl 8000244 <__adddf3>
|
||
80066b6: 4606 mov r6, r0
|
||
80066b8: 460f mov r7, r1
|
||
80066ba: f7fa fa29 bl 8000b10 <__aeabi_d2iz>
|
||
80066be: 2200 movs r2, #0
|
||
80066c0: 4681 mov r9, r0
|
||
80066c2: 2300 movs r3, #0
|
||
80066c4: 4630 mov r0, r6
|
||
80066c6: 4639 mov r1, r7
|
||
80066c8: f7fa f9e4 bl 8000a94 <__aeabi_dcmplt>
|
||
80066cc: b148 cbz r0, 80066e2 <_dtoa_r+0x17a>
|
||
80066ce: 4648 mov r0, r9
|
||
80066d0: f7f9 ff04 bl 80004dc <__aeabi_i2d>
|
||
80066d4: 4632 mov r2, r6
|
||
80066d6: 463b mov r3, r7
|
||
80066d8: f7fa f9d2 bl 8000a80 <__aeabi_dcmpeq>
|
||
80066dc: b908 cbnz r0, 80066e2 <_dtoa_r+0x17a>
|
||
80066de: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff
|
||
80066e2: f1b9 0f16 cmp.w r9, #22
|
||
80066e6: d857 bhi.n 8006798 <_dtoa_r+0x230>
|
||
80066e8: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
80066ec: 4b5d ldr r3, [pc, #372] ; (8006864 <_dtoa_r+0x2fc>)
|
||
80066ee: eb03 03c9 add.w r3, r3, r9, lsl #3
|
||
80066f2: e9d3 2300 ldrd r2, r3, [r3]
|
||
80066f6: f7fa f9cd bl 8000a94 <__aeabi_dcmplt>
|
||
80066fa: 2800 cmp r0, #0
|
||
80066fc: d04e beq.n 800679c <_dtoa_r+0x234>
|
||
80066fe: 2300 movs r3, #0
|
||
8006700: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff
|
||
8006704: 930f str r3, [sp, #60] ; 0x3c
|
||
8006706: 9b16 ldr r3, [sp, #88] ; 0x58
|
||
8006708: 1b1c subs r4, r3, r4
|
||
800670a: 1e63 subs r3, r4, #1
|
||
800670c: 9309 str r3, [sp, #36] ; 0x24
|
||
800670e: bf49 itett mi
|
||
8006710: f1c4 0301 rsbmi r3, r4, #1
|
||
8006714: 2300 movpl r3, #0
|
||
8006716: 9306 strmi r3, [sp, #24]
|
||
8006718: 2300 movmi r3, #0
|
||
800671a: bf54 ite pl
|
||
800671c: 9306 strpl r3, [sp, #24]
|
||
800671e: 9309 strmi r3, [sp, #36] ; 0x24
|
||
8006720: f1b9 0f00 cmp.w r9, #0
|
||
8006724: db3c blt.n 80067a0 <_dtoa_r+0x238>
|
||
8006726: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006728: f8cd 9038 str.w r9, [sp, #56] ; 0x38
|
||
800672c: 444b add r3, r9
|
||
800672e: 9309 str r3, [sp, #36] ; 0x24
|
||
8006730: 2300 movs r3, #0
|
||
8006732: 930a str r3, [sp, #40] ; 0x28
|
||
8006734: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8006736: 2b09 cmp r3, #9
|
||
8006738: d86c bhi.n 8006814 <_dtoa_r+0x2ac>
|
||
800673a: 2b05 cmp r3, #5
|
||
800673c: bfc4 itt gt
|
||
800673e: 3b04 subgt r3, #4
|
||
8006740: 9322 strgt r3, [sp, #136] ; 0x88
|
||
8006742: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8006744: bfc8 it gt
|
||
8006746: 2400 movgt r4, #0
|
||
8006748: f1a3 0302 sub.w r3, r3, #2
|
||
800674c: bfd8 it le
|
||
800674e: 2401 movle r4, #1
|
||
8006750: 2b03 cmp r3, #3
|
||
8006752: f200 808b bhi.w 800686c <_dtoa_r+0x304>
|
||
8006756: e8df f003 tbb [pc, r3]
|
||
800675a: 4f2d .short 0x4f2d
|
||
800675c: 5b4d .short 0x5b4d
|
||
800675e: e9dd 4316 ldrd r4, r3, [sp, #88] ; 0x58
|
||
8006762: 441c add r4, r3
|
||
8006764: f204 4332 addw r3, r4, #1074 ; 0x432
|
||
8006768: 2b20 cmp r3, #32
|
||
800676a: bfc3 ittte gt
|
||
800676c: f1c3 0340 rsbgt r3, r3, #64 ; 0x40
|
||
8006770: f204 4012 addwgt r0, r4, #1042 ; 0x412
|
||
8006774: fa09 f303 lslgt.w r3, r9, r3
|
||
8006778: f1c3 0320 rsble r3, r3, #32
|
||
800677c: bfc6 itte gt
|
||
800677e: fa26 f000 lsrgt.w r0, r6, r0
|
||
8006782: 4318 orrgt r0, r3
|
||
8006784: fa06 f003 lslle.w r0, r6, r3
|
||
8006788: f7f9 fe98 bl 80004bc <__aeabi_ui2d>
|
||
800678c: 2301 movs r3, #1
|
||
800678e: f1a1 71f8 sub.w r1, r1, #32505856 ; 0x1f00000
|
||
8006792: 3c01 subs r4, #1
|
||
8006794: 9313 str r3, [sp, #76] ; 0x4c
|
||
8006796: e770 b.n 800667a <_dtoa_r+0x112>
|
||
8006798: 2301 movs r3, #1
|
||
800679a: e7b3 b.n 8006704 <_dtoa_r+0x19c>
|
||
800679c: 900f str r0, [sp, #60] ; 0x3c
|
||
800679e: e7b2 b.n 8006706 <_dtoa_r+0x19e>
|
||
80067a0: 9b06 ldr r3, [sp, #24]
|
||
80067a2: eba3 0309 sub.w r3, r3, r9
|
||
80067a6: 9306 str r3, [sp, #24]
|
||
80067a8: f1c9 0300 rsb r3, r9, #0
|
||
80067ac: 930a str r3, [sp, #40] ; 0x28
|
||
80067ae: 2300 movs r3, #0
|
||
80067b0: 930e str r3, [sp, #56] ; 0x38
|
||
80067b2: e7bf b.n 8006734 <_dtoa_r+0x1cc>
|
||
80067b4: 2300 movs r3, #0
|
||
80067b6: 930b str r3, [sp, #44] ; 0x2c
|
||
80067b8: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
80067ba: 2b00 cmp r3, #0
|
||
80067bc: dc59 bgt.n 8006872 <_dtoa_r+0x30a>
|
||
80067be: f04f 0b01 mov.w fp, #1
|
||
80067c2: 465b mov r3, fp
|
||
80067c4: f8cd b008 str.w fp, [sp, #8]
|
||
80067c8: f8cd b08c str.w fp, [sp, #140] ; 0x8c
|
||
80067cc: 2200 movs r2, #0
|
||
80067ce: 6a68 ldr r0, [r5, #36] ; 0x24
|
||
80067d0: 6042 str r2, [r0, #4]
|
||
80067d2: 2204 movs r2, #4
|
||
80067d4: f102 0614 add.w r6, r2, #20
|
||
80067d8: 429e cmp r6, r3
|
||
80067da: 6841 ldr r1, [r0, #4]
|
||
80067dc: d94f bls.n 800687e <_dtoa_r+0x316>
|
||
80067de: 4628 mov r0, r5
|
||
80067e0: f000 fcdc bl 800719c <_Balloc>
|
||
80067e4: 9008 str r0, [sp, #32]
|
||
80067e6: 2800 cmp r0, #0
|
||
80067e8: d14d bne.n 8006886 <_dtoa_r+0x31e>
|
||
80067ea: 4602 mov r2, r0
|
||
80067ec: f44f 71d5 mov.w r1, #426 ; 0x1aa
|
||
80067f0: 4b1d ldr r3, [pc, #116] ; (8006868 <_dtoa_r+0x300>)
|
||
80067f2: e6cd b.n 8006590 <_dtoa_r+0x28>
|
||
80067f4: 2301 movs r3, #1
|
||
80067f6: e7de b.n 80067b6 <_dtoa_r+0x24e>
|
||
80067f8: 2300 movs r3, #0
|
||
80067fa: 930b str r3, [sp, #44] ; 0x2c
|
||
80067fc: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
80067fe: eb09 0b03 add.w fp, r9, r3
|
||
8006802: f10b 0301 add.w r3, fp, #1
|
||
8006806: 2b01 cmp r3, #1
|
||
8006808: 9302 str r3, [sp, #8]
|
||
800680a: bfb8 it lt
|
||
800680c: 2301 movlt r3, #1
|
||
800680e: e7dd b.n 80067cc <_dtoa_r+0x264>
|
||
8006810: 2301 movs r3, #1
|
||
8006812: e7f2 b.n 80067fa <_dtoa_r+0x292>
|
||
8006814: 2401 movs r4, #1
|
||
8006816: 2300 movs r3, #0
|
||
8006818: 940b str r4, [sp, #44] ; 0x2c
|
||
800681a: 9322 str r3, [sp, #136] ; 0x88
|
||
800681c: f04f 3bff mov.w fp, #4294967295 ; 0xffffffff
|
||
8006820: 2200 movs r2, #0
|
||
8006822: 2312 movs r3, #18
|
||
8006824: f8cd b008 str.w fp, [sp, #8]
|
||
8006828: 9223 str r2, [sp, #140] ; 0x8c
|
||
800682a: e7cf b.n 80067cc <_dtoa_r+0x264>
|
||
800682c: f3af 8000 nop.w
|
||
8006830: 636f4361 .word 0x636f4361
|
||
8006834: 3fd287a7 .word 0x3fd287a7
|
||
8006838: 8b60c8b3 .word 0x8b60c8b3
|
||
800683c: 3fc68a28 .word 0x3fc68a28
|
||
8006840: 509f79fb .word 0x509f79fb
|
||
8006844: 3fd34413 .word 0x3fd34413
|
||
8006848: 080092d1 .word 0x080092d1
|
||
800684c: 080092e8 .word 0x080092e8
|
||
8006850: 7ff00000 .word 0x7ff00000
|
||
8006854: 080092cd .word 0x080092cd
|
||
8006858: 080092c4 .word 0x080092c4
|
||
800685c: 080092a1 .word 0x080092a1
|
||
8006860: 3ff80000 .word 0x3ff80000
|
||
8006864: 080093e0 .word 0x080093e0
|
||
8006868: 08009347 .word 0x08009347
|
||
800686c: 2301 movs r3, #1
|
||
800686e: 930b str r3, [sp, #44] ; 0x2c
|
||
8006870: e7d4 b.n 800681c <_dtoa_r+0x2b4>
|
||
8006872: f8dd b08c ldr.w fp, [sp, #140] ; 0x8c
|
||
8006876: 465b mov r3, fp
|
||
8006878: f8cd b008 str.w fp, [sp, #8]
|
||
800687c: e7a6 b.n 80067cc <_dtoa_r+0x264>
|
||
800687e: 3101 adds r1, #1
|
||
8006880: 6041 str r1, [r0, #4]
|
||
8006882: 0052 lsls r2, r2, #1
|
||
8006884: e7a6 b.n 80067d4 <_dtoa_r+0x26c>
|
||
8006886: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
8006888: 9a08 ldr r2, [sp, #32]
|
||
800688a: 601a str r2, [r3, #0]
|
||
800688c: 9b02 ldr r3, [sp, #8]
|
||
800688e: 2b0e cmp r3, #14
|
||
8006890: f200 80a8 bhi.w 80069e4 <_dtoa_r+0x47c>
|
||
8006894: 2c00 cmp r4, #0
|
||
8006896: f000 80a5 beq.w 80069e4 <_dtoa_r+0x47c>
|
||
800689a: f1b9 0f00 cmp.w r9, #0
|
||
800689e: dd34 ble.n 800690a <_dtoa_r+0x3a2>
|
||
80068a0: 4a9a ldr r2, [pc, #616] ; (8006b0c <_dtoa_r+0x5a4>)
|
||
80068a2: f009 030f and.w r3, r9, #15
|
||
80068a6: eb02 03c3 add.w r3, r2, r3, lsl #3
|
||
80068aa: f419 7f80 tst.w r9, #256 ; 0x100
|
||
80068ae: e9d3 3400 ldrd r3, r4, [r3]
|
||
80068b2: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40
|
||
80068b6: ea4f 1429 mov.w r4, r9, asr #4
|
||
80068ba: d016 beq.n 80068ea <_dtoa_r+0x382>
|
||
80068bc: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
80068c0: 4b93 ldr r3, [pc, #588] ; (8006b10 <_dtoa_r+0x5a8>)
|
||
80068c2: 2703 movs r7, #3
|
||
80068c4: e9d3 2308 ldrd r2, r3, [r3, #32]
|
||
80068c8: f7f9 ff9c bl 8000804 <__aeabi_ddiv>
|
||
80068cc: e9cd 0104 strd r0, r1, [sp, #16]
|
||
80068d0: f004 040f and.w r4, r4, #15
|
||
80068d4: 4e8e ldr r6, [pc, #568] ; (8006b10 <_dtoa_r+0x5a8>)
|
||
80068d6: b954 cbnz r4, 80068ee <_dtoa_r+0x386>
|
||
80068d8: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
80068dc: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
80068e0: f7f9 ff90 bl 8000804 <__aeabi_ddiv>
|
||
80068e4: e9cd 0104 strd r0, r1, [sp, #16]
|
||
80068e8: e029 b.n 800693e <_dtoa_r+0x3d6>
|
||
80068ea: 2702 movs r7, #2
|
||
80068ec: e7f2 b.n 80068d4 <_dtoa_r+0x36c>
|
||
80068ee: 07e1 lsls r1, r4, #31
|
||
80068f0: d508 bpl.n 8006904 <_dtoa_r+0x39c>
|
||
80068f2: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
80068f6: e9d6 2300 ldrd r2, r3, [r6]
|
||
80068fa: f7f9 fe59 bl 80005b0 <__aeabi_dmul>
|
||
80068fe: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
8006902: 3701 adds r7, #1
|
||
8006904: 1064 asrs r4, r4, #1
|
||
8006906: 3608 adds r6, #8
|
||
8006908: e7e5 b.n 80068d6 <_dtoa_r+0x36e>
|
||
800690a: f000 80a5 beq.w 8006a58 <_dtoa_r+0x4f0>
|
||
800690e: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
8006912: f1c9 0400 rsb r4, r9, #0
|
||
8006916: 4b7d ldr r3, [pc, #500] ; (8006b0c <_dtoa_r+0x5a4>)
|
||
8006918: f004 020f and.w r2, r4, #15
|
||
800691c: eb03 03c2 add.w r3, r3, r2, lsl #3
|
||
8006920: e9d3 2300 ldrd r2, r3, [r3]
|
||
8006924: f7f9 fe44 bl 80005b0 <__aeabi_dmul>
|
||
8006928: 2702 movs r7, #2
|
||
800692a: 2300 movs r3, #0
|
||
800692c: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8006930: 4e77 ldr r6, [pc, #476] ; (8006b10 <_dtoa_r+0x5a8>)
|
||
8006932: 1124 asrs r4, r4, #4
|
||
8006934: 2c00 cmp r4, #0
|
||
8006936: f040 8084 bne.w 8006a42 <_dtoa_r+0x4da>
|
||
800693a: 2b00 cmp r3, #0
|
||
800693c: d1d2 bne.n 80068e4 <_dtoa_r+0x37c>
|
||
800693e: 9b0f ldr r3, [sp, #60] ; 0x3c
|
||
8006940: 2b00 cmp r3, #0
|
||
8006942: f000 808b beq.w 8006a5c <_dtoa_r+0x4f4>
|
||
8006946: e9dd 3404 ldrd r3, r4, [sp, #16]
|
||
800694a: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40
|
||
800694e: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
8006952: 2200 movs r2, #0
|
||
8006954: 4b6f ldr r3, [pc, #444] ; (8006b14 <_dtoa_r+0x5ac>)
|
||
8006956: f7fa f89d bl 8000a94 <__aeabi_dcmplt>
|
||
800695a: 2800 cmp r0, #0
|
||
800695c: d07e beq.n 8006a5c <_dtoa_r+0x4f4>
|
||
800695e: 9b02 ldr r3, [sp, #8]
|
||
8006960: 2b00 cmp r3, #0
|
||
8006962: d07b beq.n 8006a5c <_dtoa_r+0x4f4>
|
||
8006964: f1bb 0f00 cmp.w fp, #0
|
||
8006968: dd38 ble.n 80069dc <_dtoa_r+0x474>
|
||
800696a: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
800696e: 2200 movs r2, #0
|
||
8006970: 4b69 ldr r3, [pc, #420] ; (8006b18 <_dtoa_r+0x5b0>)
|
||
8006972: f7f9 fe1d bl 80005b0 <__aeabi_dmul>
|
||
8006976: 465c mov r4, fp
|
||
8006978: e9cd 0104 strd r0, r1, [sp, #16]
|
||
800697c: f109 38ff add.w r8, r9, #4294967295 ; 0xffffffff
|
||
8006980: 3701 adds r7, #1
|
||
8006982: 4638 mov r0, r7
|
||
8006984: f7f9 fdaa bl 80004dc <__aeabi_i2d>
|
||
8006988: e9dd 2304 ldrd r2, r3, [sp, #16]
|
||
800698c: f7f9 fe10 bl 80005b0 <__aeabi_dmul>
|
||
8006990: 2200 movs r2, #0
|
||
8006992: 4b62 ldr r3, [pc, #392] ; (8006b1c <_dtoa_r+0x5b4>)
|
||
8006994: f7f9 fc56 bl 8000244 <__adddf3>
|
||
8006998: f1a1 7650 sub.w r6, r1, #54525952 ; 0x3400000
|
||
800699c: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
80069a0: 9611 str r6, [sp, #68] ; 0x44
|
||
80069a2: 2c00 cmp r4, #0
|
||
80069a4: d15d bne.n 8006a62 <_dtoa_r+0x4fa>
|
||
80069a6: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
80069aa: 2200 movs r2, #0
|
||
80069ac: 4b5c ldr r3, [pc, #368] ; (8006b20 <_dtoa_r+0x5b8>)
|
||
80069ae: f7f9 fc47 bl 8000240 <__aeabi_dsub>
|
||
80069b2: 4602 mov r2, r0
|
||
80069b4: 460b mov r3, r1
|
||
80069b6: e9cd 2304 strd r2, r3, [sp, #16]
|
||
80069ba: 4633 mov r3, r6
|
||
80069bc: 9a10 ldr r2, [sp, #64] ; 0x40
|
||
80069be: f7fa f887 bl 8000ad0 <__aeabi_dcmpgt>
|
||
80069c2: 2800 cmp r0, #0
|
||
80069c4: f040 829e bne.w 8006f04 <_dtoa_r+0x99c>
|
||
80069c8: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
80069cc: 9a10 ldr r2, [sp, #64] ; 0x40
|
||
80069ce: f106 4300 add.w r3, r6, #2147483648 ; 0x80000000
|
||
80069d2: f7fa f85f bl 8000a94 <__aeabi_dcmplt>
|
||
80069d6: 2800 cmp r0, #0
|
||
80069d8: f040 8292 bne.w 8006f00 <_dtoa_r+0x998>
|
||
80069dc: e9dd 340c ldrd r3, r4, [sp, #48] ; 0x30
|
||
80069e0: e9cd 3404 strd r3, r4, [sp, #16]
|
||
80069e4: 9b17 ldr r3, [sp, #92] ; 0x5c
|
||
80069e6: 2b00 cmp r3, #0
|
||
80069e8: f2c0 8153 blt.w 8006c92 <_dtoa_r+0x72a>
|
||
80069ec: f1b9 0f0e cmp.w r9, #14
|
||
80069f0: f300 814f bgt.w 8006c92 <_dtoa_r+0x72a>
|
||
80069f4: 4b45 ldr r3, [pc, #276] ; (8006b0c <_dtoa_r+0x5a4>)
|
||
80069f6: eb03 03c9 add.w r3, r3, r9, lsl #3
|
||
80069fa: e9d3 3400 ldrd r3, r4, [r3]
|
||
80069fe: e9cd 3406 strd r3, r4, [sp, #24]
|
||
8006a02: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
8006a04: 2b00 cmp r3, #0
|
||
8006a06: f280 80db bge.w 8006bc0 <_dtoa_r+0x658>
|
||
8006a0a: 9b02 ldr r3, [sp, #8]
|
||
8006a0c: 2b00 cmp r3, #0
|
||
8006a0e: f300 80d7 bgt.w 8006bc0 <_dtoa_r+0x658>
|
||
8006a12: f040 8274 bne.w 8006efe <_dtoa_r+0x996>
|
||
8006a16: e9dd 0106 ldrd r0, r1, [sp, #24]
|
||
8006a1a: 2200 movs r2, #0
|
||
8006a1c: 4b40 ldr r3, [pc, #256] ; (8006b20 <_dtoa_r+0x5b8>)
|
||
8006a1e: f7f9 fdc7 bl 80005b0 <__aeabi_dmul>
|
||
8006a22: e9dd 2304 ldrd r2, r3, [sp, #16]
|
||
8006a26: f7fa f849 bl 8000abc <__aeabi_dcmpge>
|
||
8006a2a: 9c02 ldr r4, [sp, #8]
|
||
8006a2c: 4626 mov r6, r4
|
||
8006a2e: 2800 cmp r0, #0
|
||
8006a30: f040 824a bne.w 8006ec8 <_dtoa_r+0x960>
|
||
8006a34: 2331 movs r3, #49 ; 0x31
|
||
8006a36: 9f08 ldr r7, [sp, #32]
|
||
8006a38: f109 0901 add.w r9, r9, #1
|
||
8006a3c: f807 3b01 strb.w r3, [r7], #1
|
||
8006a40: e246 b.n 8006ed0 <_dtoa_r+0x968>
|
||
8006a42: 07e2 lsls r2, r4, #31
|
||
8006a44: d505 bpl.n 8006a52 <_dtoa_r+0x4ea>
|
||
8006a46: e9d6 2300 ldrd r2, r3, [r6]
|
||
8006a4a: f7f9 fdb1 bl 80005b0 <__aeabi_dmul>
|
||
8006a4e: 2301 movs r3, #1
|
||
8006a50: 3701 adds r7, #1
|
||
8006a52: 1064 asrs r4, r4, #1
|
||
8006a54: 3608 adds r6, #8
|
||
8006a56: e76d b.n 8006934 <_dtoa_r+0x3cc>
|
||
8006a58: 2702 movs r7, #2
|
||
8006a5a: e770 b.n 800693e <_dtoa_r+0x3d6>
|
||
8006a5c: 46c8 mov r8, r9
|
||
8006a5e: 9c02 ldr r4, [sp, #8]
|
||
8006a60: e78f b.n 8006982 <_dtoa_r+0x41a>
|
||
8006a62: 9908 ldr r1, [sp, #32]
|
||
8006a64: 4b29 ldr r3, [pc, #164] ; (8006b0c <_dtoa_r+0x5a4>)
|
||
8006a66: 4421 add r1, r4
|
||
8006a68: 9112 str r1, [sp, #72] ; 0x48
|
||
8006a6a: 990b ldr r1, [sp, #44] ; 0x2c
|
||
8006a6c: eb03 03c4 add.w r3, r3, r4, lsl #3
|
||
8006a70: e9dd 6710 ldrd r6, r7, [sp, #64] ; 0x40
|
||
8006a74: e953 2302 ldrd r2, r3, [r3, #-8]
|
||
8006a78: 2900 cmp r1, #0
|
||
8006a7a: d055 beq.n 8006b28 <_dtoa_r+0x5c0>
|
||
8006a7c: 2000 movs r0, #0
|
||
8006a7e: 4929 ldr r1, [pc, #164] ; (8006b24 <_dtoa_r+0x5bc>)
|
||
8006a80: f7f9 fec0 bl 8000804 <__aeabi_ddiv>
|
||
8006a84: 463b mov r3, r7
|
||
8006a86: 4632 mov r2, r6
|
||
8006a88: f7f9 fbda bl 8000240 <__aeabi_dsub>
|
||
8006a8c: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
8006a90: 9f08 ldr r7, [sp, #32]
|
||
8006a92: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006a96: f7fa f83b bl 8000b10 <__aeabi_d2iz>
|
||
8006a9a: 4604 mov r4, r0
|
||
8006a9c: f7f9 fd1e bl 80004dc <__aeabi_i2d>
|
||
8006aa0: 4602 mov r2, r0
|
||
8006aa2: 460b mov r3, r1
|
||
8006aa4: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006aa8: f7f9 fbca bl 8000240 <__aeabi_dsub>
|
||
8006aac: 4602 mov r2, r0
|
||
8006aae: 460b mov r3, r1
|
||
8006ab0: 3430 adds r4, #48 ; 0x30
|
||
8006ab2: e9cd 2304 strd r2, r3, [sp, #16]
|
||
8006ab6: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
8006aba: f807 4b01 strb.w r4, [r7], #1
|
||
8006abe: f7f9 ffe9 bl 8000a94 <__aeabi_dcmplt>
|
||
8006ac2: 2800 cmp r0, #0
|
||
8006ac4: d174 bne.n 8006bb0 <_dtoa_r+0x648>
|
||
8006ac6: e9dd 2304 ldrd r2, r3, [sp, #16]
|
||
8006aca: 2000 movs r0, #0
|
||
8006acc: 4911 ldr r1, [pc, #68] ; (8006b14 <_dtoa_r+0x5ac>)
|
||
8006ace: f7f9 fbb7 bl 8000240 <__aeabi_dsub>
|
||
8006ad2: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
8006ad6: f7f9 ffdd bl 8000a94 <__aeabi_dcmplt>
|
||
8006ada: 2800 cmp r0, #0
|
||
8006adc: f040 80b6 bne.w 8006c4c <_dtoa_r+0x6e4>
|
||
8006ae0: 9b12 ldr r3, [sp, #72] ; 0x48
|
||
8006ae2: 429f cmp r7, r3
|
||
8006ae4: f43f af7a beq.w 80069dc <_dtoa_r+0x474>
|
||
8006ae8: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
8006aec: 2200 movs r2, #0
|
||
8006aee: 4b0a ldr r3, [pc, #40] ; (8006b18 <_dtoa_r+0x5b0>)
|
||
8006af0: f7f9 fd5e bl 80005b0 <__aeabi_dmul>
|
||
8006af4: 2200 movs r2, #0
|
||
8006af6: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
8006afa: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006afe: 4b06 ldr r3, [pc, #24] ; (8006b18 <_dtoa_r+0x5b0>)
|
||
8006b00: f7f9 fd56 bl 80005b0 <__aeabi_dmul>
|
||
8006b04: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8006b08: e7c3 b.n 8006a92 <_dtoa_r+0x52a>
|
||
8006b0a: bf00 nop
|
||
8006b0c: 080093e0 .word 0x080093e0
|
||
8006b10: 080093b8 .word 0x080093b8
|
||
8006b14: 3ff00000 .word 0x3ff00000
|
||
8006b18: 40240000 .word 0x40240000
|
||
8006b1c: 401c0000 .word 0x401c0000
|
||
8006b20: 40140000 .word 0x40140000
|
||
8006b24: 3fe00000 .word 0x3fe00000
|
||
8006b28: 4630 mov r0, r6
|
||
8006b2a: 4639 mov r1, r7
|
||
8006b2c: f7f9 fd40 bl 80005b0 <__aeabi_dmul>
|
||
8006b30: 9b12 ldr r3, [sp, #72] ; 0x48
|
||
8006b32: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
8006b36: 9c08 ldr r4, [sp, #32]
|
||
8006b38: 9314 str r3, [sp, #80] ; 0x50
|
||
8006b3a: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006b3e: f7f9 ffe7 bl 8000b10 <__aeabi_d2iz>
|
||
8006b42: 9015 str r0, [sp, #84] ; 0x54
|
||
8006b44: f7f9 fcca bl 80004dc <__aeabi_i2d>
|
||
8006b48: 4602 mov r2, r0
|
||
8006b4a: 460b mov r3, r1
|
||
8006b4c: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006b50: f7f9 fb76 bl 8000240 <__aeabi_dsub>
|
||
8006b54: 9b15 ldr r3, [sp, #84] ; 0x54
|
||
8006b56: 4606 mov r6, r0
|
||
8006b58: 3330 adds r3, #48 ; 0x30
|
||
8006b5a: f804 3b01 strb.w r3, [r4], #1
|
||
8006b5e: 9b12 ldr r3, [sp, #72] ; 0x48
|
||
8006b60: 460f mov r7, r1
|
||
8006b62: 429c cmp r4, r3
|
||
8006b64: f04f 0200 mov.w r2, #0
|
||
8006b68: d124 bne.n 8006bb4 <_dtoa_r+0x64c>
|
||
8006b6a: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
8006b6e: 4bb3 ldr r3, [pc, #716] ; (8006e3c <_dtoa_r+0x8d4>)
|
||
8006b70: f7f9 fb68 bl 8000244 <__adddf3>
|
||
8006b74: 4602 mov r2, r0
|
||
8006b76: 460b mov r3, r1
|
||
8006b78: 4630 mov r0, r6
|
||
8006b7a: 4639 mov r1, r7
|
||
8006b7c: f7f9 ffa8 bl 8000ad0 <__aeabi_dcmpgt>
|
||
8006b80: 2800 cmp r0, #0
|
||
8006b82: d162 bne.n 8006c4a <_dtoa_r+0x6e2>
|
||
8006b84: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
8006b88: 2000 movs r0, #0
|
||
8006b8a: 49ac ldr r1, [pc, #688] ; (8006e3c <_dtoa_r+0x8d4>)
|
||
8006b8c: f7f9 fb58 bl 8000240 <__aeabi_dsub>
|
||
8006b90: 4602 mov r2, r0
|
||
8006b92: 460b mov r3, r1
|
||
8006b94: 4630 mov r0, r6
|
||
8006b96: 4639 mov r1, r7
|
||
8006b98: f7f9 ff7c bl 8000a94 <__aeabi_dcmplt>
|
||
8006b9c: 2800 cmp r0, #0
|
||
8006b9e: f43f af1d beq.w 80069dc <_dtoa_r+0x474>
|
||
8006ba2: 9f14 ldr r7, [sp, #80] ; 0x50
|
||
8006ba4: 1e7b subs r3, r7, #1
|
||
8006ba6: 9314 str r3, [sp, #80] ; 0x50
|
||
8006ba8: f817 3c01 ldrb.w r3, [r7, #-1]
|
||
8006bac: 2b30 cmp r3, #48 ; 0x30
|
||
8006bae: d0f8 beq.n 8006ba2 <_dtoa_r+0x63a>
|
||
8006bb0: 46c1 mov r9, r8
|
||
8006bb2: e03a b.n 8006c2a <_dtoa_r+0x6c2>
|
||
8006bb4: 4ba2 ldr r3, [pc, #648] ; (8006e40 <_dtoa_r+0x8d8>)
|
||
8006bb6: f7f9 fcfb bl 80005b0 <__aeabi_dmul>
|
||
8006bba: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8006bbe: e7bc b.n 8006b3a <_dtoa_r+0x5d2>
|
||
8006bc0: 9f08 ldr r7, [sp, #32]
|
||
8006bc2: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
8006bc6: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006bca: f7f9 fe1b bl 8000804 <__aeabi_ddiv>
|
||
8006bce: f7f9 ff9f bl 8000b10 <__aeabi_d2iz>
|
||
8006bd2: 4604 mov r4, r0
|
||
8006bd4: f7f9 fc82 bl 80004dc <__aeabi_i2d>
|
||
8006bd8: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
8006bdc: f7f9 fce8 bl 80005b0 <__aeabi_dmul>
|
||
8006be0: f104 0630 add.w r6, r4, #48 ; 0x30
|
||
8006be4: 460b mov r3, r1
|
||
8006be6: 4602 mov r2, r0
|
||
8006be8: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006bec: f7f9 fb28 bl 8000240 <__aeabi_dsub>
|
||
8006bf0: f807 6b01 strb.w r6, [r7], #1
|
||
8006bf4: 9e08 ldr r6, [sp, #32]
|
||
8006bf6: 9b02 ldr r3, [sp, #8]
|
||
8006bf8: 1bbe subs r6, r7, r6
|
||
8006bfa: 42b3 cmp r3, r6
|
||
8006bfc: d13a bne.n 8006c74 <_dtoa_r+0x70c>
|
||
8006bfe: 4602 mov r2, r0
|
||
8006c00: 460b mov r3, r1
|
||
8006c02: f7f9 fb1f bl 8000244 <__adddf3>
|
||
8006c06: 4602 mov r2, r0
|
||
8006c08: 460b mov r3, r1
|
||
8006c0a: e9cd 2302 strd r2, r3, [sp, #8]
|
||
8006c0e: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
8006c12: f7f9 ff5d bl 8000ad0 <__aeabi_dcmpgt>
|
||
8006c16: bb58 cbnz r0, 8006c70 <_dtoa_r+0x708>
|
||
8006c18: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
8006c1c: e9dd 0102 ldrd r0, r1, [sp, #8]
|
||
8006c20: f7f9 ff2e bl 8000a80 <__aeabi_dcmpeq>
|
||
8006c24: b108 cbz r0, 8006c2a <_dtoa_r+0x6c2>
|
||
8006c26: 07e1 lsls r1, r4, #31
|
||
8006c28: d422 bmi.n 8006c70 <_dtoa_r+0x708>
|
||
8006c2a: 4628 mov r0, r5
|
||
8006c2c: 4651 mov r1, sl
|
||
8006c2e: f000 faf5 bl 800721c <_Bfree>
|
||
8006c32: 2300 movs r3, #0
|
||
8006c34: 703b strb r3, [r7, #0]
|
||
8006c36: 9b24 ldr r3, [sp, #144] ; 0x90
|
||
8006c38: f109 0001 add.w r0, r9, #1
|
||
8006c3c: 6018 str r0, [r3, #0]
|
||
8006c3e: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
8006c40: 2b00 cmp r3, #0
|
||
8006c42: f43f acdf beq.w 8006604 <_dtoa_r+0x9c>
|
||
8006c46: 601f str r7, [r3, #0]
|
||
8006c48: e4dc b.n 8006604 <_dtoa_r+0x9c>
|
||
8006c4a: 4627 mov r7, r4
|
||
8006c4c: 463b mov r3, r7
|
||
8006c4e: 461f mov r7, r3
|
||
8006c50: f813 2d01 ldrb.w r2, [r3, #-1]!
|
||
8006c54: 2a39 cmp r2, #57 ; 0x39
|
||
8006c56: d107 bne.n 8006c68 <_dtoa_r+0x700>
|
||
8006c58: 9a08 ldr r2, [sp, #32]
|
||
8006c5a: 429a cmp r2, r3
|
||
8006c5c: d1f7 bne.n 8006c4e <_dtoa_r+0x6e6>
|
||
8006c5e: 2230 movs r2, #48 ; 0x30
|
||
8006c60: 9908 ldr r1, [sp, #32]
|
||
8006c62: f108 0801 add.w r8, r8, #1
|
||
8006c66: 700a strb r2, [r1, #0]
|
||
8006c68: 781a ldrb r2, [r3, #0]
|
||
8006c6a: 3201 adds r2, #1
|
||
8006c6c: 701a strb r2, [r3, #0]
|
||
8006c6e: e79f b.n 8006bb0 <_dtoa_r+0x648>
|
||
8006c70: 46c8 mov r8, r9
|
||
8006c72: e7eb b.n 8006c4c <_dtoa_r+0x6e4>
|
||
8006c74: 2200 movs r2, #0
|
||
8006c76: 4b72 ldr r3, [pc, #456] ; (8006e40 <_dtoa_r+0x8d8>)
|
||
8006c78: f7f9 fc9a bl 80005b0 <__aeabi_dmul>
|
||
8006c7c: 4602 mov r2, r0
|
||
8006c7e: 460b mov r3, r1
|
||
8006c80: e9cd 2304 strd r2, r3, [sp, #16]
|
||
8006c84: 2200 movs r2, #0
|
||
8006c86: 2300 movs r3, #0
|
||
8006c88: f7f9 fefa bl 8000a80 <__aeabi_dcmpeq>
|
||
8006c8c: 2800 cmp r0, #0
|
||
8006c8e: d098 beq.n 8006bc2 <_dtoa_r+0x65a>
|
||
8006c90: e7cb b.n 8006c2a <_dtoa_r+0x6c2>
|
||
8006c92: 9a0b ldr r2, [sp, #44] ; 0x2c
|
||
8006c94: 2a00 cmp r2, #0
|
||
8006c96: f000 80cd beq.w 8006e34 <_dtoa_r+0x8cc>
|
||
8006c9a: 9a22 ldr r2, [sp, #136] ; 0x88
|
||
8006c9c: 2a01 cmp r2, #1
|
||
8006c9e: f300 80af bgt.w 8006e00 <_dtoa_r+0x898>
|
||
8006ca2: 9a13 ldr r2, [sp, #76] ; 0x4c
|
||
8006ca4: 2a00 cmp r2, #0
|
||
8006ca6: f000 80a7 beq.w 8006df8 <_dtoa_r+0x890>
|
||
8006caa: f203 4333 addw r3, r3, #1075 ; 0x433
|
||
8006cae: 9c0a ldr r4, [sp, #40] ; 0x28
|
||
8006cb0: 9f06 ldr r7, [sp, #24]
|
||
8006cb2: 9a06 ldr r2, [sp, #24]
|
||
8006cb4: 2101 movs r1, #1
|
||
8006cb6: 441a add r2, r3
|
||
8006cb8: 9206 str r2, [sp, #24]
|
||
8006cba: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
8006cbc: 4628 mov r0, r5
|
||
8006cbe: 441a add r2, r3
|
||
8006cc0: 9209 str r2, [sp, #36] ; 0x24
|
||
8006cc2: f000 fb65 bl 8007390 <__i2b>
|
||
8006cc6: 4606 mov r6, r0
|
||
8006cc8: 2f00 cmp r7, #0
|
||
8006cca: dd0c ble.n 8006ce6 <_dtoa_r+0x77e>
|
||
8006ccc: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006cce: 2b00 cmp r3, #0
|
||
8006cd0: dd09 ble.n 8006ce6 <_dtoa_r+0x77e>
|
||
8006cd2: 42bb cmp r3, r7
|
||
8006cd4: bfa8 it ge
|
||
8006cd6: 463b movge r3, r7
|
||
8006cd8: 9a06 ldr r2, [sp, #24]
|
||
8006cda: 1aff subs r7, r7, r3
|
||
8006cdc: 1ad2 subs r2, r2, r3
|
||
8006cde: 9206 str r2, [sp, #24]
|
||
8006ce0: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
8006ce2: 1ad3 subs r3, r2, r3
|
||
8006ce4: 9309 str r3, [sp, #36] ; 0x24
|
||
8006ce6: 9b0a ldr r3, [sp, #40] ; 0x28
|
||
8006ce8: b1f3 cbz r3, 8006d28 <_dtoa_r+0x7c0>
|
||
8006cea: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8006cec: 2b00 cmp r3, #0
|
||
8006cee: f000 80a9 beq.w 8006e44 <_dtoa_r+0x8dc>
|
||
8006cf2: 2c00 cmp r4, #0
|
||
8006cf4: dd10 ble.n 8006d18 <_dtoa_r+0x7b0>
|
||
8006cf6: 4631 mov r1, r6
|
||
8006cf8: 4622 mov r2, r4
|
||
8006cfa: 4628 mov r0, r5
|
||
8006cfc: f000 fc02 bl 8007504 <__pow5mult>
|
||
8006d00: 4652 mov r2, sl
|
||
8006d02: 4601 mov r1, r0
|
||
8006d04: 4606 mov r6, r0
|
||
8006d06: 4628 mov r0, r5
|
||
8006d08: f000 fb58 bl 80073bc <__multiply>
|
||
8006d0c: 4680 mov r8, r0
|
||
8006d0e: 4651 mov r1, sl
|
||
8006d10: 4628 mov r0, r5
|
||
8006d12: f000 fa83 bl 800721c <_Bfree>
|
||
8006d16: 46c2 mov sl, r8
|
||
8006d18: 9b0a ldr r3, [sp, #40] ; 0x28
|
||
8006d1a: 1b1a subs r2, r3, r4
|
||
8006d1c: d004 beq.n 8006d28 <_dtoa_r+0x7c0>
|
||
8006d1e: 4651 mov r1, sl
|
||
8006d20: 4628 mov r0, r5
|
||
8006d22: f000 fbef bl 8007504 <__pow5mult>
|
||
8006d26: 4682 mov sl, r0
|
||
8006d28: 2101 movs r1, #1
|
||
8006d2a: 4628 mov r0, r5
|
||
8006d2c: f000 fb30 bl 8007390 <__i2b>
|
||
8006d30: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8006d32: 4604 mov r4, r0
|
||
8006d34: 2b00 cmp r3, #0
|
||
8006d36: f340 8087 ble.w 8006e48 <_dtoa_r+0x8e0>
|
||
8006d3a: 461a mov r2, r3
|
||
8006d3c: 4601 mov r1, r0
|
||
8006d3e: 4628 mov r0, r5
|
||
8006d40: f000 fbe0 bl 8007504 <__pow5mult>
|
||
8006d44: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8006d46: 4604 mov r4, r0
|
||
8006d48: 2b01 cmp r3, #1
|
||
8006d4a: f340 8080 ble.w 8006e4e <_dtoa_r+0x8e6>
|
||
8006d4e: f04f 0800 mov.w r8, #0
|
||
8006d52: 6923 ldr r3, [r4, #16]
|
||
8006d54: eb04 0383 add.w r3, r4, r3, lsl #2
|
||
8006d58: 6918 ldr r0, [r3, #16]
|
||
8006d5a: f000 facb bl 80072f4 <__hi0bits>
|
||
8006d5e: f1c0 0020 rsb r0, r0, #32
|
||
8006d62: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006d64: 4418 add r0, r3
|
||
8006d66: f010 001f ands.w r0, r0, #31
|
||
8006d6a: f000 8092 beq.w 8006e92 <_dtoa_r+0x92a>
|
||
8006d6e: f1c0 0320 rsb r3, r0, #32
|
||
8006d72: 2b04 cmp r3, #4
|
||
8006d74: f340 808a ble.w 8006e8c <_dtoa_r+0x924>
|
||
8006d78: f1c0 001c rsb r0, r0, #28
|
||
8006d7c: 9b06 ldr r3, [sp, #24]
|
||
8006d7e: 4407 add r7, r0
|
||
8006d80: 4403 add r3, r0
|
||
8006d82: 9306 str r3, [sp, #24]
|
||
8006d84: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006d86: 4403 add r3, r0
|
||
8006d88: 9309 str r3, [sp, #36] ; 0x24
|
||
8006d8a: 9b06 ldr r3, [sp, #24]
|
||
8006d8c: 2b00 cmp r3, #0
|
||
8006d8e: dd05 ble.n 8006d9c <_dtoa_r+0x834>
|
||
8006d90: 4651 mov r1, sl
|
||
8006d92: 461a mov r2, r3
|
||
8006d94: 4628 mov r0, r5
|
||
8006d96: f000 fc0f bl 80075b8 <__lshift>
|
||
8006d9a: 4682 mov sl, r0
|
||
8006d9c: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006d9e: 2b00 cmp r3, #0
|
||
8006da0: dd05 ble.n 8006dae <_dtoa_r+0x846>
|
||
8006da2: 4621 mov r1, r4
|
||
8006da4: 461a mov r2, r3
|
||
8006da6: 4628 mov r0, r5
|
||
8006da8: f000 fc06 bl 80075b8 <__lshift>
|
||
8006dac: 4604 mov r4, r0
|
||
8006dae: 9b0f ldr r3, [sp, #60] ; 0x3c
|
||
8006db0: 2b00 cmp r3, #0
|
||
8006db2: d070 beq.n 8006e96 <_dtoa_r+0x92e>
|
||
8006db4: 4621 mov r1, r4
|
||
8006db6: 4650 mov r0, sl
|
||
8006db8: f000 fc6a bl 8007690 <__mcmp>
|
||
8006dbc: 2800 cmp r0, #0
|
||
8006dbe: da6a bge.n 8006e96 <_dtoa_r+0x92e>
|
||
8006dc0: 2300 movs r3, #0
|
||
8006dc2: 4651 mov r1, sl
|
||
8006dc4: 220a movs r2, #10
|
||
8006dc6: 4628 mov r0, r5
|
||
8006dc8: f000 fa4a bl 8007260 <__multadd>
|
||
8006dcc: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8006dce: 4682 mov sl, r0
|
||
8006dd0: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff
|
||
8006dd4: 2b00 cmp r3, #0
|
||
8006dd6: f000 8193 beq.w 8007100 <_dtoa_r+0xb98>
|
||
8006dda: 4631 mov r1, r6
|
||
8006ddc: 2300 movs r3, #0
|
||
8006dde: 220a movs r2, #10
|
||
8006de0: 4628 mov r0, r5
|
||
8006de2: f000 fa3d bl 8007260 <__multadd>
|
||
8006de6: f1bb 0f00 cmp.w fp, #0
|
||
8006dea: 4606 mov r6, r0
|
||
8006dec: f300 8093 bgt.w 8006f16 <_dtoa_r+0x9ae>
|
||
8006df0: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8006df2: 2b02 cmp r3, #2
|
||
8006df4: dc57 bgt.n 8006ea6 <_dtoa_r+0x93e>
|
||
8006df6: e08e b.n 8006f16 <_dtoa_r+0x9ae>
|
||
8006df8: 9b16 ldr r3, [sp, #88] ; 0x58
|
||
8006dfa: f1c3 0336 rsb r3, r3, #54 ; 0x36
|
||
8006dfe: e756 b.n 8006cae <_dtoa_r+0x746>
|
||
8006e00: 9b02 ldr r3, [sp, #8]
|
||
8006e02: 1e5c subs r4, r3, #1
|
||
8006e04: 9b0a ldr r3, [sp, #40] ; 0x28
|
||
8006e06: 42a3 cmp r3, r4
|
||
8006e08: bfb7 itett lt
|
||
8006e0a: 9b0a ldrlt r3, [sp, #40] ; 0x28
|
||
8006e0c: 1b1c subge r4, r3, r4
|
||
8006e0e: 1ae2 sublt r2, r4, r3
|
||
8006e10: 9b0e ldrlt r3, [sp, #56] ; 0x38
|
||
8006e12: bfbe ittt lt
|
||
8006e14: 940a strlt r4, [sp, #40] ; 0x28
|
||
8006e16: 189b addlt r3, r3, r2
|
||
8006e18: 930e strlt r3, [sp, #56] ; 0x38
|
||
8006e1a: 9b02 ldr r3, [sp, #8]
|
||
8006e1c: bfb8 it lt
|
||
8006e1e: 2400 movlt r4, #0
|
||
8006e20: 2b00 cmp r3, #0
|
||
8006e22: bfbb ittet lt
|
||
8006e24: 9b06 ldrlt r3, [sp, #24]
|
||
8006e26: 9a02 ldrlt r2, [sp, #8]
|
||
8006e28: 9f06 ldrge r7, [sp, #24]
|
||
8006e2a: 1a9f sublt r7, r3, r2
|
||
8006e2c: bfac ite ge
|
||
8006e2e: 9b02 ldrge r3, [sp, #8]
|
||
8006e30: 2300 movlt r3, #0
|
||
8006e32: e73e b.n 8006cb2 <_dtoa_r+0x74a>
|
||
8006e34: 9c0a ldr r4, [sp, #40] ; 0x28
|
||
8006e36: 9f06 ldr r7, [sp, #24]
|
||
8006e38: 9e0b ldr r6, [sp, #44] ; 0x2c
|
||
8006e3a: e745 b.n 8006cc8 <_dtoa_r+0x760>
|
||
8006e3c: 3fe00000 .word 0x3fe00000
|
||
8006e40: 40240000 .word 0x40240000
|
||
8006e44: 9a0a ldr r2, [sp, #40] ; 0x28
|
||
8006e46: e76a b.n 8006d1e <_dtoa_r+0x7b6>
|
||
8006e48: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8006e4a: 2b01 cmp r3, #1
|
||
8006e4c: dc19 bgt.n 8006e82 <_dtoa_r+0x91a>
|
||
8006e4e: 9b04 ldr r3, [sp, #16]
|
||
8006e50: b9bb cbnz r3, 8006e82 <_dtoa_r+0x91a>
|
||
8006e52: 9b05 ldr r3, [sp, #20]
|
||
8006e54: f3c3 0313 ubfx r3, r3, #0, #20
|
||
8006e58: b99b cbnz r3, 8006e82 <_dtoa_r+0x91a>
|
||
8006e5a: 9b05 ldr r3, [sp, #20]
|
||
8006e5c: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
|
||
8006e60: 0d1b lsrs r3, r3, #20
|
||
8006e62: 051b lsls r3, r3, #20
|
||
8006e64: b183 cbz r3, 8006e88 <_dtoa_r+0x920>
|
||
8006e66: f04f 0801 mov.w r8, #1
|
||
8006e6a: 9b06 ldr r3, [sp, #24]
|
||
8006e6c: 3301 adds r3, #1
|
||
8006e6e: 9306 str r3, [sp, #24]
|
||
8006e70: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006e72: 3301 adds r3, #1
|
||
8006e74: 9309 str r3, [sp, #36] ; 0x24
|
||
8006e76: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8006e78: 2b00 cmp r3, #0
|
||
8006e7a: f47f af6a bne.w 8006d52 <_dtoa_r+0x7ea>
|
||
8006e7e: 2001 movs r0, #1
|
||
8006e80: e76f b.n 8006d62 <_dtoa_r+0x7fa>
|
||
8006e82: f04f 0800 mov.w r8, #0
|
||
8006e86: e7f6 b.n 8006e76 <_dtoa_r+0x90e>
|
||
8006e88: 4698 mov r8, r3
|
||
8006e8a: e7f4 b.n 8006e76 <_dtoa_r+0x90e>
|
||
8006e8c: f43f af7d beq.w 8006d8a <_dtoa_r+0x822>
|
||
8006e90: 4618 mov r0, r3
|
||
8006e92: 301c adds r0, #28
|
||
8006e94: e772 b.n 8006d7c <_dtoa_r+0x814>
|
||
8006e96: 9b02 ldr r3, [sp, #8]
|
||
8006e98: 2b00 cmp r3, #0
|
||
8006e9a: dc36 bgt.n 8006f0a <_dtoa_r+0x9a2>
|
||
8006e9c: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8006e9e: 2b02 cmp r3, #2
|
||
8006ea0: dd33 ble.n 8006f0a <_dtoa_r+0x9a2>
|
||
8006ea2: f8dd b008 ldr.w fp, [sp, #8]
|
||
8006ea6: f1bb 0f00 cmp.w fp, #0
|
||
8006eaa: d10d bne.n 8006ec8 <_dtoa_r+0x960>
|
||
8006eac: 4621 mov r1, r4
|
||
8006eae: 465b mov r3, fp
|
||
8006eb0: 2205 movs r2, #5
|
||
8006eb2: 4628 mov r0, r5
|
||
8006eb4: f000 f9d4 bl 8007260 <__multadd>
|
||
8006eb8: 4601 mov r1, r0
|
||
8006eba: 4604 mov r4, r0
|
||
8006ebc: 4650 mov r0, sl
|
||
8006ebe: f000 fbe7 bl 8007690 <__mcmp>
|
||
8006ec2: 2800 cmp r0, #0
|
||
8006ec4: f73f adb6 bgt.w 8006a34 <_dtoa_r+0x4cc>
|
||
8006ec8: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
8006eca: 9f08 ldr r7, [sp, #32]
|
||
8006ecc: ea6f 0903 mvn.w r9, r3
|
||
8006ed0: f04f 0800 mov.w r8, #0
|
||
8006ed4: 4621 mov r1, r4
|
||
8006ed6: 4628 mov r0, r5
|
||
8006ed8: f000 f9a0 bl 800721c <_Bfree>
|
||
8006edc: 2e00 cmp r6, #0
|
||
8006ede: f43f aea4 beq.w 8006c2a <_dtoa_r+0x6c2>
|
||
8006ee2: f1b8 0f00 cmp.w r8, #0
|
||
8006ee6: d005 beq.n 8006ef4 <_dtoa_r+0x98c>
|
||
8006ee8: 45b0 cmp r8, r6
|
||
8006eea: d003 beq.n 8006ef4 <_dtoa_r+0x98c>
|
||
8006eec: 4641 mov r1, r8
|
||
8006eee: 4628 mov r0, r5
|
||
8006ef0: f000 f994 bl 800721c <_Bfree>
|
||
8006ef4: 4631 mov r1, r6
|
||
8006ef6: 4628 mov r0, r5
|
||
8006ef8: f000 f990 bl 800721c <_Bfree>
|
||
8006efc: e695 b.n 8006c2a <_dtoa_r+0x6c2>
|
||
8006efe: 2400 movs r4, #0
|
||
8006f00: 4626 mov r6, r4
|
||
8006f02: e7e1 b.n 8006ec8 <_dtoa_r+0x960>
|
||
8006f04: 46c1 mov r9, r8
|
||
8006f06: 4626 mov r6, r4
|
||
8006f08: e594 b.n 8006a34 <_dtoa_r+0x4cc>
|
||
8006f0a: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8006f0c: f8dd b008 ldr.w fp, [sp, #8]
|
||
8006f10: 2b00 cmp r3, #0
|
||
8006f12: f000 80fc beq.w 800710e <_dtoa_r+0xba6>
|
||
8006f16: 2f00 cmp r7, #0
|
||
8006f18: dd05 ble.n 8006f26 <_dtoa_r+0x9be>
|
||
8006f1a: 4631 mov r1, r6
|
||
8006f1c: 463a mov r2, r7
|
||
8006f1e: 4628 mov r0, r5
|
||
8006f20: f000 fb4a bl 80075b8 <__lshift>
|
||
8006f24: 4606 mov r6, r0
|
||
8006f26: f1b8 0f00 cmp.w r8, #0
|
||
8006f2a: d05c beq.n 8006fe6 <_dtoa_r+0xa7e>
|
||
8006f2c: 4628 mov r0, r5
|
||
8006f2e: 6871 ldr r1, [r6, #4]
|
||
8006f30: f000 f934 bl 800719c <_Balloc>
|
||
8006f34: 4607 mov r7, r0
|
||
8006f36: b928 cbnz r0, 8006f44 <_dtoa_r+0x9dc>
|
||
8006f38: 4602 mov r2, r0
|
||
8006f3a: f240 21ea movw r1, #746 ; 0x2ea
|
||
8006f3e: 4b7e ldr r3, [pc, #504] ; (8007138 <_dtoa_r+0xbd0>)
|
||
8006f40: f7ff bb26 b.w 8006590 <_dtoa_r+0x28>
|
||
8006f44: 6932 ldr r2, [r6, #16]
|
||
8006f46: f106 010c add.w r1, r6, #12
|
||
8006f4a: 3202 adds r2, #2
|
||
8006f4c: 0092 lsls r2, r2, #2
|
||
8006f4e: 300c adds r0, #12
|
||
8006f50: f000 f90a bl 8007168 <memcpy>
|
||
8006f54: 2201 movs r2, #1
|
||
8006f56: 4639 mov r1, r7
|
||
8006f58: 4628 mov r0, r5
|
||
8006f5a: f000 fb2d bl 80075b8 <__lshift>
|
||
8006f5e: 46b0 mov r8, r6
|
||
8006f60: 4606 mov r6, r0
|
||
8006f62: 9b08 ldr r3, [sp, #32]
|
||
8006f64: 3301 adds r3, #1
|
||
8006f66: 9302 str r3, [sp, #8]
|
||
8006f68: 9b08 ldr r3, [sp, #32]
|
||
8006f6a: 445b add r3, fp
|
||
8006f6c: 930a str r3, [sp, #40] ; 0x28
|
||
8006f6e: 9b04 ldr r3, [sp, #16]
|
||
8006f70: f003 0301 and.w r3, r3, #1
|
||
8006f74: 9309 str r3, [sp, #36] ; 0x24
|
||
8006f76: 9b02 ldr r3, [sp, #8]
|
||
8006f78: 4621 mov r1, r4
|
||
8006f7a: 4650 mov r0, sl
|
||
8006f7c: f103 3bff add.w fp, r3, #4294967295 ; 0xffffffff
|
||
8006f80: f7ff fa62 bl 8006448 <quorem>
|
||
8006f84: 4603 mov r3, r0
|
||
8006f86: 4641 mov r1, r8
|
||
8006f88: 3330 adds r3, #48 ; 0x30
|
||
8006f8a: 9004 str r0, [sp, #16]
|
||
8006f8c: 4650 mov r0, sl
|
||
8006f8e: 930b str r3, [sp, #44] ; 0x2c
|
||
8006f90: f000 fb7e bl 8007690 <__mcmp>
|
||
8006f94: 4632 mov r2, r6
|
||
8006f96: 9006 str r0, [sp, #24]
|
||
8006f98: 4621 mov r1, r4
|
||
8006f9a: 4628 mov r0, r5
|
||
8006f9c: f000 fb94 bl 80076c8 <__mdiff>
|
||
8006fa0: 68c2 ldr r2, [r0, #12]
|
||
8006fa2: 4607 mov r7, r0
|
||
8006fa4: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8006fa6: bb02 cbnz r2, 8006fea <_dtoa_r+0xa82>
|
||
8006fa8: 4601 mov r1, r0
|
||
8006faa: 4650 mov r0, sl
|
||
8006fac: f000 fb70 bl 8007690 <__mcmp>
|
||
8006fb0: 4602 mov r2, r0
|
||
8006fb2: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8006fb4: 4639 mov r1, r7
|
||
8006fb6: 4628 mov r0, r5
|
||
8006fb8: e9cd 320b strd r3, r2, [sp, #44] ; 0x2c
|
||
8006fbc: f000 f92e bl 800721c <_Bfree>
|
||
8006fc0: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8006fc2: 9a0c ldr r2, [sp, #48] ; 0x30
|
||
8006fc4: 9f02 ldr r7, [sp, #8]
|
||
8006fc6: ea43 0102 orr.w r1, r3, r2
|
||
8006fca: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006fcc: 430b orrs r3, r1
|
||
8006fce: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8006fd0: d10d bne.n 8006fee <_dtoa_r+0xa86>
|
||
8006fd2: 2b39 cmp r3, #57 ; 0x39
|
||
8006fd4: d027 beq.n 8007026 <_dtoa_r+0xabe>
|
||
8006fd6: 9a06 ldr r2, [sp, #24]
|
||
8006fd8: 2a00 cmp r2, #0
|
||
8006fda: dd01 ble.n 8006fe0 <_dtoa_r+0xa78>
|
||
8006fdc: 9b04 ldr r3, [sp, #16]
|
||
8006fde: 3331 adds r3, #49 ; 0x31
|
||
8006fe0: f88b 3000 strb.w r3, [fp]
|
||
8006fe4: e776 b.n 8006ed4 <_dtoa_r+0x96c>
|
||
8006fe6: 4630 mov r0, r6
|
||
8006fe8: e7b9 b.n 8006f5e <_dtoa_r+0x9f6>
|
||
8006fea: 2201 movs r2, #1
|
||
8006fec: e7e2 b.n 8006fb4 <_dtoa_r+0xa4c>
|
||
8006fee: 9906 ldr r1, [sp, #24]
|
||
8006ff0: 2900 cmp r1, #0
|
||
8006ff2: db04 blt.n 8006ffe <_dtoa_r+0xa96>
|
||
8006ff4: 9822 ldr r0, [sp, #136] ; 0x88
|
||
8006ff6: 4301 orrs r1, r0
|
||
8006ff8: 9809 ldr r0, [sp, #36] ; 0x24
|
||
8006ffa: 4301 orrs r1, r0
|
||
8006ffc: d120 bne.n 8007040 <_dtoa_r+0xad8>
|
||
8006ffe: 2a00 cmp r2, #0
|
||
8007000: ddee ble.n 8006fe0 <_dtoa_r+0xa78>
|
||
8007002: 4651 mov r1, sl
|
||
8007004: 2201 movs r2, #1
|
||
8007006: 4628 mov r0, r5
|
||
8007008: 9302 str r3, [sp, #8]
|
||
800700a: f000 fad5 bl 80075b8 <__lshift>
|
||
800700e: 4621 mov r1, r4
|
||
8007010: 4682 mov sl, r0
|
||
8007012: f000 fb3d bl 8007690 <__mcmp>
|
||
8007016: 2800 cmp r0, #0
|
||
8007018: 9b02 ldr r3, [sp, #8]
|
||
800701a: dc02 bgt.n 8007022 <_dtoa_r+0xaba>
|
||
800701c: d1e0 bne.n 8006fe0 <_dtoa_r+0xa78>
|
||
800701e: 07da lsls r2, r3, #31
|
||
8007020: d5de bpl.n 8006fe0 <_dtoa_r+0xa78>
|
||
8007022: 2b39 cmp r3, #57 ; 0x39
|
||
8007024: d1da bne.n 8006fdc <_dtoa_r+0xa74>
|
||
8007026: 2339 movs r3, #57 ; 0x39
|
||
8007028: f88b 3000 strb.w r3, [fp]
|
||
800702c: 463b mov r3, r7
|
||
800702e: 461f mov r7, r3
|
||
8007030: f817 2c01 ldrb.w r2, [r7, #-1]
|
||
8007034: 3b01 subs r3, #1
|
||
8007036: 2a39 cmp r2, #57 ; 0x39
|
||
8007038: d050 beq.n 80070dc <_dtoa_r+0xb74>
|
||
800703a: 3201 adds r2, #1
|
||
800703c: 701a strb r2, [r3, #0]
|
||
800703e: e749 b.n 8006ed4 <_dtoa_r+0x96c>
|
||
8007040: 2a00 cmp r2, #0
|
||
8007042: dd03 ble.n 800704c <_dtoa_r+0xae4>
|
||
8007044: 2b39 cmp r3, #57 ; 0x39
|
||
8007046: d0ee beq.n 8007026 <_dtoa_r+0xabe>
|
||
8007048: 3301 adds r3, #1
|
||
800704a: e7c9 b.n 8006fe0 <_dtoa_r+0xa78>
|
||
800704c: 9a02 ldr r2, [sp, #8]
|
||
800704e: 990a ldr r1, [sp, #40] ; 0x28
|
||
8007050: f802 3c01 strb.w r3, [r2, #-1]
|
||
8007054: 428a cmp r2, r1
|
||
8007056: d02a beq.n 80070ae <_dtoa_r+0xb46>
|
||
8007058: 4651 mov r1, sl
|
||
800705a: 2300 movs r3, #0
|
||
800705c: 220a movs r2, #10
|
||
800705e: 4628 mov r0, r5
|
||
8007060: f000 f8fe bl 8007260 <__multadd>
|
||
8007064: 45b0 cmp r8, r6
|
||
8007066: 4682 mov sl, r0
|
||
8007068: f04f 0300 mov.w r3, #0
|
||
800706c: f04f 020a mov.w r2, #10
|
||
8007070: 4641 mov r1, r8
|
||
8007072: 4628 mov r0, r5
|
||
8007074: d107 bne.n 8007086 <_dtoa_r+0xb1e>
|
||
8007076: f000 f8f3 bl 8007260 <__multadd>
|
||
800707a: 4680 mov r8, r0
|
||
800707c: 4606 mov r6, r0
|
||
800707e: 9b02 ldr r3, [sp, #8]
|
||
8007080: 3301 adds r3, #1
|
||
8007082: 9302 str r3, [sp, #8]
|
||
8007084: e777 b.n 8006f76 <_dtoa_r+0xa0e>
|
||
8007086: f000 f8eb bl 8007260 <__multadd>
|
||
800708a: 4631 mov r1, r6
|
||
800708c: 4680 mov r8, r0
|
||
800708e: 2300 movs r3, #0
|
||
8007090: 220a movs r2, #10
|
||
8007092: 4628 mov r0, r5
|
||
8007094: f000 f8e4 bl 8007260 <__multadd>
|
||
8007098: 4606 mov r6, r0
|
||
800709a: e7f0 b.n 800707e <_dtoa_r+0xb16>
|
||
800709c: f1bb 0f00 cmp.w fp, #0
|
||
80070a0: bfcc ite gt
|
||
80070a2: 465f movgt r7, fp
|
||
80070a4: 2701 movle r7, #1
|
||
80070a6: f04f 0800 mov.w r8, #0
|
||
80070aa: 9a08 ldr r2, [sp, #32]
|
||
80070ac: 4417 add r7, r2
|
||
80070ae: 4651 mov r1, sl
|
||
80070b0: 2201 movs r2, #1
|
||
80070b2: 4628 mov r0, r5
|
||
80070b4: 9302 str r3, [sp, #8]
|
||
80070b6: f000 fa7f bl 80075b8 <__lshift>
|
||
80070ba: 4621 mov r1, r4
|
||
80070bc: 4682 mov sl, r0
|
||
80070be: f000 fae7 bl 8007690 <__mcmp>
|
||
80070c2: 2800 cmp r0, #0
|
||
80070c4: dcb2 bgt.n 800702c <_dtoa_r+0xac4>
|
||
80070c6: d102 bne.n 80070ce <_dtoa_r+0xb66>
|
||
80070c8: 9b02 ldr r3, [sp, #8]
|
||
80070ca: 07db lsls r3, r3, #31
|
||
80070cc: d4ae bmi.n 800702c <_dtoa_r+0xac4>
|
||
80070ce: 463b mov r3, r7
|
||
80070d0: 461f mov r7, r3
|
||
80070d2: f813 2d01 ldrb.w r2, [r3, #-1]!
|
||
80070d6: 2a30 cmp r2, #48 ; 0x30
|
||
80070d8: d0fa beq.n 80070d0 <_dtoa_r+0xb68>
|
||
80070da: e6fb b.n 8006ed4 <_dtoa_r+0x96c>
|
||
80070dc: 9a08 ldr r2, [sp, #32]
|
||
80070de: 429a cmp r2, r3
|
||
80070e0: d1a5 bne.n 800702e <_dtoa_r+0xac6>
|
||
80070e2: 2331 movs r3, #49 ; 0x31
|
||
80070e4: f109 0901 add.w r9, r9, #1
|
||
80070e8: 7013 strb r3, [r2, #0]
|
||
80070ea: e6f3 b.n 8006ed4 <_dtoa_r+0x96c>
|
||
80070ec: 4b13 ldr r3, [pc, #76] ; (800713c <_dtoa_r+0xbd4>)
|
||
80070ee: f7ff baa7 b.w 8006640 <_dtoa_r+0xd8>
|
||
80070f2: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
80070f4: 2b00 cmp r3, #0
|
||
80070f6: f47f aa80 bne.w 80065fa <_dtoa_r+0x92>
|
||
80070fa: 4b11 ldr r3, [pc, #68] ; (8007140 <_dtoa_r+0xbd8>)
|
||
80070fc: f7ff baa0 b.w 8006640 <_dtoa_r+0xd8>
|
||
8007100: f1bb 0f00 cmp.w fp, #0
|
||
8007104: dc03 bgt.n 800710e <_dtoa_r+0xba6>
|
||
8007106: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8007108: 2b02 cmp r3, #2
|
||
800710a: f73f aecc bgt.w 8006ea6 <_dtoa_r+0x93e>
|
||
800710e: 9f08 ldr r7, [sp, #32]
|
||
8007110: 4621 mov r1, r4
|
||
8007112: 4650 mov r0, sl
|
||
8007114: f7ff f998 bl 8006448 <quorem>
|
||
8007118: 9a08 ldr r2, [sp, #32]
|
||
800711a: f100 0330 add.w r3, r0, #48 ; 0x30
|
||
800711e: f807 3b01 strb.w r3, [r7], #1
|
||
8007122: 1aba subs r2, r7, r2
|
||
8007124: 4593 cmp fp, r2
|
||
8007126: ddb9 ble.n 800709c <_dtoa_r+0xb34>
|
||
8007128: 4651 mov r1, sl
|
||
800712a: 2300 movs r3, #0
|
||
800712c: 220a movs r2, #10
|
||
800712e: 4628 mov r0, r5
|
||
8007130: f000 f896 bl 8007260 <__multadd>
|
||
8007134: 4682 mov sl, r0
|
||
8007136: e7eb b.n 8007110 <_dtoa_r+0xba8>
|
||
8007138: 08009347 .word 0x08009347
|
||
800713c: 080092a0 .word 0x080092a0
|
||
8007140: 080092c4 .word 0x080092c4
|
||
|
||
08007144 <_localeconv_r>:
|
||
8007144: 4800 ldr r0, [pc, #0] ; (8007148 <_localeconv_r+0x4>)
|
||
8007146: 4770 bx lr
|
||
8007148: 20000160 .word 0x20000160
|
||
|
||
0800714c <memchr>:
|
||
800714c: 4603 mov r3, r0
|
||
800714e: b510 push {r4, lr}
|
||
8007150: b2c9 uxtb r1, r1
|
||
8007152: 4402 add r2, r0
|
||
8007154: 4293 cmp r3, r2
|
||
8007156: 4618 mov r0, r3
|
||
8007158: d101 bne.n 800715e <memchr+0x12>
|
||
800715a: 2000 movs r0, #0
|
||
800715c: e003 b.n 8007166 <memchr+0x1a>
|
||
800715e: 7804 ldrb r4, [r0, #0]
|
||
8007160: 3301 adds r3, #1
|
||
8007162: 428c cmp r4, r1
|
||
8007164: d1f6 bne.n 8007154 <memchr+0x8>
|
||
8007166: bd10 pop {r4, pc}
|
||
|
||
08007168 <memcpy>:
|
||
8007168: 440a add r2, r1
|
||
800716a: 4291 cmp r1, r2
|
||
800716c: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff
|
||
8007170: d100 bne.n 8007174 <memcpy+0xc>
|
||
8007172: 4770 bx lr
|
||
8007174: b510 push {r4, lr}
|
||
8007176: f811 4b01 ldrb.w r4, [r1], #1
|
||
800717a: 4291 cmp r1, r2
|
||
800717c: f803 4f01 strb.w r4, [r3, #1]!
|
||
8007180: d1f9 bne.n 8007176 <memcpy+0xe>
|
||
8007182: bd10 pop {r4, pc}
|
||
|
||
08007184 <__malloc_lock>:
|
||
8007184: 4801 ldr r0, [pc, #4] ; (800718c <__malloc_lock+0x8>)
|
||
8007186: f000 bd26 b.w 8007bd6 <__retarget_lock_acquire_recursive>
|
||
800718a: bf00 nop
|
||
800718c: 200002f8 .word 0x200002f8
|
||
|
||
08007190 <__malloc_unlock>:
|
||
8007190: 4801 ldr r0, [pc, #4] ; (8007198 <__malloc_unlock+0x8>)
|
||
8007192: f000 bd21 b.w 8007bd8 <__retarget_lock_release_recursive>
|
||
8007196: bf00 nop
|
||
8007198: 200002f8 .word 0x200002f8
|
||
|
||
0800719c <_Balloc>:
|
||
800719c: b570 push {r4, r5, r6, lr}
|
||
800719e: 6a46 ldr r6, [r0, #36] ; 0x24
|
||
80071a0: 4604 mov r4, r0
|
||
80071a2: 460d mov r5, r1
|
||
80071a4: b976 cbnz r6, 80071c4 <_Balloc+0x28>
|
||
80071a6: 2010 movs r0, #16
|
||
80071a8: f7fe fc00 bl 80059ac <malloc>
|
||
80071ac: 4602 mov r2, r0
|
||
80071ae: 6260 str r0, [r4, #36] ; 0x24
|
||
80071b0: b920 cbnz r0, 80071bc <_Balloc+0x20>
|
||
80071b2: 2166 movs r1, #102 ; 0x66
|
||
80071b4: 4b17 ldr r3, [pc, #92] ; (8007214 <_Balloc+0x78>)
|
||
80071b6: 4818 ldr r0, [pc, #96] ; (8007218 <_Balloc+0x7c>)
|
||
80071b8: f000 fcdc bl 8007b74 <__assert_func>
|
||
80071bc: e9c0 6601 strd r6, r6, [r0, #4]
|
||
80071c0: 6006 str r6, [r0, #0]
|
||
80071c2: 60c6 str r6, [r0, #12]
|
||
80071c4: 6a66 ldr r6, [r4, #36] ; 0x24
|
||
80071c6: 68f3 ldr r3, [r6, #12]
|
||
80071c8: b183 cbz r3, 80071ec <_Balloc+0x50>
|
||
80071ca: 6a63 ldr r3, [r4, #36] ; 0x24
|
||
80071cc: 68db ldr r3, [r3, #12]
|
||
80071ce: f853 0025 ldr.w r0, [r3, r5, lsl #2]
|
||
80071d2: b9b8 cbnz r0, 8007204 <_Balloc+0x68>
|
||
80071d4: 2101 movs r1, #1
|
||
80071d6: fa01 f605 lsl.w r6, r1, r5
|
||
80071da: 1d72 adds r2, r6, #5
|
||
80071dc: 4620 mov r0, r4
|
||
80071de: 0092 lsls r2, r2, #2
|
||
80071e0: f000 fb5e bl 80078a0 <_calloc_r>
|
||
80071e4: b160 cbz r0, 8007200 <_Balloc+0x64>
|
||
80071e6: e9c0 5601 strd r5, r6, [r0, #4]
|
||
80071ea: e00e b.n 800720a <_Balloc+0x6e>
|
||
80071ec: 2221 movs r2, #33 ; 0x21
|
||
80071ee: 2104 movs r1, #4
|
||
80071f0: 4620 mov r0, r4
|
||
80071f2: f000 fb55 bl 80078a0 <_calloc_r>
|
||
80071f6: 6a63 ldr r3, [r4, #36] ; 0x24
|
||
80071f8: 60f0 str r0, [r6, #12]
|
||
80071fa: 68db ldr r3, [r3, #12]
|
||
80071fc: 2b00 cmp r3, #0
|
||
80071fe: d1e4 bne.n 80071ca <_Balloc+0x2e>
|
||
8007200: 2000 movs r0, #0
|
||
8007202: bd70 pop {r4, r5, r6, pc}
|
||
8007204: 6802 ldr r2, [r0, #0]
|
||
8007206: f843 2025 str.w r2, [r3, r5, lsl #2]
|
||
800720a: 2300 movs r3, #0
|
||
800720c: e9c0 3303 strd r3, r3, [r0, #12]
|
||
8007210: e7f7 b.n 8007202 <_Balloc+0x66>
|
||
8007212: bf00 nop
|
||
8007214: 080092d1 .word 0x080092d1
|
||
8007218: 08009358 .word 0x08009358
|
||
|
||
0800721c <_Bfree>:
|
||
800721c: b570 push {r4, r5, r6, lr}
|
||
800721e: 6a46 ldr r6, [r0, #36] ; 0x24
|
||
8007220: 4605 mov r5, r0
|
||
8007222: 460c mov r4, r1
|
||
8007224: b976 cbnz r6, 8007244 <_Bfree+0x28>
|
||
8007226: 2010 movs r0, #16
|
||
8007228: f7fe fbc0 bl 80059ac <malloc>
|
||
800722c: 4602 mov r2, r0
|
||
800722e: 6268 str r0, [r5, #36] ; 0x24
|
||
8007230: b920 cbnz r0, 800723c <_Bfree+0x20>
|
||
8007232: 218a movs r1, #138 ; 0x8a
|
||
8007234: 4b08 ldr r3, [pc, #32] ; (8007258 <_Bfree+0x3c>)
|
||
8007236: 4809 ldr r0, [pc, #36] ; (800725c <_Bfree+0x40>)
|
||
8007238: f000 fc9c bl 8007b74 <__assert_func>
|
||
800723c: e9c0 6601 strd r6, r6, [r0, #4]
|
||
8007240: 6006 str r6, [r0, #0]
|
||
8007242: 60c6 str r6, [r0, #12]
|
||
8007244: b13c cbz r4, 8007256 <_Bfree+0x3a>
|
||
8007246: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
8007248: 6862 ldr r2, [r4, #4]
|
||
800724a: 68db ldr r3, [r3, #12]
|
||
800724c: f853 1022 ldr.w r1, [r3, r2, lsl #2]
|
||
8007250: 6021 str r1, [r4, #0]
|
||
8007252: f843 4022 str.w r4, [r3, r2, lsl #2]
|
||
8007256: bd70 pop {r4, r5, r6, pc}
|
||
8007258: 080092d1 .word 0x080092d1
|
||
800725c: 08009358 .word 0x08009358
|
||
|
||
08007260 <__multadd>:
|
||
8007260: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||
8007264: 4698 mov r8, r3
|
||
8007266: 460c mov r4, r1
|
||
8007268: 2300 movs r3, #0
|
||
800726a: 690e ldr r6, [r1, #16]
|
||
800726c: 4607 mov r7, r0
|
||
800726e: f101 0014 add.w r0, r1, #20
|
||
8007272: 6805 ldr r5, [r0, #0]
|
||
8007274: 3301 adds r3, #1
|
||
8007276: b2a9 uxth r1, r5
|
||
8007278: fb02 8101 mla r1, r2, r1, r8
|
||
800727c: 0c2d lsrs r5, r5, #16
|
||
800727e: ea4f 4c11 mov.w ip, r1, lsr #16
|
||
8007282: fb02 c505 mla r5, r2, r5, ip
|
||
8007286: b289 uxth r1, r1
|
||
8007288: eb01 4105 add.w r1, r1, r5, lsl #16
|
||
800728c: 429e cmp r6, r3
|
||
800728e: ea4f 4815 mov.w r8, r5, lsr #16
|
||
8007292: f840 1b04 str.w r1, [r0], #4
|
||
8007296: dcec bgt.n 8007272 <__multadd+0x12>
|
||
8007298: f1b8 0f00 cmp.w r8, #0
|
||
800729c: d022 beq.n 80072e4 <__multadd+0x84>
|
||
800729e: 68a3 ldr r3, [r4, #8]
|
||
80072a0: 42b3 cmp r3, r6
|
||
80072a2: dc19 bgt.n 80072d8 <__multadd+0x78>
|
||
80072a4: 6861 ldr r1, [r4, #4]
|
||
80072a6: 4638 mov r0, r7
|
||
80072a8: 3101 adds r1, #1
|
||
80072aa: f7ff ff77 bl 800719c <_Balloc>
|
||
80072ae: 4605 mov r5, r0
|
||
80072b0: b928 cbnz r0, 80072be <__multadd+0x5e>
|
||
80072b2: 4602 mov r2, r0
|
||
80072b4: 21b5 movs r1, #181 ; 0xb5
|
||
80072b6: 4b0d ldr r3, [pc, #52] ; (80072ec <__multadd+0x8c>)
|
||
80072b8: 480d ldr r0, [pc, #52] ; (80072f0 <__multadd+0x90>)
|
||
80072ba: f000 fc5b bl 8007b74 <__assert_func>
|
||
80072be: 6922 ldr r2, [r4, #16]
|
||
80072c0: f104 010c add.w r1, r4, #12
|
||
80072c4: 3202 adds r2, #2
|
||
80072c6: 0092 lsls r2, r2, #2
|
||
80072c8: 300c adds r0, #12
|
||
80072ca: f7ff ff4d bl 8007168 <memcpy>
|
||
80072ce: 4621 mov r1, r4
|
||
80072d0: 4638 mov r0, r7
|
||
80072d2: f7ff ffa3 bl 800721c <_Bfree>
|
||
80072d6: 462c mov r4, r5
|
||
80072d8: eb04 0386 add.w r3, r4, r6, lsl #2
|
||
80072dc: 3601 adds r6, #1
|
||
80072de: f8c3 8014 str.w r8, [r3, #20]
|
||
80072e2: 6126 str r6, [r4, #16]
|
||
80072e4: 4620 mov r0, r4
|
||
80072e6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
||
80072ea: bf00 nop
|
||
80072ec: 08009347 .word 0x08009347
|
||
80072f0: 08009358 .word 0x08009358
|
||
|
||
080072f4 <__hi0bits>:
|
||
80072f4: 0c02 lsrs r2, r0, #16
|
||
80072f6: 0412 lsls r2, r2, #16
|
||
80072f8: 4603 mov r3, r0
|
||
80072fa: b9ca cbnz r2, 8007330 <__hi0bits+0x3c>
|
||
80072fc: 0403 lsls r3, r0, #16
|
||
80072fe: 2010 movs r0, #16
|
||
8007300: f013 4f7f tst.w r3, #4278190080 ; 0xff000000
|
||
8007304: bf04 itt eq
|
||
8007306: 021b lsleq r3, r3, #8
|
||
8007308: 3008 addeq r0, #8
|
||
800730a: f013 4f70 tst.w r3, #4026531840 ; 0xf0000000
|
||
800730e: bf04 itt eq
|
||
8007310: 011b lsleq r3, r3, #4
|
||
8007312: 3004 addeq r0, #4
|
||
8007314: f013 4f40 tst.w r3, #3221225472 ; 0xc0000000
|
||
8007318: bf04 itt eq
|
||
800731a: 009b lsleq r3, r3, #2
|
||
800731c: 3002 addeq r0, #2
|
||
800731e: 2b00 cmp r3, #0
|
||
8007320: db05 blt.n 800732e <__hi0bits+0x3a>
|
||
8007322: f013 4f80 tst.w r3, #1073741824 ; 0x40000000
|
||
8007326: f100 0001 add.w r0, r0, #1
|
||
800732a: bf08 it eq
|
||
800732c: 2020 moveq r0, #32
|
||
800732e: 4770 bx lr
|
||
8007330: 2000 movs r0, #0
|
||
8007332: e7e5 b.n 8007300 <__hi0bits+0xc>
|
||
|
||
08007334 <__lo0bits>:
|
||
8007334: 6803 ldr r3, [r0, #0]
|
||
8007336: 4602 mov r2, r0
|
||
8007338: f013 0007 ands.w r0, r3, #7
|
||
800733c: d00b beq.n 8007356 <__lo0bits+0x22>
|
||
800733e: 07d9 lsls r1, r3, #31
|
||
8007340: d422 bmi.n 8007388 <__lo0bits+0x54>
|
||
8007342: 0798 lsls r0, r3, #30
|
||
8007344: bf49 itett mi
|
||
8007346: 085b lsrmi r3, r3, #1
|
||
8007348: 089b lsrpl r3, r3, #2
|
||
800734a: 2001 movmi r0, #1
|
||
800734c: 6013 strmi r3, [r2, #0]
|
||
800734e: bf5c itt pl
|
||
8007350: 2002 movpl r0, #2
|
||
8007352: 6013 strpl r3, [r2, #0]
|
||
8007354: 4770 bx lr
|
||
8007356: b299 uxth r1, r3
|
||
8007358: b909 cbnz r1, 800735e <__lo0bits+0x2a>
|
||
800735a: 2010 movs r0, #16
|
||
800735c: 0c1b lsrs r3, r3, #16
|
||
800735e: f013 0fff tst.w r3, #255 ; 0xff
|
||
8007362: bf04 itt eq
|
||
8007364: 0a1b lsreq r3, r3, #8
|
||
8007366: 3008 addeq r0, #8
|
||
8007368: 0719 lsls r1, r3, #28
|
||
800736a: bf04 itt eq
|
||
800736c: 091b lsreq r3, r3, #4
|
||
800736e: 3004 addeq r0, #4
|
||
8007370: 0799 lsls r1, r3, #30
|
||
8007372: bf04 itt eq
|
||
8007374: 089b lsreq r3, r3, #2
|
||
8007376: 3002 addeq r0, #2
|
||
8007378: 07d9 lsls r1, r3, #31
|
||
800737a: d403 bmi.n 8007384 <__lo0bits+0x50>
|
||
800737c: 085b lsrs r3, r3, #1
|
||
800737e: f100 0001 add.w r0, r0, #1
|
||
8007382: d003 beq.n 800738c <__lo0bits+0x58>
|
||
8007384: 6013 str r3, [r2, #0]
|
||
8007386: 4770 bx lr
|
||
8007388: 2000 movs r0, #0
|
||
800738a: 4770 bx lr
|
||
800738c: 2020 movs r0, #32
|
||
800738e: 4770 bx lr
|
||
|
||
08007390 <__i2b>:
|
||
8007390: b510 push {r4, lr}
|
||
8007392: 460c mov r4, r1
|
||
8007394: 2101 movs r1, #1
|
||
8007396: f7ff ff01 bl 800719c <_Balloc>
|
||
800739a: 4602 mov r2, r0
|
||
800739c: b928 cbnz r0, 80073aa <__i2b+0x1a>
|
||
800739e: f44f 71a0 mov.w r1, #320 ; 0x140
|
||
80073a2: 4b04 ldr r3, [pc, #16] ; (80073b4 <__i2b+0x24>)
|
||
80073a4: 4804 ldr r0, [pc, #16] ; (80073b8 <__i2b+0x28>)
|
||
80073a6: f000 fbe5 bl 8007b74 <__assert_func>
|
||
80073aa: 2301 movs r3, #1
|
||
80073ac: 6144 str r4, [r0, #20]
|
||
80073ae: 6103 str r3, [r0, #16]
|
||
80073b0: bd10 pop {r4, pc}
|
||
80073b2: bf00 nop
|
||
80073b4: 08009347 .word 0x08009347
|
||
80073b8: 08009358 .word 0x08009358
|
||
|
||
080073bc <__multiply>:
|
||
80073bc: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
80073c0: 4614 mov r4, r2
|
||
80073c2: 690a ldr r2, [r1, #16]
|
||
80073c4: 6923 ldr r3, [r4, #16]
|
||
80073c6: 460d mov r5, r1
|
||
80073c8: 429a cmp r2, r3
|
||
80073ca: bfbe ittt lt
|
||
80073cc: 460b movlt r3, r1
|
||
80073ce: 4625 movlt r5, r4
|
||
80073d0: 461c movlt r4, r3
|
||
80073d2: f8d5 a010 ldr.w sl, [r5, #16]
|
||
80073d6: f8d4 9010 ldr.w r9, [r4, #16]
|
||
80073da: 68ab ldr r3, [r5, #8]
|
||
80073dc: 6869 ldr r1, [r5, #4]
|
||
80073de: eb0a 0709 add.w r7, sl, r9
|
||
80073e2: 42bb cmp r3, r7
|
||
80073e4: b085 sub sp, #20
|
||
80073e6: bfb8 it lt
|
||
80073e8: 3101 addlt r1, #1
|
||
80073ea: f7ff fed7 bl 800719c <_Balloc>
|
||
80073ee: b930 cbnz r0, 80073fe <__multiply+0x42>
|
||
80073f0: 4602 mov r2, r0
|
||
80073f2: f240 115d movw r1, #349 ; 0x15d
|
||
80073f6: 4b41 ldr r3, [pc, #260] ; (80074fc <__multiply+0x140>)
|
||
80073f8: 4841 ldr r0, [pc, #260] ; (8007500 <__multiply+0x144>)
|
||
80073fa: f000 fbbb bl 8007b74 <__assert_func>
|
||
80073fe: f100 0614 add.w r6, r0, #20
|
||
8007402: 4633 mov r3, r6
|
||
8007404: 2200 movs r2, #0
|
||
8007406: eb06 0887 add.w r8, r6, r7, lsl #2
|
||
800740a: 4543 cmp r3, r8
|
||
800740c: d31e bcc.n 800744c <__multiply+0x90>
|
||
800740e: f105 0c14 add.w ip, r5, #20
|
||
8007412: f104 0314 add.w r3, r4, #20
|
||
8007416: eb0c 0c8a add.w ip, ip, sl, lsl #2
|
||
800741a: eb03 0289 add.w r2, r3, r9, lsl #2
|
||
800741e: 9202 str r2, [sp, #8]
|
||
8007420: ebac 0205 sub.w r2, ip, r5
|
||
8007424: 3a15 subs r2, #21
|
||
8007426: f022 0203 bic.w r2, r2, #3
|
||
800742a: 3204 adds r2, #4
|
||
800742c: f105 0115 add.w r1, r5, #21
|
||
8007430: 458c cmp ip, r1
|
||
8007432: bf38 it cc
|
||
8007434: 2204 movcc r2, #4
|
||
8007436: 9201 str r2, [sp, #4]
|
||
8007438: 9a02 ldr r2, [sp, #8]
|
||
800743a: 9303 str r3, [sp, #12]
|
||
800743c: 429a cmp r2, r3
|
||
800743e: d808 bhi.n 8007452 <__multiply+0x96>
|
||
8007440: 2f00 cmp r7, #0
|
||
8007442: dc55 bgt.n 80074f0 <__multiply+0x134>
|
||
8007444: 6107 str r7, [r0, #16]
|
||
8007446: b005 add sp, #20
|
||
8007448: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
800744c: f843 2b04 str.w r2, [r3], #4
|
||
8007450: e7db b.n 800740a <__multiply+0x4e>
|
||
8007452: f8b3 a000 ldrh.w sl, [r3]
|
||
8007456: f1ba 0f00 cmp.w sl, #0
|
||
800745a: d020 beq.n 800749e <__multiply+0xe2>
|
||
800745c: 46b1 mov r9, r6
|
||
800745e: 2200 movs r2, #0
|
||
8007460: f105 0e14 add.w lr, r5, #20
|
||
8007464: f85e 4b04 ldr.w r4, [lr], #4
|
||
8007468: f8d9 b000 ldr.w fp, [r9]
|
||
800746c: b2a1 uxth r1, r4
|
||
800746e: fa1f fb8b uxth.w fp, fp
|
||
8007472: fb0a b101 mla r1, sl, r1, fp
|
||
8007476: 4411 add r1, r2
|
||
8007478: f8d9 2000 ldr.w r2, [r9]
|
||
800747c: 0c24 lsrs r4, r4, #16
|
||
800747e: 0c12 lsrs r2, r2, #16
|
||
8007480: fb0a 2404 mla r4, sl, r4, r2
|
||
8007484: eb04 4411 add.w r4, r4, r1, lsr #16
|
||
8007488: b289 uxth r1, r1
|
||
800748a: ea41 4104 orr.w r1, r1, r4, lsl #16
|
||
800748e: 45f4 cmp ip, lr
|
||
8007490: ea4f 4214 mov.w r2, r4, lsr #16
|
||
8007494: f849 1b04 str.w r1, [r9], #4
|
||
8007498: d8e4 bhi.n 8007464 <__multiply+0xa8>
|
||
800749a: 9901 ldr r1, [sp, #4]
|
||
800749c: 5072 str r2, [r6, r1]
|
||
800749e: 9a03 ldr r2, [sp, #12]
|
||
80074a0: 3304 adds r3, #4
|
||
80074a2: f8b2 9002 ldrh.w r9, [r2, #2]
|
||
80074a6: f1b9 0f00 cmp.w r9, #0
|
||
80074aa: d01f beq.n 80074ec <__multiply+0x130>
|
||
80074ac: 46b6 mov lr, r6
|
||
80074ae: f04f 0a00 mov.w sl, #0
|
||
80074b2: 6834 ldr r4, [r6, #0]
|
||
80074b4: f105 0114 add.w r1, r5, #20
|
||
80074b8: 880a ldrh r2, [r1, #0]
|
||
80074ba: f8be b002 ldrh.w fp, [lr, #2]
|
||
80074be: b2a4 uxth r4, r4
|
||
80074c0: fb09 b202 mla r2, r9, r2, fp
|
||
80074c4: 4492 add sl, r2
|
||
80074c6: ea44 440a orr.w r4, r4, sl, lsl #16
|
||
80074ca: f84e 4b04 str.w r4, [lr], #4
|
||
80074ce: f851 4b04 ldr.w r4, [r1], #4
|
||
80074d2: f8be 2000 ldrh.w r2, [lr]
|
||
80074d6: 0c24 lsrs r4, r4, #16
|
||
80074d8: fb09 2404 mla r4, r9, r4, r2
|
||
80074dc: 458c cmp ip, r1
|
||
80074de: eb04 441a add.w r4, r4, sl, lsr #16
|
||
80074e2: ea4f 4a14 mov.w sl, r4, lsr #16
|
||
80074e6: d8e7 bhi.n 80074b8 <__multiply+0xfc>
|
||
80074e8: 9a01 ldr r2, [sp, #4]
|
||
80074ea: 50b4 str r4, [r6, r2]
|
||
80074ec: 3604 adds r6, #4
|
||
80074ee: e7a3 b.n 8007438 <__multiply+0x7c>
|
||
80074f0: f858 3d04 ldr.w r3, [r8, #-4]!
|
||
80074f4: 2b00 cmp r3, #0
|
||
80074f6: d1a5 bne.n 8007444 <__multiply+0x88>
|
||
80074f8: 3f01 subs r7, #1
|
||
80074fa: e7a1 b.n 8007440 <__multiply+0x84>
|
||
80074fc: 08009347 .word 0x08009347
|
||
8007500: 08009358 .word 0x08009358
|
||
|
||
08007504 <__pow5mult>:
|
||
8007504: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
||
8007508: 4615 mov r5, r2
|
||
800750a: f012 0203 ands.w r2, r2, #3
|
||
800750e: 4606 mov r6, r0
|
||
8007510: 460f mov r7, r1
|
||
8007512: d007 beq.n 8007524 <__pow5mult+0x20>
|
||
8007514: 4c25 ldr r4, [pc, #148] ; (80075ac <__pow5mult+0xa8>)
|
||
8007516: 3a01 subs r2, #1
|
||
8007518: 2300 movs r3, #0
|
||
800751a: f854 2022 ldr.w r2, [r4, r2, lsl #2]
|
||
800751e: f7ff fe9f bl 8007260 <__multadd>
|
||
8007522: 4607 mov r7, r0
|
||
8007524: 10ad asrs r5, r5, #2
|
||
8007526: d03d beq.n 80075a4 <__pow5mult+0xa0>
|
||
8007528: 6a74 ldr r4, [r6, #36] ; 0x24
|
||
800752a: b97c cbnz r4, 800754c <__pow5mult+0x48>
|
||
800752c: 2010 movs r0, #16
|
||
800752e: f7fe fa3d bl 80059ac <malloc>
|
||
8007532: 4602 mov r2, r0
|
||
8007534: 6270 str r0, [r6, #36] ; 0x24
|
||
8007536: b928 cbnz r0, 8007544 <__pow5mult+0x40>
|
||
8007538: f44f 71d7 mov.w r1, #430 ; 0x1ae
|
||
800753c: 4b1c ldr r3, [pc, #112] ; (80075b0 <__pow5mult+0xac>)
|
||
800753e: 481d ldr r0, [pc, #116] ; (80075b4 <__pow5mult+0xb0>)
|
||
8007540: f000 fb18 bl 8007b74 <__assert_func>
|
||
8007544: e9c0 4401 strd r4, r4, [r0, #4]
|
||
8007548: 6004 str r4, [r0, #0]
|
||
800754a: 60c4 str r4, [r0, #12]
|
||
800754c: f8d6 8024 ldr.w r8, [r6, #36] ; 0x24
|
||
8007550: f8d8 4008 ldr.w r4, [r8, #8]
|
||
8007554: b94c cbnz r4, 800756a <__pow5mult+0x66>
|
||
8007556: f240 2171 movw r1, #625 ; 0x271
|
||
800755a: 4630 mov r0, r6
|
||
800755c: f7ff ff18 bl 8007390 <__i2b>
|
||
8007560: 2300 movs r3, #0
|
||
8007562: 4604 mov r4, r0
|
||
8007564: f8c8 0008 str.w r0, [r8, #8]
|
||
8007568: 6003 str r3, [r0, #0]
|
||
800756a: f04f 0900 mov.w r9, #0
|
||
800756e: 07eb lsls r3, r5, #31
|
||
8007570: d50a bpl.n 8007588 <__pow5mult+0x84>
|
||
8007572: 4639 mov r1, r7
|
||
8007574: 4622 mov r2, r4
|
||
8007576: 4630 mov r0, r6
|
||
8007578: f7ff ff20 bl 80073bc <__multiply>
|
||
800757c: 4680 mov r8, r0
|
||
800757e: 4639 mov r1, r7
|
||
8007580: 4630 mov r0, r6
|
||
8007582: f7ff fe4b bl 800721c <_Bfree>
|
||
8007586: 4647 mov r7, r8
|
||
8007588: 106d asrs r5, r5, #1
|
||
800758a: d00b beq.n 80075a4 <__pow5mult+0xa0>
|
||
800758c: 6820 ldr r0, [r4, #0]
|
||
800758e: b938 cbnz r0, 80075a0 <__pow5mult+0x9c>
|
||
8007590: 4622 mov r2, r4
|
||
8007592: 4621 mov r1, r4
|
||
8007594: 4630 mov r0, r6
|
||
8007596: f7ff ff11 bl 80073bc <__multiply>
|
||
800759a: 6020 str r0, [r4, #0]
|
||
800759c: f8c0 9000 str.w r9, [r0]
|
||
80075a0: 4604 mov r4, r0
|
||
80075a2: e7e4 b.n 800756e <__pow5mult+0x6a>
|
||
80075a4: 4638 mov r0, r7
|
||
80075a6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
||
80075aa: bf00 nop
|
||
80075ac: 080094a8 .word 0x080094a8
|
||
80075b0: 080092d1 .word 0x080092d1
|
||
80075b4: 08009358 .word 0x08009358
|
||
|
||
080075b8 <__lshift>:
|
||
80075b8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
80075bc: 460c mov r4, r1
|
||
80075be: 4607 mov r7, r0
|
||
80075c0: 4691 mov r9, r2
|
||
80075c2: 6923 ldr r3, [r4, #16]
|
||
80075c4: 6849 ldr r1, [r1, #4]
|
||
80075c6: eb03 1862 add.w r8, r3, r2, asr #5
|
||
80075ca: 68a3 ldr r3, [r4, #8]
|
||
80075cc: ea4f 1a62 mov.w sl, r2, asr #5
|
||
80075d0: f108 0601 add.w r6, r8, #1
|
||
80075d4: 42b3 cmp r3, r6
|
||
80075d6: db0b blt.n 80075f0 <__lshift+0x38>
|
||
80075d8: 4638 mov r0, r7
|
||
80075da: f7ff fddf bl 800719c <_Balloc>
|
||
80075de: 4605 mov r5, r0
|
||
80075e0: b948 cbnz r0, 80075f6 <__lshift+0x3e>
|
||
80075e2: 4602 mov r2, r0
|
||
80075e4: f240 11d9 movw r1, #473 ; 0x1d9
|
||
80075e8: 4b27 ldr r3, [pc, #156] ; (8007688 <__lshift+0xd0>)
|
||
80075ea: 4828 ldr r0, [pc, #160] ; (800768c <__lshift+0xd4>)
|
||
80075ec: f000 fac2 bl 8007b74 <__assert_func>
|
||
80075f0: 3101 adds r1, #1
|
||
80075f2: 005b lsls r3, r3, #1
|
||
80075f4: e7ee b.n 80075d4 <__lshift+0x1c>
|
||
80075f6: 2300 movs r3, #0
|
||
80075f8: f100 0114 add.w r1, r0, #20
|
||
80075fc: f100 0210 add.w r2, r0, #16
|
||
8007600: 4618 mov r0, r3
|
||
8007602: 4553 cmp r3, sl
|
||
8007604: db33 blt.n 800766e <__lshift+0xb6>
|
||
8007606: 6920 ldr r0, [r4, #16]
|
||
8007608: ea2a 7aea bic.w sl, sl, sl, asr #31
|
||
800760c: f104 0314 add.w r3, r4, #20
|
||
8007610: f019 091f ands.w r9, r9, #31
|
||
8007614: eb01 018a add.w r1, r1, sl, lsl #2
|
||
8007618: eb03 0c80 add.w ip, r3, r0, lsl #2
|
||
800761c: d02b beq.n 8007676 <__lshift+0xbe>
|
||
800761e: 468a mov sl, r1
|
||
8007620: 2200 movs r2, #0
|
||
8007622: f1c9 0e20 rsb lr, r9, #32
|
||
8007626: 6818 ldr r0, [r3, #0]
|
||
8007628: fa00 f009 lsl.w r0, r0, r9
|
||
800762c: 4302 orrs r2, r0
|
||
800762e: f84a 2b04 str.w r2, [sl], #4
|
||
8007632: f853 2b04 ldr.w r2, [r3], #4
|
||
8007636: 459c cmp ip, r3
|
||
8007638: fa22 f20e lsr.w r2, r2, lr
|
||
800763c: d8f3 bhi.n 8007626 <__lshift+0x6e>
|
||
800763e: ebac 0304 sub.w r3, ip, r4
|
||
8007642: 3b15 subs r3, #21
|
||
8007644: f023 0303 bic.w r3, r3, #3
|
||
8007648: 3304 adds r3, #4
|
||
800764a: f104 0015 add.w r0, r4, #21
|
||
800764e: 4584 cmp ip, r0
|
||
8007650: bf38 it cc
|
||
8007652: 2304 movcc r3, #4
|
||
8007654: 50ca str r2, [r1, r3]
|
||
8007656: b10a cbz r2, 800765c <__lshift+0xa4>
|
||
8007658: f108 0602 add.w r6, r8, #2
|
||
800765c: 3e01 subs r6, #1
|
||
800765e: 4638 mov r0, r7
|
||
8007660: 4621 mov r1, r4
|
||
8007662: 612e str r6, [r5, #16]
|
||
8007664: f7ff fdda bl 800721c <_Bfree>
|
||
8007668: 4628 mov r0, r5
|
||
800766a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
800766e: f842 0f04 str.w r0, [r2, #4]!
|
||
8007672: 3301 adds r3, #1
|
||
8007674: e7c5 b.n 8007602 <__lshift+0x4a>
|
||
8007676: 3904 subs r1, #4
|
||
8007678: f853 2b04 ldr.w r2, [r3], #4
|
||
800767c: 459c cmp ip, r3
|
||
800767e: f841 2f04 str.w r2, [r1, #4]!
|
||
8007682: d8f9 bhi.n 8007678 <__lshift+0xc0>
|
||
8007684: e7ea b.n 800765c <__lshift+0xa4>
|
||
8007686: bf00 nop
|
||
8007688: 08009347 .word 0x08009347
|
||
800768c: 08009358 .word 0x08009358
|
||
|
||
08007690 <__mcmp>:
|
||
8007690: 4603 mov r3, r0
|
||
8007692: 690a ldr r2, [r1, #16]
|
||
8007694: 6900 ldr r0, [r0, #16]
|
||
8007696: b530 push {r4, r5, lr}
|
||
8007698: 1a80 subs r0, r0, r2
|
||
800769a: d10d bne.n 80076b8 <__mcmp+0x28>
|
||
800769c: 3314 adds r3, #20
|
||
800769e: 3114 adds r1, #20
|
||
80076a0: eb03 0482 add.w r4, r3, r2, lsl #2
|
||
80076a4: eb01 0182 add.w r1, r1, r2, lsl #2
|
||
80076a8: f854 5d04 ldr.w r5, [r4, #-4]!
|
||
80076ac: f851 2d04 ldr.w r2, [r1, #-4]!
|
||
80076b0: 4295 cmp r5, r2
|
||
80076b2: d002 beq.n 80076ba <__mcmp+0x2a>
|
||
80076b4: d304 bcc.n 80076c0 <__mcmp+0x30>
|
||
80076b6: 2001 movs r0, #1
|
||
80076b8: bd30 pop {r4, r5, pc}
|
||
80076ba: 42a3 cmp r3, r4
|
||
80076bc: d3f4 bcc.n 80076a8 <__mcmp+0x18>
|
||
80076be: e7fb b.n 80076b8 <__mcmp+0x28>
|
||
80076c0: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
80076c4: e7f8 b.n 80076b8 <__mcmp+0x28>
|
||
...
|
||
|
||
080076c8 <__mdiff>:
|
||
80076c8: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
80076cc: 460c mov r4, r1
|
||
80076ce: 4606 mov r6, r0
|
||
80076d0: 4611 mov r1, r2
|
||
80076d2: 4620 mov r0, r4
|
||
80076d4: 4692 mov sl, r2
|
||
80076d6: f7ff ffdb bl 8007690 <__mcmp>
|
||
80076da: 1e05 subs r5, r0, #0
|
||
80076dc: d111 bne.n 8007702 <__mdiff+0x3a>
|
||
80076de: 4629 mov r1, r5
|
||
80076e0: 4630 mov r0, r6
|
||
80076e2: f7ff fd5b bl 800719c <_Balloc>
|
||
80076e6: 4602 mov r2, r0
|
||
80076e8: b928 cbnz r0, 80076f6 <__mdiff+0x2e>
|
||
80076ea: f240 2132 movw r1, #562 ; 0x232
|
||
80076ee: 4b3c ldr r3, [pc, #240] ; (80077e0 <__mdiff+0x118>)
|
||
80076f0: 483c ldr r0, [pc, #240] ; (80077e4 <__mdiff+0x11c>)
|
||
80076f2: f000 fa3f bl 8007b74 <__assert_func>
|
||
80076f6: 2301 movs r3, #1
|
||
80076f8: e9c0 3504 strd r3, r5, [r0, #16]
|
||
80076fc: 4610 mov r0, r2
|
||
80076fe: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8007702: bfa4 itt ge
|
||
8007704: 4653 movge r3, sl
|
||
8007706: 46a2 movge sl, r4
|
||
8007708: 4630 mov r0, r6
|
||
800770a: f8da 1004 ldr.w r1, [sl, #4]
|
||
800770e: bfa6 itte ge
|
||
8007710: 461c movge r4, r3
|
||
8007712: 2500 movge r5, #0
|
||
8007714: 2501 movlt r5, #1
|
||
8007716: f7ff fd41 bl 800719c <_Balloc>
|
||
800771a: 4602 mov r2, r0
|
||
800771c: b918 cbnz r0, 8007726 <__mdiff+0x5e>
|
||
800771e: f44f 7110 mov.w r1, #576 ; 0x240
|
||
8007722: 4b2f ldr r3, [pc, #188] ; (80077e0 <__mdiff+0x118>)
|
||
8007724: e7e4 b.n 80076f0 <__mdiff+0x28>
|
||
8007726: f100 0814 add.w r8, r0, #20
|
||
800772a: f8da 7010 ldr.w r7, [sl, #16]
|
||
800772e: 60c5 str r5, [r0, #12]
|
||
8007730: f04f 0c00 mov.w ip, #0
|
||
8007734: f10a 0514 add.w r5, sl, #20
|
||
8007738: f10a 0010 add.w r0, sl, #16
|
||
800773c: 46c2 mov sl, r8
|
||
800773e: 6926 ldr r6, [r4, #16]
|
||
8007740: f104 0914 add.w r9, r4, #20
|
||
8007744: eb05 0e87 add.w lr, r5, r7, lsl #2
|
||
8007748: eb09 0686 add.w r6, r9, r6, lsl #2
|
||
800774c: f850 bf04 ldr.w fp, [r0, #4]!
|
||
8007750: f859 3b04 ldr.w r3, [r9], #4
|
||
8007754: fa1f f18b uxth.w r1, fp
|
||
8007758: 4461 add r1, ip
|
||
800775a: fa1f fc83 uxth.w ip, r3
|
||
800775e: 0c1b lsrs r3, r3, #16
|
||
8007760: eba1 010c sub.w r1, r1, ip
|
||
8007764: ebc3 431b rsb r3, r3, fp, lsr #16
|
||
8007768: eb03 4321 add.w r3, r3, r1, asr #16
|
||
800776c: b289 uxth r1, r1
|
||
800776e: ea4f 4c23 mov.w ip, r3, asr #16
|
||
8007772: 454e cmp r6, r9
|
||
8007774: ea41 4303 orr.w r3, r1, r3, lsl #16
|
||
8007778: f84a 3b04 str.w r3, [sl], #4
|
||
800777c: d8e6 bhi.n 800774c <__mdiff+0x84>
|
||
800777e: 1b33 subs r3, r6, r4
|
||
8007780: 3b15 subs r3, #21
|
||
8007782: f023 0303 bic.w r3, r3, #3
|
||
8007786: 3415 adds r4, #21
|
||
8007788: 3304 adds r3, #4
|
||
800778a: 42a6 cmp r6, r4
|
||
800778c: bf38 it cc
|
||
800778e: 2304 movcc r3, #4
|
||
8007790: 441d add r5, r3
|
||
8007792: 4443 add r3, r8
|
||
8007794: 461e mov r6, r3
|
||
8007796: 462c mov r4, r5
|
||
8007798: 4574 cmp r4, lr
|
||
800779a: d30e bcc.n 80077ba <__mdiff+0xf2>
|
||
800779c: f10e 0103 add.w r1, lr, #3
|
||
80077a0: 1b49 subs r1, r1, r5
|
||
80077a2: f021 0103 bic.w r1, r1, #3
|
||
80077a6: 3d03 subs r5, #3
|
||
80077a8: 45ae cmp lr, r5
|
||
80077aa: bf38 it cc
|
||
80077ac: 2100 movcc r1, #0
|
||
80077ae: 4419 add r1, r3
|
||
80077b0: f851 3d04 ldr.w r3, [r1, #-4]!
|
||
80077b4: b18b cbz r3, 80077da <__mdiff+0x112>
|
||
80077b6: 6117 str r7, [r2, #16]
|
||
80077b8: e7a0 b.n 80076fc <__mdiff+0x34>
|
||
80077ba: f854 8b04 ldr.w r8, [r4], #4
|
||
80077be: fa1f f188 uxth.w r1, r8
|
||
80077c2: 4461 add r1, ip
|
||
80077c4: 1408 asrs r0, r1, #16
|
||
80077c6: eb00 4018 add.w r0, r0, r8, lsr #16
|
||
80077ca: b289 uxth r1, r1
|
||
80077cc: ea41 4100 orr.w r1, r1, r0, lsl #16
|
||
80077d0: ea4f 4c20 mov.w ip, r0, asr #16
|
||
80077d4: f846 1b04 str.w r1, [r6], #4
|
||
80077d8: e7de b.n 8007798 <__mdiff+0xd0>
|
||
80077da: 3f01 subs r7, #1
|
||
80077dc: e7e8 b.n 80077b0 <__mdiff+0xe8>
|
||
80077de: bf00 nop
|
||
80077e0: 08009347 .word 0x08009347
|
||
80077e4: 08009358 .word 0x08009358
|
||
|
||
080077e8 <__d2b>:
|
||
80077e8: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
|
||
80077ec: 2101 movs r1, #1
|
||
80077ee: e9dd 7608 ldrd r7, r6, [sp, #32]
|
||
80077f2: 4690 mov r8, r2
|
||
80077f4: 461d mov r5, r3
|
||
80077f6: f7ff fcd1 bl 800719c <_Balloc>
|
||
80077fa: 4604 mov r4, r0
|
||
80077fc: b930 cbnz r0, 800780c <__d2b+0x24>
|
||
80077fe: 4602 mov r2, r0
|
||
8007800: f240 310a movw r1, #778 ; 0x30a
|
||
8007804: 4b24 ldr r3, [pc, #144] ; (8007898 <__d2b+0xb0>)
|
||
8007806: 4825 ldr r0, [pc, #148] ; (800789c <__d2b+0xb4>)
|
||
8007808: f000 f9b4 bl 8007b74 <__assert_func>
|
||
800780c: f3c5 0313 ubfx r3, r5, #0, #20
|
||
8007810: f3c5 550a ubfx r5, r5, #20, #11
|
||
8007814: bb2d cbnz r5, 8007862 <__d2b+0x7a>
|
||
8007816: 9301 str r3, [sp, #4]
|
||
8007818: f1b8 0300 subs.w r3, r8, #0
|
||
800781c: d026 beq.n 800786c <__d2b+0x84>
|
||
800781e: 4668 mov r0, sp
|
||
8007820: 9300 str r3, [sp, #0]
|
||
8007822: f7ff fd87 bl 8007334 <__lo0bits>
|
||
8007826: 9900 ldr r1, [sp, #0]
|
||
8007828: b1f0 cbz r0, 8007868 <__d2b+0x80>
|
||
800782a: 9a01 ldr r2, [sp, #4]
|
||
800782c: f1c0 0320 rsb r3, r0, #32
|
||
8007830: fa02 f303 lsl.w r3, r2, r3
|
||
8007834: 430b orrs r3, r1
|
||
8007836: 40c2 lsrs r2, r0
|
||
8007838: 6163 str r3, [r4, #20]
|
||
800783a: 9201 str r2, [sp, #4]
|
||
800783c: 9b01 ldr r3, [sp, #4]
|
||
800783e: 2b00 cmp r3, #0
|
||
8007840: bf14 ite ne
|
||
8007842: 2102 movne r1, #2
|
||
8007844: 2101 moveq r1, #1
|
||
8007846: 61a3 str r3, [r4, #24]
|
||
8007848: 6121 str r1, [r4, #16]
|
||
800784a: b1c5 cbz r5, 800787e <__d2b+0x96>
|
||
800784c: f2a5 4533 subw r5, r5, #1075 ; 0x433
|
||
8007850: 4405 add r5, r0
|
||
8007852: f1c0 0035 rsb r0, r0, #53 ; 0x35
|
||
8007856: 603d str r5, [r7, #0]
|
||
8007858: 6030 str r0, [r6, #0]
|
||
800785a: 4620 mov r0, r4
|
||
800785c: b002 add sp, #8
|
||
800785e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
||
8007862: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
|
||
8007866: e7d6 b.n 8007816 <__d2b+0x2e>
|
||
8007868: 6161 str r1, [r4, #20]
|
||
800786a: e7e7 b.n 800783c <__d2b+0x54>
|
||
800786c: a801 add r0, sp, #4
|
||
800786e: f7ff fd61 bl 8007334 <__lo0bits>
|
||
8007872: 2101 movs r1, #1
|
||
8007874: 9b01 ldr r3, [sp, #4]
|
||
8007876: 6121 str r1, [r4, #16]
|
||
8007878: 6163 str r3, [r4, #20]
|
||
800787a: 3020 adds r0, #32
|
||
800787c: e7e5 b.n 800784a <__d2b+0x62>
|
||
800787e: eb04 0381 add.w r3, r4, r1, lsl #2
|
||
8007882: f2a0 4032 subw r0, r0, #1074 ; 0x432
|
||
8007886: 6038 str r0, [r7, #0]
|
||
8007888: 6918 ldr r0, [r3, #16]
|
||
800788a: f7ff fd33 bl 80072f4 <__hi0bits>
|
||
800788e: ebc0 1141 rsb r1, r0, r1, lsl #5
|
||
8007892: 6031 str r1, [r6, #0]
|
||
8007894: e7e1 b.n 800785a <__d2b+0x72>
|
||
8007896: bf00 nop
|
||
8007898: 08009347 .word 0x08009347
|
||
800789c: 08009358 .word 0x08009358
|
||
|
||
080078a0 <_calloc_r>:
|
||
80078a0: b538 push {r3, r4, r5, lr}
|
||
80078a2: fb02 f501 mul.w r5, r2, r1
|
||
80078a6: 4629 mov r1, r5
|
||
80078a8: f7fe f8e4 bl 8005a74 <_malloc_r>
|
||
80078ac: 4604 mov r4, r0
|
||
80078ae: b118 cbz r0, 80078b8 <_calloc_r+0x18>
|
||
80078b0: 462a mov r2, r5
|
||
80078b2: 2100 movs r1, #0
|
||
80078b4: f7fe f88a bl 80059cc <memset>
|
||
80078b8: 4620 mov r0, r4
|
||
80078ba: bd38 pop {r3, r4, r5, pc}
|
||
|
||
080078bc <__ssputs_r>:
|
||
80078bc: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
80078c0: 688e ldr r6, [r1, #8]
|
||
80078c2: 4682 mov sl, r0
|
||
80078c4: 429e cmp r6, r3
|
||
80078c6: 460c mov r4, r1
|
||
80078c8: 4690 mov r8, r2
|
||
80078ca: 461f mov r7, r3
|
||
80078cc: d838 bhi.n 8007940 <__ssputs_r+0x84>
|
||
80078ce: 898a ldrh r2, [r1, #12]
|
||
80078d0: f412 6f90 tst.w r2, #1152 ; 0x480
|
||
80078d4: d032 beq.n 800793c <__ssputs_r+0x80>
|
||
80078d6: 6825 ldr r5, [r4, #0]
|
||
80078d8: 6909 ldr r1, [r1, #16]
|
||
80078da: 3301 adds r3, #1
|
||
80078dc: eba5 0901 sub.w r9, r5, r1
|
||
80078e0: 6965 ldr r5, [r4, #20]
|
||
80078e2: 444b add r3, r9
|
||
80078e4: eb05 0545 add.w r5, r5, r5, lsl #1
|
||
80078e8: eb05 75d5 add.w r5, r5, r5, lsr #31
|
||
80078ec: 106d asrs r5, r5, #1
|
||
80078ee: 429d cmp r5, r3
|
||
80078f0: bf38 it cc
|
||
80078f2: 461d movcc r5, r3
|
||
80078f4: 0553 lsls r3, r2, #21
|
||
80078f6: d531 bpl.n 800795c <__ssputs_r+0xa0>
|
||
80078f8: 4629 mov r1, r5
|
||
80078fa: f7fe f8bb bl 8005a74 <_malloc_r>
|
||
80078fe: 4606 mov r6, r0
|
||
8007900: b950 cbnz r0, 8007918 <__ssputs_r+0x5c>
|
||
8007902: 230c movs r3, #12
|
||
8007904: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8007908: f8ca 3000 str.w r3, [sl]
|
||
800790c: 89a3 ldrh r3, [r4, #12]
|
||
800790e: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8007912: 81a3 strh r3, [r4, #12]
|
||
8007914: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8007918: 464a mov r2, r9
|
||
800791a: 6921 ldr r1, [r4, #16]
|
||
800791c: f7ff fc24 bl 8007168 <memcpy>
|
||
8007920: 89a3 ldrh r3, [r4, #12]
|
||
8007922: f423 6390 bic.w r3, r3, #1152 ; 0x480
|
||
8007926: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
800792a: 81a3 strh r3, [r4, #12]
|
||
800792c: 6126 str r6, [r4, #16]
|
||
800792e: 444e add r6, r9
|
||
8007930: 6026 str r6, [r4, #0]
|
||
8007932: 463e mov r6, r7
|
||
8007934: 6165 str r5, [r4, #20]
|
||
8007936: eba5 0509 sub.w r5, r5, r9
|
||
800793a: 60a5 str r5, [r4, #8]
|
||
800793c: 42be cmp r6, r7
|
||
800793e: d900 bls.n 8007942 <__ssputs_r+0x86>
|
||
8007940: 463e mov r6, r7
|
||
8007942: 4632 mov r2, r6
|
||
8007944: 4641 mov r1, r8
|
||
8007946: 6820 ldr r0, [r4, #0]
|
||
8007948: f000 f959 bl 8007bfe <memmove>
|
||
800794c: 68a3 ldr r3, [r4, #8]
|
||
800794e: 6822 ldr r2, [r4, #0]
|
||
8007950: 1b9b subs r3, r3, r6
|
||
8007952: 4432 add r2, r6
|
||
8007954: 2000 movs r0, #0
|
||
8007956: 60a3 str r3, [r4, #8]
|
||
8007958: 6022 str r2, [r4, #0]
|
||
800795a: e7db b.n 8007914 <__ssputs_r+0x58>
|
||
800795c: 462a mov r2, r5
|
||
800795e: f000 f968 bl 8007c32 <_realloc_r>
|
||
8007962: 4606 mov r6, r0
|
||
8007964: 2800 cmp r0, #0
|
||
8007966: d1e1 bne.n 800792c <__ssputs_r+0x70>
|
||
8007968: 4650 mov r0, sl
|
||
800796a: 6921 ldr r1, [r4, #16]
|
||
800796c: f7fe f836 bl 80059dc <_free_r>
|
||
8007970: e7c7 b.n 8007902 <__ssputs_r+0x46>
|
||
...
|
||
|
||
08007974 <_svfiprintf_r>:
|
||
8007974: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8007978: 4698 mov r8, r3
|
||
800797a: 898b ldrh r3, [r1, #12]
|
||
800797c: 4607 mov r7, r0
|
||
800797e: 061b lsls r3, r3, #24
|
||
8007980: 460d mov r5, r1
|
||
8007982: 4614 mov r4, r2
|
||
8007984: b09d sub sp, #116 ; 0x74
|
||
8007986: d50e bpl.n 80079a6 <_svfiprintf_r+0x32>
|
||
8007988: 690b ldr r3, [r1, #16]
|
||
800798a: b963 cbnz r3, 80079a6 <_svfiprintf_r+0x32>
|
||
800798c: 2140 movs r1, #64 ; 0x40
|
||
800798e: f7fe f871 bl 8005a74 <_malloc_r>
|
||
8007992: 6028 str r0, [r5, #0]
|
||
8007994: 6128 str r0, [r5, #16]
|
||
8007996: b920 cbnz r0, 80079a2 <_svfiprintf_r+0x2e>
|
||
8007998: 230c movs r3, #12
|
||
800799a: 603b str r3, [r7, #0]
|
||
800799c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
80079a0: e0d1 b.n 8007b46 <_svfiprintf_r+0x1d2>
|
||
80079a2: 2340 movs r3, #64 ; 0x40
|
||
80079a4: 616b str r3, [r5, #20]
|
||
80079a6: 2300 movs r3, #0
|
||
80079a8: 9309 str r3, [sp, #36] ; 0x24
|
||
80079aa: 2320 movs r3, #32
|
||
80079ac: f88d 3029 strb.w r3, [sp, #41] ; 0x29
|
||
80079b0: 2330 movs r3, #48 ; 0x30
|
||
80079b2: f04f 0901 mov.w r9, #1
|
||
80079b6: f8cd 800c str.w r8, [sp, #12]
|
||
80079ba: f8df 81a4 ldr.w r8, [pc, #420] ; 8007b60 <_svfiprintf_r+0x1ec>
|
||
80079be: f88d 302a strb.w r3, [sp, #42] ; 0x2a
|
||
80079c2: 4623 mov r3, r4
|
||
80079c4: 469a mov sl, r3
|
||
80079c6: f813 2b01 ldrb.w r2, [r3], #1
|
||
80079ca: b10a cbz r2, 80079d0 <_svfiprintf_r+0x5c>
|
||
80079cc: 2a25 cmp r2, #37 ; 0x25
|
||
80079ce: d1f9 bne.n 80079c4 <_svfiprintf_r+0x50>
|
||
80079d0: ebba 0b04 subs.w fp, sl, r4
|
||
80079d4: d00b beq.n 80079ee <_svfiprintf_r+0x7a>
|
||
80079d6: 465b mov r3, fp
|
||
80079d8: 4622 mov r2, r4
|
||
80079da: 4629 mov r1, r5
|
||
80079dc: 4638 mov r0, r7
|
||
80079de: f7ff ff6d bl 80078bc <__ssputs_r>
|
||
80079e2: 3001 adds r0, #1
|
||
80079e4: f000 80aa beq.w 8007b3c <_svfiprintf_r+0x1c8>
|
||
80079e8: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
80079ea: 445a add r2, fp
|
||
80079ec: 9209 str r2, [sp, #36] ; 0x24
|
||
80079ee: f89a 3000 ldrb.w r3, [sl]
|
||
80079f2: 2b00 cmp r3, #0
|
||
80079f4: f000 80a2 beq.w 8007b3c <_svfiprintf_r+0x1c8>
|
||
80079f8: 2300 movs r3, #0
|
||
80079fa: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
80079fe: e9cd 2305 strd r2, r3, [sp, #20]
|
||
8007a02: f10a 0a01 add.w sl, sl, #1
|
||
8007a06: 9304 str r3, [sp, #16]
|
||
8007a08: 9307 str r3, [sp, #28]
|
||
8007a0a: f88d 3053 strb.w r3, [sp, #83] ; 0x53
|
||
8007a0e: 931a str r3, [sp, #104] ; 0x68
|
||
8007a10: 4654 mov r4, sl
|
||
8007a12: 2205 movs r2, #5
|
||
8007a14: f814 1b01 ldrb.w r1, [r4], #1
|
||
8007a18: 4851 ldr r0, [pc, #324] ; (8007b60 <_svfiprintf_r+0x1ec>)
|
||
8007a1a: f7ff fb97 bl 800714c <memchr>
|
||
8007a1e: 9a04 ldr r2, [sp, #16]
|
||
8007a20: b9d8 cbnz r0, 8007a5a <_svfiprintf_r+0xe6>
|
||
8007a22: 06d0 lsls r0, r2, #27
|
||
8007a24: bf44 itt mi
|
||
8007a26: 2320 movmi r3, #32
|
||
8007a28: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
8007a2c: 0711 lsls r1, r2, #28
|
||
8007a2e: bf44 itt mi
|
||
8007a30: 232b movmi r3, #43 ; 0x2b
|
||
8007a32: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
8007a36: f89a 3000 ldrb.w r3, [sl]
|
||
8007a3a: 2b2a cmp r3, #42 ; 0x2a
|
||
8007a3c: d015 beq.n 8007a6a <_svfiprintf_r+0xf6>
|
||
8007a3e: 4654 mov r4, sl
|
||
8007a40: 2000 movs r0, #0
|
||
8007a42: f04f 0c0a mov.w ip, #10
|
||
8007a46: 9a07 ldr r2, [sp, #28]
|
||
8007a48: 4621 mov r1, r4
|
||
8007a4a: f811 3b01 ldrb.w r3, [r1], #1
|
||
8007a4e: 3b30 subs r3, #48 ; 0x30
|
||
8007a50: 2b09 cmp r3, #9
|
||
8007a52: d94e bls.n 8007af2 <_svfiprintf_r+0x17e>
|
||
8007a54: b1b0 cbz r0, 8007a84 <_svfiprintf_r+0x110>
|
||
8007a56: 9207 str r2, [sp, #28]
|
||
8007a58: e014 b.n 8007a84 <_svfiprintf_r+0x110>
|
||
8007a5a: eba0 0308 sub.w r3, r0, r8
|
||
8007a5e: fa09 f303 lsl.w r3, r9, r3
|
||
8007a62: 4313 orrs r3, r2
|
||
8007a64: 46a2 mov sl, r4
|
||
8007a66: 9304 str r3, [sp, #16]
|
||
8007a68: e7d2 b.n 8007a10 <_svfiprintf_r+0x9c>
|
||
8007a6a: 9b03 ldr r3, [sp, #12]
|
||
8007a6c: 1d19 adds r1, r3, #4
|
||
8007a6e: 681b ldr r3, [r3, #0]
|
||
8007a70: 9103 str r1, [sp, #12]
|
||
8007a72: 2b00 cmp r3, #0
|
||
8007a74: bfbb ittet lt
|
||
8007a76: 425b neglt r3, r3
|
||
8007a78: f042 0202 orrlt.w r2, r2, #2
|
||
8007a7c: 9307 strge r3, [sp, #28]
|
||
8007a7e: 9307 strlt r3, [sp, #28]
|
||
8007a80: bfb8 it lt
|
||
8007a82: 9204 strlt r2, [sp, #16]
|
||
8007a84: 7823 ldrb r3, [r4, #0]
|
||
8007a86: 2b2e cmp r3, #46 ; 0x2e
|
||
8007a88: d10c bne.n 8007aa4 <_svfiprintf_r+0x130>
|
||
8007a8a: 7863 ldrb r3, [r4, #1]
|
||
8007a8c: 2b2a cmp r3, #42 ; 0x2a
|
||
8007a8e: d135 bne.n 8007afc <_svfiprintf_r+0x188>
|
||
8007a90: 9b03 ldr r3, [sp, #12]
|
||
8007a92: 3402 adds r4, #2
|
||
8007a94: 1d1a adds r2, r3, #4
|
||
8007a96: 681b ldr r3, [r3, #0]
|
||
8007a98: 9203 str r2, [sp, #12]
|
||
8007a9a: 2b00 cmp r3, #0
|
||
8007a9c: bfb8 it lt
|
||
8007a9e: f04f 33ff movlt.w r3, #4294967295 ; 0xffffffff
|
||
8007aa2: 9305 str r3, [sp, #20]
|
||
8007aa4: f8df a0c8 ldr.w sl, [pc, #200] ; 8007b70 <_svfiprintf_r+0x1fc>
|
||
8007aa8: 2203 movs r2, #3
|
||
8007aaa: 4650 mov r0, sl
|
||
8007aac: 7821 ldrb r1, [r4, #0]
|
||
8007aae: f7ff fb4d bl 800714c <memchr>
|
||
8007ab2: b140 cbz r0, 8007ac6 <_svfiprintf_r+0x152>
|
||
8007ab4: 2340 movs r3, #64 ; 0x40
|
||
8007ab6: eba0 000a sub.w r0, r0, sl
|
||
8007aba: fa03 f000 lsl.w r0, r3, r0
|
||
8007abe: 9b04 ldr r3, [sp, #16]
|
||
8007ac0: 3401 adds r4, #1
|
||
8007ac2: 4303 orrs r3, r0
|
||
8007ac4: 9304 str r3, [sp, #16]
|
||
8007ac6: f814 1b01 ldrb.w r1, [r4], #1
|
||
8007aca: 2206 movs r2, #6
|
||
8007acc: 4825 ldr r0, [pc, #148] ; (8007b64 <_svfiprintf_r+0x1f0>)
|
||
8007ace: f88d 1028 strb.w r1, [sp, #40] ; 0x28
|
||
8007ad2: f7ff fb3b bl 800714c <memchr>
|
||
8007ad6: 2800 cmp r0, #0
|
||
8007ad8: d038 beq.n 8007b4c <_svfiprintf_r+0x1d8>
|
||
8007ada: 4b23 ldr r3, [pc, #140] ; (8007b68 <_svfiprintf_r+0x1f4>)
|
||
8007adc: bb1b cbnz r3, 8007b26 <_svfiprintf_r+0x1b2>
|
||
8007ade: 9b03 ldr r3, [sp, #12]
|
||
8007ae0: 3307 adds r3, #7
|
||
8007ae2: f023 0307 bic.w r3, r3, #7
|
||
8007ae6: 3308 adds r3, #8
|
||
8007ae8: 9303 str r3, [sp, #12]
|
||
8007aea: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8007aec: 4433 add r3, r6
|
||
8007aee: 9309 str r3, [sp, #36] ; 0x24
|
||
8007af0: e767 b.n 80079c2 <_svfiprintf_r+0x4e>
|
||
8007af2: 460c mov r4, r1
|
||
8007af4: 2001 movs r0, #1
|
||
8007af6: fb0c 3202 mla r2, ip, r2, r3
|
||
8007afa: e7a5 b.n 8007a48 <_svfiprintf_r+0xd4>
|
||
8007afc: 2300 movs r3, #0
|
||
8007afe: f04f 0c0a mov.w ip, #10
|
||
8007b02: 4619 mov r1, r3
|
||
8007b04: 3401 adds r4, #1
|
||
8007b06: 9305 str r3, [sp, #20]
|
||
8007b08: 4620 mov r0, r4
|
||
8007b0a: f810 2b01 ldrb.w r2, [r0], #1
|
||
8007b0e: 3a30 subs r2, #48 ; 0x30
|
||
8007b10: 2a09 cmp r2, #9
|
||
8007b12: d903 bls.n 8007b1c <_svfiprintf_r+0x1a8>
|
||
8007b14: 2b00 cmp r3, #0
|
||
8007b16: d0c5 beq.n 8007aa4 <_svfiprintf_r+0x130>
|
||
8007b18: 9105 str r1, [sp, #20]
|
||
8007b1a: e7c3 b.n 8007aa4 <_svfiprintf_r+0x130>
|
||
8007b1c: 4604 mov r4, r0
|
||
8007b1e: 2301 movs r3, #1
|
||
8007b20: fb0c 2101 mla r1, ip, r1, r2
|
||
8007b24: e7f0 b.n 8007b08 <_svfiprintf_r+0x194>
|
||
8007b26: ab03 add r3, sp, #12
|
||
8007b28: 9300 str r3, [sp, #0]
|
||
8007b2a: 462a mov r2, r5
|
||
8007b2c: 4638 mov r0, r7
|
||
8007b2e: 4b0f ldr r3, [pc, #60] ; (8007b6c <_svfiprintf_r+0x1f8>)
|
||
8007b30: a904 add r1, sp, #16
|
||
8007b32: f7fe f897 bl 8005c64 <_printf_float>
|
||
8007b36: 1c42 adds r2, r0, #1
|
||
8007b38: 4606 mov r6, r0
|
||
8007b3a: d1d6 bne.n 8007aea <_svfiprintf_r+0x176>
|
||
8007b3c: 89ab ldrh r3, [r5, #12]
|
||
8007b3e: 065b lsls r3, r3, #25
|
||
8007b40: f53f af2c bmi.w 800799c <_svfiprintf_r+0x28>
|
||
8007b44: 9809 ldr r0, [sp, #36] ; 0x24
|
||
8007b46: b01d add sp, #116 ; 0x74
|
||
8007b48: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8007b4c: ab03 add r3, sp, #12
|
||
8007b4e: 9300 str r3, [sp, #0]
|
||
8007b50: 462a mov r2, r5
|
||
8007b52: 4638 mov r0, r7
|
||
8007b54: 4b05 ldr r3, [pc, #20] ; (8007b6c <_svfiprintf_r+0x1f8>)
|
||
8007b56: a904 add r1, sp, #16
|
||
8007b58: f7fe fb20 bl 800619c <_printf_i>
|
||
8007b5c: e7eb b.n 8007b36 <_svfiprintf_r+0x1c2>
|
||
8007b5e: bf00 nop
|
||
8007b60: 080094b4 .word 0x080094b4
|
||
8007b64: 080094be .word 0x080094be
|
||
8007b68: 08005c65 .word 0x08005c65
|
||
8007b6c: 080078bd .word 0x080078bd
|
||
8007b70: 080094ba .word 0x080094ba
|
||
|
||
08007b74 <__assert_func>:
|
||
8007b74: b51f push {r0, r1, r2, r3, r4, lr}
|
||
8007b76: 4614 mov r4, r2
|
||
8007b78: 461a mov r2, r3
|
||
8007b7a: 4b09 ldr r3, [pc, #36] ; (8007ba0 <__assert_func+0x2c>)
|
||
8007b7c: 4605 mov r5, r0
|
||
8007b7e: 681b ldr r3, [r3, #0]
|
||
8007b80: 68d8 ldr r0, [r3, #12]
|
||
8007b82: b14c cbz r4, 8007b98 <__assert_func+0x24>
|
||
8007b84: 4b07 ldr r3, [pc, #28] ; (8007ba4 <__assert_func+0x30>)
|
||
8007b86: e9cd 3401 strd r3, r4, [sp, #4]
|
||
8007b8a: 9100 str r1, [sp, #0]
|
||
8007b8c: 462b mov r3, r5
|
||
8007b8e: 4906 ldr r1, [pc, #24] ; (8007ba8 <__assert_func+0x34>)
|
||
8007b90: f000 f80e bl 8007bb0 <fiprintf>
|
||
8007b94: f000 fa98 bl 80080c8 <abort>
|
||
8007b98: 4b04 ldr r3, [pc, #16] ; (8007bac <__assert_func+0x38>)
|
||
8007b9a: 461c mov r4, r3
|
||
8007b9c: e7f3 b.n 8007b86 <__assert_func+0x12>
|
||
8007b9e: bf00 nop
|
||
8007ba0: 2000000c .word 0x2000000c
|
||
8007ba4: 080094c5 .word 0x080094c5
|
||
8007ba8: 080094d2 .word 0x080094d2
|
||
8007bac: 08009500 .word 0x08009500
|
||
|
||
08007bb0 <fiprintf>:
|
||
8007bb0: b40e push {r1, r2, r3}
|
||
8007bb2: b503 push {r0, r1, lr}
|
||
8007bb4: 4601 mov r1, r0
|
||
8007bb6: ab03 add r3, sp, #12
|
||
8007bb8: 4805 ldr r0, [pc, #20] ; (8007bd0 <fiprintf+0x20>)
|
||
8007bba: f853 2b04 ldr.w r2, [r3], #4
|
||
8007bbe: 6800 ldr r0, [r0, #0]
|
||
8007bc0: 9301 str r3, [sp, #4]
|
||
8007bc2: f000 f883 bl 8007ccc <_vfiprintf_r>
|
||
8007bc6: b002 add sp, #8
|
||
8007bc8: f85d eb04 ldr.w lr, [sp], #4
|
||
8007bcc: b003 add sp, #12
|
||
8007bce: 4770 bx lr
|
||
8007bd0: 2000000c .word 0x2000000c
|
||
|
||
08007bd4 <__retarget_lock_init_recursive>:
|
||
8007bd4: 4770 bx lr
|
||
|
||
08007bd6 <__retarget_lock_acquire_recursive>:
|
||
8007bd6: 4770 bx lr
|
||
|
||
08007bd8 <__retarget_lock_release_recursive>:
|
||
8007bd8: 4770 bx lr
|
||
|
||
08007bda <__ascii_mbtowc>:
|
||
8007bda: b082 sub sp, #8
|
||
8007bdc: b901 cbnz r1, 8007be0 <__ascii_mbtowc+0x6>
|
||
8007bde: a901 add r1, sp, #4
|
||
8007be0: b142 cbz r2, 8007bf4 <__ascii_mbtowc+0x1a>
|
||
8007be2: b14b cbz r3, 8007bf8 <__ascii_mbtowc+0x1e>
|
||
8007be4: 7813 ldrb r3, [r2, #0]
|
||
8007be6: 600b str r3, [r1, #0]
|
||
8007be8: 7812 ldrb r2, [r2, #0]
|
||
8007bea: 1e10 subs r0, r2, #0
|
||
8007bec: bf18 it ne
|
||
8007bee: 2001 movne r0, #1
|
||
8007bf0: b002 add sp, #8
|
||
8007bf2: 4770 bx lr
|
||
8007bf4: 4610 mov r0, r2
|
||
8007bf6: e7fb b.n 8007bf0 <__ascii_mbtowc+0x16>
|
||
8007bf8: f06f 0001 mvn.w r0, #1
|
||
8007bfc: e7f8 b.n 8007bf0 <__ascii_mbtowc+0x16>
|
||
|
||
08007bfe <memmove>:
|
||
8007bfe: 4288 cmp r0, r1
|
||
8007c00: b510 push {r4, lr}
|
||
8007c02: eb01 0402 add.w r4, r1, r2
|
||
8007c06: d902 bls.n 8007c0e <memmove+0x10>
|
||
8007c08: 4284 cmp r4, r0
|
||
8007c0a: 4623 mov r3, r4
|
||
8007c0c: d807 bhi.n 8007c1e <memmove+0x20>
|
||
8007c0e: 1e43 subs r3, r0, #1
|
||
8007c10: 42a1 cmp r1, r4
|
||
8007c12: d008 beq.n 8007c26 <memmove+0x28>
|
||
8007c14: f811 2b01 ldrb.w r2, [r1], #1
|
||
8007c18: f803 2f01 strb.w r2, [r3, #1]!
|
||
8007c1c: e7f8 b.n 8007c10 <memmove+0x12>
|
||
8007c1e: 4601 mov r1, r0
|
||
8007c20: 4402 add r2, r0
|
||
8007c22: 428a cmp r2, r1
|
||
8007c24: d100 bne.n 8007c28 <memmove+0x2a>
|
||
8007c26: bd10 pop {r4, pc}
|
||
8007c28: f813 4d01 ldrb.w r4, [r3, #-1]!
|
||
8007c2c: f802 4d01 strb.w r4, [r2, #-1]!
|
||
8007c30: e7f7 b.n 8007c22 <memmove+0x24>
|
||
|
||
08007c32 <_realloc_r>:
|
||
8007c32: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8007c34: 4607 mov r7, r0
|
||
8007c36: 4614 mov r4, r2
|
||
8007c38: 460e mov r6, r1
|
||
8007c3a: b921 cbnz r1, 8007c46 <_realloc_r+0x14>
|
||
8007c3c: 4611 mov r1, r2
|
||
8007c3e: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr}
|
||
8007c42: f7fd bf17 b.w 8005a74 <_malloc_r>
|
||
8007c46: b922 cbnz r2, 8007c52 <_realloc_r+0x20>
|
||
8007c48: f7fd fec8 bl 80059dc <_free_r>
|
||
8007c4c: 4625 mov r5, r4
|
||
8007c4e: 4628 mov r0, r5
|
||
8007c50: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
8007c52: f000 fc5d bl 8008510 <_malloc_usable_size_r>
|
||
8007c56: 42a0 cmp r0, r4
|
||
8007c58: d20f bcs.n 8007c7a <_realloc_r+0x48>
|
||
8007c5a: 4621 mov r1, r4
|
||
8007c5c: 4638 mov r0, r7
|
||
8007c5e: f7fd ff09 bl 8005a74 <_malloc_r>
|
||
8007c62: 4605 mov r5, r0
|
||
8007c64: 2800 cmp r0, #0
|
||
8007c66: d0f2 beq.n 8007c4e <_realloc_r+0x1c>
|
||
8007c68: 4631 mov r1, r6
|
||
8007c6a: 4622 mov r2, r4
|
||
8007c6c: f7ff fa7c bl 8007168 <memcpy>
|
||
8007c70: 4631 mov r1, r6
|
||
8007c72: 4638 mov r0, r7
|
||
8007c74: f7fd feb2 bl 80059dc <_free_r>
|
||
8007c78: e7e9 b.n 8007c4e <_realloc_r+0x1c>
|
||
8007c7a: 4635 mov r5, r6
|
||
8007c7c: e7e7 b.n 8007c4e <_realloc_r+0x1c>
|
||
|
||
08007c7e <__sfputc_r>:
|
||
8007c7e: 6893 ldr r3, [r2, #8]
|
||
8007c80: b410 push {r4}
|
||
8007c82: 3b01 subs r3, #1
|
||
8007c84: 2b00 cmp r3, #0
|
||
8007c86: 6093 str r3, [r2, #8]
|
||
8007c88: da07 bge.n 8007c9a <__sfputc_r+0x1c>
|
||
8007c8a: 6994 ldr r4, [r2, #24]
|
||
8007c8c: 42a3 cmp r3, r4
|
||
8007c8e: db01 blt.n 8007c94 <__sfputc_r+0x16>
|
||
8007c90: 290a cmp r1, #10
|
||
8007c92: d102 bne.n 8007c9a <__sfputc_r+0x1c>
|
||
8007c94: bc10 pop {r4}
|
||
8007c96: f000 b949 b.w 8007f2c <__swbuf_r>
|
||
8007c9a: 6813 ldr r3, [r2, #0]
|
||
8007c9c: 1c58 adds r0, r3, #1
|
||
8007c9e: 6010 str r0, [r2, #0]
|
||
8007ca0: 7019 strb r1, [r3, #0]
|
||
8007ca2: 4608 mov r0, r1
|
||
8007ca4: bc10 pop {r4}
|
||
8007ca6: 4770 bx lr
|
||
|
||
08007ca8 <__sfputs_r>:
|
||
8007ca8: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8007caa: 4606 mov r6, r0
|
||
8007cac: 460f mov r7, r1
|
||
8007cae: 4614 mov r4, r2
|
||
8007cb0: 18d5 adds r5, r2, r3
|
||
8007cb2: 42ac cmp r4, r5
|
||
8007cb4: d101 bne.n 8007cba <__sfputs_r+0x12>
|
||
8007cb6: 2000 movs r0, #0
|
||
8007cb8: e007 b.n 8007cca <__sfputs_r+0x22>
|
||
8007cba: 463a mov r2, r7
|
||
8007cbc: 4630 mov r0, r6
|
||
8007cbe: f814 1b01 ldrb.w r1, [r4], #1
|
||
8007cc2: f7ff ffdc bl 8007c7e <__sfputc_r>
|
||
8007cc6: 1c43 adds r3, r0, #1
|
||
8007cc8: d1f3 bne.n 8007cb2 <__sfputs_r+0xa>
|
||
8007cca: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
|
||
08007ccc <_vfiprintf_r>:
|
||
8007ccc: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8007cd0: 460d mov r5, r1
|
||
8007cd2: 4614 mov r4, r2
|
||
8007cd4: 4698 mov r8, r3
|
||
8007cd6: 4606 mov r6, r0
|
||
8007cd8: b09d sub sp, #116 ; 0x74
|
||
8007cda: b118 cbz r0, 8007ce4 <_vfiprintf_r+0x18>
|
||
8007cdc: 6983 ldr r3, [r0, #24]
|
||
8007cde: b90b cbnz r3, 8007ce4 <_vfiprintf_r+0x18>
|
||
8007ce0: f000 fb14 bl 800830c <__sinit>
|
||
8007ce4: 4b89 ldr r3, [pc, #548] ; (8007f0c <_vfiprintf_r+0x240>)
|
||
8007ce6: 429d cmp r5, r3
|
||
8007ce8: d11b bne.n 8007d22 <_vfiprintf_r+0x56>
|
||
8007cea: 6875 ldr r5, [r6, #4]
|
||
8007cec: 6e6b ldr r3, [r5, #100] ; 0x64
|
||
8007cee: 07d9 lsls r1, r3, #31
|
||
8007cf0: d405 bmi.n 8007cfe <_vfiprintf_r+0x32>
|
||
8007cf2: 89ab ldrh r3, [r5, #12]
|
||
8007cf4: 059a lsls r2, r3, #22
|
||
8007cf6: d402 bmi.n 8007cfe <_vfiprintf_r+0x32>
|
||
8007cf8: 6da8 ldr r0, [r5, #88] ; 0x58
|
||
8007cfa: f7ff ff6c bl 8007bd6 <__retarget_lock_acquire_recursive>
|
||
8007cfe: 89ab ldrh r3, [r5, #12]
|
||
8007d00: 071b lsls r3, r3, #28
|
||
8007d02: d501 bpl.n 8007d08 <_vfiprintf_r+0x3c>
|
||
8007d04: 692b ldr r3, [r5, #16]
|
||
8007d06: b9eb cbnz r3, 8007d44 <_vfiprintf_r+0x78>
|
||
8007d08: 4629 mov r1, r5
|
||
8007d0a: 4630 mov r0, r6
|
||
8007d0c: f000 f96e bl 8007fec <__swsetup_r>
|
||
8007d10: b1c0 cbz r0, 8007d44 <_vfiprintf_r+0x78>
|
||
8007d12: 6e6b ldr r3, [r5, #100] ; 0x64
|
||
8007d14: 07dc lsls r4, r3, #31
|
||
8007d16: d50e bpl.n 8007d36 <_vfiprintf_r+0x6a>
|
||
8007d18: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8007d1c: b01d add sp, #116 ; 0x74
|
||
8007d1e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8007d22: 4b7b ldr r3, [pc, #492] ; (8007f10 <_vfiprintf_r+0x244>)
|
||
8007d24: 429d cmp r5, r3
|
||
8007d26: d101 bne.n 8007d2c <_vfiprintf_r+0x60>
|
||
8007d28: 68b5 ldr r5, [r6, #8]
|
||
8007d2a: e7df b.n 8007cec <_vfiprintf_r+0x20>
|
||
8007d2c: 4b79 ldr r3, [pc, #484] ; (8007f14 <_vfiprintf_r+0x248>)
|
||
8007d2e: 429d cmp r5, r3
|
||
8007d30: bf08 it eq
|
||
8007d32: 68f5 ldreq r5, [r6, #12]
|
||
8007d34: e7da b.n 8007cec <_vfiprintf_r+0x20>
|
||
8007d36: 89ab ldrh r3, [r5, #12]
|
||
8007d38: 0598 lsls r0, r3, #22
|
||
8007d3a: d4ed bmi.n 8007d18 <_vfiprintf_r+0x4c>
|
||
8007d3c: 6da8 ldr r0, [r5, #88] ; 0x58
|
||
8007d3e: f7ff ff4b bl 8007bd8 <__retarget_lock_release_recursive>
|
||
8007d42: e7e9 b.n 8007d18 <_vfiprintf_r+0x4c>
|
||
8007d44: 2300 movs r3, #0
|
||
8007d46: 9309 str r3, [sp, #36] ; 0x24
|
||
8007d48: 2320 movs r3, #32
|
||
8007d4a: f88d 3029 strb.w r3, [sp, #41] ; 0x29
|
||
8007d4e: 2330 movs r3, #48 ; 0x30
|
||
8007d50: f04f 0901 mov.w r9, #1
|
||
8007d54: f8cd 800c str.w r8, [sp, #12]
|
||
8007d58: f8df 81bc ldr.w r8, [pc, #444] ; 8007f18 <_vfiprintf_r+0x24c>
|
||
8007d5c: f88d 302a strb.w r3, [sp, #42] ; 0x2a
|
||
8007d60: 4623 mov r3, r4
|
||
8007d62: 469a mov sl, r3
|
||
8007d64: f813 2b01 ldrb.w r2, [r3], #1
|
||
8007d68: b10a cbz r2, 8007d6e <_vfiprintf_r+0xa2>
|
||
8007d6a: 2a25 cmp r2, #37 ; 0x25
|
||
8007d6c: d1f9 bne.n 8007d62 <_vfiprintf_r+0x96>
|
||
8007d6e: ebba 0b04 subs.w fp, sl, r4
|
||
8007d72: d00b beq.n 8007d8c <_vfiprintf_r+0xc0>
|
||
8007d74: 465b mov r3, fp
|
||
8007d76: 4622 mov r2, r4
|
||
8007d78: 4629 mov r1, r5
|
||
8007d7a: 4630 mov r0, r6
|
||
8007d7c: f7ff ff94 bl 8007ca8 <__sfputs_r>
|
||
8007d80: 3001 adds r0, #1
|
||
8007d82: f000 80aa beq.w 8007eda <_vfiprintf_r+0x20e>
|
||
8007d86: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
8007d88: 445a add r2, fp
|
||
8007d8a: 9209 str r2, [sp, #36] ; 0x24
|
||
8007d8c: f89a 3000 ldrb.w r3, [sl]
|
||
8007d90: 2b00 cmp r3, #0
|
||
8007d92: f000 80a2 beq.w 8007eda <_vfiprintf_r+0x20e>
|
||
8007d96: 2300 movs r3, #0
|
||
8007d98: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8007d9c: e9cd 2305 strd r2, r3, [sp, #20]
|
||
8007da0: f10a 0a01 add.w sl, sl, #1
|
||
8007da4: 9304 str r3, [sp, #16]
|
||
8007da6: 9307 str r3, [sp, #28]
|
||
8007da8: f88d 3053 strb.w r3, [sp, #83] ; 0x53
|
||
8007dac: 931a str r3, [sp, #104] ; 0x68
|
||
8007dae: 4654 mov r4, sl
|
||
8007db0: 2205 movs r2, #5
|
||
8007db2: f814 1b01 ldrb.w r1, [r4], #1
|
||
8007db6: 4858 ldr r0, [pc, #352] ; (8007f18 <_vfiprintf_r+0x24c>)
|
||
8007db8: f7ff f9c8 bl 800714c <memchr>
|
||
8007dbc: 9a04 ldr r2, [sp, #16]
|
||
8007dbe: b9d8 cbnz r0, 8007df8 <_vfiprintf_r+0x12c>
|
||
8007dc0: 06d1 lsls r1, r2, #27
|
||
8007dc2: bf44 itt mi
|
||
8007dc4: 2320 movmi r3, #32
|
||
8007dc6: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
8007dca: 0713 lsls r3, r2, #28
|
||
8007dcc: bf44 itt mi
|
||
8007dce: 232b movmi r3, #43 ; 0x2b
|
||
8007dd0: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
8007dd4: f89a 3000 ldrb.w r3, [sl]
|
||
8007dd8: 2b2a cmp r3, #42 ; 0x2a
|
||
8007dda: d015 beq.n 8007e08 <_vfiprintf_r+0x13c>
|
||
8007ddc: 4654 mov r4, sl
|
||
8007dde: 2000 movs r0, #0
|
||
8007de0: f04f 0c0a mov.w ip, #10
|
||
8007de4: 9a07 ldr r2, [sp, #28]
|
||
8007de6: 4621 mov r1, r4
|
||
8007de8: f811 3b01 ldrb.w r3, [r1], #1
|
||
8007dec: 3b30 subs r3, #48 ; 0x30
|
||
8007dee: 2b09 cmp r3, #9
|
||
8007df0: d94e bls.n 8007e90 <_vfiprintf_r+0x1c4>
|
||
8007df2: b1b0 cbz r0, 8007e22 <_vfiprintf_r+0x156>
|
||
8007df4: 9207 str r2, [sp, #28]
|
||
8007df6: e014 b.n 8007e22 <_vfiprintf_r+0x156>
|
||
8007df8: eba0 0308 sub.w r3, r0, r8
|
||
8007dfc: fa09 f303 lsl.w r3, r9, r3
|
||
8007e00: 4313 orrs r3, r2
|
||
8007e02: 46a2 mov sl, r4
|
||
8007e04: 9304 str r3, [sp, #16]
|
||
8007e06: e7d2 b.n 8007dae <_vfiprintf_r+0xe2>
|
||
8007e08: 9b03 ldr r3, [sp, #12]
|
||
8007e0a: 1d19 adds r1, r3, #4
|
||
8007e0c: 681b ldr r3, [r3, #0]
|
||
8007e0e: 9103 str r1, [sp, #12]
|
||
8007e10: 2b00 cmp r3, #0
|
||
8007e12: bfbb ittet lt
|
||
8007e14: 425b neglt r3, r3
|
||
8007e16: f042 0202 orrlt.w r2, r2, #2
|
||
8007e1a: 9307 strge r3, [sp, #28]
|
||
8007e1c: 9307 strlt r3, [sp, #28]
|
||
8007e1e: bfb8 it lt
|
||
8007e20: 9204 strlt r2, [sp, #16]
|
||
8007e22: 7823 ldrb r3, [r4, #0]
|
||
8007e24: 2b2e cmp r3, #46 ; 0x2e
|
||
8007e26: d10c bne.n 8007e42 <_vfiprintf_r+0x176>
|
||
8007e28: 7863 ldrb r3, [r4, #1]
|
||
8007e2a: 2b2a cmp r3, #42 ; 0x2a
|
||
8007e2c: d135 bne.n 8007e9a <_vfiprintf_r+0x1ce>
|
||
8007e2e: 9b03 ldr r3, [sp, #12]
|
||
8007e30: 3402 adds r4, #2
|
||
8007e32: 1d1a adds r2, r3, #4
|
||
8007e34: 681b ldr r3, [r3, #0]
|
||
8007e36: 9203 str r2, [sp, #12]
|
||
8007e38: 2b00 cmp r3, #0
|
||
8007e3a: bfb8 it lt
|
||
8007e3c: f04f 33ff movlt.w r3, #4294967295 ; 0xffffffff
|
||
8007e40: 9305 str r3, [sp, #20]
|
||
8007e42: f8df a0e4 ldr.w sl, [pc, #228] ; 8007f28 <_vfiprintf_r+0x25c>
|
||
8007e46: 2203 movs r2, #3
|
||
8007e48: 4650 mov r0, sl
|
||
8007e4a: 7821 ldrb r1, [r4, #0]
|
||
8007e4c: f7ff f97e bl 800714c <memchr>
|
||
8007e50: b140 cbz r0, 8007e64 <_vfiprintf_r+0x198>
|
||
8007e52: 2340 movs r3, #64 ; 0x40
|
||
8007e54: eba0 000a sub.w r0, r0, sl
|
||
8007e58: fa03 f000 lsl.w r0, r3, r0
|
||
8007e5c: 9b04 ldr r3, [sp, #16]
|
||
8007e5e: 3401 adds r4, #1
|
||
8007e60: 4303 orrs r3, r0
|
||
8007e62: 9304 str r3, [sp, #16]
|
||
8007e64: f814 1b01 ldrb.w r1, [r4], #1
|
||
8007e68: 2206 movs r2, #6
|
||
8007e6a: 482c ldr r0, [pc, #176] ; (8007f1c <_vfiprintf_r+0x250>)
|
||
8007e6c: f88d 1028 strb.w r1, [sp, #40] ; 0x28
|
||
8007e70: f7ff f96c bl 800714c <memchr>
|
||
8007e74: 2800 cmp r0, #0
|
||
8007e76: d03f beq.n 8007ef8 <_vfiprintf_r+0x22c>
|
||
8007e78: 4b29 ldr r3, [pc, #164] ; (8007f20 <_vfiprintf_r+0x254>)
|
||
8007e7a: bb1b cbnz r3, 8007ec4 <_vfiprintf_r+0x1f8>
|
||
8007e7c: 9b03 ldr r3, [sp, #12]
|
||
8007e7e: 3307 adds r3, #7
|
||
8007e80: f023 0307 bic.w r3, r3, #7
|
||
8007e84: 3308 adds r3, #8
|
||
8007e86: 9303 str r3, [sp, #12]
|
||
8007e88: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8007e8a: 443b add r3, r7
|
||
8007e8c: 9309 str r3, [sp, #36] ; 0x24
|
||
8007e8e: e767 b.n 8007d60 <_vfiprintf_r+0x94>
|
||
8007e90: 460c mov r4, r1
|
||
8007e92: 2001 movs r0, #1
|
||
8007e94: fb0c 3202 mla r2, ip, r2, r3
|
||
8007e98: e7a5 b.n 8007de6 <_vfiprintf_r+0x11a>
|
||
8007e9a: 2300 movs r3, #0
|
||
8007e9c: f04f 0c0a mov.w ip, #10
|
||
8007ea0: 4619 mov r1, r3
|
||
8007ea2: 3401 adds r4, #1
|
||
8007ea4: 9305 str r3, [sp, #20]
|
||
8007ea6: 4620 mov r0, r4
|
||
8007ea8: f810 2b01 ldrb.w r2, [r0], #1
|
||
8007eac: 3a30 subs r2, #48 ; 0x30
|
||
8007eae: 2a09 cmp r2, #9
|
||
8007eb0: d903 bls.n 8007eba <_vfiprintf_r+0x1ee>
|
||
8007eb2: 2b00 cmp r3, #0
|
||
8007eb4: d0c5 beq.n 8007e42 <_vfiprintf_r+0x176>
|
||
8007eb6: 9105 str r1, [sp, #20]
|
||
8007eb8: e7c3 b.n 8007e42 <_vfiprintf_r+0x176>
|
||
8007eba: 4604 mov r4, r0
|
||
8007ebc: 2301 movs r3, #1
|
||
8007ebe: fb0c 2101 mla r1, ip, r1, r2
|
||
8007ec2: e7f0 b.n 8007ea6 <_vfiprintf_r+0x1da>
|
||
8007ec4: ab03 add r3, sp, #12
|
||
8007ec6: 9300 str r3, [sp, #0]
|
||
8007ec8: 462a mov r2, r5
|
||
8007eca: 4630 mov r0, r6
|
||
8007ecc: 4b15 ldr r3, [pc, #84] ; (8007f24 <_vfiprintf_r+0x258>)
|
||
8007ece: a904 add r1, sp, #16
|
||
8007ed0: f7fd fec8 bl 8005c64 <_printf_float>
|
||
8007ed4: 4607 mov r7, r0
|
||
8007ed6: 1c78 adds r0, r7, #1
|
||
8007ed8: d1d6 bne.n 8007e88 <_vfiprintf_r+0x1bc>
|
||
8007eda: 6e6b ldr r3, [r5, #100] ; 0x64
|
||
8007edc: 07d9 lsls r1, r3, #31
|
||
8007ede: d405 bmi.n 8007eec <_vfiprintf_r+0x220>
|
||
8007ee0: 89ab ldrh r3, [r5, #12]
|
||
8007ee2: 059a lsls r2, r3, #22
|
||
8007ee4: d402 bmi.n 8007eec <_vfiprintf_r+0x220>
|
||
8007ee6: 6da8 ldr r0, [r5, #88] ; 0x58
|
||
8007ee8: f7ff fe76 bl 8007bd8 <__retarget_lock_release_recursive>
|
||
8007eec: 89ab ldrh r3, [r5, #12]
|
||
8007eee: 065b lsls r3, r3, #25
|
||
8007ef0: f53f af12 bmi.w 8007d18 <_vfiprintf_r+0x4c>
|
||
8007ef4: 9809 ldr r0, [sp, #36] ; 0x24
|
||
8007ef6: e711 b.n 8007d1c <_vfiprintf_r+0x50>
|
||
8007ef8: ab03 add r3, sp, #12
|
||
8007efa: 9300 str r3, [sp, #0]
|
||
8007efc: 462a mov r2, r5
|
||
8007efe: 4630 mov r0, r6
|
||
8007f00: 4b08 ldr r3, [pc, #32] ; (8007f24 <_vfiprintf_r+0x258>)
|
||
8007f02: a904 add r1, sp, #16
|
||
8007f04: f7fe f94a bl 800619c <_printf_i>
|
||
8007f08: e7e4 b.n 8007ed4 <_vfiprintf_r+0x208>
|
||
8007f0a: bf00 nop
|
||
8007f0c: 0800962c .word 0x0800962c
|
||
8007f10: 0800964c .word 0x0800964c
|
||
8007f14: 0800960c .word 0x0800960c
|
||
8007f18: 080094b4 .word 0x080094b4
|
||
8007f1c: 080094be .word 0x080094be
|
||
8007f20: 08005c65 .word 0x08005c65
|
||
8007f24: 08007ca9 .word 0x08007ca9
|
||
8007f28: 080094ba .word 0x080094ba
|
||
|
||
08007f2c <__swbuf_r>:
|
||
8007f2c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8007f2e: 460e mov r6, r1
|
||
8007f30: 4614 mov r4, r2
|
||
8007f32: 4605 mov r5, r0
|
||
8007f34: b118 cbz r0, 8007f3e <__swbuf_r+0x12>
|
||
8007f36: 6983 ldr r3, [r0, #24]
|
||
8007f38: b90b cbnz r3, 8007f3e <__swbuf_r+0x12>
|
||
8007f3a: f000 f9e7 bl 800830c <__sinit>
|
||
8007f3e: 4b21 ldr r3, [pc, #132] ; (8007fc4 <__swbuf_r+0x98>)
|
||
8007f40: 429c cmp r4, r3
|
||
8007f42: d12b bne.n 8007f9c <__swbuf_r+0x70>
|
||
8007f44: 686c ldr r4, [r5, #4]
|
||
8007f46: 69a3 ldr r3, [r4, #24]
|
||
8007f48: 60a3 str r3, [r4, #8]
|
||
8007f4a: 89a3 ldrh r3, [r4, #12]
|
||
8007f4c: 071a lsls r2, r3, #28
|
||
8007f4e: d52f bpl.n 8007fb0 <__swbuf_r+0x84>
|
||
8007f50: 6923 ldr r3, [r4, #16]
|
||
8007f52: b36b cbz r3, 8007fb0 <__swbuf_r+0x84>
|
||
8007f54: 6923 ldr r3, [r4, #16]
|
||
8007f56: 6820 ldr r0, [r4, #0]
|
||
8007f58: b2f6 uxtb r6, r6
|
||
8007f5a: 1ac0 subs r0, r0, r3
|
||
8007f5c: 6963 ldr r3, [r4, #20]
|
||
8007f5e: 4637 mov r7, r6
|
||
8007f60: 4283 cmp r3, r0
|
||
8007f62: dc04 bgt.n 8007f6e <__swbuf_r+0x42>
|
||
8007f64: 4621 mov r1, r4
|
||
8007f66: 4628 mov r0, r5
|
||
8007f68: f000 f93c bl 80081e4 <_fflush_r>
|
||
8007f6c: bb30 cbnz r0, 8007fbc <__swbuf_r+0x90>
|
||
8007f6e: 68a3 ldr r3, [r4, #8]
|
||
8007f70: 3001 adds r0, #1
|
||
8007f72: 3b01 subs r3, #1
|
||
8007f74: 60a3 str r3, [r4, #8]
|
||
8007f76: 6823 ldr r3, [r4, #0]
|
||
8007f78: 1c5a adds r2, r3, #1
|
||
8007f7a: 6022 str r2, [r4, #0]
|
||
8007f7c: 701e strb r6, [r3, #0]
|
||
8007f7e: 6963 ldr r3, [r4, #20]
|
||
8007f80: 4283 cmp r3, r0
|
||
8007f82: d004 beq.n 8007f8e <__swbuf_r+0x62>
|
||
8007f84: 89a3 ldrh r3, [r4, #12]
|
||
8007f86: 07db lsls r3, r3, #31
|
||
8007f88: d506 bpl.n 8007f98 <__swbuf_r+0x6c>
|
||
8007f8a: 2e0a cmp r6, #10
|
||
8007f8c: d104 bne.n 8007f98 <__swbuf_r+0x6c>
|
||
8007f8e: 4621 mov r1, r4
|
||
8007f90: 4628 mov r0, r5
|
||
8007f92: f000 f927 bl 80081e4 <_fflush_r>
|
||
8007f96: b988 cbnz r0, 8007fbc <__swbuf_r+0x90>
|
||
8007f98: 4638 mov r0, r7
|
||
8007f9a: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
8007f9c: 4b0a ldr r3, [pc, #40] ; (8007fc8 <__swbuf_r+0x9c>)
|
||
8007f9e: 429c cmp r4, r3
|
||
8007fa0: d101 bne.n 8007fa6 <__swbuf_r+0x7a>
|
||
8007fa2: 68ac ldr r4, [r5, #8]
|
||
8007fa4: e7cf b.n 8007f46 <__swbuf_r+0x1a>
|
||
8007fa6: 4b09 ldr r3, [pc, #36] ; (8007fcc <__swbuf_r+0xa0>)
|
||
8007fa8: 429c cmp r4, r3
|
||
8007faa: bf08 it eq
|
||
8007fac: 68ec ldreq r4, [r5, #12]
|
||
8007fae: e7ca b.n 8007f46 <__swbuf_r+0x1a>
|
||
8007fb0: 4621 mov r1, r4
|
||
8007fb2: 4628 mov r0, r5
|
||
8007fb4: f000 f81a bl 8007fec <__swsetup_r>
|
||
8007fb8: 2800 cmp r0, #0
|
||
8007fba: d0cb beq.n 8007f54 <__swbuf_r+0x28>
|
||
8007fbc: f04f 37ff mov.w r7, #4294967295 ; 0xffffffff
|
||
8007fc0: e7ea b.n 8007f98 <__swbuf_r+0x6c>
|
||
8007fc2: bf00 nop
|
||
8007fc4: 0800962c .word 0x0800962c
|
||
8007fc8: 0800964c .word 0x0800964c
|
||
8007fcc: 0800960c .word 0x0800960c
|
||
|
||
08007fd0 <__ascii_wctomb>:
|
||
8007fd0: 4603 mov r3, r0
|
||
8007fd2: 4608 mov r0, r1
|
||
8007fd4: b141 cbz r1, 8007fe8 <__ascii_wctomb+0x18>
|
||
8007fd6: 2aff cmp r2, #255 ; 0xff
|
||
8007fd8: d904 bls.n 8007fe4 <__ascii_wctomb+0x14>
|
||
8007fda: 228a movs r2, #138 ; 0x8a
|
||
8007fdc: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8007fe0: 601a str r2, [r3, #0]
|
||
8007fe2: 4770 bx lr
|
||
8007fe4: 2001 movs r0, #1
|
||
8007fe6: 700a strb r2, [r1, #0]
|
||
8007fe8: 4770 bx lr
|
||
...
|
||
|
||
08007fec <__swsetup_r>:
|
||
8007fec: 4b32 ldr r3, [pc, #200] ; (80080b8 <__swsetup_r+0xcc>)
|
||
8007fee: b570 push {r4, r5, r6, lr}
|
||
8007ff0: 681d ldr r5, [r3, #0]
|
||
8007ff2: 4606 mov r6, r0
|
||
8007ff4: 460c mov r4, r1
|
||
8007ff6: b125 cbz r5, 8008002 <__swsetup_r+0x16>
|
||
8007ff8: 69ab ldr r3, [r5, #24]
|
||
8007ffa: b913 cbnz r3, 8008002 <__swsetup_r+0x16>
|
||
8007ffc: 4628 mov r0, r5
|
||
8007ffe: f000 f985 bl 800830c <__sinit>
|
||
8008002: 4b2e ldr r3, [pc, #184] ; (80080bc <__swsetup_r+0xd0>)
|
||
8008004: 429c cmp r4, r3
|
||
8008006: d10f bne.n 8008028 <__swsetup_r+0x3c>
|
||
8008008: 686c ldr r4, [r5, #4]
|
||
800800a: 89a3 ldrh r3, [r4, #12]
|
||
800800c: f9b4 200c ldrsh.w r2, [r4, #12]
|
||
8008010: 0719 lsls r1, r3, #28
|
||
8008012: d42c bmi.n 800806e <__swsetup_r+0x82>
|
||
8008014: 06dd lsls r5, r3, #27
|
||
8008016: d411 bmi.n 800803c <__swsetup_r+0x50>
|
||
8008018: 2309 movs r3, #9
|
||
800801a: 6033 str r3, [r6, #0]
|
||
800801c: f042 0340 orr.w r3, r2, #64 ; 0x40
|
||
8008020: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8008024: 81a3 strh r3, [r4, #12]
|
||
8008026: e03e b.n 80080a6 <__swsetup_r+0xba>
|
||
8008028: 4b25 ldr r3, [pc, #148] ; (80080c0 <__swsetup_r+0xd4>)
|
||
800802a: 429c cmp r4, r3
|
||
800802c: d101 bne.n 8008032 <__swsetup_r+0x46>
|
||
800802e: 68ac ldr r4, [r5, #8]
|
||
8008030: e7eb b.n 800800a <__swsetup_r+0x1e>
|
||
8008032: 4b24 ldr r3, [pc, #144] ; (80080c4 <__swsetup_r+0xd8>)
|
||
8008034: 429c cmp r4, r3
|
||
8008036: bf08 it eq
|
||
8008038: 68ec ldreq r4, [r5, #12]
|
||
800803a: e7e6 b.n 800800a <__swsetup_r+0x1e>
|
||
800803c: 0758 lsls r0, r3, #29
|
||
800803e: d512 bpl.n 8008066 <__swsetup_r+0x7a>
|
||
8008040: 6b61 ldr r1, [r4, #52] ; 0x34
|
||
8008042: b141 cbz r1, 8008056 <__swsetup_r+0x6a>
|
||
8008044: f104 0344 add.w r3, r4, #68 ; 0x44
|
||
8008048: 4299 cmp r1, r3
|
||
800804a: d002 beq.n 8008052 <__swsetup_r+0x66>
|
||
800804c: 4630 mov r0, r6
|
||
800804e: f7fd fcc5 bl 80059dc <_free_r>
|
||
8008052: 2300 movs r3, #0
|
||
8008054: 6363 str r3, [r4, #52] ; 0x34
|
||
8008056: 89a3 ldrh r3, [r4, #12]
|
||
8008058: f023 0324 bic.w r3, r3, #36 ; 0x24
|
||
800805c: 81a3 strh r3, [r4, #12]
|
||
800805e: 2300 movs r3, #0
|
||
8008060: 6063 str r3, [r4, #4]
|
||
8008062: 6923 ldr r3, [r4, #16]
|
||
8008064: 6023 str r3, [r4, #0]
|
||
8008066: 89a3 ldrh r3, [r4, #12]
|
||
8008068: f043 0308 orr.w r3, r3, #8
|
||
800806c: 81a3 strh r3, [r4, #12]
|
||
800806e: 6923 ldr r3, [r4, #16]
|
||
8008070: b94b cbnz r3, 8008086 <__swsetup_r+0x9a>
|
||
8008072: 89a3 ldrh r3, [r4, #12]
|
||
8008074: f403 7320 and.w r3, r3, #640 ; 0x280
|
||
8008078: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
||
800807c: d003 beq.n 8008086 <__swsetup_r+0x9a>
|
||
800807e: 4621 mov r1, r4
|
||
8008080: 4630 mov r0, r6
|
||
8008082: f000 fa05 bl 8008490 <__smakebuf_r>
|
||
8008086: 89a0 ldrh r0, [r4, #12]
|
||
8008088: f9b4 200c ldrsh.w r2, [r4, #12]
|
||
800808c: f010 0301 ands.w r3, r0, #1
|
||
8008090: d00a beq.n 80080a8 <__swsetup_r+0xbc>
|
||
8008092: 2300 movs r3, #0
|
||
8008094: 60a3 str r3, [r4, #8]
|
||
8008096: 6963 ldr r3, [r4, #20]
|
||
8008098: 425b negs r3, r3
|
||
800809a: 61a3 str r3, [r4, #24]
|
||
800809c: 6923 ldr r3, [r4, #16]
|
||
800809e: b943 cbnz r3, 80080b2 <__swsetup_r+0xc6>
|
||
80080a0: f010 0080 ands.w r0, r0, #128 ; 0x80
|
||
80080a4: d1ba bne.n 800801c <__swsetup_r+0x30>
|
||
80080a6: bd70 pop {r4, r5, r6, pc}
|
||
80080a8: 0781 lsls r1, r0, #30
|
||
80080aa: bf58 it pl
|
||
80080ac: 6963 ldrpl r3, [r4, #20]
|
||
80080ae: 60a3 str r3, [r4, #8]
|
||
80080b0: e7f4 b.n 800809c <__swsetup_r+0xb0>
|
||
80080b2: 2000 movs r0, #0
|
||
80080b4: e7f7 b.n 80080a6 <__swsetup_r+0xba>
|
||
80080b6: bf00 nop
|
||
80080b8: 2000000c .word 0x2000000c
|
||
80080bc: 0800962c .word 0x0800962c
|
||
80080c0: 0800964c .word 0x0800964c
|
||
80080c4: 0800960c .word 0x0800960c
|
||
|
||
080080c8 <abort>:
|
||
80080c8: 2006 movs r0, #6
|
||
80080ca: b508 push {r3, lr}
|
||
80080cc: f000 fa50 bl 8008570 <raise>
|
||
80080d0: 2001 movs r0, #1
|
||
80080d2: f7f9 fab9 bl 8001648 <_exit>
|
||
...
|
||
|
||
080080d8 <__sflush_r>:
|
||
80080d8: 898a ldrh r2, [r1, #12]
|
||
80080da: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||
80080de: 4605 mov r5, r0
|
||
80080e0: 0710 lsls r0, r2, #28
|
||
80080e2: 460c mov r4, r1
|
||
80080e4: d458 bmi.n 8008198 <__sflush_r+0xc0>
|
||
80080e6: 684b ldr r3, [r1, #4]
|
||
80080e8: 2b00 cmp r3, #0
|
||
80080ea: dc05 bgt.n 80080f8 <__sflush_r+0x20>
|
||
80080ec: 6c0b ldr r3, [r1, #64] ; 0x40
|
||
80080ee: 2b00 cmp r3, #0
|
||
80080f0: dc02 bgt.n 80080f8 <__sflush_r+0x20>
|
||
80080f2: 2000 movs r0, #0
|
||
80080f4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
||
80080f8: 6ae6 ldr r6, [r4, #44] ; 0x2c
|
||
80080fa: 2e00 cmp r6, #0
|
||
80080fc: d0f9 beq.n 80080f2 <__sflush_r+0x1a>
|
||
80080fe: 2300 movs r3, #0
|
||
8008100: f412 5280 ands.w r2, r2, #4096 ; 0x1000
|
||
8008104: 682f ldr r7, [r5, #0]
|
||
8008106: 602b str r3, [r5, #0]
|
||
8008108: d032 beq.n 8008170 <__sflush_r+0x98>
|
||
800810a: 6d60 ldr r0, [r4, #84] ; 0x54
|
||
800810c: 89a3 ldrh r3, [r4, #12]
|
||
800810e: 075a lsls r2, r3, #29
|
||
8008110: d505 bpl.n 800811e <__sflush_r+0x46>
|
||
8008112: 6863 ldr r3, [r4, #4]
|
||
8008114: 1ac0 subs r0, r0, r3
|
||
8008116: 6b63 ldr r3, [r4, #52] ; 0x34
|
||
8008118: b10b cbz r3, 800811e <__sflush_r+0x46>
|
||
800811a: 6c23 ldr r3, [r4, #64] ; 0x40
|
||
800811c: 1ac0 subs r0, r0, r3
|
||
800811e: 2300 movs r3, #0
|
||
8008120: 4602 mov r2, r0
|
||
8008122: 6ae6 ldr r6, [r4, #44] ; 0x2c
|
||
8008124: 4628 mov r0, r5
|
||
8008126: 6a21 ldr r1, [r4, #32]
|
||
8008128: 47b0 blx r6
|
||
800812a: 1c43 adds r3, r0, #1
|
||
800812c: 89a3 ldrh r3, [r4, #12]
|
||
800812e: d106 bne.n 800813e <__sflush_r+0x66>
|
||
8008130: 6829 ldr r1, [r5, #0]
|
||
8008132: 291d cmp r1, #29
|
||
8008134: d82c bhi.n 8008190 <__sflush_r+0xb8>
|
||
8008136: 4a2a ldr r2, [pc, #168] ; (80081e0 <__sflush_r+0x108>)
|
||
8008138: 40ca lsrs r2, r1
|
||
800813a: 07d6 lsls r6, r2, #31
|
||
800813c: d528 bpl.n 8008190 <__sflush_r+0xb8>
|
||
800813e: 2200 movs r2, #0
|
||
8008140: 6062 str r2, [r4, #4]
|
||
8008142: 6922 ldr r2, [r4, #16]
|
||
8008144: 04d9 lsls r1, r3, #19
|
||
8008146: 6022 str r2, [r4, #0]
|
||
8008148: d504 bpl.n 8008154 <__sflush_r+0x7c>
|
||
800814a: 1c42 adds r2, r0, #1
|
||
800814c: d101 bne.n 8008152 <__sflush_r+0x7a>
|
||
800814e: 682b ldr r3, [r5, #0]
|
||
8008150: b903 cbnz r3, 8008154 <__sflush_r+0x7c>
|
||
8008152: 6560 str r0, [r4, #84] ; 0x54
|
||
8008154: 6b61 ldr r1, [r4, #52] ; 0x34
|
||
8008156: 602f str r7, [r5, #0]
|
||
8008158: 2900 cmp r1, #0
|
||
800815a: d0ca beq.n 80080f2 <__sflush_r+0x1a>
|
||
800815c: f104 0344 add.w r3, r4, #68 ; 0x44
|
||
8008160: 4299 cmp r1, r3
|
||
8008162: d002 beq.n 800816a <__sflush_r+0x92>
|
||
8008164: 4628 mov r0, r5
|
||
8008166: f7fd fc39 bl 80059dc <_free_r>
|
||
800816a: 2000 movs r0, #0
|
||
800816c: 6360 str r0, [r4, #52] ; 0x34
|
||
800816e: e7c1 b.n 80080f4 <__sflush_r+0x1c>
|
||
8008170: 6a21 ldr r1, [r4, #32]
|
||
8008172: 2301 movs r3, #1
|
||
8008174: 4628 mov r0, r5
|
||
8008176: 47b0 blx r6
|
||
8008178: 1c41 adds r1, r0, #1
|
||
800817a: d1c7 bne.n 800810c <__sflush_r+0x34>
|
||
800817c: 682b ldr r3, [r5, #0]
|
||
800817e: 2b00 cmp r3, #0
|
||
8008180: d0c4 beq.n 800810c <__sflush_r+0x34>
|
||
8008182: 2b1d cmp r3, #29
|
||
8008184: d001 beq.n 800818a <__sflush_r+0xb2>
|
||
8008186: 2b16 cmp r3, #22
|
||
8008188: d101 bne.n 800818e <__sflush_r+0xb6>
|
||
800818a: 602f str r7, [r5, #0]
|
||
800818c: e7b1 b.n 80080f2 <__sflush_r+0x1a>
|
||
800818e: 89a3 ldrh r3, [r4, #12]
|
||
8008190: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8008194: 81a3 strh r3, [r4, #12]
|
||
8008196: e7ad b.n 80080f4 <__sflush_r+0x1c>
|
||
8008198: 690f ldr r7, [r1, #16]
|
||
800819a: 2f00 cmp r7, #0
|
||
800819c: d0a9 beq.n 80080f2 <__sflush_r+0x1a>
|
||
800819e: 0793 lsls r3, r2, #30
|
||
80081a0: bf18 it ne
|
||
80081a2: 2300 movne r3, #0
|
||
80081a4: 680e ldr r6, [r1, #0]
|
||
80081a6: bf08 it eq
|
||
80081a8: 694b ldreq r3, [r1, #20]
|
||
80081aa: eba6 0807 sub.w r8, r6, r7
|
||
80081ae: 600f str r7, [r1, #0]
|
||
80081b0: 608b str r3, [r1, #8]
|
||
80081b2: f1b8 0f00 cmp.w r8, #0
|
||
80081b6: dd9c ble.n 80080f2 <__sflush_r+0x1a>
|
||
80081b8: 4643 mov r3, r8
|
||
80081ba: 463a mov r2, r7
|
||
80081bc: 4628 mov r0, r5
|
||
80081be: 6a21 ldr r1, [r4, #32]
|
||
80081c0: 6aa6 ldr r6, [r4, #40] ; 0x28
|
||
80081c2: 47b0 blx r6
|
||
80081c4: 2800 cmp r0, #0
|
||
80081c6: dc06 bgt.n 80081d6 <__sflush_r+0xfe>
|
||
80081c8: 89a3 ldrh r3, [r4, #12]
|
||
80081ca: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
80081ce: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
80081d2: 81a3 strh r3, [r4, #12]
|
||
80081d4: e78e b.n 80080f4 <__sflush_r+0x1c>
|
||
80081d6: 4407 add r7, r0
|
||
80081d8: eba8 0800 sub.w r8, r8, r0
|
||
80081dc: e7e9 b.n 80081b2 <__sflush_r+0xda>
|
||
80081de: bf00 nop
|
||
80081e0: 20400001 .word 0x20400001
|
||
|
||
080081e4 <_fflush_r>:
|
||
80081e4: b538 push {r3, r4, r5, lr}
|
||
80081e6: 690b ldr r3, [r1, #16]
|
||
80081e8: 4605 mov r5, r0
|
||
80081ea: 460c mov r4, r1
|
||
80081ec: b913 cbnz r3, 80081f4 <_fflush_r+0x10>
|
||
80081ee: 2500 movs r5, #0
|
||
80081f0: 4628 mov r0, r5
|
||
80081f2: bd38 pop {r3, r4, r5, pc}
|
||
80081f4: b118 cbz r0, 80081fe <_fflush_r+0x1a>
|
||
80081f6: 6983 ldr r3, [r0, #24]
|
||
80081f8: b90b cbnz r3, 80081fe <_fflush_r+0x1a>
|
||
80081fa: f000 f887 bl 800830c <__sinit>
|
||
80081fe: 4b14 ldr r3, [pc, #80] ; (8008250 <_fflush_r+0x6c>)
|
||
8008200: 429c cmp r4, r3
|
||
8008202: d11b bne.n 800823c <_fflush_r+0x58>
|
||
8008204: 686c ldr r4, [r5, #4]
|
||
8008206: f9b4 300c ldrsh.w r3, [r4, #12]
|
||
800820a: 2b00 cmp r3, #0
|
||
800820c: d0ef beq.n 80081ee <_fflush_r+0xa>
|
||
800820e: 6e62 ldr r2, [r4, #100] ; 0x64
|
||
8008210: 07d0 lsls r0, r2, #31
|
||
8008212: d404 bmi.n 800821e <_fflush_r+0x3a>
|
||
8008214: 0599 lsls r1, r3, #22
|
||
8008216: d402 bmi.n 800821e <_fflush_r+0x3a>
|
||
8008218: 6da0 ldr r0, [r4, #88] ; 0x58
|
||
800821a: f7ff fcdc bl 8007bd6 <__retarget_lock_acquire_recursive>
|
||
800821e: 4628 mov r0, r5
|
||
8008220: 4621 mov r1, r4
|
||
8008222: f7ff ff59 bl 80080d8 <__sflush_r>
|
||
8008226: 6e63 ldr r3, [r4, #100] ; 0x64
|
||
8008228: 4605 mov r5, r0
|
||
800822a: 07da lsls r2, r3, #31
|
||
800822c: d4e0 bmi.n 80081f0 <_fflush_r+0xc>
|
||
800822e: 89a3 ldrh r3, [r4, #12]
|
||
8008230: 059b lsls r3, r3, #22
|
||
8008232: d4dd bmi.n 80081f0 <_fflush_r+0xc>
|
||
8008234: 6da0 ldr r0, [r4, #88] ; 0x58
|
||
8008236: f7ff fccf bl 8007bd8 <__retarget_lock_release_recursive>
|
||
800823a: e7d9 b.n 80081f0 <_fflush_r+0xc>
|
||
800823c: 4b05 ldr r3, [pc, #20] ; (8008254 <_fflush_r+0x70>)
|
||
800823e: 429c cmp r4, r3
|
||
8008240: d101 bne.n 8008246 <_fflush_r+0x62>
|
||
8008242: 68ac ldr r4, [r5, #8]
|
||
8008244: e7df b.n 8008206 <_fflush_r+0x22>
|
||
8008246: 4b04 ldr r3, [pc, #16] ; (8008258 <_fflush_r+0x74>)
|
||
8008248: 429c cmp r4, r3
|
||
800824a: bf08 it eq
|
||
800824c: 68ec ldreq r4, [r5, #12]
|
||
800824e: e7da b.n 8008206 <_fflush_r+0x22>
|
||
8008250: 0800962c .word 0x0800962c
|
||
8008254: 0800964c .word 0x0800964c
|
||
8008258: 0800960c .word 0x0800960c
|
||
|
||
0800825c <std>:
|
||
800825c: 2300 movs r3, #0
|
||
800825e: b510 push {r4, lr}
|
||
8008260: 4604 mov r4, r0
|
||
8008262: e9c0 3300 strd r3, r3, [r0]
|
||
8008266: e9c0 3304 strd r3, r3, [r0, #16]
|
||
800826a: 6083 str r3, [r0, #8]
|
||
800826c: 8181 strh r1, [r0, #12]
|
||
800826e: 6643 str r3, [r0, #100] ; 0x64
|
||
8008270: 81c2 strh r2, [r0, #14]
|
||
8008272: 6183 str r3, [r0, #24]
|
||
8008274: 4619 mov r1, r3
|
||
8008276: 2208 movs r2, #8
|
||
8008278: 305c adds r0, #92 ; 0x5c
|
||
800827a: f7fd fba7 bl 80059cc <memset>
|
||
800827e: 4b05 ldr r3, [pc, #20] ; (8008294 <std+0x38>)
|
||
8008280: 6224 str r4, [r4, #32]
|
||
8008282: 6263 str r3, [r4, #36] ; 0x24
|
||
8008284: 4b04 ldr r3, [pc, #16] ; (8008298 <std+0x3c>)
|
||
8008286: 62a3 str r3, [r4, #40] ; 0x28
|
||
8008288: 4b04 ldr r3, [pc, #16] ; (800829c <std+0x40>)
|
||
800828a: 62e3 str r3, [r4, #44] ; 0x2c
|
||
800828c: 4b04 ldr r3, [pc, #16] ; (80082a0 <std+0x44>)
|
||
800828e: 6323 str r3, [r4, #48] ; 0x30
|
||
8008290: bd10 pop {r4, pc}
|
||
8008292: bf00 nop
|
||
8008294: 080085a9 .word 0x080085a9
|
||
8008298: 080085cb .word 0x080085cb
|
||
800829c: 08008603 .word 0x08008603
|
||
80082a0: 08008627 .word 0x08008627
|
||
|
||
080082a4 <_cleanup_r>:
|
||
80082a4: 4901 ldr r1, [pc, #4] ; (80082ac <_cleanup_r+0x8>)
|
||
80082a6: f000 b8af b.w 8008408 <_fwalk_reent>
|
||
80082aa: bf00 nop
|
||
80082ac: 080081e5 .word 0x080081e5
|
||
|
||
080082b0 <__sfmoreglue>:
|
||
80082b0: b570 push {r4, r5, r6, lr}
|
||
80082b2: 2568 movs r5, #104 ; 0x68
|
||
80082b4: 1e4a subs r2, r1, #1
|
||
80082b6: 4355 muls r5, r2
|
||
80082b8: 460e mov r6, r1
|
||
80082ba: f105 0174 add.w r1, r5, #116 ; 0x74
|
||
80082be: f7fd fbd9 bl 8005a74 <_malloc_r>
|
||
80082c2: 4604 mov r4, r0
|
||
80082c4: b140 cbz r0, 80082d8 <__sfmoreglue+0x28>
|
||
80082c6: 2100 movs r1, #0
|
||
80082c8: e9c0 1600 strd r1, r6, [r0]
|
||
80082cc: 300c adds r0, #12
|
||
80082ce: 60a0 str r0, [r4, #8]
|
||
80082d0: f105 0268 add.w r2, r5, #104 ; 0x68
|
||
80082d4: f7fd fb7a bl 80059cc <memset>
|
||
80082d8: 4620 mov r0, r4
|
||
80082da: bd70 pop {r4, r5, r6, pc}
|
||
|
||
080082dc <__sfp_lock_acquire>:
|
||
80082dc: 4801 ldr r0, [pc, #4] ; (80082e4 <__sfp_lock_acquire+0x8>)
|
||
80082de: f7ff bc7a b.w 8007bd6 <__retarget_lock_acquire_recursive>
|
||
80082e2: bf00 nop
|
||
80082e4: 200002fc .word 0x200002fc
|
||
|
||
080082e8 <__sfp_lock_release>:
|
||
80082e8: 4801 ldr r0, [pc, #4] ; (80082f0 <__sfp_lock_release+0x8>)
|
||
80082ea: f7ff bc75 b.w 8007bd8 <__retarget_lock_release_recursive>
|
||
80082ee: bf00 nop
|
||
80082f0: 200002fc .word 0x200002fc
|
||
|
||
080082f4 <__sinit_lock_acquire>:
|
||
80082f4: 4801 ldr r0, [pc, #4] ; (80082fc <__sinit_lock_acquire+0x8>)
|
||
80082f6: f7ff bc6e b.w 8007bd6 <__retarget_lock_acquire_recursive>
|
||
80082fa: bf00 nop
|
||
80082fc: 200002f7 .word 0x200002f7
|
||
|
||
08008300 <__sinit_lock_release>:
|
||
8008300: 4801 ldr r0, [pc, #4] ; (8008308 <__sinit_lock_release+0x8>)
|
||
8008302: f7ff bc69 b.w 8007bd8 <__retarget_lock_release_recursive>
|
||
8008306: bf00 nop
|
||
8008308: 200002f7 .word 0x200002f7
|
||
|
||
0800830c <__sinit>:
|
||
800830c: b510 push {r4, lr}
|
||
800830e: 4604 mov r4, r0
|
||
8008310: f7ff fff0 bl 80082f4 <__sinit_lock_acquire>
|
||
8008314: 69a3 ldr r3, [r4, #24]
|
||
8008316: b11b cbz r3, 8008320 <__sinit+0x14>
|
||
8008318: e8bd 4010 ldmia.w sp!, {r4, lr}
|
||
800831c: f7ff bff0 b.w 8008300 <__sinit_lock_release>
|
||
8008320: e9c4 3312 strd r3, r3, [r4, #72] ; 0x48
|
||
8008324: 6523 str r3, [r4, #80] ; 0x50
|
||
8008326: 4b13 ldr r3, [pc, #76] ; (8008374 <__sinit+0x68>)
|
||
8008328: 4a13 ldr r2, [pc, #76] ; (8008378 <__sinit+0x6c>)
|
||
800832a: 681b ldr r3, [r3, #0]
|
||
800832c: 62a2 str r2, [r4, #40] ; 0x28
|
||
800832e: 42a3 cmp r3, r4
|
||
8008330: bf08 it eq
|
||
8008332: 2301 moveq r3, #1
|
||
8008334: 4620 mov r0, r4
|
||
8008336: bf08 it eq
|
||
8008338: 61a3 streq r3, [r4, #24]
|
||
800833a: f000 f81f bl 800837c <__sfp>
|
||
800833e: 6060 str r0, [r4, #4]
|
||
8008340: 4620 mov r0, r4
|
||
8008342: f000 f81b bl 800837c <__sfp>
|
||
8008346: 60a0 str r0, [r4, #8]
|
||
8008348: 4620 mov r0, r4
|
||
800834a: f000 f817 bl 800837c <__sfp>
|
||
800834e: 2200 movs r2, #0
|
||
8008350: 2104 movs r1, #4
|
||
8008352: 60e0 str r0, [r4, #12]
|
||
8008354: 6860 ldr r0, [r4, #4]
|
||
8008356: f7ff ff81 bl 800825c <std>
|
||
800835a: 2201 movs r2, #1
|
||
800835c: 2109 movs r1, #9
|
||
800835e: 68a0 ldr r0, [r4, #8]
|
||
8008360: f7ff ff7c bl 800825c <std>
|
||
8008364: 2202 movs r2, #2
|
||
8008366: 2112 movs r1, #18
|
||
8008368: 68e0 ldr r0, [r4, #12]
|
||
800836a: f7ff ff77 bl 800825c <std>
|
||
800836e: 2301 movs r3, #1
|
||
8008370: 61a3 str r3, [r4, #24]
|
||
8008372: e7d1 b.n 8008318 <__sinit+0xc>
|
||
8008374: 0800928c .word 0x0800928c
|
||
8008378: 080082a5 .word 0x080082a5
|
||
|
||
0800837c <__sfp>:
|
||
800837c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
800837e: 4607 mov r7, r0
|
||
8008380: f7ff ffac bl 80082dc <__sfp_lock_acquire>
|
||
8008384: 4b1e ldr r3, [pc, #120] ; (8008400 <__sfp+0x84>)
|
||
8008386: 681e ldr r6, [r3, #0]
|
||
8008388: 69b3 ldr r3, [r6, #24]
|
||
800838a: b913 cbnz r3, 8008392 <__sfp+0x16>
|
||
800838c: 4630 mov r0, r6
|
||
800838e: f7ff ffbd bl 800830c <__sinit>
|
||
8008392: 3648 adds r6, #72 ; 0x48
|
||
8008394: e9d6 3401 ldrd r3, r4, [r6, #4]
|
||
8008398: 3b01 subs r3, #1
|
||
800839a: d503 bpl.n 80083a4 <__sfp+0x28>
|
||
800839c: 6833 ldr r3, [r6, #0]
|
||
800839e: b30b cbz r3, 80083e4 <__sfp+0x68>
|
||
80083a0: 6836 ldr r6, [r6, #0]
|
||
80083a2: e7f7 b.n 8008394 <__sfp+0x18>
|
||
80083a4: f9b4 500c ldrsh.w r5, [r4, #12]
|
||
80083a8: b9d5 cbnz r5, 80083e0 <__sfp+0x64>
|
||
80083aa: 4b16 ldr r3, [pc, #88] ; (8008404 <__sfp+0x88>)
|
||
80083ac: f104 0058 add.w r0, r4, #88 ; 0x58
|
||
80083b0: 60e3 str r3, [r4, #12]
|
||
80083b2: 6665 str r5, [r4, #100] ; 0x64
|
||
80083b4: f7ff fc0e bl 8007bd4 <__retarget_lock_init_recursive>
|
||
80083b8: f7ff ff96 bl 80082e8 <__sfp_lock_release>
|
||
80083bc: 2208 movs r2, #8
|
||
80083be: 4629 mov r1, r5
|
||
80083c0: e9c4 5501 strd r5, r5, [r4, #4]
|
||
80083c4: e9c4 5504 strd r5, r5, [r4, #16]
|
||
80083c8: 6025 str r5, [r4, #0]
|
||
80083ca: 61a5 str r5, [r4, #24]
|
||
80083cc: f104 005c add.w r0, r4, #92 ; 0x5c
|
||
80083d0: f7fd fafc bl 80059cc <memset>
|
||
80083d4: e9c4 550d strd r5, r5, [r4, #52] ; 0x34
|
||
80083d8: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48
|
||
80083dc: 4620 mov r0, r4
|
||
80083de: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
80083e0: 3468 adds r4, #104 ; 0x68
|
||
80083e2: e7d9 b.n 8008398 <__sfp+0x1c>
|
||
80083e4: 2104 movs r1, #4
|
||
80083e6: 4638 mov r0, r7
|
||
80083e8: f7ff ff62 bl 80082b0 <__sfmoreglue>
|
||
80083ec: 4604 mov r4, r0
|
||
80083ee: 6030 str r0, [r6, #0]
|
||
80083f0: 2800 cmp r0, #0
|
||
80083f2: d1d5 bne.n 80083a0 <__sfp+0x24>
|
||
80083f4: f7ff ff78 bl 80082e8 <__sfp_lock_release>
|
||
80083f8: 230c movs r3, #12
|
||
80083fa: 603b str r3, [r7, #0]
|
||
80083fc: e7ee b.n 80083dc <__sfp+0x60>
|
||
80083fe: bf00 nop
|
||
8008400: 0800928c .word 0x0800928c
|
||
8008404: ffff0001 .word 0xffff0001
|
||
|
||
08008408 <_fwalk_reent>:
|
||
8008408: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
||
800840c: 4606 mov r6, r0
|
||
800840e: 4688 mov r8, r1
|
||
8008410: 2700 movs r7, #0
|
||
8008412: f100 0448 add.w r4, r0, #72 ; 0x48
|
||
8008416: e9d4 9501 ldrd r9, r5, [r4, #4]
|
||
800841a: f1b9 0901 subs.w r9, r9, #1
|
||
800841e: d505 bpl.n 800842c <_fwalk_reent+0x24>
|
||
8008420: 6824 ldr r4, [r4, #0]
|
||
8008422: 2c00 cmp r4, #0
|
||
8008424: d1f7 bne.n 8008416 <_fwalk_reent+0xe>
|
||
8008426: 4638 mov r0, r7
|
||
8008428: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
||
800842c: 89ab ldrh r3, [r5, #12]
|
||
800842e: 2b01 cmp r3, #1
|
||
8008430: d907 bls.n 8008442 <_fwalk_reent+0x3a>
|
||
8008432: f9b5 300e ldrsh.w r3, [r5, #14]
|
||
8008436: 3301 adds r3, #1
|
||
8008438: d003 beq.n 8008442 <_fwalk_reent+0x3a>
|
||
800843a: 4629 mov r1, r5
|
||
800843c: 4630 mov r0, r6
|
||
800843e: 47c0 blx r8
|
||
8008440: 4307 orrs r7, r0
|
||
8008442: 3568 adds r5, #104 ; 0x68
|
||
8008444: e7e9 b.n 800841a <_fwalk_reent+0x12>
|
||
|
||
08008446 <__swhatbuf_r>:
|
||
8008446: b570 push {r4, r5, r6, lr}
|
||
8008448: 460e mov r6, r1
|
||
800844a: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
800844e: 4614 mov r4, r2
|
||
8008450: 2900 cmp r1, #0
|
||
8008452: 461d mov r5, r3
|
||
8008454: b096 sub sp, #88 ; 0x58
|
||
8008456: da07 bge.n 8008468 <__swhatbuf_r+0x22>
|
||
8008458: 2300 movs r3, #0
|
||
800845a: 602b str r3, [r5, #0]
|
||
800845c: 89b3 ldrh r3, [r6, #12]
|
||
800845e: 061a lsls r2, r3, #24
|
||
8008460: d410 bmi.n 8008484 <__swhatbuf_r+0x3e>
|
||
8008462: f44f 6380 mov.w r3, #1024 ; 0x400
|
||
8008466: e00e b.n 8008486 <__swhatbuf_r+0x40>
|
||
8008468: 466a mov r2, sp
|
||
800846a: f000 f903 bl 8008674 <_fstat_r>
|
||
800846e: 2800 cmp r0, #0
|
||
8008470: dbf2 blt.n 8008458 <__swhatbuf_r+0x12>
|
||
8008472: 9a01 ldr r2, [sp, #4]
|
||
8008474: f402 4270 and.w r2, r2, #61440 ; 0xf000
|
||
8008478: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000
|
||
800847c: 425a negs r2, r3
|
||
800847e: 415a adcs r2, r3
|
||
8008480: 602a str r2, [r5, #0]
|
||
8008482: e7ee b.n 8008462 <__swhatbuf_r+0x1c>
|
||
8008484: 2340 movs r3, #64 ; 0x40
|
||
8008486: 2000 movs r0, #0
|
||
8008488: 6023 str r3, [r4, #0]
|
||
800848a: b016 add sp, #88 ; 0x58
|
||
800848c: bd70 pop {r4, r5, r6, pc}
|
||
...
|
||
|
||
08008490 <__smakebuf_r>:
|
||
8008490: 898b ldrh r3, [r1, #12]
|
||
8008492: b573 push {r0, r1, r4, r5, r6, lr}
|
||
8008494: 079d lsls r5, r3, #30
|
||
8008496: 4606 mov r6, r0
|
||
8008498: 460c mov r4, r1
|
||
800849a: d507 bpl.n 80084ac <__smakebuf_r+0x1c>
|
||
800849c: f104 0347 add.w r3, r4, #71 ; 0x47
|
||
80084a0: 6023 str r3, [r4, #0]
|
||
80084a2: 6123 str r3, [r4, #16]
|
||
80084a4: 2301 movs r3, #1
|
||
80084a6: 6163 str r3, [r4, #20]
|
||
80084a8: b002 add sp, #8
|
||
80084aa: bd70 pop {r4, r5, r6, pc}
|
||
80084ac: 466a mov r2, sp
|
||
80084ae: ab01 add r3, sp, #4
|
||
80084b0: f7ff ffc9 bl 8008446 <__swhatbuf_r>
|
||
80084b4: 9900 ldr r1, [sp, #0]
|
||
80084b6: 4605 mov r5, r0
|
||
80084b8: 4630 mov r0, r6
|
||
80084ba: f7fd fadb bl 8005a74 <_malloc_r>
|
||
80084be: b948 cbnz r0, 80084d4 <__smakebuf_r+0x44>
|
||
80084c0: f9b4 300c ldrsh.w r3, [r4, #12]
|
||
80084c4: 059a lsls r2, r3, #22
|
||
80084c6: d4ef bmi.n 80084a8 <__smakebuf_r+0x18>
|
||
80084c8: f023 0303 bic.w r3, r3, #3
|
||
80084cc: f043 0302 orr.w r3, r3, #2
|
||
80084d0: 81a3 strh r3, [r4, #12]
|
||
80084d2: e7e3 b.n 800849c <__smakebuf_r+0xc>
|
||
80084d4: 4b0d ldr r3, [pc, #52] ; (800850c <__smakebuf_r+0x7c>)
|
||
80084d6: 62b3 str r3, [r6, #40] ; 0x28
|
||
80084d8: 89a3 ldrh r3, [r4, #12]
|
||
80084da: 6020 str r0, [r4, #0]
|
||
80084dc: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
80084e0: 81a3 strh r3, [r4, #12]
|
||
80084e2: 9b00 ldr r3, [sp, #0]
|
||
80084e4: 6120 str r0, [r4, #16]
|
||
80084e6: 6163 str r3, [r4, #20]
|
||
80084e8: 9b01 ldr r3, [sp, #4]
|
||
80084ea: b15b cbz r3, 8008504 <__smakebuf_r+0x74>
|
||
80084ec: 4630 mov r0, r6
|
||
80084ee: f9b4 100e ldrsh.w r1, [r4, #14]
|
||
80084f2: f000 f8d1 bl 8008698 <_isatty_r>
|
||
80084f6: b128 cbz r0, 8008504 <__smakebuf_r+0x74>
|
||
80084f8: 89a3 ldrh r3, [r4, #12]
|
||
80084fa: f023 0303 bic.w r3, r3, #3
|
||
80084fe: f043 0301 orr.w r3, r3, #1
|
||
8008502: 81a3 strh r3, [r4, #12]
|
||
8008504: 89a0 ldrh r0, [r4, #12]
|
||
8008506: 4305 orrs r5, r0
|
||
8008508: 81a5 strh r5, [r4, #12]
|
||
800850a: e7cd b.n 80084a8 <__smakebuf_r+0x18>
|
||
800850c: 080082a5 .word 0x080082a5
|
||
|
||
08008510 <_malloc_usable_size_r>:
|
||
8008510: f851 3c04 ldr.w r3, [r1, #-4]
|
||
8008514: 1f18 subs r0, r3, #4
|
||
8008516: 2b00 cmp r3, #0
|
||
8008518: bfbc itt lt
|
||
800851a: 580b ldrlt r3, [r1, r0]
|
||
800851c: 18c0 addlt r0, r0, r3
|
||
800851e: 4770 bx lr
|
||
|
||
08008520 <_raise_r>:
|
||
8008520: 291f cmp r1, #31
|
||
8008522: b538 push {r3, r4, r5, lr}
|
||
8008524: 4604 mov r4, r0
|
||
8008526: 460d mov r5, r1
|
||
8008528: d904 bls.n 8008534 <_raise_r+0x14>
|
||
800852a: 2316 movs r3, #22
|
||
800852c: 6003 str r3, [r0, #0]
|
||
800852e: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8008532: bd38 pop {r3, r4, r5, pc}
|
||
8008534: 6c42 ldr r2, [r0, #68] ; 0x44
|
||
8008536: b112 cbz r2, 800853e <_raise_r+0x1e>
|
||
8008538: f852 3021 ldr.w r3, [r2, r1, lsl #2]
|
||
800853c: b94b cbnz r3, 8008552 <_raise_r+0x32>
|
||
800853e: 4620 mov r0, r4
|
||
8008540: f000 f830 bl 80085a4 <_getpid_r>
|
||
8008544: 462a mov r2, r5
|
||
8008546: 4601 mov r1, r0
|
||
8008548: 4620 mov r0, r4
|
||
800854a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
||
800854e: f000 b817 b.w 8008580 <_kill_r>
|
||
8008552: 2b01 cmp r3, #1
|
||
8008554: d00a beq.n 800856c <_raise_r+0x4c>
|
||
8008556: 1c59 adds r1, r3, #1
|
||
8008558: d103 bne.n 8008562 <_raise_r+0x42>
|
||
800855a: 2316 movs r3, #22
|
||
800855c: 6003 str r3, [r0, #0]
|
||
800855e: 2001 movs r0, #1
|
||
8008560: e7e7 b.n 8008532 <_raise_r+0x12>
|
||
8008562: 2400 movs r4, #0
|
||
8008564: 4628 mov r0, r5
|
||
8008566: f842 4025 str.w r4, [r2, r5, lsl #2]
|
||
800856a: 4798 blx r3
|
||
800856c: 2000 movs r0, #0
|
||
800856e: e7e0 b.n 8008532 <_raise_r+0x12>
|
||
|
||
08008570 <raise>:
|
||
8008570: 4b02 ldr r3, [pc, #8] ; (800857c <raise+0xc>)
|
||
8008572: 4601 mov r1, r0
|
||
8008574: 6818 ldr r0, [r3, #0]
|
||
8008576: f7ff bfd3 b.w 8008520 <_raise_r>
|
||
800857a: bf00 nop
|
||
800857c: 2000000c .word 0x2000000c
|
||
|
||
08008580 <_kill_r>:
|
||
8008580: b538 push {r3, r4, r5, lr}
|
||
8008582: 2300 movs r3, #0
|
||
8008584: 4d06 ldr r5, [pc, #24] ; (80085a0 <_kill_r+0x20>)
|
||
8008586: 4604 mov r4, r0
|
||
8008588: 4608 mov r0, r1
|
||
800858a: 4611 mov r1, r2
|
||
800858c: 602b str r3, [r5, #0]
|
||
800858e: f7f9 f84b bl 8001628 <_kill>
|
||
8008592: 1c43 adds r3, r0, #1
|
||
8008594: d102 bne.n 800859c <_kill_r+0x1c>
|
||
8008596: 682b ldr r3, [r5, #0]
|
||
8008598: b103 cbz r3, 800859c <_kill_r+0x1c>
|
||
800859a: 6023 str r3, [r4, #0]
|
||
800859c: bd38 pop {r3, r4, r5, pc}
|
||
800859e: bf00 nop
|
||
80085a0: 200002f0 .word 0x200002f0
|
||
|
||
080085a4 <_getpid_r>:
|
||
80085a4: f7f9 b839 b.w 800161a <_getpid>
|
||
|
||
080085a8 <__sread>:
|
||
80085a8: b510 push {r4, lr}
|
||
80085aa: 460c mov r4, r1
|
||
80085ac: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
80085b0: f000 f894 bl 80086dc <_read_r>
|
||
80085b4: 2800 cmp r0, #0
|
||
80085b6: bfab itete ge
|
||
80085b8: 6d63 ldrge r3, [r4, #84] ; 0x54
|
||
80085ba: 89a3 ldrhlt r3, [r4, #12]
|
||
80085bc: 181b addge r3, r3, r0
|
||
80085be: f423 5380 biclt.w r3, r3, #4096 ; 0x1000
|
||
80085c2: bfac ite ge
|
||
80085c4: 6563 strge r3, [r4, #84] ; 0x54
|
||
80085c6: 81a3 strhlt r3, [r4, #12]
|
||
80085c8: bd10 pop {r4, pc}
|
||
|
||
080085ca <__swrite>:
|
||
80085ca: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||
80085ce: 461f mov r7, r3
|
||
80085d0: 898b ldrh r3, [r1, #12]
|
||
80085d2: 4605 mov r5, r0
|
||
80085d4: 05db lsls r3, r3, #23
|
||
80085d6: 460c mov r4, r1
|
||
80085d8: 4616 mov r6, r2
|
||
80085da: d505 bpl.n 80085e8 <__swrite+0x1e>
|
||
80085dc: 2302 movs r3, #2
|
||
80085de: 2200 movs r2, #0
|
||
80085e0: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
80085e4: f000 f868 bl 80086b8 <_lseek_r>
|
||
80085e8: 89a3 ldrh r3, [r4, #12]
|
||
80085ea: 4632 mov r2, r6
|
||
80085ec: f423 5380 bic.w r3, r3, #4096 ; 0x1000
|
||
80085f0: 81a3 strh r3, [r4, #12]
|
||
80085f2: 4628 mov r0, r5
|
||
80085f4: 463b mov r3, r7
|
||
80085f6: f9b4 100e ldrsh.w r1, [r4, #14]
|
||
80085fa: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
|
||
80085fe: f000 b817 b.w 8008630 <_write_r>
|
||
|
||
08008602 <__sseek>:
|
||
8008602: b510 push {r4, lr}
|
||
8008604: 460c mov r4, r1
|
||
8008606: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
800860a: f000 f855 bl 80086b8 <_lseek_r>
|
||
800860e: 1c43 adds r3, r0, #1
|
||
8008610: 89a3 ldrh r3, [r4, #12]
|
||
8008612: bf15 itete ne
|
||
8008614: 6560 strne r0, [r4, #84] ; 0x54
|
||
8008616: f423 5380 biceq.w r3, r3, #4096 ; 0x1000
|
||
800861a: f443 5380 orrne.w r3, r3, #4096 ; 0x1000
|
||
800861e: 81a3 strheq r3, [r4, #12]
|
||
8008620: bf18 it ne
|
||
8008622: 81a3 strhne r3, [r4, #12]
|
||
8008624: bd10 pop {r4, pc}
|
||
|
||
08008626 <__sclose>:
|
||
8008626: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
800862a: f000 b813 b.w 8008654 <_close_r>
|
||
...
|
||
|
||
08008630 <_write_r>:
|
||
8008630: b538 push {r3, r4, r5, lr}
|
||
8008632: 4604 mov r4, r0
|
||
8008634: 4608 mov r0, r1
|
||
8008636: 4611 mov r1, r2
|
||
8008638: 2200 movs r2, #0
|
||
800863a: 4d05 ldr r5, [pc, #20] ; (8008650 <_write_r+0x20>)
|
||
800863c: 602a str r2, [r5, #0]
|
||
800863e: 461a mov r2, r3
|
||
8008640: f7f9 f829 bl 8001696 <_write>
|
||
8008644: 1c43 adds r3, r0, #1
|
||
8008646: d102 bne.n 800864e <_write_r+0x1e>
|
||
8008648: 682b ldr r3, [r5, #0]
|
||
800864a: b103 cbz r3, 800864e <_write_r+0x1e>
|
||
800864c: 6023 str r3, [r4, #0]
|
||
800864e: bd38 pop {r3, r4, r5, pc}
|
||
8008650: 200002f0 .word 0x200002f0
|
||
|
||
08008654 <_close_r>:
|
||
8008654: b538 push {r3, r4, r5, lr}
|
||
8008656: 2300 movs r3, #0
|
||
8008658: 4d05 ldr r5, [pc, #20] ; (8008670 <_close_r+0x1c>)
|
||
800865a: 4604 mov r4, r0
|
||
800865c: 4608 mov r0, r1
|
||
800865e: 602b str r3, [r5, #0]
|
||
8008660: f7f9 f835 bl 80016ce <_close>
|
||
8008664: 1c43 adds r3, r0, #1
|
||
8008666: d102 bne.n 800866e <_close_r+0x1a>
|
||
8008668: 682b ldr r3, [r5, #0]
|
||
800866a: b103 cbz r3, 800866e <_close_r+0x1a>
|
||
800866c: 6023 str r3, [r4, #0]
|
||
800866e: bd38 pop {r3, r4, r5, pc}
|
||
8008670: 200002f0 .word 0x200002f0
|
||
|
||
08008674 <_fstat_r>:
|
||
8008674: b538 push {r3, r4, r5, lr}
|
||
8008676: 2300 movs r3, #0
|
||
8008678: 4d06 ldr r5, [pc, #24] ; (8008694 <_fstat_r+0x20>)
|
||
800867a: 4604 mov r4, r0
|
||
800867c: 4608 mov r0, r1
|
||
800867e: 4611 mov r1, r2
|
||
8008680: 602b str r3, [r5, #0]
|
||
8008682: f7f9 f82f bl 80016e4 <_fstat>
|
||
8008686: 1c43 adds r3, r0, #1
|
||
8008688: d102 bne.n 8008690 <_fstat_r+0x1c>
|
||
800868a: 682b ldr r3, [r5, #0]
|
||
800868c: b103 cbz r3, 8008690 <_fstat_r+0x1c>
|
||
800868e: 6023 str r3, [r4, #0]
|
||
8008690: bd38 pop {r3, r4, r5, pc}
|
||
8008692: bf00 nop
|
||
8008694: 200002f0 .word 0x200002f0
|
||
|
||
08008698 <_isatty_r>:
|
||
8008698: b538 push {r3, r4, r5, lr}
|
||
800869a: 2300 movs r3, #0
|
||
800869c: 4d05 ldr r5, [pc, #20] ; (80086b4 <_isatty_r+0x1c>)
|
||
800869e: 4604 mov r4, r0
|
||
80086a0: 4608 mov r0, r1
|
||
80086a2: 602b str r3, [r5, #0]
|
||
80086a4: f7f9 f82d bl 8001702 <_isatty>
|
||
80086a8: 1c43 adds r3, r0, #1
|
||
80086aa: d102 bne.n 80086b2 <_isatty_r+0x1a>
|
||
80086ac: 682b ldr r3, [r5, #0]
|
||
80086ae: b103 cbz r3, 80086b2 <_isatty_r+0x1a>
|
||
80086b0: 6023 str r3, [r4, #0]
|
||
80086b2: bd38 pop {r3, r4, r5, pc}
|
||
80086b4: 200002f0 .word 0x200002f0
|
||
|
||
080086b8 <_lseek_r>:
|
||
80086b8: b538 push {r3, r4, r5, lr}
|
||
80086ba: 4604 mov r4, r0
|
||
80086bc: 4608 mov r0, r1
|
||
80086be: 4611 mov r1, r2
|
||
80086c0: 2200 movs r2, #0
|
||
80086c2: 4d05 ldr r5, [pc, #20] ; (80086d8 <_lseek_r+0x20>)
|
||
80086c4: 602a str r2, [r5, #0]
|
||
80086c6: 461a mov r2, r3
|
||
80086c8: f7f9 f825 bl 8001716 <_lseek>
|
||
80086cc: 1c43 adds r3, r0, #1
|
||
80086ce: d102 bne.n 80086d6 <_lseek_r+0x1e>
|
||
80086d0: 682b ldr r3, [r5, #0]
|
||
80086d2: b103 cbz r3, 80086d6 <_lseek_r+0x1e>
|
||
80086d4: 6023 str r3, [r4, #0]
|
||
80086d6: bd38 pop {r3, r4, r5, pc}
|
||
80086d8: 200002f0 .word 0x200002f0
|
||
|
||
080086dc <_read_r>:
|
||
80086dc: b538 push {r3, r4, r5, lr}
|
||
80086de: 4604 mov r4, r0
|
||
80086e0: 4608 mov r0, r1
|
||
80086e2: 4611 mov r1, r2
|
||
80086e4: 2200 movs r2, #0
|
||
80086e6: 4d05 ldr r5, [pc, #20] ; (80086fc <_read_r+0x20>)
|
||
80086e8: 602a str r2, [r5, #0]
|
||
80086ea: 461a mov r2, r3
|
||
80086ec: f7f8 ffb6 bl 800165c <_read>
|
||
80086f0: 1c43 adds r3, r0, #1
|
||
80086f2: d102 bne.n 80086fa <_read_r+0x1e>
|
||
80086f4: 682b ldr r3, [r5, #0]
|
||
80086f6: b103 cbz r3, 80086fa <_read_r+0x1e>
|
||
80086f8: 6023 str r3, [r4, #0]
|
||
80086fa: bd38 pop {r3, r4, r5, pc}
|
||
80086fc: 200002f0 .word 0x200002f0
|
||
|
||
08008700 <_init>:
|
||
8008700: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8008702: bf00 nop
|
||
8008704: bcf8 pop {r3, r4, r5, r6, r7}
|
||
8008706: bc08 pop {r3}
|
||
8008708: 469e mov lr, r3
|
||
800870a: 4770 bx lr
|
||
|
||
0800870c <_fini>:
|
||
800870c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
800870e: bf00 nop
|
||
8008710: bcf8 pop {r3, r4, r5, r6, r7}
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||
8008712: bc08 pop {r3}
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8008714: 469e mov lr, r3
|
||
8008716: 4770 bx lr
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