14283 lines
532 KiB
Plaintext
14283 lines
532 KiB
Plaintext
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m3s.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .isr_vector 000001e4 08000000 08000000 00010000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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1 .text 00006d90 080001e8 080001e8 000101e8 2**3
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 00000f3c 08006f78 08006f78 00016f78 2**3
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .ARM.extab 00000000 08007eb4 08007eb4 000201dc 2**0
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CONTENTS
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4 .ARM 00000000 08007eb4 08007eb4 000201dc 2**0
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CONTENTS
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5 .preinit_array 00000000 08007eb4 08007eb4 000201dc 2**0
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CONTENTS, ALLOC, LOAD, DATA
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6 .init_array 00000004 08007eb4 08007eb4 00017eb4 2**2
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CONTENTS, ALLOC, LOAD, DATA
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7 .fini_array 00000004 08007eb8 08007eb8 00017eb8 2**2
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CONTENTS, ALLOC, LOAD, DATA
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8 .data 000001dc 20000000 08007ebc 00020000 2**2
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CONTENTS, ALLOC, LOAD, DATA
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9 .bss 000000bc 200001dc 08008098 000201dc 2**2
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ALLOC
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10 ._user_heap_stack 00000600 20000298 08008098 00020298 2**0
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ALLOC
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11 .ARM.attributes 00000029 00000000 00000000 000201dc 2**0
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CONTENTS, READONLY
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12 .debug_info 00008b21 00000000 00000000 00020205 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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13 .debug_abbrev 00001f6c 00000000 00000000 00028d26 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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14 .debug_aranges 000007b8 00000000 00000000 0002ac98 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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15 .debug_ranges 000006b0 00000000 00000000 0002b450 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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16 .debug_macro 0001aa8a 00000000 00000000 0002bb00 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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17 .debug_line 0000999a 00000000 00000000 0004658a 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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18 .debug_str 00093387 00000000 00000000 0004ff24 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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19 .comment 00000053 00000000 00000000 000e32ab 2**0
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CONTENTS, READONLY
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20 .debug_frame 00002f08 00000000 00000000 000e3300 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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Disassembly of section .text:
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080001e8 <__do_global_dtors_aux>:
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80001e8: b510 push {r4, lr}
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80001ea: 4c05 ldr r4, [pc, #20] ; (8000200 <__do_global_dtors_aux+0x18>)
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80001ec: 7823 ldrb r3, [r4, #0]
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80001ee: b933 cbnz r3, 80001fe <__do_global_dtors_aux+0x16>
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80001f0: 4b04 ldr r3, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x1c>)
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80001f2: b113 cbz r3, 80001fa <__do_global_dtors_aux+0x12>
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80001f4: 4804 ldr r0, [pc, #16] ; (8000208 <__do_global_dtors_aux+0x20>)
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80001f6: f3af 8000 nop.w
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80001fa: 2301 movs r3, #1
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80001fc: 7023 strb r3, [r4, #0]
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80001fe: bd10 pop {r4, pc}
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8000200: 200001dc .word 0x200001dc
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8000204: 00000000 .word 0x00000000
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8000208: 08006f60 .word 0x08006f60
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0800020c <frame_dummy>:
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800020c: b508 push {r3, lr}
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800020e: 4b03 ldr r3, [pc, #12] ; (800021c <frame_dummy+0x10>)
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8000210: b11b cbz r3, 800021a <frame_dummy+0xe>
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8000212: 4903 ldr r1, [pc, #12] ; (8000220 <frame_dummy+0x14>)
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8000214: 4803 ldr r0, [pc, #12] ; (8000224 <frame_dummy+0x18>)
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8000216: f3af 8000 nop.w
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800021a: bd08 pop {r3, pc}
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800021c: 00000000 .word 0x00000000
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8000220: 200001e0 .word 0x200001e0
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8000224: 08006f60 .word 0x08006f60
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08000228 <strlen>:
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8000228: 4603 mov r3, r0
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800022a: f813 2b01 ldrb.w r2, [r3], #1
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800022e: 2a00 cmp r2, #0
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8000230: d1fb bne.n 800022a <strlen+0x2>
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8000232: 1a18 subs r0, r3, r0
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8000234: 3801 subs r0, #1
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8000236: 4770 bx lr
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08000238 <__aeabi_drsub>:
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8000238: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000
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800023c: e002 b.n 8000244 <__adddf3>
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800023e: bf00 nop
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08000240 <__aeabi_dsub>:
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8000240: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000
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08000244 <__adddf3>:
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8000244: b530 push {r4, r5, lr}
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8000246: ea4f 0441 mov.w r4, r1, lsl #1
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800024a: ea4f 0543 mov.w r5, r3, lsl #1
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800024e: ea94 0f05 teq r4, r5
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8000252: bf08 it eq
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8000254: ea90 0f02 teqeq r0, r2
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8000258: bf1f itttt ne
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800025a: ea54 0c00 orrsne.w ip, r4, r0
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800025e: ea55 0c02 orrsne.w ip, r5, r2
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8000262: ea7f 5c64 mvnsne.w ip, r4, asr #21
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8000266: ea7f 5c65 mvnsne.w ip, r5, asr #21
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800026a: f000 80e2 beq.w 8000432 <__adddf3+0x1ee>
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800026e: ea4f 5454 mov.w r4, r4, lsr #21
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8000272: ebd4 5555 rsbs r5, r4, r5, lsr #21
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8000276: bfb8 it lt
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8000278: 426d neglt r5, r5
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800027a: dd0c ble.n 8000296 <__adddf3+0x52>
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800027c: 442c add r4, r5
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800027e: ea80 0202 eor.w r2, r0, r2
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8000282: ea81 0303 eor.w r3, r1, r3
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8000286: ea82 0000 eor.w r0, r2, r0
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800028a: ea83 0101 eor.w r1, r3, r1
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800028e: ea80 0202 eor.w r2, r0, r2
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8000292: ea81 0303 eor.w r3, r1, r3
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8000296: 2d36 cmp r5, #54 ; 0x36
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8000298: bf88 it hi
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800029a: bd30 pophi {r4, r5, pc}
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800029c: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
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80002a0: ea4f 3101 mov.w r1, r1, lsl #12
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80002a4: f44f 1c80 mov.w ip, #1048576 ; 0x100000
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80002a8: ea4c 3111 orr.w r1, ip, r1, lsr #12
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80002ac: d002 beq.n 80002b4 <__adddf3+0x70>
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80002ae: 4240 negs r0, r0
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80002b0: eb61 0141 sbc.w r1, r1, r1, lsl #1
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80002b4: f013 4f00 tst.w r3, #2147483648 ; 0x80000000
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80002b8: ea4f 3303 mov.w r3, r3, lsl #12
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80002bc: ea4c 3313 orr.w r3, ip, r3, lsr #12
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80002c0: d002 beq.n 80002c8 <__adddf3+0x84>
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80002c2: 4252 negs r2, r2
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80002c4: eb63 0343 sbc.w r3, r3, r3, lsl #1
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80002c8: ea94 0f05 teq r4, r5
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80002cc: f000 80a7 beq.w 800041e <__adddf3+0x1da>
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80002d0: f1a4 0401 sub.w r4, r4, #1
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80002d4: f1d5 0e20 rsbs lr, r5, #32
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80002d8: db0d blt.n 80002f6 <__adddf3+0xb2>
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80002da: fa02 fc0e lsl.w ip, r2, lr
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80002de: fa22 f205 lsr.w r2, r2, r5
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80002e2: 1880 adds r0, r0, r2
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80002e4: f141 0100 adc.w r1, r1, #0
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80002e8: fa03 f20e lsl.w r2, r3, lr
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80002ec: 1880 adds r0, r0, r2
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80002ee: fa43 f305 asr.w r3, r3, r5
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80002f2: 4159 adcs r1, r3
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80002f4: e00e b.n 8000314 <__adddf3+0xd0>
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80002f6: f1a5 0520 sub.w r5, r5, #32
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80002fa: f10e 0e20 add.w lr, lr, #32
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80002fe: 2a01 cmp r2, #1
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8000300: fa03 fc0e lsl.w ip, r3, lr
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8000304: bf28 it cs
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8000306: f04c 0c02 orrcs.w ip, ip, #2
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800030a: fa43 f305 asr.w r3, r3, r5
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800030e: 18c0 adds r0, r0, r3
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8000310: eb51 71e3 adcs.w r1, r1, r3, asr #31
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8000314: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
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8000318: d507 bpl.n 800032a <__adddf3+0xe6>
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800031a: f04f 0e00 mov.w lr, #0
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800031e: f1dc 0c00 rsbs ip, ip, #0
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8000322: eb7e 0000 sbcs.w r0, lr, r0
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8000326: eb6e 0101 sbc.w r1, lr, r1
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800032a: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000
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800032e: d31b bcc.n 8000368 <__adddf3+0x124>
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8000330: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000
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8000334: d30c bcc.n 8000350 <__adddf3+0x10c>
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8000336: 0849 lsrs r1, r1, #1
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8000338: ea5f 0030 movs.w r0, r0, rrx
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800033c: ea4f 0c3c mov.w ip, ip, rrx
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8000340: f104 0401 add.w r4, r4, #1
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8000344: ea4f 5244 mov.w r2, r4, lsl #21
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8000348: f512 0f80 cmn.w r2, #4194304 ; 0x400000
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800034c: f080 809a bcs.w 8000484 <__adddf3+0x240>
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8000350: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000
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8000354: bf08 it eq
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8000356: ea5f 0c50 movseq.w ip, r0, lsr #1
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800035a: f150 0000 adcs.w r0, r0, #0
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800035e: eb41 5104 adc.w r1, r1, r4, lsl #20
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8000362: ea41 0105 orr.w r1, r1, r5
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8000366: bd30 pop {r4, r5, pc}
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8000368: ea5f 0c4c movs.w ip, ip, lsl #1
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800036c: 4140 adcs r0, r0
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800036e: eb41 0101 adc.w r1, r1, r1
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8000372: 3c01 subs r4, #1
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8000374: bf28 it cs
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8000376: f5b1 1f80 cmpcs.w r1, #1048576 ; 0x100000
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800037a: d2e9 bcs.n 8000350 <__adddf3+0x10c>
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800037c: f091 0f00 teq r1, #0
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8000380: bf04 itt eq
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8000382: 4601 moveq r1, r0
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8000384: 2000 moveq r0, #0
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8000386: fab1 f381 clz r3, r1
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800038a: bf08 it eq
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800038c: 3320 addeq r3, #32
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800038e: f1a3 030b sub.w r3, r3, #11
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8000392: f1b3 0220 subs.w r2, r3, #32
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8000396: da0c bge.n 80003b2 <__adddf3+0x16e>
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8000398: 320c adds r2, #12
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800039a: dd08 ble.n 80003ae <__adddf3+0x16a>
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800039c: f102 0c14 add.w ip, r2, #20
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80003a0: f1c2 020c rsb r2, r2, #12
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80003a4: fa01 f00c lsl.w r0, r1, ip
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80003a8: fa21 f102 lsr.w r1, r1, r2
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80003ac: e00c b.n 80003c8 <__adddf3+0x184>
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80003ae: f102 0214 add.w r2, r2, #20
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80003b2: bfd8 it le
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80003b4: f1c2 0c20 rsble ip, r2, #32
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80003b8: fa01 f102 lsl.w r1, r1, r2
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80003bc: fa20 fc0c lsr.w ip, r0, ip
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80003c0: bfdc itt le
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80003c2: ea41 010c orrle.w r1, r1, ip
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80003c6: 4090 lslle r0, r2
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80003c8: 1ae4 subs r4, r4, r3
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80003ca: bfa2 ittt ge
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80003cc: eb01 5104 addge.w r1, r1, r4, lsl #20
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80003d0: 4329 orrge r1, r5
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80003d2: bd30 popge {r4, r5, pc}
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80003d4: ea6f 0404 mvn.w r4, r4
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80003d8: 3c1f subs r4, #31
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80003da: da1c bge.n 8000416 <__adddf3+0x1d2>
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80003dc: 340c adds r4, #12
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80003de: dc0e bgt.n 80003fe <__adddf3+0x1ba>
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80003e0: f104 0414 add.w r4, r4, #20
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80003e4: f1c4 0220 rsb r2, r4, #32
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80003e8: fa20 f004 lsr.w r0, r0, r4
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80003ec: fa01 f302 lsl.w r3, r1, r2
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80003f0: ea40 0003 orr.w r0, r0, r3
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80003f4: fa21 f304 lsr.w r3, r1, r4
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80003f8: ea45 0103 orr.w r1, r5, r3
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80003fc: bd30 pop {r4, r5, pc}
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80003fe: f1c4 040c rsb r4, r4, #12
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8000402: f1c4 0220 rsb r2, r4, #32
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8000406: fa20 f002 lsr.w r0, r0, r2
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800040a: fa01 f304 lsl.w r3, r1, r4
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800040e: ea40 0003 orr.w r0, r0, r3
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8000412: 4629 mov r1, r5
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8000414: bd30 pop {r4, r5, pc}
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8000416: fa21 f004 lsr.w r0, r1, r4
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800041a: 4629 mov r1, r5
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800041c: bd30 pop {r4, r5, pc}
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800041e: f094 0f00 teq r4, #0
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8000422: f483 1380 eor.w r3, r3, #1048576 ; 0x100000
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8000426: bf06 itte eq
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8000428: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000
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800042c: 3401 addeq r4, #1
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800042e: 3d01 subne r5, #1
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8000430: e74e b.n 80002d0 <__adddf3+0x8c>
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8000432: ea7f 5c64 mvns.w ip, r4, asr #21
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8000436: bf18 it ne
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8000438: ea7f 5c65 mvnsne.w ip, r5, asr #21
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800043c: d029 beq.n 8000492 <__adddf3+0x24e>
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800043e: ea94 0f05 teq r4, r5
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8000442: bf08 it eq
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8000444: ea90 0f02 teqeq r0, r2
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8000448: d005 beq.n 8000456 <__adddf3+0x212>
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800044a: ea54 0c00 orrs.w ip, r4, r0
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800044e: bf04 itt eq
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8000450: 4619 moveq r1, r3
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8000452: 4610 moveq r0, r2
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8000454: bd30 pop {r4, r5, pc}
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8000456: ea91 0f03 teq r1, r3
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||
800045a: bf1e ittt ne
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800045c: 2100 movne r1, #0
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800045e: 2000 movne r0, #0
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8000460: bd30 popne {r4, r5, pc}
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8000462: ea5f 5c54 movs.w ip, r4, lsr #21
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||
8000466: d105 bne.n 8000474 <__adddf3+0x230>
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8000468: 0040 lsls r0, r0, #1
|
||
800046a: 4149 adcs r1, r1
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||
800046c: bf28 it cs
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||
800046e: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000
|
||
8000472: bd30 pop {r4, r5, pc}
|
||
8000474: f514 0480 adds.w r4, r4, #4194304 ; 0x400000
|
||
8000478: bf3c itt cc
|
||
800047a: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000
|
||
800047e: bd30 popcc {r4, r5, pc}
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||
8000480: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
|
||
8000484: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000
|
||
8000488: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
|
||
800048c: f04f 0000 mov.w r0, #0
|
||
8000490: bd30 pop {r4, r5, pc}
|
||
8000492: ea7f 5c64 mvns.w ip, r4, asr #21
|
||
8000496: bf1a itte ne
|
||
8000498: 4619 movne r1, r3
|
||
800049a: 4610 movne r0, r2
|
||
800049c: ea7f 5c65 mvnseq.w ip, r5, asr #21
|
||
80004a0: bf1c itt ne
|
||
80004a2: 460b movne r3, r1
|
||
80004a4: 4602 movne r2, r0
|
||
80004a6: ea50 3401 orrs.w r4, r0, r1, lsl #12
|
||
80004aa: bf06 itte eq
|
||
80004ac: ea52 3503 orrseq.w r5, r2, r3, lsl #12
|
||
80004b0: ea91 0f03 teqeq r1, r3
|
||
80004b4: f441 2100 orrne.w r1, r1, #524288 ; 0x80000
|
||
80004b8: bd30 pop {r4, r5, pc}
|
||
80004ba: bf00 nop
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||
|
||
080004bc <__aeabi_ui2d>:
|
||
80004bc: f090 0f00 teq r0, #0
|
||
80004c0: bf04 itt eq
|
||
80004c2: 2100 moveq r1, #0
|
||
80004c4: 4770 bxeq lr
|
||
80004c6: b530 push {r4, r5, lr}
|
||
80004c8: f44f 6480 mov.w r4, #1024 ; 0x400
|
||
80004cc: f104 0432 add.w r4, r4, #50 ; 0x32
|
||
80004d0: f04f 0500 mov.w r5, #0
|
||
80004d4: f04f 0100 mov.w r1, #0
|
||
80004d8: e750 b.n 800037c <__adddf3+0x138>
|
||
80004da: bf00 nop
|
||
|
||
080004dc <__aeabi_i2d>:
|
||
80004dc: f090 0f00 teq r0, #0
|
||
80004e0: bf04 itt eq
|
||
80004e2: 2100 moveq r1, #0
|
||
80004e4: 4770 bxeq lr
|
||
80004e6: b530 push {r4, r5, lr}
|
||
80004e8: f44f 6480 mov.w r4, #1024 ; 0x400
|
||
80004ec: f104 0432 add.w r4, r4, #50 ; 0x32
|
||
80004f0: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000
|
||
80004f4: bf48 it mi
|
||
80004f6: 4240 negmi r0, r0
|
||
80004f8: f04f 0100 mov.w r1, #0
|
||
80004fc: e73e b.n 800037c <__adddf3+0x138>
|
||
80004fe: bf00 nop
|
||
|
||
08000500 <__aeabi_f2d>:
|
||
8000500: 0042 lsls r2, r0, #1
|
||
8000502: ea4f 01e2 mov.w r1, r2, asr #3
|
||
8000506: ea4f 0131 mov.w r1, r1, rrx
|
||
800050a: ea4f 7002 mov.w r0, r2, lsl #28
|
||
800050e: bf1f itttt ne
|
||
8000510: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000
|
||
8000514: f093 4f7f teqne r3, #4278190080 ; 0xff000000
|
||
8000518: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000
|
||
800051c: 4770 bxne lr
|
||
800051e: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000
|
||
8000522: bf08 it eq
|
||
8000524: 4770 bxeq lr
|
||
8000526: f093 4f7f teq r3, #4278190080 ; 0xff000000
|
||
800052a: bf04 itt eq
|
||
800052c: f441 2100 orreq.w r1, r1, #524288 ; 0x80000
|
||
8000530: 4770 bxeq lr
|
||
8000532: b530 push {r4, r5, lr}
|
||
8000534: f44f 7460 mov.w r4, #896 ; 0x380
|
||
8000538: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
|
||
800053c: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
|
||
8000540: e71c b.n 800037c <__adddf3+0x138>
|
||
8000542: bf00 nop
|
||
|
||
08000544 <__aeabi_ul2d>:
|
||
8000544: ea50 0201 orrs.w r2, r0, r1
|
||
8000548: bf08 it eq
|
||
800054a: 4770 bxeq lr
|
||
800054c: b530 push {r4, r5, lr}
|
||
800054e: f04f 0500 mov.w r5, #0
|
||
8000552: e00a b.n 800056a <__aeabi_l2d+0x16>
|
||
|
||
08000554 <__aeabi_l2d>:
|
||
8000554: ea50 0201 orrs.w r2, r0, r1
|
||
8000558: bf08 it eq
|
||
800055a: 4770 bxeq lr
|
||
800055c: b530 push {r4, r5, lr}
|
||
800055e: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000
|
||
8000562: d502 bpl.n 800056a <__aeabi_l2d+0x16>
|
||
8000564: 4240 negs r0, r0
|
||
8000566: eb61 0141 sbc.w r1, r1, r1, lsl #1
|
||
800056a: f44f 6480 mov.w r4, #1024 ; 0x400
|
||
800056e: f104 0432 add.w r4, r4, #50 ; 0x32
|
||
8000572: ea5f 5c91 movs.w ip, r1, lsr #22
|
||
8000576: f43f aed8 beq.w 800032a <__adddf3+0xe6>
|
||
800057a: f04f 0203 mov.w r2, #3
|
||
800057e: ea5f 0cdc movs.w ip, ip, lsr #3
|
||
8000582: bf18 it ne
|
||
8000584: 3203 addne r2, #3
|
||
8000586: ea5f 0cdc movs.w ip, ip, lsr #3
|
||
800058a: bf18 it ne
|
||
800058c: 3203 addne r2, #3
|
||
800058e: eb02 02dc add.w r2, r2, ip, lsr #3
|
||
8000592: f1c2 0320 rsb r3, r2, #32
|
||
8000596: fa00 fc03 lsl.w ip, r0, r3
|
||
800059a: fa20 f002 lsr.w r0, r0, r2
|
||
800059e: fa01 fe03 lsl.w lr, r1, r3
|
||
80005a2: ea40 000e orr.w r0, r0, lr
|
||
80005a6: fa21 f102 lsr.w r1, r1, r2
|
||
80005aa: 4414 add r4, r2
|
||
80005ac: e6bd b.n 800032a <__adddf3+0xe6>
|
||
80005ae: bf00 nop
|
||
|
||
080005b0 <__aeabi_dmul>:
|
||
80005b0: b570 push {r4, r5, r6, lr}
|
||
80005b2: f04f 0cff mov.w ip, #255 ; 0xff
|
||
80005b6: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
|
||
80005ba: ea1c 5411 ands.w r4, ip, r1, lsr #20
|
||
80005be: bf1d ittte ne
|
||
80005c0: ea1c 5513 andsne.w r5, ip, r3, lsr #20
|
||
80005c4: ea94 0f0c teqne r4, ip
|
||
80005c8: ea95 0f0c teqne r5, ip
|
||
80005cc: f000 f8de bleq 800078c <__aeabi_dmul+0x1dc>
|
||
80005d0: 442c add r4, r5
|
||
80005d2: ea81 0603 eor.w r6, r1, r3
|
||
80005d6: ea21 514c bic.w r1, r1, ip, lsl #21
|
||
80005da: ea23 534c bic.w r3, r3, ip, lsl #21
|
||
80005de: ea50 3501 orrs.w r5, r0, r1, lsl #12
|
||
80005e2: bf18 it ne
|
||
80005e4: ea52 3503 orrsne.w r5, r2, r3, lsl #12
|
||
80005e8: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
80005ec: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
|
||
80005f0: d038 beq.n 8000664 <__aeabi_dmul+0xb4>
|
||
80005f2: fba0 ce02 umull ip, lr, r0, r2
|
||
80005f6: f04f 0500 mov.w r5, #0
|
||
80005fa: fbe1 e502 umlal lr, r5, r1, r2
|
||
80005fe: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000
|
||
8000602: fbe0 e503 umlal lr, r5, r0, r3
|
||
8000606: f04f 0600 mov.w r6, #0
|
||
800060a: fbe1 5603 umlal r5, r6, r1, r3
|
||
800060e: f09c 0f00 teq ip, #0
|
||
8000612: bf18 it ne
|
||
8000614: f04e 0e01 orrne.w lr, lr, #1
|
||
8000618: f1a4 04ff sub.w r4, r4, #255 ; 0xff
|
||
800061c: f5b6 7f00 cmp.w r6, #512 ; 0x200
|
||
8000620: f564 7440 sbc.w r4, r4, #768 ; 0x300
|
||
8000624: d204 bcs.n 8000630 <__aeabi_dmul+0x80>
|
||
8000626: ea5f 0e4e movs.w lr, lr, lsl #1
|
||
800062a: 416d adcs r5, r5
|
||
800062c: eb46 0606 adc.w r6, r6, r6
|
||
8000630: ea42 21c6 orr.w r1, r2, r6, lsl #11
|
||
8000634: ea41 5155 orr.w r1, r1, r5, lsr #21
|
||
8000638: ea4f 20c5 mov.w r0, r5, lsl #11
|
||
800063c: ea40 505e orr.w r0, r0, lr, lsr #21
|
||
8000640: ea4f 2ece mov.w lr, lr, lsl #11
|
||
8000644: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
|
||
8000648: bf88 it hi
|
||
800064a: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
|
||
800064e: d81e bhi.n 800068e <__aeabi_dmul+0xde>
|
||
8000650: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000
|
||
8000654: bf08 it eq
|
||
8000656: ea5f 0e50 movseq.w lr, r0, lsr #1
|
||
800065a: f150 0000 adcs.w r0, r0, #0
|
||
800065e: eb41 5104 adc.w r1, r1, r4, lsl #20
|
||
8000662: bd70 pop {r4, r5, r6, pc}
|
||
8000664: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000
|
||
8000668: ea46 0101 orr.w r1, r6, r1
|
||
800066c: ea40 0002 orr.w r0, r0, r2
|
||
8000670: ea81 0103 eor.w r1, r1, r3
|
||
8000674: ebb4 045c subs.w r4, r4, ip, lsr #1
|
||
8000678: bfc2 ittt gt
|
||
800067a: ebd4 050c rsbsgt r5, r4, ip
|
||
800067e: ea41 5104 orrgt.w r1, r1, r4, lsl #20
|
||
8000682: bd70 popgt {r4, r5, r6, pc}
|
||
8000684: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
8000688: f04f 0e00 mov.w lr, #0
|
||
800068c: 3c01 subs r4, #1
|
||
800068e: f300 80ab bgt.w 80007e8 <__aeabi_dmul+0x238>
|
||
8000692: f114 0f36 cmn.w r4, #54 ; 0x36
|
||
8000696: bfde ittt le
|
||
8000698: 2000 movle r0, #0
|
||
800069a: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000
|
||
800069e: bd70 pople {r4, r5, r6, pc}
|
||
80006a0: f1c4 0400 rsb r4, r4, #0
|
||
80006a4: 3c20 subs r4, #32
|
||
80006a6: da35 bge.n 8000714 <__aeabi_dmul+0x164>
|
||
80006a8: 340c adds r4, #12
|
||
80006aa: dc1b bgt.n 80006e4 <__aeabi_dmul+0x134>
|
||
80006ac: f104 0414 add.w r4, r4, #20
|
||
80006b0: f1c4 0520 rsb r5, r4, #32
|
||
80006b4: fa00 f305 lsl.w r3, r0, r5
|
||
80006b8: fa20 f004 lsr.w r0, r0, r4
|
||
80006bc: fa01 f205 lsl.w r2, r1, r5
|
||
80006c0: ea40 0002 orr.w r0, r0, r2
|
||
80006c4: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000
|
||
80006c8: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
|
||
80006cc: eb10 70d3 adds.w r0, r0, r3, lsr #31
|
||
80006d0: fa21 f604 lsr.w r6, r1, r4
|
||
80006d4: eb42 0106 adc.w r1, r2, r6
|
||
80006d8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
||
80006dc: bf08 it eq
|
||
80006de: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
||
80006e2: bd70 pop {r4, r5, r6, pc}
|
||
80006e4: f1c4 040c rsb r4, r4, #12
|
||
80006e8: f1c4 0520 rsb r5, r4, #32
|
||
80006ec: fa00 f304 lsl.w r3, r0, r4
|
||
80006f0: fa20 f005 lsr.w r0, r0, r5
|
||
80006f4: fa01 f204 lsl.w r2, r1, r4
|
||
80006f8: ea40 0002 orr.w r0, r0, r2
|
||
80006fc: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
8000700: eb10 70d3 adds.w r0, r0, r3, lsr #31
|
||
8000704: f141 0100 adc.w r1, r1, #0
|
||
8000708: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
||
800070c: bf08 it eq
|
||
800070e: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
||
8000712: bd70 pop {r4, r5, r6, pc}
|
||
8000714: f1c4 0520 rsb r5, r4, #32
|
||
8000718: fa00 f205 lsl.w r2, r0, r5
|
||
800071c: ea4e 0e02 orr.w lr, lr, r2
|
||
8000720: fa20 f304 lsr.w r3, r0, r4
|
||
8000724: fa01 f205 lsl.w r2, r1, r5
|
||
8000728: ea43 0302 orr.w r3, r3, r2
|
||
800072c: fa21 f004 lsr.w r0, r1, r4
|
||
8000730: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
8000734: fa21 f204 lsr.w r2, r1, r4
|
||
8000738: ea20 0002 bic.w r0, r0, r2
|
||
800073c: eb00 70d3 add.w r0, r0, r3, lsr #31
|
||
8000740: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
||
8000744: bf08 it eq
|
||
8000746: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
||
800074a: bd70 pop {r4, r5, r6, pc}
|
||
800074c: f094 0f00 teq r4, #0
|
||
8000750: d10f bne.n 8000772 <__aeabi_dmul+0x1c2>
|
||
8000752: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000
|
||
8000756: 0040 lsls r0, r0, #1
|
||
8000758: eb41 0101 adc.w r1, r1, r1
|
||
800075c: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
||
8000760: bf08 it eq
|
||
8000762: 3c01 subeq r4, #1
|
||
8000764: d0f7 beq.n 8000756 <__aeabi_dmul+0x1a6>
|
||
8000766: ea41 0106 orr.w r1, r1, r6
|
||
800076a: f095 0f00 teq r5, #0
|
||
800076e: bf18 it ne
|
||
8000770: 4770 bxne lr
|
||
8000772: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000
|
||
8000776: 0052 lsls r2, r2, #1
|
||
8000778: eb43 0303 adc.w r3, r3, r3
|
||
800077c: f413 1f80 tst.w r3, #1048576 ; 0x100000
|
||
8000780: bf08 it eq
|
||
8000782: 3d01 subeq r5, #1
|
||
8000784: d0f7 beq.n 8000776 <__aeabi_dmul+0x1c6>
|
||
8000786: ea43 0306 orr.w r3, r3, r6
|
||
800078a: 4770 bx lr
|
||
800078c: ea94 0f0c teq r4, ip
|
||
8000790: ea0c 5513 and.w r5, ip, r3, lsr #20
|
||
8000794: bf18 it ne
|
||
8000796: ea95 0f0c teqne r5, ip
|
||
800079a: d00c beq.n 80007b6 <__aeabi_dmul+0x206>
|
||
800079c: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
||
80007a0: bf18 it ne
|
||
80007a2: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
||
80007a6: d1d1 bne.n 800074c <__aeabi_dmul+0x19c>
|
||
80007a8: ea81 0103 eor.w r1, r1, r3
|
||
80007ac: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
80007b0: f04f 0000 mov.w r0, #0
|
||
80007b4: bd70 pop {r4, r5, r6, pc}
|
||
80007b6: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
||
80007ba: bf06 itte eq
|
||
80007bc: 4610 moveq r0, r2
|
||
80007be: 4619 moveq r1, r3
|
||
80007c0: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
||
80007c4: d019 beq.n 80007fa <__aeabi_dmul+0x24a>
|
||
80007c6: ea94 0f0c teq r4, ip
|
||
80007ca: d102 bne.n 80007d2 <__aeabi_dmul+0x222>
|
||
80007cc: ea50 3601 orrs.w r6, r0, r1, lsl #12
|
||
80007d0: d113 bne.n 80007fa <__aeabi_dmul+0x24a>
|
||
80007d2: ea95 0f0c teq r5, ip
|
||
80007d6: d105 bne.n 80007e4 <__aeabi_dmul+0x234>
|
||
80007d8: ea52 3603 orrs.w r6, r2, r3, lsl #12
|
||
80007dc: bf1c itt ne
|
||
80007de: 4610 movne r0, r2
|
||
80007e0: 4619 movne r1, r3
|
||
80007e2: d10a bne.n 80007fa <__aeabi_dmul+0x24a>
|
||
80007e4: ea81 0103 eor.w r1, r1, r3
|
||
80007e8: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
80007ec: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
|
||
80007f0: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
|
||
80007f4: f04f 0000 mov.w r0, #0
|
||
80007f8: bd70 pop {r4, r5, r6, pc}
|
||
80007fa: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
|
||
80007fe: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000
|
||
8000802: bd70 pop {r4, r5, r6, pc}
|
||
|
||
08000804 <__aeabi_ddiv>:
|
||
8000804: b570 push {r4, r5, r6, lr}
|
||
8000806: f04f 0cff mov.w ip, #255 ; 0xff
|
||
800080a: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
|
||
800080e: ea1c 5411 ands.w r4, ip, r1, lsr #20
|
||
8000812: bf1d ittte ne
|
||
8000814: ea1c 5513 andsne.w r5, ip, r3, lsr #20
|
||
8000818: ea94 0f0c teqne r4, ip
|
||
800081c: ea95 0f0c teqne r5, ip
|
||
8000820: f000 f8a7 bleq 8000972 <__aeabi_ddiv+0x16e>
|
||
8000824: eba4 0405 sub.w r4, r4, r5
|
||
8000828: ea81 0e03 eor.w lr, r1, r3
|
||
800082c: ea52 3503 orrs.w r5, r2, r3, lsl #12
|
||
8000830: ea4f 3101 mov.w r1, r1, lsl #12
|
||
8000834: f000 8088 beq.w 8000948 <__aeabi_ddiv+0x144>
|
||
8000838: ea4f 3303 mov.w r3, r3, lsl #12
|
||
800083c: f04f 5580 mov.w r5, #268435456 ; 0x10000000
|
||
8000840: ea45 1313 orr.w r3, r5, r3, lsr #4
|
||
8000844: ea43 6312 orr.w r3, r3, r2, lsr #24
|
||
8000848: ea4f 2202 mov.w r2, r2, lsl #8
|
||
800084c: ea45 1511 orr.w r5, r5, r1, lsr #4
|
||
8000850: ea45 6510 orr.w r5, r5, r0, lsr #24
|
||
8000854: ea4f 2600 mov.w r6, r0, lsl #8
|
||
8000858: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000
|
||
800085c: 429d cmp r5, r3
|
||
800085e: bf08 it eq
|
||
8000860: 4296 cmpeq r6, r2
|
||
8000862: f144 04fd adc.w r4, r4, #253 ; 0xfd
|
||
8000866: f504 7440 add.w r4, r4, #768 ; 0x300
|
||
800086a: d202 bcs.n 8000872 <__aeabi_ddiv+0x6e>
|
||
800086c: 085b lsrs r3, r3, #1
|
||
800086e: ea4f 0232 mov.w r2, r2, rrx
|
||
8000872: 1ab6 subs r6, r6, r2
|
||
8000874: eb65 0503 sbc.w r5, r5, r3
|
||
8000878: 085b lsrs r3, r3, #1
|
||
800087a: ea4f 0232 mov.w r2, r2, rrx
|
||
800087e: f44f 1080 mov.w r0, #1048576 ; 0x100000
|
||
8000882: f44f 2c00 mov.w ip, #524288 ; 0x80000
|
||
8000886: ebb6 0e02 subs.w lr, r6, r2
|
||
800088a: eb75 0e03 sbcs.w lr, r5, r3
|
||
800088e: bf22 ittt cs
|
||
8000890: 1ab6 subcs r6, r6, r2
|
||
8000892: 4675 movcs r5, lr
|
||
8000894: ea40 000c orrcs.w r0, r0, ip
|
||
8000898: 085b lsrs r3, r3, #1
|
||
800089a: ea4f 0232 mov.w r2, r2, rrx
|
||
800089e: ebb6 0e02 subs.w lr, r6, r2
|
||
80008a2: eb75 0e03 sbcs.w lr, r5, r3
|
||
80008a6: bf22 ittt cs
|
||
80008a8: 1ab6 subcs r6, r6, r2
|
||
80008aa: 4675 movcs r5, lr
|
||
80008ac: ea40 005c orrcs.w r0, r0, ip, lsr #1
|
||
80008b0: 085b lsrs r3, r3, #1
|
||
80008b2: ea4f 0232 mov.w r2, r2, rrx
|
||
80008b6: ebb6 0e02 subs.w lr, r6, r2
|
||
80008ba: eb75 0e03 sbcs.w lr, r5, r3
|
||
80008be: bf22 ittt cs
|
||
80008c0: 1ab6 subcs r6, r6, r2
|
||
80008c2: 4675 movcs r5, lr
|
||
80008c4: ea40 009c orrcs.w r0, r0, ip, lsr #2
|
||
80008c8: 085b lsrs r3, r3, #1
|
||
80008ca: ea4f 0232 mov.w r2, r2, rrx
|
||
80008ce: ebb6 0e02 subs.w lr, r6, r2
|
||
80008d2: eb75 0e03 sbcs.w lr, r5, r3
|
||
80008d6: bf22 ittt cs
|
||
80008d8: 1ab6 subcs r6, r6, r2
|
||
80008da: 4675 movcs r5, lr
|
||
80008dc: ea40 00dc orrcs.w r0, r0, ip, lsr #3
|
||
80008e0: ea55 0e06 orrs.w lr, r5, r6
|
||
80008e4: d018 beq.n 8000918 <__aeabi_ddiv+0x114>
|
||
80008e6: ea4f 1505 mov.w r5, r5, lsl #4
|
||
80008ea: ea45 7516 orr.w r5, r5, r6, lsr #28
|
||
80008ee: ea4f 1606 mov.w r6, r6, lsl #4
|
||
80008f2: ea4f 03c3 mov.w r3, r3, lsl #3
|
||
80008f6: ea43 7352 orr.w r3, r3, r2, lsr #29
|
||
80008fa: ea4f 02c2 mov.w r2, r2, lsl #3
|
||
80008fe: ea5f 1c1c movs.w ip, ip, lsr #4
|
||
8000902: d1c0 bne.n 8000886 <__aeabi_ddiv+0x82>
|
||
8000904: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
||
8000908: d10b bne.n 8000922 <__aeabi_ddiv+0x11e>
|
||
800090a: ea41 0100 orr.w r1, r1, r0
|
||
800090e: f04f 0000 mov.w r0, #0
|
||
8000912: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000
|
||
8000916: e7b6 b.n 8000886 <__aeabi_ddiv+0x82>
|
||
8000918: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
||
800091c: bf04 itt eq
|
||
800091e: 4301 orreq r1, r0
|
||
8000920: 2000 moveq r0, #0
|
||
8000922: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
|
||
8000926: bf88 it hi
|
||
8000928: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
|
||
800092c: f63f aeaf bhi.w 800068e <__aeabi_dmul+0xde>
|
||
8000930: ebb5 0c03 subs.w ip, r5, r3
|
||
8000934: bf04 itt eq
|
||
8000936: ebb6 0c02 subseq.w ip, r6, r2
|
||
800093a: ea5f 0c50 movseq.w ip, r0, lsr #1
|
||
800093e: f150 0000 adcs.w r0, r0, #0
|
||
8000942: eb41 5104 adc.w r1, r1, r4, lsl #20
|
||
8000946: bd70 pop {r4, r5, r6, pc}
|
||
8000948: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000
|
||
800094c: ea4e 3111 orr.w r1, lr, r1, lsr #12
|
||
8000950: eb14 045c adds.w r4, r4, ip, lsr #1
|
||
8000954: bfc2 ittt gt
|
||
8000956: ebd4 050c rsbsgt r5, r4, ip
|
||
800095a: ea41 5104 orrgt.w r1, r1, r4, lsl #20
|
||
800095e: bd70 popgt {r4, r5, r6, pc}
|
||
8000960: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
8000964: f04f 0e00 mov.w lr, #0
|
||
8000968: 3c01 subs r4, #1
|
||
800096a: e690 b.n 800068e <__aeabi_dmul+0xde>
|
||
800096c: ea45 0e06 orr.w lr, r5, r6
|
||
8000970: e68d b.n 800068e <__aeabi_dmul+0xde>
|
||
8000972: ea0c 5513 and.w r5, ip, r3, lsr #20
|
||
8000976: ea94 0f0c teq r4, ip
|
||
800097a: bf08 it eq
|
||
800097c: ea95 0f0c teqeq r5, ip
|
||
8000980: f43f af3b beq.w 80007fa <__aeabi_dmul+0x24a>
|
||
8000984: ea94 0f0c teq r4, ip
|
||
8000988: d10a bne.n 80009a0 <__aeabi_ddiv+0x19c>
|
||
800098a: ea50 3401 orrs.w r4, r0, r1, lsl #12
|
||
800098e: f47f af34 bne.w 80007fa <__aeabi_dmul+0x24a>
|
||
8000992: ea95 0f0c teq r5, ip
|
||
8000996: f47f af25 bne.w 80007e4 <__aeabi_dmul+0x234>
|
||
800099a: 4610 mov r0, r2
|
||
800099c: 4619 mov r1, r3
|
||
800099e: e72c b.n 80007fa <__aeabi_dmul+0x24a>
|
||
80009a0: ea95 0f0c teq r5, ip
|
||
80009a4: d106 bne.n 80009b4 <__aeabi_ddiv+0x1b0>
|
||
80009a6: ea52 3503 orrs.w r5, r2, r3, lsl #12
|
||
80009aa: f43f aefd beq.w 80007a8 <__aeabi_dmul+0x1f8>
|
||
80009ae: 4610 mov r0, r2
|
||
80009b0: 4619 mov r1, r3
|
||
80009b2: e722 b.n 80007fa <__aeabi_dmul+0x24a>
|
||
80009b4: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
||
80009b8: bf18 it ne
|
||
80009ba: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
||
80009be: f47f aec5 bne.w 800074c <__aeabi_dmul+0x19c>
|
||
80009c2: ea50 0441 orrs.w r4, r0, r1, lsl #1
|
||
80009c6: f47f af0d bne.w 80007e4 <__aeabi_dmul+0x234>
|
||
80009ca: ea52 0543 orrs.w r5, r2, r3, lsl #1
|
||
80009ce: f47f aeeb bne.w 80007a8 <__aeabi_dmul+0x1f8>
|
||
80009d2: e712 b.n 80007fa <__aeabi_dmul+0x24a>
|
||
|
||
080009d4 <__gedf2>:
|
||
80009d4: f04f 3cff mov.w ip, #4294967295 ; 0xffffffff
|
||
80009d8: e006 b.n 80009e8 <__cmpdf2+0x4>
|
||
80009da: bf00 nop
|
||
|
||
080009dc <__ledf2>:
|
||
80009dc: f04f 0c01 mov.w ip, #1
|
||
80009e0: e002 b.n 80009e8 <__cmpdf2+0x4>
|
||
80009e2: bf00 nop
|
||
|
||
080009e4 <__cmpdf2>:
|
||
80009e4: f04f 0c01 mov.w ip, #1
|
||
80009e8: f84d cd04 str.w ip, [sp, #-4]!
|
||
80009ec: ea4f 0c41 mov.w ip, r1, lsl #1
|
||
80009f0: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
80009f4: ea4f 0c43 mov.w ip, r3, lsl #1
|
||
80009f8: bf18 it ne
|
||
80009fa: ea7f 5c6c mvnsne.w ip, ip, asr #21
|
||
80009fe: d01b beq.n 8000a38 <__cmpdf2+0x54>
|
||
8000a00: b001 add sp, #4
|
||
8000a02: ea50 0c41 orrs.w ip, r0, r1, lsl #1
|
||
8000a06: bf0c ite eq
|
||
8000a08: ea52 0c43 orrseq.w ip, r2, r3, lsl #1
|
||
8000a0c: ea91 0f03 teqne r1, r3
|
||
8000a10: bf02 ittt eq
|
||
8000a12: ea90 0f02 teqeq r0, r2
|
||
8000a16: 2000 moveq r0, #0
|
||
8000a18: 4770 bxeq lr
|
||
8000a1a: f110 0f00 cmn.w r0, #0
|
||
8000a1e: ea91 0f03 teq r1, r3
|
||
8000a22: bf58 it pl
|
||
8000a24: 4299 cmppl r1, r3
|
||
8000a26: bf08 it eq
|
||
8000a28: 4290 cmpeq r0, r2
|
||
8000a2a: bf2c ite cs
|
||
8000a2c: 17d8 asrcs r0, r3, #31
|
||
8000a2e: ea6f 70e3 mvncc.w r0, r3, asr #31
|
||
8000a32: f040 0001 orr.w r0, r0, #1
|
||
8000a36: 4770 bx lr
|
||
8000a38: ea4f 0c41 mov.w ip, r1, lsl #1
|
||
8000a3c: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000a40: d102 bne.n 8000a48 <__cmpdf2+0x64>
|
||
8000a42: ea50 3c01 orrs.w ip, r0, r1, lsl #12
|
||
8000a46: d107 bne.n 8000a58 <__cmpdf2+0x74>
|
||
8000a48: ea4f 0c43 mov.w ip, r3, lsl #1
|
||
8000a4c: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000a50: d1d6 bne.n 8000a00 <__cmpdf2+0x1c>
|
||
8000a52: ea52 3c03 orrs.w ip, r2, r3, lsl #12
|
||
8000a56: d0d3 beq.n 8000a00 <__cmpdf2+0x1c>
|
||
8000a58: f85d 0b04 ldr.w r0, [sp], #4
|
||
8000a5c: 4770 bx lr
|
||
8000a5e: bf00 nop
|
||
|
||
08000a60 <__aeabi_cdrcmple>:
|
||
8000a60: 4684 mov ip, r0
|
||
8000a62: 4610 mov r0, r2
|
||
8000a64: 4662 mov r2, ip
|
||
8000a66: 468c mov ip, r1
|
||
8000a68: 4619 mov r1, r3
|
||
8000a6a: 4663 mov r3, ip
|
||
8000a6c: e000 b.n 8000a70 <__aeabi_cdcmpeq>
|
||
8000a6e: bf00 nop
|
||
|
||
08000a70 <__aeabi_cdcmpeq>:
|
||
8000a70: b501 push {r0, lr}
|
||
8000a72: f7ff ffb7 bl 80009e4 <__cmpdf2>
|
||
8000a76: 2800 cmp r0, #0
|
||
8000a78: bf48 it mi
|
||
8000a7a: f110 0f00 cmnmi.w r0, #0
|
||
8000a7e: bd01 pop {r0, pc}
|
||
|
||
08000a80 <__aeabi_dcmpeq>:
|
||
8000a80: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000a84: f7ff fff4 bl 8000a70 <__aeabi_cdcmpeq>
|
||
8000a88: bf0c ite eq
|
||
8000a8a: 2001 moveq r0, #1
|
||
8000a8c: 2000 movne r0, #0
|
||
8000a8e: f85d fb08 ldr.w pc, [sp], #8
|
||
8000a92: bf00 nop
|
||
|
||
08000a94 <__aeabi_dcmplt>:
|
||
8000a94: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000a98: f7ff ffea bl 8000a70 <__aeabi_cdcmpeq>
|
||
8000a9c: bf34 ite cc
|
||
8000a9e: 2001 movcc r0, #1
|
||
8000aa0: 2000 movcs r0, #0
|
||
8000aa2: f85d fb08 ldr.w pc, [sp], #8
|
||
8000aa6: bf00 nop
|
||
|
||
08000aa8 <__aeabi_dcmple>:
|
||
8000aa8: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000aac: f7ff ffe0 bl 8000a70 <__aeabi_cdcmpeq>
|
||
8000ab0: bf94 ite ls
|
||
8000ab2: 2001 movls r0, #1
|
||
8000ab4: 2000 movhi r0, #0
|
||
8000ab6: f85d fb08 ldr.w pc, [sp], #8
|
||
8000aba: bf00 nop
|
||
|
||
08000abc <__aeabi_dcmpge>:
|
||
8000abc: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000ac0: f7ff ffce bl 8000a60 <__aeabi_cdrcmple>
|
||
8000ac4: bf94 ite ls
|
||
8000ac6: 2001 movls r0, #1
|
||
8000ac8: 2000 movhi r0, #0
|
||
8000aca: f85d fb08 ldr.w pc, [sp], #8
|
||
8000ace: bf00 nop
|
||
|
||
08000ad0 <__aeabi_dcmpgt>:
|
||
8000ad0: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000ad4: f7ff ffc4 bl 8000a60 <__aeabi_cdrcmple>
|
||
8000ad8: bf34 ite cc
|
||
8000ada: 2001 movcc r0, #1
|
||
8000adc: 2000 movcs r0, #0
|
||
8000ade: f85d fb08 ldr.w pc, [sp], #8
|
||
8000ae2: bf00 nop
|
||
|
||
08000ae4 <__aeabi_dcmpun>:
|
||
8000ae4: ea4f 0c41 mov.w ip, r1, lsl #1
|
||
8000ae8: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000aec: d102 bne.n 8000af4 <__aeabi_dcmpun+0x10>
|
||
8000aee: ea50 3c01 orrs.w ip, r0, r1, lsl #12
|
||
8000af2: d10a bne.n 8000b0a <__aeabi_dcmpun+0x26>
|
||
8000af4: ea4f 0c43 mov.w ip, r3, lsl #1
|
||
8000af8: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000afc: d102 bne.n 8000b04 <__aeabi_dcmpun+0x20>
|
||
8000afe: ea52 3c03 orrs.w ip, r2, r3, lsl #12
|
||
8000b02: d102 bne.n 8000b0a <__aeabi_dcmpun+0x26>
|
||
8000b04: f04f 0000 mov.w r0, #0
|
||
8000b08: 4770 bx lr
|
||
8000b0a: f04f 0001 mov.w r0, #1
|
||
8000b0e: 4770 bx lr
|
||
|
||
08000b10 <__aeabi_d2iz>:
|
||
8000b10: ea4f 0241 mov.w r2, r1, lsl #1
|
||
8000b14: f512 1200 adds.w r2, r2, #2097152 ; 0x200000
|
||
8000b18: d215 bcs.n 8000b46 <__aeabi_d2iz+0x36>
|
||
8000b1a: d511 bpl.n 8000b40 <__aeabi_d2iz+0x30>
|
||
8000b1c: f46f 7378 mvn.w r3, #992 ; 0x3e0
|
||
8000b20: ebb3 5262 subs.w r2, r3, r2, asr #21
|
||
8000b24: d912 bls.n 8000b4c <__aeabi_d2iz+0x3c>
|
||
8000b26: ea4f 23c1 mov.w r3, r1, lsl #11
|
||
8000b2a: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
||
8000b2e: ea43 5350 orr.w r3, r3, r0, lsr #21
|
||
8000b32: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
|
||
8000b36: fa23 f002 lsr.w r0, r3, r2
|
||
8000b3a: bf18 it ne
|
||
8000b3c: 4240 negne r0, r0
|
||
8000b3e: 4770 bx lr
|
||
8000b40: f04f 0000 mov.w r0, #0
|
||
8000b44: 4770 bx lr
|
||
8000b46: ea50 3001 orrs.w r0, r0, r1, lsl #12
|
||
8000b4a: d105 bne.n 8000b58 <__aeabi_d2iz+0x48>
|
||
8000b4c: f011 4000 ands.w r0, r1, #2147483648 ; 0x80000000
|
||
8000b50: bf08 it eq
|
||
8000b52: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000
|
||
8000b56: 4770 bx lr
|
||
8000b58: f04f 0000 mov.w r0, #0
|
||
8000b5c: 4770 bx lr
|
||
8000b5e: bf00 nop
|
||
|
||
08000b60 <__aeabi_d2f>:
|
||
8000b60: ea4f 0241 mov.w r2, r1, lsl #1
|
||
8000b64: f1b2 43e0 subs.w r3, r2, #1879048192 ; 0x70000000
|
||
8000b68: bf24 itt cs
|
||
8000b6a: f5b3 1c00 subscs.w ip, r3, #2097152 ; 0x200000
|
||
8000b6e: f1dc 5cfe rsbscs ip, ip, #532676608 ; 0x1fc00000
|
||
8000b72: d90d bls.n 8000b90 <__aeabi_d2f+0x30>
|
||
8000b74: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
||
8000b78: ea4f 02c0 mov.w r2, r0, lsl #3
|
||
8000b7c: ea4c 7050 orr.w r0, ip, r0, lsr #29
|
||
8000b80: f1b2 4f00 cmp.w r2, #2147483648 ; 0x80000000
|
||
8000b84: eb40 0083 adc.w r0, r0, r3, lsl #2
|
||
8000b88: bf08 it eq
|
||
8000b8a: f020 0001 biceq.w r0, r0, #1
|
||
8000b8e: 4770 bx lr
|
||
8000b90: f011 4f80 tst.w r1, #1073741824 ; 0x40000000
|
||
8000b94: d121 bne.n 8000bda <__aeabi_d2f+0x7a>
|
||
8000b96: f113 7238 adds.w r2, r3, #48234496 ; 0x2e00000
|
||
8000b9a: bfbc itt lt
|
||
8000b9c: f001 4000 andlt.w r0, r1, #2147483648 ; 0x80000000
|
||
8000ba0: 4770 bxlt lr
|
||
8000ba2: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
8000ba6: ea4f 5252 mov.w r2, r2, lsr #21
|
||
8000baa: f1c2 0218 rsb r2, r2, #24
|
||
8000bae: f1c2 0c20 rsb ip, r2, #32
|
||
8000bb2: fa10 f30c lsls.w r3, r0, ip
|
||
8000bb6: fa20 f002 lsr.w r0, r0, r2
|
||
8000bba: bf18 it ne
|
||
8000bbc: f040 0001 orrne.w r0, r0, #1
|
||
8000bc0: ea4f 23c1 mov.w r3, r1, lsl #11
|
||
8000bc4: ea4f 23d3 mov.w r3, r3, lsr #11
|
||
8000bc8: fa03 fc0c lsl.w ip, r3, ip
|
||
8000bcc: ea40 000c orr.w r0, r0, ip
|
||
8000bd0: fa23 f302 lsr.w r3, r3, r2
|
||
8000bd4: ea4f 0343 mov.w r3, r3, lsl #1
|
||
8000bd8: e7cc b.n 8000b74 <__aeabi_d2f+0x14>
|
||
8000bda: ea7f 5362 mvns.w r3, r2, asr #21
|
||
8000bde: d107 bne.n 8000bf0 <__aeabi_d2f+0x90>
|
||
8000be0: ea50 3301 orrs.w r3, r0, r1, lsl #12
|
||
8000be4: bf1e ittt ne
|
||
8000be6: f04f 40fe movne.w r0, #2130706432 ; 0x7f000000
|
||
8000bea: f440 0040 orrne.w r0, r0, #12582912 ; 0xc00000
|
||
8000bee: 4770 bxne lr
|
||
8000bf0: f001 4000 and.w r0, r1, #2147483648 ; 0x80000000
|
||
8000bf4: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
||
8000bf8: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000bfc: 4770 bx lr
|
||
8000bfe: bf00 nop
|
||
|
||
08000c00 <__aeabi_frsub>:
|
||
8000c00: f080 4000 eor.w r0, r0, #2147483648 ; 0x80000000
|
||
8000c04: e002 b.n 8000c0c <__addsf3>
|
||
8000c06: bf00 nop
|
||
|
||
08000c08 <__aeabi_fsub>:
|
||
8000c08: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000
|
||
|
||
08000c0c <__addsf3>:
|
||
8000c0c: 0042 lsls r2, r0, #1
|
||
8000c0e: bf1f itttt ne
|
||
8000c10: ea5f 0341 movsne.w r3, r1, lsl #1
|
||
8000c14: ea92 0f03 teqne r2, r3
|
||
8000c18: ea7f 6c22 mvnsne.w ip, r2, asr #24
|
||
8000c1c: ea7f 6c23 mvnsne.w ip, r3, asr #24
|
||
8000c20: d06a beq.n 8000cf8 <__addsf3+0xec>
|
||
8000c22: ea4f 6212 mov.w r2, r2, lsr #24
|
||
8000c26: ebd2 6313 rsbs r3, r2, r3, lsr #24
|
||
8000c2a: bfc1 itttt gt
|
||
8000c2c: 18d2 addgt r2, r2, r3
|
||
8000c2e: 4041 eorgt r1, r0
|
||
8000c30: 4048 eorgt r0, r1
|
||
8000c32: 4041 eorgt r1, r0
|
||
8000c34: bfb8 it lt
|
||
8000c36: 425b neglt r3, r3
|
||
8000c38: 2b19 cmp r3, #25
|
||
8000c3a: bf88 it hi
|
||
8000c3c: 4770 bxhi lr
|
||
8000c3e: f010 4f00 tst.w r0, #2147483648 ; 0x80000000
|
||
8000c42: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000c46: f020 407f bic.w r0, r0, #4278190080 ; 0xff000000
|
||
8000c4a: bf18 it ne
|
||
8000c4c: 4240 negne r0, r0
|
||
8000c4e: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
|
||
8000c52: f441 0100 orr.w r1, r1, #8388608 ; 0x800000
|
||
8000c56: f021 417f bic.w r1, r1, #4278190080 ; 0xff000000
|
||
8000c5a: bf18 it ne
|
||
8000c5c: 4249 negne r1, r1
|
||
8000c5e: ea92 0f03 teq r2, r3
|
||
8000c62: d03f beq.n 8000ce4 <__addsf3+0xd8>
|
||
8000c64: f1a2 0201 sub.w r2, r2, #1
|
||
8000c68: fa41 fc03 asr.w ip, r1, r3
|
||
8000c6c: eb10 000c adds.w r0, r0, ip
|
||
8000c70: f1c3 0320 rsb r3, r3, #32
|
||
8000c74: fa01 f103 lsl.w r1, r1, r3
|
||
8000c78: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000
|
||
8000c7c: d502 bpl.n 8000c84 <__addsf3+0x78>
|
||
8000c7e: 4249 negs r1, r1
|
||
8000c80: eb60 0040 sbc.w r0, r0, r0, lsl #1
|
||
8000c84: f5b0 0f00 cmp.w r0, #8388608 ; 0x800000
|
||
8000c88: d313 bcc.n 8000cb2 <__addsf3+0xa6>
|
||
8000c8a: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000
|
||
8000c8e: d306 bcc.n 8000c9e <__addsf3+0x92>
|
||
8000c90: 0840 lsrs r0, r0, #1
|
||
8000c92: ea4f 0131 mov.w r1, r1, rrx
|
||
8000c96: f102 0201 add.w r2, r2, #1
|
||
8000c9a: 2afe cmp r2, #254 ; 0xfe
|
||
8000c9c: d251 bcs.n 8000d42 <__addsf3+0x136>
|
||
8000c9e: f1b1 4f00 cmp.w r1, #2147483648 ; 0x80000000
|
||
8000ca2: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
||
8000ca6: bf08 it eq
|
||
8000ca8: f020 0001 biceq.w r0, r0, #1
|
||
8000cac: ea40 0003 orr.w r0, r0, r3
|
||
8000cb0: 4770 bx lr
|
||
8000cb2: 0049 lsls r1, r1, #1
|
||
8000cb4: eb40 0000 adc.w r0, r0, r0
|
||
8000cb8: 3a01 subs r2, #1
|
||
8000cba: bf28 it cs
|
||
8000cbc: f5b0 0f00 cmpcs.w r0, #8388608 ; 0x800000
|
||
8000cc0: d2ed bcs.n 8000c9e <__addsf3+0x92>
|
||
8000cc2: fab0 fc80 clz ip, r0
|
||
8000cc6: f1ac 0c08 sub.w ip, ip, #8
|
||
8000cca: ebb2 020c subs.w r2, r2, ip
|
||
8000cce: fa00 f00c lsl.w r0, r0, ip
|
||
8000cd2: bfaa itet ge
|
||
8000cd4: eb00 50c2 addge.w r0, r0, r2, lsl #23
|
||
8000cd8: 4252 neglt r2, r2
|
||
8000cda: 4318 orrge r0, r3
|
||
8000cdc: bfbc itt lt
|
||
8000cde: 40d0 lsrlt r0, r2
|
||
8000ce0: 4318 orrlt r0, r3
|
||
8000ce2: 4770 bx lr
|
||
8000ce4: f092 0f00 teq r2, #0
|
||
8000ce8: f481 0100 eor.w r1, r1, #8388608 ; 0x800000
|
||
8000cec: bf06 itte eq
|
||
8000cee: f480 0000 eoreq.w r0, r0, #8388608 ; 0x800000
|
||
8000cf2: 3201 addeq r2, #1
|
||
8000cf4: 3b01 subne r3, #1
|
||
8000cf6: e7b5 b.n 8000c64 <__addsf3+0x58>
|
||
8000cf8: ea4f 0341 mov.w r3, r1, lsl #1
|
||
8000cfc: ea7f 6c22 mvns.w ip, r2, asr #24
|
||
8000d00: bf18 it ne
|
||
8000d02: ea7f 6c23 mvnsne.w ip, r3, asr #24
|
||
8000d06: d021 beq.n 8000d4c <__addsf3+0x140>
|
||
8000d08: ea92 0f03 teq r2, r3
|
||
8000d0c: d004 beq.n 8000d18 <__addsf3+0x10c>
|
||
8000d0e: f092 0f00 teq r2, #0
|
||
8000d12: bf08 it eq
|
||
8000d14: 4608 moveq r0, r1
|
||
8000d16: 4770 bx lr
|
||
8000d18: ea90 0f01 teq r0, r1
|
||
8000d1c: bf1c itt ne
|
||
8000d1e: 2000 movne r0, #0
|
||
8000d20: 4770 bxne lr
|
||
8000d22: f012 4f7f tst.w r2, #4278190080 ; 0xff000000
|
||
8000d26: d104 bne.n 8000d32 <__addsf3+0x126>
|
||
8000d28: 0040 lsls r0, r0, #1
|
||
8000d2a: bf28 it cs
|
||
8000d2c: f040 4000 orrcs.w r0, r0, #2147483648 ; 0x80000000
|
||
8000d30: 4770 bx lr
|
||
8000d32: f112 7200 adds.w r2, r2, #33554432 ; 0x2000000
|
||
8000d36: bf3c itt cc
|
||
8000d38: f500 0000 addcc.w r0, r0, #8388608 ; 0x800000
|
||
8000d3c: 4770 bxcc lr
|
||
8000d3e: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000
|
||
8000d42: f043 40fe orr.w r0, r3, #2130706432 ; 0x7f000000
|
||
8000d46: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000d4a: 4770 bx lr
|
||
8000d4c: ea7f 6222 mvns.w r2, r2, asr #24
|
||
8000d50: bf16 itet ne
|
||
8000d52: 4608 movne r0, r1
|
||
8000d54: ea7f 6323 mvnseq.w r3, r3, asr #24
|
||
8000d58: 4601 movne r1, r0
|
||
8000d5a: 0242 lsls r2, r0, #9
|
||
8000d5c: bf06 itte eq
|
||
8000d5e: ea5f 2341 movseq.w r3, r1, lsl #9
|
||
8000d62: ea90 0f01 teqeq r0, r1
|
||
8000d66: f440 0080 orrne.w r0, r0, #4194304 ; 0x400000
|
||
8000d6a: 4770 bx lr
|
||
|
||
08000d6c <__aeabi_ui2f>:
|
||
8000d6c: f04f 0300 mov.w r3, #0
|
||
8000d70: e004 b.n 8000d7c <__aeabi_i2f+0x8>
|
||
8000d72: bf00 nop
|
||
|
||
08000d74 <__aeabi_i2f>:
|
||
8000d74: f010 4300 ands.w r3, r0, #2147483648 ; 0x80000000
|
||
8000d78: bf48 it mi
|
||
8000d7a: 4240 negmi r0, r0
|
||
8000d7c: ea5f 0c00 movs.w ip, r0
|
||
8000d80: bf08 it eq
|
||
8000d82: 4770 bxeq lr
|
||
8000d84: f043 4396 orr.w r3, r3, #1258291200 ; 0x4b000000
|
||
8000d88: 4601 mov r1, r0
|
||
8000d8a: f04f 0000 mov.w r0, #0
|
||
8000d8e: e01c b.n 8000dca <__aeabi_l2f+0x2a>
|
||
|
||
08000d90 <__aeabi_ul2f>:
|
||
8000d90: ea50 0201 orrs.w r2, r0, r1
|
||
8000d94: bf08 it eq
|
||
8000d96: 4770 bxeq lr
|
||
8000d98: f04f 0300 mov.w r3, #0
|
||
8000d9c: e00a b.n 8000db4 <__aeabi_l2f+0x14>
|
||
8000d9e: bf00 nop
|
||
|
||
08000da0 <__aeabi_l2f>:
|
||
8000da0: ea50 0201 orrs.w r2, r0, r1
|
||
8000da4: bf08 it eq
|
||
8000da6: 4770 bxeq lr
|
||
8000da8: f011 4300 ands.w r3, r1, #2147483648 ; 0x80000000
|
||
8000dac: d502 bpl.n 8000db4 <__aeabi_l2f+0x14>
|
||
8000dae: 4240 negs r0, r0
|
||
8000db0: eb61 0141 sbc.w r1, r1, r1, lsl #1
|
||
8000db4: ea5f 0c01 movs.w ip, r1
|
||
8000db8: bf02 ittt eq
|
||
8000dba: 4684 moveq ip, r0
|
||
8000dbc: 4601 moveq r1, r0
|
||
8000dbe: 2000 moveq r0, #0
|
||
8000dc0: f043 43b6 orr.w r3, r3, #1526726656 ; 0x5b000000
|
||
8000dc4: bf08 it eq
|
||
8000dc6: f1a3 5380 subeq.w r3, r3, #268435456 ; 0x10000000
|
||
8000dca: f5a3 0300 sub.w r3, r3, #8388608 ; 0x800000
|
||
8000dce: fabc f28c clz r2, ip
|
||
8000dd2: 3a08 subs r2, #8
|
||
8000dd4: eba3 53c2 sub.w r3, r3, r2, lsl #23
|
||
8000dd8: db10 blt.n 8000dfc <__aeabi_l2f+0x5c>
|
||
8000dda: fa01 fc02 lsl.w ip, r1, r2
|
||
8000dde: 4463 add r3, ip
|
||
8000de0: fa00 fc02 lsl.w ip, r0, r2
|
||
8000de4: f1c2 0220 rsb r2, r2, #32
|
||
8000de8: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000
|
||
8000dec: fa20 f202 lsr.w r2, r0, r2
|
||
8000df0: eb43 0002 adc.w r0, r3, r2
|
||
8000df4: bf08 it eq
|
||
8000df6: f020 0001 biceq.w r0, r0, #1
|
||
8000dfa: 4770 bx lr
|
||
8000dfc: f102 0220 add.w r2, r2, #32
|
||
8000e00: fa01 fc02 lsl.w ip, r1, r2
|
||
8000e04: f1c2 0220 rsb r2, r2, #32
|
||
8000e08: ea50 004c orrs.w r0, r0, ip, lsl #1
|
||
8000e0c: fa21 f202 lsr.w r2, r1, r2
|
||
8000e10: eb43 0002 adc.w r0, r3, r2
|
||
8000e14: bf08 it eq
|
||
8000e16: ea20 70dc biceq.w r0, r0, ip, lsr #31
|
||
8000e1a: 4770 bx lr
|
||
|
||
08000e1c <__aeabi_fmul>:
|
||
8000e1c: f04f 0cff mov.w ip, #255 ; 0xff
|
||
8000e20: ea1c 52d0 ands.w r2, ip, r0, lsr #23
|
||
8000e24: bf1e ittt ne
|
||
8000e26: ea1c 53d1 andsne.w r3, ip, r1, lsr #23
|
||
8000e2a: ea92 0f0c teqne r2, ip
|
||
8000e2e: ea93 0f0c teqne r3, ip
|
||
8000e32: d06f beq.n 8000f14 <__aeabi_fmul+0xf8>
|
||
8000e34: 441a add r2, r3
|
||
8000e36: ea80 0c01 eor.w ip, r0, r1
|
||
8000e3a: 0240 lsls r0, r0, #9
|
||
8000e3c: bf18 it ne
|
||
8000e3e: ea5f 2141 movsne.w r1, r1, lsl #9
|
||
8000e42: d01e beq.n 8000e82 <__aeabi_fmul+0x66>
|
||
8000e44: f04f 6300 mov.w r3, #134217728 ; 0x8000000
|
||
8000e48: ea43 1050 orr.w r0, r3, r0, lsr #5
|
||
8000e4c: ea43 1151 orr.w r1, r3, r1, lsr #5
|
||
8000e50: fba0 3101 umull r3, r1, r0, r1
|
||
8000e54: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000
|
||
8000e58: f5b1 0f00 cmp.w r1, #8388608 ; 0x800000
|
||
8000e5c: bf3e ittt cc
|
||
8000e5e: 0049 lslcc r1, r1, #1
|
||
8000e60: ea41 71d3 orrcc.w r1, r1, r3, lsr #31
|
||
8000e64: 005b lslcc r3, r3, #1
|
||
8000e66: ea40 0001 orr.w r0, r0, r1
|
||
8000e6a: f162 027f sbc.w r2, r2, #127 ; 0x7f
|
||
8000e6e: 2afd cmp r2, #253 ; 0xfd
|
||
8000e70: d81d bhi.n 8000eae <__aeabi_fmul+0x92>
|
||
8000e72: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000
|
||
8000e76: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
||
8000e7a: bf08 it eq
|
||
8000e7c: f020 0001 biceq.w r0, r0, #1
|
||
8000e80: 4770 bx lr
|
||
8000e82: f090 0f00 teq r0, #0
|
||
8000e86: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000
|
||
8000e8a: bf08 it eq
|
||
8000e8c: 0249 lsleq r1, r1, #9
|
||
8000e8e: ea4c 2050 orr.w r0, ip, r0, lsr #9
|
||
8000e92: ea40 2051 orr.w r0, r0, r1, lsr #9
|
||
8000e96: 3a7f subs r2, #127 ; 0x7f
|
||
8000e98: bfc2 ittt gt
|
||
8000e9a: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff
|
||
8000e9e: ea40 50c2 orrgt.w r0, r0, r2, lsl #23
|
||
8000ea2: 4770 bxgt lr
|
||
8000ea4: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000ea8: f04f 0300 mov.w r3, #0
|
||
8000eac: 3a01 subs r2, #1
|
||
8000eae: dc5d bgt.n 8000f6c <__aeabi_fmul+0x150>
|
||
8000eb0: f112 0f19 cmn.w r2, #25
|
||
8000eb4: bfdc itt le
|
||
8000eb6: f000 4000 andle.w r0, r0, #2147483648 ; 0x80000000
|
||
8000eba: 4770 bxle lr
|
||
8000ebc: f1c2 0200 rsb r2, r2, #0
|
||
8000ec0: 0041 lsls r1, r0, #1
|
||
8000ec2: fa21 f102 lsr.w r1, r1, r2
|
||
8000ec6: f1c2 0220 rsb r2, r2, #32
|
||
8000eca: fa00 fc02 lsl.w ip, r0, r2
|
||
8000ece: ea5f 0031 movs.w r0, r1, rrx
|
||
8000ed2: f140 0000 adc.w r0, r0, #0
|
||
8000ed6: ea53 034c orrs.w r3, r3, ip, lsl #1
|
||
8000eda: bf08 it eq
|
||
8000edc: ea20 70dc biceq.w r0, r0, ip, lsr #31
|
||
8000ee0: 4770 bx lr
|
||
8000ee2: f092 0f00 teq r2, #0
|
||
8000ee6: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000
|
||
8000eea: bf02 ittt eq
|
||
8000eec: 0040 lsleq r0, r0, #1
|
||
8000eee: f410 0f00 tsteq.w r0, #8388608 ; 0x800000
|
||
8000ef2: 3a01 subeq r2, #1
|
||
8000ef4: d0f9 beq.n 8000eea <__aeabi_fmul+0xce>
|
||
8000ef6: ea40 000c orr.w r0, r0, ip
|
||
8000efa: f093 0f00 teq r3, #0
|
||
8000efe: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
||
8000f02: bf02 ittt eq
|
||
8000f04: 0049 lsleq r1, r1, #1
|
||
8000f06: f411 0f00 tsteq.w r1, #8388608 ; 0x800000
|
||
8000f0a: 3b01 subeq r3, #1
|
||
8000f0c: d0f9 beq.n 8000f02 <__aeabi_fmul+0xe6>
|
||
8000f0e: ea41 010c orr.w r1, r1, ip
|
||
8000f12: e78f b.n 8000e34 <__aeabi_fmul+0x18>
|
||
8000f14: ea0c 53d1 and.w r3, ip, r1, lsr #23
|
||
8000f18: ea92 0f0c teq r2, ip
|
||
8000f1c: bf18 it ne
|
||
8000f1e: ea93 0f0c teqne r3, ip
|
||
8000f22: d00a beq.n 8000f3a <__aeabi_fmul+0x11e>
|
||
8000f24: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000
|
||
8000f28: bf18 it ne
|
||
8000f2a: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000
|
||
8000f2e: d1d8 bne.n 8000ee2 <__aeabi_fmul+0xc6>
|
||
8000f30: ea80 0001 eor.w r0, r0, r1
|
||
8000f34: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000
|
||
8000f38: 4770 bx lr
|
||
8000f3a: f090 0f00 teq r0, #0
|
||
8000f3e: bf17 itett ne
|
||
8000f40: f090 4f00 teqne r0, #2147483648 ; 0x80000000
|
||
8000f44: 4608 moveq r0, r1
|
||
8000f46: f091 0f00 teqne r1, #0
|
||
8000f4a: f091 4f00 teqne r1, #2147483648 ; 0x80000000
|
||
8000f4e: d014 beq.n 8000f7a <__aeabi_fmul+0x15e>
|
||
8000f50: ea92 0f0c teq r2, ip
|
||
8000f54: d101 bne.n 8000f5a <__aeabi_fmul+0x13e>
|
||
8000f56: 0242 lsls r2, r0, #9
|
||
8000f58: d10f bne.n 8000f7a <__aeabi_fmul+0x15e>
|
||
8000f5a: ea93 0f0c teq r3, ip
|
||
8000f5e: d103 bne.n 8000f68 <__aeabi_fmul+0x14c>
|
||
8000f60: 024b lsls r3, r1, #9
|
||
8000f62: bf18 it ne
|
||
8000f64: 4608 movne r0, r1
|
||
8000f66: d108 bne.n 8000f7a <__aeabi_fmul+0x15e>
|
||
8000f68: ea80 0001 eor.w r0, r0, r1
|
||
8000f6c: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000
|
||
8000f70: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
||
8000f74: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000f78: 4770 bx lr
|
||
8000f7a: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
||
8000f7e: f440 0040 orr.w r0, r0, #12582912 ; 0xc00000
|
||
8000f82: 4770 bx lr
|
||
|
||
08000f84 <__aeabi_fdiv>:
|
||
8000f84: f04f 0cff mov.w ip, #255 ; 0xff
|
||
8000f88: ea1c 52d0 ands.w r2, ip, r0, lsr #23
|
||
8000f8c: bf1e ittt ne
|
||
8000f8e: ea1c 53d1 andsne.w r3, ip, r1, lsr #23
|
||
8000f92: ea92 0f0c teqne r2, ip
|
||
8000f96: ea93 0f0c teqne r3, ip
|
||
8000f9a: d069 beq.n 8001070 <__aeabi_fdiv+0xec>
|
||
8000f9c: eba2 0203 sub.w r2, r2, r3
|
||
8000fa0: ea80 0c01 eor.w ip, r0, r1
|
||
8000fa4: 0249 lsls r1, r1, #9
|
||
8000fa6: ea4f 2040 mov.w r0, r0, lsl #9
|
||
8000faa: d037 beq.n 800101c <__aeabi_fdiv+0x98>
|
||
8000fac: f04f 5380 mov.w r3, #268435456 ; 0x10000000
|
||
8000fb0: ea43 1111 orr.w r1, r3, r1, lsr #4
|
||
8000fb4: ea43 1310 orr.w r3, r3, r0, lsr #4
|
||
8000fb8: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000
|
||
8000fbc: 428b cmp r3, r1
|
||
8000fbe: bf38 it cc
|
||
8000fc0: 005b lslcc r3, r3, #1
|
||
8000fc2: f142 027d adc.w r2, r2, #125 ; 0x7d
|
||
8000fc6: f44f 0c00 mov.w ip, #8388608 ; 0x800000
|
||
8000fca: 428b cmp r3, r1
|
||
8000fcc: bf24 itt cs
|
||
8000fce: 1a5b subcs r3, r3, r1
|
||
8000fd0: ea40 000c orrcs.w r0, r0, ip
|
||
8000fd4: ebb3 0f51 cmp.w r3, r1, lsr #1
|
||
8000fd8: bf24 itt cs
|
||
8000fda: eba3 0351 subcs.w r3, r3, r1, lsr #1
|
||
8000fde: ea40 005c orrcs.w r0, r0, ip, lsr #1
|
||
8000fe2: ebb3 0f91 cmp.w r3, r1, lsr #2
|
||
8000fe6: bf24 itt cs
|
||
8000fe8: eba3 0391 subcs.w r3, r3, r1, lsr #2
|
||
8000fec: ea40 009c orrcs.w r0, r0, ip, lsr #2
|
||
8000ff0: ebb3 0fd1 cmp.w r3, r1, lsr #3
|
||
8000ff4: bf24 itt cs
|
||
8000ff6: eba3 03d1 subcs.w r3, r3, r1, lsr #3
|
||
8000ffa: ea40 00dc orrcs.w r0, r0, ip, lsr #3
|
||
8000ffe: 011b lsls r3, r3, #4
|
||
8001000: bf18 it ne
|
||
8001002: ea5f 1c1c movsne.w ip, ip, lsr #4
|
||
8001006: d1e0 bne.n 8000fca <__aeabi_fdiv+0x46>
|
||
8001008: 2afd cmp r2, #253 ; 0xfd
|
||
800100a: f63f af50 bhi.w 8000eae <__aeabi_fmul+0x92>
|
||
800100e: 428b cmp r3, r1
|
||
8001010: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
||
8001014: bf08 it eq
|
||
8001016: f020 0001 biceq.w r0, r0, #1
|
||
800101a: 4770 bx lr
|
||
800101c: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000
|
||
8001020: ea4c 2050 orr.w r0, ip, r0, lsr #9
|
||
8001024: 327f adds r2, #127 ; 0x7f
|
||
8001026: bfc2 ittt gt
|
||
8001028: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff
|
||
800102c: ea40 50c2 orrgt.w r0, r0, r2, lsl #23
|
||
8001030: 4770 bxgt lr
|
||
8001032: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8001036: f04f 0300 mov.w r3, #0
|
||
800103a: 3a01 subs r2, #1
|
||
800103c: e737 b.n 8000eae <__aeabi_fmul+0x92>
|
||
800103e: f092 0f00 teq r2, #0
|
||
8001042: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000
|
||
8001046: bf02 ittt eq
|
||
8001048: 0040 lsleq r0, r0, #1
|
||
800104a: f410 0f00 tsteq.w r0, #8388608 ; 0x800000
|
||
800104e: 3a01 subeq r2, #1
|
||
8001050: d0f9 beq.n 8001046 <__aeabi_fdiv+0xc2>
|
||
8001052: ea40 000c orr.w r0, r0, ip
|
||
8001056: f093 0f00 teq r3, #0
|
||
800105a: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
||
800105e: bf02 ittt eq
|
||
8001060: 0049 lsleq r1, r1, #1
|
||
8001062: f411 0f00 tsteq.w r1, #8388608 ; 0x800000
|
||
8001066: 3b01 subeq r3, #1
|
||
8001068: d0f9 beq.n 800105e <__aeabi_fdiv+0xda>
|
||
800106a: ea41 010c orr.w r1, r1, ip
|
||
800106e: e795 b.n 8000f9c <__aeabi_fdiv+0x18>
|
||
8001070: ea0c 53d1 and.w r3, ip, r1, lsr #23
|
||
8001074: ea92 0f0c teq r2, ip
|
||
8001078: d108 bne.n 800108c <__aeabi_fdiv+0x108>
|
||
800107a: 0242 lsls r2, r0, #9
|
||
800107c: f47f af7d bne.w 8000f7a <__aeabi_fmul+0x15e>
|
||
8001080: ea93 0f0c teq r3, ip
|
||
8001084: f47f af70 bne.w 8000f68 <__aeabi_fmul+0x14c>
|
||
8001088: 4608 mov r0, r1
|
||
800108a: e776 b.n 8000f7a <__aeabi_fmul+0x15e>
|
||
800108c: ea93 0f0c teq r3, ip
|
||
8001090: d104 bne.n 800109c <__aeabi_fdiv+0x118>
|
||
8001092: 024b lsls r3, r1, #9
|
||
8001094: f43f af4c beq.w 8000f30 <__aeabi_fmul+0x114>
|
||
8001098: 4608 mov r0, r1
|
||
800109a: e76e b.n 8000f7a <__aeabi_fmul+0x15e>
|
||
800109c: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000
|
||
80010a0: bf18 it ne
|
||
80010a2: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000
|
||
80010a6: d1ca bne.n 800103e <__aeabi_fdiv+0xba>
|
||
80010a8: f030 4200 bics.w r2, r0, #2147483648 ; 0x80000000
|
||
80010ac: f47f af5c bne.w 8000f68 <__aeabi_fmul+0x14c>
|
||
80010b0: f031 4300 bics.w r3, r1, #2147483648 ; 0x80000000
|
||
80010b4: f47f af3c bne.w 8000f30 <__aeabi_fmul+0x114>
|
||
80010b8: e75f b.n 8000f7a <__aeabi_fmul+0x15e>
|
||
80010ba: bf00 nop
|
||
|
||
080010bc <__aeabi_f2iz>:
|
||
80010bc: ea4f 0240 mov.w r2, r0, lsl #1
|
||
80010c0: f1b2 4ffe cmp.w r2, #2130706432 ; 0x7f000000
|
||
80010c4: d30f bcc.n 80010e6 <__aeabi_f2iz+0x2a>
|
||
80010c6: f04f 039e mov.w r3, #158 ; 0x9e
|
||
80010ca: ebb3 6212 subs.w r2, r3, r2, lsr #24
|
||
80010ce: d90d bls.n 80010ec <__aeabi_f2iz+0x30>
|
||
80010d0: ea4f 2300 mov.w r3, r0, lsl #8
|
||
80010d4: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
||
80010d8: f010 4f00 tst.w r0, #2147483648 ; 0x80000000
|
||
80010dc: fa23 f002 lsr.w r0, r3, r2
|
||
80010e0: bf18 it ne
|
||
80010e2: 4240 negne r0, r0
|
||
80010e4: 4770 bx lr
|
||
80010e6: f04f 0000 mov.w r0, #0
|
||
80010ea: 4770 bx lr
|
||
80010ec: f112 0f61 cmn.w r2, #97 ; 0x61
|
||
80010f0: d101 bne.n 80010f6 <__aeabi_f2iz+0x3a>
|
||
80010f2: 0242 lsls r2, r0, #9
|
||
80010f4: d105 bne.n 8001102 <__aeabi_f2iz+0x46>
|
||
80010f6: f010 4000 ands.w r0, r0, #2147483648 ; 0x80000000
|
||
80010fa: bf08 it eq
|
||
80010fc: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000
|
||
8001100: 4770 bx lr
|
||
8001102: f04f 0000 mov.w r0, #0
|
||
8001106: 4770 bx lr
|
||
|
||
08001108 <main>:
|
||
/**
|
||
* @brief The application entry point.
|
||
* @retval int
|
||
*/
|
||
int main(void)
|
||
{
|
||
8001108: b580 push {r7, lr}
|
||
800110a: af00 add r7, sp, #0
|
||
/* USER CODE END 1 */
|
||
|
||
/* MCU Configuration--------------------------------------------------------*/
|
||
|
||
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
||
HAL_Init();
|
||
800110c: f000 faf4 bl 80016f8 <HAL_Init>
|
||
/* USER CODE BEGIN Init */
|
||
|
||
/* USER CODE END Init */
|
||
|
||
/* Configure the system clock */
|
||
SystemClock_Config();
|
||
8001110: f000 f807 bl 8001122 <SystemClock_Config>
|
||
/* USER CODE BEGIN SysInit */
|
||
|
||
/* USER CODE END SysInit */
|
||
|
||
/* Initialize all configured peripherals */
|
||
MX_GPIO_Init();
|
||
8001114: f000 f84a bl 80011ac <MX_GPIO_Init>
|
||
MX_FSMC_Init();
|
||
8001118: f000 f8e0 bl 80012dc <MX_FSMC_Init>
|
||
/* USER CODE BEGIN 2 */
|
||
main_app();
|
||
800111c: f002 fe82 bl 8003e24 <main_app>
|
||
/* USER CODE END 2 */
|
||
|
||
/* Infinite loop */
|
||
/* USER CODE BEGIN WHILE */
|
||
while (1)
|
||
8001120: e7fe b.n 8001120 <main+0x18>
|
||
|
||
08001122 <SystemClock_Config>:
|
||
/**
|
||
* @brief System Clock Configuration
|
||
* @retval None
|
||
*/
|
||
void SystemClock_Config(void)
|
||
{
|
||
8001122: b580 push {r7, lr}
|
||
8001124: b090 sub sp, #64 ; 0x40
|
||
8001126: af00 add r7, sp, #0
|
||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||
8001128: f107 0318 add.w r3, r7, #24
|
||
800112c: 2228 movs r2, #40 ; 0x28
|
||
800112e: 2100 movs r1, #0
|
||
8001130: 4618 mov r0, r3
|
||
8001132: f003 f87d bl 8004230 <memset>
|
||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||
8001136: 1d3b adds r3, r7, #4
|
||
8001138: 2200 movs r2, #0
|
||
800113a: 601a str r2, [r3, #0]
|
||
800113c: 605a str r2, [r3, #4]
|
||
800113e: 609a str r2, [r3, #8]
|
||
8001140: 60da str r2, [r3, #12]
|
||
8001142: 611a str r2, [r3, #16]
|
||
|
||
/** Initializes the RCC Oscillators according to the specified parameters
|
||
* in the RCC_OscInitTypeDef structure.
|
||
*/
|
||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||
8001144: 2301 movs r3, #1
|
||
8001146: 61bb str r3, [r7, #24]
|
||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||
8001148: f44f 3380 mov.w r3, #65536 ; 0x10000
|
||
800114c: 61fb str r3, [r7, #28]
|
||
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
|
||
800114e: 2300 movs r3, #0
|
||
8001150: 623b str r3, [r7, #32]
|
||
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||
8001152: 2301 movs r3, #1
|
||
8001154: 62bb str r3, [r7, #40] ; 0x28
|
||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||
8001156: 2302 movs r3, #2
|
||
8001158: 637b str r3, [r7, #52] ; 0x34
|
||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||
800115a: f44f 3380 mov.w r3, #65536 ; 0x10000
|
||
800115e: 63bb str r3, [r7, #56] ; 0x38
|
||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
|
||
8001160: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
|
||
8001164: 63fb str r3, [r7, #60] ; 0x3c
|
||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||
8001166: f107 0318 add.w r3, r7, #24
|
||
800116a: 4618 mov r0, r3
|
||
800116c: f000 fdf2 bl 8001d54 <HAL_RCC_OscConfig>
|
||
8001170: 4603 mov r3, r0
|
||
8001172: 2b00 cmp r3, #0
|
||
8001174: d001 beq.n 800117a <SystemClock_Config+0x58>
|
||
{
|
||
Error_Handler();
|
||
8001176: f000 f915 bl 80013a4 <Error_Handler>
|
||
}
|
||
/** Initializes the CPU, AHB and APB buses clocks
|
||
*/
|
||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||
800117a: 230f movs r3, #15
|
||
800117c: 607b str r3, [r7, #4]
|
||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||
800117e: 2302 movs r3, #2
|
||
8001180: 60bb str r3, [r7, #8]
|
||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||
8001182: 2300 movs r3, #0
|
||
8001184: 60fb str r3, [r7, #12]
|
||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
||
8001186: f44f 6380 mov.w r3, #1024 ; 0x400
|
||
800118a: 613b str r3, [r7, #16]
|
||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||
800118c: 2300 movs r3, #0
|
||
800118e: 617b str r3, [r7, #20]
|
||
|
||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
|
||
8001190: 1d3b adds r3, r7, #4
|
||
8001192: 2102 movs r1, #2
|
||
8001194: 4618 mov r0, r3
|
||
8001196: f001 f85d bl 8002254 <HAL_RCC_ClockConfig>
|
||
800119a: 4603 mov r3, r0
|
||
800119c: 2b00 cmp r3, #0
|
||
800119e: d001 beq.n 80011a4 <SystemClock_Config+0x82>
|
||
{
|
||
Error_Handler();
|
||
80011a0: f000 f900 bl 80013a4 <Error_Handler>
|
||
}
|
||
}
|
||
80011a4: bf00 nop
|
||
80011a6: 3740 adds r7, #64 ; 0x40
|
||
80011a8: 46bd mov sp, r7
|
||
80011aa: bd80 pop {r7, pc}
|
||
|
||
080011ac <MX_GPIO_Init>:
|
||
* @brief GPIO Initialization Function
|
||
* @param None
|
||
* @retval None
|
||
*/
|
||
static void MX_GPIO_Init(void)
|
||
{
|
||
80011ac: b580 push {r7, lr}
|
||
80011ae: b08a sub sp, #40 ; 0x28
|
||
80011b0: af00 add r7, sp, #0
|
||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||
80011b2: f107 0318 add.w r3, r7, #24
|
||
80011b6: 2200 movs r2, #0
|
||
80011b8: 601a str r2, [r3, #0]
|
||
80011ba: 605a str r2, [r3, #4]
|
||
80011bc: 609a str r2, [r3, #8]
|
||
80011be: 60da str r2, [r3, #12]
|
||
|
||
/* GPIO Ports Clock Enable */
|
||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||
80011c0: 4b43 ldr r3, [pc, #268] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
80011c2: 699b ldr r3, [r3, #24]
|
||
80011c4: 4a42 ldr r2, [pc, #264] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
80011c6: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
80011ca: 6193 str r3, [r2, #24]
|
||
80011cc: 4b40 ldr r3, [pc, #256] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
80011ce: 699b ldr r3, [r3, #24]
|
||
80011d0: f003 0380 and.w r3, r3, #128 ; 0x80
|
||
80011d4: 617b str r3, [r7, #20]
|
||
80011d6: 697b ldr r3, [r7, #20]
|
||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||
80011d8: 4b3d ldr r3, [pc, #244] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
80011da: 699b ldr r3, [r3, #24]
|
||
80011dc: 4a3c ldr r2, [pc, #240] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
80011de: f043 0308 orr.w r3, r3, #8
|
||
80011e2: 6193 str r3, [r2, #24]
|
||
80011e4: 4b3a ldr r3, [pc, #232] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
80011e6: 699b ldr r3, [r3, #24]
|
||
80011e8: f003 0308 and.w r3, r3, #8
|
||
80011ec: 613b str r3, [r7, #16]
|
||
80011ee: 693b ldr r3, [r7, #16]
|
||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||
80011f0: 4b37 ldr r3, [pc, #220] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
80011f2: 699b ldr r3, [r3, #24]
|
||
80011f4: 4a36 ldr r2, [pc, #216] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
80011f6: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
80011fa: 6193 str r3, [r2, #24]
|
||
80011fc: 4b34 ldr r3, [pc, #208] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
80011fe: 699b ldr r3, [r3, #24]
|
||
8001200: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8001204: 60fb str r3, [r7, #12]
|
||
8001206: 68fb ldr r3, [r7, #12]
|
||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||
8001208: 4b31 ldr r3, [pc, #196] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
800120a: 699b ldr r3, [r3, #24]
|
||
800120c: 4a30 ldr r2, [pc, #192] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
800120e: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8001212: 6193 str r3, [r2, #24]
|
||
8001214: 4b2e ldr r3, [pc, #184] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
8001216: 699b ldr r3, [r3, #24]
|
||
8001218: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
800121c: 60bb str r3, [r7, #8]
|
||
800121e: 68bb ldr r3, [r7, #8]
|
||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||
8001220: 4b2b ldr r3, [pc, #172] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
8001222: 699b ldr r3, [r3, #24]
|
||
8001224: 4a2a ldr r2, [pc, #168] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
8001226: f043 0320 orr.w r3, r3, #32
|
||
800122a: 6193 str r3, [r2, #24]
|
||
800122c: 4b28 ldr r3, [pc, #160] ; (80012d0 <MX_GPIO_Init+0x124>)
|
||
800122e: 699b ldr r3, [r3, #24]
|
||
8001230: f003 0320 and.w r3, r3, #32
|
||
8001234: 607b str r3, [r7, #4]
|
||
8001236: 687b ldr r3, [r7, #4]
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(TDIN_GPIO_Port, TDIN_Pin, GPIO_PIN_SET);
|
||
8001238: 2201 movs r2, #1
|
||
800123a: f44f 7100 mov.w r1, #512 ; 0x200
|
||
800123e: 4825 ldr r0, [pc, #148] ; (80012d4 <MX_GPIO_Init+0x128>)
|
||
8001240: f000 fd6f bl 8001d22 <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(LCD_BL_GPIO_Port, LCD_BL_Pin, GPIO_PIN_RESET);
|
||
8001244: 2200 movs r2, #0
|
||
8001246: 2101 movs r1, #1
|
||
8001248: 4823 ldr r0, [pc, #140] ; (80012d8 <MX_GPIO_Init+0x12c>)
|
||
800124a: f000 fd6a bl 8001d22 <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(GPIOB, TCLK_Pin|TCS_Pin, GPIO_PIN_SET);
|
||
800124e: 2201 movs r2, #1
|
||
8001250: 2106 movs r1, #6
|
||
8001252: 4821 ldr r0, [pc, #132] ; (80012d8 <MX_GPIO_Init+0x12c>)
|
||
8001254: f000 fd65 bl 8001d22 <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pins : TDOUT_Pin TPEN_Pin */
|
||
GPIO_InitStruct.Pin = TDOUT_Pin|TPEN_Pin;
|
||
8001258: f44f 63a0 mov.w r3, #1280 ; 0x500
|
||
800125c: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||
800125e: 2300 movs r3, #0
|
||
8001260: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
8001262: 2300 movs r3, #0
|
||
8001264: 623b str r3, [r7, #32]
|
||
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
|
||
8001266: f107 0318 add.w r3, r7, #24
|
||
800126a: 4619 mov r1, r3
|
||
800126c: 4819 ldr r0, [pc, #100] ; (80012d4 <MX_GPIO_Init+0x128>)
|
||
800126e: f000 fbad bl 80019cc <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : TDIN_Pin */
|
||
GPIO_InitStruct.Pin = TDIN_Pin;
|
||
8001272: f44f 7300 mov.w r3, #512 ; 0x200
|
||
8001276: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
8001278: 2301 movs r3, #1
|
||
800127a: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
800127c: 2300 movs r3, #0
|
||
800127e: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8001280: 2303 movs r3, #3
|
||
8001282: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(TDIN_GPIO_Port, &GPIO_InitStruct);
|
||
8001284: f107 0318 add.w r3, r7, #24
|
||
8001288: 4619 mov r1, r3
|
||
800128a: 4812 ldr r0, [pc, #72] ; (80012d4 <MX_GPIO_Init+0x128>)
|
||
800128c: f000 fb9e bl 80019cc <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : LCD_BL_Pin */
|
||
GPIO_InitStruct.Pin = LCD_BL_Pin;
|
||
8001290: 2301 movs r3, #1
|
||
8001292: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
8001294: 2301 movs r3, #1
|
||
8001296: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
8001298: 2300 movs r3, #0
|
||
800129a: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||
800129c: 2302 movs r3, #2
|
||
800129e: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(LCD_BL_GPIO_Port, &GPIO_InitStruct);
|
||
80012a0: f107 0318 add.w r3, r7, #24
|
||
80012a4: 4619 mov r1, r3
|
||
80012a6: 480c ldr r0, [pc, #48] ; (80012d8 <MX_GPIO_Init+0x12c>)
|
||
80012a8: f000 fb90 bl 80019cc <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pins : TCLK_Pin TCS_Pin */
|
||
GPIO_InitStruct.Pin = TCLK_Pin|TCS_Pin;
|
||
80012ac: 2306 movs r3, #6
|
||
80012ae: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
80012b0: 2301 movs r3, #1
|
||
80012b2: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
80012b4: 2300 movs r3, #0
|
||
80012b6: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
80012b8: 2303 movs r3, #3
|
||
80012ba: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
80012bc: f107 0318 add.w r3, r7, #24
|
||
80012c0: 4619 mov r1, r3
|
||
80012c2: 4805 ldr r0, [pc, #20] ; (80012d8 <MX_GPIO_Init+0x12c>)
|
||
80012c4: f000 fb82 bl 80019cc <HAL_GPIO_Init>
|
||
|
||
}
|
||
80012c8: bf00 nop
|
||
80012ca: 3728 adds r7, #40 ; 0x28
|
||
80012cc: 46bd mov sp, r7
|
||
80012ce: bd80 pop {r7, pc}
|
||
80012d0: 40021000 .word 0x40021000
|
||
80012d4: 40011c00 .word 0x40011c00
|
||
80012d8: 40010c00 .word 0x40010c00
|
||
|
||
080012dc <MX_FSMC_Init>:
|
||
|
||
/* FSMC initialization function */
|
||
static void MX_FSMC_Init(void)
|
||
{
|
||
80012dc: b580 push {r7, lr}
|
||
80012de: b088 sub sp, #32
|
||
80012e0: af00 add r7, sp, #0
|
||
|
||
/* USER CODE BEGIN FSMC_Init 0 */
|
||
|
||
/* USER CODE END FSMC_Init 0 */
|
||
|
||
FSMC_NORSRAM_TimingTypeDef Timing = {0};
|
||
80012e2: 1d3b adds r3, r7, #4
|
||
80012e4: 2200 movs r2, #0
|
||
80012e6: 601a str r2, [r3, #0]
|
||
80012e8: 605a str r2, [r3, #4]
|
||
80012ea: 609a str r2, [r3, #8]
|
||
80012ec: 60da str r2, [r3, #12]
|
||
80012ee: 611a str r2, [r3, #16]
|
||
80012f0: 615a str r2, [r3, #20]
|
||
80012f2: 619a str r2, [r3, #24]
|
||
|
||
/* USER CODE END FSMC_Init 1 */
|
||
|
||
/** Perform the SRAM1 memory initialization sequence
|
||
*/
|
||
hsram1.Instance = FSMC_NORSRAM_DEVICE;
|
||
80012f4: 4b28 ldr r3, [pc, #160] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
80012f6: f04f 4220 mov.w r2, #2684354560 ; 0xa0000000
|
||
80012fa: 601a str r2, [r3, #0]
|
||
hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
|
||
80012fc: 4b26 ldr r3, [pc, #152] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
80012fe: 4a27 ldr r2, [pc, #156] ; (800139c <MX_FSMC_Init+0xc0>)
|
||
8001300: 605a str r2, [r3, #4]
|
||
/* hsram1.Init */
|
||
hsram1.Init.NSBank = FSMC_NORSRAM_BANK4;
|
||
8001302: 4b25 ldr r3, [pc, #148] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
8001304: 2206 movs r2, #6
|
||
8001306: 609a str r2, [r3, #8]
|
||
hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
|
||
8001308: 4b23 ldr r3, [pc, #140] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
800130a: 2200 movs r2, #0
|
||
800130c: 60da str r2, [r3, #12]
|
||
hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
|
||
800130e: 4b22 ldr r3, [pc, #136] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
8001310: 2200 movs r2, #0
|
||
8001312: 611a str r2, [r3, #16]
|
||
hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
|
||
8001314: 4b20 ldr r3, [pc, #128] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
8001316: 2210 movs r2, #16
|
||
8001318: 615a str r2, [r3, #20]
|
||
hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
|
||
800131a: 4b1f ldr r3, [pc, #124] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
800131c: 2200 movs r2, #0
|
||
800131e: 619a str r2, [r3, #24]
|
||
hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
|
||
8001320: 4b1d ldr r3, [pc, #116] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
8001322: 2200 movs r2, #0
|
||
8001324: 61da str r2, [r3, #28]
|
||
hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
|
||
8001326: 4b1c ldr r3, [pc, #112] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
8001328: 2200 movs r2, #0
|
||
800132a: 621a str r2, [r3, #32]
|
||
hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
|
||
800132c: 4b1a ldr r3, [pc, #104] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
800132e: 2200 movs r2, #0
|
||
8001330: 625a str r2, [r3, #36] ; 0x24
|
||
hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
|
||
8001332: 4b19 ldr r3, [pc, #100] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
8001334: f44f 5280 mov.w r2, #4096 ; 0x1000
|
||
8001338: 629a str r2, [r3, #40] ; 0x28
|
||
hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
|
||
800133a: 4b17 ldr r3, [pc, #92] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
800133c: 2200 movs r2, #0
|
||
800133e: 62da str r2, [r3, #44] ; 0x2c
|
||
hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
|
||
8001340: 4b15 ldr r3, [pc, #84] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
8001342: 2200 movs r2, #0
|
||
8001344: 631a str r2, [r3, #48] ; 0x30
|
||
hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
|
||
8001346: 4b14 ldr r3, [pc, #80] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
8001348: 2200 movs r2, #0
|
||
800134a: 635a str r2, [r3, #52] ; 0x34
|
||
hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
|
||
800134c: 4b12 ldr r3, [pc, #72] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
800134e: 2200 movs r2, #0
|
||
8001350: 639a str r2, [r3, #56] ; 0x38
|
||
/* Timing */
|
||
Timing.AddressSetupTime = 0;
|
||
8001352: 2300 movs r3, #0
|
||
8001354: 607b str r3, [r7, #4]
|
||
Timing.AddressHoldTime = 15;
|
||
8001356: 230f movs r3, #15
|
||
8001358: 60bb str r3, [r7, #8]
|
||
Timing.DataSetupTime = 1;
|
||
800135a: 2301 movs r3, #1
|
||
800135c: 60fb str r3, [r7, #12]
|
||
Timing.BusTurnAroundDuration = 0;
|
||
800135e: 2300 movs r3, #0
|
||
8001360: 613b str r3, [r7, #16]
|
||
Timing.CLKDivision = 16;
|
||
8001362: 2310 movs r3, #16
|
||
8001364: 617b str r3, [r7, #20]
|
||
Timing.DataLatency = 17;
|
||
8001366: 2311 movs r3, #17
|
||
8001368: 61bb str r3, [r7, #24]
|
||
Timing.AccessMode = FSMC_ACCESS_MODE_A;
|
||
800136a: 2300 movs r3, #0
|
||
800136c: 61fb str r3, [r7, #28]
|
||
/* ExtTiming */
|
||
|
||
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
|
||
800136e: 1d3b adds r3, r7, #4
|
||
8001370: 2200 movs r2, #0
|
||
8001372: 4619 mov r1, r3
|
||
8001374: 4808 ldr r0, [pc, #32] ; (8001398 <MX_FSMC_Init+0xbc>)
|
||
8001376: f001 f8d5 bl 8002524 <HAL_SRAM_Init>
|
||
800137a: 4603 mov r3, r0
|
||
800137c: 2b00 cmp r3, #0
|
||
800137e: d001 beq.n 8001384 <MX_FSMC_Init+0xa8>
|
||
{
|
||
Error_Handler( );
|
||
8001380: f000 f810 bl 80013a4 <Error_Handler>
|
||
}
|
||
|
||
/** Disconnect NADV
|
||
*/
|
||
|
||
__HAL_AFIO_FSMCNADV_DISCONNECTED();
|
||
8001384: 4b06 ldr r3, [pc, #24] ; (80013a0 <MX_FSMC_Init+0xc4>)
|
||
8001386: 69db ldr r3, [r3, #28]
|
||
8001388: 4a05 ldr r2, [pc, #20] ; (80013a0 <MX_FSMC_Init+0xc4>)
|
||
800138a: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
||
800138e: 61d3 str r3, [r2, #28]
|
||
|
||
/* USER CODE BEGIN FSMC_Init 2 */
|
||
|
||
/* USER CODE END FSMC_Init 2 */
|
||
}
|
||
8001390: bf00 nop
|
||
8001392: 3720 adds r7, #32
|
||
8001394: 46bd mov sp, r7
|
||
8001396: bd80 pop {r7, pc}
|
||
8001398: 20000208 .word 0x20000208
|
||
800139c: a0000104 .word 0xa0000104
|
||
80013a0: 40010000 .word 0x40010000
|
||
|
||
080013a4 <Error_Handler>:
|
||
/**
|
||
* @brief This function is executed in case of error occurrence.
|
||
* @retval None
|
||
*/
|
||
void Error_Handler(void)
|
||
{
|
||
80013a4: b480 push {r7}
|
||
80013a6: af00 add r7, sp, #0
|
||
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
||
Can only be executed in Privileged modes.
|
||
*/
|
||
__STATIC_FORCEINLINE void __disable_irq(void)
|
||
{
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
80013a8: b672 cpsid i
|
||
}
|
||
80013aa: bf00 nop
|
||
/* USER CODE BEGIN Error_Handler_Debug */
|
||
/* User can add his own implementation to report the HAL error return state */
|
||
__disable_irq();
|
||
while (1)
|
||
80013ac: e7fe b.n 80013ac <Error_Handler+0x8>
|
||
...
|
||
|
||
080013b0 <HAL_MspInit>:
|
||
/* USER CODE END 0 */
|
||
/**
|
||
* Initializes the Global MSP.
|
||
*/
|
||
void HAL_MspInit(void)
|
||
{
|
||
80013b0: b480 push {r7}
|
||
80013b2: b085 sub sp, #20
|
||
80013b4: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN MspInit 0 */
|
||
|
||
/* USER CODE END MspInit 0 */
|
||
|
||
__HAL_RCC_AFIO_CLK_ENABLE();
|
||
80013b6: 4b15 ldr r3, [pc, #84] ; (800140c <HAL_MspInit+0x5c>)
|
||
80013b8: 699b ldr r3, [r3, #24]
|
||
80013ba: 4a14 ldr r2, [pc, #80] ; (800140c <HAL_MspInit+0x5c>)
|
||
80013bc: f043 0301 orr.w r3, r3, #1
|
||
80013c0: 6193 str r3, [r2, #24]
|
||
80013c2: 4b12 ldr r3, [pc, #72] ; (800140c <HAL_MspInit+0x5c>)
|
||
80013c4: 699b ldr r3, [r3, #24]
|
||
80013c6: f003 0301 and.w r3, r3, #1
|
||
80013ca: 60bb str r3, [r7, #8]
|
||
80013cc: 68bb ldr r3, [r7, #8]
|
||
__HAL_RCC_PWR_CLK_ENABLE();
|
||
80013ce: 4b0f ldr r3, [pc, #60] ; (800140c <HAL_MspInit+0x5c>)
|
||
80013d0: 69db ldr r3, [r3, #28]
|
||
80013d2: 4a0e ldr r2, [pc, #56] ; (800140c <HAL_MspInit+0x5c>)
|
||
80013d4: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
||
80013d8: 61d3 str r3, [r2, #28]
|
||
80013da: 4b0c ldr r3, [pc, #48] ; (800140c <HAL_MspInit+0x5c>)
|
||
80013dc: 69db ldr r3, [r3, #28]
|
||
80013de: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
80013e2: 607b str r3, [r7, #4]
|
||
80013e4: 687b ldr r3, [r7, #4]
|
||
|
||
/* System interrupt init*/
|
||
|
||
/** DISABLE: JTAG-DP Disabled and SW-DP Disabled
|
||
*/
|
||
__HAL_AFIO_REMAP_SWJ_DISABLE();
|
||
80013e6: 4b0a ldr r3, [pc, #40] ; (8001410 <HAL_MspInit+0x60>)
|
||
80013e8: 685b ldr r3, [r3, #4]
|
||
80013ea: 60fb str r3, [r7, #12]
|
||
80013ec: 68fb ldr r3, [r7, #12]
|
||
80013ee: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
|
||
80013f2: 60fb str r3, [r7, #12]
|
||
80013f4: 68fb ldr r3, [r7, #12]
|
||
80013f6: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000
|
||
80013fa: 60fb str r3, [r7, #12]
|
||
80013fc: 4a04 ldr r2, [pc, #16] ; (8001410 <HAL_MspInit+0x60>)
|
||
80013fe: 68fb ldr r3, [r7, #12]
|
||
8001400: 6053 str r3, [r2, #4]
|
||
|
||
/* USER CODE BEGIN MspInit 1 */
|
||
|
||
/* USER CODE END MspInit 1 */
|
||
}
|
||
8001402: bf00 nop
|
||
8001404: 3714 adds r7, #20
|
||
8001406: 46bd mov sp, r7
|
||
8001408: bc80 pop {r7}
|
||
800140a: 4770 bx lr
|
||
800140c: 40021000 .word 0x40021000
|
||
8001410: 40010000 .word 0x40010000
|
||
|
||
08001414 <HAL_FSMC_MspInit>:
|
||
|
||
static uint32_t FSMC_Initialized = 0;
|
||
|
||
static void HAL_FSMC_MspInit(void){
|
||
8001414: b580 push {r7, lr}
|
||
8001416: b086 sub sp, #24
|
||
8001418: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN FSMC_MspInit 0 */
|
||
|
||
/* USER CODE END FSMC_MspInit 0 */
|
||
GPIO_InitTypeDef GPIO_InitStruct ={0};
|
||
800141a: f107 0308 add.w r3, r7, #8
|
||
800141e: 2200 movs r2, #0
|
||
8001420: 601a str r2, [r3, #0]
|
||
8001422: 605a str r2, [r3, #4]
|
||
8001424: 609a str r2, [r3, #8]
|
||
8001426: 60da str r2, [r3, #12]
|
||
if (FSMC_Initialized) {
|
||
8001428: 4b1f ldr r3, [pc, #124] ; (80014a8 <HAL_FSMC_MspInit+0x94>)
|
||
800142a: 681b ldr r3, [r3, #0]
|
||
800142c: 2b00 cmp r3, #0
|
||
800142e: d136 bne.n 800149e <HAL_FSMC_MspInit+0x8a>
|
||
return;
|
||
}
|
||
FSMC_Initialized = 1;
|
||
8001430: 4b1d ldr r3, [pc, #116] ; (80014a8 <HAL_FSMC_MspInit+0x94>)
|
||
8001432: 2201 movs r2, #1
|
||
8001434: 601a str r2, [r3, #0]
|
||
|
||
/* Peripheral clock enable */
|
||
__HAL_RCC_FSMC_CLK_ENABLE();
|
||
8001436: 4b1d ldr r3, [pc, #116] ; (80014ac <HAL_FSMC_MspInit+0x98>)
|
||
8001438: 695b ldr r3, [r3, #20]
|
||
800143a: 4a1c ldr r2, [pc, #112] ; (80014ac <HAL_FSMC_MspInit+0x98>)
|
||
800143c: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
8001440: 6153 str r3, [r2, #20]
|
||
8001442: 4b1a ldr r3, [pc, #104] ; (80014ac <HAL_FSMC_MspInit+0x98>)
|
||
8001444: 695b ldr r3, [r3, #20]
|
||
8001446: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
800144a: 607b str r3, [r7, #4]
|
||
800144c: 687b ldr r3, [r7, #4]
|
||
PD1 ------> FSMC_D3
|
||
PD4 ------> FSMC_NOE
|
||
PD5 ------> FSMC_NWE
|
||
PG12 ------> FSMC_NE4
|
||
*/
|
||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_12;
|
||
800144e: f241 0301 movw r3, #4097 ; 0x1001
|
||
8001452: 60bb str r3, [r7, #8]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
8001454: 2302 movs r3, #2
|
||
8001456: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8001458: 2303 movs r3, #3
|
||
800145a: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||
800145c: f107 0308 add.w r3, r7, #8
|
||
8001460: 4619 mov r1, r3
|
||
8001462: 4813 ldr r0, [pc, #76] ; (80014b0 <HAL_FSMC_MspInit+0x9c>)
|
||
8001464: f000 fab2 bl 80019cc <HAL_GPIO_Init>
|
||
|
||
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
|
||
8001468: f64f 7380 movw r3, #65408 ; 0xff80
|
||
800146c: 60bb str r3, [r7, #8]
|
||
|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
|
||
|GPIO_PIN_15;
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
800146e: 2302 movs r3, #2
|
||
8001470: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8001472: 2303 movs r3, #3
|
||
8001474: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||
8001476: f107 0308 add.w r3, r7, #8
|
||
800147a: 4619 mov r1, r3
|
||
800147c: 480d ldr r0, [pc, #52] ; (80014b4 <HAL_FSMC_MspInit+0xa0>)
|
||
800147e: f000 faa5 bl 80019cc <HAL_GPIO_Init>
|
||
|
||
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
|
||
8001482: f24c 7333 movw r3, #50995 ; 0xc733
|
||
8001486: 60bb str r3, [r7, #8]
|
||
|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4
|
||
|GPIO_PIN_5;
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
8001488: 2302 movs r3, #2
|
||
800148a: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
800148c: 2303 movs r3, #3
|
||
800148e: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||
8001490: f107 0308 add.w r3, r7, #8
|
||
8001494: 4619 mov r1, r3
|
||
8001496: 4808 ldr r0, [pc, #32] ; (80014b8 <HAL_FSMC_MspInit+0xa4>)
|
||
8001498: f000 fa98 bl 80019cc <HAL_GPIO_Init>
|
||
800149c: e000 b.n 80014a0 <HAL_FSMC_MspInit+0x8c>
|
||
return;
|
||
800149e: bf00 nop
|
||
|
||
/* USER CODE BEGIN FSMC_MspInit 1 */
|
||
|
||
/* USER CODE END FSMC_MspInit 1 */
|
||
}
|
||
80014a0: 3718 adds r7, #24
|
||
80014a2: 46bd mov sp, r7
|
||
80014a4: bd80 pop {r7, pc}
|
||
80014a6: bf00 nop
|
||
80014a8: 200001f8 .word 0x200001f8
|
||
80014ac: 40021000 .word 0x40021000
|
||
80014b0: 40012000 .word 0x40012000
|
||
80014b4: 40011800 .word 0x40011800
|
||
80014b8: 40011400 .word 0x40011400
|
||
|
||
080014bc <HAL_SRAM_MspInit>:
|
||
|
||
void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){
|
||
80014bc: b580 push {r7, lr}
|
||
80014be: b082 sub sp, #8
|
||
80014c0: af00 add r7, sp, #0
|
||
80014c2: 6078 str r0, [r7, #4]
|
||
/* USER CODE BEGIN SRAM_MspInit 0 */
|
||
|
||
/* USER CODE END SRAM_MspInit 0 */
|
||
HAL_FSMC_MspInit();
|
||
80014c4: f7ff ffa6 bl 8001414 <HAL_FSMC_MspInit>
|
||
/* USER CODE BEGIN SRAM_MspInit 1 */
|
||
|
||
/* USER CODE END SRAM_MspInit 1 */
|
||
}
|
||
80014c8: bf00 nop
|
||
80014ca: 3708 adds r7, #8
|
||
80014cc: 46bd mov sp, r7
|
||
80014ce: bd80 pop {r7, pc}
|
||
|
||
080014d0 <NMI_Handler>:
|
||
/******************************************************************************/
|
||
/**
|
||
* @brief This function handles Non maskable interrupt.
|
||
*/
|
||
void NMI_Handler(void)
|
||
{
|
||
80014d0: b480 push {r7}
|
||
80014d2: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||
|
||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||
while (1)
|
||
80014d4: e7fe b.n 80014d4 <NMI_Handler+0x4>
|
||
|
||
080014d6 <HardFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Hard fault interrupt.
|
||
*/
|
||
void HardFault_Handler(void)
|
||
{
|
||
80014d6: b480 push {r7}
|
||
80014d8: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||
|
||
/* USER CODE END HardFault_IRQn 0 */
|
||
while (1)
|
||
80014da: e7fe b.n 80014da <HardFault_Handler+0x4>
|
||
|
||
080014dc <MemManage_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Memory management fault.
|
||
*/
|
||
void MemManage_Handler(void)
|
||
{
|
||
80014dc: b480 push {r7}
|
||
80014de: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||
|
||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||
while (1)
|
||
80014e0: e7fe b.n 80014e0 <MemManage_Handler+0x4>
|
||
|
||
080014e2 <BusFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Prefetch fault, memory access fault.
|
||
*/
|
||
void BusFault_Handler(void)
|
||
{
|
||
80014e2: b480 push {r7}
|
||
80014e4: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||
|
||
/* USER CODE END BusFault_IRQn 0 */
|
||
while (1)
|
||
80014e6: e7fe b.n 80014e6 <BusFault_Handler+0x4>
|
||
|
||
080014e8 <UsageFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Undefined instruction or illegal state.
|
||
*/
|
||
void UsageFault_Handler(void)
|
||
{
|
||
80014e8: b480 push {r7}
|
||
80014ea: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||
|
||
/* USER CODE END UsageFault_IRQn 0 */
|
||
while (1)
|
||
80014ec: e7fe b.n 80014ec <UsageFault_Handler+0x4>
|
||
|
||
080014ee <SVC_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles System service call via SWI instruction.
|
||
*/
|
||
void SVC_Handler(void)
|
||
{
|
||
80014ee: b480 push {r7}
|
||
80014f0: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END SVCall_IRQn 0 */
|
||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||
|
||
/* USER CODE END SVCall_IRQn 1 */
|
||
}
|
||
80014f2: bf00 nop
|
||
80014f4: 46bd mov sp, r7
|
||
80014f6: bc80 pop {r7}
|
||
80014f8: 4770 bx lr
|
||
|
||
080014fa <DebugMon_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Debug monitor.
|
||
*/
|
||
void DebugMon_Handler(void)
|
||
{
|
||
80014fa: b480 push {r7}
|
||
80014fc: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||
|
||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||
}
|
||
80014fe: bf00 nop
|
||
8001500: 46bd mov sp, r7
|
||
8001502: bc80 pop {r7}
|
||
8001504: 4770 bx lr
|
||
|
||
08001506 <PendSV_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Pendable request for system service.
|
||
*/
|
||
void PendSV_Handler(void)
|
||
{
|
||
8001506: b480 push {r7}
|
||
8001508: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END PendSV_IRQn 0 */
|
||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||
|
||
/* USER CODE END PendSV_IRQn 1 */
|
||
}
|
||
800150a: bf00 nop
|
||
800150c: 46bd mov sp, r7
|
||
800150e: bc80 pop {r7}
|
||
8001510: 4770 bx lr
|
||
|
||
08001512 <SysTick_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles System tick timer.
|
||
*/
|
||
void SysTick_Handler(void)
|
||
{
|
||
8001512: b580 push {r7, lr}
|
||
8001514: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||
|
||
/* USER CODE END SysTick_IRQn 0 */
|
||
HAL_IncTick();
|
||
8001516: f000 f935 bl 8001784 <HAL_IncTick>
|
||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||
|
||
/* USER CODE END SysTick_IRQn 1 */
|
||
}
|
||
800151a: bf00 nop
|
||
800151c: bd80 pop {r7, pc}
|
||
|
||
0800151e <_getpid>:
|
||
void initialise_monitor_handles()
|
||
{
|
||
}
|
||
|
||
int _getpid(void)
|
||
{
|
||
800151e: b480 push {r7}
|
||
8001520: af00 add r7, sp, #0
|
||
return 1;
|
||
8001522: 2301 movs r3, #1
|
||
}
|
||
8001524: 4618 mov r0, r3
|
||
8001526: 46bd mov sp, r7
|
||
8001528: bc80 pop {r7}
|
||
800152a: 4770 bx lr
|
||
|
||
0800152c <_kill>:
|
||
|
||
int _kill(int pid, int sig)
|
||
{
|
||
800152c: b580 push {r7, lr}
|
||
800152e: b082 sub sp, #8
|
||
8001530: af00 add r7, sp, #0
|
||
8001532: 6078 str r0, [r7, #4]
|
||
8001534: 6039 str r1, [r7, #0]
|
||
errno = EINVAL;
|
||
8001536: f002 fe49 bl 80041cc <__errno>
|
||
800153a: 4603 mov r3, r0
|
||
800153c: 2216 movs r2, #22
|
||
800153e: 601a str r2, [r3, #0]
|
||
return -1;
|
||
8001540: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
}
|
||
8001544: 4618 mov r0, r3
|
||
8001546: 3708 adds r7, #8
|
||
8001548: 46bd mov sp, r7
|
||
800154a: bd80 pop {r7, pc}
|
||
|
||
0800154c <_exit>:
|
||
|
||
void _exit (int status)
|
||
{
|
||
800154c: b580 push {r7, lr}
|
||
800154e: b082 sub sp, #8
|
||
8001550: af00 add r7, sp, #0
|
||
8001552: 6078 str r0, [r7, #4]
|
||
_kill(status, -1);
|
||
8001554: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
|
||
8001558: 6878 ldr r0, [r7, #4]
|
||
800155a: f7ff ffe7 bl 800152c <_kill>
|
||
while (1) {} /* Make sure we hang here */
|
||
800155e: e7fe b.n 800155e <_exit+0x12>
|
||
|
||
08001560 <_read>:
|
||
}
|
||
|
||
__attribute__((weak)) int _read(int file, char *ptr, int len)
|
||
{
|
||
8001560: b580 push {r7, lr}
|
||
8001562: b086 sub sp, #24
|
||
8001564: af00 add r7, sp, #0
|
||
8001566: 60f8 str r0, [r7, #12]
|
||
8001568: 60b9 str r1, [r7, #8]
|
||
800156a: 607a str r2, [r7, #4]
|
||
int DataIdx;
|
||
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
800156c: 2300 movs r3, #0
|
||
800156e: 617b str r3, [r7, #20]
|
||
8001570: e00a b.n 8001588 <_read+0x28>
|
||
{
|
||
*ptr++ = __io_getchar();
|
||
8001572: f3af 8000 nop.w
|
||
8001576: 4601 mov r1, r0
|
||
8001578: 68bb ldr r3, [r7, #8]
|
||
800157a: 1c5a adds r2, r3, #1
|
||
800157c: 60ba str r2, [r7, #8]
|
||
800157e: b2ca uxtb r2, r1
|
||
8001580: 701a strb r2, [r3, #0]
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
8001582: 697b ldr r3, [r7, #20]
|
||
8001584: 3301 adds r3, #1
|
||
8001586: 617b str r3, [r7, #20]
|
||
8001588: 697a ldr r2, [r7, #20]
|
||
800158a: 687b ldr r3, [r7, #4]
|
||
800158c: 429a cmp r2, r3
|
||
800158e: dbf0 blt.n 8001572 <_read+0x12>
|
||
}
|
||
|
||
return len;
|
||
8001590: 687b ldr r3, [r7, #4]
|
||
}
|
||
8001592: 4618 mov r0, r3
|
||
8001594: 3718 adds r7, #24
|
||
8001596: 46bd mov sp, r7
|
||
8001598: bd80 pop {r7, pc}
|
||
|
||
0800159a <_write>:
|
||
|
||
__attribute__((weak)) int _write(int file, char *ptr, int len)
|
||
{
|
||
800159a: b580 push {r7, lr}
|
||
800159c: b086 sub sp, #24
|
||
800159e: af00 add r7, sp, #0
|
||
80015a0: 60f8 str r0, [r7, #12]
|
||
80015a2: 60b9 str r1, [r7, #8]
|
||
80015a4: 607a str r2, [r7, #4]
|
||
int DataIdx;
|
||
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
80015a6: 2300 movs r3, #0
|
||
80015a8: 617b str r3, [r7, #20]
|
||
80015aa: e009 b.n 80015c0 <_write+0x26>
|
||
{
|
||
__io_putchar(*ptr++);
|
||
80015ac: 68bb ldr r3, [r7, #8]
|
||
80015ae: 1c5a adds r2, r3, #1
|
||
80015b0: 60ba str r2, [r7, #8]
|
||
80015b2: 781b ldrb r3, [r3, #0]
|
||
80015b4: 4618 mov r0, r3
|
||
80015b6: f3af 8000 nop.w
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
80015ba: 697b ldr r3, [r7, #20]
|
||
80015bc: 3301 adds r3, #1
|
||
80015be: 617b str r3, [r7, #20]
|
||
80015c0: 697a ldr r2, [r7, #20]
|
||
80015c2: 687b ldr r3, [r7, #4]
|
||
80015c4: 429a cmp r2, r3
|
||
80015c6: dbf1 blt.n 80015ac <_write+0x12>
|
||
}
|
||
return len;
|
||
80015c8: 687b ldr r3, [r7, #4]
|
||
}
|
||
80015ca: 4618 mov r0, r3
|
||
80015cc: 3718 adds r7, #24
|
||
80015ce: 46bd mov sp, r7
|
||
80015d0: bd80 pop {r7, pc}
|
||
|
||
080015d2 <_close>:
|
||
|
||
int _close(int file)
|
||
{
|
||
80015d2: b480 push {r7}
|
||
80015d4: b083 sub sp, #12
|
||
80015d6: af00 add r7, sp, #0
|
||
80015d8: 6078 str r0, [r7, #4]
|
||
return -1;
|
||
80015da: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
}
|
||
80015de: 4618 mov r0, r3
|
||
80015e0: 370c adds r7, #12
|
||
80015e2: 46bd mov sp, r7
|
||
80015e4: bc80 pop {r7}
|
||
80015e6: 4770 bx lr
|
||
|
||
080015e8 <_fstat>:
|
||
|
||
|
||
int _fstat(int file, struct stat *st)
|
||
{
|
||
80015e8: b480 push {r7}
|
||
80015ea: b083 sub sp, #12
|
||
80015ec: af00 add r7, sp, #0
|
||
80015ee: 6078 str r0, [r7, #4]
|
||
80015f0: 6039 str r1, [r7, #0]
|
||
st->st_mode = S_IFCHR;
|
||
80015f2: 683b ldr r3, [r7, #0]
|
||
80015f4: f44f 5200 mov.w r2, #8192 ; 0x2000
|
||
80015f8: 605a str r2, [r3, #4]
|
||
return 0;
|
||
80015fa: 2300 movs r3, #0
|
||
}
|
||
80015fc: 4618 mov r0, r3
|
||
80015fe: 370c adds r7, #12
|
||
8001600: 46bd mov sp, r7
|
||
8001602: bc80 pop {r7}
|
||
8001604: 4770 bx lr
|
||
|
||
08001606 <_isatty>:
|
||
|
||
int _isatty(int file)
|
||
{
|
||
8001606: b480 push {r7}
|
||
8001608: b083 sub sp, #12
|
||
800160a: af00 add r7, sp, #0
|
||
800160c: 6078 str r0, [r7, #4]
|
||
return 1;
|
||
800160e: 2301 movs r3, #1
|
||
}
|
||
8001610: 4618 mov r0, r3
|
||
8001612: 370c adds r7, #12
|
||
8001614: 46bd mov sp, r7
|
||
8001616: bc80 pop {r7}
|
||
8001618: 4770 bx lr
|
||
|
||
0800161a <_lseek>:
|
||
|
||
int _lseek(int file, int ptr, int dir)
|
||
{
|
||
800161a: b480 push {r7}
|
||
800161c: b085 sub sp, #20
|
||
800161e: af00 add r7, sp, #0
|
||
8001620: 60f8 str r0, [r7, #12]
|
||
8001622: 60b9 str r1, [r7, #8]
|
||
8001624: 607a str r2, [r7, #4]
|
||
return 0;
|
||
8001626: 2300 movs r3, #0
|
||
}
|
||
8001628: 4618 mov r0, r3
|
||
800162a: 3714 adds r7, #20
|
||
800162c: 46bd mov sp, r7
|
||
800162e: bc80 pop {r7}
|
||
8001630: 4770 bx lr
|
||
...
|
||
|
||
08001634 <_sbrk>:
|
||
*
|
||
* @param incr Memory size
|
||
* @return Pointer to allocated memory
|
||
*/
|
||
void *_sbrk(ptrdiff_t incr)
|
||
{
|
||
8001634: b580 push {r7, lr}
|
||
8001636: b086 sub sp, #24
|
||
8001638: af00 add r7, sp, #0
|
||
800163a: 6078 str r0, [r7, #4]
|
||
extern uint8_t _end; /* Symbol defined in the linker script */
|
||
extern uint8_t _estack; /* Symbol defined in the linker script */
|
||
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
||
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
||
800163c: 4a14 ldr r2, [pc, #80] ; (8001690 <_sbrk+0x5c>)
|
||
800163e: 4b15 ldr r3, [pc, #84] ; (8001694 <_sbrk+0x60>)
|
||
8001640: 1ad3 subs r3, r2, r3
|
||
8001642: 617b str r3, [r7, #20]
|
||
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||
8001644: 697b ldr r3, [r7, #20]
|
||
8001646: 613b str r3, [r7, #16]
|
||
uint8_t *prev_heap_end;
|
||
|
||
/* Initialize heap end at first call */
|
||
if (NULL == __sbrk_heap_end)
|
||
8001648: 4b13 ldr r3, [pc, #76] ; (8001698 <_sbrk+0x64>)
|
||
800164a: 681b ldr r3, [r3, #0]
|
||
800164c: 2b00 cmp r3, #0
|
||
800164e: d102 bne.n 8001656 <_sbrk+0x22>
|
||
{
|
||
__sbrk_heap_end = &_end;
|
||
8001650: 4b11 ldr r3, [pc, #68] ; (8001698 <_sbrk+0x64>)
|
||
8001652: 4a12 ldr r2, [pc, #72] ; (800169c <_sbrk+0x68>)
|
||
8001654: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Protect heap from growing into the reserved MSP stack */
|
||
if (__sbrk_heap_end + incr > max_heap)
|
||
8001656: 4b10 ldr r3, [pc, #64] ; (8001698 <_sbrk+0x64>)
|
||
8001658: 681a ldr r2, [r3, #0]
|
||
800165a: 687b ldr r3, [r7, #4]
|
||
800165c: 4413 add r3, r2
|
||
800165e: 693a ldr r2, [r7, #16]
|
||
8001660: 429a cmp r2, r3
|
||
8001662: d207 bcs.n 8001674 <_sbrk+0x40>
|
||
{
|
||
errno = ENOMEM;
|
||
8001664: f002 fdb2 bl 80041cc <__errno>
|
||
8001668: 4603 mov r3, r0
|
||
800166a: 220c movs r2, #12
|
||
800166c: 601a str r2, [r3, #0]
|
||
return (void *)-1;
|
||
800166e: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
8001672: e009 b.n 8001688 <_sbrk+0x54>
|
||
}
|
||
|
||
prev_heap_end = __sbrk_heap_end;
|
||
8001674: 4b08 ldr r3, [pc, #32] ; (8001698 <_sbrk+0x64>)
|
||
8001676: 681b ldr r3, [r3, #0]
|
||
8001678: 60fb str r3, [r7, #12]
|
||
__sbrk_heap_end += incr;
|
||
800167a: 4b07 ldr r3, [pc, #28] ; (8001698 <_sbrk+0x64>)
|
||
800167c: 681a ldr r2, [r3, #0]
|
||
800167e: 687b ldr r3, [r7, #4]
|
||
8001680: 4413 add r3, r2
|
||
8001682: 4a05 ldr r2, [pc, #20] ; (8001698 <_sbrk+0x64>)
|
||
8001684: 6013 str r3, [r2, #0]
|
||
|
||
return (void *)prev_heap_end;
|
||
8001686: 68fb ldr r3, [r7, #12]
|
||
}
|
||
8001688: 4618 mov r0, r3
|
||
800168a: 3718 adds r7, #24
|
||
800168c: 46bd mov sp, r7
|
||
800168e: bd80 pop {r7, pc}
|
||
8001690: 20010000 .word 0x20010000
|
||
8001694: 00000400 .word 0x00000400
|
||
8001698: 200001fc .word 0x200001fc
|
||
800169c: 20000298 .word 0x20000298
|
||
|
||
080016a0 <SystemInit>:
|
||
* @note This function should be used only after reset.
|
||
* @param None
|
||
* @retval None
|
||
*/
|
||
void SystemInit (void)
|
||
{
|
||
80016a0: b480 push {r7}
|
||
80016a2: af00 add r7, sp, #0
|
||
|
||
/* Configure the Vector Table location -------------------------------------*/
|
||
#if defined(USER_VECT_TAB_ADDRESS)
|
||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
|
||
#endif /* USER_VECT_TAB_ADDRESS */
|
||
}
|
||
80016a4: bf00 nop
|
||
80016a6: 46bd mov sp, r7
|
||
80016a8: bc80 pop {r7}
|
||
80016aa: 4770 bx lr
|
||
|
||
080016ac <Reset_Handler>:
|
||
.weak Reset_Handler
|
||
.type Reset_Handler, %function
|
||
Reset_Handler:
|
||
|
||
/* Copy the data segment initializers from flash to SRAM */
|
||
ldr r0, =_sdata
|
||
80016ac: 480c ldr r0, [pc, #48] ; (80016e0 <LoopFillZerobss+0x12>)
|
||
ldr r1, =_edata
|
||
80016ae: 490d ldr r1, [pc, #52] ; (80016e4 <LoopFillZerobss+0x16>)
|
||
ldr r2, =_sidata
|
||
80016b0: 4a0d ldr r2, [pc, #52] ; (80016e8 <LoopFillZerobss+0x1a>)
|
||
movs r3, #0
|
||
80016b2: 2300 movs r3, #0
|
||
b LoopCopyDataInit
|
||
80016b4: e002 b.n 80016bc <LoopCopyDataInit>
|
||
|
||
080016b6 <CopyDataInit>:
|
||
|
||
CopyDataInit:
|
||
ldr r4, [r2, r3]
|
||
80016b6: 58d4 ldr r4, [r2, r3]
|
||
str r4, [r0, r3]
|
||
80016b8: 50c4 str r4, [r0, r3]
|
||
adds r3, r3, #4
|
||
80016ba: 3304 adds r3, #4
|
||
|
||
080016bc <LoopCopyDataInit>:
|
||
|
||
LoopCopyDataInit:
|
||
adds r4, r0, r3
|
||
80016bc: 18c4 adds r4, r0, r3
|
||
cmp r4, r1
|
||
80016be: 428c cmp r4, r1
|
||
bcc CopyDataInit
|
||
80016c0: d3f9 bcc.n 80016b6 <CopyDataInit>
|
||
|
||
/* Zero fill the bss segment. */
|
||
ldr r2, =_sbss
|
||
80016c2: 4a0a ldr r2, [pc, #40] ; (80016ec <LoopFillZerobss+0x1e>)
|
||
ldr r4, =_ebss
|
||
80016c4: 4c0a ldr r4, [pc, #40] ; (80016f0 <LoopFillZerobss+0x22>)
|
||
movs r3, #0
|
||
80016c6: 2300 movs r3, #0
|
||
b LoopFillZerobss
|
||
80016c8: e001 b.n 80016ce <LoopFillZerobss>
|
||
|
||
080016ca <FillZerobss>:
|
||
|
||
FillZerobss:
|
||
str r3, [r2]
|
||
80016ca: 6013 str r3, [r2, #0]
|
||
adds r2, r2, #4
|
||
80016cc: 3204 adds r2, #4
|
||
|
||
080016ce <LoopFillZerobss>:
|
||
|
||
LoopFillZerobss:
|
||
cmp r2, r4
|
||
80016ce: 42a2 cmp r2, r4
|
||
bcc FillZerobss
|
||
80016d0: d3fb bcc.n 80016ca <FillZerobss>
|
||
|
||
/* Call the clock system intitialization function.*/
|
||
bl SystemInit
|
||
80016d2: f7ff ffe5 bl 80016a0 <SystemInit>
|
||
/* Call static constructors */
|
||
bl __libc_init_array
|
||
80016d6: f002 fd7f bl 80041d8 <__libc_init_array>
|
||
/* Call the application's entry point.*/
|
||
bl main
|
||
80016da: f7ff fd15 bl 8001108 <main>
|
||
bx lr
|
||
80016de: 4770 bx lr
|
||
ldr r0, =_sdata
|
||
80016e0: 20000000 .word 0x20000000
|
||
ldr r1, =_edata
|
||
80016e4: 200001dc .word 0x200001dc
|
||
ldr r2, =_sidata
|
||
80016e8: 08007ebc .word 0x08007ebc
|
||
ldr r2, =_sbss
|
||
80016ec: 200001dc .word 0x200001dc
|
||
ldr r4, =_ebss
|
||
80016f0: 20000298 .word 0x20000298
|
||
|
||
080016f4 <ADC1_2_IRQHandler>:
|
||
* @retval : None
|
||
*/
|
||
.section .text.Default_Handler,"ax",%progbits
|
||
Default_Handler:
|
||
Infinite_Loop:
|
||
b Infinite_Loop
|
||
80016f4: e7fe b.n 80016f4 <ADC1_2_IRQHandler>
|
||
...
|
||
|
||
080016f8 <HAL_Init>:
|
||
* need to ensure that the SysTick time base is always set to 1 millisecond
|
||
* to have correct HAL operation.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_Init(void)
|
||
{
|
||
80016f8: b580 push {r7, lr}
|
||
80016fa: af00 add r7, sp, #0
|
||
defined(STM32F102x6) || defined(STM32F102xB) || \
|
||
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
|
||
defined(STM32F105xC) || defined(STM32F107xC)
|
||
|
||
/* Prefetch buffer is not available on value line devices */
|
||
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
||
80016fc: 4b08 ldr r3, [pc, #32] ; (8001720 <HAL_Init+0x28>)
|
||
80016fe: 681b ldr r3, [r3, #0]
|
||
8001700: 4a07 ldr r2, [pc, #28] ; (8001720 <HAL_Init+0x28>)
|
||
8001702: f043 0310 orr.w r3, r3, #16
|
||
8001706: 6013 str r3, [r2, #0]
|
||
#endif
|
||
#endif /* PREFETCH_ENABLE */
|
||
|
||
/* Set Interrupt Group Priority */
|
||
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
||
8001708: 2003 movs r0, #3
|
||
800170a: f000 f92b bl 8001964 <HAL_NVIC_SetPriorityGrouping>
|
||
|
||
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
|
||
HAL_InitTick(TICK_INT_PRIORITY);
|
||
800170e: 200f movs r0, #15
|
||
8001710: f000 f808 bl 8001724 <HAL_InitTick>
|
||
|
||
/* Init the low level hardware */
|
||
HAL_MspInit();
|
||
8001714: f7ff fe4c bl 80013b0 <HAL_MspInit>
|
||
|
||
/* Return function status */
|
||
return HAL_OK;
|
||
8001718: 2300 movs r3, #0
|
||
}
|
||
800171a: 4618 mov r0, r3
|
||
800171c: bd80 pop {r7, pc}
|
||
800171e: bf00 nop
|
||
8001720: 40022000 .word 0x40022000
|
||
|
||
08001724 <HAL_InitTick>:
|
||
* implementation in user file.
|
||
* @param TickPriority Tick interrupt priority.
|
||
* @retval HAL status
|
||
*/
|
||
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
||
{
|
||
8001724: b580 push {r7, lr}
|
||
8001726: b082 sub sp, #8
|
||
8001728: af00 add r7, sp, #0
|
||
800172a: 6078 str r0, [r7, #4]
|
||
/* Configure the SysTick to have interrupt in 1ms time basis*/
|
||
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
|
||
800172c: 4b12 ldr r3, [pc, #72] ; (8001778 <HAL_InitTick+0x54>)
|
||
800172e: 681a ldr r2, [r3, #0]
|
||
8001730: 4b12 ldr r3, [pc, #72] ; (800177c <HAL_InitTick+0x58>)
|
||
8001732: 781b ldrb r3, [r3, #0]
|
||
8001734: 4619 mov r1, r3
|
||
8001736: f44f 737a mov.w r3, #1000 ; 0x3e8
|
||
800173a: fbb3 f3f1 udiv r3, r3, r1
|
||
800173e: fbb2 f3f3 udiv r3, r2, r3
|
||
8001742: 4618 mov r0, r3
|
||
8001744: f000 f935 bl 80019b2 <HAL_SYSTICK_Config>
|
||
8001748: 4603 mov r3, r0
|
||
800174a: 2b00 cmp r3, #0
|
||
800174c: d001 beq.n 8001752 <HAL_InitTick+0x2e>
|
||
{
|
||
return HAL_ERROR;
|
||
800174e: 2301 movs r3, #1
|
||
8001750: e00e b.n 8001770 <HAL_InitTick+0x4c>
|
||
}
|
||
|
||
/* Configure the SysTick IRQ priority */
|
||
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
||
8001752: 687b ldr r3, [r7, #4]
|
||
8001754: 2b0f cmp r3, #15
|
||
8001756: d80a bhi.n 800176e <HAL_InitTick+0x4a>
|
||
{
|
||
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
||
8001758: 2200 movs r2, #0
|
||
800175a: 6879 ldr r1, [r7, #4]
|
||
800175c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8001760: f000 f90b bl 800197a <HAL_NVIC_SetPriority>
|
||
uwTickPrio = TickPriority;
|
||
8001764: 4a06 ldr r2, [pc, #24] ; (8001780 <HAL_InitTick+0x5c>)
|
||
8001766: 687b ldr r3, [r7, #4]
|
||
8001768: 6013 str r3, [r2, #0]
|
||
{
|
||
return HAL_ERROR;
|
||
}
|
||
|
||
/* Return function status */
|
||
return HAL_OK;
|
||
800176a: 2300 movs r3, #0
|
||
800176c: e000 b.n 8001770 <HAL_InitTick+0x4c>
|
||
return HAL_ERROR;
|
||
800176e: 2301 movs r3, #1
|
||
}
|
||
8001770: 4618 mov r0, r3
|
||
8001772: 3708 adds r7, #8
|
||
8001774: 46bd mov sp, r7
|
||
8001776: bd80 pop {r7, pc}
|
||
8001778: 20000000 .word 0x20000000
|
||
800177c: 20000008 .word 0x20000008
|
||
8001780: 20000004 .word 0x20000004
|
||
|
||
08001784 <HAL_IncTick>:
|
||
* @note This function is declared as __weak to be overwritten in case of other
|
||
* implementations in user file.
|
||
* @retval None
|
||
*/
|
||
__weak void HAL_IncTick(void)
|
||
{
|
||
8001784: b480 push {r7}
|
||
8001786: af00 add r7, sp, #0
|
||
uwTick += uwTickFreq;
|
||
8001788: 4b05 ldr r3, [pc, #20] ; (80017a0 <HAL_IncTick+0x1c>)
|
||
800178a: 781b ldrb r3, [r3, #0]
|
||
800178c: 461a mov r2, r3
|
||
800178e: 4b05 ldr r3, [pc, #20] ; (80017a4 <HAL_IncTick+0x20>)
|
||
8001790: 681b ldr r3, [r3, #0]
|
||
8001792: 4413 add r3, r2
|
||
8001794: 4a03 ldr r2, [pc, #12] ; (80017a4 <HAL_IncTick+0x20>)
|
||
8001796: 6013 str r3, [r2, #0]
|
||
}
|
||
8001798: bf00 nop
|
||
800179a: 46bd mov sp, r7
|
||
800179c: bc80 pop {r7}
|
||
800179e: 4770 bx lr
|
||
80017a0: 20000008 .word 0x20000008
|
||
80017a4: 20000250 .word 0x20000250
|
||
|
||
080017a8 <HAL_GetTick>:
|
||
* @note This function is declared as __weak to be overwritten in case of other
|
||
* implementations in user file.
|
||
* @retval tick value
|
||
*/
|
||
__weak uint32_t HAL_GetTick(void)
|
||
{
|
||
80017a8: b480 push {r7}
|
||
80017aa: af00 add r7, sp, #0
|
||
return uwTick;
|
||
80017ac: 4b02 ldr r3, [pc, #8] ; (80017b8 <HAL_GetTick+0x10>)
|
||
80017ae: 681b ldr r3, [r3, #0]
|
||
}
|
||
80017b0: 4618 mov r0, r3
|
||
80017b2: 46bd mov sp, r7
|
||
80017b4: bc80 pop {r7}
|
||
80017b6: 4770 bx lr
|
||
80017b8: 20000250 .word 0x20000250
|
||
|
||
080017bc <HAL_Delay>:
|
||
* implementations in user file.
|
||
* @param Delay specifies the delay time length, in milliseconds.
|
||
* @retval None
|
||
*/
|
||
__weak void HAL_Delay(uint32_t Delay)
|
||
{
|
||
80017bc: b580 push {r7, lr}
|
||
80017be: b084 sub sp, #16
|
||
80017c0: af00 add r7, sp, #0
|
||
80017c2: 6078 str r0, [r7, #4]
|
||
uint32_t tickstart = HAL_GetTick();
|
||
80017c4: f7ff fff0 bl 80017a8 <HAL_GetTick>
|
||
80017c8: 60b8 str r0, [r7, #8]
|
||
uint32_t wait = Delay;
|
||
80017ca: 687b ldr r3, [r7, #4]
|
||
80017cc: 60fb str r3, [r7, #12]
|
||
|
||
/* Add a freq to guarantee minimum wait */
|
||
if (wait < HAL_MAX_DELAY)
|
||
80017ce: 68fb ldr r3, [r7, #12]
|
||
80017d0: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
80017d4: d005 beq.n 80017e2 <HAL_Delay+0x26>
|
||
{
|
||
wait += (uint32_t)(uwTickFreq);
|
||
80017d6: 4b0a ldr r3, [pc, #40] ; (8001800 <HAL_Delay+0x44>)
|
||
80017d8: 781b ldrb r3, [r3, #0]
|
||
80017da: 461a mov r2, r3
|
||
80017dc: 68fb ldr r3, [r7, #12]
|
||
80017de: 4413 add r3, r2
|
||
80017e0: 60fb str r3, [r7, #12]
|
||
}
|
||
|
||
while ((HAL_GetTick() - tickstart) < wait)
|
||
80017e2: bf00 nop
|
||
80017e4: f7ff ffe0 bl 80017a8 <HAL_GetTick>
|
||
80017e8: 4602 mov r2, r0
|
||
80017ea: 68bb ldr r3, [r7, #8]
|
||
80017ec: 1ad3 subs r3, r2, r3
|
||
80017ee: 68fa ldr r2, [r7, #12]
|
||
80017f0: 429a cmp r2, r3
|
||
80017f2: d8f7 bhi.n 80017e4 <HAL_Delay+0x28>
|
||
{
|
||
}
|
||
}
|
||
80017f4: bf00 nop
|
||
80017f6: bf00 nop
|
||
80017f8: 3710 adds r7, #16
|
||
80017fa: 46bd mov sp, r7
|
||
80017fc: bd80 pop {r7, pc}
|
||
80017fe: bf00 nop
|
||
8001800: 20000008 .word 0x20000008
|
||
|
||
08001804 <__NVIC_SetPriorityGrouping>:
|
||
In case of a conflict between priority grouping and available
|
||
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
|
||
\param [in] PriorityGroup Priority grouping field.
|
||
*/
|
||
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
||
{
|
||
8001804: b480 push {r7}
|
||
8001806: b085 sub sp, #20
|
||
8001808: af00 add r7, sp, #0
|
||
800180a: 6078 str r0, [r7, #4]
|
||
uint32_t reg_value;
|
||
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
||
800180c: 687b ldr r3, [r7, #4]
|
||
800180e: f003 0307 and.w r3, r3, #7
|
||
8001812: 60fb str r3, [r7, #12]
|
||
|
||
reg_value = SCB->AIRCR; /* read old register configuration */
|
||
8001814: 4b0c ldr r3, [pc, #48] ; (8001848 <__NVIC_SetPriorityGrouping+0x44>)
|
||
8001816: 68db ldr r3, [r3, #12]
|
||
8001818: 60bb str r3, [r7, #8]
|
||
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
|
||
800181a: 68ba ldr r2, [r7, #8]
|
||
800181c: f64f 03ff movw r3, #63743 ; 0xf8ff
|
||
8001820: 4013 ands r3, r2
|
||
8001822: 60bb str r3, [r7, #8]
|
||
reg_value = (reg_value |
|
||
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
|
||
8001824: 68fb ldr r3, [r7, #12]
|
||
8001826: 021a lsls r2, r3, #8
|
||
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||
8001828: 68bb ldr r3, [r7, #8]
|
||
800182a: 4313 orrs r3, r2
|
||
reg_value = (reg_value |
|
||
800182c: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
|
||
8001830: f443 3300 orr.w r3, r3, #131072 ; 0x20000
|
||
8001834: 60bb str r3, [r7, #8]
|
||
SCB->AIRCR = reg_value;
|
||
8001836: 4a04 ldr r2, [pc, #16] ; (8001848 <__NVIC_SetPriorityGrouping+0x44>)
|
||
8001838: 68bb ldr r3, [r7, #8]
|
||
800183a: 60d3 str r3, [r2, #12]
|
||
}
|
||
800183c: bf00 nop
|
||
800183e: 3714 adds r7, #20
|
||
8001840: 46bd mov sp, r7
|
||
8001842: bc80 pop {r7}
|
||
8001844: 4770 bx lr
|
||
8001846: bf00 nop
|
||
8001848: e000ed00 .word 0xe000ed00
|
||
|
||
0800184c <__NVIC_GetPriorityGrouping>:
|
||
\brief Get Priority Grouping
|
||
\details Reads the priority grouping field from the NVIC Interrupt Controller.
|
||
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
|
||
*/
|
||
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
|
||
{
|
||
800184c: b480 push {r7}
|
||
800184e: af00 add r7, sp, #0
|
||
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
|
||
8001850: 4b04 ldr r3, [pc, #16] ; (8001864 <__NVIC_GetPriorityGrouping+0x18>)
|
||
8001852: 68db ldr r3, [r3, #12]
|
||
8001854: 0a1b lsrs r3, r3, #8
|
||
8001856: f003 0307 and.w r3, r3, #7
|
||
}
|
||
800185a: 4618 mov r0, r3
|
||
800185c: 46bd mov sp, r7
|
||
800185e: bc80 pop {r7}
|
||
8001860: 4770 bx lr
|
||
8001862: bf00 nop
|
||
8001864: e000ed00 .word 0xe000ed00
|
||
|
||
08001868 <__NVIC_SetPriority>:
|
||
\param [in] IRQn Interrupt number.
|
||
\param [in] priority Priority to set.
|
||
\note The priority cannot be set for every processor exception.
|
||
*/
|
||
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
||
{
|
||
8001868: b480 push {r7}
|
||
800186a: b083 sub sp, #12
|
||
800186c: af00 add r7, sp, #0
|
||
800186e: 4603 mov r3, r0
|
||
8001870: 6039 str r1, [r7, #0]
|
||
8001872: 71fb strb r3, [r7, #7]
|
||
if ((int32_t)(IRQn) >= 0)
|
||
8001874: f997 3007 ldrsb.w r3, [r7, #7]
|
||
8001878: 2b00 cmp r3, #0
|
||
800187a: db0a blt.n 8001892 <__NVIC_SetPriority+0x2a>
|
||
{
|
||
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
800187c: 683b ldr r3, [r7, #0]
|
||
800187e: b2da uxtb r2, r3
|
||
8001880: 490c ldr r1, [pc, #48] ; (80018b4 <__NVIC_SetPriority+0x4c>)
|
||
8001882: f997 3007 ldrsb.w r3, [r7, #7]
|
||
8001886: 0112 lsls r2, r2, #4
|
||
8001888: b2d2 uxtb r2, r2
|
||
800188a: 440b add r3, r1
|
||
800188c: f883 2300 strb.w r2, [r3, #768] ; 0x300
|
||
}
|
||
else
|
||
{
|
||
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
}
|
||
}
|
||
8001890: e00a b.n 80018a8 <__NVIC_SetPriority+0x40>
|
||
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
8001892: 683b ldr r3, [r7, #0]
|
||
8001894: b2da uxtb r2, r3
|
||
8001896: 4908 ldr r1, [pc, #32] ; (80018b8 <__NVIC_SetPriority+0x50>)
|
||
8001898: 79fb ldrb r3, [r7, #7]
|
||
800189a: f003 030f and.w r3, r3, #15
|
||
800189e: 3b04 subs r3, #4
|
||
80018a0: 0112 lsls r2, r2, #4
|
||
80018a2: b2d2 uxtb r2, r2
|
||
80018a4: 440b add r3, r1
|
||
80018a6: 761a strb r2, [r3, #24]
|
||
}
|
||
80018a8: bf00 nop
|
||
80018aa: 370c adds r7, #12
|
||
80018ac: 46bd mov sp, r7
|
||
80018ae: bc80 pop {r7}
|
||
80018b0: 4770 bx lr
|
||
80018b2: bf00 nop
|
||
80018b4: e000e100 .word 0xe000e100
|
||
80018b8: e000ed00 .word 0xe000ed00
|
||
|
||
080018bc <NVIC_EncodePriority>:
|
||
\param [in] PreemptPriority Preemptive priority value (starting from 0).
|
||
\param [in] SubPriority Subpriority value (starting from 0).
|
||
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
|
||
*/
|
||
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
|
||
{
|
||
80018bc: b480 push {r7}
|
||
80018be: b089 sub sp, #36 ; 0x24
|
||
80018c0: af00 add r7, sp, #0
|
||
80018c2: 60f8 str r0, [r7, #12]
|
||
80018c4: 60b9 str r1, [r7, #8]
|
||
80018c6: 607a str r2, [r7, #4]
|
||
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
||
80018c8: 68fb ldr r3, [r7, #12]
|
||
80018ca: f003 0307 and.w r3, r3, #7
|
||
80018ce: 61fb str r3, [r7, #28]
|
||
uint32_t PreemptPriorityBits;
|
||
uint32_t SubPriorityBits;
|
||
|
||
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
|
||
80018d0: 69fb ldr r3, [r7, #28]
|
||
80018d2: f1c3 0307 rsb r3, r3, #7
|
||
80018d6: 2b04 cmp r3, #4
|
||
80018d8: bf28 it cs
|
||
80018da: 2304 movcs r3, #4
|
||
80018dc: 61bb str r3, [r7, #24]
|
||
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
|
||
80018de: 69fb ldr r3, [r7, #28]
|
||
80018e0: 3304 adds r3, #4
|
||
80018e2: 2b06 cmp r3, #6
|
||
80018e4: d902 bls.n 80018ec <NVIC_EncodePriority+0x30>
|
||
80018e6: 69fb ldr r3, [r7, #28]
|
||
80018e8: 3b03 subs r3, #3
|
||
80018ea: e000 b.n 80018ee <NVIC_EncodePriority+0x32>
|
||
80018ec: 2300 movs r3, #0
|
||
80018ee: 617b str r3, [r7, #20]
|
||
|
||
return (
|
||
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
||
80018f0: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
80018f4: 69bb ldr r3, [r7, #24]
|
||
80018f6: fa02 f303 lsl.w r3, r2, r3
|
||
80018fa: 43da mvns r2, r3
|
||
80018fc: 68bb ldr r3, [r7, #8]
|
||
80018fe: 401a ands r2, r3
|
||
8001900: 697b ldr r3, [r7, #20]
|
||
8001902: 409a lsls r2, r3
|
||
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
|
||
8001904: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
|
||
8001908: 697b ldr r3, [r7, #20]
|
||
800190a: fa01 f303 lsl.w r3, r1, r3
|
||
800190e: 43d9 mvns r1, r3
|
||
8001910: 687b ldr r3, [r7, #4]
|
||
8001912: 400b ands r3, r1
|
||
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
||
8001914: 4313 orrs r3, r2
|
||
);
|
||
}
|
||
8001916: 4618 mov r0, r3
|
||
8001918: 3724 adds r7, #36 ; 0x24
|
||
800191a: 46bd mov sp, r7
|
||
800191c: bc80 pop {r7}
|
||
800191e: 4770 bx lr
|
||
|
||
08001920 <SysTick_Config>:
|
||
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
||
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
||
must contain a vendor-specific implementation of this function.
|
||
*/
|
||
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
||
{
|
||
8001920: b580 push {r7, lr}
|
||
8001922: b082 sub sp, #8
|
||
8001924: af00 add r7, sp, #0
|
||
8001926: 6078 str r0, [r7, #4]
|
||
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
||
8001928: 687b ldr r3, [r7, #4]
|
||
800192a: 3b01 subs r3, #1
|
||
800192c: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
|
||
8001930: d301 bcc.n 8001936 <SysTick_Config+0x16>
|
||
{
|
||
return (1UL); /* Reload value impossible */
|
||
8001932: 2301 movs r3, #1
|
||
8001934: e00f b.n 8001956 <SysTick_Config+0x36>
|
||
}
|
||
|
||
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
||
8001936: 4a0a ldr r2, [pc, #40] ; (8001960 <SysTick_Config+0x40>)
|
||
8001938: 687b ldr r3, [r7, #4]
|
||
800193a: 3b01 subs r3, #1
|
||
800193c: 6053 str r3, [r2, #4]
|
||
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
||
800193e: 210f movs r1, #15
|
||
8001940: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8001944: f7ff ff90 bl 8001868 <__NVIC_SetPriority>
|
||
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
||
8001948: 4b05 ldr r3, [pc, #20] ; (8001960 <SysTick_Config+0x40>)
|
||
800194a: 2200 movs r2, #0
|
||
800194c: 609a str r2, [r3, #8]
|
||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
||
800194e: 4b04 ldr r3, [pc, #16] ; (8001960 <SysTick_Config+0x40>)
|
||
8001950: 2207 movs r2, #7
|
||
8001952: 601a str r2, [r3, #0]
|
||
SysTick_CTRL_TICKINT_Msk |
|
||
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
||
return (0UL); /* Function successful */
|
||
8001954: 2300 movs r3, #0
|
||
}
|
||
8001956: 4618 mov r0, r3
|
||
8001958: 3708 adds r7, #8
|
||
800195a: 46bd mov sp, r7
|
||
800195c: bd80 pop {r7, pc}
|
||
800195e: bf00 nop
|
||
8001960: e000e010 .word 0xe000e010
|
||
|
||
08001964 <HAL_NVIC_SetPriorityGrouping>:
|
||
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
|
||
* The pending IRQ priority will be managed only by the subpriority.
|
||
* @retval None
|
||
*/
|
||
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
||
{
|
||
8001964: b580 push {r7, lr}
|
||
8001966: b082 sub sp, #8
|
||
8001968: af00 add r7, sp, #0
|
||
800196a: 6078 str r0, [r7, #4]
|
||
/* Check the parameters */
|
||
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
|
||
|
||
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
|
||
NVIC_SetPriorityGrouping(PriorityGroup);
|
||
800196c: 6878 ldr r0, [r7, #4]
|
||
800196e: f7ff ff49 bl 8001804 <__NVIC_SetPriorityGrouping>
|
||
}
|
||
8001972: bf00 nop
|
||
8001974: 3708 adds r7, #8
|
||
8001976: 46bd mov sp, r7
|
||
8001978: bd80 pop {r7, pc}
|
||
|
||
0800197a <HAL_NVIC_SetPriority>:
|
||
* This parameter can be a value between 0 and 15
|
||
* A lower priority value indicates a higher priority.
|
||
* @retval None
|
||
*/
|
||
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
||
{
|
||
800197a: b580 push {r7, lr}
|
||
800197c: b086 sub sp, #24
|
||
800197e: af00 add r7, sp, #0
|
||
8001980: 4603 mov r3, r0
|
||
8001982: 60b9 str r1, [r7, #8]
|
||
8001984: 607a str r2, [r7, #4]
|
||
8001986: 73fb strb r3, [r7, #15]
|
||
uint32_t prioritygroup = 0x00U;
|
||
8001988: 2300 movs r3, #0
|
||
800198a: 617b str r3, [r7, #20]
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
|
||
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
||
|
||
prioritygroup = NVIC_GetPriorityGrouping();
|
||
800198c: f7ff ff5e bl 800184c <__NVIC_GetPriorityGrouping>
|
||
8001990: 6178 str r0, [r7, #20]
|
||
|
||
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
|
||
8001992: 687a ldr r2, [r7, #4]
|
||
8001994: 68b9 ldr r1, [r7, #8]
|
||
8001996: 6978 ldr r0, [r7, #20]
|
||
8001998: f7ff ff90 bl 80018bc <NVIC_EncodePriority>
|
||
800199c: 4602 mov r2, r0
|
||
800199e: f997 300f ldrsb.w r3, [r7, #15]
|
||
80019a2: 4611 mov r1, r2
|
||
80019a4: 4618 mov r0, r3
|
||
80019a6: f7ff ff5f bl 8001868 <__NVIC_SetPriority>
|
||
}
|
||
80019aa: bf00 nop
|
||
80019ac: 3718 adds r7, #24
|
||
80019ae: 46bd mov sp, r7
|
||
80019b0: bd80 pop {r7, pc}
|
||
|
||
080019b2 <HAL_SYSTICK_Config>:
|
||
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
|
||
* @retval status: - 0 Function succeeded.
|
||
* - 1 Function failed.
|
||
*/
|
||
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
||
{
|
||
80019b2: b580 push {r7, lr}
|
||
80019b4: b082 sub sp, #8
|
||
80019b6: af00 add r7, sp, #0
|
||
80019b8: 6078 str r0, [r7, #4]
|
||
return SysTick_Config(TicksNumb);
|
||
80019ba: 6878 ldr r0, [r7, #4]
|
||
80019bc: f7ff ffb0 bl 8001920 <SysTick_Config>
|
||
80019c0: 4603 mov r3, r0
|
||
}
|
||
80019c2: 4618 mov r0, r3
|
||
80019c4: 3708 adds r7, #8
|
||
80019c6: 46bd mov sp, r7
|
||
80019c8: bd80 pop {r7, pc}
|
||
...
|
||
|
||
080019cc <HAL_GPIO_Init>:
|
||
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
|
||
* the configuration information for the specified GPIO peripheral.
|
||
* @retval None
|
||
*/
|
||
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
||
{
|
||
80019cc: b480 push {r7}
|
||
80019ce: b08b sub sp, #44 ; 0x2c
|
||
80019d0: af00 add r7, sp, #0
|
||
80019d2: 6078 str r0, [r7, #4]
|
||
80019d4: 6039 str r1, [r7, #0]
|
||
uint32_t position = 0x00u;
|
||
80019d6: 2300 movs r3, #0
|
||
80019d8: 627b str r3, [r7, #36] ; 0x24
|
||
uint32_t ioposition;
|
||
uint32_t iocurrent;
|
||
uint32_t temp;
|
||
uint32_t config = 0x00u;
|
||
80019da: 2300 movs r3, #0
|
||
80019dc: 623b str r3, [r7, #32]
|
||
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
||
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
|
||
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
|
||
|
||
/* Configure the port pins */
|
||
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
||
80019de: e179 b.n 8001cd4 <HAL_GPIO_Init+0x308>
|
||
{
|
||
/* Get the IO position */
|
||
ioposition = (0x01uL << position);
|
||
80019e0: 2201 movs r2, #1
|
||
80019e2: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80019e4: fa02 f303 lsl.w r3, r2, r3
|
||
80019e8: 61fb str r3, [r7, #28]
|
||
|
||
/* Get the current IO position */
|
||
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
|
||
80019ea: 683b ldr r3, [r7, #0]
|
||
80019ec: 681b ldr r3, [r3, #0]
|
||
80019ee: 69fa ldr r2, [r7, #28]
|
||
80019f0: 4013 ands r3, r2
|
||
80019f2: 61bb str r3, [r7, #24]
|
||
|
||
if (iocurrent == ioposition)
|
||
80019f4: 69ba ldr r2, [r7, #24]
|
||
80019f6: 69fb ldr r3, [r7, #28]
|
||
80019f8: 429a cmp r2, r3
|
||
80019fa: f040 8168 bne.w 8001cce <HAL_GPIO_Init+0x302>
|
||
{
|
||
/* Check the Alternate function parameters */
|
||
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
|
||
|
||
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
|
||
switch (GPIO_Init->Mode)
|
||
80019fe: 683b ldr r3, [r7, #0]
|
||
8001a00: 685b ldr r3, [r3, #4]
|
||
8001a02: 4aa0 ldr r2, [pc, #640] ; (8001c84 <HAL_GPIO_Init+0x2b8>)
|
||
8001a04: 4293 cmp r3, r2
|
||
8001a06: d05e beq.n 8001ac6 <HAL_GPIO_Init+0xfa>
|
||
8001a08: 4a9e ldr r2, [pc, #632] ; (8001c84 <HAL_GPIO_Init+0x2b8>)
|
||
8001a0a: 4293 cmp r3, r2
|
||
8001a0c: d875 bhi.n 8001afa <HAL_GPIO_Init+0x12e>
|
||
8001a0e: 4a9e ldr r2, [pc, #632] ; (8001c88 <HAL_GPIO_Init+0x2bc>)
|
||
8001a10: 4293 cmp r3, r2
|
||
8001a12: d058 beq.n 8001ac6 <HAL_GPIO_Init+0xfa>
|
||
8001a14: 4a9c ldr r2, [pc, #624] ; (8001c88 <HAL_GPIO_Init+0x2bc>)
|
||
8001a16: 4293 cmp r3, r2
|
||
8001a18: d86f bhi.n 8001afa <HAL_GPIO_Init+0x12e>
|
||
8001a1a: 4a9c ldr r2, [pc, #624] ; (8001c8c <HAL_GPIO_Init+0x2c0>)
|
||
8001a1c: 4293 cmp r3, r2
|
||
8001a1e: d052 beq.n 8001ac6 <HAL_GPIO_Init+0xfa>
|
||
8001a20: 4a9a ldr r2, [pc, #616] ; (8001c8c <HAL_GPIO_Init+0x2c0>)
|
||
8001a22: 4293 cmp r3, r2
|
||
8001a24: d869 bhi.n 8001afa <HAL_GPIO_Init+0x12e>
|
||
8001a26: 4a9a ldr r2, [pc, #616] ; (8001c90 <HAL_GPIO_Init+0x2c4>)
|
||
8001a28: 4293 cmp r3, r2
|
||
8001a2a: d04c beq.n 8001ac6 <HAL_GPIO_Init+0xfa>
|
||
8001a2c: 4a98 ldr r2, [pc, #608] ; (8001c90 <HAL_GPIO_Init+0x2c4>)
|
||
8001a2e: 4293 cmp r3, r2
|
||
8001a30: d863 bhi.n 8001afa <HAL_GPIO_Init+0x12e>
|
||
8001a32: 4a98 ldr r2, [pc, #608] ; (8001c94 <HAL_GPIO_Init+0x2c8>)
|
||
8001a34: 4293 cmp r3, r2
|
||
8001a36: d046 beq.n 8001ac6 <HAL_GPIO_Init+0xfa>
|
||
8001a38: 4a96 ldr r2, [pc, #600] ; (8001c94 <HAL_GPIO_Init+0x2c8>)
|
||
8001a3a: 4293 cmp r3, r2
|
||
8001a3c: d85d bhi.n 8001afa <HAL_GPIO_Init+0x12e>
|
||
8001a3e: 2b12 cmp r3, #18
|
||
8001a40: d82a bhi.n 8001a98 <HAL_GPIO_Init+0xcc>
|
||
8001a42: 2b12 cmp r3, #18
|
||
8001a44: d859 bhi.n 8001afa <HAL_GPIO_Init+0x12e>
|
||
8001a46: a201 add r2, pc, #4 ; (adr r2, 8001a4c <HAL_GPIO_Init+0x80>)
|
||
8001a48: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
8001a4c: 08001ac7 .word 0x08001ac7
|
||
8001a50: 08001aa1 .word 0x08001aa1
|
||
8001a54: 08001ab3 .word 0x08001ab3
|
||
8001a58: 08001af5 .word 0x08001af5
|
||
8001a5c: 08001afb .word 0x08001afb
|
||
8001a60: 08001afb .word 0x08001afb
|
||
8001a64: 08001afb .word 0x08001afb
|
||
8001a68: 08001afb .word 0x08001afb
|
||
8001a6c: 08001afb .word 0x08001afb
|
||
8001a70: 08001afb .word 0x08001afb
|
||
8001a74: 08001afb .word 0x08001afb
|
||
8001a78: 08001afb .word 0x08001afb
|
||
8001a7c: 08001afb .word 0x08001afb
|
||
8001a80: 08001afb .word 0x08001afb
|
||
8001a84: 08001afb .word 0x08001afb
|
||
8001a88: 08001afb .word 0x08001afb
|
||
8001a8c: 08001afb .word 0x08001afb
|
||
8001a90: 08001aa9 .word 0x08001aa9
|
||
8001a94: 08001abd .word 0x08001abd
|
||
8001a98: 4a7f ldr r2, [pc, #508] ; (8001c98 <HAL_GPIO_Init+0x2cc>)
|
||
8001a9a: 4293 cmp r3, r2
|
||
8001a9c: d013 beq.n 8001ac6 <HAL_GPIO_Init+0xfa>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
||
break;
|
||
|
||
/* Parameters are checked with assert_param */
|
||
default:
|
||
break;
|
||
8001a9e: e02c b.n 8001afa <HAL_GPIO_Init+0x12e>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
|
||
8001aa0: 683b ldr r3, [r7, #0]
|
||
8001aa2: 68db ldr r3, [r3, #12]
|
||
8001aa4: 623b str r3, [r7, #32]
|
||
break;
|
||
8001aa6: e029 b.n 8001afc <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
|
||
8001aa8: 683b ldr r3, [r7, #0]
|
||
8001aaa: 68db ldr r3, [r3, #12]
|
||
8001aac: 3304 adds r3, #4
|
||
8001aae: 623b str r3, [r7, #32]
|
||
break;
|
||
8001ab0: e024 b.n 8001afc <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
|
||
8001ab2: 683b ldr r3, [r7, #0]
|
||
8001ab4: 68db ldr r3, [r3, #12]
|
||
8001ab6: 3308 adds r3, #8
|
||
8001ab8: 623b str r3, [r7, #32]
|
||
break;
|
||
8001aba: e01f b.n 8001afc <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
|
||
8001abc: 683b ldr r3, [r7, #0]
|
||
8001abe: 68db ldr r3, [r3, #12]
|
||
8001ac0: 330c adds r3, #12
|
||
8001ac2: 623b str r3, [r7, #32]
|
||
break;
|
||
8001ac4: e01a b.n 8001afc <HAL_GPIO_Init+0x130>
|
||
if (GPIO_Init->Pull == GPIO_NOPULL)
|
||
8001ac6: 683b ldr r3, [r7, #0]
|
||
8001ac8: 689b ldr r3, [r3, #8]
|
||
8001aca: 2b00 cmp r3, #0
|
||
8001acc: d102 bne.n 8001ad4 <HAL_GPIO_Init+0x108>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
|
||
8001ace: 2304 movs r3, #4
|
||
8001ad0: 623b str r3, [r7, #32]
|
||
break;
|
||
8001ad2: e013 b.n 8001afc <HAL_GPIO_Init+0x130>
|
||
else if (GPIO_Init->Pull == GPIO_PULLUP)
|
||
8001ad4: 683b ldr r3, [r7, #0]
|
||
8001ad6: 689b ldr r3, [r3, #8]
|
||
8001ad8: 2b01 cmp r3, #1
|
||
8001ada: d105 bne.n 8001ae8 <HAL_GPIO_Init+0x11c>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
||
8001adc: 2308 movs r3, #8
|
||
8001ade: 623b str r3, [r7, #32]
|
||
GPIOx->BSRR = ioposition;
|
||
8001ae0: 687b ldr r3, [r7, #4]
|
||
8001ae2: 69fa ldr r2, [r7, #28]
|
||
8001ae4: 611a str r2, [r3, #16]
|
||
break;
|
||
8001ae6: e009 b.n 8001afc <HAL_GPIO_Init+0x130>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
||
8001ae8: 2308 movs r3, #8
|
||
8001aea: 623b str r3, [r7, #32]
|
||
GPIOx->BRR = ioposition;
|
||
8001aec: 687b ldr r3, [r7, #4]
|
||
8001aee: 69fa ldr r2, [r7, #28]
|
||
8001af0: 615a str r2, [r3, #20]
|
||
break;
|
||
8001af2: e003 b.n 8001afc <HAL_GPIO_Init+0x130>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
||
8001af4: 2300 movs r3, #0
|
||
8001af6: 623b str r3, [r7, #32]
|
||
break;
|
||
8001af8: e000 b.n 8001afc <HAL_GPIO_Init+0x130>
|
||
break;
|
||
8001afa: bf00 nop
|
||
}
|
||
|
||
/* Check if the current bit belongs to first half or last half of the pin count number
|
||
in order to address CRH or CRL register*/
|
||
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
|
||
8001afc: 69bb ldr r3, [r7, #24]
|
||
8001afe: 2bff cmp r3, #255 ; 0xff
|
||
8001b00: d801 bhi.n 8001b06 <HAL_GPIO_Init+0x13a>
|
||
8001b02: 687b ldr r3, [r7, #4]
|
||
8001b04: e001 b.n 8001b0a <HAL_GPIO_Init+0x13e>
|
||
8001b06: 687b ldr r3, [r7, #4]
|
||
8001b08: 3304 adds r3, #4
|
||
8001b0a: 617b str r3, [r7, #20]
|
||
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
|
||
8001b0c: 69bb ldr r3, [r7, #24]
|
||
8001b0e: 2bff cmp r3, #255 ; 0xff
|
||
8001b10: d802 bhi.n 8001b18 <HAL_GPIO_Init+0x14c>
|
||
8001b12: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001b14: 009b lsls r3, r3, #2
|
||
8001b16: e002 b.n 8001b1e <HAL_GPIO_Init+0x152>
|
||
8001b18: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001b1a: 3b08 subs r3, #8
|
||
8001b1c: 009b lsls r3, r3, #2
|
||
8001b1e: 613b str r3, [r7, #16]
|
||
|
||
/* Apply the new configuration of the pin to the register */
|
||
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
|
||
8001b20: 697b ldr r3, [r7, #20]
|
||
8001b22: 681a ldr r2, [r3, #0]
|
||
8001b24: 210f movs r1, #15
|
||
8001b26: 693b ldr r3, [r7, #16]
|
||
8001b28: fa01 f303 lsl.w r3, r1, r3
|
||
8001b2c: 43db mvns r3, r3
|
||
8001b2e: 401a ands r2, r3
|
||
8001b30: 6a39 ldr r1, [r7, #32]
|
||
8001b32: 693b ldr r3, [r7, #16]
|
||
8001b34: fa01 f303 lsl.w r3, r1, r3
|
||
8001b38: 431a orrs r2, r3
|
||
8001b3a: 697b ldr r3, [r7, #20]
|
||
8001b3c: 601a str r2, [r3, #0]
|
||
|
||
/*--------------------- EXTI Mode Configuration ------------------------*/
|
||
/* Configure the External Interrupt or event for the current IO */
|
||
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
|
||
8001b3e: 683b ldr r3, [r7, #0]
|
||
8001b40: 685b ldr r3, [r3, #4]
|
||
8001b42: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
8001b46: 2b00 cmp r3, #0
|
||
8001b48: f000 80c1 beq.w 8001cce <HAL_GPIO_Init+0x302>
|
||
{
|
||
/* Enable AFIO Clock */
|
||
__HAL_RCC_AFIO_CLK_ENABLE();
|
||
8001b4c: 4b53 ldr r3, [pc, #332] ; (8001c9c <HAL_GPIO_Init+0x2d0>)
|
||
8001b4e: 699b ldr r3, [r3, #24]
|
||
8001b50: 4a52 ldr r2, [pc, #328] ; (8001c9c <HAL_GPIO_Init+0x2d0>)
|
||
8001b52: f043 0301 orr.w r3, r3, #1
|
||
8001b56: 6193 str r3, [r2, #24]
|
||
8001b58: 4b50 ldr r3, [pc, #320] ; (8001c9c <HAL_GPIO_Init+0x2d0>)
|
||
8001b5a: 699b ldr r3, [r3, #24]
|
||
8001b5c: f003 0301 and.w r3, r3, #1
|
||
8001b60: 60bb str r3, [r7, #8]
|
||
8001b62: 68bb ldr r3, [r7, #8]
|
||
temp = AFIO->EXTICR[position >> 2u];
|
||
8001b64: 4a4e ldr r2, [pc, #312] ; (8001ca0 <HAL_GPIO_Init+0x2d4>)
|
||
8001b66: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001b68: 089b lsrs r3, r3, #2
|
||
8001b6a: 3302 adds r3, #2
|
||
8001b6c: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
||
8001b70: 60fb str r3, [r7, #12]
|
||
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
|
||
8001b72: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001b74: f003 0303 and.w r3, r3, #3
|
||
8001b78: 009b lsls r3, r3, #2
|
||
8001b7a: 220f movs r2, #15
|
||
8001b7c: fa02 f303 lsl.w r3, r2, r3
|
||
8001b80: 43db mvns r3, r3
|
||
8001b82: 68fa ldr r2, [r7, #12]
|
||
8001b84: 4013 ands r3, r2
|
||
8001b86: 60fb str r3, [r7, #12]
|
||
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
|
||
8001b88: 687b ldr r3, [r7, #4]
|
||
8001b8a: 4a46 ldr r2, [pc, #280] ; (8001ca4 <HAL_GPIO_Init+0x2d8>)
|
||
8001b8c: 4293 cmp r3, r2
|
||
8001b8e: d01f beq.n 8001bd0 <HAL_GPIO_Init+0x204>
|
||
8001b90: 687b ldr r3, [r7, #4]
|
||
8001b92: 4a45 ldr r2, [pc, #276] ; (8001ca8 <HAL_GPIO_Init+0x2dc>)
|
||
8001b94: 4293 cmp r3, r2
|
||
8001b96: d019 beq.n 8001bcc <HAL_GPIO_Init+0x200>
|
||
8001b98: 687b ldr r3, [r7, #4]
|
||
8001b9a: 4a44 ldr r2, [pc, #272] ; (8001cac <HAL_GPIO_Init+0x2e0>)
|
||
8001b9c: 4293 cmp r3, r2
|
||
8001b9e: d013 beq.n 8001bc8 <HAL_GPIO_Init+0x1fc>
|
||
8001ba0: 687b ldr r3, [r7, #4]
|
||
8001ba2: 4a43 ldr r2, [pc, #268] ; (8001cb0 <HAL_GPIO_Init+0x2e4>)
|
||
8001ba4: 4293 cmp r3, r2
|
||
8001ba6: d00d beq.n 8001bc4 <HAL_GPIO_Init+0x1f8>
|
||
8001ba8: 687b ldr r3, [r7, #4]
|
||
8001baa: 4a42 ldr r2, [pc, #264] ; (8001cb4 <HAL_GPIO_Init+0x2e8>)
|
||
8001bac: 4293 cmp r3, r2
|
||
8001bae: d007 beq.n 8001bc0 <HAL_GPIO_Init+0x1f4>
|
||
8001bb0: 687b ldr r3, [r7, #4]
|
||
8001bb2: 4a41 ldr r2, [pc, #260] ; (8001cb8 <HAL_GPIO_Init+0x2ec>)
|
||
8001bb4: 4293 cmp r3, r2
|
||
8001bb6: d101 bne.n 8001bbc <HAL_GPIO_Init+0x1f0>
|
||
8001bb8: 2305 movs r3, #5
|
||
8001bba: e00a b.n 8001bd2 <HAL_GPIO_Init+0x206>
|
||
8001bbc: 2306 movs r3, #6
|
||
8001bbe: e008 b.n 8001bd2 <HAL_GPIO_Init+0x206>
|
||
8001bc0: 2304 movs r3, #4
|
||
8001bc2: e006 b.n 8001bd2 <HAL_GPIO_Init+0x206>
|
||
8001bc4: 2303 movs r3, #3
|
||
8001bc6: e004 b.n 8001bd2 <HAL_GPIO_Init+0x206>
|
||
8001bc8: 2302 movs r3, #2
|
||
8001bca: e002 b.n 8001bd2 <HAL_GPIO_Init+0x206>
|
||
8001bcc: 2301 movs r3, #1
|
||
8001bce: e000 b.n 8001bd2 <HAL_GPIO_Init+0x206>
|
||
8001bd0: 2300 movs r3, #0
|
||
8001bd2: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8001bd4: f002 0203 and.w r2, r2, #3
|
||
8001bd8: 0092 lsls r2, r2, #2
|
||
8001bda: 4093 lsls r3, r2
|
||
8001bdc: 68fa ldr r2, [r7, #12]
|
||
8001bde: 4313 orrs r3, r2
|
||
8001be0: 60fb str r3, [r7, #12]
|
||
AFIO->EXTICR[position >> 2u] = temp;
|
||
8001be2: 492f ldr r1, [pc, #188] ; (8001ca0 <HAL_GPIO_Init+0x2d4>)
|
||
8001be4: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001be6: 089b lsrs r3, r3, #2
|
||
8001be8: 3302 adds r3, #2
|
||
8001bea: 68fa ldr r2, [r7, #12]
|
||
8001bec: f841 2023 str.w r2, [r1, r3, lsl #2]
|
||
|
||
|
||
/* Configure the interrupt mask */
|
||
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
|
||
8001bf0: 683b ldr r3, [r7, #0]
|
||
8001bf2: 685b ldr r3, [r3, #4]
|
||
8001bf4: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8001bf8: 2b00 cmp r3, #0
|
||
8001bfa: d006 beq.n 8001c0a <HAL_GPIO_Init+0x23e>
|
||
{
|
||
SET_BIT(EXTI->IMR, iocurrent);
|
||
8001bfc: 4b2f ldr r3, [pc, #188] ; (8001cbc <HAL_GPIO_Init+0x2f0>)
|
||
8001bfe: 681a ldr r2, [r3, #0]
|
||
8001c00: 492e ldr r1, [pc, #184] ; (8001cbc <HAL_GPIO_Init+0x2f0>)
|
||
8001c02: 69bb ldr r3, [r7, #24]
|
||
8001c04: 4313 orrs r3, r2
|
||
8001c06: 600b str r3, [r1, #0]
|
||
8001c08: e006 b.n 8001c18 <HAL_GPIO_Init+0x24c>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->IMR, iocurrent);
|
||
8001c0a: 4b2c ldr r3, [pc, #176] ; (8001cbc <HAL_GPIO_Init+0x2f0>)
|
||
8001c0c: 681a ldr r2, [r3, #0]
|
||
8001c0e: 69bb ldr r3, [r7, #24]
|
||
8001c10: 43db mvns r3, r3
|
||
8001c12: 492a ldr r1, [pc, #168] ; (8001cbc <HAL_GPIO_Init+0x2f0>)
|
||
8001c14: 4013 ands r3, r2
|
||
8001c16: 600b str r3, [r1, #0]
|
||
}
|
||
|
||
/* Configure the event mask */
|
||
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
|
||
8001c18: 683b ldr r3, [r7, #0]
|
||
8001c1a: 685b ldr r3, [r3, #4]
|
||
8001c1c: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8001c20: 2b00 cmp r3, #0
|
||
8001c22: d006 beq.n 8001c32 <HAL_GPIO_Init+0x266>
|
||
{
|
||
SET_BIT(EXTI->EMR, iocurrent);
|
||
8001c24: 4b25 ldr r3, [pc, #148] ; (8001cbc <HAL_GPIO_Init+0x2f0>)
|
||
8001c26: 685a ldr r2, [r3, #4]
|
||
8001c28: 4924 ldr r1, [pc, #144] ; (8001cbc <HAL_GPIO_Init+0x2f0>)
|
||
8001c2a: 69bb ldr r3, [r7, #24]
|
||
8001c2c: 4313 orrs r3, r2
|
||
8001c2e: 604b str r3, [r1, #4]
|
||
8001c30: e006 b.n 8001c40 <HAL_GPIO_Init+0x274>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->EMR, iocurrent);
|
||
8001c32: 4b22 ldr r3, [pc, #136] ; (8001cbc <HAL_GPIO_Init+0x2f0>)
|
||
8001c34: 685a ldr r2, [r3, #4]
|
||
8001c36: 69bb ldr r3, [r7, #24]
|
||
8001c38: 43db mvns r3, r3
|
||
8001c3a: 4920 ldr r1, [pc, #128] ; (8001cbc <HAL_GPIO_Init+0x2f0>)
|
||
8001c3c: 4013 ands r3, r2
|
||
8001c3e: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Enable or disable the rising trigger */
|
||
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
|
||
8001c40: 683b ldr r3, [r7, #0]
|
||
8001c42: 685b ldr r3, [r3, #4]
|
||
8001c44: f403 1380 and.w r3, r3, #1048576 ; 0x100000
|
||
8001c48: 2b00 cmp r3, #0
|
||
8001c4a: d006 beq.n 8001c5a <HAL_GPIO_Init+0x28e>
|
||
{
|
||
SET_BIT(EXTI->RTSR, iocurrent);
|
||
8001c4c: 4b1b ldr r3, [pc, #108] ; (8001cbc <HAL_GPIO_Init+0x2f0>)
|
||
8001c4e: 689a ldr r2, [r3, #8]
|
||
8001c50: 491a ldr r1, [pc, #104] ; (8001cbc <HAL_GPIO_Init+0x2f0>)
|
||
8001c52: 69bb ldr r3, [r7, #24]
|
||
8001c54: 4313 orrs r3, r2
|
||
8001c56: 608b str r3, [r1, #8]
|
||
8001c58: e006 b.n 8001c68 <HAL_GPIO_Init+0x29c>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->RTSR, iocurrent);
|
||
8001c5a: 4b18 ldr r3, [pc, #96] ; (8001cbc <HAL_GPIO_Init+0x2f0>)
|
||
8001c5c: 689a ldr r2, [r3, #8]
|
||
8001c5e: 69bb ldr r3, [r7, #24]
|
||
8001c60: 43db mvns r3, r3
|
||
8001c62: 4916 ldr r1, [pc, #88] ; (8001cbc <HAL_GPIO_Init+0x2f0>)
|
||
8001c64: 4013 ands r3, r2
|
||
8001c66: 608b str r3, [r1, #8]
|
||
}
|
||
|
||
/* Enable or disable the falling trigger */
|
||
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
|
||
8001c68: 683b ldr r3, [r7, #0]
|
||
8001c6a: 685b ldr r3, [r3, #4]
|
||
8001c6c: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
||
8001c70: 2b00 cmp r3, #0
|
||
8001c72: d025 beq.n 8001cc0 <HAL_GPIO_Init+0x2f4>
|
||
{
|
||
SET_BIT(EXTI->FTSR, iocurrent);
|
||
8001c74: 4b11 ldr r3, [pc, #68] ; (8001cbc <HAL_GPIO_Init+0x2f0>)
|
||
8001c76: 68da ldr r2, [r3, #12]
|
||
8001c78: 4910 ldr r1, [pc, #64] ; (8001cbc <HAL_GPIO_Init+0x2f0>)
|
||
8001c7a: 69bb ldr r3, [r7, #24]
|
||
8001c7c: 4313 orrs r3, r2
|
||
8001c7e: 60cb str r3, [r1, #12]
|
||
8001c80: e025 b.n 8001cce <HAL_GPIO_Init+0x302>
|
||
8001c82: bf00 nop
|
||
8001c84: 10320000 .word 0x10320000
|
||
8001c88: 10310000 .word 0x10310000
|
||
8001c8c: 10220000 .word 0x10220000
|
||
8001c90: 10210000 .word 0x10210000
|
||
8001c94: 10120000 .word 0x10120000
|
||
8001c98: 10110000 .word 0x10110000
|
||
8001c9c: 40021000 .word 0x40021000
|
||
8001ca0: 40010000 .word 0x40010000
|
||
8001ca4: 40010800 .word 0x40010800
|
||
8001ca8: 40010c00 .word 0x40010c00
|
||
8001cac: 40011000 .word 0x40011000
|
||
8001cb0: 40011400 .word 0x40011400
|
||
8001cb4: 40011800 .word 0x40011800
|
||
8001cb8: 40011c00 .word 0x40011c00
|
||
8001cbc: 40010400 .word 0x40010400
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->FTSR, iocurrent);
|
||
8001cc0: 4b0b ldr r3, [pc, #44] ; (8001cf0 <HAL_GPIO_Init+0x324>)
|
||
8001cc2: 68da ldr r2, [r3, #12]
|
||
8001cc4: 69bb ldr r3, [r7, #24]
|
||
8001cc6: 43db mvns r3, r3
|
||
8001cc8: 4909 ldr r1, [pc, #36] ; (8001cf0 <HAL_GPIO_Init+0x324>)
|
||
8001cca: 4013 ands r3, r2
|
||
8001ccc: 60cb str r3, [r1, #12]
|
||
}
|
||
}
|
||
}
|
||
|
||
position++;
|
||
8001cce: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001cd0: 3301 adds r3, #1
|
||
8001cd2: 627b str r3, [r7, #36] ; 0x24
|
||
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
||
8001cd4: 683b ldr r3, [r7, #0]
|
||
8001cd6: 681a ldr r2, [r3, #0]
|
||
8001cd8: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001cda: fa22 f303 lsr.w r3, r2, r3
|
||
8001cde: 2b00 cmp r3, #0
|
||
8001ce0: f47f ae7e bne.w 80019e0 <HAL_GPIO_Init+0x14>
|
||
}
|
||
}
|
||
8001ce4: bf00 nop
|
||
8001ce6: bf00 nop
|
||
8001ce8: 372c adds r7, #44 ; 0x2c
|
||
8001cea: 46bd mov sp, r7
|
||
8001cec: bc80 pop {r7}
|
||
8001cee: 4770 bx lr
|
||
8001cf0: 40010400 .word 0x40010400
|
||
|
||
08001cf4 <HAL_GPIO_ReadPin>:
|
||
* @param GPIO_Pin: specifies the port bit to read.
|
||
* This parameter can be GPIO_PIN_x where x can be (0..15).
|
||
* @retval The input port pin value.
|
||
*/
|
||
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
|
||
{
|
||
8001cf4: b480 push {r7}
|
||
8001cf6: b085 sub sp, #20
|
||
8001cf8: af00 add r7, sp, #0
|
||
8001cfa: 6078 str r0, [r7, #4]
|
||
8001cfc: 460b mov r3, r1
|
||
8001cfe: 807b strh r3, [r7, #2]
|
||
GPIO_PinState bitstatus;
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||
|
||
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
|
||
8001d00: 687b ldr r3, [r7, #4]
|
||
8001d02: 689a ldr r2, [r3, #8]
|
||
8001d04: 887b ldrh r3, [r7, #2]
|
||
8001d06: 4013 ands r3, r2
|
||
8001d08: 2b00 cmp r3, #0
|
||
8001d0a: d002 beq.n 8001d12 <HAL_GPIO_ReadPin+0x1e>
|
||
{
|
||
bitstatus = GPIO_PIN_SET;
|
||
8001d0c: 2301 movs r3, #1
|
||
8001d0e: 73fb strb r3, [r7, #15]
|
||
8001d10: e001 b.n 8001d16 <HAL_GPIO_ReadPin+0x22>
|
||
}
|
||
else
|
||
{
|
||
bitstatus = GPIO_PIN_RESET;
|
||
8001d12: 2300 movs r3, #0
|
||
8001d14: 73fb strb r3, [r7, #15]
|
||
}
|
||
return bitstatus;
|
||
8001d16: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
8001d18: 4618 mov r0, r3
|
||
8001d1a: 3714 adds r7, #20
|
||
8001d1c: 46bd mov sp, r7
|
||
8001d1e: bc80 pop {r7}
|
||
8001d20: 4770 bx lr
|
||
|
||
08001d22 <HAL_GPIO_WritePin>:
|
||
* @arg GPIO_PIN_RESET: to clear the port pin
|
||
* @arg GPIO_PIN_SET: to set the port pin
|
||
* @retval None
|
||
*/
|
||
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
|
||
{
|
||
8001d22: b480 push {r7}
|
||
8001d24: b083 sub sp, #12
|
||
8001d26: af00 add r7, sp, #0
|
||
8001d28: 6078 str r0, [r7, #4]
|
||
8001d2a: 460b mov r3, r1
|
||
8001d2c: 807b strh r3, [r7, #2]
|
||
8001d2e: 4613 mov r3, r2
|
||
8001d30: 707b strb r3, [r7, #1]
|
||
/* Check the parameters */
|
||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||
assert_param(IS_GPIO_PIN_ACTION(PinState));
|
||
|
||
if (PinState != GPIO_PIN_RESET)
|
||
8001d32: 787b ldrb r3, [r7, #1]
|
||
8001d34: 2b00 cmp r3, #0
|
||
8001d36: d003 beq.n 8001d40 <HAL_GPIO_WritePin+0x1e>
|
||
{
|
||
GPIOx->BSRR = GPIO_Pin;
|
||
8001d38: 887a ldrh r2, [r7, #2]
|
||
8001d3a: 687b ldr r3, [r7, #4]
|
||
8001d3c: 611a str r2, [r3, #16]
|
||
}
|
||
else
|
||
{
|
||
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
||
}
|
||
}
|
||
8001d3e: e003 b.n 8001d48 <HAL_GPIO_WritePin+0x26>
|
||
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
||
8001d40: 887b ldrh r3, [r7, #2]
|
||
8001d42: 041a lsls r2, r3, #16
|
||
8001d44: 687b ldr r3, [r7, #4]
|
||
8001d46: 611a str r2, [r3, #16]
|
||
}
|
||
8001d48: bf00 nop
|
||
8001d4a: 370c adds r7, #12
|
||
8001d4c: 46bd mov sp, r7
|
||
8001d4e: bc80 pop {r7}
|
||
8001d50: 4770 bx lr
|
||
...
|
||
|
||
08001d54 <HAL_RCC_OscConfig>:
|
||
* supported by this macro. User should request a transition to HSE Off
|
||
* first and then HSE On or HSE Bypass.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
||
{
|
||
8001d54: b580 push {r7, lr}
|
||
8001d56: b086 sub sp, #24
|
||
8001d58: af00 add r7, sp, #0
|
||
8001d5a: 6078 str r0, [r7, #4]
|
||
uint32_t tickstart;
|
||
uint32_t pll_config;
|
||
|
||
/* Check Null pointer */
|
||
if (RCC_OscInitStruct == NULL)
|
||
8001d5c: 687b ldr r3, [r7, #4]
|
||
8001d5e: 2b00 cmp r3, #0
|
||
8001d60: d101 bne.n 8001d66 <HAL_RCC_OscConfig+0x12>
|
||
{
|
||
return HAL_ERROR;
|
||
8001d62: 2301 movs r3, #1
|
||
8001d64: e26c b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
||
|
||
/*------------------------------- HSE Configuration ------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
||
8001d66: 687b ldr r3, [r7, #4]
|
||
8001d68: 681b ldr r3, [r3, #0]
|
||
8001d6a: f003 0301 and.w r3, r3, #1
|
||
8001d6e: 2b00 cmp r3, #0
|
||
8001d70: f000 8087 beq.w 8001e82 <HAL_RCC_OscConfig+0x12e>
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
|
||
|
||
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
|
||
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
|
||
8001d74: 4b92 ldr r3, [pc, #584] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001d76: 685b ldr r3, [r3, #4]
|
||
8001d78: f003 030c and.w r3, r3, #12
|
||
8001d7c: 2b04 cmp r3, #4
|
||
8001d7e: d00c beq.n 8001d9a <HAL_RCC_OscConfig+0x46>
|
||
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
|
||
8001d80: 4b8f ldr r3, [pc, #572] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001d82: 685b ldr r3, [r3, #4]
|
||
8001d84: f003 030c and.w r3, r3, #12
|
||
8001d88: 2b08 cmp r3, #8
|
||
8001d8a: d112 bne.n 8001db2 <HAL_RCC_OscConfig+0x5e>
|
||
8001d8c: 4b8c ldr r3, [pc, #560] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001d8e: 685b ldr r3, [r3, #4]
|
||
8001d90: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8001d94: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8001d98: d10b bne.n 8001db2 <HAL_RCC_OscConfig+0x5e>
|
||
{
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
||
8001d9a: 4b89 ldr r3, [pc, #548] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001d9c: 681b ldr r3, [r3, #0]
|
||
8001d9e: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8001da2: 2b00 cmp r3, #0
|
||
8001da4: d06c beq.n 8001e80 <HAL_RCC_OscConfig+0x12c>
|
||
8001da6: 687b ldr r3, [r7, #4]
|
||
8001da8: 685b ldr r3, [r3, #4]
|
||
8001daa: 2b00 cmp r3, #0
|
||
8001dac: d168 bne.n 8001e80 <HAL_RCC_OscConfig+0x12c>
|
||
{
|
||
return HAL_ERROR;
|
||
8001dae: 2301 movs r3, #1
|
||
8001db0: e246 b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Set the new HSE configuration ---------------------------------------*/
|
||
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
||
8001db2: 687b ldr r3, [r7, #4]
|
||
8001db4: 685b ldr r3, [r3, #4]
|
||
8001db6: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8001dba: d106 bne.n 8001dca <HAL_RCC_OscConfig+0x76>
|
||
8001dbc: 4b80 ldr r3, [pc, #512] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001dbe: 681b ldr r3, [r3, #0]
|
||
8001dc0: 4a7f ldr r2, [pc, #508] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001dc2: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
||
8001dc6: 6013 str r3, [r2, #0]
|
||
8001dc8: e02e b.n 8001e28 <HAL_RCC_OscConfig+0xd4>
|
||
8001dca: 687b ldr r3, [r7, #4]
|
||
8001dcc: 685b ldr r3, [r3, #4]
|
||
8001dce: 2b00 cmp r3, #0
|
||
8001dd0: d10c bne.n 8001dec <HAL_RCC_OscConfig+0x98>
|
||
8001dd2: 4b7b ldr r3, [pc, #492] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001dd4: 681b ldr r3, [r3, #0]
|
||
8001dd6: 4a7a ldr r2, [pc, #488] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001dd8: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
||
8001ddc: 6013 str r3, [r2, #0]
|
||
8001dde: 4b78 ldr r3, [pc, #480] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001de0: 681b ldr r3, [r3, #0]
|
||
8001de2: 4a77 ldr r2, [pc, #476] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001de4: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
||
8001de8: 6013 str r3, [r2, #0]
|
||
8001dea: e01d b.n 8001e28 <HAL_RCC_OscConfig+0xd4>
|
||
8001dec: 687b ldr r3, [r7, #4]
|
||
8001dee: 685b ldr r3, [r3, #4]
|
||
8001df0: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
|
||
8001df4: d10c bne.n 8001e10 <HAL_RCC_OscConfig+0xbc>
|
||
8001df6: 4b72 ldr r3, [pc, #456] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001df8: 681b ldr r3, [r3, #0]
|
||
8001dfa: 4a71 ldr r2, [pc, #452] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001dfc: f443 2380 orr.w r3, r3, #262144 ; 0x40000
|
||
8001e00: 6013 str r3, [r2, #0]
|
||
8001e02: 4b6f ldr r3, [pc, #444] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001e04: 681b ldr r3, [r3, #0]
|
||
8001e06: 4a6e ldr r2, [pc, #440] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001e08: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
||
8001e0c: 6013 str r3, [r2, #0]
|
||
8001e0e: e00b b.n 8001e28 <HAL_RCC_OscConfig+0xd4>
|
||
8001e10: 4b6b ldr r3, [pc, #428] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001e12: 681b ldr r3, [r3, #0]
|
||
8001e14: 4a6a ldr r2, [pc, #424] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001e16: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
||
8001e1a: 6013 str r3, [r2, #0]
|
||
8001e1c: 4b68 ldr r3, [pc, #416] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001e1e: 681b ldr r3, [r3, #0]
|
||
8001e20: 4a67 ldr r2, [pc, #412] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001e22: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
||
8001e26: 6013 str r3, [r2, #0]
|
||
|
||
|
||
/* Check the HSE State */
|
||
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
|
||
8001e28: 687b ldr r3, [r7, #4]
|
||
8001e2a: 685b ldr r3, [r3, #4]
|
||
8001e2c: 2b00 cmp r3, #0
|
||
8001e2e: d013 beq.n 8001e58 <HAL_RCC_OscConfig+0x104>
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8001e30: f7ff fcba bl 80017a8 <HAL_GetTick>
|
||
8001e34: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSE is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
8001e36: e008 b.n 8001e4a <HAL_RCC_OscConfig+0xf6>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
||
8001e38: f7ff fcb6 bl 80017a8 <HAL_GetTick>
|
||
8001e3c: 4602 mov r2, r0
|
||
8001e3e: 693b ldr r3, [r7, #16]
|
||
8001e40: 1ad3 subs r3, r2, r3
|
||
8001e42: 2b64 cmp r3, #100 ; 0x64
|
||
8001e44: d901 bls.n 8001e4a <HAL_RCC_OscConfig+0xf6>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001e46: 2303 movs r3, #3
|
||
8001e48: e1fa b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
8001e4a: 4b5d ldr r3, [pc, #372] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001e4c: 681b ldr r3, [r3, #0]
|
||
8001e4e: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8001e52: 2b00 cmp r3, #0
|
||
8001e54: d0f0 beq.n 8001e38 <HAL_RCC_OscConfig+0xe4>
|
||
8001e56: e014 b.n 8001e82 <HAL_RCC_OscConfig+0x12e>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8001e58: f7ff fca6 bl 80017a8 <HAL_GetTick>
|
||
8001e5c: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSE is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
||
8001e5e: e008 b.n 8001e72 <HAL_RCC_OscConfig+0x11e>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
||
8001e60: f7ff fca2 bl 80017a8 <HAL_GetTick>
|
||
8001e64: 4602 mov r2, r0
|
||
8001e66: 693b ldr r3, [r7, #16]
|
||
8001e68: 1ad3 subs r3, r2, r3
|
||
8001e6a: 2b64 cmp r3, #100 ; 0x64
|
||
8001e6c: d901 bls.n 8001e72 <HAL_RCC_OscConfig+0x11e>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001e6e: 2303 movs r3, #3
|
||
8001e70: e1e6 b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
||
8001e72: 4b53 ldr r3, [pc, #332] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001e74: 681b ldr r3, [r3, #0]
|
||
8001e76: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8001e7a: 2b00 cmp r3, #0
|
||
8001e7c: d1f0 bne.n 8001e60 <HAL_RCC_OscConfig+0x10c>
|
||
8001e7e: e000 b.n 8001e82 <HAL_RCC_OscConfig+0x12e>
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
||
8001e80: bf00 nop
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*----------------------------- HSI Configuration --------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
|
||
8001e82: 687b ldr r3, [r7, #4]
|
||
8001e84: 681b ldr r3, [r3, #0]
|
||
8001e86: f003 0302 and.w r3, r3, #2
|
||
8001e8a: 2b00 cmp r3, #0
|
||
8001e8c: d063 beq.n 8001f56 <HAL_RCC_OscConfig+0x202>
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
|
||
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
|
||
|
||
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
|
||
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
|
||
8001e8e: 4b4c ldr r3, [pc, #304] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001e90: 685b ldr r3, [r3, #4]
|
||
8001e92: f003 030c and.w r3, r3, #12
|
||
8001e96: 2b00 cmp r3, #0
|
||
8001e98: d00b beq.n 8001eb2 <HAL_RCC_OscConfig+0x15e>
|
||
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
|
||
8001e9a: 4b49 ldr r3, [pc, #292] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001e9c: 685b ldr r3, [r3, #4]
|
||
8001e9e: f003 030c and.w r3, r3, #12
|
||
8001ea2: 2b08 cmp r3, #8
|
||
8001ea4: d11c bne.n 8001ee0 <HAL_RCC_OscConfig+0x18c>
|
||
8001ea6: 4b46 ldr r3, [pc, #280] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001ea8: 685b ldr r3, [r3, #4]
|
||
8001eaa: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8001eae: 2b00 cmp r3, #0
|
||
8001eb0: d116 bne.n 8001ee0 <HAL_RCC_OscConfig+0x18c>
|
||
{
|
||
/* When HSI is used as system clock it will not disabled */
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
||
8001eb2: 4b43 ldr r3, [pc, #268] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001eb4: 681b ldr r3, [r3, #0]
|
||
8001eb6: f003 0302 and.w r3, r3, #2
|
||
8001eba: 2b00 cmp r3, #0
|
||
8001ebc: d005 beq.n 8001eca <HAL_RCC_OscConfig+0x176>
|
||
8001ebe: 687b ldr r3, [r7, #4]
|
||
8001ec0: 691b ldr r3, [r3, #16]
|
||
8001ec2: 2b01 cmp r3, #1
|
||
8001ec4: d001 beq.n 8001eca <HAL_RCC_OscConfig+0x176>
|
||
{
|
||
return HAL_ERROR;
|
||
8001ec6: 2301 movs r3, #1
|
||
8001ec8: e1ba b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
/* Otherwise, just the calibration is allowed */
|
||
else
|
||
{
|
||
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
||
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
||
8001eca: 4b3d ldr r3, [pc, #244] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001ecc: 681b ldr r3, [r3, #0]
|
||
8001ece: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
||
8001ed2: 687b ldr r3, [r7, #4]
|
||
8001ed4: 695b ldr r3, [r3, #20]
|
||
8001ed6: 00db lsls r3, r3, #3
|
||
8001ed8: 4939 ldr r1, [pc, #228] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001eda: 4313 orrs r3, r2
|
||
8001edc: 600b str r3, [r1, #0]
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
||
8001ede: e03a b.n 8001f56 <HAL_RCC_OscConfig+0x202>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Check the HSI State */
|
||
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
|
||
8001ee0: 687b ldr r3, [r7, #4]
|
||
8001ee2: 691b ldr r3, [r3, #16]
|
||
8001ee4: 2b00 cmp r3, #0
|
||
8001ee6: d020 beq.n 8001f2a <HAL_RCC_OscConfig+0x1d6>
|
||
{
|
||
/* Enable the Internal High Speed oscillator (HSI). */
|
||
__HAL_RCC_HSI_ENABLE();
|
||
8001ee8: 4b36 ldr r3, [pc, #216] ; (8001fc4 <HAL_RCC_OscConfig+0x270>)
|
||
8001eea: 2201 movs r2, #1
|
||
8001eec: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8001eee: f7ff fc5b bl 80017a8 <HAL_GetTick>
|
||
8001ef2: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSI is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8001ef4: e008 b.n 8001f08 <HAL_RCC_OscConfig+0x1b4>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
||
8001ef6: f7ff fc57 bl 80017a8 <HAL_GetTick>
|
||
8001efa: 4602 mov r2, r0
|
||
8001efc: 693b ldr r3, [r7, #16]
|
||
8001efe: 1ad3 subs r3, r2, r3
|
||
8001f00: 2b02 cmp r3, #2
|
||
8001f02: d901 bls.n 8001f08 <HAL_RCC_OscConfig+0x1b4>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001f04: 2303 movs r3, #3
|
||
8001f06: e19b b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8001f08: 4b2d ldr r3, [pc, #180] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001f0a: 681b ldr r3, [r3, #0]
|
||
8001f0c: f003 0302 and.w r3, r3, #2
|
||
8001f10: 2b00 cmp r3, #0
|
||
8001f12: d0f0 beq.n 8001ef6 <HAL_RCC_OscConfig+0x1a2>
|
||
}
|
||
}
|
||
|
||
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
||
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
||
8001f14: 4b2a ldr r3, [pc, #168] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001f16: 681b ldr r3, [r3, #0]
|
||
8001f18: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
||
8001f1c: 687b ldr r3, [r7, #4]
|
||
8001f1e: 695b ldr r3, [r3, #20]
|
||
8001f20: 00db lsls r3, r3, #3
|
||
8001f22: 4927 ldr r1, [pc, #156] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001f24: 4313 orrs r3, r2
|
||
8001f26: 600b str r3, [r1, #0]
|
||
8001f28: e015 b.n 8001f56 <HAL_RCC_OscConfig+0x202>
|
||
}
|
||
else
|
||
{
|
||
/* Disable the Internal High Speed oscillator (HSI). */
|
||
__HAL_RCC_HSI_DISABLE();
|
||
8001f2a: 4b26 ldr r3, [pc, #152] ; (8001fc4 <HAL_RCC_OscConfig+0x270>)
|
||
8001f2c: 2200 movs r2, #0
|
||
8001f2e: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8001f30: f7ff fc3a bl 80017a8 <HAL_GetTick>
|
||
8001f34: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSI is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
||
8001f36: e008 b.n 8001f4a <HAL_RCC_OscConfig+0x1f6>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
||
8001f38: f7ff fc36 bl 80017a8 <HAL_GetTick>
|
||
8001f3c: 4602 mov r2, r0
|
||
8001f3e: 693b ldr r3, [r7, #16]
|
||
8001f40: 1ad3 subs r3, r2, r3
|
||
8001f42: 2b02 cmp r3, #2
|
||
8001f44: d901 bls.n 8001f4a <HAL_RCC_OscConfig+0x1f6>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001f46: 2303 movs r3, #3
|
||
8001f48: e17a b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
||
8001f4a: 4b1d ldr r3, [pc, #116] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001f4c: 681b ldr r3, [r3, #0]
|
||
8001f4e: f003 0302 and.w r3, r3, #2
|
||
8001f52: 2b00 cmp r3, #0
|
||
8001f54: d1f0 bne.n 8001f38 <HAL_RCC_OscConfig+0x1e4>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*------------------------------ LSI Configuration -------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
|
||
8001f56: 687b ldr r3, [r7, #4]
|
||
8001f58: 681b ldr r3, [r3, #0]
|
||
8001f5a: f003 0308 and.w r3, r3, #8
|
||
8001f5e: 2b00 cmp r3, #0
|
||
8001f60: d03a beq.n 8001fd8 <HAL_RCC_OscConfig+0x284>
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
|
||
|
||
/* Check the LSI State */
|
||
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
|
||
8001f62: 687b ldr r3, [r7, #4]
|
||
8001f64: 699b ldr r3, [r3, #24]
|
||
8001f66: 2b00 cmp r3, #0
|
||
8001f68: d019 beq.n 8001f9e <HAL_RCC_OscConfig+0x24a>
|
||
{
|
||
/* Enable the Internal Low Speed oscillator (LSI). */
|
||
__HAL_RCC_LSI_ENABLE();
|
||
8001f6a: 4b17 ldr r3, [pc, #92] ; (8001fc8 <HAL_RCC_OscConfig+0x274>)
|
||
8001f6c: 2201 movs r2, #1
|
||
8001f6e: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8001f70: f7ff fc1a bl 80017a8 <HAL_GetTick>
|
||
8001f74: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSI is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
||
8001f76: e008 b.n 8001f8a <HAL_RCC_OscConfig+0x236>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
||
8001f78: f7ff fc16 bl 80017a8 <HAL_GetTick>
|
||
8001f7c: 4602 mov r2, r0
|
||
8001f7e: 693b ldr r3, [r7, #16]
|
||
8001f80: 1ad3 subs r3, r2, r3
|
||
8001f82: 2b02 cmp r3, #2
|
||
8001f84: d901 bls.n 8001f8a <HAL_RCC_OscConfig+0x236>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001f86: 2303 movs r3, #3
|
||
8001f88: e15a b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
||
8001f8a: 4b0d ldr r3, [pc, #52] ; (8001fc0 <HAL_RCC_OscConfig+0x26c>)
|
||
8001f8c: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8001f8e: f003 0302 and.w r3, r3, #2
|
||
8001f92: 2b00 cmp r3, #0
|
||
8001f94: d0f0 beq.n 8001f78 <HAL_RCC_OscConfig+0x224>
|
||
}
|
||
}
|
||
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
|
||
should be added.*/
|
||
RCC_Delay(1);
|
||
8001f96: 2001 movs r0, #1
|
||
8001f98: f000 faa6 bl 80024e8 <RCC_Delay>
|
||
8001f9c: e01c b.n 8001fd8 <HAL_RCC_OscConfig+0x284>
|
||
}
|
||
else
|
||
{
|
||
/* Disable the Internal Low Speed oscillator (LSI). */
|
||
__HAL_RCC_LSI_DISABLE();
|
||
8001f9e: 4b0a ldr r3, [pc, #40] ; (8001fc8 <HAL_RCC_OscConfig+0x274>)
|
||
8001fa0: 2200 movs r2, #0
|
||
8001fa2: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8001fa4: f7ff fc00 bl 80017a8 <HAL_GetTick>
|
||
8001fa8: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSI is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
||
8001faa: e00f b.n 8001fcc <HAL_RCC_OscConfig+0x278>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
||
8001fac: f7ff fbfc bl 80017a8 <HAL_GetTick>
|
||
8001fb0: 4602 mov r2, r0
|
||
8001fb2: 693b ldr r3, [r7, #16]
|
||
8001fb4: 1ad3 subs r3, r2, r3
|
||
8001fb6: 2b02 cmp r3, #2
|
||
8001fb8: d908 bls.n 8001fcc <HAL_RCC_OscConfig+0x278>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8001fba: 2303 movs r3, #3
|
||
8001fbc: e140 b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
8001fbe: bf00 nop
|
||
8001fc0: 40021000 .word 0x40021000
|
||
8001fc4: 42420000 .word 0x42420000
|
||
8001fc8: 42420480 .word 0x42420480
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
||
8001fcc: 4b9e ldr r3, [pc, #632] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001fce: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8001fd0: f003 0302 and.w r3, r3, #2
|
||
8001fd4: 2b00 cmp r3, #0
|
||
8001fd6: d1e9 bne.n 8001fac <HAL_RCC_OscConfig+0x258>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*------------------------------ LSE Configuration -------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
|
||
8001fd8: 687b ldr r3, [r7, #4]
|
||
8001fda: 681b ldr r3, [r3, #0]
|
||
8001fdc: f003 0304 and.w r3, r3, #4
|
||
8001fe0: 2b00 cmp r3, #0
|
||
8001fe2: f000 80a6 beq.w 8002132 <HAL_RCC_OscConfig+0x3de>
|
||
{
|
||
FlagStatus pwrclkchanged = RESET;
|
||
8001fe6: 2300 movs r3, #0
|
||
8001fe8: 75fb strb r3, [r7, #23]
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
|
||
|
||
/* Update LSE configuration in Backup Domain control register */
|
||
/* Requires to enable write access to Backup Domain of necessary */
|
||
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
|
||
8001fea: 4b97 ldr r3, [pc, #604] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001fec: 69db ldr r3, [r3, #28]
|
||
8001fee: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
8001ff2: 2b00 cmp r3, #0
|
||
8001ff4: d10d bne.n 8002012 <HAL_RCC_OscConfig+0x2be>
|
||
{
|
||
__HAL_RCC_PWR_CLK_ENABLE();
|
||
8001ff6: 4b94 ldr r3, [pc, #592] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001ff8: 69db ldr r3, [r3, #28]
|
||
8001ffa: 4a93 ldr r2, [pc, #588] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8001ffc: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
||
8002000: 61d3 str r3, [r2, #28]
|
||
8002002: 4b91 ldr r3, [pc, #580] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8002004: 69db ldr r3, [r3, #28]
|
||
8002006: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
800200a: 60bb str r3, [r7, #8]
|
||
800200c: 68bb ldr r3, [r7, #8]
|
||
pwrclkchanged = SET;
|
||
800200e: 2301 movs r3, #1
|
||
8002010: 75fb strb r3, [r7, #23]
|
||
}
|
||
|
||
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
8002012: 4b8e ldr r3, [pc, #568] ; (800224c <HAL_RCC_OscConfig+0x4f8>)
|
||
8002014: 681b ldr r3, [r3, #0]
|
||
8002016: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
800201a: 2b00 cmp r3, #0
|
||
800201c: d118 bne.n 8002050 <HAL_RCC_OscConfig+0x2fc>
|
||
{
|
||
/* Enable write access to Backup domain */
|
||
SET_BIT(PWR->CR, PWR_CR_DBP);
|
||
800201e: 4b8b ldr r3, [pc, #556] ; (800224c <HAL_RCC_OscConfig+0x4f8>)
|
||
8002020: 681b ldr r3, [r3, #0]
|
||
8002022: 4a8a ldr r2, [pc, #552] ; (800224c <HAL_RCC_OscConfig+0x4f8>)
|
||
8002024: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
8002028: 6013 str r3, [r2, #0]
|
||
|
||
/* Wait for Backup domain Write protection disable */
|
||
tickstart = HAL_GetTick();
|
||
800202a: f7ff fbbd bl 80017a8 <HAL_GetTick>
|
||
800202e: 6138 str r0, [r7, #16]
|
||
|
||
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
8002030: e008 b.n 8002044 <HAL_RCC_OscConfig+0x2f0>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
||
8002032: f7ff fbb9 bl 80017a8 <HAL_GetTick>
|
||
8002036: 4602 mov r2, r0
|
||
8002038: 693b ldr r3, [r7, #16]
|
||
800203a: 1ad3 subs r3, r2, r3
|
||
800203c: 2b64 cmp r3, #100 ; 0x64
|
||
800203e: d901 bls.n 8002044 <HAL_RCC_OscConfig+0x2f0>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8002040: 2303 movs r3, #3
|
||
8002042: e0fd b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
8002044: 4b81 ldr r3, [pc, #516] ; (800224c <HAL_RCC_OscConfig+0x4f8>)
|
||
8002046: 681b ldr r3, [r3, #0]
|
||
8002048: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
800204c: 2b00 cmp r3, #0
|
||
800204e: d0f0 beq.n 8002032 <HAL_RCC_OscConfig+0x2de>
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Set the new LSE configuration -----------------------------------------*/
|
||
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
||
8002050: 687b ldr r3, [r7, #4]
|
||
8002052: 68db ldr r3, [r3, #12]
|
||
8002054: 2b01 cmp r3, #1
|
||
8002056: d106 bne.n 8002066 <HAL_RCC_OscConfig+0x312>
|
||
8002058: 4b7b ldr r3, [pc, #492] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
800205a: 6a1b ldr r3, [r3, #32]
|
||
800205c: 4a7a ldr r2, [pc, #488] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
800205e: f043 0301 orr.w r3, r3, #1
|
||
8002062: 6213 str r3, [r2, #32]
|
||
8002064: e02d b.n 80020c2 <HAL_RCC_OscConfig+0x36e>
|
||
8002066: 687b ldr r3, [r7, #4]
|
||
8002068: 68db ldr r3, [r3, #12]
|
||
800206a: 2b00 cmp r3, #0
|
||
800206c: d10c bne.n 8002088 <HAL_RCC_OscConfig+0x334>
|
||
800206e: 4b76 ldr r3, [pc, #472] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8002070: 6a1b ldr r3, [r3, #32]
|
||
8002072: 4a75 ldr r2, [pc, #468] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8002074: f023 0301 bic.w r3, r3, #1
|
||
8002078: 6213 str r3, [r2, #32]
|
||
800207a: 4b73 ldr r3, [pc, #460] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
800207c: 6a1b ldr r3, [r3, #32]
|
||
800207e: 4a72 ldr r2, [pc, #456] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8002080: f023 0304 bic.w r3, r3, #4
|
||
8002084: 6213 str r3, [r2, #32]
|
||
8002086: e01c b.n 80020c2 <HAL_RCC_OscConfig+0x36e>
|
||
8002088: 687b ldr r3, [r7, #4]
|
||
800208a: 68db ldr r3, [r3, #12]
|
||
800208c: 2b05 cmp r3, #5
|
||
800208e: d10c bne.n 80020aa <HAL_RCC_OscConfig+0x356>
|
||
8002090: 4b6d ldr r3, [pc, #436] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8002092: 6a1b ldr r3, [r3, #32]
|
||
8002094: 4a6c ldr r2, [pc, #432] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8002096: f043 0304 orr.w r3, r3, #4
|
||
800209a: 6213 str r3, [r2, #32]
|
||
800209c: 4b6a ldr r3, [pc, #424] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
800209e: 6a1b ldr r3, [r3, #32]
|
||
80020a0: 4a69 ldr r2, [pc, #420] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
80020a2: f043 0301 orr.w r3, r3, #1
|
||
80020a6: 6213 str r3, [r2, #32]
|
||
80020a8: e00b b.n 80020c2 <HAL_RCC_OscConfig+0x36e>
|
||
80020aa: 4b67 ldr r3, [pc, #412] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
80020ac: 6a1b ldr r3, [r3, #32]
|
||
80020ae: 4a66 ldr r2, [pc, #408] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
80020b0: f023 0301 bic.w r3, r3, #1
|
||
80020b4: 6213 str r3, [r2, #32]
|
||
80020b6: 4b64 ldr r3, [pc, #400] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
80020b8: 6a1b ldr r3, [r3, #32]
|
||
80020ba: 4a63 ldr r2, [pc, #396] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
80020bc: f023 0304 bic.w r3, r3, #4
|
||
80020c0: 6213 str r3, [r2, #32]
|
||
/* Check the LSE State */
|
||
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
|
||
80020c2: 687b ldr r3, [r7, #4]
|
||
80020c4: 68db ldr r3, [r3, #12]
|
||
80020c6: 2b00 cmp r3, #0
|
||
80020c8: d015 beq.n 80020f6 <HAL_RCC_OscConfig+0x3a2>
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80020ca: f7ff fb6d bl 80017a8 <HAL_GetTick>
|
||
80020ce: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSE is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
||
80020d0: e00a b.n 80020e8 <HAL_RCC_OscConfig+0x394>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
||
80020d2: f7ff fb69 bl 80017a8 <HAL_GetTick>
|
||
80020d6: 4602 mov r2, r0
|
||
80020d8: 693b ldr r3, [r7, #16]
|
||
80020da: 1ad3 subs r3, r2, r3
|
||
80020dc: f241 3288 movw r2, #5000 ; 0x1388
|
||
80020e0: 4293 cmp r3, r2
|
||
80020e2: d901 bls.n 80020e8 <HAL_RCC_OscConfig+0x394>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80020e4: 2303 movs r3, #3
|
||
80020e6: e0ab b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
||
80020e8: 4b57 ldr r3, [pc, #348] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
80020ea: 6a1b ldr r3, [r3, #32]
|
||
80020ec: f003 0302 and.w r3, r3, #2
|
||
80020f0: 2b00 cmp r3, #0
|
||
80020f2: d0ee beq.n 80020d2 <HAL_RCC_OscConfig+0x37e>
|
||
80020f4: e014 b.n 8002120 <HAL_RCC_OscConfig+0x3cc>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80020f6: f7ff fb57 bl 80017a8 <HAL_GetTick>
|
||
80020fa: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSE is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
||
80020fc: e00a b.n 8002114 <HAL_RCC_OscConfig+0x3c0>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
||
80020fe: f7ff fb53 bl 80017a8 <HAL_GetTick>
|
||
8002102: 4602 mov r2, r0
|
||
8002104: 693b ldr r3, [r7, #16]
|
||
8002106: 1ad3 subs r3, r2, r3
|
||
8002108: f241 3288 movw r2, #5000 ; 0x1388
|
||
800210c: 4293 cmp r3, r2
|
||
800210e: d901 bls.n 8002114 <HAL_RCC_OscConfig+0x3c0>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8002110: 2303 movs r3, #3
|
||
8002112: e095 b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
||
8002114: 4b4c ldr r3, [pc, #304] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8002116: 6a1b ldr r3, [r3, #32]
|
||
8002118: f003 0302 and.w r3, r3, #2
|
||
800211c: 2b00 cmp r3, #0
|
||
800211e: d1ee bne.n 80020fe <HAL_RCC_OscConfig+0x3aa>
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Require to disable power clock if necessary */
|
||
if (pwrclkchanged == SET)
|
||
8002120: 7dfb ldrb r3, [r7, #23]
|
||
8002122: 2b01 cmp r3, #1
|
||
8002124: d105 bne.n 8002132 <HAL_RCC_OscConfig+0x3de>
|
||
{
|
||
__HAL_RCC_PWR_CLK_DISABLE();
|
||
8002126: 4b48 ldr r3, [pc, #288] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8002128: 69db ldr r3, [r3, #28]
|
||
800212a: 4a47 ldr r2, [pc, #284] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
800212c: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
|
||
8002130: 61d3 str r3, [r2, #28]
|
||
|
||
#endif /* RCC_CR_PLL2ON */
|
||
/*-------------------------------- PLL Configuration -----------------------*/
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
|
||
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
|
||
8002132: 687b ldr r3, [r7, #4]
|
||
8002134: 69db ldr r3, [r3, #28]
|
||
8002136: 2b00 cmp r3, #0
|
||
8002138: f000 8081 beq.w 800223e <HAL_RCC_OscConfig+0x4ea>
|
||
{
|
||
/* Check if the PLL is used as system clock or not */
|
||
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
|
||
800213c: 4b42 ldr r3, [pc, #264] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
800213e: 685b ldr r3, [r3, #4]
|
||
8002140: f003 030c and.w r3, r3, #12
|
||
8002144: 2b08 cmp r3, #8
|
||
8002146: d061 beq.n 800220c <HAL_RCC_OscConfig+0x4b8>
|
||
{
|
||
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
|
||
8002148: 687b ldr r3, [r7, #4]
|
||
800214a: 69db ldr r3, [r3, #28]
|
||
800214c: 2b02 cmp r3, #2
|
||
800214e: d146 bne.n 80021de <HAL_RCC_OscConfig+0x48a>
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
|
||
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
|
||
|
||
/* Disable the main PLL. */
|
||
__HAL_RCC_PLL_DISABLE();
|
||
8002150: 4b3f ldr r3, [pc, #252] ; (8002250 <HAL_RCC_OscConfig+0x4fc>)
|
||
8002152: 2200 movs r2, #0
|
||
8002154: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8002156: f7ff fb27 bl 80017a8 <HAL_GetTick>
|
||
800215a: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
800215c: e008 b.n 8002170 <HAL_RCC_OscConfig+0x41c>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
800215e: f7ff fb23 bl 80017a8 <HAL_GetTick>
|
||
8002162: 4602 mov r2, r0
|
||
8002164: 693b ldr r3, [r7, #16]
|
||
8002166: 1ad3 subs r3, r2, r3
|
||
8002168: 2b02 cmp r3, #2
|
||
800216a: d901 bls.n 8002170 <HAL_RCC_OscConfig+0x41c>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800216c: 2303 movs r3, #3
|
||
800216e: e067 b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
8002170: 4b35 ldr r3, [pc, #212] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8002172: 681b ldr r3, [r3, #0]
|
||
8002174: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
8002178: 2b00 cmp r3, #0
|
||
800217a: d1f0 bne.n 800215e <HAL_RCC_OscConfig+0x40a>
|
||
}
|
||
}
|
||
|
||
/* Configure the HSE prediv factor --------------------------------*/
|
||
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
|
||
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
|
||
800217c: 687b ldr r3, [r7, #4]
|
||
800217e: 6a1b ldr r3, [r3, #32]
|
||
8002180: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8002184: d108 bne.n 8002198 <HAL_RCC_OscConfig+0x444>
|
||
/* Set PREDIV1 source */
|
||
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
|
||
#endif /* RCC_CFGR2_PREDIV1SRC */
|
||
|
||
/* Set PREDIV1 Value */
|
||
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
|
||
8002186: 4b30 ldr r3, [pc, #192] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8002188: 685b ldr r3, [r3, #4]
|
||
800218a: f423 3200 bic.w r2, r3, #131072 ; 0x20000
|
||
800218e: 687b ldr r3, [r7, #4]
|
||
8002190: 689b ldr r3, [r3, #8]
|
||
8002192: 492d ldr r1, [pc, #180] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8002194: 4313 orrs r3, r2
|
||
8002196: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Configure the main PLL clock source and multiplication factors. */
|
||
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
|
||
8002198: 4b2b ldr r3, [pc, #172] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
800219a: 685b ldr r3, [r3, #4]
|
||
800219c: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000
|
||
80021a0: 687b ldr r3, [r7, #4]
|
||
80021a2: 6a19 ldr r1, [r3, #32]
|
||
80021a4: 687b ldr r3, [r7, #4]
|
||
80021a6: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80021a8: 430b orrs r3, r1
|
||
80021aa: 4927 ldr r1, [pc, #156] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
80021ac: 4313 orrs r3, r2
|
||
80021ae: 604b str r3, [r1, #4]
|
||
RCC_OscInitStruct->PLL.PLLMUL);
|
||
/* Enable the main PLL. */
|
||
__HAL_RCC_PLL_ENABLE();
|
||
80021b0: 4b27 ldr r3, [pc, #156] ; (8002250 <HAL_RCC_OscConfig+0x4fc>)
|
||
80021b2: 2201 movs r2, #1
|
||
80021b4: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80021b6: f7ff faf7 bl 80017a8 <HAL_GetTick>
|
||
80021ba: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
80021bc: e008 b.n 80021d0 <HAL_RCC_OscConfig+0x47c>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
80021be: f7ff faf3 bl 80017a8 <HAL_GetTick>
|
||
80021c2: 4602 mov r2, r0
|
||
80021c4: 693b ldr r3, [r7, #16]
|
||
80021c6: 1ad3 subs r3, r2, r3
|
||
80021c8: 2b02 cmp r3, #2
|
||
80021ca: d901 bls.n 80021d0 <HAL_RCC_OscConfig+0x47c>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80021cc: 2303 movs r3, #3
|
||
80021ce: e037 b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
80021d0: 4b1d ldr r3, [pc, #116] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
80021d2: 681b ldr r3, [r3, #0]
|
||
80021d4: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
80021d8: 2b00 cmp r3, #0
|
||
80021da: d0f0 beq.n 80021be <HAL_RCC_OscConfig+0x46a>
|
||
80021dc: e02f b.n 800223e <HAL_RCC_OscConfig+0x4ea>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Disable the main PLL. */
|
||
__HAL_RCC_PLL_DISABLE();
|
||
80021de: 4b1c ldr r3, [pc, #112] ; (8002250 <HAL_RCC_OscConfig+0x4fc>)
|
||
80021e0: 2200 movs r2, #0
|
||
80021e2: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80021e4: f7ff fae0 bl 80017a8 <HAL_GetTick>
|
||
80021e8: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
80021ea: e008 b.n 80021fe <HAL_RCC_OscConfig+0x4aa>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
80021ec: f7ff fadc bl 80017a8 <HAL_GetTick>
|
||
80021f0: 4602 mov r2, r0
|
||
80021f2: 693b ldr r3, [r7, #16]
|
||
80021f4: 1ad3 subs r3, r2, r3
|
||
80021f6: 2b02 cmp r3, #2
|
||
80021f8: d901 bls.n 80021fe <HAL_RCC_OscConfig+0x4aa>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80021fa: 2303 movs r3, #3
|
||
80021fc: e020 b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
80021fe: 4b12 ldr r3, [pc, #72] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
8002200: 681b ldr r3, [r3, #0]
|
||
8002202: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
8002206: 2b00 cmp r3, #0
|
||
8002208: d1f0 bne.n 80021ec <HAL_RCC_OscConfig+0x498>
|
||
800220a: e018 b.n 800223e <HAL_RCC_OscConfig+0x4ea>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Check if there is a request to disable the PLL used as System clock source */
|
||
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
|
||
800220c: 687b ldr r3, [r7, #4]
|
||
800220e: 69db ldr r3, [r3, #28]
|
||
8002210: 2b01 cmp r3, #1
|
||
8002212: d101 bne.n 8002218 <HAL_RCC_OscConfig+0x4c4>
|
||
{
|
||
return HAL_ERROR;
|
||
8002214: 2301 movs r3, #1
|
||
8002216: e013 b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
else
|
||
{
|
||
/* Do not return HAL_ERROR if request repeats the current configuration */
|
||
pll_config = RCC->CFGR;
|
||
8002218: 4b0b ldr r3, [pc, #44] ; (8002248 <HAL_RCC_OscConfig+0x4f4>)
|
||
800221a: 685b ldr r3, [r3, #4]
|
||
800221c: 60fb str r3, [r7, #12]
|
||
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
||
800221e: 68fb ldr r3, [r7, #12]
|
||
8002220: f403 3280 and.w r2, r3, #65536 ; 0x10000
|
||
8002224: 687b ldr r3, [r7, #4]
|
||
8002226: 6a1b ldr r3, [r3, #32]
|
||
8002228: 429a cmp r2, r3
|
||
800222a: d106 bne.n 800223a <HAL_RCC_OscConfig+0x4e6>
|
||
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
|
||
800222c: 68fb ldr r3, [r7, #12]
|
||
800222e: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000
|
||
8002232: 687b ldr r3, [r7, #4]
|
||
8002234: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
||
8002236: 429a cmp r2, r3
|
||
8002238: d001 beq.n 800223e <HAL_RCC_OscConfig+0x4ea>
|
||
{
|
||
return HAL_ERROR;
|
||
800223a: 2301 movs r3, #1
|
||
800223c: e000 b.n 8002240 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
return HAL_OK;
|
||
800223e: 2300 movs r3, #0
|
||
}
|
||
8002240: 4618 mov r0, r3
|
||
8002242: 3718 adds r7, #24
|
||
8002244: 46bd mov sp, r7
|
||
8002246: bd80 pop {r7, pc}
|
||
8002248: 40021000 .word 0x40021000
|
||
800224c: 40007000 .word 0x40007000
|
||
8002250: 42420060 .word 0x42420060
|
||
|
||
08002254 <HAL_RCC_ClockConfig>:
|
||
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
|
||
* currently used as system clock source.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
|
||
{
|
||
8002254: b580 push {r7, lr}
|
||
8002256: b084 sub sp, #16
|
||
8002258: af00 add r7, sp, #0
|
||
800225a: 6078 str r0, [r7, #4]
|
||
800225c: 6039 str r1, [r7, #0]
|
||
uint32_t tickstart;
|
||
|
||
/* Check Null pointer */
|
||
if (RCC_ClkInitStruct == NULL)
|
||
800225e: 687b ldr r3, [r7, #4]
|
||
8002260: 2b00 cmp r3, #0
|
||
8002262: d101 bne.n 8002268 <HAL_RCC_ClockConfig+0x14>
|
||
{
|
||
return HAL_ERROR;
|
||
8002264: 2301 movs r3, #1
|
||
8002266: e0d0 b.n 800240a <HAL_RCC_ClockConfig+0x1b6>
|
||
must be correctly programmed according to the frequency of the CPU clock
|
||
(HCLK) of the device. */
|
||
|
||
#if defined(FLASH_ACR_LATENCY)
|
||
/* Increasing the number of wait states because of higher CPU frequency */
|
||
if (FLatency > __HAL_FLASH_GET_LATENCY())
|
||
8002268: 4b6a ldr r3, [pc, #424] ; (8002414 <HAL_RCC_ClockConfig+0x1c0>)
|
||
800226a: 681b ldr r3, [r3, #0]
|
||
800226c: f003 0307 and.w r3, r3, #7
|
||
8002270: 683a ldr r2, [r7, #0]
|
||
8002272: 429a cmp r2, r3
|
||
8002274: d910 bls.n 8002298 <HAL_RCC_ClockConfig+0x44>
|
||
{
|
||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||
__HAL_FLASH_SET_LATENCY(FLatency);
|
||
8002276: 4b67 ldr r3, [pc, #412] ; (8002414 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8002278: 681b ldr r3, [r3, #0]
|
||
800227a: f023 0207 bic.w r2, r3, #7
|
||
800227e: 4965 ldr r1, [pc, #404] ; (8002414 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8002280: 683b ldr r3, [r7, #0]
|
||
8002282: 4313 orrs r3, r2
|
||
8002284: 600b str r3, [r1, #0]
|
||
|
||
/* Check that the new number of wait states is taken into account to access the Flash
|
||
memory by reading the FLASH_ACR register */
|
||
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
||
8002286: 4b63 ldr r3, [pc, #396] ; (8002414 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8002288: 681b ldr r3, [r3, #0]
|
||
800228a: f003 0307 and.w r3, r3, #7
|
||
800228e: 683a ldr r2, [r7, #0]
|
||
8002290: 429a cmp r2, r3
|
||
8002292: d001 beq.n 8002298 <HAL_RCC_ClockConfig+0x44>
|
||
{
|
||
return HAL_ERROR;
|
||
8002294: 2301 movs r3, #1
|
||
8002296: e0b8 b.n 800240a <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
|
||
#endif /* FLASH_ACR_LATENCY */
|
||
/*-------------------------- HCLK Configuration --------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
|
||
8002298: 687b ldr r3, [r7, #4]
|
||
800229a: 681b ldr r3, [r3, #0]
|
||
800229c: f003 0302 and.w r3, r3, #2
|
||
80022a0: 2b00 cmp r3, #0
|
||
80022a2: d020 beq.n 80022e6 <HAL_RCC_ClockConfig+0x92>
|
||
{
|
||
/* Set the highest APBx dividers in order to ensure that we do not go through
|
||
a non-spec phase whatever we decrease or increase HCLK. */
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
||
80022a4: 687b ldr r3, [r7, #4]
|
||
80022a6: 681b ldr r3, [r3, #0]
|
||
80022a8: f003 0304 and.w r3, r3, #4
|
||
80022ac: 2b00 cmp r3, #0
|
||
80022ae: d005 beq.n 80022bc <HAL_RCC_ClockConfig+0x68>
|
||
{
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
|
||
80022b0: 4b59 ldr r3, [pc, #356] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80022b2: 685b ldr r3, [r3, #4]
|
||
80022b4: 4a58 ldr r2, [pc, #352] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80022b6: f443 63e0 orr.w r3, r3, #1792 ; 0x700
|
||
80022ba: 6053 str r3, [r2, #4]
|
||
}
|
||
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
||
80022bc: 687b ldr r3, [r7, #4]
|
||
80022be: 681b ldr r3, [r3, #0]
|
||
80022c0: f003 0308 and.w r3, r3, #8
|
||
80022c4: 2b00 cmp r3, #0
|
||
80022c6: d005 beq.n 80022d4 <HAL_RCC_ClockConfig+0x80>
|
||
{
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
|
||
80022c8: 4b53 ldr r3, [pc, #332] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80022ca: 685b ldr r3, [r3, #4]
|
||
80022cc: 4a52 ldr r2, [pc, #328] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80022ce: f443 5360 orr.w r3, r3, #14336 ; 0x3800
|
||
80022d2: 6053 str r3, [r2, #4]
|
||
}
|
||
|
||
/* Set the new HCLK clock divider */
|
||
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
|
||
80022d4: 4b50 ldr r3, [pc, #320] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80022d6: 685b ldr r3, [r3, #4]
|
||
80022d8: f023 02f0 bic.w r2, r3, #240 ; 0xf0
|
||
80022dc: 687b ldr r3, [r7, #4]
|
||
80022de: 689b ldr r3, [r3, #8]
|
||
80022e0: 494d ldr r1, [pc, #308] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80022e2: 4313 orrs r3, r2
|
||
80022e4: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/*------------------------- SYSCLK Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
|
||
80022e6: 687b ldr r3, [r7, #4]
|
||
80022e8: 681b ldr r3, [r3, #0]
|
||
80022ea: f003 0301 and.w r3, r3, #1
|
||
80022ee: 2b00 cmp r3, #0
|
||
80022f0: d040 beq.n 8002374 <HAL_RCC_ClockConfig+0x120>
|
||
{
|
||
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
|
||
|
||
/* HSE is selected as System Clock Source */
|
||
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
|
||
80022f2: 687b ldr r3, [r7, #4]
|
||
80022f4: 685b ldr r3, [r3, #4]
|
||
80022f6: 2b01 cmp r3, #1
|
||
80022f8: d107 bne.n 800230a <HAL_RCC_ClockConfig+0xb6>
|
||
{
|
||
/* Check the HSE ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
80022fa: 4b47 ldr r3, [pc, #284] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80022fc: 681b ldr r3, [r3, #0]
|
||
80022fe: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8002302: 2b00 cmp r3, #0
|
||
8002304: d115 bne.n 8002332 <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
8002306: 2301 movs r3, #1
|
||
8002308: e07f b.n 800240a <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
/* PLL is selected as System Clock Source */
|
||
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
|
||
800230a: 687b ldr r3, [r7, #4]
|
||
800230c: 685b ldr r3, [r3, #4]
|
||
800230e: 2b02 cmp r3, #2
|
||
8002310: d107 bne.n 8002322 <HAL_RCC_ClockConfig+0xce>
|
||
{
|
||
/* Check the PLL ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
8002312: 4b41 ldr r3, [pc, #260] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8002314: 681b ldr r3, [r3, #0]
|
||
8002316: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
800231a: 2b00 cmp r3, #0
|
||
800231c: d109 bne.n 8002332 <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
800231e: 2301 movs r3, #1
|
||
8002320: e073 b.n 800240a <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
/* HSI is selected as System Clock Source */
|
||
else
|
||
{
|
||
/* Check the HSI ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8002322: 4b3d ldr r3, [pc, #244] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8002324: 681b ldr r3, [r3, #0]
|
||
8002326: f003 0302 and.w r3, r3, #2
|
||
800232a: 2b00 cmp r3, #0
|
||
800232c: d101 bne.n 8002332 <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
800232e: 2301 movs r3, #1
|
||
8002330: e06b b.n 800240a <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
|
||
8002332: 4b39 ldr r3, [pc, #228] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8002334: 685b ldr r3, [r3, #4]
|
||
8002336: f023 0203 bic.w r2, r3, #3
|
||
800233a: 687b ldr r3, [r7, #4]
|
||
800233c: 685b ldr r3, [r3, #4]
|
||
800233e: 4936 ldr r1, [pc, #216] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8002340: 4313 orrs r3, r2
|
||
8002342: 604b str r3, [r1, #4]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8002344: f7ff fa30 bl 80017a8 <HAL_GetTick>
|
||
8002348: 60f8 str r0, [r7, #12]
|
||
|
||
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
||
800234a: e00a b.n 8002362 <HAL_RCC_ClockConfig+0x10e>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
|
||
800234c: f7ff fa2c bl 80017a8 <HAL_GetTick>
|
||
8002350: 4602 mov r2, r0
|
||
8002352: 68fb ldr r3, [r7, #12]
|
||
8002354: 1ad3 subs r3, r2, r3
|
||
8002356: f241 3288 movw r2, #5000 ; 0x1388
|
||
800235a: 4293 cmp r3, r2
|
||
800235c: d901 bls.n 8002362 <HAL_RCC_ClockConfig+0x10e>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800235e: 2303 movs r3, #3
|
||
8002360: e053 b.n 800240a <HAL_RCC_ClockConfig+0x1b6>
|
||
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
||
8002362: 4b2d ldr r3, [pc, #180] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
8002364: 685b ldr r3, [r3, #4]
|
||
8002366: f003 020c and.w r2, r3, #12
|
||
800236a: 687b ldr r3, [r7, #4]
|
||
800236c: 685b ldr r3, [r3, #4]
|
||
800236e: 009b lsls r3, r3, #2
|
||
8002370: 429a cmp r2, r3
|
||
8002372: d1eb bne.n 800234c <HAL_RCC_ClockConfig+0xf8>
|
||
}
|
||
}
|
||
|
||
#if defined(FLASH_ACR_LATENCY)
|
||
/* Decreasing the number of wait states because of lower CPU frequency */
|
||
if (FLatency < __HAL_FLASH_GET_LATENCY())
|
||
8002374: 4b27 ldr r3, [pc, #156] ; (8002414 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8002376: 681b ldr r3, [r3, #0]
|
||
8002378: f003 0307 and.w r3, r3, #7
|
||
800237c: 683a ldr r2, [r7, #0]
|
||
800237e: 429a cmp r2, r3
|
||
8002380: d210 bcs.n 80023a4 <HAL_RCC_ClockConfig+0x150>
|
||
{
|
||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||
__HAL_FLASH_SET_LATENCY(FLatency);
|
||
8002382: 4b24 ldr r3, [pc, #144] ; (8002414 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8002384: 681b ldr r3, [r3, #0]
|
||
8002386: f023 0207 bic.w r2, r3, #7
|
||
800238a: 4922 ldr r1, [pc, #136] ; (8002414 <HAL_RCC_ClockConfig+0x1c0>)
|
||
800238c: 683b ldr r3, [r7, #0]
|
||
800238e: 4313 orrs r3, r2
|
||
8002390: 600b str r3, [r1, #0]
|
||
|
||
/* Check that the new number of wait states is taken into account to access the Flash
|
||
memory by reading the FLASH_ACR register */
|
||
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
||
8002392: 4b20 ldr r3, [pc, #128] ; (8002414 <HAL_RCC_ClockConfig+0x1c0>)
|
||
8002394: 681b ldr r3, [r3, #0]
|
||
8002396: f003 0307 and.w r3, r3, #7
|
||
800239a: 683a ldr r2, [r7, #0]
|
||
800239c: 429a cmp r2, r3
|
||
800239e: d001 beq.n 80023a4 <HAL_RCC_ClockConfig+0x150>
|
||
{
|
||
return HAL_ERROR;
|
||
80023a0: 2301 movs r3, #1
|
||
80023a2: e032 b.n 800240a <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
#endif /* FLASH_ACR_LATENCY */
|
||
|
||
/*-------------------------- PCLK1 Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
||
80023a4: 687b ldr r3, [r7, #4]
|
||
80023a6: 681b ldr r3, [r3, #0]
|
||
80023a8: f003 0304 and.w r3, r3, #4
|
||
80023ac: 2b00 cmp r3, #0
|
||
80023ae: d008 beq.n 80023c2 <HAL_RCC_ClockConfig+0x16e>
|
||
{
|
||
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
|
||
80023b0: 4b19 ldr r3, [pc, #100] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80023b2: 685b ldr r3, [r3, #4]
|
||
80023b4: f423 62e0 bic.w r2, r3, #1792 ; 0x700
|
||
80023b8: 687b ldr r3, [r7, #4]
|
||
80023ba: 68db ldr r3, [r3, #12]
|
||
80023bc: 4916 ldr r1, [pc, #88] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80023be: 4313 orrs r3, r2
|
||
80023c0: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/*-------------------------- PCLK2 Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
||
80023c2: 687b ldr r3, [r7, #4]
|
||
80023c4: 681b ldr r3, [r3, #0]
|
||
80023c6: f003 0308 and.w r3, r3, #8
|
||
80023ca: 2b00 cmp r3, #0
|
||
80023cc: d009 beq.n 80023e2 <HAL_RCC_ClockConfig+0x18e>
|
||
{
|
||
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
|
||
80023ce: 4b12 ldr r3, [pc, #72] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80023d0: 685b ldr r3, [r3, #4]
|
||
80023d2: f423 5260 bic.w r2, r3, #14336 ; 0x3800
|
||
80023d6: 687b ldr r3, [r7, #4]
|
||
80023d8: 691b ldr r3, [r3, #16]
|
||
80023da: 00db lsls r3, r3, #3
|
||
80023dc: 490e ldr r1, [pc, #56] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80023de: 4313 orrs r3, r2
|
||
80023e0: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Update the SystemCoreClock global variable */
|
||
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
|
||
80023e2: f000 f821 bl 8002428 <HAL_RCC_GetSysClockFreq>
|
||
80023e6: 4602 mov r2, r0
|
||
80023e8: 4b0b ldr r3, [pc, #44] ; (8002418 <HAL_RCC_ClockConfig+0x1c4>)
|
||
80023ea: 685b ldr r3, [r3, #4]
|
||
80023ec: 091b lsrs r3, r3, #4
|
||
80023ee: f003 030f and.w r3, r3, #15
|
||
80023f2: 490a ldr r1, [pc, #40] ; (800241c <HAL_RCC_ClockConfig+0x1c8>)
|
||
80023f4: 5ccb ldrb r3, [r1, r3]
|
||
80023f6: fa22 f303 lsr.w r3, r2, r3
|
||
80023fa: 4a09 ldr r2, [pc, #36] ; (8002420 <HAL_RCC_ClockConfig+0x1cc>)
|
||
80023fc: 6013 str r3, [r2, #0]
|
||
|
||
/* Configure the source of time base considering new system clocks settings*/
|
||
HAL_InitTick(uwTickPrio);
|
||
80023fe: 4b09 ldr r3, [pc, #36] ; (8002424 <HAL_RCC_ClockConfig+0x1d0>)
|
||
8002400: 681b ldr r3, [r3, #0]
|
||
8002402: 4618 mov r0, r3
|
||
8002404: f7ff f98e bl 8001724 <HAL_InitTick>
|
||
|
||
return HAL_OK;
|
||
8002408: 2300 movs r3, #0
|
||
}
|
||
800240a: 4618 mov r0, r3
|
||
800240c: 3710 adds r7, #16
|
||
800240e: 46bd mov sp, r7
|
||
8002410: bd80 pop {r7, pc}
|
||
8002412: bf00 nop
|
||
8002414: 40022000 .word 0x40022000
|
||
8002418: 40021000 .word 0x40021000
|
||
800241c: 08007060 .word 0x08007060
|
||
8002420: 20000000 .word 0x20000000
|
||
8002424: 20000004 .word 0x20000004
|
||
|
||
08002428 <HAL_RCC_GetSysClockFreq>:
|
||
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
|
||
*
|
||
* @retval SYSCLK frequency
|
||
*/
|
||
uint32_t HAL_RCC_GetSysClockFreq(void)
|
||
{
|
||
8002428: b490 push {r4, r7}
|
||
800242a: b08a sub sp, #40 ; 0x28
|
||
800242c: af00 add r7, sp, #0
|
||
#if defined(RCC_CFGR2_PREDIV1SRC)
|
||
const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13};
|
||
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
||
#else
|
||
const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
|
||
800242e: 4b2a ldr r3, [pc, #168] ; (80024d8 <HAL_RCC_GetSysClockFreq+0xb0>)
|
||
8002430: 1d3c adds r4, r7, #4
|
||
8002432: cb0f ldmia r3, {r0, r1, r2, r3}
|
||
8002434: e884 000f stmia.w r4, {r0, r1, r2, r3}
|
||
#if defined(RCC_CFGR2_PREDIV1)
|
||
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
||
#else
|
||
const uint8_t aPredivFactorTable[2] = {1, 2};
|
||
8002438: f240 2301 movw r3, #513 ; 0x201
|
||
800243c: 803b strh r3, [r7, #0]
|
||
#endif /*RCC_CFGR2_PREDIV1*/
|
||
|
||
#endif
|
||
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
|
||
800243e: 2300 movs r3, #0
|
||
8002440: 61fb str r3, [r7, #28]
|
||
8002442: 2300 movs r3, #0
|
||
8002444: 61bb str r3, [r7, #24]
|
||
8002446: 2300 movs r3, #0
|
||
8002448: 627b str r3, [r7, #36] ; 0x24
|
||
800244a: 2300 movs r3, #0
|
||
800244c: 617b str r3, [r7, #20]
|
||
uint32_t sysclockfreq = 0U;
|
||
800244e: 2300 movs r3, #0
|
||
8002450: 623b str r3, [r7, #32]
|
||
#if defined(RCC_CFGR2_PREDIV1SRC)
|
||
uint32_t prediv2 = 0U, pll2mul = 0U;
|
||
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
||
|
||
tmpreg = RCC->CFGR;
|
||
8002452: 4b22 ldr r3, [pc, #136] ; (80024dc <HAL_RCC_GetSysClockFreq+0xb4>)
|
||
8002454: 685b ldr r3, [r3, #4]
|
||
8002456: 61fb str r3, [r7, #28]
|
||
|
||
/* Get SYSCLK source -------------------------------------------------------*/
|
||
switch (tmpreg & RCC_CFGR_SWS)
|
||
8002458: 69fb ldr r3, [r7, #28]
|
||
800245a: f003 030c and.w r3, r3, #12
|
||
800245e: 2b04 cmp r3, #4
|
||
8002460: d002 beq.n 8002468 <HAL_RCC_GetSysClockFreq+0x40>
|
||
8002462: 2b08 cmp r3, #8
|
||
8002464: d003 beq.n 800246e <HAL_RCC_GetSysClockFreq+0x46>
|
||
8002466: e02d b.n 80024c4 <HAL_RCC_GetSysClockFreq+0x9c>
|
||
{
|
||
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
|
||
{
|
||
sysclockfreq = HSE_VALUE;
|
||
8002468: 4b1d ldr r3, [pc, #116] ; (80024e0 <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
800246a: 623b str r3, [r7, #32]
|
||
break;
|
||
800246c: e02d b.n 80024ca <HAL_RCC_GetSysClockFreq+0xa2>
|
||
}
|
||
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
|
||
{
|
||
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
|
||
800246e: 69fb ldr r3, [r7, #28]
|
||
8002470: 0c9b lsrs r3, r3, #18
|
||
8002472: f003 030f and.w r3, r3, #15
|
||
8002476: f107 0228 add.w r2, r7, #40 ; 0x28
|
||
800247a: 4413 add r3, r2
|
||
800247c: f813 3c24 ldrb.w r3, [r3, #-36]
|
||
8002480: 617b str r3, [r7, #20]
|
||
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
|
||
8002482: 69fb ldr r3, [r7, #28]
|
||
8002484: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8002488: 2b00 cmp r3, #0
|
||
800248a: d013 beq.n 80024b4 <HAL_RCC_GetSysClockFreq+0x8c>
|
||
{
|
||
#if defined(RCC_CFGR2_PREDIV1)
|
||
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
|
||
#else
|
||
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
|
||
800248c: 4b13 ldr r3, [pc, #76] ; (80024dc <HAL_RCC_GetSysClockFreq+0xb4>)
|
||
800248e: 685b ldr r3, [r3, #4]
|
||
8002490: 0c5b lsrs r3, r3, #17
|
||
8002492: f003 0301 and.w r3, r3, #1
|
||
8002496: f107 0228 add.w r2, r7, #40 ; 0x28
|
||
800249a: 4413 add r3, r2
|
||
800249c: f813 3c28 ldrb.w r3, [r3, #-40]
|
||
80024a0: 61bb str r3, [r7, #24]
|
||
{
|
||
pllclk = pllclk / 2;
|
||
}
|
||
#else
|
||
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
|
||
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
|
||
80024a2: 697b ldr r3, [r7, #20]
|
||
80024a4: 4a0e ldr r2, [pc, #56] ; (80024e0 <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
80024a6: fb02 f203 mul.w r2, r2, r3
|
||
80024aa: 69bb ldr r3, [r7, #24]
|
||
80024ac: fbb2 f3f3 udiv r3, r2, r3
|
||
80024b0: 627b str r3, [r7, #36] ; 0x24
|
||
80024b2: e004 b.n 80024be <HAL_RCC_GetSysClockFreq+0x96>
|
||
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
||
}
|
||
else
|
||
{
|
||
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
|
||
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
|
||
80024b4: 697b ldr r3, [r7, #20]
|
||
80024b6: 4a0b ldr r2, [pc, #44] ; (80024e4 <HAL_RCC_GetSysClockFreq+0xbc>)
|
||
80024b8: fb02 f303 mul.w r3, r2, r3
|
||
80024bc: 627b str r3, [r7, #36] ; 0x24
|
||
}
|
||
sysclockfreq = pllclk;
|
||
80024be: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80024c0: 623b str r3, [r7, #32]
|
||
break;
|
||
80024c2: e002 b.n 80024ca <HAL_RCC_GetSysClockFreq+0xa2>
|
||
}
|
||
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
|
||
default: /* HSI used as system clock */
|
||
{
|
||
sysclockfreq = HSI_VALUE;
|
||
80024c4: 4b06 ldr r3, [pc, #24] ; (80024e0 <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
80024c6: 623b str r3, [r7, #32]
|
||
break;
|
||
80024c8: bf00 nop
|
||
}
|
||
}
|
||
return sysclockfreq;
|
||
80024ca: 6a3b ldr r3, [r7, #32]
|
||
}
|
||
80024cc: 4618 mov r0, r3
|
||
80024ce: 3728 adds r7, #40 ; 0x28
|
||
80024d0: 46bd mov sp, r7
|
||
80024d2: bc90 pop {r4, r7}
|
||
80024d4: 4770 bx lr
|
||
80024d6: bf00 nop
|
||
80024d8: 08006f78 .word 0x08006f78
|
||
80024dc: 40021000 .word 0x40021000
|
||
80024e0: 007a1200 .word 0x007a1200
|
||
80024e4: 003d0900 .word 0x003d0900
|
||
|
||
080024e8 <RCC_Delay>:
|
||
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
|
||
* @param mdelay: specifies the delay time length, in milliseconds.
|
||
* @retval None
|
||
*/
|
||
static void RCC_Delay(uint32_t mdelay)
|
||
{
|
||
80024e8: b480 push {r7}
|
||
80024ea: b085 sub sp, #20
|
||
80024ec: af00 add r7, sp, #0
|
||
80024ee: 6078 str r0, [r7, #4]
|
||
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
|
||
80024f0: 4b0a ldr r3, [pc, #40] ; (800251c <RCC_Delay+0x34>)
|
||
80024f2: 681b ldr r3, [r3, #0]
|
||
80024f4: 4a0a ldr r2, [pc, #40] ; (8002520 <RCC_Delay+0x38>)
|
||
80024f6: fba2 2303 umull r2, r3, r2, r3
|
||
80024fa: 0a5b lsrs r3, r3, #9
|
||
80024fc: 687a ldr r2, [r7, #4]
|
||
80024fe: fb02 f303 mul.w r3, r2, r3
|
||
8002502: 60fb str r3, [r7, #12]
|
||
do
|
||
{
|
||
__NOP();
|
||
8002504: bf00 nop
|
||
}
|
||
while (Delay --);
|
||
8002506: 68fb ldr r3, [r7, #12]
|
||
8002508: 1e5a subs r2, r3, #1
|
||
800250a: 60fa str r2, [r7, #12]
|
||
800250c: 2b00 cmp r3, #0
|
||
800250e: d1f9 bne.n 8002504 <RCC_Delay+0x1c>
|
||
}
|
||
8002510: bf00 nop
|
||
8002512: bf00 nop
|
||
8002514: 3714 adds r7, #20
|
||
8002516: 46bd mov sp, r7
|
||
8002518: bc80 pop {r7}
|
||
800251a: 4770 bx lr
|
||
800251c: 20000000 .word 0x20000000
|
||
8002520: 10624dd3 .word 0x10624dd3
|
||
|
||
08002524 <HAL_SRAM_Init>:
|
||
* @param ExtTiming Pointer to SRAM extended mode timing structure
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing,
|
||
FSMC_NORSRAM_TimingTypeDef *ExtTiming)
|
||
{
|
||
8002524: b580 push {r7, lr}
|
||
8002526: b084 sub sp, #16
|
||
8002528: af00 add r7, sp, #0
|
||
800252a: 60f8 str r0, [r7, #12]
|
||
800252c: 60b9 str r1, [r7, #8]
|
||
800252e: 607a str r2, [r7, #4]
|
||
/* Check the SRAM handle parameter */
|
||
if ((hsram == NULL) || (hsram->Init.BurstAccessMode == FSMC_BURST_ACCESS_MODE_ENABLE))
|
||
8002530: 68fb ldr r3, [r7, #12]
|
||
8002532: 2b00 cmp r3, #0
|
||
8002534: d004 beq.n 8002540 <HAL_SRAM_Init+0x1c>
|
||
8002536: 68fb ldr r3, [r7, #12]
|
||
8002538: 699b ldr r3, [r3, #24]
|
||
800253a: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
800253e: d101 bne.n 8002544 <HAL_SRAM_Init+0x20>
|
||
{
|
||
return HAL_ERROR;
|
||
8002540: 2301 movs r3, #1
|
||
8002542: e038 b.n 80025b6 <HAL_SRAM_Init+0x92>
|
||
}
|
||
|
||
if (hsram->State == HAL_SRAM_STATE_RESET)
|
||
8002544: 68fb ldr r3, [r7, #12]
|
||
8002546: f893 3041 ldrb.w r3, [r3, #65] ; 0x41
|
||
800254a: b2db uxtb r3, r3
|
||
800254c: 2b00 cmp r3, #0
|
||
800254e: d106 bne.n 800255e <HAL_SRAM_Init+0x3a>
|
||
{
|
||
/* Allocate lock resource and initialize it */
|
||
hsram->Lock = HAL_UNLOCKED;
|
||
8002550: 68fb ldr r3, [r7, #12]
|
||
8002552: 2200 movs r2, #0
|
||
8002554: f883 2040 strb.w r2, [r3, #64] ; 0x40
|
||
|
||
/* Init the low level hardware */
|
||
hsram->MspInitCallback(hsram);
|
||
#else
|
||
/* Initialize the low level hardware (MSP) */
|
||
HAL_SRAM_MspInit(hsram);
|
||
8002558: 68f8 ldr r0, [r7, #12]
|
||
800255a: f7fe ffaf bl 80014bc <HAL_SRAM_MspInit>
|
||
#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */
|
||
}
|
||
|
||
/* Initialize SRAM control Interface */
|
||
(void)FSMC_NORSRAM_Init(hsram->Instance, &(hsram->Init));
|
||
800255e: 68fb ldr r3, [r7, #12]
|
||
8002560: 681a ldr r2, [r3, #0]
|
||
8002562: 68fb ldr r3, [r7, #12]
|
||
8002564: 3308 adds r3, #8
|
||
8002566: 4619 mov r1, r3
|
||
8002568: 4610 mov r0, r2
|
||
800256a: f000 f829 bl 80025c0 <FSMC_NORSRAM_Init>
|
||
|
||
/* Initialize SRAM timing Interface */
|
||
(void)FSMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank);
|
||
800256e: 68fb ldr r3, [r7, #12]
|
||
8002570: 6818 ldr r0, [r3, #0]
|
||
8002572: 68fb ldr r3, [r7, #12]
|
||
8002574: 689b ldr r3, [r3, #8]
|
||
8002576: 461a mov r2, r3
|
||
8002578: 68b9 ldr r1, [r7, #8]
|
||
800257a: f000 f88b bl 8002694 <FSMC_NORSRAM_Timing_Init>
|
||
|
||
/* Initialize SRAM extended mode timing Interface */
|
||
(void)FSMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank,
|
||
800257e: 68fb ldr r3, [r7, #12]
|
||
8002580: 6858 ldr r0, [r3, #4]
|
||
8002582: 68fb ldr r3, [r7, #12]
|
||
8002584: 689a ldr r2, [r3, #8]
|
||
8002586: 68fb ldr r3, [r7, #12]
|
||
8002588: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
800258a: 6879 ldr r1, [r7, #4]
|
||
800258c: f000 f8b6 bl 80026fc <FSMC_NORSRAM_Extended_Timing_Init>
|
||
hsram->Init.ExtendedMode);
|
||
|
||
/* Enable the NORSRAM device */
|
||
__FSMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
|
||
8002590: 68fb ldr r3, [r7, #12]
|
||
8002592: 681b ldr r3, [r3, #0]
|
||
8002594: 68fa ldr r2, [r7, #12]
|
||
8002596: 6892 ldr r2, [r2, #8]
|
||
8002598: f853 1022 ldr.w r1, [r3, r2, lsl #2]
|
||
800259c: 68fb ldr r3, [r7, #12]
|
||
800259e: 681b ldr r3, [r3, #0]
|
||
80025a0: 68fa ldr r2, [r7, #12]
|
||
80025a2: 6892 ldr r2, [r2, #8]
|
||
80025a4: f041 0101 orr.w r1, r1, #1
|
||
80025a8: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
/* Initialize the SRAM controller state */
|
||
hsram->State = HAL_SRAM_STATE_READY;
|
||
80025ac: 68fb ldr r3, [r7, #12]
|
||
80025ae: 2201 movs r2, #1
|
||
80025b0: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
||
|
||
return HAL_OK;
|
||
80025b4: 2300 movs r3, #0
|
||
}
|
||
80025b6: 4618 mov r0, r3
|
||
80025b8: 3710 adds r7, #16
|
||
80025ba: 46bd mov sp, r7
|
||
80025bc: bd80 pop {r7, pc}
|
||
...
|
||
|
||
080025c0 <FSMC_NORSRAM_Init>:
|
||
* @param Init Pointer to NORSRAM Initialization structure
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device,
|
||
FSMC_NORSRAM_InitTypeDef *Init)
|
||
{
|
||
80025c0: b480 push {r7}
|
||
80025c2: b087 sub sp, #28
|
||
80025c4: af00 add r7, sp, #0
|
||
80025c6: 6078 str r0, [r7, #4]
|
||
80025c8: 6039 str r1, [r7, #0]
|
||
assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait));
|
||
assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst));
|
||
assert_param(IS_FSMC_PAGESIZE(Init->PageSize));
|
||
|
||
/* Disable NORSRAM Device */
|
||
__FSMC_NORSRAM_DISABLE(Device, Init->NSBank);
|
||
80025ca: 683b ldr r3, [r7, #0]
|
||
80025cc: 681a ldr r2, [r3, #0]
|
||
80025ce: 687b ldr r3, [r7, #4]
|
||
80025d0: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
||
80025d4: 683a ldr r2, [r7, #0]
|
||
80025d6: 6812 ldr r2, [r2, #0]
|
||
80025d8: f023 0101 bic.w r1, r3, #1
|
||
80025dc: 687b ldr r3, [r7, #4]
|
||
80025de: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
/* Set NORSRAM device control parameters */
|
||
if (Init->MemoryType == FSMC_MEMORY_TYPE_NOR)
|
||
80025e2: 683b ldr r3, [r7, #0]
|
||
80025e4: 689b ldr r3, [r3, #8]
|
||
80025e6: 2b08 cmp r3, #8
|
||
80025e8: d102 bne.n 80025f0 <FSMC_NORSRAM_Init+0x30>
|
||
{
|
||
flashaccess = FSMC_NORSRAM_FLASH_ACCESS_ENABLE;
|
||
80025ea: 2340 movs r3, #64 ; 0x40
|
||
80025ec: 617b str r3, [r7, #20]
|
||
80025ee: e001 b.n 80025f4 <FSMC_NORSRAM_Init+0x34>
|
||
}
|
||
else
|
||
{
|
||
flashaccess = FSMC_NORSRAM_FLASH_ACCESS_DISABLE;
|
||
80025f0: 2300 movs r3, #0
|
||
80025f2: 617b str r3, [r7, #20]
|
||
}
|
||
|
||
btcr_reg = (flashaccess | \
|
||
Init->DataAddressMux | \
|
||
80025f4: 683b ldr r3, [r7, #0]
|
||
80025f6: 685a ldr r2, [r3, #4]
|
||
btcr_reg = (flashaccess | \
|
||
80025f8: 697b ldr r3, [r7, #20]
|
||
80025fa: 431a orrs r2, r3
|
||
Init->MemoryType | \
|
||
80025fc: 683b ldr r3, [r7, #0]
|
||
80025fe: 689b ldr r3, [r3, #8]
|
||
Init->DataAddressMux | \
|
||
8002600: 431a orrs r2, r3
|
||
Init->MemoryDataWidth | \
|
||
8002602: 683b ldr r3, [r7, #0]
|
||
8002604: 68db ldr r3, [r3, #12]
|
||
Init->MemoryType | \
|
||
8002606: 431a orrs r2, r3
|
||
Init->BurstAccessMode | \
|
||
8002608: 683b ldr r3, [r7, #0]
|
||
800260a: 691b ldr r3, [r3, #16]
|
||
Init->MemoryDataWidth | \
|
||
800260c: 431a orrs r2, r3
|
||
Init->WaitSignalPolarity | \
|
||
800260e: 683b ldr r3, [r7, #0]
|
||
8002610: 695b ldr r3, [r3, #20]
|
||
Init->BurstAccessMode | \
|
||
8002612: 431a orrs r2, r3
|
||
Init->WaitSignalActive | \
|
||
8002614: 683b ldr r3, [r7, #0]
|
||
8002616: 69db ldr r3, [r3, #28]
|
||
Init->WaitSignalPolarity | \
|
||
8002618: 431a orrs r2, r3
|
||
Init->WriteOperation | \
|
||
800261a: 683b ldr r3, [r7, #0]
|
||
800261c: 6a1b ldr r3, [r3, #32]
|
||
Init->WaitSignalActive | \
|
||
800261e: 431a orrs r2, r3
|
||
Init->WaitSignal | \
|
||
8002620: 683b ldr r3, [r7, #0]
|
||
8002622: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
Init->WriteOperation | \
|
||
8002624: 431a orrs r2, r3
|
||
Init->ExtendedMode | \
|
||
8002626: 683b ldr r3, [r7, #0]
|
||
8002628: 6a9b ldr r3, [r3, #40] ; 0x28
|
||
Init->WaitSignal | \
|
||
800262a: 431a orrs r2, r3
|
||
Init->AsynchronousWait | \
|
||
800262c: 683b ldr r3, [r7, #0]
|
||
800262e: 6adb ldr r3, [r3, #44] ; 0x2c
|
||
Init->ExtendedMode | \
|
||
8002630: 431a orrs r2, r3
|
||
Init->WriteBurst);
|
||
8002632: 683b ldr r3, [r7, #0]
|
||
8002634: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
btcr_reg = (flashaccess | \
|
||
8002636: 4313 orrs r3, r2
|
||
8002638: 613b str r3, [r7, #16]
|
||
|
||
btcr_reg |= Init->WrapMode;
|
||
800263a: 683b ldr r3, [r7, #0]
|
||
800263c: 699b ldr r3, [r3, #24]
|
||
800263e: 693a ldr r2, [r7, #16]
|
||
8002640: 4313 orrs r3, r2
|
||
8002642: 613b str r3, [r7, #16]
|
||
btcr_reg |= Init->PageSize;
|
||
8002644: 683b ldr r3, [r7, #0]
|
||
8002646: 6b5b ldr r3, [r3, #52] ; 0x34
|
||
8002648: 693a ldr r2, [r7, #16]
|
||
800264a: 4313 orrs r3, r2
|
||
800264c: 613b str r3, [r7, #16]
|
||
|
||
mask = (FSMC_BCRx_MBKEN |
|
||
800264e: 4b10 ldr r3, [pc, #64] ; (8002690 <FSMC_NORSRAM_Init+0xd0>)
|
||
8002650: 60fb str r3, [r7, #12]
|
||
FSMC_BCRx_WAITEN |
|
||
FSMC_BCRx_EXTMOD |
|
||
FSMC_BCRx_ASYNCWAIT |
|
||
FSMC_BCRx_CBURSTRW);
|
||
|
||
mask |= FSMC_BCRx_WRAPMOD;
|
||
8002652: 68fb ldr r3, [r7, #12]
|
||
8002654: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
||
8002658: 60fb str r3, [r7, #12]
|
||
mask |= 0x00070000U; /* CPSIZE to be defined in CMSIS file */
|
||
800265a: 68fb ldr r3, [r7, #12]
|
||
800265c: f443 23e0 orr.w r3, r3, #458752 ; 0x70000
|
||
8002660: 60fb str r3, [r7, #12]
|
||
|
||
MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg);
|
||
8002662: 683b ldr r3, [r7, #0]
|
||
8002664: 681a ldr r2, [r3, #0]
|
||
8002666: 687b ldr r3, [r7, #4]
|
||
8002668: f853 2022 ldr.w r2, [r3, r2, lsl #2]
|
||
800266c: 68fb ldr r3, [r7, #12]
|
||
800266e: 43db mvns r3, r3
|
||
8002670: ea02 0103 and.w r1, r2, r3
|
||
8002674: 683b ldr r3, [r7, #0]
|
||
8002676: 681a ldr r2, [r3, #0]
|
||
8002678: 693b ldr r3, [r7, #16]
|
||
800267a: 4319 orrs r1, r3
|
||
800267c: 687b ldr r3, [r7, #4]
|
||
800267e: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
|
||
return HAL_OK;
|
||
8002682: 2300 movs r3, #0
|
||
}
|
||
8002684: 4618 mov r0, r3
|
||
8002686: 371c adds r7, #28
|
||
8002688: 46bd mov sp, r7
|
||
800268a: bc80 pop {r7}
|
||
800268c: 4770 bx lr
|
||
800268e: bf00 nop
|
||
8002690: 0008fb7f .word 0x0008fb7f
|
||
|
||
08002694 <FSMC_NORSRAM_Timing_Init>:
|
||
* @param Bank NORSRAM bank number
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device,
|
||
FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)
|
||
{
|
||
8002694: b480 push {r7}
|
||
8002696: b085 sub sp, #20
|
||
8002698: af00 add r7, sp, #0
|
||
800269a: 60f8 str r0, [r7, #12]
|
||
800269c: 60b9 str r1, [r7, #8]
|
||
800269e: 607a str r2, [r7, #4]
|
||
assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency));
|
||
assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
|
||
assert_param(IS_FSMC_NORSRAM_BANK(Bank));
|
||
|
||
/* Set FSMC_NORSRAM device timing parameters */
|
||
MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime |
|
||
80026a0: 687b ldr r3, [r7, #4]
|
||
80026a2: 1c5a adds r2, r3, #1
|
||
80026a4: 68fb ldr r3, [r7, #12]
|
||
80026a6: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
||
80026aa: f003 4140 and.w r1, r3, #3221225472 ; 0xc0000000
|
||
80026ae: 68bb ldr r3, [r7, #8]
|
||
80026b0: 681a ldr r2, [r3, #0]
|
||
80026b2: 68bb ldr r3, [r7, #8]
|
||
80026b4: 685b ldr r3, [r3, #4]
|
||
80026b6: 011b lsls r3, r3, #4
|
||
80026b8: 431a orrs r2, r3
|
||
80026ba: 68bb ldr r3, [r7, #8]
|
||
80026bc: 689b ldr r3, [r3, #8]
|
||
80026be: 021b lsls r3, r3, #8
|
||
80026c0: 431a orrs r2, r3
|
||
80026c2: 68bb ldr r3, [r7, #8]
|
||
80026c4: 68db ldr r3, [r3, #12]
|
||
80026c6: 041b lsls r3, r3, #16
|
||
80026c8: 431a orrs r2, r3
|
||
80026ca: 68bb ldr r3, [r7, #8]
|
||
80026cc: 691b ldr r3, [r3, #16]
|
||
80026ce: 3b01 subs r3, #1
|
||
80026d0: 051b lsls r3, r3, #20
|
||
80026d2: 431a orrs r2, r3
|
||
80026d4: 68bb ldr r3, [r7, #8]
|
||
80026d6: 695b ldr r3, [r3, #20]
|
||
80026d8: 3b02 subs r3, #2
|
||
80026da: 061b lsls r3, r3, #24
|
||
80026dc: 431a orrs r2, r3
|
||
80026de: 68bb ldr r3, [r7, #8]
|
||
80026e0: 699b ldr r3, [r3, #24]
|
||
80026e2: 4313 orrs r3, r2
|
||
80026e4: 687a ldr r2, [r7, #4]
|
||
80026e6: 3201 adds r2, #1
|
||
80026e8: 4319 orrs r1, r3
|
||
80026ea: 68fb ldr r3, [r7, #12]
|
||
80026ec: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
((Timing->BusTurnAroundDuration) << FSMC_BTRx_BUSTURN_Pos) |
|
||
(((Timing->CLKDivision) - 1U) << FSMC_BTRx_CLKDIV_Pos) |
|
||
(((Timing->DataLatency) - 2U) << FSMC_BTRx_DATLAT_Pos) |
|
||
(Timing->AccessMode)));
|
||
|
||
return HAL_OK;
|
||
80026f0: 2300 movs r3, #0
|
||
}
|
||
80026f2: 4618 mov r0, r3
|
||
80026f4: 3714 adds r7, #20
|
||
80026f6: 46bd mov sp, r7
|
||
80026f8: bc80 pop {r7}
|
||
80026fa: 4770 bx lr
|
||
|
||
080026fc <FSMC_NORSRAM_Extended_Timing_Init>:
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device,
|
||
FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank,
|
||
uint32_t ExtendedMode)
|
||
{
|
||
80026fc: b480 push {r7}
|
||
80026fe: b085 sub sp, #20
|
||
8002700: af00 add r7, sp, #0
|
||
8002702: 60f8 str r0, [r7, #12]
|
||
8002704: 60b9 str r1, [r7, #8]
|
||
8002706: 607a str r2, [r7, #4]
|
||
8002708: 603b str r3, [r7, #0]
|
||
/* Check the parameters */
|
||
assert_param(IS_FSMC_EXTENDED_MODE(ExtendedMode));
|
||
|
||
/* Set NORSRAM device timing register for write configuration, if extended mode is used */
|
||
if (ExtendedMode == FSMC_EXTENDED_MODE_ENABLE)
|
||
800270a: 683b ldr r3, [r7, #0]
|
||
800270c: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
|
||
8002710: d11d bne.n 800274e <FSMC_NORSRAM_Extended_Timing_Init+0x52>
|
||
assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
|
||
assert_param(IS_FSMC_NORSRAM_BANK(Bank));
|
||
|
||
/* Set NORSRAM device timing register for write configuration, if extended mode is used */
|
||
#if defined(FSMC_BWTRx_BUSTURN)
|
||
MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime |
|
||
8002712: 68fb ldr r3, [r7, #12]
|
||
8002714: 687a ldr r2, [r7, #4]
|
||
8002716: f853 2022 ldr.w r2, [r3, r2, lsl #2]
|
||
800271a: 4b13 ldr r3, [pc, #76] ; (8002768 <FSMC_NORSRAM_Extended_Timing_Init+0x6c>)
|
||
800271c: 4013 ands r3, r2
|
||
800271e: 68ba ldr r2, [r7, #8]
|
||
8002720: 6811 ldr r1, [r2, #0]
|
||
8002722: 68ba ldr r2, [r7, #8]
|
||
8002724: 6852 ldr r2, [r2, #4]
|
||
8002726: 0112 lsls r2, r2, #4
|
||
8002728: 4311 orrs r1, r2
|
||
800272a: 68ba ldr r2, [r7, #8]
|
||
800272c: 6892 ldr r2, [r2, #8]
|
||
800272e: 0212 lsls r2, r2, #8
|
||
8002730: 4311 orrs r1, r2
|
||
8002732: 68ba ldr r2, [r7, #8]
|
||
8002734: 6992 ldr r2, [r2, #24]
|
||
8002736: 4311 orrs r1, r2
|
||
8002738: 68ba ldr r2, [r7, #8]
|
||
800273a: 68d2 ldr r2, [r2, #12]
|
||
800273c: 0412 lsls r2, r2, #16
|
||
800273e: 430a orrs r2, r1
|
||
8002740: ea43 0102 orr.w r1, r3, r2
|
||
8002744: 68fb ldr r3, [r7, #12]
|
||
8002746: 687a ldr r2, [r7, #4]
|
||
8002748: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
800274c: e005 b.n 800275a <FSMC_NORSRAM_Extended_Timing_Init+0x5e>
|
||
(((Timing->DataLatency) - 2U) << FSMC_BWTRx_DATLAT_Pos)));
|
||
#endif /* FSMC_BWTRx_BUSTURN */
|
||
}
|
||
else
|
||
{
|
||
Device->BWTR[Bank] = 0x0FFFFFFFU;
|
||
800274e: 68fb ldr r3, [r7, #12]
|
||
8002750: 687a ldr r2, [r7, #4]
|
||
8002752: f06f 4170 mvn.w r1, #4026531840 ; 0xf0000000
|
||
8002756: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
}
|
||
|
||
return HAL_OK;
|
||
800275a: 2300 movs r3, #0
|
||
}
|
||
800275c: 4618 mov r0, r3
|
||
800275e: 3714 adds r7, #20
|
||
8002760: 46bd mov sp, r7
|
||
8002762: bc80 pop {r7}
|
||
8002764: 4770 bx lr
|
||
8002766: bf00 nop
|
||
8002768: cff00000 .word 0xcff00000
|
||
|
||
0800276c <LCD_WR_REG>:
|
||
_lcd_dev lcddev; //����LCD��Ҫ����
|
||
//**************************************************���ֿ��ٽӿ�
|
||
//д�Ĵ�������
|
||
//regval:�Ĵ���ֵ
|
||
void LCD_WR_REG(uint16_t regval)
|
||
{
|
||
800276c: b480 push {r7}
|
||
800276e: b083 sub sp, #12
|
||
8002770: af00 add r7, sp, #0
|
||
8002772: 4603 mov r3, r0
|
||
8002774: 80fb strh r3, [r7, #6]
|
||
LCD_REG_ADDRESS=regval;//д��Ҫд�ļĴ�������
|
||
8002776: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
800277a: 88fb ldrh r3, [r7, #6]
|
||
800277c: 8013 strh r3, [r2, #0]
|
||
}
|
||
800277e: bf00 nop
|
||
8002780: 370c adds r7, #12
|
||
8002782: 46bd mov sp, r7
|
||
8002784: bc80 pop {r7}
|
||
8002786: 4770 bx lr
|
||
|
||
08002788 <LCD_WR_DATA>:
|
||
//дLCD����
|
||
//data:Ҫд����ֵ
|
||
void LCD_WR_DATA(uint16_t data)
|
||
{
|
||
8002788: b480 push {r7}
|
||
800278a: b083 sub sp, #12
|
||
800278c: af00 add r7, sp, #0
|
||
800278e: 4603 mov r3, r0
|
||
8002790: 80fb strh r3, [r7, #6]
|
||
LCD_DATA_ADDRESS=data;
|
||
8002792: 4a04 ldr r2, [pc, #16] ; (80027a4 <LCD_WR_DATA+0x1c>)
|
||
8002794: 88fb ldrh r3, [r7, #6]
|
||
8002796: 8013 strh r3, [r2, #0]
|
||
}
|
||
8002798: bf00 nop
|
||
800279a: 370c adds r7, #12
|
||
800279c: 46bd mov sp, r7
|
||
800279e: bc80 pop {r7}
|
||
80027a0: 4770 bx lr
|
||
80027a2: bf00 nop
|
||
80027a4: 6c000800 .word 0x6c000800
|
||
|
||
080027a8 <LCD_WriteReg>:
|
||
}
|
||
//д�Ĵ���
|
||
//LCD_Reg:�Ĵ�����ַ
|
||
//LCD_RegValue:Ҫд��������
|
||
void LCD_WriteReg(uint16_t LCD_Reg, uint16_t LCD_RegValue)
|
||
{
|
||
80027a8: b480 push {r7}
|
||
80027aa: b083 sub sp, #12
|
||
80027ac: af00 add r7, sp, #0
|
||
80027ae: 4603 mov r3, r0
|
||
80027b0: 460a mov r2, r1
|
||
80027b2: 80fb strh r3, [r7, #6]
|
||
80027b4: 4613 mov r3, r2
|
||
80027b6: 80bb strh r3, [r7, #4]
|
||
LCD_REG_ADDRESS = LCD_Reg; //д��Ҫд�ļĴ�������
|
||
80027b8: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
80027bc: 88fb ldrh r3, [r7, #6]
|
||
80027be: 8013 strh r3, [r2, #0]
|
||
LCD_DATA_ADDRESS = LCD_RegValue;//�����
|
||
80027c0: 4a03 ldr r2, [pc, #12] ; (80027d0 <LCD_WriteReg+0x28>)
|
||
80027c2: 88bb ldrh r3, [r7, #4]
|
||
80027c4: 8013 strh r3, [r2, #0]
|
||
}
|
||
80027c6: bf00 nop
|
||
80027c8: 370c adds r7, #12
|
||
80027ca: 46bd mov sp, r7
|
||
80027cc: bc80 pop {r7}
|
||
80027ce: 4770 bx lr
|
||
80027d0: 6c000800 .word 0x6c000800
|
||
|
||
080027d4 <LCD_ReadReg>:
|
||
//���Ĵ���
|
||
//LCD_Reg:�Ĵ�����ַ
|
||
//����ֵ:����������
|
||
uint16_t LCD_ReadReg(uint16_t LCD_Reg)
|
||
{
|
||
80027d4: b480 push {r7}
|
||
80027d6: b083 sub sp, #12
|
||
80027d8: af00 add r7, sp, #0
|
||
80027da: 4603 mov r3, r0
|
||
80027dc: 80fb strh r3, [r7, #6]
|
||
LCD_REG_ADDRESS=LCD_Reg; //д��Ҫ���ļĴ�������
|
||
80027de: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
80027e2: 88fb ldrh r3, [r7, #6]
|
||
80027e4: 8013 strh r3, [r2, #0]
|
||
//delay_us(5);
|
||
return LCD_DATA_ADDRESS; //���ض�����ֵ
|
||
80027e6: 4b04 ldr r3, [pc, #16] ; (80027f8 <LCD_ReadReg+0x24>)
|
||
80027e8: 881b ldrh r3, [r3, #0]
|
||
80027ea: b29b uxth r3, r3
|
||
}
|
||
80027ec: 4618 mov r0, r3
|
||
80027ee: 370c adds r7, #12
|
||
80027f0: 46bd mov sp, r7
|
||
80027f2: bc80 pop {r7}
|
||
80027f4: 4770 bx lr
|
||
80027f6: bf00 nop
|
||
80027f8: 6c000800 .word 0x6c000800
|
||
|
||
080027fc <LCD_Scan_Dir>:
|
||
//ע��:�����������ܻ��ܵ��˺������õ�Ӱ��(������9341/6804����������),
|
||
//����,һ������ΪL2R_U2D����,��������Ϊ����ɨ�跽ʽ,���ܵ�����ʾ������.
|
||
//dir:0~7,����8������(���嶨����lcd.h)
|
||
//9320/9325/9328/4531/4535/1505/b505/8989/5408/9341/5310��IC�Ѿ�ʵ�ʲ���
|
||
void LCD_Scan_Dir(uint8_t dir)
|
||
{
|
||
80027fc: b580 push {r7, lr}
|
||
80027fe: b084 sub sp, #16
|
||
8002800: af00 add r7, sp, #0
|
||
8002802: 4603 mov r3, r0
|
||
8002804: 71fb strb r3, [r7, #7]
|
||
uint16_t regval=0;
|
||
8002806: 2300 movs r3, #0
|
||
8002808: 81fb strh r3, [r7, #14]
|
||
uint8_t dirreg=0;
|
||
800280a: 2300 movs r3, #0
|
||
800280c: 737b strb r3, [r7, #13]
|
||
uint16_t temp;
|
||
if(lcddev.dir==1&&lcddev.id!=0X6804)//����ʱ����6804���ı�ɨ�跽����
|
||
800280e: 4ba8 ldr r3, [pc, #672] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
8002810: 799b ldrb r3, [r3, #6]
|
||
8002812: 2b01 cmp r3, #1
|
||
8002814: d134 bne.n 8002880 <LCD_Scan_Dir+0x84>
|
||
8002816: 4ba6 ldr r3, [pc, #664] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
8002818: 889b ldrh r3, [r3, #4]
|
||
800281a: f646 0204 movw r2, #26628 ; 0x6804
|
||
800281e: 4293 cmp r3, r2
|
||
8002820: d02e beq.n 8002880 <LCD_Scan_Dir+0x84>
|
||
{
|
||
switch(dir)//����ת��
|
||
8002822: 79fb ldrb r3, [r7, #7]
|
||
8002824: 2b07 cmp r3, #7
|
||
8002826: d82c bhi.n 8002882 <LCD_Scan_Dir+0x86>
|
||
8002828: a201 add r2, pc, #4 ; (adr r2, 8002830 <LCD_Scan_Dir+0x34>)
|
||
800282a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
800282e: bf00 nop
|
||
8002830: 08002851 .word 0x08002851
|
||
8002834: 08002857 .word 0x08002857
|
||
8002838: 0800285d .word 0x0800285d
|
||
800283c: 08002863 .word 0x08002863
|
||
8002840: 08002869 .word 0x08002869
|
||
8002844: 0800286f .word 0x0800286f
|
||
8002848: 08002875 .word 0x08002875
|
||
800284c: 0800287b .word 0x0800287b
|
||
{
|
||
case 0:dir=6;break;
|
||
8002850: 2306 movs r3, #6
|
||
8002852: 71fb strb r3, [r7, #7]
|
||
8002854: e015 b.n 8002882 <LCD_Scan_Dir+0x86>
|
||
case 1:dir=7;break;
|
||
8002856: 2307 movs r3, #7
|
||
8002858: 71fb strb r3, [r7, #7]
|
||
800285a: e012 b.n 8002882 <LCD_Scan_Dir+0x86>
|
||
case 2:dir=4;break;
|
||
800285c: 2304 movs r3, #4
|
||
800285e: 71fb strb r3, [r7, #7]
|
||
8002860: e00f b.n 8002882 <LCD_Scan_Dir+0x86>
|
||
case 3:dir=5;break;
|
||
8002862: 2305 movs r3, #5
|
||
8002864: 71fb strb r3, [r7, #7]
|
||
8002866: e00c b.n 8002882 <LCD_Scan_Dir+0x86>
|
||
case 4:dir=1;break;
|
||
8002868: 2301 movs r3, #1
|
||
800286a: 71fb strb r3, [r7, #7]
|
||
800286c: e009 b.n 8002882 <LCD_Scan_Dir+0x86>
|
||
case 5:dir=0;break;
|
||
800286e: 2300 movs r3, #0
|
||
8002870: 71fb strb r3, [r7, #7]
|
||
8002872: e006 b.n 8002882 <LCD_Scan_Dir+0x86>
|
||
case 6:dir=3;break;
|
||
8002874: 2303 movs r3, #3
|
||
8002876: 71fb strb r3, [r7, #7]
|
||
8002878: e003 b.n 8002882 <LCD_Scan_Dir+0x86>
|
||
case 7:dir=2;break;
|
||
800287a: 2302 movs r3, #2
|
||
800287c: 71fb strb r3, [r7, #7]
|
||
800287e: e000 b.n 8002882 <LCD_Scan_Dir+0x86>
|
||
}
|
||
}
|
||
8002880: bf00 nop
|
||
if(lcddev.id==0x9341||lcddev.id==0X6804||lcddev.id==0X5310)//9341/6804/5310,������
|
||
8002882: 4b8b ldr r3, [pc, #556] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
8002884: 889b ldrh r3, [r3, #4]
|
||
8002886: f249 3241 movw r2, #37697 ; 0x9341
|
||
800288a: 4293 cmp r3, r2
|
||
800288c: d00c beq.n 80028a8 <LCD_Scan_Dir+0xac>
|
||
800288e: 4b88 ldr r3, [pc, #544] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
8002890: 889b ldrh r3, [r3, #4]
|
||
8002892: f646 0204 movw r2, #26628 ; 0x6804
|
||
8002896: 4293 cmp r3, r2
|
||
8002898: d006 beq.n 80028a8 <LCD_Scan_Dir+0xac>
|
||
800289a: 4b85 ldr r3, [pc, #532] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
800289c: 889b ldrh r3, [r3, #4]
|
||
800289e: f245 3210 movw r2, #21264 ; 0x5310
|
||
80028a2: 4293 cmp r3, r2
|
||
80028a4: f040 80bb bne.w 8002a1e <LCD_Scan_Dir+0x222>
|
||
{
|
||
switch(dir)
|
||
80028a8: 79fb ldrb r3, [r7, #7]
|
||
80028aa: 2b07 cmp r3, #7
|
||
80028ac: d835 bhi.n 800291a <LCD_Scan_Dir+0x11e>
|
||
80028ae: a201 add r2, pc, #4 ; (adr r2, 80028b4 <LCD_Scan_Dir+0xb8>)
|
||
80028b0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
80028b4: 0800291b .word 0x0800291b
|
||
80028b8: 080028d5 .word 0x080028d5
|
||
80028bc: 080028df .word 0x080028df
|
||
80028c0: 080028e9 .word 0x080028e9
|
||
80028c4: 080028f3 .word 0x080028f3
|
||
80028c8: 080028fd .word 0x080028fd
|
||
80028cc: 08002907 .word 0x08002907
|
||
80028d0: 08002911 .word 0x08002911
|
||
{
|
||
case L2R_U2D://��������,���ϵ���
|
||
regval|=(0<<7)|(0<<6)|(0<<5);
|
||
break;
|
||
case L2R_D2U://��������,���µ���
|
||
regval|=(1<<7)|(0<<6)|(0<<5);
|
||
80028d4: 89fb ldrh r3, [r7, #14]
|
||
80028d6: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
80028da: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80028dc: e01d b.n 800291a <LCD_Scan_Dir+0x11e>
|
||
case R2L_U2D://���ҵ���,���ϵ���
|
||
regval|=(0<<7)|(1<<6)|(0<<5);
|
||
80028de: 89fb ldrh r3, [r7, #14]
|
||
80028e0: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
80028e4: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80028e6: e018 b.n 800291a <LCD_Scan_Dir+0x11e>
|
||
case R2L_D2U://���ҵ���,���µ���
|
||
regval|=(1<<7)|(1<<6)|(0<<5);
|
||
80028e8: 89fb ldrh r3, [r7, #14]
|
||
80028ea: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
||
80028ee: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80028f0: e013 b.n 800291a <LCD_Scan_Dir+0x11e>
|
||
case U2D_L2R://���ϵ���,��������
|
||
regval|=(0<<7)|(0<<6)|(1<<5);
|
||
80028f2: 89fb ldrh r3, [r7, #14]
|
||
80028f4: f043 0320 orr.w r3, r3, #32
|
||
80028f8: 81fb strh r3, [r7, #14]
|
||
break;
|
||
80028fa: e00e b.n 800291a <LCD_Scan_Dir+0x11e>
|
||
case U2D_R2L://���ϵ���,���ҵ���
|
||
regval|=(0<<7)|(1<<6)|(1<<5);
|
||
80028fc: 89fb ldrh r3, [r7, #14]
|
||
80028fe: f043 0360 orr.w r3, r3, #96 ; 0x60
|
||
8002902: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8002904: e009 b.n 800291a <LCD_Scan_Dir+0x11e>
|
||
case D2U_L2R://���µ���,��������
|
||
regval|=(1<<7)|(0<<6)|(1<<5);
|
||
8002906: 89fb ldrh r3, [r7, #14]
|
||
8002908: f043 03a0 orr.w r3, r3, #160 ; 0xa0
|
||
800290c: 81fb strh r3, [r7, #14]
|
||
break;
|
||
800290e: e004 b.n 800291a <LCD_Scan_Dir+0x11e>
|
||
case D2U_R2L://���µ���,���ҵ���
|
||
regval|=(1<<7)|(1<<6)|(1<<5);
|
||
8002910: 89fb ldrh r3, [r7, #14]
|
||
8002912: f043 03e0 orr.w r3, r3, #224 ; 0xe0
|
||
8002916: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8002918: bf00 nop
|
||
}
|
||
dirreg=0X36;
|
||
800291a: 2336 movs r3, #54 ; 0x36
|
||
800291c: 737b strb r3, [r7, #13]
|
||
if(lcddev.id!=0X5310)regval|=0X08;//5310����ҪBGR
|
||
800291e: 4b64 ldr r3, [pc, #400] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
8002920: 889b ldrh r3, [r3, #4]
|
||
8002922: f245 3210 movw r2, #21264 ; 0x5310
|
||
8002926: 4293 cmp r3, r2
|
||
8002928: d003 beq.n 8002932 <LCD_Scan_Dir+0x136>
|
||
800292a: 89fb ldrh r3, [r7, #14]
|
||
800292c: f043 0308 orr.w r3, r3, #8
|
||
8002930: 81fb strh r3, [r7, #14]
|
||
if(lcddev.id==0X6804)regval|=0x02;//6804��BIT6��9341�ķ���
|
||
8002932: 4b5f ldr r3, [pc, #380] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
8002934: 889b ldrh r3, [r3, #4]
|
||
8002936: f646 0204 movw r2, #26628 ; 0x6804
|
||
800293a: 4293 cmp r3, r2
|
||
800293c: d103 bne.n 8002946 <LCD_Scan_Dir+0x14a>
|
||
800293e: 89fb ldrh r3, [r7, #14]
|
||
8002940: f043 0302 orr.w r3, r3, #2
|
||
8002944: 81fb strh r3, [r7, #14]
|
||
LCD_WriteReg(dirreg,regval);
|
||
8002946: 7b7b ldrb r3, [r7, #13]
|
||
8002948: b29b uxth r3, r3
|
||
800294a: 89fa ldrh r2, [r7, #14]
|
||
800294c: 4611 mov r1, r2
|
||
800294e: 4618 mov r0, r3
|
||
8002950: f7ff ff2a bl 80027a8 <LCD_WriteReg>
|
||
if((regval&0X20)||lcddev.dir==1)
|
||
8002954: 89fb ldrh r3, [r7, #14]
|
||
8002956: f003 0320 and.w r3, r3, #32
|
||
800295a: 2b00 cmp r3, #0
|
||
800295c: d103 bne.n 8002966 <LCD_Scan_Dir+0x16a>
|
||
800295e: 4b54 ldr r3, [pc, #336] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
8002960: 799b ldrb r3, [r3, #6]
|
||
8002962: 2b01 cmp r3, #1
|
||
8002964: d110 bne.n 8002988 <LCD_Scan_Dir+0x18c>
|
||
{
|
||
if(lcddev.width<lcddev.height)//����X,Y
|
||
8002966: 4b52 ldr r3, [pc, #328] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
8002968: 881a ldrh r2, [r3, #0]
|
||
800296a: 4b51 ldr r3, [pc, #324] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
800296c: 885b ldrh r3, [r3, #2]
|
||
800296e: 429a cmp r2, r3
|
||
8002970: d21a bcs.n 80029a8 <LCD_Scan_Dir+0x1ac>
|
||
{
|
||
temp=lcddev.width;
|
||
8002972: 4b4f ldr r3, [pc, #316] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
8002974: 881b ldrh r3, [r3, #0]
|
||
8002976: 817b strh r3, [r7, #10]
|
||
lcddev.width=lcddev.height;
|
||
8002978: 4b4d ldr r3, [pc, #308] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
800297a: 885a ldrh r2, [r3, #2]
|
||
800297c: 4b4c ldr r3, [pc, #304] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
800297e: 801a strh r2, [r3, #0]
|
||
lcddev.height=temp;
|
||
8002980: 4a4b ldr r2, [pc, #300] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
8002982: 897b ldrh r3, [r7, #10]
|
||
8002984: 8053 strh r3, [r2, #2]
|
||
if(lcddev.width<lcddev.height)//����X,Y
|
||
8002986: e00f b.n 80029a8 <LCD_Scan_Dir+0x1ac>
|
||
}
|
||
}else
|
||
{
|
||
if(lcddev.width>lcddev.height)//����X,Y
|
||
8002988: 4b49 ldr r3, [pc, #292] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
800298a: 881a ldrh r2, [r3, #0]
|
||
800298c: 4b48 ldr r3, [pc, #288] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
800298e: 885b ldrh r3, [r3, #2]
|
||
8002990: 429a cmp r2, r3
|
||
8002992: d909 bls.n 80029a8 <LCD_Scan_Dir+0x1ac>
|
||
{
|
||
temp=lcddev.width;
|
||
8002994: 4b46 ldr r3, [pc, #280] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
8002996: 881b ldrh r3, [r3, #0]
|
||
8002998: 817b strh r3, [r7, #10]
|
||
lcddev.width=lcddev.height;
|
||
800299a: 4b45 ldr r3, [pc, #276] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
800299c: 885a ldrh r2, [r3, #2]
|
||
800299e: 4b44 ldr r3, [pc, #272] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
80029a0: 801a strh r2, [r3, #0]
|
||
lcddev.height=temp;
|
||
80029a2: 4a43 ldr r2, [pc, #268] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
80029a4: 897b ldrh r3, [r7, #10]
|
||
80029a6: 8053 strh r3, [r2, #2]
|
||
}
|
||
}
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
80029a8: 4b41 ldr r3, [pc, #260] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
80029aa: 7a1b ldrb r3, [r3, #8]
|
||
80029ac: b29b uxth r3, r3
|
||
80029ae: 4618 mov r0, r3
|
||
80029b0: f7ff fedc bl 800276c <LCD_WR_REG>
|
||
LCD_WR_DATA(0);LCD_WR_DATA(0);
|
||
80029b4: 2000 movs r0, #0
|
||
80029b6: f7ff fee7 bl 8002788 <LCD_WR_DATA>
|
||
80029ba: 2000 movs r0, #0
|
||
80029bc: f7ff fee4 bl 8002788 <LCD_WR_DATA>
|
||
LCD_WR_DATA((lcddev.width-1)>>8);LCD_WR_DATA((lcddev.width-1)&0XFF);
|
||
80029c0: 4b3b ldr r3, [pc, #236] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
80029c2: 881b ldrh r3, [r3, #0]
|
||
80029c4: 3b01 subs r3, #1
|
||
80029c6: 121b asrs r3, r3, #8
|
||
80029c8: b29b uxth r3, r3
|
||
80029ca: 4618 mov r0, r3
|
||
80029cc: f7ff fedc bl 8002788 <LCD_WR_DATA>
|
||
80029d0: 4b37 ldr r3, [pc, #220] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
80029d2: 881b ldrh r3, [r3, #0]
|
||
80029d4: 3b01 subs r3, #1
|
||
80029d6: b29b uxth r3, r3
|
||
80029d8: b2db uxtb r3, r3
|
||
80029da: b29b uxth r3, r3
|
||
80029dc: 4618 mov r0, r3
|
||
80029de: f7ff fed3 bl 8002788 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
80029e2: 4b33 ldr r3, [pc, #204] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
80029e4: 7a5b ldrb r3, [r3, #9]
|
||
80029e6: b29b uxth r3, r3
|
||
80029e8: 4618 mov r0, r3
|
||
80029ea: f7ff febf bl 800276c <LCD_WR_REG>
|
||
LCD_WR_DATA(0);LCD_WR_DATA(0);
|
||
80029ee: 2000 movs r0, #0
|
||
80029f0: f7ff feca bl 8002788 <LCD_WR_DATA>
|
||
80029f4: 2000 movs r0, #0
|
||
80029f6: f7ff fec7 bl 8002788 <LCD_WR_DATA>
|
||
LCD_WR_DATA((lcddev.height-1)>>8);LCD_WR_DATA((lcddev.height-1)&0XFF);
|
||
80029fa: 4b2d ldr r3, [pc, #180] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
80029fc: 885b ldrh r3, [r3, #2]
|
||
80029fe: 3b01 subs r3, #1
|
||
8002a00: 121b asrs r3, r3, #8
|
||
8002a02: b29b uxth r3, r3
|
||
8002a04: 4618 mov r0, r3
|
||
8002a06: f7ff febf bl 8002788 <LCD_WR_DATA>
|
||
8002a0a: 4b29 ldr r3, [pc, #164] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
8002a0c: 885b ldrh r3, [r3, #2]
|
||
8002a0e: 3b01 subs r3, #1
|
||
8002a10: b29b uxth r3, r3
|
||
8002a12: b2db uxtb r3, r3
|
||
8002a14: b29b uxth r3, r3
|
||
8002a16: 4618 mov r0, r3
|
||
8002a18: f7ff feb6 bl 8002788 <LCD_WR_DATA>
|
||
8002a1c: e058 b.n 8002ad0 <LCD_Scan_Dir+0x2d4>
|
||
}else
|
||
{
|
||
switch(dir)
|
||
8002a1e: 79fb ldrb r3, [r7, #7]
|
||
8002a20: 2b07 cmp r3, #7
|
||
8002a22: d836 bhi.n 8002a92 <LCD_Scan_Dir+0x296>
|
||
8002a24: a201 add r2, pc, #4 ; (adr r2, 8002a2c <LCD_Scan_Dir+0x230>)
|
||
8002a26: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
8002a2a: bf00 nop
|
||
8002a2c: 08002a4d .word 0x08002a4d
|
||
8002a30: 08002a57 .word 0x08002a57
|
||
8002a34: 08002a61 .word 0x08002a61
|
||
8002a38: 08002a93 .word 0x08002a93
|
||
8002a3c: 08002a6b .word 0x08002a6b
|
||
8002a40: 08002a75 .word 0x08002a75
|
||
8002a44: 08002a7f .word 0x08002a7f
|
||
8002a48: 08002a89 .word 0x08002a89
|
||
{
|
||
case L2R_U2D://��������,���ϵ���
|
||
regval|=(1<<5)|(1<<4)|(0<<3);
|
||
8002a4c: 89fb ldrh r3, [r7, #14]
|
||
8002a4e: f043 0330 orr.w r3, r3, #48 ; 0x30
|
||
8002a52: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8002a54: e01d b.n 8002a92 <LCD_Scan_Dir+0x296>
|
||
case L2R_D2U://��������,���µ���
|
||
regval|=(0<<5)|(1<<4)|(0<<3);
|
||
8002a56: 89fb ldrh r3, [r7, #14]
|
||
8002a58: f043 0310 orr.w r3, r3, #16
|
||
8002a5c: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8002a5e: e018 b.n 8002a92 <LCD_Scan_Dir+0x296>
|
||
case R2L_U2D://���ҵ���,���ϵ���
|
||
regval|=(1<<5)|(0<<4)|(0<<3);
|
||
8002a60: 89fb ldrh r3, [r7, #14]
|
||
8002a62: f043 0320 orr.w r3, r3, #32
|
||
8002a66: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8002a68: e013 b.n 8002a92 <LCD_Scan_Dir+0x296>
|
||
case R2L_D2U://���ҵ���,���µ���
|
||
regval|=(0<<5)|(0<<4)|(0<<3);
|
||
break;
|
||
case U2D_L2R://���ϵ���,��������
|
||
regval|=(1<<5)|(1<<4)|(1<<3);
|
||
8002a6a: 89fb ldrh r3, [r7, #14]
|
||
8002a6c: f043 0338 orr.w r3, r3, #56 ; 0x38
|
||
8002a70: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8002a72: e00e b.n 8002a92 <LCD_Scan_Dir+0x296>
|
||
case U2D_R2L://���ϵ���,���ҵ���
|
||
regval|=(1<<5)|(0<<4)|(1<<3);
|
||
8002a74: 89fb ldrh r3, [r7, #14]
|
||
8002a76: f043 0328 orr.w r3, r3, #40 ; 0x28
|
||
8002a7a: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8002a7c: e009 b.n 8002a92 <LCD_Scan_Dir+0x296>
|
||
case D2U_L2R://���µ���,��������
|
||
regval|=(0<<5)|(1<<4)|(1<<3);
|
||
8002a7e: 89fb ldrh r3, [r7, #14]
|
||
8002a80: f043 0318 orr.w r3, r3, #24
|
||
8002a84: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8002a86: e004 b.n 8002a92 <LCD_Scan_Dir+0x296>
|
||
case D2U_R2L://���µ���,���ҵ���
|
||
regval|=(0<<5)|(0<<4)|(1<<3);
|
||
8002a88: 89fb ldrh r3, [r7, #14]
|
||
8002a8a: f043 0308 orr.w r3, r3, #8
|
||
8002a8e: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8002a90: bf00 nop
|
||
}
|
||
if(lcddev.id==0x8989)//8989 IC
|
||
8002a92: 4b07 ldr r3, [pc, #28] ; (8002ab0 <LCD_Scan_Dir+0x2b4>)
|
||
8002a94: 889b ldrh r3, [r3, #4]
|
||
8002a96: f648 1289 movw r2, #35209 ; 0x8989
|
||
8002a9a: 4293 cmp r3, r2
|
||
8002a9c: d10a bne.n 8002ab4 <LCD_Scan_Dir+0x2b8>
|
||
{
|
||
dirreg=0X11;
|
||
8002a9e: 2311 movs r3, #17
|
||
8002aa0: 737b strb r3, [r7, #13]
|
||
regval|=0X6040; //65K
|
||
8002aa2: 89fb ldrh r3, [r7, #14]
|
||
8002aa4: f443 43c0 orr.w r3, r3, #24576 ; 0x6000
|
||
8002aa8: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8002aac: 81fb strh r3, [r7, #14]
|
||
8002aae: e007 b.n 8002ac0 <LCD_Scan_Dir+0x2c4>
|
||
8002ab0: 20000254 .word 0x20000254
|
||
}else//��������IC
|
||
{
|
||
dirreg=0X03;
|
||
8002ab4: 2303 movs r3, #3
|
||
8002ab6: 737b strb r3, [r7, #13]
|
||
regval|=1<<12;
|
||
8002ab8: 89fb ldrh r3, [r7, #14]
|
||
8002aba: f443 5380 orr.w r3, r3, #4096 ; 0x1000
|
||
8002abe: 81fb strh r3, [r7, #14]
|
||
}
|
||
LCD_WriteReg(dirreg,regval);
|
||
8002ac0: 7b7b ldrb r3, [r7, #13]
|
||
8002ac2: b29b uxth r3, r3
|
||
8002ac4: 89fa ldrh r2, [r7, #14]
|
||
8002ac6: 4611 mov r1, r2
|
||
8002ac8: 4618 mov r0, r3
|
||
8002aca: f7ff fe6d bl 80027a8 <LCD_WriteReg>
|
||
}
|
||
}
|
||
8002ace: bf00 nop
|
||
8002ad0: bf00 nop
|
||
8002ad2: 3710 adds r7, #16
|
||
8002ad4: 46bd mov sp, r7
|
||
8002ad6: bd80 pop {r7, pc}
|
||
|
||
08002ad8 <LCD_Display_Dir>:
|
||
//����LCD��ʾ����
|
||
//dir:0,������1,����
|
||
void LCD_Display_Dir(uint8_t dir)
|
||
{
|
||
8002ad8: b580 push {r7, lr}
|
||
8002ada: b082 sub sp, #8
|
||
8002adc: af00 add r7, sp, #0
|
||
8002ade: 4603 mov r3, r0
|
||
8002ae0: 71fb strb r3, [r7, #7]
|
||
if(dir==0) //����
|
||
8002ae2: 79fb ldrb r3, [r7, #7]
|
||
8002ae4: 2b00 cmp r3, #0
|
||
8002ae6: d154 bne.n 8002b92 <LCD_Display_Dir+0xba>
|
||
{
|
||
lcddev.dir=0; //����
|
||
8002ae8: 4b5d ldr r3, [pc, #372] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002aea: 2200 movs r2, #0
|
||
8002aec: 719a strb r2, [r3, #6]
|
||
lcddev.width=240;
|
||
8002aee: 4b5c ldr r3, [pc, #368] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002af0: 22f0 movs r2, #240 ; 0xf0
|
||
8002af2: 801a strh r2, [r3, #0]
|
||
lcddev.height=320;
|
||
8002af4: 4b5a ldr r3, [pc, #360] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002af6: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8002afa: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X9341||lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8002afc: 4b58 ldr r3, [pc, #352] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002afe: 889b ldrh r3, [r3, #4]
|
||
8002b00: f249 3241 movw r2, #37697 ; 0x9341
|
||
8002b04: 4293 cmp r3, r2
|
||
8002b06: d00b beq.n 8002b20 <LCD_Display_Dir+0x48>
|
||
8002b08: 4b55 ldr r3, [pc, #340] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b0a: 889b ldrh r3, [r3, #4]
|
||
8002b0c: f646 0204 movw r2, #26628 ; 0x6804
|
||
8002b10: 4293 cmp r3, r2
|
||
8002b12: d005 beq.n 8002b20 <LCD_Display_Dir+0x48>
|
||
8002b14: 4b52 ldr r3, [pc, #328] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b16: 889b ldrh r3, [r3, #4]
|
||
8002b18: f245 3210 movw r2, #21264 ; 0x5310
|
||
8002b1c: 4293 cmp r3, r2
|
||
8002b1e: d11e bne.n 8002b5e <LCD_Display_Dir+0x86>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
8002b20: 4b4f ldr r3, [pc, #316] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b22: 222c movs r2, #44 ; 0x2c
|
||
8002b24: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2A;
|
||
8002b26: 4b4e ldr r3, [pc, #312] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b28: 222a movs r2, #42 ; 0x2a
|
||
8002b2a: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
8002b2c: 4b4c ldr r3, [pc, #304] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b2e: 222b movs r2, #43 ; 0x2b
|
||
8002b30: 725a strb r2, [r3, #9]
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8002b32: 4b4b ldr r3, [pc, #300] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b34: 889b ldrh r3, [r3, #4]
|
||
8002b36: f646 0204 movw r2, #26628 ; 0x6804
|
||
8002b3a: 4293 cmp r3, r2
|
||
8002b3c: d006 beq.n 8002b4c <LCD_Display_Dir+0x74>
|
||
8002b3e: 4b48 ldr r3, [pc, #288] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b40: 889b ldrh r3, [r3, #4]
|
||
8002b42: f245 3210 movw r2, #21264 ; 0x5310
|
||
8002b46: 4293 cmp r3, r2
|
||
8002b48: f040 8081 bne.w 8002c4e <LCD_Display_Dir+0x176>
|
||
{
|
||
lcddev.width=320;
|
||
8002b4c: 4b44 ldr r3, [pc, #272] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b4e: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8002b52: 801a strh r2, [r3, #0]
|
||
lcddev.height=480;
|
||
8002b54: 4b42 ldr r3, [pc, #264] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b56: f44f 72f0 mov.w r2, #480 ; 0x1e0
|
||
8002b5a: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8002b5c: e077 b.n 8002c4e <LCD_Display_Dir+0x176>
|
||
}
|
||
}else if(lcddev.id==0X8989)
|
||
8002b5e: 4b40 ldr r3, [pc, #256] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b60: 889b ldrh r3, [r3, #4]
|
||
8002b62: f648 1289 movw r2, #35209 ; 0x8989
|
||
8002b66: 4293 cmp r3, r2
|
||
8002b68: d109 bne.n 8002b7e <LCD_Display_Dir+0xa6>
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8002b6a: 4b3d ldr r3, [pc, #244] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b6c: 2222 movs r2, #34 ; 0x22
|
||
8002b6e: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X4E;
|
||
8002b70: 4b3b ldr r3, [pc, #236] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b72: 224e movs r2, #78 ; 0x4e
|
||
8002b74: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X4F;
|
||
8002b76: 4b3a ldr r3, [pc, #232] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b78: 224f movs r2, #79 ; 0x4f
|
||
8002b7a: 725a strb r2, [r3, #9]
|
||
8002b7c: e068 b.n 8002c50 <LCD_Display_Dir+0x178>
|
||
}else
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8002b7e: 4b38 ldr r3, [pc, #224] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b80: 2222 movs r2, #34 ; 0x22
|
||
8002b82: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=R32;
|
||
8002b84: 4b36 ldr r3, [pc, #216] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b86: 2220 movs r2, #32
|
||
8002b88: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=R33;
|
||
8002b8a: 4b35 ldr r3, [pc, #212] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b8c: 2221 movs r2, #33 ; 0x21
|
||
8002b8e: 725a strb r2, [r3, #9]
|
||
8002b90: e05e b.n 8002c50 <LCD_Display_Dir+0x178>
|
||
}
|
||
}else //����
|
||
{
|
||
lcddev.dir=1; //����
|
||
8002b92: 4b33 ldr r3, [pc, #204] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b94: 2201 movs r2, #1
|
||
8002b96: 719a strb r2, [r3, #6]
|
||
lcddev.width=320;
|
||
8002b98: 4b31 ldr r3, [pc, #196] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002b9a: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8002b9e: 801a strh r2, [r3, #0]
|
||
lcddev.height=240;
|
||
8002ba0: 4b2f ldr r3, [pc, #188] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002ba2: 22f0 movs r2, #240 ; 0xf0
|
||
8002ba4: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X9341||lcddev.id==0X5310)
|
||
8002ba6: 4b2e ldr r3, [pc, #184] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002ba8: 889b ldrh r3, [r3, #4]
|
||
8002baa: f249 3241 movw r2, #37697 ; 0x9341
|
||
8002bae: 4293 cmp r3, r2
|
||
8002bb0: d005 beq.n 8002bbe <LCD_Display_Dir+0xe6>
|
||
8002bb2: 4b2b ldr r3, [pc, #172] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002bb4: 889b ldrh r3, [r3, #4]
|
||
8002bb6: f245 3210 movw r2, #21264 ; 0x5310
|
||
8002bba: 4293 cmp r3, r2
|
||
8002bbc: d109 bne.n 8002bd2 <LCD_Display_Dir+0xfa>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
8002bbe: 4b28 ldr r3, [pc, #160] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002bc0: 222c movs r2, #44 ; 0x2c
|
||
8002bc2: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2A;
|
||
8002bc4: 4b26 ldr r3, [pc, #152] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002bc6: 222a movs r2, #42 ; 0x2a
|
||
8002bc8: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
8002bca: 4b25 ldr r3, [pc, #148] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002bcc: 222b movs r2, #43 ; 0x2b
|
||
8002bce: 725a strb r2, [r3, #9]
|
||
8002bd0: e028 b.n 8002c24 <LCD_Display_Dir+0x14c>
|
||
}else if(lcddev.id==0X6804)
|
||
8002bd2: 4b23 ldr r3, [pc, #140] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002bd4: 889b ldrh r3, [r3, #4]
|
||
8002bd6: f646 0204 movw r2, #26628 ; 0x6804
|
||
8002bda: 4293 cmp r3, r2
|
||
8002bdc: d109 bne.n 8002bf2 <LCD_Display_Dir+0x11a>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
8002bde: 4b20 ldr r3, [pc, #128] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002be0: 222c movs r2, #44 ; 0x2c
|
||
8002be2: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2B;
|
||
8002be4: 4b1e ldr r3, [pc, #120] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002be6: 222b movs r2, #43 ; 0x2b
|
||
8002be8: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2A;
|
||
8002bea: 4b1d ldr r3, [pc, #116] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002bec: 222a movs r2, #42 ; 0x2a
|
||
8002bee: 725a strb r2, [r3, #9]
|
||
8002bf0: e018 b.n 8002c24 <LCD_Display_Dir+0x14c>
|
||
}else if(lcddev.id==0X8989)
|
||
8002bf2: 4b1b ldr r3, [pc, #108] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002bf4: 889b ldrh r3, [r3, #4]
|
||
8002bf6: f648 1289 movw r2, #35209 ; 0x8989
|
||
8002bfa: 4293 cmp r3, r2
|
||
8002bfc: d109 bne.n 8002c12 <LCD_Display_Dir+0x13a>
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8002bfe: 4b18 ldr r3, [pc, #96] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002c00: 2222 movs r2, #34 ; 0x22
|
||
8002c02: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X4F;
|
||
8002c04: 4b16 ldr r3, [pc, #88] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002c06: 224f movs r2, #79 ; 0x4f
|
||
8002c08: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X4E;
|
||
8002c0a: 4b15 ldr r3, [pc, #84] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002c0c: 224e movs r2, #78 ; 0x4e
|
||
8002c0e: 725a strb r2, [r3, #9]
|
||
8002c10: e008 b.n 8002c24 <LCD_Display_Dir+0x14c>
|
||
}else
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8002c12: 4b13 ldr r3, [pc, #76] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002c14: 2222 movs r2, #34 ; 0x22
|
||
8002c16: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=R33;
|
||
8002c18: 4b11 ldr r3, [pc, #68] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002c1a: 2221 movs r2, #33 ; 0x21
|
||
8002c1c: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=R32;
|
||
8002c1e: 4b10 ldr r3, [pc, #64] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002c20: 2220 movs r2, #32
|
||
8002c22: 725a strb r2, [r3, #9]
|
||
}
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8002c24: 4b0e ldr r3, [pc, #56] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002c26: 889b ldrh r3, [r3, #4]
|
||
8002c28: f646 0204 movw r2, #26628 ; 0x6804
|
||
8002c2c: 4293 cmp r3, r2
|
||
8002c2e: d005 beq.n 8002c3c <LCD_Display_Dir+0x164>
|
||
8002c30: 4b0b ldr r3, [pc, #44] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002c32: 889b ldrh r3, [r3, #4]
|
||
8002c34: f245 3210 movw r2, #21264 ; 0x5310
|
||
8002c38: 4293 cmp r3, r2
|
||
8002c3a: d109 bne.n 8002c50 <LCD_Display_Dir+0x178>
|
||
{
|
||
lcddev.width=480;
|
||
8002c3c: 4b08 ldr r3, [pc, #32] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002c3e: f44f 72f0 mov.w r2, #480 ; 0x1e0
|
||
8002c42: 801a strh r2, [r3, #0]
|
||
lcddev.height=320;
|
||
8002c44: 4b06 ldr r3, [pc, #24] ; (8002c60 <LCD_Display_Dir+0x188>)
|
||
8002c46: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8002c4a: 805a strh r2, [r3, #2]
|
||
8002c4c: e000 b.n 8002c50 <LCD_Display_Dir+0x178>
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8002c4e: bf00 nop
|
||
}
|
||
}
|
||
LCD_Scan_Dir(DFT_SCAN_DIR); //Ĭ��ɨ�跽��
|
||
8002c50: 2000 movs r0, #0
|
||
8002c52: f7ff fdd3 bl 80027fc <LCD_Scan_Dir>
|
||
}
|
||
8002c56: bf00 nop
|
||
8002c58: 3708 adds r7, #8
|
||
8002c5a: 46bd mov sp, r7
|
||
8002c5c: bd80 pop {r7, pc}
|
||
8002c5e: bf00 nop
|
||
8002c60: 20000254 .word 0x20000254
|
||
|
||
08002c64 <LCDx_Init>:
|
||
|
||
//��ʼ��lcd
|
||
//�ó�ʼ���������Գ�ʼ������Һ��!
|
||
void LCDx_Init(void)
|
||
{
|
||
8002c64: b580 push {r7, lr}
|
||
8002c66: af00 add r7, sp, #0
|
||
|
||
|
||
HAL_Delay(50); // delay 50 ms
|
||
8002c68: 2032 movs r0, #50 ; 0x32
|
||
8002c6a: f7fe fda7 bl 80017bc <HAL_Delay>
|
||
LCD_WriteReg(0x0000,0x0001);
|
||
8002c6e: 2101 movs r1, #1
|
||
8002c70: 2000 movs r0, #0
|
||
8002c72: f7ff fd99 bl 80027a8 <LCD_WriteReg>
|
||
HAL_Delay(50); // delay 50 ms
|
||
8002c76: 2032 movs r0, #50 ; 0x32
|
||
8002c78: f7fe fda0 bl 80017bc <HAL_Delay>
|
||
lcddev.id = LCD_ReadReg(0x0000);
|
||
8002c7c: 2000 movs r0, #0
|
||
8002c7e: f7ff fda9 bl 80027d4 <LCD_ReadReg>
|
||
8002c82: 4603 mov r3, r0
|
||
8002c84: 461a mov r2, r3
|
||
8002c86: 4b70 ldr r3, [pc, #448] ; (8002e48 <LCDx_Init+0x1e4>)
|
||
8002c88: 809a strh r2, [r3, #4]
|
||
|
||
|
||
LCD_WriteReg(0x00E5,0x78F0);
|
||
8002c8a: f647 01f0 movw r1, #30960 ; 0x78f0
|
||
8002c8e: 20e5 movs r0, #229 ; 0xe5
|
||
8002c90: f7ff fd8a bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0001,0x0100);
|
||
8002c94: f44f 7180 mov.w r1, #256 ; 0x100
|
||
8002c98: 2001 movs r0, #1
|
||
8002c9a: f7ff fd85 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0002,0x0700);
|
||
8002c9e: f44f 61e0 mov.w r1, #1792 ; 0x700
|
||
8002ca2: 2002 movs r0, #2
|
||
8002ca4: f7ff fd80 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0003,0x1030);
|
||
8002ca8: f241 0130 movw r1, #4144 ; 0x1030
|
||
8002cac: 2003 movs r0, #3
|
||
8002cae: f7ff fd7b bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0004,0x0000);
|
||
8002cb2: 2100 movs r1, #0
|
||
8002cb4: 2004 movs r0, #4
|
||
8002cb6: f7ff fd77 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0008,0x0202);
|
||
8002cba: f240 2102 movw r1, #514 ; 0x202
|
||
8002cbe: 2008 movs r0, #8
|
||
8002cc0: f7ff fd72 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0009,0x0000);
|
||
8002cc4: 2100 movs r1, #0
|
||
8002cc6: 2009 movs r0, #9
|
||
8002cc8: f7ff fd6e bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000A,0x0000);
|
||
8002ccc: 2100 movs r1, #0
|
||
8002cce: 200a movs r0, #10
|
||
8002cd0: f7ff fd6a bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000C,0x0000);
|
||
8002cd4: 2100 movs r1, #0
|
||
8002cd6: 200c movs r0, #12
|
||
8002cd8: f7ff fd66 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000D,0x0000);
|
||
8002cdc: 2100 movs r1, #0
|
||
8002cde: 200d movs r0, #13
|
||
8002ce0: f7ff fd62 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000F,0x0000);
|
||
8002ce4: 2100 movs r1, #0
|
||
8002ce6: 200f movs r0, #15
|
||
8002ce8: f7ff fd5e bl 80027a8 <LCD_WriteReg>
|
||
//power on sequence VGHVGL
|
||
LCD_WriteReg(0x0010,0x0000);
|
||
8002cec: 2100 movs r1, #0
|
||
8002cee: 2010 movs r0, #16
|
||
8002cf0: f7ff fd5a bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0011,0x0007);
|
||
8002cf4: 2107 movs r1, #7
|
||
8002cf6: 2011 movs r0, #17
|
||
8002cf8: f7ff fd56 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0012,0x0000);
|
||
8002cfc: 2100 movs r1, #0
|
||
8002cfe: 2012 movs r0, #18
|
||
8002d00: f7ff fd52 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0013,0x0000);
|
||
8002d04: 2100 movs r1, #0
|
||
8002d06: 2013 movs r0, #19
|
||
8002d08: f7ff fd4e bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0007,0x0000);
|
||
8002d0c: 2100 movs r1, #0
|
||
8002d0e: 2007 movs r0, #7
|
||
8002d10: f7ff fd4a bl 80027a8 <LCD_WriteReg>
|
||
//vgh
|
||
LCD_WriteReg(0x0010,0x1690);
|
||
8002d14: f241 6190 movw r1, #5776 ; 0x1690
|
||
8002d18: 2010 movs r0, #16
|
||
8002d1a: f7ff fd45 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0011,0x0227);
|
||
8002d1e: f240 2127 movw r1, #551 ; 0x227
|
||
8002d22: 2011 movs r0, #17
|
||
8002d24: f7ff fd40 bl 80027a8 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vregiout
|
||
LCD_WriteReg(0x0012,0x009D); //0x001b
|
||
8002d28: 219d movs r1, #157 ; 0x9d
|
||
8002d2a: 2012 movs r0, #18
|
||
8002d2c: f7ff fd3c bl 80027a8 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vom amplitude
|
||
LCD_WriteReg(0x0013,0x1900);
|
||
8002d30: f44f 51c8 mov.w r1, #6400 ; 0x1900
|
||
8002d34: 2013 movs r0, #19
|
||
8002d36: f7ff fd37 bl 80027a8 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vom H
|
||
LCD_WriteReg(0x0029,0x0025);
|
||
8002d3a: 2125 movs r1, #37 ; 0x25
|
||
8002d3c: 2029 movs r0, #41 ; 0x29
|
||
8002d3e: f7ff fd33 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x002B,0x000D);
|
||
8002d42: 210d movs r1, #13
|
||
8002d44: 202b movs r0, #43 ; 0x2b
|
||
8002d46: f7ff fd2f bl 80027a8 <LCD_WriteReg>
|
||
//gamma
|
||
LCD_WriteReg(0x0030,0x0007);
|
||
8002d4a: 2107 movs r1, #7
|
||
8002d4c: 2030 movs r0, #48 ; 0x30
|
||
8002d4e: f7ff fd2b bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0031,0x0303);
|
||
8002d52: f240 3103 movw r1, #771 ; 0x303
|
||
8002d56: 2031 movs r0, #49 ; 0x31
|
||
8002d58: f7ff fd26 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0032,0x0003);// 0006
|
||
8002d5c: 2103 movs r1, #3
|
||
8002d5e: 2032 movs r0, #50 ; 0x32
|
||
8002d60: f7ff fd22 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0035,0x0206);
|
||
8002d64: f240 2106 movw r1, #518 ; 0x206
|
||
8002d68: 2035 movs r0, #53 ; 0x35
|
||
8002d6a: f7ff fd1d bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0036,0x0008);
|
||
8002d6e: 2108 movs r1, #8
|
||
8002d70: 2036 movs r0, #54 ; 0x36
|
||
8002d72: f7ff fd19 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0037,0x0406);
|
||
8002d76: f240 4106 movw r1, #1030 ; 0x406
|
||
8002d7a: 2037 movs r0, #55 ; 0x37
|
||
8002d7c: f7ff fd14 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0038,0x0304);//0200
|
||
8002d80: f44f 7141 mov.w r1, #772 ; 0x304
|
||
8002d84: 2038 movs r0, #56 ; 0x38
|
||
8002d86: f7ff fd0f bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0039,0x0007);
|
||
8002d8a: 2107 movs r1, #7
|
||
8002d8c: 2039 movs r0, #57 ; 0x39
|
||
8002d8e: f7ff fd0b bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x003C,0x0602);// 0504
|
||
8002d92: f240 6102 movw r1, #1538 ; 0x602
|
||
8002d96: 203c movs r0, #60 ; 0x3c
|
||
8002d98: f7ff fd06 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x003D,0x0008);
|
||
8002d9c: 2108 movs r1, #8
|
||
8002d9e: 203d movs r0, #61 ; 0x3d
|
||
8002da0: f7ff fd02 bl 80027a8 <LCD_WriteReg>
|
||
//ram
|
||
LCD_WriteReg(0x0050,0x0000);
|
||
8002da4: 2100 movs r1, #0
|
||
8002da6: 2050 movs r0, #80 ; 0x50
|
||
8002da8: f7ff fcfe bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0051,0x00EF);
|
||
8002dac: 21ef movs r1, #239 ; 0xef
|
||
8002dae: 2051 movs r0, #81 ; 0x51
|
||
8002db0: f7ff fcfa bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0052,0x0000);
|
||
8002db4: 2100 movs r1, #0
|
||
8002db6: 2052 movs r0, #82 ; 0x52
|
||
8002db8: f7ff fcf6 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0053,0x013F);
|
||
8002dbc: f240 113f movw r1, #319 ; 0x13f
|
||
8002dc0: 2053 movs r0, #83 ; 0x53
|
||
8002dc2: f7ff fcf1 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0060,0xA700);
|
||
8002dc6: f44f 4127 mov.w r1, #42752 ; 0xa700
|
||
8002dca: 2060 movs r0, #96 ; 0x60
|
||
8002dcc: f7ff fcec bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0061,0x0001);
|
||
8002dd0: 2101 movs r1, #1
|
||
8002dd2: 2061 movs r0, #97 ; 0x61
|
||
8002dd4: f7ff fce8 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x006A,0x0000);
|
||
8002dd8: 2100 movs r1, #0
|
||
8002dda: 206a movs r0, #106 ; 0x6a
|
||
8002ddc: f7ff fce4 bl 80027a8 <LCD_WriteReg>
|
||
//
|
||
LCD_WriteReg(0x0080,0x0000);
|
||
8002de0: 2100 movs r1, #0
|
||
8002de2: 2080 movs r0, #128 ; 0x80
|
||
8002de4: f7ff fce0 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0081,0x0000);
|
||
8002de8: 2100 movs r1, #0
|
||
8002dea: 2081 movs r0, #129 ; 0x81
|
||
8002dec: f7ff fcdc bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0082,0x0000);
|
||
8002df0: 2100 movs r1, #0
|
||
8002df2: 2082 movs r0, #130 ; 0x82
|
||
8002df4: f7ff fcd8 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0083,0x0000);
|
||
8002df8: 2100 movs r1, #0
|
||
8002dfa: 2083 movs r0, #131 ; 0x83
|
||
8002dfc: f7ff fcd4 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0084,0x0000);
|
||
8002e00: 2100 movs r1, #0
|
||
8002e02: 2084 movs r0, #132 ; 0x84
|
||
8002e04: f7ff fcd0 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0085,0x0000);
|
||
8002e08: 2100 movs r1, #0
|
||
8002e0a: 2085 movs r0, #133 ; 0x85
|
||
8002e0c: f7ff fccc bl 80027a8 <LCD_WriteReg>
|
||
//
|
||
LCD_WriteReg(0x0090,0x0010);
|
||
8002e10: 2110 movs r1, #16
|
||
8002e12: 2090 movs r0, #144 ; 0x90
|
||
8002e14: f7ff fcc8 bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0092,0x0600);
|
||
8002e18: f44f 61c0 mov.w r1, #1536 ; 0x600
|
||
8002e1c: 2092 movs r0, #146 ; 0x92
|
||
8002e1e: f7ff fcc3 bl 80027a8 <LCD_WriteReg>
|
||
|
||
LCD_WriteReg(0x0007,0x0133);
|
||
8002e22: f240 1133 movw r1, #307 ; 0x133
|
||
8002e26: 2007 movs r0, #7
|
||
8002e28: f7ff fcbe bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(0x00,0x0022);//
|
||
8002e2c: 2122 movs r1, #34 ; 0x22
|
||
8002e2e: 2000 movs r0, #0
|
||
8002e30: f7ff fcba bl 80027a8 <LCD_WriteReg>
|
||
|
||
|
||
LCD_Display_Dir(1); //Ĭ��Ϊh��
|
||
8002e34: 2001 movs r0, #1
|
||
8002e36: f7ff fe4f bl 8002ad8 <LCD_Display_Dir>
|
||
|
||
LCD_BL(0);
|
||
8002e3a: 2200 movs r2, #0
|
||
8002e3c: 2101 movs r1, #1
|
||
8002e3e: 4803 ldr r0, [pc, #12] ; (8002e4c <LCDx_Init+0x1e8>)
|
||
8002e40: f7fe ff6f bl 8001d22 <HAL_GPIO_WritePin>
|
||
|
||
}
|
||
8002e44: bf00 nop
|
||
8002e46: bd80 pop {r7, pc}
|
||
8002e48: 20000254 .word 0x20000254
|
||
8002e4c: 40010c00 .word 0x40010c00
|
||
|
||
08002e50 <LCD_SetCursor>:
|
||
//***********************************************************���� ���� ʲô��
|
||
//���ù���λ��
|
||
//Xpos:������
|
||
//Ypos:������
|
||
void LCD_SetCursor(uint16_t Xpos, uint16_t Ypos)
|
||
{
|
||
8002e50: b580 push {r7, lr}
|
||
8002e52: b082 sub sp, #8
|
||
8002e54: af00 add r7, sp, #0
|
||
8002e56: 4603 mov r3, r0
|
||
8002e58: 460a mov r2, r1
|
||
8002e5a: 80fb strh r3, [r7, #6]
|
||
8002e5c: 4613 mov r3, r2
|
||
8002e5e: 80bb strh r3, [r7, #4]
|
||
if(lcddev.id==0X9341||lcddev.id==0X5310)
|
||
8002e60: 4b42 ldr r3, [pc, #264] ; (8002f6c <LCD_SetCursor+0x11c>)
|
||
8002e62: 889b ldrh r3, [r3, #4]
|
||
8002e64: f249 3241 movw r2, #37697 ; 0x9341
|
||
8002e68: 4293 cmp r3, r2
|
||
8002e6a: d005 beq.n 8002e78 <LCD_SetCursor+0x28>
|
||
8002e6c: 4b3f ldr r3, [pc, #252] ; (8002f6c <LCD_SetCursor+0x11c>)
|
||
8002e6e: 889b ldrh r3, [r3, #4]
|
||
8002e70: f245 3210 movw r2, #21264 ; 0x5310
|
||
8002e74: 4293 cmp r3, r2
|
||
8002e76: d124 bne.n 8002ec2 <LCD_SetCursor+0x72>
|
||
{
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
8002e78: 4b3c ldr r3, [pc, #240] ; (8002f6c <LCD_SetCursor+0x11c>)
|
||
8002e7a: 7a1b ldrb r3, [r3, #8]
|
||
8002e7c: b29b uxth r3, r3
|
||
8002e7e: 4618 mov r0, r3
|
||
8002e80: f7ff fc74 bl 800276c <LCD_WR_REG>
|
||
LCD_WR_DATA(Xpos>>8);
|
||
8002e84: 88fb ldrh r3, [r7, #6]
|
||
8002e86: 0a1b lsrs r3, r3, #8
|
||
8002e88: b29b uxth r3, r3
|
||
8002e8a: 4618 mov r0, r3
|
||
8002e8c: f7ff fc7c bl 8002788 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Xpos&0XFF);
|
||
8002e90: 88fb ldrh r3, [r7, #6]
|
||
8002e92: b2db uxtb r3, r3
|
||
8002e94: b29b uxth r3, r3
|
||
8002e96: 4618 mov r0, r3
|
||
8002e98: f7ff fc76 bl 8002788 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8002e9c: 4b33 ldr r3, [pc, #204] ; (8002f6c <LCD_SetCursor+0x11c>)
|
||
8002e9e: 7a5b ldrb r3, [r3, #9]
|
||
8002ea0: b29b uxth r3, r3
|
||
8002ea2: 4618 mov r0, r3
|
||
8002ea4: f7ff fc62 bl 800276c <LCD_WR_REG>
|
||
LCD_WR_DATA(Ypos>>8);
|
||
8002ea8: 88bb ldrh r3, [r7, #4]
|
||
8002eaa: 0a1b lsrs r3, r3, #8
|
||
8002eac: b29b uxth r3, r3
|
||
8002eae: 4618 mov r0, r3
|
||
8002eb0: f7ff fc6a bl 8002788 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Ypos&0XFF);
|
||
8002eb4: 88bb ldrh r3, [r7, #4]
|
||
8002eb6: b2db uxtb r3, r3
|
||
8002eb8: b29b uxth r3, r3
|
||
8002eba: 4618 mov r0, r3
|
||
8002ebc: f7ff fc64 bl 8002788 <LCD_WR_DATA>
|
||
{
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//������ʵ���ǵ�תx,y����
|
||
LCD_WriteReg(lcddev.setxcmd, Xpos);
|
||
LCD_WriteReg(lcddev.setycmd, Ypos);
|
||
}
|
||
}
|
||
8002ec0: e050 b.n 8002f64 <LCD_SetCursor+0x114>
|
||
}else if(lcddev.id==0X6804)
|
||
8002ec2: 4b2a ldr r3, [pc, #168] ; (8002f6c <LCD_SetCursor+0x11c>)
|
||
8002ec4: 889b ldrh r3, [r3, #4]
|
||
8002ec6: f646 0204 movw r2, #26628 ; 0x6804
|
||
8002eca: 4293 cmp r3, r2
|
||
8002ecc: d12f bne.n 8002f2e <LCD_SetCursor+0xde>
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//����ʱ����
|
||
8002ece: 4b27 ldr r3, [pc, #156] ; (8002f6c <LCD_SetCursor+0x11c>)
|
||
8002ed0: 799b ldrb r3, [r3, #6]
|
||
8002ed2: 2b01 cmp r3, #1
|
||
8002ed4: d106 bne.n 8002ee4 <LCD_SetCursor+0x94>
|
||
8002ed6: 4b25 ldr r3, [pc, #148] ; (8002f6c <LCD_SetCursor+0x11c>)
|
||
8002ed8: 881a ldrh r2, [r3, #0]
|
||
8002eda: 88fb ldrh r3, [r7, #6]
|
||
8002edc: 1ad3 subs r3, r2, r3
|
||
8002ede: b29b uxth r3, r3
|
||
8002ee0: 3b01 subs r3, #1
|
||
8002ee2: 80fb strh r3, [r7, #6]
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
8002ee4: 4b21 ldr r3, [pc, #132] ; (8002f6c <LCD_SetCursor+0x11c>)
|
||
8002ee6: 7a1b ldrb r3, [r3, #8]
|
||
8002ee8: b29b uxth r3, r3
|
||
8002eea: 4618 mov r0, r3
|
||
8002eec: f7ff fc3e bl 800276c <LCD_WR_REG>
|
||
LCD_WR_DATA(Xpos>>8);
|
||
8002ef0: 88fb ldrh r3, [r7, #6]
|
||
8002ef2: 0a1b lsrs r3, r3, #8
|
||
8002ef4: b29b uxth r3, r3
|
||
8002ef6: 4618 mov r0, r3
|
||
8002ef8: f7ff fc46 bl 8002788 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Xpos&0XFF);
|
||
8002efc: 88fb ldrh r3, [r7, #6]
|
||
8002efe: b2db uxtb r3, r3
|
||
8002f00: b29b uxth r3, r3
|
||
8002f02: 4618 mov r0, r3
|
||
8002f04: f7ff fc40 bl 8002788 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8002f08: 4b18 ldr r3, [pc, #96] ; (8002f6c <LCD_SetCursor+0x11c>)
|
||
8002f0a: 7a5b ldrb r3, [r3, #9]
|
||
8002f0c: b29b uxth r3, r3
|
||
8002f0e: 4618 mov r0, r3
|
||
8002f10: f7ff fc2c bl 800276c <LCD_WR_REG>
|
||
LCD_WR_DATA(Ypos>>8);
|
||
8002f14: 88bb ldrh r3, [r7, #4]
|
||
8002f16: 0a1b lsrs r3, r3, #8
|
||
8002f18: b29b uxth r3, r3
|
||
8002f1a: 4618 mov r0, r3
|
||
8002f1c: f7ff fc34 bl 8002788 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Ypos&0XFF);
|
||
8002f20: 88bb ldrh r3, [r7, #4]
|
||
8002f22: b2db uxtb r3, r3
|
||
8002f24: b29b uxth r3, r3
|
||
8002f26: 4618 mov r0, r3
|
||
8002f28: f7ff fc2e bl 8002788 <LCD_WR_DATA>
|
||
}
|
||
8002f2c: e01a b.n 8002f64 <LCD_SetCursor+0x114>
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//������ʵ���ǵ�תx,y����
|
||
8002f2e: 4b0f ldr r3, [pc, #60] ; (8002f6c <LCD_SetCursor+0x11c>)
|
||
8002f30: 799b ldrb r3, [r3, #6]
|
||
8002f32: 2b01 cmp r3, #1
|
||
8002f34: d106 bne.n 8002f44 <LCD_SetCursor+0xf4>
|
||
8002f36: 4b0d ldr r3, [pc, #52] ; (8002f6c <LCD_SetCursor+0x11c>)
|
||
8002f38: 881a ldrh r2, [r3, #0]
|
||
8002f3a: 88fb ldrh r3, [r7, #6]
|
||
8002f3c: 1ad3 subs r3, r2, r3
|
||
8002f3e: b29b uxth r3, r3
|
||
8002f40: 3b01 subs r3, #1
|
||
8002f42: 80fb strh r3, [r7, #6]
|
||
LCD_WriteReg(lcddev.setxcmd, Xpos);
|
||
8002f44: 4b09 ldr r3, [pc, #36] ; (8002f6c <LCD_SetCursor+0x11c>)
|
||
8002f46: 7a1b ldrb r3, [r3, #8]
|
||
8002f48: b29b uxth r3, r3
|
||
8002f4a: 88fa ldrh r2, [r7, #6]
|
||
8002f4c: 4611 mov r1, r2
|
||
8002f4e: 4618 mov r0, r3
|
||
8002f50: f7ff fc2a bl 80027a8 <LCD_WriteReg>
|
||
LCD_WriteReg(lcddev.setycmd, Ypos);
|
||
8002f54: 4b05 ldr r3, [pc, #20] ; (8002f6c <LCD_SetCursor+0x11c>)
|
||
8002f56: 7a5b ldrb r3, [r3, #9]
|
||
8002f58: b29b uxth r3, r3
|
||
8002f5a: 88ba ldrh r2, [r7, #4]
|
||
8002f5c: 4611 mov r1, r2
|
||
8002f5e: 4618 mov r0, r3
|
||
8002f60: f7ff fc22 bl 80027a8 <LCD_WriteReg>
|
||
}
|
||
8002f64: bf00 nop
|
||
8002f66: 3708 adds r7, #8
|
||
8002f68: 46bd mov sp, r7
|
||
8002f6a: bd80 pop {r7, pc}
|
||
8002f6c: 20000254 .word 0x20000254
|
||
|
||
08002f70 <LCD_set_dot>:
|
||
}
|
||
//����
|
||
//x,y:����
|
||
//POINT_COLOR:�˵�����ɫ
|
||
void LCD_set_dot(uint16_t x,uint16_t y,uint16_t color)
|
||
{
|
||
8002f70: b580 push {r7, lr}
|
||
8002f72: b082 sub sp, #8
|
||
8002f74: af00 add r7, sp, #0
|
||
8002f76: 4603 mov r3, r0
|
||
8002f78: 80fb strh r3, [r7, #6]
|
||
8002f7a: 460b mov r3, r1
|
||
8002f7c: 80bb strh r3, [r7, #4]
|
||
8002f7e: 4613 mov r3, r2
|
||
8002f80: 807b strh r3, [r7, #2]
|
||
LCD_SetCursor(x,y); //���ù���λ��
|
||
8002f82: 88ba ldrh r2, [r7, #4]
|
||
8002f84: 88fb ldrh r3, [r7, #6]
|
||
8002f86: 4611 mov r1, r2
|
||
8002f88: 4618 mov r0, r3
|
||
8002f8a: f7ff ff61 bl 8002e50 <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
8002f8e: 4b06 ldr r3, [pc, #24] ; (8002fa8 <LCD_set_dot+0x38>)
|
||
8002f90: 79da ldrb r2, [r3, #7]
|
||
8002f92: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
8002f96: b292 uxth r2, r2
|
||
8002f98: 801a strh r2, [r3, #0]
|
||
LCD_DATA_ADDRESS=color;
|
||
8002f9a: 4a04 ldr r2, [pc, #16] ; (8002fac <LCD_set_dot+0x3c>)
|
||
8002f9c: 887b ldrh r3, [r7, #2]
|
||
8002f9e: 8013 strh r3, [r2, #0]
|
||
}
|
||
8002fa0: bf00 nop
|
||
8002fa2: 3708 adds r7, #8
|
||
8002fa4: 46bd mov sp, r7
|
||
8002fa6: bd80 pop {r7, pc}
|
||
8002fa8: 20000254 .word 0x20000254
|
||
8002fac: 6c000800 .word 0x6c000800
|
||
|
||
08002fb0 <LCD_Clear>:
|
||
|
||
//��������
|
||
//color:Ҫ����������ɫ
|
||
void LCD_Clear(uint16_t color)
|
||
{
|
||
8002fb0: b580 push {r7, lr}
|
||
8002fb2: b084 sub sp, #16
|
||
8002fb4: af00 add r7, sp, #0
|
||
8002fb6: 4603 mov r3, r0
|
||
8002fb8: 80fb strh r3, [r7, #6]
|
||
uint32_t index=0;
|
||
8002fba: 2300 movs r3, #0
|
||
8002fbc: 60fb str r3, [r7, #12]
|
||
uint32_t totalpoint=lcddev.width;
|
||
8002fbe: 4b23 ldr r3, [pc, #140] ; (800304c <LCD_Clear+0x9c>)
|
||
8002fc0: 881b ldrh r3, [r3, #0]
|
||
8002fc2: 60bb str r3, [r7, #8]
|
||
totalpoint*=lcddev.height; //�õ��ܵ���
|
||
8002fc4: 4b21 ldr r3, [pc, #132] ; (800304c <LCD_Clear+0x9c>)
|
||
8002fc6: 885b ldrh r3, [r3, #2]
|
||
8002fc8: 461a mov r2, r3
|
||
8002fca: 68bb ldr r3, [r7, #8]
|
||
8002fcc: fb02 f303 mul.w r3, r2, r3
|
||
8002fd0: 60bb str r3, [r7, #8]
|
||
if((lcddev.id==0X6804)&&(lcddev.dir==1))//6804������ʱ�������
|
||
8002fd2: 4b1e ldr r3, [pc, #120] ; (800304c <LCD_Clear+0x9c>)
|
||
8002fd4: 889b ldrh r3, [r3, #4]
|
||
8002fd6: f646 0204 movw r2, #26628 ; 0x6804
|
||
8002fda: 4293 cmp r3, r2
|
||
8002fdc: d11a bne.n 8003014 <LCD_Clear+0x64>
|
||
8002fde: 4b1b ldr r3, [pc, #108] ; (800304c <LCD_Clear+0x9c>)
|
||
8002fe0: 799b ldrb r3, [r3, #6]
|
||
8002fe2: 2b01 cmp r3, #1
|
||
8002fe4: d116 bne.n 8003014 <LCD_Clear+0x64>
|
||
{
|
||
lcddev.dir=0;
|
||
8002fe6: 4b19 ldr r3, [pc, #100] ; (800304c <LCD_Clear+0x9c>)
|
||
8002fe8: 2200 movs r2, #0
|
||
8002fea: 719a strb r2, [r3, #6]
|
||
lcddev.setxcmd=0X2A;
|
||
8002fec: 4b17 ldr r3, [pc, #92] ; (800304c <LCD_Clear+0x9c>)
|
||
8002fee: 222a movs r2, #42 ; 0x2a
|
||
8002ff0: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
8002ff2: 4b16 ldr r3, [pc, #88] ; (800304c <LCD_Clear+0x9c>)
|
||
8002ff4: 222b movs r2, #43 ; 0x2b
|
||
8002ff6: 725a strb r2, [r3, #9]
|
||
LCD_SetCursor(0x00,0x0000); //���ù���λ��
|
||
8002ff8: 2100 movs r1, #0
|
||
8002ffa: 2000 movs r0, #0
|
||
8002ffc: f7ff ff28 bl 8002e50 <LCD_SetCursor>
|
||
lcddev.dir=1;
|
||
8003000: 4b12 ldr r3, [pc, #72] ; (800304c <LCD_Clear+0x9c>)
|
||
8003002: 2201 movs r2, #1
|
||
8003004: 719a strb r2, [r3, #6]
|
||
lcddev.setxcmd=0X2B;
|
||
8003006: 4b11 ldr r3, [pc, #68] ; (800304c <LCD_Clear+0x9c>)
|
||
8003008: 222b movs r2, #43 ; 0x2b
|
||
800300a: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2A;
|
||
800300c: 4b0f ldr r3, [pc, #60] ; (800304c <LCD_Clear+0x9c>)
|
||
800300e: 222a movs r2, #42 ; 0x2a
|
||
8003010: 725a strb r2, [r3, #9]
|
||
8003012: e003 b.n 800301c <LCD_Clear+0x6c>
|
||
}else LCD_SetCursor(0x00,0x0000); //���ù���λ��
|
||
8003014: 2100 movs r1, #0
|
||
8003016: 2000 movs r0, #0
|
||
8003018: f7ff ff1a bl 8002e50 <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
800301c: 4b0b ldr r3, [pc, #44] ; (800304c <LCD_Clear+0x9c>)
|
||
800301e: 79da ldrb r2, [r3, #7]
|
||
8003020: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
8003024: b292 uxth r2, r2
|
||
8003026: 801a strh r2, [r3, #0]
|
||
for(index=0;index<totalpoint;index++)
|
||
8003028: 2300 movs r3, #0
|
||
800302a: 60fb str r3, [r7, #12]
|
||
800302c: e005 b.n 800303a <LCD_Clear+0x8a>
|
||
{
|
||
LCD_DATA_ADDRESS=color;
|
||
800302e: 4a08 ldr r2, [pc, #32] ; (8003050 <LCD_Clear+0xa0>)
|
||
8003030: 88fb ldrh r3, [r7, #6]
|
||
8003032: 8013 strh r3, [r2, #0]
|
||
for(index=0;index<totalpoint;index++)
|
||
8003034: 68fb ldr r3, [r7, #12]
|
||
8003036: 3301 adds r3, #1
|
||
8003038: 60fb str r3, [r7, #12]
|
||
800303a: 68fa ldr r2, [r7, #12]
|
||
800303c: 68bb ldr r3, [r7, #8]
|
||
800303e: 429a cmp r2, r3
|
||
8003040: d3f5 bcc.n 800302e <LCD_Clear+0x7e>
|
||
}
|
||
}
|
||
8003042: bf00 nop
|
||
8003044: bf00 nop
|
||
8003046: 3710 adds r7, #16
|
||
8003048: 46bd mov sp, r7
|
||
800304a: bd80 pop {r7, pc}
|
||
800304c: 20000254 .word 0x20000254
|
||
8003050: 6c000800 .word 0x6c000800
|
||
|
||
08003054 <LCD_DrawLine>:
|
||
//***********************************2D
|
||
//����
|
||
//x1,y1:��������
|
||
//x2,y2:�յ�����
|
||
void LCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2,uint16_t color)
|
||
{
|
||
8003054: b590 push {r4, r7, lr}
|
||
8003056: b08d sub sp, #52 ; 0x34
|
||
8003058: af00 add r7, sp, #0
|
||
800305a: 4604 mov r4, r0
|
||
800305c: 4608 mov r0, r1
|
||
800305e: 4611 mov r1, r2
|
||
8003060: 461a mov r2, r3
|
||
8003062: 4623 mov r3, r4
|
||
8003064: 80fb strh r3, [r7, #6]
|
||
8003066: 4603 mov r3, r0
|
||
8003068: 80bb strh r3, [r7, #4]
|
||
800306a: 460b mov r3, r1
|
||
800306c: 807b strh r3, [r7, #2]
|
||
800306e: 4613 mov r3, r2
|
||
8003070: 803b strh r3, [r7, #0]
|
||
uint16_t t;
|
||
int xerr=0,yerr=0,delta_x,delta_y,distance;
|
||
8003072: 2300 movs r3, #0
|
||
8003074: 62bb str r3, [r7, #40] ; 0x28
|
||
8003076: 2300 movs r3, #0
|
||
8003078: 627b str r3, [r7, #36] ; 0x24
|
||
int incx,incy,uRow,uCol;
|
||
delta_x=x2-x1; //������������
|
||
800307a: 887a ldrh r2, [r7, #2]
|
||
800307c: 88fb ldrh r3, [r7, #6]
|
||
800307e: 1ad3 subs r3, r2, r3
|
||
8003080: 623b str r3, [r7, #32]
|
||
delta_y=y2-y1;
|
||
8003082: 883a ldrh r2, [r7, #0]
|
||
8003084: 88bb ldrh r3, [r7, #4]
|
||
8003086: 1ad3 subs r3, r2, r3
|
||
8003088: 61fb str r3, [r7, #28]
|
||
uRow=x1;
|
||
800308a: 88fb ldrh r3, [r7, #6]
|
||
800308c: 60fb str r3, [r7, #12]
|
||
uCol=y1;
|
||
800308e: 88bb ldrh r3, [r7, #4]
|
||
8003090: 60bb str r3, [r7, #8]
|
||
if(delta_x>0)incx=1; //���õ�������
|
||
8003092: 6a3b ldr r3, [r7, #32]
|
||
8003094: 2b00 cmp r3, #0
|
||
8003096: dd02 ble.n 800309e <LCD_DrawLine+0x4a>
|
||
8003098: 2301 movs r3, #1
|
||
800309a: 617b str r3, [r7, #20]
|
||
800309c: e00b b.n 80030b6 <LCD_DrawLine+0x62>
|
||
else if(delta_x==0)incx=0;//��ֱ��
|
||
800309e: 6a3b ldr r3, [r7, #32]
|
||
80030a0: 2b00 cmp r3, #0
|
||
80030a2: d102 bne.n 80030aa <LCD_DrawLine+0x56>
|
||
80030a4: 2300 movs r3, #0
|
||
80030a6: 617b str r3, [r7, #20]
|
||
80030a8: e005 b.n 80030b6 <LCD_DrawLine+0x62>
|
||
else {incx=-1;delta_x=-delta_x;}
|
||
80030aa: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
80030ae: 617b str r3, [r7, #20]
|
||
80030b0: 6a3b ldr r3, [r7, #32]
|
||
80030b2: 425b negs r3, r3
|
||
80030b4: 623b str r3, [r7, #32]
|
||
if(delta_y>0)incy=1;
|
||
80030b6: 69fb ldr r3, [r7, #28]
|
||
80030b8: 2b00 cmp r3, #0
|
||
80030ba: dd02 ble.n 80030c2 <LCD_DrawLine+0x6e>
|
||
80030bc: 2301 movs r3, #1
|
||
80030be: 613b str r3, [r7, #16]
|
||
80030c0: e00b b.n 80030da <LCD_DrawLine+0x86>
|
||
else if(delta_y==0)incy=0;//ˮƽ��
|
||
80030c2: 69fb ldr r3, [r7, #28]
|
||
80030c4: 2b00 cmp r3, #0
|
||
80030c6: d102 bne.n 80030ce <LCD_DrawLine+0x7a>
|
||
80030c8: 2300 movs r3, #0
|
||
80030ca: 613b str r3, [r7, #16]
|
||
80030cc: e005 b.n 80030da <LCD_DrawLine+0x86>
|
||
else{incy=-1;delta_y=-delta_y;}
|
||
80030ce: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
80030d2: 613b str r3, [r7, #16]
|
||
80030d4: 69fb ldr r3, [r7, #28]
|
||
80030d6: 425b negs r3, r3
|
||
80030d8: 61fb str r3, [r7, #28]
|
||
if( delta_x>delta_y)distance=delta_x; //ѡȡ��������������
|
||
80030da: 6a3a ldr r2, [r7, #32]
|
||
80030dc: 69fb ldr r3, [r7, #28]
|
||
80030de: 429a cmp r2, r3
|
||
80030e0: dd02 ble.n 80030e8 <LCD_DrawLine+0x94>
|
||
80030e2: 6a3b ldr r3, [r7, #32]
|
||
80030e4: 61bb str r3, [r7, #24]
|
||
80030e6: e001 b.n 80030ec <LCD_DrawLine+0x98>
|
||
else distance=delta_y;
|
||
80030e8: 69fb ldr r3, [r7, #28]
|
||
80030ea: 61bb str r3, [r7, #24]
|
||
for(t=0;t<=distance+1;t++ )//��������
|
||
80030ec: 2300 movs r3, #0
|
||
80030ee: 85fb strh r3, [r7, #46] ; 0x2e
|
||
80030f0: e02b b.n 800314a <LCD_DrawLine+0xf6>
|
||
{
|
||
LCD_set_dot(uRow,uCol,color);//����
|
||
80030f2: 68fb ldr r3, [r7, #12]
|
||
80030f4: b29b uxth r3, r3
|
||
80030f6: 68ba ldr r2, [r7, #8]
|
||
80030f8: b291 uxth r1, r2
|
||
80030fa: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40
|
||
80030fe: 4618 mov r0, r3
|
||
8003100: f7ff ff36 bl 8002f70 <LCD_set_dot>
|
||
xerr+=delta_x ;
|
||
8003104: 6aba ldr r2, [r7, #40] ; 0x28
|
||
8003106: 6a3b ldr r3, [r7, #32]
|
||
8003108: 4413 add r3, r2
|
||
800310a: 62bb str r3, [r7, #40] ; 0x28
|
||
yerr+=delta_y ;
|
||
800310c: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
800310e: 69fb ldr r3, [r7, #28]
|
||
8003110: 4413 add r3, r2
|
||
8003112: 627b str r3, [r7, #36] ; 0x24
|
||
if(xerr>distance)
|
||
8003114: 6aba ldr r2, [r7, #40] ; 0x28
|
||
8003116: 69bb ldr r3, [r7, #24]
|
||
8003118: 429a cmp r2, r3
|
||
800311a: dd07 ble.n 800312c <LCD_DrawLine+0xd8>
|
||
{
|
||
xerr-=distance;
|
||
800311c: 6aba ldr r2, [r7, #40] ; 0x28
|
||
800311e: 69bb ldr r3, [r7, #24]
|
||
8003120: 1ad3 subs r3, r2, r3
|
||
8003122: 62bb str r3, [r7, #40] ; 0x28
|
||
uRow+=incx;
|
||
8003124: 68fa ldr r2, [r7, #12]
|
||
8003126: 697b ldr r3, [r7, #20]
|
||
8003128: 4413 add r3, r2
|
||
800312a: 60fb str r3, [r7, #12]
|
||
}
|
||
if(yerr>distance)
|
||
800312c: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
800312e: 69bb ldr r3, [r7, #24]
|
||
8003130: 429a cmp r2, r3
|
||
8003132: dd07 ble.n 8003144 <LCD_DrawLine+0xf0>
|
||
{
|
||
yerr-=distance;
|
||
8003134: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8003136: 69bb ldr r3, [r7, #24]
|
||
8003138: 1ad3 subs r3, r2, r3
|
||
800313a: 627b str r3, [r7, #36] ; 0x24
|
||
uCol+=incy;
|
||
800313c: 68ba ldr r2, [r7, #8]
|
||
800313e: 693b ldr r3, [r7, #16]
|
||
8003140: 4413 add r3, r2
|
||
8003142: 60bb str r3, [r7, #8]
|
||
for(t=0;t<=distance+1;t++ )//��������
|
||
8003144: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
||
8003146: 3301 adds r3, #1
|
||
8003148: 85fb strh r3, [r7, #46] ; 0x2e
|
||
800314a: 8dfa ldrh r2, [r7, #46] ; 0x2e
|
||
800314c: 69bb ldr r3, [r7, #24]
|
||
800314e: 3301 adds r3, #1
|
||
8003150: 429a cmp r2, r3
|
||
8003152: ddce ble.n 80030f2 <LCD_DrawLine+0x9e>
|
||
}
|
||
}
|
||
}
|
||
8003154: bf00 nop
|
||
8003156: bf00 nop
|
||
8003158: 3734 adds r7, #52 ; 0x34
|
||
800315a: 46bd mov sp, r7
|
||
800315c: bd90 pop {r4, r7, pc}
|
||
|
||
0800315e <Draw_Circle>:
|
||
|
||
//��ָ��λ�û�һ��ָ����С��Բ
|
||
//(x,y):���ĵ�
|
||
//r :�뾶
|
||
void Draw_Circle(uint16_t x0,uint16_t y0,uint16_t r,uint16_t color)
|
||
{
|
||
800315e: b590 push {r4, r7, lr}
|
||
8003160: b087 sub sp, #28
|
||
8003162: af00 add r7, sp, #0
|
||
8003164: 4604 mov r4, r0
|
||
8003166: 4608 mov r0, r1
|
||
8003168: 4611 mov r1, r2
|
||
800316a: 461a mov r2, r3
|
||
800316c: 4623 mov r3, r4
|
||
800316e: 80fb strh r3, [r7, #6]
|
||
8003170: 4603 mov r3, r0
|
||
8003172: 80bb strh r3, [r7, #4]
|
||
8003174: 460b mov r3, r1
|
||
8003176: 807b strh r3, [r7, #2]
|
||
8003178: 4613 mov r3, r2
|
||
800317a: 803b strh r3, [r7, #0]
|
||
int a,b;
|
||
int di;
|
||
a=0;b=r;
|
||
800317c: 2300 movs r3, #0
|
||
800317e: 617b str r3, [r7, #20]
|
||
8003180: 887b ldrh r3, [r7, #2]
|
||
8003182: 613b str r3, [r7, #16]
|
||
di=3-(r<<1); //�ж��¸���λ�õı�־
|
||
8003184: 887b ldrh r3, [r7, #2]
|
||
8003186: 005b lsls r3, r3, #1
|
||
8003188: f1c3 0303 rsb r3, r3, #3
|
||
800318c: 60fb str r3, [r7, #12]
|
||
while(a<=b)
|
||
800318e: e087 b.n 80032a0 <Draw_Circle+0x142>
|
||
{
|
||
LCD_set_dot(x0+a,y0-b,color); //5
|
||
8003190: 697b ldr r3, [r7, #20]
|
||
8003192: b29a uxth r2, r3
|
||
8003194: 88fb ldrh r3, [r7, #6]
|
||
8003196: 4413 add r3, r2
|
||
8003198: b298 uxth r0, r3
|
||
800319a: 693b ldr r3, [r7, #16]
|
||
800319c: b29b uxth r3, r3
|
||
800319e: 88ba ldrh r2, [r7, #4]
|
||
80031a0: 1ad3 subs r3, r2, r3
|
||
80031a2: b29b uxth r3, r3
|
||
80031a4: 883a ldrh r2, [r7, #0]
|
||
80031a6: 4619 mov r1, r3
|
||
80031a8: f7ff fee2 bl 8002f70 <LCD_set_dot>
|
||
LCD_set_dot(x0+b,y0-a,color); //0
|
||
80031ac: 693b ldr r3, [r7, #16]
|
||
80031ae: b29a uxth r2, r3
|
||
80031b0: 88fb ldrh r3, [r7, #6]
|
||
80031b2: 4413 add r3, r2
|
||
80031b4: b298 uxth r0, r3
|
||
80031b6: 697b ldr r3, [r7, #20]
|
||
80031b8: b29b uxth r3, r3
|
||
80031ba: 88ba ldrh r2, [r7, #4]
|
||
80031bc: 1ad3 subs r3, r2, r3
|
||
80031be: b29b uxth r3, r3
|
||
80031c0: 883a ldrh r2, [r7, #0]
|
||
80031c2: 4619 mov r1, r3
|
||
80031c4: f7ff fed4 bl 8002f70 <LCD_set_dot>
|
||
LCD_set_dot(x0+b,y0+a,color); //4
|
||
80031c8: 693b ldr r3, [r7, #16]
|
||
80031ca: b29a uxth r2, r3
|
||
80031cc: 88fb ldrh r3, [r7, #6]
|
||
80031ce: 4413 add r3, r2
|
||
80031d0: b298 uxth r0, r3
|
||
80031d2: 697b ldr r3, [r7, #20]
|
||
80031d4: b29a uxth r2, r3
|
||
80031d6: 88bb ldrh r3, [r7, #4]
|
||
80031d8: 4413 add r3, r2
|
||
80031da: b29b uxth r3, r3
|
||
80031dc: 883a ldrh r2, [r7, #0]
|
||
80031de: 4619 mov r1, r3
|
||
80031e0: f7ff fec6 bl 8002f70 <LCD_set_dot>
|
||
LCD_set_dot(x0+a,y0+b,color); //6
|
||
80031e4: 697b ldr r3, [r7, #20]
|
||
80031e6: b29a uxth r2, r3
|
||
80031e8: 88fb ldrh r3, [r7, #6]
|
||
80031ea: 4413 add r3, r2
|
||
80031ec: b298 uxth r0, r3
|
||
80031ee: 693b ldr r3, [r7, #16]
|
||
80031f0: b29a uxth r2, r3
|
||
80031f2: 88bb ldrh r3, [r7, #4]
|
||
80031f4: 4413 add r3, r2
|
||
80031f6: b29b uxth r3, r3
|
||
80031f8: 883a ldrh r2, [r7, #0]
|
||
80031fa: 4619 mov r1, r3
|
||
80031fc: f7ff feb8 bl 8002f70 <LCD_set_dot>
|
||
LCD_set_dot(x0-a,y0+b,color); //1
|
||
8003200: 697b ldr r3, [r7, #20]
|
||
8003202: b29b uxth r3, r3
|
||
8003204: 88fa ldrh r2, [r7, #6]
|
||
8003206: 1ad3 subs r3, r2, r3
|
||
8003208: b298 uxth r0, r3
|
||
800320a: 693b ldr r3, [r7, #16]
|
||
800320c: b29a uxth r2, r3
|
||
800320e: 88bb ldrh r3, [r7, #4]
|
||
8003210: 4413 add r3, r2
|
||
8003212: b29b uxth r3, r3
|
||
8003214: 883a ldrh r2, [r7, #0]
|
||
8003216: 4619 mov r1, r3
|
||
8003218: f7ff feaa bl 8002f70 <LCD_set_dot>
|
||
LCD_set_dot(x0-b,y0+a,color);
|
||
800321c: 693b ldr r3, [r7, #16]
|
||
800321e: b29b uxth r3, r3
|
||
8003220: 88fa ldrh r2, [r7, #6]
|
||
8003222: 1ad3 subs r3, r2, r3
|
||
8003224: b298 uxth r0, r3
|
||
8003226: 697b ldr r3, [r7, #20]
|
||
8003228: b29a uxth r2, r3
|
||
800322a: 88bb ldrh r3, [r7, #4]
|
||
800322c: 4413 add r3, r2
|
||
800322e: b29b uxth r3, r3
|
||
8003230: 883a ldrh r2, [r7, #0]
|
||
8003232: 4619 mov r1, r3
|
||
8003234: f7ff fe9c bl 8002f70 <LCD_set_dot>
|
||
LCD_set_dot(x0-a,y0-b,color); //2
|
||
8003238: 697b ldr r3, [r7, #20]
|
||
800323a: b29b uxth r3, r3
|
||
800323c: 88fa ldrh r2, [r7, #6]
|
||
800323e: 1ad3 subs r3, r2, r3
|
||
8003240: b298 uxth r0, r3
|
||
8003242: 693b ldr r3, [r7, #16]
|
||
8003244: b29b uxth r3, r3
|
||
8003246: 88ba ldrh r2, [r7, #4]
|
||
8003248: 1ad3 subs r3, r2, r3
|
||
800324a: b29b uxth r3, r3
|
||
800324c: 883a ldrh r2, [r7, #0]
|
||
800324e: 4619 mov r1, r3
|
||
8003250: f7ff fe8e bl 8002f70 <LCD_set_dot>
|
||
LCD_set_dot(x0-b,y0-a,color); //7
|
||
8003254: 693b ldr r3, [r7, #16]
|
||
8003256: b29b uxth r3, r3
|
||
8003258: 88fa ldrh r2, [r7, #6]
|
||
800325a: 1ad3 subs r3, r2, r3
|
||
800325c: b298 uxth r0, r3
|
||
800325e: 697b ldr r3, [r7, #20]
|
||
8003260: b29b uxth r3, r3
|
||
8003262: 88ba ldrh r2, [r7, #4]
|
||
8003264: 1ad3 subs r3, r2, r3
|
||
8003266: b29b uxth r3, r3
|
||
8003268: 883a ldrh r2, [r7, #0]
|
||
800326a: 4619 mov r1, r3
|
||
800326c: f7ff fe80 bl 8002f70 <LCD_set_dot>
|
||
a++;
|
||
8003270: 697b ldr r3, [r7, #20]
|
||
8003272: 3301 adds r3, #1
|
||
8003274: 617b str r3, [r7, #20]
|
||
//ʹ��Bresenham�㷨��Բ
|
||
if(di<0)di +=4*a+6;
|
||
8003276: 68fb ldr r3, [r7, #12]
|
||
8003278: 2b00 cmp r3, #0
|
||
800327a: da06 bge.n 800328a <Draw_Circle+0x12c>
|
||
800327c: 697b ldr r3, [r7, #20]
|
||
800327e: 009b lsls r3, r3, #2
|
||
8003280: 3306 adds r3, #6
|
||
8003282: 68fa ldr r2, [r7, #12]
|
||
8003284: 4413 add r3, r2
|
||
8003286: 60fb str r3, [r7, #12]
|
||
8003288: e00a b.n 80032a0 <Draw_Circle+0x142>
|
||
else
|
||
{
|
||
di+=10+4*(a-b);
|
||
800328a: 697a ldr r2, [r7, #20]
|
||
800328c: 693b ldr r3, [r7, #16]
|
||
800328e: 1ad3 subs r3, r2, r3
|
||
8003290: 009b lsls r3, r3, #2
|
||
8003292: 330a adds r3, #10
|
||
8003294: 68fa ldr r2, [r7, #12]
|
||
8003296: 4413 add r3, r2
|
||
8003298: 60fb str r3, [r7, #12]
|
||
b--;
|
||
800329a: 693b ldr r3, [r7, #16]
|
||
800329c: 3b01 subs r3, #1
|
||
800329e: 613b str r3, [r7, #16]
|
||
while(a<=b)
|
||
80032a0: 697a ldr r2, [r7, #20]
|
||
80032a2: 693b ldr r3, [r7, #16]
|
||
80032a4: 429a cmp r2, r3
|
||
80032a6: f77f af73 ble.w 8003190 <Draw_Circle+0x32>
|
||
}
|
||
}
|
||
}
|
||
80032aa: bf00 nop
|
||
80032ac: bf00 nop
|
||
80032ae: 371c adds r7, #28
|
||
80032b0: 46bd mov sp, r7
|
||
80032b2: bd90 pop {r4, r7, pc}
|
||
|
||
080032b4 <LCD_ShowChar>:
|
||
//num:Ҫ��ʾ���ַ�:" "--->"~"
|
||
//size:������С 12/16
|
||
//mode:���ӷ�ʽ(1)���Ƿǵ��ӷ�ʽ(0)
|
||
|
||
void LCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint16_t bg,uint16_t color)
|
||
{
|
||
80032b4: b590 push {r4, r7, lr}
|
||
80032b6: b085 sub sp, #20
|
||
80032b8: af00 add r7, sp, #0
|
||
80032ba: 4604 mov r4, r0
|
||
80032bc: 4608 mov r0, r1
|
||
80032be: 4611 mov r1, r2
|
||
80032c0: 461a mov r2, r3
|
||
80032c2: 4623 mov r3, r4
|
||
80032c4: 80fb strh r3, [r7, #6]
|
||
80032c6: 4603 mov r3, r0
|
||
80032c8: 80bb strh r3, [r7, #4]
|
||
80032ca: 460b mov r3, r1
|
||
80032cc: 70fb strb r3, [r7, #3]
|
||
80032ce: 4613 mov r3, r2
|
||
80032d0: 70bb strb r3, [r7, #2]
|
||
uint8_t temp,t1,t;
|
||
uint16_t y0=y;
|
||
80032d2: 88bb ldrh r3, [r7, #4]
|
||
80032d4: 817b strh r3, [r7, #10]
|
||
|
||
//����
|
||
num=num-' ';//�õ�ƫ�ƺ���ֵ
|
||
80032d6: 78fb ldrb r3, [r7, #3]
|
||
80032d8: 3b20 subs r3, #32
|
||
80032da: 70fb strb r3, [r7, #3]
|
||
|
||
for(t=0;t<size;t++)
|
||
80032dc: 2300 movs r3, #0
|
||
80032de: 737b strb r3, [r7, #13]
|
||
80032e0: e055 b.n 800338e <LCD_ShowChar+0xda>
|
||
{
|
||
if(size==12){temp=asc2_1206[num][t];} //����1206����
|
||
80032e2: 78bb ldrb r3, [r7, #2]
|
||
80032e4: 2b0c cmp r3, #12
|
||
80032e6: d10b bne.n 8003300 <LCD_ShowChar+0x4c>
|
||
80032e8: 78fa ldrb r2, [r7, #3]
|
||
80032ea: 7b79 ldrb r1, [r7, #13]
|
||
80032ec: 482c ldr r0, [pc, #176] ; (80033a0 <LCD_ShowChar+0xec>)
|
||
80032ee: 4613 mov r3, r2
|
||
80032f0: 005b lsls r3, r3, #1
|
||
80032f2: 4413 add r3, r2
|
||
80032f4: 009b lsls r3, r3, #2
|
||
80032f6: 4403 add r3, r0
|
||
80032f8: 440b add r3, r1
|
||
80032fa: 781b ldrb r3, [r3, #0]
|
||
80032fc: 73fb strb r3, [r7, #15]
|
||
80032fe: e007 b.n 8003310 <LCD_ShowChar+0x5c>
|
||
else{ temp=asc2_1608[num][t]; } //����1608����
|
||
8003300: 78fa ldrb r2, [r7, #3]
|
||
8003302: 7b7b ldrb r3, [r7, #13]
|
||
8003304: 4927 ldr r1, [pc, #156] ; (80033a4 <LCD_ShowChar+0xf0>)
|
||
8003306: 0112 lsls r2, r2, #4
|
||
8003308: 440a add r2, r1
|
||
800330a: 4413 add r3, r2
|
||
800330c: 781b ldrb r3, [r3, #0]
|
||
800330e: 73fb strb r3, [r7, #15]
|
||
for(t1=0;t1<8;t1++)
|
||
8003310: 2300 movs r3, #0
|
||
8003312: 73bb strb r3, [r7, #14]
|
||
8003314: e033 b.n 800337e <LCD_ShowChar+0xca>
|
||
{
|
||
if(temp&0x80){LCD_set_dot(x,y,color);}else{if(bg!=color){LCD_set_dot(x,y,bg);}}
|
||
8003316: f997 300f ldrsb.w r3, [r7, #15]
|
||
800331a: 2b00 cmp r3, #0
|
||
800331c: da06 bge.n 800332c <LCD_ShowChar+0x78>
|
||
800331e: 8cba ldrh r2, [r7, #36] ; 0x24
|
||
8003320: 88b9 ldrh r1, [r7, #4]
|
||
8003322: 88fb ldrh r3, [r7, #6]
|
||
8003324: 4618 mov r0, r3
|
||
8003326: f7ff fe23 bl 8002f70 <LCD_set_dot>
|
||
800332a: e009 b.n 8003340 <LCD_ShowChar+0x8c>
|
||
800332c: 8c3a ldrh r2, [r7, #32]
|
||
800332e: 8cbb ldrh r3, [r7, #36] ; 0x24
|
||
8003330: 429a cmp r2, r3
|
||
8003332: d005 beq.n 8003340 <LCD_ShowChar+0x8c>
|
||
8003334: 8c3a ldrh r2, [r7, #32]
|
||
8003336: 88b9 ldrh r1, [r7, #4]
|
||
8003338: 88fb ldrh r3, [r7, #6]
|
||
800333a: 4618 mov r0, r3
|
||
800333c: f7ff fe18 bl 8002f70 <LCD_set_dot>
|
||
temp<<=1;
|
||
8003340: 7bfb ldrb r3, [r7, #15]
|
||
8003342: 005b lsls r3, r3, #1
|
||
8003344: 73fb strb r3, [r7, #15]
|
||
y++;
|
||
8003346: 88bb ldrh r3, [r7, #4]
|
||
8003348: 3301 adds r3, #1
|
||
800334a: 80bb strh r3, [r7, #4]
|
||
if(x>=lcddev.width){return;}//��������
|
||
800334c: 4b16 ldr r3, [pc, #88] ; (80033a8 <LCD_ShowChar+0xf4>)
|
||
800334e: 881b ldrh r3, [r3, #0]
|
||
8003350: 88fa ldrh r2, [r7, #6]
|
||
8003352: 429a cmp r2, r3
|
||
8003354: d220 bcs.n 8003398 <LCD_ShowChar+0xe4>
|
||
if((y-y0)==size)
|
||
8003356: 88ba ldrh r2, [r7, #4]
|
||
8003358: 897b ldrh r3, [r7, #10]
|
||
800335a: 1ad2 subs r2, r2, r3
|
||
800335c: 78bb ldrb r3, [r7, #2]
|
||
800335e: 429a cmp r2, r3
|
||
8003360: d10a bne.n 8003378 <LCD_ShowChar+0xc4>
|
||
{
|
||
y=y0;
|
||
8003362: 897b ldrh r3, [r7, #10]
|
||
8003364: 80bb strh r3, [r7, #4]
|
||
x++;
|
||
8003366: 88fb ldrh r3, [r7, #6]
|
||
8003368: 3301 adds r3, #1
|
||
800336a: 80fb strh r3, [r7, #6]
|
||
if(x>=lcddev.width){return;}//��������
|
||
800336c: 4b0e ldr r3, [pc, #56] ; (80033a8 <LCD_ShowChar+0xf4>)
|
||
800336e: 881b ldrh r3, [r3, #0]
|
||
8003370: 88fa ldrh r2, [r7, #6]
|
||
8003372: 429a cmp r2, r3
|
||
8003374: d307 bcc.n 8003386 <LCD_ShowChar+0xd2>
|
||
8003376: e010 b.n 800339a <LCD_ShowChar+0xe6>
|
||
for(t1=0;t1<8;t1++)
|
||
8003378: 7bbb ldrb r3, [r7, #14]
|
||
800337a: 3301 adds r3, #1
|
||
800337c: 73bb strb r3, [r7, #14]
|
||
800337e: 7bbb ldrb r3, [r7, #14]
|
||
8003380: 2b07 cmp r3, #7
|
||
8003382: d9c8 bls.n 8003316 <LCD_ShowChar+0x62>
|
||
8003384: e000 b.n 8003388 <LCD_ShowChar+0xd4>
|
||
break;
|
||
8003386: bf00 nop
|
||
for(t=0;t<size;t++)
|
||
8003388: 7b7b ldrb r3, [r7, #13]
|
||
800338a: 3301 adds r3, #1
|
||
800338c: 737b strb r3, [r7, #13]
|
||
800338e: 7b7a ldrb r2, [r7, #13]
|
||
8003390: 78bb ldrb r3, [r7, #2]
|
||
8003392: 429a cmp r2, r3
|
||
8003394: d3a5 bcc.n 80032e2 <LCD_ShowChar+0x2e>
|
||
8003396: e000 b.n 800339a <LCD_ShowChar+0xe6>
|
||
if(x>=lcddev.width){return;}//��������
|
||
8003398: bf00 nop
|
||
}
|
||
}
|
||
|
||
|
||
|
||
}
|
||
800339a: 3714 adds r7, #20
|
||
800339c: 46bd mov sp, r7
|
||
800339e: bd90 pop {r4, r7, pc}
|
||
80033a0: 08007070 .word 0x08007070
|
||
80033a4: 080074e4 .word 0x080074e4
|
||
80033a8: 20000254 .word 0x20000254
|
||
|
||
080033ac <LCD_ShowString>:
|
||
//width,height:������С
|
||
//size:������С
|
||
//*p:�ַ�����ʼ��ַ
|
||
|
||
void LCD_ShowString(uint16_t x,uint16_t y,uint8_t *p,uint8_t size,uint16_t bg,uint16_t color)
|
||
{
|
||
80033ac: b590 push {r4, r7, lr}
|
||
80033ae: b087 sub sp, #28
|
||
80033b0: af02 add r7, sp, #8
|
||
80033b2: 60ba str r2, [r7, #8]
|
||
80033b4: 461a mov r2, r3
|
||
80033b6: 4603 mov r3, r0
|
||
80033b8: 81fb strh r3, [r7, #14]
|
||
80033ba: 460b mov r3, r1
|
||
80033bc: 81bb strh r3, [r7, #12]
|
||
80033be: 4613 mov r3, r2
|
||
80033c0: 71fb strb r3, [r7, #7]
|
||
while(*p!='\0')
|
||
80033c2: e026 b.n 8003412 <LCD_ShowString+0x66>
|
||
{
|
||
|
||
if(x>=lcddev.width||*p=='\n')
|
||
80033c4: 4b17 ldr r3, [pc, #92] ; (8003424 <LCD_ShowString+0x78>)
|
||
80033c6: 881b ldrh r3, [r3, #0]
|
||
80033c8: 89fa ldrh r2, [r7, #14]
|
||
80033ca: 429a cmp r2, r3
|
||
80033cc: d203 bcs.n 80033d6 <LCD_ShowString+0x2a>
|
||
80033ce: 68bb ldr r3, [r7, #8]
|
||
80033d0: 781b ldrb r3, [r3, #0]
|
||
80033d2: 2b0a cmp r3, #10
|
||
80033d4: d107 bne.n 80033e6 <LCD_ShowString+0x3a>
|
||
{
|
||
x=0;
|
||
80033d6: 2300 movs r3, #0
|
||
80033d8: 81fb strh r3, [r7, #14]
|
||
y+=size;
|
||
80033da: 79fb ldrb r3, [r7, #7]
|
||
80033dc: b29a uxth r2, r3
|
||
80033de: 89bb ldrh r3, [r7, #12]
|
||
80033e0: 4413 add r3, r2
|
||
80033e2: 81bb strh r3, [r7, #12]
|
||
80033e4: e012 b.n 800340c <LCD_ShowString+0x60>
|
||
}else
|
||
{
|
||
LCD_ShowChar(x,y,*p,size,bg,color);
|
||
80033e6: 68bb ldr r3, [r7, #8]
|
||
80033e8: 781a ldrb r2, [r3, #0]
|
||
80033ea: 79fc ldrb r4, [r7, #7]
|
||
80033ec: 89b9 ldrh r1, [r7, #12]
|
||
80033ee: 89f8 ldrh r0, [r7, #14]
|
||
80033f0: 8cbb ldrh r3, [r7, #36] ; 0x24
|
||
80033f2: 9301 str r3, [sp, #4]
|
||
80033f4: 8c3b ldrh r3, [r7, #32]
|
||
80033f6: 9300 str r3, [sp, #0]
|
||
80033f8: 4623 mov r3, r4
|
||
80033fa: f7ff ff5b bl 80032b4 <LCD_ShowChar>
|
||
x+=(size/2);
|
||
80033fe: 79fb ldrb r3, [r7, #7]
|
||
8003400: 085b lsrs r3, r3, #1
|
||
8003402: b2db uxtb r3, r3
|
||
8003404: b29a uxth r2, r3
|
||
8003406: 89fb ldrh r3, [r7, #14]
|
||
8003408: 4413 add r3, r2
|
||
800340a: 81fb strh r3, [r7, #14]
|
||
}
|
||
p++;
|
||
800340c: 68bb ldr r3, [r7, #8]
|
||
800340e: 3301 adds r3, #1
|
||
8003410: 60bb str r3, [r7, #8]
|
||
while(*p!='\0')
|
||
8003412: 68bb ldr r3, [r7, #8]
|
||
8003414: 781b ldrb r3, [r3, #0]
|
||
8003416: 2b00 cmp r3, #0
|
||
8003418: d1d4 bne.n 80033c4 <LCD_ShowString+0x18>
|
||
|
||
}
|
||
}
|
||
800341a: bf00 nop
|
||
800341c: bf00 nop
|
||
800341e: 3714 adds r7, #20
|
||
8003420: 46bd mov sp, r7
|
||
8003422: bd90 pop {r4, r7, pc}
|
||
8003424: 20000254 .word 0x20000254
|
||
|
||
08003428 <TP_Write_Byte>:
|
||
|
||
//SPI���
|
||
//��������IC�1byte����
|
||
//num:Ҫд��������
|
||
void TP_Write_Byte(char num)
|
||
{
|
||
8003428: b580 push {r7, lr}
|
||
800342a: b084 sub sp, #16
|
||
800342c: af00 add r7, sp, #0
|
||
800342e: 4603 mov r3, r0
|
||
8003430: 71fb strb r3, [r7, #7]
|
||
for(uint8_t count=0;count<8;count++)
|
||
8003432: 2300 movs r3, #0
|
||
8003434: 73fb strb r3, [r7, #15]
|
||
8003436: e020 b.n 800347a <TP_Write_Byte+0x52>
|
||
{
|
||
if(num&0x80){TDIN(1);}
|
||
8003438: f997 3007 ldrsb.w r3, [r7, #7]
|
||
800343c: 2b00 cmp r3, #0
|
||
800343e: da06 bge.n 800344e <TP_Write_Byte+0x26>
|
||
8003440: 2201 movs r2, #1
|
||
8003442: f44f 7100 mov.w r1, #512 ; 0x200
|
||
8003446: 4811 ldr r0, [pc, #68] ; (800348c <TP_Write_Byte+0x64>)
|
||
8003448: f7fe fc6b bl 8001d22 <HAL_GPIO_WritePin>
|
||
800344c: e005 b.n 800345a <TP_Write_Byte+0x32>
|
||
else {TDIN(0);}
|
||
800344e: 2200 movs r2, #0
|
||
8003450: f44f 7100 mov.w r1, #512 ; 0x200
|
||
8003454: 480d ldr r0, [pc, #52] ; (800348c <TP_Write_Byte+0x64>)
|
||
8003456: f7fe fc64 bl 8001d22 <HAL_GPIO_WritePin>
|
||
num<<=1;
|
||
800345a: 79fb ldrb r3, [r7, #7]
|
||
800345c: 005b lsls r3, r3, #1
|
||
800345e: 71fb strb r3, [r7, #7]
|
||
TCLK(0);
|
||
8003460: 2200 movs r2, #0
|
||
8003462: 2102 movs r1, #2
|
||
8003464: 480a ldr r0, [pc, #40] ; (8003490 <TP_Write_Byte+0x68>)
|
||
8003466: f7fe fc5c bl 8001d22 <HAL_GPIO_WritePin>
|
||
TCLK(1); //��������Ч
|
||
800346a: 2201 movs r2, #1
|
||
800346c: 2102 movs r1, #2
|
||
800346e: 4808 ldr r0, [pc, #32] ; (8003490 <TP_Write_Byte+0x68>)
|
||
8003470: f7fe fc57 bl 8001d22 <HAL_GPIO_WritePin>
|
||
for(uint8_t count=0;count<8;count++)
|
||
8003474: 7bfb ldrb r3, [r7, #15]
|
||
8003476: 3301 adds r3, #1
|
||
8003478: 73fb strb r3, [r7, #15]
|
||
800347a: 7bfb ldrb r3, [r7, #15]
|
||
800347c: 2b07 cmp r3, #7
|
||
800347e: d9db bls.n 8003438 <TP_Write_Byte+0x10>
|
||
}
|
||
}
|
||
8003480: bf00 nop
|
||
8003482: bf00 nop
|
||
8003484: 3710 adds r7, #16
|
||
8003486: 46bd mov sp, r7
|
||
8003488: bd80 pop {r7, pc}
|
||
800348a: bf00 nop
|
||
800348c: 40011c00 .word 0x40011c00
|
||
8003490: 40010c00 .word 0x40010c00
|
||
|
||
08003494 <TP_Read_AD>:
|
||
//SPI������
|
||
//�Ӵ�����IC��ȡadcֵ
|
||
//CMD:ָ��
|
||
//����ֵ:����������
|
||
uint16_t TP_Read_AD(char CMD)
|
||
{
|
||
8003494: b580 push {r7, lr}
|
||
8003496: b084 sub sp, #16
|
||
8003498: af00 add r7, sp, #0
|
||
800349a: 4603 mov r3, r0
|
||
800349c: 71fb strb r3, [r7, #7]
|
||
uint16_t Num=0;
|
||
800349e: 2300 movs r3, #0
|
||
80034a0: 81fb strh r3, [r7, #14]
|
||
TCLK(0); //������ʱ��
|
||
80034a2: 2200 movs r2, #0
|
||
80034a4: 2102 movs r1, #2
|
||
80034a6: 482b ldr r0, [pc, #172] ; (8003554 <TP_Read_AD+0xc0>)
|
||
80034a8: f7fe fc3b bl 8001d22 <HAL_GPIO_WritePin>
|
||
TDIN(0); //����������
|
||
80034ac: 2200 movs r2, #0
|
||
80034ae: f44f 7100 mov.w r1, #512 ; 0x200
|
||
80034b2: 4829 ldr r0, [pc, #164] ; (8003558 <TP_Read_AD+0xc4>)
|
||
80034b4: f7fe fc35 bl 8001d22 <HAL_GPIO_WritePin>
|
||
TCS(0); //ѡ�д�����IC
|
||
80034b8: 2200 movs r2, #0
|
||
80034ba: 2104 movs r1, #4
|
||
80034bc: 4825 ldr r0, [pc, #148] ; (8003554 <TP_Read_AD+0xc0>)
|
||
80034be: f7fe fc30 bl 8001d22 <HAL_GPIO_WritePin>
|
||
TP_Write_Byte(CMD);//����������
|
||
80034c2: 79fb ldrb r3, [r7, #7]
|
||
80034c4: 4618 mov r0, r3
|
||
80034c6: f7ff ffaf bl 8003428 <TP_Write_Byte>
|
||
HAL_GetTick();
|
||
80034ca: f7fe f96d bl 80017a8 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80034ce: f7fe f96b bl 80017a8 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80034d2: f7fe f969 bl 80017a8 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80034d6: f7fe f967 bl 80017a8 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80034da: f7fe f965 bl 80017a8 <HAL_GetTick>
|
||
HAL_GetTick();
|
||
80034de: f7fe f963 bl 80017a8 <HAL_GetTick>
|
||
TCLK(1); //��1��ʱ�ӣ�����BUSY
|
||
80034e2: 2201 movs r2, #1
|
||
80034e4: 2102 movs r1, #2
|
||
80034e6: 481b ldr r0, [pc, #108] ; (8003554 <TP_Read_AD+0xc0>)
|
||
80034e8: f7fe fc1b bl 8001d22 <HAL_GPIO_WritePin>
|
||
TCLK(0);
|
||
80034ec: 2200 movs r2, #0
|
||
80034ee: 2102 movs r1, #2
|
||
80034f0: 4818 ldr r0, [pc, #96] ; (8003554 <TP_Read_AD+0xc0>)
|
||
80034f2: f7fe fc16 bl 8001d22 <HAL_GPIO_WritePin>
|
||
for(uint8_t count=0;count<16;count++)//����16λ����,ֻ�и�12λ��Ч
|
||
80034f6: 2300 movs r3, #0
|
||
80034f8: 737b strb r3, [r7, #13]
|
||
80034fa: e01a b.n 8003532 <TP_Read_AD+0x9e>
|
||
{
|
||
Num<<=1;
|
||
80034fc: 89fb ldrh r3, [r7, #14]
|
||
80034fe: 005b lsls r3, r3, #1
|
||
8003500: 81fb strh r3, [r7, #14]
|
||
TCLK(0); //�½�����Ч
|
||
8003502: 2200 movs r2, #0
|
||
8003504: 2102 movs r1, #2
|
||
8003506: 4813 ldr r0, [pc, #76] ; (8003554 <TP_Read_AD+0xc0>)
|
||
8003508: f7fe fc0b bl 8001d22 <HAL_GPIO_WritePin>
|
||
TCLK(1);;
|
||
800350c: 2201 movs r2, #1
|
||
800350e: 2102 movs r1, #2
|
||
8003510: 4810 ldr r0, [pc, #64] ; (8003554 <TP_Read_AD+0xc0>)
|
||
8003512: f7fe fc06 bl 8001d22 <HAL_GPIO_WritePin>
|
||
if(TDOUT){Num++;}
|
||
8003516: f44f 7180 mov.w r1, #256 ; 0x100
|
||
800351a: 480f ldr r0, [pc, #60] ; (8003558 <TP_Read_AD+0xc4>)
|
||
800351c: f7fe fbea bl 8001cf4 <HAL_GPIO_ReadPin>
|
||
8003520: 4603 mov r3, r0
|
||
8003522: 2b00 cmp r3, #0
|
||
8003524: d002 beq.n 800352c <TP_Read_AD+0x98>
|
||
8003526: 89fb ldrh r3, [r7, #14]
|
||
8003528: 3301 adds r3, #1
|
||
800352a: 81fb strh r3, [r7, #14]
|
||
for(uint8_t count=0;count<16;count++)//����16λ����,ֻ�и�12λ��Ч
|
||
800352c: 7b7b ldrb r3, [r7, #13]
|
||
800352e: 3301 adds r3, #1
|
||
8003530: 737b strb r3, [r7, #13]
|
||
8003532: 7b7b ldrb r3, [r7, #13]
|
||
8003534: 2b0f cmp r3, #15
|
||
8003536: d9e1 bls.n 80034fc <TP_Read_AD+0x68>
|
||
}
|
||
Num>>=4; //ֻ�и�12λ��Ч.
|
||
8003538: 89fb ldrh r3, [r7, #14]
|
||
800353a: 091b lsrs r3, r3, #4
|
||
800353c: 81fb strh r3, [r7, #14]
|
||
TCS(1); //�ͷ�Ƭѡ
|
||
800353e: 2201 movs r2, #1
|
||
8003540: 2104 movs r1, #4
|
||
8003542: 4804 ldr r0, [pc, #16] ; (8003554 <TP_Read_AD+0xc0>)
|
||
8003544: f7fe fbed bl 8001d22 <HAL_GPIO_WritePin>
|
||
return(Num);
|
||
8003548: 89fb ldrh r3, [r7, #14]
|
||
}
|
||
800354a: 4618 mov r0, r3
|
||
800354c: 3710 adds r7, #16
|
||
800354e: 46bd mov sp, r7
|
||
8003550: bd80 pop {r7, pc}
|
||
8003552: bf00 nop
|
||
8003554: 40010c00 .word 0x40010c00
|
||
8003558: 40011c00 .word 0x40011c00
|
||
|
||
0800355c <TP_Read_XOY>:
|
||
//xy:ָ�CMD_RDX/CMD_RDY��
|
||
//����ֵ:����������
|
||
#define READ_TIMES 5 //��ȡ����
|
||
#define LOST_VAL 1 //����ֵ
|
||
uint16_t TP_Read_XOY(uint8_t xy)
|
||
{
|
||
800355c: b590 push {r4, r7, lr}
|
||
800355e: b089 sub sp, #36 ; 0x24
|
||
8003560: af00 add r7, sp, #0
|
||
8003562: 4603 mov r3, r0
|
||
8003564: 71fb strb r3, [r7, #7]
|
||
uint16_t i, j;
|
||
uint16_t buf[READ_TIMES];
|
||
uint16_t sum=0;
|
||
8003566: 2300 movs r3, #0
|
||
8003568: 837b strh r3, [r7, #26]
|
||
uint16_t temp;
|
||
for(i=0;i<READ_TIMES;i++)buf[i]=TP_Read_AD(xy);
|
||
800356a: 2300 movs r3, #0
|
||
800356c: 83fb strh r3, [r7, #30]
|
||
800356e: e00f b.n 8003590 <TP_Read_XOY+0x34>
|
||
8003570: 8bfc ldrh r4, [r7, #30]
|
||
8003572: 79fb ldrb r3, [r7, #7]
|
||
8003574: 4618 mov r0, r3
|
||
8003576: f7ff ff8d bl 8003494 <TP_Read_AD>
|
||
800357a: 4603 mov r3, r0
|
||
800357c: 461a mov r2, r3
|
||
800357e: 0063 lsls r3, r4, #1
|
||
8003580: f107 0120 add.w r1, r7, #32
|
||
8003584: 440b add r3, r1
|
||
8003586: f823 2c14 strh.w r2, [r3, #-20]
|
||
800358a: 8bfb ldrh r3, [r7, #30]
|
||
800358c: 3301 adds r3, #1
|
||
800358e: 83fb strh r3, [r7, #30]
|
||
8003590: 8bfb ldrh r3, [r7, #30]
|
||
8003592: 2b04 cmp r3, #4
|
||
8003594: d9ec bls.n 8003570 <TP_Read_XOY+0x14>
|
||
for(i=0;i<READ_TIMES-1; i++)//����
|
||
8003596: 2300 movs r3, #0
|
||
8003598: 83fb strh r3, [r7, #30]
|
||
800359a: e03b b.n 8003614 <TP_Read_XOY+0xb8>
|
||
{
|
||
for(j=i+1;j<READ_TIMES;j++)
|
||
800359c: 8bfb ldrh r3, [r7, #30]
|
||
800359e: 3301 adds r3, #1
|
||
80035a0: 83bb strh r3, [r7, #28]
|
||
80035a2: e031 b.n 8003608 <TP_Read_XOY+0xac>
|
||
{
|
||
if(buf[i]>buf[j])//��������
|
||
80035a4: 8bfb ldrh r3, [r7, #30]
|
||
80035a6: 005b lsls r3, r3, #1
|
||
80035a8: f107 0220 add.w r2, r7, #32
|
||
80035ac: 4413 add r3, r2
|
||
80035ae: f833 2c14 ldrh.w r2, [r3, #-20]
|
||
80035b2: 8bbb ldrh r3, [r7, #28]
|
||
80035b4: 005b lsls r3, r3, #1
|
||
80035b6: f107 0120 add.w r1, r7, #32
|
||
80035ba: 440b add r3, r1
|
||
80035bc: f833 3c14 ldrh.w r3, [r3, #-20]
|
||
80035c0: 429a cmp r2, r3
|
||
80035c2: d91e bls.n 8003602 <TP_Read_XOY+0xa6>
|
||
{
|
||
temp=buf[i];
|
||
80035c4: 8bfb ldrh r3, [r7, #30]
|
||
80035c6: 005b lsls r3, r3, #1
|
||
80035c8: f107 0220 add.w r2, r7, #32
|
||
80035cc: 4413 add r3, r2
|
||
80035ce: f833 3c14 ldrh.w r3, [r3, #-20]
|
||
80035d2: 833b strh r3, [r7, #24]
|
||
buf[i]=buf[j];
|
||
80035d4: 8bbb ldrh r3, [r7, #28]
|
||
80035d6: 8bfa ldrh r2, [r7, #30]
|
||
80035d8: 005b lsls r3, r3, #1
|
||
80035da: f107 0120 add.w r1, r7, #32
|
||
80035de: 440b add r3, r1
|
||
80035e0: f833 1c14 ldrh.w r1, [r3, #-20]
|
||
80035e4: 0053 lsls r3, r2, #1
|
||
80035e6: f107 0220 add.w r2, r7, #32
|
||
80035ea: 4413 add r3, r2
|
||
80035ec: 460a mov r2, r1
|
||
80035ee: f823 2c14 strh.w r2, [r3, #-20]
|
||
buf[j]=temp;
|
||
80035f2: 8bbb ldrh r3, [r7, #28]
|
||
80035f4: 005b lsls r3, r3, #1
|
||
80035f6: f107 0220 add.w r2, r7, #32
|
||
80035fa: 4413 add r3, r2
|
||
80035fc: 8b3a ldrh r2, [r7, #24]
|
||
80035fe: f823 2c14 strh.w r2, [r3, #-20]
|
||
for(j=i+1;j<READ_TIMES;j++)
|
||
8003602: 8bbb ldrh r3, [r7, #28]
|
||
8003604: 3301 adds r3, #1
|
||
8003606: 83bb strh r3, [r7, #28]
|
||
8003608: 8bbb ldrh r3, [r7, #28]
|
||
800360a: 2b04 cmp r3, #4
|
||
800360c: d9ca bls.n 80035a4 <TP_Read_XOY+0x48>
|
||
for(i=0;i<READ_TIMES-1; i++)//����
|
||
800360e: 8bfb ldrh r3, [r7, #30]
|
||
8003610: 3301 adds r3, #1
|
||
8003612: 83fb strh r3, [r7, #30]
|
||
8003614: 8bfb ldrh r3, [r7, #30]
|
||
8003616: 2b03 cmp r3, #3
|
||
8003618: d9c0 bls.n 800359c <TP_Read_XOY+0x40>
|
||
}
|
||
}
|
||
}
|
||
sum=0;
|
||
800361a: 2300 movs r3, #0
|
||
800361c: 837b strh r3, [r7, #26]
|
||
for(i=LOST_VAL;i<READ_TIMES-LOST_VAL;i++)sum+=buf[i];
|
||
800361e: 2301 movs r3, #1
|
||
8003620: 83fb strh r3, [r7, #30]
|
||
8003622: e00c b.n 800363e <TP_Read_XOY+0xe2>
|
||
8003624: 8bfb ldrh r3, [r7, #30]
|
||
8003626: 005b lsls r3, r3, #1
|
||
8003628: f107 0220 add.w r2, r7, #32
|
||
800362c: 4413 add r3, r2
|
||
800362e: f833 2c14 ldrh.w r2, [r3, #-20]
|
||
8003632: 8b7b ldrh r3, [r7, #26]
|
||
8003634: 4413 add r3, r2
|
||
8003636: 837b strh r3, [r7, #26]
|
||
8003638: 8bfb ldrh r3, [r7, #30]
|
||
800363a: 3301 adds r3, #1
|
||
800363c: 83fb strh r3, [r7, #30]
|
||
800363e: 8bfb ldrh r3, [r7, #30]
|
||
8003640: 2b03 cmp r3, #3
|
||
8003642: d9ef bls.n 8003624 <TP_Read_XOY+0xc8>
|
||
temp=sum/(READ_TIMES-2*LOST_VAL);
|
||
8003644: 8b7b ldrh r3, [r7, #26]
|
||
8003646: 4a05 ldr r2, [pc, #20] ; (800365c <TP_Read_XOY+0x100>)
|
||
8003648: fba2 2303 umull r2, r3, r2, r3
|
||
800364c: 085b lsrs r3, r3, #1
|
||
800364e: 833b strh r3, [r7, #24]
|
||
return temp;
|
||
8003650: 8b3b ldrh r3, [r7, #24]
|
||
}
|
||
8003652: 4618 mov r0, r3
|
||
8003654: 3724 adds r7, #36 ; 0x24
|
||
8003656: 46bd mov sp, r7
|
||
8003658: bd90 pop {r4, r7, pc}
|
||
800365a: bf00 nop
|
||
800365c: aaaaaaab .word 0xaaaaaaab
|
||
|
||
08003660 <TP_Read_XY_ADC>:
|
||
|
||
//��ȡx,y����
|
||
//x,y:��ȡ��������ADCֵ
|
||
void TP_Read_XY_ADC(int16_t *x,int16_t *y)
|
||
{
|
||
8003660: b580 push {r7, lr}
|
||
8003662: b084 sub sp, #16
|
||
8003664: af00 add r7, sp, #0
|
||
8003666: 6078 str r0, [r7, #4]
|
||
8003668: 6039 str r1, [r7, #0]
|
||
int16_t xtemp,ytemp;
|
||
xtemp=TP_Read_XOY(CMD_RDX);
|
||
800366a: 2090 movs r0, #144 ; 0x90
|
||
800366c: f7ff ff76 bl 800355c <TP_Read_XOY>
|
||
8003670: 4603 mov r3, r0
|
||
8003672: 81fb strh r3, [r7, #14]
|
||
ytemp=TP_Read_XOY(CMD_RDY);
|
||
8003674: 20d0 movs r0, #208 ; 0xd0
|
||
8003676: f7ff ff71 bl 800355c <TP_Read_XOY>
|
||
800367a: 4603 mov r3, r0
|
||
800367c: 81bb strh r3, [r7, #12]
|
||
*x=xtemp;
|
||
800367e: 687b ldr r3, [r7, #4]
|
||
8003680: 89fa ldrh r2, [r7, #14]
|
||
8003682: 801a strh r2, [r3, #0]
|
||
*y=ytemp;
|
||
8003684: 683b ldr r3, [r7, #0]
|
||
8003686: 89ba ldrh r2, [r7, #12]
|
||
8003688: 801a strh r2, [r3, #0]
|
||
}
|
||
800368a: bf00 nop
|
||
800368c: 3710 adds r7, #16
|
||
800368e: 46bd mov sp, r7
|
||
8003690: bd80 pop {r7, pc}
|
||
|
||
08003692 <TP_Read_XY2>:
|
||
//�ú����ܴ�������ȷ��
|
||
//x,y:��ȡ��������ֵ
|
||
//����ֵ:0,ʧ��;1,�ɹ���
|
||
#define ERR_RANGE 10 //���Χ
|
||
uint8_t TP_Read_XY2(int16_t *x,int16_t *y)
|
||
{
|
||
8003692: b580 push {r7, lr}
|
||
8003694: b084 sub sp, #16
|
||
8003696: af00 add r7, sp, #0
|
||
8003698: 6078 str r0, [r7, #4]
|
||
800369a: 6039 str r1, [r7, #0]
|
||
int16_t x1,y1;
|
||
int16_t x2,y2;
|
||
|
||
TP_Read_XY_ADC(&x1,&y1);
|
||
800369c: f107 020c add.w r2, r7, #12
|
||
80036a0: f107 030e add.w r3, r7, #14
|
||
80036a4: 4611 mov r1, r2
|
||
80036a6: 4618 mov r0, r3
|
||
80036a8: f7ff ffda bl 8003660 <TP_Read_XY_ADC>
|
||
|
||
TP_Read_XY_ADC(&x2,&y2);
|
||
80036ac: f107 0208 add.w r2, r7, #8
|
||
80036b0: f107 030a add.w r3, r7, #10
|
||
80036b4: 4611 mov r1, r2
|
||
80036b6: 4618 mov r0, r3
|
||
80036b8: f7ff ffd2 bl 8003660 <TP_Read_XY_ADC>
|
||
|
||
if(((x2<=x1&&x1<x2+ERR_RANGE)||(x1<=x2&&x2<x1+ERR_RANGE))//ǰ�����β�����+-50��
|
||
80036bc: f9b7 200a ldrsh.w r2, [r7, #10]
|
||
80036c0: f9b7 300e ldrsh.w r3, [r7, #14]
|
||
80036c4: 429a cmp r2, r3
|
||
80036c6: dc06 bgt.n 80036d6 <TP_Read_XY2+0x44>
|
||
80036c8: f9b7 300a ldrsh.w r3, [r7, #10]
|
||
80036cc: 3309 adds r3, #9
|
||
80036ce: f9b7 200e ldrsh.w r2, [r7, #14]
|
||
80036d2: 4293 cmp r3, r2
|
||
80036d4: da0c bge.n 80036f0 <TP_Read_XY2+0x5e>
|
||
80036d6: f9b7 200e ldrsh.w r2, [r7, #14]
|
||
80036da: f9b7 300a ldrsh.w r3, [r7, #10]
|
||
80036de: 429a cmp r2, r3
|
||
80036e0: dc3a bgt.n 8003758 <TP_Read_XY2+0xc6>
|
||
80036e2: f9b7 300e ldrsh.w r3, [r7, #14]
|
||
80036e6: 3309 adds r3, #9
|
||
80036e8: f9b7 200a ldrsh.w r2, [r7, #10]
|
||
80036ec: 4293 cmp r3, r2
|
||
80036ee: db33 blt.n 8003758 <TP_Read_XY2+0xc6>
|
||
&&((y2<=y1&&y1<y2+ERR_RANGE)||(y1<=y2&&y2<y1+ERR_RANGE)))
|
||
80036f0: f9b7 2008 ldrsh.w r2, [r7, #8]
|
||
80036f4: f9b7 300c ldrsh.w r3, [r7, #12]
|
||
80036f8: 429a cmp r2, r3
|
||
80036fa: dc06 bgt.n 800370a <TP_Read_XY2+0x78>
|
||
80036fc: f9b7 3008 ldrsh.w r3, [r7, #8]
|
||
8003700: 3309 adds r3, #9
|
||
8003702: f9b7 200c ldrsh.w r2, [r7, #12]
|
||
8003706: 4293 cmp r3, r2
|
||
8003708: da0c bge.n 8003724 <TP_Read_XY2+0x92>
|
||
800370a: f9b7 200c ldrsh.w r2, [r7, #12]
|
||
800370e: f9b7 3008 ldrsh.w r3, [r7, #8]
|
||
8003712: 429a cmp r2, r3
|
||
8003714: dc20 bgt.n 8003758 <TP_Read_XY2+0xc6>
|
||
8003716: f9b7 300c ldrsh.w r3, [r7, #12]
|
||
800371a: 3309 adds r3, #9
|
||
800371c: f9b7 2008 ldrsh.w r2, [r7, #8]
|
||
8003720: 4293 cmp r3, r2
|
||
8003722: db19 blt.n 8003758 <TP_Read_XY2+0xc6>
|
||
{
|
||
*x=(x1+x2)/2;
|
||
8003724: f9b7 300e ldrsh.w r3, [r7, #14]
|
||
8003728: 461a mov r2, r3
|
||
800372a: f9b7 300a ldrsh.w r3, [r7, #10]
|
||
800372e: 4413 add r3, r2
|
||
8003730: 0fda lsrs r2, r3, #31
|
||
8003732: 4413 add r3, r2
|
||
8003734: 105b asrs r3, r3, #1
|
||
8003736: b21a sxth r2, r3
|
||
8003738: 687b ldr r3, [r7, #4]
|
||
800373a: 801a strh r2, [r3, #0]
|
||
*y=(y1+y2)/2;
|
||
800373c: f9b7 300c ldrsh.w r3, [r7, #12]
|
||
8003740: 461a mov r2, r3
|
||
8003742: f9b7 3008 ldrsh.w r3, [r7, #8]
|
||
8003746: 4413 add r3, r2
|
||
8003748: 0fda lsrs r2, r3, #31
|
||
800374a: 4413 add r3, r2
|
||
800374c: 105b asrs r3, r3, #1
|
||
800374e: b21a sxth r2, r3
|
||
8003750: 683b ldr r3, [r7, #0]
|
||
8003752: 801a strh r2, [r3, #0]
|
||
return 1;
|
||
8003754: 2301 movs r3, #1
|
||
8003756: e000 b.n 800375a <TP_Read_XY2+0xc8>
|
||
}else return 0;
|
||
8003758: 2300 movs r3, #0
|
||
}
|
||
800375a: 4618 mov r0, r3
|
||
800375c: 3710 adds r7, #16
|
||
800375e: 46bd mov sp, r7
|
||
8003760: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08003764 <TP_Server>:
|
||
touch_device t0;// t0 yyds~
|
||
touch_config tconfig;
|
||
//�������·���
|
||
void TP_Server()
|
||
{
|
||
8003764: b598 push {r3, r4, r7, lr}
|
||
8003766: af00 add r7, sp, #0
|
||
if(TPEN==0)
|
||
8003768: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
800376c: 4824 ldr r0, [pc, #144] ; (8003800 <TP_Server+0x9c>)
|
||
800376e: f7fe fac1 bl 8001cf4 <HAL_GPIO_ReadPin>
|
||
8003772: 4603 mov r3, r0
|
||
8003774: 2b00 cmp r3, #0
|
||
8003776: d141 bne.n 80037fc <TP_Server+0x98>
|
||
{
|
||
TP_Read_XY2(&t0.adc_x,&t0.adc_y);
|
||
8003778: 4922 ldr r1, [pc, #136] ; (8003804 <TP_Server+0xa0>)
|
||
800377a: 4823 ldr r0, [pc, #140] ; (8003808 <TP_Server+0xa4>)
|
||
800377c: f7ff ff89 bl 8003692 <TP_Read_XY2>
|
||
t0.pix_x=(t0.adc_x/tconfig.x_acc)-tconfig.x_offset;
|
||
8003780: 4b21 ldr r3, [pc, #132] ; (8003808 <TP_Server+0xa4>)
|
||
8003782: 881b ldrh r3, [r3, #0]
|
||
8003784: 4618 mov r0, r3
|
||
8003786: f7fd faf5 bl 8000d74 <__aeabi_i2f>
|
||
800378a: 4602 mov r2, r0
|
||
800378c: 4b1f ldr r3, [pc, #124] ; (800380c <TP_Server+0xa8>)
|
||
800378e: 685b ldr r3, [r3, #4]
|
||
8003790: 4619 mov r1, r3
|
||
8003792: 4610 mov r0, r2
|
||
8003794: f7fd fbf6 bl 8000f84 <__aeabi_fdiv>
|
||
8003798: 4603 mov r3, r0
|
||
800379a: 461c mov r4, r3
|
||
800379c: 4b1b ldr r3, [pc, #108] ; (800380c <TP_Server+0xa8>)
|
||
800379e: 68db ldr r3, [r3, #12]
|
||
80037a0: 4618 mov r0, r3
|
||
80037a2: f7fd fae7 bl 8000d74 <__aeabi_i2f>
|
||
80037a6: 4603 mov r3, r0
|
||
80037a8: 4619 mov r1, r3
|
||
80037aa: 4620 mov r0, r4
|
||
80037ac: f7fd fa2c bl 8000c08 <__aeabi_fsub>
|
||
80037b0: 4603 mov r3, r0
|
||
80037b2: 4618 mov r0, r3
|
||
80037b4: f7fd fc82 bl 80010bc <__aeabi_f2iz>
|
||
80037b8: 4603 mov r3, r0
|
||
80037ba: 4a13 ldr r2, [pc, #76] ; (8003808 <TP_Server+0xa4>)
|
||
80037bc: 6053 str r3, [r2, #4]
|
||
t0.pix_y=(t0.adc_y/tconfig.y_acc)-tconfig.y_offset;
|
||
80037be: 4b12 ldr r3, [pc, #72] ; (8003808 <TP_Server+0xa4>)
|
||
80037c0: 885b ldrh r3, [r3, #2]
|
||
80037c2: 4618 mov r0, r3
|
||
80037c4: f7fd fad6 bl 8000d74 <__aeabi_i2f>
|
||
80037c8: 4602 mov r2, r0
|
||
80037ca: 4b10 ldr r3, [pc, #64] ; (800380c <TP_Server+0xa8>)
|
||
80037cc: 689b ldr r3, [r3, #8]
|
||
80037ce: 4619 mov r1, r3
|
||
80037d0: 4610 mov r0, r2
|
||
80037d2: f7fd fbd7 bl 8000f84 <__aeabi_fdiv>
|
||
80037d6: 4603 mov r3, r0
|
||
80037d8: 461c mov r4, r3
|
||
80037da: 4b0c ldr r3, [pc, #48] ; (800380c <TP_Server+0xa8>)
|
||
80037dc: 691b ldr r3, [r3, #16]
|
||
80037de: 4618 mov r0, r3
|
||
80037e0: f7fd fac8 bl 8000d74 <__aeabi_i2f>
|
||
80037e4: 4603 mov r3, r0
|
||
80037e6: 4619 mov r1, r3
|
||
80037e8: 4620 mov r0, r4
|
||
80037ea: f7fd fa0d bl 8000c08 <__aeabi_fsub>
|
||
80037ee: 4603 mov r3, r0
|
||
80037f0: 4618 mov r0, r3
|
||
80037f2: f7fd fc63 bl 80010bc <__aeabi_f2iz>
|
||
80037f6: 4603 mov r3, r0
|
||
80037f8: 4a03 ldr r2, [pc, #12] ; (8003808 <TP_Server+0xa4>)
|
||
80037fa: 6093 str r3, [r2, #8]
|
||
|
||
}
|
||
}
|
||
80037fc: bf00 nop
|
||
80037fe: bd98 pop {r3, r4, r7, pc}
|
||
8003800: 40011c00 .word 0x40011c00
|
||
8003804: 2000027a .word 0x2000027a
|
||
8003808: 20000278 .word 0x20000278
|
||
800380c: 20000260 .word 0x20000260
|
||
|
||
08003810 <TP_DrwaTrage>:
|
||
|
||
void TP_DrwaTrage(int x,int y,int r)
|
||
{
|
||
8003810: b590 push {r4, r7, lr}
|
||
8003812: b087 sub sp, #28
|
||
8003814: af02 add r7, sp, #8
|
||
8003816: 60f8 str r0, [r7, #12]
|
||
8003818: 60b9 str r1, [r7, #8]
|
||
800381a: 607a str r2, [r7, #4]
|
||
Draw_Circle(x,y,r+1,GRAY);
|
||
800381c: 68fb ldr r3, [r7, #12]
|
||
800381e: b298 uxth r0, r3
|
||
8003820: 68bb ldr r3, [r7, #8]
|
||
8003822: b299 uxth r1, r3
|
||
8003824: 687b ldr r3, [r7, #4]
|
||
8003826: b29b uxth r3, r3
|
||
8003828: 3301 adds r3, #1
|
||
800382a: b29a uxth r2, r3
|
||
800382c: f248 4330 movw r3, #33840 ; 0x8430
|
||
8003830: f7ff fc95 bl 800315e <Draw_Circle>
|
||
Draw_Circle(x,y,r,RED);
|
||
8003834: 68fb ldr r3, [r7, #12]
|
||
8003836: b298 uxth r0, r3
|
||
8003838: 68bb ldr r3, [r7, #8]
|
||
800383a: b299 uxth r1, r3
|
||
800383c: 687b ldr r3, [r7, #4]
|
||
800383e: b29a uxth r2, r3
|
||
8003840: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8003844: f7ff fc8b bl 800315e <Draw_Circle>
|
||
LCD_DrawLine(x,y,x+10,y,RED);
|
||
8003848: 68fb ldr r3, [r7, #12]
|
||
800384a: b298 uxth r0, r3
|
||
800384c: 68bb ldr r3, [r7, #8]
|
||
800384e: b299 uxth r1, r3
|
||
8003850: 68fb ldr r3, [r7, #12]
|
||
8003852: b29b uxth r3, r3
|
||
8003854: 330a adds r3, #10
|
||
8003856: b29a uxth r2, r3
|
||
8003858: 68bb ldr r3, [r7, #8]
|
||
800385a: b29b uxth r3, r3
|
||
800385c: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
8003860: 9400 str r4, [sp, #0]
|
||
8003862: f7ff fbf7 bl 8003054 <LCD_DrawLine>
|
||
LCD_DrawLine(x,y,x,y+10,RED);
|
||
8003866: 68fb ldr r3, [r7, #12]
|
||
8003868: b298 uxth r0, r3
|
||
800386a: 68bb ldr r3, [r7, #8]
|
||
800386c: b299 uxth r1, r3
|
||
800386e: 68fb ldr r3, [r7, #12]
|
||
8003870: b29a uxth r2, r3
|
||
8003872: 68bb ldr r3, [r7, #8]
|
||
8003874: b29b uxth r3, r3
|
||
8003876: 330a adds r3, #10
|
||
8003878: b29b uxth r3, r3
|
||
800387a: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
800387e: 9400 str r4, [sp, #0]
|
||
8003880: f7ff fbe8 bl 8003054 <LCD_DrawLine>
|
||
LCD_DrawLine(x,y,x-10,y,RED);
|
||
8003884: 68fb ldr r3, [r7, #12]
|
||
8003886: b298 uxth r0, r3
|
||
8003888: 68bb ldr r3, [r7, #8]
|
||
800388a: b299 uxth r1, r3
|
||
800388c: 68fb ldr r3, [r7, #12]
|
||
800388e: b29b uxth r3, r3
|
||
8003890: 3b0a subs r3, #10
|
||
8003892: b29a uxth r2, r3
|
||
8003894: 68bb ldr r3, [r7, #8]
|
||
8003896: b29b uxth r3, r3
|
||
8003898: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
800389c: 9400 str r4, [sp, #0]
|
||
800389e: f7ff fbd9 bl 8003054 <LCD_DrawLine>
|
||
LCD_DrawLine(x,y,x,y-10,RED);
|
||
80038a2: 68fb ldr r3, [r7, #12]
|
||
80038a4: b298 uxth r0, r3
|
||
80038a6: 68bb ldr r3, [r7, #8]
|
||
80038a8: b299 uxth r1, r3
|
||
80038aa: 68fb ldr r3, [r7, #12]
|
||
80038ac: b29a uxth r2, r3
|
||
80038ae: 68bb ldr r3, [r7, #8]
|
||
80038b0: b29b uxth r3, r3
|
||
80038b2: 3b0a subs r3, #10
|
||
80038b4: b29b uxth r3, r3
|
||
80038b6: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
80038ba: 9400 str r4, [sp, #0]
|
||
80038bc: f7ff fbca bl 8003054 <LCD_DrawLine>
|
||
}
|
||
80038c0: bf00 nop
|
||
80038c2: 3714 adds r7, #20
|
||
80038c4: 46bd mov sp, r7
|
||
80038c6: bd90 pop {r4, r7, pc}
|
||
|
||
080038c8 <TP_adjustment>:
|
||
|
||
void TP_adjustment()
|
||
{
|
||
80038c8: b5b0 push {r4, r5, r7, lr}
|
||
80038ca: b0a4 sub sp, #144 ; 0x90
|
||
80038cc: af02 add r7, sp, #8
|
||
char str[64];
|
||
uint16_t y_adc,x_adc,step=0,r=10;
|
||
80038ce: 2300 movs r3, #0
|
||
80038d0: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
80038d4: 230a movs r3, #10
|
||
80038d6: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
uint16_t y1,y2,y3,y4,x1,x2,x3,x4;
|
||
int y5,x5,xd,xl,yd,yl;
|
||
float acc_x,acc_y;
|
||
int offset_x,offset_y;
|
||
uint32_t wait=HAL_GetTick()+50000,ms100=0;
|
||
80038da: f7fd ff65 bl 80017a8 <HAL_GetTick>
|
||
80038de: 4603 mov r3, r0
|
||
80038e0: f503 4343 add.w r3, r3, #49920 ; 0xc300
|
||
80038e4: 3350 adds r3, #80 ; 0x50
|
||
80038e6: 673b str r3, [r7, #112] ; 0x70
|
||
80038e8: 2300 movs r3, #0
|
||
80038ea: 66fb str r3, [r7, #108] ; 0x6c
|
||
LCD_Clear(GRAY);
|
||
80038ec: f248 4030 movw r0, #33840 ; 0x8430
|
||
80038f0: f7ff fb5e bl 8002fb0 <LCD_Clear>
|
||
LCD_ShowString(0,50,"Calibrate the touch screen",16,RED,RED);
|
||
80038f4: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
80038f8: 9301 str r3, [sp, #4]
|
||
80038fa: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
80038fe: 9300 str r3, [sp, #0]
|
||
8003900: 2310 movs r3, #16
|
||
8003902: 4ad4 ldr r2, [pc, #848] ; (8003c54 <TP_adjustment+0x38c>)
|
||
8003904: 2132 movs r1, #50 ; 0x32
|
||
8003906: 2000 movs r0, #0
|
||
8003908: f7ff fd50 bl 80033ac <LCD_ShowString>
|
||
//TP_DrwaTrage(30,30,10);
|
||
while(HAL_GetTick()<wait)
|
||
800390c: e26f b.n 8003dee <TP_adjustment+0x526>
|
||
{
|
||
if(TPEN==0)
|
||
800390e: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8003912: 48d1 ldr r0, [pc, #836] ; (8003c58 <TP_adjustment+0x390>)
|
||
8003914: f7fe f9ee bl 8001cf4 <HAL_GPIO_ReadPin>
|
||
8003918: 4603 mov r3, r0
|
||
800391a: 2b00 cmp r3, #0
|
||
800391c: d146 bne.n 80039ac <TP_adjustment+0xe4>
|
||
{
|
||
wait=HAL_GetTick()+50000;
|
||
800391e: f7fd ff43 bl 80017a8 <HAL_GetTick>
|
||
8003922: 4603 mov r3, r0
|
||
8003924: f503 4343 add.w r3, r3, #49920 ; 0xc300
|
||
8003928: 3350 adds r3, #80 ; 0x50
|
||
800392a: 673b str r3, [r7, #112] ; 0x70
|
||
|
||
TP_Read_XY2(&x_adc,&y_adc);
|
||
800392c: 1cba adds r2, r7, #2
|
||
800392e: 463b mov r3, r7
|
||
8003930: 4611 mov r1, r2
|
||
8003932: 4618 mov r0, r3
|
||
8003934: f7ff fead bl 8003692 <TP_Read_XY2>
|
||
sprintf(str,"ADC_X:%04d",x_adc);
|
||
8003938: 883b ldrh r3, [r7, #0]
|
||
800393a: 461a mov r2, r3
|
||
800393c: 1d3b adds r3, r7, #4
|
||
800393e: 49c7 ldr r1, [pc, #796] ; (8003c5c <TP_adjustment+0x394>)
|
||
8003940: 4618 mov r0, r3
|
||
8003942: f001 f993 bl 8004c6c <siprintf>
|
||
LCD_ShowString(100, 0, str, 16, RED, GRAY);
|
||
8003946: 1d3a adds r2, r7, #4
|
||
8003948: f248 4330 movw r3, #33840 ; 0x8430
|
||
800394c: 9301 str r3, [sp, #4]
|
||
800394e: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8003952: 9300 str r3, [sp, #0]
|
||
8003954: 2310 movs r3, #16
|
||
8003956: 2100 movs r1, #0
|
||
8003958: 2064 movs r0, #100 ; 0x64
|
||
800395a: f7ff fd27 bl 80033ac <LCD_ShowString>
|
||
sprintf(str,"ADC_Y:%04d",y_adc);
|
||
800395e: 887b ldrh r3, [r7, #2]
|
||
8003960: 461a mov r2, r3
|
||
8003962: 1d3b adds r3, r7, #4
|
||
8003964: 49be ldr r1, [pc, #760] ; (8003c60 <TP_adjustment+0x398>)
|
||
8003966: 4618 mov r0, r3
|
||
8003968: f001 f980 bl 8004c6c <siprintf>
|
||
LCD_ShowString(100, 16, str, 16, RED, GRAY);
|
||
800396c: 1d3a adds r2, r7, #4
|
||
800396e: f248 4330 movw r3, #33840 ; 0x8430
|
||
8003972: 9301 str r3, [sp, #4]
|
||
8003974: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8003978: 9300 str r3, [sp, #0]
|
||
800397a: 2310 movs r3, #16
|
||
800397c: 2110 movs r1, #16
|
||
800397e: 2064 movs r0, #100 ; 0x64
|
||
8003980: f7ff fd14 bl 80033ac <LCD_ShowString>
|
||
|
||
if(HAL_GetTick()>ms100)
|
||
8003984: f7fd ff10 bl 80017a8 <HAL_GetTick>
|
||
8003988: 4602 mov r2, r0
|
||
800398a: 6efb ldr r3, [r7, #108] ; 0x6c
|
||
800398c: 4293 cmp r3, r2
|
||
800398e: d20d bcs.n 80039ac <TP_adjustment+0xe4>
|
||
{
|
||
ms100=HAL_GetTick()+100;
|
||
8003990: f7fd ff0a bl 80017a8 <HAL_GetTick>
|
||
8003994: 4603 mov r3, r0
|
||
8003996: 3364 adds r3, #100 ; 0x64
|
||
8003998: 66fb str r3, [r7, #108] ; 0x6c
|
||
if(r>0){r--;}
|
||
800399a: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
800399e: 2b00 cmp r3, #0
|
||
80039a0: d004 beq.n 80039ac <TP_adjustment+0xe4>
|
||
80039a2: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
80039a6: 3b01 subs r3, #1
|
||
80039a8: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
}
|
||
|
||
if(step==0)
|
||
80039ac: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
80039b0: 2b00 cmp r3, #0
|
||
80039b2: d129 bne.n 8003a08 <TP_adjustment+0x140>
|
||
{
|
||
TP_DrwaTrage(30,30,r);
|
||
80039b4: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
80039b8: 461a mov r2, r3
|
||
80039ba: 211e movs r1, #30
|
||
80039bc: 201e movs r0, #30
|
||
80039be: f7ff ff27 bl 8003810 <TP_DrwaTrage>
|
||
if(r==0)
|
||
80039c2: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
80039c6: 2b00 cmp r3, #0
|
||
80039c8: d11e bne.n 8003a08 <TP_adjustment+0x140>
|
||
{
|
||
step+=1;
|
||
80039ca: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
80039ce: 3301 adds r3, #1
|
||
80039d0: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y1=y_adc;
|
||
80039d4: 887b ldrh r3, [r7, #2]
|
||
80039d6: f8a7 3082 strh.w r3, [r7, #130] ; 0x82
|
||
x1=x_adc;
|
||
80039da: 883b ldrh r3, [r7, #0]
|
||
80039dc: f8a7 307a strh.w r3, [r7, #122] ; 0x7a
|
||
sprintf(str,"point_1 x:%d y:%d",x1,y1);
|
||
80039e0: f8b7 207a ldrh.w r2, [r7, #122] ; 0x7a
|
||
80039e4: f8b7 3082 ldrh.w r3, [r7, #130] ; 0x82
|
||
80039e8: 1d38 adds r0, r7, #4
|
||
80039ea: 499e ldr r1, [pc, #632] ; (8003c64 <TP_adjustment+0x39c>)
|
||
80039ec: f001 f93e bl 8004c6c <siprintf>
|
||
LCD_ShowString(0,66,str,16,RED,RED);
|
||
80039f0: 1d3a adds r2, r7, #4
|
||
80039f2: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
80039f6: 9301 str r3, [sp, #4]
|
||
80039f8: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
80039fc: 9300 str r3, [sp, #0]
|
||
80039fe: 2310 movs r3, #16
|
||
8003a00: 2142 movs r1, #66 ; 0x42
|
||
8003a02: 2000 movs r0, #0
|
||
8003a04: f7ff fcd2 bl 80033ac <LCD_ShowString>
|
||
}
|
||
}
|
||
if(step==1)
|
||
8003a08: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003a0c: 2b01 cmp r3, #1
|
||
8003a0e: d10f bne.n 8003a30 <TP_adjustment+0x168>
|
||
{
|
||
if(TPEN==1)
|
||
8003a10: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8003a14: 4890 ldr r0, [pc, #576] ; (8003c58 <TP_adjustment+0x390>)
|
||
8003a16: f7fe f96d bl 8001cf4 <HAL_GPIO_ReadPin>
|
||
8003a1a: 4603 mov r3, r0
|
||
8003a1c: 2b01 cmp r3, #1
|
||
8003a1e: d107 bne.n 8003a30 <TP_adjustment+0x168>
|
||
{
|
||
step+=1;
|
||
8003a20: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003a24: 3301 adds r3, #1
|
||
8003a26: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8003a2a: 230a movs r3, #10
|
||
8003a2c: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
|
||
}
|
||
if(step==2)
|
||
8003a30: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003a34: 2b02 cmp r3, #2
|
||
8003a36: d12a bne.n 8003a8e <TP_adjustment+0x1c6>
|
||
{
|
||
TP_DrwaTrage(290,30,r);
|
||
8003a38: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8003a3c: 461a mov r2, r3
|
||
8003a3e: 211e movs r1, #30
|
||
8003a40: f44f 7091 mov.w r0, #290 ; 0x122
|
||
8003a44: f7ff fee4 bl 8003810 <TP_DrwaTrage>
|
||
if(r==0)
|
||
8003a48: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8003a4c: 2b00 cmp r3, #0
|
||
8003a4e: d11e bne.n 8003a8e <TP_adjustment+0x1c6>
|
||
{
|
||
step+=1;
|
||
8003a50: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003a54: 3301 adds r3, #1
|
||
8003a56: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y2=y_adc;
|
||
8003a5a: 887b ldrh r3, [r7, #2]
|
||
8003a5c: f8a7 3080 strh.w r3, [r7, #128] ; 0x80
|
||
x2=x_adc;
|
||
8003a60: 883b ldrh r3, [r7, #0]
|
||
8003a62: f8a7 3078 strh.w r3, [r7, #120] ; 0x78
|
||
sprintf(str,"point_2 x:%d y:%d",x2,y2);
|
||
8003a66: f8b7 2078 ldrh.w r2, [r7, #120] ; 0x78
|
||
8003a6a: f8b7 3080 ldrh.w r3, [r7, #128] ; 0x80
|
||
8003a6e: 1d38 adds r0, r7, #4
|
||
8003a70: 497d ldr r1, [pc, #500] ; (8003c68 <TP_adjustment+0x3a0>)
|
||
8003a72: f001 f8fb bl 8004c6c <siprintf>
|
||
LCD_ShowString(0,66+16,str,16,RED,RED);
|
||
8003a76: 1d3a adds r2, r7, #4
|
||
8003a78: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8003a7c: 9301 str r3, [sp, #4]
|
||
8003a7e: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8003a82: 9300 str r3, [sp, #0]
|
||
8003a84: 2310 movs r3, #16
|
||
8003a86: 2152 movs r1, #82 ; 0x52
|
||
8003a88: 2000 movs r0, #0
|
||
8003a8a: f7ff fc8f bl 80033ac <LCD_ShowString>
|
||
}
|
||
}
|
||
if(step==3)
|
||
8003a8e: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003a92: 2b03 cmp r3, #3
|
||
8003a94: d10f bne.n 8003ab6 <TP_adjustment+0x1ee>
|
||
{
|
||
if(TPEN==1)
|
||
8003a96: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8003a9a: 486f ldr r0, [pc, #444] ; (8003c58 <TP_adjustment+0x390>)
|
||
8003a9c: f7fe f92a bl 8001cf4 <HAL_GPIO_ReadPin>
|
||
8003aa0: 4603 mov r3, r0
|
||
8003aa2: 2b01 cmp r3, #1
|
||
8003aa4: d107 bne.n 8003ab6 <TP_adjustment+0x1ee>
|
||
{
|
||
step+=1;
|
||
8003aa6: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003aaa: 3301 adds r3, #1
|
||
8003aac: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8003ab0: 230a movs r3, #10
|
||
8003ab2: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
|
||
}
|
||
if(step==4)
|
||
8003ab6: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003aba: 2b04 cmp r3, #4
|
||
8003abc: d129 bne.n 8003b12 <TP_adjustment+0x24a>
|
||
{
|
||
TP_DrwaTrage(30,210,r);
|
||
8003abe: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8003ac2: 461a mov r2, r3
|
||
8003ac4: 21d2 movs r1, #210 ; 0xd2
|
||
8003ac6: 201e movs r0, #30
|
||
8003ac8: f7ff fea2 bl 8003810 <TP_DrwaTrage>
|
||
if(r==0)
|
||
8003acc: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8003ad0: 2b00 cmp r3, #0
|
||
8003ad2: d11e bne.n 8003b12 <TP_adjustment+0x24a>
|
||
{
|
||
step+=1;
|
||
8003ad4: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003ad8: 3301 adds r3, #1
|
||
8003ada: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y3=y_adc;
|
||
8003ade: 887b ldrh r3, [r7, #2]
|
||
8003ae0: f8a7 307e strh.w r3, [r7, #126] ; 0x7e
|
||
x3=x_adc;
|
||
8003ae4: 883b ldrh r3, [r7, #0]
|
||
8003ae6: f8a7 3076 strh.w r3, [r7, #118] ; 0x76
|
||
sprintf(str,"point_3 x:%d y:%d",x3,y3);
|
||
8003aea: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76
|
||
8003aee: f8b7 307e ldrh.w r3, [r7, #126] ; 0x7e
|
||
8003af2: 1d38 adds r0, r7, #4
|
||
8003af4: 495d ldr r1, [pc, #372] ; (8003c6c <TP_adjustment+0x3a4>)
|
||
8003af6: f001 f8b9 bl 8004c6c <siprintf>
|
||
LCD_ShowString(0,66+16+16,str,16,RED,RED);
|
||
8003afa: 1d3a adds r2, r7, #4
|
||
8003afc: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8003b00: 9301 str r3, [sp, #4]
|
||
8003b02: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8003b06: 9300 str r3, [sp, #0]
|
||
8003b08: 2310 movs r3, #16
|
||
8003b0a: 2162 movs r1, #98 ; 0x62
|
||
8003b0c: 2000 movs r0, #0
|
||
8003b0e: f7ff fc4d bl 80033ac <LCD_ShowString>
|
||
}
|
||
}
|
||
if(step==5)
|
||
8003b12: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003b16: 2b05 cmp r3, #5
|
||
8003b18: d10f bne.n 8003b3a <TP_adjustment+0x272>
|
||
{
|
||
if(TPEN==1)
|
||
8003b1a: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8003b1e: 484e ldr r0, [pc, #312] ; (8003c58 <TP_adjustment+0x390>)
|
||
8003b20: f7fe f8e8 bl 8001cf4 <HAL_GPIO_ReadPin>
|
||
8003b24: 4603 mov r3, r0
|
||
8003b26: 2b01 cmp r3, #1
|
||
8003b28: d107 bne.n 8003b3a <TP_adjustment+0x272>
|
||
{
|
||
step+=1;
|
||
8003b2a: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003b2e: 3301 adds r3, #1
|
||
8003b30: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8003b34: 230a movs r3, #10
|
||
8003b36: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
|
||
}
|
||
if(step==6)
|
||
8003b3a: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003b3e: 2b06 cmp r3, #6
|
||
8003b40: d12a bne.n 8003b98 <TP_adjustment+0x2d0>
|
||
{
|
||
TP_DrwaTrage(290,210,r);
|
||
8003b42: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8003b46: 461a mov r2, r3
|
||
8003b48: 21d2 movs r1, #210 ; 0xd2
|
||
8003b4a: f44f 7091 mov.w r0, #290 ; 0x122
|
||
8003b4e: f7ff fe5f bl 8003810 <TP_DrwaTrage>
|
||
if(r==0)
|
||
8003b52: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8003b56: 2b00 cmp r3, #0
|
||
8003b58: d11e bne.n 8003b98 <TP_adjustment+0x2d0>
|
||
{
|
||
step+=1;
|
||
8003b5a: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003b5e: 3301 adds r3, #1
|
||
8003b60: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y4=y_adc;
|
||
8003b64: 887b ldrh r3, [r7, #2]
|
||
8003b66: f8a7 307c strh.w r3, [r7, #124] ; 0x7c
|
||
x4=x_adc;
|
||
8003b6a: 883b ldrh r3, [r7, #0]
|
||
8003b6c: f8a7 3074 strh.w r3, [r7, #116] ; 0x74
|
||
sprintf(str,"point_4 x:%d y:%d",x4,y4);
|
||
8003b70: f8b7 2074 ldrh.w r2, [r7, #116] ; 0x74
|
||
8003b74: f8b7 307c ldrh.w r3, [r7, #124] ; 0x7c
|
||
8003b78: 1d38 adds r0, r7, #4
|
||
8003b7a: 493d ldr r1, [pc, #244] ; (8003c70 <TP_adjustment+0x3a8>)
|
||
8003b7c: f001 f876 bl 8004c6c <siprintf>
|
||
LCD_ShowString(0,66+16+16+16,str,16,RED,RED);
|
||
8003b80: 1d3a adds r2, r7, #4
|
||
8003b82: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8003b86: 9301 str r3, [sp, #4]
|
||
8003b88: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8003b8c: 9300 str r3, [sp, #0]
|
||
8003b8e: 2310 movs r3, #16
|
||
8003b90: 2172 movs r1, #114 ; 0x72
|
||
8003b92: 2000 movs r0, #0
|
||
8003b94: f7ff fc0a bl 80033ac <LCD_ShowString>
|
||
}
|
||
}
|
||
if(step==7)
|
||
8003b98: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003b9c: 2b07 cmp r3, #7
|
||
8003b9e: d10f bne.n 8003bc0 <TP_adjustment+0x2f8>
|
||
{
|
||
if(TPEN==1)
|
||
8003ba0: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8003ba4: 482c ldr r0, [pc, #176] ; (8003c58 <TP_adjustment+0x390>)
|
||
8003ba6: f7fe f8a5 bl 8001cf4 <HAL_GPIO_ReadPin>
|
||
8003baa: 4603 mov r3, r0
|
||
8003bac: 2b01 cmp r3, #1
|
||
8003bae: d107 bne.n 8003bc0 <TP_adjustment+0x2f8>
|
||
{
|
||
step+=1;
|
||
8003bb0: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003bb4: 3301 adds r3, #1
|
||
8003bb6: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8003bba: 230a movs r3, #10
|
||
8003bbc: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
}
|
||
if(step==8)
|
||
8003bc0: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8003bc4: 2b08 cmp r3, #8
|
||
8003bc6: f040 8112 bne.w 8003dee <TP_adjustment+0x526>
|
||
{
|
||
xd=((x1+x3)/2);
|
||
8003bca: f8b7 207a ldrh.w r2, [r7, #122] ; 0x7a
|
||
8003bce: f8b7 3076 ldrh.w r3, [r7, #118] ; 0x76
|
||
8003bd2: 4413 add r3, r2
|
||
8003bd4: 0fda lsrs r2, r3, #31
|
||
8003bd6: 4413 add r3, r2
|
||
8003bd8: 105b asrs r3, r3, #1
|
||
8003bda: 66bb str r3, [r7, #104] ; 0x68
|
||
xl=((x2+x4)/2);
|
||
8003bdc: f8b7 2078 ldrh.w r2, [r7, #120] ; 0x78
|
||
8003be0: f8b7 3074 ldrh.w r3, [r7, #116] ; 0x74
|
||
8003be4: 4413 add r3, r2
|
||
8003be6: 0fda lsrs r2, r3, #31
|
||
8003be8: 4413 add r3, r2
|
||
8003bea: 105b asrs r3, r3, #1
|
||
8003bec: 667b str r3, [r7, #100] ; 0x64
|
||
yd=((y1+y2)/2);
|
||
8003bee: f8b7 2082 ldrh.w r2, [r7, #130] ; 0x82
|
||
8003bf2: f8b7 3080 ldrh.w r3, [r7, #128] ; 0x80
|
||
8003bf6: 4413 add r3, r2
|
||
8003bf8: 0fda lsrs r2, r3, #31
|
||
8003bfa: 4413 add r3, r2
|
||
8003bfc: 105b asrs r3, r3, #1
|
||
8003bfe: 663b str r3, [r7, #96] ; 0x60
|
||
yl=((y3+y4)/2);
|
||
8003c00: f8b7 207e ldrh.w r2, [r7, #126] ; 0x7e
|
||
8003c04: f8b7 307c ldrh.w r3, [r7, #124] ; 0x7c
|
||
8003c08: 4413 add r3, r2
|
||
8003c0a: 0fda lsrs r2, r3, #31
|
||
8003c0c: 4413 add r3, r2
|
||
8003c0e: 105b asrs r3, r3, #1
|
||
8003c10: 65fb str r3, [r7, #92] ; 0x5c
|
||
x5=xl-xd;
|
||
8003c12: 6e7a ldr r2, [r7, #100] ; 0x64
|
||
8003c14: 6ebb ldr r3, [r7, #104] ; 0x68
|
||
8003c16: 1ad3 subs r3, r2, r3
|
||
8003c18: 65bb str r3, [r7, #88] ; 0x58
|
||
y5=yl-yd;
|
||
8003c1a: 6dfa ldr r2, [r7, #92] ; 0x5c
|
||
8003c1c: 6e3b ldr r3, [r7, #96] ; 0x60
|
||
8003c1e: 1ad3 subs r3, r2, r3
|
||
8003c20: 657b str r3, [r7, #84] ; 0x54
|
||
if(x5<0||y5<0)
|
||
8003c22: 6dbb ldr r3, [r7, #88] ; 0x58
|
||
8003c24: 2b00 cmp r3, #0
|
||
8003c26: db02 blt.n 8003c2e <TP_adjustment+0x366>
|
||
8003c28: 6d7b ldr r3, [r7, #84] ; 0x54
|
||
8003c2a: 2b00 cmp r3, #0
|
||
8003c2c: da24 bge.n 8003c78 <TP_adjustment+0x3b0>
|
||
{
|
||
sprintf(str,"ERROR");
|
||
8003c2e: 1d3b adds r3, r7, #4
|
||
8003c30: 4910 ldr r1, [pc, #64] ; (8003c74 <TP_adjustment+0x3ac>)
|
||
8003c32: 4618 mov r0, r3
|
||
8003c34: f001 f81a bl 8004c6c <siprintf>
|
||
LCD_ShowString(0,66+16+16+16+16,str,16,RED, GRAY);
|
||
8003c38: 1d3a adds r2, r7, #4
|
||
8003c3a: f248 4330 movw r3, #33840 ; 0x8430
|
||
8003c3e: 9301 str r3, [sp, #4]
|
||
8003c40: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8003c44: 9300 str r3, [sp, #0]
|
||
8003c46: 2310 movs r3, #16
|
||
8003c48: 2182 movs r1, #130 ; 0x82
|
||
8003c4a: 2000 movs r0, #0
|
||
8003c4c: f7ff fbae bl 80033ac <LCD_ShowString>
|
||
{
|
||
8003c50: e0c8 b.n 8003de4 <TP_adjustment+0x51c>
|
||
8003c52: bf00 nop
|
||
8003c54: 08006f88 .word 0x08006f88
|
||
8003c58: 40011c00 .word 0x40011c00
|
||
8003c5c: 08006fa4 .word 0x08006fa4
|
||
8003c60: 08006fb0 .word 0x08006fb0
|
||
8003c64: 08006fbc .word 0x08006fbc
|
||
8003c68: 08006fd0 .word 0x08006fd0
|
||
8003c6c: 08006fe4 .word 0x08006fe4
|
||
8003c70: 08006ff8 .word 0x08006ff8
|
||
8003c74: 0800700c .word 0x0800700c
|
||
}else
|
||
{
|
||
acc_x=x5/260.0;
|
||
8003c78: 6db8 ldr r0, [r7, #88] ; 0x58
|
||
8003c7a: f7fc fc2f bl 80004dc <__aeabi_i2d>
|
||
8003c7e: f04f 0200 mov.w r2, #0
|
||
8003c82: 4b60 ldr r3, [pc, #384] ; (8003e04 <TP_adjustment+0x53c>)
|
||
8003c84: f7fc fdbe bl 8000804 <__aeabi_ddiv>
|
||
8003c88: 4602 mov r2, r0
|
||
8003c8a: 460b mov r3, r1
|
||
8003c8c: 4610 mov r0, r2
|
||
8003c8e: 4619 mov r1, r3
|
||
8003c90: f7fc ff66 bl 8000b60 <__aeabi_d2f>
|
||
8003c94: 4603 mov r3, r0
|
||
8003c96: 653b str r3, [r7, #80] ; 0x50
|
||
acc_y=y5/180.0;
|
||
8003c98: 6d78 ldr r0, [r7, #84] ; 0x54
|
||
8003c9a: f7fc fc1f bl 80004dc <__aeabi_i2d>
|
||
8003c9e: f04f 0200 mov.w r2, #0
|
||
8003ca2: 4b59 ldr r3, [pc, #356] ; (8003e08 <TP_adjustment+0x540>)
|
||
8003ca4: f7fc fdae bl 8000804 <__aeabi_ddiv>
|
||
8003ca8: 4602 mov r2, r0
|
||
8003caa: 460b mov r3, r1
|
||
8003cac: 4610 mov r0, r2
|
||
8003cae: 4619 mov r1, r3
|
||
8003cb0: f7fc ff56 bl 8000b60 <__aeabi_d2f>
|
||
8003cb4: 4603 mov r3, r0
|
||
8003cb6: 64fb str r3, [r7, #76] ; 0x4c
|
||
|
||
offset_x=(((xd/acc_x)-30)+((xl/acc_x)-290))/2;
|
||
8003cb8: 6eb8 ldr r0, [r7, #104] ; 0x68
|
||
8003cba: f7fd f85b bl 8000d74 <__aeabi_i2f>
|
||
8003cbe: 4603 mov r3, r0
|
||
8003cc0: 6d39 ldr r1, [r7, #80] ; 0x50
|
||
8003cc2: 4618 mov r0, r3
|
||
8003cc4: f7fd f95e bl 8000f84 <__aeabi_fdiv>
|
||
8003cc8: 4603 mov r3, r0
|
||
8003cca: 4950 ldr r1, [pc, #320] ; (8003e0c <TP_adjustment+0x544>)
|
||
8003ccc: 4618 mov r0, r3
|
||
8003cce: f7fc ff9b bl 8000c08 <__aeabi_fsub>
|
||
8003cd2: 4603 mov r3, r0
|
||
8003cd4: 461c mov r4, r3
|
||
8003cd6: 6e78 ldr r0, [r7, #100] ; 0x64
|
||
8003cd8: f7fd f84c bl 8000d74 <__aeabi_i2f>
|
||
8003cdc: 4603 mov r3, r0
|
||
8003cde: 6d39 ldr r1, [r7, #80] ; 0x50
|
||
8003ce0: 4618 mov r0, r3
|
||
8003ce2: f7fd f94f bl 8000f84 <__aeabi_fdiv>
|
||
8003ce6: 4603 mov r3, r0
|
||
8003ce8: 4949 ldr r1, [pc, #292] ; (8003e10 <TP_adjustment+0x548>)
|
||
8003cea: 4618 mov r0, r3
|
||
8003cec: f7fc ff8c bl 8000c08 <__aeabi_fsub>
|
||
8003cf0: 4603 mov r3, r0
|
||
8003cf2: 4619 mov r1, r3
|
||
8003cf4: 4620 mov r0, r4
|
||
8003cf6: f7fc ff89 bl 8000c0c <__addsf3>
|
||
8003cfa: 4603 mov r3, r0
|
||
8003cfc: f04f 4180 mov.w r1, #1073741824 ; 0x40000000
|
||
8003d00: 4618 mov r0, r3
|
||
8003d02: f7fd f93f bl 8000f84 <__aeabi_fdiv>
|
||
8003d06: 4603 mov r3, r0
|
||
8003d08: 4618 mov r0, r3
|
||
8003d0a: f7fd f9d7 bl 80010bc <__aeabi_f2iz>
|
||
8003d0e: 4603 mov r3, r0
|
||
8003d10: 64bb str r3, [r7, #72] ; 0x48
|
||
offset_y=(((yd/acc_y)-30)+((yl/acc_y)-210))/2;
|
||
8003d12: 6e38 ldr r0, [r7, #96] ; 0x60
|
||
8003d14: f7fd f82e bl 8000d74 <__aeabi_i2f>
|
||
8003d18: 4603 mov r3, r0
|
||
8003d1a: 6cf9 ldr r1, [r7, #76] ; 0x4c
|
||
8003d1c: 4618 mov r0, r3
|
||
8003d1e: f7fd f931 bl 8000f84 <__aeabi_fdiv>
|
||
8003d22: 4603 mov r3, r0
|
||
8003d24: 4939 ldr r1, [pc, #228] ; (8003e0c <TP_adjustment+0x544>)
|
||
8003d26: 4618 mov r0, r3
|
||
8003d28: f7fc ff6e bl 8000c08 <__aeabi_fsub>
|
||
8003d2c: 4603 mov r3, r0
|
||
8003d2e: 461c mov r4, r3
|
||
8003d30: 6df8 ldr r0, [r7, #92] ; 0x5c
|
||
8003d32: f7fd f81f bl 8000d74 <__aeabi_i2f>
|
||
8003d36: 4603 mov r3, r0
|
||
8003d38: 6cf9 ldr r1, [r7, #76] ; 0x4c
|
||
8003d3a: 4618 mov r0, r3
|
||
8003d3c: f7fd f922 bl 8000f84 <__aeabi_fdiv>
|
||
8003d40: 4603 mov r3, r0
|
||
8003d42: 4934 ldr r1, [pc, #208] ; (8003e14 <TP_adjustment+0x54c>)
|
||
8003d44: 4618 mov r0, r3
|
||
8003d46: f7fc ff5f bl 8000c08 <__aeabi_fsub>
|
||
8003d4a: 4603 mov r3, r0
|
||
8003d4c: 4619 mov r1, r3
|
||
8003d4e: 4620 mov r0, r4
|
||
8003d50: f7fc ff5c bl 8000c0c <__addsf3>
|
||
8003d54: 4603 mov r3, r0
|
||
8003d56: f04f 4180 mov.w r1, #1073741824 ; 0x40000000
|
||
8003d5a: 4618 mov r0, r3
|
||
8003d5c: f7fd f912 bl 8000f84 <__aeabi_fdiv>
|
||
8003d60: 4603 mov r3, r0
|
||
8003d62: 4618 mov r0, r3
|
||
8003d64: f7fd f9aa bl 80010bc <__aeabi_f2iz>
|
||
8003d68: 4603 mov r3, r0
|
||
8003d6a: 647b str r3, [r7, #68] ; 0x44
|
||
|
||
tconfig.x_acc=acc_x;
|
||
8003d6c: 4a2a ldr r2, [pc, #168] ; (8003e18 <TP_adjustment+0x550>)
|
||
8003d6e: 6d3b ldr r3, [r7, #80] ; 0x50
|
||
8003d70: 6053 str r3, [r2, #4]
|
||
tconfig.x_offset=offset_x;
|
||
8003d72: 4a29 ldr r2, [pc, #164] ; (8003e18 <TP_adjustment+0x550>)
|
||
8003d74: 6cbb ldr r3, [r7, #72] ; 0x48
|
||
8003d76: 60d3 str r3, [r2, #12]
|
||
tconfig.y_acc=acc_y;
|
||
8003d78: 4a27 ldr r2, [pc, #156] ; (8003e18 <TP_adjustment+0x550>)
|
||
8003d7a: 6cfb ldr r3, [r7, #76] ; 0x4c
|
||
8003d7c: 6093 str r3, [r2, #8]
|
||
tconfig.y_offset=offset_y;
|
||
8003d7e: 4a26 ldr r2, [pc, #152] ; (8003e18 <TP_adjustment+0x550>)
|
||
8003d80: 6c7b ldr r3, [r7, #68] ; 0x44
|
||
8003d82: 6113 str r3, [r2, #16]
|
||
|
||
sprintf(str,"x_acc=%f y_acc=%f",acc_x,acc_y);
|
||
8003d84: 6d38 ldr r0, [r7, #80] ; 0x50
|
||
8003d86: f7fc fbbb bl 8000500 <__aeabi_f2d>
|
||
8003d8a: 4604 mov r4, r0
|
||
8003d8c: 460d mov r5, r1
|
||
8003d8e: 6cf8 ldr r0, [r7, #76] ; 0x4c
|
||
8003d90: f7fc fbb6 bl 8000500 <__aeabi_f2d>
|
||
8003d94: 4602 mov r2, r0
|
||
8003d96: 460b mov r3, r1
|
||
8003d98: 1d38 adds r0, r7, #4
|
||
8003d9a: e9cd 2300 strd r2, r3, [sp]
|
||
8003d9e: 4622 mov r2, r4
|
||
8003da0: 462b mov r3, r5
|
||
8003da2: 491e ldr r1, [pc, #120] ; (8003e1c <TP_adjustment+0x554>)
|
||
8003da4: f000 ff62 bl 8004c6c <siprintf>
|
||
LCD_ShowString(0,66+16+16+16+16,str,16,RED,RED);
|
||
8003da8: 1d3a adds r2, r7, #4
|
||
8003daa: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8003dae: 9301 str r3, [sp, #4]
|
||
8003db0: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8003db4: 9300 str r3, [sp, #0]
|
||
8003db6: 2310 movs r3, #16
|
||
8003db8: 2182 movs r1, #130 ; 0x82
|
||
8003dba: 2000 movs r0, #0
|
||
8003dbc: f7ff faf6 bl 80033ac <LCD_ShowString>
|
||
sprintf(str,"x_offset=%d y_offset=%d",offset_x,offset_y);
|
||
8003dc0: 1d38 adds r0, r7, #4
|
||
8003dc2: 6c7b ldr r3, [r7, #68] ; 0x44
|
||
8003dc4: 6cba ldr r2, [r7, #72] ; 0x48
|
||
8003dc6: 4916 ldr r1, [pc, #88] ; (8003e20 <TP_adjustment+0x558>)
|
||
8003dc8: f000 ff50 bl 8004c6c <siprintf>
|
||
LCD_ShowString(0,66+16+16+16+16+16,str,16,RED,RED);
|
||
8003dcc: 1d3a adds r2, r7, #4
|
||
8003dce: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8003dd2: 9301 str r3, [sp, #4]
|
||
8003dd4: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8003dd8: 9300 str r3, [sp, #0]
|
||
8003dda: 2310 movs r3, #16
|
||
8003ddc: 2192 movs r1, #146 ; 0x92
|
||
8003dde: 2000 movs r0, #0
|
||
8003de0: f7ff fae4 bl 80033ac <LCD_ShowString>
|
||
|
||
}
|
||
|
||
HAL_Delay(1000);
|
||
8003de4: f44f 707a mov.w r0, #1000 ; 0x3e8
|
||
8003de8: f7fd fce8 bl 80017bc <HAL_Delay>
|
||
8003dec: e006 b.n 8003dfc <TP_adjustment+0x534>
|
||
while(HAL_GetTick()<wait)
|
||
8003dee: f7fd fcdb bl 80017a8 <HAL_GetTick>
|
||
8003df2: 4602 mov r2, r0
|
||
8003df4: 6f3b ldr r3, [r7, #112] ; 0x70
|
||
8003df6: 4293 cmp r3, r2
|
||
8003df8: f63f ad89 bhi.w 800390e <TP_adjustment+0x46>
|
||
return;
|
||
|
||
}
|
||
}
|
||
|
||
}
|
||
8003dfc: 3788 adds r7, #136 ; 0x88
|
||
8003dfe: 46bd mov sp, r7
|
||
8003e00: bdb0 pop {r4, r5, r7, pc}
|
||
8003e02: bf00 nop
|
||
8003e04: 40704000 .word 0x40704000
|
||
8003e08: 40668000 .word 0x40668000
|
||
8003e0c: 41f00000 .word 0x41f00000
|
||
8003e10: 43910000 .word 0x43910000
|
||
8003e14: 43520000 .word 0x43520000
|
||
8003e18: 20000260 .word 0x20000260
|
||
8003e1c: 08007014 .word 0x08007014
|
||
8003e20: 08007028 .word 0x08007028
|
||
|
||
08003e24 <main_app>:
|
||
extern touch_device t0;
|
||
|
||
task run_loop;//��ѭ��״̬��
|
||
|
||
void main_app()
|
||
{
|
||
8003e24: b580 push {r7, lr}
|
||
8003e26: b086 sub sp, #24
|
||
8003e28: af04 add r7, sp, #16
|
||
LCDx_Init();
|
||
8003e2a: f7fe ff1b bl 8002c64 <LCDx_Init>
|
||
TP_adjustment();
|
||
8003e2e: f7ff fd4b bl 80038c8 <TP_adjustment>
|
||
|
||
UI *ui=UI_Init(BLACK);
|
||
8003e32: 2000 movs r0, #0
|
||
8003e34: f000 f884 bl 8003f40 <UI_Init>
|
||
8003e38: 6078 str r0, [r7, #4]
|
||
|
||
New_Window(ui,10,10,100,100,WHITE,"WHITE");
|
||
8003e3a: 4b27 ldr r3, [pc, #156] ; (8003ed8 <main_app+0xb4>)
|
||
8003e3c: 9302 str r3, [sp, #8]
|
||
8003e3e: f64f 73ff movw r3, #65535 ; 0xffff
|
||
8003e42: 9301 str r3, [sp, #4]
|
||
8003e44: 2364 movs r3, #100 ; 0x64
|
||
8003e46: 9300 str r3, [sp, #0]
|
||
8003e48: 2364 movs r3, #100 ; 0x64
|
||
8003e4a: 220a movs r2, #10
|
||
8003e4c: 210a movs r1, #10
|
||
8003e4e: 6878 ldr r0, [r7, #4]
|
||
8003e50: f000 f895 bl 8003f7e <New_Window>
|
||
New_Window(ui,25,30,150,100,GREEN,"GREEN");
|
||
8003e54: 4b21 ldr r3, [pc, #132] ; (8003edc <main_app+0xb8>)
|
||
8003e56: 9302 str r3, [sp, #8]
|
||
8003e58: f44f 63fc mov.w r3, #2016 ; 0x7e0
|
||
8003e5c: 9301 str r3, [sp, #4]
|
||
8003e5e: 2364 movs r3, #100 ; 0x64
|
||
8003e60: 9300 str r3, [sp, #0]
|
||
8003e62: 2396 movs r3, #150 ; 0x96
|
||
8003e64: 221e movs r2, #30
|
||
8003e66: 2119 movs r1, #25
|
||
8003e68: 6878 ldr r0, [r7, #4]
|
||
8003e6a: f000 f888 bl 8003f7e <New_Window>
|
||
New_Window(ui,80,80,60,90,YELLOW,"YELLOW");
|
||
8003e6e: 4b1c ldr r3, [pc, #112] ; (8003ee0 <main_app+0xbc>)
|
||
8003e70: 9302 str r3, [sp, #8]
|
||
8003e72: f64f 73e0 movw r3, #65504 ; 0xffe0
|
||
8003e76: 9301 str r3, [sp, #4]
|
||
8003e78: 235a movs r3, #90 ; 0x5a
|
||
8003e7a: 9300 str r3, [sp, #0]
|
||
8003e7c: 233c movs r3, #60 ; 0x3c
|
||
8003e7e: 2250 movs r2, #80 ; 0x50
|
||
8003e80: 2150 movs r1, #80 ; 0x50
|
||
8003e82: 6878 ldr r0, [r7, #4]
|
||
8003e84: f000 f87b bl 8003f7e <New_Window>
|
||
New_Window(ui,120,90,70,60,MAGENTA,"MAGENTA");
|
||
8003e88: 4b16 ldr r3, [pc, #88] ; (8003ee4 <main_app+0xc0>)
|
||
8003e8a: 9302 str r3, [sp, #8]
|
||
8003e8c: f64f 031f movw r3, #63519 ; 0xf81f
|
||
8003e90: 9301 str r3, [sp, #4]
|
||
8003e92: 233c movs r3, #60 ; 0x3c
|
||
8003e94: 9300 str r3, [sp, #0]
|
||
8003e96: 2346 movs r3, #70 ; 0x46
|
||
8003e98: 225a movs r2, #90 ; 0x5a
|
||
8003e9a: 2178 movs r1, #120 ; 0x78
|
||
8003e9c: 6878 ldr r0, [r7, #4]
|
||
8003e9e: f000 f86e bl 8003f7e <New_Window>
|
||
|
||
ui->refresh_ui_flag=1;
|
||
8003ea2: 687b ldr r3, [r7, #4]
|
||
8003ea4: 2201 movs r2, #1
|
||
8003ea6: 731a strb r2, [r3, #12]
|
||
|
||
while(1)
|
||
{
|
||
LCD_set_dot(t0.pix_x, t0.pix_y, RED);
|
||
8003ea8: 4b0f ldr r3, [pc, #60] ; (8003ee8 <main_app+0xc4>)
|
||
8003eaa: 685b ldr r3, [r3, #4]
|
||
8003eac: b29b uxth r3, r3
|
||
8003eae: 4a0e ldr r2, [pc, #56] ; (8003ee8 <main_app+0xc4>)
|
||
8003eb0: 6892 ldr r2, [r2, #8]
|
||
8003eb2: b291 uxth r1, r2
|
||
8003eb4: f44f 4278 mov.w r2, #63488 ; 0xf800
|
||
8003eb8: 4618 mov r0, r3
|
||
8003eba: f7ff f859 bl 8002f70 <LCD_set_dot>
|
||
{
|
||
|
||
|
||
}
|
||
*/
|
||
if(ui->refresh_ui_flag==1)
|
||
8003ebe: 687b ldr r3, [r7, #4]
|
||
8003ec0: 7b1b ldrb r3, [r3, #12]
|
||
8003ec2: 2b01 cmp r3, #1
|
||
8003ec4: d105 bne.n 8003ed2 <main_app+0xae>
|
||
{
|
||
ui->refresh_ui_flag=0;
|
||
8003ec6: 687b ldr r3, [r7, #4]
|
||
8003ec8: 2200 movs r2, #0
|
||
8003eca: 731a strb r2, [r3, #12]
|
||
Refresh_UI(ui);
|
||
8003ecc: 6878 ldr r0, [r7, #4]
|
||
8003ece: f000 f8bf bl 8004050 <Refresh_UI>
|
||
|
||
}
|
||
TP_Server();
|
||
8003ed2: f7ff fc47 bl 8003764 <TP_Server>
|
||
LCD_set_dot(t0.pix_x, t0.pix_y, RED);
|
||
8003ed6: e7e7 b.n 8003ea8 <main_app+0x84>
|
||
8003ed8: 08007040 .word 0x08007040
|
||
8003edc: 08007048 .word 0x08007048
|
||
8003ee0: 08007050 .word 0x08007050
|
||
8003ee4: 08007058 .word 0x08007058
|
||
8003ee8: 20000278 .word 0x20000278
|
||
|
||
08003eec <Inteface_SetCursor>:
|
||
*/
|
||
|
||
#include "windows.h"
|
||
|
||
void Inteface_SetCursor(uint16_t Xpos, uint16_t Ypos)
|
||
{
|
||
8003eec: b580 push {r7, lr}
|
||
8003eee: b082 sub sp, #8
|
||
8003ef0: af00 add r7, sp, #0
|
||
8003ef2: 4603 mov r3, r0
|
||
8003ef4: 460a mov r2, r1
|
||
8003ef6: 80fb strh r3, [r7, #6]
|
||
8003ef8: 4613 mov r3, r2
|
||
8003efa: 80bb strh r3, [r7, #4]
|
||
LCD_SetCursor(Xpos,Ypos); //���ù���λ��
|
||
8003efc: 88ba ldrh r2, [r7, #4]
|
||
8003efe: 88fb ldrh r3, [r7, #6]
|
||
8003f00: 4611 mov r1, r2
|
||
8003f02: 4618 mov r0, r3
|
||
8003f04: f7fe ffa4 bl 8002e50 <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
8003f08: 4b04 ldr r3, [pc, #16] ; (8003f1c <Inteface_SetCursor+0x30>)
|
||
8003f0a: 79da ldrb r2, [r3, #7]
|
||
8003f0c: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
8003f10: b292 uxth r2, r2
|
||
8003f12: 801a strh r2, [r3, #0]
|
||
}
|
||
8003f14: bf00 nop
|
||
8003f16: 3708 adds r7, #8
|
||
8003f18: 46bd mov sp, r7
|
||
8003f1a: bd80 pop {r7, pc}
|
||
8003f1c: 20000254 .word 0x20000254
|
||
|
||
08003f20 <Inteface_SetColor>:
|
||
void Inteface_SetColor(uint16_t color)
|
||
{
|
||
8003f20: b480 push {r7}
|
||
8003f22: b083 sub sp, #12
|
||
8003f24: af00 add r7, sp, #0
|
||
8003f26: 4603 mov r3, r0
|
||
8003f28: 80fb strh r3, [r7, #6]
|
||
LCD_DATA_ADDRESS=color;
|
||
8003f2a: 4a04 ldr r2, [pc, #16] ; (8003f3c <Inteface_SetColor+0x1c>)
|
||
8003f2c: 88fb ldrh r3, [r7, #6]
|
||
8003f2e: 8013 strh r3, [r2, #0]
|
||
}
|
||
8003f30: bf00 nop
|
||
8003f32: 370c adds r7, #12
|
||
8003f34: 46bd mov sp, r7
|
||
8003f36: bc80 pop {r7}
|
||
8003f38: 4770 bx lr
|
||
8003f3a: bf00 nop
|
||
8003f3c: 6c000800 .word 0x6c000800
|
||
|
||
08003f40 <UI_Init>:
|
||
|
||
UI *UI_Init(COLOR_16 background)
|
||
{
|
||
8003f40: b580 push {r7, lr}
|
||
8003f42: b084 sub sp, #16
|
||
8003f44: af00 add r7, sp, #0
|
||
8003f46: 6078 str r0, [r7, #4]
|
||
UI *ui;
|
||
ui = (UI*)malloc(sizeof(UI));
|
||
8003f48: 2010 movs r0, #16
|
||
8003f4a: f000 f969 bl 8004220 <malloc>
|
||
8003f4e: 4603 mov r3, r0
|
||
8003f50: 60fb str r3, [r7, #12]
|
||
if(ui!=NULL)
|
||
8003f52: 68fb ldr r3, [r7, #12]
|
||
8003f54: 2b00 cmp r3, #0
|
||
8003f56: d00d beq.n 8003f74 <UI_Init+0x34>
|
||
{
|
||
ui->background=background;
|
||
8003f58: 68fb ldr r3, [r7, #12]
|
||
8003f5a: 687a ldr r2, [r7, #4]
|
||
8003f5c: 601a str r2, [r3, #0]
|
||
ui->windows=NULL;
|
||
8003f5e: 68fb ldr r3, [r7, #12]
|
||
8003f60: 2200 movs r2, #0
|
||
8003f62: 605a str r2, [r3, #4]
|
||
ui->last_windows=NULL;
|
||
8003f64: 68fb ldr r3, [r7, #12]
|
||
8003f66: 2200 movs r2, #0
|
||
8003f68: 609a str r2, [r3, #8]
|
||
ui->refresh_ui_flag=1;
|
||
8003f6a: 68fb ldr r3, [r7, #12]
|
||
8003f6c: 2201 movs r2, #1
|
||
8003f6e: 731a strb r2, [r3, #12]
|
||
ui->touch->acc_y=0;
|
||
|
||
}
|
||
*/
|
||
|
||
return ui;
|
||
8003f70: 68fb ldr r3, [r7, #12]
|
||
8003f72: e000 b.n 8003f76 <UI_Init+0x36>
|
||
}
|
||
return NULL;
|
||
8003f74: 2300 movs r3, #0
|
||
|
||
}
|
||
8003f76: 4618 mov r0, r3
|
||
8003f78: 3710 adds r7, #16
|
||
8003f7a: 46bd mov sp, r7
|
||
8003f7c: bd80 pop {r7, pc}
|
||
|
||
08003f7e <New_Window>:
|
||
|
||
window *New_Window(UI *ui,uint16_t x,uint16_t y,uint16_t width,uint16_t high,COLOR_16 background,const char *title)
|
||
{
|
||
8003f7e: b580 push {r7, lr}
|
||
8003f80: b088 sub sp, #32
|
||
8003f82: af00 add r7, sp, #0
|
||
8003f84: 60f8 str r0, [r7, #12]
|
||
8003f86: 4608 mov r0, r1
|
||
8003f88: 4611 mov r1, r2
|
||
8003f8a: 461a mov r2, r3
|
||
8003f8c: 4603 mov r3, r0
|
||
8003f8e: 817b strh r3, [r7, #10]
|
||
8003f90: 460b mov r3, r1
|
||
8003f92: 813b strh r3, [r7, #8]
|
||
8003f94: 4613 mov r3, r2
|
||
8003f96: 80fb strh r3, [r7, #6]
|
||
window *temp_window;
|
||
temp_window = (window*)malloc(sizeof(window));
|
||
8003f98: 201c movs r0, #28
|
||
8003f9a: f000 f941 bl 8004220 <malloc>
|
||
8003f9e: 4603 mov r3, r0
|
||
8003fa0: 617b str r3, [r7, #20]
|
||
if(temp_window!=NULL)
|
||
8003fa2: 697b ldr r3, [r7, #20]
|
||
8003fa4: 2b00 cmp r3, #0
|
||
8003fa6: d022 beq.n 8003fee <New_Window+0x70>
|
||
{
|
||
temp_window->background=background;
|
||
8003fa8: 697b ldr r3, [r7, #20]
|
||
8003faa: 6afa ldr r2, [r7, #44] ; 0x2c
|
||
8003fac: 609a str r2, [r3, #8]
|
||
temp_window->high=high;
|
||
8003fae: 697b ldr r3, [r7, #20]
|
||
8003fb0: 8d3a ldrh r2, [r7, #40] ; 0x28
|
||
8003fb2: 80da strh r2, [r3, #6]
|
||
temp_window->width=width;
|
||
8003fb4: 697b ldr r3, [r7, #20]
|
||
8003fb6: 88fa ldrh r2, [r7, #6]
|
||
8003fb8: 809a strh r2, [r3, #4]
|
||
temp_window->x=x;
|
||
8003fba: 697b ldr r3, [r7, #20]
|
||
8003fbc: 897a ldrh r2, [r7, #10]
|
||
8003fbe: 801a strh r2, [r3, #0]
|
||
temp_window->y=y;
|
||
8003fc0: 697b ldr r3, [r7, #20]
|
||
8003fc2: 893a ldrh r2, [r7, #8]
|
||
8003fc4: 805a strh r2, [r3, #2]
|
||
for(int a=0;a<16;a++)
|
||
8003fc6: 2300 movs r3, #0
|
||
8003fc8: 61fb str r3, [r7, #28]
|
||
8003fca: e00c b.n 8003fe6 <New_Window+0x68>
|
||
{
|
||
temp_window->title[a]=title[a];
|
||
8003fcc: 69fb ldr r3, [r7, #28]
|
||
8003fce: 6b3a ldr r2, [r7, #48] ; 0x30
|
||
8003fd0: 4413 add r3, r2
|
||
8003fd2: 7819 ldrb r1, [r3, #0]
|
||
8003fd4: 697a ldr r2, [r7, #20]
|
||
8003fd6: 69fb ldr r3, [r7, #28]
|
||
8003fd8: 4413 add r3, r2
|
||
8003fda: 330c adds r3, #12
|
||
8003fdc: 460a mov r2, r1
|
||
8003fde: 701a strb r2, [r3, #0]
|
||
for(int a=0;a<16;a++)
|
||
8003fe0: 69fb ldr r3, [r7, #28]
|
||
8003fe2: 3301 adds r3, #1
|
||
8003fe4: 61fb str r3, [r7, #28]
|
||
8003fe6: 69fb ldr r3, [r7, #28]
|
||
8003fe8: 2b0f cmp r3, #15
|
||
8003fea: ddef ble.n 8003fcc <New_Window+0x4e>
|
||
8003fec: e001 b.n 8003ff2 <New_Window+0x74>
|
||
}
|
||
}else{return NULL;}
|
||
8003fee: 2300 movs r3, #0
|
||
8003ff0: e02a b.n 8004048 <New_Window+0xca>
|
||
|
||
windows_stack *temp_windows_stack;
|
||
temp_windows_stack=ui->last_windows;
|
||
8003ff2: 68fb ldr r3, [r7, #12]
|
||
8003ff4: 689b ldr r3, [r3, #8]
|
||
8003ff6: 61bb str r3, [r7, #24]
|
||
if(temp_windows_stack==NULL)
|
||
8003ff8: 69bb ldr r3, [r7, #24]
|
||
8003ffa: 2b00 cmp r3, #0
|
||
8003ffc: d10b bne.n 8004016 <New_Window+0x98>
|
||
{
|
||
temp_windows_stack=(windows_stack*)malloc(sizeof(windows_stack));
|
||
8003ffe: 200c movs r0, #12
|
||
8004000: f000 f90e bl 8004220 <malloc>
|
||
8004004: 4603 mov r3, r0
|
||
8004006: 61bb str r3, [r7, #24]
|
||
temp_windows_stack->up=NULL;
|
||
8004008: 69bb ldr r3, [r7, #24]
|
||
800400a: 2200 movs r2, #0
|
||
800400c: 601a str r2, [r3, #0]
|
||
ui->windows=temp_windows_stack;
|
||
800400e: 68fb ldr r3, [r7, #12]
|
||
8004010: 69ba ldr r2, [r7, #24]
|
||
8004012: 605a str r2, [r3, #4]
|
||
8004014: e00e b.n 8004034 <New_Window+0xb6>
|
||
while(temp_windows_stack->next!=NULL)
|
||
{
|
||
temp_windows_stack=temp_windows_stack->next;
|
||
}
|
||
*/
|
||
windows_stack *up=temp_windows_stack;//���ݵ�ǰ����ָ��
|
||
8004016: 69bb ldr r3, [r7, #24]
|
||
8004018: 613b str r3, [r7, #16]
|
||
temp_windows_stack->next=(windows_stack*)malloc(sizeof(windows_stack));
|
||
800401a: 200c movs r0, #12
|
||
800401c: f000 f900 bl 8004220 <malloc>
|
||
8004020: 4603 mov r3, r0
|
||
8004022: 461a mov r2, r3
|
||
8004024: 69bb ldr r3, [r7, #24]
|
||
8004026: 609a str r2, [r3, #8]
|
||
temp_windows_stack=temp_windows_stack->next;
|
||
8004028: 69bb ldr r3, [r7, #24]
|
||
800402a: 689b ldr r3, [r3, #8]
|
||
800402c: 61bb str r3, [r7, #24]
|
||
temp_windows_stack->up=up;
|
||
800402e: 69bb ldr r3, [r7, #24]
|
||
8004030: 693a ldr r2, [r7, #16]
|
||
8004032: 601a str r2, [r3, #0]
|
||
}
|
||
temp_windows_stack->next=NULL;
|
||
8004034: 69bb ldr r3, [r7, #24]
|
||
8004036: 2200 movs r2, #0
|
||
8004038: 609a str r2, [r3, #8]
|
||
temp_windows_stack->window=temp_window;
|
||
800403a: 69bb ldr r3, [r7, #24]
|
||
800403c: 697a ldr r2, [r7, #20]
|
||
800403e: 605a str r2, [r3, #4]
|
||
|
||
ui->last_windows=temp_windows_stack;
|
||
8004040: 68fb ldr r3, [r7, #12]
|
||
8004042: 69ba ldr r2, [r7, #24]
|
||
8004044: 609a str r2, [r3, #8]
|
||
|
||
return temp_window;
|
||
8004046: 697b ldr r3, [r7, #20]
|
||
|
||
}
|
||
8004048: 4618 mov r0, r3
|
||
800404a: 3720 adds r7, #32
|
||
800404c: 46bd mov sp, r7
|
||
800404e: bd80 pop {r7, pc}
|
||
|
||
08004050 <Refresh_UI>:
|
||
* �ܿ�ϧ ��������д�Ĵ���Ҫ������
|
||
* ���㷨ʵ���ڵ���ϵ������ͦ��
|
||
*
|
||
* */
|
||
void Refresh_UI(UI *ui)
|
||
{
|
||
8004050: b580 push {r7, lr}
|
||
8004052: b08a sub sp, #40 ; 0x28
|
||
8004054: af02 add r7, sp, #8
|
||
8004056: 6078 str r0, [r7, #4]
|
||
int flag=0;
|
||
8004058: 2300 movs r3, #0
|
||
800405a: 61fb str r3, [r7, #28]
|
||
uint16_t dot_y=0,dot_x=0;
|
||
800405c: 2300 movs r3, #0
|
||
800405e: 837b strh r3, [r7, #26]
|
||
8004060: 2300 movs r3, #0
|
||
8004062: 833b strh r3, [r7, #24]
|
||
|
||
//������
|
||
|
||
for(dot_y=0;dot_y<240;dot_y++)
|
||
8004064: 2300 movs r3, #0
|
||
8004066: 837b strh r3, [r7, #26]
|
||
8004068: e018 b.n 800409c <Refresh_UI+0x4c>
|
||
{
|
||
Inteface_SetCursor(dot_x,dot_y);
|
||
800406a: 8b7a ldrh r2, [r7, #26]
|
||
800406c: 8b3b ldrh r3, [r7, #24]
|
||
800406e: 4611 mov r1, r2
|
||
8004070: 4618 mov r0, r3
|
||
8004072: f7ff ff3b bl 8003eec <Inteface_SetCursor>
|
||
for(dot_x=0;dot_x<320;dot_x++)
|
||
8004076: 2300 movs r3, #0
|
||
8004078: 833b strh r3, [r7, #24]
|
||
800407a: e008 b.n 800408e <Refresh_UI+0x3e>
|
||
{
|
||
Inteface_SetColor(ui->background);
|
||
800407c: 687b ldr r3, [r7, #4]
|
||
800407e: 681b ldr r3, [r3, #0]
|
||
8004080: b29b uxth r3, r3
|
||
8004082: 4618 mov r0, r3
|
||
8004084: f7ff ff4c bl 8003f20 <Inteface_SetColor>
|
||
for(dot_x=0;dot_x<320;dot_x++)
|
||
8004088: 8b3b ldrh r3, [r7, #24]
|
||
800408a: 3301 adds r3, #1
|
||
800408c: 833b strh r3, [r7, #24]
|
||
800408e: 8b3b ldrh r3, [r7, #24]
|
||
8004090: f5b3 7fa0 cmp.w r3, #320 ; 0x140
|
||
8004094: d3f2 bcc.n 800407c <Refresh_UI+0x2c>
|
||
for(dot_y=0;dot_y<240;dot_y++)
|
||
8004096: 8b7b ldrh r3, [r7, #26]
|
||
8004098: 3301 adds r3, #1
|
||
800409a: 837b strh r3, [r7, #26]
|
||
800409c: 8b7b ldrh r3, [r7, #26]
|
||
800409e: 2bef cmp r3, #239 ; 0xef
|
||
80040a0: d9e3 bls.n 800406a <Refresh_UI+0x1a>
|
||
}
|
||
|
||
|
||
window *temp_window;
|
||
windows_stack *temp_windows_stack,*temp_windows_stack2;
|
||
temp_windows_stack=ui->windows;
|
||
80040a2: 687b ldr r3, [r7, #4]
|
||
80040a4: 685b ldr r3, [r3, #4]
|
||
80040a6: 617b str r3, [r7, #20]
|
||
do
|
||
{
|
||
if(temp_windows_stack!=NULL)
|
||
80040a8: 697b ldr r3, [r7, #20]
|
||
80040aa: 2b00 cmp r3, #0
|
||
80040ac: f000 8082 beq.w 80041b4 <Refresh_UI+0x164>
|
||
{
|
||
flag=1;
|
||
80040b0: 2301 movs r3, #1
|
||
80040b2: 61fb str r3, [r7, #28]
|
||
|
||
//
|
||
temp_window=temp_windows_stack->window;//ȡ�����ڵ���Դ����
|
||
80040b4: 697b ldr r3, [r7, #20]
|
||
80040b6: 685b ldr r3, [r3, #4]
|
||
80040b8: 60bb str r3, [r7, #8]
|
||
//��ʼ���ƴ���//���䴰�ڱ���
|
||
for(uint16_t temp_y=0;temp_y<temp_window->high;temp_y++)
|
||
80040ba: 2300 movs r3, #0
|
||
80040bc: 827b strh r3, [r7, #18]
|
||
80040be: e033 b.n 8004128 <Refresh_UI+0xd8>
|
||
{
|
||
Inteface_SetCursor(temp_window->x,temp_window->y+temp_y);
|
||
80040c0: 68bb ldr r3, [r7, #8]
|
||
80040c2: 8818 ldrh r0, [r3, #0]
|
||
80040c4: 68bb ldr r3, [r7, #8]
|
||
80040c6: 885a ldrh r2, [r3, #2]
|
||
80040c8: 8a7b ldrh r3, [r7, #18]
|
||
80040ca: 4413 add r3, r2
|
||
80040cc: b29b uxth r3, r3
|
||
80040ce: 4619 mov r1, r3
|
||
80040d0: f7ff ff0c bl 8003eec <Inteface_SetCursor>
|
||
for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
|
||
80040d4: 2300 movs r3, #0
|
||
80040d6: 823b strh r3, [r7, #16]
|
||
80040d8: e01e b.n 8004118 <Refresh_UI+0xc8>
|
||
{
|
||
if(temp_i==0||temp_y==0||temp_i==temp_window->width-1||temp_y==temp_window->high-1)
|
||
80040da: 8a3b ldrh r3, [r7, #16]
|
||
80040dc: 2b00 cmp r3, #0
|
||
80040de: d00e beq.n 80040fe <Refresh_UI+0xae>
|
||
80040e0: 8a7b ldrh r3, [r7, #18]
|
||
80040e2: 2b00 cmp r3, #0
|
||
80040e4: d00b beq.n 80040fe <Refresh_UI+0xae>
|
||
80040e6: 8a3a ldrh r2, [r7, #16]
|
||
80040e8: 68bb ldr r3, [r7, #8]
|
||
80040ea: 889b ldrh r3, [r3, #4]
|
||
80040ec: 3b01 subs r3, #1
|
||
80040ee: 429a cmp r2, r3
|
||
80040f0: d005 beq.n 80040fe <Refresh_UI+0xae>
|
||
80040f2: 8a7a ldrh r2, [r7, #18]
|
||
80040f4: 68bb ldr r3, [r7, #8]
|
||
80040f6: 88db ldrh r3, [r3, #6]
|
||
80040f8: 3b01 subs r3, #1
|
||
80040fa: 429a cmp r2, r3
|
||
80040fc: d103 bne.n 8004106 <Refresh_UI+0xb6>
|
||
{
|
||
Inteface_SetColor(BLUE);
|
||
80040fe: 201f movs r0, #31
|
||
8004100: f7ff ff0e bl 8003f20 <Inteface_SetColor>
|
||
8004104: e005 b.n 8004112 <Refresh_UI+0xc2>
|
||
}else
|
||
{
|
||
Inteface_SetColor(temp_window->background);
|
||
8004106: 68bb ldr r3, [r7, #8]
|
||
8004108: 689b ldr r3, [r3, #8]
|
||
800410a: b29b uxth r3, r3
|
||
800410c: 4618 mov r0, r3
|
||
800410e: f7ff ff07 bl 8003f20 <Inteface_SetColor>
|
||
for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
|
||
8004112: 8a3b ldrh r3, [r7, #16]
|
||
8004114: 3301 adds r3, #1
|
||
8004116: 823b strh r3, [r7, #16]
|
||
8004118: 68bb ldr r3, [r7, #8]
|
||
800411a: 889b ldrh r3, [r3, #4]
|
||
800411c: 8a3a ldrh r2, [r7, #16]
|
||
800411e: 429a cmp r2, r3
|
||
8004120: d3db bcc.n 80040da <Refresh_UI+0x8a>
|
||
for(uint16_t temp_y=0;temp_y<temp_window->high;temp_y++)
|
||
8004122: 8a7b ldrh r3, [r7, #18]
|
||
8004124: 3301 adds r3, #1
|
||
8004126: 827b strh r3, [r7, #18]
|
||
8004128: 68bb ldr r3, [r7, #8]
|
||
800412a: 88db ldrh r3, [r3, #6]
|
||
800412c: 8a7a ldrh r2, [r7, #18]
|
||
800412e: 429a cmp r2, r3
|
||
8004130: d3c6 bcc.n 80040c0 <Refresh_UI+0x70>
|
||
}
|
||
|
||
}
|
||
}
|
||
//����bar
|
||
for(uint16_t temp_y=0;temp_y<16;temp_y++)
|
||
8004132: 2300 movs r3, #0
|
||
8004134: 81fb strh r3, [r7, #14]
|
||
8004136: e026 b.n 8004186 <Refresh_UI+0x136>
|
||
{
|
||
Inteface_SetCursor(temp_window->x,temp_window->y+temp_y);
|
||
8004138: 68bb ldr r3, [r7, #8]
|
||
800413a: 8818 ldrh r0, [r3, #0]
|
||
800413c: 68bb ldr r3, [r7, #8]
|
||
800413e: 885a ldrh r2, [r3, #2]
|
||
8004140: 89fb ldrh r3, [r7, #14]
|
||
8004142: 4413 add r3, r2
|
||
8004144: b29b uxth r3, r3
|
||
8004146: 4619 mov r1, r3
|
||
8004148: f7ff fed0 bl 8003eec <Inteface_SetCursor>
|
||
for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
|
||
800414c: 2300 movs r3, #0
|
||
800414e: 81bb strh r3, [r7, #12]
|
||
8004150: e011 b.n 8004176 <Refresh_UI+0x126>
|
||
{
|
||
if(temp_i>temp_window->width-16)
|
||
8004152: 68bb ldr r3, [r7, #8]
|
||
8004154: 889b ldrh r3, [r3, #4]
|
||
8004156: f1a3 020f sub.w r2, r3, #15
|
||
800415a: 89bb ldrh r3, [r7, #12]
|
||
800415c: 429a cmp r2, r3
|
||
800415e: dc04 bgt.n 800416a <Refresh_UI+0x11a>
|
||
{
|
||
Inteface_SetColor(RED);
|
||
8004160: f44f 4078 mov.w r0, #63488 ; 0xf800
|
||
8004164: f7ff fedc bl 8003f20 <Inteface_SetColor>
|
||
8004168: e002 b.n 8004170 <Refresh_UI+0x120>
|
||
}else
|
||
{
|
||
Inteface_SetColor(BLUE);
|
||
800416a: 201f movs r0, #31
|
||
800416c: f7ff fed8 bl 8003f20 <Inteface_SetColor>
|
||
for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
|
||
8004170: 89bb ldrh r3, [r7, #12]
|
||
8004172: 3301 adds r3, #1
|
||
8004174: 81bb strh r3, [r7, #12]
|
||
8004176: 68bb ldr r3, [r7, #8]
|
||
8004178: 889b ldrh r3, [r3, #4]
|
||
800417a: 89ba ldrh r2, [r7, #12]
|
||
800417c: 429a cmp r2, r3
|
||
800417e: d3e8 bcc.n 8004152 <Refresh_UI+0x102>
|
||
for(uint16_t temp_y=0;temp_y<16;temp_y++)
|
||
8004180: 89fb ldrh r3, [r7, #14]
|
||
8004182: 3301 adds r3, #1
|
||
8004184: 81fb strh r3, [r7, #14]
|
||
8004186: 89fb ldrh r3, [r7, #14]
|
||
8004188: 2b0f cmp r3, #15
|
||
800418a: d9d5 bls.n 8004138 <Refresh_UI+0xe8>
|
||
}
|
||
|
||
}
|
||
}
|
||
//��ʾtitle
|
||
LCD_ShowString(temp_window->x,temp_window->y,&temp_window->title,16,WHITE,WHITE);
|
||
800418c: 68bb ldr r3, [r7, #8]
|
||
800418e: 8818 ldrh r0, [r3, #0]
|
||
8004190: 68bb ldr r3, [r7, #8]
|
||
8004192: 8859 ldrh r1, [r3, #2]
|
||
8004194: 68bb ldr r3, [r7, #8]
|
||
8004196: f103 020c add.w r2, r3, #12
|
||
800419a: f64f 73ff movw r3, #65535 ; 0xffff
|
||
800419e: 9301 str r3, [sp, #4]
|
||
80041a0: f64f 73ff movw r3, #65535 ; 0xffff
|
||
80041a4: 9300 str r3, [sp, #0]
|
||
80041a6: 2310 movs r3, #16
|
||
80041a8: f7ff f900 bl 80033ac <LCD_ShowString>
|
||
|
||
|
||
|
||
|
||
//������һ������
|
||
temp_windows_stack=temp_windows_stack->next;
|
||
80041ac: 697b ldr r3, [r7, #20]
|
||
80041ae: 689b ldr r3, [r3, #8]
|
||
80041b0: 617b str r3, [r7, #20]
|
||
80041b2: e001 b.n 80041b8 <Refresh_UI+0x168>
|
||
}else
|
||
{
|
||
flag=0;
|
||
80041b4: 2300 movs r3, #0
|
||
80041b6: 61fb str r3, [r7, #28]
|
||
}
|
||
|
||
}while(flag);
|
||
80041b8: 69fb ldr r3, [r7, #28]
|
||
80041ba: 2b00 cmp r3, #0
|
||
80041bc: f47f af74 bne.w 80040a8 <Refresh_UI+0x58>
|
||
}
|
||
|
||
}
|
||
*/
|
||
|
||
}
|
||
80041c0: bf00 nop
|
||
80041c2: bf00 nop
|
||
80041c4: 3720 adds r7, #32
|
||
80041c6: 46bd mov sp, r7
|
||
80041c8: bd80 pop {r7, pc}
|
||
...
|
||
|
||
080041cc <__errno>:
|
||
80041cc: 4b01 ldr r3, [pc, #4] ; (80041d4 <__errno+0x8>)
|
||
80041ce: 6818 ldr r0, [r3, #0]
|
||
80041d0: 4770 bx lr
|
||
80041d2: bf00 nop
|
||
80041d4: 2000000c .word 0x2000000c
|
||
|
||
080041d8 <__libc_init_array>:
|
||
80041d8: b570 push {r4, r5, r6, lr}
|
||
80041da: 2600 movs r6, #0
|
||
80041dc: 4d0c ldr r5, [pc, #48] ; (8004210 <__libc_init_array+0x38>)
|
||
80041de: 4c0d ldr r4, [pc, #52] ; (8004214 <__libc_init_array+0x3c>)
|
||
80041e0: 1b64 subs r4, r4, r5
|
||
80041e2: 10a4 asrs r4, r4, #2
|
||
80041e4: 42a6 cmp r6, r4
|
||
80041e6: d109 bne.n 80041fc <__libc_init_array+0x24>
|
||
80041e8: f002 feba bl 8006f60 <_init>
|
||
80041ec: 2600 movs r6, #0
|
||
80041ee: 4d0a ldr r5, [pc, #40] ; (8004218 <__libc_init_array+0x40>)
|
||
80041f0: 4c0a ldr r4, [pc, #40] ; (800421c <__libc_init_array+0x44>)
|
||
80041f2: 1b64 subs r4, r4, r5
|
||
80041f4: 10a4 asrs r4, r4, #2
|
||
80041f6: 42a6 cmp r6, r4
|
||
80041f8: d105 bne.n 8004206 <__libc_init_array+0x2e>
|
||
80041fa: bd70 pop {r4, r5, r6, pc}
|
||
80041fc: f855 3b04 ldr.w r3, [r5], #4
|
||
8004200: 4798 blx r3
|
||
8004202: 3601 adds r6, #1
|
||
8004204: e7ee b.n 80041e4 <__libc_init_array+0xc>
|
||
8004206: f855 3b04 ldr.w r3, [r5], #4
|
||
800420a: 4798 blx r3
|
||
800420c: 3601 adds r6, #1
|
||
800420e: e7f2 b.n 80041f6 <__libc_init_array+0x1e>
|
||
8004210: 08007eb4 .word 0x08007eb4
|
||
8004214: 08007eb4 .word 0x08007eb4
|
||
8004218: 08007eb4 .word 0x08007eb4
|
||
800421c: 08007eb8 .word 0x08007eb8
|
||
|
||
08004220 <malloc>:
|
||
8004220: 4b02 ldr r3, [pc, #8] ; (800422c <malloc+0xc>)
|
||
8004222: 4601 mov r1, r0
|
||
8004224: 6818 ldr r0, [r3, #0]
|
||
8004226: f000 b857 b.w 80042d8 <_malloc_r>
|
||
800422a: bf00 nop
|
||
800422c: 2000000c .word 0x2000000c
|
||
|
||
08004230 <memset>:
|
||
8004230: 4603 mov r3, r0
|
||
8004232: 4402 add r2, r0
|
||
8004234: 4293 cmp r3, r2
|
||
8004236: d100 bne.n 800423a <memset+0xa>
|
||
8004238: 4770 bx lr
|
||
800423a: f803 1b01 strb.w r1, [r3], #1
|
||
800423e: e7f9 b.n 8004234 <memset+0x4>
|
||
|
||
08004240 <_free_r>:
|
||
8004240: b538 push {r3, r4, r5, lr}
|
||
8004242: 4605 mov r5, r0
|
||
8004244: 2900 cmp r1, #0
|
||
8004246: d043 beq.n 80042d0 <_free_r+0x90>
|
||
8004248: f851 3c04 ldr.w r3, [r1, #-4]
|
||
800424c: 1f0c subs r4, r1, #4
|
||
800424e: 2b00 cmp r3, #0
|
||
8004250: bfb8 it lt
|
||
8004252: 18e4 addlt r4, r4, r3
|
||
8004254: f001 fbc6 bl 80059e4 <__malloc_lock>
|
||
8004258: 4a1e ldr r2, [pc, #120] ; (80042d4 <_free_r+0x94>)
|
||
800425a: 6813 ldr r3, [r2, #0]
|
||
800425c: 4610 mov r0, r2
|
||
800425e: b933 cbnz r3, 800426e <_free_r+0x2e>
|
||
8004260: 6063 str r3, [r4, #4]
|
||
8004262: 6014 str r4, [r2, #0]
|
||
8004264: 4628 mov r0, r5
|
||
8004266: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
||
800426a: f001 bbc1 b.w 80059f0 <__malloc_unlock>
|
||
800426e: 42a3 cmp r3, r4
|
||
8004270: d90a bls.n 8004288 <_free_r+0x48>
|
||
8004272: 6821 ldr r1, [r4, #0]
|
||
8004274: 1862 adds r2, r4, r1
|
||
8004276: 4293 cmp r3, r2
|
||
8004278: bf01 itttt eq
|
||
800427a: 681a ldreq r2, [r3, #0]
|
||
800427c: 685b ldreq r3, [r3, #4]
|
||
800427e: 1852 addeq r2, r2, r1
|
||
8004280: 6022 streq r2, [r4, #0]
|
||
8004282: 6063 str r3, [r4, #4]
|
||
8004284: 6004 str r4, [r0, #0]
|
||
8004286: e7ed b.n 8004264 <_free_r+0x24>
|
||
8004288: 461a mov r2, r3
|
||
800428a: 685b ldr r3, [r3, #4]
|
||
800428c: b10b cbz r3, 8004292 <_free_r+0x52>
|
||
800428e: 42a3 cmp r3, r4
|
||
8004290: d9fa bls.n 8004288 <_free_r+0x48>
|
||
8004292: 6811 ldr r1, [r2, #0]
|
||
8004294: 1850 adds r0, r2, r1
|
||
8004296: 42a0 cmp r0, r4
|
||
8004298: d10b bne.n 80042b2 <_free_r+0x72>
|
||
800429a: 6820 ldr r0, [r4, #0]
|
||
800429c: 4401 add r1, r0
|
||
800429e: 1850 adds r0, r2, r1
|
||
80042a0: 4283 cmp r3, r0
|
||
80042a2: 6011 str r1, [r2, #0]
|
||
80042a4: d1de bne.n 8004264 <_free_r+0x24>
|
||
80042a6: 6818 ldr r0, [r3, #0]
|
||
80042a8: 685b ldr r3, [r3, #4]
|
||
80042aa: 4401 add r1, r0
|
||
80042ac: 6011 str r1, [r2, #0]
|
||
80042ae: 6053 str r3, [r2, #4]
|
||
80042b0: e7d8 b.n 8004264 <_free_r+0x24>
|
||
80042b2: d902 bls.n 80042ba <_free_r+0x7a>
|
||
80042b4: 230c movs r3, #12
|
||
80042b6: 602b str r3, [r5, #0]
|
||
80042b8: e7d4 b.n 8004264 <_free_r+0x24>
|
||
80042ba: 6820 ldr r0, [r4, #0]
|
||
80042bc: 1821 adds r1, r4, r0
|
||
80042be: 428b cmp r3, r1
|
||
80042c0: bf01 itttt eq
|
||
80042c2: 6819 ldreq r1, [r3, #0]
|
||
80042c4: 685b ldreq r3, [r3, #4]
|
||
80042c6: 1809 addeq r1, r1, r0
|
||
80042c8: 6021 streq r1, [r4, #0]
|
||
80042ca: 6063 str r3, [r4, #4]
|
||
80042cc: 6054 str r4, [r2, #4]
|
||
80042ce: e7c9 b.n 8004264 <_free_r+0x24>
|
||
80042d0: bd38 pop {r3, r4, r5, pc}
|
||
80042d2: bf00 nop
|
||
80042d4: 20000200 .word 0x20000200
|
||
|
||
080042d8 <_malloc_r>:
|
||
80042d8: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
80042da: 1ccd adds r5, r1, #3
|
||
80042dc: f025 0503 bic.w r5, r5, #3
|
||
80042e0: 3508 adds r5, #8
|
||
80042e2: 2d0c cmp r5, #12
|
||
80042e4: bf38 it cc
|
||
80042e6: 250c movcc r5, #12
|
||
80042e8: 2d00 cmp r5, #0
|
||
80042ea: 4606 mov r6, r0
|
||
80042ec: db01 blt.n 80042f2 <_malloc_r+0x1a>
|
||
80042ee: 42a9 cmp r1, r5
|
||
80042f0: d903 bls.n 80042fa <_malloc_r+0x22>
|
||
80042f2: 230c movs r3, #12
|
||
80042f4: 6033 str r3, [r6, #0]
|
||
80042f6: 2000 movs r0, #0
|
||
80042f8: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
80042fa: f001 fb73 bl 80059e4 <__malloc_lock>
|
||
80042fe: 4921 ldr r1, [pc, #132] ; (8004384 <_malloc_r+0xac>)
|
||
8004300: 680a ldr r2, [r1, #0]
|
||
8004302: 4614 mov r4, r2
|
||
8004304: b99c cbnz r4, 800432e <_malloc_r+0x56>
|
||
8004306: 4f20 ldr r7, [pc, #128] ; (8004388 <_malloc_r+0xb0>)
|
||
8004308: 683b ldr r3, [r7, #0]
|
||
800430a: b923 cbnz r3, 8004316 <_malloc_r+0x3e>
|
||
800430c: 4621 mov r1, r4
|
||
800430e: 4630 mov r0, r6
|
||
8004310: f000 fc9c bl 8004c4c <_sbrk_r>
|
||
8004314: 6038 str r0, [r7, #0]
|
||
8004316: 4629 mov r1, r5
|
||
8004318: 4630 mov r0, r6
|
||
800431a: f000 fc97 bl 8004c4c <_sbrk_r>
|
||
800431e: 1c43 adds r3, r0, #1
|
||
8004320: d123 bne.n 800436a <_malloc_r+0x92>
|
||
8004322: 230c movs r3, #12
|
||
8004324: 4630 mov r0, r6
|
||
8004326: 6033 str r3, [r6, #0]
|
||
8004328: f001 fb62 bl 80059f0 <__malloc_unlock>
|
||
800432c: e7e3 b.n 80042f6 <_malloc_r+0x1e>
|
||
800432e: 6823 ldr r3, [r4, #0]
|
||
8004330: 1b5b subs r3, r3, r5
|
||
8004332: d417 bmi.n 8004364 <_malloc_r+0x8c>
|
||
8004334: 2b0b cmp r3, #11
|
||
8004336: d903 bls.n 8004340 <_malloc_r+0x68>
|
||
8004338: 6023 str r3, [r4, #0]
|
||
800433a: 441c add r4, r3
|
||
800433c: 6025 str r5, [r4, #0]
|
||
800433e: e004 b.n 800434a <_malloc_r+0x72>
|
||
8004340: 6863 ldr r3, [r4, #4]
|
||
8004342: 42a2 cmp r2, r4
|
||
8004344: bf0c ite eq
|
||
8004346: 600b streq r3, [r1, #0]
|
||
8004348: 6053 strne r3, [r2, #4]
|
||
800434a: 4630 mov r0, r6
|
||
800434c: f001 fb50 bl 80059f0 <__malloc_unlock>
|
||
8004350: f104 000b add.w r0, r4, #11
|
||
8004354: 1d23 adds r3, r4, #4
|
||
8004356: f020 0007 bic.w r0, r0, #7
|
||
800435a: 1ac2 subs r2, r0, r3
|
||
800435c: d0cc beq.n 80042f8 <_malloc_r+0x20>
|
||
800435e: 1a1b subs r3, r3, r0
|
||
8004360: 50a3 str r3, [r4, r2]
|
||
8004362: e7c9 b.n 80042f8 <_malloc_r+0x20>
|
||
8004364: 4622 mov r2, r4
|
||
8004366: 6864 ldr r4, [r4, #4]
|
||
8004368: e7cc b.n 8004304 <_malloc_r+0x2c>
|
||
800436a: 1cc4 adds r4, r0, #3
|
||
800436c: f024 0403 bic.w r4, r4, #3
|
||
8004370: 42a0 cmp r0, r4
|
||
8004372: d0e3 beq.n 800433c <_malloc_r+0x64>
|
||
8004374: 1a21 subs r1, r4, r0
|
||
8004376: 4630 mov r0, r6
|
||
8004378: f000 fc68 bl 8004c4c <_sbrk_r>
|
||
800437c: 3001 adds r0, #1
|
||
800437e: d1dd bne.n 800433c <_malloc_r+0x64>
|
||
8004380: e7cf b.n 8004322 <_malloc_r+0x4a>
|
||
8004382: bf00 nop
|
||
8004384: 20000200 .word 0x20000200
|
||
8004388: 20000204 .word 0x20000204
|
||
|
||
0800438c <__cvt>:
|
||
800438c: 2b00 cmp r3, #0
|
||
800438e: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8004392: 461f mov r7, r3
|
||
8004394: bfbb ittet lt
|
||
8004396: f103 4300 addlt.w r3, r3, #2147483648 ; 0x80000000
|
||
800439a: 461f movlt r7, r3
|
||
800439c: 2300 movge r3, #0
|
||
800439e: 232d movlt r3, #45 ; 0x2d
|
||
80043a0: b088 sub sp, #32
|
||
80043a2: 4614 mov r4, r2
|
||
80043a4: 9a12 ldr r2, [sp, #72] ; 0x48
|
||
80043a6: 9d10 ldr r5, [sp, #64] ; 0x40
|
||
80043a8: 7013 strb r3, [r2, #0]
|
||
80043aa: 9b14 ldr r3, [sp, #80] ; 0x50
|
||
80043ac: f8dd a04c ldr.w sl, [sp, #76] ; 0x4c
|
||
80043b0: f023 0820 bic.w r8, r3, #32
|
||
80043b4: f1b8 0f46 cmp.w r8, #70 ; 0x46
|
||
80043b8: d005 beq.n 80043c6 <__cvt+0x3a>
|
||
80043ba: f1b8 0f45 cmp.w r8, #69 ; 0x45
|
||
80043be: d100 bne.n 80043c2 <__cvt+0x36>
|
||
80043c0: 3501 adds r5, #1
|
||
80043c2: 2302 movs r3, #2
|
||
80043c4: e000 b.n 80043c8 <__cvt+0x3c>
|
||
80043c6: 2303 movs r3, #3
|
||
80043c8: aa07 add r2, sp, #28
|
||
80043ca: 9204 str r2, [sp, #16]
|
||
80043cc: aa06 add r2, sp, #24
|
||
80043ce: e9cd a202 strd sl, r2, [sp, #8]
|
||
80043d2: e9cd 3500 strd r3, r5, [sp]
|
||
80043d6: 4622 mov r2, r4
|
||
80043d8: 463b mov r3, r7
|
||
80043da: f000 fcf5 bl 8004dc8 <_dtoa_r>
|
||
80043de: f1b8 0f47 cmp.w r8, #71 ; 0x47
|
||
80043e2: 4606 mov r6, r0
|
||
80043e4: d102 bne.n 80043ec <__cvt+0x60>
|
||
80043e6: 9b11 ldr r3, [sp, #68] ; 0x44
|
||
80043e8: 07db lsls r3, r3, #31
|
||
80043ea: d522 bpl.n 8004432 <__cvt+0xa6>
|
||
80043ec: f1b8 0f46 cmp.w r8, #70 ; 0x46
|
||
80043f0: eb06 0905 add.w r9, r6, r5
|
||
80043f4: d110 bne.n 8004418 <__cvt+0x8c>
|
||
80043f6: 7833 ldrb r3, [r6, #0]
|
||
80043f8: 2b30 cmp r3, #48 ; 0x30
|
||
80043fa: d10a bne.n 8004412 <__cvt+0x86>
|
||
80043fc: 2200 movs r2, #0
|
||
80043fe: 2300 movs r3, #0
|
||
8004400: 4620 mov r0, r4
|
||
8004402: 4639 mov r1, r7
|
||
8004404: f7fc fb3c bl 8000a80 <__aeabi_dcmpeq>
|
||
8004408: b918 cbnz r0, 8004412 <__cvt+0x86>
|
||
800440a: f1c5 0501 rsb r5, r5, #1
|
||
800440e: f8ca 5000 str.w r5, [sl]
|
||
8004412: f8da 3000 ldr.w r3, [sl]
|
||
8004416: 4499 add r9, r3
|
||
8004418: 2200 movs r2, #0
|
||
800441a: 2300 movs r3, #0
|
||
800441c: 4620 mov r0, r4
|
||
800441e: 4639 mov r1, r7
|
||
8004420: f7fc fb2e bl 8000a80 <__aeabi_dcmpeq>
|
||
8004424: b108 cbz r0, 800442a <__cvt+0x9e>
|
||
8004426: f8cd 901c str.w r9, [sp, #28]
|
||
800442a: 2230 movs r2, #48 ; 0x30
|
||
800442c: 9b07 ldr r3, [sp, #28]
|
||
800442e: 454b cmp r3, r9
|
||
8004430: d307 bcc.n 8004442 <__cvt+0xb6>
|
||
8004432: 4630 mov r0, r6
|
||
8004434: 9b07 ldr r3, [sp, #28]
|
||
8004436: 9a15 ldr r2, [sp, #84] ; 0x54
|
||
8004438: 1b9b subs r3, r3, r6
|
||
800443a: 6013 str r3, [r2, #0]
|
||
800443c: b008 add sp, #32
|
||
800443e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8004442: 1c59 adds r1, r3, #1
|
||
8004444: 9107 str r1, [sp, #28]
|
||
8004446: 701a strb r2, [r3, #0]
|
||
8004448: e7f0 b.n 800442c <__cvt+0xa0>
|
||
|
||
0800444a <__exponent>:
|
||
800444a: 4603 mov r3, r0
|
||
800444c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr}
|
||
800444e: 2900 cmp r1, #0
|
||
8004450: f803 2b02 strb.w r2, [r3], #2
|
||
8004454: bfb6 itet lt
|
||
8004456: 222d movlt r2, #45 ; 0x2d
|
||
8004458: 222b movge r2, #43 ; 0x2b
|
||
800445a: 4249 neglt r1, r1
|
||
800445c: 2909 cmp r1, #9
|
||
800445e: 7042 strb r2, [r0, #1]
|
||
8004460: dd2b ble.n 80044ba <__exponent+0x70>
|
||
8004462: f10d 0407 add.w r4, sp, #7
|
||
8004466: 46a4 mov ip, r4
|
||
8004468: 270a movs r7, #10
|
||
800446a: fb91 f6f7 sdiv r6, r1, r7
|
||
800446e: 460a mov r2, r1
|
||
8004470: 46a6 mov lr, r4
|
||
8004472: fb07 1516 mls r5, r7, r6, r1
|
||
8004476: 2a63 cmp r2, #99 ; 0x63
|
||
8004478: f105 0530 add.w r5, r5, #48 ; 0x30
|
||
800447c: 4631 mov r1, r6
|
||
800447e: f104 34ff add.w r4, r4, #4294967295 ; 0xffffffff
|
||
8004482: f80e 5c01 strb.w r5, [lr, #-1]
|
||
8004486: dcf0 bgt.n 800446a <__exponent+0x20>
|
||
8004488: 3130 adds r1, #48 ; 0x30
|
||
800448a: f1ae 0502 sub.w r5, lr, #2
|
||
800448e: f804 1c01 strb.w r1, [r4, #-1]
|
||
8004492: 4629 mov r1, r5
|
||
8004494: 1c44 adds r4, r0, #1
|
||
8004496: 4561 cmp r1, ip
|
||
8004498: d30a bcc.n 80044b0 <__exponent+0x66>
|
||
800449a: f10d 0209 add.w r2, sp, #9
|
||
800449e: eba2 020e sub.w r2, r2, lr
|
||
80044a2: 4565 cmp r5, ip
|
||
80044a4: bf88 it hi
|
||
80044a6: 2200 movhi r2, #0
|
||
80044a8: 4413 add r3, r2
|
||
80044aa: 1a18 subs r0, r3, r0
|
||
80044ac: b003 add sp, #12
|
||
80044ae: bdf0 pop {r4, r5, r6, r7, pc}
|
||
80044b0: f811 2b01 ldrb.w r2, [r1], #1
|
||
80044b4: f804 2f01 strb.w r2, [r4, #1]!
|
||
80044b8: e7ed b.n 8004496 <__exponent+0x4c>
|
||
80044ba: 2330 movs r3, #48 ; 0x30
|
||
80044bc: 3130 adds r1, #48 ; 0x30
|
||
80044be: 7083 strb r3, [r0, #2]
|
||
80044c0: 70c1 strb r1, [r0, #3]
|
||
80044c2: 1d03 adds r3, r0, #4
|
||
80044c4: e7f1 b.n 80044aa <__exponent+0x60>
|
||
...
|
||
|
||
080044c8 <_printf_float>:
|
||
80044c8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
80044cc: b091 sub sp, #68 ; 0x44
|
||
80044ce: 460c mov r4, r1
|
||
80044d0: f8dd 8068 ldr.w r8, [sp, #104] ; 0x68
|
||
80044d4: 4616 mov r6, r2
|
||
80044d6: 461f mov r7, r3
|
||
80044d8: 4605 mov r5, r0
|
||
80044da: f001 fa63 bl 80059a4 <_localeconv_r>
|
||
80044de: 6803 ldr r3, [r0, #0]
|
||
80044e0: 4618 mov r0, r3
|
||
80044e2: 9309 str r3, [sp, #36] ; 0x24
|
||
80044e4: f7fb fea0 bl 8000228 <strlen>
|
||
80044e8: 2300 movs r3, #0
|
||
80044ea: 930e str r3, [sp, #56] ; 0x38
|
||
80044ec: f8d8 3000 ldr.w r3, [r8]
|
||
80044f0: 900a str r0, [sp, #40] ; 0x28
|
||
80044f2: 3307 adds r3, #7
|
||
80044f4: f023 0307 bic.w r3, r3, #7
|
||
80044f8: f103 0208 add.w r2, r3, #8
|
||
80044fc: f894 9018 ldrb.w r9, [r4, #24]
|
||
8004500: f8d4 b000 ldr.w fp, [r4]
|
||
8004504: f8c8 2000 str.w r2, [r8]
|
||
8004508: e9d3 2300 ldrd r2, r3, [r3]
|
||
800450c: e9c4 2312 strd r2, r3, [r4, #72] ; 0x48
|
||
8004510: e9d4 8a12 ldrd r8, sl, [r4, #72] ; 0x48
|
||
8004514: f02a 4300 bic.w r3, sl, #2147483648 ; 0x80000000
|
||
8004518: 930b str r3, [sp, #44] ; 0x2c
|
||
800451a: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
800451e: 4640 mov r0, r8
|
||
8004520: 4b9c ldr r3, [pc, #624] ; (8004794 <_printf_float+0x2cc>)
|
||
8004522: 990b ldr r1, [sp, #44] ; 0x2c
|
||
8004524: f7fc fade bl 8000ae4 <__aeabi_dcmpun>
|
||
8004528: bb70 cbnz r0, 8004588 <_printf_float+0xc0>
|
||
800452a: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
800452e: 4640 mov r0, r8
|
||
8004530: 4b98 ldr r3, [pc, #608] ; (8004794 <_printf_float+0x2cc>)
|
||
8004532: 990b ldr r1, [sp, #44] ; 0x2c
|
||
8004534: f7fc fab8 bl 8000aa8 <__aeabi_dcmple>
|
||
8004538: bb30 cbnz r0, 8004588 <_printf_float+0xc0>
|
||
800453a: 2200 movs r2, #0
|
||
800453c: 2300 movs r3, #0
|
||
800453e: 4640 mov r0, r8
|
||
8004540: 4651 mov r1, sl
|
||
8004542: f7fc faa7 bl 8000a94 <__aeabi_dcmplt>
|
||
8004546: b110 cbz r0, 800454e <_printf_float+0x86>
|
||
8004548: 232d movs r3, #45 ; 0x2d
|
||
800454a: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
800454e: 4b92 ldr r3, [pc, #584] ; (8004798 <_printf_float+0x2d0>)
|
||
8004550: 4892 ldr r0, [pc, #584] ; (800479c <_printf_float+0x2d4>)
|
||
8004552: f1b9 0f47 cmp.w r9, #71 ; 0x47
|
||
8004556: bf94 ite ls
|
||
8004558: 4698 movls r8, r3
|
||
800455a: 4680 movhi r8, r0
|
||
800455c: 2303 movs r3, #3
|
||
800455e: f04f 0a00 mov.w sl, #0
|
||
8004562: 6123 str r3, [r4, #16]
|
||
8004564: f02b 0304 bic.w r3, fp, #4
|
||
8004568: 6023 str r3, [r4, #0]
|
||
800456a: 4633 mov r3, r6
|
||
800456c: 4621 mov r1, r4
|
||
800456e: 4628 mov r0, r5
|
||
8004570: 9700 str r7, [sp, #0]
|
||
8004572: aa0f add r2, sp, #60 ; 0x3c
|
||
8004574: f000 f9d4 bl 8004920 <_printf_common>
|
||
8004578: 3001 adds r0, #1
|
||
800457a: f040 8090 bne.w 800469e <_printf_float+0x1d6>
|
||
800457e: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8004582: b011 add sp, #68 ; 0x44
|
||
8004584: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8004588: 4642 mov r2, r8
|
||
800458a: 4653 mov r3, sl
|
||
800458c: 4640 mov r0, r8
|
||
800458e: 4651 mov r1, sl
|
||
8004590: f7fc faa8 bl 8000ae4 <__aeabi_dcmpun>
|
||
8004594: b148 cbz r0, 80045aa <_printf_float+0xe2>
|
||
8004596: f1ba 0f00 cmp.w sl, #0
|
||
800459a: bfb8 it lt
|
||
800459c: 232d movlt r3, #45 ; 0x2d
|
||
800459e: 4880 ldr r0, [pc, #512] ; (80047a0 <_printf_float+0x2d8>)
|
||
80045a0: bfb8 it lt
|
||
80045a2: f884 3043 strblt.w r3, [r4, #67] ; 0x43
|
||
80045a6: 4b7f ldr r3, [pc, #508] ; (80047a4 <_printf_float+0x2dc>)
|
||
80045a8: e7d3 b.n 8004552 <_printf_float+0x8a>
|
||
80045aa: 6863 ldr r3, [r4, #4]
|
||
80045ac: f009 01df and.w r1, r9, #223 ; 0xdf
|
||
80045b0: 1c5a adds r2, r3, #1
|
||
80045b2: d142 bne.n 800463a <_printf_float+0x172>
|
||
80045b4: 2306 movs r3, #6
|
||
80045b6: 6063 str r3, [r4, #4]
|
||
80045b8: 2200 movs r2, #0
|
||
80045ba: 9206 str r2, [sp, #24]
|
||
80045bc: aa0e add r2, sp, #56 ; 0x38
|
||
80045be: e9cd 9204 strd r9, r2, [sp, #16]
|
||
80045c2: aa0d add r2, sp, #52 ; 0x34
|
||
80045c4: f44b 6380 orr.w r3, fp, #1024 ; 0x400
|
||
80045c8: 9203 str r2, [sp, #12]
|
||
80045ca: f10d 0233 add.w r2, sp, #51 ; 0x33
|
||
80045ce: e9cd 3201 strd r3, r2, [sp, #4]
|
||
80045d2: 6023 str r3, [r4, #0]
|
||
80045d4: 6863 ldr r3, [r4, #4]
|
||
80045d6: 4642 mov r2, r8
|
||
80045d8: 9300 str r3, [sp, #0]
|
||
80045da: 4628 mov r0, r5
|
||
80045dc: 4653 mov r3, sl
|
||
80045de: 910b str r1, [sp, #44] ; 0x2c
|
||
80045e0: f7ff fed4 bl 800438c <__cvt>
|
||
80045e4: 990b ldr r1, [sp, #44] ; 0x2c
|
||
80045e6: 4680 mov r8, r0
|
||
80045e8: 2947 cmp r1, #71 ; 0x47
|
||
80045ea: 990d ldr r1, [sp, #52] ; 0x34
|
||
80045ec: d108 bne.n 8004600 <_printf_float+0x138>
|
||
80045ee: 1cc8 adds r0, r1, #3
|
||
80045f0: db02 blt.n 80045f8 <_printf_float+0x130>
|
||
80045f2: 6863 ldr r3, [r4, #4]
|
||
80045f4: 4299 cmp r1, r3
|
||
80045f6: dd40 ble.n 800467a <_printf_float+0x1b2>
|
||
80045f8: f1a9 0902 sub.w r9, r9, #2
|
||
80045fc: fa5f f989 uxtb.w r9, r9
|
||
8004600: f1b9 0f65 cmp.w r9, #101 ; 0x65
|
||
8004604: d81f bhi.n 8004646 <_printf_float+0x17e>
|
||
8004606: 464a mov r2, r9
|
||
8004608: 3901 subs r1, #1
|
||
800460a: f104 0050 add.w r0, r4, #80 ; 0x50
|
||
800460e: 910d str r1, [sp, #52] ; 0x34
|
||
8004610: f7ff ff1b bl 800444a <__exponent>
|
||
8004614: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
8004616: 4682 mov sl, r0
|
||
8004618: 1813 adds r3, r2, r0
|
||
800461a: 2a01 cmp r2, #1
|
||
800461c: 6123 str r3, [r4, #16]
|
||
800461e: dc02 bgt.n 8004626 <_printf_float+0x15e>
|
||
8004620: 6822 ldr r2, [r4, #0]
|
||
8004622: 07d2 lsls r2, r2, #31
|
||
8004624: d501 bpl.n 800462a <_printf_float+0x162>
|
||
8004626: 3301 adds r3, #1
|
||
8004628: 6123 str r3, [r4, #16]
|
||
800462a: f89d 3033 ldrb.w r3, [sp, #51] ; 0x33
|
||
800462e: 2b00 cmp r3, #0
|
||
8004630: d09b beq.n 800456a <_printf_float+0xa2>
|
||
8004632: 232d movs r3, #45 ; 0x2d
|
||
8004634: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
8004638: e797 b.n 800456a <_printf_float+0xa2>
|
||
800463a: 2947 cmp r1, #71 ; 0x47
|
||
800463c: d1bc bne.n 80045b8 <_printf_float+0xf0>
|
||
800463e: 2b00 cmp r3, #0
|
||
8004640: d1ba bne.n 80045b8 <_printf_float+0xf0>
|
||
8004642: 2301 movs r3, #1
|
||
8004644: e7b7 b.n 80045b6 <_printf_float+0xee>
|
||
8004646: f1b9 0f66 cmp.w r9, #102 ; 0x66
|
||
800464a: d118 bne.n 800467e <_printf_float+0x1b6>
|
||
800464c: 2900 cmp r1, #0
|
||
800464e: 6863 ldr r3, [r4, #4]
|
||
8004650: dd0b ble.n 800466a <_printf_float+0x1a2>
|
||
8004652: 6121 str r1, [r4, #16]
|
||
8004654: b913 cbnz r3, 800465c <_printf_float+0x194>
|
||
8004656: 6822 ldr r2, [r4, #0]
|
||
8004658: 07d0 lsls r0, r2, #31
|
||
800465a: d502 bpl.n 8004662 <_printf_float+0x19a>
|
||
800465c: 3301 adds r3, #1
|
||
800465e: 440b add r3, r1
|
||
8004660: 6123 str r3, [r4, #16]
|
||
8004662: f04f 0a00 mov.w sl, #0
|
||
8004666: 65a1 str r1, [r4, #88] ; 0x58
|
||
8004668: e7df b.n 800462a <_printf_float+0x162>
|
||
800466a: b913 cbnz r3, 8004672 <_printf_float+0x1aa>
|
||
800466c: 6822 ldr r2, [r4, #0]
|
||
800466e: 07d2 lsls r2, r2, #31
|
||
8004670: d501 bpl.n 8004676 <_printf_float+0x1ae>
|
||
8004672: 3302 adds r3, #2
|
||
8004674: e7f4 b.n 8004660 <_printf_float+0x198>
|
||
8004676: 2301 movs r3, #1
|
||
8004678: e7f2 b.n 8004660 <_printf_float+0x198>
|
||
800467a: f04f 0967 mov.w r9, #103 ; 0x67
|
||
800467e: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8004680: 4299 cmp r1, r3
|
||
8004682: db05 blt.n 8004690 <_printf_float+0x1c8>
|
||
8004684: 6823 ldr r3, [r4, #0]
|
||
8004686: 6121 str r1, [r4, #16]
|
||
8004688: 07d8 lsls r0, r3, #31
|
||
800468a: d5ea bpl.n 8004662 <_printf_float+0x19a>
|
||
800468c: 1c4b adds r3, r1, #1
|
||
800468e: e7e7 b.n 8004660 <_printf_float+0x198>
|
||
8004690: 2900 cmp r1, #0
|
||
8004692: bfcc ite gt
|
||
8004694: 2201 movgt r2, #1
|
||
8004696: f1c1 0202 rsble r2, r1, #2
|
||
800469a: 4413 add r3, r2
|
||
800469c: e7e0 b.n 8004660 <_printf_float+0x198>
|
||
800469e: 6823 ldr r3, [r4, #0]
|
||
80046a0: 055a lsls r2, r3, #21
|
||
80046a2: d407 bmi.n 80046b4 <_printf_float+0x1ec>
|
||
80046a4: 6923 ldr r3, [r4, #16]
|
||
80046a6: 4642 mov r2, r8
|
||
80046a8: 4631 mov r1, r6
|
||
80046aa: 4628 mov r0, r5
|
||
80046ac: 47b8 blx r7
|
||
80046ae: 3001 adds r0, #1
|
||
80046b0: d12b bne.n 800470a <_printf_float+0x242>
|
||
80046b2: e764 b.n 800457e <_printf_float+0xb6>
|
||
80046b4: f1b9 0f65 cmp.w r9, #101 ; 0x65
|
||
80046b8: f240 80dd bls.w 8004876 <_printf_float+0x3ae>
|
||
80046bc: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48
|
||
80046c0: 2200 movs r2, #0
|
||
80046c2: 2300 movs r3, #0
|
||
80046c4: f7fc f9dc bl 8000a80 <__aeabi_dcmpeq>
|
||
80046c8: 2800 cmp r0, #0
|
||
80046ca: d033 beq.n 8004734 <_printf_float+0x26c>
|
||
80046cc: 2301 movs r3, #1
|
||
80046ce: 4631 mov r1, r6
|
||
80046d0: 4628 mov r0, r5
|
||
80046d2: 4a35 ldr r2, [pc, #212] ; (80047a8 <_printf_float+0x2e0>)
|
||
80046d4: 47b8 blx r7
|
||
80046d6: 3001 adds r0, #1
|
||
80046d8: f43f af51 beq.w 800457e <_printf_float+0xb6>
|
||
80046dc: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
80046e0: 429a cmp r2, r3
|
||
80046e2: db02 blt.n 80046ea <_printf_float+0x222>
|
||
80046e4: 6823 ldr r3, [r4, #0]
|
||
80046e6: 07d8 lsls r0, r3, #31
|
||
80046e8: d50f bpl.n 800470a <_printf_float+0x242>
|
||
80046ea: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
80046ee: 4631 mov r1, r6
|
||
80046f0: 4628 mov r0, r5
|
||
80046f2: 47b8 blx r7
|
||
80046f4: 3001 adds r0, #1
|
||
80046f6: f43f af42 beq.w 800457e <_printf_float+0xb6>
|
||
80046fa: f04f 0800 mov.w r8, #0
|
||
80046fe: f104 091a add.w r9, r4, #26
|
||
8004702: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8004704: 3b01 subs r3, #1
|
||
8004706: 4543 cmp r3, r8
|
||
8004708: dc09 bgt.n 800471e <_printf_float+0x256>
|
||
800470a: 6823 ldr r3, [r4, #0]
|
||
800470c: 079b lsls r3, r3, #30
|
||
800470e: f100 8102 bmi.w 8004916 <_printf_float+0x44e>
|
||
8004712: 68e0 ldr r0, [r4, #12]
|
||
8004714: 9b0f ldr r3, [sp, #60] ; 0x3c
|
||
8004716: 4298 cmp r0, r3
|
||
8004718: bfb8 it lt
|
||
800471a: 4618 movlt r0, r3
|
||
800471c: e731 b.n 8004582 <_printf_float+0xba>
|
||
800471e: 2301 movs r3, #1
|
||
8004720: 464a mov r2, r9
|
||
8004722: 4631 mov r1, r6
|
||
8004724: 4628 mov r0, r5
|
||
8004726: 47b8 blx r7
|
||
8004728: 3001 adds r0, #1
|
||
800472a: f43f af28 beq.w 800457e <_printf_float+0xb6>
|
||
800472e: f108 0801 add.w r8, r8, #1
|
||
8004732: e7e6 b.n 8004702 <_printf_float+0x23a>
|
||
8004734: 9b0d ldr r3, [sp, #52] ; 0x34
|
||
8004736: 2b00 cmp r3, #0
|
||
8004738: dc38 bgt.n 80047ac <_printf_float+0x2e4>
|
||
800473a: 2301 movs r3, #1
|
||
800473c: 4631 mov r1, r6
|
||
800473e: 4628 mov r0, r5
|
||
8004740: 4a19 ldr r2, [pc, #100] ; (80047a8 <_printf_float+0x2e0>)
|
||
8004742: 47b8 blx r7
|
||
8004744: 3001 adds r0, #1
|
||
8004746: f43f af1a beq.w 800457e <_printf_float+0xb6>
|
||
800474a: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
800474e: 4313 orrs r3, r2
|
||
8004750: d102 bne.n 8004758 <_printf_float+0x290>
|
||
8004752: 6823 ldr r3, [r4, #0]
|
||
8004754: 07d9 lsls r1, r3, #31
|
||
8004756: d5d8 bpl.n 800470a <_printf_float+0x242>
|
||
8004758: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
800475c: 4631 mov r1, r6
|
||
800475e: 4628 mov r0, r5
|
||
8004760: 47b8 blx r7
|
||
8004762: 3001 adds r0, #1
|
||
8004764: f43f af0b beq.w 800457e <_printf_float+0xb6>
|
||
8004768: f04f 0900 mov.w r9, #0
|
||
800476c: f104 0a1a add.w sl, r4, #26
|
||
8004770: 9b0d ldr r3, [sp, #52] ; 0x34
|
||
8004772: 425b negs r3, r3
|
||
8004774: 454b cmp r3, r9
|
||
8004776: dc01 bgt.n 800477c <_printf_float+0x2b4>
|
||
8004778: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
800477a: e794 b.n 80046a6 <_printf_float+0x1de>
|
||
800477c: 2301 movs r3, #1
|
||
800477e: 4652 mov r2, sl
|
||
8004780: 4631 mov r1, r6
|
||
8004782: 4628 mov r0, r5
|
||
8004784: 47b8 blx r7
|
||
8004786: 3001 adds r0, #1
|
||
8004788: f43f aef9 beq.w 800457e <_printf_float+0xb6>
|
||
800478c: f109 0901 add.w r9, r9, #1
|
||
8004790: e7ee b.n 8004770 <_printf_float+0x2a8>
|
||
8004792: bf00 nop
|
||
8004794: 7fefffff .word 0x7fefffff
|
||
8004798: 08007ad8 .word 0x08007ad8
|
||
800479c: 08007adc .word 0x08007adc
|
||
80047a0: 08007ae4 .word 0x08007ae4
|
||
80047a4: 08007ae0 .word 0x08007ae0
|
||
80047a8: 08007ae8 .word 0x08007ae8
|
||
80047ac: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
80047ae: 6da3 ldr r3, [r4, #88] ; 0x58
|
||
80047b0: 429a cmp r2, r3
|
||
80047b2: bfa8 it ge
|
||
80047b4: 461a movge r2, r3
|
||
80047b6: 2a00 cmp r2, #0
|
||
80047b8: 4691 mov r9, r2
|
||
80047ba: dc37 bgt.n 800482c <_printf_float+0x364>
|
||
80047bc: f04f 0b00 mov.w fp, #0
|
||
80047c0: ea29 79e9 bic.w r9, r9, r9, asr #31
|
||
80047c4: f104 021a add.w r2, r4, #26
|
||
80047c8: f8d4 a058 ldr.w sl, [r4, #88] ; 0x58
|
||
80047cc: ebaa 0309 sub.w r3, sl, r9
|
||
80047d0: 455b cmp r3, fp
|
||
80047d2: dc33 bgt.n 800483c <_printf_float+0x374>
|
||
80047d4: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
80047d8: 429a cmp r2, r3
|
||
80047da: db3b blt.n 8004854 <_printf_float+0x38c>
|
||
80047dc: 6823 ldr r3, [r4, #0]
|
||
80047de: 07da lsls r2, r3, #31
|
||
80047e0: d438 bmi.n 8004854 <_printf_float+0x38c>
|
||
80047e2: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
80047e4: 990d ldr r1, [sp, #52] ; 0x34
|
||
80047e6: eba2 030a sub.w r3, r2, sl
|
||
80047ea: eba2 0901 sub.w r9, r2, r1
|
||
80047ee: 4599 cmp r9, r3
|
||
80047f0: bfa8 it ge
|
||
80047f2: 4699 movge r9, r3
|
||
80047f4: f1b9 0f00 cmp.w r9, #0
|
||
80047f8: dc34 bgt.n 8004864 <_printf_float+0x39c>
|
||
80047fa: f04f 0800 mov.w r8, #0
|
||
80047fe: ea29 79e9 bic.w r9, r9, r9, asr #31
|
||
8004802: f104 0a1a add.w sl, r4, #26
|
||
8004806: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
800480a: 1a9b subs r3, r3, r2
|
||
800480c: eba3 0309 sub.w r3, r3, r9
|
||
8004810: 4543 cmp r3, r8
|
||
8004812: f77f af7a ble.w 800470a <_printf_float+0x242>
|
||
8004816: 2301 movs r3, #1
|
||
8004818: 4652 mov r2, sl
|
||
800481a: 4631 mov r1, r6
|
||
800481c: 4628 mov r0, r5
|
||
800481e: 47b8 blx r7
|
||
8004820: 3001 adds r0, #1
|
||
8004822: f43f aeac beq.w 800457e <_printf_float+0xb6>
|
||
8004826: f108 0801 add.w r8, r8, #1
|
||
800482a: e7ec b.n 8004806 <_printf_float+0x33e>
|
||
800482c: 4613 mov r3, r2
|
||
800482e: 4631 mov r1, r6
|
||
8004830: 4642 mov r2, r8
|
||
8004832: 4628 mov r0, r5
|
||
8004834: 47b8 blx r7
|
||
8004836: 3001 adds r0, #1
|
||
8004838: d1c0 bne.n 80047bc <_printf_float+0x2f4>
|
||
800483a: e6a0 b.n 800457e <_printf_float+0xb6>
|
||
800483c: 2301 movs r3, #1
|
||
800483e: 4631 mov r1, r6
|
||
8004840: 4628 mov r0, r5
|
||
8004842: 920b str r2, [sp, #44] ; 0x2c
|
||
8004844: 47b8 blx r7
|
||
8004846: 3001 adds r0, #1
|
||
8004848: f43f ae99 beq.w 800457e <_printf_float+0xb6>
|
||
800484c: 9a0b ldr r2, [sp, #44] ; 0x2c
|
||
800484e: f10b 0b01 add.w fp, fp, #1
|
||
8004852: e7b9 b.n 80047c8 <_printf_float+0x300>
|
||
8004854: 4631 mov r1, r6
|
||
8004856: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
800485a: 4628 mov r0, r5
|
||
800485c: 47b8 blx r7
|
||
800485e: 3001 adds r0, #1
|
||
8004860: d1bf bne.n 80047e2 <_printf_float+0x31a>
|
||
8004862: e68c b.n 800457e <_printf_float+0xb6>
|
||
8004864: 464b mov r3, r9
|
||
8004866: 4631 mov r1, r6
|
||
8004868: 4628 mov r0, r5
|
||
800486a: eb08 020a add.w r2, r8, sl
|
||
800486e: 47b8 blx r7
|
||
8004870: 3001 adds r0, #1
|
||
8004872: d1c2 bne.n 80047fa <_printf_float+0x332>
|
||
8004874: e683 b.n 800457e <_printf_float+0xb6>
|
||
8004876: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
8004878: 2a01 cmp r2, #1
|
||
800487a: dc01 bgt.n 8004880 <_printf_float+0x3b8>
|
||
800487c: 07db lsls r3, r3, #31
|
||
800487e: d537 bpl.n 80048f0 <_printf_float+0x428>
|
||
8004880: 2301 movs r3, #1
|
||
8004882: 4642 mov r2, r8
|
||
8004884: 4631 mov r1, r6
|
||
8004886: 4628 mov r0, r5
|
||
8004888: 47b8 blx r7
|
||
800488a: 3001 adds r0, #1
|
||
800488c: f43f ae77 beq.w 800457e <_printf_float+0xb6>
|
||
8004890: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
8004894: 4631 mov r1, r6
|
||
8004896: 4628 mov r0, r5
|
||
8004898: 47b8 blx r7
|
||
800489a: 3001 adds r0, #1
|
||
800489c: f43f ae6f beq.w 800457e <_printf_float+0xb6>
|
||
80048a0: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48
|
||
80048a4: 2200 movs r2, #0
|
||
80048a6: 2300 movs r3, #0
|
||
80048a8: f7fc f8ea bl 8000a80 <__aeabi_dcmpeq>
|
||
80048ac: b9d8 cbnz r0, 80048e6 <_printf_float+0x41e>
|
||
80048ae: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
80048b0: f108 0201 add.w r2, r8, #1
|
||
80048b4: 3b01 subs r3, #1
|
||
80048b6: 4631 mov r1, r6
|
||
80048b8: 4628 mov r0, r5
|
||
80048ba: 47b8 blx r7
|
||
80048bc: 3001 adds r0, #1
|
||
80048be: d10e bne.n 80048de <_printf_float+0x416>
|
||
80048c0: e65d b.n 800457e <_printf_float+0xb6>
|
||
80048c2: 2301 movs r3, #1
|
||
80048c4: 464a mov r2, r9
|
||
80048c6: 4631 mov r1, r6
|
||
80048c8: 4628 mov r0, r5
|
||
80048ca: 47b8 blx r7
|
||
80048cc: 3001 adds r0, #1
|
||
80048ce: f43f ae56 beq.w 800457e <_printf_float+0xb6>
|
||
80048d2: f108 0801 add.w r8, r8, #1
|
||
80048d6: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
80048d8: 3b01 subs r3, #1
|
||
80048da: 4543 cmp r3, r8
|
||
80048dc: dcf1 bgt.n 80048c2 <_printf_float+0x3fa>
|
||
80048de: 4653 mov r3, sl
|
||
80048e0: f104 0250 add.w r2, r4, #80 ; 0x50
|
||
80048e4: e6e0 b.n 80046a8 <_printf_float+0x1e0>
|
||
80048e6: f04f 0800 mov.w r8, #0
|
||
80048ea: f104 091a add.w r9, r4, #26
|
||
80048ee: e7f2 b.n 80048d6 <_printf_float+0x40e>
|
||
80048f0: 2301 movs r3, #1
|
||
80048f2: 4642 mov r2, r8
|
||
80048f4: e7df b.n 80048b6 <_printf_float+0x3ee>
|
||
80048f6: 2301 movs r3, #1
|
||
80048f8: 464a mov r2, r9
|
||
80048fa: 4631 mov r1, r6
|
||
80048fc: 4628 mov r0, r5
|
||
80048fe: 47b8 blx r7
|
||
8004900: 3001 adds r0, #1
|
||
8004902: f43f ae3c beq.w 800457e <_printf_float+0xb6>
|
||
8004906: f108 0801 add.w r8, r8, #1
|
||
800490a: 68e3 ldr r3, [r4, #12]
|
||
800490c: 990f ldr r1, [sp, #60] ; 0x3c
|
||
800490e: 1a5b subs r3, r3, r1
|
||
8004910: 4543 cmp r3, r8
|
||
8004912: dcf0 bgt.n 80048f6 <_printf_float+0x42e>
|
||
8004914: e6fd b.n 8004712 <_printf_float+0x24a>
|
||
8004916: f04f 0800 mov.w r8, #0
|
||
800491a: f104 0919 add.w r9, r4, #25
|
||
800491e: e7f4 b.n 800490a <_printf_float+0x442>
|
||
|
||
08004920 <_printf_common>:
|
||
8004920: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8004924: 4616 mov r6, r2
|
||
8004926: 4699 mov r9, r3
|
||
8004928: 688a ldr r2, [r1, #8]
|
||
800492a: 690b ldr r3, [r1, #16]
|
||
800492c: 4607 mov r7, r0
|
||
800492e: 4293 cmp r3, r2
|
||
8004930: bfb8 it lt
|
||
8004932: 4613 movlt r3, r2
|
||
8004934: 6033 str r3, [r6, #0]
|
||
8004936: f891 2043 ldrb.w r2, [r1, #67] ; 0x43
|
||
800493a: 460c mov r4, r1
|
||
800493c: f8dd 8020 ldr.w r8, [sp, #32]
|
||
8004940: b10a cbz r2, 8004946 <_printf_common+0x26>
|
||
8004942: 3301 adds r3, #1
|
||
8004944: 6033 str r3, [r6, #0]
|
||
8004946: 6823 ldr r3, [r4, #0]
|
||
8004948: 0699 lsls r1, r3, #26
|
||
800494a: bf42 ittt mi
|
||
800494c: 6833 ldrmi r3, [r6, #0]
|
||
800494e: 3302 addmi r3, #2
|
||
8004950: 6033 strmi r3, [r6, #0]
|
||
8004952: 6825 ldr r5, [r4, #0]
|
||
8004954: f015 0506 ands.w r5, r5, #6
|
||
8004958: d106 bne.n 8004968 <_printf_common+0x48>
|
||
800495a: f104 0a19 add.w sl, r4, #25
|
||
800495e: 68e3 ldr r3, [r4, #12]
|
||
8004960: 6832 ldr r2, [r6, #0]
|
||
8004962: 1a9b subs r3, r3, r2
|
||
8004964: 42ab cmp r3, r5
|
||
8004966: dc28 bgt.n 80049ba <_printf_common+0x9a>
|
||
8004968: f894 2043 ldrb.w r2, [r4, #67] ; 0x43
|
||
800496c: 1e13 subs r3, r2, #0
|
||
800496e: 6822 ldr r2, [r4, #0]
|
||
8004970: bf18 it ne
|
||
8004972: 2301 movne r3, #1
|
||
8004974: 0692 lsls r2, r2, #26
|
||
8004976: d42d bmi.n 80049d4 <_printf_common+0xb4>
|
||
8004978: 4649 mov r1, r9
|
||
800497a: 4638 mov r0, r7
|
||
800497c: f104 0243 add.w r2, r4, #67 ; 0x43
|
||
8004980: 47c0 blx r8
|
||
8004982: 3001 adds r0, #1
|
||
8004984: d020 beq.n 80049c8 <_printf_common+0xa8>
|
||
8004986: 6823 ldr r3, [r4, #0]
|
||
8004988: 68e5 ldr r5, [r4, #12]
|
||
800498a: f003 0306 and.w r3, r3, #6
|
||
800498e: 2b04 cmp r3, #4
|
||
8004990: bf18 it ne
|
||
8004992: 2500 movne r5, #0
|
||
8004994: 6832 ldr r2, [r6, #0]
|
||
8004996: f04f 0600 mov.w r6, #0
|
||
800499a: 68a3 ldr r3, [r4, #8]
|
||
800499c: bf08 it eq
|
||
800499e: 1aad subeq r5, r5, r2
|
||
80049a0: 6922 ldr r2, [r4, #16]
|
||
80049a2: bf08 it eq
|
||
80049a4: ea25 75e5 biceq.w r5, r5, r5, asr #31
|
||
80049a8: 4293 cmp r3, r2
|
||
80049aa: bfc4 itt gt
|
||
80049ac: 1a9b subgt r3, r3, r2
|
||
80049ae: 18ed addgt r5, r5, r3
|
||
80049b0: 341a adds r4, #26
|
||
80049b2: 42b5 cmp r5, r6
|
||
80049b4: d11a bne.n 80049ec <_printf_common+0xcc>
|
||
80049b6: 2000 movs r0, #0
|
||
80049b8: e008 b.n 80049cc <_printf_common+0xac>
|
||
80049ba: 2301 movs r3, #1
|
||
80049bc: 4652 mov r2, sl
|
||
80049be: 4649 mov r1, r9
|
||
80049c0: 4638 mov r0, r7
|
||
80049c2: 47c0 blx r8
|
||
80049c4: 3001 adds r0, #1
|
||
80049c6: d103 bne.n 80049d0 <_printf_common+0xb0>
|
||
80049c8: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
80049cc: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
80049d0: 3501 adds r5, #1
|
||
80049d2: e7c4 b.n 800495e <_printf_common+0x3e>
|
||
80049d4: 2030 movs r0, #48 ; 0x30
|
||
80049d6: 18e1 adds r1, r4, r3
|
||
80049d8: f881 0043 strb.w r0, [r1, #67] ; 0x43
|
||
80049dc: 1c5a adds r2, r3, #1
|
||
80049de: f894 1045 ldrb.w r1, [r4, #69] ; 0x45
|
||
80049e2: 4422 add r2, r4
|
||
80049e4: 3302 adds r3, #2
|
||
80049e6: f882 1043 strb.w r1, [r2, #67] ; 0x43
|
||
80049ea: e7c5 b.n 8004978 <_printf_common+0x58>
|
||
80049ec: 2301 movs r3, #1
|
||
80049ee: 4622 mov r2, r4
|
||
80049f0: 4649 mov r1, r9
|
||
80049f2: 4638 mov r0, r7
|
||
80049f4: 47c0 blx r8
|
||
80049f6: 3001 adds r0, #1
|
||
80049f8: d0e6 beq.n 80049c8 <_printf_common+0xa8>
|
||
80049fa: 3601 adds r6, #1
|
||
80049fc: e7d9 b.n 80049b2 <_printf_common+0x92>
|
||
...
|
||
|
||
08004a00 <_printf_i>:
|
||
8004a00: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8004a04: 460c mov r4, r1
|
||
8004a06: 7e27 ldrb r7, [r4, #24]
|
||
8004a08: 4691 mov r9, r2
|
||
8004a0a: 2f78 cmp r7, #120 ; 0x78
|
||
8004a0c: 4680 mov r8, r0
|
||
8004a0e: 469a mov sl, r3
|
||
8004a10: 990c ldr r1, [sp, #48] ; 0x30
|
||
8004a12: f104 0243 add.w r2, r4, #67 ; 0x43
|
||
8004a16: d807 bhi.n 8004a28 <_printf_i+0x28>
|
||
8004a18: 2f62 cmp r7, #98 ; 0x62
|
||
8004a1a: d80a bhi.n 8004a32 <_printf_i+0x32>
|
||
8004a1c: 2f00 cmp r7, #0
|
||
8004a1e: f000 80d9 beq.w 8004bd4 <_printf_i+0x1d4>
|
||
8004a22: 2f58 cmp r7, #88 ; 0x58
|
||
8004a24: f000 80a4 beq.w 8004b70 <_printf_i+0x170>
|
||
8004a28: f104 0642 add.w r6, r4, #66 ; 0x42
|
||
8004a2c: f884 7042 strb.w r7, [r4, #66] ; 0x42
|
||
8004a30: e03a b.n 8004aa8 <_printf_i+0xa8>
|
||
8004a32: f1a7 0363 sub.w r3, r7, #99 ; 0x63
|
||
8004a36: 2b15 cmp r3, #21
|
||
8004a38: d8f6 bhi.n 8004a28 <_printf_i+0x28>
|
||
8004a3a: a001 add r0, pc, #4 ; (adr r0, 8004a40 <_printf_i+0x40>)
|
||
8004a3c: f850 f023 ldr.w pc, [r0, r3, lsl #2]
|
||
8004a40: 08004a99 .word 0x08004a99
|
||
8004a44: 08004aad .word 0x08004aad
|
||
8004a48: 08004a29 .word 0x08004a29
|
||
8004a4c: 08004a29 .word 0x08004a29
|
||
8004a50: 08004a29 .word 0x08004a29
|
||
8004a54: 08004a29 .word 0x08004a29
|
||
8004a58: 08004aad .word 0x08004aad
|
||
8004a5c: 08004a29 .word 0x08004a29
|
||
8004a60: 08004a29 .word 0x08004a29
|
||
8004a64: 08004a29 .word 0x08004a29
|
||
8004a68: 08004a29 .word 0x08004a29
|
||
8004a6c: 08004bbb .word 0x08004bbb
|
||
8004a70: 08004add .word 0x08004add
|
||
8004a74: 08004b9d .word 0x08004b9d
|
||
8004a78: 08004a29 .word 0x08004a29
|
||
8004a7c: 08004a29 .word 0x08004a29
|
||
8004a80: 08004bdd .word 0x08004bdd
|
||
8004a84: 08004a29 .word 0x08004a29
|
||
8004a88: 08004add .word 0x08004add
|
||
8004a8c: 08004a29 .word 0x08004a29
|
||
8004a90: 08004a29 .word 0x08004a29
|
||
8004a94: 08004ba5 .word 0x08004ba5
|
||
8004a98: 680b ldr r3, [r1, #0]
|
||
8004a9a: f104 0642 add.w r6, r4, #66 ; 0x42
|
||
8004a9e: 1d1a adds r2, r3, #4
|
||
8004aa0: 681b ldr r3, [r3, #0]
|
||
8004aa2: 600a str r2, [r1, #0]
|
||
8004aa4: f884 3042 strb.w r3, [r4, #66] ; 0x42
|
||
8004aa8: 2301 movs r3, #1
|
||
8004aaa: e0a4 b.n 8004bf6 <_printf_i+0x1f6>
|
||
8004aac: 6825 ldr r5, [r4, #0]
|
||
8004aae: 6808 ldr r0, [r1, #0]
|
||
8004ab0: 062e lsls r6, r5, #24
|
||
8004ab2: f100 0304 add.w r3, r0, #4
|
||
8004ab6: d50a bpl.n 8004ace <_printf_i+0xce>
|
||
8004ab8: 6805 ldr r5, [r0, #0]
|
||
8004aba: 600b str r3, [r1, #0]
|
||
8004abc: 2d00 cmp r5, #0
|
||
8004abe: da03 bge.n 8004ac8 <_printf_i+0xc8>
|
||
8004ac0: 232d movs r3, #45 ; 0x2d
|
||
8004ac2: 426d negs r5, r5
|
||
8004ac4: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
8004ac8: 230a movs r3, #10
|
||
8004aca: 485e ldr r0, [pc, #376] ; (8004c44 <_printf_i+0x244>)
|
||
8004acc: e019 b.n 8004b02 <_printf_i+0x102>
|
||
8004ace: f015 0f40 tst.w r5, #64 ; 0x40
|
||
8004ad2: 6805 ldr r5, [r0, #0]
|
||
8004ad4: 600b str r3, [r1, #0]
|
||
8004ad6: bf18 it ne
|
||
8004ad8: b22d sxthne r5, r5
|
||
8004ada: e7ef b.n 8004abc <_printf_i+0xbc>
|
||
8004adc: 680b ldr r3, [r1, #0]
|
||
8004ade: 6825 ldr r5, [r4, #0]
|
||
8004ae0: 1d18 adds r0, r3, #4
|
||
8004ae2: 6008 str r0, [r1, #0]
|
||
8004ae4: 0628 lsls r0, r5, #24
|
||
8004ae6: d501 bpl.n 8004aec <_printf_i+0xec>
|
||
8004ae8: 681d ldr r5, [r3, #0]
|
||
8004aea: e002 b.n 8004af2 <_printf_i+0xf2>
|
||
8004aec: 0669 lsls r1, r5, #25
|
||
8004aee: d5fb bpl.n 8004ae8 <_printf_i+0xe8>
|
||
8004af0: 881d ldrh r5, [r3, #0]
|
||
8004af2: 2f6f cmp r7, #111 ; 0x6f
|
||
8004af4: bf0c ite eq
|
||
8004af6: 2308 moveq r3, #8
|
||
8004af8: 230a movne r3, #10
|
||
8004afa: 4852 ldr r0, [pc, #328] ; (8004c44 <_printf_i+0x244>)
|
||
8004afc: 2100 movs r1, #0
|
||
8004afe: f884 1043 strb.w r1, [r4, #67] ; 0x43
|
||
8004b02: 6866 ldr r6, [r4, #4]
|
||
8004b04: 2e00 cmp r6, #0
|
||
8004b06: bfa8 it ge
|
||
8004b08: 6821 ldrge r1, [r4, #0]
|
||
8004b0a: 60a6 str r6, [r4, #8]
|
||
8004b0c: bfa4 itt ge
|
||
8004b0e: f021 0104 bicge.w r1, r1, #4
|
||
8004b12: 6021 strge r1, [r4, #0]
|
||
8004b14: b90d cbnz r5, 8004b1a <_printf_i+0x11a>
|
||
8004b16: 2e00 cmp r6, #0
|
||
8004b18: d04d beq.n 8004bb6 <_printf_i+0x1b6>
|
||
8004b1a: 4616 mov r6, r2
|
||
8004b1c: fbb5 f1f3 udiv r1, r5, r3
|
||
8004b20: fb03 5711 mls r7, r3, r1, r5
|
||
8004b24: 5dc7 ldrb r7, [r0, r7]
|
||
8004b26: f806 7d01 strb.w r7, [r6, #-1]!
|
||
8004b2a: 462f mov r7, r5
|
||
8004b2c: 42bb cmp r3, r7
|
||
8004b2e: 460d mov r5, r1
|
||
8004b30: d9f4 bls.n 8004b1c <_printf_i+0x11c>
|
||
8004b32: 2b08 cmp r3, #8
|
||
8004b34: d10b bne.n 8004b4e <_printf_i+0x14e>
|
||
8004b36: 6823 ldr r3, [r4, #0]
|
||
8004b38: 07df lsls r7, r3, #31
|
||
8004b3a: d508 bpl.n 8004b4e <_printf_i+0x14e>
|
||
8004b3c: 6923 ldr r3, [r4, #16]
|
||
8004b3e: 6861 ldr r1, [r4, #4]
|
||
8004b40: 4299 cmp r1, r3
|
||
8004b42: bfde ittt le
|
||
8004b44: 2330 movle r3, #48 ; 0x30
|
||
8004b46: f806 3c01 strble.w r3, [r6, #-1]
|
||
8004b4a: f106 36ff addle.w r6, r6, #4294967295 ; 0xffffffff
|
||
8004b4e: 1b92 subs r2, r2, r6
|
||
8004b50: 6122 str r2, [r4, #16]
|
||
8004b52: 464b mov r3, r9
|
||
8004b54: 4621 mov r1, r4
|
||
8004b56: 4640 mov r0, r8
|
||
8004b58: f8cd a000 str.w sl, [sp]
|
||
8004b5c: aa03 add r2, sp, #12
|
||
8004b5e: f7ff fedf bl 8004920 <_printf_common>
|
||
8004b62: 3001 adds r0, #1
|
||
8004b64: d14c bne.n 8004c00 <_printf_i+0x200>
|
||
8004b66: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8004b6a: b004 add sp, #16
|
||
8004b6c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8004b70: 4834 ldr r0, [pc, #208] ; (8004c44 <_printf_i+0x244>)
|
||
8004b72: f884 7045 strb.w r7, [r4, #69] ; 0x45
|
||
8004b76: 680e ldr r6, [r1, #0]
|
||
8004b78: 6823 ldr r3, [r4, #0]
|
||
8004b7a: f856 5b04 ldr.w r5, [r6], #4
|
||
8004b7e: 061f lsls r7, r3, #24
|
||
8004b80: 600e str r6, [r1, #0]
|
||
8004b82: d514 bpl.n 8004bae <_printf_i+0x1ae>
|
||
8004b84: 07d9 lsls r1, r3, #31
|
||
8004b86: bf44 itt mi
|
||
8004b88: f043 0320 orrmi.w r3, r3, #32
|
||
8004b8c: 6023 strmi r3, [r4, #0]
|
||
8004b8e: b91d cbnz r5, 8004b98 <_printf_i+0x198>
|
||
8004b90: 6823 ldr r3, [r4, #0]
|
||
8004b92: f023 0320 bic.w r3, r3, #32
|
||
8004b96: 6023 str r3, [r4, #0]
|
||
8004b98: 2310 movs r3, #16
|
||
8004b9a: e7af b.n 8004afc <_printf_i+0xfc>
|
||
8004b9c: 6823 ldr r3, [r4, #0]
|
||
8004b9e: f043 0320 orr.w r3, r3, #32
|
||
8004ba2: 6023 str r3, [r4, #0]
|
||
8004ba4: 2378 movs r3, #120 ; 0x78
|
||
8004ba6: 4828 ldr r0, [pc, #160] ; (8004c48 <_printf_i+0x248>)
|
||
8004ba8: f884 3045 strb.w r3, [r4, #69] ; 0x45
|
||
8004bac: e7e3 b.n 8004b76 <_printf_i+0x176>
|
||
8004bae: 065e lsls r6, r3, #25
|
||
8004bb0: bf48 it mi
|
||
8004bb2: b2ad uxthmi r5, r5
|
||
8004bb4: e7e6 b.n 8004b84 <_printf_i+0x184>
|
||
8004bb6: 4616 mov r6, r2
|
||
8004bb8: e7bb b.n 8004b32 <_printf_i+0x132>
|
||
8004bba: 680b ldr r3, [r1, #0]
|
||
8004bbc: 6826 ldr r6, [r4, #0]
|
||
8004bbe: 1d1d adds r5, r3, #4
|
||
8004bc0: 6960 ldr r0, [r4, #20]
|
||
8004bc2: 600d str r5, [r1, #0]
|
||
8004bc4: 0635 lsls r5, r6, #24
|
||
8004bc6: 681b ldr r3, [r3, #0]
|
||
8004bc8: d501 bpl.n 8004bce <_printf_i+0x1ce>
|
||
8004bca: 6018 str r0, [r3, #0]
|
||
8004bcc: e002 b.n 8004bd4 <_printf_i+0x1d4>
|
||
8004bce: 0671 lsls r1, r6, #25
|
||
8004bd0: d5fb bpl.n 8004bca <_printf_i+0x1ca>
|
||
8004bd2: 8018 strh r0, [r3, #0]
|
||
8004bd4: 2300 movs r3, #0
|
||
8004bd6: 4616 mov r6, r2
|
||
8004bd8: 6123 str r3, [r4, #16]
|
||
8004bda: e7ba b.n 8004b52 <_printf_i+0x152>
|
||
8004bdc: 680b ldr r3, [r1, #0]
|
||
8004bde: 1d1a adds r2, r3, #4
|
||
8004be0: 600a str r2, [r1, #0]
|
||
8004be2: 681e ldr r6, [r3, #0]
|
||
8004be4: 2100 movs r1, #0
|
||
8004be6: 4630 mov r0, r6
|
||
8004be8: 6862 ldr r2, [r4, #4]
|
||
8004bea: f000 fedf bl 80059ac <memchr>
|
||
8004bee: b108 cbz r0, 8004bf4 <_printf_i+0x1f4>
|
||
8004bf0: 1b80 subs r0, r0, r6
|
||
8004bf2: 6060 str r0, [r4, #4]
|
||
8004bf4: 6863 ldr r3, [r4, #4]
|
||
8004bf6: 6123 str r3, [r4, #16]
|
||
8004bf8: 2300 movs r3, #0
|
||
8004bfa: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
8004bfe: e7a8 b.n 8004b52 <_printf_i+0x152>
|
||
8004c00: 4632 mov r2, r6
|
||
8004c02: 4649 mov r1, r9
|
||
8004c04: 4640 mov r0, r8
|
||
8004c06: 6923 ldr r3, [r4, #16]
|
||
8004c08: 47d0 blx sl
|
||
8004c0a: 3001 adds r0, #1
|
||
8004c0c: d0ab beq.n 8004b66 <_printf_i+0x166>
|
||
8004c0e: 6823 ldr r3, [r4, #0]
|
||
8004c10: 079b lsls r3, r3, #30
|
||
8004c12: d413 bmi.n 8004c3c <_printf_i+0x23c>
|
||
8004c14: 68e0 ldr r0, [r4, #12]
|
||
8004c16: 9b03 ldr r3, [sp, #12]
|
||
8004c18: 4298 cmp r0, r3
|
||
8004c1a: bfb8 it lt
|
||
8004c1c: 4618 movlt r0, r3
|
||
8004c1e: e7a4 b.n 8004b6a <_printf_i+0x16a>
|
||
8004c20: 2301 movs r3, #1
|
||
8004c22: 4632 mov r2, r6
|
||
8004c24: 4649 mov r1, r9
|
||
8004c26: 4640 mov r0, r8
|
||
8004c28: 47d0 blx sl
|
||
8004c2a: 3001 adds r0, #1
|
||
8004c2c: d09b beq.n 8004b66 <_printf_i+0x166>
|
||
8004c2e: 3501 adds r5, #1
|
||
8004c30: 68e3 ldr r3, [r4, #12]
|
||
8004c32: 9903 ldr r1, [sp, #12]
|
||
8004c34: 1a5b subs r3, r3, r1
|
||
8004c36: 42ab cmp r3, r5
|
||
8004c38: dcf2 bgt.n 8004c20 <_printf_i+0x220>
|
||
8004c3a: e7eb b.n 8004c14 <_printf_i+0x214>
|
||
8004c3c: 2500 movs r5, #0
|
||
8004c3e: f104 0619 add.w r6, r4, #25
|
||
8004c42: e7f5 b.n 8004c30 <_printf_i+0x230>
|
||
8004c44: 08007aea .word 0x08007aea
|
||
8004c48: 08007afb .word 0x08007afb
|
||
|
||
08004c4c <_sbrk_r>:
|
||
8004c4c: b538 push {r3, r4, r5, lr}
|
||
8004c4e: 2300 movs r3, #0
|
||
8004c50: 4d05 ldr r5, [pc, #20] ; (8004c68 <_sbrk_r+0x1c>)
|
||
8004c52: 4604 mov r4, r0
|
||
8004c54: 4608 mov r0, r1
|
||
8004c56: 602b str r3, [r5, #0]
|
||
8004c58: f7fc fcec bl 8001634 <_sbrk>
|
||
8004c5c: 1c43 adds r3, r0, #1
|
||
8004c5e: d102 bne.n 8004c66 <_sbrk_r+0x1a>
|
||
8004c60: 682b ldr r3, [r5, #0]
|
||
8004c62: b103 cbz r3, 8004c66 <_sbrk_r+0x1a>
|
||
8004c64: 6023 str r3, [r4, #0]
|
||
8004c66: bd38 pop {r3, r4, r5, pc}
|
||
8004c68: 20000288 .word 0x20000288
|
||
|
||
08004c6c <siprintf>:
|
||
8004c6c: b40e push {r1, r2, r3}
|
||
8004c6e: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000
|
||
8004c72: b500 push {lr}
|
||
8004c74: b09c sub sp, #112 ; 0x70
|
||
8004c76: ab1d add r3, sp, #116 ; 0x74
|
||
8004c78: 9002 str r0, [sp, #8]
|
||
8004c7a: 9006 str r0, [sp, #24]
|
||
8004c7c: 9107 str r1, [sp, #28]
|
||
8004c7e: 9104 str r1, [sp, #16]
|
||
8004c80: 4808 ldr r0, [pc, #32] ; (8004ca4 <siprintf+0x38>)
|
||
8004c82: 4909 ldr r1, [pc, #36] ; (8004ca8 <siprintf+0x3c>)
|
||
8004c84: f853 2b04 ldr.w r2, [r3], #4
|
||
8004c88: 9105 str r1, [sp, #20]
|
||
8004c8a: 6800 ldr r0, [r0, #0]
|
||
8004c8c: a902 add r1, sp, #8
|
||
8004c8e: 9301 str r3, [sp, #4]
|
||
8004c90: f001 faa0 bl 80061d4 <_svfiprintf_r>
|
||
8004c94: 2200 movs r2, #0
|
||
8004c96: 9b02 ldr r3, [sp, #8]
|
||
8004c98: 701a strb r2, [r3, #0]
|
||
8004c9a: b01c add sp, #112 ; 0x70
|
||
8004c9c: f85d eb04 ldr.w lr, [sp], #4
|
||
8004ca0: b003 add sp, #12
|
||
8004ca2: 4770 bx lr
|
||
8004ca4: 2000000c .word 0x2000000c
|
||
8004ca8: ffff0208 .word 0xffff0208
|
||
|
||
08004cac <quorem>:
|
||
8004cac: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8004cb0: 6903 ldr r3, [r0, #16]
|
||
8004cb2: 690c ldr r4, [r1, #16]
|
||
8004cb4: 4607 mov r7, r0
|
||
8004cb6: 42a3 cmp r3, r4
|
||
8004cb8: f2c0 8083 blt.w 8004dc2 <quorem+0x116>
|
||
8004cbc: 3c01 subs r4, #1
|
||
8004cbe: f100 0514 add.w r5, r0, #20
|
||
8004cc2: f101 0814 add.w r8, r1, #20
|
||
8004cc6: eb05 0384 add.w r3, r5, r4, lsl #2
|
||
8004cca: 9301 str r3, [sp, #4]
|
||
8004ccc: f858 3024 ldr.w r3, [r8, r4, lsl #2]
|
||
8004cd0: f855 2024 ldr.w r2, [r5, r4, lsl #2]
|
||
8004cd4: 3301 adds r3, #1
|
||
8004cd6: 429a cmp r2, r3
|
||
8004cd8: fbb2 f6f3 udiv r6, r2, r3
|
||
8004cdc: ea4f 0b84 mov.w fp, r4, lsl #2
|
||
8004ce0: eb08 0984 add.w r9, r8, r4, lsl #2
|
||
8004ce4: d332 bcc.n 8004d4c <quorem+0xa0>
|
||
8004ce6: f04f 0e00 mov.w lr, #0
|
||
8004cea: 4640 mov r0, r8
|
||
8004cec: 46ac mov ip, r5
|
||
8004cee: 46f2 mov sl, lr
|
||
8004cf0: f850 2b04 ldr.w r2, [r0], #4
|
||
8004cf4: b293 uxth r3, r2
|
||
8004cf6: fb06 e303 mla r3, r6, r3, lr
|
||
8004cfa: 0c12 lsrs r2, r2, #16
|
||
8004cfc: ea4f 4e13 mov.w lr, r3, lsr #16
|
||
8004d00: fb06 e202 mla r2, r6, r2, lr
|
||
8004d04: b29b uxth r3, r3
|
||
8004d06: ebaa 0303 sub.w r3, sl, r3
|
||
8004d0a: f8dc a000 ldr.w sl, [ip]
|
||
8004d0e: ea4f 4e12 mov.w lr, r2, lsr #16
|
||
8004d12: fa1f fa8a uxth.w sl, sl
|
||
8004d16: 4453 add r3, sl
|
||
8004d18: fa1f fa82 uxth.w sl, r2
|
||
8004d1c: f8dc 2000 ldr.w r2, [ip]
|
||
8004d20: 4581 cmp r9, r0
|
||
8004d22: ebca 4212 rsb r2, sl, r2, lsr #16
|
||
8004d26: eb02 4223 add.w r2, r2, r3, asr #16
|
||
8004d2a: b29b uxth r3, r3
|
||
8004d2c: ea43 4302 orr.w r3, r3, r2, lsl #16
|
||
8004d30: ea4f 4a22 mov.w sl, r2, asr #16
|
||
8004d34: f84c 3b04 str.w r3, [ip], #4
|
||
8004d38: d2da bcs.n 8004cf0 <quorem+0x44>
|
||
8004d3a: f855 300b ldr.w r3, [r5, fp]
|
||
8004d3e: b92b cbnz r3, 8004d4c <quorem+0xa0>
|
||
8004d40: 9b01 ldr r3, [sp, #4]
|
||
8004d42: 3b04 subs r3, #4
|
||
8004d44: 429d cmp r5, r3
|
||
8004d46: 461a mov r2, r3
|
||
8004d48: d32f bcc.n 8004daa <quorem+0xfe>
|
||
8004d4a: 613c str r4, [r7, #16]
|
||
8004d4c: 4638 mov r0, r7
|
||
8004d4e: f001 f8cf bl 8005ef0 <__mcmp>
|
||
8004d52: 2800 cmp r0, #0
|
||
8004d54: db25 blt.n 8004da2 <quorem+0xf6>
|
||
8004d56: 4628 mov r0, r5
|
||
8004d58: f04f 0c00 mov.w ip, #0
|
||
8004d5c: 3601 adds r6, #1
|
||
8004d5e: f858 1b04 ldr.w r1, [r8], #4
|
||
8004d62: f8d0 e000 ldr.w lr, [r0]
|
||
8004d66: b28b uxth r3, r1
|
||
8004d68: ebac 0303 sub.w r3, ip, r3
|
||
8004d6c: fa1f f28e uxth.w r2, lr
|
||
8004d70: 4413 add r3, r2
|
||
8004d72: 0c0a lsrs r2, r1, #16
|
||
8004d74: ebc2 421e rsb r2, r2, lr, lsr #16
|
||
8004d78: eb02 4223 add.w r2, r2, r3, asr #16
|
||
8004d7c: b29b uxth r3, r3
|
||
8004d7e: ea43 4302 orr.w r3, r3, r2, lsl #16
|
||
8004d82: 45c1 cmp r9, r8
|
||
8004d84: ea4f 4c22 mov.w ip, r2, asr #16
|
||
8004d88: f840 3b04 str.w r3, [r0], #4
|
||
8004d8c: d2e7 bcs.n 8004d5e <quorem+0xb2>
|
||
8004d8e: f855 2024 ldr.w r2, [r5, r4, lsl #2]
|
||
8004d92: eb05 0384 add.w r3, r5, r4, lsl #2
|
||
8004d96: b922 cbnz r2, 8004da2 <quorem+0xf6>
|
||
8004d98: 3b04 subs r3, #4
|
||
8004d9a: 429d cmp r5, r3
|
||
8004d9c: 461a mov r2, r3
|
||
8004d9e: d30a bcc.n 8004db6 <quorem+0x10a>
|
||
8004da0: 613c str r4, [r7, #16]
|
||
8004da2: 4630 mov r0, r6
|
||
8004da4: b003 add sp, #12
|
||
8004da6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8004daa: 6812 ldr r2, [r2, #0]
|
||
8004dac: 3b04 subs r3, #4
|
||
8004dae: 2a00 cmp r2, #0
|
||
8004db0: d1cb bne.n 8004d4a <quorem+0x9e>
|
||
8004db2: 3c01 subs r4, #1
|
||
8004db4: e7c6 b.n 8004d44 <quorem+0x98>
|
||
8004db6: 6812 ldr r2, [r2, #0]
|
||
8004db8: 3b04 subs r3, #4
|
||
8004dba: 2a00 cmp r2, #0
|
||
8004dbc: d1f0 bne.n 8004da0 <quorem+0xf4>
|
||
8004dbe: 3c01 subs r4, #1
|
||
8004dc0: e7eb b.n 8004d9a <quorem+0xee>
|
||
8004dc2: 2000 movs r0, #0
|
||
8004dc4: e7ee b.n 8004da4 <quorem+0xf8>
|
||
...
|
||
|
||
08004dc8 <_dtoa_r>:
|
||
8004dc8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8004dcc: 4616 mov r6, r2
|
||
8004dce: 461f mov r7, r3
|
||
8004dd0: 6a44 ldr r4, [r0, #36] ; 0x24
|
||
8004dd2: b099 sub sp, #100 ; 0x64
|
||
8004dd4: 4605 mov r5, r0
|
||
8004dd6: e9cd 6704 strd r6, r7, [sp, #16]
|
||
8004dda: f8dd 8094 ldr.w r8, [sp, #148] ; 0x94
|
||
8004dde: b974 cbnz r4, 8004dfe <_dtoa_r+0x36>
|
||
8004de0: 2010 movs r0, #16
|
||
8004de2: f7ff fa1d bl 8004220 <malloc>
|
||
8004de6: 4602 mov r2, r0
|
||
8004de8: 6268 str r0, [r5, #36] ; 0x24
|
||
8004dea: b920 cbnz r0, 8004df6 <_dtoa_r+0x2e>
|
||
8004dec: 21ea movs r1, #234 ; 0xea
|
||
8004dee: 4bae ldr r3, [pc, #696] ; (80050a8 <_dtoa_r+0x2e0>)
|
||
8004df0: 48ae ldr r0, [pc, #696] ; (80050ac <_dtoa_r+0x2e4>)
|
||
8004df2: f001 faef bl 80063d4 <__assert_func>
|
||
8004df6: e9c0 4401 strd r4, r4, [r0, #4]
|
||
8004dfa: 6004 str r4, [r0, #0]
|
||
8004dfc: 60c4 str r4, [r0, #12]
|
||
8004dfe: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
8004e00: 6819 ldr r1, [r3, #0]
|
||
8004e02: b151 cbz r1, 8004e1a <_dtoa_r+0x52>
|
||
8004e04: 685a ldr r2, [r3, #4]
|
||
8004e06: 2301 movs r3, #1
|
||
8004e08: 4093 lsls r3, r2
|
||
8004e0a: 604a str r2, [r1, #4]
|
||
8004e0c: 608b str r3, [r1, #8]
|
||
8004e0e: 4628 mov r0, r5
|
||
8004e10: f000 fe34 bl 8005a7c <_Bfree>
|
||
8004e14: 2200 movs r2, #0
|
||
8004e16: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
8004e18: 601a str r2, [r3, #0]
|
||
8004e1a: 1e3b subs r3, r7, #0
|
||
8004e1c: bfaf iteee ge
|
||
8004e1e: 2300 movge r3, #0
|
||
8004e20: 2201 movlt r2, #1
|
||
8004e22: f023 4300 biclt.w r3, r3, #2147483648 ; 0x80000000
|
||
8004e26: 9305 strlt r3, [sp, #20]
|
||
8004e28: bfa8 it ge
|
||
8004e2a: f8c8 3000 strge.w r3, [r8]
|
||
8004e2e: f8dd 9014 ldr.w r9, [sp, #20]
|
||
8004e32: 4b9f ldr r3, [pc, #636] ; (80050b0 <_dtoa_r+0x2e8>)
|
||
8004e34: bfb8 it lt
|
||
8004e36: f8c8 2000 strlt.w r2, [r8]
|
||
8004e3a: ea33 0309 bics.w r3, r3, r9
|
||
8004e3e: d119 bne.n 8004e74 <_dtoa_r+0xac>
|
||
8004e40: f242 730f movw r3, #9999 ; 0x270f
|
||
8004e44: 9a24 ldr r2, [sp, #144] ; 0x90
|
||
8004e46: 6013 str r3, [r2, #0]
|
||
8004e48: f3c9 0313 ubfx r3, r9, #0, #20
|
||
8004e4c: 4333 orrs r3, r6
|
||
8004e4e: f000 8580 beq.w 8005952 <_dtoa_r+0xb8a>
|
||
8004e52: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
8004e54: b953 cbnz r3, 8004e6c <_dtoa_r+0xa4>
|
||
8004e56: 4b97 ldr r3, [pc, #604] ; (80050b4 <_dtoa_r+0x2ec>)
|
||
8004e58: e022 b.n 8004ea0 <_dtoa_r+0xd8>
|
||
8004e5a: 4b97 ldr r3, [pc, #604] ; (80050b8 <_dtoa_r+0x2f0>)
|
||
8004e5c: 9308 str r3, [sp, #32]
|
||
8004e5e: 3308 adds r3, #8
|
||
8004e60: 9a26 ldr r2, [sp, #152] ; 0x98
|
||
8004e62: 6013 str r3, [r2, #0]
|
||
8004e64: 9808 ldr r0, [sp, #32]
|
||
8004e66: b019 add sp, #100 ; 0x64
|
||
8004e68: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8004e6c: 4b91 ldr r3, [pc, #580] ; (80050b4 <_dtoa_r+0x2ec>)
|
||
8004e6e: 9308 str r3, [sp, #32]
|
||
8004e70: 3303 adds r3, #3
|
||
8004e72: e7f5 b.n 8004e60 <_dtoa_r+0x98>
|
||
8004e74: e9dd 3404 ldrd r3, r4, [sp, #16]
|
||
8004e78: e9cd 340c strd r3, r4, [sp, #48] ; 0x30
|
||
8004e7c: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
8004e80: 2200 movs r2, #0
|
||
8004e82: 2300 movs r3, #0
|
||
8004e84: f7fb fdfc bl 8000a80 <__aeabi_dcmpeq>
|
||
8004e88: 4680 mov r8, r0
|
||
8004e8a: b158 cbz r0, 8004ea4 <_dtoa_r+0xdc>
|
||
8004e8c: 2301 movs r3, #1
|
||
8004e8e: 9a24 ldr r2, [sp, #144] ; 0x90
|
||
8004e90: 6013 str r3, [r2, #0]
|
||
8004e92: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
8004e94: 2b00 cmp r3, #0
|
||
8004e96: f000 8559 beq.w 800594c <_dtoa_r+0xb84>
|
||
8004e9a: 4888 ldr r0, [pc, #544] ; (80050bc <_dtoa_r+0x2f4>)
|
||
8004e9c: 6018 str r0, [r3, #0]
|
||
8004e9e: 1e43 subs r3, r0, #1
|
||
8004ea0: 9308 str r3, [sp, #32]
|
||
8004ea2: e7df b.n 8004e64 <_dtoa_r+0x9c>
|
||
8004ea4: ab16 add r3, sp, #88 ; 0x58
|
||
8004ea6: 9301 str r3, [sp, #4]
|
||
8004ea8: ab17 add r3, sp, #92 ; 0x5c
|
||
8004eaa: 9300 str r3, [sp, #0]
|
||
8004eac: 4628 mov r0, r5
|
||
8004eae: e9dd 230c ldrd r2, r3, [sp, #48] ; 0x30
|
||
8004eb2: f001 f8c9 bl 8006048 <__d2b>
|
||
8004eb6: f3c9 540a ubfx r4, r9, #20, #11
|
||
8004eba: 4682 mov sl, r0
|
||
8004ebc: 2c00 cmp r4, #0
|
||
8004ebe: d07e beq.n 8004fbe <_dtoa_r+0x1f6>
|
||
8004ec0: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
8004ec4: 9b0d ldr r3, [sp, #52] ; 0x34
|
||
8004ec6: f2a4 34ff subw r4, r4, #1023 ; 0x3ff
|
||
8004eca: f3c3 0313 ubfx r3, r3, #0, #20
|
||
8004ece: f043 517f orr.w r1, r3, #1069547520 ; 0x3fc00000
|
||
8004ed2: f441 1140 orr.w r1, r1, #3145728 ; 0x300000
|
||
8004ed6: f8cd 804c str.w r8, [sp, #76] ; 0x4c
|
||
8004eda: 2200 movs r2, #0
|
||
8004edc: 4b78 ldr r3, [pc, #480] ; (80050c0 <_dtoa_r+0x2f8>)
|
||
8004ede: f7fb f9af bl 8000240 <__aeabi_dsub>
|
||
8004ee2: a36b add r3, pc, #428 ; (adr r3, 8005090 <_dtoa_r+0x2c8>)
|
||
8004ee4: e9d3 2300 ldrd r2, r3, [r3]
|
||
8004ee8: f7fb fb62 bl 80005b0 <__aeabi_dmul>
|
||
8004eec: a36a add r3, pc, #424 ; (adr r3, 8005098 <_dtoa_r+0x2d0>)
|
||
8004eee: e9d3 2300 ldrd r2, r3, [r3]
|
||
8004ef2: f7fb f9a7 bl 8000244 <__adddf3>
|
||
8004ef6: 4606 mov r6, r0
|
||
8004ef8: 4620 mov r0, r4
|
||
8004efa: 460f mov r7, r1
|
||
8004efc: f7fb faee bl 80004dc <__aeabi_i2d>
|
||
8004f00: a367 add r3, pc, #412 ; (adr r3, 80050a0 <_dtoa_r+0x2d8>)
|
||
8004f02: e9d3 2300 ldrd r2, r3, [r3]
|
||
8004f06: f7fb fb53 bl 80005b0 <__aeabi_dmul>
|
||
8004f0a: 4602 mov r2, r0
|
||
8004f0c: 460b mov r3, r1
|
||
8004f0e: 4630 mov r0, r6
|
||
8004f10: 4639 mov r1, r7
|
||
8004f12: f7fb f997 bl 8000244 <__adddf3>
|
||
8004f16: 4606 mov r6, r0
|
||
8004f18: 460f mov r7, r1
|
||
8004f1a: f7fb fdf9 bl 8000b10 <__aeabi_d2iz>
|
||
8004f1e: 2200 movs r2, #0
|
||
8004f20: 4681 mov r9, r0
|
||
8004f22: 2300 movs r3, #0
|
||
8004f24: 4630 mov r0, r6
|
||
8004f26: 4639 mov r1, r7
|
||
8004f28: f7fb fdb4 bl 8000a94 <__aeabi_dcmplt>
|
||
8004f2c: b148 cbz r0, 8004f42 <_dtoa_r+0x17a>
|
||
8004f2e: 4648 mov r0, r9
|
||
8004f30: f7fb fad4 bl 80004dc <__aeabi_i2d>
|
||
8004f34: 4632 mov r2, r6
|
||
8004f36: 463b mov r3, r7
|
||
8004f38: f7fb fda2 bl 8000a80 <__aeabi_dcmpeq>
|
||
8004f3c: b908 cbnz r0, 8004f42 <_dtoa_r+0x17a>
|
||
8004f3e: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff
|
||
8004f42: f1b9 0f16 cmp.w r9, #22
|
||
8004f46: d857 bhi.n 8004ff8 <_dtoa_r+0x230>
|
||
8004f48: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
8004f4c: 4b5d ldr r3, [pc, #372] ; (80050c4 <_dtoa_r+0x2fc>)
|
||
8004f4e: eb03 03c9 add.w r3, r3, r9, lsl #3
|
||
8004f52: e9d3 2300 ldrd r2, r3, [r3]
|
||
8004f56: f7fb fd9d bl 8000a94 <__aeabi_dcmplt>
|
||
8004f5a: 2800 cmp r0, #0
|
||
8004f5c: d04e beq.n 8004ffc <_dtoa_r+0x234>
|
||
8004f5e: 2300 movs r3, #0
|
||
8004f60: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff
|
||
8004f64: 930f str r3, [sp, #60] ; 0x3c
|
||
8004f66: 9b16 ldr r3, [sp, #88] ; 0x58
|
||
8004f68: 1b1c subs r4, r3, r4
|
||
8004f6a: 1e63 subs r3, r4, #1
|
||
8004f6c: 9309 str r3, [sp, #36] ; 0x24
|
||
8004f6e: bf49 itett mi
|
||
8004f70: f1c4 0301 rsbmi r3, r4, #1
|
||
8004f74: 2300 movpl r3, #0
|
||
8004f76: 9306 strmi r3, [sp, #24]
|
||
8004f78: 2300 movmi r3, #0
|
||
8004f7a: bf54 ite pl
|
||
8004f7c: 9306 strpl r3, [sp, #24]
|
||
8004f7e: 9309 strmi r3, [sp, #36] ; 0x24
|
||
8004f80: f1b9 0f00 cmp.w r9, #0
|
||
8004f84: db3c blt.n 8005000 <_dtoa_r+0x238>
|
||
8004f86: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8004f88: f8cd 9038 str.w r9, [sp, #56] ; 0x38
|
||
8004f8c: 444b add r3, r9
|
||
8004f8e: 9309 str r3, [sp, #36] ; 0x24
|
||
8004f90: 2300 movs r3, #0
|
||
8004f92: 930a str r3, [sp, #40] ; 0x28
|
||
8004f94: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8004f96: 2b09 cmp r3, #9
|
||
8004f98: d86c bhi.n 8005074 <_dtoa_r+0x2ac>
|
||
8004f9a: 2b05 cmp r3, #5
|
||
8004f9c: bfc4 itt gt
|
||
8004f9e: 3b04 subgt r3, #4
|
||
8004fa0: 9322 strgt r3, [sp, #136] ; 0x88
|
||
8004fa2: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8004fa4: bfc8 it gt
|
||
8004fa6: 2400 movgt r4, #0
|
||
8004fa8: f1a3 0302 sub.w r3, r3, #2
|
||
8004fac: bfd8 it le
|
||
8004fae: 2401 movle r4, #1
|
||
8004fb0: 2b03 cmp r3, #3
|
||
8004fb2: f200 808b bhi.w 80050cc <_dtoa_r+0x304>
|
||
8004fb6: e8df f003 tbb [pc, r3]
|
||
8004fba: 4f2d .short 0x4f2d
|
||
8004fbc: 5b4d .short 0x5b4d
|
||
8004fbe: e9dd 4316 ldrd r4, r3, [sp, #88] ; 0x58
|
||
8004fc2: 441c add r4, r3
|
||
8004fc4: f204 4332 addw r3, r4, #1074 ; 0x432
|
||
8004fc8: 2b20 cmp r3, #32
|
||
8004fca: bfc3 ittte gt
|
||
8004fcc: f1c3 0340 rsbgt r3, r3, #64 ; 0x40
|
||
8004fd0: f204 4012 addwgt r0, r4, #1042 ; 0x412
|
||
8004fd4: fa09 f303 lslgt.w r3, r9, r3
|
||
8004fd8: f1c3 0320 rsble r3, r3, #32
|
||
8004fdc: bfc6 itte gt
|
||
8004fde: fa26 f000 lsrgt.w r0, r6, r0
|
||
8004fe2: 4318 orrgt r0, r3
|
||
8004fe4: fa06 f003 lslle.w r0, r6, r3
|
||
8004fe8: f7fb fa68 bl 80004bc <__aeabi_ui2d>
|
||
8004fec: 2301 movs r3, #1
|
||
8004fee: f1a1 71f8 sub.w r1, r1, #32505856 ; 0x1f00000
|
||
8004ff2: 3c01 subs r4, #1
|
||
8004ff4: 9313 str r3, [sp, #76] ; 0x4c
|
||
8004ff6: e770 b.n 8004eda <_dtoa_r+0x112>
|
||
8004ff8: 2301 movs r3, #1
|
||
8004ffa: e7b3 b.n 8004f64 <_dtoa_r+0x19c>
|
||
8004ffc: 900f str r0, [sp, #60] ; 0x3c
|
||
8004ffe: e7b2 b.n 8004f66 <_dtoa_r+0x19e>
|
||
8005000: 9b06 ldr r3, [sp, #24]
|
||
8005002: eba3 0309 sub.w r3, r3, r9
|
||
8005006: 9306 str r3, [sp, #24]
|
||
8005008: f1c9 0300 rsb r3, r9, #0
|
||
800500c: 930a str r3, [sp, #40] ; 0x28
|
||
800500e: 2300 movs r3, #0
|
||
8005010: 930e str r3, [sp, #56] ; 0x38
|
||
8005012: e7bf b.n 8004f94 <_dtoa_r+0x1cc>
|
||
8005014: 2300 movs r3, #0
|
||
8005016: 930b str r3, [sp, #44] ; 0x2c
|
||
8005018: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
800501a: 2b00 cmp r3, #0
|
||
800501c: dc59 bgt.n 80050d2 <_dtoa_r+0x30a>
|
||
800501e: f04f 0b01 mov.w fp, #1
|
||
8005022: 465b mov r3, fp
|
||
8005024: f8cd b008 str.w fp, [sp, #8]
|
||
8005028: f8cd b08c str.w fp, [sp, #140] ; 0x8c
|
||
800502c: 2200 movs r2, #0
|
||
800502e: 6a68 ldr r0, [r5, #36] ; 0x24
|
||
8005030: 6042 str r2, [r0, #4]
|
||
8005032: 2204 movs r2, #4
|
||
8005034: f102 0614 add.w r6, r2, #20
|
||
8005038: 429e cmp r6, r3
|
||
800503a: 6841 ldr r1, [r0, #4]
|
||
800503c: d94f bls.n 80050de <_dtoa_r+0x316>
|
||
800503e: 4628 mov r0, r5
|
||
8005040: f000 fcdc bl 80059fc <_Balloc>
|
||
8005044: 9008 str r0, [sp, #32]
|
||
8005046: 2800 cmp r0, #0
|
||
8005048: d14d bne.n 80050e6 <_dtoa_r+0x31e>
|
||
800504a: 4602 mov r2, r0
|
||
800504c: f44f 71d5 mov.w r1, #426 ; 0x1aa
|
||
8005050: 4b1d ldr r3, [pc, #116] ; (80050c8 <_dtoa_r+0x300>)
|
||
8005052: e6cd b.n 8004df0 <_dtoa_r+0x28>
|
||
8005054: 2301 movs r3, #1
|
||
8005056: e7de b.n 8005016 <_dtoa_r+0x24e>
|
||
8005058: 2300 movs r3, #0
|
||
800505a: 930b str r3, [sp, #44] ; 0x2c
|
||
800505c: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
800505e: eb09 0b03 add.w fp, r9, r3
|
||
8005062: f10b 0301 add.w r3, fp, #1
|
||
8005066: 2b01 cmp r3, #1
|
||
8005068: 9302 str r3, [sp, #8]
|
||
800506a: bfb8 it lt
|
||
800506c: 2301 movlt r3, #1
|
||
800506e: e7dd b.n 800502c <_dtoa_r+0x264>
|
||
8005070: 2301 movs r3, #1
|
||
8005072: e7f2 b.n 800505a <_dtoa_r+0x292>
|
||
8005074: 2401 movs r4, #1
|
||
8005076: 2300 movs r3, #0
|
||
8005078: 940b str r4, [sp, #44] ; 0x2c
|
||
800507a: 9322 str r3, [sp, #136] ; 0x88
|
||
800507c: f04f 3bff mov.w fp, #4294967295 ; 0xffffffff
|
||
8005080: 2200 movs r2, #0
|
||
8005082: 2312 movs r3, #18
|
||
8005084: f8cd b008 str.w fp, [sp, #8]
|
||
8005088: 9223 str r2, [sp, #140] ; 0x8c
|
||
800508a: e7cf b.n 800502c <_dtoa_r+0x264>
|
||
800508c: f3af 8000 nop.w
|
||
8005090: 636f4361 .word 0x636f4361
|
||
8005094: 3fd287a7 .word 0x3fd287a7
|
||
8005098: 8b60c8b3 .word 0x8b60c8b3
|
||
800509c: 3fc68a28 .word 0x3fc68a28
|
||
80050a0: 509f79fb .word 0x509f79fb
|
||
80050a4: 3fd34413 .word 0x3fd34413
|
||
80050a8: 08007b19 .word 0x08007b19
|
||
80050ac: 08007b30 .word 0x08007b30
|
||
80050b0: 7ff00000 .word 0x7ff00000
|
||
80050b4: 08007b15 .word 0x08007b15
|
||
80050b8: 08007b0c .word 0x08007b0c
|
||
80050bc: 08007ae9 .word 0x08007ae9
|
||
80050c0: 3ff80000 .word 0x3ff80000
|
||
80050c4: 08007c28 .word 0x08007c28
|
||
80050c8: 08007b8f .word 0x08007b8f
|
||
80050cc: 2301 movs r3, #1
|
||
80050ce: 930b str r3, [sp, #44] ; 0x2c
|
||
80050d0: e7d4 b.n 800507c <_dtoa_r+0x2b4>
|
||
80050d2: f8dd b08c ldr.w fp, [sp, #140] ; 0x8c
|
||
80050d6: 465b mov r3, fp
|
||
80050d8: f8cd b008 str.w fp, [sp, #8]
|
||
80050dc: e7a6 b.n 800502c <_dtoa_r+0x264>
|
||
80050de: 3101 adds r1, #1
|
||
80050e0: 6041 str r1, [r0, #4]
|
||
80050e2: 0052 lsls r2, r2, #1
|
||
80050e4: e7a6 b.n 8005034 <_dtoa_r+0x26c>
|
||
80050e6: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
80050e8: 9a08 ldr r2, [sp, #32]
|
||
80050ea: 601a str r2, [r3, #0]
|
||
80050ec: 9b02 ldr r3, [sp, #8]
|
||
80050ee: 2b0e cmp r3, #14
|
||
80050f0: f200 80a8 bhi.w 8005244 <_dtoa_r+0x47c>
|
||
80050f4: 2c00 cmp r4, #0
|
||
80050f6: f000 80a5 beq.w 8005244 <_dtoa_r+0x47c>
|
||
80050fa: f1b9 0f00 cmp.w r9, #0
|
||
80050fe: dd34 ble.n 800516a <_dtoa_r+0x3a2>
|
||
8005100: 4a9a ldr r2, [pc, #616] ; (800536c <_dtoa_r+0x5a4>)
|
||
8005102: f009 030f and.w r3, r9, #15
|
||
8005106: eb02 03c3 add.w r3, r2, r3, lsl #3
|
||
800510a: f419 7f80 tst.w r9, #256 ; 0x100
|
||
800510e: e9d3 3400 ldrd r3, r4, [r3]
|
||
8005112: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40
|
||
8005116: ea4f 1429 mov.w r4, r9, asr #4
|
||
800511a: d016 beq.n 800514a <_dtoa_r+0x382>
|
||
800511c: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
8005120: 4b93 ldr r3, [pc, #588] ; (8005370 <_dtoa_r+0x5a8>)
|
||
8005122: 2703 movs r7, #3
|
||
8005124: e9d3 2308 ldrd r2, r3, [r3, #32]
|
||
8005128: f7fb fb6c bl 8000804 <__aeabi_ddiv>
|
||
800512c: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8005130: f004 040f and.w r4, r4, #15
|
||
8005134: 4e8e ldr r6, [pc, #568] ; (8005370 <_dtoa_r+0x5a8>)
|
||
8005136: b954 cbnz r4, 800514e <_dtoa_r+0x386>
|
||
8005138: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
800513c: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8005140: f7fb fb60 bl 8000804 <__aeabi_ddiv>
|
||
8005144: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8005148: e029 b.n 800519e <_dtoa_r+0x3d6>
|
||
800514a: 2702 movs r7, #2
|
||
800514c: e7f2 b.n 8005134 <_dtoa_r+0x36c>
|
||
800514e: 07e1 lsls r1, r4, #31
|
||
8005150: d508 bpl.n 8005164 <_dtoa_r+0x39c>
|
||
8005152: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
8005156: e9d6 2300 ldrd r2, r3, [r6]
|
||
800515a: f7fb fa29 bl 80005b0 <__aeabi_dmul>
|
||
800515e: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
8005162: 3701 adds r7, #1
|
||
8005164: 1064 asrs r4, r4, #1
|
||
8005166: 3608 adds r6, #8
|
||
8005168: e7e5 b.n 8005136 <_dtoa_r+0x36e>
|
||
800516a: f000 80a5 beq.w 80052b8 <_dtoa_r+0x4f0>
|
||
800516e: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
8005172: f1c9 0400 rsb r4, r9, #0
|
||
8005176: 4b7d ldr r3, [pc, #500] ; (800536c <_dtoa_r+0x5a4>)
|
||
8005178: f004 020f and.w r2, r4, #15
|
||
800517c: eb03 03c2 add.w r3, r3, r2, lsl #3
|
||
8005180: e9d3 2300 ldrd r2, r3, [r3]
|
||
8005184: f7fb fa14 bl 80005b0 <__aeabi_dmul>
|
||
8005188: 2702 movs r7, #2
|
||
800518a: 2300 movs r3, #0
|
||
800518c: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8005190: 4e77 ldr r6, [pc, #476] ; (8005370 <_dtoa_r+0x5a8>)
|
||
8005192: 1124 asrs r4, r4, #4
|
||
8005194: 2c00 cmp r4, #0
|
||
8005196: f040 8084 bne.w 80052a2 <_dtoa_r+0x4da>
|
||
800519a: 2b00 cmp r3, #0
|
||
800519c: d1d2 bne.n 8005144 <_dtoa_r+0x37c>
|
||
800519e: 9b0f ldr r3, [sp, #60] ; 0x3c
|
||
80051a0: 2b00 cmp r3, #0
|
||
80051a2: f000 808b beq.w 80052bc <_dtoa_r+0x4f4>
|
||
80051a6: e9dd 3404 ldrd r3, r4, [sp, #16]
|
||
80051aa: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40
|
||
80051ae: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
80051b2: 2200 movs r2, #0
|
||
80051b4: 4b6f ldr r3, [pc, #444] ; (8005374 <_dtoa_r+0x5ac>)
|
||
80051b6: f7fb fc6d bl 8000a94 <__aeabi_dcmplt>
|
||
80051ba: 2800 cmp r0, #0
|
||
80051bc: d07e beq.n 80052bc <_dtoa_r+0x4f4>
|
||
80051be: 9b02 ldr r3, [sp, #8]
|
||
80051c0: 2b00 cmp r3, #0
|
||
80051c2: d07b beq.n 80052bc <_dtoa_r+0x4f4>
|
||
80051c4: f1bb 0f00 cmp.w fp, #0
|
||
80051c8: dd38 ble.n 800523c <_dtoa_r+0x474>
|
||
80051ca: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
80051ce: 2200 movs r2, #0
|
||
80051d0: 4b69 ldr r3, [pc, #420] ; (8005378 <_dtoa_r+0x5b0>)
|
||
80051d2: f7fb f9ed bl 80005b0 <__aeabi_dmul>
|
||
80051d6: 465c mov r4, fp
|
||
80051d8: e9cd 0104 strd r0, r1, [sp, #16]
|
||
80051dc: f109 38ff add.w r8, r9, #4294967295 ; 0xffffffff
|
||
80051e0: 3701 adds r7, #1
|
||
80051e2: 4638 mov r0, r7
|
||
80051e4: f7fb f97a bl 80004dc <__aeabi_i2d>
|
||
80051e8: e9dd 2304 ldrd r2, r3, [sp, #16]
|
||
80051ec: f7fb f9e0 bl 80005b0 <__aeabi_dmul>
|
||
80051f0: 2200 movs r2, #0
|
||
80051f2: 4b62 ldr r3, [pc, #392] ; (800537c <_dtoa_r+0x5b4>)
|
||
80051f4: f7fb f826 bl 8000244 <__adddf3>
|
||
80051f8: f1a1 7650 sub.w r6, r1, #54525952 ; 0x3400000
|
||
80051fc: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
8005200: 9611 str r6, [sp, #68] ; 0x44
|
||
8005202: 2c00 cmp r4, #0
|
||
8005204: d15d bne.n 80052c2 <_dtoa_r+0x4fa>
|
||
8005206: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
800520a: 2200 movs r2, #0
|
||
800520c: 4b5c ldr r3, [pc, #368] ; (8005380 <_dtoa_r+0x5b8>)
|
||
800520e: f7fb f817 bl 8000240 <__aeabi_dsub>
|
||
8005212: 4602 mov r2, r0
|
||
8005214: 460b mov r3, r1
|
||
8005216: e9cd 2304 strd r2, r3, [sp, #16]
|
||
800521a: 4633 mov r3, r6
|
||
800521c: 9a10 ldr r2, [sp, #64] ; 0x40
|
||
800521e: f7fb fc57 bl 8000ad0 <__aeabi_dcmpgt>
|
||
8005222: 2800 cmp r0, #0
|
||
8005224: f040 829e bne.w 8005764 <_dtoa_r+0x99c>
|
||
8005228: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
800522c: 9a10 ldr r2, [sp, #64] ; 0x40
|
||
800522e: f106 4300 add.w r3, r6, #2147483648 ; 0x80000000
|
||
8005232: f7fb fc2f bl 8000a94 <__aeabi_dcmplt>
|
||
8005236: 2800 cmp r0, #0
|
||
8005238: f040 8292 bne.w 8005760 <_dtoa_r+0x998>
|
||
800523c: e9dd 340c ldrd r3, r4, [sp, #48] ; 0x30
|
||
8005240: e9cd 3404 strd r3, r4, [sp, #16]
|
||
8005244: 9b17 ldr r3, [sp, #92] ; 0x5c
|
||
8005246: 2b00 cmp r3, #0
|
||
8005248: f2c0 8153 blt.w 80054f2 <_dtoa_r+0x72a>
|
||
800524c: f1b9 0f0e cmp.w r9, #14
|
||
8005250: f300 814f bgt.w 80054f2 <_dtoa_r+0x72a>
|
||
8005254: 4b45 ldr r3, [pc, #276] ; (800536c <_dtoa_r+0x5a4>)
|
||
8005256: eb03 03c9 add.w r3, r3, r9, lsl #3
|
||
800525a: e9d3 3400 ldrd r3, r4, [r3]
|
||
800525e: e9cd 3406 strd r3, r4, [sp, #24]
|
||
8005262: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
8005264: 2b00 cmp r3, #0
|
||
8005266: f280 80db bge.w 8005420 <_dtoa_r+0x658>
|
||
800526a: 9b02 ldr r3, [sp, #8]
|
||
800526c: 2b00 cmp r3, #0
|
||
800526e: f300 80d7 bgt.w 8005420 <_dtoa_r+0x658>
|
||
8005272: f040 8274 bne.w 800575e <_dtoa_r+0x996>
|
||
8005276: e9dd 0106 ldrd r0, r1, [sp, #24]
|
||
800527a: 2200 movs r2, #0
|
||
800527c: 4b40 ldr r3, [pc, #256] ; (8005380 <_dtoa_r+0x5b8>)
|
||
800527e: f7fb f997 bl 80005b0 <__aeabi_dmul>
|
||
8005282: e9dd 2304 ldrd r2, r3, [sp, #16]
|
||
8005286: f7fb fc19 bl 8000abc <__aeabi_dcmpge>
|
||
800528a: 9c02 ldr r4, [sp, #8]
|
||
800528c: 4626 mov r6, r4
|
||
800528e: 2800 cmp r0, #0
|
||
8005290: f040 824a bne.w 8005728 <_dtoa_r+0x960>
|
||
8005294: 2331 movs r3, #49 ; 0x31
|
||
8005296: 9f08 ldr r7, [sp, #32]
|
||
8005298: f109 0901 add.w r9, r9, #1
|
||
800529c: f807 3b01 strb.w r3, [r7], #1
|
||
80052a0: e246 b.n 8005730 <_dtoa_r+0x968>
|
||
80052a2: 07e2 lsls r2, r4, #31
|
||
80052a4: d505 bpl.n 80052b2 <_dtoa_r+0x4ea>
|
||
80052a6: e9d6 2300 ldrd r2, r3, [r6]
|
||
80052aa: f7fb f981 bl 80005b0 <__aeabi_dmul>
|
||
80052ae: 2301 movs r3, #1
|
||
80052b0: 3701 adds r7, #1
|
||
80052b2: 1064 asrs r4, r4, #1
|
||
80052b4: 3608 adds r6, #8
|
||
80052b6: e76d b.n 8005194 <_dtoa_r+0x3cc>
|
||
80052b8: 2702 movs r7, #2
|
||
80052ba: e770 b.n 800519e <_dtoa_r+0x3d6>
|
||
80052bc: 46c8 mov r8, r9
|
||
80052be: 9c02 ldr r4, [sp, #8]
|
||
80052c0: e78f b.n 80051e2 <_dtoa_r+0x41a>
|
||
80052c2: 9908 ldr r1, [sp, #32]
|
||
80052c4: 4b29 ldr r3, [pc, #164] ; (800536c <_dtoa_r+0x5a4>)
|
||
80052c6: 4421 add r1, r4
|
||
80052c8: 9112 str r1, [sp, #72] ; 0x48
|
||
80052ca: 990b ldr r1, [sp, #44] ; 0x2c
|
||
80052cc: eb03 03c4 add.w r3, r3, r4, lsl #3
|
||
80052d0: e9dd 6710 ldrd r6, r7, [sp, #64] ; 0x40
|
||
80052d4: e953 2302 ldrd r2, r3, [r3, #-8]
|
||
80052d8: 2900 cmp r1, #0
|
||
80052da: d055 beq.n 8005388 <_dtoa_r+0x5c0>
|
||
80052dc: 2000 movs r0, #0
|
||
80052de: 4929 ldr r1, [pc, #164] ; (8005384 <_dtoa_r+0x5bc>)
|
||
80052e0: f7fb fa90 bl 8000804 <__aeabi_ddiv>
|
||
80052e4: 463b mov r3, r7
|
||
80052e6: 4632 mov r2, r6
|
||
80052e8: f7fa ffaa bl 8000240 <__aeabi_dsub>
|
||
80052ec: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
80052f0: 9f08 ldr r7, [sp, #32]
|
||
80052f2: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
80052f6: f7fb fc0b bl 8000b10 <__aeabi_d2iz>
|
||
80052fa: 4604 mov r4, r0
|
||
80052fc: f7fb f8ee bl 80004dc <__aeabi_i2d>
|
||
8005300: 4602 mov r2, r0
|
||
8005302: 460b mov r3, r1
|
||
8005304: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8005308: f7fa ff9a bl 8000240 <__aeabi_dsub>
|
||
800530c: 4602 mov r2, r0
|
||
800530e: 460b mov r3, r1
|
||
8005310: 3430 adds r4, #48 ; 0x30
|
||
8005312: e9cd 2304 strd r2, r3, [sp, #16]
|
||
8005316: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
800531a: f807 4b01 strb.w r4, [r7], #1
|
||
800531e: f7fb fbb9 bl 8000a94 <__aeabi_dcmplt>
|
||
8005322: 2800 cmp r0, #0
|
||
8005324: d174 bne.n 8005410 <_dtoa_r+0x648>
|
||
8005326: e9dd 2304 ldrd r2, r3, [sp, #16]
|
||
800532a: 2000 movs r0, #0
|
||
800532c: 4911 ldr r1, [pc, #68] ; (8005374 <_dtoa_r+0x5ac>)
|
||
800532e: f7fa ff87 bl 8000240 <__aeabi_dsub>
|
||
8005332: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
8005336: f7fb fbad bl 8000a94 <__aeabi_dcmplt>
|
||
800533a: 2800 cmp r0, #0
|
||
800533c: f040 80b6 bne.w 80054ac <_dtoa_r+0x6e4>
|
||
8005340: 9b12 ldr r3, [sp, #72] ; 0x48
|
||
8005342: 429f cmp r7, r3
|
||
8005344: f43f af7a beq.w 800523c <_dtoa_r+0x474>
|
||
8005348: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
800534c: 2200 movs r2, #0
|
||
800534e: 4b0a ldr r3, [pc, #40] ; (8005378 <_dtoa_r+0x5b0>)
|
||
8005350: f7fb f92e bl 80005b0 <__aeabi_dmul>
|
||
8005354: 2200 movs r2, #0
|
||
8005356: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
800535a: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
800535e: 4b06 ldr r3, [pc, #24] ; (8005378 <_dtoa_r+0x5b0>)
|
||
8005360: f7fb f926 bl 80005b0 <__aeabi_dmul>
|
||
8005364: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8005368: e7c3 b.n 80052f2 <_dtoa_r+0x52a>
|
||
800536a: bf00 nop
|
||
800536c: 08007c28 .word 0x08007c28
|
||
8005370: 08007c00 .word 0x08007c00
|
||
8005374: 3ff00000 .word 0x3ff00000
|
||
8005378: 40240000 .word 0x40240000
|
||
800537c: 401c0000 .word 0x401c0000
|
||
8005380: 40140000 .word 0x40140000
|
||
8005384: 3fe00000 .word 0x3fe00000
|
||
8005388: 4630 mov r0, r6
|
||
800538a: 4639 mov r1, r7
|
||
800538c: f7fb f910 bl 80005b0 <__aeabi_dmul>
|
||
8005390: 9b12 ldr r3, [sp, #72] ; 0x48
|
||
8005392: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
8005396: 9c08 ldr r4, [sp, #32]
|
||
8005398: 9314 str r3, [sp, #80] ; 0x50
|
||
800539a: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
800539e: f7fb fbb7 bl 8000b10 <__aeabi_d2iz>
|
||
80053a2: 9015 str r0, [sp, #84] ; 0x54
|
||
80053a4: f7fb f89a bl 80004dc <__aeabi_i2d>
|
||
80053a8: 4602 mov r2, r0
|
||
80053aa: 460b mov r3, r1
|
||
80053ac: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
80053b0: f7fa ff46 bl 8000240 <__aeabi_dsub>
|
||
80053b4: 9b15 ldr r3, [sp, #84] ; 0x54
|
||
80053b6: 4606 mov r6, r0
|
||
80053b8: 3330 adds r3, #48 ; 0x30
|
||
80053ba: f804 3b01 strb.w r3, [r4], #1
|
||
80053be: 9b12 ldr r3, [sp, #72] ; 0x48
|
||
80053c0: 460f mov r7, r1
|
||
80053c2: 429c cmp r4, r3
|
||
80053c4: f04f 0200 mov.w r2, #0
|
||
80053c8: d124 bne.n 8005414 <_dtoa_r+0x64c>
|
||
80053ca: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
80053ce: 4bb3 ldr r3, [pc, #716] ; (800569c <_dtoa_r+0x8d4>)
|
||
80053d0: f7fa ff38 bl 8000244 <__adddf3>
|
||
80053d4: 4602 mov r2, r0
|
||
80053d6: 460b mov r3, r1
|
||
80053d8: 4630 mov r0, r6
|
||
80053da: 4639 mov r1, r7
|
||
80053dc: f7fb fb78 bl 8000ad0 <__aeabi_dcmpgt>
|
||
80053e0: 2800 cmp r0, #0
|
||
80053e2: d162 bne.n 80054aa <_dtoa_r+0x6e2>
|
||
80053e4: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
80053e8: 2000 movs r0, #0
|
||
80053ea: 49ac ldr r1, [pc, #688] ; (800569c <_dtoa_r+0x8d4>)
|
||
80053ec: f7fa ff28 bl 8000240 <__aeabi_dsub>
|
||
80053f0: 4602 mov r2, r0
|
||
80053f2: 460b mov r3, r1
|
||
80053f4: 4630 mov r0, r6
|
||
80053f6: 4639 mov r1, r7
|
||
80053f8: f7fb fb4c bl 8000a94 <__aeabi_dcmplt>
|
||
80053fc: 2800 cmp r0, #0
|
||
80053fe: f43f af1d beq.w 800523c <_dtoa_r+0x474>
|
||
8005402: 9f14 ldr r7, [sp, #80] ; 0x50
|
||
8005404: 1e7b subs r3, r7, #1
|
||
8005406: 9314 str r3, [sp, #80] ; 0x50
|
||
8005408: f817 3c01 ldrb.w r3, [r7, #-1]
|
||
800540c: 2b30 cmp r3, #48 ; 0x30
|
||
800540e: d0f8 beq.n 8005402 <_dtoa_r+0x63a>
|
||
8005410: 46c1 mov r9, r8
|
||
8005412: e03a b.n 800548a <_dtoa_r+0x6c2>
|
||
8005414: 4ba2 ldr r3, [pc, #648] ; (80056a0 <_dtoa_r+0x8d8>)
|
||
8005416: f7fb f8cb bl 80005b0 <__aeabi_dmul>
|
||
800541a: e9cd 0104 strd r0, r1, [sp, #16]
|
||
800541e: e7bc b.n 800539a <_dtoa_r+0x5d2>
|
||
8005420: 9f08 ldr r7, [sp, #32]
|
||
8005422: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
8005426: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
800542a: f7fb f9eb bl 8000804 <__aeabi_ddiv>
|
||
800542e: f7fb fb6f bl 8000b10 <__aeabi_d2iz>
|
||
8005432: 4604 mov r4, r0
|
||
8005434: f7fb f852 bl 80004dc <__aeabi_i2d>
|
||
8005438: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
800543c: f7fb f8b8 bl 80005b0 <__aeabi_dmul>
|
||
8005440: f104 0630 add.w r6, r4, #48 ; 0x30
|
||
8005444: 460b mov r3, r1
|
||
8005446: 4602 mov r2, r0
|
||
8005448: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
800544c: f7fa fef8 bl 8000240 <__aeabi_dsub>
|
||
8005450: f807 6b01 strb.w r6, [r7], #1
|
||
8005454: 9e08 ldr r6, [sp, #32]
|
||
8005456: 9b02 ldr r3, [sp, #8]
|
||
8005458: 1bbe subs r6, r7, r6
|
||
800545a: 42b3 cmp r3, r6
|
||
800545c: d13a bne.n 80054d4 <_dtoa_r+0x70c>
|
||
800545e: 4602 mov r2, r0
|
||
8005460: 460b mov r3, r1
|
||
8005462: f7fa feef bl 8000244 <__adddf3>
|
||
8005466: 4602 mov r2, r0
|
||
8005468: 460b mov r3, r1
|
||
800546a: e9cd 2302 strd r2, r3, [sp, #8]
|
||
800546e: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
8005472: f7fb fb2d bl 8000ad0 <__aeabi_dcmpgt>
|
||
8005476: bb58 cbnz r0, 80054d0 <_dtoa_r+0x708>
|
||
8005478: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
800547c: e9dd 0102 ldrd r0, r1, [sp, #8]
|
||
8005480: f7fb fafe bl 8000a80 <__aeabi_dcmpeq>
|
||
8005484: b108 cbz r0, 800548a <_dtoa_r+0x6c2>
|
||
8005486: 07e1 lsls r1, r4, #31
|
||
8005488: d422 bmi.n 80054d0 <_dtoa_r+0x708>
|
||
800548a: 4628 mov r0, r5
|
||
800548c: 4651 mov r1, sl
|
||
800548e: f000 faf5 bl 8005a7c <_Bfree>
|
||
8005492: 2300 movs r3, #0
|
||
8005494: 703b strb r3, [r7, #0]
|
||
8005496: 9b24 ldr r3, [sp, #144] ; 0x90
|
||
8005498: f109 0001 add.w r0, r9, #1
|
||
800549c: 6018 str r0, [r3, #0]
|
||
800549e: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
80054a0: 2b00 cmp r3, #0
|
||
80054a2: f43f acdf beq.w 8004e64 <_dtoa_r+0x9c>
|
||
80054a6: 601f str r7, [r3, #0]
|
||
80054a8: e4dc b.n 8004e64 <_dtoa_r+0x9c>
|
||
80054aa: 4627 mov r7, r4
|
||
80054ac: 463b mov r3, r7
|
||
80054ae: 461f mov r7, r3
|
||
80054b0: f813 2d01 ldrb.w r2, [r3, #-1]!
|
||
80054b4: 2a39 cmp r2, #57 ; 0x39
|
||
80054b6: d107 bne.n 80054c8 <_dtoa_r+0x700>
|
||
80054b8: 9a08 ldr r2, [sp, #32]
|
||
80054ba: 429a cmp r2, r3
|
||
80054bc: d1f7 bne.n 80054ae <_dtoa_r+0x6e6>
|
||
80054be: 2230 movs r2, #48 ; 0x30
|
||
80054c0: 9908 ldr r1, [sp, #32]
|
||
80054c2: f108 0801 add.w r8, r8, #1
|
||
80054c6: 700a strb r2, [r1, #0]
|
||
80054c8: 781a ldrb r2, [r3, #0]
|
||
80054ca: 3201 adds r2, #1
|
||
80054cc: 701a strb r2, [r3, #0]
|
||
80054ce: e79f b.n 8005410 <_dtoa_r+0x648>
|
||
80054d0: 46c8 mov r8, r9
|
||
80054d2: e7eb b.n 80054ac <_dtoa_r+0x6e4>
|
||
80054d4: 2200 movs r2, #0
|
||
80054d6: 4b72 ldr r3, [pc, #456] ; (80056a0 <_dtoa_r+0x8d8>)
|
||
80054d8: f7fb f86a bl 80005b0 <__aeabi_dmul>
|
||
80054dc: 4602 mov r2, r0
|
||
80054de: 460b mov r3, r1
|
||
80054e0: e9cd 2304 strd r2, r3, [sp, #16]
|
||
80054e4: 2200 movs r2, #0
|
||
80054e6: 2300 movs r3, #0
|
||
80054e8: f7fb faca bl 8000a80 <__aeabi_dcmpeq>
|
||
80054ec: 2800 cmp r0, #0
|
||
80054ee: d098 beq.n 8005422 <_dtoa_r+0x65a>
|
||
80054f0: e7cb b.n 800548a <_dtoa_r+0x6c2>
|
||
80054f2: 9a0b ldr r2, [sp, #44] ; 0x2c
|
||
80054f4: 2a00 cmp r2, #0
|
||
80054f6: f000 80cd beq.w 8005694 <_dtoa_r+0x8cc>
|
||
80054fa: 9a22 ldr r2, [sp, #136] ; 0x88
|
||
80054fc: 2a01 cmp r2, #1
|
||
80054fe: f300 80af bgt.w 8005660 <_dtoa_r+0x898>
|
||
8005502: 9a13 ldr r2, [sp, #76] ; 0x4c
|
||
8005504: 2a00 cmp r2, #0
|
||
8005506: f000 80a7 beq.w 8005658 <_dtoa_r+0x890>
|
||
800550a: f203 4333 addw r3, r3, #1075 ; 0x433
|
||
800550e: 9c0a ldr r4, [sp, #40] ; 0x28
|
||
8005510: 9f06 ldr r7, [sp, #24]
|
||
8005512: 9a06 ldr r2, [sp, #24]
|
||
8005514: 2101 movs r1, #1
|
||
8005516: 441a add r2, r3
|
||
8005518: 9206 str r2, [sp, #24]
|
||
800551a: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
800551c: 4628 mov r0, r5
|
||
800551e: 441a add r2, r3
|
||
8005520: 9209 str r2, [sp, #36] ; 0x24
|
||
8005522: f000 fb65 bl 8005bf0 <__i2b>
|
||
8005526: 4606 mov r6, r0
|
||
8005528: 2f00 cmp r7, #0
|
||
800552a: dd0c ble.n 8005546 <_dtoa_r+0x77e>
|
||
800552c: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
800552e: 2b00 cmp r3, #0
|
||
8005530: dd09 ble.n 8005546 <_dtoa_r+0x77e>
|
||
8005532: 42bb cmp r3, r7
|
||
8005534: bfa8 it ge
|
||
8005536: 463b movge r3, r7
|
||
8005538: 9a06 ldr r2, [sp, #24]
|
||
800553a: 1aff subs r7, r7, r3
|
||
800553c: 1ad2 subs r2, r2, r3
|
||
800553e: 9206 str r2, [sp, #24]
|
||
8005540: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
8005542: 1ad3 subs r3, r2, r3
|
||
8005544: 9309 str r3, [sp, #36] ; 0x24
|
||
8005546: 9b0a ldr r3, [sp, #40] ; 0x28
|
||
8005548: b1f3 cbz r3, 8005588 <_dtoa_r+0x7c0>
|
||
800554a: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
800554c: 2b00 cmp r3, #0
|
||
800554e: f000 80a9 beq.w 80056a4 <_dtoa_r+0x8dc>
|
||
8005552: 2c00 cmp r4, #0
|
||
8005554: dd10 ble.n 8005578 <_dtoa_r+0x7b0>
|
||
8005556: 4631 mov r1, r6
|
||
8005558: 4622 mov r2, r4
|
||
800555a: 4628 mov r0, r5
|
||
800555c: f000 fc02 bl 8005d64 <__pow5mult>
|
||
8005560: 4652 mov r2, sl
|
||
8005562: 4601 mov r1, r0
|
||
8005564: 4606 mov r6, r0
|
||
8005566: 4628 mov r0, r5
|
||
8005568: f000 fb58 bl 8005c1c <__multiply>
|
||
800556c: 4680 mov r8, r0
|
||
800556e: 4651 mov r1, sl
|
||
8005570: 4628 mov r0, r5
|
||
8005572: f000 fa83 bl 8005a7c <_Bfree>
|
||
8005576: 46c2 mov sl, r8
|
||
8005578: 9b0a ldr r3, [sp, #40] ; 0x28
|
||
800557a: 1b1a subs r2, r3, r4
|
||
800557c: d004 beq.n 8005588 <_dtoa_r+0x7c0>
|
||
800557e: 4651 mov r1, sl
|
||
8005580: 4628 mov r0, r5
|
||
8005582: f000 fbef bl 8005d64 <__pow5mult>
|
||
8005586: 4682 mov sl, r0
|
||
8005588: 2101 movs r1, #1
|
||
800558a: 4628 mov r0, r5
|
||
800558c: f000 fb30 bl 8005bf0 <__i2b>
|
||
8005590: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8005592: 4604 mov r4, r0
|
||
8005594: 2b00 cmp r3, #0
|
||
8005596: f340 8087 ble.w 80056a8 <_dtoa_r+0x8e0>
|
||
800559a: 461a mov r2, r3
|
||
800559c: 4601 mov r1, r0
|
||
800559e: 4628 mov r0, r5
|
||
80055a0: f000 fbe0 bl 8005d64 <__pow5mult>
|
||
80055a4: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
80055a6: 4604 mov r4, r0
|
||
80055a8: 2b01 cmp r3, #1
|
||
80055aa: f340 8080 ble.w 80056ae <_dtoa_r+0x8e6>
|
||
80055ae: f04f 0800 mov.w r8, #0
|
||
80055b2: 6923 ldr r3, [r4, #16]
|
||
80055b4: eb04 0383 add.w r3, r4, r3, lsl #2
|
||
80055b8: 6918 ldr r0, [r3, #16]
|
||
80055ba: f000 facb bl 8005b54 <__hi0bits>
|
||
80055be: f1c0 0020 rsb r0, r0, #32
|
||
80055c2: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
80055c4: 4418 add r0, r3
|
||
80055c6: f010 001f ands.w r0, r0, #31
|
||
80055ca: f000 8092 beq.w 80056f2 <_dtoa_r+0x92a>
|
||
80055ce: f1c0 0320 rsb r3, r0, #32
|
||
80055d2: 2b04 cmp r3, #4
|
||
80055d4: f340 808a ble.w 80056ec <_dtoa_r+0x924>
|
||
80055d8: f1c0 001c rsb r0, r0, #28
|
||
80055dc: 9b06 ldr r3, [sp, #24]
|
||
80055de: 4407 add r7, r0
|
||
80055e0: 4403 add r3, r0
|
||
80055e2: 9306 str r3, [sp, #24]
|
||
80055e4: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
80055e6: 4403 add r3, r0
|
||
80055e8: 9309 str r3, [sp, #36] ; 0x24
|
||
80055ea: 9b06 ldr r3, [sp, #24]
|
||
80055ec: 2b00 cmp r3, #0
|
||
80055ee: dd05 ble.n 80055fc <_dtoa_r+0x834>
|
||
80055f0: 4651 mov r1, sl
|
||
80055f2: 461a mov r2, r3
|
||
80055f4: 4628 mov r0, r5
|
||
80055f6: f000 fc0f bl 8005e18 <__lshift>
|
||
80055fa: 4682 mov sl, r0
|
||
80055fc: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
80055fe: 2b00 cmp r3, #0
|
||
8005600: dd05 ble.n 800560e <_dtoa_r+0x846>
|
||
8005602: 4621 mov r1, r4
|
||
8005604: 461a mov r2, r3
|
||
8005606: 4628 mov r0, r5
|
||
8005608: f000 fc06 bl 8005e18 <__lshift>
|
||
800560c: 4604 mov r4, r0
|
||
800560e: 9b0f ldr r3, [sp, #60] ; 0x3c
|
||
8005610: 2b00 cmp r3, #0
|
||
8005612: d070 beq.n 80056f6 <_dtoa_r+0x92e>
|
||
8005614: 4621 mov r1, r4
|
||
8005616: 4650 mov r0, sl
|
||
8005618: f000 fc6a bl 8005ef0 <__mcmp>
|
||
800561c: 2800 cmp r0, #0
|
||
800561e: da6a bge.n 80056f6 <_dtoa_r+0x92e>
|
||
8005620: 2300 movs r3, #0
|
||
8005622: 4651 mov r1, sl
|
||
8005624: 220a movs r2, #10
|
||
8005626: 4628 mov r0, r5
|
||
8005628: f000 fa4a bl 8005ac0 <__multadd>
|
||
800562c: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
800562e: 4682 mov sl, r0
|
||
8005630: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff
|
||
8005634: 2b00 cmp r3, #0
|
||
8005636: f000 8193 beq.w 8005960 <_dtoa_r+0xb98>
|
||
800563a: 4631 mov r1, r6
|
||
800563c: 2300 movs r3, #0
|
||
800563e: 220a movs r2, #10
|
||
8005640: 4628 mov r0, r5
|
||
8005642: f000 fa3d bl 8005ac0 <__multadd>
|
||
8005646: f1bb 0f00 cmp.w fp, #0
|
||
800564a: 4606 mov r6, r0
|
||
800564c: f300 8093 bgt.w 8005776 <_dtoa_r+0x9ae>
|
||
8005650: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8005652: 2b02 cmp r3, #2
|
||
8005654: dc57 bgt.n 8005706 <_dtoa_r+0x93e>
|
||
8005656: e08e b.n 8005776 <_dtoa_r+0x9ae>
|
||
8005658: 9b16 ldr r3, [sp, #88] ; 0x58
|
||
800565a: f1c3 0336 rsb r3, r3, #54 ; 0x36
|
||
800565e: e756 b.n 800550e <_dtoa_r+0x746>
|
||
8005660: 9b02 ldr r3, [sp, #8]
|
||
8005662: 1e5c subs r4, r3, #1
|
||
8005664: 9b0a ldr r3, [sp, #40] ; 0x28
|
||
8005666: 42a3 cmp r3, r4
|
||
8005668: bfb7 itett lt
|
||
800566a: 9b0a ldrlt r3, [sp, #40] ; 0x28
|
||
800566c: 1b1c subge r4, r3, r4
|
||
800566e: 1ae2 sublt r2, r4, r3
|
||
8005670: 9b0e ldrlt r3, [sp, #56] ; 0x38
|
||
8005672: bfbe ittt lt
|
||
8005674: 940a strlt r4, [sp, #40] ; 0x28
|
||
8005676: 189b addlt r3, r3, r2
|
||
8005678: 930e strlt r3, [sp, #56] ; 0x38
|
||
800567a: 9b02 ldr r3, [sp, #8]
|
||
800567c: bfb8 it lt
|
||
800567e: 2400 movlt r4, #0
|
||
8005680: 2b00 cmp r3, #0
|
||
8005682: bfbb ittet lt
|
||
8005684: 9b06 ldrlt r3, [sp, #24]
|
||
8005686: 9a02 ldrlt r2, [sp, #8]
|
||
8005688: 9f06 ldrge r7, [sp, #24]
|
||
800568a: 1a9f sublt r7, r3, r2
|
||
800568c: bfac ite ge
|
||
800568e: 9b02 ldrge r3, [sp, #8]
|
||
8005690: 2300 movlt r3, #0
|
||
8005692: e73e b.n 8005512 <_dtoa_r+0x74a>
|
||
8005694: 9c0a ldr r4, [sp, #40] ; 0x28
|
||
8005696: 9f06 ldr r7, [sp, #24]
|
||
8005698: 9e0b ldr r6, [sp, #44] ; 0x2c
|
||
800569a: e745 b.n 8005528 <_dtoa_r+0x760>
|
||
800569c: 3fe00000 .word 0x3fe00000
|
||
80056a0: 40240000 .word 0x40240000
|
||
80056a4: 9a0a ldr r2, [sp, #40] ; 0x28
|
||
80056a6: e76a b.n 800557e <_dtoa_r+0x7b6>
|
||
80056a8: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
80056aa: 2b01 cmp r3, #1
|
||
80056ac: dc19 bgt.n 80056e2 <_dtoa_r+0x91a>
|
||
80056ae: 9b04 ldr r3, [sp, #16]
|
||
80056b0: b9bb cbnz r3, 80056e2 <_dtoa_r+0x91a>
|
||
80056b2: 9b05 ldr r3, [sp, #20]
|
||
80056b4: f3c3 0313 ubfx r3, r3, #0, #20
|
||
80056b8: b99b cbnz r3, 80056e2 <_dtoa_r+0x91a>
|
||
80056ba: 9b05 ldr r3, [sp, #20]
|
||
80056bc: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
|
||
80056c0: 0d1b lsrs r3, r3, #20
|
||
80056c2: 051b lsls r3, r3, #20
|
||
80056c4: b183 cbz r3, 80056e8 <_dtoa_r+0x920>
|
||
80056c6: f04f 0801 mov.w r8, #1
|
||
80056ca: 9b06 ldr r3, [sp, #24]
|
||
80056cc: 3301 adds r3, #1
|
||
80056ce: 9306 str r3, [sp, #24]
|
||
80056d0: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
80056d2: 3301 adds r3, #1
|
||
80056d4: 9309 str r3, [sp, #36] ; 0x24
|
||
80056d6: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
80056d8: 2b00 cmp r3, #0
|
||
80056da: f47f af6a bne.w 80055b2 <_dtoa_r+0x7ea>
|
||
80056de: 2001 movs r0, #1
|
||
80056e0: e76f b.n 80055c2 <_dtoa_r+0x7fa>
|
||
80056e2: f04f 0800 mov.w r8, #0
|
||
80056e6: e7f6 b.n 80056d6 <_dtoa_r+0x90e>
|
||
80056e8: 4698 mov r8, r3
|
||
80056ea: e7f4 b.n 80056d6 <_dtoa_r+0x90e>
|
||
80056ec: f43f af7d beq.w 80055ea <_dtoa_r+0x822>
|
||
80056f0: 4618 mov r0, r3
|
||
80056f2: 301c adds r0, #28
|
||
80056f4: e772 b.n 80055dc <_dtoa_r+0x814>
|
||
80056f6: 9b02 ldr r3, [sp, #8]
|
||
80056f8: 2b00 cmp r3, #0
|
||
80056fa: dc36 bgt.n 800576a <_dtoa_r+0x9a2>
|
||
80056fc: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
80056fe: 2b02 cmp r3, #2
|
||
8005700: dd33 ble.n 800576a <_dtoa_r+0x9a2>
|
||
8005702: f8dd b008 ldr.w fp, [sp, #8]
|
||
8005706: f1bb 0f00 cmp.w fp, #0
|
||
800570a: d10d bne.n 8005728 <_dtoa_r+0x960>
|
||
800570c: 4621 mov r1, r4
|
||
800570e: 465b mov r3, fp
|
||
8005710: 2205 movs r2, #5
|
||
8005712: 4628 mov r0, r5
|
||
8005714: f000 f9d4 bl 8005ac0 <__multadd>
|
||
8005718: 4601 mov r1, r0
|
||
800571a: 4604 mov r4, r0
|
||
800571c: 4650 mov r0, sl
|
||
800571e: f000 fbe7 bl 8005ef0 <__mcmp>
|
||
8005722: 2800 cmp r0, #0
|
||
8005724: f73f adb6 bgt.w 8005294 <_dtoa_r+0x4cc>
|
||
8005728: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
800572a: 9f08 ldr r7, [sp, #32]
|
||
800572c: ea6f 0903 mvn.w r9, r3
|
||
8005730: f04f 0800 mov.w r8, #0
|
||
8005734: 4621 mov r1, r4
|
||
8005736: 4628 mov r0, r5
|
||
8005738: f000 f9a0 bl 8005a7c <_Bfree>
|
||
800573c: 2e00 cmp r6, #0
|
||
800573e: f43f aea4 beq.w 800548a <_dtoa_r+0x6c2>
|
||
8005742: f1b8 0f00 cmp.w r8, #0
|
||
8005746: d005 beq.n 8005754 <_dtoa_r+0x98c>
|
||
8005748: 45b0 cmp r8, r6
|
||
800574a: d003 beq.n 8005754 <_dtoa_r+0x98c>
|
||
800574c: 4641 mov r1, r8
|
||
800574e: 4628 mov r0, r5
|
||
8005750: f000 f994 bl 8005a7c <_Bfree>
|
||
8005754: 4631 mov r1, r6
|
||
8005756: 4628 mov r0, r5
|
||
8005758: f000 f990 bl 8005a7c <_Bfree>
|
||
800575c: e695 b.n 800548a <_dtoa_r+0x6c2>
|
||
800575e: 2400 movs r4, #0
|
||
8005760: 4626 mov r6, r4
|
||
8005762: e7e1 b.n 8005728 <_dtoa_r+0x960>
|
||
8005764: 46c1 mov r9, r8
|
||
8005766: 4626 mov r6, r4
|
||
8005768: e594 b.n 8005294 <_dtoa_r+0x4cc>
|
||
800576a: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
800576c: f8dd b008 ldr.w fp, [sp, #8]
|
||
8005770: 2b00 cmp r3, #0
|
||
8005772: f000 80fc beq.w 800596e <_dtoa_r+0xba6>
|
||
8005776: 2f00 cmp r7, #0
|
||
8005778: dd05 ble.n 8005786 <_dtoa_r+0x9be>
|
||
800577a: 4631 mov r1, r6
|
||
800577c: 463a mov r2, r7
|
||
800577e: 4628 mov r0, r5
|
||
8005780: f000 fb4a bl 8005e18 <__lshift>
|
||
8005784: 4606 mov r6, r0
|
||
8005786: f1b8 0f00 cmp.w r8, #0
|
||
800578a: d05c beq.n 8005846 <_dtoa_r+0xa7e>
|
||
800578c: 4628 mov r0, r5
|
||
800578e: 6871 ldr r1, [r6, #4]
|
||
8005790: f000 f934 bl 80059fc <_Balloc>
|
||
8005794: 4607 mov r7, r0
|
||
8005796: b928 cbnz r0, 80057a4 <_dtoa_r+0x9dc>
|
||
8005798: 4602 mov r2, r0
|
||
800579a: f240 21ea movw r1, #746 ; 0x2ea
|
||
800579e: 4b7e ldr r3, [pc, #504] ; (8005998 <_dtoa_r+0xbd0>)
|
||
80057a0: f7ff bb26 b.w 8004df0 <_dtoa_r+0x28>
|
||
80057a4: 6932 ldr r2, [r6, #16]
|
||
80057a6: f106 010c add.w r1, r6, #12
|
||
80057aa: 3202 adds r2, #2
|
||
80057ac: 0092 lsls r2, r2, #2
|
||
80057ae: 300c adds r0, #12
|
||
80057b0: f000 f90a bl 80059c8 <memcpy>
|
||
80057b4: 2201 movs r2, #1
|
||
80057b6: 4639 mov r1, r7
|
||
80057b8: 4628 mov r0, r5
|
||
80057ba: f000 fb2d bl 8005e18 <__lshift>
|
||
80057be: 46b0 mov r8, r6
|
||
80057c0: 4606 mov r6, r0
|
||
80057c2: 9b08 ldr r3, [sp, #32]
|
||
80057c4: 3301 adds r3, #1
|
||
80057c6: 9302 str r3, [sp, #8]
|
||
80057c8: 9b08 ldr r3, [sp, #32]
|
||
80057ca: 445b add r3, fp
|
||
80057cc: 930a str r3, [sp, #40] ; 0x28
|
||
80057ce: 9b04 ldr r3, [sp, #16]
|
||
80057d0: f003 0301 and.w r3, r3, #1
|
||
80057d4: 9309 str r3, [sp, #36] ; 0x24
|
||
80057d6: 9b02 ldr r3, [sp, #8]
|
||
80057d8: 4621 mov r1, r4
|
||
80057da: 4650 mov r0, sl
|
||
80057dc: f103 3bff add.w fp, r3, #4294967295 ; 0xffffffff
|
||
80057e0: f7ff fa64 bl 8004cac <quorem>
|
||
80057e4: 4603 mov r3, r0
|
||
80057e6: 4641 mov r1, r8
|
||
80057e8: 3330 adds r3, #48 ; 0x30
|
||
80057ea: 9004 str r0, [sp, #16]
|
||
80057ec: 4650 mov r0, sl
|
||
80057ee: 930b str r3, [sp, #44] ; 0x2c
|
||
80057f0: f000 fb7e bl 8005ef0 <__mcmp>
|
||
80057f4: 4632 mov r2, r6
|
||
80057f6: 9006 str r0, [sp, #24]
|
||
80057f8: 4621 mov r1, r4
|
||
80057fa: 4628 mov r0, r5
|
||
80057fc: f000 fb94 bl 8005f28 <__mdiff>
|
||
8005800: 68c2 ldr r2, [r0, #12]
|
||
8005802: 4607 mov r7, r0
|
||
8005804: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8005806: bb02 cbnz r2, 800584a <_dtoa_r+0xa82>
|
||
8005808: 4601 mov r1, r0
|
||
800580a: 4650 mov r0, sl
|
||
800580c: f000 fb70 bl 8005ef0 <__mcmp>
|
||
8005810: 4602 mov r2, r0
|
||
8005812: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8005814: 4639 mov r1, r7
|
||
8005816: 4628 mov r0, r5
|
||
8005818: e9cd 320b strd r3, r2, [sp, #44] ; 0x2c
|
||
800581c: f000 f92e bl 8005a7c <_Bfree>
|
||
8005820: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8005822: 9a0c ldr r2, [sp, #48] ; 0x30
|
||
8005824: 9f02 ldr r7, [sp, #8]
|
||
8005826: ea43 0102 orr.w r1, r3, r2
|
||
800582a: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
800582c: 430b orrs r3, r1
|
||
800582e: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8005830: d10d bne.n 800584e <_dtoa_r+0xa86>
|
||
8005832: 2b39 cmp r3, #57 ; 0x39
|
||
8005834: d027 beq.n 8005886 <_dtoa_r+0xabe>
|
||
8005836: 9a06 ldr r2, [sp, #24]
|
||
8005838: 2a00 cmp r2, #0
|
||
800583a: dd01 ble.n 8005840 <_dtoa_r+0xa78>
|
||
800583c: 9b04 ldr r3, [sp, #16]
|
||
800583e: 3331 adds r3, #49 ; 0x31
|
||
8005840: f88b 3000 strb.w r3, [fp]
|
||
8005844: e776 b.n 8005734 <_dtoa_r+0x96c>
|
||
8005846: 4630 mov r0, r6
|
||
8005848: e7b9 b.n 80057be <_dtoa_r+0x9f6>
|
||
800584a: 2201 movs r2, #1
|
||
800584c: e7e2 b.n 8005814 <_dtoa_r+0xa4c>
|
||
800584e: 9906 ldr r1, [sp, #24]
|
||
8005850: 2900 cmp r1, #0
|
||
8005852: db04 blt.n 800585e <_dtoa_r+0xa96>
|
||
8005854: 9822 ldr r0, [sp, #136] ; 0x88
|
||
8005856: 4301 orrs r1, r0
|
||
8005858: 9809 ldr r0, [sp, #36] ; 0x24
|
||
800585a: 4301 orrs r1, r0
|
||
800585c: d120 bne.n 80058a0 <_dtoa_r+0xad8>
|
||
800585e: 2a00 cmp r2, #0
|
||
8005860: ddee ble.n 8005840 <_dtoa_r+0xa78>
|
||
8005862: 4651 mov r1, sl
|
||
8005864: 2201 movs r2, #1
|
||
8005866: 4628 mov r0, r5
|
||
8005868: 9302 str r3, [sp, #8]
|
||
800586a: f000 fad5 bl 8005e18 <__lshift>
|
||
800586e: 4621 mov r1, r4
|
||
8005870: 4682 mov sl, r0
|
||
8005872: f000 fb3d bl 8005ef0 <__mcmp>
|
||
8005876: 2800 cmp r0, #0
|
||
8005878: 9b02 ldr r3, [sp, #8]
|
||
800587a: dc02 bgt.n 8005882 <_dtoa_r+0xaba>
|
||
800587c: d1e0 bne.n 8005840 <_dtoa_r+0xa78>
|
||
800587e: 07da lsls r2, r3, #31
|
||
8005880: d5de bpl.n 8005840 <_dtoa_r+0xa78>
|
||
8005882: 2b39 cmp r3, #57 ; 0x39
|
||
8005884: d1da bne.n 800583c <_dtoa_r+0xa74>
|
||
8005886: 2339 movs r3, #57 ; 0x39
|
||
8005888: f88b 3000 strb.w r3, [fp]
|
||
800588c: 463b mov r3, r7
|
||
800588e: 461f mov r7, r3
|
||
8005890: f817 2c01 ldrb.w r2, [r7, #-1]
|
||
8005894: 3b01 subs r3, #1
|
||
8005896: 2a39 cmp r2, #57 ; 0x39
|
||
8005898: d050 beq.n 800593c <_dtoa_r+0xb74>
|
||
800589a: 3201 adds r2, #1
|
||
800589c: 701a strb r2, [r3, #0]
|
||
800589e: e749 b.n 8005734 <_dtoa_r+0x96c>
|
||
80058a0: 2a00 cmp r2, #0
|
||
80058a2: dd03 ble.n 80058ac <_dtoa_r+0xae4>
|
||
80058a4: 2b39 cmp r3, #57 ; 0x39
|
||
80058a6: d0ee beq.n 8005886 <_dtoa_r+0xabe>
|
||
80058a8: 3301 adds r3, #1
|
||
80058aa: e7c9 b.n 8005840 <_dtoa_r+0xa78>
|
||
80058ac: 9a02 ldr r2, [sp, #8]
|
||
80058ae: 990a ldr r1, [sp, #40] ; 0x28
|
||
80058b0: f802 3c01 strb.w r3, [r2, #-1]
|
||
80058b4: 428a cmp r2, r1
|
||
80058b6: d02a beq.n 800590e <_dtoa_r+0xb46>
|
||
80058b8: 4651 mov r1, sl
|
||
80058ba: 2300 movs r3, #0
|
||
80058bc: 220a movs r2, #10
|
||
80058be: 4628 mov r0, r5
|
||
80058c0: f000 f8fe bl 8005ac0 <__multadd>
|
||
80058c4: 45b0 cmp r8, r6
|
||
80058c6: 4682 mov sl, r0
|
||
80058c8: f04f 0300 mov.w r3, #0
|
||
80058cc: f04f 020a mov.w r2, #10
|
||
80058d0: 4641 mov r1, r8
|
||
80058d2: 4628 mov r0, r5
|
||
80058d4: d107 bne.n 80058e6 <_dtoa_r+0xb1e>
|
||
80058d6: f000 f8f3 bl 8005ac0 <__multadd>
|
||
80058da: 4680 mov r8, r0
|
||
80058dc: 4606 mov r6, r0
|
||
80058de: 9b02 ldr r3, [sp, #8]
|
||
80058e0: 3301 adds r3, #1
|
||
80058e2: 9302 str r3, [sp, #8]
|
||
80058e4: e777 b.n 80057d6 <_dtoa_r+0xa0e>
|
||
80058e6: f000 f8eb bl 8005ac0 <__multadd>
|
||
80058ea: 4631 mov r1, r6
|
||
80058ec: 4680 mov r8, r0
|
||
80058ee: 2300 movs r3, #0
|
||
80058f0: 220a movs r2, #10
|
||
80058f2: 4628 mov r0, r5
|
||
80058f4: f000 f8e4 bl 8005ac0 <__multadd>
|
||
80058f8: 4606 mov r6, r0
|
||
80058fa: e7f0 b.n 80058de <_dtoa_r+0xb16>
|
||
80058fc: f1bb 0f00 cmp.w fp, #0
|
||
8005900: bfcc ite gt
|
||
8005902: 465f movgt r7, fp
|
||
8005904: 2701 movle r7, #1
|
||
8005906: f04f 0800 mov.w r8, #0
|
||
800590a: 9a08 ldr r2, [sp, #32]
|
||
800590c: 4417 add r7, r2
|
||
800590e: 4651 mov r1, sl
|
||
8005910: 2201 movs r2, #1
|
||
8005912: 4628 mov r0, r5
|
||
8005914: 9302 str r3, [sp, #8]
|
||
8005916: f000 fa7f bl 8005e18 <__lshift>
|
||
800591a: 4621 mov r1, r4
|
||
800591c: 4682 mov sl, r0
|
||
800591e: f000 fae7 bl 8005ef0 <__mcmp>
|
||
8005922: 2800 cmp r0, #0
|
||
8005924: dcb2 bgt.n 800588c <_dtoa_r+0xac4>
|
||
8005926: d102 bne.n 800592e <_dtoa_r+0xb66>
|
||
8005928: 9b02 ldr r3, [sp, #8]
|
||
800592a: 07db lsls r3, r3, #31
|
||
800592c: d4ae bmi.n 800588c <_dtoa_r+0xac4>
|
||
800592e: 463b mov r3, r7
|
||
8005930: 461f mov r7, r3
|
||
8005932: f813 2d01 ldrb.w r2, [r3, #-1]!
|
||
8005936: 2a30 cmp r2, #48 ; 0x30
|
||
8005938: d0fa beq.n 8005930 <_dtoa_r+0xb68>
|
||
800593a: e6fb b.n 8005734 <_dtoa_r+0x96c>
|
||
800593c: 9a08 ldr r2, [sp, #32]
|
||
800593e: 429a cmp r2, r3
|
||
8005940: d1a5 bne.n 800588e <_dtoa_r+0xac6>
|
||
8005942: 2331 movs r3, #49 ; 0x31
|
||
8005944: f109 0901 add.w r9, r9, #1
|
||
8005948: 7013 strb r3, [r2, #0]
|
||
800594a: e6f3 b.n 8005734 <_dtoa_r+0x96c>
|
||
800594c: 4b13 ldr r3, [pc, #76] ; (800599c <_dtoa_r+0xbd4>)
|
||
800594e: f7ff baa7 b.w 8004ea0 <_dtoa_r+0xd8>
|
||
8005952: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
8005954: 2b00 cmp r3, #0
|
||
8005956: f47f aa80 bne.w 8004e5a <_dtoa_r+0x92>
|
||
800595a: 4b11 ldr r3, [pc, #68] ; (80059a0 <_dtoa_r+0xbd8>)
|
||
800595c: f7ff baa0 b.w 8004ea0 <_dtoa_r+0xd8>
|
||
8005960: f1bb 0f00 cmp.w fp, #0
|
||
8005964: dc03 bgt.n 800596e <_dtoa_r+0xba6>
|
||
8005966: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8005968: 2b02 cmp r3, #2
|
||
800596a: f73f aecc bgt.w 8005706 <_dtoa_r+0x93e>
|
||
800596e: 9f08 ldr r7, [sp, #32]
|
||
8005970: 4621 mov r1, r4
|
||
8005972: 4650 mov r0, sl
|
||
8005974: f7ff f99a bl 8004cac <quorem>
|
||
8005978: 9a08 ldr r2, [sp, #32]
|
||
800597a: f100 0330 add.w r3, r0, #48 ; 0x30
|
||
800597e: f807 3b01 strb.w r3, [r7], #1
|
||
8005982: 1aba subs r2, r7, r2
|
||
8005984: 4593 cmp fp, r2
|
||
8005986: ddb9 ble.n 80058fc <_dtoa_r+0xb34>
|
||
8005988: 4651 mov r1, sl
|
||
800598a: 2300 movs r3, #0
|
||
800598c: 220a movs r2, #10
|
||
800598e: 4628 mov r0, r5
|
||
8005990: f000 f896 bl 8005ac0 <__multadd>
|
||
8005994: 4682 mov sl, r0
|
||
8005996: e7eb b.n 8005970 <_dtoa_r+0xba8>
|
||
8005998: 08007b8f .word 0x08007b8f
|
||
800599c: 08007ae8 .word 0x08007ae8
|
||
80059a0: 08007b0c .word 0x08007b0c
|
||
|
||
080059a4 <_localeconv_r>:
|
||
80059a4: 4800 ldr r0, [pc, #0] ; (80059a8 <_localeconv_r+0x4>)
|
||
80059a6: 4770 bx lr
|
||
80059a8: 20000160 .word 0x20000160
|
||
|
||
080059ac <memchr>:
|
||
80059ac: 4603 mov r3, r0
|
||
80059ae: b510 push {r4, lr}
|
||
80059b0: b2c9 uxtb r1, r1
|
||
80059b2: 4402 add r2, r0
|
||
80059b4: 4293 cmp r3, r2
|
||
80059b6: 4618 mov r0, r3
|
||
80059b8: d101 bne.n 80059be <memchr+0x12>
|
||
80059ba: 2000 movs r0, #0
|
||
80059bc: e003 b.n 80059c6 <memchr+0x1a>
|
||
80059be: 7804 ldrb r4, [r0, #0]
|
||
80059c0: 3301 adds r3, #1
|
||
80059c2: 428c cmp r4, r1
|
||
80059c4: d1f6 bne.n 80059b4 <memchr+0x8>
|
||
80059c6: bd10 pop {r4, pc}
|
||
|
||
080059c8 <memcpy>:
|
||
80059c8: 440a add r2, r1
|
||
80059ca: 4291 cmp r1, r2
|
||
80059cc: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff
|
||
80059d0: d100 bne.n 80059d4 <memcpy+0xc>
|
||
80059d2: 4770 bx lr
|
||
80059d4: b510 push {r4, lr}
|
||
80059d6: f811 4b01 ldrb.w r4, [r1], #1
|
||
80059da: 4291 cmp r1, r2
|
||
80059dc: f803 4f01 strb.w r4, [r3, #1]!
|
||
80059e0: d1f9 bne.n 80059d6 <memcpy+0xe>
|
||
80059e2: bd10 pop {r4, pc}
|
||
|
||
080059e4 <__malloc_lock>:
|
||
80059e4: 4801 ldr r0, [pc, #4] ; (80059ec <__malloc_lock+0x8>)
|
||
80059e6: f000 bd26 b.w 8006436 <__retarget_lock_acquire_recursive>
|
||
80059ea: bf00 nop
|
||
80059ec: 20000290 .word 0x20000290
|
||
|
||
080059f0 <__malloc_unlock>:
|
||
80059f0: 4801 ldr r0, [pc, #4] ; (80059f8 <__malloc_unlock+0x8>)
|
||
80059f2: f000 bd21 b.w 8006438 <__retarget_lock_release_recursive>
|
||
80059f6: bf00 nop
|
||
80059f8: 20000290 .word 0x20000290
|
||
|
||
080059fc <_Balloc>:
|
||
80059fc: b570 push {r4, r5, r6, lr}
|
||
80059fe: 6a46 ldr r6, [r0, #36] ; 0x24
|
||
8005a00: 4604 mov r4, r0
|
||
8005a02: 460d mov r5, r1
|
||
8005a04: b976 cbnz r6, 8005a24 <_Balloc+0x28>
|
||
8005a06: 2010 movs r0, #16
|
||
8005a08: f7fe fc0a bl 8004220 <malloc>
|
||
8005a0c: 4602 mov r2, r0
|
||
8005a0e: 6260 str r0, [r4, #36] ; 0x24
|
||
8005a10: b920 cbnz r0, 8005a1c <_Balloc+0x20>
|
||
8005a12: 2166 movs r1, #102 ; 0x66
|
||
8005a14: 4b17 ldr r3, [pc, #92] ; (8005a74 <_Balloc+0x78>)
|
||
8005a16: 4818 ldr r0, [pc, #96] ; (8005a78 <_Balloc+0x7c>)
|
||
8005a18: f000 fcdc bl 80063d4 <__assert_func>
|
||
8005a1c: e9c0 6601 strd r6, r6, [r0, #4]
|
||
8005a20: 6006 str r6, [r0, #0]
|
||
8005a22: 60c6 str r6, [r0, #12]
|
||
8005a24: 6a66 ldr r6, [r4, #36] ; 0x24
|
||
8005a26: 68f3 ldr r3, [r6, #12]
|
||
8005a28: b183 cbz r3, 8005a4c <_Balloc+0x50>
|
||
8005a2a: 6a63 ldr r3, [r4, #36] ; 0x24
|
||
8005a2c: 68db ldr r3, [r3, #12]
|
||
8005a2e: f853 0025 ldr.w r0, [r3, r5, lsl #2]
|
||
8005a32: b9b8 cbnz r0, 8005a64 <_Balloc+0x68>
|
||
8005a34: 2101 movs r1, #1
|
||
8005a36: fa01 f605 lsl.w r6, r1, r5
|
||
8005a3a: 1d72 adds r2, r6, #5
|
||
8005a3c: 4620 mov r0, r4
|
||
8005a3e: 0092 lsls r2, r2, #2
|
||
8005a40: f000 fb5e bl 8006100 <_calloc_r>
|
||
8005a44: b160 cbz r0, 8005a60 <_Balloc+0x64>
|
||
8005a46: e9c0 5601 strd r5, r6, [r0, #4]
|
||
8005a4a: e00e b.n 8005a6a <_Balloc+0x6e>
|
||
8005a4c: 2221 movs r2, #33 ; 0x21
|
||
8005a4e: 2104 movs r1, #4
|
||
8005a50: 4620 mov r0, r4
|
||
8005a52: f000 fb55 bl 8006100 <_calloc_r>
|
||
8005a56: 6a63 ldr r3, [r4, #36] ; 0x24
|
||
8005a58: 60f0 str r0, [r6, #12]
|
||
8005a5a: 68db ldr r3, [r3, #12]
|
||
8005a5c: 2b00 cmp r3, #0
|
||
8005a5e: d1e4 bne.n 8005a2a <_Balloc+0x2e>
|
||
8005a60: 2000 movs r0, #0
|
||
8005a62: bd70 pop {r4, r5, r6, pc}
|
||
8005a64: 6802 ldr r2, [r0, #0]
|
||
8005a66: f843 2025 str.w r2, [r3, r5, lsl #2]
|
||
8005a6a: 2300 movs r3, #0
|
||
8005a6c: e9c0 3303 strd r3, r3, [r0, #12]
|
||
8005a70: e7f7 b.n 8005a62 <_Balloc+0x66>
|
||
8005a72: bf00 nop
|
||
8005a74: 08007b19 .word 0x08007b19
|
||
8005a78: 08007ba0 .word 0x08007ba0
|
||
|
||
08005a7c <_Bfree>:
|
||
8005a7c: b570 push {r4, r5, r6, lr}
|
||
8005a7e: 6a46 ldr r6, [r0, #36] ; 0x24
|
||
8005a80: 4605 mov r5, r0
|
||
8005a82: 460c mov r4, r1
|
||
8005a84: b976 cbnz r6, 8005aa4 <_Bfree+0x28>
|
||
8005a86: 2010 movs r0, #16
|
||
8005a88: f7fe fbca bl 8004220 <malloc>
|
||
8005a8c: 4602 mov r2, r0
|
||
8005a8e: 6268 str r0, [r5, #36] ; 0x24
|
||
8005a90: b920 cbnz r0, 8005a9c <_Bfree+0x20>
|
||
8005a92: 218a movs r1, #138 ; 0x8a
|
||
8005a94: 4b08 ldr r3, [pc, #32] ; (8005ab8 <_Bfree+0x3c>)
|
||
8005a96: 4809 ldr r0, [pc, #36] ; (8005abc <_Bfree+0x40>)
|
||
8005a98: f000 fc9c bl 80063d4 <__assert_func>
|
||
8005a9c: e9c0 6601 strd r6, r6, [r0, #4]
|
||
8005aa0: 6006 str r6, [r0, #0]
|
||
8005aa2: 60c6 str r6, [r0, #12]
|
||
8005aa4: b13c cbz r4, 8005ab6 <_Bfree+0x3a>
|
||
8005aa6: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
8005aa8: 6862 ldr r2, [r4, #4]
|
||
8005aaa: 68db ldr r3, [r3, #12]
|
||
8005aac: f853 1022 ldr.w r1, [r3, r2, lsl #2]
|
||
8005ab0: 6021 str r1, [r4, #0]
|
||
8005ab2: f843 4022 str.w r4, [r3, r2, lsl #2]
|
||
8005ab6: bd70 pop {r4, r5, r6, pc}
|
||
8005ab8: 08007b19 .word 0x08007b19
|
||
8005abc: 08007ba0 .word 0x08007ba0
|
||
|
||
08005ac0 <__multadd>:
|
||
8005ac0: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||
8005ac4: 4698 mov r8, r3
|
||
8005ac6: 460c mov r4, r1
|
||
8005ac8: 2300 movs r3, #0
|
||
8005aca: 690e ldr r6, [r1, #16]
|
||
8005acc: 4607 mov r7, r0
|
||
8005ace: f101 0014 add.w r0, r1, #20
|
||
8005ad2: 6805 ldr r5, [r0, #0]
|
||
8005ad4: 3301 adds r3, #1
|
||
8005ad6: b2a9 uxth r1, r5
|
||
8005ad8: fb02 8101 mla r1, r2, r1, r8
|
||
8005adc: 0c2d lsrs r5, r5, #16
|
||
8005ade: ea4f 4c11 mov.w ip, r1, lsr #16
|
||
8005ae2: fb02 c505 mla r5, r2, r5, ip
|
||
8005ae6: b289 uxth r1, r1
|
||
8005ae8: eb01 4105 add.w r1, r1, r5, lsl #16
|
||
8005aec: 429e cmp r6, r3
|
||
8005aee: ea4f 4815 mov.w r8, r5, lsr #16
|
||
8005af2: f840 1b04 str.w r1, [r0], #4
|
||
8005af6: dcec bgt.n 8005ad2 <__multadd+0x12>
|
||
8005af8: f1b8 0f00 cmp.w r8, #0
|
||
8005afc: d022 beq.n 8005b44 <__multadd+0x84>
|
||
8005afe: 68a3 ldr r3, [r4, #8]
|
||
8005b00: 42b3 cmp r3, r6
|
||
8005b02: dc19 bgt.n 8005b38 <__multadd+0x78>
|
||
8005b04: 6861 ldr r1, [r4, #4]
|
||
8005b06: 4638 mov r0, r7
|
||
8005b08: 3101 adds r1, #1
|
||
8005b0a: f7ff ff77 bl 80059fc <_Balloc>
|
||
8005b0e: 4605 mov r5, r0
|
||
8005b10: b928 cbnz r0, 8005b1e <__multadd+0x5e>
|
||
8005b12: 4602 mov r2, r0
|
||
8005b14: 21b5 movs r1, #181 ; 0xb5
|
||
8005b16: 4b0d ldr r3, [pc, #52] ; (8005b4c <__multadd+0x8c>)
|
||
8005b18: 480d ldr r0, [pc, #52] ; (8005b50 <__multadd+0x90>)
|
||
8005b1a: f000 fc5b bl 80063d4 <__assert_func>
|
||
8005b1e: 6922 ldr r2, [r4, #16]
|
||
8005b20: f104 010c add.w r1, r4, #12
|
||
8005b24: 3202 adds r2, #2
|
||
8005b26: 0092 lsls r2, r2, #2
|
||
8005b28: 300c adds r0, #12
|
||
8005b2a: f7ff ff4d bl 80059c8 <memcpy>
|
||
8005b2e: 4621 mov r1, r4
|
||
8005b30: 4638 mov r0, r7
|
||
8005b32: f7ff ffa3 bl 8005a7c <_Bfree>
|
||
8005b36: 462c mov r4, r5
|
||
8005b38: eb04 0386 add.w r3, r4, r6, lsl #2
|
||
8005b3c: 3601 adds r6, #1
|
||
8005b3e: f8c3 8014 str.w r8, [r3, #20]
|
||
8005b42: 6126 str r6, [r4, #16]
|
||
8005b44: 4620 mov r0, r4
|
||
8005b46: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
||
8005b4a: bf00 nop
|
||
8005b4c: 08007b8f .word 0x08007b8f
|
||
8005b50: 08007ba0 .word 0x08007ba0
|
||
|
||
08005b54 <__hi0bits>:
|
||
8005b54: 0c02 lsrs r2, r0, #16
|
||
8005b56: 0412 lsls r2, r2, #16
|
||
8005b58: 4603 mov r3, r0
|
||
8005b5a: b9ca cbnz r2, 8005b90 <__hi0bits+0x3c>
|
||
8005b5c: 0403 lsls r3, r0, #16
|
||
8005b5e: 2010 movs r0, #16
|
||
8005b60: f013 4f7f tst.w r3, #4278190080 ; 0xff000000
|
||
8005b64: bf04 itt eq
|
||
8005b66: 021b lsleq r3, r3, #8
|
||
8005b68: 3008 addeq r0, #8
|
||
8005b6a: f013 4f70 tst.w r3, #4026531840 ; 0xf0000000
|
||
8005b6e: bf04 itt eq
|
||
8005b70: 011b lsleq r3, r3, #4
|
||
8005b72: 3004 addeq r0, #4
|
||
8005b74: f013 4f40 tst.w r3, #3221225472 ; 0xc0000000
|
||
8005b78: bf04 itt eq
|
||
8005b7a: 009b lsleq r3, r3, #2
|
||
8005b7c: 3002 addeq r0, #2
|
||
8005b7e: 2b00 cmp r3, #0
|
||
8005b80: db05 blt.n 8005b8e <__hi0bits+0x3a>
|
||
8005b82: f013 4f80 tst.w r3, #1073741824 ; 0x40000000
|
||
8005b86: f100 0001 add.w r0, r0, #1
|
||
8005b8a: bf08 it eq
|
||
8005b8c: 2020 moveq r0, #32
|
||
8005b8e: 4770 bx lr
|
||
8005b90: 2000 movs r0, #0
|
||
8005b92: e7e5 b.n 8005b60 <__hi0bits+0xc>
|
||
|
||
08005b94 <__lo0bits>:
|
||
8005b94: 6803 ldr r3, [r0, #0]
|
||
8005b96: 4602 mov r2, r0
|
||
8005b98: f013 0007 ands.w r0, r3, #7
|
||
8005b9c: d00b beq.n 8005bb6 <__lo0bits+0x22>
|
||
8005b9e: 07d9 lsls r1, r3, #31
|
||
8005ba0: d422 bmi.n 8005be8 <__lo0bits+0x54>
|
||
8005ba2: 0798 lsls r0, r3, #30
|
||
8005ba4: bf49 itett mi
|
||
8005ba6: 085b lsrmi r3, r3, #1
|
||
8005ba8: 089b lsrpl r3, r3, #2
|
||
8005baa: 2001 movmi r0, #1
|
||
8005bac: 6013 strmi r3, [r2, #0]
|
||
8005bae: bf5c itt pl
|
||
8005bb0: 2002 movpl r0, #2
|
||
8005bb2: 6013 strpl r3, [r2, #0]
|
||
8005bb4: 4770 bx lr
|
||
8005bb6: b299 uxth r1, r3
|
||
8005bb8: b909 cbnz r1, 8005bbe <__lo0bits+0x2a>
|
||
8005bba: 2010 movs r0, #16
|
||
8005bbc: 0c1b lsrs r3, r3, #16
|
||
8005bbe: f013 0fff tst.w r3, #255 ; 0xff
|
||
8005bc2: bf04 itt eq
|
||
8005bc4: 0a1b lsreq r3, r3, #8
|
||
8005bc6: 3008 addeq r0, #8
|
||
8005bc8: 0719 lsls r1, r3, #28
|
||
8005bca: bf04 itt eq
|
||
8005bcc: 091b lsreq r3, r3, #4
|
||
8005bce: 3004 addeq r0, #4
|
||
8005bd0: 0799 lsls r1, r3, #30
|
||
8005bd2: bf04 itt eq
|
||
8005bd4: 089b lsreq r3, r3, #2
|
||
8005bd6: 3002 addeq r0, #2
|
||
8005bd8: 07d9 lsls r1, r3, #31
|
||
8005bda: d403 bmi.n 8005be4 <__lo0bits+0x50>
|
||
8005bdc: 085b lsrs r3, r3, #1
|
||
8005bde: f100 0001 add.w r0, r0, #1
|
||
8005be2: d003 beq.n 8005bec <__lo0bits+0x58>
|
||
8005be4: 6013 str r3, [r2, #0]
|
||
8005be6: 4770 bx lr
|
||
8005be8: 2000 movs r0, #0
|
||
8005bea: 4770 bx lr
|
||
8005bec: 2020 movs r0, #32
|
||
8005bee: 4770 bx lr
|
||
|
||
08005bf0 <__i2b>:
|
||
8005bf0: b510 push {r4, lr}
|
||
8005bf2: 460c mov r4, r1
|
||
8005bf4: 2101 movs r1, #1
|
||
8005bf6: f7ff ff01 bl 80059fc <_Balloc>
|
||
8005bfa: 4602 mov r2, r0
|
||
8005bfc: b928 cbnz r0, 8005c0a <__i2b+0x1a>
|
||
8005bfe: f44f 71a0 mov.w r1, #320 ; 0x140
|
||
8005c02: 4b04 ldr r3, [pc, #16] ; (8005c14 <__i2b+0x24>)
|
||
8005c04: 4804 ldr r0, [pc, #16] ; (8005c18 <__i2b+0x28>)
|
||
8005c06: f000 fbe5 bl 80063d4 <__assert_func>
|
||
8005c0a: 2301 movs r3, #1
|
||
8005c0c: 6144 str r4, [r0, #20]
|
||
8005c0e: 6103 str r3, [r0, #16]
|
||
8005c10: bd10 pop {r4, pc}
|
||
8005c12: bf00 nop
|
||
8005c14: 08007b8f .word 0x08007b8f
|
||
8005c18: 08007ba0 .word 0x08007ba0
|
||
|
||
08005c1c <__multiply>:
|
||
8005c1c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8005c20: 4614 mov r4, r2
|
||
8005c22: 690a ldr r2, [r1, #16]
|
||
8005c24: 6923 ldr r3, [r4, #16]
|
||
8005c26: 460d mov r5, r1
|
||
8005c28: 429a cmp r2, r3
|
||
8005c2a: bfbe ittt lt
|
||
8005c2c: 460b movlt r3, r1
|
||
8005c2e: 4625 movlt r5, r4
|
||
8005c30: 461c movlt r4, r3
|
||
8005c32: f8d5 a010 ldr.w sl, [r5, #16]
|
||
8005c36: f8d4 9010 ldr.w r9, [r4, #16]
|
||
8005c3a: 68ab ldr r3, [r5, #8]
|
||
8005c3c: 6869 ldr r1, [r5, #4]
|
||
8005c3e: eb0a 0709 add.w r7, sl, r9
|
||
8005c42: 42bb cmp r3, r7
|
||
8005c44: b085 sub sp, #20
|
||
8005c46: bfb8 it lt
|
||
8005c48: 3101 addlt r1, #1
|
||
8005c4a: f7ff fed7 bl 80059fc <_Balloc>
|
||
8005c4e: b930 cbnz r0, 8005c5e <__multiply+0x42>
|
||
8005c50: 4602 mov r2, r0
|
||
8005c52: f240 115d movw r1, #349 ; 0x15d
|
||
8005c56: 4b41 ldr r3, [pc, #260] ; (8005d5c <__multiply+0x140>)
|
||
8005c58: 4841 ldr r0, [pc, #260] ; (8005d60 <__multiply+0x144>)
|
||
8005c5a: f000 fbbb bl 80063d4 <__assert_func>
|
||
8005c5e: f100 0614 add.w r6, r0, #20
|
||
8005c62: 4633 mov r3, r6
|
||
8005c64: 2200 movs r2, #0
|
||
8005c66: eb06 0887 add.w r8, r6, r7, lsl #2
|
||
8005c6a: 4543 cmp r3, r8
|
||
8005c6c: d31e bcc.n 8005cac <__multiply+0x90>
|
||
8005c6e: f105 0c14 add.w ip, r5, #20
|
||
8005c72: f104 0314 add.w r3, r4, #20
|
||
8005c76: eb0c 0c8a add.w ip, ip, sl, lsl #2
|
||
8005c7a: eb03 0289 add.w r2, r3, r9, lsl #2
|
||
8005c7e: 9202 str r2, [sp, #8]
|
||
8005c80: ebac 0205 sub.w r2, ip, r5
|
||
8005c84: 3a15 subs r2, #21
|
||
8005c86: f022 0203 bic.w r2, r2, #3
|
||
8005c8a: 3204 adds r2, #4
|
||
8005c8c: f105 0115 add.w r1, r5, #21
|
||
8005c90: 458c cmp ip, r1
|
||
8005c92: bf38 it cc
|
||
8005c94: 2204 movcc r2, #4
|
||
8005c96: 9201 str r2, [sp, #4]
|
||
8005c98: 9a02 ldr r2, [sp, #8]
|
||
8005c9a: 9303 str r3, [sp, #12]
|
||
8005c9c: 429a cmp r2, r3
|
||
8005c9e: d808 bhi.n 8005cb2 <__multiply+0x96>
|
||
8005ca0: 2f00 cmp r7, #0
|
||
8005ca2: dc55 bgt.n 8005d50 <__multiply+0x134>
|
||
8005ca4: 6107 str r7, [r0, #16]
|
||
8005ca6: b005 add sp, #20
|
||
8005ca8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8005cac: f843 2b04 str.w r2, [r3], #4
|
||
8005cb0: e7db b.n 8005c6a <__multiply+0x4e>
|
||
8005cb2: f8b3 a000 ldrh.w sl, [r3]
|
||
8005cb6: f1ba 0f00 cmp.w sl, #0
|
||
8005cba: d020 beq.n 8005cfe <__multiply+0xe2>
|
||
8005cbc: 46b1 mov r9, r6
|
||
8005cbe: 2200 movs r2, #0
|
||
8005cc0: f105 0e14 add.w lr, r5, #20
|
||
8005cc4: f85e 4b04 ldr.w r4, [lr], #4
|
||
8005cc8: f8d9 b000 ldr.w fp, [r9]
|
||
8005ccc: b2a1 uxth r1, r4
|
||
8005cce: fa1f fb8b uxth.w fp, fp
|
||
8005cd2: fb0a b101 mla r1, sl, r1, fp
|
||
8005cd6: 4411 add r1, r2
|
||
8005cd8: f8d9 2000 ldr.w r2, [r9]
|
||
8005cdc: 0c24 lsrs r4, r4, #16
|
||
8005cde: 0c12 lsrs r2, r2, #16
|
||
8005ce0: fb0a 2404 mla r4, sl, r4, r2
|
||
8005ce4: eb04 4411 add.w r4, r4, r1, lsr #16
|
||
8005ce8: b289 uxth r1, r1
|
||
8005cea: ea41 4104 orr.w r1, r1, r4, lsl #16
|
||
8005cee: 45f4 cmp ip, lr
|
||
8005cf0: ea4f 4214 mov.w r2, r4, lsr #16
|
||
8005cf4: f849 1b04 str.w r1, [r9], #4
|
||
8005cf8: d8e4 bhi.n 8005cc4 <__multiply+0xa8>
|
||
8005cfa: 9901 ldr r1, [sp, #4]
|
||
8005cfc: 5072 str r2, [r6, r1]
|
||
8005cfe: 9a03 ldr r2, [sp, #12]
|
||
8005d00: 3304 adds r3, #4
|
||
8005d02: f8b2 9002 ldrh.w r9, [r2, #2]
|
||
8005d06: f1b9 0f00 cmp.w r9, #0
|
||
8005d0a: d01f beq.n 8005d4c <__multiply+0x130>
|
||
8005d0c: 46b6 mov lr, r6
|
||
8005d0e: f04f 0a00 mov.w sl, #0
|
||
8005d12: 6834 ldr r4, [r6, #0]
|
||
8005d14: f105 0114 add.w r1, r5, #20
|
||
8005d18: 880a ldrh r2, [r1, #0]
|
||
8005d1a: f8be b002 ldrh.w fp, [lr, #2]
|
||
8005d1e: b2a4 uxth r4, r4
|
||
8005d20: fb09 b202 mla r2, r9, r2, fp
|
||
8005d24: 4492 add sl, r2
|
||
8005d26: ea44 440a orr.w r4, r4, sl, lsl #16
|
||
8005d2a: f84e 4b04 str.w r4, [lr], #4
|
||
8005d2e: f851 4b04 ldr.w r4, [r1], #4
|
||
8005d32: f8be 2000 ldrh.w r2, [lr]
|
||
8005d36: 0c24 lsrs r4, r4, #16
|
||
8005d38: fb09 2404 mla r4, r9, r4, r2
|
||
8005d3c: 458c cmp ip, r1
|
||
8005d3e: eb04 441a add.w r4, r4, sl, lsr #16
|
||
8005d42: ea4f 4a14 mov.w sl, r4, lsr #16
|
||
8005d46: d8e7 bhi.n 8005d18 <__multiply+0xfc>
|
||
8005d48: 9a01 ldr r2, [sp, #4]
|
||
8005d4a: 50b4 str r4, [r6, r2]
|
||
8005d4c: 3604 adds r6, #4
|
||
8005d4e: e7a3 b.n 8005c98 <__multiply+0x7c>
|
||
8005d50: f858 3d04 ldr.w r3, [r8, #-4]!
|
||
8005d54: 2b00 cmp r3, #0
|
||
8005d56: d1a5 bne.n 8005ca4 <__multiply+0x88>
|
||
8005d58: 3f01 subs r7, #1
|
||
8005d5a: e7a1 b.n 8005ca0 <__multiply+0x84>
|
||
8005d5c: 08007b8f .word 0x08007b8f
|
||
8005d60: 08007ba0 .word 0x08007ba0
|
||
|
||
08005d64 <__pow5mult>:
|
||
8005d64: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
||
8005d68: 4615 mov r5, r2
|
||
8005d6a: f012 0203 ands.w r2, r2, #3
|
||
8005d6e: 4606 mov r6, r0
|
||
8005d70: 460f mov r7, r1
|
||
8005d72: d007 beq.n 8005d84 <__pow5mult+0x20>
|
||
8005d74: 4c25 ldr r4, [pc, #148] ; (8005e0c <__pow5mult+0xa8>)
|
||
8005d76: 3a01 subs r2, #1
|
||
8005d78: 2300 movs r3, #0
|
||
8005d7a: f854 2022 ldr.w r2, [r4, r2, lsl #2]
|
||
8005d7e: f7ff fe9f bl 8005ac0 <__multadd>
|
||
8005d82: 4607 mov r7, r0
|
||
8005d84: 10ad asrs r5, r5, #2
|
||
8005d86: d03d beq.n 8005e04 <__pow5mult+0xa0>
|
||
8005d88: 6a74 ldr r4, [r6, #36] ; 0x24
|
||
8005d8a: b97c cbnz r4, 8005dac <__pow5mult+0x48>
|
||
8005d8c: 2010 movs r0, #16
|
||
8005d8e: f7fe fa47 bl 8004220 <malloc>
|
||
8005d92: 4602 mov r2, r0
|
||
8005d94: 6270 str r0, [r6, #36] ; 0x24
|
||
8005d96: b928 cbnz r0, 8005da4 <__pow5mult+0x40>
|
||
8005d98: f44f 71d7 mov.w r1, #430 ; 0x1ae
|
||
8005d9c: 4b1c ldr r3, [pc, #112] ; (8005e10 <__pow5mult+0xac>)
|
||
8005d9e: 481d ldr r0, [pc, #116] ; (8005e14 <__pow5mult+0xb0>)
|
||
8005da0: f000 fb18 bl 80063d4 <__assert_func>
|
||
8005da4: e9c0 4401 strd r4, r4, [r0, #4]
|
||
8005da8: 6004 str r4, [r0, #0]
|
||
8005daa: 60c4 str r4, [r0, #12]
|
||
8005dac: f8d6 8024 ldr.w r8, [r6, #36] ; 0x24
|
||
8005db0: f8d8 4008 ldr.w r4, [r8, #8]
|
||
8005db4: b94c cbnz r4, 8005dca <__pow5mult+0x66>
|
||
8005db6: f240 2171 movw r1, #625 ; 0x271
|
||
8005dba: 4630 mov r0, r6
|
||
8005dbc: f7ff ff18 bl 8005bf0 <__i2b>
|
||
8005dc0: 2300 movs r3, #0
|
||
8005dc2: 4604 mov r4, r0
|
||
8005dc4: f8c8 0008 str.w r0, [r8, #8]
|
||
8005dc8: 6003 str r3, [r0, #0]
|
||
8005dca: f04f 0900 mov.w r9, #0
|
||
8005dce: 07eb lsls r3, r5, #31
|
||
8005dd0: d50a bpl.n 8005de8 <__pow5mult+0x84>
|
||
8005dd2: 4639 mov r1, r7
|
||
8005dd4: 4622 mov r2, r4
|
||
8005dd6: 4630 mov r0, r6
|
||
8005dd8: f7ff ff20 bl 8005c1c <__multiply>
|
||
8005ddc: 4680 mov r8, r0
|
||
8005dde: 4639 mov r1, r7
|
||
8005de0: 4630 mov r0, r6
|
||
8005de2: f7ff fe4b bl 8005a7c <_Bfree>
|
||
8005de6: 4647 mov r7, r8
|
||
8005de8: 106d asrs r5, r5, #1
|
||
8005dea: d00b beq.n 8005e04 <__pow5mult+0xa0>
|
||
8005dec: 6820 ldr r0, [r4, #0]
|
||
8005dee: b938 cbnz r0, 8005e00 <__pow5mult+0x9c>
|
||
8005df0: 4622 mov r2, r4
|
||
8005df2: 4621 mov r1, r4
|
||
8005df4: 4630 mov r0, r6
|
||
8005df6: f7ff ff11 bl 8005c1c <__multiply>
|
||
8005dfa: 6020 str r0, [r4, #0]
|
||
8005dfc: f8c0 9000 str.w r9, [r0]
|
||
8005e00: 4604 mov r4, r0
|
||
8005e02: e7e4 b.n 8005dce <__pow5mult+0x6a>
|
||
8005e04: 4638 mov r0, r7
|
||
8005e06: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
||
8005e0a: bf00 nop
|
||
8005e0c: 08007cf0 .word 0x08007cf0
|
||
8005e10: 08007b19 .word 0x08007b19
|
||
8005e14: 08007ba0 .word 0x08007ba0
|
||
|
||
08005e18 <__lshift>:
|
||
8005e18: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8005e1c: 460c mov r4, r1
|
||
8005e1e: 4607 mov r7, r0
|
||
8005e20: 4691 mov r9, r2
|
||
8005e22: 6923 ldr r3, [r4, #16]
|
||
8005e24: 6849 ldr r1, [r1, #4]
|
||
8005e26: eb03 1862 add.w r8, r3, r2, asr #5
|
||
8005e2a: 68a3 ldr r3, [r4, #8]
|
||
8005e2c: ea4f 1a62 mov.w sl, r2, asr #5
|
||
8005e30: f108 0601 add.w r6, r8, #1
|
||
8005e34: 42b3 cmp r3, r6
|
||
8005e36: db0b blt.n 8005e50 <__lshift+0x38>
|
||
8005e38: 4638 mov r0, r7
|
||
8005e3a: f7ff fddf bl 80059fc <_Balloc>
|
||
8005e3e: 4605 mov r5, r0
|
||
8005e40: b948 cbnz r0, 8005e56 <__lshift+0x3e>
|
||
8005e42: 4602 mov r2, r0
|
||
8005e44: f240 11d9 movw r1, #473 ; 0x1d9
|
||
8005e48: 4b27 ldr r3, [pc, #156] ; (8005ee8 <__lshift+0xd0>)
|
||
8005e4a: 4828 ldr r0, [pc, #160] ; (8005eec <__lshift+0xd4>)
|
||
8005e4c: f000 fac2 bl 80063d4 <__assert_func>
|
||
8005e50: 3101 adds r1, #1
|
||
8005e52: 005b lsls r3, r3, #1
|
||
8005e54: e7ee b.n 8005e34 <__lshift+0x1c>
|
||
8005e56: 2300 movs r3, #0
|
||
8005e58: f100 0114 add.w r1, r0, #20
|
||
8005e5c: f100 0210 add.w r2, r0, #16
|
||
8005e60: 4618 mov r0, r3
|
||
8005e62: 4553 cmp r3, sl
|
||
8005e64: db33 blt.n 8005ece <__lshift+0xb6>
|
||
8005e66: 6920 ldr r0, [r4, #16]
|
||
8005e68: ea2a 7aea bic.w sl, sl, sl, asr #31
|
||
8005e6c: f104 0314 add.w r3, r4, #20
|
||
8005e70: f019 091f ands.w r9, r9, #31
|
||
8005e74: eb01 018a add.w r1, r1, sl, lsl #2
|
||
8005e78: eb03 0c80 add.w ip, r3, r0, lsl #2
|
||
8005e7c: d02b beq.n 8005ed6 <__lshift+0xbe>
|
||
8005e7e: 468a mov sl, r1
|
||
8005e80: 2200 movs r2, #0
|
||
8005e82: f1c9 0e20 rsb lr, r9, #32
|
||
8005e86: 6818 ldr r0, [r3, #0]
|
||
8005e88: fa00 f009 lsl.w r0, r0, r9
|
||
8005e8c: 4302 orrs r2, r0
|
||
8005e8e: f84a 2b04 str.w r2, [sl], #4
|
||
8005e92: f853 2b04 ldr.w r2, [r3], #4
|
||
8005e96: 459c cmp ip, r3
|
||
8005e98: fa22 f20e lsr.w r2, r2, lr
|
||
8005e9c: d8f3 bhi.n 8005e86 <__lshift+0x6e>
|
||
8005e9e: ebac 0304 sub.w r3, ip, r4
|
||
8005ea2: 3b15 subs r3, #21
|
||
8005ea4: f023 0303 bic.w r3, r3, #3
|
||
8005ea8: 3304 adds r3, #4
|
||
8005eaa: f104 0015 add.w r0, r4, #21
|
||
8005eae: 4584 cmp ip, r0
|
||
8005eb0: bf38 it cc
|
||
8005eb2: 2304 movcc r3, #4
|
||
8005eb4: 50ca str r2, [r1, r3]
|
||
8005eb6: b10a cbz r2, 8005ebc <__lshift+0xa4>
|
||
8005eb8: f108 0602 add.w r6, r8, #2
|
||
8005ebc: 3e01 subs r6, #1
|
||
8005ebe: 4638 mov r0, r7
|
||
8005ec0: 4621 mov r1, r4
|
||
8005ec2: 612e str r6, [r5, #16]
|
||
8005ec4: f7ff fdda bl 8005a7c <_Bfree>
|
||
8005ec8: 4628 mov r0, r5
|
||
8005eca: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8005ece: f842 0f04 str.w r0, [r2, #4]!
|
||
8005ed2: 3301 adds r3, #1
|
||
8005ed4: e7c5 b.n 8005e62 <__lshift+0x4a>
|
||
8005ed6: 3904 subs r1, #4
|
||
8005ed8: f853 2b04 ldr.w r2, [r3], #4
|
||
8005edc: 459c cmp ip, r3
|
||
8005ede: f841 2f04 str.w r2, [r1, #4]!
|
||
8005ee2: d8f9 bhi.n 8005ed8 <__lshift+0xc0>
|
||
8005ee4: e7ea b.n 8005ebc <__lshift+0xa4>
|
||
8005ee6: bf00 nop
|
||
8005ee8: 08007b8f .word 0x08007b8f
|
||
8005eec: 08007ba0 .word 0x08007ba0
|
||
|
||
08005ef0 <__mcmp>:
|
||
8005ef0: 4603 mov r3, r0
|
||
8005ef2: 690a ldr r2, [r1, #16]
|
||
8005ef4: 6900 ldr r0, [r0, #16]
|
||
8005ef6: b530 push {r4, r5, lr}
|
||
8005ef8: 1a80 subs r0, r0, r2
|
||
8005efa: d10d bne.n 8005f18 <__mcmp+0x28>
|
||
8005efc: 3314 adds r3, #20
|
||
8005efe: 3114 adds r1, #20
|
||
8005f00: eb03 0482 add.w r4, r3, r2, lsl #2
|
||
8005f04: eb01 0182 add.w r1, r1, r2, lsl #2
|
||
8005f08: f854 5d04 ldr.w r5, [r4, #-4]!
|
||
8005f0c: f851 2d04 ldr.w r2, [r1, #-4]!
|
||
8005f10: 4295 cmp r5, r2
|
||
8005f12: d002 beq.n 8005f1a <__mcmp+0x2a>
|
||
8005f14: d304 bcc.n 8005f20 <__mcmp+0x30>
|
||
8005f16: 2001 movs r0, #1
|
||
8005f18: bd30 pop {r4, r5, pc}
|
||
8005f1a: 42a3 cmp r3, r4
|
||
8005f1c: d3f4 bcc.n 8005f08 <__mcmp+0x18>
|
||
8005f1e: e7fb b.n 8005f18 <__mcmp+0x28>
|
||
8005f20: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8005f24: e7f8 b.n 8005f18 <__mcmp+0x28>
|
||
...
|
||
|
||
08005f28 <__mdiff>:
|
||
8005f28: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8005f2c: 460c mov r4, r1
|
||
8005f2e: 4606 mov r6, r0
|
||
8005f30: 4611 mov r1, r2
|
||
8005f32: 4620 mov r0, r4
|
||
8005f34: 4692 mov sl, r2
|
||
8005f36: f7ff ffdb bl 8005ef0 <__mcmp>
|
||
8005f3a: 1e05 subs r5, r0, #0
|
||
8005f3c: d111 bne.n 8005f62 <__mdiff+0x3a>
|
||
8005f3e: 4629 mov r1, r5
|
||
8005f40: 4630 mov r0, r6
|
||
8005f42: f7ff fd5b bl 80059fc <_Balloc>
|
||
8005f46: 4602 mov r2, r0
|
||
8005f48: b928 cbnz r0, 8005f56 <__mdiff+0x2e>
|
||
8005f4a: f240 2132 movw r1, #562 ; 0x232
|
||
8005f4e: 4b3c ldr r3, [pc, #240] ; (8006040 <__mdiff+0x118>)
|
||
8005f50: 483c ldr r0, [pc, #240] ; (8006044 <__mdiff+0x11c>)
|
||
8005f52: f000 fa3f bl 80063d4 <__assert_func>
|
||
8005f56: 2301 movs r3, #1
|
||
8005f58: e9c0 3504 strd r3, r5, [r0, #16]
|
||
8005f5c: 4610 mov r0, r2
|
||
8005f5e: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8005f62: bfa4 itt ge
|
||
8005f64: 4653 movge r3, sl
|
||
8005f66: 46a2 movge sl, r4
|
||
8005f68: 4630 mov r0, r6
|
||
8005f6a: f8da 1004 ldr.w r1, [sl, #4]
|
||
8005f6e: bfa6 itte ge
|
||
8005f70: 461c movge r4, r3
|
||
8005f72: 2500 movge r5, #0
|
||
8005f74: 2501 movlt r5, #1
|
||
8005f76: f7ff fd41 bl 80059fc <_Balloc>
|
||
8005f7a: 4602 mov r2, r0
|
||
8005f7c: b918 cbnz r0, 8005f86 <__mdiff+0x5e>
|
||
8005f7e: f44f 7110 mov.w r1, #576 ; 0x240
|
||
8005f82: 4b2f ldr r3, [pc, #188] ; (8006040 <__mdiff+0x118>)
|
||
8005f84: e7e4 b.n 8005f50 <__mdiff+0x28>
|
||
8005f86: f100 0814 add.w r8, r0, #20
|
||
8005f8a: f8da 7010 ldr.w r7, [sl, #16]
|
||
8005f8e: 60c5 str r5, [r0, #12]
|
||
8005f90: f04f 0c00 mov.w ip, #0
|
||
8005f94: f10a 0514 add.w r5, sl, #20
|
||
8005f98: f10a 0010 add.w r0, sl, #16
|
||
8005f9c: 46c2 mov sl, r8
|
||
8005f9e: 6926 ldr r6, [r4, #16]
|
||
8005fa0: f104 0914 add.w r9, r4, #20
|
||
8005fa4: eb05 0e87 add.w lr, r5, r7, lsl #2
|
||
8005fa8: eb09 0686 add.w r6, r9, r6, lsl #2
|
||
8005fac: f850 bf04 ldr.w fp, [r0, #4]!
|
||
8005fb0: f859 3b04 ldr.w r3, [r9], #4
|
||
8005fb4: fa1f f18b uxth.w r1, fp
|
||
8005fb8: 4461 add r1, ip
|
||
8005fba: fa1f fc83 uxth.w ip, r3
|
||
8005fbe: 0c1b lsrs r3, r3, #16
|
||
8005fc0: eba1 010c sub.w r1, r1, ip
|
||
8005fc4: ebc3 431b rsb r3, r3, fp, lsr #16
|
||
8005fc8: eb03 4321 add.w r3, r3, r1, asr #16
|
||
8005fcc: b289 uxth r1, r1
|
||
8005fce: ea4f 4c23 mov.w ip, r3, asr #16
|
||
8005fd2: 454e cmp r6, r9
|
||
8005fd4: ea41 4303 orr.w r3, r1, r3, lsl #16
|
||
8005fd8: f84a 3b04 str.w r3, [sl], #4
|
||
8005fdc: d8e6 bhi.n 8005fac <__mdiff+0x84>
|
||
8005fde: 1b33 subs r3, r6, r4
|
||
8005fe0: 3b15 subs r3, #21
|
||
8005fe2: f023 0303 bic.w r3, r3, #3
|
||
8005fe6: 3415 adds r4, #21
|
||
8005fe8: 3304 adds r3, #4
|
||
8005fea: 42a6 cmp r6, r4
|
||
8005fec: bf38 it cc
|
||
8005fee: 2304 movcc r3, #4
|
||
8005ff0: 441d add r5, r3
|
||
8005ff2: 4443 add r3, r8
|
||
8005ff4: 461e mov r6, r3
|
||
8005ff6: 462c mov r4, r5
|
||
8005ff8: 4574 cmp r4, lr
|
||
8005ffa: d30e bcc.n 800601a <__mdiff+0xf2>
|
||
8005ffc: f10e 0103 add.w r1, lr, #3
|
||
8006000: 1b49 subs r1, r1, r5
|
||
8006002: f021 0103 bic.w r1, r1, #3
|
||
8006006: 3d03 subs r5, #3
|
||
8006008: 45ae cmp lr, r5
|
||
800600a: bf38 it cc
|
||
800600c: 2100 movcc r1, #0
|
||
800600e: 4419 add r1, r3
|
||
8006010: f851 3d04 ldr.w r3, [r1, #-4]!
|
||
8006014: b18b cbz r3, 800603a <__mdiff+0x112>
|
||
8006016: 6117 str r7, [r2, #16]
|
||
8006018: e7a0 b.n 8005f5c <__mdiff+0x34>
|
||
800601a: f854 8b04 ldr.w r8, [r4], #4
|
||
800601e: fa1f f188 uxth.w r1, r8
|
||
8006022: 4461 add r1, ip
|
||
8006024: 1408 asrs r0, r1, #16
|
||
8006026: eb00 4018 add.w r0, r0, r8, lsr #16
|
||
800602a: b289 uxth r1, r1
|
||
800602c: ea41 4100 orr.w r1, r1, r0, lsl #16
|
||
8006030: ea4f 4c20 mov.w ip, r0, asr #16
|
||
8006034: f846 1b04 str.w r1, [r6], #4
|
||
8006038: e7de b.n 8005ff8 <__mdiff+0xd0>
|
||
800603a: 3f01 subs r7, #1
|
||
800603c: e7e8 b.n 8006010 <__mdiff+0xe8>
|
||
800603e: bf00 nop
|
||
8006040: 08007b8f .word 0x08007b8f
|
||
8006044: 08007ba0 .word 0x08007ba0
|
||
|
||
08006048 <__d2b>:
|
||
8006048: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
|
||
800604c: 2101 movs r1, #1
|
||
800604e: e9dd 7608 ldrd r7, r6, [sp, #32]
|
||
8006052: 4690 mov r8, r2
|
||
8006054: 461d mov r5, r3
|
||
8006056: f7ff fcd1 bl 80059fc <_Balloc>
|
||
800605a: 4604 mov r4, r0
|
||
800605c: b930 cbnz r0, 800606c <__d2b+0x24>
|
||
800605e: 4602 mov r2, r0
|
||
8006060: f240 310a movw r1, #778 ; 0x30a
|
||
8006064: 4b24 ldr r3, [pc, #144] ; (80060f8 <__d2b+0xb0>)
|
||
8006066: 4825 ldr r0, [pc, #148] ; (80060fc <__d2b+0xb4>)
|
||
8006068: f000 f9b4 bl 80063d4 <__assert_func>
|
||
800606c: f3c5 0313 ubfx r3, r5, #0, #20
|
||
8006070: f3c5 550a ubfx r5, r5, #20, #11
|
||
8006074: bb2d cbnz r5, 80060c2 <__d2b+0x7a>
|
||
8006076: 9301 str r3, [sp, #4]
|
||
8006078: f1b8 0300 subs.w r3, r8, #0
|
||
800607c: d026 beq.n 80060cc <__d2b+0x84>
|
||
800607e: 4668 mov r0, sp
|
||
8006080: 9300 str r3, [sp, #0]
|
||
8006082: f7ff fd87 bl 8005b94 <__lo0bits>
|
||
8006086: 9900 ldr r1, [sp, #0]
|
||
8006088: b1f0 cbz r0, 80060c8 <__d2b+0x80>
|
||
800608a: 9a01 ldr r2, [sp, #4]
|
||
800608c: f1c0 0320 rsb r3, r0, #32
|
||
8006090: fa02 f303 lsl.w r3, r2, r3
|
||
8006094: 430b orrs r3, r1
|
||
8006096: 40c2 lsrs r2, r0
|
||
8006098: 6163 str r3, [r4, #20]
|
||
800609a: 9201 str r2, [sp, #4]
|
||
800609c: 9b01 ldr r3, [sp, #4]
|
||
800609e: 2b00 cmp r3, #0
|
||
80060a0: bf14 ite ne
|
||
80060a2: 2102 movne r1, #2
|
||
80060a4: 2101 moveq r1, #1
|
||
80060a6: 61a3 str r3, [r4, #24]
|
||
80060a8: 6121 str r1, [r4, #16]
|
||
80060aa: b1c5 cbz r5, 80060de <__d2b+0x96>
|
||
80060ac: f2a5 4533 subw r5, r5, #1075 ; 0x433
|
||
80060b0: 4405 add r5, r0
|
||
80060b2: f1c0 0035 rsb r0, r0, #53 ; 0x35
|
||
80060b6: 603d str r5, [r7, #0]
|
||
80060b8: 6030 str r0, [r6, #0]
|
||
80060ba: 4620 mov r0, r4
|
||
80060bc: b002 add sp, #8
|
||
80060be: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
||
80060c2: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
|
||
80060c6: e7d6 b.n 8006076 <__d2b+0x2e>
|
||
80060c8: 6161 str r1, [r4, #20]
|
||
80060ca: e7e7 b.n 800609c <__d2b+0x54>
|
||
80060cc: a801 add r0, sp, #4
|
||
80060ce: f7ff fd61 bl 8005b94 <__lo0bits>
|
||
80060d2: 2101 movs r1, #1
|
||
80060d4: 9b01 ldr r3, [sp, #4]
|
||
80060d6: 6121 str r1, [r4, #16]
|
||
80060d8: 6163 str r3, [r4, #20]
|
||
80060da: 3020 adds r0, #32
|
||
80060dc: e7e5 b.n 80060aa <__d2b+0x62>
|
||
80060de: eb04 0381 add.w r3, r4, r1, lsl #2
|
||
80060e2: f2a0 4032 subw r0, r0, #1074 ; 0x432
|
||
80060e6: 6038 str r0, [r7, #0]
|
||
80060e8: 6918 ldr r0, [r3, #16]
|
||
80060ea: f7ff fd33 bl 8005b54 <__hi0bits>
|
||
80060ee: ebc0 1141 rsb r1, r0, r1, lsl #5
|
||
80060f2: 6031 str r1, [r6, #0]
|
||
80060f4: e7e1 b.n 80060ba <__d2b+0x72>
|
||
80060f6: bf00 nop
|
||
80060f8: 08007b8f .word 0x08007b8f
|
||
80060fc: 08007ba0 .word 0x08007ba0
|
||
|
||
08006100 <_calloc_r>:
|
||
8006100: b538 push {r3, r4, r5, lr}
|
||
8006102: fb02 f501 mul.w r5, r2, r1
|
||
8006106: 4629 mov r1, r5
|
||
8006108: f7fe f8e6 bl 80042d8 <_malloc_r>
|
||
800610c: 4604 mov r4, r0
|
||
800610e: b118 cbz r0, 8006118 <_calloc_r+0x18>
|
||
8006110: 462a mov r2, r5
|
||
8006112: 2100 movs r1, #0
|
||
8006114: f7fe f88c bl 8004230 <memset>
|
||
8006118: 4620 mov r0, r4
|
||
800611a: bd38 pop {r3, r4, r5, pc}
|
||
|
||
0800611c <__ssputs_r>:
|
||
800611c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8006120: 688e ldr r6, [r1, #8]
|
||
8006122: 4682 mov sl, r0
|
||
8006124: 429e cmp r6, r3
|
||
8006126: 460c mov r4, r1
|
||
8006128: 4690 mov r8, r2
|
||
800612a: 461f mov r7, r3
|
||
800612c: d838 bhi.n 80061a0 <__ssputs_r+0x84>
|
||
800612e: 898a ldrh r2, [r1, #12]
|
||
8006130: f412 6f90 tst.w r2, #1152 ; 0x480
|
||
8006134: d032 beq.n 800619c <__ssputs_r+0x80>
|
||
8006136: 6825 ldr r5, [r4, #0]
|
||
8006138: 6909 ldr r1, [r1, #16]
|
||
800613a: 3301 adds r3, #1
|
||
800613c: eba5 0901 sub.w r9, r5, r1
|
||
8006140: 6965 ldr r5, [r4, #20]
|
||
8006142: 444b add r3, r9
|
||
8006144: eb05 0545 add.w r5, r5, r5, lsl #1
|
||
8006148: eb05 75d5 add.w r5, r5, r5, lsr #31
|
||
800614c: 106d asrs r5, r5, #1
|
||
800614e: 429d cmp r5, r3
|
||
8006150: bf38 it cc
|
||
8006152: 461d movcc r5, r3
|
||
8006154: 0553 lsls r3, r2, #21
|
||
8006156: d531 bpl.n 80061bc <__ssputs_r+0xa0>
|
||
8006158: 4629 mov r1, r5
|
||
800615a: f7fe f8bd bl 80042d8 <_malloc_r>
|
||
800615e: 4606 mov r6, r0
|
||
8006160: b950 cbnz r0, 8006178 <__ssputs_r+0x5c>
|
||
8006162: 230c movs r3, #12
|
||
8006164: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8006168: f8ca 3000 str.w r3, [sl]
|
||
800616c: 89a3 ldrh r3, [r4, #12]
|
||
800616e: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8006172: 81a3 strh r3, [r4, #12]
|
||
8006174: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8006178: 464a mov r2, r9
|
||
800617a: 6921 ldr r1, [r4, #16]
|
||
800617c: f7ff fc24 bl 80059c8 <memcpy>
|
||
8006180: 89a3 ldrh r3, [r4, #12]
|
||
8006182: f423 6390 bic.w r3, r3, #1152 ; 0x480
|
||
8006186: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
800618a: 81a3 strh r3, [r4, #12]
|
||
800618c: 6126 str r6, [r4, #16]
|
||
800618e: 444e add r6, r9
|
||
8006190: 6026 str r6, [r4, #0]
|
||
8006192: 463e mov r6, r7
|
||
8006194: 6165 str r5, [r4, #20]
|
||
8006196: eba5 0509 sub.w r5, r5, r9
|
||
800619a: 60a5 str r5, [r4, #8]
|
||
800619c: 42be cmp r6, r7
|
||
800619e: d900 bls.n 80061a2 <__ssputs_r+0x86>
|
||
80061a0: 463e mov r6, r7
|
||
80061a2: 4632 mov r2, r6
|
||
80061a4: 4641 mov r1, r8
|
||
80061a6: 6820 ldr r0, [r4, #0]
|
||
80061a8: f000 f959 bl 800645e <memmove>
|
||
80061ac: 68a3 ldr r3, [r4, #8]
|
||
80061ae: 6822 ldr r2, [r4, #0]
|
||
80061b0: 1b9b subs r3, r3, r6
|
||
80061b2: 4432 add r2, r6
|
||
80061b4: 2000 movs r0, #0
|
||
80061b6: 60a3 str r3, [r4, #8]
|
||
80061b8: 6022 str r2, [r4, #0]
|
||
80061ba: e7db b.n 8006174 <__ssputs_r+0x58>
|
||
80061bc: 462a mov r2, r5
|
||
80061be: f000 f968 bl 8006492 <_realloc_r>
|
||
80061c2: 4606 mov r6, r0
|
||
80061c4: 2800 cmp r0, #0
|
||
80061c6: d1e1 bne.n 800618c <__ssputs_r+0x70>
|
||
80061c8: 4650 mov r0, sl
|
||
80061ca: 6921 ldr r1, [r4, #16]
|
||
80061cc: f7fe f838 bl 8004240 <_free_r>
|
||
80061d0: e7c7 b.n 8006162 <__ssputs_r+0x46>
|
||
...
|
||
|
||
080061d4 <_svfiprintf_r>:
|
||
80061d4: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
80061d8: 4698 mov r8, r3
|
||
80061da: 898b ldrh r3, [r1, #12]
|
||
80061dc: 4607 mov r7, r0
|
||
80061de: 061b lsls r3, r3, #24
|
||
80061e0: 460d mov r5, r1
|
||
80061e2: 4614 mov r4, r2
|
||
80061e4: b09d sub sp, #116 ; 0x74
|
||
80061e6: d50e bpl.n 8006206 <_svfiprintf_r+0x32>
|
||
80061e8: 690b ldr r3, [r1, #16]
|
||
80061ea: b963 cbnz r3, 8006206 <_svfiprintf_r+0x32>
|
||
80061ec: 2140 movs r1, #64 ; 0x40
|
||
80061ee: f7fe f873 bl 80042d8 <_malloc_r>
|
||
80061f2: 6028 str r0, [r5, #0]
|
||
80061f4: 6128 str r0, [r5, #16]
|
||
80061f6: b920 cbnz r0, 8006202 <_svfiprintf_r+0x2e>
|
||
80061f8: 230c movs r3, #12
|
||
80061fa: 603b str r3, [r7, #0]
|
||
80061fc: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8006200: e0d1 b.n 80063a6 <_svfiprintf_r+0x1d2>
|
||
8006202: 2340 movs r3, #64 ; 0x40
|
||
8006204: 616b str r3, [r5, #20]
|
||
8006206: 2300 movs r3, #0
|
||
8006208: 9309 str r3, [sp, #36] ; 0x24
|
||
800620a: 2320 movs r3, #32
|
||
800620c: f88d 3029 strb.w r3, [sp, #41] ; 0x29
|
||
8006210: 2330 movs r3, #48 ; 0x30
|
||
8006212: f04f 0901 mov.w r9, #1
|
||
8006216: f8cd 800c str.w r8, [sp, #12]
|
||
800621a: f8df 81a4 ldr.w r8, [pc, #420] ; 80063c0 <_svfiprintf_r+0x1ec>
|
||
800621e: f88d 302a strb.w r3, [sp, #42] ; 0x2a
|
||
8006222: 4623 mov r3, r4
|
||
8006224: 469a mov sl, r3
|
||
8006226: f813 2b01 ldrb.w r2, [r3], #1
|
||
800622a: b10a cbz r2, 8006230 <_svfiprintf_r+0x5c>
|
||
800622c: 2a25 cmp r2, #37 ; 0x25
|
||
800622e: d1f9 bne.n 8006224 <_svfiprintf_r+0x50>
|
||
8006230: ebba 0b04 subs.w fp, sl, r4
|
||
8006234: d00b beq.n 800624e <_svfiprintf_r+0x7a>
|
||
8006236: 465b mov r3, fp
|
||
8006238: 4622 mov r2, r4
|
||
800623a: 4629 mov r1, r5
|
||
800623c: 4638 mov r0, r7
|
||
800623e: f7ff ff6d bl 800611c <__ssputs_r>
|
||
8006242: 3001 adds r0, #1
|
||
8006244: f000 80aa beq.w 800639c <_svfiprintf_r+0x1c8>
|
||
8006248: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
800624a: 445a add r2, fp
|
||
800624c: 9209 str r2, [sp, #36] ; 0x24
|
||
800624e: f89a 3000 ldrb.w r3, [sl]
|
||
8006252: 2b00 cmp r3, #0
|
||
8006254: f000 80a2 beq.w 800639c <_svfiprintf_r+0x1c8>
|
||
8006258: 2300 movs r3, #0
|
||
800625a: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
800625e: e9cd 2305 strd r2, r3, [sp, #20]
|
||
8006262: f10a 0a01 add.w sl, sl, #1
|
||
8006266: 9304 str r3, [sp, #16]
|
||
8006268: 9307 str r3, [sp, #28]
|
||
800626a: f88d 3053 strb.w r3, [sp, #83] ; 0x53
|
||
800626e: 931a str r3, [sp, #104] ; 0x68
|
||
8006270: 4654 mov r4, sl
|
||
8006272: 2205 movs r2, #5
|
||
8006274: f814 1b01 ldrb.w r1, [r4], #1
|
||
8006278: 4851 ldr r0, [pc, #324] ; (80063c0 <_svfiprintf_r+0x1ec>)
|
||
800627a: f7ff fb97 bl 80059ac <memchr>
|
||
800627e: 9a04 ldr r2, [sp, #16]
|
||
8006280: b9d8 cbnz r0, 80062ba <_svfiprintf_r+0xe6>
|
||
8006282: 06d0 lsls r0, r2, #27
|
||
8006284: bf44 itt mi
|
||
8006286: 2320 movmi r3, #32
|
||
8006288: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
800628c: 0711 lsls r1, r2, #28
|
||
800628e: bf44 itt mi
|
||
8006290: 232b movmi r3, #43 ; 0x2b
|
||
8006292: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
8006296: f89a 3000 ldrb.w r3, [sl]
|
||
800629a: 2b2a cmp r3, #42 ; 0x2a
|
||
800629c: d015 beq.n 80062ca <_svfiprintf_r+0xf6>
|
||
800629e: 4654 mov r4, sl
|
||
80062a0: 2000 movs r0, #0
|
||
80062a2: f04f 0c0a mov.w ip, #10
|
||
80062a6: 9a07 ldr r2, [sp, #28]
|
||
80062a8: 4621 mov r1, r4
|
||
80062aa: f811 3b01 ldrb.w r3, [r1], #1
|
||
80062ae: 3b30 subs r3, #48 ; 0x30
|
||
80062b0: 2b09 cmp r3, #9
|
||
80062b2: d94e bls.n 8006352 <_svfiprintf_r+0x17e>
|
||
80062b4: b1b0 cbz r0, 80062e4 <_svfiprintf_r+0x110>
|
||
80062b6: 9207 str r2, [sp, #28]
|
||
80062b8: e014 b.n 80062e4 <_svfiprintf_r+0x110>
|
||
80062ba: eba0 0308 sub.w r3, r0, r8
|
||
80062be: fa09 f303 lsl.w r3, r9, r3
|
||
80062c2: 4313 orrs r3, r2
|
||
80062c4: 46a2 mov sl, r4
|
||
80062c6: 9304 str r3, [sp, #16]
|
||
80062c8: e7d2 b.n 8006270 <_svfiprintf_r+0x9c>
|
||
80062ca: 9b03 ldr r3, [sp, #12]
|
||
80062cc: 1d19 adds r1, r3, #4
|
||
80062ce: 681b ldr r3, [r3, #0]
|
||
80062d0: 9103 str r1, [sp, #12]
|
||
80062d2: 2b00 cmp r3, #0
|
||
80062d4: bfbb ittet lt
|
||
80062d6: 425b neglt r3, r3
|
||
80062d8: f042 0202 orrlt.w r2, r2, #2
|
||
80062dc: 9307 strge r3, [sp, #28]
|
||
80062de: 9307 strlt r3, [sp, #28]
|
||
80062e0: bfb8 it lt
|
||
80062e2: 9204 strlt r2, [sp, #16]
|
||
80062e4: 7823 ldrb r3, [r4, #0]
|
||
80062e6: 2b2e cmp r3, #46 ; 0x2e
|
||
80062e8: d10c bne.n 8006304 <_svfiprintf_r+0x130>
|
||
80062ea: 7863 ldrb r3, [r4, #1]
|
||
80062ec: 2b2a cmp r3, #42 ; 0x2a
|
||
80062ee: d135 bne.n 800635c <_svfiprintf_r+0x188>
|
||
80062f0: 9b03 ldr r3, [sp, #12]
|
||
80062f2: 3402 adds r4, #2
|
||
80062f4: 1d1a adds r2, r3, #4
|
||
80062f6: 681b ldr r3, [r3, #0]
|
||
80062f8: 9203 str r2, [sp, #12]
|
||
80062fa: 2b00 cmp r3, #0
|
||
80062fc: bfb8 it lt
|
||
80062fe: f04f 33ff movlt.w r3, #4294967295 ; 0xffffffff
|
||
8006302: 9305 str r3, [sp, #20]
|
||
8006304: f8df a0c8 ldr.w sl, [pc, #200] ; 80063d0 <_svfiprintf_r+0x1fc>
|
||
8006308: 2203 movs r2, #3
|
||
800630a: 4650 mov r0, sl
|
||
800630c: 7821 ldrb r1, [r4, #0]
|
||
800630e: f7ff fb4d bl 80059ac <memchr>
|
||
8006312: b140 cbz r0, 8006326 <_svfiprintf_r+0x152>
|
||
8006314: 2340 movs r3, #64 ; 0x40
|
||
8006316: eba0 000a sub.w r0, r0, sl
|
||
800631a: fa03 f000 lsl.w r0, r3, r0
|
||
800631e: 9b04 ldr r3, [sp, #16]
|
||
8006320: 3401 adds r4, #1
|
||
8006322: 4303 orrs r3, r0
|
||
8006324: 9304 str r3, [sp, #16]
|
||
8006326: f814 1b01 ldrb.w r1, [r4], #1
|
||
800632a: 2206 movs r2, #6
|
||
800632c: 4825 ldr r0, [pc, #148] ; (80063c4 <_svfiprintf_r+0x1f0>)
|
||
800632e: f88d 1028 strb.w r1, [sp, #40] ; 0x28
|
||
8006332: f7ff fb3b bl 80059ac <memchr>
|
||
8006336: 2800 cmp r0, #0
|
||
8006338: d038 beq.n 80063ac <_svfiprintf_r+0x1d8>
|
||
800633a: 4b23 ldr r3, [pc, #140] ; (80063c8 <_svfiprintf_r+0x1f4>)
|
||
800633c: bb1b cbnz r3, 8006386 <_svfiprintf_r+0x1b2>
|
||
800633e: 9b03 ldr r3, [sp, #12]
|
||
8006340: 3307 adds r3, #7
|
||
8006342: f023 0307 bic.w r3, r3, #7
|
||
8006346: 3308 adds r3, #8
|
||
8006348: 9303 str r3, [sp, #12]
|
||
800634a: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
800634c: 4433 add r3, r6
|
||
800634e: 9309 str r3, [sp, #36] ; 0x24
|
||
8006350: e767 b.n 8006222 <_svfiprintf_r+0x4e>
|
||
8006352: 460c mov r4, r1
|
||
8006354: 2001 movs r0, #1
|
||
8006356: fb0c 3202 mla r2, ip, r2, r3
|
||
800635a: e7a5 b.n 80062a8 <_svfiprintf_r+0xd4>
|
||
800635c: 2300 movs r3, #0
|
||
800635e: f04f 0c0a mov.w ip, #10
|
||
8006362: 4619 mov r1, r3
|
||
8006364: 3401 adds r4, #1
|
||
8006366: 9305 str r3, [sp, #20]
|
||
8006368: 4620 mov r0, r4
|
||
800636a: f810 2b01 ldrb.w r2, [r0], #1
|
||
800636e: 3a30 subs r2, #48 ; 0x30
|
||
8006370: 2a09 cmp r2, #9
|
||
8006372: d903 bls.n 800637c <_svfiprintf_r+0x1a8>
|
||
8006374: 2b00 cmp r3, #0
|
||
8006376: d0c5 beq.n 8006304 <_svfiprintf_r+0x130>
|
||
8006378: 9105 str r1, [sp, #20]
|
||
800637a: e7c3 b.n 8006304 <_svfiprintf_r+0x130>
|
||
800637c: 4604 mov r4, r0
|
||
800637e: 2301 movs r3, #1
|
||
8006380: fb0c 2101 mla r1, ip, r1, r2
|
||
8006384: e7f0 b.n 8006368 <_svfiprintf_r+0x194>
|
||
8006386: ab03 add r3, sp, #12
|
||
8006388: 9300 str r3, [sp, #0]
|
||
800638a: 462a mov r2, r5
|
||
800638c: 4638 mov r0, r7
|
||
800638e: 4b0f ldr r3, [pc, #60] ; (80063cc <_svfiprintf_r+0x1f8>)
|
||
8006390: a904 add r1, sp, #16
|
||
8006392: f7fe f899 bl 80044c8 <_printf_float>
|
||
8006396: 1c42 adds r2, r0, #1
|
||
8006398: 4606 mov r6, r0
|
||
800639a: d1d6 bne.n 800634a <_svfiprintf_r+0x176>
|
||
800639c: 89ab ldrh r3, [r5, #12]
|
||
800639e: 065b lsls r3, r3, #25
|
||
80063a0: f53f af2c bmi.w 80061fc <_svfiprintf_r+0x28>
|
||
80063a4: 9809 ldr r0, [sp, #36] ; 0x24
|
||
80063a6: b01d add sp, #116 ; 0x74
|
||
80063a8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
80063ac: ab03 add r3, sp, #12
|
||
80063ae: 9300 str r3, [sp, #0]
|
||
80063b0: 462a mov r2, r5
|
||
80063b2: 4638 mov r0, r7
|
||
80063b4: 4b05 ldr r3, [pc, #20] ; (80063cc <_svfiprintf_r+0x1f8>)
|
||
80063b6: a904 add r1, sp, #16
|
||
80063b8: f7fe fb22 bl 8004a00 <_printf_i>
|
||
80063bc: e7eb b.n 8006396 <_svfiprintf_r+0x1c2>
|
||
80063be: bf00 nop
|
||
80063c0: 08007cfc .word 0x08007cfc
|
||
80063c4: 08007d06 .word 0x08007d06
|
||
80063c8: 080044c9 .word 0x080044c9
|
||
80063cc: 0800611d .word 0x0800611d
|
||
80063d0: 08007d02 .word 0x08007d02
|
||
|
||
080063d4 <__assert_func>:
|
||
80063d4: b51f push {r0, r1, r2, r3, r4, lr}
|
||
80063d6: 4614 mov r4, r2
|
||
80063d8: 461a mov r2, r3
|
||
80063da: 4b09 ldr r3, [pc, #36] ; (8006400 <__assert_func+0x2c>)
|
||
80063dc: 4605 mov r5, r0
|
||
80063de: 681b ldr r3, [r3, #0]
|
||
80063e0: 68d8 ldr r0, [r3, #12]
|
||
80063e2: b14c cbz r4, 80063f8 <__assert_func+0x24>
|
||
80063e4: 4b07 ldr r3, [pc, #28] ; (8006404 <__assert_func+0x30>)
|
||
80063e6: e9cd 3401 strd r3, r4, [sp, #4]
|
||
80063ea: 9100 str r1, [sp, #0]
|
||
80063ec: 462b mov r3, r5
|
||
80063ee: 4906 ldr r1, [pc, #24] ; (8006408 <__assert_func+0x34>)
|
||
80063f0: f000 f80e bl 8006410 <fiprintf>
|
||
80063f4: f000 fa98 bl 8006928 <abort>
|
||
80063f8: 4b04 ldr r3, [pc, #16] ; (800640c <__assert_func+0x38>)
|
||
80063fa: 461c mov r4, r3
|
||
80063fc: e7f3 b.n 80063e6 <__assert_func+0x12>
|
||
80063fe: bf00 nop
|
||
8006400: 2000000c .word 0x2000000c
|
||
8006404: 08007d0d .word 0x08007d0d
|
||
8006408: 08007d1a .word 0x08007d1a
|
||
800640c: 08007d48 .word 0x08007d48
|
||
|
||
08006410 <fiprintf>:
|
||
8006410: b40e push {r1, r2, r3}
|
||
8006412: b503 push {r0, r1, lr}
|
||
8006414: 4601 mov r1, r0
|
||
8006416: ab03 add r3, sp, #12
|
||
8006418: 4805 ldr r0, [pc, #20] ; (8006430 <fiprintf+0x20>)
|
||
800641a: f853 2b04 ldr.w r2, [r3], #4
|
||
800641e: 6800 ldr r0, [r0, #0]
|
||
8006420: 9301 str r3, [sp, #4]
|
||
8006422: f000 f883 bl 800652c <_vfiprintf_r>
|
||
8006426: b002 add sp, #8
|
||
8006428: f85d eb04 ldr.w lr, [sp], #4
|
||
800642c: b003 add sp, #12
|
||
800642e: 4770 bx lr
|
||
8006430: 2000000c .word 0x2000000c
|
||
|
||
08006434 <__retarget_lock_init_recursive>:
|
||
8006434: 4770 bx lr
|
||
|
||
08006436 <__retarget_lock_acquire_recursive>:
|
||
8006436: 4770 bx lr
|
||
|
||
08006438 <__retarget_lock_release_recursive>:
|
||
8006438: 4770 bx lr
|
||
|
||
0800643a <__ascii_mbtowc>:
|
||
800643a: b082 sub sp, #8
|
||
800643c: b901 cbnz r1, 8006440 <__ascii_mbtowc+0x6>
|
||
800643e: a901 add r1, sp, #4
|
||
8006440: b142 cbz r2, 8006454 <__ascii_mbtowc+0x1a>
|
||
8006442: b14b cbz r3, 8006458 <__ascii_mbtowc+0x1e>
|
||
8006444: 7813 ldrb r3, [r2, #0]
|
||
8006446: 600b str r3, [r1, #0]
|
||
8006448: 7812 ldrb r2, [r2, #0]
|
||
800644a: 1e10 subs r0, r2, #0
|
||
800644c: bf18 it ne
|
||
800644e: 2001 movne r0, #1
|
||
8006450: b002 add sp, #8
|
||
8006452: 4770 bx lr
|
||
8006454: 4610 mov r0, r2
|
||
8006456: e7fb b.n 8006450 <__ascii_mbtowc+0x16>
|
||
8006458: f06f 0001 mvn.w r0, #1
|
||
800645c: e7f8 b.n 8006450 <__ascii_mbtowc+0x16>
|
||
|
||
0800645e <memmove>:
|
||
800645e: 4288 cmp r0, r1
|
||
8006460: b510 push {r4, lr}
|
||
8006462: eb01 0402 add.w r4, r1, r2
|
||
8006466: d902 bls.n 800646e <memmove+0x10>
|
||
8006468: 4284 cmp r4, r0
|
||
800646a: 4623 mov r3, r4
|
||
800646c: d807 bhi.n 800647e <memmove+0x20>
|
||
800646e: 1e43 subs r3, r0, #1
|
||
8006470: 42a1 cmp r1, r4
|
||
8006472: d008 beq.n 8006486 <memmove+0x28>
|
||
8006474: f811 2b01 ldrb.w r2, [r1], #1
|
||
8006478: f803 2f01 strb.w r2, [r3, #1]!
|
||
800647c: e7f8 b.n 8006470 <memmove+0x12>
|
||
800647e: 4601 mov r1, r0
|
||
8006480: 4402 add r2, r0
|
||
8006482: 428a cmp r2, r1
|
||
8006484: d100 bne.n 8006488 <memmove+0x2a>
|
||
8006486: bd10 pop {r4, pc}
|
||
8006488: f813 4d01 ldrb.w r4, [r3, #-1]!
|
||
800648c: f802 4d01 strb.w r4, [r2, #-1]!
|
||
8006490: e7f7 b.n 8006482 <memmove+0x24>
|
||
|
||
08006492 <_realloc_r>:
|
||
8006492: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8006494: 4607 mov r7, r0
|
||
8006496: 4614 mov r4, r2
|
||
8006498: 460e mov r6, r1
|
||
800649a: b921 cbnz r1, 80064a6 <_realloc_r+0x14>
|
||
800649c: 4611 mov r1, r2
|
||
800649e: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr}
|
||
80064a2: f7fd bf19 b.w 80042d8 <_malloc_r>
|
||
80064a6: b922 cbnz r2, 80064b2 <_realloc_r+0x20>
|
||
80064a8: f7fd feca bl 8004240 <_free_r>
|
||
80064ac: 4625 mov r5, r4
|
||
80064ae: 4628 mov r0, r5
|
||
80064b0: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
80064b2: f000 fc5d bl 8006d70 <_malloc_usable_size_r>
|
||
80064b6: 42a0 cmp r0, r4
|
||
80064b8: d20f bcs.n 80064da <_realloc_r+0x48>
|
||
80064ba: 4621 mov r1, r4
|
||
80064bc: 4638 mov r0, r7
|
||
80064be: f7fd ff0b bl 80042d8 <_malloc_r>
|
||
80064c2: 4605 mov r5, r0
|
||
80064c4: 2800 cmp r0, #0
|
||
80064c6: d0f2 beq.n 80064ae <_realloc_r+0x1c>
|
||
80064c8: 4631 mov r1, r6
|
||
80064ca: 4622 mov r2, r4
|
||
80064cc: f7ff fa7c bl 80059c8 <memcpy>
|
||
80064d0: 4631 mov r1, r6
|
||
80064d2: 4638 mov r0, r7
|
||
80064d4: f7fd feb4 bl 8004240 <_free_r>
|
||
80064d8: e7e9 b.n 80064ae <_realloc_r+0x1c>
|
||
80064da: 4635 mov r5, r6
|
||
80064dc: e7e7 b.n 80064ae <_realloc_r+0x1c>
|
||
|
||
080064de <__sfputc_r>:
|
||
80064de: 6893 ldr r3, [r2, #8]
|
||
80064e0: b410 push {r4}
|
||
80064e2: 3b01 subs r3, #1
|
||
80064e4: 2b00 cmp r3, #0
|
||
80064e6: 6093 str r3, [r2, #8]
|
||
80064e8: da07 bge.n 80064fa <__sfputc_r+0x1c>
|
||
80064ea: 6994 ldr r4, [r2, #24]
|
||
80064ec: 42a3 cmp r3, r4
|
||
80064ee: db01 blt.n 80064f4 <__sfputc_r+0x16>
|
||
80064f0: 290a cmp r1, #10
|
||
80064f2: d102 bne.n 80064fa <__sfputc_r+0x1c>
|
||
80064f4: bc10 pop {r4}
|
||
80064f6: f000 b949 b.w 800678c <__swbuf_r>
|
||
80064fa: 6813 ldr r3, [r2, #0]
|
||
80064fc: 1c58 adds r0, r3, #1
|
||
80064fe: 6010 str r0, [r2, #0]
|
||
8006500: 7019 strb r1, [r3, #0]
|
||
8006502: 4608 mov r0, r1
|
||
8006504: bc10 pop {r4}
|
||
8006506: 4770 bx lr
|
||
|
||
08006508 <__sfputs_r>:
|
||
8006508: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
800650a: 4606 mov r6, r0
|
||
800650c: 460f mov r7, r1
|
||
800650e: 4614 mov r4, r2
|
||
8006510: 18d5 adds r5, r2, r3
|
||
8006512: 42ac cmp r4, r5
|
||
8006514: d101 bne.n 800651a <__sfputs_r+0x12>
|
||
8006516: 2000 movs r0, #0
|
||
8006518: e007 b.n 800652a <__sfputs_r+0x22>
|
||
800651a: 463a mov r2, r7
|
||
800651c: 4630 mov r0, r6
|
||
800651e: f814 1b01 ldrb.w r1, [r4], #1
|
||
8006522: f7ff ffdc bl 80064de <__sfputc_r>
|
||
8006526: 1c43 adds r3, r0, #1
|
||
8006528: d1f3 bne.n 8006512 <__sfputs_r+0xa>
|
||
800652a: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
|
||
0800652c <_vfiprintf_r>:
|
||
800652c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8006530: 460d mov r5, r1
|
||
8006532: 4614 mov r4, r2
|
||
8006534: 4698 mov r8, r3
|
||
8006536: 4606 mov r6, r0
|
||
8006538: b09d sub sp, #116 ; 0x74
|
||
800653a: b118 cbz r0, 8006544 <_vfiprintf_r+0x18>
|
||
800653c: 6983 ldr r3, [r0, #24]
|
||
800653e: b90b cbnz r3, 8006544 <_vfiprintf_r+0x18>
|
||
8006540: f000 fb14 bl 8006b6c <__sinit>
|
||
8006544: 4b89 ldr r3, [pc, #548] ; (800676c <_vfiprintf_r+0x240>)
|
||
8006546: 429d cmp r5, r3
|
||
8006548: d11b bne.n 8006582 <_vfiprintf_r+0x56>
|
||
800654a: 6875 ldr r5, [r6, #4]
|
||
800654c: 6e6b ldr r3, [r5, #100] ; 0x64
|
||
800654e: 07d9 lsls r1, r3, #31
|
||
8006550: d405 bmi.n 800655e <_vfiprintf_r+0x32>
|
||
8006552: 89ab ldrh r3, [r5, #12]
|
||
8006554: 059a lsls r2, r3, #22
|
||
8006556: d402 bmi.n 800655e <_vfiprintf_r+0x32>
|
||
8006558: 6da8 ldr r0, [r5, #88] ; 0x58
|
||
800655a: f7ff ff6c bl 8006436 <__retarget_lock_acquire_recursive>
|
||
800655e: 89ab ldrh r3, [r5, #12]
|
||
8006560: 071b lsls r3, r3, #28
|
||
8006562: d501 bpl.n 8006568 <_vfiprintf_r+0x3c>
|
||
8006564: 692b ldr r3, [r5, #16]
|
||
8006566: b9eb cbnz r3, 80065a4 <_vfiprintf_r+0x78>
|
||
8006568: 4629 mov r1, r5
|
||
800656a: 4630 mov r0, r6
|
||
800656c: f000 f96e bl 800684c <__swsetup_r>
|
||
8006570: b1c0 cbz r0, 80065a4 <_vfiprintf_r+0x78>
|
||
8006572: 6e6b ldr r3, [r5, #100] ; 0x64
|
||
8006574: 07dc lsls r4, r3, #31
|
||
8006576: d50e bpl.n 8006596 <_vfiprintf_r+0x6a>
|
||
8006578: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
800657c: b01d add sp, #116 ; 0x74
|
||
800657e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8006582: 4b7b ldr r3, [pc, #492] ; (8006770 <_vfiprintf_r+0x244>)
|
||
8006584: 429d cmp r5, r3
|
||
8006586: d101 bne.n 800658c <_vfiprintf_r+0x60>
|
||
8006588: 68b5 ldr r5, [r6, #8]
|
||
800658a: e7df b.n 800654c <_vfiprintf_r+0x20>
|
||
800658c: 4b79 ldr r3, [pc, #484] ; (8006774 <_vfiprintf_r+0x248>)
|
||
800658e: 429d cmp r5, r3
|
||
8006590: bf08 it eq
|
||
8006592: 68f5 ldreq r5, [r6, #12]
|
||
8006594: e7da b.n 800654c <_vfiprintf_r+0x20>
|
||
8006596: 89ab ldrh r3, [r5, #12]
|
||
8006598: 0598 lsls r0, r3, #22
|
||
800659a: d4ed bmi.n 8006578 <_vfiprintf_r+0x4c>
|
||
800659c: 6da8 ldr r0, [r5, #88] ; 0x58
|
||
800659e: f7ff ff4b bl 8006438 <__retarget_lock_release_recursive>
|
||
80065a2: e7e9 b.n 8006578 <_vfiprintf_r+0x4c>
|
||
80065a4: 2300 movs r3, #0
|
||
80065a6: 9309 str r3, [sp, #36] ; 0x24
|
||
80065a8: 2320 movs r3, #32
|
||
80065aa: f88d 3029 strb.w r3, [sp, #41] ; 0x29
|
||
80065ae: 2330 movs r3, #48 ; 0x30
|
||
80065b0: f04f 0901 mov.w r9, #1
|
||
80065b4: f8cd 800c str.w r8, [sp, #12]
|
||
80065b8: f8df 81bc ldr.w r8, [pc, #444] ; 8006778 <_vfiprintf_r+0x24c>
|
||
80065bc: f88d 302a strb.w r3, [sp, #42] ; 0x2a
|
||
80065c0: 4623 mov r3, r4
|
||
80065c2: 469a mov sl, r3
|
||
80065c4: f813 2b01 ldrb.w r2, [r3], #1
|
||
80065c8: b10a cbz r2, 80065ce <_vfiprintf_r+0xa2>
|
||
80065ca: 2a25 cmp r2, #37 ; 0x25
|
||
80065cc: d1f9 bne.n 80065c2 <_vfiprintf_r+0x96>
|
||
80065ce: ebba 0b04 subs.w fp, sl, r4
|
||
80065d2: d00b beq.n 80065ec <_vfiprintf_r+0xc0>
|
||
80065d4: 465b mov r3, fp
|
||
80065d6: 4622 mov r2, r4
|
||
80065d8: 4629 mov r1, r5
|
||
80065da: 4630 mov r0, r6
|
||
80065dc: f7ff ff94 bl 8006508 <__sfputs_r>
|
||
80065e0: 3001 adds r0, #1
|
||
80065e2: f000 80aa beq.w 800673a <_vfiprintf_r+0x20e>
|
||
80065e6: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
80065e8: 445a add r2, fp
|
||
80065ea: 9209 str r2, [sp, #36] ; 0x24
|
||
80065ec: f89a 3000 ldrb.w r3, [sl]
|
||
80065f0: 2b00 cmp r3, #0
|
||
80065f2: f000 80a2 beq.w 800673a <_vfiprintf_r+0x20e>
|
||
80065f6: 2300 movs r3, #0
|
||
80065f8: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
80065fc: e9cd 2305 strd r2, r3, [sp, #20]
|
||
8006600: f10a 0a01 add.w sl, sl, #1
|
||
8006604: 9304 str r3, [sp, #16]
|
||
8006606: 9307 str r3, [sp, #28]
|
||
8006608: f88d 3053 strb.w r3, [sp, #83] ; 0x53
|
||
800660c: 931a str r3, [sp, #104] ; 0x68
|
||
800660e: 4654 mov r4, sl
|
||
8006610: 2205 movs r2, #5
|
||
8006612: f814 1b01 ldrb.w r1, [r4], #1
|
||
8006616: 4858 ldr r0, [pc, #352] ; (8006778 <_vfiprintf_r+0x24c>)
|
||
8006618: f7ff f9c8 bl 80059ac <memchr>
|
||
800661c: 9a04 ldr r2, [sp, #16]
|
||
800661e: b9d8 cbnz r0, 8006658 <_vfiprintf_r+0x12c>
|
||
8006620: 06d1 lsls r1, r2, #27
|
||
8006622: bf44 itt mi
|
||
8006624: 2320 movmi r3, #32
|
||
8006626: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
800662a: 0713 lsls r3, r2, #28
|
||
800662c: bf44 itt mi
|
||
800662e: 232b movmi r3, #43 ; 0x2b
|
||
8006630: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
8006634: f89a 3000 ldrb.w r3, [sl]
|
||
8006638: 2b2a cmp r3, #42 ; 0x2a
|
||
800663a: d015 beq.n 8006668 <_vfiprintf_r+0x13c>
|
||
800663c: 4654 mov r4, sl
|
||
800663e: 2000 movs r0, #0
|
||
8006640: f04f 0c0a mov.w ip, #10
|
||
8006644: 9a07 ldr r2, [sp, #28]
|
||
8006646: 4621 mov r1, r4
|
||
8006648: f811 3b01 ldrb.w r3, [r1], #1
|
||
800664c: 3b30 subs r3, #48 ; 0x30
|
||
800664e: 2b09 cmp r3, #9
|
||
8006650: d94e bls.n 80066f0 <_vfiprintf_r+0x1c4>
|
||
8006652: b1b0 cbz r0, 8006682 <_vfiprintf_r+0x156>
|
||
8006654: 9207 str r2, [sp, #28]
|
||
8006656: e014 b.n 8006682 <_vfiprintf_r+0x156>
|
||
8006658: eba0 0308 sub.w r3, r0, r8
|
||
800665c: fa09 f303 lsl.w r3, r9, r3
|
||
8006660: 4313 orrs r3, r2
|
||
8006662: 46a2 mov sl, r4
|
||
8006664: 9304 str r3, [sp, #16]
|
||
8006666: e7d2 b.n 800660e <_vfiprintf_r+0xe2>
|
||
8006668: 9b03 ldr r3, [sp, #12]
|
||
800666a: 1d19 adds r1, r3, #4
|
||
800666c: 681b ldr r3, [r3, #0]
|
||
800666e: 9103 str r1, [sp, #12]
|
||
8006670: 2b00 cmp r3, #0
|
||
8006672: bfbb ittet lt
|
||
8006674: 425b neglt r3, r3
|
||
8006676: f042 0202 orrlt.w r2, r2, #2
|
||
800667a: 9307 strge r3, [sp, #28]
|
||
800667c: 9307 strlt r3, [sp, #28]
|
||
800667e: bfb8 it lt
|
||
8006680: 9204 strlt r2, [sp, #16]
|
||
8006682: 7823 ldrb r3, [r4, #0]
|
||
8006684: 2b2e cmp r3, #46 ; 0x2e
|
||
8006686: d10c bne.n 80066a2 <_vfiprintf_r+0x176>
|
||
8006688: 7863 ldrb r3, [r4, #1]
|
||
800668a: 2b2a cmp r3, #42 ; 0x2a
|
||
800668c: d135 bne.n 80066fa <_vfiprintf_r+0x1ce>
|
||
800668e: 9b03 ldr r3, [sp, #12]
|
||
8006690: 3402 adds r4, #2
|
||
8006692: 1d1a adds r2, r3, #4
|
||
8006694: 681b ldr r3, [r3, #0]
|
||
8006696: 9203 str r2, [sp, #12]
|
||
8006698: 2b00 cmp r3, #0
|
||
800669a: bfb8 it lt
|
||
800669c: f04f 33ff movlt.w r3, #4294967295 ; 0xffffffff
|
||
80066a0: 9305 str r3, [sp, #20]
|
||
80066a2: f8df a0e4 ldr.w sl, [pc, #228] ; 8006788 <_vfiprintf_r+0x25c>
|
||
80066a6: 2203 movs r2, #3
|
||
80066a8: 4650 mov r0, sl
|
||
80066aa: 7821 ldrb r1, [r4, #0]
|
||
80066ac: f7ff f97e bl 80059ac <memchr>
|
||
80066b0: b140 cbz r0, 80066c4 <_vfiprintf_r+0x198>
|
||
80066b2: 2340 movs r3, #64 ; 0x40
|
||
80066b4: eba0 000a sub.w r0, r0, sl
|
||
80066b8: fa03 f000 lsl.w r0, r3, r0
|
||
80066bc: 9b04 ldr r3, [sp, #16]
|
||
80066be: 3401 adds r4, #1
|
||
80066c0: 4303 orrs r3, r0
|
||
80066c2: 9304 str r3, [sp, #16]
|
||
80066c4: f814 1b01 ldrb.w r1, [r4], #1
|
||
80066c8: 2206 movs r2, #6
|
||
80066ca: 482c ldr r0, [pc, #176] ; (800677c <_vfiprintf_r+0x250>)
|
||
80066cc: f88d 1028 strb.w r1, [sp, #40] ; 0x28
|
||
80066d0: f7ff f96c bl 80059ac <memchr>
|
||
80066d4: 2800 cmp r0, #0
|
||
80066d6: d03f beq.n 8006758 <_vfiprintf_r+0x22c>
|
||
80066d8: 4b29 ldr r3, [pc, #164] ; (8006780 <_vfiprintf_r+0x254>)
|
||
80066da: bb1b cbnz r3, 8006724 <_vfiprintf_r+0x1f8>
|
||
80066dc: 9b03 ldr r3, [sp, #12]
|
||
80066de: 3307 adds r3, #7
|
||
80066e0: f023 0307 bic.w r3, r3, #7
|
||
80066e4: 3308 adds r3, #8
|
||
80066e6: 9303 str r3, [sp, #12]
|
||
80066e8: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
80066ea: 443b add r3, r7
|
||
80066ec: 9309 str r3, [sp, #36] ; 0x24
|
||
80066ee: e767 b.n 80065c0 <_vfiprintf_r+0x94>
|
||
80066f0: 460c mov r4, r1
|
||
80066f2: 2001 movs r0, #1
|
||
80066f4: fb0c 3202 mla r2, ip, r2, r3
|
||
80066f8: e7a5 b.n 8006646 <_vfiprintf_r+0x11a>
|
||
80066fa: 2300 movs r3, #0
|
||
80066fc: f04f 0c0a mov.w ip, #10
|
||
8006700: 4619 mov r1, r3
|
||
8006702: 3401 adds r4, #1
|
||
8006704: 9305 str r3, [sp, #20]
|
||
8006706: 4620 mov r0, r4
|
||
8006708: f810 2b01 ldrb.w r2, [r0], #1
|
||
800670c: 3a30 subs r2, #48 ; 0x30
|
||
800670e: 2a09 cmp r2, #9
|
||
8006710: d903 bls.n 800671a <_vfiprintf_r+0x1ee>
|
||
8006712: 2b00 cmp r3, #0
|
||
8006714: d0c5 beq.n 80066a2 <_vfiprintf_r+0x176>
|
||
8006716: 9105 str r1, [sp, #20]
|
||
8006718: e7c3 b.n 80066a2 <_vfiprintf_r+0x176>
|
||
800671a: 4604 mov r4, r0
|
||
800671c: 2301 movs r3, #1
|
||
800671e: fb0c 2101 mla r1, ip, r1, r2
|
||
8006722: e7f0 b.n 8006706 <_vfiprintf_r+0x1da>
|
||
8006724: ab03 add r3, sp, #12
|
||
8006726: 9300 str r3, [sp, #0]
|
||
8006728: 462a mov r2, r5
|
||
800672a: 4630 mov r0, r6
|
||
800672c: 4b15 ldr r3, [pc, #84] ; (8006784 <_vfiprintf_r+0x258>)
|
||
800672e: a904 add r1, sp, #16
|
||
8006730: f7fd feca bl 80044c8 <_printf_float>
|
||
8006734: 4607 mov r7, r0
|
||
8006736: 1c78 adds r0, r7, #1
|
||
8006738: d1d6 bne.n 80066e8 <_vfiprintf_r+0x1bc>
|
||
800673a: 6e6b ldr r3, [r5, #100] ; 0x64
|
||
800673c: 07d9 lsls r1, r3, #31
|
||
800673e: d405 bmi.n 800674c <_vfiprintf_r+0x220>
|
||
8006740: 89ab ldrh r3, [r5, #12]
|
||
8006742: 059a lsls r2, r3, #22
|
||
8006744: d402 bmi.n 800674c <_vfiprintf_r+0x220>
|
||
8006746: 6da8 ldr r0, [r5, #88] ; 0x58
|
||
8006748: f7ff fe76 bl 8006438 <__retarget_lock_release_recursive>
|
||
800674c: 89ab ldrh r3, [r5, #12]
|
||
800674e: 065b lsls r3, r3, #25
|
||
8006750: f53f af12 bmi.w 8006578 <_vfiprintf_r+0x4c>
|
||
8006754: 9809 ldr r0, [sp, #36] ; 0x24
|
||
8006756: e711 b.n 800657c <_vfiprintf_r+0x50>
|
||
8006758: ab03 add r3, sp, #12
|
||
800675a: 9300 str r3, [sp, #0]
|
||
800675c: 462a mov r2, r5
|
||
800675e: 4630 mov r0, r6
|
||
8006760: 4b08 ldr r3, [pc, #32] ; (8006784 <_vfiprintf_r+0x258>)
|
||
8006762: a904 add r1, sp, #16
|
||
8006764: f7fe f94c bl 8004a00 <_printf_i>
|
||
8006768: e7e4 b.n 8006734 <_vfiprintf_r+0x208>
|
||
800676a: bf00 nop
|
||
800676c: 08007e74 .word 0x08007e74
|
||
8006770: 08007e94 .word 0x08007e94
|
||
8006774: 08007e54 .word 0x08007e54
|
||
8006778: 08007cfc .word 0x08007cfc
|
||
800677c: 08007d06 .word 0x08007d06
|
||
8006780: 080044c9 .word 0x080044c9
|
||
8006784: 08006509 .word 0x08006509
|
||
8006788: 08007d02 .word 0x08007d02
|
||
|
||
0800678c <__swbuf_r>:
|
||
800678c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
800678e: 460e mov r6, r1
|
||
8006790: 4614 mov r4, r2
|
||
8006792: 4605 mov r5, r0
|
||
8006794: b118 cbz r0, 800679e <__swbuf_r+0x12>
|
||
8006796: 6983 ldr r3, [r0, #24]
|
||
8006798: b90b cbnz r3, 800679e <__swbuf_r+0x12>
|
||
800679a: f000 f9e7 bl 8006b6c <__sinit>
|
||
800679e: 4b21 ldr r3, [pc, #132] ; (8006824 <__swbuf_r+0x98>)
|
||
80067a0: 429c cmp r4, r3
|
||
80067a2: d12b bne.n 80067fc <__swbuf_r+0x70>
|
||
80067a4: 686c ldr r4, [r5, #4]
|
||
80067a6: 69a3 ldr r3, [r4, #24]
|
||
80067a8: 60a3 str r3, [r4, #8]
|
||
80067aa: 89a3 ldrh r3, [r4, #12]
|
||
80067ac: 071a lsls r2, r3, #28
|
||
80067ae: d52f bpl.n 8006810 <__swbuf_r+0x84>
|
||
80067b0: 6923 ldr r3, [r4, #16]
|
||
80067b2: b36b cbz r3, 8006810 <__swbuf_r+0x84>
|
||
80067b4: 6923 ldr r3, [r4, #16]
|
||
80067b6: 6820 ldr r0, [r4, #0]
|
||
80067b8: b2f6 uxtb r6, r6
|
||
80067ba: 1ac0 subs r0, r0, r3
|
||
80067bc: 6963 ldr r3, [r4, #20]
|
||
80067be: 4637 mov r7, r6
|
||
80067c0: 4283 cmp r3, r0
|
||
80067c2: dc04 bgt.n 80067ce <__swbuf_r+0x42>
|
||
80067c4: 4621 mov r1, r4
|
||
80067c6: 4628 mov r0, r5
|
||
80067c8: f000 f93c bl 8006a44 <_fflush_r>
|
||
80067cc: bb30 cbnz r0, 800681c <__swbuf_r+0x90>
|
||
80067ce: 68a3 ldr r3, [r4, #8]
|
||
80067d0: 3001 adds r0, #1
|
||
80067d2: 3b01 subs r3, #1
|
||
80067d4: 60a3 str r3, [r4, #8]
|
||
80067d6: 6823 ldr r3, [r4, #0]
|
||
80067d8: 1c5a adds r2, r3, #1
|
||
80067da: 6022 str r2, [r4, #0]
|
||
80067dc: 701e strb r6, [r3, #0]
|
||
80067de: 6963 ldr r3, [r4, #20]
|
||
80067e0: 4283 cmp r3, r0
|
||
80067e2: d004 beq.n 80067ee <__swbuf_r+0x62>
|
||
80067e4: 89a3 ldrh r3, [r4, #12]
|
||
80067e6: 07db lsls r3, r3, #31
|
||
80067e8: d506 bpl.n 80067f8 <__swbuf_r+0x6c>
|
||
80067ea: 2e0a cmp r6, #10
|
||
80067ec: d104 bne.n 80067f8 <__swbuf_r+0x6c>
|
||
80067ee: 4621 mov r1, r4
|
||
80067f0: 4628 mov r0, r5
|
||
80067f2: f000 f927 bl 8006a44 <_fflush_r>
|
||
80067f6: b988 cbnz r0, 800681c <__swbuf_r+0x90>
|
||
80067f8: 4638 mov r0, r7
|
||
80067fa: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
80067fc: 4b0a ldr r3, [pc, #40] ; (8006828 <__swbuf_r+0x9c>)
|
||
80067fe: 429c cmp r4, r3
|
||
8006800: d101 bne.n 8006806 <__swbuf_r+0x7a>
|
||
8006802: 68ac ldr r4, [r5, #8]
|
||
8006804: e7cf b.n 80067a6 <__swbuf_r+0x1a>
|
||
8006806: 4b09 ldr r3, [pc, #36] ; (800682c <__swbuf_r+0xa0>)
|
||
8006808: 429c cmp r4, r3
|
||
800680a: bf08 it eq
|
||
800680c: 68ec ldreq r4, [r5, #12]
|
||
800680e: e7ca b.n 80067a6 <__swbuf_r+0x1a>
|
||
8006810: 4621 mov r1, r4
|
||
8006812: 4628 mov r0, r5
|
||
8006814: f000 f81a bl 800684c <__swsetup_r>
|
||
8006818: 2800 cmp r0, #0
|
||
800681a: d0cb beq.n 80067b4 <__swbuf_r+0x28>
|
||
800681c: f04f 37ff mov.w r7, #4294967295 ; 0xffffffff
|
||
8006820: e7ea b.n 80067f8 <__swbuf_r+0x6c>
|
||
8006822: bf00 nop
|
||
8006824: 08007e74 .word 0x08007e74
|
||
8006828: 08007e94 .word 0x08007e94
|
||
800682c: 08007e54 .word 0x08007e54
|
||
|
||
08006830 <__ascii_wctomb>:
|
||
8006830: 4603 mov r3, r0
|
||
8006832: 4608 mov r0, r1
|
||
8006834: b141 cbz r1, 8006848 <__ascii_wctomb+0x18>
|
||
8006836: 2aff cmp r2, #255 ; 0xff
|
||
8006838: d904 bls.n 8006844 <__ascii_wctomb+0x14>
|
||
800683a: 228a movs r2, #138 ; 0x8a
|
||
800683c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8006840: 601a str r2, [r3, #0]
|
||
8006842: 4770 bx lr
|
||
8006844: 2001 movs r0, #1
|
||
8006846: 700a strb r2, [r1, #0]
|
||
8006848: 4770 bx lr
|
||
...
|
||
|
||
0800684c <__swsetup_r>:
|
||
800684c: 4b32 ldr r3, [pc, #200] ; (8006918 <__swsetup_r+0xcc>)
|
||
800684e: b570 push {r4, r5, r6, lr}
|
||
8006850: 681d ldr r5, [r3, #0]
|
||
8006852: 4606 mov r6, r0
|
||
8006854: 460c mov r4, r1
|
||
8006856: b125 cbz r5, 8006862 <__swsetup_r+0x16>
|
||
8006858: 69ab ldr r3, [r5, #24]
|
||
800685a: b913 cbnz r3, 8006862 <__swsetup_r+0x16>
|
||
800685c: 4628 mov r0, r5
|
||
800685e: f000 f985 bl 8006b6c <__sinit>
|
||
8006862: 4b2e ldr r3, [pc, #184] ; (800691c <__swsetup_r+0xd0>)
|
||
8006864: 429c cmp r4, r3
|
||
8006866: d10f bne.n 8006888 <__swsetup_r+0x3c>
|
||
8006868: 686c ldr r4, [r5, #4]
|
||
800686a: 89a3 ldrh r3, [r4, #12]
|
||
800686c: f9b4 200c ldrsh.w r2, [r4, #12]
|
||
8006870: 0719 lsls r1, r3, #28
|
||
8006872: d42c bmi.n 80068ce <__swsetup_r+0x82>
|
||
8006874: 06dd lsls r5, r3, #27
|
||
8006876: d411 bmi.n 800689c <__swsetup_r+0x50>
|
||
8006878: 2309 movs r3, #9
|
||
800687a: 6033 str r3, [r6, #0]
|
||
800687c: f042 0340 orr.w r3, r2, #64 ; 0x40
|
||
8006880: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8006884: 81a3 strh r3, [r4, #12]
|
||
8006886: e03e b.n 8006906 <__swsetup_r+0xba>
|
||
8006888: 4b25 ldr r3, [pc, #148] ; (8006920 <__swsetup_r+0xd4>)
|
||
800688a: 429c cmp r4, r3
|
||
800688c: d101 bne.n 8006892 <__swsetup_r+0x46>
|
||
800688e: 68ac ldr r4, [r5, #8]
|
||
8006890: e7eb b.n 800686a <__swsetup_r+0x1e>
|
||
8006892: 4b24 ldr r3, [pc, #144] ; (8006924 <__swsetup_r+0xd8>)
|
||
8006894: 429c cmp r4, r3
|
||
8006896: bf08 it eq
|
||
8006898: 68ec ldreq r4, [r5, #12]
|
||
800689a: e7e6 b.n 800686a <__swsetup_r+0x1e>
|
||
800689c: 0758 lsls r0, r3, #29
|
||
800689e: d512 bpl.n 80068c6 <__swsetup_r+0x7a>
|
||
80068a0: 6b61 ldr r1, [r4, #52] ; 0x34
|
||
80068a2: b141 cbz r1, 80068b6 <__swsetup_r+0x6a>
|
||
80068a4: f104 0344 add.w r3, r4, #68 ; 0x44
|
||
80068a8: 4299 cmp r1, r3
|
||
80068aa: d002 beq.n 80068b2 <__swsetup_r+0x66>
|
||
80068ac: 4630 mov r0, r6
|
||
80068ae: f7fd fcc7 bl 8004240 <_free_r>
|
||
80068b2: 2300 movs r3, #0
|
||
80068b4: 6363 str r3, [r4, #52] ; 0x34
|
||
80068b6: 89a3 ldrh r3, [r4, #12]
|
||
80068b8: f023 0324 bic.w r3, r3, #36 ; 0x24
|
||
80068bc: 81a3 strh r3, [r4, #12]
|
||
80068be: 2300 movs r3, #0
|
||
80068c0: 6063 str r3, [r4, #4]
|
||
80068c2: 6923 ldr r3, [r4, #16]
|
||
80068c4: 6023 str r3, [r4, #0]
|
||
80068c6: 89a3 ldrh r3, [r4, #12]
|
||
80068c8: f043 0308 orr.w r3, r3, #8
|
||
80068cc: 81a3 strh r3, [r4, #12]
|
||
80068ce: 6923 ldr r3, [r4, #16]
|
||
80068d0: b94b cbnz r3, 80068e6 <__swsetup_r+0x9a>
|
||
80068d2: 89a3 ldrh r3, [r4, #12]
|
||
80068d4: f403 7320 and.w r3, r3, #640 ; 0x280
|
||
80068d8: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
||
80068dc: d003 beq.n 80068e6 <__swsetup_r+0x9a>
|
||
80068de: 4621 mov r1, r4
|
||
80068e0: 4630 mov r0, r6
|
||
80068e2: f000 fa05 bl 8006cf0 <__smakebuf_r>
|
||
80068e6: 89a0 ldrh r0, [r4, #12]
|
||
80068e8: f9b4 200c ldrsh.w r2, [r4, #12]
|
||
80068ec: f010 0301 ands.w r3, r0, #1
|
||
80068f0: d00a beq.n 8006908 <__swsetup_r+0xbc>
|
||
80068f2: 2300 movs r3, #0
|
||
80068f4: 60a3 str r3, [r4, #8]
|
||
80068f6: 6963 ldr r3, [r4, #20]
|
||
80068f8: 425b negs r3, r3
|
||
80068fa: 61a3 str r3, [r4, #24]
|
||
80068fc: 6923 ldr r3, [r4, #16]
|
||
80068fe: b943 cbnz r3, 8006912 <__swsetup_r+0xc6>
|
||
8006900: f010 0080 ands.w r0, r0, #128 ; 0x80
|
||
8006904: d1ba bne.n 800687c <__swsetup_r+0x30>
|
||
8006906: bd70 pop {r4, r5, r6, pc}
|
||
8006908: 0781 lsls r1, r0, #30
|
||
800690a: bf58 it pl
|
||
800690c: 6963 ldrpl r3, [r4, #20]
|
||
800690e: 60a3 str r3, [r4, #8]
|
||
8006910: e7f4 b.n 80068fc <__swsetup_r+0xb0>
|
||
8006912: 2000 movs r0, #0
|
||
8006914: e7f7 b.n 8006906 <__swsetup_r+0xba>
|
||
8006916: bf00 nop
|
||
8006918: 2000000c .word 0x2000000c
|
||
800691c: 08007e74 .word 0x08007e74
|
||
8006920: 08007e94 .word 0x08007e94
|
||
8006924: 08007e54 .word 0x08007e54
|
||
|
||
08006928 <abort>:
|
||
8006928: 2006 movs r0, #6
|
||
800692a: b508 push {r3, lr}
|
||
800692c: f000 fa50 bl 8006dd0 <raise>
|
||
8006930: 2001 movs r0, #1
|
||
8006932: f7fa fe0b bl 800154c <_exit>
|
||
...
|
||
|
||
08006938 <__sflush_r>:
|
||
8006938: 898a ldrh r2, [r1, #12]
|
||
800693a: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||
800693e: 4605 mov r5, r0
|
||
8006940: 0710 lsls r0, r2, #28
|
||
8006942: 460c mov r4, r1
|
||
8006944: d458 bmi.n 80069f8 <__sflush_r+0xc0>
|
||
8006946: 684b ldr r3, [r1, #4]
|
||
8006948: 2b00 cmp r3, #0
|
||
800694a: dc05 bgt.n 8006958 <__sflush_r+0x20>
|
||
800694c: 6c0b ldr r3, [r1, #64] ; 0x40
|
||
800694e: 2b00 cmp r3, #0
|
||
8006950: dc02 bgt.n 8006958 <__sflush_r+0x20>
|
||
8006952: 2000 movs r0, #0
|
||
8006954: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
||
8006958: 6ae6 ldr r6, [r4, #44] ; 0x2c
|
||
800695a: 2e00 cmp r6, #0
|
||
800695c: d0f9 beq.n 8006952 <__sflush_r+0x1a>
|
||
800695e: 2300 movs r3, #0
|
||
8006960: f412 5280 ands.w r2, r2, #4096 ; 0x1000
|
||
8006964: 682f ldr r7, [r5, #0]
|
||
8006966: 602b str r3, [r5, #0]
|
||
8006968: d032 beq.n 80069d0 <__sflush_r+0x98>
|
||
800696a: 6d60 ldr r0, [r4, #84] ; 0x54
|
||
800696c: 89a3 ldrh r3, [r4, #12]
|
||
800696e: 075a lsls r2, r3, #29
|
||
8006970: d505 bpl.n 800697e <__sflush_r+0x46>
|
||
8006972: 6863 ldr r3, [r4, #4]
|
||
8006974: 1ac0 subs r0, r0, r3
|
||
8006976: 6b63 ldr r3, [r4, #52] ; 0x34
|
||
8006978: b10b cbz r3, 800697e <__sflush_r+0x46>
|
||
800697a: 6c23 ldr r3, [r4, #64] ; 0x40
|
||
800697c: 1ac0 subs r0, r0, r3
|
||
800697e: 2300 movs r3, #0
|
||
8006980: 4602 mov r2, r0
|
||
8006982: 6ae6 ldr r6, [r4, #44] ; 0x2c
|
||
8006984: 4628 mov r0, r5
|
||
8006986: 6a21 ldr r1, [r4, #32]
|
||
8006988: 47b0 blx r6
|
||
800698a: 1c43 adds r3, r0, #1
|
||
800698c: 89a3 ldrh r3, [r4, #12]
|
||
800698e: d106 bne.n 800699e <__sflush_r+0x66>
|
||
8006990: 6829 ldr r1, [r5, #0]
|
||
8006992: 291d cmp r1, #29
|
||
8006994: d82c bhi.n 80069f0 <__sflush_r+0xb8>
|
||
8006996: 4a2a ldr r2, [pc, #168] ; (8006a40 <__sflush_r+0x108>)
|
||
8006998: 40ca lsrs r2, r1
|
||
800699a: 07d6 lsls r6, r2, #31
|
||
800699c: d528 bpl.n 80069f0 <__sflush_r+0xb8>
|
||
800699e: 2200 movs r2, #0
|
||
80069a0: 6062 str r2, [r4, #4]
|
||
80069a2: 6922 ldr r2, [r4, #16]
|
||
80069a4: 04d9 lsls r1, r3, #19
|
||
80069a6: 6022 str r2, [r4, #0]
|
||
80069a8: d504 bpl.n 80069b4 <__sflush_r+0x7c>
|
||
80069aa: 1c42 adds r2, r0, #1
|
||
80069ac: d101 bne.n 80069b2 <__sflush_r+0x7a>
|
||
80069ae: 682b ldr r3, [r5, #0]
|
||
80069b0: b903 cbnz r3, 80069b4 <__sflush_r+0x7c>
|
||
80069b2: 6560 str r0, [r4, #84] ; 0x54
|
||
80069b4: 6b61 ldr r1, [r4, #52] ; 0x34
|
||
80069b6: 602f str r7, [r5, #0]
|
||
80069b8: 2900 cmp r1, #0
|
||
80069ba: d0ca beq.n 8006952 <__sflush_r+0x1a>
|
||
80069bc: f104 0344 add.w r3, r4, #68 ; 0x44
|
||
80069c0: 4299 cmp r1, r3
|
||
80069c2: d002 beq.n 80069ca <__sflush_r+0x92>
|
||
80069c4: 4628 mov r0, r5
|
||
80069c6: f7fd fc3b bl 8004240 <_free_r>
|
||
80069ca: 2000 movs r0, #0
|
||
80069cc: 6360 str r0, [r4, #52] ; 0x34
|
||
80069ce: e7c1 b.n 8006954 <__sflush_r+0x1c>
|
||
80069d0: 6a21 ldr r1, [r4, #32]
|
||
80069d2: 2301 movs r3, #1
|
||
80069d4: 4628 mov r0, r5
|
||
80069d6: 47b0 blx r6
|
||
80069d8: 1c41 adds r1, r0, #1
|
||
80069da: d1c7 bne.n 800696c <__sflush_r+0x34>
|
||
80069dc: 682b ldr r3, [r5, #0]
|
||
80069de: 2b00 cmp r3, #0
|
||
80069e0: d0c4 beq.n 800696c <__sflush_r+0x34>
|
||
80069e2: 2b1d cmp r3, #29
|
||
80069e4: d001 beq.n 80069ea <__sflush_r+0xb2>
|
||
80069e6: 2b16 cmp r3, #22
|
||
80069e8: d101 bne.n 80069ee <__sflush_r+0xb6>
|
||
80069ea: 602f str r7, [r5, #0]
|
||
80069ec: e7b1 b.n 8006952 <__sflush_r+0x1a>
|
||
80069ee: 89a3 ldrh r3, [r4, #12]
|
||
80069f0: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
80069f4: 81a3 strh r3, [r4, #12]
|
||
80069f6: e7ad b.n 8006954 <__sflush_r+0x1c>
|
||
80069f8: 690f ldr r7, [r1, #16]
|
||
80069fa: 2f00 cmp r7, #0
|
||
80069fc: d0a9 beq.n 8006952 <__sflush_r+0x1a>
|
||
80069fe: 0793 lsls r3, r2, #30
|
||
8006a00: bf18 it ne
|
||
8006a02: 2300 movne r3, #0
|
||
8006a04: 680e ldr r6, [r1, #0]
|
||
8006a06: bf08 it eq
|
||
8006a08: 694b ldreq r3, [r1, #20]
|
||
8006a0a: eba6 0807 sub.w r8, r6, r7
|
||
8006a0e: 600f str r7, [r1, #0]
|
||
8006a10: 608b str r3, [r1, #8]
|
||
8006a12: f1b8 0f00 cmp.w r8, #0
|
||
8006a16: dd9c ble.n 8006952 <__sflush_r+0x1a>
|
||
8006a18: 4643 mov r3, r8
|
||
8006a1a: 463a mov r2, r7
|
||
8006a1c: 4628 mov r0, r5
|
||
8006a1e: 6a21 ldr r1, [r4, #32]
|
||
8006a20: 6aa6 ldr r6, [r4, #40] ; 0x28
|
||
8006a22: 47b0 blx r6
|
||
8006a24: 2800 cmp r0, #0
|
||
8006a26: dc06 bgt.n 8006a36 <__sflush_r+0xfe>
|
||
8006a28: 89a3 ldrh r3, [r4, #12]
|
||
8006a2a: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8006a2e: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8006a32: 81a3 strh r3, [r4, #12]
|
||
8006a34: e78e b.n 8006954 <__sflush_r+0x1c>
|
||
8006a36: 4407 add r7, r0
|
||
8006a38: eba8 0800 sub.w r8, r8, r0
|
||
8006a3c: e7e9 b.n 8006a12 <__sflush_r+0xda>
|
||
8006a3e: bf00 nop
|
||
8006a40: 20400001 .word 0x20400001
|
||
|
||
08006a44 <_fflush_r>:
|
||
8006a44: b538 push {r3, r4, r5, lr}
|
||
8006a46: 690b ldr r3, [r1, #16]
|
||
8006a48: 4605 mov r5, r0
|
||
8006a4a: 460c mov r4, r1
|
||
8006a4c: b913 cbnz r3, 8006a54 <_fflush_r+0x10>
|
||
8006a4e: 2500 movs r5, #0
|
||
8006a50: 4628 mov r0, r5
|
||
8006a52: bd38 pop {r3, r4, r5, pc}
|
||
8006a54: b118 cbz r0, 8006a5e <_fflush_r+0x1a>
|
||
8006a56: 6983 ldr r3, [r0, #24]
|
||
8006a58: b90b cbnz r3, 8006a5e <_fflush_r+0x1a>
|
||
8006a5a: f000 f887 bl 8006b6c <__sinit>
|
||
8006a5e: 4b14 ldr r3, [pc, #80] ; (8006ab0 <_fflush_r+0x6c>)
|
||
8006a60: 429c cmp r4, r3
|
||
8006a62: d11b bne.n 8006a9c <_fflush_r+0x58>
|
||
8006a64: 686c ldr r4, [r5, #4]
|
||
8006a66: f9b4 300c ldrsh.w r3, [r4, #12]
|
||
8006a6a: 2b00 cmp r3, #0
|
||
8006a6c: d0ef beq.n 8006a4e <_fflush_r+0xa>
|
||
8006a6e: 6e62 ldr r2, [r4, #100] ; 0x64
|
||
8006a70: 07d0 lsls r0, r2, #31
|
||
8006a72: d404 bmi.n 8006a7e <_fflush_r+0x3a>
|
||
8006a74: 0599 lsls r1, r3, #22
|
||
8006a76: d402 bmi.n 8006a7e <_fflush_r+0x3a>
|
||
8006a78: 6da0 ldr r0, [r4, #88] ; 0x58
|
||
8006a7a: f7ff fcdc bl 8006436 <__retarget_lock_acquire_recursive>
|
||
8006a7e: 4628 mov r0, r5
|
||
8006a80: 4621 mov r1, r4
|
||
8006a82: f7ff ff59 bl 8006938 <__sflush_r>
|
||
8006a86: 6e63 ldr r3, [r4, #100] ; 0x64
|
||
8006a88: 4605 mov r5, r0
|
||
8006a8a: 07da lsls r2, r3, #31
|
||
8006a8c: d4e0 bmi.n 8006a50 <_fflush_r+0xc>
|
||
8006a8e: 89a3 ldrh r3, [r4, #12]
|
||
8006a90: 059b lsls r3, r3, #22
|
||
8006a92: d4dd bmi.n 8006a50 <_fflush_r+0xc>
|
||
8006a94: 6da0 ldr r0, [r4, #88] ; 0x58
|
||
8006a96: f7ff fccf bl 8006438 <__retarget_lock_release_recursive>
|
||
8006a9a: e7d9 b.n 8006a50 <_fflush_r+0xc>
|
||
8006a9c: 4b05 ldr r3, [pc, #20] ; (8006ab4 <_fflush_r+0x70>)
|
||
8006a9e: 429c cmp r4, r3
|
||
8006aa0: d101 bne.n 8006aa6 <_fflush_r+0x62>
|
||
8006aa2: 68ac ldr r4, [r5, #8]
|
||
8006aa4: e7df b.n 8006a66 <_fflush_r+0x22>
|
||
8006aa6: 4b04 ldr r3, [pc, #16] ; (8006ab8 <_fflush_r+0x74>)
|
||
8006aa8: 429c cmp r4, r3
|
||
8006aaa: bf08 it eq
|
||
8006aac: 68ec ldreq r4, [r5, #12]
|
||
8006aae: e7da b.n 8006a66 <_fflush_r+0x22>
|
||
8006ab0: 08007e74 .word 0x08007e74
|
||
8006ab4: 08007e94 .word 0x08007e94
|
||
8006ab8: 08007e54 .word 0x08007e54
|
||
|
||
08006abc <std>:
|
||
8006abc: 2300 movs r3, #0
|
||
8006abe: b510 push {r4, lr}
|
||
8006ac0: 4604 mov r4, r0
|
||
8006ac2: e9c0 3300 strd r3, r3, [r0]
|
||
8006ac6: e9c0 3304 strd r3, r3, [r0, #16]
|
||
8006aca: 6083 str r3, [r0, #8]
|
||
8006acc: 8181 strh r1, [r0, #12]
|
||
8006ace: 6643 str r3, [r0, #100] ; 0x64
|
||
8006ad0: 81c2 strh r2, [r0, #14]
|
||
8006ad2: 6183 str r3, [r0, #24]
|
||
8006ad4: 4619 mov r1, r3
|
||
8006ad6: 2208 movs r2, #8
|
||
8006ad8: 305c adds r0, #92 ; 0x5c
|
||
8006ada: f7fd fba9 bl 8004230 <memset>
|
||
8006ade: 4b05 ldr r3, [pc, #20] ; (8006af4 <std+0x38>)
|
||
8006ae0: 6224 str r4, [r4, #32]
|
||
8006ae2: 6263 str r3, [r4, #36] ; 0x24
|
||
8006ae4: 4b04 ldr r3, [pc, #16] ; (8006af8 <std+0x3c>)
|
||
8006ae6: 62a3 str r3, [r4, #40] ; 0x28
|
||
8006ae8: 4b04 ldr r3, [pc, #16] ; (8006afc <std+0x40>)
|
||
8006aea: 62e3 str r3, [r4, #44] ; 0x2c
|
||
8006aec: 4b04 ldr r3, [pc, #16] ; (8006b00 <std+0x44>)
|
||
8006aee: 6323 str r3, [r4, #48] ; 0x30
|
||
8006af0: bd10 pop {r4, pc}
|
||
8006af2: bf00 nop
|
||
8006af4: 08006e09 .word 0x08006e09
|
||
8006af8: 08006e2b .word 0x08006e2b
|
||
8006afc: 08006e63 .word 0x08006e63
|
||
8006b00: 08006e87 .word 0x08006e87
|
||
|
||
08006b04 <_cleanup_r>:
|
||
8006b04: 4901 ldr r1, [pc, #4] ; (8006b0c <_cleanup_r+0x8>)
|
||
8006b06: f000 b8af b.w 8006c68 <_fwalk_reent>
|
||
8006b0a: bf00 nop
|
||
8006b0c: 08006a45 .word 0x08006a45
|
||
|
||
08006b10 <__sfmoreglue>:
|
||
8006b10: b570 push {r4, r5, r6, lr}
|
||
8006b12: 2568 movs r5, #104 ; 0x68
|
||
8006b14: 1e4a subs r2, r1, #1
|
||
8006b16: 4355 muls r5, r2
|
||
8006b18: 460e mov r6, r1
|
||
8006b1a: f105 0174 add.w r1, r5, #116 ; 0x74
|
||
8006b1e: f7fd fbdb bl 80042d8 <_malloc_r>
|
||
8006b22: 4604 mov r4, r0
|
||
8006b24: b140 cbz r0, 8006b38 <__sfmoreglue+0x28>
|
||
8006b26: 2100 movs r1, #0
|
||
8006b28: e9c0 1600 strd r1, r6, [r0]
|
||
8006b2c: 300c adds r0, #12
|
||
8006b2e: 60a0 str r0, [r4, #8]
|
||
8006b30: f105 0268 add.w r2, r5, #104 ; 0x68
|
||
8006b34: f7fd fb7c bl 8004230 <memset>
|
||
8006b38: 4620 mov r0, r4
|
||
8006b3a: bd70 pop {r4, r5, r6, pc}
|
||
|
||
08006b3c <__sfp_lock_acquire>:
|
||
8006b3c: 4801 ldr r0, [pc, #4] ; (8006b44 <__sfp_lock_acquire+0x8>)
|
||
8006b3e: f7ff bc7a b.w 8006436 <__retarget_lock_acquire_recursive>
|
||
8006b42: bf00 nop
|
||
8006b44: 20000294 .word 0x20000294
|
||
|
||
08006b48 <__sfp_lock_release>:
|
||
8006b48: 4801 ldr r0, [pc, #4] ; (8006b50 <__sfp_lock_release+0x8>)
|
||
8006b4a: f7ff bc75 b.w 8006438 <__retarget_lock_release_recursive>
|
||
8006b4e: bf00 nop
|
||
8006b50: 20000294 .word 0x20000294
|
||
|
||
08006b54 <__sinit_lock_acquire>:
|
||
8006b54: 4801 ldr r0, [pc, #4] ; (8006b5c <__sinit_lock_acquire+0x8>)
|
||
8006b56: f7ff bc6e b.w 8006436 <__retarget_lock_acquire_recursive>
|
||
8006b5a: bf00 nop
|
||
8006b5c: 2000028f .word 0x2000028f
|
||
|
||
08006b60 <__sinit_lock_release>:
|
||
8006b60: 4801 ldr r0, [pc, #4] ; (8006b68 <__sinit_lock_release+0x8>)
|
||
8006b62: f7ff bc69 b.w 8006438 <__retarget_lock_release_recursive>
|
||
8006b66: bf00 nop
|
||
8006b68: 2000028f .word 0x2000028f
|
||
|
||
08006b6c <__sinit>:
|
||
8006b6c: b510 push {r4, lr}
|
||
8006b6e: 4604 mov r4, r0
|
||
8006b70: f7ff fff0 bl 8006b54 <__sinit_lock_acquire>
|
||
8006b74: 69a3 ldr r3, [r4, #24]
|
||
8006b76: b11b cbz r3, 8006b80 <__sinit+0x14>
|
||
8006b78: e8bd 4010 ldmia.w sp!, {r4, lr}
|
||
8006b7c: f7ff bff0 b.w 8006b60 <__sinit_lock_release>
|
||
8006b80: e9c4 3312 strd r3, r3, [r4, #72] ; 0x48
|
||
8006b84: 6523 str r3, [r4, #80] ; 0x50
|
||
8006b86: 4b13 ldr r3, [pc, #76] ; (8006bd4 <__sinit+0x68>)
|
||
8006b88: 4a13 ldr r2, [pc, #76] ; (8006bd8 <__sinit+0x6c>)
|
||
8006b8a: 681b ldr r3, [r3, #0]
|
||
8006b8c: 62a2 str r2, [r4, #40] ; 0x28
|
||
8006b8e: 42a3 cmp r3, r4
|
||
8006b90: bf08 it eq
|
||
8006b92: 2301 moveq r3, #1
|
||
8006b94: 4620 mov r0, r4
|
||
8006b96: bf08 it eq
|
||
8006b98: 61a3 streq r3, [r4, #24]
|
||
8006b9a: f000 f81f bl 8006bdc <__sfp>
|
||
8006b9e: 6060 str r0, [r4, #4]
|
||
8006ba0: 4620 mov r0, r4
|
||
8006ba2: f000 f81b bl 8006bdc <__sfp>
|
||
8006ba6: 60a0 str r0, [r4, #8]
|
||
8006ba8: 4620 mov r0, r4
|
||
8006baa: f000 f817 bl 8006bdc <__sfp>
|
||
8006bae: 2200 movs r2, #0
|
||
8006bb0: 2104 movs r1, #4
|
||
8006bb2: 60e0 str r0, [r4, #12]
|
||
8006bb4: 6860 ldr r0, [r4, #4]
|
||
8006bb6: f7ff ff81 bl 8006abc <std>
|
||
8006bba: 2201 movs r2, #1
|
||
8006bbc: 2109 movs r1, #9
|
||
8006bbe: 68a0 ldr r0, [r4, #8]
|
||
8006bc0: f7ff ff7c bl 8006abc <std>
|
||
8006bc4: 2202 movs r2, #2
|
||
8006bc6: 2112 movs r1, #18
|
||
8006bc8: 68e0 ldr r0, [r4, #12]
|
||
8006bca: f7ff ff77 bl 8006abc <std>
|
||
8006bce: 2301 movs r3, #1
|
||
8006bd0: 61a3 str r3, [r4, #24]
|
||
8006bd2: e7d1 b.n 8006b78 <__sinit+0xc>
|
||
8006bd4: 08007ad4 .word 0x08007ad4
|
||
8006bd8: 08006b05 .word 0x08006b05
|
||
|
||
08006bdc <__sfp>:
|
||
8006bdc: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8006bde: 4607 mov r7, r0
|
||
8006be0: f7ff ffac bl 8006b3c <__sfp_lock_acquire>
|
||
8006be4: 4b1e ldr r3, [pc, #120] ; (8006c60 <__sfp+0x84>)
|
||
8006be6: 681e ldr r6, [r3, #0]
|
||
8006be8: 69b3 ldr r3, [r6, #24]
|
||
8006bea: b913 cbnz r3, 8006bf2 <__sfp+0x16>
|
||
8006bec: 4630 mov r0, r6
|
||
8006bee: f7ff ffbd bl 8006b6c <__sinit>
|
||
8006bf2: 3648 adds r6, #72 ; 0x48
|
||
8006bf4: e9d6 3401 ldrd r3, r4, [r6, #4]
|
||
8006bf8: 3b01 subs r3, #1
|
||
8006bfa: d503 bpl.n 8006c04 <__sfp+0x28>
|
||
8006bfc: 6833 ldr r3, [r6, #0]
|
||
8006bfe: b30b cbz r3, 8006c44 <__sfp+0x68>
|
||
8006c00: 6836 ldr r6, [r6, #0]
|
||
8006c02: e7f7 b.n 8006bf4 <__sfp+0x18>
|
||
8006c04: f9b4 500c ldrsh.w r5, [r4, #12]
|
||
8006c08: b9d5 cbnz r5, 8006c40 <__sfp+0x64>
|
||
8006c0a: 4b16 ldr r3, [pc, #88] ; (8006c64 <__sfp+0x88>)
|
||
8006c0c: f104 0058 add.w r0, r4, #88 ; 0x58
|
||
8006c10: 60e3 str r3, [r4, #12]
|
||
8006c12: 6665 str r5, [r4, #100] ; 0x64
|
||
8006c14: f7ff fc0e bl 8006434 <__retarget_lock_init_recursive>
|
||
8006c18: f7ff ff96 bl 8006b48 <__sfp_lock_release>
|
||
8006c1c: 2208 movs r2, #8
|
||
8006c1e: 4629 mov r1, r5
|
||
8006c20: e9c4 5501 strd r5, r5, [r4, #4]
|
||
8006c24: e9c4 5504 strd r5, r5, [r4, #16]
|
||
8006c28: 6025 str r5, [r4, #0]
|
||
8006c2a: 61a5 str r5, [r4, #24]
|
||
8006c2c: f104 005c add.w r0, r4, #92 ; 0x5c
|
||
8006c30: f7fd fafe bl 8004230 <memset>
|
||
8006c34: e9c4 550d strd r5, r5, [r4, #52] ; 0x34
|
||
8006c38: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48
|
||
8006c3c: 4620 mov r0, r4
|
||
8006c3e: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
8006c40: 3468 adds r4, #104 ; 0x68
|
||
8006c42: e7d9 b.n 8006bf8 <__sfp+0x1c>
|
||
8006c44: 2104 movs r1, #4
|
||
8006c46: 4638 mov r0, r7
|
||
8006c48: f7ff ff62 bl 8006b10 <__sfmoreglue>
|
||
8006c4c: 4604 mov r4, r0
|
||
8006c4e: 6030 str r0, [r6, #0]
|
||
8006c50: 2800 cmp r0, #0
|
||
8006c52: d1d5 bne.n 8006c00 <__sfp+0x24>
|
||
8006c54: f7ff ff78 bl 8006b48 <__sfp_lock_release>
|
||
8006c58: 230c movs r3, #12
|
||
8006c5a: 603b str r3, [r7, #0]
|
||
8006c5c: e7ee b.n 8006c3c <__sfp+0x60>
|
||
8006c5e: bf00 nop
|
||
8006c60: 08007ad4 .word 0x08007ad4
|
||
8006c64: ffff0001 .word 0xffff0001
|
||
|
||
08006c68 <_fwalk_reent>:
|
||
8006c68: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
||
8006c6c: 4606 mov r6, r0
|
||
8006c6e: 4688 mov r8, r1
|
||
8006c70: 2700 movs r7, #0
|
||
8006c72: f100 0448 add.w r4, r0, #72 ; 0x48
|
||
8006c76: e9d4 9501 ldrd r9, r5, [r4, #4]
|
||
8006c7a: f1b9 0901 subs.w r9, r9, #1
|
||
8006c7e: d505 bpl.n 8006c8c <_fwalk_reent+0x24>
|
||
8006c80: 6824 ldr r4, [r4, #0]
|
||
8006c82: 2c00 cmp r4, #0
|
||
8006c84: d1f7 bne.n 8006c76 <_fwalk_reent+0xe>
|
||
8006c86: 4638 mov r0, r7
|
||
8006c88: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
||
8006c8c: 89ab ldrh r3, [r5, #12]
|
||
8006c8e: 2b01 cmp r3, #1
|
||
8006c90: d907 bls.n 8006ca2 <_fwalk_reent+0x3a>
|
||
8006c92: f9b5 300e ldrsh.w r3, [r5, #14]
|
||
8006c96: 3301 adds r3, #1
|
||
8006c98: d003 beq.n 8006ca2 <_fwalk_reent+0x3a>
|
||
8006c9a: 4629 mov r1, r5
|
||
8006c9c: 4630 mov r0, r6
|
||
8006c9e: 47c0 blx r8
|
||
8006ca0: 4307 orrs r7, r0
|
||
8006ca2: 3568 adds r5, #104 ; 0x68
|
||
8006ca4: e7e9 b.n 8006c7a <_fwalk_reent+0x12>
|
||
|
||
08006ca6 <__swhatbuf_r>:
|
||
8006ca6: b570 push {r4, r5, r6, lr}
|
||
8006ca8: 460e mov r6, r1
|
||
8006caa: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
8006cae: 4614 mov r4, r2
|
||
8006cb0: 2900 cmp r1, #0
|
||
8006cb2: 461d mov r5, r3
|
||
8006cb4: b096 sub sp, #88 ; 0x58
|
||
8006cb6: da07 bge.n 8006cc8 <__swhatbuf_r+0x22>
|
||
8006cb8: 2300 movs r3, #0
|
||
8006cba: 602b str r3, [r5, #0]
|
||
8006cbc: 89b3 ldrh r3, [r6, #12]
|
||
8006cbe: 061a lsls r2, r3, #24
|
||
8006cc0: d410 bmi.n 8006ce4 <__swhatbuf_r+0x3e>
|
||
8006cc2: f44f 6380 mov.w r3, #1024 ; 0x400
|
||
8006cc6: e00e b.n 8006ce6 <__swhatbuf_r+0x40>
|
||
8006cc8: 466a mov r2, sp
|
||
8006cca: f000 f903 bl 8006ed4 <_fstat_r>
|
||
8006cce: 2800 cmp r0, #0
|
||
8006cd0: dbf2 blt.n 8006cb8 <__swhatbuf_r+0x12>
|
||
8006cd2: 9a01 ldr r2, [sp, #4]
|
||
8006cd4: f402 4270 and.w r2, r2, #61440 ; 0xf000
|
||
8006cd8: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000
|
||
8006cdc: 425a negs r2, r3
|
||
8006cde: 415a adcs r2, r3
|
||
8006ce0: 602a str r2, [r5, #0]
|
||
8006ce2: e7ee b.n 8006cc2 <__swhatbuf_r+0x1c>
|
||
8006ce4: 2340 movs r3, #64 ; 0x40
|
||
8006ce6: 2000 movs r0, #0
|
||
8006ce8: 6023 str r3, [r4, #0]
|
||
8006cea: b016 add sp, #88 ; 0x58
|
||
8006cec: bd70 pop {r4, r5, r6, pc}
|
||
...
|
||
|
||
08006cf0 <__smakebuf_r>:
|
||
8006cf0: 898b ldrh r3, [r1, #12]
|
||
8006cf2: b573 push {r0, r1, r4, r5, r6, lr}
|
||
8006cf4: 079d lsls r5, r3, #30
|
||
8006cf6: 4606 mov r6, r0
|
||
8006cf8: 460c mov r4, r1
|
||
8006cfa: d507 bpl.n 8006d0c <__smakebuf_r+0x1c>
|
||
8006cfc: f104 0347 add.w r3, r4, #71 ; 0x47
|
||
8006d00: 6023 str r3, [r4, #0]
|
||
8006d02: 6123 str r3, [r4, #16]
|
||
8006d04: 2301 movs r3, #1
|
||
8006d06: 6163 str r3, [r4, #20]
|
||
8006d08: b002 add sp, #8
|
||
8006d0a: bd70 pop {r4, r5, r6, pc}
|
||
8006d0c: 466a mov r2, sp
|
||
8006d0e: ab01 add r3, sp, #4
|
||
8006d10: f7ff ffc9 bl 8006ca6 <__swhatbuf_r>
|
||
8006d14: 9900 ldr r1, [sp, #0]
|
||
8006d16: 4605 mov r5, r0
|
||
8006d18: 4630 mov r0, r6
|
||
8006d1a: f7fd fadd bl 80042d8 <_malloc_r>
|
||
8006d1e: b948 cbnz r0, 8006d34 <__smakebuf_r+0x44>
|
||
8006d20: f9b4 300c ldrsh.w r3, [r4, #12]
|
||
8006d24: 059a lsls r2, r3, #22
|
||
8006d26: d4ef bmi.n 8006d08 <__smakebuf_r+0x18>
|
||
8006d28: f023 0303 bic.w r3, r3, #3
|
||
8006d2c: f043 0302 orr.w r3, r3, #2
|
||
8006d30: 81a3 strh r3, [r4, #12]
|
||
8006d32: e7e3 b.n 8006cfc <__smakebuf_r+0xc>
|
||
8006d34: 4b0d ldr r3, [pc, #52] ; (8006d6c <__smakebuf_r+0x7c>)
|
||
8006d36: 62b3 str r3, [r6, #40] ; 0x28
|
||
8006d38: 89a3 ldrh r3, [r4, #12]
|
||
8006d3a: 6020 str r0, [r4, #0]
|
||
8006d3c: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
8006d40: 81a3 strh r3, [r4, #12]
|
||
8006d42: 9b00 ldr r3, [sp, #0]
|
||
8006d44: 6120 str r0, [r4, #16]
|
||
8006d46: 6163 str r3, [r4, #20]
|
||
8006d48: 9b01 ldr r3, [sp, #4]
|
||
8006d4a: b15b cbz r3, 8006d64 <__smakebuf_r+0x74>
|
||
8006d4c: 4630 mov r0, r6
|
||
8006d4e: f9b4 100e ldrsh.w r1, [r4, #14]
|
||
8006d52: f000 f8d1 bl 8006ef8 <_isatty_r>
|
||
8006d56: b128 cbz r0, 8006d64 <__smakebuf_r+0x74>
|
||
8006d58: 89a3 ldrh r3, [r4, #12]
|
||
8006d5a: f023 0303 bic.w r3, r3, #3
|
||
8006d5e: f043 0301 orr.w r3, r3, #1
|
||
8006d62: 81a3 strh r3, [r4, #12]
|
||
8006d64: 89a0 ldrh r0, [r4, #12]
|
||
8006d66: 4305 orrs r5, r0
|
||
8006d68: 81a5 strh r5, [r4, #12]
|
||
8006d6a: e7cd b.n 8006d08 <__smakebuf_r+0x18>
|
||
8006d6c: 08006b05 .word 0x08006b05
|
||
|
||
08006d70 <_malloc_usable_size_r>:
|
||
8006d70: f851 3c04 ldr.w r3, [r1, #-4]
|
||
8006d74: 1f18 subs r0, r3, #4
|
||
8006d76: 2b00 cmp r3, #0
|
||
8006d78: bfbc itt lt
|
||
8006d7a: 580b ldrlt r3, [r1, r0]
|
||
8006d7c: 18c0 addlt r0, r0, r3
|
||
8006d7e: 4770 bx lr
|
||
|
||
08006d80 <_raise_r>:
|
||
8006d80: 291f cmp r1, #31
|
||
8006d82: b538 push {r3, r4, r5, lr}
|
||
8006d84: 4604 mov r4, r0
|
||
8006d86: 460d mov r5, r1
|
||
8006d88: d904 bls.n 8006d94 <_raise_r+0x14>
|
||
8006d8a: 2316 movs r3, #22
|
||
8006d8c: 6003 str r3, [r0, #0]
|
||
8006d8e: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8006d92: bd38 pop {r3, r4, r5, pc}
|
||
8006d94: 6c42 ldr r2, [r0, #68] ; 0x44
|
||
8006d96: b112 cbz r2, 8006d9e <_raise_r+0x1e>
|
||
8006d98: f852 3021 ldr.w r3, [r2, r1, lsl #2]
|
||
8006d9c: b94b cbnz r3, 8006db2 <_raise_r+0x32>
|
||
8006d9e: 4620 mov r0, r4
|
||
8006da0: f000 f830 bl 8006e04 <_getpid_r>
|
||
8006da4: 462a mov r2, r5
|
||
8006da6: 4601 mov r1, r0
|
||
8006da8: 4620 mov r0, r4
|
||
8006daa: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
||
8006dae: f000 b817 b.w 8006de0 <_kill_r>
|
||
8006db2: 2b01 cmp r3, #1
|
||
8006db4: d00a beq.n 8006dcc <_raise_r+0x4c>
|
||
8006db6: 1c59 adds r1, r3, #1
|
||
8006db8: d103 bne.n 8006dc2 <_raise_r+0x42>
|
||
8006dba: 2316 movs r3, #22
|
||
8006dbc: 6003 str r3, [r0, #0]
|
||
8006dbe: 2001 movs r0, #1
|
||
8006dc0: e7e7 b.n 8006d92 <_raise_r+0x12>
|
||
8006dc2: 2400 movs r4, #0
|
||
8006dc4: 4628 mov r0, r5
|
||
8006dc6: f842 4025 str.w r4, [r2, r5, lsl #2]
|
||
8006dca: 4798 blx r3
|
||
8006dcc: 2000 movs r0, #0
|
||
8006dce: e7e0 b.n 8006d92 <_raise_r+0x12>
|
||
|
||
08006dd0 <raise>:
|
||
8006dd0: 4b02 ldr r3, [pc, #8] ; (8006ddc <raise+0xc>)
|
||
8006dd2: 4601 mov r1, r0
|
||
8006dd4: 6818 ldr r0, [r3, #0]
|
||
8006dd6: f7ff bfd3 b.w 8006d80 <_raise_r>
|
||
8006dda: bf00 nop
|
||
8006ddc: 2000000c .word 0x2000000c
|
||
|
||
08006de0 <_kill_r>:
|
||
8006de0: b538 push {r3, r4, r5, lr}
|
||
8006de2: 2300 movs r3, #0
|
||
8006de4: 4d06 ldr r5, [pc, #24] ; (8006e00 <_kill_r+0x20>)
|
||
8006de6: 4604 mov r4, r0
|
||
8006de8: 4608 mov r0, r1
|
||
8006dea: 4611 mov r1, r2
|
||
8006dec: 602b str r3, [r5, #0]
|
||
8006dee: f7fa fb9d bl 800152c <_kill>
|
||
8006df2: 1c43 adds r3, r0, #1
|
||
8006df4: d102 bne.n 8006dfc <_kill_r+0x1c>
|
||
8006df6: 682b ldr r3, [r5, #0]
|
||
8006df8: b103 cbz r3, 8006dfc <_kill_r+0x1c>
|
||
8006dfa: 6023 str r3, [r4, #0]
|
||
8006dfc: bd38 pop {r3, r4, r5, pc}
|
||
8006dfe: bf00 nop
|
||
8006e00: 20000288 .word 0x20000288
|
||
|
||
08006e04 <_getpid_r>:
|
||
8006e04: f7fa bb8b b.w 800151e <_getpid>
|
||
|
||
08006e08 <__sread>:
|
||
8006e08: b510 push {r4, lr}
|
||
8006e0a: 460c mov r4, r1
|
||
8006e0c: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
8006e10: f000 f894 bl 8006f3c <_read_r>
|
||
8006e14: 2800 cmp r0, #0
|
||
8006e16: bfab itete ge
|
||
8006e18: 6d63 ldrge r3, [r4, #84] ; 0x54
|
||
8006e1a: 89a3 ldrhlt r3, [r4, #12]
|
||
8006e1c: 181b addge r3, r3, r0
|
||
8006e1e: f423 5380 biclt.w r3, r3, #4096 ; 0x1000
|
||
8006e22: bfac ite ge
|
||
8006e24: 6563 strge r3, [r4, #84] ; 0x54
|
||
8006e26: 81a3 strhlt r3, [r4, #12]
|
||
8006e28: bd10 pop {r4, pc}
|
||
|
||
08006e2a <__swrite>:
|
||
8006e2a: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||
8006e2e: 461f mov r7, r3
|
||
8006e30: 898b ldrh r3, [r1, #12]
|
||
8006e32: 4605 mov r5, r0
|
||
8006e34: 05db lsls r3, r3, #23
|
||
8006e36: 460c mov r4, r1
|
||
8006e38: 4616 mov r6, r2
|
||
8006e3a: d505 bpl.n 8006e48 <__swrite+0x1e>
|
||
8006e3c: 2302 movs r3, #2
|
||
8006e3e: 2200 movs r2, #0
|
||
8006e40: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
8006e44: f000 f868 bl 8006f18 <_lseek_r>
|
||
8006e48: 89a3 ldrh r3, [r4, #12]
|
||
8006e4a: 4632 mov r2, r6
|
||
8006e4c: f423 5380 bic.w r3, r3, #4096 ; 0x1000
|
||
8006e50: 81a3 strh r3, [r4, #12]
|
||
8006e52: 4628 mov r0, r5
|
||
8006e54: 463b mov r3, r7
|
||
8006e56: f9b4 100e ldrsh.w r1, [r4, #14]
|
||
8006e5a: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
|
||
8006e5e: f000 b817 b.w 8006e90 <_write_r>
|
||
|
||
08006e62 <__sseek>:
|
||
8006e62: b510 push {r4, lr}
|
||
8006e64: 460c mov r4, r1
|
||
8006e66: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
8006e6a: f000 f855 bl 8006f18 <_lseek_r>
|
||
8006e6e: 1c43 adds r3, r0, #1
|
||
8006e70: 89a3 ldrh r3, [r4, #12]
|
||
8006e72: bf15 itete ne
|
||
8006e74: 6560 strne r0, [r4, #84] ; 0x54
|
||
8006e76: f423 5380 biceq.w r3, r3, #4096 ; 0x1000
|
||
8006e7a: f443 5380 orrne.w r3, r3, #4096 ; 0x1000
|
||
8006e7e: 81a3 strheq r3, [r4, #12]
|
||
8006e80: bf18 it ne
|
||
8006e82: 81a3 strhne r3, [r4, #12]
|
||
8006e84: bd10 pop {r4, pc}
|
||
|
||
08006e86 <__sclose>:
|
||
8006e86: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
8006e8a: f000 b813 b.w 8006eb4 <_close_r>
|
||
...
|
||
|
||
08006e90 <_write_r>:
|
||
8006e90: b538 push {r3, r4, r5, lr}
|
||
8006e92: 4604 mov r4, r0
|
||
8006e94: 4608 mov r0, r1
|
||
8006e96: 4611 mov r1, r2
|
||
8006e98: 2200 movs r2, #0
|
||
8006e9a: 4d05 ldr r5, [pc, #20] ; (8006eb0 <_write_r+0x20>)
|
||
8006e9c: 602a str r2, [r5, #0]
|
||
8006e9e: 461a mov r2, r3
|
||
8006ea0: f7fa fb7b bl 800159a <_write>
|
||
8006ea4: 1c43 adds r3, r0, #1
|
||
8006ea6: d102 bne.n 8006eae <_write_r+0x1e>
|
||
8006ea8: 682b ldr r3, [r5, #0]
|
||
8006eaa: b103 cbz r3, 8006eae <_write_r+0x1e>
|
||
8006eac: 6023 str r3, [r4, #0]
|
||
8006eae: bd38 pop {r3, r4, r5, pc}
|
||
8006eb0: 20000288 .word 0x20000288
|
||
|
||
08006eb4 <_close_r>:
|
||
8006eb4: b538 push {r3, r4, r5, lr}
|
||
8006eb6: 2300 movs r3, #0
|
||
8006eb8: 4d05 ldr r5, [pc, #20] ; (8006ed0 <_close_r+0x1c>)
|
||
8006eba: 4604 mov r4, r0
|
||
8006ebc: 4608 mov r0, r1
|
||
8006ebe: 602b str r3, [r5, #0]
|
||
8006ec0: f7fa fb87 bl 80015d2 <_close>
|
||
8006ec4: 1c43 adds r3, r0, #1
|
||
8006ec6: d102 bne.n 8006ece <_close_r+0x1a>
|
||
8006ec8: 682b ldr r3, [r5, #0]
|
||
8006eca: b103 cbz r3, 8006ece <_close_r+0x1a>
|
||
8006ecc: 6023 str r3, [r4, #0]
|
||
8006ece: bd38 pop {r3, r4, r5, pc}
|
||
8006ed0: 20000288 .word 0x20000288
|
||
|
||
08006ed4 <_fstat_r>:
|
||
8006ed4: b538 push {r3, r4, r5, lr}
|
||
8006ed6: 2300 movs r3, #0
|
||
8006ed8: 4d06 ldr r5, [pc, #24] ; (8006ef4 <_fstat_r+0x20>)
|
||
8006eda: 4604 mov r4, r0
|
||
8006edc: 4608 mov r0, r1
|
||
8006ede: 4611 mov r1, r2
|
||
8006ee0: 602b str r3, [r5, #0]
|
||
8006ee2: f7fa fb81 bl 80015e8 <_fstat>
|
||
8006ee6: 1c43 adds r3, r0, #1
|
||
8006ee8: d102 bne.n 8006ef0 <_fstat_r+0x1c>
|
||
8006eea: 682b ldr r3, [r5, #0]
|
||
8006eec: b103 cbz r3, 8006ef0 <_fstat_r+0x1c>
|
||
8006eee: 6023 str r3, [r4, #0]
|
||
8006ef0: bd38 pop {r3, r4, r5, pc}
|
||
8006ef2: bf00 nop
|
||
8006ef4: 20000288 .word 0x20000288
|
||
|
||
08006ef8 <_isatty_r>:
|
||
8006ef8: b538 push {r3, r4, r5, lr}
|
||
8006efa: 2300 movs r3, #0
|
||
8006efc: 4d05 ldr r5, [pc, #20] ; (8006f14 <_isatty_r+0x1c>)
|
||
8006efe: 4604 mov r4, r0
|
||
8006f00: 4608 mov r0, r1
|
||
8006f02: 602b str r3, [r5, #0]
|
||
8006f04: f7fa fb7f bl 8001606 <_isatty>
|
||
8006f08: 1c43 adds r3, r0, #1
|
||
8006f0a: d102 bne.n 8006f12 <_isatty_r+0x1a>
|
||
8006f0c: 682b ldr r3, [r5, #0]
|
||
8006f0e: b103 cbz r3, 8006f12 <_isatty_r+0x1a>
|
||
8006f10: 6023 str r3, [r4, #0]
|
||
8006f12: bd38 pop {r3, r4, r5, pc}
|
||
8006f14: 20000288 .word 0x20000288
|
||
|
||
08006f18 <_lseek_r>:
|
||
8006f18: b538 push {r3, r4, r5, lr}
|
||
8006f1a: 4604 mov r4, r0
|
||
8006f1c: 4608 mov r0, r1
|
||
8006f1e: 4611 mov r1, r2
|
||
8006f20: 2200 movs r2, #0
|
||
8006f22: 4d05 ldr r5, [pc, #20] ; (8006f38 <_lseek_r+0x20>)
|
||
8006f24: 602a str r2, [r5, #0]
|
||
8006f26: 461a mov r2, r3
|
||
8006f28: f7fa fb77 bl 800161a <_lseek>
|
||
8006f2c: 1c43 adds r3, r0, #1
|
||
8006f2e: d102 bne.n 8006f36 <_lseek_r+0x1e>
|
||
8006f30: 682b ldr r3, [r5, #0]
|
||
8006f32: b103 cbz r3, 8006f36 <_lseek_r+0x1e>
|
||
8006f34: 6023 str r3, [r4, #0]
|
||
8006f36: bd38 pop {r3, r4, r5, pc}
|
||
8006f38: 20000288 .word 0x20000288
|
||
|
||
08006f3c <_read_r>:
|
||
8006f3c: b538 push {r3, r4, r5, lr}
|
||
8006f3e: 4604 mov r4, r0
|
||
8006f40: 4608 mov r0, r1
|
||
8006f42: 4611 mov r1, r2
|
||
8006f44: 2200 movs r2, #0
|
||
8006f46: 4d05 ldr r5, [pc, #20] ; (8006f5c <_read_r+0x20>)
|
||
8006f48: 602a str r2, [r5, #0]
|
||
8006f4a: 461a mov r2, r3
|
||
8006f4c: f7fa fb08 bl 8001560 <_read>
|
||
8006f50: 1c43 adds r3, r0, #1
|
||
8006f52: d102 bne.n 8006f5a <_read_r+0x1e>
|
||
8006f54: 682b ldr r3, [r5, #0]
|
||
8006f56: b103 cbz r3, 8006f5a <_read_r+0x1e>
|
||
8006f58: 6023 str r3, [r4, #0]
|
||
8006f5a: bd38 pop {r3, r4, r5, pc}
|
||
8006f5c: 20000288 .word 0x20000288
|
||
|
||
08006f60 <_init>:
|
||
8006f60: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8006f62: bf00 nop
|
||
8006f64: bcf8 pop {r3, r4, r5, r6, r7}
|
||
8006f66: bc08 pop {r3}
|
||
8006f68: 469e mov lr, r3
|
||
8006f6a: 4770 bx lr
|
||
|
||
08006f6c <_fini>:
|
||
8006f6c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8006f6e: bf00 nop
|
||
8006f70: bcf8 pop {r3, r4, r5, r6, r7}
|
||
8006f72: bc08 pop {r3}
|
||
8006f74: 469e mov lr, r3
|
||
8006f76: 4770 bx lr
|