18625 lines
688 KiB
Plaintext
18625 lines
688 KiB
Plaintext
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m3s.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .isr_vector 000001e4 08000000 08000000 00010000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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1 .text 000086f0 080001e8 080001e8 000101e8 2**3
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 00000f54 080088d8 080088d8 000188d8 2**3
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .ARM.extab 00000000 0800982c 0800982c 000201dc 2**0
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CONTENTS
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4 .ARM 00000000 0800982c 0800982c 000201dc 2**0
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CONTENTS
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5 .preinit_array 00000000 0800982c 0800982c 000201dc 2**0
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CONTENTS, ALLOC, LOAD, DATA
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6 .init_array 00000004 0800982c 0800982c 0001982c 2**2
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CONTENTS, ALLOC, LOAD, DATA
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7 .fini_array 00000004 08009830 08009830 00019830 2**2
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CONTENTS, ALLOC, LOAD, DATA
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8 .data 000001dc 20000000 08009834 00020000 2**2
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CONTENTS, ALLOC, LOAD, DATA
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9 .bss 00000170 200001dc 08009a10 000201dc 2**2
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ALLOC
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10 ._user_heap_stack 00000c04 2000034c 08009a10 0002034c 2**0
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ALLOC
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11 .ARM.attributes 00000029 00000000 00000000 000201dc 2**0
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CONTENTS, READONLY
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12 .debug_info 0000cb14 00000000 00000000 00020205 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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13 .debug_abbrev 0000289b 00000000 00000000 0002cd19 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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14 .debug_aranges 00000b30 00000000 00000000 0002f5b8 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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15 .debug_ranges 00000a28 00000000 00000000 000300e8 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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16 .debug_macro 0001b6a6 00000000 00000000 00030b10 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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17 .debug_line 0000ef31 00000000 00000000 0004c1b6 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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18 .debug_str 00095f1a 00000000 00000000 0005b0e7 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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19 .comment 00000053 00000000 00000000 000f1001 2**0
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CONTENTS, READONLY
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20 .debug_frame 00003e18 00000000 00000000 000f1054 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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Disassembly of section .text:
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080001e8 <__do_global_dtors_aux>:
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80001e8: b510 push {r4, lr}
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80001ea: 4c05 ldr r4, [pc, #20] ; (8000200 <__do_global_dtors_aux+0x18>)
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80001ec: 7823 ldrb r3, [r4, #0]
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80001ee: b933 cbnz r3, 80001fe <__do_global_dtors_aux+0x16>
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80001f0: 4b04 ldr r3, [pc, #16] ; (8000204 <__do_global_dtors_aux+0x1c>)
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80001f2: b113 cbz r3, 80001fa <__do_global_dtors_aux+0x12>
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80001f4: 4804 ldr r0, [pc, #16] ; (8000208 <__do_global_dtors_aux+0x20>)
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80001f6: f3af 8000 nop.w
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80001fa: 2301 movs r3, #1
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80001fc: 7023 strb r3, [r4, #0]
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80001fe: bd10 pop {r4, pc}
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8000200: 200001dc .word 0x200001dc
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8000204: 00000000 .word 0x00000000
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8000208: 080088c0 .word 0x080088c0
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0800020c <frame_dummy>:
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800020c: b508 push {r3, lr}
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800020e: 4b03 ldr r3, [pc, #12] ; (800021c <frame_dummy+0x10>)
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8000210: b11b cbz r3, 800021a <frame_dummy+0xe>
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8000212: 4903 ldr r1, [pc, #12] ; (8000220 <frame_dummy+0x14>)
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8000214: 4803 ldr r0, [pc, #12] ; (8000224 <frame_dummy+0x18>)
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8000216: f3af 8000 nop.w
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800021a: bd08 pop {r3, pc}
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800021c: 00000000 .word 0x00000000
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8000220: 200001e0 .word 0x200001e0
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8000224: 080088c0 .word 0x080088c0
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08000228 <strlen>:
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8000228: 4603 mov r3, r0
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800022a: f813 2b01 ldrb.w r2, [r3], #1
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800022e: 2a00 cmp r2, #0
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8000230: d1fb bne.n 800022a <strlen+0x2>
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8000232: 1a18 subs r0, r3, r0
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8000234: 3801 subs r0, #1
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8000236: 4770 bx lr
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08000238 <__aeabi_drsub>:
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8000238: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000
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800023c: e002 b.n 8000244 <__adddf3>
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800023e: bf00 nop
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08000240 <__aeabi_dsub>:
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8000240: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000
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08000244 <__adddf3>:
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8000244: b530 push {r4, r5, lr}
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8000246: ea4f 0441 mov.w r4, r1, lsl #1
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800024a: ea4f 0543 mov.w r5, r3, lsl #1
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800024e: ea94 0f05 teq r4, r5
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8000252: bf08 it eq
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8000254: ea90 0f02 teqeq r0, r2
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8000258: bf1f itttt ne
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800025a: ea54 0c00 orrsne.w ip, r4, r0
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800025e: ea55 0c02 orrsne.w ip, r5, r2
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8000262: ea7f 5c64 mvnsne.w ip, r4, asr #21
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8000266: ea7f 5c65 mvnsne.w ip, r5, asr #21
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800026a: f000 80e2 beq.w 8000432 <__adddf3+0x1ee>
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800026e: ea4f 5454 mov.w r4, r4, lsr #21
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8000272: ebd4 5555 rsbs r5, r4, r5, lsr #21
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8000276: bfb8 it lt
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8000278: 426d neglt r5, r5
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800027a: dd0c ble.n 8000296 <__adddf3+0x52>
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800027c: 442c add r4, r5
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800027e: ea80 0202 eor.w r2, r0, r2
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8000282: ea81 0303 eor.w r3, r1, r3
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8000286: ea82 0000 eor.w r0, r2, r0
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800028a: ea83 0101 eor.w r1, r3, r1
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800028e: ea80 0202 eor.w r2, r0, r2
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8000292: ea81 0303 eor.w r3, r1, r3
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8000296: 2d36 cmp r5, #54 ; 0x36
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8000298: bf88 it hi
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800029a: bd30 pophi {r4, r5, pc}
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800029c: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
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80002a0: ea4f 3101 mov.w r1, r1, lsl #12
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80002a4: f44f 1c80 mov.w ip, #1048576 ; 0x100000
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80002a8: ea4c 3111 orr.w r1, ip, r1, lsr #12
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80002ac: d002 beq.n 80002b4 <__adddf3+0x70>
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80002ae: 4240 negs r0, r0
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80002b0: eb61 0141 sbc.w r1, r1, r1, lsl #1
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80002b4: f013 4f00 tst.w r3, #2147483648 ; 0x80000000
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80002b8: ea4f 3303 mov.w r3, r3, lsl #12
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80002bc: ea4c 3313 orr.w r3, ip, r3, lsr #12
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80002c0: d002 beq.n 80002c8 <__adddf3+0x84>
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80002c2: 4252 negs r2, r2
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80002c4: eb63 0343 sbc.w r3, r3, r3, lsl #1
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80002c8: ea94 0f05 teq r4, r5
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80002cc: f000 80a7 beq.w 800041e <__adddf3+0x1da>
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80002d0: f1a4 0401 sub.w r4, r4, #1
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80002d4: f1d5 0e20 rsbs lr, r5, #32
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80002d8: db0d blt.n 80002f6 <__adddf3+0xb2>
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80002da: fa02 fc0e lsl.w ip, r2, lr
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80002de: fa22 f205 lsr.w r2, r2, r5
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80002e2: 1880 adds r0, r0, r2
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80002e4: f141 0100 adc.w r1, r1, #0
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80002e8: fa03 f20e lsl.w r2, r3, lr
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80002ec: 1880 adds r0, r0, r2
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80002ee: fa43 f305 asr.w r3, r3, r5
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80002f2: 4159 adcs r1, r3
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80002f4: e00e b.n 8000314 <__adddf3+0xd0>
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80002f6: f1a5 0520 sub.w r5, r5, #32
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80002fa: f10e 0e20 add.w lr, lr, #32
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80002fe: 2a01 cmp r2, #1
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8000300: fa03 fc0e lsl.w ip, r3, lr
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8000304: bf28 it cs
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8000306: f04c 0c02 orrcs.w ip, ip, #2
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800030a: fa43 f305 asr.w r3, r3, r5
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800030e: 18c0 adds r0, r0, r3
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8000310: eb51 71e3 adcs.w r1, r1, r3, asr #31
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8000314: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
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8000318: d507 bpl.n 800032a <__adddf3+0xe6>
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800031a: f04f 0e00 mov.w lr, #0
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800031e: f1dc 0c00 rsbs ip, ip, #0
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8000322: eb7e 0000 sbcs.w r0, lr, r0
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8000326: eb6e 0101 sbc.w r1, lr, r1
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800032a: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000
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800032e: d31b bcc.n 8000368 <__adddf3+0x124>
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8000330: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000
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8000334: d30c bcc.n 8000350 <__adddf3+0x10c>
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8000336: 0849 lsrs r1, r1, #1
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8000338: ea5f 0030 movs.w r0, r0, rrx
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800033c: ea4f 0c3c mov.w ip, ip, rrx
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8000340: f104 0401 add.w r4, r4, #1
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8000344: ea4f 5244 mov.w r2, r4, lsl #21
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8000348: f512 0f80 cmn.w r2, #4194304 ; 0x400000
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800034c: f080 809a bcs.w 8000484 <__adddf3+0x240>
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8000350: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000
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8000354: bf08 it eq
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8000356: ea5f 0c50 movseq.w ip, r0, lsr #1
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800035a: f150 0000 adcs.w r0, r0, #0
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800035e: eb41 5104 adc.w r1, r1, r4, lsl #20
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8000362: ea41 0105 orr.w r1, r1, r5
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8000366: bd30 pop {r4, r5, pc}
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8000368: ea5f 0c4c movs.w ip, ip, lsl #1
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800036c: 4140 adcs r0, r0
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800036e: eb41 0101 adc.w r1, r1, r1
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8000372: 3c01 subs r4, #1
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8000374: bf28 it cs
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8000376: f5b1 1f80 cmpcs.w r1, #1048576 ; 0x100000
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800037a: d2e9 bcs.n 8000350 <__adddf3+0x10c>
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800037c: f091 0f00 teq r1, #0
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8000380: bf04 itt eq
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8000382: 4601 moveq r1, r0
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8000384: 2000 moveq r0, #0
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8000386: fab1 f381 clz r3, r1
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800038a: bf08 it eq
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800038c: 3320 addeq r3, #32
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800038e: f1a3 030b sub.w r3, r3, #11
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8000392: f1b3 0220 subs.w r2, r3, #32
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8000396: da0c bge.n 80003b2 <__adddf3+0x16e>
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8000398: 320c adds r2, #12
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800039a: dd08 ble.n 80003ae <__adddf3+0x16a>
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800039c: f102 0c14 add.w ip, r2, #20
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80003a0: f1c2 020c rsb r2, r2, #12
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80003a4: fa01 f00c lsl.w r0, r1, ip
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80003a8: fa21 f102 lsr.w r1, r1, r2
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80003ac: e00c b.n 80003c8 <__adddf3+0x184>
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80003ae: f102 0214 add.w r2, r2, #20
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80003b2: bfd8 it le
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80003b4: f1c2 0c20 rsble ip, r2, #32
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80003b8: fa01 f102 lsl.w r1, r1, r2
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80003bc: fa20 fc0c lsr.w ip, r0, ip
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80003c0: bfdc itt le
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80003c2: ea41 010c orrle.w r1, r1, ip
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80003c6: 4090 lslle r0, r2
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80003c8: 1ae4 subs r4, r4, r3
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80003ca: bfa2 ittt ge
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80003cc: eb01 5104 addge.w r1, r1, r4, lsl #20
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80003d0: 4329 orrge r1, r5
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80003d2: bd30 popge {r4, r5, pc}
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80003d4: ea6f 0404 mvn.w r4, r4
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80003d8: 3c1f subs r4, #31
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80003da: da1c bge.n 8000416 <__adddf3+0x1d2>
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80003dc: 340c adds r4, #12
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80003de: dc0e bgt.n 80003fe <__adddf3+0x1ba>
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80003e0: f104 0414 add.w r4, r4, #20
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80003e4: f1c4 0220 rsb r2, r4, #32
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80003e8: fa20 f004 lsr.w r0, r0, r4
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80003ec: fa01 f302 lsl.w r3, r1, r2
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80003f0: ea40 0003 orr.w r0, r0, r3
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80003f4: fa21 f304 lsr.w r3, r1, r4
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80003f8: ea45 0103 orr.w r1, r5, r3
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80003fc: bd30 pop {r4, r5, pc}
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80003fe: f1c4 040c rsb r4, r4, #12
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8000402: f1c4 0220 rsb r2, r4, #32
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8000406: fa20 f002 lsr.w r0, r0, r2
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800040a: fa01 f304 lsl.w r3, r1, r4
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800040e: ea40 0003 orr.w r0, r0, r3
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8000412: 4629 mov r1, r5
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8000414: bd30 pop {r4, r5, pc}
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8000416: fa21 f004 lsr.w r0, r1, r4
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800041a: 4629 mov r1, r5
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800041c: bd30 pop {r4, r5, pc}
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800041e: f094 0f00 teq r4, #0
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8000422: f483 1380 eor.w r3, r3, #1048576 ; 0x100000
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8000426: bf06 itte eq
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8000428: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000
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800042c: 3401 addeq r4, #1
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800042e: 3d01 subne r5, #1
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8000430: e74e b.n 80002d0 <__adddf3+0x8c>
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8000432: ea7f 5c64 mvns.w ip, r4, asr #21
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8000436: bf18 it ne
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8000438: ea7f 5c65 mvnsne.w ip, r5, asr #21
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800043c: d029 beq.n 8000492 <__adddf3+0x24e>
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800043e: ea94 0f05 teq r4, r5
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8000442: bf08 it eq
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8000444: ea90 0f02 teqeq r0, r2
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8000448: d005 beq.n 8000456 <__adddf3+0x212>
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800044a: ea54 0c00 orrs.w ip, r4, r0
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800044e: bf04 itt eq
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8000450: 4619 moveq r1, r3
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8000452: 4610 moveq r0, r2
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||
8000454: bd30 pop {r4, r5, pc}
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8000456: ea91 0f03 teq r1, r3
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800045a: bf1e ittt ne
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800045c: 2100 movne r1, #0
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800045e: 2000 movne r0, #0
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8000460: bd30 popne {r4, r5, pc}
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8000462: ea5f 5c54 movs.w ip, r4, lsr #21
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8000466: d105 bne.n 8000474 <__adddf3+0x230>
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||
8000468: 0040 lsls r0, r0, #1
|
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800046a: 4149 adcs r1, r1
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||
800046c: bf28 it cs
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||
800046e: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000
|
||
8000472: bd30 pop {r4, r5, pc}
|
||
8000474: f514 0480 adds.w r4, r4, #4194304 ; 0x400000
|
||
8000478: bf3c itt cc
|
||
800047a: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000
|
||
800047e: bd30 popcc {r4, r5, pc}
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8000480: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
|
||
8000484: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000
|
||
8000488: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
|
||
800048c: f04f 0000 mov.w r0, #0
|
||
8000490: bd30 pop {r4, r5, pc}
|
||
8000492: ea7f 5c64 mvns.w ip, r4, asr #21
|
||
8000496: bf1a itte ne
|
||
8000498: 4619 movne r1, r3
|
||
800049a: 4610 movne r0, r2
|
||
800049c: ea7f 5c65 mvnseq.w ip, r5, asr #21
|
||
80004a0: bf1c itt ne
|
||
80004a2: 460b movne r3, r1
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||
80004a4: 4602 movne r2, r0
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||
80004a6: ea50 3401 orrs.w r4, r0, r1, lsl #12
|
||
80004aa: bf06 itte eq
|
||
80004ac: ea52 3503 orrseq.w r5, r2, r3, lsl #12
|
||
80004b0: ea91 0f03 teqeq r1, r3
|
||
80004b4: f441 2100 orrne.w r1, r1, #524288 ; 0x80000
|
||
80004b8: bd30 pop {r4, r5, pc}
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||
80004ba: bf00 nop
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||
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080004bc <__aeabi_ui2d>:
|
||
80004bc: f090 0f00 teq r0, #0
|
||
80004c0: bf04 itt eq
|
||
80004c2: 2100 moveq r1, #0
|
||
80004c4: 4770 bxeq lr
|
||
80004c6: b530 push {r4, r5, lr}
|
||
80004c8: f44f 6480 mov.w r4, #1024 ; 0x400
|
||
80004cc: f104 0432 add.w r4, r4, #50 ; 0x32
|
||
80004d0: f04f 0500 mov.w r5, #0
|
||
80004d4: f04f 0100 mov.w r1, #0
|
||
80004d8: e750 b.n 800037c <__adddf3+0x138>
|
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80004da: bf00 nop
|
||
|
||
080004dc <__aeabi_i2d>:
|
||
80004dc: f090 0f00 teq r0, #0
|
||
80004e0: bf04 itt eq
|
||
80004e2: 2100 moveq r1, #0
|
||
80004e4: 4770 bxeq lr
|
||
80004e6: b530 push {r4, r5, lr}
|
||
80004e8: f44f 6480 mov.w r4, #1024 ; 0x400
|
||
80004ec: f104 0432 add.w r4, r4, #50 ; 0x32
|
||
80004f0: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000
|
||
80004f4: bf48 it mi
|
||
80004f6: 4240 negmi r0, r0
|
||
80004f8: f04f 0100 mov.w r1, #0
|
||
80004fc: e73e b.n 800037c <__adddf3+0x138>
|
||
80004fe: bf00 nop
|
||
|
||
08000500 <__aeabi_f2d>:
|
||
8000500: 0042 lsls r2, r0, #1
|
||
8000502: ea4f 01e2 mov.w r1, r2, asr #3
|
||
8000506: ea4f 0131 mov.w r1, r1, rrx
|
||
800050a: ea4f 7002 mov.w r0, r2, lsl #28
|
||
800050e: bf1f itttt ne
|
||
8000510: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000
|
||
8000514: f093 4f7f teqne r3, #4278190080 ; 0xff000000
|
||
8000518: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000
|
||
800051c: 4770 bxne lr
|
||
800051e: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000
|
||
8000522: bf08 it eq
|
||
8000524: 4770 bxeq lr
|
||
8000526: f093 4f7f teq r3, #4278190080 ; 0xff000000
|
||
800052a: bf04 itt eq
|
||
800052c: f441 2100 orreq.w r1, r1, #524288 ; 0x80000
|
||
8000530: 4770 bxeq lr
|
||
8000532: b530 push {r4, r5, lr}
|
||
8000534: f44f 7460 mov.w r4, #896 ; 0x380
|
||
8000538: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
|
||
800053c: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
|
||
8000540: e71c b.n 800037c <__adddf3+0x138>
|
||
8000542: bf00 nop
|
||
|
||
08000544 <__aeabi_ul2d>:
|
||
8000544: ea50 0201 orrs.w r2, r0, r1
|
||
8000548: bf08 it eq
|
||
800054a: 4770 bxeq lr
|
||
800054c: b530 push {r4, r5, lr}
|
||
800054e: f04f 0500 mov.w r5, #0
|
||
8000552: e00a b.n 800056a <__aeabi_l2d+0x16>
|
||
|
||
08000554 <__aeabi_l2d>:
|
||
8000554: ea50 0201 orrs.w r2, r0, r1
|
||
8000558: bf08 it eq
|
||
800055a: 4770 bxeq lr
|
||
800055c: b530 push {r4, r5, lr}
|
||
800055e: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000
|
||
8000562: d502 bpl.n 800056a <__aeabi_l2d+0x16>
|
||
8000564: 4240 negs r0, r0
|
||
8000566: eb61 0141 sbc.w r1, r1, r1, lsl #1
|
||
800056a: f44f 6480 mov.w r4, #1024 ; 0x400
|
||
800056e: f104 0432 add.w r4, r4, #50 ; 0x32
|
||
8000572: ea5f 5c91 movs.w ip, r1, lsr #22
|
||
8000576: f43f aed8 beq.w 800032a <__adddf3+0xe6>
|
||
800057a: f04f 0203 mov.w r2, #3
|
||
800057e: ea5f 0cdc movs.w ip, ip, lsr #3
|
||
8000582: bf18 it ne
|
||
8000584: 3203 addne r2, #3
|
||
8000586: ea5f 0cdc movs.w ip, ip, lsr #3
|
||
800058a: bf18 it ne
|
||
800058c: 3203 addne r2, #3
|
||
800058e: eb02 02dc add.w r2, r2, ip, lsr #3
|
||
8000592: f1c2 0320 rsb r3, r2, #32
|
||
8000596: fa00 fc03 lsl.w ip, r0, r3
|
||
800059a: fa20 f002 lsr.w r0, r0, r2
|
||
800059e: fa01 fe03 lsl.w lr, r1, r3
|
||
80005a2: ea40 000e orr.w r0, r0, lr
|
||
80005a6: fa21 f102 lsr.w r1, r1, r2
|
||
80005aa: 4414 add r4, r2
|
||
80005ac: e6bd b.n 800032a <__adddf3+0xe6>
|
||
80005ae: bf00 nop
|
||
|
||
080005b0 <__aeabi_dmul>:
|
||
80005b0: b570 push {r4, r5, r6, lr}
|
||
80005b2: f04f 0cff mov.w ip, #255 ; 0xff
|
||
80005b6: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
|
||
80005ba: ea1c 5411 ands.w r4, ip, r1, lsr #20
|
||
80005be: bf1d ittte ne
|
||
80005c0: ea1c 5513 andsne.w r5, ip, r3, lsr #20
|
||
80005c4: ea94 0f0c teqne r4, ip
|
||
80005c8: ea95 0f0c teqne r5, ip
|
||
80005cc: f000 f8de bleq 800078c <__aeabi_dmul+0x1dc>
|
||
80005d0: 442c add r4, r5
|
||
80005d2: ea81 0603 eor.w r6, r1, r3
|
||
80005d6: ea21 514c bic.w r1, r1, ip, lsl #21
|
||
80005da: ea23 534c bic.w r3, r3, ip, lsl #21
|
||
80005de: ea50 3501 orrs.w r5, r0, r1, lsl #12
|
||
80005e2: bf18 it ne
|
||
80005e4: ea52 3503 orrsne.w r5, r2, r3, lsl #12
|
||
80005e8: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
80005ec: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
|
||
80005f0: d038 beq.n 8000664 <__aeabi_dmul+0xb4>
|
||
80005f2: fba0 ce02 umull ip, lr, r0, r2
|
||
80005f6: f04f 0500 mov.w r5, #0
|
||
80005fa: fbe1 e502 umlal lr, r5, r1, r2
|
||
80005fe: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000
|
||
8000602: fbe0 e503 umlal lr, r5, r0, r3
|
||
8000606: f04f 0600 mov.w r6, #0
|
||
800060a: fbe1 5603 umlal r5, r6, r1, r3
|
||
800060e: f09c 0f00 teq ip, #0
|
||
8000612: bf18 it ne
|
||
8000614: f04e 0e01 orrne.w lr, lr, #1
|
||
8000618: f1a4 04ff sub.w r4, r4, #255 ; 0xff
|
||
800061c: f5b6 7f00 cmp.w r6, #512 ; 0x200
|
||
8000620: f564 7440 sbc.w r4, r4, #768 ; 0x300
|
||
8000624: d204 bcs.n 8000630 <__aeabi_dmul+0x80>
|
||
8000626: ea5f 0e4e movs.w lr, lr, lsl #1
|
||
800062a: 416d adcs r5, r5
|
||
800062c: eb46 0606 adc.w r6, r6, r6
|
||
8000630: ea42 21c6 orr.w r1, r2, r6, lsl #11
|
||
8000634: ea41 5155 orr.w r1, r1, r5, lsr #21
|
||
8000638: ea4f 20c5 mov.w r0, r5, lsl #11
|
||
800063c: ea40 505e orr.w r0, r0, lr, lsr #21
|
||
8000640: ea4f 2ece mov.w lr, lr, lsl #11
|
||
8000644: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
|
||
8000648: bf88 it hi
|
||
800064a: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
|
||
800064e: d81e bhi.n 800068e <__aeabi_dmul+0xde>
|
||
8000650: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000
|
||
8000654: bf08 it eq
|
||
8000656: ea5f 0e50 movseq.w lr, r0, lsr #1
|
||
800065a: f150 0000 adcs.w r0, r0, #0
|
||
800065e: eb41 5104 adc.w r1, r1, r4, lsl #20
|
||
8000662: bd70 pop {r4, r5, r6, pc}
|
||
8000664: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000
|
||
8000668: ea46 0101 orr.w r1, r6, r1
|
||
800066c: ea40 0002 orr.w r0, r0, r2
|
||
8000670: ea81 0103 eor.w r1, r1, r3
|
||
8000674: ebb4 045c subs.w r4, r4, ip, lsr #1
|
||
8000678: bfc2 ittt gt
|
||
800067a: ebd4 050c rsbsgt r5, r4, ip
|
||
800067e: ea41 5104 orrgt.w r1, r1, r4, lsl #20
|
||
8000682: bd70 popgt {r4, r5, r6, pc}
|
||
8000684: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
8000688: f04f 0e00 mov.w lr, #0
|
||
800068c: 3c01 subs r4, #1
|
||
800068e: f300 80ab bgt.w 80007e8 <__aeabi_dmul+0x238>
|
||
8000692: f114 0f36 cmn.w r4, #54 ; 0x36
|
||
8000696: bfde ittt le
|
||
8000698: 2000 movle r0, #0
|
||
800069a: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000
|
||
800069e: bd70 pople {r4, r5, r6, pc}
|
||
80006a0: f1c4 0400 rsb r4, r4, #0
|
||
80006a4: 3c20 subs r4, #32
|
||
80006a6: da35 bge.n 8000714 <__aeabi_dmul+0x164>
|
||
80006a8: 340c adds r4, #12
|
||
80006aa: dc1b bgt.n 80006e4 <__aeabi_dmul+0x134>
|
||
80006ac: f104 0414 add.w r4, r4, #20
|
||
80006b0: f1c4 0520 rsb r5, r4, #32
|
||
80006b4: fa00 f305 lsl.w r3, r0, r5
|
||
80006b8: fa20 f004 lsr.w r0, r0, r4
|
||
80006bc: fa01 f205 lsl.w r2, r1, r5
|
||
80006c0: ea40 0002 orr.w r0, r0, r2
|
||
80006c4: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000
|
||
80006c8: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
|
||
80006cc: eb10 70d3 adds.w r0, r0, r3, lsr #31
|
||
80006d0: fa21 f604 lsr.w r6, r1, r4
|
||
80006d4: eb42 0106 adc.w r1, r2, r6
|
||
80006d8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
||
80006dc: bf08 it eq
|
||
80006de: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
||
80006e2: bd70 pop {r4, r5, r6, pc}
|
||
80006e4: f1c4 040c rsb r4, r4, #12
|
||
80006e8: f1c4 0520 rsb r5, r4, #32
|
||
80006ec: fa00 f304 lsl.w r3, r0, r4
|
||
80006f0: fa20 f005 lsr.w r0, r0, r5
|
||
80006f4: fa01 f204 lsl.w r2, r1, r4
|
||
80006f8: ea40 0002 orr.w r0, r0, r2
|
||
80006fc: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
8000700: eb10 70d3 adds.w r0, r0, r3, lsr #31
|
||
8000704: f141 0100 adc.w r1, r1, #0
|
||
8000708: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
||
800070c: bf08 it eq
|
||
800070e: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
||
8000712: bd70 pop {r4, r5, r6, pc}
|
||
8000714: f1c4 0520 rsb r5, r4, #32
|
||
8000718: fa00 f205 lsl.w r2, r0, r5
|
||
800071c: ea4e 0e02 orr.w lr, lr, r2
|
||
8000720: fa20 f304 lsr.w r3, r0, r4
|
||
8000724: fa01 f205 lsl.w r2, r1, r5
|
||
8000728: ea43 0302 orr.w r3, r3, r2
|
||
800072c: fa21 f004 lsr.w r0, r1, r4
|
||
8000730: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
8000734: fa21 f204 lsr.w r2, r1, r4
|
||
8000738: ea20 0002 bic.w r0, r0, r2
|
||
800073c: eb00 70d3 add.w r0, r0, r3, lsr #31
|
||
8000740: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
||
8000744: bf08 it eq
|
||
8000746: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
||
800074a: bd70 pop {r4, r5, r6, pc}
|
||
800074c: f094 0f00 teq r4, #0
|
||
8000750: d10f bne.n 8000772 <__aeabi_dmul+0x1c2>
|
||
8000752: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000
|
||
8000756: 0040 lsls r0, r0, #1
|
||
8000758: eb41 0101 adc.w r1, r1, r1
|
||
800075c: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
||
8000760: bf08 it eq
|
||
8000762: 3c01 subeq r4, #1
|
||
8000764: d0f7 beq.n 8000756 <__aeabi_dmul+0x1a6>
|
||
8000766: ea41 0106 orr.w r1, r1, r6
|
||
800076a: f095 0f00 teq r5, #0
|
||
800076e: bf18 it ne
|
||
8000770: 4770 bxne lr
|
||
8000772: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000
|
||
8000776: 0052 lsls r2, r2, #1
|
||
8000778: eb43 0303 adc.w r3, r3, r3
|
||
800077c: f413 1f80 tst.w r3, #1048576 ; 0x100000
|
||
8000780: bf08 it eq
|
||
8000782: 3d01 subeq r5, #1
|
||
8000784: d0f7 beq.n 8000776 <__aeabi_dmul+0x1c6>
|
||
8000786: ea43 0306 orr.w r3, r3, r6
|
||
800078a: 4770 bx lr
|
||
800078c: ea94 0f0c teq r4, ip
|
||
8000790: ea0c 5513 and.w r5, ip, r3, lsr #20
|
||
8000794: bf18 it ne
|
||
8000796: ea95 0f0c teqne r5, ip
|
||
800079a: d00c beq.n 80007b6 <__aeabi_dmul+0x206>
|
||
800079c: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
||
80007a0: bf18 it ne
|
||
80007a2: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
||
80007a6: d1d1 bne.n 800074c <__aeabi_dmul+0x19c>
|
||
80007a8: ea81 0103 eor.w r1, r1, r3
|
||
80007ac: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
80007b0: f04f 0000 mov.w r0, #0
|
||
80007b4: bd70 pop {r4, r5, r6, pc}
|
||
80007b6: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
||
80007ba: bf06 itte eq
|
||
80007bc: 4610 moveq r0, r2
|
||
80007be: 4619 moveq r1, r3
|
||
80007c0: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
||
80007c4: d019 beq.n 80007fa <__aeabi_dmul+0x24a>
|
||
80007c6: ea94 0f0c teq r4, ip
|
||
80007ca: d102 bne.n 80007d2 <__aeabi_dmul+0x222>
|
||
80007cc: ea50 3601 orrs.w r6, r0, r1, lsl #12
|
||
80007d0: d113 bne.n 80007fa <__aeabi_dmul+0x24a>
|
||
80007d2: ea95 0f0c teq r5, ip
|
||
80007d6: d105 bne.n 80007e4 <__aeabi_dmul+0x234>
|
||
80007d8: ea52 3603 orrs.w r6, r2, r3, lsl #12
|
||
80007dc: bf1c itt ne
|
||
80007de: 4610 movne r0, r2
|
||
80007e0: 4619 movne r1, r3
|
||
80007e2: d10a bne.n 80007fa <__aeabi_dmul+0x24a>
|
||
80007e4: ea81 0103 eor.w r1, r1, r3
|
||
80007e8: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
||
80007ec: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
|
||
80007f0: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
|
||
80007f4: f04f 0000 mov.w r0, #0
|
||
80007f8: bd70 pop {r4, r5, r6, pc}
|
||
80007fa: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
|
||
80007fe: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000
|
||
8000802: bd70 pop {r4, r5, r6, pc}
|
||
|
||
08000804 <__aeabi_ddiv>:
|
||
8000804: b570 push {r4, r5, r6, lr}
|
||
8000806: f04f 0cff mov.w ip, #255 ; 0xff
|
||
800080a: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
|
||
800080e: ea1c 5411 ands.w r4, ip, r1, lsr #20
|
||
8000812: bf1d ittte ne
|
||
8000814: ea1c 5513 andsne.w r5, ip, r3, lsr #20
|
||
8000818: ea94 0f0c teqne r4, ip
|
||
800081c: ea95 0f0c teqne r5, ip
|
||
8000820: f000 f8a7 bleq 8000972 <__aeabi_ddiv+0x16e>
|
||
8000824: eba4 0405 sub.w r4, r4, r5
|
||
8000828: ea81 0e03 eor.w lr, r1, r3
|
||
800082c: ea52 3503 orrs.w r5, r2, r3, lsl #12
|
||
8000830: ea4f 3101 mov.w r1, r1, lsl #12
|
||
8000834: f000 8088 beq.w 8000948 <__aeabi_ddiv+0x144>
|
||
8000838: ea4f 3303 mov.w r3, r3, lsl #12
|
||
800083c: f04f 5580 mov.w r5, #268435456 ; 0x10000000
|
||
8000840: ea45 1313 orr.w r3, r5, r3, lsr #4
|
||
8000844: ea43 6312 orr.w r3, r3, r2, lsr #24
|
||
8000848: ea4f 2202 mov.w r2, r2, lsl #8
|
||
800084c: ea45 1511 orr.w r5, r5, r1, lsr #4
|
||
8000850: ea45 6510 orr.w r5, r5, r0, lsr #24
|
||
8000854: ea4f 2600 mov.w r6, r0, lsl #8
|
||
8000858: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000
|
||
800085c: 429d cmp r5, r3
|
||
800085e: bf08 it eq
|
||
8000860: 4296 cmpeq r6, r2
|
||
8000862: f144 04fd adc.w r4, r4, #253 ; 0xfd
|
||
8000866: f504 7440 add.w r4, r4, #768 ; 0x300
|
||
800086a: d202 bcs.n 8000872 <__aeabi_ddiv+0x6e>
|
||
800086c: 085b lsrs r3, r3, #1
|
||
800086e: ea4f 0232 mov.w r2, r2, rrx
|
||
8000872: 1ab6 subs r6, r6, r2
|
||
8000874: eb65 0503 sbc.w r5, r5, r3
|
||
8000878: 085b lsrs r3, r3, #1
|
||
800087a: ea4f 0232 mov.w r2, r2, rrx
|
||
800087e: f44f 1080 mov.w r0, #1048576 ; 0x100000
|
||
8000882: f44f 2c00 mov.w ip, #524288 ; 0x80000
|
||
8000886: ebb6 0e02 subs.w lr, r6, r2
|
||
800088a: eb75 0e03 sbcs.w lr, r5, r3
|
||
800088e: bf22 ittt cs
|
||
8000890: 1ab6 subcs r6, r6, r2
|
||
8000892: 4675 movcs r5, lr
|
||
8000894: ea40 000c orrcs.w r0, r0, ip
|
||
8000898: 085b lsrs r3, r3, #1
|
||
800089a: ea4f 0232 mov.w r2, r2, rrx
|
||
800089e: ebb6 0e02 subs.w lr, r6, r2
|
||
80008a2: eb75 0e03 sbcs.w lr, r5, r3
|
||
80008a6: bf22 ittt cs
|
||
80008a8: 1ab6 subcs r6, r6, r2
|
||
80008aa: 4675 movcs r5, lr
|
||
80008ac: ea40 005c orrcs.w r0, r0, ip, lsr #1
|
||
80008b0: 085b lsrs r3, r3, #1
|
||
80008b2: ea4f 0232 mov.w r2, r2, rrx
|
||
80008b6: ebb6 0e02 subs.w lr, r6, r2
|
||
80008ba: eb75 0e03 sbcs.w lr, r5, r3
|
||
80008be: bf22 ittt cs
|
||
80008c0: 1ab6 subcs r6, r6, r2
|
||
80008c2: 4675 movcs r5, lr
|
||
80008c4: ea40 009c orrcs.w r0, r0, ip, lsr #2
|
||
80008c8: 085b lsrs r3, r3, #1
|
||
80008ca: ea4f 0232 mov.w r2, r2, rrx
|
||
80008ce: ebb6 0e02 subs.w lr, r6, r2
|
||
80008d2: eb75 0e03 sbcs.w lr, r5, r3
|
||
80008d6: bf22 ittt cs
|
||
80008d8: 1ab6 subcs r6, r6, r2
|
||
80008da: 4675 movcs r5, lr
|
||
80008dc: ea40 00dc orrcs.w r0, r0, ip, lsr #3
|
||
80008e0: ea55 0e06 orrs.w lr, r5, r6
|
||
80008e4: d018 beq.n 8000918 <__aeabi_ddiv+0x114>
|
||
80008e6: ea4f 1505 mov.w r5, r5, lsl #4
|
||
80008ea: ea45 7516 orr.w r5, r5, r6, lsr #28
|
||
80008ee: ea4f 1606 mov.w r6, r6, lsl #4
|
||
80008f2: ea4f 03c3 mov.w r3, r3, lsl #3
|
||
80008f6: ea43 7352 orr.w r3, r3, r2, lsr #29
|
||
80008fa: ea4f 02c2 mov.w r2, r2, lsl #3
|
||
80008fe: ea5f 1c1c movs.w ip, ip, lsr #4
|
||
8000902: d1c0 bne.n 8000886 <__aeabi_ddiv+0x82>
|
||
8000904: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
||
8000908: d10b bne.n 8000922 <__aeabi_ddiv+0x11e>
|
||
800090a: ea41 0100 orr.w r1, r1, r0
|
||
800090e: f04f 0000 mov.w r0, #0
|
||
8000912: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000
|
||
8000916: e7b6 b.n 8000886 <__aeabi_ddiv+0x82>
|
||
8000918: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
||
800091c: bf04 itt eq
|
||
800091e: 4301 orreq r1, r0
|
||
8000920: 2000 moveq r0, #0
|
||
8000922: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
|
||
8000926: bf88 it hi
|
||
8000928: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
|
||
800092c: f63f aeaf bhi.w 800068e <__aeabi_dmul+0xde>
|
||
8000930: ebb5 0c03 subs.w ip, r5, r3
|
||
8000934: bf04 itt eq
|
||
8000936: ebb6 0c02 subseq.w ip, r6, r2
|
||
800093a: ea5f 0c50 movseq.w ip, r0, lsr #1
|
||
800093e: f150 0000 adcs.w r0, r0, #0
|
||
8000942: eb41 5104 adc.w r1, r1, r4, lsl #20
|
||
8000946: bd70 pop {r4, r5, r6, pc}
|
||
8000948: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000
|
||
800094c: ea4e 3111 orr.w r1, lr, r1, lsr #12
|
||
8000950: eb14 045c adds.w r4, r4, ip, lsr #1
|
||
8000954: bfc2 ittt gt
|
||
8000956: ebd4 050c rsbsgt r5, r4, ip
|
||
800095a: ea41 5104 orrgt.w r1, r1, r4, lsl #20
|
||
800095e: bd70 popgt {r4, r5, r6, pc}
|
||
8000960: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
8000964: f04f 0e00 mov.w lr, #0
|
||
8000968: 3c01 subs r4, #1
|
||
800096a: e690 b.n 800068e <__aeabi_dmul+0xde>
|
||
800096c: ea45 0e06 orr.w lr, r5, r6
|
||
8000970: e68d b.n 800068e <__aeabi_dmul+0xde>
|
||
8000972: ea0c 5513 and.w r5, ip, r3, lsr #20
|
||
8000976: ea94 0f0c teq r4, ip
|
||
800097a: bf08 it eq
|
||
800097c: ea95 0f0c teqeq r5, ip
|
||
8000980: f43f af3b beq.w 80007fa <__aeabi_dmul+0x24a>
|
||
8000984: ea94 0f0c teq r4, ip
|
||
8000988: d10a bne.n 80009a0 <__aeabi_ddiv+0x19c>
|
||
800098a: ea50 3401 orrs.w r4, r0, r1, lsl #12
|
||
800098e: f47f af34 bne.w 80007fa <__aeabi_dmul+0x24a>
|
||
8000992: ea95 0f0c teq r5, ip
|
||
8000996: f47f af25 bne.w 80007e4 <__aeabi_dmul+0x234>
|
||
800099a: 4610 mov r0, r2
|
||
800099c: 4619 mov r1, r3
|
||
800099e: e72c b.n 80007fa <__aeabi_dmul+0x24a>
|
||
80009a0: ea95 0f0c teq r5, ip
|
||
80009a4: d106 bne.n 80009b4 <__aeabi_ddiv+0x1b0>
|
||
80009a6: ea52 3503 orrs.w r5, r2, r3, lsl #12
|
||
80009aa: f43f aefd beq.w 80007a8 <__aeabi_dmul+0x1f8>
|
||
80009ae: 4610 mov r0, r2
|
||
80009b0: 4619 mov r1, r3
|
||
80009b2: e722 b.n 80007fa <__aeabi_dmul+0x24a>
|
||
80009b4: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
||
80009b8: bf18 it ne
|
||
80009ba: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
||
80009be: f47f aec5 bne.w 800074c <__aeabi_dmul+0x19c>
|
||
80009c2: ea50 0441 orrs.w r4, r0, r1, lsl #1
|
||
80009c6: f47f af0d bne.w 80007e4 <__aeabi_dmul+0x234>
|
||
80009ca: ea52 0543 orrs.w r5, r2, r3, lsl #1
|
||
80009ce: f47f aeeb bne.w 80007a8 <__aeabi_dmul+0x1f8>
|
||
80009d2: e712 b.n 80007fa <__aeabi_dmul+0x24a>
|
||
|
||
080009d4 <__gedf2>:
|
||
80009d4: f04f 3cff mov.w ip, #4294967295 ; 0xffffffff
|
||
80009d8: e006 b.n 80009e8 <__cmpdf2+0x4>
|
||
80009da: bf00 nop
|
||
|
||
080009dc <__ledf2>:
|
||
80009dc: f04f 0c01 mov.w ip, #1
|
||
80009e0: e002 b.n 80009e8 <__cmpdf2+0x4>
|
||
80009e2: bf00 nop
|
||
|
||
080009e4 <__cmpdf2>:
|
||
80009e4: f04f 0c01 mov.w ip, #1
|
||
80009e8: f84d cd04 str.w ip, [sp, #-4]!
|
||
80009ec: ea4f 0c41 mov.w ip, r1, lsl #1
|
||
80009f0: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
80009f4: ea4f 0c43 mov.w ip, r3, lsl #1
|
||
80009f8: bf18 it ne
|
||
80009fa: ea7f 5c6c mvnsne.w ip, ip, asr #21
|
||
80009fe: d01b beq.n 8000a38 <__cmpdf2+0x54>
|
||
8000a00: b001 add sp, #4
|
||
8000a02: ea50 0c41 orrs.w ip, r0, r1, lsl #1
|
||
8000a06: bf0c ite eq
|
||
8000a08: ea52 0c43 orrseq.w ip, r2, r3, lsl #1
|
||
8000a0c: ea91 0f03 teqne r1, r3
|
||
8000a10: bf02 ittt eq
|
||
8000a12: ea90 0f02 teqeq r0, r2
|
||
8000a16: 2000 moveq r0, #0
|
||
8000a18: 4770 bxeq lr
|
||
8000a1a: f110 0f00 cmn.w r0, #0
|
||
8000a1e: ea91 0f03 teq r1, r3
|
||
8000a22: bf58 it pl
|
||
8000a24: 4299 cmppl r1, r3
|
||
8000a26: bf08 it eq
|
||
8000a28: 4290 cmpeq r0, r2
|
||
8000a2a: bf2c ite cs
|
||
8000a2c: 17d8 asrcs r0, r3, #31
|
||
8000a2e: ea6f 70e3 mvncc.w r0, r3, asr #31
|
||
8000a32: f040 0001 orr.w r0, r0, #1
|
||
8000a36: 4770 bx lr
|
||
8000a38: ea4f 0c41 mov.w ip, r1, lsl #1
|
||
8000a3c: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000a40: d102 bne.n 8000a48 <__cmpdf2+0x64>
|
||
8000a42: ea50 3c01 orrs.w ip, r0, r1, lsl #12
|
||
8000a46: d107 bne.n 8000a58 <__cmpdf2+0x74>
|
||
8000a48: ea4f 0c43 mov.w ip, r3, lsl #1
|
||
8000a4c: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000a50: d1d6 bne.n 8000a00 <__cmpdf2+0x1c>
|
||
8000a52: ea52 3c03 orrs.w ip, r2, r3, lsl #12
|
||
8000a56: d0d3 beq.n 8000a00 <__cmpdf2+0x1c>
|
||
8000a58: f85d 0b04 ldr.w r0, [sp], #4
|
||
8000a5c: 4770 bx lr
|
||
8000a5e: bf00 nop
|
||
|
||
08000a60 <__aeabi_cdrcmple>:
|
||
8000a60: 4684 mov ip, r0
|
||
8000a62: 4610 mov r0, r2
|
||
8000a64: 4662 mov r2, ip
|
||
8000a66: 468c mov ip, r1
|
||
8000a68: 4619 mov r1, r3
|
||
8000a6a: 4663 mov r3, ip
|
||
8000a6c: e000 b.n 8000a70 <__aeabi_cdcmpeq>
|
||
8000a6e: bf00 nop
|
||
|
||
08000a70 <__aeabi_cdcmpeq>:
|
||
8000a70: b501 push {r0, lr}
|
||
8000a72: f7ff ffb7 bl 80009e4 <__cmpdf2>
|
||
8000a76: 2800 cmp r0, #0
|
||
8000a78: bf48 it mi
|
||
8000a7a: f110 0f00 cmnmi.w r0, #0
|
||
8000a7e: bd01 pop {r0, pc}
|
||
|
||
08000a80 <__aeabi_dcmpeq>:
|
||
8000a80: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000a84: f7ff fff4 bl 8000a70 <__aeabi_cdcmpeq>
|
||
8000a88: bf0c ite eq
|
||
8000a8a: 2001 moveq r0, #1
|
||
8000a8c: 2000 movne r0, #0
|
||
8000a8e: f85d fb08 ldr.w pc, [sp], #8
|
||
8000a92: bf00 nop
|
||
|
||
08000a94 <__aeabi_dcmplt>:
|
||
8000a94: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000a98: f7ff ffea bl 8000a70 <__aeabi_cdcmpeq>
|
||
8000a9c: bf34 ite cc
|
||
8000a9e: 2001 movcc r0, #1
|
||
8000aa0: 2000 movcs r0, #0
|
||
8000aa2: f85d fb08 ldr.w pc, [sp], #8
|
||
8000aa6: bf00 nop
|
||
|
||
08000aa8 <__aeabi_dcmple>:
|
||
8000aa8: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000aac: f7ff ffe0 bl 8000a70 <__aeabi_cdcmpeq>
|
||
8000ab0: bf94 ite ls
|
||
8000ab2: 2001 movls r0, #1
|
||
8000ab4: 2000 movhi r0, #0
|
||
8000ab6: f85d fb08 ldr.w pc, [sp], #8
|
||
8000aba: bf00 nop
|
||
|
||
08000abc <__aeabi_dcmpge>:
|
||
8000abc: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000ac0: f7ff ffce bl 8000a60 <__aeabi_cdrcmple>
|
||
8000ac4: bf94 ite ls
|
||
8000ac6: 2001 movls r0, #1
|
||
8000ac8: 2000 movhi r0, #0
|
||
8000aca: f85d fb08 ldr.w pc, [sp], #8
|
||
8000ace: bf00 nop
|
||
|
||
08000ad0 <__aeabi_dcmpgt>:
|
||
8000ad0: f84d ed08 str.w lr, [sp, #-8]!
|
||
8000ad4: f7ff ffc4 bl 8000a60 <__aeabi_cdrcmple>
|
||
8000ad8: bf34 ite cc
|
||
8000ada: 2001 movcc r0, #1
|
||
8000adc: 2000 movcs r0, #0
|
||
8000ade: f85d fb08 ldr.w pc, [sp], #8
|
||
8000ae2: bf00 nop
|
||
|
||
08000ae4 <__aeabi_dcmpun>:
|
||
8000ae4: ea4f 0c41 mov.w ip, r1, lsl #1
|
||
8000ae8: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000aec: d102 bne.n 8000af4 <__aeabi_dcmpun+0x10>
|
||
8000aee: ea50 3c01 orrs.w ip, r0, r1, lsl #12
|
||
8000af2: d10a bne.n 8000b0a <__aeabi_dcmpun+0x26>
|
||
8000af4: ea4f 0c43 mov.w ip, r3, lsl #1
|
||
8000af8: ea7f 5c6c mvns.w ip, ip, asr #21
|
||
8000afc: d102 bne.n 8000b04 <__aeabi_dcmpun+0x20>
|
||
8000afe: ea52 3c03 orrs.w ip, r2, r3, lsl #12
|
||
8000b02: d102 bne.n 8000b0a <__aeabi_dcmpun+0x26>
|
||
8000b04: f04f 0000 mov.w r0, #0
|
||
8000b08: 4770 bx lr
|
||
8000b0a: f04f 0001 mov.w r0, #1
|
||
8000b0e: 4770 bx lr
|
||
|
||
08000b10 <__aeabi_d2iz>:
|
||
8000b10: ea4f 0241 mov.w r2, r1, lsl #1
|
||
8000b14: f512 1200 adds.w r2, r2, #2097152 ; 0x200000
|
||
8000b18: d215 bcs.n 8000b46 <__aeabi_d2iz+0x36>
|
||
8000b1a: d511 bpl.n 8000b40 <__aeabi_d2iz+0x30>
|
||
8000b1c: f46f 7378 mvn.w r3, #992 ; 0x3e0
|
||
8000b20: ebb3 5262 subs.w r2, r3, r2, asr #21
|
||
8000b24: d912 bls.n 8000b4c <__aeabi_d2iz+0x3c>
|
||
8000b26: ea4f 23c1 mov.w r3, r1, lsl #11
|
||
8000b2a: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
||
8000b2e: ea43 5350 orr.w r3, r3, r0, lsr #21
|
||
8000b32: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
|
||
8000b36: fa23 f002 lsr.w r0, r3, r2
|
||
8000b3a: bf18 it ne
|
||
8000b3c: 4240 negne r0, r0
|
||
8000b3e: 4770 bx lr
|
||
8000b40: f04f 0000 mov.w r0, #0
|
||
8000b44: 4770 bx lr
|
||
8000b46: ea50 3001 orrs.w r0, r0, r1, lsl #12
|
||
8000b4a: d105 bne.n 8000b58 <__aeabi_d2iz+0x48>
|
||
8000b4c: f011 4000 ands.w r0, r1, #2147483648 ; 0x80000000
|
||
8000b50: bf08 it eq
|
||
8000b52: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000
|
||
8000b56: 4770 bx lr
|
||
8000b58: f04f 0000 mov.w r0, #0
|
||
8000b5c: 4770 bx lr
|
||
8000b5e: bf00 nop
|
||
|
||
08000b60 <__aeabi_d2f>:
|
||
8000b60: ea4f 0241 mov.w r2, r1, lsl #1
|
||
8000b64: f1b2 43e0 subs.w r3, r2, #1879048192 ; 0x70000000
|
||
8000b68: bf24 itt cs
|
||
8000b6a: f5b3 1c00 subscs.w ip, r3, #2097152 ; 0x200000
|
||
8000b6e: f1dc 5cfe rsbscs ip, ip, #532676608 ; 0x1fc00000
|
||
8000b72: d90d bls.n 8000b90 <__aeabi_d2f+0x30>
|
||
8000b74: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
||
8000b78: ea4f 02c0 mov.w r2, r0, lsl #3
|
||
8000b7c: ea4c 7050 orr.w r0, ip, r0, lsr #29
|
||
8000b80: f1b2 4f00 cmp.w r2, #2147483648 ; 0x80000000
|
||
8000b84: eb40 0083 adc.w r0, r0, r3, lsl #2
|
||
8000b88: bf08 it eq
|
||
8000b8a: f020 0001 biceq.w r0, r0, #1
|
||
8000b8e: 4770 bx lr
|
||
8000b90: f011 4f80 tst.w r1, #1073741824 ; 0x40000000
|
||
8000b94: d121 bne.n 8000bda <__aeabi_d2f+0x7a>
|
||
8000b96: f113 7238 adds.w r2, r3, #48234496 ; 0x2e00000
|
||
8000b9a: bfbc itt lt
|
||
8000b9c: f001 4000 andlt.w r0, r1, #2147483648 ; 0x80000000
|
||
8000ba0: 4770 bxlt lr
|
||
8000ba2: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
||
8000ba6: ea4f 5252 mov.w r2, r2, lsr #21
|
||
8000baa: f1c2 0218 rsb r2, r2, #24
|
||
8000bae: f1c2 0c20 rsb ip, r2, #32
|
||
8000bb2: fa10 f30c lsls.w r3, r0, ip
|
||
8000bb6: fa20 f002 lsr.w r0, r0, r2
|
||
8000bba: bf18 it ne
|
||
8000bbc: f040 0001 orrne.w r0, r0, #1
|
||
8000bc0: ea4f 23c1 mov.w r3, r1, lsl #11
|
||
8000bc4: ea4f 23d3 mov.w r3, r3, lsr #11
|
||
8000bc8: fa03 fc0c lsl.w ip, r3, ip
|
||
8000bcc: ea40 000c orr.w r0, r0, ip
|
||
8000bd0: fa23 f302 lsr.w r3, r3, r2
|
||
8000bd4: ea4f 0343 mov.w r3, r3, lsl #1
|
||
8000bd8: e7cc b.n 8000b74 <__aeabi_d2f+0x14>
|
||
8000bda: ea7f 5362 mvns.w r3, r2, asr #21
|
||
8000bde: d107 bne.n 8000bf0 <__aeabi_d2f+0x90>
|
||
8000be0: ea50 3301 orrs.w r3, r0, r1, lsl #12
|
||
8000be4: bf1e ittt ne
|
||
8000be6: f04f 40fe movne.w r0, #2130706432 ; 0x7f000000
|
||
8000bea: f440 0040 orrne.w r0, r0, #12582912 ; 0xc00000
|
||
8000bee: 4770 bxne lr
|
||
8000bf0: f001 4000 and.w r0, r1, #2147483648 ; 0x80000000
|
||
8000bf4: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
||
8000bf8: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000bfc: 4770 bx lr
|
||
8000bfe: bf00 nop
|
||
|
||
08000c00 <__aeabi_frsub>:
|
||
8000c00: f080 4000 eor.w r0, r0, #2147483648 ; 0x80000000
|
||
8000c04: e002 b.n 8000c0c <__addsf3>
|
||
8000c06: bf00 nop
|
||
|
||
08000c08 <__aeabi_fsub>:
|
||
8000c08: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000
|
||
|
||
08000c0c <__addsf3>:
|
||
8000c0c: 0042 lsls r2, r0, #1
|
||
8000c0e: bf1f itttt ne
|
||
8000c10: ea5f 0341 movsne.w r3, r1, lsl #1
|
||
8000c14: ea92 0f03 teqne r2, r3
|
||
8000c18: ea7f 6c22 mvnsne.w ip, r2, asr #24
|
||
8000c1c: ea7f 6c23 mvnsne.w ip, r3, asr #24
|
||
8000c20: d06a beq.n 8000cf8 <__addsf3+0xec>
|
||
8000c22: ea4f 6212 mov.w r2, r2, lsr #24
|
||
8000c26: ebd2 6313 rsbs r3, r2, r3, lsr #24
|
||
8000c2a: bfc1 itttt gt
|
||
8000c2c: 18d2 addgt r2, r2, r3
|
||
8000c2e: 4041 eorgt r1, r0
|
||
8000c30: 4048 eorgt r0, r1
|
||
8000c32: 4041 eorgt r1, r0
|
||
8000c34: bfb8 it lt
|
||
8000c36: 425b neglt r3, r3
|
||
8000c38: 2b19 cmp r3, #25
|
||
8000c3a: bf88 it hi
|
||
8000c3c: 4770 bxhi lr
|
||
8000c3e: f010 4f00 tst.w r0, #2147483648 ; 0x80000000
|
||
8000c42: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000c46: f020 407f bic.w r0, r0, #4278190080 ; 0xff000000
|
||
8000c4a: bf18 it ne
|
||
8000c4c: 4240 negne r0, r0
|
||
8000c4e: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
|
||
8000c52: f441 0100 orr.w r1, r1, #8388608 ; 0x800000
|
||
8000c56: f021 417f bic.w r1, r1, #4278190080 ; 0xff000000
|
||
8000c5a: bf18 it ne
|
||
8000c5c: 4249 negne r1, r1
|
||
8000c5e: ea92 0f03 teq r2, r3
|
||
8000c62: d03f beq.n 8000ce4 <__addsf3+0xd8>
|
||
8000c64: f1a2 0201 sub.w r2, r2, #1
|
||
8000c68: fa41 fc03 asr.w ip, r1, r3
|
||
8000c6c: eb10 000c adds.w r0, r0, ip
|
||
8000c70: f1c3 0320 rsb r3, r3, #32
|
||
8000c74: fa01 f103 lsl.w r1, r1, r3
|
||
8000c78: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000
|
||
8000c7c: d502 bpl.n 8000c84 <__addsf3+0x78>
|
||
8000c7e: 4249 negs r1, r1
|
||
8000c80: eb60 0040 sbc.w r0, r0, r0, lsl #1
|
||
8000c84: f5b0 0f00 cmp.w r0, #8388608 ; 0x800000
|
||
8000c88: d313 bcc.n 8000cb2 <__addsf3+0xa6>
|
||
8000c8a: f1b0 7f80 cmp.w r0, #16777216 ; 0x1000000
|
||
8000c8e: d306 bcc.n 8000c9e <__addsf3+0x92>
|
||
8000c90: 0840 lsrs r0, r0, #1
|
||
8000c92: ea4f 0131 mov.w r1, r1, rrx
|
||
8000c96: f102 0201 add.w r2, r2, #1
|
||
8000c9a: 2afe cmp r2, #254 ; 0xfe
|
||
8000c9c: d251 bcs.n 8000d42 <__addsf3+0x136>
|
||
8000c9e: f1b1 4f00 cmp.w r1, #2147483648 ; 0x80000000
|
||
8000ca2: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
||
8000ca6: bf08 it eq
|
||
8000ca8: f020 0001 biceq.w r0, r0, #1
|
||
8000cac: ea40 0003 orr.w r0, r0, r3
|
||
8000cb0: 4770 bx lr
|
||
8000cb2: 0049 lsls r1, r1, #1
|
||
8000cb4: eb40 0000 adc.w r0, r0, r0
|
||
8000cb8: 3a01 subs r2, #1
|
||
8000cba: bf28 it cs
|
||
8000cbc: f5b0 0f00 cmpcs.w r0, #8388608 ; 0x800000
|
||
8000cc0: d2ed bcs.n 8000c9e <__addsf3+0x92>
|
||
8000cc2: fab0 fc80 clz ip, r0
|
||
8000cc6: f1ac 0c08 sub.w ip, ip, #8
|
||
8000cca: ebb2 020c subs.w r2, r2, ip
|
||
8000cce: fa00 f00c lsl.w r0, r0, ip
|
||
8000cd2: bfaa itet ge
|
||
8000cd4: eb00 50c2 addge.w r0, r0, r2, lsl #23
|
||
8000cd8: 4252 neglt r2, r2
|
||
8000cda: 4318 orrge r0, r3
|
||
8000cdc: bfbc itt lt
|
||
8000cde: 40d0 lsrlt r0, r2
|
||
8000ce0: 4318 orrlt r0, r3
|
||
8000ce2: 4770 bx lr
|
||
8000ce4: f092 0f00 teq r2, #0
|
||
8000ce8: f481 0100 eor.w r1, r1, #8388608 ; 0x800000
|
||
8000cec: bf06 itte eq
|
||
8000cee: f480 0000 eoreq.w r0, r0, #8388608 ; 0x800000
|
||
8000cf2: 3201 addeq r2, #1
|
||
8000cf4: 3b01 subne r3, #1
|
||
8000cf6: e7b5 b.n 8000c64 <__addsf3+0x58>
|
||
8000cf8: ea4f 0341 mov.w r3, r1, lsl #1
|
||
8000cfc: ea7f 6c22 mvns.w ip, r2, asr #24
|
||
8000d00: bf18 it ne
|
||
8000d02: ea7f 6c23 mvnsne.w ip, r3, asr #24
|
||
8000d06: d021 beq.n 8000d4c <__addsf3+0x140>
|
||
8000d08: ea92 0f03 teq r2, r3
|
||
8000d0c: d004 beq.n 8000d18 <__addsf3+0x10c>
|
||
8000d0e: f092 0f00 teq r2, #0
|
||
8000d12: bf08 it eq
|
||
8000d14: 4608 moveq r0, r1
|
||
8000d16: 4770 bx lr
|
||
8000d18: ea90 0f01 teq r0, r1
|
||
8000d1c: bf1c itt ne
|
||
8000d1e: 2000 movne r0, #0
|
||
8000d20: 4770 bxne lr
|
||
8000d22: f012 4f7f tst.w r2, #4278190080 ; 0xff000000
|
||
8000d26: d104 bne.n 8000d32 <__addsf3+0x126>
|
||
8000d28: 0040 lsls r0, r0, #1
|
||
8000d2a: bf28 it cs
|
||
8000d2c: f040 4000 orrcs.w r0, r0, #2147483648 ; 0x80000000
|
||
8000d30: 4770 bx lr
|
||
8000d32: f112 7200 adds.w r2, r2, #33554432 ; 0x2000000
|
||
8000d36: bf3c itt cc
|
||
8000d38: f500 0000 addcc.w r0, r0, #8388608 ; 0x800000
|
||
8000d3c: 4770 bxcc lr
|
||
8000d3e: f000 4300 and.w r3, r0, #2147483648 ; 0x80000000
|
||
8000d42: f043 40fe orr.w r0, r3, #2130706432 ; 0x7f000000
|
||
8000d46: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000d4a: 4770 bx lr
|
||
8000d4c: ea7f 6222 mvns.w r2, r2, asr #24
|
||
8000d50: bf16 itet ne
|
||
8000d52: 4608 movne r0, r1
|
||
8000d54: ea7f 6323 mvnseq.w r3, r3, asr #24
|
||
8000d58: 4601 movne r1, r0
|
||
8000d5a: 0242 lsls r2, r0, #9
|
||
8000d5c: bf06 itte eq
|
||
8000d5e: ea5f 2341 movseq.w r3, r1, lsl #9
|
||
8000d62: ea90 0f01 teqeq r0, r1
|
||
8000d66: f440 0080 orrne.w r0, r0, #4194304 ; 0x400000
|
||
8000d6a: 4770 bx lr
|
||
|
||
08000d6c <__aeabi_ui2f>:
|
||
8000d6c: f04f 0300 mov.w r3, #0
|
||
8000d70: e004 b.n 8000d7c <__aeabi_i2f+0x8>
|
||
8000d72: bf00 nop
|
||
|
||
08000d74 <__aeabi_i2f>:
|
||
8000d74: f010 4300 ands.w r3, r0, #2147483648 ; 0x80000000
|
||
8000d78: bf48 it mi
|
||
8000d7a: 4240 negmi r0, r0
|
||
8000d7c: ea5f 0c00 movs.w ip, r0
|
||
8000d80: bf08 it eq
|
||
8000d82: 4770 bxeq lr
|
||
8000d84: f043 4396 orr.w r3, r3, #1258291200 ; 0x4b000000
|
||
8000d88: 4601 mov r1, r0
|
||
8000d8a: f04f 0000 mov.w r0, #0
|
||
8000d8e: e01c b.n 8000dca <__aeabi_l2f+0x2a>
|
||
|
||
08000d90 <__aeabi_ul2f>:
|
||
8000d90: ea50 0201 orrs.w r2, r0, r1
|
||
8000d94: bf08 it eq
|
||
8000d96: 4770 bxeq lr
|
||
8000d98: f04f 0300 mov.w r3, #0
|
||
8000d9c: e00a b.n 8000db4 <__aeabi_l2f+0x14>
|
||
8000d9e: bf00 nop
|
||
|
||
08000da0 <__aeabi_l2f>:
|
||
8000da0: ea50 0201 orrs.w r2, r0, r1
|
||
8000da4: bf08 it eq
|
||
8000da6: 4770 bxeq lr
|
||
8000da8: f011 4300 ands.w r3, r1, #2147483648 ; 0x80000000
|
||
8000dac: d502 bpl.n 8000db4 <__aeabi_l2f+0x14>
|
||
8000dae: 4240 negs r0, r0
|
||
8000db0: eb61 0141 sbc.w r1, r1, r1, lsl #1
|
||
8000db4: ea5f 0c01 movs.w ip, r1
|
||
8000db8: bf02 ittt eq
|
||
8000dba: 4684 moveq ip, r0
|
||
8000dbc: 4601 moveq r1, r0
|
||
8000dbe: 2000 moveq r0, #0
|
||
8000dc0: f043 43b6 orr.w r3, r3, #1526726656 ; 0x5b000000
|
||
8000dc4: bf08 it eq
|
||
8000dc6: f1a3 5380 subeq.w r3, r3, #268435456 ; 0x10000000
|
||
8000dca: f5a3 0300 sub.w r3, r3, #8388608 ; 0x800000
|
||
8000dce: fabc f28c clz r2, ip
|
||
8000dd2: 3a08 subs r2, #8
|
||
8000dd4: eba3 53c2 sub.w r3, r3, r2, lsl #23
|
||
8000dd8: db10 blt.n 8000dfc <__aeabi_l2f+0x5c>
|
||
8000dda: fa01 fc02 lsl.w ip, r1, r2
|
||
8000dde: 4463 add r3, ip
|
||
8000de0: fa00 fc02 lsl.w ip, r0, r2
|
||
8000de4: f1c2 0220 rsb r2, r2, #32
|
||
8000de8: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000
|
||
8000dec: fa20 f202 lsr.w r2, r0, r2
|
||
8000df0: eb43 0002 adc.w r0, r3, r2
|
||
8000df4: bf08 it eq
|
||
8000df6: f020 0001 biceq.w r0, r0, #1
|
||
8000dfa: 4770 bx lr
|
||
8000dfc: f102 0220 add.w r2, r2, #32
|
||
8000e00: fa01 fc02 lsl.w ip, r1, r2
|
||
8000e04: f1c2 0220 rsb r2, r2, #32
|
||
8000e08: ea50 004c orrs.w r0, r0, ip, lsl #1
|
||
8000e0c: fa21 f202 lsr.w r2, r1, r2
|
||
8000e10: eb43 0002 adc.w r0, r3, r2
|
||
8000e14: bf08 it eq
|
||
8000e16: ea20 70dc biceq.w r0, r0, ip, lsr #31
|
||
8000e1a: 4770 bx lr
|
||
|
||
08000e1c <__aeabi_fmul>:
|
||
8000e1c: f04f 0cff mov.w ip, #255 ; 0xff
|
||
8000e20: ea1c 52d0 ands.w r2, ip, r0, lsr #23
|
||
8000e24: bf1e ittt ne
|
||
8000e26: ea1c 53d1 andsne.w r3, ip, r1, lsr #23
|
||
8000e2a: ea92 0f0c teqne r2, ip
|
||
8000e2e: ea93 0f0c teqne r3, ip
|
||
8000e32: d06f beq.n 8000f14 <__aeabi_fmul+0xf8>
|
||
8000e34: 441a add r2, r3
|
||
8000e36: ea80 0c01 eor.w ip, r0, r1
|
||
8000e3a: 0240 lsls r0, r0, #9
|
||
8000e3c: bf18 it ne
|
||
8000e3e: ea5f 2141 movsne.w r1, r1, lsl #9
|
||
8000e42: d01e beq.n 8000e82 <__aeabi_fmul+0x66>
|
||
8000e44: f04f 6300 mov.w r3, #134217728 ; 0x8000000
|
||
8000e48: ea43 1050 orr.w r0, r3, r0, lsr #5
|
||
8000e4c: ea43 1151 orr.w r1, r3, r1, lsr #5
|
||
8000e50: fba0 3101 umull r3, r1, r0, r1
|
||
8000e54: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000
|
||
8000e58: f5b1 0f00 cmp.w r1, #8388608 ; 0x800000
|
||
8000e5c: bf3e ittt cc
|
||
8000e5e: 0049 lslcc r1, r1, #1
|
||
8000e60: ea41 71d3 orrcc.w r1, r1, r3, lsr #31
|
||
8000e64: 005b lslcc r3, r3, #1
|
||
8000e66: ea40 0001 orr.w r0, r0, r1
|
||
8000e6a: f162 027f sbc.w r2, r2, #127 ; 0x7f
|
||
8000e6e: 2afd cmp r2, #253 ; 0xfd
|
||
8000e70: d81d bhi.n 8000eae <__aeabi_fmul+0x92>
|
||
8000e72: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000
|
||
8000e76: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
||
8000e7a: bf08 it eq
|
||
8000e7c: f020 0001 biceq.w r0, r0, #1
|
||
8000e80: 4770 bx lr
|
||
8000e82: f090 0f00 teq r0, #0
|
||
8000e86: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000
|
||
8000e8a: bf08 it eq
|
||
8000e8c: 0249 lsleq r1, r1, #9
|
||
8000e8e: ea4c 2050 orr.w r0, ip, r0, lsr #9
|
||
8000e92: ea40 2051 orr.w r0, r0, r1, lsr #9
|
||
8000e96: 3a7f subs r2, #127 ; 0x7f
|
||
8000e98: bfc2 ittt gt
|
||
8000e9a: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff
|
||
8000e9e: ea40 50c2 orrgt.w r0, r0, r2, lsl #23
|
||
8000ea2: 4770 bxgt lr
|
||
8000ea4: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000ea8: f04f 0300 mov.w r3, #0
|
||
8000eac: 3a01 subs r2, #1
|
||
8000eae: dc5d bgt.n 8000f6c <__aeabi_fmul+0x150>
|
||
8000eb0: f112 0f19 cmn.w r2, #25
|
||
8000eb4: bfdc itt le
|
||
8000eb6: f000 4000 andle.w r0, r0, #2147483648 ; 0x80000000
|
||
8000eba: 4770 bxle lr
|
||
8000ebc: f1c2 0200 rsb r2, r2, #0
|
||
8000ec0: 0041 lsls r1, r0, #1
|
||
8000ec2: fa21 f102 lsr.w r1, r1, r2
|
||
8000ec6: f1c2 0220 rsb r2, r2, #32
|
||
8000eca: fa00 fc02 lsl.w ip, r0, r2
|
||
8000ece: ea5f 0031 movs.w r0, r1, rrx
|
||
8000ed2: f140 0000 adc.w r0, r0, #0
|
||
8000ed6: ea53 034c orrs.w r3, r3, ip, lsl #1
|
||
8000eda: bf08 it eq
|
||
8000edc: ea20 70dc biceq.w r0, r0, ip, lsr #31
|
||
8000ee0: 4770 bx lr
|
||
8000ee2: f092 0f00 teq r2, #0
|
||
8000ee6: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000
|
||
8000eea: bf02 ittt eq
|
||
8000eec: 0040 lsleq r0, r0, #1
|
||
8000eee: f410 0f00 tsteq.w r0, #8388608 ; 0x800000
|
||
8000ef2: 3a01 subeq r2, #1
|
||
8000ef4: d0f9 beq.n 8000eea <__aeabi_fmul+0xce>
|
||
8000ef6: ea40 000c orr.w r0, r0, ip
|
||
8000efa: f093 0f00 teq r3, #0
|
||
8000efe: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
||
8000f02: bf02 ittt eq
|
||
8000f04: 0049 lsleq r1, r1, #1
|
||
8000f06: f411 0f00 tsteq.w r1, #8388608 ; 0x800000
|
||
8000f0a: 3b01 subeq r3, #1
|
||
8000f0c: d0f9 beq.n 8000f02 <__aeabi_fmul+0xe6>
|
||
8000f0e: ea41 010c orr.w r1, r1, ip
|
||
8000f12: e78f b.n 8000e34 <__aeabi_fmul+0x18>
|
||
8000f14: ea0c 53d1 and.w r3, ip, r1, lsr #23
|
||
8000f18: ea92 0f0c teq r2, ip
|
||
8000f1c: bf18 it ne
|
||
8000f1e: ea93 0f0c teqne r3, ip
|
||
8000f22: d00a beq.n 8000f3a <__aeabi_fmul+0x11e>
|
||
8000f24: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000
|
||
8000f28: bf18 it ne
|
||
8000f2a: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000
|
||
8000f2e: d1d8 bne.n 8000ee2 <__aeabi_fmul+0xc6>
|
||
8000f30: ea80 0001 eor.w r0, r0, r1
|
||
8000f34: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000
|
||
8000f38: 4770 bx lr
|
||
8000f3a: f090 0f00 teq r0, #0
|
||
8000f3e: bf17 itett ne
|
||
8000f40: f090 4f00 teqne r0, #2147483648 ; 0x80000000
|
||
8000f44: 4608 moveq r0, r1
|
||
8000f46: f091 0f00 teqne r1, #0
|
||
8000f4a: f091 4f00 teqne r1, #2147483648 ; 0x80000000
|
||
8000f4e: d014 beq.n 8000f7a <__aeabi_fmul+0x15e>
|
||
8000f50: ea92 0f0c teq r2, ip
|
||
8000f54: d101 bne.n 8000f5a <__aeabi_fmul+0x13e>
|
||
8000f56: 0242 lsls r2, r0, #9
|
||
8000f58: d10f bne.n 8000f7a <__aeabi_fmul+0x15e>
|
||
8000f5a: ea93 0f0c teq r3, ip
|
||
8000f5e: d103 bne.n 8000f68 <__aeabi_fmul+0x14c>
|
||
8000f60: 024b lsls r3, r1, #9
|
||
8000f62: bf18 it ne
|
||
8000f64: 4608 movne r0, r1
|
||
8000f66: d108 bne.n 8000f7a <__aeabi_fmul+0x15e>
|
||
8000f68: ea80 0001 eor.w r0, r0, r1
|
||
8000f6c: f000 4000 and.w r0, r0, #2147483648 ; 0x80000000
|
||
8000f70: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
||
8000f74: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8000f78: 4770 bx lr
|
||
8000f7a: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
||
8000f7e: f440 0040 orr.w r0, r0, #12582912 ; 0xc00000
|
||
8000f82: 4770 bx lr
|
||
|
||
08000f84 <__aeabi_fdiv>:
|
||
8000f84: f04f 0cff mov.w ip, #255 ; 0xff
|
||
8000f88: ea1c 52d0 ands.w r2, ip, r0, lsr #23
|
||
8000f8c: bf1e ittt ne
|
||
8000f8e: ea1c 53d1 andsne.w r3, ip, r1, lsr #23
|
||
8000f92: ea92 0f0c teqne r2, ip
|
||
8000f96: ea93 0f0c teqne r3, ip
|
||
8000f9a: d069 beq.n 8001070 <__aeabi_fdiv+0xec>
|
||
8000f9c: eba2 0203 sub.w r2, r2, r3
|
||
8000fa0: ea80 0c01 eor.w ip, r0, r1
|
||
8000fa4: 0249 lsls r1, r1, #9
|
||
8000fa6: ea4f 2040 mov.w r0, r0, lsl #9
|
||
8000faa: d037 beq.n 800101c <__aeabi_fdiv+0x98>
|
||
8000fac: f04f 5380 mov.w r3, #268435456 ; 0x10000000
|
||
8000fb0: ea43 1111 orr.w r1, r3, r1, lsr #4
|
||
8000fb4: ea43 1310 orr.w r3, r3, r0, lsr #4
|
||
8000fb8: f00c 4000 and.w r0, ip, #2147483648 ; 0x80000000
|
||
8000fbc: 428b cmp r3, r1
|
||
8000fbe: bf38 it cc
|
||
8000fc0: 005b lslcc r3, r3, #1
|
||
8000fc2: f142 027d adc.w r2, r2, #125 ; 0x7d
|
||
8000fc6: f44f 0c00 mov.w ip, #8388608 ; 0x800000
|
||
8000fca: 428b cmp r3, r1
|
||
8000fcc: bf24 itt cs
|
||
8000fce: 1a5b subcs r3, r3, r1
|
||
8000fd0: ea40 000c orrcs.w r0, r0, ip
|
||
8000fd4: ebb3 0f51 cmp.w r3, r1, lsr #1
|
||
8000fd8: bf24 itt cs
|
||
8000fda: eba3 0351 subcs.w r3, r3, r1, lsr #1
|
||
8000fde: ea40 005c orrcs.w r0, r0, ip, lsr #1
|
||
8000fe2: ebb3 0f91 cmp.w r3, r1, lsr #2
|
||
8000fe6: bf24 itt cs
|
||
8000fe8: eba3 0391 subcs.w r3, r3, r1, lsr #2
|
||
8000fec: ea40 009c orrcs.w r0, r0, ip, lsr #2
|
||
8000ff0: ebb3 0fd1 cmp.w r3, r1, lsr #3
|
||
8000ff4: bf24 itt cs
|
||
8000ff6: eba3 03d1 subcs.w r3, r3, r1, lsr #3
|
||
8000ffa: ea40 00dc orrcs.w r0, r0, ip, lsr #3
|
||
8000ffe: 011b lsls r3, r3, #4
|
||
8001000: bf18 it ne
|
||
8001002: ea5f 1c1c movsne.w ip, ip, lsr #4
|
||
8001006: d1e0 bne.n 8000fca <__aeabi_fdiv+0x46>
|
||
8001008: 2afd cmp r2, #253 ; 0xfd
|
||
800100a: f63f af50 bhi.w 8000eae <__aeabi_fmul+0x92>
|
||
800100e: 428b cmp r3, r1
|
||
8001010: eb40 50c2 adc.w r0, r0, r2, lsl #23
|
||
8001014: bf08 it eq
|
||
8001016: f020 0001 biceq.w r0, r0, #1
|
||
800101a: 4770 bx lr
|
||
800101c: f00c 4c00 and.w ip, ip, #2147483648 ; 0x80000000
|
||
8001020: ea4c 2050 orr.w r0, ip, r0, lsr #9
|
||
8001024: 327f adds r2, #127 ; 0x7f
|
||
8001026: bfc2 ittt gt
|
||
8001028: f1d2 03ff rsbsgt r3, r2, #255 ; 0xff
|
||
800102c: ea40 50c2 orrgt.w r0, r0, r2, lsl #23
|
||
8001030: 4770 bxgt lr
|
||
8001032: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
||
8001036: f04f 0300 mov.w r3, #0
|
||
800103a: 3a01 subs r2, #1
|
||
800103c: e737 b.n 8000eae <__aeabi_fmul+0x92>
|
||
800103e: f092 0f00 teq r2, #0
|
||
8001042: f000 4c00 and.w ip, r0, #2147483648 ; 0x80000000
|
||
8001046: bf02 ittt eq
|
||
8001048: 0040 lsleq r0, r0, #1
|
||
800104a: f410 0f00 tsteq.w r0, #8388608 ; 0x800000
|
||
800104e: 3a01 subeq r2, #1
|
||
8001050: d0f9 beq.n 8001046 <__aeabi_fdiv+0xc2>
|
||
8001052: ea40 000c orr.w r0, r0, ip
|
||
8001056: f093 0f00 teq r3, #0
|
||
800105a: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
||
800105e: bf02 ittt eq
|
||
8001060: 0049 lsleq r1, r1, #1
|
||
8001062: f411 0f00 tsteq.w r1, #8388608 ; 0x800000
|
||
8001066: 3b01 subeq r3, #1
|
||
8001068: d0f9 beq.n 800105e <__aeabi_fdiv+0xda>
|
||
800106a: ea41 010c orr.w r1, r1, ip
|
||
800106e: e795 b.n 8000f9c <__aeabi_fdiv+0x18>
|
||
8001070: ea0c 53d1 and.w r3, ip, r1, lsr #23
|
||
8001074: ea92 0f0c teq r2, ip
|
||
8001078: d108 bne.n 800108c <__aeabi_fdiv+0x108>
|
||
800107a: 0242 lsls r2, r0, #9
|
||
800107c: f47f af7d bne.w 8000f7a <__aeabi_fmul+0x15e>
|
||
8001080: ea93 0f0c teq r3, ip
|
||
8001084: f47f af70 bne.w 8000f68 <__aeabi_fmul+0x14c>
|
||
8001088: 4608 mov r0, r1
|
||
800108a: e776 b.n 8000f7a <__aeabi_fmul+0x15e>
|
||
800108c: ea93 0f0c teq r3, ip
|
||
8001090: d104 bne.n 800109c <__aeabi_fdiv+0x118>
|
||
8001092: 024b lsls r3, r1, #9
|
||
8001094: f43f af4c beq.w 8000f30 <__aeabi_fmul+0x114>
|
||
8001098: 4608 mov r0, r1
|
||
800109a: e76e b.n 8000f7a <__aeabi_fmul+0x15e>
|
||
800109c: f030 4c00 bics.w ip, r0, #2147483648 ; 0x80000000
|
||
80010a0: bf18 it ne
|
||
80010a2: f031 4c00 bicsne.w ip, r1, #2147483648 ; 0x80000000
|
||
80010a6: d1ca bne.n 800103e <__aeabi_fdiv+0xba>
|
||
80010a8: f030 4200 bics.w r2, r0, #2147483648 ; 0x80000000
|
||
80010ac: f47f af5c bne.w 8000f68 <__aeabi_fmul+0x14c>
|
||
80010b0: f031 4300 bics.w r3, r1, #2147483648 ; 0x80000000
|
||
80010b4: f47f af3c bne.w 8000f30 <__aeabi_fmul+0x114>
|
||
80010b8: e75f b.n 8000f7a <__aeabi_fmul+0x15e>
|
||
80010ba: bf00 nop
|
||
|
||
080010bc <__aeabi_f2iz>:
|
||
80010bc: ea4f 0240 mov.w r2, r0, lsl #1
|
||
80010c0: f1b2 4ffe cmp.w r2, #2130706432 ; 0x7f000000
|
||
80010c4: d30f bcc.n 80010e6 <__aeabi_f2iz+0x2a>
|
||
80010c6: f04f 039e mov.w r3, #158 ; 0x9e
|
||
80010ca: ebb3 6212 subs.w r2, r3, r2, lsr #24
|
||
80010ce: d90d bls.n 80010ec <__aeabi_f2iz+0x30>
|
||
80010d0: ea4f 2300 mov.w r3, r0, lsl #8
|
||
80010d4: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
||
80010d8: f010 4f00 tst.w r0, #2147483648 ; 0x80000000
|
||
80010dc: fa23 f002 lsr.w r0, r3, r2
|
||
80010e0: bf18 it ne
|
||
80010e2: 4240 negne r0, r0
|
||
80010e4: 4770 bx lr
|
||
80010e6: f04f 0000 mov.w r0, #0
|
||
80010ea: 4770 bx lr
|
||
80010ec: f112 0f61 cmn.w r2, #97 ; 0x61
|
||
80010f0: d101 bne.n 80010f6 <__aeabi_f2iz+0x3a>
|
||
80010f2: 0242 lsls r2, r0, #9
|
||
80010f4: d105 bne.n 8001102 <__aeabi_f2iz+0x46>
|
||
80010f6: f010 4000 ands.w r0, r0, #2147483648 ; 0x80000000
|
||
80010fa: bf08 it eq
|
||
80010fc: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000
|
||
8001100: 4770 bx lr
|
||
8001102: f04f 0000 mov.w r0, #0
|
||
8001106: 4770 bx lr
|
||
|
||
08001108 <main>:
|
||
/**
|
||
* @brief The application entry point.
|
||
* @retval int
|
||
*/
|
||
int main(void)
|
||
{
|
||
8001108: b580 push {r7, lr}
|
||
800110a: af00 add r7, sp, #0
|
||
/* USER CODE END 1 */
|
||
|
||
/* MCU Configuration--------------------------------------------------------*/
|
||
|
||
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
||
HAL_Init();
|
||
800110c: f000 fb8e bl 800182c <HAL_Init>
|
||
/* USER CODE BEGIN Init */
|
||
|
||
/* USER CODE END Init */
|
||
|
||
/* Configure the system clock */
|
||
SystemClock_Config();
|
||
8001110: f000 f809 bl 8001126 <SystemClock_Config>
|
||
/* USER CODE BEGIN SysInit */
|
||
|
||
/* USER CODE END SysInit */
|
||
|
||
/* Initialize all configured peripherals */
|
||
MX_GPIO_Init();
|
||
8001114: f000 f87a bl 800120c <MX_GPIO_Init>
|
||
MX_FSMC_Init();
|
||
8001118: f000 f93a bl 8001390 <MX_FSMC_Init>
|
||
MX_I2C2_Init();
|
||
800111c: f000 f848 bl 80011b0 <MX_I2C2_Init>
|
||
/* USER CODE BEGIN 2 */
|
||
main_app();
|
||
8001120: f004 f9cc bl 80054bc <main_app>
|
||
/* USER CODE END 2 */
|
||
|
||
/* Infinite loop */
|
||
/* USER CODE BEGIN WHILE */
|
||
while (1)
|
||
8001124: e7fe b.n 8001124 <main+0x1c>
|
||
|
||
08001126 <SystemClock_Config>:
|
||
/**
|
||
* @brief System Clock Configuration
|
||
* @retval None
|
||
*/
|
||
void SystemClock_Config(void)
|
||
{
|
||
8001126: b580 push {r7, lr}
|
||
8001128: b090 sub sp, #64 ; 0x40
|
||
800112a: af00 add r7, sp, #0
|
||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||
800112c: f107 0318 add.w r3, r7, #24
|
||
8001130: 2228 movs r2, #40 ; 0x28
|
||
8001132: 2100 movs r1, #0
|
||
8001134: 4618 mov r0, r3
|
||
8001136: f004 fd2b bl 8005b90 <memset>
|
||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||
800113a: 1d3b adds r3, r7, #4
|
||
800113c: 2200 movs r2, #0
|
||
800113e: 601a str r2, [r3, #0]
|
||
8001140: 605a str r2, [r3, #4]
|
||
8001142: 609a str r2, [r3, #8]
|
||
8001144: 60da str r2, [r3, #12]
|
||
8001146: 611a str r2, [r3, #16]
|
||
|
||
/** Initializes the RCC Oscillators according to the specified parameters
|
||
* in the RCC_OscInitTypeDef structure.
|
||
*/
|
||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||
8001148: 2301 movs r3, #1
|
||
800114a: 61bb str r3, [r7, #24]
|
||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||
800114c: f44f 3380 mov.w r3, #65536 ; 0x10000
|
||
8001150: 61fb str r3, [r7, #28]
|
||
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
|
||
8001152: 2300 movs r3, #0
|
||
8001154: 623b str r3, [r7, #32]
|
||
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||
8001156: 2301 movs r3, #1
|
||
8001158: 62bb str r3, [r7, #40] ; 0x28
|
||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||
800115a: 2302 movs r3, #2
|
||
800115c: 637b str r3, [r7, #52] ; 0x34
|
||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||
800115e: f44f 3380 mov.w r3, #65536 ; 0x10000
|
||
8001162: 63bb str r3, [r7, #56] ; 0x38
|
||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
|
||
8001164: f44f 13e0 mov.w r3, #1835008 ; 0x1c0000
|
||
8001168: 63fb str r3, [r7, #60] ; 0x3c
|
||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||
800116a: f107 0318 add.w r3, r7, #24
|
||
800116e: 4618 mov r0, r3
|
||
8001170: f001 fe8a bl 8002e88 <HAL_RCC_OscConfig>
|
||
8001174: 4603 mov r3, r0
|
||
8001176: 2b00 cmp r3, #0
|
||
8001178: d001 beq.n 800117e <SystemClock_Config+0x58>
|
||
{
|
||
Error_Handler();
|
||
800117a: f000 f96d bl 8001458 <Error_Handler>
|
||
}
|
||
/** Initializes the CPU, AHB and APB buses clocks
|
||
*/
|
||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||
800117e: 230f movs r3, #15
|
||
8001180: 607b str r3, [r7, #4]
|
||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||
8001182: 2302 movs r3, #2
|
||
8001184: 60bb str r3, [r7, #8]
|
||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||
8001186: 2300 movs r3, #0
|
||
8001188: 60fb str r3, [r7, #12]
|
||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
||
800118a: f44f 6380 mov.w r3, #1024 ; 0x400
|
||
800118e: 613b str r3, [r7, #16]
|
||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||
8001190: 2300 movs r3, #0
|
||
8001192: 617b str r3, [r7, #20]
|
||
|
||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
|
||
8001194: 1d3b adds r3, r7, #4
|
||
8001196: 2102 movs r1, #2
|
||
8001198: 4618 mov r0, r3
|
||
800119a: f002 f8f5 bl 8003388 <HAL_RCC_ClockConfig>
|
||
800119e: 4603 mov r3, r0
|
||
80011a0: 2b00 cmp r3, #0
|
||
80011a2: d001 beq.n 80011a8 <SystemClock_Config+0x82>
|
||
{
|
||
Error_Handler();
|
||
80011a4: f000 f958 bl 8001458 <Error_Handler>
|
||
}
|
||
}
|
||
80011a8: bf00 nop
|
||
80011aa: 3740 adds r7, #64 ; 0x40
|
||
80011ac: 46bd mov sp, r7
|
||
80011ae: bd80 pop {r7, pc}
|
||
|
||
080011b0 <MX_I2C2_Init>:
|
||
* @brief I2C2 Initialization Function
|
||
* @param None
|
||
* @retval None
|
||
*/
|
||
static void MX_I2C2_Init(void)
|
||
{
|
||
80011b0: b580 push {r7, lr}
|
||
80011b2: af00 add r7, sp, #0
|
||
/* USER CODE END I2C2_Init 0 */
|
||
|
||
/* USER CODE BEGIN I2C2_Init 1 */
|
||
|
||
/* USER CODE END I2C2_Init 1 */
|
||
hi2c2.Instance = I2C2;
|
||
80011b4: 4b12 ldr r3, [pc, #72] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011b6: 4a13 ldr r2, [pc, #76] ; (8001204 <MX_I2C2_Init+0x54>)
|
||
80011b8: 601a str r2, [r3, #0]
|
||
hi2c2.Init.ClockSpeed = 100000;
|
||
80011ba: 4b11 ldr r3, [pc, #68] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011bc: 4a12 ldr r2, [pc, #72] ; (8001208 <MX_I2C2_Init+0x58>)
|
||
80011be: 605a str r2, [r3, #4]
|
||
hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
|
||
80011c0: 4b0f ldr r3, [pc, #60] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011c2: 2200 movs r2, #0
|
||
80011c4: 609a str r2, [r3, #8]
|
||
hi2c2.Init.OwnAddress1 = 0;
|
||
80011c6: 4b0e ldr r3, [pc, #56] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011c8: 2200 movs r2, #0
|
||
80011ca: 60da str r2, [r3, #12]
|
||
hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
||
80011cc: 4b0c ldr r3, [pc, #48] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011ce: f44f 4280 mov.w r2, #16384 ; 0x4000
|
||
80011d2: 611a str r2, [r3, #16]
|
||
hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
|
||
80011d4: 4b0a ldr r3, [pc, #40] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011d6: 2200 movs r2, #0
|
||
80011d8: 615a str r2, [r3, #20]
|
||
hi2c2.Init.OwnAddress2 = 0;
|
||
80011da: 4b09 ldr r3, [pc, #36] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011dc: 2200 movs r2, #0
|
||
80011de: 619a str r2, [r3, #24]
|
||
hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
|
||
80011e0: 4b07 ldr r3, [pc, #28] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011e2: 2200 movs r2, #0
|
||
80011e4: 61da str r2, [r3, #28]
|
||
hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
||
80011e6: 4b06 ldr r3, [pc, #24] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011e8: 2200 movs r2, #0
|
||
80011ea: 621a str r2, [r3, #32]
|
||
if (HAL_I2C_Init(&hi2c2) != HAL_OK)
|
||
80011ec: 4804 ldr r0, [pc, #16] ; (8001200 <MX_I2C2_Init+0x50>)
|
||
80011ee: f000 fe4b bl 8001e88 <HAL_I2C_Init>
|
||
80011f2: 4603 mov r3, r0
|
||
80011f4: 2b00 cmp r3, #0
|
||
80011f6: d001 beq.n 80011fc <MX_I2C2_Init+0x4c>
|
||
{
|
||
Error_Handler();
|
||
80011f8: f000 f92e bl 8001458 <Error_Handler>
|
||
}
|
||
/* USER CODE BEGIN I2C2_Init 2 */
|
||
|
||
/* USER CODE END I2C2_Init 2 */
|
||
|
||
}
|
||
80011fc: bf00 nop
|
||
80011fe: bd80 pop {r7, pc}
|
||
8001200: 20000208 .word 0x20000208
|
||
8001204: 40005800 .word 0x40005800
|
||
8001208: 000186a0 .word 0x000186a0
|
||
|
||
0800120c <MX_GPIO_Init>:
|
||
* @brief GPIO Initialization Function
|
||
* @param None
|
||
* @retval None
|
||
*/
|
||
static void MX_GPIO_Init(void)
|
||
{
|
||
800120c: b580 push {r7, lr}
|
||
800120e: b08a sub sp, #40 ; 0x28
|
||
8001210: af00 add r7, sp, #0
|
||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||
8001212: f107 0318 add.w r3, r7, #24
|
||
8001216: 2200 movs r2, #0
|
||
8001218: 601a str r2, [r3, #0]
|
||
800121a: 605a str r2, [r3, #4]
|
||
800121c: 609a str r2, [r3, #8]
|
||
800121e: 60da str r2, [r3, #12]
|
||
|
||
/* GPIO Ports Clock Enable */
|
||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||
8001220: 4b58 ldr r3, [pc, #352] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
8001222: 699b ldr r3, [r3, #24]
|
||
8001224: 4a57 ldr r2, [pc, #348] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
8001226: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
800122a: 6193 str r3, [r2, #24]
|
||
800122c: 4b55 ldr r3, [pc, #340] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
800122e: 699b ldr r3, [r3, #24]
|
||
8001230: f003 0380 and.w r3, r3, #128 ; 0x80
|
||
8001234: 617b str r3, [r7, #20]
|
||
8001236: 697b ldr r3, [r7, #20]
|
||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||
8001238: 4b52 ldr r3, [pc, #328] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
800123a: 699b ldr r3, [r3, #24]
|
||
800123c: 4a51 ldr r2, [pc, #324] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
800123e: f043 0308 orr.w r3, r3, #8
|
||
8001242: 6193 str r3, [r2, #24]
|
||
8001244: 4b4f ldr r3, [pc, #316] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
8001246: 699b ldr r3, [r3, #24]
|
||
8001248: f003 0308 and.w r3, r3, #8
|
||
800124c: 613b str r3, [r7, #16]
|
||
800124e: 693b ldr r3, [r7, #16]
|
||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||
8001250: 4b4c ldr r3, [pc, #304] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
8001252: 699b ldr r3, [r3, #24]
|
||
8001254: 4a4b ldr r2, [pc, #300] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
8001256: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
800125a: 6193 str r3, [r2, #24]
|
||
800125c: 4b49 ldr r3, [pc, #292] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
800125e: 699b ldr r3, [r3, #24]
|
||
8001260: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8001264: 60fb str r3, [r7, #12]
|
||
8001266: 68fb ldr r3, [r7, #12]
|
||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||
8001268: 4b46 ldr r3, [pc, #280] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
800126a: 699b ldr r3, [r3, #24]
|
||
800126c: 4a45 ldr r2, [pc, #276] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
800126e: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8001272: 6193 str r3, [r2, #24]
|
||
8001274: 4b43 ldr r3, [pc, #268] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
8001276: 699b ldr r3, [r3, #24]
|
||
8001278: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
800127c: 60bb str r3, [r7, #8]
|
||
800127e: 68bb ldr r3, [r7, #8]
|
||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||
8001280: 4b40 ldr r3, [pc, #256] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
8001282: 699b ldr r3, [r3, #24]
|
||
8001284: 4a3f ldr r2, [pc, #252] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
8001286: f043 0320 orr.w r3, r3, #32
|
||
800128a: 6193 str r3, [r2, #24]
|
||
800128c: 4b3d ldr r3, [pc, #244] ; (8001384 <MX_GPIO_Init+0x178>)
|
||
800128e: 699b ldr r3, [r3, #24]
|
||
8001290: f003 0320 and.w r3, r3, #32
|
||
8001294: 607b str r3, [r7, #4]
|
||
8001296: 687b ldr r3, [r7, #4]
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(TDIN_GPIO_Port, TDIN_Pin, GPIO_PIN_SET);
|
||
8001298: 2201 movs r2, #1
|
||
800129a: f44f 7100 mov.w r1, #512 ; 0x200
|
||
800129e: 483a ldr r0, [pc, #232] ; (8001388 <MX_GPIO_Init+0x17c>)
|
||
80012a0: f000 fdd9 bl 8001e56 <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(LCD_BL_GPIO_Port, LCD_BL_Pin, GPIO_PIN_RESET);
|
||
80012a4: 2200 movs r2, #0
|
||
80012a6: 2101 movs r1, #1
|
||
80012a8: 4838 ldr r0, [pc, #224] ; (800138c <MX_GPIO_Init+0x180>)
|
||
80012aa: f000 fdd4 bl 8001e56 <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pin Output Level */
|
||
HAL_GPIO_WritePin(GPIOB, TCLK_Pin|TCS_Pin|MAX_IRD_Pin|MAX_RD_Pin, GPIO_PIN_SET);
|
||
80012ae: 2201 movs r2, #1
|
||
80012b0: f245 0106 movw r1, #20486 ; 0x5006
|
||
80012b4: 4835 ldr r0, [pc, #212] ; (800138c <MX_GPIO_Init+0x180>)
|
||
80012b6: f000 fdce bl 8001e56 <HAL_GPIO_WritePin>
|
||
|
||
/*Configure GPIO pin : TDOUT_Pin */
|
||
GPIO_InitStruct.Pin = TDOUT_Pin;
|
||
80012ba: f44f 7380 mov.w r3, #256 ; 0x100
|
||
80012be: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||
80012c0: 2300 movs r3, #0
|
||
80012c2: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
80012c4: 2300 movs r3, #0
|
||
80012c6: 623b str r3, [r7, #32]
|
||
HAL_GPIO_Init(TDOUT_GPIO_Port, &GPIO_InitStruct);
|
||
80012c8: f107 0318 add.w r3, r7, #24
|
||
80012cc: 4619 mov r1, r3
|
||
80012ce: 482e ldr r0, [pc, #184] ; (8001388 <MX_GPIO_Init+0x17c>)
|
||
80012d0: f000 fc16 bl 8001b00 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : TDIN_Pin */
|
||
GPIO_InitStruct.Pin = TDIN_Pin;
|
||
80012d4: f44f 7300 mov.w r3, #512 ; 0x200
|
||
80012d8: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
80012da: 2301 movs r3, #1
|
||
80012dc: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
80012de: 2300 movs r3, #0
|
||
80012e0: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
80012e2: 2303 movs r3, #3
|
||
80012e4: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(TDIN_GPIO_Port, &GPIO_InitStruct);
|
||
80012e6: f107 0318 add.w r3, r7, #24
|
||
80012ea: 4619 mov r1, r3
|
||
80012ec: 4826 ldr r0, [pc, #152] ; (8001388 <MX_GPIO_Init+0x17c>)
|
||
80012ee: f000 fc07 bl 8001b00 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : TPEN_Pin */
|
||
GPIO_InitStruct.Pin = TPEN_Pin;
|
||
80012f2: f44f 6380 mov.w r3, #1024 ; 0x400
|
||
80012f6: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||
80012f8: 2300 movs r3, #0
|
||
80012fa: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||
80012fc: 2301 movs r3, #1
|
||
80012fe: 623b str r3, [r7, #32]
|
||
HAL_GPIO_Init(TPEN_GPIO_Port, &GPIO_InitStruct);
|
||
8001300: f107 0318 add.w r3, r7, #24
|
||
8001304: 4619 mov r1, r3
|
||
8001306: 4820 ldr r0, [pc, #128] ; (8001388 <MX_GPIO_Init+0x17c>)
|
||
8001308: f000 fbfa bl 8001b00 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : LCD_BL_Pin */
|
||
GPIO_InitStruct.Pin = LCD_BL_Pin;
|
||
800130c: 2301 movs r3, #1
|
||
800130e: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
8001310: 2301 movs r3, #1
|
||
8001312: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
8001314: 2300 movs r3, #0
|
||
8001316: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||
8001318: 2302 movs r3, #2
|
||
800131a: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(LCD_BL_GPIO_Port, &GPIO_InitStruct);
|
||
800131c: f107 0318 add.w r3, r7, #24
|
||
8001320: 4619 mov r1, r3
|
||
8001322: 481a ldr r0, [pc, #104] ; (800138c <MX_GPIO_Init+0x180>)
|
||
8001324: f000 fbec bl 8001b00 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pins : TCLK_Pin TCS_Pin */
|
||
GPIO_InitStruct.Pin = TCLK_Pin|TCS_Pin;
|
||
8001328: 2306 movs r3, #6
|
||
800132a: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
800132c: 2301 movs r3, #1
|
||
800132e: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
8001330: 2300 movs r3, #0
|
||
8001332: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8001334: 2303 movs r3, #3
|
||
8001336: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
8001338: f107 0318 add.w r3, r7, #24
|
||
800133c: 4619 mov r1, r3
|
||
800133e: 4813 ldr r0, [pc, #76] ; (800138c <MX_GPIO_Init+0x180>)
|
||
8001340: f000 fbde bl 8001b00 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pins : MAX_IRD_Pin MAX_RD_Pin */
|
||
GPIO_InitStruct.Pin = MAX_IRD_Pin|MAX_RD_Pin;
|
||
8001344: f44f 43a0 mov.w r3, #20480 ; 0x5000
|
||
8001348: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||
800134a: 2301 movs r3, #1
|
||
800134c: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||
800134e: 2301 movs r3, #1
|
||
8001350: 623b str r3, [r7, #32]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
8001352: 2303 movs r3, #3
|
||
8001354: 627b str r3, [r7, #36] ; 0x24
|
||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
8001356: f107 0318 add.w r3, r7, #24
|
||
800135a: 4619 mov r1, r3
|
||
800135c: 480b ldr r0, [pc, #44] ; (800138c <MX_GPIO_Init+0x180>)
|
||
800135e: f000 fbcf bl 8001b00 <HAL_GPIO_Init>
|
||
|
||
/*Configure GPIO pin : MAX_INT_Pin */
|
||
GPIO_InitStruct.Pin = MAX_INT_Pin;
|
||
8001362: f44f 5300 mov.w r3, #8192 ; 0x2000
|
||
8001366: 61bb str r3, [r7, #24]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||
8001368: 2300 movs r3, #0
|
||
800136a: 61fb str r3, [r7, #28]
|
||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||
800136c: 2300 movs r3, #0
|
||
800136e: 623b str r3, [r7, #32]
|
||
HAL_GPIO_Init(MAX_INT_GPIO_Port, &GPIO_InitStruct);
|
||
8001370: f107 0318 add.w r3, r7, #24
|
||
8001374: 4619 mov r1, r3
|
||
8001376: 4805 ldr r0, [pc, #20] ; (800138c <MX_GPIO_Init+0x180>)
|
||
8001378: f000 fbc2 bl 8001b00 <HAL_GPIO_Init>
|
||
|
||
}
|
||
800137c: bf00 nop
|
||
800137e: 3728 adds r7, #40 ; 0x28
|
||
8001380: 46bd mov sp, r7
|
||
8001382: bd80 pop {r7, pc}
|
||
8001384: 40021000 .word 0x40021000
|
||
8001388: 40011c00 .word 0x40011c00
|
||
800138c: 40010c00 .word 0x40010c00
|
||
|
||
08001390 <MX_FSMC_Init>:
|
||
|
||
/* FSMC initialization function */
|
||
static void MX_FSMC_Init(void)
|
||
{
|
||
8001390: b580 push {r7, lr}
|
||
8001392: b088 sub sp, #32
|
||
8001394: af00 add r7, sp, #0
|
||
|
||
/* USER CODE BEGIN FSMC_Init 0 */
|
||
|
||
/* USER CODE END FSMC_Init 0 */
|
||
|
||
FSMC_NORSRAM_TimingTypeDef Timing = {0};
|
||
8001396: 1d3b adds r3, r7, #4
|
||
8001398: 2200 movs r2, #0
|
||
800139a: 601a str r2, [r3, #0]
|
||
800139c: 605a str r2, [r3, #4]
|
||
800139e: 609a str r2, [r3, #8]
|
||
80013a0: 60da str r2, [r3, #12]
|
||
80013a2: 611a str r2, [r3, #16]
|
||
80013a4: 615a str r2, [r3, #20]
|
||
80013a6: 619a str r2, [r3, #24]
|
||
|
||
/* USER CODE END FSMC_Init 1 */
|
||
|
||
/** Perform the SRAM1 memory initialization sequence
|
||
*/
|
||
hsram1.Instance = FSMC_NORSRAM_DEVICE;
|
||
80013a8: 4b28 ldr r3, [pc, #160] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
80013aa: f04f 4220 mov.w r2, #2684354560 ; 0xa0000000
|
||
80013ae: 601a str r2, [r3, #0]
|
||
hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
|
||
80013b0: 4b26 ldr r3, [pc, #152] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
80013b2: 4a27 ldr r2, [pc, #156] ; (8001450 <MX_FSMC_Init+0xc0>)
|
||
80013b4: 605a str r2, [r3, #4]
|
||
/* hsram1.Init */
|
||
hsram1.Init.NSBank = FSMC_NORSRAM_BANK4;
|
||
80013b6: 4b25 ldr r3, [pc, #148] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
80013b8: 2206 movs r2, #6
|
||
80013ba: 609a str r2, [r3, #8]
|
||
hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
|
||
80013bc: 4b23 ldr r3, [pc, #140] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
80013be: 2200 movs r2, #0
|
||
80013c0: 60da str r2, [r3, #12]
|
||
hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
|
||
80013c2: 4b22 ldr r3, [pc, #136] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
80013c4: 2200 movs r2, #0
|
||
80013c6: 611a str r2, [r3, #16]
|
||
hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
|
||
80013c8: 4b20 ldr r3, [pc, #128] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
80013ca: 2210 movs r2, #16
|
||
80013cc: 615a str r2, [r3, #20]
|
||
hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
|
||
80013ce: 4b1f ldr r3, [pc, #124] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
80013d0: 2200 movs r2, #0
|
||
80013d2: 619a str r2, [r3, #24]
|
||
hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
|
||
80013d4: 4b1d ldr r3, [pc, #116] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
80013d6: 2200 movs r2, #0
|
||
80013d8: 61da str r2, [r3, #28]
|
||
hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
|
||
80013da: 4b1c ldr r3, [pc, #112] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
80013dc: 2200 movs r2, #0
|
||
80013de: 621a str r2, [r3, #32]
|
||
hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
|
||
80013e0: 4b1a ldr r3, [pc, #104] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
80013e2: 2200 movs r2, #0
|
||
80013e4: 625a str r2, [r3, #36] ; 0x24
|
||
hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
|
||
80013e6: 4b19 ldr r3, [pc, #100] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
80013e8: f44f 5280 mov.w r2, #4096 ; 0x1000
|
||
80013ec: 629a str r2, [r3, #40] ; 0x28
|
||
hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
|
||
80013ee: 4b17 ldr r3, [pc, #92] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
80013f0: 2200 movs r2, #0
|
||
80013f2: 62da str r2, [r3, #44] ; 0x2c
|
||
hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
|
||
80013f4: 4b15 ldr r3, [pc, #84] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
80013f6: 2200 movs r2, #0
|
||
80013f8: 631a str r2, [r3, #48] ; 0x30
|
||
hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
|
||
80013fa: 4b14 ldr r3, [pc, #80] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
80013fc: 2200 movs r2, #0
|
||
80013fe: 635a str r2, [r3, #52] ; 0x34
|
||
hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
|
||
8001400: 4b12 ldr r3, [pc, #72] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
8001402: 2200 movs r2, #0
|
||
8001404: 639a str r2, [r3, #56] ; 0x38
|
||
/* Timing */
|
||
Timing.AddressSetupTime = 0;
|
||
8001406: 2300 movs r3, #0
|
||
8001408: 607b str r3, [r7, #4]
|
||
Timing.AddressHoldTime = 15;
|
||
800140a: 230f movs r3, #15
|
||
800140c: 60bb str r3, [r7, #8]
|
||
Timing.DataSetupTime = 1;
|
||
800140e: 2301 movs r3, #1
|
||
8001410: 60fb str r3, [r7, #12]
|
||
Timing.BusTurnAroundDuration = 0;
|
||
8001412: 2300 movs r3, #0
|
||
8001414: 613b str r3, [r7, #16]
|
||
Timing.CLKDivision = 16;
|
||
8001416: 2310 movs r3, #16
|
||
8001418: 617b str r3, [r7, #20]
|
||
Timing.DataLatency = 17;
|
||
800141a: 2311 movs r3, #17
|
||
800141c: 61bb str r3, [r7, #24]
|
||
Timing.AccessMode = FSMC_ACCESS_MODE_A;
|
||
800141e: 2300 movs r3, #0
|
||
8001420: 61fb str r3, [r7, #28]
|
||
/* ExtTiming */
|
||
|
||
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
|
||
8001422: 1d3b adds r3, r7, #4
|
||
8001424: 2200 movs r2, #0
|
||
8001426: 4619 mov r1, r3
|
||
8001428: 4808 ldr r0, [pc, #32] ; (800144c <MX_FSMC_Init+0xbc>)
|
||
800142a: f002 f933 bl 8003694 <HAL_SRAM_Init>
|
||
800142e: 4603 mov r3, r0
|
||
8001430: 2b00 cmp r3, #0
|
||
8001432: d001 beq.n 8001438 <MX_FSMC_Init+0xa8>
|
||
{
|
||
Error_Handler( );
|
||
8001434: f000 f810 bl 8001458 <Error_Handler>
|
||
}
|
||
|
||
/** Disconnect NADV
|
||
*/
|
||
|
||
__HAL_AFIO_FSMCNADV_DISCONNECTED();
|
||
8001438: 4b06 ldr r3, [pc, #24] ; (8001454 <MX_FSMC_Init+0xc4>)
|
||
800143a: 69db ldr r3, [r3, #28]
|
||
800143c: 4a05 ldr r2, [pc, #20] ; (8001454 <MX_FSMC_Init+0xc4>)
|
||
800143e: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
||
8001442: 61d3 str r3, [r2, #28]
|
||
|
||
/* USER CODE BEGIN FSMC_Init 2 */
|
||
|
||
/* USER CODE END FSMC_Init 2 */
|
||
}
|
||
8001444: bf00 nop
|
||
8001446: 3720 adds r7, #32
|
||
8001448: 46bd mov sp, r7
|
||
800144a: bd80 pop {r7, pc}
|
||
800144c: 2000025c .word 0x2000025c
|
||
8001450: a0000104 .word 0xa0000104
|
||
8001454: 40010000 .word 0x40010000
|
||
|
||
08001458 <Error_Handler>:
|
||
/**
|
||
* @brief This function is executed in case of error occurrence.
|
||
* @retval None
|
||
*/
|
||
void Error_Handler(void)
|
||
{
|
||
8001458: b480 push {r7}
|
||
800145a: af00 add r7, sp, #0
|
||
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
||
Can only be executed in Privileged modes.
|
||
*/
|
||
__STATIC_FORCEINLINE void __disable_irq(void)
|
||
{
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
800145c: b672 cpsid i
|
||
}
|
||
800145e: bf00 nop
|
||
/* USER CODE BEGIN Error_Handler_Debug */
|
||
/* User can add his own implementation to report the HAL error return state */
|
||
__disable_irq();
|
||
while (1)
|
||
8001460: e7fe b.n 8001460 <Error_Handler+0x8>
|
||
...
|
||
|
||
08001464 <HAL_MspInit>:
|
||
/* USER CODE END 0 */
|
||
/**
|
||
* Initializes the Global MSP.
|
||
*/
|
||
void HAL_MspInit(void)
|
||
{
|
||
8001464: b480 push {r7}
|
||
8001466: b085 sub sp, #20
|
||
8001468: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN MspInit 0 */
|
||
|
||
/* USER CODE END MspInit 0 */
|
||
|
||
__HAL_RCC_AFIO_CLK_ENABLE();
|
||
800146a: 4b15 ldr r3, [pc, #84] ; (80014c0 <HAL_MspInit+0x5c>)
|
||
800146c: 699b ldr r3, [r3, #24]
|
||
800146e: 4a14 ldr r2, [pc, #80] ; (80014c0 <HAL_MspInit+0x5c>)
|
||
8001470: f043 0301 orr.w r3, r3, #1
|
||
8001474: 6193 str r3, [r2, #24]
|
||
8001476: 4b12 ldr r3, [pc, #72] ; (80014c0 <HAL_MspInit+0x5c>)
|
||
8001478: 699b ldr r3, [r3, #24]
|
||
800147a: f003 0301 and.w r3, r3, #1
|
||
800147e: 60bb str r3, [r7, #8]
|
||
8001480: 68bb ldr r3, [r7, #8]
|
||
__HAL_RCC_PWR_CLK_ENABLE();
|
||
8001482: 4b0f ldr r3, [pc, #60] ; (80014c0 <HAL_MspInit+0x5c>)
|
||
8001484: 69db ldr r3, [r3, #28]
|
||
8001486: 4a0e ldr r2, [pc, #56] ; (80014c0 <HAL_MspInit+0x5c>)
|
||
8001488: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
||
800148c: 61d3 str r3, [r2, #28]
|
||
800148e: 4b0c ldr r3, [pc, #48] ; (80014c0 <HAL_MspInit+0x5c>)
|
||
8001490: 69db ldr r3, [r3, #28]
|
||
8001492: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
8001496: 607b str r3, [r7, #4]
|
||
8001498: 687b ldr r3, [r7, #4]
|
||
|
||
/* System interrupt init*/
|
||
|
||
/** DISABLE: JTAG-DP Disabled and SW-DP Disabled
|
||
*/
|
||
__HAL_AFIO_REMAP_SWJ_DISABLE();
|
||
800149a: 4b0a ldr r3, [pc, #40] ; (80014c4 <HAL_MspInit+0x60>)
|
||
800149c: 685b ldr r3, [r3, #4]
|
||
800149e: 60fb str r3, [r7, #12]
|
||
80014a0: 68fb ldr r3, [r7, #12]
|
||
80014a2: f023 63e0 bic.w r3, r3, #117440512 ; 0x7000000
|
||
80014a6: 60fb str r3, [r7, #12]
|
||
80014a8: 68fb ldr r3, [r7, #12]
|
||
80014aa: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000
|
||
80014ae: 60fb str r3, [r7, #12]
|
||
80014b0: 4a04 ldr r2, [pc, #16] ; (80014c4 <HAL_MspInit+0x60>)
|
||
80014b2: 68fb ldr r3, [r7, #12]
|
||
80014b4: 6053 str r3, [r2, #4]
|
||
|
||
/* USER CODE BEGIN MspInit 1 */
|
||
|
||
/* USER CODE END MspInit 1 */
|
||
}
|
||
80014b6: bf00 nop
|
||
80014b8: 3714 adds r7, #20
|
||
80014ba: 46bd mov sp, r7
|
||
80014bc: bc80 pop {r7}
|
||
80014be: 4770 bx lr
|
||
80014c0: 40021000 .word 0x40021000
|
||
80014c4: 40010000 .word 0x40010000
|
||
|
||
080014c8 <HAL_I2C_MspInit>:
|
||
* This function configures the hardware resources used in this example
|
||
* @param hi2c: I2C handle pointer
|
||
* @retval None
|
||
*/
|
||
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
|
||
{
|
||
80014c8: b580 push {r7, lr}
|
||
80014ca: b088 sub sp, #32
|
||
80014cc: af00 add r7, sp, #0
|
||
80014ce: 6078 str r0, [r7, #4]
|
||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||
80014d0: f107 0310 add.w r3, r7, #16
|
||
80014d4: 2200 movs r2, #0
|
||
80014d6: 601a str r2, [r3, #0]
|
||
80014d8: 605a str r2, [r3, #4]
|
||
80014da: 609a str r2, [r3, #8]
|
||
80014dc: 60da str r2, [r3, #12]
|
||
if(hi2c->Instance==I2C2)
|
||
80014de: 687b ldr r3, [r7, #4]
|
||
80014e0: 681b ldr r3, [r3, #0]
|
||
80014e2: 4a16 ldr r2, [pc, #88] ; (800153c <HAL_I2C_MspInit+0x74>)
|
||
80014e4: 4293 cmp r3, r2
|
||
80014e6: d124 bne.n 8001532 <HAL_I2C_MspInit+0x6a>
|
||
{
|
||
/* USER CODE BEGIN I2C2_MspInit 0 */
|
||
|
||
/* USER CODE END I2C2_MspInit 0 */
|
||
|
||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||
80014e8: 4b15 ldr r3, [pc, #84] ; (8001540 <HAL_I2C_MspInit+0x78>)
|
||
80014ea: 699b ldr r3, [r3, #24]
|
||
80014ec: 4a14 ldr r2, [pc, #80] ; (8001540 <HAL_I2C_MspInit+0x78>)
|
||
80014ee: f043 0308 orr.w r3, r3, #8
|
||
80014f2: 6193 str r3, [r2, #24]
|
||
80014f4: 4b12 ldr r3, [pc, #72] ; (8001540 <HAL_I2C_MspInit+0x78>)
|
||
80014f6: 699b ldr r3, [r3, #24]
|
||
80014f8: f003 0308 and.w r3, r3, #8
|
||
80014fc: 60fb str r3, [r7, #12]
|
||
80014fe: 68fb ldr r3, [r7, #12]
|
||
/**I2C2 GPIO Configuration
|
||
PB10 ------> I2C2_SCL
|
||
PB11 ------> I2C2_SDA
|
||
*/
|
||
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
|
||
8001500: f44f 6340 mov.w r3, #3072 ; 0xc00
|
||
8001504: 613b str r3, [r7, #16]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
|
||
8001506: 2312 movs r3, #18
|
||
8001508: 617b str r3, [r7, #20]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
800150a: 2303 movs r3, #3
|
||
800150c: 61fb str r3, [r7, #28]
|
||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||
800150e: f107 0310 add.w r3, r7, #16
|
||
8001512: 4619 mov r1, r3
|
||
8001514: 480b ldr r0, [pc, #44] ; (8001544 <HAL_I2C_MspInit+0x7c>)
|
||
8001516: f000 faf3 bl 8001b00 <HAL_GPIO_Init>
|
||
|
||
/* Peripheral clock enable */
|
||
__HAL_RCC_I2C2_CLK_ENABLE();
|
||
800151a: 4b09 ldr r3, [pc, #36] ; (8001540 <HAL_I2C_MspInit+0x78>)
|
||
800151c: 69db ldr r3, [r3, #28]
|
||
800151e: 4a08 ldr r2, [pc, #32] ; (8001540 <HAL_I2C_MspInit+0x78>)
|
||
8001520: f443 0380 orr.w r3, r3, #4194304 ; 0x400000
|
||
8001524: 61d3 str r3, [r2, #28]
|
||
8001526: 4b06 ldr r3, [pc, #24] ; (8001540 <HAL_I2C_MspInit+0x78>)
|
||
8001528: 69db ldr r3, [r3, #28]
|
||
800152a: f403 0380 and.w r3, r3, #4194304 ; 0x400000
|
||
800152e: 60bb str r3, [r7, #8]
|
||
8001530: 68bb ldr r3, [r7, #8]
|
||
/* USER CODE BEGIN I2C2_MspInit 1 */
|
||
|
||
/* USER CODE END I2C2_MspInit 1 */
|
||
}
|
||
|
||
}
|
||
8001532: bf00 nop
|
||
8001534: 3720 adds r7, #32
|
||
8001536: 46bd mov sp, r7
|
||
8001538: bd80 pop {r7, pc}
|
||
800153a: bf00 nop
|
||
800153c: 40005800 .word 0x40005800
|
||
8001540: 40021000 .word 0x40021000
|
||
8001544: 40010c00 .word 0x40010c00
|
||
|
||
08001548 <HAL_FSMC_MspInit>:
|
||
|
||
}
|
||
|
||
static uint32_t FSMC_Initialized = 0;
|
||
|
||
static void HAL_FSMC_MspInit(void){
|
||
8001548: b580 push {r7, lr}
|
||
800154a: b086 sub sp, #24
|
||
800154c: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN FSMC_MspInit 0 */
|
||
|
||
/* USER CODE END FSMC_MspInit 0 */
|
||
GPIO_InitTypeDef GPIO_InitStruct ={0};
|
||
800154e: f107 0308 add.w r3, r7, #8
|
||
8001552: 2200 movs r2, #0
|
||
8001554: 601a str r2, [r3, #0]
|
||
8001556: 605a str r2, [r3, #4]
|
||
8001558: 609a str r2, [r3, #8]
|
||
800155a: 60da str r2, [r3, #12]
|
||
if (FSMC_Initialized) {
|
||
800155c: 4b1f ldr r3, [pc, #124] ; (80015dc <HAL_FSMC_MspInit+0x94>)
|
||
800155e: 681b ldr r3, [r3, #0]
|
||
8001560: 2b00 cmp r3, #0
|
||
8001562: d136 bne.n 80015d2 <HAL_FSMC_MspInit+0x8a>
|
||
return;
|
||
}
|
||
FSMC_Initialized = 1;
|
||
8001564: 4b1d ldr r3, [pc, #116] ; (80015dc <HAL_FSMC_MspInit+0x94>)
|
||
8001566: 2201 movs r2, #1
|
||
8001568: 601a str r2, [r3, #0]
|
||
|
||
/* Peripheral clock enable */
|
||
__HAL_RCC_FSMC_CLK_ENABLE();
|
||
800156a: 4b1d ldr r3, [pc, #116] ; (80015e0 <HAL_FSMC_MspInit+0x98>)
|
||
800156c: 695b ldr r3, [r3, #20]
|
||
800156e: 4a1c ldr r2, [pc, #112] ; (80015e0 <HAL_FSMC_MspInit+0x98>)
|
||
8001570: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
8001574: 6153 str r3, [r2, #20]
|
||
8001576: 4b1a ldr r3, [pc, #104] ; (80015e0 <HAL_FSMC_MspInit+0x98>)
|
||
8001578: 695b ldr r3, [r3, #20]
|
||
800157a: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
800157e: 607b str r3, [r7, #4]
|
||
8001580: 687b ldr r3, [r7, #4]
|
||
PD1 ------> FSMC_D3
|
||
PD4 ------> FSMC_NOE
|
||
PD5 ------> FSMC_NWE
|
||
PG12 ------> FSMC_NE4
|
||
*/
|
||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_12;
|
||
8001582: f241 0301 movw r3, #4097 ; 0x1001
|
||
8001586: 60bb str r3, [r7, #8]
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
8001588: 2302 movs r3, #2
|
||
800158a: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
800158c: 2303 movs r3, #3
|
||
800158e: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||
8001590: f107 0308 add.w r3, r7, #8
|
||
8001594: 4619 mov r1, r3
|
||
8001596: 4813 ldr r0, [pc, #76] ; (80015e4 <HAL_FSMC_MspInit+0x9c>)
|
||
8001598: f000 fab2 bl 8001b00 <HAL_GPIO_Init>
|
||
|
||
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
|
||
800159c: f64f 7380 movw r3, #65408 ; 0xff80
|
||
80015a0: 60bb str r3, [r7, #8]
|
||
|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
|
||
|GPIO_PIN_15;
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
80015a2: 2302 movs r3, #2
|
||
80015a4: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
80015a6: 2303 movs r3, #3
|
||
80015a8: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||
80015aa: f107 0308 add.w r3, r7, #8
|
||
80015ae: 4619 mov r1, r3
|
||
80015b0: 480d ldr r0, [pc, #52] ; (80015e8 <HAL_FSMC_MspInit+0xa0>)
|
||
80015b2: f000 faa5 bl 8001b00 <HAL_GPIO_Init>
|
||
|
||
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
|
||
80015b6: f24c 7333 movw r3, #50995 ; 0xc733
|
||
80015ba: 60bb str r3, [r7, #8]
|
||
|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4
|
||
|GPIO_PIN_5;
|
||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||
80015bc: 2302 movs r3, #2
|
||
80015be: 60fb str r3, [r7, #12]
|
||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||
80015c0: 2303 movs r3, #3
|
||
80015c2: 617b str r3, [r7, #20]
|
||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||
80015c4: f107 0308 add.w r3, r7, #8
|
||
80015c8: 4619 mov r1, r3
|
||
80015ca: 4808 ldr r0, [pc, #32] ; (80015ec <HAL_FSMC_MspInit+0xa4>)
|
||
80015cc: f000 fa98 bl 8001b00 <HAL_GPIO_Init>
|
||
80015d0: e000 b.n 80015d4 <HAL_FSMC_MspInit+0x8c>
|
||
return;
|
||
80015d2: bf00 nop
|
||
|
||
/* USER CODE BEGIN FSMC_MspInit 1 */
|
||
|
||
/* USER CODE END FSMC_MspInit 1 */
|
||
}
|
||
80015d4: 3718 adds r7, #24
|
||
80015d6: 46bd mov sp, r7
|
||
80015d8: bd80 pop {r7, pc}
|
||
80015da: bf00 nop
|
||
80015dc: 200001f8 .word 0x200001f8
|
||
80015e0: 40021000 .word 0x40021000
|
||
80015e4: 40012000 .word 0x40012000
|
||
80015e8: 40011800 .word 0x40011800
|
||
80015ec: 40011400 .word 0x40011400
|
||
|
||
080015f0 <HAL_SRAM_MspInit>:
|
||
|
||
void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){
|
||
80015f0: b580 push {r7, lr}
|
||
80015f2: b082 sub sp, #8
|
||
80015f4: af00 add r7, sp, #0
|
||
80015f6: 6078 str r0, [r7, #4]
|
||
/* USER CODE BEGIN SRAM_MspInit 0 */
|
||
|
||
/* USER CODE END SRAM_MspInit 0 */
|
||
HAL_FSMC_MspInit();
|
||
80015f8: f7ff ffa6 bl 8001548 <HAL_FSMC_MspInit>
|
||
/* USER CODE BEGIN SRAM_MspInit 1 */
|
||
|
||
/* USER CODE END SRAM_MspInit 1 */
|
||
}
|
||
80015fc: bf00 nop
|
||
80015fe: 3708 adds r7, #8
|
||
8001600: 46bd mov sp, r7
|
||
8001602: bd80 pop {r7, pc}
|
||
|
||
08001604 <NMI_Handler>:
|
||
/******************************************************************************/
|
||
/**
|
||
* @brief This function handles Non maskable interrupt.
|
||
*/
|
||
void NMI_Handler(void)
|
||
{
|
||
8001604: b480 push {r7}
|
||
8001606: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||
|
||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||
while (1)
|
||
8001608: e7fe b.n 8001608 <NMI_Handler+0x4>
|
||
|
||
0800160a <HardFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Hard fault interrupt.
|
||
*/
|
||
void HardFault_Handler(void)
|
||
{
|
||
800160a: b480 push {r7}
|
||
800160c: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||
|
||
/* USER CODE END HardFault_IRQn 0 */
|
||
while (1)
|
||
800160e: e7fe b.n 800160e <HardFault_Handler+0x4>
|
||
|
||
08001610 <MemManage_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Memory management fault.
|
||
*/
|
||
void MemManage_Handler(void)
|
||
{
|
||
8001610: b480 push {r7}
|
||
8001612: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||
|
||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||
while (1)
|
||
8001614: e7fe b.n 8001614 <MemManage_Handler+0x4>
|
||
|
||
08001616 <BusFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Prefetch fault, memory access fault.
|
||
*/
|
||
void BusFault_Handler(void)
|
||
{
|
||
8001616: b480 push {r7}
|
||
8001618: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||
|
||
/* USER CODE END BusFault_IRQn 0 */
|
||
while (1)
|
||
800161a: e7fe b.n 800161a <BusFault_Handler+0x4>
|
||
|
||
0800161c <UsageFault_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Undefined instruction or illegal state.
|
||
*/
|
||
void UsageFault_Handler(void)
|
||
{
|
||
800161c: b480 push {r7}
|
||
800161e: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||
|
||
/* USER CODE END UsageFault_IRQn 0 */
|
||
while (1)
|
||
8001620: e7fe b.n 8001620 <UsageFault_Handler+0x4>
|
||
|
||
08001622 <SVC_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles System service call via SWI instruction.
|
||
*/
|
||
void SVC_Handler(void)
|
||
{
|
||
8001622: b480 push {r7}
|
||
8001624: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END SVCall_IRQn 0 */
|
||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||
|
||
/* USER CODE END SVCall_IRQn 1 */
|
||
}
|
||
8001626: bf00 nop
|
||
8001628: 46bd mov sp, r7
|
||
800162a: bc80 pop {r7}
|
||
800162c: 4770 bx lr
|
||
|
||
0800162e <DebugMon_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Debug monitor.
|
||
*/
|
||
void DebugMon_Handler(void)
|
||
{
|
||
800162e: b480 push {r7}
|
||
8001630: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||
|
||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||
}
|
||
8001632: bf00 nop
|
||
8001634: 46bd mov sp, r7
|
||
8001636: bc80 pop {r7}
|
||
8001638: 4770 bx lr
|
||
|
||
0800163a <PendSV_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles Pendable request for system service.
|
||
*/
|
||
void PendSV_Handler(void)
|
||
{
|
||
800163a: b480 push {r7}
|
||
800163c: af00 add r7, sp, #0
|
||
|
||
/* USER CODE END PendSV_IRQn 0 */
|
||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||
|
||
/* USER CODE END PendSV_IRQn 1 */
|
||
}
|
||
800163e: bf00 nop
|
||
8001640: 46bd mov sp, r7
|
||
8001642: bc80 pop {r7}
|
||
8001644: 4770 bx lr
|
||
|
||
08001646 <SysTick_Handler>:
|
||
|
||
/**
|
||
* @brief This function handles System tick timer.
|
||
*/
|
||
void SysTick_Handler(void)
|
||
{
|
||
8001646: b580 push {r7, lr}
|
||
8001648: af00 add r7, sp, #0
|
||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||
|
||
/* USER CODE END SysTick_IRQn 0 */
|
||
HAL_IncTick();
|
||
800164a: f000 f935 bl 80018b8 <HAL_IncTick>
|
||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||
|
||
/* USER CODE END SysTick_IRQn 1 */
|
||
}
|
||
800164e: bf00 nop
|
||
8001650: bd80 pop {r7, pc}
|
||
|
||
08001652 <_getpid>:
|
||
void initialise_monitor_handles()
|
||
{
|
||
}
|
||
|
||
int _getpid(void)
|
||
{
|
||
8001652: b480 push {r7}
|
||
8001654: af00 add r7, sp, #0
|
||
return 1;
|
||
8001656: 2301 movs r3, #1
|
||
}
|
||
8001658: 4618 mov r0, r3
|
||
800165a: 46bd mov sp, r7
|
||
800165c: bc80 pop {r7}
|
||
800165e: 4770 bx lr
|
||
|
||
08001660 <_kill>:
|
||
|
||
int _kill(int pid, int sig)
|
||
{
|
||
8001660: b580 push {r7, lr}
|
||
8001662: b082 sub sp, #8
|
||
8001664: af00 add r7, sp, #0
|
||
8001666: 6078 str r0, [r7, #4]
|
||
8001668: 6039 str r1, [r7, #0]
|
||
errno = EINVAL;
|
||
800166a: f004 fa57 bl 8005b1c <__errno>
|
||
800166e: 4603 mov r3, r0
|
||
8001670: 2216 movs r2, #22
|
||
8001672: 601a str r2, [r3, #0]
|
||
return -1;
|
||
8001674: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
}
|
||
8001678: 4618 mov r0, r3
|
||
800167a: 3708 adds r7, #8
|
||
800167c: 46bd mov sp, r7
|
||
800167e: bd80 pop {r7, pc}
|
||
|
||
08001680 <_exit>:
|
||
|
||
void _exit (int status)
|
||
{
|
||
8001680: b580 push {r7, lr}
|
||
8001682: b082 sub sp, #8
|
||
8001684: af00 add r7, sp, #0
|
||
8001686: 6078 str r0, [r7, #4]
|
||
_kill(status, -1);
|
||
8001688: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
|
||
800168c: 6878 ldr r0, [r7, #4]
|
||
800168e: f7ff ffe7 bl 8001660 <_kill>
|
||
while (1) {} /* Make sure we hang here */
|
||
8001692: e7fe b.n 8001692 <_exit+0x12>
|
||
|
||
08001694 <_read>:
|
||
}
|
||
|
||
__attribute__((weak)) int _read(int file, char *ptr, int len)
|
||
{
|
||
8001694: b580 push {r7, lr}
|
||
8001696: b086 sub sp, #24
|
||
8001698: af00 add r7, sp, #0
|
||
800169a: 60f8 str r0, [r7, #12]
|
||
800169c: 60b9 str r1, [r7, #8]
|
||
800169e: 607a str r2, [r7, #4]
|
||
int DataIdx;
|
||
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
80016a0: 2300 movs r3, #0
|
||
80016a2: 617b str r3, [r7, #20]
|
||
80016a4: e00a b.n 80016bc <_read+0x28>
|
||
{
|
||
*ptr++ = __io_getchar();
|
||
80016a6: f3af 8000 nop.w
|
||
80016aa: 4601 mov r1, r0
|
||
80016ac: 68bb ldr r3, [r7, #8]
|
||
80016ae: 1c5a adds r2, r3, #1
|
||
80016b0: 60ba str r2, [r7, #8]
|
||
80016b2: b2ca uxtb r2, r1
|
||
80016b4: 701a strb r2, [r3, #0]
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
80016b6: 697b ldr r3, [r7, #20]
|
||
80016b8: 3301 adds r3, #1
|
||
80016ba: 617b str r3, [r7, #20]
|
||
80016bc: 697a ldr r2, [r7, #20]
|
||
80016be: 687b ldr r3, [r7, #4]
|
||
80016c0: 429a cmp r2, r3
|
||
80016c2: dbf0 blt.n 80016a6 <_read+0x12>
|
||
}
|
||
|
||
return len;
|
||
80016c4: 687b ldr r3, [r7, #4]
|
||
}
|
||
80016c6: 4618 mov r0, r3
|
||
80016c8: 3718 adds r7, #24
|
||
80016ca: 46bd mov sp, r7
|
||
80016cc: bd80 pop {r7, pc}
|
||
|
||
080016ce <_write>:
|
||
|
||
__attribute__((weak)) int _write(int file, char *ptr, int len)
|
||
{
|
||
80016ce: b580 push {r7, lr}
|
||
80016d0: b086 sub sp, #24
|
||
80016d2: af00 add r7, sp, #0
|
||
80016d4: 60f8 str r0, [r7, #12]
|
||
80016d6: 60b9 str r1, [r7, #8]
|
||
80016d8: 607a str r2, [r7, #4]
|
||
int DataIdx;
|
||
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
80016da: 2300 movs r3, #0
|
||
80016dc: 617b str r3, [r7, #20]
|
||
80016de: e009 b.n 80016f4 <_write+0x26>
|
||
{
|
||
__io_putchar(*ptr++);
|
||
80016e0: 68bb ldr r3, [r7, #8]
|
||
80016e2: 1c5a adds r2, r3, #1
|
||
80016e4: 60ba str r2, [r7, #8]
|
||
80016e6: 781b ldrb r3, [r3, #0]
|
||
80016e8: 4618 mov r0, r3
|
||
80016ea: f3af 8000 nop.w
|
||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||
80016ee: 697b ldr r3, [r7, #20]
|
||
80016f0: 3301 adds r3, #1
|
||
80016f2: 617b str r3, [r7, #20]
|
||
80016f4: 697a ldr r2, [r7, #20]
|
||
80016f6: 687b ldr r3, [r7, #4]
|
||
80016f8: 429a cmp r2, r3
|
||
80016fa: dbf1 blt.n 80016e0 <_write+0x12>
|
||
}
|
||
return len;
|
||
80016fc: 687b ldr r3, [r7, #4]
|
||
}
|
||
80016fe: 4618 mov r0, r3
|
||
8001700: 3718 adds r7, #24
|
||
8001702: 46bd mov sp, r7
|
||
8001704: bd80 pop {r7, pc}
|
||
|
||
08001706 <_close>:
|
||
|
||
int _close(int file)
|
||
{
|
||
8001706: b480 push {r7}
|
||
8001708: b083 sub sp, #12
|
||
800170a: af00 add r7, sp, #0
|
||
800170c: 6078 str r0, [r7, #4]
|
||
return -1;
|
||
800170e: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
}
|
||
8001712: 4618 mov r0, r3
|
||
8001714: 370c adds r7, #12
|
||
8001716: 46bd mov sp, r7
|
||
8001718: bc80 pop {r7}
|
||
800171a: 4770 bx lr
|
||
|
||
0800171c <_fstat>:
|
||
|
||
|
||
int _fstat(int file, struct stat *st)
|
||
{
|
||
800171c: b480 push {r7}
|
||
800171e: b083 sub sp, #12
|
||
8001720: af00 add r7, sp, #0
|
||
8001722: 6078 str r0, [r7, #4]
|
||
8001724: 6039 str r1, [r7, #0]
|
||
st->st_mode = S_IFCHR;
|
||
8001726: 683b ldr r3, [r7, #0]
|
||
8001728: f44f 5200 mov.w r2, #8192 ; 0x2000
|
||
800172c: 605a str r2, [r3, #4]
|
||
return 0;
|
||
800172e: 2300 movs r3, #0
|
||
}
|
||
8001730: 4618 mov r0, r3
|
||
8001732: 370c adds r7, #12
|
||
8001734: 46bd mov sp, r7
|
||
8001736: bc80 pop {r7}
|
||
8001738: 4770 bx lr
|
||
|
||
0800173a <_isatty>:
|
||
|
||
int _isatty(int file)
|
||
{
|
||
800173a: b480 push {r7}
|
||
800173c: b083 sub sp, #12
|
||
800173e: af00 add r7, sp, #0
|
||
8001740: 6078 str r0, [r7, #4]
|
||
return 1;
|
||
8001742: 2301 movs r3, #1
|
||
}
|
||
8001744: 4618 mov r0, r3
|
||
8001746: 370c adds r7, #12
|
||
8001748: 46bd mov sp, r7
|
||
800174a: bc80 pop {r7}
|
||
800174c: 4770 bx lr
|
||
|
||
0800174e <_lseek>:
|
||
|
||
int _lseek(int file, int ptr, int dir)
|
||
{
|
||
800174e: b480 push {r7}
|
||
8001750: b085 sub sp, #20
|
||
8001752: af00 add r7, sp, #0
|
||
8001754: 60f8 str r0, [r7, #12]
|
||
8001756: 60b9 str r1, [r7, #8]
|
||
8001758: 607a str r2, [r7, #4]
|
||
return 0;
|
||
800175a: 2300 movs r3, #0
|
||
}
|
||
800175c: 4618 mov r0, r3
|
||
800175e: 3714 adds r7, #20
|
||
8001760: 46bd mov sp, r7
|
||
8001762: bc80 pop {r7}
|
||
8001764: 4770 bx lr
|
||
...
|
||
|
||
08001768 <_sbrk>:
|
||
*
|
||
* @param incr Memory size
|
||
* @return Pointer to allocated memory
|
||
*/
|
||
void *_sbrk(ptrdiff_t incr)
|
||
{
|
||
8001768: b580 push {r7, lr}
|
||
800176a: b086 sub sp, #24
|
||
800176c: af00 add r7, sp, #0
|
||
800176e: 6078 str r0, [r7, #4]
|
||
extern uint8_t _end; /* Symbol defined in the linker script */
|
||
extern uint8_t _estack; /* Symbol defined in the linker script */
|
||
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
||
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
||
8001770: 4a14 ldr r2, [pc, #80] ; (80017c4 <_sbrk+0x5c>)
|
||
8001772: 4b15 ldr r3, [pc, #84] ; (80017c8 <_sbrk+0x60>)
|
||
8001774: 1ad3 subs r3, r2, r3
|
||
8001776: 617b str r3, [r7, #20]
|
||
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||
8001778: 697b ldr r3, [r7, #20]
|
||
800177a: 613b str r3, [r7, #16]
|
||
uint8_t *prev_heap_end;
|
||
|
||
/* Initialize heap end at first call */
|
||
if (NULL == __sbrk_heap_end)
|
||
800177c: 4b13 ldr r3, [pc, #76] ; (80017cc <_sbrk+0x64>)
|
||
800177e: 681b ldr r3, [r3, #0]
|
||
8001780: 2b00 cmp r3, #0
|
||
8001782: d102 bne.n 800178a <_sbrk+0x22>
|
||
{
|
||
__sbrk_heap_end = &_end;
|
||
8001784: 4b11 ldr r3, [pc, #68] ; (80017cc <_sbrk+0x64>)
|
||
8001786: 4a12 ldr r2, [pc, #72] ; (80017d0 <_sbrk+0x68>)
|
||
8001788: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Protect heap from growing into the reserved MSP stack */
|
||
if (__sbrk_heap_end + incr > max_heap)
|
||
800178a: 4b10 ldr r3, [pc, #64] ; (80017cc <_sbrk+0x64>)
|
||
800178c: 681a ldr r2, [r3, #0]
|
||
800178e: 687b ldr r3, [r7, #4]
|
||
8001790: 4413 add r3, r2
|
||
8001792: 693a ldr r2, [r7, #16]
|
||
8001794: 429a cmp r2, r3
|
||
8001796: d207 bcs.n 80017a8 <_sbrk+0x40>
|
||
{
|
||
errno = ENOMEM;
|
||
8001798: f004 f9c0 bl 8005b1c <__errno>
|
||
800179c: 4603 mov r3, r0
|
||
800179e: 220c movs r2, #12
|
||
80017a0: 601a str r2, [r3, #0]
|
||
return (void *)-1;
|
||
80017a2: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
80017a6: e009 b.n 80017bc <_sbrk+0x54>
|
||
}
|
||
|
||
prev_heap_end = __sbrk_heap_end;
|
||
80017a8: 4b08 ldr r3, [pc, #32] ; (80017cc <_sbrk+0x64>)
|
||
80017aa: 681b ldr r3, [r3, #0]
|
||
80017ac: 60fb str r3, [r7, #12]
|
||
__sbrk_heap_end += incr;
|
||
80017ae: 4b07 ldr r3, [pc, #28] ; (80017cc <_sbrk+0x64>)
|
||
80017b0: 681a ldr r2, [r3, #0]
|
||
80017b2: 687b ldr r3, [r7, #4]
|
||
80017b4: 4413 add r3, r2
|
||
80017b6: 4a05 ldr r2, [pc, #20] ; (80017cc <_sbrk+0x64>)
|
||
80017b8: 6013 str r3, [r2, #0]
|
||
|
||
return (void *)prev_heap_end;
|
||
80017ba: 68fb ldr r3, [r7, #12]
|
||
}
|
||
80017bc: 4618 mov r0, r3
|
||
80017be: 3718 adds r7, #24
|
||
80017c0: 46bd mov sp, r7
|
||
80017c2: bd80 pop {r7, pc}
|
||
80017c4: 20010000 .word 0x20010000
|
||
80017c8: 00000800 .word 0x00000800
|
||
80017cc: 200001fc .word 0x200001fc
|
||
80017d0: 20000350 .word 0x20000350
|
||
|
||
080017d4 <SystemInit>:
|
||
* @note This function should be used only after reset.
|
||
* @param None
|
||
* @retval None
|
||
*/
|
||
void SystemInit (void)
|
||
{
|
||
80017d4: b480 push {r7}
|
||
80017d6: af00 add r7, sp, #0
|
||
|
||
/* Configure the Vector Table location -------------------------------------*/
|
||
#if defined(USER_VECT_TAB_ADDRESS)
|
||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
|
||
#endif /* USER_VECT_TAB_ADDRESS */
|
||
}
|
||
80017d8: bf00 nop
|
||
80017da: 46bd mov sp, r7
|
||
80017dc: bc80 pop {r7}
|
||
80017de: 4770 bx lr
|
||
|
||
080017e0 <Reset_Handler>:
|
||
.weak Reset_Handler
|
||
.type Reset_Handler, %function
|
||
Reset_Handler:
|
||
|
||
/* Copy the data segment initializers from flash to SRAM */
|
||
ldr r0, =_sdata
|
||
80017e0: 480c ldr r0, [pc, #48] ; (8001814 <LoopFillZerobss+0x12>)
|
||
ldr r1, =_edata
|
||
80017e2: 490d ldr r1, [pc, #52] ; (8001818 <LoopFillZerobss+0x16>)
|
||
ldr r2, =_sidata
|
||
80017e4: 4a0d ldr r2, [pc, #52] ; (800181c <LoopFillZerobss+0x1a>)
|
||
movs r3, #0
|
||
80017e6: 2300 movs r3, #0
|
||
b LoopCopyDataInit
|
||
80017e8: e002 b.n 80017f0 <LoopCopyDataInit>
|
||
|
||
080017ea <CopyDataInit>:
|
||
|
||
CopyDataInit:
|
||
ldr r4, [r2, r3]
|
||
80017ea: 58d4 ldr r4, [r2, r3]
|
||
str r4, [r0, r3]
|
||
80017ec: 50c4 str r4, [r0, r3]
|
||
adds r3, r3, #4
|
||
80017ee: 3304 adds r3, #4
|
||
|
||
080017f0 <LoopCopyDataInit>:
|
||
|
||
LoopCopyDataInit:
|
||
adds r4, r0, r3
|
||
80017f0: 18c4 adds r4, r0, r3
|
||
cmp r4, r1
|
||
80017f2: 428c cmp r4, r1
|
||
bcc CopyDataInit
|
||
80017f4: d3f9 bcc.n 80017ea <CopyDataInit>
|
||
|
||
/* Zero fill the bss segment. */
|
||
ldr r2, =_sbss
|
||
80017f6: 4a0a ldr r2, [pc, #40] ; (8001820 <LoopFillZerobss+0x1e>)
|
||
ldr r4, =_ebss
|
||
80017f8: 4c0a ldr r4, [pc, #40] ; (8001824 <LoopFillZerobss+0x22>)
|
||
movs r3, #0
|
||
80017fa: 2300 movs r3, #0
|
||
b LoopFillZerobss
|
||
80017fc: e001 b.n 8001802 <LoopFillZerobss>
|
||
|
||
080017fe <FillZerobss>:
|
||
|
||
FillZerobss:
|
||
str r3, [r2]
|
||
80017fe: 6013 str r3, [r2, #0]
|
||
adds r2, r2, #4
|
||
8001800: 3204 adds r2, #4
|
||
|
||
08001802 <LoopFillZerobss>:
|
||
|
||
LoopFillZerobss:
|
||
cmp r2, r4
|
||
8001802: 42a2 cmp r2, r4
|
||
bcc FillZerobss
|
||
8001804: d3fb bcc.n 80017fe <FillZerobss>
|
||
|
||
/* Call the clock system intitialization function.*/
|
||
bl SystemInit
|
||
8001806: f7ff ffe5 bl 80017d4 <SystemInit>
|
||
/* Call static constructors */
|
||
bl __libc_init_array
|
||
800180a: f004 f98d bl 8005b28 <__libc_init_array>
|
||
/* Call the application's entry point.*/
|
||
bl main
|
||
800180e: f7ff fc7b bl 8001108 <main>
|
||
bx lr
|
||
8001812: 4770 bx lr
|
||
ldr r0, =_sdata
|
||
8001814: 20000000 .word 0x20000000
|
||
ldr r1, =_edata
|
||
8001818: 200001dc .word 0x200001dc
|
||
ldr r2, =_sidata
|
||
800181c: 08009834 .word 0x08009834
|
||
ldr r2, =_sbss
|
||
8001820: 200001dc .word 0x200001dc
|
||
ldr r4, =_ebss
|
||
8001824: 2000034c .word 0x2000034c
|
||
|
||
08001828 <ADC1_2_IRQHandler>:
|
||
* @retval : None
|
||
*/
|
||
.section .text.Default_Handler,"ax",%progbits
|
||
Default_Handler:
|
||
Infinite_Loop:
|
||
b Infinite_Loop
|
||
8001828: e7fe b.n 8001828 <ADC1_2_IRQHandler>
|
||
...
|
||
|
||
0800182c <HAL_Init>:
|
||
* need to ensure that the SysTick time base is always set to 1 millisecond
|
||
* to have correct HAL operation.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_Init(void)
|
||
{
|
||
800182c: b580 push {r7, lr}
|
||
800182e: af00 add r7, sp, #0
|
||
defined(STM32F102x6) || defined(STM32F102xB) || \
|
||
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
|
||
defined(STM32F105xC) || defined(STM32F107xC)
|
||
|
||
/* Prefetch buffer is not available on value line devices */
|
||
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
||
8001830: 4b08 ldr r3, [pc, #32] ; (8001854 <HAL_Init+0x28>)
|
||
8001832: 681b ldr r3, [r3, #0]
|
||
8001834: 4a07 ldr r2, [pc, #28] ; (8001854 <HAL_Init+0x28>)
|
||
8001836: f043 0310 orr.w r3, r3, #16
|
||
800183a: 6013 str r3, [r2, #0]
|
||
#endif
|
||
#endif /* PREFETCH_ENABLE */
|
||
|
||
/* Set Interrupt Group Priority */
|
||
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
||
800183c: 2003 movs r0, #3
|
||
800183e: f000 f92b bl 8001a98 <HAL_NVIC_SetPriorityGrouping>
|
||
|
||
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
|
||
HAL_InitTick(TICK_INT_PRIORITY);
|
||
8001842: 200f movs r0, #15
|
||
8001844: f000 f808 bl 8001858 <HAL_InitTick>
|
||
|
||
/* Init the low level hardware */
|
||
HAL_MspInit();
|
||
8001848: f7ff fe0c bl 8001464 <HAL_MspInit>
|
||
|
||
/* Return function status */
|
||
return HAL_OK;
|
||
800184c: 2300 movs r3, #0
|
||
}
|
||
800184e: 4618 mov r0, r3
|
||
8001850: bd80 pop {r7, pc}
|
||
8001852: bf00 nop
|
||
8001854: 40022000 .word 0x40022000
|
||
|
||
08001858 <HAL_InitTick>:
|
||
* implementation in user file.
|
||
* @param TickPriority Tick interrupt priority.
|
||
* @retval HAL status
|
||
*/
|
||
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
||
{
|
||
8001858: b580 push {r7, lr}
|
||
800185a: b082 sub sp, #8
|
||
800185c: af00 add r7, sp, #0
|
||
800185e: 6078 str r0, [r7, #4]
|
||
/* Configure the SysTick to have interrupt in 1ms time basis*/
|
||
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
|
||
8001860: 4b12 ldr r3, [pc, #72] ; (80018ac <HAL_InitTick+0x54>)
|
||
8001862: 681a ldr r2, [r3, #0]
|
||
8001864: 4b12 ldr r3, [pc, #72] ; (80018b0 <HAL_InitTick+0x58>)
|
||
8001866: 781b ldrb r3, [r3, #0]
|
||
8001868: 4619 mov r1, r3
|
||
800186a: f44f 737a mov.w r3, #1000 ; 0x3e8
|
||
800186e: fbb3 f3f1 udiv r3, r3, r1
|
||
8001872: fbb2 f3f3 udiv r3, r2, r3
|
||
8001876: 4618 mov r0, r3
|
||
8001878: f000 f935 bl 8001ae6 <HAL_SYSTICK_Config>
|
||
800187c: 4603 mov r3, r0
|
||
800187e: 2b00 cmp r3, #0
|
||
8001880: d001 beq.n 8001886 <HAL_InitTick+0x2e>
|
||
{
|
||
return HAL_ERROR;
|
||
8001882: 2301 movs r3, #1
|
||
8001884: e00e b.n 80018a4 <HAL_InitTick+0x4c>
|
||
}
|
||
|
||
/* Configure the SysTick IRQ priority */
|
||
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
||
8001886: 687b ldr r3, [r7, #4]
|
||
8001888: 2b0f cmp r3, #15
|
||
800188a: d80a bhi.n 80018a2 <HAL_InitTick+0x4a>
|
||
{
|
||
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
||
800188c: 2200 movs r2, #0
|
||
800188e: 6879 ldr r1, [r7, #4]
|
||
8001890: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8001894: f000 f90b bl 8001aae <HAL_NVIC_SetPriority>
|
||
uwTickPrio = TickPriority;
|
||
8001898: 4a06 ldr r2, [pc, #24] ; (80018b4 <HAL_InitTick+0x5c>)
|
||
800189a: 687b ldr r3, [r7, #4]
|
||
800189c: 6013 str r3, [r2, #0]
|
||
{
|
||
return HAL_ERROR;
|
||
}
|
||
|
||
/* Return function status */
|
||
return HAL_OK;
|
||
800189e: 2300 movs r3, #0
|
||
80018a0: e000 b.n 80018a4 <HAL_InitTick+0x4c>
|
||
return HAL_ERROR;
|
||
80018a2: 2301 movs r3, #1
|
||
}
|
||
80018a4: 4618 mov r0, r3
|
||
80018a6: 3708 adds r7, #8
|
||
80018a8: 46bd mov sp, r7
|
||
80018aa: bd80 pop {r7, pc}
|
||
80018ac: 20000000 .word 0x20000000
|
||
80018b0: 20000008 .word 0x20000008
|
||
80018b4: 20000004 .word 0x20000004
|
||
|
||
080018b8 <HAL_IncTick>:
|
||
* @note This function is declared as __weak to be overwritten in case of other
|
||
* implementations in user file.
|
||
* @retval None
|
||
*/
|
||
__weak void HAL_IncTick(void)
|
||
{
|
||
80018b8: b480 push {r7}
|
||
80018ba: af00 add r7, sp, #0
|
||
uwTick += uwTickFreq;
|
||
80018bc: 4b05 ldr r3, [pc, #20] ; (80018d4 <HAL_IncTick+0x1c>)
|
||
80018be: 781b ldrb r3, [r3, #0]
|
||
80018c0: 461a mov r2, r3
|
||
80018c2: 4b05 ldr r3, [pc, #20] ; (80018d8 <HAL_IncTick+0x20>)
|
||
80018c4: 681b ldr r3, [r3, #0]
|
||
80018c6: 4413 add r3, r2
|
||
80018c8: 4a03 ldr r2, [pc, #12] ; (80018d8 <HAL_IncTick+0x20>)
|
||
80018ca: 6013 str r3, [r2, #0]
|
||
}
|
||
80018cc: bf00 nop
|
||
80018ce: 46bd mov sp, r7
|
||
80018d0: bc80 pop {r7}
|
||
80018d2: 4770 bx lr
|
||
80018d4: 20000008 .word 0x20000008
|
||
80018d8: 200002a4 .word 0x200002a4
|
||
|
||
080018dc <HAL_GetTick>:
|
||
* @note This function is declared as __weak to be overwritten in case of other
|
||
* implementations in user file.
|
||
* @retval tick value
|
||
*/
|
||
__weak uint32_t HAL_GetTick(void)
|
||
{
|
||
80018dc: b480 push {r7}
|
||
80018de: af00 add r7, sp, #0
|
||
return uwTick;
|
||
80018e0: 4b02 ldr r3, [pc, #8] ; (80018ec <HAL_GetTick+0x10>)
|
||
80018e2: 681b ldr r3, [r3, #0]
|
||
}
|
||
80018e4: 4618 mov r0, r3
|
||
80018e6: 46bd mov sp, r7
|
||
80018e8: bc80 pop {r7}
|
||
80018ea: 4770 bx lr
|
||
80018ec: 200002a4 .word 0x200002a4
|
||
|
||
080018f0 <HAL_Delay>:
|
||
* implementations in user file.
|
||
* @param Delay specifies the delay time length, in milliseconds.
|
||
* @retval None
|
||
*/
|
||
__weak void HAL_Delay(uint32_t Delay)
|
||
{
|
||
80018f0: b580 push {r7, lr}
|
||
80018f2: b084 sub sp, #16
|
||
80018f4: af00 add r7, sp, #0
|
||
80018f6: 6078 str r0, [r7, #4]
|
||
uint32_t tickstart = HAL_GetTick();
|
||
80018f8: f7ff fff0 bl 80018dc <HAL_GetTick>
|
||
80018fc: 60b8 str r0, [r7, #8]
|
||
uint32_t wait = Delay;
|
||
80018fe: 687b ldr r3, [r7, #4]
|
||
8001900: 60fb str r3, [r7, #12]
|
||
|
||
/* Add a freq to guarantee minimum wait */
|
||
if (wait < HAL_MAX_DELAY)
|
||
8001902: 68fb ldr r3, [r7, #12]
|
||
8001904: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
8001908: d005 beq.n 8001916 <HAL_Delay+0x26>
|
||
{
|
||
wait += (uint32_t)(uwTickFreq);
|
||
800190a: 4b0a ldr r3, [pc, #40] ; (8001934 <HAL_Delay+0x44>)
|
||
800190c: 781b ldrb r3, [r3, #0]
|
||
800190e: 461a mov r2, r3
|
||
8001910: 68fb ldr r3, [r7, #12]
|
||
8001912: 4413 add r3, r2
|
||
8001914: 60fb str r3, [r7, #12]
|
||
}
|
||
|
||
while ((HAL_GetTick() - tickstart) < wait)
|
||
8001916: bf00 nop
|
||
8001918: f7ff ffe0 bl 80018dc <HAL_GetTick>
|
||
800191c: 4602 mov r2, r0
|
||
800191e: 68bb ldr r3, [r7, #8]
|
||
8001920: 1ad3 subs r3, r2, r3
|
||
8001922: 68fa ldr r2, [r7, #12]
|
||
8001924: 429a cmp r2, r3
|
||
8001926: d8f7 bhi.n 8001918 <HAL_Delay+0x28>
|
||
{
|
||
}
|
||
}
|
||
8001928: bf00 nop
|
||
800192a: bf00 nop
|
||
800192c: 3710 adds r7, #16
|
||
800192e: 46bd mov sp, r7
|
||
8001930: bd80 pop {r7, pc}
|
||
8001932: bf00 nop
|
||
8001934: 20000008 .word 0x20000008
|
||
|
||
08001938 <__NVIC_SetPriorityGrouping>:
|
||
In case of a conflict between priority grouping and available
|
||
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
|
||
\param [in] PriorityGroup Priority grouping field.
|
||
*/
|
||
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
||
{
|
||
8001938: b480 push {r7}
|
||
800193a: b085 sub sp, #20
|
||
800193c: af00 add r7, sp, #0
|
||
800193e: 6078 str r0, [r7, #4]
|
||
uint32_t reg_value;
|
||
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
||
8001940: 687b ldr r3, [r7, #4]
|
||
8001942: f003 0307 and.w r3, r3, #7
|
||
8001946: 60fb str r3, [r7, #12]
|
||
|
||
reg_value = SCB->AIRCR; /* read old register configuration */
|
||
8001948: 4b0c ldr r3, [pc, #48] ; (800197c <__NVIC_SetPriorityGrouping+0x44>)
|
||
800194a: 68db ldr r3, [r3, #12]
|
||
800194c: 60bb str r3, [r7, #8]
|
||
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
|
||
800194e: 68ba ldr r2, [r7, #8]
|
||
8001950: f64f 03ff movw r3, #63743 ; 0xf8ff
|
||
8001954: 4013 ands r3, r2
|
||
8001956: 60bb str r3, [r7, #8]
|
||
reg_value = (reg_value |
|
||
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
|
||
8001958: 68fb ldr r3, [r7, #12]
|
||
800195a: 021a lsls r2, r3, #8
|
||
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||
800195c: 68bb ldr r3, [r7, #8]
|
||
800195e: 4313 orrs r3, r2
|
||
reg_value = (reg_value |
|
||
8001960: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
|
||
8001964: f443 3300 orr.w r3, r3, #131072 ; 0x20000
|
||
8001968: 60bb str r3, [r7, #8]
|
||
SCB->AIRCR = reg_value;
|
||
800196a: 4a04 ldr r2, [pc, #16] ; (800197c <__NVIC_SetPriorityGrouping+0x44>)
|
||
800196c: 68bb ldr r3, [r7, #8]
|
||
800196e: 60d3 str r3, [r2, #12]
|
||
}
|
||
8001970: bf00 nop
|
||
8001972: 3714 adds r7, #20
|
||
8001974: 46bd mov sp, r7
|
||
8001976: bc80 pop {r7}
|
||
8001978: 4770 bx lr
|
||
800197a: bf00 nop
|
||
800197c: e000ed00 .word 0xe000ed00
|
||
|
||
08001980 <__NVIC_GetPriorityGrouping>:
|
||
\brief Get Priority Grouping
|
||
\details Reads the priority grouping field from the NVIC Interrupt Controller.
|
||
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
|
||
*/
|
||
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
|
||
{
|
||
8001980: b480 push {r7}
|
||
8001982: af00 add r7, sp, #0
|
||
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
|
||
8001984: 4b04 ldr r3, [pc, #16] ; (8001998 <__NVIC_GetPriorityGrouping+0x18>)
|
||
8001986: 68db ldr r3, [r3, #12]
|
||
8001988: 0a1b lsrs r3, r3, #8
|
||
800198a: f003 0307 and.w r3, r3, #7
|
||
}
|
||
800198e: 4618 mov r0, r3
|
||
8001990: 46bd mov sp, r7
|
||
8001992: bc80 pop {r7}
|
||
8001994: 4770 bx lr
|
||
8001996: bf00 nop
|
||
8001998: e000ed00 .word 0xe000ed00
|
||
|
||
0800199c <__NVIC_SetPriority>:
|
||
\param [in] IRQn Interrupt number.
|
||
\param [in] priority Priority to set.
|
||
\note The priority cannot be set for every processor exception.
|
||
*/
|
||
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
||
{
|
||
800199c: b480 push {r7}
|
||
800199e: b083 sub sp, #12
|
||
80019a0: af00 add r7, sp, #0
|
||
80019a2: 4603 mov r3, r0
|
||
80019a4: 6039 str r1, [r7, #0]
|
||
80019a6: 71fb strb r3, [r7, #7]
|
||
if ((int32_t)(IRQn) >= 0)
|
||
80019a8: f997 3007 ldrsb.w r3, [r7, #7]
|
||
80019ac: 2b00 cmp r3, #0
|
||
80019ae: db0a blt.n 80019c6 <__NVIC_SetPriority+0x2a>
|
||
{
|
||
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
80019b0: 683b ldr r3, [r7, #0]
|
||
80019b2: b2da uxtb r2, r3
|
||
80019b4: 490c ldr r1, [pc, #48] ; (80019e8 <__NVIC_SetPriority+0x4c>)
|
||
80019b6: f997 3007 ldrsb.w r3, [r7, #7]
|
||
80019ba: 0112 lsls r2, r2, #4
|
||
80019bc: b2d2 uxtb r2, r2
|
||
80019be: 440b add r3, r1
|
||
80019c0: f883 2300 strb.w r2, [r3, #768] ; 0x300
|
||
}
|
||
else
|
||
{
|
||
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
}
|
||
}
|
||
80019c4: e00a b.n 80019dc <__NVIC_SetPriority+0x40>
|
||
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
||
80019c6: 683b ldr r3, [r7, #0]
|
||
80019c8: b2da uxtb r2, r3
|
||
80019ca: 4908 ldr r1, [pc, #32] ; (80019ec <__NVIC_SetPriority+0x50>)
|
||
80019cc: 79fb ldrb r3, [r7, #7]
|
||
80019ce: f003 030f and.w r3, r3, #15
|
||
80019d2: 3b04 subs r3, #4
|
||
80019d4: 0112 lsls r2, r2, #4
|
||
80019d6: b2d2 uxtb r2, r2
|
||
80019d8: 440b add r3, r1
|
||
80019da: 761a strb r2, [r3, #24]
|
||
}
|
||
80019dc: bf00 nop
|
||
80019de: 370c adds r7, #12
|
||
80019e0: 46bd mov sp, r7
|
||
80019e2: bc80 pop {r7}
|
||
80019e4: 4770 bx lr
|
||
80019e6: bf00 nop
|
||
80019e8: e000e100 .word 0xe000e100
|
||
80019ec: e000ed00 .word 0xe000ed00
|
||
|
||
080019f0 <NVIC_EncodePriority>:
|
||
\param [in] PreemptPriority Preemptive priority value (starting from 0).
|
||
\param [in] SubPriority Subpriority value (starting from 0).
|
||
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
|
||
*/
|
||
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
|
||
{
|
||
80019f0: b480 push {r7}
|
||
80019f2: b089 sub sp, #36 ; 0x24
|
||
80019f4: af00 add r7, sp, #0
|
||
80019f6: 60f8 str r0, [r7, #12]
|
||
80019f8: 60b9 str r1, [r7, #8]
|
||
80019fa: 607a str r2, [r7, #4]
|
||
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
||
80019fc: 68fb ldr r3, [r7, #12]
|
||
80019fe: f003 0307 and.w r3, r3, #7
|
||
8001a02: 61fb str r3, [r7, #28]
|
||
uint32_t PreemptPriorityBits;
|
||
uint32_t SubPriorityBits;
|
||
|
||
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
|
||
8001a04: 69fb ldr r3, [r7, #28]
|
||
8001a06: f1c3 0307 rsb r3, r3, #7
|
||
8001a0a: 2b04 cmp r3, #4
|
||
8001a0c: bf28 it cs
|
||
8001a0e: 2304 movcs r3, #4
|
||
8001a10: 61bb str r3, [r7, #24]
|
||
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
|
||
8001a12: 69fb ldr r3, [r7, #28]
|
||
8001a14: 3304 adds r3, #4
|
||
8001a16: 2b06 cmp r3, #6
|
||
8001a18: d902 bls.n 8001a20 <NVIC_EncodePriority+0x30>
|
||
8001a1a: 69fb ldr r3, [r7, #28]
|
||
8001a1c: 3b03 subs r3, #3
|
||
8001a1e: e000 b.n 8001a22 <NVIC_EncodePriority+0x32>
|
||
8001a20: 2300 movs r3, #0
|
||
8001a22: 617b str r3, [r7, #20]
|
||
|
||
return (
|
||
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
||
8001a24: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8001a28: 69bb ldr r3, [r7, #24]
|
||
8001a2a: fa02 f303 lsl.w r3, r2, r3
|
||
8001a2e: 43da mvns r2, r3
|
||
8001a30: 68bb ldr r3, [r7, #8]
|
||
8001a32: 401a ands r2, r3
|
||
8001a34: 697b ldr r3, [r7, #20]
|
||
8001a36: 409a lsls r2, r3
|
||
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
|
||
8001a38: f04f 31ff mov.w r1, #4294967295 ; 0xffffffff
|
||
8001a3c: 697b ldr r3, [r7, #20]
|
||
8001a3e: fa01 f303 lsl.w r3, r1, r3
|
||
8001a42: 43d9 mvns r1, r3
|
||
8001a44: 687b ldr r3, [r7, #4]
|
||
8001a46: 400b ands r3, r1
|
||
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
||
8001a48: 4313 orrs r3, r2
|
||
);
|
||
}
|
||
8001a4a: 4618 mov r0, r3
|
||
8001a4c: 3724 adds r7, #36 ; 0x24
|
||
8001a4e: 46bd mov sp, r7
|
||
8001a50: bc80 pop {r7}
|
||
8001a52: 4770 bx lr
|
||
|
||
08001a54 <SysTick_Config>:
|
||
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
||
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
||
must contain a vendor-specific implementation of this function.
|
||
*/
|
||
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
||
{
|
||
8001a54: b580 push {r7, lr}
|
||
8001a56: b082 sub sp, #8
|
||
8001a58: af00 add r7, sp, #0
|
||
8001a5a: 6078 str r0, [r7, #4]
|
||
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
||
8001a5c: 687b ldr r3, [r7, #4]
|
||
8001a5e: 3b01 subs r3, #1
|
||
8001a60: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
|
||
8001a64: d301 bcc.n 8001a6a <SysTick_Config+0x16>
|
||
{
|
||
return (1UL); /* Reload value impossible */
|
||
8001a66: 2301 movs r3, #1
|
||
8001a68: e00f b.n 8001a8a <SysTick_Config+0x36>
|
||
}
|
||
|
||
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
||
8001a6a: 4a0a ldr r2, [pc, #40] ; (8001a94 <SysTick_Config+0x40>)
|
||
8001a6c: 687b ldr r3, [r7, #4]
|
||
8001a6e: 3b01 subs r3, #1
|
||
8001a70: 6053 str r3, [r2, #4]
|
||
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
||
8001a72: 210f movs r1, #15
|
||
8001a74: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8001a78: f7ff ff90 bl 800199c <__NVIC_SetPriority>
|
||
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
||
8001a7c: 4b05 ldr r3, [pc, #20] ; (8001a94 <SysTick_Config+0x40>)
|
||
8001a7e: 2200 movs r2, #0
|
||
8001a80: 609a str r2, [r3, #8]
|
||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
||
8001a82: 4b04 ldr r3, [pc, #16] ; (8001a94 <SysTick_Config+0x40>)
|
||
8001a84: 2207 movs r2, #7
|
||
8001a86: 601a str r2, [r3, #0]
|
||
SysTick_CTRL_TICKINT_Msk |
|
||
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
||
return (0UL); /* Function successful */
|
||
8001a88: 2300 movs r3, #0
|
||
}
|
||
8001a8a: 4618 mov r0, r3
|
||
8001a8c: 3708 adds r7, #8
|
||
8001a8e: 46bd mov sp, r7
|
||
8001a90: bd80 pop {r7, pc}
|
||
8001a92: bf00 nop
|
||
8001a94: e000e010 .word 0xe000e010
|
||
|
||
08001a98 <HAL_NVIC_SetPriorityGrouping>:
|
||
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
|
||
* The pending IRQ priority will be managed only by the subpriority.
|
||
* @retval None
|
||
*/
|
||
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
||
{
|
||
8001a98: b580 push {r7, lr}
|
||
8001a9a: b082 sub sp, #8
|
||
8001a9c: af00 add r7, sp, #0
|
||
8001a9e: 6078 str r0, [r7, #4]
|
||
/* Check the parameters */
|
||
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
|
||
|
||
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
|
||
NVIC_SetPriorityGrouping(PriorityGroup);
|
||
8001aa0: 6878 ldr r0, [r7, #4]
|
||
8001aa2: f7ff ff49 bl 8001938 <__NVIC_SetPriorityGrouping>
|
||
}
|
||
8001aa6: bf00 nop
|
||
8001aa8: 3708 adds r7, #8
|
||
8001aaa: 46bd mov sp, r7
|
||
8001aac: bd80 pop {r7, pc}
|
||
|
||
08001aae <HAL_NVIC_SetPriority>:
|
||
* This parameter can be a value between 0 and 15
|
||
* A lower priority value indicates a higher priority.
|
||
* @retval None
|
||
*/
|
||
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
||
{
|
||
8001aae: b580 push {r7, lr}
|
||
8001ab0: b086 sub sp, #24
|
||
8001ab2: af00 add r7, sp, #0
|
||
8001ab4: 4603 mov r3, r0
|
||
8001ab6: 60b9 str r1, [r7, #8]
|
||
8001ab8: 607a str r2, [r7, #4]
|
||
8001aba: 73fb strb r3, [r7, #15]
|
||
uint32_t prioritygroup = 0x00U;
|
||
8001abc: 2300 movs r3, #0
|
||
8001abe: 617b str r3, [r7, #20]
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
|
||
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
||
|
||
prioritygroup = NVIC_GetPriorityGrouping();
|
||
8001ac0: f7ff ff5e bl 8001980 <__NVIC_GetPriorityGrouping>
|
||
8001ac4: 6178 str r0, [r7, #20]
|
||
|
||
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
|
||
8001ac6: 687a ldr r2, [r7, #4]
|
||
8001ac8: 68b9 ldr r1, [r7, #8]
|
||
8001aca: 6978 ldr r0, [r7, #20]
|
||
8001acc: f7ff ff90 bl 80019f0 <NVIC_EncodePriority>
|
||
8001ad0: 4602 mov r2, r0
|
||
8001ad2: f997 300f ldrsb.w r3, [r7, #15]
|
||
8001ad6: 4611 mov r1, r2
|
||
8001ad8: 4618 mov r0, r3
|
||
8001ada: f7ff ff5f bl 800199c <__NVIC_SetPriority>
|
||
}
|
||
8001ade: bf00 nop
|
||
8001ae0: 3718 adds r7, #24
|
||
8001ae2: 46bd mov sp, r7
|
||
8001ae4: bd80 pop {r7, pc}
|
||
|
||
08001ae6 <HAL_SYSTICK_Config>:
|
||
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
|
||
* @retval status: - 0 Function succeeded.
|
||
* - 1 Function failed.
|
||
*/
|
||
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
||
{
|
||
8001ae6: b580 push {r7, lr}
|
||
8001ae8: b082 sub sp, #8
|
||
8001aea: af00 add r7, sp, #0
|
||
8001aec: 6078 str r0, [r7, #4]
|
||
return SysTick_Config(TicksNumb);
|
||
8001aee: 6878 ldr r0, [r7, #4]
|
||
8001af0: f7ff ffb0 bl 8001a54 <SysTick_Config>
|
||
8001af4: 4603 mov r3, r0
|
||
}
|
||
8001af6: 4618 mov r0, r3
|
||
8001af8: 3708 adds r7, #8
|
||
8001afa: 46bd mov sp, r7
|
||
8001afc: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08001b00 <HAL_GPIO_Init>:
|
||
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
|
||
* the configuration information for the specified GPIO peripheral.
|
||
* @retval None
|
||
*/
|
||
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
||
{
|
||
8001b00: b480 push {r7}
|
||
8001b02: b08b sub sp, #44 ; 0x2c
|
||
8001b04: af00 add r7, sp, #0
|
||
8001b06: 6078 str r0, [r7, #4]
|
||
8001b08: 6039 str r1, [r7, #0]
|
||
uint32_t position = 0x00u;
|
||
8001b0a: 2300 movs r3, #0
|
||
8001b0c: 627b str r3, [r7, #36] ; 0x24
|
||
uint32_t ioposition;
|
||
uint32_t iocurrent;
|
||
uint32_t temp;
|
||
uint32_t config = 0x00u;
|
||
8001b0e: 2300 movs r3, #0
|
||
8001b10: 623b str r3, [r7, #32]
|
||
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
||
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
|
||
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
|
||
|
||
/* Configure the port pins */
|
||
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
||
8001b12: e179 b.n 8001e08 <HAL_GPIO_Init+0x308>
|
||
{
|
||
/* Get the IO position */
|
||
ioposition = (0x01uL << position);
|
||
8001b14: 2201 movs r2, #1
|
||
8001b16: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001b18: fa02 f303 lsl.w r3, r2, r3
|
||
8001b1c: 61fb str r3, [r7, #28]
|
||
|
||
/* Get the current IO position */
|
||
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
|
||
8001b1e: 683b ldr r3, [r7, #0]
|
||
8001b20: 681b ldr r3, [r3, #0]
|
||
8001b22: 69fa ldr r2, [r7, #28]
|
||
8001b24: 4013 ands r3, r2
|
||
8001b26: 61bb str r3, [r7, #24]
|
||
|
||
if (iocurrent == ioposition)
|
||
8001b28: 69ba ldr r2, [r7, #24]
|
||
8001b2a: 69fb ldr r3, [r7, #28]
|
||
8001b2c: 429a cmp r2, r3
|
||
8001b2e: f040 8168 bne.w 8001e02 <HAL_GPIO_Init+0x302>
|
||
{
|
||
/* Check the Alternate function parameters */
|
||
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
|
||
|
||
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
|
||
switch (GPIO_Init->Mode)
|
||
8001b32: 683b ldr r3, [r7, #0]
|
||
8001b34: 685b ldr r3, [r3, #4]
|
||
8001b36: 4aa0 ldr r2, [pc, #640] ; (8001db8 <HAL_GPIO_Init+0x2b8>)
|
||
8001b38: 4293 cmp r3, r2
|
||
8001b3a: d05e beq.n 8001bfa <HAL_GPIO_Init+0xfa>
|
||
8001b3c: 4a9e ldr r2, [pc, #632] ; (8001db8 <HAL_GPIO_Init+0x2b8>)
|
||
8001b3e: 4293 cmp r3, r2
|
||
8001b40: d875 bhi.n 8001c2e <HAL_GPIO_Init+0x12e>
|
||
8001b42: 4a9e ldr r2, [pc, #632] ; (8001dbc <HAL_GPIO_Init+0x2bc>)
|
||
8001b44: 4293 cmp r3, r2
|
||
8001b46: d058 beq.n 8001bfa <HAL_GPIO_Init+0xfa>
|
||
8001b48: 4a9c ldr r2, [pc, #624] ; (8001dbc <HAL_GPIO_Init+0x2bc>)
|
||
8001b4a: 4293 cmp r3, r2
|
||
8001b4c: d86f bhi.n 8001c2e <HAL_GPIO_Init+0x12e>
|
||
8001b4e: 4a9c ldr r2, [pc, #624] ; (8001dc0 <HAL_GPIO_Init+0x2c0>)
|
||
8001b50: 4293 cmp r3, r2
|
||
8001b52: d052 beq.n 8001bfa <HAL_GPIO_Init+0xfa>
|
||
8001b54: 4a9a ldr r2, [pc, #616] ; (8001dc0 <HAL_GPIO_Init+0x2c0>)
|
||
8001b56: 4293 cmp r3, r2
|
||
8001b58: d869 bhi.n 8001c2e <HAL_GPIO_Init+0x12e>
|
||
8001b5a: 4a9a ldr r2, [pc, #616] ; (8001dc4 <HAL_GPIO_Init+0x2c4>)
|
||
8001b5c: 4293 cmp r3, r2
|
||
8001b5e: d04c beq.n 8001bfa <HAL_GPIO_Init+0xfa>
|
||
8001b60: 4a98 ldr r2, [pc, #608] ; (8001dc4 <HAL_GPIO_Init+0x2c4>)
|
||
8001b62: 4293 cmp r3, r2
|
||
8001b64: d863 bhi.n 8001c2e <HAL_GPIO_Init+0x12e>
|
||
8001b66: 4a98 ldr r2, [pc, #608] ; (8001dc8 <HAL_GPIO_Init+0x2c8>)
|
||
8001b68: 4293 cmp r3, r2
|
||
8001b6a: d046 beq.n 8001bfa <HAL_GPIO_Init+0xfa>
|
||
8001b6c: 4a96 ldr r2, [pc, #600] ; (8001dc8 <HAL_GPIO_Init+0x2c8>)
|
||
8001b6e: 4293 cmp r3, r2
|
||
8001b70: d85d bhi.n 8001c2e <HAL_GPIO_Init+0x12e>
|
||
8001b72: 2b12 cmp r3, #18
|
||
8001b74: d82a bhi.n 8001bcc <HAL_GPIO_Init+0xcc>
|
||
8001b76: 2b12 cmp r3, #18
|
||
8001b78: d859 bhi.n 8001c2e <HAL_GPIO_Init+0x12e>
|
||
8001b7a: a201 add r2, pc, #4 ; (adr r2, 8001b80 <HAL_GPIO_Init+0x80>)
|
||
8001b7c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
8001b80: 08001bfb .word 0x08001bfb
|
||
8001b84: 08001bd5 .word 0x08001bd5
|
||
8001b88: 08001be7 .word 0x08001be7
|
||
8001b8c: 08001c29 .word 0x08001c29
|
||
8001b90: 08001c2f .word 0x08001c2f
|
||
8001b94: 08001c2f .word 0x08001c2f
|
||
8001b98: 08001c2f .word 0x08001c2f
|
||
8001b9c: 08001c2f .word 0x08001c2f
|
||
8001ba0: 08001c2f .word 0x08001c2f
|
||
8001ba4: 08001c2f .word 0x08001c2f
|
||
8001ba8: 08001c2f .word 0x08001c2f
|
||
8001bac: 08001c2f .word 0x08001c2f
|
||
8001bb0: 08001c2f .word 0x08001c2f
|
||
8001bb4: 08001c2f .word 0x08001c2f
|
||
8001bb8: 08001c2f .word 0x08001c2f
|
||
8001bbc: 08001c2f .word 0x08001c2f
|
||
8001bc0: 08001c2f .word 0x08001c2f
|
||
8001bc4: 08001bdd .word 0x08001bdd
|
||
8001bc8: 08001bf1 .word 0x08001bf1
|
||
8001bcc: 4a7f ldr r2, [pc, #508] ; (8001dcc <HAL_GPIO_Init+0x2cc>)
|
||
8001bce: 4293 cmp r3, r2
|
||
8001bd0: d013 beq.n 8001bfa <HAL_GPIO_Init+0xfa>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
||
break;
|
||
|
||
/* Parameters are checked with assert_param */
|
||
default:
|
||
break;
|
||
8001bd2: e02c b.n 8001c2e <HAL_GPIO_Init+0x12e>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
|
||
8001bd4: 683b ldr r3, [r7, #0]
|
||
8001bd6: 68db ldr r3, [r3, #12]
|
||
8001bd8: 623b str r3, [r7, #32]
|
||
break;
|
||
8001bda: e029 b.n 8001c30 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
|
||
8001bdc: 683b ldr r3, [r7, #0]
|
||
8001bde: 68db ldr r3, [r3, #12]
|
||
8001be0: 3304 adds r3, #4
|
||
8001be2: 623b str r3, [r7, #32]
|
||
break;
|
||
8001be4: e024 b.n 8001c30 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
|
||
8001be6: 683b ldr r3, [r7, #0]
|
||
8001be8: 68db ldr r3, [r3, #12]
|
||
8001bea: 3308 adds r3, #8
|
||
8001bec: 623b str r3, [r7, #32]
|
||
break;
|
||
8001bee: e01f b.n 8001c30 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
|
||
8001bf0: 683b ldr r3, [r7, #0]
|
||
8001bf2: 68db ldr r3, [r3, #12]
|
||
8001bf4: 330c adds r3, #12
|
||
8001bf6: 623b str r3, [r7, #32]
|
||
break;
|
||
8001bf8: e01a b.n 8001c30 <HAL_GPIO_Init+0x130>
|
||
if (GPIO_Init->Pull == GPIO_NOPULL)
|
||
8001bfa: 683b ldr r3, [r7, #0]
|
||
8001bfc: 689b ldr r3, [r3, #8]
|
||
8001bfe: 2b00 cmp r3, #0
|
||
8001c00: d102 bne.n 8001c08 <HAL_GPIO_Init+0x108>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
|
||
8001c02: 2304 movs r3, #4
|
||
8001c04: 623b str r3, [r7, #32]
|
||
break;
|
||
8001c06: e013 b.n 8001c30 <HAL_GPIO_Init+0x130>
|
||
else if (GPIO_Init->Pull == GPIO_PULLUP)
|
||
8001c08: 683b ldr r3, [r7, #0]
|
||
8001c0a: 689b ldr r3, [r3, #8]
|
||
8001c0c: 2b01 cmp r3, #1
|
||
8001c0e: d105 bne.n 8001c1c <HAL_GPIO_Init+0x11c>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
||
8001c10: 2308 movs r3, #8
|
||
8001c12: 623b str r3, [r7, #32]
|
||
GPIOx->BSRR = ioposition;
|
||
8001c14: 687b ldr r3, [r7, #4]
|
||
8001c16: 69fa ldr r2, [r7, #28]
|
||
8001c18: 611a str r2, [r3, #16]
|
||
break;
|
||
8001c1a: e009 b.n 8001c30 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
|
||
8001c1c: 2308 movs r3, #8
|
||
8001c1e: 623b str r3, [r7, #32]
|
||
GPIOx->BRR = ioposition;
|
||
8001c20: 687b ldr r3, [r7, #4]
|
||
8001c22: 69fa ldr r2, [r7, #28]
|
||
8001c24: 615a str r2, [r3, #20]
|
||
break;
|
||
8001c26: e003 b.n 8001c30 <HAL_GPIO_Init+0x130>
|
||
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
|
||
8001c28: 2300 movs r3, #0
|
||
8001c2a: 623b str r3, [r7, #32]
|
||
break;
|
||
8001c2c: e000 b.n 8001c30 <HAL_GPIO_Init+0x130>
|
||
break;
|
||
8001c2e: bf00 nop
|
||
}
|
||
|
||
/* Check if the current bit belongs to first half or last half of the pin count number
|
||
in order to address CRH or CRL register*/
|
||
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
|
||
8001c30: 69bb ldr r3, [r7, #24]
|
||
8001c32: 2bff cmp r3, #255 ; 0xff
|
||
8001c34: d801 bhi.n 8001c3a <HAL_GPIO_Init+0x13a>
|
||
8001c36: 687b ldr r3, [r7, #4]
|
||
8001c38: e001 b.n 8001c3e <HAL_GPIO_Init+0x13e>
|
||
8001c3a: 687b ldr r3, [r7, #4]
|
||
8001c3c: 3304 adds r3, #4
|
||
8001c3e: 617b str r3, [r7, #20]
|
||
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
|
||
8001c40: 69bb ldr r3, [r7, #24]
|
||
8001c42: 2bff cmp r3, #255 ; 0xff
|
||
8001c44: d802 bhi.n 8001c4c <HAL_GPIO_Init+0x14c>
|
||
8001c46: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001c48: 009b lsls r3, r3, #2
|
||
8001c4a: e002 b.n 8001c52 <HAL_GPIO_Init+0x152>
|
||
8001c4c: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001c4e: 3b08 subs r3, #8
|
||
8001c50: 009b lsls r3, r3, #2
|
||
8001c52: 613b str r3, [r7, #16]
|
||
|
||
/* Apply the new configuration of the pin to the register */
|
||
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
|
||
8001c54: 697b ldr r3, [r7, #20]
|
||
8001c56: 681a ldr r2, [r3, #0]
|
||
8001c58: 210f movs r1, #15
|
||
8001c5a: 693b ldr r3, [r7, #16]
|
||
8001c5c: fa01 f303 lsl.w r3, r1, r3
|
||
8001c60: 43db mvns r3, r3
|
||
8001c62: 401a ands r2, r3
|
||
8001c64: 6a39 ldr r1, [r7, #32]
|
||
8001c66: 693b ldr r3, [r7, #16]
|
||
8001c68: fa01 f303 lsl.w r3, r1, r3
|
||
8001c6c: 431a orrs r2, r3
|
||
8001c6e: 697b ldr r3, [r7, #20]
|
||
8001c70: 601a str r2, [r3, #0]
|
||
|
||
/*--------------------- EXTI Mode Configuration ------------------------*/
|
||
/* Configure the External Interrupt or event for the current IO */
|
||
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
|
||
8001c72: 683b ldr r3, [r7, #0]
|
||
8001c74: 685b ldr r3, [r3, #4]
|
||
8001c76: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
8001c7a: 2b00 cmp r3, #0
|
||
8001c7c: f000 80c1 beq.w 8001e02 <HAL_GPIO_Init+0x302>
|
||
{
|
||
/* Enable AFIO Clock */
|
||
__HAL_RCC_AFIO_CLK_ENABLE();
|
||
8001c80: 4b53 ldr r3, [pc, #332] ; (8001dd0 <HAL_GPIO_Init+0x2d0>)
|
||
8001c82: 699b ldr r3, [r3, #24]
|
||
8001c84: 4a52 ldr r2, [pc, #328] ; (8001dd0 <HAL_GPIO_Init+0x2d0>)
|
||
8001c86: f043 0301 orr.w r3, r3, #1
|
||
8001c8a: 6193 str r3, [r2, #24]
|
||
8001c8c: 4b50 ldr r3, [pc, #320] ; (8001dd0 <HAL_GPIO_Init+0x2d0>)
|
||
8001c8e: 699b ldr r3, [r3, #24]
|
||
8001c90: f003 0301 and.w r3, r3, #1
|
||
8001c94: 60bb str r3, [r7, #8]
|
||
8001c96: 68bb ldr r3, [r7, #8]
|
||
temp = AFIO->EXTICR[position >> 2u];
|
||
8001c98: 4a4e ldr r2, [pc, #312] ; (8001dd4 <HAL_GPIO_Init+0x2d4>)
|
||
8001c9a: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001c9c: 089b lsrs r3, r3, #2
|
||
8001c9e: 3302 adds r3, #2
|
||
8001ca0: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
||
8001ca4: 60fb str r3, [r7, #12]
|
||
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
|
||
8001ca6: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001ca8: f003 0303 and.w r3, r3, #3
|
||
8001cac: 009b lsls r3, r3, #2
|
||
8001cae: 220f movs r2, #15
|
||
8001cb0: fa02 f303 lsl.w r3, r2, r3
|
||
8001cb4: 43db mvns r3, r3
|
||
8001cb6: 68fa ldr r2, [r7, #12]
|
||
8001cb8: 4013 ands r3, r2
|
||
8001cba: 60fb str r3, [r7, #12]
|
||
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
|
||
8001cbc: 687b ldr r3, [r7, #4]
|
||
8001cbe: 4a46 ldr r2, [pc, #280] ; (8001dd8 <HAL_GPIO_Init+0x2d8>)
|
||
8001cc0: 4293 cmp r3, r2
|
||
8001cc2: d01f beq.n 8001d04 <HAL_GPIO_Init+0x204>
|
||
8001cc4: 687b ldr r3, [r7, #4]
|
||
8001cc6: 4a45 ldr r2, [pc, #276] ; (8001ddc <HAL_GPIO_Init+0x2dc>)
|
||
8001cc8: 4293 cmp r3, r2
|
||
8001cca: d019 beq.n 8001d00 <HAL_GPIO_Init+0x200>
|
||
8001ccc: 687b ldr r3, [r7, #4]
|
||
8001cce: 4a44 ldr r2, [pc, #272] ; (8001de0 <HAL_GPIO_Init+0x2e0>)
|
||
8001cd0: 4293 cmp r3, r2
|
||
8001cd2: d013 beq.n 8001cfc <HAL_GPIO_Init+0x1fc>
|
||
8001cd4: 687b ldr r3, [r7, #4]
|
||
8001cd6: 4a43 ldr r2, [pc, #268] ; (8001de4 <HAL_GPIO_Init+0x2e4>)
|
||
8001cd8: 4293 cmp r3, r2
|
||
8001cda: d00d beq.n 8001cf8 <HAL_GPIO_Init+0x1f8>
|
||
8001cdc: 687b ldr r3, [r7, #4]
|
||
8001cde: 4a42 ldr r2, [pc, #264] ; (8001de8 <HAL_GPIO_Init+0x2e8>)
|
||
8001ce0: 4293 cmp r3, r2
|
||
8001ce2: d007 beq.n 8001cf4 <HAL_GPIO_Init+0x1f4>
|
||
8001ce4: 687b ldr r3, [r7, #4]
|
||
8001ce6: 4a41 ldr r2, [pc, #260] ; (8001dec <HAL_GPIO_Init+0x2ec>)
|
||
8001ce8: 4293 cmp r3, r2
|
||
8001cea: d101 bne.n 8001cf0 <HAL_GPIO_Init+0x1f0>
|
||
8001cec: 2305 movs r3, #5
|
||
8001cee: e00a b.n 8001d06 <HAL_GPIO_Init+0x206>
|
||
8001cf0: 2306 movs r3, #6
|
||
8001cf2: e008 b.n 8001d06 <HAL_GPIO_Init+0x206>
|
||
8001cf4: 2304 movs r3, #4
|
||
8001cf6: e006 b.n 8001d06 <HAL_GPIO_Init+0x206>
|
||
8001cf8: 2303 movs r3, #3
|
||
8001cfa: e004 b.n 8001d06 <HAL_GPIO_Init+0x206>
|
||
8001cfc: 2302 movs r3, #2
|
||
8001cfe: e002 b.n 8001d06 <HAL_GPIO_Init+0x206>
|
||
8001d00: 2301 movs r3, #1
|
||
8001d02: e000 b.n 8001d06 <HAL_GPIO_Init+0x206>
|
||
8001d04: 2300 movs r3, #0
|
||
8001d06: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8001d08: f002 0203 and.w r2, r2, #3
|
||
8001d0c: 0092 lsls r2, r2, #2
|
||
8001d0e: 4093 lsls r3, r2
|
||
8001d10: 68fa ldr r2, [r7, #12]
|
||
8001d12: 4313 orrs r3, r2
|
||
8001d14: 60fb str r3, [r7, #12]
|
||
AFIO->EXTICR[position >> 2u] = temp;
|
||
8001d16: 492f ldr r1, [pc, #188] ; (8001dd4 <HAL_GPIO_Init+0x2d4>)
|
||
8001d18: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001d1a: 089b lsrs r3, r3, #2
|
||
8001d1c: 3302 adds r3, #2
|
||
8001d1e: 68fa ldr r2, [r7, #12]
|
||
8001d20: f841 2023 str.w r2, [r1, r3, lsl #2]
|
||
|
||
|
||
/* Configure the interrupt mask */
|
||
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
|
||
8001d24: 683b ldr r3, [r7, #0]
|
||
8001d26: 685b ldr r3, [r3, #4]
|
||
8001d28: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8001d2c: 2b00 cmp r3, #0
|
||
8001d2e: d006 beq.n 8001d3e <HAL_GPIO_Init+0x23e>
|
||
{
|
||
SET_BIT(EXTI->IMR, iocurrent);
|
||
8001d30: 4b2f ldr r3, [pc, #188] ; (8001df0 <HAL_GPIO_Init+0x2f0>)
|
||
8001d32: 681a ldr r2, [r3, #0]
|
||
8001d34: 492e ldr r1, [pc, #184] ; (8001df0 <HAL_GPIO_Init+0x2f0>)
|
||
8001d36: 69bb ldr r3, [r7, #24]
|
||
8001d38: 4313 orrs r3, r2
|
||
8001d3a: 600b str r3, [r1, #0]
|
||
8001d3c: e006 b.n 8001d4c <HAL_GPIO_Init+0x24c>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->IMR, iocurrent);
|
||
8001d3e: 4b2c ldr r3, [pc, #176] ; (8001df0 <HAL_GPIO_Init+0x2f0>)
|
||
8001d40: 681a ldr r2, [r3, #0]
|
||
8001d42: 69bb ldr r3, [r7, #24]
|
||
8001d44: 43db mvns r3, r3
|
||
8001d46: 492a ldr r1, [pc, #168] ; (8001df0 <HAL_GPIO_Init+0x2f0>)
|
||
8001d48: 4013 ands r3, r2
|
||
8001d4a: 600b str r3, [r1, #0]
|
||
}
|
||
|
||
/* Configure the event mask */
|
||
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
|
||
8001d4c: 683b ldr r3, [r7, #0]
|
||
8001d4e: 685b ldr r3, [r3, #4]
|
||
8001d50: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8001d54: 2b00 cmp r3, #0
|
||
8001d56: d006 beq.n 8001d66 <HAL_GPIO_Init+0x266>
|
||
{
|
||
SET_BIT(EXTI->EMR, iocurrent);
|
||
8001d58: 4b25 ldr r3, [pc, #148] ; (8001df0 <HAL_GPIO_Init+0x2f0>)
|
||
8001d5a: 685a ldr r2, [r3, #4]
|
||
8001d5c: 4924 ldr r1, [pc, #144] ; (8001df0 <HAL_GPIO_Init+0x2f0>)
|
||
8001d5e: 69bb ldr r3, [r7, #24]
|
||
8001d60: 4313 orrs r3, r2
|
||
8001d62: 604b str r3, [r1, #4]
|
||
8001d64: e006 b.n 8001d74 <HAL_GPIO_Init+0x274>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->EMR, iocurrent);
|
||
8001d66: 4b22 ldr r3, [pc, #136] ; (8001df0 <HAL_GPIO_Init+0x2f0>)
|
||
8001d68: 685a ldr r2, [r3, #4]
|
||
8001d6a: 69bb ldr r3, [r7, #24]
|
||
8001d6c: 43db mvns r3, r3
|
||
8001d6e: 4920 ldr r1, [pc, #128] ; (8001df0 <HAL_GPIO_Init+0x2f0>)
|
||
8001d70: 4013 ands r3, r2
|
||
8001d72: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Enable or disable the rising trigger */
|
||
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
|
||
8001d74: 683b ldr r3, [r7, #0]
|
||
8001d76: 685b ldr r3, [r3, #4]
|
||
8001d78: f403 1380 and.w r3, r3, #1048576 ; 0x100000
|
||
8001d7c: 2b00 cmp r3, #0
|
||
8001d7e: d006 beq.n 8001d8e <HAL_GPIO_Init+0x28e>
|
||
{
|
||
SET_BIT(EXTI->RTSR, iocurrent);
|
||
8001d80: 4b1b ldr r3, [pc, #108] ; (8001df0 <HAL_GPIO_Init+0x2f0>)
|
||
8001d82: 689a ldr r2, [r3, #8]
|
||
8001d84: 491a ldr r1, [pc, #104] ; (8001df0 <HAL_GPIO_Init+0x2f0>)
|
||
8001d86: 69bb ldr r3, [r7, #24]
|
||
8001d88: 4313 orrs r3, r2
|
||
8001d8a: 608b str r3, [r1, #8]
|
||
8001d8c: e006 b.n 8001d9c <HAL_GPIO_Init+0x29c>
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->RTSR, iocurrent);
|
||
8001d8e: 4b18 ldr r3, [pc, #96] ; (8001df0 <HAL_GPIO_Init+0x2f0>)
|
||
8001d90: 689a ldr r2, [r3, #8]
|
||
8001d92: 69bb ldr r3, [r7, #24]
|
||
8001d94: 43db mvns r3, r3
|
||
8001d96: 4916 ldr r1, [pc, #88] ; (8001df0 <HAL_GPIO_Init+0x2f0>)
|
||
8001d98: 4013 ands r3, r2
|
||
8001d9a: 608b str r3, [r1, #8]
|
||
}
|
||
|
||
/* Enable or disable the falling trigger */
|
||
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
|
||
8001d9c: 683b ldr r3, [r7, #0]
|
||
8001d9e: 685b ldr r3, [r3, #4]
|
||
8001da0: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
||
8001da4: 2b00 cmp r3, #0
|
||
8001da6: d025 beq.n 8001df4 <HAL_GPIO_Init+0x2f4>
|
||
{
|
||
SET_BIT(EXTI->FTSR, iocurrent);
|
||
8001da8: 4b11 ldr r3, [pc, #68] ; (8001df0 <HAL_GPIO_Init+0x2f0>)
|
||
8001daa: 68da ldr r2, [r3, #12]
|
||
8001dac: 4910 ldr r1, [pc, #64] ; (8001df0 <HAL_GPIO_Init+0x2f0>)
|
||
8001dae: 69bb ldr r3, [r7, #24]
|
||
8001db0: 4313 orrs r3, r2
|
||
8001db2: 60cb str r3, [r1, #12]
|
||
8001db4: e025 b.n 8001e02 <HAL_GPIO_Init+0x302>
|
||
8001db6: bf00 nop
|
||
8001db8: 10320000 .word 0x10320000
|
||
8001dbc: 10310000 .word 0x10310000
|
||
8001dc0: 10220000 .word 0x10220000
|
||
8001dc4: 10210000 .word 0x10210000
|
||
8001dc8: 10120000 .word 0x10120000
|
||
8001dcc: 10110000 .word 0x10110000
|
||
8001dd0: 40021000 .word 0x40021000
|
||
8001dd4: 40010000 .word 0x40010000
|
||
8001dd8: 40010800 .word 0x40010800
|
||
8001ddc: 40010c00 .word 0x40010c00
|
||
8001de0: 40011000 .word 0x40011000
|
||
8001de4: 40011400 .word 0x40011400
|
||
8001de8: 40011800 .word 0x40011800
|
||
8001dec: 40011c00 .word 0x40011c00
|
||
8001df0: 40010400 .word 0x40010400
|
||
}
|
||
else
|
||
{
|
||
CLEAR_BIT(EXTI->FTSR, iocurrent);
|
||
8001df4: 4b0b ldr r3, [pc, #44] ; (8001e24 <HAL_GPIO_Init+0x324>)
|
||
8001df6: 68da ldr r2, [r3, #12]
|
||
8001df8: 69bb ldr r3, [r7, #24]
|
||
8001dfa: 43db mvns r3, r3
|
||
8001dfc: 4909 ldr r1, [pc, #36] ; (8001e24 <HAL_GPIO_Init+0x324>)
|
||
8001dfe: 4013 ands r3, r2
|
||
8001e00: 60cb str r3, [r1, #12]
|
||
}
|
||
}
|
||
}
|
||
|
||
position++;
|
||
8001e02: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001e04: 3301 adds r3, #1
|
||
8001e06: 627b str r3, [r7, #36] ; 0x24
|
||
while (((GPIO_Init->Pin) >> position) != 0x00u)
|
||
8001e08: 683b ldr r3, [r7, #0]
|
||
8001e0a: 681a ldr r2, [r3, #0]
|
||
8001e0c: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8001e0e: fa22 f303 lsr.w r3, r2, r3
|
||
8001e12: 2b00 cmp r3, #0
|
||
8001e14: f47f ae7e bne.w 8001b14 <HAL_GPIO_Init+0x14>
|
||
}
|
||
}
|
||
8001e18: bf00 nop
|
||
8001e1a: bf00 nop
|
||
8001e1c: 372c adds r7, #44 ; 0x2c
|
||
8001e1e: 46bd mov sp, r7
|
||
8001e20: bc80 pop {r7}
|
||
8001e22: 4770 bx lr
|
||
8001e24: 40010400 .word 0x40010400
|
||
|
||
08001e28 <HAL_GPIO_ReadPin>:
|
||
* @param GPIO_Pin: specifies the port bit to read.
|
||
* This parameter can be GPIO_PIN_x where x can be (0..15).
|
||
* @retval The input port pin value.
|
||
*/
|
||
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
|
||
{
|
||
8001e28: b480 push {r7}
|
||
8001e2a: b085 sub sp, #20
|
||
8001e2c: af00 add r7, sp, #0
|
||
8001e2e: 6078 str r0, [r7, #4]
|
||
8001e30: 460b mov r3, r1
|
||
8001e32: 807b strh r3, [r7, #2]
|
||
GPIO_PinState bitstatus;
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||
|
||
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
|
||
8001e34: 687b ldr r3, [r7, #4]
|
||
8001e36: 689a ldr r2, [r3, #8]
|
||
8001e38: 887b ldrh r3, [r7, #2]
|
||
8001e3a: 4013 ands r3, r2
|
||
8001e3c: 2b00 cmp r3, #0
|
||
8001e3e: d002 beq.n 8001e46 <HAL_GPIO_ReadPin+0x1e>
|
||
{
|
||
bitstatus = GPIO_PIN_SET;
|
||
8001e40: 2301 movs r3, #1
|
||
8001e42: 73fb strb r3, [r7, #15]
|
||
8001e44: e001 b.n 8001e4a <HAL_GPIO_ReadPin+0x22>
|
||
}
|
||
else
|
||
{
|
||
bitstatus = GPIO_PIN_RESET;
|
||
8001e46: 2300 movs r3, #0
|
||
8001e48: 73fb strb r3, [r7, #15]
|
||
}
|
||
return bitstatus;
|
||
8001e4a: 7bfb ldrb r3, [r7, #15]
|
||
}
|
||
8001e4c: 4618 mov r0, r3
|
||
8001e4e: 3714 adds r7, #20
|
||
8001e50: 46bd mov sp, r7
|
||
8001e52: bc80 pop {r7}
|
||
8001e54: 4770 bx lr
|
||
|
||
08001e56 <HAL_GPIO_WritePin>:
|
||
* @arg GPIO_PIN_RESET: to clear the port pin
|
||
* @arg GPIO_PIN_SET: to set the port pin
|
||
* @retval None
|
||
*/
|
||
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
|
||
{
|
||
8001e56: b480 push {r7}
|
||
8001e58: b083 sub sp, #12
|
||
8001e5a: af00 add r7, sp, #0
|
||
8001e5c: 6078 str r0, [r7, #4]
|
||
8001e5e: 460b mov r3, r1
|
||
8001e60: 807b strh r3, [r7, #2]
|
||
8001e62: 4613 mov r3, r2
|
||
8001e64: 707b strb r3, [r7, #1]
|
||
/* Check the parameters */
|
||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||
assert_param(IS_GPIO_PIN_ACTION(PinState));
|
||
|
||
if (PinState != GPIO_PIN_RESET)
|
||
8001e66: 787b ldrb r3, [r7, #1]
|
||
8001e68: 2b00 cmp r3, #0
|
||
8001e6a: d003 beq.n 8001e74 <HAL_GPIO_WritePin+0x1e>
|
||
{
|
||
GPIOx->BSRR = GPIO_Pin;
|
||
8001e6c: 887a ldrh r2, [r7, #2]
|
||
8001e6e: 687b ldr r3, [r7, #4]
|
||
8001e70: 611a str r2, [r3, #16]
|
||
}
|
||
else
|
||
{
|
||
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
||
}
|
||
}
|
||
8001e72: e003 b.n 8001e7c <HAL_GPIO_WritePin+0x26>
|
||
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
|
||
8001e74: 887b ldrh r3, [r7, #2]
|
||
8001e76: 041a lsls r2, r3, #16
|
||
8001e78: 687b ldr r3, [r7, #4]
|
||
8001e7a: 611a str r2, [r3, #16]
|
||
}
|
||
8001e7c: bf00 nop
|
||
8001e7e: 370c adds r7, #12
|
||
8001e80: 46bd mov sp, r7
|
||
8001e82: bc80 pop {r7}
|
||
8001e84: 4770 bx lr
|
||
...
|
||
|
||
08001e88 <HAL_I2C_Init>:
|
||
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
||
* the configuration information for the specified I2C.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
|
||
{
|
||
8001e88: b580 push {r7, lr}
|
||
8001e8a: b084 sub sp, #16
|
||
8001e8c: af00 add r7, sp, #0
|
||
8001e8e: 6078 str r0, [r7, #4]
|
||
uint32_t freqrange;
|
||
uint32_t pclk1;
|
||
|
||
/* Check the I2C handle allocation */
|
||
if (hi2c == NULL)
|
||
8001e90: 687b ldr r3, [r7, #4]
|
||
8001e92: 2b00 cmp r3, #0
|
||
8001e94: d101 bne.n 8001e9a <HAL_I2C_Init+0x12>
|
||
{
|
||
return HAL_ERROR;
|
||
8001e96: 2301 movs r3, #1
|
||
8001e98: e12b b.n 80020f2 <HAL_I2C_Init+0x26a>
|
||
assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
|
||
assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
|
||
assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
|
||
assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
|
||
|
||
if (hi2c->State == HAL_I2C_STATE_RESET)
|
||
8001e9a: 687b ldr r3, [r7, #4]
|
||
8001e9c: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
||
8001ea0: b2db uxtb r3, r3
|
||
8001ea2: 2b00 cmp r3, #0
|
||
8001ea4: d106 bne.n 8001eb4 <HAL_I2C_Init+0x2c>
|
||
{
|
||
/* Allocate lock resource and initialize it */
|
||
hi2c->Lock = HAL_UNLOCKED;
|
||
8001ea6: 687b ldr r3, [r7, #4]
|
||
8001ea8: 2200 movs r2, #0
|
||
8001eaa: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
/* Init the low level hardware : GPIO, CLOCK, NVIC */
|
||
hi2c->MspInitCallback(hi2c);
|
||
#else
|
||
/* Init the low level hardware : GPIO, CLOCK, NVIC */
|
||
HAL_I2C_MspInit(hi2c);
|
||
8001eae: 6878 ldr r0, [r7, #4]
|
||
8001eb0: f7ff fb0a bl 80014c8 <HAL_I2C_MspInit>
|
||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||
}
|
||
|
||
hi2c->State = HAL_I2C_STATE_BUSY;
|
||
8001eb4: 687b ldr r3, [r7, #4]
|
||
8001eb6: 2224 movs r2, #36 ; 0x24
|
||
8001eb8: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
|
||
/* Disable the selected I2C peripheral */
|
||
__HAL_I2C_DISABLE(hi2c);
|
||
8001ebc: 687b ldr r3, [r7, #4]
|
||
8001ebe: 681b ldr r3, [r3, #0]
|
||
8001ec0: 681a ldr r2, [r3, #0]
|
||
8001ec2: 687b ldr r3, [r7, #4]
|
||
8001ec4: 681b ldr r3, [r3, #0]
|
||
8001ec6: f022 0201 bic.w r2, r2, #1
|
||
8001eca: 601a str r2, [r3, #0]
|
||
|
||
/*Reset I2C*/
|
||
hi2c->Instance->CR1 |= I2C_CR1_SWRST;
|
||
8001ecc: 687b ldr r3, [r7, #4]
|
||
8001ece: 681b ldr r3, [r3, #0]
|
||
8001ed0: 681a ldr r2, [r3, #0]
|
||
8001ed2: 687b ldr r3, [r7, #4]
|
||
8001ed4: 681b ldr r3, [r3, #0]
|
||
8001ed6: f442 4200 orr.w r2, r2, #32768 ; 0x8000
|
||
8001eda: 601a str r2, [r3, #0]
|
||
hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
|
||
8001edc: 687b ldr r3, [r7, #4]
|
||
8001ede: 681b ldr r3, [r3, #0]
|
||
8001ee0: 681a ldr r2, [r3, #0]
|
||
8001ee2: 687b ldr r3, [r7, #4]
|
||
8001ee4: 681b ldr r3, [r3, #0]
|
||
8001ee6: f422 4200 bic.w r2, r2, #32768 ; 0x8000
|
||
8001eea: 601a str r2, [r3, #0]
|
||
|
||
/* Get PCLK1 frequency */
|
||
pclk1 = HAL_RCC_GetPCLK1Freq();
|
||
8001eec: f001 fba0 bl 8003630 <HAL_RCC_GetPCLK1Freq>
|
||
8001ef0: 60f8 str r0, [r7, #12]
|
||
|
||
/* Check the minimum allowed PCLK1 frequency */
|
||
if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
|
||
8001ef2: 687b ldr r3, [r7, #4]
|
||
8001ef4: 685b ldr r3, [r3, #4]
|
||
8001ef6: 4a81 ldr r2, [pc, #516] ; (80020fc <HAL_I2C_Init+0x274>)
|
||
8001ef8: 4293 cmp r3, r2
|
||
8001efa: d807 bhi.n 8001f0c <HAL_I2C_Init+0x84>
|
||
8001efc: 68fb ldr r3, [r7, #12]
|
||
8001efe: 4a80 ldr r2, [pc, #512] ; (8002100 <HAL_I2C_Init+0x278>)
|
||
8001f00: 4293 cmp r3, r2
|
||
8001f02: bf94 ite ls
|
||
8001f04: 2301 movls r3, #1
|
||
8001f06: 2300 movhi r3, #0
|
||
8001f08: b2db uxtb r3, r3
|
||
8001f0a: e006 b.n 8001f1a <HAL_I2C_Init+0x92>
|
||
8001f0c: 68fb ldr r3, [r7, #12]
|
||
8001f0e: 4a7d ldr r2, [pc, #500] ; (8002104 <HAL_I2C_Init+0x27c>)
|
||
8001f10: 4293 cmp r3, r2
|
||
8001f12: bf94 ite ls
|
||
8001f14: 2301 movls r3, #1
|
||
8001f16: 2300 movhi r3, #0
|
||
8001f18: b2db uxtb r3, r3
|
||
8001f1a: 2b00 cmp r3, #0
|
||
8001f1c: d001 beq.n 8001f22 <HAL_I2C_Init+0x9a>
|
||
{
|
||
return HAL_ERROR;
|
||
8001f1e: 2301 movs r3, #1
|
||
8001f20: e0e7 b.n 80020f2 <HAL_I2C_Init+0x26a>
|
||
}
|
||
|
||
/* Calculate frequency range */
|
||
freqrange = I2C_FREQRANGE(pclk1);
|
||
8001f22: 68fb ldr r3, [r7, #12]
|
||
8001f24: 4a78 ldr r2, [pc, #480] ; (8002108 <HAL_I2C_Init+0x280>)
|
||
8001f26: fba2 2303 umull r2, r3, r2, r3
|
||
8001f2a: 0c9b lsrs r3, r3, #18
|
||
8001f2c: 60bb str r3, [r7, #8]
|
||
|
||
/*---------------------------- I2Cx CR2 Configuration ----------------------*/
|
||
/* Configure I2Cx: Frequency range */
|
||
MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
|
||
8001f2e: 687b ldr r3, [r7, #4]
|
||
8001f30: 681b ldr r3, [r3, #0]
|
||
8001f32: 685b ldr r3, [r3, #4]
|
||
8001f34: f023 013f bic.w r1, r3, #63 ; 0x3f
|
||
8001f38: 687b ldr r3, [r7, #4]
|
||
8001f3a: 681b ldr r3, [r3, #0]
|
||
8001f3c: 68ba ldr r2, [r7, #8]
|
||
8001f3e: 430a orrs r2, r1
|
||
8001f40: 605a str r2, [r3, #4]
|
||
|
||
/*---------------------------- I2Cx TRISE Configuration --------------------*/
|
||
/* Configure I2Cx: Rise Time */
|
||
MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
|
||
8001f42: 687b ldr r3, [r7, #4]
|
||
8001f44: 681b ldr r3, [r3, #0]
|
||
8001f46: 6a1b ldr r3, [r3, #32]
|
||
8001f48: f023 013f bic.w r1, r3, #63 ; 0x3f
|
||
8001f4c: 687b ldr r3, [r7, #4]
|
||
8001f4e: 685b ldr r3, [r3, #4]
|
||
8001f50: 4a6a ldr r2, [pc, #424] ; (80020fc <HAL_I2C_Init+0x274>)
|
||
8001f52: 4293 cmp r3, r2
|
||
8001f54: d802 bhi.n 8001f5c <HAL_I2C_Init+0xd4>
|
||
8001f56: 68bb ldr r3, [r7, #8]
|
||
8001f58: 3301 adds r3, #1
|
||
8001f5a: e009 b.n 8001f70 <HAL_I2C_Init+0xe8>
|
||
8001f5c: 68bb ldr r3, [r7, #8]
|
||
8001f5e: f44f 7296 mov.w r2, #300 ; 0x12c
|
||
8001f62: fb02 f303 mul.w r3, r2, r3
|
||
8001f66: 4a69 ldr r2, [pc, #420] ; (800210c <HAL_I2C_Init+0x284>)
|
||
8001f68: fba2 2303 umull r2, r3, r2, r3
|
||
8001f6c: 099b lsrs r3, r3, #6
|
||
8001f6e: 3301 adds r3, #1
|
||
8001f70: 687a ldr r2, [r7, #4]
|
||
8001f72: 6812 ldr r2, [r2, #0]
|
||
8001f74: 430b orrs r3, r1
|
||
8001f76: 6213 str r3, [r2, #32]
|
||
|
||
/*---------------------------- I2Cx CCR Configuration ----------------------*/
|
||
/* Configure I2Cx: Speed */
|
||
MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
|
||
8001f78: 687b ldr r3, [r7, #4]
|
||
8001f7a: 681b ldr r3, [r3, #0]
|
||
8001f7c: 69db ldr r3, [r3, #28]
|
||
8001f7e: f423 424f bic.w r2, r3, #52992 ; 0xcf00
|
||
8001f82: f022 02ff bic.w r2, r2, #255 ; 0xff
|
||
8001f86: 687b ldr r3, [r7, #4]
|
||
8001f88: 685b ldr r3, [r3, #4]
|
||
8001f8a: 495c ldr r1, [pc, #368] ; (80020fc <HAL_I2C_Init+0x274>)
|
||
8001f8c: 428b cmp r3, r1
|
||
8001f8e: d819 bhi.n 8001fc4 <HAL_I2C_Init+0x13c>
|
||
8001f90: 68fb ldr r3, [r7, #12]
|
||
8001f92: 1e59 subs r1, r3, #1
|
||
8001f94: 687b ldr r3, [r7, #4]
|
||
8001f96: 685b ldr r3, [r3, #4]
|
||
8001f98: 005b lsls r3, r3, #1
|
||
8001f9a: fbb1 f3f3 udiv r3, r1, r3
|
||
8001f9e: 1c59 adds r1, r3, #1
|
||
8001fa0: f640 73fc movw r3, #4092 ; 0xffc
|
||
8001fa4: 400b ands r3, r1
|
||
8001fa6: 2b00 cmp r3, #0
|
||
8001fa8: d00a beq.n 8001fc0 <HAL_I2C_Init+0x138>
|
||
8001faa: 68fb ldr r3, [r7, #12]
|
||
8001fac: 1e59 subs r1, r3, #1
|
||
8001fae: 687b ldr r3, [r7, #4]
|
||
8001fb0: 685b ldr r3, [r3, #4]
|
||
8001fb2: 005b lsls r3, r3, #1
|
||
8001fb4: fbb1 f3f3 udiv r3, r1, r3
|
||
8001fb8: 3301 adds r3, #1
|
||
8001fba: f3c3 030b ubfx r3, r3, #0, #12
|
||
8001fbe: e051 b.n 8002064 <HAL_I2C_Init+0x1dc>
|
||
8001fc0: 2304 movs r3, #4
|
||
8001fc2: e04f b.n 8002064 <HAL_I2C_Init+0x1dc>
|
||
8001fc4: 687b ldr r3, [r7, #4]
|
||
8001fc6: 689b ldr r3, [r3, #8]
|
||
8001fc8: 2b00 cmp r3, #0
|
||
8001fca: d111 bne.n 8001ff0 <HAL_I2C_Init+0x168>
|
||
8001fcc: 68fb ldr r3, [r7, #12]
|
||
8001fce: 1e58 subs r0, r3, #1
|
||
8001fd0: 687b ldr r3, [r7, #4]
|
||
8001fd2: 6859 ldr r1, [r3, #4]
|
||
8001fd4: 460b mov r3, r1
|
||
8001fd6: 005b lsls r3, r3, #1
|
||
8001fd8: 440b add r3, r1
|
||
8001fda: fbb0 f3f3 udiv r3, r0, r3
|
||
8001fde: 3301 adds r3, #1
|
||
8001fe0: f3c3 030b ubfx r3, r3, #0, #12
|
||
8001fe4: 2b00 cmp r3, #0
|
||
8001fe6: bf0c ite eq
|
||
8001fe8: 2301 moveq r3, #1
|
||
8001fea: 2300 movne r3, #0
|
||
8001fec: b2db uxtb r3, r3
|
||
8001fee: e012 b.n 8002016 <HAL_I2C_Init+0x18e>
|
||
8001ff0: 68fb ldr r3, [r7, #12]
|
||
8001ff2: 1e58 subs r0, r3, #1
|
||
8001ff4: 687b ldr r3, [r7, #4]
|
||
8001ff6: 6859 ldr r1, [r3, #4]
|
||
8001ff8: 460b mov r3, r1
|
||
8001ffa: 009b lsls r3, r3, #2
|
||
8001ffc: 440b add r3, r1
|
||
8001ffe: 0099 lsls r1, r3, #2
|
||
8002000: 440b add r3, r1
|
||
8002002: fbb0 f3f3 udiv r3, r0, r3
|
||
8002006: 3301 adds r3, #1
|
||
8002008: f3c3 030b ubfx r3, r3, #0, #12
|
||
800200c: 2b00 cmp r3, #0
|
||
800200e: bf0c ite eq
|
||
8002010: 2301 moveq r3, #1
|
||
8002012: 2300 movne r3, #0
|
||
8002014: b2db uxtb r3, r3
|
||
8002016: 2b00 cmp r3, #0
|
||
8002018: d001 beq.n 800201e <HAL_I2C_Init+0x196>
|
||
800201a: 2301 movs r3, #1
|
||
800201c: e022 b.n 8002064 <HAL_I2C_Init+0x1dc>
|
||
800201e: 687b ldr r3, [r7, #4]
|
||
8002020: 689b ldr r3, [r3, #8]
|
||
8002022: 2b00 cmp r3, #0
|
||
8002024: d10e bne.n 8002044 <HAL_I2C_Init+0x1bc>
|
||
8002026: 68fb ldr r3, [r7, #12]
|
||
8002028: 1e58 subs r0, r3, #1
|
||
800202a: 687b ldr r3, [r7, #4]
|
||
800202c: 6859 ldr r1, [r3, #4]
|
||
800202e: 460b mov r3, r1
|
||
8002030: 005b lsls r3, r3, #1
|
||
8002032: 440b add r3, r1
|
||
8002034: fbb0 f3f3 udiv r3, r0, r3
|
||
8002038: 3301 adds r3, #1
|
||
800203a: f3c3 030b ubfx r3, r3, #0, #12
|
||
800203e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
||
8002042: e00f b.n 8002064 <HAL_I2C_Init+0x1dc>
|
||
8002044: 68fb ldr r3, [r7, #12]
|
||
8002046: 1e58 subs r0, r3, #1
|
||
8002048: 687b ldr r3, [r7, #4]
|
||
800204a: 6859 ldr r1, [r3, #4]
|
||
800204c: 460b mov r3, r1
|
||
800204e: 009b lsls r3, r3, #2
|
||
8002050: 440b add r3, r1
|
||
8002052: 0099 lsls r1, r3, #2
|
||
8002054: 440b add r3, r1
|
||
8002056: fbb0 f3f3 udiv r3, r0, r3
|
||
800205a: 3301 adds r3, #1
|
||
800205c: f3c3 030b ubfx r3, r3, #0, #12
|
||
8002060: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
||
8002064: 6879 ldr r1, [r7, #4]
|
||
8002066: 6809 ldr r1, [r1, #0]
|
||
8002068: 4313 orrs r3, r2
|
||
800206a: 61cb str r3, [r1, #28]
|
||
|
||
/*---------------------------- I2Cx CR1 Configuration ----------------------*/
|
||
/* Configure I2Cx: Generalcall and NoStretch mode */
|
||
MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
|
||
800206c: 687b ldr r3, [r7, #4]
|
||
800206e: 681b ldr r3, [r3, #0]
|
||
8002070: 681b ldr r3, [r3, #0]
|
||
8002072: f023 01c0 bic.w r1, r3, #192 ; 0xc0
|
||
8002076: 687b ldr r3, [r7, #4]
|
||
8002078: 69da ldr r2, [r3, #28]
|
||
800207a: 687b ldr r3, [r7, #4]
|
||
800207c: 6a1b ldr r3, [r3, #32]
|
||
800207e: 431a orrs r2, r3
|
||
8002080: 687b ldr r3, [r7, #4]
|
||
8002082: 681b ldr r3, [r3, #0]
|
||
8002084: 430a orrs r2, r1
|
||
8002086: 601a str r2, [r3, #0]
|
||
|
||
/*---------------------------- I2Cx OAR1 Configuration ---------------------*/
|
||
/* Configure I2Cx: Own Address1 and addressing mode */
|
||
MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
|
||
8002088: 687b ldr r3, [r7, #4]
|
||
800208a: 681b ldr r3, [r3, #0]
|
||
800208c: 689b ldr r3, [r3, #8]
|
||
800208e: f423 4303 bic.w r3, r3, #33536 ; 0x8300
|
||
8002092: f023 03ff bic.w r3, r3, #255 ; 0xff
|
||
8002096: 687a ldr r2, [r7, #4]
|
||
8002098: 6911 ldr r1, [r2, #16]
|
||
800209a: 687a ldr r2, [r7, #4]
|
||
800209c: 68d2 ldr r2, [r2, #12]
|
||
800209e: 4311 orrs r1, r2
|
||
80020a0: 687a ldr r2, [r7, #4]
|
||
80020a2: 6812 ldr r2, [r2, #0]
|
||
80020a4: 430b orrs r3, r1
|
||
80020a6: 6093 str r3, [r2, #8]
|
||
|
||
/*---------------------------- I2Cx OAR2 Configuration ---------------------*/
|
||
/* Configure I2Cx: Dual mode and Own Address2 */
|
||
MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
|
||
80020a8: 687b ldr r3, [r7, #4]
|
||
80020aa: 681b ldr r3, [r3, #0]
|
||
80020ac: 68db ldr r3, [r3, #12]
|
||
80020ae: f023 01ff bic.w r1, r3, #255 ; 0xff
|
||
80020b2: 687b ldr r3, [r7, #4]
|
||
80020b4: 695a ldr r2, [r3, #20]
|
||
80020b6: 687b ldr r3, [r7, #4]
|
||
80020b8: 699b ldr r3, [r3, #24]
|
||
80020ba: 431a orrs r2, r3
|
||
80020bc: 687b ldr r3, [r7, #4]
|
||
80020be: 681b ldr r3, [r3, #0]
|
||
80020c0: 430a orrs r2, r1
|
||
80020c2: 60da str r2, [r3, #12]
|
||
|
||
/* Enable the selected I2C peripheral */
|
||
__HAL_I2C_ENABLE(hi2c);
|
||
80020c4: 687b ldr r3, [r7, #4]
|
||
80020c6: 681b ldr r3, [r3, #0]
|
||
80020c8: 681a ldr r2, [r3, #0]
|
||
80020ca: 687b ldr r3, [r7, #4]
|
||
80020cc: 681b ldr r3, [r3, #0]
|
||
80020ce: f042 0201 orr.w r2, r2, #1
|
||
80020d2: 601a str r2, [r3, #0]
|
||
|
||
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
||
80020d4: 687b ldr r3, [r7, #4]
|
||
80020d6: 2200 movs r2, #0
|
||
80020d8: 641a str r2, [r3, #64] ; 0x40
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
80020da: 687b ldr r3, [r7, #4]
|
||
80020dc: 2220 movs r2, #32
|
||
80020de: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
80020e2: 687b ldr r3, [r7, #4]
|
||
80020e4: 2200 movs r2, #0
|
||
80020e6: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
80020e8: 687b ldr r3, [r7, #4]
|
||
80020ea: 2200 movs r2, #0
|
||
80020ec: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
|
||
return HAL_OK;
|
||
80020f0: 2300 movs r3, #0
|
||
}
|
||
80020f2: 4618 mov r0, r3
|
||
80020f4: 3710 adds r7, #16
|
||
80020f6: 46bd mov sp, r7
|
||
80020f8: bd80 pop {r7, pc}
|
||
80020fa: bf00 nop
|
||
80020fc: 000186a0 .word 0x000186a0
|
||
8002100: 001e847f .word 0x001e847f
|
||
8002104: 003d08ff .word 0x003d08ff
|
||
8002108: 431bde83 .word 0x431bde83
|
||
800210c: 10624dd3 .word 0x10624dd3
|
||
|
||
08002110 <HAL_I2C_Mem_Write>:
|
||
* @param Size Amount of data to be sent
|
||
* @param Timeout Timeout duration
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
||
{
|
||
8002110: b580 push {r7, lr}
|
||
8002112: b088 sub sp, #32
|
||
8002114: af02 add r7, sp, #8
|
||
8002116: 60f8 str r0, [r7, #12]
|
||
8002118: 4608 mov r0, r1
|
||
800211a: 4611 mov r1, r2
|
||
800211c: 461a mov r2, r3
|
||
800211e: 4603 mov r3, r0
|
||
8002120: 817b strh r3, [r7, #10]
|
||
8002122: 460b mov r3, r1
|
||
8002124: 813b strh r3, [r7, #8]
|
||
8002126: 4613 mov r3, r2
|
||
8002128: 80fb strh r3, [r7, #6]
|
||
/* Init tickstart for timeout management*/
|
||
uint32_t tickstart = HAL_GetTick();
|
||
800212a: f7ff fbd7 bl 80018dc <HAL_GetTick>
|
||
800212e: 6178 str r0, [r7, #20]
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
|
||
|
||
if (hi2c->State == HAL_I2C_STATE_READY)
|
||
8002130: 68fb ldr r3, [r7, #12]
|
||
8002132: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
||
8002136: b2db uxtb r3, r3
|
||
8002138: 2b20 cmp r3, #32
|
||
800213a: f040 80d9 bne.w 80022f0 <HAL_I2C_Mem_Write+0x1e0>
|
||
{
|
||
/* Wait until BUSY flag is reset */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
|
||
800213e: 697b ldr r3, [r7, #20]
|
||
8002140: 9300 str r3, [sp, #0]
|
||
8002142: 2319 movs r3, #25
|
||
8002144: 2201 movs r2, #1
|
||
8002146: 496d ldr r1, [pc, #436] ; (80022fc <HAL_I2C_Mem_Write+0x1ec>)
|
||
8002148: 68f8 ldr r0, [r7, #12]
|
||
800214a: f000 fcc1 bl 8002ad0 <I2C_WaitOnFlagUntilTimeout>
|
||
800214e: 4603 mov r3, r0
|
||
8002150: 2b00 cmp r3, #0
|
||
8002152: d001 beq.n 8002158 <HAL_I2C_Mem_Write+0x48>
|
||
{
|
||
return HAL_BUSY;
|
||
8002154: 2302 movs r3, #2
|
||
8002156: e0cc b.n 80022f2 <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
|
||
/* Process Locked */
|
||
__HAL_LOCK(hi2c);
|
||
8002158: 68fb ldr r3, [r7, #12]
|
||
800215a: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
|
||
800215e: 2b01 cmp r3, #1
|
||
8002160: d101 bne.n 8002166 <HAL_I2C_Mem_Write+0x56>
|
||
8002162: 2302 movs r3, #2
|
||
8002164: e0c5 b.n 80022f2 <HAL_I2C_Mem_Write+0x1e2>
|
||
8002166: 68fb ldr r3, [r7, #12]
|
||
8002168: 2201 movs r2, #1
|
||
800216a: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
/* Check if the I2C is already enabled */
|
||
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
|
||
800216e: 68fb ldr r3, [r7, #12]
|
||
8002170: 681b ldr r3, [r3, #0]
|
||
8002172: 681b ldr r3, [r3, #0]
|
||
8002174: f003 0301 and.w r3, r3, #1
|
||
8002178: 2b01 cmp r3, #1
|
||
800217a: d007 beq.n 800218c <HAL_I2C_Mem_Write+0x7c>
|
||
{
|
||
/* Enable I2C peripheral */
|
||
__HAL_I2C_ENABLE(hi2c);
|
||
800217c: 68fb ldr r3, [r7, #12]
|
||
800217e: 681b ldr r3, [r3, #0]
|
||
8002180: 681a ldr r2, [r3, #0]
|
||
8002182: 68fb ldr r3, [r7, #12]
|
||
8002184: 681b ldr r3, [r3, #0]
|
||
8002186: f042 0201 orr.w r2, r2, #1
|
||
800218a: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Disable Pos */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
||
800218c: 68fb ldr r3, [r7, #12]
|
||
800218e: 681b ldr r3, [r3, #0]
|
||
8002190: 681a ldr r2, [r3, #0]
|
||
8002192: 68fb ldr r3, [r7, #12]
|
||
8002194: 681b ldr r3, [r3, #0]
|
||
8002196: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
||
800219a: 601a str r2, [r3, #0]
|
||
|
||
hi2c->State = HAL_I2C_STATE_BUSY_TX;
|
||
800219c: 68fb ldr r3, [r7, #12]
|
||
800219e: 2221 movs r2, #33 ; 0x21
|
||
80021a0: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_MEM;
|
||
80021a4: 68fb ldr r3, [r7, #12]
|
||
80021a6: 2240 movs r2, #64 ; 0x40
|
||
80021a8: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
||
80021ac: 68fb ldr r3, [r7, #12]
|
||
80021ae: 2200 movs r2, #0
|
||
80021b0: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Prepare transfer parameters */
|
||
hi2c->pBuffPtr = pData;
|
||
80021b2: 68fb ldr r3, [r7, #12]
|
||
80021b4: 6a3a ldr r2, [r7, #32]
|
||
80021b6: 625a str r2, [r3, #36] ; 0x24
|
||
hi2c->XferCount = Size;
|
||
80021b8: 68fb ldr r3, [r7, #12]
|
||
80021ba: 8cba ldrh r2, [r7, #36] ; 0x24
|
||
80021bc: 855a strh r2, [r3, #42] ; 0x2a
|
||
hi2c->XferSize = hi2c->XferCount;
|
||
80021be: 68fb ldr r3, [r7, #12]
|
||
80021c0: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
80021c2: b29a uxth r2, r3
|
||
80021c4: 68fb ldr r3, [r7, #12]
|
||
80021c6: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
|
||
80021c8: 68fb ldr r3, [r7, #12]
|
||
80021ca: 4a4d ldr r2, [pc, #308] ; (8002300 <HAL_I2C_Mem_Write+0x1f0>)
|
||
80021cc: 62da str r2, [r3, #44] ; 0x2c
|
||
|
||
/* Send Slave Address and Memory Address */
|
||
if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
|
||
80021ce: 88f8 ldrh r0, [r7, #6]
|
||
80021d0: 893a ldrh r2, [r7, #8]
|
||
80021d2: 8979 ldrh r1, [r7, #10]
|
||
80021d4: 697b ldr r3, [r7, #20]
|
||
80021d6: 9301 str r3, [sp, #4]
|
||
80021d8: 6abb ldr r3, [r7, #40] ; 0x28
|
||
80021da: 9300 str r3, [sp, #0]
|
||
80021dc: 4603 mov r3, r0
|
||
80021de: 68f8 ldr r0, [r7, #12]
|
||
80021e0: f000 faf8 bl 80027d4 <I2C_RequestMemoryWrite>
|
||
80021e4: 4603 mov r3, r0
|
||
80021e6: 2b00 cmp r3, #0
|
||
80021e8: d052 beq.n 8002290 <HAL_I2C_Mem_Write+0x180>
|
||
{
|
||
return HAL_ERROR;
|
||
80021ea: 2301 movs r3, #1
|
||
80021ec: e081 b.n 80022f2 <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
|
||
while (hi2c->XferSize > 0U)
|
||
{
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
||
80021ee: 697a ldr r2, [r7, #20]
|
||
80021f0: 6ab9 ldr r1, [r7, #40] ; 0x28
|
||
80021f2: 68f8 ldr r0, [r7, #12]
|
||
80021f4: f000 fd42 bl 8002c7c <I2C_WaitOnTXEFlagUntilTimeout>
|
||
80021f8: 4603 mov r3, r0
|
||
80021fa: 2b00 cmp r3, #0
|
||
80021fc: d00d beq.n 800221a <HAL_I2C_Mem_Write+0x10a>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
80021fe: 68fb ldr r3, [r7, #12]
|
||
8002200: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002202: 2b04 cmp r3, #4
|
||
8002204: d107 bne.n 8002216 <HAL_I2C_Mem_Write+0x106>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002206: 68fb ldr r3, [r7, #12]
|
||
8002208: 681b ldr r3, [r3, #0]
|
||
800220a: 681a ldr r2, [r3, #0]
|
||
800220c: 68fb ldr r3, [r7, #12]
|
||
800220e: 681b ldr r3, [r3, #0]
|
||
8002210: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002214: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
8002216: 2301 movs r3, #1
|
||
8002218: e06b b.n 80022f2 <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
|
||
/* Write data to DR */
|
||
hi2c->Instance->DR = *hi2c->pBuffPtr;
|
||
800221a: 68fb ldr r3, [r7, #12]
|
||
800221c: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800221e: 781a ldrb r2, [r3, #0]
|
||
8002220: 68fb ldr r3, [r7, #12]
|
||
8002222: 681b ldr r3, [r3, #0]
|
||
8002224: 611a str r2, [r3, #16]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
8002226: 68fb ldr r3, [r7, #12]
|
||
8002228: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800222a: 1c5a adds r2, r3, #1
|
||
800222c: 68fb ldr r3, [r7, #12]
|
||
800222e: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
8002230: 68fb ldr r3, [r7, #12]
|
||
8002232: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002234: 3b01 subs r3, #1
|
||
8002236: b29a uxth r2, r3
|
||
8002238: 68fb ldr r3, [r7, #12]
|
||
800223a: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
800223c: 68fb ldr r3, [r7, #12]
|
||
800223e: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002240: b29b uxth r3, r3
|
||
8002242: 3b01 subs r3, #1
|
||
8002244: b29a uxth r2, r3
|
||
8002246: 68fb ldr r3, [r7, #12]
|
||
8002248: 855a strh r2, [r3, #42] ; 0x2a
|
||
|
||
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
|
||
800224a: 68fb ldr r3, [r7, #12]
|
||
800224c: 681b ldr r3, [r3, #0]
|
||
800224e: 695b ldr r3, [r3, #20]
|
||
8002250: f003 0304 and.w r3, r3, #4
|
||
8002254: 2b04 cmp r3, #4
|
||
8002256: d11b bne.n 8002290 <HAL_I2C_Mem_Write+0x180>
|
||
8002258: 68fb ldr r3, [r7, #12]
|
||
800225a: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
800225c: 2b00 cmp r3, #0
|
||
800225e: d017 beq.n 8002290 <HAL_I2C_Mem_Write+0x180>
|
||
{
|
||
/* Write data to DR */
|
||
hi2c->Instance->DR = *hi2c->pBuffPtr;
|
||
8002260: 68fb ldr r3, [r7, #12]
|
||
8002262: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002264: 781a ldrb r2, [r3, #0]
|
||
8002266: 68fb ldr r3, [r7, #12]
|
||
8002268: 681b ldr r3, [r3, #0]
|
||
800226a: 611a str r2, [r3, #16]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
800226c: 68fb ldr r3, [r7, #12]
|
||
800226e: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002270: 1c5a adds r2, r3, #1
|
||
8002272: 68fb ldr r3, [r7, #12]
|
||
8002274: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
8002276: 68fb ldr r3, [r7, #12]
|
||
8002278: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
800227a: 3b01 subs r3, #1
|
||
800227c: b29a uxth r2, r3
|
||
800227e: 68fb ldr r3, [r7, #12]
|
||
8002280: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
8002282: 68fb ldr r3, [r7, #12]
|
||
8002284: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002286: b29b uxth r3, r3
|
||
8002288: 3b01 subs r3, #1
|
||
800228a: b29a uxth r2, r3
|
||
800228c: 68fb ldr r3, [r7, #12]
|
||
800228e: 855a strh r2, [r3, #42] ; 0x2a
|
||
while (hi2c->XferSize > 0U)
|
||
8002290: 68fb ldr r3, [r7, #12]
|
||
8002292: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002294: 2b00 cmp r3, #0
|
||
8002296: d1aa bne.n 80021ee <HAL_I2C_Mem_Write+0xde>
|
||
}
|
||
}
|
||
|
||
/* Wait until BTF flag is set */
|
||
if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
||
8002298: 697a ldr r2, [r7, #20]
|
||
800229a: 6ab9 ldr r1, [r7, #40] ; 0x28
|
||
800229c: 68f8 ldr r0, [r7, #12]
|
||
800229e: f000 fd2e bl 8002cfe <I2C_WaitOnBTFFlagUntilTimeout>
|
||
80022a2: 4603 mov r3, r0
|
||
80022a4: 2b00 cmp r3, #0
|
||
80022a6: d00d beq.n 80022c4 <HAL_I2C_Mem_Write+0x1b4>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
80022a8: 68fb ldr r3, [r7, #12]
|
||
80022aa: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
80022ac: 2b04 cmp r3, #4
|
||
80022ae: d107 bne.n 80022c0 <HAL_I2C_Mem_Write+0x1b0>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
80022b0: 68fb ldr r3, [r7, #12]
|
||
80022b2: 681b ldr r3, [r3, #0]
|
||
80022b4: 681a ldr r2, [r3, #0]
|
||
80022b6: 68fb ldr r3, [r7, #12]
|
||
80022b8: 681b ldr r3, [r3, #0]
|
||
80022ba: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
80022be: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
80022c0: 2301 movs r3, #1
|
||
80022c2: e016 b.n 80022f2 <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
80022c4: 68fb ldr r3, [r7, #12]
|
||
80022c6: 681b ldr r3, [r3, #0]
|
||
80022c8: 681a ldr r2, [r3, #0]
|
||
80022ca: 68fb ldr r3, [r7, #12]
|
||
80022cc: 681b ldr r3, [r3, #0]
|
||
80022ce: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
80022d2: 601a str r2, [r3, #0]
|
||
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
80022d4: 68fb ldr r3, [r7, #12]
|
||
80022d6: 2220 movs r2, #32
|
||
80022d8: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
80022dc: 68fb ldr r3, [r7, #12]
|
||
80022de: 2200 movs r2, #0
|
||
80022e0: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
80022e4: 68fb ldr r3, [r7, #12]
|
||
80022e6: 2200 movs r2, #0
|
||
80022e8: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_OK;
|
||
80022ec: 2300 movs r3, #0
|
||
80022ee: e000 b.n 80022f2 <HAL_I2C_Mem_Write+0x1e2>
|
||
}
|
||
else
|
||
{
|
||
return HAL_BUSY;
|
||
80022f0: 2302 movs r3, #2
|
||
}
|
||
}
|
||
80022f2: 4618 mov r0, r3
|
||
80022f4: 3718 adds r7, #24
|
||
80022f6: 46bd mov sp, r7
|
||
80022f8: bd80 pop {r7, pc}
|
||
80022fa: bf00 nop
|
||
80022fc: 00100002 .word 0x00100002
|
||
8002300: ffff0000 .word 0xffff0000
|
||
|
||
08002304 <HAL_I2C_Mem_Read>:
|
||
* @param Size Amount of data to be sent
|
||
* @param Timeout Timeout duration
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
||
{
|
||
8002304: b580 push {r7, lr}
|
||
8002306: b08c sub sp, #48 ; 0x30
|
||
8002308: af02 add r7, sp, #8
|
||
800230a: 60f8 str r0, [r7, #12]
|
||
800230c: 4608 mov r0, r1
|
||
800230e: 4611 mov r1, r2
|
||
8002310: 461a mov r2, r3
|
||
8002312: 4603 mov r3, r0
|
||
8002314: 817b strh r3, [r7, #10]
|
||
8002316: 460b mov r3, r1
|
||
8002318: 813b strh r3, [r7, #8]
|
||
800231a: 4613 mov r3, r2
|
||
800231c: 80fb strh r3, [r7, #6]
|
||
__IO uint32_t count = 0U;
|
||
800231e: 2300 movs r3, #0
|
||
8002320: 623b str r3, [r7, #32]
|
||
|
||
/* Init tickstart for timeout management*/
|
||
uint32_t tickstart = HAL_GetTick();
|
||
8002322: f7ff fadb bl 80018dc <HAL_GetTick>
|
||
8002326: 6278 str r0, [r7, #36] ; 0x24
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
|
||
|
||
if (hi2c->State == HAL_I2C_STATE_READY)
|
||
8002328: 68fb ldr r3, [r7, #12]
|
||
800232a: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
||
800232e: b2db uxtb r3, r3
|
||
8002330: 2b20 cmp r3, #32
|
||
8002332: f040 8244 bne.w 80027be <HAL_I2C_Mem_Read+0x4ba>
|
||
{
|
||
/* Wait until BUSY flag is reset */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
|
||
8002336: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002338: 9300 str r3, [sp, #0]
|
||
800233a: 2319 movs r3, #25
|
||
800233c: 2201 movs r2, #1
|
||
800233e: 4982 ldr r1, [pc, #520] ; (8002548 <HAL_I2C_Mem_Read+0x244>)
|
||
8002340: 68f8 ldr r0, [r7, #12]
|
||
8002342: f000 fbc5 bl 8002ad0 <I2C_WaitOnFlagUntilTimeout>
|
||
8002346: 4603 mov r3, r0
|
||
8002348: 2b00 cmp r3, #0
|
||
800234a: d001 beq.n 8002350 <HAL_I2C_Mem_Read+0x4c>
|
||
{
|
||
return HAL_BUSY;
|
||
800234c: 2302 movs r3, #2
|
||
800234e: e237 b.n 80027c0 <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
/* Process Locked */
|
||
__HAL_LOCK(hi2c);
|
||
8002350: 68fb ldr r3, [r7, #12]
|
||
8002352: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
|
||
8002356: 2b01 cmp r3, #1
|
||
8002358: d101 bne.n 800235e <HAL_I2C_Mem_Read+0x5a>
|
||
800235a: 2302 movs r3, #2
|
||
800235c: e230 b.n 80027c0 <HAL_I2C_Mem_Read+0x4bc>
|
||
800235e: 68fb ldr r3, [r7, #12]
|
||
8002360: 2201 movs r2, #1
|
||
8002362: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
/* Check if the I2C is already enabled */
|
||
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
|
||
8002366: 68fb ldr r3, [r7, #12]
|
||
8002368: 681b ldr r3, [r3, #0]
|
||
800236a: 681b ldr r3, [r3, #0]
|
||
800236c: f003 0301 and.w r3, r3, #1
|
||
8002370: 2b01 cmp r3, #1
|
||
8002372: d007 beq.n 8002384 <HAL_I2C_Mem_Read+0x80>
|
||
{
|
||
/* Enable I2C peripheral */
|
||
__HAL_I2C_ENABLE(hi2c);
|
||
8002374: 68fb ldr r3, [r7, #12]
|
||
8002376: 681b ldr r3, [r3, #0]
|
||
8002378: 681a ldr r2, [r3, #0]
|
||
800237a: 68fb ldr r3, [r7, #12]
|
||
800237c: 681b ldr r3, [r3, #0]
|
||
800237e: f042 0201 orr.w r2, r2, #1
|
||
8002382: 601a str r2, [r3, #0]
|
||
}
|
||
|
||
/* Disable Pos */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
||
8002384: 68fb ldr r3, [r7, #12]
|
||
8002386: 681b ldr r3, [r3, #0]
|
||
8002388: 681a ldr r2, [r3, #0]
|
||
800238a: 68fb ldr r3, [r7, #12]
|
||
800238c: 681b ldr r3, [r3, #0]
|
||
800238e: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
||
8002392: 601a str r2, [r3, #0]
|
||
|
||
hi2c->State = HAL_I2C_STATE_BUSY_RX;
|
||
8002394: 68fb ldr r3, [r7, #12]
|
||
8002396: 2222 movs r2, #34 ; 0x22
|
||
8002398: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_MEM;
|
||
800239c: 68fb ldr r3, [r7, #12]
|
||
800239e: 2240 movs r2, #64 ; 0x40
|
||
80023a0: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
||
80023a4: 68fb ldr r3, [r7, #12]
|
||
80023a6: 2200 movs r2, #0
|
||
80023a8: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Prepare transfer parameters */
|
||
hi2c->pBuffPtr = pData;
|
||
80023aa: 68fb ldr r3, [r7, #12]
|
||
80023ac: 6b3a ldr r2, [r7, #48] ; 0x30
|
||
80023ae: 625a str r2, [r3, #36] ; 0x24
|
||
hi2c->XferCount = Size;
|
||
80023b0: 68fb ldr r3, [r7, #12]
|
||
80023b2: 8eba ldrh r2, [r7, #52] ; 0x34
|
||
80023b4: 855a strh r2, [r3, #42] ; 0x2a
|
||
hi2c->XferSize = hi2c->XferCount;
|
||
80023b6: 68fb ldr r3, [r7, #12]
|
||
80023b8: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
80023ba: b29a uxth r2, r3
|
||
80023bc: 68fb ldr r3, [r7, #12]
|
||
80023be: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
|
||
80023c0: 68fb ldr r3, [r7, #12]
|
||
80023c2: 4a62 ldr r2, [pc, #392] ; (800254c <HAL_I2C_Mem_Read+0x248>)
|
||
80023c4: 62da str r2, [r3, #44] ; 0x2c
|
||
|
||
/* Send Slave Address and Memory Address */
|
||
if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
|
||
80023c6: 88f8 ldrh r0, [r7, #6]
|
||
80023c8: 893a ldrh r2, [r7, #8]
|
||
80023ca: 8979 ldrh r1, [r7, #10]
|
||
80023cc: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80023ce: 9301 str r3, [sp, #4]
|
||
80023d0: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
80023d2: 9300 str r3, [sp, #0]
|
||
80023d4: 4603 mov r3, r0
|
||
80023d6: 68f8 ldr r0, [r7, #12]
|
||
80023d8: f000 fa92 bl 8002900 <I2C_RequestMemoryRead>
|
||
80023dc: 4603 mov r3, r0
|
||
80023de: 2b00 cmp r3, #0
|
||
80023e0: d001 beq.n 80023e6 <HAL_I2C_Mem_Read+0xe2>
|
||
{
|
||
return HAL_ERROR;
|
||
80023e2: 2301 movs r3, #1
|
||
80023e4: e1ec b.n 80027c0 <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
if (hi2c->XferSize == 0U)
|
||
80023e6: 68fb ldr r3, [r7, #12]
|
||
80023e8: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80023ea: 2b00 cmp r3, #0
|
||
80023ec: d113 bne.n 8002416 <HAL_I2C_Mem_Read+0x112>
|
||
{
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
80023ee: 2300 movs r3, #0
|
||
80023f0: 61fb str r3, [r7, #28]
|
||
80023f2: 68fb ldr r3, [r7, #12]
|
||
80023f4: 681b ldr r3, [r3, #0]
|
||
80023f6: 695b ldr r3, [r3, #20]
|
||
80023f8: 61fb str r3, [r7, #28]
|
||
80023fa: 68fb ldr r3, [r7, #12]
|
||
80023fc: 681b ldr r3, [r3, #0]
|
||
80023fe: 699b ldr r3, [r3, #24]
|
||
8002400: 61fb str r3, [r7, #28]
|
||
8002402: 69fb ldr r3, [r7, #28]
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002404: 68fb ldr r3, [r7, #12]
|
||
8002406: 681b ldr r3, [r3, #0]
|
||
8002408: 681a ldr r2, [r3, #0]
|
||
800240a: 68fb ldr r3, [r7, #12]
|
||
800240c: 681b ldr r3, [r3, #0]
|
||
800240e: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002412: 601a str r2, [r3, #0]
|
||
8002414: e1c0 b.n 8002798 <HAL_I2C_Mem_Read+0x494>
|
||
}
|
||
else if (hi2c->XferSize == 1U)
|
||
8002416: 68fb ldr r3, [r7, #12]
|
||
8002418: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
800241a: 2b01 cmp r3, #1
|
||
800241c: d11e bne.n 800245c <HAL_I2C_Mem_Read+0x158>
|
||
{
|
||
/* Disable Acknowledge */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
800241e: 68fb ldr r3, [r7, #12]
|
||
8002420: 681b ldr r3, [r3, #0]
|
||
8002422: 681a ldr r2, [r3, #0]
|
||
8002424: 68fb ldr r3, [r7, #12]
|
||
8002426: 681b ldr r3, [r3, #0]
|
||
8002428: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
||
800242c: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
800242e: b672 cpsid i
|
||
}
|
||
8002430: bf00 nop
|
||
/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
|
||
software sequence must complete before the current byte end of transfer */
|
||
__disable_irq();
|
||
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
8002432: 2300 movs r3, #0
|
||
8002434: 61bb str r3, [r7, #24]
|
||
8002436: 68fb ldr r3, [r7, #12]
|
||
8002438: 681b ldr r3, [r3, #0]
|
||
800243a: 695b ldr r3, [r3, #20]
|
||
800243c: 61bb str r3, [r7, #24]
|
||
800243e: 68fb ldr r3, [r7, #12]
|
||
8002440: 681b ldr r3, [r3, #0]
|
||
8002442: 699b ldr r3, [r3, #24]
|
||
8002444: 61bb str r3, [r7, #24]
|
||
8002446: 69bb ldr r3, [r7, #24]
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002448: 68fb ldr r3, [r7, #12]
|
||
800244a: 681b ldr r3, [r3, #0]
|
||
800244c: 681a ldr r2, [r3, #0]
|
||
800244e: 68fb ldr r3, [r7, #12]
|
||
8002450: 681b ldr r3, [r3, #0]
|
||
8002452: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002456: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
8002458: b662 cpsie i
|
||
}
|
||
800245a: e035 b.n 80024c8 <HAL_I2C_Mem_Read+0x1c4>
|
||
|
||
/* Re-enable IRQs */
|
||
__enable_irq();
|
||
}
|
||
else if (hi2c->XferSize == 2U)
|
||
800245c: 68fb ldr r3, [r7, #12]
|
||
800245e: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002460: 2b02 cmp r3, #2
|
||
8002462: d11e bne.n 80024a2 <HAL_I2C_Mem_Read+0x19e>
|
||
{
|
||
/* Enable Pos */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
||
8002464: 68fb ldr r3, [r7, #12]
|
||
8002466: 681b ldr r3, [r3, #0]
|
||
8002468: 681a ldr r2, [r3, #0]
|
||
800246a: 68fb ldr r3, [r7, #12]
|
||
800246c: 681b ldr r3, [r3, #0]
|
||
800246e: f442 6200 orr.w r2, r2, #2048 ; 0x800
|
||
8002472: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
8002474: b672 cpsid i
|
||
}
|
||
8002476: bf00 nop
|
||
/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
|
||
software sequence must complete before the current byte end of transfer */
|
||
__disable_irq();
|
||
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
8002478: 2300 movs r3, #0
|
||
800247a: 617b str r3, [r7, #20]
|
||
800247c: 68fb ldr r3, [r7, #12]
|
||
800247e: 681b ldr r3, [r3, #0]
|
||
8002480: 695b ldr r3, [r3, #20]
|
||
8002482: 617b str r3, [r7, #20]
|
||
8002484: 68fb ldr r3, [r7, #12]
|
||
8002486: 681b ldr r3, [r3, #0]
|
||
8002488: 699b ldr r3, [r3, #24]
|
||
800248a: 617b str r3, [r7, #20]
|
||
800248c: 697b ldr r3, [r7, #20]
|
||
|
||
/* Disable Acknowledge */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
800248e: 68fb ldr r3, [r7, #12]
|
||
8002490: 681b ldr r3, [r3, #0]
|
||
8002492: 681a ldr r2, [r3, #0]
|
||
8002494: 68fb ldr r3, [r7, #12]
|
||
8002496: 681b ldr r3, [r3, #0]
|
||
8002498: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
||
800249c: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
800249e: b662 cpsie i
|
||
}
|
||
80024a0: e012 b.n 80024c8 <HAL_I2C_Mem_Read+0x1c4>
|
||
__enable_irq();
|
||
}
|
||
else
|
||
{
|
||
/* Enable Acknowledge */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
80024a2: 68fb ldr r3, [r7, #12]
|
||
80024a4: 681b ldr r3, [r3, #0]
|
||
80024a6: 681a ldr r2, [r3, #0]
|
||
80024a8: 68fb ldr r3, [r7, #12]
|
||
80024aa: 681b ldr r3, [r3, #0]
|
||
80024ac: f442 6280 orr.w r2, r2, #1024 ; 0x400
|
||
80024b0: 601a str r2, [r3, #0]
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
80024b2: 2300 movs r3, #0
|
||
80024b4: 613b str r3, [r7, #16]
|
||
80024b6: 68fb ldr r3, [r7, #12]
|
||
80024b8: 681b ldr r3, [r3, #0]
|
||
80024ba: 695b ldr r3, [r3, #20]
|
||
80024bc: 613b str r3, [r7, #16]
|
||
80024be: 68fb ldr r3, [r7, #12]
|
||
80024c0: 681b ldr r3, [r3, #0]
|
||
80024c2: 699b ldr r3, [r3, #24]
|
||
80024c4: 613b str r3, [r7, #16]
|
||
80024c6: 693b ldr r3, [r7, #16]
|
||
}
|
||
|
||
while (hi2c->XferSize > 0U)
|
||
80024c8: e166 b.n 8002798 <HAL_I2C_Mem_Read+0x494>
|
||
{
|
||
if (hi2c->XferSize <= 3U)
|
||
80024ca: 68fb ldr r3, [r7, #12]
|
||
80024cc: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80024ce: 2b03 cmp r3, #3
|
||
80024d0: f200 811f bhi.w 8002712 <HAL_I2C_Mem_Read+0x40e>
|
||
{
|
||
/* One byte */
|
||
if (hi2c->XferSize == 1U)
|
||
80024d4: 68fb ldr r3, [r7, #12]
|
||
80024d6: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80024d8: 2b01 cmp r3, #1
|
||
80024da: d123 bne.n 8002524 <HAL_I2C_Mem_Read+0x220>
|
||
{
|
||
/* Wait until RXNE flag is set */
|
||
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
||
80024dc: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
80024de: 6bb9 ldr r1, [r7, #56] ; 0x38
|
||
80024e0: 68f8 ldr r0, [r7, #12]
|
||
80024e2: f000 fc4d bl 8002d80 <I2C_WaitOnRXNEFlagUntilTimeout>
|
||
80024e6: 4603 mov r3, r0
|
||
80024e8: 2b00 cmp r3, #0
|
||
80024ea: d001 beq.n 80024f0 <HAL_I2C_Mem_Read+0x1ec>
|
||
{
|
||
return HAL_ERROR;
|
||
80024ec: 2301 movs r3, #1
|
||
80024ee: e167 b.n 80027c0 <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
80024f0: 68fb ldr r3, [r7, #12]
|
||
80024f2: 681b ldr r3, [r3, #0]
|
||
80024f4: 691a ldr r2, [r3, #16]
|
||
80024f6: 68fb ldr r3, [r7, #12]
|
||
80024f8: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80024fa: b2d2 uxtb r2, r2
|
||
80024fc: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
80024fe: 68fb ldr r3, [r7, #12]
|
||
8002500: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002502: 1c5a adds r2, r3, #1
|
||
8002504: 68fb ldr r3, [r7, #12]
|
||
8002506: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
8002508: 68fb ldr r3, [r7, #12]
|
||
800250a: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
800250c: 3b01 subs r3, #1
|
||
800250e: b29a uxth r2, r3
|
||
8002510: 68fb ldr r3, [r7, #12]
|
||
8002512: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
8002514: 68fb ldr r3, [r7, #12]
|
||
8002516: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002518: b29b uxth r3, r3
|
||
800251a: 3b01 subs r3, #1
|
||
800251c: b29a uxth r2, r3
|
||
800251e: 68fb ldr r3, [r7, #12]
|
||
8002520: 855a strh r2, [r3, #42] ; 0x2a
|
||
8002522: e139 b.n 8002798 <HAL_I2C_Mem_Read+0x494>
|
||
}
|
||
/* Two bytes */
|
||
else if (hi2c->XferSize == 2U)
|
||
8002524: 68fb ldr r3, [r7, #12]
|
||
8002526: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002528: 2b02 cmp r3, #2
|
||
800252a: d152 bne.n 80025d2 <HAL_I2C_Mem_Read+0x2ce>
|
||
{
|
||
/* Wait until BTF flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
||
800252c: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
800252e: 9300 str r3, [sp, #0]
|
||
8002530: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
8002532: 2200 movs r2, #0
|
||
8002534: 4906 ldr r1, [pc, #24] ; (8002550 <HAL_I2C_Mem_Read+0x24c>)
|
||
8002536: 68f8 ldr r0, [r7, #12]
|
||
8002538: f000 faca bl 8002ad0 <I2C_WaitOnFlagUntilTimeout>
|
||
800253c: 4603 mov r3, r0
|
||
800253e: 2b00 cmp r3, #0
|
||
8002540: d008 beq.n 8002554 <HAL_I2C_Mem_Read+0x250>
|
||
{
|
||
return HAL_ERROR;
|
||
8002542: 2301 movs r3, #1
|
||
8002544: e13c b.n 80027c0 <HAL_I2C_Mem_Read+0x4bc>
|
||
8002546: bf00 nop
|
||
8002548: 00100002 .word 0x00100002
|
||
800254c: ffff0000 .word 0xffff0000
|
||
8002550: 00010004 .word 0x00010004
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
8002554: b672 cpsid i
|
||
}
|
||
8002556: bf00 nop
|
||
/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
|
||
software sequence must complete before the current byte end of transfer */
|
||
__disable_irq();
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002558: 68fb ldr r3, [r7, #12]
|
||
800255a: 681b ldr r3, [r3, #0]
|
||
800255c: 681a ldr r2, [r3, #0]
|
||
800255e: 68fb ldr r3, [r7, #12]
|
||
8002560: 681b ldr r3, [r3, #0]
|
||
8002562: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002566: 601a str r2, [r3, #0]
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
8002568: 68fb ldr r3, [r7, #12]
|
||
800256a: 681b ldr r3, [r3, #0]
|
||
800256c: 691a ldr r2, [r3, #16]
|
||
800256e: 68fb ldr r3, [r7, #12]
|
||
8002570: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002572: b2d2 uxtb r2, r2
|
||
8002574: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
8002576: 68fb ldr r3, [r7, #12]
|
||
8002578: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800257a: 1c5a adds r2, r3, #1
|
||
800257c: 68fb ldr r3, [r7, #12]
|
||
800257e: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
8002580: 68fb ldr r3, [r7, #12]
|
||
8002582: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002584: 3b01 subs r3, #1
|
||
8002586: b29a uxth r2, r3
|
||
8002588: 68fb ldr r3, [r7, #12]
|
||
800258a: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
800258c: 68fb ldr r3, [r7, #12]
|
||
800258e: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002590: b29b uxth r3, r3
|
||
8002592: 3b01 subs r3, #1
|
||
8002594: b29a uxth r2, r3
|
||
8002596: 68fb ldr r3, [r7, #12]
|
||
8002598: 855a strh r2, [r3, #42] ; 0x2a
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
800259a: b662 cpsie i
|
||
}
|
||
800259c: bf00 nop
|
||
|
||
/* Re-enable IRQs */
|
||
__enable_irq();
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
800259e: 68fb ldr r3, [r7, #12]
|
||
80025a0: 681b ldr r3, [r3, #0]
|
||
80025a2: 691a ldr r2, [r3, #16]
|
||
80025a4: 68fb ldr r3, [r7, #12]
|
||
80025a6: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80025a8: b2d2 uxtb r2, r2
|
||
80025aa: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
80025ac: 68fb ldr r3, [r7, #12]
|
||
80025ae: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80025b0: 1c5a adds r2, r3, #1
|
||
80025b2: 68fb ldr r3, [r7, #12]
|
||
80025b4: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
80025b6: 68fb ldr r3, [r7, #12]
|
||
80025b8: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80025ba: 3b01 subs r3, #1
|
||
80025bc: b29a uxth r2, r3
|
||
80025be: 68fb ldr r3, [r7, #12]
|
||
80025c0: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
80025c2: 68fb ldr r3, [r7, #12]
|
||
80025c4: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
80025c6: b29b uxth r3, r3
|
||
80025c8: 3b01 subs r3, #1
|
||
80025ca: b29a uxth r2, r3
|
||
80025cc: 68fb ldr r3, [r7, #12]
|
||
80025ce: 855a strh r2, [r3, #42] ; 0x2a
|
||
80025d0: e0e2 b.n 8002798 <HAL_I2C_Mem_Read+0x494>
|
||
}
|
||
/* 3 Last bytes */
|
||
else
|
||
{
|
||
/* Wait until BTF flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
||
80025d2: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80025d4: 9300 str r3, [sp, #0]
|
||
80025d6: 6bbb ldr r3, [r7, #56] ; 0x38
|
||
80025d8: 2200 movs r2, #0
|
||
80025da: 497b ldr r1, [pc, #492] ; (80027c8 <HAL_I2C_Mem_Read+0x4c4>)
|
||
80025dc: 68f8 ldr r0, [r7, #12]
|
||
80025de: f000 fa77 bl 8002ad0 <I2C_WaitOnFlagUntilTimeout>
|
||
80025e2: 4603 mov r3, r0
|
||
80025e4: 2b00 cmp r3, #0
|
||
80025e6: d001 beq.n 80025ec <HAL_I2C_Mem_Read+0x2e8>
|
||
{
|
||
return HAL_ERROR;
|
||
80025e8: 2301 movs r3, #1
|
||
80025ea: e0e9 b.n 80027c0 <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
/* Disable Acknowledge */
|
||
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
80025ec: 68fb ldr r3, [r7, #12]
|
||
80025ee: 681b ldr r3, [r3, #0]
|
||
80025f0: 681a ldr r2, [r3, #0]
|
||
80025f2: 68fb ldr r3, [r7, #12]
|
||
80025f4: 681b ldr r3, [r3, #0]
|
||
80025f6: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
||
80025fa: 601a str r2, [r3, #0]
|
||
__ASM volatile ("cpsid i" : : : "memory");
|
||
80025fc: b672 cpsid i
|
||
}
|
||
80025fe: bf00 nop
|
||
/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
|
||
software sequence must complete before the current byte end of transfer */
|
||
__disable_irq();
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
8002600: 68fb ldr r3, [r7, #12]
|
||
8002602: 681b ldr r3, [r3, #0]
|
||
8002604: 691a ldr r2, [r3, #16]
|
||
8002606: 68fb ldr r3, [r7, #12]
|
||
8002608: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
800260a: b2d2 uxtb r2, r2
|
||
800260c: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
800260e: 68fb ldr r3, [r7, #12]
|
||
8002610: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002612: 1c5a adds r2, r3, #1
|
||
8002614: 68fb ldr r3, [r7, #12]
|
||
8002616: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
8002618: 68fb ldr r3, [r7, #12]
|
||
800261a: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
800261c: 3b01 subs r3, #1
|
||
800261e: b29a uxth r2, r3
|
||
8002620: 68fb ldr r3, [r7, #12]
|
||
8002622: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
8002624: 68fb ldr r3, [r7, #12]
|
||
8002626: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002628: b29b uxth r3, r3
|
||
800262a: 3b01 subs r3, #1
|
||
800262c: b29a uxth r2, r3
|
||
800262e: 68fb ldr r3, [r7, #12]
|
||
8002630: 855a strh r2, [r3, #42] ; 0x2a
|
||
|
||
/* Wait until BTF flag is set */
|
||
count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U);
|
||
8002632: 4b66 ldr r3, [pc, #408] ; (80027cc <HAL_I2C_Mem_Read+0x4c8>)
|
||
8002634: 681b ldr r3, [r3, #0]
|
||
8002636: 08db lsrs r3, r3, #3
|
||
8002638: 4a65 ldr r2, [pc, #404] ; (80027d0 <HAL_I2C_Mem_Read+0x4cc>)
|
||
800263a: fba2 2303 umull r2, r3, r2, r3
|
||
800263e: 0a1a lsrs r2, r3, #8
|
||
8002640: 4613 mov r3, r2
|
||
8002642: 009b lsls r3, r3, #2
|
||
8002644: 4413 add r3, r2
|
||
8002646: 00da lsls r2, r3, #3
|
||
8002648: 1ad3 subs r3, r2, r3
|
||
800264a: 623b str r3, [r7, #32]
|
||
do
|
||
{
|
||
count--;
|
||
800264c: 6a3b ldr r3, [r7, #32]
|
||
800264e: 3b01 subs r3, #1
|
||
8002650: 623b str r3, [r7, #32]
|
||
if (count == 0U)
|
||
8002652: 6a3b ldr r3, [r7, #32]
|
||
8002654: 2b00 cmp r3, #0
|
||
8002656: d118 bne.n 800268a <HAL_I2C_Mem_Read+0x386>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002658: 68fb ldr r3, [r7, #12]
|
||
800265a: 2200 movs r2, #0
|
||
800265c: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
800265e: 68fb ldr r3, [r7, #12]
|
||
8002660: 2220 movs r2, #32
|
||
8002662: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002666: 68fb ldr r3, [r7, #12]
|
||
8002668: 2200 movs r2, #0
|
||
800266a: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
800266e: 68fb ldr r3, [r7, #12]
|
||
8002670: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002672: f043 0220 orr.w r2, r3, #32
|
||
8002676: 68fb ldr r3, [r7, #12]
|
||
8002678: 641a str r2, [r3, #64] ; 0x40
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
800267a: b662 cpsie i
|
||
}
|
||
800267c: bf00 nop
|
||
|
||
/* Re-enable IRQs */
|
||
__enable_irq();
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
800267e: 68fb ldr r3, [r7, #12]
|
||
8002680: 2200 movs r2, #0
|
||
8002682: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002686: 2301 movs r3, #1
|
||
8002688: e09a b.n 80027c0 <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
}
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET);
|
||
800268a: 68fb ldr r3, [r7, #12]
|
||
800268c: 681b ldr r3, [r3, #0]
|
||
800268e: 695b ldr r3, [r3, #20]
|
||
8002690: f003 0304 and.w r3, r3, #4
|
||
8002694: 2b04 cmp r3, #4
|
||
8002696: d1d9 bne.n 800264c <HAL_I2C_Mem_Read+0x348>
|
||
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002698: 68fb ldr r3, [r7, #12]
|
||
800269a: 681b ldr r3, [r3, #0]
|
||
800269c: 681a ldr r2, [r3, #0]
|
||
800269e: 68fb ldr r3, [r7, #12]
|
||
80026a0: 681b ldr r3, [r3, #0]
|
||
80026a2: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
80026a6: 601a str r2, [r3, #0]
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
80026a8: 68fb ldr r3, [r7, #12]
|
||
80026aa: 681b ldr r3, [r3, #0]
|
||
80026ac: 691a ldr r2, [r3, #16]
|
||
80026ae: 68fb ldr r3, [r7, #12]
|
||
80026b0: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80026b2: b2d2 uxtb r2, r2
|
||
80026b4: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
80026b6: 68fb ldr r3, [r7, #12]
|
||
80026b8: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80026ba: 1c5a adds r2, r3, #1
|
||
80026bc: 68fb ldr r3, [r7, #12]
|
||
80026be: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
80026c0: 68fb ldr r3, [r7, #12]
|
||
80026c2: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80026c4: 3b01 subs r3, #1
|
||
80026c6: b29a uxth r2, r3
|
||
80026c8: 68fb ldr r3, [r7, #12]
|
||
80026ca: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
80026cc: 68fb ldr r3, [r7, #12]
|
||
80026ce: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
80026d0: b29b uxth r3, r3
|
||
80026d2: 3b01 subs r3, #1
|
||
80026d4: b29a uxth r2, r3
|
||
80026d6: 68fb ldr r3, [r7, #12]
|
||
80026d8: 855a strh r2, [r3, #42] ; 0x2a
|
||
__ASM volatile ("cpsie i" : : : "memory");
|
||
80026da: b662 cpsie i
|
||
}
|
||
80026dc: bf00 nop
|
||
|
||
/* Re-enable IRQs */
|
||
__enable_irq();
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
80026de: 68fb ldr r3, [r7, #12]
|
||
80026e0: 681b ldr r3, [r3, #0]
|
||
80026e2: 691a ldr r2, [r3, #16]
|
||
80026e4: 68fb ldr r3, [r7, #12]
|
||
80026e6: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80026e8: b2d2 uxtb r2, r2
|
||
80026ea: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
80026ec: 68fb ldr r3, [r7, #12]
|
||
80026ee: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80026f0: 1c5a adds r2, r3, #1
|
||
80026f2: 68fb ldr r3, [r7, #12]
|
||
80026f4: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
80026f6: 68fb ldr r3, [r7, #12]
|
||
80026f8: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
80026fa: 3b01 subs r3, #1
|
||
80026fc: b29a uxth r2, r3
|
||
80026fe: 68fb ldr r3, [r7, #12]
|
||
8002700: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
8002702: 68fb ldr r3, [r7, #12]
|
||
8002704: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
8002706: b29b uxth r3, r3
|
||
8002708: 3b01 subs r3, #1
|
||
800270a: b29a uxth r2, r3
|
||
800270c: 68fb ldr r3, [r7, #12]
|
||
800270e: 855a strh r2, [r3, #42] ; 0x2a
|
||
8002710: e042 b.n 8002798 <HAL_I2C_Mem_Read+0x494>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Wait until RXNE flag is set */
|
||
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
||
8002712: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8002714: 6bb9 ldr r1, [r7, #56] ; 0x38
|
||
8002716: 68f8 ldr r0, [r7, #12]
|
||
8002718: f000 fb32 bl 8002d80 <I2C_WaitOnRXNEFlagUntilTimeout>
|
||
800271c: 4603 mov r3, r0
|
||
800271e: 2b00 cmp r3, #0
|
||
8002720: d001 beq.n 8002726 <HAL_I2C_Mem_Read+0x422>
|
||
{
|
||
return HAL_ERROR;
|
||
8002722: 2301 movs r3, #1
|
||
8002724: e04c b.n 80027c0 <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
8002726: 68fb ldr r3, [r7, #12]
|
||
8002728: 681b ldr r3, [r3, #0]
|
||
800272a: 691a ldr r2, [r3, #16]
|
||
800272c: 68fb ldr r3, [r7, #12]
|
||
800272e: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002730: b2d2 uxtb r2, r2
|
||
8002732: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
8002734: 68fb ldr r3, [r7, #12]
|
||
8002736: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002738: 1c5a adds r2, r3, #1
|
||
800273a: 68fb ldr r3, [r7, #12]
|
||
800273c: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
800273e: 68fb ldr r3, [r7, #12]
|
||
8002740: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002742: 3b01 subs r3, #1
|
||
8002744: b29a uxth r2, r3
|
||
8002746: 68fb ldr r3, [r7, #12]
|
||
8002748: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
800274a: 68fb ldr r3, [r7, #12]
|
||
800274c: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
800274e: b29b uxth r3, r3
|
||
8002750: 3b01 subs r3, #1
|
||
8002752: b29a uxth r2, r3
|
||
8002754: 68fb ldr r3, [r7, #12]
|
||
8002756: 855a strh r2, [r3, #42] ; 0x2a
|
||
|
||
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
|
||
8002758: 68fb ldr r3, [r7, #12]
|
||
800275a: 681b ldr r3, [r3, #0]
|
||
800275c: 695b ldr r3, [r3, #20]
|
||
800275e: f003 0304 and.w r3, r3, #4
|
||
8002762: 2b04 cmp r3, #4
|
||
8002764: d118 bne.n 8002798 <HAL_I2C_Mem_Read+0x494>
|
||
{
|
||
/* Read data from DR */
|
||
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
||
8002766: 68fb ldr r3, [r7, #12]
|
||
8002768: 681b ldr r3, [r3, #0]
|
||
800276a: 691a ldr r2, [r3, #16]
|
||
800276c: 68fb ldr r3, [r7, #12]
|
||
800276e: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002770: b2d2 uxtb r2, r2
|
||
8002772: 701a strb r2, [r3, #0]
|
||
|
||
/* Increment Buffer pointer */
|
||
hi2c->pBuffPtr++;
|
||
8002774: 68fb ldr r3, [r7, #12]
|
||
8002776: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8002778: 1c5a adds r2, r3, #1
|
||
800277a: 68fb ldr r3, [r7, #12]
|
||
800277c: 625a str r2, [r3, #36] ; 0x24
|
||
|
||
/* Update counter */
|
||
hi2c->XferSize--;
|
||
800277e: 68fb ldr r3, [r7, #12]
|
||
8002780: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
8002782: 3b01 subs r3, #1
|
||
8002784: b29a uxth r2, r3
|
||
8002786: 68fb ldr r3, [r7, #12]
|
||
8002788: 851a strh r2, [r3, #40] ; 0x28
|
||
hi2c->XferCount--;
|
||
800278a: 68fb ldr r3, [r7, #12]
|
||
800278c: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
||
800278e: b29b uxth r3, r3
|
||
8002790: 3b01 subs r3, #1
|
||
8002792: b29a uxth r2, r3
|
||
8002794: 68fb ldr r3, [r7, #12]
|
||
8002796: 855a strh r2, [r3, #42] ; 0x2a
|
||
while (hi2c->XferSize > 0U)
|
||
8002798: 68fb ldr r3, [r7, #12]
|
||
800279a: 8d1b ldrh r3, [r3, #40] ; 0x28
|
||
800279c: 2b00 cmp r3, #0
|
||
800279e: f47f ae94 bne.w 80024ca <HAL_I2C_Mem_Read+0x1c6>
|
||
}
|
||
}
|
||
}
|
||
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
80027a2: 68fb ldr r3, [r7, #12]
|
||
80027a4: 2220 movs r2, #32
|
||
80027a6: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
80027aa: 68fb ldr r3, [r7, #12]
|
||
80027ac: 2200 movs r2, #0
|
||
80027ae: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
80027b2: 68fb ldr r3, [r7, #12]
|
||
80027b4: 2200 movs r2, #0
|
||
80027b6: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_OK;
|
||
80027ba: 2300 movs r3, #0
|
||
80027bc: e000 b.n 80027c0 <HAL_I2C_Mem_Read+0x4bc>
|
||
}
|
||
else
|
||
{
|
||
return HAL_BUSY;
|
||
80027be: 2302 movs r3, #2
|
||
}
|
||
}
|
||
80027c0: 4618 mov r0, r3
|
||
80027c2: 3728 adds r7, #40 ; 0x28
|
||
80027c4: 46bd mov sp, r7
|
||
80027c6: bd80 pop {r7, pc}
|
||
80027c8: 00010004 .word 0x00010004
|
||
80027cc: 20000000 .word 0x20000000
|
||
80027d0: 14f8b589 .word 0x14f8b589
|
||
|
||
080027d4 <I2C_RequestMemoryWrite>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
80027d4: b580 push {r7, lr}
|
||
80027d6: b088 sub sp, #32
|
||
80027d8: af02 add r7, sp, #8
|
||
80027da: 60f8 str r0, [r7, #12]
|
||
80027dc: 4608 mov r0, r1
|
||
80027de: 4611 mov r1, r2
|
||
80027e0: 461a mov r2, r3
|
||
80027e2: 4603 mov r3, r0
|
||
80027e4: 817b strh r3, [r7, #10]
|
||
80027e6: 460b mov r3, r1
|
||
80027e8: 813b strh r3, [r7, #8]
|
||
80027ea: 4613 mov r3, r2
|
||
80027ec: 80fb strh r3, [r7, #6]
|
||
/* Generate Start */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
||
80027ee: 68fb ldr r3, [r7, #12]
|
||
80027f0: 681b ldr r3, [r3, #0]
|
||
80027f2: 681a ldr r2, [r3, #0]
|
||
80027f4: 68fb ldr r3, [r7, #12]
|
||
80027f6: 681b ldr r3, [r3, #0]
|
||
80027f8: f442 7280 orr.w r2, r2, #256 ; 0x100
|
||
80027fc: 601a str r2, [r3, #0]
|
||
|
||
/* Wait until SB flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
||
80027fe: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002800: 9300 str r3, [sp, #0]
|
||
8002802: 6a3b ldr r3, [r7, #32]
|
||
8002804: 2200 movs r2, #0
|
||
8002806: f04f 1101 mov.w r1, #65537 ; 0x10001
|
||
800280a: 68f8 ldr r0, [r7, #12]
|
||
800280c: f000 f960 bl 8002ad0 <I2C_WaitOnFlagUntilTimeout>
|
||
8002810: 4603 mov r3, r0
|
||
8002812: 2b00 cmp r3, #0
|
||
8002814: d00d beq.n 8002832 <I2C_RequestMemoryWrite+0x5e>
|
||
{
|
||
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
||
8002816: 68fb ldr r3, [r7, #12]
|
||
8002818: 681b ldr r3, [r3, #0]
|
||
800281a: 681b ldr r3, [r3, #0]
|
||
800281c: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8002820: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
8002824: d103 bne.n 800282e <I2C_RequestMemoryWrite+0x5a>
|
||
{
|
||
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
||
8002826: 68fb ldr r3, [r7, #12]
|
||
8002828: f44f 7200 mov.w r2, #512 ; 0x200
|
||
800282c: 641a str r2, [r3, #64] ; 0x40
|
||
}
|
||
return HAL_TIMEOUT;
|
||
800282e: 2303 movs r3, #3
|
||
8002830: e05f b.n 80028f2 <I2C_RequestMemoryWrite+0x11e>
|
||
}
|
||
|
||
/* Send slave address */
|
||
hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
|
||
8002832: 897b ldrh r3, [r7, #10]
|
||
8002834: b2db uxtb r3, r3
|
||
8002836: 461a mov r2, r3
|
||
8002838: 68fb ldr r3, [r7, #12]
|
||
800283a: 681b ldr r3, [r3, #0]
|
||
800283c: f002 02fe and.w r2, r2, #254 ; 0xfe
|
||
8002840: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until ADDR flag is set */
|
||
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
||
8002842: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002844: 6a3a ldr r2, [r7, #32]
|
||
8002846: 492d ldr r1, [pc, #180] ; (80028fc <I2C_RequestMemoryWrite+0x128>)
|
||
8002848: 68f8 ldr r0, [r7, #12]
|
||
800284a: f000 f998 bl 8002b7e <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
||
800284e: 4603 mov r3, r0
|
||
8002850: 2b00 cmp r3, #0
|
||
8002852: d001 beq.n 8002858 <I2C_RequestMemoryWrite+0x84>
|
||
{
|
||
return HAL_ERROR;
|
||
8002854: 2301 movs r3, #1
|
||
8002856: e04c b.n 80028f2 <I2C_RequestMemoryWrite+0x11e>
|
||
}
|
||
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
8002858: 2300 movs r3, #0
|
||
800285a: 617b str r3, [r7, #20]
|
||
800285c: 68fb ldr r3, [r7, #12]
|
||
800285e: 681b ldr r3, [r3, #0]
|
||
8002860: 695b ldr r3, [r3, #20]
|
||
8002862: 617b str r3, [r7, #20]
|
||
8002864: 68fb ldr r3, [r7, #12]
|
||
8002866: 681b ldr r3, [r3, #0]
|
||
8002868: 699b ldr r3, [r3, #24]
|
||
800286a: 617b str r3, [r7, #20]
|
||
800286c: 697b ldr r3, [r7, #20]
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
800286e: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8002870: 6a39 ldr r1, [r7, #32]
|
||
8002872: 68f8 ldr r0, [r7, #12]
|
||
8002874: f000 fa02 bl 8002c7c <I2C_WaitOnTXEFlagUntilTimeout>
|
||
8002878: 4603 mov r3, r0
|
||
800287a: 2b00 cmp r3, #0
|
||
800287c: d00d beq.n 800289a <I2C_RequestMemoryWrite+0xc6>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
800287e: 68fb ldr r3, [r7, #12]
|
||
8002880: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002882: 2b04 cmp r3, #4
|
||
8002884: d107 bne.n 8002896 <I2C_RequestMemoryWrite+0xc2>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002886: 68fb ldr r3, [r7, #12]
|
||
8002888: 681b ldr r3, [r3, #0]
|
||
800288a: 681a ldr r2, [r3, #0]
|
||
800288c: 68fb ldr r3, [r7, #12]
|
||
800288e: 681b ldr r3, [r3, #0]
|
||
8002890: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002894: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
8002896: 2301 movs r3, #1
|
||
8002898: e02b b.n 80028f2 <I2C_RequestMemoryWrite+0x11e>
|
||
}
|
||
|
||
/* If Memory address size is 8Bit */
|
||
if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
|
||
800289a: 88fb ldrh r3, [r7, #6]
|
||
800289c: 2b01 cmp r3, #1
|
||
800289e: d105 bne.n 80028ac <I2C_RequestMemoryWrite+0xd8>
|
||
{
|
||
/* Send Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
||
80028a0: 893b ldrh r3, [r7, #8]
|
||
80028a2: b2da uxtb r2, r3
|
||
80028a4: 68fb ldr r3, [r7, #12]
|
||
80028a6: 681b ldr r3, [r3, #0]
|
||
80028a8: 611a str r2, [r3, #16]
|
||
80028aa: e021 b.n 80028f0 <I2C_RequestMemoryWrite+0x11c>
|
||
}
|
||
/* If Memory address size is 16Bit */
|
||
else
|
||
{
|
||
/* Send MSB of Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
|
||
80028ac: 893b ldrh r3, [r7, #8]
|
||
80028ae: 0a1b lsrs r3, r3, #8
|
||
80028b0: b29b uxth r3, r3
|
||
80028b2: b2da uxtb r2, r3
|
||
80028b4: 68fb ldr r3, [r7, #12]
|
||
80028b6: 681b ldr r3, [r3, #0]
|
||
80028b8: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
80028ba: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
80028bc: 6a39 ldr r1, [r7, #32]
|
||
80028be: 68f8 ldr r0, [r7, #12]
|
||
80028c0: f000 f9dc bl 8002c7c <I2C_WaitOnTXEFlagUntilTimeout>
|
||
80028c4: 4603 mov r3, r0
|
||
80028c6: 2b00 cmp r3, #0
|
||
80028c8: d00d beq.n 80028e6 <I2C_RequestMemoryWrite+0x112>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
80028ca: 68fb ldr r3, [r7, #12]
|
||
80028cc: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
80028ce: 2b04 cmp r3, #4
|
||
80028d0: d107 bne.n 80028e2 <I2C_RequestMemoryWrite+0x10e>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
80028d2: 68fb ldr r3, [r7, #12]
|
||
80028d4: 681b ldr r3, [r3, #0]
|
||
80028d6: 681a ldr r2, [r3, #0]
|
||
80028d8: 68fb ldr r3, [r7, #12]
|
||
80028da: 681b ldr r3, [r3, #0]
|
||
80028dc: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
80028e0: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
80028e2: 2301 movs r3, #1
|
||
80028e4: e005 b.n 80028f2 <I2C_RequestMemoryWrite+0x11e>
|
||
}
|
||
|
||
/* Send LSB of Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
||
80028e6: 893b ldrh r3, [r7, #8]
|
||
80028e8: b2da uxtb r2, r3
|
||
80028ea: 68fb ldr r3, [r7, #12]
|
||
80028ec: 681b ldr r3, [r3, #0]
|
||
80028ee: 611a str r2, [r3, #16]
|
||
}
|
||
|
||
return HAL_OK;
|
||
80028f0: 2300 movs r3, #0
|
||
}
|
||
80028f2: 4618 mov r0, r3
|
||
80028f4: 3718 adds r7, #24
|
||
80028f6: 46bd mov sp, r7
|
||
80028f8: bd80 pop {r7, pc}
|
||
80028fa: bf00 nop
|
||
80028fc: 00010002 .word 0x00010002
|
||
|
||
08002900 <I2C_RequestMemoryRead>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002900: b580 push {r7, lr}
|
||
8002902: b088 sub sp, #32
|
||
8002904: af02 add r7, sp, #8
|
||
8002906: 60f8 str r0, [r7, #12]
|
||
8002908: 4608 mov r0, r1
|
||
800290a: 4611 mov r1, r2
|
||
800290c: 461a mov r2, r3
|
||
800290e: 4603 mov r3, r0
|
||
8002910: 817b strh r3, [r7, #10]
|
||
8002912: 460b mov r3, r1
|
||
8002914: 813b strh r3, [r7, #8]
|
||
8002916: 4613 mov r3, r2
|
||
8002918: 80fb strh r3, [r7, #6]
|
||
/* Enable Acknowledge */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
||
800291a: 68fb ldr r3, [r7, #12]
|
||
800291c: 681b ldr r3, [r3, #0]
|
||
800291e: 681a ldr r2, [r3, #0]
|
||
8002920: 68fb ldr r3, [r7, #12]
|
||
8002922: 681b ldr r3, [r3, #0]
|
||
8002924: f442 6280 orr.w r2, r2, #1024 ; 0x400
|
||
8002928: 601a str r2, [r3, #0]
|
||
|
||
/* Generate Start */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
||
800292a: 68fb ldr r3, [r7, #12]
|
||
800292c: 681b ldr r3, [r3, #0]
|
||
800292e: 681a ldr r2, [r3, #0]
|
||
8002930: 68fb ldr r3, [r7, #12]
|
||
8002932: 681b ldr r3, [r3, #0]
|
||
8002934: f442 7280 orr.w r2, r2, #256 ; 0x100
|
||
8002938: 601a str r2, [r3, #0]
|
||
|
||
/* Wait until SB flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
||
800293a: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
800293c: 9300 str r3, [sp, #0]
|
||
800293e: 6a3b ldr r3, [r7, #32]
|
||
8002940: 2200 movs r2, #0
|
||
8002942: f04f 1101 mov.w r1, #65537 ; 0x10001
|
||
8002946: 68f8 ldr r0, [r7, #12]
|
||
8002948: f000 f8c2 bl 8002ad0 <I2C_WaitOnFlagUntilTimeout>
|
||
800294c: 4603 mov r3, r0
|
||
800294e: 2b00 cmp r3, #0
|
||
8002950: d00d beq.n 800296e <I2C_RequestMemoryRead+0x6e>
|
||
{
|
||
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
||
8002952: 68fb ldr r3, [r7, #12]
|
||
8002954: 681b ldr r3, [r3, #0]
|
||
8002956: 681b ldr r3, [r3, #0]
|
||
8002958: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
800295c: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
8002960: d103 bne.n 800296a <I2C_RequestMemoryRead+0x6a>
|
||
{
|
||
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
||
8002962: 68fb ldr r3, [r7, #12]
|
||
8002964: f44f 7200 mov.w r2, #512 ; 0x200
|
||
8002968: 641a str r2, [r3, #64] ; 0x40
|
||
}
|
||
return HAL_TIMEOUT;
|
||
800296a: 2303 movs r3, #3
|
||
800296c: e0aa b.n 8002ac4 <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Send slave address */
|
||
hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
|
||
800296e: 897b ldrh r3, [r7, #10]
|
||
8002970: b2db uxtb r3, r3
|
||
8002972: 461a mov r2, r3
|
||
8002974: 68fb ldr r3, [r7, #12]
|
||
8002976: 681b ldr r3, [r3, #0]
|
||
8002978: f002 02fe and.w r2, r2, #254 ; 0xfe
|
||
800297c: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until ADDR flag is set */
|
||
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
||
800297e: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002980: 6a3a ldr r2, [r7, #32]
|
||
8002982: 4952 ldr r1, [pc, #328] ; (8002acc <I2C_RequestMemoryRead+0x1cc>)
|
||
8002984: 68f8 ldr r0, [r7, #12]
|
||
8002986: f000 f8fa bl 8002b7e <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
||
800298a: 4603 mov r3, r0
|
||
800298c: 2b00 cmp r3, #0
|
||
800298e: d001 beq.n 8002994 <I2C_RequestMemoryRead+0x94>
|
||
{
|
||
return HAL_ERROR;
|
||
8002990: 2301 movs r3, #1
|
||
8002992: e097 b.n 8002ac4 <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Clear ADDR flag */
|
||
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
||
8002994: 2300 movs r3, #0
|
||
8002996: 617b str r3, [r7, #20]
|
||
8002998: 68fb ldr r3, [r7, #12]
|
||
800299a: 681b ldr r3, [r3, #0]
|
||
800299c: 695b ldr r3, [r3, #20]
|
||
800299e: 617b str r3, [r7, #20]
|
||
80029a0: 68fb ldr r3, [r7, #12]
|
||
80029a2: 681b ldr r3, [r3, #0]
|
||
80029a4: 699b ldr r3, [r3, #24]
|
||
80029a6: 617b str r3, [r7, #20]
|
||
80029a8: 697b ldr r3, [r7, #20]
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
80029aa: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
80029ac: 6a39 ldr r1, [r7, #32]
|
||
80029ae: 68f8 ldr r0, [r7, #12]
|
||
80029b0: f000 f964 bl 8002c7c <I2C_WaitOnTXEFlagUntilTimeout>
|
||
80029b4: 4603 mov r3, r0
|
||
80029b6: 2b00 cmp r3, #0
|
||
80029b8: d00d beq.n 80029d6 <I2C_RequestMemoryRead+0xd6>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
80029ba: 68fb ldr r3, [r7, #12]
|
||
80029bc: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
80029be: 2b04 cmp r3, #4
|
||
80029c0: d107 bne.n 80029d2 <I2C_RequestMemoryRead+0xd2>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
80029c2: 68fb ldr r3, [r7, #12]
|
||
80029c4: 681b ldr r3, [r3, #0]
|
||
80029c6: 681a ldr r2, [r3, #0]
|
||
80029c8: 68fb ldr r3, [r7, #12]
|
||
80029ca: 681b ldr r3, [r3, #0]
|
||
80029cc: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
80029d0: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
80029d2: 2301 movs r3, #1
|
||
80029d4: e076 b.n 8002ac4 <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* If Memory address size is 8Bit */
|
||
if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
|
||
80029d6: 88fb ldrh r3, [r7, #6]
|
||
80029d8: 2b01 cmp r3, #1
|
||
80029da: d105 bne.n 80029e8 <I2C_RequestMemoryRead+0xe8>
|
||
{
|
||
/* Send Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
||
80029dc: 893b ldrh r3, [r7, #8]
|
||
80029de: b2da uxtb r2, r3
|
||
80029e0: 68fb ldr r3, [r7, #12]
|
||
80029e2: 681b ldr r3, [r3, #0]
|
||
80029e4: 611a str r2, [r3, #16]
|
||
80029e6: e021 b.n 8002a2c <I2C_RequestMemoryRead+0x12c>
|
||
}
|
||
/* If Memory address size is 16Bit */
|
||
else
|
||
{
|
||
/* Send MSB of Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
|
||
80029e8: 893b ldrh r3, [r7, #8]
|
||
80029ea: 0a1b lsrs r3, r3, #8
|
||
80029ec: b29b uxth r3, r3
|
||
80029ee: b2da uxtb r2, r3
|
||
80029f0: 68fb ldr r3, [r7, #12]
|
||
80029f2: 681b ldr r3, [r3, #0]
|
||
80029f4: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
80029f6: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
80029f8: 6a39 ldr r1, [r7, #32]
|
||
80029fa: 68f8 ldr r0, [r7, #12]
|
||
80029fc: f000 f93e bl 8002c7c <I2C_WaitOnTXEFlagUntilTimeout>
|
||
8002a00: 4603 mov r3, r0
|
||
8002a02: 2b00 cmp r3, #0
|
||
8002a04: d00d beq.n 8002a22 <I2C_RequestMemoryRead+0x122>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
8002a06: 68fb ldr r3, [r7, #12]
|
||
8002a08: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002a0a: 2b04 cmp r3, #4
|
||
8002a0c: d107 bne.n 8002a1e <I2C_RequestMemoryRead+0x11e>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002a0e: 68fb ldr r3, [r7, #12]
|
||
8002a10: 681b ldr r3, [r3, #0]
|
||
8002a12: 681a ldr r2, [r3, #0]
|
||
8002a14: 68fb ldr r3, [r7, #12]
|
||
8002a16: 681b ldr r3, [r3, #0]
|
||
8002a18: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002a1c: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
8002a1e: 2301 movs r3, #1
|
||
8002a20: e050 b.n 8002ac4 <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Send LSB of Memory Address */
|
||
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
||
8002a22: 893b ldrh r3, [r7, #8]
|
||
8002a24: b2da uxtb r2, r3
|
||
8002a26: 68fb ldr r3, [r7, #12]
|
||
8002a28: 681b ldr r3, [r3, #0]
|
||
8002a2a: 611a str r2, [r3, #16]
|
||
}
|
||
|
||
/* Wait until TXE flag is set */
|
||
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
||
8002a2c: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
8002a2e: 6a39 ldr r1, [r7, #32]
|
||
8002a30: 68f8 ldr r0, [r7, #12]
|
||
8002a32: f000 f923 bl 8002c7c <I2C_WaitOnTXEFlagUntilTimeout>
|
||
8002a36: 4603 mov r3, r0
|
||
8002a38: 2b00 cmp r3, #0
|
||
8002a3a: d00d beq.n 8002a58 <I2C_RequestMemoryRead+0x158>
|
||
{
|
||
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
||
8002a3c: 68fb ldr r3, [r7, #12]
|
||
8002a3e: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002a40: 2b04 cmp r3, #4
|
||
8002a42: d107 bne.n 8002a54 <I2C_RequestMemoryRead+0x154>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002a44: 68fb ldr r3, [r7, #12]
|
||
8002a46: 681b ldr r3, [r3, #0]
|
||
8002a48: 681a ldr r2, [r3, #0]
|
||
8002a4a: 68fb ldr r3, [r7, #12]
|
||
8002a4c: 681b ldr r3, [r3, #0]
|
||
8002a4e: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002a52: 601a str r2, [r3, #0]
|
||
}
|
||
return HAL_ERROR;
|
||
8002a54: 2301 movs r3, #1
|
||
8002a56: e035 b.n 8002ac4 <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Generate Restart */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
||
8002a58: 68fb ldr r3, [r7, #12]
|
||
8002a5a: 681b ldr r3, [r3, #0]
|
||
8002a5c: 681a ldr r2, [r3, #0]
|
||
8002a5e: 68fb ldr r3, [r7, #12]
|
||
8002a60: 681b ldr r3, [r3, #0]
|
||
8002a62: f442 7280 orr.w r2, r2, #256 ; 0x100
|
||
8002a66: 601a str r2, [r3, #0]
|
||
|
||
/* Wait until SB flag is set */
|
||
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
||
8002a68: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002a6a: 9300 str r3, [sp, #0]
|
||
8002a6c: 6a3b ldr r3, [r7, #32]
|
||
8002a6e: 2200 movs r2, #0
|
||
8002a70: f04f 1101 mov.w r1, #65537 ; 0x10001
|
||
8002a74: 68f8 ldr r0, [r7, #12]
|
||
8002a76: f000 f82b bl 8002ad0 <I2C_WaitOnFlagUntilTimeout>
|
||
8002a7a: 4603 mov r3, r0
|
||
8002a7c: 2b00 cmp r3, #0
|
||
8002a7e: d00d beq.n 8002a9c <I2C_RequestMemoryRead+0x19c>
|
||
{
|
||
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
||
8002a80: 68fb ldr r3, [r7, #12]
|
||
8002a82: 681b ldr r3, [r3, #0]
|
||
8002a84: 681b ldr r3, [r3, #0]
|
||
8002a86: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8002a8a: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
8002a8e: d103 bne.n 8002a98 <I2C_RequestMemoryRead+0x198>
|
||
{
|
||
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
||
8002a90: 68fb ldr r3, [r7, #12]
|
||
8002a92: f44f 7200 mov.w r2, #512 ; 0x200
|
||
8002a96: 641a str r2, [r3, #64] ; 0x40
|
||
}
|
||
return HAL_TIMEOUT;
|
||
8002a98: 2303 movs r3, #3
|
||
8002a9a: e013 b.n 8002ac4 <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
/* Send slave address */
|
||
hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
|
||
8002a9c: 897b ldrh r3, [r7, #10]
|
||
8002a9e: b2db uxtb r3, r3
|
||
8002aa0: f043 0301 orr.w r3, r3, #1
|
||
8002aa4: b2da uxtb r2, r3
|
||
8002aa6: 68fb ldr r3, [r7, #12]
|
||
8002aa8: 681b ldr r3, [r3, #0]
|
||
8002aaa: 611a str r2, [r3, #16]
|
||
|
||
/* Wait until ADDR flag is set */
|
||
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
||
8002aac: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
8002aae: 6a3a ldr r2, [r7, #32]
|
||
8002ab0: 4906 ldr r1, [pc, #24] ; (8002acc <I2C_RequestMemoryRead+0x1cc>)
|
||
8002ab2: 68f8 ldr r0, [r7, #12]
|
||
8002ab4: f000 f863 bl 8002b7e <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
||
8002ab8: 4603 mov r3, r0
|
||
8002aba: 2b00 cmp r3, #0
|
||
8002abc: d001 beq.n 8002ac2 <I2C_RequestMemoryRead+0x1c2>
|
||
{
|
||
return HAL_ERROR;
|
||
8002abe: 2301 movs r3, #1
|
||
8002ac0: e000 b.n 8002ac4 <I2C_RequestMemoryRead+0x1c4>
|
||
}
|
||
|
||
return HAL_OK;
|
||
8002ac2: 2300 movs r3, #0
|
||
}
|
||
8002ac4: 4618 mov r0, r3
|
||
8002ac6: 3718 adds r7, #24
|
||
8002ac8: 46bd mov sp, r7
|
||
8002aca: bd80 pop {r7, pc}
|
||
8002acc: 00010002 .word 0x00010002
|
||
|
||
08002ad0 <I2C_WaitOnFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002ad0: b580 push {r7, lr}
|
||
8002ad2: b084 sub sp, #16
|
||
8002ad4: af00 add r7, sp, #0
|
||
8002ad6: 60f8 str r0, [r7, #12]
|
||
8002ad8: 60b9 str r1, [r7, #8]
|
||
8002ada: 603b str r3, [r7, #0]
|
||
8002adc: 4613 mov r3, r2
|
||
8002ade: 71fb strb r3, [r7, #7]
|
||
/* Wait until flag is set */
|
||
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
||
8002ae0: e025 b.n 8002b2e <I2C_WaitOnFlagUntilTimeout+0x5e>
|
||
{
|
||
/* Check for the Timeout */
|
||
if (Timeout != HAL_MAX_DELAY)
|
||
8002ae2: 683b ldr r3, [r7, #0]
|
||
8002ae4: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
8002ae8: d021 beq.n 8002b2e <I2C_WaitOnFlagUntilTimeout+0x5e>
|
||
{
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002aea: f7fe fef7 bl 80018dc <HAL_GetTick>
|
||
8002aee: 4602 mov r2, r0
|
||
8002af0: 69bb ldr r3, [r7, #24]
|
||
8002af2: 1ad3 subs r3, r2, r3
|
||
8002af4: 683a ldr r2, [r7, #0]
|
||
8002af6: 429a cmp r2, r3
|
||
8002af8: d302 bcc.n 8002b00 <I2C_WaitOnFlagUntilTimeout+0x30>
|
||
8002afa: 683b ldr r3, [r7, #0]
|
||
8002afc: 2b00 cmp r3, #0
|
||
8002afe: d116 bne.n 8002b2e <I2C_WaitOnFlagUntilTimeout+0x5e>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002b00: 68fb ldr r3, [r7, #12]
|
||
8002b02: 2200 movs r2, #0
|
||
8002b04: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002b06: 68fb ldr r3, [r7, #12]
|
||
8002b08: 2220 movs r2, #32
|
||
8002b0a: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002b0e: 68fb ldr r3, [r7, #12]
|
||
8002b10: 2200 movs r2, #0
|
||
8002b12: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002b16: 68fb ldr r3, [r7, #12]
|
||
8002b18: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002b1a: f043 0220 orr.w r2, r3, #32
|
||
8002b1e: 68fb ldr r3, [r7, #12]
|
||
8002b20: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002b22: 68fb ldr r3, [r7, #12]
|
||
8002b24: 2200 movs r2, #0
|
||
8002b26: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002b2a: 2301 movs r3, #1
|
||
8002b2c: e023 b.n 8002b76 <I2C_WaitOnFlagUntilTimeout+0xa6>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
||
8002b2e: 68bb ldr r3, [r7, #8]
|
||
8002b30: 0c1b lsrs r3, r3, #16
|
||
8002b32: b2db uxtb r3, r3
|
||
8002b34: 2b01 cmp r3, #1
|
||
8002b36: d10d bne.n 8002b54 <I2C_WaitOnFlagUntilTimeout+0x84>
|
||
8002b38: 68fb ldr r3, [r7, #12]
|
||
8002b3a: 681b ldr r3, [r3, #0]
|
||
8002b3c: 695b ldr r3, [r3, #20]
|
||
8002b3e: 43da mvns r2, r3
|
||
8002b40: 68bb ldr r3, [r7, #8]
|
||
8002b42: 4013 ands r3, r2
|
||
8002b44: b29b uxth r3, r3
|
||
8002b46: 2b00 cmp r3, #0
|
||
8002b48: bf0c ite eq
|
||
8002b4a: 2301 moveq r3, #1
|
||
8002b4c: 2300 movne r3, #0
|
||
8002b4e: b2db uxtb r3, r3
|
||
8002b50: 461a mov r2, r3
|
||
8002b52: e00c b.n 8002b6e <I2C_WaitOnFlagUntilTimeout+0x9e>
|
||
8002b54: 68fb ldr r3, [r7, #12]
|
||
8002b56: 681b ldr r3, [r3, #0]
|
||
8002b58: 699b ldr r3, [r3, #24]
|
||
8002b5a: 43da mvns r2, r3
|
||
8002b5c: 68bb ldr r3, [r7, #8]
|
||
8002b5e: 4013 ands r3, r2
|
||
8002b60: b29b uxth r3, r3
|
||
8002b62: 2b00 cmp r3, #0
|
||
8002b64: bf0c ite eq
|
||
8002b66: 2301 moveq r3, #1
|
||
8002b68: 2300 movne r3, #0
|
||
8002b6a: b2db uxtb r3, r3
|
||
8002b6c: 461a mov r2, r3
|
||
8002b6e: 79fb ldrb r3, [r7, #7]
|
||
8002b70: 429a cmp r2, r3
|
||
8002b72: d0b6 beq.n 8002ae2 <I2C_WaitOnFlagUntilTimeout+0x12>
|
||
}
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002b74: 2300 movs r3, #0
|
||
}
|
||
8002b76: 4618 mov r0, r3
|
||
8002b78: 3710 adds r7, #16
|
||
8002b7a: 46bd mov sp, r7
|
||
8002b7c: bd80 pop {r7, pc}
|
||
|
||
08002b7e <I2C_WaitOnMasterAddressFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002b7e: b580 push {r7, lr}
|
||
8002b80: b084 sub sp, #16
|
||
8002b82: af00 add r7, sp, #0
|
||
8002b84: 60f8 str r0, [r7, #12]
|
||
8002b86: 60b9 str r1, [r7, #8]
|
||
8002b88: 607a str r2, [r7, #4]
|
||
8002b8a: 603b str r3, [r7, #0]
|
||
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
|
||
8002b8c: e051 b.n 8002c32 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
|
||
{
|
||
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
|
||
8002b8e: 68fb ldr r3, [r7, #12]
|
||
8002b90: 681b ldr r3, [r3, #0]
|
||
8002b92: 695b ldr r3, [r3, #20]
|
||
8002b94: f403 6380 and.w r3, r3, #1024 ; 0x400
|
||
8002b98: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
||
8002b9c: d123 bne.n 8002be6 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x68>
|
||
{
|
||
/* Generate Stop */
|
||
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
||
8002b9e: 68fb ldr r3, [r7, #12]
|
||
8002ba0: 681b ldr r3, [r3, #0]
|
||
8002ba2: 681a ldr r2, [r3, #0]
|
||
8002ba4: 68fb ldr r3, [r7, #12]
|
||
8002ba6: 681b ldr r3, [r3, #0]
|
||
8002ba8: f442 7200 orr.w r2, r2, #512 ; 0x200
|
||
8002bac: 601a str r2, [r3, #0]
|
||
|
||
/* Clear AF Flag */
|
||
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
||
8002bae: 68fb ldr r3, [r7, #12]
|
||
8002bb0: 681b ldr r3, [r3, #0]
|
||
8002bb2: f46f 6280 mvn.w r2, #1024 ; 0x400
|
||
8002bb6: 615a str r2, [r3, #20]
|
||
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002bb8: 68fb ldr r3, [r7, #12]
|
||
8002bba: 2200 movs r2, #0
|
||
8002bbc: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002bbe: 68fb ldr r3, [r7, #12]
|
||
8002bc0: 2220 movs r2, #32
|
||
8002bc2: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002bc6: 68fb ldr r3, [r7, #12]
|
||
8002bc8: 2200 movs r2, #0
|
||
8002bca: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
|
||
8002bce: 68fb ldr r3, [r7, #12]
|
||
8002bd0: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002bd2: f043 0204 orr.w r2, r3, #4
|
||
8002bd6: 68fb ldr r3, [r7, #12]
|
||
8002bd8: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002bda: 68fb ldr r3, [r7, #12]
|
||
8002bdc: 2200 movs r2, #0
|
||
8002bde: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002be2: 2301 movs r3, #1
|
||
8002be4: e046 b.n 8002c74 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf6>
|
||
}
|
||
|
||
/* Check for the Timeout */
|
||
if (Timeout != HAL_MAX_DELAY)
|
||
8002be6: 687b ldr r3, [r7, #4]
|
||
8002be8: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
8002bec: d021 beq.n 8002c32 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
|
||
{
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002bee: f7fe fe75 bl 80018dc <HAL_GetTick>
|
||
8002bf2: 4602 mov r2, r0
|
||
8002bf4: 683b ldr r3, [r7, #0]
|
||
8002bf6: 1ad3 subs r3, r2, r3
|
||
8002bf8: 687a ldr r2, [r7, #4]
|
||
8002bfa: 429a cmp r2, r3
|
||
8002bfc: d302 bcc.n 8002c04 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x86>
|
||
8002bfe: 687b ldr r3, [r7, #4]
|
||
8002c00: 2b00 cmp r3, #0
|
||
8002c02: d116 bne.n 8002c32 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002c04: 68fb ldr r3, [r7, #12]
|
||
8002c06: 2200 movs r2, #0
|
||
8002c08: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002c0a: 68fb ldr r3, [r7, #12]
|
||
8002c0c: 2220 movs r2, #32
|
||
8002c0e: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002c12: 68fb ldr r3, [r7, #12]
|
||
8002c14: 2200 movs r2, #0
|
||
8002c16: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002c1a: 68fb ldr r3, [r7, #12]
|
||
8002c1c: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002c1e: f043 0220 orr.w r2, r3, #32
|
||
8002c22: 68fb ldr r3, [r7, #12]
|
||
8002c24: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002c26: 68fb ldr r3, [r7, #12]
|
||
8002c28: 2200 movs r2, #0
|
||
8002c2a: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002c2e: 2301 movs r3, #1
|
||
8002c30: e020 b.n 8002c74 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf6>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
|
||
8002c32: 68bb ldr r3, [r7, #8]
|
||
8002c34: 0c1b lsrs r3, r3, #16
|
||
8002c36: b2db uxtb r3, r3
|
||
8002c38: 2b01 cmp r3, #1
|
||
8002c3a: d10c bne.n 8002c56 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xd8>
|
||
8002c3c: 68fb ldr r3, [r7, #12]
|
||
8002c3e: 681b ldr r3, [r3, #0]
|
||
8002c40: 695b ldr r3, [r3, #20]
|
||
8002c42: 43da mvns r2, r3
|
||
8002c44: 68bb ldr r3, [r7, #8]
|
||
8002c46: 4013 ands r3, r2
|
||
8002c48: b29b uxth r3, r3
|
||
8002c4a: 2b00 cmp r3, #0
|
||
8002c4c: bf14 ite ne
|
||
8002c4e: 2301 movne r3, #1
|
||
8002c50: 2300 moveq r3, #0
|
||
8002c52: b2db uxtb r3, r3
|
||
8002c54: e00b b.n 8002c6e <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf0>
|
||
8002c56: 68fb ldr r3, [r7, #12]
|
||
8002c58: 681b ldr r3, [r3, #0]
|
||
8002c5a: 699b ldr r3, [r3, #24]
|
||
8002c5c: 43da mvns r2, r3
|
||
8002c5e: 68bb ldr r3, [r7, #8]
|
||
8002c60: 4013 ands r3, r2
|
||
8002c62: b29b uxth r3, r3
|
||
8002c64: 2b00 cmp r3, #0
|
||
8002c66: bf14 ite ne
|
||
8002c68: 2301 movne r3, #1
|
||
8002c6a: 2300 moveq r3, #0
|
||
8002c6c: b2db uxtb r3, r3
|
||
8002c6e: 2b00 cmp r3, #0
|
||
8002c70: d18d bne.n 8002b8e <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
|
||
}
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002c72: 2300 movs r3, #0
|
||
}
|
||
8002c74: 4618 mov r0, r3
|
||
8002c76: 3710 adds r7, #16
|
||
8002c78: 46bd mov sp, r7
|
||
8002c7a: bd80 pop {r7, pc}
|
||
|
||
08002c7c <I2C_WaitOnTXEFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002c7c: b580 push {r7, lr}
|
||
8002c7e: b084 sub sp, #16
|
||
8002c80: af00 add r7, sp, #0
|
||
8002c82: 60f8 str r0, [r7, #12]
|
||
8002c84: 60b9 str r1, [r7, #8]
|
||
8002c86: 607a str r2, [r7, #4]
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
|
||
8002c88: e02d b.n 8002ce6 <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
|
||
{
|
||
/* Check if a NACK is detected */
|
||
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
|
||
8002c8a: 68f8 ldr r0, [r7, #12]
|
||
8002c8c: f000 f8ce bl 8002e2c <I2C_IsAcknowledgeFailed>
|
||
8002c90: 4603 mov r3, r0
|
||
8002c92: 2b00 cmp r3, #0
|
||
8002c94: d001 beq.n 8002c9a <I2C_WaitOnTXEFlagUntilTimeout+0x1e>
|
||
{
|
||
return HAL_ERROR;
|
||
8002c96: 2301 movs r3, #1
|
||
8002c98: e02d b.n 8002cf6 <I2C_WaitOnTXEFlagUntilTimeout+0x7a>
|
||
}
|
||
|
||
/* Check for the Timeout */
|
||
if (Timeout != HAL_MAX_DELAY)
|
||
8002c9a: 68bb ldr r3, [r7, #8]
|
||
8002c9c: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
8002ca0: d021 beq.n 8002ce6 <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
|
||
{
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002ca2: f7fe fe1b bl 80018dc <HAL_GetTick>
|
||
8002ca6: 4602 mov r2, r0
|
||
8002ca8: 687b ldr r3, [r7, #4]
|
||
8002caa: 1ad3 subs r3, r2, r3
|
||
8002cac: 68ba ldr r2, [r7, #8]
|
||
8002cae: 429a cmp r2, r3
|
||
8002cb0: d302 bcc.n 8002cb8 <I2C_WaitOnTXEFlagUntilTimeout+0x3c>
|
||
8002cb2: 68bb ldr r3, [r7, #8]
|
||
8002cb4: 2b00 cmp r3, #0
|
||
8002cb6: d116 bne.n 8002ce6 <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002cb8: 68fb ldr r3, [r7, #12]
|
||
8002cba: 2200 movs r2, #0
|
||
8002cbc: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002cbe: 68fb ldr r3, [r7, #12]
|
||
8002cc0: 2220 movs r2, #32
|
||
8002cc2: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002cc6: 68fb ldr r3, [r7, #12]
|
||
8002cc8: 2200 movs r2, #0
|
||
8002cca: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002cce: 68fb ldr r3, [r7, #12]
|
||
8002cd0: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002cd2: f043 0220 orr.w r2, r3, #32
|
||
8002cd6: 68fb ldr r3, [r7, #12]
|
||
8002cd8: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002cda: 68fb ldr r3, [r7, #12]
|
||
8002cdc: 2200 movs r2, #0
|
||
8002cde: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002ce2: 2301 movs r3, #1
|
||
8002ce4: e007 b.n 8002cf6 <I2C_WaitOnTXEFlagUntilTimeout+0x7a>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
|
||
8002ce6: 68fb ldr r3, [r7, #12]
|
||
8002ce8: 681b ldr r3, [r3, #0]
|
||
8002cea: 695b ldr r3, [r3, #20]
|
||
8002cec: f003 0380 and.w r3, r3, #128 ; 0x80
|
||
8002cf0: 2b80 cmp r3, #128 ; 0x80
|
||
8002cf2: d1ca bne.n 8002c8a <I2C_WaitOnTXEFlagUntilTimeout+0xe>
|
||
}
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002cf4: 2300 movs r3, #0
|
||
}
|
||
8002cf6: 4618 mov r0, r3
|
||
8002cf8: 3710 adds r7, #16
|
||
8002cfa: 46bd mov sp, r7
|
||
8002cfc: bd80 pop {r7, pc}
|
||
|
||
08002cfe <I2C_WaitOnBTFFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002cfe: b580 push {r7, lr}
|
||
8002d00: b084 sub sp, #16
|
||
8002d02: af00 add r7, sp, #0
|
||
8002d04: 60f8 str r0, [r7, #12]
|
||
8002d06: 60b9 str r1, [r7, #8]
|
||
8002d08: 607a str r2, [r7, #4]
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
|
||
8002d0a: e02d b.n 8002d68 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
|
||
{
|
||
/* Check if a NACK is detected */
|
||
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
|
||
8002d0c: 68f8 ldr r0, [r7, #12]
|
||
8002d0e: f000 f88d bl 8002e2c <I2C_IsAcknowledgeFailed>
|
||
8002d12: 4603 mov r3, r0
|
||
8002d14: 2b00 cmp r3, #0
|
||
8002d16: d001 beq.n 8002d1c <I2C_WaitOnBTFFlagUntilTimeout+0x1e>
|
||
{
|
||
return HAL_ERROR;
|
||
8002d18: 2301 movs r3, #1
|
||
8002d1a: e02d b.n 8002d78 <I2C_WaitOnBTFFlagUntilTimeout+0x7a>
|
||
}
|
||
|
||
/* Check for the Timeout */
|
||
if (Timeout != HAL_MAX_DELAY)
|
||
8002d1c: 68bb ldr r3, [r7, #8]
|
||
8002d1e: f1b3 3fff cmp.w r3, #4294967295 ; 0xffffffff
|
||
8002d22: d021 beq.n 8002d68 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
|
||
{
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002d24: f7fe fdda bl 80018dc <HAL_GetTick>
|
||
8002d28: 4602 mov r2, r0
|
||
8002d2a: 687b ldr r3, [r7, #4]
|
||
8002d2c: 1ad3 subs r3, r2, r3
|
||
8002d2e: 68ba ldr r2, [r7, #8]
|
||
8002d30: 429a cmp r2, r3
|
||
8002d32: d302 bcc.n 8002d3a <I2C_WaitOnBTFFlagUntilTimeout+0x3c>
|
||
8002d34: 68bb ldr r3, [r7, #8]
|
||
8002d36: 2b00 cmp r3, #0
|
||
8002d38: d116 bne.n 8002d68 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002d3a: 68fb ldr r3, [r7, #12]
|
||
8002d3c: 2200 movs r2, #0
|
||
8002d3e: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002d40: 68fb ldr r3, [r7, #12]
|
||
8002d42: 2220 movs r2, #32
|
||
8002d44: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002d48: 68fb ldr r3, [r7, #12]
|
||
8002d4a: 2200 movs r2, #0
|
||
8002d4c: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002d50: 68fb ldr r3, [r7, #12]
|
||
8002d52: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002d54: f043 0220 orr.w r2, r3, #32
|
||
8002d58: 68fb ldr r3, [r7, #12]
|
||
8002d5a: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002d5c: 68fb ldr r3, [r7, #12]
|
||
8002d5e: 2200 movs r2, #0
|
||
8002d60: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002d64: 2301 movs r3, #1
|
||
8002d66: e007 b.n 8002d78 <I2C_WaitOnBTFFlagUntilTimeout+0x7a>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
|
||
8002d68: 68fb ldr r3, [r7, #12]
|
||
8002d6a: 681b ldr r3, [r3, #0]
|
||
8002d6c: 695b ldr r3, [r3, #20]
|
||
8002d6e: f003 0304 and.w r3, r3, #4
|
||
8002d72: 2b04 cmp r3, #4
|
||
8002d74: d1ca bne.n 8002d0c <I2C_WaitOnBTFFlagUntilTimeout+0xe>
|
||
}
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002d76: 2300 movs r3, #0
|
||
}
|
||
8002d78: 4618 mov r0, r3
|
||
8002d7a: 3710 adds r7, #16
|
||
8002d7c: 46bd mov sp, r7
|
||
8002d7e: bd80 pop {r7, pc}
|
||
|
||
08002d80 <I2C_WaitOnRXNEFlagUntilTimeout>:
|
||
* @param Timeout Timeout duration
|
||
* @param Tickstart Tick start value
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
||
{
|
||
8002d80: b580 push {r7, lr}
|
||
8002d82: b084 sub sp, #16
|
||
8002d84: af00 add r7, sp, #0
|
||
8002d86: 60f8 str r0, [r7, #12]
|
||
8002d88: 60b9 str r1, [r7, #8]
|
||
8002d8a: 607a str r2, [r7, #4]
|
||
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
|
||
8002d8c: e042 b.n 8002e14 <I2C_WaitOnRXNEFlagUntilTimeout+0x94>
|
||
{
|
||
/* Check if a STOPF is detected */
|
||
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
|
||
8002d8e: 68fb ldr r3, [r7, #12]
|
||
8002d90: 681b ldr r3, [r3, #0]
|
||
8002d92: 695b ldr r3, [r3, #20]
|
||
8002d94: f003 0310 and.w r3, r3, #16
|
||
8002d98: 2b10 cmp r3, #16
|
||
8002d9a: d119 bne.n 8002dd0 <I2C_WaitOnRXNEFlagUntilTimeout+0x50>
|
||
{
|
||
/* Clear STOP Flag */
|
||
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
|
||
8002d9c: 68fb ldr r3, [r7, #12]
|
||
8002d9e: 681b ldr r3, [r3, #0]
|
||
8002da0: f06f 0210 mvn.w r2, #16
|
||
8002da4: 615a str r2, [r3, #20]
|
||
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002da6: 68fb ldr r3, [r7, #12]
|
||
8002da8: 2200 movs r2, #0
|
||
8002daa: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002dac: 68fb ldr r3, [r7, #12]
|
||
8002dae: 2220 movs r2, #32
|
||
8002db0: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002db4: 68fb ldr r3, [r7, #12]
|
||
8002db6: 2200 movs r2, #0
|
||
8002db8: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_NONE;
|
||
8002dbc: 68fb ldr r3, [r7, #12]
|
||
8002dbe: 6c1a ldr r2, [r3, #64] ; 0x40
|
||
8002dc0: 68fb ldr r3, [r7, #12]
|
||
8002dc2: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002dc4: 68fb ldr r3, [r7, #12]
|
||
8002dc6: 2200 movs r2, #0
|
||
8002dc8: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002dcc: 2301 movs r3, #1
|
||
8002dce: e029 b.n 8002e24 <I2C_WaitOnRXNEFlagUntilTimeout+0xa4>
|
||
}
|
||
|
||
/* Check for the Timeout */
|
||
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
||
8002dd0: f7fe fd84 bl 80018dc <HAL_GetTick>
|
||
8002dd4: 4602 mov r2, r0
|
||
8002dd6: 687b ldr r3, [r7, #4]
|
||
8002dd8: 1ad3 subs r3, r2, r3
|
||
8002dda: 68ba ldr r2, [r7, #8]
|
||
8002ddc: 429a cmp r2, r3
|
||
8002dde: d302 bcc.n 8002de6 <I2C_WaitOnRXNEFlagUntilTimeout+0x66>
|
||
8002de0: 68bb ldr r3, [r7, #8]
|
||
8002de2: 2b00 cmp r3, #0
|
||
8002de4: d116 bne.n 8002e14 <I2C_WaitOnRXNEFlagUntilTimeout+0x94>
|
||
{
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002de6: 68fb ldr r3, [r7, #12]
|
||
8002de8: 2200 movs r2, #0
|
||
8002dea: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002dec: 68fb ldr r3, [r7, #12]
|
||
8002dee: 2220 movs r2, #32
|
||
8002df0: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002df4: 68fb ldr r3, [r7, #12]
|
||
8002df6: 2200 movs r2, #0
|
||
8002df8: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
||
8002dfc: 68fb ldr r3, [r7, #12]
|
||
8002dfe: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002e00: f043 0220 orr.w r2, r3, #32
|
||
8002e04: 68fb ldr r3, [r7, #12]
|
||
8002e06: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002e08: 68fb ldr r3, [r7, #12]
|
||
8002e0a: 2200 movs r2, #0
|
||
8002e0c: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002e10: 2301 movs r3, #1
|
||
8002e12: e007 b.n 8002e24 <I2C_WaitOnRXNEFlagUntilTimeout+0xa4>
|
||
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
|
||
8002e14: 68fb ldr r3, [r7, #12]
|
||
8002e16: 681b ldr r3, [r3, #0]
|
||
8002e18: 695b ldr r3, [r3, #20]
|
||
8002e1a: f003 0340 and.w r3, r3, #64 ; 0x40
|
||
8002e1e: 2b40 cmp r3, #64 ; 0x40
|
||
8002e20: d1b5 bne.n 8002d8e <I2C_WaitOnRXNEFlagUntilTimeout+0xe>
|
||
}
|
||
}
|
||
return HAL_OK;
|
||
8002e22: 2300 movs r3, #0
|
||
}
|
||
8002e24: 4618 mov r0, r3
|
||
8002e26: 3710 adds r7, #16
|
||
8002e28: 46bd mov sp, r7
|
||
8002e2a: bd80 pop {r7, pc}
|
||
|
||
08002e2c <I2C_IsAcknowledgeFailed>:
|
||
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
||
* the configuration information for the specified I2C.
|
||
* @retval HAL status
|
||
*/
|
||
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
|
||
{
|
||
8002e2c: b480 push {r7}
|
||
8002e2e: b083 sub sp, #12
|
||
8002e30: af00 add r7, sp, #0
|
||
8002e32: 6078 str r0, [r7, #4]
|
||
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
|
||
8002e34: 687b ldr r3, [r7, #4]
|
||
8002e36: 681b ldr r3, [r3, #0]
|
||
8002e38: 695b ldr r3, [r3, #20]
|
||
8002e3a: f403 6380 and.w r3, r3, #1024 ; 0x400
|
||
8002e3e: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
||
8002e42: d11b bne.n 8002e7c <I2C_IsAcknowledgeFailed+0x50>
|
||
{
|
||
/* Clear NACKF Flag */
|
||
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
||
8002e44: 687b ldr r3, [r7, #4]
|
||
8002e46: 681b ldr r3, [r3, #0]
|
||
8002e48: f46f 6280 mvn.w r2, #1024 ; 0x400
|
||
8002e4c: 615a str r2, [r3, #20]
|
||
|
||
hi2c->PreviousState = I2C_STATE_NONE;
|
||
8002e4e: 687b ldr r3, [r7, #4]
|
||
8002e50: 2200 movs r2, #0
|
||
8002e52: 631a str r2, [r3, #48] ; 0x30
|
||
hi2c->State = HAL_I2C_STATE_READY;
|
||
8002e54: 687b ldr r3, [r7, #4]
|
||
8002e56: 2220 movs r2, #32
|
||
8002e58: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
||
hi2c->Mode = HAL_I2C_MODE_NONE;
|
||
8002e5c: 687b ldr r3, [r7, #4]
|
||
8002e5e: 2200 movs r2, #0
|
||
8002e60: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
||
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
|
||
8002e64: 687b ldr r3, [r7, #4]
|
||
8002e66: 6c1b ldr r3, [r3, #64] ; 0x40
|
||
8002e68: f043 0204 orr.w r2, r3, #4
|
||
8002e6c: 687b ldr r3, [r7, #4]
|
||
8002e6e: 641a str r2, [r3, #64] ; 0x40
|
||
|
||
/* Process Unlocked */
|
||
__HAL_UNLOCK(hi2c);
|
||
8002e70: 687b ldr r3, [r7, #4]
|
||
8002e72: 2200 movs r2, #0
|
||
8002e74: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
||
|
||
return HAL_ERROR;
|
||
8002e78: 2301 movs r3, #1
|
||
8002e7a: e000 b.n 8002e7e <I2C_IsAcknowledgeFailed+0x52>
|
||
}
|
||
return HAL_OK;
|
||
8002e7c: 2300 movs r3, #0
|
||
}
|
||
8002e7e: 4618 mov r0, r3
|
||
8002e80: 370c adds r7, #12
|
||
8002e82: 46bd mov sp, r7
|
||
8002e84: bc80 pop {r7}
|
||
8002e86: 4770 bx lr
|
||
|
||
08002e88 <HAL_RCC_OscConfig>:
|
||
* supported by this macro. User should request a transition to HSE Off
|
||
* first and then HSE On or HSE Bypass.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
||
{
|
||
8002e88: b580 push {r7, lr}
|
||
8002e8a: b086 sub sp, #24
|
||
8002e8c: af00 add r7, sp, #0
|
||
8002e8e: 6078 str r0, [r7, #4]
|
||
uint32_t tickstart;
|
||
uint32_t pll_config;
|
||
|
||
/* Check Null pointer */
|
||
if (RCC_OscInitStruct == NULL)
|
||
8002e90: 687b ldr r3, [r7, #4]
|
||
8002e92: 2b00 cmp r3, #0
|
||
8002e94: d101 bne.n 8002e9a <HAL_RCC_OscConfig+0x12>
|
||
{
|
||
return HAL_ERROR;
|
||
8002e96: 2301 movs r3, #1
|
||
8002e98: e26c b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
||
|
||
/*------------------------------- HSE Configuration ------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
||
8002e9a: 687b ldr r3, [r7, #4]
|
||
8002e9c: 681b ldr r3, [r3, #0]
|
||
8002e9e: f003 0301 and.w r3, r3, #1
|
||
8002ea2: 2b00 cmp r3, #0
|
||
8002ea4: f000 8087 beq.w 8002fb6 <HAL_RCC_OscConfig+0x12e>
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
|
||
|
||
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
|
||
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
|
||
8002ea8: 4b92 ldr r3, [pc, #584] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002eaa: 685b ldr r3, [r3, #4]
|
||
8002eac: f003 030c and.w r3, r3, #12
|
||
8002eb0: 2b04 cmp r3, #4
|
||
8002eb2: d00c beq.n 8002ece <HAL_RCC_OscConfig+0x46>
|
||
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
|
||
8002eb4: 4b8f ldr r3, [pc, #572] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002eb6: 685b ldr r3, [r3, #4]
|
||
8002eb8: f003 030c and.w r3, r3, #12
|
||
8002ebc: 2b08 cmp r3, #8
|
||
8002ebe: d112 bne.n 8002ee6 <HAL_RCC_OscConfig+0x5e>
|
||
8002ec0: 4b8c ldr r3, [pc, #560] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002ec2: 685b ldr r3, [r3, #4]
|
||
8002ec4: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8002ec8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8002ecc: d10b bne.n 8002ee6 <HAL_RCC_OscConfig+0x5e>
|
||
{
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
||
8002ece: 4b89 ldr r3, [pc, #548] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002ed0: 681b ldr r3, [r3, #0]
|
||
8002ed2: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8002ed6: 2b00 cmp r3, #0
|
||
8002ed8: d06c beq.n 8002fb4 <HAL_RCC_OscConfig+0x12c>
|
||
8002eda: 687b ldr r3, [r7, #4]
|
||
8002edc: 685b ldr r3, [r3, #4]
|
||
8002ede: 2b00 cmp r3, #0
|
||
8002ee0: d168 bne.n 8002fb4 <HAL_RCC_OscConfig+0x12c>
|
||
{
|
||
return HAL_ERROR;
|
||
8002ee2: 2301 movs r3, #1
|
||
8002ee4: e246 b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Set the new HSE configuration ---------------------------------------*/
|
||
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
||
8002ee6: 687b ldr r3, [r7, #4]
|
||
8002ee8: 685b ldr r3, [r3, #4]
|
||
8002eea: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
8002eee: d106 bne.n 8002efe <HAL_RCC_OscConfig+0x76>
|
||
8002ef0: 4b80 ldr r3, [pc, #512] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002ef2: 681b ldr r3, [r3, #0]
|
||
8002ef4: 4a7f ldr r2, [pc, #508] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002ef6: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
||
8002efa: 6013 str r3, [r2, #0]
|
||
8002efc: e02e b.n 8002f5c <HAL_RCC_OscConfig+0xd4>
|
||
8002efe: 687b ldr r3, [r7, #4]
|
||
8002f00: 685b ldr r3, [r3, #4]
|
||
8002f02: 2b00 cmp r3, #0
|
||
8002f04: d10c bne.n 8002f20 <HAL_RCC_OscConfig+0x98>
|
||
8002f06: 4b7b ldr r3, [pc, #492] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f08: 681b ldr r3, [r3, #0]
|
||
8002f0a: 4a7a ldr r2, [pc, #488] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f0c: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
||
8002f10: 6013 str r3, [r2, #0]
|
||
8002f12: 4b78 ldr r3, [pc, #480] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f14: 681b ldr r3, [r3, #0]
|
||
8002f16: 4a77 ldr r2, [pc, #476] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f18: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
||
8002f1c: 6013 str r3, [r2, #0]
|
||
8002f1e: e01d b.n 8002f5c <HAL_RCC_OscConfig+0xd4>
|
||
8002f20: 687b ldr r3, [r7, #4]
|
||
8002f22: 685b ldr r3, [r3, #4]
|
||
8002f24: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
|
||
8002f28: d10c bne.n 8002f44 <HAL_RCC_OscConfig+0xbc>
|
||
8002f2a: 4b72 ldr r3, [pc, #456] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f2c: 681b ldr r3, [r3, #0]
|
||
8002f2e: 4a71 ldr r2, [pc, #452] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f30: f443 2380 orr.w r3, r3, #262144 ; 0x40000
|
||
8002f34: 6013 str r3, [r2, #0]
|
||
8002f36: 4b6f ldr r3, [pc, #444] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f38: 681b ldr r3, [r3, #0]
|
||
8002f3a: 4a6e ldr r2, [pc, #440] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f3c: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
||
8002f40: 6013 str r3, [r2, #0]
|
||
8002f42: e00b b.n 8002f5c <HAL_RCC_OscConfig+0xd4>
|
||
8002f44: 4b6b ldr r3, [pc, #428] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f46: 681b ldr r3, [r3, #0]
|
||
8002f48: 4a6a ldr r2, [pc, #424] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f4a: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
||
8002f4e: 6013 str r3, [r2, #0]
|
||
8002f50: 4b68 ldr r3, [pc, #416] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f52: 681b ldr r3, [r3, #0]
|
||
8002f54: 4a67 ldr r2, [pc, #412] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f56: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
||
8002f5a: 6013 str r3, [r2, #0]
|
||
|
||
|
||
/* Check the HSE State */
|
||
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
|
||
8002f5c: 687b ldr r3, [r7, #4]
|
||
8002f5e: 685b ldr r3, [r3, #4]
|
||
8002f60: 2b00 cmp r3, #0
|
||
8002f62: d013 beq.n 8002f8c <HAL_RCC_OscConfig+0x104>
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8002f64: f7fe fcba bl 80018dc <HAL_GetTick>
|
||
8002f68: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSE is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
8002f6a: e008 b.n 8002f7e <HAL_RCC_OscConfig+0xf6>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
||
8002f6c: f7fe fcb6 bl 80018dc <HAL_GetTick>
|
||
8002f70: 4602 mov r2, r0
|
||
8002f72: 693b ldr r3, [r7, #16]
|
||
8002f74: 1ad3 subs r3, r2, r3
|
||
8002f76: 2b64 cmp r3, #100 ; 0x64
|
||
8002f78: d901 bls.n 8002f7e <HAL_RCC_OscConfig+0xf6>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8002f7a: 2303 movs r3, #3
|
||
8002f7c: e1fa b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
8002f7e: 4b5d ldr r3, [pc, #372] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002f80: 681b ldr r3, [r3, #0]
|
||
8002f82: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8002f86: 2b00 cmp r3, #0
|
||
8002f88: d0f0 beq.n 8002f6c <HAL_RCC_OscConfig+0xe4>
|
||
8002f8a: e014 b.n 8002fb6 <HAL_RCC_OscConfig+0x12e>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8002f8c: f7fe fca6 bl 80018dc <HAL_GetTick>
|
||
8002f90: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSE is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
||
8002f92: e008 b.n 8002fa6 <HAL_RCC_OscConfig+0x11e>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
||
8002f94: f7fe fca2 bl 80018dc <HAL_GetTick>
|
||
8002f98: 4602 mov r2, r0
|
||
8002f9a: 693b ldr r3, [r7, #16]
|
||
8002f9c: 1ad3 subs r3, r2, r3
|
||
8002f9e: 2b64 cmp r3, #100 ; 0x64
|
||
8002fa0: d901 bls.n 8002fa6 <HAL_RCC_OscConfig+0x11e>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8002fa2: 2303 movs r3, #3
|
||
8002fa4: e1e6 b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
||
8002fa6: 4b53 ldr r3, [pc, #332] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002fa8: 681b ldr r3, [r3, #0]
|
||
8002faa: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8002fae: 2b00 cmp r3, #0
|
||
8002fb0: d1f0 bne.n 8002f94 <HAL_RCC_OscConfig+0x10c>
|
||
8002fb2: e000 b.n 8002fb6 <HAL_RCC_OscConfig+0x12e>
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
||
8002fb4: bf00 nop
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*----------------------------- HSI Configuration --------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
|
||
8002fb6: 687b ldr r3, [r7, #4]
|
||
8002fb8: 681b ldr r3, [r3, #0]
|
||
8002fba: f003 0302 and.w r3, r3, #2
|
||
8002fbe: 2b00 cmp r3, #0
|
||
8002fc0: d063 beq.n 800308a <HAL_RCC_OscConfig+0x202>
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
|
||
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
|
||
|
||
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
|
||
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
|
||
8002fc2: 4b4c ldr r3, [pc, #304] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002fc4: 685b ldr r3, [r3, #4]
|
||
8002fc6: f003 030c and.w r3, r3, #12
|
||
8002fca: 2b00 cmp r3, #0
|
||
8002fcc: d00b beq.n 8002fe6 <HAL_RCC_OscConfig+0x15e>
|
||
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
|
||
8002fce: 4b49 ldr r3, [pc, #292] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002fd0: 685b ldr r3, [r3, #4]
|
||
8002fd2: f003 030c and.w r3, r3, #12
|
||
8002fd6: 2b08 cmp r3, #8
|
||
8002fd8: d11c bne.n 8003014 <HAL_RCC_OscConfig+0x18c>
|
||
8002fda: 4b46 ldr r3, [pc, #280] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002fdc: 685b ldr r3, [r3, #4]
|
||
8002fde: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
8002fe2: 2b00 cmp r3, #0
|
||
8002fe4: d116 bne.n 8003014 <HAL_RCC_OscConfig+0x18c>
|
||
{
|
||
/* When HSI is used as system clock it will not disabled */
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
||
8002fe6: 4b43 ldr r3, [pc, #268] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8002fe8: 681b ldr r3, [r3, #0]
|
||
8002fea: f003 0302 and.w r3, r3, #2
|
||
8002fee: 2b00 cmp r3, #0
|
||
8002ff0: d005 beq.n 8002ffe <HAL_RCC_OscConfig+0x176>
|
||
8002ff2: 687b ldr r3, [r7, #4]
|
||
8002ff4: 691b ldr r3, [r3, #16]
|
||
8002ff6: 2b01 cmp r3, #1
|
||
8002ff8: d001 beq.n 8002ffe <HAL_RCC_OscConfig+0x176>
|
||
{
|
||
return HAL_ERROR;
|
||
8002ffa: 2301 movs r3, #1
|
||
8002ffc: e1ba b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
/* Otherwise, just the calibration is allowed */
|
||
else
|
||
{
|
||
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
||
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
||
8002ffe: 4b3d ldr r3, [pc, #244] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8003000: 681b ldr r3, [r3, #0]
|
||
8003002: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
||
8003006: 687b ldr r3, [r7, #4]
|
||
8003008: 695b ldr r3, [r3, #20]
|
||
800300a: 00db lsls r3, r3, #3
|
||
800300c: 4939 ldr r1, [pc, #228] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
800300e: 4313 orrs r3, r2
|
||
8003010: 600b str r3, [r1, #0]
|
||
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
||
8003012: e03a b.n 800308a <HAL_RCC_OscConfig+0x202>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Check the HSI State */
|
||
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
|
||
8003014: 687b ldr r3, [r7, #4]
|
||
8003016: 691b ldr r3, [r3, #16]
|
||
8003018: 2b00 cmp r3, #0
|
||
800301a: d020 beq.n 800305e <HAL_RCC_OscConfig+0x1d6>
|
||
{
|
||
/* Enable the Internal High Speed oscillator (HSI). */
|
||
__HAL_RCC_HSI_ENABLE();
|
||
800301c: 4b36 ldr r3, [pc, #216] ; (80030f8 <HAL_RCC_OscConfig+0x270>)
|
||
800301e: 2201 movs r2, #1
|
||
8003020: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8003022: f7fe fc5b bl 80018dc <HAL_GetTick>
|
||
8003026: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSI is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8003028: e008 b.n 800303c <HAL_RCC_OscConfig+0x1b4>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
||
800302a: f7fe fc57 bl 80018dc <HAL_GetTick>
|
||
800302e: 4602 mov r2, r0
|
||
8003030: 693b ldr r3, [r7, #16]
|
||
8003032: 1ad3 subs r3, r2, r3
|
||
8003034: 2b02 cmp r3, #2
|
||
8003036: d901 bls.n 800303c <HAL_RCC_OscConfig+0x1b4>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8003038: 2303 movs r3, #3
|
||
800303a: e19b b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
800303c: 4b2d ldr r3, [pc, #180] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
800303e: 681b ldr r3, [r3, #0]
|
||
8003040: f003 0302 and.w r3, r3, #2
|
||
8003044: 2b00 cmp r3, #0
|
||
8003046: d0f0 beq.n 800302a <HAL_RCC_OscConfig+0x1a2>
|
||
}
|
||
}
|
||
|
||
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
||
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
||
8003048: 4b2a ldr r3, [pc, #168] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
800304a: 681b ldr r3, [r3, #0]
|
||
800304c: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
||
8003050: 687b ldr r3, [r7, #4]
|
||
8003052: 695b ldr r3, [r3, #20]
|
||
8003054: 00db lsls r3, r3, #3
|
||
8003056: 4927 ldr r1, [pc, #156] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8003058: 4313 orrs r3, r2
|
||
800305a: 600b str r3, [r1, #0]
|
||
800305c: e015 b.n 800308a <HAL_RCC_OscConfig+0x202>
|
||
}
|
||
else
|
||
{
|
||
/* Disable the Internal High Speed oscillator (HSI). */
|
||
__HAL_RCC_HSI_DISABLE();
|
||
800305e: 4b26 ldr r3, [pc, #152] ; (80030f8 <HAL_RCC_OscConfig+0x270>)
|
||
8003060: 2200 movs r2, #0
|
||
8003062: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8003064: f7fe fc3a bl 80018dc <HAL_GetTick>
|
||
8003068: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till HSI is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
||
800306a: e008 b.n 800307e <HAL_RCC_OscConfig+0x1f6>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
||
800306c: f7fe fc36 bl 80018dc <HAL_GetTick>
|
||
8003070: 4602 mov r2, r0
|
||
8003072: 693b ldr r3, [r7, #16]
|
||
8003074: 1ad3 subs r3, r2, r3
|
||
8003076: 2b02 cmp r3, #2
|
||
8003078: d901 bls.n 800307e <HAL_RCC_OscConfig+0x1f6>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800307a: 2303 movs r3, #3
|
||
800307c: e17a b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
||
800307e: 4b1d ldr r3, [pc, #116] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
8003080: 681b ldr r3, [r3, #0]
|
||
8003082: f003 0302 and.w r3, r3, #2
|
||
8003086: 2b00 cmp r3, #0
|
||
8003088: d1f0 bne.n 800306c <HAL_RCC_OscConfig+0x1e4>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*------------------------------ LSI Configuration -------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
|
||
800308a: 687b ldr r3, [r7, #4]
|
||
800308c: 681b ldr r3, [r3, #0]
|
||
800308e: f003 0308 and.w r3, r3, #8
|
||
8003092: 2b00 cmp r3, #0
|
||
8003094: d03a beq.n 800310c <HAL_RCC_OscConfig+0x284>
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
|
||
|
||
/* Check the LSI State */
|
||
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
|
||
8003096: 687b ldr r3, [r7, #4]
|
||
8003098: 699b ldr r3, [r3, #24]
|
||
800309a: 2b00 cmp r3, #0
|
||
800309c: d019 beq.n 80030d2 <HAL_RCC_OscConfig+0x24a>
|
||
{
|
||
/* Enable the Internal Low Speed oscillator (LSI). */
|
||
__HAL_RCC_LSI_ENABLE();
|
||
800309e: 4b17 ldr r3, [pc, #92] ; (80030fc <HAL_RCC_OscConfig+0x274>)
|
||
80030a0: 2201 movs r2, #1
|
||
80030a2: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80030a4: f7fe fc1a bl 80018dc <HAL_GetTick>
|
||
80030a8: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSI is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
||
80030aa: e008 b.n 80030be <HAL_RCC_OscConfig+0x236>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
||
80030ac: f7fe fc16 bl 80018dc <HAL_GetTick>
|
||
80030b0: 4602 mov r2, r0
|
||
80030b2: 693b ldr r3, [r7, #16]
|
||
80030b4: 1ad3 subs r3, r2, r3
|
||
80030b6: 2b02 cmp r3, #2
|
||
80030b8: d901 bls.n 80030be <HAL_RCC_OscConfig+0x236>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80030ba: 2303 movs r3, #3
|
||
80030bc: e15a b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
||
80030be: 4b0d ldr r3, [pc, #52] ; (80030f4 <HAL_RCC_OscConfig+0x26c>)
|
||
80030c0: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80030c2: f003 0302 and.w r3, r3, #2
|
||
80030c6: 2b00 cmp r3, #0
|
||
80030c8: d0f0 beq.n 80030ac <HAL_RCC_OscConfig+0x224>
|
||
}
|
||
}
|
||
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
|
||
should be added.*/
|
||
RCC_Delay(1);
|
||
80030ca: 2001 movs r0, #1
|
||
80030cc: f000 fac4 bl 8003658 <RCC_Delay>
|
||
80030d0: e01c b.n 800310c <HAL_RCC_OscConfig+0x284>
|
||
}
|
||
else
|
||
{
|
||
/* Disable the Internal Low Speed oscillator (LSI). */
|
||
__HAL_RCC_LSI_DISABLE();
|
||
80030d2: 4b0a ldr r3, [pc, #40] ; (80030fc <HAL_RCC_OscConfig+0x274>)
|
||
80030d4: 2200 movs r2, #0
|
||
80030d6: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80030d8: f7fe fc00 bl 80018dc <HAL_GetTick>
|
||
80030dc: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSI is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
||
80030de: e00f b.n 8003100 <HAL_RCC_OscConfig+0x278>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
||
80030e0: f7fe fbfc bl 80018dc <HAL_GetTick>
|
||
80030e4: 4602 mov r2, r0
|
||
80030e6: 693b ldr r3, [r7, #16]
|
||
80030e8: 1ad3 subs r3, r2, r3
|
||
80030ea: 2b02 cmp r3, #2
|
||
80030ec: d908 bls.n 8003100 <HAL_RCC_OscConfig+0x278>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80030ee: 2303 movs r3, #3
|
||
80030f0: e140 b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
80030f2: bf00 nop
|
||
80030f4: 40021000 .word 0x40021000
|
||
80030f8: 42420000 .word 0x42420000
|
||
80030fc: 42420480 .word 0x42420480
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
||
8003100: 4b9e ldr r3, [pc, #632] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
8003102: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
8003104: f003 0302 and.w r3, r3, #2
|
||
8003108: 2b00 cmp r3, #0
|
||
800310a: d1e9 bne.n 80030e0 <HAL_RCC_OscConfig+0x258>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
/*------------------------------ LSE Configuration -------------------------*/
|
||
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
|
||
800310c: 687b ldr r3, [r7, #4]
|
||
800310e: 681b ldr r3, [r3, #0]
|
||
8003110: f003 0304 and.w r3, r3, #4
|
||
8003114: 2b00 cmp r3, #0
|
||
8003116: f000 80a6 beq.w 8003266 <HAL_RCC_OscConfig+0x3de>
|
||
{
|
||
FlagStatus pwrclkchanged = RESET;
|
||
800311a: 2300 movs r3, #0
|
||
800311c: 75fb strb r3, [r7, #23]
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
|
||
|
||
/* Update LSE configuration in Backup Domain control register */
|
||
/* Requires to enable write access to Backup Domain of necessary */
|
||
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
|
||
800311e: 4b97 ldr r3, [pc, #604] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
8003120: 69db ldr r3, [r3, #28]
|
||
8003122: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
8003126: 2b00 cmp r3, #0
|
||
8003128: d10d bne.n 8003146 <HAL_RCC_OscConfig+0x2be>
|
||
{
|
||
__HAL_RCC_PWR_CLK_ENABLE();
|
||
800312a: 4b94 ldr r3, [pc, #592] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
800312c: 69db ldr r3, [r3, #28]
|
||
800312e: 4a93 ldr r2, [pc, #588] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
8003130: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
||
8003134: 61d3 str r3, [r2, #28]
|
||
8003136: 4b91 ldr r3, [pc, #580] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
8003138: 69db ldr r3, [r3, #28]
|
||
800313a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
||
800313e: 60bb str r3, [r7, #8]
|
||
8003140: 68bb ldr r3, [r7, #8]
|
||
pwrclkchanged = SET;
|
||
8003142: 2301 movs r3, #1
|
||
8003144: 75fb strb r3, [r7, #23]
|
||
}
|
||
|
||
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
8003146: 4b8e ldr r3, [pc, #568] ; (8003380 <HAL_RCC_OscConfig+0x4f8>)
|
||
8003148: 681b ldr r3, [r3, #0]
|
||
800314a: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
800314e: 2b00 cmp r3, #0
|
||
8003150: d118 bne.n 8003184 <HAL_RCC_OscConfig+0x2fc>
|
||
{
|
||
/* Enable write access to Backup domain */
|
||
SET_BIT(PWR->CR, PWR_CR_DBP);
|
||
8003152: 4b8b ldr r3, [pc, #556] ; (8003380 <HAL_RCC_OscConfig+0x4f8>)
|
||
8003154: 681b ldr r3, [r3, #0]
|
||
8003156: 4a8a ldr r2, [pc, #552] ; (8003380 <HAL_RCC_OscConfig+0x4f8>)
|
||
8003158: f443 7380 orr.w r3, r3, #256 ; 0x100
|
||
800315c: 6013 str r3, [r2, #0]
|
||
|
||
/* Wait for Backup domain Write protection disable */
|
||
tickstart = HAL_GetTick();
|
||
800315e: f7fe fbbd bl 80018dc <HAL_GetTick>
|
||
8003162: 6138 str r0, [r7, #16]
|
||
|
||
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
8003164: e008 b.n 8003178 <HAL_RCC_OscConfig+0x2f0>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
||
8003166: f7fe fbb9 bl 80018dc <HAL_GetTick>
|
||
800316a: 4602 mov r2, r0
|
||
800316c: 693b ldr r3, [r7, #16]
|
||
800316e: 1ad3 subs r3, r2, r3
|
||
8003170: 2b64 cmp r3, #100 ; 0x64
|
||
8003172: d901 bls.n 8003178 <HAL_RCC_OscConfig+0x2f0>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8003174: 2303 movs r3, #3
|
||
8003176: e0fd b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
||
8003178: 4b81 ldr r3, [pc, #516] ; (8003380 <HAL_RCC_OscConfig+0x4f8>)
|
||
800317a: 681b ldr r3, [r3, #0]
|
||
800317c: f403 7380 and.w r3, r3, #256 ; 0x100
|
||
8003180: 2b00 cmp r3, #0
|
||
8003182: d0f0 beq.n 8003166 <HAL_RCC_OscConfig+0x2de>
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Set the new LSE configuration -----------------------------------------*/
|
||
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
||
8003184: 687b ldr r3, [r7, #4]
|
||
8003186: 68db ldr r3, [r3, #12]
|
||
8003188: 2b01 cmp r3, #1
|
||
800318a: d106 bne.n 800319a <HAL_RCC_OscConfig+0x312>
|
||
800318c: 4b7b ldr r3, [pc, #492] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
800318e: 6a1b ldr r3, [r3, #32]
|
||
8003190: 4a7a ldr r2, [pc, #488] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
8003192: f043 0301 orr.w r3, r3, #1
|
||
8003196: 6213 str r3, [r2, #32]
|
||
8003198: e02d b.n 80031f6 <HAL_RCC_OscConfig+0x36e>
|
||
800319a: 687b ldr r3, [r7, #4]
|
||
800319c: 68db ldr r3, [r3, #12]
|
||
800319e: 2b00 cmp r3, #0
|
||
80031a0: d10c bne.n 80031bc <HAL_RCC_OscConfig+0x334>
|
||
80031a2: 4b76 ldr r3, [pc, #472] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80031a4: 6a1b ldr r3, [r3, #32]
|
||
80031a6: 4a75 ldr r2, [pc, #468] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80031a8: f023 0301 bic.w r3, r3, #1
|
||
80031ac: 6213 str r3, [r2, #32]
|
||
80031ae: 4b73 ldr r3, [pc, #460] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80031b0: 6a1b ldr r3, [r3, #32]
|
||
80031b2: 4a72 ldr r2, [pc, #456] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80031b4: f023 0304 bic.w r3, r3, #4
|
||
80031b8: 6213 str r3, [r2, #32]
|
||
80031ba: e01c b.n 80031f6 <HAL_RCC_OscConfig+0x36e>
|
||
80031bc: 687b ldr r3, [r7, #4]
|
||
80031be: 68db ldr r3, [r3, #12]
|
||
80031c0: 2b05 cmp r3, #5
|
||
80031c2: d10c bne.n 80031de <HAL_RCC_OscConfig+0x356>
|
||
80031c4: 4b6d ldr r3, [pc, #436] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80031c6: 6a1b ldr r3, [r3, #32]
|
||
80031c8: 4a6c ldr r2, [pc, #432] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80031ca: f043 0304 orr.w r3, r3, #4
|
||
80031ce: 6213 str r3, [r2, #32]
|
||
80031d0: 4b6a ldr r3, [pc, #424] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80031d2: 6a1b ldr r3, [r3, #32]
|
||
80031d4: 4a69 ldr r2, [pc, #420] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80031d6: f043 0301 orr.w r3, r3, #1
|
||
80031da: 6213 str r3, [r2, #32]
|
||
80031dc: e00b b.n 80031f6 <HAL_RCC_OscConfig+0x36e>
|
||
80031de: 4b67 ldr r3, [pc, #412] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80031e0: 6a1b ldr r3, [r3, #32]
|
||
80031e2: 4a66 ldr r2, [pc, #408] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80031e4: f023 0301 bic.w r3, r3, #1
|
||
80031e8: 6213 str r3, [r2, #32]
|
||
80031ea: 4b64 ldr r3, [pc, #400] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80031ec: 6a1b ldr r3, [r3, #32]
|
||
80031ee: 4a63 ldr r2, [pc, #396] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80031f0: f023 0304 bic.w r3, r3, #4
|
||
80031f4: 6213 str r3, [r2, #32]
|
||
/* Check the LSE State */
|
||
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
|
||
80031f6: 687b ldr r3, [r7, #4]
|
||
80031f8: 68db ldr r3, [r3, #12]
|
||
80031fa: 2b00 cmp r3, #0
|
||
80031fc: d015 beq.n 800322a <HAL_RCC_OscConfig+0x3a2>
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80031fe: f7fe fb6d bl 80018dc <HAL_GetTick>
|
||
8003202: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSE is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
||
8003204: e00a b.n 800321c <HAL_RCC_OscConfig+0x394>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
||
8003206: f7fe fb69 bl 80018dc <HAL_GetTick>
|
||
800320a: 4602 mov r2, r0
|
||
800320c: 693b ldr r3, [r7, #16]
|
||
800320e: 1ad3 subs r3, r2, r3
|
||
8003210: f241 3288 movw r2, #5000 ; 0x1388
|
||
8003214: 4293 cmp r3, r2
|
||
8003216: d901 bls.n 800321c <HAL_RCC_OscConfig+0x394>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8003218: 2303 movs r3, #3
|
||
800321a: e0ab b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
||
800321c: 4b57 ldr r3, [pc, #348] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
800321e: 6a1b ldr r3, [r3, #32]
|
||
8003220: f003 0302 and.w r3, r3, #2
|
||
8003224: 2b00 cmp r3, #0
|
||
8003226: d0ee beq.n 8003206 <HAL_RCC_OscConfig+0x37e>
|
||
8003228: e014 b.n 8003254 <HAL_RCC_OscConfig+0x3cc>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
800322a: f7fe fb57 bl 80018dc <HAL_GetTick>
|
||
800322e: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till LSE is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
||
8003230: e00a b.n 8003248 <HAL_RCC_OscConfig+0x3c0>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
||
8003232: f7fe fb53 bl 80018dc <HAL_GetTick>
|
||
8003236: 4602 mov r2, r0
|
||
8003238: 693b ldr r3, [r7, #16]
|
||
800323a: 1ad3 subs r3, r2, r3
|
||
800323c: f241 3288 movw r2, #5000 ; 0x1388
|
||
8003240: 4293 cmp r3, r2
|
||
8003242: d901 bls.n 8003248 <HAL_RCC_OscConfig+0x3c0>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8003244: 2303 movs r3, #3
|
||
8003246: e095 b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
||
8003248: 4b4c ldr r3, [pc, #304] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
800324a: 6a1b ldr r3, [r3, #32]
|
||
800324c: f003 0302 and.w r3, r3, #2
|
||
8003250: 2b00 cmp r3, #0
|
||
8003252: d1ee bne.n 8003232 <HAL_RCC_OscConfig+0x3aa>
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Require to disable power clock if necessary */
|
||
if (pwrclkchanged == SET)
|
||
8003254: 7dfb ldrb r3, [r7, #23]
|
||
8003256: 2b01 cmp r3, #1
|
||
8003258: d105 bne.n 8003266 <HAL_RCC_OscConfig+0x3de>
|
||
{
|
||
__HAL_RCC_PWR_CLK_DISABLE();
|
||
800325a: 4b48 ldr r3, [pc, #288] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
800325c: 69db ldr r3, [r3, #28]
|
||
800325e: 4a47 ldr r2, [pc, #284] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
8003260: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
|
||
8003264: 61d3 str r3, [r2, #28]
|
||
|
||
#endif /* RCC_CR_PLL2ON */
|
||
/*-------------------------------- PLL Configuration -----------------------*/
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
|
||
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
|
||
8003266: 687b ldr r3, [r7, #4]
|
||
8003268: 69db ldr r3, [r3, #28]
|
||
800326a: 2b00 cmp r3, #0
|
||
800326c: f000 8081 beq.w 8003372 <HAL_RCC_OscConfig+0x4ea>
|
||
{
|
||
/* Check if the PLL is used as system clock or not */
|
||
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
|
||
8003270: 4b42 ldr r3, [pc, #264] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
8003272: 685b ldr r3, [r3, #4]
|
||
8003274: f003 030c and.w r3, r3, #12
|
||
8003278: 2b08 cmp r3, #8
|
||
800327a: d061 beq.n 8003340 <HAL_RCC_OscConfig+0x4b8>
|
||
{
|
||
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
|
||
800327c: 687b ldr r3, [r7, #4]
|
||
800327e: 69db ldr r3, [r3, #28]
|
||
8003280: 2b02 cmp r3, #2
|
||
8003282: d146 bne.n 8003312 <HAL_RCC_OscConfig+0x48a>
|
||
/* Check the parameters */
|
||
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
|
||
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
|
||
|
||
/* Disable the main PLL. */
|
||
__HAL_RCC_PLL_DISABLE();
|
||
8003284: 4b3f ldr r3, [pc, #252] ; (8003384 <HAL_RCC_OscConfig+0x4fc>)
|
||
8003286: 2200 movs r2, #0
|
||
8003288: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
800328a: f7fe fb27 bl 80018dc <HAL_GetTick>
|
||
800328e: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
8003290: e008 b.n 80032a4 <HAL_RCC_OscConfig+0x41c>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
8003292: f7fe fb23 bl 80018dc <HAL_GetTick>
|
||
8003296: 4602 mov r2, r0
|
||
8003298: 693b ldr r3, [r7, #16]
|
||
800329a: 1ad3 subs r3, r2, r3
|
||
800329c: 2b02 cmp r3, #2
|
||
800329e: d901 bls.n 80032a4 <HAL_RCC_OscConfig+0x41c>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
80032a0: 2303 movs r3, #3
|
||
80032a2: e067 b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
80032a4: 4b35 ldr r3, [pc, #212] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80032a6: 681b ldr r3, [r3, #0]
|
||
80032a8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
80032ac: 2b00 cmp r3, #0
|
||
80032ae: d1f0 bne.n 8003292 <HAL_RCC_OscConfig+0x40a>
|
||
}
|
||
}
|
||
|
||
/* Configure the HSE prediv factor --------------------------------*/
|
||
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
|
||
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
|
||
80032b0: 687b ldr r3, [r7, #4]
|
||
80032b2: 6a1b ldr r3, [r3, #32]
|
||
80032b4: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
||
80032b8: d108 bne.n 80032cc <HAL_RCC_OscConfig+0x444>
|
||
/* Set PREDIV1 source */
|
||
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
|
||
#endif /* RCC_CFGR2_PREDIV1SRC */
|
||
|
||
/* Set PREDIV1 Value */
|
||
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
|
||
80032ba: 4b30 ldr r3, [pc, #192] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80032bc: 685b ldr r3, [r3, #4]
|
||
80032be: f423 3200 bic.w r2, r3, #131072 ; 0x20000
|
||
80032c2: 687b ldr r3, [r7, #4]
|
||
80032c4: 689b ldr r3, [r3, #8]
|
||
80032c6: 492d ldr r1, [pc, #180] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80032c8: 4313 orrs r3, r2
|
||
80032ca: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Configure the main PLL clock source and multiplication factors. */
|
||
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
|
||
80032cc: 4b2b ldr r3, [pc, #172] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80032ce: 685b ldr r3, [r3, #4]
|
||
80032d0: f423 1274 bic.w r2, r3, #3997696 ; 0x3d0000
|
||
80032d4: 687b ldr r3, [r7, #4]
|
||
80032d6: 6a19 ldr r1, [r3, #32]
|
||
80032d8: 687b ldr r3, [r7, #4]
|
||
80032da: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
80032dc: 430b orrs r3, r1
|
||
80032de: 4927 ldr r1, [pc, #156] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
80032e0: 4313 orrs r3, r2
|
||
80032e2: 604b str r3, [r1, #4]
|
||
RCC_OscInitStruct->PLL.PLLMUL);
|
||
/* Enable the main PLL. */
|
||
__HAL_RCC_PLL_ENABLE();
|
||
80032e4: 4b27 ldr r3, [pc, #156] ; (8003384 <HAL_RCC_OscConfig+0x4fc>)
|
||
80032e6: 2201 movs r2, #1
|
||
80032e8: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
80032ea: f7fe faf7 bl 80018dc <HAL_GetTick>
|
||
80032ee: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is ready */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
80032f0: e008 b.n 8003304 <HAL_RCC_OscConfig+0x47c>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
80032f2: f7fe faf3 bl 80018dc <HAL_GetTick>
|
||
80032f6: 4602 mov r2, r0
|
||
80032f8: 693b ldr r3, [r7, #16]
|
||
80032fa: 1ad3 subs r3, r2, r3
|
||
80032fc: 2b02 cmp r3, #2
|
||
80032fe: d901 bls.n 8003304 <HAL_RCC_OscConfig+0x47c>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8003300: 2303 movs r3, #3
|
||
8003302: e037 b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
8003304: 4b1d ldr r3, [pc, #116] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
8003306: 681b ldr r3, [r3, #0]
|
||
8003308: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
800330c: 2b00 cmp r3, #0
|
||
800330e: d0f0 beq.n 80032f2 <HAL_RCC_OscConfig+0x46a>
|
||
8003310: e02f b.n 8003372 <HAL_RCC_OscConfig+0x4ea>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Disable the main PLL. */
|
||
__HAL_RCC_PLL_DISABLE();
|
||
8003312: 4b1c ldr r3, [pc, #112] ; (8003384 <HAL_RCC_OscConfig+0x4fc>)
|
||
8003314: 2200 movs r2, #0
|
||
8003316: 601a str r2, [r3, #0]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8003318: f7fe fae0 bl 80018dc <HAL_GetTick>
|
||
800331c: 6138 str r0, [r7, #16]
|
||
|
||
/* Wait till PLL is disabled */
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
800331e: e008 b.n 8003332 <HAL_RCC_OscConfig+0x4aa>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
||
8003320: f7fe fadc bl 80018dc <HAL_GetTick>
|
||
8003324: 4602 mov r2, r0
|
||
8003326: 693b ldr r3, [r7, #16]
|
||
8003328: 1ad3 subs r3, r2, r3
|
||
800332a: 2b02 cmp r3, #2
|
||
800332c: d901 bls.n 8003332 <HAL_RCC_OscConfig+0x4aa>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
800332e: 2303 movs r3, #3
|
||
8003330: e020 b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
||
8003332: 4b12 ldr r3, [pc, #72] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
8003334: 681b ldr r3, [r3, #0]
|
||
8003336: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
800333a: 2b00 cmp r3, #0
|
||
800333c: d1f0 bne.n 8003320 <HAL_RCC_OscConfig+0x498>
|
||
800333e: e018 b.n 8003372 <HAL_RCC_OscConfig+0x4ea>
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Check if there is a request to disable the PLL used as System clock source */
|
||
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
|
||
8003340: 687b ldr r3, [r7, #4]
|
||
8003342: 69db ldr r3, [r3, #28]
|
||
8003344: 2b01 cmp r3, #1
|
||
8003346: d101 bne.n 800334c <HAL_RCC_OscConfig+0x4c4>
|
||
{
|
||
return HAL_ERROR;
|
||
8003348: 2301 movs r3, #1
|
||
800334a: e013 b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
else
|
||
{
|
||
/* Do not return HAL_ERROR if request repeats the current configuration */
|
||
pll_config = RCC->CFGR;
|
||
800334c: 4b0b ldr r3, [pc, #44] ; (800337c <HAL_RCC_OscConfig+0x4f4>)
|
||
800334e: 685b ldr r3, [r3, #4]
|
||
8003350: 60fb str r3, [r7, #12]
|
||
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
||
8003352: 68fb ldr r3, [r7, #12]
|
||
8003354: f403 3280 and.w r2, r3, #65536 ; 0x10000
|
||
8003358: 687b ldr r3, [r7, #4]
|
||
800335a: 6a1b ldr r3, [r3, #32]
|
||
800335c: 429a cmp r2, r3
|
||
800335e: d106 bne.n 800336e <HAL_RCC_OscConfig+0x4e6>
|
||
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
|
||
8003360: 68fb ldr r3, [r7, #12]
|
||
8003362: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000
|
||
8003366: 687b ldr r3, [r7, #4]
|
||
8003368: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
||
800336a: 429a cmp r2, r3
|
||
800336c: d001 beq.n 8003372 <HAL_RCC_OscConfig+0x4ea>
|
||
{
|
||
return HAL_ERROR;
|
||
800336e: 2301 movs r3, #1
|
||
8003370: e000 b.n 8003374 <HAL_RCC_OscConfig+0x4ec>
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
return HAL_OK;
|
||
8003372: 2300 movs r3, #0
|
||
}
|
||
8003374: 4618 mov r0, r3
|
||
8003376: 3718 adds r7, #24
|
||
8003378: 46bd mov sp, r7
|
||
800337a: bd80 pop {r7, pc}
|
||
800337c: 40021000 .word 0x40021000
|
||
8003380: 40007000 .word 0x40007000
|
||
8003384: 42420060 .word 0x42420060
|
||
|
||
08003388 <HAL_RCC_ClockConfig>:
|
||
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
|
||
* currently used as system clock source.
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
|
||
{
|
||
8003388: b580 push {r7, lr}
|
||
800338a: b084 sub sp, #16
|
||
800338c: af00 add r7, sp, #0
|
||
800338e: 6078 str r0, [r7, #4]
|
||
8003390: 6039 str r1, [r7, #0]
|
||
uint32_t tickstart;
|
||
|
||
/* Check Null pointer */
|
||
if (RCC_ClkInitStruct == NULL)
|
||
8003392: 687b ldr r3, [r7, #4]
|
||
8003394: 2b00 cmp r3, #0
|
||
8003396: d101 bne.n 800339c <HAL_RCC_ClockConfig+0x14>
|
||
{
|
||
return HAL_ERROR;
|
||
8003398: 2301 movs r3, #1
|
||
800339a: e0d0 b.n 800353e <HAL_RCC_ClockConfig+0x1b6>
|
||
must be correctly programmed according to the frequency of the CPU clock
|
||
(HCLK) of the device. */
|
||
|
||
#if defined(FLASH_ACR_LATENCY)
|
||
/* Increasing the number of wait states because of higher CPU frequency */
|
||
if (FLatency > __HAL_FLASH_GET_LATENCY())
|
||
800339c: 4b6a ldr r3, [pc, #424] ; (8003548 <HAL_RCC_ClockConfig+0x1c0>)
|
||
800339e: 681b ldr r3, [r3, #0]
|
||
80033a0: f003 0307 and.w r3, r3, #7
|
||
80033a4: 683a ldr r2, [r7, #0]
|
||
80033a6: 429a cmp r2, r3
|
||
80033a8: d910 bls.n 80033cc <HAL_RCC_ClockConfig+0x44>
|
||
{
|
||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||
__HAL_FLASH_SET_LATENCY(FLatency);
|
||
80033aa: 4b67 ldr r3, [pc, #412] ; (8003548 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80033ac: 681b ldr r3, [r3, #0]
|
||
80033ae: f023 0207 bic.w r2, r3, #7
|
||
80033b2: 4965 ldr r1, [pc, #404] ; (8003548 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80033b4: 683b ldr r3, [r7, #0]
|
||
80033b6: 4313 orrs r3, r2
|
||
80033b8: 600b str r3, [r1, #0]
|
||
|
||
/* Check that the new number of wait states is taken into account to access the Flash
|
||
memory by reading the FLASH_ACR register */
|
||
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
||
80033ba: 4b63 ldr r3, [pc, #396] ; (8003548 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80033bc: 681b ldr r3, [r3, #0]
|
||
80033be: f003 0307 and.w r3, r3, #7
|
||
80033c2: 683a ldr r2, [r7, #0]
|
||
80033c4: 429a cmp r2, r3
|
||
80033c6: d001 beq.n 80033cc <HAL_RCC_ClockConfig+0x44>
|
||
{
|
||
return HAL_ERROR;
|
||
80033c8: 2301 movs r3, #1
|
||
80033ca: e0b8 b.n 800353e <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
|
||
#endif /* FLASH_ACR_LATENCY */
|
||
/*-------------------------- HCLK Configuration --------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
|
||
80033cc: 687b ldr r3, [r7, #4]
|
||
80033ce: 681b ldr r3, [r3, #0]
|
||
80033d0: f003 0302 and.w r3, r3, #2
|
||
80033d4: 2b00 cmp r3, #0
|
||
80033d6: d020 beq.n 800341a <HAL_RCC_ClockConfig+0x92>
|
||
{
|
||
/* Set the highest APBx dividers in order to ensure that we do not go through
|
||
a non-spec phase whatever we decrease or increase HCLK. */
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
||
80033d8: 687b ldr r3, [r7, #4]
|
||
80033da: 681b ldr r3, [r3, #0]
|
||
80033dc: f003 0304 and.w r3, r3, #4
|
||
80033e0: 2b00 cmp r3, #0
|
||
80033e2: d005 beq.n 80033f0 <HAL_RCC_ClockConfig+0x68>
|
||
{
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
|
||
80033e4: 4b59 ldr r3, [pc, #356] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033e6: 685b ldr r3, [r3, #4]
|
||
80033e8: 4a58 ldr r2, [pc, #352] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033ea: f443 63e0 orr.w r3, r3, #1792 ; 0x700
|
||
80033ee: 6053 str r3, [r2, #4]
|
||
}
|
||
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
||
80033f0: 687b ldr r3, [r7, #4]
|
||
80033f2: 681b ldr r3, [r3, #0]
|
||
80033f4: f003 0308 and.w r3, r3, #8
|
||
80033f8: 2b00 cmp r3, #0
|
||
80033fa: d005 beq.n 8003408 <HAL_RCC_ClockConfig+0x80>
|
||
{
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
|
||
80033fc: 4b53 ldr r3, [pc, #332] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
80033fe: 685b ldr r3, [r3, #4]
|
||
8003400: 4a52 ldr r2, [pc, #328] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003402: f443 5360 orr.w r3, r3, #14336 ; 0x3800
|
||
8003406: 6053 str r3, [r2, #4]
|
||
}
|
||
|
||
/* Set the new HCLK clock divider */
|
||
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
|
||
8003408: 4b50 ldr r3, [pc, #320] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
800340a: 685b ldr r3, [r3, #4]
|
||
800340c: f023 02f0 bic.w r2, r3, #240 ; 0xf0
|
||
8003410: 687b ldr r3, [r7, #4]
|
||
8003412: 689b ldr r3, [r3, #8]
|
||
8003414: 494d ldr r1, [pc, #308] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003416: 4313 orrs r3, r2
|
||
8003418: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/*------------------------- SYSCLK Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
|
||
800341a: 687b ldr r3, [r7, #4]
|
||
800341c: 681b ldr r3, [r3, #0]
|
||
800341e: f003 0301 and.w r3, r3, #1
|
||
8003422: 2b00 cmp r3, #0
|
||
8003424: d040 beq.n 80034a8 <HAL_RCC_ClockConfig+0x120>
|
||
{
|
||
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
|
||
|
||
/* HSE is selected as System Clock Source */
|
||
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
|
||
8003426: 687b ldr r3, [r7, #4]
|
||
8003428: 685b ldr r3, [r3, #4]
|
||
800342a: 2b01 cmp r3, #1
|
||
800342c: d107 bne.n 800343e <HAL_RCC_ClockConfig+0xb6>
|
||
{
|
||
/* Check the HSE ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
||
800342e: 4b47 ldr r3, [pc, #284] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003430: 681b ldr r3, [r3, #0]
|
||
8003432: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
||
8003436: 2b00 cmp r3, #0
|
||
8003438: d115 bne.n 8003466 <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
800343a: 2301 movs r3, #1
|
||
800343c: e07f b.n 800353e <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
/* PLL is selected as System Clock Source */
|
||
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
|
||
800343e: 687b ldr r3, [r7, #4]
|
||
8003440: 685b ldr r3, [r3, #4]
|
||
8003442: 2b02 cmp r3, #2
|
||
8003444: d107 bne.n 8003456 <HAL_RCC_ClockConfig+0xce>
|
||
{
|
||
/* Check the PLL ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
||
8003446: 4b41 ldr r3, [pc, #260] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003448: 681b ldr r3, [r3, #0]
|
||
800344a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
||
800344e: 2b00 cmp r3, #0
|
||
8003450: d109 bne.n 8003466 <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
8003452: 2301 movs r3, #1
|
||
8003454: e073 b.n 800353e <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
/* HSI is selected as System Clock Source */
|
||
else
|
||
{
|
||
/* Check the HSI ready flag */
|
||
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
||
8003456: 4b3d ldr r3, [pc, #244] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003458: 681b ldr r3, [r3, #0]
|
||
800345a: f003 0302 and.w r3, r3, #2
|
||
800345e: 2b00 cmp r3, #0
|
||
8003460: d101 bne.n 8003466 <HAL_RCC_ClockConfig+0xde>
|
||
{
|
||
return HAL_ERROR;
|
||
8003462: 2301 movs r3, #1
|
||
8003464: e06b b.n 800353e <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
|
||
8003466: 4b39 ldr r3, [pc, #228] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003468: 685b ldr r3, [r3, #4]
|
||
800346a: f023 0203 bic.w r2, r3, #3
|
||
800346e: 687b ldr r3, [r7, #4]
|
||
8003470: 685b ldr r3, [r3, #4]
|
||
8003472: 4936 ldr r1, [pc, #216] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003474: 4313 orrs r3, r2
|
||
8003476: 604b str r3, [r1, #4]
|
||
|
||
/* Get Start Tick */
|
||
tickstart = HAL_GetTick();
|
||
8003478: f7fe fa30 bl 80018dc <HAL_GetTick>
|
||
800347c: 60f8 str r0, [r7, #12]
|
||
|
||
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
||
800347e: e00a b.n 8003496 <HAL_RCC_ClockConfig+0x10e>
|
||
{
|
||
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
|
||
8003480: f7fe fa2c bl 80018dc <HAL_GetTick>
|
||
8003484: 4602 mov r2, r0
|
||
8003486: 68fb ldr r3, [r7, #12]
|
||
8003488: 1ad3 subs r3, r2, r3
|
||
800348a: f241 3288 movw r2, #5000 ; 0x1388
|
||
800348e: 4293 cmp r3, r2
|
||
8003490: d901 bls.n 8003496 <HAL_RCC_ClockConfig+0x10e>
|
||
{
|
||
return HAL_TIMEOUT;
|
||
8003492: 2303 movs r3, #3
|
||
8003494: e053 b.n 800353e <HAL_RCC_ClockConfig+0x1b6>
|
||
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
||
8003496: 4b2d ldr r3, [pc, #180] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003498: 685b ldr r3, [r3, #4]
|
||
800349a: f003 020c and.w r2, r3, #12
|
||
800349e: 687b ldr r3, [r7, #4]
|
||
80034a0: 685b ldr r3, [r3, #4]
|
||
80034a2: 009b lsls r3, r3, #2
|
||
80034a4: 429a cmp r2, r3
|
||
80034a6: d1eb bne.n 8003480 <HAL_RCC_ClockConfig+0xf8>
|
||
}
|
||
}
|
||
|
||
#if defined(FLASH_ACR_LATENCY)
|
||
/* Decreasing the number of wait states because of lower CPU frequency */
|
||
if (FLatency < __HAL_FLASH_GET_LATENCY())
|
||
80034a8: 4b27 ldr r3, [pc, #156] ; (8003548 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80034aa: 681b ldr r3, [r3, #0]
|
||
80034ac: f003 0307 and.w r3, r3, #7
|
||
80034b0: 683a ldr r2, [r7, #0]
|
||
80034b2: 429a cmp r2, r3
|
||
80034b4: d210 bcs.n 80034d8 <HAL_RCC_ClockConfig+0x150>
|
||
{
|
||
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
||
__HAL_FLASH_SET_LATENCY(FLatency);
|
||
80034b6: 4b24 ldr r3, [pc, #144] ; (8003548 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80034b8: 681b ldr r3, [r3, #0]
|
||
80034ba: f023 0207 bic.w r2, r3, #7
|
||
80034be: 4922 ldr r1, [pc, #136] ; (8003548 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80034c0: 683b ldr r3, [r7, #0]
|
||
80034c2: 4313 orrs r3, r2
|
||
80034c4: 600b str r3, [r1, #0]
|
||
|
||
/* Check that the new number of wait states is taken into account to access the Flash
|
||
memory by reading the FLASH_ACR register */
|
||
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
||
80034c6: 4b20 ldr r3, [pc, #128] ; (8003548 <HAL_RCC_ClockConfig+0x1c0>)
|
||
80034c8: 681b ldr r3, [r3, #0]
|
||
80034ca: f003 0307 and.w r3, r3, #7
|
||
80034ce: 683a ldr r2, [r7, #0]
|
||
80034d0: 429a cmp r2, r3
|
||
80034d2: d001 beq.n 80034d8 <HAL_RCC_ClockConfig+0x150>
|
||
{
|
||
return HAL_ERROR;
|
||
80034d4: 2301 movs r3, #1
|
||
80034d6: e032 b.n 800353e <HAL_RCC_ClockConfig+0x1b6>
|
||
}
|
||
}
|
||
#endif /* FLASH_ACR_LATENCY */
|
||
|
||
/*-------------------------- PCLK1 Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
||
80034d8: 687b ldr r3, [r7, #4]
|
||
80034da: 681b ldr r3, [r3, #0]
|
||
80034dc: f003 0304 and.w r3, r3, #4
|
||
80034e0: 2b00 cmp r3, #0
|
||
80034e2: d008 beq.n 80034f6 <HAL_RCC_ClockConfig+0x16e>
|
||
{
|
||
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
|
||
80034e4: 4b19 ldr r3, [pc, #100] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
80034e6: 685b ldr r3, [r3, #4]
|
||
80034e8: f423 62e0 bic.w r2, r3, #1792 ; 0x700
|
||
80034ec: 687b ldr r3, [r7, #4]
|
||
80034ee: 68db ldr r3, [r3, #12]
|
||
80034f0: 4916 ldr r1, [pc, #88] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
80034f2: 4313 orrs r3, r2
|
||
80034f4: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/*-------------------------- PCLK2 Configuration ---------------------------*/
|
||
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
||
80034f6: 687b ldr r3, [r7, #4]
|
||
80034f8: 681b ldr r3, [r3, #0]
|
||
80034fa: f003 0308 and.w r3, r3, #8
|
||
80034fe: 2b00 cmp r3, #0
|
||
8003500: d009 beq.n 8003516 <HAL_RCC_ClockConfig+0x18e>
|
||
{
|
||
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
|
||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
|
||
8003502: 4b12 ldr r3, [pc, #72] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003504: 685b ldr r3, [r3, #4]
|
||
8003506: f423 5260 bic.w r2, r3, #14336 ; 0x3800
|
||
800350a: 687b ldr r3, [r7, #4]
|
||
800350c: 691b ldr r3, [r3, #16]
|
||
800350e: 00db lsls r3, r3, #3
|
||
8003510: 490e ldr r1, [pc, #56] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
8003512: 4313 orrs r3, r2
|
||
8003514: 604b str r3, [r1, #4]
|
||
}
|
||
|
||
/* Update the SystemCoreClock global variable */
|
||
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
|
||
8003516: f000 f821 bl 800355c <HAL_RCC_GetSysClockFreq>
|
||
800351a: 4602 mov r2, r0
|
||
800351c: 4b0b ldr r3, [pc, #44] ; (800354c <HAL_RCC_ClockConfig+0x1c4>)
|
||
800351e: 685b ldr r3, [r3, #4]
|
||
8003520: 091b lsrs r3, r3, #4
|
||
8003522: f003 030f and.w r3, r3, #15
|
||
8003526: 490a ldr r1, [pc, #40] ; (8003550 <HAL_RCC_ClockConfig+0x1c8>)
|
||
8003528: 5ccb ldrb r3, [r1, r3]
|
||
800352a: fa22 f303 lsr.w r3, r2, r3
|
||
800352e: 4a09 ldr r2, [pc, #36] ; (8003554 <HAL_RCC_ClockConfig+0x1cc>)
|
||
8003530: 6013 str r3, [r2, #0]
|
||
|
||
/* Configure the source of time base considering new system clocks settings*/
|
||
HAL_InitTick(uwTickPrio);
|
||
8003532: 4b09 ldr r3, [pc, #36] ; (8003558 <HAL_RCC_ClockConfig+0x1d0>)
|
||
8003534: 681b ldr r3, [r3, #0]
|
||
8003536: 4618 mov r0, r3
|
||
8003538: f7fe f98e bl 8001858 <HAL_InitTick>
|
||
|
||
return HAL_OK;
|
||
800353c: 2300 movs r3, #0
|
||
}
|
||
800353e: 4618 mov r0, r3
|
||
8003540: 3710 adds r7, #16
|
||
8003542: 46bd mov sp, r7
|
||
8003544: bd80 pop {r7, pc}
|
||
8003546: bf00 nop
|
||
8003548: 40022000 .word 0x40022000
|
||
800354c: 40021000 .word 0x40021000
|
||
8003550: 080089cc .word 0x080089cc
|
||
8003554: 20000000 .word 0x20000000
|
||
8003558: 20000004 .word 0x20000004
|
||
|
||
0800355c <HAL_RCC_GetSysClockFreq>:
|
||
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
|
||
*
|
||
* @retval SYSCLK frequency
|
||
*/
|
||
uint32_t HAL_RCC_GetSysClockFreq(void)
|
||
{
|
||
800355c: b490 push {r4, r7}
|
||
800355e: b08a sub sp, #40 ; 0x28
|
||
8003560: af00 add r7, sp, #0
|
||
#if defined(RCC_CFGR2_PREDIV1SRC)
|
||
const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13};
|
||
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
||
#else
|
||
const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
|
||
8003562: 4b2a ldr r3, [pc, #168] ; (800360c <HAL_RCC_GetSysClockFreq+0xb0>)
|
||
8003564: 1d3c adds r4, r7, #4
|
||
8003566: cb0f ldmia r3, {r0, r1, r2, r3}
|
||
8003568: e884 000f stmia.w r4, {r0, r1, r2, r3}
|
||
#if defined(RCC_CFGR2_PREDIV1)
|
||
const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
|
||
#else
|
||
const uint8_t aPredivFactorTable[2] = {1, 2};
|
||
800356c: f240 2301 movw r3, #513 ; 0x201
|
||
8003570: 803b strh r3, [r7, #0]
|
||
#endif /*RCC_CFGR2_PREDIV1*/
|
||
|
||
#endif
|
||
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
|
||
8003572: 2300 movs r3, #0
|
||
8003574: 61fb str r3, [r7, #28]
|
||
8003576: 2300 movs r3, #0
|
||
8003578: 61bb str r3, [r7, #24]
|
||
800357a: 2300 movs r3, #0
|
||
800357c: 627b str r3, [r7, #36] ; 0x24
|
||
800357e: 2300 movs r3, #0
|
||
8003580: 617b str r3, [r7, #20]
|
||
uint32_t sysclockfreq = 0U;
|
||
8003582: 2300 movs r3, #0
|
||
8003584: 623b str r3, [r7, #32]
|
||
#if defined(RCC_CFGR2_PREDIV1SRC)
|
||
uint32_t prediv2 = 0U, pll2mul = 0U;
|
||
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
||
|
||
tmpreg = RCC->CFGR;
|
||
8003586: 4b22 ldr r3, [pc, #136] ; (8003610 <HAL_RCC_GetSysClockFreq+0xb4>)
|
||
8003588: 685b ldr r3, [r3, #4]
|
||
800358a: 61fb str r3, [r7, #28]
|
||
|
||
/* Get SYSCLK source -------------------------------------------------------*/
|
||
switch (tmpreg & RCC_CFGR_SWS)
|
||
800358c: 69fb ldr r3, [r7, #28]
|
||
800358e: f003 030c and.w r3, r3, #12
|
||
8003592: 2b04 cmp r3, #4
|
||
8003594: d002 beq.n 800359c <HAL_RCC_GetSysClockFreq+0x40>
|
||
8003596: 2b08 cmp r3, #8
|
||
8003598: d003 beq.n 80035a2 <HAL_RCC_GetSysClockFreq+0x46>
|
||
800359a: e02d b.n 80035f8 <HAL_RCC_GetSysClockFreq+0x9c>
|
||
{
|
||
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
|
||
{
|
||
sysclockfreq = HSE_VALUE;
|
||
800359c: 4b1d ldr r3, [pc, #116] ; (8003614 <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
800359e: 623b str r3, [r7, #32]
|
||
break;
|
||
80035a0: e02d b.n 80035fe <HAL_RCC_GetSysClockFreq+0xa2>
|
||
}
|
||
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
|
||
{
|
||
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
|
||
80035a2: 69fb ldr r3, [r7, #28]
|
||
80035a4: 0c9b lsrs r3, r3, #18
|
||
80035a6: f003 030f and.w r3, r3, #15
|
||
80035aa: f107 0228 add.w r2, r7, #40 ; 0x28
|
||
80035ae: 4413 add r3, r2
|
||
80035b0: f813 3c24 ldrb.w r3, [r3, #-36]
|
||
80035b4: 617b str r3, [r7, #20]
|
||
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
|
||
80035b6: 69fb ldr r3, [r7, #28]
|
||
80035b8: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
||
80035bc: 2b00 cmp r3, #0
|
||
80035be: d013 beq.n 80035e8 <HAL_RCC_GetSysClockFreq+0x8c>
|
||
{
|
||
#if defined(RCC_CFGR2_PREDIV1)
|
||
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
|
||
#else
|
||
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
|
||
80035c0: 4b13 ldr r3, [pc, #76] ; (8003610 <HAL_RCC_GetSysClockFreq+0xb4>)
|
||
80035c2: 685b ldr r3, [r3, #4]
|
||
80035c4: 0c5b lsrs r3, r3, #17
|
||
80035c6: f003 0301 and.w r3, r3, #1
|
||
80035ca: f107 0228 add.w r2, r7, #40 ; 0x28
|
||
80035ce: 4413 add r3, r2
|
||
80035d0: f813 3c28 ldrb.w r3, [r3, #-40]
|
||
80035d4: 61bb str r3, [r7, #24]
|
||
{
|
||
pllclk = pllclk / 2;
|
||
}
|
||
#else
|
||
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
|
||
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
|
||
80035d6: 697b ldr r3, [r7, #20]
|
||
80035d8: 4a0e ldr r2, [pc, #56] ; (8003614 <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
80035da: fb02 f203 mul.w r2, r2, r3
|
||
80035de: 69bb ldr r3, [r7, #24]
|
||
80035e0: fbb2 f3f3 udiv r3, r2, r3
|
||
80035e4: 627b str r3, [r7, #36] ; 0x24
|
||
80035e6: e004 b.n 80035f2 <HAL_RCC_GetSysClockFreq+0x96>
|
||
#endif /*RCC_CFGR2_PREDIV1SRC*/
|
||
}
|
||
else
|
||
{
|
||
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
|
||
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
|
||
80035e8: 697b ldr r3, [r7, #20]
|
||
80035ea: 4a0b ldr r2, [pc, #44] ; (8003618 <HAL_RCC_GetSysClockFreq+0xbc>)
|
||
80035ec: fb02 f303 mul.w r3, r2, r3
|
||
80035f0: 627b str r3, [r7, #36] ; 0x24
|
||
}
|
||
sysclockfreq = pllclk;
|
||
80035f2: 6a7b ldr r3, [r7, #36] ; 0x24
|
||
80035f4: 623b str r3, [r7, #32]
|
||
break;
|
||
80035f6: e002 b.n 80035fe <HAL_RCC_GetSysClockFreq+0xa2>
|
||
}
|
||
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
|
||
default: /* HSI used as system clock */
|
||
{
|
||
sysclockfreq = HSI_VALUE;
|
||
80035f8: 4b06 ldr r3, [pc, #24] ; (8003614 <HAL_RCC_GetSysClockFreq+0xb8>)
|
||
80035fa: 623b str r3, [r7, #32]
|
||
break;
|
||
80035fc: bf00 nop
|
||
}
|
||
}
|
||
return sysclockfreq;
|
||
80035fe: 6a3b ldr r3, [r7, #32]
|
||
}
|
||
8003600: 4618 mov r0, r3
|
||
8003602: 3728 adds r7, #40 ; 0x28
|
||
8003604: 46bd mov sp, r7
|
||
8003606: bc90 pop {r4, r7}
|
||
8003608: 4770 bx lr
|
||
800360a: bf00 nop
|
||
800360c: 080088d8 .word 0x080088d8
|
||
8003610: 40021000 .word 0x40021000
|
||
8003614: 007a1200 .word 0x007a1200
|
||
8003618: 003d0900 .word 0x003d0900
|
||
|
||
0800361c <HAL_RCC_GetHCLKFreq>:
|
||
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
|
||
* and updated within this function
|
||
* @retval HCLK frequency
|
||
*/
|
||
uint32_t HAL_RCC_GetHCLKFreq(void)
|
||
{
|
||
800361c: b480 push {r7}
|
||
800361e: af00 add r7, sp, #0
|
||
return SystemCoreClock;
|
||
8003620: 4b02 ldr r3, [pc, #8] ; (800362c <HAL_RCC_GetHCLKFreq+0x10>)
|
||
8003622: 681b ldr r3, [r3, #0]
|
||
}
|
||
8003624: 4618 mov r0, r3
|
||
8003626: 46bd mov sp, r7
|
||
8003628: bc80 pop {r7}
|
||
800362a: 4770 bx lr
|
||
800362c: 20000000 .word 0x20000000
|
||
|
||
08003630 <HAL_RCC_GetPCLK1Freq>:
|
||
* @note Each time PCLK1 changes, this function must be called to update the
|
||
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
|
||
* @retval PCLK1 frequency
|
||
*/
|
||
uint32_t HAL_RCC_GetPCLK1Freq(void)
|
||
{
|
||
8003630: b580 push {r7, lr}
|
||
8003632: af00 add r7, sp, #0
|
||
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
|
||
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
|
||
8003634: f7ff fff2 bl 800361c <HAL_RCC_GetHCLKFreq>
|
||
8003638: 4602 mov r2, r0
|
||
800363a: 4b05 ldr r3, [pc, #20] ; (8003650 <HAL_RCC_GetPCLK1Freq+0x20>)
|
||
800363c: 685b ldr r3, [r3, #4]
|
||
800363e: 0a1b lsrs r3, r3, #8
|
||
8003640: f003 0307 and.w r3, r3, #7
|
||
8003644: 4903 ldr r1, [pc, #12] ; (8003654 <HAL_RCC_GetPCLK1Freq+0x24>)
|
||
8003646: 5ccb ldrb r3, [r1, r3]
|
||
8003648: fa22 f303 lsr.w r3, r2, r3
|
||
}
|
||
800364c: 4618 mov r0, r3
|
||
800364e: bd80 pop {r7, pc}
|
||
8003650: 40021000 .word 0x40021000
|
||
8003654: 080089dc .word 0x080089dc
|
||
|
||
08003658 <RCC_Delay>:
|
||
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
|
||
* @param mdelay: specifies the delay time length, in milliseconds.
|
||
* @retval None
|
||
*/
|
||
static void RCC_Delay(uint32_t mdelay)
|
||
{
|
||
8003658: b480 push {r7}
|
||
800365a: b085 sub sp, #20
|
||
800365c: af00 add r7, sp, #0
|
||
800365e: 6078 str r0, [r7, #4]
|
||
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
|
||
8003660: 4b0a ldr r3, [pc, #40] ; (800368c <RCC_Delay+0x34>)
|
||
8003662: 681b ldr r3, [r3, #0]
|
||
8003664: 4a0a ldr r2, [pc, #40] ; (8003690 <RCC_Delay+0x38>)
|
||
8003666: fba2 2303 umull r2, r3, r2, r3
|
||
800366a: 0a5b lsrs r3, r3, #9
|
||
800366c: 687a ldr r2, [r7, #4]
|
||
800366e: fb02 f303 mul.w r3, r2, r3
|
||
8003672: 60fb str r3, [r7, #12]
|
||
do
|
||
{
|
||
__NOP();
|
||
8003674: bf00 nop
|
||
}
|
||
while (Delay --);
|
||
8003676: 68fb ldr r3, [r7, #12]
|
||
8003678: 1e5a subs r2, r3, #1
|
||
800367a: 60fa str r2, [r7, #12]
|
||
800367c: 2b00 cmp r3, #0
|
||
800367e: d1f9 bne.n 8003674 <RCC_Delay+0x1c>
|
||
}
|
||
8003680: bf00 nop
|
||
8003682: bf00 nop
|
||
8003684: 3714 adds r7, #20
|
||
8003686: 46bd mov sp, r7
|
||
8003688: bc80 pop {r7}
|
||
800368a: 4770 bx lr
|
||
800368c: 20000000 .word 0x20000000
|
||
8003690: 10624dd3 .word 0x10624dd3
|
||
|
||
08003694 <HAL_SRAM_Init>:
|
||
* @param ExtTiming Pointer to SRAM extended mode timing structure
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing,
|
||
FSMC_NORSRAM_TimingTypeDef *ExtTiming)
|
||
{
|
||
8003694: b580 push {r7, lr}
|
||
8003696: b084 sub sp, #16
|
||
8003698: af00 add r7, sp, #0
|
||
800369a: 60f8 str r0, [r7, #12]
|
||
800369c: 60b9 str r1, [r7, #8]
|
||
800369e: 607a str r2, [r7, #4]
|
||
/* Check the SRAM handle parameter */
|
||
if ((hsram == NULL) || (hsram->Init.BurstAccessMode == FSMC_BURST_ACCESS_MODE_ENABLE))
|
||
80036a0: 68fb ldr r3, [r7, #12]
|
||
80036a2: 2b00 cmp r3, #0
|
||
80036a4: d004 beq.n 80036b0 <HAL_SRAM_Init+0x1c>
|
||
80036a6: 68fb ldr r3, [r7, #12]
|
||
80036a8: 699b ldr r3, [r3, #24]
|
||
80036aa: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
||
80036ae: d101 bne.n 80036b4 <HAL_SRAM_Init+0x20>
|
||
{
|
||
return HAL_ERROR;
|
||
80036b0: 2301 movs r3, #1
|
||
80036b2: e038 b.n 8003726 <HAL_SRAM_Init+0x92>
|
||
}
|
||
|
||
if (hsram->State == HAL_SRAM_STATE_RESET)
|
||
80036b4: 68fb ldr r3, [r7, #12]
|
||
80036b6: f893 3041 ldrb.w r3, [r3, #65] ; 0x41
|
||
80036ba: b2db uxtb r3, r3
|
||
80036bc: 2b00 cmp r3, #0
|
||
80036be: d106 bne.n 80036ce <HAL_SRAM_Init+0x3a>
|
||
{
|
||
/* Allocate lock resource and initialize it */
|
||
hsram->Lock = HAL_UNLOCKED;
|
||
80036c0: 68fb ldr r3, [r7, #12]
|
||
80036c2: 2200 movs r2, #0
|
||
80036c4: f883 2040 strb.w r2, [r3, #64] ; 0x40
|
||
|
||
/* Init the low level hardware */
|
||
hsram->MspInitCallback(hsram);
|
||
#else
|
||
/* Initialize the low level hardware (MSP) */
|
||
HAL_SRAM_MspInit(hsram);
|
||
80036c8: 68f8 ldr r0, [r7, #12]
|
||
80036ca: f7fd ff91 bl 80015f0 <HAL_SRAM_MspInit>
|
||
#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */
|
||
}
|
||
|
||
/* Initialize SRAM control Interface */
|
||
(void)FSMC_NORSRAM_Init(hsram->Instance, &(hsram->Init));
|
||
80036ce: 68fb ldr r3, [r7, #12]
|
||
80036d0: 681a ldr r2, [r3, #0]
|
||
80036d2: 68fb ldr r3, [r7, #12]
|
||
80036d4: 3308 adds r3, #8
|
||
80036d6: 4619 mov r1, r3
|
||
80036d8: 4610 mov r0, r2
|
||
80036da: f000 f829 bl 8003730 <FSMC_NORSRAM_Init>
|
||
|
||
/* Initialize SRAM timing Interface */
|
||
(void)FSMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank);
|
||
80036de: 68fb ldr r3, [r7, #12]
|
||
80036e0: 6818 ldr r0, [r3, #0]
|
||
80036e2: 68fb ldr r3, [r7, #12]
|
||
80036e4: 689b ldr r3, [r3, #8]
|
||
80036e6: 461a mov r2, r3
|
||
80036e8: 68b9 ldr r1, [r7, #8]
|
||
80036ea: f000 f88b bl 8003804 <FSMC_NORSRAM_Timing_Init>
|
||
|
||
/* Initialize SRAM extended mode timing Interface */
|
||
(void)FSMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank,
|
||
80036ee: 68fb ldr r3, [r7, #12]
|
||
80036f0: 6858 ldr r0, [r3, #4]
|
||
80036f2: 68fb ldr r3, [r7, #12]
|
||
80036f4: 689a ldr r2, [r3, #8]
|
||
80036f6: 68fb ldr r3, [r7, #12]
|
||
80036f8: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
80036fa: 6879 ldr r1, [r7, #4]
|
||
80036fc: f000 f8b6 bl 800386c <FSMC_NORSRAM_Extended_Timing_Init>
|
||
hsram->Init.ExtendedMode);
|
||
|
||
/* Enable the NORSRAM device */
|
||
__FSMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
|
||
8003700: 68fb ldr r3, [r7, #12]
|
||
8003702: 681b ldr r3, [r3, #0]
|
||
8003704: 68fa ldr r2, [r7, #12]
|
||
8003706: 6892 ldr r2, [r2, #8]
|
||
8003708: f853 1022 ldr.w r1, [r3, r2, lsl #2]
|
||
800370c: 68fb ldr r3, [r7, #12]
|
||
800370e: 681b ldr r3, [r3, #0]
|
||
8003710: 68fa ldr r2, [r7, #12]
|
||
8003712: 6892 ldr r2, [r2, #8]
|
||
8003714: f041 0101 orr.w r1, r1, #1
|
||
8003718: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
/* Initialize the SRAM controller state */
|
||
hsram->State = HAL_SRAM_STATE_READY;
|
||
800371c: 68fb ldr r3, [r7, #12]
|
||
800371e: 2201 movs r2, #1
|
||
8003720: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
||
|
||
return HAL_OK;
|
||
8003724: 2300 movs r3, #0
|
||
}
|
||
8003726: 4618 mov r0, r3
|
||
8003728: 3710 adds r7, #16
|
||
800372a: 46bd mov sp, r7
|
||
800372c: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08003730 <FSMC_NORSRAM_Init>:
|
||
* @param Init Pointer to NORSRAM Initialization structure
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device,
|
||
FSMC_NORSRAM_InitTypeDef *Init)
|
||
{
|
||
8003730: b480 push {r7}
|
||
8003732: b087 sub sp, #28
|
||
8003734: af00 add r7, sp, #0
|
||
8003736: 6078 str r0, [r7, #4]
|
||
8003738: 6039 str r1, [r7, #0]
|
||
assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait));
|
||
assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst));
|
||
assert_param(IS_FSMC_PAGESIZE(Init->PageSize));
|
||
|
||
/* Disable NORSRAM Device */
|
||
__FSMC_NORSRAM_DISABLE(Device, Init->NSBank);
|
||
800373a: 683b ldr r3, [r7, #0]
|
||
800373c: 681a ldr r2, [r3, #0]
|
||
800373e: 687b ldr r3, [r7, #4]
|
||
8003740: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
||
8003744: 683a ldr r2, [r7, #0]
|
||
8003746: 6812 ldr r2, [r2, #0]
|
||
8003748: f023 0101 bic.w r1, r3, #1
|
||
800374c: 687b ldr r3, [r7, #4]
|
||
800374e: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
/* Set NORSRAM device control parameters */
|
||
if (Init->MemoryType == FSMC_MEMORY_TYPE_NOR)
|
||
8003752: 683b ldr r3, [r7, #0]
|
||
8003754: 689b ldr r3, [r3, #8]
|
||
8003756: 2b08 cmp r3, #8
|
||
8003758: d102 bne.n 8003760 <FSMC_NORSRAM_Init+0x30>
|
||
{
|
||
flashaccess = FSMC_NORSRAM_FLASH_ACCESS_ENABLE;
|
||
800375a: 2340 movs r3, #64 ; 0x40
|
||
800375c: 617b str r3, [r7, #20]
|
||
800375e: e001 b.n 8003764 <FSMC_NORSRAM_Init+0x34>
|
||
}
|
||
else
|
||
{
|
||
flashaccess = FSMC_NORSRAM_FLASH_ACCESS_DISABLE;
|
||
8003760: 2300 movs r3, #0
|
||
8003762: 617b str r3, [r7, #20]
|
||
}
|
||
|
||
btcr_reg = (flashaccess | \
|
||
Init->DataAddressMux | \
|
||
8003764: 683b ldr r3, [r7, #0]
|
||
8003766: 685a ldr r2, [r3, #4]
|
||
btcr_reg = (flashaccess | \
|
||
8003768: 697b ldr r3, [r7, #20]
|
||
800376a: 431a orrs r2, r3
|
||
Init->MemoryType | \
|
||
800376c: 683b ldr r3, [r7, #0]
|
||
800376e: 689b ldr r3, [r3, #8]
|
||
Init->DataAddressMux | \
|
||
8003770: 431a orrs r2, r3
|
||
Init->MemoryDataWidth | \
|
||
8003772: 683b ldr r3, [r7, #0]
|
||
8003774: 68db ldr r3, [r3, #12]
|
||
Init->MemoryType | \
|
||
8003776: 431a orrs r2, r3
|
||
Init->BurstAccessMode | \
|
||
8003778: 683b ldr r3, [r7, #0]
|
||
800377a: 691b ldr r3, [r3, #16]
|
||
Init->MemoryDataWidth | \
|
||
800377c: 431a orrs r2, r3
|
||
Init->WaitSignalPolarity | \
|
||
800377e: 683b ldr r3, [r7, #0]
|
||
8003780: 695b ldr r3, [r3, #20]
|
||
Init->BurstAccessMode | \
|
||
8003782: 431a orrs r2, r3
|
||
Init->WaitSignalActive | \
|
||
8003784: 683b ldr r3, [r7, #0]
|
||
8003786: 69db ldr r3, [r3, #28]
|
||
Init->WaitSignalPolarity | \
|
||
8003788: 431a orrs r2, r3
|
||
Init->WriteOperation | \
|
||
800378a: 683b ldr r3, [r7, #0]
|
||
800378c: 6a1b ldr r3, [r3, #32]
|
||
Init->WaitSignalActive | \
|
||
800378e: 431a orrs r2, r3
|
||
Init->WaitSignal | \
|
||
8003790: 683b ldr r3, [r7, #0]
|
||
8003792: 6a5b ldr r3, [r3, #36] ; 0x24
|
||
Init->WriteOperation | \
|
||
8003794: 431a orrs r2, r3
|
||
Init->ExtendedMode | \
|
||
8003796: 683b ldr r3, [r7, #0]
|
||
8003798: 6a9b ldr r3, [r3, #40] ; 0x28
|
||
Init->WaitSignal | \
|
||
800379a: 431a orrs r2, r3
|
||
Init->AsynchronousWait | \
|
||
800379c: 683b ldr r3, [r7, #0]
|
||
800379e: 6adb ldr r3, [r3, #44] ; 0x2c
|
||
Init->ExtendedMode | \
|
||
80037a0: 431a orrs r2, r3
|
||
Init->WriteBurst);
|
||
80037a2: 683b ldr r3, [r7, #0]
|
||
80037a4: 6b1b ldr r3, [r3, #48] ; 0x30
|
||
btcr_reg = (flashaccess | \
|
||
80037a6: 4313 orrs r3, r2
|
||
80037a8: 613b str r3, [r7, #16]
|
||
|
||
btcr_reg |= Init->WrapMode;
|
||
80037aa: 683b ldr r3, [r7, #0]
|
||
80037ac: 699b ldr r3, [r3, #24]
|
||
80037ae: 693a ldr r2, [r7, #16]
|
||
80037b0: 4313 orrs r3, r2
|
||
80037b2: 613b str r3, [r7, #16]
|
||
btcr_reg |= Init->PageSize;
|
||
80037b4: 683b ldr r3, [r7, #0]
|
||
80037b6: 6b5b ldr r3, [r3, #52] ; 0x34
|
||
80037b8: 693a ldr r2, [r7, #16]
|
||
80037ba: 4313 orrs r3, r2
|
||
80037bc: 613b str r3, [r7, #16]
|
||
|
||
mask = (FSMC_BCRx_MBKEN |
|
||
80037be: 4b10 ldr r3, [pc, #64] ; (8003800 <FSMC_NORSRAM_Init+0xd0>)
|
||
80037c0: 60fb str r3, [r7, #12]
|
||
FSMC_BCRx_WAITEN |
|
||
FSMC_BCRx_EXTMOD |
|
||
FSMC_BCRx_ASYNCWAIT |
|
||
FSMC_BCRx_CBURSTRW);
|
||
|
||
mask |= FSMC_BCRx_WRAPMOD;
|
||
80037c2: 68fb ldr r3, [r7, #12]
|
||
80037c4: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
||
80037c8: 60fb str r3, [r7, #12]
|
||
mask |= 0x00070000U; /* CPSIZE to be defined in CMSIS file */
|
||
80037ca: 68fb ldr r3, [r7, #12]
|
||
80037cc: f443 23e0 orr.w r3, r3, #458752 ; 0x70000
|
||
80037d0: 60fb str r3, [r7, #12]
|
||
|
||
MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg);
|
||
80037d2: 683b ldr r3, [r7, #0]
|
||
80037d4: 681a ldr r2, [r3, #0]
|
||
80037d6: 687b ldr r3, [r7, #4]
|
||
80037d8: f853 2022 ldr.w r2, [r3, r2, lsl #2]
|
||
80037dc: 68fb ldr r3, [r7, #12]
|
||
80037de: 43db mvns r3, r3
|
||
80037e0: ea02 0103 and.w r1, r2, r3
|
||
80037e4: 683b ldr r3, [r7, #0]
|
||
80037e6: 681a ldr r2, [r3, #0]
|
||
80037e8: 693b ldr r3, [r7, #16]
|
||
80037ea: 4319 orrs r1, r3
|
||
80037ec: 687b ldr r3, [r7, #4]
|
||
80037ee: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
|
||
|
||
return HAL_OK;
|
||
80037f2: 2300 movs r3, #0
|
||
}
|
||
80037f4: 4618 mov r0, r3
|
||
80037f6: 371c adds r7, #28
|
||
80037f8: 46bd mov sp, r7
|
||
80037fa: bc80 pop {r7}
|
||
80037fc: 4770 bx lr
|
||
80037fe: bf00 nop
|
||
8003800: 0008fb7f .word 0x0008fb7f
|
||
|
||
08003804 <FSMC_NORSRAM_Timing_Init>:
|
||
* @param Bank NORSRAM bank number
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device,
|
||
FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)
|
||
{
|
||
8003804: b480 push {r7}
|
||
8003806: b085 sub sp, #20
|
||
8003808: af00 add r7, sp, #0
|
||
800380a: 60f8 str r0, [r7, #12]
|
||
800380c: 60b9 str r1, [r7, #8]
|
||
800380e: 607a str r2, [r7, #4]
|
||
assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency));
|
||
assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
|
||
assert_param(IS_FSMC_NORSRAM_BANK(Bank));
|
||
|
||
/* Set FSMC_NORSRAM device timing parameters */
|
||
MODIFY_REG(Device->BTCR[Bank + 1U], BTR_CLEAR_MASK, (Timing->AddressSetupTime |
|
||
8003810: 687b ldr r3, [r7, #4]
|
||
8003812: 1c5a adds r2, r3, #1
|
||
8003814: 68fb ldr r3, [r7, #12]
|
||
8003816: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
||
800381a: f003 4140 and.w r1, r3, #3221225472 ; 0xc0000000
|
||
800381e: 68bb ldr r3, [r7, #8]
|
||
8003820: 681a ldr r2, [r3, #0]
|
||
8003822: 68bb ldr r3, [r7, #8]
|
||
8003824: 685b ldr r3, [r3, #4]
|
||
8003826: 011b lsls r3, r3, #4
|
||
8003828: 431a orrs r2, r3
|
||
800382a: 68bb ldr r3, [r7, #8]
|
||
800382c: 689b ldr r3, [r3, #8]
|
||
800382e: 021b lsls r3, r3, #8
|
||
8003830: 431a orrs r2, r3
|
||
8003832: 68bb ldr r3, [r7, #8]
|
||
8003834: 68db ldr r3, [r3, #12]
|
||
8003836: 041b lsls r3, r3, #16
|
||
8003838: 431a orrs r2, r3
|
||
800383a: 68bb ldr r3, [r7, #8]
|
||
800383c: 691b ldr r3, [r3, #16]
|
||
800383e: 3b01 subs r3, #1
|
||
8003840: 051b lsls r3, r3, #20
|
||
8003842: 431a orrs r2, r3
|
||
8003844: 68bb ldr r3, [r7, #8]
|
||
8003846: 695b ldr r3, [r3, #20]
|
||
8003848: 3b02 subs r3, #2
|
||
800384a: 061b lsls r3, r3, #24
|
||
800384c: 431a orrs r2, r3
|
||
800384e: 68bb ldr r3, [r7, #8]
|
||
8003850: 699b ldr r3, [r3, #24]
|
||
8003852: 4313 orrs r3, r2
|
||
8003854: 687a ldr r2, [r7, #4]
|
||
8003856: 3201 adds r2, #1
|
||
8003858: 4319 orrs r1, r3
|
||
800385a: 68fb ldr r3, [r7, #12]
|
||
800385c: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
((Timing->BusTurnAroundDuration) << FSMC_BTRx_BUSTURN_Pos) |
|
||
(((Timing->CLKDivision) - 1U) << FSMC_BTRx_CLKDIV_Pos) |
|
||
(((Timing->DataLatency) - 2U) << FSMC_BTRx_DATLAT_Pos) |
|
||
(Timing->AccessMode)));
|
||
|
||
return HAL_OK;
|
||
8003860: 2300 movs r3, #0
|
||
}
|
||
8003862: 4618 mov r0, r3
|
||
8003864: 3714 adds r7, #20
|
||
8003866: 46bd mov sp, r7
|
||
8003868: bc80 pop {r7}
|
||
800386a: 4770 bx lr
|
||
|
||
0800386c <FSMC_NORSRAM_Extended_Timing_Init>:
|
||
* @retval HAL status
|
||
*/
|
||
HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device,
|
||
FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank,
|
||
uint32_t ExtendedMode)
|
||
{
|
||
800386c: b480 push {r7}
|
||
800386e: b085 sub sp, #20
|
||
8003870: af00 add r7, sp, #0
|
||
8003872: 60f8 str r0, [r7, #12]
|
||
8003874: 60b9 str r1, [r7, #8]
|
||
8003876: 607a str r2, [r7, #4]
|
||
8003878: 603b str r3, [r7, #0]
|
||
/* Check the parameters */
|
||
assert_param(IS_FSMC_EXTENDED_MODE(ExtendedMode));
|
||
|
||
/* Set NORSRAM device timing register for write configuration, if extended mode is used */
|
||
if (ExtendedMode == FSMC_EXTENDED_MODE_ENABLE)
|
||
800387a: 683b ldr r3, [r7, #0]
|
||
800387c: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
|
||
8003880: d11d bne.n 80038be <FSMC_NORSRAM_Extended_Timing_Init+0x52>
|
||
assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
|
||
assert_param(IS_FSMC_NORSRAM_BANK(Bank));
|
||
|
||
/* Set NORSRAM device timing register for write configuration, if extended mode is used */
|
||
#if defined(FSMC_BWTRx_BUSTURN)
|
||
MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime |
|
||
8003882: 68fb ldr r3, [r7, #12]
|
||
8003884: 687a ldr r2, [r7, #4]
|
||
8003886: f853 2022 ldr.w r2, [r3, r2, lsl #2]
|
||
800388a: 4b13 ldr r3, [pc, #76] ; (80038d8 <FSMC_NORSRAM_Extended_Timing_Init+0x6c>)
|
||
800388c: 4013 ands r3, r2
|
||
800388e: 68ba ldr r2, [r7, #8]
|
||
8003890: 6811 ldr r1, [r2, #0]
|
||
8003892: 68ba ldr r2, [r7, #8]
|
||
8003894: 6852 ldr r2, [r2, #4]
|
||
8003896: 0112 lsls r2, r2, #4
|
||
8003898: 4311 orrs r1, r2
|
||
800389a: 68ba ldr r2, [r7, #8]
|
||
800389c: 6892 ldr r2, [r2, #8]
|
||
800389e: 0212 lsls r2, r2, #8
|
||
80038a0: 4311 orrs r1, r2
|
||
80038a2: 68ba ldr r2, [r7, #8]
|
||
80038a4: 6992 ldr r2, [r2, #24]
|
||
80038a6: 4311 orrs r1, r2
|
||
80038a8: 68ba ldr r2, [r7, #8]
|
||
80038aa: 68d2 ldr r2, [r2, #12]
|
||
80038ac: 0412 lsls r2, r2, #16
|
||
80038ae: 430a orrs r2, r1
|
||
80038b0: ea43 0102 orr.w r1, r3, r2
|
||
80038b4: 68fb ldr r3, [r7, #12]
|
||
80038b6: 687a ldr r2, [r7, #4]
|
||
80038b8: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
80038bc: e005 b.n 80038ca <FSMC_NORSRAM_Extended_Timing_Init+0x5e>
|
||
(((Timing->DataLatency) - 2U) << FSMC_BWTRx_DATLAT_Pos)));
|
||
#endif /* FSMC_BWTRx_BUSTURN */
|
||
}
|
||
else
|
||
{
|
||
Device->BWTR[Bank] = 0x0FFFFFFFU;
|
||
80038be: 68fb ldr r3, [r7, #12]
|
||
80038c0: 687a ldr r2, [r7, #4]
|
||
80038c2: f06f 4170 mvn.w r1, #4026531840 ; 0xf0000000
|
||
80038c6: f843 1022 str.w r1, [r3, r2, lsl #2]
|
||
}
|
||
|
||
return HAL_OK;
|
||
80038ca: 2300 movs r3, #0
|
||
}
|
||
80038cc: 4618 mov r0, r3
|
||
80038ce: 3714 adds r7, #20
|
||
80038d0: 46bd mov sp, r7
|
||
80038d2: bc80 pop {r7}
|
||
80038d4: 4770 bx lr
|
||
80038d6: bf00 nop
|
||
80038d8: cff00000 .word 0xcff00000
|
||
|
||
080038dc <LCD_WR_REG>:
|
||
_lcd_dev lcddev; //����LCD��Ҫ����
|
||
//**************************************************���ֿ��ٽӿ�
|
||
//д�Ĵ�������
|
||
//regval:�Ĵ���ֵ
|
||
void LCD_WR_REG(uint16_t regval)
|
||
{
|
||
80038dc: b480 push {r7}
|
||
80038de: b083 sub sp, #12
|
||
80038e0: af00 add r7, sp, #0
|
||
80038e2: 4603 mov r3, r0
|
||
80038e4: 80fb strh r3, [r7, #6]
|
||
LCD_REG_ADDRESS=regval;//д��Ҫд�ļĴ�������
|
||
80038e6: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
80038ea: 88fb ldrh r3, [r7, #6]
|
||
80038ec: 8013 strh r3, [r2, #0]
|
||
}
|
||
80038ee: bf00 nop
|
||
80038f0: 370c adds r7, #12
|
||
80038f2: 46bd mov sp, r7
|
||
80038f4: bc80 pop {r7}
|
||
80038f6: 4770 bx lr
|
||
|
||
080038f8 <LCD_WR_DATA>:
|
||
//дLCD����
|
||
//data:Ҫд����ֵ
|
||
void LCD_WR_DATA(uint16_t data)
|
||
{
|
||
80038f8: b480 push {r7}
|
||
80038fa: b083 sub sp, #12
|
||
80038fc: af00 add r7, sp, #0
|
||
80038fe: 4603 mov r3, r0
|
||
8003900: 80fb strh r3, [r7, #6]
|
||
LCD_DATA_ADDRESS=data;
|
||
8003902: 4a04 ldr r2, [pc, #16] ; (8003914 <LCD_WR_DATA+0x1c>)
|
||
8003904: 88fb ldrh r3, [r7, #6]
|
||
8003906: 8013 strh r3, [r2, #0]
|
||
}
|
||
8003908: bf00 nop
|
||
800390a: 370c adds r7, #12
|
||
800390c: 46bd mov sp, r7
|
||
800390e: bc80 pop {r7}
|
||
8003910: 4770 bx lr
|
||
8003912: bf00 nop
|
||
8003914: 6c000800 .word 0x6c000800
|
||
|
||
08003918 <LCD_WriteReg>:
|
||
}
|
||
//д�Ĵ���
|
||
//LCD_Reg:�Ĵ�����ַ
|
||
//LCD_RegValue:Ҫд��������
|
||
void LCD_WriteReg(uint16_t LCD_Reg, uint16_t LCD_RegValue)
|
||
{
|
||
8003918: b480 push {r7}
|
||
800391a: b083 sub sp, #12
|
||
800391c: af00 add r7, sp, #0
|
||
800391e: 4603 mov r3, r0
|
||
8003920: 460a mov r2, r1
|
||
8003922: 80fb strh r3, [r7, #6]
|
||
8003924: 4613 mov r3, r2
|
||
8003926: 80bb strh r3, [r7, #4]
|
||
LCD_REG_ADDRESS = LCD_Reg; //д��Ҫд�ļĴ�������
|
||
8003928: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
800392c: 88fb ldrh r3, [r7, #6]
|
||
800392e: 8013 strh r3, [r2, #0]
|
||
LCD_DATA_ADDRESS = LCD_RegValue;//�����
|
||
8003930: 4a03 ldr r2, [pc, #12] ; (8003940 <LCD_WriteReg+0x28>)
|
||
8003932: 88bb ldrh r3, [r7, #4]
|
||
8003934: 8013 strh r3, [r2, #0]
|
||
}
|
||
8003936: bf00 nop
|
||
8003938: 370c adds r7, #12
|
||
800393a: 46bd mov sp, r7
|
||
800393c: bc80 pop {r7}
|
||
800393e: 4770 bx lr
|
||
8003940: 6c000800 .word 0x6c000800
|
||
|
||
08003944 <LCD_ReadReg>:
|
||
//���Ĵ���
|
||
//LCD_Reg:�Ĵ�����ַ
|
||
//����ֵ:����������
|
||
uint16_t LCD_ReadReg(uint16_t LCD_Reg)
|
||
{
|
||
8003944: b480 push {r7}
|
||
8003946: b083 sub sp, #12
|
||
8003948: af00 add r7, sp, #0
|
||
800394a: 4603 mov r3, r0
|
||
800394c: 80fb strh r3, [r7, #6]
|
||
LCD_REG_ADDRESS=LCD_Reg; //д��Ҫ���ļĴ�������
|
||
800394e: f04f 42d8 mov.w r2, #1811939328 ; 0x6c000000
|
||
8003952: 88fb ldrh r3, [r7, #6]
|
||
8003954: 8013 strh r3, [r2, #0]
|
||
//delay_us(5);
|
||
return LCD_DATA_ADDRESS; //���ض�����ֵ
|
||
8003956: 4b04 ldr r3, [pc, #16] ; (8003968 <LCD_ReadReg+0x24>)
|
||
8003958: 881b ldrh r3, [r3, #0]
|
||
800395a: b29b uxth r3, r3
|
||
}
|
||
800395c: 4618 mov r0, r3
|
||
800395e: 370c adds r7, #12
|
||
8003960: 46bd mov sp, r7
|
||
8003962: bc80 pop {r7}
|
||
8003964: 4770 bx lr
|
||
8003966: bf00 nop
|
||
8003968: 6c000800 .word 0x6c000800
|
||
|
||
0800396c <LCD_Scan_Dir>:
|
||
//ע��:�����������ܻ��ܵ��˺������õ�Ӱ��(������9341/6804����������),
|
||
//����,һ������ΪL2R_U2D����,��������Ϊ����ɨ�跽ʽ,���ܵ�����ʾ������.
|
||
//dir:0~7,����8������(���嶨����lcd.h)
|
||
//9320/9325/9328/4531/4535/1505/b505/8989/5408/9341/5310��IC�Ѿ�ʵ�ʲ���
|
||
void LCD_Scan_Dir(uint8_t dir)
|
||
{
|
||
800396c: b580 push {r7, lr}
|
||
800396e: b084 sub sp, #16
|
||
8003970: af00 add r7, sp, #0
|
||
8003972: 4603 mov r3, r0
|
||
8003974: 71fb strb r3, [r7, #7]
|
||
uint16_t regval=0;
|
||
8003976: 2300 movs r3, #0
|
||
8003978: 81fb strh r3, [r7, #14]
|
||
uint8_t dirreg=0;
|
||
800397a: 2300 movs r3, #0
|
||
800397c: 737b strb r3, [r7, #13]
|
||
uint16_t temp;
|
||
if(lcddev.dir==1&&lcddev.id!=0X6804)//����ʱ����6804���ı�ɨ�跽����
|
||
800397e: 4ba8 ldr r3, [pc, #672] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003980: 799b ldrb r3, [r3, #6]
|
||
8003982: 2b01 cmp r3, #1
|
||
8003984: d134 bne.n 80039f0 <LCD_Scan_Dir+0x84>
|
||
8003986: 4ba6 ldr r3, [pc, #664] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003988: 889b ldrh r3, [r3, #4]
|
||
800398a: f646 0204 movw r2, #26628 ; 0x6804
|
||
800398e: 4293 cmp r3, r2
|
||
8003990: d02e beq.n 80039f0 <LCD_Scan_Dir+0x84>
|
||
{
|
||
switch(dir)//����ת��
|
||
8003992: 79fb ldrb r3, [r7, #7]
|
||
8003994: 2b07 cmp r3, #7
|
||
8003996: d82c bhi.n 80039f2 <LCD_Scan_Dir+0x86>
|
||
8003998: a201 add r2, pc, #4 ; (adr r2, 80039a0 <LCD_Scan_Dir+0x34>)
|
||
800399a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
800399e: bf00 nop
|
||
80039a0: 080039c1 .word 0x080039c1
|
||
80039a4: 080039c7 .word 0x080039c7
|
||
80039a8: 080039cd .word 0x080039cd
|
||
80039ac: 080039d3 .word 0x080039d3
|
||
80039b0: 080039d9 .word 0x080039d9
|
||
80039b4: 080039df .word 0x080039df
|
||
80039b8: 080039e5 .word 0x080039e5
|
||
80039bc: 080039eb .word 0x080039eb
|
||
{
|
||
case 0:dir=6;break;
|
||
80039c0: 2306 movs r3, #6
|
||
80039c2: 71fb strb r3, [r7, #7]
|
||
80039c4: e015 b.n 80039f2 <LCD_Scan_Dir+0x86>
|
||
case 1:dir=7;break;
|
||
80039c6: 2307 movs r3, #7
|
||
80039c8: 71fb strb r3, [r7, #7]
|
||
80039ca: e012 b.n 80039f2 <LCD_Scan_Dir+0x86>
|
||
case 2:dir=4;break;
|
||
80039cc: 2304 movs r3, #4
|
||
80039ce: 71fb strb r3, [r7, #7]
|
||
80039d0: e00f b.n 80039f2 <LCD_Scan_Dir+0x86>
|
||
case 3:dir=5;break;
|
||
80039d2: 2305 movs r3, #5
|
||
80039d4: 71fb strb r3, [r7, #7]
|
||
80039d6: e00c b.n 80039f2 <LCD_Scan_Dir+0x86>
|
||
case 4:dir=1;break;
|
||
80039d8: 2301 movs r3, #1
|
||
80039da: 71fb strb r3, [r7, #7]
|
||
80039dc: e009 b.n 80039f2 <LCD_Scan_Dir+0x86>
|
||
case 5:dir=0;break;
|
||
80039de: 2300 movs r3, #0
|
||
80039e0: 71fb strb r3, [r7, #7]
|
||
80039e2: e006 b.n 80039f2 <LCD_Scan_Dir+0x86>
|
||
case 6:dir=3;break;
|
||
80039e4: 2303 movs r3, #3
|
||
80039e6: 71fb strb r3, [r7, #7]
|
||
80039e8: e003 b.n 80039f2 <LCD_Scan_Dir+0x86>
|
||
case 7:dir=2;break;
|
||
80039ea: 2302 movs r3, #2
|
||
80039ec: 71fb strb r3, [r7, #7]
|
||
80039ee: e000 b.n 80039f2 <LCD_Scan_Dir+0x86>
|
||
}
|
||
}
|
||
80039f0: bf00 nop
|
||
if(lcddev.id==0x9341||lcddev.id==0X6804||lcddev.id==0X5310)//9341/6804/5310,������
|
||
80039f2: 4b8b ldr r3, [pc, #556] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
80039f4: 889b ldrh r3, [r3, #4]
|
||
80039f6: f249 3241 movw r2, #37697 ; 0x9341
|
||
80039fa: 4293 cmp r3, r2
|
||
80039fc: d00c beq.n 8003a18 <LCD_Scan_Dir+0xac>
|
||
80039fe: 4b88 ldr r3, [pc, #544] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003a00: 889b ldrh r3, [r3, #4]
|
||
8003a02: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003a06: 4293 cmp r3, r2
|
||
8003a08: d006 beq.n 8003a18 <LCD_Scan_Dir+0xac>
|
||
8003a0a: 4b85 ldr r3, [pc, #532] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003a0c: 889b ldrh r3, [r3, #4]
|
||
8003a0e: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003a12: 4293 cmp r3, r2
|
||
8003a14: f040 80bb bne.w 8003b8e <LCD_Scan_Dir+0x222>
|
||
{
|
||
switch(dir)
|
||
8003a18: 79fb ldrb r3, [r7, #7]
|
||
8003a1a: 2b07 cmp r3, #7
|
||
8003a1c: d835 bhi.n 8003a8a <LCD_Scan_Dir+0x11e>
|
||
8003a1e: a201 add r2, pc, #4 ; (adr r2, 8003a24 <LCD_Scan_Dir+0xb8>)
|
||
8003a20: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
8003a24: 08003a8b .word 0x08003a8b
|
||
8003a28: 08003a45 .word 0x08003a45
|
||
8003a2c: 08003a4f .word 0x08003a4f
|
||
8003a30: 08003a59 .word 0x08003a59
|
||
8003a34: 08003a63 .word 0x08003a63
|
||
8003a38: 08003a6d .word 0x08003a6d
|
||
8003a3c: 08003a77 .word 0x08003a77
|
||
8003a40: 08003a81 .word 0x08003a81
|
||
{
|
||
case L2R_U2D://��������,���ϵ���
|
||
regval|=(0<<7)|(0<<6)|(0<<5);
|
||
break;
|
||
case L2R_D2U://��������,���µ���
|
||
regval|=(1<<7)|(0<<6)|(0<<5);
|
||
8003a44: 89fb ldrh r3, [r7, #14]
|
||
8003a46: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
8003a4a: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a4c: e01d b.n 8003a8a <LCD_Scan_Dir+0x11e>
|
||
case R2L_U2D://���ҵ���,���ϵ���
|
||
regval|=(0<<7)|(1<<6)|(0<<5);
|
||
8003a4e: 89fb ldrh r3, [r7, #14]
|
||
8003a50: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8003a54: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a56: e018 b.n 8003a8a <LCD_Scan_Dir+0x11e>
|
||
case R2L_D2U://���ҵ���,���µ���
|
||
regval|=(1<<7)|(1<<6)|(0<<5);
|
||
8003a58: 89fb ldrh r3, [r7, #14]
|
||
8003a5a: f043 03c0 orr.w r3, r3, #192 ; 0xc0
|
||
8003a5e: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a60: e013 b.n 8003a8a <LCD_Scan_Dir+0x11e>
|
||
case U2D_L2R://���ϵ���,��������
|
||
regval|=(0<<7)|(0<<6)|(1<<5);
|
||
8003a62: 89fb ldrh r3, [r7, #14]
|
||
8003a64: f043 0320 orr.w r3, r3, #32
|
||
8003a68: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a6a: e00e b.n 8003a8a <LCD_Scan_Dir+0x11e>
|
||
case U2D_R2L://���ϵ���,���ҵ���
|
||
regval|=(0<<7)|(1<<6)|(1<<5);
|
||
8003a6c: 89fb ldrh r3, [r7, #14]
|
||
8003a6e: f043 0360 orr.w r3, r3, #96 ; 0x60
|
||
8003a72: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a74: e009 b.n 8003a8a <LCD_Scan_Dir+0x11e>
|
||
case D2U_L2R://���µ���,��������
|
||
regval|=(1<<7)|(0<<6)|(1<<5);
|
||
8003a76: 89fb ldrh r3, [r7, #14]
|
||
8003a78: f043 03a0 orr.w r3, r3, #160 ; 0xa0
|
||
8003a7c: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a7e: e004 b.n 8003a8a <LCD_Scan_Dir+0x11e>
|
||
case D2U_R2L://���µ���,���ҵ���
|
||
regval|=(1<<7)|(1<<6)|(1<<5);
|
||
8003a80: 89fb ldrh r3, [r7, #14]
|
||
8003a82: f043 03e0 orr.w r3, r3, #224 ; 0xe0
|
||
8003a86: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003a88: bf00 nop
|
||
}
|
||
dirreg=0X36;
|
||
8003a8a: 2336 movs r3, #54 ; 0x36
|
||
8003a8c: 737b strb r3, [r7, #13]
|
||
if(lcddev.id!=0X5310)regval|=0X08;//5310����ҪBGR
|
||
8003a8e: 4b64 ldr r3, [pc, #400] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003a90: 889b ldrh r3, [r3, #4]
|
||
8003a92: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003a96: 4293 cmp r3, r2
|
||
8003a98: d003 beq.n 8003aa2 <LCD_Scan_Dir+0x136>
|
||
8003a9a: 89fb ldrh r3, [r7, #14]
|
||
8003a9c: f043 0308 orr.w r3, r3, #8
|
||
8003aa0: 81fb strh r3, [r7, #14]
|
||
if(lcddev.id==0X6804)regval|=0x02;//6804��BIT6��9341���
|
||
8003aa2: 4b5f ldr r3, [pc, #380] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003aa4: 889b ldrh r3, [r3, #4]
|
||
8003aa6: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003aaa: 4293 cmp r3, r2
|
||
8003aac: d103 bne.n 8003ab6 <LCD_Scan_Dir+0x14a>
|
||
8003aae: 89fb ldrh r3, [r7, #14]
|
||
8003ab0: f043 0302 orr.w r3, r3, #2
|
||
8003ab4: 81fb strh r3, [r7, #14]
|
||
LCD_WriteReg(dirreg,regval);
|
||
8003ab6: 7b7b ldrb r3, [r7, #13]
|
||
8003ab8: b29b uxth r3, r3
|
||
8003aba: 89fa ldrh r2, [r7, #14]
|
||
8003abc: 4611 mov r1, r2
|
||
8003abe: 4618 mov r0, r3
|
||
8003ac0: f7ff ff2a bl 8003918 <LCD_WriteReg>
|
||
if((regval&0X20)||lcddev.dir==1)
|
||
8003ac4: 89fb ldrh r3, [r7, #14]
|
||
8003ac6: f003 0320 and.w r3, r3, #32
|
||
8003aca: 2b00 cmp r3, #0
|
||
8003acc: d103 bne.n 8003ad6 <LCD_Scan_Dir+0x16a>
|
||
8003ace: 4b54 ldr r3, [pc, #336] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003ad0: 799b ldrb r3, [r3, #6]
|
||
8003ad2: 2b01 cmp r3, #1
|
||
8003ad4: d110 bne.n 8003af8 <LCD_Scan_Dir+0x18c>
|
||
{
|
||
if(lcddev.width<lcddev.height)//����X,Y
|
||
8003ad6: 4b52 ldr r3, [pc, #328] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003ad8: 881a ldrh r2, [r3, #0]
|
||
8003ada: 4b51 ldr r3, [pc, #324] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003adc: 885b ldrh r3, [r3, #2]
|
||
8003ade: 429a cmp r2, r3
|
||
8003ae0: d21a bcs.n 8003b18 <LCD_Scan_Dir+0x1ac>
|
||
{
|
||
temp=lcddev.width;
|
||
8003ae2: 4b4f ldr r3, [pc, #316] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003ae4: 881b ldrh r3, [r3, #0]
|
||
8003ae6: 817b strh r3, [r7, #10]
|
||
lcddev.width=lcddev.height;
|
||
8003ae8: 4b4d ldr r3, [pc, #308] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003aea: 885a ldrh r2, [r3, #2]
|
||
8003aec: 4b4c ldr r3, [pc, #304] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003aee: 801a strh r2, [r3, #0]
|
||
lcddev.height=temp;
|
||
8003af0: 4a4b ldr r2, [pc, #300] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003af2: 897b ldrh r3, [r7, #10]
|
||
8003af4: 8053 strh r3, [r2, #2]
|
||
if(lcddev.width<lcddev.height)//����X,Y
|
||
8003af6: e00f b.n 8003b18 <LCD_Scan_Dir+0x1ac>
|
||
}
|
||
}else
|
||
{
|
||
if(lcddev.width>lcddev.height)//����X,Y
|
||
8003af8: 4b49 ldr r3, [pc, #292] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003afa: 881a ldrh r2, [r3, #0]
|
||
8003afc: 4b48 ldr r3, [pc, #288] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003afe: 885b ldrh r3, [r3, #2]
|
||
8003b00: 429a cmp r2, r3
|
||
8003b02: d909 bls.n 8003b18 <LCD_Scan_Dir+0x1ac>
|
||
{
|
||
temp=lcddev.width;
|
||
8003b04: 4b46 ldr r3, [pc, #280] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003b06: 881b ldrh r3, [r3, #0]
|
||
8003b08: 817b strh r3, [r7, #10]
|
||
lcddev.width=lcddev.height;
|
||
8003b0a: 4b45 ldr r3, [pc, #276] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003b0c: 885a ldrh r2, [r3, #2]
|
||
8003b0e: 4b44 ldr r3, [pc, #272] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003b10: 801a strh r2, [r3, #0]
|
||
lcddev.height=temp;
|
||
8003b12: 4a43 ldr r2, [pc, #268] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003b14: 897b ldrh r3, [r7, #10]
|
||
8003b16: 8053 strh r3, [r2, #2]
|
||
}
|
||
}
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
8003b18: 4b41 ldr r3, [pc, #260] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003b1a: 7a1b ldrb r3, [r3, #8]
|
||
8003b1c: b29b uxth r3, r3
|
||
8003b1e: 4618 mov r0, r3
|
||
8003b20: f7ff fedc bl 80038dc <LCD_WR_REG>
|
||
LCD_WR_DATA(0);LCD_WR_DATA(0);
|
||
8003b24: 2000 movs r0, #0
|
||
8003b26: f7ff fee7 bl 80038f8 <LCD_WR_DATA>
|
||
8003b2a: 2000 movs r0, #0
|
||
8003b2c: f7ff fee4 bl 80038f8 <LCD_WR_DATA>
|
||
LCD_WR_DATA((lcddev.width-1)>>8);LCD_WR_DATA((lcddev.width-1)&0XFF);
|
||
8003b30: 4b3b ldr r3, [pc, #236] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003b32: 881b ldrh r3, [r3, #0]
|
||
8003b34: 3b01 subs r3, #1
|
||
8003b36: 121b asrs r3, r3, #8
|
||
8003b38: b29b uxth r3, r3
|
||
8003b3a: 4618 mov r0, r3
|
||
8003b3c: f7ff fedc bl 80038f8 <LCD_WR_DATA>
|
||
8003b40: 4b37 ldr r3, [pc, #220] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003b42: 881b ldrh r3, [r3, #0]
|
||
8003b44: 3b01 subs r3, #1
|
||
8003b46: b29b uxth r3, r3
|
||
8003b48: b2db uxtb r3, r3
|
||
8003b4a: b29b uxth r3, r3
|
||
8003b4c: 4618 mov r0, r3
|
||
8003b4e: f7ff fed3 bl 80038f8 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8003b52: 4b33 ldr r3, [pc, #204] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003b54: 7a5b ldrb r3, [r3, #9]
|
||
8003b56: b29b uxth r3, r3
|
||
8003b58: 4618 mov r0, r3
|
||
8003b5a: f7ff febf bl 80038dc <LCD_WR_REG>
|
||
LCD_WR_DATA(0);LCD_WR_DATA(0);
|
||
8003b5e: 2000 movs r0, #0
|
||
8003b60: f7ff feca bl 80038f8 <LCD_WR_DATA>
|
||
8003b64: 2000 movs r0, #0
|
||
8003b66: f7ff fec7 bl 80038f8 <LCD_WR_DATA>
|
||
LCD_WR_DATA((lcddev.height-1)>>8);LCD_WR_DATA((lcddev.height-1)&0XFF);
|
||
8003b6a: 4b2d ldr r3, [pc, #180] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003b6c: 885b ldrh r3, [r3, #2]
|
||
8003b6e: 3b01 subs r3, #1
|
||
8003b70: 121b asrs r3, r3, #8
|
||
8003b72: b29b uxth r3, r3
|
||
8003b74: 4618 mov r0, r3
|
||
8003b76: f7ff febf bl 80038f8 <LCD_WR_DATA>
|
||
8003b7a: 4b29 ldr r3, [pc, #164] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003b7c: 885b ldrh r3, [r3, #2]
|
||
8003b7e: 3b01 subs r3, #1
|
||
8003b80: b29b uxth r3, r3
|
||
8003b82: b2db uxtb r3, r3
|
||
8003b84: b29b uxth r3, r3
|
||
8003b86: 4618 mov r0, r3
|
||
8003b88: f7ff feb6 bl 80038f8 <LCD_WR_DATA>
|
||
8003b8c: e058 b.n 8003c40 <LCD_Scan_Dir+0x2d4>
|
||
}else
|
||
{
|
||
switch(dir)
|
||
8003b8e: 79fb ldrb r3, [r7, #7]
|
||
8003b90: 2b07 cmp r3, #7
|
||
8003b92: d836 bhi.n 8003c02 <LCD_Scan_Dir+0x296>
|
||
8003b94: a201 add r2, pc, #4 ; (adr r2, 8003b9c <LCD_Scan_Dir+0x230>)
|
||
8003b96: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||
8003b9a: bf00 nop
|
||
8003b9c: 08003bbd .word 0x08003bbd
|
||
8003ba0: 08003bc7 .word 0x08003bc7
|
||
8003ba4: 08003bd1 .word 0x08003bd1
|
||
8003ba8: 08003c03 .word 0x08003c03
|
||
8003bac: 08003bdb .word 0x08003bdb
|
||
8003bb0: 08003be5 .word 0x08003be5
|
||
8003bb4: 08003bef .word 0x08003bef
|
||
8003bb8: 08003bf9 .word 0x08003bf9
|
||
{
|
||
case L2R_U2D://��������,���ϵ���
|
||
regval|=(1<<5)|(1<<4)|(0<<3);
|
||
8003bbc: 89fb ldrh r3, [r7, #14]
|
||
8003bbe: f043 0330 orr.w r3, r3, #48 ; 0x30
|
||
8003bc2: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003bc4: e01d b.n 8003c02 <LCD_Scan_Dir+0x296>
|
||
case L2R_D2U://��������,���µ���
|
||
regval|=(0<<5)|(1<<4)|(0<<3);
|
||
8003bc6: 89fb ldrh r3, [r7, #14]
|
||
8003bc8: f043 0310 orr.w r3, r3, #16
|
||
8003bcc: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003bce: e018 b.n 8003c02 <LCD_Scan_Dir+0x296>
|
||
case R2L_U2D://���ҵ���,���ϵ���
|
||
regval|=(1<<5)|(0<<4)|(0<<3);
|
||
8003bd0: 89fb ldrh r3, [r7, #14]
|
||
8003bd2: f043 0320 orr.w r3, r3, #32
|
||
8003bd6: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003bd8: e013 b.n 8003c02 <LCD_Scan_Dir+0x296>
|
||
case R2L_D2U://���ҵ���,���µ���
|
||
regval|=(0<<5)|(0<<4)|(0<<3);
|
||
break;
|
||
case U2D_L2R://���ϵ���,��������
|
||
regval|=(1<<5)|(1<<4)|(1<<3);
|
||
8003bda: 89fb ldrh r3, [r7, #14]
|
||
8003bdc: f043 0338 orr.w r3, r3, #56 ; 0x38
|
||
8003be0: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003be2: e00e b.n 8003c02 <LCD_Scan_Dir+0x296>
|
||
case U2D_R2L://���ϵ���,���ҵ���
|
||
regval|=(1<<5)|(0<<4)|(1<<3);
|
||
8003be4: 89fb ldrh r3, [r7, #14]
|
||
8003be6: f043 0328 orr.w r3, r3, #40 ; 0x28
|
||
8003bea: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003bec: e009 b.n 8003c02 <LCD_Scan_Dir+0x296>
|
||
case D2U_L2R://���µ���,��������
|
||
regval|=(0<<5)|(1<<4)|(1<<3);
|
||
8003bee: 89fb ldrh r3, [r7, #14]
|
||
8003bf0: f043 0318 orr.w r3, r3, #24
|
||
8003bf4: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003bf6: e004 b.n 8003c02 <LCD_Scan_Dir+0x296>
|
||
case D2U_R2L://���µ���,���ҵ���
|
||
regval|=(0<<5)|(0<<4)|(1<<3);
|
||
8003bf8: 89fb ldrh r3, [r7, #14]
|
||
8003bfa: f043 0308 orr.w r3, r3, #8
|
||
8003bfe: 81fb strh r3, [r7, #14]
|
||
break;
|
||
8003c00: bf00 nop
|
||
}
|
||
if(lcddev.id==0x8989)//8989 IC
|
||
8003c02: 4b07 ldr r3, [pc, #28] ; (8003c20 <LCD_Scan_Dir+0x2b4>)
|
||
8003c04: 889b ldrh r3, [r3, #4]
|
||
8003c06: f648 1289 movw r2, #35209 ; 0x8989
|
||
8003c0a: 4293 cmp r3, r2
|
||
8003c0c: d10a bne.n 8003c24 <LCD_Scan_Dir+0x2b8>
|
||
{
|
||
dirreg=0X11;
|
||
8003c0e: 2311 movs r3, #17
|
||
8003c10: 737b strb r3, [r7, #13]
|
||
regval|=0X6040; //65K
|
||
8003c12: 89fb ldrh r3, [r7, #14]
|
||
8003c14: f443 43c0 orr.w r3, r3, #24576 ; 0x6000
|
||
8003c18: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8003c1c: 81fb strh r3, [r7, #14]
|
||
8003c1e: e007 b.n 8003c30 <LCD_Scan_Dir+0x2c4>
|
||
8003c20: 200002a8 .word 0x200002a8
|
||
}else//��������IC
|
||
{
|
||
dirreg=0X03;
|
||
8003c24: 2303 movs r3, #3
|
||
8003c26: 737b strb r3, [r7, #13]
|
||
regval|=1<<12;
|
||
8003c28: 89fb ldrh r3, [r7, #14]
|
||
8003c2a: f443 5380 orr.w r3, r3, #4096 ; 0x1000
|
||
8003c2e: 81fb strh r3, [r7, #14]
|
||
}
|
||
LCD_WriteReg(dirreg,regval);
|
||
8003c30: 7b7b ldrb r3, [r7, #13]
|
||
8003c32: b29b uxth r3, r3
|
||
8003c34: 89fa ldrh r2, [r7, #14]
|
||
8003c36: 4611 mov r1, r2
|
||
8003c38: 4618 mov r0, r3
|
||
8003c3a: f7ff fe6d bl 8003918 <LCD_WriteReg>
|
||
}
|
||
}
|
||
8003c3e: bf00 nop
|
||
8003c40: bf00 nop
|
||
8003c42: 3710 adds r7, #16
|
||
8003c44: 46bd mov sp, r7
|
||
8003c46: bd80 pop {r7, pc}
|
||
|
||
08003c48 <LCD_Display_Dir>:
|
||
//����LCD��ʾ����
|
||
//dir:0,������1,����
|
||
void LCD_Display_Dir(uint8_t dir)
|
||
{
|
||
8003c48: b580 push {r7, lr}
|
||
8003c4a: b082 sub sp, #8
|
||
8003c4c: af00 add r7, sp, #0
|
||
8003c4e: 4603 mov r3, r0
|
||
8003c50: 71fb strb r3, [r7, #7]
|
||
if(dir==0) //����
|
||
8003c52: 79fb ldrb r3, [r7, #7]
|
||
8003c54: 2b00 cmp r3, #0
|
||
8003c56: d154 bne.n 8003d02 <LCD_Display_Dir+0xba>
|
||
{
|
||
lcddev.dir=0; //����
|
||
8003c58: 4b5d ldr r3, [pc, #372] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003c5a: 2200 movs r2, #0
|
||
8003c5c: 719a strb r2, [r3, #6]
|
||
lcddev.width=240;
|
||
8003c5e: 4b5c ldr r3, [pc, #368] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003c60: 22f0 movs r2, #240 ; 0xf0
|
||
8003c62: 801a strh r2, [r3, #0]
|
||
lcddev.height=320;
|
||
8003c64: 4b5a ldr r3, [pc, #360] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003c66: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8003c6a: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X9341||lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003c6c: 4b58 ldr r3, [pc, #352] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003c6e: 889b ldrh r3, [r3, #4]
|
||
8003c70: f249 3241 movw r2, #37697 ; 0x9341
|
||
8003c74: 4293 cmp r3, r2
|
||
8003c76: d00b beq.n 8003c90 <LCD_Display_Dir+0x48>
|
||
8003c78: 4b55 ldr r3, [pc, #340] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003c7a: 889b ldrh r3, [r3, #4]
|
||
8003c7c: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003c80: 4293 cmp r3, r2
|
||
8003c82: d005 beq.n 8003c90 <LCD_Display_Dir+0x48>
|
||
8003c84: 4b52 ldr r3, [pc, #328] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003c86: 889b ldrh r3, [r3, #4]
|
||
8003c88: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003c8c: 4293 cmp r3, r2
|
||
8003c8e: d11e bne.n 8003cce <LCD_Display_Dir+0x86>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
8003c90: 4b4f ldr r3, [pc, #316] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003c92: 222c movs r2, #44 ; 0x2c
|
||
8003c94: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2A;
|
||
8003c96: 4b4e ldr r3, [pc, #312] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003c98: 222a movs r2, #42 ; 0x2a
|
||
8003c9a: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
8003c9c: 4b4c ldr r3, [pc, #304] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003c9e: 222b movs r2, #43 ; 0x2b
|
||
8003ca0: 725a strb r2, [r3, #9]
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003ca2: 4b4b ldr r3, [pc, #300] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003ca4: 889b ldrh r3, [r3, #4]
|
||
8003ca6: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003caa: 4293 cmp r3, r2
|
||
8003cac: d006 beq.n 8003cbc <LCD_Display_Dir+0x74>
|
||
8003cae: 4b48 ldr r3, [pc, #288] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003cb0: 889b ldrh r3, [r3, #4]
|
||
8003cb2: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003cb6: 4293 cmp r3, r2
|
||
8003cb8: f040 8081 bne.w 8003dbe <LCD_Display_Dir+0x176>
|
||
{
|
||
lcddev.width=320;
|
||
8003cbc: 4b44 ldr r3, [pc, #272] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003cbe: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8003cc2: 801a strh r2, [r3, #0]
|
||
lcddev.height=480;
|
||
8003cc4: 4b42 ldr r3, [pc, #264] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003cc6: f44f 72f0 mov.w r2, #480 ; 0x1e0
|
||
8003cca: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003ccc: e077 b.n 8003dbe <LCD_Display_Dir+0x176>
|
||
}
|
||
}else if(lcddev.id==0X8989)
|
||
8003cce: 4b40 ldr r3, [pc, #256] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003cd0: 889b ldrh r3, [r3, #4]
|
||
8003cd2: f648 1289 movw r2, #35209 ; 0x8989
|
||
8003cd6: 4293 cmp r3, r2
|
||
8003cd8: d109 bne.n 8003cee <LCD_Display_Dir+0xa6>
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8003cda: 4b3d ldr r3, [pc, #244] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003cdc: 2222 movs r2, #34 ; 0x22
|
||
8003cde: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X4E;
|
||
8003ce0: 4b3b ldr r3, [pc, #236] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003ce2: 224e movs r2, #78 ; 0x4e
|
||
8003ce4: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X4F;
|
||
8003ce6: 4b3a ldr r3, [pc, #232] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003ce8: 224f movs r2, #79 ; 0x4f
|
||
8003cea: 725a strb r2, [r3, #9]
|
||
8003cec: e068 b.n 8003dc0 <LCD_Display_Dir+0x178>
|
||
}else
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8003cee: 4b38 ldr r3, [pc, #224] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003cf0: 2222 movs r2, #34 ; 0x22
|
||
8003cf2: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=R32;
|
||
8003cf4: 4b36 ldr r3, [pc, #216] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003cf6: 2220 movs r2, #32
|
||
8003cf8: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=R33;
|
||
8003cfa: 4b35 ldr r3, [pc, #212] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003cfc: 2221 movs r2, #33 ; 0x21
|
||
8003cfe: 725a strb r2, [r3, #9]
|
||
8003d00: e05e b.n 8003dc0 <LCD_Display_Dir+0x178>
|
||
}
|
||
}else //����
|
||
{
|
||
lcddev.dir=1; //����
|
||
8003d02: 4b33 ldr r3, [pc, #204] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d04: 2201 movs r2, #1
|
||
8003d06: 719a strb r2, [r3, #6]
|
||
lcddev.width=320;
|
||
8003d08: 4b31 ldr r3, [pc, #196] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d0a: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8003d0e: 801a strh r2, [r3, #0]
|
||
lcddev.height=240;
|
||
8003d10: 4b2f ldr r3, [pc, #188] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d12: 22f0 movs r2, #240 ; 0xf0
|
||
8003d14: 805a strh r2, [r3, #2]
|
||
if(lcddev.id==0X9341||lcddev.id==0X5310)
|
||
8003d16: 4b2e ldr r3, [pc, #184] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d18: 889b ldrh r3, [r3, #4]
|
||
8003d1a: f249 3241 movw r2, #37697 ; 0x9341
|
||
8003d1e: 4293 cmp r3, r2
|
||
8003d20: d005 beq.n 8003d2e <LCD_Display_Dir+0xe6>
|
||
8003d22: 4b2b ldr r3, [pc, #172] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d24: 889b ldrh r3, [r3, #4]
|
||
8003d26: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003d2a: 4293 cmp r3, r2
|
||
8003d2c: d109 bne.n 8003d42 <LCD_Display_Dir+0xfa>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
8003d2e: 4b28 ldr r3, [pc, #160] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d30: 222c movs r2, #44 ; 0x2c
|
||
8003d32: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2A;
|
||
8003d34: 4b26 ldr r3, [pc, #152] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d36: 222a movs r2, #42 ; 0x2a
|
||
8003d38: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
8003d3a: 4b25 ldr r3, [pc, #148] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d3c: 222b movs r2, #43 ; 0x2b
|
||
8003d3e: 725a strb r2, [r3, #9]
|
||
8003d40: e028 b.n 8003d94 <LCD_Display_Dir+0x14c>
|
||
}else if(lcddev.id==0X6804)
|
||
8003d42: 4b23 ldr r3, [pc, #140] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d44: 889b ldrh r3, [r3, #4]
|
||
8003d46: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003d4a: 4293 cmp r3, r2
|
||
8003d4c: d109 bne.n 8003d62 <LCD_Display_Dir+0x11a>
|
||
{
|
||
lcddev.wramcmd=0X2C;
|
||
8003d4e: 4b20 ldr r3, [pc, #128] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d50: 222c movs r2, #44 ; 0x2c
|
||
8003d52: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X2B;
|
||
8003d54: 4b1e ldr r3, [pc, #120] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d56: 222b movs r2, #43 ; 0x2b
|
||
8003d58: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2A;
|
||
8003d5a: 4b1d ldr r3, [pc, #116] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d5c: 222a movs r2, #42 ; 0x2a
|
||
8003d5e: 725a strb r2, [r3, #9]
|
||
8003d60: e018 b.n 8003d94 <LCD_Display_Dir+0x14c>
|
||
}else if(lcddev.id==0X8989)
|
||
8003d62: 4b1b ldr r3, [pc, #108] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d64: 889b ldrh r3, [r3, #4]
|
||
8003d66: f648 1289 movw r2, #35209 ; 0x8989
|
||
8003d6a: 4293 cmp r3, r2
|
||
8003d6c: d109 bne.n 8003d82 <LCD_Display_Dir+0x13a>
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8003d6e: 4b18 ldr r3, [pc, #96] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d70: 2222 movs r2, #34 ; 0x22
|
||
8003d72: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=0X4F;
|
||
8003d74: 4b16 ldr r3, [pc, #88] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d76: 224f movs r2, #79 ; 0x4f
|
||
8003d78: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X4E;
|
||
8003d7a: 4b15 ldr r3, [pc, #84] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d7c: 224e movs r2, #78 ; 0x4e
|
||
8003d7e: 725a strb r2, [r3, #9]
|
||
8003d80: e008 b.n 8003d94 <LCD_Display_Dir+0x14c>
|
||
}else
|
||
{
|
||
lcddev.wramcmd=R34;
|
||
8003d82: 4b13 ldr r3, [pc, #76] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d84: 2222 movs r2, #34 ; 0x22
|
||
8003d86: 71da strb r2, [r3, #7]
|
||
lcddev.setxcmd=R33;
|
||
8003d88: 4b11 ldr r3, [pc, #68] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d8a: 2221 movs r2, #33 ; 0x21
|
||
8003d8c: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=R32;
|
||
8003d8e: 4b10 ldr r3, [pc, #64] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d90: 2220 movs r2, #32
|
||
8003d92: 725a strb r2, [r3, #9]
|
||
}
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003d94: 4b0e ldr r3, [pc, #56] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003d96: 889b ldrh r3, [r3, #4]
|
||
8003d98: f646 0204 movw r2, #26628 ; 0x6804
|
||
8003d9c: 4293 cmp r3, r2
|
||
8003d9e: d005 beq.n 8003dac <LCD_Display_Dir+0x164>
|
||
8003da0: 4b0b ldr r3, [pc, #44] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003da2: 889b ldrh r3, [r3, #4]
|
||
8003da4: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003da8: 4293 cmp r3, r2
|
||
8003daa: d109 bne.n 8003dc0 <LCD_Display_Dir+0x178>
|
||
{
|
||
lcddev.width=480;
|
||
8003dac: 4b08 ldr r3, [pc, #32] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003dae: f44f 72f0 mov.w r2, #480 ; 0x1e0
|
||
8003db2: 801a strh r2, [r3, #0]
|
||
lcddev.height=320;
|
||
8003db4: 4b06 ldr r3, [pc, #24] ; (8003dd0 <LCD_Display_Dir+0x188>)
|
||
8003db6: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
8003dba: 805a strh r2, [r3, #2]
|
||
8003dbc: e000 b.n 8003dc0 <LCD_Display_Dir+0x178>
|
||
if(lcddev.id==0X6804||lcddev.id==0X5310)
|
||
8003dbe: bf00 nop
|
||
}
|
||
}
|
||
LCD_Scan_Dir(DFT_SCAN_DIR); //Ĭ��ɨ�跽��
|
||
8003dc0: 2000 movs r0, #0
|
||
8003dc2: f7ff fdd3 bl 800396c <LCD_Scan_Dir>
|
||
}
|
||
8003dc6: bf00 nop
|
||
8003dc8: 3708 adds r7, #8
|
||
8003dca: 46bd mov sp, r7
|
||
8003dcc: bd80 pop {r7, pc}
|
||
8003dce: bf00 nop
|
||
8003dd0: 200002a8 .word 0x200002a8
|
||
|
||
08003dd4 <LCDx_Init>:
|
||
|
||
//��ʼ��lcd
|
||
//�ó�ʼ���������Գ�ʼ������Һ��!
|
||
void LCDx_Init(void)
|
||
{
|
||
8003dd4: b580 push {r7, lr}
|
||
8003dd6: af00 add r7, sp, #0
|
||
|
||
|
||
HAL_Delay(50); // delay 50 ms
|
||
8003dd8: 2032 movs r0, #50 ; 0x32
|
||
8003dda: f7fd fd89 bl 80018f0 <HAL_Delay>
|
||
LCD_WriteReg(0x0000,0x0001);
|
||
8003dde: 2101 movs r1, #1
|
||
8003de0: 2000 movs r0, #0
|
||
8003de2: f7ff fd99 bl 8003918 <LCD_WriteReg>
|
||
HAL_Delay(50); // delay 50 ms
|
||
8003de6: 2032 movs r0, #50 ; 0x32
|
||
8003de8: f7fd fd82 bl 80018f0 <HAL_Delay>
|
||
lcddev.id = LCD_ReadReg(0x0000);
|
||
8003dec: 2000 movs r0, #0
|
||
8003dee: f7ff fda9 bl 8003944 <LCD_ReadReg>
|
||
8003df2: 4603 mov r3, r0
|
||
8003df4: 461a mov r2, r3
|
||
8003df6: 4b70 ldr r3, [pc, #448] ; (8003fb8 <LCDx_Init+0x1e4>)
|
||
8003df8: 809a strh r2, [r3, #4]
|
||
|
||
|
||
LCD_WriteReg(0x00E5,0x78F0);
|
||
8003dfa: f647 01f0 movw r1, #30960 ; 0x78f0
|
||
8003dfe: 20e5 movs r0, #229 ; 0xe5
|
||
8003e00: f7ff fd8a bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0001,0x0100);
|
||
8003e04: f44f 7180 mov.w r1, #256 ; 0x100
|
||
8003e08: 2001 movs r0, #1
|
||
8003e0a: f7ff fd85 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0002,0x0700);
|
||
8003e0e: f44f 61e0 mov.w r1, #1792 ; 0x700
|
||
8003e12: 2002 movs r0, #2
|
||
8003e14: f7ff fd80 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0003,0x1030);
|
||
8003e18: f241 0130 movw r1, #4144 ; 0x1030
|
||
8003e1c: 2003 movs r0, #3
|
||
8003e1e: f7ff fd7b bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0004,0x0000);
|
||
8003e22: 2100 movs r1, #0
|
||
8003e24: 2004 movs r0, #4
|
||
8003e26: f7ff fd77 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0008,0x0202);
|
||
8003e2a: f240 2102 movw r1, #514 ; 0x202
|
||
8003e2e: 2008 movs r0, #8
|
||
8003e30: f7ff fd72 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0009,0x0000);
|
||
8003e34: 2100 movs r1, #0
|
||
8003e36: 2009 movs r0, #9
|
||
8003e38: f7ff fd6e bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000A,0x0000);
|
||
8003e3c: 2100 movs r1, #0
|
||
8003e3e: 200a movs r0, #10
|
||
8003e40: f7ff fd6a bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000C,0x0000);
|
||
8003e44: 2100 movs r1, #0
|
||
8003e46: 200c movs r0, #12
|
||
8003e48: f7ff fd66 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000D,0x0000);
|
||
8003e4c: 2100 movs r1, #0
|
||
8003e4e: 200d movs r0, #13
|
||
8003e50: f7ff fd62 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x000F,0x0000);
|
||
8003e54: 2100 movs r1, #0
|
||
8003e56: 200f movs r0, #15
|
||
8003e58: f7ff fd5e bl 8003918 <LCD_WriteReg>
|
||
//power on sequence VGHVGL
|
||
LCD_WriteReg(0x0010,0x0000);
|
||
8003e5c: 2100 movs r1, #0
|
||
8003e5e: 2010 movs r0, #16
|
||
8003e60: f7ff fd5a bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0011,0x0007);
|
||
8003e64: 2107 movs r1, #7
|
||
8003e66: 2011 movs r0, #17
|
||
8003e68: f7ff fd56 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0012,0x0000);
|
||
8003e6c: 2100 movs r1, #0
|
||
8003e6e: 2012 movs r0, #18
|
||
8003e70: f7ff fd52 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0013,0x0000);
|
||
8003e74: 2100 movs r1, #0
|
||
8003e76: 2013 movs r0, #19
|
||
8003e78: f7ff fd4e bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0007,0x0000);
|
||
8003e7c: 2100 movs r1, #0
|
||
8003e7e: 2007 movs r0, #7
|
||
8003e80: f7ff fd4a bl 8003918 <LCD_WriteReg>
|
||
//vgh
|
||
LCD_WriteReg(0x0010,0x1690);
|
||
8003e84: f241 6190 movw r1, #5776 ; 0x1690
|
||
8003e88: 2010 movs r0, #16
|
||
8003e8a: f7ff fd45 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0011,0x0227);
|
||
8003e8e: f240 2127 movw r1, #551 ; 0x227
|
||
8003e92: 2011 movs r0, #17
|
||
8003e94: f7ff fd40 bl 8003918 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vregiout
|
||
LCD_WriteReg(0x0012,0x009D); //0x001b
|
||
8003e98: 219d movs r1, #157 ; 0x9d
|
||
8003e9a: 2012 movs r0, #18
|
||
8003e9c: f7ff fd3c bl 8003918 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vom amplitude
|
||
LCD_WriteReg(0x0013,0x1900);
|
||
8003ea0: f44f 51c8 mov.w r1, #6400 ; 0x1900
|
||
8003ea4: 2013 movs r0, #19
|
||
8003ea6: f7ff fd37 bl 8003918 <LCD_WriteReg>
|
||
//delayms(100);
|
||
//vom H
|
||
LCD_WriteReg(0x0029,0x0025);
|
||
8003eaa: 2125 movs r1, #37 ; 0x25
|
||
8003eac: 2029 movs r0, #41 ; 0x29
|
||
8003eae: f7ff fd33 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x002B,0x000D);
|
||
8003eb2: 210d movs r1, #13
|
||
8003eb4: 202b movs r0, #43 ; 0x2b
|
||
8003eb6: f7ff fd2f bl 8003918 <LCD_WriteReg>
|
||
//gamma
|
||
LCD_WriteReg(0x0030,0x0007);
|
||
8003eba: 2107 movs r1, #7
|
||
8003ebc: 2030 movs r0, #48 ; 0x30
|
||
8003ebe: f7ff fd2b bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0031,0x0303);
|
||
8003ec2: f240 3103 movw r1, #771 ; 0x303
|
||
8003ec6: 2031 movs r0, #49 ; 0x31
|
||
8003ec8: f7ff fd26 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0032,0x0003);// 0006
|
||
8003ecc: 2103 movs r1, #3
|
||
8003ece: 2032 movs r0, #50 ; 0x32
|
||
8003ed0: f7ff fd22 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0035,0x0206);
|
||
8003ed4: f240 2106 movw r1, #518 ; 0x206
|
||
8003ed8: 2035 movs r0, #53 ; 0x35
|
||
8003eda: f7ff fd1d bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0036,0x0008);
|
||
8003ede: 2108 movs r1, #8
|
||
8003ee0: 2036 movs r0, #54 ; 0x36
|
||
8003ee2: f7ff fd19 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0037,0x0406);
|
||
8003ee6: f240 4106 movw r1, #1030 ; 0x406
|
||
8003eea: 2037 movs r0, #55 ; 0x37
|
||
8003eec: f7ff fd14 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0038,0x0304);//0200
|
||
8003ef0: f44f 7141 mov.w r1, #772 ; 0x304
|
||
8003ef4: 2038 movs r0, #56 ; 0x38
|
||
8003ef6: f7ff fd0f bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0039,0x0007);
|
||
8003efa: 2107 movs r1, #7
|
||
8003efc: 2039 movs r0, #57 ; 0x39
|
||
8003efe: f7ff fd0b bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x003C,0x0602);// 0504
|
||
8003f02: f240 6102 movw r1, #1538 ; 0x602
|
||
8003f06: 203c movs r0, #60 ; 0x3c
|
||
8003f08: f7ff fd06 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x003D,0x0008);
|
||
8003f0c: 2108 movs r1, #8
|
||
8003f0e: 203d movs r0, #61 ; 0x3d
|
||
8003f10: f7ff fd02 bl 8003918 <LCD_WriteReg>
|
||
//ram
|
||
LCD_WriteReg(0x0050,0x0000);
|
||
8003f14: 2100 movs r1, #0
|
||
8003f16: 2050 movs r0, #80 ; 0x50
|
||
8003f18: f7ff fcfe bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0051,0x00EF);
|
||
8003f1c: 21ef movs r1, #239 ; 0xef
|
||
8003f1e: 2051 movs r0, #81 ; 0x51
|
||
8003f20: f7ff fcfa bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0052,0x0000);
|
||
8003f24: 2100 movs r1, #0
|
||
8003f26: 2052 movs r0, #82 ; 0x52
|
||
8003f28: f7ff fcf6 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0053,0x013F);
|
||
8003f2c: f240 113f movw r1, #319 ; 0x13f
|
||
8003f30: 2053 movs r0, #83 ; 0x53
|
||
8003f32: f7ff fcf1 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0060,0xA700);
|
||
8003f36: f44f 4127 mov.w r1, #42752 ; 0xa700
|
||
8003f3a: 2060 movs r0, #96 ; 0x60
|
||
8003f3c: f7ff fcec bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0061,0x0001);
|
||
8003f40: 2101 movs r1, #1
|
||
8003f42: 2061 movs r0, #97 ; 0x61
|
||
8003f44: f7ff fce8 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x006A,0x0000);
|
||
8003f48: 2100 movs r1, #0
|
||
8003f4a: 206a movs r0, #106 ; 0x6a
|
||
8003f4c: f7ff fce4 bl 8003918 <LCD_WriteReg>
|
||
//
|
||
LCD_WriteReg(0x0080,0x0000);
|
||
8003f50: 2100 movs r1, #0
|
||
8003f52: 2080 movs r0, #128 ; 0x80
|
||
8003f54: f7ff fce0 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0081,0x0000);
|
||
8003f58: 2100 movs r1, #0
|
||
8003f5a: 2081 movs r0, #129 ; 0x81
|
||
8003f5c: f7ff fcdc bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0082,0x0000);
|
||
8003f60: 2100 movs r1, #0
|
||
8003f62: 2082 movs r0, #130 ; 0x82
|
||
8003f64: f7ff fcd8 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0083,0x0000);
|
||
8003f68: 2100 movs r1, #0
|
||
8003f6a: 2083 movs r0, #131 ; 0x83
|
||
8003f6c: f7ff fcd4 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0084,0x0000);
|
||
8003f70: 2100 movs r1, #0
|
||
8003f72: 2084 movs r0, #132 ; 0x84
|
||
8003f74: f7ff fcd0 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0085,0x0000);
|
||
8003f78: 2100 movs r1, #0
|
||
8003f7a: 2085 movs r0, #133 ; 0x85
|
||
8003f7c: f7ff fccc bl 8003918 <LCD_WriteReg>
|
||
//
|
||
LCD_WriteReg(0x0090,0x0010);
|
||
8003f80: 2110 movs r1, #16
|
||
8003f82: 2090 movs r0, #144 ; 0x90
|
||
8003f84: f7ff fcc8 bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x0092,0x0600);
|
||
8003f88: f44f 61c0 mov.w r1, #1536 ; 0x600
|
||
8003f8c: 2092 movs r0, #146 ; 0x92
|
||
8003f8e: f7ff fcc3 bl 8003918 <LCD_WriteReg>
|
||
|
||
LCD_WriteReg(0x0007,0x0133);
|
||
8003f92: f240 1133 movw r1, #307 ; 0x133
|
||
8003f96: 2007 movs r0, #7
|
||
8003f98: f7ff fcbe bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(0x00,0x0022);//
|
||
8003f9c: 2122 movs r1, #34 ; 0x22
|
||
8003f9e: 2000 movs r0, #0
|
||
8003fa0: f7ff fcba bl 8003918 <LCD_WriteReg>
|
||
|
||
|
||
LCD_Display_Dir(1); //Ĭ��Ϊh��
|
||
8003fa4: 2001 movs r0, #1
|
||
8003fa6: f7ff fe4f bl 8003c48 <LCD_Display_Dir>
|
||
|
||
LCD_BL(0);
|
||
8003faa: 2200 movs r2, #0
|
||
8003fac: 2101 movs r1, #1
|
||
8003fae: 4803 ldr r0, [pc, #12] ; (8003fbc <LCDx_Init+0x1e8>)
|
||
8003fb0: f7fd ff51 bl 8001e56 <HAL_GPIO_WritePin>
|
||
|
||
}
|
||
8003fb4: bf00 nop
|
||
8003fb6: bd80 pop {r7, pc}
|
||
8003fb8: 200002a8 .word 0x200002a8
|
||
8003fbc: 40010c00 .word 0x40010c00
|
||
|
||
08003fc0 <LCD_SetCursor>:
|
||
//***********************************************************���� ���� ʲô��
|
||
//���ù���λ��
|
||
//Xpos:������
|
||
//Ypos:������
|
||
void LCD_SetCursor(uint16_t Xpos, uint16_t Ypos)
|
||
{
|
||
8003fc0: b580 push {r7, lr}
|
||
8003fc2: b082 sub sp, #8
|
||
8003fc4: af00 add r7, sp, #0
|
||
8003fc6: 4603 mov r3, r0
|
||
8003fc8: 460a mov r2, r1
|
||
8003fca: 80fb strh r3, [r7, #6]
|
||
8003fcc: 4613 mov r3, r2
|
||
8003fce: 80bb strh r3, [r7, #4]
|
||
if(lcddev.id==0X9341||lcddev.id==0X5310)
|
||
8003fd0: 4b42 ldr r3, [pc, #264] ; (80040dc <LCD_SetCursor+0x11c>)
|
||
8003fd2: 889b ldrh r3, [r3, #4]
|
||
8003fd4: f249 3241 movw r2, #37697 ; 0x9341
|
||
8003fd8: 4293 cmp r3, r2
|
||
8003fda: d005 beq.n 8003fe8 <LCD_SetCursor+0x28>
|
||
8003fdc: 4b3f ldr r3, [pc, #252] ; (80040dc <LCD_SetCursor+0x11c>)
|
||
8003fde: 889b ldrh r3, [r3, #4]
|
||
8003fe0: f245 3210 movw r2, #21264 ; 0x5310
|
||
8003fe4: 4293 cmp r3, r2
|
||
8003fe6: d124 bne.n 8004032 <LCD_SetCursor+0x72>
|
||
{
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
8003fe8: 4b3c ldr r3, [pc, #240] ; (80040dc <LCD_SetCursor+0x11c>)
|
||
8003fea: 7a1b ldrb r3, [r3, #8]
|
||
8003fec: b29b uxth r3, r3
|
||
8003fee: 4618 mov r0, r3
|
||
8003ff0: f7ff fc74 bl 80038dc <LCD_WR_REG>
|
||
LCD_WR_DATA(Xpos>>8);
|
||
8003ff4: 88fb ldrh r3, [r7, #6]
|
||
8003ff6: 0a1b lsrs r3, r3, #8
|
||
8003ff8: b29b uxth r3, r3
|
||
8003ffa: 4618 mov r0, r3
|
||
8003ffc: f7ff fc7c bl 80038f8 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Xpos&0XFF);
|
||
8004000: 88fb ldrh r3, [r7, #6]
|
||
8004002: b2db uxtb r3, r3
|
||
8004004: b29b uxth r3, r3
|
||
8004006: 4618 mov r0, r3
|
||
8004008: f7ff fc76 bl 80038f8 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
800400c: 4b33 ldr r3, [pc, #204] ; (80040dc <LCD_SetCursor+0x11c>)
|
||
800400e: 7a5b ldrb r3, [r3, #9]
|
||
8004010: b29b uxth r3, r3
|
||
8004012: 4618 mov r0, r3
|
||
8004014: f7ff fc62 bl 80038dc <LCD_WR_REG>
|
||
LCD_WR_DATA(Ypos>>8);
|
||
8004018: 88bb ldrh r3, [r7, #4]
|
||
800401a: 0a1b lsrs r3, r3, #8
|
||
800401c: b29b uxth r3, r3
|
||
800401e: 4618 mov r0, r3
|
||
8004020: f7ff fc6a bl 80038f8 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Ypos&0XFF);
|
||
8004024: 88bb ldrh r3, [r7, #4]
|
||
8004026: b2db uxtb r3, r3
|
||
8004028: b29b uxth r3, r3
|
||
800402a: 4618 mov r0, r3
|
||
800402c: f7ff fc64 bl 80038f8 <LCD_WR_DATA>
|
||
{
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//������ʵ���ǵ�תx,y����
|
||
LCD_WriteReg(lcddev.setxcmd, Xpos);
|
||
LCD_WriteReg(lcddev.setycmd, Ypos);
|
||
}
|
||
}
|
||
8004030: e050 b.n 80040d4 <LCD_SetCursor+0x114>
|
||
}else if(lcddev.id==0X6804)
|
||
8004032: 4b2a ldr r3, [pc, #168] ; (80040dc <LCD_SetCursor+0x11c>)
|
||
8004034: 889b ldrh r3, [r3, #4]
|
||
8004036: f646 0204 movw r2, #26628 ; 0x6804
|
||
800403a: 4293 cmp r3, r2
|
||
800403c: d12f bne.n 800409e <LCD_SetCursor+0xde>
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//����ʱ����
|
||
800403e: 4b27 ldr r3, [pc, #156] ; (80040dc <LCD_SetCursor+0x11c>)
|
||
8004040: 799b ldrb r3, [r3, #6]
|
||
8004042: 2b01 cmp r3, #1
|
||
8004044: d106 bne.n 8004054 <LCD_SetCursor+0x94>
|
||
8004046: 4b25 ldr r3, [pc, #148] ; (80040dc <LCD_SetCursor+0x11c>)
|
||
8004048: 881a ldrh r2, [r3, #0]
|
||
800404a: 88fb ldrh r3, [r7, #6]
|
||
800404c: 1ad3 subs r3, r2, r3
|
||
800404e: b29b uxth r3, r3
|
||
8004050: 3b01 subs r3, #1
|
||
8004052: 80fb strh r3, [r7, #6]
|
||
LCD_WR_REG(lcddev.setxcmd);
|
||
8004054: 4b21 ldr r3, [pc, #132] ; (80040dc <LCD_SetCursor+0x11c>)
|
||
8004056: 7a1b ldrb r3, [r3, #8]
|
||
8004058: b29b uxth r3, r3
|
||
800405a: 4618 mov r0, r3
|
||
800405c: f7ff fc3e bl 80038dc <LCD_WR_REG>
|
||
LCD_WR_DATA(Xpos>>8);
|
||
8004060: 88fb ldrh r3, [r7, #6]
|
||
8004062: 0a1b lsrs r3, r3, #8
|
||
8004064: b29b uxth r3, r3
|
||
8004066: 4618 mov r0, r3
|
||
8004068: f7ff fc46 bl 80038f8 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Xpos&0XFF);
|
||
800406c: 88fb ldrh r3, [r7, #6]
|
||
800406e: b2db uxtb r3, r3
|
||
8004070: b29b uxth r3, r3
|
||
8004072: 4618 mov r0, r3
|
||
8004074: f7ff fc40 bl 80038f8 <LCD_WR_DATA>
|
||
LCD_WR_REG(lcddev.setycmd);
|
||
8004078: 4b18 ldr r3, [pc, #96] ; (80040dc <LCD_SetCursor+0x11c>)
|
||
800407a: 7a5b ldrb r3, [r3, #9]
|
||
800407c: b29b uxth r3, r3
|
||
800407e: 4618 mov r0, r3
|
||
8004080: f7ff fc2c bl 80038dc <LCD_WR_REG>
|
||
LCD_WR_DATA(Ypos>>8);
|
||
8004084: 88bb ldrh r3, [r7, #4]
|
||
8004086: 0a1b lsrs r3, r3, #8
|
||
8004088: b29b uxth r3, r3
|
||
800408a: 4618 mov r0, r3
|
||
800408c: f7ff fc34 bl 80038f8 <LCD_WR_DATA>
|
||
LCD_WR_DATA(Ypos&0XFF);
|
||
8004090: 88bb ldrh r3, [r7, #4]
|
||
8004092: b2db uxtb r3, r3
|
||
8004094: b29b uxth r3, r3
|
||
8004096: 4618 mov r0, r3
|
||
8004098: f7ff fc2e bl 80038f8 <LCD_WR_DATA>
|
||
}
|
||
800409c: e01a b.n 80040d4 <LCD_SetCursor+0x114>
|
||
if(lcddev.dir==1)Xpos=lcddev.width-1-Xpos;//������ʵ���ǵ�תx,y����
|
||
800409e: 4b0f ldr r3, [pc, #60] ; (80040dc <LCD_SetCursor+0x11c>)
|
||
80040a0: 799b ldrb r3, [r3, #6]
|
||
80040a2: 2b01 cmp r3, #1
|
||
80040a4: d106 bne.n 80040b4 <LCD_SetCursor+0xf4>
|
||
80040a6: 4b0d ldr r3, [pc, #52] ; (80040dc <LCD_SetCursor+0x11c>)
|
||
80040a8: 881a ldrh r2, [r3, #0]
|
||
80040aa: 88fb ldrh r3, [r7, #6]
|
||
80040ac: 1ad3 subs r3, r2, r3
|
||
80040ae: b29b uxth r3, r3
|
||
80040b0: 3b01 subs r3, #1
|
||
80040b2: 80fb strh r3, [r7, #6]
|
||
LCD_WriteReg(lcddev.setxcmd, Xpos);
|
||
80040b4: 4b09 ldr r3, [pc, #36] ; (80040dc <LCD_SetCursor+0x11c>)
|
||
80040b6: 7a1b ldrb r3, [r3, #8]
|
||
80040b8: b29b uxth r3, r3
|
||
80040ba: 88fa ldrh r2, [r7, #6]
|
||
80040bc: 4611 mov r1, r2
|
||
80040be: 4618 mov r0, r3
|
||
80040c0: f7ff fc2a bl 8003918 <LCD_WriteReg>
|
||
LCD_WriteReg(lcddev.setycmd, Ypos);
|
||
80040c4: 4b05 ldr r3, [pc, #20] ; (80040dc <LCD_SetCursor+0x11c>)
|
||
80040c6: 7a5b ldrb r3, [r3, #9]
|
||
80040c8: b29b uxth r3, r3
|
||
80040ca: 88ba ldrh r2, [r7, #4]
|
||
80040cc: 4611 mov r1, r2
|
||
80040ce: 4618 mov r0, r3
|
||
80040d0: f7ff fc22 bl 8003918 <LCD_WriteReg>
|
||
}
|
||
80040d4: bf00 nop
|
||
80040d6: 3708 adds r7, #8
|
||
80040d8: 46bd mov sp, r7
|
||
80040da: bd80 pop {r7, pc}
|
||
80040dc: 200002a8 .word 0x200002a8
|
||
|
||
080040e0 <LCD_set_dot>:
|
||
}
|
||
//����
|
||
//x,y:����
|
||
//POINT_COLOR:�˵�����ɫ
|
||
void LCD_set_dot(uint16_t x,uint16_t y,uint16_t color)
|
||
{
|
||
80040e0: b580 push {r7, lr}
|
||
80040e2: b082 sub sp, #8
|
||
80040e4: af00 add r7, sp, #0
|
||
80040e6: 4603 mov r3, r0
|
||
80040e8: 80fb strh r3, [r7, #6]
|
||
80040ea: 460b mov r3, r1
|
||
80040ec: 80bb strh r3, [r7, #4]
|
||
80040ee: 4613 mov r3, r2
|
||
80040f0: 807b strh r3, [r7, #2]
|
||
LCD_SetCursor(x,y); //���ù���λ��
|
||
80040f2: 88ba ldrh r2, [r7, #4]
|
||
80040f4: 88fb ldrh r3, [r7, #6]
|
||
80040f6: 4611 mov r1, r2
|
||
80040f8: 4618 mov r0, r3
|
||
80040fa: f7ff ff61 bl 8003fc0 <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
80040fe: 4b06 ldr r3, [pc, #24] ; (8004118 <LCD_set_dot+0x38>)
|
||
8004100: 79da ldrb r2, [r3, #7]
|
||
8004102: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
8004106: b292 uxth r2, r2
|
||
8004108: 801a strh r2, [r3, #0]
|
||
LCD_DATA_ADDRESS=color;
|
||
800410a: 4a04 ldr r2, [pc, #16] ; (800411c <LCD_set_dot+0x3c>)
|
||
800410c: 887b ldrh r3, [r7, #2]
|
||
800410e: 8013 strh r3, [r2, #0]
|
||
}
|
||
8004110: bf00 nop
|
||
8004112: 3708 adds r7, #8
|
||
8004114: 46bd mov sp, r7
|
||
8004116: bd80 pop {r7, pc}
|
||
8004118: 200002a8 .word 0x200002a8
|
||
800411c: 6c000800 .word 0x6c000800
|
||
|
||
08004120 <LCD_Clear>:
|
||
|
||
//��������
|
||
//color:Ҫ����������ɫ
|
||
void LCD_Clear(uint16_t color)
|
||
{
|
||
8004120: b580 push {r7, lr}
|
||
8004122: b084 sub sp, #16
|
||
8004124: af00 add r7, sp, #0
|
||
8004126: 4603 mov r3, r0
|
||
8004128: 80fb strh r3, [r7, #6]
|
||
uint32_t index=0;
|
||
800412a: 2300 movs r3, #0
|
||
800412c: 60fb str r3, [r7, #12]
|
||
uint32_t totalpoint=lcddev.width;
|
||
800412e: 4b23 ldr r3, [pc, #140] ; (80041bc <LCD_Clear+0x9c>)
|
||
8004130: 881b ldrh r3, [r3, #0]
|
||
8004132: 60bb str r3, [r7, #8]
|
||
totalpoint*=lcddev.height; //�õ��ܵ���
|
||
8004134: 4b21 ldr r3, [pc, #132] ; (80041bc <LCD_Clear+0x9c>)
|
||
8004136: 885b ldrh r3, [r3, #2]
|
||
8004138: 461a mov r2, r3
|
||
800413a: 68bb ldr r3, [r7, #8]
|
||
800413c: fb02 f303 mul.w r3, r2, r3
|
||
8004140: 60bb str r3, [r7, #8]
|
||
if((lcddev.id==0X6804)&&(lcddev.dir==1))//6804������ʱ�������
|
||
8004142: 4b1e ldr r3, [pc, #120] ; (80041bc <LCD_Clear+0x9c>)
|
||
8004144: 889b ldrh r3, [r3, #4]
|
||
8004146: f646 0204 movw r2, #26628 ; 0x6804
|
||
800414a: 4293 cmp r3, r2
|
||
800414c: d11a bne.n 8004184 <LCD_Clear+0x64>
|
||
800414e: 4b1b ldr r3, [pc, #108] ; (80041bc <LCD_Clear+0x9c>)
|
||
8004150: 799b ldrb r3, [r3, #6]
|
||
8004152: 2b01 cmp r3, #1
|
||
8004154: d116 bne.n 8004184 <LCD_Clear+0x64>
|
||
{
|
||
lcddev.dir=0;
|
||
8004156: 4b19 ldr r3, [pc, #100] ; (80041bc <LCD_Clear+0x9c>)
|
||
8004158: 2200 movs r2, #0
|
||
800415a: 719a strb r2, [r3, #6]
|
||
lcddev.setxcmd=0X2A;
|
||
800415c: 4b17 ldr r3, [pc, #92] ; (80041bc <LCD_Clear+0x9c>)
|
||
800415e: 222a movs r2, #42 ; 0x2a
|
||
8004160: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2B;
|
||
8004162: 4b16 ldr r3, [pc, #88] ; (80041bc <LCD_Clear+0x9c>)
|
||
8004164: 222b movs r2, #43 ; 0x2b
|
||
8004166: 725a strb r2, [r3, #9]
|
||
LCD_SetCursor(0x00,0x0000); //���ù���λ��
|
||
8004168: 2100 movs r1, #0
|
||
800416a: 2000 movs r0, #0
|
||
800416c: f7ff ff28 bl 8003fc0 <LCD_SetCursor>
|
||
lcddev.dir=1;
|
||
8004170: 4b12 ldr r3, [pc, #72] ; (80041bc <LCD_Clear+0x9c>)
|
||
8004172: 2201 movs r2, #1
|
||
8004174: 719a strb r2, [r3, #6]
|
||
lcddev.setxcmd=0X2B;
|
||
8004176: 4b11 ldr r3, [pc, #68] ; (80041bc <LCD_Clear+0x9c>)
|
||
8004178: 222b movs r2, #43 ; 0x2b
|
||
800417a: 721a strb r2, [r3, #8]
|
||
lcddev.setycmd=0X2A;
|
||
800417c: 4b0f ldr r3, [pc, #60] ; (80041bc <LCD_Clear+0x9c>)
|
||
800417e: 222a movs r2, #42 ; 0x2a
|
||
8004180: 725a strb r2, [r3, #9]
|
||
8004182: e003 b.n 800418c <LCD_Clear+0x6c>
|
||
}else LCD_SetCursor(0x00,0x0000); //���ù���λ��
|
||
8004184: 2100 movs r1, #0
|
||
8004186: 2000 movs r0, #0
|
||
8004188: f7ff ff1a bl 8003fc0 <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
800418c: 4b0b ldr r3, [pc, #44] ; (80041bc <LCD_Clear+0x9c>)
|
||
800418e: 79da ldrb r2, [r3, #7]
|
||
8004190: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
8004194: b292 uxth r2, r2
|
||
8004196: 801a strh r2, [r3, #0]
|
||
for(index=0;index<totalpoint;index++)
|
||
8004198: 2300 movs r3, #0
|
||
800419a: 60fb str r3, [r7, #12]
|
||
800419c: e005 b.n 80041aa <LCD_Clear+0x8a>
|
||
{
|
||
LCD_DATA_ADDRESS=color;
|
||
800419e: 4a08 ldr r2, [pc, #32] ; (80041c0 <LCD_Clear+0xa0>)
|
||
80041a0: 88fb ldrh r3, [r7, #6]
|
||
80041a2: 8013 strh r3, [r2, #0]
|
||
for(index=0;index<totalpoint;index++)
|
||
80041a4: 68fb ldr r3, [r7, #12]
|
||
80041a6: 3301 adds r3, #1
|
||
80041a8: 60fb str r3, [r7, #12]
|
||
80041aa: 68fa ldr r2, [r7, #12]
|
||
80041ac: 68bb ldr r3, [r7, #8]
|
||
80041ae: 429a cmp r2, r3
|
||
80041b0: d3f5 bcc.n 800419e <LCD_Clear+0x7e>
|
||
}
|
||
}
|
||
80041b2: bf00 nop
|
||
80041b4: bf00 nop
|
||
80041b6: 3710 adds r7, #16
|
||
80041b8: 46bd mov sp, r7
|
||
80041ba: bd80 pop {r7, pc}
|
||
80041bc: 200002a8 .word 0x200002a8
|
||
80041c0: 6c000800 .word 0x6c000800
|
||
|
||
080041c4 <LCD_DrawLine>:
|
||
//***********************************2D
|
||
//����
|
||
//x1,y1:��������
|
||
//x2,y2:�յ�����
|
||
void LCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2,uint16_t color)
|
||
{
|
||
80041c4: b590 push {r4, r7, lr}
|
||
80041c6: b08d sub sp, #52 ; 0x34
|
||
80041c8: af00 add r7, sp, #0
|
||
80041ca: 4604 mov r4, r0
|
||
80041cc: 4608 mov r0, r1
|
||
80041ce: 4611 mov r1, r2
|
||
80041d0: 461a mov r2, r3
|
||
80041d2: 4623 mov r3, r4
|
||
80041d4: 80fb strh r3, [r7, #6]
|
||
80041d6: 4603 mov r3, r0
|
||
80041d8: 80bb strh r3, [r7, #4]
|
||
80041da: 460b mov r3, r1
|
||
80041dc: 807b strh r3, [r7, #2]
|
||
80041de: 4613 mov r3, r2
|
||
80041e0: 803b strh r3, [r7, #0]
|
||
uint16_t t;
|
||
int xerr=0,yerr=0,delta_x,delta_y,distance;
|
||
80041e2: 2300 movs r3, #0
|
||
80041e4: 62bb str r3, [r7, #40] ; 0x28
|
||
80041e6: 2300 movs r3, #0
|
||
80041e8: 627b str r3, [r7, #36] ; 0x24
|
||
int incx,incy,uRow,uCol;
|
||
delta_x=x2-x1; //������������
|
||
80041ea: 887a ldrh r2, [r7, #2]
|
||
80041ec: 88fb ldrh r3, [r7, #6]
|
||
80041ee: 1ad3 subs r3, r2, r3
|
||
80041f0: 623b str r3, [r7, #32]
|
||
delta_y=y2-y1;
|
||
80041f2: 883a ldrh r2, [r7, #0]
|
||
80041f4: 88bb ldrh r3, [r7, #4]
|
||
80041f6: 1ad3 subs r3, r2, r3
|
||
80041f8: 61fb str r3, [r7, #28]
|
||
uRow=x1;
|
||
80041fa: 88fb ldrh r3, [r7, #6]
|
||
80041fc: 60fb str r3, [r7, #12]
|
||
uCol=y1;
|
||
80041fe: 88bb ldrh r3, [r7, #4]
|
||
8004200: 60bb str r3, [r7, #8]
|
||
if(delta_x>0)incx=1; //���õ�������
|
||
8004202: 6a3b ldr r3, [r7, #32]
|
||
8004204: 2b00 cmp r3, #0
|
||
8004206: dd02 ble.n 800420e <LCD_DrawLine+0x4a>
|
||
8004208: 2301 movs r3, #1
|
||
800420a: 617b str r3, [r7, #20]
|
||
800420c: e00b b.n 8004226 <LCD_DrawLine+0x62>
|
||
else if(delta_x==0)incx=0;//��ֱ��
|
||
800420e: 6a3b ldr r3, [r7, #32]
|
||
8004210: 2b00 cmp r3, #0
|
||
8004212: d102 bne.n 800421a <LCD_DrawLine+0x56>
|
||
8004214: 2300 movs r3, #0
|
||
8004216: 617b str r3, [r7, #20]
|
||
8004218: e005 b.n 8004226 <LCD_DrawLine+0x62>
|
||
else {incx=-1;delta_x=-delta_x;}
|
||
800421a: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
800421e: 617b str r3, [r7, #20]
|
||
8004220: 6a3b ldr r3, [r7, #32]
|
||
8004222: 425b negs r3, r3
|
||
8004224: 623b str r3, [r7, #32]
|
||
if(delta_y>0)incy=1;
|
||
8004226: 69fb ldr r3, [r7, #28]
|
||
8004228: 2b00 cmp r3, #0
|
||
800422a: dd02 ble.n 8004232 <LCD_DrawLine+0x6e>
|
||
800422c: 2301 movs r3, #1
|
||
800422e: 613b str r3, [r7, #16]
|
||
8004230: e00b b.n 800424a <LCD_DrawLine+0x86>
|
||
else if(delta_y==0)incy=0;//ˮƽ��
|
||
8004232: 69fb ldr r3, [r7, #28]
|
||
8004234: 2b00 cmp r3, #0
|
||
8004236: d102 bne.n 800423e <LCD_DrawLine+0x7a>
|
||
8004238: 2300 movs r3, #0
|
||
800423a: 613b str r3, [r7, #16]
|
||
800423c: e005 b.n 800424a <LCD_DrawLine+0x86>
|
||
else{incy=-1;delta_y=-delta_y;}
|
||
800423e: f04f 33ff mov.w r3, #4294967295 ; 0xffffffff
|
||
8004242: 613b str r3, [r7, #16]
|
||
8004244: 69fb ldr r3, [r7, #28]
|
||
8004246: 425b negs r3, r3
|
||
8004248: 61fb str r3, [r7, #28]
|
||
if( delta_x>delta_y)distance=delta_x; //ѡȡ��������������
|
||
800424a: 6a3a ldr r2, [r7, #32]
|
||
800424c: 69fb ldr r3, [r7, #28]
|
||
800424e: 429a cmp r2, r3
|
||
8004250: dd02 ble.n 8004258 <LCD_DrawLine+0x94>
|
||
8004252: 6a3b ldr r3, [r7, #32]
|
||
8004254: 61bb str r3, [r7, #24]
|
||
8004256: e001 b.n 800425c <LCD_DrawLine+0x98>
|
||
else distance=delta_y;
|
||
8004258: 69fb ldr r3, [r7, #28]
|
||
800425a: 61bb str r3, [r7, #24]
|
||
for(t=0;t<=distance+1;t++ )//��������
|
||
800425c: 2300 movs r3, #0
|
||
800425e: 85fb strh r3, [r7, #46] ; 0x2e
|
||
8004260: e02b b.n 80042ba <LCD_DrawLine+0xf6>
|
||
{
|
||
LCD_set_dot(uRow,uCol,color);//����
|
||
8004262: 68fb ldr r3, [r7, #12]
|
||
8004264: b29b uxth r3, r3
|
||
8004266: 68ba ldr r2, [r7, #8]
|
||
8004268: b291 uxth r1, r2
|
||
800426a: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40
|
||
800426e: 4618 mov r0, r3
|
||
8004270: f7ff ff36 bl 80040e0 <LCD_set_dot>
|
||
xerr+=delta_x ;
|
||
8004274: 6aba ldr r2, [r7, #40] ; 0x28
|
||
8004276: 6a3b ldr r3, [r7, #32]
|
||
8004278: 4413 add r3, r2
|
||
800427a: 62bb str r3, [r7, #40] ; 0x28
|
||
yerr+=delta_y ;
|
||
800427c: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
800427e: 69fb ldr r3, [r7, #28]
|
||
8004280: 4413 add r3, r2
|
||
8004282: 627b str r3, [r7, #36] ; 0x24
|
||
if(xerr>distance)
|
||
8004284: 6aba ldr r2, [r7, #40] ; 0x28
|
||
8004286: 69bb ldr r3, [r7, #24]
|
||
8004288: 429a cmp r2, r3
|
||
800428a: dd07 ble.n 800429c <LCD_DrawLine+0xd8>
|
||
{
|
||
xerr-=distance;
|
||
800428c: 6aba ldr r2, [r7, #40] ; 0x28
|
||
800428e: 69bb ldr r3, [r7, #24]
|
||
8004290: 1ad3 subs r3, r2, r3
|
||
8004292: 62bb str r3, [r7, #40] ; 0x28
|
||
uRow+=incx;
|
||
8004294: 68fa ldr r2, [r7, #12]
|
||
8004296: 697b ldr r3, [r7, #20]
|
||
8004298: 4413 add r3, r2
|
||
800429a: 60fb str r3, [r7, #12]
|
||
}
|
||
if(yerr>distance)
|
||
800429c: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
800429e: 69bb ldr r3, [r7, #24]
|
||
80042a0: 429a cmp r2, r3
|
||
80042a2: dd07 ble.n 80042b4 <LCD_DrawLine+0xf0>
|
||
{
|
||
yerr-=distance;
|
||
80042a4: 6a7a ldr r2, [r7, #36] ; 0x24
|
||
80042a6: 69bb ldr r3, [r7, #24]
|
||
80042a8: 1ad3 subs r3, r2, r3
|
||
80042aa: 627b str r3, [r7, #36] ; 0x24
|
||
uCol+=incy;
|
||
80042ac: 68ba ldr r2, [r7, #8]
|
||
80042ae: 693b ldr r3, [r7, #16]
|
||
80042b0: 4413 add r3, r2
|
||
80042b2: 60bb str r3, [r7, #8]
|
||
for(t=0;t<=distance+1;t++ )//��������
|
||
80042b4: 8dfb ldrh r3, [r7, #46] ; 0x2e
|
||
80042b6: 3301 adds r3, #1
|
||
80042b8: 85fb strh r3, [r7, #46] ; 0x2e
|
||
80042ba: 8dfa ldrh r2, [r7, #46] ; 0x2e
|
||
80042bc: 69bb ldr r3, [r7, #24]
|
||
80042be: 3301 adds r3, #1
|
||
80042c0: 429a cmp r2, r3
|
||
80042c2: ddce ble.n 8004262 <LCD_DrawLine+0x9e>
|
||
}
|
||
}
|
||
}
|
||
80042c4: bf00 nop
|
||
80042c6: bf00 nop
|
||
80042c8: 3734 adds r7, #52 ; 0x34
|
||
80042ca: 46bd mov sp, r7
|
||
80042cc: bd90 pop {r4, r7, pc}
|
||
|
||
080042ce <Draw_Circle>:
|
||
|
||
//��ָ��λ�û�һ��ָ����С��Բ
|
||
//(x,y):���ĵ�
|
||
//r :�뾶
|
||
void Draw_Circle(uint16_t x0,uint16_t y0,uint16_t r,uint16_t color)
|
||
{
|
||
80042ce: b590 push {r4, r7, lr}
|
||
80042d0: b087 sub sp, #28
|
||
80042d2: af00 add r7, sp, #0
|
||
80042d4: 4604 mov r4, r0
|
||
80042d6: 4608 mov r0, r1
|
||
80042d8: 4611 mov r1, r2
|
||
80042da: 461a mov r2, r3
|
||
80042dc: 4623 mov r3, r4
|
||
80042de: 80fb strh r3, [r7, #6]
|
||
80042e0: 4603 mov r3, r0
|
||
80042e2: 80bb strh r3, [r7, #4]
|
||
80042e4: 460b mov r3, r1
|
||
80042e6: 807b strh r3, [r7, #2]
|
||
80042e8: 4613 mov r3, r2
|
||
80042ea: 803b strh r3, [r7, #0]
|
||
int a,b;
|
||
int di;
|
||
a=0;b=r;
|
||
80042ec: 2300 movs r3, #0
|
||
80042ee: 617b str r3, [r7, #20]
|
||
80042f0: 887b ldrh r3, [r7, #2]
|
||
80042f2: 613b str r3, [r7, #16]
|
||
di=3-(r<<1); //�ж��¸���λ�õı�־
|
||
80042f4: 887b ldrh r3, [r7, #2]
|
||
80042f6: 005b lsls r3, r3, #1
|
||
80042f8: f1c3 0303 rsb r3, r3, #3
|
||
80042fc: 60fb str r3, [r7, #12]
|
||
while(a<=b)
|
||
80042fe: e087 b.n 8004410 <Draw_Circle+0x142>
|
||
{
|
||
LCD_set_dot(x0+a,y0-b,color); //5
|
||
8004300: 697b ldr r3, [r7, #20]
|
||
8004302: b29a uxth r2, r3
|
||
8004304: 88fb ldrh r3, [r7, #6]
|
||
8004306: 4413 add r3, r2
|
||
8004308: b298 uxth r0, r3
|
||
800430a: 693b ldr r3, [r7, #16]
|
||
800430c: b29b uxth r3, r3
|
||
800430e: 88ba ldrh r2, [r7, #4]
|
||
8004310: 1ad3 subs r3, r2, r3
|
||
8004312: b29b uxth r3, r3
|
||
8004314: 883a ldrh r2, [r7, #0]
|
||
8004316: 4619 mov r1, r3
|
||
8004318: f7ff fee2 bl 80040e0 <LCD_set_dot>
|
||
LCD_set_dot(x0+b,y0-a,color); //0
|
||
800431c: 693b ldr r3, [r7, #16]
|
||
800431e: b29a uxth r2, r3
|
||
8004320: 88fb ldrh r3, [r7, #6]
|
||
8004322: 4413 add r3, r2
|
||
8004324: b298 uxth r0, r3
|
||
8004326: 697b ldr r3, [r7, #20]
|
||
8004328: b29b uxth r3, r3
|
||
800432a: 88ba ldrh r2, [r7, #4]
|
||
800432c: 1ad3 subs r3, r2, r3
|
||
800432e: b29b uxth r3, r3
|
||
8004330: 883a ldrh r2, [r7, #0]
|
||
8004332: 4619 mov r1, r3
|
||
8004334: f7ff fed4 bl 80040e0 <LCD_set_dot>
|
||
LCD_set_dot(x0+b,y0+a,color); //4
|
||
8004338: 693b ldr r3, [r7, #16]
|
||
800433a: b29a uxth r2, r3
|
||
800433c: 88fb ldrh r3, [r7, #6]
|
||
800433e: 4413 add r3, r2
|
||
8004340: b298 uxth r0, r3
|
||
8004342: 697b ldr r3, [r7, #20]
|
||
8004344: b29a uxth r2, r3
|
||
8004346: 88bb ldrh r3, [r7, #4]
|
||
8004348: 4413 add r3, r2
|
||
800434a: b29b uxth r3, r3
|
||
800434c: 883a ldrh r2, [r7, #0]
|
||
800434e: 4619 mov r1, r3
|
||
8004350: f7ff fec6 bl 80040e0 <LCD_set_dot>
|
||
LCD_set_dot(x0+a,y0+b,color); //6
|
||
8004354: 697b ldr r3, [r7, #20]
|
||
8004356: b29a uxth r2, r3
|
||
8004358: 88fb ldrh r3, [r7, #6]
|
||
800435a: 4413 add r3, r2
|
||
800435c: b298 uxth r0, r3
|
||
800435e: 693b ldr r3, [r7, #16]
|
||
8004360: b29a uxth r2, r3
|
||
8004362: 88bb ldrh r3, [r7, #4]
|
||
8004364: 4413 add r3, r2
|
||
8004366: b29b uxth r3, r3
|
||
8004368: 883a ldrh r2, [r7, #0]
|
||
800436a: 4619 mov r1, r3
|
||
800436c: f7ff feb8 bl 80040e0 <LCD_set_dot>
|
||
LCD_set_dot(x0-a,y0+b,color); //1
|
||
8004370: 697b ldr r3, [r7, #20]
|
||
8004372: b29b uxth r3, r3
|
||
8004374: 88fa ldrh r2, [r7, #6]
|
||
8004376: 1ad3 subs r3, r2, r3
|
||
8004378: b298 uxth r0, r3
|
||
800437a: 693b ldr r3, [r7, #16]
|
||
800437c: b29a uxth r2, r3
|
||
800437e: 88bb ldrh r3, [r7, #4]
|
||
8004380: 4413 add r3, r2
|
||
8004382: b29b uxth r3, r3
|
||
8004384: 883a ldrh r2, [r7, #0]
|
||
8004386: 4619 mov r1, r3
|
||
8004388: f7ff feaa bl 80040e0 <LCD_set_dot>
|
||
LCD_set_dot(x0-b,y0+a,color);
|
||
800438c: 693b ldr r3, [r7, #16]
|
||
800438e: b29b uxth r3, r3
|
||
8004390: 88fa ldrh r2, [r7, #6]
|
||
8004392: 1ad3 subs r3, r2, r3
|
||
8004394: b298 uxth r0, r3
|
||
8004396: 697b ldr r3, [r7, #20]
|
||
8004398: b29a uxth r2, r3
|
||
800439a: 88bb ldrh r3, [r7, #4]
|
||
800439c: 4413 add r3, r2
|
||
800439e: b29b uxth r3, r3
|
||
80043a0: 883a ldrh r2, [r7, #0]
|
||
80043a2: 4619 mov r1, r3
|
||
80043a4: f7ff fe9c bl 80040e0 <LCD_set_dot>
|
||
LCD_set_dot(x0-a,y0-b,color); //2
|
||
80043a8: 697b ldr r3, [r7, #20]
|
||
80043aa: b29b uxth r3, r3
|
||
80043ac: 88fa ldrh r2, [r7, #6]
|
||
80043ae: 1ad3 subs r3, r2, r3
|
||
80043b0: b298 uxth r0, r3
|
||
80043b2: 693b ldr r3, [r7, #16]
|
||
80043b4: b29b uxth r3, r3
|
||
80043b6: 88ba ldrh r2, [r7, #4]
|
||
80043b8: 1ad3 subs r3, r2, r3
|
||
80043ba: b29b uxth r3, r3
|
||
80043bc: 883a ldrh r2, [r7, #0]
|
||
80043be: 4619 mov r1, r3
|
||
80043c0: f7ff fe8e bl 80040e0 <LCD_set_dot>
|
||
LCD_set_dot(x0-b,y0-a,color); //7
|
||
80043c4: 693b ldr r3, [r7, #16]
|
||
80043c6: b29b uxth r3, r3
|
||
80043c8: 88fa ldrh r2, [r7, #6]
|
||
80043ca: 1ad3 subs r3, r2, r3
|
||
80043cc: b298 uxth r0, r3
|
||
80043ce: 697b ldr r3, [r7, #20]
|
||
80043d0: b29b uxth r3, r3
|
||
80043d2: 88ba ldrh r2, [r7, #4]
|
||
80043d4: 1ad3 subs r3, r2, r3
|
||
80043d6: b29b uxth r3, r3
|
||
80043d8: 883a ldrh r2, [r7, #0]
|
||
80043da: 4619 mov r1, r3
|
||
80043dc: f7ff fe80 bl 80040e0 <LCD_set_dot>
|
||
a++;
|
||
80043e0: 697b ldr r3, [r7, #20]
|
||
80043e2: 3301 adds r3, #1
|
||
80043e4: 617b str r3, [r7, #20]
|
||
//ʹ��Bresenham�㷨��Բ
|
||
if(di<0)di +=4*a+6;
|
||
80043e6: 68fb ldr r3, [r7, #12]
|
||
80043e8: 2b00 cmp r3, #0
|
||
80043ea: da06 bge.n 80043fa <Draw_Circle+0x12c>
|
||
80043ec: 697b ldr r3, [r7, #20]
|
||
80043ee: 009b lsls r3, r3, #2
|
||
80043f0: 3306 adds r3, #6
|
||
80043f2: 68fa ldr r2, [r7, #12]
|
||
80043f4: 4413 add r3, r2
|
||
80043f6: 60fb str r3, [r7, #12]
|
||
80043f8: e00a b.n 8004410 <Draw_Circle+0x142>
|
||
else
|
||
{
|
||
di+=10+4*(a-b);
|
||
80043fa: 697a ldr r2, [r7, #20]
|
||
80043fc: 693b ldr r3, [r7, #16]
|
||
80043fe: 1ad3 subs r3, r2, r3
|
||
8004400: 009b lsls r3, r3, #2
|
||
8004402: 330a adds r3, #10
|
||
8004404: 68fa ldr r2, [r7, #12]
|
||
8004406: 4413 add r3, r2
|
||
8004408: 60fb str r3, [r7, #12]
|
||
b--;
|
||
800440a: 693b ldr r3, [r7, #16]
|
||
800440c: 3b01 subs r3, #1
|
||
800440e: 613b str r3, [r7, #16]
|
||
while(a<=b)
|
||
8004410: 697a ldr r2, [r7, #20]
|
||
8004412: 693b ldr r3, [r7, #16]
|
||
8004414: 429a cmp r2, r3
|
||
8004416: f77f af73 ble.w 8004300 <Draw_Circle+0x32>
|
||
}
|
||
}
|
||
}
|
||
800441a: bf00 nop
|
||
800441c: bf00 nop
|
||
800441e: 371c adds r7, #28
|
||
8004420: 46bd mov sp, r7
|
||
8004422: bd90 pop {r4, r7, pc}
|
||
|
||
08004424 <LCD_ShowChar>:
|
||
//num:Ҫ��ʾ���ַ�:" "--->"~"
|
||
//size:������С 12/16
|
||
//mode:���ӷ�ʽ(1)���Ƿǵ��ӷ�ʽ(0)
|
||
|
||
void LCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint16_t bg,uint16_t color)
|
||
{
|
||
8004424: b590 push {r4, r7, lr}
|
||
8004426: b085 sub sp, #20
|
||
8004428: af00 add r7, sp, #0
|
||
800442a: 4604 mov r4, r0
|
||
800442c: 4608 mov r0, r1
|
||
800442e: 4611 mov r1, r2
|
||
8004430: 461a mov r2, r3
|
||
8004432: 4623 mov r3, r4
|
||
8004434: 80fb strh r3, [r7, #6]
|
||
8004436: 4603 mov r3, r0
|
||
8004438: 80bb strh r3, [r7, #4]
|
||
800443a: 460b mov r3, r1
|
||
800443c: 70fb strb r3, [r7, #3]
|
||
800443e: 4613 mov r3, r2
|
||
8004440: 70bb strb r3, [r7, #2]
|
||
uint8_t temp,t1,t;
|
||
uint16_t y0=y;
|
||
8004442: 88bb ldrh r3, [r7, #4]
|
||
8004444: 817b strh r3, [r7, #10]
|
||
|
||
//����
|
||
num=num-' ';//�õ�ƫ�ƺ���ֵ
|
||
8004446: 78fb ldrb r3, [r7, #3]
|
||
8004448: 3b20 subs r3, #32
|
||
800444a: 70fb strb r3, [r7, #3]
|
||
|
||
for(t=0;t<size;t++)
|
||
800444c: 2300 movs r3, #0
|
||
800444e: 737b strb r3, [r7, #13]
|
||
8004450: e055 b.n 80044fe <LCD_ShowChar+0xda>
|
||
{
|
||
if(size==12){temp=asc2_1206[num][t];} //����1206����
|
||
8004452: 78bb ldrb r3, [r7, #2]
|
||
8004454: 2b0c cmp r3, #12
|
||
8004456: d10b bne.n 8004470 <LCD_ShowChar+0x4c>
|
||
8004458: 78fa ldrb r2, [r7, #3]
|
||
800445a: 7b79 ldrb r1, [r7, #13]
|
||
800445c: 482c ldr r0, [pc, #176] ; (8004510 <LCD_ShowChar+0xec>)
|
||
800445e: 4613 mov r3, r2
|
||
8004460: 005b lsls r3, r3, #1
|
||
8004462: 4413 add r3, r2
|
||
8004464: 009b lsls r3, r3, #2
|
||
8004466: 4403 add r3, r0
|
||
8004468: 440b add r3, r1
|
||
800446a: 781b ldrb r3, [r3, #0]
|
||
800446c: 73fb strb r3, [r7, #15]
|
||
800446e: e007 b.n 8004480 <LCD_ShowChar+0x5c>
|
||
else{ temp=asc2_1608[num][t]; } //����1608����
|
||
8004470: 78fa ldrb r2, [r7, #3]
|
||
8004472: 7b7b ldrb r3, [r7, #13]
|
||
8004474: 4927 ldr r1, [pc, #156] ; (8004514 <LCD_ShowChar+0xf0>)
|
||
8004476: 0112 lsls r2, r2, #4
|
||
8004478: 440a add r2, r1
|
||
800447a: 4413 add r3, r2
|
||
800447c: 781b ldrb r3, [r3, #0]
|
||
800447e: 73fb strb r3, [r7, #15]
|
||
for(t1=0;t1<8;t1++)
|
||
8004480: 2300 movs r3, #0
|
||
8004482: 73bb strb r3, [r7, #14]
|
||
8004484: e033 b.n 80044ee <LCD_ShowChar+0xca>
|
||
{
|
||
if(temp&0x80){LCD_set_dot(x,y,color);}else{if(bg!=color){LCD_set_dot(x,y,bg);}}
|
||
8004486: f997 300f ldrsb.w r3, [r7, #15]
|
||
800448a: 2b00 cmp r3, #0
|
||
800448c: da06 bge.n 800449c <LCD_ShowChar+0x78>
|
||
800448e: 8cba ldrh r2, [r7, #36] ; 0x24
|
||
8004490: 88b9 ldrh r1, [r7, #4]
|
||
8004492: 88fb ldrh r3, [r7, #6]
|
||
8004494: 4618 mov r0, r3
|
||
8004496: f7ff fe23 bl 80040e0 <LCD_set_dot>
|
||
800449a: e009 b.n 80044b0 <LCD_ShowChar+0x8c>
|
||
800449c: 8c3a ldrh r2, [r7, #32]
|
||
800449e: 8cbb ldrh r3, [r7, #36] ; 0x24
|
||
80044a0: 429a cmp r2, r3
|
||
80044a2: d005 beq.n 80044b0 <LCD_ShowChar+0x8c>
|
||
80044a4: 8c3a ldrh r2, [r7, #32]
|
||
80044a6: 88b9 ldrh r1, [r7, #4]
|
||
80044a8: 88fb ldrh r3, [r7, #6]
|
||
80044aa: 4618 mov r0, r3
|
||
80044ac: f7ff fe18 bl 80040e0 <LCD_set_dot>
|
||
temp<<=1;
|
||
80044b0: 7bfb ldrb r3, [r7, #15]
|
||
80044b2: 005b lsls r3, r3, #1
|
||
80044b4: 73fb strb r3, [r7, #15]
|
||
y++;
|
||
80044b6: 88bb ldrh r3, [r7, #4]
|
||
80044b8: 3301 adds r3, #1
|
||
80044ba: 80bb strh r3, [r7, #4]
|
||
if(x>=lcddev.width){return;}//��������
|
||
80044bc: 4b16 ldr r3, [pc, #88] ; (8004518 <LCD_ShowChar+0xf4>)
|
||
80044be: 881b ldrh r3, [r3, #0]
|
||
80044c0: 88fa ldrh r2, [r7, #6]
|
||
80044c2: 429a cmp r2, r3
|
||
80044c4: d220 bcs.n 8004508 <LCD_ShowChar+0xe4>
|
||
if((y-y0)==size)
|
||
80044c6: 88ba ldrh r2, [r7, #4]
|
||
80044c8: 897b ldrh r3, [r7, #10]
|
||
80044ca: 1ad2 subs r2, r2, r3
|
||
80044cc: 78bb ldrb r3, [r7, #2]
|
||
80044ce: 429a cmp r2, r3
|
||
80044d0: d10a bne.n 80044e8 <LCD_ShowChar+0xc4>
|
||
{
|
||
y=y0;
|
||
80044d2: 897b ldrh r3, [r7, #10]
|
||
80044d4: 80bb strh r3, [r7, #4]
|
||
x++;
|
||
80044d6: 88fb ldrh r3, [r7, #6]
|
||
80044d8: 3301 adds r3, #1
|
||
80044da: 80fb strh r3, [r7, #6]
|
||
if(x>=lcddev.width){return;}//��������
|
||
80044dc: 4b0e ldr r3, [pc, #56] ; (8004518 <LCD_ShowChar+0xf4>)
|
||
80044de: 881b ldrh r3, [r3, #0]
|
||
80044e0: 88fa ldrh r2, [r7, #6]
|
||
80044e2: 429a cmp r2, r3
|
||
80044e4: d307 bcc.n 80044f6 <LCD_ShowChar+0xd2>
|
||
80044e6: e010 b.n 800450a <LCD_ShowChar+0xe6>
|
||
for(t1=0;t1<8;t1++)
|
||
80044e8: 7bbb ldrb r3, [r7, #14]
|
||
80044ea: 3301 adds r3, #1
|
||
80044ec: 73bb strb r3, [r7, #14]
|
||
80044ee: 7bbb ldrb r3, [r7, #14]
|
||
80044f0: 2b07 cmp r3, #7
|
||
80044f2: d9c8 bls.n 8004486 <LCD_ShowChar+0x62>
|
||
80044f4: e000 b.n 80044f8 <LCD_ShowChar+0xd4>
|
||
break;
|
||
80044f6: bf00 nop
|
||
for(t=0;t<size;t++)
|
||
80044f8: 7b7b ldrb r3, [r7, #13]
|
||
80044fa: 3301 adds r3, #1
|
||
80044fc: 737b strb r3, [r7, #13]
|
||
80044fe: 7b7a ldrb r2, [r7, #13]
|
||
8004500: 78bb ldrb r3, [r7, #2]
|
||
8004502: 429a cmp r2, r3
|
||
8004504: d3a5 bcc.n 8004452 <LCD_ShowChar+0x2e>
|
||
8004506: e000 b.n 800450a <LCD_ShowChar+0xe6>
|
||
if(x>=lcddev.width){return;}//��������
|
||
8004508: bf00 nop
|
||
}
|
||
}
|
||
|
||
|
||
|
||
}
|
||
800450a: 3714 adds r7, #20
|
||
800450c: 46bd mov sp, r7
|
||
800450e: bd90 pop {r4, r7, pc}
|
||
8004510: 080089e4 .word 0x080089e4
|
||
8004514: 08008e58 .word 0x08008e58
|
||
8004518: 200002a8 .word 0x200002a8
|
||
|
||
0800451c <LCD_ShowString>:
|
||
//width,height:������С
|
||
//size:������С
|
||
//*p:�ַ�����ʼ��ַ
|
||
|
||
void LCD_ShowString(uint16_t x,uint16_t y,uint8_t *p,uint8_t size,uint16_t bg,uint16_t color)
|
||
{
|
||
800451c: b590 push {r4, r7, lr}
|
||
800451e: b087 sub sp, #28
|
||
8004520: af02 add r7, sp, #8
|
||
8004522: 60ba str r2, [r7, #8]
|
||
8004524: 461a mov r2, r3
|
||
8004526: 4603 mov r3, r0
|
||
8004528: 81fb strh r3, [r7, #14]
|
||
800452a: 460b mov r3, r1
|
||
800452c: 81bb strh r3, [r7, #12]
|
||
800452e: 4613 mov r3, r2
|
||
8004530: 71fb strb r3, [r7, #7]
|
||
while(*p!='\0')
|
||
8004532: e026 b.n 8004582 <LCD_ShowString+0x66>
|
||
{
|
||
|
||
if(x>=lcddev.width||*p=='\n')
|
||
8004534: 4b17 ldr r3, [pc, #92] ; (8004594 <LCD_ShowString+0x78>)
|
||
8004536: 881b ldrh r3, [r3, #0]
|
||
8004538: 89fa ldrh r2, [r7, #14]
|
||
800453a: 429a cmp r2, r3
|
||
800453c: d203 bcs.n 8004546 <LCD_ShowString+0x2a>
|
||
800453e: 68bb ldr r3, [r7, #8]
|
||
8004540: 781b ldrb r3, [r3, #0]
|
||
8004542: 2b0a cmp r3, #10
|
||
8004544: d107 bne.n 8004556 <LCD_ShowString+0x3a>
|
||
{
|
||
x=0;
|
||
8004546: 2300 movs r3, #0
|
||
8004548: 81fb strh r3, [r7, #14]
|
||
y+=size;
|
||
800454a: 79fb ldrb r3, [r7, #7]
|
||
800454c: b29a uxth r2, r3
|
||
800454e: 89bb ldrh r3, [r7, #12]
|
||
8004550: 4413 add r3, r2
|
||
8004552: 81bb strh r3, [r7, #12]
|
||
8004554: e012 b.n 800457c <LCD_ShowString+0x60>
|
||
}else
|
||
{
|
||
LCD_ShowChar(x,y,*p,size,bg,color);
|
||
8004556: 68bb ldr r3, [r7, #8]
|
||
8004558: 781a ldrb r2, [r3, #0]
|
||
800455a: 79fc ldrb r4, [r7, #7]
|
||
800455c: 89b9 ldrh r1, [r7, #12]
|
||
800455e: 89f8 ldrh r0, [r7, #14]
|
||
8004560: 8cbb ldrh r3, [r7, #36] ; 0x24
|
||
8004562: 9301 str r3, [sp, #4]
|
||
8004564: 8c3b ldrh r3, [r7, #32]
|
||
8004566: 9300 str r3, [sp, #0]
|
||
8004568: 4623 mov r3, r4
|
||
800456a: f7ff ff5b bl 8004424 <LCD_ShowChar>
|
||
x+=(size/2);
|
||
800456e: 79fb ldrb r3, [r7, #7]
|
||
8004570: 085b lsrs r3, r3, #1
|
||
8004572: b2db uxtb r3, r3
|
||
8004574: b29a uxth r2, r3
|
||
8004576: 89fb ldrh r3, [r7, #14]
|
||
8004578: 4413 add r3, r2
|
||
800457a: 81fb strh r3, [r7, #14]
|
||
}
|
||
p++;
|
||
800457c: 68bb ldr r3, [r7, #8]
|
||
800457e: 3301 adds r3, #1
|
||
8004580: 60bb str r3, [r7, #8]
|
||
while(*p!='\0')
|
||
8004582: 68bb ldr r3, [r7, #8]
|
||
8004584: 781b ldrb r3, [r3, #0]
|
||
8004586: 2b00 cmp r3, #0
|
||
8004588: d1d4 bne.n 8004534 <LCD_ShowString+0x18>
|
||
|
||
}
|
||
}
|
||
800458a: bf00 nop
|
||
800458c: bf00 nop
|
||
800458e: 3714 adds r7, #20
|
||
8004590: 46bd mov sp, r7
|
||
8004592: bd90 pop {r4, r7, pc}
|
||
8004594: 200002a8 .word 0x200002a8
|
||
|
||
08004598 <EPPROM_SLOWWRITE_INIT>:
|
||
//��ΪeepromоƬ��д���ٶ����ޣ�ÿд��һ���ַ�����Ҫ�ȴ�һ��ʱ����������д��
|
||
//����ϵͳ�����ܵ���һ���ģ���ͳ�Ľ�����������ʹ�ö�ʱ���жϻ��߶��߳̿����������ں�̨���棬
|
||
//�����Ľ���������ʹ��״̬����ͨ��һ��������Ҫ���������ݴ���������ͨ��״̬ѭ��һ�������棬������ʱ����ѭ����ʱ��
|
||
eeprom_write_buff_info eeprom_write_buffer; //��������
|
||
void EPPROM_SLOWWRITE_INIT() //��ʼ������
|
||
{
|
||
8004598: b480 push {r7}
|
||
800459a: af00 add r7, sp, #0
|
||
eeprom_write_buffer.buff=NULL;
|
||
800459c: 4b0a ldr r3, [pc, #40] ; (80045c8 <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
800459e: 2200 movs r2, #0
|
||
80045a0: 601a str r2, [r3, #0]
|
||
eeprom_write_buffer.end=NULL;
|
||
80045a2: 4b09 ldr r3, [pc, #36] ; (80045c8 <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
80045a4: 2200 movs r2, #0
|
||
80045a6: 609a str r2, [r3, #8]
|
||
eeprom_write_buffer.head=NULL;
|
||
80045a8: 4b07 ldr r3, [pc, #28] ; (80045c8 <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
80045aa: 2200 movs r2, #0
|
||
80045ac: 605a str r2, [r3, #4]
|
||
eeprom_write_buffer.save_timeout=5; //����״̬��ѭ�����쵼�µı���ʧ�ܣ�������������ʱ�����о�û��Ҫд�����̫�˷ѿռ��ˣ�
|
||
80045ae: 4b06 ldr r3, [pc, #24] ; (80045c8 <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
80045b0: 2205 movs r2, #5
|
||
80045b2: 741a strb r2, [r3, #16]
|
||
eeprom_write_buffer.save_busy=0; //��С��ʱ��Ϊæ״̬
|
||
80045b4: 4a04 ldr r2, [pc, #16] ; (80045c8 <EPPROM_SLOWWRITE_INIT+0x30>)
|
||
80045b6: 7c53 ldrb r3, [r2, #17]
|
||
80045b8: f36f 0300 bfc r3, #0, #1
|
||
80045bc: 7453 strb r3, [r2, #17]
|
||
}
|
||
80045be: bf00 nop
|
||
80045c0: 46bd mov sp, r7
|
||
80045c2: bc80 pop {r7}
|
||
80045c4: 4770 bx lr
|
||
80045c6: bf00 nop
|
||
80045c8: 200002b4 .word 0x200002b4
|
||
|
||
080045cc <EEPROM_SLOWWRITE_SERVER>:
|
||
|
||
//ѭ����������������ͷ�Ƿ��������Ƿ�æ��
|
||
void EEPROM_SLOWWRITE_SERVER()
|
||
{
|
||
80045cc: b580 push {r7, lr}
|
||
80045ce: b082 sub sp, #8
|
||
80045d0: af00 add r7, sp, #0
|
||
eeprom_write_buff *buff;
|
||
char data;
|
||
if(eeprom_write_buffer.save_busy)
|
||
80045d2: 4b20 ldr r3, [pc, #128] ; (8004654 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
80045d4: 7c5b ldrb r3, [r3, #17]
|
||
80045d6: f003 0301 and.w r3, r3, #1
|
||
80045da: b2db uxtb r3, r3
|
||
80045dc: 2b00 cmp r3, #0
|
||
80045de: d00c beq.n 80045fa <EEPROM_SLOWWRITE_SERVER+0x2e>
|
||
{
|
||
if(HAL_GetTick()>eeprom_write_buffer.save_time)
|
||
80045e0: f7fd f97c bl 80018dc <HAL_GetTick>
|
||
80045e4: 4602 mov r2, r0
|
||
80045e6: 4b1b ldr r3, [pc, #108] ; (8004654 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
80045e8: 68db ldr r3, [r3, #12]
|
||
80045ea: 429a cmp r2, r3
|
||
80045ec: d92e bls.n 800464c <EEPROM_SLOWWRITE_SERVER+0x80>
|
||
{
|
||
eeprom_write_buffer.save_busy=0;
|
||
80045ee: 4a19 ldr r2, [pc, #100] ; (8004654 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
80045f0: 7c53 ldrb r3, [r2, #17]
|
||
80045f2: f36f 0300 bfc r3, #0, #1
|
||
80045f6: 7453 strb r3, [r2, #17]
|
||
free(eeprom_write_buffer.head);
|
||
eeprom_write_buffer.head=buff;
|
||
}
|
||
|
||
}
|
||
}
|
||
80045f8: e028 b.n 800464c <EEPROM_SLOWWRITE_SERVER+0x80>
|
||
if(eeprom_write_buffer.head!=NULL)
|
||
80045fa: 4b16 ldr r3, [pc, #88] ; (8004654 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
80045fc: 685b ldr r3, [r3, #4]
|
||
80045fe: 2b00 cmp r3, #0
|
||
8004600: d024 beq.n 800464c <EEPROM_SLOWWRITE_SERVER+0x80>
|
||
eeprom_write_buffer.save_busy=1;
|
||
8004602: 4a14 ldr r2, [pc, #80] ; (8004654 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004604: 7c53 ldrb r3, [r2, #17]
|
||
8004606: f043 0301 orr.w r3, r3, #1
|
||
800460a: 7453 strb r3, [r2, #17]
|
||
eeprom_write_buffer.save_time=HAL_GetTick()+eeprom_write_buffer.save_timeout;
|
||
800460c: f7fd f966 bl 80018dc <HAL_GetTick>
|
||
8004610: 4603 mov r3, r0
|
||
8004612: 4a10 ldr r2, [pc, #64] ; (8004654 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004614: 7c12 ldrb r2, [r2, #16]
|
||
8004616: 4413 add r3, r2
|
||
8004618: 4a0e ldr r2, [pc, #56] ; (8004654 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
800461a: 60d3 str r3, [r2, #12]
|
||
buff=eeprom_write_buffer.head->next;
|
||
800461c: 4b0d ldr r3, [pc, #52] ; (8004654 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
800461e: 685b ldr r3, [r3, #4]
|
||
8004620: 681b ldr r3, [r3, #0]
|
||
8004622: 607b str r3, [r7, #4]
|
||
data=eeprom_write_buffer.head->date;
|
||
8004624: 4b0b ldr r3, [pc, #44] ; (8004654 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004626: 685b ldr r3, [r3, #4]
|
||
8004628: 799b ldrb r3, [r3, #6]
|
||
800462a: 70fb strb r3, [r7, #3]
|
||
IIC_SAND_DATE(EEPROM_ADDRESS,eeprom_write_buffer.head->add,&data,1);
|
||
800462c: 4b09 ldr r3, [pc, #36] ; (8004654 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
800462e: 685b ldr r3, [r3, #4]
|
||
8004630: 8899 ldrh r1, [r3, #4]
|
||
8004632: 1cfa adds r2, r7, #3
|
||
8004634: 2301 movs r3, #1
|
||
8004636: 20a0 movs r0, #160 ; 0xa0
|
||
8004638: f000 f866 bl 8004708 <IIC_SAND_DATE>
|
||
free(eeprom_write_buffer.head);
|
||
800463c: 4b05 ldr r3, [pc, #20] ; (8004654 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
800463e: 685b ldr r3, [r3, #4]
|
||
8004640: 4618 mov r0, r3
|
||
8004642: f001 fa9d bl 8005b80 <free>
|
||
eeprom_write_buffer.head=buff;
|
||
8004646: 4a03 ldr r2, [pc, #12] ; (8004654 <EEPROM_SLOWWRITE_SERVER+0x88>)
|
||
8004648: 687b ldr r3, [r7, #4]
|
||
800464a: 6053 str r3, [r2, #4]
|
||
}
|
||
800464c: bf00 nop
|
||
800464e: 3708 adds r7, #8
|
||
8004650: 46bd mov sp, r7
|
||
8004652: bd80 pop {r7, pc}
|
||
8004654: 200002b4 .word 0x200002b4
|
||
|
||
08004658 <EEPROM_READ_BATY>:
|
||
|
||
//��eeprom��ȡ����
|
||
void EEPROM_READ_BATY(uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG)
|
||
{
|
||
8004658: b580 push {r7, lr}
|
||
800465a: b082 sub sp, #8
|
||
800465c: af00 add r7, sp, #0
|
||
800465e: 4603 mov r3, r0
|
||
8004660: 6039 str r1, [r7, #0]
|
||
8004662: 80fb strh r3, [r7, #6]
|
||
8004664: 4613 mov r3, r2
|
||
8004666: 80bb strh r3, [r7, #4]
|
||
IIC_READ_DATE(EEPROM_ADDRESS,IN_DEVICE_ADD,DATAS,LONG);
|
||
8004668: 88bb ldrh r3, [r7, #4]
|
||
800466a: 88f9 ldrh r1, [r7, #6]
|
||
800466c: 683a ldr r2, [r7, #0]
|
||
800466e: 20a0 movs r0, #160 ; 0xa0
|
||
8004670: f000 f868 bl 8004744 <IIC_READ_DATE>
|
||
}
|
||
8004674: bf00 nop
|
||
8004676: 3708 adds r7, #8
|
||
8004678: 46bd mov sp, r7
|
||
800467a: bd80 pop {r7, pc}
|
||
|
||
0800467c <EEPROM_WRITE_BATY>:
|
||
//��eeprom�����
|
||
void EEPROM_WRITE_BATY(uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG)
|
||
{
|
||
800467c: b580 push {r7, lr}
|
||
800467e: b086 sub sp, #24
|
||
8004680: af00 add r7, sp, #0
|
||
8004682: 4603 mov r3, r0
|
||
8004684: 6039 str r1, [r7, #0]
|
||
8004686: 80fb strh r3, [r7, #6]
|
||
8004688: 4613 mov r3, r2
|
||
800468a: 80bb strh r3, [r7, #4]
|
||
//IIC_SAND_DATE(EEPROM_ADDRESS,IN_DEVICE_ADD,DATAS,LONG);
|
||
uint16_t addoffset=0;
|
||
800468c: 2300 movs r3, #0
|
||
800468e: 82fb strh r3, [r7, #22]
|
||
|
||
|
||
eeprom_write_buff *buff;
|
||
eeprom_write_buff *buff2;
|
||
while(LONG--)
|
||
8004690: e02d b.n 80046ee <EEPROM_WRITE_BATY+0x72>
|
||
{
|
||
buff =(eeprom_write_buff*)malloc(sizeof(eeprom_write_buff));
|
||
8004692: 2008 movs r0, #8
|
||
8004694: f001 fa6c bl 8005b70 <malloc>
|
||
8004698: 4603 mov r3, r0
|
||
800469a: 613b str r3, [r7, #16]
|
||
if(buff!=NULL)
|
||
800469c: 693b ldr r3, [r7, #16]
|
||
800469e: 2b00 cmp r3, #0
|
||
80046a0: d02b beq.n 80046fa <EEPROM_WRITE_BATY+0x7e>
|
||
{
|
||
buff->add=IN_DEVICE_ADD+addoffset;
|
||
80046a2: 88fa ldrh r2, [r7, #6]
|
||
80046a4: 8afb ldrh r3, [r7, #22]
|
||
80046a6: 4413 add r3, r2
|
||
80046a8: b29a uxth r2, r3
|
||
80046aa: 693b ldr r3, [r7, #16]
|
||
80046ac: 809a strh r2, [r3, #4]
|
||
buff->date=DATAS[addoffset];
|
||
80046ae: 8afb ldrh r3, [r7, #22]
|
||
80046b0: 683a ldr r2, [r7, #0]
|
||
80046b2: 4413 add r3, r2
|
||
80046b4: 781a ldrb r2, [r3, #0]
|
||
80046b6: 693b ldr r3, [r7, #16]
|
||
80046b8: 719a strb r2, [r3, #6]
|
||
buff->next=NULL;
|
||
80046ba: 693b ldr r3, [r7, #16]
|
||
80046bc: 2200 movs r2, #0
|
||
80046be: 601a str r2, [r3, #0]
|
||
}else{return ;}
|
||
if(eeprom_write_buffer.head==NULL)
|
||
80046c0: 4b10 ldr r3, [pc, #64] ; (8004704 <EEPROM_WRITE_BATY+0x88>)
|
||
80046c2: 685b ldr r3, [r3, #4]
|
||
80046c4: 2b00 cmp r3, #0
|
||
80046c6: d106 bne.n 80046d6 <EEPROM_WRITE_BATY+0x5a>
|
||
{
|
||
eeprom_write_buffer.head=buff;
|
||
80046c8: 4a0e ldr r2, [pc, #56] ; (8004704 <EEPROM_WRITE_BATY+0x88>)
|
||
80046ca: 693b ldr r3, [r7, #16]
|
||
80046cc: 6053 str r3, [r2, #4]
|
||
eeprom_write_buffer.end=buff;
|
||
80046ce: 4a0d ldr r2, [pc, #52] ; (8004704 <EEPROM_WRITE_BATY+0x88>)
|
||
80046d0: 693b ldr r3, [r7, #16]
|
||
80046d2: 6093 str r3, [r2, #8]
|
||
80046d4: e008 b.n 80046e8 <EEPROM_WRITE_BATY+0x6c>
|
||
}else
|
||
{
|
||
buff2=eeprom_write_buffer.end;
|
||
80046d6: 4b0b ldr r3, [pc, #44] ; (8004704 <EEPROM_WRITE_BATY+0x88>)
|
||
80046d8: 689b ldr r3, [r3, #8]
|
||
80046da: 60fb str r3, [r7, #12]
|
||
buff2->next=buff;
|
||
80046dc: 68fb ldr r3, [r7, #12]
|
||
80046de: 693a ldr r2, [r7, #16]
|
||
80046e0: 601a str r2, [r3, #0]
|
||
eeprom_write_buffer.end=buff;
|
||
80046e2: 4a08 ldr r2, [pc, #32] ; (8004704 <EEPROM_WRITE_BATY+0x88>)
|
||
80046e4: 693b ldr r3, [r7, #16]
|
||
80046e6: 6093 str r3, [r2, #8]
|
||
}
|
||
addoffset++;
|
||
80046e8: 8afb ldrh r3, [r7, #22]
|
||
80046ea: 3301 adds r3, #1
|
||
80046ec: 82fb strh r3, [r7, #22]
|
||
while(LONG--)
|
||
80046ee: 88bb ldrh r3, [r7, #4]
|
||
80046f0: 1e5a subs r2, r3, #1
|
||
80046f2: 80ba strh r2, [r7, #4]
|
||
80046f4: 2b00 cmp r3, #0
|
||
80046f6: d1cc bne.n 8004692 <EEPROM_WRITE_BATY+0x16>
|
||
80046f8: e000 b.n 80046fc <EEPROM_WRITE_BATY+0x80>
|
||
}else{return ;}
|
||
80046fa: bf00 nop
|
||
}
|
||
|
||
}
|
||
80046fc: 3718 adds r7, #24
|
||
80046fe: 46bd mov sp, r7
|
||
8004700: bd80 pop {r7, pc}
|
||
8004702: bf00 nop
|
||
8004704: 200002b4 .word 0x200002b4
|
||
|
||
08004708 <IIC_SAND_DATE>:
|
||
|
||
//iicӲ���ӿ�
|
||
extern I2C_HandleTypeDef hi2c2;
|
||
|
||
void IIC_SAND_DATE(uint16_t DEVICE_ADD,uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG)
|
||
{
|
||
8004708: b580 push {r7, lr}
|
||
800470a: b088 sub sp, #32
|
||
800470c: af04 add r7, sp, #16
|
||
800470e: 60ba str r2, [r7, #8]
|
||
8004710: 461a mov r2, r3
|
||
8004712: 4603 mov r3, r0
|
||
8004714: 81fb strh r3, [r7, #14]
|
||
8004716: 460b mov r3, r1
|
||
8004718: 81bb strh r3, [r7, #12]
|
||
800471a: 4613 mov r3, r2
|
||
800471c: 80fb strh r3, [r7, #6]
|
||
HAL_I2C_Mem_Write(&hi2c2,DEVICE_ADD,IN_DEVICE_ADD,I2C_MEMADD_SIZE_8BIT,DATAS,LONG,100);
|
||
800471e: 89ba ldrh r2, [r7, #12]
|
||
8004720: 89f9 ldrh r1, [r7, #14]
|
||
8004722: 2364 movs r3, #100 ; 0x64
|
||
8004724: 9302 str r3, [sp, #8]
|
||
8004726: 88fb ldrh r3, [r7, #6]
|
||
8004728: 9301 str r3, [sp, #4]
|
||
800472a: 68bb ldr r3, [r7, #8]
|
||
800472c: 9300 str r3, [sp, #0]
|
||
800472e: 2301 movs r3, #1
|
||
8004730: 4803 ldr r0, [pc, #12] ; (8004740 <IIC_SAND_DATE+0x38>)
|
||
8004732: f7fd fced bl 8002110 <HAL_I2C_Mem_Write>
|
||
}
|
||
8004736: bf00 nop
|
||
8004738: 3710 adds r7, #16
|
||
800473a: 46bd mov sp, r7
|
||
800473c: bd80 pop {r7, pc}
|
||
800473e: bf00 nop
|
||
8004740: 20000208 .word 0x20000208
|
||
|
||
08004744 <IIC_READ_DATE>:
|
||
|
||
void IIC_READ_DATE(uint16_t DEVICE_ADD,uint16_t IN_DEVICE_ADD,char *DATAS,uint16_t LONG)
|
||
{
|
||
8004744: b580 push {r7, lr}
|
||
8004746: b088 sub sp, #32
|
||
8004748: af04 add r7, sp, #16
|
||
800474a: 60ba str r2, [r7, #8]
|
||
800474c: 461a mov r2, r3
|
||
800474e: 4603 mov r3, r0
|
||
8004750: 81fb strh r3, [r7, #14]
|
||
8004752: 460b mov r3, r1
|
||
8004754: 81bb strh r3, [r7, #12]
|
||
8004756: 4613 mov r3, r2
|
||
8004758: 80fb strh r3, [r7, #6]
|
||
HAL_I2C_Mem_Read(&hi2c2,DEVICE_ADD,IN_DEVICE_ADD,I2C_MEMADD_SIZE_8BIT,DATAS,LONG,100);
|
||
800475a: 89ba ldrh r2, [r7, #12]
|
||
800475c: 89f9 ldrh r1, [r7, #14]
|
||
800475e: 2364 movs r3, #100 ; 0x64
|
||
8004760: 9302 str r3, [sp, #8]
|
||
8004762: 88fb ldrh r3, [r7, #6]
|
||
8004764: 9301 str r3, [sp, #4]
|
||
8004766: 68bb ldr r3, [r7, #8]
|
||
8004768: 9300 str r3, [sp, #0]
|
||
800476a: 2301 movs r3, #1
|
||
800476c: 4803 ldr r0, [pc, #12] ; (800477c <IIC_READ_DATE+0x38>)
|
||
800476e: f7fd fdc9 bl 8002304 <HAL_I2C_Mem_Read>
|
||
}
|
||
8004772: bf00 nop
|
||
8004774: 3710 adds r7, #16
|
||
8004776: 46bd mov sp, r7
|
||
8004778: bd80 pop {r7, pc}
|
||
800477a: bf00 nop
|
||
800477c: 20000208 .word 0x20000208
|
||
|
||
08004780 <TP_Write_Byte>:
|
||
|
||
//SPI���
|
||
//��������IC�1byte����
|
||
//num:Ҫд��������
|
||
void TP_Write_Byte(char num)
|
||
{
|
||
8004780: b580 push {r7, lr}
|
||
8004782: b084 sub sp, #16
|
||
8004784: af00 add r7, sp, #0
|
||
8004786: 4603 mov r3, r0
|
||
8004788: 71fb strb r3, [r7, #7]
|
||
for(uint8_t count=0;count<8;count++)
|
||
800478a: 2300 movs r3, #0
|
||
800478c: 73fb strb r3, [r7, #15]
|
||
800478e: e020 b.n 80047d2 <TP_Write_Byte+0x52>
|
||
{
|
||
if(num&0x80){TDIN(1);}
|
||
8004790: f997 3007 ldrsb.w r3, [r7, #7]
|
||
8004794: 2b00 cmp r3, #0
|
||
8004796: da06 bge.n 80047a6 <TP_Write_Byte+0x26>
|
||
8004798: 2201 movs r2, #1
|
||
800479a: f44f 7100 mov.w r1, #512 ; 0x200
|
||
800479e: 4811 ldr r0, [pc, #68] ; (80047e4 <TP_Write_Byte+0x64>)
|
||
80047a0: f7fd fb59 bl 8001e56 <HAL_GPIO_WritePin>
|
||
80047a4: e005 b.n 80047b2 <TP_Write_Byte+0x32>
|
||
else {TDIN(0);}
|
||
80047a6: 2200 movs r2, #0
|
||
80047a8: f44f 7100 mov.w r1, #512 ; 0x200
|
||
80047ac: 480d ldr r0, [pc, #52] ; (80047e4 <TP_Write_Byte+0x64>)
|
||
80047ae: f7fd fb52 bl 8001e56 <HAL_GPIO_WritePin>
|
||
num<<=1;
|
||
80047b2: 79fb ldrb r3, [r7, #7]
|
||
80047b4: 005b lsls r3, r3, #1
|
||
80047b6: 71fb strb r3, [r7, #7]
|
||
TCLK(0);
|
||
80047b8: 2200 movs r2, #0
|
||
80047ba: 2102 movs r1, #2
|
||
80047bc: 480a ldr r0, [pc, #40] ; (80047e8 <TP_Write_Byte+0x68>)
|
||
80047be: f7fd fb4a bl 8001e56 <HAL_GPIO_WritePin>
|
||
TCLK(1); //��������Ч
|
||
80047c2: 2201 movs r2, #1
|
||
80047c4: 2102 movs r1, #2
|
||
80047c6: 4808 ldr r0, [pc, #32] ; (80047e8 <TP_Write_Byte+0x68>)
|
||
80047c8: f7fd fb45 bl 8001e56 <HAL_GPIO_WritePin>
|
||
for(uint8_t count=0;count<8;count++)
|
||
80047cc: 7bfb ldrb r3, [r7, #15]
|
||
80047ce: 3301 adds r3, #1
|
||
80047d0: 73fb strb r3, [r7, #15]
|
||
80047d2: 7bfb ldrb r3, [r7, #15]
|
||
80047d4: 2b07 cmp r3, #7
|
||
80047d6: d9db bls.n 8004790 <TP_Write_Byte+0x10>
|
||
}
|
||
}
|
||
80047d8: bf00 nop
|
||
80047da: bf00 nop
|
||
80047dc: 3710 adds r7, #16
|
||
80047de: 46bd mov sp, r7
|
||
80047e0: bd80 pop {r7, pc}
|
||
80047e2: bf00 nop
|
||
80047e4: 40011c00 .word 0x40011c00
|
||
80047e8: 40010c00 .word 0x40010c00
|
||
|
||
080047ec <TP_Read_AD>:
|
||
//SPI������
|
||
//�Ӵ�����IC��ȡadcֵ
|
||
//CMD:ָ��
|
||
//����ֵ:����������
|
||
uint16_t TP_Read_AD(char CMD)
|
||
{
|
||
80047ec: b580 push {r7, lr}
|
||
80047ee: b084 sub sp, #16
|
||
80047f0: af00 add r7, sp, #0
|
||
80047f2: 4603 mov r3, r0
|
||
80047f4: 71fb strb r3, [r7, #7]
|
||
uint16_t Num=0;
|
||
80047f6: 2300 movs r3, #0
|
||
80047f8: 81fb strh r3, [r7, #14]
|
||
TCLK(0); //������ʱ��
|
||
80047fa: 2200 movs r2, #0
|
||
80047fc: 2102 movs r1, #2
|
||
80047fe: 482b ldr r0, [pc, #172] ; (80048ac <TP_Read_AD+0xc0>)
|
||
8004800: f7fd fb29 bl 8001e56 <HAL_GPIO_WritePin>
|
||
TDIN(0); //����������
|
||
8004804: 2200 movs r2, #0
|
||
8004806: f44f 7100 mov.w r1, #512 ; 0x200
|
||
800480a: 4829 ldr r0, [pc, #164] ; (80048b0 <TP_Read_AD+0xc4>)
|
||
800480c: f7fd fb23 bl 8001e56 <HAL_GPIO_WritePin>
|
||
TCS(0); //ѡ�д�����IC
|
||
8004810: 2200 movs r2, #0
|
||
8004812: 2104 movs r1, #4
|
||
8004814: 4825 ldr r0, [pc, #148] ; (80048ac <TP_Read_AD+0xc0>)
|
||
8004816: f7fd fb1e bl 8001e56 <HAL_GPIO_WritePin>
|
||
TP_Write_Byte(CMD);//����������
|
||
800481a: 79fb ldrb r3, [r7, #7]
|
||
800481c: 4618 mov r0, r3
|
||
800481e: f7ff ffaf bl 8004780 <TP_Write_Byte>
|
||
HAL_GetTick(); //����ʱ��adת����Ҫʱ��
|
||
8004822: f7fd f85b bl 80018dc <HAL_GetTick>
|
||
HAL_GetTick();
|
||
8004826: f7fd f859 bl 80018dc <HAL_GetTick>
|
||
HAL_GetTick();
|
||
800482a: f7fd f857 bl 80018dc <HAL_GetTick>
|
||
HAL_GetTick();
|
||
800482e: f7fd f855 bl 80018dc <HAL_GetTick>
|
||
HAL_GetTick();
|
||
8004832: f7fd f853 bl 80018dc <HAL_GetTick>
|
||
HAL_GetTick();
|
||
8004836: f7fd f851 bl 80018dc <HAL_GetTick>
|
||
TCLK(1); //��1��ʱ�ӣ�����BUSY
|
||
800483a: 2201 movs r2, #1
|
||
800483c: 2102 movs r1, #2
|
||
800483e: 481b ldr r0, [pc, #108] ; (80048ac <TP_Read_AD+0xc0>)
|
||
8004840: f7fd fb09 bl 8001e56 <HAL_GPIO_WritePin>
|
||
TCLK(0);
|
||
8004844: 2200 movs r2, #0
|
||
8004846: 2102 movs r1, #2
|
||
8004848: 4818 ldr r0, [pc, #96] ; (80048ac <TP_Read_AD+0xc0>)
|
||
800484a: f7fd fb04 bl 8001e56 <HAL_GPIO_WritePin>
|
||
for(uint8_t count=0;count<16;count++)//����16λ����,ֻ�и�12λ��Ч
|
||
800484e: 2300 movs r3, #0
|
||
8004850: 737b strb r3, [r7, #13]
|
||
8004852: e01a b.n 800488a <TP_Read_AD+0x9e>
|
||
{
|
||
Num<<=1;
|
||
8004854: 89fb ldrh r3, [r7, #14]
|
||
8004856: 005b lsls r3, r3, #1
|
||
8004858: 81fb strh r3, [r7, #14]
|
||
TCLK(0); //�½�����Ч
|
||
800485a: 2200 movs r2, #0
|
||
800485c: 2102 movs r1, #2
|
||
800485e: 4813 ldr r0, [pc, #76] ; (80048ac <TP_Read_AD+0xc0>)
|
||
8004860: f7fd faf9 bl 8001e56 <HAL_GPIO_WritePin>
|
||
TCLK(1);;
|
||
8004864: 2201 movs r2, #1
|
||
8004866: 2102 movs r1, #2
|
||
8004868: 4810 ldr r0, [pc, #64] ; (80048ac <TP_Read_AD+0xc0>)
|
||
800486a: f7fd faf4 bl 8001e56 <HAL_GPIO_WritePin>
|
||
if(TDOUT){Num++;}
|
||
800486e: f44f 7180 mov.w r1, #256 ; 0x100
|
||
8004872: 480f ldr r0, [pc, #60] ; (80048b0 <TP_Read_AD+0xc4>)
|
||
8004874: f7fd fad8 bl 8001e28 <HAL_GPIO_ReadPin>
|
||
8004878: 4603 mov r3, r0
|
||
800487a: 2b00 cmp r3, #0
|
||
800487c: d002 beq.n 8004884 <TP_Read_AD+0x98>
|
||
800487e: 89fb ldrh r3, [r7, #14]
|
||
8004880: 3301 adds r3, #1
|
||
8004882: 81fb strh r3, [r7, #14]
|
||
for(uint8_t count=0;count<16;count++)//����16λ����,ֻ�и�12λ��Ч
|
||
8004884: 7b7b ldrb r3, [r7, #13]
|
||
8004886: 3301 adds r3, #1
|
||
8004888: 737b strb r3, [r7, #13]
|
||
800488a: 7b7b ldrb r3, [r7, #13]
|
||
800488c: 2b0f cmp r3, #15
|
||
800488e: d9e1 bls.n 8004854 <TP_Read_AD+0x68>
|
||
}
|
||
Num>>=4; //ֻ�и�12λ��Ч.
|
||
8004890: 89fb ldrh r3, [r7, #14]
|
||
8004892: 091b lsrs r3, r3, #4
|
||
8004894: 81fb strh r3, [r7, #14]
|
||
TCS(1); //�ͷ�Ƭѡ
|
||
8004896: 2201 movs r2, #1
|
||
8004898: 2104 movs r1, #4
|
||
800489a: 4804 ldr r0, [pc, #16] ; (80048ac <TP_Read_AD+0xc0>)
|
||
800489c: f7fd fadb bl 8001e56 <HAL_GPIO_WritePin>
|
||
return(Num);
|
||
80048a0: 89fb ldrh r3, [r7, #14]
|
||
}
|
||
80048a2: 4618 mov r0, r3
|
||
80048a4: 3710 adds r7, #16
|
||
80048a6: 46bd mov sp, r7
|
||
80048a8: bd80 pop {r7, pc}
|
||
80048aa: bf00 nop
|
||
80048ac: 40010c00 .word 0x40010c00
|
||
80048b0: 40011c00 .word 0x40011c00
|
||
|
||
080048b4 <TP_Read_XOY>:
|
||
//xy:ָ�CMD_RDX/CMD_RDY��
|
||
//����ֵ:����������
|
||
#define READ_TIMES 5 //��ȡ����
|
||
#define LOST_VAL 1 //����ֵ
|
||
uint16_t TP_Read_XOY(uint8_t xy)
|
||
{
|
||
80048b4: b590 push {r4, r7, lr}
|
||
80048b6: b089 sub sp, #36 ; 0x24
|
||
80048b8: af00 add r7, sp, #0
|
||
80048ba: 4603 mov r3, r0
|
||
80048bc: 71fb strb r3, [r7, #7]
|
||
uint16_t i, j;
|
||
uint16_t buf[READ_TIMES];
|
||
uint16_t sum=0;
|
||
80048be: 2300 movs r3, #0
|
||
80048c0: 837b strh r3, [r7, #26]
|
||
uint16_t temp;
|
||
for(i=0;i<READ_TIMES;i++)buf[i]=TP_Read_AD(xy);
|
||
80048c2: 2300 movs r3, #0
|
||
80048c4: 83fb strh r3, [r7, #30]
|
||
80048c6: e00f b.n 80048e8 <TP_Read_XOY+0x34>
|
||
80048c8: 8bfc ldrh r4, [r7, #30]
|
||
80048ca: 79fb ldrb r3, [r7, #7]
|
||
80048cc: 4618 mov r0, r3
|
||
80048ce: f7ff ff8d bl 80047ec <TP_Read_AD>
|
||
80048d2: 4603 mov r3, r0
|
||
80048d4: 461a mov r2, r3
|
||
80048d6: 0063 lsls r3, r4, #1
|
||
80048d8: f107 0120 add.w r1, r7, #32
|
||
80048dc: 440b add r3, r1
|
||
80048de: f823 2c14 strh.w r2, [r3, #-20]
|
||
80048e2: 8bfb ldrh r3, [r7, #30]
|
||
80048e4: 3301 adds r3, #1
|
||
80048e6: 83fb strh r3, [r7, #30]
|
||
80048e8: 8bfb ldrh r3, [r7, #30]
|
||
80048ea: 2b04 cmp r3, #4
|
||
80048ec: d9ec bls.n 80048c8 <TP_Read_XOY+0x14>
|
||
for(i=0;i<READ_TIMES-1; i++)//����
|
||
80048ee: 2300 movs r3, #0
|
||
80048f0: 83fb strh r3, [r7, #30]
|
||
80048f2: e03b b.n 800496c <TP_Read_XOY+0xb8>
|
||
{
|
||
for(j=i+1;j<READ_TIMES;j++)
|
||
80048f4: 8bfb ldrh r3, [r7, #30]
|
||
80048f6: 3301 adds r3, #1
|
||
80048f8: 83bb strh r3, [r7, #28]
|
||
80048fa: e031 b.n 8004960 <TP_Read_XOY+0xac>
|
||
{
|
||
if(buf[i]>buf[j])//��������
|
||
80048fc: 8bfb ldrh r3, [r7, #30]
|
||
80048fe: 005b lsls r3, r3, #1
|
||
8004900: f107 0220 add.w r2, r7, #32
|
||
8004904: 4413 add r3, r2
|
||
8004906: f833 2c14 ldrh.w r2, [r3, #-20]
|
||
800490a: 8bbb ldrh r3, [r7, #28]
|
||
800490c: 005b lsls r3, r3, #1
|
||
800490e: f107 0120 add.w r1, r7, #32
|
||
8004912: 440b add r3, r1
|
||
8004914: f833 3c14 ldrh.w r3, [r3, #-20]
|
||
8004918: 429a cmp r2, r3
|
||
800491a: d91e bls.n 800495a <TP_Read_XOY+0xa6>
|
||
{
|
||
temp=buf[i];
|
||
800491c: 8bfb ldrh r3, [r7, #30]
|
||
800491e: 005b lsls r3, r3, #1
|
||
8004920: f107 0220 add.w r2, r7, #32
|
||
8004924: 4413 add r3, r2
|
||
8004926: f833 3c14 ldrh.w r3, [r3, #-20]
|
||
800492a: 833b strh r3, [r7, #24]
|
||
buf[i]=buf[j];
|
||
800492c: 8bbb ldrh r3, [r7, #28]
|
||
800492e: 8bfa ldrh r2, [r7, #30]
|
||
8004930: 005b lsls r3, r3, #1
|
||
8004932: f107 0120 add.w r1, r7, #32
|
||
8004936: 440b add r3, r1
|
||
8004938: f833 1c14 ldrh.w r1, [r3, #-20]
|
||
800493c: 0053 lsls r3, r2, #1
|
||
800493e: f107 0220 add.w r2, r7, #32
|
||
8004942: 4413 add r3, r2
|
||
8004944: 460a mov r2, r1
|
||
8004946: f823 2c14 strh.w r2, [r3, #-20]
|
||
buf[j]=temp;
|
||
800494a: 8bbb ldrh r3, [r7, #28]
|
||
800494c: 005b lsls r3, r3, #1
|
||
800494e: f107 0220 add.w r2, r7, #32
|
||
8004952: 4413 add r3, r2
|
||
8004954: 8b3a ldrh r2, [r7, #24]
|
||
8004956: f823 2c14 strh.w r2, [r3, #-20]
|
||
for(j=i+1;j<READ_TIMES;j++)
|
||
800495a: 8bbb ldrh r3, [r7, #28]
|
||
800495c: 3301 adds r3, #1
|
||
800495e: 83bb strh r3, [r7, #28]
|
||
8004960: 8bbb ldrh r3, [r7, #28]
|
||
8004962: 2b04 cmp r3, #4
|
||
8004964: d9ca bls.n 80048fc <TP_Read_XOY+0x48>
|
||
for(i=0;i<READ_TIMES-1; i++)//����
|
||
8004966: 8bfb ldrh r3, [r7, #30]
|
||
8004968: 3301 adds r3, #1
|
||
800496a: 83fb strh r3, [r7, #30]
|
||
800496c: 8bfb ldrh r3, [r7, #30]
|
||
800496e: 2b03 cmp r3, #3
|
||
8004970: d9c0 bls.n 80048f4 <TP_Read_XOY+0x40>
|
||
}
|
||
}
|
||
}
|
||
sum=0;
|
||
8004972: 2300 movs r3, #0
|
||
8004974: 837b strh r3, [r7, #26]
|
||
for(i=LOST_VAL;i<READ_TIMES-LOST_VAL;i++)sum+=buf[i];
|
||
8004976: 2301 movs r3, #1
|
||
8004978: 83fb strh r3, [r7, #30]
|
||
800497a: e00c b.n 8004996 <TP_Read_XOY+0xe2>
|
||
800497c: 8bfb ldrh r3, [r7, #30]
|
||
800497e: 005b lsls r3, r3, #1
|
||
8004980: f107 0220 add.w r2, r7, #32
|
||
8004984: 4413 add r3, r2
|
||
8004986: f833 2c14 ldrh.w r2, [r3, #-20]
|
||
800498a: 8b7b ldrh r3, [r7, #26]
|
||
800498c: 4413 add r3, r2
|
||
800498e: 837b strh r3, [r7, #26]
|
||
8004990: 8bfb ldrh r3, [r7, #30]
|
||
8004992: 3301 adds r3, #1
|
||
8004994: 83fb strh r3, [r7, #30]
|
||
8004996: 8bfb ldrh r3, [r7, #30]
|
||
8004998: 2b03 cmp r3, #3
|
||
800499a: d9ef bls.n 800497c <TP_Read_XOY+0xc8>
|
||
temp=sum/(READ_TIMES-2*LOST_VAL);
|
||
800499c: 8b7b ldrh r3, [r7, #26]
|
||
800499e: 4a05 ldr r2, [pc, #20] ; (80049b4 <TP_Read_XOY+0x100>)
|
||
80049a0: fba2 2303 umull r2, r3, r2, r3
|
||
80049a4: 085b lsrs r3, r3, #1
|
||
80049a6: 833b strh r3, [r7, #24]
|
||
return temp;
|
||
80049a8: 8b3b ldrh r3, [r7, #24]
|
||
}
|
||
80049aa: 4618 mov r0, r3
|
||
80049ac: 3724 adds r7, #36 ; 0x24
|
||
80049ae: 46bd mov sp, r7
|
||
80049b0: bd90 pop {r4, r7, pc}
|
||
80049b2: bf00 nop
|
||
80049b4: aaaaaaab .word 0xaaaaaaab
|
||
|
||
080049b8 <TP_Read_XY_ADC>:
|
||
|
||
//��ȡx,y����
|
||
//x,y:��ȡ��������ADCֵ
|
||
void TP_Read_XY_ADC(int16_t *x,int16_t *y)
|
||
{
|
||
80049b8: b580 push {r7, lr}
|
||
80049ba: b084 sub sp, #16
|
||
80049bc: af00 add r7, sp, #0
|
||
80049be: 6078 str r0, [r7, #4]
|
||
80049c0: 6039 str r1, [r7, #0]
|
||
int16_t xtemp,ytemp;
|
||
xtemp=TP_Read_XOY(CMD_RDX);
|
||
80049c2: 2090 movs r0, #144 ; 0x90
|
||
80049c4: f7ff ff76 bl 80048b4 <TP_Read_XOY>
|
||
80049c8: 4603 mov r3, r0
|
||
80049ca: 81fb strh r3, [r7, #14]
|
||
ytemp=TP_Read_XOY(CMD_RDY);
|
||
80049cc: 20d0 movs r0, #208 ; 0xd0
|
||
80049ce: f7ff ff71 bl 80048b4 <TP_Read_XOY>
|
||
80049d2: 4603 mov r3, r0
|
||
80049d4: 81bb strh r3, [r7, #12]
|
||
*x=xtemp;
|
||
80049d6: 687b ldr r3, [r7, #4]
|
||
80049d8: 89fa ldrh r2, [r7, #14]
|
||
80049da: 801a strh r2, [r3, #0]
|
||
*y=ytemp;
|
||
80049dc: 683b ldr r3, [r7, #0]
|
||
80049de: 89ba ldrh r2, [r7, #12]
|
||
80049e0: 801a strh r2, [r3, #0]
|
||
}
|
||
80049e2: bf00 nop
|
||
80049e4: 3710 adds r7, #16
|
||
80049e6: 46bd mov sp, r7
|
||
80049e8: bd80 pop {r7, pc}
|
||
|
||
080049ea <TP_Read_XY2>:
|
||
//�ú����ܴ�������ȷ��
|
||
//x,y:��ȡ��������ֵ
|
||
//����ֵ:0,ʧ��;1,�ɹ���
|
||
#define ERR_RANGE 10 //���Χ
|
||
uint8_t TP_Read_XY2(int16_t *x,int16_t *y)
|
||
{
|
||
80049ea: b580 push {r7, lr}
|
||
80049ec: b084 sub sp, #16
|
||
80049ee: af00 add r7, sp, #0
|
||
80049f0: 6078 str r0, [r7, #4]
|
||
80049f2: 6039 str r1, [r7, #0]
|
||
int16_t x1,y1;
|
||
int16_t x2,y2;
|
||
|
||
TP_Read_XY_ADC(&x1,&y1);
|
||
80049f4: f107 020c add.w r2, r7, #12
|
||
80049f8: f107 030e add.w r3, r7, #14
|
||
80049fc: 4611 mov r1, r2
|
||
80049fe: 4618 mov r0, r3
|
||
8004a00: f7ff ffda bl 80049b8 <TP_Read_XY_ADC>
|
||
|
||
TP_Read_XY_ADC(&x2,&y2);
|
||
8004a04: f107 0208 add.w r2, r7, #8
|
||
8004a08: f107 030a add.w r3, r7, #10
|
||
8004a0c: 4611 mov r1, r2
|
||
8004a0e: 4618 mov r0, r3
|
||
8004a10: f7ff ffd2 bl 80049b8 <TP_Read_XY_ADC>
|
||
|
||
if(((x2<=x1&&x1<x2+ERR_RANGE)||(x1<=x2&&x2<x1+ERR_RANGE))//ǰ�����β�����+-50��
|
||
8004a14: f9b7 200a ldrsh.w r2, [r7, #10]
|
||
8004a18: f9b7 300e ldrsh.w r3, [r7, #14]
|
||
8004a1c: 429a cmp r2, r3
|
||
8004a1e: dc06 bgt.n 8004a2e <TP_Read_XY2+0x44>
|
||
8004a20: f9b7 300a ldrsh.w r3, [r7, #10]
|
||
8004a24: 3309 adds r3, #9
|
||
8004a26: f9b7 200e ldrsh.w r2, [r7, #14]
|
||
8004a2a: 4293 cmp r3, r2
|
||
8004a2c: da0c bge.n 8004a48 <TP_Read_XY2+0x5e>
|
||
8004a2e: f9b7 200e ldrsh.w r2, [r7, #14]
|
||
8004a32: f9b7 300a ldrsh.w r3, [r7, #10]
|
||
8004a36: 429a cmp r2, r3
|
||
8004a38: dc3a bgt.n 8004ab0 <TP_Read_XY2+0xc6>
|
||
8004a3a: f9b7 300e ldrsh.w r3, [r7, #14]
|
||
8004a3e: 3309 adds r3, #9
|
||
8004a40: f9b7 200a ldrsh.w r2, [r7, #10]
|
||
8004a44: 4293 cmp r3, r2
|
||
8004a46: db33 blt.n 8004ab0 <TP_Read_XY2+0xc6>
|
||
&&((y2<=y1&&y1<y2+ERR_RANGE)||(y1<=y2&&y2<y1+ERR_RANGE)))
|
||
8004a48: f9b7 2008 ldrsh.w r2, [r7, #8]
|
||
8004a4c: f9b7 300c ldrsh.w r3, [r7, #12]
|
||
8004a50: 429a cmp r2, r3
|
||
8004a52: dc06 bgt.n 8004a62 <TP_Read_XY2+0x78>
|
||
8004a54: f9b7 3008 ldrsh.w r3, [r7, #8]
|
||
8004a58: 3309 adds r3, #9
|
||
8004a5a: f9b7 200c ldrsh.w r2, [r7, #12]
|
||
8004a5e: 4293 cmp r3, r2
|
||
8004a60: da0c bge.n 8004a7c <TP_Read_XY2+0x92>
|
||
8004a62: f9b7 200c ldrsh.w r2, [r7, #12]
|
||
8004a66: f9b7 3008 ldrsh.w r3, [r7, #8]
|
||
8004a6a: 429a cmp r2, r3
|
||
8004a6c: dc20 bgt.n 8004ab0 <TP_Read_XY2+0xc6>
|
||
8004a6e: f9b7 300c ldrsh.w r3, [r7, #12]
|
||
8004a72: 3309 adds r3, #9
|
||
8004a74: f9b7 2008 ldrsh.w r2, [r7, #8]
|
||
8004a78: 4293 cmp r3, r2
|
||
8004a7a: db19 blt.n 8004ab0 <TP_Read_XY2+0xc6>
|
||
{
|
||
*x=(x1+x2)/2;
|
||
8004a7c: f9b7 300e ldrsh.w r3, [r7, #14]
|
||
8004a80: 461a mov r2, r3
|
||
8004a82: f9b7 300a ldrsh.w r3, [r7, #10]
|
||
8004a86: 4413 add r3, r2
|
||
8004a88: 0fda lsrs r2, r3, #31
|
||
8004a8a: 4413 add r3, r2
|
||
8004a8c: 105b asrs r3, r3, #1
|
||
8004a8e: b21a sxth r2, r3
|
||
8004a90: 687b ldr r3, [r7, #4]
|
||
8004a92: 801a strh r2, [r3, #0]
|
||
*y=(y1+y2)/2;
|
||
8004a94: f9b7 300c ldrsh.w r3, [r7, #12]
|
||
8004a98: 461a mov r2, r3
|
||
8004a9a: f9b7 3008 ldrsh.w r3, [r7, #8]
|
||
8004a9e: 4413 add r3, r2
|
||
8004aa0: 0fda lsrs r2, r3, #31
|
||
8004aa2: 4413 add r3, r2
|
||
8004aa4: 105b asrs r3, r3, #1
|
||
8004aa6: b21a sxth r2, r3
|
||
8004aa8: 683b ldr r3, [r7, #0]
|
||
8004aaa: 801a strh r2, [r3, #0]
|
||
return 1;
|
||
8004aac: 2301 movs r3, #1
|
||
8004aae: e000 b.n 8004ab2 <TP_Read_XY2+0xc8>
|
||
}else return 0;
|
||
8004ab0: 2300 movs r3, #0
|
||
}
|
||
8004ab2: 4618 mov r0, r3
|
||
8004ab4: 3710 adds r7, #16
|
||
8004ab6: 46bd mov sp, r7
|
||
8004ab8: bd80 pop {r7, pc}
|
||
...
|
||
|
||
08004abc <TP_Server>:
|
||
touch_device t0;// t0 yyds~
|
||
touch_config tconfig;
|
||
//�������·�����״̬��д����ѭ����ȡ����
|
||
void TP_Server()
|
||
{
|
||
8004abc: b598 push {r3, r4, r7, lr}
|
||
8004abe: af00 add r7, sp, #0
|
||
if(TPEN==0) //�������
|
||
8004ac0: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004ac4: 4835 ldr r0, [pc, #212] ; (8004b9c <TP_Server+0xe0>)
|
||
8004ac6: f7fd f9af bl 8001e28 <HAL_GPIO_ReadPin>
|
||
8004aca: 4603 mov r3, r0
|
||
8004acc: 2b00 cmp r3, #0
|
||
8004ace: d155 bne.n 8004b7c <TP_Server+0xc0>
|
||
{
|
||
if(TP_Read_XY2(&t0.adc_x,&t0.adc_y))
|
||
8004ad0: 4933 ldr r1, [pc, #204] ; (8004ba0 <TP_Server+0xe4>)
|
||
8004ad2: 4834 ldr r0, [pc, #208] ; (8004ba4 <TP_Server+0xe8>)
|
||
8004ad4: f7ff ff89 bl 80049ea <TP_Read_XY2>
|
||
8004ad8: 4603 mov r3, r0
|
||
8004ada: 2b00 cmp r3, #0
|
||
8004adc: d043 beq.n 8004b66 <TP_Server+0xaa>
|
||
{//�ȶ�ȡadֵ
|
||
t0.pix_x=(t0.adc_x/tconfig.x_acc)-tconfig.x_offset;//ת��Ϊ��������
|
||
8004ade: 4b31 ldr r3, [pc, #196] ; (8004ba4 <TP_Server+0xe8>)
|
||
8004ae0: 881b ldrh r3, [r3, #0]
|
||
8004ae2: 4618 mov r0, r3
|
||
8004ae4: f7fc f946 bl 8000d74 <__aeabi_i2f>
|
||
8004ae8: 4602 mov r2, r0
|
||
8004aea: 4b2f ldr r3, [pc, #188] ; (8004ba8 <TP_Server+0xec>)
|
||
8004aec: 685b ldr r3, [r3, #4]
|
||
8004aee: 4619 mov r1, r3
|
||
8004af0: 4610 mov r0, r2
|
||
8004af2: f7fc fa47 bl 8000f84 <__aeabi_fdiv>
|
||
8004af6: 4603 mov r3, r0
|
||
8004af8: 461c mov r4, r3
|
||
8004afa: 4b2b ldr r3, [pc, #172] ; (8004ba8 <TP_Server+0xec>)
|
||
8004afc: 68db ldr r3, [r3, #12]
|
||
8004afe: 4618 mov r0, r3
|
||
8004b00: f7fc f938 bl 8000d74 <__aeabi_i2f>
|
||
8004b04: 4603 mov r3, r0
|
||
8004b06: 4619 mov r1, r3
|
||
8004b08: 4620 mov r0, r4
|
||
8004b0a: f7fc f87d bl 8000c08 <__aeabi_fsub>
|
||
8004b0e: 4603 mov r3, r0
|
||
8004b10: 4618 mov r0, r3
|
||
8004b12: f7fc fad3 bl 80010bc <__aeabi_f2iz>
|
||
8004b16: 4603 mov r3, r0
|
||
8004b18: 4a22 ldr r2, [pc, #136] ; (8004ba4 <TP_Server+0xe8>)
|
||
8004b1a: 6053 str r3, [r2, #4]
|
||
t0.pix_y=(t0.adc_y/tconfig.y_acc)-tconfig.y_offset;
|
||
8004b1c: 4b21 ldr r3, [pc, #132] ; (8004ba4 <TP_Server+0xe8>)
|
||
8004b1e: 885b ldrh r3, [r3, #2]
|
||
8004b20: 4618 mov r0, r3
|
||
8004b22: f7fc f927 bl 8000d74 <__aeabi_i2f>
|
||
8004b26: 4602 mov r2, r0
|
||
8004b28: 4b1f ldr r3, [pc, #124] ; (8004ba8 <TP_Server+0xec>)
|
||
8004b2a: 689b ldr r3, [r3, #8]
|
||
8004b2c: 4619 mov r1, r3
|
||
8004b2e: 4610 mov r0, r2
|
||
8004b30: f7fc fa28 bl 8000f84 <__aeabi_fdiv>
|
||
8004b34: 4603 mov r3, r0
|
||
8004b36: 461c mov r4, r3
|
||
8004b38: 4b1b ldr r3, [pc, #108] ; (8004ba8 <TP_Server+0xec>)
|
||
8004b3a: 691b ldr r3, [r3, #16]
|
||
8004b3c: 4618 mov r0, r3
|
||
8004b3e: f7fc f919 bl 8000d74 <__aeabi_i2f>
|
||
8004b42: 4603 mov r3, r0
|
||
8004b44: 4619 mov r1, r3
|
||
8004b46: 4620 mov r0, r4
|
||
8004b48: f7fc f85e bl 8000c08 <__aeabi_fsub>
|
||
8004b4c: 4603 mov r3, r0
|
||
8004b4e: 4618 mov r0, r3
|
||
8004b50: f7fc fab4 bl 80010bc <__aeabi_f2iz>
|
||
8004b54: 4603 mov r3, r0
|
||
8004b56: 4a13 ldr r2, [pc, #76] ; (8004ba4 <TP_Server+0xe8>)
|
||
8004b58: 6093 str r3, [r2, #8]
|
||
t0.d=1;
|
||
8004b5a: 4a12 ldr r2, [pc, #72] ; (8004ba4 <TP_Server+0xe8>)
|
||
8004b5c: 7b13 ldrb r3, [r2, #12]
|
||
8004b5e: f043 0304 orr.w r3, r3, #4
|
||
8004b62: 7313 strb r3, [r2, #12]
|
||
8004b64: e004 b.n 8004b70 <TP_Server+0xb4>
|
||
}else
|
||
{
|
||
t0.d=0;
|
||
8004b66: 4a0f ldr r2, [pc, #60] ; (8004ba4 <TP_Server+0xe8>)
|
||
8004b68: 7b13 ldrb r3, [r2, #12]
|
||
8004b6a: f36f 0382 bfc r3, #2, #1
|
||
8004b6e: 7313 strb r3, [r2, #12]
|
||
}
|
||
t0.c=1;
|
||
8004b70: 4a0c ldr r2, [pc, #48] ; (8004ba4 <TP_Server+0xe8>)
|
||
8004b72: 7b13 ldrb r3, [r2, #12]
|
||
8004b74: f043 0302 orr.w r3, r3, #2
|
||
8004b78: 7313 strb r3, [r2, #12]
|
||
{
|
||
t0.c=0;
|
||
t0.pix_x=-1;
|
||
t0.pix_y=-1;
|
||
}
|
||
}
|
||
8004b7a: e00c b.n 8004b96 <TP_Server+0xda>
|
||
t0.c=0;
|
||
8004b7c: 4a09 ldr r2, [pc, #36] ; (8004ba4 <TP_Server+0xe8>)
|
||
8004b7e: 7b13 ldrb r3, [r2, #12]
|
||
8004b80: f36f 0341 bfc r3, #1, #1
|
||
8004b84: 7313 strb r3, [r2, #12]
|
||
t0.pix_x=-1;
|
||
8004b86: 4b07 ldr r3, [pc, #28] ; (8004ba4 <TP_Server+0xe8>)
|
||
8004b88: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8004b8c: 605a str r2, [r3, #4]
|
||
t0.pix_y=-1;
|
||
8004b8e: 4b05 ldr r3, [pc, #20] ; (8004ba4 <TP_Server+0xe8>)
|
||
8004b90: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8004b94: 609a str r2, [r3, #8]
|
||
}
|
||
8004b96: bf00 nop
|
||
8004b98: bd98 pop {r3, r4, r7, pc}
|
||
8004b9a: bf00 nop
|
||
8004b9c: 40011c00 .word 0x40011c00
|
||
8004ba0: 200002e2 .word 0x200002e2
|
||
8004ba4: 200002e0 .word 0x200002e0
|
||
8004ba8: 200002c8 .word 0x200002c8
|
||
|
||
08004bac <TP_DrwaTrage>:
|
||
return 0;
|
||
}
|
||
//У�ã���һ��Ŀ������
|
||
//r=�����뾶����ʾ��Ч��
|
||
void TP_DrwaTrage(int x,int y,int r)
|
||
{
|
||
8004bac: b590 push {r4, r7, lr}
|
||
8004bae: b087 sub sp, #28
|
||
8004bb0: af02 add r7, sp, #8
|
||
8004bb2: 60f8 str r0, [r7, #12]
|
||
8004bb4: 60b9 str r1, [r7, #8]
|
||
8004bb6: 607a str r2, [r7, #4]
|
||
Draw_Circle(x,y,r+1,GRAY);
|
||
8004bb8: 68fb ldr r3, [r7, #12]
|
||
8004bba: b298 uxth r0, r3
|
||
8004bbc: 68bb ldr r3, [r7, #8]
|
||
8004bbe: b299 uxth r1, r3
|
||
8004bc0: 687b ldr r3, [r7, #4]
|
||
8004bc2: b29b uxth r3, r3
|
||
8004bc4: 3301 adds r3, #1
|
||
8004bc6: b29a uxth r2, r3
|
||
8004bc8: f248 4330 movw r3, #33840 ; 0x8430
|
||
8004bcc: f7ff fb7f bl 80042ce <Draw_Circle>
|
||
Draw_Circle(x,y,r,RED);
|
||
8004bd0: 68fb ldr r3, [r7, #12]
|
||
8004bd2: b298 uxth r0, r3
|
||
8004bd4: 68bb ldr r3, [r7, #8]
|
||
8004bd6: b299 uxth r1, r3
|
||
8004bd8: 687b ldr r3, [r7, #4]
|
||
8004bda: b29a uxth r2, r3
|
||
8004bdc: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004be0: f7ff fb75 bl 80042ce <Draw_Circle>
|
||
LCD_DrawLine(x,y,x+10,y,RED);
|
||
8004be4: 68fb ldr r3, [r7, #12]
|
||
8004be6: b298 uxth r0, r3
|
||
8004be8: 68bb ldr r3, [r7, #8]
|
||
8004bea: b299 uxth r1, r3
|
||
8004bec: 68fb ldr r3, [r7, #12]
|
||
8004bee: b29b uxth r3, r3
|
||
8004bf0: 330a adds r3, #10
|
||
8004bf2: b29a uxth r2, r3
|
||
8004bf4: 68bb ldr r3, [r7, #8]
|
||
8004bf6: b29b uxth r3, r3
|
||
8004bf8: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
8004bfc: 9400 str r4, [sp, #0]
|
||
8004bfe: f7ff fae1 bl 80041c4 <LCD_DrawLine>
|
||
LCD_DrawLine(x,y,x,y+10,RED);
|
||
8004c02: 68fb ldr r3, [r7, #12]
|
||
8004c04: b298 uxth r0, r3
|
||
8004c06: 68bb ldr r3, [r7, #8]
|
||
8004c08: b299 uxth r1, r3
|
||
8004c0a: 68fb ldr r3, [r7, #12]
|
||
8004c0c: b29a uxth r2, r3
|
||
8004c0e: 68bb ldr r3, [r7, #8]
|
||
8004c10: b29b uxth r3, r3
|
||
8004c12: 330a adds r3, #10
|
||
8004c14: b29b uxth r3, r3
|
||
8004c16: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
8004c1a: 9400 str r4, [sp, #0]
|
||
8004c1c: f7ff fad2 bl 80041c4 <LCD_DrawLine>
|
||
LCD_DrawLine(x,y,x-10,y,RED);
|
||
8004c20: 68fb ldr r3, [r7, #12]
|
||
8004c22: b298 uxth r0, r3
|
||
8004c24: 68bb ldr r3, [r7, #8]
|
||
8004c26: b299 uxth r1, r3
|
||
8004c28: 68fb ldr r3, [r7, #12]
|
||
8004c2a: b29b uxth r3, r3
|
||
8004c2c: 3b0a subs r3, #10
|
||
8004c2e: b29a uxth r2, r3
|
||
8004c30: 68bb ldr r3, [r7, #8]
|
||
8004c32: b29b uxth r3, r3
|
||
8004c34: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
8004c38: 9400 str r4, [sp, #0]
|
||
8004c3a: f7ff fac3 bl 80041c4 <LCD_DrawLine>
|
||
LCD_DrawLine(x,y,x,y-10,RED);
|
||
8004c3e: 68fb ldr r3, [r7, #12]
|
||
8004c40: b298 uxth r0, r3
|
||
8004c42: 68bb ldr r3, [r7, #8]
|
||
8004c44: b299 uxth r1, r3
|
||
8004c46: 68fb ldr r3, [r7, #12]
|
||
8004c48: b29a uxth r2, r3
|
||
8004c4a: 68bb ldr r3, [r7, #8]
|
||
8004c4c: b29b uxth r3, r3
|
||
8004c4e: 3b0a subs r3, #10
|
||
8004c50: b29b uxth r3, r3
|
||
8004c52: f44f 4478 mov.w r4, #63488 ; 0xf800
|
||
8004c56: 9400 str r4, [sp, #0]
|
||
8004c58: f7ff fab4 bl 80041c4 <LCD_DrawLine>
|
||
}
|
||
8004c5c: bf00 nop
|
||
8004c5e: 3714 adds r7, #20
|
||
8004c60: 46bd mov sp, r7
|
||
8004c62: bd90 pop {r4, r7, pc}
|
||
|
||
08004c64 <TP_adjustment>:
|
||
//������У
|
||
void TP_adjustment()
|
||
{
|
||
8004c64: b5b0 push {r4, r5, r7, lr}
|
||
8004c66: b0a4 sub sp, #144 ; 0x90
|
||
8004c68: af02 add r7, sp, #8
|
||
//�ж��Ƿ���ҪУ����eeprom��ȡ����
|
||
EEPROM_READ_BATY(16,(char *)&tconfig,sizeof(touch_config));
|
||
8004c6a: 2218 movs r2, #24
|
||
8004c6c: 4916 ldr r1, [pc, #88] ; (8004cc8 <TP_adjustment+0x64>)
|
||
8004c6e: 2010 movs r0, #16
|
||
8004c70: f7ff fcf2 bl 8004658 <EEPROM_READ_BATY>
|
||
if(tconfig.begin==0xab&&tconfig.end==0xcd) //�ж�У����
|
||
8004c74: 4b14 ldr r3, [pc, #80] ; (8004cc8 <TP_adjustment+0x64>)
|
||
8004c76: 781b ldrb r3, [r3, #0]
|
||
8004c78: 2bab cmp r3, #171 ; 0xab
|
||
8004c7a: d104 bne.n 8004c86 <TP_adjustment+0x22>
|
||
8004c7c: 4b12 ldr r3, [pc, #72] ; (8004cc8 <TP_adjustment+0x64>)
|
||
8004c7e: 7d1b ldrb r3, [r3, #20]
|
||
8004c80: 2bcd cmp r3, #205 ; 0xcd
|
||
8004c82: f000 82a5 beq.w 80051d0 <TP_adjustment+0x56c>
|
||
{
|
||
return; //�Ѿ�У����
|
||
}
|
||
//У�����Ƚϼ���ȡ4����������adֵ�����صĹ�ϵ
|
||
char str[64]; //�����ַ�����ʾ
|
||
uint16_t y_adc,x_adc,step=0,r=10; //adc���棬У���裬�����İ뾶
|
||
8004c86: 2300 movs r3, #0
|
||
8004c88: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
8004c8c: 230a movs r3, #10
|
||
8004c8e: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
uint16_t y1,y2,y3,y4,x1,x2,x3,x4; //4���㻺��
|
||
int y5,x5,xd,xl,yd,yl; //ͨ��4��������xy�ij��ߺͶ̱�
|
||
float acc_x,acc_y; //�����Ĺ�ϵ����
|
||
int offset_x,offset_y; //������ƫ��
|
||
uint32_t wait=HAL_GetTick()+50000,ms100=0; //Уʱ�䣬50��û�������Զ��˳�
|
||
8004c92: f7fc fe23 bl 80018dc <HAL_GetTick>
|
||
8004c96: 4603 mov r3, r0
|
||
8004c98: f503 4343 add.w r3, r3, #49920 ; 0xc300
|
||
8004c9c: 3350 adds r3, #80 ; 0x50
|
||
8004c9e: 673b str r3, [r7, #112] ; 0x70
|
||
8004ca0: 2300 movs r3, #0
|
||
8004ca2: 66fb str r3, [r7, #108] ; 0x6c
|
||
//��ʾ�ַ�����ʾ
|
||
LCD_Clear(GRAY);
|
||
8004ca4: f248 4030 movw r0, #33840 ; 0x8430
|
||
8004ca8: f7ff fa3a bl 8004120 <LCD_Clear>
|
||
LCD_ShowString(0,50,"Calibrate the touch screen",16,RED,RED);
|
||
8004cac: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004cb0: 9301 str r3, [sp, #4]
|
||
8004cb2: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004cb6: 9300 str r3, [sp, #0]
|
||
8004cb8: 2310 movs r3, #16
|
||
8004cba: 4a04 ldr r2, [pc, #16] ; (8004ccc <TP_adjustment+0x68>)
|
||
8004cbc: 2132 movs r1, #50 ; 0x32
|
||
8004cbe: 2000 movs r0, #0
|
||
8004cc0: f7ff fc2c bl 800451c <LCD_ShowString>
|
||
//TP_DrwaTrage(30,30,10);
|
||
//��ʼУ
|
||
while(HAL_GetTick()<wait)
|
||
8004cc4: e27c b.n 80051c0 <TP_adjustment+0x55c>
|
||
8004cc6: bf00 nop
|
||
8004cc8: 200002c8 .word 0x200002c8
|
||
8004ccc: 080088e8 .word 0x080088e8
|
||
{
|
||
if(TPEN==0) //������������
|
||
8004cd0: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004cd4: 48cf ldr r0, [pc, #828] ; (8005014 <TP_adjustment+0x3b0>)
|
||
8004cd6: f7fd f8a7 bl 8001e28 <HAL_GPIO_ReadPin>
|
||
8004cda: 4603 mov r3, r0
|
||
8004cdc: 2b00 cmp r3, #0
|
||
8004cde: d146 bne.n 8004d6e <TP_adjustment+0x10a>
|
||
{
|
||
wait=HAL_GetTick()+50000; //����50��
|
||
8004ce0: f7fc fdfc bl 80018dc <HAL_GetTick>
|
||
8004ce4: 4603 mov r3, r0
|
||
8004ce6: f503 4343 add.w r3, r3, #49920 ; 0xc300
|
||
8004cea: 3350 adds r3, #80 ; 0x50
|
||
8004cec: 673b str r3, [r7, #112] ; 0x70
|
||
|
||
TP_Read_XY2(&x_adc,&y_adc); //��ȡxy adֵ
|
||
8004cee: 1cba adds r2, r7, #2
|
||
8004cf0: 463b mov r3, r7
|
||
8004cf2: 4611 mov r1, r2
|
||
8004cf4: 4618 mov r0, r3
|
||
8004cf6: f7ff fe78 bl 80049ea <TP_Read_XY2>
|
||
//��������ֵ��ʾ����
|
||
sprintf(str,"ADC_X:%04d",x_adc);
|
||
8004cfa: 883b ldrh r3, [r7, #0]
|
||
8004cfc: 461a mov r2, r3
|
||
8004cfe: 1d3b adds r3, r7, #4
|
||
8004d00: 49c5 ldr r1, [pc, #788] ; (8005018 <TP_adjustment+0x3b4>)
|
||
8004d02: 4618 mov r0, r3
|
||
8004d04: f001 fc62 bl 80065cc <siprintf>
|
||
LCD_ShowString(100, 0, str, 16, RED, GRAY);
|
||
8004d08: 1d3a adds r2, r7, #4
|
||
8004d0a: f248 4330 movw r3, #33840 ; 0x8430
|
||
8004d0e: 9301 str r3, [sp, #4]
|
||
8004d10: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004d14: 9300 str r3, [sp, #0]
|
||
8004d16: 2310 movs r3, #16
|
||
8004d18: 2100 movs r1, #0
|
||
8004d1a: 2064 movs r0, #100 ; 0x64
|
||
8004d1c: f7ff fbfe bl 800451c <LCD_ShowString>
|
||
sprintf(str,"ADC_Y:%04d",y_adc);
|
||
8004d20: 887b ldrh r3, [r7, #2]
|
||
8004d22: 461a mov r2, r3
|
||
8004d24: 1d3b adds r3, r7, #4
|
||
8004d26: 49bd ldr r1, [pc, #756] ; (800501c <TP_adjustment+0x3b8>)
|
||
8004d28: 4618 mov r0, r3
|
||
8004d2a: f001 fc4f bl 80065cc <siprintf>
|
||
LCD_ShowString(100, 16, str, 16, RED, GRAY);
|
||
8004d2e: 1d3a adds r2, r7, #4
|
||
8004d30: f248 4330 movw r3, #33840 ; 0x8430
|
||
8004d34: 9301 str r3, [sp, #4]
|
||
8004d36: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004d3a: 9300 str r3, [sp, #0]
|
||
8004d3c: 2310 movs r3, #16
|
||
8004d3e: 2110 movs r1, #16
|
||
8004d40: 2064 movs r0, #100 ; 0x64
|
||
8004d42: f7ff fbeb bl 800451c <LCD_ShowString>
|
||
//��Ч���뾶��ʼ����
|
||
if(HAL_GetTick()>ms100)
|
||
8004d46: f7fc fdc9 bl 80018dc <HAL_GetTick>
|
||
8004d4a: 4602 mov r2, r0
|
||
8004d4c: 6efb ldr r3, [r7, #108] ; 0x6c
|
||
8004d4e: 4293 cmp r3, r2
|
||
8004d50: d20d bcs.n 8004d6e <TP_adjustment+0x10a>
|
||
{
|
||
ms100=HAL_GetTick()+100;
|
||
8004d52: f7fc fdc3 bl 80018dc <HAL_GetTick>
|
||
8004d56: 4603 mov r3, r0
|
||
8004d58: 3364 adds r3, #100 ; 0x64
|
||
8004d5a: 66fb str r3, [r7, #108] ; 0x6c
|
||
if(r>0){r--;}
|
||
8004d5c: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004d60: 2b00 cmp r3, #0
|
||
8004d62: d004 beq.n 8004d6e <TP_adjustment+0x10a>
|
||
8004d64: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004d68: 3b01 subs r3, #1
|
||
8004d6a: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
}
|
||
//����0�����㻭�ڣ�30��30����ʱ�뾶Ϊ10
|
||
if(step==0)
|
||
8004d6e: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004d72: 2b00 cmp r3, #0
|
||
8004d74: d129 bne.n 8004dca <TP_adjustment+0x166>
|
||
{
|
||
TP_DrwaTrage(30,30,r);
|
||
8004d76: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004d7a: 461a mov r2, r3
|
||
8004d7c: 211e movs r1, #30
|
||
8004d7e: 201e movs r0, #30
|
||
8004d80: f7ff ff14 bl 8004bac <TP_DrwaTrage>
|
||
if(r==0)//���뾶����Ϊ0��ʱ��
|
||
8004d84: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004d88: 2b00 cmp r3, #0
|
||
8004d8a: d11e bne.n 8004dca <TP_adjustment+0x166>
|
||
{
|
||
//������һ�����裬������������ֵ����ʾ����
|
||
step+=1;
|
||
8004d8c: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004d90: 3301 adds r3, #1
|
||
8004d92: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y1=y_adc;
|
||
8004d96: 887b ldrh r3, [r7, #2]
|
||
8004d98: f8a7 3082 strh.w r3, [r7, #130] ; 0x82
|
||
x1=x_adc;
|
||
8004d9c: 883b ldrh r3, [r7, #0]
|
||
8004d9e: f8a7 307a strh.w r3, [r7, #122] ; 0x7a
|
||
sprintf(str,"point_1 x:%d y:%d",x1,y1);
|
||
8004da2: f8b7 207a ldrh.w r2, [r7, #122] ; 0x7a
|
||
8004da6: f8b7 3082 ldrh.w r3, [r7, #130] ; 0x82
|
||
8004daa: 1d38 adds r0, r7, #4
|
||
8004dac: 499c ldr r1, [pc, #624] ; (8005020 <TP_adjustment+0x3bc>)
|
||
8004dae: f001 fc0d bl 80065cc <siprintf>
|
||
LCD_ShowString(0,66,str,16,RED,RED);
|
||
8004db2: 1d3a adds r2, r7, #4
|
||
8004db4: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004db8: 9301 str r3, [sp, #4]
|
||
8004dba: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004dbe: 9300 str r3, [sp, #0]
|
||
8004dc0: 2310 movs r3, #16
|
||
8004dc2: 2142 movs r1, #66 ; 0x42
|
||
8004dc4: 2000 movs r0, #0
|
||
8004dc6: f7ff fba9 bl 800451c <LCD_ShowString>
|
||
}
|
||
}
|
||
//����1���ȴ���Ļ���ɿ���������һ�����裬���ð뾶
|
||
if(step==1)
|
||
8004dca: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004dce: 2b01 cmp r3, #1
|
||
8004dd0: d10f bne.n 8004df2 <TP_adjustment+0x18e>
|
||
{
|
||
if(TPEN==1)
|
||
8004dd2: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004dd6: 488f ldr r0, [pc, #572] ; (8005014 <TP_adjustment+0x3b0>)
|
||
8004dd8: f7fd f826 bl 8001e28 <HAL_GPIO_ReadPin>
|
||
8004ddc: 4603 mov r3, r0
|
||
8004dde: 2b01 cmp r3, #1
|
||
8004de0: d107 bne.n 8004df2 <TP_adjustment+0x18e>
|
||
{
|
||
step+=1;
|
||
8004de2: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004de6: 3301 adds r3, #1
|
||
8004de8: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8004dec: 230a movs r3, #10
|
||
8004dee: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
|
||
}
|
||
//���漸������������һ��
|
||
if(step==2)
|
||
8004df2: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004df6: 2b02 cmp r3, #2
|
||
8004df8: d12a bne.n 8004e50 <TP_adjustment+0x1ec>
|
||
{
|
||
TP_DrwaTrage(290,30,r);
|
||
8004dfa: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004dfe: 461a mov r2, r3
|
||
8004e00: 211e movs r1, #30
|
||
8004e02: f44f 7091 mov.w r0, #290 ; 0x122
|
||
8004e06: f7ff fed1 bl 8004bac <TP_DrwaTrage>
|
||
if(r==0)
|
||
8004e0a: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004e0e: 2b00 cmp r3, #0
|
||
8004e10: d11e bne.n 8004e50 <TP_adjustment+0x1ec>
|
||
{
|
||
step+=1;
|
||
8004e12: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004e16: 3301 adds r3, #1
|
||
8004e18: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y2=y_adc;
|
||
8004e1c: 887b ldrh r3, [r7, #2]
|
||
8004e1e: f8a7 3080 strh.w r3, [r7, #128] ; 0x80
|
||
x2=x_adc;
|
||
8004e22: 883b ldrh r3, [r7, #0]
|
||
8004e24: f8a7 3078 strh.w r3, [r7, #120] ; 0x78
|
||
sprintf(str,"point_2 x:%d y:%d",x2,y2);
|
||
8004e28: f8b7 2078 ldrh.w r2, [r7, #120] ; 0x78
|
||
8004e2c: f8b7 3080 ldrh.w r3, [r7, #128] ; 0x80
|
||
8004e30: 1d38 adds r0, r7, #4
|
||
8004e32: 497c ldr r1, [pc, #496] ; (8005024 <TP_adjustment+0x3c0>)
|
||
8004e34: f001 fbca bl 80065cc <siprintf>
|
||
LCD_ShowString(0,66+16,str,16,RED,RED);
|
||
8004e38: 1d3a adds r2, r7, #4
|
||
8004e3a: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004e3e: 9301 str r3, [sp, #4]
|
||
8004e40: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004e44: 9300 str r3, [sp, #0]
|
||
8004e46: 2310 movs r3, #16
|
||
8004e48: 2152 movs r1, #82 ; 0x52
|
||
8004e4a: 2000 movs r0, #0
|
||
8004e4c: f7ff fb66 bl 800451c <LCD_ShowString>
|
||
}
|
||
}
|
||
if(step==3)
|
||
8004e50: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004e54: 2b03 cmp r3, #3
|
||
8004e56: d10f bne.n 8004e78 <TP_adjustment+0x214>
|
||
{
|
||
if(TPEN==1)
|
||
8004e58: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004e5c: 486d ldr r0, [pc, #436] ; (8005014 <TP_adjustment+0x3b0>)
|
||
8004e5e: f7fc ffe3 bl 8001e28 <HAL_GPIO_ReadPin>
|
||
8004e62: 4603 mov r3, r0
|
||
8004e64: 2b01 cmp r3, #1
|
||
8004e66: d107 bne.n 8004e78 <TP_adjustment+0x214>
|
||
{
|
||
step+=1;
|
||
8004e68: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004e6c: 3301 adds r3, #1
|
||
8004e6e: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8004e72: 230a movs r3, #10
|
||
8004e74: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
|
||
}
|
||
if(step==4)
|
||
8004e78: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004e7c: 2b04 cmp r3, #4
|
||
8004e7e: d129 bne.n 8004ed4 <TP_adjustment+0x270>
|
||
{
|
||
TP_DrwaTrage(30,210,r);
|
||
8004e80: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004e84: 461a mov r2, r3
|
||
8004e86: 21d2 movs r1, #210 ; 0xd2
|
||
8004e88: 201e movs r0, #30
|
||
8004e8a: f7ff fe8f bl 8004bac <TP_DrwaTrage>
|
||
if(r==0)
|
||
8004e8e: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004e92: 2b00 cmp r3, #0
|
||
8004e94: d11e bne.n 8004ed4 <TP_adjustment+0x270>
|
||
{
|
||
step+=1;
|
||
8004e96: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004e9a: 3301 adds r3, #1
|
||
8004e9c: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y3=y_adc;
|
||
8004ea0: 887b ldrh r3, [r7, #2]
|
||
8004ea2: f8a7 307e strh.w r3, [r7, #126] ; 0x7e
|
||
x3=x_adc;
|
||
8004ea6: 883b ldrh r3, [r7, #0]
|
||
8004ea8: f8a7 3076 strh.w r3, [r7, #118] ; 0x76
|
||
sprintf(str,"point_3 x:%d y:%d",x3,y3);
|
||
8004eac: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76
|
||
8004eb0: f8b7 307e ldrh.w r3, [r7, #126] ; 0x7e
|
||
8004eb4: 1d38 adds r0, r7, #4
|
||
8004eb6: 495c ldr r1, [pc, #368] ; (8005028 <TP_adjustment+0x3c4>)
|
||
8004eb8: f001 fb88 bl 80065cc <siprintf>
|
||
LCD_ShowString(0,66+16+16,str,16,RED,RED);
|
||
8004ebc: 1d3a adds r2, r7, #4
|
||
8004ebe: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004ec2: 9301 str r3, [sp, #4]
|
||
8004ec4: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004ec8: 9300 str r3, [sp, #0]
|
||
8004eca: 2310 movs r3, #16
|
||
8004ecc: 2162 movs r1, #98 ; 0x62
|
||
8004ece: 2000 movs r0, #0
|
||
8004ed0: f7ff fb24 bl 800451c <LCD_ShowString>
|
||
}
|
||
}
|
||
if(step==5)
|
||
8004ed4: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004ed8: 2b05 cmp r3, #5
|
||
8004eda: d10f bne.n 8004efc <TP_adjustment+0x298>
|
||
{
|
||
if(TPEN==1)
|
||
8004edc: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004ee0: 484c ldr r0, [pc, #304] ; (8005014 <TP_adjustment+0x3b0>)
|
||
8004ee2: f7fc ffa1 bl 8001e28 <HAL_GPIO_ReadPin>
|
||
8004ee6: 4603 mov r3, r0
|
||
8004ee8: 2b01 cmp r3, #1
|
||
8004eea: d107 bne.n 8004efc <TP_adjustment+0x298>
|
||
{
|
||
step+=1;
|
||
8004eec: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004ef0: 3301 adds r3, #1
|
||
8004ef2: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8004ef6: 230a movs r3, #10
|
||
8004ef8: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
|
||
}
|
||
if(step==6)
|
||
8004efc: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004f00: 2b06 cmp r3, #6
|
||
8004f02: d12a bne.n 8004f5a <TP_adjustment+0x2f6>
|
||
{
|
||
TP_DrwaTrage(290,210,r);
|
||
8004f04: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004f08: 461a mov r2, r3
|
||
8004f0a: 21d2 movs r1, #210 ; 0xd2
|
||
8004f0c: f44f 7091 mov.w r0, #290 ; 0x122
|
||
8004f10: f7ff fe4c bl 8004bac <TP_DrwaTrage>
|
||
if(r==0)
|
||
8004f14: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84
|
||
8004f18: 2b00 cmp r3, #0
|
||
8004f1a: d11e bne.n 8004f5a <TP_adjustment+0x2f6>
|
||
{
|
||
step+=1;
|
||
8004f1c: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004f20: 3301 adds r3, #1
|
||
8004f22: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
y4=y_adc;
|
||
8004f26: 887b ldrh r3, [r7, #2]
|
||
8004f28: f8a7 307c strh.w r3, [r7, #124] ; 0x7c
|
||
x4=x_adc;
|
||
8004f2c: 883b ldrh r3, [r7, #0]
|
||
8004f2e: f8a7 3074 strh.w r3, [r7, #116] ; 0x74
|
||
sprintf(str,"point_4 x:%d y:%d",x4,y4);
|
||
8004f32: f8b7 2074 ldrh.w r2, [r7, #116] ; 0x74
|
||
8004f36: f8b7 307c ldrh.w r3, [r7, #124] ; 0x7c
|
||
8004f3a: 1d38 adds r0, r7, #4
|
||
8004f3c: 493b ldr r1, [pc, #236] ; (800502c <TP_adjustment+0x3c8>)
|
||
8004f3e: f001 fb45 bl 80065cc <siprintf>
|
||
LCD_ShowString(0,66+16+16+16,str,16,RED,RED);
|
||
8004f42: 1d3a adds r2, r7, #4
|
||
8004f44: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004f48: 9301 str r3, [sp, #4]
|
||
8004f4a: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8004f4e: 9300 str r3, [sp, #0]
|
||
8004f50: 2310 movs r3, #16
|
||
8004f52: 2172 movs r1, #114 ; 0x72
|
||
8004f54: 2000 movs r0, #0
|
||
8004f56: f7ff fae1 bl 800451c <LCD_ShowString>
|
||
}
|
||
}
|
||
if(step==7)
|
||
8004f5a: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004f5e: 2b07 cmp r3, #7
|
||
8004f60: d10f bne.n 8004f82 <TP_adjustment+0x31e>
|
||
{
|
||
if(TPEN==1)
|
||
8004f62: f44f 6180 mov.w r1, #1024 ; 0x400
|
||
8004f66: 482b ldr r0, [pc, #172] ; (8005014 <TP_adjustment+0x3b0>)
|
||
8004f68: f7fc ff5e bl 8001e28 <HAL_GPIO_ReadPin>
|
||
8004f6c: 4603 mov r3, r0
|
||
8004f6e: 2b01 cmp r3, #1
|
||
8004f70: d107 bne.n 8004f82 <TP_adjustment+0x31e>
|
||
{
|
||
step+=1;
|
||
8004f72: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004f76: 3301 adds r3, #1
|
||
8004f78: f8a7 3086 strh.w r3, [r7, #134] ; 0x86
|
||
r=10;
|
||
8004f7c: 230a movs r3, #10
|
||
8004f7e: f8a7 3084 strh.w r3, [r7, #132] ; 0x84
|
||
}
|
||
}
|
||
//��4������ȡ�꣬��ʼ������ϵ
|
||
if(step==8)
|
||
8004f82: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86
|
||
8004f86: 2b08 cmp r3, #8
|
||
8004f88: f040 811a bne.w 80051c0 <TP_adjustment+0x55c>
|
||
{
|
||
//��ʵֻ��Ҫ����������У��ͨ��ȡƽ��ֵ����xy�ij��ߺͶ̱�
|
||
xd=((x1+x3)/2);
|
||
8004f8c: f8b7 207a ldrh.w r2, [r7, #122] ; 0x7a
|
||
8004f90: f8b7 3076 ldrh.w r3, [r7, #118] ; 0x76
|
||
8004f94: 4413 add r3, r2
|
||
8004f96: 0fda lsrs r2, r3, #31
|
||
8004f98: 4413 add r3, r2
|
||
8004f9a: 105b asrs r3, r3, #1
|
||
8004f9c: 66bb str r3, [r7, #104] ; 0x68
|
||
xl=((x2+x4)/2);
|
||
8004f9e: f8b7 2078 ldrh.w r2, [r7, #120] ; 0x78
|
||
8004fa2: f8b7 3074 ldrh.w r3, [r7, #116] ; 0x74
|
||
8004fa6: 4413 add r3, r2
|
||
8004fa8: 0fda lsrs r2, r3, #31
|
||
8004faa: 4413 add r3, r2
|
||
8004fac: 105b asrs r3, r3, #1
|
||
8004fae: 667b str r3, [r7, #100] ; 0x64
|
||
yd=((y1+y2)/2);
|
||
8004fb0: f8b7 2082 ldrh.w r2, [r7, #130] ; 0x82
|
||
8004fb4: f8b7 3080 ldrh.w r3, [r7, #128] ; 0x80
|
||
8004fb8: 4413 add r3, r2
|
||
8004fba: 0fda lsrs r2, r3, #31
|
||
8004fbc: 4413 add r3, r2
|
||
8004fbe: 105b asrs r3, r3, #1
|
||
8004fc0: 663b str r3, [r7, #96] ; 0x60
|
||
yl=((y3+y4)/2);
|
||
8004fc2: f8b7 207e ldrh.w r2, [r7, #126] ; 0x7e
|
||
8004fc6: f8b7 307c ldrh.w r3, [r7, #124] ; 0x7c
|
||
8004fca: 4413 add r3, r2
|
||
8004fcc: 0fda lsrs r2, r3, #31
|
||
8004fce: 4413 add r3, r2
|
||
8004fd0: 105b asrs r3, r3, #1
|
||
8004fd2: 65fb str r3, [r7, #92] ; 0x5c
|
||
//����ȥ�̱߿����ٻ���һ����
|
||
x5=xl-xd;
|
||
8004fd4: 6e7a ldr r2, [r7, #100] ; 0x64
|
||
8004fd6: 6ebb ldr r3, [r7, #104] ; 0x68
|
||
8004fd8: 1ad3 subs r3, r2, r3
|
||
8004fda: 65bb str r3, [r7, #88] ; 0x58
|
||
y5=yl-yd;
|
||
8004fdc: 6dfa ldr r2, [r7, #92] ; 0x5c
|
||
8004fde: 6e3b ldr r3, [r7, #96] ; 0x60
|
||
8004fe0: 1ad3 subs r3, r2, r3
|
||
8004fe2: 657b str r3, [r7, #84] ; 0x54
|
||
//�����������Ǹ������϶��д���������xy�㷴��
|
||
if(x5<0||y5<0)
|
||
8004fe4: 6dbb ldr r3, [r7, #88] ; 0x58
|
||
8004fe6: 2b00 cmp r3, #0
|
||
8004fe8: db02 blt.n 8004ff0 <TP_adjustment+0x38c>
|
||
8004fea: 6d7b ldr r3, [r7, #84] ; 0x54
|
||
8004fec: 2b00 cmp r3, #0
|
||
8004fee: da21 bge.n 8005034 <TP_adjustment+0x3d0>
|
||
{
|
||
//��ʾerror
|
||
sprintf(str,"ERROR");
|
||
8004ff0: 1d3b adds r3, r7, #4
|
||
8004ff2: 490f ldr r1, [pc, #60] ; (8005030 <TP_adjustment+0x3cc>)
|
||
8004ff4: 4618 mov r0, r3
|
||
8004ff6: f001 fae9 bl 80065cc <siprintf>
|
||
LCD_ShowString(0,66+16+16+16+16,str,16,RED, GRAY);
|
||
8004ffa: 1d3a adds r2, r7, #4
|
||
8004ffc: f248 4330 movw r3, #33840 ; 0x8430
|
||
8005000: 9301 str r3, [sp, #4]
|
||
8005002: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8005006: 9300 str r3, [sp, #0]
|
||
8005008: 2310 movs r3, #16
|
||
800500a: 2182 movs r1, #130 ; 0x82
|
||
800500c: 2000 movs r0, #0
|
||
800500e: f7ff fa85 bl 800451c <LCD_ShowString>
|
||
{
|
||
8005012: e0cb b.n 80051ac <TP_adjustment+0x548>
|
||
8005014: 40011c00 .word 0x40011c00
|
||
8005018: 08008904 .word 0x08008904
|
||
800501c: 08008910 .word 0x08008910
|
||
8005020: 0800891c .word 0x0800891c
|
||
8005024: 08008930 .word 0x08008930
|
||
8005028: 08008944 .word 0x08008944
|
||
800502c: 08008958 .word 0x08008958
|
||
8005030: 0800896c .word 0x0800896c
|
||
}else
|
||
{
|
||
//������ϵ����
|
||
//ad�ij���ȥ�̱��ٳ�ȥʵ����Ļ���صij����̱ߣ�260=320-30-30��180=240-30-30��
|
||
acc_x=x5/260.0;
|
||
8005034: 6db8 ldr r0, [r7, #88] ; 0x58
|
||
8005036: f7fb fa51 bl 80004dc <__aeabi_i2d>
|
||
800503a: f04f 0200 mov.w r2, #0
|
||
800503e: 4b66 ldr r3, [pc, #408] ; (80051d8 <TP_adjustment+0x574>)
|
||
8005040: f7fb fbe0 bl 8000804 <__aeabi_ddiv>
|
||
8005044: 4602 mov r2, r0
|
||
8005046: 460b mov r3, r1
|
||
8005048: 4610 mov r0, r2
|
||
800504a: 4619 mov r1, r3
|
||
800504c: f7fb fd88 bl 8000b60 <__aeabi_d2f>
|
||
8005050: 4603 mov r3, r0
|
||
8005052: 653b str r3, [r7, #80] ; 0x50
|
||
acc_y=y5/180.0;
|
||
8005054: 6d78 ldr r0, [r7, #84] ; 0x54
|
||
8005056: f7fb fa41 bl 80004dc <__aeabi_i2d>
|
||
800505a: f04f 0200 mov.w r2, #0
|
||
800505e: 4b5f ldr r3, [pc, #380] ; (80051dc <TP_adjustment+0x578>)
|
||
8005060: f7fb fbd0 bl 8000804 <__aeabi_ddiv>
|
||
8005064: 4602 mov r2, r0
|
||
8005066: 460b mov r3, r1
|
||
8005068: 4610 mov r0, r2
|
||
800506a: 4619 mov r1, r3
|
||
800506c: f7fb fd78 bl 8000b60 <__aeabi_d2f>
|
||
8005070: 4603 mov r3, r0
|
||
8005072: 64fb str r3, [r7, #76] ; 0x4c
|
||
//��֤���ʣ���ʵ��ֵ��ȥ��ֵ֤�͵�������ֵ����Ϊ�������㣬���Լ�������������������ƽ��ֵ
|
||
offset_x=(((xd/acc_x)-30)+((xl/acc_x)-290))/2;
|
||
8005074: 6eb8 ldr r0, [r7, #104] ; 0x68
|
||
8005076: f7fb fe7d bl 8000d74 <__aeabi_i2f>
|
||
800507a: 4603 mov r3, r0
|
||
800507c: 6d39 ldr r1, [r7, #80] ; 0x50
|
||
800507e: 4618 mov r0, r3
|
||
8005080: f7fb ff80 bl 8000f84 <__aeabi_fdiv>
|
||
8005084: 4603 mov r3, r0
|
||
8005086: 4956 ldr r1, [pc, #344] ; (80051e0 <TP_adjustment+0x57c>)
|
||
8005088: 4618 mov r0, r3
|
||
800508a: f7fb fdbd bl 8000c08 <__aeabi_fsub>
|
||
800508e: 4603 mov r3, r0
|
||
8005090: 461c mov r4, r3
|
||
8005092: 6e78 ldr r0, [r7, #100] ; 0x64
|
||
8005094: f7fb fe6e bl 8000d74 <__aeabi_i2f>
|
||
8005098: 4603 mov r3, r0
|
||
800509a: 6d39 ldr r1, [r7, #80] ; 0x50
|
||
800509c: 4618 mov r0, r3
|
||
800509e: f7fb ff71 bl 8000f84 <__aeabi_fdiv>
|
||
80050a2: 4603 mov r3, r0
|
||
80050a4: 494f ldr r1, [pc, #316] ; (80051e4 <TP_adjustment+0x580>)
|
||
80050a6: 4618 mov r0, r3
|
||
80050a8: f7fb fdae bl 8000c08 <__aeabi_fsub>
|
||
80050ac: 4603 mov r3, r0
|
||
80050ae: 4619 mov r1, r3
|
||
80050b0: 4620 mov r0, r4
|
||
80050b2: f7fb fdab bl 8000c0c <__addsf3>
|
||
80050b6: 4603 mov r3, r0
|
||
80050b8: f04f 4180 mov.w r1, #1073741824 ; 0x40000000
|
||
80050bc: 4618 mov r0, r3
|
||
80050be: f7fb ff61 bl 8000f84 <__aeabi_fdiv>
|
||
80050c2: 4603 mov r3, r0
|
||
80050c4: 4618 mov r0, r3
|
||
80050c6: f7fb fff9 bl 80010bc <__aeabi_f2iz>
|
||
80050ca: 4603 mov r3, r0
|
||
80050cc: 64bb str r3, [r7, #72] ; 0x48
|
||
offset_y=(((yd/acc_y)-30)+((yl/acc_y)-210))/2;
|
||
80050ce: 6e38 ldr r0, [r7, #96] ; 0x60
|
||
80050d0: f7fb fe50 bl 8000d74 <__aeabi_i2f>
|
||
80050d4: 4603 mov r3, r0
|
||
80050d6: 6cf9 ldr r1, [r7, #76] ; 0x4c
|
||
80050d8: 4618 mov r0, r3
|
||
80050da: f7fb ff53 bl 8000f84 <__aeabi_fdiv>
|
||
80050de: 4603 mov r3, r0
|
||
80050e0: 493f ldr r1, [pc, #252] ; (80051e0 <TP_adjustment+0x57c>)
|
||
80050e2: 4618 mov r0, r3
|
||
80050e4: f7fb fd90 bl 8000c08 <__aeabi_fsub>
|
||
80050e8: 4603 mov r3, r0
|
||
80050ea: 461c mov r4, r3
|
||
80050ec: 6df8 ldr r0, [r7, #92] ; 0x5c
|
||
80050ee: f7fb fe41 bl 8000d74 <__aeabi_i2f>
|
||
80050f2: 4603 mov r3, r0
|
||
80050f4: 6cf9 ldr r1, [r7, #76] ; 0x4c
|
||
80050f6: 4618 mov r0, r3
|
||
80050f8: f7fb ff44 bl 8000f84 <__aeabi_fdiv>
|
||
80050fc: 4603 mov r3, r0
|
||
80050fe: 493a ldr r1, [pc, #232] ; (80051e8 <TP_adjustment+0x584>)
|
||
8005100: 4618 mov r0, r3
|
||
8005102: f7fb fd81 bl 8000c08 <__aeabi_fsub>
|
||
8005106: 4603 mov r3, r0
|
||
8005108: 4619 mov r1, r3
|
||
800510a: 4620 mov r0, r4
|
||
800510c: f7fb fd7e bl 8000c0c <__addsf3>
|
||
8005110: 4603 mov r3, r0
|
||
8005112: f04f 4180 mov.w r1, #1073741824 ; 0x40000000
|
||
8005116: 4618 mov r0, r3
|
||
8005118: f7fb ff34 bl 8000f84 <__aeabi_fdiv>
|
||
800511c: 4603 mov r3, r0
|
||
800511e: 4618 mov r0, r3
|
||
8005120: f7fb ffcc bl 80010bc <__aeabi_f2iz>
|
||
8005124: 4603 mov r3, r0
|
||
8005126: 647b str r3, [r7, #68] ; 0x44
|
||
//������������
|
||
tconfig.x_acc=acc_x;
|
||
8005128: 4a30 ldr r2, [pc, #192] ; (80051ec <TP_adjustment+0x588>)
|
||
800512a: 6d3b ldr r3, [r7, #80] ; 0x50
|
||
800512c: 6053 str r3, [r2, #4]
|
||
tconfig.x_offset=offset_x;
|
||
800512e: 4a2f ldr r2, [pc, #188] ; (80051ec <TP_adjustment+0x588>)
|
||
8005130: 6cbb ldr r3, [r7, #72] ; 0x48
|
||
8005132: 60d3 str r3, [r2, #12]
|
||
tconfig.y_acc=acc_y;
|
||
8005134: 4a2d ldr r2, [pc, #180] ; (80051ec <TP_adjustment+0x588>)
|
||
8005136: 6cfb ldr r3, [r7, #76] ; 0x4c
|
||
8005138: 6093 str r3, [r2, #8]
|
||
tconfig.y_offset=offset_y;
|
||
800513a: 4a2c ldr r2, [pc, #176] ; (80051ec <TP_adjustment+0x588>)
|
||
800513c: 6c7b ldr r3, [r7, #68] ; 0x44
|
||
800513e: 6113 str r3, [r2, #16]
|
||
//eeprom������
|
||
tconfig.begin=0xab;
|
||
8005140: 4b2a ldr r3, [pc, #168] ; (80051ec <TP_adjustment+0x588>)
|
||
8005142: 22ab movs r2, #171 ; 0xab
|
||
8005144: 701a strb r2, [r3, #0]
|
||
tconfig.end=0xcd;
|
||
8005146: 4b29 ldr r3, [pc, #164] ; (80051ec <TP_adjustment+0x588>)
|
||
8005148: 22cd movs r2, #205 ; 0xcd
|
||
800514a: 751a strb r2, [r3, #20]
|
||
|
||
//��ʾ��������
|
||
sprintf(str,"x_acc=%f y_acc=%f",acc_x,acc_y);
|
||
800514c: 6d38 ldr r0, [r7, #80] ; 0x50
|
||
800514e: f7fb f9d7 bl 8000500 <__aeabi_f2d>
|
||
8005152: 4604 mov r4, r0
|
||
8005154: 460d mov r5, r1
|
||
8005156: 6cf8 ldr r0, [r7, #76] ; 0x4c
|
||
8005158: f7fb f9d2 bl 8000500 <__aeabi_f2d>
|
||
800515c: 4602 mov r2, r0
|
||
800515e: 460b mov r3, r1
|
||
8005160: 1d38 adds r0, r7, #4
|
||
8005162: e9cd 2300 strd r2, r3, [sp]
|
||
8005166: 4622 mov r2, r4
|
||
8005168: 462b mov r3, r5
|
||
800516a: 4921 ldr r1, [pc, #132] ; (80051f0 <TP_adjustment+0x58c>)
|
||
800516c: f001 fa2e bl 80065cc <siprintf>
|
||
LCD_ShowString(0,66+16+16+16+16,str,16,RED,RED);
|
||
8005170: 1d3a adds r2, r7, #4
|
||
8005172: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8005176: 9301 str r3, [sp, #4]
|
||
8005178: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
800517c: 9300 str r3, [sp, #0]
|
||
800517e: 2310 movs r3, #16
|
||
8005180: 2182 movs r1, #130 ; 0x82
|
||
8005182: 2000 movs r0, #0
|
||
8005184: f7ff f9ca bl 800451c <LCD_ShowString>
|
||
sprintf(str,"x_offset=%d y_offset=%d",offset_x,offset_y);
|
||
8005188: 1d38 adds r0, r7, #4
|
||
800518a: 6c7b ldr r3, [r7, #68] ; 0x44
|
||
800518c: 6cba ldr r2, [r7, #72] ; 0x48
|
||
800518e: 4919 ldr r1, [pc, #100] ; (80051f4 <TP_adjustment+0x590>)
|
||
8005190: f001 fa1c bl 80065cc <siprintf>
|
||
LCD_ShowString(0,66+16+16+16+16+16,str,16,RED,RED);
|
||
8005194: 1d3a adds r2, r7, #4
|
||
8005196: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
800519a: 9301 str r3, [sp, #4]
|
||
800519c: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
80051a0: 9300 str r3, [sp, #0]
|
||
80051a2: 2310 movs r3, #16
|
||
80051a4: 2192 movs r1, #146 ; 0x92
|
||
80051a6: 2000 movs r0, #0
|
||
80051a8: f7ff f9b8 bl 800451c <LCD_ShowString>
|
||
|
||
}
|
||
//��������������
|
||
EEPROM_WRITE_BATY(16,(char *)&tconfig,sizeof(touch_config));
|
||
80051ac: 2218 movs r2, #24
|
||
80051ae: 490f ldr r1, [pc, #60] ; (80051ec <TP_adjustment+0x588>)
|
||
80051b0: 2010 movs r0, #16
|
||
80051b2: f7ff fa63 bl 800467c <EEPROM_WRITE_BATY>
|
||
HAL_Delay(1000);
|
||
80051b6: f44f 707a mov.w r0, #1000 ; 0x3e8
|
||
80051ba: f7fc fb99 bl 80018f0 <HAL_Delay>
|
||
return;
|
||
80051be: e008 b.n 80051d2 <TP_adjustment+0x56e>
|
||
while(HAL_GetTick()<wait)
|
||
80051c0: f7fc fb8c bl 80018dc <HAL_GetTick>
|
||
80051c4: 4602 mov r2, r0
|
||
80051c6: 6f3b ldr r3, [r7, #112] ; 0x70
|
||
80051c8: 4293 cmp r3, r2
|
||
80051ca: f63f ad81 bhi.w 8004cd0 <TP_adjustment+0x6c>
|
||
80051ce: e000 b.n 80051d2 <TP_adjustment+0x56e>
|
||
return; //�Ѿ�У����
|
||
80051d0: bf00 nop
|
||
|
||
}
|
||
}
|
||
|
||
}
|
||
80051d2: 3788 adds r7, #136 ; 0x88
|
||
80051d4: 46bd mov sp, r7
|
||
80051d6: bdb0 pop {r4, r5, r7, pc}
|
||
80051d8: 40704000 .word 0x40704000
|
||
80051dc: 40668000 .word 0x40668000
|
||
80051e0: 41f00000 .word 0x41f00000
|
||
80051e4: 43910000 .word 0x43910000
|
||
80051e8: 43520000 .word 0x43520000
|
||
80051ec: 200002c8 .word 0x200002c8
|
||
80051f0: 08008974 .word 0x08008974
|
||
80051f4: 08008988 .word 0x08008988
|
||
|
||
080051f8 <Max30102_reset>:
|
||
window *blood_win;
|
||
uint16_t fifo_red;
|
||
uint16_t fifo_ir;
|
||
char blood_str[64];
|
||
uint8_t Max30102_reset(void)
|
||
{
|
||
80051f8: b580 push {r7, lr}
|
||
80051fa: b082 sub sp, #8
|
||
80051fc: af00 add r7, sp, #0
|
||
char a=0x40;
|
||
80051fe: 2340 movs r3, #64 ; 0x40
|
||
8005200: 71fb strb r3, [r7, #7]
|
||
IIC_SAND_DATE(MAX30102_Device_address,REG_MODE_CONFIG, &a,1);
|
||
8005202: 1dfa adds r2, r7, #7
|
||
8005204: 2301 movs r3, #1
|
||
8005206: 2109 movs r1, #9
|
||
8005208: 20ae movs r0, #174 ; 0xae
|
||
800520a: f7ff fa7d bl 8004708 <IIC_SAND_DATE>
|
||
|
||
}
|
||
800520e: bf00 nop
|
||
8005210: 4618 mov r0, r3
|
||
8005212: 3708 adds r7, #8
|
||
8005214: 46bd mov sp, r7
|
||
8005216: bd80 pop {r7, pc}
|
||
|
||
08005218 <MAX30102_Config>:
|
||
void MAX30102_Config(void)
|
||
{
|
||
8005218: b580 push {r7, lr}
|
||
800521a: b082 sub sp, #8
|
||
800521c: af00 add r7, sp, #0
|
||
char a;
|
||
a=0xc0;
|
||
800521e: 23c0 movs r3, #192 ; 0xc0
|
||
8005220: 71fb strb r3, [r7, #7]
|
||
IIC_SAND_DATE(MAX30102_Device_address,REG_INTR_ENABLE_1,&a,1);//// INTR setting
|
||
8005222: 1dfa adds r2, r7, #7
|
||
8005224: 2301 movs r3, #1
|
||
8005226: 2102 movs r1, #2
|
||
8005228: 20ae movs r0, #174 ; 0xae
|
||
800522a: f7ff fa6d bl 8004708 <IIC_SAND_DATE>
|
||
a=0;
|
||
800522e: 2300 movs r3, #0
|
||
8005230: 71fb strb r3, [r7, #7]
|
||
IIC_SAND_DATE(MAX30102_Device_address,REG_INTR_ENABLE_2,&a,1);//
|
||
8005232: 1dfa adds r2, r7, #7
|
||
8005234: 2301 movs r3, #1
|
||
8005236: 2103 movs r1, #3
|
||
8005238: 20ae movs r0, #174 ; 0xae
|
||
800523a: f7ff fa65 bl 8004708 <IIC_SAND_DATE>
|
||
IIC_SAND_DATE(MAX30102_Device_address,REG_FIFO_WR_PTR,&a,1);//FIFO_WR_PTR[4:0]
|
||
800523e: 1dfa adds r2, r7, #7
|
||
8005240: 2301 movs r3, #1
|
||
8005242: 2104 movs r1, #4
|
||
8005244: 20ae movs r0, #174 ; 0xae
|
||
8005246: f7ff fa5f bl 8004708 <IIC_SAND_DATE>
|
||
IIC_SAND_DATE(MAX30102_Device_address,REG_OVF_COUNTER,&a,1);//OVF_COUNTER[4:0]
|
||
800524a: 1dfa adds r2, r7, #7
|
||
800524c: 2301 movs r3, #1
|
||
800524e: 2105 movs r1, #5
|
||
8005250: 20ae movs r0, #174 ; 0xae
|
||
8005252: f7ff fa59 bl 8004708 <IIC_SAND_DATE>
|
||
IIC_SAND_DATE(MAX30102_Device_address,REG_FIFO_RD_PTR,&a,1);//FIFO_RD_PTR[4:0]
|
||
8005256: 1dfa adds r2, r7, #7
|
||
8005258: 2301 movs r3, #1
|
||
800525a: 2106 movs r1, #6
|
||
800525c: 20ae movs r0, #174 ; 0xae
|
||
800525e: f7ff fa53 bl 8004708 <IIC_SAND_DATE>
|
||
|
||
a=0x0f;
|
||
8005262: 230f movs r3, #15
|
||
8005264: 71fb strb r3, [r7, #7]
|
||
IIC_SAND_DATE(MAX30102_Device_address,REG_FIFO_CONFIG,&a,1);//sample avg = 1, fifo rollover=false, fifo almost full = 17
|
||
8005266: 1dfa adds r2, r7, #7
|
||
8005268: 2301 movs r3, #1
|
||
800526a: 2108 movs r1, #8
|
||
800526c: 20ae movs r0, #174 ; 0xae
|
||
800526e: f7ff fa4b bl 8004708 <IIC_SAND_DATE>
|
||
a=0x03;
|
||
8005272: 2303 movs r3, #3
|
||
8005274: 71fb strb r3, [r7, #7]
|
||
IIC_SAND_DATE(MAX30102_Device_address,REG_MODE_CONFIG,&a,1);//0x02 for Red only, 0x03 for SpO2 mode 0x07 multimode LED
|
||
8005276: 1dfa adds r2, r7, #7
|
||
8005278: 2301 movs r3, #1
|
||
800527a: 2109 movs r1, #9
|
||
800527c: 20ae movs r0, #174 ; 0xae
|
||
800527e: f7ff fa43 bl 8004708 <IIC_SAND_DATE>
|
||
a=0x27;
|
||
8005282: 2327 movs r3, #39 ; 0x27
|
||
8005284: 71fb strb r3, [r7, #7]
|
||
IIC_SAND_DATE(MAX30102_Device_address,REG_SPO2_CONFIG,&a,1); // SPO2_ADC range = 4096nA, SPO2 sample rate (50 Hz), LED pulseWidth (400uS)
|
||
8005286: 1dfa adds r2, r7, #7
|
||
8005288: 2301 movs r3, #1
|
||
800528a: 210a movs r1, #10
|
||
800528c: 20ae movs r0, #174 ; 0xae
|
||
800528e: f7ff fa3b bl 8004708 <IIC_SAND_DATE>
|
||
a=0x32;
|
||
8005292: 2332 movs r3, #50 ; 0x32
|
||
8005294: 71fb strb r3, [r7, #7]
|
||
IIC_SAND_DATE(MAX30102_Device_address,REG_LED1_PA,&a,1);//Choose value for ~ 10mA for LED1
|
||
8005296: 1dfa adds r2, r7, #7
|
||
8005298: 2301 movs r3, #1
|
||
800529a: 210c movs r1, #12
|
||
800529c: 20ae movs r0, #174 ; 0xae
|
||
800529e: f7ff fa33 bl 8004708 <IIC_SAND_DATE>
|
||
IIC_SAND_DATE(MAX30102_Device_address,REG_LED2_PA,&a,1);// Choose value for ~ 10mA for LED2
|
||
80052a2: 1dfa adds r2, r7, #7
|
||
80052a4: 2301 movs r3, #1
|
||
80052a6: 210d movs r1, #13
|
||
80052a8: 20ae movs r0, #174 ; 0xae
|
||
80052aa: f7ff fa2d bl 8004708 <IIC_SAND_DATE>
|
||
a=0x7f;
|
||
80052ae: 237f movs r3, #127 ; 0x7f
|
||
80052b0: 71fb strb r3, [r7, #7]
|
||
IIC_SAND_DATE(MAX30102_Device_address,REG_PILOT_PA,&a,1);// Choose value for ~ 25mA for Pilot LED
|
||
80052b2: 1dfa adds r2, r7, #7
|
||
80052b4: 2301 movs r3, #1
|
||
80052b6: 2110 movs r1, #16
|
||
80052b8: 20ae movs r0, #174 ; 0xae
|
||
80052ba: f7ff fa25 bl 8004708 <IIC_SAND_DATE>
|
||
}
|
||
80052be: bf00 nop
|
||
80052c0: 3708 adds r7, #8
|
||
80052c2: 46bd mov sp, r7
|
||
80052c4: bd80 pop {r7, pc}
|
||
...
|
||
|
||
080052c8 <max30102_read_fifo>:
|
||
void max30102_read_fifo(void)
|
||
{
|
||
80052c8: b580 push {r7, lr}
|
||
80052ca: b082 sub sp, #8
|
||
80052cc: af00 add r7, sp, #0
|
||
uint16_t un_temp;
|
||
fifo_red=0;
|
||
80052ce: 4b3c ldr r3, [pc, #240] ; (80053c0 <max30102_read_fifo+0xf8>)
|
||
80052d0: 2200 movs r2, #0
|
||
80052d2: 801a strh r2, [r3, #0]
|
||
fifo_ir=0;
|
||
80052d4: 4b3b ldr r3, [pc, #236] ; (80053c4 <max30102_read_fifo+0xfc>)
|
||
80052d6: 2200 movs r2, #0
|
||
80052d8: 801a strh r2, [r3, #0]
|
||
uint8_t ach_i2c_data[6];
|
||
|
||
//read and clear status register
|
||
IIC_READ_DATE(MAX30102_Device_address,REG_INTR_STATUS_1,&ach_i2c_data,1);
|
||
80052da: 463a mov r2, r7
|
||
80052dc: 2301 movs r3, #1
|
||
80052de: 2100 movs r1, #0
|
||
80052e0: 20ae movs r0, #174 ; 0xae
|
||
80052e2: f7ff fa2f bl 8004744 <IIC_READ_DATE>
|
||
IIC_READ_DATE(MAX30102_Device_address,REG_INTR_STATUS_2,&ach_i2c_data,1);
|
||
80052e6: 463a mov r2, r7
|
||
80052e8: 2301 movs r3, #1
|
||
80052ea: 2101 movs r1, #1
|
||
80052ec: 20ae movs r0, #174 ; 0xae
|
||
80052ee: f7ff fa29 bl 8004744 <IIC_READ_DATE>
|
||
|
||
ach_i2c_data[0]=REG_FIFO_DATA;
|
||
80052f2: 2307 movs r3, #7
|
||
80052f4: 703b strb r3, [r7, #0]
|
||
|
||
IIC_READ_DATE(MAX30102_Device_address,REG_FIFO_DATA,&ach_i2c_data,6);
|
||
80052f6: 463a mov r2, r7
|
||
80052f8: 2306 movs r3, #6
|
||
80052fa: 2107 movs r1, #7
|
||
80052fc: 20ae movs r0, #174 ; 0xae
|
||
80052fe: f7ff fa21 bl 8004744 <IIC_READ_DATE>
|
||
|
||
un_temp=ach_i2c_data[0];
|
||
8005302: 783b ldrb r3, [r7, #0]
|
||
8005304: 80fb strh r3, [r7, #6]
|
||
un_temp<<=14;
|
||
8005306: 88fb ldrh r3, [r7, #6]
|
||
8005308: 039b lsls r3, r3, #14
|
||
800530a: 80fb strh r3, [r7, #6]
|
||
fifo_red+=un_temp;
|
||
800530c: 4b2c ldr r3, [pc, #176] ; (80053c0 <max30102_read_fifo+0xf8>)
|
||
800530e: 881a ldrh r2, [r3, #0]
|
||
8005310: 88fb ldrh r3, [r7, #6]
|
||
8005312: 4413 add r3, r2
|
||
8005314: b29a uxth r2, r3
|
||
8005316: 4b2a ldr r3, [pc, #168] ; (80053c0 <max30102_read_fifo+0xf8>)
|
||
8005318: 801a strh r2, [r3, #0]
|
||
un_temp=ach_i2c_data[1];
|
||
800531a: 787b ldrb r3, [r7, #1]
|
||
800531c: 80fb strh r3, [r7, #6]
|
||
un_temp<<=6;
|
||
800531e: 88fb ldrh r3, [r7, #6]
|
||
8005320: 019b lsls r3, r3, #6
|
||
8005322: 80fb strh r3, [r7, #6]
|
||
fifo_red+=un_temp;
|
||
8005324: 4b26 ldr r3, [pc, #152] ; (80053c0 <max30102_read_fifo+0xf8>)
|
||
8005326: 881a ldrh r2, [r3, #0]
|
||
8005328: 88fb ldrh r3, [r7, #6]
|
||
800532a: 4413 add r3, r2
|
||
800532c: b29a uxth r2, r3
|
||
800532e: 4b24 ldr r3, [pc, #144] ; (80053c0 <max30102_read_fifo+0xf8>)
|
||
8005330: 801a strh r2, [r3, #0]
|
||
un_temp=ach_i2c_data[2];
|
||
8005332: 78bb ldrb r3, [r7, #2]
|
||
8005334: 80fb strh r3, [r7, #6]
|
||
un_temp>>=2;
|
||
8005336: 88fb ldrh r3, [r7, #6]
|
||
8005338: 089b lsrs r3, r3, #2
|
||
800533a: 80fb strh r3, [r7, #6]
|
||
fifo_red+=un_temp;
|
||
800533c: 4b20 ldr r3, [pc, #128] ; (80053c0 <max30102_read_fifo+0xf8>)
|
||
800533e: 881a ldrh r2, [r3, #0]
|
||
8005340: 88fb ldrh r3, [r7, #6]
|
||
8005342: 4413 add r3, r2
|
||
8005344: b29a uxth r2, r3
|
||
8005346: 4b1e ldr r3, [pc, #120] ; (80053c0 <max30102_read_fifo+0xf8>)
|
||
8005348: 801a strh r2, [r3, #0]
|
||
|
||
un_temp=ach_i2c_data[3];
|
||
800534a: 78fb ldrb r3, [r7, #3]
|
||
800534c: 80fb strh r3, [r7, #6]
|
||
un_temp<<=14;
|
||
800534e: 88fb ldrh r3, [r7, #6]
|
||
8005350: 039b lsls r3, r3, #14
|
||
8005352: 80fb strh r3, [r7, #6]
|
||
fifo_ir+=un_temp;
|
||
8005354: 4b1b ldr r3, [pc, #108] ; (80053c4 <max30102_read_fifo+0xfc>)
|
||
8005356: 881a ldrh r2, [r3, #0]
|
||
8005358: 88fb ldrh r3, [r7, #6]
|
||
800535a: 4413 add r3, r2
|
||
800535c: b29a uxth r2, r3
|
||
800535e: 4b19 ldr r3, [pc, #100] ; (80053c4 <max30102_read_fifo+0xfc>)
|
||
8005360: 801a strh r2, [r3, #0]
|
||
un_temp=ach_i2c_data[4];
|
||
8005362: 793b ldrb r3, [r7, #4]
|
||
8005364: 80fb strh r3, [r7, #6]
|
||
un_temp<<=6;
|
||
8005366: 88fb ldrh r3, [r7, #6]
|
||
8005368: 019b lsls r3, r3, #6
|
||
800536a: 80fb strh r3, [r7, #6]
|
||
fifo_ir+=un_temp;
|
||
800536c: 4b15 ldr r3, [pc, #84] ; (80053c4 <max30102_read_fifo+0xfc>)
|
||
800536e: 881a ldrh r2, [r3, #0]
|
||
8005370: 88fb ldrh r3, [r7, #6]
|
||
8005372: 4413 add r3, r2
|
||
8005374: b29a uxth r2, r3
|
||
8005376: 4b13 ldr r3, [pc, #76] ; (80053c4 <max30102_read_fifo+0xfc>)
|
||
8005378: 801a strh r2, [r3, #0]
|
||
un_temp=ach_i2c_data[5];
|
||
800537a: 797b ldrb r3, [r7, #5]
|
||
800537c: 80fb strh r3, [r7, #6]
|
||
un_temp>>=2;
|
||
800537e: 88fb ldrh r3, [r7, #6]
|
||
8005380: 089b lsrs r3, r3, #2
|
||
8005382: 80fb strh r3, [r7, #6]
|
||
fifo_ir+=un_temp;
|
||
8005384: 4b0f ldr r3, [pc, #60] ; (80053c4 <max30102_read_fifo+0xfc>)
|
||
8005386: 881a ldrh r2, [r3, #0]
|
||
8005388: 88fb ldrh r3, [r7, #6]
|
||
800538a: 4413 add r3, r2
|
||
800538c: b29a uxth r2, r3
|
||
800538e: 4b0d ldr r3, [pc, #52] ; (80053c4 <max30102_read_fifo+0xfc>)
|
||
8005390: 801a strh r2, [r3, #0]
|
||
|
||
if(fifo_ir<=10000)
|
||
8005392: 4b0c ldr r3, [pc, #48] ; (80053c4 <max30102_read_fifo+0xfc>)
|
||
8005394: 881b ldrh r3, [r3, #0]
|
||
8005396: f242 7210 movw r2, #10000 ; 0x2710
|
||
800539a: 4293 cmp r3, r2
|
||
800539c: d802 bhi.n 80053a4 <max30102_read_fifo+0xdc>
|
||
{
|
||
fifo_ir=0;
|
||
800539e: 4b09 ldr r3, [pc, #36] ; (80053c4 <max30102_read_fifo+0xfc>)
|
||
80053a0: 2200 movs r2, #0
|
||
80053a2: 801a strh r2, [r3, #0]
|
||
}
|
||
if(fifo_red<=10000)
|
||
80053a4: 4b06 ldr r3, [pc, #24] ; (80053c0 <max30102_read_fifo+0xf8>)
|
||
80053a6: 881b ldrh r3, [r3, #0]
|
||
80053a8: f242 7210 movw r2, #10000 ; 0x2710
|
||
80053ac: 4293 cmp r3, r2
|
||
80053ae: d802 bhi.n 80053b6 <max30102_read_fifo+0xee>
|
||
{
|
||
fifo_red=0;
|
||
80053b0: 4b03 ldr r3, [pc, #12] ; (80053c0 <max30102_read_fifo+0xf8>)
|
||
80053b2: 2200 movs r2, #0
|
||
80053b4: 801a strh r2, [r3, #0]
|
||
}
|
||
|
||
}
|
||
80053b6: bf00 nop
|
||
80053b8: 3708 adds r7, #8
|
||
80053ba: 46bd mov sp, r7
|
||
80053bc: bd80 pop {r7, pc}
|
||
80053be: bf00 nop
|
||
80053c0: 20000338 .word 0x20000338
|
||
80053c4: 20000330 .word 0x20000330
|
||
|
||
080053c8 <APP_blood_init>:
|
||
|
||
void APP_blood_init(window *a_window)
|
||
{
|
||
80053c8: b580 push {r7, lr}
|
||
80053ca: b082 sub sp, #8
|
||
80053cc: af00 add r7, sp, #0
|
||
80053ce: 6078 str r0, [r7, #4]
|
||
blood_win=a_window;
|
||
80053d0: 4a05 ldr r2, [pc, #20] ; (80053e8 <APP_blood_init+0x20>)
|
||
80053d2: 687b ldr r3, [r7, #4]
|
||
80053d4: 6013 str r3, [r2, #0]
|
||
Max30102_reset();
|
||
80053d6: f7ff ff0f bl 80051f8 <Max30102_reset>
|
||
MAX30102_Config();
|
||
80053da: f7ff ff1d bl 8005218 <MAX30102_Config>
|
||
|
||
//HAL_GPIO_WritePin(MAX_RD_GPIO_Port, MAX_RD_Pin, 0);
|
||
}
|
||
80053de: bf00 nop
|
||
80053e0: 3708 adds r7, #8
|
||
80053e2: 46bd mov sp, r7
|
||
80053e4: bd80 pop {r7, pc}
|
||
80053e6: bf00 nop
|
||
80053e8: 20000334 .word 0x20000334
|
||
|
||
080053ec <APP_blood_loop>:
|
||
|
||
void APP_blood_loop()
|
||
{
|
||
80053ec: b580 push {r7, lr}
|
||
80053ee: b082 sub sp, #8
|
||
80053f0: af02 add r7, sp, #8
|
||
max30102_read_fifo();
|
||
80053f2: f7ff ff69 bl 80052c8 <max30102_read_fifo>
|
||
sprintf(blood_str,"fifo_red:%d",fifo_red);
|
||
80053f6: 4b29 ldr r3, [pc, #164] ; (800549c <APP_blood_loop+0xb0>)
|
||
80053f8: 881b ldrh r3, [r3, #0]
|
||
80053fa: 461a mov r2, r3
|
||
80053fc: 4928 ldr r1, [pc, #160] ; (80054a0 <APP_blood_loop+0xb4>)
|
||
80053fe: 4829 ldr r0, [pc, #164] ; (80054a4 <APP_blood_loop+0xb8>)
|
||
8005400: f001 f8e4 bl 80065cc <siprintf>
|
||
LCD_ShowString(blood_win->x, blood_win->y+16, &blood_str, 16, WHITE, RED);
|
||
8005404: 4b28 ldr r3, [pc, #160] ; (80054a8 <APP_blood_loop+0xbc>)
|
||
8005406: 681b ldr r3, [r3, #0]
|
||
8005408: 8818 ldrh r0, [r3, #0]
|
||
800540a: 4b27 ldr r3, [pc, #156] ; (80054a8 <APP_blood_loop+0xbc>)
|
||
800540c: 681b ldr r3, [r3, #0]
|
||
800540e: 885b ldrh r3, [r3, #2]
|
||
8005410: 3310 adds r3, #16
|
||
8005412: b299 uxth r1, r3
|
||
8005414: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8005418: 9301 str r3, [sp, #4]
|
||
800541a: f64f 73ff movw r3, #65535 ; 0xffff
|
||
800541e: 9300 str r3, [sp, #0]
|
||
8005420: 2310 movs r3, #16
|
||
8005422: 4a20 ldr r2, [pc, #128] ; (80054a4 <APP_blood_loop+0xb8>)
|
||
8005424: f7ff f87a bl 800451c <LCD_ShowString>
|
||
sprintf(blood_str,"fifo_ir:%d",fifo_ir);
|
||
8005428: 4b20 ldr r3, [pc, #128] ; (80054ac <APP_blood_loop+0xc0>)
|
||
800542a: 881b ldrh r3, [r3, #0]
|
||
800542c: 461a mov r2, r3
|
||
800542e: 4920 ldr r1, [pc, #128] ; (80054b0 <APP_blood_loop+0xc4>)
|
||
8005430: 481c ldr r0, [pc, #112] ; (80054a4 <APP_blood_loop+0xb8>)
|
||
8005432: f001 f8cb bl 80065cc <siprintf>
|
||
LCD_ShowString(blood_win->x, blood_win->y+32, &blood_str, 16, WHITE, RED);
|
||
8005436: 4b1c ldr r3, [pc, #112] ; (80054a8 <APP_blood_loop+0xbc>)
|
||
8005438: 681b ldr r3, [r3, #0]
|
||
800543a: 8818 ldrh r0, [r3, #0]
|
||
800543c: 4b1a ldr r3, [pc, #104] ; (80054a8 <APP_blood_loop+0xbc>)
|
||
800543e: 681b ldr r3, [r3, #0]
|
||
8005440: 885b ldrh r3, [r3, #2]
|
||
8005442: 3320 adds r3, #32
|
||
8005444: b299 uxth r1, r3
|
||
8005446: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
800544a: 9301 str r3, [sp, #4]
|
||
800544c: f64f 73ff movw r3, #65535 ; 0xffff
|
||
8005450: 9300 str r3, [sp, #0]
|
||
8005452: 2310 movs r3, #16
|
||
8005454: 4a13 ldr r2, [pc, #76] ; (80054a4 <APP_blood_loop+0xb8>)
|
||
8005456: f7ff f861 bl 800451c <LCD_ShowString>
|
||
sprintf(blood_str,"INT:%d",HAL_GPIO_ReadPin(MAX_INT_GPIO_Port, MAX_INT_Pin));
|
||
800545a: f44f 5100 mov.w r1, #8192 ; 0x2000
|
||
800545e: 4815 ldr r0, [pc, #84] ; (80054b4 <APP_blood_loop+0xc8>)
|
||
8005460: f7fc fce2 bl 8001e28 <HAL_GPIO_ReadPin>
|
||
8005464: 4603 mov r3, r0
|
||
8005466: 461a mov r2, r3
|
||
8005468: 4913 ldr r1, [pc, #76] ; (80054b8 <APP_blood_loop+0xcc>)
|
||
800546a: 480e ldr r0, [pc, #56] ; (80054a4 <APP_blood_loop+0xb8>)
|
||
800546c: f001 f8ae bl 80065cc <siprintf>
|
||
LCD_ShowString(blood_win->x, blood_win->y+48, &blood_str, 16, WHITE, RED);
|
||
8005470: 4b0d ldr r3, [pc, #52] ; (80054a8 <APP_blood_loop+0xbc>)
|
||
8005472: 681b ldr r3, [r3, #0]
|
||
8005474: 8818 ldrh r0, [r3, #0]
|
||
8005476: 4b0c ldr r3, [pc, #48] ; (80054a8 <APP_blood_loop+0xbc>)
|
||
8005478: 681b ldr r3, [r3, #0]
|
||
800547a: 885b ldrh r3, [r3, #2]
|
||
800547c: 3330 adds r3, #48 ; 0x30
|
||
800547e: b299 uxth r1, r3
|
||
8005480: f44f 4378 mov.w r3, #63488 ; 0xf800
|
||
8005484: 9301 str r3, [sp, #4]
|
||
8005486: f64f 73ff movw r3, #65535 ; 0xffff
|
||
800548a: 9300 str r3, [sp, #0]
|
||
800548c: 2310 movs r3, #16
|
||
800548e: 4a05 ldr r2, [pc, #20] ; (80054a4 <APP_blood_loop+0xb8>)
|
||
8005490: f7ff f844 bl 800451c <LCD_ShowString>
|
||
|
||
|
||
}
|
||
8005494: bf00 nop
|
||
8005496: 46bd mov sp, r7
|
||
8005498: bd80 pop {r7, pc}
|
||
800549a: bf00 nop
|
||
800549c: 20000338 .word 0x20000338
|
||
80054a0: 080089a0 .word 0x080089a0
|
||
80054a4: 200002f0 .word 0x200002f0
|
||
80054a8: 20000334 .word 0x20000334
|
||
80054ac: 20000330 .word 0x20000330
|
||
80054b0: 080089ac .word 0x080089ac
|
||
80054b4: 40010c00 .word 0x40010c00
|
||
80054b8: 080089b8 .word 0x080089b8
|
||
|
||
080054bc <main_app>:
|
||
extern touch_device t0;
|
||
|
||
task run_loop;//��ѭ��״̬��
|
||
|
||
void main_app()
|
||
{
|
||
80054bc: b580 push {r7, lr}
|
||
80054be: b096 sub sp, #88 ; 0x58
|
||
80054c0: af04 add r7, sp, #16
|
||
char str[64];
|
||
LCDx_Init();
|
||
80054c2: f7fe fc87 bl 8003dd4 <LCDx_Init>
|
||
EPPROM_SLOWWRITE_INIT();
|
||
80054c6: f7ff f867 bl 8004598 <EPPROM_SLOWWRITE_INIT>
|
||
|
||
TP_adjustment();
|
||
80054ca: f7ff fbcb bl 8004c64 <TP_adjustment>
|
||
|
||
|
||
UI *ui=UI_Init(BLACK);
|
||
80054ce: 2000 movs r0, #0
|
||
80054d0: f000 f850 bl 8005574 <UI_Init>
|
||
80054d4: 6478 str r0, [r7, #68] ; 0x44
|
||
|
||
APP_blood_init(New_Window(ui,10,10,128,128,WHITE,"MAX30102"));
|
||
80054d6: 4b11 ldr r3, [pc, #68] ; (800551c <main_app+0x60>)
|
||
80054d8: 9302 str r3, [sp, #8]
|
||
80054da: f64f 73ff movw r3, #65535 ; 0xffff
|
||
80054de: 9301 str r3, [sp, #4]
|
||
80054e0: 2380 movs r3, #128 ; 0x80
|
||
80054e2: 9300 str r3, [sp, #0]
|
||
80054e4: 2380 movs r3, #128 ; 0x80
|
||
80054e6: 220a movs r2, #10
|
||
80054e8: 210a movs r1, #10
|
||
80054ea: 6c78 ldr r0, [r7, #68] ; 0x44
|
||
80054ec: f000 f875 bl 80055da <New_Window>
|
||
80054f0: 4603 mov r3, r0
|
||
80054f2: 4618 mov r0, r3
|
||
80054f4: f7ff ff68 bl 80053c8 <APP_blood_init>
|
||
|
||
//New_Window(ui,25,30,150,100,GREEN,"GREEN");
|
||
//New_Window(ui,80,80,60,90,YELLOW,"YELLOW");
|
||
//New_Window(ui,120,90,70,60,MAGENTA,"MAGENTA");
|
||
|
||
ui->refresh_ui_flag=1;
|
||
80054f8: 6c7a ldr r2, [r7, #68] ; 0x44
|
||
80054fa: f892 3020 ldrb.w r3, [r2, #32]
|
||
80054fe: f043 0304 orr.w r3, r3, #4
|
||
8005502: f882 3020 strb.w r3, [r2, #32]
|
||
|
||
|
||
}
|
||
|
||
*/
|
||
APP_blood_loop();
|
||
8005506: f7ff ff71 bl 80053ec <APP_blood_loop>
|
||
|
||
UI_Server(ui);
|
||
800550a: 6c78 ldr r0, [r7, #68] ; 0x44
|
||
800550c: f000 fa0c bl 8005928 <UI_Server>
|
||
TP_Server();
|
||
8005510: f7ff fad4 bl 8004abc <TP_Server>
|
||
EEPROM_SLOWWRITE_SERVER();
|
||
8005514: f7ff f85a bl 80045cc <EEPROM_SLOWWRITE_SERVER>
|
||
{
|
||
8005518: e7f5 b.n 8005506 <main_app+0x4a>
|
||
800551a: bf00 nop
|
||
800551c: 080089c0 .word 0x080089c0
|
||
|
||
08005520 <Inteface_SetCursor>:
|
||
#include "touch.h"
|
||
extern touch_device t0;
|
||
//�ӿ�
|
||
//��������������
|
||
void Inteface_SetCursor(uint16_t Xpos, uint16_t Ypos)
|
||
{
|
||
8005520: b580 push {r7, lr}
|
||
8005522: b082 sub sp, #8
|
||
8005524: af00 add r7, sp, #0
|
||
8005526: 4603 mov r3, r0
|
||
8005528: 460a mov r2, r1
|
||
800552a: 80fb strh r3, [r7, #6]
|
||
800552c: 4613 mov r3, r2
|
||
800552e: 80bb strh r3, [r7, #4]
|
||
LCD_SetCursor(Xpos,Ypos); //���ù���λ��
|
||
8005530: 88ba ldrh r2, [r7, #4]
|
||
8005532: 88fb ldrh r3, [r7, #6]
|
||
8005534: 4611 mov r1, r2
|
||
8005536: 4618 mov r0, r3
|
||
8005538: f7fe fd42 bl 8003fc0 <LCD_SetCursor>
|
||
LCD_REG_ADDRESS=lcddev.wramcmd; //��ʼд��GRAM
|
||
800553c: 4b04 ldr r3, [pc, #16] ; (8005550 <Inteface_SetCursor+0x30>)
|
||
800553e: 79da ldrb r2, [r3, #7]
|
||
8005540: f04f 43d8 mov.w r3, #1811939328 ; 0x6c000000
|
||
8005544: b292 uxth r2, r2
|
||
8005546: 801a strh r2, [r3, #0]
|
||
}
|
||
8005548: bf00 nop
|
||
800554a: 3708 adds r7, #8
|
||
800554c: 46bd mov sp, r7
|
||
800554e: bd80 pop {r7, pc}
|
||
8005550: 200002a8 .word 0x200002a8
|
||
|
||
08005554 <Inteface_SetColor>:
|
||
//����������д��һ����ɫ
|
||
void Inteface_SetColor(uint16_t color)
|
||
{
|
||
8005554: b480 push {r7}
|
||
8005556: b083 sub sp, #12
|
||
8005558: af00 add r7, sp, #0
|
||
800555a: 4603 mov r3, r0
|
||
800555c: 80fb strh r3, [r7, #6]
|
||
LCD_DATA_ADDRESS=color;
|
||
800555e: 4a04 ldr r2, [pc, #16] ; (8005570 <Inteface_SetColor+0x1c>)
|
||
8005560: 88fb ldrh r3, [r7, #6]
|
||
8005562: 8013 strh r3, [r2, #0]
|
||
}
|
||
8005564: bf00 nop
|
||
8005566: 370c adds r7, #12
|
||
8005568: 46bd mov sp, r7
|
||
800556a: bc80 pop {r7}
|
||
800556c: 4770 bx lr
|
||
800556e: bf00 nop
|
||
8005570: 6c000800 .word 0x6c000800
|
||
|
||
08005574 <UI_Init>:
|
||
//�½�һ��UI����
|
||
//��ʱ���뷨������windows�Ķ����棬ÿ�����涼����n������
|
||
UI *UI_Init(COLOR_16 background)
|
||
{
|
||
8005574: b580 push {r7, lr}
|
||
8005576: b084 sub sp, #16
|
||
8005578: af00 add r7, sp, #0
|
||
800557a: 6078 str r0, [r7, #4]
|
||
UI *ui;
|
||
ui = (UI*)malloc(sizeof(UI));
|
||
800557c: 2024 movs r0, #36 ; 0x24
|
||
800557e: f000 faf7 bl 8005b70 <malloc>
|
||
8005582: 4603 mov r3, r0
|
||
8005584: 60fb str r3, [r7, #12]
|
||
if(ui!=NULL)
|
||
8005586: 68fb ldr r3, [r7, #12]
|
||
8005588: 2b00 cmp r3, #0
|
||
800558a: d021 beq.n 80055d0 <UI_Init+0x5c>
|
||
{
|
||
ui->x=0;
|
||
800558c: 68fb ldr r3, [r7, #12]
|
||
800558e: 2200 movs r2, #0
|
||
8005590: 809a strh r2, [r3, #4]
|
||
ui->y=0;
|
||
8005592: 68fb ldr r3, [r7, #12]
|
||
8005594: 2200 movs r2, #0
|
||
8005596: 80da strh r2, [r3, #6]
|
||
ui->high=240;
|
||
8005598: 68fb ldr r3, [r7, #12]
|
||
800559a: 22f0 movs r2, #240 ; 0xf0
|
||
800559c: 815a strh r2, [r3, #10]
|
||
ui->width=320;
|
||
800559e: 68fb ldr r3, [r7, #12]
|
||
80055a0: f44f 72a0 mov.w r2, #320 ; 0x140
|
||
80055a4: 811a strh r2, [r3, #8]
|
||
ui->background=background;
|
||
80055a6: 68fb ldr r3, [r7, #12]
|
||
80055a8: 687a ldr r2, [r7, #4]
|
||
80055aa: 601a str r2, [r3, #0]
|
||
ui->windows=NULL;
|
||
80055ac: 68fb ldr r3, [r7, #12]
|
||
80055ae: 2200 movs r2, #0
|
||
80055b0: 60da str r2, [r3, #12]
|
||
ui->last_windows=NULL;
|
||
80055b2: 68fb ldr r3, [r7, #12]
|
||
80055b4: 2200 movs r2, #0
|
||
80055b6: 611a str r2, [r3, #16]
|
||
ui->refresh_ui_flag=1;
|
||
80055b8: 68fa ldr r2, [r7, #12]
|
||
80055ba: f892 3020 ldrb.w r3, [r2, #32]
|
||
80055be: f043 0304 orr.w r3, r3, #4
|
||
80055c2: f882 3020 strb.w r3, [r2, #32]
|
||
ui->moveed_windwos=NULL;
|
||
80055c6: 68fb ldr r3, [r7, #12]
|
||
80055c8: 2200 movs r2, #0
|
||
80055ca: 615a str r2, [r3, #20]
|
||
ui->touch->acc_y=0;
|
||
|
||
}
|
||
*/
|
||
|
||
return ui;
|
||
80055cc: 68fb ldr r3, [r7, #12]
|
||
80055ce: e000 b.n 80055d2 <UI_Init+0x5e>
|
||
}
|
||
return NULL;
|
||
80055d0: 2300 movs r3, #0
|
||
|
||
}
|
||
80055d2: 4618 mov r0, r3
|
||
80055d4: 3710 adds r7, #16
|
||
80055d6: 46bd mov sp, r7
|
||
80055d8: bd80 pop {r7, pc}
|
||
|
||
080055da <New_Window>:
|
||
//�½�һ������
|
||
//���ش��ڵ�ָ��
|
||
//�����ڹ��ص�ij��ui
|
||
window *New_Window(UI *ui,uint16_t x,uint16_t y,uint16_t width,uint16_t high,COLOR_16 background,const char *title)
|
||
{
|
||
80055da: b580 push {r7, lr}
|
||
80055dc: b088 sub sp, #32
|
||
80055de: af00 add r7, sp, #0
|
||
80055e0: 60f8 str r0, [r7, #12]
|
||
80055e2: 4608 mov r0, r1
|
||
80055e4: 4611 mov r1, r2
|
||
80055e6: 461a mov r2, r3
|
||
80055e8: 4603 mov r3, r0
|
||
80055ea: 817b strh r3, [r7, #10]
|
||
80055ec: 460b mov r3, r1
|
||
80055ee: 813b strh r3, [r7, #8]
|
||
80055f0: 4613 mov r3, r2
|
||
80055f2: 80fb strh r3, [r7, #6]
|
||
window *temp_window;
|
||
temp_window = (window*)malloc(sizeof(window));
|
||
80055f4: 201c movs r0, #28
|
||
80055f6: f000 fabb bl 8005b70 <malloc>
|
||
80055fa: 4603 mov r3, r0
|
||
80055fc: 617b str r3, [r7, #20]
|
||
if(temp_window!=NULL)
|
||
80055fe: 697b ldr r3, [r7, #20]
|
||
8005600: 2b00 cmp r3, #0
|
||
8005602: d022 beq.n 800564a <New_Window+0x70>
|
||
{
|
||
temp_window->background=background;
|
||
8005604: 697b ldr r3, [r7, #20]
|
||
8005606: 6afa ldr r2, [r7, #44] ; 0x2c
|
||
8005608: 609a str r2, [r3, #8]
|
||
temp_window->high=high;
|
||
800560a: 697b ldr r3, [r7, #20]
|
||
800560c: 8d3a ldrh r2, [r7, #40] ; 0x28
|
||
800560e: 80da strh r2, [r3, #6]
|
||
temp_window->width=width;
|
||
8005610: 697b ldr r3, [r7, #20]
|
||
8005612: 88fa ldrh r2, [r7, #6]
|
||
8005614: 809a strh r2, [r3, #4]
|
||
temp_window->x=x;
|
||
8005616: 697b ldr r3, [r7, #20]
|
||
8005618: 897a ldrh r2, [r7, #10]
|
||
800561a: 801a strh r2, [r3, #0]
|
||
temp_window->y=y;
|
||
800561c: 697b ldr r3, [r7, #20]
|
||
800561e: 893a ldrh r2, [r7, #8]
|
||
8005620: 805a strh r2, [r3, #2]
|
||
for(int a=0;a<16;a++)
|
||
8005622: 2300 movs r3, #0
|
||
8005624: 61fb str r3, [r7, #28]
|
||
8005626: e00c b.n 8005642 <New_Window+0x68>
|
||
{
|
||
temp_window->title[a]=title[a];
|
||
8005628: 69fb ldr r3, [r7, #28]
|
||
800562a: 6b3a ldr r2, [r7, #48] ; 0x30
|
||
800562c: 4413 add r3, r2
|
||
800562e: 7819 ldrb r1, [r3, #0]
|
||
8005630: 697a ldr r2, [r7, #20]
|
||
8005632: 69fb ldr r3, [r7, #28]
|
||
8005634: 4413 add r3, r2
|
||
8005636: 330c adds r3, #12
|
||
8005638: 460a mov r2, r1
|
||
800563a: 701a strb r2, [r3, #0]
|
||
for(int a=0;a<16;a++)
|
||
800563c: 69fb ldr r3, [r7, #28]
|
||
800563e: 3301 adds r3, #1
|
||
8005640: 61fb str r3, [r7, #28]
|
||
8005642: 69fb ldr r3, [r7, #28]
|
||
8005644: 2b0f cmp r3, #15
|
||
8005646: ddef ble.n 8005628 <New_Window+0x4e>
|
||
8005648: e001 b.n 800564e <New_Window+0x74>
|
||
}
|
||
}else{return NULL;}
|
||
800564a: 2300 movs r3, #0
|
||
800564c: e02a b.n 80056a4 <New_Window+0xca>
|
||
|
||
windows_stack *temp_windows_stack;
|
||
temp_windows_stack=ui->last_windows;
|
||
800564e: 68fb ldr r3, [r7, #12]
|
||
8005650: 691b ldr r3, [r3, #16]
|
||
8005652: 61bb str r3, [r7, #24]
|
||
if(temp_windows_stack==NULL)
|
||
8005654: 69bb ldr r3, [r7, #24]
|
||
8005656: 2b00 cmp r3, #0
|
||
8005658: d10b bne.n 8005672 <New_Window+0x98>
|
||
{
|
||
temp_windows_stack=(windows_stack*)malloc(sizeof(windows_stack));
|
||
800565a: 200c movs r0, #12
|
||
800565c: f000 fa88 bl 8005b70 <malloc>
|
||
8005660: 4603 mov r3, r0
|
||
8005662: 61bb str r3, [r7, #24]
|
||
temp_windows_stack->up=NULL;
|
||
8005664: 69bb ldr r3, [r7, #24]
|
||
8005666: 2200 movs r2, #0
|
||
8005668: 601a str r2, [r3, #0]
|
||
ui->windows=temp_windows_stack;
|
||
800566a: 68fb ldr r3, [r7, #12]
|
||
800566c: 69ba ldr r2, [r7, #24]
|
||
800566e: 60da str r2, [r3, #12]
|
||
8005670: e00e b.n 8005690 <New_Window+0xb6>
|
||
while(temp_windows_stack->next!=NULL)
|
||
{
|
||
temp_windows_stack=temp_windows_stack->next;
|
||
}
|
||
*/
|
||
windows_stack *up=temp_windows_stack;//���ݵ�ǰ����ָ��
|
||
8005672: 69bb ldr r3, [r7, #24]
|
||
8005674: 613b str r3, [r7, #16]
|
||
temp_windows_stack->next=(windows_stack*)malloc(sizeof(windows_stack));
|
||
8005676: 200c movs r0, #12
|
||
8005678: f000 fa7a bl 8005b70 <malloc>
|
||
800567c: 4603 mov r3, r0
|
||
800567e: 461a mov r2, r3
|
||
8005680: 69bb ldr r3, [r7, #24]
|
||
8005682: 609a str r2, [r3, #8]
|
||
temp_windows_stack=temp_windows_stack->next;
|
||
8005684: 69bb ldr r3, [r7, #24]
|
||
8005686: 689b ldr r3, [r3, #8]
|
||
8005688: 61bb str r3, [r7, #24]
|
||
temp_windows_stack->up=up;
|
||
800568a: 69bb ldr r3, [r7, #24]
|
||
800568c: 693a ldr r2, [r7, #16]
|
||
800568e: 601a str r2, [r3, #0]
|
||
}
|
||
temp_windows_stack->next=NULL;
|
||
8005690: 69bb ldr r3, [r7, #24]
|
||
8005692: 2200 movs r2, #0
|
||
8005694: 609a str r2, [r3, #8]
|
||
temp_windows_stack->window=temp_window;
|
||
8005696: 69bb ldr r3, [r7, #24]
|
||
8005698: 697a ldr r2, [r7, #20]
|
||
800569a: 605a str r2, [r3, #4]
|
||
|
||
ui->last_windows=temp_windows_stack;
|
||
800569c: 68fb ldr r3, [r7, #12]
|
||
800569e: 69ba ldr r2, [r7, #24]
|
||
80056a0: 611a str r2, [r3, #16]
|
||
|
||
return temp_window;
|
||
80056a2: 697b ldr r3, [r7, #20]
|
||
|
||
}
|
||
80056a4: 4618 mov r0, r3
|
||
80056a6: 3720 adds r7, #32
|
||
80056a8: 46bd mov sp, r7
|
||
80056aa: bd80 pop {r7, pc}
|
||
|
||
080056ac <Refresh_Window>:
|
||
temp_window->y=temp_window->y+acc_y;
|
||
}
|
||
|
||
//��ʾһ������
|
||
void Refresh_Window(UI *ui,window *temp_window)
|
||
{
|
||
80056ac: b580 push {r7, lr}
|
||
80056ae: b088 sub sp, #32
|
||
80056b0: af02 add r7, sp, #8
|
||
80056b2: 6078 str r0, [r7, #4]
|
||
80056b4: 6039 str r1, [r7, #0]
|
||
//��ʼ���ƴ���//���䴰�ڱ���
|
||
int x,y;
|
||
char z;
|
||
for(uint16_t temp_y=0;temp_y<temp_window->high;temp_y++)
|
||
80056b6: 2300 movs r3, #0
|
||
80056b8: 82bb strh r3, [r7, #20]
|
||
80056ba: e063 b.n 8005784 <Refresh_Window+0xd8>
|
||
{
|
||
z=1;
|
||
80056bc: 2301 movs r3, #1
|
||
80056be: 75fb strb r3, [r7, #23]
|
||
for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
|
||
80056c0: 2300 movs r3, #0
|
||
80056c2: 827b strh r3, [r7, #18]
|
||
80056c4: e056 b.n 8005774 <Refresh_Window+0xc8>
|
||
{
|
||
x=temp_window->x+temp_i;
|
||
80056c6: 683b ldr r3, [r7, #0]
|
||
80056c8: 881b ldrh r3, [r3, #0]
|
||
80056ca: 461a mov r2, r3
|
||
80056cc: 8a7b ldrh r3, [r7, #18]
|
||
80056ce: 4413 add r3, r2
|
||
80056d0: 60fb str r3, [r7, #12]
|
||
y=temp_window->y+temp_y;
|
||
80056d2: 683b ldr r3, [r7, #0]
|
||
80056d4: 885b ldrh r3, [r3, #2]
|
||
80056d6: 461a mov r2, r3
|
||
80056d8: 8abb ldrh r3, [r7, #20]
|
||
80056da: 4413 add r3, r2
|
||
80056dc: 60bb str r3, [r7, #8]
|
||
if(y>=ui->y&&z==1)
|
||
80056de: 687b ldr r3, [r7, #4]
|
||
80056e0: 88db ldrh r3, [r3, #6]
|
||
80056e2: 461a mov r2, r3
|
||
80056e4: 68bb ldr r3, [r7, #8]
|
||
80056e6: 4293 cmp r3, r2
|
||
80056e8: db0c blt.n 8005704 <Refresh_Window+0x58>
|
||
80056ea: 7dfb ldrb r3, [r7, #23]
|
||
80056ec: 2b01 cmp r3, #1
|
||
80056ee: d109 bne.n 8005704 <Refresh_Window+0x58>
|
||
{
|
||
Inteface_SetCursor(x,y);
|
||
80056f0: 68fb ldr r3, [r7, #12]
|
||
80056f2: b29b uxth r3, r3
|
||
80056f4: 68ba ldr r2, [r7, #8]
|
||
80056f6: b292 uxth r2, r2
|
||
80056f8: 4611 mov r1, r2
|
||
80056fa: 4618 mov r0, r3
|
||
80056fc: f7ff ff10 bl 8005520 <Inteface_SetCursor>
|
||
z=0;
|
||
8005700: 2300 movs r3, #0
|
||
8005702: 75fb strb r3, [r7, #23]
|
||
}
|
||
if(x>=ui->x)
|
||
8005704: 687b ldr r3, [r7, #4]
|
||
8005706: 889b ldrh r3, [r3, #4]
|
||
8005708: 461a mov r2, r3
|
||
800570a: 68fb ldr r3, [r7, #12]
|
||
800570c: 4293 cmp r3, r2
|
||
800570e: db2e blt.n 800576e <Refresh_Window+0xc2>
|
||
{
|
||
if(temp_y<16)
|
||
8005710: 8abb ldrh r3, [r7, #20]
|
||
8005712: 2b0f cmp r3, #15
|
||
8005714: d80f bhi.n 8005736 <Refresh_Window+0x8a>
|
||
{
|
||
if(temp_i>temp_window->width-16)
|
||
8005716: 683b ldr r3, [r7, #0]
|
||
8005718: 889b ldrh r3, [r3, #4]
|
||
800571a: f1a3 020f sub.w r2, r3, #15
|
||
800571e: 8a7b ldrh r3, [r7, #18]
|
||
8005720: 429a cmp r2, r3
|
||
8005722: dc04 bgt.n 800572e <Refresh_Window+0x82>
|
||
{
|
||
Inteface_SetColor(RED);
|
||
8005724: f44f 4078 mov.w r0, #63488 ; 0xf800
|
||
8005728: f7ff ff14 bl 8005554 <Inteface_SetColor>
|
||
800572c: e01f b.n 800576e <Refresh_Window+0xc2>
|
||
}else
|
||
{
|
||
Inteface_SetColor(BLUE);
|
||
800572e: 201f movs r0, #31
|
||
8005730: f7ff ff10 bl 8005554 <Inteface_SetColor>
|
||
8005734: e01b b.n 800576e <Refresh_Window+0xc2>
|
||
}
|
||
}else
|
||
{
|
||
if(temp_i==0||temp_y==0||temp_i==temp_window->width-1||temp_y==temp_window->high-1)
|
||
8005736: 8a7b ldrh r3, [r7, #18]
|
||
8005738: 2b00 cmp r3, #0
|
||
800573a: d00e beq.n 800575a <Refresh_Window+0xae>
|
||
800573c: 8abb ldrh r3, [r7, #20]
|
||
800573e: 2b00 cmp r3, #0
|
||
8005740: d00b beq.n 800575a <Refresh_Window+0xae>
|
||
8005742: 8a7a ldrh r2, [r7, #18]
|
||
8005744: 683b ldr r3, [r7, #0]
|
||
8005746: 889b ldrh r3, [r3, #4]
|
||
8005748: 3b01 subs r3, #1
|
||
800574a: 429a cmp r2, r3
|
||
800574c: d005 beq.n 800575a <Refresh_Window+0xae>
|
||
800574e: 8aba ldrh r2, [r7, #20]
|
||
8005750: 683b ldr r3, [r7, #0]
|
||
8005752: 88db ldrh r3, [r3, #6]
|
||
8005754: 3b01 subs r3, #1
|
||
8005756: 429a cmp r2, r3
|
||
8005758: d103 bne.n 8005762 <Refresh_Window+0xb6>
|
||
{
|
||
Inteface_SetColor(BLUE);
|
||
800575a: 201f movs r0, #31
|
||
800575c: f7ff fefa bl 8005554 <Inteface_SetColor>
|
||
8005760: e005 b.n 800576e <Refresh_Window+0xc2>
|
||
}else
|
||
{
|
||
Inteface_SetColor(temp_window->background);
|
||
8005762: 683b ldr r3, [r7, #0]
|
||
8005764: 689b ldr r3, [r3, #8]
|
||
8005766: b29b uxth r3, r3
|
||
8005768: 4618 mov r0, r3
|
||
800576a: f7ff fef3 bl 8005554 <Inteface_SetColor>
|
||
for(uint16_t temp_i=0;temp_i<temp_window->width;temp_i++)
|
||
800576e: 8a7b ldrh r3, [r7, #18]
|
||
8005770: 3301 adds r3, #1
|
||
8005772: 827b strh r3, [r7, #18]
|
||
8005774: 683b ldr r3, [r7, #0]
|
||
8005776: 889b ldrh r3, [r3, #4]
|
||
8005778: 8a7a ldrh r2, [r7, #18]
|
||
800577a: 429a cmp r2, r3
|
||
800577c: d3a3 bcc.n 80056c6 <Refresh_Window+0x1a>
|
||
for(uint16_t temp_y=0;temp_y<temp_window->high;temp_y++)
|
||
800577e: 8abb ldrh r3, [r7, #20]
|
||
8005780: 3301 adds r3, #1
|
||
8005782: 82bb strh r3, [r7, #20]
|
||
8005784: 683b ldr r3, [r7, #0]
|
||
8005786: 88db ldrh r3, [r3, #6]
|
||
8005788: 8aba ldrh r2, [r7, #20]
|
||
800578a: 429a cmp r2, r3
|
||
800578c: d396 bcc.n 80056bc <Refresh_Window+0x10>
|
||
|
||
}
|
||
}
|
||
*/
|
||
//��ʾtitle
|
||
LCD_ShowString(temp_window->x,temp_window->y,&temp_window->title,16,WHITE,WHITE);
|
||
800578e: 683b ldr r3, [r7, #0]
|
||
8005790: 8818 ldrh r0, [r3, #0]
|
||
8005792: 683b ldr r3, [r7, #0]
|
||
8005794: 8859 ldrh r1, [r3, #2]
|
||
8005796: 683b ldr r3, [r7, #0]
|
||
8005798: f103 020c add.w r2, r3, #12
|
||
800579c: f64f 73ff movw r3, #65535 ; 0xffff
|
||
80057a0: 9301 str r3, [sp, #4]
|
||
80057a2: f64f 73ff movw r3, #65535 ; 0xffff
|
||
80057a6: 9300 str r3, [sp, #0]
|
||
80057a8: 2310 movs r3, #16
|
||
80057aa: f7fe feb7 bl 800451c <LCD_ShowString>
|
||
|
||
}
|
||
80057ae: bf00 nop
|
||
80057b0: 3718 adds r7, #24
|
||
80057b2: 46bd mov sp, r7
|
||
80057b4: bd80 pop {r7, pc}
|
||
|
||
080057b6 <Refresh_UI>:
|
||
* �ܿ�ϧ ��������д�Ĵ���Ҫ������
|
||
* ���㷨ʵ���ڵ���ϵ������ͦ��
|
||
*
|
||
* */
|
||
void Refresh_UI(UI *ui)
|
||
{
|
||
80057b6: b580 push {r7, lr}
|
||
80057b8: b086 sub sp, #24
|
||
80057ba: af00 add r7, sp, #0
|
||
80057bc: 6078 str r0, [r7, #4]
|
||
int flag=0;
|
||
80057be: 2300 movs r3, #0
|
||
80057c0: 617b str r3, [r7, #20]
|
||
uint16_t dot_y=0,dot_x=0;
|
||
80057c2: 2300 movs r3, #0
|
||
80057c4: 827b strh r3, [r7, #18]
|
||
80057c6: 2300 movs r3, #0
|
||
80057c8: 823b strh r3, [r7, #16]
|
||
//������
|
||
for(dot_y=ui->y;dot_y<ui->high;dot_y++)
|
||
80057ca: 687b ldr r3, [r7, #4]
|
||
80057cc: 88db ldrh r3, [r3, #6]
|
||
80057ce: 827b strh r3, [r7, #18]
|
||
80057d0: e01a b.n 8005808 <Refresh_UI+0x52>
|
||
{
|
||
Inteface_SetCursor(dot_x,dot_y);
|
||
80057d2: 8a7a ldrh r2, [r7, #18]
|
||
80057d4: 8a3b ldrh r3, [r7, #16]
|
||
80057d6: 4611 mov r1, r2
|
||
80057d8: 4618 mov r0, r3
|
||
80057da: f7ff fea1 bl 8005520 <Inteface_SetCursor>
|
||
for(dot_x=ui->x;dot_x<ui->width;dot_x++)
|
||
80057de: 687b ldr r3, [r7, #4]
|
||
80057e0: 889b ldrh r3, [r3, #4]
|
||
80057e2: 823b strh r3, [r7, #16]
|
||
80057e4: e008 b.n 80057f8 <Refresh_UI+0x42>
|
||
{
|
||
Inteface_SetColor(ui->background);
|
||
80057e6: 687b ldr r3, [r7, #4]
|
||
80057e8: 681b ldr r3, [r3, #0]
|
||
80057ea: b29b uxth r3, r3
|
||
80057ec: 4618 mov r0, r3
|
||
80057ee: f7ff feb1 bl 8005554 <Inteface_SetColor>
|
||
for(dot_x=ui->x;dot_x<ui->width;dot_x++)
|
||
80057f2: 8a3b ldrh r3, [r7, #16]
|
||
80057f4: 3301 adds r3, #1
|
||
80057f6: 823b strh r3, [r7, #16]
|
||
80057f8: 687b ldr r3, [r7, #4]
|
||
80057fa: 891b ldrh r3, [r3, #8]
|
||
80057fc: 8a3a ldrh r2, [r7, #16]
|
||
80057fe: 429a cmp r2, r3
|
||
8005800: d3f1 bcc.n 80057e6 <Refresh_UI+0x30>
|
||
for(dot_y=ui->y;dot_y<ui->high;dot_y++)
|
||
8005802: 8a7b ldrh r3, [r7, #18]
|
||
8005804: 3301 adds r3, #1
|
||
8005806: 827b strh r3, [r7, #18]
|
||
8005808: 687b ldr r3, [r7, #4]
|
||
800580a: 895b ldrh r3, [r3, #10]
|
||
800580c: 8a7a ldrh r2, [r7, #18]
|
||
800580e: 429a cmp r2, r3
|
||
8005810: d3df bcc.n 80057d2 <Refresh_UI+0x1c>
|
||
}
|
||
|
||
}
|
||
windows_stack *temp_windows_stack,*temp_windows_stack2;
|
||
temp_windows_stack=ui->windows;
|
||
8005812: 687b ldr r3, [r7, #4]
|
||
8005814: 68db ldr r3, [r3, #12]
|
||
8005816: 60fb str r3, [r7, #12]
|
||
do
|
||
{
|
||
if(temp_windows_stack!=NULL)
|
||
8005818: 68fb ldr r3, [r7, #12]
|
||
800581a: 2b00 cmp r3, #0
|
||
800581c: d00b beq.n 8005836 <Refresh_UI+0x80>
|
||
{
|
||
flag=1;
|
||
800581e: 2301 movs r3, #1
|
||
8005820: 617b str r3, [r7, #20]
|
||
Refresh_Window(ui,temp_windows_stack->window);
|
||
8005822: 68fb ldr r3, [r7, #12]
|
||
8005824: 685b ldr r3, [r3, #4]
|
||
8005826: 4619 mov r1, r3
|
||
8005828: 6878 ldr r0, [r7, #4]
|
||
800582a: f7ff ff3f bl 80056ac <Refresh_Window>
|
||
//������һ������
|
||
temp_windows_stack=temp_windows_stack->next;
|
||
800582e: 68fb ldr r3, [r7, #12]
|
||
8005830: 689b ldr r3, [r3, #8]
|
||
8005832: 60fb str r3, [r7, #12]
|
||
8005834: e001 b.n 800583a <Refresh_UI+0x84>
|
||
}else
|
||
{
|
||
flag=0;
|
||
8005836: 2300 movs r3, #0
|
||
8005838: 617b str r3, [r7, #20]
|
||
}
|
||
|
||
}while(flag);
|
||
800583a: 697b ldr r3, [r7, #20]
|
||
800583c: 2b00 cmp r3, #0
|
||
800583e: d1eb bne.n 8005818 <Refresh_UI+0x62>
|
||
}
|
||
|
||
}
|
||
*/
|
||
|
||
}
|
||
8005840: bf00 nop
|
||
8005842: bf00 nop
|
||
8005844: 3718 adds r7, #24
|
||
8005846: 46bd mov sp, r7
|
||
8005848: bd80 pop {r7, pc}
|
||
|
||
0800584a <Chack>:
|
||
#define BODY 1
|
||
#define BAR 2
|
||
#define CLOSE 3
|
||
|
||
uint8_t Chack(window *this_window,int x,int y)
|
||
{
|
||
800584a: b480 push {r7}
|
||
800584c: b087 sub sp, #28
|
||
800584e: af00 add r7, sp, #0
|
||
8005850: 60f8 str r0, [r7, #12]
|
||
8005852: 60b9 str r1, [r7, #8]
|
||
8005854: 607a str r2, [r7, #4]
|
||
int a=0;
|
||
8005856: 2300 movs r3, #0
|
||
8005858: 617b str r3, [r7, #20]
|
||
|
||
if(((x>=this_window->x)&&(x<(this_window->x+this_window->width)))&&((y>=this_window->y+16)&&(y<(this_window->y+this_window->high))))
|
||
800585a: 68fb ldr r3, [r7, #12]
|
||
800585c: 881b ldrh r3, [r3, #0]
|
||
800585e: 461a mov r2, r3
|
||
8005860: 68bb ldr r3, [r7, #8]
|
||
8005862: 4293 cmp r3, r2
|
||
8005864: db19 blt.n 800589a <Chack+0x50>
|
||
8005866: 68fb ldr r3, [r7, #12]
|
||
8005868: 881b ldrh r3, [r3, #0]
|
||
800586a: 461a mov r2, r3
|
||
800586c: 68fb ldr r3, [r7, #12]
|
||
800586e: 889b ldrh r3, [r3, #4]
|
||
8005870: 4413 add r3, r2
|
||
8005872: 68ba ldr r2, [r7, #8]
|
||
8005874: 429a cmp r2, r3
|
||
8005876: da10 bge.n 800589a <Chack+0x50>
|
||
8005878: 68fb ldr r3, [r7, #12]
|
||
800587a: 885b ldrh r3, [r3, #2]
|
||
800587c: 330f adds r3, #15
|
||
800587e: 687a ldr r2, [r7, #4]
|
||
8005880: 429a cmp r2, r3
|
||
8005882: dd0a ble.n 800589a <Chack+0x50>
|
||
8005884: 68fb ldr r3, [r7, #12]
|
||
8005886: 885b ldrh r3, [r3, #2]
|
||
8005888: 461a mov r2, r3
|
||
800588a: 68fb ldr r3, [r7, #12]
|
||
800588c: 88db ldrh r3, [r3, #6]
|
||
800588e: 4413 add r3, r2
|
||
8005890: 687a ldr r2, [r7, #4]
|
||
8005892: 429a cmp r2, r3
|
||
8005894: da01 bge.n 800589a <Chack+0x50>
|
||
{
|
||
a=1;
|
||
8005896: 2301 movs r3, #1
|
||
8005898: 617b str r3, [r7, #20]
|
||
}
|
||
if(((x>=this_window->x)&&(x<(this_window->x+this_window->width-16)))&&((y>=this_window->y)&&(y<(this_window->y+16))))
|
||
800589a: 68fb ldr r3, [r7, #12]
|
||
800589c: 881b ldrh r3, [r3, #0]
|
||
800589e: 461a mov r2, r3
|
||
80058a0: 68bb ldr r3, [r7, #8]
|
||
80058a2: 4293 cmp r3, r2
|
||
80058a4: db17 blt.n 80058d6 <Chack+0x8c>
|
||
80058a6: 68fb ldr r3, [r7, #12]
|
||
80058a8: 881b ldrh r3, [r3, #0]
|
||
80058aa: 461a mov r2, r3
|
||
80058ac: 68fb ldr r3, [r7, #12]
|
||
80058ae: 889b ldrh r3, [r3, #4]
|
||
80058b0: 4413 add r3, r2
|
||
80058b2: 3b10 subs r3, #16
|
||
80058b4: 68ba ldr r2, [r7, #8]
|
||
80058b6: 429a cmp r2, r3
|
||
80058b8: da0d bge.n 80058d6 <Chack+0x8c>
|
||
80058ba: 68fb ldr r3, [r7, #12]
|
||
80058bc: 885b ldrh r3, [r3, #2]
|
||
80058be: 461a mov r2, r3
|
||
80058c0: 687b ldr r3, [r7, #4]
|
||
80058c2: 4293 cmp r3, r2
|
||
80058c4: db07 blt.n 80058d6 <Chack+0x8c>
|
||
80058c6: 68fb ldr r3, [r7, #12]
|
||
80058c8: 885b ldrh r3, [r3, #2]
|
||
80058ca: 330f adds r3, #15
|
||
80058cc: 687a ldr r2, [r7, #4]
|
||
80058ce: 429a cmp r2, r3
|
||
80058d0: dc01 bgt.n 80058d6 <Chack+0x8c>
|
||
{
|
||
a=2;
|
||
80058d2: 2302 movs r3, #2
|
||
80058d4: 617b str r3, [r7, #20]
|
||
}
|
||
if((x>=(this_window->x+this_window->width-16))&&(x<(this_window->x+this_window->width))&&((y>=this_window->y)&&(y<(this_window->y+16))))
|
||
80058d6: 68fb ldr r3, [r7, #12]
|
||
80058d8: 881b ldrh r3, [r3, #0]
|
||
80058da: 461a mov r2, r3
|
||
80058dc: 68fb ldr r3, [r7, #12]
|
||
80058de: 889b ldrh r3, [r3, #4]
|
||
80058e0: 4413 add r3, r2
|
||
80058e2: 3b10 subs r3, #16
|
||
80058e4: 68ba ldr r2, [r7, #8]
|
||
80058e6: 429a cmp r2, r3
|
||
80058e8: db16 blt.n 8005918 <Chack+0xce>
|
||
80058ea: 68fb ldr r3, [r7, #12]
|
||
80058ec: 881b ldrh r3, [r3, #0]
|
||
80058ee: 461a mov r2, r3
|
||
80058f0: 68fb ldr r3, [r7, #12]
|
||
80058f2: 889b ldrh r3, [r3, #4]
|
||
80058f4: 4413 add r3, r2
|
||
80058f6: 68ba ldr r2, [r7, #8]
|
||
80058f8: 429a cmp r2, r3
|
||
80058fa: da0d bge.n 8005918 <Chack+0xce>
|
||
80058fc: 68fb ldr r3, [r7, #12]
|
||
80058fe: 885b ldrh r3, [r3, #2]
|
||
8005900: 461a mov r2, r3
|
||
8005902: 687b ldr r3, [r7, #4]
|
||
8005904: 4293 cmp r3, r2
|
||
8005906: db07 blt.n 8005918 <Chack+0xce>
|
||
8005908: 68fb ldr r3, [r7, #12]
|
||
800590a: 885b ldrh r3, [r3, #2]
|
||
800590c: 330f adds r3, #15
|
||
800590e: 687a ldr r2, [r7, #4]
|
||
8005910: 429a cmp r2, r3
|
||
8005912: dc01 bgt.n 8005918 <Chack+0xce>
|
||
{
|
||
a=3;
|
||
8005914: 2303 movs r3, #3
|
||
8005916: 617b str r3, [r7, #20]
|
||
}
|
||
return a;
|
||
8005918: 697b ldr r3, [r7, #20]
|
||
800591a: b2db uxtb r3, r3
|
||
|
||
}
|
||
800591c: 4618 mov r0, r3
|
||
800591e: 371c adds r7, #28
|
||
8005920: 46bd mov sp, r7
|
||
8005922: bc80 pop {r7}
|
||
8005924: 4770 bx lr
|
||
...
|
||
|
||
08005928 <UI_Server>:
|
||
|
||
void UI_Server(UI *ui)
|
||
{
|
||
8005928: b580 push {r7, lr}
|
||
800592a: b088 sub sp, #32
|
||
800592c: af00 add r7, sp, #0
|
||
800592e: 6078 str r0, [r7, #4]
|
||
|
||
windows_stack *temp_windows_stack=NULL;
|
||
8005930: 2300 movs r3, #0
|
||
8005932: 61fb str r3, [r7, #28]
|
||
window *temp_window;
|
||
//touch_device *temp_touch=NULL;
|
||
int flag=0;
|
||
8005934: 2300 movs r3, #0
|
||
8005936: 61bb str r3, [r7, #24]
|
||
uint8_t hit_flag=0;
|
||
8005938: 2300 movs r3, #0
|
||
800593a: 75fb strb r3, [r7, #23]
|
||
|
||
int t_x,t_y;
|
||
//touch
|
||
//temp_touch=ui->touch;
|
||
if(t0.c)//TP_XY(&t_x, &t_y))
|
||
800593c: 4b76 ldr r3, [pc, #472] ; (8005b18 <UI_Server+0x1f0>)
|
||
800593e: 7b1b ldrb r3, [r3, #12]
|
||
8005940: f003 0302 and.w r3, r3, #2
|
||
8005944: b2db uxtb r3, r3
|
||
8005946: 2b00 cmp r3, #0
|
||
8005948: f000 80ba beq.w 8005ac0 <UI_Server+0x198>
|
||
{
|
||
if(t0.d)
|
||
800594c: 4b72 ldr r3, [pc, #456] ; (8005b18 <UI_Server+0x1f0>)
|
||
800594e: 7b1b ldrb r3, [r3, #12]
|
||
8005950: f003 0304 and.w r3, r3, #4
|
||
8005954: b2db uxtb r3, r3
|
||
8005956: 2b00 cmp r3, #0
|
||
8005958: f000 80c8 beq.w 8005aec <UI_Server+0x1c4>
|
||
{
|
||
t_x=t0.pix_x;
|
||
800595c: 4b6e ldr r3, [pc, #440] ; (8005b18 <UI_Server+0x1f0>)
|
||
800595e: 685b ldr r3, [r3, #4]
|
||
8005960: 613b str r3, [r7, #16]
|
||
t_y=t0.pix_y;
|
||
8005962: 4b6d ldr r3, [pc, #436] ; (8005b18 <UI_Server+0x1f0>)
|
||
8005964: 689b ldr r3, [r3, #8]
|
||
8005966: 60fb str r3, [r7, #12]
|
||
temp_window=NULL;
|
||
8005968: 2300 movs r3, #0
|
||
800596a: 60bb str r3, [r7, #8]
|
||
|
||
if(ui->moveed_windwos==NULL)
|
||
800596c: 687b ldr r3, [r7, #4]
|
||
800596e: 695b ldr r3, [r3, #20]
|
||
8005970: 2b00 cmp r3, #0
|
||
8005972: f040 8088 bne.w 8005a86 <UI_Server+0x15e>
|
||
{
|
||
if(ui->First_click_flag==0)
|
||
8005976: 687b ldr r3, [r7, #4]
|
||
8005978: f893 3020 ldrb.w r3, [r3, #32]
|
||
800597c: f003 0302 and.w r3, r3, #2
|
||
8005980: b2db uxtb r3, r3
|
||
8005982: 2b00 cmp r3, #0
|
||
8005984: f040 80b2 bne.w 8005aec <UI_Server+0x1c4>
|
||
{
|
||
ui->First_click_flag=1;
|
||
8005988: 687a ldr r2, [r7, #4]
|
||
800598a: f892 3020 ldrb.w r3, [r2, #32]
|
||
800598e: f043 0302 orr.w r3, r3, #2
|
||
8005992: f882 3020 strb.w r3, [r2, #32]
|
||
temp_windows_stack=ui->last_windows; //��ȡui����ǰ�˵Ĵ��� ��ǰ����ɨ��
|
||
8005996: 687b ldr r3, [r7, #4]
|
||
8005998: 691b ldr r3, [r3, #16]
|
||
800599a: 61fb str r3, [r7, #28]
|
||
do
|
||
{
|
||
if(temp_windows_stack!=NULL) //�����д��ھͿ�ʼɨ��
|
||
800599c: 69fb ldr r3, [r7, #28]
|
||
800599e: 2b00 cmp r3, #0
|
||
80059a0: d06b beq.n 8005a7a <UI_Server+0x152>
|
||
{
|
||
flag=1; //���鵽�д��� ��Ҫѭ��һ���Լ����Ƿ�����һ������
|
||
80059a2: 2301 movs r3, #1
|
||
80059a4: 61bb str r3, [r7, #24]
|
||
//
|
||
temp_window=temp_windows_stack->window; //ȡ����������
|
||
80059a6: 69fb ldr r3, [r7, #28]
|
||
80059a8: 685b ldr r3, [r3, #4]
|
||
80059aa: 60bb str r3, [r7, #8]
|
||
hit_flag=Chack(temp_window,t_x,t_y); //���鴥���Ƿ����� ֱ�ӷ������д��ڵ�λ��
|
||
80059ac: 68fa ldr r2, [r7, #12]
|
||
80059ae: 6939 ldr r1, [r7, #16]
|
||
80059b0: 68b8 ldr r0, [r7, #8]
|
||
80059b2: f7ff ff4a bl 800584a <Chack>
|
||
80059b6: 4603 mov r3, r0
|
||
80059b8: 75fb strb r3, [r7, #23]
|
||
if(hit_flag) // �����
|
||
80059ba: 7dfb ldrb r3, [r7, #23]
|
||
80059bc: 2b00 cmp r3, #0
|
||
80059be: d058 beq.n 8005a72 <UI_Server+0x14a>
|
||
{
|
||
if(temp_windows_stack!=ui->last_windows) //�����Ƿ���ǰ�˵Ĵ��� �������Ǿͷ���ǰ��
|
||
80059c0: 687b ldr r3, [r7, #4]
|
||
80059c2: 691b ldr r3, [r3, #16]
|
||
80059c4: 69fa ldr r2, [r7, #28]
|
||
80059c6: 429a cmp r2, r3
|
||
80059c8: d02c beq.n 8005a24 <UI_Server+0xfc>
|
||
{
|
||
if(temp_windows_stack!=ui->windows) //�����Ƿ������˵Ĵ��� ��Ϊ��ʾ�Ǵ���������ǰ��ʾ�� ����ui�������˴��ڵ�����
|
||
80059ca: 687b ldr r3, [r7, #4]
|
||
80059cc: 68db ldr r3, [r3, #12]
|
||
80059ce: 69fa ldr r2, [r7, #28]
|
||
80059d0: 429a cmp r2, r3
|
||
80059d2: d00a beq.n 80059ea <UI_Server+0xc2>
|
||
{
|
||
temp_windows_stack->up->next=temp_windows_stack->next; //ȡ�������ڵ� �ѽڵ������²�������
|
||
80059d4: 69fb ldr r3, [r7, #28]
|
||
80059d6: 681b ldr r3, [r3, #0]
|
||
80059d8: 69fa ldr r2, [r7, #28]
|
||
80059da: 6892 ldr r2, [r2, #8]
|
||
80059dc: 609a str r2, [r3, #8]
|
||
temp_windows_stack->next->up=temp_windows_stack->up;
|
||
80059de: 69fb ldr r3, [r7, #28]
|
||
80059e0: 689b ldr r3, [r3, #8]
|
||
80059e2: 69fa ldr r2, [r7, #28]
|
||
80059e4: 6812 ldr r2, [r2, #0]
|
||
80059e6: 601a str r2, [r3, #0]
|
||
80059e8: e007 b.n 80059fa <UI_Server+0xd2>
|
||
}else
|
||
{
|
||
ui->windows=temp_windows_stack->next; //�����������˵Ĵ��� ��ȡ�������ڵ������ھͱ���һ���ڵ���
|
||
80059ea: 69fb ldr r3, [r7, #28]
|
||
80059ec: 689a ldr r2, [r3, #8]
|
||
80059ee: 687b ldr r3, [r7, #4]
|
||
80059f0: 60da str r2, [r3, #12]
|
||
ui->windows->up=NULL; //�����ڶ��������� ���߾�û�� ����Ҫ����ָ��
|
||
80059f2: 687b ldr r3, [r7, #4]
|
||
80059f4: 68db ldr r3, [r3, #12]
|
||
80059f6: 2200 movs r2, #0
|
||
80059f8: 601a str r2, [r3, #0]
|
||
}
|
||
temp_windows_stack->next=NULL; //ȡ���Ľڵ�Ҫ������ǰ�� ���� ������ǰ ������ǰ��ָ��
|
||
80059fa: 69fb ldr r3, [r7, #28]
|
||
80059fc: 2200 movs r2, #0
|
||
80059fe: 609a str r2, [r3, #8]
|
||
temp_windows_stack->up=ui->last_windows; //��һ��ָ������ԭ��������һ��
|
||
8005a00: 687b ldr r3, [r7, #4]
|
||
8005a02: 691a ldr r2, [r3, #16]
|
||
8005a04: 69fb ldr r3, [r7, #28]
|
||
8005a06: 601a str r2, [r3, #0]
|
||
ui->last_windows->next=temp_windows_stack; //ԭ��������һ��ָ�����ڵ�����һ��
|
||
8005a08: 687b ldr r3, [r7, #4]
|
||
8005a0a: 691b ldr r3, [r3, #16]
|
||
8005a0c: 69fa ldr r2, [r7, #28]
|
||
8005a0e: 609a str r2, [r3, #8]
|
||
ui->last_windows=temp_windows_stack; //����ui�е�����һ��������
|
||
8005a10: 687b ldr r3, [r7, #4]
|
||
8005a12: 69fa ldr r2, [r7, #28]
|
||
8005a14: 611a str r2, [r3, #16]
|
||
ui->refresh_ui_flag=1; //�����˱仯 ˢ��ui����ʾ
|
||
8005a16: 687a ldr r2, [r7, #4]
|
||
8005a18: f892 3020 ldrb.w r3, [r2, #32]
|
||
8005a1c: f043 0304 orr.w r3, r3, #4
|
||
8005a20: f882 3020 strb.w r3, [r2, #32]
|
||
}
|
||
|
||
//�������д��ڵ�ʲôλ��
|
||
switch(hit_flag)
|
||
8005a24: 7dfb ldrb r3, [r7, #23]
|
||
8005a26: 2b03 cmp r3, #3
|
||
8005a28: d006 beq.n 8005a38 <UI_Server+0x110>
|
||
8005a2a: 2b03 cmp r3, #3
|
||
8005a2c: dc1f bgt.n 8005a6e <UI_Server+0x146>
|
||
8005a2e: 2b01 cmp r3, #1
|
||
8005a30: d01c beq.n 8005a6c <UI_Server+0x144>
|
||
8005a32: 2b02 cmp r3, #2
|
||
8005a34: d008 beq.n 8005a48 <UI_Server+0x120>
|
||
8005a36: e01a b.n 8005a6e <UI_Server+0x146>
|
||
{
|
||
case CLOSE:
|
||
//Close_Windows_Stack(ui,temp_windows_stack);
|
||
ui->refresh_ui_flag=1; //�����˱仯 ˢ��ui����ʾ
|
||
8005a38: 687a ldr r2, [r7, #4]
|
||
8005a3a: f892 3020 ldrb.w r3, [r2, #32]
|
||
8005a3e: f043 0304 orr.w r3, r3, #4
|
||
8005a42: f882 3020 strb.w r3, [r2, #32]
|
||
break;
|
||
8005a46: e012 b.n 8005a6e <UI_Server+0x146>
|
||
case BAR:
|
||
ui->moveed_windwos=temp_window;
|
||
8005a48: 687b ldr r3, [r7, #4]
|
||
8005a4a: 68ba ldr r2, [r7, #8]
|
||
8005a4c: 615a str r2, [r3, #20]
|
||
ui->move_x=t_x-temp_window->x;
|
||
8005a4e: 68bb ldr r3, [r7, #8]
|
||
8005a50: 881b ldrh r3, [r3, #0]
|
||
8005a52: 461a mov r2, r3
|
||
8005a54: 693b ldr r3, [r7, #16]
|
||
8005a56: 1a9a subs r2, r3, r2
|
||
8005a58: 687b ldr r3, [r7, #4]
|
||
8005a5a: 619a str r2, [r3, #24]
|
||
ui->move_y=t_y-temp_window->y;
|
||
8005a5c: 68bb ldr r3, [r7, #8]
|
||
8005a5e: 885b ldrh r3, [r3, #2]
|
||
8005a60: 461a mov r2, r3
|
||
8005a62: 68fb ldr r3, [r7, #12]
|
||
8005a64: 1a9a subs r2, r3, r2
|
||
8005a66: 687b ldr r3, [r7, #4]
|
||
8005a68: 61da str r2, [r3, #28]
|
||
|
||
break;
|
||
8005a6a: e000 b.n 8005a6e <UI_Server+0x146>
|
||
case BODY:
|
||
//ui->background=temp_windows_stack->window->background;
|
||
//ui->refresh_ui_flag=1;
|
||
break;
|
||
8005a6c: bf00 nop
|
||
}
|
||
|
||
|
||
flag=0; //����ɨ�� ��ֹ����ǰ����
|
||
8005a6e: 2300 movs r3, #0
|
||
8005a70: 61bb str r3, [r7, #24]
|
||
}
|
||
temp_windows_stack=temp_windows_stack->up; //��ǰɨ��
|
||
8005a72: 69fb ldr r3, [r7, #28]
|
||
8005a74: 681b ldr r3, [r3, #0]
|
||
8005a76: 61fb str r3, [r7, #28]
|
||
8005a78: e001 b.n 8005a7e <UI_Server+0x156>
|
||
}else
|
||
{
|
||
flag=0; //һ�����ڶ�û�� ֱ�ӽ���ѭ��
|
||
8005a7a: 2300 movs r3, #0
|
||
8005a7c: 61bb str r3, [r7, #24]
|
||
}
|
||
}while(flag);
|
||
8005a7e: 69bb ldr r3, [r7, #24]
|
||
8005a80: 2b00 cmp r3, #0
|
||
8005a82: d18b bne.n 800599c <UI_Server+0x74>
|
||
8005a84: e032 b.n 8005aec <UI_Server+0x1c4>
|
||
}
|
||
|
||
}else
|
||
{
|
||
temp_window=ui->moveed_windwos;
|
||
8005a86: 687b ldr r3, [r7, #4]
|
||
8005a88: 695b ldr r3, [r3, #20]
|
||
8005a8a: 60bb str r3, [r7, #8]
|
||
temp_window->x=t_x-ui->move_x;
|
||
8005a8c: 693b ldr r3, [r7, #16]
|
||
8005a8e: b29a uxth r2, r3
|
||
8005a90: 687b ldr r3, [r7, #4]
|
||
8005a92: 699b ldr r3, [r3, #24]
|
||
8005a94: b29b uxth r3, r3
|
||
8005a96: 1ad3 subs r3, r2, r3
|
||
8005a98: b29a uxth r2, r3
|
||
8005a9a: 68bb ldr r3, [r7, #8]
|
||
8005a9c: 801a strh r2, [r3, #0]
|
||
temp_window->y=t_y-ui->move_y;
|
||
8005a9e: 68fb ldr r3, [r7, #12]
|
||
8005aa0: b29a uxth r2, r3
|
||
8005aa2: 687b ldr r3, [r7, #4]
|
||
8005aa4: 69db ldr r3, [r3, #28]
|
||
8005aa6: b29b uxth r3, r3
|
||
8005aa8: 1ad3 subs r3, r2, r3
|
||
8005aaa: b29a uxth r2, r3
|
||
8005aac: 68bb ldr r3, [r7, #8]
|
||
8005aae: 805a strh r2, [r3, #2]
|
||
ui->refresh_ui_flag=1;
|
||
8005ab0: 687a ldr r2, [r7, #4]
|
||
8005ab2: f892 3020 ldrb.w r3, [r2, #32]
|
||
8005ab6: f043 0304 orr.w r3, r3, #4
|
||
8005aba: f882 3020 strb.w r3, [r2, #32]
|
||
8005abe: e015 b.n 8005aec <UI_Server+0x1c4>
|
||
|
||
|
||
|
||
}else
|
||
{
|
||
if(ui->First_click_flag==1)
|
||
8005ac0: 687b ldr r3, [r7, #4]
|
||
8005ac2: f893 3020 ldrb.w r3, [r3, #32]
|
||
8005ac6: f003 0302 and.w r3, r3, #2
|
||
8005aca: b2db uxtb r3, r3
|
||
8005acc: 2b00 cmp r3, #0
|
||
8005ace: d006 beq.n 8005ade <UI_Server+0x1b6>
|
||
{
|
||
ui->First_click_flag=0;
|
||
8005ad0: 687a ldr r2, [r7, #4]
|
||
8005ad2: f892 3020 ldrb.w r3, [r2, #32]
|
||
8005ad6: f36f 0341 bfc r3, #1, #1
|
||
8005ada: f882 3020 strb.w r3, [r2, #32]
|
||
}
|
||
if(ui->moveed_windwos!=NULL)
|
||
8005ade: 687b ldr r3, [r7, #4]
|
||
8005ae0: 695b ldr r3, [r3, #20]
|
||
8005ae2: 2b00 cmp r3, #0
|
||
8005ae4: d002 beq.n 8005aec <UI_Server+0x1c4>
|
||
{
|
||
ui->moveed_windwos=NULL;
|
||
8005ae6: 687b ldr r3, [r7, #4]
|
||
8005ae8: 2200 movs r2, #0
|
||
8005aea: 615a str r2, [r3, #20]
|
||
}
|
||
|
||
|
||
}
|
||
//display
|
||
if(ui->refresh_ui_flag==1)
|
||
8005aec: 687b ldr r3, [r7, #4]
|
||
8005aee: f893 3020 ldrb.w r3, [r3, #32]
|
||
8005af2: f003 0304 and.w r3, r3, #4
|
||
8005af6: b2db uxtb r3, r3
|
||
8005af8: 2b00 cmp r3, #0
|
||
8005afa: d009 beq.n 8005b10 <UI_Server+0x1e8>
|
||
{
|
||
ui->refresh_ui_flag=0;
|
||
8005afc: 687a ldr r2, [r7, #4]
|
||
8005afe: f892 3020 ldrb.w r3, [r2, #32]
|
||
8005b02: f36f 0382 bfc r3, #2, #1
|
||
8005b06: f882 3020 strb.w r3, [r2, #32]
|
||
Refresh_UI(ui);
|
||
8005b0a: 6878 ldr r0, [r7, #4]
|
||
8005b0c: f7ff fe53 bl 80057b6 <Refresh_UI>
|
||
|
||
}
|
||
|
||
}
|
||
8005b10: bf00 nop
|
||
8005b12: 3720 adds r7, #32
|
||
8005b14: 46bd mov sp, r7
|
||
8005b16: bd80 pop {r7, pc}
|
||
8005b18: 200002e0 .word 0x200002e0
|
||
|
||
08005b1c <__errno>:
|
||
8005b1c: 4b01 ldr r3, [pc, #4] ; (8005b24 <__errno+0x8>)
|
||
8005b1e: 6818 ldr r0, [r3, #0]
|
||
8005b20: 4770 bx lr
|
||
8005b22: bf00 nop
|
||
8005b24: 2000000c .word 0x2000000c
|
||
|
||
08005b28 <__libc_init_array>:
|
||
8005b28: b570 push {r4, r5, r6, lr}
|
||
8005b2a: 2600 movs r6, #0
|
||
8005b2c: 4d0c ldr r5, [pc, #48] ; (8005b60 <__libc_init_array+0x38>)
|
||
8005b2e: 4c0d ldr r4, [pc, #52] ; (8005b64 <__libc_init_array+0x3c>)
|
||
8005b30: 1b64 subs r4, r4, r5
|
||
8005b32: 10a4 asrs r4, r4, #2
|
||
8005b34: 42a6 cmp r6, r4
|
||
8005b36: d109 bne.n 8005b4c <__libc_init_array+0x24>
|
||
8005b38: f002 fec2 bl 80088c0 <_init>
|
||
8005b3c: 2600 movs r6, #0
|
||
8005b3e: 4d0a ldr r5, [pc, #40] ; (8005b68 <__libc_init_array+0x40>)
|
||
8005b40: 4c0a ldr r4, [pc, #40] ; (8005b6c <__libc_init_array+0x44>)
|
||
8005b42: 1b64 subs r4, r4, r5
|
||
8005b44: 10a4 asrs r4, r4, #2
|
||
8005b46: 42a6 cmp r6, r4
|
||
8005b48: d105 bne.n 8005b56 <__libc_init_array+0x2e>
|
||
8005b4a: bd70 pop {r4, r5, r6, pc}
|
||
8005b4c: f855 3b04 ldr.w r3, [r5], #4
|
||
8005b50: 4798 blx r3
|
||
8005b52: 3601 adds r6, #1
|
||
8005b54: e7ee b.n 8005b34 <__libc_init_array+0xc>
|
||
8005b56: f855 3b04 ldr.w r3, [r5], #4
|
||
8005b5a: 4798 blx r3
|
||
8005b5c: 3601 adds r6, #1
|
||
8005b5e: e7f2 b.n 8005b46 <__libc_init_array+0x1e>
|
||
8005b60: 0800982c .word 0x0800982c
|
||
8005b64: 0800982c .word 0x0800982c
|
||
8005b68: 0800982c .word 0x0800982c
|
||
8005b6c: 08009830 .word 0x08009830
|
||
|
||
08005b70 <malloc>:
|
||
8005b70: 4b02 ldr r3, [pc, #8] ; (8005b7c <malloc+0xc>)
|
||
8005b72: 4601 mov r1, r0
|
||
8005b74: 6818 ldr r0, [r3, #0]
|
||
8005b76: f000 b85f b.w 8005c38 <_malloc_r>
|
||
8005b7a: bf00 nop
|
||
8005b7c: 2000000c .word 0x2000000c
|
||
|
||
08005b80 <free>:
|
||
8005b80: 4b02 ldr r3, [pc, #8] ; (8005b8c <free+0xc>)
|
||
8005b82: 4601 mov r1, r0
|
||
8005b84: 6818 ldr r0, [r3, #0]
|
||
8005b86: f000 b80b b.w 8005ba0 <_free_r>
|
||
8005b8a: bf00 nop
|
||
8005b8c: 2000000c .word 0x2000000c
|
||
|
||
08005b90 <memset>:
|
||
8005b90: 4603 mov r3, r0
|
||
8005b92: 4402 add r2, r0
|
||
8005b94: 4293 cmp r3, r2
|
||
8005b96: d100 bne.n 8005b9a <memset+0xa>
|
||
8005b98: 4770 bx lr
|
||
8005b9a: f803 1b01 strb.w r1, [r3], #1
|
||
8005b9e: e7f9 b.n 8005b94 <memset+0x4>
|
||
|
||
08005ba0 <_free_r>:
|
||
8005ba0: b538 push {r3, r4, r5, lr}
|
||
8005ba2: 4605 mov r5, r0
|
||
8005ba4: 2900 cmp r1, #0
|
||
8005ba6: d043 beq.n 8005c30 <_free_r+0x90>
|
||
8005ba8: f851 3c04 ldr.w r3, [r1, #-4]
|
||
8005bac: 1f0c subs r4, r1, #4
|
||
8005bae: 2b00 cmp r3, #0
|
||
8005bb0: bfb8 it lt
|
||
8005bb2: 18e4 addlt r4, r4, r3
|
||
8005bb4: f001 fbc6 bl 8007344 <__malloc_lock>
|
||
8005bb8: 4a1e ldr r2, [pc, #120] ; (8005c34 <_free_r+0x94>)
|
||
8005bba: 6813 ldr r3, [r2, #0]
|
||
8005bbc: 4610 mov r0, r2
|
||
8005bbe: b933 cbnz r3, 8005bce <_free_r+0x2e>
|
||
8005bc0: 6063 str r3, [r4, #4]
|
||
8005bc2: 6014 str r4, [r2, #0]
|
||
8005bc4: 4628 mov r0, r5
|
||
8005bc6: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
||
8005bca: f001 bbc1 b.w 8007350 <__malloc_unlock>
|
||
8005bce: 42a3 cmp r3, r4
|
||
8005bd0: d90a bls.n 8005be8 <_free_r+0x48>
|
||
8005bd2: 6821 ldr r1, [r4, #0]
|
||
8005bd4: 1862 adds r2, r4, r1
|
||
8005bd6: 4293 cmp r3, r2
|
||
8005bd8: bf01 itttt eq
|
||
8005bda: 681a ldreq r2, [r3, #0]
|
||
8005bdc: 685b ldreq r3, [r3, #4]
|
||
8005bde: 1852 addeq r2, r2, r1
|
||
8005be0: 6022 streq r2, [r4, #0]
|
||
8005be2: 6063 str r3, [r4, #4]
|
||
8005be4: 6004 str r4, [r0, #0]
|
||
8005be6: e7ed b.n 8005bc4 <_free_r+0x24>
|
||
8005be8: 461a mov r2, r3
|
||
8005bea: 685b ldr r3, [r3, #4]
|
||
8005bec: b10b cbz r3, 8005bf2 <_free_r+0x52>
|
||
8005bee: 42a3 cmp r3, r4
|
||
8005bf0: d9fa bls.n 8005be8 <_free_r+0x48>
|
||
8005bf2: 6811 ldr r1, [r2, #0]
|
||
8005bf4: 1850 adds r0, r2, r1
|
||
8005bf6: 42a0 cmp r0, r4
|
||
8005bf8: d10b bne.n 8005c12 <_free_r+0x72>
|
||
8005bfa: 6820 ldr r0, [r4, #0]
|
||
8005bfc: 4401 add r1, r0
|
||
8005bfe: 1850 adds r0, r2, r1
|
||
8005c00: 4283 cmp r3, r0
|
||
8005c02: 6011 str r1, [r2, #0]
|
||
8005c04: d1de bne.n 8005bc4 <_free_r+0x24>
|
||
8005c06: 6818 ldr r0, [r3, #0]
|
||
8005c08: 685b ldr r3, [r3, #4]
|
||
8005c0a: 4401 add r1, r0
|
||
8005c0c: 6011 str r1, [r2, #0]
|
||
8005c0e: 6053 str r3, [r2, #4]
|
||
8005c10: e7d8 b.n 8005bc4 <_free_r+0x24>
|
||
8005c12: d902 bls.n 8005c1a <_free_r+0x7a>
|
||
8005c14: 230c movs r3, #12
|
||
8005c16: 602b str r3, [r5, #0]
|
||
8005c18: e7d4 b.n 8005bc4 <_free_r+0x24>
|
||
8005c1a: 6820 ldr r0, [r4, #0]
|
||
8005c1c: 1821 adds r1, r4, r0
|
||
8005c1e: 428b cmp r3, r1
|
||
8005c20: bf01 itttt eq
|
||
8005c22: 6819 ldreq r1, [r3, #0]
|
||
8005c24: 685b ldreq r3, [r3, #4]
|
||
8005c26: 1809 addeq r1, r1, r0
|
||
8005c28: 6021 streq r1, [r4, #0]
|
||
8005c2a: 6063 str r3, [r4, #4]
|
||
8005c2c: 6054 str r4, [r2, #4]
|
||
8005c2e: e7c9 b.n 8005bc4 <_free_r+0x24>
|
||
8005c30: bd38 pop {r3, r4, r5, pc}
|
||
8005c32: bf00 nop
|
||
8005c34: 20000200 .word 0x20000200
|
||
|
||
08005c38 <_malloc_r>:
|
||
8005c38: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8005c3a: 1ccd adds r5, r1, #3
|
||
8005c3c: f025 0503 bic.w r5, r5, #3
|
||
8005c40: 3508 adds r5, #8
|
||
8005c42: 2d0c cmp r5, #12
|
||
8005c44: bf38 it cc
|
||
8005c46: 250c movcc r5, #12
|
||
8005c48: 2d00 cmp r5, #0
|
||
8005c4a: 4606 mov r6, r0
|
||
8005c4c: db01 blt.n 8005c52 <_malloc_r+0x1a>
|
||
8005c4e: 42a9 cmp r1, r5
|
||
8005c50: d903 bls.n 8005c5a <_malloc_r+0x22>
|
||
8005c52: 230c movs r3, #12
|
||
8005c54: 6033 str r3, [r6, #0]
|
||
8005c56: 2000 movs r0, #0
|
||
8005c58: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
8005c5a: f001 fb73 bl 8007344 <__malloc_lock>
|
||
8005c5e: 4921 ldr r1, [pc, #132] ; (8005ce4 <_malloc_r+0xac>)
|
||
8005c60: 680a ldr r2, [r1, #0]
|
||
8005c62: 4614 mov r4, r2
|
||
8005c64: b99c cbnz r4, 8005c8e <_malloc_r+0x56>
|
||
8005c66: 4f20 ldr r7, [pc, #128] ; (8005ce8 <_malloc_r+0xb0>)
|
||
8005c68: 683b ldr r3, [r7, #0]
|
||
8005c6a: b923 cbnz r3, 8005c76 <_malloc_r+0x3e>
|
||
8005c6c: 4621 mov r1, r4
|
||
8005c6e: 4630 mov r0, r6
|
||
8005c70: f000 fc9c bl 80065ac <_sbrk_r>
|
||
8005c74: 6038 str r0, [r7, #0]
|
||
8005c76: 4629 mov r1, r5
|
||
8005c78: 4630 mov r0, r6
|
||
8005c7a: f000 fc97 bl 80065ac <_sbrk_r>
|
||
8005c7e: 1c43 adds r3, r0, #1
|
||
8005c80: d123 bne.n 8005cca <_malloc_r+0x92>
|
||
8005c82: 230c movs r3, #12
|
||
8005c84: 4630 mov r0, r6
|
||
8005c86: 6033 str r3, [r6, #0]
|
||
8005c88: f001 fb62 bl 8007350 <__malloc_unlock>
|
||
8005c8c: e7e3 b.n 8005c56 <_malloc_r+0x1e>
|
||
8005c8e: 6823 ldr r3, [r4, #0]
|
||
8005c90: 1b5b subs r3, r3, r5
|
||
8005c92: d417 bmi.n 8005cc4 <_malloc_r+0x8c>
|
||
8005c94: 2b0b cmp r3, #11
|
||
8005c96: d903 bls.n 8005ca0 <_malloc_r+0x68>
|
||
8005c98: 6023 str r3, [r4, #0]
|
||
8005c9a: 441c add r4, r3
|
||
8005c9c: 6025 str r5, [r4, #0]
|
||
8005c9e: e004 b.n 8005caa <_malloc_r+0x72>
|
||
8005ca0: 6863 ldr r3, [r4, #4]
|
||
8005ca2: 42a2 cmp r2, r4
|
||
8005ca4: bf0c ite eq
|
||
8005ca6: 600b streq r3, [r1, #0]
|
||
8005ca8: 6053 strne r3, [r2, #4]
|
||
8005caa: 4630 mov r0, r6
|
||
8005cac: f001 fb50 bl 8007350 <__malloc_unlock>
|
||
8005cb0: f104 000b add.w r0, r4, #11
|
||
8005cb4: 1d23 adds r3, r4, #4
|
||
8005cb6: f020 0007 bic.w r0, r0, #7
|
||
8005cba: 1ac2 subs r2, r0, r3
|
||
8005cbc: d0cc beq.n 8005c58 <_malloc_r+0x20>
|
||
8005cbe: 1a1b subs r3, r3, r0
|
||
8005cc0: 50a3 str r3, [r4, r2]
|
||
8005cc2: e7c9 b.n 8005c58 <_malloc_r+0x20>
|
||
8005cc4: 4622 mov r2, r4
|
||
8005cc6: 6864 ldr r4, [r4, #4]
|
||
8005cc8: e7cc b.n 8005c64 <_malloc_r+0x2c>
|
||
8005cca: 1cc4 adds r4, r0, #3
|
||
8005ccc: f024 0403 bic.w r4, r4, #3
|
||
8005cd0: 42a0 cmp r0, r4
|
||
8005cd2: d0e3 beq.n 8005c9c <_malloc_r+0x64>
|
||
8005cd4: 1a21 subs r1, r4, r0
|
||
8005cd6: 4630 mov r0, r6
|
||
8005cd8: f000 fc68 bl 80065ac <_sbrk_r>
|
||
8005cdc: 3001 adds r0, #1
|
||
8005cde: d1dd bne.n 8005c9c <_malloc_r+0x64>
|
||
8005ce0: e7cf b.n 8005c82 <_malloc_r+0x4a>
|
||
8005ce2: bf00 nop
|
||
8005ce4: 20000200 .word 0x20000200
|
||
8005ce8: 20000204 .word 0x20000204
|
||
|
||
08005cec <__cvt>:
|
||
8005cec: 2b00 cmp r3, #0
|
||
8005cee: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8005cf2: 461f mov r7, r3
|
||
8005cf4: bfbb ittet lt
|
||
8005cf6: f103 4300 addlt.w r3, r3, #2147483648 ; 0x80000000
|
||
8005cfa: 461f movlt r7, r3
|
||
8005cfc: 2300 movge r3, #0
|
||
8005cfe: 232d movlt r3, #45 ; 0x2d
|
||
8005d00: b088 sub sp, #32
|
||
8005d02: 4614 mov r4, r2
|
||
8005d04: 9a12 ldr r2, [sp, #72] ; 0x48
|
||
8005d06: 9d10 ldr r5, [sp, #64] ; 0x40
|
||
8005d08: 7013 strb r3, [r2, #0]
|
||
8005d0a: 9b14 ldr r3, [sp, #80] ; 0x50
|
||
8005d0c: f8dd a04c ldr.w sl, [sp, #76] ; 0x4c
|
||
8005d10: f023 0820 bic.w r8, r3, #32
|
||
8005d14: f1b8 0f46 cmp.w r8, #70 ; 0x46
|
||
8005d18: d005 beq.n 8005d26 <__cvt+0x3a>
|
||
8005d1a: f1b8 0f45 cmp.w r8, #69 ; 0x45
|
||
8005d1e: d100 bne.n 8005d22 <__cvt+0x36>
|
||
8005d20: 3501 adds r5, #1
|
||
8005d22: 2302 movs r3, #2
|
||
8005d24: e000 b.n 8005d28 <__cvt+0x3c>
|
||
8005d26: 2303 movs r3, #3
|
||
8005d28: aa07 add r2, sp, #28
|
||
8005d2a: 9204 str r2, [sp, #16]
|
||
8005d2c: aa06 add r2, sp, #24
|
||
8005d2e: e9cd a202 strd sl, r2, [sp, #8]
|
||
8005d32: e9cd 3500 strd r3, r5, [sp]
|
||
8005d36: 4622 mov r2, r4
|
||
8005d38: 463b mov r3, r7
|
||
8005d3a: f000 fcf5 bl 8006728 <_dtoa_r>
|
||
8005d3e: f1b8 0f47 cmp.w r8, #71 ; 0x47
|
||
8005d42: 4606 mov r6, r0
|
||
8005d44: d102 bne.n 8005d4c <__cvt+0x60>
|
||
8005d46: 9b11 ldr r3, [sp, #68] ; 0x44
|
||
8005d48: 07db lsls r3, r3, #31
|
||
8005d4a: d522 bpl.n 8005d92 <__cvt+0xa6>
|
||
8005d4c: f1b8 0f46 cmp.w r8, #70 ; 0x46
|
||
8005d50: eb06 0905 add.w r9, r6, r5
|
||
8005d54: d110 bne.n 8005d78 <__cvt+0x8c>
|
||
8005d56: 7833 ldrb r3, [r6, #0]
|
||
8005d58: 2b30 cmp r3, #48 ; 0x30
|
||
8005d5a: d10a bne.n 8005d72 <__cvt+0x86>
|
||
8005d5c: 2200 movs r2, #0
|
||
8005d5e: 2300 movs r3, #0
|
||
8005d60: 4620 mov r0, r4
|
||
8005d62: 4639 mov r1, r7
|
||
8005d64: f7fa fe8c bl 8000a80 <__aeabi_dcmpeq>
|
||
8005d68: b918 cbnz r0, 8005d72 <__cvt+0x86>
|
||
8005d6a: f1c5 0501 rsb r5, r5, #1
|
||
8005d6e: f8ca 5000 str.w r5, [sl]
|
||
8005d72: f8da 3000 ldr.w r3, [sl]
|
||
8005d76: 4499 add r9, r3
|
||
8005d78: 2200 movs r2, #0
|
||
8005d7a: 2300 movs r3, #0
|
||
8005d7c: 4620 mov r0, r4
|
||
8005d7e: 4639 mov r1, r7
|
||
8005d80: f7fa fe7e bl 8000a80 <__aeabi_dcmpeq>
|
||
8005d84: b108 cbz r0, 8005d8a <__cvt+0x9e>
|
||
8005d86: f8cd 901c str.w r9, [sp, #28]
|
||
8005d8a: 2230 movs r2, #48 ; 0x30
|
||
8005d8c: 9b07 ldr r3, [sp, #28]
|
||
8005d8e: 454b cmp r3, r9
|
||
8005d90: d307 bcc.n 8005da2 <__cvt+0xb6>
|
||
8005d92: 4630 mov r0, r6
|
||
8005d94: 9b07 ldr r3, [sp, #28]
|
||
8005d96: 9a15 ldr r2, [sp, #84] ; 0x54
|
||
8005d98: 1b9b subs r3, r3, r6
|
||
8005d9a: 6013 str r3, [r2, #0]
|
||
8005d9c: b008 add sp, #32
|
||
8005d9e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8005da2: 1c59 adds r1, r3, #1
|
||
8005da4: 9107 str r1, [sp, #28]
|
||
8005da6: 701a strb r2, [r3, #0]
|
||
8005da8: e7f0 b.n 8005d8c <__cvt+0xa0>
|
||
|
||
08005daa <__exponent>:
|
||
8005daa: 4603 mov r3, r0
|
||
8005dac: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr}
|
||
8005dae: 2900 cmp r1, #0
|
||
8005db0: f803 2b02 strb.w r2, [r3], #2
|
||
8005db4: bfb6 itet lt
|
||
8005db6: 222d movlt r2, #45 ; 0x2d
|
||
8005db8: 222b movge r2, #43 ; 0x2b
|
||
8005dba: 4249 neglt r1, r1
|
||
8005dbc: 2909 cmp r1, #9
|
||
8005dbe: 7042 strb r2, [r0, #1]
|
||
8005dc0: dd2b ble.n 8005e1a <__exponent+0x70>
|
||
8005dc2: f10d 0407 add.w r4, sp, #7
|
||
8005dc6: 46a4 mov ip, r4
|
||
8005dc8: 270a movs r7, #10
|
||
8005dca: fb91 f6f7 sdiv r6, r1, r7
|
||
8005dce: 460a mov r2, r1
|
||
8005dd0: 46a6 mov lr, r4
|
||
8005dd2: fb07 1516 mls r5, r7, r6, r1
|
||
8005dd6: 2a63 cmp r2, #99 ; 0x63
|
||
8005dd8: f105 0530 add.w r5, r5, #48 ; 0x30
|
||
8005ddc: 4631 mov r1, r6
|
||
8005dde: f104 34ff add.w r4, r4, #4294967295 ; 0xffffffff
|
||
8005de2: f80e 5c01 strb.w r5, [lr, #-1]
|
||
8005de6: dcf0 bgt.n 8005dca <__exponent+0x20>
|
||
8005de8: 3130 adds r1, #48 ; 0x30
|
||
8005dea: f1ae 0502 sub.w r5, lr, #2
|
||
8005dee: f804 1c01 strb.w r1, [r4, #-1]
|
||
8005df2: 4629 mov r1, r5
|
||
8005df4: 1c44 adds r4, r0, #1
|
||
8005df6: 4561 cmp r1, ip
|
||
8005df8: d30a bcc.n 8005e10 <__exponent+0x66>
|
||
8005dfa: f10d 0209 add.w r2, sp, #9
|
||
8005dfe: eba2 020e sub.w r2, r2, lr
|
||
8005e02: 4565 cmp r5, ip
|
||
8005e04: bf88 it hi
|
||
8005e06: 2200 movhi r2, #0
|
||
8005e08: 4413 add r3, r2
|
||
8005e0a: 1a18 subs r0, r3, r0
|
||
8005e0c: b003 add sp, #12
|
||
8005e0e: bdf0 pop {r4, r5, r6, r7, pc}
|
||
8005e10: f811 2b01 ldrb.w r2, [r1], #1
|
||
8005e14: f804 2f01 strb.w r2, [r4, #1]!
|
||
8005e18: e7ed b.n 8005df6 <__exponent+0x4c>
|
||
8005e1a: 2330 movs r3, #48 ; 0x30
|
||
8005e1c: 3130 adds r1, #48 ; 0x30
|
||
8005e1e: 7083 strb r3, [r0, #2]
|
||
8005e20: 70c1 strb r1, [r0, #3]
|
||
8005e22: 1d03 adds r3, r0, #4
|
||
8005e24: e7f1 b.n 8005e0a <__exponent+0x60>
|
||
...
|
||
|
||
08005e28 <_printf_float>:
|
||
8005e28: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8005e2c: b091 sub sp, #68 ; 0x44
|
||
8005e2e: 460c mov r4, r1
|
||
8005e30: f8dd 8068 ldr.w r8, [sp, #104] ; 0x68
|
||
8005e34: 4616 mov r6, r2
|
||
8005e36: 461f mov r7, r3
|
||
8005e38: 4605 mov r5, r0
|
||
8005e3a: f001 fa63 bl 8007304 <_localeconv_r>
|
||
8005e3e: 6803 ldr r3, [r0, #0]
|
||
8005e40: 4618 mov r0, r3
|
||
8005e42: 9309 str r3, [sp, #36] ; 0x24
|
||
8005e44: f7fa f9f0 bl 8000228 <strlen>
|
||
8005e48: 2300 movs r3, #0
|
||
8005e4a: 930e str r3, [sp, #56] ; 0x38
|
||
8005e4c: f8d8 3000 ldr.w r3, [r8]
|
||
8005e50: 900a str r0, [sp, #40] ; 0x28
|
||
8005e52: 3307 adds r3, #7
|
||
8005e54: f023 0307 bic.w r3, r3, #7
|
||
8005e58: f103 0208 add.w r2, r3, #8
|
||
8005e5c: f894 9018 ldrb.w r9, [r4, #24]
|
||
8005e60: f8d4 b000 ldr.w fp, [r4]
|
||
8005e64: f8c8 2000 str.w r2, [r8]
|
||
8005e68: e9d3 2300 ldrd r2, r3, [r3]
|
||
8005e6c: e9c4 2312 strd r2, r3, [r4, #72] ; 0x48
|
||
8005e70: e9d4 8a12 ldrd r8, sl, [r4, #72] ; 0x48
|
||
8005e74: f02a 4300 bic.w r3, sl, #2147483648 ; 0x80000000
|
||
8005e78: 930b str r3, [sp, #44] ; 0x2c
|
||
8005e7a: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8005e7e: 4640 mov r0, r8
|
||
8005e80: 4b9c ldr r3, [pc, #624] ; (80060f4 <_printf_float+0x2cc>)
|
||
8005e82: 990b ldr r1, [sp, #44] ; 0x2c
|
||
8005e84: f7fa fe2e bl 8000ae4 <__aeabi_dcmpun>
|
||
8005e88: bb70 cbnz r0, 8005ee8 <_printf_float+0xc0>
|
||
8005e8a: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8005e8e: 4640 mov r0, r8
|
||
8005e90: 4b98 ldr r3, [pc, #608] ; (80060f4 <_printf_float+0x2cc>)
|
||
8005e92: 990b ldr r1, [sp, #44] ; 0x2c
|
||
8005e94: f7fa fe08 bl 8000aa8 <__aeabi_dcmple>
|
||
8005e98: bb30 cbnz r0, 8005ee8 <_printf_float+0xc0>
|
||
8005e9a: 2200 movs r2, #0
|
||
8005e9c: 2300 movs r3, #0
|
||
8005e9e: 4640 mov r0, r8
|
||
8005ea0: 4651 mov r1, sl
|
||
8005ea2: f7fa fdf7 bl 8000a94 <__aeabi_dcmplt>
|
||
8005ea6: b110 cbz r0, 8005eae <_printf_float+0x86>
|
||
8005ea8: 232d movs r3, #45 ; 0x2d
|
||
8005eaa: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
8005eae: 4b92 ldr r3, [pc, #584] ; (80060f8 <_printf_float+0x2d0>)
|
||
8005eb0: 4892 ldr r0, [pc, #584] ; (80060fc <_printf_float+0x2d4>)
|
||
8005eb2: f1b9 0f47 cmp.w r9, #71 ; 0x47
|
||
8005eb6: bf94 ite ls
|
||
8005eb8: 4698 movls r8, r3
|
||
8005eba: 4680 movhi r8, r0
|
||
8005ebc: 2303 movs r3, #3
|
||
8005ebe: f04f 0a00 mov.w sl, #0
|
||
8005ec2: 6123 str r3, [r4, #16]
|
||
8005ec4: f02b 0304 bic.w r3, fp, #4
|
||
8005ec8: 6023 str r3, [r4, #0]
|
||
8005eca: 4633 mov r3, r6
|
||
8005ecc: 4621 mov r1, r4
|
||
8005ece: 4628 mov r0, r5
|
||
8005ed0: 9700 str r7, [sp, #0]
|
||
8005ed2: aa0f add r2, sp, #60 ; 0x3c
|
||
8005ed4: f000 f9d4 bl 8006280 <_printf_common>
|
||
8005ed8: 3001 adds r0, #1
|
||
8005eda: f040 8090 bne.w 8005ffe <_printf_float+0x1d6>
|
||
8005ede: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8005ee2: b011 add sp, #68 ; 0x44
|
||
8005ee4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8005ee8: 4642 mov r2, r8
|
||
8005eea: 4653 mov r3, sl
|
||
8005eec: 4640 mov r0, r8
|
||
8005eee: 4651 mov r1, sl
|
||
8005ef0: f7fa fdf8 bl 8000ae4 <__aeabi_dcmpun>
|
||
8005ef4: b148 cbz r0, 8005f0a <_printf_float+0xe2>
|
||
8005ef6: f1ba 0f00 cmp.w sl, #0
|
||
8005efa: bfb8 it lt
|
||
8005efc: 232d movlt r3, #45 ; 0x2d
|
||
8005efe: 4880 ldr r0, [pc, #512] ; (8006100 <_printf_float+0x2d8>)
|
||
8005f00: bfb8 it lt
|
||
8005f02: f884 3043 strblt.w r3, [r4, #67] ; 0x43
|
||
8005f06: 4b7f ldr r3, [pc, #508] ; (8006104 <_printf_float+0x2dc>)
|
||
8005f08: e7d3 b.n 8005eb2 <_printf_float+0x8a>
|
||
8005f0a: 6863 ldr r3, [r4, #4]
|
||
8005f0c: f009 01df and.w r1, r9, #223 ; 0xdf
|
||
8005f10: 1c5a adds r2, r3, #1
|
||
8005f12: d142 bne.n 8005f9a <_printf_float+0x172>
|
||
8005f14: 2306 movs r3, #6
|
||
8005f16: 6063 str r3, [r4, #4]
|
||
8005f18: 2200 movs r2, #0
|
||
8005f1a: 9206 str r2, [sp, #24]
|
||
8005f1c: aa0e add r2, sp, #56 ; 0x38
|
||
8005f1e: e9cd 9204 strd r9, r2, [sp, #16]
|
||
8005f22: aa0d add r2, sp, #52 ; 0x34
|
||
8005f24: f44b 6380 orr.w r3, fp, #1024 ; 0x400
|
||
8005f28: 9203 str r2, [sp, #12]
|
||
8005f2a: f10d 0233 add.w r2, sp, #51 ; 0x33
|
||
8005f2e: e9cd 3201 strd r3, r2, [sp, #4]
|
||
8005f32: 6023 str r3, [r4, #0]
|
||
8005f34: 6863 ldr r3, [r4, #4]
|
||
8005f36: 4642 mov r2, r8
|
||
8005f38: 9300 str r3, [sp, #0]
|
||
8005f3a: 4628 mov r0, r5
|
||
8005f3c: 4653 mov r3, sl
|
||
8005f3e: 910b str r1, [sp, #44] ; 0x2c
|
||
8005f40: f7ff fed4 bl 8005cec <__cvt>
|
||
8005f44: 990b ldr r1, [sp, #44] ; 0x2c
|
||
8005f46: 4680 mov r8, r0
|
||
8005f48: 2947 cmp r1, #71 ; 0x47
|
||
8005f4a: 990d ldr r1, [sp, #52] ; 0x34
|
||
8005f4c: d108 bne.n 8005f60 <_printf_float+0x138>
|
||
8005f4e: 1cc8 adds r0, r1, #3
|
||
8005f50: db02 blt.n 8005f58 <_printf_float+0x130>
|
||
8005f52: 6863 ldr r3, [r4, #4]
|
||
8005f54: 4299 cmp r1, r3
|
||
8005f56: dd40 ble.n 8005fda <_printf_float+0x1b2>
|
||
8005f58: f1a9 0902 sub.w r9, r9, #2
|
||
8005f5c: fa5f f989 uxtb.w r9, r9
|
||
8005f60: f1b9 0f65 cmp.w r9, #101 ; 0x65
|
||
8005f64: d81f bhi.n 8005fa6 <_printf_float+0x17e>
|
||
8005f66: 464a mov r2, r9
|
||
8005f68: 3901 subs r1, #1
|
||
8005f6a: f104 0050 add.w r0, r4, #80 ; 0x50
|
||
8005f6e: 910d str r1, [sp, #52] ; 0x34
|
||
8005f70: f7ff ff1b bl 8005daa <__exponent>
|
||
8005f74: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
8005f76: 4682 mov sl, r0
|
||
8005f78: 1813 adds r3, r2, r0
|
||
8005f7a: 2a01 cmp r2, #1
|
||
8005f7c: 6123 str r3, [r4, #16]
|
||
8005f7e: dc02 bgt.n 8005f86 <_printf_float+0x15e>
|
||
8005f80: 6822 ldr r2, [r4, #0]
|
||
8005f82: 07d2 lsls r2, r2, #31
|
||
8005f84: d501 bpl.n 8005f8a <_printf_float+0x162>
|
||
8005f86: 3301 adds r3, #1
|
||
8005f88: 6123 str r3, [r4, #16]
|
||
8005f8a: f89d 3033 ldrb.w r3, [sp, #51] ; 0x33
|
||
8005f8e: 2b00 cmp r3, #0
|
||
8005f90: d09b beq.n 8005eca <_printf_float+0xa2>
|
||
8005f92: 232d movs r3, #45 ; 0x2d
|
||
8005f94: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
8005f98: e797 b.n 8005eca <_printf_float+0xa2>
|
||
8005f9a: 2947 cmp r1, #71 ; 0x47
|
||
8005f9c: d1bc bne.n 8005f18 <_printf_float+0xf0>
|
||
8005f9e: 2b00 cmp r3, #0
|
||
8005fa0: d1ba bne.n 8005f18 <_printf_float+0xf0>
|
||
8005fa2: 2301 movs r3, #1
|
||
8005fa4: e7b7 b.n 8005f16 <_printf_float+0xee>
|
||
8005fa6: f1b9 0f66 cmp.w r9, #102 ; 0x66
|
||
8005faa: d118 bne.n 8005fde <_printf_float+0x1b6>
|
||
8005fac: 2900 cmp r1, #0
|
||
8005fae: 6863 ldr r3, [r4, #4]
|
||
8005fb0: dd0b ble.n 8005fca <_printf_float+0x1a2>
|
||
8005fb2: 6121 str r1, [r4, #16]
|
||
8005fb4: b913 cbnz r3, 8005fbc <_printf_float+0x194>
|
||
8005fb6: 6822 ldr r2, [r4, #0]
|
||
8005fb8: 07d0 lsls r0, r2, #31
|
||
8005fba: d502 bpl.n 8005fc2 <_printf_float+0x19a>
|
||
8005fbc: 3301 adds r3, #1
|
||
8005fbe: 440b add r3, r1
|
||
8005fc0: 6123 str r3, [r4, #16]
|
||
8005fc2: f04f 0a00 mov.w sl, #0
|
||
8005fc6: 65a1 str r1, [r4, #88] ; 0x58
|
||
8005fc8: e7df b.n 8005f8a <_printf_float+0x162>
|
||
8005fca: b913 cbnz r3, 8005fd2 <_printf_float+0x1aa>
|
||
8005fcc: 6822 ldr r2, [r4, #0]
|
||
8005fce: 07d2 lsls r2, r2, #31
|
||
8005fd0: d501 bpl.n 8005fd6 <_printf_float+0x1ae>
|
||
8005fd2: 3302 adds r3, #2
|
||
8005fd4: e7f4 b.n 8005fc0 <_printf_float+0x198>
|
||
8005fd6: 2301 movs r3, #1
|
||
8005fd8: e7f2 b.n 8005fc0 <_printf_float+0x198>
|
||
8005fda: f04f 0967 mov.w r9, #103 ; 0x67
|
||
8005fde: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8005fe0: 4299 cmp r1, r3
|
||
8005fe2: db05 blt.n 8005ff0 <_printf_float+0x1c8>
|
||
8005fe4: 6823 ldr r3, [r4, #0]
|
||
8005fe6: 6121 str r1, [r4, #16]
|
||
8005fe8: 07d8 lsls r0, r3, #31
|
||
8005fea: d5ea bpl.n 8005fc2 <_printf_float+0x19a>
|
||
8005fec: 1c4b adds r3, r1, #1
|
||
8005fee: e7e7 b.n 8005fc0 <_printf_float+0x198>
|
||
8005ff0: 2900 cmp r1, #0
|
||
8005ff2: bfcc ite gt
|
||
8005ff4: 2201 movgt r2, #1
|
||
8005ff6: f1c1 0202 rsble r2, r1, #2
|
||
8005ffa: 4413 add r3, r2
|
||
8005ffc: e7e0 b.n 8005fc0 <_printf_float+0x198>
|
||
8005ffe: 6823 ldr r3, [r4, #0]
|
||
8006000: 055a lsls r2, r3, #21
|
||
8006002: d407 bmi.n 8006014 <_printf_float+0x1ec>
|
||
8006004: 6923 ldr r3, [r4, #16]
|
||
8006006: 4642 mov r2, r8
|
||
8006008: 4631 mov r1, r6
|
||
800600a: 4628 mov r0, r5
|
||
800600c: 47b8 blx r7
|
||
800600e: 3001 adds r0, #1
|
||
8006010: d12b bne.n 800606a <_printf_float+0x242>
|
||
8006012: e764 b.n 8005ede <_printf_float+0xb6>
|
||
8006014: f1b9 0f65 cmp.w r9, #101 ; 0x65
|
||
8006018: f240 80dd bls.w 80061d6 <_printf_float+0x3ae>
|
||
800601c: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48
|
||
8006020: 2200 movs r2, #0
|
||
8006022: 2300 movs r3, #0
|
||
8006024: f7fa fd2c bl 8000a80 <__aeabi_dcmpeq>
|
||
8006028: 2800 cmp r0, #0
|
||
800602a: d033 beq.n 8006094 <_printf_float+0x26c>
|
||
800602c: 2301 movs r3, #1
|
||
800602e: 4631 mov r1, r6
|
||
8006030: 4628 mov r0, r5
|
||
8006032: 4a35 ldr r2, [pc, #212] ; (8006108 <_printf_float+0x2e0>)
|
||
8006034: 47b8 blx r7
|
||
8006036: 3001 adds r0, #1
|
||
8006038: f43f af51 beq.w 8005ede <_printf_float+0xb6>
|
||
800603c: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
8006040: 429a cmp r2, r3
|
||
8006042: db02 blt.n 800604a <_printf_float+0x222>
|
||
8006044: 6823 ldr r3, [r4, #0]
|
||
8006046: 07d8 lsls r0, r3, #31
|
||
8006048: d50f bpl.n 800606a <_printf_float+0x242>
|
||
800604a: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
800604e: 4631 mov r1, r6
|
||
8006050: 4628 mov r0, r5
|
||
8006052: 47b8 blx r7
|
||
8006054: 3001 adds r0, #1
|
||
8006056: f43f af42 beq.w 8005ede <_printf_float+0xb6>
|
||
800605a: f04f 0800 mov.w r8, #0
|
||
800605e: f104 091a add.w r9, r4, #26
|
||
8006062: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8006064: 3b01 subs r3, #1
|
||
8006066: 4543 cmp r3, r8
|
||
8006068: dc09 bgt.n 800607e <_printf_float+0x256>
|
||
800606a: 6823 ldr r3, [r4, #0]
|
||
800606c: 079b lsls r3, r3, #30
|
||
800606e: f100 8102 bmi.w 8006276 <_printf_float+0x44e>
|
||
8006072: 68e0 ldr r0, [r4, #12]
|
||
8006074: 9b0f ldr r3, [sp, #60] ; 0x3c
|
||
8006076: 4298 cmp r0, r3
|
||
8006078: bfb8 it lt
|
||
800607a: 4618 movlt r0, r3
|
||
800607c: e731 b.n 8005ee2 <_printf_float+0xba>
|
||
800607e: 2301 movs r3, #1
|
||
8006080: 464a mov r2, r9
|
||
8006082: 4631 mov r1, r6
|
||
8006084: 4628 mov r0, r5
|
||
8006086: 47b8 blx r7
|
||
8006088: 3001 adds r0, #1
|
||
800608a: f43f af28 beq.w 8005ede <_printf_float+0xb6>
|
||
800608e: f108 0801 add.w r8, r8, #1
|
||
8006092: e7e6 b.n 8006062 <_printf_float+0x23a>
|
||
8006094: 9b0d ldr r3, [sp, #52] ; 0x34
|
||
8006096: 2b00 cmp r3, #0
|
||
8006098: dc38 bgt.n 800610c <_printf_float+0x2e4>
|
||
800609a: 2301 movs r3, #1
|
||
800609c: 4631 mov r1, r6
|
||
800609e: 4628 mov r0, r5
|
||
80060a0: 4a19 ldr r2, [pc, #100] ; (8006108 <_printf_float+0x2e0>)
|
||
80060a2: 47b8 blx r7
|
||
80060a4: 3001 adds r0, #1
|
||
80060a6: f43f af1a beq.w 8005ede <_printf_float+0xb6>
|
||
80060aa: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
80060ae: 4313 orrs r3, r2
|
||
80060b0: d102 bne.n 80060b8 <_printf_float+0x290>
|
||
80060b2: 6823 ldr r3, [r4, #0]
|
||
80060b4: 07d9 lsls r1, r3, #31
|
||
80060b6: d5d8 bpl.n 800606a <_printf_float+0x242>
|
||
80060b8: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
80060bc: 4631 mov r1, r6
|
||
80060be: 4628 mov r0, r5
|
||
80060c0: 47b8 blx r7
|
||
80060c2: 3001 adds r0, #1
|
||
80060c4: f43f af0b beq.w 8005ede <_printf_float+0xb6>
|
||
80060c8: f04f 0900 mov.w r9, #0
|
||
80060cc: f104 0a1a add.w sl, r4, #26
|
||
80060d0: 9b0d ldr r3, [sp, #52] ; 0x34
|
||
80060d2: 425b negs r3, r3
|
||
80060d4: 454b cmp r3, r9
|
||
80060d6: dc01 bgt.n 80060dc <_printf_float+0x2b4>
|
||
80060d8: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
80060da: e794 b.n 8006006 <_printf_float+0x1de>
|
||
80060dc: 2301 movs r3, #1
|
||
80060de: 4652 mov r2, sl
|
||
80060e0: 4631 mov r1, r6
|
||
80060e2: 4628 mov r0, r5
|
||
80060e4: 47b8 blx r7
|
||
80060e6: 3001 adds r0, #1
|
||
80060e8: f43f aef9 beq.w 8005ede <_printf_float+0xb6>
|
||
80060ec: f109 0901 add.w r9, r9, #1
|
||
80060f0: e7ee b.n 80060d0 <_printf_float+0x2a8>
|
||
80060f2: bf00 nop
|
||
80060f4: 7fefffff .word 0x7fefffff
|
||
80060f8: 0800944c .word 0x0800944c
|
||
80060fc: 08009450 .word 0x08009450
|
||
8006100: 08009458 .word 0x08009458
|
||
8006104: 08009454 .word 0x08009454
|
||
8006108: 0800945c .word 0x0800945c
|
||
800610c: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
800610e: 6da3 ldr r3, [r4, #88] ; 0x58
|
||
8006110: 429a cmp r2, r3
|
||
8006112: bfa8 it ge
|
||
8006114: 461a movge r2, r3
|
||
8006116: 2a00 cmp r2, #0
|
||
8006118: 4691 mov r9, r2
|
||
800611a: dc37 bgt.n 800618c <_printf_float+0x364>
|
||
800611c: f04f 0b00 mov.w fp, #0
|
||
8006120: ea29 79e9 bic.w r9, r9, r9, asr #31
|
||
8006124: f104 021a add.w r2, r4, #26
|
||
8006128: f8d4 a058 ldr.w sl, [r4, #88] ; 0x58
|
||
800612c: ebaa 0309 sub.w r3, sl, r9
|
||
8006130: 455b cmp r3, fp
|
||
8006132: dc33 bgt.n 800619c <_printf_float+0x374>
|
||
8006134: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
8006138: 429a cmp r2, r3
|
||
800613a: db3b blt.n 80061b4 <_printf_float+0x38c>
|
||
800613c: 6823 ldr r3, [r4, #0]
|
||
800613e: 07da lsls r2, r3, #31
|
||
8006140: d438 bmi.n 80061b4 <_printf_float+0x38c>
|
||
8006142: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
8006144: 990d ldr r1, [sp, #52] ; 0x34
|
||
8006146: eba2 030a sub.w r3, r2, sl
|
||
800614a: eba2 0901 sub.w r9, r2, r1
|
||
800614e: 4599 cmp r9, r3
|
||
8006150: bfa8 it ge
|
||
8006152: 4699 movge r9, r3
|
||
8006154: f1b9 0f00 cmp.w r9, #0
|
||
8006158: dc34 bgt.n 80061c4 <_printf_float+0x39c>
|
||
800615a: f04f 0800 mov.w r8, #0
|
||
800615e: ea29 79e9 bic.w r9, r9, r9, asr #31
|
||
8006162: f104 0a1a add.w sl, r4, #26
|
||
8006166: e9dd 230d ldrd r2, r3, [sp, #52] ; 0x34
|
||
800616a: 1a9b subs r3, r3, r2
|
||
800616c: eba3 0309 sub.w r3, r3, r9
|
||
8006170: 4543 cmp r3, r8
|
||
8006172: f77f af7a ble.w 800606a <_printf_float+0x242>
|
||
8006176: 2301 movs r3, #1
|
||
8006178: 4652 mov r2, sl
|
||
800617a: 4631 mov r1, r6
|
||
800617c: 4628 mov r0, r5
|
||
800617e: 47b8 blx r7
|
||
8006180: 3001 adds r0, #1
|
||
8006182: f43f aeac beq.w 8005ede <_printf_float+0xb6>
|
||
8006186: f108 0801 add.w r8, r8, #1
|
||
800618a: e7ec b.n 8006166 <_printf_float+0x33e>
|
||
800618c: 4613 mov r3, r2
|
||
800618e: 4631 mov r1, r6
|
||
8006190: 4642 mov r2, r8
|
||
8006192: 4628 mov r0, r5
|
||
8006194: 47b8 blx r7
|
||
8006196: 3001 adds r0, #1
|
||
8006198: d1c0 bne.n 800611c <_printf_float+0x2f4>
|
||
800619a: e6a0 b.n 8005ede <_printf_float+0xb6>
|
||
800619c: 2301 movs r3, #1
|
||
800619e: 4631 mov r1, r6
|
||
80061a0: 4628 mov r0, r5
|
||
80061a2: 920b str r2, [sp, #44] ; 0x2c
|
||
80061a4: 47b8 blx r7
|
||
80061a6: 3001 adds r0, #1
|
||
80061a8: f43f ae99 beq.w 8005ede <_printf_float+0xb6>
|
||
80061ac: 9a0b ldr r2, [sp, #44] ; 0x2c
|
||
80061ae: f10b 0b01 add.w fp, fp, #1
|
||
80061b2: e7b9 b.n 8006128 <_printf_float+0x300>
|
||
80061b4: 4631 mov r1, r6
|
||
80061b6: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
80061ba: 4628 mov r0, r5
|
||
80061bc: 47b8 blx r7
|
||
80061be: 3001 adds r0, #1
|
||
80061c0: d1bf bne.n 8006142 <_printf_float+0x31a>
|
||
80061c2: e68c b.n 8005ede <_printf_float+0xb6>
|
||
80061c4: 464b mov r3, r9
|
||
80061c6: 4631 mov r1, r6
|
||
80061c8: 4628 mov r0, r5
|
||
80061ca: eb08 020a add.w r2, r8, sl
|
||
80061ce: 47b8 blx r7
|
||
80061d0: 3001 adds r0, #1
|
||
80061d2: d1c2 bne.n 800615a <_printf_float+0x332>
|
||
80061d4: e683 b.n 8005ede <_printf_float+0xb6>
|
||
80061d6: 9a0e ldr r2, [sp, #56] ; 0x38
|
||
80061d8: 2a01 cmp r2, #1
|
||
80061da: dc01 bgt.n 80061e0 <_printf_float+0x3b8>
|
||
80061dc: 07db lsls r3, r3, #31
|
||
80061de: d537 bpl.n 8006250 <_printf_float+0x428>
|
||
80061e0: 2301 movs r3, #1
|
||
80061e2: 4642 mov r2, r8
|
||
80061e4: 4631 mov r1, r6
|
||
80061e6: 4628 mov r0, r5
|
||
80061e8: 47b8 blx r7
|
||
80061ea: 3001 adds r0, #1
|
||
80061ec: f43f ae77 beq.w 8005ede <_printf_float+0xb6>
|
||
80061f0: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
||
80061f4: 4631 mov r1, r6
|
||
80061f6: 4628 mov r0, r5
|
||
80061f8: 47b8 blx r7
|
||
80061fa: 3001 adds r0, #1
|
||
80061fc: f43f ae6f beq.w 8005ede <_printf_float+0xb6>
|
||
8006200: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48
|
||
8006204: 2200 movs r2, #0
|
||
8006206: 2300 movs r3, #0
|
||
8006208: f7fa fc3a bl 8000a80 <__aeabi_dcmpeq>
|
||
800620c: b9d8 cbnz r0, 8006246 <_printf_float+0x41e>
|
||
800620e: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8006210: f108 0201 add.w r2, r8, #1
|
||
8006214: 3b01 subs r3, #1
|
||
8006216: 4631 mov r1, r6
|
||
8006218: 4628 mov r0, r5
|
||
800621a: 47b8 blx r7
|
||
800621c: 3001 adds r0, #1
|
||
800621e: d10e bne.n 800623e <_printf_float+0x416>
|
||
8006220: e65d b.n 8005ede <_printf_float+0xb6>
|
||
8006222: 2301 movs r3, #1
|
||
8006224: 464a mov r2, r9
|
||
8006226: 4631 mov r1, r6
|
||
8006228: 4628 mov r0, r5
|
||
800622a: 47b8 blx r7
|
||
800622c: 3001 adds r0, #1
|
||
800622e: f43f ae56 beq.w 8005ede <_printf_float+0xb6>
|
||
8006232: f108 0801 add.w r8, r8, #1
|
||
8006236: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8006238: 3b01 subs r3, #1
|
||
800623a: 4543 cmp r3, r8
|
||
800623c: dcf1 bgt.n 8006222 <_printf_float+0x3fa>
|
||
800623e: 4653 mov r3, sl
|
||
8006240: f104 0250 add.w r2, r4, #80 ; 0x50
|
||
8006244: e6e0 b.n 8006008 <_printf_float+0x1e0>
|
||
8006246: f04f 0800 mov.w r8, #0
|
||
800624a: f104 091a add.w r9, r4, #26
|
||
800624e: e7f2 b.n 8006236 <_printf_float+0x40e>
|
||
8006250: 2301 movs r3, #1
|
||
8006252: 4642 mov r2, r8
|
||
8006254: e7df b.n 8006216 <_printf_float+0x3ee>
|
||
8006256: 2301 movs r3, #1
|
||
8006258: 464a mov r2, r9
|
||
800625a: 4631 mov r1, r6
|
||
800625c: 4628 mov r0, r5
|
||
800625e: 47b8 blx r7
|
||
8006260: 3001 adds r0, #1
|
||
8006262: f43f ae3c beq.w 8005ede <_printf_float+0xb6>
|
||
8006266: f108 0801 add.w r8, r8, #1
|
||
800626a: 68e3 ldr r3, [r4, #12]
|
||
800626c: 990f ldr r1, [sp, #60] ; 0x3c
|
||
800626e: 1a5b subs r3, r3, r1
|
||
8006270: 4543 cmp r3, r8
|
||
8006272: dcf0 bgt.n 8006256 <_printf_float+0x42e>
|
||
8006274: e6fd b.n 8006072 <_printf_float+0x24a>
|
||
8006276: f04f 0800 mov.w r8, #0
|
||
800627a: f104 0919 add.w r9, r4, #25
|
||
800627e: e7f4 b.n 800626a <_printf_float+0x442>
|
||
|
||
08006280 <_printf_common>:
|
||
8006280: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8006284: 4616 mov r6, r2
|
||
8006286: 4699 mov r9, r3
|
||
8006288: 688a ldr r2, [r1, #8]
|
||
800628a: 690b ldr r3, [r1, #16]
|
||
800628c: 4607 mov r7, r0
|
||
800628e: 4293 cmp r3, r2
|
||
8006290: bfb8 it lt
|
||
8006292: 4613 movlt r3, r2
|
||
8006294: 6033 str r3, [r6, #0]
|
||
8006296: f891 2043 ldrb.w r2, [r1, #67] ; 0x43
|
||
800629a: 460c mov r4, r1
|
||
800629c: f8dd 8020 ldr.w r8, [sp, #32]
|
||
80062a0: b10a cbz r2, 80062a6 <_printf_common+0x26>
|
||
80062a2: 3301 adds r3, #1
|
||
80062a4: 6033 str r3, [r6, #0]
|
||
80062a6: 6823 ldr r3, [r4, #0]
|
||
80062a8: 0699 lsls r1, r3, #26
|
||
80062aa: bf42 ittt mi
|
||
80062ac: 6833 ldrmi r3, [r6, #0]
|
||
80062ae: 3302 addmi r3, #2
|
||
80062b0: 6033 strmi r3, [r6, #0]
|
||
80062b2: 6825 ldr r5, [r4, #0]
|
||
80062b4: f015 0506 ands.w r5, r5, #6
|
||
80062b8: d106 bne.n 80062c8 <_printf_common+0x48>
|
||
80062ba: f104 0a19 add.w sl, r4, #25
|
||
80062be: 68e3 ldr r3, [r4, #12]
|
||
80062c0: 6832 ldr r2, [r6, #0]
|
||
80062c2: 1a9b subs r3, r3, r2
|
||
80062c4: 42ab cmp r3, r5
|
||
80062c6: dc28 bgt.n 800631a <_printf_common+0x9a>
|
||
80062c8: f894 2043 ldrb.w r2, [r4, #67] ; 0x43
|
||
80062cc: 1e13 subs r3, r2, #0
|
||
80062ce: 6822 ldr r2, [r4, #0]
|
||
80062d0: bf18 it ne
|
||
80062d2: 2301 movne r3, #1
|
||
80062d4: 0692 lsls r2, r2, #26
|
||
80062d6: d42d bmi.n 8006334 <_printf_common+0xb4>
|
||
80062d8: 4649 mov r1, r9
|
||
80062da: 4638 mov r0, r7
|
||
80062dc: f104 0243 add.w r2, r4, #67 ; 0x43
|
||
80062e0: 47c0 blx r8
|
||
80062e2: 3001 adds r0, #1
|
||
80062e4: d020 beq.n 8006328 <_printf_common+0xa8>
|
||
80062e6: 6823 ldr r3, [r4, #0]
|
||
80062e8: 68e5 ldr r5, [r4, #12]
|
||
80062ea: f003 0306 and.w r3, r3, #6
|
||
80062ee: 2b04 cmp r3, #4
|
||
80062f0: bf18 it ne
|
||
80062f2: 2500 movne r5, #0
|
||
80062f4: 6832 ldr r2, [r6, #0]
|
||
80062f6: f04f 0600 mov.w r6, #0
|
||
80062fa: 68a3 ldr r3, [r4, #8]
|
||
80062fc: bf08 it eq
|
||
80062fe: 1aad subeq r5, r5, r2
|
||
8006300: 6922 ldr r2, [r4, #16]
|
||
8006302: bf08 it eq
|
||
8006304: ea25 75e5 biceq.w r5, r5, r5, asr #31
|
||
8006308: 4293 cmp r3, r2
|
||
800630a: bfc4 itt gt
|
||
800630c: 1a9b subgt r3, r3, r2
|
||
800630e: 18ed addgt r5, r5, r3
|
||
8006310: 341a adds r4, #26
|
||
8006312: 42b5 cmp r5, r6
|
||
8006314: d11a bne.n 800634c <_printf_common+0xcc>
|
||
8006316: 2000 movs r0, #0
|
||
8006318: e008 b.n 800632c <_printf_common+0xac>
|
||
800631a: 2301 movs r3, #1
|
||
800631c: 4652 mov r2, sl
|
||
800631e: 4649 mov r1, r9
|
||
8006320: 4638 mov r0, r7
|
||
8006322: 47c0 blx r8
|
||
8006324: 3001 adds r0, #1
|
||
8006326: d103 bne.n 8006330 <_printf_common+0xb0>
|
||
8006328: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
800632c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8006330: 3501 adds r5, #1
|
||
8006332: e7c4 b.n 80062be <_printf_common+0x3e>
|
||
8006334: 2030 movs r0, #48 ; 0x30
|
||
8006336: 18e1 adds r1, r4, r3
|
||
8006338: f881 0043 strb.w r0, [r1, #67] ; 0x43
|
||
800633c: 1c5a adds r2, r3, #1
|
||
800633e: f894 1045 ldrb.w r1, [r4, #69] ; 0x45
|
||
8006342: 4422 add r2, r4
|
||
8006344: 3302 adds r3, #2
|
||
8006346: f882 1043 strb.w r1, [r2, #67] ; 0x43
|
||
800634a: e7c5 b.n 80062d8 <_printf_common+0x58>
|
||
800634c: 2301 movs r3, #1
|
||
800634e: 4622 mov r2, r4
|
||
8006350: 4649 mov r1, r9
|
||
8006352: 4638 mov r0, r7
|
||
8006354: 47c0 blx r8
|
||
8006356: 3001 adds r0, #1
|
||
8006358: d0e6 beq.n 8006328 <_printf_common+0xa8>
|
||
800635a: 3601 adds r6, #1
|
||
800635c: e7d9 b.n 8006312 <_printf_common+0x92>
|
||
...
|
||
|
||
08006360 <_printf_i>:
|
||
8006360: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8006364: 460c mov r4, r1
|
||
8006366: 7e27 ldrb r7, [r4, #24]
|
||
8006368: 4691 mov r9, r2
|
||
800636a: 2f78 cmp r7, #120 ; 0x78
|
||
800636c: 4680 mov r8, r0
|
||
800636e: 469a mov sl, r3
|
||
8006370: 990c ldr r1, [sp, #48] ; 0x30
|
||
8006372: f104 0243 add.w r2, r4, #67 ; 0x43
|
||
8006376: d807 bhi.n 8006388 <_printf_i+0x28>
|
||
8006378: 2f62 cmp r7, #98 ; 0x62
|
||
800637a: d80a bhi.n 8006392 <_printf_i+0x32>
|
||
800637c: 2f00 cmp r7, #0
|
||
800637e: f000 80d9 beq.w 8006534 <_printf_i+0x1d4>
|
||
8006382: 2f58 cmp r7, #88 ; 0x58
|
||
8006384: f000 80a4 beq.w 80064d0 <_printf_i+0x170>
|
||
8006388: f104 0642 add.w r6, r4, #66 ; 0x42
|
||
800638c: f884 7042 strb.w r7, [r4, #66] ; 0x42
|
||
8006390: e03a b.n 8006408 <_printf_i+0xa8>
|
||
8006392: f1a7 0363 sub.w r3, r7, #99 ; 0x63
|
||
8006396: 2b15 cmp r3, #21
|
||
8006398: d8f6 bhi.n 8006388 <_printf_i+0x28>
|
||
800639a: a001 add r0, pc, #4 ; (adr r0, 80063a0 <_printf_i+0x40>)
|
||
800639c: f850 f023 ldr.w pc, [r0, r3, lsl #2]
|
||
80063a0: 080063f9 .word 0x080063f9
|
||
80063a4: 0800640d .word 0x0800640d
|
||
80063a8: 08006389 .word 0x08006389
|
||
80063ac: 08006389 .word 0x08006389
|
||
80063b0: 08006389 .word 0x08006389
|
||
80063b4: 08006389 .word 0x08006389
|
||
80063b8: 0800640d .word 0x0800640d
|
||
80063bc: 08006389 .word 0x08006389
|
||
80063c0: 08006389 .word 0x08006389
|
||
80063c4: 08006389 .word 0x08006389
|
||
80063c8: 08006389 .word 0x08006389
|
||
80063cc: 0800651b .word 0x0800651b
|
||
80063d0: 0800643d .word 0x0800643d
|
||
80063d4: 080064fd .word 0x080064fd
|
||
80063d8: 08006389 .word 0x08006389
|
||
80063dc: 08006389 .word 0x08006389
|
||
80063e0: 0800653d .word 0x0800653d
|
||
80063e4: 08006389 .word 0x08006389
|
||
80063e8: 0800643d .word 0x0800643d
|
||
80063ec: 08006389 .word 0x08006389
|
||
80063f0: 08006389 .word 0x08006389
|
||
80063f4: 08006505 .word 0x08006505
|
||
80063f8: 680b ldr r3, [r1, #0]
|
||
80063fa: f104 0642 add.w r6, r4, #66 ; 0x42
|
||
80063fe: 1d1a adds r2, r3, #4
|
||
8006400: 681b ldr r3, [r3, #0]
|
||
8006402: 600a str r2, [r1, #0]
|
||
8006404: f884 3042 strb.w r3, [r4, #66] ; 0x42
|
||
8006408: 2301 movs r3, #1
|
||
800640a: e0a4 b.n 8006556 <_printf_i+0x1f6>
|
||
800640c: 6825 ldr r5, [r4, #0]
|
||
800640e: 6808 ldr r0, [r1, #0]
|
||
8006410: 062e lsls r6, r5, #24
|
||
8006412: f100 0304 add.w r3, r0, #4
|
||
8006416: d50a bpl.n 800642e <_printf_i+0xce>
|
||
8006418: 6805 ldr r5, [r0, #0]
|
||
800641a: 600b str r3, [r1, #0]
|
||
800641c: 2d00 cmp r5, #0
|
||
800641e: da03 bge.n 8006428 <_printf_i+0xc8>
|
||
8006420: 232d movs r3, #45 ; 0x2d
|
||
8006422: 426d negs r5, r5
|
||
8006424: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
8006428: 230a movs r3, #10
|
||
800642a: 485e ldr r0, [pc, #376] ; (80065a4 <_printf_i+0x244>)
|
||
800642c: e019 b.n 8006462 <_printf_i+0x102>
|
||
800642e: f015 0f40 tst.w r5, #64 ; 0x40
|
||
8006432: 6805 ldr r5, [r0, #0]
|
||
8006434: 600b str r3, [r1, #0]
|
||
8006436: bf18 it ne
|
||
8006438: b22d sxthne r5, r5
|
||
800643a: e7ef b.n 800641c <_printf_i+0xbc>
|
||
800643c: 680b ldr r3, [r1, #0]
|
||
800643e: 6825 ldr r5, [r4, #0]
|
||
8006440: 1d18 adds r0, r3, #4
|
||
8006442: 6008 str r0, [r1, #0]
|
||
8006444: 0628 lsls r0, r5, #24
|
||
8006446: d501 bpl.n 800644c <_printf_i+0xec>
|
||
8006448: 681d ldr r5, [r3, #0]
|
||
800644a: e002 b.n 8006452 <_printf_i+0xf2>
|
||
800644c: 0669 lsls r1, r5, #25
|
||
800644e: d5fb bpl.n 8006448 <_printf_i+0xe8>
|
||
8006450: 881d ldrh r5, [r3, #0]
|
||
8006452: 2f6f cmp r7, #111 ; 0x6f
|
||
8006454: bf0c ite eq
|
||
8006456: 2308 moveq r3, #8
|
||
8006458: 230a movne r3, #10
|
||
800645a: 4852 ldr r0, [pc, #328] ; (80065a4 <_printf_i+0x244>)
|
||
800645c: 2100 movs r1, #0
|
||
800645e: f884 1043 strb.w r1, [r4, #67] ; 0x43
|
||
8006462: 6866 ldr r6, [r4, #4]
|
||
8006464: 2e00 cmp r6, #0
|
||
8006466: bfa8 it ge
|
||
8006468: 6821 ldrge r1, [r4, #0]
|
||
800646a: 60a6 str r6, [r4, #8]
|
||
800646c: bfa4 itt ge
|
||
800646e: f021 0104 bicge.w r1, r1, #4
|
||
8006472: 6021 strge r1, [r4, #0]
|
||
8006474: b90d cbnz r5, 800647a <_printf_i+0x11a>
|
||
8006476: 2e00 cmp r6, #0
|
||
8006478: d04d beq.n 8006516 <_printf_i+0x1b6>
|
||
800647a: 4616 mov r6, r2
|
||
800647c: fbb5 f1f3 udiv r1, r5, r3
|
||
8006480: fb03 5711 mls r7, r3, r1, r5
|
||
8006484: 5dc7 ldrb r7, [r0, r7]
|
||
8006486: f806 7d01 strb.w r7, [r6, #-1]!
|
||
800648a: 462f mov r7, r5
|
||
800648c: 42bb cmp r3, r7
|
||
800648e: 460d mov r5, r1
|
||
8006490: d9f4 bls.n 800647c <_printf_i+0x11c>
|
||
8006492: 2b08 cmp r3, #8
|
||
8006494: d10b bne.n 80064ae <_printf_i+0x14e>
|
||
8006496: 6823 ldr r3, [r4, #0]
|
||
8006498: 07df lsls r7, r3, #31
|
||
800649a: d508 bpl.n 80064ae <_printf_i+0x14e>
|
||
800649c: 6923 ldr r3, [r4, #16]
|
||
800649e: 6861 ldr r1, [r4, #4]
|
||
80064a0: 4299 cmp r1, r3
|
||
80064a2: bfde ittt le
|
||
80064a4: 2330 movle r3, #48 ; 0x30
|
||
80064a6: f806 3c01 strble.w r3, [r6, #-1]
|
||
80064aa: f106 36ff addle.w r6, r6, #4294967295 ; 0xffffffff
|
||
80064ae: 1b92 subs r2, r2, r6
|
||
80064b0: 6122 str r2, [r4, #16]
|
||
80064b2: 464b mov r3, r9
|
||
80064b4: 4621 mov r1, r4
|
||
80064b6: 4640 mov r0, r8
|
||
80064b8: f8cd a000 str.w sl, [sp]
|
||
80064bc: aa03 add r2, sp, #12
|
||
80064be: f7ff fedf bl 8006280 <_printf_common>
|
||
80064c2: 3001 adds r0, #1
|
||
80064c4: d14c bne.n 8006560 <_printf_i+0x200>
|
||
80064c6: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
80064ca: b004 add sp, #16
|
||
80064cc: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
80064d0: 4834 ldr r0, [pc, #208] ; (80065a4 <_printf_i+0x244>)
|
||
80064d2: f884 7045 strb.w r7, [r4, #69] ; 0x45
|
||
80064d6: 680e ldr r6, [r1, #0]
|
||
80064d8: 6823 ldr r3, [r4, #0]
|
||
80064da: f856 5b04 ldr.w r5, [r6], #4
|
||
80064de: 061f lsls r7, r3, #24
|
||
80064e0: 600e str r6, [r1, #0]
|
||
80064e2: d514 bpl.n 800650e <_printf_i+0x1ae>
|
||
80064e4: 07d9 lsls r1, r3, #31
|
||
80064e6: bf44 itt mi
|
||
80064e8: f043 0320 orrmi.w r3, r3, #32
|
||
80064ec: 6023 strmi r3, [r4, #0]
|
||
80064ee: b91d cbnz r5, 80064f8 <_printf_i+0x198>
|
||
80064f0: 6823 ldr r3, [r4, #0]
|
||
80064f2: f023 0320 bic.w r3, r3, #32
|
||
80064f6: 6023 str r3, [r4, #0]
|
||
80064f8: 2310 movs r3, #16
|
||
80064fa: e7af b.n 800645c <_printf_i+0xfc>
|
||
80064fc: 6823 ldr r3, [r4, #0]
|
||
80064fe: f043 0320 orr.w r3, r3, #32
|
||
8006502: 6023 str r3, [r4, #0]
|
||
8006504: 2378 movs r3, #120 ; 0x78
|
||
8006506: 4828 ldr r0, [pc, #160] ; (80065a8 <_printf_i+0x248>)
|
||
8006508: f884 3045 strb.w r3, [r4, #69] ; 0x45
|
||
800650c: e7e3 b.n 80064d6 <_printf_i+0x176>
|
||
800650e: 065e lsls r6, r3, #25
|
||
8006510: bf48 it mi
|
||
8006512: b2ad uxthmi r5, r5
|
||
8006514: e7e6 b.n 80064e4 <_printf_i+0x184>
|
||
8006516: 4616 mov r6, r2
|
||
8006518: e7bb b.n 8006492 <_printf_i+0x132>
|
||
800651a: 680b ldr r3, [r1, #0]
|
||
800651c: 6826 ldr r6, [r4, #0]
|
||
800651e: 1d1d adds r5, r3, #4
|
||
8006520: 6960 ldr r0, [r4, #20]
|
||
8006522: 600d str r5, [r1, #0]
|
||
8006524: 0635 lsls r5, r6, #24
|
||
8006526: 681b ldr r3, [r3, #0]
|
||
8006528: d501 bpl.n 800652e <_printf_i+0x1ce>
|
||
800652a: 6018 str r0, [r3, #0]
|
||
800652c: e002 b.n 8006534 <_printf_i+0x1d4>
|
||
800652e: 0671 lsls r1, r6, #25
|
||
8006530: d5fb bpl.n 800652a <_printf_i+0x1ca>
|
||
8006532: 8018 strh r0, [r3, #0]
|
||
8006534: 2300 movs r3, #0
|
||
8006536: 4616 mov r6, r2
|
||
8006538: 6123 str r3, [r4, #16]
|
||
800653a: e7ba b.n 80064b2 <_printf_i+0x152>
|
||
800653c: 680b ldr r3, [r1, #0]
|
||
800653e: 1d1a adds r2, r3, #4
|
||
8006540: 600a str r2, [r1, #0]
|
||
8006542: 681e ldr r6, [r3, #0]
|
||
8006544: 2100 movs r1, #0
|
||
8006546: 4630 mov r0, r6
|
||
8006548: 6862 ldr r2, [r4, #4]
|
||
800654a: f000 fedf bl 800730c <memchr>
|
||
800654e: b108 cbz r0, 8006554 <_printf_i+0x1f4>
|
||
8006550: 1b80 subs r0, r0, r6
|
||
8006552: 6060 str r0, [r4, #4]
|
||
8006554: 6863 ldr r3, [r4, #4]
|
||
8006556: 6123 str r3, [r4, #16]
|
||
8006558: 2300 movs r3, #0
|
||
800655a: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
||
800655e: e7a8 b.n 80064b2 <_printf_i+0x152>
|
||
8006560: 4632 mov r2, r6
|
||
8006562: 4649 mov r1, r9
|
||
8006564: 4640 mov r0, r8
|
||
8006566: 6923 ldr r3, [r4, #16]
|
||
8006568: 47d0 blx sl
|
||
800656a: 3001 adds r0, #1
|
||
800656c: d0ab beq.n 80064c6 <_printf_i+0x166>
|
||
800656e: 6823 ldr r3, [r4, #0]
|
||
8006570: 079b lsls r3, r3, #30
|
||
8006572: d413 bmi.n 800659c <_printf_i+0x23c>
|
||
8006574: 68e0 ldr r0, [r4, #12]
|
||
8006576: 9b03 ldr r3, [sp, #12]
|
||
8006578: 4298 cmp r0, r3
|
||
800657a: bfb8 it lt
|
||
800657c: 4618 movlt r0, r3
|
||
800657e: e7a4 b.n 80064ca <_printf_i+0x16a>
|
||
8006580: 2301 movs r3, #1
|
||
8006582: 4632 mov r2, r6
|
||
8006584: 4649 mov r1, r9
|
||
8006586: 4640 mov r0, r8
|
||
8006588: 47d0 blx sl
|
||
800658a: 3001 adds r0, #1
|
||
800658c: d09b beq.n 80064c6 <_printf_i+0x166>
|
||
800658e: 3501 adds r5, #1
|
||
8006590: 68e3 ldr r3, [r4, #12]
|
||
8006592: 9903 ldr r1, [sp, #12]
|
||
8006594: 1a5b subs r3, r3, r1
|
||
8006596: 42ab cmp r3, r5
|
||
8006598: dcf2 bgt.n 8006580 <_printf_i+0x220>
|
||
800659a: e7eb b.n 8006574 <_printf_i+0x214>
|
||
800659c: 2500 movs r5, #0
|
||
800659e: f104 0619 add.w r6, r4, #25
|
||
80065a2: e7f5 b.n 8006590 <_printf_i+0x230>
|
||
80065a4: 0800945e .word 0x0800945e
|
||
80065a8: 0800946f .word 0x0800946f
|
||
|
||
080065ac <_sbrk_r>:
|
||
80065ac: b538 push {r3, r4, r5, lr}
|
||
80065ae: 2300 movs r3, #0
|
||
80065b0: 4d05 ldr r5, [pc, #20] ; (80065c8 <_sbrk_r+0x1c>)
|
||
80065b2: 4604 mov r4, r0
|
||
80065b4: 4608 mov r0, r1
|
||
80065b6: 602b str r3, [r5, #0]
|
||
80065b8: f7fb f8d6 bl 8001768 <_sbrk>
|
||
80065bc: 1c43 adds r3, r0, #1
|
||
80065be: d102 bne.n 80065c6 <_sbrk_r+0x1a>
|
||
80065c0: 682b ldr r3, [r5, #0]
|
||
80065c2: b103 cbz r3, 80065c6 <_sbrk_r+0x1a>
|
||
80065c4: 6023 str r3, [r4, #0]
|
||
80065c6: bd38 pop {r3, r4, r5, pc}
|
||
80065c8: 2000033c .word 0x2000033c
|
||
|
||
080065cc <siprintf>:
|
||
80065cc: b40e push {r1, r2, r3}
|
||
80065ce: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000
|
||
80065d2: b500 push {lr}
|
||
80065d4: b09c sub sp, #112 ; 0x70
|
||
80065d6: ab1d add r3, sp, #116 ; 0x74
|
||
80065d8: 9002 str r0, [sp, #8]
|
||
80065da: 9006 str r0, [sp, #24]
|
||
80065dc: 9107 str r1, [sp, #28]
|
||
80065de: 9104 str r1, [sp, #16]
|
||
80065e0: 4808 ldr r0, [pc, #32] ; (8006604 <siprintf+0x38>)
|
||
80065e2: 4909 ldr r1, [pc, #36] ; (8006608 <siprintf+0x3c>)
|
||
80065e4: f853 2b04 ldr.w r2, [r3], #4
|
||
80065e8: 9105 str r1, [sp, #20]
|
||
80065ea: 6800 ldr r0, [r0, #0]
|
||
80065ec: a902 add r1, sp, #8
|
||
80065ee: 9301 str r3, [sp, #4]
|
||
80065f0: f001 faa0 bl 8007b34 <_svfiprintf_r>
|
||
80065f4: 2200 movs r2, #0
|
||
80065f6: 9b02 ldr r3, [sp, #8]
|
||
80065f8: 701a strb r2, [r3, #0]
|
||
80065fa: b01c add sp, #112 ; 0x70
|
||
80065fc: f85d eb04 ldr.w lr, [sp], #4
|
||
8006600: b003 add sp, #12
|
||
8006602: 4770 bx lr
|
||
8006604: 2000000c .word 0x2000000c
|
||
8006608: ffff0208 .word 0xffff0208
|
||
|
||
0800660c <quorem>:
|
||
800660c: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8006610: 6903 ldr r3, [r0, #16]
|
||
8006612: 690c ldr r4, [r1, #16]
|
||
8006614: 4607 mov r7, r0
|
||
8006616: 42a3 cmp r3, r4
|
||
8006618: f2c0 8083 blt.w 8006722 <quorem+0x116>
|
||
800661c: 3c01 subs r4, #1
|
||
800661e: f100 0514 add.w r5, r0, #20
|
||
8006622: f101 0814 add.w r8, r1, #20
|
||
8006626: eb05 0384 add.w r3, r5, r4, lsl #2
|
||
800662a: 9301 str r3, [sp, #4]
|
||
800662c: f858 3024 ldr.w r3, [r8, r4, lsl #2]
|
||
8006630: f855 2024 ldr.w r2, [r5, r4, lsl #2]
|
||
8006634: 3301 adds r3, #1
|
||
8006636: 429a cmp r2, r3
|
||
8006638: fbb2 f6f3 udiv r6, r2, r3
|
||
800663c: ea4f 0b84 mov.w fp, r4, lsl #2
|
||
8006640: eb08 0984 add.w r9, r8, r4, lsl #2
|
||
8006644: d332 bcc.n 80066ac <quorem+0xa0>
|
||
8006646: f04f 0e00 mov.w lr, #0
|
||
800664a: 4640 mov r0, r8
|
||
800664c: 46ac mov ip, r5
|
||
800664e: 46f2 mov sl, lr
|
||
8006650: f850 2b04 ldr.w r2, [r0], #4
|
||
8006654: b293 uxth r3, r2
|
||
8006656: fb06 e303 mla r3, r6, r3, lr
|
||
800665a: 0c12 lsrs r2, r2, #16
|
||
800665c: ea4f 4e13 mov.w lr, r3, lsr #16
|
||
8006660: fb06 e202 mla r2, r6, r2, lr
|
||
8006664: b29b uxth r3, r3
|
||
8006666: ebaa 0303 sub.w r3, sl, r3
|
||
800666a: f8dc a000 ldr.w sl, [ip]
|
||
800666e: ea4f 4e12 mov.w lr, r2, lsr #16
|
||
8006672: fa1f fa8a uxth.w sl, sl
|
||
8006676: 4453 add r3, sl
|
||
8006678: fa1f fa82 uxth.w sl, r2
|
||
800667c: f8dc 2000 ldr.w r2, [ip]
|
||
8006680: 4581 cmp r9, r0
|
||
8006682: ebca 4212 rsb r2, sl, r2, lsr #16
|
||
8006686: eb02 4223 add.w r2, r2, r3, asr #16
|
||
800668a: b29b uxth r3, r3
|
||
800668c: ea43 4302 orr.w r3, r3, r2, lsl #16
|
||
8006690: ea4f 4a22 mov.w sl, r2, asr #16
|
||
8006694: f84c 3b04 str.w r3, [ip], #4
|
||
8006698: d2da bcs.n 8006650 <quorem+0x44>
|
||
800669a: f855 300b ldr.w r3, [r5, fp]
|
||
800669e: b92b cbnz r3, 80066ac <quorem+0xa0>
|
||
80066a0: 9b01 ldr r3, [sp, #4]
|
||
80066a2: 3b04 subs r3, #4
|
||
80066a4: 429d cmp r5, r3
|
||
80066a6: 461a mov r2, r3
|
||
80066a8: d32f bcc.n 800670a <quorem+0xfe>
|
||
80066aa: 613c str r4, [r7, #16]
|
||
80066ac: 4638 mov r0, r7
|
||
80066ae: f001 f8cf bl 8007850 <__mcmp>
|
||
80066b2: 2800 cmp r0, #0
|
||
80066b4: db25 blt.n 8006702 <quorem+0xf6>
|
||
80066b6: 4628 mov r0, r5
|
||
80066b8: f04f 0c00 mov.w ip, #0
|
||
80066bc: 3601 adds r6, #1
|
||
80066be: f858 1b04 ldr.w r1, [r8], #4
|
||
80066c2: f8d0 e000 ldr.w lr, [r0]
|
||
80066c6: b28b uxth r3, r1
|
||
80066c8: ebac 0303 sub.w r3, ip, r3
|
||
80066cc: fa1f f28e uxth.w r2, lr
|
||
80066d0: 4413 add r3, r2
|
||
80066d2: 0c0a lsrs r2, r1, #16
|
||
80066d4: ebc2 421e rsb r2, r2, lr, lsr #16
|
||
80066d8: eb02 4223 add.w r2, r2, r3, asr #16
|
||
80066dc: b29b uxth r3, r3
|
||
80066de: ea43 4302 orr.w r3, r3, r2, lsl #16
|
||
80066e2: 45c1 cmp r9, r8
|
||
80066e4: ea4f 4c22 mov.w ip, r2, asr #16
|
||
80066e8: f840 3b04 str.w r3, [r0], #4
|
||
80066ec: d2e7 bcs.n 80066be <quorem+0xb2>
|
||
80066ee: f855 2024 ldr.w r2, [r5, r4, lsl #2]
|
||
80066f2: eb05 0384 add.w r3, r5, r4, lsl #2
|
||
80066f6: b922 cbnz r2, 8006702 <quorem+0xf6>
|
||
80066f8: 3b04 subs r3, #4
|
||
80066fa: 429d cmp r5, r3
|
||
80066fc: 461a mov r2, r3
|
||
80066fe: d30a bcc.n 8006716 <quorem+0x10a>
|
||
8006700: 613c str r4, [r7, #16]
|
||
8006702: 4630 mov r0, r6
|
||
8006704: b003 add sp, #12
|
||
8006706: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
800670a: 6812 ldr r2, [r2, #0]
|
||
800670c: 3b04 subs r3, #4
|
||
800670e: 2a00 cmp r2, #0
|
||
8006710: d1cb bne.n 80066aa <quorem+0x9e>
|
||
8006712: 3c01 subs r4, #1
|
||
8006714: e7c6 b.n 80066a4 <quorem+0x98>
|
||
8006716: 6812 ldr r2, [r2, #0]
|
||
8006718: 3b04 subs r3, #4
|
||
800671a: 2a00 cmp r2, #0
|
||
800671c: d1f0 bne.n 8006700 <quorem+0xf4>
|
||
800671e: 3c01 subs r4, #1
|
||
8006720: e7eb b.n 80066fa <quorem+0xee>
|
||
8006722: 2000 movs r0, #0
|
||
8006724: e7ee b.n 8006704 <quorem+0xf8>
|
||
...
|
||
|
||
08006728 <_dtoa_r>:
|
||
8006728: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
800672c: 4616 mov r6, r2
|
||
800672e: 461f mov r7, r3
|
||
8006730: 6a44 ldr r4, [r0, #36] ; 0x24
|
||
8006732: b099 sub sp, #100 ; 0x64
|
||
8006734: 4605 mov r5, r0
|
||
8006736: e9cd 6704 strd r6, r7, [sp, #16]
|
||
800673a: f8dd 8094 ldr.w r8, [sp, #148] ; 0x94
|
||
800673e: b974 cbnz r4, 800675e <_dtoa_r+0x36>
|
||
8006740: 2010 movs r0, #16
|
||
8006742: f7ff fa15 bl 8005b70 <malloc>
|
||
8006746: 4602 mov r2, r0
|
||
8006748: 6268 str r0, [r5, #36] ; 0x24
|
||
800674a: b920 cbnz r0, 8006756 <_dtoa_r+0x2e>
|
||
800674c: 21ea movs r1, #234 ; 0xea
|
||
800674e: 4bae ldr r3, [pc, #696] ; (8006a08 <_dtoa_r+0x2e0>)
|
||
8006750: 48ae ldr r0, [pc, #696] ; (8006a0c <_dtoa_r+0x2e4>)
|
||
8006752: f001 faef bl 8007d34 <__assert_func>
|
||
8006756: e9c0 4401 strd r4, r4, [r0, #4]
|
||
800675a: 6004 str r4, [r0, #0]
|
||
800675c: 60c4 str r4, [r0, #12]
|
||
800675e: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
8006760: 6819 ldr r1, [r3, #0]
|
||
8006762: b151 cbz r1, 800677a <_dtoa_r+0x52>
|
||
8006764: 685a ldr r2, [r3, #4]
|
||
8006766: 2301 movs r3, #1
|
||
8006768: 4093 lsls r3, r2
|
||
800676a: 604a str r2, [r1, #4]
|
||
800676c: 608b str r3, [r1, #8]
|
||
800676e: 4628 mov r0, r5
|
||
8006770: f000 fe34 bl 80073dc <_Bfree>
|
||
8006774: 2200 movs r2, #0
|
||
8006776: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
8006778: 601a str r2, [r3, #0]
|
||
800677a: 1e3b subs r3, r7, #0
|
||
800677c: bfaf iteee ge
|
||
800677e: 2300 movge r3, #0
|
||
8006780: 2201 movlt r2, #1
|
||
8006782: f023 4300 biclt.w r3, r3, #2147483648 ; 0x80000000
|
||
8006786: 9305 strlt r3, [sp, #20]
|
||
8006788: bfa8 it ge
|
||
800678a: f8c8 3000 strge.w r3, [r8]
|
||
800678e: f8dd 9014 ldr.w r9, [sp, #20]
|
||
8006792: 4b9f ldr r3, [pc, #636] ; (8006a10 <_dtoa_r+0x2e8>)
|
||
8006794: bfb8 it lt
|
||
8006796: f8c8 2000 strlt.w r2, [r8]
|
||
800679a: ea33 0309 bics.w r3, r3, r9
|
||
800679e: d119 bne.n 80067d4 <_dtoa_r+0xac>
|
||
80067a0: f242 730f movw r3, #9999 ; 0x270f
|
||
80067a4: 9a24 ldr r2, [sp, #144] ; 0x90
|
||
80067a6: 6013 str r3, [r2, #0]
|
||
80067a8: f3c9 0313 ubfx r3, r9, #0, #20
|
||
80067ac: 4333 orrs r3, r6
|
||
80067ae: f000 8580 beq.w 80072b2 <_dtoa_r+0xb8a>
|
||
80067b2: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
80067b4: b953 cbnz r3, 80067cc <_dtoa_r+0xa4>
|
||
80067b6: 4b97 ldr r3, [pc, #604] ; (8006a14 <_dtoa_r+0x2ec>)
|
||
80067b8: e022 b.n 8006800 <_dtoa_r+0xd8>
|
||
80067ba: 4b97 ldr r3, [pc, #604] ; (8006a18 <_dtoa_r+0x2f0>)
|
||
80067bc: 9308 str r3, [sp, #32]
|
||
80067be: 3308 adds r3, #8
|
||
80067c0: 9a26 ldr r2, [sp, #152] ; 0x98
|
||
80067c2: 6013 str r3, [r2, #0]
|
||
80067c4: 9808 ldr r0, [sp, #32]
|
||
80067c6: b019 add sp, #100 ; 0x64
|
||
80067c8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
80067cc: 4b91 ldr r3, [pc, #580] ; (8006a14 <_dtoa_r+0x2ec>)
|
||
80067ce: 9308 str r3, [sp, #32]
|
||
80067d0: 3303 adds r3, #3
|
||
80067d2: e7f5 b.n 80067c0 <_dtoa_r+0x98>
|
||
80067d4: e9dd 3404 ldrd r3, r4, [sp, #16]
|
||
80067d8: e9cd 340c strd r3, r4, [sp, #48] ; 0x30
|
||
80067dc: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
80067e0: 2200 movs r2, #0
|
||
80067e2: 2300 movs r3, #0
|
||
80067e4: f7fa f94c bl 8000a80 <__aeabi_dcmpeq>
|
||
80067e8: 4680 mov r8, r0
|
||
80067ea: b158 cbz r0, 8006804 <_dtoa_r+0xdc>
|
||
80067ec: 2301 movs r3, #1
|
||
80067ee: 9a24 ldr r2, [sp, #144] ; 0x90
|
||
80067f0: 6013 str r3, [r2, #0]
|
||
80067f2: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
80067f4: 2b00 cmp r3, #0
|
||
80067f6: f000 8559 beq.w 80072ac <_dtoa_r+0xb84>
|
||
80067fa: 4888 ldr r0, [pc, #544] ; (8006a1c <_dtoa_r+0x2f4>)
|
||
80067fc: 6018 str r0, [r3, #0]
|
||
80067fe: 1e43 subs r3, r0, #1
|
||
8006800: 9308 str r3, [sp, #32]
|
||
8006802: e7df b.n 80067c4 <_dtoa_r+0x9c>
|
||
8006804: ab16 add r3, sp, #88 ; 0x58
|
||
8006806: 9301 str r3, [sp, #4]
|
||
8006808: ab17 add r3, sp, #92 ; 0x5c
|
||
800680a: 9300 str r3, [sp, #0]
|
||
800680c: 4628 mov r0, r5
|
||
800680e: e9dd 230c ldrd r2, r3, [sp, #48] ; 0x30
|
||
8006812: f001 f8c9 bl 80079a8 <__d2b>
|
||
8006816: f3c9 540a ubfx r4, r9, #20, #11
|
||
800681a: 4682 mov sl, r0
|
||
800681c: 2c00 cmp r4, #0
|
||
800681e: d07e beq.n 800691e <_dtoa_r+0x1f6>
|
||
8006820: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
8006824: 9b0d ldr r3, [sp, #52] ; 0x34
|
||
8006826: f2a4 34ff subw r4, r4, #1023 ; 0x3ff
|
||
800682a: f3c3 0313 ubfx r3, r3, #0, #20
|
||
800682e: f043 517f orr.w r1, r3, #1069547520 ; 0x3fc00000
|
||
8006832: f441 1140 orr.w r1, r1, #3145728 ; 0x300000
|
||
8006836: f8cd 804c str.w r8, [sp, #76] ; 0x4c
|
||
800683a: 2200 movs r2, #0
|
||
800683c: 4b78 ldr r3, [pc, #480] ; (8006a20 <_dtoa_r+0x2f8>)
|
||
800683e: f7f9 fcff bl 8000240 <__aeabi_dsub>
|
||
8006842: a36b add r3, pc, #428 ; (adr r3, 80069f0 <_dtoa_r+0x2c8>)
|
||
8006844: e9d3 2300 ldrd r2, r3, [r3]
|
||
8006848: f7f9 feb2 bl 80005b0 <__aeabi_dmul>
|
||
800684c: a36a add r3, pc, #424 ; (adr r3, 80069f8 <_dtoa_r+0x2d0>)
|
||
800684e: e9d3 2300 ldrd r2, r3, [r3]
|
||
8006852: f7f9 fcf7 bl 8000244 <__adddf3>
|
||
8006856: 4606 mov r6, r0
|
||
8006858: 4620 mov r0, r4
|
||
800685a: 460f mov r7, r1
|
||
800685c: f7f9 fe3e bl 80004dc <__aeabi_i2d>
|
||
8006860: a367 add r3, pc, #412 ; (adr r3, 8006a00 <_dtoa_r+0x2d8>)
|
||
8006862: e9d3 2300 ldrd r2, r3, [r3]
|
||
8006866: f7f9 fea3 bl 80005b0 <__aeabi_dmul>
|
||
800686a: 4602 mov r2, r0
|
||
800686c: 460b mov r3, r1
|
||
800686e: 4630 mov r0, r6
|
||
8006870: 4639 mov r1, r7
|
||
8006872: f7f9 fce7 bl 8000244 <__adddf3>
|
||
8006876: 4606 mov r6, r0
|
||
8006878: 460f mov r7, r1
|
||
800687a: f7fa f949 bl 8000b10 <__aeabi_d2iz>
|
||
800687e: 2200 movs r2, #0
|
||
8006880: 4681 mov r9, r0
|
||
8006882: 2300 movs r3, #0
|
||
8006884: 4630 mov r0, r6
|
||
8006886: 4639 mov r1, r7
|
||
8006888: f7fa f904 bl 8000a94 <__aeabi_dcmplt>
|
||
800688c: b148 cbz r0, 80068a2 <_dtoa_r+0x17a>
|
||
800688e: 4648 mov r0, r9
|
||
8006890: f7f9 fe24 bl 80004dc <__aeabi_i2d>
|
||
8006894: 4632 mov r2, r6
|
||
8006896: 463b mov r3, r7
|
||
8006898: f7fa f8f2 bl 8000a80 <__aeabi_dcmpeq>
|
||
800689c: b908 cbnz r0, 80068a2 <_dtoa_r+0x17a>
|
||
800689e: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff
|
||
80068a2: f1b9 0f16 cmp.w r9, #22
|
||
80068a6: d857 bhi.n 8006958 <_dtoa_r+0x230>
|
||
80068a8: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
80068ac: 4b5d ldr r3, [pc, #372] ; (8006a24 <_dtoa_r+0x2fc>)
|
||
80068ae: eb03 03c9 add.w r3, r3, r9, lsl #3
|
||
80068b2: e9d3 2300 ldrd r2, r3, [r3]
|
||
80068b6: f7fa f8ed bl 8000a94 <__aeabi_dcmplt>
|
||
80068ba: 2800 cmp r0, #0
|
||
80068bc: d04e beq.n 800695c <_dtoa_r+0x234>
|
||
80068be: 2300 movs r3, #0
|
||
80068c0: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff
|
||
80068c4: 930f str r3, [sp, #60] ; 0x3c
|
||
80068c6: 9b16 ldr r3, [sp, #88] ; 0x58
|
||
80068c8: 1b1c subs r4, r3, r4
|
||
80068ca: 1e63 subs r3, r4, #1
|
||
80068cc: 9309 str r3, [sp, #36] ; 0x24
|
||
80068ce: bf49 itett mi
|
||
80068d0: f1c4 0301 rsbmi r3, r4, #1
|
||
80068d4: 2300 movpl r3, #0
|
||
80068d6: 9306 strmi r3, [sp, #24]
|
||
80068d8: 2300 movmi r3, #0
|
||
80068da: bf54 ite pl
|
||
80068dc: 9306 strpl r3, [sp, #24]
|
||
80068de: 9309 strmi r3, [sp, #36] ; 0x24
|
||
80068e0: f1b9 0f00 cmp.w r9, #0
|
||
80068e4: db3c blt.n 8006960 <_dtoa_r+0x238>
|
||
80068e6: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
80068e8: f8cd 9038 str.w r9, [sp, #56] ; 0x38
|
||
80068ec: 444b add r3, r9
|
||
80068ee: 9309 str r3, [sp, #36] ; 0x24
|
||
80068f0: 2300 movs r3, #0
|
||
80068f2: 930a str r3, [sp, #40] ; 0x28
|
||
80068f4: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
80068f6: 2b09 cmp r3, #9
|
||
80068f8: d86c bhi.n 80069d4 <_dtoa_r+0x2ac>
|
||
80068fa: 2b05 cmp r3, #5
|
||
80068fc: bfc4 itt gt
|
||
80068fe: 3b04 subgt r3, #4
|
||
8006900: 9322 strgt r3, [sp, #136] ; 0x88
|
||
8006902: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8006904: bfc8 it gt
|
||
8006906: 2400 movgt r4, #0
|
||
8006908: f1a3 0302 sub.w r3, r3, #2
|
||
800690c: bfd8 it le
|
||
800690e: 2401 movle r4, #1
|
||
8006910: 2b03 cmp r3, #3
|
||
8006912: f200 808b bhi.w 8006a2c <_dtoa_r+0x304>
|
||
8006916: e8df f003 tbb [pc, r3]
|
||
800691a: 4f2d .short 0x4f2d
|
||
800691c: 5b4d .short 0x5b4d
|
||
800691e: e9dd 4316 ldrd r4, r3, [sp, #88] ; 0x58
|
||
8006922: 441c add r4, r3
|
||
8006924: f204 4332 addw r3, r4, #1074 ; 0x432
|
||
8006928: 2b20 cmp r3, #32
|
||
800692a: bfc3 ittte gt
|
||
800692c: f1c3 0340 rsbgt r3, r3, #64 ; 0x40
|
||
8006930: f204 4012 addwgt r0, r4, #1042 ; 0x412
|
||
8006934: fa09 f303 lslgt.w r3, r9, r3
|
||
8006938: f1c3 0320 rsble r3, r3, #32
|
||
800693c: bfc6 itte gt
|
||
800693e: fa26 f000 lsrgt.w r0, r6, r0
|
||
8006942: 4318 orrgt r0, r3
|
||
8006944: fa06 f003 lslle.w r0, r6, r3
|
||
8006948: f7f9 fdb8 bl 80004bc <__aeabi_ui2d>
|
||
800694c: 2301 movs r3, #1
|
||
800694e: f1a1 71f8 sub.w r1, r1, #32505856 ; 0x1f00000
|
||
8006952: 3c01 subs r4, #1
|
||
8006954: 9313 str r3, [sp, #76] ; 0x4c
|
||
8006956: e770 b.n 800683a <_dtoa_r+0x112>
|
||
8006958: 2301 movs r3, #1
|
||
800695a: e7b3 b.n 80068c4 <_dtoa_r+0x19c>
|
||
800695c: 900f str r0, [sp, #60] ; 0x3c
|
||
800695e: e7b2 b.n 80068c6 <_dtoa_r+0x19e>
|
||
8006960: 9b06 ldr r3, [sp, #24]
|
||
8006962: eba3 0309 sub.w r3, r3, r9
|
||
8006966: 9306 str r3, [sp, #24]
|
||
8006968: f1c9 0300 rsb r3, r9, #0
|
||
800696c: 930a str r3, [sp, #40] ; 0x28
|
||
800696e: 2300 movs r3, #0
|
||
8006970: 930e str r3, [sp, #56] ; 0x38
|
||
8006972: e7bf b.n 80068f4 <_dtoa_r+0x1cc>
|
||
8006974: 2300 movs r3, #0
|
||
8006976: 930b str r3, [sp, #44] ; 0x2c
|
||
8006978: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
800697a: 2b00 cmp r3, #0
|
||
800697c: dc59 bgt.n 8006a32 <_dtoa_r+0x30a>
|
||
800697e: f04f 0b01 mov.w fp, #1
|
||
8006982: 465b mov r3, fp
|
||
8006984: f8cd b008 str.w fp, [sp, #8]
|
||
8006988: f8cd b08c str.w fp, [sp, #140] ; 0x8c
|
||
800698c: 2200 movs r2, #0
|
||
800698e: 6a68 ldr r0, [r5, #36] ; 0x24
|
||
8006990: 6042 str r2, [r0, #4]
|
||
8006992: 2204 movs r2, #4
|
||
8006994: f102 0614 add.w r6, r2, #20
|
||
8006998: 429e cmp r6, r3
|
||
800699a: 6841 ldr r1, [r0, #4]
|
||
800699c: d94f bls.n 8006a3e <_dtoa_r+0x316>
|
||
800699e: 4628 mov r0, r5
|
||
80069a0: f000 fcdc bl 800735c <_Balloc>
|
||
80069a4: 9008 str r0, [sp, #32]
|
||
80069a6: 2800 cmp r0, #0
|
||
80069a8: d14d bne.n 8006a46 <_dtoa_r+0x31e>
|
||
80069aa: 4602 mov r2, r0
|
||
80069ac: f44f 71d5 mov.w r1, #426 ; 0x1aa
|
||
80069b0: 4b1d ldr r3, [pc, #116] ; (8006a28 <_dtoa_r+0x300>)
|
||
80069b2: e6cd b.n 8006750 <_dtoa_r+0x28>
|
||
80069b4: 2301 movs r3, #1
|
||
80069b6: e7de b.n 8006976 <_dtoa_r+0x24e>
|
||
80069b8: 2300 movs r3, #0
|
||
80069ba: 930b str r3, [sp, #44] ; 0x2c
|
||
80069bc: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
80069be: eb09 0b03 add.w fp, r9, r3
|
||
80069c2: f10b 0301 add.w r3, fp, #1
|
||
80069c6: 2b01 cmp r3, #1
|
||
80069c8: 9302 str r3, [sp, #8]
|
||
80069ca: bfb8 it lt
|
||
80069cc: 2301 movlt r3, #1
|
||
80069ce: e7dd b.n 800698c <_dtoa_r+0x264>
|
||
80069d0: 2301 movs r3, #1
|
||
80069d2: e7f2 b.n 80069ba <_dtoa_r+0x292>
|
||
80069d4: 2401 movs r4, #1
|
||
80069d6: 2300 movs r3, #0
|
||
80069d8: 940b str r4, [sp, #44] ; 0x2c
|
||
80069da: 9322 str r3, [sp, #136] ; 0x88
|
||
80069dc: f04f 3bff mov.w fp, #4294967295 ; 0xffffffff
|
||
80069e0: 2200 movs r2, #0
|
||
80069e2: 2312 movs r3, #18
|
||
80069e4: f8cd b008 str.w fp, [sp, #8]
|
||
80069e8: 9223 str r2, [sp, #140] ; 0x8c
|
||
80069ea: e7cf b.n 800698c <_dtoa_r+0x264>
|
||
80069ec: f3af 8000 nop.w
|
||
80069f0: 636f4361 .word 0x636f4361
|
||
80069f4: 3fd287a7 .word 0x3fd287a7
|
||
80069f8: 8b60c8b3 .word 0x8b60c8b3
|
||
80069fc: 3fc68a28 .word 0x3fc68a28
|
||
8006a00: 509f79fb .word 0x509f79fb
|
||
8006a04: 3fd34413 .word 0x3fd34413
|
||
8006a08: 0800948d .word 0x0800948d
|
||
8006a0c: 080094a4 .word 0x080094a4
|
||
8006a10: 7ff00000 .word 0x7ff00000
|
||
8006a14: 08009489 .word 0x08009489
|
||
8006a18: 08009480 .word 0x08009480
|
||
8006a1c: 0800945d .word 0x0800945d
|
||
8006a20: 3ff80000 .word 0x3ff80000
|
||
8006a24: 080095a0 .word 0x080095a0
|
||
8006a28: 08009503 .word 0x08009503
|
||
8006a2c: 2301 movs r3, #1
|
||
8006a2e: 930b str r3, [sp, #44] ; 0x2c
|
||
8006a30: e7d4 b.n 80069dc <_dtoa_r+0x2b4>
|
||
8006a32: f8dd b08c ldr.w fp, [sp, #140] ; 0x8c
|
||
8006a36: 465b mov r3, fp
|
||
8006a38: f8cd b008 str.w fp, [sp, #8]
|
||
8006a3c: e7a6 b.n 800698c <_dtoa_r+0x264>
|
||
8006a3e: 3101 adds r1, #1
|
||
8006a40: 6041 str r1, [r0, #4]
|
||
8006a42: 0052 lsls r2, r2, #1
|
||
8006a44: e7a6 b.n 8006994 <_dtoa_r+0x26c>
|
||
8006a46: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
8006a48: 9a08 ldr r2, [sp, #32]
|
||
8006a4a: 601a str r2, [r3, #0]
|
||
8006a4c: 9b02 ldr r3, [sp, #8]
|
||
8006a4e: 2b0e cmp r3, #14
|
||
8006a50: f200 80a8 bhi.w 8006ba4 <_dtoa_r+0x47c>
|
||
8006a54: 2c00 cmp r4, #0
|
||
8006a56: f000 80a5 beq.w 8006ba4 <_dtoa_r+0x47c>
|
||
8006a5a: f1b9 0f00 cmp.w r9, #0
|
||
8006a5e: dd34 ble.n 8006aca <_dtoa_r+0x3a2>
|
||
8006a60: 4a9a ldr r2, [pc, #616] ; (8006ccc <_dtoa_r+0x5a4>)
|
||
8006a62: f009 030f and.w r3, r9, #15
|
||
8006a66: eb02 03c3 add.w r3, r2, r3, lsl #3
|
||
8006a6a: f419 7f80 tst.w r9, #256 ; 0x100
|
||
8006a6e: e9d3 3400 ldrd r3, r4, [r3]
|
||
8006a72: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40
|
||
8006a76: ea4f 1429 mov.w r4, r9, asr #4
|
||
8006a7a: d016 beq.n 8006aaa <_dtoa_r+0x382>
|
||
8006a7c: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
8006a80: 4b93 ldr r3, [pc, #588] ; (8006cd0 <_dtoa_r+0x5a8>)
|
||
8006a82: 2703 movs r7, #3
|
||
8006a84: e9d3 2308 ldrd r2, r3, [r3, #32]
|
||
8006a88: f7f9 febc bl 8000804 <__aeabi_ddiv>
|
||
8006a8c: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8006a90: f004 040f and.w r4, r4, #15
|
||
8006a94: 4e8e ldr r6, [pc, #568] ; (8006cd0 <_dtoa_r+0x5a8>)
|
||
8006a96: b954 cbnz r4, 8006aae <_dtoa_r+0x386>
|
||
8006a98: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
8006a9c: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006aa0: f7f9 feb0 bl 8000804 <__aeabi_ddiv>
|
||
8006aa4: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8006aa8: e029 b.n 8006afe <_dtoa_r+0x3d6>
|
||
8006aaa: 2702 movs r7, #2
|
||
8006aac: e7f2 b.n 8006a94 <_dtoa_r+0x36c>
|
||
8006aae: 07e1 lsls r1, r4, #31
|
||
8006ab0: d508 bpl.n 8006ac4 <_dtoa_r+0x39c>
|
||
8006ab2: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
8006ab6: e9d6 2300 ldrd r2, r3, [r6]
|
||
8006aba: f7f9 fd79 bl 80005b0 <__aeabi_dmul>
|
||
8006abe: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
8006ac2: 3701 adds r7, #1
|
||
8006ac4: 1064 asrs r4, r4, #1
|
||
8006ac6: 3608 adds r6, #8
|
||
8006ac8: e7e5 b.n 8006a96 <_dtoa_r+0x36e>
|
||
8006aca: f000 80a5 beq.w 8006c18 <_dtoa_r+0x4f0>
|
||
8006ace: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
||
8006ad2: f1c9 0400 rsb r4, r9, #0
|
||
8006ad6: 4b7d ldr r3, [pc, #500] ; (8006ccc <_dtoa_r+0x5a4>)
|
||
8006ad8: f004 020f and.w r2, r4, #15
|
||
8006adc: eb03 03c2 add.w r3, r3, r2, lsl #3
|
||
8006ae0: e9d3 2300 ldrd r2, r3, [r3]
|
||
8006ae4: f7f9 fd64 bl 80005b0 <__aeabi_dmul>
|
||
8006ae8: 2702 movs r7, #2
|
||
8006aea: 2300 movs r3, #0
|
||
8006aec: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8006af0: 4e77 ldr r6, [pc, #476] ; (8006cd0 <_dtoa_r+0x5a8>)
|
||
8006af2: 1124 asrs r4, r4, #4
|
||
8006af4: 2c00 cmp r4, #0
|
||
8006af6: f040 8084 bne.w 8006c02 <_dtoa_r+0x4da>
|
||
8006afa: 2b00 cmp r3, #0
|
||
8006afc: d1d2 bne.n 8006aa4 <_dtoa_r+0x37c>
|
||
8006afe: 9b0f ldr r3, [sp, #60] ; 0x3c
|
||
8006b00: 2b00 cmp r3, #0
|
||
8006b02: f000 808b beq.w 8006c1c <_dtoa_r+0x4f4>
|
||
8006b06: e9dd 3404 ldrd r3, r4, [sp, #16]
|
||
8006b0a: e9cd 3410 strd r3, r4, [sp, #64] ; 0x40
|
||
8006b0e: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
8006b12: 2200 movs r2, #0
|
||
8006b14: 4b6f ldr r3, [pc, #444] ; (8006cd4 <_dtoa_r+0x5ac>)
|
||
8006b16: f7f9 ffbd bl 8000a94 <__aeabi_dcmplt>
|
||
8006b1a: 2800 cmp r0, #0
|
||
8006b1c: d07e beq.n 8006c1c <_dtoa_r+0x4f4>
|
||
8006b1e: 9b02 ldr r3, [sp, #8]
|
||
8006b20: 2b00 cmp r3, #0
|
||
8006b22: d07b beq.n 8006c1c <_dtoa_r+0x4f4>
|
||
8006b24: f1bb 0f00 cmp.w fp, #0
|
||
8006b28: dd38 ble.n 8006b9c <_dtoa_r+0x474>
|
||
8006b2a: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
8006b2e: 2200 movs r2, #0
|
||
8006b30: 4b69 ldr r3, [pc, #420] ; (8006cd8 <_dtoa_r+0x5b0>)
|
||
8006b32: f7f9 fd3d bl 80005b0 <__aeabi_dmul>
|
||
8006b36: 465c mov r4, fp
|
||
8006b38: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8006b3c: f109 38ff add.w r8, r9, #4294967295 ; 0xffffffff
|
||
8006b40: 3701 adds r7, #1
|
||
8006b42: 4638 mov r0, r7
|
||
8006b44: f7f9 fcca bl 80004dc <__aeabi_i2d>
|
||
8006b48: e9dd 2304 ldrd r2, r3, [sp, #16]
|
||
8006b4c: f7f9 fd30 bl 80005b0 <__aeabi_dmul>
|
||
8006b50: 2200 movs r2, #0
|
||
8006b52: 4b62 ldr r3, [pc, #392] ; (8006cdc <_dtoa_r+0x5b4>)
|
||
8006b54: f7f9 fb76 bl 8000244 <__adddf3>
|
||
8006b58: f1a1 7650 sub.w r6, r1, #54525952 ; 0x3400000
|
||
8006b5c: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
8006b60: 9611 str r6, [sp, #68] ; 0x44
|
||
8006b62: 2c00 cmp r4, #0
|
||
8006b64: d15d bne.n 8006c22 <_dtoa_r+0x4fa>
|
||
8006b66: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006b6a: 2200 movs r2, #0
|
||
8006b6c: 4b5c ldr r3, [pc, #368] ; (8006ce0 <_dtoa_r+0x5b8>)
|
||
8006b6e: f7f9 fb67 bl 8000240 <__aeabi_dsub>
|
||
8006b72: 4602 mov r2, r0
|
||
8006b74: 460b mov r3, r1
|
||
8006b76: e9cd 2304 strd r2, r3, [sp, #16]
|
||
8006b7a: 4633 mov r3, r6
|
||
8006b7c: 9a10 ldr r2, [sp, #64] ; 0x40
|
||
8006b7e: f7f9 ffa7 bl 8000ad0 <__aeabi_dcmpgt>
|
||
8006b82: 2800 cmp r0, #0
|
||
8006b84: f040 829e bne.w 80070c4 <_dtoa_r+0x99c>
|
||
8006b88: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006b8c: 9a10 ldr r2, [sp, #64] ; 0x40
|
||
8006b8e: f106 4300 add.w r3, r6, #2147483648 ; 0x80000000
|
||
8006b92: f7f9 ff7f bl 8000a94 <__aeabi_dcmplt>
|
||
8006b96: 2800 cmp r0, #0
|
||
8006b98: f040 8292 bne.w 80070c0 <_dtoa_r+0x998>
|
||
8006b9c: e9dd 340c ldrd r3, r4, [sp, #48] ; 0x30
|
||
8006ba0: e9cd 3404 strd r3, r4, [sp, #16]
|
||
8006ba4: 9b17 ldr r3, [sp, #92] ; 0x5c
|
||
8006ba6: 2b00 cmp r3, #0
|
||
8006ba8: f2c0 8153 blt.w 8006e52 <_dtoa_r+0x72a>
|
||
8006bac: f1b9 0f0e cmp.w r9, #14
|
||
8006bb0: f300 814f bgt.w 8006e52 <_dtoa_r+0x72a>
|
||
8006bb4: 4b45 ldr r3, [pc, #276] ; (8006ccc <_dtoa_r+0x5a4>)
|
||
8006bb6: eb03 03c9 add.w r3, r3, r9, lsl #3
|
||
8006bba: e9d3 3400 ldrd r3, r4, [r3]
|
||
8006bbe: e9cd 3406 strd r3, r4, [sp, #24]
|
||
8006bc2: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
8006bc4: 2b00 cmp r3, #0
|
||
8006bc6: f280 80db bge.w 8006d80 <_dtoa_r+0x658>
|
||
8006bca: 9b02 ldr r3, [sp, #8]
|
||
8006bcc: 2b00 cmp r3, #0
|
||
8006bce: f300 80d7 bgt.w 8006d80 <_dtoa_r+0x658>
|
||
8006bd2: f040 8274 bne.w 80070be <_dtoa_r+0x996>
|
||
8006bd6: e9dd 0106 ldrd r0, r1, [sp, #24]
|
||
8006bda: 2200 movs r2, #0
|
||
8006bdc: 4b40 ldr r3, [pc, #256] ; (8006ce0 <_dtoa_r+0x5b8>)
|
||
8006bde: f7f9 fce7 bl 80005b0 <__aeabi_dmul>
|
||
8006be2: e9dd 2304 ldrd r2, r3, [sp, #16]
|
||
8006be6: f7f9 ff69 bl 8000abc <__aeabi_dcmpge>
|
||
8006bea: 9c02 ldr r4, [sp, #8]
|
||
8006bec: 4626 mov r6, r4
|
||
8006bee: 2800 cmp r0, #0
|
||
8006bf0: f040 824a bne.w 8007088 <_dtoa_r+0x960>
|
||
8006bf4: 2331 movs r3, #49 ; 0x31
|
||
8006bf6: 9f08 ldr r7, [sp, #32]
|
||
8006bf8: f109 0901 add.w r9, r9, #1
|
||
8006bfc: f807 3b01 strb.w r3, [r7], #1
|
||
8006c00: e246 b.n 8007090 <_dtoa_r+0x968>
|
||
8006c02: 07e2 lsls r2, r4, #31
|
||
8006c04: d505 bpl.n 8006c12 <_dtoa_r+0x4ea>
|
||
8006c06: e9d6 2300 ldrd r2, r3, [r6]
|
||
8006c0a: f7f9 fcd1 bl 80005b0 <__aeabi_dmul>
|
||
8006c0e: 2301 movs r3, #1
|
||
8006c10: 3701 adds r7, #1
|
||
8006c12: 1064 asrs r4, r4, #1
|
||
8006c14: 3608 adds r6, #8
|
||
8006c16: e76d b.n 8006af4 <_dtoa_r+0x3cc>
|
||
8006c18: 2702 movs r7, #2
|
||
8006c1a: e770 b.n 8006afe <_dtoa_r+0x3d6>
|
||
8006c1c: 46c8 mov r8, r9
|
||
8006c1e: 9c02 ldr r4, [sp, #8]
|
||
8006c20: e78f b.n 8006b42 <_dtoa_r+0x41a>
|
||
8006c22: 9908 ldr r1, [sp, #32]
|
||
8006c24: 4b29 ldr r3, [pc, #164] ; (8006ccc <_dtoa_r+0x5a4>)
|
||
8006c26: 4421 add r1, r4
|
||
8006c28: 9112 str r1, [sp, #72] ; 0x48
|
||
8006c2a: 990b ldr r1, [sp, #44] ; 0x2c
|
||
8006c2c: eb03 03c4 add.w r3, r3, r4, lsl #3
|
||
8006c30: e9dd 6710 ldrd r6, r7, [sp, #64] ; 0x40
|
||
8006c34: e953 2302 ldrd r2, r3, [r3, #-8]
|
||
8006c38: 2900 cmp r1, #0
|
||
8006c3a: d055 beq.n 8006ce8 <_dtoa_r+0x5c0>
|
||
8006c3c: 2000 movs r0, #0
|
||
8006c3e: 4929 ldr r1, [pc, #164] ; (8006ce4 <_dtoa_r+0x5bc>)
|
||
8006c40: f7f9 fde0 bl 8000804 <__aeabi_ddiv>
|
||
8006c44: 463b mov r3, r7
|
||
8006c46: 4632 mov r2, r6
|
||
8006c48: f7f9 fafa bl 8000240 <__aeabi_dsub>
|
||
8006c4c: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
8006c50: 9f08 ldr r7, [sp, #32]
|
||
8006c52: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006c56: f7f9 ff5b bl 8000b10 <__aeabi_d2iz>
|
||
8006c5a: 4604 mov r4, r0
|
||
8006c5c: f7f9 fc3e bl 80004dc <__aeabi_i2d>
|
||
8006c60: 4602 mov r2, r0
|
||
8006c62: 460b mov r3, r1
|
||
8006c64: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006c68: f7f9 faea bl 8000240 <__aeabi_dsub>
|
||
8006c6c: 4602 mov r2, r0
|
||
8006c6e: 460b mov r3, r1
|
||
8006c70: 3430 adds r4, #48 ; 0x30
|
||
8006c72: e9cd 2304 strd r2, r3, [sp, #16]
|
||
8006c76: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
8006c7a: f807 4b01 strb.w r4, [r7], #1
|
||
8006c7e: f7f9 ff09 bl 8000a94 <__aeabi_dcmplt>
|
||
8006c82: 2800 cmp r0, #0
|
||
8006c84: d174 bne.n 8006d70 <_dtoa_r+0x648>
|
||
8006c86: e9dd 2304 ldrd r2, r3, [sp, #16]
|
||
8006c8a: 2000 movs r0, #0
|
||
8006c8c: 4911 ldr r1, [pc, #68] ; (8006cd4 <_dtoa_r+0x5ac>)
|
||
8006c8e: f7f9 fad7 bl 8000240 <__aeabi_dsub>
|
||
8006c92: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
8006c96: f7f9 fefd bl 8000a94 <__aeabi_dcmplt>
|
||
8006c9a: 2800 cmp r0, #0
|
||
8006c9c: f040 80b6 bne.w 8006e0c <_dtoa_r+0x6e4>
|
||
8006ca0: 9b12 ldr r3, [sp, #72] ; 0x48
|
||
8006ca2: 429f cmp r7, r3
|
||
8006ca4: f43f af7a beq.w 8006b9c <_dtoa_r+0x474>
|
||
8006ca8: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
8006cac: 2200 movs r2, #0
|
||
8006cae: 4b0a ldr r3, [pc, #40] ; (8006cd8 <_dtoa_r+0x5b0>)
|
||
8006cb0: f7f9 fc7e bl 80005b0 <__aeabi_dmul>
|
||
8006cb4: 2200 movs r2, #0
|
||
8006cb6: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
8006cba: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006cbe: 4b06 ldr r3, [pc, #24] ; (8006cd8 <_dtoa_r+0x5b0>)
|
||
8006cc0: f7f9 fc76 bl 80005b0 <__aeabi_dmul>
|
||
8006cc4: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8006cc8: e7c3 b.n 8006c52 <_dtoa_r+0x52a>
|
||
8006cca: bf00 nop
|
||
8006ccc: 080095a0 .word 0x080095a0
|
||
8006cd0: 08009578 .word 0x08009578
|
||
8006cd4: 3ff00000 .word 0x3ff00000
|
||
8006cd8: 40240000 .word 0x40240000
|
||
8006cdc: 401c0000 .word 0x401c0000
|
||
8006ce0: 40140000 .word 0x40140000
|
||
8006ce4: 3fe00000 .word 0x3fe00000
|
||
8006ce8: 4630 mov r0, r6
|
||
8006cea: 4639 mov r1, r7
|
||
8006cec: f7f9 fc60 bl 80005b0 <__aeabi_dmul>
|
||
8006cf0: 9b12 ldr r3, [sp, #72] ; 0x48
|
||
8006cf2: e9cd 0110 strd r0, r1, [sp, #64] ; 0x40
|
||
8006cf6: 9c08 ldr r4, [sp, #32]
|
||
8006cf8: 9314 str r3, [sp, #80] ; 0x50
|
||
8006cfa: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006cfe: f7f9 ff07 bl 8000b10 <__aeabi_d2iz>
|
||
8006d02: 9015 str r0, [sp, #84] ; 0x54
|
||
8006d04: f7f9 fbea bl 80004dc <__aeabi_i2d>
|
||
8006d08: 4602 mov r2, r0
|
||
8006d0a: 460b mov r3, r1
|
||
8006d0c: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006d10: f7f9 fa96 bl 8000240 <__aeabi_dsub>
|
||
8006d14: 9b15 ldr r3, [sp, #84] ; 0x54
|
||
8006d16: 4606 mov r6, r0
|
||
8006d18: 3330 adds r3, #48 ; 0x30
|
||
8006d1a: f804 3b01 strb.w r3, [r4], #1
|
||
8006d1e: 9b12 ldr r3, [sp, #72] ; 0x48
|
||
8006d20: 460f mov r7, r1
|
||
8006d22: 429c cmp r4, r3
|
||
8006d24: f04f 0200 mov.w r2, #0
|
||
8006d28: d124 bne.n 8006d74 <_dtoa_r+0x64c>
|
||
8006d2a: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
||
8006d2e: 4bb3 ldr r3, [pc, #716] ; (8006ffc <_dtoa_r+0x8d4>)
|
||
8006d30: f7f9 fa88 bl 8000244 <__adddf3>
|
||
8006d34: 4602 mov r2, r0
|
||
8006d36: 460b mov r3, r1
|
||
8006d38: 4630 mov r0, r6
|
||
8006d3a: 4639 mov r1, r7
|
||
8006d3c: f7f9 fec8 bl 8000ad0 <__aeabi_dcmpgt>
|
||
8006d40: 2800 cmp r0, #0
|
||
8006d42: d162 bne.n 8006e0a <_dtoa_r+0x6e2>
|
||
8006d44: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
||
8006d48: 2000 movs r0, #0
|
||
8006d4a: 49ac ldr r1, [pc, #688] ; (8006ffc <_dtoa_r+0x8d4>)
|
||
8006d4c: f7f9 fa78 bl 8000240 <__aeabi_dsub>
|
||
8006d50: 4602 mov r2, r0
|
||
8006d52: 460b mov r3, r1
|
||
8006d54: 4630 mov r0, r6
|
||
8006d56: 4639 mov r1, r7
|
||
8006d58: f7f9 fe9c bl 8000a94 <__aeabi_dcmplt>
|
||
8006d5c: 2800 cmp r0, #0
|
||
8006d5e: f43f af1d beq.w 8006b9c <_dtoa_r+0x474>
|
||
8006d62: 9f14 ldr r7, [sp, #80] ; 0x50
|
||
8006d64: 1e7b subs r3, r7, #1
|
||
8006d66: 9314 str r3, [sp, #80] ; 0x50
|
||
8006d68: f817 3c01 ldrb.w r3, [r7, #-1]
|
||
8006d6c: 2b30 cmp r3, #48 ; 0x30
|
||
8006d6e: d0f8 beq.n 8006d62 <_dtoa_r+0x63a>
|
||
8006d70: 46c1 mov r9, r8
|
||
8006d72: e03a b.n 8006dea <_dtoa_r+0x6c2>
|
||
8006d74: 4ba2 ldr r3, [pc, #648] ; (8007000 <_dtoa_r+0x8d8>)
|
||
8006d76: f7f9 fc1b bl 80005b0 <__aeabi_dmul>
|
||
8006d7a: e9cd 0104 strd r0, r1, [sp, #16]
|
||
8006d7e: e7bc b.n 8006cfa <_dtoa_r+0x5d2>
|
||
8006d80: 9f08 ldr r7, [sp, #32]
|
||
8006d82: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
8006d86: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006d8a: f7f9 fd3b bl 8000804 <__aeabi_ddiv>
|
||
8006d8e: f7f9 febf bl 8000b10 <__aeabi_d2iz>
|
||
8006d92: 4604 mov r4, r0
|
||
8006d94: f7f9 fba2 bl 80004dc <__aeabi_i2d>
|
||
8006d98: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
8006d9c: f7f9 fc08 bl 80005b0 <__aeabi_dmul>
|
||
8006da0: f104 0630 add.w r6, r4, #48 ; 0x30
|
||
8006da4: 460b mov r3, r1
|
||
8006da6: 4602 mov r2, r0
|
||
8006da8: e9dd 0104 ldrd r0, r1, [sp, #16]
|
||
8006dac: f7f9 fa48 bl 8000240 <__aeabi_dsub>
|
||
8006db0: f807 6b01 strb.w r6, [r7], #1
|
||
8006db4: 9e08 ldr r6, [sp, #32]
|
||
8006db6: 9b02 ldr r3, [sp, #8]
|
||
8006db8: 1bbe subs r6, r7, r6
|
||
8006dba: 42b3 cmp r3, r6
|
||
8006dbc: d13a bne.n 8006e34 <_dtoa_r+0x70c>
|
||
8006dbe: 4602 mov r2, r0
|
||
8006dc0: 460b mov r3, r1
|
||
8006dc2: f7f9 fa3f bl 8000244 <__adddf3>
|
||
8006dc6: 4602 mov r2, r0
|
||
8006dc8: 460b mov r3, r1
|
||
8006dca: e9cd 2302 strd r2, r3, [sp, #8]
|
||
8006dce: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
8006dd2: f7f9 fe7d bl 8000ad0 <__aeabi_dcmpgt>
|
||
8006dd6: bb58 cbnz r0, 8006e30 <_dtoa_r+0x708>
|
||
8006dd8: e9dd 2306 ldrd r2, r3, [sp, #24]
|
||
8006ddc: e9dd 0102 ldrd r0, r1, [sp, #8]
|
||
8006de0: f7f9 fe4e bl 8000a80 <__aeabi_dcmpeq>
|
||
8006de4: b108 cbz r0, 8006dea <_dtoa_r+0x6c2>
|
||
8006de6: 07e1 lsls r1, r4, #31
|
||
8006de8: d422 bmi.n 8006e30 <_dtoa_r+0x708>
|
||
8006dea: 4628 mov r0, r5
|
||
8006dec: 4651 mov r1, sl
|
||
8006dee: f000 faf5 bl 80073dc <_Bfree>
|
||
8006df2: 2300 movs r3, #0
|
||
8006df4: 703b strb r3, [r7, #0]
|
||
8006df6: 9b24 ldr r3, [sp, #144] ; 0x90
|
||
8006df8: f109 0001 add.w r0, r9, #1
|
||
8006dfc: 6018 str r0, [r3, #0]
|
||
8006dfe: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
8006e00: 2b00 cmp r3, #0
|
||
8006e02: f43f acdf beq.w 80067c4 <_dtoa_r+0x9c>
|
||
8006e06: 601f str r7, [r3, #0]
|
||
8006e08: e4dc b.n 80067c4 <_dtoa_r+0x9c>
|
||
8006e0a: 4627 mov r7, r4
|
||
8006e0c: 463b mov r3, r7
|
||
8006e0e: 461f mov r7, r3
|
||
8006e10: f813 2d01 ldrb.w r2, [r3, #-1]!
|
||
8006e14: 2a39 cmp r2, #57 ; 0x39
|
||
8006e16: d107 bne.n 8006e28 <_dtoa_r+0x700>
|
||
8006e18: 9a08 ldr r2, [sp, #32]
|
||
8006e1a: 429a cmp r2, r3
|
||
8006e1c: d1f7 bne.n 8006e0e <_dtoa_r+0x6e6>
|
||
8006e1e: 2230 movs r2, #48 ; 0x30
|
||
8006e20: 9908 ldr r1, [sp, #32]
|
||
8006e22: f108 0801 add.w r8, r8, #1
|
||
8006e26: 700a strb r2, [r1, #0]
|
||
8006e28: 781a ldrb r2, [r3, #0]
|
||
8006e2a: 3201 adds r2, #1
|
||
8006e2c: 701a strb r2, [r3, #0]
|
||
8006e2e: e79f b.n 8006d70 <_dtoa_r+0x648>
|
||
8006e30: 46c8 mov r8, r9
|
||
8006e32: e7eb b.n 8006e0c <_dtoa_r+0x6e4>
|
||
8006e34: 2200 movs r2, #0
|
||
8006e36: 4b72 ldr r3, [pc, #456] ; (8007000 <_dtoa_r+0x8d8>)
|
||
8006e38: f7f9 fbba bl 80005b0 <__aeabi_dmul>
|
||
8006e3c: 4602 mov r2, r0
|
||
8006e3e: 460b mov r3, r1
|
||
8006e40: e9cd 2304 strd r2, r3, [sp, #16]
|
||
8006e44: 2200 movs r2, #0
|
||
8006e46: 2300 movs r3, #0
|
||
8006e48: f7f9 fe1a bl 8000a80 <__aeabi_dcmpeq>
|
||
8006e4c: 2800 cmp r0, #0
|
||
8006e4e: d098 beq.n 8006d82 <_dtoa_r+0x65a>
|
||
8006e50: e7cb b.n 8006dea <_dtoa_r+0x6c2>
|
||
8006e52: 9a0b ldr r2, [sp, #44] ; 0x2c
|
||
8006e54: 2a00 cmp r2, #0
|
||
8006e56: f000 80cd beq.w 8006ff4 <_dtoa_r+0x8cc>
|
||
8006e5a: 9a22 ldr r2, [sp, #136] ; 0x88
|
||
8006e5c: 2a01 cmp r2, #1
|
||
8006e5e: f300 80af bgt.w 8006fc0 <_dtoa_r+0x898>
|
||
8006e62: 9a13 ldr r2, [sp, #76] ; 0x4c
|
||
8006e64: 2a00 cmp r2, #0
|
||
8006e66: f000 80a7 beq.w 8006fb8 <_dtoa_r+0x890>
|
||
8006e6a: f203 4333 addw r3, r3, #1075 ; 0x433
|
||
8006e6e: 9c0a ldr r4, [sp, #40] ; 0x28
|
||
8006e70: 9f06 ldr r7, [sp, #24]
|
||
8006e72: 9a06 ldr r2, [sp, #24]
|
||
8006e74: 2101 movs r1, #1
|
||
8006e76: 441a add r2, r3
|
||
8006e78: 9206 str r2, [sp, #24]
|
||
8006e7a: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
8006e7c: 4628 mov r0, r5
|
||
8006e7e: 441a add r2, r3
|
||
8006e80: 9209 str r2, [sp, #36] ; 0x24
|
||
8006e82: f000 fb65 bl 8007550 <__i2b>
|
||
8006e86: 4606 mov r6, r0
|
||
8006e88: 2f00 cmp r7, #0
|
||
8006e8a: dd0c ble.n 8006ea6 <_dtoa_r+0x77e>
|
||
8006e8c: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006e8e: 2b00 cmp r3, #0
|
||
8006e90: dd09 ble.n 8006ea6 <_dtoa_r+0x77e>
|
||
8006e92: 42bb cmp r3, r7
|
||
8006e94: bfa8 it ge
|
||
8006e96: 463b movge r3, r7
|
||
8006e98: 9a06 ldr r2, [sp, #24]
|
||
8006e9a: 1aff subs r7, r7, r3
|
||
8006e9c: 1ad2 subs r2, r2, r3
|
||
8006e9e: 9206 str r2, [sp, #24]
|
||
8006ea0: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
8006ea2: 1ad3 subs r3, r2, r3
|
||
8006ea4: 9309 str r3, [sp, #36] ; 0x24
|
||
8006ea6: 9b0a ldr r3, [sp, #40] ; 0x28
|
||
8006ea8: b1f3 cbz r3, 8006ee8 <_dtoa_r+0x7c0>
|
||
8006eaa: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8006eac: 2b00 cmp r3, #0
|
||
8006eae: f000 80a9 beq.w 8007004 <_dtoa_r+0x8dc>
|
||
8006eb2: 2c00 cmp r4, #0
|
||
8006eb4: dd10 ble.n 8006ed8 <_dtoa_r+0x7b0>
|
||
8006eb6: 4631 mov r1, r6
|
||
8006eb8: 4622 mov r2, r4
|
||
8006eba: 4628 mov r0, r5
|
||
8006ebc: f000 fc02 bl 80076c4 <__pow5mult>
|
||
8006ec0: 4652 mov r2, sl
|
||
8006ec2: 4601 mov r1, r0
|
||
8006ec4: 4606 mov r6, r0
|
||
8006ec6: 4628 mov r0, r5
|
||
8006ec8: f000 fb58 bl 800757c <__multiply>
|
||
8006ecc: 4680 mov r8, r0
|
||
8006ece: 4651 mov r1, sl
|
||
8006ed0: 4628 mov r0, r5
|
||
8006ed2: f000 fa83 bl 80073dc <_Bfree>
|
||
8006ed6: 46c2 mov sl, r8
|
||
8006ed8: 9b0a ldr r3, [sp, #40] ; 0x28
|
||
8006eda: 1b1a subs r2, r3, r4
|
||
8006edc: d004 beq.n 8006ee8 <_dtoa_r+0x7c0>
|
||
8006ede: 4651 mov r1, sl
|
||
8006ee0: 4628 mov r0, r5
|
||
8006ee2: f000 fbef bl 80076c4 <__pow5mult>
|
||
8006ee6: 4682 mov sl, r0
|
||
8006ee8: 2101 movs r1, #1
|
||
8006eea: 4628 mov r0, r5
|
||
8006eec: f000 fb30 bl 8007550 <__i2b>
|
||
8006ef0: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8006ef2: 4604 mov r4, r0
|
||
8006ef4: 2b00 cmp r3, #0
|
||
8006ef6: f340 8087 ble.w 8007008 <_dtoa_r+0x8e0>
|
||
8006efa: 461a mov r2, r3
|
||
8006efc: 4601 mov r1, r0
|
||
8006efe: 4628 mov r0, r5
|
||
8006f00: f000 fbe0 bl 80076c4 <__pow5mult>
|
||
8006f04: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8006f06: 4604 mov r4, r0
|
||
8006f08: 2b01 cmp r3, #1
|
||
8006f0a: f340 8080 ble.w 800700e <_dtoa_r+0x8e6>
|
||
8006f0e: f04f 0800 mov.w r8, #0
|
||
8006f12: 6923 ldr r3, [r4, #16]
|
||
8006f14: eb04 0383 add.w r3, r4, r3, lsl #2
|
||
8006f18: 6918 ldr r0, [r3, #16]
|
||
8006f1a: f000 facb bl 80074b4 <__hi0bits>
|
||
8006f1e: f1c0 0020 rsb r0, r0, #32
|
||
8006f22: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006f24: 4418 add r0, r3
|
||
8006f26: f010 001f ands.w r0, r0, #31
|
||
8006f2a: f000 8092 beq.w 8007052 <_dtoa_r+0x92a>
|
||
8006f2e: f1c0 0320 rsb r3, r0, #32
|
||
8006f32: 2b04 cmp r3, #4
|
||
8006f34: f340 808a ble.w 800704c <_dtoa_r+0x924>
|
||
8006f38: f1c0 001c rsb r0, r0, #28
|
||
8006f3c: 9b06 ldr r3, [sp, #24]
|
||
8006f3e: 4407 add r7, r0
|
||
8006f40: 4403 add r3, r0
|
||
8006f42: 9306 str r3, [sp, #24]
|
||
8006f44: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006f46: 4403 add r3, r0
|
||
8006f48: 9309 str r3, [sp, #36] ; 0x24
|
||
8006f4a: 9b06 ldr r3, [sp, #24]
|
||
8006f4c: 2b00 cmp r3, #0
|
||
8006f4e: dd05 ble.n 8006f5c <_dtoa_r+0x834>
|
||
8006f50: 4651 mov r1, sl
|
||
8006f52: 461a mov r2, r3
|
||
8006f54: 4628 mov r0, r5
|
||
8006f56: f000 fc0f bl 8007778 <__lshift>
|
||
8006f5a: 4682 mov sl, r0
|
||
8006f5c: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8006f5e: 2b00 cmp r3, #0
|
||
8006f60: dd05 ble.n 8006f6e <_dtoa_r+0x846>
|
||
8006f62: 4621 mov r1, r4
|
||
8006f64: 461a mov r2, r3
|
||
8006f66: 4628 mov r0, r5
|
||
8006f68: f000 fc06 bl 8007778 <__lshift>
|
||
8006f6c: 4604 mov r4, r0
|
||
8006f6e: 9b0f ldr r3, [sp, #60] ; 0x3c
|
||
8006f70: 2b00 cmp r3, #0
|
||
8006f72: d070 beq.n 8007056 <_dtoa_r+0x92e>
|
||
8006f74: 4621 mov r1, r4
|
||
8006f76: 4650 mov r0, sl
|
||
8006f78: f000 fc6a bl 8007850 <__mcmp>
|
||
8006f7c: 2800 cmp r0, #0
|
||
8006f7e: da6a bge.n 8007056 <_dtoa_r+0x92e>
|
||
8006f80: 2300 movs r3, #0
|
||
8006f82: 4651 mov r1, sl
|
||
8006f84: 220a movs r2, #10
|
||
8006f86: 4628 mov r0, r5
|
||
8006f88: f000 fa4a bl 8007420 <__multadd>
|
||
8006f8c: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8006f8e: 4682 mov sl, r0
|
||
8006f90: f109 39ff add.w r9, r9, #4294967295 ; 0xffffffff
|
||
8006f94: 2b00 cmp r3, #0
|
||
8006f96: f000 8193 beq.w 80072c0 <_dtoa_r+0xb98>
|
||
8006f9a: 4631 mov r1, r6
|
||
8006f9c: 2300 movs r3, #0
|
||
8006f9e: 220a movs r2, #10
|
||
8006fa0: 4628 mov r0, r5
|
||
8006fa2: f000 fa3d bl 8007420 <__multadd>
|
||
8006fa6: f1bb 0f00 cmp.w fp, #0
|
||
8006faa: 4606 mov r6, r0
|
||
8006fac: f300 8093 bgt.w 80070d6 <_dtoa_r+0x9ae>
|
||
8006fb0: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8006fb2: 2b02 cmp r3, #2
|
||
8006fb4: dc57 bgt.n 8007066 <_dtoa_r+0x93e>
|
||
8006fb6: e08e b.n 80070d6 <_dtoa_r+0x9ae>
|
||
8006fb8: 9b16 ldr r3, [sp, #88] ; 0x58
|
||
8006fba: f1c3 0336 rsb r3, r3, #54 ; 0x36
|
||
8006fbe: e756 b.n 8006e6e <_dtoa_r+0x746>
|
||
8006fc0: 9b02 ldr r3, [sp, #8]
|
||
8006fc2: 1e5c subs r4, r3, #1
|
||
8006fc4: 9b0a ldr r3, [sp, #40] ; 0x28
|
||
8006fc6: 42a3 cmp r3, r4
|
||
8006fc8: bfb7 itett lt
|
||
8006fca: 9b0a ldrlt r3, [sp, #40] ; 0x28
|
||
8006fcc: 1b1c subge r4, r3, r4
|
||
8006fce: 1ae2 sublt r2, r4, r3
|
||
8006fd0: 9b0e ldrlt r3, [sp, #56] ; 0x38
|
||
8006fd2: bfbe ittt lt
|
||
8006fd4: 940a strlt r4, [sp, #40] ; 0x28
|
||
8006fd6: 189b addlt r3, r3, r2
|
||
8006fd8: 930e strlt r3, [sp, #56] ; 0x38
|
||
8006fda: 9b02 ldr r3, [sp, #8]
|
||
8006fdc: bfb8 it lt
|
||
8006fde: 2400 movlt r4, #0
|
||
8006fe0: 2b00 cmp r3, #0
|
||
8006fe2: bfbb ittet lt
|
||
8006fe4: 9b06 ldrlt r3, [sp, #24]
|
||
8006fe6: 9a02 ldrlt r2, [sp, #8]
|
||
8006fe8: 9f06 ldrge r7, [sp, #24]
|
||
8006fea: 1a9f sublt r7, r3, r2
|
||
8006fec: bfac ite ge
|
||
8006fee: 9b02 ldrge r3, [sp, #8]
|
||
8006ff0: 2300 movlt r3, #0
|
||
8006ff2: e73e b.n 8006e72 <_dtoa_r+0x74a>
|
||
8006ff4: 9c0a ldr r4, [sp, #40] ; 0x28
|
||
8006ff6: 9f06 ldr r7, [sp, #24]
|
||
8006ff8: 9e0b ldr r6, [sp, #44] ; 0x2c
|
||
8006ffa: e745 b.n 8006e88 <_dtoa_r+0x760>
|
||
8006ffc: 3fe00000 .word 0x3fe00000
|
||
8007000: 40240000 .word 0x40240000
|
||
8007004: 9a0a ldr r2, [sp, #40] ; 0x28
|
||
8007006: e76a b.n 8006ede <_dtoa_r+0x7b6>
|
||
8007008: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
800700a: 2b01 cmp r3, #1
|
||
800700c: dc19 bgt.n 8007042 <_dtoa_r+0x91a>
|
||
800700e: 9b04 ldr r3, [sp, #16]
|
||
8007010: b9bb cbnz r3, 8007042 <_dtoa_r+0x91a>
|
||
8007012: 9b05 ldr r3, [sp, #20]
|
||
8007014: f3c3 0313 ubfx r3, r3, #0, #20
|
||
8007018: b99b cbnz r3, 8007042 <_dtoa_r+0x91a>
|
||
800701a: 9b05 ldr r3, [sp, #20]
|
||
800701c: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
|
||
8007020: 0d1b lsrs r3, r3, #20
|
||
8007022: 051b lsls r3, r3, #20
|
||
8007024: b183 cbz r3, 8007048 <_dtoa_r+0x920>
|
||
8007026: f04f 0801 mov.w r8, #1
|
||
800702a: 9b06 ldr r3, [sp, #24]
|
||
800702c: 3301 adds r3, #1
|
||
800702e: 9306 str r3, [sp, #24]
|
||
8007030: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8007032: 3301 adds r3, #1
|
||
8007034: 9309 str r3, [sp, #36] ; 0x24
|
||
8007036: 9b0e ldr r3, [sp, #56] ; 0x38
|
||
8007038: 2b00 cmp r3, #0
|
||
800703a: f47f af6a bne.w 8006f12 <_dtoa_r+0x7ea>
|
||
800703e: 2001 movs r0, #1
|
||
8007040: e76f b.n 8006f22 <_dtoa_r+0x7fa>
|
||
8007042: f04f 0800 mov.w r8, #0
|
||
8007046: e7f6 b.n 8007036 <_dtoa_r+0x90e>
|
||
8007048: 4698 mov r8, r3
|
||
800704a: e7f4 b.n 8007036 <_dtoa_r+0x90e>
|
||
800704c: f43f af7d beq.w 8006f4a <_dtoa_r+0x822>
|
||
8007050: 4618 mov r0, r3
|
||
8007052: 301c adds r0, #28
|
||
8007054: e772 b.n 8006f3c <_dtoa_r+0x814>
|
||
8007056: 9b02 ldr r3, [sp, #8]
|
||
8007058: 2b00 cmp r3, #0
|
||
800705a: dc36 bgt.n 80070ca <_dtoa_r+0x9a2>
|
||
800705c: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
800705e: 2b02 cmp r3, #2
|
||
8007060: dd33 ble.n 80070ca <_dtoa_r+0x9a2>
|
||
8007062: f8dd b008 ldr.w fp, [sp, #8]
|
||
8007066: f1bb 0f00 cmp.w fp, #0
|
||
800706a: d10d bne.n 8007088 <_dtoa_r+0x960>
|
||
800706c: 4621 mov r1, r4
|
||
800706e: 465b mov r3, fp
|
||
8007070: 2205 movs r2, #5
|
||
8007072: 4628 mov r0, r5
|
||
8007074: f000 f9d4 bl 8007420 <__multadd>
|
||
8007078: 4601 mov r1, r0
|
||
800707a: 4604 mov r4, r0
|
||
800707c: 4650 mov r0, sl
|
||
800707e: f000 fbe7 bl 8007850 <__mcmp>
|
||
8007082: 2800 cmp r0, #0
|
||
8007084: f73f adb6 bgt.w 8006bf4 <_dtoa_r+0x4cc>
|
||
8007088: 9b23 ldr r3, [sp, #140] ; 0x8c
|
||
800708a: 9f08 ldr r7, [sp, #32]
|
||
800708c: ea6f 0903 mvn.w r9, r3
|
||
8007090: f04f 0800 mov.w r8, #0
|
||
8007094: 4621 mov r1, r4
|
||
8007096: 4628 mov r0, r5
|
||
8007098: f000 f9a0 bl 80073dc <_Bfree>
|
||
800709c: 2e00 cmp r6, #0
|
||
800709e: f43f aea4 beq.w 8006dea <_dtoa_r+0x6c2>
|
||
80070a2: f1b8 0f00 cmp.w r8, #0
|
||
80070a6: d005 beq.n 80070b4 <_dtoa_r+0x98c>
|
||
80070a8: 45b0 cmp r8, r6
|
||
80070aa: d003 beq.n 80070b4 <_dtoa_r+0x98c>
|
||
80070ac: 4641 mov r1, r8
|
||
80070ae: 4628 mov r0, r5
|
||
80070b0: f000 f994 bl 80073dc <_Bfree>
|
||
80070b4: 4631 mov r1, r6
|
||
80070b6: 4628 mov r0, r5
|
||
80070b8: f000 f990 bl 80073dc <_Bfree>
|
||
80070bc: e695 b.n 8006dea <_dtoa_r+0x6c2>
|
||
80070be: 2400 movs r4, #0
|
||
80070c0: 4626 mov r6, r4
|
||
80070c2: e7e1 b.n 8007088 <_dtoa_r+0x960>
|
||
80070c4: 46c1 mov r9, r8
|
||
80070c6: 4626 mov r6, r4
|
||
80070c8: e594 b.n 8006bf4 <_dtoa_r+0x4cc>
|
||
80070ca: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
80070cc: f8dd b008 ldr.w fp, [sp, #8]
|
||
80070d0: 2b00 cmp r3, #0
|
||
80070d2: f000 80fc beq.w 80072ce <_dtoa_r+0xba6>
|
||
80070d6: 2f00 cmp r7, #0
|
||
80070d8: dd05 ble.n 80070e6 <_dtoa_r+0x9be>
|
||
80070da: 4631 mov r1, r6
|
||
80070dc: 463a mov r2, r7
|
||
80070de: 4628 mov r0, r5
|
||
80070e0: f000 fb4a bl 8007778 <__lshift>
|
||
80070e4: 4606 mov r6, r0
|
||
80070e6: f1b8 0f00 cmp.w r8, #0
|
||
80070ea: d05c beq.n 80071a6 <_dtoa_r+0xa7e>
|
||
80070ec: 4628 mov r0, r5
|
||
80070ee: 6871 ldr r1, [r6, #4]
|
||
80070f0: f000 f934 bl 800735c <_Balloc>
|
||
80070f4: 4607 mov r7, r0
|
||
80070f6: b928 cbnz r0, 8007104 <_dtoa_r+0x9dc>
|
||
80070f8: 4602 mov r2, r0
|
||
80070fa: f240 21ea movw r1, #746 ; 0x2ea
|
||
80070fe: 4b7e ldr r3, [pc, #504] ; (80072f8 <_dtoa_r+0xbd0>)
|
||
8007100: f7ff bb26 b.w 8006750 <_dtoa_r+0x28>
|
||
8007104: 6932 ldr r2, [r6, #16]
|
||
8007106: f106 010c add.w r1, r6, #12
|
||
800710a: 3202 adds r2, #2
|
||
800710c: 0092 lsls r2, r2, #2
|
||
800710e: 300c adds r0, #12
|
||
8007110: f000 f90a bl 8007328 <memcpy>
|
||
8007114: 2201 movs r2, #1
|
||
8007116: 4639 mov r1, r7
|
||
8007118: 4628 mov r0, r5
|
||
800711a: f000 fb2d bl 8007778 <__lshift>
|
||
800711e: 46b0 mov r8, r6
|
||
8007120: 4606 mov r6, r0
|
||
8007122: 9b08 ldr r3, [sp, #32]
|
||
8007124: 3301 adds r3, #1
|
||
8007126: 9302 str r3, [sp, #8]
|
||
8007128: 9b08 ldr r3, [sp, #32]
|
||
800712a: 445b add r3, fp
|
||
800712c: 930a str r3, [sp, #40] ; 0x28
|
||
800712e: 9b04 ldr r3, [sp, #16]
|
||
8007130: f003 0301 and.w r3, r3, #1
|
||
8007134: 9309 str r3, [sp, #36] ; 0x24
|
||
8007136: 9b02 ldr r3, [sp, #8]
|
||
8007138: 4621 mov r1, r4
|
||
800713a: 4650 mov r0, sl
|
||
800713c: f103 3bff add.w fp, r3, #4294967295 ; 0xffffffff
|
||
8007140: f7ff fa64 bl 800660c <quorem>
|
||
8007144: 4603 mov r3, r0
|
||
8007146: 4641 mov r1, r8
|
||
8007148: 3330 adds r3, #48 ; 0x30
|
||
800714a: 9004 str r0, [sp, #16]
|
||
800714c: 4650 mov r0, sl
|
||
800714e: 930b str r3, [sp, #44] ; 0x2c
|
||
8007150: f000 fb7e bl 8007850 <__mcmp>
|
||
8007154: 4632 mov r2, r6
|
||
8007156: 9006 str r0, [sp, #24]
|
||
8007158: 4621 mov r1, r4
|
||
800715a: 4628 mov r0, r5
|
||
800715c: f000 fb94 bl 8007888 <__mdiff>
|
||
8007160: 68c2 ldr r2, [r0, #12]
|
||
8007162: 4607 mov r7, r0
|
||
8007164: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8007166: bb02 cbnz r2, 80071aa <_dtoa_r+0xa82>
|
||
8007168: 4601 mov r1, r0
|
||
800716a: 4650 mov r0, sl
|
||
800716c: f000 fb70 bl 8007850 <__mcmp>
|
||
8007170: 4602 mov r2, r0
|
||
8007172: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8007174: 4639 mov r1, r7
|
||
8007176: 4628 mov r0, r5
|
||
8007178: e9cd 320b strd r3, r2, [sp, #44] ; 0x2c
|
||
800717c: f000 f92e bl 80073dc <_Bfree>
|
||
8007180: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
8007182: 9a0c ldr r2, [sp, #48] ; 0x30
|
||
8007184: 9f02 ldr r7, [sp, #8]
|
||
8007186: ea43 0102 orr.w r1, r3, r2
|
||
800718a: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
800718c: 430b orrs r3, r1
|
||
800718e: 9b0b ldr r3, [sp, #44] ; 0x2c
|
||
8007190: d10d bne.n 80071ae <_dtoa_r+0xa86>
|
||
8007192: 2b39 cmp r3, #57 ; 0x39
|
||
8007194: d027 beq.n 80071e6 <_dtoa_r+0xabe>
|
||
8007196: 9a06 ldr r2, [sp, #24]
|
||
8007198: 2a00 cmp r2, #0
|
||
800719a: dd01 ble.n 80071a0 <_dtoa_r+0xa78>
|
||
800719c: 9b04 ldr r3, [sp, #16]
|
||
800719e: 3331 adds r3, #49 ; 0x31
|
||
80071a0: f88b 3000 strb.w r3, [fp]
|
||
80071a4: e776 b.n 8007094 <_dtoa_r+0x96c>
|
||
80071a6: 4630 mov r0, r6
|
||
80071a8: e7b9 b.n 800711e <_dtoa_r+0x9f6>
|
||
80071aa: 2201 movs r2, #1
|
||
80071ac: e7e2 b.n 8007174 <_dtoa_r+0xa4c>
|
||
80071ae: 9906 ldr r1, [sp, #24]
|
||
80071b0: 2900 cmp r1, #0
|
||
80071b2: db04 blt.n 80071be <_dtoa_r+0xa96>
|
||
80071b4: 9822 ldr r0, [sp, #136] ; 0x88
|
||
80071b6: 4301 orrs r1, r0
|
||
80071b8: 9809 ldr r0, [sp, #36] ; 0x24
|
||
80071ba: 4301 orrs r1, r0
|
||
80071bc: d120 bne.n 8007200 <_dtoa_r+0xad8>
|
||
80071be: 2a00 cmp r2, #0
|
||
80071c0: ddee ble.n 80071a0 <_dtoa_r+0xa78>
|
||
80071c2: 4651 mov r1, sl
|
||
80071c4: 2201 movs r2, #1
|
||
80071c6: 4628 mov r0, r5
|
||
80071c8: 9302 str r3, [sp, #8]
|
||
80071ca: f000 fad5 bl 8007778 <__lshift>
|
||
80071ce: 4621 mov r1, r4
|
||
80071d0: 4682 mov sl, r0
|
||
80071d2: f000 fb3d bl 8007850 <__mcmp>
|
||
80071d6: 2800 cmp r0, #0
|
||
80071d8: 9b02 ldr r3, [sp, #8]
|
||
80071da: dc02 bgt.n 80071e2 <_dtoa_r+0xaba>
|
||
80071dc: d1e0 bne.n 80071a0 <_dtoa_r+0xa78>
|
||
80071de: 07da lsls r2, r3, #31
|
||
80071e0: d5de bpl.n 80071a0 <_dtoa_r+0xa78>
|
||
80071e2: 2b39 cmp r3, #57 ; 0x39
|
||
80071e4: d1da bne.n 800719c <_dtoa_r+0xa74>
|
||
80071e6: 2339 movs r3, #57 ; 0x39
|
||
80071e8: f88b 3000 strb.w r3, [fp]
|
||
80071ec: 463b mov r3, r7
|
||
80071ee: 461f mov r7, r3
|
||
80071f0: f817 2c01 ldrb.w r2, [r7, #-1]
|
||
80071f4: 3b01 subs r3, #1
|
||
80071f6: 2a39 cmp r2, #57 ; 0x39
|
||
80071f8: d050 beq.n 800729c <_dtoa_r+0xb74>
|
||
80071fa: 3201 adds r2, #1
|
||
80071fc: 701a strb r2, [r3, #0]
|
||
80071fe: e749 b.n 8007094 <_dtoa_r+0x96c>
|
||
8007200: 2a00 cmp r2, #0
|
||
8007202: dd03 ble.n 800720c <_dtoa_r+0xae4>
|
||
8007204: 2b39 cmp r3, #57 ; 0x39
|
||
8007206: d0ee beq.n 80071e6 <_dtoa_r+0xabe>
|
||
8007208: 3301 adds r3, #1
|
||
800720a: e7c9 b.n 80071a0 <_dtoa_r+0xa78>
|
||
800720c: 9a02 ldr r2, [sp, #8]
|
||
800720e: 990a ldr r1, [sp, #40] ; 0x28
|
||
8007210: f802 3c01 strb.w r3, [r2, #-1]
|
||
8007214: 428a cmp r2, r1
|
||
8007216: d02a beq.n 800726e <_dtoa_r+0xb46>
|
||
8007218: 4651 mov r1, sl
|
||
800721a: 2300 movs r3, #0
|
||
800721c: 220a movs r2, #10
|
||
800721e: 4628 mov r0, r5
|
||
8007220: f000 f8fe bl 8007420 <__multadd>
|
||
8007224: 45b0 cmp r8, r6
|
||
8007226: 4682 mov sl, r0
|
||
8007228: f04f 0300 mov.w r3, #0
|
||
800722c: f04f 020a mov.w r2, #10
|
||
8007230: 4641 mov r1, r8
|
||
8007232: 4628 mov r0, r5
|
||
8007234: d107 bne.n 8007246 <_dtoa_r+0xb1e>
|
||
8007236: f000 f8f3 bl 8007420 <__multadd>
|
||
800723a: 4680 mov r8, r0
|
||
800723c: 4606 mov r6, r0
|
||
800723e: 9b02 ldr r3, [sp, #8]
|
||
8007240: 3301 adds r3, #1
|
||
8007242: 9302 str r3, [sp, #8]
|
||
8007244: e777 b.n 8007136 <_dtoa_r+0xa0e>
|
||
8007246: f000 f8eb bl 8007420 <__multadd>
|
||
800724a: 4631 mov r1, r6
|
||
800724c: 4680 mov r8, r0
|
||
800724e: 2300 movs r3, #0
|
||
8007250: 220a movs r2, #10
|
||
8007252: 4628 mov r0, r5
|
||
8007254: f000 f8e4 bl 8007420 <__multadd>
|
||
8007258: 4606 mov r6, r0
|
||
800725a: e7f0 b.n 800723e <_dtoa_r+0xb16>
|
||
800725c: f1bb 0f00 cmp.w fp, #0
|
||
8007260: bfcc ite gt
|
||
8007262: 465f movgt r7, fp
|
||
8007264: 2701 movle r7, #1
|
||
8007266: f04f 0800 mov.w r8, #0
|
||
800726a: 9a08 ldr r2, [sp, #32]
|
||
800726c: 4417 add r7, r2
|
||
800726e: 4651 mov r1, sl
|
||
8007270: 2201 movs r2, #1
|
||
8007272: 4628 mov r0, r5
|
||
8007274: 9302 str r3, [sp, #8]
|
||
8007276: f000 fa7f bl 8007778 <__lshift>
|
||
800727a: 4621 mov r1, r4
|
||
800727c: 4682 mov sl, r0
|
||
800727e: f000 fae7 bl 8007850 <__mcmp>
|
||
8007282: 2800 cmp r0, #0
|
||
8007284: dcb2 bgt.n 80071ec <_dtoa_r+0xac4>
|
||
8007286: d102 bne.n 800728e <_dtoa_r+0xb66>
|
||
8007288: 9b02 ldr r3, [sp, #8]
|
||
800728a: 07db lsls r3, r3, #31
|
||
800728c: d4ae bmi.n 80071ec <_dtoa_r+0xac4>
|
||
800728e: 463b mov r3, r7
|
||
8007290: 461f mov r7, r3
|
||
8007292: f813 2d01 ldrb.w r2, [r3, #-1]!
|
||
8007296: 2a30 cmp r2, #48 ; 0x30
|
||
8007298: d0fa beq.n 8007290 <_dtoa_r+0xb68>
|
||
800729a: e6fb b.n 8007094 <_dtoa_r+0x96c>
|
||
800729c: 9a08 ldr r2, [sp, #32]
|
||
800729e: 429a cmp r2, r3
|
||
80072a0: d1a5 bne.n 80071ee <_dtoa_r+0xac6>
|
||
80072a2: 2331 movs r3, #49 ; 0x31
|
||
80072a4: f109 0901 add.w r9, r9, #1
|
||
80072a8: 7013 strb r3, [r2, #0]
|
||
80072aa: e6f3 b.n 8007094 <_dtoa_r+0x96c>
|
||
80072ac: 4b13 ldr r3, [pc, #76] ; (80072fc <_dtoa_r+0xbd4>)
|
||
80072ae: f7ff baa7 b.w 8006800 <_dtoa_r+0xd8>
|
||
80072b2: 9b26 ldr r3, [sp, #152] ; 0x98
|
||
80072b4: 2b00 cmp r3, #0
|
||
80072b6: f47f aa80 bne.w 80067ba <_dtoa_r+0x92>
|
||
80072ba: 4b11 ldr r3, [pc, #68] ; (8007300 <_dtoa_r+0xbd8>)
|
||
80072bc: f7ff baa0 b.w 8006800 <_dtoa_r+0xd8>
|
||
80072c0: f1bb 0f00 cmp.w fp, #0
|
||
80072c4: dc03 bgt.n 80072ce <_dtoa_r+0xba6>
|
||
80072c6: 9b22 ldr r3, [sp, #136] ; 0x88
|
||
80072c8: 2b02 cmp r3, #2
|
||
80072ca: f73f aecc bgt.w 8007066 <_dtoa_r+0x93e>
|
||
80072ce: 9f08 ldr r7, [sp, #32]
|
||
80072d0: 4621 mov r1, r4
|
||
80072d2: 4650 mov r0, sl
|
||
80072d4: f7ff f99a bl 800660c <quorem>
|
||
80072d8: 9a08 ldr r2, [sp, #32]
|
||
80072da: f100 0330 add.w r3, r0, #48 ; 0x30
|
||
80072de: f807 3b01 strb.w r3, [r7], #1
|
||
80072e2: 1aba subs r2, r7, r2
|
||
80072e4: 4593 cmp fp, r2
|
||
80072e6: ddb9 ble.n 800725c <_dtoa_r+0xb34>
|
||
80072e8: 4651 mov r1, sl
|
||
80072ea: 2300 movs r3, #0
|
||
80072ec: 220a movs r2, #10
|
||
80072ee: 4628 mov r0, r5
|
||
80072f0: f000 f896 bl 8007420 <__multadd>
|
||
80072f4: 4682 mov sl, r0
|
||
80072f6: e7eb b.n 80072d0 <_dtoa_r+0xba8>
|
||
80072f8: 08009503 .word 0x08009503
|
||
80072fc: 0800945c .word 0x0800945c
|
||
8007300: 08009480 .word 0x08009480
|
||
|
||
08007304 <_localeconv_r>:
|
||
8007304: 4800 ldr r0, [pc, #0] ; (8007308 <_localeconv_r+0x4>)
|
||
8007306: 4770 bx lr
|
||
8007308: 20000160 .word 0x20000160
|
||
|
||
0800730c <memchr>:
|
||
800730c: 4603 mov r3, r0
|
||
800730e: b510 push {r4, lr}
|
||
8007310: b2c9 uxtb r1, r1
|
||
8007312: 4402 add r2, r0
|
||
8007314: 4293 cmp r3, r2
|
||
8007316: 4618 mov r0, r3
|
||
8007318: d101 bne.n 800731e <memchr+0x12>
|
||
800731a: 2000 movs r0, #0
|
||
800731c: e003 b.n 8007326 <memchr+0x1a>
|
||
800731e: 7804 ldrb r4, [r0, #0]
|
||
8007320: 3301 adds r3, #1
|
||
8007322: 428c cmp r4, r1
|
||
8007324: d1f6 bne.n 8007314 <memchr+0x8>
|
||
8007326: bd10 pop {r4, pc}
|
||
|
||
08007328 <memcpy>:
|
||
8007328: 440a add r2, r1
|
||
800732a: 4291 cmp r1, r2
|
||
800732c: f100 33ff add.w r3, r0, #4294967295 ; 0xffffffff
|
||
8007330: d100 bne.n 8007334 <memcpy+0xc>
|
||
8007332: 4770 bx lr
|
||
8007334: b510 push {r4, lr}
|
||
8007336: f811 4b01 ldrb.w r4, [r1], #1
|
||
800733a: 4291 cmp r1, r2
|
||
800733c: f803 4f01 strb.w r4, [r3, #1]!
|
||
8007340: d1f9 bne.n 8007336 <memcpy+0xe>
|
||
8007342: bd10 pop {r4, pc}
|
||
|
||
08007344 <__malloc_lock>:
|
||
8007344: 4801 ldr r0, [pc, #4] ; (800734c <__malloc_lock+0x8>)
|
||
8007346: f000 bd26 b.w 8007d96 <__retarget_lock_acquire_recursive>
|
||
800734a: bf00 nop
|
||
800734c: 20000344 .word 0x20000344
|
||
|
||
08007350 <__malloc_unlock>:
|
||
8007350: 4801 ldr r0, [pc, #4] ; (8007358 <__malloc_unlock+0x8>)
|
||
8007352: f000 bd21 b.w 8007d98 <__retarget_lock_release_recursive>
|
||
8007356: bf00 nop
|
||
8007358: 20000344 .word 0x20000344
|
||
|
||
0800735c <_Balloc>:
|
||
800735c: b570 push {r4, r5, r6, lr}
|
||
800735e: 6a46 ldr r6, [r0, #36] ; 0x24
|
||
8007360: 4604 mov r4, r0
|
||
8007362: 460d mov r5, r1
|
||
8007364: b976 cbnz r6, 8007384 <_Balloc+0x28>
|
||
8007366: 2010 movs r0, #16
|
||
8007368: f7fe fc02 bl 8005b70 <malloc>
|
||
800736c: 4602 mov r2, r0
|
||
800736e: 6260 str r0, [r4, #36] ; 0x24
|
||
8007370: b920 cbnz r0, 800737c <_Balloc+0x20>
|
||
8007372: 2166 movs r1, #102 ; 0x66
|
||
8007374: 4b17 ldr r3, [pc, #92] ; (80073d4 <_Balloc+0x78>)
|
||
8007376: 4818 ldr r0, [pc, #96] ; (80073d8 <_Balloc+0x7c>)
|
||
8007378: f000 fcdc bl 8007d34 <__assert_func>
|
||
800737c: e9c0 6601 strd r6, r6, [r0, #4]
|
||
8007380: 6006 str r6, [r0, #0]
|
||
8007382: 60c6 str r6, [r0, #12]
|
||
8007384: 6a66 ldr r6, [r4, #36] ; 0x24
|
||
8007386: 68f3 ldr r3, [r6, #12]
|
||
8007388: b183 cbz r3, 80073ac <_Balloc+0x50>
|
||
800738a: 6a63 ldr r3, [r4, #36] ; 0x24
|
||
800738c: 68db ldr r3, [r3, #12]
|
||
800738e: f853 0025 ldr.w r0, [r3, r5, lsl #2]
|
||
8007392: b9b8 cbnz r0, 80073c4 <_Balloc+0x68>
|
||
8007394: 2101 movs r1, #1
|
||
8007396: fa01 f605 lsl.w r6, r1, r5
|
||
800739a: 1d72 adds r2, r6, #5
|
||
800739c: 4620 mov r0, r4
|
||
800739e: 0092 lsls r2, r2, #2
|
||
80073a0: f000 fb5e bl 8007a60 <_calloc_r>
|
||
80073a4: b160 cbz r0, 80073c0 <_Balloc+0x64>
|
||
80073a6: e9c0 5601 strd r5, r6, [r0, #4]
|
||
80073aa: e00e b.n 80073ca <_Balloc+0x6e>
|
||
80073ac: 2221 movs r2, #33 ; 0x21
|
||
80073ae: 2104 movs r1, #4
|
||
80073b0: 4620 mov r0, r4
|
||
80073b2: f000 fb55 bl 8007a60 <_calloc_r>
|
||
80073b6: 6a63 ldr r3, [r4, #36] ; 0x24
|
||
80073b8: 60f0 str r0, [r6, #12]
|
||
80073ba: 68db ldr r3, [r3, #12]
|
||
80073bc: 2b00 cmp r3, #0
|
||
80073be: d1e4 bne.n 800738a <_Balloc+0x2e>
|
||
80073c0: 2000 movs r0, #0
|
||
80073c2: bd70 pop {r4, r5, r6, pc}
|
||
80073c4: 6802 ldr r2, [r0, #0]
|
||
80073c6: f843 2025 str.w r2, [r3, r5, lsl #2]
|
||
80073ca: 2300 movs r3, #0
|
||
80073cc: e9c0 3303 strd r3, r3, [r0, #12]
|
||
80073d0: e7f7 b.n 80073c2 <_Balloc+0x66>
|
||
80073d2: bf00 nop
|
||
80073d4: 0800948d .word 0x0800948d
|
||
80073d8: 08009514 .word 0x08009514
|
||
|
||
080073dc <_Bfree>:
|
||
80073dc: b570 push {r4, r5, r6, lr}
|
||
80073de: 6a46 ldr r6, [r0, #36] ; 0x24
|
||
80073e0: 4605 mov r5, r0
|
||
80073e2: 460c mov r4, r1
|
||
80073e4: b976 cbnz r6, 8007404 <_Bfree+0x28>
|
||
80073e6: 2010 movs r0, #16
|
||
80073e8: f7fe fbc2 bl 8005b70 <malloc>
|
||
80073ec: 4602 mov r2, r0
|
||
80073ee: 6268 str r0, [r5, #36] ; 0x24
|
||
80073f0: b920 cbnz r0, 80073fc <_Bfree+0x20>
|
||
80073f2: 218a movs r1, #138 ; 0x8a
|
||
80073f4: 4b08 ldr r3, [pc, #32] ; (8007418 <_Bfree+0x3c>)
|
||
80073f6: 4809 ldr r0, [pc, #36] ; (800741c <_Bfree+0x40>)
|
||
80073f8: f000 fc9c bl 8007d34 <__assert_func>
|
||
80073fc: e9c0 6601 strd r6, r6, [r0, #4]
|
||
8007400: 6006 str r6, [r0, #0]
|
||
8007402: 60c6 str r6, [r0, #12]
|
||
8007404: b13c cbz r4, 8007416 <_Bfree+0x3a>
|
||
8007406: 6a6b ldr r3, [r5, #36] ; 0x24
|
||
8007408: 6862 ldr r2, [r4, #4]
|
||
800740a: 68db ldr r3, [r3, #12]
|
||
800740c: f853 1022 ldr.w r1, [r3, r2, lsl #2]
|
||
8007410: 6021 str r1, [r4, #0]
|
||
8007412: f843 4022 str.w r4, [r3, r2, lsl #2]
|
||
8007416: bd70 pop {r4, r5, r6, pc}
|
||
8007418: 0800948d .word 0x0800948d
|
||
800741c: 08009514 .word 0x08009514
|
||
|
||
08007420 <__multadd>:
|
||
8007420: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||
8007424: 4698 mov r8, r3
|
||
8007426: 460c mov r4, r1
|
||
8007428: 2300 movs r3, #0
|
||
800742a: 690e ldr r6, [r1, #16]
|
||
800742c: 4607 mov r7, r0
|
||
800742e: f101 0014 add.w r0, r1, #20
|
||
8007432: 6805 ldr r5, [r0, #0]
|
||
8007434: 3301 adds r3, #1
|
||
8007436: b2a9 uxth r1, r5
|
||
8007438: fb02 8101 mla r1, r2, r1, r8
|
||
800743c: 0c2d lsrs r5, r5, #16
|
||
800743e: ea4f 4c11 mov.w ip, r1, lsr #16
|
||
8007442: fb02 c505 mla r5, r2, r5, ip
|
||
8007446: b289 uxth r1, r1
|
||
8007448: eb01 4105 add.w r1, r1, r5, lsl #16
|
||
800744c: 429e cmp r6, r3
|
||
800744e: ea4f 4815 mov.w r8, r5, lsr #16
|
||
8007452: f840 1b04 str.w r1, [r0], #4
|
||
8007456: dcec bgt.n 8007432 <__multadd+0x12>
|
||
8007458: f1b8 0f00 cmp.w r8, #0
|
||
800745c: d022 beq.n 80074a4 <__multadd+0x84>
|
||
800745e: 68a3 ldr r3, [r4, #8]
|
||
8007460: 42b3 cmp r3, r6
|
||
8007462: dc19 bgt.n 8007498 <__multadd+0x78>
|
||
8007464: 6861 ldr r1, [r4, #4]
|
||
8007466: 4638 mov r0, r7
|
||
8007468: 3101 adds r1, #1
|
||
800746a: f7ff ff77 bl 800735c <_Balloc>
|
||
800746e: 4605 mov r5, r0
|
||
8007470: b928 cbnz r0, 800747e <__multadd+0x5e>
|
||
8007472: 4602 mov r2, r0
|
||
8007474: 21b5 movs r1, #181 ; 0xb5
|
||
8007476: 4b0d ldr r3, [pc, #52] ; (80074ac <__multadd+0x8c>)
|
||
8007478: 480d ldr r0, [pc, #52] ; (80074b0 <__multadd+0x90>)
|
||
800747a: f000 fc5b bl 8007d34 <__assert_func>
|
||
800747e: 6922 ldr r2, [r4, #16]
|
||
8007480: f104 010c add.w r1, r4, #12
|
||
8007484: 3202 adds r2, #2
|
||
8007486: 0092 lsls r2, r2, #2
|
||
8007488: 300c adds r0, #12
|
||
800748a: f7ff ff4d bl 8007328 <memcpy>
|
||
800748e: 4621 mov r1, r4
|
||
8007490: 4638 mov r0, r7
|
||
8007492: f7ff ffa3 bl 80073dc <_Bfree>
|
||
8007496: 462c mov r4, r5
|
||
8007498: eb04 0386 add.w r3, r4, r6, lsl #2
|
||
800749c: 3601 adds r6, #1
|
||
800749e: f8c3 8014 str.w r8, [r3, #20]
|
||
80074a2: 6126 str r6, [r4, #16]
|
||
80074a4: 4620 mov r0, r4
|
||
80074a6: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
||
80074aa: bf00 nop
|
||
80074ac: 08009503 .word 0x08009503
|
||
80074b0: 08009514 .word 0x08009514
|
||
|
||
080074b4 <__hi0bits>:
|
||
80074b4: 0c02 lsrs r2, r0, #16
|
||
80074b6: 0412 lsls r2, r2, #16
|
||
80074b8: 4603 mov r3, r0
|
||
80074ba: b9ca cbnz r2, 80074f0 <__hi0bits+0x3c>
|
||
80074bc: 0403 lsls r3, r0, #16
|
||
80074be: 2010 movs r0, #16
|
||
80074c0: f013 4f7f tst.w r3, #4278190080 ; 0xff000000
|
||
80074c4: bf04 itt eq
|
||
80074c6: 021b lsleq r3, r3, #8
|
||
80074c8: 3008 addeq r0, #8
|
||
80074ca: f013 4f70 tst.w r3, #4026531840 ; 0xf0000000
|
||
80074ce: bf04 itt eq
|
||
80074d0: 011b lsleq r3, r3, #4
|
||
80074d2: 3004 addeq r0, #4
|
||
80074d4: f013 4f40 tst.w r3, #3221225472 ; 0xc0000000
|
||
80074d8: bf04 itt eq
|
||
80074da: 009b lsleq r3, r3, #2
|
||
80074dc: 3002 addeq r0, #2
|
||
80074de: 2b00 cmp r3, #0
|
||
80074e0: db05 blt.n 80074ee <__hi0bits+0x3a>
|
||
80074e2: f013 4f80 tst.w r3, #1073741824 ; 0x40000000
|
||
80074e6: f100 0001 add.w r0, r0, #1
|
||
80074ea: bf08 it eq
|
||
80074ec: 2020 moveq r0, #32
|
||
80074ee: 4770 bx lr
|
||
80074f0: 2000 movs r0, #0
|
||
80074f2: e7e5 b.n 80074c0 <__hi0bits+0xc>
|
||
|
||
080074f4 <__lo0bits>:
|
||
80074f4: 6803 ldr r3, [r0, #0]
|
||
80074f6: 4602 mov r2, r0
|
||
80074f8: f013 0007 ands.w r0, r3, #7
|
||
80074fc: d00b beq.n 8007516 <__lo0bits+0x22>
|
||
80074fe: 07d9 lsls r1, r3, #31
|
||
8007500: d422 bmi.n 8007548 <__lo0bits+0x54>
|
||
8007502: 0798 lsls r0, r3, #30
|
||
8007504: bf49 itett mi
|
||
8007506: 085b lsrmi r3, r3, #1
|
||
8007508: 089b lsrpl r3, r3, #2
|
||
800750a: 2001 movmi r0, #1
|
||
800750c: 6013 strmi r3, [r2, #0]
|
||
800750e: bf5c itt pl
|
||
8007510: 2002 movpl r0, #2
|
||
8007512: 6013 strpl r3, [r2, #0]
|
||
8007514: 4770 bx lr
|
||
8007516: b299 uxth r1, r3
|
||
8007518: b909 cbnz r1, 800751e <__lo0bits+0x2a>
|
||
800751a: 2010 movs r0, #16
|
||
800751c: 0c1b lsrs r3, r3, #16
|
||
800751e: f013 0fff tst.w r3, #255 ; 0xff
|
||
8007522: bf04 itt eq
|
||
8007524: 0a1b lsreq r3, r3, #8
|
||
8007526: 3008 addeq r0, #8
|
||
8007528: 0719 lsls r1, r3, #28
|
||
800752a: bf04 itt eq
|
||
800752c: 091b lsreq r3, r3, #4
|
||
800752e: 3004 addeq r0, #4
|
||
8007530: 0799 lsls r1, r3, #30
|
||
8007532: bf04 itt eq
|
||
8007534: 089b lsreq r3, r3, #2
|
||
8007536: 3002 addeq r0, #2
|
||
8007538: 07d9 lsls r1, r3, #31
|
||
800753a: d403 bmi.n 8007544 <__lo0bits+0x50>
|
||
800753c: 085b lsrs r3, r3, #1
|
||
800753e: f100 0001 add.w r0, r0, #1
|
||
8007542: d003 beq.n 800754c <__lo0bits+0x58>
|
||
8007544: 6013 str r3, [r2, #0]
|
||
8007546: 4770 bx lr
|
||
8007548: 2000 movs r0, #0
|
||
800754a: 4770 bx lr
|
||
800754c: 2020 movs r0, #32
|
||
800754e: 4770 bx lr
|
||
|
||
08007550 <__i2b>:
|
||
8007550: b510 push {r4, lr}
|
||
8007552: 460c mov r4, r1
|
||
8007554: 2101 movs r1, #1
|
||
8007556: f7ff ff01 bl 800735c <_Balloc>
|
||
800755a: 4602 mov r2, r0
|
||
800755c: b928 cbnz r0, 800756a <__i2b+0x1a>
|
||
800755e: f44f 71a0 mov.w r1, #320 ; 0x140
|
||
8007562: 4b04 ldr r3, [pc, #16] ; (8007574 <__i2b+0x24>)
|
||
8007564: 4804 ldr r0, [pc, #16] ; (8007578 <__i2b+0x28>)
|
||
8007566: f000 fbe5 bl 8007d34 <__assert_func>
|
||
800756a: 2301 movs r3, #1
|
||
800756c: 6144 str r4, [r0, #20]
|
||
800756e: 6103 str r3, [r0, #16]
|
||
8007570: bd10 pop {r4, pc}
|
||
8007572: bf00 nop
|
||
8007574: 08009503 .word 0x08009503
|
||
8007578: 08009514 .word 0x08009514
|
||
|
||
0800757c <__multiply>:
|
||
800757c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8007580: 4614 mov r4, r2
|
||
8007582: 690a ldr r2, [r1, #16]
|
||
8007584: 6923 ldr r3, [r4, #16]
|
||
8007586: 460d mov r5, r1
|
||
8007588: 429a cmp r2, r3
|
||
800758a: bfbe ittt lt
|
||
800758c: 460b movlt r3, r1
|
||
800758e: 4625 movlt r5, r4
|
||
8007590: 461c movlt r4, r3
|
||
8007592: f8d5 a010 ldr.w sl, [r5, #16]
|
||
8007596: f8d4 9010 ldr.w r9, [r4, #16]
|
||
800759a: 68ab ldr r3, [r5, #8]
|
||
800759c: 6869 ldr r1, [r5, #4]
|
||
800759e: eb0a 0709 add.w r7, sl, r9
|
||
80075a2: 42bb cmp r3, r7
|
||
80075a4: b085 sub sp, #20
|
||
80075a6: bfb8 it lt
|
||
80075a8: 3101 addlt r1, #1
|
||
80075aa: f7ff fed7 bl 800735c <_Balloc>
|
||
80075ae: b930 cbnz r0, 80075be <__multiply+0x42>
|
||
80075b0: 4602 mov r2, r0
|
||
80075b2: f240 115d movw r1, #349 ; 0x15d
|
||
80075b6: 4b41 ldr r3, [pc, #260] ; (80076bc <__multiply+0x140>)
|
||
80075b8: 4841 ldr r0, [pc, #260] ; (80076c0 <__multiply+0x144>)
|
||
80075ba: f000 fbbb bl 8007d34 <__assert_func>
|
||
80075be: f100 0614 add.w r6, r0, #20
|
||
80075c2: 4633 mov r3, r6
|
||
80075c4: 2200 movs r2, #0
|
||
80075c6: eb06 0887 add.w r8, r6, r7, lsl #2
|
||
80075ca: 4543 cmp r3, r8
|
||
80075cc: d31e bcc.n 800760c <__multiply+0x90>
|
||
80075ce: f105 0c14 add.w ip, r5, #20
|
||
80075d2: f104 0314 add.w r3, r4, #20
|
||
80075d6: eb0c 0c8a add.w ip, ip, sl, lsl #2
|
||
80075da: eb03 0289 add.w r2, r3, r9, lsl #2
|
||
80075de: 9202 str r2, [sp, #8]
|
||
80075e0: ebac 0205 sub.w r2, ip, r5
|
||
80075e4: 3a15 subs r2, #21
|
||
80075e6: f022 0203 bic.w r2, r2, #3
|
||
80075ea: 3204 adds r2, #4
|
||
80075ec: f105 0115 add.w r1, r5, #21
|
||
80075f0: 458c cmp ip, r1
|
||
80075f2: bf38 it cc
|
||
80075f4: 2204 movcc r2, #4
|
||
80075f6: 9201 str r2, [sp, #4]
|
||
80075f8: 9a02 ldr r2, [sp, #8]
|
||
80075fa: 9303 str r3, [sp, #12]
|
||
80075fc: 429a cmp r2, r3
|
||
80075fe: d808 bhi.n 8007612 <__multiply+0x96>
|
||
8007600: 2f00 cmp r7, #0
|
||
8007602: dc55 bgt.n 80076b0 <__multiply+0x134>
|
||
8007604: 6107 str r7, [r0, #16]
|
||
8007606: b005 add sp, #20
|
||
8007608: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
800760c: f843 2b04 str.w r2, [r3], #4
|
||
8007610: e7db b.n 80075ca <__multiply+0x4e>
|
||
8007612: f8b3 a000 ldrh.w sl, [r3]
|
||
8007616: f1ba 0f00 cmp.w sl, #0
|
||
800761a: d020 beq.n 800765e <__multiply+0xe2>
|
||
800761c: 46b1 mov r9, r6
|
||
800761e: 2200 movs r2, #0
|
||
8007620: f105 0e14 add.w lr, r5, #20
|
||
8007624: f85e 4b04 ldr.w r4, [lr], #4
|
||
8007628: f8d9 b000 ldr.w fp, [r9]
|
||
800762c: b2a1 uxth r1, r4
|
||
800762e: fa1f fb8b uxth.w fp, fp
|
||
8007632: fb0a b101 mla r1, sl, r1, fp
|
||
8007636: 4411 add r1, r2
|
||
8007638: f8d9 2000 ldr.w r2, [r9]
|
||
800763c: 0c24 lsrs r4, r4, #16
|
||
800763e: 0c12 lsrs r2, r2, #16
|
||
8007640: fb0a 2404 mla r4, sl, r4, r2
|
||
8007644: eb04 4411 add.w r4, r4, r1, lsr #16
|
||
8007648: b289 uxth r1, r1
|
||
800764a: ea41 4104 orr.w r1, r1, r4, lsl #16
|
||
800764e: 45f4 cmp ip, lr
|
||
8007650: ea4f 4214 mov.w r2, r4, lsr #16
|
||
8007654: f849 1b04 str.w r1, [r9], #4
|
||
8007658: d8e4 bhi.n 8007624 <__multiply+0xa8>
|
||
800765a: 9901 ldr r1, [sp, #4]
|
||
800765c: 5072 str r2, [r6, r1]
|
||
800765e: 9a03 ldr r2, [sp, #12]
|
||
8007660: 3304 adds r3, #4
|
||
8007662: f8b2 9002 ldrh.w r9, [r2, #2]
|
||
8007666: f1b9 0f00 cmp.w r9, #0
|
||
800766a: d01f beq.n 80076ac <__multiply+0x130>
|
||
800766c: 46b6 mov lr, r6
|
||
800766e: f04f 0a00 mov.w sl, #0
|
||
8007672: 6834 ldr r4, [r6, #0]
|
||
8007674: f105 0114 add.w r1, r5, #20
|
||
8007678: 880a ldrh r2, [r1, #0]
|
||
800767a: f8be b002 ldrh.w fp, [lr, #2]
|
||
800767e: b2a4 uxth r4, r4
|
||
8007680: fb09 b202 mla r2, r9, r2, fp
|
||
8007684: 4492 add sl, r2
|
||
8007686: ea44 440a orr.w r4, r4, sl, lsl #16
|
||
800768a: f84e 4b04 str.w r4, [lr], #4
|
||
800768e: f851 4b04 ldr.w r4, [r1], #4
|
||
8007692: f8be 2000 ldrh.w r2, [lr]
|
||
8007696: 0c24 lsrs r4, r4, #16
|
||
8007698: fb09 2404 mla r4, r9, r4, r2
|
||
800769c: 458c cmp ip, r1
|
||
800769e: eb04 441a add.w r4, r4, sl, lsr #16
|
||
80076a2: ea4f 4a14 mov.w sl, r4, lsr #16
|
||
80076a6: d8e7 bhi.n 8007678 <__multiply+0xfc>
|
||
80076a8: 9a01 ldr r2, [sp, #4]
|
||
80076aa: 50b4 str r4, [r6, r2]
|
||
80076ac: 3604 adds r6, #4
|
||
80076ae: e7a3 b.n 80075f8 <__multiply+0x7c>
|
||
80076b0: f858 3d04 ldr.w r3, [r8, #-4]!
|
||
80076b4: 2b00 cmp r3, #0
|
||
80076b6: d1a5 bne.n 8007604 <__multiply+0x88>
|
||
80076b8: 3f01 subs r7, #1
|
||
80076ba: e7a1 b.n 8007600 <__multiply+0x84>
|
||
80076bc: 08009503 .word 0x08009503
|
||
80076c0: 08009514 .word 0x08009514
|
||
|
||
080076c4 <__pow5mult>:
|
||
80076c4: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
||
80076c8: 4615 mov r5, r2
|
||
80076ca: f012 0203 ands.w r2, r2, #3
|
||
80076ce: 4606 mov r6, r0
|
||
80076d0: 460f mov r7, r1
|
||
80076d2: d007 beq.n 80076e4 <__pow5mult+0x20>
|
||
80076d4: 4c25 ldr r4, [pc, #148] ; (800776c <__pow5mult+0xa8>)
|
||
80076d6: 3a01 subs r2, #1
|
||
80076d8: 2300 movs r3, #0
|
||
80076da: f854 2022 ldr.w r2, [r4, r2, lsl #2]
|
||
80076de: f7ff fe9f bl 8007420 <__multadd>
|
||
80076e2: 4607 mov r7, r0
|
||
80076e4: 10ad asrs r5, r5, #2
|
||
80076e6: d03d beq.n 8007764 <__pow5mult+0xa0>
|
||
80076e8: 6a74 ldr r4, [r6, #36] ; 0x24
|
||
80076ea: b97c cbnz r4, 800770c <__pow5mult+0x48>
|
||
80076ec: 2010 movs r0, #16
|
||
80076ee: f7fe fa3f bl 8005b70 <malloc>
|
||
80076f2: 4602 mov r2, r0
|
||
80076f4: 6270 str r0, [r6, #36] ; 0x24
|
||
80076f6: b928 cbnz r0, 8007704 <__pow5mult+0x40>
|
||
80076f8: f44f 71d7 mov.w r1, #430 ; 0x1ae
|
||
80076fc: 4b1c ldr r3, [pc, #112] ; (8007770 <__pow5mult+0xac>)
|
||
80076fe: 481d ldr r0, [pc, #116] ; (8007774 <__pow5mult+0xb0>)
|
||
8007700: f000 fb18 bl 8007d34 <__assert_func>
|
||
8007704: e9c0 4401 strd r4, r4, [r0, #4]
|
||
8007708: 6004 str r4, [r0, #0]
|
||
800770a: 60c4 str r4, [r0, #12]
|
||
800770c: f8d6 8024 ldr.w r8, [r6, #36] ; 0x24
|
||
8007710: f8d8 4008 ldr.w r4, [r8, #8]
|
||
8007714: b94c cbnz r4, 800772a <__pow5mult+0x66>
|
||
8007716: f240 2171 movw r1, #625 ; 0x271
|
||
800771a: 4630 mov r0, r6
|
||
800771c: f7ff ff18 bl 8007550 <__i2b>
|
||
8007720: 2300 movs r3, #0
|
||
8007722: 4604 mov r4, r0
|
||
8007724: f8c8 0008 str.w r0, [r8, #8]
|
||
8007728: 6003 str r3, [r0, #0]
|
||
800772a: f04f 0900 mov.w r9, #0
|
||
800772e: 07eb lsls r3, r5, #31
|
||
8007730: d50a bpl.n 8007748 <__pow5mult+0x84>
|
||
8007732: 4639 mov r1, r7
|
||
8007734: 4622 mov r2, r4
|
||
8007736: 4630 mov r0, r6
|
||
8007738: f7ff ff20 bl 800757c <__multiply>
|
||
800773c: 4680 mov r8, r0
|
||
800773e: 4639 mov r1, r7
|
||
8007740: 4630 mov r0, r6
|
||
8007742: f7ff fe4b bl 80073dc <_Bfree>
|
||
8007746: 4647 mov r7, r8
|
||
8007748: 106d asrs r5, r5, #1
|
||
800774a: d00b beq.n 8007764 <__pow5mult+0xa0>
|
||
800774c: 6820 ldr r0, [r4, #0]
|
||
800774e: b938 cbnz r0, 8007760 <__pow5mult+0x9c>
|
||
8007750: 4622 mov r2, r4
|
||
8007752: 4621 mov r1, r4
|
||
8007754: 4630 mov r0, r6
|
||
8007756: f7ff ff11 bl 800757c <__multiply>
|
||
800775a: 6020 str r0, [r4, #0]
|
||
800775c: f8c0 9000 str.w r9, [r0]
|
||
8007760: 4604 mov r4, r0
|
||
8007762: e7e4 b.n 800772e <__pow5mult+0x6a>
|
||
8007764: 4638 mov r0, r7
|
||
8007766: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
||
800776a: bf00 nop
|
||
800776c: 08009668 .word 0x08009668
|
||
8007770: 0800948d .word 0x0800948d
|
||
8007774: 08009514 .word 0x08009514
|
||
|
||
08007778 <__lshift>:
|
||
8007778: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
800777c: 460c mov r4, r1
|
||
800777e: 4607 mov r7, r0
|
||
8007780: 4691 mov r9, r2
|
||
8007782: 6923 ldr r3, [r4, #16]
|
||
8007784: 6849 ldr r1, [r1, #4]
|
||
8007786: eb03 1862 add.w r8, r3, r2, asr #5
|
||
800778a: 68a3 ldr r3, [r4, #8]
|
||
800778c: ea4f 1a62 mov.w sl, r2, asr #5
|
||
8007790: f108 0601 add.w r6, r8, #1
|
||
8007794: 42b3 cmp r3, r6
|
||
8007796: db0b blt.n 80077b0 <__lshift+0x38>
|
||
8007798: 4638 mov r0, r7
|
||
800779a: f7ff fddf bl 800735c <_Balloc>
|
||
800779e: 4605 mov r5, r0
|
||
80077a0: b948 cbnz r0, 80077b6 <__lshift+0x3e>
|
||
80077a2: 4602 mov r2, r0
|
||
80077a4: f240 11d9 movw r1, #473 ; 0x1d9
|
||
80077a8: 4b27 ldr r3, [pc, #156] ; (8007848 <__lshift+0xd0>)
|
||
80077aa: 4828 ldr r0, [pc, #160] ; (800784c <__lshift+0xd4>)
|
||
80077ac: f000 fac2 bl 8007d34 <__assert_func>
|
||
80077b0: 3101 adds r1, #1
|
||
80077b2: 005b lsls r3, r3, #1
|
||
80077b4: e7ee b.n 8007794 <__lshift+0x1c>
|
||
80077b6: 2300 movs r3, #0
|
||
80077b8: f100 0114 add.w r1, r0, #20
|
||
80077bc: f100 0210 add.w r2, r0, #16
|
||
80077c0: 4618 mov r0, r3
|
||
80077c2: 4553 cmp r3, sl
|
||
80077c4: db33 blt.n 800782e <__lshift+0xb6>
|
||
80077c6: 6920 ldr r0, [r4, #16]
|
||
80077c8: ea2a 7aea bic.w sl, sl, sl, asr #31
|
||
80077cc: f104 0314 add.w r3, r4, #20
|
||
80077d0: f019 091f ands.w r9, r9, #31
|
||
80077d4: eb01 018a add.w r1, r1, sl, lsl #2
|
||
80077d8: eb03 0c80 add.w ip, r3, r0, lsl #2
|
||
80077dc: d02b beq.n 8007836 <__lshift+0xbe>
|
||
80077de: 468a mov sl, r1
|
||
80077e0: 2200 movs r2, #0
|
||
80077e2: f1c9 0e20 rsb lr, r9, #32
|
||
80077e6: 6818 ldr r0, [r3, #0]
|
||
80077e8: fa00 f009 lsl.w r0, r0, r9
|
||
80077ec: 4302 orrs r2, r0
|
||
80077ee: f84a 2b04 str.w r2, [sl], #4
|
||
80077f2: f853 2b04 ldr.w r2, [r3], #4
|
||
80077f6: 459c cmp ip, r3
|
||
80077f8: fa22 f20e lsr.w r2, r2, lr
|
||
80077fc: d8f3 bhi.n 80077e6 <__lshift+0x6e>
|
||
80077fe: ebac 0304 sub.w r3, ip, r4
|
||
8007802: 3b15 subs r3, #21
|
||
8007804: f023 0303 bic.w r3, r3, #3
|
||
8007808: 3304 adds r3, #4
|
||
800780a: f104 0015 add.w r0, r4, #21
|
||
800780e: 4584 cmp ip, r0
|
||
8007810: bf38 it cc
|
||
8007812: 2304 movcc r3, #4
|
||
8007814: 50ca str r2, [r1, r3]
|
||
8007816: b10a cbz r2, 800781c <__lshift+0xa4>
|
||
8007818: f108 0602 add.w r6, r8, #2
|
||
800781c: 3e01 subs r6, #1
|
||
800781e: 4638 mov r0, r7
|
||
8007820: 4621 mov r1, r4
|
||
8007822: 612e str r6, [r5, #16]
|
||
8007824: f7ff fdda bl 80073dc <_Bfree>
|
||
8007828: 4628 mov r0, r5
|
||
800782a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
800782e: f842 0f04 str.w r0, [r2, #4]!
|
||
8007832: 3301 adds r3, #1
|
||
8007834: e7c5 b.n 80077c2 <__lshift+0x4a>
|
||
8007836: 3904 subs r1, #4
|
||
8007838: f853 2b04 ldr.w r2, [r3], #4
|
||
800783c: 459c cmp ip, r3
|
||
800783e: f841 2f04 str.w r2, [r1, #4]!
|
||
8007842: d8f9 bhi.n 8007838 <__lshift+0xc0>
|
||
8007844: e7ea b.n 800781c <__lshift+0xa4>
|
||
8007846: bf00 nop
|
||
8007848: 08009503 .word 0x08009503
|
||
800784c: 08009514 .word 0x08009514
|
||
|
||
08007850 <__mcmp>:
|
||
8007850: 4603 mov r3, r0
|
||
8007852: 690a ldr r2, [r1, #16]
|
||
8007854: 6900 ldr r0, [r0, #16]
|
||
8007856: b530 push {r4, r5, lr}
|
||
8007858: 1a80 subs r0, r0, r2
|
||
800785a: d10d bne.n 8007878 <__mcmp+0x28>
|
||
800785c: 3314 adds r3, #20
|
||
800785e: 3114 adds r1, #20
|
||
8007860: eb03 0482 add.w r4, r3, r2, lsl #2
|
||
8007864: eb01 0182 add.w r1, r1, r2, lsl #2
|
||
8007868: f854 5d04 ldr.w r5, [r4, #-4]!
|
||
800786c: f851 2d04 ldr.w r2, [r1, #-4]!
|
||
8007870: 4295 cmp r5, r2
|
||
8007872: d002 beq.n 800787a <__mcmp+0x2a>
|
||
8007874: d304 bcc.n 8007880 <__mcmp+0x30>
|
||
8007876: 2001 movs r0, #1
|
||
8007878: bd30 pop {r4, r5, pc}
|
||
800787a: 42a3 cmp r3, r4
|
||
800787c: d3f4 bcc.n 8007868 <__mcmp+0x18>
|
||
800787e: e7fb b.n 8007878 <__mcmp+0x28>
|
||
8007880: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8007884: e7f8 b.n 8007878 <__mcmp+0x28>
|
||
...
|
||
|
||
08007888 <__mdiff>:
|
||
8007888: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
800788c: 460c mov r4, r1
|
||
800788e: 4606 mov r6, r0
|
||
8007890: 4611 mov r1, r2
|
||
8007892: 4620 mov r0, r4
|
||
8007894: 4692 mov sl, r2
|
||
8007896: f7ff ffdb bl 8007850 <__mcmp>
|
||
800789a: 1e05 subs r5, r0, #0
|
||
800789c: d111 bne.n 80078c2 <__mdiff+0x3a>
|
||
800789e: 4629 mov r1, r5
|
||
80078a0: 4630 mov r0, r6
|
||
80078a2: f7ff fd5b bl 800735c <_Balloc>
|
||
80078a6: 4602 mov r2, r0
|
||
80078a8: b928 cbnz r0, 80078b6 <__mdiff+0x2e>
|
||
80078aa: f240 2132 movw r1, #562 ; 0x232
|
||
80078ae: 4b3c ldr r3, [pc, #240] ; (80079a0 <__mdiff+0x118>)
|
||
80078b0: 483c ldr r0, [pc, #240] ; (80079a4 <__mdiff+0x11c>)
|
||
80078b2: f000 fa3f bl 8007d34 <__assert_func>
|
||
80078b6: 2301 movs r3, #1
|
||
80078b8: e9c0 3504 strd r3, r5, [r0, #16]
|
||
80078bc: 4610 mov r0, r2
|
||
80078be: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
80078c2: bfa4 itt ge
|
||
80078c4: 4653 movge r3, sl
|
||
80078c6: 46a2 movge sl, r4
|
||
80078c8: 4630 mov r0, r6
|
||
80078ca: f8da 1004 ldr.w r1, [sl, #4]
|
||
80078ce: bfa6 itte ge
|
||
80078d0: 461c movge r4, r3
|
||
80078d2: 2500 movge r5, #0
|
||
80078d4: 2501 movlt r5, #1
|
||
80078d6: f7ff fd41 bl 800735c <_Balloc>
|
||
80078da: 4602 mov r2, r0
|
||
80078dc: b918 cbnz r0, 80078e6 <__mdiff+0x5e>
|
||
80078de: f44f 7110 mov.w r1, #576 ; 0x240
|
||
80078e2: 4b2f ldr r3, [pc, #188] ; (80079a0 <__mdiff+0x118>)
|
||
80078e4: e7e4 b.n 80078b0 <__mdiff+0x28>
|
||
80078e6: f100 0814 add.w r8, r0, #20
|
||
80078ea: f8da 7010 ldr.w r7, [sl, #16]
|
||
80078ee: 60c5 str r5, [r0, #12]
|
||
80078f0: f04f 0c00 mov.w ip, #0
|
||
80078f4: f10a 0514 add.w r5, sl, #20
|
||
80078f8: f10a 0010 add.w r0, sl, #16
|
||
80078fc: 46c2 mov sl, r8
|
||
80078fe: 6926 ldr r6, [r4, #16]
|
||
8007900: f104 0914 add.w r9, r4, #20
|
||
8007904: eb05 0e87 add.w lr, r5, r7, lsl #2
|
||
8007908: eb09 0686 add.w r6, r9, r6, lsl #2
|
||
800790c: f850 bf04 ldr.w fp, [r0, #4]!
|
||
8007910: f859 3b04 ldr.w r3, [r9], #4
|
||
8007914: fa1f f18b uxth.w r1, fp
|
||
8007918: 4461 add r1, ip
|
||
800791a: fa1f fc83 uxth.w ip, r3
|
||
800791e: 0c1b lsrs r3, r3, #16
|
||
8007920: eba1 010c sub.w r1, r1, ip
|
||
8007924: ebc3 431b rsb r3, r3, fp, lsr #16
|
||
8007928: eb03 4321 add.w r3, r3, r1, asr #16
|
||
800792c: b289 uxth r1, r1
|
||
800792e: ea4f 4c23 mov.w ip, r3, asr #16
|
||
8007932: 454e cmp r6, r9
|
||
8007934: ea41 4303 orr.w r3, r1, r3, lsl #16
|
||
8007938: f84a 3b04 str.w r3, [sl], #4
|
||
800793c: d8e6 bhi.n 800790c <__mdiff+0x84>
|
||
800793e: 1b33 subs r3, r6, r4
|
||
8007940: 3b15 subs r3, #21
|
||
8007942: f023 0303 bic.w r3, r3, #3
|
||
8007946: 3415 adds r4, #21
|
||
8007948: 3304 adds r3, #4
|
||
800794a: 42a6 cmp r6, r4
|
||
800794c: bf38 it cc
|
||
800794e: 2304 movcc r3, #4
|
||
8007950: 441d add r5, r3
|
||
8007952: 4443 add r3, r8
|
||
8007954: 461e mov r6, r3
|
||
8007956: 462c mov r4, r5
|
||
8007958: 4574 cmp r4, lr
|
||
800795a: d30e bcc.n 800797a <__mdiff+0xf2>
|
||
800795c: f10e 0103 add.w r1, lr, #3
|
||
8007960: 1b49 subs r1, r1, r5
|
||
8007962: f021 0103 bic.w r1, r1, #3
|
||
8007966: 3d03 subs r5, #3
|
||
8007968: 45ae cmp lr, r5
|
||
800796a: bf38 it cc
|
||
800796c: 2100 movcc r1, #0
|
||
800796e: 4419 add r1, r3
|
||
8007970: f851 3d04 ldr.w r3, [r1, #-4]!
|
||
8007974: b18b cbz r3, 800799a <__mdiff+0x112>
|
||
8007976: 6117 str r7, [r2, #16]
|
||
8007978: e7a0 b.n 80078bc <__mdiff+0x34>
|
||
800797a: f854 8b04 ldr.w r8, [r4], #4
|
||
800797e: fa1f f188 uxth.w r1, r8
|
||
8007982: 4461 add r1, ip
|
||
8007984: 1408 asrs r0, r1, #16
|
||
8007986: eb00 4018 add.w r0, r0, r8, lsr #16
|
||
800798a: b289 uxth r1, r1
|
||
800798c: ea41 4100 orr.w r1, r1, r0, lsl #16
|
||
8007990: ea4f 4c20 mov.w ip, r0, asr #16
|
||
8007994: f846 1b04 str.w r1, [r6], #4
|
||
8007998: e7de b.n 8007958 <__mdiff+0xd0>
|
||
800799a: 3f01 subs r7, #1
|
||
800799c: e7e8 b.n 8007970 <__mdiff+0xe8>
|
||
800799e: bf00 nop
|
||
80079a0: 08009503 .word 0x08009503
|
||
80079a4: 08009514 .word 0x08009514
|
||
|
||
080079a8 <__d2b>:
|
||
80079a8: e92d 41f3 stmdb sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
|
||
80079ac: 2101 movs r1, #1
|
||
80079ae: e9dd 7608 ldrd r7, r6, [sp, #32]
|
||
80079b2: 4690 mov r8, r2
|
||
80079b4: 461d mov r5, r3
|
||
80079b6: f7ff fcd1 bl 800735c <_Balloc>
|
||
80079ba: 4604 mov r4, r0
|
||
80079bc: b930 cbnz r0, 80079cc <__d2b+0x24>
|
||
80079be: 4602 mov r2, r0
|
||
80079c0: f240 310a movw r1, #778 ; 0x30a
|
||
80079c4: 4b24 ldr r3, [pc, #144] ; (8007a58 <__d2b+0xb0>)
|
||
80079c6: 4825 ldr r0, [pc, #148] ; (8007a5c <__d2b+0xb4>)
|
||
80079c8: f000 f9b4 bl 8007d34 <__assert_func>
|
||
80079cc: f3c5 0313 ubfx r3, r5, #0, #20
|
||
80079d0: f3c5 550a ubfx r5, r5, #20, #11
|
||
80079d4: bb2d cbnz r5, 8007a22 <__d2b+0x7a>
|
||
80079d6: 9301 str r3, [sp, #4]
|
||
80079d8: f1b8 0300 subs.w r3, r8, #0
|
||
80079dc: d026 beq.n 8007a2c <__d2b+0x84>
|
||
80079de: 4668 mov r0, sp
|
||
80079e0: 9300 str r3, [sp, #0]
|
||
80079e2: f7ff fd87 bl 80074f4 <__lo0bits>
|
||
80079e6: 9900 ldr r1, [sp, #0]
|
||
80079e8: b1f0 cbz r0, 8007a28 <__d2b+0x80>
|
||
80079ea: 9a01 ldr r2, [sp, #4]
|
||
80079ec: f1c0 0320 rsb r3, r0, #32
|
||
80079f0: fa02 f303 lsl.w r3, r2, r3
|
||
80079f4: 430b orrs r3, r1
|
||
80079f6: 40c2 lsrs r2, r0
|
||
80079f8: 6163 str r3, [r4, #20]
|
||
80079fa: 9201 str r2, [sp, #4]
|
||
80079fc: 9b01 ldr r3, [sp, #4]
|
||
80079fe: 2b00 cmp r3, #0
|
||
8007a00: bf14 ite ne
|
||
8007a02: 2102 movne r1, #2
|
||
8007a04: 2101 moveq r1, #1
|
||
8007a06: 61a3 str r3, [r4, #24]
|
||
8007a08: 6121 str r1, [r4, #16]
|
||
8007a0a: b1c5 cbz r5, 8007a3e <__d2b+0x96>
|
||
8007a0c: f2a5 4533 subw r5, r5, #1075 ; 0x433
|
||
8007a10: 4405 add r5, r0
|
||
8007a12: f1c0 0035 rsb r0, r0, #53 ; 0x35
|
||
8007a16: 603d str r5, [r7, #0]
|
||
8007a18: 6030 str r0, [r6, #0]
|
||
8007a1a: 4620 mov r0, r4
|
||
8007a1c: b002 add sp, #8
|
||
8007a1e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
||
8007a22: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
|
||
8007a26: e7d6 b.n 80079d6 <__d2b+0x2e>
|
||
8007a28: 6161 str r1, [r4, #20]
|
||
8007a2a: e7e7 b.n 80079fc <__d2b+0x54>
|
||
8007a2c: a801 add r0, sp, #4
|
||
8007a2e: f7ff fd61 bl 80074f4 <__lo0bits>
|
||
8007a32: 2101 movs r1, #1
|
||
8007a34: 9b01 ldr r3, [sp, #4]
|
||
8007a36: 6121 str r1, [r4, #16]
|
||
8007a38: 6163 str r3, [r4, #20]
|
||
8007a3a: 3020 adds r0, #32
|
||
8007a3c: e7e5 b.n 8007a0a <__d2b+0x62>
|
||
8007a3e: eb04 0381 add.w r3, r4, r1, lsl #2
|
||
8007a42: f2a0 4032 subw r0, r0, #1074 ; 0x432
|
||
8007a46: 6038 str r0, [r7, #0]
|
||
8007a48: 6918 ldr r0, [r3, #16]
|
||
8007a4a: f7ff fd33 bl 80074b4 <__hi0bits>
|
||
8007a4e: ebc0 1141 rsb r1, r0, r1, lsl #5
|
||
8007a52: 6031 str r1, [r6, #0]
|
||
8007a54: e7e1 b.n 8007a1a <__d2b+0x72>
|
||
8007a56: bf00 nop
|
||
8007a58: 08009503 .word 0x08009503
|
||
8007a5c: 08009514 .word 0x08009514
|
||
|
||
08007a60 <_calloc_r>:
|
||
8007a60: b538 push {r3, r4, r5, lr}
|
||
8007a62: fb02 f501 mul.w r5, r2, r1
|
||
8007a66: 4629 mov r1, r5
|
||
8007a68: f7fe f8e6 bl 8005c38 <_malloc_r>
|
||
8007a6c: 4604 mov r4, r0
|
||
8007a6e: b118 cbz r0, 8007a78 <_calloc_r+0x18>
|
||
8007a70: 462a mov r2, r5
|
||
8007a72: 2100 movs r1, #0
|
||
8007a74: f7fe f88c bl 8005b90 <memset>
|
||
8007a78: 4620 mov r0, r4
|
||
8007a7a: bd38 pop {r3, r4, r5, pc}
|
||
|
||
08007a7c <__ssputs_r>:
|
||
8007a7c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
||
8007a80: 688e ldr r6, [r1, #8]
|
||
8007a82: 4682 mov sl, r0
|
||
8007a84: 429e cmp r6, r3
|
||
8007a86: 460c mov r4, r1
|
||
8007a88: 4690 mov r8, r2
|
||
8007a8a: 461f mov r7, r3
|
||
8007a8c: d838 bhi.n 8007b00 <__ssputs_r+0x84>
|
||
8007a8e: 898a ldrh r2, [r1, #12]
|
||
8007a90: f412 6f90 tst.w r2, #1152 ; 0x480
|
||
8007a94: d032 beq.n 8007afc <__ssputs_r+0x80>
|
||
8007a96: 6825 ldr r5, [r4, #0]
|
||
8007a98: 6909 ldr r1, [r1, #16]
|
||
8007a9a: 3301 adds r3, #1
|
||
8007a9c: eba5 0901 sub.w r9, r5, r1
|
||
8007aa0: 6965 ldr r5, [r4, #20]
|
||
8007aa2: 444b add r3, r9
|
||
8007aa4: eb05 0545 add.w r5, r5, r5, lsl #1
|
||
8007aa8: eb05 75d5 add.w r5, r5, r5, lsr #31
|
||
8007aac: 106d asrs r5, r5, #1
|
||
8007aae: 429d cmp r5, r3
|
||
8007ab0: bf38 it cc
|
||
8007ab2: 461d movcc r5, r3
|
||
8007ab4: 0553 lsls r3, r2, #21
|
||
8007ab6: d531 bpl.n 8007b1c <__ssputs_r+0xa0>
|
||
8007ab8: 4629 mov r1, r5
|
||
8007aba: f7fe f8bd bl 8005c38 <_malloc_r>
|
||
8007abe: 4606 mov r6, r0
|
||
8007ac0: b950 cbnz r0, 8007ad8 <__ssputs_r+0x5c>
|
||
8007ac2: 230c movs r3, #12
|
||
8007ac4: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8007ac8: f8ca 3000 str.w r3, [sl]
|
||
8007acc: 89a3 ldrh r3, [r4, #12]
|
||
8007ace: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8007ad2: 81a3 strh r3, [r4, #12]
|
||
8007ad4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
||
8007ad8: 464a mov r2, r9
|
||
8007ada: 6921 ldr r1, [r4, #16]
|
||
8007adc: f7ff fc24 bl 8007328 <memcpy>
|
||
8007ae0: 89a3 ldrh r3, [r4, #12]
|
||
8007ae2: f423 6390 bic.w r3, r3, #1152 ; 0x480
|
||
8007ae6: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
8007aea: 81a3 strh r3, [r4, #12]
|
||
8007aec: 6126 str r6, [r4, #16]
|
||
8007aee: 444e add r6, r9
|
||
8007af0: 6026 str r6, [r4, #0]
|
||
8007af2: 463e mov r6, r7
|
||
8007af4: 6165 str r5, [r4, #20]
|
||
8007af6: eba5 0509 sub.w r5, r5, r9
|
||
8007afa: 60a5 str r5, [r4, #8]
|
||
8007afc: 42be cmp r6, r7
|
||
8007afe: d900 bls.n 8007b02 <__ssputs_r+0x86>
|
||
8007b00: 463e mov r6, r7
|
||
8007b02: 4632 mov r2, r6
|
||
8007b04: 4641 mov r1, r8
|
||
8007b06: 6820 ldr r0, [r4, #0]
|
||
8007b08: f000 f959 bl 8007dbe <memmove>
|
||
8007b0c: 68a3 ldr r3, [r4, #8]
|
||
8007b0e: 6822 ldr r2, [r4, #0]
|
||
8007b10: 1b9b subs r3, r3, r6
|
||
8007b12: 4432 add r2, r6
|
||
8007b14: 2000 movs r0, #0
|
||
8007b16: 60a3 str r3, [r4, #8]
|
||
8007b18: 6022 str r2, [r4, #0]
|
||
8007b1a: e7db b.n 8007ad4 <__ssputs_r+0x58>
|
||
8007b1c: 462a mov r2, r5
|
||
8007b1e: f000 f968 bl 8007df2 <_realloc_r>
|
||
8007b22: 4606 mov r6, r0
|
||
8007b24: 2800 cmp r0, #0
|
||
8007b26: d1e1 bne.n 8007aec <__ssputs_r+0x70>
|
||
8007b28: 4650 mov r0, sl
|
||
8007b2a: 6921 ldr r1, [r4, #16]
|
||
8007b2c: f7fe f838 bl 8005ba0 <_free_r>
|
||
8007b30: e7c7 b.n 8007ac2 <__ssputs_r+0x46>
|
||
...
|
||
|
||
08007b34 <_svfiprintf_r>:
|
||
8007b34: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8007b38: 4698 mov r8, r3
|
||
8007b3a: 898b ldrh r3, [r1, #12]
|
||
8007b3c: 4607 mov r7, r0
|
||
8007b3e: 061b lsls r3, r3, #24
|
||
8007b40: 460d mov r5, r1
|
||
8007b42: 4614 mov r4, r2
|
||
8007b44: b09d sub sp, #116 ; 0x74
|
||
8007b46: d50e bpl.n 8007b66 <_svfiprintf_r+0x32>
|
||
8007b48: 690b ldr r3, [r1, #16]
|
||
8007b4a: b963 cbnz r3, 8007b66 <_svfiprintf_r+0x32>
|
||
8007b4c: 2140 movs r1, #64 ; 0x40
|
||
8007b4e: f7fe f873 bl 8005c38 <_malloc_r>
|
||
8007b52: 6028 str r0, [r5, #0]
|
||
8007b54: 6128 str r0, [r5, #16]
|
||
8007b56: b920 cbnz r0, 8007b62 <_svfiprintf_r+0x2e>
|
||
8007b58: 230c movs r3, #12
|
||
8007b5a: 603b str r3, [r7, #0]
|
||
8007b5c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8007b60: e0d1 b.n 8007d06 <_svfiprintf_r+0x1d2>
|
||
8007b62: 2340 movs r3, #64 ; 0x40
|
||
8007b64: 616b str r3, [r5, #20]
|
||
8007b66: 2300 movs r3, #0
|
||
8007b68: 9309 str r3, [sp, #36] ; 0x24
|
||
8007b6a: 2320 movs r3, #32
|
||
8007b6c: f88d 3029 strb.w r3, [sp, #41] ; 0x29
|
||
8007b70: 2330 movs r3, #48 ; 0x30
|
||
8007b72: f04f 0901 mov.w r9, #1
|
||
8007b76: f8cd 800c str.w r8, [sp, #12]
|
||
8007b7a: f8df 81a4 ldr.w r8, [pc, #420] ; 8007d20 <_svfiprintf_r+0x1ec>
|
||
8007b7e: f88d 302a strb.w r3, [sp, #42] ; 0x2a
|
||
8007b82: 4623 mov r3, r4
|
||
8007b84: 469a mov sl, r3
|
||
8007b86: f813 2b01 ldrb.w r2, [r3], #1
|
||
8007b8a: b10a cbz r2, 8007b90 <_svfiprintf_r+0x5c>
|
||
8007b8c: 2a25 cmp r2, #37 ; 0x25
|
||
8007b8e: d1f9 bne.n 8007b84 <_svfiprintf_r+0x50>
|
||
8007b90: ebba 0b04 subs.w fp, sl, r4
|
||
8007b94: d00b beq.n 8007bae <_svfiprintf_r+0x7a>
|
||
8007b96: 465b mov r3, fp
|
||
8007b98: 4622 mov r2, r4
|
||
8007b9a: 4629 mov r1, r5
|
||
8007b9c: 4638 mov r0, r7
|
||
8007b9e: f7ff ff6d bl 8007a7c <__ssputs_r>
|
||
8007ba2: 3001 adds r0, #1
|
||
8007ba4: f000 80aa beq.w 8007cfc <_svfiprintf_r+0x1c8>
|
||
8007ba8: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
8007baa: 445a add r2, fp
|
||
8007bac: 9209 str r2, [sp, #36] ; 0x24
|
||
8007bae: f89a 3000 ldrb.w r3, [sl]
|
||
8007bb2: 2b00 cmp r3, #0
|
||
8007bb4: f000 80a2 beq.w 8007cfc <_svfiprintf_r+0x1c8>
|
||
8007bb8: 2300 movs r3, #0
|
||
8007bba: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8007bbe: e9cd 2305 strd r2, r3, [sp, #20]
|
||
8007bc2: f10a 0a01 add.w sl, sl, #1
|
||
8007bc6: 9304 str r3, [sp, #16]
|
||
8007bc8: 9307 str r3, [sp, #28]
|
||
8007bca: f88d 3053 strb.w r3, [sp, #83] ; 0x53
|
||
8007bce: 931a str r3, [sp, #104] ; 0x68
|
||
8007bd0: 4654 mov r4, sl
|
||
8007bd2: 2205 movs r2, #5
|
||
8007bd4: f814 1b01 ldrb.w r1, [r4], #1
|
||
8007bd8: 4851 ldr r0, [pc, #324] ; (8007d20 <_svfiprintf_r+0x1ec>)
|
||
8007bda: f7ff fb97 bl 800730c <memchr>
|
||
8007bde: 9a04 ldr r2, [sp, #16]
|
||
8007be0: b9d8 cbnz r0, 8007c1a <_svfiprintf_r+0xe6>
|
||
8007be2: 06d0 lsls r0, r2, #27
|
||
8007be4: bf44 itt mi
|
||
8007be6: 2320 movmi r3, #32
|
||
8007be8: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
8007bec: 0711 lsls r1, r2, #28
|
||
8007bee: bf44 itt mi
|
||
8007bf0: 232b movmi r3, #43 ; 0x2b
|
||
8007bf2: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
8007bf6: f89a 3000 ldrb.w r3, [sl]
|
||
8007bfa: 2b2a cmp r3, #42 ; 0x2a
|
||
8007bfc: d015 beq.n 8007c2a <_svfiprintf_r+0xf6>
|
||
8007bfe: 4654 mov r4, sl
|
||
8007c00: 2000 movs r0, #0
|
||
8007c02: f04f 0c0a mov.w ip, #10
|
||
8007c06: 9a07 ldr r2, [sp, #28]
|
||
8007c08: 4621 mov r1, r4
|
||
8007c0a: f811 3b01 ldrb.w r3, [r1], #1
|
||
8007c0e: 3b30 subs r3, #48 ; 0x30
|
||
8007c10: 2b09 cmp r3, #9
|
||
8007c12: d94e bls.n 8007cb2 <_svfiprintf_r+0x17e>
|
||
8007c14: b1b0 cbz r0, 8007c44 <_svfiprintf_r+0x110>
|
||
8007c16: 9207 str r2, [sp, #28]
|
||
8007c18: e014 b.n 8007c44 <_svfiprintf_r+0x110>
|
||
8007c1a: eba0 0308 sub.w r3, r0, r8
|
||
8007c1e: fa09 f303 lsl.w r3, r9, r3
|
||
8007c22: 4313 orrs r3, r2
|
||
8007c24: 46a2 mov sl, r4
|
||
8007c26: 9304 str r3, [sp, #16]
|
||
8007c28: e7d2 b.n 8007bd0 <_svfiprintf_r+0x9c>
|
||
8007c2a: 9b03 ldr r3, [sp, #12]
|
||
8007c2c: 1d19 adds r1, r3, #4
|
||
8007c2e: 681b ldr r3, [r3, #0]
|
||
8007c30: 9103 str r1, [sp, #12]
|
||
8007c32: 2b00 cmp r3, #0
|
||
8007c34: bfbb ittet lt
|
||
8007c36: 425b neglt r3, r3
|
||
8007c38: f042 0202 orrlt.w r2, r2, #2
|
||
8007c3c: 9307 strge r3, [sp, #28]
|
||
8007c3e: 9307 strlt r3, [sp, #28]
|
||
8007c40: bfb8 it lt
|
||
8007c42: 9204 strlt r2, [sp, #16]
|
||
8007c44: 7823 ldrb r3, [r4, #0]
|
||
8007c46: 2b2e cmp r3, #46 ; 0x2e
|
||
8007c48: d10c bne.n 8007c64 <_svfiprintf_r+0x130>
|
||
8007c4a: 7863 ldrb r3, [r4, #1]
|
||
8007c4c: 2b2a cmp r3, #42 ; 0x2a
|
||
8007c4e: d135 bne.n 8007cbc <_svfiprintf_r+0x188>
|
||
8007c50: 9b03 ldr r3, [sp, #12]
|
||
8007c52: 3402 adds r4, #2
|
||
8007c54: 1d1a adds r2, r3, #4
|
||
8007c56: 681b ldr r3, [r3, #0]
|
||
8007c58: 9203 str r2, [sp, #12]
|
||
8007c5a: 2b00 cmp r3, #0
|
||
8007c5c: bfb8 it lt
|
||
8007c5e: f04f 33ff movlt.w r3, #4294967295 ; 0xffffffff
|
||
8007c62: 9305 str r3, [sp, #20]
|
||
8007c64: f8df a0c8 ldr.w sl, [pc, #200] ; 8007d30 <_svfiprintf_r+0x1fc>
|
||
8007c68: 2203 movs r2, #3
|
||
8007c6a: 4650 mov r0, sl
|
||
8007c6c: 7821 ldrb r1, [r4, #0]
|
||
8007c6e: f7ff fb4d bl 800730c <memchr>
|
||
8007c72: b140 cbz r0, 8007c86 <_svfiprintf_r+0x152>
|
||
8007c74: 2340 movs r3, #64 ; 0x40
|
||
8007c76: eba0 000a sub.w r0, r0, sl
|
||
8007c7a: fa03 f000 lsl.w r0, r3, r0
|
||
8007c7e: 9b04 ldr r3, [sp, #16]
|
||
8007c80: 3401 adds r4, #1
|
||
8007c82: 4303 orrs r3, r0
|
||
8007c84: 9304 str r3, [sp, #16]
|
||
8007c86: f814 1b01 ldrb.w r1, [r4], #1
|
||
8007c8a: 2206 movs r2, #6
|
||
8007c8c: 4825 ldr r0, [pc, #148] ; (8007d24 <_svfiprintf_r+0x1f0>)
|
||
8007c8e: f88d 1028 strb.w r1, [sp, #40] ; 0x28
|
||
8007c92: f7ff fb3b bl 800730c <memchr>
|
||
8007c96: 2800 cmp r0, #0
|
||
8007c98: d038 beq.n 8007d0c <_svfiprintf_r+0x1d8>
|
||
8007c9a: 4b23 ldr r3, [pc, #140] ; (8007d28 <_svfiprintf_r+0x1f4>)
|
||
8007c9c: bb1b cbnz r3, 8007ce6 <_svfiprintf_r+0x1b2>
|
||
8007c9e: 9b03 ldr r3, [sp, #12]
|
||
8007ca0: 3307 adds r3, #7
|
||
8007ca2: f023 0307 bic.w r3, r3, #7
|
||
8007ca6: 3308 adds r3, #8
|
||
8007ca8: 9303 str r3, [sp, #12]
|
||
8007caa: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
8007cac: 4433 add r3, r6
|
||
8007cae: 9309 str r3, [sp, #36] ; 0x24
|
||
8007cb0: e767 b.n 8007b82 <_svfiprintf_r+0x4e>
|
||
8007cb2: 460c mov r4, r1
|
||
8007cb4: 2001 movs r0, #1
|
||
8007cb6: fb0c 3202 mla r2, ip, r2, r3
|
||
8007cba: e7a5 b.n 8007c08 <_svfiprintf_r+0xd4>
|
||
8007cbc: 2300 movs r3, #0
|
||
8007cbe: f04f 0c0a mov.w ip, #10
|
||
8007cc2: 4619 mov r1, r3
|
||
8007cc4: 3401 adds r4, #1
|
||
8007cc6: 9305 str r3, [sp, #20]
|
||
8007cc8: 4620 mov r0, r4
|
||
8007cca: f810 2b01 ldrb.w r2, [r0], #1
|
||
8007cce: 3a30 subs r2, #48 ; 0x30
|
||
8007cd0: 2a09 cmp r2, #9
|
||
8007cd2: d903 bls.n 8007cdc <_svfiprintf_r+0x1a8>
|
||
8007cd4: 2b00 cmp r3, #0
|
||
8007cd6: d0c5 beq.n 8007c64 <_svfiprintf_r+0x130>
|
||
8007cd8: 9105 str r1, [sp, #20]
|
||
8007cda: e7c3 b.n 8007c64 <_svfiprintf_r+0x130>
|
||
8007cdc: 4604 mov r4, r0
|
||
8007cde: 2301 movs r3, #1
|
||
8007ce0: fb0c 2101 mla r1, ip, r1, r2
|
||
8007ce4: e7f0 b.n 8007cc8 <_svfiprintf_r+0x194>
|
||
8007ce6: ab03 add r3, sp, #12
|
||
8007ce8: 9300 str r3, [sp, #0]
|
||
8007cea: 462a mov r2, r5
|
||
8007cec: 4638 mov r0, r7
|
||
8007cee: 4b0f ldr r3, [pc, #60] ; (8007d2c <_svfiprintf_r+0x1f8>)
|
||
8007cf0: a904 add r1, sp, #16
|
||
8007cf2: f7fe f899 bl 8005e28 <_printf_float>
|
||
8007cf6: 1c42 adds r2, r0, #1
|
||
8007cf8: 4606 mov r6, r0
|
||
8007cfa: d1d6 bne.n 8007caa <_svfiprintf_r+0x176>
|
||
8007cfc: 89ab ldrh r3, [r5, #12]
|
||
8007cfe: 065b lsls r3, r3, #25
|
||
8007d00: f53f af2c bmi.w 8007b5c <_svfiprintf_r+0x28>
|
||
8007d04: 9809 ldr r0, [sp, #36] ; 0x24
|
||
8007d06: b01d add sp, #116 ; 0x74
|
||
8007d08: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8007d0c: ab03 add r3, sp, #12
|
||
8007d0e: 9300 str r3, [sp, #0]
|
||
8007d10: 462a mov r2, r5
|
||
8007d12: 4638 mov r0, r7
|
||
8007d14: 4b05 ldr r3, [pc, #20] ; (8007d2c <_svfiprintf_r+0x1f8>)
|
||
8007d16: a904 add r1, sp, #16
|
||
8007d18: f7fe fb22 bl 8006360 <_printf_i>
|
||
8007d1c: e7eb b.n 8007cf6 <_svfiprintf_r+0x1c2>
|
||
8007d1e: bf00 nop
|
||
8007d20: 08009674 .word 0x08009674
|
||
8007d24: 0800967e .word 0x0800967e
|
||
8007d28: 08005e29 .word 0x08005e29
|
||
8007d2c: 08007a7d .word 0x08007a7d
|
||
8007d30: 0800967a .word 0x0800967a
|
||
|
||
08007d34 <__assert_func>:
|
||
8007d34: b51f push {r0, r1, r2, r3, r4, lr}
|
||
8007d36: 4614 mov r4, r2
|
||
8007d38: 461a mov r2, r3
|
||
8007d3a: 4b09 ldr r3, [pc, #36] ; (8007d60 <__assert_func+0x2c>)
|
||
8007d3c: 4605 mov r5, r0
|
||
8007d3e: 681b ldr r3, [r3, #0]
|
||
8007d40: 68d8 ldr r0, [r3, #12]
|
||
8007d42: b14c cbz r4, 8007d58 <__assert_func+0x24>
|
||
8007d44: 4b07 ldr r3, [pc, #28] ; (8007d64 <__assert_func+0x30>)
|
||
8007d46: e9cd 3401 strd r3, r4, [sp, #4]
|
||
8007d4a: 9100 str r1, [sp, #0]
|
||
8007d4c: 462b mov r3, r5
|
||
8007d4e: 4906 ldr r1, [pc, #24] ; (8007d68 <__assert_func+0x34>)
|
||
8007d50: f000 f80e bl 8007d70 <fiprintf>
|
||
8007d54: f000 fa98 bl 8008288 <abort>
|
||
8007d58: 4b04 ldr r3, [pc, #16] ; (8007d6c <__assert_func+0x38>)
|
||
8007d5a: 461c mov r4, r3
|
||
8007d5c: e7f3 b.n 8007d46 <__assert_func+0x12>
|
||
8007d5e: bf00 nop
|
||
8007d60: 2000000c .word 0x2000000c
|
||
8007d64: 08009685 .word 0x08009685
|
||
8007d68: 08009692 .word 0x08009692
|
||
8007d6c: 080096c0 .word 0x080096c0
|
||
|
||
08007d70 <fiprintf>:
|
||
8007d70: b40e push {r1, r2, r3}
|
||
8007d72: b503 push {r0, r1, lr}
|
||
8007d74: 4601 mov r1, r0
|
||
8007d76: ab03 add r3, sp, #12
|
||
8007d78: 4805 ldr r0, [pc, #20] ; (8007d90 <fiprintf+0x20>)
|
||
8007d7a: f853 2b04 ldr.w r2, [r3], #4
|
||
8007d7e: 6800 ldr r0, [r0, #0]
|
||
8007d80: 9301 str r3, [sp, #4]
|
||
8007d82: f000 f883 bl 8007e8c <_vfiprintf_r>
|
||
8007d86: b002 add sp, #8
|
||
8007d88: f85d eb04 ldr.w lr, [sp], #4
|
||
8007d8c: b003 add sp, #12
|
||
8007d8e: 4770 bx lr
|
||
8007d90: 2000000c .word 0x2000000c
|
||
|
||
08007d94 <__retarget_lock_init_recursive>:
|
||
8007d94: 4770 bx lr
|
||
|
||
08007d96 <__retarget_lock_acquire_recursive>:
|
||
8007d96: 4770 bx lr
|
||
|
||
08007d98 <__retarget_lock_release_recursive>:
|
||
8007d98: 4770 bx lr
|
||
|
||
08007d9a <__ascii_mbtowc>:
|
||
8007d9a: b082 sub sp, #8
|
||
8007d9c: b901 cbnz r1, 8007da0 <__ascii_mbtowc+0x6>
|
||
8007d9e: a901 add r1, sp, #4
|
||
8007da0: b142 cbz r2, 8007db4 <__ascii_mbtowc+0x1a>
|
||
8007da2: b14b cbz r3, 8007db8 <__ascii_mbtowc+0x1e>
|
||
8007da4: 7813 ldrb r3, [r2, #0]
|
||
8007da6: 600b str r3, [r1, #0]
|
||
8007da8: 7812 ldrb r2, [r2, #0]
|
||
8007daa: 1e10 subs r0, r2, #0
|
||
8007dac: bf18 it ne
|
||
8007dae: 2001 movne r0, #1
|
||
8007db0: b002 add sp, #8
|
||
8007db2: 4770 bx lr
|
||
8007db4: 4610 mov r0, r2
|
||
8007db6: e7fb b.n 8007db0 <__ascii_mbtowc+0x16>
|
||
8007db8: f06f 0001 mvn.w r0, #1
|
||
8007dbc: e7f8 b.n 8007db0 <__ascii_mbtowc+0x16>
|
||
|
||
08007dbe <memmove>:
|
||
8007dbe: 4288 cmp r0, r1
|
||
8007dc0: b510 push {r4, lr}
|
||
8007dc2: eb01 0402 add.w r4, r1, r2
|
||
8007dc6: d902 bls.n 8007dce <memmove+0x10>
|
||
8007dc8: 4284 cmp r4, r0
|
||
8007dca: 4623 mov r3, r4
|
||
8007dcc: d807 bhi.n 8007dde <memmove+0x20>
|
||
8007dce: 1e43 subs r3, r0, #1
|
||
8007dd0: 42a1 cmp r1, r4
|
||
8007dd2: d008 beq.n 8007de6 <memmove+0x28>
|
||
8007dd4: f811 2b01 ldrb.w r2, [r1], #1
|
||
8007dd8: f803 2f01 strb.w r2, [r3, #1]!
|
||
8007ddc: e7f8 b.n 8007dd0 <memmove+0x12>
|
||
8007dde: 4601 mov r1, r0
|
||
8007de0: 4402 add r2, r0
|
||
8007de2: 428a cmp r2, r1
|
||
8007de4: d100 bne.n 8007de8 <memmove+0x2a>
|
||
8007de6: bd10 pop {r4, pc}
|
||
8007de8: f813 4d01 ldrb.w r4, [r3, #-1]!
|
||
8007dec: f802 4d01 strb.w r4, [r2, #-1]!
|
||
8007df0: e7f7 b.n 8007de2 <memmove+0x24>
|
||
|
||
08007df2 <_realloc_r>:
|
||
8007df2: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8007df4: 4607 mov r7, r0
|
||
8007df6: 4614 mov r4, r2
|
||
8007df8: 460e mov r6, r1
|
||
8007dfa: b921 cbnz r1, 8007e06 <_realloc_r+0x14>
|
||
8007dfc: 4611 mov r1, r2
|
||
8007dfe: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr}
|
||
8007e02: f7fd bf19 b.w 8005c38 <_malloc_r>
|
||
8007e06: b922 cbnz r2, 8007e12 <_realloc_r+0x20>
|
||
8007e08: f7fd feca bl 8005ba0 <_free_r>
|
||
8007e0c: 4625 mov r5, r4
|
||
8007e0e: 4628 mov r0, r5
|
||
8007e10: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
8007e12: f000 fc5d bl 80086d0 <_malloc_usable_size_r>
|
||
8007e16: 42a0 cmp r0, r4
|
||
8007e18: d20f bcs.n 8007e3a <_realloc_r+0x48>
|
||
8007e1a: 4621 mov r1, r4
|
||
8007e1c: 4638 mov r0, r7
|
||
8007e1e: f7fd ff0b bl 8005c38 <_malloc_r>
|
||
8007e22: 4605 mov r5, r0
|
||
8007e24: 2800 cmp r0, #0
|
||
8007e26: d0f2 beq.n 8007e0e <_realloc_r+0x1c>
|
||
8007e28: 4631 mov r1, r6
|
||
8007e2a: 4622 mov r2, r4
|
||
8007e2c: f7ff fa7c bl 8007328 <memcpy>
|
||
8007e30: 4631 mov r1, r6
|
||
8007e32: 4638 mov r0, r7
|
||
8007e34: f7fd feb4 bl 8005ba0 <_free_r>
|
||
8007e38: e7e9 b.n 8007e0e <_realloc_r+0x1c>
|
||
8007e3a: 4635 mov r5, r6
|
||
8007e3c: e7e7 b.n 8007e0e <_realloc_r+0x1c>
|
||
|
||
08007e3e <__sfputc_r>:
|
||
8007e3e: 6893 ldr r3, [r2, #8]
|
||
8007e40: b410 push {r4}
|
||
8007e42: 3b01 subs r3, #1
|
||
8007e44: 2b00 cmp r3, #0
|
||
8007e46: 6093 str r3, [r2, #8]
|
||
8007e48: da07 bge.n 8007e5a <__sfputc_r+0x1c>
|
||
8007e4a: 6994 ldr r4, [r2, #24]
|
||
8007e4c: 42a3 cmp r3, r4
|
||
8007e4e: db01 blt.n 8007e54 <__sfputc_r+0x16>
|
||
8007e50: 290a cmp r1, #10
|
||
8007e52: d102 bne.n 8007e5a <__sfputc_r+0x1c>
|
||
8007e54: bc10 pop {r4}
|
||
8007e56: f000 b949 b.w 80080ec <__swbuf_r>
|
||
8007e5a: 6813 ldr r3, [r2, #0]
|
||
8007e5c: 1c58 adds r0, r3, #1
|
||
8007e5e: 6010 str r0, [r2, #0]
|
||
8007e60: 7019 strb r1, [r3, #0]
|
||
8007e62: 4608 mov r0, r1
|
||
8007e64: bc10 pop {r4}
|
||
8007e66: 4770 bx lr
|
||
|
||
08007e68 <__sfputs_r>:
|
||
8007e68: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
8007e6a: 4606 mov r6, r0
|
||
8007e6c: 460f mov r7, r1
|
||
8007e6e: 4614 mov r4, r2
|
||
8007e70: 18d5 adds r5, r2, r3
|
||
8007e72: 42ac cmp r4, r5
|
||
8007e74: d101 bne.n 8007e7a <__sfputs_r+0x12>
|
||
8007e76: 2000 movs r0, #0
|
||
8007e78: e007 b.n 8007e8a <__sfputs_r+0x22>
|
||
8007e7a: 463a mov r2, r7
|
||
8007e7c: 4630 mov r0, r6
|
||
8007e7e: f814 1b01 ldrb.w r1, [r4], #1
|
||
8007e82: f7ff ffdc bl 8007e3e <__sfputc_r>
|
||
8007e86: 1c43 adds r3, r0, #1
|
||
8007e88: d1f3 bne.n 8007e72 <__sfputs_r+0xa>
|
||
8007e8a: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
|
||
08007e8c <_vfiprintf_r>:
|
||
8007e8c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
||
8007e90: 460d mov r5, r1
|
||
8007e92: 4614 mov r4, r2
|
||
8007e94: 4698 mov r8, r3
|
||
8007e96: 4606 mov r6, r0
|
||
8007e98: b09d sub sp, #116 ; 0x74
|
||
8007e9a: b118 cbz r0, 8007ea4 <_vfiprintf_r+0x18>
|
||
8007e9c: 6983 ldr r3, [r0, #24]
|
||
8007e9e: b90b cbnz r3, 8007ea4 <_vfiprintf_r+0x18>
|
||
8007ea0: f000 fb14 bl 80084cc <__sinit>
|
||
8007ea4: 4b89 ldr r3, [pc, #548] ; (80080cc <_vfiprintf_r+0x240>)
|
||
8007ea6: 429d cmp r5, r3
|
||
8007ea8: d11b bne.n 8007ee2 <_vfiprintf_r+0x56>
|
||
8007eaa: 6875 ldr r5, [r6, #4]
|
||
8007eac: 6e6b ldr r3, [r5, #100] ; 0x64
|
||
8007eae: 07d9 lsls r1, r3, #31
|
||
8007eb0: d405 bmi.n 8007ebe <_vfiprintf_r+0x32>
|
||
8007eb2: 89ab ldrh r3, [r5, #12]
|
||
8007eb4: 059a lsls r2, r3, #22
|
||
8007eb6: d402 bmi.n 8007ebe <_vfiprintf_r+0x32>
|
||
8007eb8: 6da8 ldr r0, [r5, #88] ; 0x58
|
||
8007eba: f7ff ff6c bl 8007d96 <__retarget_lock_acquire_recursive>
|
||
8007ebe: 89ab ldrh r3, [r5, #12]
|
||
8007ec0: 071b lsls r3, r3, #28
|
||
8007ec2: d501 bpl.n 8007ec8 <_vfiprintf_r+0x3c>
|
||
8007ec4: 692b ldr r3, [r5, #16]
|
||
8007ec6: b9eb cbnz r3, 8007f04 <_vfiprintf_r+0x78>
|
||
8007ec8: 4629 mov r1, r5
|
||
8007eca: 4630 mov r0, r6
|
||
8007ecc: f000 f96e bl 80081ac <__swsetup_r>
|
||
8007ed0: b1c0 cbz r0, 8007f04 <_vfiprintf_r+0x78>
|
||
8007ed2: 6e6b ldr r3, [r5, #100] ; 0x64
|
||
8007ed4: 07dc lsls r4, r3, #31
|
||
8007ed6: d50e bpl.n 8007ef6 <_vfiprintf_r+0x6a>
|
||
8007ed8: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
8007edc: b01d add sp, #116 ; 0x74
|
||
8007ede: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
||
8007ee2: 4b7b ldr r3, [pc, #492] ; (80080d0 <_vfiprintf_r+0x244>)
|
||
8007ee4: 429d cmp r5, r3
|
||
8007ee6: d101 bne.n 8007eec <_vfiprintf_r+0x60>
|
||
8007ee8: 68b5 ldr r5, [r6, #8]
|
||
8007eea: e7df b.n 8007eac <_vfiprintf_r+0x20>
|
||
8007eec: 4b79 ldr r3, [pc, #484] ; (80080d4 <_vfiprintf_r+0x248>)
|
||
8007eee: 429d cmp r5, r3
|
||
8007ef0: bf08 it eq
|
||
8007ef2: 68f5 ldreq r5, [r6, #12]
|
||
8007ef4: e7da b.n 8007eac <_vfiprintf_r+0x20>
|
||
8007ef6: 89ab ldrh r3, [r5, #12]
|
||
8007ef8: 0598 lsls r0, r3, #22
|
||
8007efa: d4ed bmi.n 8007ed8 <_vfiprintf_r+0x4c>
|
||
8007efc: 6da8 ldr r0, [r5, #88] ; 0x58
|
||
8007efe: f7ff ff4b bl 8007d98 <__retarget_lock_release_recursive>
|
||
8007f02: e7e9 b.n 8007ed8 <_vfiprintf_r+0x4c>
|
||
8007f04: 2300 movs r3, #0
|
||
8007f06: 9309 str r3, [sp, #36] ; 0x24
|
||
8007f08: 2320 movs r3, #32
|
||
8007f0a: f88d 3029 strb.w r3, [sp, #41] ; 0x29
|
||
8007f0e: 2330 movs r3, #48 ; 0x30
|
||
8007f10: f04f 0901 mov.w r9, #1
|
||
8007f14: f8cd 800c str.w r8, [sp, #12]
|
||
8007f18: f8df 81bc ldr.w r8, [pc, #444] ; 80080d8 <_vfiprintf_r+0x24c>
|
||
8007f1c: f88d 302a strb.w r3, [sp, #42] ; 0x2a
|
||
8007f20: 4623 mov r3, r4
|
||
8007f22: 469a mov sl, r3
|
||
8007f24: f813 2b01 ldrb.w r2, [r3], #1
|
||
8007f28: b10a cbz r2, 8007f2e <_vfiprintf_r+0xa2>
|
||
8007f2a: 2a25 cmp r2, #37 ; 0x25
|
||
8007f2c: d1f9 bne.n 8007f22 <_vfiprintf_r+0x96>
|
||
8007f2e: ebba 0b04 subs.w fp, sl, r4
|
||
8007f32: d00b beq.n 8007f4c <_vfiprintf_r+0xc0>
|
||
8007f34: 465b mov r3, fp
|
||
8007f36: 4622 mov r2, r4
|
||
8007f38: 4629 mov r1, r5
|
||
8007f3a: 4630 mov r0, r6
|
||
8007f3c: f7ff ff94 bl 8007e68 <__sfputs_r>
|
||
8007f40: 3001 adds r0, #1
|
||
8007f42: f000 80aa beq.w 800809a <_vfiprintf_r+0x20e>
|
||
8007f46: 9a09 ldr r2, [sp, #36] ; 0x24
|
||
8007f48: 445a add r2, fp
|
||
8007f4a: 9209 str r2, [sp, #36] ; 0x24
|
||
8007f4c: f89a 3000 ldrb.w r3, [sl]
|
||
8007f50: 2b00 cmp r3, #0
|
||
8007f52: f000 80a2 beq.w 800809a <_vfiprintf_r+0x20e>
|
||
8007f56: 2300 movs r3, #0
|
||
8007f58: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
|
||
8007f5c: e9cd 2305 strd r2, r3, [sp, #20]
|
||
8007f60: f10a 0a01 add.w sl, sl, #1
|
||
8007f64: 9304 str r3, [sp, #16]
|
||
8007f66: 9307 str r3, [sp, #28]
|
||
8007f68: f88d 3053 strb.w r3, [sp, #83] ; 0x53
|
||
8007f6c: 931a str r3, [sp, #104] ; 0x68
|
||
8007f6e: 4654 mov r4, sl
|
||
8007f70: 2205 movs r2, #5
|
||
8007f72: f814 1b01 ldrb.w r1, [r4], #1
|
||
8007f76: 4858 ldr r0, [pc, #352] ; (80080d8 <_vfiprintf_r+0x24c>)
|
||
8007f78: f7ff f9c8 bl 800730c <memchr>
|
||
8007f7c: 9a04 ldr r2, [sp, #16]
|
||
8007f7e: b9d8 cbnz r0, 8007fb8 <_vfiprintf_r+0x12c>
|
||
8007f80: 06d1 lsls r1, r2, #27
|
||
8007f82: bf44 itt mi
|
||
8007f84: 2320 movmi r3, #32
|
||
8007f86: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
8007f8a: 0713 lsls r3, r2, #28
|
||
8007f8c: bf44 itt mi
|
||
8007f8e: 232b movmi r3, #43 ; 0x2b
|
||
8007f90: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53
|
||
8007f94: f89a 3000 ldrb.w r3, [sl]
|
||
8007f98: 2b2a cmp r3, #42 ; 0x2a
|
||
8007f9a: d015 beq.n 8007fc8 <_vfiprintf_r+0x13c>
|
||
8007f9c: 4654 mov r4, sl
|
||
8007f9e: 2000 movs r0, #0
|
||
8007fa0: f04f 0c0a mov.w ip, #10
|
||
8007fa4: 9a07 ldr r2, [sp, #28]
|
||
8007fa6: 4621 mov r1, r4
|
||
8007fa8: f811 3b01 ldrb.w r3, [r1], #1
|
||
8007fac: 3b30 subs r3, #48 ; 0x30
|
||
8007fae: 2b09 cmp r3, #9
|
||
8007fb0: d94e bls.n 8008050 <_vfiprintf_r+0x1c4>
|
||
8007fb2: b1b0 cbz r0, 8007fe2 <_vfiprintf_r+0x156>
|
||
8007fb4: 9207 str r2, [sp, #28]
|
||
8007fb6: e014 b.n 8007fe2 <_vfiprintf_r+0x156>
|
||
8007fb8: eba0 0308 sub.w r3, r0, r8
|
||
8007fbc: fa09 f303 lsl.w r3, r9, r3
|
||
8007fc0: 4313 orrs r3, r2
|
||
8007fc2: 46a2 mov sl, r4
|
||
8007fc4: 9304 str r3, [sp, #16]
|
||
8007fc6: e7d2 b.n 8007f6e <_vfiprintf_r+0xe2>
|
||
8007fc8: 9b03 ldr r3, [sp, #12]
|
||
8007fca: 1d19 adds r1, r3, #4
|
||
8007fcc: 681b ldr r3, [r3, #0]
|
||
8007fce: 9103 str r1, [sp, #12]
|
||
8007fd0: 2b00 cmp r3, #0
|
||
8007fd2: bfbb ittet lt
|
||
8007fd4: 425b neglt r3, r3
|
||
8007fd6: f042 0202 orrlt.w r2, r2, #2
|
||
8007fda: 9307 strge r3, [sp, #28]
|
||
8007fdc: 9307 strlt r3, [sp, #28]
|
||
8007fde: bfb8 it lt
|
||
8007fe0: 9204 strlt r2, [sp, #16]
|
||
8007fe2: 7823 ldrb r3, [r4, #0]
|
||
8007fe4: 2b2e cmp r3, #46 ; 0x2e
|
||
8007fe6: d10c bne.n 8008002 <_vfiprintf_r+0x176>
|
||
8007fe8: 7863 ldrb r3, [r4, #1]
|
||
8007fea: 2b2a cmp r3, #42 ; 0x2a
|
||
8007fec: d135 bne.n 800805a <_vfiprintf_r+0x1ce>
|
||
8007fee: 9b03 ldr r3, [sp, #12]
|
||
8007ff0: 3402 adds r4, #2
|
||
8007ff2: 1d1a adds r2, r3, #4
|
||
8007ff4: 681b ldr r3, [r3, #0]
|
||
8007ff6: 9203 str r2, [sp, #12]
|
||
8007ff8: 2b00 cmp r3, #0
|
||
8007ffa: bfb8 it lt
|
||
8007ffc: f04f 33ff movlt.w r3, #4294967295 ; 0xffffffff
|
||
8008000: 9305 str r3, [sp, #20]
|
||
8008002: f8df a0e4 ldr.w sl, [pc, #228] ; 80080e8 <_vfiprintf_r+0x25c>
|
||
8008006: 2203 movs r2, #3
|
||
8008008: 4650 mov r0, sl
|
||
800800a: 7821 ldrb r1, [r4, #0]
|
||
800800c: f7ff f97e bl 800730c <memchr>
|
||
8008010: b140 cbz r0, 8008024 <_vfiprintf_r+0x198>
|
||
8008012: 2340 movs r3, #64 ; 0x40
|
||
8008014: eba0 000a sub.w r0, r0, sl
|
||
8008018: fa03 f000 lsl.w r0, r3, r0
|
||
800801c: 9b04 ldr r3, [sp, #16]
|
||
800801e: 3401 adds r4, #1
|
||
8008020: 4303 orrs r3, r0
|
||
8008022: 9304 str r3, [sp, #16]
|
||
8008024: f814 1b01 ldrb.w r1, [r4], #1
|
||
8008028: 2206 movs r2, #6
|
||
800802a: 482c ldr r0, [pc, #176] ; (80080dc <_vfiprintf_r+0x250>)
|
||
800802c: f88d 1028 strb.w r1, [sp, #40] ; 0x28
|
||
8008030: f7ff f96c bl 800730c <memchr>
|
||
8008034: 2800 cmp r0, #0
|
||
8008036: d03f beq.n 80080b8 <_vfiprintf_r+0x22c>
|
||
8008038: 4b29 ldr r3, [pc, #164] ; (80080e0 <_vfiprintf_r+0x254>)
|
||
800803a: bb1b cbnz r3, 8008084 <_vfiprintf_r+0x1f8>
|
||
800803c: 9b03 ldr r3, [sp, #12]
|
||
800803e: 3307 adds r3, #7
|
||
8008040: f023 0307 bic.w r3, r3, #7
|
||
8008044: 3308 adds r3, #8
|
||
8008046: 9303 str r3, [sp, #12]
|
||
8008048: 9b09 ldr r3, [sp, #36] ; 0x24
|
||
800804a: 443b add r3, r7
|
||
800804c: 9309 str r3, [sp, #36] ; 0x24
|
||
800804e: e767 b.n 8007f20 <_vfiprintf_r+0x94>
|
||
8008050: 460c mov r4, r1
|
||
8008052: 2001 movs r0, #1
|
||
8008054: fb0c 3202 mla r2, ip, r2, r3
|
||
8008058: e7a5 b.n 8007fa6 <_vfiprintf_r+0x11a>
|
||
800805a: 2300 movs r3, #0
|
||
800805c: f04f 0c0a mov.w ip, #10
|
||
8008060: 4619 mov r1, r3
|
||
8008062: 3401 adds r4, #1
|
||
8008064: 9305 str r3, [sp, #20]
|
||
8008066: 4620 mov r0, r4
|
||
8008068: f810 2b01 ldrb.w r2, [r0], #1
|
||
800806c: 3a30 subs r2, #48 ; 0x30
|
||
800806e: 2a09 cmp r2, #9
|
||
8008070: d903 bls.n 800807a <_vfiprintf_r+0x1ee>
|
||
8008072: 2b00 cmp r3, #0
|
||
8008074: d0c5 beq.n 8008002 <_vfiprintf_r+0x176>
|
||
8008076: 9105 str r1, [sp, #20]
|
||
8008078: e7c3 b.n 8008002 <_vfiprintf_r+0x176>
|
||
800807a: 4604 mov r4, r0
|
||
800807c: 2301 movs r3, #1
|
||
800807e: fb0c 2101 mla r1, ip, r1, r2
|
||
8008082: e7f0 b.n 8008066 <_vfiprintf_r+0x1da>
|
||
8008084: ab03 add r3, sp, #12
|
||
8008086: 9300 str r3, [sp, #0]
|
||
8008088: 462a mov r2, r5
|
||
800808a: 4630 mov r0, r6
|
||
800808c: 4b15 ldr r3, [pc, #84] ; (80080e4 <_vfiprintf_r+0x258>)
|
||
800808e: a904 add r1, sp, #16
|
||
8008090: f7fd feca bl 8005e28 <_printf_float>
|
||
8008094: 4607 mov r7, r0
|
||
8008096: 1c78 adds r0, r7, #1
|
||
8008098: d1d6 bne.n 8008048 <_vfiprintf_r+0x1bc>
|
||
800809a: 6e6b ldr r3, [r5, #100] ; 0x64
|
||
800809c: 07d9 lsls r1, r3, #31
|
||
800809e: d405 bmi.n 80080ac <_vfiprintf_r+0x220>
|
||
80080a0: 89ab ldrh r3, [r5, #12]
|
||
80080a2: 059a lsls r2, r3, #22
|
||
80080a4: d402 bmi.n 80080ac <_vfiprintf_r+0x220>
|
||
80080a6: 6da8 ldr r0, [r5, #88] ; 0x58
|
||
80080a8: f7ff fe76 bl 8007d98 <__retarget_lock_release_recursive>
|
||
80080ac: 89ab ldrh r3, [r5, #12]
|
||
80080ae: 065b lsls r3, r3, #25
|
||
80080b0: f53f af12 bmi.w 8007ed8 <_vfiprintf_r+0x4c>
|
||
80080b4: 9809 ldr r0, [sp, #36] ; 0x24
|
||
80080b6: e711 b.n 8007edc <_vfiprintf_r+0x50>
|
||
80080b8: ab03 add r3, sp, #12
|
||
80080ba: 9300 str r3, [sp, #0]
|
||
80080bc: 462a mov r2, r5
|
||
80080be: 4630 mov r0, r6
|
||
80080c0: 4b08 ldr r3, [pc, #32] ; (80080e4 <_vfiprintf_r+0x258>)
|
||
80080c2: a904 add r1, sp, #16
|
||
80080c4: f7fe f94c bl 8006360 <_printf_i>
|
||
80080c8: e7e4 b.n 8008094 <_vfiprintf_r+0x208>
|
||
80080ca: bf00 nop
|
||
80080cc: 080097ec .word 0x080097ec
|
||
80080d0: 0800980c .word 0x0800980c
|
||
80080d4: 080097cc .word 0x080097cc
|
||
80080d8: 08009674 .word 0x08009674
|
||
80080dc: 0800967e .word 0x0800967e
|
||
80080e0: 08005e29 .word 0x08005e29
|
||
80080e4: 08007e69 .word 0x08007e69
|
||
80080e8: 0800967a .word 0x0800967a
|
||
|
||
080080ec <__swbuf_r>:
|
||
80080ec: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
80080ee: 460e mov r6, r1
|
||
80080f0: 4614 mov r4, r2
|
||
80080f2: 4605 mov r5, r0
|
||
80080f4: b118 cbz r0, 80080fe <__swbuf_r+0x12>
|
||
80080f6: 6983 ldr r3, [r0, #24]
|
||
80080f8: b90b cbnz r3, 80080fe <__swbuf_r+0x12>
|
||
80080fa: f000 f9e7 bl 80084cc <__sinit>
|
||
80080fe: 4b21 ldr r3, [pc, #132] ; (8008184 <__swbuf_r+0x98>)
|
||
8008100: 429c cmp r4, r3
|
||
8008102: d12b bne.n 800815c <__swbuf_r+0x70>
|
||
8008104: 686c ldr r4, [r5, #4]
|
||
8008106: 69a3 ldr r3, [r4, #24]
|
||
8008108: 60a3 str r3, [r4, #8]
|
||
800810a: 89a3 ldrh r3, [r4, #12]
|
||
800810c: 071a lsls r2, r3, #28
|
||
800810e: d52f bpl.n 8008170 <__swbuf_r+0x84>
|
||
8008110: 6923 ldr r3, [r4, #16]
|
||
8008112: b36b cbz r3, 8008170 <__swbuf_r+0x84>
|
||
8008114: 6923 ldr r3, [r4, #16]
|
||
8008116: 6820 ldr r0, [r4, #0]
|
||
8008118: b2f6 uxtb r6, r6
|
||
800811a: 1ac0 subs r0, r0, r3
|
||
800811c: 6963 ldr r3, [r4, #20]
|
||
800811e: 4637 mov r7, r6
|
||
8008120: 4283 cmp r3, r0
|
||
8008122: dc04 bgt.n 800812e <__swbuf_r+0x42>
|
||
8008124: 4621 mov r1, r4
|
||
8008126: 4628 mov r0, r5
|
||
8008128: f000 f93c bl 80083a4 <_fflush_r>
|
||
800812c: bb30 cbnz r0, 800817c <__swbuf_r+0x90>
|
||
800812e: 68a3 ldr r3, [r4, #8]
|
||
8008130: 3001 adds r0, #1
|
||
8008132: 3b01 subs r3, #1
|
||
8008134: 60a3 str r3, [r4, #8]
|
||
8008136: 6823 ldr r3, [r4, #0]
|
||
8008138: 1c5a adds r2, r3, #1
|
||
800813a: 6022 str r2, [r4, #0]
|
||
800813c: 701e strb r6, [r3, #0]
|
||
800813e: 6963 ldr r3, [r4, #20]
|
||
8008140: 4283 cmp r3, r0
|
||
8008142: d004 beq.n 800814e <__swbuf_r+0x62>
|
||
8008144: 89a3 ldrh r3, [r4, #12]
|
||
8008146: 07db lsls r3, r3, #31
|
||
8008148: d506 bpl.n 8008158 <__swbuf_r+0x6c>
|
||
800814a: 2e0a cmp r6, #10
|
||
800814c: d104 bne.n 8008158 <__swbuf_r+0x6c>
|
||
800814e: 4621 mov r1, r4
|
||
8008150: 4628 mov r0, r5
|
||
8008152: f000 f927 bl 80083a4 <_fflush_r>
|
||
8008156: b988 cbnz r0, 800817c <__swbuf_r+0x90>
|
||
8008158: 4638 mov r0, r7
|
||
800815a: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
800815c: 4b0a ldr r3, [pc, #40] ; (8008188 <__swbuf_r+0x9c>)
|
||
800815e: 429c cmp r4, r3
|
||
8008160: d101 bne.n 8008166 <__swbuf_r+0x7a>
|
||
8008162: 68ac ldr r4, [r5, #8]
|
||
8008164: e7cf b.n 8008106 <__swbuf_r+0x1a>
|
||
8008166: 4b09 ldr r3, [pc, #36] ; (800818c <__swbuf_r+0xa0>)
|
||
8008168: 429c cmp r4, r3
|
||
800816a: bf08 it eq
|
||
800816c: 68ec ldreq r4, [r5, #12]
|
||
800816e: e7ca b.n 8008106 <__swbuf_r+0x1a>
|
||
8008170: 4621 mov r1, r4
|
||
8008172: 4628 mov r0, r5
|
||
8008174: f000 f81a bl 80081ac <__swsetup_r>
|
||
8008178: 2800 cmp r0, #0
|
||
800817a: d0cb beq.n 8008114 <__swbuf_r+0x28>
|
||
800817c: f04f 37ff mov.w r7, #4294967295 ; 0xffffffff
|
||
8008180: e7ea b.n 8008158 <__swbuf_r+0x6c>
|
||
8008182: bf00 nop
|
||
8008184: 080097ec .word 0x080097ec
|
||
8008188: 0800980c .word 0x0800980c
|
||
800818c: 080097cc .word 0x080097cc
|
||
|
||
08008190 <__ascii_wctomb>:
|
||
8008190: 4603 mov r3, r0
|
||
8008192: 4608 mov r0, r1
|
||
8008194: b141 cbz r1, 80081a8 <__ascii_wctomb+0x18>
|
||
8008196: 2aff cmp r2, #255 ; 0xff
|
||
8008198: d904 bls.n 80081a4 <__ascii_wctomb+0x14>
|
||
800819a: 228a movs r2, #138 ; 0x8a
|
||
800819c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
80081a0: 601a str r2, [r3, #0]
|
||
80081a2: 4770 bx lr
|
||
80081a4: 2001 movs r0, #1
|
||
80081a6: 700a strb r2, [r1, #0]
|
||
80081a8: 4770 bx lr
|
||
...
|
||
|
||
080081ac <__swsetup_r>:
|
||
80081ac: 4b32 ldr r3, [pc, #200] ; (8008278 <__swsetup_r+0xcc>)
|
||
80081ae: b570 push {r4, r5, r6, lr}
|
||
80081b0: 681d ldr r5, [r3, #0]
|
||
80081b2: 4606 mov r6, r0
|
||
80081b4: 460c mov r4, r1
|
||
80081b6: b125 cbz r5, 80081c2 <__swsetup_r+0x16>
|
||
80081b8: 69ab ldr r3, [r5, #24]
|
||
80081ba: b913 cbnz r3, 80081c2 <__swsetup_r+0x16>
|
||
80081bc: 4628 mov r0, r5
|
||
80081be: f000 f985 bl 80084cc <__sinit>
|
||
80081c2: 4b2e ldr r3, [pc, #184] ; (800827c <__swsetup_r+0xd0>)
|
||
80081c4: 429c cmp r4, r3
|
||
80081c6: d10f bne.n 80081e8 <__swsetup_r+0x3c>
|
||
80081c8: 686c ldr r4, [r5, #4]
|
||
80081ca: 89a3 ldrh r3, [r4, #12]
|
||
80081cc: f9b4 200c ldrsh.w r2, [r4, #12]
|
||
80081d0: 0719 lsls r1, r3, #28
|
||
80081d2: d42c bmi.n 800822e <__swsetup_r+0x82>
|
||
80081d4: 06dd lsls r5, r3, #27
|
||
80081d6: d411 bmi.n 80081fc <__swsetup_r+0x50>
|
||
80081d8: 2309 movs r3, #9
|
||
80081da: 6033 str r3, [r6, #0]
|
||
80081dc: f042 0340 orr.w r3, r2, #64 ; 0x40
|
||
80081e0: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
80081e4: 81a3 strh r3, [r4, #12]
|
||
80081e6: e03e b.n 8008266 <__swsetup_r+0xba>
|
||
80081e8: 4b25 ldr r3, [pc, #148] ; (8008280 <__swsetup_r+0xd4>)
|
||
80081ea: 429c cmp r4, r3
|
||
80081ec: d101 bne.n 80081f2 <__swsetup_r+0x46>
|
||
80081ee: 68ac ldr r4, [r5, #8]
|
||
80081f0: e7eb b.n 80081ca <__swsetup_r+0x1e>
|
||
80081f2: 4b24 ldr r3, [pc, #144] ; (8008284 <__swsetup_r+0xd8>)
|
||
80081f4: 429c cmp r4, r3
|
||
80081f6: bf08 it eq
|
||
80081f8: 68ec ldreq r4, [r5, #12]
|
||
80081fa: e7e6 b.n 80081ca <__swsetup_r+0x1e>
|
||
80081fc: 0758 lsls r0, r3, #29
|
||
80081fe: d512 bpl.n 8008226 <__swsetup_r+0x7a>
|
||
8008200: 6b61 ldr r1, [r4, #52] ; 0x34
|
||
8008202: b141 cbz r1, 8008216 <__swsetup_r+0x6a>
|
||
8008204: f104 0344 add.w r3, r4, #68 ; 0x44
|
||
8008208: 4299 cmp r1, r3
|
||
800820a: d002 beq.n 8008212 <__swsetup_r+0x66>
|
||
800820c: 4630 mov r0, r6
|
||
800820e: f7fd fcc7 bl 8005ba0 <_free_r>
|
||
8008212: 2300 movs r3, #0
|
||
8008214: 6363 str r3, [r4, #52] ; 0x34
|
||
8008216: 89a3 ldrh r3, [r4, #12]
|
||
8008218: f023 0324 bic.w r3, r3, #36 ; 0x24
|
||
800821c: 81a3 strh r3, [r4, #12]
|
||
800821e: 2300 movs r3, #0
|
||
8008220: 6063 str r3, [r4, #4]
|
||
8008222: 6923 ldr r3, [r4, #16]
|
||
8008224: 6023 str r3, [r4, #0]
|
||
8008226: 89a3 ldrh r3, [r4, #12]
|
||
8008228: f043 0308 orr.w r3, r3, #8
|
||
800822c: 81a3 strh r3, [r4, #12]
|
||
800822e: 6923 ldr r3, [r4, #16]
|
||
8008230: b94b cbnz r3, 8008246 <__swsetup_r+0x9a>
|
||
8008232: 89a3 ldrh r3, [r4, #12]
|
||
8008234: f403 7320 and.w r3, r3, #640 ; 0x280
|
||
8008238: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
||
800823c: d003 beq.n 8008246 <__swsetup_r+0x9a>
|
||
800823e: 4621 mov r1, r4
|
||
8008240: 4630 mov r0, r6
|
||
8008242: f000 fa05 bl 8008650 <__smakebuf_r>
|
||
8008246: 89a0 ldrh r0, [r4, #12]
|
||
8008248: f9b4 200c ldrsh.w r2, [r4, #12]
|
||
800824c: f010 0301 ands.w r3, r0, #1
|
||
8008250: d00a beq.n 8008268 <__swsetup_r+0xbc>
|
||
8008252: 2300 movs r3, #0
|
||
8008254: 60a3 str r3, [r4, #8]
|
||
8008256: 6963 ldr r3, [r4, #20]
|
||
8008258: 425b negs r3, r3
|
||
800825a: 61a3 str r3, [r4, #24]
|
||
800825c: 6923 ldr r3, [r4, #16]
|
||
800825e: b943 cbnz r3, 8008272 <__swsetup_r+0xc6>
|
||
8008260: f010 0080 ands.w r0, r0, #128 ; 0x80
|
||
8008264: d1ba bne.n 80081dc <__swsetup_r+0x30>
|
||
8008266: bd70 pop {r4, r5, r6, pc}
|
||
8008268: 0781 lsls r1, r0, #30
|
||
800826a: bf58 it pl
|
||
800826c: 6963 ldrpl r3, [r4, #20]
|
||
800826e: 60a3 str r3, [r4, #8]
|
||
8008270: e7f4 b.n 800825c <__swsetup_r+0xb0>
|
||
8008272: 2000 movs r0, #0
|
||
8008274: e7f7 b.n 8008266 <__swsetup_r+0xba>
|
||
8008276: bf00 nop
|
||
8008278: 2000000c .word 0x2000000c
|
||
800827c: 080097ec .word 0x080097ec
|
||
8008280: 0800980c .word 0x0800980c
|
||
8008284: 080097cc .word 0x080097cc
|
||
|
||
08008288 <abort>:
|
||
8008288: 2006 movs r0, #6
|
||
800828a: b508 push {r3, lr}
|
||
800828c: f000 fa50 bl 8008730 <raise>
|
||
8008290: 2001 movs r0, #1
|
||
8008292: f7f9 f9f5 bl 8001680 <_exit>
|
||
...
|
||
|
||
08008298 <__sflush_r>:
|
||
8008298: 898a ldrh r2, [r1, #12]
|
||
800829a: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||
800829e: 4605 mov r5, r0
|
||
80082a0: 0710 lsls r0, r2, #28
|
||
80082a2: 460c mov r4, r1
|
||
80082a4: d458 bmi.n 8008358 <__sflush_r+0xc0>
|
||
80082a6: 684b ldr r3, [r1, #4]
|
||
80082a8: 2b00 cmp r3, #0
|
||
80082aa: dc05 bgt.n 80082b8 <__sflush_r+0x20>
|
||
80082ac: 6c0b ldr r3, [r1, #64] ; 0x40
|
||
80082ae: 2b00 cmp r3, #0
|
||
80082b0: dc02 bgt.n 80082b8 <__sflush_r+0x20>
|
||
80082b2: 2000 movs r0, #0
|
||
80082b4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
||
80082b8: 6ae6 ldr r6, [r4, #44] ; 0x2c
|
||
80082ba: 2e00 cmp r6, #0
|
||
80082bc: d0f9 beq.n 80082b2 <__sflush_r+0x1a>
|
||
80082be: 2300 movs r3, #0
|
||
80082c0: f412 5280 ands.w r2, r2, #4096 ; 0x1000
|
||
80082c4: 682f ldr r7, [r5, #0]
|
||
80082c6: 602b str r3, [r5, #0]
|
||
80082c8: d032 beq.n 8008330 <__sflush_r+0x98>
|
||
80082ca: 6d60 ldr r0, [r4, #84] ; 0x54
|
||
80082cc: 89a3 ldrh r3, [r4, #12]
|
||
80082ce: 075a lsls r2, r3, #29
|
||
80082d0: d505 bpl.n 80082de <__sflush_r+0x46>
|
||
80082d2: 6863 ldr r3, [r4, #4]
|
||
80082d4: 1ac0 subs r0, r0, r3
|
||
80082d6: 6b63 ldr r3, [r4, #52] ; 0x34
|
||
80082d8: b10b cbz r3, 80082de <__sflush_r+0x46>
|
||
80082da: 6c23 ldr r3, [r4, #64] ; 0x40
|
||
80082dc: 1ac0 subs r0, r0, r3
|
||
80082de: 2300 movs r3, #0
|
||
80082e0: 4602 mov r2, r0
|
||
80082e2: 6ae6 ldr r6, [r4, #44] ; 0x2c
|
||
80082e4: 4628 mov r0, r5
|
||
80082e6: 6a21 ldr r1, [r4, #32]
|
||
80082e8: 47b0 blx r6
|
||
80082ea: 1c43 adds r3, r0, #1
|
||
80082ec: 89a3 ldrh r3, [r4, #12]
|
||
80082ee: d106 bne.n 80082fe <__sflush_r+0x66>
|
||
80082f0: 6829 ldr r1, [r5, #0]
|
||
80082f2: 291d cmp r1, #29
|
||
80082f4: d82c bhi.n 8008350 <__sflush_r+0xb8>
|
||
80082f6: 4a2a ldr r2, [pc, #168] ; (80083a0 <__sflush_r+0x108>)
|
||
80082f8: 40ca lsrs r2, r1
|
||
80082fa: 07d6 lsls r6, r2, #31
|
||
80082fc: d528 bpl.n 8008350 <__sflush_r+0xb8>
|
||
80082fe: 2200 movs r2, #0
|
||
8008300: 6062 str r2, [r4, #4]
|
||
8008302: 6922 ldr r2, [r4, #16]
|
||
8008304: 04d9 lsls r1, r3, #19
|
||
8008306: 6022 str r2, [r4, #0]
|
||
8008308: d504 bpl.n 8008314 <__sflush_r+0x7c>
|
||
800830a: 1c42 adds r2, r0, #1
|
||
800830c: d101 bne.n 8008312 <__sflush_r+0x7a>
|
||
800830e: 682b ldr r3, [r5, #0]
|
||
8008310: b903 cbnz r3, 8008314 <__sflush_r+0x7c>
|
||
8008312: 6560 str r0, [r4, #84] ; 0x54
|
||
8008314: 6b61 ldr r1, [r4, #52] ; 0x34
|
||
8008316: 602f str r7, [r5, #0]
|
||
8008318: 2900 cmp r1, #0
|
||
800831a: d0ca beq.n 80082b2 <__sflush_r+0x1a>
|
||
800831c: f104 0344 add.w r3, r4, #68 ; 0x44
|
||
8008320: 4299 cmp r1, r3
|
||
8008322: d002 beq.n 800832a <__sflush_r+0x92>
|
||
8008324: 4628 mov r0, r5
|
||
8008326: f7fd fc3b bl 8005ba0 <_free_r>
|
||
800832a: 2000 movs r0, #0
|
||
800832c: 6360 str r0, [r4, #52] ; 0x34
|
||
800832e: e7c1 b.n 80082b4 <__sflush_r+0x1c>
|
||
8008330: 6a21 ldr r1, [r4, #32]
|
||
8008332: 2301 movs r3, #1
|
||
8008334: 4628 mov r0, r5
|
||
8008336: 47b0 blx r6
|
||
8008338: 1c41 adds r1, r0, #1
|
||
800833a: d1c7 bne.n 80082cc <__sflush_r+0x34>
|
||
800833c: 682b ldr r3, [r5, #0]
|
||
800833e: 2b00 cmp r3, #0
|
||
8008340: d0c4 beq.n 80082cc <__sflush_r+0x34>
|
||
8008342: 2b1d cmp r3, #29
|
||
8008344: d001 beq.n 800834a <__sflush_r+0xb2>
|
||
8008346: 2b16 cmp r3, #22
|
||
8008348: d101 bne.n 800834e <__sflush_r+0xb6>
|
||
800834a: 602f str r7, [r5, #0]
|
||
800834c: e7b1 b.n 80082b2 <__sflush_r+0x1a>
|
||
800834e: 89a3 ldrh r3, [r4, #12]
|
||
8008350: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8008354: 81a3 strh r3, [r4, #12]
|
||
8008356: e7ad b.n 80082b4 <__sflush_r+0x1c>
|
||
8008358: 690f ldr r7, [r1, #16]
|
||
800835a: 2f00 cmp r7, #0
|
||
800835c: d0a9 beq.n 80082b2 <__sflush_r+0x1a>
|
||
800835e: 0793 lsls r3, r2, #30
|
||
8008360: bf18 it ne
|
||
8008362: 2300 movne r3, #0
|
||
8008364: 680e ldr r6, [r1, #0]
|
||
8008366: bf08 it eq
|
||
8008368: 694b ldreq r3, [r1, #20]
|
||
800836a: eba6 0807 sub.w r8, r6, r7
|
||
800836e: 600f str r7, [r1, #0]
|
||
8008370: 608b str r3, [r1, #8]
|
||
8008372: f1b8 0f00 cmp.w r8, #0
|
||
8008376: dd9c ble.n 80082b2 <__sflush_r+0x1a>
|
||
8008378: 4643 mov r3, r8
|
||
800837a: 463a mov r2, r7
|
||
800837c: 4628 mov r0, r5
|
||
800837e: 6a21 ldr r1, [r4, #32]
|
||
8008380: 6aa6 ldr r6, [r4, #40] ; 0x28
|
||
8008382: 47b0 blx r6
|
||
8008384: 2800 cmp r0, #0
|
||
8008386: dc06 bgt.n 8008396 <__sflush_r+0xfe>
|
||
8008388: 89a3 ldrh r3, [r4, #12]
|
||
800838a: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
800838e: f043 0340 orr.w r3, r3, #64 ; 0x40
|
||
8008392: 81a3 strh r3, [r4, #12]
|
||
8008394: e78e b.n 80082b4 <__sflush_r+0x1c>
|
||
8008396: 4407 add r7, r0
|
||
8008398: eba8 0800 sub.w r8, r8, r0
|
||
800839c: e7e9 b.n 8008372 <__sflush_r+0xda>
|
||
800839e: bf00 nop
|
||
80083a0: 20400001 .word 0x20400001
|
||
|
||
080083a4 <_fflush_r>:
|
||
80083a4: b538 push {r3, r4, r5, lr}
|
||
80083a6: 690b ldr r3, [r1, #16]
|
||
80083a8: 4605 mov r5, r0
|
||
80083aa: 460c mov r4, r1
|
||
80083ac: b913 cbnz r3, 80083b4 <_fflush_r+0x10>
|
||
80083ae: 2500 movs r5, #0
|
||
80083b0: 4628 mov r0, r5
|
||
80083b2: bd38 pop {r3, r4, r5, pc}
|
||
80083b4: b118 cbz r0, 80083be <_fflush_r+0x1a>
|
||
80083b6: 6983 ldr r3, [r0, #24]
|
||
80083b8: b90b cbnz r3, 80083be <_fflush_r+0x1a>
|
||
80083ba: f000 f887 bl 80084cc <__sinit>
|
||
80083be: 4b14 ldr r3, [pc, #80] ; (8008410 <_fflush_r+0x6c>)
|
||
80083c0: 429c cmp r4, r3
|
||
80083c2: d11b bne.n 80083fc <_fflush_r+0x58>
|
||
80083c4: 686c ldr r4, [r5, #4]
|
||
80083c6: f9b4 300c ldrsh.w r3, [r4, #12]
|
||
80083ca: 2b00 cmp r3, #0
|
||
80083cc: d0ef beq.n 80083ae <_fflush_r+0xa>
|
||
80083ce: 6e62 ldr r2, [r4, #100] ; 0x64
|
||
80083d0: 07d0 lsls r0, r2, #31
|
||
80083d2: d404 bmi.n 80083de <_fflush_r+0x3a>
|
||
80083d4: 0599 lsls r1, r3, #22
|
||
80083d6: d402 bmi.n 80083de <_fflush_r+0x3a>
|
||
80083d8: 6da0 ldr r0, [r4, #88] ; 0x58
|
||
80083da: f7ff fcdc bl 8007d96 <__retarget_lock_acquire_recursive>
|
||
80083de: 4628 mov r0, r5
|
||
80083e0: 4621 mov r1, r4
|
||
80083e2: f7ff ff59 bl 8008298 <__sflush_r>
|
||
80083e6: 6e63 ldr r3, [r4, #100] ; 0x64
|
||
80083e8: 4605 mov r5, r0
|
||
80083ea: 07da lsls r2, r3, #31
|
||
80083ec: d4e0 bmi.n 80083b0 <_fflush_r+0xc>
|
||
80083ee: 89a3 ldrh r3, [r4, #12]
|
||
80083f0: 059b lsls r3, r3, #22
|
||
80083f2: d4dd bmi.n 80083b0 <_fflush_r+0xc>
|
||
80083f4: 6da0 ldr r0, [r4, #88] ; 0x58
|
||
80083f6: f7ff fccf bl 8007d98 <__retarget_lock_release_recursive>
|
||
80083fa: e7d9 b.n 80083b0 <_fflush_r+0xc>
|
||
80083fc: 4b05 ldr r3, [pc, #20] ; (8008414 <_fflush_r+0x70>)
|
||
80083fe: 429c cmp r4, r3
|
||
8008400: d101 bne.n 8008406 <_fflush_r+0x62>
|
||
8008402: 68ac ldr r4, [r5, #8]
|
||
8008404: e7df b.n 80083c6 <_fflush_r+0x22>
|
||
8008406: 4b04 ldr r3, [pc, #16] ; (8008418 <_fflush_r+0x74>)
|
||
8008408: 429c cmp r4, r3
|
||
800840a: bf08 it eq
|
||
800840c: 68ec ldreq r4, [r5, #12]
|
||
800840e: e7da b.n 80083c6 <_fflush_r+0x22>
|
||
8008410: 080097ec .word 0x080097ec
|
||
8008414: 0800980c .word 0x0800980c
|
||
8008418: 080097cc .word 0x080097cc
|
||
|
||
0800841c <std>:
|
||
800841c: 2300 movs r3, #0
|
||
800841e: b510 push {r4, lr}
|
||
8008420: 4604 mov r4, r0
|
||
8008422: e9c0 3300 strd r3, r3, [r0]
|
||
8008426: e9c0 3304 strd r3, r3, [r0, #16]
|
||
800842a: 6083 str r3, [r0, #8]
|
||
800842c: 8181 strh r1, [r0, #12]
|
||
800842e: 6643 str r3, [r0, #100] ; 0x64
|
||
8008430: 81c2 strh r2, [r0, #14]
|
||
8008432: 6183 str r3, [r0, #24]
|
||
8008434: 4619 mov r1, r3
|
||
8008436: 2208 movs r2, #8
|
||
8008438: 305c adds r0, #92 ; 0x5c
|
||
800843a: f7fd fba9 bl 8005b90 <memset>
|
||
800843e: 4b05 ldr r3, [pc, #20] ; (8008454 <std+0x38>)
|
||
8008440: 6224 str r4, [r4, #32]
|
||
8008442: 6263 str r3, [r4, #36] ; 0x24
|
||
8008444: 4b04 ldr r3, [pc, #16] ; (8008458 <std+0x3c>)
|
||
8008446: 62a3 str r3, [r4, #40] ; 0x28
|
||
8008448: 4b04 ldr r3, [pc, #16] ; (800845c <std+0x40>)
|
||
800844a: 62e3 str r3, [r4, #44] ; 0x2c
|
||
800844c: 4b04 ldr r3, [pc, #16] ; (8008460 <std+0x44>)
|
||
800844e: 6323 str r3, [r4, #48] ; 0x30
|
||
8008450: bd10 pop {r4, pc}
|
||
8008452: bf00 nop
|
||
8008454: 08008769 .word 0x08008769
|
||
8008458: 0800878b .word 0x0800878b
|
||
800845c: 080087c3 .word 0x080087c3
|
||
8008460: 080087e7 .word 0x080087e7
|
||
|
||
08008464 <_cleanup_r>:
|
||
8008464: 4901 ldr r1, [pc, #4] ; (800846c <_cleanup_r+0x8>)
|
||
8008466: f000 b8af b.w 80085c8 <_fwalk_reent>
|
||
800846a: bf00 nop
|
||
800846c: 080083a5 .word 0x080083a5
|
||
|
||
08008470 <__sfmoreglue>:
|
||
8008470: b570 push {r4, r5, r6, lr}
|
||
8008472: 2568 movs r5, #104 ; 0x68
|
||
8008474: 1e4a subs r2, r1, #1
|
||
8008476: 4355 muls r5, r2
|
||
8008478: 460e mov r6, r1
|
||
800847a: f105 0174 add.w r1, r5, #116 ; 0x74
|
||
800847e: f7fd fbdb bl 8005c38 <_malloc_r>
|
||
8008482: 4604 mov r4, r0
|
||
8008484: b140 cbz r0, 8008498 <__sfmoreglue+0x28>
|
||
8008486: 2100 movs r1, #0
|
||
8008488: e9c0 1600 strd r1, r6, [r0]
|
||
800848c: 300c adds r0, #12
|
||
800848e: 60a0 str r0, [r4, #8]
|
||
8008490: f105 0268 add.w r2, r5, #104 ; 0x68
|
||
8008494: f7fd fb7c bl 8005b90 <memset>
|
||
8008498: 4620 mov r0, r4
|
||
800849a: bd70 pop {r4, r5, r6, pc}
|
||
|
||
0800849c <__sfp_lock_acquire>:
|
||
800849c: 4801 ldr r0, [pc, #4] ; (80084a4 <__sfp_lock_acquire+0x8>)
|
||
800849e: f7ff bc7a b.w 8007d96 <__retarget_lock_acquire_recursive>
|
||
80084a2: bf00 nop
|
||
80084a4: 20000348 .word 0x20000348
|
||
|
||
080084a8 <__sfp_lock_release>:
|
||
80084a8: 4801 ldr r0, [pc, #4] ; (80084b0 <__sfp_lock_release+0x8>)
|
||
80084aa: f7ff bc75 b.w 8007d98 <__retarget_lock_release_recursive>
|
||
80084ae: bf00 nop
|
||
80084b0: 20000348 .word 0x20000348
|
||
|
||
080084b4 <__sinit_lock_acquire>:
|
||
80084b4: 4801 ldr r0, [pc, #4] ; (80084bc <__sinit_lock_acquire+0x8>)
|
||
80084b6: f7ff bc6e b.w 8007d96 <__retarget_lock_acquire_recursive>
|
||
80084ba: bf00 nop
|
||
80084bc: 20000343 .word 0x20000343
|
||
|
||
080084c0 <__sinit_lock_release>:
|
||
80084c0: 4801 ldr r0, [pc, #4] ; (80084c8 <__sinit_lock_release+0x8>)
|
||
80084c2: f7ff bc69 b.w 8007d98 <__retarget_lock_release_recursive>
|
||
80084c6: bf00 nop
|
||
80084c8: 20000343 .word 0x20000343
|
||
|
||
080084cc <__sinit>:
|
||
80084cc: b510 push {r4, lr}
|
||
80084ce: 4604 mov r4, r0
|
||
80084d0: f7ff fff0 bl 80084b4 <__sinit_lock_acquire>
|
||
80084d4: 69a3 ldr r3, [r4, #24]
|
||
80084d6: b11b cbz r3, 80084e0 <__sinit+0x14>
|
||
80084d8: e8bd 4010 ldmia.w sp!, {r4, lr}
|
||
80084dc: f7ff bff0 b.w 80084c0 <__sinit_lock_release>
|
||
80084e0: e9c4 3312 strd r3, r3, [r4, #72] ; 0x48
|
||
80084e4: 6523 str r3, [r4, #80] ; 0x50
|
||
80084e6: 4b13 ldr r3, [pc, #76] ; (8008534 <__sinit+0x68>)
|
||
80084e8: 4a13 ldr r2, [pc, #76] ; (8008538 <__sinit+0x6c>)
|
||
80084ea: 681b ldr r3, [r3, #0]
|
||
80084ec: 62a2 str r2, [r4, #40] ; 0x28
|
||
80084ee: 42a3 cmp r3, r4
|
||
80084f0: bf08 it eq
|
||
80084f2: 2301 moveq r3, #1
|
||
80084f4: 4620 mov r0, r4
|
||
80084f6: bf08 it eq
|
||
80084f8: 61a3 streq r3, [r4, #24]
|
||
80084fa: f000 f81f bl 800853c <__sfp>
|
||
80084fe: 6060 str r0, [r4, #4]
|
||
8008500: 4620 mov r0, r4
|
||
8008502: f000 f81b bl 800853c <__sfp>
|
||
8008506: 60a0 str r0, [r4, #8]
|
||
8008508: 4620 mov r0, r4
|
||
800850a: f000 f817 bl 800853c <__sfp>
|
||
800850e: 2200 movs r2, #0
|
||
8008510: 2104 movs r1, #4
|
||
8008512: 60e0 str r0, [r4, #12]
|
||
8008514: 6860 ldr r0, [r4, #4]
|
||
8008516: f7ff ff81 bl 800841c <std>
|
||
800851a: 2201 movs r2, #1
|
||
800851c: 2109 movs r1, #9
|
||
800851e: 68a0 ldr r0, [r4, #8]
|
||
8008520: f7ff ff7c bl 800841c <std>
|
||
8008524: 2202 movs r2, #2
|
||
8008526: 2112 movs r1, #18
|
||
8008528: 68e0 ldr r0, [r4, #12]
|
||
800852a: f7ff ff77 bl 800841c <std>
|
||
800852e: 2301 movs r3, #1
|
||
8008530: 61a3 str r3, [r4, #24]
|
||
8008532: e7d1 b.n 80084d8 <__sinit+0xc>
|
||
8008534: 08009448 .word 0x08009448
|
||
8008538: 08008465 .word 0x08008465
|
||
|
||
0800853c <__sfp>:
|
||
800853c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
800853e: 4607 mov r7, r0
|
||
8008540: f7ff ffac bl 800849c <__sfp_lock_acquire>
|
||
8008544: 4b1e ldr r3, [pc, #120] ; (80085c0 <__sfp+0x84>)
|
||
8008546: 681e ldr r6, [r3, #0]
|
||
8008548: 69b3 ldr r3, [r6, #24]
|
||
800854a: b913 cbnz r3, 8008552 <__sfp+0x16>
|
||
800854c: 4630 mov r0, r6
|
||
800854e: f7ff ffbd bl 80084cc <__sinit>
|
||
8008552: 3648 adds r6, #72 ; 0x48
|
||
8008554: e9d6 3401 ldrd r3, r4, [r6, #4]
|
||
8008558: 3b01 subs r3, #1
|
||
800855a: d503 bpl.n 8008564 <__sfp+0x28>
|
||
800855c: 6833 ldr r3, [r6, #0]
|
||
800855e: b30b cbz r3, 80085a4 <__sfp+0x68>
|
||
8008560: 6836 ldr r6, [r6, #0]
|
||
8008562: e7f7 b.n 8008554 <__sfp+0x18>
|
||
8008564: f9b4 500c ldrsh.w r5, [r4, #12]
|
||
8008568: b9d5 cbnz r5, 80085a0 <__sfp+0x64>
|
||
800856a: 4b16 ldr r3, [pc, #88] ; (80085c4 <__sfp+0x88>)
|
||
800856c: f104 0058 add.w r0, r4, #88 ; 0x58
|
||
8008570: 60e3 str r3, [r4, #12]
|
||
8008572: 6665 str r5, [r4, #100] ; 0x64
|
||
8008574: f7ff fc0e bl 8007d94 <__retarget_lock_init_recursive>
|
||
8008578: f7ff ff96 bl 80084a8 <__sfp_lock_release>
|
||
800857c: 2208 movs r2, #8
|
||
800857e: 4629 mov r1, r5
|
||
8008580: e9c4 5501 strd r5, r5, [r4, #4]
|
||
8008584: e9c4 5504 strd r5, r5, [r4, #16]
|
||
8008588: 6025 str r5, [r4, #0]
|
||
800858a: 61a5 str r5, [r4, #24]
|
||
800858c: f104 005c add.w r0, r4, #92 ; 0x5c
|
||
8008590: f7fd fafe bl 8005b90 <memset>
|
||
8008594: e9c4 550d strd r5, r5, [r4, #52] ; 0x34
|
||
8008598: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48
|
||
800859c: 4620 mov r0, r4
|
||
800859e: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
||
80085a0: 3468 adds r4, #104 ; 0x68
|
||
80085a2: e7d9 b.n 8008558 <__sfp+0x1c>
|
||
80085a4: 2104 movs r1, #4
|
||
80085a6: 4638 mov r0, r7
|
||
80085a8: f7ff ff62 bl 8008470 <__sfmoreglue>
|
||
80085ac: 4604 mov r4, r0
|
||
80085ae: 6030 str r0, [r6, #0]
|
||
80085b0: 2800 cmp r0, #0
|
||
80085b2: d1d5 bne.n 8008560 <__sfp+0x24>
|
||
80085b4: f7ff ff78 bl 80084a8 <__sfp_lock_release>
|
||
80085b8: 230c movs r3, #12
|
||
80085ba: 603b str r3, [r7, #0]
|
||
80085bc: e7ee b.n 800859c <__sfp+0x60>
|
||
80085be: bf00 nop
|
||
80085c0: 08009448 .word 0x08009448
|
||
80085c4: ffff0001 .word 0xffff0001
|
||
|
||
080085c8 <_fwalk_reent>:
|
||
80085c8: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
||
80085cc: 4606 mov r6, r0
|
||
80085ce: 4688 mov r8, r1
|
||
80085d0: 2700 movs r7, #0
|
||
80085d2: f100 0448 add.w r4, r0, #72 ; 0x48
|
||
80085d6: e9d4 9501 ldrd r9, r5, [r4, #4]
|
||
80085da: f1b9 0901 subs.w r9, r9, #1
|
||
80085de: d505 bpl.n 80085ec <_fwalk_reent+0x24>
|
||
80085e0: 6824 ldr r4, [r4, #0]
|
||
80085e2: 2c00 cmp r4, #0
|
||
80085e4: d1f7 bne.n 80085d6 <_fwalk_reent+0xe>
|
||
80085e6: 4638 mov r0, r7
|
||
80085e8: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
||
80085ec: 89ab ldrh r3, [r5, #12]
|
||
80085ee: 2b01 cmp r3, #1
|
||
80085f0: d907 bls.n 8008602 <_fwalk_reent+0x3a>
|
||
80085f2: f9b5 300e ldrsh.w r3, [r5, #14]
|
||
80085f6: 3301 adds r3, #1
|
||
80085f8: d003 beq.n 8008602 <_fwalk_reent+0x3a>
|
||
80085fa: 4629 mov r1, r5
|
||
80085fc: 4630 mov r0, r6
|
||
80085fe: 47c0 blx r8
|
||
8008600: 4307 orrs r7, r0
|
||
8008602: 3568 adds r5, #104 ; 0x68
|
||
8008604: e7e9 b.n 80085da <_fwalk_reent+0x12>
|
||
|
||
08008606 <__swhatbuf_r>:
|
||
8008606: b570 push {r4, r5, r6, lr}
|
||
8008608: 460e mov r6, r1
|
||
800860a: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
800860e: 4614 mov r4, r2
|
||
8008610: 2900 cmp r1, #0
|
||
8008612: 461d mov r5, r3
|
||
8008614: b096 sub sp, #88 ; 0x58
|
||
8008616: da07 bge.n 8008628 <__swhatbuf_r+0x22>
|
||
8008618: 2300 movs r3, #0
|
||
800861a: 602b str r3, [r5, #0]
|
||
800861c: 89b3 ldrh r3, [r6, #12]
|
||
800861e: 061a lsls r2, r3, #24
|
||
8008620: d410 bmi.n 8008644 <__swhatbuf_r+0x3e>
|
||
8008622: f44f 6380 mov.w r3, #1024 ; 0x400
|
||
8008626: e00e b.n 8008646 <__swhatbuf_r+0x40>
|
||
8008628: 466a mov r2, sp
|
||
800862a: f000 f903 bl 8008834 <_fstat_r>
|
||
800862e: 2800 cmp r0, #0
|
||
8008630: dbf2 blt.n 8008618 <__swhatbuf_r+0x12>
|
||
8008632: 9a01 ldr r2, [sp, #4]
|
||
8008634: f402 4270 and.w r2, r2, #61440 ; 0xf000
|
||
8008638: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000
|
||
800863c: 425a negs r2, r3
|
||
800863e: 415a adcs r2, r3
|
||
8008640: 602a str r2, [r5, #0]
|
||
8008642: e7ee b.n 8008622 <__swhatbuf_r+0x1c>
|
||
8008644: 2340 movs r3, #64 ; 0x40
|
||
8008646: 2000 movs r0, #0
|
||
8008648: 6023 str r3, [r4, #0]
|
||
800864a: b016 add sp, #88 ; 0x58
|
||
800864c: bd70 pop {r4, r5, r6, pc}
|
||
...
|
||
|
||
08008650 <__smakebuf_r>:
|
||
8008650: 898b ldrh r3, [r1, #12]
|
||
8008652: b573 push {r0, r1, r4, r5, r6, lr}
|
||
8008654: 079d lsls r5, r3, #30
|
||
8008656: 4606 mov r6, r0
|
||
8008658: 460c mov r4, r1
|
||
800865a: d507 bpl.n 800866c <__smakebuf_r+0x1c>
|
||
800865c: f104 0347 add.w r3, r4, #71 ; 0x47
|
||
8008660: 6023 str r3, [r4, #0]
|
||
8008662: 6123 str r3, [r4, #16]
|
||
8008664: 2301 movs r3, #1
|
||
8008666: 6163 str r3, [r4, #20]
|
||
8008668: b002 add sp, #8
|
||
800866a: bd70 pop {r4, r5, r6, pc}
|
||
800866c: 466a mov r2, sp
|
||
800866e: ab01 add r3, sp, #4
|
||
8008670: f7ff ffc9 bl 8008606 <__swhatbuf_r>
|
||
8008674: 9900 ldr r1, [sp, #0]
|
||
8008676: 4605 mov r5, r0
|
||
8008678: 4630 mov r0, r6
|
||
800867a: f7fd fadd bl 8005c38 <_malloc_r>
|
||
800867e: b948 cbnz r0, 8008694 <__smakebuf_r+0x44>
|
||
8008680: f9b4 300c ldrsh.w r3, [r4, #12]
|
||
8008684: 059a lsls r2, r3, #22
|
||
8008686: d4ef bmi.n 8008668 <__smakebuf_r+0x18>
|
||
8008688: f023 0303 bic.w r3, r3, #3
|
||
800868c: f043 0302 orr.w r3, r3, #2
|
||
8008690: 81a3 strh r3, [r4, #12]
|
||
8008692: e7e3 b.n 800865c <__smakebuf_r+0xc>
|
||
8008694: 4b0d ldr r3, [pc, #52] ; (80086cc <__smakebuf_r+0x7c>)
|
||
8008696: 62b3 str r3, [r6, #40] ; 0x28
|
||
8008698: 89a3 ldrh r3, [r4, #12]
|
||
800869a: 6020 str r0, [r4, #0]
|
||
800869c: f043 0380 orr.w r3, r3, #128 ; 0x80
|
||
80086a0: 81a3 strh r3, [r4, #12]
|
||
80086a2: 9b00 ldr r3, [sp, #0]
|
||
80086a4: 6120 str r0, [r4, #16]
|
||
80086a6: 6163 str r3, [r4, #20]
|
||
80086a8: 9b01 ldr r3, [sp, #4]
|
||
80086aa: b15b cbz r3, 80086c4 <__smakebuf_r+0x74>
|
||
80086ac: 4630 mov r0, r6
|
||
80086ae: f9b4 100e ldrsh.w r1, [r4, #14]
|
||
80086b2: f000 f8d1 bl 8008858 <_isatty_r>
|
||
80086b6: b128 cbz r0, 80086c4 <__smakebuf_r+0x74>
|
||
80086b8: 89a3 ldrh r3, [r4, #12]
|
||
80086ba: f023 0303 bic.w r3, r3, #3
|
||
80086be: f043 0301 orr.w r3, r3, #1
|
||
80086c2: 81a3 strh r3, [r4, #12]
|
||
80086c4: 89a0 ldrh r0, [r4, #12]
|
||
80086c6: 4305 orrs r5, r0
|
||
80086c8: 81a5 strh r5, [r4, #12]
|
||
80086ca: e7cd b.n 8008668 <__smakebuf_r+0x18>
|
||
80086cc: 08008465 .word 0x08008465
|
||
|
||
080086d0 <_malloc_usable_size_r>:
|
||
80086d0: f851 3c04 ldr.w r3, [r1, #-4]
|
||
80086d4: 1f18 subs r0, r3, #4
|
||
80086d6: 2b00 cmp r3, #0
|
||
80086d8: bfbc itt lt
|
||
80086da: 580b ldrlt r3, [r1, r0]
|
||
80086dc: 18c0 addlt r0, r0, r3
|
||
80086de: 4770 bx lr
|
||
|
||
080086e0 <_raise_r>:
|
||
80086e0: 291f cmp r1, #31
|
||
80086e2: b538 push {r3, r4, r5, lr}
|
||
80086e4: 4604 mov r4, r0
|
||
80086e6: 460d mov r5, r1
|
||
80086e8: d904 bls.n 80086f4 <_raise_r+0x14>
|
||
80086ea: 2316 movs r3, #22
|
||
80086ec: 6003 str r3, [r0, #0]
|
||
80086ee: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
|
||
80086f2: bd38 pop {r3, r4, r5, pc}
|
||
80086f4: 6c42 ldr r2, [r0, #68] ; 0x44
|
||
80086f6: b112 cbz r2, 80086fe <_raise_r+0x1e>
|
||
80086f8: f852 3021 ldr.w r3, [r2, r1, lsl #2]
|
||
80086fc: b94b cbnz r3, 8008712 <_raise_r+0x32>
|
||
80086fe: 4620 mov r0, r4
|
||
8008700: f000 f830 bl 8008764 <_getpid_r>
|
||
8008704: 462a mov r2, r5
|
||
8008706: 4601 mov r1, r0
|
||
8008708: 4620 mov r0, r4
|
||
800870a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
||
800870e: f000 b817 b.w 8008740 <_kill_r>
|
||
8008712: 2b01 cmp r3, #1
|
||
8008714: d00a beq.n 800872c <_raise_r+0x4c>
|
||
8008716: 1c59 adds r1, r3, #1
|
||
8008718: d103 bne.n 8008722 <_raise_r+0x42>
|
||
800871a: 2316 movs r3, #22
|
||
800871c: 6003 str r3, [r0, #0]
|
||
800871e: 2001 movs r0, #1
|
||
8008720: e7e7 b.n 80086f2 <_raise_r+0x12>
|
||
8008722: 2400 movs r4, #0
|
||
8008724: 4628 mov r0, r5
|
||
8008726: f842 4025 str.w r4, [r2, r5, lsl #2]
|
||
800872a: 4798 blx r3
|
||
800872c: 2000 movs r0, #0
|
||
800872e: e7e0 b.n 80086f2 <_raise_r+0x12>
|
||
|
||
08008730 <raise>:
|
||
8008730: 4b02 ldr r3, [pc, #8] ; (800873c <raise+0xc>)
|
||
8008732: 4601 mov r1, r0
|
||
8008734: 6818 ldr r0, [r3, #0]
|
||
8008736: f7ff bfd3 b.w 80086e0 <_raise_r>
|
||
800873a: bf00 nop
|
||
800873c: 2000000c .word 0x2000000c
|
||
|
||
08008740 <_kill_r>:
|
||
8008740: b538 push {r3, r4, r5, lr}
|
||
8008742: 2300 movs r3, #0
|
||
8008744: 4d06 ldr r5, [pc, #24] ; (8008760 <_kill_r+0x20>)
|
||
8008746: 4604 mov r4, r0
|
||
8008748: 4608 mov r0, r1
|
||
800874a: 4611 mov r1, r2
|
||
800874c: 602b str r3, [r5, #0]
|
||
800874e: f7f8 ff87 bl 8001660 <_kill>
|
||
8008752: 1c43 adds r3, r0, #1
|
||
8008754: d102 bne.n 800875c <_kill_r+0x1c>
|
||
8008756: 682b ldr r3, [r5, #0]
|
||
8008758: b103 cbz r3, 800875c <_kill_r+0x1c>
|
||
800875a: 6023 str r3, [r4, #0]
|
||
800875c: bd38 pop {r3, r4, r5, pc}
|
||
800875e: bf00 nop
|
||
8008760: 2000033c .word 0x2000033c
|
||
|
||
08008764 <_getpid_r>:
|
||
8008764: f7f8 bf75 b.w 8001652 <_getpid>
|
||
|
||
08008768 <__sread>:
|
||
8008768: b510 push {r4, lr}
|
||
800876a: 460c mov r4, r1
|
||
800876c: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
8008770: f000 f894 bl 800889c <_read_r>
|
||
8008774: 2800 cmp r0, #0
|
||
8008776: bfab itete ge
|
||
8008778: 6d63 ldrge r3, [r4, #84] ; 0x54
|
||
800877a: 89a3 ldrhlt r3, [r4, #12]
|
||
800877c: 181b addge r3, r3, r0
|
||
800877e: f423 5380 biclt.w r3, r3, #4096 ; 0x1000
|
||
8008782: bfac ite ge
|
||
8008784: 6563 strge r3, [r4, #84] ; 0x54
|
||
8008786: 81a3 strhlt r3, [r4, #12]
|
||
8008788: bd10 pop {r4, pc}
|
||
|
||
0800878a <__swrite>:
|
||
800878a: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||
800878e: 461f mov r7, r3
|
||
8008790: 898b ldrh r3, [r1, #12]
|
||
8008792: 4605 mov r5, r0
|
||
8008794: 05db lsls r3, r3, #23
|
||
8008796: 460c mov r4, r1
|
||
8008798: 4616 mov r6, r2
|
||
800879a: d505 bpl.n 80087a8 <__swrite+0x1e>
|
||
800879c: 2302 movs r3, #2
|
||
800879e: 2200 movs r2, #0
|
||
80087a0: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
80087a4: f000 f868 bl 8008878 <_lseek_r>
|
||
80087a8: 89a3 ldrh r3, [r4, #12]
|
||
80087aa: 4632 mov r2, r6
|
||
80087ac: f423 5380 bic.w r3, r3, #4096 ; 0x1000
|
||
80087b0: 81a3 strh r3, [r4, #12]
|
||
80087b2: 4628 mov r0, r5
|
||
80087b4: 463b mov r3, r7
|
||
80087b6: f9b4 100e ldrsh.w r1, [r4, #14]
|
||
80087ba: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
|
||
80087be: f000 b817 b.w 80087f0 <_write_r>
|
||
|
||
080087c2 <__sseek>:
|
||
80087c2: b510 push {r4, lr}
|
||
80087c4: 460c mov r4, r1
|
||
80087c6: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
80087ca: f000 f855 bl 8008878 <_lseek_r>
|
||
80087ce: 1c43 adds r3, r0, #1
|
||
80087d0: 89a3 ldrh r3, [r4, #12]
|
||
80087d2: bf15 itete ne
|
||
80087d4: 6560 strne r0, [r4, #84] ; 0x54
|
||
80087d6: f423 5380 biceq.w r3, r3, #4096 ; 0x1000
|
||
80087da: f443 5380 orrne.w r3, r3, #4096 ; 0x1000
|
||
80087de: 81a3 strheq r3, [r4, #12]
|
||
80087e0: bf18 it ne
|
||
80087e2: 81a3 strhne r3, [r4, #12]
|
||
80087e4: bd10 pop {r4, pc}
|
||
|
||
080087e6 <__sclose>:
|
||
80087e6: f9b1 100e ldrsh.w r1, [r1, #14]
|
||
80087ea: f000 b813 b.w 8008814 <_close_r>
|
||
...
|
||
|
||
080087f0 <_write_r>:
|
||
80087f0: b538 push {r3, r4, r5, lr}
|
||
80087f2: 4604 mov r4, r0
|
||
80087f4: 4608 mov r0, r1
|
||
80087f6: 4611 mov r1, r2
|
||
80087f8: 2200 movs r2, #0
|
||
80087fa: 4d05 ldr r5, [pc, #20] ; (8008810 <_write_r+0x20>)
|
||
80087fc: 602a str r2, [r5, #0]
|
||
80087fe: 461a mov r2, r3
|
||
8008800: f7f8 ff65 bl 80016ce <_write>
|
||
8008804: 1c43 adds r3, r0, #1
|
||
8008806: d102 bne.n 800880e <_write_r+0x1e>
|
||
8008808: 682b ldr r3, [r5, #0]
|
||
800880a: b103 cbz r3, 800880e <_write_r+0x1e>
|
||
800880c: 6023 str r3, [r4, #0]
|
||
800880e: bd38 pop {r3, r4, r5, pc}
|
||
8008810: 2000033c .word 0x2000033c
|
||
|
||
08008814 <_close_r>:
|
||
8008814: b538 push {r3, r4, r5, lr}
|
||
8008816: 2300 movs r3, #0
|
||
8008818: 4d05 ldr r5, [pc, #20] ; (8008830 <_close_r+0x1c>)
|
||
800881a: 4604 mov r4, r0
|
||
800881c: 4608 mov r0, r1
|
||
800881e: 602b str r3, [r5, #0]
|
||
8008820: f7f8 ff71 bl 8001706 <_close>
|
||
8008824: 1c43 adds r3, r0, #1
|
||
8008826: d102 bne.n 800882e <_close_r+0x1a>
|
||
8008828: 682b ldr r3, [r5, #0]
|
||
800882a: b103 cbz r3, 800882e <_close_r+0x1a>
|
||
800882c: 6023 str r3, [r4, #0]
|
||
800882e: bd38 pop {r3, r4, r5, pc}
|
||
8008830: 2000033c .word 0x2000033c
|
||
|
||
08008834 <_fstat_r>:
|
||
8008834: b538 push {r3, r4, r5, lr}
|
||
8008836: 2300 movs r3, #0
|
||
8008838: 4d06 ldr r5, [pc, #24] ; (8008854 <_fstat_r+0x20>)
|
||
800883a: 4604 mov r4, r0
|
||
800883c: 4608 mov r0, r1
|
||
800883e: 4611 mov r1, r2
|
||
8008840: 602b str r3, [r5, #0]
|
||
8008842: f7f8 ff6b bl 800171c <_fstat>
|
||
8008846: 1c43 adds r3, r0, #1
|
||
8008848: d102 bne.n 8008850 <_fstat_r+0x1c>
|
||
800884a: 682b ldr r3, [r5, #0]
|
||
800884c: b103 cbz r3, 8008850 <_fstat_r+0x1c>
|
||
800884e: 6023 str r3, [r4, #0]
|
||
8008850: bd38 pop {r3, r4, r5, pc}
|
||
8008852: bf00 nop
|
||
8008854: 2000033c .word 0x2000033c
|
||
|
||
08008858 <_isatty_r>:
|
||
8008858: b538 push {r3, r4, r5, lr}
|
||
800885a: 2300 movs r3, #0
|
||
800885c: 4d05 ldr r5, [pc, #20] ; (8008874 <_isatty_r+0x1c>)
|
||
800885e: 4604 mov r4, r0
|
||
8008860: 4608 mov r0, r1
|
||
8008862: 602b str r3, [r5, #0]
|
||
8008864: f7f8 ff69 bl 800173a <_isatty>
|
||
8008868: 1c43 adds r3, r0, #1
|
||
800886a: d102 bne.n 8008872 <_isatty_r+0x1a>
|
||
800886c: 682b ldr r3, [r5, #0]
|
||
800886e: b103 cbz r3, 8008872 <_isatty_r+0x1a>
|
||
8008870: 6023 str r3, [r4, #0]
|
||
8008872: bd38 pop {r3, r4, r5, pc}
|
||
8008874: 2000033c .word 0x2000033c
|
||
|
||
08008878 <_lseek_r>:
|
||
8008878: b538 push {r3, r4, r5, lr}
|
||
800887a: 4604 mov r4, r0
|
||
800887c: 4608 mov r0, r1
|
||
800887e: 4611 mov r1, r2
|
||
8008880: 2200 movs r2, #0
|
||
8008882: 4d05 ldr r5, [pc, #20] ; (8008898 <_lseek_r+0x20>)
|
||
8008884: 602a str r2, [r5, #0]
|
||
8008886: 461a mov r2, r3
|
||
8008888: f7f8 ff61 bl 800174e <_lseek>
|
||
800888c: 1c43 adds r3, r0, #1
|
||
800888e: d102 bne.n 8008896 <_lseek_r+0x1e>
|
||
8008890: 682b ldr r3, [r5, #0]
|
||
8008892: b103 cbz r3, 8008896 <_lseek_r+0x1e>
|
||
8008894: 6023 str r3, [r4, #0]
|
||
8008896: bd38 pop {r3, r4, r5, pc}
|
||
8008898: 2000033c .word 0x2000033c
|
||
|
||
0800889c <_read_r>:
|
||
800889c: b538 push {r3, r4, r5, lr}
|
||
800889e: 4604 mov r4, r0
|
||
80088a0: 4608 mov r0, r1
|
||
80088a2: 4611 mov r1, r2
|
||
80088a4: 2200 movs r2, #0
|
||
80088a6: 4d05 ldr r5, [pc, #20] ; (80088bc <_read_r+0x20>)
|
||
80088a8: 602a str r2, [r5, #0]
|
||
80088aa: 461a mov r2, r3
|
||
80088ac: f7f8 fef2 bl 8001694 <_read>
|
||
80088b0: 1c43 adds r3, r0, #1
|
||
80088b2: d102 bne.n 80088ba <_read_r+0x1e>
|
||
80088b4: 682b ldr r3, [r5, #0]
|
||
80088b6: b103 cbz r3, 80088ba <_read_r+0x1e>
|
||
80088b8: 6023 str r3, [r4, #0]
|
||
80088ba: bd38 pop {r3, r4, r5, pc}
|
||
80088bc: 2000033c .word 0x2000033c
|
||
|
||
080088c0 <_init>:
|
||
80088c0: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
80088c2: bf00 nop
|
||
80088c4: bcf8 pop {r3, r4, r5, r6, r7}
|
||
80088c6: bc08 pop {r3}
|
||
80088c8: 469e mov lr, r3
|
||
80088ca: 4770 bx lr
|
||
|
||
080088cc <_fini>:
|
||
80088cc: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||
80088ce: bf00 nop
|
||
80088d0: bcf8 pop {r3, r4, r5, r6, r7}
|
||
80088d2: bc08 pop {r3}
|
||
80088d4: 469e mov lr, r3
|
||
80088d6: 4770 bx lr
|