Narrow "PR" candidates (now only 17) (#11294)

These boards should be built when changes are made to the Meshtastic Core. Narrowed signficantly to stop wasting time.
This commit is contained in:
Austin
2026-07-30 17:20:54 -04:00
committed by GitHub
co-authored by GitHub
parent 597f6767b5
commit a0c4987c75
27 changed files with 4 additions and 26 deletions
-1
View File
@@ -10,7 +10,6 @@ custom_meshtastic_tags = RAK
extends = esp32_base
board = wiscore_rak11200
board_level = pr
board_check = true
build_flags =
${esp32_base.build_flags}
@@ -1,6 +1,7 @@
[env:thinknode_m7]
extends = esp32s3_base
board = ThinkNode-M7
board_level = pr
build_flags =
${esp32s3_base.build_flags}
@@ -127,7 +127,6 @@ custom_meshtastic_partition_scheme = 16MB
custom_meshtastic_has_mui = true
extends = crowpanel_small_esp32s3_base
board_level = pr
build_flags =
${crowpanel_small_esp32s3_base.build_flags}
-D LV_CACHE_DEF_SIZE=2097152
@@ -24,7 +24,6 @@ custom_meshtastic_partition_scheme = 16MB
custom_meshtastic_has_mui = true
extends = heltec_v4_base
board_level = pr
build_flags =
${heltec_v4_base.build_flags}
-D HELTEC_V4_OLED
@@ -10,7 +10,6 @@ custom_meshtastic_partition_scheme = 16MB
; ESP32-S3R8: 8 MB OPI PSRAM, W25Q128JVSIQ = 16 MB QIO flash (pg1)
board = esp32-s3-devkitc-1
board_level = pr
board_build.partitions = default_16MB.csv
board_upload.flash_size = 16MB
board_build.flash_mode = qio
@@ -12,7 +12,6 @@ custom_meshtastic_partition_scheme = 16MB
extends = esp32s3_base
board = esp32-s3-devkitc-1
board_level = pr
; ESP32-S3R8: 8 MB OPI PSRAM, 16 MB QIO flash
board_build.partitions = default_16MB.csv
board_upload.flash_size = 16MB
-1
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@@ -13,7 +13,6 @@ custom_meshtastic_has_mui = false
extends = esp32s3_base
board = wiscore_rak3312
board_level = pr
board_check = true
upload_protocol = esptool
@@ -74,6 +74,7 @@ custom_sdkconfig =
[env:seeed-sensecap-indicator-tft]
extends = env:seeed-sensecap-indicator
board_level = pr
board_check = true
upload_speed = 460800
@@ -12,7 +12,6 @@ custom_meshtastic_partition_scheme = 8MB
extends = esp32s3_base
board = seeed-xiao-s3
board_level = pr
board_check = true
board_build.partitions = default_8MB.csv
upload_protocol = esptool
@@ -12,7 +12,6 @@ custom_meshtastic_partition_scheme = 16MB
extends = esp32s3_base
board = station-g2
board_level = pr
board_check = true
board_build.partitions = default_16MB.csv
board_build.mcu = esp32s3
@@ -12,7 +12,6 @@ custom_meshtastic_partition_scheme = 16MB
extends = esp32s3_base
board = station-g3
board_level = pr
board_check = true
board_build.partitions = default_16MB.csv
board_build.mcu = esp32s3
@@ -1,7 +1,6 @@
[env:t-eth-elite]
extends = esp32s3_base
board = esp32s3box
board_level = pr
board_check = true
board_build.partitions = default_16MB.csv
build_flags =
@@ -11,7 +11,6 @@ custom_meshtastic_tags = Heltec
extends = nrf52840_base
board = heltec_mesh_node_t096
board_level = pr
debug_tool = jlink
build_flags = ${nrf52840_base.build_flags}
@@ -11,7 +11,6 @@ custom_meshtastic_tags = Heltec
extends = nrf52840_base
board = heltec_mesh_node_t1
board_level = pr
debug_tool = jlink
build_flags = ${nrf52840_base.build_flags}
@@ -2,7 +2,6 @@
[heltec_mesh_solar_base]
extends = nrf52840_base
board = heltec_mesh_solar
board_level = pr
debug_tool = jlink
# add -DCFG_SYSVIEW if you want to use the Segger systemview tool for OS profiling.
@@ -11,7 +11,6 @@ custom_meshtastic_tags = Heltec
extends = nrf52840_base
board = heltec_mesh_tower_v2
board_level = pr
debug_tool = jlink
# add -DCFG_SYSVIEW if you want to use the Segger systemview tool for OS profiling.
@@ -6,7 +6,6 @@ custom_meshtastic_tags = RAK
extends = nrf52840_base
board = wiscore_rak4631
board_level = pr
board_check = true
custom_meshtastic_hw_model = 105
custom_meshtastic_hw_model_slug = WISMESH_TAG
@@ -11,7 +11,6 @@ custom_meshtastic_tags = Seeed
extends = nrf52840_base
board = xiao_ble_sense
board_level = pr
build_flags = ${nrf52840_base.build_flags}
-I variants/nrf52840/seeed_xiao_nrf52840_kit
-I src/platform/nrf52/softdevice
-2
View File
@@ -12,7 +12,6 @@ custom_meshtastic_has_ink_hud = true
extends = nrf52840_base
board = t-echo
board_level = pr
board_check = true
debug_tool = jlink
@@ -39,7 +38,6 @@ lib_deps =
[env:t-echo-inkhud]
extends = nrf52840_base, inkhud
board = t-echo
board_level = pr
board_check = true
debug_tool = jlink
build_flags =
@@ -10,7 +10,6 @@ custom_meshtastic_requires_dfu = true
extends = nrf52840_base
board = t-impulse-plus
board_level = pr
build_flags = ${nrf52840_base.build_flags}
-I variants/nrf52840/t-impulse-plus
-1
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@@ -11,7 +11,6 @@ custom_meshtastic_requires_dfu = true
extends = rp2040_base
board = rakwireless_rak11300
board_level = pr
upload_protocol = picotool
# add our variants files to the include and src paths
build_flags =
-1
View File
@@ -11,7 +11,6 @@ custom_meshtastic_requires_dfu = true
extends = rp2040_base
board = rpipico
board_level = pr
upload_protocol = picotool
# add our variants files to the include and src paths
build_flags =
@@ -1,7 +1,6 @@
[env:seeed_xiao_rp2040]
extends = rp2040_base
board = seeed_xiao_rp2040
board_level = pr
upload_protocol = picotool
# add our variants files to the include and src paths
build_src_filter = ${rp2040_base.build_src_filter} +<../variants/rp2040/seeed_xiao_rp2040/>
@@ -1,7 +1,7 @@
[env:pico2_w5500_e22]
extends = rp2350_base
board = rpipico2
board_level = community
board_level = extra
upload_protocol = picotool
# Increase LittleFS from 0.5m to 0.75m so GZIP firmware (~614KB) fits for OTA staging
@@ -1,7 +1,7 @@
[env:wiznet_5500_evb_pico2_e22p]
extends = rp2350_base
board = wiznet_5500_evb_pico2
board_level = community
board_level = extra
upload_protocol = picotool
# Reuses the variant.h from variants/rp2350/diy/pico2_w5500_e22 - same LoRa
-1
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@@ -1,7 +1,6 @@
[env:pico2]
extends = rp2350_base
board = rpipico2
board_level = pr
upload_protocol = picotool
# add our variants files to the include and src paths
@@ -1,7 +1,6 @@
[env:seeed_xiao_rp2350]
extends = rp2350_base
board = seeed_xiao_rp2350
board_level = pr
upload_protocol = picotool
# add our variants files to the include and src paths