Narrow "PR" candidates (now only 17) (#11294)
These boards should be built when changes are made to the Meshtastic Core. Narrowed signficantly to stop wasting time.
This commit is contained in:
@@ -10,7 +10,6 @@ custom_meshtastic_tags = RAK
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extends = esp32_base
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board = wiscore_rak11200
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board_level = pr
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board_check = true
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build_flags =
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${esp32_base.build_flags}
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@@ -1,6 +1,7 @@
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[env:thinknode_m7]
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extends = esp32s3_base
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board = ThinkNode-M7
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board_level = pr
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build_flags =
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${esp32s3_base.build_flags}
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@@ -127,7 +127,6 @@ custom_meshtastic_partition_scheme = 16MB
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custom_meshtastic_has_mui = true
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extends = crowpanel_small_esp32s3_base
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board_level = pr
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build_flags =
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${crowpanel_small_esp32s3_base.build_flags}
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-D LV_CACHE_DEF_SIZE=2097152
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@@ -24,7 +24,6 @@ custom_meshtastic_partition_scheme = 16MB
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custom_meshtastic_has_mui = true
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extends = heltec_v4_base
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board_level = pr
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build_flags =
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${heltec_v4_base.build_flags}
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-D HELTEC_V4_OLED
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@@ -10,7 +10,6 @@ custom_meshtastic_partition_scheme = 16MB
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; ESP32-S3R8: 8 MB OPI PSRAM, W25Q128JVSIQ = 16 MB QIO flash (pg1)
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board = esp32-s3-devkitc-1
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board_level = pr
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board_build.partitions = default_16MB.csv
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board_upload.flash_size = 16MB
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board_build.flash_mode = qio
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@@ -12,7 +12,6 @@ custom_meshtastic_partition_scheme = 16MB
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extends = esp32s3_base
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board = esp32-s3-devkitc-1
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board_level = pr
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; ESP32-S3R8: 8 MB OPI PSRAM, 16 MB QIO flash
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board_build.partitions = default_16MB.csv
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board_upload.flash_size = 16MB
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@@ -13,7 +13,6 @@ custom_meshtastic_has_mui = false
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extends = esp32s3_base
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board = wiscore_rak3312
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board_level = pr
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board_check = true
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upload_protocol = esptool
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@@ -74,6 +74,7 @@ custom_sdkconfig =
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[env:seeed-sensecap-indicator-tft]
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extends = env:seeed-sensecap-indicator
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board_level = pr
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board_check = true
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upload_speed = 460800
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@@ -12,7 +12,6 @@ custom_meshtastic_partition_scheme = 8MB
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extends = esp32s3_base
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board = seeed-xiao-s3
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board_level = pr
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board_check = true
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board_build.partitions = default_8MB.csv
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upload_protocol = esptool
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@@ -12,7 +12,6 @@ custom_meshtastic_partition_scheme = 16MB
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extends = esp32s3_base
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board = station-g2
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board_level = pr
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board_check = true
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board_build.partitions = default_16MB.csv
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board_build.mcu = esp32s3
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@@ -12,7 +12,6 @@ custom_meshtastic_partition_scheme = 16MB
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extends = esp32s3_base
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board = station-g3
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board_level = pr
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board_check = true
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board_build.partitions = default_16MB.csv
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board_build.mcu = esp32s3
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@@ -1,7 +1,6 @@
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[env:t-eth-elite]
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extends = esp32s3_base
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board = esp32s3box
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board_level = pr
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board_check = true
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board_build.partitions = default_16MB.csv
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build_flags =
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@@ -11,7 +11,6 @@ custom_meshtastic_tags = Heltec
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extends = nrf52840_base
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board = heltec_mesh_node_t096
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board_level = pr
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debug_tool = jlink
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build_flags = ${nrf52840_base.build_flags}
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@@ -11,7 +11,6 @@ custom_meshtastic_tags = Heltec
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extends = nrf52840_base
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board = heltec_mesh_node_t1
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board_level = pr
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debug_tool = jlink
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build_flags = ${nrf52840_base.build_flags}
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@@ -2,7 +2,6 @@
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[heltec_mesh_solar_base]
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extends = nrf52840_base
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board = heltec_mesh_solar
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board_level = pr
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debug_tool = jlink
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# add -DCFG_SYSVIEW if you want to use the Segger systemview tool for OS profiling.
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@@ -11,7 +11,6 @@ custom_meshtastic_tags = Heltec
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extends = nrf52840_base
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board = heltec_mesh_tower_v2
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board_level = pr
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debug_tool = jlink
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# add -DCFG_SYSVIEW if you want to use the Segger systemview tool for OS profiling.
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@@ -6,7 +6,6 @@ custom_meshtastic_tags = RAK
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extends = nrf52840_base
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board = wiscore_rak4631
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board_level = pr
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board_check = true
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custom_meshtastic_hw_model = 105
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custom_meshtastic_hw_model_slug = WISMESH_TAG
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@@ -11,7 +11,6 @@ custom_meshtastic_tags = Seeed
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extends = nrf52840_base
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board = xiao_ble_sense
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board_level = pr
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build_flags = ${nrf52840_base.build_flags}
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-I variants/nrf52840/seeed_xiao_nrf52840_kit
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-I src/platform/nrf52/softdevice
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@@ -12,7 +12,6 @@ custom_meshtastic_has_ink_hud = true
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extends = nrf52840_base
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board = t-echo
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board_level = pr
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board_check = true
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debug_tool = jlink
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@@ -39,7 +38,6 @@ lib_deps =
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[env:t-echo-inkhud]
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extends = nrf52840_base, inkhud
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board = t-echo
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board_level = pr
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board_check = true
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debug_tool = jlink
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build_flags =
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@@ -10,7 +10,6 @@ custom_meshtastic_requires_dfu = true
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extends = nrf52840_base
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board = t-impulse-plus
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board_level = pr
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build_flags = ${nrf52840_base.build_flags}
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-I variants/nrf52840/t-impulse-plus
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@@ -11,7 +11,6 @@ custom_meshtastic_requires_dfu = true
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extends = rp2040_base
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board = rakwireless_rak11300
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board_level = pr
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upload_protocol = picotool
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# add our variants files to the include and src paths
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build_flags =
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@@ -11,7 +11,6 @@ custom_meshtastic_requires_dfu = true
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extends = rp2040_base
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board = rpipico
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board_level = pr
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upload_protocol = picotool
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# add our variants files to the include and src paths
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build_flags =
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@@ -1,7 +1,6 @@
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[env:seeed_xiao_rp2040]
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extends = rp2040_base
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board = seeed_xiao_rp2040
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board_level = pr
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upload_protocol = picotool
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# add our variants files to the include and src paths
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build_src_filter = ${rp2040_base.build_src_filter} +<../variants/rp2040/seeed_xiao_rp2040/>
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@@ -1,7 +1,7 @@
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[env:pico2_w5500_e22]
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extends = rp2350_base
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board = rpipico2
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board_level = community
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board_level = extra
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upload_protocol = picotool
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# Increase LittleFS from 0.5m to 0.75m so GZIP firmware (~614KB) fits for OTA staging
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@@ -1,7 +1,7 @@
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[env:wiznet_5500_evb_pico2_e22p]
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extends = rp2350_base
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board = wiznet_5500_evb_pico2
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board_level = community
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board_level = extra
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upload_protocol = picotool
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# Reuses the variant.h from variants/rp2350/diy/pico2_w5500_e22 - same LoRa
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@@ -1,7 +1,6 @@
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[env:pico2]
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extends = rp2350_base
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board = rpipico2
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board_level = pr
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upload_protocol = picotool
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# add our variants files to the include and src paths
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@@ -1,7 +1,6 @@
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[env:seeed_xiao_rp2350]
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extends = rp2350_base
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board = seeed_xiao_rp2350
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board_level = pr
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upload_protocol = picotool
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# add our variants files to the include and src paths
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