Add Meshnology W12 (WiFi LoRa 32 V5) LR2021 board support (#10910)
* Add Meshnology W12 (WiFi LoRa 32 V5) variant with LR2021 radio ESP32-S3R8 + 16 MB flash + Semtech LR2021 dual-band LoRa + SSD1315 OLED, Heltec V3-style pinout. Pin map comes from the vendor pin sheet and vendor Arduino demos, confirmed on hardware: I2C scan finds the OLED at 0x3C on SDA17/SCL18, and the LR2021 answers on NSS=8 SCK=9 MISO=11 MOSI=10 with BUSY=13/NRESET=12 verified by reset-pulse probing. The IRQ line needs LR2021_IRQ_DIO_NUM 8. RadioLib defaults irqDioNum to 5, but DIO5 is not bonded out on this board - the two IRQ lines are DIO7 -> IO7 and DIO8 -> IO14, established by driving each radio DIO as a GPIO output and watching which ESP32 pin followed. Left at the default, every interrupt is routed to a floating pin: RX/TX still appear to work because RadioLibInterface::pollMissedIrqs() falls back to polling the IRQ status register, but the blocking scanChannel() waits on the pin itself and never returns. A shadow pins_arduino.h is needed because the generic esp32s3 one defines RGB_BUILTIN, which pulls the Arduino RMT HAL into the link and fails against this build's FreeRTOS config. * Address review: add W12 variant metadata, trim comments Declares the custom_meshtastic_* metadata the build manifest expects. Without it the emitted .mt.json carried no hwModel, slug, display name or support level, so the board was invisible to the flasher - and board_level = extra kept it out of PR builds entirely, which is why it never appeared in this PR's board list. It now matches the W10 sibling at board_level = pr with support level 1. hwModel stays 255/PRIVATE_HW until a W12 enum lands in the protobufs. Also trims the header comments to the one-or-two-line limit in AGENTS.md; the vendor pin sheet and probing evidence live in the PR description.
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// Meshnology W12 - shadows the generic esp32s3 pins, minus RGB_BUILTIN/LED_BUILTIN so
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// digitalWrite() does not pull in the RMT RGB HAL, which fails to link in this build.
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#ifndef Pins_Arduino_h
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#define Pins_Arduino_h
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#include "soc/soc_caps.h"
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#include <stdint.h>
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#define USB_VID 0x303a
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#define USB_PID 0x1001
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static const uint8_t TX = 43;
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static const uint8_t RX = 44;
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static const uint8_t SDA = 17;
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static const uint8_t SCL = 18;
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// LR2021 SPI bus
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static const uint8_t SS = 8;
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static const uint8_t MOSI = 10;
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static const uint8_t MISO = 11;
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static const uint8_t SCK = 9;
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static const uint8_t A0 = 1;
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static const uint8_t A1 = 2;
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static const uint8_t A2 = 3;
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static const uint8_t A3 = 4;
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static const uint8_t A4 = 5;
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static const uint8_t A5 = 6;
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static const uint8_t A6 = 7;
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static const uint8_t A7 = 8;
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static const uint8_t A8 = 9;
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static const uint8_t A9 = 10;
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static const uint8_t A10 = 11;
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static const uint8_t A11 = 12;
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static const uint8_t A12 = 13;
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static const uint8_t A13 = 14;
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static const uint8_t A14 = 15;
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static const uint8_t A15 = 16;
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static const uint8_t A16 = 17;
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static const uint8_t A17 = 18;
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static const uint8_t A18 = 19;
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static const uint8_t A19 = 20;
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static const uint8_t T1 = 1;
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static const uint8_t T2 = 2;
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static const uint8_t T3 = 3;
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static const uint8_t T4 = 4;
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static const uint8_t T5 = 5;
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static const uint8_t T6 = 6;
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static const uint8_t T7 = 7;
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static const uint8_t T8 = 8;
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static const uint8_t T9 = 9;
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static const uint8_t T10 = 10;
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static const uint8_t T11 = 11;
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static const uint8_t T12 = 12;
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static const uint8_t T13 = 13;
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static const uint8_t T14 = 14;
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#endif /* Pins_Arduino_h */
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; Meshnology W12 "WiFi LoRa 32 V5" - ESP32-S3R8 + LR2021 dual-band LoRa + SSD1315 OLED
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; No MESHNOLOGY_W12 hardware model exists in the protobufs yet, so this reports PRIVATE_HW.
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[env:meshnology_w12]
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custom_meshtastic_hw_model = 255
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custom_meshtastic_hw_model_slug = MESHNOLOGY_W12
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custom_meshtastic_architecture = esp32-s3
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custom_meshtastic_actively_supported = true
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custom_meshtastic_support_level = 1
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custom_meshtastic_display_name = Meshnology W12
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custom_meshtastic_requires_dfu = true
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custom_meshtastic_partition_scheme = 16MB
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extends = esp32s3_base
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board = esp32-s3-devkitc-1
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board_level = pr
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; ESP32-S3R8: 8 MB OPI PSRAM, 16 MB QIO flash
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board_build.partitions = default_16MB.csv
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board_upload.flash_size = 16MB
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board_build.flash_mode = qio
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board_build.psram_type = opi
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board_build.arduino.memory_type = qio_opi
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build_flags =
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${esp32s3_base.build_flags}
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-D MESHNOLOGY_W12
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-D ARDUINO_USB_CDC_ON_BOOT=1
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-I variants/esp32s3/meshnology-w12
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#pragma once
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// Meshnology W12 "WiFi LoRa 32 V5" - ESP32-S3R8 (8 MB PSRAM) + 16 MB flash + Semtech LR2021
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// dual-band LoRa (sub-GHz + 2.4 GHz) + SSD1315 0.96" OLED. Heltec V3-style pinout.
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// ─── OLED ─────────────────────────────────────────────────────────────────────
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// SSD1315 (SSD1306-compatible) 128x64 at 0x3C
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#define USE_SSD1306
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#define I2C_SDA 17
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#define I2C_SCL 18
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// Powers the OLED/peripheral rail; active LOW
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#define VEXT_ENABLE 45
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// ─── User input ───────────────────────────────────────────────────────────────
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#define BUTTON_PIN 0 // BOOT doubles as user button
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// ─── Battery ──────────────────────────────────────────────────────────────────
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// GPIO2 monitors a second (solar/VUSB) divider and is not used here
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#define BATTERY_PIN 1
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#define ADC_CHANNEL ADC_CHANNEL_0 // GPIO1 = ADC1_CH0
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#define ADC_MULTIPLIER 2.0
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// ─── LoRa radio ───────────────────────────────────────────────────────────────
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// RF switching is hardwired to the radio's CTX/CPS pins, and the external PA enables
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// (IO3 sub-GHz, IO4 2.4GHz) are pulled high, so no RF-switch DIO table is needed.
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#define USE_LR2021
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#define LORA_SCK 9
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#define LORA_MISO 11
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#define LORA_MOSI 10
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#define LORA_CS 8
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#define LORA_DIO1 14 // radio DIO8; also the LoRa sleep-wake pin
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#define LR2021_SPI_NSS_PIN LORA_CS
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#define LR2021_IRQ_PIN LORA_DIO1
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#define LR2021_NRESET_PIN 12
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#define LR2021_BUSY_PIN 13
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// Must be 8, not RadioLib's default of 5: DIO5 is not bonded out here, so the default
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// points every interrupt at a floating pin and scanChannel() never returns.
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#define LR2021_IRQ_DIO_NUM 8
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// DIO7 -> IO7 is a second, unused IRQ line. Plain crystal on XTA/XTB, so no TCXO voltage.
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// ─── Not wired up yet ─────────────────────────────────────────────────────────
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// RGB LED on GPIO46 stays off: HAS_NEOPIXEL pulls in the RMT HAL, which fails to link here.
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// L76K GNSS header (RX=39, TX=38, CTRL=48 active low, WAKE=40, PPS=41, RST=42) is unpopulated.
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